From 927240cb2b0e7c66bb0676848df033015e05889d Mon Sep 17 00:00:00 2001
From: Chen Jinsen <kevin.chen@rock-chips.com>
Date: Tue, 26 Jun 2018 18:58:51 +0800
Subject: [PATCH 0001/1852] ARM: dts: rk3288-th804: update regulators node

set vcc_tp stay on in suspend.

Change-Id: Ie6228b3941abda197d9b82d29a9ec3595f5b2337
Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-th804.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288-th804.dts b/arch/arm/boot/dts/rk3288-th804.dts
index d92996b881d4b..b8a173f1c539a 100644
--- a/arch/arm/boot/dts/rk3288-th804.dts
+++ b/arch/arm/boot/dts/rk3288-th804.dts
@@ -238,7 +238,8 @@
 				regulator-max-microvolt = <3300000>;
 				regulator-name = "vcc_tp";
 				regulator-state-mem {
-					regulator-off-in-suspend;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
 				};
 			};
 

From fb482b5d1a9095c88a9162249e51ae3d6d08e9a4 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 26 Jun 2018 18:00:59 +0800
Subject: [PATCH 0002/1852] MALI: bifrost: RK: Remove unused code

Change-Id: I992a0a37ee369bdc2d62d25417ea771c554034ec
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../platform/rk/mali_kbase_config_rk.c        | 269 ------------------
 1 file changed, 269 deletions(-)

diff --git a/drivers/gpu/arm/bifrost_for_linux/platform/rk/mali_kbase_config_rk.c b/drivers/gpu/arm/bifrost_for_linux/platform/rk/mali_kbase_config_rk.c
index 324cf75df6a26..b10b8a9ade355 100755
--- a/drivers/gpu/arm/bifrost_for_linux/platform/rk/mali_kbase_config_rk.c
+++ b/drivers/gpu/arm/bifrost_for_linux/platform/rk/mali_kbase_config_rk.c
@@ -451,272 +451,3 @@ static void kbase_platform_rk_remove_sysfs_files(struct device *dev)
 	device_remove_file(dev, &dev_attr_utilisation);
 }
 
-static int rockchip_get_efuse_value(struct device_node *np, char *porp_name,
-				    int *value)
-{
-	struct nvmem_cell *cell;
-	unsigned char *buf;
-	size_t len;
-
-	cell = of_nvmem_cell_get(np, porp_name);
-	if (IS_ERR(cell))
-		return PTR_ERR(cell);
-
-	buf = (unsigned char *)nvmem_cell_read(cell, &len);
-
-	nvmem_cell_put(cell);
-
-	if (IS_ERR(buf))
-		return PTR_ERR(buf);
-
-	if (buf[0] == LEAKAGE_INVALID)
-		return -EINVAL;
-
-	*value = buf[0];
-
-	kfree(buf);
-
-	return 0;
-}
-
-static int rockchip_get_volt_sel_table(struct device_node *np, char *porp_name,
-				       struct volt_sel_table **table)
-{
-	struct volt_sel_table *sel_table;
-	const struct property *prop;
-	int count, i;
-
-	prop = of_find_property(np, porp_name, NULL);
-	if (!prop)
-		return -EINVAL;
-
-	if (!prop->value)
-		return -ENODATA;
-
-	count = of_property_count_u32_elems(np, porp_name);
-	if (count < 0)
-		return -EINVAL;
-
-	if (count % 3)
-		return -EINVAL;
-
-	sel_table = kzalloc(sizeof(*sel_table) * (count / 3 + 1), GFP_KERNEL);
-	if (!sel_table)
-		return -ENOMEM;
-
-	for (i = 0; i < count / 3; i++) {
-		of_property_read_u32_index(np, porp_name, 3 * i,
-					   &sel_table[i].min);
-		of_property_read_u32_index(np, porp_name, 3 * i + 1,
-					   &sel_table[i].max);
-		of_property_read_u32_index(np, porp_name, 3 * i + 2,
-					   &sel_table[i].sel);
-	}
-	sel_table[i].min = 0;
-	sel_table[i].max = 0;
-	sel_table[i].sel = LEAKAGE_TABLE_END;
-
-	*table = sel_table;
-
-	return 0;
-}
-
-static int rockchip_get_volt_sel(struct device_node *np, char *name,
-				 int value, int *sel)
-{
-	struct volt_sel_table *table;
-	int i, j = -1, ret;
-
-	ret = rockchip_get_volt_sel_table(np, name, &table);
-	if (ret)
-		return -EINVAL;
-
-	for (i = 0; table[i].sel != LEAKAGE_TABLE_END; i++) {
-		if (value >= table[i].min)
-			j = i;
-	}
-	if (j != -1)
-		*sel = table[j].sel;
-	else
-		ret = -EINVAL;
-
-	kfree(table);
-
-	return ret;
-}
-
-static int rockchip_parse_pvtm_config(struct device_node *np,
-				      struct pvtm_config *pvtm)
-{
-	if (!of_find_property(np, "rockchip,pvtm-voltage-sel", NULL))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-freq", &pvtm->freq))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-volt", &pvtm->volt))
-		return -EINVAL;
-	if (of_property_read_u32_array(np, "rockchip,pvtm-ch", pvtm->ch, 2))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-sample-time",
-				 &pvtm->sample_time))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-number", &pvtm->num))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-error", &pvtm->err))
-		return -EINVAL;
-	if (of_property_read_u32(np, "rockchip,pvtm-ref-temp", &pvtm->ref_temp))
-		return -EINVAL;
-	if (of_property_read_u32_array(np, "rockchip,pvtm-temp-prop",
-				       pvtm->temp_prop, 2))
-		return -EINVAL;
-	if (of_property_read_string(np, "rockchip,pvtm-thermal-zone",
-				    &pvtm->tz_name))
-		return -EINVAL;
-	pvtm->tz = thermal_zone_get_zone_by_name(pvtm->tz_name);
-	if (IS_ERR(pvtm->tz))
-		return -EINVAL;
-	if (!pvtm->tz->ops->get_temp)
-		return -EINVAL;
-
-	return 0;
-}
-
-static int rockchip_get_pvtm_specific_value(struct device *dev,
-					    struct device_node *np,
-					    struct clk *clk,
-					    struct regulator *reg,
-					    int *target_value)
-{
-	struct pvtm_config *pvtm;
-	unsigned long old_freq;
-	unsigned int old_volt;
-	int cur_temp, diff_temp;
-	int cur_value, total_value, avg_value, diff_value;
-	int min_value, max_value;
-	int ret = 0, i = 0, retry = 2;
-
-	pvtm = kzalloc(sizeof(*pvtm), GFP_KERNEL);
-	if (!pvtm)
-		return -ENOMEM;
-
-	ret = rockchip_parse_pvtm_config(np, pvtm);
-	if (ret)
-		goto pvtm_value_out;
-
-	old_freq = clk_get_rate(clk);
-	old_volt = regulator_get_voltage(reg);
-
-	/*
-	 * Set pvtm_freq to the lowest frequency in dts,
-	 * so change frequency first.
-	 */
-	ret = clk_set_rate(clk, pvtm->freq * 1000);
-	if (ret) {
-		dev_err(dev, "Failed to set pvtm freq\n");
-		goto pvtm_value_out;
-	}
-
-	ret = regulator_set_voltage(reg, pvtm->volt, pvtm->volt);
-	if (ret) {
-		dev_err(dev, "Failed to set pvtm_volt\n");
-		goto restore_clk;
-	}
-
-	/* The first few values may be fluctuant, if error is too big, retry*/
-	while (retry--) {
-		total_value = 0;
-		min_value = INT_MAX;
-		max_value = 0;
-
-		for (i = 0; i < pvtm->num; i++) {
-			cur_value = rockchip_get_pvtm_value(pvtm->ch[0],
-							    pvtm->ch[1],
-							    pvtm->sample_time);
-			if (!cur_value)
-				goto resetore_volt;
-			if (cur_value < min_value)
-				min_value = cur_value;
-			if (cur_value > max_value)
-				max_value = cur_value;
-			total_value += cur_value;
-		}
-		if (max_value - min_value < pvtm->err)
-			break;
-	}
-	avg_value = total_value / pvtm->num;
-
-	/*
-	 * As pvtm is influenced by temperature, compute difference between
-	 * current temperature and reference temperature
-	 */
-	pvtm->tz->ops->get_temp(pvtm->tz, &cur_temp);
-	diff_temp = (cur_temp / 1000 - pvtm->ref_temp);
-	diff_value = diff_temp *
-		(diff_temp < 0 ? pvtm->temp_prop[0] : pvtm->temp_prop[1]);
-	*target_value = avg_value + diff_value;
-
-	dev_info(dev, "temp=%d, pvtm=%d (%d + %d)\n",
-		 cur_temp, *target_value, avg_value, diff_value);
-
-resetore_volt:
-	regulator_set_voltage(reg, old_volt, old_volt);
-restore_clk:
-	clk_set_rate(clk, old_freq);
-pvtm_value_out:
-	kfree(pvtm);
-
-	return ret;
-}
-
-void kbase_platform_rk_set_opp_info(struct kbase_device *kbdev)
-{
-	struct device_node *np;
-	char name[MAX_PROP_NAME_LEN];
-	int pvmt_value, leakage;
-	int lkg_volt_sel, pvtm_volt_sel, volt_sel = -1;
-	int err = 0;
-
-	if (!kbdev)
-		return;
-
-	if (IS_ERR_OR_NULL(kbdev->regulator))
-		return;
-	if (IS_ERR_OR_NULL(kbdev->clock))
-		return;
-
-	np = of_parse_phandle(kbdev->dev->of_node, "operating-points-v2", 0);
-	if (!np) {
-		dev_warn(kbdev->dev, "OPP-v2 not supported\n");
-		return;
-	}
-
-	err = rockchip_get_efuse_value(np, "gpu_leakage", &leakage);
-	if (!err) {
-		dev_info(kbdev->dev, "leakage=%d\n", leakage);
-		err = rockchip_get_volt_sel(np, "rockchip,leakage-voltage-sel",
-					    leakage, &lkg_volt_sel);
-		if (!err) {
-			dev_info(kbdev->dev, "leakage-sel=%d\n", lkg_volt_sel);
-			volt_sel = lkg_volt_sel;
-		}
-	}
-
-	err = rockchip_get_pvtm_specific_value(kbdev->dev, np, kbdev->clock,
-					       kbdev->regulator,
-					       &pvmt_value);
-	if (!err) {
-		err = rockchip_get_volt_sel(np, "rockchip,pvtm-voltage-sel",
-					    pvmt_value, &pvtm_volt_sel);
-		if (!err) {
-			dev_info(kbdev->dev, "pvtm-sel=%d\n", pvtm_volt_sel);
-			if (volt_sel < 0 || volt_sel > pvtm_volt_sel)
-				volt_sel = pvtm_volt_sel;
-		}
-	}
-
-	if (volt_sel >= 0) {
-		snprintf(name, MAX_PROP_NAME_LEN, "L%d", volt_sel);
-		err = dev_pm_opp_set_prop_name(kbdev->dev, name);
-		if (err)
-			dev_err(kbdev->dev, "Failed to set prop name\n");
-	}
-}

From 990018ade6472bb12a03621b9d674692721a83b3 Mon Sep 17 00:00:00 2001
From: Wu Liangqing <wlq@rock-chips.com>
Date: Fri, 22 Jun 2018 11:59:24 +0800
Subject: [PATCH 0003/1852] arm64: dts: rockchip: px30-evb: support miniboard

Change-Id: I3c98857e875ddc40df28896f328b4bc8e0c9539f
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
---
 .../boot/dts/rockchip/px30-evb-ddr3-v10.dts   | 23 +++++++++++--------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
index 507b9eeff63df..2b34f7a39cfb8 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
@@ -94,6 +94,15 @@
 		default-brightness-level = <200>;
 	};
 
+	charge-animation {
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <0>;
+		rockchip,android-charge-on = <1>;
+		rockchip,uboot-low-power-voltage = <3500>;
+		rockchip,screen-on-voltage = <3600>;
+		status = "okay";
+	};
+
 	rk809-sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
@@ -164,14 +173,14 @@
 
 	wireless-bluetooth {
 		compatible = "bluetooth-platdata";
-		/*clocks = <&rk809 1>;*/
-		/*clock-names = "ext_clock";*/
+		clocks = <&rk809 1>;
+		clock-names = "ext_clock";
 		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default","rts_gpio";
 		pinctrl-0 = <&uart1_rts>;
 		pinctrl-1 = <&uart1_rts_gpio>;
-		BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
-		BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		BT,reset_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
 		BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
 		status = "okay";
 	};
@@ -309,11 +318,7 @@
 
 &gmac {
 	phy-supply = <&vcc_phy>;
-	assigned-clocks = <&cru SCLK_GMAC>;
-	assigned-clock-parents = <&gmac_clkin>;
-	clock_in_out = "input";
-	pinctrl-names = "default";
-	pinctrl-0 = <&rmii_pins &mac_refclk>;
+	clock_in_out = "output";
 	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 50000 50000>;

From 6eb718fab40c41724b40efd7700b541ef4ab77b7 Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Wed, 6 Jun 2018 17:09:50 +0800
Subject: [PATCH 0004/1852] arm64: dts: rockchip: add opp-1296000000 for rk3308

Change-Id: Ie734c94b0c136625cd620114d7fa87e8bbc64c83
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index a279f0aafd03a..b8bee600686b1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -127,6 +127,12 @@
 			opp-microvolt = <1200000 1200000 1340000>;
 			clock-latency-ns = <40000>;
 		};
+		opp-1296000000 {
+			opp-hz = /bits/ 64 <1296000000>;
+			opp-microvolt = <1250000 1250000 1340000>;
+			clock-latency-ns = <40000>;
+			status = "disabled";
+		};
 	};
 
 	arm-pmu {

From c7ff7087533ecef7a8b93aee74120503b8921b5a Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Thu, 28 Jun 2018 10:07:07 +0800
Subject: [PATCH 0005/1852] arm64: dts: rockchip: enable cpufreq 1.3G for
 rk3308 EVB V11

Change-Id: I06756eb90a8ffca1fe2223bd7e0f8343dd4a8e19
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 0c8d9f3ab7d63..35e029ace6470 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -254,6 +254,12 @@
 	cpu-supply = <&vdd_core>;
 };
 
+&cpu0_opp_table {
+	opp-1296000000 {
+		status = "okay";
+	};
+};
+
 &dmc {
 	center-supply = <&vdd_log>;
 	status = "okay";

From 125aa643920847a7394194da4230236b5793f24a Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Thu, 28 Jun 2018 10:19:16 +0800
Subject: [PATCH 0006/1852] arm: dts: rockchip: rk3308-voice-module: update
 4amic mapping

Change-Id: I42d5d8a90ba0a45ec9268442fe8179dd8343c4c2
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 .../boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi   | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
index 20c96fab67c31..1953d3ff68d5b 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
@@ -37,8 +37,8 @@
 &acodec {
 	status = "okay";
 
-	/* ADC5-8 for 4ch capture, loopback to ADC3-4 */
-	rockchip,adc-grps-route = <2 3 1 0>;
+	/* ADC3-6 for 4ch capture, loopback to ADC7 */
+	rockchip,adc-grps-route = <1 2 3 0>;
 };
 
 &i2c1 {

From e82944727af1daeae47a52c456caf6bae41e5f7f Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 09:12:18 +0800
Subject: [PATCH 0007/1852] soc: rockchip: opp_select: Fix of_device_id NULL
 when get soc info

Change-Id: I8a2d96c1f038bf4f288ded9f7edc944ccbac7950
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/soc/rockchip/rockchip_opp_select.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index 27999746fe3bc..4e45f817401fe 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -770,7 +770,7 @@ int rockchip_init_opp_table(struct device *dev,
 	}
 	of_node_put(np);
 
-	rockchip_get_soc_info(dev, NULL, &bin, &process);
+	rockchip_get_soc_info(dev, matches, &bin, &process);
 	rockchip_get_scale_volt_sel(dev, lkg_name, reg_name, bin, process,
 				    &scale, &volt_sel);
 	rockchip_set_opp_info(dev, process, volt_sel);

From 18362fe03e11cd578a16a2e2b92a2b6ae55bf2f5 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 09:41:19 +0800
Subject: [PATCH 0008/1852] soc: rockchip: opp_select: Fix sleeping inside
 atomic context

This patch fixes the following warning:
[    2.226264] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:620
[    2.226341] in_atomic(): 0, irqs_disabled(): 0, pid: 1, name: swapper/0
[    2.226366] 4 locks held by swapper/0/1:
[    2.226385]  #0:  (&dev->mutex){......}, at: [<ffffff800851c664>] __device_attach+0x3c/0x134
[    2.226515]  #1:  (cpu_hotplug.lock){......}, at: [<ffffff800809feb0>] get_online_cpus+0x38/0x9c
[    2.226594]  #2:  (subsys mutex#7){......}, at: [<ffffff800851b0e4>] subsys_interface_register+0x54/0xfc
[    2.226684]  #3:  (rcu_read_lock){......}, at: [<ffffff800845c764>] rockchip_adjust_power_scale+0x88/0x450
[    2.226771] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.132 #600
[    2.226790] Hardware name: Rockchip PX30 evb ddr3 board (DT)
[    2.226809] Call trace:
[    2.226840] [<ffffff800808a0d4>] dump_backtrace+0x0/0x1ec
[    2.226889] [<ffffff800808a2d4>] show_stack+0x14/0x1c
[    2.226918] [<ffffff80083c41b4>] dump_stack+0x94/0xbc
[    2.226946] [<ffffff80080cb708>] ___might_sleep+0x108/0x118
[    2.226972] [<ffffff80080cb788>] __might_sleep+0x70/0x80
[    2.227001] [<ffffff8008b6d1d0>] mutex_lock_nested+0x54/0x38c
[    2.227031] [<ffffff8008858714>] __of_clk_get_from_provider+0x44/0xec
[    2.227061] [<ffffff8008852814>] __of_clk_get_by_name+0xd4/0x14c
[    2.227112] [<ffffff80088528a4>] of_clk_get_by_name+0x18/0x28
[    2.227140] [<ffffff800845c980>] rockchip_adjust_power_scale+0x2a4/0x450
[    2.227171] [<ffffff800877f630>] cpufreq_init+0x154/0x394
[    2.227199] [<ffffff8008776ac4>] cpufreq_online+0x1b0/0x68c
[    2.227225] [<ffffff8008777040>] cpufreq_add_dev+0x3c/0x94
[    2.227253] [<ffffff800851b168>] subsys_interface_register+0xd8/0xfc
[    2.227281] [<ffffff80087772d8>] cpufreq_register_driver+0x10c/0x1a8
[    2.227332] [<ffffff800877f93c>] dt_cpufreq_probe+0xcc/0xe8
[    2.227360] [<ffffff800851e7b8>] platform_drv_probe+0x54/0xa8
[    2.227385] [<ffffff800851c924>] driver_probe_device+0x194/0x278
[    2.227411] [<ffffff800851cb40>] __device_attach_driver+0x60/0x9c
[    2.227439] [<ffffff800851ae14>] bus_for_each_drv+0x9c/0xbc
[    2.227464] [<ffffff800851c6f0>] __device_attach+0xc8/0x134
[    2.227488] [<ffffff800851ccb8>] device_initial_probe+0x10/0x18
[    2.227514] [<ffffff800851bcec>] bus_probe_device+0x2c/0x90
[    2.227541] [<ffffff8008519e90>] device_add+0x44c/0x510
[    2.227570] [<ffffff800851e4d4>] platform_device_add+0xa0/0x1e4
[    2.227597] [<ffffff800851ef28>] platform_device_register_full+0xa4/0xe4
[    2.227627] [<ffffff80090f8680>] rockchip_cpufreq_driver_init+0xd4/0x31c
[    2.227654] [<ffffff8008083468>] do_one_initcall+0x84/0x1a4
[    2.227682] [<ffffff80090c0e98>] kernel_init_freeable+0x260/0x264
[    2.227708] [<ffffff8008b6ab68>] kernel_init+0x10/0xf8
[    2.227734] [<ffffff80080832a0>] ret_from_fork+0x10/0x30

Fixes: 197a2d322ade ("soc: rockchip: opp_select: add missing rcu lock")
Change-Id: Ib52b6f7bc77bb207a1c8c6880f7a5e916fa3d2ee
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/soc/rockchip/rockchip_opp_select.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index 4e45f817401fe..231f24839922c 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -590,7 +590,7 @@ static int rockchip_adjust_opp_by_irdrop(struct device *dev,
 	count = dev_pm_opp_get_opp_count(dev);
 	if (count <= 0) {
 		ret = count ? count : -ENODATA;
-		goto out;
+		goto unlock;
 	}
 
 	for (i = 0, rate = 0; i < count; i++, rate++) {
@@ -598,7 +598,7 @@ static int rockchip_adjust_opp_by_irdrop(struct device *dev,
 		opp = dev_pm_opp_find_freq_ceil(dev, &rate);
 		if (IS_ERR(opp)) {
 			ret = PTR_ERR(opp);
-			goto out;
+			goto unlock;
 		}
 		board_irdrop = rockchip_of_get_irdrop(np, opp->rate);
 		if (IS_ERR_VALUE(board_irdrop))
@@ -621,9 +621,18 @@ static int rockchip_adjust_opp_by_irdrop(struct device *dev,
 		}
 	}
 
+unlock:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
+	rcu_read_unlock();
+#endif
+	if (ret)
+		goto out;
+
 	clk = of_clk_get_by_name(np, NULL);
-	if (IS_ERR(clk))
+	if (IS_ERR(clk)) {
+		ret = PTR_ERR(clk);
 		goto out;
+	}
 	if (safe_opp && safe_opp != opp && irdrop_scale) {
 		*irdrop_scale = rockchip_pll_clk_rate_to_scale(clk,
 							       safe_opp->rate);
@@ -634,9 +643,6 @@ static int rockchip_adjust_opp_by_irdrop(struct device *dev,
 	clk_put(clk);
 
 out:
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
-	rcu_read_unlock();
-#endif
 	return ret;
 }
 

From 93d79eea8b16742aa2b86042f0abc2d465465b20 Mon Sep 17 00:00:00 2001
From: Guochun Huang <hero.huang@rock-chips.com>
Date: Wed, 27 Jun 2018 17:21:08 +0800
Subject: [PATCH 0009/1852] arm64: dts: rockchip: rk3399-android: modify system
 and vendor path

Change-Id: Icfad366093320369c1fa8d0dd100a71a1739e088
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-android.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index 72ed5bbaa1c08..3e917c077f79f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -266,14 +266,14 @@
 				compatible = "android,fstab";
 				system {
 					compatible = "android,system";
-					dev = "/dev/block/platform/fe330000.sdhci/by-name/system";
+					dev = "/dev/block/by-name/system";
 					type = "ext4";
 					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
 					fsmgr_flags = "wait,verify";
 				};
 				vendor {
 					compatible = "android,vendor";
-					dev = "/dev/block/platform/fe330000.sdhci/by-name/vendor";
+					dev = "/dev/block/by-name/vendor";
 					type = "ext4";
 					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
 					fsmgr_flags = "wait,verify";

From 39b5e39a9a46dda8ee959e831b4ebbb9e5ca92a9 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Wed, 27 Jun 2018 11:41:52 +0800
Subject: [PATCH 0010/1852] drivers: rkflash: update spi nand ECC strategy

1.Read ECC status according to each flash's identify Internal ECC;
2.Refresh data before reach ECC Flipping Bits.

Change-Id: Ie33850e151410cd788ff0220041d041a3d5b4f07
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/sfc_nand.c | 191 +++++++++++++++++++++++++++----------
 drivers/rkflash/sfc_nand.h |   3 +
 2 files changed, 145 insertions(+), 49 deletions(-)

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index d8716e23e581f..6bc8727fa956b 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -14,29 +14,31 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* MX35LF1GE4AB */
-	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
-	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
-	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ40BY2GR */
-	{0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
-	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F1GQ4U */
-	{0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ4U */
-	{0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* GD5F2GQ40BY2GR */
+	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* GD5F1GQ4U */
-	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UDACAE */
+	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF1GQ4UDACAE */
+	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
 };
 
 static u8 id_byte[8];
@@ -139,6 +141,122 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 	return -1;
 }
 
+/*
+ * ecc default:
+ * 0, No bit errors were detected
+ * 1, Bit errors were detected and corrected.
+ * 2, Multiple bit errors were detected and not corrected.
+ * 3, Bits errors were detected and corrected, bit error count
+ *	exceed the bit flip detection threshold
+ */
+static u32 sfc_nand_ecc_status(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc <= 1)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 2)
+		ret = SFC_NAND_ECC_ERROR;
+	else
+		ret = SFC_NAND_ECC_REFRESH;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type1:
+ * 0x00, No bit errors were detected;
+ * 0x01, Bits errors were detected and corrected, bit error count
+ *	may reach the bit flip detection threshold;
+ * 0x10, Multiple bit errors were detected and not corrected;
+ * 0x11, Reserved.
+ */
+u32 sfc_nand_ecc_status_sp1(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc == 0)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 1)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type3:
+ * [0x0000, 0x0011], No bit errors were detected;
+ * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000, 0x1011], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100, 0x1111], Bit error count equals the bit flip
+ *	detectionthreshold
+ */
+u32 sfc_nand_ecc_status_sp3(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status, status1;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		ret = sfc_nand_read_feature(0xF0, &status1);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc >= 12)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -208,8 +326,7 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	int ret;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
-	u8 status;
-	u8 ecc;
+	u32 ecc_result;
 	u32 data_sz = 2048;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
@@ -220,8 +337,11 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfc_request(sfcmd.d32, 0, addr, p_data);
 
-	sfc_nand_wait_busy(&status, 1000 * 1000);
-	ecc = (status >> 4) & 0x03;
+	if (p_nand_info->ecc_status)
+		ecc_result = p_nand_info->ecc_status();
+	else
+		ecc_result = sfc_nand_ecc_status();
+
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->QE_address == 0xFF &&
 	    sfc_get_version() != SFC_VER_3)
@@ -243,41 +363,14 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	if (ret != SFC_OK)
 		return SFC_NAND_ECC_ERROR;
 
-	/*
-	 * ecc status:
-	 * 0, No bit errors were detected
-	 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1,
-	 *	Bit error count exceed the bit flip detection threshold.
-	 * 2, Multiple bit errors were detected and not corrected.
-	 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected
-	 *	and corrected, bit error count exceed the bit flip detection
-	 *	threshold
-	 */
-
-	if (ecc == 0) {
-		ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 1) {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_REFRESH;
-		else
-			ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 2) {
-		ret = SFC_NAND_ECC_ERROR;
-	} else {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_ERROR;
-		else
-			ret = SFC_NAND_ECC_REFRESH;
-	}
-
-	if (ret != SFC_NAND_ECC_OK) {
-		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+	if (ecc_result != SFC_NAND_ECC_OK) {
+		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ecc_result);
 		if (p_data)
 			PRINT_SFC_HEX("data:", p_data, 4, 8);
 		if (p_spare)
 			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
 	}
-	return ret;
+	return ecc_result;
 }
 
 static int sfc_nand_read_id_raw(u8 *data)
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 4942760caee86..8e01801f32a10 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -112,10 +112,13 @@ struct nand_info {
 
 	u8 spare_offs_1;
 	u8 spare_offs_2;
+	u32 (*ecc_status)(void);
 };
 
 u32 sfc_nand_init(void);
 void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
+u32 sfc_nand_ecc_status_sp1(void);
+u32 sfc_nand_ecc_status_sp3(void);
 
 #endif

From d1df55f316ef86fa6af5911c0b1d866e32e68039 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Thu, 28 Jun 2018 14:14:44 +0800
Subject: [PATCH 0011/1852] arm: dts: rockchip: rk3308-voice-module: update key
 config

Change-Id: Id521af6a91f3c9f00a7cb30bd9d38b38d12c8309
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 .../dts/rk3308-voice-module-v10-aarch32.dtsi  | 30 +++++++++++++++++--
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 38ed89ede13f3..63bd7be4460ed 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -21,9 +21,33 @@
 		poll-interval = <100>;
 		keyup-threshold-microvolt = <1800000>;
 
-		recovery-key {
-			linux,code = <KEY_FN>;
-			label = "recovery";
+		esc-key {
+			linux,code = <KEY_MICMUTE>;
+			label = "micmute";
+			press-threshold-microvolt = <1130000>;
+		};
+
+		home-key {
+			linux,code = <KEY_MODE>;
+			label = "mode";
+			press-threshold-microvolt = <901000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_PLAY>;
+			label = "play";
+			press-threshold-microvolt = <624000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
 			press-threshold-microvolt = <18000>;
 		};
 	};

From 82c931ea045ec6ea74854aa175334dbfa8f00f1b Mon Sep 17 00:00:00 2001
From: qiujian <qiujian@rock-chips.com>
Date: Fri, 29 Jun 2018 09:27:26 +0800
Subject: [PATCH 0012/1852] arm64: dts: rockchip: px30-android: update
 veritymode

androidboot.veritymode=enforcing

Change-Id: If4c99e8283324068c2574eb0831e12f4abf5b970
Signed-off-by: Jian Qiu <qiujian@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30-android.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-android.dtsi b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
index f2884e8e991d5..80a9e73f337e2 100644
--- a/arch/arm64/boot/dts/rockchip/px30-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
@@ -6,7 +6,7 @@
 
 / {
 	chosen {
-		bootargs = "earlyprintk=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.selinux=permissive androidboot.veritymode=/dev/block/by-name/metadata androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
+		bootargs = "earlyprintk=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.selinux=permissive androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
 	};
 
 	fiq-debugger {

From 6409980c47f80dc611b3fefed208407f15070a65 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Thu, 28 Jun 2018 18:00:51 +0800
Subject: [PATCH 0013/1852] arm: dts: rockchip: rk3308-voice-module: enable sfc

Change-Id: I4ca02957fb0ba6a869fe557e6a3a9968f4ef345e
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 63bd7be4460ed..cfb74991e6e13 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -285,6 +285,11 @@
 	pinctrl-0 = <&pwm0_pin_pull_down>;
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &tsadc {
 	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */

From a8642fb6754927db8e98ee8503db32b07390784a Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Thu, 28 Jun 2018 18:10:03 +0800
Subject: [PATCH 0014/1852] arm: configs: enable slc nand and sfc devices for
 rk3308 aarch32

Change-Id: Iac9a56cf770519d60ab7de350b7e3cc1de6a6915
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 5 ++++-
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 648ace1e8a38e..c72571d51e4e2 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -209,7 +209,10 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_ANDROID=y
 CONFIG_NVMEM=y
 CONFIG_ROCKCHIP_OTP=y
-CONFIG_RK_NAND=y
+CONFIG_RK_FLASH=y
+CONFIG_RK_NANDC_NAND=y
+CONFIG_RK_SFC_NAND=y
+CONFIG_RK_SFC_NOR=y
 CONFIG_ROCKCHIP_SIP=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT4_FS=m
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 3631d4ac3cfba..8bd80726f41b5 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -209,7 +209,10 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=m
 CONFIG_ANDROID=y
 CONFIG_NVMEM=y
 CONFIG_ROCKCHIP_OTP=y
-CONFIG_RK_NAND=y
+CONFIG_RK_FLASH=y
+CONFIG_RK_NANDC_NAND=y
+CONFIG_RK_SFC_NAND=y
+CONFIG_RK_SFC_NOR=y
 CONFIG_ROCKCHIP_SIP=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT4_FS=m

From 5a53910057d2b19307e89834b6da7b377198341a Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 27 Jun 2018 09:40:05 +0800
Subject: [PATCH 0015/1852] ARM64: dts: rockchip: add firefly ov13850 camera

Add firefly linux ov13850 camera node, and enable isp
and isp_mmu.

Change-Id: I317f4b9895c73913456c957273cc6b18173a8cd9
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 .../dts/rockchip/rk3399-firefly-linux.dts     | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
index 243eef889e5f0..c3e076f7ff897 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
@@ -670,6 +670,43 @@
 		io-channels = <&saradc 4>;
 		hp-det-adc-value = <500>;
 	};
+
+	camera0: ov13850@10 {
+		status = "okay";
+		compatible = "omnivision,ov13850-v4l2-i2c-subdev";
+		reg = < 0x10 >;
+		device_type = "v4l2-i2c-subdev";
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "clk_cif_out";
+
+		pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep";
+		pinctrl-0 = <&cam0_default_pins>;
+		pinctrl-1 = <&cam0_sleep_pins>;
+
+		rockchip,pd-gpio = <&gpio2 12 GPIO_ACTIVE_LOW>;
+		rockchip,pwr-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+		rockchip,pwr-2nd-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		rockchip,rst-gpio = <&gpio0 8 GPIO_ACTIVE_LOW>;
+
+		rockchip,camera-module-mclk-name = "clk_cif_out";
+		rockchip,camera-module-facing = "back";
+		rockchip,camera-module-name = "cmk-cb0695-fv1";
+		rockchip,camera-module-len-name = "lg9569a2";
+		rockchip,camera-module-fov-h = "66.0";
+		rockchip,camera-module-fov-v = "50.1";
+		rockchip,camera-module-orientation = <0>;
+		rockchip,camera-module-iq-flip = <0>;
+		rockchip,camera-module-iq-mirror = <0>;
+		rockchip,camera-module-flip = <1>;
+		rockchip,camera-module-mirror = <0>;
+
+		rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
+		rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
+		rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
+		rockchip,camera-module-flash-support = <0>;
+		rockchip,camera-module-mipi-dphy-index = <0>;
+	};
 };
 
 &i2c3 {
@@ -1016,6 +1053,15 @@
 	status = "okay";
 };
 
+&cif_isp0 {
+	rockchip,camera-modules-attached = <&camera0>;
+	status = "okay";
+};
+
+&isp0_mmu {
+	status = "okay";
+};
+
 &vopb {
 	status = "okay";
 };

From e82600a081a328042bc735c33c540ea27b9d02e3 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 29 May 2018 15:43:34 +0800
Subject: [PATCH 0016/1852] ARM: dts: px3se-evb: disable uart1

Because px3se evb board enables fiq-debugger on uart1,
this disables uart1 and set uart1 iomux in fiq-debugger.

Change-Id: I0432216ee2162699309605c72600ad56a1e6c7b9
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/px3se-evb.dts | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts
index 1204818423016..fe609cdfed011 100644
--- a/arch/arm/boot/dts/px3se-evb.dts
+++ b/arch/arm/boot/dts/px3se-evb.dts
@@ -84,6 +84,10 @@
 
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer>;
+
 		rockchip,serial-id = <1>;
 		rockchip,wake-irq = <0>;
 		/* If enable uart uses irq instead of fiq */
@@ -514,7 +518,8 @@
 };
 
 &uart1 {
-	status = "okay";
+	/* disable uart1 explicitly since fiq-debugger is on uart1 */
+	status = "disabled";
 };
 
 &usb_host_ehci {

From 47d0457bf6b29659d4eda69c0bb6d69287c8f844 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 29 May 2018 15:41:52 +0800
Subject: [PATCH 0017/1852] media: i2c: Add adv7181 driver

This adds a adv7181 driver that can receive cvbs in and
output NTSC yuv data.

Change-Id: I1f86178b38fd079f790f1194304e5b94f72e523f
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 drivers/media/i2c/Kconfig   |   9 +
 drivers/media/i2c/Makefile  |   1 +
 drivers/media/i2c/adv7181.c | 550 ++++++++++++++++++++++++++++++++++++
 3 files changed, 560 insertions(+)
 create mode 100644 drivers/media/i2c/adv7181.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index ac9ee71d51a5c..6f9568cd1705d 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -184,6 +184,15 @@ config VIDEO_ADV7180
 	  To compile this driver as a module, choose M here: the
 	  module will be called adv7180.
 
+config VIDEO_ADV7181D
+	tristate "Analog Devices ADV7181 decoder"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	---help---
+	  Support for the Analog Devices ADV7181 video decoder.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called adv7181.
+
 config VIDEO_ADV7183
 	tristate "Analog Devices ADV7183 decoder"
 	depends on VIDEO_V4L2 && I2C
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 1e4f832fe1331..720e5b35443a1 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_VIDEO_SAA6752HS) += saa6752hs.o
 obj-$(CONFIG_VIDEO_ADV7170) += adv7170.o
 obj-$(CONFIG_VIDEO_ADV7175) += adv7175.o
 obj-$(CONFIG_VIDEO_ADV7180) += adv7180.o
+obj-$(CONFIG_VIDEO_ADV7181D) += adv7181.o
 obj-$(CONFIG_VIDEO_ADV7183) += adv7183.o
 obj-$(CONFIG_VIDEO_ADV7343) += adv7343.o
 obj-$(CONFIG_VIDEO_ADV7393) += adv7393.o
diff --git a/drivers/media/i2c/adv7181.c b/drivers/media/i2c/adv7181.c
new file mode 100644
index 0000000000000..82f82a21f4879
--- /dev/null
+++ b/drivers/media/i2c/adv7181.c
@@ -0,0 +1,550 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * adv7181 driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+
+#define REG_CHIP_ID			0x11
+#define CHIP_ID				0x20
+
+#define REG_SC_CTRL_MODE		0x03
+#define     SC_CTRL_MODE_STANDBY	0x4c
+#define     SC_CTRL_MODE_STREAMING	0x0c
+
+#define REG_NULL			0xFF
+
+#define ADV7181_XVCLK_FREQ		24000000
+#define ADV7181_LANES			1
+#define ADV7181_BITS_PER_SAMPLE		10
+
+#define ADV7181_SKIP_TOP		24
+
+static const char * const adv7181_supply_names[] = {
+	"dvdd",
+	"dvddio",
+};
+
+#define ADV7181_NUM_SUPPLIES ARRAY_SIZE(adv7181_supply_names)
+
+struct regval {
+	u8 addr;
+	u8 val;
+};
+
+struct adv7181_mode {
+	u32 width;
+	u32 height;
+	const struct regval *reg_list;
+};
+
+struct adv7181 {
+	struct i2c_client	*client;
+	struct clk		*xvclk;
+	struct gpio_desc	*reset_gpio;
+	struct regulator_bulk_data supplies[ADV7181_NUM_SUPPLIES];
+
+	bool			streaming;
+	struct mutex		mutex; /* lock to serialize v4l2 callback */
+	struct v4l2_subdev	subdev;
+	struct media_pad	pad;
+
+	int			skip_top;
+
+	const struct adv7181_mode *cur_mode;
+};
+
+#define to_adv7181(sd) container_of(sd, struct adv7181, subdev)
+
+/* PLL settings bases on 28M xvclk, resolution 720x480 30fps*/
+static struct regval adv7181_cvbs_30fps[] = {
+	{0x00, 0x0B},
+	{0x04, 0x77},
+	{0x17, 0x41},
+	{0x1D, 0x47},
+	{0x31, 0x02},
+	{0x3A, 0x17},
+	{0x3B, 0x81},
+	{0x3D, 0xA2},
+	{0x3E, 0x6A},
+	{0x3F, 0xA0},
+	{0x86, 0x0B},
+	{0xF3, 0x01},
+	{0xF9, 0x03},
+	{0x0E, 0x80},
+	{0x52, 0x46},
+	{0x54, 0x80},
+	{0x7F, 0xFF},
+	{0x81, 0x30},
+	{0x90, 0xC9},
+	{0x91, 0x40},
+	{0x92, 0x3C},
+	{0x93, 0xCA},
+	{0x94, 0xD5},
+	{0xB1, 0xFF},
+	{0xB6, 0x08},
+	{0xC0, 0x9A},
+	{0xCF, 0x50},
+	{0xD0, 0x4E},
+	{0xD1, 0xB9},
+	{0xD6, 0xDD},
+	{0xD7, 0xE2},
+	{0xE5, 0x51},
+	{0xF6, 0x3B},
+	{0x0E, 0x00},
+	{0x03, 0x4C},
+	{REG_NULL, 0x0},
+};
+
+static const struct adv7181_mode supported_modes[] = {
+	{
+		.width = 720,
+		.height = 480,
+		.reg_list = adv7181_cvbs_30fps,
+	},
+};
+
+static int adv7181_write_reg(struct i2c_client *client, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = i2c_smbus_write_byte_data(client, reg, val);
+
+	if (ret < 0)
+		dev_err(&client->dev, "write reg error: %d\n", ret);
+
+	return ret;
+}
+
+static int adv7181_write_array(struct i2c_client *client,
+			       const struct regval *regs)
+{
+	int i, ret = 0;
+
+	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+		ret = adv7181_write_reg(client, regs[i].addr, regs[i].val);
+
+	return ret;
+}
+
+static inline u8 adv7181_read_reg(struct i2c_client *client, u8 reg)
+{
+	return i2c_smbus_read_byte_data(client, reg);
+}
+
+static void adv7181_fill_fmt(const struct adv7181_mode *mode,
+			     struct v4l2_mbus_framefmt *fmt)
+{
+	fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
+	fmt->width = mode->width;
+	fmt->height = mode->height;
+	fmt->field = V4L2_FIELD_NONE;
+	fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
+}
+
+static int adv7181_set_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct adv7181 *adv7181 = to_adv7181(sd);
+	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
+
+	/* only one mode supported for now */
+	adv7181_fill_fmt(adv7181->cur_mode, mbus_fmt);
+
+	return 0;
+}
+
+static int adv7181_get_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct adv7181 *adv7181 = to_adv7181(sd);
+	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
+
+	adv7181_fill_fmt(adv7181->cur_mode, mbus_fmt);
+
+	return 0;
+}
+
+static int adv7181_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_pad_config *cfg,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+	return 0;
+}
+
+static int adv7181_enum_frame_sizes(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_pad_config *cfg,
+				    struct v4l2_subdev_frame_size_enum *fse)
+{
+	u32 index = fse->index;
+
+	if (index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+	fse->min_width  = supported_modes[index].width;
+	fse->max_width  = supported_modes[index].width;
+	fse->max_height = supported_modes[index].height;
+	fse->min_height = supported_modes[index].height;
+
+	return 0;
+}
+
+static int adv7181_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
+{
+	struct adv7181 *adv7181 = to_adv7181(sd);
+
+	*lines = adv7181->skip_top;
+
+	return 0;
+}
+
+static int adv7181_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
+{
+	/* Only NTSC now */
+	*std = V4L2_STD_NTSC;
+
+	return 0;
+}
+
+static int __adv7181_power_on(struct adv7181 *adv7181)
+{
+	int ret;
+	struct device *dev = &adv7181->client->dev;
+
+	if (!IS_ERR(adv7181->xvclk)) {
+		ret = clk_prepare_enable(adv7181->xvclk);
+		if (ret < 0) {
+			dev_err(dev, "Failed to enable xvclk\n");
+			return ret;
+		}
+	}
+
+	gpiod_set_value_cansleep(adv7181->reset_gpio, 1);
+
+	ret = regulator_bulk_enable(ADV7181_NUM_SUPPLIES, adv7181->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators\n");
+		goto disable_clk;
+	}
+
+	gpiod_set_value_cansleep(adv7181->reset_gpio, 0);
+
+	return 0;
+
+disable_clk:
+	if (!IS_ERR(adv7181->xvclk))
+		clk_disable_unprepare(adv7181->xvclk);
+
+	return ret;
+}
+
+static void __adv7181_power_off(struct adv7181 *adv7181)
+{
+	if (!IS_ERR(adv7181->xvclk))
+		clk_disable_unprepare(adv7181->xvclk);
+	gpiod_set_value_cansleep(adv7181->reset_gpio, 1);
+	regulator_bulk_disable(ADV7181_NUM_SUPPLIES, adv7181->supplies);
+}
+
+static int adv7181_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct adv7181 *adv7181 = to_adv7181(sd);
+	struct i2c_client *client = adv7181->client;
+	int ret = 0;
+
+	mutex_lock(&adv7181->mutex);
+
+	on = !!on;
+	if (on == adv7181->streaming)
+		goto unlock_and_return;
+
+	if (on) {
+		ret = pm_runtime_get_sync(&adv7181->client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = adv7181_write_array(adv7181->client,
+					  adv7181->cur_mode->reg_list);
+		if (ret) {
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = adv7181_write_reg(client, REG_SC_CTRL_MODE,
+					SC_CTRL_MODE_STREAMING);
+		if (ret) {
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+	} else {
+		adv7181_write_reg(client, REG_SC_CTRL_MODE,
+				  SC_CTRL_MODE_STANDBY);
+		pm_runtime_put(&client->dev);
+	}
+
+	adv7181->streaming = on;
+
+unlock_and_return:
+	mutex_unlock(&adv7181->mutex);
+
+	return ret;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int adv7181_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct adv7181 *adv7181 = to_adv7181(sd);
+	struct v4l2_mbus_framefmt *try_fmt;
+
+	mutex_lock(&adv7181->mutex);
+
+	try_fmt = v4l2_subdev_get_try_format(sd, fh->pad, 0);
+	/* Initialize try_fmt */
+	adv7181_fill_fmt(&supported_modes[0], try_fmt);
+
+	mutex_unlock(&adv7181->mutex);
+
+	return 0;
+}
+#endif
+
+static int adv7181_runtime_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct adv7181 *adv7181 = to_adv7181(sd);
+
+	return __adv7181_power_on(adv7181);
+}
+
+static int adv7181_runtime_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct adv7181 *adv7181 = to_adv7181(sd);
+
+	__adv7181_power_off(adv7181);
+
+	return 0;
+}
+
+static const struct dev_pm_ops adv7181_pm_ops = {
+	SET_RUNTIME_PM_OPS(adv7181_runtime_suspend,
+			   adv7181_runtime_resume, NULL)
+};
+
+static const struct v4l2_subdev_video_ops adv7181_video_ops = {
+	.s_stream = adv7181_s_stream,
+	.querystd = adv7181_querystd,
+};
+
+static const struct v4l2_subdev_pad_ops adv7181_pad_ops = {
+	.enum_mbus_code = adv7181_enum_mbus_code,
+	.enum_frame_size = adv7181_enum_frame_sizes,
+	.get_fmt = adv7181_get_fmt,
+	.set_fmt = adv7181_set_fmt,
+};
+
+static struct v4l2_subdev_sensor_ops adv7181_sensor_ops = {
+	.g_skip_top_lines	= adv7181_g_skip_top_lines,
+};
+
+static const struct v4l2_subdev_ops adv7181_subdev_ops = {
+	.video	= &adv7181_video_ops,
+	.pad	= &adv7181_pad_ops,
+	.sensor = &adv7181_sensor_ops,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops adv7181_internal_ops = {
+	.open = adv7181_open,
+};
+#endif
+
+static int adv7181_check_sensor_id(struct adv7181 *adv7181,
+				  struct i2c_client *client)
+{
+	struct device *dev = &adv7181->client->dev;
+	u8 id;
+
+	id = adv7181_read_reg(client, REG_CHIP_ID);
+
+	if (id != CHIP_ID) {
+		dev_err(dev, "Wrong camera sensor id(%04x)\n", id);
+		return -EINVAL;
+	}
+
+	dev_info(dev, "Detected ADV7181 (%04x) sensor\n", CHIP_ID);
+
+	return 0;
+}
+
+static int adv7181_configure_regulators(struct adv7181 *adv7181)
+{
+	u32 i;
+
+	for (i = 0; i < ADV7181_NUM_SUPPLIES; i++)
+		adv7181->supplies[i].supply = adv7181_supply_names[i];
+
+	return devm_regulator_bulk_get(&adv7181->client->dev,
+				       ADV7181_NUM_SUPPLIES,
+				       adv7181->supplies);
+}
+
+static int adv7181_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct adv7181 *adv7181;
+	int ret;
+
+	adv7181 = devm_kzalloc(dev, sizeof(*adv7181), GFP_KERNEL);
+	if (!adv7181)
+		return -ENOMEM;
+
+	adv7181->skip_top = ADV7181_SKIP_TOP;
+
+	adv7181->client = client;
+	adv7181->cur_mode = &supported_modes[0];
+
+	adv7181->xvclk = devm_clk_get(dev, "xvclk");
+	if (!IS_ERR(adv7181->xvclk)) {
+		ret = clk_set_rate(adv7181->xvclk, ADV7181_XVCLK_FREQ);
+		if (ret < 0) {
+			dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+			return ret;
+		}
+		if (clk_get_rate(adv7181->xvclk) != ADV7181_XVCLK_FREQ)
+			dev_warn(dev, "xvclk mismatched, it requires 24MHz\n");
+	}
+
+	adv7181->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(adv7181->reset_gpio)) {
+		dev_err(dev, "Failed to get reset-gpios\n");
+		return -EINVAL;
+	}
+
+	ret = adv7181_configure_regulators(adv7181);
+	if (ret) {
+		dev_err(dev, "Failed to get power regulators\n");
+		return ret;
+	}
+
+	mutex_init(&adv7181->mutex);
+	v4l2_i2c_subdev_init(&adv7181->subdev, client, &adv7181_subdev_ops);
+
+	ret = __adv7181_power_on(adv7181);
+	if (ret)
+		goto err_destroy_mutex;
+
+	ret = adv7181_check_sensor_id(adv7181, client);
+	if (ret)
+		goto err_power_off;
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	adv7181->subdev.internal_ops = &adv7181_internal_ops;
+	adv7181->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	adv7181->pad.flags = MEDIA_PAD_FL_SOURCE;
+	adv7181->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&adv7181->subdev.entity, 1, &adv7181->pad, 0);
+	if (ret < 0)
+		goto err_power_off;
+#endif
+
+	ret = v4l2_async_register_subdev(&adv7181->subdev);
+	if (ret) {
+		dev_err(dev, "v4l2 async register subdev failed\n");
+		goto err_clean_entity;
+	}
+
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+	pm_runtime_idle(dev);
+
+	return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&adv7181->subdev.entity);
+#endif
+err_power_off:
+	__adv7181_power_off(adv7181);
+err_destroy_mutex:
+	mutex_destroy(&adv7181->mutex);
+
+	return ret;
+}
+
+static int adv7181_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct adv7181 *adv7181 = to_adv7181(sd);
+
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&adv7181->mutex);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		__adv7181_power_off(adv7181);
+	pm_runtime_set_suspended(&client->dev);
+
+	return 0;
+}
+
+static const struct i2c_device_id adv7181_id[] = {
+	{"adv7181", 0},
+	{},
+};
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id adv7181_of_match[] = {
+	{ .compatible = "adi,adv7181" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, adv7181_of_match);
+#endif
+
+static struct i2c_driver adv7181_i2c_driver = {
+	.driver = {
+		.name = "adv7181",
+		.pm = &adv7181_pm_ops,
+		.of_match_table = adv7181_of_match
+	},
+	.probe		= adv7181_probe,
+	.remove		= adv7181_remove,
+	.id_table	= adv7181_id,
+};
+
+module_i2c_driver(adv7181_i2c_driver);
+
+MODULE_DESCRIPTION("adv7181 sensor driver");
+MODULE_LICENSE("GPL v2");

From 82f4463e7ef725427c59c6d53cee127f8b53c475 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Thu, 28 Jun 2018 10:32:44 +0800
Subject: [PATCH 0018/1852] ARM: rk3308_linux_aarch32[_debug]_defconfig: enable
 KERNEL_LZ4

Compress kernel use LZ4 for faster boot time.
zImage larger 15~20%, but save about 75% time. For example:
             size(byte) time(s)
zImage (gz)  2891776    0.177
zImage (lz4) 3334144    0.042

Change-Id: I6a65569bbfc41eb63ee4154df26d055af7aa4ce7
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 1 +
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index c72571d51e4e2..099793896ea65 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -1,4 +1,5 @@
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZ4=y
 CONFIG_DEFAULT_HOSTNAME="localhost"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 8bd80726f41b5..cd0f49323385f 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -1,4 +1,5 @@
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZ4=y
 CONFIG_DEFAULT_HOSTNAME="localhost"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y

From 19b40633dea14cdaeb2f35aa670cd5b93fe73b1a Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 2 Jul 2018 18:46:21 +0800
Subject: [PATCH 0019/1852] ARM: rk3308_linux_aarch32[_debug]_defconfig: enable
 UACCESS_WITH_MEMCPY

unixbench fstime read faster 52%

Change-Id: I0655db883610d4b2b7d12f279b1df414a2c2d6c4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 1 +
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 099793896ea65..41d9b5f1362f5 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -32,6 +32,7 @@ CONFIG_HZ_1000=y
 CONFIG_THUMB2_KERNEL=y
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
 CONFIG_CMDLINE="coherent_pool=0 user_debug=31"
 CONFIG_CMDLINE_EXTEND=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index cd0f49323385f..85d8c4f871bc7 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -32,6 +32,7 @@ CONFIG_HZ_1000=y
 CONFIG_THUMB2_KERNEL=y
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
 CONFIG_CMDLINE="coherent_pool=0 loglevel=0"
 CONFIG_CMDLINE_EXTEND=y

From 3a53fbc99f006020efa8a0030dc8034ceed9af93 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 2 Jul 2018 18:52:17 +0800
Subject: [PATCH 0020/1852] ARM: rk3308_linux_aarch32[_debug]_defconfig:
 disable CPU_SW_DOMAIN_PAN

unixbench fstime read faster 9%

Change-Id: Id94cd5e2953202cb0a30c5bee61896b9bdd70a3f
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 1 +
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 41d9b5f1362f5..09c998d81521e 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -30,6 +30,7 @@ CONFIG_ARM_PSCI=y
 CONFIG_PREEMPT=y
 CONFIG_HZ_1000=y
 CONFIG_THUMB2_KERNEL=y
+# CONFIG_CPU_SW_DOMAIN_PAN is not set
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
 CONFIG_UACCESS_WITH_MEMCPY=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 85d8c4f871bc7..dc2a6f51b8d16 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -30,6 +30,7 @@ CONFIG_ARM_PSCI=y
 CONFIG_PREEMPT=y
 CONFIG_HZ_1000=y
 CONFIG_THUMB2_KERNEL=y
+# CONFIG_CPU_SW_DOMAIN_PAN is not set
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
 CONFIG_UACCESS_WITH_MEMCPY=y

From 35397d8f54962ac3cc0672cd25dfdf76b59654f1 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 29 Jun 2018 10:37:14 +0800
Subject: [PATCH 0021/1852] ASoC: rk3308_codec: using BIST mode switching
 during loopback

This patch using BIST mode switching to fix the glitches
during loopback and reset ADCs.

Change-Id: Icb9dbd6557736fe555d9f8296369571e78bc6844
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 52 ++++++++++++++++++++++++++++++---
 1 file changed, 48 insertions(+), 4 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 2dfe046b0aead..8ce989f211f1d 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -54,6 +54,7 @@
 #define CODEC_DRV_NAME			"rk3308-acodec"
 
 #define ADC_LR_GROUP_MAX		4
+#define ADC_STABLE_MS			20
 #define DEBUG_POP_ALWAYS		0
 #define ENABLE_AGC			0
 #define HPDET_POLL_MS			2000
@@ -192,6 +193,8 @@ static const DECLARE_TLV_DB_RANGE(rk3308_codec_adc_3_8_mic_gain_tlv,
 	3, 3, TLV_DB_MINMAX_ITEM(2000, 2000),
 );
 
+static bool has_loopback(int loopback_grp);
+
 static int rk3308_codec_hpout_l_get_tlv(struct snd_kcontrol *kcontrol,
 					struct snd_ctl_elem_value *ucontrol);
 static int rk3308_codec_hpout_l_put_tlv(struct snd_kcontrol *kcontrol,
@@ -957,6 +960,30 @@ static int rk3308_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
 #endif
 		} else {
 #if !DEBUG_POP_ALWAYS
+			if (has_loopback(rk3308->loopback_grp) &&
+			    (rk3308->dac_output == DAC_LINEOUT)) {
+				int type = ADC_TYPE_LOOPBACK;
+				int idx, grp;
+
+				/*
+				 * Switch to dummy BIST mode (BIST keep reset
+				 * now) to keep the zero input data in I2S bus.
+				 *
+				 * It may cause the glitch if we hold the ADC
+				 * digtital i2s module in codec.
+				 */
+				for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_L_CH_BIST_MSK,
+							   RK3308_ADC_L_CH_BIST_SINE);
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_R_CH_BIST_MSK,
+							   RK3308_ADC_R_CH_BIST_SINE);
+				}
+			}
+
 			if (rk3308->dac_output == DAC_LINEOUT)
 				rk3308_speaker_ctl(rk3308, 1);
 			else if (rk3308->dac_output == DAC_HPOUT)
@@ -2920,13 +2947,30 @@ static void rk3308_codec_loopback_work(struct work_struct *work)
 {
 	struct rk3308_codec_priv *rk3308 =
 		container_of(work, struct rk3308_codec_priv, loopback_work.work);
+	int type = ADC_TYPE_LOOPBACK;
+	int idx, grp;
 
 	/* Reset ADC quickly */
-	rk3308_codec_alc_disable(rk3308, ADC_TYPE_LOOPBACK);
-	rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_LOOPBACK);
+	rk3308_codec_alc_disable(rk3308, type);
+	rk3308_codec_adc_ana_disable(rk3308, type);
 
-	rk3308_codec_alc_enable(rk3308, ADC_TYPE_LOOPBACK);
-	rk3308_codec_adc_ana_enable(rk3308, ADC_TYPE_LOOPBACK);
+	rk3308_codec_alc_enable(rk3308, type);
+	rk3308_codec_adc_ana_enable(rk3308, type);
+
+	/* Waiting ADCs are stable */
+	msleep(ADC_STABLE_MS);
+
+	/* Recover normal mode after enable ADCs */
+	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		regmap_update_bits(rk3308->regmap,
+				   RK3308_ADC_DIG_CON03(grp),
+				   RK3308_ADC_L_CH_BIST_MSK,
+				   RK3308_ADC_L_CH_NORMAL_LEFT);
+		regmap_update_bits(rk3308->regmap,
+				   RK3308_ADC_DIG_CON03(grp),
+				   RK3308_ADC_R_CH_BIST_MSK,
+				   RK3308_ADC_R_CH_NORMAL_RIGHT);
+	}
 }
 
 static irqreturn_t rk3308_codec_hpdet_isr(int irq, void *data)

From 097dca52a45ba19a900599f7e894699f52840539 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 29 Jun 2018 20:20:27 +0800
Subject: [PATCH 0022/1852] ASoC: rk3308_codec: operate loopback ADCs during
 LINEOUT

We need to operate loopback ADCs during LINEOUT enable
or disable that it make ensure enable ADCs more smoothly.

Therefore, we don't need to reset loopback ADCs in
rk3308_codec_loopback_work(), and separete reinit-mics
from adc_ana_enable().

Change-Id: Id26dd5ad00c527be47a706df58c435f12d46c281
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 163 ++++++++++++++++++++++++++++----
 1 file changed, 143 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 8ce989f211f1d..2ae3d2a911023 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -53,6 +53,7 @@
 
 #define CODEC_DRV_NAME			"rk3308-acodec"
 
+#define ADC_GRP_SKIP_MAGIC		0x1001
 #define ADC_LR_GROUP_MAX		4
 #define ADC_STABLE_MS			20
 #define DEBUG_POP_ALWAYS		0
@@ -159,6 +160,7 @@ struct rk3308_codec_priv {
 
 	bool enable_all_adcs;
 	bool hp_plugged;
+	bool loopback_dacs_enabled;
 	bool no_deep_low_power;
 	struct delayed_work hpdet_work;
 	struct delayed_work loopback_work;
@@ -571,7 +573,18 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 		if (idx >= max_grps)
 			return false;
 
-		*grp = rk3308->i2s_sdis[idx];
+		if ((!rk3308->loopback_dacs_enabled) &&
+		    has_loopback(rk3308->loopback_grp) &&
+		    rk3308->loopback_grp == idx) {
+			/*
+			 * Ths loopback DACs are closed, and specify the
+			 * loopback ADCs.
+			 */
+			*grp = ADC_GRP_SKIP_MAGIC;
+		} else {
+			*grp = rk3308->i2s_sdis[idx];
+		}
+
 		dev_dbg(rk3308->plat_dev,
 			"ADC_TYPE_NORMAL, idx: %d, get grp: %d\n",
 			idx, *grp);
@@ -1994,6 +2007,9 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * These values are estimated
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON05(grp),
 				   RK3308_AGC_LO_8BITS_AGC_MAX_MSK,
 				   0x26);
@@ -2029,6 +2045,9 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * By default is 44.1KHz for sample.
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON04(grp),
 				   RK3308_AGC_APPROX_RATE_MSK,
 				   RK3308_AGC_APPROX_RATE_44_1K);
@@ -2041,6 +2060,9 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 #if ENABLE_AGC
 	/* 3. Set ACODEC_ALC_DIG_CON9[6] to 0x1, to enable the ALC module */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
 				   RK3308_AGC_FUNC_SEL_MSK,
 				   RK3308_AGC_FUNC_SEL_EN);
@@ -2056,6 +2078,9 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * to 0x3, to enable the ALC module to control the gain of PGA.
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
 				   RK3308_ADC_ALCL_CON_GAIN_PGAL_MSK |
 				   RK3308_ADC_ALCR_CON_GAIN_PGAR_MSK,
@@ -2114,6 +2139,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 1 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_WORK |
@@ -2123,6 +2151,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 2 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_WORK |
@@ -2132,6 +2163,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 3 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_WORK |
@@ -2143,6 +2177,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	usleep_range(200, 250);	/* estimated value */
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 1 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_WORK |
@@ -2152,6 +2189,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 2 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_WORK |
@@ -2161,6 +2201,9 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		/* vendor step 3 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_WORK |
@@ -2195,7 +2238,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 		/* Keep other ADCs as MIC-IN */
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
 			/* The groups without line-in are >= 1 */
-			if (grp < 1)
+			if (grp < 1 || grp == ADC_GRP_SKIP_MAGIC)
 				continue;
 
 			regmap_update_bits(rk3308->regmap,
@@ -2207,6 +2250,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 		}
 	} else {
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+			if (grp == ADC_GRP_SKIP_MAGIC)
+				continue;
+
 			regmap_update_bits(rk3308->regmap,
 					   RK3308_ADC_ANA_CON07(grp),
 					   RK3308_ADC_CH1_IN_SEL_MSK |
@@ -2222,6 +2268,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 	 * buffer, and to end the initialization of MIC
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_UNMUTE |
 				   RK3308_ADC_CH2_MIC_UNMUTE,
@@ -2234,6 +2283,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 	 * of audio
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON06(grp),
 				   RK3308_ADC_CURRENT_MSK,
 				   RK3308_ADC_CURRENT_EN);
@@ -2241,6 +2293,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 4*/
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_BUF_REF_EN |
 				   RK3308_ADC_CH2_BUF_REF_EN,
@@ -2250,6 +2305,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 5 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_EN |
 				   RK3308_ADC_CH2_MIC_EN,
@@ -2259,6 +2317,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 6 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_EN |
 				   RK3308_ADC_CH2_ALC_EN,
@@ -2268,6 +2329,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 7 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_CLK_EN |
 				   RK3308_ADC_CH2_CLK_EN,
@@ -2277,6 +2341,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 8 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_EN |
 				   RK3308_ADC_CH2_ADC_EN,
@@ -2286,6 +2353,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 9 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_WORK |
 				   RK3308_ADC_CH2_ADC_WORK,
@@ -2295,6 +2365,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 10 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_WORK |
 				   RK3308_ADC_CH2_ALC_WORK,
@@ -2304,6 +2377,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 11 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_WORK |
 				   RK3308_ADC_CH2_MIC_WORK,
@@ -2317,6 +2393,9 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 14 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC)
+			continue;
+
 		regmap_read(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
 			    &agc_func_en);
 		if (rk3308->adc_zerocross ||
@@ -2337,11 +2416,6 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 		}
 	}
 
-	/* vendor step 15, re-init mic */
-	rk3308_codec_adc_reinit_mics(rk3308, type);
-
-	/* vendor step 16 Begin recording */
-
 	return 0;
 }
 
@@ -2448,6 +2522,7 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308)
 
 	rk3308_codec_alc_enable(rk3308, type);
 	rk3308_codec_adc_ana_enable(rk3308, type);
+	rk3308_codec_adc_reinit_mics(rk3308, type);
 
 	if (rk3308->adc_grp0_using_linein) {
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON03(0),
@@ -2621,6 +2696,10 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
 {
 	struct snd_soc_codec *codec = dai->codec;
 	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct snd_pcm_str *playback_str =
+			&substream->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK];
+	int type = ADC_TYPE_LOOPBACK;
+	int idx, grp;
 	int ret;
 
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
@@ -2634,6 +2713,33 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
 		if (ret < 0)
 			return ret;
 
+		/* Check the DACs are opened */
+		if (playback_str->substream_opened) {
+			rk3308->loopback_dacs_enabled = true;
+			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_L_CH_BIST_MSK,
+						   RK3308_ADC_L_CH_NORMAL_LEFT);
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_R_CH_BIST_MSK,
+						   RK3308_ADC_R_CH_NORMAL_RIGHT);
+			}
+		} else {
+			rk3308->loopback_dacs_enabled = false;
+			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_L_CH_BIST_MSK,
+						   RK3308_ADC_L_CH_BIST_SINE);
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_R_CH_BIST_MSK,
+						   RK3308_ADC_R_CH_BIST_SINE);
+			}
+		}
+
 		rk3308_codec_open_capture(rk3308);
 		rk3308_codec_adc_dig_config(rk3308, params);
 	}
@@ -2646,18 +2752,38 @@ static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
 {
 	struct snd_soc_codec *codec = dai->codec;
 	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	int type = ADC_TYPE_LOOPBACK;
+	int idx, grp;
 
 	if (has_loopback(rk3308->loopback_grp) &&
 	    rk3308->dac_output == DAC_LINEOUT &&
-	    substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
-	    cmd == SNDRV_PCM_TRIGGER_START) {
-		struct snd_pcm_str *capture_str =
-			&substream->pcm->streams[SNDRV_PCM_STREAM_CAPTURE];
-
-		if (capture_str->substream_opened)
-			queue_delayed_work(system_power_efficient_wq,
-					   &rk3308->loopback_work,
-					   msecs_to_jiffies(LOOPBACK_HANDLE_MS));
+	    substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		if (cmd == SNDRV_PCM_TRIGGER_START) {
+			struct snd_pcm_str *capture_str =
+				&substream->pcm->streams[SNDRV_PCM_STREAM_CAPTURE];
+
+			if (capture_str->substream_opened)
+				queue_delayed_work(system_power_efficient_wq,
+						   &rk3308->loopback_work,
+						   msecs_to_jiffies(LOOPBACK_HANDLE_MS));
+		} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+			/*
+			 * Switch to dummy bist mode to kick the glitch during disable
+			 * ADCs and keep zero input data
+			 */
+			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_L_CH_BIST_MSK,
+						   RK3308_ADC_L_CH_BIST_SINE);
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_R_CH_BIST_MSK,
+						   RK3308_ADC_R_CH_BIST_SINE);
+			}
+			rk3308_codec_alc_disable(rk3308, ADC_TYPE_LOOPBACK);
+			rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_LOOPBACK);
+		}
 	}
 
 	return 0;
@@ -2950,10 +3076,7 @@ static void rk3308_codec_loopback_work(struct work_struct *work)
 	int type = ADC_TYPE_LOOPBACK;
 	int idx, grp;
 
-	/* Reset ADC quickly */
-	rk3308_codec_alc_disable(rk3308, type);
-	rk3308_codec_adc_ana_disable(rk3308, type);
-
+	/* Prepare loopback ADCs */
 	rk3308_codec_alc_enable(rk3308, type);
 	rk3308_codec_adc_ana_enable(rk3308, type);
 

From f23fff2c263f19db0b7c2f15ab05d20edb18d7cc Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Fri, 29 Jun 2018 15:33:35 +0800
Subject: [PATCH 0023/1852] clk: rockchip: rk3399: remove the flag
 ROCKCHIP_PLL_SYNC_RATE for GPLL

Change-Id: I569a6033fdd9902c8a48b7aa93b1785ebac426ae
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 3bff8b9b2bb3d..6dea2bdd711cd 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -315,7 +315,7 @@ static struct rockchip_pll_clock rk3399_pll_clks[] __initdata = {
 		     RK3399_PLL_CON(27), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
 #endif
 	[gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RK3399_PLL_CON(32),
-		     RK3399_PLL_CON(35), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
+		     RK3399_PLL_CON(35), 8, 31, 0, rk3399_pll_rates),
 	[npll] = PLL(pll_rk3399, PLL_NPLL, "npll",  mux_pll_p, 0, RK3399_PLL_CON(40),
 		     RK3399_PLL_CON(43), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates),
 	[vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll",  mux_pll_p, 0, RK3399_PLL_CON(48),

From 84b2fd49fc4c982e606a46d5d4799d1a7713b4d9 Mon Sep 17 00:00:00 2001
From: Hans Yang <yhx@rock-chips.com>
Date: Mon, 2 Jul 2018 16:16:31 +0800
Subject: [PATCH 0024/1852] arm: configs:
 rk3308_linux_aarch32[_debug]_defconfig: enable initrd support

Change-Id: I1c222681dcb998efd45cf8d59e5592375d356f66
Signed-off-by: Hans Yang <yhx@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 6 ++++++
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 09c998d81521e..973cee6d34827 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -7,6 +7,12 @@ CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_CPU_MAX_BUF_SHIFT=0
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_BASE_FULL is not set
 CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index dc2a6f51b8d16..04378de8971ce 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -7,6 +7,12 @@ CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_CPU_MAX_BUF_SHIFT=0
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_BASE_FULL is not set
 CONFIG_EMBEDDED=y

From 06514750dff246951256ca156ea28f5566355643 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Mon, 2 Jul 2018 19:46:12 +0800
Subject: [PATCH 0025/1852] ASoC: rockchip: vad: fix snd_pcm_vad_attached crash

This patch fix snd_pcm_vad_attached crash when using non-soc audio,
such as usb audio, pci audio. it is because substream private_data
in these types of audio framework means different values.

Change-Id: I5dcd3ea7de363bc3afc8d9879a2a37c6d6110a4a
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 08a7bdd8c620f..4233377065819 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -33,6 +33,7 @@
 #define ACODEC_REG_NUM	28
 #define VAD_SRAM_BUFFER_END	0xfffbfff8
 
+static struct snd_pcm_substream *vad_substream;
 static unsigned int voice_inactive_frames;
 module_param(voice_inactive_frames, uint, 0644);
 MODULE_PARM_DESC(voice_inactive_frames, "voice inactive frame count");
@@ -306,7 +307,8 @@ bool snd_pcm_vad_attached(struct snd_pcm_substream *substream)
 {
 	struct rockchip_vad *vad = NULL;
 
-	vad = substream_get_drvdata(substream);
+	if (vad_substream == substream)
+		vad = substream_get_drvdata(substream);
 
 	return vad ? true : false;
 }
@@ -572,6 +574,14 @@ static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
 	return ret;
 }
 
+static int rockchip_vad_pcm_startup(struct snd_pcm_substream *substream,
+				    struct snd_soc_dai *dai)
+{
+	vad_substream = substream;
+
+	return 0;
+}
+
 static void rockchip_vad_pcm_shutdown(struct snd_pcm_substream *substream,
 				      struct snd_soc_dai *dai)
 {
@@ -583,6 +593,8 @@ static void rockchip_vad_pcm_shutdown(struct snd_pcm_substream *substream,
 
 	rockchip_vad_enable_cpudai(substream);
 	rockchip_vad_setup(vad);
+
+	vad_substream = NULL;
 }
 
 static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
@@ -613,6 +625,7 @@ static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
 static struct snd_soc_dai_ops rockchip_vad_dai_ops = {
 	.hw_params = rockchip_vad_hw_params,
 	.shutdown = rockchip_vad_pcm_shutdown,
+	.startup = rockchip_vad_pcm_startup,
 	.trigger = rockchip_vad_trigger,
 };
 

From 9bd8ee1833cb9698991e5dd1939937573a61222f Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 3 Jul 2018 11:02:16 +0800
Subject: [PATCH 0026/1852] ASoC: rockchip: vad: add support for
 'rockchip,acodec-cfg'

rockchip,acodec-cfg: config acodec after voice activity detection.

Change-Id: I8786688df872e258dd96144130aaacdbf1d99ce3
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 Documentation/devicetree/bindings/sound/rockchip,vad.txt | 3 +++
 sound/soc/rockchip/rockchip_vad.c                        | 5 +++++
 2 files changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,vad.txt b/Documentation/devicetree/bindings/sound/rockchip,vad.txt
index 83ffa22608eb6..549a30216f835 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,vad.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,vad.txt
@@ -16,6 +16,9 @@ Required properties:
   - 1: begin to store the data after vad is enabled.
   - 2: don't store the data.
 
+Optional properties:
+- rockchip,acodec-cfg: boolean, config acodec after voice activity detection.
+
 Example for rk3308 VAD controller:
 
 vad: vad@ff3c0000 {
diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 4233377065819..291451d64629c 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -65,6 +65,7 @@ struct rockchip_vad {
 	u32 buffer_time; /* msec */
 	struct dentry *debugfs_dir;
 	void *buf;
+	bool acodec_cfg;
 };
 
 struct audio_src_addr_map {
@@ -421,6 +422,9 @@ static int rockchip_vad_config_acodec(struct snd_pcm_hw_params *params,
 	struct rockchip_vad *vad = snd_soc_codec_get_drvdata(codec);
 	unsigned int val = 0;
 
+	if (!vad->acodec_cfg)
+		return 0;
+
 	val = ACODEC_BASE + ACODEC_ADC_ANA_CON0;
 	regmap_write(vad->regmap, VAD_ID_ADDR, val);
 
@@ -742,6 +746,7 @@ static int rockchip_vad_probe(struct platform_device *pdev)
 
 	vad->dev = &pdev->dev;
 
+	vad->acodec_cfg = of_property_read_bool(np, "rockchip,acodec-cfg");
 	of_property_read_u32(np, "rockchip,mode", &vad->mode);
 	of_property_read_u32(np, "rockchip,det-channel", &vad->audio_chnl);
 	of_property_read_u32(np, "rockchip,buffer-time-ms", &vad->buffer_time);

From 295e66c501e502ea5199b839f947a23340f16c16 Mon Sep 17 00:00:00 2001
From: Wu Liangqing <wlq@rock-chips.com>
Date: Tue, 3 Jul 2018 09:52:53 +0800
Subject: [PATCH 0027/1852] arm64: dts: rockchip: px30-evb-ddr3-v10: vcc_3v0
 regulator-on-in-suspend

According to the hardware design, wifi and rmii cannot be powered off in
deepsleep

Change-Id: Id44ef9b31c34b6f12695dbf3fbb843950602ca71
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
index 2b34f7a39cfb8..17b6a0cd9dba4 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
@@ -438,7 +438,7 @@
 				regulator-initial-mode = <0x2>;
 				regulator-name = "vcc_3v0";
 				regulator-state-mem {
-					regulator-off-in-suspend;
+					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <3000000>;
 				};
 			};

From 8ceb88078734585e349a73030b392ba061f7176d Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Mon, 2 Jul 2018 18:26:16 +0800
Subject: [PATCH 0028/1852] input: touchscreen: gt1x: Fix some warnings
 reported by jenkins

Change-Id: Ibae24626d24d9a358285d9fd8693229b87e7a1e1
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/input/touchscreen/gt1x/gt1x.c         | 18 ++++------
 drivers/input/touchscreen/gt1x/gt1x_generic.c | 35 +------------------
 2 files changed, 8 insertions(+), 45 deletions(-)

diff --git a/drivers/input/touchscreen/gt1x/gt1x.c b/drivers/input/touchscreen/gt1x/gt1x.c
index 75896a9e6215a..337a4c2ac3433 100644
--- a/drivers/input/touchscreen/gt1x/gt1x.c
+++ b/drivers/input/touchscreen/gt1x/gt1x.c
@@ -373,25 +373,21 @@ static s32 gt1x_request_io_port(void)
 	ret = gpio_request(GTP_INT_PORT, "GTP_INT_IRQ");
 	if (ret < 0) {
 		GTP_ERROR("Failed to request GPIO:%d, ERRNO:%d", (s32) GTP_INT_PORT, ret);
-		ret = -ENODEV;
-	} else {
-		GTP_GPIO_AS_INT(GTP_INT_PORT);
-		gt1x_i2c_client->irq = GTP_INT_IRQ;
+		return ret;
 	}
 
+	GTP_GPIO_AS_INT(GTP_INT_PORT);
+	gt1x_i2c_client->irq = GTP_INT_IRQ;
+
 	ret = gpio_request(GTP_RST_PORT, "GTP_RST_PORT");
 	if (ret < 0) {
 		GTP_ERROR("Failed to request GPIO:%d, ERRNO:%d", (s32) GTP_RST_PORT, ret);
-		ret = -ENODEV;
-	}
-
-	GTP_GPIO_AS_INPUT(GTP_RST_PORT);
-	if (ret < 0) {
-		gpio_free(GTP_RST_PORT);
 		gpio_free(GTP_INT_PORT);
+		return ret;
 	}
 
-	return ret;
+	GTP_GPIO_AS_INPUT(GTP_RST_PORT);
+	return 0;
 }
 
 /**
diff --git a/drivers/input/touchscreen/gt1x/gt1x_generic.c b/drivers/input/touchscreen/gt1x/gt1x_generic.c
index fc7aa021a5234..98d2790949e73 100644
--- a/drivers/input/touchscreen/gt1x/gt1x_generic.c
+++ b/drivers/input/touchscreen/gt1x/gt1x_generic.c
@@ -504,35 +504,6 @@ s32 gt1x_i2c_read_dbl_check(u16 addr, u8 *buffer, s32 len)
 	return 1;
 }
 
-/**
- * gt1x_get_info - Get information from ic, such as resolution and
- * int trigger type
- * Return    <0: i2c failed, 0: i2c ok
- */
-s32 gt1x_get_info(void)
-{
-	u8 opr_buf[4] = { 0 };
-	s32 ret = 0;
-
-	ret = gt1x_i2c_read(GTP_REG_CONFIG_DATA + 1, opr_buf, 4);
-	if (ret < 0) {
-		return ret;
-	}
-
-	gt1x_abs_x_max = (opr_buf[1] << 8) + opr_buf[0];
-	gt1x_abs_y_max = (opr_buf[3] << 8) + opr_buf[2];
-
-	ret = gt1x_i2c_read(GTP_REG_CONFIG_DATA + 6, opr_buf, 1);
-	if (ret < 0) {
-		return ret;
-	}
-	gt1x_int_type = opr_buf[0] & 0x03;
-
-	GTP_INFO("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x", gt1x_abs_x_max, gt1x_abs_y_max, gt1x_int_type);
-
-	return 0;
-}
-
 /**
  * gt1x_send_cfg - Send gt1x_config Function.
  * @config: pointer of the configuration array.
@@ -843,7 +814,7 @@ s32 gt1x_read_version(struct gt1x_version_info *ver_info)
 	u8 product_id[5] = { 0 };
 	u8 sensor_id = 0;
 	u8 match_opt = 0;
-	int i, retry = 3;
+	unsigned int i, retry = 3;
 	u8 checksum = 0;
 
 	GTP_DEBUG_FUNC();
@@ -944,9 +915,7 @@ static s32 gt1x_enter_sleep(void)
 	gt1x_power_switch(SWITCH_OFF);
 	return 0;
 #else
-	int ret;
 	{
-		int ret;
 		s32 retry = 0;
 		if (gt1x_wakeup_level == 1) {	/* high level wakeup */
 			GTP_GPIO_OUTPUT(GTP_INT_PORT, 0);
@@ -956,8 +925,6 @@ static s32 gt1x_enter_sleep(void)
 		while (retry++ < 3) {
 			if (!gt1x_send_cmd(GTP_CMD_SLEEP, 0)) {
 				GTP_INFO("Enter sleep mode!");
-				if (ret < 0)
-					GTP_ERROR("disable power-supply error %d\n", ret);
 				return 0;
 			}
 			msleep(10);

From 7cedc224c6b1b17702fcf6ab3bcbee91cbc4925c Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Mon, 2 Jul 2018 18:27:04 +0800
Subject: [PATCH 0029/1852] input: touchscreen: gt1x: Change msleep to
 usleep_range for small msecs

The msleep < 20ms can sleep for up to 20ms, see:
Documentation/timers/timers-howto.txt.

Change msleep to usleep_range for this case.

Change-Id: Ibb680b766b6c7317fc1f13dfda7457ef771b4272
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/input/touchscreen/gt1x/gt1x_extents.c |  2 +-
 drivers/input/touchscreen/gt1x/gt1x_generic.c | 16 ++++++++--------
 drivers/input/touchscreen/gt1x/gt1x_update.c  |  8 ++++----
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/input/touchscreen/gt1x/gt1x_extents.c b/drivers/input/touchscreen/gt1x/gt1x_extents.c
index aeb5f2e5649db..dc16c91ad98a2 100644
--- a/drivers/input/touchscreen/gt1x/gt1x_extents.c
+++ b/drivers/input/touchscreen/gt1x/gt1x_extents.c
@@ -145,7 +145,7 @@ int gesture_enter_doze(void)
 			GTP_DEBUG("Working in doze mode!");
 			return 0;
 		}
-		msleep(10);
+		usleep_range(10000, 11000);
 	}
 	GTP_ERROR("Send doze cmd failed.");
 	return -1;
diff --git a/drivers/input/touchscreen/gt1x/gt1x_generic.c b/drivers/input/touchscreen/gt1x/gt1x_generic.c
index 98d2790949e73..c7a036b645697 100644
--- a/drivers/input/touchscreen/gt1x/gt1x_generic.c
+++ b/drivers/input/touchscreen/gt1x/gt1x_generic.c
@@ -455,7 +455,7 @@ static s32 gt1x_i2c_test(void)
 			return ret;
 		}
 
-		msleep(10);
+		usleep_range(10000, 11000);
 		GTP_ERROR("Hardware Info:%08X", hw_info);
 		GTP_ERROR("I2c failed%d.", retry);
 	}
@@ -489,7 +489,7 @@ s32 gt1x_i2c_read_dbl_check(u16 addr, u8 *buffer, s32 len)
 		return ret;
 	}
 
-	msleep(5);
+	usleep_range(5000, 6000);
 	memset(confirm_buf, 0, sizeof(confirm_buf));
 	ret = gt1x_i2c_read(addr, confirm_buf, len);
 	if (ret < 0) {
@@ -660,9 +660,9 @@ void gt1x_select_addr(void)
 {
 	GTP_GPIO_OUTPUT(GTP_RST_PORT, 0);
 	GTP_GPIO_OUTPUT(GTP_INT_PORT, gt1x_i2c_client->addr == 0x14);
-	msleep(2);
+	usleep_range(2000, 3000);
 	GTP_GPIO_OUTPUT(GTP_RST_PORT, 1);
-	msleep(2);
+	usleep_range(2000, 3000);
 }
 
 static s32 gt1x_set_reset_status(void)
@@ -786,7 +786,7 @@ s32 gt1x_reset_guitar(void)
 		return ret;
 #else
 	gt1x_select_addr();
-	msleep(8);     /* must >= 6ms */
+	usleep_range(8000, 9000);     /* must >= 6ms */
 #endif
 
 	/* int synchronization */
@@ -920,14 +920,14 @@ static s32 gt1x_enter_sleep(void)
 		if (gt1x_wakeup_level == 1) {	/* high level wakeup */
 			GTP_GPIO_OUTPUT(GTP_INT_PORT, 0);
 		}
-		msleep(5);
+		usleep_range(5000, 6000);
 
 		while (retry++ < 3) {
 			if (!gt1x_send_cmd(GTP_CMD_SLEEP, 0)) {
 				GTP_INFO("Enter sleep mode!");
 				return 0;
 			}
-			msleep(10);
+			usleep_range(10000, 11000);
 		}
 
 		GTP_ERROR("Enter sleep mode failed.");
@@ -970,7 +970,7 @@ static s32 gt1x_wakeup_sleep(void)
 		{
 			/* wake up through int port */
 			GTP_GPIO_OUTPUT(GTP_INT_PORT, gt1x_wakeup_level);
-			msleep(5);
+			usleep_range(5000, 6000);
 
 			/* Synchronize int IO */
 			GTP_GPIO_OUTPUT(GTP_INT_PORT, 0);
diff --git a/drivers/input/touchscreen/gt1x/gt1x_update.c b/drivers/input/touchscreen/gt1x/gt1x_update.c
index 50ba3c208cdc4..295462a80a203 100644
--- a/drivers/input/touchscreen/gt1x/gt1x_update.c
+++ b/drivers/input/touchscreen/gt1x/gt1x_update.c
@@ -1026,7 +1026,7 @@ int gt1x_burn_subsystem(struct fw_subsystem_info *subsystem)
 		}
 		burn_state = ERROR;
 		wait_time = 200;
-		msleep(5);
+		usleep_range(5000, 6000);
 
 		while (wait_time-- > 0) {
 			u8 confirm = 0x55;
@@ -1035,7 +1035,7 @@ int gt1x_burn_subsystem(struct fw_subsystem_info *subsystem)
 			if (ret < 0) {
 				continue;
 			}
-			msleep(5);
+			usleep_range(5000, 6000);
 			ret = gt1x_i2c_read(0x8022, &confirm, 1);
 			if (ret < 0) {
 				continue;
@@ -1148,7 +1148,7 @@ int gt1x_read_flash(u32 addr, int length)
 	wait_time = 200;
 	while (wait_time > 0) {
 		wait_time--;
-		msleep(5);
+		usleep_range(5000, 6000);
 		ret = gt1x_i2c_read_dbl_check(0x8022, buffer, 1);
 		if (ret) {
 			continue;
@@ -1257,7 +1257,7 @@ int gt1x_error_erase(void)
 	    wait_time = 200;
 	    while (wait_time > 0) {
 		    wait_time--;
-		    msleep(5);
+		    usleep_range(5000, 6000);
 		    ret = gt1x_i2c_read_dbl_check(0x8022, buffer, 1);
 		    if (ret)
 			    continue;

From 181227ee5bc9d700306aeda3828c3c794681a7fd Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Mon, 2 Jul 2018 18:28:06 +0800
Subject: [PATCH 0030/1852] input: touchscreen: gt1x: Make power ctrl optional

Some boards don't need to control power supply.
Let's make it optional.

Change-Id: Ifd72a7c3704cdc0df4f2d2096278a6b58f925e8d
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/input/touchscreen/gt1x/gt1x.c         |  4 ++
 drivers/input/touchscreen/gt1x/gt1x_generic.c | 58 +++++++++----------
 2 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/drivers/input/touchscreen/gt1x/gt1x.c b/drivers/input/touchscreen/gt1x/gt1x.c
index 337a4c2ac3433..c14581113b927 100644
--- a/drivers/input/touchscreen/gt1x/gt1x.c
+++ b/drivers/input/touchscreen/gt1x/gt1x.c
@@ -316,6 +316,10 @@ static int gt1x_parse_dt(struct device *dev)
 	if (PTR_ERR(vdd_ana) == -ENODEV) {
 		GTP_ERROR("vdd_ana not specified, fallback to power-supply");
 		vdd_ana = devm_regulator_get_optional(dev, "power");
+		if (PTR_ERR(vdd_ana) == -ENODEV) {
+			GTP_ERROR("power not specified, ignore power ctrl");
+			vdd_ana = NULL;
+		}
 	}
 	if (IS_ERR(vdd_ana)) {
 		GTP_ERROR("regulator get of vdd_ana/power-supply failed");
diff --git a/drivers/input/touchscreen/gt1x/gt1x_generic.c b/drivers/input/touchscreen/gt1x/gt1x_generic.c
index c7a036b645697..893815090ad8c 100644
--- a/drivers/input/touchscreen/gt1x/gt1x_generic.c
+++ b/drivers/input/touchscreen/gt1x/gt1x_generic.c
@@ -439,7 +439,6 @@ s32 _do_i2c_write(struct i2c_msg *msg, u16 addr, u8 *buffer, s32 len)
 	return 0;
 }
 
-#if !GTP_POWER_CTRL_SLEEP
 #if !GTP_ESD_PROTECT
 static s32 gt1x_i2c_test(void)
 {
@@ -463,7 +462,6 @@ static s32 gt1x_i2c_test(void)
 	return ERROR_RETRY;
 }
 #endif
-#endif
 
 /**
  * gt1x_i2c_read_dbl_check - read twice and double check
@@ -911,29 +909,30 @@ s32 gt1x_get_chip_type(void)
  */
 static s32 gt1x_enter_sleep(void)
 {
+	s32 retry = 0;
+
 #if GTP_POWER_CTRL_SLEEP
-	gt1x_power_switch(SWITCH_OFF);
-	return 0;
-#else
-	{
-		s32 retry = 0;
-		if (gt1x_wakeup_level == 1) {	/* high level wakeup */
-			GTP_GPIO_OUTPUT(GTP_INT_PORT, 0);
-		}
-		usleep_range(5000, 6000);
+	if (!gt1x_power_switch(SWITCH_OFF)) {
+		GTP_INFO("Enter sleep mode by poweroff");
+		return 0;
+	}
+#endif
 
-		while (retry++ < 3) {
-			if (!gt1x_send_cmd(GTP_CMD_SLEEP, 0)) {
-				GTP_INFO("Enter sleep mode!");
-				return 0;
-			}
-			usleep_range(10000, 11000);
-		}
+	if (gt1x_wakeup_level == 1) {	/* high level wakeup */
+		GTP_GPIO_OUTPUT(GTP_INT_PORT, 0);
+	}
+	usleep_range(5000, 6000);
 
-		GTP_ERROR("Enter sleep mode failed.");
-		return -1;
+	while (retry++ < 3) {
+		if (!gt1x_send_cmd(GTP_CMD_SLEEP, 0)) {
+			GTP_INFO("Enter sleep mode!");
+			return 0;
+		}
+		usleep_range(10000, 11000);
 	}
-#endif
+
+	GTP_ERROR("Enter sleep mode failed.");
+	return -1;
 }
 
 /**
@@ -943,20 +942,22 @@ static s32 gt1x_enter_sleep(void)
  */
 static s32 gt1x_wakeup_sleep(void)
 {
-#if !GTP_POWER_CTRL_SLEEP
 	u8 retry = 0;
 	s32 ret = -1;
 	int flag = 0;
-#endif
+
 	GTP_DEBUG("Wake up begin.");
 	gt1x_irq_disable();
 
 #if GTP_POWER_CTRL_SLEEP	/* power manager unit control the procedure */
-	gt1x_power_switch(SWITCH_ON);
-	gt1x_power_reset();
-	GTP_INFO("Wakeup by poweron");
-	return 0;
-#else /* gesture wakeup & int port wakeup */
+	if (!gt1x_power_switch(SWITCH_ON)) {
+		gt1x_power_reset();
+		GTP_INFO("Wakeup by poweron");
+		return 0;
+	}
+#endif
+
+	/* gesture wakeup & int port wakeup */
 	while (retry++ < 2) {
 #if GTP_GESTURE_WAKEUP
 		if (gesture_enabled) {
@@ -1003,7 +1004,6 @@ static s32 gt1x_wakeup_sleep(void)
 		GTP_INFO("Wake up end.");
 		return 0;
 	}
-#endif /* END GTP_POWER_CTRL_SLEEP */
 }
 
 /**

From 73bcd3814084ba03155912bed5d9b9c9a47dfb2c Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 08:52:48 +0800
Subject: [PATCH 0031/1852] media: rockchip: isp: add pclk_isp_wrap for rk3399

Change-Id: I7e6e4bd0a7760cd4a4d35fcb7758a2194c491afc
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 25 ++++++++++++----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index b91253ef82936..0fa9723be0be3 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -342,7 +342,7 @@ static int rkisp1_fwnode_parse(struct device *dev,
 	 * not be get in here
 	 */
 	if (vep->bus_type != V4L2_MBUS_BT656 &&
-		vep->bus_type != V4L2_MBUS_PARALLEL)
+	    vep->bus_type != V4L2_MBUS_PARALLEL)
 		return 0;
 
 	rk_asd->mbus.flags = bus->flags;
@@ -444,6 +444,7 @@ static const char * const rk3399_isp_clks[] = {
 	"hclk_isp",
 	"aclk_isp_wrap",
 	"hclk_isp_wrap",
+	"pclk_isp_wrap"
 };
 
 static const struct isp_match_data rk3288_isp_match_data = {
@@ -508,7 +509,8 @@ static void rkisp1_disable_sys_clk(struct rkisp1_device *rkisp1_dev)
 	int i;
 
 	for (i = rkisp1_dev->clk_size - 1; i >= 0; i--)
-		clk_disable_unprepare(rkisp1_dev->clks[i]);
+		if (!IS_ERR(rkisp1_dev->clks[i]))
+			clk_disable_unprepare(rkisp1_dev->clks[i]);
 }
 
 static int rkisp1_enable_sys_clk(struct rkisp1_device *rkisp1_dev)
@@ -516,14 +518,17 @@ static int rkisp1_enable_sys_clk(struct rkisp1_device *rkisp1_dev)
 	int i, ret = -EINVAL;
 
 	for (i = 0; i < rkisp1_dev->clk_size; i++) {
-		ret = clk_prepare_enable(rkisp1_dev->clks[i]);
-		if (ret < 0)
-			goto err;
+		if (!IS_ERR(rkisp1_dev->clks[i])) {
+			ret = clk_prepare_enable(rkisp1_dev->clks[i]);
+			if (ret < 0)
+				goto err;
+		}
 	}
 	return 0;
 err:
 	for (--i; i >= 0; --i)
-		clk_disable_unprepare(rkisp1_dev->clks[i]);
+		if (!IS_ERR(rkisp1_dev->clks[i]))
+			clk_disable_unprepare(rkisp1_dev->clks[i]);
 	return ret;
 }
 
@@ -557,7 +562,7 @@ static int rkisp1_iommu_init(struct rkisp1_device *rkisp1_dev)
 	if (ret)
 		goto err;
 	if (!common_iommu_setup_dma_ops(rkisp1_dev->dev, 0x10000000,
-	    SZ_2G, rkisp1_dev->domain->ops)) {
+					SZ_2G, rkisp1_dev->domain->ops)) {
 		iommu_detach_device(rkisp1_dev->domain, rkisp1_dev->dev);
 		ret = -ENODEV;
 		goto err;
@@ -618,10 +623,8 @@ static int rkisp1_plat_probe(struct platform_device *pdev)
 	for (i = 0; i < match_data->size; i++) {
 		struct clk *clk = devm_clk_get(dev, match_data->clks[i]);
 
-		if (IS_ERR(clk)) {
-			dev_err(dev, "failed to get %s\n", match_data->clks[i]);
-			return PTR_ERR(clk);
-		}
+		if (IS_ERR(clk))
+			dev_dbg(dev, "failed to get %s\n", match_data->clks[i]);
 		isp_dev->clks[i] = clk;
 	}
 	isp_dev->clk_size = match_data->size;

From 9ec14b3ca22d6c7bea425fa9bdb43543ab64c453 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Thu, 28 Jun 2018 16:51:43 +0800
Subject: [PATCH 0032/1852] fiq_debugger: Add proc_fops like other tty drivers

The userspace might check tty information in proc fs.

Change-Id: If3e81aacbc7948dd3000606702296bc2b76bec09
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 .../android/fiq_debugger/fiq_debugger.c       | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/staging/android/fiq_debugger/fiq_debugger.c b/drivers/staging/android/fiq_debugger/fiq_debugger.c
index 98bfb26bbcea3..997e4c2f8a60f 100644
--- a/drivers/staging/android/fiq_debugger/fiq_debugger.c
+++ b/drivers/staging/android/fiq_debugger/fiq_debugger.c
@@ -35,6 +35,7 @@
 #include <linux/tty_flip.h>
 #include <linux/wakelock.h>
 #include <linux/ptrace.h>
+#include <linux/proc_fs.h>
 
 #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
 #include <linux/rockchip/rockchip_sip.h>
@@ -1205,6 +1206,39 @@ static void fiq_tty_poll_put_char(struct tty_driver *driver, int line, char ch)
 }
 #endif
 
+#ifdef CONFIG_PROC_FS
+static int fiq_tty_proc_show(struct seq_file *m, void *v)
+{
+	struct tty_driver *driver = m->private;
+	struct fiq_debugger_state **states = driver->driver_state;
+	struct fiq_debugger_state *state;
+	int i;
+
+	seq_puts(m, "fiq-debugger driver\n");
+	for (i = 0; i < MAX_FIQ_DEBUGGER_PORTS; i++) {
+		state = states[i];
+
+		seq_printf(m, "%d:", i);
+		seq_printf(m, " state:%d", state->console_enable);
+		seq_putc(m, '\n');
+	}
+	return 0;
+}
+
+static int fiq_tty_proc_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, fiq_tty_proc_show, PDE_DATA(inode));
+}
+
+static const struct file_operations fiq_tty_proc_fops = {
+	.owner		= THIS_MODULE,
+	.open		= fiq_tty_proc_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+#endif
+
 static const struct tty_port_operations fiq_tty_port_ops;
 
 static const struct tty_operations fiq_tty_driver_ops = {
@@ -1217,6 +1251,9 @@ static const struct tty_operations fiq_tty_driver_ops = {
 	.poll_get_char = fiq_tty_poll_get_char,
 	.poll_put_char = fiq_tty_poll_put_char,
 #endif
+#ifdef CONFIG_PROC_FS
+	.proc_fops = &fiq_tty_proc_fops,
+#endif
 };
 
 static int fiq_debugger_tty_init(void)

From 5d2173f20a23cbbb0d8224e6c8bad5fff1ef1871 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Mon, 2 Jul 2018 09:53:55 +0800
Subject: [PATCH 0033/1852] arm64: dts: rockchip: default disable cpu
 opp-1200000000 for rk3308

According to P45 of <<Rockchip RK3308 Datasheet V1.0-20180313>>,
the max voltage for Logic is 1.1V, so for many boards which
Core_VDD and Logic_VDD share the same power supply, the ARM
core voltage will be limited to 1.1V, that can only guarantee
the cpu to run at the max freq of 1008MHZ.

As for board which Core_VDD and Logic_VDD use independent
power supply, the cpu can run a higher freq up to 1296MHZ
with higher Core_VDD power supply, you can eanble it in
your board dts.

Change-Id: I69777aa5bee797e609d9ea122f3502347930b631
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index b8bee600686b1..276247d21db92 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -126,6 +126,7 @@
 			opp-hz = /bits/ 64 <1200000000>;
 			opp-microvolt = <1200000 1200000 1340000>;
 			clock-latency-ns = <40000>;
+			status = "disabled";
 		};
 		opp-1296000000 {
 			opp-hz = /bits/ 64 <1296000000>;

From 99def551d2b480f32823b0d2db03131a92e3dacf Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 2 Jul 2018 17:34:17 +0800
Subject: [PATCH 0034/1852] tools: ffs-aio-example: add superspeed descriptors

This patch adds superspeed descriptors in device
applications to support USB 3.0 ffs gadget.

Change-Id: I5a364c935b1d30e2e929791ff16a34cf0d1c87e1
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 .../multibuff/device_app/aio_multibuff.c      | 68 ++++++++++++++++++-
 .../simple/device_app/aio_simple.c            | 68 ++++++++++++++++++-
 2 files changed, 134 insertions(+), 2 deletions(-)

diff --git a/tools/usb/ffs-aio-example/multibuff/device_app/aio_multibuff.c b/tools/usb/ffs-aio-example/multibuff/device_app/aio_multibuff.c
index aaca1f44e7886..8643beaf25a12 100644
--- a/tools/usb/ffs-aio-example/multibuff/device_app/aio_multibuff.c
+++ b/tools/usb/ffs-aio-example/multibuff/device_app/aio_multibuff.c
@@ -57,16 +57,30 @@ static const struct {
 	struct usb_functionfs_descs_head_v2 header;
 	__le32 fs_count;
 	__le32 hs_count;
+	__le32 ss_count;
+	__le32 os_count;
 	struct {
 		struct usb_interface_descriptor intf;
 		struct usb_endpoint_descriptor_no_audio bulk_sink;
 		struct usb_endpoint_descriptor_no_audio bulk_source;
 	} __attribute__ ((__packed__)) fs_descs, hs_descs;
+	struct {
+		struct usb_interface_descriptor intf;
+		struct usb_endpoint_descriptor_no_audio sink;
+		struct usb_ss_ep_comp_descriptor sink_comp;
+		struct usb_endpoint_descriptor_no_audio source;
+		struct usb_ss_ep_comp_descriptor source_comp;
+	} __attribute__ ((__packed__)) ss_descs;
+	struct usb_os_desc_header os_header;
+	struct usb_ext_compat_desc os_desc;
+
 } __attribute__ ((__packed__)) descriptors = {
 	.header = {
 		.magic = htole32(FUNCTIONFS_DESCRIPTORS_MAGIC_V2),
 		.flags = htole32(FUNCTIONFS_HAS_FS_DESC |
-				     FUNCTIONFS_HAS_HS_DESC),
+				 FUNCTIONFS_HAS_HS_DESC |
+				 FUNCTIONFS_HAS_SS_DESC |
+				 FUNCTIONFS_HAS_MS_OS_DESC),
 		.length = htole32(sizeof(descriptors)),
 	},
 	.fs_count = htole32(3),
@@ -115,6 +129,58 @@ static const struct {
 			.wMaxPacketSize = htole16(512),
 		},
 	},
+	.ss_count = htole32(5),
+	.ss_descs = {
+		.intf = {
+			.bLength = sizeof(descriptors.ss_descs.intf),
+			.bDescriptorType = USB_DT_INTERFACE,
+			.bInterfaceNumber = 0,
+			.bNumEndpoints = 2,
+			.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
+			.iInterface = 1,
+		},
+		.sink = {
+			.bLength = sizeof(descriptors.ss_descs.sink),
+			.bDescriptorType = USB_DT_ENDPOINT,
+			.bEndpointAddress = 1 | USB_DIR_IN,
+			.bmAttributes = USB_ENDPOINT_XFER_BULK,
+			.wMaxPacketSize = htole16(1024),
+		},
+		.sink_comp = {
+			.bLength = sizeof(descriptors.ss_descs.sink_comp),
+			.bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+			.bMaxBurst = 4,
+		},
+		.source = {
+			.bLength = sizeof(descriptors.ss_descs.source),
+			.bDescriptorType = USB_DT_ENDPOINT,
+			.bEndpointAddress = 2 | USB_DIR_OUT,
+			.bmAttributes = USB_ENDPOINT_XFER_BULK,
+			.wMaxPacketSize = htole16(1024),
+		},
+		.source_comp = {
+			.bLength = sizeof(descriptors.ss_descs.source_comp),
+			.bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+			.bMaxBurst = 4,
+		},
+	},
+	.os_count = htole32(1),
+	.os_header = {
+		.interface = htole32(1),
+		.dwLength = htole32(sizeof(descriptors.os_header) +
+			    sizeof(descriptors.os_desc)),
+		.bcdVersion = htole32(1),
+		.wIndex = htole32(4),
+		.bCount = htole32(1),
+		.Reserved = htole32(0),
+	},
+	.os_desc = {
+		.bFirstInterfaceNumber = 0,
+		.Reserved1 = htole32(1),
+		.CompatibleID = {0},
+		.SubCompatibleID = {0},
+		.Reserved2 = {0},
+	},
 };
 
 #define STR_INTERFACE "AIO Test"
diff --git a/tools/usb/ffs-aio-example/simple/device_app/aio_simple.c b/tools/usb/ffs-aio-example/simple/device_app/aio_simple.c
index 1f44a29818bf0..51574379ff913 100644
--- a/tools/usb/ffs-aio-example/simple/device_app/aio_simple.c
+++ b/tools/usb/ffs-aio-example/simple/device_app/aio_simple.c
@@ -55,16 +55,30 @@ static const struct {
 	struct usb_functionfs_descs_head_v2 header;
 	__le32 fs_count;
 	__le32 hs_count;
+	__le32 ss_count;
+	__le32 os_count;
 	struct {
 		struct usb_interface_descriptor intf;
 		struct usb_endpoint_descriptor_no_audio bulk_sink;
 		struct usb_endpoint_descriptor_no_audio bulk_source;
 	} __attribute__ ((__packed__)) fs_descs, hs_descs;
+	struct {
+		struct usb_interface_descriptor intf;
+		struct usb_endpoint_descriptor_no_audio sink;
+		struct usb_ss_ep_comp_descriptor sink_comp;
+		struct usb_endpoint_descriptor_no_audio source;
+		struct usb_ss_ep_comp_descriptor source_comp;
+	} __attribute__ ((__packed__)) ss_descs;
+	struct usb_os_desc_header os_header;
+	struct usb_ext_compat_desc os_desc;
+
 } __attribute__ ((__packed__)) descriptors = {
 	.header = {
 		.magic = htole32(FUNCTIONFS_DESCRIPTORS_MAGIC_V2),
 		.flags = htole32(FUNCTIONFS_HAS_FS_DESC |
-				     FUNCTIONFS_HAS_HS_DESC),
+				 FUNCTIONFS_HAS_HS_DESC |
+				 FUNCTIONFS_HAS_SS_DESC |
+				 FUNCTIONFS_HAS_MS_OS_DESC),
 		.length = htole32(sizeof(descriptors)),
 	},
 	.fs_count = htole32(3),
@@ -113,6 +127,58 @@ static const struct {
 			.wMaxPacketSize = htole16(512),
 		},
 	},
+	.ss_count = htole32(5),
+	.ss_descs = {
+		.intf = {
+			.bLength = sizeof(descriptors.ss_descs.intf),
+			.bDescriptorType = USB_DT_INTERFACE,
+			.bInterfaceNumber = 0,
+			.bNumEndpoints = 2,
+			.bInterfaceClass = USB_CLASS_VENDOR_SPEC,
+			.iInterface = 1,
+		},
+		.sink = {
+			.bLength = sizeof(descriptors.ss_descs.sink),
+			.bDescriptorType = USB_DT_ENDPOINT,
+			.bEndpointAddress = 1 | USB_DIR_IN,
+			.bmAttributes = USB_ENDPOINT_XFER_BULK,
+			.wMaxPacketSize = htole16(1024),
+		},
+		.sink_comp = {
+			.bLength = sizeof(descriptors.ss_descs.sink_comp),
+			.bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+			.bMaxBurst = 4,
+		},
+		.source = {
+			.bLength = sizeof(descriptors.ss_descs.source),
+			.bDescriptorType = USB_DT_ENDPOINT,
+			.bEndpointAddress = 2 | USB_DIR_OUT,
+			.bmAttributes = USB_ENDPOINT_XFER_BULK,
+			.wMaxPacketSize = htole16(1024),
+		},
+		.source_comp = {
+			.bLength = sizeof(descriptors.ss_descs.source_comp),
+			.bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+			.bMaxBurst = 4,
+		},
+	},
+	.os_count = htole32(1),
+	.os_header = {
+		.interface = htole32(1),
+		.dwLength = htole32(sizeof(descriptors.os_header) +
+			    sizeof(descriptors.os_desc)),
+		.bcdVersion = htole32(1),
+		.wIndex = htole32(4),
+		.bCount = htole32(1),
+		.Reserved = htole32(0),
+	},
+	.os_desc = {
+		.bFirstInterfaceNumber = 0,
+		.Reserved1 = htole32(1),
+		.CompatibleID = {0},
+		.SubCompatibleID = {0},
+		.Reserved2 = {0},
+	},
 };
 
 #define STR_INTERFACE "AIO Test"

From 19201ffc5fc3302d2719728461a48eb7e18f89b6 Mon Sep 17 00:00:00 2001
From: Li Huang <putin.li@rock-chips.com>
Date: Tue, 3 Jul 2018 20:17:46 +0800
Subject: [PATCH 0035/1852] video/rockchip: rga2: Fixup some situation will
 cause rga flush timeout on rk3368.

Change-Id: I40efd7ab0500bcf0b628060b4491acc56ce609b0
Signed-off-by: Li Huang <putin.li@rock-chips.com>
---
 drivers/video/rockchip/rga2/rga2_drv.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/video/rockchip/rga2/rga2_drv.c b/drivers/video/rockchip/rga2/rga2_drv.c
index 22bbd3852aa40..cb3ec1950cf07 100644
--- a/drivers/video/rockchip/rga2/rga2_drv.c
+++ b/drivers/video/rockchip/rga2/rga2_drv.c
@@ -1058,14 +1058,11 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
 						printk("dst : aw=%d ah=%d vw=%d vh=%d  \n",
 							req_first.dst.act_w, req_first.dst.act_h, req_first.dst.vir_w, req_first.dst.vir_h);
 					} else {
-						if ((req_first.src.act_w != req_first.dst.act_w)
-								|| (req_first.src.act_h != req_first.dst.act_h)) {
 							req_first.src.act_w = MIN(320, MIN(req_first.src.act_w, req_first.dst.act_w));
 							req_first.src.act_h = MIN(240, MIN(req_first.src.act_h, req_first.dst.act_h));
 							req_first.dst.act_w = req_first.src.act_w;
 							req_first.dst.act_h = req_first.src.act_h;
 							ret = rga2_blit_sync(session, &req_first);
-						}
 					}
 				}
 				ret = rga2_blit_async(session, &req);

From d7a7232ea484aabfe11621d4326298ea8d9c55a2 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Fri, 29 Jun 2018 19:12:20 +0800
Subject: [PATCH 0036/1852] arm64: dts: rockchip: add voice module dts for
 rk3308

Change-Id: I12135f6add05b926ad466d2edfef4189e47d5a32
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../rk3308-voice-module-board-v10.dts         | 22 +++++++++++++++++++
 2 files changed, 23 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-voice-module-board-v10.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index ce0a5a0d137c7..6a9298751c288 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb-dmic-i2s-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb-dmic-pdm-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb-dmic-pdm-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-fpga.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-voice-module-board-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-voice-module-board-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-voice-module-board-v10.dts
new file mode 100644
index 0000000000000..9f94c3579ff76
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3308-voice-module-board-v10.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include "arm/rk3308-voice-module-board-v10-aarch32.dts"
+
+/ {
+	model = "Rockchip RK3308 Voice Module Board V10";
+	compatible = "rockchip,rk3308-voice-module-board-v10", "rockchip,rk3308";
+};
+
+&ramoops_mem {
+	reg = <0x0 0x110000 0x0 0xf0000>;
+};
+
+&ramoops {
+	record-size = <0x0 0x30000>;
+	console-size = <0x0 0xc0000>;
+};

From 54eb6f29aa447d08082e22aac4ff64087564eda3 Mon Sep 17 00:00:00 2001
From: Alex Zhao <zzc@rock-chips.com>
Date: Wed, 4 Jul 2018 17:26:33 +0800
Subject: [PATCH 0037/1852] net: wireless: rockchip_wlan: rtl8723bs: enable
 CONFIG_RESUME_IN_WORKQUEUE

Wifi does not take up system wake-up time

Change-Id: Ib226479f6146431d4ce2292f60a03e177d5874d1
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
index 46880dd7954aa..0ff707fd37eb7 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
@@ -1349,6 +1349,7 @@ EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
 # default setting for Power control
 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
 EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE
 # default setting for Special function
 ARCH := arm
 CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-

From 865cdd62ebf21708e05dbd660f7b22ee3dfa406c Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 09:49:21 +0800
Subject: [PATCH 0038/1852] media: i2c: add ov4689 driver for rkisp1

Change-Id: Ie47a347dcdfaeec112140a14d9cd005ff048f64e
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/Kconfig             |   12 +
 drivers/media/i2c/Makefile            |    1 +
 drivers/media/i2c/ov4689.c            | 1162 +++++++++++++++++++++++++
 drivers/media/i2c/soc_camera/Makefile |    2 +-
 4 files changed, 1176 insertions(+), 1 deletion(-)
 create mode 100644 drivers/media/i2c/ov4689.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 6f9568cd1705d..fb3d143fbfd3c 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -525,6 +525,18 @@ config VIDEO_OV2685
 	  To compile this driver as a module, choose M here: the
 	  module will be called ov2685.
 
+config VIDEO_OV4689
+	tristate "OmniVision OV4689 sensor support"
+	depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER
+	depends on MEDIA_CAMERA_SUPPORT
+	select V4L2_FWNODE
+	---help---
+	  This is a Video4Linux2 sensor-level driver for the OmniVision
+	  OV4689 camera.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ov4689.
+
 config VIDEO_OV5647
 	tristate "OmniVision OV5647 sensor support"
 	depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 720e5b35443a1..707b505648f32 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_UPD64031A) += upd64031a.o
 obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o
 
 obj-$(CONFIG_VIDEO_OV2685) += ov2685.o
+obj-$(CONFIG_VIDEO_OV4689) += ov4689.o
 obj-$(CONFIG_VIDEO_OV5695) += ov5695.o
 obj-$(CONFIG_VIDEO_OV7640) += ov7640.o
 obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c
new file mode 100644
index 0000000000000..819b856e98722
--- /dev/null
+++ b/drivers/media/i2c/ov4689.c
@@ -0,0 +1,1162 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ov4689 driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+#include <linux/pinctrl/consumer.h>
+
+#ifndef V4L2_CID_DIGITAL_GAIN
+#define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
+#endif
+
+/* 45Mhz * 4 Binning */
+#define OV4689_PIXEL_RATE		(45 * 1000 * 1000 * 4)
+#define OV4689_XVCLK_FREQ		24000000
+
+#define CHIP_ID				0x004688
+#define OV4689_REG_CHIP_ID		0x300a
+
+#define OV4689_REG_CTRL_MODE		0x0100
+#define OV4689_MODE_SW_STANDBY		0x0
+#define OV4689_MODE_STREAMING		BIT(0)
+
+#define OV4689_REG_EXPOSURE		0x3500
+#define	OV4689_EXPOSURE_MIN		4
+#define	OV4689_EXPOSURE_STEP		1
+#define OV4689_VTS_MAX			0x7fff
+
+#define OV4689_REG_GAIN_H		0x3508
+#define OV4689_REG_GAIN_L		0x3509
+#define OV4689_GAIN_H_MASK		0x07
+#define OV4689_GAIN_H_SHIFT		8
+#define OV4689_GAIN_L_MASK		0xff
+#define OV4689_GAIN_MIN			0x10
+#define OV4689_GAIN_MAX			0xf8
+#define OV4689_GAIN_STEP		1
+#define OV4689_GAIN_DEFAULT		0x10
+
+#define OV4689_REG_TEST_PATTERN		0x5040
+#define OV4689_TEST_PATTERN_ENABLE	0x80
+#define OV4689_TEST_PATTERN_DISABLE	0x0
+
+#define OV4689_REG_VTS			0x380e
+
+#define REG_NULL			0xFFFF
+
+#define OV4689_REG_VALUE_08BIT		1
+#define OV4689_REG_VALUE_16BIT		2
+#define OV4689_REG_VALUE_24BIT		3
+
+#define OV4689_LANES			2
+#define OV4689_BITS_PER_SAMPLE		10
+
+#define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
+#define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"
+
+static const char * const ov4689_supply_names[] = {
+	"avdd",		/* Analog power */
+	"dovdd",	/* Digital I/O power */
+	"dvdd",		/* Digital core power */
+};
+
+#define OV4689_NUM_SUPPLIES ARRAY_SIZE(ov4689_supply_names)
+
+struct regval {
+	u16 addr;
+	u8 val;
+};
+
+struct ov4689_mode {
+	u32 width;
+	u32 height;
+	u32 max_fps;
+	u32 hts_def;
+	u32 vts_def;
+	u32 exp_def;
+	const struct regval *reg_list;
+};
+
+struct ov4689 {
+	struct i2c_client	*client;
+	struct clk		*xvclk;
+	struct gpio_desc	*reset_gpio;
+	struct gpio_desc	*pwdn_gpio;
+	struct regulator_bulk_data supplies[OV4689_NUM_SUPPLIES];
+
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*pins_default;
+	struct pinctrl_state	*pins_sleep;
+
+	struct v4l2_subdev	subdev;
+	struct media_pad	pad;
+	struct v4l2_ctrl_handler ctrl_handler;
+	struct v4l2_ctrl	*exposure;
+	struct v4l2_ctrl	*anal_gain;
+	struct v4l2_ctrl	*digi_gain;
+	struct v4l2_ctrl	*hblank;
+	struct v4l2_ctrl	*vblank;
+	struct v4l2_ctrl	*test_pattern;
+	struct mutex		mutex;
+	bool			streaming;
+	const struct ov4689_mode *cur_mode;
+};
+
+#define to_ov4689(sd) container_of(sd, struct ov4689, subdev)
+
+/*
+ * Xclk 24Mhz
+ */
+static const struct regval ov4689_global_regs[] = {
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 24Mhz
+ * max_framerate 30fps
+ * mipi_datarate per lane 1008Mbps
+ */
+static const struct regval ov4689_2688x1520_regs[] = {
+	{0x0103, 0x01},
+	{0x3638, 0x00},
+	{0x0300, 0x00},
+	{0x0302, 0x2a},
+	{0x0303, 0x00},
+	{0x0304, 0x03},
+	{0x030b, 0x00},
+	{0x030d, 0x1e},
+	{0x030e, 0x04},
+	{0x030f, 0x01},
+	{0x0312, 0x01},
+	{0x031e, 0x00},
+	{0x3000, 0x20},
+	{0x3002, 0x00},
+	{0x3018, 0x32},
+	{0x3020, 0x93},
+	{0x3021, 0x03},
+	{0x3022, 0x01},
+	{0x3031, 0x0a},
+	{0x303f, 0x0c},
+	{0x3305, 0xf1},
+	{0x3307, 0x04},
+	{0x3309, 0x29},
+	{0x3500, 0x00},
+	{0x3501, 0x60},
+	{0x3502, 0x00},
+	{0x3503, 0x04},
+	{0x3504, 0x00},
+	{0x3505, 0x00},
+	{0x3506, 0x00},
+	{0x3507, 0x00},
+	{0x3508, 0x00},
+	{0x3509, 0x80},
+	{0x350a, 0x00},
+	{0x350b, 0x00},
+	{0x350c, 0x00},
+	{0x350d, 0x00},
+	{0x350e, 0x00},
+	{0x350f, 0x80},
+	{0x3510, 0x00},
+	{0x3511, 0x00},
+	{0x3512, 0x00},
+	{0x3513, 0x00},
+	{0x3514, 0x00},
+	{0x3515, 0x80},
+	{0x3516, 0x00},
+	{0x3517, 0x00},
+	{0x3518, 0x00},
+	{0x3519, 0x00},
+	{0x351a, 0x00},
+	{0x351b, 0x80},
+	{0x351c, 0x00},
+	{0x351d, 0x00},
+	{0x351e, 0x00},
+	{0x351f, 0x00},
+	{0x3520, 0x00},
+	{0x3521, 0x80},
+	{0x3522, 0x08},
+	{0x3524, 0x08},
+	{0x3526, 0x08},
+	{0x3528, 0x08},
+	{0x352a, 0x08},
+	{0x3602, 0x00},
+	{0x3603, 0x40},
+	{0x3604, 0x02},
+	{0x3605, 0x00},
+	{0x3606, 0x00},
+	{0x3607, 0x00},
+	{0x3609, 0x12},
+	{0x360a, 0x40},
+	{0x360c, 0x08},
+	{0x360f, 0xe5},
+	{0x3608, 0x8f},
+	{0x3611, 0x00},
+	{0x3613, 0xf7},
+	{0x3616, 0x58},
+	{0x3619, 0x99},
+	{0x361b, 0x60},
+	{0x361c, 0x7a},
+	{0x361e, 0x79},
+	{0x361f, 0x02},
+	{0x3632, 0x00},
+	{0x3633, 0x10},
+	{0x3634, 0x10},
+	{0x3635, 0x10},
+	{0x3636, 0x15},
+	{0x3646, 0x86},
+	{0x364a, 0x0b},
+	{0x3700, 0x17},
+	{0x3701, 0x22},
+	{0x3703, 0x10},
+	{0x370a, 0x37},
+	{0x3705, 0x00},
+	{0x3706, 0x63},
+	{0x3709, 0x3c},
+	{0x370b, 0x01},
+	{0x370c, 0x30},
+	{0x3710, 0x24},
+	{0x3711, 0x0c},
+	{0x3716, 0x00},
+	{0x3720, 0x28},
+	{0x3729, 0x7b},
+	{0x372a, 0x84},
+	{0x372b, 0xbd},
+	{0x372c, 0xbc},
+	{0x372e, 0x52},
+	{0x373c, 0x0e},
+	{0x373e, 0x33},
+	{0x3743, 0x10},
+	{0x3744, 0x88},
+	{0x3745, 0xc0},
+	{0x374a, 0x43},
+	{0x374c, 0x00},
+	{0x374e, 0x23},
+	{0x3751, 0x7b},
+	{0x3752, 0x84},
+	{0x3753, 0xbd},
+	{0x3754, 0xbc},
+	{0x3756, 0x52},
+	{0x375c, 0x00},
+	{0x3760, 0x00},
+	{0x3761, 0x00},
+	{0x3762, 0x00},
+	{0x3763, 0x00},
+	{0x3764, 0x00},
+	{0x3767, 0x04},
+	{0x3768, 0x04},
+	{0x3769, 0x08},
+	{0x376a, 0x08},
+	{0x376b, 0x20},
+	{0x376c, 0x00},
+	{0x376d, 0x00},
+	{0x376e, 0x00},
+	{0x3773, 0x00},
+	{0x3774, 0x51},
+	{0x3776, 0xbd},
+	{0x3777, 0xbd},
+	{0x3781, 0x18},
+	{0x3783, 0x25},
+	{0x3798, 0x1b},
+	{0x3800, 0x00},
+	{0x3801, 0x08},
+	{0x3802, 0x00},
+	{0x3803, 0x04},
+	{0x3804, 0x0a},
+	{0x3805, 0x97},
+	{0x3806, 0x05},
+	{0x3807, 0xfb},
+	{0x3808, 0x0a},
+	{0x3809, 0x80},
+	{0x380a, 0x05},
+	{0x380b, 0xf0},
+	{0x380c, 0x0a},
+	{0x380d, 0x18},
+	{0x380e, 0x06},
+	{0x380f, 0x12},
+	{0x3810, 0x00},
+	{0x3811, 0x08},
+	{0x3812, 0x00},
+	{0x3813, 0x04},
+	{0x3814, 0x01},
+	{0x3815, 0x01},
+	{0x3819, 0x01},
+	{0x3820, 0x00},
+	{0x3821, 0x06},
+	{0x3829, 0x00},
+	{0x382a, 0x01},
+	{0x382b, 0x01},
+	{0x382d, 0x7f},
+	{0x3830, 0x04},
+	{0x3836, 0x01},
+	{0x3837, 0x00},
+	{0x3841, 0x02},
+	{0x3846, 0x08},
+	{0x3847, 0x07},
+	{0x3d85, 0x36},
+	{0x3d8c, 0x71},
+	{0x3d8d, 0xcb},
+	{0x3f0a, 0x00},
+	{0x4000, 0xf1},
+	{0x4001, 0x40},
+	{0x4002, 0x04},
+	{0x4003, 0x14},
+	{0x400e, 0x00},
+	{0x4011, 0x00},
+	{0x401a, 0x00},
+	{0x401b, 0x00},
+	{0x401c, 0x00},
+	{0x401d, 0x00},
+	{0x401f, 0x00},
+	{0x4020, 0x00},
+	{0x4021, 0x10},
+	{0x4022, 0x07},
+	{0x4023, 0xcf},
+	{0x4024, 0x09},
+	{0x4025, 0x60},
+	{0x4026, 0x09},
+	{0x4027, 0x6f},
+	{0x4028, 0x00},
+	{0x4029, 0x02},
+	{0x402a, 0x06},
+	{0x402b, 0x04},
+	{0x402c, 0x02},
+	{0x402d, 0x02},
+	{0x402e, 0x0e},
+	{0x402f, 0x04},
+	{0x4302, 0xff},
+	{0x4303, 0xff},
+	{0x4304, 0x00},
+	{0x4305, 0x00},
+	{0x4306, 0x00},
+	{0x4308, 0x02},
+	{0x4500, 0x6c},
+	{0x4501, 0xc4},
+	{0x4502, 0x40},
+	{0x4503, 0x01},
+	{0x4601, 0xa7},
+	{0x4800, 0x04},
+	{0x4813, 0x08},
+	{0x481f, 0x40},
+	{0x4829, 0x78},
+	{0x4837, 0x10},
+	{0x4b00, 0x2a},
+	{0x4b0d, 0x00},
+	{0x4d00, 0x04},
+	{0x4d01, 0x42},
+	{0x4d02, 0xd1},
+	{0x4d03, 0x93},
+	{0x4d04, 0xf5},
+	{0x4d05, 0xc1},
+	{0x5000, 0xf3},
+	{0x5001, 0x11},
+	{0x5004, 0x00},
+	{0x500a, 0x00},
+	{0x500b, 0x00},
+	{0x5032, 0x00},
+	{0x5040, 0x00},
+	{0x5050, 0x0c},
+	{0x5500, 0x00},
+	{0x5501, 0x10},
+	{0x5502, 0x01},
+	{0x5503, 0x0f},
+	{0x8000, 0x00},
+	{0x8001, 0x00},
+	{0x8002, 0x00},
+	{0x8003, 0x00},
+	{0x8004, 0x00},
+	{0x8005, 0x00},
+	{0x8006, 0x00},
+	{0x8007, 0x00},
+	{0x8008, 0x00},
+	{0x3638, 0x00},
+	{REG_NULL, 0x00},
+};
+
+static const struct ov4689_mode supported_modes[] = {
+	{
+		.width = 2688,
+		.height = 1520,
+		.max_fps = 30,
+		.exp_def = 0x0600,
+		.hts_def = 0x0a18,
+		.vts_def = 0x0612,
+		.reg_list = ov4689_2688x1520_regs,
+	},
+};
+
+#define OV4689_LINK_FREQ_500MHZ		500000000
+static const s64 link_freq_menu_items[] = {
+	OV4689_LINK_FREQ_500MHZ
+};
+
+static const char * const ov4689_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bar Type 1",
+	"Vertical Color Bar Type 2",
+	"Vertical Color Bar Type 3",
+	"Vertical Color Bar Type 4"
+};
+
+/* Write registers up to 4 at a time */
+static int ov4689_write_reg(struct i2c_client *client, u16 reg,
+			    u32 len, u32 val)
+{
+	u32 buf_i, val_i;
+	u8 buf[6];
+	u8 *val_p;
+	__be32 val_be;
+
+	if (len > 4)
+		return -EINVAL;
+
+	buf[0] = reg >> 8;
+	buf[1] = reg & 0xff;
+
+	val_be = cpu_to_be32(val);
+	val_p = (u8 *)&val_be;
+	buf_i = 2;
+	val_i = 4 - len;
+
+	while (val_i < 4)
+		buf[buf_i++] = val_p[val_i++];
+
+	if (i2c_master_send(client, buf, len + 2) != len + 2)
+		return -EIO;
+
+	return 0;
+}
+
+static int ov4689_write_array(struct i2c_client *client,
+			      const struct regval *regs)
+{
+	u32 i;
+	int ret = 0;
+
+	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+		ret = ov4689_write_reg(client, regs[i].addr,
+				       OV4689_REG_VALUE_08BIT, regs[i].val);
+
+	return ret;
+}
+
+/* Read registers up to 4 at a time */
+static int ov4689_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
+			   u32 *val)
+{
+	struct i2c_msg msgs[2];
+	u8 *data_be_p;
+	__be32 data_be = 0;
+	__be16 reg_addr_be = cpu_to_be16(reg);
+	int ret;
+
+	if (len > 4 || !len)
+		return -EINVAL;
+
+	data_be_p = (u8 *)&data_be;
+	/* Write register address */
+	msgs[0].addr = client->addr;
+	msgs[0].flags = 0;
+	msgs[0].len = 2;
+	msgs[0].buf = (u8 *)&reg_addr_be;
+
+	/* Read data from register */
+	msgs[1].addr = client->addr;
+	msgs[1].flags = I2C_M_RD;
+	msgs[1].len = len;
+	msgs[1].buf = &data_be_p[4 - len];
+
+	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+	if (ret != ARRAY_SIZE(msgs))
+		return -EIO;
+
+	*val = be32_to_cpu(data_be);
+
+	return 0;
+}
+
+static int ov4689_get_reso_dist(const struct ov4689_mode *mode,
+				struct v4l2_mbus_framefmt *framefmt)
+{
+	return abs(mode->width - framefmt->width) +
+	       abs(mode->height - framefmt->height);
+}
+
+static const struct ov4689_mode *
+ov4689_find_best_fit(struct v4l2_subdev_format *fmt)
+{
+	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
+	int dist;
+	int cur_best_fit = 0;
+	int cur_best_fit_dist = -1;
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
+		dist = ov4689_get_reso_dist(&supported_modes[i], framefmt);
+		if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
+			cur_best_fit_dist = dist;
+			cur_best_fit = i;
+		}
+	}
+
+	return &supported_modes[cur_best_fit];
+}
+
+static int ov4689_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct ov4689 *ov4689 = to_ov4689(sd);
+	const struct ov4689_mode *mode;
+	s64 h_blank, vblank_def;
+
+	mutex_lock(&ov4689->mutex);
+
+	mode = ov4689_find_best_fit(fmt);
+	fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
+	fmt->format.width = mode->width;
+	fmt->format.height = mode->height;
+	fmt->format.field = V4L2_FIELD_NONE;
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
+#else
+		mutex_unlock(&ov4689->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		ov4689->cur_mode = mode;
+		h_blank = mode->hts_def - mode->width;
+		__v4l2_ctrl_modify_range(ov4689->hblank, h_blank,
+					 h_blank, 1, h_blank);
+		vblank_def = mode->vts_def - mode->height;
+		__v4l2_ctrl_modify_range(ov4689->vblank, vblank_def,
+					 OV4689_VTS_MAX - mode->height,
+					 1, vblank_def);
+	}
+
+	mutex_unlock(&ov4689->mutex);
+
+	return 0;
+}
+
+static int ov4689_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct ov4689 *ov4689 = to_ov4689(sd);
+	const struct ov4689_mode *mode = ov4689->cur_mode;
+
+	mutex_lock(&ov4689->mutex);
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+#else
+		mutex_unlock(&ov4689->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		fmt->format.width = mode->width;
+		fmt->format.height = mode->height;
+		fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
+		fmt->format.field = V4L2_FIELD_NONE;
+	}
+	mutex_unlock(&ov4689->mutex);
+
+	return 0;
+}
+
+static int ov4689_enum_mbus_code(struct v4l2_subdev *sd,
+				 struct v4l2_subdev_pad_config *cfg,
+				 struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index != 0)
+		return -EINVAL;
+	code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
+
+	return 0;
+}
+
+static int ov4689_enum_frame_sizes(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	if (fse->index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
+		return -EINVAL;
+
+	fse->min_width  = supported_modes[fse->index].width;
+	fse->max_width  = supported_modes[fse->index].width;
+	fse->max_height = supported_modes[fse->index].height;
+	fse->min_height = supported_modes[fse->index].height;
+
+	return 0;
+}
+
+static int ov4689_enable_test_pattern(struct ov4689 *ov4689, u32 pattern)
+{
+	u32 val;
+
+	if (pattern)
+		val = (pattern - 1) | OV4689_TEST_PATTERN_ENABLE;
+	else
+		val = OV4689_TEST_PATTERN_DISABLE;
+
+	return ov4689_write_reg(ov4689->client, OV4689_REG_TEST_PATTERN,
+				OV4689_REG_VALUE_08BIT, val);
+}
+
+static int __ov4689_start_stream(struct ov4689 *ov4689)
+{
+	int ret;
+
+	ret = ov4689_write_array(ov4689->client, ov4689_global_regs);
+	if (ret)
+		return ret;
+
+	ret = ov4689_write_array(ov4689->client, ov4689->cur_mode->reg_list);
+	if (ret)
+		return ret;
+
+	/* In case these controls are set before streaming */
+	mutex_unlock(&ov4689->mutex);
+	ret = v4l2_ctrl_handler_setup(&ov4689->ctrl_handler);
+	mutex_lock(&ov4689->mutex);
+	if (ret)
+		return ret;
+
+	return ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE,
+				OV4689_REG_VALUE_08BIT, OV4689_MODE_STREAMING);
+}
+
+static int __ov4689_stop_stream(struct ov4689 *ov4689)
+{
+	return ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE,
+				OV4689_REG_VALUE_08BIT, OV4689_MODE_SW_STANDBY);
+}
+
+static int ov4689_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct ov4689 *ov4689 = to_ov4689(sd);
+	struct i2c_client *client = ov4689->client;
+	int ret = 0;
+
+	mutex_lock(&ov4689->mutex);
+	on = !!on;
+	if (on == ov4689->streaming)
+		goto unlock_and_return;
+
+	if (on) {
+		ret = pm_runtime_get_sync(&client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = __ov4689_start_stream(ov4689);
+		if (ret) {
+			v4l2_err(sd, "start stream failed while write regs\n");
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+	} else {
+		__ov4689_stop_stream(ov4689);
+		pm_runtime_put(&client->dev);
+	}
+
+	ov4689->streaming = on;
+
+unlock_and_return:
+	mutex_unlock(&ov4689->mutex);
+
+	return ret;
+}
+
+/* Calculate the delay in us by clock rate and clock cycles */
+static inline u32 ov4689_cal_delay(u32 cycles)
+{
+	return DIV_ROUND_UP(cycles, OV4689_XVCLK_FREQ / 1000 / 1000);
+}
+
+static int __ov4689_power_on(struct ov4689 *ov4689)
+{
+	int ret;
+	u32 delay_us;
+	struct device *dev = &ov4689->client->dev;
+
+	if (!IS_ERR_OR_NULL(ov4689->pins_default)) {
+		ret = pinctrl_select_state(ov4689->pinctrl,
+					   ov4689->pins_default);
+		if (ret < 0)
+			dev_err(dev, "could not set pins\n");
+	}
+
+	ret = clk_prepare_enable(ov4689->xvclk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable xvclk\n");
+		return ret;
+	}
+
+	if (!IS_ERR(ov4689->reset_gpio))
+		gpiod_set_value_cansleep(ov4689->reset_gpio, 0);
+
+	ret = regulator_bulk_enable(OV4689_NUM_SUPPLIES, ov4689->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators\n");
+		goto disable_clk;
+	}
+
+	if (!IS_ERR(ov4689->reset_gpio))
+		gpiod_set_value_cansleep(ov4689->reset_gpio, 1);
+
+	usleep_range(500, 1000);
+	if (!IS_ERR(ov4689->pwdn_gpio))
+		gpiod_set_value_cansleep(ov4689->pwdn_gpio, 1);
+
+	/* 8192 cycles prior to first SCCB transaction */
+	delay_us = ov4689_cal_delay(8192);
+	usleep_range(delay_us, delay_us * 2);
+
+	return 0;
+
+disable_clk:
+	clk_disable_unprepare(ov4689->xvclk);
+
+	return ret;
+}
+
+static void __ov4689_power_off(struct ov4689 *ov4689)
+{
+	int ret;
+	struct device *dev = &ov4689->client->dev;
+
+	if (!IS_ERR(ov4689->pwdn_gpio))
+		gpiod_set_value_cansleep(ov4689->pwdn_gpio, 0);
+	clk_disable_unprepare(ov4689->xvclk);
+	if (!IS_ERR(ov4689->reset_gpio))
+		gpiod_set_value_cansleep(ov4689->reset_gpio, 0);
+	if (!IS_ERR_OR_NULL(ov4689->pins_sleep)) {
+		ret = pinctrl_select_state(ov4689->pinctrl,
+					   ov4689->pins_sleep);
+		if (ret < 0)
+			dev_dbg(dev, "could not set pins\n");
+	}
+	regulator_bulk_disable(OV4689_NUM_SUPPLIES, ov4689->supplies);
+}
+
+static int ov4689_runtime_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov4689 *ov4689 = to_ov4689(sd);
+
+	return __ov4689_power_on(ov4689);
+}
+
+static int ov4689_runtime_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov4689 *ov4689 = to_ov4689(sd);
+
+	__ov4689_power_off(ov4689);
+
+	return 0;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int ov4689_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct ov4689 *ov4689 = to_ov4689(sd);
+	struct v4l2_mbus_framefmt *try_fmt =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+	const struct ov4689_mode *def_mode = &supported_modes[0];
+
+	mutex_lock(&ov4689->mutex);
+	/* Initialize try_fmt */
+	try_fmt->width = def_mode->width;
+	try_fmt->height = def_mode->height;
+	try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
+	try_fmt->field = V4L2_FIELD_NONE;
+
+	mutex_unlock(&ov4689->mutex);
+	/* No crop or compose */
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops ov4689_pm_ops = {
+	SET_RUNTIME_PM_OPS(ov4689_runtime_suspend,
+			   ov4689_runtime_resume, NULL)
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops ov4689_internal_ops = {
+	.open = ov4689_open,
+};
+#endif
+
+static const struct v4l2_subdev_video_ops ov4689_video_ops = {
+	.s_stream = ov4689_s_stream,
+};
+
+static const struct v4l2_subdev_pad_ops ov4689_pad_ops = {
+	.enum_mbus_code = ov4689_enum_mbus_code,
+	.enum_frame_size = ov4689_enum_frame_sizes,
+	.get_fmt = ov4689_get_fmt,
+	.set_fmt = ov4689_set_fmt,
+};
+
+static const struct v4l2_subdev_ops ov4689_subdev_ops = {
+	.video	= &ov4689_video_ops,
+	.pad	= &ov4689_pad_ops,
+};
+
+static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct ov4689 *ov4689 = container_of(ctrl->handler,
+					     struct ov4689, ctrl_handler);
+	struct i2c_client *client = ov4689->client;
+	s64 max;
+	int ret = 0;
+
+	/* Propagate change of current control to all related controls */
+	switch (ctrl->id) {
+	case V4L2_CID_VBLANK:
+		/* Update max exposure while meeting expected vblanking */
+		max = ov4689->cur_mode->height + ctrl->val - 4;
+		__v4l2_ctrl_modify_range(ov4689->exposure,
+					 ov4689->exposure->minimum, max,
+					 ov4689->exposure->step,
+					 ov4689->exposure->default_value);
+		break;
+	}
+
+	if (pm_runtime_get(&client->dev) <= 0)
+		return 0;
+
+	switch (ctrl->id) {
+	case V4L2_CID_EXPOSURE:
+		/* 4 least significant bits of expsoure are fractional part */
+		ret = ov4689_write_reg(ov4689->client, OV4689_REG_EXPOSURE,
+				       OV4689_REG_VALUE_24BIT, ctrl->val << 4);
+		break;
+	case V4L2_CID_ANALOGUE_GAIN:
+		ret = ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_H,
+				       OV4689_REG_VALUE_08BIT,
+				       (ctrl->val >> OV4689_GAIN_H_SHIFT) & OV4689_GAIN_H_MASK);
+		ret |= ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_L,
+				       OV4689_REG_VALUE_08BIT,
+				       ctrl->val & OV4689_GAIN_L_MASK);
+		break;
+	case V4L2_CID_VBLANK:
+		ret = ov4689_write_reg(ov4689->client, OV4689_REG_VTS,
+				       OV4689_REG_VALUE_16BIT,
+				       ctrl->val + ov4689->cur_mode->height);
+		break;
+	case V4L2_CID_TEST_PATTERN:
+		ret = ov4689_enable_test_pattern(ov4689, ctrl->val);
+		break;
+	default:
+		dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
+			 __func__, ctrl->id, ctrl->val);
+		break;
+	}
+
+	pm_runtime_put(&client->dev);
+
+	return ret;
+}
+
+static const struct v4l2_ctrl_ops ov4689_ctrl_ops = {
+	.s_ctrl = ov4689_set_ctrl,
+};
+
+static int ov4689_initialize_controls(struct ov4689 *ov4689)
+{
+	const struct ov4689_mode *mode;
+	struct v4l2_ctrl_handler *handler;
+	struct v4l2_ctrl *ctrl;
+	s64 exposure_max, vblank_def;
+	u32 h_blank;
+	int ret;
+
+	handler = &ov4689->ctrl_handler;
+	mode = ov4689->cur_mode;
+	ret = v4l2_ctrl_handler_init(handler, 8);
+	if (ret)
+		return ret;
+	handler->lock = &ov4689->mutex;
+
+	ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
+				      0, 0, link_freq_menu_items);
+	if (ctrl)
+		ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+	v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
+			  0, OV4689_PIXEL_RATE, 1, OV4689_PIXEL_RATE);
+
+	h_blank = mode->hts_def - mode->width;
+	ov4689->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
+				h_blank, h_blank, 1, h_blank);
+	if (ov4689->hblank)
+		ov4689->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+	vblank_def = mode->vts_def - mode->height;
+	ov4689->vblank = v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops,
+				V4L2_CID_VBLANK, vblank_def,
+				OV4689_VTS_MAX - mode->height,
+				1, vblank_def);
+
+	exposure_max = mode->vts_def - 4;
+	ov4689->exposure = v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops,
+				V4L2_CID_EXPOSURE, OV4689_EXPOSURE_MIN,
+				exposure_max, OV4689_EXPOSURE_STEP,
+				mode->exp_def);
+
+	ov4689->anal_gain = v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops,
+				V4L2_CID_ANALOGUE_GAIN, OV4689_GAIN_MIN,
+				OV4689_GAIN_MAX, OV4689_GAIN_STEP,
+				OV4689_GAIN_DEFAULT);
+
+	ov4689->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
+				&ov4689_ctrl_ops, V4L2_CID_TEST_PATTERN,
+				ARRAY_SIZE(ov4689_test_pattern_menu) - 1,
+				0, 0, ov4689_test_pattern_menu);
+
+	if (handler->error) {
+		ret = handler->error;
+		dev_err(&ov4689->client->dev,
+			"Failed to init controls(%d)\n", ret);
+		goto err_free_handler;
+	}
+
+	ov4689->subdev.ctrl_handler = handler;
+
+	return 0;
+
+err_free_handler:
+	v4l2_ctrl_handler_free(handler);
+
+	return ret;
+}
+
+static int ov4689_check_sensor_id(struct ov4689 *ov4689,
+				  struct i2c_client *client)
+{
+	struct device *dev = &ov4689->client->dev;
+	u32 id = 0;
+	int ret;
+
+	ret = ov4689_read_reg(client, OV4689_REG_CHIP_ID,
+			      OV4689_REG_VALUE_16BIT, &id);
+	if (id != CHIP_ID) {
+		dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
+		return ret;
+	}
+
+	dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
+
+	return 0;
+}
+
+static int ov4689_configure_regulators(struct ov4689 *ov4689)
+{
+	unsigned int i;
+
+	for (i = 0; i < OV4689_NUM_SUPPLIES; i++)
+		ov4689->supplies[i].supply = ov4689_supply_names[i];
+
+	return devm_regulator_bulk_get(&ov4689->client->dev,
+				       OV4689_NUM_SUPPLIES,
+				       ov4689->supplies);
+}
+
+static int ov4689_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct ov4689 *ov4689;
+	struct v4l2_subdev *sd;
+	int ret;
+
+	ov4689 = devm_kzalloc(dev, sizeof(*ov4689), GFP_KERNEL);
+	if (!ov4689)
+		return -ENOMEM;
+
+	ov4689->client = client;
+	ov4689->cur_mode = &supported_modes[0];
+
+	ov4689->xvclk = devm_clk_get(dev, "xvclk");
+	if (IS_ERR(ov4689->xvclk)) {
+		dev_err(dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+	ret = clk_set_rate(ov4689->xvclk, OV4689_XVCLK_FREQ);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+		return ret;
+	}
+	if (clk_get_rate(ov4689->xvclk) != OV4689_XVCLK_FREQ)
+		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
+
+	ov4689->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(ov4689->reset_gpio))
+		dev_warn(dev, "Failed to get reset-gpios\n");
+
+	ov4689->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(ov4689->pwdn_gpio))
+		dev_warn(dev, "Failed to get pwdn-gpios\n");
+
+	ov4689->pinctrl = devm_pinctrl_get(dev);
+	if (!IS_ERR(ov4689->pinctrl)) {
+		ov4689->pins_default =
+			pinctrl_lookup_state(ov4689->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_DEFAULT);
+		if (IS_ERR(ov4689->pins_default))
+			dev_err(dev, "could not get default pinstate\n");
+
+		ov4689->pins_sleep =
+			pinctrl_lookup_state(ov4689->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_SLEEP);
+		if (IS_ERR(ov4689->pins_sleep))
+			dev_err(dev, "could not get sleep pinstate\n");
+	} else {
+		dev_err(dev, "no pinctrl\n");
+	}
+
+	ret = ov4689_configure_regulators(ov4689);
+	if (ret) {
+		dev_err(dev, "Failed to get power regulators\n");
+		return ret;
+	}
+
+	mutex_init(&ov4689->mutex);
+
+	sd = &ov4689->subdev;
+	v4l2_i2c_subdev_init(sd, client, &ov4689_subdev_ops);
+	ret = ov4689_initialize_controls(ov4689);
+	if (ret)
+		goto err_destroy_mutex;
+
+	ret = __ov4689_power_on(ov4689);
+	if (ret)
+		goto err_free_handler;
+
+	ret = ov4689_check_sensor_id(ov4689, client);
+	if (ret)
+		goto err_power_off;
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	sd->internal_ops = &ov4689_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	ov4689->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &ov4689->pad, 0);
+	if (ret < 0)
+		goto err_power_off;
+#endif
+
+	ret = v4l2_async_register_subdev(sd);
+	if (ret) {
+		dev_err(dev, "v4l2 async register subdev failed\n");
+		goto err_clean_entity;
+	}
+
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+	pm_runtime_idle(dev);
+
+	return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+err_power_off:
+	__ov4689_power_off(ov4689);
+err_free_handler:
+	v4l2_ctrl_handler_free(&ov4689->ctrl_handler);
+err_destroy_mutex:
+	mutex_destroy(&ov4689->mutex);
+
+	return ret;
+}
+
+static int ov4689_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov4689 *ov4689 = to_ov4689(sd);
+
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	v4l2_ctrl_handler_free(&ov4689->ctrl_handler);
+	mutex_destroy(&ov4689->mutex);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		__ov4689_power_off(ov4689);
+	pm_runtime_set_suspended(&client->dev);
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id ov4689_of_match[] = {
+	{ .compatible = "ovti,ov4689" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, ov4689_of_match);
+#endif
+
+static const struct i2c_device_id ov4689_match_id[] = {
+	{ "ovti,ov4689", 0 },
+	{ },
+};
+
+static struct i2c_driver ov4689_i2c_driver = {
+	.driver = {
+		.name = "ov4689",
+		.pm = &ov4689_pm_ops,
+		.of_match_table = of_match_ptr(ov4689_of_match),
+	},
+	.probe		= &ov4689_probe,
+	.remove		= &ov4689_remove,
+	.id_table	= ov4689_match_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&ov4689_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&ov4689_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("OmniVision ov4689 sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/i2c/soc_camera/Makefile b/drivers/media/i2c/soc_camera/Makefile
index b1394116d2aa0..feffe83843f7a 100644
--- a/drivers/media/i2c/soc_camera/Makefile
+++ b/drivers/media/i2c/soc_camera/Makefile
@@ -12,4 +12,4 @@ obj-$(CONFIG_SOC_CAMERA_OV9640)		+= ov9640.o
 obj-$(CONFIG_SOC_CAMERA_OV9740)		+= ov9740.o
 obj-$(CONFIG_SOC_CAMERA_RJ54N1)		+= rj54n1cb0c.o
 obj-$(CONFIG_SOC_CAMERA_TW9910)		+= tw9910.o
-obj-y += rockchip/
+obj-$(CONFIG_VIDEO_RK_CIF_ISP10)	+= rockchip/
\ No newline at end of file

From c6e2f4c81c3a620d003a4d0c026d0a3c9b9bf59d Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 09:51:39 +0800
Subject: [PATCH 0039/1852] media: i2c: add ov13850 driver for rkisp1

Change-Id: I1a761130a6f6d332343bd29601594c074c0d7702
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/Kconfig   |   12 +
 drivers/media/i2c/Makefile  |    1 +
 drivers/media/i2c/ov13850.c | 1375 +++++++++++++++++++++++++++++++++++
 3 files changed, 1388 insertions(+)
 create mode 100644 drivers/media/i2c/ov13850.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index fb3d143fbfd3c..06f0ce851fa1c 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -587,6 +587,18 @@ config VIDEO_OV9650
 	  This is a V4L2 sensor-level driver for the Omnivision
 	  OV9650 and OV9652 camera sensors.
 
+config VIDEO_OV13850
+	tristate "OmniVision OV13850 sensor support"
+	depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER
+	depends on MEDIA_CAMERA_SUPPORT
+	select V4L2_FWNODE
+	---help---
+	  This is a Video4Linux2 sensor-level driver for the OmniVision
+	  OV13850 camera.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ov13850.
+
 config VIDEO_VS6624
 	tristate "ST VS6624 sensor support"
 	depends on VIDEO_V4L2 && I2C
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 707b505648f32..f871b6b42aefa 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_VIDEO_OV5695) += ov5695.o
 obj-$(CONFIG_VIDEO_OV7640) += ov7640.o
 obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
 obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
+obj-$(CONFIG_VIDEO_OV13850) += ov13850.o
 obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o
 obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o
 obj-$(CONFIG_VIDEO_MT9T001) += mt9t001.o
diff --git a/drivers/media/i2c/ov13850.c b/drivers/media/i2c/ov13850.c
new file mode 100644
index 0000000000000..7df5ac335eea4
--- /dev/null
+++ b/drivers/media/i2c/ov13850.c
@@ -0,0 +1,1375 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ov13850 driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+#include <linux/pinctrl/consumer.h>
+
+#ifndef V4L2_CID_DIGITAL_GAIN
+#define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
+#endif
+
+/* 45Mhz * 4 Binning */
+#define OV13850_PIXEL_RATE		(45 * 1000 * 1000 * 4)
+#define OV13850_XVCLK_FREQ		24000000
+
+#define CHIP_ID				0x00d850
+#define OV13850_REG_CHIP_ID		0x300a
+
+#define OV13850_REG_CTRL_MODE		0x0100
+#define OV13850_MODE_SW_STANDBY		0x0
+#define OV13850_MODE_STREAMING		BIT(0)
+
+#define OV13850_REG_EXPOSURE		0x3500
+#define	OV13850_EXPOSURE_MIN		4
+#define	OV13850_EXPOSURE_STEP		1
+#define OV13850_VTS_MAX			0x7fff
+
+#define OV13850_REG_GAIN_H		0x350a
+#define OV13850_REG_GAIN_L		0x350b
+#define OV13850_GAIN_H_MASK		0x07
+#define OV13850_GAIN_H_SHIFT		8
+#define OV13850_GAIN_L_MASK		0xff
+#define OV13850_GAIN_MIN		0x10
+#define OV13850_GAIN_MAX		0xf8
+#define OV13850_GAIN_STEP		1
+#define OV13850_GAIN_DEFAULT		0x10
+
+#define OV13850_REG_TEST_PATTERN	0x5e00
+#define	OV13850_TEST_PATTERN_ENABLE	0x80
+#define	OV13850_TEST_PATTERN_DISABLE	0x0
+
+#define OV13850_REG_VTS			0x380e
+
+#define REG_NULL			0xFFFF
+
+#define OV13850_REG_VALUE_08BIT		1
+#define OV13850_REG_VALUE_16BIT		2
+#define OV13850_REG_VALUE_24BIT		3
+
+#define OV13850_LANES			2
+#define OV13850_BITS_PER_SAMPLE		10
+
+#define OV13850_CHIP_REVISION_REG	0x302A
+#define OV13850_R1A			0xb1
+#define OV13850_R2A			0xb2
+
+#define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
+#define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"
+
+static const struct regval *ov13850_global_regs;
+
+static const char * const ov13850_supply_names[] = {
+	"avdd",		/* Analog power */
+	"dovdd",	/* Digital I/O power */
+	"dvdd",		/* Digital core power */
+};
+
+#define OV13850_NUM_SUPPLIES ARRAY_SIZE(ov13850_supply_names)
+
+struct regval {
+	u16 addr;
+	u8 val;
+};
+
+struct ov13850_mode {
+	u32 width;
+	u32 height;
+	u32 max_fps;
+	u32 hts_def;
+	u32 vts_def;
+	u32 exp_def;
+	const struct regval *reg_list;
+};
+
+struct ov13850 {
+	struct i2c_client	*client;
+	struct clk		*xvclk;
+	struct gpio_desc	*reset_gpio;
+	struct gpio_desc	*pwdn_gpio;
+	struct regulator_bulk_data supplies[OV13850_NUM_SUPPLIES];
+
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*pins_default;
+	struct pinctrl_state	*pins_sleep;
+
+	struct v4l2_subdev	subdev;
+	struct media_pad	pad;
+	struct v4l2_ctrl_handler ctrl_handler;
+	struct v4l2_ctrl	*exposure;
+	struct v4l2_ctrl	*anal_gain;
+	struct v4l2_ctrl	*digi_gain;
+	struct v4l2_ctrl	*hblank;
+	struct v4l2_ctrl	*vblank;
+	struct v4l2_ctrl	*test_pattern;
+	struct mutex		mutex;
+	bool			streaming;
+	const struct ov13850_mode *cur_mode;
+};
+
+#define to_ov13850(sd) container_of(sd, struct ov13850, subdev)
+
+/*
+ * Xclk 24Mhz
+ */
+static const struct regval ov13850_global_regs_r1a[] = {
+	{0x0103, 0x01},
+	{0x0300, 0x00},
+	{0x0301, 0x00},
+	{0x0302, 0x32},
+	{0x0303, 0x01},
+	{0x030a, 0x00},
+	{0x300f, 0x11},
+	{0x3010, 0x01},
+	{0x3011, 0x76},
+	{0x3012, 0x21},
+	{0x3013, 0x12},
+	{0x3014, 0x11},
+	{0x3015, 0xc0},
+	{0x301f, 0x03},
+	{0x3106, 0x00},
+	{0x3210, 0x47},
+	{0x3500, 0x00},
+	{0x3501, 0x60},
+	{0x3502, 0x00},
+	{0x3506, 0x00},
+	{0x3507, 0x02},
+	{0x3508, 0x00},
+	{0x350a, 0x00},
+	{0x350b, 0x80},
+	{0x350e, 0x00},
+	{0x350f, 0x10},
+	{0x3600, 0x40},
+	{0x3601, 0xfc},
+	{0x3602, 0x02},
+	{0x3603, 0x48},
+	{0x3604, 0xa5},
+	{0x3605, 0x9f},
+	{0x3607, 0x00},
+	{0x360a, 0x40},
+	{0x360b, 0x91},
+	{0x360c, 0x49},
+	{0x360f, 0x8a},
+	{0x3611, 0x10},
+	{0x3612, 0x27},
+	{0x3613, 0x33},
+	{0x3615, 0x08},
+	{0x3641, 0x02},
+	{0x3660, 0x82},
+	{0x3668, 0x54},
+	{0x3669, 0x40},
+	{0x3667, 0xa0},
+	{0x3702, 0x40},
+	{0x3703, 0x44},
+	{0x3704, 0x2c},
+	{0x3705, 0x24},
+	{0x3706, 0x50},
+	{0x3707, 0x44},
+	{0x3708, 0x3c},
+	{0x3709, 0x1f},
+	{0x370a, 0x26},
+	{0x370b, 0x3c},
+	{0x3720, 0x66},
+	{0x3722, 0x84},
+	{0x3728, 0x40},
+	{0x372a, 0x00},
+	{0x372f, 0x90},
+	{0x3710, 0x28},
+	{0x3716, 0x03},
+	{0x3718, 0x10},
+	{0x3719, 0x08},
+	{0x371c, 0xfc},
+	{0x3760, 0x13},
+	{0x3761, 0x34},
+	{0x3767, 0x24},
+	{0x3768, 0x06},
+	{0x3769, 0x45},
+	{0x376c, 0x23},
+	{0x3d84, 0x00},
+	{0x3d85, 0x17},
+	{0x3d8c, 0x73},
+	{0x3d8d, 0xbf},
+	{0x3800, 0x00},
+	{0x3801, 0x08},
+	{0x3802, 0x00},
+	{0x3803, 0x04},
+	{0x3804, 0x10},
+	{0x3805, 0x97},
+	{0x3806, 0x0c},
+	{0x3807, 0x4b},
+	{0x3808, 0x08},
+	{0x3809, 0x40},
+	{0x380a, 0x06},
+	{0x380b, 0x20},
+	{0x380c, 0x12},
+	{0x380d, 0xc0},
+	{0x380e, 0x06},
+	{0x380f, 0x80},
+	{0x3810, 0x00},
+	{0x3811, 0x04},
+	{0x3812, 0x00},
+	{0x3813, 0x02},
+	{0x3814, 0x31},
+	{0x3815, 0x31},
+	{0x3820, 0x02},
+	{0x3821, 0x05},
+	{0x3834, 0x00},
+	{0x3835, 0x1c},
+	{0x3836, 0x08},
+	{0x3837, 0x02},
+	{0x4000, 0xf1},
+	{0x4001, 0x00},
+	{0x400b, 0x0c},
+	{0x4011, 0x00},
+	{0x401a, 0x00},
+	{0x401b, 0x00},
+	{0x401c, 0x00},
+	{0x401d, 0x00},
+	{0x4020, 0x00},
+	{0x4021, 0xE4},
+	{0x4022, 0x07},
+	{0x4023, 0x5F},
+	{0x4024, 0x08},
+	{0x4025, 0x44},
+	{0x4026, 0x08},
+	{0x4027, 0x47},
+	{0x4028, 0x00},
+	{0x4029, 0x02},
+	{0x402a, 0x04},
+	{0x402b, 0x08},
+	{0x402c, 0x02},
+	{0x402d, 0x02},
+	{0x402e, 0x0c},
+	{0x402f, 0x08},
+	{0x403d, 0x2c},
+	{0x403f, 0x7f},
+	{0x4500, 0x82},
+	{0x4501, 0x38},
+	{0x4601, 0x04},
+	{0x4602, 0x22},
+	{0x4603, 0x01},
+	{0x4837, 0x1b},
+	{0x4d00, 0x04},
+	{0x4d01, 0x42},
+	{0x4d02, 0xd1},
+	{0x4d03, 0x90},
+	{0x4d04, 0x66},
+	{0x4d05, 0x65},
+	{0x5000, 0x0e},
+	{0x5001, 0x01},
+	{0x5002, 0x07},
+	{0x5013, 0x40},
+	{0x501c, 0x00},
+	{0x501d, 0x10},
+	{0x5242, 0x00},
+	{0x5243, 0xb8},
+	{0x5244, 0x00},
+	{0x5245, 0xf9},
+	{0x5246, 0x00},
+	{0x5247, 0xf6},
+	{0x5248, 0x00},
+	{0x5249, 0xa6},
+	{0x5300, 0xfc},
+	{0x5301, 0xdf},
+	{0x5302, 0x3f},
+	{0x5303, 0x08},
+	{0x5304, 0x0c},
+	{0x5305, 0x10},
+	{0x5306, 0x20},
+	{0x5307, 0x40},
+	{0x5308, 0x08},
+	{0x5309, 0x08},
+	{0x530a, 0x02},
+	{0x530b, 0x01},
+	{0x530c, 0x01},
+	{0x530d, 0x0c},
+	{0x530e, 0x02},
+	{0x530f, 0x01},
+	{0x5310, 0x01},
+	{0x5400, 0x00},
+	{0x5401, 0x61},
+	{0x5402, 0x00},
+	{0x5403, 0x00},
+	{0x5404, 0x00},
+	{0x5405, 0x40},
+	{0x540c, 0x05},
+	{0x5b00, 0x00},
+	{0x5b01, 0x00},
+	{0x5b02, 0x01},
+	{0x5b03, 0xff},
+	{0x5b04, 0x02},
+	{0x5b05, 0x6c},
+	{0x5b09, 0x02},
+	{0x5e00, 0x00},
+	{0x5e10, 0x1c},
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 24Mhz
+ */
+static const struct regval ov13850_global_regs_r2a[] = {
+	{0x0300, 0x01},
+	{0x0301, 0x00},
+	{0x0302, 0x28},
+	{0x0303, 0x00},
+	{0x030a, 0x00},
+	{0x300f, 0x11},
+	{0x3010, 0x01},
+	{0x3011, 0x76},
+	{0x3012, 0x21},
+	{0x3013, 0x12},
+	{0x3014, 0x11},
+	{0x301f, 0x03},
+	{0x3106, 0x00},
+	{0x3210, 0x47},
+	{0x3500, 0x00},
+	{0x3501, 0x60},
+	{0x3502, 0x00},
+	{0x3506, 0x00},
+	{0x3507, 0x02},
+	{0x3508, 0x00},
+	{0x350a, 0x00},
+	{0x350b, 0x80},
+	{0x350e, 0x00},
+	{0x350f, 0x10},
+	{0x351a, 0x00},
+	{0x351b, 0x10},
+	{0x351c, 0x00},
+	{0x351d, 0x20},
+	{0x351e, 0x00},
+	{0x351f, 0x40},
+	{0x3520, 0x00},
+	{0x3521, 0x80},
+	{0x3600, 0xc0},
+	{0x3601, 0xfc},
+	{0x3602, 0x02},
+	{0x3603, 0x78},
+	{0x3604, 0xb1},
+	{0x3605, 0xb5},
+	{0x3606, 0x73},
+	{0x3607, 0x07},
+	{0x3609, 0x40},
+	{0x360a, 0x30},
+	{0x360b, 0x91},
+	{0x360c, 0x09},
+	{0x360f, 0x02},
+	{0x3611, 0x10},
+	{0x3612, 0x27},
+	{0x3613, 0x33},
+	{0x3615, 0x0c},
+	{0x3616, 0x0e},
+	{0x3641, 0x02},
+	{0x3660, 0x82},
+	{0x3668, 0x54},
+	{0x3669, 0x00},
+	{0x366a, 0x3f},
+	{0x3667, 0xa0},
+	{0x3702, 0x40},
+	{0x3703, 0x44},
+	{0x3704, 0x2c},
+	{0x3705, 0x01},
+	{0x3706, 0x15},
+	{0x3707, 0x44},
+	{0x3708, 0x3c},
+	{0x3709, 0x1f},
+	{0x370a, 0x27},
+	{0x370b, 0x3c},
+	{0x3720, 0x55},
+	{0x3722, 0x84},
+	{0x3728, 0x40},
+	{0x372a, 0x00},
+	{0x372b, 0x02},
+	{0x372e, 0x22},
+	{0x372f, 0x90},
+	{0x3730, 0x00},
+	{0x3731, 0x00},
+	{0x3732, 0x00},
+	{0x3733, 0x00},
+	{0x3710, 0x28},
+	{0x3716, 0x03},
+	{0x3718, 0x10},
+	{0x3719, 0x0c},
+	{0x371a, 0x08},
+	{0x371c, 0xfc},
+	{0x3748, 0x00},
+	{0x3760, 0x13},
+	{0x3761, 0x33},
+	{0x3762, 0x86},
+	{0x3763, 0x16},
+	{0x3767, 0x24},
+	{0x3768, 0x06},
+	{0x3769, 0x45},
+	{0x376c, 0x23},
+	{0x376f, 0x80},
+	{0x3773, 0x06},
+	{0x3d84, 0x00},
+	{0x3d85, 0x17},
+	{0x3d8c, 0x73},
+	{0x3d8d, 0xbf},
+	{0x3800, 0x00},
+	{0x3801, 0x08},
+	{0x3802, 0x00},
+	{0x3803, 0x04},
+	{0x3804, 0x10},
+	{0x3805, 0x97},
+	{0x3806, 0x0c},
+	{0x3807, 0x4b},
+	{0x3808, 0x08},
+	{0x3809, 0x40},
+	{0x380a, 0x06},
+	{0x380b, 0x20},
+	{0x380c, 0x12},
+	{0x380d, 0xc0},
+	{0x380e, 0x06},
+	{0x380f, 0x80},
+	{0x3810, 0x00},
+	{0x3811, 0x04},
+	{0x3812, 0x00},
+	{0x3813, 0x02},
+	{0x3814, 0x31},
+	{0x3815, 0x31},
+	{0x3820, 0x02},
+	{0x3821, 0x06},
+	{0x3823, 0x00},
+	{0x3826, 0x00},
+	{0x3827, 0x02},
+	{0x3834, 0x00},
+	{0x3835, 0x1c},
+	{0x3836, 0x08},
+	{0x3837, 0x02},
+	{0x4000, 0xf1},
+	{0x4001, 0x00},
+	{0x4006, 0x04},
+	{0x4007, 0x04},
+	{0x400b, 0x0c},
+	{0x4011, 0x00},
+	{0x401a, 0x00},
+	{0x401b, 0x00},
+	{0x401c, 0x00},
+	{0x401d, 0x00},
+	{0x4020, 0x00},
+	{0x4021, 0xe4},
+	{0x4022, 0x04},
+	{0x4023, 0xd7},
+	{0x4024, 0x05},
+	{0x4025, 0xbc},
+	{0x4026, 0x05},
+	{0x4027, 0xbf},
+	{0x4028, 0x00},
+	{0x4029, 0x02},
+	{0x402a, 0x04},
+	{0x402b, 0x08},
+	{0x402c, 0x02},
+	{0x402d, 0x02},
+	{0x402e, 0x0c},
+	{0x402f, 0x08},
+	{0x403d, 0x2c},
+	{0x403f, 0x7f},
+	{0x4041, 0x07},
+	{0x4500, 0x82},
+	{0x4501, 0x3c},
+	{0x458b, 0x00},
+	{0x459c, 0x00},
+	{0x459d, 0x00},
+	{0x459e, 0x00},
+	{0x4601, 0x83},
+	{0x4602, 0x22},
+	{0x4603, 0x01},
+	{0x4837, 0x19},
+	{0x4d00, 0x04},
+	{0x4d01, 0x42},
+	{0x4d02, 0xd1},
+	{0x4d03, 0x90},
+	{0x4d04, 0x66},
+	{0x4d05, 0x65},
+	{0x4d0b, 0x00},
+	{0x5000, 0x0e},
+	{0x5001, 0x01},
+	{0x5002, 0x07},
+	{0x5013, 0x40},
+	{0x501c, 0x00},
+	{0x501d, 0x10},
+	{0x510f, 0xfc},
+	{0x5110, 0xf0},
+	{0x5111, 0x10},
+	{0x536d, 0x02},
+	{0x536e, 0x67},
+	{0x536f, 0x01},
+	{0x5370, 0x4c},
+	{0x5400, 0x00},
+	{0x5400, 0x00},
+	{0x5401, 0x61},
+	{0x5402, 0x00},
+	{0x5403, 0x00},
+	{0x5404, 0x00},
+	{0x5405, 0x40},
+	{0x540c, 0x05},
+	{0x5501, 0x00},
+	{0x5b00, 0x00},
+	{0x5b01, 0x00},
+	{0x5b02, 0x01},
+	{0x5b03, 0xff},
+	{0x5b04, 0x02},
+	{0x5b05, 0x6c},
+	{0x5b09, 0x02},
+	{0x5e00, 0x00},
+	{0x5e10, 0x1c},
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 24Mhz
+ * max_framerate 30fps
+ * mipi_datarate per lane 600Mbps
+ */
+static const struct regval ov13850_2112x1568_regs[] = {
+	{0x3612, 0x27},
+	{0x370a, 0x26},
+	{0x372a, 0x00},
+	{0x372f, 0x90},
+	{0x3801, 0x08},
+	{0x3805, 0x97},
+	{0x3807, 0x4b},
+	{0x3808, 0x08},
+	{0x3809, 0x40},
+	{0x380a, 0x06},
+	{0x380b, 0x20},
+	{0x380c, 0x12},
+	{0x380d, 0xc0},
+	{0x380e, 0x06},
+	{0x380f, 0x80},
+	{0x3813, 0x02},
+	{0x3814, 0x31},
+	{0x3815, 0x31},
+	{0x3820, 0x02},
+	{0x3821, 0x05},
+	{0x3836, 0x08},
+	{0x3837, 0x02},
+	{0x4601, 0x04},
+	{0x4603, 0x00},
+	{0x4020, 0x00},
+	{0x4021, 0xE4},
+	{0x4022, 0x07},
+	{0x4023, 0x5F},
+	{0x4024, 0x08},
+	{0x4025, 0x44},
+	{0x4026, 0x08},
+	{0x4027, 0x47},
+	{0x4603, 0x01},
+	{0x5401, 0x61},
+	{0x5405, 0x40},
+	{REG_NULL, 0x00},
+};
+
+static const struct ov13850_mode supported_modes[] = {
+	{
+		.width = 2112,
+		.height = 1568,
+		.max_fps = 30,
+		.exp_def = 0x0600,
+		.hts_def = 0x12c0,
+		.vts_def = 0x0680,
+		.reg_list = ov13850_2112x1568_regs,
+	},
+};
+
+#define OV13850_LINK_FREQ_300MHZ		300000000
+static const s64 link_freq_menu_items[] = {
+	OV13850_LINK_FREQ_300MHZ
+};
+
+static const char * const ov13850_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bar Type 1",
+	"Vertical Color Bar Type 2",
+	"Vertical Color Bar Type 3",
+	"Vertical Color Bar Type 4"
+};
+
+/* Write registers up to 4 at a time */
+static int ov13850_write_reg(struct i2c_client *client, u16 reg,
+			     u32 len, u32 val)
+{
+	u32 buf_i, val_i;
+	u8 buf[6];
+	u8 *val_p;
+	__be32 val_be;
+
+	if (len > 4)
+		return -EINVAL;
+
+	buf[0] = reg >> 8;
+	buf[1] = reg & 0xff;
+
+	val_be = cpu_to_be32(val);
+	val_p = (u8 *)&val_be;
+	buf_i = 2;
+	val_i = 4 - len;
+
+	while (val_i < 4)
+		buf[buf_i++] = val_p[val_i++];
+
+	if (i2c_master_send(client, buf, len + 2) != len + 2)
+		return -EIO;
+
+	return 0;
+}
+
+static int ov13850_write_array(struct i2c_client *client,
+			       const struct regval *regs)
+{
+	u32 i;
+	int ret = 0;
+
+	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+		ret = ov13850_write_reg(client, regs[i].addr,
+					OV13850_REG_VALUE_08BIT,
+					regs[i].val);
+
+	return ret;
+}
+
+/* Read registers up to 4 at a time */
+static int ov13850_read_reg(struct i2c_client *client, u16 reg,
+			    unsigned int len, u32 *val)
+{
+	struct i2c_msg msgs[2];
+	u8 *data_be_p;
+	__be32 data_be = 0;
+	__be16 reg_addr_be = cpu_to_be16(reg);
+	int ret;
+
+	if (len > 4 || !len)
+		return -EINVAL;
+
+	data_be_p = (u8 *)&data_be;
+	/* Write register address */
+	msgs[0].addr = client->addr;
+	msgs[0].flags = 0;
+	msgs[0].len = 2;
+	msgs[0].buf = (u8 *)&reg_addr_be;
+
+	/* Read data from register */
+	msgs[1].addr = client->addr;
+	msgs[1].flags = I2C_M_RD;
+	msgs[1].len = len;
+	msgs[1].buf = &data_be_p[4 - len];
+
+	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+	if (ret != ARRAY_SIZE(msgs))
+		return -EIO;
+
+	*val = be32_to_cpu(data_be);
+
+	return 0;
+}
+
+static int ov13850_get_reso_dist(const struct ov13850_mode *mode,
+				 struct v4l2_mbus_framefmt *framefmt)
+{
+	return abs(mode->width - framefmt->width) +
+	       abs(mode->height - framefmt->height);
+}
+
+static const struct ov13850_mode *
+ov13850_find_best_fit(struct v4l2_subdev_format *fmt)
+{
+	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
+	int dist;
+	int cur_best_fit = 0;
+	int cur_best_fit_dist = -1;
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
+		dist = ov13850_get_reso_dist(&supported_modes[i], framefmt);
+		if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
+			cur_best_fit_dist = dist;
+			cur_best_fit = i;
+		}
+	}
+
+	return &supported_modes[cur_best_fit];
+}
+
+static int ov13850_set_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct ov13850 *ov13850 = to_ov13850(sd);
+	const struct ov13850_mode *mode;
+	s64 h_blank, vblank_def;
+
+	mutex_lock(&ov13850->mutex);
+
+	mode = ov13850_find_best_fit(fmt);
+	fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
+	fmt->format.width = mode->width;
+	fmt->format.height = mode->height;
+	fmt->format.field = V4L2_FIELD_NONE;
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
+#else
+		mutex_unlock(&ov13850->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		ov13850->cur_mode = mode;
+		h_blank = mode->hts_def - mode->width;
+		__v4l2_ctrl_modify_range(ov13850->hblank, h_blank,
+					 h_blank, 1, h_blank);
+		vblank_def = mode->vts_def - mode->height;
+		__v4l2_ctrl_modify_range(ov13850->vblank, vblank_def,
+					 OV13850_VTS_MAX - mode->height,
+					 1, vblank_def);
+	}
+
+	mutex_unlock(&ov13850->mutex);
+
+	return 0;
+}
+
+static int ov13850_get_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct ov13850 *ov13850 = to_ov13850(sd);
+	const struct ov13850_mode *mode = ov13850->cur_mode;
+
+	mutex_lock(&ov13850->mutex);
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+#else
+		mutex_unlock(&ov13850->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		fmt->format.width = mode->width;
+		fmt->format.height = mode->height;
+		fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
+		fmt->format.field = V4L2_FIELD_NONE;
+	}
+	mutex_unlock(&ov13850->mutex);
+
+	return 0;
+}
+
+static int ov13850_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_pad_config *cfg,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index != 0)
+		return -EINVAL;
+	code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
+
+	return 0;
+}
+
+static int ov13850_enum_frame_sizes(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	if (fse->index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
+		return -EINVAL;
+
+	fse->min_width  = supported_modes[fse->index].width;
+	fse->max_width  = supported_modes[fse->index].width;
+	fse->max_height = supported_modes[fse->index].height;
+	fse->min_height = supported_modes[fse->index].height;
+
+	return 0;
+}
+
+static int ov13850_enable_test_pattern(struct ov13850 *ov13850, u32 pattern)
+{
+	u32 val;
+
+	if (pattern)
+		val = (pattern - 1) | OV13850_TEST_PATTERN_ENABLE;
+	else
+		val = OV13850_TEST_PATTERN_DISABLE;
+
+	return ov13850_write_reg(ov13850->client,
+				 OV13850_REG_TEST_PATTERN,
+				 OV13850_REG_VALUE_08BIT,
+				 val);
+}
+
+static int __ov13850_start_stream(struct ov13850 *ov13850)
+{
+	int ret;
+
+	ret = ov13850_write_array(ov13850->client, ov13850_global_regs);
+	if (ret)
+		return ret;
+
+	ret = ov13850_write_array(ov13850->client, ov13850->cur_mode->reg_list);
+	if (ret)
+		return ret;
+
+	/* In case these controls are set before streaming */
+	mutex_unlock(&ov13850->mutex);
+	ret = v4l2_ctrl_handler_setup(&ov13850->ctrl_handler);
+	mutex_lock(&ov13850->mutex);
+	if (ret)
+		return ret;
+
+	return ov13850_write_reg(ov13850->client,
+				 OV13850_REG_CTRL_MODE,
+				 OV13850_REG_VALUE_08BIT,
+				 OV13850_MODE_STREAMING);
+}
+
+static int __ov13850_stop_stream(struct ov13850 *ov13850)
+{
+	return ov13850_write_reg(ov13850->client,
+				 OV13850_REG_CTRL_MODE,
+				 OV13850_REG_VALUE_08BIT,
+				 OV13850_MODE_SW_STANDBY);
+}
+
+static int ov13850_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct ov13850 *ov13850 = to_ov13850(sd);
+	struct i2c_client *client = ov13850->client;
+	int ret = 0;
+
+	mutex_lock(&ov13850->mutex);
+	on = !!on;
+	if (on == ov13850->streaming)
+		goto unlock_and_return;
+
+	if (on) {
+		ret = pm_runtime_get_sync(&client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = __ov13850_start_stream(ov13850);
+		if (ret) {
+			v4l2_err(sd, "start stream failed while write regs\n");
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+	} else {
+		__ov13850_stop_stream(ov13850);
+		pm_runtime_put(&client->dev);
+	}
+
+	ov13850->streaming = on;
+
+unlock_and_return:
+	mutex_unlock(&ov13850->mutex);
+
+	return ret;
+}
+
+/* Calculate the delay in us by clock rate and clock cycles */
+static inline u32 ov13850_cal_delay(u32 cycles)
+{
+	return DIV_ROUND_UP(cycles, OV13850_XVCLK_FREQ / 1000 / 1000);
+}
+
+static int __ov13850_power_on(struct ov13850 *ov13850)
+{
+	int ret;
+	u32 delay_us;
+	struct device *dev = &ov13850->client->dev;
+
+	if (!IS_ERR_OR_NULL(ov13850->pins_default)) {
+		ret = pinctrl_select_state(ov13850->pinctrl,
+					   ov13850->pins_default);
+		if (ret < 0)
+			dev_err(dev, "could not set pins\n");
+	}
+
+	ret = clk_prepare_enable(ov13850->xvclk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable xvclk\n");
+		return ret;
+	}
+
+	if (!IS_ERR(ov13850->reset_gpio))
+		gpiod_set_value_cansleep(ov13850->reset_gpio, 0);
+
+	ret = regulator_bulk_enable(OV13850_NUM_SUPPLIES, ov13850->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators\n");
+		goto disable_clk;
+	}
+
+	if (!IS_ERR(ov13850->reset_gpio))
+		gpiod_set_value_cansleep(ov13850->reset_gpio, 1);
+
+	usleep_range(500, 1000);
+	if (!IS_ERR(ov13850->pwdn_gpio))
+		gpiod_set_value_cansleep(ov13850->pwdn_gpio, 1);
+
+	/* 8192 cycles prior to first SCCB transaction */
+	delay_us = ov13850_cal_delay(8192);
+	usleep_range(delay_us, delay_us * 2);
+
+	return 0;
+
+disable_clk:
+	clk_disable_unprepare(ov13850->xvclk);
+
+	return ret;
+}
+
+static void __ov13850_power_off(struct ov13850 *ov13850)
+{
+	int ret;
+	struct device *dev = &ov13850->client->dev;
+
+	if (!IS_ERR(ov13850->pwdn_gpio))
+		gpiod_set_value_cansleep(ov13850->pwdn_gpio, 0);
+	clk_disable_unprepare(ov13850->xvclk);
+	if (!IS_ERR(ov13850->reset_gpio))
+		gpiod_set_value_cansleep(ov13850->reset_gpio, 0);
+	if (!IS_ERR_OR_NULL(ov13850->pins_sleep)) {
+		ret = pinctrl_select_state(ov13850->pinctrl,
+					   ov13850->pins_sleep);
+		if (ret < 0)
+			dev_dbg(dev, "could not set pins\n");
+	}
+	regulator_bulk_disable(OV13850_NUM_SUPPLIES, ov13850->supplies);
+}
+
+static int ov13850_runtime_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov13850 *ov13850 = to_ov13850(sd);
+
+	return __ov13850_power_on(ov13850);
+}
+
+static int ov13850_runtime_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov13850 *ov13850 = to_ov13850(sd);
+
+	__ov13850_power_off(ov13850);
+
+	return 0;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int ov13850_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct ov13850 *ov13850 = to_ov13850(sd);
+	struct v4l2_mbus_framefmt *try_fmt =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+	const struct ov13850_mode *def_mode = &supported_modes[0];
+
+	mutex_lock(&ov13850->mutex);
+	/* Initialize try_fmt */
+	try_fmt->width = def_mode->width;
+	try_fmt->height = def_mode->height;
+	try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
+	try_fmt->field = V4L2_FIELD_NONE;
+
+	mutex_unlock(&ov13850->mutex);
+	/* No crop or compose */
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops ov13850_pm_ops = {
+	SET_RUNTIME_PM_OPS(ov13850_runtime_suspend,
+			   ov13850_runtime_resume, NULL)
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops ov13850_internal_ops = {
+	.open = ov13850_open,
+};
+#endif
+
+static const struct v4l2_subdev_video_ops ov13850_video_ops = {
+	.s_stream = ov13850_s_stream,
+};
+
+static const struct v4l2_subdev_pad_ops ov13850_pad_ops = {
+	.enum_mbus_code = ov13850_enum_mbus_code,
+	.enum_frame_size = ov13850_enum_frame_sizes,
+	.get_fmt = ov13850_get_fmt,
+	.set_fmt = ov13850_set_fmt,
+};
+
+static const struct v4l2_subdev_ops ov13850_subdev_ops = {
+	.video	= &ov13850_video_ops,
+	.pad	= &ov13850_pad_ops,
+};
+
+static int ov13850_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct ov13850 *ov13850 = container_of(ctrl->handler,
+					     struct ov13850, ctrl_handler);
+	struct i2c_client *client = ov13850->client;
+	s64 max;
+	int ret = 0;
+
+	/* Propagate change of current control to all related controls */
+	switch (ctrl->id) {
+	case V4L2_CID_VBLANK:
+		/* Update max exposure while meeting expected vblanking */
+		max = ov13850->cur_mode->height + ctrl->val - 4;
+		__v4l2_ctrl_modify_range(ov13850->exposure,
+					 ov13850->exposure->minimum, max,
+					 ov13850->exposure->step,
+					 ov13850->exposure->default_value);
+		break;
+	}
+
+	if (pm_runtime_get(&client->dev) <= 0)
+		return 0;
+
+	switch (ctrl->id) {
+	case V4L2_CID_EXPOSURE:
+		/* 4 least significant bits of expsoure are fractional part */
+		ret = ov13850_write_reg(ov13850->client,
+					OV13850_REG_EXPOSURE,
+					OV13850_REG_VALUE_24BIT,
+					ctrl->val << 4);
+		break;
+	case V4L2_CID_ANALOGUE_GAIN:
+		ret = ov13850_write_reg(ov13850->client,
+					OV13850_REG_GAIN_H,
+					OV13850_REG_VALUE_08BIT,
+					(ctrl->val >> OV13850_GAIN_H_SHIFT) &
+					OV13850_GAIN_H_MASK);
+		ret |= ov13850_write_reg(ov13850->client,
+					 OV13850_REG_GAIN_L,
+					 OV13850_REG_VALUE_08BIT,
+					 ctrl->val & OV13850_GAIN_L_MASK);
+		break;
+	case V4L2_CID_VBLANK:
+		ret = ov13850_write_reg(ov13850->client,
+					OV13850_REG_VTS,
+					OV13850_REG_VALUE_16BIT,
+					ctrl->val + ov13850->cur_mode->height);
+		break;
+	case V4L2_CID_TEST_PATTERN:
+		ret = ov13850_enable_test_pattern(ov13850, ctrl->val);
+		break;
+	default:
+		dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
+			 __func__, ctrl->id, ctrl->val);
+		break;
+	}
+
+	pm_runtime_put(&client->dev);
+
+	return ret;
+}
+
+static const struct v4l2_ctrl_ops ov13850_ctrl_ops = {
+	.s_ctrl = ov13850_set_ctrl,
+};
+
+static int ov13850_initialize_controls(struct ov13850 *ov13850)
+{
+	const struct ov13850_mode *mode;
+	struct v4l2_ctrl_handler *handler;
+	struct v4l2_ctrl *ctrl;
+	s64 exposure_max, vblank_def;
+	u32 h_blank;
+	int ret;
+
+	handler = &ov13850->ctrl_handler;
+	mode = ov13850->cur_mode;
+	ret = v4l2_ctrl_handler_init(handler, 8);
+	if (ret)
+		return ret;
+	handler->lock = &ov13850->mutex;
+
+	ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
+				      0, 0, link_freq_menu_items);
+	if (ctrl)
+		ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+	v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
+			  0, OV13850_PIXEL_RATE, 1, OV13850_PIXEL_RATE);
+
+	h_blank = mode->hts_def - mode->width;
+	ov13850->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
+				h_blank, h_blank, 1, h_blank);
+	if (ov13850->hblank)
+		ov13850->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+	vblank_def = mode->vts_def - mode->height;
+	ov13850->vblank = v4l2_ctrl_new_std(handler, &ov13850_ctrl_ops,
+				V4L2_CID_VBLANK, vblank_def,
+				OV13850_VTS_MAX - mode->height,
+				1, vblank_def);
+
+	exposure_max = mode->vts_def - 4;
+	ov13850->exposure = v4l2_ctrl_new_std(handler, &ov13850_ctrl_ops,
+				V4L2_CID_EXPOSURE, OV13850_EXPOSURE_MIN,
+				exposure_max, OV13850_EXPOSURE_STEP,
+				mode->exp_def);
+
+	ov13850->anal_gain = v4l2_ctrl_new_std(handler, &ov13850_ctrl_ops,
+				V4L2_CID_ANALOGUE_GAIN, OV13850_GAIN_MIN,
+				OV13850_GAIN_MAX, OV13850_GAIN_STEP,
+				OV13850_GAIN_DEFAULT);
+
+	ov13850->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
+				&ov13850_ctrl_ops, V4L2_CID_TEST_PATTERN,
+				ARRAY_SIZE(ov13850_test_pattern_menu) - 1,
+				0, 0, ov13850_test_pattern_menu);
+
+	if (handler->error) {
+		ret = handler->error;
+		dev_err(&ov13850->client->dev,
+			"Failed to init controls(%d)\n", ret);
+		goto err_free_handler;
+	}
+
+	ov13850->subdev.ctrl_handler = handler;
+
+	return 0;
+
+err_free_handler:
+	v4l2_ctrl_handler_free(handler);
+
+	return ret;
+}
+
+static int ov13850_check_sensor_id(struct ov13850 *ov13850,
+				   struct i2c_client *client)
+{
+	struct device *dev = &ov13850->client->dev;
+	u32 id = 0;
+	int ret;
+
+	ret = ov13850_read_reg(client, OV13850_REG_CHIP_ID,
+			       OV13850_REG_VALUE_16BIT, &id);
+	if (id != CHIP_ID) {
+		dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
+		return ret;
+	}
+
+	ret = ov13850_read_reg(client, OV13850_CHIP_REVISION_REG,
+			       OV13850_REG_VALUE_08BIT, &id);
+	if (ret) {
+		dev_err(dev, "Read chip revision register error\n");
+		return ret;
+	}
+
+	if (id == OV13850_R2A)
+		ov13850_global_regs = ov13850_global_regs_r2a;
+	else
+		ov13850_global_regs = ov13850_global_regs_r1a;
+	dev_info(dev, "Detected OV%06x sensor, REVISION 0x%x\n", CHIP_ID, id);
+
+	return 0;
+}
+
+static int ov13850_configure_regulators(struct ov13850 *ov13850)
+{
+	unsigned int i;
+
+	for (i = 0; i < OV13850_NUM_SUPPLIES; i++)
+		ov13850->supplies[i].supply = ov13850_supply_names[i];
+
+	return devm_regulator_bulk_get(&ov13850->client->dev,
+				       OV13850_NUM_SUPPLIES,
+				       ov13850->supplies);
+}
+
+static int ov13850_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct ov13850 *ov13850;
+	struct v4l2_subdev *sd;
+	int ret;
+
+	ov13850 = devm_kzalloc(dev, sizeof(*ov13850), GFP_KERNEL);
+	if (!ov13850)
+		return -ENOMEM;
+
+	ov13850->client = client;
+	ov13850->cur_mode = &supported_modes[0];
+
+	ov13850->xvclk = devm_clk_get(dev, "xvclk");
+	if (IS_ERR(ov13850->xvclk)) {
+		dev_err(dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+	ret = clk_set_rate(ov13850->xvclk, OV13850_XVCLK_FREQ);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+		return ret;
+	}
+	if (clk_get_rate(ov13850->xvclk) != OV13850_XVCLK_FREQ)
+		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
+
+	ov13850->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(ov13850->reset_gpio))
+		dev_warn(dev, "Failed to get reset-gpios\n");
+
+	ov13850->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(ov13850->pwdn_gpio))
+		dev_warn(dev, "Failed to get pwdn-gpios\n");
+
+	ret = ov13850_configure_regulators(ov13850);
+	if (ret) {
+		dev_err(dev, "Failed to get power regulators\n");
+		return ret;
+	}
+
+	ov13850->pinctrl = devm_pinctrl_get(dev);
+	if (!IS_ERR(ov13850->pinctrl)) {
+		ov13850->pins_default =
+			pinctrl_lookup_state(ov13850->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_DEFAULT);
+		if (IS_ERR(ov13850->pins_default))
+			dev_err(dev, "could not get default pinstate\n");
+
+		ov13850->pins_sleep =
+			pinctrl_lookup_state(ov13850->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_SLEEP);
+		if (IS_ERR(ov13850->pins_sleep))
+			dev_err(dev, "could not get sleep pinstate\n");
+	}
+
+	mutex_init(&ov13850->mutex);
+
+	sd = &ov13850->subdev;
+	v4l2_i2c_subdev_init(sd, client, &ov13850_subdev_ops);
+	ret = ov13850_initialize_controls(ov13850);
+	if (ret)
+		goto err_destroy_mutex;
+
+	ret = __ov13850_power_on(ov13850);
+	if (ret)
+		goto err_free_handler;
+
+	ret = ov13850_check_sensor_id(ov13850, client);
+	if (ret)
+		goto err_power_off;
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	sd->internal_ops = &ov13850_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	ov13850->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &ov13850->pad, 0);
+	if (ret < 0)
+		goto err_power_off;
+#endif
+
+	ret = v4l2_async_register_subdev(sd);
+	if (ret) {
+		dev_err(dev, "v4l2 async register subdev failed\n");
+		goto err_clean_entity;
+	}
+
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+	pm_runtime_idle(dev);
+
+	return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+err_power_off:
+	__ov13850_power_off(ov13850);
+err_free_handler:
+	v4l2_ctrl_handler_free(&ov13850->ctrl_handler);
+err_destroy_mutex:
+	mutex_destroy(&ov13850->mutex);
+
+	return ret;
+}
+
+static int ov13850_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov13850 *ov13850 = to_ov13850(sd);
+
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	v4l2_ctrl_handler_free(&ov13850->ctrl_handler);
+	mutex_destroy(&ov13850->mutex);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		__ov13850_power_off(ov13850);
+	pm_runtime_set_suspended(&client->dev);
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id ov13850_of_match[] = {
+	{ .compatible = "ovti,ov13850" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, ov13850_of_match);
+#endif
+
+static const struct i2c_device_id ov13850_match_id[] = {
+	{ "ovti,ov13850", 0 },
+	{ },
+};
+
+static struct i2c_driver ov13850_i2c_driver = {
+	.driver = {
+		.name = "ov13850",
+		.pm = &ov13850_pm_ops,
+		.of_match_table = of_match_ptr(ov13850_of_match),
+	},
+	.probe		= &ov13850_probe,
+	.remove		= &ov13850_remove,
+	.id_table	= ov13850_match_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&ov13850_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&ov13850_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("OmniVision ov13850 sensor driver");
+MODULE_LICENSE("GPL v2");

From b74b2af59f74a24421b19968b95f59c2da5c4db6 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 11:43:06 +0800
Subject: [PATCH 0040/1852] arm64: dts: rockchip: add mipi_dphy_tx1rx1 and
 modify rkisp1_1 for rk3399

Change-Id: I94d01c6963dc5f2f9b61159df1b13fc0bb32a0f1
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7e2f455156224..406056aad9749 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1910,7 +1910,7 @@
 		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "isp0_mmu";
 		#iommu-cells = <0>;
-		clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>;
+		clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
 		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3399_PD_ISP0>;
 		rk_iommu,disable_reset_quirk;
@@ -1923,10 +1923,12 @@
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru SCLK_ISP1>,
 			 <&cru ACLK_ISP1>, <&cru HCLK_ISP1>,
-			 <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
+			 <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>,
+			 <&cru PCLK_ISP1_WRAPPER>;
 		clock-names = "clk_isp",
 			 "aclk_isp", "hclk_isp",
-			 "aclk_isp_wrap", "hclk_isp_wrap";
+			 "aclk_isp_wrap", "hclk_isp_wrap",
+			 "pclk_isp_wrap";
 		devfreq = <&dmc>;
 		power-domains = <&power RK3399_PD_ISP1>;
 		iommus = <&isp1_mmu>;
@@ -1939,7 +1941,7 @@
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "isp1_mmu";
 		#iommu-cells = <0>;
-		clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>;
+		clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
 		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3399_PD_ISP1>;
 		rk_iommu,disable_reset_quirk;
@@ -2043,6 +2045,20 @@
 		};
 	};
 
+	mipi_dphy_tx1rx1: mipi-dphy-tx1rx1@0xff968000 {
+		compatible = "rockchip,rk3399-mipi-dphy";
+		reg = <0x0 0xff968000 0x0 0x8000>;
+		clocks = <&cru SCLK_MIPIDPHY_REF>,
+			<&cru SCLK_DPHY_TX1RX1_CFG>,
+			<&cru PCLK_VIO_GRF>,
+			<&cru PCLK_MIPI_DSI1>;
+		clock-names = "dphy-ref", "dphy-cfg",
+			"grf", "pclk_mipi_dsi";
+		rockchip,grf = <&grf>;
+		power-domains = <&power RK3399_PD_VIO>;
+		status = "disabled";
+	};
+
 	edp: edp@ff970000 {
 		compatible = "rockchip,rk3399-edp";
 		reg = <0x0 0xff970000 0x0 0x8000>;

From 2decb2c09f0d2019270a55bf49a65c3707a4e700 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 2 Jul 2018 09:20:53 +0800
Subject: [PATCH 0041/1852] media: rockchip: isp: enable SYS_STATUS_ISP status

Change-Id: I6aba3566fa3ee6e5686998ba6970010609b603a3
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 0fa9723be0be3..c88534ef2a921 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -42,6 +42,8 @@
 #include <linux/pinctrl/consumer.h>
 #include <media/videobuf2-dma-contig.h>
 #include <linux/dma-iommu.h>
+#include <dt-bindings/soc/rockchip-system-status.h>
+#include <soc/rockchip/rockchip-system-status.h>
 #include "regs.h"
 #include "rkisp1.h"
 #include "common.h"
@@ -187,8 +189,10 @@ static int rkisp1_pipeline_set_stream(struct rkisp1_pipeline *p, bool on)
 	    (!on && atomic_dec_return(&p->stream_cnt) > 0))
 		return 0;
 
-	if (on)
+	if (on) {
+		rockchip_set_system_status(SYS_STATUS_ISP);
 		v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, true);
+	}
 
 	/* phy -> sensor */
 	for (i = 0; i < p->num_subdevs; ++i) {
@@ -197,8 +201,10 @@ static int rkisp1_pipeline_set_stream(struct rkisp1_pipeline *p, bool on)
 			goto err_stream_off;
 	}
 
-	if (!on)
+	if (!on) {
 		v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, false);
+		rockchip_clear_system_status(SYS_STATUS_ISP);
+	}
 
 	return 0;
 
@@ -206,6 +212,7 @@ static int rkisp1_pipeline_set_stream(struct rkisp1_pipeline *p, bool on)
 	for (--i; i >= 0; --i)
 		v4l2_subdev_call(p->subdevs[i], video, s_stream, false);
 	v4l2_subdev_call(&dev->isp_sdev.sd, video, s_stream, false);
+	rockchip_clear_system_status(SYS_STATUS_ISP);
 	return ret;
 }
 

From 9d3a706691045cd84e1767213283c0c1b32a3ad1 Mon Sep 17 00:00:00 2001
From: Tomasz Figa <tfiga@chromium.org>
Date: Tue, 15 May 2018 15:47:47 +0900
Subject: [PATCH 0042/1852] CHROMIUM: media: rockchip/isp1: Replace stream
 state with a boolean

The rkisp1_state enum consists only of 3 entries, where 1 is completely
unused and the other two respectively mean not streaming or streaming.
Replace it with a boolean called "streaming".

While at it, remove "saved_state" member from rkisp1_stream struct, as
it is not used anywhere.

BUG=b:78779539
TEST=Make sure camera works on scarlet.

Change-Id: I329b62951e214a25ac35a5c189814cebba26dbf1
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1059006
Tested-by: yichong zhong <zyc@rock-chips.com>
Reviewed-by: Ricky Liang <jcliang@chromium.org>
Reviewed-by: yichong zhong <zyc@rock-chips.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
---
 .../media/platform/rockchip/isp1/capture.c    | 24 +++++++--------
 .../media/platform/rockchip/isp1/capture.h    |  3 +-
 drivers/media/platform/rockchip/isp1/common.h |  9 ------
 drivers/media/platform/rockchip/isp1/rkisp1.c | 30 +++++++++----------
 4 files changed, 28 insertions(+), 38 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index 68acbfbbf7b55..116fcd1a998b1 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -878,7 +878,7 @@ static void mp_stop_mi(struct rkisp1_stream *stream)
 {
 	void __iomem *base = stream->ispdev->base_addr;
 
-	if (stream->state != RKISP1_STATE_STREAMING)
+	if (!stream->streaming)
 		return;
 	stream->ops->clr_frame_end_int(base);
 	stream->ops->disable_mi(stream);
@@ -888,7 +888,7 @@ static void sp_stop_mi(struct rkisp1_stream *stream)
 {
 	void __iomem *base = stream->ispdev->base_addr;
 
-	if (stream->state != RKISP1_STATE_STREAMING)
+	if (!stream->streaming)
 		return;
 	stream->ops->clr_frame_end_int(base);
 	stream->ops->disable_mi(stream);
@@ -980,13 +980,13 @@ static void rkisp1_stream_stop(struct rkisp1_stream *stream)
 
 	stream->stopping = true;
 	ret = wait_event_timeout(stream->done,
-				 stream->state != RKISP1_STATE_STREAMING,
+				 !stream->streaming,
 				 msecs_to_jiffies(1000));
 	if (!ret) {
 		v4l2_warn(v4l2_dev, "waiting on event return error %d\n", ret);
 		stream->ops->stop_mi(stream);
 		stream->stopping = false;
-		stream->state = RKISP1_STATE_READY;
+		stream->streaming = false;
 	}
 	disable_dcrop(stream, true);
 	disable_rsz(stream, true);
@@ -1022,11 +1022,11 @@ static int rkisp1_start(struct rkisp1_stream *stream)
 	 * also required because the sencond FE maybe corrupt especially
 	 * when run at 120fps.
 	 */
-	if (other->state != RKISP1_STATE_STREAMING) {
+	if (!other->streaming) {
 		force_cfg_update(base);
 		mi_frame_end(stream);
 	}
-	stream->state = RKISP1_STATE_STREAMING;
+	stream->streaming = true;
 
 	return 0;
 }
@@ -1100,7 +1100,7 @@ static void rkisp1_buf_queue(struct vb2_buffer *vb)
 	spin_lock_irqsave(&stream->vbq_lock, lock_flags);
 
 	/* XXX: replace dummy to speed up  */
-	if (stream->state == RKISP1_STATE_STREAMING &&
+	if (stream->streaming &&
 	    stream->next_buf == NULL &&
 	    atomic_read(&stream->ispdev->isp_sdev.frm_sync_seq) == 0) {
 		stream->next_buf = ispbuf;
@@ -1193,7 +1193,7 @@ static int rkisp1_stream_start(struct rkisp1_stream *stream)
 	bool async = false;
 	int ret;
 
-	if (other->state == RKISP1_STATE_STREAMING)
+	if (other->streaming)
 		async = true;
 
 	ret = rkisp1_config_rsz(stream, async);
@@ -1224,7 +1224,7 @@ rkisp1_start_streaming(struct vb2_queue *queue, unsigned int count)
 	struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 	int ret;
 
-	if (WARN_ON(stream->state != RKISP1_STATE_READY))
+	if (WARN_ON(stream->streaming))
 		return -EBUSY;
 
 	ret = rkisp1_create_dummy_buf(stream);
@@ -1331,7 +1331,7 @@ static void rkisp1_set_fmt(struct rkisp1_stream *stream,
 	if (!pixm->quantization)
 		pixm->quantization = V4L2_QUANTIZATION_FULL_RANGE;
 	/* can not change quantization when stream-on */
-	if (other_stream->state == RKISP1_STATE_STREAMING)
+	if (other_stream->streaming)
 		pixm->quantization = other_stream->out_fmt.quantization;
 
 	/* calculate size */
@@ -1408,7 +1408,7 @@ void rkisp1_stream_init(struct rkisp1_device *dev, u32 id)
 		stream->config = &rkisp1_mp_stream_config;
 	}
 
-	stream->state = RKISP1_STATE_READY;
+	stream->streaming = false;
 
 	memset(&pixm, 0, sizeof(pixm));
 	pixm.pixelformat = V4L2_PIX_FMT_YUYV;
@@ -1726,7 +1726,7 @@ void rkisp1_mi_isr(struct rkisp1_stream *stream)
 		 */
 		if (stream->ops->is_stream_stopped(dev->base_addr)) {
 			stream->stopping = false;
-			stream->state = RKISP1_STATE_READY;
+			stream->streaming = false;
 			wake_up(&stream->done);
 		} else {
 			stream->ops->stop_mi(stream);
diff --git a/drivers/media/platform/rockchip/isp1/capture.h b/drivers/media/platform/rockchip/isp1/capture.h
index f0989103daa14..94e580272b298 100644
--- a/drivers/media/platform/rockchip/isp1/capture.h
+++ b/drivers/media/platform/rockchip/isp1/capture.h
@@ -166,8 +166,6 @@ struct rkisp1_stream {
 	u32 id;
 	struct rkisp1_device *ispdev;
 	struct rkisp1_vdev_node vnode;
-	enum rkisp1_state state;
-	enum rkisp1_state saved_state;
 	struct capture_fmt out_isp_fmt;
 	struct v4l2_pix_format_mplane out_fmt;
 	struct v4l2_rect dcrop;
@@ -178,6 +176,7 @@ struct rkisp1_stream {
 	struct rkisp1_dummy_buffer dummy_buf;
 	struct rkisp1_buffer *curr_buf;
 	struct rkisp1_buffer *next_buf;
+	bool streaming;
 	bool stopping;
 	wait_queue_head_t done;
 	union {
diff --git a/drivers/media/platform/rockchip/isp1/common.h b/drivers/media/platform/rockchip/isp1/common.h
index 1adfb9039b60e..0d78446fda288 100644
--- a/drivers/media/platform/rockchip/isp1/common.h
+++ b/drivers/media/platform/rockchip/isp1/common.h
@@ -85,15 +85,6 @@ enum rkisp1_fmt_raw_pat_type {
 	RAW_BGGR,
 };
 
-enum rkisp1_state {
-	/* path not yet opened: */
-	RKISP1_STATE_DISABLED,
-	/* path opened and configured, ready for streaming: */
-	RKISP1_STATE_READY,
-	/* path is streaming: */
-	RKISP1_STATE_STREAMING
-};
-
 struct rkisp1_buffer {
 	struct vb2_v4l2_buffer vb;
 	struct list_head queue;
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 0438d6ddba916..98098ff02db73 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -359,9 +359,9 @@ static int rkisp1_config_cif(struct rkisp1_device *dev)
 	u32 cif_id;
 
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
-		 "SP state = %d, MP state = %d\n",
-		 dev->stream[RKISP1_STREAM_SP].state,
-		 dev->stream[RKISP1_STREAM_MP].state);
+		 "SP streaming = %d, MP streaming = %d\n",
+		 dev->stream[RKISP1_STREAM_SP].streaming,
+		 dev->stream[RKISP1_STREAM_MP].streaming);
 
 	cif_id = readl(dev->base_addr + CIF_VI_ID);
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev, "CIF_ID 0x%08x\n", cif_id);
@@ -384,9 +384,9 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
 	u32 val;
 
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
-		 "SP state = %d, MP state = %d\n",
-		 dev->stream[RKISP1_STREAM_SP].state,
-		 dev->stream[RKISP1_STREAM_MP].state);
+		 "SP streaming = %d, MP streaming = %d\n",
+		 dev->stream[RKISP1_STREAM_SP].streaming,
+		 dev->stream[RKISP1_STREAM_MP].streaming);
 
 	/*
 	 * ISP(mi) stop in mi frame end -> Stop ISP(mipi) ->
@@ -414,9 +414,9 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
 	readx_poll_timeout(readl, base + CIF_ISP_RIS,
 			   val, val & CIF_ISP_OFF, 20, 100);
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
-		"state(MP:%d, SP:%d), MI_CTRL:%x, ISP_CTRL:%x, MIPI_CTRL:%x\n",
-		 dev->stream[RKISP1_STREAM_SP].state,
-		 dev->stream[RKISP1_STREAM_MP].state,
+		"streaming(MP:%d, SP:%d), MI_CTRL:%x, ISP_CTRL:%x, MIPI_CTRL:%x\n",
+		 dev->stream[RKISP1_STREAM_SP].streaming,
+		 dev->stream[RKISP1_STREAM_MP].streaming,
 		 readl(base + CIF_MI_CTRL),
 		 readl(base + CIF_ISP_CTRL),
 		 readl(base + CIF_MIPI_CTRL));
@@ -435,9 +435,9 @@ static int rkisp1_isp_start(struct rkisp1_device *dev)
 	u32 val;
 
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
-		 "SP state = %d, MP state = %d\n",
-		 dev->stream[RKISP1_STREAM_SP].state,
-		 dev->stream[RKISP1_STREAM_MP].state);
+		 "SP streaming = %d, MP streaming = %d\n",
+		 dev->stream[RKISP1_STREAM_SP].streaming,
+		 dev->stream[RKISP1_STREAM_MP].streaming);
 
 	/* Activate MIPI */
 	if (sensor->mbus.type == V4L2_MBUS_CSI2) {
@@ -457,10 +457,10 @@ static int rkisp1_isp_start(struct rkisp1_device *dev)
 	usleep_range(1000, 1200);
 
 	v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
-		 "SP state = %d, MP state = %d MI_CTRL 0x%08x\n"
+		 "SP streaming = %d, MP streaming = %d MI_CTRL 0x%08x\n"
 		 "  ISP_CTRL 0x%08x MIPI_CTRL 0x%08x\n",
-		 dev->stream[RKISP1_STREAM_SP].state,
-		 dev->stream[RKISP1_STREAM_MP].state,
+		 dev->stream[RKISP1_STREAM_SP].streaming,
+		 dev->stream[RKISP1_STREAM_MP].streaming,
 		 readl(base + CIF_MI_CTRL),
 		 readl(base + CIF_ISP_CTRL),
 		 readl(base + CIF_MIPI_CTRL));

From d7102fcc0dc2ea0463c834a07c75aea735169813 Mon Sep 17 00:00:00 2001
From: Tomasz Figa <tfiga@chromium.org>
Date: Mon, 21 May 2018 18:29:07 +0900
Subject: [PATCH 0043/1852] CHROMIUM: media: rockchip/isp1: Reverse the order
 of MIs

The current order (SP=0, MP=1) is the opposite of what is there in
hardware registers (MP=0, SP=1), which unnecessarily complicates the
code that deals with hardware programming. Fix this by reversing the
order of streams in the driver.

BUG=b:78779539
TEST=Make sure camera works on scarlet.

Change-Id: I43671748073d9dc4cb906e5f6f992f870920ce91
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065403
Tested-by: yichong zhong <zyc@rock-chips.com>
Reviewed-by: Ricky Liang <jcliang@chromium.org>
Reviewed-by: yichong zhong <zyc@rock-chips.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
---
 drivers/media/platform/rockchip/isp1/common.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/common.h b/drivers/media/platform/rockchip/isp1/common.h
index 0d78446fda288..5f212090b9a1e 100644
--- a/drivers/media/platform/rockchip/isp1/common.h
+++ b/drivers/media/platform/rockchip/isp1/common.h
@@ -46,8 +46,8 @@
 #define RKISP1_DEFAULT_HEIGHT		600
 
 #define RKISP1_MAX_STREAM		2
-#define RKISP1_STREAM_SP		0
-#define RKISP1_STREAM_MP		1
+#define RKISP1_STREAM_MP		0
+#define RKISP1_STREAM_SP		1
 
 #define RKISP1_PLANE_Y			0
 #define RKISP1_PLANE_CB			1

From 8648c3668074fa0e14b23fa1d98068e08ed2b435 Mon Sep 17 00:00:00 2001
From: Tomasz Figa <tfiga@chromium.org>
Date: Mon, 21 May 2018 18:39:06 +0900
Subject: [PATCH 0044/1852] CHROMIUM: media: rockchip/isp1: Simplify MI
 interrupt handling

Rather than adding unnecessary indirection, just use stream index to
handle MI interrupt enable/disable/clear, since the stream index matches
the order of bits now, thanks to previous patch. While at it, remove
some dead code.

BUG=b:78779539
TEST=Make sure camera works on scarlet.

Change-Id: Ie817471972e60917250d7240d7543b516db0db03
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065404
Reviewed-by: yichong zhong <zyc@rock-chips.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
---
 .../media/platform/rockchip/isp1/capture.c    | 67 ++++++++---------
 .../media/platform/rockchip/isp1/capture.h    |  6 +-
 drivers/media/platform/rockchip/isp1/dev.c    | 12 +--
 drivers/media/platform/rockchip/isp1/regs.c   | 20 -----
 drivers/media/platform/rockchip/isp1/regs.h   | 75 +++++++------------
 5 files changed, 62 insertions(+), 118 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index 116fcd1a998b1..00d9df43ecc68 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -759,7 +759,7 @@ static int mp_config_mi(struct rkisp1_stream *stream)
 	mi_set_cb_size(stream, stream->out_fmt.plane_fmt[1].sizeimage);
 	mi_set_cr_size(stream, stream->out_fmt.plane_fmt[2].sizeimage);
 
-	mp_frame_end_int_enable(base);
+	mi_frame_end_int_enable(stream);
 	if (stream->out_isp_fmt.uv_swap)
 		mp_set_uv_swap(base);
 
@@ -800,7 +800,7 @@ static int sp_config_mi(struct rkisp1_stream *stream)
 	sp_set_y_height(base, stream->out_fmt.height);
 	sp_set_y_line_length(base, stream->u.sp.y_stride);
 
-	sp_frame_end_int_enable(base);
+	mi_frame_end_int_enable(stream);
 	if (output_isp_fmt->uv_swap)
 		sp_set_uv_swap(base);
 
@@ -876,21 +876,17 @@ static void update_mi(struct rkisp1_stream *stream)
 
 static void mp_stop_mi(struct rkisp1_stream *stream)
 {
-	void __iomem *base = stream->ispdev->base_addr;
-
 	if (!stream->streaming)
 		return;
-	stream->ops->clr_frame_end_int(base);
+	mi_frame_end_int_clear(stream);
 	stream->ops->disable_mi(stream);
 }
 
 static void sp_stop_mi(struct rkisp1_stream *stream)
 {
-	void __iomem *base = stream->ispdev->base_addr;
-
 	if (!stream->streaming)
 		return;
-	stream->ops->clr_frame_end_int(base);
+	mi_frame_end_int_clear(stream);
 	stream->ops->disable_mi(stream);
 }
 
@@ -900,8 +896,6 @@ static struct streams_ops rkisp1_mp_streams_ops = {
 	.disable_mi = mp_disable_mi,
 	.stop_mi = mp_stop_mi,
 	.set_data_path = mp_set_data_path,
-	.clr_frame_end_int = mp_clr_frame_end_int,
-	.is_frame_end_int_masked = mp_is_frame_end_int_masked,
 	.is_stream_stopped = mp_is_stream_stopped,
 };
 
@@ -911,8 +905,6 @@ static struct streams_ops rkisp1_sp_streams_ops = {
 	.disable_mi = sp_disable_mi,
 	.stop_mi = sp_stop_mi,
 	.set_data_path = sp_set_data_path,
-	.clr_frame_end_int = sp_clr_frame_end_int,
-	.is_frame_end_int_masked = sp_is_frame_end_int_masked,
 	.is_stream_stopped = sp_is_stream_stopped,
 };
 
@@ -1705,33 +1697,36 @@ int rkisp1_register_stream_vdevs(struct rkisp1_device *dev)
 
 /****************  Interrupter Handler ****************/
 
-void rkisp1_mi_isr(struct rkisp1_stream *stream)
+void rkisp1_mi_isr(u32 mis_val, struct rkisp1_device *dev)
 {
-	struct rkisp1_device *dev = stream->ispdev;
-	void __iomem *base = stream->ispdev->base_addr;
-	u32 val;
-
-	stream->ops->clr_frame_end_int(base);
-	if (stream->ops->is_frame_end_int_masked(base)) {
-		val = mi_get_masked_int_status(base);
-		v4l2_err(&dev->v4l2_dev, "icr err: 0x%x\n", val);
-	}
+	int i;
 
-	if (stream->stopping) {
-		/* Make sure stream is actually stopped, whose state
-		 * can be read from the shadow register, before wake_up()
-		 * thread which would immediately free all frame buffers.
-		 * stop_mi() takes effect at the next frame end
-		 * that sync the configurations to shadow regs.
-		 */
-		if (stream->ops->is_stream_stopped(dev->base_addr)) {
-			stream->stopping = false;
-			stream->streaming = false;
-			wake_up(&stream->done);
+	for (i = 0; i < ARRAY_SIZE(dev->stream); ++i) {
+		struct rkisp1_stream *stream = &dev->stream[i];
+
+		if (!(mis_val & CIF_MI_FRAME(stream)))
+			continue;
+
+		mi_frame_end_int_clear(stream);
+
+		if (stream->stopping) {
+			/*
+			 * Make sure stream is actually stopped, whose state
+			 * can be read from the shadow register, before
+			 * wake_up() thread which would immediately free all
+			 * frame buffers. stop_mi() takes effect at the next
+			 * frame end that sync the configurations to shadow
+			 * regs.
+			 */
+			if (stream->ops->is_stream_stopped(dev->base_addr)) {
+				stream->stopping = false;
+				stream->streaming = false;
+				wake_up(&stream->done);
+			} else {
+				stream->ops->stop_mi(stream);
+			}
 		} else {
-			stream->ops->stop_mi(stream);
+			mi_frame_end(stream);
 		}
-	} else {
-		mi_frame_end(stream);
 	}
 }
diff --git a/drivers/media/platform/rockchip/isp1/capture.h b/drivers/media/platform/rockchip/isp1/capture.h
index 94e580272b298..6fadc3e306153 100644
--- a/drivers/media/platform/rockchip/isp1/capture.h
+++ b/drivers/media/platform/rockchip/isp1/capture.h
@@ -142,8 +142,6 @@ struct streams_ops {
 	void (*enable_mi)(struct rkisp1_stream *stream);
 	void (*disable_mi)(struct rkisp1_stream *stream);
 	void (*set_data_path)(void __iomem *base);
-	void (*clr_frame_end_int)(void __iomem *base);
-	bool (*is_frame_end_int_masked)(void __iomem *base);
 	bool (*is_stream_stopped)(void __iomem *base);
 };
 
@@ -163,7 +161,7 @@ struct streams_ops {
  * @next_buf: the buffer used for next frame
  */
 struct rkisp1_stream {
-	u32 id;
+	unsigned id:1;
 	struct rkisp1_device *ispdev;
 	struct rkisp1_vdev_node vnode;
 	struct capture_fmt out_isp_fmt;
@@ -187,7 +185,7 @@ struct rkisp1_stream {
 
 void rkisp1_unregister_stream_vdevs(struct rkisp1_device *dev);
 int rkisp1_register_stream_vdevs(struct rkisp1_device *dev);
-void rkisp1_mi_isr(struct rkisp1_stream *stream);
+void rkisp1_mi_isr(u32 mis_val, struct rkisp1_device *dev);
 void rkisp1_stream_init(struct rkisp1_device *dev, u32 id);
 
 #endif /* _RKISP1_PATH_VIDEO_H */
diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index c88534ef2a921..03c46cc243acd 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -490,8 +490,7 @@ static irqreturn_t rkisp1_irq_handler(int irq, void *ctx)
 {
 	struct device *dev = ctx;
 	struct rkisp1_device *rkisp1_dev = dev_get_drvdata(dev);
-	void __iomem *base = rkisp1_dev->base_addr;
-	unsigned int mis_val, i;
+	unsigned int mis_val;
 
 	mis_val = readl(rkisp1_dev->base_addr + CIF_ISP_MIS);
 	if (mis_val)
@@ -501,12 +500,9 @@ static irqreturn_t rkisp1_irq_handler(int irq, void *ctx)
 	if (mis_val)
 		rkisp1_mipi_isr(mis_val, rkisp1_dev);
 
-	for (i = 0; i < RKISP1_MAX_STREAM; ++i) {
-		struct rkisp1_stream *stream = &rkisp1_dev->stream[i];
-
-		if (stream->ops->is_frame_end_int_masked(base))
-			rkisp1_mi_isr(stream);
-	}
+	mis_val = readl(rkisp1_dev->base_addr + CIF_MI_MIS);
+	if (mis_val)
+		rkisp1_mi_isr(mis_val, rkisp1_dev);
 
 	return IRQ_HANDLED;
 }
diff --git a/drivers/media/platform/rockchip/isp1/regs.c b/drivers/media/platform/rockchip/isp1/regs.c
index 2668db5fed12d..675c2d75c9b70 100644
--- a/drivers/media/platform/rockchip/isp1/regs.c
+++ b/drivers/media/platform/rockchip/isp1/regs.c
@@ -232,26 +232,6 @@ void config_mi_ctrl(struct rkisp1_stream *stream)
 	writel(reg | CIF_MI_CTRL_INIT_OFFSET_EN, addr);
 }
 
-void mp_clr_frame_end_int(void __iomem *base)
-{
-	writel(CIF_MI_MP_FRAME, base + CIF_MI_ICR);
-}
-
-void sp_clr_frame_end_int(void __iomem *base)
-{
-	writel(CIF_MI_SP_FRAME, base + CIF_MI_ICR);
-}
-
-bool mp_is_frame_end_int_masked(void __iomem *base)
-{
-	return (mi_get_masked_int_status(base) & CIF_MI_MP_FRAME);
-}
-
-bool sp_is_frame_end_int_masked(void __iomem *base)
-{
-	return (mi_get_masked_int_status(base) & CIF_MI_SP_FRAME);
-}
-
 bool mp_is_stream_stopped(void __iomem *base)
 {
 	int en;
diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index f0dd59ed20ef5..b2495fa80ba7d 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -197,8 +197,7 @@
 #define CIF_RSZ_SCALER_FACTOR			BIT(16)
 
 /* MI_IMSC - MI_MIS - MI_RIS - MI_ICR - MI_ISR */
-#define CIF_MI_MP_FRAME				BIT(0)
-#define CIF_MI_SP_FRAME				BIT(1)
+#define CIF_MI_FRAME(stream)			BIT((stream)->id)
 #define CIF_MI_MBLK_LINE			BIT(2)
 #define CIF_MI_FILL_MP_Y			BIT(3)
 #define CIF_MI_WRAP_MP_Y			BIT(4)
@@ -1376,6 +1375,30 @@ static inline void mi_set_cr_offset(struct rkisp1_stream *stream, int val)
 	writel(val, base + stream->config->mi.cr_offs_cnt_init);
 }
 
+static inline void mi_frame_end_int_enable(struct rkisp1_stream *stream)
+{
+	void __iomem *base = stream->ispdev->base_addr;
+	void __iomem *addr = base + CIF_MI_IMSC;
+
+	writel(CIF_MI_FRAME(stream) | readl(addr), addr);
+}
+
+static inline void mi_frame_end_int_disable(struct rkisp1_stream *stream)
+{
+	void __iomem *base = stream->ispdev->base_addr;
+	void __iomem *addr = base + CIF_MI_IMSC;
+
+	writel(~CIF_MI_FRAME(stream) & readl(addr), addr);
+}
+
+static inline void mi_frame_end_int_clear(struct rkisp1_stream *stream)
+{
+	void __iomem *base = stream->ispdev->base_addr;
+	void __iomem *addr = base + CIF_MI_ICR;
+
+	writel(CIF_MI_FRAME(stream), addr);
+}
+
 static inline void mp_set_chain_mode(void __iomem *base)
 {
 	u32 dpcl = readl(base + CIF_VI_DPCL);
@@ -1408,49 +1431,6 @@ static inline void sp_set_data_path(void __iomem *base)
 	writel(dpcl, base + CIF_VI_DPCL);
 }
 
-static inline void mp_frame_end_int_enable(void __iomem *base)
-{
-	void __iomem *addr = base + CIF_MI_IMSC;
-
-	writel(CIF_MI_MP_FRAME | readl(addr), addr);
-}
-
-static inline void sp_frame_end_int_enable(void __iomem *base)
-{
-	void __iomem *addr = base + CIF_MI_IMSC;
-
-	writel(CIF_MI_SP_FRAME | readl(addr), addr);
-}
-
-static inline void mp_frame_end_int_disable(void __iomem *base)
-{
-	void __iomem *addr = base + CIF_MI_IMSC;
-
-	writel(~CIF_MI_MP_FRAME & readl(addr), addr);
-}
-
-static inline void sp_frame_end_int_disable(void __iomem *base)
-{
-	void __iomem *addr = base + CIF_MI_IMSC;
-
-	writel(~CIF_MI_SP_FRAME & readl(addr), addr);
-}
-
-static inline void clr_mpsp_frame_end_int(void __iomem *base)
-{
-	writel(CIF_MI_SP_FRAME | CIF_MI_MP_FRAME, base + CIF_MI_ICR);
-}
-
-static inline void clr_mp_crop_rsz_int(void __iomem *base)
-{
-	writel(~CIF_MI_MP_FRAME, base + CIF_MI_ICR);
-}
-
-static inline void clr_sp_crop_rsz_int(void __iomem *base)
-{
-	writel(~CIF_MI_SP_FRAME, base + CIF_MI_ICR);
-}
-
 static inline void mp_set_uv_swap(void __iomem *base)
 {
 	void __iomem *addr = base + CIF_MI_XTD_FORMAT_CTRL;
@@ -1572,9 +1552,4 @@ static inline void force_cfg_update(void __iomem *base)
 	writel(CIF_MI_INIT_SOFT_UPD, base + CIF_MI_INIT);
 }
 
-static inline u32 mi_get_masked_int_status(void __iomem *base)
-{
-	return readl(base + CIF_MI_MIS);
-}
-
 #endif /* _RKISP1_REGS_H */

From 18fa98845714a960c954b48d7af1f938f2590b24 Mon Sep 17 00:00:00 2001
From: ZhongYiChong <zyc@rock-chips.com>
Date: Thu, 1 Mar 2018 16:16:03 +0800
Subject: [PATCH 0045/1852] media: rockchip: isp1: Update new ISP parameters
 immediately

For those sub modules that have shadow registers in core isp, the
new programing parameters would not be active if both
CIF_ISP_CTRL_ISP_CFG_UPD_PERMANENT and CFG_UPD are not set. Now
we configure CFG_UPD to force update the shadow registers when new
ISP parameters are configured.

BUG=b:36227021
TEST=scarlet can preview, LSC data table can be switched.

Change-Id: I804ddfc45b3c2fca9a6f51627af4264a25075070
Signed-off-by: ZhongYiChong <zyc@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/942721
Commit-Ready: Tomasz Figa <tfiga@chromium.org>
Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
---
 drivers/media/platform/rockchip/isp1/isp_params.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 136e2393d714b..913402a4faa05 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -1189,8 +1189,16 @@ void rkisp1_params_isr(struct rkisp1_isp_params_vdev *params_vdev, u32 isp_mis)
 	new_params = (struct rkisp1_isp_params_cfg *)(cur_buf->vaddr[0]);
 
 	if (isp_mis & CIF_ISP_FRAME) {
+		u32 isp_ctrl;
+
 		__isp_isr_other_config(params_vdev, new_params);
 		__isp_isr_meas_config(params_vdev, new_params);
+
+		/* update shadow register immediately */
+		isp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_CTRL);
+		isp_ctrl |= CIF_ISP_CTRL_ISP_CFG_UPD;
+		rkisp1_iowrite32(params_vdev, isp_ctrl, CIF_ISP_CTRL);
+
 		spin_lock(&params_vdev->config_lock);
 		list_del(&cur_buf->queue);
 		spin_unlock(&params_vdev->config_lock);

From 9a8add4c3dd36829577ab1dfc8c8f34defcc78ed Mon Sep 17 00:00:00 2001
From: ZhongYiChong <zyc@rock-chips.com>
Date: Tue, 29 May 2018 17:37:21 +0800
Subject: [PATCH 0046/1852] media: rockchip: isp1: fix some ISP parameters
 config error

Some ISP parameter config functions may override the old enable
bit value, because the enable bits of these modules are in the
same registers with parameters. So we should save the old enable
bits firstly.

BUG=b:36227021
TEST=scarlet can preview

Change-Id: I509e2b9160118f8a7f522857e013e3014e41ef9f
Signed-off-by: ZhongYiChong <zyc@rock-chips.com>
---
 .../media/platform/rockchip/isp1/isp_params.c | 63 ++++++++++++++-----
 1 file changed, 49 insertions(+), 14 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 913402a4faa05..84a1e7ffbfdea 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -97,8 +97,13 @@ static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
 			const struct cifisp_dpcc_config *arg)
 {
 	unsigned int i;
+	u32 mode;
 
-	rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_DPCC_MODE);
+	/* avoid to override the old enable value */
+	mode = rkisp1_ioread32(params_vdev, CIF_ISP_DPCC_MODE);
+	mode &= CIF_ISP_DPCC_ENA;
+	mode |= arg->mode & ~CIF_ISP_DPCC_ENA;
+	rkisp1_iowrite32(params_vdev, mode, CIF_ISP_DPCC_MODE);
 	rkisp1_iowrite32(params_vdev, arg->output_mode,
 			 CIF_ISP_DPCC_OUTPUT_MODE);
 	rkisp1_iowrite32(params_vdev, arg->set_use, CIF_ISP_DPCC_SET_USE);
@@ -130,8 +135,11 @@ static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
 static void bls_config(struct rkisp1_isp_params_vdev *params_vdev,
 		       const struct cifisp_bls_config *arg)
 {
-	u32 new_control = 0;
+	/* avoid to override the old enable value */
+	u32 new_control;
 
+	new_control = rkisp1_ioread32(params_vdev, CIF_ISP_BLS_CTRL);
+	new_control &= CIF_ISP_BLS_ENA;
 	/* fixed subtraction values */
 	if (!arg->enable_auto) {
 		const struct cifisp_bls_fixed_val *pval = &arg->fixed_val;
@@ -181,7 +189,6 @@ static void bls_config(struct rkisp1_isp_params_vdev *params_vdev,
 			break;
 		}
 
-		new_control = CIF_ISP_BLS_MODE_FIXED;
 	} else {
 		if (arg->en_windows & BIT(1)) {
 			rkisp1_iowrite32(params_vdev, arg->bls_window2.h_offs,
@@ -336,7 +343,7 @@ static void lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
 				 CIF_ISP_LSC_YGRAD_01 + i * 4);
 	}
 
-	/* restore the bls ctrl status */
+	/* restore the lsc ctrl status */
 	if (lsc_ctrl & CIF_ISP_LSC_CTRL_ENA) {
 		isp_param_set_bits(params_vdev,
 				   CIF_ISP_LSC_CTRL,
@@ -352,6 +359,8 @@ static void lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
 static void flt_config(struct rkisp1_isp_params_vdev *params_vdev,
 		       const struct cifisp_flt_config *arg)
 {
+	u32 filt_mode;
+
 	rkisp1_iowrite32(params_vdev, arg->thresh_bl0, CIF_ISP_FILT_THRESH_BL0);
 	rkisp1_iowrite32(params_vdev, arg->thresh_bl1, CIF_ISP_FILT_THRESH_BL1);
 	rkisp1_iowrite32(params_vdev, arg->thresh_sh0, CIF_ISP_FILT_THRESH_SH0);
@@ -368,14 +377,30 @@ static void flt_config(struct rkisp1_isp_params_vdev *params_vdev,
 			 CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
 			 CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1),
 			 CIF_ISP_FILT_MODE);
+
+	/* avoid to override the old enable value */
+	filt_mode = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_MODE);
+	filt_mode &= CIF_ISP_FLT_ENA;
+	if (arg->mode)
+		filt_mode |= CIF_ISP_FLT_MODE_DNR;
+	filt_mode |= CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
+				 CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
+				 CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1);
+	rkisp1_iowrite32(params_vdev, filt_mode, CIF_ISP_FILT_MODE);
 }
 
 /* ISP demosaic interface function */
 static int bdm_config(struct rkisp1_isp_params_vdev *params_vdev,
 		      const struct cifisp_bdm_config *arg)
 {
+	u32 bdm_th;
+
+	/* avoid to override the old enable value */
+	bdm_th = rkisp1_ioread32(params_vdev, CIF_ISP_DEMOSAIC);
+	bdm_th &= CIF_ISP_DEMOSAIC_BYPASS;
+	bdm_th |= arg->demosaic_th & ~CIF_ISP_DEMOSAIC_BYPASS;
 	/* set demosaic threshold */
-	rkisp1_iowrite32(params_vdev, arg->demosaic_th, CIF_ISP_DEMOSAIC);
+	rkisp1_iowrite32(params_vdev, bdm_th, CIF_ISP_DEMOSAIC);
 	return 0;
 }
 
@@ -538,11 +563,16 @@ static void aec_config(struct rkisp1_isp_params_vdev *params_vdev,
 		       const struct cifisp_aec_config *arg)
 {
 	unsigned int block_hsize, block_vsize;
+	u32 exp_ctrl;
 
-	rkisp1_iowrite32(params_vdev,
-			 ((arg->autostop) ? CIF_ISP_EXP_CTRL_AUTOSTOP : 0) |
-			 ((arg->mode == CIFISP_EXP_MEASURING_MODE_1) ?
-			 CIF_ISP_EXP_CTRL_MEASMODE_1 : 0), CIF_ISP_EXP_CTRL);
+	/* avoid to override the old enable value */
+	exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
+	exp_ctrl &= CIF_ISP_EXP_ENA;
+	if (arg->autostop)
+		exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
+	if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
+		exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
+	rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
 
 	rkisp1_iowrite32(params_vdev,
 			 arg->meas_window.h_offs, CIF_ISP_EXP_H_OFFSET);
@@ -597,10 +627,13 @@ static void hst_config(struct rkisp1_isp_params_vdev *params_vdev,
 	};
 	int i;
 	const u8 *weight;
+	u32 hist_prop;
 
-	rkisp1_iowrite32(params_vdev,
-			 CIF_ISP_HIST_PREDIV_SET(arg->histogram_predivider),
-			 CIF_ISP_HIST_PROP);
+	/* avoid to override the old enable value */
+	hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP);
+	hist_prop &= CIF_ISP_HIST_PROP_MODE_MASK;
+	hist_prop |= CIF_ISP_HIST_PREDIV_SET(arg->histogram_predivider);
+	rkisp1_iowrite32(params_vdev, hist_prop, CIF_ISP_HIST_PROP);
 	rkisp1_iowrite32(params_vdev,
 			arg->meas_window.h_offs,
 			CIF_ISP_HIST_H_OFFS);
@@ -642,8 +675,9 @@ static void afm_config(struct rkisp1_isp_params_vdev *params_vdev,
 	int i;
 	size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
 				  arg->num_afm_win);
+	u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
 
-	/* Switch off to configure. Enabled during normal flow in frame isr. */
+	/* Switch off to configure. */
 	isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
 
 	for (i = 0; i < num_of_win; i++) {
@@ -660,6 +694,8 @@ static void afm_config(struct rkisp1_isp_params_vdev *params_vdev,
 	}
 	rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
 	rkisp1_iowrite32(params_vdev, arg->var_shift, CIF_ISP_AFM_VAR_SHIFT);
+	/* restore afm status */
+	rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
 }
 
 static void ie_config(struct rkisp1_isp_params_vdev *params_vdev,
@@ -730,7 +766,6 @@ static void ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
 		isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
 				   CIF_IMG_EFF_CTRL_CFG_UPD);
 	} else {
-		/* Disable measurement */
 		isp_param_clear_bits(params_vdev, CIF_IMG_EFF_CTRL,
 				     CIF_IMG_EFF_CTRL_ENABLE);
 		isp_param_clear_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);

From d95585e99296d76cd68801cd94145efc8760e020 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 09:17:25 +0800
Subject: [PATCH 0047/1852] media: rockchip: phy: Support isp0 and isp1 in
 rk3399 run at the same time

Change-Id: Iba0aee26ac8ec8df5047a07b2fa4c0e311d0329f
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../platform/rockchip/isp1/mipi_dphy_sy.c     | 138 ++++++++++++++----
 1 file changed, 106 insertions(+), 32 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
index 72b1876cdd034..c76ad313e9fdf 100644
--- a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -65,6 +65,17 @@
 #define RK3399_GRF_SOC_CON24	0x6260
 #define RK3399_GRF_SOC_CON25	0x6264
 #define RK3399_GRF_SOC_STATUS1	0xe2a4
+#define RK3399_GRF_IO_VSEL	0x0900
+
+#define RK3288_PHY_TEST_CTRL0	0x30
+#define RK3288_PHY_TEST_CTRL1	0x34
+#define RK3288_PHY_SHUTDOWNZ	0x08
+#define RK3288_PHY_RSTZ		0x0c
+
+#define RK3399_PHY_TEST_CTRL0	0xb4
+#define RK3399_PHY_TEST_CTRL1	0xb8
+#define RK3399_PHY_SHUTDOWNZ	0xa0
+#define RK3399_PHY_RSTZ		0xa0
 
 #define CLOCK_LANE_HS_RX_CONTROL		0x34
 #define LANE0_HS_RX_CONTROL			0x44
@@ -86,11 +97,6 @@
 /*
  * CSI HOST
  */
-#define CSIHOST_PHY_TEST_CTRL0		0x30
-#define CSIHOST_PHY_TEST_CTRL1		0x34
-#define CSIHOST_PHY_SHUTDOWNZ		0x08
-#define CSIHOST_DPHY_RSTZ		0x0c
-
 #define PHY_TESTEN_ADDR			(0x1 << 16)
 #define PHY_TESTEN_DATA			(0x0 << 16)
 #define PHY_TESTCLK			(0x1 << 1)
@@ -148,6 +154,7 @@ enum dphy_reg_id {
 	/* below is for rk3399 only */
 	GRF_DPHY_RX0_CLK_INV_SEL,
 	GRF_DPHY_RX1_CLK_INV_SEL,
+	GRF_DPHY_TX1RX1_SRC_SEL,
 };
 
 enum mipi_dphy_ctl_type {
@@ -163,15 +170,29 @@ enum mipi_dphy_lane {
 	MIPI_DPHY_LANE_DATA3
 };
 
+enum txrx_reg_id {
+	TXRX_PHY_TEST_CTRL0 = 0,
+	TXRX_PHY_TEST_CTRL1,
+	TXRX_PHY_SHUTDOWNZ,
+	TXRX_PHY_RSTZ,
+};
+
 struct dphy_reg {
 	u32 offset;
 	u32 mask;
 	u32 shift;
 };
 
+struct txrx_reg {
+	u32 offset;
+};
+
 #define PHY_REG(_offset, _width, _shift) \
 	{ .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
 
+#define TXRX_REG(_offset) \
+	{ .offset = _offset, }
+
 static const struct dphy_reg rk3288_grf_dphy_regs[] = {
 	[GRF_CON_DISABLE_ISP] = PHY_REG(RK3288_GRF_SOC_CON6, 1, 0),
 	[GRF_CON_ISP_DPHY_SEL] = PHY_REG(RK3288_GRF_SOC_CON6, 1, 1),
@@ -226,7 +247,7 @@ static const struct dphy_reg rk3399_grf_dphy_regs[] = {
 	[GRF_DPHY_TX1RX1_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 8),
 	[GRF_DPHY_TX1RX1_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 12),
 	[GRF_DPHY_TX1RX1_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON24, 4, 0),
-	[GRF_DPHY_RX1_SRC_SEL] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 4),
+	[GRF_DPHY_TX1RX1_SRC_SEL] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 4),
 	[GRF_DPHY_TX1RX1_BASEDIR] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 5),
 	[GRF_DPHY_TX1RX1_ENABLECLK] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 6),
 	[GRF_DPHY_TX1RX1_MASTERSLAVEZ] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 7),
@@ -235,6 +256,21 @@ static const struct dphy_reg rk3399_grf_dphy_regs[] = {
 	[GRF_DPHY_RX0_TESTCLK] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 9),
 	[GRF_DPHY_RX0_TESTCLR] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 10),
 	[GRF_DPHY_RX0_TESTDOUT] = PHY_REG(RK3399_GRF_SOC_STATUS1, 8, 0),
+	[GRF_DVP_V18SEL] = PHY_REG(RK3399_GRF_IO_VSEL, 1, 1),
+};
+
+static const struct txrx_reg rk3288_txrx_regs[] = {
+	[TXRX_PHY_TEST_CTRL0] = TXRX_REG(RK3288_PHY_TEST_CTRL0),
+	[TXRX_PHY_TEST_CTRL1] = TXRX_REG(RK3288_PHY_TEST_CTRL1),
+	[TXRX_PHY_SHUTDOWNZ] = TXRX_REG(RK3288_PHY_SHUTDOWNZ),
+	[TXRX_PHY_RSTZ] = TXRX_REG(RK3288_PHY_RSTZ),
+};
+
+static const struct txrx_reg rk3399_txrx_regs[] = {
+	[TXRX_PHY_TEST_CTRL0] = TXRX_REG(RK3399_PHY_TEST_CTRL0),
+	[TXRX_PHY_TEST_CTRL1] = TXRX_REG(RK3399_PHY_TEST_CTRL1),
+	[TXRX_PHY_SHUTDOWNZ] = TXRX_REG(RK3399_PHY_SHUTDOWNZ),
+	[TXRX_PHY_RSTZ] = TXRX_REG(RK3399_PHY_RSTZ),
 };
 
 struct hsfreq_range {
@@ -249,8 +285,10 @@ struct dphy_drv_data {
 	int num_clks;
 	const struct hsfreq_range *hsfreq_ranges;
 	int num_hsfreq_ranges;
-	const struct dphy_reg *regs;
+	const struct dphy_reg *grf_regs;
+	const struct txrx_reg *txrx_regs;
 	enum mipi_dphy_ctl_type ctl_type;
+	void (*individual_init)(struct mipidphy_priv *priv);
 };
 
 struct sensor_async_subdev {
@@ -272,6 +310,7 @@ struct mipidphy_priv {
 	struct device *dev;
 	struct regmap *regmap_grf;
 	const struct dphy_reg *grf_regs;
+	const struct txrx_reg *txrx_regs;
 	void __iomem *csihost_base_addr;
 	struct clk *clks[MAX_DPHY_CLK];
 	const struct dphy_drv_data *drv_data;
@@ -297,8 +336,17 @@ static inline void write_grf_reg(struct mipidphy_priv *priv,
 	const struct dphy_reg *reg = &priv->grf_regs[index];
 	unsigned int val = HIWORD_UPDATE(value, reg->mask, reg->shift);
 
-	WARN_ON(!reg->offset);
-	regmap_write(priv->regmap_grf, reg->offset, val);
+	if (reg->offset)
+		regmap_write(priv->regmap_grf, reg->offset, val);
+}
+
+static inline void write_txrx_reg(struct mipidphy_priv *priv,
+				  int index, u32 value)
+{
+	const struct txrx_reg *reg = &priv->txrx_regs[index];
+
+	if (reg->offset)
+		writel(value, priv->txrx_base_addr + reg->offset);
 }
 
 static void mipidphy0_wr_reg(struct mipidphy_priv *priv,
@@ -327,12 +375,10 @@ static void mipidphy1_wr_reg(struct mipidphy_priv *priv, unsigned char addr,
 	 * TESTEN =0,TESTDIN=data
 	 * TESTCLK=1
 	 */
-	writel((PHY_TESTEN_ADDR | addr),
-	       priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL1);
-	writel(0x00, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
-	writel((PHY_TESTEN_DATA | data),
-	       priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL1);
-	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL1, PHY_TESTEN_ADDR | addr);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, 0x00);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL1, PHY_TESTEN_DATA | data);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, 0x02);
 }
 
 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq,
@@ -476,7 +522,8 @@ static int mipidphy_runtime_suspend(struct device *dev)
 
 	num_clks = priv->drv_data->num_clks;
 	for (i = num_clks - 1; i >= 0; i--)
-		clk_disable_unprepare(priv->clks[i]);
+		if (!IS_ERR(priv->clks[i]))
+			clk_disable_unprepare(priv->clks[i]);
 
 	return 0;
 }
@@ -490,9 +537,11 @@ static int mipidphy_runtime_resume(struct device *dev)
 
 	num_clks = priv->drv_data->num_clks;
 	for (i = 0; i < num_clks; i++) {
-		ret = clk_prepare_enable(priv->clks[i]);
-		if (ret < 0)
-			goto err;
+		if (!IS_ERR(priv->clks[i])) {
+			ret = clk_prepare_enable(priv->clks[i]);
+			if (ret < 0)
+				goto err;
+		}
 	}
 
 	return 0;
@@ -581,8 +630,26 @@ static const char * const rk3399_mipidphy_clks[] = {
 	"dphy-ref",
 	"dphy-cfg",
 	"grf",
+	"pclk_mipi_dsi",
 };
 
+static void default_mipidphy_individual_init(struct mipidphy_priv *priv)
+{
+}
+
+static void rk3399_mipidphy_individual_init(struct mipidphy_priv *priv)
+{
+	/*
+	 * According to the sequence of RK3399_TXRX_DPHY, the setting of isp0 mipi
+	 * will affect txrx dphy in default state of grf_soc_con24.
+	 */
+	write_grf_reg(priv, GRF_DPHY_TX1RX1_SRC_SEL, 0);
+	write_grf_reg(priv, GRF_DPHY_TX1RX1_MASTERSLAVEZ, 0);
+	write_grf_reg(priv, GRF_DPHY_TX1RX1_BASEDIR, 0);
+
+	write_grf_reg(priv, GRF_DVP_V18SEL, 0x1);
+}
+
 static int mipidphy_rx_stream_on(struct mipidphy_priv *priv,
 				 struct v4l2_subdev *sd)
 {
@@ -655,6 +722,7 @@ static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 	write_grf_reg(priv, GRF_CON_ISP_DPHY_SEL, 1);
 	write_grf_reg(priv, GRF_DSI_CSI_TESTBUS_SEL, 1);
 	write_grf_reg(priv, GRF_DPHY_RX1_SRC_SEL, 1);
+	write_grf_reg(priv, GRF_DPHY_TX1RX1_SRC_SEL, 0);
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_MASTERSLAVEZ, 0);
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_BASEDIR, 1);
 	/* Disable lan turn around, which is ignored in receive mode */
@@ -665,12 +733,12 @@ static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_ENABLE,
 		      GENMASK(sensor->lanes - 1, 0));
 	/* dphy start */
-	writel(0, priv->txrx_base_addr + CSIHOST_PHY_SHUTDOWNZ);
-	writel(0, priv->txrx_base_addr + CSIHOST_DPHY_RSTZ);
-	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
-	writel(PHY_TESTCLR, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
+	write_txrx_reg(priv, TXRX_PHY_SHUTDOWNZ, 0x00);
+	write_txrx_reg(priv, TXRX_PHY_RSTZ, 0x00);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLK);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLR);
 	usleep_range(100, 150);
-	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLK);
 	usleep_range(100, 150);
 
 	/* set clock lane */
@@ -750,8 +818,11 @@ static const struct dphy_drv_data rk3288_mipidphy_drv_data = {
 	.num_clks = ARRAY_SIZE(rk3288_mipidphy_clks),
 	.hsfreq_ranges = rk3288_mipidphy_hsfreq_ranges,
 	.num_hsfreq_ranges = ARRAY_SIZE(rk3288_mipidphy_hsfreq_ranges),
-	.regs = rk3288_grf_dphy_regs,
+	.grf_regs = rk3288_grf_dphy_regs,
+	.txrx_regs = rk3288_txrx_regs,
 	.ctl_type = MIPI_DPHY_CTL_GRF_ONLY,
+	.individual_init = default_mipidphy_individual_init,
+
 };
 
 static const struct dphy_drv_data rk3326_mipidphy_drv_data = {
@@ -759,8 +830,9 @@ static const struct dphy_drv_data rk3326_mipidphy_drv_data = {
 	.num_clks = ARRAY_SIZE(rk3326_mipidphy_clks),
 	.hsfreq_ranges = rk3326_mipidphy_hsfreq_ranges,
 	.num_hsfreq_ranges = ARRAY_SIZE(rk3326_mipidphy_hsfreq_ranges),
-	.regs = rk3326_grf_dphy_regs,
+	.grf_regs = rk3326_grf_dphy_regs,
 	.ctl_type = MIPI_DPHY_CTL_CSI_HOST,
+	.individual_init = default_mipidphy_individual_init,
 };
 
 static const struct dphy_drv_data rk3399_mipidphy_drv_data = {
@@ -768,8 +840,10 @@ static const struct dphy_drv_data rk3399_mipidphy_drv_data = {
 	.num_clks = ARRAY_SIZE(rk3399_mipidphy_clks),
 	.hsfreq_ranges = rk3399_mipidphy_hsfreq_ranges,
 	.num_hsfreq_ranges = ARRAY_SIZE(rk3399_mipidphy_hsfreq_ranges),
-	.regs = rk3399_grf_dphy_regs,
+	.grf_regs = rk3399_grf_dphy_regs,
+	.txrx_regs = rk3399_txrx_regs,
 	.ctl_type = MIPI_DPHY_CTL_GRF_ONLY,
+	.individual_init = rk3399_mipidphy_individual_init,
 };
 
 static const struct of_device_id rockchip_mipidphy_match_id[] = {
@@ -972,13 +1046,12 @@ static int rockchip_mipidphy_probe(struct platform_device *pdev)
 	for (i = 0; i < drv_data->num_clks; i++) {
 		priv->clks[i] = devm_clk_get(dev, drv_data->clks[i]);
 
-		if (IS_ERR(priv->clks[i])) {
-			dev_err(dev, "Failed to get %s\n", drv_data->clks[i]);
-			return PTR_ERR(priv->clks[i]);
-		}
+		if (IS_ERR(priv->clks[i]))
+			dev_dbg(dev, "Failed to get %s\n", drv_data->clks[i]);
 	}
 
-	priv->grf_regs = drv_data->regs;
+	priv->grf_regs = drv_data->grf_regs;
+	priv->txrx_regs = drv_data->txrx_regs;
 	priv->drv_data = drv_data;
 	if (drv_data->ctl_type == MIPI_DPHY_CTL_CSI_HOST) {
 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1006,6 +1079,7 @@ static int rockchip_mipidphy_probe(struct platform_device *pdev)
 		return ret;
 
 	pm_runtime_enable(&pdev->dev);
+	drv_data->individual_init(priv);
 
 	return 0;
 }

From d6112be66daa84eb0d64725269f048ca766c1aeb Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 24 Apr 2018 11:54:51 +0800
Subject: [PATCH 0048/1852] arm64: dts: rockchip: rk3399-sapphire-excavator:
 isp0 and isp1 run at the same time

Change-Id: I320462c815699725625dbf6752b4ae482b367a4a
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../rk3399-sapphire-excavator-edp.dts         | 137 ++++++++++++++++++
 1 file changed, 137 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts
index 728b430079c08..98b6f352de776 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dts
@@ -193,6 +193,51 @@
 		pinctrl-0 = <&hdmiin_gpios>;
 		status = "okay";
 	};
+
+	ov13850: ov13850@10 {
+		compatible = "ovti,ov13850";
+		status = "disabled";
+		reg = <0x10>;
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+		/* avdd-supply = <>; */
+		/* dvdd-supply = <>; */
+		/* dovdd-supply = <>; */
+		/* reset-gpios = <>; */
+		reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; // conflict with csi-ctl-gpios
+		pwdn-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "rockchip,camera_default";
+		pinctrl-0 = <&cif_clkout>;
+		port {
+			ucam_out0: endpoint {
+				remote-endpoint = <&mipi_in_ucam0>;
+				//remote-endpoint = <&mipi_in_ucam1>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+
+	ov4689: ov4689@36 {
+		compatible = "ovti,ov4689";
+		status = "disabled";
+		reg = <0x36>;
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+		/* avdd-supply = <>; */
+		/* dvdd-supply = <>; */
+		/* dovdd-supply = <>; */
+		/* reset-gpios = <>; */
+		pwdn-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; // conflict with backlight
+		pinctrl-names = "rockchip,camera_default";
+		pinctrl-0 = <&cif_clkout>;
+		port {
+			ucam_out1: endpoint {
+				//remote-endpoint = <&mipi_in_ucam0>;
+				remote-endpoint = <&mipi_in_ucam1>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
 };
 
 &i2c6 {
@@ -229,6 +274,70 @@
 	status = "okay";
 };
 
+&mipi_dphy_rx0 {
+	status = "disabled";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in_ucam0: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&ucam_out0>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dphy_rx0_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&isp0_mipi_in>;
+			};
+		};
+	};
+};
+
+&mipi_dphy_tx1rx1 {
+	status = "disabled";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in_ucam1: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&ucam_out1>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dphy_tx1rx1_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&isp1_mipi_in>;
+			};
+		};
+	};
+};
+
 &vopb {
 	assigned-clocks = <&cru DCLK_VOP0_DIV>;
 	assigned-clock-parents = <&cru PLL_CPLL>;
@@ -247,6 +356,34 @@
 	status = "okay";
 };
 
+&rkisp1_0 {
+	status = "disabled";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		isp0_mipi_in: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&dphy_rx0_out>;
+		};
+	};
+};
+
+&rkisp1_1 {
+	status = "disabled";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		isp1_mipi_in: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&dphy_tx1rx1_out>;
+		};
+	};
+};
+
 &route_edp {
 	status = "okay";
 };

From 6522127d551233149c04173d7b8ce89f97959106 Mon Sep 17 00:00:00 2001
From: ZhongYiChong <zyc@rock-chips.com>
Date: Thu, 1 Mar 2018 16:07:39 +0800
Subject: [PATCH 0049/1852] media: rockchip: isp1: fix config lsc error

LSC data table size is 17x17, but when configuring data to ISP,
should be aligned to 18x17. That means every last data of last
line should be filled with 0, and not filled with the data of
next line.

BUG=b:36227021
TEST=scarlet can preview.

Change-Id: I5e923529429a1c60efff3827e594f32db7112c1f
Signed-off-by: ZhongYiChong <zyc@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/942600
Commit-Ready: Jeffy Chen <jeffy.chen@rock-chips.com>
Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
---
 .../media/platform/rockchip/isp1/isp_params.c | 24 +++++++++----------
 drivers/media/platform/rockchip/isp1/regs.h   |  2 +-
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 84a1e7ffbfdea..0bb564513f443 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -243,14 +243,13 @@ __lsc_correct_matrix_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
 
 	/* program data tables (table size is 9 * 17 = 153) */
-	for (i = 0; i < ((CIF_ISP_LSC_SECTORS_MAX + 1) *
-	     (CIF_ISP_LSC_SECTORS_MAX + 1));
-	     i += CIF_ISP_LSC_SECTORS_MAX + 1) {
+	for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
+	     i += CIF_ISP_LSC_SECTORS_MAX) {
 		/*
 		 * 17 sectors with 2 values in one DWORD = 9
 		 * DWORDs (2nd value of last DWORD unused)
 		 */
-		for (j = 0; j < (CIF_ISP_LSC_SECTORS_MAX); j += 2) {
+		for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
 			data = CIF_ISP_LSC_TABLE_DATA(
 					pconfig->r_data_tbl[i + j],
 					pconfig->r_data_tbl[i + j + 1]);
@@ -275,29 +274,30 @@ __lsc_correct_matrix_config(struct rkisp1_isp_params_vdev *params_vdev,
 			rkisp1_iowrite32(params_vdev, data,
 					 CIF_ISP_LSC_B_TABLE_DATA);
 		}
+
 		data = CIF_ISP_LSC_TABLE_DATA(
-				pconfig->r_data_tbl[i + CIF_ISP_LSC_SECTORS_MAX],
+				pconfig->r_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
-				 CIF_ISP_LSC_R_TABLE_DATA);
+				CIF_ISP_LSC_R_TABLE_DATA);
 
 		data = CIF_ISP_LSC_TABLE_DATA(
-				pconfig->gr_data_tbl[i + CIF_ISP_LSC_SECTORS_MAX],
+				pconfig->gr_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
-				 CIF_ISP_LSC_GR_TABLE_DATA);
+				CIF_ISP_LSC_GR_TABLE_DATA);
 
 		data = CIF_ISP_LSC_TABLE_DATA(
-				pconfig->gb_data_tbl[i + CIF_ISP_LSC_SECTORS_MAX],
+				pconfig->gb_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
-				 CIF_ISP_LSC_GB_TABLE_DATA);
+				CIF_ISP_LSC_GB_TABLE_DATA);
 
 		data = CIF_ISP_LSC_TABLE_DATA(
-				pconfig->b_data_tbl[i + CIF_ISP_LSC_SECTORS_MAX],
+				pconfig->b_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
-				 CIF_ISP_LSC_B_TABLE_DATA);
+				CIF_ISP_LSC_B_TABLE_DATA);
 	}
 	isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
 				CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index b2495fa80ba7d..53977bc7e8795 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -504,7 +504,7 @@
 #define CIF_ISP_LSC_SECT_SIZE_RESERVED		0xFC00FC00
 #define CIF_ISP_LSC_GRAD_RESERVED		0xF000F000
 #define CIF_ISP_LSC_SAMPLE_RESERVED		0xF000F000
-#define CIF_ISP_LSC_SECTORS_MAX			16
+#define CIF_ISP_LSC_SECTORS_MAX			17
 #define CIF_ISP_LSC_TABLE_DATA(v0, v1)     \
 	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 12))
 #define CIF_ISP_LSC_SECT_SIZE(v0, v1)      \

From 0680711e21a65671f9dd3e0d0fa9d5942f79ef97 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Tue, 3 Jul 2018 17:07:47 +0800
Subject: [PATCH 0050/1852] arm: dts: rockchip: rk3308-voice-module: config vad

Change-Id: I764b5fe657a503d4a0efd12920054932c8b61dcf
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 .../rk3308-voice-module-board-v10-aarch32.dts |  9 +--------
 ...08-voice-module-mainboard-v10-aarch32.dtsi |  9 +--------
 .../dts/rk3308-voice-module-v10-aarch32.dtsi  | 19 +++++++++++++++++++
 3 files changed, 21 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
index f80efd24bdbd2..2efd960abf4b1 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
@@ -24,14 +24,7 @@
 
 &acodec {
 	status = "okay";
-
+	rockchip,no-deep-low-power;
 	/* ADC5-6 for 2ch capture, loopback to ADC3-4 */
 	rockchip,adc-grps-route = <2 1 3 0>;
 };
-
-&vad {
-	status = "disabled";
-	rockchip,audio-src = <&i2s_8ch_2>;
-	rockchip,mode = <1>;
-	#sound-dai-cells = <0>;
-};
diff --git a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
index 1953d3ff68d5b..85e11b26617a6 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
@@ -36,7 +36,7 @@
 
 &acodec {
 	status = "okay";
-
+	rockchip,no-deep-low-power;
 	/* ADC3-6 for 4ch capture, loopback to ADC7 */
 	rockchip,adc-grps-route = <1 2 3 0>;
 };
@@ -402,10 +402,3 @@
 	pinctrl-0 = <&uart4_xfer &uart4_cts>;
 	status = "okay";
 };
-
-&vad {
-	status = "disabled";
-	rockchip,audio-src = <&i2s_8ch_2>;
-	rockchip,mode = <1>;
-	#sound-dai-cells = <0>;
-};
diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index cfb74991e6e13..1a9fada7de48f 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -94,6 +94,7 @@
 		rockchip,mclk-fs = <256>;
 		rockchip,cpu = <&i2s_8ch_2>;
 		rockchip,codec = <&acodec>;
+		status = "disabled";
 	};
 
 	spdif_tx_sound: spdif-tx-sound {
@@ -108,6 +109,15 @@
 		};
 	};
 
+	vad-sound {
+		status = "okay";
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-vad";
+		rockchip,codec-hp-det;
+		rockchip,cpu = <&i2s_8ch_2>;
+		rockchip,codec = <&acodec>, <&vad>;
+	};
+
 	vdd_log: vdd_core: vdd-core {
 		compatible = "pwm-regulator";
 		pwms = <&pwm0 0 5000 1>;
@@ -320,3 +330,12 @@
 &usb_host0_ohci{
 	status = "okay";
 };
+
+&vad {
+	status = "okay";
+	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,det-channel = <0>;
+	rockchip,mode = <1>;
+	rockchip,buffer-time-ms = <500>;
+	#sound-dai-cells = <0>;
+};

From eab02705c988d77d5e1f95e94a3e98435895aef3 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 4 Jul 2018 11:52:23 +0800
Subject: [PATCH 0051/1852] ASoC: rk3308_codec: add loopback handle delay
 property

It may take different time for different PAs(AMPs) to
open, so the delay we need in loopback needs to be
flexible.

Change-Id: I76c98b769e382cef08a6e897bb1d527783660f3b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 2ae3d2a911023..3154bbf6a62f6 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -143,6 +143,7 @@ struct rk3308_codec_priv {
 	u32 loopback_grp;
 	u32 i2s_sdis[ADC_LR_GROUP_MAX];
 	u32 to_i2s_grps;
+	u32 delay_loopback_handle_ms;
 	int which_i2s;
 	int irq;
 	int adc_grp0_using_linein;
@@ -2765,7 +2766,7 @@ static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
 			if (capture_str->substream_opened)
 				queue_delayed_work(system_power_efficient_wq,
 						   &rk3308->loopback_work,
-						   msecs_to_jiffies(LOOPBACK_HANDLE_MS));
+						   msecs_to_jiffies(rk3308->delay_loopback_handle_ms));
 		} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
 			/*
 			 * Switch to dummy bist mode to kick the glitch during disable
@@ -3674,6 +3675,10 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	rk3308->no_deep_low_power =
 		of_property_read_bool(np, "rockchip,no-deep-low-power");
 
+	rk3308->delay_loopback_handle_ms = LOOPBACK_HANDLE_MS;
+	ret = of_property_read_u32(np, "rockchip,delay-loopback-handle-ms",
+				   &rk3308->delay_loopback_handle_ms);
+
 	rk3308->loopback_grp = LOOPBACK_NO_USE;
 	ret = of_property_read_u32(np, "rockchip,loopback-grp",
 				   &rk3308->loopback_grp);

From 5c7ebcb400bd7d2c9f941b33c897851f7b4016bd Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 4 Jul 2018 12:02:17 +0800
Subject: [PATCH 0052/1852] ASoC: rk3308_codec: add property
 'rockchip,delay-loopback-handle-ms'

Change-Id: Icf9384f15ccedee3f3c039cc55b506381712caae
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,rk3308-codec.txt         | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
index fbd3049d74c90..cea636a29d476 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
@@ -38,6 +38,8 @@ Optional properties:
   You need to add the property on dts:
   - rockchip,adc-grps-route = <3 0 2 1>;
 
+- rockchip,delay-loopback-handle-ms: This property points out that the delay for
+  handling ADC after enable PAs during loopback.
 - rockchip,loopback-grp: It points out the ADC group which is the loopback used.
 - rockchip,no-deep-low-power: The codec will not enter deep low power mode
   during suspend.

From 2cd1b7c3e88a039664a7a508ec1e1047142edd10 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 4 Jul 2018 20:34:18 +0800
Subject: [PATCH 0053/1852] ASoC: rk3308_codec: add support
 'rockchip,no-hp-det' property

Fix the incorrect switching LINEOUT to HPOUT if there
isn't no headphone and hp-det pin is hanging.

Change-Id: I902ce3e112049981300f786cefa247bd166e1c33
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 43 ++++++++++++++++++++-------------
 1 file changed, 26 insertions(+), 17 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 3154bbf6a62f6..77897f00196ef 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -163,6 +163,7 @@ struct rk3308_codec_priv {
 	bool hp_plugged;
 	bool loopback_dacs_enabled;
 	bool no_deep_low_power;
+	bool no_hp_det;
 	struct delayed_work hpdet_work;
 	struct delayed_work loopback_work;
 
@@ -2974,7 +2975,8 @@ static int rk3308_probe(struct snd_soc_codec *codec)
 	rk3308_codec_micbias_enable(rk3308, RK3308_ADC_MICBIAS_VOLT_0_85);
 
 	rk3308_codec_prepare(rk3308);
-	rk3308_codec_headset_detect_enable(rk3308);
+	if (!rk3308->no_hp_det)
+		rk3308_codec_headset_detect_enable(rk3308);
 
 	regcache_cache_only(rk3308->regmap, false);
 	regcache_sync(rk3308->regmap);
@@ -2988,7 +2990,8 @@ static int rk3308_remove(struct snd_soc_codec *codec)
 
 	rk3308_headphone_ctl(rk3308, 0);
 	rk3308_speaker_ctl(rk3308, 0);
-	rk3308_codec_headset_detect_disable(rk3308);
+	if (!rk3308->no_hp_det)
+		rk3308_codec_headset_detect_disable(rk3308);
 	rk3308_codec_micbias_disable(rk3308);
 	rk3308_codec_power_off(rk3308);
 
@@ -3675,6 +3678,9 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	rk3308->no_deep_low_power =
 		of_property_read_bool(np, "rockchip,no-deep-low-power");
 
+	rk3308->no_hp_det =
+		of_property_read_bool(np, "rockchip,no-hp-det");
+
 	rk3308->delay_loopback_handle_ms = LOOPBACK_HANDLE_MS;
 	ret = of_property_read_u32(np, "rockchip,delay-loopback-handle-ms",
 				   &rk3308->delay_loopback_handle_ms);
@@ -3715,25 +3721,28 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 		goto failed;
 	}
 
-	rk3308->irq = platform_get_irq(pdev, 0);
-	if (rk3308->irq < 0) {
-		dev_err(&pdev->dev, "Can not get codec irq\n");
-		goto failed;
-	}
+	if (!rk3308->no_hp_det) {
+		rk3308->irq = platform_get_irq(pdev, 0);
+		if (rk3308->irq < 0) {
+			dev_err(&pdev->dev, "Can not get codec irq\n");
+			goto failed;
+		}
 
-	INIT_DELAYED_WORK(&rk3308->hpdet_work, rk3308_codec_hpdetect_work);
-	INIT_DELAYED_WORK(&rk3308->loopback_work, rk3308_codec_loopback_work);
+		INIT_DELAYED_WORK(&rk3308->hpdet_work, rk3308_codec_hpdetect_work);
 
-	ret = devm_request_irq(&pdev->dev, rk3308->irq,
-			       rk3308_codec_hpdet_isr,
-			       0,
-			       "acodec-hpdet",
-			       rk3308);
-	if (ret < 0) {
-		dev_err(&pdev->dev, "Failed to request IRQ: %d\n", ret);
-		goto failed;
+		ret = devm_request_irq(&pdev->dev, rk3308->irq,
+				       rk3308_codec_hpdet_isr,
+				       0,
+				       "acodec-hpdet",
+				       rk3308);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "Failed to request IRQ: %d\n", ret);
+			goto failed;
+		}
 	}
 
+	INIT_DELAYED_WORK(&rk3308->loopback_work, rk3308_codec_loopback_work);
+
 	rk3308->adc_grp0_using_linein = ADC_GRP0_MICIN;
 	rk3308->dac_output = DAC_LINEOUT;
 	rk3308->adc_zerocross = 1;

From bf0a4cf88f2eabc03ddf4bdb836b26a380a9a79b Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 4 Jul 2018 20:41:48 +0800
Subject: [PATCH 0054/1852] ASoC: rk3308_codec: add 'rockchip,no-hp-det'
 property

Change-Id: Ief8c0e7f5fcd21cdc7d115bbcca4eeb7050a373d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,rk3308-codec.txt         | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
index cea636a29d476..b04be9ac11197 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
@@ -43,6 +43,8 @@ Optional properties:
 - rockchip,loopback-grp: It points out the ADC group which is the loopback used.
 - rockchip,no-deep-low-power: The codec will not enter deep low power mode
   during suspend.
+- rockchip,no-hp-det: If there is no headphone on boards, we don't need to
+  enable headphone detection.
 - hp-ctl-gpios: The gpio of head phone controller.
 - spk-ctl-gpios: The gpio of speak controller.
 

From 6d2b656bbf9f7ab51d2a247307189dc4ccaa2e2f Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 4 Jul 2018 20:38:00 +0800
Subject: [PATCH 0055/1852] ARM: dts: rockchip: enable 'rockchip,no-hp-det' for
 rk3308 voice modules

There isn't headphone on all of rk3308 voice modules,
so we don't need to enable headphone detection.

Change-Id: I526dc02dfb3c0b92503c8a7821baa82b87c8c996
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 1a9fada7de48f..ef8c465376931 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -181,6 +181,7 @@
 &acodec {
 	status = "disabled";
 
+	rockchip,no-hp-det;
 	rockchip,loopback-grp = <1>;
 	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
 };

From 5ba390b2e440f9da933c34cf75a5f925b749208b Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Date: Tue, 8 Aug 2017 08:56:23 -0400
Subject: [PATCH 0056/1852] UPSTREAM: media: uvcvideo: Convert from using an
 atomic variable to a reference count

When adding support for metadata nodes, we'll have to keep video
devices registered until all metadata nodes are closed too. Since
this has nothing to do with stream counting, replace the nstreams
atomic variable with a reference counter.

Change-Id: Ied4c660b0cc618f010e4fffc3c3e06a2f71f4aa7
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 9d15cd958c172c8b02da6ee28638ccbbf7933175)
---
 drivers/media/usb/uvc/uvc_driver.c | 25 +++++++++----------------
 drivers/media/usb/uvc/uvcvideo.h   |  2 +-
 2 files changed, 10 insertions(+), 17 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index d7acd1245dfbb..8b6dcaebc0f36 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -1768,8 +1768,9 @@ static int uvc_scan_device(struct uvc_device *dev)
  * already been canceled by the USB core. There is no need to kill the
  * interrupt URB manually.
  */
-static void uvc_delete(struct uvc_device *dev)
+static void uvc_delete(struct kref *kref)
 {
+	struct uvc_device *dev = container_of(kref, struct uvc_device, ref);
 	struct list_head *p, *n;
 
 	uvc_status_cleanup(dev);
@@ -1819,11 +1820,7 @@ static void uvc_release(struct video_device *vdev)
 	struct uvc_streaming *stream = video_get_drvdata(vdev);
 	struct uvc_device *dev = stream->dev;
 
-	/* Decrement the registered streams count and delete the device when it
-	 * reaches zero.
-	 */
-	if (atomic_dec_and_test(&dev->nstreams))
-		uvc_delete(dev);
+	kref_put(&dev->ref, uvc_delete);
 }
 
 /*
@@ -1835,10 +1832,10 @@ static void uvc_unregister_video(struct uvc_device *dev)
 
 	/* Unregistering all video devices might result in uvc_delete() being
 	 * called from inside the loop if there's no open file handle. To avoid
-	 * that, increment the stream count before iterating over the streams
-	 * and decrement it when done.
+	 * that, increment the refcount before iterating over the streams and
+	 * decrement it when done.
 	 */
-	atomic_inc(&dev->nstreams);
+	kref_get(&dev->ref);
 
 	list_for_each_entry(stream, &dev->streams, list) {
 		if (!video_is_registered(&stream->vdev))
@@ -1849,11 +1846,7 @@ static void uvc_unregister_video(struct uvc_device *dev)
 		uvc_debugfs_cleanup_stream(stream);
 	}
 
-	/* Decrement the stream count and call uvc_delete explicitly if there
-	 * are no stream left.
-	 */
-	if (atomic_dec_and_test(&dev->nstreams))
-		uvc_delete(dev);
+	kref_put(&dev->ref, uvc_delete);
 }
 
 static int uvc_register_video(struct uvc_device *dev,
@@ -1911,7 +1904,7 @@ static int uvc_register_video(struct uvc_device *dev,
 	else
 		stream->chain->caps |= V4L2_CAP_VIDEO_OUTPUT;
 
-	atomic_inc(&dev->nstreams);
+	kref_get(&dev->ref);
 	return 0;
 }
 
@@ -1995,7 +1988,7 @@ static int uvc_probe(struct usb_interface *intf,
 	INIT_LIST_HEAD(&dev->entities);
 	INIT_LIST_HEAD(&dev->chains);
 	INIT_LIST_HEAD(&dev->streams);
-	atomic_set(&dev->nstreams, 0);
+	kref_init(&dev->ref);
 	atomic_set(&dev->nmappings, 0);
 	mutex_init(&dev->lock);
 
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 7e4d3eea371b6..a20e5aa7c7251 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -554,7 +554,7 @@ struct uvc_device {
 
 	/* Video Streaming interfaces */
 	struct list_head streams;
-	atomic_t nstreams;
+	struct kref ref;
 
 	/* Status Interrupt Endpoint */
 	struct usb_host_endpoint *int_ep;

From d13049a2ae83038ed60853bf8b6bc8a8acb0a0eb Mon Sep 17 00:00:00 2001
From: Julia Lawall <Julia.Lawall@lip6.fr>
Date: Tue, 8 Aug 2017 08:56:24 -0400
Subject: [PATCH 0057/1852] UPSTREAM: media: uvcvideo: Constify video_subdev
 structures

uvc_subdev_ops is only passed as the second argument of
v4l2_subdev_init, which is const, so uvc_subdev_ops can be
const as well.

Done with the help of Coccinelle.

Change-Id: Ic146384e5570ad6d249e661a73138ad396c6e3a6
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 54220790149809fd48dfb999f732b345b7097a1a)
---
 drivers/media/usb/uvc/uvc_entity.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/usb/uvc/uvc_entity.c b/drivers/media/usb/uvc/uvc_entity.c
index dc56a59ecadc4..5670f714685ff 100644
--- a/drivers/media/usb/uvc/uvc_entity.c
+++ b/drivers/media/usb/uvc/uvc_entity.c
@@ -68,7 +68,7 @@ static int uvc_mc_register_entity(struct uvc_video_chain *chain,
 	return v4l2_device_register_subdev(&chain->dev->vdev, &entity->subdev);
 }
 
-static struct v4l2_subdev_ops uvc_subdev_ops = {
+static const struct v4l2_subdev_ops uvc_subdev_ops = {
 };
 
 void uvc_mc_cleanup_entity(struct uvc_entity *entity)

From 70161edcdc3bc5ce32d73037326a7a8b37b0659b Mon Sep 17 00:00:00 2001
From: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Date: Mon, 6 Nov 2017 15:13:28 -0500
Subject: [PATCH 0058/1852] UPSTREAM: media: uvcvideo: Add D3DFMT_L8 support

Microsoft HoloLense UVC sensor uses D3DFMT instead of FOURCC when
exposing formats. This adds support for D3DFMT_L8 as exposed from
the Acer Windows Mixed Reality Headset.

Change-Id: I5689e85bd600029f3fcef37860483c19d639d6ed
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit e96cdc9a0aa2fcaa276a76e8ffa86fc10a1d3d99)
---
 drivers/media/usb/uvc/uvc_driver.c | 5 +++++
 drivers/media/usb/uvc/uvcvideo.h   | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index 8b6dcaebc0f36..237044a000c21 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -94,6 +94,11 @@ static struct uvc_format_desc uvc_fmts[] = {
 		.guid		= UVC_GUID_FORMAT_Y8,
 		.fcc		= V4L2_PIX_FMT_GREY,
 	},
+	{
+		.name		= "Greyscale 8-bit (D3DFMT_L8)",
+		.guid		= UVC_GUID_FORMAT_D3DFMT_L8,
+		.fcc		= V4L2_PIX_FMT_GREY,
+	},
 	{
 		.name		= "Greyscale 10-bit (Y10 )",
 		.guid		= UVC_GUID_FORMAT_Y10,
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index a20e5aa7c7251..3cf2c7db74fe5 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -132,6 +132,11 @@
 	{ 'R',  'W',  '1',  '0', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
 
+#define UVC_GUID_FORMAT_D3DFMT_L8 \
+	{0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, \
+	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
+
+
 /* ------------------------------------------------------------------------
  * Driver specific constants.
  */

From 248c3b5b6c804292b6a555f948126a1e4f547fbc Mon Sep 17 00:00:00 2001
From: Baoyou Xie <baoyou.xie@linaro.org>
Date: Wed, 6 Sep 2017 22:59:48 -0400
Subject: [PATCH 0059/1852] UPSTREAM: media: uvcvideo: Mark buffer error where
 overflow

Some cameras post inaccurate frame where next frame data overlap
it. this results in screen flicker, and it need to be prevented.

So this patch marks the buffer error to discard the frame where
buffer overflow.

Change-Id: Ibd41b93cf8376b126b6d107a59ab22907fb839e6
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit dfc1648c576719b5a2701805aab1e208789d5969)
---
 drivers/media/usb/uvc/uvc_video.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 2b276ab7764fc..684c34257282f 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1088,6 +1088,7 @@ static void uvc_video_decode_data(struct uvc_streaming *stream,
 	/* Complete the current frame if the buffer size was exceeded. */
 	if (len > maxlen) {
 		uvc_trace(UVC_TRACE_FRAME, "Frame complete (overflow).\n");
+		buf->error = 1;
 		buf->state = UVC_BUF_STATE_READY;
 	}
 }

From 1baf1b5d1d7a7f42a5183403afee23f4136aa024 Mon Sep 17 00:00:00 2001
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Tue, 17 Oct 2017 13:15:54 -0400
Subject: [PATCH 0060/1852] UPSTREAM: media: uvcvideo: Stream error events
 carry no data

According to the UVC specification, stream error events carry no data.
Fix a buffer overflow (that should be harmless given data alignment)
when reporting the stream error event by removing the data byte from the
message.

Change-Id: I0603ed4a092bc02ae2a339c96d1433ec8463336a
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 0393e735649dc41358adb7b603bd57dad1ed3260)
---
 drivers/media/usb/uvc/uvc_status.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_status.c b/drivers/media/usb/uvc/uvc_status.c
index f552ab9979568..1ef20e74b7aca 100644
--- a/drivers/media/usb/uvc/uvc_status.c
+++ b/drivers/media/usb/uvc/uvc_status.c
@@ -93,8 +93,9 @@ static void uvc_event_streaming(struct uvc_device *dev, __u8 *data, int len)
 			data[1], data[3] ? "pressed" : "released", len);
 		uvc_input_report_key(dev, KEY_CAMERA, data[3]);
 	} else {
-		uvc_trace(UVC_TRACE_STATUS, "Stream %u error event %02x %02x "
-			"len %d.\n", data[1], data[2], data[3], len);
+		uvc_trace(UVC_TRACE_STATUS,
+			  "Stream %u error event %02x len %d.\n",
+			  data[1], data[2], len);
 	}
 }
 

From 7e3f2b1e3d1121ea6724ce306ce326418b27350b Mon Sep 17 00:00:00 2001
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Mon, 4 Dec 2017 18:05:17 -0500
Subject: [PATCH 0061/1852] UPSTREAM: media: uvcvideo: Factor out video device
 registration to a function

The function will then be used to register the video device for metadata
capture.

Change-Id: I5aa5604af149dc108d65575af37fcbdd6c32c403
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Tested-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 31a96f4c872e8fb953c853630f69d5de6ec961c9)
---
 drivers/media/usb/uvc/uvc_driver.c | 68 +++++++++++++++++++-----------
 drivers/media/usb/uvc/uvcvideo.h   |  8 ++++
 2 files changed, 51 insertions(+), 25 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index 237044a000c21..a5fcbdcac1ddc 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -25,6 +25,7 @@
 #include <asm/unaligned.h>
 
 #include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
 
 #include "uvcvideo.h"
 
@@ -1854,52 +1855,65 @@ static void uvc_unregister_video(struct uvc_device *dev)
 	kref_put(&dev->ref, uvc_delete);
 }
 
-static int uvc_register_video(struct uvc_device *dev,
-		struct uvc_streaming *stream)
+int uvc_register_video_device(struct uvc_device *dev,
+			      struct uvc_streaming *stream,
+			      struct video_device *vdev,
+			      struct uvc_video_queue *queue,
+			      enum v4l2_buf_type type,
+			      const struct v4l2_file_operations *fops,
+			      const struct v4l2_ioctl_ops *ioctl_ops)
 {
-	struct video_device *vdev = &stream->vdev;
 	int ret;
 
 	/* Initialize the video buffers queue. */
-	ret = uvc_queue_init(&stream->queue, stream->type, !uvc_no_drop_param);
+	ret = uvc_queue_init(queue, type, !uvc_no_drop_param);
 	if (ret)
 		return ret;
 
-	/* Initialize the streaming interface with default streaming
-	 * parameters.
-	 */
-	ret = uvc_video_init(stream);
-	if (ret < 0) {
-		uvc_printk(KERN_ERR, "Failed to initialize the device "
-			"(%d).\n", ret);
-		return ret;
-	}
-
-	uvc_debugfs_init_stream(stream);
-
 	/* Register the device with V4L. */
 
-	/* We already hold a reference to dev->udev. The video device will be
+	/*
+	 * We already hold a reference to dev->udev. The video device will be
 	 * unregistered before the reference is released, so we don't need to
 	 * get another one.
 	 */
 	vdev->v4l2_dev = &dev->vdev;
-	vdev->fops = &uvc_fops;
-	vdev->ioctl_ops = &uvc_ioctl_ops;
+	vdev->fops = fops;
+	vdev->ioctl_ops = ioctl_ops;
 	vdev->release = uvc_release;
 	vdev->prio = &stream->chain->prio;
-	if (stream->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
+	if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 		vdev->vfl_dir = VFL_DIR_TX;
+	else
+		vdev->vfl_dir = VFL_DIR_RX;
 	strlcpy(vdev->name, dev->name, sizeof vdev->name);
 
-	/* Set the driver data before calling video_register_device, otherwise
-	 * uvc_v4l2_open might race us.
+	/*
+	 * Set the driver data before calling video_register_device, otherwise
+	 * the file open() handler might race us.
 	 */
 	video_set_drvdata(vdev, stream);
 
 	ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
 	if (ret < 0) {
-		uvc_printk(KERN_ERR, "Failed to register video device (%d).\n",
+		uvc_printk(KERN_ERR, "Failed to register %s device (%d).\n",
+			   v4l2_type_names[type], ret);
+		return ret;
+	}
+
+	kref_get(&dev->ref);
+	return 0;
+}
+
+static int uvc_register_video(struct uvc_device *dev,
+		struct uvc_streaming *stream)
+{
+	int ret;
+
+	/* Initialize the streaming interface with default parameters. */
+	ret = uvc_video_init(stream);
+	if (ret < 0) {
+		uvc_printk(KERN_ERR, "Failed to initialize the device (%d).\n",
 			   ret);
 		return ret;
 	}
@@ -1909,8 +1923,12 @@ static int uvc_register_video(struct uvc_device *dev,
 	else
 		stream->chain->caps |= V4L2_CAP_VIDEO_OUTPUT;
 
-	kref_get(&dev->ref);
-	return 0;
+	uvc_debugfs_init_stream(stream);
+
+	/* Register the device with V4L. */
+	return uvc_register_video_device(dev, stream, &stream->vdev,
+					 &stream->queue, stream->type,
+					 &uvc_fops, &uvc_ioctl_ops);
 }
 
 /*
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 3cf2c7db74fe5..03a4bd55f63cc 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -694,6 +694,14 @@ void uvc_video_clock_update(struct uvc_streaming *stream,
 			    struct vb2_v4l2_buffer *vbuf,
 			    struct uvc_buffer *buf);
 
+int uvc_register_video_device(struct uvc_device *dev,
+			      struct uvc_streaming *stream,
+			      struct video_device *vdev,
+			      struct uvc_video_queue *queue,
+			      enum v4l2_buf_type type,
+			      const struct v4l2_file_operations *fops,
+			      const struct v4l2_ioctl_ops *ioctl_ops);
+
 /* Status */
 extern int uvc_status_init(struct uvc_device *dev);
 extern void uvc_status_cleanup(struct uvc_device *dev);

From 38aa367db29773ca074c62ada4adfd787db6b49c Mon Sep 17 00:00:00 2001
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Mon, 4 Dec 2017 18:06:01 -0500
Subject: [PATCH 0062/1852] UPSTREAM: media: uvcvideo: Report V4L2 device caps
 through the video_device structure

The V4L2 core populates the struct v4l2_capability device_caps field
from the same field in video_device. There's no need to handle that
manually in the driver.

Change-Id: I5a98bd1ba87a4029e3de74b3ac4c21e90fe6e3a2
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Tested-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 94c53e26dc74744cc4f9a8ddc593b7aef96ba764)
---
 drivers/media/usb/uvc/uvc_driver.c | 11 +++++++++++
 drivers/media/usb/uvc/uvc_v4l2.c   |  4 ----
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index a5fcbdcac1ddc..60276d3eba090 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -1886,6 +1886,17 @@ int uvc_register_video_device(struct uvc_device *dev,
 		vdev->vfl_dir = VFL_DIR_TX;
 	else
 		vdev->vfl_dir = VFL_DIR_RX;
+
+	switch (type) {
+	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+	default:
+		vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+		break;
+	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
+		vdev->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING;
+		break;
+	}
+
 	strlcpy(vdev->name, dev->name, sizeof vdev->name);
 
 	/*
diff --git a/drivers/media/usb/uvc/uvc_v4l2.c b/drivers/media/usb/uvc/uvc_v4l2.c
index 0e7d16fe84d42..16971cab03a69 100644
--- a/drivers/media/usb/uvc/uvc_v4l2.c
+++ b/drivers/media/usb/uvc/uvc_v4l2.c
@@ -558,10 +558,6 @@ static int uvc_ioctl_querycap(struct file *file, void *fh,
 	usb_make_path(stream->dev->udev, cap->bus_info, sizeof(cap->bus_info));
 	cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
 			  | chain->caps;
-	if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
-		cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
-	else
-		cap->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING;
 
 	return 0;
 }

From a4c26ec0719ff4403067263867696d28605d0f64 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Date: Wed, 8 Nov 2017 11:00:13 -0500
Subject: [PATCH 0063/1852] UPSTREAM: media: uvcvideo: Add extensible device
 information

Currently the UVC driver assigns a quirk bitmask to the .driver_info
field of struct usb_device_id. This patch instroduces a struct to store
quirks and possibly other per-device parameters in the future.

Conflicts:
        drivers/media/usb/uvc/uvc_driver.c

Change-Id: I0c823a17cc15f73eb7806804b9b8d42c109c86b9
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 3bc85817d7982ed53fbc9b150b0205beff68ca5c)
---
 drivers/media/usb/uvc/uvc_driver.c | 141 +++++++++++++++++++----------
 1 file changed, 94 insertions(+), 47 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index 60276d3eba090..45a0da2686998 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -2000,11 +2000,18 @@ static int uvc_register_chains(struct uvc_device *dev)
  * USB probe, disconnect, suspend and resume
  */
 
+struct uvc_device_info {
+	u32	quirks;
+};
+
 static int uvc_probe(struct usb_interface *intf,
 		     const struct usb_device_id *id)
 {
 	struct usb_device *udev = interface_to_usbdev(intf);
 	struct uvc_device *dev;
+	const struct uvc_device_info *info =
+		(const struct uvc_device_info *)id->driver_info;
+	u32 quirks = info ? info->quirks : 0;
 	int ret;
 
 	if (id->idVendor && id->idProduct)
@@ -2030,7 +2037,7 @@ static int uvc_probe(struct usb_interface *intf,
 	dev->intf = usb_get_intf(intf);
 	dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber;
 	dev->quirks = (uvc_quirks_param == -1)
-		    ? id->driver_info : uvc_quirks_param;
+		    ? quirks : uvc_quirks_param;
 
 	if (udev->product != NULL)
 		strlcpy(dev->name, udev->product, sizeof dev->name);
@@ -2053,7 +2060,7 @@ static int uvc_probe(struct usb_interface *intf,
 		le16_to_cpu(udev->descriptor.idVendor),
 		le16_to_cpu(udev->descriptor.idProduct));
 
-	if (dev->quirks != id->driver_info) {
+	if (dev->quirks != quirks) {
 		uvc_printk(KERN_INFO, "Forcing device quirks to 0x%x by module "
 			"parameter for testing purpose.\n", dev->quirks);
 		uvc_printk(KERN_INFO, "Please report required quirks to the "
@@ -2252,6 +2259,28 @@ MODULE_PARM_DESC(timeout, "Streaming control requests timeout");
  * Driver initialization and cleanup
  */
 
+static const struct uvc_device_info uvc_quirk_probe_minmax = {
+	.quirks = UVC_QUIRK_PROBE_MINMAX,
+};
+
+static const struct uvc_device_info uvc_quirk_fix_bandwidth = {
+	.quirks = UVC_QUIRK_FIX_BANDWIDTH,
+};
+
+static const struct uvc_device_info uvc_quirk_probe_def = {
+	.quirks = UVC_QUIRK_PROBE_DEF,
+};
+
+static const struct uvc_device_info uvc_quirk_stream_no_fid = {
+	.quirks = UVC_QUIRK_STREAM_NO_FID,
+};
+
+static const struct uvc_device_info uvc_quirk_force_y8 = {
+	.quirks = UVC_QUIRK_FORCE_Y8,
+};
+
+#define UVC_QUIRK_INFO(q) (kernel_ulong_t)&(struct uvc_device_info){.quirks = q}
+
 /*
  * The Logitech cameras listed below have their interface class set to
  * VENDOR_SPEC because they don't announce themselves as UVC devices, even
@@ -2266,7 +2295,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Genius eFace 2025 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2275,7 +2304,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Microsoft Lifecam NX-6000 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2284,7 +2313,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Microsoft Lifecam NX-3000 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2293,7 +2322,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Microsoft Lifecam VX-7000 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2302,7 +2331,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Logitech Quickcam Fusion */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2359,7 +2388,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_RESTORE_CTRLS_ON_INIT },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_RESTORE_CTRLS_ON_INIT) },
 	/* Chicony CNF7129 (Asus EEE 100HE) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2368,7 +2397,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_RESTRICT_FRAME_RATE },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_RESTRICT_FRAME_RATE) },
 	/* Alcor Micro AU3820 (Future Boy PC USB Webcam) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2377,7 +2406,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Dell XPS m1530 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2386,7 +2415,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info 		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info 		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Dell SP2008WFP Monitor */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2395,7 +2424,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info 		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info 		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Dell Alienware X51 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2404,7 +2433,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info	= UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Dell Studio Hybrid 140g (OmniVision webcam) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2413,7 +2442,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Dell XPS M1330 (OmniVision OV7670 webcam) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2422,7 +2451,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Apple Built-In iSight */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2431,8 +2460,17 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info 		= UVC_QUIRK_PROBE_MINMAX
-				| UVC_QUIRK_BUILTIN_ISIGHT },
+	  .driver_info 		= UVC_QUIRK_INFO(UVC_QUIRK_PROBE_MINMAX
+					| UVC_QUIRK_BUILTIN_ISIGHT) },
+	/* Apple Built-In iSight via iBridge */
+	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
+				| USB_DEVICE_ID_MATCH_INT_INFO,
+	  .idVendor		= 0x05ac,
+	  .idProduct		= 0x8600,
+	  .bInterfaceClass	= USB_CLASS_VIDEO,
+	  .bInterfaceSubClass	= 1,
+	  .bInterfaceProtocol	= 0,
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* Foxlink ("HP Webcam" on HP Mini 5103) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2441,7 +2479,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FIX_BANDWIDTH },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
 	/* Genesys Logic USB 2.0 PC Camera */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2450,7 +2488,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Hercules Classic Silver */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2459,7 +2497,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FIX_BANDWIDTH },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
 	/* ViMicro Vega */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2468,7 +2506,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FIX_BANDWIDTH },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
 	/* ViMicro - Minoru3D */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2477,7 +2515,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FIX_BANDWIDTH },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
 	/* ViMicro Venus - Minoru3D */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2486,7 +2524,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FIX_BANDWIDTH },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_fix_bandwidth },
 	/* Ophir Optronics - SPCAM 620U */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2495,7 +2533,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* MT6227 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2504,8 +2542,8 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX
-				| UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_PROBE_MINMAX
+					| UVC_QUIRK_PROBE_DEF) },
 	/* IMC Networks (Medion Akoya) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2514,7 +2552,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* JMicron USB2.0 XGA WebCam */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2523,7 +2561,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Syntek (HP Spartan) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2532,7 +2570,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Syntek (Samsung Q310) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2541,7 +2579,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Syntek (Packard Bell EasyNote MX52 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2550,7 +2588,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Syntek (Asus F9SG) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2559,7 +2597,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Syntek (Asus U3S) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2568,7 +2606,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Syntek (JAOtech Smart Terminal) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2577,7 +2615,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Miricle 307K */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2586,7 +2624,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Lenovo Thinkpad SL400/SL500 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2595,7 +2633,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_stream_no_fid },
 	/* Aveo Technology USB 2.0 Camera */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2604,8 +2642,8 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX
-				| UVC_QUIRK_PROBE_EXTRAFIELDS },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_PROBE_MINMAX
+					| UVC_QUIRK_PROBE_EXTRAFIELDS) },
 	/* Aveo Technology USB 2.0 Camera (Tasco USB Microscope) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2622,7 +2660,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_EXTRAFIELDS },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_PROBE_EXTRAFIELDS) },
 	/* Manta MM-353 Plako */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2631,7 +2669,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* FSC WebCam V30S */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2640,7 +2678,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* Arkmicro unbranded */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2649,7 +2687,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_DEF },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_def },
 	/* The Imaging Source USB CCD cameras */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2668,7 +2706,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_STATUS_INTERVAL },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_STATUS_INTERVAL) },
 	/* MSI StarCam 370i */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2677,7 +2715,7 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_probe_minmax },
 	/* SiGma Micro USB Web Camera */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2686,8 +2724,8 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_PROBE_MINMAX
-				| UVC_QUIRK_IGNORE_SELECTOR_UNIT },
+	  .driver_info		= UVC_QUIRK_INFO(UVC_QUIRK_PROBE_MINMAX
+					| UVC_QUIRK_IGNORE_SELECTOR_UNIT) },
 	/* Oculus VR Positional Tracker DK2 */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2696,7 +2734,16 @@ static struct usb_device_id uvc_ids[] = {
 	  .bInterfaceClass	= USB_CLASS_VIDEO,
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
-	  .driver_info		= UVC_QUIRK_FORCE_Y8 },
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_force_y8 },
+	/* Oculus VR Rift Sensor */
+	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
+				| USB_DEVICE_ID_MATCH_INT_INFO,
+	  .idVendor		= 0x2833,
+	  .idProduct		= 0x0211,
+	  .bInterfaceClass	= USB_CLASS_VENDOR_SPEC,
+	  .bInterfaceSubClass	= 1,
+	  .bInterfaceProtocol	= 0,
+	  .driver_info		= (kernel_ulong_t)&uvc_quirk_force_y8 },
 	/* Generic USB Video Class */
 	{ USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, 0) },
 	{}

From 1add5ad068d6c499518226e58017d80ccbed7243 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Date: Wed, 8 Nov 2017 11:00:12 -0500
Subject: [PATCH 0064/1852] UPSTREAM: media: v4l: Add a UVC Metadata format

Add a pixel format, used by the UVC driver to stream metadata.

Conflicts:
        Documentation/media/uapi/v4l/meta-formats.rst
        drivers/media/v4l2-core/v4l2-ioctl.c
        include/uapi/linux/videodev2.h

Change-Id: I979fd6b4d5d24510e47a1cfe525e8ae0a1a573ee
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 563a01e1012dddbe120d1e1e1c466ea0639a098b)
---
 Documentation/media/uapi/v4l/meta-formats.rst | 15 ++++++
 .../media/uapi/v4l/pixfmt-meta-uvc.rst        | 51 +++++++++++++++++++
 drivers/media/v4l2-core/v4l2-ioctl.c          |  1 +
 include/uapi/linux/videodev2.h                |  3 ++
 4 files changed, 70 insertions(+)
 create mode 100644 Documentation/media/uapi/v4l/meta-formats.rst
 create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst

diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst
new file mode 100644
index 0000000000000..386feadbd1c35
--- /dev/null
+++ b/Documentation/media/uapi/v4l/meta-formats.rst
@@ -0,0 +1,15 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _meta-formats:
+
+****************
+Metadata Formats
+****************
+
+These formats are used for the :ref:`metadata` interface only.
+
+
+.. toctree::
+    :maxdepth: 1
+
+    pixfmt-meta-uvc
diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst b/Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst
new file mode 100644
index 0000000000000..b5165dc090c2f
--- /dev/null
+++ b/Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst
@@ -0,0 +1,51 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _v4l2-meta-fmt-uvc:
+
+*******************************
+V4L2_META_FMT_UVC ('UVCH')
+*******************************
+
+UVC Payload Header Data
+
+
+Description
+===========
+
+This format describes standard UVC metadata, extracted from UVC packet headers
+and provided by the UVC driver through metadata video nodes. That data includes
+exact copies of the standard part of UVC Payload Header contents and auxiliary
+timing information, required for precise interpretation of timestamps, contained
+in those headers. See section "2.4.3.3 Video and Still Image Payload Headers" of
+the "UVC 1.5 Class specification" for details.
+
+Each UVC payload header can be between 2 and 12 bytes large. Buffers can
+contain multiple headers, if multiple such headers have been transmitted by the
+camera for the respective frame. However, the driver may drop headers when the
+buffer is full, when they contain no useful information (e.g. those without the
+SCR field or with that field identical to the previous header), or generally to
+perform rate limiting when the device sends a large number of headers.
+
+Each individual block contains the following fields:
+
+.. flat-table:: UVC Metadata Block
+    :widths: 1 4
+    :header-rows:  1
+    :stub-columns: 0
+
+    * - Field
+      - Description
+    * - __u64 ts;
+      - system timestamp in host byte order, measured by the driver upon
+        reception of the payload
+    * - __u16 sof;
+      - USB Frame Number in host byte order, also obtained by the driver as
+        close as possible to the above timestamp to enable correlation between
+        them
+    * - :cspan:`1` *The rest is an exact copy of the UVC payload header:*
+    * - __u8 length;
+      - length of the rest of the block, including this field
+    * - __u8 flags;
+      - Flags, indicating presence of other standard UVC fields
+    * - __u8 buf[];
+      - The rest of the header, possibly including UVC PTS and SCR fields
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index c2ffe1a402273..29dd31748f18f 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1259,6 +1259,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
 	case V4L2_SDR_FMT_RU12LE:	descr = "Real U12LE"; break;
 	case V4L2_META_FMT_RK_ISP1_PARAMS:	descr = "Rockchip ISP1 3A params"; break;
 	case V4L2_META_FMT_RK_ISP1_STAT_3A:	descr = "Rockchip ISP1 3A statistics"; break;
+	case V4L2_META_FMT_UVC:		descr = "UVC payload header metadata"; break;
 
 	default:
 		/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 92e2413508480..e21c709f18ef9 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -646,6 +646,9 @@ struct v4l2_pix_format {
 #define V4L2_META_FMT_RK_ISP1_PARAMS	v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
 #define V4L2_META_FMT_RK_ISP1_STAT_3A	v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
 
+/* Meta-data formats */
+#define V4L2_META_FMT_UVC         v4l2_fourcc('U', 'V', 'C', 'H') /* UVC Payload Header metadata */
+
 /* priv field value to indicates that subsequent fields are valid. */
 #define V4L2_PIX_FMT_PRIV_MAGIC		0xfeedcafe
 

From de050de1dfd4b0d74bfb051703931b314aaacd60 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Mon, 3 Apr 2017 08:25:31 -0300
Subject: [PATCH 0065/1852] UPSTREAM: [media] uvcvideo: Don't record
 timespec_sub

The statistics function subtracts two timespecs manually. A helper is
provided by the kernel to do this.

Replace the implementation, using the helper.

Change-Id: I1fc2cdfad723456045515364846958814b30f666
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 52276df0b1ce3a833293f4b57fc3b62d6f540901)
---
 drivers/media/usb/uvc/uvc_video.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 684c34257282f..3a960e15612a6 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -871,14 +871,8 @@ size_t uvc_video_stats_dump(struct uvc_streaming *stream, char *buf,
 	struct timespec ts;
 	size_t count = 0;
 
-	ts.tv_sec = stream->stats.stream.stop_ts.tv_sec
-		  - stream->stats.stream.start_ts.tv_sec;
-	ts.tv_nsec = stream->stats.stream.stop_ts.tv_nsec
-		   - stream->stats.stream.start_ts.tv_nsec;
-	if (ts.tv_nsec < 0) {
-		ts.tv_sec--;
-		ts.tv_nsec += 1000000000;
-	}
+	ts = timespec_sub(stream->stats.stream.stop_ts,
+			  stream->stats.stream.start_ts);
 
 	/* Compute the SCR.SOF frequency estimate. At the nominal 1kHz SOF
 	 * frequency this will not overflow before more than 1h.

From f6f1cd5fb168733b246430a94d1d76ed6f5732f5 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Mon, 3 Apr 2017 08:25:32 -0300
Subject: [PATCH 0066/1852] UPSTREAM: [media] uvcvideo: Fix empty packet
 statistic

The frame counters are inadvertently counting packets with content as
empty.

Fix it by correcting the logic expression

Change-Id: I9e77fcebae2130f534dbac0932b405dd26e4033f
Fixes: 7bc5edb00bbd [media] uvcvideo: Extract video stream statistics
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 360a3a90c6261fe24a959ff38f8f6c3a8468f23c)
---
 drivers/media/usb/uvc/uvc_video.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 3a960e15612a6..edeeacff1e19c 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -821,7 +821,7 @@ static void uvc_video_stats_decode(struct uvc_streaming *stream,
 
 	/* Update the packets counters. */
 	stream->stats.frame.nb_packets++;
-	if (len > header_size)
+	if (len <= header_size)
 		stream->stats.frame.nb_empty++;
 
 	if (data[1] & UVC_STREAM_ERR)

From ccac49a63cb29af017812f9bf1e804ffbd2f5634 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Date: Wed, 6 Dec 2017 10:15:40 -0500
Subject: [PATCH 0067/1852] UPSTREAM: media: uvcvideo: Add a metadata device
 node

Some UVC video cameras contain metadata in their payload headers. This
patch extracts that data, adding more clock synchronisation information,
on both bulk and isochronous endpoints and makes it available to the user
space on a separate video node, using the V4L2_CAP_META_CAPTURE capability
and the V4L2_BUF_TYPE_META_CAPTURE buffer queue type. By default, only the
V4L2_META_FMT_UVC pixel format is available from those nodes. However,
cameras can be added to the device ID table to additionally specify their
own metadata format, in which case that format will also become available
from the metadata node.

[Use put_unaligned instead of __put_unaligned_cpu64]
[Use put_unaligned for the sof field as well]

Conflicts:
	drivers/media/usb/uvc/uvc_queue.c
	drivers/media/usb/uvc/uvc_video.c

Change-Id: I2696d2c781376e363e0a77d8d895f416aaff09cb
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@intel.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 088ead25524583e2200aa99111bea2f66a86545a)
---
 drivers/media/usb/uvc/Makefile       |   2 +-
 drivers/media/usb/uvc/uvc_driver.c   |  15 ++-
 drivers/media/usb/uvc/uvc_isight.c   |   2 +-
 drivers/media/usb/uvc/uvc_metadata.c | 179 +++++++++++++++++++++++++++
 drivers/media/usb/uvc/uvc_queue.c    |  56 ++++++---
 drivers/media/usb/uvc/uvc_video.c    | 135 ++++++++++++++++++--
 drivers/media/usb/uvc/uvcvideo.h     |  16 ++-
 include/uapi/linux/uvcvideo.h        |  26 ++++
 8 files changed, 401 insertions(+), 30 deletions(-)
 create mode 100644 drivers/media/usb/uvc/uvc_metadata.c

diff --git a/drivers/media/usb/uvc/Makefile b/drivers/media/usb/uvc/Makefile
index c26d12fdb8f4e..06c7cd378b268 100644
--- a/drivers/media/usb/uvc/Makefile
+++ b/drivers/media/usb/uvc/Makefile
@@ -1,5 +1,5 @@
 uvcvideo-objs  := uvc_driver.o uvc_queue.o uvc_v4l2.o uvc_video.o uvc_ctrl.o \
-		  uvc_status.o uvc_isight.o uvc_debugfs.o
+		  uvc_status.o uvc_isight.o uvc_debugfs.o uvc_metadata.o
 ifeq ($(CONFIG_MEDIA_CONTROLLER),y)
 uvcvideo-objs  += uvc_entity.o
 endif
diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index 45a0da2686998..435b2ee7a0f40 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -1848,6 +1848,7 @@ static void uvc_unregister_video(struct uvc_device *dev)
 			continue;
 
 		video_unregister_device(&stream->vdev);
+		video_unregister_device(&stream->meta.vdev);
 
 		uvc_debugfs_cleanup_stream(stream);
 	}
@@ -1895,6 +1896,9 @@ int uvc_register_video_device(struct uvc_device *dev,
 	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 		vdev->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING;
 		break;
+	case V4L2_BUF_TYPE_META_CAPTURE:
+		vdev->device_caps = V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING;
+		break;
 	}
 
 	strlcpy(vdev->name, dev->name, sizeof vdev->name);
@@ -1930,7 +1934,8 @@ static int uvc_register_video(struct uvc_device *dev,
 	}
 
 	if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
-		stream->chain->caps |= V4L2_CAP_VIDEO_CAPTURE;
+		stream->chain->caps |= V4L2_CAP_VIDEO_CAPTURE
+			| V4L2_CAP_META_CAPTURE;
 	else
 		stream->chain->caps |= V4L2_CAP_VIDEO_OUTPUT;
 
@@ -1968,6 +1973,11 @@ static int uvc_register_terms(struct uvc_device *dev,
 		if (ret < 0)
 			return ret;
 
+		/* Register a metadata node, but ignore a possible failure,
+		 * complete registration of video nodes anyway.
+		 */
+		uvc_meta_register(stream);
+
 		term->vdev = &stream->vdev;
 	}
 
@@ -2002,6 +2012,7 @@ static int uvc_register_chains(struct uvc_device *dev)
 
 struct uvc_device_info {
 	u32	quirks;
+	u32	meta_format;
 };
 
 static int uvc_probe(struct usb_interface *intf,
@@ -2038,6 +2049,8 @@ static int uvc_probe(struct usb_interface *intf,
 	dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber;
 	dev->quirks = (uvc_quirks_param == -1)
 		    ? quirks : uvc_quirks_param;
+	if (info)
+		dev->meta_format = info->meta_format;
 
 	if (udev->product != NULL)
 		strlcpy(dev->name, udev->product, sizeof dev->name);
diff --git a/drivers/media/usb/uvc/uvc_isight.c b/drivers/media/usb/uvc/uvc_isight.c
index 8510e7259e763..fb940cfae5752 100644
--- a/drivers/media/usb/uvc/uvc_isight.c
+++ b/drivers/media/usb/uvc/uvc_isight.c
@@ -100,7 +100,7 @@ static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf,
 }
 
 void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream,
-		struct uvc_buffer *buf)
+			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
 	int ret, i;
 
diff --git a/drivers/media/usb/uvc/uvc_metadata.c b/drivers/media/usb/uvc/uvc_metadata.c
new file mode 100644
index 0000000000000..cd1aec19cc5b5
--- /dev/null
+++ b/drivers/media/usb/uvc/uvc_metadata.c
@@ -0,0 +1,179 @@
+/*
+ *      uvc_metadata.c  --  USB Video Class driver - Metadata handling
+ *
+ *      Copyright (C) 2016
+ *          Guennadi Liakhovetski (guennadi.liakhovetski@intel.com)
+ *
+ *      This program is free software; you can redistribute it and/or modify
+ *      it under the terms of the GNU General Public License as published by
+ *      the Free Software Foundation; either version 2 of the License, or
+ *      (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/usb.h>
+#include <linux/videodev2.h>
+
+#include <media/v4l2-ioctl.h>
+#include <media/videobuf2-v4l2.h>
+#include <media/videobuf2-vmalloc.h>
+
+#include "uvcvideo.h"
+
+/* -----------------------------------------------------------------------------
+ * V4L2 ioctls
+ */
+
+static int uvc_meta_v4l2_querycap(struct file *file, void *fh,
+				  struct v4l2_capability *cap)
+{
+	struct v4l2_fh *vfh = file->private_data;
+	struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
+	struct uvc_video_chain *chain = stream->chain;
+
+	strlcpy(cap->driver, "uvcvideo", sizeof(cap->driver));
+	strlcpy(cap->card, vfh->vdev->name, sizeof(cap->card));
+	usb_make_path(stream->dev->udev, cap->bus_info, sizeof(cap->bus_info));
+	cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
+			  | chain->caps;
+
+	return 0;
+}
+
+static int uvc_meta_v4l2_get_format(struct file *file, void *fh,
+				    struct v4l2_format *format)
+{
+	struct v4l2_fh *vfh = file->private_data;
+	struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
+	struct v4l2_meta_format *fmt = &format->fmt.meta;
+
+	if (format->type != vfh->vdev->queue->type)
+		return -EINVAL;
+
+	memset(fmt, 0, sizeof(*fmt));
+
+	fmt->dataformat = stream->meta.format;
+	fmt->buffersize = UVC_METATADA_BUF_SIZE;
+
+	return 0;
+}
+
+static int uvc_meta_v4l2_try_format(struct file *file, void *fh,
+				    struct v4l2_format *format)
+{
+	struct v4l2_fh *vfh = file->private_data;
+	struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
+	struct uvc_device *dev = stream->dev;
+	struct v4l2_meta_format *fmt = &format->fmt.meta;
+	u32 fmeta = fmt->dataformat;
+
+	if (format->type != vfh->vdev->queue->type)
+		return -EINVAL;
+
+	memset(fmt, 0, sizeof(*fmt));
+
+	fmt->dataformat = fmeta == dev->meta_format ? fmeta : V4L2_META_FMT_UVC;
+	fmt->buffersize = UVC_METATADA_BUF_SIZE;
+
+	return 0;
+}
+
+static int uvc_meta_v4l2_set_format(struct file *file, void *fh,
+				    struct v4l2_format *format)
+{
+	struct v4l2_fh *vfh = file->private_data;
+	struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
+	struct v4l2_meta_format *fmt = &format->fmt.meta;
+	int ret;
+
+	ret = uvc_meta_v4l2_try_format(file, fh, format);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * We could in principle switch at any time, also during streaming.
+	 * Metadata buffers would still be perfectly parseable, but it's more
+	 * consistent and cleaner to disallow that.
+	 */
+	mutex_lock(&stream->mutex);
+
+	if (uvc_queue_allocated(&stream->queue))
+		ret = -EBUSY;
+	else
+		stream->meta.format = fmt->dataformat;
+
+	mutex_unlock(&stream->mutex);
+
+	return ret;
+}
+
+static int uvc_meta_v4l2_enum_formats(struct file *file, void *fh,
+				      struct v4l2_fmtdesc *fdesc)
+{
+	struct v4l2_fh *vfh = file->private_data;
+	struct uvc_streaming *stream = video_get_drvdata(vfh->vdev);
+	struct uvc_device *dev = stream->dev;
+	u32 index = fdesc->index;
+
+	if (fdesc->type != vfh->vdev->queue->type ||
+	    index > 1U || (index && !dev->meta_format))
+		return -EINVAL;
+
+	memset(fdesc, 0, sizeof(*fdesc));
+
+	fdesc->type = vfh->vdev->queue->type;
+	fdesc->index = index;
+	fdesc->pixelformat = index ? dev->meta_format : V4L2_META_FMT_UVC;
+
+	return 0;
+}
+
+static const struct v4l2_ioctl_ops uvc_meta_ioctl_ops = {
+	.vidioc_querycap		= uvc_meta_v4l2_querycap,
+	.vidioc_g_fmt_meta_cap		= uvc_meta_v4l2_get_format,
+	.vidioc_s_fmt_meta_cap		= uvc_meta_v4l2_set_format,
+	.vidioc_try_fmt_meta_cap	= uvc_meta_v4l2_try_format,
+	.vidioc_enum_fmt_meta_cap	= uvc_meta_v4l2_enum_formats,
+	.vidioc_reqbufs			= vb2_ioctl_reqbufs,
+	.vidioc_querybuf		= vb2_ioctl_querybuf,
+	.vidioc_qbuf			= vb2_ioctl_qbuf,
+	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
+	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
+	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
+	.vidioc_streamon		= vb2_ioctl_streamon,
+	.vidioc_streamoff		= vb2_ioctl_streamoff,
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 File Operations
+ */
+
+static const struct v4l2_file_operations uvc_meta_fops = {
+	.owner = THIS_MODULE,
+	.unlocked_ioctl = video_ioctl2,
+	.open = v4l2_fh_open,
+	.release = vb2_fop_release,
+	.poll = vb2_fop_poll,
+	.mmap = vb2_fop_mmap,
+};
+
+int uvc_meta_register(struct uvc_streaming *stream)
+{
+	struct uvc_device *dev = stream->dev;
+	struct video_device *vdev = &stream->meta.vdev;
+	struct uvc_video_queue *queue = &stream->meta.queue;
+
+	stream->meta.format = V4L2_META_FMT_UVC;
+
+	/*
+	 * The video interface queue uses manual locking and thus does not set
+	 * the queue pointer. Set it manually here.
+	 */
+	vdev->queue = &queue->queue;
+
+	return uvc_register_video_device(dev, stream, vdev, queue,
+					 V4L2_BUF_TYPE_META_CAPTURE,
+					 &uvc_meta_fops, &uvc_meta_ioctl_ops);
+}
diff --git a/drivers/media/usb/uvc/uvc_queue.c b/drivers/media/usb/uvc/uvc_queue.c
index ff6feff21e94a..6f0160828bdb8 100644
--- a/drivers/media/usb/uvc/uvc_queue.c
+++ b/drivers/media/usb/uvc/uvc_queue.c
@@ -75,17 +75,26 @@ static int uvc_queue_setup(struct vb2_queue *vq, const void *parg,
 {
 	const struct v4l2_format *fmt = parg;
 	struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
-	struct uvc_streaming *stream = uvc_queue_to_stream(queue);
-
-	/* Make sure the image size is large enough. */
-	if (fmt && fmt->fmt.pix.sizeimage < stream->ctrl.dwMaxVideoFrameSize)
-		return -EINVAL;
+	struct uvc_streaming *stream;
+	unsigned int size;
+
+	switch (vq->type) {
+	case V4L2_BUF_TYPE_META_CAPTURE:
+		size = UVC_METATADA_BUF_SIZE;
+		break;
+
+	default:
+		/* Make sure the image size is large enough. */
+		if (fmt && fmt->fmt.pix.sizeimage < stream->ctrl.dwMaxVideoFrameSize)
+			return -EINVAL;
+		stream = uvc_queue_to_stream(queue);
+		size = fmt ? fmt->fmt.pix.sizeimage :
+		       stream->ctrl.dwMaxVideoFrameSize;
+		break;
+	}
 
 	*nplanes = 1;
-
-	sizes[0] = fmt ? fmt->fmt.pix.sizeimage
-		 : stream->ctrl.dwMaxVideoFrameSize;
-
+	sizes[0] = size;
 	return 0;
 }
 
@@ -108,7 +117,7 @@ static int uvc_buffer_prepare(struct vb2_buffer *vb)
 	buf->error = 0;
 	buf->mem = vb2_plane_vaddr(vb, 0);
 	buf->length = vb2_plane_size(vb, 0);
-	if (vb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
+	if (vb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 		buf->bytesused = 0;
 	else
 		buf->bytesused = vb2_get_plane_payload(vb, 0);
@@ -171,10 +180,10 @@ static int uvc_start_streaming(struct vb2_queue *vq, unsigned int count)
 static void uvc_stop_streaming(struct vb2_queue *vq)
 {
 	struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
-	struct uvc_streaming *stream = uvc_queue_to_stream(queue);
 	unsigned long flags;
 
-	uvc_video_enable(stream, 0);
+	if (vq->type != V4L2_BUF_TYPE_META_CAPTURE)
+		uvc_video_enable(uvc_queue_to_stream(queue), 0);
 
 	spin_lock_irqsave(&queue->irqlock, flags);
 	uvc_queue_return_buffers(queue, UVC_BUF_STATE_ERROR);
@@ -192,20 +201,39 @@ static struct vb2_ops uvc_queue_qops = {
 	.stop_streaming = uvc_stop_streaming,
 };
 
+static const struct vb2_ops uvc_meta_queue_qops = {
+	.queue_setup = uvc_queue_setup,
+	.buf_prepare = uvc_buffer_prepare,
+	.buf_queue = uvc_buffer_queue,
+	.wait_prepare = vb2_ops_wait_prepare,
+	.wait_finish = vb2_ops_wait_finish,
+	.stop_streaming = uvc_stop_streaming,
+};
+
 int uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type,
 		    int drop_corrupted)
 {
 	int ret;
 
 	queue->queue.type = type;
-	queue->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
+	queue->queue.io_modes = VB2_MMAP | VB2_USERPTR;
 	queue->queue.drv_priv = queue;
 	queue->queue.buf_struct_size = sizeof(struct uvc_buffer);
-	queue->queue.ops = &uvc_queue_qops;
 	queue->queue.mem_ops = &vb2_vmalloc_memops;
 	queue->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC
 		| V4L2_BUF_FLAG_TSTAMP_SRC_SOE;
 	queue->queue.lock = &queue->mutex;
+
+	switch (type) {
+	case V4L2_BUF_TYPE_META_CAPTURE:
+		queue->queue.ops = &uvc_meta_queue_qops;
+		break;
+	default:
+		queue->queue.io_modes |= VB2_DMABUF;
+		queue->queue.ops = &uvc_queue_qops;
+		break;
+	}
+
 	ret = vb2_queue_init(&queue->queue);
 	if (ret)
 		return ret;
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index edeeacff1e19c..283506fa3bcd1 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1140,6 +1140,84 @@ static int uvc_video_encode_data(struct uvc_streaming *stream,
 	return nbytes;
 }
 
+/* ------------------------------------------------------------------------
+ * Metadata
+ */
+
+/*
+ * Additionally to the payload headers we also want to provide the user with USB
+ * Frame Numbers and system time values. The resulting buffer is thus composed
+ * of blocks, containing a 64-bit timestamp in  nanoseconds, a 16-bit USB Frame
+ * Number, and a copy of the payload header.
+ *
+ * Ideally we want to capture all payload headers for each frame. However, their
+ * number is unknown and unbound. We thus drop headers that contain no vendor
+ * data and that either contain no SCR value or an SCR value identical to the
+ * previous header.
+ */
+static void uvc_video_decode_meta(struct uvc_streaming *stream,
+				  struct uvc_buffer *meta_buf,
+				  const u8 *mem, unsigned int length)
+{
+	struct uvc_meta_buf *meta;
+	size_t len_std = 2;
+	bool has_pts, has_scr;
+	unsigned long flags;
+	unsigned int sof;
+	struct timespec ts;
+	const u8 *scr;
+
+	if (!meta_buf || length == 2)
+		return;
+
+	if (meta_buf->length - meta_buf->bytesused <
+	    length + sizeof(meta->ns) + sizeof(meta->sof)) {
+		meta_buf->error = 1;
+		return;
+	}
+
+	has_pts = mem[1] & UVC_STREAM_PTS;
+	has_scr = mem[1] & UVC_STREAM_SCR;
+
+	if (has_pts) {
+		len_std += 4;
+		scr = mem + 6;
+	} else {
+		scr = mem + 2;
+	}
+
+	if (has_scr)
+		len_std += 6;
+
+	if (stream->meta.format == V4L2_META_FMT_UVC)
+		length = len_std;
+
+	if (length == len_std && (!has_scr ||
+				  !memcmp(scr, stream->clock.last_scr, 6)))
+		return;
+
+	meta = (struct uvc_meta_buf *)((u8 *)meta_buf->mem + meta_buf->bytesused);
+	local_irq_save(flags);
+	uvc_video_get_ts(&ts);
+	sof = usb_get_current_frame_number(stream->dev->udev);
+	local_irq_restore(flags);
+	put_unaligned(ts.tv_nsec, &meta->ns);
+	put_unaligned(sof, &meta->sof);
+
+	if (has_scr)
+		memcpy(stream->clock.last_scr, scr, 6);
+
+	memcpy(&meta->length, mem, length);
+	meta_buf->bytesused += length + sizeof(meta->ns) + sizeof(meta->sof);
+
+	uvc_trace(UVC_TRACE_FRAME,
+		  "%s(): ts %lu.%06lu, SOF %u, len %u, flags 0x%x, PTS %u, STC %u frame SOF %u\n",
+		  __func__, ts.tv_sec, ts.tv_nsec, meta->sof, meta->length, meta->flags,
+		  has_pts ? *(u32 *)meta->buf : 0,
+		  has_scr ? *(u32 *)scr : 0,
+		  has_scr ? *(u32 *)(scr + 4) & 0x7ff : 0);
+}
+
 /* ------------------------------------------------------------------------
  * URB handling
  */
@@ -1158,8 +1236,29 @@ static void uvc_video_validate_buffer(const struct uvc_streaming *stream,
 /*
  * Completion handler for video URBs.
  */
+
+static void uvc_video_next_buffers(struct uvc_streaming *stream,
+		struct uvc_buffer **video_buf, struct uvc_buffer **meta_buf)
+{
+	if (*meta_buf) {
+		struct vb2_v4l2_buffer *vb2_meta = &(*meta_buf)->buf;
+		const struct vb2_v4l2_buffer *vb2_video = &(*video_buf)->buf;
+
+		vb2_meta->sequence = vb2_video->sequence;
+		vb2_meta->field = vb2_video->field;
+		vb2_meta->timestamp = vb2_video->timestamp;
+
+		(*meta_buf)->state = UVC_BUF_STATE_READY;
+		if (!(*meta_buf)->error)
+			(*meta_buf)->error = (*video_buf)->error;
+		*meta_buf = uvc_queue_next_buffer(&stream->meta.queue,
+						  *meta_buf);
+	}
+	*video_buf = uvc_queue_next_buffer(&stream->queue, *video_buf);
+}
+
 static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
-	struct uvc_buffer *buf)
+			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
 	u8 *mem;
 	int ret, i;
@@ -1181,14 +1280,15 @@ static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
 				urb->iso_frame_desc[i].actual_length);
 			if (ret == -EAGAIN) {
 				uvc_video_validate_buffer(stream, buf);
-				buf = uvc_queue_next_buffer(&stream->queue,
-							    buf);
+				uvc_video_next_buffers(stream, &buf, &meta_buf);
 			}
 		} while (ret == -EAGAIN);
 
 		if (ret < 0)
 			continue;
 
+		uvc_video_decode_meta(stream, meta_buf, mem, ret);
+
 		/* Decode the payload data. */
 		uvc_video_decode_data(stream, buf, mem + ret,
 			urb->iso_frame_desc[i].actual_length - ret);
@@ -1199,13 +1299,13 @@ static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
 
 		if (buf->state == UVC_BUF_STATE_READY) {
 			uvc_video_validate_buffer(stream, buf);
-			buf = uvc_queue_next_buffer(&stream->queue, buf);
+			uvc_video_next_buffers(stream, &buf, &meta_buf);
 		}
 	}
 }
 
 static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
-	struct uvc_buffer *buf)
+			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
 	u8 *mem;
 	int len, ret;
@@ -1228,8 +1328,7 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
 		do {
 			ret = uvc_video_decode_start(stream, buf, mem, len);
 			if (ret == -EAGAIN)
-				buf = uvc_queue_next_buffer(&stream->queue,
-							    buf);
+				uvc_video_next_buffers(stream, &buf, &meta_buf);
 		} while (ret == -EAGAIN);
 
 		/* If an error occurred skip the rest of the payload. */
@@ -1239,6 +1338,8 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
 			memcpy(stream->bulk.header, mem, ret);
 			stream->bulk.header_size = ret;
 
+			uvc_video_decode_meta(stream, meta_buf, mem, ret);
+
 			mem += ret;
 			len -= ret;
 		}
@@ -1262,8 +1363,7 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
 			uvc_video_decode_end(stream, buf, stream->bulk.header,
 				stream->bulk.payload_size);
 			if (buf->state == UVC_BUF_STATE_READY)
-				buf = uvc_queue_next_buffer(&stream->queue,
-							    buf);
+				uvc_video_next_buffers(stream, &buf, &meta_buf);
 		}
 
 		stream->bulk.header_size = 0;
@@ -1273,7 +1373,7 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
 }
 
 static void uvc_video_encode_bulk(struct urb *urb, struct uvc_streaming *stream,
-	struct uvc_buffer *buf)
+	struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
 	u8 *mem = urb->transfer_buffer;
 	int len = stream->urb_size, ret;
@@ -1319,7 +1419,10 @@ static void uvc_video_complete(struct urb *urb)
 {
 	struct uvc_streaming *stream = urb->context;
 	struct uvc_video_queue *queue = &stream->queue;
+	struct uvc_video_queue *qmeta = &stream->meta.queue;
+	struct vb2_queue *vb2_qmeta = stream->meta.vdev.queue;
 	struct uvc_buffer *buf = NULL;
+	struct uvc_buffer *buf_meta = NULL;
 	unsigned long flags;
 	int ret;
 
@@ -1338,6 +1441,8 @@ static void uvc_video_complete(struct urb *urb)
 	case -ECONNRESET:	/* usb_unlink_urb() called. */
 	case -ESHUTDOWN:	/* The endpoint is being disabled. */
 		uvc_queue_cancel(queue, urb->status == -ESHUTDOWN);
+		if (vb2_qmeta)
+			uvc_queue_cancel(qmeta, urb->status == -ESHUTDOWN);
 		return;
 	}
 
@@ -1347,7 +1452,15 @@ static void uvc_video_complete(struct urb *urb)
 				       queue);
 	spin_unlock_irqrestore(&queue->irqlock, flags);
 
-	stream->decode(urb, stream, buf);
+	if (vb2_qmeta) {
+		spin_lock_irqsave(&qmeta->irqlock, flags);
+		if (!list_empty(&qmeta->irqqueue))
+			buf_meta = list_first_entry(&qmeta->irqqueue,
+						    struct uvc_buffer, queue);
+		spin_unlock_irqrestore(&qmeta->irqlock, flags);
+	}
+
+	stream->decode(urb, stream, buf, buf_meta);
 
 	if ((ret = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
 		uvc_printk(KERN_ERR, "Failed to resubmit video URB (%d).\n",
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 03a4bd55f63cc..b0084cf260f31 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -457,6 +457,8 @@ struct uvc_stats_stream {
 	unsigned int max_sof;		/* Maximum STC.SOF value */
 };
 
+#define UVC_METATADA_BUF_SIZE 1024
+
 struct uvc_streaming {
 	struct list_head list;
 	struct uvc_device *dev;
@@ -488,7 +490,13 @@ struct uvc_streaming {
 	unsigned int frozen : 1;
 	struct uvc_video_queue queue;
 	void (*decode) (struct urb *urb, struct uvc_streaming *video,
-			struct uvc_buffer *buf);
+			struct uvc_buffer *buf, struct uvc_buffer *meta_buf);
+
+	struct {
+		struct video_device vdev;
+		struct uvc_video_queue queue;
+		__u32 format;
+	} meta;
 
 	/* Context data used by the bulk completion handler. */
 	struct {
@@ -530,6 +538,8 @@ struct uvc_streaming {
 		u16 last_sof;
 		u16 sof_offset;
 
+		u8 last_scr[6];
+
 		spinlock_t lock;
 	} clock;
 };
@@ -539,6 +549,7 @@ struct uvc_device {
 	struct usb_interface *intf;
 	unsigned long warnings;
 	__u32 quirks;
+	__u32 meta_format;
 	int intfnum;
 	char name[32];
 
@@ -693,6 +704,7 @@ extern int uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit,
 void uvc_video_clock_update(struct uvc_streaming *stream,
 			    struct vb2_v4l2_buffer *vbuf,
 			    struct uvc_buffer *buf);
+int uvc_meta_register(struct uvc_streaming *stream);
 
 int uvc_register_video_device(struct uvc_device *dev,
 			      struct uvc_streaming *stream,
@@ -755,7 +767,7 @@ extern struct usb_host_endpoint *uvc_find_endpoint(
 
 /* Quirks support */
 void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream,
-		struct uvc_buffer *buf);
+		struct uvc_buffer *buf, struct uvc_buffer *meta_buf);
 
 /* debugfs and statistics */
 int uvc_debugfs_init(void);
diff --git a/include/uapi/linux/uvcvideo.h b/include/uapi/linux/uvcvideo.h
index 3b081862b9e89..8381ca7c2ba55 100644
--- a/include/uapi/linux/uvcvideo.h
+++ b/include/uapi/linux/uvcvideo.h
@@ -67,4 +67,30 @@ struct uvc_xu_control_query {
 #define UVCIOC_CTRL_MAP		_IOWR('u', 0x20, struct uvc_xu_control_mapping)
 #define UVCIOC_CTRL_QUERY	_IOWR('u', 0x21, struct uvc_xu_control_query)
 
+/*
+ * Metadata node
+ */
+
+/**
+ * struct uvc_meta_buf - metadata buffer building block
+ * @ns		- system timestamp of the payload in nanoseconds
+ * @sof		- USB Frame Number
+ * @length	- length of the payload header
+ * @flags	- payload header flags
+ * @buf		- optional device-specific header data
+ *
+ * UVC metadata nodes fill buffers with possibly multiple instances of this
+ * struct. The first two fields are added by the driver, they can be used for
+ * clock synchronisation. The rest is an exact copy of a UVC payload header.
+ * Only complete objects with complete buffers are included. Therefore it's
+ * always sizeof(meta->ts) + sizeof(meta->sof) + meta->length bytes large.
+ */
+struct uvc_meta_buf {
+	__u64 ns;
+	__u16 sof;
+	__u8 length;
+	__u8 flags;
+	__u8 buf[];
+} __packed;
+
 #endif

From d13d1549b2e8bb5d3c74302904e2c5711b67bf22 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:45:58 +0100
Subject: [PATCH 0068/1852] FROMLIST: media: uvcvideo: Refactor URB descriptors

We currently store three separate arrays for each URB reference we hold.

Objectify the data needed to track URBs into a single uvc_urb structure,
allowing better object management and tracking of the URB.

All accesses to the data pointers through stream, are converted to use a
uvc_urb pointer for consistency.

Change-Id: I03320cff8ec5cb268b62610b9852b32505f136aa
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311045/)
---
 drivers/media/usb/uvc/uvc_video.c | 49 +++++++++++++++++++------------
 drivers/media/usb/uvc/uvcvideo.h  | 18 ++++++++++--
 2 files changed, 45 insertions(+), 22 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 283506fa3bcd1..232d785d24f83 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1476,14 +1476,16 @@ static void uvc_free_urb_buffers(struct uvc_streaming *stream)
 	unsigned int i;
 
 	for (i = 0; i < UVC_URBS; ++i) {
-		if (stream->urb_buffer[i]) {
+		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
+		if (uvc_urb->buffer) {
 #ifndef CONFIG_DMA_NONCOHERENT
 			usb_free_coherent(stream->dev->udev, stream->urb_size,
-				stream->urb_buffer[i], stream->urb_dma[i]);
+					uvc_urb->buffer, uvc_urb->dma);
 #else
-			kfree(stream->urb_buffer[i]);
+			kfree(uvc_urb->buffer);
 #endif
-			stream->urb_buffer[i] = NULL;
+			uvc_urb->buffer = NULL;
 		}
 	}
 
@@ -1521,16 +1523,18 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
 	/* Retry allocations until one succeed. */
 	for (; npackets > 1; npackets /= 2) {
 		for (i = 0; i < UVC_URBS; ++i) {
+			struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
 			stream->urb_size = psize * npackets;
 #ifndef CONFIG_DMA_NONCOHERENT
-			stream->urb_buffer[i] = usb_alloc_coherent(
+			uvc_urb->buffer = usb_alloc_coherent(
 				stream->dev->udev, stream->urb_size,
-				gfp_flags | __GFP_NOWARN, &stream->urb_dma[i]);
+				gfp_flags | __GFP_NOWARN, &uvc_urb->dma);
 #else
-			stream->urb_buffer[i] =
+			uvc_urb->buffer =
 			    kmalloc(stream->urb_size, gfp_flags | __GFP_NOWARN);
 #endif
-			if (!stream->urb_buffer[i]) {
+			if (!uvc_urb->buffer) {
 				uvc_free_urb_buffers(stream);
 				break;
 			}
@@ -1560,13 +1564,15 @@ static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
 	uvc_video_stats_stop(stream);
 
 	for (i = 0; i < UVC_URBS; ++i) {
-		urb = stream->urb[i];
+		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
+		urb = uvc_urb->urb;
 		if (urb == NULL)
 			continue;
 
 		usb_kill_urb(urb);
 		usb_free_urb(urb);
-		stream->urb[i] = NULL;
+		uvc_urb->urb = NULL;
 	}
 
 	if (free_buffers)
@@ -1618,6 +1624,8 @@ static int uvc_init_video_isoc(struct uvc_streaming *stream,
 	size = npackets * psize;
 
 	for (i = 0; i < UVC_URBS; ++i) {
+		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
 		urb = usb_alloc_urb(npackets, gfp_flags);
 		if (urb == NULL) {
 			uvc_uninit_video(stream, 1);
@@ -1630,12 +1638,12 @@ static int uvc_init_video_isoc(struct uvc_streaming *stream,
 				ep->desc.bEndpointAddress);
 #ifndef CONFIG_DMA_NONCOHERENT
 		urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
-		urb->transfer_dma = stream->urb_dma[i];
+		urb->transfer_dma = uvc_urb->dma;
 #else
 		urb->transfer_flags = URB_ISO_ASAP;
 #endif
 		urb->interval = ep->desc.bInterval;
-		urb->transfer_buffer = stream->urb_buffer[i];
+		urb->transfer_buffer = uvc_urb->buffer;
 		urb->complete = uvc_video_complete;
 		urb->number_of_packets = npackets;
 		urb->transfer_buffer_length = size;
@@ -1645,7 +1653,7 @@ static int uvc_init_video_isoc(struct uvc_streaming *stream,
 			urb->iso_frame_desc[j].length = psize;
 		}
 
-		stream->urb[i] = urb;
+		uvc_urb->urb = urb;
 	}
 
 	return 0;
@@ -1684,21 +1692,22 @@ static int uvc_init_video_bulk(struct uvc_streaming *stream,
 		size = 0;
 
 	for (i = 0; i < UVC_URBS; ++i) {
+		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
 		urb = usb_alloc_urb(0, gfp_flags);
 		if (urb == NULL) {
 			uvc_uninit_video(stream, 1);
 			return -ENOMEM;
 		}
 
-		usb_fill_bulk_urb(urb, stream->dev->udev, pipe,
-			stream->urb_buffer[i], size, uvc_video_complete,
-			stream);
+		usb_fill_bulk_urb(urb, stream->dev->udev, pipe, uvc_urb->buffer,
+				  size, uvc_video_complete, stream);
 #ifndef CONFIG_DMA_NONCOHERENT
 		urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
-		urb->transfer_dma = stream->urb_dma[i];
+		urb->transfer_dma = uvc_urb->dma;
 #endif
 
-		stream->urb[i] = urb;
+		uvc_urb->urb = urb;
 	}
 
 	return 0;
@@ -1789,7 +1798,9 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
 
 	/* Submit the URBs. */
 	for (i = 0; i < UVC_URBS; ++i) {
-		ret = usb_submit_urb(stream->urb[i], gfp_flags);
+		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+
+		ret = usb_submit_urb(uvc_urb->urb, gfp_flags);
 		if (ret < 0) {
 			uvc_printk(KERN_ERR, "Failed to submit URB %u "
 					"(%d).\n", i, ret);
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index b0084cf260f31..fb4a85521b3f1 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -459,6 +459,20 @@ struct uvc_stats_stream {
 
 #define UVC_METATADA_BUF_SIZE 1024
 
+/**
+ * struct uvc_urb - URB context management structure
+ *
+ * @urb: the URB described by this context structure
+ * @buffer: memory storage for the URB
+ * @dma: DMA coherent addressing for the urb_buffer
+ */
+struct uvc_urb {
+	struct urb *urb;
+
+	char *buffer;
+	dma_addr_t dma;
+};
+
 struct uvc_streaming {
 	struct list_head list;
 	struct uvc_device *dev;
@@ -507,9 +521,7 @@ struct uvc_streaming {
 		__u32 max_payload_size;
 	} bulk;
 
-	struct urb *urb[UVC_URBS];
-	char *urb_buffer[UVC_URBS];
-	dma_addr_t urb_dma[UVC_URBS];
+	struct uvc_urb uvc_urb[UVC_URBS];
 	unsigned int urb_size;
 
 	__u32 sequence;

From fa809686900020109b6aa169e0609b800f290f3b Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:45:59 +0100
Subject: [PATCH 0069/1852] FROMLIST: media: uvcvideo: Convert decode functions
 to use new context structure

The URB completion handlers currently reference the stream context.

Now that each URB has its own context structure, convert the decode (and
one encode) functions to utilise this context for URB management.

Change-Id: Ib56b25ca4ec049c5eb75ffceda9c2d8a0c1a96cf
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311067/)
---
 drivers/media/usb/uvc/uvc_isight.c |  6 ++++--
 drivers/media/usb/uvc/uvc_video.c  | 26 ++++++++++++++++++--------
 drivers/media/usb/uvc/uvcvideo.h   |  8 +++++---
 3 files changed, 27 insertions(+), 13 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_isight.c b/drivers/media/usb/uvc/uvc_isight.c
index fb940cfae5752..7a529c6dc40a9 100644
--- a/drivers/media/usb/uvc/uvc_isight.c
+++ b/drivers/media/usb/uvc/uvc_isight.c
@@ -99,9 +99,11 @@ static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf,
 	return 0;
 }
 
-void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream,
-			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
+void uvc_video_decode_isight(struct uvc_urb *uvc_urb, struct uvc_buffer *buf,
+			struct uvc_buffer *meta_buf)
 {
+	struct urb *urb = uvc_urb->urb;
+	struct uvc_streaming *stream = uvc_urb->stream;
 	int ret, i;
 
 	for (i = 0; i < urb->number_of_packets; ++i) {
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 232d785d24f83..c1b3532b76bce 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1257,9 +1257,11 @@ static void uvc_video_next_buffers(struct uvc_streaming *stream,
 	*video_buf = uvc_queue_next_buffer(&stream->queue, *video_buf);
 }
 
-static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
+static void uvc_video_decode_isoc(struct uvc_urb *uvc_urb,
 			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
+	struct urb *urb = uvc_urb->urb;
+	struct uvc_streaming *stream = uvc_urb->stream;
 	u8 *mem;
 	int ret, i;
 
@@ -1304,9 +1306,11 @@ static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
 	}
 }
 
-static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
+static void uvc_video_decode_bulk(struct uvc_urb *uvc_urb,
 			struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
+	struct urb *urb = uvc_urb->urb;
+	struct uvc_streaming *stream = uvc_urb->stream;
 	u8 *mem;
 	int len, ret;
 
@@ -1372,9 +1376,12 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
 	}
 }
 
-static void uvc_video_encode_bulk(struct urb *urb, struct uvc_streaming *stream,
+static void uvc_video_encode_bulk(struct uvc_urb *uvc_urb,
 	struct uvc_buffer *buf, struct uvc_buffer *meta_buf)
 {
+	struct urb *urb = uvc_urb->urb;
+	struct uvc_streaming *stream = uvc_urb->stream;
+
 	u8 *mem = urb->transfer_buffer;
 	int len = stream->urb_size, ret;
 
@@ -1417,7 +1424,8 @@ static void uvc_video_encode_bulk(struct urb *urb, struct uvc_streaming *stream,
 
 static void uvc_video_complete(struct urb *urb)
 {
-	struct uvc_streaming *stream = urb->context;
+	struct uvc_urb *uvc_urb = urb->context;
+	struct uvc_streaming *stream = uvc_urb->stream;
 	struct uvc_video_queue *queue = &stream->queue;
 	struct uvc_video_queue *qmeta = &stream->meta.queue;
 	struct vb2_queue *vb2_qmeta = stream->meta.vdev.queue;
@@ -1460,7 +1468,7 @@ static void uvc_video_complete(struct urb *urb)
 		spin_unlock_irqrestore(&qmeta->irqlock, flags);
 	}
 
-	stream->decode(urb, stream, buf, buf_meta);
+	stream->decode(uvc_urb, buf, buf_meta);
 
 	if ((ret = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
 		uvc_printk(KERN_ERR, "Failed to resubmit video URB (%d).\n",
@@ -1538,6 +1546,8 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
 				uvc_free_urb_buffers(stream);
 				break;
 			}
+
+			uvc_urb->stream = stream;
 		}
 
 		if (i == UVC_URBS) {
@@ -1633,7 +1643,7 @@ static int uvc_init_video_isoc(struct uvc_streaming *stream,
 		}
 
 		urb->dev = stream->dev->udev;
-		urb->context = stream;
+		urb->context = uvc_urb;
 		urb->pipe = usb_rcvisocpipe(stream->dev->udev,
 				ep->desc.bEndpointAddress);
 #ifndef CONFIG_DMA_NONCOHERENT
@@ -1700,8 +1710,8 @@ static int uvc_init_video_bulk(struct uvc_streaming *stream,
 			return -ENOMEM;
 		}
 
-		usb_fill_bulk_urb(urb, stream->dev->udev, pipe, uvc_urb->buffer,
-				  size, uvc_video_complete, stream);
+		usb_fill_bulk_urb(urb, stream->dev->udev, pipe,	uvc_urb->buffer,
+				  size, uvc_video_complete, uvc_urb);
 #ifndef CONFIG_DMA_NONCOHERENT
 		urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
 		urb->transfer_dma = uvc_urb->dma;
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index fb4a85521b3f1..40894260dade0 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -463,11 +463,13 @@ struct uvc_stats_stream {
  * struct uvc_urb - URB context management structure
  *
  * @urb: the URB described by this context structure
+ * @stream: UVC streaming context
  * @buffer: memory storage for the URB
  * @dma: DMA coherent addressing for the urb_buffer
  */
 struct uvc_urb {
 	struct urb *urb;
+	struct uvc_streaming *stream;
 
 	char *buffer;
 	dma_addr_t dma;
@@ -503,8 +505,8 @@ struct uvc_streaming {
 	/* Buffers queue. */
 	unsigned int frozen : 1;
 	struct uvc_video_queue queue;
-	void (*decode) (struct urb *urb, struct uvc_streaming *video,
-			struct uvc_buffer *buf, struct uvc_buffer *meta_buf);
+	void (*decode)(struct uvc_urb *uvc_urb, struct uvc_buffer *buf,
+		       struct uvc_buffer *meta_buf);
 
 	struct {
 		struct video_device vdev;
@@ -778,7 +780,7 @@ extern struct usb_host_endpoint *uvc_find_endpoint(
 		struct usb_host_interface *alts, __u8 epaddr);
 
 /* Quirks support */
-void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream,
+void uvc_video_decode_isight(struct uvc_urb *uvc_urb,
 		struct uvc_buffer *buf, struct uvc_buffer *meta_buf);
 
 /* debugfs and statistics */

From 4b6bd5f06e34a8bcb08e94b23f64075a7e6534f9 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:46:00 +0100
Subject: [PATCH 0070/1852] FROMLIST: media: uvcvideo: Protect queue internals
 with helper

The URB completion operation obtains the current buffer by reading
directly into the queue internal interface.

Protect this queue abstraction by providing a helper
uvc_queue_get_current_buffer() which can be used by both the decode
task, and the uvc_queue_next_buffer() functions.

Change-Id: Ic5401fe9afec00b87bb075f99addae8591de6890
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311059/)
---
 drivers/media/usb/uvc/uvc_queue.c | 33 ++++++++++++++++++++++++++-----
 drivers/media/usb/uvc/uvc_video.c |  6 +-----
 drivers/media/usb/uvc/uvcvideo.h  |  1 +
 3 files changed, 30 insertions(+), 10 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_queue.c b/drivers/media/usb/uvc/uvc_queue.c
index 6f0160828bdb8..7025c7625449e 100644
--- a/drivers/media/usb/uvc/uvc_queue.c
+++ b/drivers/media/usb/uvc/uvc_queue.c
@@ -421,6 +421,33 @@ void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect)
 	spin_unlock_irqrestore(&queue->irqlock, flags);
 }
 
+/*
+ * uvc_queue_get_current_buffer: Obtain the current working output buffer
+ *
+ * Buffers may span multiple packets, and even URBs, therefore the active buffer
+ * remains on the queue until the EOF marker.
+ */
+static struct uvc_buffer *
+__uvc_queue_get_current_buffer(struct uvc_video_queue *queue)
+{
+	if (list_empty(&queue->irqqueue))
+		return NULL;
+
+	return list_first_entry(&queue->irqqueue, struct uvc_buffer, queue);
+}
+
+struct uvc_buffer *uvc_queue_get_current_buffer(struct uvc_video_queue *queue)
+{
+	struct uvc_buffer *nextbuf;
+	unsigned long flags;
+
+	spin_lock_irqsave(&queue->irqlock, flags);
+	nextbuf = __uvc_queue_get_current_buffer(queue);
+	spin_unlock_irqrestore(&queue->irqlock, flags);
+
+	return nextbuf;
+}
+
 struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
 		struct uvc_buffer *buf)
 {
@@ -437,11 +464,7 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
 
 	spin_lock_irqsave(&queue->irqlock, flags);
 	list_del(&buf->queue);
-	if (!list_empty(&queue->irqqueue))
-		nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
-					   queue);
-	else
-		nextbuf = NULL;
+	nextbuf = __uvc_queue_get_current_buffer(queue);
 	spin_unlock_irqrestore(&queue->irqlock, flags);
 
 	buf->state = buf->error ? UVC_BUF_STATE_ERROR : UVC_BUF_STATE_DONE;
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index c1b3532b76bce..c911c596d3217 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1454,11 +1454,7 @@ static void uvc_video_complete(struct urb *urb)
 		return;
 	}
 
-	spin_lock_irqsave(&queue->irqlock, flags);
-	if (!list_empty(&queue->irqqueue))
-		buf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
-				       queue);
-	spin_unlock_irqrestore(&queue->irqlock, flags);
+	buf = uvc_queue_get_current_buffer(queue);
 
 	if (vb2_qmeta) {
 		spin_lock_irqsave(&qmeta->irqlock, flags);
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 40894260dade0..131373d089784 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -684,6 +684,7 @@ extern int uvc_queue_streamoff(struct uvc_video_queue *queue,
 extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect);
 extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
 		struct uvc_buffer *buf);
+struct uvc_buffer *uvc_queue_get_current_buffer(struct uvc_video_queue *queue);
 extern int uvc_queue_mmap(struct uvc_video_queue *queue,
 		struct vm_area_struct *vma);
 extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue,

From 624a590de7a693e865c74b373908e5b8c727c615 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:46:01 +0100
Subject: [PATCH 0071/1852] FROMLIST: media: uvcvideo: queue: Simplify
 spin-lock usage

Both uvc_start_streaming(), and uvc_stop_streaming() are called from
userspace context, with interrupts enabled. As such, they do not need to
save the IRQ state, and can use spin_lock_irq() and spin_unlock_irq()
respectively.

Change-Id: I1cde5a8d9a8890cc2b671d1e32d3b6b4b0eac635
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311047/)
---
 drivers/media/usb/uvc/uvc_queue.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_queue.c b/drivers/media/usb/uvc/uvc_queue.c
index 7025c7625449e..6a60dc3715203 100644
--- a/drivers/media/usb/uvc/uvc_queue.c
+++ b/drivers/media/usb/uvc/uvc_queue.c
@@ -161,7 +161,6 @@ static int uvc_start_streaming(struct vb2_queue *vq, unsigned int count)
 {
 	struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
 	struct uvc_streaming *stream = uvc_queue_to_stream(queue);
-	unsigned long flags;
 	int ret;
 
 	queue->buf_used = 0;
@@ -170,9 +169,9 @@ static int uvc_start_streaming(struct vb2_queue *vq, unsigned int count)
 	if (ret == 0)
 		return 0;
 
-	spin_lock_irqsave(&queue->irqlock, flags);
+	spin_lock_irq(&queue->irqlock);
 	uvc_queue_return_buffers(queue, UVC_BUF_STATE_QUEUED);
-	spin_unlock_irqrestore(&queue->irqlock, flags);
+	spin_unlock_irq(&queue->irqlock);
 
 	return ret;
 }
@@ -180,14 +179,13 @@ static int uvc_start_streaming(struct vb2_queue *vq, unsigned int count)
 static void uvc_stop_streaming(struct vb2_queue *vq)
 {
 	struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
-	unsigned long flags;
 
 	if (vq->type != V4L2_BUF_TYPE_META_CAPTURE)
 		uvc_video_enable(uvc_queue_to_stream(queue), 0);
 
-	spin_lock_irqsave(&queue->irqlock, flags);
+	spin_lock_irq(&queue->irqlock);
 	uvc_queue_return_buffers(queue, UVC_BUF_STATE_ERROR);
-	spin_unlock_irqrestore(&queue->irqlock, flags);
+	spin_unlock_irq(&queue->irqlock);
 }
 
 static struct vb2_ops uvc_queue_qops = {

From f187d060777c59e0ea6ede751b21fb29f95f531e Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:46:02 +0100
Subject: [PATCH 0072/1852] FROMLIST: media: uvcvideo: queue: Support
 asynchronous buffer handling

The buffer queue interface currently operates sequentially, processing
buffers after they have fully completed.

In preparation for supporting parallel tasks operating on the buffers,
we will need to support buffers being processed on multiple CPUs.

Adapt the uvc_queue_next_buffer() such that a reference count tracks the
active use of the buffer, returning the buffer to the VB2 stack at
completion.

Change-Id: Ia42cca9bed7852175202017b042590d844e8c6b0
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311051/)
---
 drivers/media/usb/uvc/uvc_queue.c | 61 +++++++++++++++++++++++++------
 drivers/media/usb/uvc/uvcvideo.h  |  4 ++
 2 files changed, 54 insertions(+), 11 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_queue.c b/drivers/media/usb/uvc/uvc_queue.c
index 6a60dc3715203..e9d4a2c35e3ac 100644
--- a/drivers/media/usb/uvc/uvc_queue.c
+++ b/drivers/media/usb/uvc/uvc_queue.c
@@ -134,6 +134,7 @@ static void uvc_buffer_queue(struct vb2_buffer *vb)
 
 	spin_lock_irqsave(&queue->irqlock, flags);
 	if (likely(!(queue->flags & UVC_QUEUE_DISCONNECTED))) {
+		kref_init(&buf->ref);
 		list_add_tail(&buf->queue, &queue->irqqueue);
 	} else {
 		/* If the device is disconnected return the buffer to userspace
@@ -446,28 +447,66 @@ struct uvc_buffer *uvc_queue_get_current_buffer(struct uvc_video_queue *queue)
 	return nextbuf;
 }
 
-struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
+/*
+ * uvc_queue_requeue: Requeue a buffer on our internal irqqueue
+ *
+ * Reuse a buffer through our internal queue without the need to 'prepare'
+ * The buffer will be returned to userspace through the uvc_buffer_queue call if
+ * the device has been disconnected
+ */
+static void uvc_queue_requeue(struct uvc_video_queue *queue,
 		struct uvc_buffer *buf)
 {
-	struct uvc_buffer *nextbuf;
-	unsigned long flags;
+	buf->error = 0;
+	buf->state = UVC_BUF_STATE_QUEUED;
+	buf->bytesused = 0;
+	vb2_set_plane_payload(&buf->buf.vb2_buf, 0, 0);
+
+	uvc_buffer_queue(&buf->buf.vb2_buf);
+}
+
+static void uvc_queue_buffer_complete(struct kref *ref)
+{
+	struct uvc_buffer *buf = container_of(ref, struct uvc_buffer, ref);
+	struct vb2_buffer *vb = &buf->buf.vb2_buf;
+	struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
 
 	if ((queue->flags & UVC_QUEUE_DROP_CORRUPTED) && buf->error) {
-		buf->error = 0;
-		buf->state = UVC_BUF_STATE_QUEUED;
-		buf->bytesused = 0;
-		vb2_set_plane_payload(&buf->buf.vb2_buf, 0, 0);
-		return buf;
+		uvc_queue_requeue(queue, buf);
+		return;
 	}
 
+	buf->state = buf->error ? UVC_BUF_STATE_ERROR : UVC_BUF_STATE_DONE;
+	vb2_set_plane_payload(&buf->buf.vb2_buf, 0, buf->bytesused);
+	vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_DONE);
+}
+
+/*
+ * Release a reference on the buffer. Complete the buffer when the last
+ * reference is released
+ */
+void uvc_queue_buffer_release(struct uvc_buffer *buf)
+{
+	kref_put(&buf->ref, uvc_queue_buffer_complete);
+}
+
+/*
+ * Remove this buffer from the queue. Lifetime will persist while async actions
+ * are still running (if any), and uvc_queue_buffer_release will give the buffer
+ * back to VB2 when all users have completed.
+ */
+struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
+		struct uvc_buffer *buf)
+{
+	struct uvc_buffer *nextbuf;
+	unsigned long flags;
+
 	spin_lock_irqsave(&queue->irqlock, flags);
 	list_del(&buf->queue);
 	nextbuf = __uvc_queue_get_current_buffer(queue);
 	spin_unlock_irqrestore(&queue->irqlock, flags);
 
-	buf->state = buf->error ? UVC_BUF_STATE_ERROR : UVC_BUF_STATE_DONE;
-	vb2_set_plane_payload(&buf->buf.vb2_buf, 0, buf->bytesused);
-	vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_DONE);
+	uvc_queue_buffer_release(buf);
 
 	return nextbuf;
 }
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 131373d089784..9e31ca87bc758 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -382,6 +382,9 @@ struct uvc_buffer {
 	unsigned int bytesused;
 
 	u32 pts;
+
+	/* asynchronous buffer handling */
+	struct kref ref;
 };
 
 #define UVC_QUEUE_DISCONNECTED		(1 << 0)
@@ -685,6 +688,7 @@ extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect);
 extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
 		struct uvc_buffer *buf);
 struct uvc_buffer *uvc_queue_get_current_buffer(struct uvc_video_queue *queue);
+void uvc_queue_buffer_release(struct uvc_buffer *buf);
 extern int uvc_queue_mmap(struct uvc_video_queue *queue,
 		struct vm_area_struct *vma);
 extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue,

From b0295715e07a5af592b10942202f158fdc72f607 Mon Sep 17 00:00:00 2001
From: Kieran Bingham <kieran.bingham@ideasonboard.com>
Date: Tue, 27 Mar 2018 17:46:03 +0100
Subject: [PATCH 0073/1852] FROMLIST: media: uvcvideo: Move decode processing
 to process context

Newer high definition cameras, and cameras with multiple lenses such as
the range of stereo-vision cameras now available have ever increasing
data rates.

The inclusion of a variable length packet header in URB packets mean
that we must memcpy the frame data out to our destination 'manually'.
This can result in data rates of up to 2 gigabits per second being
processed.

To improve efficiency, and maximise throughput, handle the URB decode
processing through a work queue to move it from interrupt context, and
allow multiple processors to work on URBs in parallel.

Change-Id: I825a107e706a964525dcabba4faa9434f499fd96
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10311055/)
---
 drivers/media/usb/uvc/uvc_video.c | 108 +++++++++++++++++++++++-------
 drivers/media/usb/uvc/uvcvideo.h  |  28 ++++++++
 2 files changed, 112 insertions(+), 24 deletions(-)

diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index c911c596d3217..dd645efe97783 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1063,21 +1063,55 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
 	return data[0];
 }
 
-static void uvc_video_decode_data(struct uvc_streaming *stream,
+/*
+ * uvc_video_decode_data_work: Asynchronous memcpy processing
+ *
+ * Perform memcpy tasks in process context, with completion handlers
+ * to return the URB, and buffer handles.
+ */
+static void uvc_video_copy_data_work(struct work_struct *work)
+{
+	struct uvc_urb *uvc_urb = container_of(work, struct uvc_urb, work);
+	unsigned int i;
+	int ret;
+
+	for (i = 0; i < uvc_urb->async_operations; i++) {
+		struct uvc_copy_op *op = &uvc_urb->copy_operations[i];
+
+		memcpy(op->dst, op->src, op->len);
+
+		/* Release reference taken on this buffer */
+		uvc_queue_buffer_release(op->buf);
+	}
+
+	ret = usb_submit_urb(uvc_urb->urb, GFP_ATOMIC);
+	if (ret < 0)
+		uvc_printk(KERN_ERR, "Failed to resubmit video URB (%d).\n",
+			   ret);
+}
+
+static void uvc_video_decode_data(struct uvc_urb *uvc_urb,
 		struct uvc_buffer *buf, const __u8 *data, int len)
 {
-	unsigned int maxlen, nbytes;
-	void *mem;
+	unsigned int active_op = uvc_urb->async_operations;
+	struct uvc_copy_op *decode = &uvc_urb->copy_operations[active_op];
+	unsigned int maxlen;
+
 
 	if (len <= 0)
 		return;
 
-	/* Copy the video data to the buffer. */
 	maxlen = buf->length - buf->bytesused;
-	mem = buf->mem + buf->bytesused;
-	nbytes = min((unsigned int)len, maxlen);
-	memcpy(mem, data, nbytes);
-	buf->bytesused += nbytes;
+
+	/* Take a buffer reference for async work */
+	kref_get(&buf->ref);
+
+	decode->buf = buf;
+	decode->src = data;
+	decode->dst = buf->mem + buf->bytesused;
+	decode->len = min_t(unsigned int, len, maxlen);
+
+	buf->bytesused += decode->len;
 
 	/* Complete the current frame if the buffer size was exceeded. */
 	if (len > maxlen) {
@@ -1085,6 +1119,8 @@ static void uvc_video_decode_data(struct uvc_streaming *stream,
 		buf->error = 1;
 		buf->state = UVC_BUF_STATE_READY;
 	}
+
+	uvc_urb->async_operations++;
 }
 
 static void uvc_video_decode_end(struct uvc_streaming *stream,
@@ -1292,7 +1328,7 @@ static void uvc_video_decode_isoc(struct uvc_urb *uvc_urb,
 		uvc_video_decode_meta(stream, meta_buf, mem, ret);
 
 		/* Decode the payload data. */
-		uvc_video_decode_data(stream, buf, mem + ret,
+		uvc_video_decode_data(uvc_urb, buf, mem + ret,
 			urb->iso_frame_desc[i].actual_length - ret);
 
 		/* Process the header again. */
@@ -1354,9 +1390,9 @@ static void uvc_video_decode_bulk(struct uvc_urb *uvc_urb,
 	 * sure buf is never dereferenced if NULL.
 	 */
 
-	/* Process video data. */
+	/* Prepare video data for processing. */
 	if (!stream->bulk.skip_payload && buf != NULL)
-		uvc_video_decode_data(stream, buf, mem, len);
+		uvc_video_decode_data(uvc_urb, buf, mem, len);
 
 	/* Detect the payload end by a URB smaller than the maximum size (or
 	 * a payload size equal to the maximum) and process the header again.
@@ -1442,7 +1478,7 @@ static void uvc_video_complete(struct urb *urb)
 		uvc_printk(KERN_WARNING, "Non-zero status (%d) in video "
 			"completion handler.\n", urb->status);
 
-	case -ENOENT:		/* usb_kill_urb() called. */
+	case -ENOENT:		/* usb_poison_urb() called. */
 		if (stream->frozen)
 			return;
 
@@ -1456,6 +1492,9 @@ static void uvc_video_complete(struct urb *urb)
 
 	buf = uvc_queue_get_current_buffer(queue);
 
+	/* Re-initialise the URB async work. */
+	uvc_urb->async_operations = 0;
+
 	if (vb2_qmeta) {
 		spin_lock_irqsave(&qmeta->irqlock, flags);
 		if (!list_empty(&qmeta->irqqueue))
@@ -1464,12 +1503,24 @@ static void uvc_video_complete(struct urb *urb)
 		spin_unlock_irqrestore(&qmeta->irqlock, flags);
 	}
 
+	/*
+	 * Process the URB headers, and optionally queue expensive memcpy tasks
+	 * to be deferred to a work queue.
+	 */
 	stream->decode(uvc_urb, buf, buf_meta);
 
-	if ((ret = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
-		uvc_printk(KERN_ERR, "Failed to resubmit video URB (%d).\n",
-			ret);
+	/* If no async work is needed, resubmit the URB immediately. */
+	if (!uvc_urb->async_operations) {
+		ret = usb_submit_urb(uvc_urb->urb, GFP_ATOMIC);
+		if (ret < 0)
+			uvc_printk(KERN_ERR,
+				   "Failed to resubmit video URB (%d).\n",
+				   ret);
+		return;
 	}
+
+	INIT_WORK(&uvc_urb->work, uvc_video_copy_data_work);
+	queue_work(stream->async_wq, &uvc_urb->work);
 }
 
 /*
@@ -1564,25 +1615,29 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
  */
 static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
 {
-	struct urb *urb;
-	unsigned int i;
+	struct uvc_urb *uvc_urb;
 
 	uvc_video_stats_stop(stream);
 
-	for (i = 0; i < UVC_URBS; ++i) {
-		struct uvc_urb *uvc_urb = &stream->uvc_urb[i];
+	/*
+	 * We must poison the URBs rather than kill them to ensure that even
+	 * after the completion handler returns, any asynchronous workqueues
+	 * will be prevented from resubmitting the URBs
+	 */
+	for_each_uvc_urb(uvc_urb, stream)
+		usb_poison_urb(uvc_urb->urb);
 
-		urb = uvc_urb->urb;
-		if (urb == NULL)
-			continue;
+	flush_workqueue(stream->async_wq);
 
-		usb_kill_urb(urb);
-		usb_free_urb(urb);
+	for_each_uvc_urb(uvc_urb, stream) {
+		usb_free_urb(uvc_urb->urb);
 		uvc_urb->urb = NULL;
 	}
 
 	if (free_buffers)
 		uvc_free_urb_buffers(stream);
+
+	destroy_workqueue(stream->async_wq);
 }
 
 /*
@@ -1737,6 +1792,11 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
 
 	uvc_video_stats_start(stream);
 
+	stream->async_wq = alloc_workqueue("uvcvideo", WQ_UNBOUND | WQ_HIGHPRI,
+			0);
+	if (!stream->async_wq)
+		return -ENOMEM;
+
 	if (intf->num_altsetting > 1) {
 		struct usb_host_endpoint *best_ep = NULL;
 		unsigned int best_psize = UINT_MAX;
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index 9e31ca87bc758..0dd58a31a11fd 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -462,6 +462,21 @@ struct uvc_stats_stream {
 
 #define UVC_METATADA_BUF_SIZE 1024
 
+/**
+ * struct uvc_copy_op: Context structure to schedule asynchronous memcpy
+ *
+ * @buf: active buf object for this operation
+ * @dst: copy destination address
+ * @src: copy source address
+ * @len: copy length
+ */
+struct uvc_copy_op {
+	struct uvc_buffer *buf;
+	void *dst;
+	const __u8 *src;
+	size_t len;
+};
+
 /**
  * struct uvc_urb - URB context management structure
  *
@@ -469,6 +484,9 @@ struct uvc_stats_stream {
  * @stream: UVC streaming context
  * @buffer: memory storage for the URB
  * @dma: DMA coherent addressing for the urb_buffer
+ * @async_operations: counter to indicate the number of copy operations
+ * @copy_operations: work descriptors for asynchronous copy operations
+ * @work: work queue entry for asynchronous decode
  */
 struct uvc_urb {
 	struct urb *urb;
@@ -476,6 +494,10 @@ struct uvc_urb {
 
 	char *buffer;
 	dma_addr_t dma;
+
+	unsigned int async_operations;
+	struct uvc_copy_op copy_operations[UVC_MAX_PACKETS];
+	struct work_struct work;
 };
 
 struct uvc_streaming {
@@ -508,6 +530,7 @@ struct uvc_streaming {
 	/* Buffers queue. */
 	unsigned int frozen : 1;
 	struct uvc_video_queue queue;
+	struct workqueue_struct *async_wq;
 	void (*decode)(struct uvc_urb *uvc_urb, struct uvc_buffer *buf,
 		       struct uvc_buffer *meta_buf);
 
@@ -561,6 +584,11 @@ struct uvc_streaming {
 	} clock;
 };
 
+#define for_each_uvc_urb(uvc_urb, uvc_streaming) \
+	for (uvc_urb = &uvc_streaming->uvc_urb[0]; \
+	     uvc_urb < &uvc_streaming->uvc_urb[UVC_URBS]; \
+	     ++uvc_urb)
+
 struct uvc_device {
 	struct usb_device *udev;
 	struct usb_interface *intf;

From a86da2574f9e1d50b6b25b8e23d7f1fa24aec846 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Thu, 5 Jul 2018 09:53:49 +0800
Subject: [PATCH 0074/1852] ARM64: dts: rockchip: enable cpufreq 1.2G for
 rk3308 EVB V11

Change-Id: Ifc077a299c98cb2e1039397f548b1047d10c17c2
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 35e029ace6470..1c1dfd9b8ee07 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -255,6 +255,9 @@
 };
 
 &cpu0_opp_table {
+	opp-1200000000 {
+		status = "okay";
+	};
 	opp-1296000000 {
 		status = "okay";
 	};

From 891a19c1119f792a455799b601d87c4b9736b134 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Wed, 4 Jul 2018 14:07:44 +0800
Subject: [PATCH 0075/1852] ASoC: rockchip: multi_dais_pcm:
 dmaengine_mpcm_pointer

This patch use the master chan as the sync pointer. and in some case,
one or more sub dai may not start at the same time, or one sub dai
works always which leading the pointer of each sub dai is different,
it depends on the fifo available count and waterlevel. the maximum is
the whole fifo size. report the pointer(dma_pos - max_fifo_size) to
make sure each sub buffer have been filled out.

Change-Id: I5a6d8b3f3c63f8ed7b55b0402429904368adf557
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_multi_dais_pcm.c | 37 +++++++++++++++-----
 1 file changed, 28 insertions(+), 9 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_multi_dais_pcm.c b/sound/soc/rockchip/rockchip_multi_dais_pcm.c
index c41e582347857..f9c9a56f5a85a 100644
--- a/sound/soc/rockchip/rockchip_multi_dais_pcm.c
+++ b/sound/soc/rockchip/rockchip_multi_dais_pcm.c
@@ -17,6 +17,8 @@
 
 #include "rockchip_multi_dais.h"
 
+#define MAX_FIFO_SIZE	32 /* max fifo size in frames */
+
 struct dmaengine_mpcm {
 	struct rk_mdais_dev *mdais;
 	struct dma_chan *tx_chans[MAX_DAIS];
@@ -30,6 +32,8 @@ struct dmaengine_mpcm_runtime_data {
 	unsigned int *channel_maps;
 	int num_chans;
 	unsigned int pos;
+	unsigned int master_chan;
+	bool start_flag;
 };
 
 static inline struct dmaengine_mpcm_runtime_data *substream_to_prtd(
@@ -145,6 +149,7 @@ static int dmaengine_mpcm_prepare_and_submit(struct snd_pcm_substream *substream
 			desc->callback = dmaengine_mpcm_dma_complete;
 			desc->callback_param = substream;
 			callback = true;
+			prtd->master_chan = i;
 		}
 		prtd->cookies[i] = dmaengine_submit(desc);
 		offset += samples_to_bytes(runtime, maps[i]);
@@ -215,12 +220,15 @@ static int snd_dmaengine_mpcm_trigger(struct snd_pcm_substream *substream, int c
 			mpcm_dmaengine_pause(prtd);
 		else
 			mpcm_dmaengine_terminate_all(prtd);
+		prtd->start_flag = false;
 		break;
 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 		mpcm_dmaengine_pause(prtd);
+		prtd->start_flag = false;
 		break;
 	case SNDRV_PCM_TRIGGER_STOP:
 		mpcm_dmaengine_terminate_all(prtd);
+		prtd->start_flag = false;
 		break;
 	default:
 		return -EINVAL;
@@ -393,6 +401,7 @@ static int dmaengine_mpcm_open(struct snd_pcm_substream *substream)
 	}
 
 	prtd->num_chans = pcm->mdais->num_dais;
+	prtd->start_flag = false;
 	substream->runtime->private_data = prtd;
 
 	return 0;
@@ -430,22 +439,32 @@ static int dmaengine_mpcm_new(struct snd_soc_pcm_runtime *rtd)
 static snd_pcm_uframes_t dmaengine_mpcm_pointer(struct snd_pcm_substream *substream)
 {
 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
+	struct snd_pcm_runtime *runtime = substream->runtime;
 	struct dma_tx_state state;
+	snd_pcm_uframes_t frames;
 	unsigned int buf_size;
 	unsigned int pos = 0;
-	int i = 0;
+	unsigned int master = prtd->master_chan;
 
 	buf_size = snd_pcm_lib_buffer_bytes(substream);
-	for (i = 0; i < prtd->num_chans; i++) {
-		if (!prtd->chans[i])
-			continue;
-		dmaengine_tx_status(prtd->chans[i], prtd->cookies[i], &state);
-		if (state.residue > 0 && state.residue <= buf_size)
-			pos = buf_size - state.residue;
-		break;
+	dmaengine_tx_status(prtd->chans[master], prtd->cookies[master], &state);
+	if (state.residue > 0 && state.residue <= buf_size)
+		pos = buf_size - state.residue;
+
+	frames = bytes_to_frames(substream->runtime, pos);
+	if (!prtd->start_flag && frames >= MAX_FIFO_SIZE)
+		prtd->start_flag = true;
+
+	if (prtd->start_flag) {
+		if (frames >= MAX_FIFO_SIZE)
+			frames -= MAX_FIFO_SIZE;
+		else
+			frames = runtime->buffer_size + frames - MAX_FIFO_SIZE;
+	} else {
+		frames = 0;
 	}
 
-	return bytes_to_frames(substream->runtime, pos);
+	return frames;
 }
 
 static int dmaengine_mpcm_close(struct snd_pcm_substream *substream)

From 801a5d302fdd33f39a9cb4147bc4bf241ef0ee00 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Wed, 13 Jun 2018 17:52:12 +0800
Subject: [PATCH 0076/1852] arm64: dts: rockchip: enable sfc for rk3308-evb-v10

Change-Id: I091998de2517b9ca5afc77d7c6c02410dd86c618
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index cf8a61b0945c5..30f3cbea0a0d7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -675,6 +675,10 @@
 	status = "disabled";
 };
 
+&sfc {
+	status = "okay";
+};
+
 &tsadc {
 	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */

From 01de979edbe813c025b28e7f1ceb5cbfe99b8573 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Wed, 13 Jun 2018 17:56:21 +0800
Subject: [PATCH 0077/1852] arm64: configs: rk3308_linux_defconfig: enable slc
 nand and sfc devices driver

1.Disable former nandc configs and change to sftl slc nand;
2.Enables sfc spi nand drivers and sfc spi nand drivers.

Change-Id: Ia17e4e5cac5a2859cf2cb2013d40c446b88194b5
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index f9c5775f21542..a1555cb1479fd 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -229,7 +229,10 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_ANDROID=y
 CONFIG_NVMEM=y
 CONFIG_ROCKCHIP_OTP=y
-CONFIG_RK_NAND=y
+CONFIG_RK_FLASH=y
+CONFIG_RK_NANDC_NAND=y
+CONFIG_RK_SFC_NAND=y
+CONFIG_RK_SFC_NOR=y
 CONFIG_ROCKCHIP_SIP=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT4_FS=m

From 09145a1fc8a7ffc0420f91bae47a6ddebb2f45b3 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 26 Jun 2018 18:09:59 +0800
Subject: [PATCH 0078/1852] soc: rockchip: opp_select: Use
 'rockchip,thermal-zone' property for pvtm

Make the property more general.

Change-Id: Ieacbaccdc008ff8cee51ebfafc203b3200a1c5af
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../devicetree/bindings/cpufreq/cpufreq-rockchip.txt     | 2 +-
 arch/arm/boot/dts/rk3288.dtsi                            | 2 +-
 arch/arm64/boot/dts/rockchip/px30.dtsi                   | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi             | 6 +++---
 drivers/soc/rockchip/rockchip_opp_select.c               | 9 ++++++---
 5 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
index 06b4c2f5a608f..01b16ad55c433 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
@@ -47,7 +47,7 @@ In 'operating-points-v2' table:
                        used when current temperature is below reference
                        temperature. Conversely, The second one is used when
                        current temperature is above reference temperature.
-- rockchip,pvtm-thermal-zone: A thermal zone node containing thermal sensor,
+- rockchip,thermal-zone: A thermal zone node containing thermal sensor,
                        it's used to get the current temperature.
 
 - nvmem-cells: A phandle to cpu_leakage data provided by a nvmem device.
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cc19625d64bad..8b76ce9606214 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -158,7 +158,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <35>;
 		rockchip,pvtm-temp-prop = <(-18) (-18)>;
-		rockchip,pvtm-thermal-zone = "soc-thermal";
+		rockchip,thermal-zone = "soc-thermal";
 
 		opp-126000000 {
 			opp-hz = /bits/ 64 <126000000>;
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 049e344ec54d3..3f85e8abc4ed2 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -127,7 +127,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <40>;
 		rockchip,pvtm-temp-prop = <(-56) (-56)>;
-		rockchip,pvtm-thermal-zone = "soc-thermal";
+		rockchip,thermal-zone = "soc-thermal";
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
index f443a9a21f986..82514d1b7b114 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -64,7 +64,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <41>;
 		rockchip,pvtm-temp-prop = <115 66>;
-		rockchip,pvtm-thermal-zone = "soc-thermal";
+		rockchip,thermal-zone = "soc-thermal";
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
@@ -144,7 +144,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <41>;
 		rockchip,pvtm-temp-prop = <71 35>;
-		rockchip,pvtm-thermal-zone = "soc-thermal";
+		rockchip,thermal-zone = "soc-thermal";
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
@@ -241,7 +241,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <41>;
 		rockchip,pvtm-temp-prop = <46 12>;
-		rockchip,pvtm-thermal-zone = "gpu-thermal";
+		rockchip,thermal-zone = "gpu-thermal";
 
 		opp-200000000 {
 			opp-hz = /bits/ 64 <200000000>;
diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index 231f24839922c..61c290ab49137 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -232,9 +232,12 @@ static int rockchip_parse_pvtm_config(struct device_node *np,
 	if (of_property_read_u32_array(np, "rockchip,pvtm-temp-prop",
 				       pvtm->temp_prop, 2))
 		return -EINVAL;
-	if (of_property_read_string(np, "rockchip,pvtm-thermal-zone",
-				    &pvtm->tz_name))
-		return -EINVAL;
+	if (of_property_read_string(np, "rockchip,thermal-zone",
+				    &pvtm->tz_name)) {
+		if (of_property_read_string(np, "rockchip,pvtm-thermal-zone",
+					    &pvtm->tz_name))
+			return -EINVAL;
+	}
 	pvtm->tz = thermal_zone_get_zone_by_name(pvtm->tz_name);
 	if (IS_ERR(pvtm->tz))
 		return -EINVAL;

From 0904dd2e617c68cf6530845889d5b01ef0a9d6bc Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 26 Jun 2018 22:09:05 +0800
Subject: [PATCH 0079/1852] PM / OPP: Rename dev_pm_opp_check_initial_rate to
 dev_pm_opp_check_rate_volt

Make the function more general.

Change-Id: Ic10b84ddb6b7eff33e1a1fe491f05f10a9c6015a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/base/power/opp/core.c | 24 ++++++++++++------------
 drivers/cpufreq/cpufreq-dt.c  |  5 +----
 include/linux/pm_opp.h        |  5 ++---
 3 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.c
index 7028daa3adcbd..e185950a3eece 100644
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
@@ -704,15 +704,15 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq)
 EXPORT_SYMBOL_GPL(dev_pm_opp_set_rate);
 
 /**
- * dev_pm_opp_check_initial_rate() - Configure new OPP based on initial rate
+ * dev_pm_opp_check_rate_volt() - Configure new OPP based on current rate
  * @dev:	 device for which we do this operation
  *
  * This configures the power-supplies and clock source to the levels specified
- * by the OPP corresponding to the system initial rate.
+ * by the OPP corresponding to current rate.
  *
  * Locking: This function takes rcu_read_lock().
  */
-int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq)
+int dev_pm_opp_check_rate_volt(struct device *dev, bool force)
 {
 	struct opp_table *opp_table;
 	struct dev_pm_opp *opp;
@@ -741,7 +741,6 @@ int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq)
 	}
 
 	old_freq = clk_get_rate(clk);
-	*cur_freq = old_freq;
 	target_freq = old_freq;
 
 	opp = dev_pm_opp_find_freq_ceil(dev, &target_freq);
@@ -772,11 +771,14 @@ int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq)
 		target_freq, u_volt);
 
 	if (old_freq == target_freq) {
-		ret = _set_opp_voltage(dev, reg, u_volt, u_volt_min,
-				       u_volt_max);
-		if (ret) {
-			dev_err(dev, "failed to set volt %lu\n", u_volt);
-			return ret;
+		if (old_volt != u_volt || force) {
+			ret = _set_opp_voltage(dev, reg, u_volt, u_volt_min,
+					u_volt_max);
+			if (ret) {
+				dev_err(dev, "failed to set volt %lu\n",
+					u_volt);
+				return ret;
+			}
 		}
 		return 0;
 	}
@@ -798,8 +800,6 @@ int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq)
 		return ret;
 	}
 
-	*cur_freq = clk_get_rate(clk);
-
 	/* Scaling down? Scale voltage after frequency */
 	if (target_freq < old_freq) {
 		ret = _set_opp_voltage(dev, reg, u_volt, u_volt_min,
@@ -812,7 +812,7 @@ int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq)
 
 	return 0;
 }
-EXPORT_SYMBOL_GPL(dev_pm_opp_check_initial_rate);
+EXPORT_SYMBOL_GPL(dev_pm_opp_check_rate_volt);
 
 /* OPP-dev Helpers */
 static void _kfree_opp_dev_rcu(struct rcu_head *head)
diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index f07774f96a14a..2632f162e4250 100644
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -158,7 +158,6 @@ static int cpufreq_init(struct cpufreq_policy *policy)
 	struct cpumask cpus;
 #endif
 	unsigned int transition_latency;
-	unsigned long cur_freq;
 	bool opp_v1 = false;
 	const char *name;
 	int ret, scale;
@@ -314,9 +313,7 @@ static int cpufreq_init(struct cpufreq_policy *policy)
 	policy->down_transition_delay_us = 50000; /* 50ms */
 
 	if (check_init < MAX_CLUSTERS) {
-		ret = dev_pm_opp_check_initial_rate(cpu_dev, &cur_freq);
-		if (!ret)
-			policy->cur = cur_freq / 1000;
+		dev_pm_opp_check_rate_volt(cpu_dev, true);
 		check_init++;
 	}
 
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index fb07ba05699a1..33f5e8d95786d 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -66,7 +66,7 @@ void dev_pm_opp_put_prop_name(struct device *dev);
 int dev_pm_opp_set_regulator(struct device *dev, const char *name);
 void dev_pm_opp_put_regulator(struct device *dev);
 int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq);
-int dev_pm_opp_check_initial_rate(struct device *dev, unsigned long *cur_freq);
+int dev_pm_opp_check_rate_volt(struct device *dev, bool force);
 #else
 static inline unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp)
 {
@@ -180,8 +180,7 @@ static inline int dev_pm_opp_set_rate(struct device *dev, unsigned long target_f
 	return -EINVAL;
 }
 
-static inline int dev_pm_opp_check_initial_rate(struct device *dev,
-						unsigned long *cur_freq)
+static inline int dev_pm_opp_check_rate_volt(struct device *dev, bool force)
 {
 	return -EINVAL;
 }

From 062bc815d8eba50a40998c331b31be312ce07bc5 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 26 Jun 2018 22:15:30 +0800
Subject: [PATCH 0080/1852] cpufreq: rockchip: implement
 rockchip_cpufreq_check_rate_volt()

Change-Id: I707c88d217725e66119aa28e8823ce68ac3abfba
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/cpufreq/cpufreq-dt.c       | 10 +++-------
 drivers/cpufreq/rockchip-cpufreq.c | 17 +++++++++++++++++
 include/linux/cpufreq.h            |  6 ++++++
 3 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index 2632f162e4250..c3889bf41545e 100644
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -32,8 +32,6 @@
 #include <soc/rockchip/rockchip_opp_select.h>
 #endif
 
-#define MAX_CLUSTERS		2
-
 struct private_data {
 	struct device *cpu_dev;
 	struct thermal_cooling_device *cdev;
@@ -161,7 +159,6 @@ static int cpufreq_init(struct cpufreq_policy *policy)
 	bool opp_v1 = false;
 	const char *name;
 	int ret, scale;
-	static int check_init;
 
 	cpu_dev = get_cpu_device(policy->cpu);
 	if (!cpu_dev) {
@@ -312,10 +309,9 @@ static int cpufreq_init(struct cpufreq_policy *policy)
 	policy->up_transition_delay_us = transition_latency / NSEC_PER_USEC;
 	policy->down_transition_delay_us = 50000; /* 50ms */
 
-	if (check_init < MAX_CLUSTERS) {
-		dev_pm_opp_check_rate_volt(cpu_dev, true);
-		check_init++;
-	}
+#ifdef CONFIG_ARCH_ROCKCHIP
+	rockchip_cpufreq_check_rate_volt(cpu_dev);
+#endif
 
 	return 0;
 
diff --git a/drivers/cpufreq/rockchip-cpufreq.c b/drivers/cpufreq/rockchip-cpufreq.c
index cd8bcdac0e457..73ebcf3f70374 100644
--- a/drivers/cpufreq/rockchip-cpufreq.c
+++ b/drivers/cpufreq/rockchip-cpufreq.c
@@ -48,6 +48,7 @@ struct cluster_info {
 	bool offline;
 	bool rebooting;
 	bool freq_limit;
+	bool is_check_init;
 };
 static LIST_HEAD(cluster_info_list);
 
@@ -172,6 +173,22 @@ int rockchip_cpufreq_set_scale_rate(struct device *dev, unsigned long rate)
 }
 EXPORT_SYMBOL_GPL(rockchip_cpufreq_set_scale_rate);
 
+int rockchip_cpufreq_check_rate_volt(struct device *dev)
+{
+	struct cluster_info *cluster;
+
+	cluster = rockchip_cluster_lookup_by_dev(dev);
+	if (!cluster)
+		return -EINVAL;
+	if (cluster->is_check_init)
+		return 0;
+	dev_pm_opp_check_rate_volt(dev, true);
+	cluster->is_check_init = true;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(rockchip_cpufreq_check_rate_volt);
+
 static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
 {
 	struct device_node *np;
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 24b9e4e137b4d..be27ec362a9dc 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -699,6 +699,7 @@ unsigned long cpufreq_scale_max_freq_capacity(int cpu);
 unsigned int rockchip_cpufreq_adjust_target(int cpu, unsigned int freq);
 int rockchip_cpufreq_get_scale(int cpu);
 int rockchip_cpufreq_set_scale_rate(struct device *dev, unsigned long rate);
+int rockchip_cpufreq_check_rate_volt(struct device *dev);
 #else
 static inline unsigned int rockchip_cpufreq_adjust_target(int cpu,
 							  unsigned int freq)
@@ -716,5 +717,10 @@ static inline int rockchip_cpufreq_set_scale_rate(struct device *dev,
 {
 	return -EINVAL;
 }
+
+static inline int rockchip_cpufreq_check_rate_volt(struct device *dev)
+{
+	return -EINVAL;
+}
 #endif
 #endif /* _LINUX_CPUFREQ_H */

From 8813307f42f3fd41c5f74a447b4d59ae35e69a0b Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Fri, 6 Jul 2018 09:50:11 +0800
Subject: [PATCH 0081/1852] arm64: dts: rockchip: corrected clock-names for
 uart1 of rk3328

Change-Id: I4f2f1265ba517b5effce0c1b4130d0eb10eae9e5
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index b319e731d97b4..41c6b4210a715 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -454,7 +454,7 @@
 		reg = <0x0 0xff120000 0x0 0x100>;
 		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
-		clock-names = "sclk_uart", "pclk_uart";
+		clock-names = "baudclk", "apb_pclk";
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 4>, <&dmac 5>;

From c6fff95e8d41ef5fc387d8334a7a988cd1971097 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Wed, 23 May 2018 11:24:32 +0800
Subject: [PATCH 0082/1852] media: soc_camera: add ov9750 sensor driver

Change-Id: I027a08ce90a78d4124c07471f21218599fdad815
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/soc_camera/rockchip/Kconfig |    7 +
 .../media/i2c/soc_camera/rockchip/Makefile    |    1 +
 .../rockchip/ov9750_v4l2-i2c-subdev.c         | 1036 +++++++++++++++++
 .../soc_camera/rockchip/ov_camera_module.h    |    1 +
 4 files changed, 1045 insertions(+)
 create mode 100644 drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c

diff --git a/drivers/media/i2c/soc_camera/rockchip/Kconfig b/drivers/media/i2c/soc_camera/rockchip/Kconfig
index 9572f4fc6937e..616f8827480d8 100644
--- a/drivers/media/i2c/soc_camera/rockchip/Kconfig
+++ b/drivers/media/i2c/soc_camera/rockchip/Kconfig
@@ -68,3 +68,10 @@ config VIDEO_OV13850
 	default n
 	---help---
 	  This is ov13850 camera driver adapt to rockchip cif isp platform.
+
+config VIDEO_OV9750
+	tristate "ov9750 driver adapt to rockchip cif isp platform"
+	depends on VIDEO_V4L2 && VIDEO_RK_CIF_ISP10 && I2C
+	default n
+	---help---
+	  This is ov9750 camera driver adapt to rockchip cif isp platform.
diff --git a/drivers/media/i2c/soc_camera/rockchip/Makefile b/drivers/media/i2c/soc_camera/rockchip/Makefile
index 0e7ffbd16e734..eeff7e0d16515 100644
--- a/drivers/media/i2c/soc_camera/rockchip/Makefile
+++ b/drivers/media/i2c/soc_camera/rockchip/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_VIDEO_ADV7181) += adv_camera_module.o rk_camera_module.o adv7181_v4
 obj-$(CONFIG_VIDEO_OV7675) += ov_camera_module.o rk_camera_module.o ov7675_v4l2-i2c-subdev.o
 obj-$(CONFIG_VIDEO_NT99230) += ov_camera_module.o rk_camera_module.o nt99230_v4l2-i2c-subdev.o
 obj-$(CONFIG_VIDEO_OV13850) += ov_camera_module.o rk_camera_module.o ov13850_v4l2-i2c-subdev.o
+obj-$(CONFIG_VIDEO_OV9750) += ov_camera_module.o rk_camera_module.o ov9750_v4l2-i2c-subdev.o
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
new file mode 100644
index 0000000000000..69b4be96ce662
--- /dev/null
+++ b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
@@ -0,0 +1,1036 @@
+/*
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * Copyright (C) 2012-2014 Intel Mobile Communications GmbH
+ *
+ * Copyright (C) 2008 Texas Instruments.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ */
+
+#include <linux/i2c.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <media/v4l2-subdev.h>
+#include <media/videobuf-core.h>
+#include <linux/slab.h>
+#include <media/v4l2-controls_rockchip.h>
+#include "ov_camera_module.h"
+
+#define OV9750_DRIVER_NAME "ov9750"
+
+#define OV9750_FETCH_LSB_GAIN(VAL) (VAL & 0xFF)
+#define OV9750_FETCH_MSB_GAIN(VAL) ((VAL >> 8) & 0xff)
+#define OV9750_AEC_PK_LONG_GAIN_HIGH_REG 0x3508
+#define OV9750_AEC_PK_LONG_GAIN_LOW_REG 0x3509
+
+#define OV9750_AEC_PK_LONG_EXPO_3RD_REG 0x3500
+#define OV9750_AEC_PK_LONG_EXPO_2ND_REG 0x3501
+#define OV9750_AEC_PK_LONG_EXPO_1ST_REG 0x3502
+
+#define OV9750_AEC_GROUP_UPDATE_ADDRESS 0x3208
+#define OV9750_AEC_GROUP_UPDATE_START_DATA 0x00
+#define OV9750_AEC_GROUP_UPDATE_END_DATA 0x10
+#define OV9750_AEC_GROUP_UPDATE_END_LAUNCH 0xA0
+
+#define OV9750_FETCH_3RD_BYTE_EXP(VAL) (((VAL) >> 12) & 0xF)
+#define OV9750_FETCH_2ND_BYTE_EXP(VAL) (((VAL) >> 4) & 0xFF)
+#define OV9750_FETCH_1ST_BYTE_EXP(VAL) (((VAL) & 0x0F) << 4)
+
+#define OV9750_PIDH_ADDR 0x300B
+#define OV9750_PIDL_ADDR 0x300C
+
+#define OV9750_PIDH_MAGIC 0x97
+#define OV9750_PIDL_MAGIC 0x50
+
+#define OV9750_EXT_CLK 12000000
+#define OV9750_TIMING_VTS_HIGH_REG 0x380e
+#define OV9750_TIMING_VTS_LOW_REG 0x380f
+#define OV9750_TIMING_HTS_HIGH_REG 0x380c
+#define OV9750_TIMING_HTS_LOW_REG 0x380d
+#define OV9750_FINE_INTG_TIME_MIN 0
+#define OV9750_FINE_INTG_TIME_MAX_MARGIN 0
+#define OV9750_COARSE_INTG_TIME_MIN 1
+#define OV9750_COARSE_INTG_TIME_MAX_MARGIN 4
+#define OV9750_TIMING_X_INC 0x3814
+#define OV9750_TIMING_Y_INC 0x3815
+#define OV9750_HORIZONTAL_START_HIGH_REG 0x3800
+#define OV9750_HORIZONTAL_START_LOW_REG 0x3801
+#define OV9750_VERTICAL_START_HIGH_REG 0x3802
+#define OV9750_VERTICAL_START_LOW_REG 0x3803
+#define OV9750_HORIZONTAL_END_HIGH_REG 0x3804
+#define OV9750_HORIZONTAL_END_LOW_REG 0x3805
+#define OV9750_VERTICAL_END_HIGH_REG 0x3806
+#define OV9750_VERTICAL_END_LOW_REG 0x3807
+#define OV9750_HORIZONTAL_OUTPUT_SIZE_HIGH_REG 0x3808
+#define OV9750_HORIZONTAL_OUTPUT_SIZE_LOW_REG 0x3809
+#define OV9750_VERTICAL_OUTPUT_SIZE_HIGH_REG 0x380a
+#define OV9750_VERTICAL_OUTPUT_SIZE_LOW_REG 0x380b
+#define OV9750_H_WIN_OFF_HIGH_REG 0x3810
+#define OV9750_H_WIN_OFF_LOW_REG 0x3811
+#define OV9750_V_WIN_OFF_HIGH_REG 0x3812
+#define OV9750_V_WIN_OFF_LOW_REG 0x3813
+
+static int cam_num;
+static struct ov_camera_module ov9750[2];
+
+/* ======================================================================== */
+/* Base sensor configs */
+/* ======================================================================== */
+/* 1280x960 2lane MCLK:24MHz 60fps 800Mbps/lane, MCLK:12Mhz 30fps 400Mbps/lane */
+static struct ov_camera_module_reg ov9750_init_tab_1280_960_30fps[] = {
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0103, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_TIMEOUT, 0x0000, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0100, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_TIMEOUT, 0x0000, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0300, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0302, 0x64},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0303, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0304, 0x03},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0305, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0306, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x030a, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x030b, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x030d, 0x1e},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x030e, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x030f, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x0312, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x031e, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3000, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3001, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3002, 0x21},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3005, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3011, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3016, 0x53},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3018, 0x32},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x301a, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x301b, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x301c, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x301d, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x301e, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3022, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3031, 0x0a},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3032, 0x80},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x303c, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x303e, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3040, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3041, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3042, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3104, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3106, 0x15},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3107, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3500, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3501, 0x38},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3502, 0x40},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3503, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3504, 0x03},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3505, 0x83},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3508, 0x02},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3509, 0x80},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3600, 0x65},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3601, 0x60},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3602, 0x22},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3610, 0xe8},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x5c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3612, 0x18},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3613, 0x3a},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3614, 0x91},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3615, 0x79},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3617, 0x57},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3621, 0x90},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3622, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3623, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3633, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3634, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3635, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3650, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3652, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3654, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3653, 0x34},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3655, 0x20},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3656, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3657, 0xc4},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x365a, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x365b, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x365e, 0xff},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x365f, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3668, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x366a, 0x07},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x366d, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x366e, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3702, 0x1d},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3703, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3704, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3705, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3706, 0x27},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3709, 0x24},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x370a, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x370b, 0x7d},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3714, 0x24},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x371a, 0x5e},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3730, 0x82},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3733, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x373e, 0x18},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3755, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3758, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x375b, 0x13},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3772, 0x23},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3773, 0x05},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3774, 0x16},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3775, 0x12},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3776, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37a8, 0x38},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37b5, 0x36},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c2, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c5, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c7, 0x31},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c8, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37d1, 0x13},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3800, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3801, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3802, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3803, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3804, 0x05},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3805, 0x0f},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3806, 0x03},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3807, 0xcb},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3808, 0x05},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3809, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380a, 0x03},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380b, 0xc0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380c, 0x03},//hts
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380d, 0x2a},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380e, 0x03},//vts
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x380f, 0xdc},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3810, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3811, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3812, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3813, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3814, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3815, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3816, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3817, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3818, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3819, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3820, 0x80},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3821, 0x40},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3826, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3827, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x382a, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x382b, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3836, 0x02},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3838, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3861, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3862, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3863, 0x02},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3b00, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c00, 0x89},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c01, 0xab},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c02, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c03, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c04, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c05, 0x03},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c06, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c07, 0x05},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c0c, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c0d, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c0e, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c0f, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c40, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c41, 0xa3},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c43, 0x7d},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c56, 0x80},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c80, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c82, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3c83, 0x61},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3d85, 0x17},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3f08, 0x08},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3f0a, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3f0b, 0x30},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4000, 0xcd},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4003, 0x40},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4009, 0x0d},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4010, 0xf0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4011, 0x70},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4017, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4040, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4041, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4303, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4307, 0x30},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4500, 0x30},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4502, 0x40},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4503, 0x06},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4508, 0xaa},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x450b, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x450c, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4600, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4601, 0x80},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4700, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4704, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4705, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x4837, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x484a, 0x3f},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5000, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5001, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5002, 0x28},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5004, 0x0c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5006, 0x0c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5007, 0xe0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5008, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5009, 0xb0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x502a, 0x18},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5901, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a01, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a03, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a04, 0x0c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a05, 0xe0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a06, 0x09},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a07, 0xb0},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5a08, 0x06},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5e00, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x5e10, 0xfc},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x300f, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3733, 0x10},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3610, 0xe8},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x5c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3635, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3620, 0x84},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3614, 0x96},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x481f, 0x30},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3788, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3789, 0x04},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x378a, 0x01},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x378b, 0x60},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3799, 0x27},
+};
+
+/* ======================================================================== */
+
+static struct ov_camera_module_config ov9750_configs[] = {
+	{
+		.name = "1280x960_30fps",
+		.frm_fmt = {
+			.width = 1280,
+			.height = 960,
+			.code = MEDIA_BUS_FMT_SBGGR10_1X10
+		},
+		.frm_intrvl = {
+			.interval = {
+				.numerator = 1,
+				.denominator = 30
+			}
+		},
+		.auto_exp_enabled = false,
+		.auto_gain_enabled = false,
+		.auto_wb_enabled = false,
+		.reg_table = (void *)ov9750_init_tab_1280_960_30fps,
+		.reg_table_num_entries =
+			ARRAY_SIZE(ov9750_init_tab_1280_960_30fps),
+		.v_blanking_time_us = 3078,
+		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 400, OV9750_EXT_CLK)
+	}
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_dual_mode(struct ov_camera_module *cam_mod)
+{
+	if (cam_mod->as_master) {
+		ov_camera_module_write_reg(cam_mod, 0x3002, 0xa1);
+		ov_camera_module_write_reg(cam_mod, 0x3007, 0x02);
+		ov_camera_module_write_reg(cam_mod, 0x3816, 0x00);
+		ov_camera_module_write_reg(cam_mod, 0x3817, 0x00);
+		ov_camera_module_write_reg(cam_mod, 0x3818, 0x00);
+		ov_camera_module_write_reg(cam_mod, 0x3819, 0x01);
+		ov_camera_module_write_reg(cam_mod, 0x3823, 0x00);
+		ov_camera_module_write_reg(cam_mod, 0x3824, 0x00);
+	} else {
+		ov_camera_module_write_reg(cam_mod, 0x3002, 0x21);
+		ov_camera_module_write_reg(cam_mod, 0x3823, 0x48);
+		ov_camera_module_write_reg(cam_mod, 0x3824, 0x11);
+	}
+	return 0;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_set_flip(struct ov_camera_module *cam_mod,
+	struct pltfrm_camera_module_reg reglist[],
+	int len)
+{
+	int i, mode = 0;
+	u16 match_reg[3];
+
+	mode = ov_camera_module_get_flip_mirror(cam_mod);
+
+	if (mode == -1) {
+		ov_camera_module_pr_debug(cam_mod,
+			"dts don't set flip, return!\n");
+		return 0;
+	}
+
+	if (mode == OV_FLIP_BIT_MASK) {
+		match_reg[0] = 0xc6;
+		match_reg[1] = 0x40;
+		match_reg[2] = 0x20;
+	} else if (mode == OV_MIRROR_BIT_MASK) {
+		match_reg[0] = 0x80;
+		match_reg[1] = 0x46;
+		match_reg[2] = 0x00;
+	} else if (mode == (OV_MIRROR_BIT_MASK |
+		OV_FLIP_BIT_MASK)) {
+		match_reg[0] = 0xc6;
+		match_reg[1] = 0x46;
+		match_reg[2] = 0x20;
+	} else {
+		match_reg[0] = 0x80;
+		match_reg[1] = 0x40;
+		match_reg[2] = 0x00;
+	}
+
+	for (i = len; i > 0; i--) {
+		if (reglist[i].reg == 0x3820)
+			reglist[i].val = match_reg[0];
+		else if (reglist[i].reg == 0x3821)
+			reglist[i].val = match_reg[1];
+		else if (reglist[i].reg == 0x450b)
+			reglist[i].val = match_reg[2];
+	}
+
+	return 0;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int OV9750_g_VTS(struct ov_camera_module *cam_mod, u32 *vts)
+{
+	u32 msb, lsb;
+	int ret;
+
+	ret = ov_camera_module_read_reg_table(cam_mod,
+		OV9750_TIMING_VTS_HIGH_REG,
+		&msb);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	ret = ov_camera_module_read_reg_table(cam_mod,
+		OV9750_TIMING_VTS_LOW_REG,
+		&lsb);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	*vts = (msb << 8) | lsb;
+
+	return 0;
+err:
+	ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	return ret;
+}
+
+static int OV9750_auto_adjust_fps(struct ov_camera_module *cam_mod,
+	u32 exp_time)
+{
+	int ret;
+	u32 vts;
+
+	if ((cam_mod->exp_config.exp_time + OV9750_COARSE_INTG_TIME_MAX_MARGIN)
+		> cam_mod->vts_min)
+		vts = cam_mod->exp_config.exp_time +
+			OV9750_COARSE_INTG_TIME_MAX_MARGIN;
+	else
+		vts = cam_mod->vts_min;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		OV9750_TIMING_VTS_LOW_REG,
+		vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		OV9750_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0x0F);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod,
+			"updated vts = 0x%x,vts_min=0x%x\n",
+			vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+
+	return ret;
+}
+
+static int ov9750_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts <= cam_mod->vts_min)
+		return ret;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		OV9750_TIMING_VTS_LOW_REG,
+		vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		OV9750_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0x0F);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod,
+			"updated vts = 0x%x,vts_min=0x%x\n",
+			vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
+static int ov9750_write_aec(struct ov_camera_module *cam_mod)
+{
+	int ret = 0;
+
+	ov_camera_module_pr_debug(cam_mod,
+		"exp_time = %d lines, gain = %d, flash_mode = %d\n",
+		cam_mod->exp_config.exp_time,
+		cam_mod->exp_config.gain,
+		cam_mod->exp_config.flash_mode);
+
+	/*
+	 * if the sensor is already streaming, write to shadow registers,
+	 * if the sensor is in SW standby, write to active registers,
+	 * if the sensor is off/registers are not writeable, do nothing
+	 */
+	if (cam_mod->state == OV_CAMERA_MODULE_SW_STANDBY ||
+		cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
+		u32 a_gain = cam_mod->exp_config.gain;
+		u32 exp_time = cam_mod->exp_config.exp_time;
+
+		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
+		if (a_gain < 0x80)
+			a_gain = 0x80;
+		if (a_gain > 0x7c0)
+			a_gain = 0x7c0;
+		if (exp_time < 4)
+			exp_time = 4;
+
+		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
+			ret = ov_camera_module_write_reg(cam_mod,
+				OV9750_AEC_GROUP_UPDATE_ADDRESS,
+				OV9750_AEC_GROUP_UPDATE_START_DATA);
+		if (!IS_ERR_VALUE(ret) && cam_mod->auto_adjust_fps)
+			ret = OV9750_auto_adjust_fps(cam_mod,
+				cam_mod->exp_config.exp_time);
+		ret |= ov_camera_module_write_reg(cam_mod,
+			OV9750_AEC_PK_LONG_GAIN_HIGH_REG,
+			OV9750_FETCH_MSB_GAIN(a_gain));
+		ret |= ov_camera_module_write_reg(cam_mod,
+			OV9750_AEC_PK_LONG_GAIN_LOW_REG,
+			OV9750_FETCH_LSB_GAIN(a_gain));
+		ret |= ov_camera_module_write_reg(cam_mod,
+			OV9750_AEC_PK_LONG_EXPO_3RD_REG,
+			OV9750_FETCH_3RD_BYTE_EXP(exp_time));
+		ret |= ov_camera_module_write_reg(cam_mod,
+			OV9750_AEC_PK_LONG_EXPO_2ND_REG,
+			OV9750_FETCH_2ND_BYTE_EXP(exp_time));
+		ret |= ov_camera_module_write_reg(cam_mod,
+			OV9750_AEC_PK_LONG_EXPO_1ST_REG,
+			OV9750_FETCH_1ST_BYTE_EXP(exp_time));
+
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov9750_set_vts(cam_mod, cam_mod->exp_config.vts_value);
+
+		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
+			ret = ov_camera_module_write_reg(cam_mod,
+				OV9750_AEC_GROUP_UPDATE_ADDRESS,
+				OV9750_AEC_GROUP_UPDATE_END_DATA);
+			ret = ov_camera_module_write_reg(cam_mod,
+				OV9750_AEC_GROUP_UPDATE_ADDRESS,
+				OV9750_AEC_GROUP_UPDATE_END_LAUNCH);
+		}
+	}
+
+	if (IS_ERR_VALUE(ret))
+		ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	return ret;
+}
+
+static int ov9750_g_ctrl(struct ov_camera_module *cam_mod, u32 ctrl_id)
+{
+	int ret = 0;
+
+	ov_camera_module_pr_debug(cam_mod, "\n");
+
+	switch (ctrl_id) {
+	case V4L2_CID_GAIN:
+	case V4L2_CID_EXPOSURE:
+	case V4L2_CID_FLASH_LED_MODE:
+		/* nothing to be done here */
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	if (IS_ERR_VALUE(ret))
+		ov_camera_module_pr_debug(cam_mod,
+			"failed with error (%d)\n", ret);
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_filltimings(struct ov_camera_module_custom_config *custom)
+{
+	u32 i, j;
+	u32 win_h_off = 0, win_v_off = 0;
+	struct ov_camera_module_config *config;
+	struct ov_camera_module_timings *timings;
+	struct ov_camera_module_reg *reg_table;
+	u32 reg_table_num_entries;
+
+	for (i = 0; i < custom->num_configs; i++) {
+		config = &custom->configs[i];
+		reg_table = config->reg_table;
+		reg_table_num_entries = config->reg_table_num_entries;
+		timings = &config->timings;
+
+		memset(timings, 0x00, sizeof(*timings));
+		for (j = 0; j < reg_table_num_entries; j++) {
+			switch (reg_table[j].reg) {
+			case OV9750_TIMING_VTS_HIGH_REG:
+				timings->frame_length_lines =
+					((reg_table[j].val << 8) |
+					(timings->frame_length_lines & 0xff));
+				break;
+			case OV9750_TIMING_VTS_LOW_REG:
+				timings->frame_length_lines =
+					(reg_table[j].val |
+					(timings->frame_length_lines & 0xff00));
+				break;
+			case OV9750_TIMING_HTS_HIGH_REG:
+				timings->line_length_pck =
+					((reg_table[j].val << 8) |
+					timings->line_length_pck);
+				break;
+			case OV9750_TIMING_HTS_LOW_REG:
+				timings->line_length_pck =
+					(reg_table[j].val |
+					(timings->line_length_pck & 0xff00));
+				break;
+			case OV9750_TIMING_X_INC:
+				timings->binning_factor_x =
+					((reg_table[j].val >> 4) + 1) / 2;
+				if (timings->binning_factor_x == 0)
+					timings->binning_factor_x = 1;
+				break;
+			case OV9750_TIMING_Y_INC:
+				timings->binning_factor_y =
+					((reg_table[j].val >> 4) + 1) / 2;
+				if (timings->binning_factor_y == 0)
+					timings->binning_factor_y = 1;
+				break;
+			case OV9750_HORIZONTAL_START_HIGH_REG:
+				timings->crop_horizontal_start =
+					((reg_table[j].val << 8) |
+					(timings->crop_horizontal_start &
+					0xff));
+				break;
+			case OV9750_HORIZONTAL_START_LOW_REG:
+				timings->crop_horizontal_start =
+					(reg_table[j].val |
+					(timings->crop_horizontal_start &
+					0xff00));
+				break;
+			case OV9750_VERTICAL_START_HIGH_REG:
+				timings->crop_vertical_start =
+					((reg_table[j].val << 8) |
+					(timings->crop_vertical_start & 0xff));
+				break;
+			case OV9750_VERTICAL_START_LOW_REG:
+				timings->crop_vertical_start =
+					((reg_table[j].val) |
+					(timings->crop_vertical_start &
+					0xff00));
+				break;
+			case OV9750_HORIZONTAL_END_HIGH_REG:
+				timings->crop_horizontal_end =
+					((reg_table[j].val << 8) |
+					(timings->crop_horizontal_end & 0xff));
+				break;
+			case OV9750_HORIZONTAL_END_LOW_REG:
+				timings->crop_horizontal_end =
+					(reg_table[j].val |
+					(timings->crop_horizontal_end &
+					0xff00));
+				break;
+			case OV9750_VERTICAL_END_HIGH_REG:
+				timings->crop_vertical_end =
+					((reg_table[j].val << 8) |
+					(timings->crop_vertical_end & 0xff));
+				break;
+			case OV9750_VERTICAL_END_LOW_REG:
+				timings->crop_vertical_end =
+					(reg_table[j].val |
+					(timings->crop_vertical_end & 0xff00));
+				break;
+			case OV9750_H_WIN_OFF_HIGH_REG:
+				win_h_off = (reg_table[j].val & 0xf) << 8;
+				break;
+			case OV9750_H_WIN_OFF_LOW_REG:
+				win_h_off |= (reg_table[j].val & 0xff);
+				break;
+			case OV9750_V_WIN_OFF_HIGH_REG:
+				win_v_off = (reg_table[j].val & 0xf) << 8;
+				break;
+			case OV9750_V_WIN_OFF_LOW_REG:
+				win_v_off |= (reg_table[j].val & 0xff);
+				break;
+			case OV9750_HORIZONTAL_OUTPUT_SIZE_HIGH_REG:
+				timings->sensor_output_width =
+					((reg_table[j].val << 8) |
+					(timings->sensor_output_width & 0xff));
+				break;
+			case OV9750_HORIZONTAL_OUTPUT_SIZE_LOW_REG:
+				timings->sensor_output_width =
+					(reg_table[j].val |
+					(timings->sensor_output_width &
+					0xff00));
+				break;
+			case OV9750_VERTICAL_OUTPUT_SIZE_HIGH_REG:
+				timings->sensor_output_height =
+					((reg_table[j].val << 8) |
+					(timings->sensor_output_height & 0xff));
+				break;
+			case OV9750_VERTICAL_OUTPUT_SIZE_LOW_REG:
+				timings->sensor_output_height =
+					(reg_table[j].val |
+					(timings->sensor_output_height &
+					0xff00));
+				break;
+			}
+		}
+
+		timings->crop_horizontal_start += win_h_off;
+		timings->crop_horizontal_end -= win_h_off;
+		timings->crop_vertical_start += win_v_off;
+		timings->crop_vertical_end -= win_v_off;
+
+		timings->exp_time >>= 4;
+		timings->vt_pix_clk_freq_hz =
+			config->frm_intrvl.interval.denominator *
+			timings->frame_length_lines *
+			timings->line_length_pck;
+
+		timings->coarse_integration_time_min =
+			OV9750_COARSE_INTG_TIME_MIN;
+		timings->coarse_integration_time_max_margin =
+			OV9750_COARSE_INTG_TIME_MAX_MARGIN;
+
+		/* OV Sensor do not use fine integration time. */
+		timings->fine_integration_time_min =
+			OV9750_FINE_INTG_TIME_MIN;
+		timings->fine_integration_time_max_margin =
+			OV9750_FINE_INTG_TIME_MAX_MARGIN;
+	}
+
+	return 0;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_g_timings(struct ov_camera_module *cam_mod,
+			    struct ov_camera_module_timings *timings)
+{
+	int ret = 0;
+	unsigned int vts;
+
+	if (IS_ERR_OR_NULL(cam_mod->active_config))
+		goto err;
+
+	*timings = cam_mod->active_config->timings;
+
+	vts = (!cam_mod->vts_cur) ?
+		timings->frame_length_lines :
+		cam_mod->vts_cur;
+	if (cam_mod->frm_intrvl_valid)
+		timings->vt_pix_clk_freq_hz =
+			cam_mod->frm_intrvl.interval.denominator
+			* vts
+			* timings->line_length_pck;
+	else
+		timings->vt_pix_clk_freq_hz =
+			cam_mod->active_config->frm_intrvl.interval.denominator
+			* vts
+			* timings->line_length_pck;
+	return ret;
+err:
+	ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_s_ctrl(struct ov_camera_module *cam_mod, u32 ctrl_id)
+{
+	int ret = 0;
+
+	ov_camera_module_pr_debug(cam_mod, "\n");
+
+	switch (ctrl_id) {
+	case V4L2_CID_GAIN:
+	case V4L2_CID_EXPOSURE:
+		ret = ov9750_write_aec(cam_mod);
+		break;
+	case V4L2_CID_FLASH_LED_MODE:
+		/* nothing to be done here */
+		break;
+	case V4L2_CID_FOCUS_ABSOLUTE:
+		/* todo*/
+		break;
+	/*
+	 * case RK_V4L2_CID_FPS_CTRL:
+	 * if (cam_mod->auto_adjust_fps)
+	 * ret = OV9750_auto_adjust_fps(
+	 * cam_mod,
+	 * cam_mod->exp_config.exp_time);
+	 * break;
+	 */
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	if (IS_ERR_VALUE(ret))
+		ov_camera_module_pr_err(cam_mod,
+			"failed with error (%d)\n", ret);
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_s_ext_ctrls(struct ov_camera_module *cam_mod,
+				 struct ov_camera_module_ext_ctrls *ctrls)
+{
+	int ret = 0;
+
+	/* Handles only exposure and gain together special case. */
+	if (ctrls->count == 1)
+		ret = ov9750_s_ctrl(cam_mod, ctrls->ctrls[0].id);
+	else if ((ctrls->count >= 3) &&
+		(ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
+		ctrls->ctrls[1].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[1].id == V4L2_CID_EXPOSURE))
+		ret = ov9750_write_aec(cam_mod);
+	else
+		ret = -EINVAL;
+
+	if (IS_ERR_VALUE(ret))
+		ov_camera_module_pr_debug(cam_mod,
+			"failed with error (%d)\n", ret);
+
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_start_streaming(struct ov_camera_module *cam_mod)
+{
+	int ret = 0;
+
+	ov_camera_module_pr_info(cam_mod,
+		"active config=%s\n",
+		cam_mod->active_config->name);
+
+	ov9750_dual_mode(cam_mod);
+
+	ret = OV9750_g_VTS(cam_mod, &cam_mod->vts_min);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0x01);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	msleep(25);
+	return 0;
+err:
+	ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n",
+		ret);
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_stop_streaming(struct ov_camera_module *cam_mod)
+{
+	int ret = 0;
+
+	ov_camera_module_pr_info(cam_mod, "\n");
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0x00);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	msleep(25);
+	return 0;
+err:
+	ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	return ret;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int ov9750_check_camera_id(struct ov_camera_module *cam_mod)
+{
+	u32 pidh, pidl;
+	int ret = 0;
+
+	ov_camera_module_pr_debug(cam_mod, "\n");
+
+	ret |= ov_camera_module_read_reg(cam_mod, 1, OV9750_PIDH_ADDR, &pidh);
+	ret |= ov_camera_module_read_reg(cam_mod, 1, OV9750_PIDL_ADDR, &pidl);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod,
+			"register read failed, camera module powered off?\n");
+		goto err;
+	}
+
+	if (pidh == OV9750_PIDH_MAGIC && pidl == OV9750_PIDL_MAGIC) {
+		ov_camera_module_pr_info(cam_mod,
+			"successfully detected camera ID 0x%02x%02x\n",
+			pidh, pidl);
+	} else {
+		ov_camera_module_pr_err(cam_mod,
+			"wrong camera ID, expected 0x%02x%02x, detected 0x%02x%02x\n",
+			OV9750_PIDH_MAGIC, OV9750_PIDL_MAGIC, pidh, pidl);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	return 0;
+err:
+	ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	return ret;
+}
+
+/* ======================================================================== */
+/* This part is platform dependent */
+/* ======================================================================== */
+
+static struct v4l2_subdev_core_ops ov9750_camera_module_core_ops = {
+	.g_ctrl = ov_camera_module_g_ctrl,
+	.s_ctrl = ov_camera_module_s_ctrl,
+	.s_ext_ctrls = ov_camera_module_s_ext_ctrls,
+	.s_power = ov_camera_module_s_power,
+	.ioctl = ov_camera_module_ioctl
+};
+
+static struct v4l2_subdev_video_ops ov9750_camera_module_video_ops = {
+	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.s_stream = ov_camera_module_s_stream
+};
+
+static struct v4l2_subdev_pad_ops ov9750_camera_module_pad_ops = {
+	.enum_frame_interval = ov_camera_module_enum_frameintervals,
+	.get_fmt = ov_camera_module_g_fmt,
+	.set_fmt = ov_camera_module_s_fmt,
+};
+
+static struct v4l2_subdev_ops ov9750_camera_module_ops = {
+	.core = &ov9750_camera_module_core_ops,
+	.video = &ov9750_camera_module_video_ops,
+	.pad = &ov9750_camera_module_pad_ops
+};
+
+static struct ov_camera_module_custom_config ov9750_custom_config = {
+	.start_streaming = ov9750_start_streaming,
+	.stop_streaming = ov9750_stop_streaming,
+	.s_ctrl = ov9750_s_ctrl,
+	.g_ctrl = ov9750_g_ctrl,
+	.s_ext_ctrls = ov9750_s_ext_ctrls,
+	.g_timings = ov9750_g_timings,
+	.set_flip = ov9750_set_flip,
+	.check_camera_id = ov9750_check_camera_id,
+	.configs = ov9750_configs,
+	.num_configs = ARRAY_SIZE(ov9750_configs),
+	.power_up_delays_ms = {5, 30, 30}
+};
+
+static int ov9750_probe(struct i2c_client *client,
+	const struct i2c_device_id *id)
+{
+	int ret = 0;
+	struct device_node *np = of_node_get(client->dev.of_node);
+
+	dev_info(&client->dev, "probing cam_num:%d 0x%x\n",
+		cam_num, client->addr);
+
+	ov9750_filltimings(&ov9750_custom_config);
+	v4l2_i2c_subdev_init(&ov9750[cam_num].sd, client,
+		&ov9750_camera_module_ops);
+
+	ov9750[cam_num].custom = ov9750_custom_config;
+
+	of_property_read_u32(np, "as-master", &ret);
+	ov9750[cam_num].as_master = (ret == 0) ? false : true;
+	cam_num++;
+
+	dev_info(&client->dev, "probing successful\n");
+	return 0;
+}
+
+/* ======================================================================== */
+
+static int ov9750_remove(struct i2c_client *client)
+{
+	struct ov_camera_module *cam_mod = i2c_get_clientdata(client);
+
+	dev_info(&client->dev, "removing device...\n");
+
+	if (!client->adapter)
+		return -ENODEV;
+
+	ov_camera_module_release(cam_mod);
+
+	dev_info(&client->dev, "removed\n");
+	return 0;
+}
+
+static const struct i2c_device_id ov9750_id[] = {
+	{ OV9750_DRIVER_NAME, 0 },
+	{ }
+};
+
+static const struct of_device_id ov9750_of_match[] = {
+	{.compatible = "omnivision,ov9750-v4l2-i2c-subdev"},
+	{},
+};
+
+MODULE_DEVICE_TABLE(i2c, ov9750_id);
+
+static struct i2c_driver ov9750_i2c_driver = {
+	.driver = {
+		.name = OV9750_DRIVER_NAME,
+		.of_match_table = ov9750_of_match
+	},
+	.probe = ov9750_probe,
+	.remove = ov9750_remove,
+	.id_table = ov9750_id,
+};
+
+module_i2c_driver(ov9750_i2c_driver);
+
+MODULE_DESCRIPTION("SoC Camera driver for ov9750");
+MODULE_AUTHOR("Cain");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
index 25af7f037c985..ffce8134fbb23 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
@@ -200,6 +200,7 @@ struct ov_camera_module {
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
+	bool as_master;
 };
 
 #define ov_camera_module_pr_info(cam_mod, fmt, arg...) \

From d659315a26ad510ad9dce5a19befa298bc529415 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 5 Jul 2018 15:38:16 +0800
Subject: [PATCH 0083/1852] ASoC: rk3308_codec: put switch BIST early during
 enable ADCs

Fix the negative data before enabling loopback.

Change-Id: I8f4ef1e83b38f17c80f9b4109984c6560e570d20
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 61 ++++++++++++++++-----------------
 1 file changed, 29 insertions(+), 32 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 77897f00196ef..b7e68360624b4 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -975,30 +975,6 @@ static int rk3308_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
 #endif
 		} else {
 #if !DEBUG_POP_ALWAYS
-			if (has_loopback(rk3308->loopback_grp) &&
-			    (rk3308->dac_output == DAC_LINEOUT)) {
-				int type = ADC_TYPE_LOOPBACK;
-				int idx, grp;
-
-				/*
-				 * Switch to dummy BIST mode (BIST keep reset
-				 * now) to keep the zero input data in I2S bus.
-				 *
-				 * It may cause the glitch if we hold the ADC
-				 * digtital i2s module in codec.
-				 */
-				for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-					regmap_update_bits(rk3308->regmap,
-							   RK3308_ADC_DIG_CON03(grp),
-							   RK3308_ADC_L_CH_BIST_MSK,
-							   RK3308_ADC_L_CH_BIST_SINE);
-					regmap_update_bits(rk3308->regmap,
-							   RK3308_ADC_DIG_CON03(grp),
-							   RK3308_ADC_R_CH_BIST_MSK,
-							   RK3308_ADC_R_CH_BIST_SINE);
-				}
-			}
-
 			if (rk3308->dac_output == DAC_LINEOUT)
 				rk3308_speaker_ctl(rk3308, 1);
 			else if (rk3308->dac_output == DAC_HPOUT)
@@ -2535,14 +2511,35 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308)
 				   RK3308_ADC_R_CH_NORMAL_LEFT);
 	} else {
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-			regmap_update_bits(rk3308->regmap,
-					   RK3308_ADC_DIG_CON03(grp),
-					   RK3308_ADC_L_CH_BIST_MSK,
-					   RK3308_ADC_L_CH_NORMAL_LEFT);
-			regmap_update_bits(rk3308->regmap,
-					   RK3308_ADC_DIG_CON03(grp),
-					   RK3308_ADC_R_CH_BIST_MSK,
-					   RK3308_ADC_R_CH_NORMAL_RIGHT);
+			if (has_loopback(rk3308->loopback_grp) &&
+			    grp == ADC_GRP_SKIP_MAGIC) {
+				/*
+				 * Switch to dummy BIST mode (BIST keep reset
+				 * now) to keep the zero input data in I2S bus.
+				 *
+				 * It may cause the glitch if we hold the ADC
+				 * digtital i2s module in codec.
+				 *
+				 * Then, the grp which is set from loopback_grp.
+				 */
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(rk3308->loopback_grp),
+						   RK3308_ADC_L_CH_BIST_MSK,
+						   RK3308_ADC_L_CH_BIST_SINE);
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(rk3308->loopback_grp),
+						   RK3308_ADC_R_CH_BIST_MSK,
+						   RK3308_ADC_R_CH_BIST_SINE);
+			} else {
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_L_CH_BIST_MSK,
+						   RK3308_ADC_L_CH_NORMAL_LEFT);
+				regmap_update_bits(rk3308->regmap,
+						   RK3308_ADC_DIG_CON03(grp),
+						   RK3308_ADC_R_CH_BIST_MSK,
+						   RK3308_ADC_R_CH_NORMAL_RIGHT);
+			}
 		}
 	}
 

From 061393017cc1aa634bbd341fcce60b6594a01d36 Mon Sep 17 00:00:00 2001
From: Yifeng Zhao <zyf@rock-chips.com>
Date: Wed, 4 Jul 2018 18:12:22 +0800
Subject: [PATCH 0084/1852] drivers: rk_nand: fix 2cs 3d mlc nand gc fail issue

bug:
1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2
1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2

Change-Id: I04fd61716bf12dfdd8afc0eb2f1a099c631119dc
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
---
 drivers/rk_nand/rk_ftl_arm_v7.S  | 20597 +++++++++++++++--------------
 drivers/rk_nand/rk_ftlv5_arm64.S |  9956 +++++++-------
 drivers/rk_nand/rk_zftl_arm64.S  |  5067 +++----
 3 files changed, 18740 insertions(+), 16880 deletions(-)

diff --git a/drivers/rk_nand/rk_ftl_arm_v7.S b/drivers/rk_nand/rk_ftl_arm_v7.S
index 48e6735fedd7a..221ec458b70e5 100644
--- a/drivers/rk_nand/rk_ftl_arm_v7.S
+++ b/drivers/rk_nand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-05-30
+ * date: 2018-07-03
  */
 	.arch armv7-a
 	.fpu softvfp
@@ -20,8 +20,8 @@
 	.file	"rk_ftl_arm_v7.S"
 	.text
 	.align	2
-	.type	FlashGetReadRetryDefault.part.25, %function
-FlashGetReadRetryDefault.part.25:
+	.type	FlashGetReadRetryDefault.part.27, %function
+FlashGetReadRetryDefault.part.27:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -75,7 +75,7 @@ FlashGetReadRetryDefault.part.25:
 	.word	.LANCHOR1
 	.word	.LANCHOR1+45
 	.fnend
-	.size	FlashGetReadRetryDefault.part.25, .-FlashGetReadRetryDefault.part.25
+	.size	FlashGetReadRetryDefault.part.27, .-FlashGetReadRetryDefault.part.27
 	.align	2
 	.global	FlashMemCmp8
 	.type	FlashMemCmp8, %function
@@ -1468,6 +1468,42 @@ FlashEraseSLc2KBlocks:
 	.fnend
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.align	2
+	.global	micron_auto_read_calibration_config
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	mov	r6, r1
+	mov	r4, r0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L206
+	mov	r2, #239
+	mov	r0, #200
+	add	r4, r3, r4, asl #3
+	ldr	r5, [r4, #864]
+	ldrb	r4, [r4, #868]	@ zero_extendqisi2
+	add	r4, r4, #8
+	add	r3, r5, r4, asl #8
+	str	r2, [r3, #8]
+	mov	r2, #150
+	str	r2, [r3, #4]
+	bl	NandcDelayns
+	str	r6, [r5, r4, asl #8]
+	mov	r3, #0
+	str	r3, [r5, r4, asl #8]
+	str	r3, [r5, r4, asl #8]
+	str	r3, [r5, r4, asl #8]
+	ldmfd	sp!, {r4, r5, r6, pc}
+.L207:
+	.align	2
+.L206:
+	.word	.LANCHOR0
+	.fnend
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
+	.align	2
 	.global	SandiskSetRRPara
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
@@ -1484,17 +1520,17 @@ SandiskSetRRPara:
 	mov	r0, #200
 	mov	r5, r1
 	bl	NandcDelayns
-	ldr	r1, .L211
+	ldr	r1, .L214
 	add	r3, r5, r5, asl #2
 	mvn	r6, #4
 	add	r0, r1, r3
 	add	r1, r1, #45
 	add	r1, r1, r3
 	mov	r2, #0
-	ldr	ip, .L211+4
+	ldr	ip, .L214+4
 	mul	r5, r6, r5
-	b	.L206
-.L209:
+	b	.L209
+.L212:
 	ldrb	r6, [ip, #3761]	@ zero_extendqisi2
 	add	r2, r2, #1
 	cmp	r6, #67
@@ -1505,16 +1541,16 @@ SandiskSetRRPara:
 	add	r1, r1, #1
 	ldrsb	r6, [r6, #5]
 	str	r6, [r4, #0]
-.L206:
+.L209:
 	ldrb	r6, [ip, #3760]	@ zero_extendqisi2
 	cmp	r2, r6
-	bcc	.L209
+	bcc	.L212
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, lr}
 	b	NandcWaitFlashReady
-.L212:
+.L215:
 	.align	2
-.L211:
+.L214:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.fnend
@@ -1526,7 +1562,7 @@ SandiskProgTestBadBlock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L214
+	ldr	r3, .L217
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	add	r3, r3, r0, asl #3
@@ -1557,9 +1593,9 @@ SandiskProgTestBadBlock:
 	ldr	r0, [r5, r6, asl #8]
 	and	r0, r0, #1
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L215:
+.L218:
 	.align	2
-.L214:
+.L217:
 	.word	.LANCHOR0
 	.fnend
 	.size	SandiskProgTestBadBlock, .-SandiskProgTestBadBlock
@@ -1570,13 +1606,13 @@ FlashReadSpare:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L217
+	ldr	r3, .L220
 	mov	ip, #0
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r6, r2
 	ldrb	r2, [r3, #2901]	@ zero_extendqisi2
-	ldr	r3, .L217+4
+	ldr	r3, .L220+4
 	add	r3, r3, r0, asl #3
 	mov	r2, r2, asl #9
 	ldrb	r5, [r3, #868]	@ zero_extendqisi2
@@ -1599,9 +1635,9 @@ FlashReadSpare:
 	ldr	r3, [r4, r5, asl #8]
 	strb	r3, [r6, #0]
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L218:
+.L221:
 	.align	2
-.L217:
+.L220:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.fnend
@@ -1647,7 +1683,7 @@ FlashReset:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L221
+	ldr	r3, .L224
 	add	r3, r3, r0, asl #3
 	ldrb	r5, [r3, #868]	@ zero_extendqisi2
 	ldr	r2, [r3, #864]
@@ -1661,9 +1697,9 @@ FlashReset:
 	mov	r0, r4
 	ldmfd	sp!, {r3, r4, r5, lr}
 	b	NandcFlashDeCs
-.L222:
+.L225:
 	.align	2
-.L221:
+.L224:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashReset, .-FlashReset
@@ -1678,7 +1714,7 @@ FlashReadIDRaw:
 	mov	r5, r1
 	mov	r4, r0
 	bl	FlashReset
-	ldr	r3, .L225
+	ldr	r3, .L228
 	mov	r0, r4
 	add	r3, r3, r4, asl #3
 	ldrb	r7, [r3, #868]	@ zero_extendqisi2
@@ -1710,10 +1746,10 @@ FlashReadIDRaw:
 	sub	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L223
+	bhi	.L226
 	ldrb	r1, [r5, #2]	@ zero_extendqisi2
 	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	ldr	r0, .L225+4
+	ldr	r0, .L228+4
 	str	r1, [sp, #0]
 	ldrb	r1, [r5, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
@@ -1723,11 +1759,11 @@ FlashReadIDRaw:
 	str	r1, [sp, #12]
 	add	r1, r4, #1
 	bl	printk
-.L223:
-	ldmfd	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, pc}
 .L226:
+	ldmfd	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, pc}
+.L229:
 	.align	2
-.L225:
+.L228:
 	.word	.LANCHOR0
 	.word	.LC2
 	.fnend
@@ -1742,14 +1778,14 @@ FlashSetInterfaceMode:
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r4, #0
-	ldr	sl, .L241
+	ldr	sl, .L244
 	mov	r7, #239
-	ldr	r9, .L241+4
+	ldr	r9, .L244+4
 	mov	r1, r4
 	sub	r8, sl, #864
 	mov	r6, #128
 	mov	r5, #1
-.L237:
+.L240:
 	mov	r2, sl
 	ldrb	lr, [r4, r9]	@ zero_extendqisi2
 	ldr	r3, [r2, r4]!
@@ -1758,60 +1794,60 @@ FlashSetInterfaceMode:
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	add	r2, r2, #8
 	add	ip, r3, r2, asl #8
-	beq	.L228
+	beq	.L231
 	cmp	lr, #173
 	cmpne	lr, #44
-	bne	.L229
-.L228:
+	bne	.L232
+.L231:
 	cmp	r0, #1
 	ldrb	fp, [r8, #3772]	@ zero_extendqisi2
-	bne	.L230
+	bne	.L233
 	tst	fp, #1
-	beq	.L229
+	beq	.L232
 	cmp	lr, #173
 	str	r7, [ip, #8]
 	streq	r0, [ip, #4]
-	beq	.L240
+	beq	.L243
 	cmp	lr, #44
 	streq	r0, [ip, #4]
 	strne	r6, [ip, #4]
 	moveq	ip, #5
 	strne	r0, [r3, r2, asl #8]
-	bne	.L235
-	b	.L239
-.L230:
+	bne	.L238
+	b	.L242
+.L233:
 	tst	fp, #4
-	beq	.L229
+	beq	.L232
 	cmp	lr, #173
 	str	r7, [ip, #8]
 	streq	r5, [ip, #4]
 	moveq	ip, #32
-	beq	.L239
+	beq	.L242
 	cmp	lr, #44
 	strne	r6, [ip, #4]
-	bne	.L240
+	bne	.L243
 	str	r5, [ip, #4]
 	mov	ip, #35
-.L239:
+.L242:
 	str	ip, [r3, r2, asl #8]
-	b	.L235
-.L240:
+	b	.L238
+.L243:
 	str	r1, [r3, r2, asl #8]
-.L235:
+.L238:
 	str	r1, [r3, r2, asl #8]
 	str	r1, [r3, r2, asl #8]
 	str	r1, [r3, r2, asl #8]
-.L229:
+.L232:
 	add	r4, r4, #8
 	cmp	r4, #32
-	bne	.L237
+	bne	.L240
 	mov	r0, #0
 	bl	NandcWaitFlashReady
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L242:
+.L245:
 	.align	2
-.L241:
+.L244:
 	.word	.LANCHOR0+864
 	.word	.LANCHOR0+2980
 	.fnend
@@ -1826,37 +1862,37 @@ ftl_flash_de_init:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r0, #0
-	ldr	r4, .L246
+	ldr	r4, .L249
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L246+4
+	ldr	r3, .L249+4
 	ldr	r2, [r4, #3776]
 	cmp	r2, r3
-	bne	.L244
+	bne	.L247
 	mov	r0, #0
 	bl	flash_enter_slc_mode
-.L244:
+.L247:
 	ldrb	r3, [r4, #3780]	@ zero_extendqisi2
-	ldr	r5, .L246
+	ldr	r5, .L249
 	cmp	r3, #0
-	beq	.L245
+	beq	.L248
 	ldrb	r3, [r5, #3772]	@ zero_extendqisi2
 	tst	r3, #1
-	beq	.L245
+	beq	.L248
 	mov	r0, #1
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
 	bl	NandcSetMode
 	mov	r3, #0
 	strb	r3, [r5, #3780]
-.L245:
+.L248:
 	ldr	r3, [r4, #864]
 	mov	r0, #0
 	str	r0, [r3, #336]
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L247:
+.L250:
 	.align	2
-.L246:
+.L249:
 	.word	.LANCHOR0
 	.word	1446522928
 	.fnend
@@ -1868,7 +1904,7 @@ FlashReadDpCmd:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L252
+	ldr	r3, .L255
 	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r7, r2
@@ -1883,7 +1919,7 @@ FlashReadDpCmd:
 	ldrb	r2, [r3, #904]	@ zero_extendqisi2
 	add	r6, r1, r6, asl #8
 	str	r2, [r6, #8]
-	bne	.L249
+	bne	.L252
 	mov	r8, #0
 	uxtb	r2, r5
 	str	r8, [r6, #4]
@@ -1899,8 +1935,8 @@ FlashReadDpCmd:
 	str	r8, [r6, #8]
 	str	r8, [r6, #4]
 	str	r8, [r6, #4]
-	b	.L251
-.L249:
+	b	.L254
+.L252:
 	uxtb	r2, r5
 	str	r2, [r6, #4]
 	mov	r2, r5, lsr #8
@@ -1909,7 +1945,7 @@ FlashReadDpCmd:
 	str	r2, [r6, #4]
 	ldrb	r3, [r3, #905]	@ zero_extendqisi2
 	str	r3, [r6, #8]
-.L251:
+.L254:
 	uxtb	r3, r7
 	mov	r0, r4
 	str	r3, [r6, #4]
@@ -1922,9 +1958,9 @@ FlashReadDpCmd:
 	str	r3, [r6, #8]
 	ldmfd	sp!, {r4, r5, r6, r7, r8, lr}
 	b	FlashSetRandomizer
-.L253:
+.L256:
 	.align	2
-.L252:
+.L255:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
@@ -1936,14 +1972,14 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L255
+	ldr	r3, .L258
 	add	r3, r3, r0, asl #3
 	ldr	r3, [r3, #864]
 	str	r1, [r3, #336]
 	bx	lr
-.L256:
+.L259:
 	.align	2
-.L255:
+.L258:
 	.word	.LANCHOR0
 	.fnend
 	.size	NandcRandmzSel, .-NandcRandmzSel
@@ -1960,36 +1996,36 @@ NandcTimeCfg:
 	mov	r4, r0
 	mov	r0, #0
 	bl	rknand_get_clk_rate
-	ldr	r1, .L267
+	ldr	r1, .L270
 	bl	__aeabi_idiv
-	ldr	r3, .L267+4
+	ldr	r3, .L270+4
 	ldr	r3, [r3, #3012]
 	cmp	r0, #250
 	movwgt	r2, #8354
-	bgt	.L265
+	bgt	.L268
 	cmp	r0, #220
-	bgt	.L266
-.L260:
+	bgt	.L269
+.L263:
 	cmp	r0, #185
 	movwgt	r2, #4226
-	bgt	.L265
+	bgt	.L268
 	cmp	r0, #160
 	movwgt	r2, #4194
-	bgt	.L265
+	bgt	.L268
 	cmp	r4, #35
 	movwls	r2, #4193
-	bls	.L265
+	bls	.L268
 	cmp	r4, #99
 	movwls	r2, #4225
-	bls	.L265
-.L266:
+	bls	.L268
+.L269:
 	movw	r2, #8322
-.L265:
+.L268:
 	str	r2, [r3, #4]
 	ldmfd	sp!, {r4, pc}
-.L268:
+.L271:
 	.align	2
-.L267:
+.L270:
 	.word	1000000
 	.word	.LANCHOR0
 	.fnend
@@ -2004,7 +2040,7 @@ NandcInit:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r2, #0
-	ldr	r4, .L271
+	ldr	r4, .L274
 	mov	r3, #1
 	mov	r5, #0
 	str	r0, [r4, #3012]
@@ -2042,7 +2078,7 @@ NandcInit:
 	movw	r2, #8322
 	mov	r0, #36864
 	str	r2, [r3, #344]
-	ldr	r2, .L271+4
+	ldr	r2, .L274+4
 	str	r2, [r3, #304]
 	bl	ftl_malloc
 	str	r5, [r4, #3820]
@@ -2052,9 +2088,9 @@ NandcInit:
 	add	r0, r0, #32768
 	str	r0, [r4, #3800]
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L272:
+.L275:
 	.align	2
-.L271:
+.L274:
 	.word	.LANCHOR0
 	.word	1710593
 	.fnend
@@ -2072,23 +2108,23 @@ FlashTimingCfg:
 	sub	r3, r3, #33
 	cmp	r0, r2
 	cmpne	r3, #1
-	bls	.L274
+	bls	.L277
 	movw	r3, #4226
 	movw	r2, #8322
 	cmp	r0, r3
 	cmpne	r0, r2
-	bne	.L275
-.L274:
-	ldr	r3, .L276
+	bne	.L278
+.L277:
+	ldr	r3, .L279
 	ldr	r3, [r3, #3012]
 	str	r0, [r3, #4]
-.L275:
-	ldr	r3, .L276+4
+.L278:
+	ldr	r3, .L279+4
 	ldrb	r0, [r3, #2913]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L277:
+.L280:
 	.align	2
-.L276:
+.L279:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.fnend
@@ -2100,7 +2136,7 @@ NandcGetTimeCfg:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L279
+	ldr	ip, .L282
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	ldr	r4, [ip, #3012]
@@ -2119,9 +2155,9 @@ NandcGetTimeCfg:
 	orr	r2, r2, r1, asl #16
 	str	r2, [r3, #0]
 	ldmfd	sp!, {r4, pc}
-.L280:
+.L283:
 	.align	2
-.L279:
+.L282:
 	.word	.LANCHOR0
 	.fnend
 	.size	NandcGetTimeCfg, .-NandcGetTimeCfg
@@ -2133,7 +2169,7 @@ NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L286
+	ldr	r3, .L289
 	mov	r1, #1
 	ldr	r2, [r3, #3012]
 	str	r0, [r3, #3832]
@@ -2143,24 +2179,24 @@ NandcBchSel:
 	cmp	r0, r1
 	bfi	r3, r1, #8, #8
 	bfc	r3, #18, #1
-	beq	.L285
-.L282:
+	beq	.L288
+.L285:
 	cmp	r0, #24
 	orreq	r3, r3, #16
-	beq	.L283
+	beq	.L286
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L283
-.L285:
+	bne	.L286
+.L288:
 	bfc	r3, #4, #1
-.L283:
+.L286:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	bx	lr
-.L287:
+.L290:
 	.align	2
-.L286:
+.L289:
 	.word	.LANCHOR0
 	.fnend
 	.size	NandcBchSel, .-NandcBchSel
@@ -2172,12 +2208,12 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L289
+	ldr	r3, .L292
 	strb	r0, [r3, #3836]
 	b	NandcBchSel
-.L290:
+.L293:
 	.align	2
-.L289:
+.L292:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashBchSel, .-FlashBchSel
@@ -2188,14 +2224,14 @@ ftl_flash_resume:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L296
+	ldr	r3, .L299
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r4, #0
 	ldr	r2, [r3, #3012]
 	ldr	r1, [r3, #3016]
 	ldr	r5, [r3, #3032]
-	ldr	r6, .L296+4
+	ldr	r6, .L299+4
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #3020]
 	ldr	r2, [r3, #3012]
@@ -2211,22 +2247,22 @@ ftl_flash_resume:
 	ldr	r3, [r3, #3044]
 	str	r1, [r2, #336]
 	str	r3, [r2, #344]
-.L293:
+.L296:
 	ldrb	r3, [r6, r4, asl #3]	@ zero_extendqisi2
 	sub	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L292
+	bhi	.L295
 	uxtb	r0, r4
 	bl	FlashReset
-.L292:
+.L295:
 	add	r4, r4, #1
 	cmp	r4, #4
-	bne	.L293
-	ldr	r4, .L296
+	bne	.L296
+	ldr	r4, .L299
 	ldrb	r3, [r4, #3780]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L294
+	beq	.L297
 	mov	r0, #1
 	bl	NandcSetMode
 	ldrb	r0, [r4, #3772]	@ zero_extendqisi2
@@ -2235,15 +2271,15 @@ ftl_flash_resume:
 	bl	NandcSetMode
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
-.L294:
-	ldr	r3, .L296
+.L297:
+	ldr	r3, .L299
 	ldr	r3, [r3, #3624]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	ldmfd	sp!, {r4, r5, r6, lr}
 	b	FlashBchSel
-.L297:
+.L300:
 	.align	2
-.L296:
+.L299:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2980
 	.fnend
@@ -2299,11 +2335,11 @@ NandcIqrWaitFlashReady:
 	and	r3, r3, #2
 	uxtb	r3, r3
 	cmp	r3, #0
-	bne	.L301
+	bne	.L304
 	mov	r0, r4
 	ldmfd	sp!, {r4, lr}
 	b	wait_for_nand_flash_ready
-.L301:
+.L304:
 	ldr	r3, [r4, #368]
 	orr	r3, r3, #2
 	str	r3, [r4, #368]
@@ -2324,18 +2360,18 @@ FlashEraseBlocks:
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.pad #28
 	sub	sp, sp, #28
-	ldr	r5, .L322
+	ldr	r5, .L325
 	mov	r6, r0
 	str	r1, [sp, #12]
 	mov	r7, r2
 	ldrb	r4, [r5, #852]	@ zero_extendqisi2
 	cmp	r4, #0
 	moveq	r9, r5
-	beq	.L303
+	beq	.L306
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-	b	.L304
-.L312:
+	b	.L307
+.L315:
 	mov	r8, #36
 	rsb	r3, r4, r7
 	mul	r8, r8, r4
@@ -2353,17 +2389,17 @@ FlashEraseBlocks:
 	cmp	r0, r3
 	mvncs	r3, #0
 	strcs	r3, [r6, r8]
-	bcs	.L306
+	bcs	.L309
 	ldrb	r3, [r5, #3837]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r9, r0, asl #4
 	ldr	r3, [r3, #3636]
 	moveq	sl, #0
 	cmp	r3, #0
-	beq	.L308
+	beq	.L311
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L308:
+.L311:
 	ldr	r2, [sp, #20]
 	mov	r1, #0
 	cmp	sl, #0
@@ -2385,15 +2421,15 @@ FlashEraseBlocks:
 	ldr	r3, [sp, #12]
 	mov	r0, r8
 	cmp	r3, #1
-	bne	.L310
+	bne	.L313
 	ldrb	r3, [r5, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L310
+	beq	.L313
 	bl	flash_enter_slc_mode
-	b	.L311
-.L310:
+	b	.L314
+.L313:
 	bl	flash_exit_slc_mode
-.L311:
+.L314:
 	ldr	r3, [sp, #20]
 	mov	r0, r8
 	ldr	r1, [sp, #16]
@@ -2409,59 +2445,59 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r8
 	bl	NandcFlashDeCs
-.L306:
+.L309:
 	add	r4, r4, #1
-.L303:
+.L306:
 	cmp	r4, r7
-	bcc	.L312
-	ldr	r5, .L322
+	bcc	.L315
+	ldr	r5, .L325
 	mov	r4, #0
-	ldr	r8, .L322+4
+	ldr	r8, .L325+4
 	ldr	r0, [r5, #3012]
 	bl	NandcIqrWaitFlashReady
-	b	.L313
-.L315:
+	b	.L316
+.L318:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L314
+	bne	.L317
 	ldrb	r3, [r5, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L314
+	beq	.L317
 	ldrb	r0, [r8, r4, asl #4]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L314:
+.L317:
 	add	r4, r4, #1
-.L313:
+.L316:
 	ldrb	r2, [r5, #3762]	@ zero_extendqisi2
-	ldr	r3, .L322
+	ldr	r3, .L325
 	cmp	r4, r2
-	bcc	.L315
+	bcc	.L318
 	ldr	r0, [r3, #3840]
 	cmp	r0, #0
-	beq	.L304
+	beq	.L307
 	ldrb	r3, [r3, #2980]	@ zero_extendqisi2
 	cmp	r3, #69
 	moveq	r3, #0
 	moveq	r2, r3
-	bne	.L321
-	b	.L316
-.L317:
+	bne	.L324
+	b	.L319
+.L320:
 	add	r3, r3, #1
 	str	r2, [r6, #-36]
-.L316:
+.L319:
 	cmp	r3, r7
 	add	r6, r6, #36
-	bne	.L317
-.L321:
+	bne	.L320
+.L324:
 	mov	r0, #0
-.L304:
+.L307:
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L323:
+.L326:
 	.align	2
-.L322:
+.L325:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3628
 	.fnend
@@ -2494,7 +2530,7 @@ NandcSendDumpDataStart:
 	ldr	r2, [r0, #16]
 	.pad #8
 	sub	sp, sp, #8
-	ldr	r3, .L326
+	ldr	r3, .L329
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2506,9 +2542,9 @@ NandcSendDumpDataStart:
 	str	r3, [r0, #8]
 	add	sp, sp, #8
 	bx	lr
-.L327:
+.L330:
 	.align	2
-.L326:
+.L329:
 	.word	538969130
 	.fnend
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
@@ -2522,12 +2558,12 @@ NandcSendDumpDataDone:
 	@ link register save eliminated.
 	.pad #8
 	sub	sp, sp, #8
-.L329:
+.L332:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	tst	r3, #1048576
-	beq	.L329
+	beq	.L332
 	add	sp, sp, #8
 	bx	lr
 	.fnend
@@ -2542,7 +2578,7 @@ NandcXferStart:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r6, r1
-	ldr	r1, .L344
+	ldr	r1, .L347
 	mov	r8, r2
 	mov	r4, #0
 	.pad #20
@@ -2567,7 +2603,7 @@ NandcXferStart:
 	bfi	r4, r3, #4, #1
 	ldr	r3, [r1, #3788]
 	cmp	r3, #3
-	bls	.L332
+	bls	.L335
 	ldr	r3, [r5, #16]
 	cmp	r9, #0
 	cmpeq	ip, #0
@@ -2575,9 +2611,9 @@ NandcXferStart:
 	ldr	r3, [sp, #12]
 	bfc	r3, #2, #1
 	str	r3, [sp, #12]
-	beq	.L333
+	beq	.L336
 	cmp	r6, #0
-	beq	.L334
+	beq	.L337
 	ldr	r3, [r1, #3832]
 	mov	r0, ip
 	cmp	r3, #24
@@ -2588,8 +2624,8 @@ NandcXferStart:
 	str	r3, [sp, #4]
 	mov	r3, #0
 	mov	r2, r3
-	b	.L336
-.L339:
+	b	.L339
+.L342:
 	cmp	ip, #0
 	mov	lr, r3, lsr #2
 	add	r2, r2, #1
@@ -2603,11 +2639,11 @@ NandcXferStart:
 	strne	sl, [fp, lr, asl #2]
 	ldr	lr, [sp, #0]
 	add	r3, r3, lr
-.L336:
+.L339:
 	ldr	sl, [sp, #4]
 	cmp	r2, sl
-	bcc	.L339
-.L334:
+	bcc	.L342
+.L337:
 	mov	r0, r5
 	add	r8, r8, #1
 	bl	rk_nandc_xfer_irq_flag_init
@@ -2615,7 +2651,7 @@ NandcXferStart:
 	mov	r8, r8, asr #1
 	cmp	r9, #0
 	bfi	r4, r8, #22, #6
-	ldr	r8, .L344
+	ldr	r8, .L347
 	orr	r3, r3, #1
 	str	r3, [r5, #368]
 	ldr	r3, [r5, #364]
@@ -2667,19 +2703,19 @@ NandcXferStart:
 	ldr	r3, [sp, #12]
 	orr	r3, r3, #1
 	str	r3, [sp, #12]
-.L333:
+.L336:
 	ldr	r3, [sp, #12]
 	str	r3, [r5, #16]
-.L332:
+.L335:
 	str	r7, [r5, #12]
 	str	r4, [r5, #8]
 	orr	r4, r4, #4
 	str	r4, [r5, #8]
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L345:
+.L348:
 	.align	2
-.L344:
+.L347:
 	.word	.LANCHOR0
 	.fnend
 	.size	NandcXferStart, .-NandcXferStart
@@ -2698,14 +2734,14 @@ NandcCopy1KB:
 	mov	r4, r0
 	ldr	r6, [sp, #16]
 	add	r2, r2, r5, asl #9
-	bne	.L347
+	bne	.L350
 	cmp	r3, #0
-	beq	.L348
+	beq	.L351
 	mov	r0, r2
 	mov	r1, r3
 	mov	r2, #1024
 	bl	memcpy
-.L348:
+.L351:
 	cmp	r6, #0
 	ldmeqfd	sp!, {r4, r5, r6, pc}
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
@@ -2723,14 +2759,14 @@ NandcCopy1KB:
 	add	r5, r5, #128
 	str	r3, [r4, r5, asl #2]
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L347:
+.L350:
 	cmp	r3, #0
-	beq	.L350
+	beq	.L353
 	mov	r1, r2
 	mov	r0, r3
 	mov	r2, #1024
 	bl	memcpy
-.L350:
+.L353:
 	cmp	r6, #0
 	ldmeqfd	sp!, {r4, r5, r6, pc}
 	mov	r5, r5, lsr #1
@@ -2759,14 +2795,14 @@ Ftl_log2:
 	@ link register save eliminated.
 	mov	r2, #1
 	mov	r3, #0
-	b	.L352
-.L353:
+	b	.L355
+.L356:
 	add	r3, r3, #1
 	mov	r2, r2, asl #1
 	uxth	r3, r3
-.L352:
+.L355:
 	cmp	r2, r0
-	bls	.L353
+	bls	.L356
 	sub	r3, r3, #1
 	uxth	r0, r3
 	bx	lr
@@ -2791,7 +2827,7 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L358
+	ldr	r3, .L361
 	movw	r2, #3848
 	cmp	r0, #23
 	movw	r1, #3858
@@ -2809,9 +2845,9 @@ FtlSysBlkNumInit:
 	rsb	r2, r2, r1
 	str	r2, [r3, #3860]
 	bx	lr
-.L359:
+.L362:
 	.align	2
-.L358:
+.L361:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -2825,7 +2861,7 @@ FtlConstantsInit:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	movw	r2, #3868
-	ldr	r3, .L377
+	ldr	r3, .L380
 	mov	r4, r0
 	ldrh	lr, [r0, #8]
 	.pad #20
@@ -2841,17 +2877,17 @@ FtlConstantsInit:
 	movw	r2, #3858
 	strh	r6, [r3, r2]	@ movhi
 	mov	r3, #0
-	ldr	r2, .L377+4
-.L361:
+	ldr	r2, .L380+4
+.L364:
 	strb	r3, [r3, r2]
 	add	r3, r3, #1
 	cmp	r3, #32
-	bne	.L361
+	bne	.L364
 	ldrh	r2, [r4, #14]
 	ldrh	r3, [r4, #20]
 	cmp	r3, r2, lsr #8
-	bcs	.L362
-	ldr	r2, .L377+4
+	bcs	.L365
+	ldr	r2, .L380+4
 	sub	ip, r1, #1
 	uxtb	r7, r0
 	mov	r3, #0
@@ -2861,22 +2897,22 @@ FtlConstantsInit:
 	mov	r8, r7, asl #1
 	uxtb	r8, r8
 	str	ip, [sp, #12]
-	b	.L363
-.L364:
+	b	.L366
+.L367:
 	strb	ip, [r9, r2]
 	add	fp, ip, r7
 	add	ip, ip, r8
 	add	r5, r5, #1
 	strb	fp, [sl, r2]
 	uxtb	ip, ip
-.L366:
+.L369:
 	cmp	r5, r1
 	add	r2, r2, r0
-	bcc	.L364
+	bcc	.L367
 	add	r3, r3, #1
-.L363:
+.L366:
 	cmp	r3, r0
-	bcs	.L365
+	bcs	.L368
 	ldr	fp, [sp, #8]
 	mov	r2, #0
 	uxtb	ip, r3
@@ -2884,22 +2920,22 @@ FtlConstantsInit:
 	add	r9, fp, r3
 	ldr	fp, [sp, #12]
 	add	sl, fp, r3
-	b	.L366
-.L365:
-	ldr	r3, .L377
+	b	.L369
+.L368:
+	ldr	r3, .L380
 	movw	r2, #3870
 	mov	r1, r1, asl #1
 	mov	r6, r6, lsr #1
 	strh	r1, [r3, r2]	@ movhi
 	movw	r2, #3858
 	strh	r6, [r3, r2]	@ movhi
-.L362:
-	ldr	r3, .L377
+.L365:
+	ldr	r3, .L380
 	movw	r2, #3906
 	cmp	lr, #1
 	mov	r1, #5
 	mov	ip, #0
-	ldr	sl, .L377
+	ldr	sl, .L380
 	ldrb	r8, [r3, #852]	@ zero_extendqisi2
 	strh	r1, [r3, r2]	@ movhi
 	movw	r1, #3908
@@ -2909,7 +2945,7 @@ FtlConstantsInit:
 	strh	ip, [r3, r1]	@ movhi
 	mov	r1, #4352
 	strh	r1, [r3, r2]	@ movhi
-	ldrne	r3, .L377
+	ldrne	r3, .L380
 	movne	r1, #384
 	strneh	r1, [r3, r2]	@ movhi
 	movw	r3, #3870
@@ -2980,8 +3016,8 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [r4, r3]	@ movhi
 	cmp	r0, #4
-	ldr	r4, .L377
-	ldrls	r2, .L377
+	ldr	r4, .L380
+	ldrls	r2, .L380
 	movls	r1, #4
 	strlsh	r1, [r2, r3]	@ movhi
 	cmp	r8, #0
@@ -3005,10 +3041,10 @@ FtlConstantsInit:
 	ldrh	r0, [r4, r3]
 	bl	__aeabi_uidiv
 	cmp	r5, #1
-	ldreq	r3, .L377
+	ldreq	r3, .L380
 	uxtah	r6, r6, r0
 	str	r6, [r4, #3844]
-	ldr	r4, .L377
+	ldr	r4, .L380
 	addeq	r6, r6, #4
 	streq	r6, [r3, #3844]
 	ldr	r0, [r4, #3844]
@@ -3051,12 +3087,12 @@ FtlConstantsInit:
 	addne	r1, r1, #5
 	strneh	r0, [r4, r3]	@ movhi
 	strne	r1, [r4, #3944]
-	bne	.L374
-.L373:
+	bne	.L377
+.L376:
 	cmp	r2, #7
 	movls	r3, #8
 	strls	r3, [r4, #3944]
-.L374:
+.L377:
 	movw	r3, #3960
 	mov	r2, #0
 	strh	r2, [r4, r3]	@ movhi
@@ -3068,14 +3104,14 @@ FtlConstantsInit:
 	add	r2, r2, #52
 	add	r6, r2, r6, asl #2
 	cmp	r6, r5, asl #9
-	ldrcc	r2, .L377
+	ldrcc	r2, .L380
 	movcc	r1, #1
 	strcch	r1, [r2, r3]	@ movhi
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L378:
+.L381:
 	.align	2
-.L377:
+.L380:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3874
 	.fnend
@@ -3088,36 +3124,36 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L386
+	ldr	r3, .L389
 	movw	r2, #3962
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	beq	.L384
+	beq	.L387
 	mov	r2, #3936
 	ldrh	r1, [r3, r2]
 	ldr	r2, [r3, #3964]
 	mov	r3, #0
-	b	.L381
-.L383:
+	b	.L384
+.L386:
 	ldrh	ip, [r2], #2
 	cmp	ip, r0
-	beq	.L385
+	beq	.L388
 	add	r3, r3, #1
 	uxth	r3, r3
-.L381:
+.L384:
 	cmp	r3, r1
-	bne	.L383
+	bne	.L386
 	mov	r0, #0
 	bx	lr
-.L385:
+.L388:
 	mov	r0, #1
 	bx	lr
-.L384:
+.L387:
 	mov	r0, r2
 	bx	lr
-.L387:
+.L390:
 	.align	2
-.L386:
+.L389:
 	.word	.LANCHOR0
 	.fnend
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -3128,36 +3164,36 @@ FtlCacheMetchLpa:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L396
+	ldr	r2, .L399
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	ldr	r3, [r2, #3968]
 	cmp	r3, #0
-	beq	.L393
+	beq	.L396
 	ldr	ip, [r2, #3972]
 	mov	r2, #0
-.L392:
+.L395:
 	ldr	r4, [ip, #16]
 	cmp	r4, r0
-	bcc	.L390
+	bcc	.L393
 	cmp	r4, r1
-	bls	.L394
-.L390:
+	bls	.L397
+.L393:
 	add	r2, r2, #1
 	add	ip, ip, #36
 	cmp	r2, r3
-	bne	.L392
+	bne	.L395
 	mov	r0, #0
 	ldmfd	sp!, {r4, pc}
-.L394:
+.L397:
 	mov	r0, #1
 	ldmfd	sp!, {r4, pc}
-.L393:
+.L396:
 	mov	r0, r3
 	ldmfd	sp!, {r4, pc}
-.L397:
+.L400:
 	.align	2
-.L396:
+.L399:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlCacheMetchLpa, .-FtlCacheMetchLpa
@@ -3169,12 +3205,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L399
+	ldr	r3, .L402
 	ldr	r0, [r3, #3956]
 	bx	lr
-.L400:
+.L403:
 	.align	2
-.L399:
+.L402:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGetCap, .-FtlGetCap
@@ -3186,12 +3222,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L402
+	ldr	r3, .L405
 	ldr	r0, [r3, #3956]
 	bx	lr
-.L403:
+.L406:
 	.align	2
-.L402:
+.L405:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_get_density, .-ftl_get_density
@@ -3203,12 +3239,12 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L405
+	ldr	r3, .L408
 	ldr	r0, [r3, #3976]
 	bx	lr
-.L406:
+.L409:
 	.align	2
-.L405:
+.L408:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGetLpn, .-FtlGetLpn
@@ -3222,7 +3258,7 @@ FtlBbmMapBadBlock:
 	stmfd	sp!, {r0, r1, r4, r5, r6, lr}
 	.save {r0, r1, r4, r5, r6, lr}
 	movw	r3, #3912
-	ldr	r4, .L408
+	ldr	r4, .L411
 	mov	r5, r0
 	ldrh	r6, [r4, r3]
 	mov	r1, r6
@@ -3240,7 +3276,7 @@ FtlBbmMapBadBlock:
 	str	r1, [r0, ip, asl #2]
 	str	r1, [sp, #0]
 	mov	r1, r5
-	ldr	r0, .L408+4
+	ldr	r0, .L411+4
 	bl	printk
 	movw	r3, #3986
 	ldrh	r2, [r4, r3]
@@ -3248,9 +3284,9 @@ FtlBbmMapBadBlock:
 	add	r2, r2, r6
 	strh	r2, [r4, r3]	@ movhi
 	ldmfd	sp!, {r2, r3, r4, r5, r6, pc}
-.L409:
+.L412:
 	.align	2
-.L408:
+.L411:
 	.word	.LANCHOR0
 	.word	.LC3
 	.fnend
@@ -3266,7 +3302,7 @@ FtlBbmIsBadBlock:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movw	r3, #3912
-	ldr	r5, .L411
+	ldr	r5, .L414
 	mov	r7, r0
 	ldrh	r6, [r5, r3]
 	mov	r1, r6
@@ -3284,9 +3320,9 @@ FtlBbmIsBadBlock:
 	mov	r0, r0, lsr r4
 	and	r0, r0, #1
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L412:
+.L415:
 	.align	2
-.L411:
+.L414:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -3312,11 +3348,11 @@ FtlBbtCalcTotleCnt:
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r4, #0
 	mov	r5, r4
-	ldr	r6, .L418
+	ldr	r6, .L421
 	movw	r8, #3912
 	movw	r7, #3870
-	b	.L415
-.L417:
+	b	.L418
+.L420:
 	mov	r0, r5
 	add	r5, r5, #1
 	bl	FtlBbmIsBadBlock
@@ -3324,17 +3360,17 @@ FtlBbtCalcTotleCnt:
 	cmp	r0, #0
 	addne	r4, r4, #1
 	uxthne	r4, r4
-.L415:
+.L418:
 	ldrh	r3, [r6, r8]
 	ldrh	r2, [r6, r7]
 	mul	r3, r2, r3
 	cmp	r5, r3
-	blt	.L417
+	blt	.L420
 	mov	r0, r4
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L419:
+.L422:
 	.align	2
-.L418:
+.L421:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
@@ -3348,7 +3384,7 @@ V2P_block:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r3, #3872
-	ldr	r5, .L421
+	ldr	r5, .L424
 	mov	r7, r1
 	mov	r6, r0
 	ldrh	r4, [r5, r3]
@@ -3364,9 +3400,9 @@ V2P_block:
 	add	r1, r5, r1
 	uxth	r0, r1
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L422:
+.L425:
 	.align	2
-.L421:
+.L424:
 	.word	.LANCHOR0
 	.fnend
 	.size	V2P_block, .-V2P_block
@@ -3377,7 +3413,7 @@ P2V_plane:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L424
+	ldr	r3, .L427
 	mov	r2, #3872
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
@@ -3393,9 +3429,9 @@ P2V_plane:
 	add	r1, r5, r1
 	uxth	r0, r1
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L425:
+.L428:
 	.align	2
-.L424:
+.L427:
 	.word	.LANCHOR0
 	.fnend
 	.size	P2V_plane, .-P2V_plane
@@ -3409,7 +3445,7 @@ P2V_block_in_plane:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	movw	r3, #3912
-	ldr	r4, .L427
+	ldr	r4, .L430
 	ldrh	r1, [r4, r3]
 	bl	__aeabi_uidivmod
 	mov	r3, #3872
@@ -3418,13 +3454,66 @@ P2V_block_in_plane:
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	ldmfd	sp!, {r4, pc}
-.L428:
+.L431:
 	.align	2
-.L427:
+.L430:
 	.word	.LANCHOR0
 	.fnend
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.align	2
+	.type	FtlFreeSysBlkQueueIn.part.5, %function
+FtlFreeSysBlkQueueIn.part.5:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #0
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	mov	r5, r0
+	beq	.L433
+	ldr	r4, .L434
+	ldr	r3, [r4, #4040]
+	cmp	r3, #0
+	bne	.L433
+	bl	P2V_block_in_plane
+	mov	r1, #1
+	mov	r3, r5, asl #10
+	mov	r2, r1
+	mov	r6, r0
+	ldr	r0, [r4, #4044]
+	mov	r6, r6, asl #1
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, [r4, #4048]
+	ldrh	r2, [r3, r6]
+	add	r2, r2, #1
+	strh	r2, [r3, r6]	@ movhi
+	ldr	r3, [r4, #4052]
+	add	r3, r3, #1
+	str	r3, [r4, #4052]
+.L433:
+	ldr	r3, .L434
+	movw	r2, #4062
+	movw	r0, #4056
+	ldrh	r1, [r3, r2]
+	add	r1, r1, #1
+	strh	r1, [r3, r2]	@ movhi
+	movw	r2, #4060
+	ldrh	r1, [r3, r2]
+	add	ip, r1, #4
+	add	r1, r1, #1
+	bic	r1, r1, #64512
+	add	ip, r3, ip, asl #1
+	strh	r5, [ip, r0]	@ movhi
+	strh	r1, [r3, r2]	@ movhi
+	ldmfd	sp!, {r4, r5, r6, pc}
+.L435:
+	.align	2
+.L434:
+	.word	.LANCHOR0
+	.fnend
+	.size	FtlFreeSysBlkQueueIn.part.5, .-FtlFreeSysBlkQueueIn.part.5
+	.align	2
 	.global	ftl_cmp_data_ver
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
@@ -3433,13 +3522,13 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L430
+	bls	.L437
 	rsb	r0, r1, r0
 	cmp	r0, #-2147483648
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L430:
+.L437:
 	rsb	r0, r0, r1
 	cmp	r0, #-2147483648
 	movls	r0, #0
@@ -3455,15 +3544,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L433
-	movw	r3, #4046
+	ldr	r2, .L440
+	movw	r3, #4062
 	ldrh	r0, [r2, r3]
 	rsbs	r0, r0, #1
 	movcc	r0, #0
 	bx	lr
-.L434:
+.L441:
 	.align	2
-.L433:
+.L440:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
@@ -3475,16 +3564,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L436
-	movw	r3, #4046
+	ldr	r2, .L443
+	movw	r3, #4062
 	ldrh	r0, [r2, r3]
 	sub	r2, r0, #1024
 	rsbs	r0, r2, #0
 	adc	r0, r0, r2
 	bx	lr
-.L437:
+.L444:
 	.align	2
-.L436:
+.L443:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
@@ -3495,57 +3584,22 @@ FtlFreeSysBlkQueueIn:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L441
-	movw	r3, #4046
-	stmfd	sp!, {r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-	mov	r5, r0
+	@ link register save eliminated.
+	sub	r2, r0, #1
+	movw	r3, #65533
+	uxth	r2, r2
+	cmp	r2, r3
+	bxhi	lr
+	ldr	r2, .L447
+	movw	r3, #4062
 	ldrh	r3, [r2, r3]
 	cmp	r3, #1024
-	ldmeqfd	sp!, {r4, r5, r6, pc}
-	cmp	r1, #0
-	beq	.L440
-	ldr	r4, .L441+4
-	ldr	r3, [r4, #-2088]
-	cmp	r3, #0
-	bne	.L440
-	bl	P2V_block_in_plane
-	mov	r1, #1
-	mov	r3, r5, asl #10
-	mov	r2, r1
-	mov	r6, r0
-	ldr	r0, [r4, #-2084]
-	mov	r6, r6, asl #1
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, [r4, #-2080]
-	ldrh	r2, [r3, r6]
-	add	r2, r2, #1
-	strh	r2, [r3, r6]	@ movhi
-	ldr	r3, [r4, #-2076]
-	add	r3, r3, #1
-	str	r3, [r4, #-2076]
-.L440:
-	ldr	r3, .L441
-	movw	r2, #4046
-	movw	r0, #4040
-	ldrh	r1, [r3, r2]
-	add	r1, r1, #1
-	strh	r1, [r3, r2]	@ movhi
-	movw	r2, #4044
-	ldrh	r1, [r3, r2]
-	add	ip, r1, #4
-	add	r1, r1, #1
-	bic	r1, r1, #64512
-	add	ip, r3, ip, asl #1
-	strh	r5, [ip, r0]	@ movhi
-	strh	r1, [r3, r2]	@ movhi
-	ldmfd	sp!, {r4, r5, r6, pc}
-.L442:
+	bxeq	lr
+	b	FtlFreeSysBlkQueueIn.part.5
+.L448:
 	.align	2
-.L441:
+.L447:
 	.word	.LANCHOR0
-	.word	.LANCHOR2
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
@@ -3555,46 +3609,50 @@ FtlFreeSysBLkSort:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L446
-	mov	r0, #0
-	ldr	r2, .L446+4
-	ldr	r1, .L446+8
+	ldr	r3, .L453
+	ldr	r2, .L453+4
+	ldr	r1, .L453+8
 	stmfd	sp!, {r4, r5, lr}
 	.save {r4, r5, lr}
 	ldrh	r4, [r2, r3]
-	movw	r3, #4042
+	movw	r3, #4062
+	ldrh	r3, [r1, r3]
+	and	r4, r4, #31
+	cmp	r3, #0
+	ldmeqfd	sp!, {r4, r5, pc}
+	movw	r3, #4058
+	mov	r0, #0
 	ldrh	r2, [r1, r3]
 	add	r3, r3, #2
-	and	r4, r4, #31
 	ldrh	r3, [r1, r3]
-	b	.L444
-.L445:
+	b	.L451
+.L452:
 	add	ip, r1, r2, asl #1
 	add	r2, r2, #1
-	add	ip, ip, #4048
+	add	ip, ip, #4064
 	add	r0, r0, #1
 	mov	r2, r2, asl #22
 	ldrh	r5, [ip, #0]
 	add	ip, r1, r3, asl #1
 	add	r3, r3, #1
-	add	ip, ip, #4048
+	add	ip, ip, #4064
 	mov	r2, r2, lsr #22
 	uxth	r0, r0
 	mov	r3, r3, asl #22
 	strh	r5, [ip, #0]	@ movhi
 	mov	r3, r3, lsr #22
-.L444:
+.L451:
 	cmp	r0, r4
-	ldr	ip, .L446+8
-	blt	.L445
-	movw	r1, #4042
+	ldr	ip, .L453+8
+	blt	.L452
+	movw	r1, #4058
 	strh	r2, [ip, r1]	@ movhi
-	movw	r2, #4044
+	movw	r2, #4060
 	strh	r3, [ip, r2]	@ movhi
 	ldmfd	sp!, {r4, r5, pc}
-.L447:
+.L454:
 	.align	2
-.L446:
+.L453:
 	.word	-2044
 	.word	.LANCHOR2
 	.word	.LANCHOR0
@@ -3607,31 +3665,31 @@ remove_from_free_sys_Queue:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L454
-	movw	r2, #4046
+	ldr	r3, .L461
+	movw	r2, #4062
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r1, r0
 	ldrh	r0, [r3, r2]
 	cmp	r0, #0
 	ldmeqfd	sp!, {r4, r5, r6, pc}
-	movw	r2, #4042
+	movw	r2, #4058
 	mov	r5, #0
 	ldrh	r2, [r3, r2]
-	b	.L450
-.L452:
+	b	.L457
+.L459:
 	add	ip, r5, r2
-	ldr	r4, .L454
-	movw	r6, #4040
+	ldr	r4, .L461
+	movw	r6, #4056
 	mov	ip, ip, asl #22
 	add	ip, r3, ip, lsr #21
-	add	ip, ip, #4048
+	add	ip, ip, #4064
 	ldrh	ip, [ip, #0]
 	cmp	ip, r1
-	bne	.L451
-	ldr	r0, .L454+4
+	bne	.L458
+	ldr	r0, .L461+4
 	bl	printk
-	movw	r2, #4042
+	movw	r2, #4058
 	ldrh	r3, [r4, r2]
 	mov	r0, #1
 	add	r1, r3, #4
@@ -3645,21 +3703,21 @@ remove_from_free_sys_Queue:
 	add	r5, r5, #8
 	strh	r1, [r5, r6]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	movw	r3, #4046
+	movw	r3, #4062
 	ldrh	r2, [r4, r3]
 	sub	r2, r2, #1
 	strh	r2, [r4, r3]	@ movhi
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L451:
+.L458:
 	add	r5, r5, #1
-.L450:
+.L457:
 	cmp	r5, r0
-	bcc	.L452
+	bcc	.L459
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L455:
+.L462:
 	.align	2
-.L454:
+.L461:
 	.word	.LANCHOR0
 	.word	.LC4
 	.fnend
@@ -3671,76 +3729,76 @@ FtlFreeSysBlkQueueOut:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, lr}
-	movw	r7, #4046
-	ldr	r4, .L463
-	movw	r8, #4042
-.L457:
-	ldrh	r1, [r4, r7]
+	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
+	.save {r3, r4, r5, r6, r7, r8, sl, lr}
+	movw	r6, #4062
+	ldr	r4, .L470
+	movw	r7, #4058
+.L464:
+	ldrh	r1, [r4, r6]
 	cmp	r1, #0
-	beq	.L458
-	ldr	r9, .L463+4
+	beq	.L465
+	ldrh	r3, [r4, r7]
 	sub	r1, r1, #1
-	ldrh	r3, [r4, r8]
-	ldr	r6, [r9, #-2088]
+	ldr	sl, [r4, #4040]
 	add	r2, r4, r3, asl #1
+	cmp	sl, #0
+	add	r2, r2, #4064
 	add	r3, r3, #1
-	add	r2, r2, #4048
-	cmp	r6, #0
 	bic	r3, r3, #64512
 	ldrh	r5, [r2, #0]
-	strh	r1, [r4, r7]	@ movhi
-	strh	r3, [r4, r8]	@ movhi
-	bne	.L459
+	strh	r1, [r4, r6]	@ movhi
+	strh	r3, [r4, r7]	@ movhi
+	bne	.L466
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r3, r5, asl #10
-	mov	sl, r0
-	ldr	r0, [r9, #-2084]
+	mov	r8, r0
+	ldr	r0, [r4, #4044]
 	str	r3, [r0, #4]
 	ldrb	r3, [r4, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L460
-	mov	r1, r6
+	beq	.L467
+	mov	r1, sl
 	mov	r2, #1
 	bl	FlashEraseBlocks
-.L460:
-	ldr	r6, .L463+4
+.L467:
 	mov	r1, #1
+	ldr	r0, [r4, #4044]
 	mov	r2, r1
-	mov	sl, sl, asl #1
-	ldr	r0, [r6, #-2084]
+	mov	r8, r8, asl #1
 	bl	FlashEraseBlocks
-	ldr	r3, [r6, #-2080]
-	ldrh	r2, [r3, sl]
+	ldr	r3, [r4, #4048]
+	ldrh	r2, [r3, r8]
 	add	r2, r2, #1
-	strh	r2, [r3, sl]	@ movhi
-	ldr	r3, [r6, #-2076]
+	strh	r2, [r3, r8]	@ movhi
+	ldr	r3, [r4, #4052]
 	add	r3, r3, #1
-	str	r3, [r6, #-2076]
-	b	.L459
-.L458:
-	ldr	r0, .L463+8
+	str	r3, [r4, #4052]
+	b	.L466
+.L465:
+	ldr	r0, .L470+4
 	bl	printk
-.L461:
-	b	.L461
-.L459:
-	cmp	r5, #0
-	bne	.L462
+.L468:
+	b	.L468
+.L466:
+	sub	r2, r5, #1
+	movw	r3, #65533
+	uxth	r2, r2
+	cmp	r2, r3
+	bls	.L469
 	mov	r1, r5
-	ldrh	r2, [r4, r7]
-	ldr	r0, .L463+12
+	ldrh	r2, [r4, r6]
+	ldr	r0, .L470+8
 	bl	printk
-	b	.L457
-.L462:
+	b	.L464
+.L469:
 	mov	r0, r5
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L464:
+	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
+.L471:
 	.align	2
-.L463:
+.L470:
 	.word	.LANCHOR0
-	.word	.LANCHOR2
 	.word	.LC5
 	.word	.LC6
 	.fnend
@@ -3752,7 +3810,7 @@ insert_data_list:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L480
+	ldr	r2, .L487
 	mov	r3, #3856
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
@@ -3760,49 +3818,49 @@ insert_data_list:
 	sub	sp, sp, #20
 	ldrh	r3, [r2, r3]
 	cmp	r3, r0
-	bls	.L466
-	ldr	r1, .L480+4
+	bls	.L473
+	ldr	r1, .L487+4
 	mov	ip, #6
 	mul	ip, ip, r0
 	mvn	r6, #0
 	ldr	r4, [r1, #-2024]
-	mov	r5, r1
+	mov	r8, r1
 	add	r2, r4, ip
 	strh	r6, [r2, #2]	@ movhi
 	strh	r6, [r4, ip]	@ movhi
 	ldr	r3, [r1, #-2020]
 	cmp	r3, #0
-	beq	.L479
-.L467:
+	beq	.L486
+.L474:
 	ldr	r7, [r1, #-2016]
-	mov	r8, r0, asl #1
+	mov	r5, r0, asl #1
 	ldrh	r1, [r2, #4]
-	ldr	r9, .L480
-	ldrh	sl, [r7, r8]
+	ldr	fp, [r8, #-2024]
+	ldrh	sl, [r7, r5]
 	cmp	r1, #0
-	ldr	fp, [r5, #-2080]
+	ldr	r8, .L487+8
 	mulne	r6, r1, sl
-	ldr	r1, [r5, #-2024]
-	ldr	sl, .L480+8
-	mov	r5, #0
-	add	r8, fp, r8
-	str	r8, [sp, #12]
-	str	r1, [sp, #4]
-	rsb	r1, r1, r3
-	mov	r1, r1, asr #1
-	mul	r1, sl, r1
+	rsb	r1, fp, r3
 	mov	sl, #3856
-	ldrh	sl, [r9, sl]
-	str	sl, [sp, #8]
+	mov	r1, r1, asr #1
+	mul	r1, r8, r1
+	ldr	r8, .L487
+	ldrh	sl, [r8, sl]
+	ldr	r8, [r8, #4048]
 	uxth	r1, r1
-.L474:
+	add	r5, r8, r5
+	str	r5, [sp, #12]
+	mov	r5, #0
+	str	sl, [sp, #8]
+	str	r8, [sp, #4]
+.L481:
 	add	r5, r5, #1
 	ldr	r8, [sp, #8]
 	uxth	r5, r5
 	cmp	r5, r8
-	bhi	.L466
+	bhi	.L473
 	cmp	r0, r1
-	beq	.L466
+	beq	.L473
 	mov	r9, r1, asl #1
 	ldrh	r8, [r3, #4]
 	ldrh	sl, [r7, r9]
@@ -3810,56 +3868,56 @@ insert_data_list:
 	mvneq	r8, #0
 	mulne	r8, r8, sl
 	cmp	r8, r6
-	bne	.L470
-	ldrh	sl, [fp, r9]
+	bne	.L477
+	ldr	r8, [sp, #4]
+	ldrh	sl, [r8, r9]
 	ldr	r9, [sp, #12]
 	ldrh	r8, [r9, #0]
 	cmp	sl, r8
-	bcc	.L472
-	b	.L471
-.L470:
-	bhi	.L471
-.L472:
+	bcc	.L479
+	b	.L478
+.L477:
+	bhi	.L478
+.L479:
 	ldrh	r8, [r3, #0]
 	movw	sl, #65535
 	cmp	r8, sl
 	streqh	r1, [r2, #2]	@ movhi
 	streqh	r0, [r3, #0]	@ movhi
-	ldreq	r3, .L480+4
+	ldreq	r3, .L487+4
 	streq	r2, [r3, #-2012]
-	beq	.L466
-.L473:
-	ldr	r9, [sp, #4]
+	beq	.L473
+.L480:
 	mov	r1, #6
-	mla	r3, r1, r8, r9
+	mla	r3, r1, r8, fp
 	mov	r1, r8
-	b	.L474
-.L471:
+	b	.L481
+.L478:
 	strh	r1, [r4, ip]	@ movhi
 	ldrh	r1, [r3, #2]
 	strh	r1, [r2, #2]	@ movhi
-	ldr	r1, .L480+4
+	ldr	r1, .L487+4
 	ldr	ip, [r1, #-2020]
 	cmp	r3, ip
-	bne	.L475
+	bne	.L482
 	strh	r0, [r3, #2]	@ movhi
-.L479:
+.L486:
 	str	r2, [r1, #-2020]
-	b	.L466
-.L475:
+	b	.L473
+.L482:
 	ldrh	r2, [r3, #2]
 	mov	ip, #6
 	ldr	r1, [r1, #-2024]
 	mul	r2, ip, r2
 	strh	r0, [r1, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-.L466:
+.L473:
 	mov	r0, #0
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L481:
+.L488:
 	.align	2
-.L480:
+.L487:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1431655765
@@ -3875,15 +3933,15 @@ INSERT_DATA_LIST:
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L483
-	ldr	r3, .L483+4
+	ldr	r2, .L490
+	ldr	r3, .L490+4
 	ldrh	r1, [r2, r3]
 	add	r1, r1, #1
 	strh	r1, [r2, r3]	@ movhi
 	ldmfd	sp!, {r3, pc}
-.L484:
+.L491:
 	.align	2
-.L483:
+.L490:
 	.word	.LANCHOR2
 	.word	-2008
 	.fnend
@@ -3899,8 +3957,8 @@ insert_free_list:
 	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	movw	r6, #65535
 	cmp	r0, r6
-	beq	.L486
-	ldr	r1, .L493
+	beq	.L493
+	ldr	r1, .L500
 	mov	r5, #6
 	mul	ip, r5, r0
 	mvn	r3, #0
@@ -3910,59 +3968,61 @@ insert_free_list:
 	strh	r3, [r4, ip]	@ movhi
 	ldr	r3, [r1, #-2004]
 	cmp	r3, #0
-	beq	.L492
-.L487:
+	beq	.L499
+.L494:
 	ldr	sl, [r1, #-2024]
 	mov	r8, r0, asl #1
-	ldr	r7, [r1, #-2080]
+	ldr	r9, .L500+4
 	rsb	r1, sl, r3
-	ldr	r9, .L493+4
+	ldr	r7, .L500+8
 	mov	r1, r1, asr #1
-	ldrh	r8, [r7, r8]
+	ldr	r7, [r7, #4048]
 	mul	r1, r9, r1
 	mov	r9, r5
+	ldrh	r8, [r7, r8]
 	uxth	r1, r1
-.L490:
+.L497:
 	mov	r5, r1, asl #1
 	ldrh	r5, [r7, r5]
 	cmp	r5, r8
-	bcs	.L488
+	bcs	.L495
 	ldrh	r5, [r3, #0]
 	cmp	r5, r6
 	streqh	r1, [r2, #2]	@ movhi
 	streqh	r0, [r3, #0]	@ movhi
-	beq	.L486
-.L489:
+	beq	.L493
+.L496:
 	mla	r3, r9, r5, sl
 	mov	r1, r5
-	b	.L490
-.L488:
+	b	.L497
+.L495:
 	ldrh	r5, [r3, #2]
 	strh	r5, [r2, #2]	@ movhi
 	strh	r1, [r4, ip]	@ movhi
-	ldr	r1, .L493
+	ldr	r1, .L500
 	ldr	ip, [r1, #-2004]
 	cmp	r3, ip
-	bne	.L491
+	bne	.L498
 	strh	r0, [r3, #2]	@ movhi
-.L492:
+.L499:
 	str	r2, [r1, #-2004]
-	b	.L486
-.L491:
+	b	.L493
+.L498:
 	ldrh	r2, [r3, #2]
 	mov	ip, #6
 	ldr	r1, [r1, #-2024]
 	mul	r2, ip, r2
 	strh	r0, [r1, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-.L486:
+.L493:
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L494:
+.L501:
 	.align	2
-.L493:
+.L500:
 	.word	.LANCHOR2
 	.word	-1431655765
+	.word	.LANCHOR0
 	.fnend
 	.size	insert_free_list, .-insert_free_list
 	.align	2
@@ -3975,15 +4035,15 @@ INSERT_FREE_LIST:
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L496
-	ldr	r3, .L496+4
+	ldr	r2, .L503
+	ldr	r3, .L503+4
 	ldrh	r1, [r2, r3]
 	add	r1, r1, #1
 	strh	r1, [r2, r3]	@ movhi
 	ldmfd	sp!, {r3, pc}
-.L497:
+.L504:
 	.align	2
-.L496:
+.L503:
 	.word	.LANCHOR2
 	.word	-2000
 	.fnend
@@ -3995,7 +4055,7 @@ List_remove_node:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L503
+	ldr	ip, .L510
 	mov	r2, #6
 	mul	r1, r2, r1
 	ldr	r3, [ip, #-2024]
@@ -4006,7 +4066,7 @@ List_remove_node:
 	movw	r6, #65535
 	cmp	r5, r4
 	ldrh	r4, [r3, r1]
-	bne	.L499
+	bne	.L506
 	cmp	r4, r6
 	mlane	r2, r2, r4, r3
 	moveq	r2, #0
@@ -4014,17 +4074,17 @@ List_remove_node:
 	strne	r2, [r0, #0]
 	mvnne	r0, #0
 	strneh	r0, [r2, #2]	@ movhi
-	b	.L501
-.L499:
+	b	.L508
+.L506:
 	cmp	r4, r6
 	ldrh	r0, [r5, #2]
-	bne	.L502
+	bne	.L509
 	cmp	r0, r4
 	mulne	r2, r2, r0
 	mvnne	r0, #0
 	strneh	r0, [r3, r2]	@ movhi
-	b	.L501
-.L502:
+	b	.L508
+.L509:
 	mla	r4, r2, r4, r3
 	strh	r0, [r4, #2]	@ movhi
 	ldrh	r6, [r5, #2]
@@ -4032,15 +4092,15 @@ List_remove_node:
 	ldr	r0, [ip, #-2024]
 	mul	r2, r2, r6
 	strh	r4, [r0, r2]	@ movhi
-.L501:
+.L508:
 	mvn	r2, #0
 	mov	r0, #0
 	strh	r2, [r3, r1]	@ movhi
 	strh	r2, [r5, #2]	@ movhi
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L504:
+.L511:
 	.align	2
-.L503:
+.L510:
 	.word	.LANCHOR2
 	.fnend
 	.size	List_remove_node, .-List_remove_node
@@ -4055,25 +4115,25 @@ List_pop_index_node:
 	.save {r4, lr}
 	ldr	r3, [r0, #0]
 	cmp	r3, #0
-	beq	.L510
-	ldr	r2, .L511
+	beq	.L517
+	ldr	r2, .L518
 	movw	lr, #65535
 	mov	ip, #6
 	ldr	r4, [r2, #-2024]
-	b	.L507
-.L509:
+	b	.L514
+.L516:
 	mla	r3, ip, r2, r4
 	sub	r1, r1, #1
 	uxth	r1, r1
-.L507:
+.L514:
 	cmp	r1, #0
-	beq	.L508
+	beq	.L515
 	ldrh	r2, [r3, #0]
 	cmp	r2, lr
-	bne	.L509
-.L508:
+	bne	.L516
+.L515:
 	rsb	r4, r4, r3
-	ldr	r3, .L511+4
+	ldr	r3, .L518+4
 	mov	r4, r4, asr #1
 	mul	r4, r3, r4
 	uxth	r4, r4
@@ -4081,12 +4141,12 @@ List_pop_index_node:
 	bl	List_remove_node
 	mov	r0, r4
 	ldmfd	sp!, {r4, pc}
-.L510:
+.L517:
 	movw	r0, #65535
 	ldmfd	sp!, {r4, pc}
-.L512:
+.L519:
 	.align	2
-.L511:
+.L518:
 	.word	.LANCHOR2
 	.word	-1431655765
 	.fnend
@@ -4099,39 +4159,39 @@ List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L519
+	ldr	r2, .L526
 	ldr	r3, [r2, #-2020]
 	cmp	r3, #0
-	beq	.L518
+	beq	.L525
 	ldr	r2, [r2, #-2024]
 	movw	r1, #65535
 	mov	ip, #6
-	b	.L515
-.L517:
+	b	.L522
+.L524:
 	mla	r3, ip, r3, r2
 	sub	r0, r0, #1
 	uxth	r0, r0
-.L515:
+.L522:
 	cmp	r0, #0
-	beq	.L516
+	beq	.L523
 	ldrh	r3, [r3, #0]
 	cmp	r3, r1
-	bne	.L517
+	bne	.L524
 	mov	r0, r1
 	bx	lr
-.L516:
+.L523:
 	rsb	r3, r2, r3
-	ldr	r0, .L519+4
+	ldr	r0, .L526+4
 	mov	r3, r3, asr #1
 	mul	r0, r0, r3
 	uxth	r0, r0
 	bx	lr
-.L518:
+.L525:
 	movw	r0, #65535
 	bx	lr
-.L520:
+.L527:
 	.align	2
-.L519:
+.L526:
 	.word	.LANCHOR2
 	.word	-1431655765
 	.fnend
@@ -4146,26 +4206,26 @@ List_update_data_list:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L528
-	ldr	r2, .L528+4
+	ldr	r3, .L535
+	ldr	r2, .L535+4
 	ldrh	r2, [r3, r2]
 	cmp	r2, r0
-	beq	.L522
-	ldr	r2, .L528+8
+	beq	.L529
+	ldr	r2, .L535+8
 	ldrh	r2, [r3, r2]
 	cmp	r2, r0
-	beq	.L522
-	ldr	r2, .L528+12
+	beq	.L529
+	ldr	r2, .L535+12
 	ldrh	r2, [r3, r2]
 	cmp	r2, r0
-	beq	.L522
+	beq	.L529
 	mov	r5, #6
 	ldr	r2, [r3, #-2024]
 	mul	r5, r5, r0
 	ldr	r0, [r3, #-2020]
 	add	r1, r2, r5
 	cmp	r1, r0
-	beq	.L522
+	beq	.L529
 	ldr	ip, [r3, #-2016]
 	mov	r3, r4, asl #1
 	ldrh	r0, [ip, r3]
@@ -4176,14 +4236,14 @@ List_update_data_list:
 	mvneq	r0, #0
 	movw	r1, #65535
 	cmp	r3, r1
-	bne	.L524
+	bne	.L531
 	ldrh	r1, [r2, r5]
 	cmp	r1, r3
-	beq	.L522
-.L524:
+	beq	.L529
+.L531:
 	mov	r1, #6
 	mla	r3, r1, r3, r2
-	ldr	r1, .L528+16
+	ldr	r1, .L535+16
 	rsb	r2, r2, r3
 	mov	r2, r2, asr #1
 	ldrh	r3, [r3, #4]
@@ -4195,23 +4255,23 @@ List_update_data_list:
 	ldrh	r2, [ip, r2]
 	mulne	r3, r3, r2
 	cmp	r0, r3
-	bcs	.L522
-	ldr	r0, .L528+20
+	bcs	.L529
+	ldr	r0, .L535+20
 	mov	r1, r4
 	bl	List_remove_node
-	ldr	r5, .L528
-	ldr	r3, .L528+24
+	ldr	r5, .L535
+	ldr	r3, .L535+24
 	mov	r0, r4
 	ldrh	r2, [r5, r3]
 	sub	r2, r2, #1
 	strh	r2, [r5, r3]	@ movhi
 	bl	INSERT_DATA_LIST
-.L522:
+.L529:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L529:
+.L536:
 	.align	2
-.L528:
+.L535:
 	.word	.LANCHOR2
 	.word	-1996
 	.word	-1948
@@ -4234,13 +4294,13 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r2, [r0, #10]
 	mov	r5, #0
 	ldr	r3, [r0, #12]
-	b	.L531
-.L536:
+	b	.L538
+.L543:
 	mov	r7, r3
 	add	r3, r3, #2
 	ldrh	r6, [r7, #0]
 	cmp	r6, #0
-	bne	.L532
+	bne	.L539
 	bl	FtlFreeSysBlkQueueOut
 	movw	r3, #65533
 	sub	r2, r0, #1
@@ -4248,15 +4308,15 @@ ftl_map_blk_alloc_new_blk:
 	strh	r0, [r7, #0]	@ movhi
 	uxth	r2, r2
 	cmp	r2, r3
-	bls	.L533
-	ldr	r2, .L537
-	movw	r3, #4046
-	ldr	r0, .L537+4
+	bls	.L540
+	ldr	r2, .L544
+	movw	r3, #4062
+	ldr	r0, .L544+4
 	ldrh	r2, [r2, r3]
 	bl	printk
-.L534:
-	b	.L534
-.L533:
+.L541:
+	b	.L541
+.L540:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	add	r3, r3, #1
@@ -4265,19 +4325,19 @@ ftl_map_blk_alloc_new_blk:
 	strh	r5, [r4, #0]	@ movhi
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L535
-.L532:
+	b	.L542
+.L539:
 	add	r5, r5, #1
 	uxth	r5, r5
-.L531:
+.L538:
 	cmp	r5, r2
-	bne	.L536
-.L535:
+	bne	.L543
+.L542:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L538:
+.L545:
 	.align	2
-.L537:
+.L544:
 	.word	.LANCHOR0
 	.word	.LC7
 	.fnend
@@ -4289,18 +4349,18 @@ select_l2p_ram_region:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L551
+	ldr	r2, .L558
 	movw	r3, #3954
 	stmfd	sp!, {r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
 	movw	r1, #65535
 	ldrh	r3, [r2, r3]
-	ldr	r2, .L551+4
+	ldr	r2, .L558+4
 	ldr	ip, [r2, #-1852]
 	mov	r2, #0
 	mov	r0, r2
-	b	.L540
-.L542:
+	b	.L547
+.L549:
 	add	r2, r2, #12
 	add	r4, ip, r2
 	ldrh	r4, [r4, #-12]
@@ -4308,59 +4368,59 @@ select_l2p_ram_region:
 	ldmeqfd	sp!, {r4, r5, r6, r7, pc}
 	add	r0, r0, #1
 	uxth	r0, r0
-.L540:
+.L547:
 	cmp	r0, r3
-	bne	.L542
+	bne	.L549
 	mov	r1, #0
 	mov	r0, r3
 	mov	r5, #-2147483648
 	mov	r2, r1
-	b	.L543
-.L545:
+	b	.L550
+.L552:
 	add	r4, ip, r1
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	blt	.L544
+	blt	.L551
 	cmp	r4, r5
 	movcc	r5, r4
 	movcc	r0, r2
-.L544:
+.L551:
 	add	r2, r2, #1
 	add	r1, r1, #12
 	uxth	r2, r2
-.L543:
+.L550:
 	cmp	r2, r3
-	bne	.L545
+	bne	.L552
 	cmp	r0, r3
 	ldmccfd	sp!, {r4, r5, r6, r7, pc}
-	ldr	r2, .L551+8
+	ldr	r2, .L558+8
 	mov	r0, r3
-	ldr	r1, .L551+4
+	ldr	r1, .L558+4
 	mvn	r4, #0
 	ldrh	r6, [r1, r2]
 	mov	r2, #0
 	mov	r1, r2
-	b	.L546
-.L548:
+	b	.L553
+.L555:
 	add	r5, ip, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, r4
-	bcs	.L547
+	bcs	.L554
 	ldrh	r7, [ip, r2]
 	cmp	r7, r6
 	movne	r4, r5
 	movne	r0, r1
-.L547:
+.L554:
 	add	r1, r1, #1
 	add	r2, r2, #12
 	uxth	r1, r1
-.L546:
+.L553:
 	cmp	r1, r3
-	bne	.L548
+	bne	.L555
 	ldmfd	sp!, {r4, r5, r6, r7, pc}
-.L552:
+.L559:
 	.align	2
-.L551:
+.L558:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1848
@@ -4373,8 +4433,8 @@ FtlUpdateVaildLpn:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L559
-	ldr	r2, .L559+4
+	ldr	r3, .L566
+	ldr	r2, .L566+4
 	stmfd	sp!, {r4, r5, lr}
 	.save {r4, r5, lr}
 	ldrh	r1, [r2, r3]
@@ -4382,11 +4442,11 @@ FtlUpdateVaildLpn:
 	add	ip, r1, #1
 	mov	r1, r3
 	strh	ip, [r2, r3]	@ movhi
-	bhi	.L554
+	bhi	.L561
 	cmp	r0, #0
 	ldmeqfd	sp!, {r4, r5, pc}
-.L554:
-	ldr	r0, .L559+8
+.L561:
+	ldr	r0, .L566+8
 	mov	r3, #0
 	strh	r3, [r2, r1]	@ movhi
 	mov	r1, #3856
@@ -4394,9 +4454,9 @@ FtlUpdateVaildLpn:
 	movw	ip, #65535
 	ldrh	r4, [r0, r1]
 	ldr	r1, [r2, #-2016]
-	ldr	r2, .L559+4
-	b	.L556
-.L558:
+	ldr	r2, .L566+4
+	b	.L563
+.L565:
 	ldrh	r0, [r1], #2
 	add	r3, r3, #1
 	cmp	r0, ip
@@ -4404,13 +4464,13 @@ FtlUpdateVaildLpn:
 	ldrne	r5, [r2, #-1844]
 	addne	r0, r0, r5
 	strne	r0, [r2, #-1844]
-.L556:
+.L563:
 	cmp	r3, r4
-	bne	.L558
+	bne	.L565
 	ldmfd	sp!, {r4, r5, pc}
-.L560:
+.L567:
 	.align	2
-.L559:
+.L566:
 	.word	-1846
 	.word	.LANCHOR2
 	.word	.LANCHOR0
@@ -4424,7 +4484,7 @@ ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L565
+	ldr	r3, .L572
 	mov	r2, r0, lsr #5
 	cmp	r1, #0
 	and	r0, r0, #31
@@ -4436,9 +4496,9 @@ ftl_set_blk_mode:
 	biceq	r0, r1, ip, asl r0
 	str	r0, [r3, r2, asl #2]
 	bx	lr
-.L566:
+.L573:
 	.align	2
-.L565:
+.L572:
 	.word	.LANCHOR2
 	.fnend
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
@@ -4450,7 +4510,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L568
+	ldr	r3, .L575
 	mov	r2, r0, lsr #5
 	and	r0, r0, #31
 	ldr	r3, [r3, #-1840]
@@ -4458,9 +4518,9 @@ ftl_get_blk_mode:
 	mov	r0, r3, lsr r0
 	and	r0, r0, #1
 	bx	lr
-.L569:
+.L576:
 	.align	2
-.L568:
+.L575:
 	.word	.LANCHOR2
 	.fnend
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
@@ -4471,7 +4531,7 @@ ftl_sb_update_avl_pages:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L577
+	ldr	ip, .L584
 	mov	r3, #0
 	strh	r3, [r0, #4]	@ movhi
 	movw	r3, #3848
@@ -4479,8 +4539,8 @@ ftl_sb_update_avl_pages:
 	.save {r4, r5, r6, lr}
 	ldrh	r3, [ip, r3]
 	movw	ip, #65535
-	b	.L571
-.L573:
+	b	.L578
+.L580:
 	add	r4, r0, r2, asl #1
 	add	r2, r2, #1
 	ldrh	r4, [r4, #16]
@@ -4489,18 +4549,18 @@ ftl_sb_update_avl_pages:
 	ldrneh	r4, [r0, #4]
 	addne	r4, r4, #1
 	strneh	r4, [r0, #4]	@ movhi
-.L571:
+.L578:
 	cmp	r2, r3
-	bcc	.L573
-	ldr	ip, .L577
+	bcc	.L580
+	ldr	ip, .L584
 	movw	r2, #3916
 	movw	r4, #65535
 	mvn	r1, r1
 	ldrh	r5, [ip, r2]
 	mov	ip, r0
 	mov	r2, #0
-	b	.L574
-.L576:
+	b	.L581
+.L583:
 	ldrh	r6, [ip, #16]
 	add	r2, r2, #1
 	add	ip, ip, #2
@@ -4510,13 +4570,13 @@ ftl_sb_update_avl_pages:
 	addne	r6, r5, r6
 	addne	r6, r6, r1
 	strneh	r6, [r0, #4]	@ movhi
-.L574:
+.L581:
 	cmp	r2, r3
-	bne	.L576
+	bne	.L583
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L578:
+.L585:
 	.align	2
-.L577:
+.L584:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -4531,13 +4591,13 @@ make_superblock:
 	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	mov	r4, r0
 	mov	r5, #0
-	ldr	r6, .L585
+	ldr	r6, .L592
 	strh	r5, [r0, #4]	@ movhi
 	movw	r8, #3848
 	strb	r5, [r4, #7]
 	mvn	r7, #0
-	b	.L580
-.L582:
+	b	.L587
+.L589:
 	add	r3, r6, r5
 	ldrh	r1, [r4, #0]
 	add	sl, r5, #8
@@ -4554,42 +4614,40 @@ make_superblock:
 	ldreqb	r3, [r4, #7]	@ zero_extendqisi2
 	addeq	r3, r3, #1
 	streqb	r3, [r4, #7]
-.L580:
+.L587:
 	ldrh	r2, [r6, r8]
-	ldr	r3, .L585
+	ldr	r3, .L592
 	cmp	r2, r5
-	bhi	.L582
+	bhi	.L589
 	movw	r1, #3916
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldrh	r1, [r3, r1]
-	ldr	r3, [r3, #3840]
 	mul	r2, r1, r2
 	strh	r2, [r4, #4]	@ movhi
 	mov	r2, #0
-	cmp	r3, r2
 	strb	r2, [r4, #9]
-	beq	.L583
-	ldr	r2, .L585+4
-	ldrh	r3, [r4, #0]
-	ldr	r2, [r2, #-2080]
-	mov	r3, r3, asl #1
+	ldr	r2, [r3, #3840]
+	cmp	r2, #0
+	beq	.L590
+	ldrh	r1, [r4, #0]
+	ldr	r2, [r3, #4048]
+	mov	r3, r1, asl #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #59
 	movls	r3, #1
 	strlsb	r3, [r4, #9]
-.L583:
-	ldr	r3, .L585
+.L590:
+	ldr	r3, .L592
 	mov	r0, #0
 	ldrb	r3, [r3, #852]	@ zero_extendqisi2
 	cmp	r3, #0
 	movne	r3, #1
 	strneb	r3, [r4, #9]
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L586:
+.L593:
 	.align	2
-.L585:
+.L592:
 	.word	.LANCHOR0
-	.word	.LANCHOR2
 	.fnend
 	.size	make_superblock, .-make_superblock
 	.align	2
@@ -4604,11 +4662,11 @@ update_multiplier_value:
 	mov	r4, #0
 	mov	r7, r0
 	mov	r5, r4
-	ldr	r6, .L592
+	ldr	r6, .L599
 	movw	sl, #3848
 	movw	r8, #3916
-	b	.L588
-.L590:
+	b	.L595
+.L597:
 	add	r3, r6, r5
 	mov	r1, r7
 	add	r5, r5, #1
@@ -4620,27 +4678,27 @@ update_multiplier_value:
 	ldreqh	r3, [r6, r8]
 	addeq	r4, r4, r3
 	uxtheq	r4, r4
-.L588:
+.L595:
 	ldrh	r3, [r6, sl]
 	cmp	r3, r5
-	bhi	.L590
+	bhi	.L597
 	cmp	r4, #0
-	beq	.L591
+	beq	.L598
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	uxth	r4, r0
-.L591:
-	ldr	r3, .L592+4
+.L598:
+	ldr	r3, .L599+4
 	mov	r2, #6
 	mov	r0, #0
 	ldr	r3, [r3, #-2024]
 	mla	r7, r2, r7, r3
 	strh	r4, [r7, #4]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L593:
+.L600:
 	.align	2
-.L592:
+.L599:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
@@ -4653,24 +4711,26 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L597
+	ldr	r3, .L604
 	ldr	r0, [r3, #-2004]
 	cmp	r0, #0
 	bxeq	lr
-	ldr	r2, [r3, #-2024]
-	rsb	r0, r2, r0
-	ldr	r2, .L597+4
+	ldr	r3, [r3, #-2024]
+	ldr	r2, .L604+4
+	rsb	r0, r3, r0
+	ldr	r3, .L604+8
 	mov	r0, r0, asr #1
-	mul	r0, r2, r0
-	ldr	r2, [r3, #-2080]
-	uxth	r0, r0
-	mov	r3, r0, asl #1
+	ldr	r2, [r2, #4048]
+	mul	r3, r3, r0
+	uxth	r3, r3
+	mov	r3, r3, asl #1
 	ldrh	r0, [r2, r3]
 	bx	lr
-.L598:
+.L605:
 	.align	2
-.L597:
+.L604:
 	.word	.LANCHOR2
+	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -4681,13 +4741,13 @@ GetFreeBlockMaxEraseCount:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L606
+	ldr	r2, .L613
 	stmfd	sp!, {r4, r5, lr}
 	.save {r4, r5, lr}
 	ldr	r3, [r2, #-2004]
 	cmp	r3, #0
-	beq	.L605
-	ldr	r1, .L606+4
+	beq	.L612
+	ldr	r1, .L613+4
 	mov	ip, #7
 	mov	r5, #6
 	movw	r4, #65535
@@ -4697,39 +4757,40 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r1
 	uxthgt	r0, r1
 	ldr	r1, [r2, #-2024]
-	ldr	r2, .L606+8
+	ldr	r2, .L613+8
 	rsb	r3, r1, r3
 	mov	r3, r3, asr #1
 	mul	r3, r2, r3
 	mov	r2, #0
 	uxth	r3, r3
-	b	.L602
-.L604:
+	b	.L609
+.L611:
 	mul	ip, r5, r3
 	ldrh	ip, [r1, ip]
 	cmp	ip, r4
-	beq	.L603
+	beq	.L610
 	add	r2, r2, #1
 	mov	r3, ip
 	uxth	r2, r2
-.L602:
+.L609:
 	cmp	r2, r0
-	bne	.L604
-.L603:
-	ldr	r2, .L606
+	bne	.L611
+.L610:
+	ldr	r2, .L613+12
 	mov	r3, r3, asl #1
-	ldr	r2, [r2, #-2080]
+	ldr	r2, [r2, #4048]
 	ldrh	r0, [r2, r3]
 	ldmfd	sp!, {r4, r5, pc}
-.L605:
+.L612:
 	mov	r0, r3
 	ldmfd	sp!, {r4, r5, pc}
-.L607:
+.L614:
 	.align	2
-.L606:
+.L613:
 	.word	.LANCHOR2
 	.word	-2000
 	.word	-1431655765
+	.word	.LANCHOR0
 	.fnend
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	2
@@ -4742,27 +4803,27 @@ FtlPrintInfo2buf:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	mov	sl, r0
-	ldr	r5, .L618
+	ldr	r6, .L625
 	add	r4, sl, #12
 	.pad #32
 	sub	sp, sp, #32
-	ldr	r1, .L618+4
+	ldr	r1, .L625+4
 	bl	strcpy
 	mov	r0, r4
-	ldr	r1, .L618+8
-	ldr	r2, [r5, #3048]
+	ldr	r1, .L625+8
+	ldr	r2, [r6, #3048]
 	bl	sprintf
-	ldr	r1, .L618+12
-	ldr	r2, [r5, #3932]
+	ldr	r1, .L625+12
+	ldr	r2, [r6, #3932]
 	add	r4, r4, r0
 	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+16
+	ldr	r3, .L625+16
 	ldr	r3, [r3, #2996]
 	cmp	r3, #1
 	add	r4, r4, r0
-	rsbne	r0, sl, r4
-	bne	.L610
+	bne	.L621
+.L616:
 	add	r0, sp, #16
 	add	r1, sp, #20
 	add	r2, sp, #24
@@ -4771,467 +4832,469 @@ FtlPrintInfo2buf:
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #16]
 	mov	r0, r4
-	ldr	r1, .L618+20
+	ldr	r1, .L625+20
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #28]
-	ldr	r8, .L618+24
+	ldr	r5, .L625+24
+	ldr	r7, .L625+28
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #20]
 	bl	sprintf
-	ldr	r1, .L618+28
-	add	r6, r4, r0
-	ldr	r4, .L618+32
-	mov	r0, r6
-	add	r6, r6, #10
+	ldr	r1, .L625+32
+	ldr	r8, .L625+36
+	add	r4, r4, r0
+	mov	r0, r4
+	add	r4, r4, #10
 	bl	strcpy
-	ldr	r2, [r5, #3976]
-	mov	r0, r6
-	ldr	r1, .L618+36
+	ldr	r1, .L625+40
+	mov	r0, r4
+	ldr	r2, [r6, #3976]
 	bl	sprintf
-	ldr	r1, .L618+40
-	ldr	r2, [r4, #-1844]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+44
+	ldr	r2, [r5, #-1844]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+44
-	ldr	r2, [r4, #-1836]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+48
+	ldr	r2, [r5, #-1836]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+48
-	ldr	r2, [r4, #-1832]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+52
+	ldr	r2, [r5, #-1832]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+52
-	ldr	r2, [r4, #-1828]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+56
+	ldr	r2, [r5, #-1828]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+56
-	ldr	r2, [r4, #-1824]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+60
+	ldr	r2, [r5, #-1824]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+60
-	ldr	r2, [r4, #-1820]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+64
+	ldr	r2, [r5, #-1820]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+64
-	ldr	r2, [r4, #-1816]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+68
+	ldr	r2, [r5, #-1816]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r4, #-1812]
-	ldr	r1, .L618+68
+	ldr	r2, [r5, #-1812]
+	ldr	r1, .L625+72
 	mov	r2, r2, lsr #11
-	add	r6, r6, r0
-	mov	r0, r6
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r4, #-1808]
-	ldr	r1, .L618+72
+	ldr	r2, [r5, #-1808]
+	ldr	r1, .L625+76
 	mov	r2, r2, lsr #11
-	add	r6, r6, r0
-	mov	r0, r6
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+76
-	ldr	r2, [r4, #-1804]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+80
+	ldr	r2, [r5, #-1804]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+80
-	ldr	r2, [r4, #-1800]
-	add	r6, r6, r0
-	mov	r0, r6
+	ldr	r1, .L625+84
+	ldr	r2, [r5, #-1800]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	add	r6, r6, r0
+	add	r4, r4, r0
 	bl	FtlBbtCalcTotleCnt
 	movw	r2, #3986
-	ldr	r1, .L618+84
-	ldrh	r2, [r5, r2]
+	ldr	r1, .L625+88
+	ldrh	r2, [r6, r2]
 	mov	r3, r0
-	mov	r0, r6
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+88
-	add	r7, r6, r0
-	ldr	r6, .L618+92
-	mov	r0, r7
-	ldrh	r2, [r4, r6]
+	ldr	r1, .L625+92
+	ldrh	r2, [r5, r7]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+96
-	ldr	r2, [r4, #-1796]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+96
+	ldr	r2, [r5, #-1796]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+100
-	ldr	r2, [r4, #-1792]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+100
+	ldr	r2, [r5, #-1792]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+104
-	ldr	r2, [r4, #-1788]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+104
+	ldr	r2, [r5, #-1788]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+108
-	ldr	r2, [r4, #-2076]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+108
+	ldr	r2, [r6, #4052]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+112
-	ldr	r2, [r4, #-1784]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+112
+	ldr	r2, [r5, #-1784]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+116
-	ldr	r2, [r4, #-1780]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+116
+	ldr	r2, [r5, #-1780]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+120
-	ldr	r1, .L618+124
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+120
+	ldr	r1, .L625+124
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+128
-	ldr	r1, .L618+132
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+128
+	ldr	r1, .L625+132
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r5, #3956]
-	ldr	r1, .L618+136
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+136
+	ldr	r2, [r6, #3956]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r5, #3948]
-	ldr	r1, .L618+140
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+140
+	ldr	r2, [r6, #3948]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r5, #3844]
-	ldr	r1, .L618+144
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+144
+	ldr	r2, [r6, #3844]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	movw	r3, #4046
-	ldrh	r2, [r5, r3]
-	ldr	r1, .L618+148
-	add	r7, r7, r0
-	mov	r0, r7
+	movw	r3, #4062
+	ldrh	r2, [r6, r3]
+	ldr	r1, .L625+148
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
 	mov	r3, #3856
-	ldrh	r2, [r5, r3]
-	ldr	r1, .L618+152
-	add	r7, r7, r0
-	mov	r0, r7
+	ldrh	r2, [r6, r3]
+	ldr	r1, .L625+152
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+156
-	ldr	r1, .L618+160
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+156
+	ldr	r1, .L625+160
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r2, [r5, #3860]
-	ldr	r1, .L618+164
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+164
+	ldr	r2, [r6, #3860]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+168
-	ldr	r1, .L618+172
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+168
+	ldr	r1, .L625+172
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
 	movw	r3, #3980
-	ldrh	r2, [r5, r3]
-	ldr	r1, .L618+176
-	add	r7, r7, r0
-	mov	r0, r7
+	ldrh	r2, [r6, r3]
+	ldr	r1, .L625+176
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+180
-	ldr	r1, .L618+184
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+180
+	ldr	r1, .L625+184
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+188
-	ldrb	r2, [r4, #-1990]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+188
+	ldrb	r2, [r5, #-1990]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldrh	r2, [r4, r8]
-	ldr	r1, .L618+192
-	add	r7, r7, r0
-	mov	r0, r7
+	ldrh	r2, [r5, r8]
+	ldr	r1, .L625+192
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+196
-	ldrb	r2, [r4, #-1988]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+196
+	ldrb	r2, [r5, #-1988]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+200
-	ldr	r1, .L618+204
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+200
+	ldr	r1, .L625+204
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldrh	r3, [r4, r8]
-	ldr	r2, [r4, #-2016]
+	ldrh	r3, [r5, r8]
+	ldr	r2, [r5, #-2016]
 	add	r8, r8, #48
-	ldr	r1, .L618+208
+	ldr	r1, .L625+208
 	mov	r3, r3, asl #1
 	ldrh	r2, [r2, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+212
-	ldr	r1, .L618+216
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+212
+	ldr	r1, .L625+216
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+220
-	ldrb	r2, [r4, #-1942]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+220
+	ldrb	r2, [r5, #-1942]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldrh	r2, [r4, r8]
-	ldr	r1, .L618+224
-	add	r7, r7, r0
-	mov	r0, r7
+	ldrh	r2, [r5, r8]
+	ldr	r1, .L625+224
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+228
-	ldrb	r2, [r4, #-1940]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+228
+	ldrb	r2, [r5, #-1940]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+232
-	ldr	r1, .L618+236
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+232
+	ldr	r1, .L625+236
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldrh	r3, [r4, r8]
-	ldr	r2, [r4, #-2016]
+	ldrh	r3, [r5, r8]
+	ldr	r2, [r5, #-2016]
 	add	r8, r8, #188
-	ldr	r1, .L618+240
+	ldr	r1, .L625+240
 	mov	r3, r3, asl #1
 	ldrh	r2, [r2, r3]
-	add	r7, r7, r0
-	mov	r0, r7
-	bl	sprintf
-	ldr	r3, .L618+244
-	ldr	r1, .L618+248
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+252
-	ldrb	r2, [r4, #-1894]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+244
+	ldr	r1, .L625+248
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+256
-	ldr	r1, .L618+260
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+252
+	ldrb	r2, [r5, #-1894]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+264
-	ldrb	r2, [r4, #-1892]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+256
+	ldr	r1, .L625+260
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+268
-	ldr	r1, .L618+272
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+264
+	ldrb	r2, [r5, #-1892]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+276
-	ldr	r1, .L618+280
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+268
+	ldr	r1, .L625+272
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+284
-	ldrb	r2, [r4, #-1754]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r3, .L625+276
+	ldr	r1, .L625+280
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+288
-	ldrh	r2, [r4, r8]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+284
+	ldrb	r2, [r5, #-1754]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+292
-	ldrb	r2, [r4, #-1752]	@ zero_extendqisi2
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+288
+	ldrh	r2, [r5, r8]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+296
-	ldr	r1, .L618+300
-	ldrh	r2, [r4, r3]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+292
+	ldrb	r2, [r5, #-1752]	@ zero_extendqisi2
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, [r4, #-1624]
-	ldr	r3, [r5, #3840]
-	ldr	r2, [r4, #-1712]
+	ldr	r3, .L625+296
+	ldr	r1, .L625+300
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
+	bl	sprintf
+	ldr	r1, [r5, #-1624]
+	ldr	r3, [r6, #3840]
+	ldr	r2, [r5, #-1712]
 	str	r1, [sp, #0]
-	ldr	r1, [r4, #-1632]
+	ldr	r1, [r5, #-1632]
 	orr	r2, r3, r2, asl #8
 	str	r1, [sp, #4]
-	ldr	r1, .L618+304
-	ldr	r3, [r4, #-1628]
-	add	r7, r7, r0
-	mov	r0, r7
+	ldr	r1, .L625+304
+	ldr	r3, [r5, #-1628]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+308
-	ldr	r2, [r4, #-1636]
-	add	r5, r7, r0
-	mov	r0, r5
+	ldr	r1, .L625+308
+	ldr	r2, [r5, #-1636]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+312
-	ldr	r2, [r4, #-1612]
-	add	r5, r5, r0
-	mov	r0, r5
+	ldr	r1, .L625+312
+	ldr	r2, [r5, #-1612]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+316
-	ldr	r1, .L618+320
-	ldrh	r2, [r4, r3]
-	add	r5, r5, r0
-	mov	r0, r5
+	ldr	r3, .L625+316
+	ldr	r1, .L625+320
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+324
-	ldr	r1, .L618+328
-	ldrh	r2, [r4, r3]
-	add	r5, r5, r0
-	mov	r0, r5
+	ldr	r3, .L625+324
+	ldr	r1, .L625+328
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r1, .L618+332
-	ldr	r2, [r4, #-1192]
-	add	r5, r5, r0
-	mov	r0, r5
+	ldr	r1, .L625+332
+	ldr	r2, [r5, #-1192]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L618+336
-	ldr	r1, .L618+340
-	ldrh	r2, [r4, r3]
-	add	r5, r5, r0
-	mov	r0, r5
+	ldr	r3, .L625+336
+	ldr	r1, .L625+340
+	ldrh	r2, [r5, r3]
+	add	r4, r4, r0
+	mov	r0, r4
 	bl	sprintf
-	add	r5, r5, r0
+	add	r4, r4, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L618+344
+	ldr	r1, .L625+344
 	mov	r2, r0
-	mov	r0, r5
+	mov	r0, r4
 	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r0, [r4, r6]
+	add	r4, r4, r0
+	ldrh	r0, [r5, r7]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L618+348
+	ldr	r1, .L625+348
 	mov	r2, r0
-	mov	r0, r5
+	mov	r0, r4
 	bl	sprintf
-	ldrh	r3, [r4, r8]
+	ldrh	r3, [r5, r8]
 	movw	r2, #65535
 	cmp	r3, r2
-	add	r5, r5, r0
-	beq	.L611
-	ldr	r2, [r4, #-2016]
+	add	r4, r4, r0
+	beq	.L618
+	ldr	r2, [r5, #-2016]
 	mov	r3, r3, asl #1
-	mov	r0, r5
-	ldr	r1, .L618+352
+	mov	r0, r4
+	ldr	r1, .L625+352
 	ldrh	r2, [r2, r3]
 	bl	sprintf
-	add	r5, r5, r0
-.L611:
+	add	r4, r4, r0
+.L618:
 	mov	r0, #0
-	ldr	r4, .L618+32
+	ldr	r6, .L625+24
 	bl	List_get_gc_head_node
-	mov	r6, #0
-	movw	r8, #65535
-	mov	r9, #6
+	ldr	r8, .L625
+	mov	r5, #0
+	movw	r9, #65535
 	uxth	r3, r0
-.L613:
-	cmp	r3, r8
-	beq	.L612
-	ldr	r1, [r4, #-2016]
+.L620:
+	cmp	r3, r9
+	beq	.L619
+	ldr	r1, [r6, #-2016]
 	mov	r2, r3, asl #1
-	mul	r7, r9, r3
-	mov	r0, r5
+	mov	r7, #6
+	mov	r0, r4
+	mul	r7, r7, r3
 	ldrh	r1, [r1, r2]
 	str	r1, [sp, #0]
-	ldr	r1, [r4, #-2024]
+	ldr	r1, [r6, #-2024]
 	add	r1, r1, r7
 	ldrh	r1, [r1, #4]
 	str	r1, [sp, #4]
-	ldr	r1, [r4, #-2080]
+	ldr	r1, [r8, #4048]
 	ldrh	r2, [r1, r2]
-	ldr	r1, .L618+356
+	ldr	r1, .L625+356
 	str	r2, [sp, #8]
-	mov	r2, r6
+	mov	r2, r5
 	bl	sprintf
-	add	r6, r6, #1
-	ldr	r3, [r4, #-2024]
-	cmp	r6, #16
+	add	r5, r5, #1
+	ldr	r3, [r6, #-2024]
+	cmp	r5, #16
 	ldrh	r3, [r3, r7]
-	add	r5, r5, r0
-	bne	.L613
-.L612:
-	ldr	r6, .L618+32
-	mov	r4, #0
-	movw	r8, #65535
-	mov	r9, #6
+	add	r4, r4, r0
+	bne	.L620
+.L619:
+	ldr	r6, .L625+24
+	mov	r5, #0
+	ldr	r8, .L625
+	movw	r9, #65535
 	ldr	r2, [r6, #-2004]
 	ldr	r3, [r6, #-2024]
 	rsb	r3, r3, r2
-	ldr	r2, .L618+360
+	ldr	r2, .L625+360
 	mov	r3, r3, asr #1
 	mul	r3, r2, r3
 	uxth	r3, r3
-.L615:
-	cmp	r3, r8
-	beq	.L614
-	mul	r7, r9, r3
+.L622:
+	cmp	r3, r9
+	beq	.L621
+	mov	r7, #6
 	ldr	r2, [r6, #-2024]
-	mov	r0, r5
+	mul	r7, r7, r3
+	mov	r0, r4
 	add	r2, r2, r7
 	ldrh	r2, [r2, #4]
 	str	r2, [sp, #0]
 	mov	r2, r3, asl #1
-	ldr	r1, [r6, #-2080]
+	ldr	r1, [r8, #4048]
 	ldrh	r2, [r1, r2]
-	ldr	r1, .L618+364
+	ldr	r1, .L625+364
 	str	r2, [sp, #4]
-	mov	r2, r4
+	mov	r2, r5
 	bl	sprintf
-	add	r4, r4, #1
+	add	r5, r5, #1
 	ldr	r3, [r6, #-2024]
-	cmp	r4, #4
+	cmp	r5, #4
 	ldrh	r3, [r3, r7]
-	add	r5, r5, r0
-	bne	.L615
-.L614:
-	rsb	r0, sl, r5
-.L610:
+	add	r4, r4, r0
+	bne	.L622
+.L621:
+	rsb	r0, sl, r4
 	add	sp, sp, #32
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L619:
+.L626:
 	.align	2
-.L618:
+.L625:
 	.word	.LANCHOR0
 	.word	.LC8
 	.word	.LC9
 	.word	.LC10
 	.word	.LANCHOR1
 	.word	.LC11
-	.word	-1996
-	.word	.LC12
 	.word	.LANCHOR2
+	.word	-2000
+	.word	.LC12
+	.word	-1996
 	.word	.LC13
 	.word	.LC14
 	.word	.LC15
@@ -5246,7 +5309,6 @@ FtlPrintInfo2buf:
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
-	.word	-2000
 	.word	.LC27
 	.word	.LC28
 	.word	.LC29
@@ -5327,8 +5389,8 @@ ftl_proc_ftl_read:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r1, .L621
-	ldr	r2, .L621+4
+	ldr	r1, .L628
+	ldr	r2, .L628+4
 	bl	sprintf
 	add	r5, r4, r0
 	mov	r0, r5
@@ -5336,9 +5398,9 @@ ftl_proc_ftl_read:
 	add	r0, r5, r0
 	rsb	r0, r4, r0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L622:
+.L629:
 	.align	2
-.L621:
+.L628:
 	.word	.LC78
 	.word	.LC79
 	.fnend
@@ -5350,7 +5412,7 @@ GetSwlReplaceBlock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L648
+	ldr	r3, .L655
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.pad #20
@@ -5358,28 +5420,28 @@ GetSwlReplaceBlock:
 	ldr	r1, [r3, #-1788]
 	ldr	r2, [r3, #-1780]
 	cmp	r1, r2
-	bcs	.L624
-	ldr	r0, .L648+4
+	bcs	.L631
+	ldr	r0, .L655+4
 	mov	r1, #3856
 	mov	r2, #0
 	str	r2, [r3, #-1796]
 	ldrh	r1, [r0, r1]
-	ldr	r0, [r3, #-2080]
-	b	.L625
-.L626:
+	ldr	r0, [r0, #4048]
+	b	.L632
+.L633:
 	ldrh	lr, [r0], #2
 	add	r2, r2, #1
 	ldr	ip, [r3, #-1796]
 	add	ip, lr, ip
 	str	ip, [r3, #-1796]
-.L625:
+.L632:
 	cmp	r2, r1
-	ldr	r4, .L648
-	bcc	.L626
+	ldr	r4, .L655
+	bcc	.L633
 	ldr	r5, [r4, #-1796]
 	mov	r0, r5
 	bl	__aeabi_uidiv
-	ldr	r2, .L648+4
+	ldr	r2, .L655+4
 	movw	r3, #3906
 	ldrh	r1, [r2, r3]
 	str	r0, [r4, #-1788]
@@ -5387,48 +5449,48 @@ GetSwlReplaceBlock:
 	rsb	r0, r0, r5
 	bl	__aeabi_uidiv
 	str	r0, [r4, #-1796]
-	b	.L627
-.L624:
+	b	.L634
+.L631:
 	ldr	r2, [r3, #-1784]
 	cmp	r1, r2
-	bls	.L627
+	bls	.L634
 	add	r2, r2, #1
-	ldr	r4, .L648+4
-	str	r2, [r3, #-1784]
 	mov	ip, #3856
-	mov	r2, #0
-	b	.L628
-.L629:
-	ldr	r0, [r3, #-2080]
-	mov	r1, r2, asl #1
-	add	r2, r2, #1
-	ldrh	r5, [r0, r1]
-	add	r5, r5, #1
-	strh	r5, [r0, r1]	@ movhi
-.L628:
-	ldrh	r1, [r4, ip]
-	cmp	r2, r1
-	bcc	.L629
-.L627:
-	ldr	r3, .L648
+	str	r2, [r3, #-1784]
+	mov	r3, #0
+	ldr	r2, .L655+4
+	b	.L635
+.L636:
+	ldr	r0, [r2, #4048]
+	mov	r1, r3, asl #1
+	add	r3, r3, #1
+	ldrh	r4, [r0, r1]
+	add	r4, r4, #1
+	strh	r4, [r0, r1]	@ movhi
+.L635:
+	ldrh	r1, [r2, ip]
+	cmp	r3, r1
+	bcc	.L636
+.L634:
+	ldr	r3, .L655
 	ldr	r6, [r3, #-1780]
 	ldr	r5, [r3, #-1788]
 	add	r2, r6, #256
 	cmp	r2, r5
 	mov	r2, r3
-	bls	.L630
+	bls	.L637
 	ldr	r3, [r3, #-1784]
 	add	r1, r6, #768
 	cmp	r1, r3
-	bls	.L630
-	ldr	r3, .L648+4
+	bls	.L637
+	ldr	r3, .L655+4
 	ldr	r3, [r3, #3840]
 	cmp	r3, #0
-	beq	.L647
+	beq	.L654
 	cmp	r6, #30
-	bhi	.L647
-.L630:
-	ldr	r3, .L648+8
+	bhi	.L654
+.L637:
+	ldr	r3, .L655+8
 	ldrh	r0, [r2, r3]
 	add	r0, r0, r0, asl #1
 	ubfx	r0, r0, #2, #16
@@ -5436,104 +5498,105 @@ GetSwlReplaceBlock:
 	add	r3, r6, #64
 	cmp	r0, r3
 	mov	r8, r0
-	bcs	.L632
+	bcs	.L639
 	cmp	r6, #30
-	bhi	.L647
-.L632:
-	ldr	r2, .L648
-	ldr	r3, [r2, #-2020]
+	bhi	.L654
+.L639:
+	ldr	r1, .L655
+	ldr	r3, [r1, #-2020]
 	cmp	r3, #0
-	beq	.L647
-	ldr	r0, .L648+4
-	mov	r1, #3856
+	beq	.L654
+	ldr	r2, .L655+4
+	mov	r0, #3856
 	movw	r7, #65535
 	mov	r4, r7
 	mov	fp, r7
-	ldrh	sl, [r0, r1]
-	ldr	r0, [r2, #-2024]
-	ldr	r1, [r2, #-2080]
+	ldrh	sl, [r2, r0]
+	ldr	r0, [r1, #-2024]
+	ldr	r1, [r2, #4048]
 	mov	r2, #0
-	b	.L633
-.L636:
+	b	.L640
+.L643:
 	add	r2, r2, #1
 	uxth	r2, r2
 	cmp	r2, sl
-	bhi	.L647
+	bhi	.L654
 	ldrh	ip, [r3, #4]
 	cmp	ip, #0
-	beq	.L634
+	beq	.L641
 	rsb	r3, r0, r3
-	ldr	ip, .L648+12
+	ldr	ip, .L655+12
 	mov	r3, r3, asr #1
 	mul	r3, ip, r3
 	uxth	r3, r3
 	mov	ip, r3, asl #1
 	ldrh	ip, [r1, ip]
 	cmp	ip, r6
-	bls	.L644
+	bls	.L651
 	cmp	ip, r7
 	movcc	r7, ip
 	movcc	r4, r3
-.L634:
+.L641:
 	mov	ip, #6
 	mla	r3, ip, r9, r0
-.L633:
+.L640:
 	ldrh	r9, [r3, #0]
 	cmp	r9, fp
-	bne	.L636
-	b	.L635
-.L644:
+	bne	.L643
+	b	.L642
+.L651:
 	mov	r4, r3
-.L635:
+.L642:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L631
+	beq	.L638
 	mov	r9, r4, asl #1
 	ldrh	sl, [r1, r9]
 	cmp	sl, r6
-	bls	.L637
+	bls	.L644
 	bl	GetFreeBlockMinEraseCount
 	cmp	r0, r6
-	ldrhi	r3, .L648
+	ldrhi	r3, .L655
 	strhi	r7, [r3, #-1780]
-.L637:
+.L644:
 	cmp	sl, r5
-	bcs	.L647
+	bcs	.L654
 	add	r3, sl, #128
 	cmp	r8, r3
-	ble	.L647
+	ble	.L654
 	add	r3, sl, #256
-	ldr	r6, .L648
+	ldr	r6, .L655
 	cmp	r3, r5
-	bcc	.L638
+	bcc	.L645
 	ldr	r3, [r6, #-1784]
 	add	sl, sl, #768
 	cmp	sl, r3
-	bcs	.L647
-.L638:
+	bcs	.L654
+.L645:
 	ldr	r3, [r6, #-2016]
 	mov	r1, r4
-	ldr	r0, .L648+16
+	ldr	r0, .L655+16
 	mov	r2, r5
 	ldrh	r3, [r3, r9]
 	str	r3, [sp, #0]
-	ldr	r3, [r6, #-2080]
+	ldr	r3, .L655+4
+	ldr	r3, [r3, #4048]
 	ldrh	r3, [r3, r9]
 	stmib	sp, {r3, r8}
 	ldr	r3, [r6, #-1784]
 	bl	printk
 	mov	r3, #1
 	str	r3, [r6, #-1184]
-	b	.L631
-.L647:
+	b	.L638
+.L654:
 	movw	r4, #65535
-.L631:
+.L638:
 	mov	r0, r4
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L649:
+.L656:
 	.align	2
-.L648:
+.L655:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	-2000
@@ -5552,19 +5615,19 @@ free_data_superblock:
 	cmp	r0, r2
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	beq	.L651
-	ldr	r2, .L652
+	beq	.L658
+	ldr	r2, .L659
 	mov	r3, r0, asl #1
 	mov	r1, #0
 	ldr	r2, [r2, #-2016]
 	strh	r1, [r2, r3]	@ movhi
 	bl	INSERT_FREE_LIST
-.L651:
+.L658:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L653:
+.L660:
 	.align	2
-.L652:
+.L659:
 	.word	.LANCHOR2
 	.fnend
 	.size	free_data_superblock, .-free_data_superblock
@@ -5575,19 +5638,19 @@ FtlGcBufInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L662
+	ldr	r2, .L669
 	mov	r3, #0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	movw	sl, #3848
 	str	r3, [r2, #-1180]
 	mov	r8, #12
-	ldr	r0, .L662+4
+	ldr	r0, .L669+4
 	mov	r7, #1
 	movw	r6, #3926
 	movw	fp, #3928
-	b	.L655
-.L656:
+	b	.L662
+.L663:
 	mul	r1, r8, r3
 	ldr	r4, [r2, #-1176]
 	add	ip, r4, r1
@@ -5621,12 +5684,12 @@ FtlGcBufInit:
 	str	r1, [ip, #8]
 	ldr	r1, [r4, #4]
 	str	r1, [ip, #12]
-.L655:
+.L662:
 	ldrh	r1, [r0, sl]
 	cmp	r3, r1
-	bcc	.L656
-	b	.L661
-.L658:
+	bcc	.L663
+	b	.L668
+.L665:
 	mul	r2, r8, r1
 	ldr	r4, [r3, #-1176]
 	add	r0, r4, r2
@@ -5653,22 +5716,22 @@ FtlGcBufInit:
 	bic	r2, r2, #3
 	add	r2, r4, r2
 	str	r2, [r0, #4]
-	b	.L660
-.L661:
-	ldr	r3, .L662
+	b	.L667
+.L668:
+	ldr	r3, .L669
 	mov	r8, #12
-	ldr	ip, .L662+4
+	ldr	ip, .L669+4
 	mov	r7, #0
 	movw	r6, #3926
 	movw	r5, #3928
-.L660:
+.L667:
 	ldr	r2, [r3, #-1160]
 	cmp	r1, r2
-	bcc	.L658
+	bcc	.L665
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L663:
+.L670:
 	.align	2
-.L662:
+.L669:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.fnend
@@ -5680,7 +5743,7 @@ FtlGcBufFree:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L671
+	ldr	r3, .L678
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r5, #36
@@ -5689,33 +5752,33 @@ FtlGcBufFree:
 	ldr	ip, [r3, #-1176]
 	mov	r3, #0
 	mov	r4, r3
-	b	.L665
-.L668:
+	b	.L672
+.L675:
 	mul	sl, fp, r2
 	add	r8, ip, sl
 	ldr	r9, [ip, sl]
 	ldr	sl, [r7, #8]
 	cmp	r9, sl
 	streq	r4, [r8, #8]
-	beq	.L667
-.L666:
+	beq	.L674
+.L673:
 	add	r2, r2, #1
 	uxth	r2, r2
-.L670:
+.L677:
 	cmp	r2, r6
-	bcc	.L668
-.L667:
+	bcc	.L675
+.L674:
 	add	r3, r3, #1
 	uxth	r3, r3
-.L665:
+.L672:
 	cmp	r3, r1
 	ldmcsfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 	mla	r7, r5, r3, r0
 	mov	r2, #0
-	b	.L670
-.L672:
+	b	.L677
+.L679:
 	.align	2
-.L671:
+.L678:
 	.word	.LANCHOR2
 	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -5726,7 +5789,7 @@ FtlGcBufAlloc:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L680
+	ldr	r3, .L687
 	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
 	.save {r4, r5, r6, r7, r8, sl, lr}
 	mov	r6, #12
@@ -5735,38 +5798,38 @@ FtlGcBufAlloc:
 	ldr	r7, [r3, #-1176]
 	mov	r4, #36
 	mov	r3, #0
-	b	.L674
-.L677:
+	b	.L681
+.L684:
 	mla	ip, r6, r2, r7
 	ldr	sl, [ip, #8]
 	cmp	sl, #0
-	bne	.L675
+	bne	.L682
 	mla	r2, r4, r3, r0
 	ldr	sl, [ip, #0]
 	str	r5, [ip, #8]
 	str	sl, [r2, #8]
 	ldr	ip, [ip, #4]
 	str	ip, [r2, #12]
-	b	.L676
-.L675:
+	b	.L683
+.L682:
 	add	r2, r2, #1
 	uxth	r2, r2
-	b	.L678
-.L679:
+	b	.L685
+.L686:
 	mov	r2, #0
-.L678:
+.L685:
 	cmp	r2, r8
-	bcc	.L677
-.L676:
+	bcc	.L684
+.L683:
 	add	r3, r3, #1
 	uxth	r3, r3
-.L674:
+.L681:
 	cmp	r3, r1
-	bcc	.L679
+	bcc	.L686
 	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L681:
+.L688:
 	.align	2
-.L680:
+.L687:
 	.word	.LANCHOR2
 	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -5778,29 +5841,29 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L687
-	ldr	r2, .L687+4
+	ldr	r3, .L694
+	ldr	r2, .L694+4
 	ldrh	r1, [r3, r2]
 	ldr	r2, [r3, #-1152]
 	mov	r3, #0
-	b	.L683
-.L685:
+	b	.L690
+.L692:
 	ldrh	ip, [r2], #2
 	cmp	ip, r0
-	beq	.L686
+	beq	.L693
 	add	r3, r3, #1
 	uxth	r3, r3
-.L683:
+.L690:
 	cmp	r3, r1
-	bne	.L685
+	bne	.L692
 	mov	r0, #0
 	bx	lr
-.L686:
+.L693:
 	mov	r0, #1
 	bx	lr
-.L688:
+.L695:
 	.align	2
-.L687:
+.L694:
 	.word	.LANCHOR2
 	.word	-1156
 	.fnend
@@ -5819,33 +5882,33 @@ FtlGcUpdatePage:
 	mov	r5, r1
 	mov	r6, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L693
-	ldr	r2, .L693+4
+	ldr	r3, .L700
+	ldr	r2, .L700+4
 	ldrh	ip, [r3, r2]
 	ldr	r2, [r3, #-1152]
 	mov	r3, #0
 	mov	r1, r2
-	b	.L690
-.L692:
+	b	.L697
+.L699:
 	ldrh	r7, [r1], #2
 	cmp	r7, r0
-	beq	.L691
+	beq	.L698
 	add	r3, r3, #1
 	uxth	r3, r3
-.L690:
+.L697:
 	cmp	r3, ip
-	bne	.L692
+	bne	.L699
 	mov	r3, r3, asl #1
 	strh	r0, [r2, r3]	@ movhi
-	ldr	r2, .L693
-	ldr	r3, .L693+4
+	ldr	r2, .L700
+	ldr	r3, .L700+4
 	ldrh	r1, [r2, r3]
 	add	r1, r1, #1
 	strh	r1, [r2, r3]	@ movhi
-.L691:
-	ldr	r3, .L693
+.L698:
+	ldr	r3, .L700
 	mov	r0, #12
-	ldr	r2, .L693+8
+	ldr	r2, .L700+8
 	ldrh	r1, [r3, r2]
 	mul	r1, r0, r1
 	ldr	r0, [r3, #-1148]
@@ -5856,9 +5919,9 @@ FtlGcUpdatePage:
 	add	r1, r1, #1
 	strh	r1, [r3, r2]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L694:
+.L701:
 	.align	2
-.L693:
+.L700:
 	.word	.LANCHOR2
 	.word	-1156
 	.word	-1144
@@ -5875,29 +5938,29 @@ FtlGcRefreshOpenBlock:
 	.save {r3, r4, r5, lr}
 	mov	r4, r0
 	mov	r1, r4
-	ldr	r0, .L698
+	ldr	r0, .L705
 	bl	printk
-	ldr	r3, .L698+4
-	ldr	ip, .L698+8
+	ldr	r3, .L705+4
+	ldr	ip, .L705+8
 	ldrh	r5, [r3, ip]
 	cmp	r5, r4
-	beq	.L696
-	ldr	r2, .L698+12
+	beq	.L703
+	ldr	r2, .L705+12
 	ldrh	r0, [r3, r2]
 	cmp	r0, r4
-	beq	.L696
+	beq	.L703
 	movw	r1, #65535
 	cmp	r5, r1
 	streqh	r4, [r3, ip]	@ movhi
-	beq	.L696
+	beq	.L703
 	cmp	r0, r1
 	streqh	r4, [r3, r2]	@ movhi
-.L696:
+.L703:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L699:
+.L706:
 	.align	2
-.L698:
+.L705:
 	.word	.LC81
 	.word	.LANCHOR2
 	.word	-1142
@@ -5915,29 +5978,29 @@ FtlGcRefreshBlock:
 	.save {r3, r4, r5, lr}
 	mov	r4, r0
 	mov	r1, r4
-	ldr	r0, .L703
+	ldr	r0, .L710
 	bl	printk
-	ldr	r3, .L703+4
-	ldr	ip, .L703+8
+	ldr	r3, .L710+4
+	ldr	ip, .L710+8
 	ldrh	r5, [r3, ip]
 	cmp	r5, r4
-	beq	.L701
-	ldr	r2, .L703+12
+	beq	.L708
+	ldr	r2, .L710+12
 	ldrh	r0, [r3, r2]
 	cmp	r0, r4
-	beq	.L701
+	beq	.L708
 	movw	r1, #65535
 	cmp	r5, r1
 	streqh	r4, [r3, ip]	@ movhi
-	beq	.L701
+	beq	.L708
 	cmp	r0, r1
 	streqh	r4, [r3, r2]	@ movhi
-.L701:
+.L708:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L704:
+.L711:
 	.align	2
-.L703:
+.L710:
 	.word	.LC81
 	.word	.LANCHOR2
 	.word	-1142
@@ -5955,54 +6018,54 @@ FtlGcMarkBadPhyBlk:
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	bl	P2V_block_in_plane
-	ldr	r7, .L710
+	ldr	r7, .L717
 	mov	r2, r4
-	ldr	r6, .L710+4
+	ldr	r6, .L717+4
 	ldrh	r1, [r7, r6]
 	mov	r5, r0
-	ldr	r0, .L710+8
+	ldr	r0, .L717+8
 	bl	printk
 	mov	r0, r5
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L710+12
-	ldr	r3, [r3, #3840]
-	cmp	r3, #0
-	beq	.L706
-	ldr	r3, [r7, #-2080]
+	ldr	r3, .L717+12
+	ldr	r2, [r3, #3840]
+	cmp	r2, #0
+	beq	.L713
+	ldr	r3, [r3, #4048]
 	mov	r5, r5, asl #1
 	ldrh	r2, [r3, r5]
 	cmp	r2, #29
 	subhi	r2, r2, #30
 	strhih	r2, [r3, r5]	@ movhi
-.L706:
+.L713:
 	ldrh	r1, [r7, r6]
 	mov	r3, #0
-	ldr	r2, .L710+16
-	b	.L707
-.L709:
+	ldr	r2, .L717+16
+	b	.L714
+.L716:
 	ldrh	r0, [r2, #2]!
 	cmp	r0, r4
-	beq	.L708
+	beq	.L715
 	add	r3, r3, #1
 	uxth	r3, r3
-.L707:
+.L714:
 	cmp	r3, r1
-	bne	.L709
+	bne	.L716
 	cmp	r3, #15
-	bhi	.L708
-	ldr	r2, .L710
+	bhi	.L715
+	ldr	r2, .L717
 	add	r1, r2, r3, asl #1
 	add	r3, r3, #1
 	sub	r1, r1, #1136
 	strh	r4, [r1, #0]	@ movhi
-	ldr	r1, .L710+4
+	ldr	r1, .L717+4
 	strh	r3, [r2, r1]	@ movhi
-.L708:
+.L715:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L711:
+.L718:
 	.align	2
-.L710:
+.L717:
 	.word	.LANCHOR2
 	.word	-1138
 	.word	.LC82
@@ -6019,18 +6082,18 @@ FtlGcReFreshBadBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-	ldr	r2, .L715
-	ldr	r3, .L715+4
+	ldr	r2, .L722
+	ldr	r3, .L722+4
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	beq	.L713
-	ldr	r1, .L715+8
+	beq	.L720
+	ldr	r1, .L722+8
 	ldrh	r0, [r3, r1]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L713
-	ldr	r4, .L715+12
-	ldr	r5, .L715+4
+	bne	.L720
+	ldr	r4, .L722+12
+	ldr	r5, .L722+4
 	ldrh	r1, [r3, r4]
 	cmp	r1, r2
 	movcs	r2, #0
@@ -6044,12 +6107,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r5, r4]
 	add	r3, r3, #1
 	strh	r3, [r5, r4]	@ movhi
-.L713:
+.L720:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L716:
+.L723:
 	.align	2
-.L715:
+.L722:
 	.word	-1138
 	.word	.LANCHOR2
 	.word	-1142
@@ -6067,9 +6130,9 @@ ftl_memset:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	mov	r4, r0
-	beq	.L718
+	beq	.L725
 	bl	memset
-.L718:
+.L725:
 	mov	r0, r4
 	ldmfd	sp!, {r4, pc}
 	.fnend
@@ -6084,11 +6147,11 @@ FtlGcPageVarInit:
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r3, #0
-	ldr	r4, .L720
+	ldr	r4, .L727
 	mov	r5, #3920
-	ldr	r2, .L720+4
+	ldr	r2, .L727+4
 	mov	r1, #255
-	ldr	r6, .L720+8
+	ldr	r6, .L727+8
 	ldr	r0, [r4, #-1152]
 	strh	r3, [r4, r2]	@ movhi
 	add	r2, r2, #12
@@ -6104,9 +6167,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	ldmfd	sp!, {r4, r5, r6, lr}
 	b	FtlGcBufInit
-.L721:
+.L728:
 	.align	2
-.L720:
+.L727:
 	.word	.LANCHOR2
 	.word	-1156
 	.word	.LANCHOR0
@@ -6122,9 +6185,9 @@ SupperBlkListInit:
 	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	movw	r3, #3858
-	ldr	r7, .L732
+	ldr	r7, .L739
 	mov	r2, #6
-	ldr	r4, .L732+4
+	ldr	r4, .L739+4
 	mov	r1, #0
 	mov	r6, #0
 	ldrh	r3, [r7, r3]
@@ -6132,7 +6195,7 @@ SupperBlkListInit:
 	ldr	r0, [r4, #-2024]
 	mul	r2, r2, r3
 	bl	ftl_memset
-	ldr	r3, .L732+8
+	ldr	r3, .L739+8
 	str	r6, [r4, #-2004]
 	str	r6, [r4, #-2020]
 	strh	r6, [r4, r3]	@ movhi
@@ -6142,8 +6205,8 @@ SupperBlkListInit:
 	add	r3, r3, #900
 	strh	r6, [r4, r3]	@ movhi
 	mov	r4, r6
-	b	.L723
-.L725:
+	b	.L730
+.L732:
 	add	r2, r7, r2
 	mov	r1, fp
 	add	r9, r9, #1
@@ -6157,84 +6220,84 @@ SupperBlkListInit:
 	ldreqh	r2, [r7, r3]
 	addeq	r5, r5, r2
 	uxtheq	r5, r5
-	b	.L730
-.L731:
+	b	.L737
+.L738:
 	mov	r5, #0
 	uxth	fp, r4
 	mov	r9, r5
 	movw	r3, #3916
-.L730:
+.L737:
 	movw	r0, #3848
 	sxth	r2, r9
 	ldrh	r1, [r7, r0]
 	cmp	r2, r1
-	blt	.L725
+	blt	.L732
 	cmp	r5, #0
-	ldr	r9, .L732+4
-	beq	.L726
+	ldr	r9, .L739+4
+	beq	.L733
 	sxth	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	uxth	r5, r0
-	b	.L727
-.L726:
+	b	.L734
+.L733:
 	sxth	r3, r4
 	ldr	r2, [r9, #-2016]
 	mvn	r1, #0
 	mov	r3, r3, asl #1
 	strh	r1, [r2, r3]	@ movhi
-.L727:
+.L734:
 	sxth	r1, r4
 	ldr	r0, [r9, #-2024]
-	ldr	r3, .L732+4
+	ldr	r3, .L739+4
 	mov	r2, r1, asl #1
 	add	r1, r2, r1
 	add	r1, r0, r1, asl #1
 	strh	r5, [r1, #4]	@ movhi
-	ldr	r1, .L732+12
+	ldr	r1, .L739+12
 	ldrh	r1, [r9, r1]
 	cmp	r8, r1
-	beq	.L728
-	ldr	r1, .L732+16
+	beq	.L735
+	ldr	r1, .L739+16
 	ldrh	r1, [r3, r1]
 	cmp	r8, r1
-	beq	.L728
-	ldr	r1, .L732+20
+	beq	.L735
+	ldr	r1, .L739+20
 	ldrh	r1, [r3, r1]
 	cmp	r8, r1
-	beq	.L728
+	beq	.L735
 	ldr	r3, [r3, #-2016]
 	uxth	r0, r4
 	ldrh	r3, [r3, r2]
 	cmp	r3, #0
-	bne	.L729
+	bne	.L736
 	add	r6, r6, #1
 	uxth	r6, r6
 	bl	INSERT_FREE_LIST
-	b	.L728
-.L729:
+	b	.L735
+.L736:
 	add	sl, sl, #1
 	uxth	sl, sl
 	bl	INSERT_DATA_LIST
-.L728:
+.L735:
 	add	r4, r4, #1
 	uxth	r4, r4
-.L723:
+.L730:
 	mov	r3, #3856
 	sxth	r8, r4
 	ldrh	r3, [r7, r3]
 	cmp	r8, r3
-	blt	.L731
-	ldr	r3, .L732+4
+	blt	.L738
+	ldr	r3, .L739+4
 	mov	r0, #0
-	ldr	r2, .L732+8
+	ldr	r2, .L739+8
 	strh	sl, [r3, r2]	@ movhi
 	add	r2, r2, #8
 	strh	r6, [r3, r2]	@ movhi
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L733:
+.L740:
 	.align	2
-.L732:
+.L739:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-2008
@@ -6253,9 +6316,9 @@ FtlL2PDataInit:
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r1, #0
-	ldr	r4, .L737
+	ldr	r4, .L744
 	movw	r6, #3926
-	ldr	r5, .L737+4
+	ldr	r5, .L744+4
 	movw	r7, #3954
 	mov	r8, #12
 	ldr	r2, [r4, #3944]
@@ -6271,8 +6334,8 @@ FtlL2PDataInit:
 	mov	r2, #0
 	mov	ip, r2
 	mvn	r0, #0
-	b	.L735
-.L736:
+	b	.L742
+.L743:
 	mul	r3, r8, r2
 	ldr	r1, [r5, #-1852]
 	add	sl, r1, r3
@@ -6288,22 +6351,22 @@ FtlL2PDataInit:
 	bic	r1, r1, #3
 	add	r1, sl, r1
 	str	r1, [r3, #8]
-.L735:
+.L742:
 	ldrh	r3, [r4, r7]
-	ldr	r1, .L737
+	ldr	r1, .L744
 	cmp	r3, r2
-	ldr	r3, .L737+4
-	bhi	.L736
-	ldr	r0, .L737+8
+	ldr	r3, .L744+4
+	bhi	.L743
+	ldr	r0, .L744+8
 	mvn	r2, #0
 	ldr	ip, [r1, #3944]
 	strh	r2, [r3, r0]	@ movhi
-	ldr	r0, .L737+12
+	ldr	r0, .L744+12
 	strh	r2, [r3, r0]	@ movhi
 	add	r0, r0, #10
 	strh	ip, [r3, r0]	@ movhi
 	sub	r0, r0, #6
-	ldr	ip, .L737+16
+	ldr	ip, .L744+16
 	strh	ip, [r3, r0]	@ movhi
 	add	r0, r0, #40
 	ldrh	ip, [r3, r0]
@@ -6311,7 +6374,7 @@ FtlL2PDataInit:
 	strh	ip, [r3, r0]	@ movhi
 	mov	r0, #3952
 	ldrh	r0, [r1, r0]
-	ldr	r1, .L737+20
+	ldr	r1, .L744+20
 	strh	r0, [r3, r1]	@ movhi
 	ldr	r1, [r3, #-1040]
 	str	r1, [r3, #-1076]
@@ -6321,12 +6384,12 @@ FtlL2PDataInit:
 	str	r1, [r3, #-1068]
 	ldr	r1, [r3, #-1032]
 	str	r1, [r3, #-1064]
-	ldr	r1, .L737+24
+	ldr	r1, .L744+24
 	strh	r2, [r3, r1]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L738:
+.L745:
 	.align	2
-.L737:
+.L744:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1086
@@ -6355,13 +6418,13 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	mov	r3, #0
-	b	.L740
-.L744:
+	b	.L747
+.L751:
 	ldr	r0, [r7, r3, asl #2]
 	mov	r2, #0
 	ubfx	r0, r0, #10, #16
-	b	.L741
-.L743:
+	b	.L748
+.L750:
 	mov	r1, r2, asl #1
 	add	r2, r2, #1
 	ldrh	ip, [r6, r1]
@@ -6370,42 +6433,42 @@ ftl_free_no_use_map_blk:
 	ldreqh	ip, [r5, r1]
 	addeq	ip, ip, #1
 	streqh	ip, [r5, r1]	@ movhi
-.L741:
+.L748:
 	ldrh	r1, [r4, #10]
 	cmp	r1, r2
-	bhi	.L743
+	bhi	.L750
 	add	r3, r3, #1
 	uxth	r3, r3
-.L740:
+.L747:
 	ldrh	r2, [r4, #6]
 	cmp	r2, r3
-	bhi	.L744
+	bhi	.L751
 	mov	sl, #0
 	ldrh	fp, [r5, #0]
 	mov	r7, sl
-	ldr	r3, .L750
+	ldr	r3, .L757
 	movw	r2, #3918
-	b	.L745
-.L749:
+	b	.L752
+.L756:
 	ldrh	r1, [r4, #0]
 	cmp	r1, r7
-	bne	.L746
+	bne	.L753
 	ldrh	r0, [r4, #2]
 	ldrh	r1, [r3, r2]
 	cmp	r0, r1
 	movcc	r0, r7, asl #1
 	strcch	r1, [r5, r0]	@ movhi
-.L746:
+.L753:
 	mov	r9, r7, asl #1
 	ldrh	r8, [r5, r9]
 	cmp	fp, r8
 	movhi	sl, r7
 	movhi	fp, r8
 	cmp	r8, #0
-	bne	.L748
+	bne	.L755
 	ldrh	r0, [r6, r9]
 	cmp	r0, #0
-	beq	.L748
+	beq	.L755
 	mov	r1, #1
 	stmia	sp, {r2, r3}
 	bl	FtlFreeSysBlkQueueIn
@@ -6414,18 +6477,18 @@ ftl_free_no_use_map_blk:
 	ldrh	r1, [r4, #8]
 	sub	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.L748:
+.L755:
 	add	r7, r7, #1
 	uxth	r7, r7
-.L745:
+.L752:
 	ldrh	r1, [r4, #10]
 	cmp	r1, r7
-	bhi	.L749
+	bhi	.L756
 	mov	r0, sl
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L751:
+.L758:
 	.align	2
-.L750:
+.L757:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -6436,8 +6499,8 @@ FtlFreeSysBlkQueueInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L753
-	movw	r2, #4042
+	ldr	r3, .L760
+	movw	r2, #4058
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	mov	r4, #0
@@ -6447,16 +6510,16 @@ FtlFreeSysBlkQueueInit:
 	strh	r4, [r3, r2]	@ movhi
 	add	r2, r2, #2
 	strh	r4, [r3, r2]	@ movhi
-	movw	r2, #4040
+	movw	r2, #4056
 	strh	r0, [r3, r2]	@ movhi
-	add	r0, r3, #4048
+	add	r0, r3, #4064
 	mov	r2, #2048
 	bl	ftl_memset
 	mov	r0, r4
 	ldmfd	sp!, {r4, pc}
-.L754:
+.L761:
 	.align	2
-.L753:
+.L760:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
@@ -6468,10 +6531,10 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L756
+	ldr	r3, .L763
 	movw	r2, #3980
 	mvn	r1, #0
-	ldr	r0, .L756+4
+	ldr	r0, .L763+4
 	strh	r1, [r3, r2]	@ movhi
 	add	r2, r2, #6
 	mov	r1, #0
@@ -6479,9 +6542,9 @@ FtlBbtMemInit:
 	mov	r1, #255
 	mov	r2, #16
 	b	ftl_memset
-.L757:
+.L764:
 	.align	2
-.L756:
+.L763:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3992
 	.fnend
@@ -6493,8 +6556,8 @@ FtlBbt2Bitmap:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L762
-	ldr	r2, .L762+4
+	ldr	r3, .L769
+	ldr	r2, .L769+4
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
@@ -6507,7 +6570,7 @@ FtlBbt2Bitmap:
 	mov	r3, #0
 	movw	ip, #65535
 	mov	r0, #1
-.L760:
+.L767:
 	ldrh	r2, [r5, r3]
 	cmp	r2, ip
 	ldmeqfd	sp!, {r4, r5, r6, pc}
@@ -6518,11 +6581,11 @@ FtlBbt2Bitmap:
 	ldr	r6, [r4, r1, asl #2]
 	orr	r2, r6, r0, asl r2
 	str	r2, [r4, r1, asl #2]
-	bne	.L760
+	bne	.L767
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L763:
+.L770:
 	.align	2
-.L762:
+.L769:
 	.word	-1028
 	.word	.LANCHOR2
 	.fnend
@@ -6537,50 +6600,50 @@ FtlVariablesInit:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mvn	r3, #0
-	ldr	r5, .L765
+	ldr	r6, .L772
 	mov	r4, #0
-	ldr	r2, .L765+4
+	ldr	r2, .L772+4
 	mov	r1, r4
-	ldr	r6, .L765+8
+	ldr	r5, .L772+8
 	movw	r7, #3858
-	str	r3, [r5, #-1008]
-	strh	r3, [r5, r2]	@ movhi
+	str	r3, [r6, #-1008]
+	strh	r3, [r6, r2]	@ movhi
 	movw	r3, #3962
-	strh	r4, [r6, r3]	@ movhi
+	strh	r4, [r5, r3]	@ movhi
 	mov	r3, #3936
-	ldrh	r2, [r6, r3]
-	ldr	r0, [r6, #3964]
-	str	r4, [r5, #-1024]
+	ldrh	r2, [r5, r3]
+	ldr	r0, [r5, #3964]
+	str	r4, [r6, #-1024]
 	mov	r2, r2, asl #1
-	str	r4, [r5, #-1016]
-	str	r4, [r5, #-1012]
-	str	r4, [r6, #3840]
+	str	r4, [r6, #-1016]
+	str	r4, [r6, #-1012]
+	str	r4, [r5, #3840]
 	bl	ftl_memset
-	ldrh	r2, [r6, r7]
+	ldrh	r2, [r5, r7]
 	mov	r1, r4
-	ldr	r0, [r5, #-2080]
+	ldr	r0, [r5, #4048]
 	mov	r2, r2, asl #1
 	bl	ftl_memset
-	ldrh	r2, [r6, r7]
+	ldrh	r2, [r5, r7]
 	mov	r1, r4
-	ldr	r0, [r5, #-1004]
+	ldr	r0, [r6, #-1004]
 	mov	r2, r2, asl #1
 	bl	ftl_memset
 	mov	r1, r4
 	mov	r2, #48
-	ldr	r0, .L765+12
+	ldr	r0, .L772+12
 	bl	ftl_memset
 	mov	r1, r4
 	mov	r2, #512
-	ldr	r0, .L765+16
+	ldr	r0, .L772+16
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L766:
+.L773:
 	.align	2
-.L765:
+.L772:
 	.word	.LANCHOR2
 	.word	-1020
 	.word	.LANCHOR0
@@ -6598,13 +6661,13 @@ FtlMemInit:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	mov	r6, #0
-	ldr	r4, .L798
+	ldr	r4, .L805
 	mov	r0, #1024
-	ldr	r3, .L798+4
+	ldr	r3, .L805+4
 	mov	r7, #12
-	ldr	r2, .L798+8
+	ldr	r2, .L805+8
 	movw	sl, #3848
-	ldr	r5, .L798+12
+	ldr	r5, .L805+12
 	mov	r8, #36
 	strh	r6, [r4, r3]	@ movhi
 	movw	r3, #65535
@@ -6615,7 +6678,7 @@ FtlMemInit:
 	str	r6, [r4, #-1000]
 	strh	r3, [r4, r2]	@ movhi
 	mov	r2, #32
-	ldr	r3, .L798+16
+	ldr	r3, .L805+16
 	str	r6, [r4, #-1712]
 	str	r6, [r4, #-1804]
 	strh	r2, [r4, r3]	@ movhi
@@ -6641,7 +6704,7 @@ FtlMemInit:
 	str	r6, [r4, #-1836]
 	str	r6, [r4, #-1796]
 	str	r6, [r4, #-1792]
-	str	r6, [r4, #-2076]
+	str	r6, [r5, #4052]
 	str	r6, [r4, #-1784]
 	str	r6, [r4, #-1780]
 	str	r6, [r4, #-996]
@@ -6659,7 +6722,7 @@ FtlMemInit:
 	str	r0, [r4, #-976]
 	ldrh	r0, [r5, r6]
 	strhi	r3, [r4, #-976]
-	ldr	r4, .L798
+	ldr	r4, .L805
 	mov	r0, r0, asl #1
 	bl	ftl_malloc
 	str	r0, [r4, #-1152]
@@ -6681,7 +6744,7 @@ FtlMemInit:
 	str	r0, [r4, #-964]
 	mov	r0, r6
 	bl	ftl_malloc
-	str	r0, [r4, #-2084]
+	str	r0, [r5, #4044]
 	mov	r0, r6
 	bl	ftl_malloc
 	str	r0, [r4, #-1164]
@@ -6732,7 +6795,7 @@ FtlMemInit:
 	mov	r0, sl, asl #3
 	bl	ftl_malloc
 	ldrh	r3, [r5, r6]
-	ldr	sl, .L798+20
+	ldr	sl, .L805+20
 	str	r0, [r4, #-932]
 	ldr	r0, [r4, #-1160]
 	mul	r0, r0, r3
@@ -6761,7 +6824,7 @@ FtlMemInit:
 	mov	sl, sl, asl #1
 	str	r0, [r4, #-920]
 	add	r0, r0, #32
-	str	r0, [r4, #-2080]
+	str	r0, [r5, #4048]
 	mov	r0, sl
 	bl	ftl_malloc
 	str	r0, [r4, #-916]
@@ -6827,7 +6890,7 @@ FtlMemInit:
 	mul	r0, r0, r3
 	bl	ftl_malloc
 	ldrh	r3, [r5, r6]
-	ldr	r6, .L798+24
+	ldr	r6, .L805+24
 	str	r0, [r4, #-1092]
 	mov	r0, #6
 	mul	r0, r0, r3
@@ -6844,166 +6907,167 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r4, r6]
 	mov	r3, #1
-	ldr	ip, .L798+12
+	ldr	ip, .L805+12
 	mov	r1, r1, asl #2
 	mov	r2, r1
 	str	r0, [r5, #4008]
 	ldrh	r5, [r5, r7]
-	ldr	r0, .L798+28
-	b	.L769
-.L770:
+	ldr	r0, .L805+28
+	b	.L776
+.L777:
 	ldr	r4, [ip, #4008]
 	add	r3, r3, #1
 	add	r4, r4, r2
 	add	r2, r2, r1
 	str	r4, [r0, #4]!
-.L769:
+.L776:
 	cmp	r3, r5
-	bcc	.L770
-	ldr	r0, .L798+32
+	bcc	.L777
+	ldr	r0, .L805+32
 	mov	r2, #0
 	mov	r1, r2
 	add	r0, r0, r3, asl #2
-	b	.L771
-.L772:
+	b	.L778
+.L779:
 	add	ip, r0, r2
 	add	r3, r3, #1
 	add	r2, r2, #4
 	str	r1, [ip, #28]
-.L771:
+.L778:
 	cmp	r3, #7
-	bls	.L772
-	ldr	r3, .L798
+	bls	.L779
+	ldr	r3, .L805
 	ldr	r2, [r3, #-1040]
 	cmp	r2, #0
-	beq	.L797
-.L773:
+	beq	.L804
+.L780:
 	ldr	r2, [r3, #-1096]
 	cmp	r2, #0
-	beq	.L797
-.L775:
+	beq	.L804
+.L782:
 	ldr	r2, [r3, #-1032]
 	cmp	r2, #0
-	beq	.L797
-.L776:
+	beq	.L804
+.L783:
 	ldr	r2, [r3, #-1036]
 	cmp	r2, #0
-	beq	.L797
-.L777:
+	beq	.L804
+.L784:
 	ldr	r2, [r3, #-1852]
 	cmp	r2, #0
-	beq	.L797
-.L778:
+	beq	.L804
+.L785:
 	ldr	r2, [r3, #-1092]
 	cmp	r2, #0
-	beq	.L797
-.L779:
+	beq	.L804
+.L786:
 	ldr	r2, [r3, #-2024]
 	cmp	r2, #0
-	beq	.L797
-.L780:
-	ldr	r2, .L798+12
+	beq	.L804
+.L787:
+	ldr	r2, .L805+12
 	ldr	r2, [r2, #4008]
 	cmp	r2, #0
-	beq	.L797
-.L781:
+	beq	.L804
+.L788:
 	ldr	r3, [r3, #-2016]
 	cmp	r3, #0
-	beq	.L797
-.L782:
-	ldr	r3, .L798
+	beq	.L804
+.L789:
+	ldr	r3, .L805
 	ldr	r2, [r3, #-1152]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-1148]
 	cmp	r2, #0
-	beq	.L797
-.L784:
+	beq	.L804
+.L791:
 	ldr	r2, [r3, #-972]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-964]
 	cmp	r2, #0
-	beq	.L797
-	ldr	r2, [r3, #-2084]
+	beq	.L804
+	ldr	r2, .L805+12
+	ldr	r2, [r2, #4044]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-1164]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-968]
 	cmp	r2, #0
-	beq	.L797
-.L786:
+	beq	.L804
+.L793:
 	ldr	r2, [r3, #-960]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-956]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r3, [r3, #-952]
 	cmp	r3, #0
-	beq	.L797
-	ldr	r3, .L798
+	beq	.L804
+	ldr	r3, .L805
 	ldr	r2, [r3, #-1172]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-944]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-940]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-1176]
 	cmp	r2, #0
-	beq	.L797
-.L788:
+	beq	.L804
+.L795:
 	ldr	r2, [r3, #-936]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-932]
 	cmp	r2, #0
-	beq	.L797
+	beq	.L804
 	ldr	r2, [r3, #-1168]
 	cmp	r2, #0
-	beq	.L797
-.L790:
-	ldr	r2, [r3, #-2080]
-	cmp	r2, #0
-	beq	.L797
+	beq	.L804
+.L797:
+	ldr	r2, .L805+12
+	ldr	r1, [r2, #4048]
+	cmp	r1, #0
+	beq	.L804
 	ldr	r3, [r3, #-1004]
 	cmp	r3, #0
-	beq	.L797
-.L792:
-	ldr	r3, .L798+12
-	ldr	r3, [r3, #3964]
+	beq	.L804
+.L799:
+	ldr	r3, [r2, #3964]
 	cmp	r3, #0
-	beq	.L797
-.L793:
-	ldr	r3, .L798
+	beq	.L804
+.L800:
+	ldr	r3, .L805
 	ldr	r2, [r3, #-912]
 	cmp	r2, #0
-	beq	.L797
-.L794:
+	beq	.L804
+.L801:
 	ldr	r2, [r3, #-908]
 	cmp	r2, #0
-	beq	.L797
-.L795:
+	beq	.L804
+.L802:
 	ldr	r3, [r3, #-904]
 	cmp	r3, #0
-	bne	.L796
-.L797:
-	ldr	r0, .L798+36
-	ldr	r1, .L798+40
+	bne	.L803
+.L804:
+	ldr	r0, .L805+36
+	ldr	r1, .L805+40
 	bl	printk
 	mvn	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L796:
+.L803:
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L799:
+.L806:
 	.align	2
-.L798:
+.L805:
 	.word	.LANCHOR2
 	.word	-1100
 	.word	-1142
@@ -7030,7 +7094,7 @@ ftl_read_flash_info:
 	mov	r2, #11
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L803
+	ldr	r3, .L810
 	ldr	r2, [r3, #3624]
 	ldr	r1, [r3, #856]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
@@ -7061,22 +7125,22 @@ ftl_read_flash_info:
 	strb	r1, [r4, #10]
 	strb	r2, [r4, #9]
 	mov	r2, #1
-	ldr	r1, .L803+4
-	b	.L801
-.L802:
+	ldr	r1, .L810+4
+	b	.L808
+.L809:
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	add	r3, r3, #1
 	ldrb	ip, [r4, #10]	@ zero_extendqisi2
 	orr	ip, ip, r2, asl r5
 	strb	ip, [r4, #10]
-.L801:
+.L808:
 	uxtb	ip, r3
 	cmp	ip, r0
-	bcc	.L802
+	bcc	.L809
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L804:
+.L811:
 	.align	2
-.L803:
+.L810:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3764
 	.fnend
@@ -7088,50 +7152,50 @@ FlashDieInfoInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L817
+	ldr	r1, .L824
 	mov	r2, #0
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
-	ldr	r3, .L817+4
+	ldr	r3, .L824+4
 	strb	r2, [r1, #-896]
-	ldr	r1, .L817+8
+	ldr	r1, .L824+8
 	strb	r2, [r3, #3762]
 	movw	r2, #2902
 	ldrh	r2, [r1, r2]
 	cmp	r2, #256
 	str	r2, [r3, #856]
 	movhi	r2, #512
-	bhi	.L816
+	bhi	.L823
 	cmp	r2, #128
-	bls	.L807
+	bls	.L814
 	mov	r2, #256
-.L816:
+.L823:
 	str	r2, [r3, #856]
-.L807:
+.L814:
 	mov	r1, #0
 	mov	r2, #8
-	ldr	r0, .L817+12
+	ldr	r0, .L824+12
 	mov	r6, #0
 	bl	ftl_memset
 	mov	r1, #0
 	mov	r2, #32
-	ldr	r0, .L817+16
+	ldr	r0, .L824+16
 	bl	ftl_memset
-	ldr	r0, .L817+20
+	ldr	r0, .L824+20
 	mov	r1, #0
 	mov	r2, #128
 	bl	ftl_memset
-	ldr	r7, .L817+24
-	ldr	r5, .L817+4
+	ldr	r7, .L824+24
+	ldr	r5, .L824+4
 	mov	r8, r7
-.L809:
+.L816:
 	ldr	r4, [r5, #3624]
 	mov	r1, r8
 	add	r0, r4, #1
 	ldrb	r2, [r4, #0]	@ zero_extendqisi2
 	bl	FlashMemCmp8
 	cmp	r0, #0
-	bne	.L808
+	bne	.L815
 	ldrb	r3, [r5, #3762]	@ zero_extendqisi2
 	add	r2, r5, r3, asl #2
 	str	r0, [r2, #3588]
@@ -7139,28 +7203,28 @@ FlashDieInfoInit:
 	add	r3, r3, #1
 	strb	r3, [r5, #3762]
 	strb	r6, [r2, #3764]
-.L808:
+.L815:
 	add	r6, r6, #1
 	add	r8, r8, #8
 	cmp	r6, #4
-	bne	.L809
-	ldr	r5, .L817+4
-	ldr	r3, .L817
+	bne	.L816
+	ldr	r5, .L824+4
+	ldr	r3, .L824
 	ldrb	r2, [r5, #3762]	@ zero_extendqisi2
 	strb	r2, [r3, #-896]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	bne	.L810
+	bne	.L817
 	add	sl, r4, #1
 	mov	r6, #0
 	mov	r8, r5
-.L813:
+.L820:
 	mov	r0, sl
 	mov	r1, r7
 	ldrb	r2, [r4, #0]	@ zero_extendqisi2
 	bl	FlashMemCmp8
 	cmp	r0, #0
-	bne	.L811
+	bne	.L818
 	ldrb	r1, [r4, #13]	@ zero_extendqisi2
 	ldr	r0, [r5, #856]
 	ldrb	r3, [r5, #3762]	@ zero_extendqisi2
@@ -7178,25 +7242,25 @@ FlashDieInfoInit:
 	add	r3, r3, #1
 	strb	r3, [r8, #3762]
 	strb	r6, [r2, #3764]
-.L811:
+.L818:
 	add	r6, r6, #1
 	add	r7, r7, #8
 	cmp	r6, #4
-	bne	.L813
-.L810:
-	ldr	r3, .L817+4
+	bne	.L820
+.L817:
+	ldr	r3, .L824+4
 	ldrb	r1, [r4, #13]	@ zero_extendqisi2
-	ldr	r2, .L817
+	ldr	r2, .L824
 	ldrb	r3, [r3, #3762]	@ zero_extendqisi2
 	mul	r1, r1, r3
 	ldrh	r3, [r4, #14]
 	mul	r1, r3, r1
-	ldr	r3, .L817+28
+	ldr	r3, .L824+28
 	strh	r1, [r2, r3]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L818:
+.L825:
 	.align	2
-.L817:
+.L824:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LANCHOR1
@@ -7218,85 +7282,85 @@ BuildFlashLsbPageTable:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	mov	r4, r1
-	bne	.L820
-	ldr	r3, .L859
-.L821:
+	bne	.L827
+	ldr	r3, .L866
+.L828:
 	strh	r0, [r3, #2]!	@ movhi
 	add	r0, r0, #1
 	uxth	r0, r0
 	cmp	r0, #256
-	bne	.L821
-	b	.L822
-.L820:
+	bne	.L828
+	b	.L829
+.L827:
 	cmp	r0, #1
-	bne	.L823
-	ldr	r0, .L859+4
+	bne	.L830
+	ldr	r0, .L866+4
 	mov	r2, #0
 	mov	r3, r2
-.L826:
+.L833:
 	uxth	r1, r3
 	cmp	r1, #3
-	bls	.L824
+	bls	.L831
 	tst	r3, #1
 	moveq	r1, #2
 	movne	r1, #3
 	rsb	r1, r1, r2
 	uxth	r1, r1
-.L824:
+.L831:
 	add	r3, r3, #1
 	strh	r1, [r2, r0]	@ movhi
 	cmp	r3, #256
 	add	r2, r2, #2
-	bne	.L826
-	b	.L822
-.L823:
+	bne	.L833
+	b	.L829
+.L830:
 	cmp	r0, #2
-	bne	.L827
+	bne	.L834
 	mov	r3, #0
-	ldr	r0, .L859
+	ldr	r0, .L866
 	movw	r2, #65535
 	mov	r1, r3
-	b	.L858
-.L830:
+	b	.L865
+.L837:
 	cmp	r3, #1
 	movls	r1, r3
 	movhi	r1, r2
-.L858:
+.L865:
 	add	r3, r3, #1
 	add	r2, r2, #2
 	strh	r1, [r0, #2]!	@ movhi
 	uxth	r3, r3
 	uxth	r2, r2
 	cmp	r3, #256
-	bne	.L830
-	b	.L822
-.L827:
+	bne	.L837
+	b	.L829
+.L834:
 	cmp	r0, #3
-	bne	.L831
-	ldr	r0, .L859+4
+	bne	.L838
+	ldr	r0, .L866+4
 	mov	r2, #0
 	mov	r3, r2
-.L834:
+.L841:
 	uxth	r1, r3
 	cmp	r1, #5
-	bls	.L832
+	bls	.L839
 	tst	r3, #1
 	moveq	r1, #4
 	movne	r1, #5
 	rsb	r1, r1, r2
 	uxth	r1, r1
-.L832:
+.L839:
 	add	r3, r3, #1
 	strh	r1, [r2, r0]	@ movhi
 	cmp	r3, #256
 	add	r2, r2, #2
-	bne	.L834
-	b	.L822
-.L831:
+	bne	.L841
+	b	.L829
+.L838:
 	cmp	r0, #4
 	mov	r2, #0
-	bne	.L835
-	ldr	r3, .L859+8
+	bne	.L842
+	ldr	r3, .L866+8
 	movw	r1, #3076
 	strh	r2, [r3, r1]	@ movhi
 	movw	r2, #3078
@@ -7312,7 +7376,7 @@ BuildFlashLsbPageTable:
 	mov	r1, #5
 	strh	r0, [r3, r2]	@ movhi
 	add	r2, r2, #2
-	ldr	r0, .L859+12
+	ldr	r0, .L866+12
 	strh	r1, [r3, r2]	@ movhi
 	mov	r2, #3088
 	mov	r1, #7
@@ -7322,7 +7386,7 @@ BuildFlashLsbPageTable:
 	strh	r1, [r3, r2]	@ movhi
 	mov	r2, #16
 	mov	r3, r1
-.L837:
+.L844:
 	tst	r3, #1
 	add	r3, r3, #1
 	moveq	r1, #6
@@ -7332,72 +7396,72 @@ BuildFlashLsbPageTable:
 	add	r2, r2, #2
 	strh	r1, [r0, #2]!	@ movhi
 	uxth	r2, r2
-	bne	.L837
-	b	.L822
-.L835:
+	bne	.L844
+	b	.L829
+.L842:
 	cmp	r0, #5
-	bne	.L838
-	ldr	r1, .L859
+	bne	.L845
+	ldr	r1, .L866
 	mov	r3, r2
-.L839:
+.L846:
 	strh	r3, [r1, #2]!	@ movhi
 	add	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #16
-	bne	.L839
-	ldr	r2, .L859+16
-.L840:
+	bne	.L846
+	ldr	r2, .L866+16
+.L847:
 	strh	r3, [r2, #2]!	@ movhi
 	add	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L840
-	b	.L822
-.L838:
+	bne	.L847
+	b	.L829
+.L845:
 	cmp	r0, #6
-	bne	.L822
-	ldr	r0, .L859
+	bne	.L829
+	ldr	r0, .L866
 	mov	r3, r2
-.L843:
+.L850:
 	uxth	r1, r3
 	cmp	r1, #5
-	bls	.L841
+	bls	.L848
 	tst	r3, #1
 	moveq	r1, #10
 	movne	r1, #12
 	rsb	r1, r1, r2
 	uxth	r1, r1
-.L841:
+.L848:
 	add	r3, r3, #1
 	add	r2, r2, #3
 	cmp	r3, #256
 	strh	r1, [r0, #2]!	@ movhi
 	uxth	r2, r2
-	bne	.L843
-.L822:
+	bne	.L850
+.L829:
 	mov	r2, #1024
-	ldr	r0, .L859+20
+	ldr	r0, .L866+20
 	mov	r1, #255
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r2, .L859
+	ldr	r2, .L866
 	mov	r3, #0
-	ldr	r0, .L859+24
-	b	.L844
-.L845:
+	ldr	r0, .L866+24
+	b	.L851
+.L852:
 	ldrh	r1, [r2, #2]!
 	add	r3, r3, #1
 	uxth	r3, r3
 	add	ip, r0, r1, asl #1
 	sub	ip, ip, #892
 	strh	r1, [ip, #0]	@ movhi
-.L844:
+.L851:
 	cmp	r3, r4
-	bcc	.L845
+	bcc	.L852
 	ldmfd	sp!, {r4, pc}
-.L860:
+.L867:
 	.align	2
-.L859:
+.L866:
 	.word	.LANCHOR0+3074
 	.word	.LANCHOR0+3076
 	.word	.LANCHOR0
@@ -7429,15 +7493,15 @@ ftl_memcpy32:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	mov	ip, r3
-	b	.L863
-.L864:
+	b	.L870
+.L871:
 	ldr	r4, [r1, r3]
 	add	ip, ip, #1
 	str	r4, [r0, r3]
 	add	r3, r3, #4
-.L863:
+.L870:
 	cmp	ip, r2
-	bne	.L864
+	bne	.L871
 	ldmfd	sp!, {r4, pc}
 	.fnend
 	.size	ftl_memcpy32, .-ftl_memcpy32
@@ -7463,22 +7527,22 @@ js_hash:
 	mov	r2, #0
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
-	ldr	r0, .L869
-	b	.L867
-.L868:
+	ldr	r0, .L876
+	b	.L874
+.L875:
 	mov	ip, r0, asl #5
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	add	ip, ip, r0, lsr #2
 	add	r2, r2, #1
 	add	ip, ip, r4
 	eor	r0, r0, ip
-.L867:
+.L874:
 	cmp	r2, r1
-	bne	.L868
+	bne	.L875
 	ldmfd	sp!, {r4, pc}
-.L870:
+.L877:
 	.align	2
-.L869:
+.L876:
 	.word	1204201446
 	.fnend
 	.size	js_hash, .-js_hash
@@ -7490,12 +7554,12 @@ timer_get_time:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L872
+	ldr	r3, .L879
 	ldr	r0, [r3, #0]
 	b	jiffies_to_msecs
-.L873:
+.L880:
 	.align	2
-.L872:
+.L879:
 	.word	jiffies
 	.fnend
 	.size	timer_get_time, .-timer_get_time
@@ -7509,7 +7573,7 @@ FlashSramLoadStore:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	cmp	r2, #0
-	ldr	r4, .L877
+	ldr	r4, .L884
 	mov	ip, r0
 	mov	r2, r3
 	ldr	r4, [r4, #132]
@@ -7519,9 +7583,9 @@ FlashSramLoadStore:
 	movne	r1, ip
 	ldmfd	sp!, {r4, lr}
 	b	memcpy
-.L878:
+.L885:
 	.align	2
-.L877:
+.L884:
 	.word	.LANCHOR2
 	.fnend
 	.size	FlashSramLoadStore, .-FlashSramLoadStore
@@ -7566,12 +7630,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L883
+	ldr	r3, .L890
 	ldr	r0, [r3, #3956]
 	bx	lr
-.L884:
+.L891:
 	.align	2
-.L883:
+.L890:
 	.word	.LANCHOR0
 	.fnend
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
@@ -7624,47 +7688,47 @@ rknand_print_hex:
 	mov	r7, r2
 	mov	sl, r3
 	mov	r4, r5
-	b	.L889
-.L895:
+	b	.L896
+.L902:
 	cmp	r5, #0
-	bne	.L890
-	ldr	r0, .L897
+	bne	.L897
+	ldr	r0, .L904
 	mov	r1, r8
 	mov	r2, r6
 	mov	r3, r4
 	bl	printk
-.L890:
+.L897:
 	cmp	r7, #4
-	ldreq	r0, .L897+4
+	ldreq	r0, .L904+4
 	ldreq	r1, [r6, r4, asl #2]
-	beq	.L896
+	beq	.L903
 	cmp	r7, #2
 	moveq	r3, r4, asl #1
-	ldreq	r0, .L897+4
+	ldreq	r0, .L904+4
 	ldreqsh	r1, [r6, r3]
-	ldrne	r0, .L897+4
+	ldrne	r0, .L904+4
 	ldrneb	r1, [r6, r4]	@ zero_extendqisi2
-.L896:
+.L903:
 	add	r5, r5, #1
 	bl	printk
 	cmp	r5, #15
-	bls	.L894
-	ldr	r0, .L897+8
+	bls	.L901
+	ldr	r0, .L904+8
 	mov	r5, #0
-	ldr	r1, .L897+12
+	ldr	r1, .L904+12
 	bl	printk
-.L894:
+.L901:
 	add	r4, r4, #1
-.L889:
+.L896:
 	cmp	r4, sl
-	bne	.L895
-	ldr	r0, .L897+8
-	ldr	r1, .L897+12
+	bne	.L902
+	ldr	r0, .L904+8
+	ldr	r1, .L904+12
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	b	printk
-.L898:
+.L905:
 	.align	2
-.L897:
+.L904:
 	.word	.LC84
 	.word	.LC85
 	.word	.LC78
@@ -7680,15 +7744,15 @@ NandcXferComp:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r0, r1, r4, r5, r6, lr}
 	.save {r0, r1, r4, r5, r6, lr}
-	ldr	r6, .L922
+	ldr	r6, .L929
 	add	r0, r6, r0, asl #3
 	ldr	r3, [r6, #3788]
 	ldr	r4, [r0, #864]
 	cmp	r3, #3
-	bls	.L916
+	bls	.L923
 	ldr	r3, [r4, #16]
 	tst	r3, #4
-	beq	.L916
+	beq	.L923
 	mov	r0, r4
 	bl	wait_for_nandc_xfer_completed
 	ldr	r5, [r4, #16]
@@ -7696,49 +7760,49 @@ NandcXferComp:
 	ands	r5, r5, #2
 	str	r3, [sp, #0]
 	movne	r5, #0
-	bne	.L920
-	b	.L921
-.L906:
+	bne	.L927
+	b	.L928
+.L913:
 	ldr	r3, [r6, #3788]
 	cmp	r3, #5
-	bls	.L903
+	bls	.L910
 	ldr	r3, [r4, #0]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	tst	r3, #8192
-	beq	.L903
+	beq	.L910
 	ldr	r3, [sp, #4]
 	tst	r3, #131072
-	bne	.L904
-.L903:
+	bne	.L911
+.L910:
 	add	r5, r5, #1
 	bic	r3, r5, #-16777216
 	cmp	r3, #0
-	bne	.L920
+	bne	.L927
 	ldr	r2, [r4, #28]
 	mov	r1, r5
 	ldr	r3, [sp, #0]
 	ubfx	r2, r2, #16, #5
-	ldr	r0, .L922+4
+	ldr	r0, .L929+4
 	ubfx	r3, r3, #22, #6
 	bl	printk
-	ldr	r0, .L922+8
+	ldr	r0, .L929+8
 	mov	r1, r4
 	mov	r2, #4
 	mov	r3, #512
 	bl	rknand_print_hex
-.L920:
+.L927:
 	ldr	r2, [r4, #28]
 	ldr	r3, [sp, #0]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	blt	.L906
-.L904:
-	ldr	r4, .L922
+	blt	.L913
+.L911:
+	ldr	r4, .L929
 	ldr	r3, [r4, #3820]
 	cmp	r3, #0
-	beq	.L907
+	beq	.L914
 	ldr	r1, [sp, #0]
 	mov	r2, #0
 	ldr	r0, [r4, #3812]
@@ -7751,40 +7815,40 @@ NandcXferComp:
 	ubfx	r1, r1, #22, #5
 	mov	r1, r1, asl #7
 	bl	rknand_dma_unmap_single
-	b	.L907
-.L910:
+	b	.L914
+.L917:
 	ldr	r3, [r4, #8]
 	add	r5, r5, #1
 	str	r3, [sp, #0]
 	bic	r3, r5, #-16777216
 	cmp	r3, #0
-	bne	.L921
+	bne	.L928
 	ldr	r2, [sp, #0]
 	mov	r1, r5
 	ldr	r3, [r4, #28]
-	ldr	r0, .L922+12
+	ldr	r0, .L929+12
 	ubfx	r3, r3, #16, #5
 	bl	printk
-	ldr	r0, .L922+8
+	ldr	r0, .L929+8
 	mov	r1, r4
 	mov	r2, #4
 	mov	r3, #512
 	bl	rknand_print_hex
-.L921:
+.L928:
 	ldr	r3, [sp, #0]
 	tst	r3, #1048576
-	beq	.L910
-	ldr	r6, .L922
+	beq	.L917
+	ldr	r6, .L929
 	ldr	r3, [r6, #3828]
 	cmp	r3, #0
-	beq	.L911
+	beq	.L918
 	mov	r0, r4
 	bl	NandcSendDumpDataStart
-.L911:
+.L918:
 	ldr	r3, [r6, #3820]
-	ldr	r5, .L922
+	ldr	r5, .L929
 	cmp	r3, #0
-	beq	.L912
+	beq	.L919
 	ldr	r1, [sp, #0]
 	mov	r2, #1
 	ldr	r0, [r5, #3812]
@@ -7797,29 +7861,29 @@ NandcXferComp:
 	ubfx	r1, r1, #22, #5
 	mov	r1, r1, asl #7
 	bl	rknand_dma_unmap_single
-.L912:
-	ldr	r3, .L922
+.L919:
+	ldr	r3, .L929
 	ldr	r3, [r3, #3828]
 	cmp	r3, #0
-	beq	.L907
+	beq	.L914
 	mov	r0, r4
 	bl	NandcSendDumpDataDone
-.L907:
-	ldr	r3, .L922
+.L914:
+	ldr	r3, .L929
 	mov	r2, #0
 	str	r2, [r3, #3820]
-	b	.L899
-.L916:
+	b	.L906
+.L923:
 	ldr	r3, [r4, #8]
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #0]
 	tst	r3, #1048576
-	beq	.L916
-.L899:
+	beq	.L923
+.L906:
 	ldmfd	sp!, {r2, r3, r4, r5, r6, pc}
-.L923:
+.L930:
 	.align	2
-.L922:
+.L929:
 	.word	.LANCHOR0
 	.word	.LC87
 	.word	.LC88
@@ -7837,7 +7901,7 @@ NandcXferData:
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r4, r3
 	mov	r9, r3
-	ldr	r3, .L962
+	ldr	r3, .L969
 	.pad #92
 	sub	sp, sp, #92
 	tst	r4, #63
@@ -7847,15 +7911,15 @@ NandcXferData:
 	mov	sl, r2
 	ldr	r5, [sp, #128]
 	ldr	r6, [r3, #864]
-	bne	.L925
+	bne	.L932
 	cmp	r5, #0
-	bne	.L926
+	bne	.L933
 	add	r0, sp, #24
 	mov	r1, #255
 	mov	r2, #64
 	add	r5, sp, #24
 	bl	ftl_memset
-.L926:
+.L933:
 	mov	r0, r7
 	mov	r1, fp
 	mov	r2, sl
@@ -7866,8 +7930,8 @@ NandcXferData:
 	bl	NandcXferComp
 	cmp	fp, #0
 	movne	r4, #0
-	bne	.L927
-	ldr	r1, .L962
+	bne	.L934
+	ldr	r1, .L969
 	mov	r0, sl, lsr #1
 	mov	r3, fp
 	mov	r2, fp
@@ -7876,8 +7940,8 @@ NandcXferData:
 	cmp	ip, #24
 	movhi	ip, #128
 	movls	ip, #64
-	b	.L929
-.L930:
+	b	.L936
+.L937:
 	ldr	r1, [r4, #3800]
 	mov	r3, r3, lsr #2
 	add	r2, r2, #1
@@ -7891,29 +7955,29 @@ NandcXferData:
 	strb	r3, [r5, #3]
 	add	r5, r5, #4
 	mov	r3, r7
-.L929:
+.L936:
 	cmp	r2, r0
 	add	r7, r3, ip
-	ldr	r1, .L962
-	bcc	.L930
+	ldr	r1, .L969
+	bcc	.L937
 	mov	r3, #0
 	ldr	r0, [r1, #3832]
 	mov	sl, sl, lsr #2
 	ldr	r1, [r1, #3788]
 	mov	r4, r3
-	b	.L931
-.L937:
+	b	.L938
+.L944:
 	add	r2, r3, #8
 	ldr	r2, [r6, r2, asl #2]
 	str	r2, [sp, #20]
 	ldr	r2, [sp, #20]
 	tst	r2, #4
-	bne	.L952
+	bne	.L959
 	ldr	r2, [sp, #20]
 	ands	r2, r2, #32768
-	bne	.L952
+	bne	.L959
 	cmp	r1, #5
-	bls	.L933
+	bls	.L940
 	ldr	r7, [sp, #20]
 	ldr	ip, [sp, #20]
 	ldr	r5, [sp, #20]
@@ -7932,10 +7996,10 @@ NandcXferData:
 	ubfxls	ip, ip, #16, #5
 	ubfxhi	r2, r2, #27, #1
 	ubfxls	r2, r2, #29, #1
-	b	.L960
-.L933:
+	b	.L967
+.L940:
 	cmp	r1, #3
-	bls	.L935
+	bls	.L942
 	ldr	r7, [sp, #20]
 	ldr	ip, [sp, #20]
 	ldr	r5, [sp, #20]
@@ -7954,31 +8018,31 @@ NandcXferData:
 	ubfxls	ip, ip, #16, #5
 	ubfxhi	r2, r2, #28, #1
 	ubfxls	r2, r2, #30, #1
-.L960:
+.L967:
 	orr	r2, ip, r2, asl #5
-.L935:
+.L942:
 	cmp	r4, r2
 	movcc	r4, r2
-	b	.L932
-.L952:
+	b	.L939
+.L959:
 	mvn	r4, #0
-.L932:
+.L939:
 	add	r3, r3, #1
-.L931:
+.L938:
 	cmp	r3, sl
-	bcs	.L927
+	bcs	.L934
 	cmp	r0, #0
-	bne	.L937
-.L927:
+	bne	.L944
+.L934:
 	mov	r3, #0
 	str	r3, [r6, #16]
-	b	.L938
-.L925:
+	b	.L945
+.L932:
 	cmp	r1, #1
 	mov	r8, #0
-	bne	.L958
-	b	.L939
-.L942:
+	bne	.L965
+	b	.L946
+.L949:
 	cmp	r5, #0
 	and	r4, r8, #3
 	mov	r0, r6
@@ -8002,12 +8066,12 @@ NandcXferData:
 	mov	r0, r7
 	bl	NandcXferComp
 	add	r9, r9, #1024
-.L939:
+.L946:
 	cmp	r8, sl
-	bcc	.L942
+	bcc	.L949
 	mov	r4, #0
-	b	.L938
-.L958:
+	b	.L945
+.L965:
 	mov	r1, r8
 	mov	r2, #2
 	mov	r3, r8
@@ -8019,15 +8083,15 @@ NandcXferData:
 	mov	ip, r8
 	mov	fp, r6
 	mov	r6, r5
-	b	.L961
-.L947:
+	b	.L968
+.L954:
 	mov	r0, r7
 	bl	NandcXferComp
 	ldr	r3, [fp, #32]
 	add	ip, r5, #2
 	cmp	ip, sl
 	str	r3, [sp, #20]
-	bcs	.L944
+	bcs	.L951
 	mov	r3, #0
 	mov	r0, r7
 	str	r3, [sp, #0]
@@ -8038,11 +8102,11 @@ NandcXferData:
 	str	ip, [sp, #8]
 	bl	NandcXferStart
 	ldr	ip, [sp, #8]
-.L944:
+.L951:
 	ldr	r3, [sp, #20]
 	tst	r3, #4
 	mvnne	r4, #0
-	bne	.L945
+	bne	.L952
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #20]
 	ubfx	r2, r2, #3, #5
@@ -8050,7 +8114,7 @@ NandcXferData:
 	orr	r3, r2, r3, asl #5
 	cmp	r4, r3
 	movcc	r4, r3
-.L945:
+.L952:
 	cmp	r6, #0
 	and	r2, r8, #3
 	mov	r0, fp
@@ -8065,34 +8129,34 @@ NandcXferData:
 	str	r5, [sp, #0]
 	bl	NandcCopy1KB
 	ldr	ip, [sp, #8]
-.L961:
+.L968:
 	cmp	ip, sl
 	mov	r5, ip
-	bcc	.L947
+	bcc	.L954
 	mov	r6, fp
 	ldr	fp, [sp, #12]
-.L938:
-	ldr	r3, .L962
+.L945:
+	ldr	r3, .L969
 	rsbs	fp, fp, #1
 	movcc	fp, #0
 	ldr	r3, [r3, #3788]
 	cmp	r3, #5
 	movls	fp, #0
 	cmp	fp, #0
-	beq	.L948
+	beq	.L955
 	ldr	r3, [r6, #0]
 	and	r2, r3, #139264
 	cmp	r2, #139264
 	orreq	r3, r3, #131072
 	streq	r3, [r6, #0]
 	mvneq	r4, #0
-.L948:
+.L955:
 	mov	r0, r4
 	add	sp, sp, #92
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L963:
+.L970:
 	.align	2
-.L962:
+.L969:
 	.word	.LANCHOR0
 	.fnend
 	.size	NandcXferData, .-NandcXferData
@@ -8106,23 +8170,23 @@ FlashProgPage:
 	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 	.save {r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L967
+	ldr	r3, .L974
 	subs	r4, r0, #0
 	mov	r5, r1
 	mov	r6, r2
 	ldrb	r7, [r3, #2901]	@ zero_extendqisi2
-	bne	.L965
-	ldr	r3, .L967+4
+	bne	.L972
+	ldr	r3, .L974+4
 	ldrb	r2, [r3, #853]	@ zero_extendqisi2
 	ldr	r1, [r3, #856]
 	mul	r2, r1, r2
 	cmp	r5, r2
-	bcs	.L965
+	bcs	.L972
 	ldrb	r3, [r3, #852]	@ zero_extendqisi2
 	cmp	r3, #0
 	subeq	r7, r7, #2
 	movne	r7, #4
-.L965:
+.L972:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8149,9 +8213,9 @@ FlashProgPage:
 	bl	NandcFlashDeCs
 	and	r0, r5, #1
 	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L968:
+.L975:
 	.align	2
-.L967:
+.L974:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.fnend
@@ -8166,29 +8230,29 @@ FlashPageProgMsbFFData:
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r4, r2
-	ldr	r2, .L976
+	ldr	r2, .L983
 	mov	r7, r1
 	mov	r8, r0
 	ldrb	r1, [r2, #928]	@ zero_extendqisi2
 	ldr	r3, [r2, #3624]
 	cmp	r1, #0
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	beq	.L970
+	beq	.L977
 	ldr	r1, [r2, #3776]
-	ldr	r2, .L976+4
+	ldr	r2, .L983+4
 	cmp	r1, r2
 	ldmeqfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L970:
+.L977:
 	sub	r2, r3, #5
 	uxtb	r2, r2
 	cmp	r3, #68
 	cmpne	r2, #2
-	bls	.L973
+	bls	.L980
 	cmp	r3, #35
 	cmpne	r3, #19
-	beq	.L973
+	beq	.L980
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L974:
+.L981:
 	add	r3, r5, r4, asl #1
 	sub	r3, r3, #892
 	ldrh	r3, [r3, #0]
@@ -8205,20 +8269,20 @@ FlashPageProgMsbFFData:
 	mov	r3, #0
 	bl	FlashProgPage
 	uxth	r4, r4
-	b	.L975
-.L973:
-	ldr	r6, .L976
+	b	.L982
+.L980:
+	ldr	r6, .L983
 	movw	sl, #65535
-	ldr	r5, .L976+8
-.L975:
+	ldr	r5, .L983+8
+.L982:
 	ldr	r3, [r6, #3624]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L974
+	bhi	.L981
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L977:
+.L984:
 	.align	2
-.L976:
+.L983:
 	.word	.LANCHOR0
 	.word	1446522928
 	.word	.LANCHOR2
@@ -8234,19 +8298,19 @@ FlashReadRawPage:
 	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 	.save {r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L981
+	ldr	r3, .L988
 	subs	r4, r0, #0
 	mov	r6, r1
 	mov	r5, r2
 	ldrb	r7, [r3, #2901]	@ zero_extendqisi2
-	bne	.L979
-	ldr	r3, .L981+4
+	bne	.L986
+	ldr	r3, .L988+4
 	ldrb	r2, [r3, #853]	@ zero_extendqisi2
 	ldr	r3, [r3, #856]
 	mul	r3, r3, r2
 	cmp	r1, r3
 	movcc	r7, #4
-.L979:
+.L986:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8267,9 +8331,9 @@ FlashReadRawPage:
 	bl	NandcFlashDeCs
 	mov	r0, r5
 	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L982:
+.L989:
 	.align	2
-.L981:
+.L988:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.fnend
@@ -8284,9 +8348,9 @@ HynixReadRetrial:
 	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L997
+	ldr	r3, .L1004
 	mov	sl, r2
-	ldr	fp, .L997
+	ldr	fp, .L1004
 	mov	r6, r0
 	add	r2, r3, r0
 	str	r1, [sp, #4]
@@ -8300,12 +8364,12 @@ HynixReadRetrial:
 	ldreqb	r4, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
 	mov	ip, fp
-	b	.L985
-.L990:
+	b	.L992
+.L997:
 	add	r4, r4, #1
 	ldrb	r1, [fp, #1]	@ zero_extendqisi2
 	mov	r0, r6
-	ldr	r2, .L997+4
+	ldr	r2, .L1004+4
 	uxtb	r4, r4
 	str	ip, [sp, #0]
 	cmp	r4, r9
@@ -8319,25 +8383,25 @@ HynixReadRetrial:
 	bl	FlashReadRawPage
 	ldr	ip, [sp, #0]
 	cmn	r0, #1
-	beq	.L987
+	beq	.L994
 	ldrb	r3, [ip, #3836]	@ zero_extendqisi2
 	cmn	r5, #1
 	moveq	r5, r0
 	add	r3, r3, r3, asl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L996
+	bcc	.L1003
 	mov	r7, #0
 	mov	sl, r7
-.L987:
+.L994:
 	add	r8, r8, #1
-.L985:
+.L992:
 	cmp	r8, r9
-	bcc	.L990
-	b	.L989
-.L996:
+	bcc	.L997
+	b	.L996
+.L1003:
 	mov	r5, r0
-.L989:
-	ldr	r3, .L997
+.L996:
+	ldr	r3, .L1004
 	add	r6, r3, r6
 	ldr	r2, [r3, #3624]
 	ldrb	r3, [r3, #3836]	@ zero_extendqisi2
@@ -8355,9 +8419,9 @@ HynixReadRetrial:
 	moveq	r0, r5
 	movne	r0, #256
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L998:
+.L1005:
 	.align	2
-.L997:
+.L1004:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+4
 	.fnend
@@ -8367,113 +8431,150 @@ HynixReadRetrial:
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	mov	r9, r0
-	ldr	r4, .L1012
 	mov	sl, r3
-	.pad #28
-	sub	sp, sp, #28
-	ldrb	r0, [r4, #3836]	@ zero_extendqisi2
-	ldrb	r3, [r4, #928]	@ zero_extendqisi2
-	str	r1, [sp, #16]
+	ldr	r3, .L1024
+	mov	r9, r0
+	.pad #36
+	sub	sp, sp, #36
+	ldrb	r0, [r3, #3836]	@ zero_extendqisi2
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	str	r1, [sp, #24]
 	cmp	r3, #0
 	str	r2, [sp, #20]
 	addeq	r0, r0, r0, asl #1
 	ubfxeq	r0, r0, #2, #8
-	beq	.L1011
+	beq	.L1023
 	mov	r1, #3
 	bl	__aeabi_idiv
 	uxtb	r0, r0
-.L1011:
-	add	r4, r4, r9, asl #3
-	str	r0, [sp, #12]
+.L1023:
+.L1008:
+	mov	r2, #0
+	ldr	r3, .L1024
+	mvn	r4, #0
+	mov	r6, r2
+	add	r3, r3, r9, asl #3
+	str	r0, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [sp, #28]
+.L1018:
 	mov	r0, r9
-	mov	r8, #0
+	mov	fp, #0
 	bl	NandcWaitFlashReady
-	ldrb	r7, [r4, #868]	@ zero_extendqisi2
-	ldr	r6, [r4, #864]
-	mov	fp, r8
+	ldr	r2, [sp, #28]
+	ldrb	r7, [r2, #868]	@ zero_extendqisi2
+	ldr	r8, [r2, #864]
 	add	r7, r7, #8
-	mvn	r4, #0
-	add	r5, r6, r7, asl #8
-	b	.L1002
-.L1006:
+	add	r5, r8, r7, asl #8
+	b	.L1009
+.L1013:
 	mov	r3, #239
 	mov	r0, #200
 	str	r3, [r5, #8]
 	mov	r3, #137
 	str	r3, [r5, #4]
 	bl	NandcDelayns
-	add	ip, r8, #1
+	add	ip, fp, #1
 	mov	r0, r9
 	str	ip, [r5, #0]
-	ldr	r1, [sp, #16]
+	ldr	r1, [sp, #24]
 	mov	r3, sl
-	str	fp, [r5, #0]
+	str	r6, [r5, #0]
 	ldr	r2, [sp, #20]
-	str	fp, [r5, #0]
-	str	fp, [r5, #0]
+	str	r6, [r5, #0]
+	str	r6, [r5, #0]
 	str	ip, [sp, #8]
 	bl	FlashReadRawPage
 	ldr	ip, [sp, #8]
 	cmn	r0, #1
-	beq	.L1003
+	beq	.L1010
 	cmn	r4, #1
-	ldr	r2, [sp, #12]
+	ldr	r2, [sp, #16]
 	moveq	r4, r0
 	cmp	r0, r2
-	bcc	.L1010
+	bcc	.L1020
 	mov	sl, #0
 	str	sl, [sp, #20]
-.L1003:
-	mov	r8, ip
-.L1002:
-	ldr	r2, .L1012+4
-	ldrb	r3, [r2, #140]	@ zero_extendqisi2
-	cmp	r8, r3
-	bcc	.L1006
-	b	.L1005
 .L1010:
+	mov	fp, ip
+.L1009:
+	ldr	r2, .L1024+4
+	ldrb	r3, [r2, #140]	@ zero_extendqisi2
+	cmp	fp, r3
+	bcc	.L1013
+	b	.L1012
+.L1020:
 	mov	r4, r0
-.L1005:
+	mov	sl, #0
+	str	sl, [sp, #20]
+.L1012:
 	mov	r3, #239
 	mov	r0, #200
 	str	r3, [r5, #8]
 	mov	r3, #137
 	str	r3, [r5, #4]
 	bl	NandcDelayns
-	ldr	r2, [sp, #12]
-	mov	r3, #0
-	str	r3, [r6, r7, asl #8]
+	ldr	r2, [sp, #16]
+	str	r6, [r8, r7, asl #8]
 	cmp	r4, r2
-	str	r3, [r6, r7, asl #8]
-	str	r3, [r6, r7, asl #8]
-	str	r3, [r6, r7, asl #8]
+	str	r6, [r8, r7, asl #8]
+	str	r6, [r8, r7, asl #8]
 	movcc	r3, #0
 	movcs	r3, #1
 	cmn	r4, #1
+	str	r6, [r8, r7, asl #8]
 	moveq	r3, #0
 	cmp	r3, #0
 	movne	r4, #256
 	cmn	r4, #1
+	movne	r5, #0
+	moveq	r5, #1
+	cmn	r4, #1
 	cmpne	r4, #256
-	bne	.L1008
-	ldr	r0, .L1012+8
-	mov	r1, r8
-	ldr	r2, [sp, #16]
-	mov	r3, r8
+	bne	.L1015
+	mov	r3, fp
+	ldr	r0, .L1024+8
+	mov	r1, fp
+	ldr	r2, [sp, #24]
 	str	r4, [sp, #0]
 	bl	printk
-.L1008:
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L1016
+	ldr	r2, .L1024
+	ldrb	r3, [r2, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	moveq	r5, #0
+	andne	r5, r5, #1
+	cmp	r5, #0
+	beq	.L1017
+	mov	r0, r9
+	mov	r1, #3
+	bl	micron_auto_read_calibration_config
+	mov	r3, #1
+	str	r3, [sp, #12]
+	b	.L1018
+.L1015:
+	ldr	r2, [sp, #12]
+	cmp	r2, #0
+	beq	.L1017
+.L1016:
+	mov	r0, r9
+	mov	r1, #0
+	bl	micron_auto_read_calibration_config
+	cmn	r4, #1
+	movne	r4, #256
+.L1017:
 	mov	r0, r4
-	add	sp, sp, #28
+	add	sp, sp, #36
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1013:
+.L1025:
 	.align	2
-.L1012:
+.L1024:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC90
@@ -8493,17 +8594,17 @@ SamsungReadRetrial:
 	mov	r6, r3
 	mov	r9, r1
 	bl	NandcWaitFlashReady
-	ldr	ip, .L1023
+	ldr	ip, .L1035
 	mov	r5, #1
 	mvn	r4, #0
-	ldr	fp, .L1023+4
+	ldr	fp, .L1035+4
 	add	r3, ip, r8, asl #3
 	ldrb	sl, [r3, #868]	@ zero_extendqisi2
 	ldr	r2, [r3, #864]
 	add	sl, sl, #8
 	add	sl, r2, sl, asl #8
-	b	.L1015
-.L1019:
+	b	.L1027
+.L1031:
 	mov	r0, sl
 	uxtb	r1, r5
 	str	ip, [sp, #4]
@@ -8515,30 +8616,30 @@ SamsungReadRetrial:
 	bl	FlashReadRawPage
 	ldr	ip, [sp, #4]
 	cmn	r0, #1
-	beq	.L1016
+	beq	.L1028
 	ldrb	r3, [ip, #3836]	@ zero_extendqisi2
 	cmn	r4, #1
 	moveq	r4, r0
 	add	r3, r3, r3, asl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L1022
+	bcc	.L1034
 	mov	r6, #0
 	mov	r7, r6
-.L1016:
+.L1028:
 	add	r5, r5, #1
-.L1015:
+.L1027:
 	ldrb	r3, [fp, #140]	@ zero_extendqisi2
 	add	r3, r3, #1
 	cmp	r5, r3
-	bcc	.L1019
-	b	.L1018
-.L1022:
+	bcc	.L1031
+	b	.L1030
+.L1034:
 	mov	r4, r0
-.L1018:
+.L1030:
 	mov	r0, sl
 	mov	r1, #0
 	bl	SamsungSetRRPara
-	ldr	r3, .L1023
+	ldr	r3, .L1035
 	adds	r0, r4, #1
 	ldrb	r3, [r3, #3836]	@ zero_extendqisi2
 	movne	r0, #1
@@ -8550,9 +8651,9 @@ SamsungReadRetrial:
 	moveq	r0, r4
 	movne	r0, #256
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1024:
+.L1036:
 	.align	2
-.L1023:
+.L1035:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
@@ -8571,7 +8672,7 @@ ToshibaReadRetrial:
 	mov	r9, r2
 	mov	r7, r3
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1046
+	ldr	r3, .L1058
 	add	r2, r3, r8, asl #3
 	ldr	r1, [r2, #864]
 	ldrb	r4, [r2, #868]	@ zero_extendqisi2
@@ -8582,53 +8683,53 @@ ToshibaReadRetrial:
 	uxtb	r2, r2
 	cmp	r2, #1
 	movls	sl, #0
-	bls	.L1026
+	bls	.L1038
 	ldrb	sl, [r3, #3780]	@ zero_extendqisi2
 	cmp	sl, #0
-	beq	.L1027
+	beq	.L1039
 	mov	r0, #0
 	mov	sl, #1
 	bl	NandcSetDdrMode
-.L1027:
+.L1039:
 	mov	r3, #92
 	str	r3, [r4, #8]
 	mov	r3, #197
 	str	r3, [r4, #8]
-.L1026:
+.L1038:
 	mov	r6, #1
 	mvn	r5, #0
-	ldr	fp, .L1046
-	b	.L1028
-.L1037:
+	ldr	fp, .L1058
+	b	.L1040
+.L1049:
 	ldrb	r3, [fp, #3761]	@ zero_extendqisi2
 	mov	r0, r4
 	uxtb	r1, r6
 	sub	r3, r3, #67
 	uxtb	r3, r3
 	cmp	r3, #1
-	bhi	.L1029
+	bhi	.L1041
 	bl	SandiskSetRRPara
-	b	.L1030
-.L1029:
+	b	.L1042
+.L1041:
 	bl	ToshibaSetRRPara
-.L1030:
-	ldr	r2, .L1046
+.L1042:
+	ldr	r2, .L1058
 	ldrb	r3, [r2, #3761]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1031
-	ldr	r2, .L1046+4
+	bne	.L1043
+	ldr	r2, .L1058+4
 	ldrb	r3, [r2, #140]	@ zero_extendqisi2
 	sub	r3, r3, #3
 	cmp	r6, r3
 	moveq	r3, #179
 	streq	r3, [r4, #8]
-.L1031:
+.L1043:
 	cmp	sl, #0
 	mov	r3, #38
 	str	r3, [r4, #8]
 	mov	r3, #93
 	str	r3, [r4, #8]
-	beq	.L1032
+	beq	.L1044
 	mov	r0, #4
 	bl	NandcSetDdrMode
 	ldr	r1, [sp, #4]
@@ -8641,50 +8742,50 @@ ToshibaReadRetrial:
 	str	r3, [sp, #0]
 	bl	NandcSetDdrMode
 	ldr	r3, [sp, #0]
-	b	.L1033
-.L1032:
+	b	.L1045
+.L1044:
 	mov	r3, r7
 	mov	r0, r8
 	ldr	r1, [sp, #4]
 	mov	r2, r9
 	bl	FlashReadRawPage
 	mov	r3, r0
-.L1033:
+.L1045:
 	cmn	r3, #1
-	beq	.L1034
+	beq	.L1046
 	ldrb	r2, [fp, #3836]	@ zero_extendqisi2
 	cmn	r5, #1
 	moveq	r5, r3
 	add	r2, r2, r2, asl #1
 	cmp	r3, r2, lsr #2
-	bcc	.L1045
+	bcc	.L1057
 	mov	r7, #0
 	mov	r9, r7
-.L1034:
+.L1046:
 	add	r6, r6, #1
-.L1028:
-	ldr	r2, .L1046+4
+.L1040:
+	ldr	r2, .L1058+4
 	ldrb	r3, [r2, #140]	@ zero_extendqisi2
 	add	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1037
-	b	.L1036
-.L1045:
+	bcc	.L1049
+	b	.L1048
+.L1057:
 	mov	r5, r3
-.L1036:
-	ldr	r6, .L1046
+.L1048:
+	ldr	r6, .L1058
 	mov	r0, r4
 	mov	r1, #0
 	ldrb	r3, [r6, #3761]	@ zero_extendqisi2
 	sub	r3, r3, #67
 	uxtb	r3, r3
 	cmp	r3, #1
-	bhi	.L1038
+	bhi	.L1050
 	bl	SandiskSetRRPara
-	b	.L1039
-.L1038:
+	b	.L1051
+.L1050:
 	bl	ToshibaSetRRPara
-.L1039:
+.L1051:
 	mov	r3, #255
 	str	r3, [r4, #8]
 	ldrb	r3, [r6, #3836]	@ zero_extendqisi2
@@ -8699,15 +8800,15 @@ ToshibaReadRetrial:
 	movne	r5, #256
 	bl	NandcWaitFlashReady
 	cmp	sl, #0
-	beq	.L1041
+	beq	.L1053
 	mov	r0, #4
 	bl	NandcSetDdrMode
-.L1041:
+.L1053:
 	mov	r0, r5
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1047:
+.L1059:
 	.align	2
-.L1046:
+.L1058:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
@@ -8722,9 +8823,9 @@ FlashSavePhyInfo:
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r6, #0
-	ldr	r5, .L1055
-	ldr	r7, .L1055+4
-	ldr	r8, .L1055+8
+	ldr	r5, .L1067
+	ldr	r7, .L1067+4
+	ldr	r8, .L1067+8
 	ldr	r3, [r5, #148]
 	ldrb	r0, [r5, #152]	@ zero_extendqisi2
 	str	r3, [r5, #144]
@@ -8734,7 +8835,7 @@ FlashSavePhyInfo:
 	ldr	r0, [r5, #148]
 	bl	ftl_memset
 	ldr	r3, [r5, #144]
-	ldr	r1, .L1055+12
+	ldr	r1, .L1067+12
 	mov	r2, #32
 	str	r8, [r3, #0]
 	ldr	r4, [r5, #144]
@@ -8747,15 +8848,15 @@ FlashSavePhyInfo:
 	str	r3, [r4, #1076]
 	bl	memcpy
 	add	r0, r4, #80
-	ldr	r1, .L1055+16
+	ldr	r1, .L1067+16
 	mov	r2, #8
 	bl	memcpy
 	add	r0, r4, #96
-	ldr	r1, .L1055+20
+	ldr	r1, .L1067+20
 	mov	r2, #32
 	bl	memcpy
 	ldr	r0, [r5, #144]
-	ldr	r1, .L1055+24
+	ldr	r1, .L1067+24
 	mov	r2, #32
 	add	r0, r0, #160
 	bl	memcpy
@@ -8779,7 +8880,7 @@ FlashSavePhyInfo:
 	mov	r0, #0
 	bl	flash_enter_slc_mode
 	mov	r4, r6
-.L1051:
+.L1063:
 	ldr	r1, [r7, #856]
 	mov	r0, #0
 	mov	r2, r0
@@ -8805,17 +8906,17 @@ FlashSavePhyInfo:
 	mul	r1, r1, r4
 	bl	FlashReadRawPage
 	cmn	r0, #1
-	beq	.L1049
+	beq	.L1061
 	ldr	sl, [r5, #144]
 	ldr	r3, [sl, #0]
 	cmp	r3, r8
-	bne	.L1049
+	bne	.L1061
 	add	r0, sl, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [sl, #8]
 	cmp	r3, r0
-	bne	.L1049
+	bne	.L1061
 	add	r3, r4, #1
 	str	r3, [r5, #156]
 	ldr	r3, [r7, #856]
@@ -8823,21 +8924,21 @@ FlashSavePhyInfo:
 	cmp	r6, #1
 	mul	r3, r3, r4
 	str	r3, [r5, #160]
-	bhi	.L1050
-.L1049:
+	bhi	.L1062
+.L1061:
 	add	r4, r4, #1
 	cmp	r4, #4
-	bne	.L1051
-.L1050:
+	bne	.L1063
+.L1062:
 	mov	r0, #0
 	bl	flash_exit_slc_mode
 	cmp	r6, #0
 	mvneq	r0, #0
 	movne	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1056:
+.L1068:
 	.align	2
-.L1055:
+.L1067:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	1312902724
@@ -8860,34 +8961,34 @@ FlashReadIdbDataRaw:
 	sub	sp, sp, #20
 	mov	r2, #4
 	mov	sl, r0
-	ldr	r1, .L1068
+	ldr	r1, .L1080
 	add	r0, sp, #12
 	bl	memcpy
-	ldr	r3, .L1068+4
+	ldr	r3, .L1080+4
 	ldrb	r2, [r3, #3836]	@ zero_extendqisi2
 	str	r2, [sp, #4]
 	ldr	r2, [r3, #3776]
-	ldr	r3, .L1068+8
+	ldr	r3, .L1080+8
 	cmp	r2, r3
-	bne	.L1058
+	bne	.L1070
 	mov	r0, #0
 	bl	flash_enter_slc_mode
-.L1058:
-	ldr	r7, .L1068+4
+.L1070:
+	ldr	r7, .L1080+4
 	mov	r0, sl
 	mov	r1, #0
 	mov	r2, #2048
 	bl	ftl_memset
 	mvn	r8, #0
 	mov	r4, #2
-	ldr	r9, .L1068+12
+	ldr	r9, .L1080+12
 	mov	fp, r7
-	b	.L1059
-.L1066:
+	b	.L1071
+.L1078:
 	mov	r6, #0
-.L1061:
+.L1073:
 	add	r3, sp, #12
-	ldr	r5, .L1068+12
+	ldr	r5, .L1080+12
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	FlashBchSel
 	ldr	r1, [r7, #856]
@@ -8897,19 +8998,19 @@ FlashReadIdbDataRaw:
 	mul	r1, r1, r4
 	bl	FlashReadRawPage
 	cmn	r0, #1
-	bne	.L1060
+	bne	.L1072
 	add	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1061
-	b	.L1062
-.L1060:
+	bne	.L1073
+	b	.L1074
+.L1072:
 	ldr	r3, [r5, #148]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1068+16
+	ldr	r3, .L1080+16
 	cmp	r2, r3
-	bne	.L1062
+	bne	.L1074
 	add	r3, sp, #16
-	ldr	r0, .L1068+20
+	ldr	r0, .L1080+20
 	add	r6, r3, r6
 	ldrb	r1, [r6, #-4]	@ zero_extendqisi2
 	bl	printk
@@ -8922,36 +9023,36 @@ FlashReadIdbDataRaw:
 	strb	r3, [fp, #853]
 	ldr	r3, [r5, #156]
 	cmp	r3, r4
-	bls	.L1065
+	bls	.L1077
 	str	r4, [r5, #156]
 	bl	FlashSavePhyInfo
 	mov	r8, #0
-.L1062:
+.L1074:
 	add	r4, r4, #1
-.L1059:
+.L1071:
 	ldrb	r3, [r7, #853]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1066
-	b	.L1063
-.L1065:
+	bcc	.L1078
+	b	.L1075
+.L1077:
 	mov	r8, #0
-.L1063:
+.L1075:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
-	ldr	r3, .L1068+4
+	ldr	r3, .L1080+4
 	ldr	r2, [r3, #3776]
-	ldr	r3, .L1068+8
+	ldr	r3, .L1080+8
 	cmp	r2, r3
-	bne	.L1064
+	bne	.L1076
 	mov	r0, #0
 	bl	flash_exit_slc_mode
-.L1064:
+.L1076:
 	mov	r0, r8
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1069:
+.L1081:
 	.align	2
-.L1068:
+.L1080:
 	.word	.LANCHOR3+11
 	.word	.LANCHOR0
 	.word	1446522928
@@ -8970,11 +9071,11 @@ FlashLoadPhyInfo:
 	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r2, #4
-	ldr	r1, .L1081
+	ldr	r1, .L1093
 	add	r0, sp, #4
 	bl	memcpy
-	ldr	r5, .L1081+4
-	ldr	r2, .L1081+8
+	ldr	r5, .L1093+4
+	ldr	r2, .L1093+8
 	movw	r3, #2902
 	mov	r4, #0
 	mov	r8, #4
@@ -8983,11 +9084,11 @@ FlashLoadPhyInfo:
 	ldrh	r9, [r2, r3]
 	mvn	r6, #0
 	ldr	r3, [r5, #148]
-	ldr	fp, .L1081+12
+	ldr	fp, .L1093+12
 	str	r3, [r5, #144]
 	bl	flash_enter_slc_mode
-	b	.L1071
-.L1073:
+	b	.L1083
+.L1085:
 	add	r3, sp, #4
 	ldrb	r0, [r3, r7]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8997,46 +9098,46 @@ FlashLoadPhyInfo:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	cmn	r0, #1
-	bne	.L1072
+	bne	.L1084
 	mov	r0, #0
 	mov	r1, sl
 	ldr	r2, [r5, #148]
 	mov	r3, r0
 	bl	FlashReadRawPage
 	cmn	r0, #1
-	bne	.L1072
+	bne	.L1084
 	add	r7, r7, #1
 	cmp	r7, #4
-	beq	.L1074
-	b	.L1073
-.L1072:
+	beq	.L1086
+	b	.L1085
+.L1084:
 	ldr	r7, [r5, #144]
 	ldr	r3, [r7, #0]
 	cmp	r3, fp
-	bne	.L1074
+	bne	.L1086
 	cmp	r6, #0
-	bne	.L1075
-	ldr	r2, .L1081+8
+	bne	.L1087
+	ldr	r2, .L1093+8
 	movw	r3, #2902
 	mov	r0, r4
 	ldrh	r1, [r2, r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1081+4
+	ldr	r3, .L1093+4
 	add	r0, r0, #1
 	str	r0, [r3, #156]
 	mov	r0, r6
-	b	.L1080
-.L1075:
+	b	.L1092
+.L1087:
 	add	r0, r7, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [r7, #8]
 	cmp	r3, r0
-	bne	.L1074
-	ldr	r6, .L1081+16
+	bne	.L1086
+	ldr	r6, .L1093+16
 	add	r1, r7, #160
 	mov	r2, #32
-	ldr	r0, .L1081+20
+	ldr	r0, .L1093+20
 	bl	memcpy
 	add	r0, r6, #896
 	add	r1, r7, #192
@@ -9047,7 +9148,7 @@ FlashLoadPhyInfo:
 	mov	r2, #852
 	bl	memcpy
 	ldr	r3, [r7, #1076]
-	ldr	r2, .L1081+8
+	ldr	r2, .L1093+8
 	mov	r0, r4
 	str	r4, [r5, #160]
 	strb	r3, [r6, #3780]
@@ -9062,23 +9163,23 @@ FlashLoadPhyInfo:
 	streq	r3, [r5, #156]
 	ldrh	r3, [r7, #14]
 	strb	r3, [r5, #164]
-.L1074:
+.L1086:
 	subs	r8, r8, #1
 	add	r4, r4, r9
-	beq	.L1078
-.L1071:
+	beq	.L1090
+.L1083:
 	add	sl, r4, #1
 	mov	r7, #0
-	b	.L1073
-.L1078:
+	b	.L1085
+.L1090:
 	mov	r0, r8
-.L1080:
+.L1092:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1082:
+.L1094:
 	.align	2
-.L1081:
+.L1093:
 	.word	.LANCHOR3+11
 	.word	.LANCHOR2
 	.word	.LANCHOR1
@@ -9097,7 +9198,7 @@ FlashDdrTunningRead:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	sl, r3
-	ldr	r4, .L1104
+	ldr	r4, .L1116
 	.pad #20
 	sub	sp, sp, #20
 	mov	fp, r0
@@ -9113,7 +9214,7 @@ FlashDdrTunningRead:
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
 	moveq	r8, #1024
-	beq	.L1085
+	beq	.L1097
 	mov	r0, #1
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
@@ -9131,21 +9232,21 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4, #3772]	@ zero_extendqisi2
 	bl	NandcSetMode
 	cmn	r8, #1
-	beq	.L1086
-	ldr	r0, .L1104+4
+	beq	.L1098
+	ldr	r0, .L1116+4
 	mov	r2, r8
 	ldr	r1, [sp, #0]
 	bl	printk
 	cmp	r8, #9
-	bhi	.L1087
+	bhi	.L1099
 	add	r4, r4, fp, asl #3
 	ldr	r3, [r4, #864]
 	ldr	r2, [r3, #3840]
 	ldr	r2, [r3, #0]
 	orr	r2, r2, #131072
 	str	r2, [r3, #0]
-.L1087:
-	ldr	r3, .L1104+8
+.L1099:
+	ldr	r3, .L1116+8
 	ldr	r2, [r3, #168]
 	add	r2, r2, #1
 	str	r2, [r3, #168]
@@ -9153,15 +9254,15 @@ FlashDdrTunningRead:
 	movcs	sl, #0
 	strcs	sl, [r3, #168]
 	movcs	r9, sl
-	bcc	.L1086
-.L1085:
+	bcc	.L1098
+.L1097:
 	mov	r4, #0
 	str	fp, [sp, #4]
 	mov	r5, r4
 	mvn	r6, #0
 	mov	fp, r4
 	str	r4, [sp, #8]
-.L1092:
+.L1104:
 	uxtb	r0, r7
 	bl	NandcSetDdrPara
 	mov	r3, sl
@@ -9171,79 +9272,79 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	add	r3, r8, #1
 	cmp	r0, r3
-	bhi	.L1088
+	bhi	.L1100
 	cmp	r0, #2
-	bhi	.L1098
+	bhi	.L1110
 	add	r5, r5, #1
 	cmp	r5, #9
-	bls	.L1098
+	bls	.L1110
 	mov	ip, fp
 	rsb	r4, r5, r7
 	ldr	fp, [sp, #4]
 	mov	r8, r0
 	mov	r6, #0
-	b	.L1090
-.L1088:
+	b	.L1102
+.L1100:
 	cmp	fp, r5
-	bcs	.L1099
+	bcs	.L1111
 	cmp	r5, #7
 	rsb	r3, r5, r4
 	str	r3, [sp, #8]
-	bhi	.L1103
+	bhi	.L1115
 	mov	fp, r5
-	b	.L1099
-.L1098:
+	b	.L1111
+.L1110:
 	mov	r6, #0
 	mov	r4, r7
 	mov	r8, r0
 	mov	sl, r6
 	mov	r9, r6
-	b	.L1089
-.L1099:
+	b	.L1101
+.L1111:
 	mov	r5, #0
-.L1089:
+.L1101:
 	add	r7, r7, #2
 	cmp	r7, #69
-	bls	.L1092
+	bls	.L1104
 	mov	ip, fp
 	ldr	fp, [sp, #4]
-.L1090:
+.L1102:
 	cmp	ip, r5
-	bcc	.L1093
-	b	.L1091
-.L1103:
+	bcc	.L1105
+	b	.L1103
+.L1115:
 	ldr	fp, [sp, #4]
-.L1091:
+.L1103:
 	ldr	r4, [sp, #8]
-.L1093:
+.L1105:
 	cmp	r4, #0
-	beq	.L1094
-	ldr	r0, .L1104+12
+	beq	.L1106
+	ldr	r0, .L1116+12
 	mov	r1, r4
 	bl	printk
 	uxtb	r0, r4
 	bl	NandcSetDdrPara
-.L1094:
+.L1106:
 	cmn	r6, #1
-	bne	.L1086
-	ldr	r0, .L1104+16
+	bne	.L1098
+	ldr	r0, .L1116+16
 	mov	r1, fp
 	ldr	r2, [sp, #0]
 	bl	printk
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
 	moveq	r8, r6
-	beq	.L1086
+	beq	.L1098
 	ldr	r3, [sp, #12]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-.L1086:
+.L1098:
 	mov	r0, r8
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1105:
+.L1117:
 	.align	2
-.L1104:
+.L1116:
 	.word	.LANCHOR0
 	.word	.LC92
 	.word	.LANCHOR2
@@ -9261,7 +9362,7 @@ FlashDdrParaScan:
 	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 	.save {r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
-	ldr	r5, .L1110
+	ldr	r5, .L1122
 	mov	r4, #0
 	mov	r6, r1
 	ldrb	r0, [r5, #3772]	@ zero_extendqisi2
@@ -9281,30 +9382,30 @@ FlashDdrParaScan:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	cmn	r0, #1
-	beq	.L1107
+	beq	.L1119
 	cmn	r8, #1
-	bne	.L1108
-.L1107:
+	bne	.L1120
+.L1119:
 	ldrb	r3, [r5, #3772]	@ zero_extendqisi2
 	tst	r3, #1
-	beq	.L1108
+	beq	.L1120
 	mov	r0, #1
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
 	bl	NandcSetMode
-	ldr	r3, .L1110
+	ldr	r3, .L1122
 	mov	r2, #0
 	strb	r2, [r3, #3780]
-	b	.L1109
-.L1108:
+	b	.L1121
+.L1120:
 	mov	r3, #1
 	strb	r3, [r5, #3780]
-.L1109:
+.L1121:
 	mov	r0, #0
 	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1111:
+.L1123:
 	.align	2
-.L1110:
+.L1122:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -9324,11 +9425,11 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	cmn	r0, #1
 	mov	r4, r0
-	bne	.L1113
-	ldr	r7, .L1118
+	bne	.L1125
+	ldr	r7, .L1130
 	ldrb	r9, [r7, #860]	@ zero_extendqisi2
 	cmp	r9, #0
-	beq	.L1114
+	beq	.L1126
 	mov	r3, #0
 	mov	r0, r5
 	strb	r3, [r7, #860]
@@ -9339,12 +9440,12 @@ FlashReadPage:
 	strb	r9, [r7, #860]
 	cmn	r0, #1
 	movne	r4, r0
-	bne	.L1113
-.L1114:
-	ldr	r7, .L1118
+	bne	.L1125
+.L1126:
+	ldr	r7, .L1130
 	ldrb	r3, [r7, #3780]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1113
+	beq	.L1125
 	ldr	r3, [r7, #3012]
 	mov	r0, r5
 	mov	r1, r6
@@ -9356,22 +9457,22 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	cmn	r0, #1
 	mov	r4, r0
-	beq	.L1115
+	beq	.L1127
 	ldrb	r3, [r7, #3836]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1113
-.L1115:
+	bls	.L1125
+.L1127:
 	ubfx	r0, r9, #8, #8
 	bl	NandcSetDdrPara
-.L1113:
-	ldr	r7, .L1118+4
+.L1125:
+	ldr	r7, .L1130+4
 	ldr	ip, [r7, #172]
 	adds	r3, ip, #0
 	movne	r3, #1
 	cmn	r4, #1
 	movne	r3, #0
 	cmp	r3, #0
-	beq	.L1116
+	beq	.L1128
 	mov	r1, r6
 	mov	r2, r8
 	mov	r3, sl
@@ -9380,15 +9481,15 @@ FlashReadPage:
 	mov	r2, r5
 	mov	r3, r6
 	mov	r4, r0
-	ldr	r0, .L1118+8
+	ldr	r0, .L1130+8
 	mov	r1, r4
 	bl	printk
 	cmn	r4, #1
-	bne	.L1116
-	ldr	r3, .L1118
+	bne	.L1128
+	ldr	r3, .L1130
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1116
+	beq	.L1128
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	ip, [r7, #172]
@@ -9400,12 +9501,12 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1116:
+.L1128:
 	mov	r0, r4
 	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, pc}
-.L1119:
+.L1131:
 	.align	2
-.L1118:
+.L1130:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC95
@@ -9418,7 +9519,7 @@ FlashReadSlc2KPages:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1133
+	ldr	r3, .L1145
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r8, r1
@@ -9428,9 +9529,9 @@ FlashReadSlc2KPages:
 	ldrb	sl, [r3, #2901]	@ zero_extendqisi2
 	mov	r4, r0
 	mov	r7, #0
-	ldr	r6, .L1133+4
-	b	.L1121
-.L1130:
+	ldr	r6, .L1145+4
+	b	.L1133
+.L1142:
 	rsb	r3, r7, r8
 	add	r2, sp, #20
 	mov	r0, r4
@@ -9444,7 +9545,7 @@ FlashReadSlc2KPages:
 	cmp	r3, r2
 	mvncs	r3, #0
 	strcs	r3, [r4, #0]
-	bcs	.L1123
+	bcs	.L1135
 	add	r3, r6, r3
 	ldrb	r5, [r3, #3764]	@ zero_extendqisi2
 	mov	r0, r5
@@ -9503,48 +9604,48 @@ FlashReadSlc2KPages:
 	strne	r3, [r4, #0]
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L1128
+	beq	.L1140
 	ldr	r2, [r3, #8]
 	cmn	r2, #1
-	bne	.L1128
+	bne	.L1140
 	ldr	r3, [r3, #0]
 	cmn	r3, #1
 	strne	r2, [r4, #0]
-.L1128:
+.L1140:
 	ldr	r3, [r4, #0]
 	cmn	r3, #1
-	bne	.L1123
+	bne	.L1135
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1133+8
+	ldr	r0, .L1145+8
 	ldrb	r2, [r6, #3836]	@ zero_extendqisi2
 	bl	printk
 	ldr	r1, [r4, #8]
 	cmp	r1, #0
-	beq	.L1129
-	ldr	r0, .L1133+12
+	beq	.L1141
+	ldr	r0, .L1145+12
 	mov	r2, #4
 	mov	r3, #8
 	bl	rknand_print_hex
-.L1129:
+.L1141:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1123
+	beq	.L1135
 	mov	r2, #4
-	ldr	r0, .L1133+16
+	ldr	r0, .L1145+16
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1123:
+.L1135:
 	add	r7, r7, #1
 	add	r4, r4, #36
-.L1121:
+.L1133:
 	cmp	r7, r8
-	bne	.L1130
+	bne	.L1142
 	mov	r0, #0
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1134:
+.L1146:
 	.align	2
-.L1133:
+.L1145:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.word	.LC96
@@ -9559,7 +9660,7 @@ FlashReadPages:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1177
+	ldr	r3, .L1189
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.pad #52
@@ -9569,22 +9670,22 @@ FlashReadPages:
 	str	r1, [sp, #28]
 	str	r2, [sp, #32]
 	str	r3, [sp, #24]
-	ldr	r3, .L1177+4
+	ldr	r3, .L1189+4
 	ldrb	r8, [r3, #852]	@ zero_extendqisi2
 	ldrb	ip, [r3, #860]	@ zero_extendqisi2
 	cmp	r8, #0
 	str	ip, [sp, #36]
 	moveq	sl, r8
-	beq	.L1136
+	beq	.L1148
 	bl	FlashReadSlc2KPages
-	b	.L1137
-.L1164:
+	b	.L1149
+.L1176:
 	mov	r3, #36
 	ldr	ip, [sp, #28]
 	mul	r3, r3, sl
 	add	r2, sp, #44
 	ldr	r1, [sp, #32]
-	ldr	fp, .L1177+4
+	ldr	fp, .L1189+4
 	add	r6, r9, r3
 	str	r3, [sp, #16]
 	rsb	r3, sl, ip
@@ -9601,10 +9702,10 @@ FlashReadPages:
 	mvncs	r3, #0
 	mov	r7, r0
 	strcs	r3, [r9, ip]
-	bcs	.L1139
+	bcs	.L1151
 	add	r3, fp, r3
 	ldrb	r4, [r3, #3764]	@ zero_extendqisi2
-	ldr	r3, .L1177+8
+	ldr	r3, .L1189+8
 	mov	r0, r4
 	ldrb	r3, [r3, #176]	@ zero_extendqisi2
 	cmp	r3, #0
@@ -9615,21 +9716,21 @@ FlashReadPages:
 	sub	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #6
-	bhi	.L1141
+	bhi	.L1153
 	add	r1, fp, r4
 	cmp	r2, #7
 	add	fp, fp, r4
-	ldr	r2, .L1177+4
+	ldr	r2, .L1189+4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldreqb	r3, [r1, #20]	@ zero_extendqisi2
 	ldrb	r1, [fp, #3756]	@ zero_extendqisi2
 	cmp	r1, r3
-	beq	.L1141
+	beq	.L1153
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
 	add	r2, r2, #4
 	bl	HynixSetRRPara
-.L1141:
+.L1153:
 	mov	r0, r4
 	mov	r5, r5, lsr #31
 	bl	NandcFlashCs
@@ -9639,44 +9740,44 @@ FlashReadPages:
 	orreq	r5, r5, #1
 	str	r5, [sp, #20]
 	cmp	r5, #0
-	beq	.L1143
-	ldr	r3, .L1177+4
+	beq	.L1155
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1143
+	beq	.L1155
 	bl	flash_enter_slc_mode
-	b	.L1144
-.L1143:
+	b	.L1156
+.L1155:
 	bl	flash_exit_slc_mode
-.L1144:
-	ldr	fp, .L1177+4
-.L1176:
+.L1156:
+	ldr	fp, .L1189+4
+.L1188:
 	ldr	r1, [sp, #44]
 	cmn	r1, #1
 	cmpeq	r4, #255
 	moveq	r3, #0
 	movne	r3, #1
 	moveq	r7, r3
-	beq	.L1146
+	beq	.L1158
 	cmp	r7, #0
-	beq	.L1147
+	beq	.L1159
 	ldr	r2, [fp, #856]
 	mov	r0, r4
 	add	r2, r1, r2
 	bl	FlashReadDpCmd
-	b	.L1148
-.L1147:
+	b	.L1160
+.L1159:
 	mov	r0, r4
 	bl	FlashReadCmd
-.L1148:
+.L1160:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	cmp	r7, #0
-	beq	.L1146
+	beq	.L1158
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	bl	FlashReadDpDataOutCmd
-.L1146:
+.L1158:
 	ldr	r3, [r6, #12]
 	mov	r0, r4
 	ldr	r2, [sp, #24]
@@ -9693,12 +9794,12 @@ FlashReadPages:
 	movne	r2, #0
 	movne	r7, #0
 	strneb	r2, [fp, #860]
-	bne	.L1176
-.L1149:
+	bne	.L1188
+.L1161:
 	cmp	r7, #0
 	mov	r5, r0
-	beq	.L1150
-	ldr	r3, .L1177+4
+	beq	.L1162
+	ldr	r3, .L1189+4
 	mov	r0, r4
 	ldr	r1, [r3, #856]
 	ldr	r3, [sp, #44]
@@ -9719,17 +9820,17 @@ FlashReadPages:
 	cmn	r0, #1
 	mov	r8, r0
 	moveq	r7, #0
-.L1150:
+.L1162:
 	mov	r0, r4
-	ldr	fp, .L1177+4
+	ldr	fp, .L1189+4
 	bl	NandcFlashDeCs
 	ldr	ip, [sp, #36]
 	cmn	r5, #1
 	strb	ip, [fp, #860]
-	bne	.L1154
+	bne	.L1166
 	ldrb	r3, [fp, #3780]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1152
+	beq	.L1164
 	ldr	r3, [fp, #3012]
 	mov	r0, r4
 	ldr	r1, [sp, #44]
@@ -9741,68 +9842,68 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	cmn	r0, #1
 	mov	r5, r0
-	beq	.L1153
+	beq	.L1165
 	ldrb	r3, [fp, #3836]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1170
-.L1153:
+	bls	.L1182
+.L1165:
 	ubfx	r0, r7, #8, #8
 	bl	NandcSetDdrPara
 	cmn	r5, #1
-	bne	.L1170
-.L1152:
-	ldr	r3, .L1177+8
+	bne	.L1182
+.L1164:
+	ldr	r3, .L1189+8
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r6, #8]
 	ldr	r7, [r3, #172]
 	ldr	r3, [r6, #12]
 	cmp	r7, #0
-	beq	.L1155
+	beq	.L1167
 	blx	r7
 	cmn	r0, #1
 	mov	r5, r0
-	bne	.L1172
-	ldr	r2, .L1177+4
+	bne	.L1184
+	ldr	r2, .L1189+4
 	ldr	r3, [r2, #3624]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	sub	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #6
-	bhi	.L1157
+	bhi	.L1169
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
 	add	r2, r2, #4
 	mov	r3, #0
 	bl	HynixSetRRPara
-.L1157:
+.L1169:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	ldr	r2, [r6, #8]
 	ldr	r3, [r6, #12]
 	bl	FlashReadRawPage
-	ldr	r7, .L1177+4
+	ldr	r7, .L1189+4
 	ldr	r1, [r6, #4]
 	ldrb	r2, [r7, #3836]	@ zero_extendqisi2
 	mov	r5, r0
-	ldr	r0, .L1177+12
+	ldr	r0, .L1189+12
 	mov	r3, r5
 	bl	printk
 	cmn	r5, #1
-	bne	.L1172
+	bne	.L1184
 	ldrb	r7, [r7, #928]	@ zero_extendqisi2
 	cmp	r7, #0
-	beq	.L1156
+	beq	.L1168
 	ldr	ip, [sp, #20]
 	mov	r0, r4
 	cmp	ip, #0
-	beq	.L1158
+	beq	.L1170
 	bl	flash_enter_slc_mode
-	b	.L1159
-.L1158:
+	b	.L1171
+.L1170:
 	bl	flash_exit_slc_mode
-.L1159:
-	ldr	r3, .L1177+8
+.L1171:
+	ldr	r3, .L1189+8
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r6, #8]
@@ -9810,27 +9911,27 @@ FlashReadPages:
 	ldr	r3, [r6, #12]
 	blx	ip
 	mov	r5, r0
-	b	.L1172
-.L1155:
+	b	.L1184
+.L1167:
 	bl	FlashReadRawPage
 	mov	r5, r0
-	b	.L1156
-.L1170:
+	b	.L1168
+.L1182:
 	mov	r7, #0
-.L1154:
-	ldr	r3, .L1177+4
+.L1166:
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3, #3836]	@ zero_extendqisi2
 	add	r3, r3, r3, asl #1
 	cmp	r5, r3, lsr #2
-	bls	.L1156
-	ldr	r3, .L1177+8
+	bls	.L1168
+	ldr	r3, .L1189+8
 	ldr	r3, [r3, #172]
 	cmp	r3, #0
 	moveq	r5, #256
-	b	.L1156
-.L1172:
+	b	.L1168
+.L1184:
 	mov	r7, #0
-.L1156:
+.L1168:
 	ldr	ip, [sp, #16]
 	cmp	r5, #256
 	cmnne	r5, #1
@@ -9840,32 +9941,32 @@ FlashReadPages:
 	ldr	ip, [sp, #16]
 	ldr	r3, [r9, ip]
 	cmn	r3, #1
-	bne	.L1161
-	ldr	r2, .L1177+4
+	bne	.L1173
+	ldr	r2, .L1189+4
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1177+16
+	ldr	r0, .L1189+16
 	ldrb	r2, [r2, #3836]	@ zero_extendqisi2
 	bl	printk
 	ldr	r1, [r6, #12]
 	cmp	r1, #0
-	beq	.L1161
+	beq	.L1173
 	mov	r2, #4
-	ldr	r0, .L1177+20
+	ldr	r0, .L1189+20
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1161:
+.L1173:
 	cmp	r7, #0
-	beq	.L1162
-	ldr	r3, .L1177+4
+	beq	.L1174
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3, #3836]	@ zero_extendqisi2
 	add	r3, r3, r3, asl #1
 	cmp	r8, r3, lsr #2
-	bls	.L1163
-	ldr	r3, .L1177+8
+	bls	.L1175
+	ldr	r3, .L1189+8
 	ldr	r3, [r3, #172]
 	cmp	r3, #0
 	moveq	r8, #256
-.L1163:
+.L1175:
 	add	r3, sl, #1
 	mov	r2, #36
 	cmp	r8, #256
@@ -9874,30 +9975,30 @@ FlashReadPages:
 	movne	r2, #0
 	str	r8, [r9, r3]
 	strne	r2, [r9, r3]
-.L1162:
+.L1174:
 	ldr	ip, [sp, #20]
 	add	sl, sl, r7
 	cmp	ip, #0
-	beq	.L1139
-	ldr	r3, .L1177+4
+	beq	.L1151
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1139
+	beq	.L1151
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1139:
+.L1151:
 	add	sl, sl, #1
-.L1136:
+.L1148:
 	ldr	ip, [sp, #28]
 	cmp	sl, ip
-	bcc	.L1164
+	bcc	.L1176
 	mov	r0, #0
-.L1137:
+.L1149:
 	add	sp, sp, #52
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1178:
+.L1190:
 	.align	2
-.L1177:
+.L1189:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.word	.LANCHOR2
@@ -9913,7 +10014,7 @@ FtlGcScanTempBlk:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1204
+	ldr	r2, .L1216
 	movw	r3, #3000
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
@@ -9924,38 +10025,38 @@ FtlGcScanTempBlk:
 	mov	r5, r0
 	str	r1, [sp, #20]
 	cmp	r4, r3
-	beq	.L1200
+	beq	.L1212
 	cmp	r4, #0
-	bne	.L1180
-	b	.L1181
-.L1200:
+	bne	.L1192
+	b	.L1193
+.L1212:
 	mov	r4, #0
-.L1180:
-	ldr	r2, .L1204+4
+.L1192:
+	ldr	r2, .L1216+4
 	movw	r3, #3916
 	ldr	fp, [sp, #20]
 	ldrh	r3, [r2, r3]
 	cmp	fp, r3
-	bne	.L1182
-.L1181:
+	bne	.L1194
+.L1193:
 	bl	FtlGcPageVarInit
-.L1182:
+.L1194:
 	mov	r7, #0
 	movw	r8, #65535
 	mov	sl, r7
 	mvn	r3, #0
 	str	r3, [sp, #16]
-.L1195:
+.L1207:
 	ldrh	r3, [r5, #0]
 	strb	sl, [r5, #8]
 	cmp	r3, r8
-	beq	.L1201
-.L1184:
-.L1202:
-	ldr	r3, .L1204+4
+	beq	.L1213
+.L1196:
+.L1214:
+	ldr	r3, .L1216+4
 	movw	r2, #3848
 	ldrh	r9, [r3, r2]
-	ldr	r2, .L1204+8
+	ldr	r2, .L1216+8
 	ldr	lr, [r2, #-972]
 	ldr	ip, [r2, #-1168]
 	movw	r2, #3928
@@ -9964,11 +10065,11 @@ FtlGcScanTempBlk:
 	mov	r6, r3
 	str	r2, [sp, #12]
 	mov	r2, r5
-	b	.L1185
-.L1187:
+	b	.L1197
+.L1199:
 	ldrh	r0, [r2, #16]
 	cmp	r0, r8
-	beq	.L1186
+	beq	.L1198
 	mov	fp, #36
 	orr	r0, r4, r0, asl #10
 	mla	r1, fp, r6, lr
@@ -9983,14 +10084,14 @@ FtlGcScanTempBlk:
 	bic	r0, r0, #3
 	add	r0, ip, r0
 	str	r0, [r1, #12]
-.L1186:
+.L1198:
 	add	r3, r3, #1
 	add	r2, r2, #2
 	uxth	r3, r3
-.L1185:
+.L1197:
 	cmp	r3, r9
-	bne	.L1187
-	ldr	r9, .L1204+8
+	bne	.L1199
+	ldr	r9, .L1216+8
 	mov	r1, r6
 	mov	r2, #0
 	ldr	r0, [r9, #-972]
@@ -9999,8 +10100,8 @@ FtlGcScanTempBlk:
 	mul	r3, r3, r6
 	mov	r6, #0
 	str	r3, [sp, #12]
-	b	.L1188
-.L1196:
+	b	.L1200
+.L1208:
 	ldr	r1, [r9, #-972]
 	add	r3, r1, r6
 	ldr	fp, [r3, #4]
@@ -10012,55 +10113,54 @@ FtlGcScanTempBlk:
 	ldr	r1, [r1, r6]
 	cmp	r1, #0
 	mov	r2, r0
-	bne	.L1189
+	bne	.L1201
 	ldr	r3, [r3, #12]
 	add	r6, r6, #36
 	ldrh	r1, [r3, #0]
 	cmp	r1, r8
-	ldreq	r3, .L1204+8
+	ldreq	r3, .L1216+8
 	moveq	r1, #1
 	streq	r1, [r3, #-1012]
-	beq	.L1183
-.L1190:
+	beq	.L1195
+.L1202:
 	ldr	r0, [r3, #12]
 	mov	r1, fp
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-	b	.L1188
-.L1189:
+	b	.L1200
+.L1201:
 	mov	r2, fp
-	ldr	r0, .L1204+12
+	ldr	r0, .L1216+12
 	ldrh	r1, [r5, #0]
 	bl	printk
-	ldr	r3, .L1204+4
+	ldr	r3, .L1216+4
 	ldr	r2, [r3, #3840]
 	cmp	r2, #0
-	bne	.L1191
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1192
-.L1191:
-	ldr	r2, .L1204+8
-	ldrh	r3, [r5, #0]
-	ldr	r2, [r2, #-2080]
-	mov	r3, r3, asl #1
+	bne	.L1203
+	ldrb	r2, [r3, #928]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L1204
+.L1203:
+	ldrh	r1, [r5, #0]
+	ldr	r2, [r3, #4048]
+	mov	r3, r1, asl #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #119
-	bls	.L1193
-.L1192:
-	ldr	r3, .L1204+8
+	bls	.L1205
+.L1204:
+	ldr	r3, .L1216+8
 	ldr	r3, [r3, #-972]
 	ldr	r3, [r3, r6]
 	cmn	r3, #1
-	bne	.L1194
-.L1193:
-	ldr	r3, .L1204+8
+	bne	.L1206
+.L1205:
+	ldr	r3, .L1216+8
 	ldr	r3, [r3, #-972]
 	add	r6, r3, r6
 	ldr	r6, [r6, #4]
 	str	r6, [sp, #16]
-.L1194:
-	ldr	r2, .L1204+8
+.L1206:
+	ldr	r2, .L1216+8
 	mov	r4, #0
 	ldrh	r3, [r5, #0]
 	ldr	r2, [r2, #-2016]
@@ -10071,39 +10171,39 @@ FtlGcScanTempBlk:
 	mvn	r3, #0
 	strh	r3, [r5, #0]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1195
-.L1188:
+	b	.L1207
+.L1200:
 	ldr	r3, [sp, #12]
 	cmp	r6, r3
-	bne	.L1196
+	bne	.L1208
 	ldr	fp, [sp, #20]
 	add	r7, r7, #1
 	add	r4, r4, #1
 	cmp	r7, fp
 	uxth	r4, r4
-	bcc	.L1197
-	ldr	r2, .L1204
+	bcc	.L1209
+	ldr	r2, .L1216
 	movw	r3, #3000
 	ldrh	r1, [r2, r3]
 	cmp	r1, r8
-	beq	.L1197
+	beq	.L1209
 	add	r1, r1, r7
 	strh	r1, [r2, r3]	@ movhi
-	ldr	r2, .L1204+4
+	ldr	r2, .L1216+4
 	add	r3, r3, #916
 	ldrh	r3, [r2, r3]
 	cmp	r3, r4
-	bhi	.L1198
-.L1197:
-	ldr	r2, .L1204+4
+	bhi	.L1210
+.L1209:
+	ldr	r2, .L1216+4
 	movw	r3, #3916
 	ldrh	r3, [r2, r3]
 	cmp	r3, r4
-	bhi	.L1202
-.L1201:
+	bhi	.L1214
+.L1213:
 	mov	r2, #0
-.L1183:
-	ldr	r1, .L1204
+.L1195:
+	ldr	r1, .L1216
 	movw	r3, #3000
 	mvn	r0, #0
 	strh	r4, [r5, #2]	@ movhi
@@ -10112,13 +10212,13 @@ FtlGcScanTempBlk:
 	mov	r0, r5
 	mov	r1, r4
 	bl	ftl_sb_update_avl_pages
-.L1198:
+.L1210:
 	ldr	r0, [sp, #16]
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1205:
+.L1217:
 	.align	2
-.L1204:
+.L1216:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.word	.LANCHOR2
@@ -10126,104 +10226,433 @@ FtlGcScanTempBlk:
 	.fnend
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.align	2
-	.global	FtlScanSysBlk
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
+	.global	FtlScanAllBlock
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.pad #84
+	sub	sp, sp, #84
+	ldr	r0, .L1228
+	mov	r5, #0
+	ldr	r1, .L1228+4
+	bl	printk
+	ldr	r7, .L1228+8
+	b	.L1219
+.L1227:
+	add	r4, sp, #80
+	mov	r0, r5
+	ldr	r6, .L1228+12
+	mov	r9, #36
+	strh	r5, [r4, #-48]!	@ movhi
+	bl	ftl_get_blk_mode
+	mov	r2, r5, asl #1
+	ldr	ip, [r6, #-2016]
+	mov	r1, r5
+	ldrh	r2, [ip, r2]
+	mov	r3, r0
+	ldr	r0, .L1228+16
+	bl	printk
+	mov	r0, r4
+	bl	make_superblock
+	movw	r3, #3848
+	ldrh	sl, [r7, r3]
+	add	r3, r3, #78
+	add	r0, r4, #14
+	mov	r4, #0
+	ldrh	r3, [r7, r3]
+	ldr	r8, [r6, #-972]
+	ldr	lr, [r6, #-1172]
+	str	r3, [sp, #28]
+	movw	r3, #3928
+	ldrh	ip, [r7, r3]
+	mov	r3, r4
+	ldr	r6, [r6, #-1168]
+	b	.L1220
+.L1222:
+	ldrh	r1, [r0, #2]!
+	movw	r2, #65535
+	cmp	r1, r2
+	beq	.L1221
+	mla	r2, r9, r4, r8
+	ldr	fp, [sp, #28]
+	mov	r1, r1, asl #10
+	str	r1, [r2, #4]
+	mul	r1, fp, r4
+	add	fp, r1, #3
+	cmp	r1, #0
+	movlt	r1, fp
+	bic	r1, r1, #3
+	add	r1, lr, r1
+	str	r1, [r2, #8]
+	mul	r1, ip, r4
+	add	r4, r4, #1
+	uxth	r4, r4
+	add	fp, r1, #3
+	cmp	r1, #0
+	movlt	r1, fp
+	bic	r1, r1, #3
+	add	r1, r6, r1
+	str	r1, [r2, #12]
+.L1221:
+	add	r3, r3, #1
+	uxth	r3, r3
+.L1220:
+	cmp	r3, sl
+	bne	.L1222
+	ldr	sl, .L1228+12
+	mov	r1, r4
+	mov	r2, #0
 	mov	r6, #0
-	ldr	r5, .L1264
-	.pad #28
-	sub	sp, sp, #28
-	ldr	r4, .L1264+4
-	mov	r1, r6
-	ldr	r3, .L1264+8
-	mov	r7, #3936
-	ldr	r2, [r5, #3944]
-	ldr	r0, [r4, #-1036]
-	mov	sl, r4
-	strh	r6, [r4, r3]	@ movhi
-	movw	r3, #3962
-	strh	r6, [r5, r3]	@ movhi
-	mov	r2, r2, asl #2
-	bl	ftl_memset
-	ldr	r2, [r5, #3944]
-	mov	r1, r6
-	ldr	r0, [r4, #-1040]
-	mov	r2, r2, asl #1
-	bl	ftl_memset
-	ldrh	r2, [r5, r7]
-	mov	r1, r6
-	ldr	r0, [r4, #-908]
-	mov	r2, r2, asl #2
-	bl	ftl_memset
-	ldrh	r2, [r5, r7]
-	mov	r1, r6
-	ldr	r0, [r5, #3964]
-	mov	r2, r2, asl #1
-	bl	ftl_memset
-	ldr	r0, .L1264+12
-	mov	r1, #255
-	mov	r2, #12
-	bl	ftl_memset
-	mov	r3, #3856
-	ldrh	r3, [r5, r3]
-	str	r3, [sp, #8]
-	b	.L1207
-.L1209:
-	add	r3, r6, r5
-	ldr	r1, [sp, #8]
-	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
-	bl	V2P_block
-	str	r0, [sp, #0]
-	bl	FtlBbmIsBadBlock
-	ldr	r3, [sp, #0]
-	cmp	r0, #0
-	bne	.L1208
-	ldr	r2, [r4, #-972]
-	mov	r3, r3, asl #10
-	mla	r2, r9, r7, r2
-	str	r3, [r2, #4]
-	ldr	r3, [r4, #-1172]
-	str	r3, [r2, #8]
-	ldrh	r3, [r6, r8]
-	mul	r3, r3, r7
-	add	r7, r7, #1
-	uxth	r7, r7
-	add	r1, r3, #3
-	cmp	r3, #0
-	movlt	r3, r1
-	ldr	r1, [r4, #-1168]
-	bic	r3, r3, #3
-	add	r3, r1, r3
-	str	r3, [r2, #12]
-.L1208:
+	mov	r8, r6
+	ldr	r0, [sl, #-972]
+	bl	FlashReadPages
+	b	.L1223
+.L1224:
+	ldr	r2, [sl, #-972]
+	add	r8, r8, #1
+	ldrh	r1, [sp, #32]
+	add	r3, r2, r6
+	uxth	r8, r8
+	ldr	r0, [r3, #12]
+	ldr	ip, [r3, #8]
+	ldr	lr, [r0, #0]
+	str	lr, [sp, #0]
+	ldr	lr, [r0, #4]
+	str	lr, [sp, #4]
+	ldr	lr, [r0, #8]
+	str	lr, [sp, #8]
+	ldr	r0, [r0, #12]
+	str	r0, [sp, #12]
+	ldr	r0, [ip, #0]
+	str	r0, [sp, #16]
+	ldr	r0, [ip, #4]
+	str	r0, [sp, #20]
+	ldr	r0, .L1228+20
+	ldr	r2, [r2, r6]
+	add	r6, r6, #36
+	ldr	r3, [r3, #4]
+	bl	printk
+.L1223:
+	cmp	r8, r4
+	ldr	r9, .L1228+12
+	bne	.L1224
+	ldr	r0, [r9, #-972]
+	mov	r1, r4
+	mov	r2, #1
+	mov	r6, #0
+	bl	FlashReadPages
+	mov	r8, r6
+	mov	sl, r9
+	b	.L1225
+.L1226:
+	ldr	r2, [sl, #-972]
+	add	r8, r8, #1
+	ldrh	r1, [sp, #32]
+	add	r3, r2, r6
+	uxth	r8, r8
+	ldr	r0, [r3, #12]
+	ldr	ip, [r3, #8]
+	ldr	lr, [r0, #0]
+	str	lr, [sp, #0]
+	ldr	lr, [r0, #4]
+	str	lr, [sp, #4]
+	ldr	lr, [r0, #8]
+	str	lr, [sp, #8]
+	ldr	r0, [r0, #12]
+	str	r0, [sp, #12]
+	ldr	r0, [ip, #0]
+	str	r0, [sp, #16]
+	ldr	r0, [ip, #4]
+	str	r0, [sp, #20]
+	ldr	r0, .L1228+24
+	ldr	r2, [r2, r6]
+	add	r6, r6, #36
+	ldr	r3, [r3, #4]
+	bl	printk
+.L1225:
+	cmp	r8, r4
+	bne	.L1226
 	add	r5, r5, #1
 	uxth	r5, r5
-	b	.L1242
-.L1255:
-	mov	r7, #0
-	movw	fp, #3848
-	mov	r5, r7
-	mov	r9, #36
-	movw	r8, #3928
-.L1242:
-	ldrh	r3, [r6, fp]
+.L1219:
+	movw	r3, #3858
+	ldrh	r3, [r7, r3]
 	cmp	r3, r5
-	bhi	.L1209
+	bhi	.L1227
+	mov	r0, #0
+	add	sp, sp, #84
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1229:
+	.align	2
+.L1228:
+	.word	.LC101
+	.word	.LANCHOR3+15
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC102
+	.word	.LC103
+	.word	.LC104
+	.fnend
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
+	.align	2
+	.global	FtlDumpBlockInfo
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	ubfx	r0, r0, #10, #16
+	.pad #84
+	sub	sp, sp, #84
+	mov	r7, r1
+	bl	P2V_block_in_plane
+	ldr	r5, .L1241
+	ldr	r1, .L1241+4
+	movw	r6, #3916
+	ldrh	r9, [r5, r6]
+	mov	r4, r0
+	ldr	r0, .L1241+8
+	bl	printk
+	ldr	r3, .L1241+12
+	mov	r1, r4
+	ldr	r0, .L1241+16
+	ldr	r2, [r3, #-2016]
+	mov	r3, r4, asl #1
+	ldrh	r2, [r2, r3]
+	bl	printk
+	add	r0, sp, #80
+	strh	r4, [r0, #-48]!	@ movhi
+	bl	make_superblock
+	rsbs	r7, r7, #1
+	ldrb	r3, [r5, #928]	@ zero_extendqisi2
+	movcc	r7, #0
+	cmp	r3, #0
+	moveq	r7, #0
 	cmp	r7, #0
-	beq	.L1210
-	ldr	r0, [r4, #-972]
+	beq	.L1231
+	mov	r0, r4
+	bl	ftl_get_blk_mode
+	cmp	r0, #1
+	mov	r7, r0
+	movweq	r3, #3918
+	ldreqh	r9, [r5, r3]
+.L1231:
+	ldrh	r3, [r5, r6]
 	mov	r1, r7
-	mov	r2, #1
-	mov	fp, r7
-	bl	FlashReadPages
-	mov	r8, #0
-	str	r8, [sp, #12]
+	ldr	r0, .L1241+20
+	mov	r2, r9
+	bl	printk
+	mov	r6, #0
+.L1232:
+	ldr	r3, .L1241
+	movw	r2, #3848
+	movw	r1, #3926
+	mov	r4, #0
+	add	r0, sp, #46
+	ldrh	sl, [r3, r2]
+	ldr	r2, .L1241+12
+	ldrh	lr, [r3, r1]
+	ldr	r8, [r2, #-972]
+	ldr	r5, [r2, #-1172]
+	ldr	ip, [r2, #-1168]
+	movw	r2, #3928
+	ldrh	r2, [r3, r2]
+	mov	r3, r4
+	str	r2, [sp, #28]
+	b	.L1233
+.L1235:
+	ldrh	r1, [r0, #2]!
+	movw	r2, #65535
+	cmp	r1, r2
+	beq	.L1234
+	mov	fp, #36
+	orr	r1, r6, r1, asl #10
+	mla	r2, fp, r4, r8
+	str	r1, [r2, #4]
+	mul	r1, lr, r4
+	add	fp, r1, #3
+	cmp	r1, #0
+	movlt	r1, fp
+	ldr	fp, [sp, #28]
+	bic	r1, r1, #3
+	add	r1, r5, r1
+	str	r1, [r2, #8]
+	mul	r1, fp, r4
+	add	r4, r4, #1
+	uxth	r4, r4
+	add	fp, r1, #3
+	cmp	r1, #0
+	movlt	r1, fp
+	bic	r1, r1, #3
+	add	r1, ip, r1
+	str	r1, [r2, #12]
+.L1234:
+	add	r3, r3, #1
+	uxth	r3, r3
+.L1233:
+	cmp	r3, sl
+	bne	.L1235
+	ldr	r8, .L1241+12
+	mov	r1, r4
+	mov	r2, r7
+	mov	r5, #0
+	mov	sl, r5
+	ldr	r0, [r8, #-972]
+	bl	FlashReadPages
+	b	.L1236
+.L1237:
+	ldr	r2, [r8, #-972]
+	add	sl, sl, #1
+	ldrh	r1, [sp, #32]
+	add	r3, r2, r5
+	uxth	sl, sl
+	ldr	r0, [r3, #12]
+	ldr	ip, [r3, #8]
+	ldr	lr, [r0, #0]
+	str	lr, [sp, #0]
+	ldr	lr, [r0, #4]
+	str	lr, [sp, #4]
+	ldr	lr, [r0, #8]
+	str	lr, [sp, #8]
+	ldr	r0, [r0, #12]
+	str	r0, [sp, #12]
+	ldr	r0, [ip, #0]
+	str	r0, [sp, #16]
+	ldr	r0, [ip, #4]
+	str	r0, [sp, #20]
+	ldr	r0, .L1241+24
+	ldr	r2, [r2, r5]
+	add	r5, r5, #36
+	ldr	r3, [r3, #4]
+	bl	printk
+.L1236:
+	cmp	sl, r4
+	bne	.L1237
+	add	r6, r6, #1
+	uxth	r6, r6
+	cmp	r6, r9
+	bne	.L1232
+.L1238:
+	mov	r0, #0
+	add	sp, sp, #84
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1242:
+	.align	2
 .L1241:
+	.word	.LANCHOR0
+	.word	.LANCHOR3+31
+	.word	.LC101
+	.word	.LANCHOR2
+	.word	.LC105
+	.word	.LC106
+	.word	.LC107
+	.fnend
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.align	2
+	.global	FtlScanSysBlk
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	mov	r6, #0
+	ldr	r5, .L1301
+	.pad #28
+	sub	sp, sp, #28
+	ldr	r4, .L1301+4
+	mov	r1, r6
+	ldr	r3, .L1301+8
+	mov	r7, #3936
+	ldr	r2, [r5, #3944]
+	ldr	r0, [r4, #-1036]
+	mov	sl, r4
+	strh	r6, [r4, r3]	@ movhi
+	movw	r3, #3962
+	strh	r6, [r5, r3]	@ movhi
+	mov	r2, r2, asl #2
+	bl	ftl_memset
+	ldr	r2, [r5, #3944]
+	mov	r1, r6
+	ldr	r0, [r4, #-1040]
+	mov	r2, r2, asl #1
+	bl	ftl_memset
+	ldrh	r2, [r5, r7]
+	mov	r1, r6
+	ldr	r0, [r4, #-908]
+	mov	r2, r2, asl #2
+	bl	ftl_memset
+	ldrh	r2, [r5, r7]
+	mov	r1, r6
+	ldr	r0, [r5, #3964]
+	mov	r2, r2, asl #1
+	bl	ftl_memset
+	ldr	r0, .L1301+12
+	mov	r1, #255
+	mov	r2, #12
+	bl	ftl_memset
+	mov	r3, #3856
+	ldrh	r3, [r5, r3]
+	str	r3, [sp, #8]
+	b	.L1244
+.L1246:
+	add	r3, r6, r5
+	ldr	r1, [sp, #8]
+	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #0]
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #0]
+	cmp	r0, #0
+	bne	.L1245
+	ldr	r2, [r4, #-972]
+	mov	r3, r3, asl #10
+	mla	r2, r9, r7, r2
+	str	r3, [r2, #4]
+	ldr	r3, [r4, #-1172]
+	str	r3, [r2, #8]
+	ldrh	r3, [r6, r8]
+	mul	r3, r3, r7
+	add	r7, r7, #1
+	uxth	r7, r7
+	add	r1, r3, #3
+	cmp	r3, #0
+	movlt	r3, r1
+	ldr	r1, [r4, #-1168]
+	bic	r3, r3, #3
+	add	r3, r1, r3
+	str	r3, [r2, #12]
+.L1245:
+	add	r5, r5, #1
+	uxth	r5, r5
+	b	.L1279
+.L1292:
+	mov	r7, #0
+	movw	fp, #3848
+	mov	r5, r7
+	mov	r9, #36
+	movw	r8, #3928
+.L1279:
+	ldrh	r3, [r6, fp]
+	cmp	r3, r5
+	bhi	.L1246
+	cmp	r7, #0
+	beq	.L1247
+	ldr	r0, [r4, #-972]
+	mov	r1, r7
+	mov	r2, #1
+	mov	fp, r7
+	bl	FlashReadPages
+	mov	r8, #0
+	str	r8, [sp, #12]
+.L1278:
 	ldr	r3, [r4, #-972]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
@@ -10231,9 +10660,9 @@ FtlScanSysBlk:
 	cmn	r3, #1
 	ldr	r5, [r2, #12]
 	ubfx	r6, r6, #10, #16
-	bne	.L1211
+	bne	.L1248
 	mov	r7, #16
-.L1213:
+.L1250:
 	ldr	r0, [r4, #-972]
 	mov	r1, #1
 	mov	r2, r1
@@ -10248,53 +10677,53 @@ FtlScanSysBlk:
 	ldreq	r3, [sl, #-972]
 	mvneq	r2, #0
 	streq	r2, [r3, r8]
-	beq	.L1211
-.L1212:
+	beq	.L1248
+.L1249:
 	ldr	r3, [r4, #-972]
 	ldr	r3, [r3, r8]
 	cmn	r3, #1
-	bne	.L1211
+	bne	.L1248
 	sub	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, #0
-	bne	.L1213
-.L1211:
+	bne	.L1250
+.L1248:
 	ldr	r3, [r4, #-972]
 	ldr	r3, [r3, r8]
 	cmn	r3, #1
-	beq	.L1214
+	beq	.L1251
 	ldr	r2, [r4, #-1804]
 	ldr	r3, [r5, #4]
 	cmn	r2, #1
-	beq	.L1215
+	beq	.L1252
 	cmp	r2, r3
-	bhi	.L1216
-.L1215:
+	bhi	.L1253
+.L1252:
 	cmn	r3, #1
 	addne	r3, r3, #1
 	strne	r3, [sl, #-1804]
-.L1216:
+.L1253:
 	ldrh	r3, [r5, #0]
 	movw	r2, #61604
 	cmp	r3, r2
-	beq	.L1219
-	bhi	.L1222
+	beq	.L1256
+	bhi	.L1259
 	movw	r2, #61574
 	cmp	r3, r2
-	bne	.L1217
-	b	.L1262
-.L1222:
+	bne	.L1254
+	b	.L1299
+.L1259:
 	movw	r2, #61634
 	cmp	r3, r2
-	beq	.L1220
+	beq	.L1257
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1217
-	b	.L1263
-.L1220:
-	ldr	r3, .L1264
+	bne	.L1254
+	b	.L1300
+.L1257:
+	ldr	r3, .L1301
 	mov	r9, r6
-	ldr	r1, .L1264+8
+	ldr	r1, .L1301+8
 	ldr	ip, [r4, #-1036]
 	ldr	r0, [r3, #3944]
 	ldrh	r1, [r4, r1]
@@ -10305,28 +10734,28 @@ FtlScanSysBlk:
 	uxth	r3, r3
 	sxth	r2, r2
 	str	r2, [sp, #4]
-	b	.L1223
-.L1229:
+	b	.L1260
+.L1266:
 	mov	r6, r2, asl #2
 	ldr	r7, [r5, #4]
 	str	r6, [sp, #16]
 	ldr	r6, [ip, r2, asl #2]
 	cmp	r7, r6
-	bls	.L1224
+	bls	.L1261
 	ldr	ip, [ip, #0]
 	mov	r6, r9
 	cmp	ip, #0
-	bne	.L1225
+	bne	.L1262
 	cmp	r1, r0
 	addne	r1, r1, #1
-	ldrne	r0, .L1264+8
+	ldrne	r0, .L1301+8
 	strneh	r1, [r4, r0]	@ movhi
-.L1225:
+.L1262:
 	mov	r0, #0
 	sxth	r9, r3
 	str	r3, [sp, #4]
-	b	.L1226
-.L1227:
+	b	.L1263
+.L1264:
 	ldr	r7, [r4, #-1036]
 	add	ip, r1, #1
 	add	r0, r0, #1
@@ -10338,10 +10767,10 @@ FtlScanSysBlk:
 	ldr	r7, [r4, #-1040]
 	ldrh	ip, [r7, ip]
 	strh	ip, [r7, r1]	@ movhi
-.L1226:
+.L1263:
 	sxth	r1, r0
 	cmp	r1, r9
-	bne	.L1227
+	bne	.L1264
 	ldr	r1, [sl, #-1036]
 	mov	r2, r2, asl #1
 	ldr	r0, [r5, #4]
@@ -10350,29 +10779,29 @@ FtlScanSysBlk:
 	str	r0, [r1, ip]
 	ldr	r1, [sl, #-1040]
 	strh	r6, [r1, r2]	@ movhi
-	b	.L1228
-.L1224:
+	b	.L1265
+.L1261:
 	sub	r3, r3, #1
 	uxth	r3, r3
-.L1223:
+.L1260:
 	ldr	r6, [sp, #4]
 	sxth	r2, r3
 	cmp	r2, r6
-	bgt	.L1229
+	bgt	.L1266
 	mov	r6, r9
-.L1228:
+.L1265:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1217
-	ldr	r2, .L1264+8
-	ldr	r0, .L1264
+	blt	.L1254
+	ldr	r2, .L1301+8
+	ldr	r0, .L1301
 	ldrh	r1, [r4, r2]
 	ldr	r0, [r0, #3944]
 	rsb	r0, r1, r0
 	sub	r0, r0, #1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1217
+	bgt	.L1254
 	add	r1, r1, #1
 	strh	r1, [r4, r2]	@ movhi
 	ldr	r2, [r4, #-1036]
@@ -10380,9 +10809,9 @@ FtlScanSysBlk:
 	str	r1, [r2, r3, asl #2]
 	mov	r3, r3, asl #1
 	ldr	r2, [r4, #-1040]
-	b	.L1259
-.L1262:
-	ldr	r1, .L1264
+	b	.L1296
+.L1299:
+	ldr	r1, .L1301
 	mov	r3, #3936
 	movw	ip, #3962
 	mov	r9, r6
@@ -10393,31 +10822,31 @@ FtlScanSysBlk:
 	uxth	r3, r2
 	rsb	r2, r1, r2
 	str	r2, [sp, #4]
-	b	.L1230
-.L1236:
+	b	.L1267
+.L1273:
 	mov	r6, r2, asl #2
 	ldr	r7, [r5, #4]
 	str	r6, [sp, #16]
 	ldr	r6, [ip, r2, asl #2]
 	cmp	r7, r6
-	bls	.L1231
+	bls	.L1268
 	ldr	ip, [ip, #0]
 	mov	r6, r9
 	cmp	ip, #0
-	bne	.L1232
+	bne	.L1269
 	cmp	r1, r0
 	addne	r1, r1, #1
-	ldrne	ip, .L1264
+	ldrne	ip, .L1301
 	movwne	r0, #3962
 	strneh	r1, [ip, r0]	@ movhi
-.L1232:
+.L1269:
 	sxth	ip, r3
 	mov	r0, #0
 	str	ip, [sp, #20]
-	ldr	r9, .L1264
+	ldr	r9, .L1301
 	str	r3, [sp, #4]
-	b	.L1233
-.L1234:
+	b	.L1270
+.L1271:
 	ldr	r7, [r4, #-908]
 	add	ip, r1, #1
 	add	r0, r0, #1
@@ -10429,35 +10858,35 @@ FtlScanSysBlk:
 	ldr	r7, [r9, #3964]
 	ldrh	ip, [r7, ip]
 	strh	ip, [r7, r1]	@ movhi
-.L1233:
+.L1270:
 	ldr	ip, [sp, #20]
 	sxth	r1, r0
 	cmp	r1, ip
-	bne	.L1234
+	bne	.L1271
 	ldr	r1, [sl, #-908]
 	mov	r2, r2, asl #1
 	ldr	r0, [r5, #4]
 	ldr	ip, [sp, #16]
 	ldr	r3, [sp, #4]
 	str	r0, [r1, ip]
-	ldr	r1, .L1264
+	ldr	r1, .L1301
 	ldr	r1, [r1, #3964]
 	strh	r6, [r1, r2]	@ movhi
-	b	.L1235
-.L1231:
+	b	.L1272
+.L1268:
 	sub	r3, r3, #1
 	uxth	r3, r3
-.L1230:
+.L1267:
 	ldr	r6, [sp, #4]
 	sxth	r2, r3
 	cmp	r2, r6
-	bgt	.L1236
+	bgt	.L1273
 	mov	r6, r9
-.L1235:
+.L1272:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1217
-	ldr	r2, .L1264
+	blt	.L1254
+	ldr	r2, .L1301
 	mov	ip, #3936
 	movw	r1, #3962
 	ldrh	ip, [r2, ip]
@@ -10466,7 +10895,7 @@ FtlScanSysBlk:
 	rsb	ip, r0, ip
 	sxth	ip, ip
 	cmp	r3, ip
-	bgt	.L1217
+	bgt	.L1254
 	add	r0, r0, #1
 	strh	r0, [r2, r1]	@ movhi
 	ldr	r0, [r5, #4]
@@ -10474,93 +10903,93 @@ FtlScanSysBlk:
 	str	r0, [r1, r3, asl #2]
 	mov	r3, r3, asl #1
 	ldr	r2, [r2, #3964]
-.L1259:
+.L1296:
 	strh	r6, [r2, r3]	@ movhi
-	b	.L1217
-.L1219:
-	ldr	r3, .L1264+16
+	b	.L1254
+.L1256:
+	ldr	r3, .L1301+16
 	movw	ip, #65535
 	ldrh	r2, [r4, r3]
 	cmp	r2, ip
 	streqh	r6, [r4, r3]	@ movhi
-	beq	.L1260
-	ldr	r3, .L1264+20
+	beq	.L1297
+	ldr	r3, .L1301+20
 	movw	r1, #65535
 	ldrh	r0, [r4, r3]
 	cmp	r0, r1
-	beq	.L1238
+	beq	.L1275
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1238:
+.L1275:
 	ldr	r3, [r5, #4]
 	ldr	r2, [sl, #-1764]
 	cmp	r2, r3
-	ldr	r3, .L1264+20
+	ldr	r3, .L1301+20
 	strcsh	r6, [r4, r3]	@ movhi
-	bcs	.L1217
-	ldr	r2, .L1264+16
+	bcs	.L1254
+	ldr	r2, .L1301+16
 	ldrh	r1, [r4, r2]
 	strh	r6, [r4, r2]	@ movhi
 	strh	r1, [r4, r3]	@ movhi
-.L1260:
+.L1297:
 	ldr	r3, [r5, #4]
 	str	r3, [r4, #-1764]
-	b	.L1217
-.L1263:
+	b	.L1254
+.L1300:
 	mov	r0, r6
-	b	.L1261
-.L1214:
-	ldr	r3, .L1264
+	b	.L1298
+.L1251:
+	ldr	r3, .L1301
 	mov	r0, r6
 	ldrb	r1, [r3, #928]	@ zero_extendqisi2
 	cmp	r1, #0
-	beq	.L1240
-.L1261:
+	beq	.L1277
+.L1298:
 	mov	r1, #0
-.L1240:
+.L1277:
 	bl	FtlFreeSysBlkQueueIn
-.L1217:
+.L1254:
 	ldr	r6, [sp, #12]
 	add	r8, r8, #36
 	add	r3, r6, #1
 	uxth	r3, r3
 	str	r3, [sp, #12]
 	cmp	r3, fp
-	bne	.L1241
-.L1210:
+	bne	.L1278
+.L1247:
 	ldr	ip, [sp, #8]
 	add	r3, ip, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1207:
-	ldr	r6, .L1264
+.L1244:
+	ldr	r6, .L1301
 	movw	r3, #3858
 	ldr	ip, [sp, #8]
 	ldrh	r3, [r6, r3]
 	cmp	r3, ip
-	bhi	.L1255
-	ldr	r1, .L1264+4
+	bhi	.L1292
+	ldr	r1, .L1301+4
 	ldr	r2, [r1, #-1040]
 	ldrh	r3, [r2, #0]
 	cmp	r3, #0
-	bne	.L1243
-	ldr	r0, .L1264+8
+	bne	.L1280
+	ldr	r0, .L1301+8
 	ldrh	r1, [r1, r0]
 	cmp	r1, #0
 	ldrne	r0, [r6, #3944]
-	bne	.L1244
-	b	.L1243
-.L1248:
+	bne	.L1281
+	b	.L1280
+.L1285:
 	mov	r1, r1, asl #1
 	ldrh	r1, [r2, r1]
 	cmp	r1, #0
-	beq	.L1245
-	ldr	r7, .L1264
+	beq	.L1282
+	ldr	r7, .L1301
 	sxth	r6, r3
-	ldr	r1, .L1264+4
+	ldr	r1, .L1301+4
 	mov	r5, #0
-	b	.L1246
-.L1247:
+	b	.L1283
+.L1284:
 	ldr	ip, [r1, #-1040]
 	mov	r0, r2, asl #1
 	rsb	r4, r6, r2
@@ -10574,43 +11003,43 @@ FtlScanSysBlk:
 	str	r2, [ip, r4, asl #2]
 	ldr	r2, [r1, #-1040]
 	strh	r5, [r2, r0]	@ movhi
-.L1246:
+.L1283:
 	ldr	r0, [r7, #3944]
 	sxth	r2, r3
 	cmp	r2, r0
-	bcc	.L1247
-	b	.L1243
-.L1245:
+	bcc	.L1284
+	b	.L1280
+.L1282:
 	add	r3, r3, #1
 	uxth	r3, r3
-.L1244:
+.L1281:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcc	.L1248
-.L1243:
-	ldr	r2, .L1264
+	bcc	.L1285
+.L1280:
+	ldr	r2, .L1301
 	ldr	r1, [r2, #3964]
 	ldrh	r3, [r1, #0]
 	cmp	r3, #0
-	bne	.L1249
+	bne	.L1286
 	movw	r0, #3962
 	ldrh	r0, [r2, r0]
 	cmp	r0, #0
 	movne	r0, #3936
 	ldrneh	r2, [r2, r0]
-	bne	.L1250
-	b	.L1249
-.L1254:
+	bne	.L1287
+	b	.L1286
+.L1291:
 	mov	ip, r0, asl #1
 	ldrh	ip, [r1, ip]
 	cmp	ip, #0
-	beq	.L1251
-	ldr	r1, .L1264
+	beq	.L1288
+	ldr	r1, .L1301
 	mov	r8, #3936
-	ldr	r7, .L1264+4
+	ldr	r7, .L1301+4
 	mov	r6, #0
-	b	.L1252
-.L1253:
+	b	.L1289
+.L1290:
 	ldr	r4, [r1, #3964]
 	mov	ip, r2, asl #1
 	rsb	r5, r0, r2
@@ -10624,26 +11053,26 @@ FtlScanSysBlk:
 	str	r2, [r4, r5, asl #2]
 	ldr	r2, [r1, #3964]
 	strh	r6, [r2, ip]	@ movhi
-.L1252:
+.L1289:
 	ldrh	ip, [r1, r8]
 	sxth	r2, r3
 	cmp	r2, ip
-	blt	.L1253
-	b	.L1249
-.L1251:
+	blt	.L1290
+	b	.L1286
+.L1288:
 	add	r3, r3, #1
 	uxth	r3, r3
-.L1250:
+.L1287:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L1254
-.L1249:
+	blt	.L1291
+.L1286:
 	mov	r0, #0
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1265:
+.L1302:
 	.align	2
-.L1264:
+.L1301:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1044
@@ -10660,7 +11089,7 @@ FtlGetLastWrittenPage:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
 	cmp	r1, #1
-	ldr	r3, .L1277
+	ldr	r3, .L1314
 	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
 	.save {r4, r5, r6, r7, r8, sl, lr}
 	movweq	r2, #3918
@@ -10686,9 +11115,9 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	cmn	r3, #1
-	bne	.L1270
-	b	.L1275
-.L1273:
+	bne	.L1307
+	b	.L1312
+.L1310:
 	add	r6, r6, r3
 	mov	r0, r7
 	mov	r1, #1
@@ -10701,30 +11130,30 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	cmn	r3, #1
-	bne	.L1271
+	bne	.L1308
 	ldr	r3, [sp, #44]
 	cmn	r3, #1
-	bne	.L1271
+	bne	.L1308
 	ldr	r3, [sp, #4]
 	cmn	r3, #1
 	subne	r4, r6, #1
 	uxthne	r4, r4
-	bne	.L1275
-.L1271:
+	bne	.L1312
+.L1308:
 	add	r6, r6, #1
 	uxth	r8, r6
-.L1275:
+.L1312:
 	sxth	r6, r8
 	sxth	r3, r4
 	cmp	r6, r3
-	ble	.L1273
-.L1270:
+	ble	.L1310
+.L1307:
 	sxth	r0, r4
 	add	sp, sp, #108
 	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L1278:
+.L1315:
 	.align	2
-.L1277:
+.L1314:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -10738,10 +11167,10 @@ FtlLoadSysInfo:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r5, #0
-	ldr	r4, .L1295
+	ldr	r4, .L1332
 	mov	r1, r5
-	ldr	r2, .L1295+4
-	ldr	r7, .L1295+8
+	ldr	r2, .L1332+4
+	ldr	r7, .L1332+8
 	ldr	r3, [r4, #-936]
 	str	r5, [r4, #188]
 	ldr	r0, [r4, #-2016]
@@ -10753,18 +11182,18 @@ FtlLoadSysInfo:
 	ldrh	r0, [r4, r7]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1293
+	beq	.L1330
 	mov	r1, #1
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L1295+12
+	ldr	r3, .L1332+12
 	add	r2, r0, #1
 	mov	r6, r0
 	strh	r2, [r4, r3]	@ movhi
-	b	.L1281
-.L1284:
+	b	.L1318
+.L1321:
 	ldrh	r2, [r4, r7]
 	mov	r1, #1
-	ldr	r0, .L1295+16
+	ldr	r0, .L1332+16
 	orr	r3, r3, r2, asl #10
 	str	r3, [r4, #184]
 	ldr	r3, [r4, #-960]
@@ -10773,31 +11202,31 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	r3, [r4, #180]
 	cmn	r3, #1
-	beq	.L1282
+	beq	.L1319
 	ldr	r3, [r4, #-960]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1295+20
+	ldr	r3, .L1332+20
 	cmp	r2, r3
-	bne	.L1282
+	bne	.L1319
 	ldr	r3, [r4, #-936]
 	ldrh	r2, [r3, #0]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1283
-.L1282:
+	beq	.L1320
+.L1319:
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1281:
+.L1318:
 	add	r3, r5, r6
 	sxth	r3, r3
 	cmp	r3, #0
-	bge	.L1284
-.L1283:
-	ldr	r4, .L1295
+	bge	.L1321
+.L1320:
+	ldr	r4, .L1332
 	mov	r2, #48
-	ldr	r5, .L1295+4
+	ldr	r5, .L1332+4
 	mov	r6, #3856
-	ldr	r0, .L1295+24
+	ldr	r0, .L1332+24
 	ldr	r7, [r4, #188]
 	mov	r1, r7
 	bl	memcpy
@@ -10818,7 +11247,7 @@ FtlLoadSysInfo:
 	movw	r3, #3960
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
-	beq	.L1285
+	beq	.L1322
 	ldrh	r3, [r5, r6]
 	mov	r2, #3952
 	ldrh	r2, [r5, r2]
@@ -10831,22 +11260,22 @@ FtlLoadSysInfo:
 	ubfx	r1, r1, #2, #14
 	add	r1, r3, r1, asl #2
 	bl	memcpy
-.L1285:
-	ldr	r4, .L1295
-	ldr	r3, .L1295+20
+.L1322:
+	ldr	r4, .L1332
+	ldr	r3, .L1332+20
 	ldr	r2, [r4, #-2072]
 	cmp	r2, r3
-	bne	.L1293
-	ldr	r3, .L1295+28
+	bne	.L1330
+	ldr	r3, .L1332+28
 	movw	r1, #3870
 	ldrb	r0, [r4, #-2062]	@ zero_extendqisi2
 	ldrh	r2, [r4, r3]
-	ldr	r3, .L1295+32
+	ldr	r3, .L1332+32
 	strh	r2, [r4, r3]	@ movhi
-	ldr	r3, .L1295+4
+	ldr	r3, .L1332+4
 	ldrh	r1, [r3, r1]
 	cmp	r0, r1
-	bne	.L1293
+	bne	.L1330
 	movw	r1, #3916
 	movw	r0, #3922
 	ldrh	r1, [r3, r1]
@@ -10865,10 +11294,10 @@ FtlLoadSysInfo:
 	movw	r2, #3848
 	ldrh	r1, [r3, r2]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1295+36
-	ldr	r1, .L1295+40
+	ldr	r3, .L1332+36
+	ldr	r1, .L1332+40
 	strh	r0, [r4, r3]	@ movhi
-	ldr	r3, .L1295+44
+	ldr	r3, .L1332+44
 	ldrh	r2, [r4, r3]
 	add	r3, r3, #62
 	strh	r2, [r4, r3]	@ movhi
@@ -10880,12 +11309,12 @@ FtlLoadSysInfo:
 	ldrb	r3, [r4, #-2061]	@ zero_extendqisi2
 	strh	r0, [r4, r1]	@ movhi
 	mvn	r1, #0
-	ldr	r0, .L1295+48
+	ldr	r0, .L1332+48
 	strb	r3, [r4, #-1988]
-	ldr	r3, .L1295+52
+	ldr	r3, .L1332+52
 	strh	r1, [r4, r3]	@ movhi
 	mov	r3, #0
-	ldr	r1, .L1295+56
+	ldr	r1, .L1332+56
 	strh	r3, [r4, r0]	@ movhi
 	strb	r3, [r4, #-1754]
 	ldrh	r0, [r4, r1]
@@ -10894,7 +11323,7 @@ FtlLoadSysInfo:
 	str	r3, [r4, #-1816]
 	strh	r0, [r4, r1]	@ movhi
 	sub	r1, r1, #104
-	ldr	r0, .L1295+60
+	ldr	r0, .L1332+60
 	ldrh	r1, [r4, r1]
 	mov	ip, r1, lsr #6
 	and	r1, r1, #63
@@ -10902,12 +11331,12 @@ FtlLoadSysInfo:
 	ldrb	r1, [r4, #-2060]	@ zero_extendqisi2
 	strh	ip, [r4, r0]	@ movhi
 	strb	r1, [r4, #-1940]
-	ldr	r1, .L1295+64
+	ldr	r1, .L1332+64
 	ldrh	r0, [r4, r1]
 	add	r1, r1, #150
 	strh	r0, [r4, r1]	@ movhi
-	ldr	r1, .L1295+68
-	ldr	r0, .L1295+72
+	ldr	r1, .L1332+68
+	ldr	r0, .L1332+72
 	ldrh	r1, [r4, r1]
 	mov	ip, r1, lsr #6
 	and	r1, r1, #63
@@ -10927,49 +11356,49 @@ FtlLoadSysInfo:
 	ldr	r1, [r4, #-1804]
 	cmp	r3, r1
 	strhi	r3, [r4, #-1804]
-	ldr	r4, .L1295
+	ldr	r4, .L1332
 	ldr	r3, [r4, #-2036]
 	ldr	r1, [r4, #-1800]
 	cmp	r3, r1
 	strhi	r3, [r4, #-1800]
 	cmp	r2, r5
-	beq	.L1288
-	ldr	r0, .L1295+76
+	beq	.L1325
+	ldr	r0, .L1332+76
 	bl	make_superblock
-.L1288:
-	ldr	r3, .L1295+80
+.L1325:
+	ldr	r3, .L1332+80
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
-	beq	.L1289
-	ldr	r0, .L1295+84
+	beq	.L1326
+	ldr	r0, .L1332+84
 	bl	make_superblock
-.L1289:
-	ldr	r5, .L1295
+.L1326:
+	ldr	r5, .L1332
 	movw	r4, #65535
-	ldr	r3, .L1295+88
+	ldr	r3, .L1332+88
 	ldrh	r3, [r5, r3]
 	cmp	r3, r4
-	beq	.L1290
-	ldr	r0, .L1295+92
+	beq	.L1327
+	ldr	r0, .L1332+92
 	bl	make_superblock
-.L1290:
-	ldr	r3, .L1295+52
+.L1327:
+	ldr	r3, .L1332+52
 	ldrh	r3, [r5, r3]
 	cmp	r3, r4
-	beq	.L1294
-	ldr	r0, .L1295+96
+	beq	.L1331
+	ldr	r0, .L1332+96
 	bl	make_superblock
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1293:
+.L1330:
 	mvn	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1294:
+.L1331:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1296:
+.L1333:
 	.align	2
-.L1295:
+.L1332:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	-1772
@@ -11006,8 +11435,8 @@ FtlLoadBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-	ldr	r6, .L1313
-	ldr	r8, .L1313+4
+	ldr	r6, .L1350
+	ldr	r8, .L1350+4
 	ldr	r3, [r6, #-960]
 	mov	r7, r6
 	ldr	r4, [r6, #-936]
@@ -11018,33 +11447,33 @@ FtlLoadBbt:
 	ldrh	r5, [r8, r3]
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1298
-.L1302:
+	b	.L1335
+.L1339:
 	mov	r1, #1
 	mov	r3, r5, asl #10
-	ldr	r0, .L1313+8
+	ldr	r0, .L1350+8
 	mov	r2, r1
 	str	r3, [r6, #184]
 	bl	FlashReadPages
 	ldr	r3, [r6, #180]
 	cmn	r3, #1
-	bne	.L1299
+	bne	.L1336
 	ldr	r3, [r6, #184]
 	mov	r1, #1
-	ldr	r0, .L1313+8
+	ldr	r0, .L1350+8
 	mov	r2, r1
 	add	r3, r3, #1
 	str	r3, [r6, #184]
 	bl	FlashReadPages
-.L1299:
+.L1336:
 	ldr	r3, [r7, #180]
 	cmn	r3, #1
-	beq	.L1300
+	beq	.L1337
 	ldrh	r2, [r4, #0]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1300
-	ldr	r3, .L1313+4
+	bne	.L1337
+	ldr	r3, .L1350+4
 	movw	r2, #3980
 	strh	r5, [r3, r2]	@ movhi
 	ldr	r2, [r4, #4]
@@ -11052,28 +11481,28 @@ FtlLoadBbt:
 	mov	r2, #3984
 	ldrh	r1, [r4, #8]
 	strh	r1, [r3, r2]	@ movhi
-	b	.L1301
-.L1300:
+	b	.L1338
+.L1337:
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1298:
+.L1335:
 	movw	r3, #3912
 	ldrh	r3, [r8, r3]
 	sub	r3, r3, #48
 	cmp	r5, r3
-	bgt	.L1302
-.L1301:
-	ldr	r5, .L1313+4
+	bgt	.L1339
+.L1338:
+	ldr	r5, .L1350+4
 	movw	r8, #3980
 	movw	r3, #65535
 	ldrh	r2, [r5, r8]
 	cmp	r2, r3
-	beq	.L1312
+	beq	.L1349
 	mov	r6, #3984
 	ldrh	r2, [r5, r6]
 	cmp	r2, r3
-	beq	.L1304
-	ldr	r7, .L1313
+	beq	.L1341
+	ldr	r7, .L1350
 	mov	r1, #1
 	mov	r2, r2, asl #10
 	add	r0, r7, #180
@@ -11082,11 +11511,11 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r7, #180]
 	cmn	r3, #1
-	beq	.L1304
+	beq	.L1341
 	ldrh	r2, [r4, #0]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1304
+	bne	.L1341
 	ldr	r3, [r4, #4]
 	ldr	r2, [r5, #3988]
 	cmp	r3, r2
@@ -11095,24 +11524,24 @@ FtlLoadBbt:
 	ldrhih	r3, [r4, #8]
 	strhih	r2, [r5, r8]	@ movhi
 	strhih	r3, [r5, r6]	@ movhi
-.L1304:
-	ldr	r8, .L1313+4
+.L1341:
+	ldr	r8, .L1350+4
 	movw	r3, #3980
 	mov	r1, #1
 	mov	r6, #0
-	ldr	r5, .L1313
+	ldr	r5, .L1350
 	ldrh	r0, [r8, r3]
 	bl	FtlGetLastWrittenPage
 	movw	r3, #3982
 	add	r2, r0, #1
 	mov	r7, r0
 	strh	r2, [r8, r3]	@ movhi
-	b	.L1305
-.L1308:
+	b	.L1342
+.L1345:
 	movw	r2, #3980
 	mov	r1, #1
 	ldrh	r2, [r8, r2]
-	ldr	r0, .L1313+8
+	ldr	r0, .L1350+8
 	orr	r3, r3, r2, asl #10
 	str	r3, [r5, #184]
 	ldr	r3, [r5, #-960]
@@ -11121,48 +11550,48 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5, #180]
 	cmn	r3, #1
-	beq	.L1306
+	beq	.L1343
 	ldrh	r2, [r4, #0]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1307
-.L1306:
+	beq	.L1344
+.L1343:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1305:
+.L1342:
 	add	r3, r6, r7
 	sxth	r3, r3
 	cmp	r3, #0
-	bge	.L1308
-.L1307:
-	ldr	r3, .L1313+4
+	bge	.L1345
+.L1344:
+	ldr	r3, .L1350+4
 	movw	r2, #3986
 	ldrh	r1, [r4, #10]
 	ldrh	r0, [r4, #12]
 	strh	r1, [r3, r2]	@ movhi
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L1309
+	beq	.L1346
 	ldr	r2, [r3, #3844]
 	cmp	r0, r2
-	beq	.L1309
+	beq	.L1346
 	movw	r1, #3858
 	ldrh	r3, [r3, r1]
 	mov	r3, r3, lsr #2
 	cmp	r2, r3
-	bcs	.L1309
+	bcs	.L1346
 	cmp	r0, r3
-	bcs	.L1309
+	bcs	.L1346
 	bl	FtlSysBlkNumInit
-.L1309:
-	ldr	r6, .L1313+12
+.L1346:
+	ldr	r6, .L1350+12
 	mov	r4, #0
-	ldr	r8, .L1313+4
+	ldr	r8, .L1350+4
 	movw	r7, #3870
-	ldr	r5, .L1313
-	b	.L1310
-.L1311:
-	ldr	r3, .L1313+16
+	ldr	r5, .L1350
+	b	.L1347
+.L1348:
+	ldr	r3, .L1350+16
 	ldr	r1, [r5, #188]
 	ldr	r0, [r6, #4]!
 	ldrh	r2, [r5, r3]
@@ -11170,18 +11599,18 @@ FtlLoadBbt:
 	mla	r1, r4, r2, r1
 	bl	memcpy
 	add	r4, r4, #1
-.L1310:
+.L1347:
 	ldrh	r3, [r8, r7]
 	cmp	r4, r3
-	bcc	.L1311
+	bcc	.L1348
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L1312:
+.L1349:
 	mvn	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L1314:
+.L1351:
 	.align	2
-.L1313:
+.L1350:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LANCHOR2+180
@@ -11199,59 +11628,59 @@ FtlLoadFactoryBbt:
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r5, #0
-	ldr	r3, .L1322
+	ldr	r3, .L1359
 	movw	fp, #3870
-	ldr	r7, .L1322+4
-	ldr	r6, .L1322+8
+	ldr	r7, .L1359+4
+	ldr	r6, .L1359+8
 	ldr	r2, [r3, #-960]
 	ldr	r8, [r3, #-936]
 	str	r2, [r3, #188]
 	str	r8, [r3, #192]
-	b	.L1316
-.L1321:
+	b	.L1353
+.L1358:
 	movw	r9, #3912
 	mvn	r3, #0
 	ldrh	r4, [r6, r9]
 	strh	r3, [r7], #2	@ movhi
 	add	r4, r4, r3
-	ldr	sl, .L1322
+	ldr	sl, .L1359
 	uxth	r4, r4
-	b	.L1317
-.L1320:
+	b	.L1354
+.L1357:
 	mla	r3, r3, r5, r4
 	mov	r1, #1
-	ldr	r0, .L1322+12
+	ldr	r0, .L1359+12
 	mov	r2, r1
 	mov	r3, r3, asl #10
 	str	r3, [sl, #184]
 	bl	FlashReadPages
 	ldr	r3, [sl, #180]
 	cmn	r3, #1
-	beq	.L1318
+	beq	.L1355
 	ldrh	r2, [r8, #0]
 	movw	r3, #61664
 	cmp	r2, r3
 	streqh	r4, [r7, #-2]	@ movhi
-	beq	.L1319
-.L1318:
+	beq	.L1356
+.L1355:
 	sub	r4, r4, #1
 	uxth	r4, r4
-.L1317:
+.L1354:
 	ldrh	r3, [r6, r9]
 	sub	r2, r3, #16
 	cmp	r4, r2
-	bgt	.L1320
-.L1319:
+	bgt	.L1357
+.L1356:
 	add	r5, r5, #1
-.L1316:
+.L1353:
 	ldrh	r3, [r6, fp]
 	cmp	r5, r3
-	bcc	.L1321
+	bcc	.L1358
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1323:
+.L1360:
 	.align	2
-.L1322:
+.L1359:
 	.word	.LANCHOR2
 	.word	.LANCHOR0+3992
 	.word	.LANCHOR0
@@ -11273,13 +11702,13 @@ FlashProgSlc2KPages:
 	mov	r9, r2
 	str	r3, [sp, #12]
 	mov	r4, r0
-	ldr	r3, .L1343
+	ldr	r3, .L1380
 	mov	r6, r0
 	mov	r8, #0
-	ldr	r7, .L1343+4
+	ldr	r7, .L1380+4
 	ldrb	fp, [r3, #2901]	@ zero_extendqisi2
-	b	.L1325
-.L1332:
+	b	.L1362
+.L1369:
 	rsb	r3, r8, sl
 	add	r2, sp, #20
 	mov	r0, r6
@@ -11293,7 +11722,7 @@ FlashProgSlc2KPages:
 	cmp	r3, r2
 	mvncs	r3, #0
 	strcs	r3, [r6, #0]
-	bcs	.L1327
+	bcs	.L1364
 	add	r3, r7, r3
 	ldrb	r5, [r3, #3764]	@ zero_extendqisi2
 	mov	r0, r5
@@ -11352,27 +11781,27 @@ FlashProgSlc2KPages:
 	mvnne	r3, #0
 	strne	r3, [r6, #0]
 	bl	NandcFlashDeCs
-.L1327:
+.L1364:
 	add	r8, r8, #1
 	add	r6, r6, #36
-.L1325:
+.L1362:
 	cmp	r8, sl
-	bne	.L1332
+	bne	.L1369
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
 	movne	r6, #0
-	ldrne	r5, .L1343+8
-	bne	.L1333
-	b	.L1334
-.L1339:
+	ldrne	r5, .L1380+8
+	bne	.L1370
+	b	.L1371
+.L1376:
 	ldr	r3, [r4, #0]
 	cmn	r3, #1
-	bne	.L1335
+	bne	.L1372
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1343+12
+	ldr	r0, .L1380+12
 	bl	printk
-	b	.L1336
-.L1335:
+	b	.L1373
+.L1372:
 	rsb	r3, r6, sl
 	mov	r1, r9
 	add	r2, sp, #20
@@ -11404,59 +11833,59 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r7, [sp, #28]
 	cmn	r7, #1
-	bne	.L1337
-	ldr	r0, .L1343+16
+	bne	.L1374
+	ldr	r0, .L1380+16
 	ldr	r1, [r4, #4]
 	bl	printk
 	str	r7, [r4, #0]
-.L1337:
+.L1374:
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L1338
+	beq	.L1375
 	ldr	r2, [r3, #0]
 	ldr	r3, [r5, #224]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1338
-	ldr	r0, .L1343+20
+	beq	.L1375
+	ldr	r0, .L1380+20
 	ldr	r1, [r4, #4]
 	bl	printk
 	mvn	r3, #0
 	str	r3, [r4, #0]
-.L1338:
+.L1375:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1336
+	beq	.L1373
 	ldr	r2, [r3, #0]
 	ldr	r3, [r5, #220]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1336
-	ldr	r0, .L1343+24
+	beq	.L1373
+	ldr	r0, .L1380+24
 	ldr	r1, [r4, #4]
 	bl	printk
 	mvn	r3, #0
 	str	r3, [r4, #0]
-.L1336:
+.L1373:
 	add	r6, r6, #1
 	add	r4, r4, #36
-.L1333:
+.L1370:
 	cmp	r6, sl
-	bne	.L1339
-.L1334:
+	bne	.L1376
+.L1371:
 	mov	r0, #0
 	add	sp, sp, #68
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1344:
+.L1381:
 	.align	2
-.L1343:
+.L1380:
 	.word	.LANCHOR1
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LC101
-	.word	.LC102
-	.word	.LC103
-	.word	.LC104
+	.word	.LC108
+	.word	.LC109
+	.word	.LC110
+	.word	.LC111
 	.fnend
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.align	2
@@ -11470,7 +11899,7 @@ FlashProgPages:
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.pad #76
 	sub	sp, sp, #76
-	ldr	r5, .L1373
+	ldr	r5, .L1410
 	mov	r9, r0
 	str	r1, [sp, #8]
 	mov	sl, r2
@@ -11481,13 +11910,13 @@ FlashProgPages:
 	cmp	r6, #0
 	moveq	fp, r5
 	str	ip, [sp, #20]
-	ldr	ip, .L1373+4
+	ldr	ip, .L1410+4
 	ldrb	ip, [ip, #2901]	@ zero_extendqisi2
 	str	ip, [sp, #12]
-	beq	.L1346
+	beq	.L1383
 	bl	FlashProgSlc2KPages
-	b	.L1347
-.L1360:
+	b	.L1384
+.L1397:
 	mov	r4, #36
 	ldr	r2, [sp, #8]
 	mul	r4, r4, r6
@@ -11506,22 +11935,22 @@ FlashProgPages:
 	mvncs	r3, #0
 	strcs	r3, [r9, r4]
 	mov	r8, r0
-	bcs	.L1349
+	bcs	.L1386
 	ldrb	r1, [r5, #3837]	@ zero_extendqisi2
 	add	r2, fp, r2, asl #4
 	cmp	r1, #0
 	ldr	r2, [r2, #3636]
 	moveq	r8, #0
 	cmp	r2, #0
-	beq	.L1351
+	beq	.L1388
 	cmp	r3, #1
-	bne	.L1352
+	bne	.L1389
 	ldr	r0, [r5, #3012]
 	bl	NandcIqrWaitFlashReady
-.L1352:
+.L1389:
 	ldrb	r0, [sp, #32]	@ zero_extendqisi2
 	bl	FlashWaitCmdDone
-.L1351:
+.L1388:
 	ldr	r2, [sp, #32]
 	mov	r1, #0
 	cmp	r8, #0
@@ -11541,10 +11970,10 @@ FlashProgPages:
 	cmp	r3, #1
 	strb	r4, [r2, #3628]
 	mov	r0, r4
-	bne	.L1354
+	bne	.L1391
 	bl	NandcWaitFlashReady
-	b	.L1355
-.L1354:
+	b	.L1392
+.L1391:
 	bl	NandcFlashCs
 	ldr	r3, [sp, #32]
 	mov	r0, r4
@@ -11556,34 +11985,34 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.L1355:
+.L1392:
 	ldr	r2, [sp, #20]
 	sub	r3, r2, #1
 	cmp	r3, #6
-	bhi	.L1356
+	bhi	.L1393
 	add	r3, r5, r4
 	ldrb	r3, [r3, #3756]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1356
+	beq	.L1393
 	mov	r0, r4
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	ldr	r2, .L1373+8
+	ldr	r2, .L1410+8
 	mov	r3, #0
 	bl	HynixSetRRPara
-.L1356:
+.L1393:
 	mov	r0, r4
 	bl	NandcFlashCs
 	cmp	sl, #1
 	mov	r0, r4
-	bne	.L1357
+	bne	.L1394
 	ldrb	r3, [r5, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1357
+	beq	.L1394
 	bl	flash_enter_slc_mode
-	b	.L1358
-.L1357:
+	b	.L1395
+.L1394:
 	bl	flash_exit_slc_mode
-.L1358:
+.L1395:
 	mov	r0, r4
 	ldr	r1, [sp, #28]
 	bl	FlashProgFirstCmd
@@ -11595,7 +12024,7 @@ FlashProgPages:
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
 	cmp	r8, #0
-	beq	.L1359
+	beq	.L1396
 	mov	r0, r4
 	ldr	r1, [sp, #28]
 	bl	FlashProgDpFirstCmd
@@ -11622,58 +12051,58 @@ FlashProgPages:
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
-.L1359:
+.L1396:
 	mov	r0, r4
 	ldr	r1, [sp, #28]
 	bl	FlashProgSecondCmd
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	add	r6, r6, r8
-.L1349:
+.L1386:
 	add	r6, r6, #1
-.L1346:
+.L1383:
 	ldr	r3, [sp, #8]
 	cmp	r6, r3
-	bcc	.L1360
-	ldr	r5, .L1373
+	bcc	.L1397
+	ldr	r5, .L1410
 	mov	r4, #0
-	ldr	r6, .L1373+12
+	ldr	r6, .L1410+12
 	ldr	r0, [r5, #3012]
 	bl	NandcIqrWaitFlashReady
-	b	.L1361
-.L1363:
+	b	.L1398
+.L1400:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	sl, #1
-	bne	.L1362
+	bne	.L1399
 	ldrb	r3, [r5, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1362
+	beq	.L1399
 	ldrb	r0, [r6, r4, asl #4]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1362:
+.L1399:
 	add	r4, r4, #1
-.L1361:
+.L1398:
 	ldrb	r3, [r5, #3762]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1363
+	bcc	.L1400
 	ldr	r2, [sp, #16]
 	cmp	r2, #0
 	ldreq	r0, [sp, #16]
-	beq	.L1347
+	beq	.L1384
 	mov	r5, #0
-	ldr	r4, .L1373+16
+	ldr	r4, .L1410+16
 	ldr	r6, [sp, #8]
-	b	.L1364
-.L1369:
+	b	.L1401
+.L1406:
 	ldr	r3, [r9, #0]
 	cmn	r3, #1
-	bne	.L1365
+	bne	.L1402
 	ldr	r1, [r9, #4]
-	ldr	r0, .L1373+20
+	ldr	r0, .L1410+20
 	bl	printk
-	b	.L1366
-.L1365:
+	b	.L1403
+.L1402:
 	rsb	r3, r5, r6
 	mov	r1, sl
 	add	r2, sp, #28
@@ -11705,101 +12134,101 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r7, [sp, #36]
 	cmn	r7, #1
-	bne	.L1367
-	ldr	r0, .L1373+24
+	bne	.L1404
+	ldr	r0, .L1410+24
 	ldr	r1, [r9, #4]
 	bl	printk
 	str	r7, [r9, #0]
-.L1367:
+.L1404:
 	ldr	r3, [r9, #12]
 	cmp	r3, #0
-	beq	.L1368
+	beq	.L1405
 	ldr	r2, [r3, #0]
 	ldr	r3, [r4, #224]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1368
-	ldr	r0, .L1373+28
+	beq	.L1405
+	ldr	r0, .L1410+28
 	ldr	r1, [r9, #4]
 	bl	printk
 	mvn	r3, #0
 	str	r3, [r9, #0]
-.L1368:
+.L1405:
 	ldr	r3, [r9, #8]
 	cmp	r3, #0
-	beq	.L1366
+	beq	.L1403
 	ldr	r2, [r3, #0]
 	ldr	r3, [r4, #220]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1366
-	ldr	r0, .L1373+32
+	beq	.L1403
+	ldr	r0, .L1410+32
 	ldr	r1, [r9, #4]
 	bl	printk
 	mvn	r3, #0
 	str	r3, [r9, #0]
-.L1366:
+.L1403:
 	add	r5, r5, #1
 	add	r9, r9, #36
-.L1364:
+.L1401:
 	cmp	r5, r6
-	bne	.L1369
+	bne	.L1406
 	mov	r0, #0
-.L1347:
+.L1384:
 	add	sp, sp, #76
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1374:
+.L1411:
 	.align	2
-.L1373:
+.L1410:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR0+4
 	.word	.LANCHOR0+3628
 	.word	.LANCHOR2
-	.word	.LC101
-	.word	.LC102
-	.word	.LC103
-	.word	.LC104
+	.word	.LC108
+	.word	.LC109
+	.word	.LC110
+	.word	.LC111
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
-	.type	FtlVpcTblFlush.part.13, %function
-FtlVpcTblFlush.part.13:
+	.type	FtlVpcTblFlush.part.14, %function
+FtlVpcTblFlush.part.14:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r1, #255
-	ldr	r4, .L1387
+	ldr	r4, .L1424
 	mov	r7, #3856
-	ldr	r6, .L1387+4
+	ldr	r6, .L1424+4
 	ldr	r3, [r4, #-960]
 	ldr	r5, [r4, #-936]
 	str	r3, [r4, #188]
-	ldr	r3, .L1387+8
+	ldr	r3, .L1424+8
 	str	r5, [r4, #192]
 	ldrh	r3, [r4, r3]
 	strh	r3, [r5, #2]	@ movhi
-	ldr	r3, .L1387+12
+	ldr	r3, .L1424+12
 	strh	r3, [r5, #0]	@ movhi
 	ldr	r3, [r4, #-1764]
 	str	r3, [r5, #4]
 	mov	r3, #0
 	str	r3, [r5, #8]
 	str	r3, [r5, #12]
-	ldr	r3, .L1387+16
+	ldr	r3, .L1424+16
 	str	r3, [r4, #-2072]
-	ldr	r3, .L1387+20
+	ldr	r3, .L1424+20
 	str	r3, [r4, #-2068]
-	ldr	r3, .L1387+24
+	ldr	r3, .L1424+24
 	ldrh	r2, [r4, r3]
-	ldr	r3, .L1387+28
+	ldr	r3, .L1424+28
 	strh	r2, [r4, r3]	@ movhi
 	movw	r3, #3870
 	ldrh	r3, [r6, r3]
 	strb	r3, [r4, #-2062]
-	ldr	r3, .L1387+32
+	ldr	r3, .L1424+32
 	ldrh	r2, [r4, r3]
 	sub	r3, r3, #62
 	strh	r2, [r4, r3]	@ movhi
@@ -11807,11 +12236,11 @@ FtlVpcTblFlush.part.13:
 	ldrh	r2, [r4, r3]
 	ldrb	r3, [r4, #-1990]	@ zero_extendqisi2
 	orr	r2, r3, r2, asl #6
-	ldr	r3, .L1387+36
+	ldr	r3, .L1424+36
 	strh	r2, [r4, r3]	@ movhi
 	ldrb	r3, [r4, #-1988]	@ zero_extendqisi2
 	strb	r3, [r4, #-2061]
-	ldr	r3, .L1387+40
+	ldr	r3, .L1424+40
 	ldrh	r2, [r4, r3]
 	sub	r3, r3, #106
 	strh	r2, [r4, r3]	@ movhi
@@ -11819,11 +12248,11 @@ FtlVpcTblFlush.part.13:
 	ldrh	r2, [r4, r3]
 	ldrb	r3, [r4, #-1942]	@ zero_extendqisi2
 	orr	r2, r3, r2, asl #6
-	ldr	r3, .L1387+44
+	ldr	r3, .L1424+44
 	strh	r2, [r4, r3]	@ movhi
 	ldrb	r3, [r4, #-1940]	@ zero_extendqisi2
 	strb	r3, [r4, #-2060]
-	ldr	r3, .L1387+48
+	ldr	r3, .L1424+48
 	ldrh	r2, [r4, r3]
 	sub	r3, r3, #150
 	strh	r2, [r4, r3]	@ movhi
@@ -11832,7 +12261,7 @@ FtlVpcTblFlush.part.13:
 	ldrh	r2, [r4, r3]
 	ldrb	r3, [r4, #-1894]	@ zero_extendqisi2
 	orr	r2, r3, r2, asl #6
-	ldr	r3, .L1387+52
+	ldr	r3, .L1424+52
 	strh	r2, [r4, r3]	@ movhi
 	ldrb	r3, [r4, #-1892]	@ zero_extendqisi2
 	strb	r3, [r4, #-2059]
@@ -11845,7 +12274,7 @@ FtlVpcTblFlush.part.13:
 	movw	r3, #3926
 	ldrh	r2, [r6, r3]
 	bl	ftl_memset
-	ldr	r1, .L1387+56
+	ldr	r1, .L1424+56
 	mov	r2, #48
 	ldr	r0, [r4, #188]
 	bl	memcpy
@@ -11867,7 +12296,7 @@ FtlVpcTblFlush.part.13:
 	movw	r3, #3960
 	ldrh	r3, [r6, r3]
 	cmp	r3, #0
-	beq	.L1376
+	beq	.L1413
 	ldrh	r3, [r6, r7]
 	ldr	r1, [r4, #188]
 	mov	r0, r3, lsr #3
@@ -11880,21 +12309,21 @@ FtlVpcTblFlush.part.13:
 	add	r0, r1, r0, asl #2
 	ldr	r1, [r4, #-1032]
 	bl	memcpy
-.L1376:
+.L1413:
 	mov	r0, #0
-	ldr	r4, .L1387
+	ldr	r4, .L1424
 	bl	FtlUpdateVaildLpn
-	ldr	r8, .L1387+8
+	ldr	r8, .L1424+8
 	mov	r6, #0
 	movw	sl, #65535
-.L1386:
+.L1423:
 	ldr	r3, [r4, #-960]
 	mov	r1, #1
-	ldr	r7, .L1387+60
+	ldr	r7, .L1424+60
 	ldrh	r2, [r4, r8]
 	str	r3, [r4, #188]
 	ldr	r3, [r4, #-936]
-	ldr	r0, .L1387+64
+	ldr	r0, .L1424+64
 	str	r3, [r4, #192]
 	ldrh	r3, [r4, r7]
 	orr	r3, r3, r2, asl #10
@@ -11902,14 +12331,14 @@ FtlVpcTblFlush.part.13:
 	str	r3, [r4, #184]
 	mov	r3, r1
 	bl	FlashProgPages
-	ldr	r1, .L1387+4
+	ldr	r1, .L1424+4
 	movw	r3, #3918
 	ldrh	r2, [r4, r7]
 	ldrh	r3, [r1, r3]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1378
-	ldr	r3, .L1387+68
+	blt	.L1415
+	ldr	r3, .L1424+68
 	ldrh	r2, [r4, r8]
 	ldrh	sl, [r4, r3]
 	strh	r2, [r4, r3]	@ movhi
@@ -11928,40 +12357,41 @@ FtlVpcTblFlush.part.13:
 	str	r3, [r5, #4]
 	mov	r3, r1
 	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1387+64
+	ldr	r0, .L1424+64
 	bl	FlashProgPages
-.L1378:
-	ldr	r2, .L1387+60
+.L1415:
+	ldr	r2, .L1424+60
 	ldr	r1, [r4, #180]
 	ldrh	r3, [r4, r2]
 	cmn	r1, #1
 	add	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, r2]	@ movhi
-	bne	.L1379
+	bne	.L1416
 	cmp	r3, #1
 	add	r6, r6, #1
-	ldreq	r1, .L1387+4
+	ldreq	r1, .L1424+4
 	movweq	r3, #3918
 	uxth	r6, r6
 	ldreqh	r3, [r1, r3]
 	subeq	r3, r3, #1
 	streqh	r3, [r4, r2]	@ movhi
 	cmp	r6, #3
-	bls	.L1386
-	ldr	r4, .L1387
+	bls	.L1423
+	ldr	r3, .L1424
 	mov	r2, r6
-	ldr	r0, .L1387+72
-	ldr	r1, [r4, #184]
+	ldr	r0, .L1424+72
+	ldr	r1, [r3, #184]
 	bl	printk
-	mov	r3, #1
-	str	r3, [r4, #-2088]
+	ldr	r3, .L1424+4
+	mov	r2, #1
+	str	r2, [r3, #4040]
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1379:
+.L1416:
 	cmp	r3, #1
-	beq	.L1386
+	beq	.L1423
 	cmp	r1, #256
-	beq	.L1386
+	beq	.L1423
 	movw	r3, #65535
 	cmp	sl, r3
 	ldmeqfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
@@ -11969,9 +12399,9 @@ FtlVpcTblFlush.part.13:
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1388:
+.L1425:
 	.align	2
-.L1387:
+.L1424:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	-1772
@@ -11990,9 +12420,9 @@ FtlVpcTblFlush.part.13:
 	.word	-1770
 	.word	.LANCHOR2+180
 	.word	-1768
-	.word	.LC105
+	.word	.LC112
 	.fnend
-	.size	FtlVpcTblFlush.part.13, .-FtlVpcTblFlush.part.13
+	.size	FtlVpcTblFlush.part.14, .-FtlVpcTblFlush.part.14
 	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
@@ -12002,18 +12432,18 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1391
-	ldr	r3, [r3, #-2088]
+	ldr	r3, .L1428
+	ldr	r3, [r3, #4040]
 	cmp	r3, #0
-	bne	.L1390
-	bl	FtlVpcTblFlush.part.13
-.L1390:
+	bne	.L1427
+	bl	FtlVpcTblFlush.part.14
+.L1427:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L1392:
+.L1429:
 	.align	2
-.L1391:
-	.word	.LANCHOR2
+.L1428:
+	.word	.LANCHOR0
 	.fnend
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.unlikely,"ax",%progbits
@@ -12026,11 +12456,11 @@ FtlBbmTblFlush.part.16:
 	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r1, #0
-	ldr	r7, .L1406
-	mov	r6, #0
-	ldr	sl, .L1406+4
+	ldr	r7, .L1443
+	mov	r5, #0
+	ldr	sl, .L1443+4
 	movw	r9, #3870
-	ldr	r8, .L1406+8
+	ldr	r8, .L1443+8
 	ldr	r3, [r7, #-936]
 	ldr	r0, [r7, #-960]
 	str	r3, [r7, #192]
@@ -12038,143 +12468,143 @@ FtlBbmTblFlush.part.16:
 	str	r0, [r7, #188]
 	ldrh	r2, [sl, r3]
 	bl	ftl_memset
-	b	.L1394
-.L1395:
-	ldr	r3, .L1406+12
+	b	.L1431
+.L1432:
+	ldr	r3, .L1443+12
 	ldr	r1, [r8, #4]!
 	ldrh	r2, [r7, r3]
 	ldr	r3, [r7, #188]
-	mul	r0, r2, r6
+	mul	r0, r2, r5
 	mov	r2, r2, asl #2
-	add	r6, r6, #1
+	add	r5, r5, #1
 	add	r0, r3, r0, asl #2
 	bl	memcpy
-.L1394:
+.L1431:
 	ldrh	r3, [sl, r9]
-	ldr	r4, .L1406+4
-	cmp	r6, r3
-	ldr	r5, .L1406
-	blt	.L1395
-	ldr	r6, [r5, #192]
+	ldr	r4, .L1443+4
+	cmp	r5, r3
+	ldr	r6, .L1443
+	blt	.L1432
+	ldr	r5, [r6, #192]
 	mov	r1, #255
 	mov	r2, #16
 	mov	r7, #0
 	mov	fp, r7
-	mov	r0, r6
+	mov	r0, r5
 	bl	ftl_memset
-	ldr	r3, .L1406+16
-	strh	r3, [r6, #0]	@ movhi
+	ldr	r3, .L1443+16
+	strh	r3, [r5, #0]	@ movhi
 	ldr	r3, [r4, #3988]
-	str	r3, [r6, #4]
+	str	r3, [r5, #4]
 	movw	r3, #3980
 	ldrh	r3, [r4, r3]
-	strh	r3, [r6, #2]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
 	mov	r3, #3984
 	ldrh	r3, [r4, r3]
-	strh	r3, [r6, #8]	@ movhi
+	strh	r3, [r5, #8]	@ movhi
 	movw	r3, #3986
 	ldrh	r3, [r4, r3]
-	strh	r3, [r6, #10]	@ movhi
+	strh	r3, [r5, #10]	@ movhi
 	ldr	r3, [r4, #3844]
-	strh	r3, [r6, #12]	@ movhi
-	b	.L1404
-.L1401:
+	strh	r3, [r5, #12]	@ movhi
+	b	.L1441
+.L1438:
 	mov	fp, #1
-.L1404:
-	ldr	r3, [r5, #-960]
+.L1441:
+	ldr	r3, [r6, #-960]
 	movw	r8, #3980
-	ldr	r4, .L1406+4
+	ldr	r4, .L1443+4
 	mov	r1, #0
 	movw	sl, #3982
-	str	r1, [r5, #180]
-	str	r3, [r5, #188]
+	str	r1, [r6, #180]
+	str	r3, [r6, #188]
 	mov	r9, #3984
-	ldr	r3, [r5, #-936]
+	ldr	r3, [r6, #-936]
 	ldrh	r1, [r4, r8]
 	ldrh	r2, [r4, sl]
-	str	r3, [r5, #192]
-	ldrh	r0, [r6, #10]
+	str	r3, [r6, #192]
+	ldrh	r0, [r5, #10]
 	orr	r3, r2, r1, asl #10
-	str	r3, [r5, #184]
+	str	r3, [r6, #184]
 	ldrh	r3, [r4, r9]
 	str	r0, [sp, #0]
-	ldr	r0, .L1406+20
+	ldr	r0, .L1443+20
 	bl	printk
 	mov	r1, #1
 	mov	r2, r1
 	mov	r3, r1
-	ldr	r0, .L1406+24
+	ldr	r0, .L1443+24
 	bl	FlashProgPages
 	movw	r3, #3918
 	ldrh	r3, [r4, r3]
 	ldrh	r2, [r4, sl]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1397
+	blt	.L1434
 	ldr	r3, [r4, #3988]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4, r8]
 	add	r3, r3, #1
-	ldr	r0, [r5, #-2084]
+	ldr	r0, [r4, #4044]
 	str	r3, [r4, #3988]
-	str	r3, [r6, #4]
+	str	r3, [r5, #4]
 	ldrh	r3, [r4, r9]
 	strh	r1, [r4, sl]	@ movhi
 	mov	r1, #1
-	strh	r2, [r6, #8]	@ movhi
+	strh	r2, [r5, #8]	@ movhi
 	strh	r2, [r4, r9]	@ movhi
 	mov	r2, r1
 	strh	r3, [r4, r8]	@ movhi
 	mov	r3, r3, asl #10
-	str	r3, [r5, #184]
+	str	r3, [r6, #184]
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	mov	r1, #1
-	ldr	r0, .L1406+24
+	ldr	r0, .L1443+24
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-.L1397:
-	ldr	r2, .L1406+4
+.L1434:
+	ldr	r4, .L1443+4
 	movw	r3, #3982
-	ldr	r4, .L1406
-	ldrh	r1, [r2, r3]
-	add	r1, r1, #1
-	strh	r1, [r2, r3]	@ movhi
-	ldr	r3, [r5, #180]
+	ldrh	r2, [r4, r3]
+	add	r2, r2, #1
+	strh	r2, [r4, r3]	@ movhi
+	ldr	r3, [r6, #180]
 	cmn	r3, #1
-	bne	.L1398
+	bne	.L1435
 	add	r7, r7, #1
-	ldr	r0, .L1406+28
-	ldr	r1, [r5, #184]
+	ldr	r0, .L1443+28
+	ldr	r1, [r6, #184]
 	uxth	r7, r7
 	bl	printk
 	cmp	r7, #3
-	bls	.L1404
-	ldr	r0, .L1406+32
+	bls	.L1441
+	ldr	r3, .L1443
 	mov	r2, r7
-	ldr	r1, [r4, #184]
+	ldr	r0, .L1443+32
+	ldr	r1, [r3, #184]
 	bl	printk
 	mov	r3, #1
-	str	r3, [r4, #-2088]
-	b	.L1405
-.L1398:
+	str	r3, [r4, #4040]
+	b	.L1442
+.L1435:
 	cmp	fp, #0
-	beq	.L1401
-.L1405:
+	beq	.L1438
+.L1442:
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1407:
+.L1444:
 	.align	2
-.L1406:
+.L1443:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LANCHOR0+4004
 	.word	-1028
 	.word	-3887
-	.word	.LC106
+	.word	.LC113
 	.word	.LANCHOR2+180
-	.word	.LC107
-	.word	.LC108
+	.word	.LC114
+	.word	.LC115
 	.fnend
 	.size	FtlBbmTblFlush.part.16, .-FtlBbmTblFlush.part.16
 	.text
@@ -12187,18 +12617,18 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1410
-	ldr	r3, [r3, #-2088]
+	ldr	r3, .L1447
+	ldr	r3, [r3, #4040]
 	cmp	r3, #0
-	bne	.L1409
+	bne	.L1446
 	bl	FtlBbmTblFlush.part.16
-.L1409:
+.L1446:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L1411:
+.L1448:
 	.align	2
-.L1410:
-	.word	.LANCHOR2
+.L1447:
+	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	2
@@ -12211,39 +12641,39 @@ FtlGcFreeBadSuperBlk:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	mov	r9, r0
-	ldr	r4, .L1422
-	ldr	r3, .L1422+4
+	ldr	r4, .L1459
+	ldr	r3, .L1459+4
 	ldrh	r3, [r4, r3]
 	cmp	r3, #0
 	movne	r6, #0
 	movne	sl, r4
-	bne	.L1413
-	b	.L1414
-.L1420:
+	bne	.L1450
+	b	.L1451
+.L1457:
 	add	r3, r3, r6
 	mov	r1, r9
 	mov	r5, #0
-	ldr	r7, .L1422+4
+	ldr	r7, .L1459+4
 	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r8, r0
-	b	.L1415
-.L1419:
+	b	.L1452
+.L1456:
 	add	r3, r4, r5, asl #1
 	sub	r3, r3, #1136
 	ldrh	r3, [r3, #0]
 	cmp	r3, r8
-	bne	.L1416
+	bne	.L1453
 	mov	r1, r8
-	ldr	r0, .L1422+8
+	ldr	r0, .L1459+8
 	bl	printk
 	mov	r0, r8
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r4, r7]
 	mov	r3, r5
-	b	.L1417
-.L1418:
+	b	.L1454
+.L1455:
 	add	r1, r3, #1
 	add	r3, r4, r3, asl #1
 	sub	r3, r3, #1136
@@ -12252,36 +12682,36 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r0, [r0, #0]
 	strh	r0, [r3, #0]	@ movhi
 	uxth	r3, r1
-.L1417:
+.L1454:
 	cmp	r3, r2
-	bcc	.L1418
+	bcc	.L1455
 	sub	r2, r2, #1
 	strh	r2, [sl, r7]	@ movhi
-.L1416:
+.L1453:
 	add	r5, r5, #1
 	uxth	r5, r5
-.L1415:
+.L1452:
 	ldrh	r3, [r4, r7]
 	cmp	r3, r5
-	bhi	.L1419
+	bhi	.L1456
 	add	r6, r6, #1
 	uxth	r6, r6
-.L1413:
-	ldr	r3, .L1422+12
+.L1450:
+	ldr	r3, .L1459+12
 	movw	r2, #3848
 	ldrh	r2, [r3, r2]
 	cmp	r2, r6
-	bhi	.L1420
+	bhi	.L1457
 	bl	FtlGcReFreshBadBlk
-.L1414:
+.L1451:
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L1423:
+.L1460:
 	.align	2
-.L1422:
+.L1459:
 	.word	.LANCHOR2
 	.word	-1138
-	.word	.LC109
+	.word	.LC116
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -12295,36 +12725,36 @@ update_vpc_list:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r2, r0, asl #1
-	ldr	r3, .L1432
+	ldr	r3, .L1469
 	mov	r4, r0
 	ldr	r1, [r3, #-2016]
 	ldrh	r2, [r1, r2]
 	cmp	r2, #0
-	bne	.L1425
-	ldr	r1, .L1432+4
+	bne	.L1462
+	ldr	r1, .L1469+4
 	ldrh	r0, [r3, r1]
 	cmp	r0, r4
 	mvneq	r2, #0
 	streqh	r2, [r3, r1]	@ movhi
-	beq	.L1427
-	ldr	r1, .L1432+8
+	beq	.L1464
+	ldr	r1, .L1469+8
 	ldrh	r1, [r3, r1]
 	cmp	r1, r4
-	beq	.L1428
-	ldr	r1, .L1432+12
+	beq	.L1465
+	ldr	r1, .L1469+12
 	ldrh	r1, [r3, r1]
 	cmp	r1, r4
-	beq	.L1428
-	ldr	r1, .L1432+16
+	beq	.L1465
+	ldr	r1, .L1469+16
 	ldrh	r3, [r3, r1]
 	cmp	r3, r4
-	beq	.L1428
-.L1427:
+	beq	.L1465
+.L1464:
 	mov	r1, r4
-	ldr	r0, .L1432+20
+	ldr	r0, .L1469+20
 	bl	List_remove_node
-	ldr	r5, .L1432
-	ldr	r3, .L1432+24
+	ldr	r5, .L1469
+	ldr	r3, .L1469+24
 	mov	r0, r4
 	ldrh	r2, [r5, r3]
 	sub	r2, r2, #1
@@ -12333,16 +12763,16 @@ update_vpc_list:
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
 	mov	r2, #1
-	b	.L1428
-.L1425:
+	b	.L1465
+.L1462:
 	bl	List_update_data_list
 	mov	r2, #0
-.L1428:
+.L1465:
 	mov	r0, r2
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L1433:
+.L1470:
 	.align	2
-.L1432:
+.L1469:
 	.word	.LANCHOR2
 	.word	-1760
 	.word	-1996
@@ -12364,45 +12794,45 @@ decrement_vpc_count:
 	movw	r3, #65535
 	cmp	r0, r3
 	mov	r5, r0
-	beq	.L1435
-	ldr	r2, .L1440
+	beq	.L1472
+	ldr	r2, .L1477
 	mov	r3, r0, asl #1
 	ldr	r2, [r2, #-2016]
 	ldrh	r4, [r2, r3]
 	cmp	r4, #0
 	subne	r4, r4, #1
 	strneh	r4, [r2, r3]	@ movhi
-	bne	.L1435
-	ldr	r0, .L1440+4
+	bne	.L1472
+	ldr	r0, .L1477+4
 	mov	r1, r5
 	mov	r2, r4
 	bl	printk
 	mov	r0, r4
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1435:
-	ldr	r7, .L1440
+.L1472:
+	ldr	r7, .L1477
 	movw	r3, #65535
-	ldr	r6, .L1440+8
+	ldr	r6, .L1477+8
 	ldrh	r0, [r7, r6]
 	cmp	r0, r3
 	streqh	r5, [r7, r6]	@ movhi
 	moveq	r0, #0
 	ldmeqfd	sp!, {r3, r4, r5, r6, r7, pc}
 	cmp	r0, r5
-	beq	.L1439
+	beq	.L1476
 	bl	update_vpc_list
 	strh	r5, [r7, r6]	@ movhi
 	adds	r0, r0, #0
 	movne	r0, #1
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1439:
+.L1476:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1441:
+.L1478:
 	.align	2
-.L1440:
+.L1477:
 	.word	.LANCHOR2
-	.word	.LC110
+	.word	.LC117
 	.word	-1020
 	.fnend
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -12420,12 +12850,12 @@ get_new_active_ppa:
 	mov	r4, r0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movw	r6, #65535
-	ldr	r5, .L1454
-	ldr	r7, .L1454+4
+	ldr	r5, .L1491
+	ldr	r7, .L1491+4
 	add	r3, r0, r3, asl #1
 	ldrh	r3, [r3, #16]
-	b	.L1443
-.L1444:
+	b	.L1480
+.L1481:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #3848
 	ldrh	r2, [r5, r2]
@@ -12441,28 +12871,28 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	add	r3, r4, r3, asl #1
 	ldrh	r3, [r3, #16]
-.L1443:
+.L1480:
 	cmp	r3, r6
-	beq	.L1444
+	beq	.L1481
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1446
+	bne	.L1483
 	ldrb	r2, [r5, #928]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1446
+	bne	.L1483
 	ldrh	r2, [r4, #2]
 	add	r2, r7, r2, asl #1
 	sub	r2, r2, #892
 	ldrh	r2, [r2, #0]
 	cmp	r2, r6
-	bne	.L1446
+	bne	.L1483
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	sub	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1444
-.L1446:
+	b	.L1481
+.L1483:
 	ldrh	r6, [r4, #2]
 	movw	r5, #65535
 	mov	r7, r5
@@ -12470,12 +12900,12 @@ get_new_active_ppa:
 	ldrh	r3, [r4, #4]
 	sub	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1451:
-	ldr	r2, .L1454
+.L1488:
+	ldr	r2, .L1491
 	movw	r3, #3848
 	ldrh	r2, [r2, r3]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1448:
+.L1485:
 	add	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r2
@@ -12486,36 +12916,36 @@ get_new_active_ppa:
 	add	r1, r4, r3, asl #1
 	ldrh	r1, [r1, #16]
 	cmp	r1, r5
-	beq	.L1448
+	beq	.L1485
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1449
-	ldr	r3, .L1454
+	bne	.L1486
+	ldr	r3, .L1491
 	ldrb	r2, [r3, #928]	@ zero_extendqisi2
 	cmp	r2, #0
 	ldrh	r2, [r4, #2]
-	bne	.L1452
-	ldr	r3, .L1454+4
+	bne	.L1489
+	ldr	r3, .L1491+4
 	add	r2, r3, r2, asl #1
 	sub	r2, r2, #892
 	ldrh	r3, [r2, #0]
 	cmp	r3, r7
-	bne	.L1449
+	bne	.L1486
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1449
+	beq	.L1486
 	sub	r3, r3, #1
 	ldrh	r0, [r4, #0]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1451
-.L1452:
+	b	.L1488
+.L1489:
 	movw	r1, #3918
 	ldrh	r1, [r3, r1]
 	cmp	r2, r1
-	bcc	.L1449
-	ldr	r1, .L1454+4
+	bcc	.L1486
+	ldr	r1, .L1491+4
 	ldrh	r2, [r4, #0]
 	ldrh	r0, [r4, #4]
 	ldr	r1, [r1, #-2016]
@@ -12530,19 +12960,19 @@ get_new_active_ppa:
 	ldrh	r3, [r3, r2]
 	strb	r1, [r4, #6]
 	strh	r3, [r4, #2]	@ movhi
-.L1449:
+.L1486:
 	mov	r0, r6
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1455:
+.L1492:
 	.align	2
-.L1454:
+.L1491:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	2
-	.type	FtlSlcSuperblockCheck.part.19, %function
-FtlSlcSuperblockCheck.part.19:
+	.type	FtlSlcSuperblockCheck.part.20, %function
+FtlSlcSuperblockCheck.part.20:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -12551,12 +12981,12 @@ FtlSlcSuperblockCheck.part.19:
 	mov	r4, r0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movw	r6, #65535
-	ldr	r5, .L1462
-	ldr	r7, .L1462+4
+	ldr	r5, .L1499
+	ldr	r7, .L1499+4
 	add	r3, r0, r3, asl #1
 	ldrh	r3, [r3, #16]
-	b	.L1457
-.L1458:
+	b	.L1494
+.L1495:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #3848
 	ldrh	r2, [r5, r2]
@@ -12572,21 +13002,21 @@ FtlSlcSuperblockCheck.part.19:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	add	r3, r4, r3, asl #1
 	ldrh	r3, [r3, #16]
-.L1457:
+.L1494:
 	cmp	r3, r6
-	beq	.L1458
+	beq	.L1495
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1460
+	bne	.L1497
 	ldrb	r3, [r5, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1460
+	bne	.L1497
 	ldrh	r3, [r4, #2]
 	add	r3, r7, r3, asl #1
 	sub	r3, r3, #892
 	ldrh	r3, [r3, #0]
 	cmp	r3, r6
-	bne	.L1460
+	bne	.L1497
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	sub	r3, r3, #1
@@ -12594,14 +13024,14 @@ FtlSlcSuperblockCheck.part.19:
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1458
+	bne	.L1495
 	ldrh	r2, [r4, #2]
 	strb	r3, [r4, #6]
 	add	r2, r2, #1
 	strh	r2, [r4, #2]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1460:
-	ldr	r3, .L1462
+.L1497:
+	ldr	r3, .L1499
 	ldrb	r1, [r3, #928]	@ zero_extendqisi2
 	cmp	r1, #0
 	ldmeqfd	sp!, {r3, r4, r5, r6, r7, pc}
@@ -12612,7 +13042,7 @@ FtlSlcSuperblockCheck.part.19:
 	ldrh	r2, [r3, r2]
 	cmp	r1, r2
 	ldmccfd	sp!, {r3, r4, r5, r6, r7, pc}
-	ldr	r1, .L1462+4
+	ldr	r1, .L1499+4
 	ldrh	r2, [r4, #0]
 	ldrh	r0, [r4, #4]
 	ldr	r1, [r1, #-2016]
@@ -12628,13 +13058,13 @@ FtlSlcSuperblockCheck.part.19:
 	strb	r1, [r4, #6]
 	strh	r3, [r4, #2]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1463:
+.L1500:
 	.align	2
-.L1462:
+.L1499:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
-	.size	FtlSlcSuperblockCheck.part.19, .-FtlSlcSuperblockCheck.part.19
+	.size	FtlSlcSuperblockCheck.part.20, .-FtlSlcSuperblockCheck.part.20
 	.align	2
 	.global	FtlSlcSuperblockCheck
 	.type	FtlSlcSuperblockCheck, %function
@@ -12650,304 +13080,308 @@ FtlSlcSuperblockCheck:
 	movw	r3, #65535
 	cmp	r2, r3
 	bxeq	lr
-	b	FtlSlcSuperblockCheck.part.19
+	b	FtlSlcSuperblockCheck.part.20
 	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	2
-	.type	allocate_data_superblock.part.20, %function
-allocate_data_superblock.part.20:
+	.type	allocate_data_superblock.part.21, %function
+allocate_data_superblock.part.21:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.pad #20
-	sub	sp, sp, #20
-	ldr	r4, .L1502
-	mov	r5, r0
-	mov	r8, r4
-.L1498:
-	ldr	r3, .L1502+4
-	cmp	r5, r3
-	bne	.L1468
-	ldr	r3, .L1502+8
-	ldrh	r2, [r4, r3]
-	ldr	r3, [r4, #-1184]
+	.pad #28
+	sub	sp, sp, #28
+	ldr	r5, .L1538
+	mov	r4, r0
+	mov	r8, r5
+.L1535:
+	ldr	r3, .L1538+4
+	cmp	r4, r3
+	bne	.L1505
+	ldr	r3, .L1538+8
+	ldrh	r2, [r5, r3]
+	ldr	r3, [r5, #-1184]
 	mov	r1, r2, lsr #1
 	mul	ip, r3, r2
 	add	r0, r1, #1
 	add	r0, r0, ip, lsr #2
-	ldr	ip, .L1502+12
+	ldr	ip, .L1538+12
 	uxth	r0, r0
 	ldr	ip, [ip, #3840]
 	cmp	ip, #0
-	beq	.L1492
-	ldr	ip, [r4, #-1780]
+	beq	.L1529
+	ldr	ip, [r5, #-1780]
 	cmp	ip, #29
-	bhi	.L1492
+	bhi	.L1529
 	cmp	ip, #2
-	bls	.L1497
+	bls	.L1534
 	tst	r2, #1
-	beq	.L1469
+	beq	.L1506
 	cmp	r3, #0
 	moveq	r1, r3
-	beq	.L1470
-	b	.L1469
-.L1468:
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	beq	.L1507
+	b	.L1506
+.L1505:
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1497
-	ldr	r3, .L1502+12
+	bne	.L1534
+	ldr	r3, .L1538+12
 	movw	r2, #3868
 	ldrh	r2, [r3, r2]
 	cmp	r2, #1
-	beq	.L1497
+	beq	.L1534
 	ldrb	r2, [r3, #928]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1497
+	bne	.L1534
 	sub	r2, r2, #2000
 	ldr	r3, [r3, #3840]
-	ldrh	r2, [r4, r2]
+	ldrh	r2, [r5, r2]
 	cmp	r3, #0
 	mov	r1, r2, lsr #3
-	beq	.L1469
-	ldr	r3, [r4, #-1780]
+	beq	.L1506
+	ldr	r3, [r5, #-1780]
 	cmp	r3, #1
 	movls	r1, #7
 	mulls	r1, r1, r2
 	movls	r1, r1, lsr #3
-	b	.L1469
-.L1492:
+	b	.L1506
+.L1529:
 	mov	r1, r0
-.L1469:
+.L1506:
 	cmp	r1, #0
 	subne	r1, r1, #1
 	uxthne	r1, r1
-	b	.L1470
-.L1497:
+	b	.L1507
+.L1534:
 	mov	r1, #0
-.L1470:
-	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r0, .L1502+16
+.L1507:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, .L1538+16
 	bl	List_pop_index_node
-	ldr	r3, .L1502+8
-	ldrh	r2, [r4, r3]
+	ldr	r3, .L1538+8
+	ldrh	r2, [r5, r3]
 	sub	r2, r2, #1
-	strh	r2, [r4, r3]	@ movhi
+	strh	r2, [r5, r3]	@ movhi
 	uxth	r7, r0
-	mov	r0, r5
-	strh	r7, [r5, #0]	@ movhi
+	mov	r0, r4
+	strh	r7, [r4, #0]	@ movhi
 	bl	make_superblock
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1471
-	ldr	r2, .L1502+12
-	movw	r3, #3848
-	ldr	ip, [r4, #-2084]
+	beq	.L1508
+	ldr	r3, .L1538+12
+	movw	r2, #3848
 	mov	r6, #0
-	mov	sl, r5
-	mov	r1, r5
-	ldrh	r9, [r2, r3]
+	mov	r9, r4
+	mov	r1, r4
 	mov	r0, r6
-	mov	r3, ip
+	ldr	ip, [r3, #4044]
+	ldrh	sl, [r3, r2]
 	mov	r2, r6
-	stmia	sp, {r5, ip}
-	b	.L1472
-.L1471:
-	ldr	r3, [r4, #-2016]
+	mov	r3, ip
+	stmib	sp, {r4, ip}
+	b	.L1509
+.L1508:
+	ldr	r3, [r5, #-2016]
 	mov	r7, r7, asl #1
 	mvn	r2, #0
 	strh	r2, [r3, r7]	@ movhi
-	b	.L1498
-.L1475:
+	b	.L1535
+.L1512:
 	str	r0, [r3, #8]
-	movw	r5, #65535
+	movw	r4, #65535
 	str	r0, [r3, #12]
 	ldrh	lr, [r1, #16]
-	cmp	lr, r5
-	beq	.L1474
-	ldr	r5, [sp, #4]
+	cmp	lr, r4
+	beq	.L1511
+	ldr	r4, [sp, #8]
 	mov	ip, #36
 	mov	lr, lr, asl #10
-	mla	fp, ip, r6, r5
+	mla	fp, ip, r6, r4
 	add	r6, r6, #1
 	uxth	r6, r6
 	str	lr, [fp, #4]
-.L1474:
+.L1511:
 	add	r2, r2, #1
 	add	r3, r3, #36
 	add	r1, r1, #2
 	uxth	r2, r2
-.L1472:
-	cmp	r2, r9
-	bne	.L1475
-	ldr	r3, .L1502+12
-	ldr	r5, [sp, #0]
-	ldr	r3, [r3, #3840]
-	cmp	r3, #0
-	beq	.L1476
-	ldr	r3, .L1502+20
-	cmp	r5, r3
-	bne	.L1476
-	ldr	r2, [r4, #-2080]
+.L1509:
+	cmp	r2, sl
+	bne	.L1512
+	ldr	r3, .L1538+12
+	ldr	r4, [sp, #4]
+	ldr	r2, [r3, #3840]
+	cmp	r2, #0
+	beq	.L1513
+	ldr	r2, .L1538+20
+	cmp	r4, r2
+	bne	.L1513
+	ldr	r2, [r3, #4048]
 	mov	r3, r7, asl #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #30
 	movhi	r3, #0
-	strhib	r3, [r4, #-1988]
-.L1476:
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
-	ldr	r2, [r4, #-2080]
+	strhib	r3, [r5, #-1988]
+.L1513:
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldr	r2, .L1538+12
 	cmp	r3, #0
 	mov	r3, r7, asl #1
-	ldrh	r1, [r2, r3]
-	bne	.L1477
-	cmp	r1, #0
-	ldrne	ip, .L1502+12
-	movwne	r0, #3906
-	moveq	r1, #2
-	ldrneh	r0, [ip, r0]
-	addne	r1, r1, r0
-	strh	r1, [r2, r3]	@ movhi
-	ldr	r3, [r4, #-1796]
+	bne	.L1514
+	ldr	r1, [r2, #4048]
+	ldrh	r0, [r1, r3]
+	cmp	r0, #0
+	movwne	ip, #3906
+	moveq	r2, #2
+	ldrneh	r2, [r2, ip]
+	streqh	r2, [r1, r3]	@ movhi
+	addne	r0, r0, r2
+	strneh	r0, [r1, r3]	@ movhi
+	ldr	r3, [r5, #-1796]
 	mov	r0, r7
 	mov	r1, #0
 	add	r3, r3, #1
-	str	r3, [r4, #-1796]
-	b	.L1500
-.L1477:
+	str	r3, [r5, #-1796]
+	b	.L1536
+.L1514:
+	ldr	r2, [r2, #4048]
+	mov	r0, r7
+	ldrh	r1, [r2, r3]
 	add	r1, r1, #1
 	strh	r1, [r2, r3]	@ movhi
-	ldr	r3, [r4, #-1792]
-	mov	r0, r7
+	ldr	r3, [r5, #-1792]
 	mov	r1, #1
 	add	r3, r3, #1
-	str	r3, [r4, #-1792]
-.L1500:
+	str	r3, [r5, #-1792]
+.L1536:
+	ldr	sl, .L1538+12
 	bl	ftl_set_blk_mode
-	ldr	r3, [r4, #-2080]
-	mov	r9, r7, asl #1
-	ldr	r2, [r4, #-1784]
+	mov	fp, r7, asl #1
+	ldr	r2, [r5, #-1784]
 	ldr	r0, [r8, #-1796]
-	ldrh	r3, [r3, r9]
+	ldr	r3, [sl, #4048]
+	ldrh	r3, [r3, fp]
 	cmp	r3, r2
-	movw	r2, #3906
-	strhi	r3, [r4, #-1784]
-	ldr	r3, .L1502+12
-	ldrh	r1, [r3, r2]
-	ldr	r2, [r8, #-1792]
-	mla	r0, r0, r1, r2
-	mov	r2, #3856
-	ldrh	r1, [r3, r2]
+	strhi	r3, [r5, #-1784]
+	movw	r3, #3906
+	ldrh	r2, [sl, r3]
+	ldr	r3, [r8, #-1792]
+	mla	r0, r0, r2, r3
+	mov	r3, #3856
+	ldrh	r1, [sl, r3]
 	bl	__aeabi_uidiv
 	ldr	r3, [r8, #-920]
 	ldr	r2, [r3, #16]
 	add	r2, r2, #1
 	str	r2, [r3, #16]
-	ldr	r3, [r8, #-2084]
+	ldr	r3, [sl, #4044]
 	mov	r2, #0
 	str	r0, [r8, #-1788]
-	b	.L1482
-.L1483:
+	b	.L1519
+.L1520:
 	add	r2, r2, #1
 	ldr	r1, [r3, #-32]
 	uxth	r2, r2
 	bic	r1, r1, #1020
 	bic	r1, r1, #3
 	str	r1, [r3, #-32]
-.L1482:
+.L1519:
 	cmp	r2, r6
 	add	r3, r3, #36
-	bne	.L1483
-	ldr	r3, .L1502+12
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	bne	.L1520
+	ldr	sl, .L1538+12
+	ldrb	r3, [sl, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1484
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	beq	.L1521
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
-	ldr	r0, [r4, #-2084]
+	ldr	r0, [sl, #4044]
 	cmp	r3, #1
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1484:
+.L1521:
 	mov	r2, r6
-	ldr	r0, [r4, #-2084]
-	ldrb	r1, [r5, #8]	@ zero_extendqisi2
-	mov	fp, #0
+	ldr	r0, [sl, #4044]
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	bl	FlashEraseBlocks
-	mov	r2, #36
-	mul	r2, r2, r6
-	mov	r3, r7
-	mov	ip, r9
-	mov	r6, fp
-	mov	r7, r5
-	mov	r9, r2
-	b	.L1486
-.L1488:
-	ldr	r1, [r4, #-2084]
-	add	r0, r1, fp
-	ldr	r5, [r1, fp]
-	cmn	r5, #1
-	bne	.L1487
+	mov	r1, #36
+	mul	r1, r1, r6
+	mov	r6, #0
+	mov	r3, fp
+	mov	sl, r6
+	mov	fp, r7
+	ldr	r2, .L1538+12
+	mov	r7, r1
+	b	.L1523
+.L1525:
+	ldr	r1, [r2, #4044]
+	add	r0, r1, r6
+	ldr	r1, [r1, r6]
+	cmn	r1, #1
+	bne	.L1524
 	ldr	r0, [r0, #4]
-	add	r6, r6, #1
-	str	r3, [sp, #12]
+	add	sl, sl, #1
+	str	r1, [sp, #20]
 	ubfx	r0, r0, #10, #16
-	str	ip, [sp, #8]
+	str	r2, [sp, #16]
+	str	r3, [sp, #12]
 	bl	FtlBbmMapBadBlock
-	strh	r5, [sl, #16]	@ movhi
-	ldrb	r1, [r7, #7]	@ zero_extendqisi2
+	ldr	r1, [sp, #20]
+	strh	r1, [r9, #16]	@ movhi
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	sub	r1, r1, #1
-	strb	r1, [r7, #7]
-	ldr	ip, [sp, #8]
+	strb	r1, [r4, #7]
 	ldr	r3, [sp, #12]
-.L1487:
-	add	fp, fp, #36
-	add	sl, sl, #2
-.L1486:
-	cmp	fp, r9
-	bne	.L1488
-	cmp	r6, #0
-	mov	r5, r7
-	mov	r9, ip
-	mov	r7, r3
-	beq	.L1489
-	mov	r0, r3
+	ldr	r2, [sp, #16]
+.L1524:
+	add	r6, r6, #36
+	add	r9, r9, #2
+.L1523:
+	cmp	r6, r7
+	bne	.L1525
+	cmp	sl, #0
+	mov	r7, fp
+	mov	fp, r3
+	beq	.L1526
+	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1489:
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+.L1526:
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldreq	r3, [r8, #-2016]
+	ldreq	r3, [r5, #-2016]
 	mvneq	r2, #0
-	streqh	r2, [r3, r9]	@ movhi
-	beq	.L1498
-.L1490:
-	ldr	r1, .L1502+12
+	streqh	r2, [r3, fp]	@ movhi
+	beq	.L1535
+.L1527:
+	ldr	r1, .L1538+12
 	movw	r2, #3916
 	ldrh	r2, [r1, r2]
-	strh	r7, [r5, #0]	@ movhi
+	strh	r7, [r4, #0]	@ movhi
 	mul	r2, r2, r3
 	mov	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	ldr	r3, .L1502
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldr	r3, .L1538
 	uxth	r2, r2
-	strh	r2, [r5, #4]	@ movhi
+	strh	r2, [r4, #4]	@ movhi
 	ldr	r1, [r3, #-1804]
-	str	r1, [r5, #12]
+	str	r1, [r4, #12]
 	add	r1, r1, #1
 	str	r1, [r3, #-1804]
-	ldrh	r0, [r5, #0]
+	ldrh	r0, [r4, #0]
 	ldr	r1, [r3, #-2016]
 	mov	r3, r0, asl #1
 	strh	r2, [r1, r3]	@ movhi
-	add	sp, sp, #20
+	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1503:
+.L1539:
 	.align	2
-.L1502:
+.L1538:
 	.word	.LANCHOR2
 	.word	.LANCHOR2-1900
 	.word	-2000
@@ -12955,7 +13389,7 @@ allocate_data_superblock.part.20:
 	.word	.LANCHOR2-2004
 	.word	.LANCHOR2-1996
 	.fnend
-	.size	allocate_data_superblock.part.20, .-allocate_data_superblock.part.20
+	.size	allocate_data_superblock.part.21, .-allocate_data_superblock.part.21
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
@@ -12965,28 +13399,27 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1506
-	ldr	r3, [r3, #-2088]
+	ldr	r3, .L1542
+	ldr	r3, [r3, #4040]
 	cmp	r3, #0
-	bne	.L1505
-	bl	allocate_data_superblock.part.20
-.L1505:
+	bne	.L1541
+	bl	allocate_data_superblock.part.21
+.L1541:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L1507:
+.L1543:
 	.align	2
-.L1506:
-	.word	.LANCHOR2
+.L1542:
+	.word	.LANCHOR0
 	.fnend
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.align	2
-	.global	FtlSuperblockPowerLostFix
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
+	.type	FtlSuperblockPowerLostFix.part.19, %function
+FtlSuperblockPowerLostFix.part.19:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1517
+	ldr	r3, .L1553
 	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
@@ -12994,27 +13427,27 @@ FtlSuperblockPowerLostFix:
 	.pad #40
 	sub	sp, sp, #40
 	cmp	r7, #0
-	beq	.L1516
+	beq	.L1552
 	ldrb	r7, [r0, #8]	@ zero_extendqisi2
 	cmp	r7, #1
 	ldreqh	r6, [r0, #4]
-	beq	.L1509
+	beq	.L1545
 	mov	r7, #0
-.L1516:
+.L1552:
 	mov	r6, #12
-.L1509:
+.L1545:
 	mvn	r8, #0
-	ldr	r5, .L1517+4
-	b	.L1510
-.L1513:
+	ldr	r5, .L1553+4
+	b	.L1546
+.L1549:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1511
+	beq	.L1547
 	mov	r0, r4
 	bl	get_new_active_ppa
 	cmn	r0, #1
 	str	r0, [sp, #8]
-	beq	.L1511
+	beq	.L1547
 	ldr	r2, [r5, #-936]
 	add	r0, sp, #4
 	ldr	r3, [r5, #-960]
@@ -13039,11 +13472,11 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-.L1510:
+.L1546:
 	cmp	r6, #0
-	bne	.L1513
-.L1511:
-	ldr	r2, .L1517+4
+	bne	.L1549
+.L1547:
+	ldr	r2, .L1553+4
 	ldrh	r3, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r2, [r2, #-2016]
@@ -13051,7 +13484,7 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r2, r3]
 	rsb	r1, r1, r0
 	strh	r1, [r2, r3]	@ movhi
-	ldr	r2, .L1517
+	ldr	r2, .L1553
 	movw	r3, #3916
 	ldrh	r3, [r2, r3]
 	strh	r3, [r4, #2]	@ movhi
@@ -13060,12 +13493,31 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	add	sp, sp, #40
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L1518:
+.L1554:
 	.align	2
-.L1517:
+.L1553:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
+	.size	FtlSuperblockPowerLostFix.part.19, .-FtlSuperblockPowerLostFix.part.19
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1557
+	ldr	r3, [r3, #4040]
+	cmp	r3, #0
+	bxne	lr
+	b	FtlSuperblockPowerLostFix.part.19
+.L1558:
+	.align	2
+.L1557:
+	.word	.LANCHOR0
+	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLowFormatEraseBlock
@@ -13076,161 +13528,165 @@ FtlLowFormatEraseBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	mov	sl, r1
+	ldr	r8, .L1589
 	.pad #28
 	sub	sp, sp, #28
-	ldr	r7, .L1548
-	mov	r8, r1
-	ldr	r9, .L1548+4
-	str	r0, [sp, #12]
-	ldr	r6, [r7, #-2088]
-	ldrb	r0, [r9, #3837]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldr	r6, [r8, #4040]
+	ldrb	r1, [r8, #3837]	@ zero_extendqisi2
 	cmp	r6, #0
-	str	r0, [sp, #16]
+	str	r1, [sp, #16]
 	movne	r4, #0
-	bne	.L1520
-	ldrb	r2, [r9, #928]	@ zero_extendqisi2
+	bne	.L1560
+	ldrb	r2, [r8, #928]	@ zero_extendqisi2
 	mov	r5, r6
-	ldr	r3, [sp, #12]
+	ldr	fp, .L1589+4
 	mov	r4, r6
-	mov	fp, #36
-	str	r2, [sp, #8]
-	str	r3, [r7, #-984]
-	b	.L1521
-.L1525:
-	mul	r3, fp, r6
-	ldr	r2, [r7, #-2084]
-	mov	r0, #0
-	ldr	r1, [sp, #12]
-	str	r0, [r2, r3]
-	add	r3, r9, r6
+	mov	r9, #36
+	str	r2, [sp, #4]
+	str	r0, [fp, #-984]
+	b	.L1561
+.L1565:
+	mul	r3, r9, r6
+	ldr	r2, [r8, #4044]
+	mov	r1, #0
+	str	r1, [r2, r3]
+	add	r3, r8, r6
+	ldr	r1, [sp, #8]
 	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
 	bl	V2P_block
-	cmp	r8, #0
-	mov	sl, r0
-	beq	.L1522
+	cmp	sl, #0
+	mov	r7, r0
+	beq	.L1562
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L1523
-.L1522:
-	mov	r0, sl
+	bne	.L1563
+.L1562:
+	mov	r0, r7
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
 	addne	r4, r4, #1
 	uxthne	r4, r4
-	bne	.L1523
+	bne	.L1563
 	movw	r1, #3928
-	ldr	r3, [r7, #-2084]
-	ldrh	r2, [r9, r1]
-	mov	sl, sl, asl #10
-	mla	r3, fp, r5, r3
+	ldr	r3, [r8, #4044]
+	ldrh	r2, [r8, r1]
+	mov	r7, r7, asl #10
+	mla	r3, r9, r5, r3
 	mul	r2, r2, r5
 	add	r5, r5, #1
 	uxth	r5, r5
 	add	r1, r2, #3
 	cmp	r2, #0
-	str	sl, [r3, #4]
+	str	r7, [r3, #4]
 	movlt	r2, r1
-	ldr	r1, [r7, #-932]
+	ldr	r1, [fp, #-932]
 	bic	r2, r2, #3
 	str	r0, [r3, #8]
 	add	r2, r1, r2
 	str	r2, [r3, #12]
-.L1523:
+.L1563:
 	add	r6, r6, #1
 	uxth	r6, r6
-.L1521:
+.L1561:
 	movw	r2, #3848
-	ldr	sl, .L1548+4
-	ldrh	r3, [r9, r2]
+	ldr	r7, .L1589
+	ldrh	r3, [r8, r2]
 	cmp	r3, r6
-	bhi	.L1525
+	bhi	.L1565
 	cmp	r5, #0
-	beq	.L1520
-	ldr	r3, [sp, #8]
-	mov	r7, #0
-	ldr	r9, .L1548
+	beq	.L1560
+	ldr	r3, [sp, #4]
+	mov	r8, #0
+	ldr	r0, [r7, #4044]
 	mov	r2, r5
 	adds	r6, r3, #0
-	strb	r7, [sl, #3837]
+	strb	r8, [r7, #3837]
+	mov	r9, r8
 	movne	r6, #1
-	ldr	r0, [r9, #-2084]
 	mov	r1, r6
 	bl	FlashEraseBlocks
-	ldr	r0, [sp, #16]
-	strb	r0, [sl, #3837]
-	mov	sl, r7
-.L1528:
-	ldr	r3, [r9, #-2084]
-	add	r2, r3, r7
-	ldr	r3, [r3, r7]
+	ldr	r1, [sp, #16]
+	strb	r1, [r7, #3837]
+.L1568:
+	ldr	r3, [r7, #4044]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
 	cmn	r3, #1
-	bne	.L1527
+	bne	.L1567
 	ldr	r0, [r2, #4]
 	add	r4, r4, #1
 	ubfx	r0, r0, #10, #16
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-.L1527:
-	add	sl, sl, #1
-	add	r7, r7, #36
-	uxth	sl, sl
-	cmp	sl, r5
-	bne	.L1528
-	cmp	r8, #0
-	moveq	r2, #6
-	moveq	sl, #1
-	streq	r2, [sp, #8]
-	beq	.L1529
-	ldr	r3, .L1548+4
+.L1567:
+	add	r9, r9, #1
+	add	r8, r8, #36
+	uxth	r9, r9
+	cmp	r9, r5
+	bne	.L1568
+	cmp	sl, #0
+	beq	.L1582
+	ldr	r3, .L1589
 	movw	r2, #3918
-	ldrh	sl, [r3, r2]
+	ldrh	r2, [r3, r2]
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	moveq	r1, sl, lsr #2
-	streq	r1, [sp, #8]
+	str	r2, [sp, #12]
+	moveq	r2, r2, lsr #2
+	streq	r2, [sp, #4]
 	moveq	r6, #1
-	movne	r6, #1
-	strne	r6, [sp, #8]
-.L1529:
-	mov	r7, #0
-.L1537:
+	beq	.L1569
+	b	.L1588
+.L1582:
+	mov	r3, #6
+	mov	r1, #1
+	str	r3, [sp, #4]
+	str	r1, [sp, #12]
+	b	.L1569
+.L1588:
+	mov	r6, #1
+	str	r6, [sp, #4]
+.L1569:
+	ldr	r7, .L1589
+	mov	r8, #0
+.L1577:
 	mov	r9, #0
-	ldr	fp, .L1548
+	ldr	fp, .L1589+4
 	mov	r5, r9
-	b	.L1530
-.L1533:
-	mov	r0, #36
-	ldr	r2, [fp, #-2084]
-	mul	r3, r0, r9
+	b	.L1570
+.L1573:
+	mov	r1, #36
+	ldr	r2, [r7, #4044]
+	mul	r3, r1, r9
 	mov	r1, #0
 	str	r1, [r2, r3]
-	ldr	r2, .L1548+4
-	ldr	r1, [sp, #12]
-	add	r3, r2, r9
+	add	r3, r7, r9
+	ldr	r1, [sp, #8]
 	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
 	bl	V2P_block
-	cmp	r8, #0
+	cmp	sl, #0
 	str	r0, [sp, #20]
-	beq	.L1531
+	beq	.L1571
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L1532
-.L1531:
+	bne	.L1572
+.L1571:
 	ldr	r0, [sp, #20]
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
-	bne	.L1532
-	ldr	r3, [fp, #-2084]
-	mov	r0, #36
+	bne	.L1572
+	ldr	r3, [r7, #4044]
+	mov	r2, #36
 	ldr	r1, [sp, #20]
-	mla	r3, r0, r5, r3
-	add	r2, r7, r1, asl #10
-	ldr	r1, .L1548+4
-	movw	r0, #3928
+	mla	r3, r2, r5, r3
+	add	r2, r8, r1, asl #10
+	movw	r1, #3928
 	str	r2, [r3, #4]
 	ldr	r2, [fp, #-944]
 	str	r2, [r3, #8]
-	ldrh	r2, [r1, r0]
+	ldrh	r2, [r7, r1]
 	mul	r2, r2, r5
 	add	r5, r5, #1
 	uxth	r5, r5
@@ -13241,120 +13697,111 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r1, r2
 	str	r2, [r3, #12]
-.L1532:
+.L1572:
 	add	r9, r9, #1
 	uxth	r9, r9
-.L1530:
-	ldr	ip, .L1548+4
+.L1570:
 	movw	r2, #3848
-	ldrh	r3, [ip, r2]
+	ldr	ip, .L1589
+	ldrh	r3, [r7, r2]
 	cmp	r3, r9
-	bhi	.L1533
+	bhi	.L1573
 	cmp	r5, #0
-	beq	.L1520
-	ldr	r9, .L1548
+	beq	.L1560
+	ldr	r0, [ip, #4044]
 	mov	r3, #0
 	mov	r1, r5
 	strb	r3, [ip, #3837]
 	mov	r2, r6
 	mov	r3, #1
-	ldr	r0, [r9, #-2084]
-	mov	fp, #0
-	str	ip, [sp, #4]
+	str	ip, [sp, #0]
 	bl	FlashProgPages
-	ldr	ip, [sp, #4]
-	mov	r3, fp
-	ldr	r0, [sp, #16]
-	strb	r0, [ip, #3837]
-	mov	ip, r8
-	mov	r8, r6
-	mov	r6, r5
-	mov	r5, fp
-.L1536:
-	ldr	r2, [r9, #-2084]
-	add	r1, r2, fp
-	ldr	r2, [r2, fp]
-	cmp	r2, #0
-	beq	.L1535
-	ldr	r0, [r1, #4]
+	ldr	ip, [sp, #0]
+	mov	r9, #0
+	ldr	r1, [sp, #16]
+	mov	fp, r9
+	strb	r1, [ip, #3837]
+.L1576:
+	ldr	r3, [r7, #4044]
+	add	r2, r3, r9
+	ldr	r3, [r3, r9]
+	cmp	r3, #0
+	beq	.L1575
+	ldr	r0, [r2, #4]
 	add	r4, r4, #1
-	str	ip, [sp, #4]
 	ubfx	r0, r0, #10, #16
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-	ldr	ip, [sp, #4]
-.L1535:
-	add	r5, r5, #1
-	add	fp, fp, #36
-	uxth	r5, r5
-	cmp	r5, r6
-	bne	.L1536
-	ldr	r1, [sp, #8]
-	mov	r5, r6
-	mov	r6, r8
-	mov	r8, ip
-	add	r7, r7, r1
-	uxth	r7, r7
-	cmp	r7, sl
-	bcc	.L1537
-	ldr	r9, .L1548
+.L1575:
+	add	fp, fp, #1
+	add	r9, r9, #36
+	uxth	fp, fp
+	cmp	fp, r5
+	bne	.L1576
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp, #12]
+	add	r8, r8, r2
+	uxth	r8, r8
+	cmp	r8, r3
+	bcc	.L1577
+	ldr	r9, .L1589
 	mov	r7, #0
-	mov	sl, r7
-.L1539:
-	cmp	r8, #0
-	beq	.L1538
-	ldr	r3, [r9, #-2084]
+	mov	r8, r7
+.L1579:
+	cmp	sl, #0
+	beq	.L1578
+	ldr	r3, [r9, #4044]
 	add	r2, r3, r7
 	ldr	r3, [r3, r7]
 	cmp	r3, #0
-	bne	.L1538
+	bne	.L1578
 	ldr	r0, [r2, #4]
 	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1538:
-	add	sl, sl, #1
+.L1578:
+	add	r8, r8, #1
 	add	r7, r7, #36
-	uxth	sl, sl
-	cmp	sl, r5
-	bne	.L1539
-	ldr	r2, [sp, #12]
-	cmp	r2, #63
+	uxth	r8, r8
+	cmp	r8, r5
+	bne	.L1579
+	ldr	r1, [sp, #8]
+	cmp	r1, #63
 	movhi	r3, #0
 	movls	r3, #1
-	cmp	r8, #0
-	moveq	r8, r3
-	orrne	r8, r3, #1
-	cmp	r8, #0
-	beq	.L1520
-	ldr	r3, .L1548
+	cmp	sl, #0
+	moveq	sl, r3
+	orrne	sl, r3, #1
+	cmp	sl, #0
+	beq	.L1560
+	ldr	r3, .L1589
 	mov	r1, r6
-	mov	r2, sl
-	ldr	r0, [r3, #-2084]
+	mov	r2, r8
+	ldr	r0, [r3, #4044]
 	bl	FlashEraseBlocks
-.L1520:
+.L1560:
 	mov	r0, r4
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1549:
+.L1590:
 	.align	2
-.L1548:
-	.word	.LANCHOR2
+.L1589:
 	.word	.LANCHOR0
+	.word	.LANCHOR2
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
-	.type	FlashTestBlk.part.23, %function
-FlashTestBlk.part.23:
+	.type	FlashTestBlk.part.25, %function
+FlashTestBlk.part.25:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.L1551:
+.L1592:
 	stmfd	sp!, {r4, r5, lr}
 	.save {r4, r5, lr}
 	.pad #108
 	sub	sp, sp, #108
-	ldr	r4, .L1553
+	ldr	r4, .L1594
 	mov	r5, r0
 	mov	r1, #165
 	add	r0, sp, #40
@@ -13388,12 +13835,12 @@ FlashTestBlk.part.23:
 	mov	r0, r4
 	add	sp, sp, #108
 	ldmfd	sp!, {r4, r5, pc}
-.L1554:
+.L1595:
 	.align	2
-.L1553:
+.L1594:
 	.word	.LANCHOR2
 	.fnend
-	.size	FlashTestBlk.part.23, .-FlashTestBlk.part.23
+	.size	FlashTestBlk.part.25, .-FlashTestBlk.part.25
 	.align	2
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
@@ -13402,17 +13849,17 @@ FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1557
+	ldr	r3, .L1598
 	ldr	r3, [r3, #156]
 	cmp	r0, r3
-	bcc	.L1556
-	b	FlashTestBlk.part.23
-.L1556:
+	bcc	.L1597
+	b	FlashTestBlk.part.25
+.L1597:
 	mov	r0, #0
 	bx	lr
-.L1558:
+.L1599:
 	.align	2
-.L1557:
+.L1598:
 	.word	.LANCHOR2
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -13423,7 +13870,7 @@ FlashMakeFactorBbt:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1587
+	ldr	r3, .L1628
 	movw	r1, #3062
 	movw	r2, #3060
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
@@ -13434,13 +13881,13 @@ FlashMakeFactorBbt:
 	mov	r5, #0
 	ldrh	fp, [r3, r1]
 	mov	r1, #1
-	ldr	r4, .L1587+4
+	ldr	r4, .L1628+4
 	mul	fp, fp, r2
 	ldr	r2, [r3, #3624]
 	ldr	r0, [r4, #228]
 	ldrb	r2, [r2, #24]	@ zero_extendqisi2
 	str	r0, [sp, #28]
-	ldr	r0, .L1587+8
+	ldr	r0, .L1628+8
 	uxth	fp, fp
 	str	r2, [sp, #12]
 	ldr	r2, [r3, #856]
@@ -13458,17 +13905,17 @@ FlashMakeFactorBbt:
 	bl	ftl_memset
 	sub	r3, fp, #1
 	mov	r2, fp, lsr #4
-	ldr	r4, .L1587
+	ldr	r4, .L1628
 	uxth	r3, r3
 	str	r2, [sp, #20]
 	str	r3, [sp, #24]
-	b	.L1561
-.L1583:
-	ldr	r3, .L1587+4
+	b	.L1602
+.L1624:
+	ldr	r3, .L1628+4
 	add	r2, r3, r5, asl #1
 	ldrh	r6, [r2, #232]
 	cmp	r6, #0
-	bne	.L1562
+	bne	.L1603
 	movw	r2, #3068
 	ldr	r0, [r3, #148]
 	ldrh	r2, [r4, r2]
@@ -13480,14 +13927,14 @@ FlashMakeFactorBbt:
 	bl	ftl_memset
 	add	r3, r4, r5
 	ldrb	r9, [r3, #3764]	@ zero_extendqisi2
-	b	.L1563
-.L1571:
+	b	.L1604
+.L1612:
 	mvn	r3, #0
 	strb	r3, [sp, #34]
 	strb	r3, [sp, #35]
 	ldr	r3, [sp, #12]
 	tst	r3, #1
-	beq	.L1564
+	beq	.L1605
 	ldr	r3, [sl, #3588]
 	add	r2, sp, #34
 	mov	r0, r9
@@ -13498,7 +13945,7 @@ FlashMakeFactorBbt:
 	ldrb	r2, [r4, #852]	@ zero_extendqisi2
 	ldr	r3, [sp, #4]
 	cmp	r2, #1
-	bne	.L1564
+	bne	.L1605
 	ldr	r1, [r4, #856]
 	add	r2, sp, #35
 	mov	r0, r9
@@ -13508,10 +13955,10 @@ FlashMakeFactorBbt:
 	ldrb	r2, [sp, #35]	@ zero_extendqisi2
 	and	r3, r2, r3
 	strb	r3, [sp, #34]
-.L1564:
+.L1605:
 	ldr	r0, [sp, #12]
 	tst	r0, #2
-	beq	.L1565
+	beq	.L1606
 	ldr	r3, [r4, #3624]
 	mov	r0, r9
 	add	r2, sp, #35
@@ -13521,42 +13968,42 @@ FlashMakeFactorBbt:
 	add	r1, r1, r3
 	add	r1, r1, r6
 	bl	FlashReadSpare
-.L1565:
+.L1606:
 	ldr	r3, [r4, #3624]
 	ldrb	r3, [r3, #7]	@ zero_extendqisi2
 	cmp	r3, #1
 	cmpne	r3, #8
 	ldrb	r3, [sp, #34]	@ zero_extendqisi2
-	bne	.L1566
+	bne	.L1607
 	cmp	r3, #0
-	beq	.L1585
+	beq	.L1626
 	ldrb	r0, [sp, #35]	@ zero_extendqisi2
 	rsbs	r0, r0, #1
 	movcc	r0, #0
-	b	.L1567
-.L1566:
+	b	.L1608
+.L1607:
 	cmp	r3, #255
-	bne	.L1585
+	bne	.L1626
 	ldrb	r0, [sp, #35]	@ zero_extendqisi2
 	subs	r0, r0, #255
 	movne	r0, #1
-	b	.L1567
-.L1585:
+	b	.L1608
+.L1626:
 	mov	r0, #1
-.L1567:
+.L1608:
 	ldr	r2, [sp, #12]
 	tst	r2, #4
-	beq	.L1568
+	beq	.L1609
 	ldr	r1, [sl, #3588]
 	mov	r0, r9
 	add	r1, r6, r1
 	bl	SandiskProgTestBadBlock
-.L1568:
+.L1609:
 	cmp	r0, #0
-	beq	.L1569
+	beq	.L1610
 	mov	r1, r5
 	mov	r2, r8
-	ldr	r0, .L1587+12
+	ldr	r0, .L1628+12
 	add	r7, r7, #1
 	bl	printk
 	ldr	r3, [sp, #16]
@@ -13564,7 +14011,7 @@ FlashMakeFactorBbt:
 	mov	ip, #1
 	uxth	r7, r7
 	mov	r2, r3, lsr #5
-	ldr	r3, .L1587+4
+	ldr	r3, .L1628+4
 	ldr	r3, [r3, #148]
 	ldr	r1, [r3, r2, asl #2]
 	orr	r1, r1, ip, asl r0
@@ -13573,18 +14020,18 @@ FlashMakeFactorBbt:
 	ldrb	r3, [r4, #3762]	@ zero_extendqisi2
 	mul	r3, r3, r0
 	cmp	r7, r3
-	bgt	.L1570
-.L1569:
+	bgt	.L1611
+.L1610:
 	ldr	r2, [sp, #8]
 	add	r8, r8, #1
 	add	r6, r6, r2
-.L1563:
+.L1604:
 	uxth	r3, r8
 	str	r3, [sp, #16]
 	cmp	r3, fp
-	bcc	.L1571
-.L1570:
-	ldr	r0, .L1587+16
+	bcc	.L1612
+.L1611:
+	ldr	r0, .L1628+16
 	mov	r1, r5
 	mov	r2, r7
 	bl	printk
@@ -13592,29 +14039,29 @@ FlashMakeFactorBbt:
 	ldr	r0, [sp, #20]
 	mul	r3, r3, r0
 	cmp	r7, r3
-	blt	.L1572
+	blt	.L1613
 	movw	r3, #3068
 	mov	r1, #0
 	ldrh	r2, [r4, r3]
-	ldr	r3, .L1587+4
+	ldr	r3, .L1628+4
 	mov	r2, r2, asl #9
 	ldr	r0, [r3, #148]
 	bl	ftl_memset
-.L1572:
+.L1613:
 	cmp	r5, #0
-	bne	.L1573
-	ldr	sl, .L1587+4
+	bne	.L1614
+	ldr	sl, .L1628+4
 	mov	r8, r5
 	mov	r7, r5
 	ldrh	r9, [sl, #156]
-	b	.L1574
-.L1576:
+	b	.L1615
+.L1617:
 	mov	r0, r6
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1575
+	beq	.L1616
 	mov	r1, r6
-	ldr	r0, .L1587+20
+	ldr	r0, .L1628+20
 	bl	printk
 	ldr	r3, [sl, #148]
 	mov	r2, r6, lsr #5
@@ -13625,27 +14072,27 @@ FlashMakeFactorBbt:
 	uxth	r7, r7
 	orr	r6, r1, r0, asl r6
 	str	r6, [r3, r2, asl #2]
-.L1575:
+.L1616:
 	add	r8, r8, #1
 	uxth	r8, r8
-.L1574:
+.L1615:
 	add	r6, r8, r9
 	ldrb	r3, [r4, #853]	@ zero_extendqisi2
 	uxth	r6, r6
 	cmp	r3, r6
-	bhi	.L1576
+	bhi	.L1617
 	ldr	r6, [sp, #24]
 	sub	r9, fp, #50
-	ldr	sl, .L1587+4
+	ldr	sl, .L1628+4
 	mov	r8, #1
-	b	.L1577
-.L1579:
+	b	.L1618
+.L1620:
 	mov	r0, r6
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1578
+	beq	.L1619
 	mov	r1, r6
-	ldr	r0, .L1587+20
+	ldr	r0, .L1628+20
 	bl	printk
 	ldr	r3, [sl, #148]
 	mov	r2, r6, lsr #5
@@ -13653,48 +14100,48 @@ FlashMakeFactorBbt:
 	ldr	r1, [r3, r2, asl #2]
 	orr	r1, r1, r8, asl r0
 	str	r1, [r3, r2, asl #2]
-.L1578:
+.L1619:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1577:
+.L1618:
 	cmp	r6, r9
-	bgt	.L1579
-	ldr	r3, .L1587+4
+	bgt	.L1620
+	ldr	r3, .L1628+4
 	ldrb	r1, [r4, #853]	@ zero_extendqisi2
 	ldr	r2, [r3, #156]
 	rsb	r2, r2, r1
 	cmp	r7, r2
-	bcc	.L1573
+	bcc	.L1614
 	movw	r2, #3068
 	ldr	r0, [r3, #148]
 	ldrh	r2, [r4, r2]
 	mov	r1, #0
 	mov	r2, r2, asl #9
 	bl	ftl_memset
-.L1573:
+.L1614:
 	mul	r8, fp, r5
-	ldr	r7, .L1587+4
+	ldr	r7, .L1628+4
 	ldr	r6, [sp, #24]
 	ldr	r9, [sp, #28]
 	add	sl, r7, r5, asl #1
-.L1580:
-	ldr	r0, .L1587+24
+.L1621:
+	ldr	r0, .L1628+24
 	mov	r1, r5
 	mov	r2, r6
 	bl	printk
 	ldr	r3, [r7, #148]
-	b	.L1581
-.L1582:
+	b	.L1622
+.L1623:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1581:
+.L1622:
 	mov	r1, r6, lsr #5
 	and	r2, r6, #31
 	ldr	r1, [r3, r1, asl #2]
 	mov	r2, r1, lsr r2
 	ands	r2, r2, #1
-	bne	.L1582
-	ldr	r3, .L1587+28
+	bne	.L1623
+	ldr	r3, .L1628+28
 	mov	r1, #1
 	strh	r6, [sl, #232]	@ movhi
 	add	r0, sp, #36
@@ -13719,26 +14166,26 @@ FlashMakeFactorBbt:
 	cmp	r3, #0
 	subne	r6, r6, #1
 	uxthne	r6, r6
-	bne	.L1580
-.L1562:
+	bne	.L1621
+.L1603:
 	add	r5, r5, #1
 	uxtb	r5, r5
-.L1561:
+.L1602:
 	ldrb	r3, [r4, #3762]	@ zero_extendqisi2
 	cmp	r3, r5
-	bhi	.L1583
+	bhi	.L1624
 	add	sp, sp, #76
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1588:
+.L1629:
 	.align	2
-.L1587:
+.L1628:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LC111
-	.word	.LC112
-	.word	.LC113
-	.word	.LC114
-	.word	.LC115
+	.word	.LC118
+	.word	.LC119
+	.word	.LC120
+	.word	.LC121
+	.word	.LC122
 	.word	-3872
 	.fnend
 	.size	FlashMakeFactorBbt, .-FlashMakeFactorBbt
@@ -13749,8 +14196,8 @@ ftl_map_blk_gc:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, lr}
 	mov	r4, r0
 	ldr	r6, [r0, #12]
 	ldr	r5, [r0, #24]
@@ -13759,61 +14206,61 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	sub	r3, ip, #4
 	cmp	r2, r3
-	bge	.L1590
+	bge	.L1631
 	ldrh	r2, [r4, #40]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1591
-	ldr	r1, .L1603
+	beq	.L1632
+	ldr	r1, .L1645
 	movw	r3, #3918
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r1, r3]
 	cmp	r2, r3
-	bcc	.L1591
-.L1590:
+	bcc	.L1632
+.L1631:
 	ldrh	r1, [r4, #40]
 	movw	r3, #65535
 	uxth	r7, r0
 	cmp	r1, r3
-	beq	.L1592
-	ldr	r0, .L1603
+	beq	.L1633
+	ldr	r0, .L1645
 	movw	r2, #3918
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r0, r2]
 	cmp	r2, r3
 	movls	r0, r6
 	movls	r2, #0
-	bhi	.L1592
-	b	.L1593
-.L1595:
+	bhi	.L1633
+	b	.L1634
+.L1636:
 	ldrh	lr, [r0], #2
 	cmp	lr, r1
-	beq	.L1602
+	beq	.L1644
 	add	r2, r2, #1
 	uxth	r2, r2
-.L1593:
+.L1634:
 	cmp	r2, ip
-	bne	.L1595
-	b	.L1594
-.L1602:
+	bne	.L1636
+	b	.L1635
+.L1644:
 	mov	r7, r2
-.L1594:
+.L1635:
 	mov	r2, r2, asl #1
-	ldr	r0, .L1603+4
+	ldr	r0, .L1645+4
 	ldrh	r2, [r6, r2]
 	bl	printk
 	mvn	r3, #0
 	strh	r3, [r4, #40]	@ movhi
-.L1592:
+.L1633:
 	mov	r7, r7, asl #1
 	ldrh	r8, [r6, r7]
 	cmp	r8, #0
-	beq	.L1591
+	beq	.L1632
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L1591
+	bne	.L1632
 	mov	r2, #1
-	ldr	r1, .L1603
+	ldr	r1, .L1645
 	str	r2, [r4, #32]
 	strh	r3, [r6, r7]	@ movhi
 	ldrh	r3, [r4, #8]
@@ -13823,77 +14270,83 @@ ftl_map_blk_gc:
 	movw	r3, #3918
 	ldrh	r3, [r1, r3]
 	cmp	r2, r3
-	bcc	.L1596
+	bcc	.L1637
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1596:
-	mov	r7, #0
-	ldr	r6, .L1603+8
-	mov	fp, r7
-	b	.L1597
-.L1600:
-	ldr	r3, [r5, r7, asl #2]
-	mov	r9, r7, asl #2
+.L1637:
+	mov	r6, #0
+	ldr	r7, .L1645+8
+	b	.L1638
+.L1643:
+	ldr	r3, [r5, r6, asl #2]
+	add	r9, r5, r6, asl #2
 	cmp	r8, r3, lsr #10
-	bne	.L1598
-	ldr	r3, [r6, #-956]
+	bne	.L1639
+	ldr	r3, [r7, #-956]
 	mov	r1, #1
-	ldr	sl, [r6, #-936]
+	ldr	sl, [r7, #-936]
 	mov	r2, r1
-	ldr	r0, .L1603+12
-	str	r3, [r6, #188]
-	str	sl, [r6, #192]
-	ldr	r3, [r5, r7, asl #2]
-	str	r3, [r6, #184]
+	ldr	r0, .L1645+12
+	str	r3, [r7, #188]
+	str	sl, [r7, #192]
+	ldr	r3, [r5, r6, asl #2]
+	str	r3, [r7, #184]
 	bl	FlashReadPages
-	ldr	r3, [r6, #180]
+	ldr	r3, [r7, #180]
 	cmn	r3, #1
-	bne	.L1599
-	str	fp, [r5, r9]
-	ldr	r0, .L1603+16
-	ldr	r1, [r6, #184]
+	beq	.L1640
+	ldrh	r3, [sl, #8]
+	cmp	r3, r6
+	beq	.L1641
+.L1640:
+	mov	r3, #0
+	str	r3, [r9, #0]
+	ldr	r3, .L1645+8
 	ldrh	r2, [sl, #8]
+	ldr	r0, .L1645+16
+	ldr	r1, [r3, #184]
 	bl	printk
-	mov	r3, #1
-	str	r3, [r6, #-2088]
-	b	.L1598
-.L1599:
+	ldr	r3, .L1645
+	mov	r2, #1
+	str	r2, [r3, #4040]
+	b	.L1642
+.L1641:
 	mov	r0, r4
-	mov	r1, r7
-	ldr	r2, [r6, #188]
+	mov	r1, r6
+	ldr	r2, [r7, #188]
 	bl	FtlMapWritePage
-.L1598:
-	add	r7, r7, #1
-	uxth	r7, r7
-.L1597:
+.L1639:
+	add	r6, r6, #1
+	uxth	r6, r6
+.L1638:
 	ldrh	r3, [r4, #6]
-	cmp	r3, r7
-	bhi	.L1600
+	cmp	r3, r6
+	bhi	.L1643
 	mov	r0, r8
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	mov	r3, #0
 	str	r3, [r4, #32]
-.L1591:
-	ldr	r1, .L1603
+.L1632:
+	ldr	r1, .L1645
 	movw	r3, #3918
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r1, r3]
 	cmp	r2, r3
-	bcc	.L1601
+	bcc	.L1642
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1601:
+.L1642:
 	mov	r0, #0
-	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1604:
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+.L1646:
 	.align	2
-.L1603:
+.L1645:
 	.word	.LANCHOR0
-	.word	.LC116
+	.word	.LC123
 	.word	.LANCHOR2
 	.word	.LANCHOR2+180
-	.word	.LC117
+	.word	.LC124
 	.fnend
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
@@ -13903,60 +14356,60 @@ Ftl_write_map_blk_to_last_page:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1653
 	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
-	ldr	r5, .L1611
-	ldr	r7, [r0, #12]
-	ldr	r8, [r0, #24]
-	ldr	r6, [r5, #-2088]
+	ldr	r6, [r3, #4040]
+	ldr	r5, [r0, #12]
 	cmp	r6, #0
-	bne	.L1606
-	ldrh	r3, [r0, #0]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1607
+	ldr	r8, [r0, #24]
+	bne	.L1648
+	ldrh	r2, [r0, #0]
+	movw	r1, #65535
+	cmp	r2, r1
+	bne	.L1649
 	ldrh	r3, [r0, #8]
 	add	r3, r3, #1
 	strh	r3, [r0, #8]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	strh	r0, [r7, #0]	@ movhi
+	strh	r0, [r5, #0]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	add	r3, r3, #1
 	strh	r6, [r4, #0]	@ movhi
 	str	r3, [r4, #28]
-	b	.L1606
-.L1607:
-	mov	r3, r3, asl #1
-	ldr	r2, [r0, #28]
+	b	.L1648
+.L1649:
+	mov	r2, r2, asl #1
+	ldr	r1, [r0, #28]
+	ldrh	r7, [r5, r2]
+	ldr	r5, .L1653+4
+	ldrh	r2, [r0, #2]
+	orr	r2, r2, r7, asl #10
+	str	r2, [r5, #184]
+	ldr	r2, [r5, #-960]
+	str	r2, [r5, #188]
+	ldr	r2, [r5, #-936]
+	str	r2, [r5, #192]
+	str	r1, [r2, #4]
+	ldr	r1, .L1653+8
+	strh	r1, [r2, #8]	@ movhi
+	ldrh	r1, [r0, #4]
+	strh	r7, [r2, #2]	@ movhi
+	strh	r1, [r2, #0]	@ movhi
+	movw	r2, #3918
+	ldrh	r2, [r3, r2]
 	mov	r1, #255
-	ldrh	r7, [r7, r3]
-	ldrh	r3, [r0, #2]
-	orr	r3, r3, r7, asl #10
-	str	r3, [r5, #184]
-	ldr	r3, [r5, #-960]
-	str	r3, [r5, #188]
-	ldr	r3, [r5, #-936]
-	str	r3, [r5, #192]
-	str	r2, [r3, #4]
-	ldr	r2, .L1611+4
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r0, #4]
-	strh	r7, [r3, #2]	@ movhi
-	strh	r2, [r3, #0]	@ movhi
-	movw	r3, #3918
-	ldr	r2, .L1611+8
 	ldr	r0, [r5, #-960]
-	ldrh	r2, [r2, r3]
 	mov	r2, r2, asl #3
 	bl	ftl_memset
 	mov	r3, r6
-	b	.L1608
-.L1610:
+	b	.L1650
+.L1652:
 	ldr	r2, [r8, r3, asl #2]
 	cmp	r7, r2, lsr #10
-	bne	.L1609
+	bne	.L1651
 	add	r6, r6, #1
 	ldr	r2, [r5, #-960]
 	uxth	r6, r6
@@ -13965,16 +14418,16 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r8, r3, asl #2]
 	add	r2, r2, r6, asl #3
 	str	r1, [r2, #4]
-.L1609:
+.L1651:
 	add	r3, r3, #1
 	uxth	r3, r3
-.L1608:
+.L1650:
 	ldrh	r2, [r4, #6]
 	cmp	r2, r3
-	bhi	.L1610
+	bhi	.L1652
 	mov	r1, #1
 	mov	r3, #0
-	ldr	r0, .L1611+12
+	ldr	r0, .L1653+12
 	mov	r2, r1
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
@@ -13982,33 +14435,35 @@ Ftl_write_map_blk_to_last_page:
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-.L1606:
+.L1648:
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L1612:
+.L1654:
 	.align	2
-.L1611:
+.L1653:
+	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1291
-	.word	.LANCHOR0
 	.word	.LANCHOR2+180
 	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
-	.type	FtlMapWritePage.part.14, %function
-FtlMapWritePage.part.14:
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, lr}
+	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r4, r0
-	ldr	r5, .L1626
+	ldr	r8, .L1667
 	mov	sl, r1
-	ldr	r8, .L1626+4
+	ldr	r5, .L1667+4
 	mov	r9, r2
 	mov	r6, #0
-.L1624:
+	mov	fp, r8
+.L1666:
 	ldr	r3, [r5, #-1820]
 	add	r3, r3, #1
 	str	r3, [r5, #-1820]
@@ -14017,17 +14472,19 @@ FtlMapWritePage.part.14:
 	ldrh	r3, [r8, r3]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L1615
+	bge	.L1657
 	ldrh	r2, [r4, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1616
-.L1615:
+	bne	.L1658
+.L1657:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L1616:
+.L1658:
+	ldr	r1, [fp, #4040]
+	cmp	r1, #0
+	bne	.L1659
 	ldrh	r3, [r4, #0]
-	mov	r1, #0
 	ldr	r2, [r4, #12]
 	ldr	r0, [r5, #-936]
 	mov	r3, r3, asl #1
@@ -14042,7 +14499,7 @@ FtlMapWritePage.part.14:
 	ldr	r3, [r5, #192]
 	mov	r1, #1
 	ldr	r2, [r4, #28]
-	ldr	r0, .L1626+8
+	ldr	r0, .L1667+8
 	strh	sl, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -14057,8 +14514,8 @@ FtlMapWritePage.part.14:
 	strh	r2, [r4, #2]	@ movhi
 	ldr	r3, [r5, #180]
 	cmn	r3, #1
-	bne	.L1617
-	ldr	r0, .L1626+12
+	bne	.L1660
+	ldr	r0, .L1667+12
 	add	r6, r6, #1
 	ldr	r1, [r5, #184]
 	bl	printk
@@ -14070,58 +14527,38 @@ FtlMapWritePage.part.14:
 	subls	r3, r3, #1
 	strlsh	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1624
-	ldr	r4, .L1626
+	bls	.L1666
+	ldr	r3, .L1667+4
 	mov	r2, r6
-	ldr	r0, .L1626+16
-	ldr	r1, [r4, #184]
+	ldr	r0, .L1667+16
+	ldr	r1, [r3, #184]
 	bl	printk
-	mov	r3, #1
-	str	r3, [r4, #-2088]
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L1617:
+	ldr	r3, .L1667
+	mov	r2, #1
+	str	r2, [r3, #4040]
+	b	.L1659
+.L1660:
 	cmp	r3, #0
 	strneh	r7, [r4, #40]	@ movhi
 	cmp	r2, #1
-	beq	.L1624
+	beq	.L1666
 	cmp	r3, #256
-	beq	.L1624
-	ldr	r3, .L1626
+	beq	.L1666
+	ldr	r3, .L1667+4
 	ldr	r2, [r3, #184]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, sl, asl #2]
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L1627:
-	.align	2
-.L1626:
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LANCHOR2+180
-	.word	.LC118
-	.word	.LC119
-	.fnend
-	.size	FtlMapWritePage.part.14, .-FtlMapWritePage.part.14
-	.align	2
-	.global	FtlMapWritePage
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	ldr	r3, .L1630
-	ldr	r3, [r3, #-2088]
-	cmp	r3, #0
-	bne	.L1629
-	bl	FtlMapWritePage.part.14
-.L1629:
+.L1659:
 	mov	r0, #0
-	ldmfd	sp!, {r3, pc}
-.L1631:
+	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1668:
 	.align	2
-.L1630:
+.L1667:
+	.word	.LANCHOR0
 	.word	.LANCHOR2
+	.word	.LANCHOR2+180
+	.word	.LC125
+	.word	.LC126
 	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
@@ -14134,7 +14571,7 @@ flush_l2p_region:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r4, #12
-	ldr	r5, .L1633
+	ldr	r5, .L1670
 	mul	r4, r4, r0
 	sub	r0, r5, #1088
 	ldr	r2, [r5, #-1852]
@@ -14149,9 +14586,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L1634:
+.L1671:
 	.align	2
-.L1633:
+.L1670:
 	.word	.LANCHOR2
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14162,53 +14599,52 @@ FtlMapBlkWriteDumpData:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r3, [r0, #36]
-	ldrh	r5, [r0, #6]
+	ldrh	r6, [r0, #6]
 	cmp	r3, #0
 	ldr	r2, [r0, #24]
-	ldmeqfd	sp!, {r3, r4, r5, pc}
+	ldmeqfd	sp!, {r4, r5, r6, pc}
 	mov	r3, #0
 	str	r3, [r0, #36]
-	ldr	r3, .L1639
-	ldr	r1, [r3, #-2088]
+	ldr	r3, .L1676
+	ldr	r1, [r3, #4040]
 	cmp	r1, #0
-	ldmnefd	sp!, {r3, r4, r5, pc}
-	sub	r5, r5, #1
-	ldr	r0, [r3, #-956]
-	ldr	r1, [r3, #-936]
-	uxth	r5, r5
-	str	r0, [r3, #188]
-	str	r1, [r3, #192]
-	ldr	r2, [r2, r5, asl #2]
+	ldmnefd	sp!, {r4, r5, r6, pc}
+	ldr	r5, .L1676+4
+	sub	r6, r6, #1
+	uxth	r6, r6
+	ldr	r0, [r5, #-956]
+	ldr	r1, [r5, #-936]
+	str	r0, [r5, #188]
+	str	r1, [r5, #192]
+	ldr	r2, [r2, r6, asl #2]
 	cmp	r2, #0
-	str	r2, [r3, #184]
-	beq	.L1637
+	str	r2, [r5, #184]
+	beq	.L1674
 	mov	r1, #1
-	add	r0, r3, #180
+	add	r0, r5, #180
 	mov	r2, r1
 	bl	FlashReadPages
-	b	.L1638
-.L1637:
-	ldr	r2, .L1639+4
-	movw	r3, #3926
+	b	.L1675
+.L1674:
+	movw	r2, #3926
 	mov	r1, #255
-	ldrh	r2, [r2, r3]
+	ldrh	r2, [r3, r2]
 	bl	ftl_memset
-.L1638:
-	ldr	r3, .L1639
+.L1675:
 	mov	r0, r4
-	mov	r1, r5
-	ldr	r2, [r3, #188]
-	ldmfd	sp!, {r3, r4, r5, lr}
+	mov	r1, r6
+	ldr	r2, [r5, #188]
+	ldmfd	sp!, {r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L1640:
+.L1677:
 	.align	2
-.L1639:
-	.word	.LANCHOR2
+.L1676:
 	.word	.LANCHOR0
+	.word	.LANCHOR2
 	.fnend
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.align	2
@@ -14218,7 +14654,7 @@ FtlVendorPartRead:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1652
+	ldr	r3, .L1689
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r9, r2
@@ -14233,20 +14669,20 @@ FtlVendorPartRead:
 	mov	r8, r0
 	cmp	r1, r2
 	mvnhi	fp, #0
-	bhi	.L1642
+	bhi	.L1679
 	mov	r7, r0, lsr r7
 	mov	fp, #0
-	ldr	r6, .L1652+4
+	ldr	r6, .L1689+4
 	mov	r2, r7, asl #2
 	str	r2, [sp, #0]
-	b	.L1643
-.L1649:
+	b	.L1680
+.L1686:
 	ldr	r3, [r6, #-904]
 	mov	r0, r8
 	ldr	r2, [sp, #0]
 	ldr	sl, [r3, r2]
 	movw	r3, #3922
-	ldr	r2, .L1652
+	ldr	r2, .L1689
 	ldrh	r4, [r2, r3]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
@@ -14257,8 +14693,8 @@ FtlVendorPartRead:
 	cmp	r4, r5
 	uxthhi	r4, r5
 	cmp	sl, #0
-	beq	.L1645
-	ldr	r2, .L1652+4
+	beq	.L1682
+	ldr	r2, .L1689+4
 	mov	r1, #1
 	add	r0, sp, #12
 	str	sl, [sp, #16]
@@ -14273,29 +14709,29 @@ FtlVendorPartRead:
 	moveq	fp, r3
 	ldr	r3, [r6, #180]
 	cmp	r3, #256
-	bne	.L1647
+	bne	.L1684
 	mov	r1, r7
 	mov	r2, sl
-	ldr	r0, .L1652+8
+	ldr	r0, .L1689+8
 	bl	printk
-	ldr	r0, .L1652+12
+	ldr	r0, .L1689+12
 	mov	r1, r7
 	ldr	r2, [r6, #-952]
 	bl	FtlMapWritePage
-.L1647:
+.L1684:
 	ldr	r3, [sp, #4]
 	mov	r0, r9
 	ldr	r1, [r6, #-952]
 	mov	r2, r4, asl #9
 	add	r1, r1, r3, asl #9
 	bl	memcpy
-	b	.L1648
-.L1645:
+	b	.L1685
+.L1682:
 	mov	r0, r9
 	mov	r1, sl
 	mov	r2, r4, asl #9
 	bl	ftl_memset
-.L1648:
+.L1685:
 	ldr	r3, [sp, #0]
 	add	r7, r7, #1
 	rsb	r5, r4, r5
@@ -14303,19 +14739,19 @@ FtlVendorPartRead:
 	add	r9, r9, r4, asl #9
 	add	r3, r3, #4
 	str	r3, [sp, #0]
-.L1643:
+.L1680:
 	cmp	r5, #0
-	bne	.L1649
-.L1642:
+	bne	.L1686
+.L1679:
 	mov	r0, fp
 	add	sp, sp, #52
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1653:
+.L1690:
 	.align	2
-.L1652:
+.L1689:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LC120
+	.word	.LC127
 	.word	.LANCHOR2+248
 	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -14329,25 +14765,26 @@ Ftl_load_ext_data:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r0, #0
-	ldr	r5, .L1658
+	ldr	r5, .L1695
 	mov	r1, #1
-	ldr	r2, .L1658+4
+	ldr	r2, .L1695+4
 	bl	FtlVendorPartRead
-	ldr	r4, .L1658+8
+	ldr	r4, .L1695+8
 	ldr	r3, [r5, #-1708]
 	cmp	r3, r4
-	beq	.L1655
-	ldr	r0, .L1658+4
+	beq	.L1692
+	ldr	r0, .L1695+4
 	mov	r1, #0
 	mov	r2, #512
 	bl	ftl_memset
 	str	r4, [r5, #-1708]
-.L1655:
+.L1692:
 	ldr	r2, [r5, #-1708]
-	ldr	r3, .L1658
+	ldr	r3, .L1695
 	cmp	r2, r4
-	bne	.L1656
+	bne	.L1693
 	ldr	r2, [r3, #-1620]
+	ldr	r1, [r3, #-1676]
 	str	r2, [r3, #-1812]
 	ldr	r2, [r3, #-1616]
 	str	r2, [r3, #-1808]
@@ -14361,8 +14798,8 @@ Ftl_load_ext_data:
 	str	r2, [r3, #-1820]
 	ldr	r2, [r3, #-1680]
 	str	r2, [r3, #-1792]
-	ldr	r2, [r3, #-1676]
-	str	r2, [r3, #-2076]
+	ldr	r2, .L1695+12
+	str	r1, [r2, #4052]
 	ldr	r2, [r3, #-1672]
 	str	r2, [r3, #-1832]
 	ldr	r2, [r3, #-1668]
@@ -14373,21 +14810,21 @@ Ftl_load_ext_data:
 	str	r2, [r3, #-1780]
 	ldr	r2, [r3, #-1648]
 	str	r2, [r3, #-1712]
-.L1656:
-	ldr	r4, .L1658
+.L1693:
+	ldr	r4, .L1695
 	mov	r3, #0
-	ldr	r5, .L1658+12
+	ldr	r5, .L1695+12
 	str	r3, [r4, #-1000]
 	ldr	r2, [r4, #-1640]
-	ldr	r3, .L1658+16
+	ldr	r3, .L1695+16
 	cmp	r2, r3
-	bne	.L1657
+	bne	.L1694
 	mov	r3, #1
-	ldr	r0, .L1658+20
+	ldr	r0, .L1695+20
 	str	r3, [r5, #3840]
-	ldr	r1, .L1658+24
+	ldr	r1, .L1695+24
 	bl	printk
-.L1657:
+.L1694:
 	movw	r3, #3906
 	ldr	r0, [r4, #-1796]
 	ldrh	r2, [r5, r3]
@@ -14398,16 +14835,16 @@ Ftl_load_ext_data:
 	bl	__aeabi_uidiv
 	str	r0, [r4, #-1788]
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L1659:
+.L1696:
 	.align	2
-.L1658:
+.L1695:
 	.word	.LANCHOR2
 	.word	.LANCHOR2-1708
 	.word	1179929683
 	.word	.LANCHOR0
 	.word	305432421
 	.word	.LC78
-	.word	.LC121
+	.word	.LC128
 	.fnend
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.align	2
@@ -14420,34 +14857,34 @@ FtlLoadEctTbl:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r0, #64
-	ldr	r4, .L1662
-	ldr	r5, .L1662+4
+	ldr	r4, .L1699
+	ldr	r5, .L1699+4
 	ldr	r2, [r4, #-920]
 	ldrh	r1, [r4, r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #-920]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1662+8
+	ldr	r3, .L1699+8
 	cmp	r2, r3
-	beq	.L1661
-	ldr	r1, .L1662+12
-	ldr	r0, .L1662+16
+	beq	.L1698
+	ldr	r1, .L1699+12
+	ldr	r0, .L1699+16
 	bl	printk
 	ldrh	r2, [r4, r5]
 	ldr	r0, [r4, #-920]
 	mov	r1, #0
 	mov	r2, r2, asl #9
 	bl	ftl_memset
-.L1661:
+.L1698:
 	mov	r0, #0
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L1663:
+.L1700:
 	.align	2
-.L1662:
+.L1699:
 	.word	.LANCHOR2
 	.word	-924
 	.word	1112818501
-	.word	.LC122
+	.word	.LC129
 	.word	.LC78
 	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
@@ -14458,7 +14895,7 @@ FtlVendorPartWrite:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1674
+	ldr	r3, .L1711
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r9, r2
@@ -14473,15 +14910,15 @@ FtlVendorPartWrite:
 	mov	r6, r0
 	cmp	r1, r2
 	mvnhi	r7, #0
-	bhi	.L1665
+	bhi	.L1702
 	mov	r8, r0, lsr r8
 	mov	r7, #0
-	ldr	sl, .L1674+4
+	ldr	sl, .L1711+4
 	mov	ip, r8, asl #2
 	str	ip, [sp, #8]
-	b	.L1666
-.L1671:
-	ldr	r1, .L1674
+	b	.L1703
+.L1708:
+	ldr	r1, .L1711
 	movw	r2, #3922
 	ldr	ip, [sp, #8]
 	mov	r0, r6
@@ -14492,7 +14929,7 @@ FtlVendorPartWrite:
 	str	r3, [sp, #4]
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #4]
-	ldr	r2, .L1674+4
+	ldr	r2, .L1711+4
 	uxth	r1, r1
 	str	r1, [sp, #12]
 	rsb	r5, r1, fp
@@ -14500,9 +14937,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	uxthhi	r5, r4
 	cmp	r3, #0
-	beq	.L1668
+	beq	.L1705
 	cmp	r5, fp
-	beq	.L1668
+	beq	.L1705
 	str	r3, [sp, #24]
 	mov	r1, #1
 	ldr	r3, [r2, #-952]
@@ -14512,15 +14949,15 @@ FtlVendorPartWrite:
 	mov	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-	b	.L1669
-.L1668:
-	ldr	ip, .L1674
+	b	.L1706
+.L1705:
+	ldr	ip, .L1711
 	movw	r3, #3926
 	ldr	r0, [r2, #-952]
 	mov	r1, #0
 	ldrh	r2, [ip, r3]
 	bl	ftl_memset
-.L1669:
+.L1706:
 	ldr	r3, [sp, #12]
 	mov	fp, r5, asl #9
 	ldr	r0, [sl, #-952]
@@ -14531,7 +14968,7 @@ FtlVendorPartWrite:
 	add	r6, r6, r5
 	bl	memcpy
 	mov	r1, r8
-	ldr	r0, .L1674+8
+	ldr	r0, .L1711+8
 	add	r8, r8, #1
 	ldr	r2, [sl, #-952]
 	add	r9, r9, fp
@@ -14541,16 +14978,16 @@ FtlVendorPartWrite:
 	str	ip, [sp, #8]
 	cmn	r0, #1
 	moveq	r7, r0
-.L1666:
+.L1703:
 	cmp	r4, #0
-	bne	.L1671
-.L1665:
+	bne	.L1708
+.L1702:
 	mov	r0, r7
 	add	sp, sp, #60
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1675:
+.L1712:
 	.align	2
-.L1674:
+.L1711:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR2+248
@@ -14564,12 +15001,12 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1678
-	ldr	r2, .L1678+4
+	ldr	r3, .L1715
+	ldr	r2, .L1715+4
 	ldr	r1, [r3, #-1708]
 	cmp	r1, r2
 	bxne	lr
-	ldr	r2, .L1678+8
+	ldr	r2, .L1715+8
 	mov	r0, #0
 	mov	r1, #1
 	str	r2, [r3, #-1704]
@@ -14587,7 +15024,8 @@ Ftl_save_ext_data:
 	str	r2, [r3, #-1688]
 	ldr	r2, [r3, #-1792]
 	str	r2, [r3, #-1680]
-	ldr	r2, [r3, #-2076]
+	ldr	r2, .L1715+12
+	ldr	r2, [r2, #4052]
 	str	r2, [r3, #-1676]
 	ldr	r2, [r3, #-1832]
 	str	r2, [r3, #-1672]
@@ -14601,14 +15039,15 @@ Ftl_save_ext_data:
 	str	r2, [r3, #-1648]
 	ldr	r2, [r3, #-1000]
 	str	r2, [r3, #-1644]
-	ldr	r2, .L1678+12
+	ldr	r2, .L1715+16
 	b	FtlVendorPartWrite
-.L1679:
+.L1716:
 	.align	2
-.L1678:
+.L1715:
 	.word	.LANCHOR2
 	.word	1179929683
 	.word	1342177352
+	.word	.LANCHOR0
 	.word	.LANCHOR2-1708
 	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -14621,41 +15060,41 @@ FtlEctTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1687
-	ldr	r1, .L1687+4
+	ldr	r3, .L1724
+	ldr	r1, .L1724+4
 	ldr	r3, [r3, #3840]
 	cmp	r3, #0
 	moveq	r2, #32
-	beq	.L1681
+	beq	.L1718
 	ldr	r2, [r1, #-1780]
 	cmp	r2, #29
 	movls	r2, #4
 	movhi	r2, #32
-.L1681:
+.L1718:
 	mov	r3, #292
 	ldrh	r1, [r1, r3]
 	cmp	r1, #31
 	addls	r1, r1, #1
-	ldrls	r2, .L1687+4
+	ldrls	r2, .L1724+4
 	strlsh	r1, [r2, r3]	@ movhi
 	movls	r2, #1
 	cmp	r0, #0
-	ldr	r3, .L1687+4
-	bne	.L1683
+	ldr	r3, .L1724+4
+	bne	.L1720
 	ldr	r1, [r3, #-920]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
 	cmp	r1, r2
-	bcc	.L1684
-.L1683:
+	bcc	.L1721
+.L1720:
 	ldr	r2, [r3, #-920]
 	mov	r0, #64
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	ldr	r1, .L1687+8
+	ldr	r1, .L1724+8
 	str	r1, [r2, #0]
-	ldr	r1, .L1687+12
+	ldr	r1, .L1724+12
 	ldr	r2, [r3, #-920]
 	ldrh	r1, [r3, r1]
 	mov	r3, r1, asl #9
@@ -14667,12 +15106,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1684:
+.L1721:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L1688:
+.L1725:
 	.align	2
-.L1687:
+.L1724:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	1112818501
@@ -14680,3088 +15119,2622 @@ FtlEctTblFlush:
 	.fnend
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.align	2
-	.type	ftl_load_l2p_region, %function
-ftl_load_l2p_region:
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r4, .L1693
-	mov	r7, #12
-	ldr	r3, [r4, #-1032]
-	ldr	r6, [r3, r0, asl #2]
-	cmp	r6, #0
-	bne	.L1690
-	mul	r7, r7, r1
-	ldr	r3, [r4, #-1852]
-	ldr	r2, .L1693+4
-	mov	r1, #255
-	add	r3, r3, r7
-	ldr	r0, [r3, #8]
-	movw	r3, #3926
-	ldrh	r2, [r2, r3]
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.pad #28
+	sub	sp, sp, #28
+	ldr	r3, [r0, #16]
+	mov	r4, r0
+	ldr	r7, [r0, #24]
+	mov	r1, #0
+	ldrh	r8, [r0, #6]
+	mov	fp, #0
+	str	r3, [sp, #16]
+	ldrh	r3, [r0, #8]
+	mov	sl, r7
+	ldr	r9, [r0, #12]
+	mov	r2, r8, asl #2
+	mov	r0, r7
+	str	r3, [sp, #8]
 	bl	ftl_memset
-	ldr	r3, [r4, #-1852]
-	strh	r5, [r3, r7]	@ movhi
-	ldr	r3, [r4, #-1852]
-	add	r7, r3, r7
-	str	r6, [r7, #4]
-	b	.L1691
-.L1690:
-	mul	r7, r7, r1
-	ldr	r3, [r4, #-1852]
+	ldr	r3, .L1747
+	str	fp, [r4, #32]
+	str	fp, [r4, #28]
+	ldr	r2, [r3, #-960]
+	ldr	r5, [r3, #-936]
+	str	r2, [r3, #188]
+	str	r5, [r3, #192]
+	mvn	r3, #0
+	strh	r3, [r4, #0]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	mov	r3, #1
+	str	r3, [r4, #36]
+	ldr	r3, [sp, #8]
+	sub	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r3, .L1747+4
+	b	.L1727
+.L1741:
+	ldr	r0, [sp, #12]
+	cmp	r2, r0
+	mov	r2, r2, asl #1
+	bne	.L1728
+	ldrh	r0, [r9, r2]
+	mov	r1, #1
+	add	ip, r9, r2
+	str	ip, [sp, #4]
+	bl	FtlGetLastWrittenPage
+	ldr	r1, [sp, #12]
+	ldr	r2, [sp, #16]
+	mov	r7, sl
+	strh	fp, [r4, #0]	@ movhi
+	mov	sl, #0
+	ldr	ip, [sp, #4]
+	ldr	r6, .L1747
+	mov	fp, ip
+	uxth	r0, r0
+	add	r3, r0, #1
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, [r2, r1, asl #2]
+	sxth	r9, r0
+	add	r9, r9, #1
+	str	r3, [r4, #28]
+	b	.L1729
+.L1732:
+	ldrh	r2, [fp, #0]
 	mov	r1, #1
-	add	r0, r4, #180
+	ldr	r0, .L1747+8
+	orr	r3, r3, r2, asl #10
 	mov	r2, r1
-	str	r6, [r4, #184]
-	add	r3, r3, r7
-	ldr	r3, [r3, #8]
-	str	r3, [r4, #188]
-	ldr	r3, [r4, #-936]
-	str	r3, [r4, #192]
+	str	r3, [r6, #184]
 	bl	FlashReadPages
-	ldr	r3, [r4, #180]
-	cmp	r3, #256
-	bne	.L1692
-	mov	r2, r6
-	mov	r1, r5
-	ldr	r0, .L1693+8
-	mov	r6, r6, lsr #10
-	bl	printk
-	ldr	r3, .L1693+12
-	sub	r0, r4, #1088
-	mov	r1, r5
-	strh	r6, [r4, r3]	@ movhi
-	ldr	r3, [r4, #-1852]
-	add	r3, r3, r7
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.L1692:
-	ldr	r3, .L1693
-	mov	r1, #0
-	ldr	r3, [r3, #-1852]
-	add	r2, r3, r7
-	str	r1, [r2, #4]
-	strh	r5, [r3, r7]	@ movhi
-.L1691:
-	mov	r0, #0
-	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L1694:
-	.align	2
-.L1693:
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LC123
-	.word	-1048
-	.fnend
-	.size	ftl_load_l2p_region, .-ftl_load_l2p_region
-	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
-	.save {r3, r4, r5, r6, r7, r8, sl, lr}
-	mov	r8, r2
-	ldr	r3, .L1704
-	movw	r2, #3924
-	mov	r4, r1
-	ldrh	r7, [r3, r2]
-	mvn	r2, #0
-	add	r7, r7, #7
-	mov	r6, r0, lsr r7
-	bic	r7, r0, r2, asl r7
-	movw	r2, #3954
-	ldrh	r2, [r3, r2]
+	ldr	r3, [r6, #180]
+	cmn	r3, #1
+	ldreqh	r3, [fp, #0]
+	streqh	r3, [r4, #40]	@ movhi
+	beq	.L1731
+	ldrh	r3, [r5, #8]
+	cmp	r3, r8
+	bcs	.L1731
+	ldrh	r2, [r4, #4]
+	ldrh	r1, [r5, #0]
+	cmp	r1, r2
+	ldreq	r2, [r6, #184]
+	streq	r2, [r7, r3, asl #2]
+.L1731:
+	add	sl, sl, #1
+	uxth	sl, sl
+.L1729:
+	sxth	r3, sl
+	cmp	r3, r9
+	blt	.L1732
+	b	.L1733
+.L1728:
+	ldr	r6, .L1747
+	movw	r7, #3918
+	add	r0, r9, r2
+	str	r0, [sp, #20]
+	add	r0, r6, #180
+	ldr	r1, [r6, #-960]
+	str	r1, [r6, #188]
+	ldrh	r1, [r9, r2]
+	ldrh	r2, [r3, r7]
+	sub	r2, r2, #1
+	orr	r2, r2, r1, asl #10
+	mov	r1, #1
+	str	r2, [r6, #184]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r6, #180]
+	ldr	r3, [sp, #4]
+	cmn	r2, #1
+	beq	.L1744
+	ldrh	r1, [r5, #0]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L1744
+	ldrh	r1, [r5, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	bne	.L1744
+	b	.L1745
+.L1737:
+	ldr	r0, [r6, #-960]
+	mov	ip, r1, asl #3
+	add	r2, r2, #1
+	ldr	r1, [r0, r1, asl #3]
+	uxth	r2, r2
+	uxth	r1, r1
+	cmp	r1, r8
+	addcc	r0, r0, ip
+	ldrcc	r0, [r0, #4]
+	strcc	r0, [sl, r1, asl #2]
+	b	.L1735
+.L1745:
+	mov	r2, #0
+.L1735:
+	ldrh	r0, [r3, r7]
+	sxth	r1, r2
+	sub	r0, r0, #1
+	cmp	r1, r0
+	blt	.L1737
+	b	.L1738
+.L1740:
+	ldr	r0, [sp, #20]
+	ldrh	r1, [r0, #0]
+	ldr	r0, .L1747+8
+	orr	r2, r2, r1, asl #10
+	mov	r1, #1
+	str	r2, [r7, #184]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r7, #180]
+	ldr	r3, [sp, #4]
+	cmn	r2, #1
+	beq	.L1739
+	ldrh	r2, [r5, #8]
+	cmp	r2, r8
+	bcs	.L1739
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r5, #0]
+	cmp	r0, r1
+	ldreq	r1, [r7, #184]
+	streq	r1, [sl, r2, asl #2]
+.L1739:
+	add	r6, r6, #1
 	uxth	r6, r6
-	ldr	r3, .L1704+4
-	uxth	r7, r7
-	ldr	sl, [r3, #-1852]
-	mov	r3, #0
-	mov	r5, r3
-	b	.L1696
-.L1702:
-	add	r3, r3, #12
-	add	r1, sl, r3
-	ldrh	r1, [r1, #-12]
-	cmp	r1, r6
-	bne	.L1697
-.L1698:
-	cmp	r8, #0
-	ldr	r3, .L1704+4
-	mov	r2, #12
-	bne	.L1699
-	ldr	r3, [r3, #-1852]
-	mla	r2, r2, r5, r3
-	ldr	r3, [r2, #8]
-	ldr	r3, [r3, r7, asl #2]
-	str	r3, [r4, #0]
-	b	.L1700
-.L1699:
-	mul	r2, r2, r5
-	ldr	r1, [r3, #-1852]
-	ldr	r0, [r4, #0]
-	add	r1, r1, r2
-	ldr	r1, [r1, #8]
-	str	r0, [r1, r7, asl #2]
-	ldr	r1, [r3, #-1852]
-	add	r2, r1, r2
-	ldr	r1, [r2, #4]
-	orr	r1, r1, #-2147483648
-	str	r1, [r2, #4]
-	ldr	r2, .L1704+8
-	strh	r6, [r3, r2]	@ movhi
-.L1700:
-	ldr	r3, .L1704+4
-	mov	r2, #12
+	b	.L1746
+.L1744:
+	ldr	r7, .L1747
+	mov	r6, #0
+.L1746:
+	movw	r1, #3918
+	sxth	r2, r6
+	ldrh	r1, [r3, r1]
+	cmp	r2, r1
+	blt	.L1740
+.L1738:
+	add	fp, fp, #1
+	uxth	fp, fp
+.L1727:
+	ldr	r1, [sp, #8]
+	sxth	r2, fp
+	cmp	r2, r1
+	blt	.L1741
+.L1733:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r1, .L1747+4
+	movw	r3, #3918
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r1, r3]
+	cmp	r2, r3
+	bne	.L1742
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1742:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
 	mov	r0, #0
-	ldr	r3, [r3, #-1852]
-	mla	r5, r2, r5, r3
-	ldr	r3, [r5, #4]
-	cmn	r3, #1
-	addne	r3, r3, #1
-	strne	r3, [r5, #4]
-	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L1697:
-	add	r5, r5, #1
-	uxth	r5, r5
-.L1696:
-	cmp	r5, r2
-	bne	.L1702
-	bl	select_l2p_ram_region
-	mov	r3, #12
-	mul	r3, r3, r0
-	mov	r5, r0
-	add	r2, sl, r3
-	ldrh	r1, [sl, r3]
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1703
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L1703
-	bl	flush_l2p_region
-.L1703:
-	mov	r0, r6
-	mov	r1, r5
-	bl	ftl_load_l2p_region
-	b	.L1698
-.L1705:
+	add	sp, sp, #28
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1748:
 	.align	2
-.L1704:
-	.word	.LANCHOR0
+.L1747:
 	.word	.LANCHOR2
-	.word	-1848
+	.word	.LANCHOR0
+	.word	.LANCHOR2+180
 	.fnend
-	.size	log2phys, .-log2phys
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
-	.save {r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r7, r0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, .L1712
-	ldr	r1, [r3, #-2016]
-	mov	r5, r0, asl #1
-	ldrh	r2, [r1, r5]
-	cmp	r2, #0
-	addne	r2, r2, #1
-	strneh	r2, [r1, r5]	@ movhi
-	bne	.L1708
-	ldr	r4, [r3, #-2004]
-	cmp	r4, #0
-	beq	.L1708
-	ldr	r1, .L1712+4
-	mov	ip, #6
-	ldrh	lr, [r3, r1]
-	ldr	r3, [r3, #-2024]
-	ldr	r1, .L1712+8
-	rsb	r4, r3, r4
-	mov	r4, r4, asr #1
-	mul	r4, r1, r4
-	movw	r1, #65535
-	uxth	r4, r4
-	b	.L1709
-.L1711:
-	cmp	r4, r0
-	bne	.L1710
-	mov	r1, r4
-	ldr	r0, .L1712+12
-	bl	List_remove_node
-	ldr	r6, .L1712
-	ldr	r3, .L1712+4
-	mov	r0, r4
-	ldrh	r2, [r6, r3]
-	sub	r2, r2, #1
-	strh	r2, [r6, r3]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, [r6, #-2016]
-	ldrh	r2, [r3, r5]
-	add	r2, r2, #1
-	strh	r2, [r3, r5]	@ movhi
-	b	.L1708
-.L1710:
-	mul	r4, ip, r4
-	ldrh	r4, [r3, r4]
-	cmp	r4, r1
-	beq	.L1708
-	add	r2, r2, #1
-	uxth	r2, r2
-.L1709:
-	cmp	r2, lr
-	bne	.L1711
-.L1708:
-	mov	r0, r7
-	add	r1, sp, #4
-	mov	r2, #1
-	bl	log2phys
-	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
-.L1713:
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1750
+	bl	FtlMapTblRecovery
+	mov	r0, #0
+	ldmfd	sp!, {r3, pc}
+.L1751:
 	.align	2
-.L1712:
-	.word	.LANCHOR2
-	.word	-2000
-	.word	-1431655765
-	.word	.LANCHOR2-2004
+.L1750:
+	.word	.LANCHOR2-1088
 	.fnend
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
-	.type	FtlReadRefresh.part.15, %function
-FtlReadRefresh.part.15:
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 40
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-	.pad #40
-	sub	sp, sp, #40
-	ldr	r4, .L1722
-	ldr	r6, .L1722+4
-	ldr	r2, [r4, #-1624]
-	ldr	r3, [r6, #3976]
-	cmp	r2, r3
-	bcs	.L1715
-	mov	r5, #2048
-.L1718:
-	ldr	r0, [r4, #-1624]
-	ldr	r3, [r6, #3976]
-	cmp	r0, r3
-	bcs	.L1720
-	mov	r1, sp
-	mov	r2, #0
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ldr	r3, [r4, #-1624]
-	cmn	r0, #1
-	add	r3, r3, #1
-	str	r3, [r4, #-1624]
-	beq	.L1717
-	str	r0, [sp, #8]
-	add	r0, sp, #40
-	mov	r2, #0
-	mov	r1, #1
-	str	r2, [r0, #-36]!
-	str	r3, [sp, #20]
-	str	r2, [sp, #12]
-	str	r2, [sp, #16]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmp	r3, #256
-	bne	.L1720
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-	b	.L1720
-.L1717:
-	subs	r5, r5, #1
-	bne	.L1718
-	b	.L1716
-.L1715:
-	ldr	r3, [r4, #-1836]
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	mov	r2, #3936
+	ldr	r3, .L1753
+	ldr	r0, .L1753+4
+	ldrh	r1, [r3, r2]
+	movw	r2, #258
+	strh	r1, [r0, r2]	@ movhi
+	ldr	r2, .L1753+8
+	strh	r2, [r0, #252]	@ movhi
+	movw	r2, #3962
+	ldrh	r1, [r3, r2]
+	mov	r2, #256
+	strh	r1, [r0, r2]	@ movhi
+	movw	r2, #3938
+	ldrh	r2, [r3, r2]
+	ldr	r3, [r3, #3964]
+	strh	r2, [r0, #254]	@ movhi
+	mvn	r2, #0
+	str	r3, [r0, #260]
+	ldr	r3, [r0, #-908]
+	str	r3, [r0, #264]
+	ldr	r3, [r0, #-912]
+	str	r3, [r0, #268]
+	ldr	r3, [r0, #-904]
+	str	r3, [r0, #272]
+	mov	r3, #288
+	strh	r2, [r0, r3]	@ movhi
+	add	r0, r0, #248
+	bl	FtlMapTblRecovery
 	mov	r0, #0
-	str	r0, [r4, #-1628]
-	str	r0, [r4, #-1624]
-	str	r3, [r4, #-1632]
-	b	.L1716
-.L1720:
-	mvn	r0, #0
-.L1716:
-	add	sp, sp, #40
-	ldmfd	sp!, {r4, r5, r6, pc}
-.L1723:
+	ldmfd	sp!, {r3, pc}
+.L1754:
 	.align	2
-.L1722:
-	.word	.LANCHOR2
+.L1753:
 	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	-3962
 	.fnend
-	.size	FtlReadRefresh.part.15, .-FtlReadRefresh.part.15
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.align	2
-	.global	FtlReadRefresh
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
+	.global	FlashLoadFactorBbt
+	.type	FlashLoadFactorBbt, %function
+FlashLoadFactorBbt:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1731
-	ldr	r2, [r3, #-1628]
-	cmp	r2, #0
-	beq	.L1725
-	b	FtlReadRefresh.part.15
-.L1725:
-	ldr	r2, .L1731+4
-	ldr	r0, [r3, #-1784]
-	ldr	r1, [r2, #3840]
-	ldrb	r2, [r2, #928]	@ zero_extendqisi2
-	cmp	r2, #0
-	ldr	r2, [r3, #-1836]
-	addeq	r0, r1, r0, lsr #10
-	moveq	r1, #33554432
-	movne	r0, #4194304
-	moveq	r0, r1, asr r0
-	ldr	r1, [r3, #-1632]
-	add	r3, r2, #1048576
-	cmp	r1, r3
-	bhi	.L1727
-	add	r1, r0, r1
-	cmp	r1, r2
-	bcc	.L1727
-	ldr	r3, .L1731
-	ldrb	r3, [r3, #-2044]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1728
-.L1727:
-	ldr	r3, .L1731
-	mov	r1, #1
-	str	r2, [r3, #-1632]
-	str	r1, [r3, #-1628]
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	movw	r2, #3062
+	ldr	r9, .L1764
+	movw	r3, #3060
+	ldr	r4, .L1764+4
+	.pad #52
+	sub	sp, sp, #52
 	mov	r1, #0
-	str	r1, [r3, #-1624]
-.L1728:
-	mov	r0, #0
-	bx	lr
-.L1732:
+	mvn	r7, #0
+	ldrh	r3, [r9, r3]
+	add	r0, r4, #232
+	ldrh	r8, [r9, r2]
+	mov	r2, #16
+	mov	r6, #0
+	mul	r8, r8, r3
+	bl	ftl_memset
+	ldr	r3, [r4, #228]
+	str	r6, [sp, #20]
+	mov	r4, r6
+	str	r3, [sp, #24]
+	uxth	r8, r8
+	add	r3, r8, r7
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L1756
+.L1762:
+	ldr	r5, [sp, #4]
+	sub	r3, r8, #12
+	mul	fp, r8, r4
+	ldr	sl, .L1764+4
+	b	.L1757
+.L1760:
+	add	r2, fp, r5
+	mov	r1, #1
+	add	r0, sp, #12
+	str	r3, [sp, #0]
+	mov	r2, r2, asl #10
+	str	r2, [sp, #16]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #0]
+	cmn	r2, #1
+	beq	.L1758
+	ldr	r2, [sl, #228]
+	ldrh	r1, [r2, #0]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L1758
+	ldr	r0, .L1764+8
+	mov	r1, r4
+	mov	r2, r5
+	add	r6, r6, #1
+	bl	printk
+	ldr	r3, .L1764+4
+	uxth	r6, r6
+	add	r3, r3, r4, asl #1
+	strh	r5, [r3, #232]	@ movhi
+	b	.L1759
+.L1758:
+	sub	r5, r5, #1
+	uxth	r5, r5
+.L1757:
+	cmp	r5, r3
+	bgt	.L1760
+.L1759:
+	ldrb	r3, [r9, #3762]	@ zero_extendqisi2
+	add	r4, r4, #1
+	cmp	r3, r6
+	uxtb	r4, r4
+	moveq	r7, #0
+.L1756:
+	ldrb	r3, [r9, #3762]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L1762
+	mov	r0, r7
+	add	sp, sp, #52
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1765:
 	.align	2
-.L1731:
-	.word	.LANCHOR2
+.L1764:
 	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC130
 	.fnend
-	.size	FtlReadRefresh, .-FtlReadRefresh
+	.size	FlashLoadFactorBbt, .-FlashLoadFactorBbt
 	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
+	.global	dump_map_info
+	.type	dump_map_info, %function
+dump_map_info:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	mov	r3, #3856
+	ldr	r5, .L1779
 	.pad #36
 	sub	sp, sp, #36
-	ldr	r3, [r0, #16]
-	mov	r4, r0
-	ldrh	r8, [r0, #6]
-	mov	r1, #0
-	ldr	fp, [r0, #24]
-	mov	r9, #0
-	str	r3, [sp, #24]
-	ldrh	r3, [r0, #8]
-	mov	r2, r8, asl #2
-	ldr	r7, [r0, #12]
-	mov	r0, fp
-	str	r3, [sp, #16]
-	bl	ftl_memset
-	ldr	r3, .L1768
-	mov	sl, r7
-	str	r9, [r4, #32]
-	str	r9, [r4, #28]
-	ldr	r2, [r3, #-960]
-	ldr	r5, [r3, #-936]
-	str	r2, [r3, #188]
-	str	r5, [r3, #192]
-	mvn	r3, #0
-	strh	r3, [r4, #0]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	mov	r3, #1
-	str	r3, [r4, #36]
-	ldr	r3, [sp, #16]
-	sub	r3, r3, #1
-	str	r3, [sp, #20]
-	ldr	r3, .L1768+4
-	b	.L1734
-.L1748:
-	ldr	r0, [sp, #20]
-	cmp	r2, r0
-	mov	r2, r2, asl #1
-	bne	.L1735
-	ldrh	r0, [sl, r2]
-	mov	r1, #1
-	add	r3, sl, r2
-	str	r3, [sp, #16]
-	bl	FtlGetLastWrittenPage
-	ldr	r1, [sp, #20]
-	ldr	r2, [sp, #24]
-	mov	r7, sl
-	strh	r9, [r4, #0]	@ movhi
-	mov	sl, #0
-	ldr	r6, .L1768
-	uxth	r0, r0
-	add	r3, r0, #1
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, [r2, r1, asl #2]
-	sxth	r9, r0
-	add	r9, r9, #1
-	str	r3, [r4, #28]
-	b	.L1736
-.L1739:
-	ldr	r0, [sp, #16]
-	mov	r1, #1
-	ldrh	r2, [r0, #0]
-	ldr	r0, .L1768+8
-	orr	r3, r3, r2, asl #10
-	mov	r2, r1
-	str	r3, [r6, #184]
-	bl	FlashReadPages
-	ldr	r3, [r6, #180]
-	cmn	r3, #1
-	ldreq	r1, [sp, #16]
-	ldreqh	r3, [r1, #0]
-	streqh	r3, [r4, #40]	@ movhi
-	beq	.L1738
-	ldrh	r3, [r5, #8]
-	cmp	r3, r8
-	bcs	.L1738
-	ldrh	r2, [r4, #4]
-	ldrh	r1, [r5, #0]
-	cmp	r1, r2
-	ldreq	r2, [r6, #184]
-	streq	r2, [fp, r3, asl #2]
-.L1738:
-	add	sl, sl, #1
-	uxth	sl, sl
-.L1736:
-	sxth	r3, sl
-	cmp	r3, r9
-	blt	.L1739
-	b	.L1740
-.L1735:
-	ldr	r6, .L1768
-	movw	r7, #3918
-	add	r0, sl, r2
+	ldrh	r6, [r5, r3]
+	b	.L1767
+.L1769:
+	add	r3, r5, r7
+	mov	r1, r6
+	ldrb	r0, [r3, #3874]	@ zero_extendqisi2
+	bl	V2P_block
 	str	r0, [sp, #28]
-	add	r0, r6, #180
-	ldr	r1, [r6, #-960]
-	str	r1, [r6, #188]
-	ldrh	r1, [sl, r2]
-	ldrh	r2, [r3, r7]
-	sub	r2, r2, #1
-	orr	r2, r2, r1, asl #10
-	mov	r1, #1
-	str	r2, [r6, #184]
-	mov	r2, r1
-	str	r3, [sp, #12]
-	bl	FlashReadPages
-	ldr	r2, [r6, #180]
-	ldr	r3, [sp, #12]
-	cmn	r2, #1
-	beq	.L1761
-	ldrh	r1, [r5, #0]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	bne	.L1761
-	ldrh	r1, [r5, #8]
-	movw	r2, #64245
-	cmp	r1, r2
-	bne	.L1761
-	b	.L1762
-.L1744:
-	ldr	r0, [r6, #-960]
-	mov	ip, r1, asl #3
-	add	r2, r2, #1
-	ldr	r1, [r0, r1, asl #3]
-	uxth	r2, r2
-	uxth	r1, r1
-	cmp	r1, r8
-	addcc	r0, r0, ip
-	ldrcc	r0, [r0, #4]
-	strcc	r0, [fp, r1, asl #2]
-	b	.L1742
-.L1762:
-	mov	r2, #0
-.L1742:
-	ldrh	r0, [r3, r7]
-	sxth	r1, r2
-	sub	r0, r0, #1
-	cmp	r1, r0
-	blt	.L1744
-	b	.L1745
-.L1747:
-	ldr	r0, [sp, #28]
-	ldrh	r1, [r0, #0]
-	ldr	r0, .L1768+8
-	orr	r2, r2, r1, asl #10
-	mov	r1, #1
-	str	r2, [r7, #184]
-	mov	r2, r1
-	str	r3, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #28]
+	cmp	r0, #0
+	bne	.L1768
+	ldr	r2, [r8, #-972]
+	mov	r3, r3, asl #10
+	mla	r2, r9, r4, r2
+	str	r3, [r2, #4]
+	ldr	r3, [r8, #-1172]
+	str	r3, [r2, #8]
+	ldrh	r3, [r5, sl]
+	mul	r3, r3, r4
+	add	r4, r4, #1
+	uxth	r4, r4
+	add	r1, r3, #3
+	cmp	r3, #0
+	movlt	r3, r1
+	ldr	r1, [r8, #-1168]
+	bic	r3, r3, #3
+	add	r3, r1, r3
+	str	r3, [r2, #12]
+.L1768:
+	add	r7, r7, #1
+	uxth	r7, r7
+	b	.L1772
+.L1777:
+	ldr	r8, .L1779+4
+	mov	r4, #0
+	mov	r7, r4
+	movw	fp, #3848
+	mov	r9, #36
+	movw	sl, #3928
+.L1772:
+	ldrh	r3, [r5, fp]
+	cmp	r3, r7
+	bhi	.L1769
+	cmp	r4, #0
+	beq	.L1770
+	ldr	sl, .L1779+4
+	mov	r1, r4
+	mov	r2, #1
+	mov	r7, #0
+	mov	r8, r7
+	ldr	r0, [sl, #-972]
 	bl	FlashReadPages
-	ldr	r2, [r7, #180]
-	ldr	r3, [sp, #12]
-	cmn	r2, #1
-	beq	.L1746
-	ldrh	r2, [r5, #8]
-	cmp	r2, r8
-	bcs	.L1746
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r5, #0]
-	cmp	r0, r1
-	ldreq	r1, [r7, #184]
-	streq	r1, [fp, r2, asl #2]
-.L1746:
+.L1771:
+	ldr	r1, [sl, #-972]
+	add	r8, r8, #1
+	add	r1, r1, r7
+	uxth	r8, r8
+	add	r7, r7, #36
+	ldr	r3, [r1, #12]
+	ldr	r2, [r1, #4]
+	ldr	r1, [r1, #8]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #0]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #4]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #8]
+	ldr	r0, [r1, #0]
+	str	r0, [sp, #12]
+	ldr	r1, [r1, #4]
+	ldr	r0, .L1779+8
+	str	r1, [sp, #16]
+	ubfx	r1, r2, #10, #16
+	ldr	r3, [r3, #0]
+	bl	printk
+	cmp	r8, r4
+	bne	.L1771
+.L1770:
 	add	r6, r6, #1
 	uxth	r6, r6
-	b	.L1764
-.L1761:
-	ldr	r7, .L1768
-	mov	r6, #0
-.L1764:
-	movw	r1, #3918
-	sxth	r2, r6
-	ldrh	r1, [r3, r1]
-	cmp	r2, r1
-	blt	.L1747
-.L1745:
-	add	r9, r9, #1
-	uxth	r9, r9
-.L1734:
-	ldr	r1, [sp, #16]
-	sxth	r2, r9
-	cmp	r2, r1
-	blt	.L1748
-	mov	r7, sl
-.L1740:
-	ldr	r3, .L1768+12
-	cmp	r4, r3
-	bne	.L1749
-	ldr	r9, .L1768+4
-	movw	r3, #3960
-	ldrh	r3, [r9, r3]
-	cmp	r3, #0
-	addne	r5, r4, #1088
-	movne	r8, #0
-	movne	sl, r4
-	bne	.L1750
-	b	.L1749
-.L1757:
-	ldr	r3, [r5, #-900]
-	mov	r4, r8, asl #2
-	ldr	r2, [r3, r8, asl #2]
-	sub	r1, r2, #1
-	cmn	r1, #3
-	bhi	.L1751
-	ldr	r1, [r5, #-1032]
-	ldr	r1, [r1, r8, asl #2]
-	cmp	r2, r1
-	beq	.L1751
-	ldr	r2, [r5, #-960]
-	mov	r1, #1
-	ldr	r6, [r5, #-936]
-	ldr	r0, .L1768+8
-	str	r2, [r5, #188]
-	mov	r2, r1
-	str	r6, [r5, #192]
-	ldr	r3, [r3, r4]
-	str	r3, [r5, #184]
-	bl	FlashReadPages
-	ldr	r3, [r5, #180]
-	cmn	r3, #1
-	beq	.L1751
-	ldr	r0, .L1768+16
-	ldrh	r2, [r6, #0]
-	ldrh	r3, [r5, r0]
-	cmp	r2, r3
-	bne	.L1751
-	ldr	r3, [r5, #-1032]
-	ldr	fp, [r6, #4]
-	ldr	r2, [r3, r4]
-	str	r2, [r5, #184]
-	ldr	r3, [r3, r4]
-	cmp	r3, #0
-	streq	r3, [r6, #4]
-	beq	.L1753
+.L1767:
+	movw	r2, #3858
+	ldrh	r3, [r5, r2]
+	cmp	r3, r6
+	bhi	.L1777
+	mov	r5, #0
+	ldr	r4, .L1779+4
+	ldr	sl, .L1779+12
+	b	.L1773
+.L1774:
+	ldr	r2, [r4, #-1040]
 	mov	r1, #1
-	ldr	r0, .L1768+8
+	ldr	r0, .L1779+16
+	add	r6, r6, #1
+	ldrh	r2, [r2, r7]
+	uxth	r6, r6
+	orr	r3, r3, r2, asl #10
 	mov	r2, r1
+	str	r3, [r4, #184]
 	bl	FlashReadPages
-.L1753:
-	ldr	r1, [r6, #4]
-	cmp	fp, r1
-	bls	.L1751
-	ldr	r2, [r5, #-900]
-	ldr	r3, [r5, #-1032]
-	ldr	r0, .L1768+20
-	str	r1, [sp, #0]
-	ldr	r1, [r2, r4]
-	ldr	r2, [r3, r4]
-	mov	r3, fp
+	ldr	r3, [r4, #192]
+	ldr	r1, [r4, #-1040]
+	ldr	r2, [r4, #188]
+	ldr	r0, [r3, #0]
+	ldrh	r1, [r1, r7]
+	str	r0, [sp, #0]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #4]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #8]
+	ldr	r3, [r3, #12]
+	ldr	r0, .L1779+20
+	str	r3, [sp, #12]
+	ldr	r3, [r2, #0]
+	str	r3, [sp, #16]
+	ldr	r3, [r2, #4]
+	str	r3, [sp, #20]
+	ldr	r2, [r4, #180]
+	ldr	r3, [r4, #184]
 	bl	printk
-	ldr	r3, [r5, #-900]
-	ldr	r2, [r3, r4]
-	ldr	r3, [r5, #-1032]
-	str	r2, [r3, r4]
-	mov	r2, #0
-	ldr	r3, [r5, #-900]
-	ldr	r0, [r3, r4]
-	ldr	r3, .L1768+24
-	ubfx	r0, r0, #10, #16
-	ldrh	r3, [r5, r3]
-	b	.L1754
-.L1755:
-	mov	r1, r1, asl #1
-	ldrh	r1, [r7, r1]
-	cmp	r1, r0
-	beq	.L1751
-	add	r2, r2, #1
-	uxth	r2, r2
-.L1754:
-	sxth	r1, r2
-	cmp	r1, r3
-	blt	.L1755
-	b	.L1766
-.L1767:
-	mov	r3, r3, asl #1
-	strh	r0, [r7, r3]	@ movhi
-	ldr	r3, .L1768+24
-	ldrh	r2, [r5, r3]
-	add	r2, r2, #1
-	strh	r2, [r5, r3]	@ movhi
-	bl	remove_from_free_sys_Queue
-.L1751:
-	add	r8, r8, #1
-.L1750:
-	mov	r3, #3952
-	ldrh	r3, [r9, r3]
-	cmp	r8, r3
-	bcc	.L1757
-	mov	r4, sl
-.L1749:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r1, .L1768+4
-	movw	r3, #3918
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r1, r3]
-	cmp	r2, r3
-	bne	.L1758
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1758:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, #0
-	add	sp, sp, #36
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1766:
-	ldr	r2, [r9, #3944]
+.L1776:
+	movw	r2, #3918
+	sxth	r3, r6
+	ldrh	r2, [r8, r2]
 	cmp	r3, r2
-	bcs	.L1751
-	b	.L1767
-.L1769:
+	blt	.L1774
+	add	r5, r5, #1
+	uxth	r5, r5
+.L1773:
+	ldrh	r3, [r4, sl]
+	sxth	r7, r5
+	ldr	r6, .L1779+4
+	cmp	r7, r3
+	movlt	r7, r7, asl #1
+	movlt	r6, #0
+	ldrlt	r8, .L1779
+	blt	.L1776
+.L1775:
+	ldr	r4, .L1779
+	mov	r5, #3952
+	ldr	r1, [r6, #-1040]
+	mov	r2, #2
+	ldr	r0, .L1779+24
+	ldr	r3, [r4, #3944]
+	bl	rknand_print_hex
+	ldr	r1, [r6, #-1032]
+	ldrh	r3, [r4, r5]
+	mov	r2, #4
+	ldr	r0, .L1779+28
+	bl	rknand_print_hex
+	ldr	r0, .L1779+32
+	ldr	r1, [r6, #-900]
+	mov	r2, #4
+	ldrh	r3, [r4, r5]
+	add	sp, sp, #36
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	b	rknand_print_hex
+.L1780:
 	.align	2
-.L1768:
-	.word	.LANCHOR2
+.L1779:
 	.word	.LANCHOR0
-	.word	.LANCHOR2+180
-	.word	.LANCHOR2-1088
-	.word	-1084
-	.word	.LC124
+	.word	.LANCHOR2
+	.word	.LC131
 	.word	-1044
+	.word	.LANCHOR2+180
+	.word	.LC107
+	.word	.LC132
+	.word	.LC133
+	.word	.LC134
 	.fnend
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.size	dump_map_info, .-dump_map_info
 	.align	2
-	.global	FtlLoadMapInfo
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
+	.global	FtlDumpSysBlock
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L1771
-	bl	FtlMapTblRecovery
-	mov	r0, #0
-	ldmfd	sp!, {r3, pc}
-.L1772:
+	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L1785
+	.pad #24
+	sub	sp, sp, #24
+	mov	r7, r0, asl #10
+	mov	r5, #0
+	ldr	r8, .L1785+4
+	ldr	r3, [r4, #-960]
+	str	r3, [r4, #188]
+	ldr	r3, [r4, #-936]
+	str	r3, [r4, #192]
+	b	.L1782
+.L1784:
+	mov	r1, #1
+	ldr	r0, .L1785+8
+	mov	r2, r1
+	orr	r3, r3, r7
+	str	r3, [r4, #184]
+	bl	FlashReadPages
+	ldr	r3, [r4, #192]
+	mov	r1, r6
+	ldr	r0, .L1785+12
+	ldr	r2, [r3, #0]
+	str	r2, [sp, #0]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r3, [r3, #12]
+	ldr	r2, [r4, #180]
+	str	r3, [sp, #12]
+	ldr	r3, [r4, #188]
+	ldr	r3, [r3, #0]
+	str	r3, [sp, #16]
+	ldr	r3, [r4, #184]
+	bl	printk
+	ldr	r3, [r4, #192]
+	ldr	r3, [r3, #0]
+	cmn	r3, #1
+	beq	.L1783
+	ldr	r0, .L1785+16
+	mov	r2, #4
+	ldr	r1, [r4, #-960]
+	mov	r3, #768
+	bl	rknand_print_hex
+.L1783:
+	add	r5, r5, #1
+	uxth	r5, r5
+.L1782:
+	movw	r2, #3918
+	sxth	r3, r5
+	ldrh	r2, [r8, r2]
+	cmp	r3, r2
+	blt	.L1784
+	add	sp, sp, #24
+	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
+.L1786:
 	.align	2
-.L1771:
-	.word	.LANCHOR2-1088
+.L1785:
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LANCHOR2+180
+	.word	.LC135
+	.word	.LC136
 	.fnend
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.align	2
-	.global	FtlLoadVonderInfo
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	mov	r2, #3936
-	ldr	r3, .L1774
-	ldr	r0, .L1774+4
-	ldrh	r1, [r3, r2]
-	movw	r2, #258
-	strh	r1, [r0, r2]	@ movhi
-	ldr	r2, .L1774+8
-	strh	r2, [r0, #252]	@ movhi
-	movw	r2, #3962
-	ldrh	r1, [r3, r2]
-	mov	r2, #256
-	strh	r1, [r0, r2]	@ movhi
-	movw	r2, #3938
+	ldr	r3, .L1797
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, lr}
+	mov	r6, r1
+	mov	r9, r2
+	movw	r1, #3062
+	movw	r2, #3060
+	ldrh	r8, [r3, r1]
 	ldrh	r2, [r3, r2]
-	ldr	r3, [r3, #3964]
-	strh	r2, [r0, #254]	@ movhi
+	.pad #40
+	sub	sp, sp, #40
+	ldr	r7, .L1797+4
+	mov	r4, r0
+	mul	r8, r8, r2
+	ldr	r3, [r7, #148]
+	str	r3, [sp, #12]
+	ldr	r3, [r7, #228]
+	uxth	r8, r8
+	sub	r5, r8, #1
+	mul	sl, r8, r6
+	str	r3, [sp, #16]
+	uxth	r5, r5
+	sub	r8, r8, #16
+	b	.L1788
+.L1794:
+	mov	r1, #1
+	add	r3, r5, sl
+	add	r0, sp, #4
+	mov	r2, r1
+	mov	r3, r3, asl #10
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	cmn	r3, #1
+	beq	.L1789
+	ldr	r3, [r7, #228]
+	ldrh	r2, [r3, #0]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L1789
+	cmp	r4, #0
+	moveq	r0, r4
+	beq	.L1790
+	cmp	r6, #0
+	ldreq	r3, .L1797+4
+	moveq	r0, #1
+	beq	.L1791
+	b	.L1792
+.L1793:
+	ldr	r2, [r3, #148]
+	ubfx	r1, r6, #5, #16
+	and	lr, r6, #31
+	add	r6, r6, #1
+	ldr	ip, [r2, r1, asl #2]
+	uxth	r6, r6
+	orr	ip, ip, r0, asl lr
+	str	ip, [r2, r1, asl #2]
+.L1791:
+	ldr	r2, [r3, #156]
+	cmp	r6, r2
+	bcc	.L1793
+.L1792:
+	ldr	r3, .L1797+4
+	mov	r2, r9
+	mov	r0, r4
+	ldr	r1, [r3, #148]
+	bl	memcpy
+	mov	r2, #4
+	ldr	r0, .L1797+8
+	mov	r1, r4
+	mov	r3, r2
+	bl	rknand_print_hex
+	mov	r0, #0
+	b	.L1790
+.L1789:
+	sub	r5, r5, #1
+	uxth	r5, r5
+.L1788:
+	cmp	r5, r8
+	bgt	.L1794
+	mvn	r0, #0
+.L1790:
+	add	sp, sp, #40
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+.L1798:
+	.align	2
+.L1797:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC137
+	.fnend
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1806
+	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r3, [r3, #3624]
+	ldr	r6, .L1806+4
+	ldrb	r2, [r3, #13]	@ zero_extendqisi2
+	ldrh	r4, [r3, #14]
+	ldr	r0, [r6, #136]
+	mul	r4, r4, r2
+	uxth	r4, r4
+	add	r2, r4, #7
+	mov	r2, r2, lsr #3
+	bl	FlashReadFacBbtData
+	cmn	r0, #1
+	beq	.L1805
+	mov	r2, #0
+	mov	r0, r4, lsr #4
+	mov	r3, r2
+	sub	r4, r4, #1
+	mov	r1, #1
+	b	.L1801
+.L1803:
+	ldr	ip, [r6, #136]
+	mov	r8, r2, lsr #5
+	and	r7, r2, #31
+	ldr	ip, [ip, r8, asl #2]
+	ands	ip, ip, r1, asl r7
+	movne	ip, r3, asl #1
+	addne	r3, r3, #1
+	uxthne	r3, r3
+	strneh	r2, [r5, ip]	@ movhi
+	cmp	r3, r0
+	bcs	.L1805
+	add	r2, r2, #1
+	uxth	r2, r2
+.L1801:
+	cmp	r2, r4
+	blt	.L1803
+	b	.L1800
+.L1805:
+	mov	r3, #0
+.L1800:
+	mov	r3, r3, asl #1
 	mvn	r2, #0
-	str	r3, [r0, #260]
-	ldr	r3, [r0, #-908]
-	str	r3, [r0, #264]
-	ldr	r3, [r0, #-912]
-	str	r3, [r0, #268]
-	ldr	r3, [r0, #-904]
-	str	r3, [r0, #272]
-	mov	r3, #288
-	strh	r2, [r0, r3]	@ movhi
-	add	r0, r0, #248
-	bl	FtlMapTblRecovery
 	mov	r0, #0
-	ldmfd	sp!, {r3, pc}
-.L1775:
+	strh	r2, [r5, r3]	@ movhi
+	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
+.L1807:
 	.align	2
-.L1774:
+.L1806:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	-3962
 	.fnend
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
-	.global	FtlRecoverySuperblock
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 56
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	ldr	r6, .L1826
+	ldr	r5, [r6, #4040]
+	cmp	r5, #0
+	bne	.L1809
+	ldr	r8, .L1826+4
+	bl	FtlBbtMemInit
+	ldr	r4, .L1826+8
+	bl	FtlLoadFactoryBbt
+	add	sl, r8, #12
+	b	.L1810
+.L1816:
+	ldrh	r3, [sl], #2
 	movw	r2, #65535
-	ldrh	r3, [r0, #0]
-	.pad #60
-	sub	sp, sp, #60
-	mov	r4, r0
+	ldr	r0, [r4, #-960]
+	movw	fp, #3912
+	ldr	r9, [r4, #-936]
 	cmp	r3, r2
-	beq	.L1777
-	ldrh	r3, [r0, #2]
-	ldr	r1, .L1866
-	ldrb	fp, [r0, #6]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	movw	r3, #3916
-	ldrh	r3, [r1, r3]
-	ldr	ip, [sp, #12]
-	str	fp, [sp, #24]
-	cmp	r3, ip
-	mov	r3, #0
-	streqh	r3, [r0, #4]	@ movhi
-	moveq	r2, r3	@ movhi
-	ldrneh	r0, [r0, #16]
-	bne	.L1779
-	b	.L1863
-.L1780:
-	add	r3, r3, #1
-	uxth	r3, r3
-	add	r1, r4, r3, asl #1
-	ldrh	r0, [r1, #16]
-.L1779:
-	cmp	r0, r2
-	beq	.L1780
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L1781
-	bl	FtlGetLastWrittenPage
-	cmn	r0, #1
-	mov	r7, r0
-	beq	.L1782
-	ldr	r3, .L1866
-	ldrb	r2, [r3, #928]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1856
-	add	r3, r3, r0, asl #1
-	movw	r2, #3076
-	ldrh	r8, [r3, r2]
-	b	.L1848
-.L1781:
+	str	r0, [r4, #188]
+	str	r9, [r4, #192]
+	beq	.L1811
+	ldrh	r7, [r6, fp]
+	mov	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1826+12
+	mla	r7, r7, r5, r3
+	mov	r3, r7, asl #10
+	str	r3, [r4, #184]
+	bl	FlashReadPages
+	ldrh	r2, [r6, fp]
+	ldr	r0, [r8, #28]
+	add	r2, r2, #7
+	ldr	r1, [r4, #188]
+	mov	r2, r2, lsr #3
+	bl	memcpy
+	b	.L1812
+.L1811:
+	mov	r1, r5
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #188]
+	ldr	r1, [r8, #28]
+	bl	FtlBbt2Bitmap
+	ldrh	fp, [r6, fp]
+.L1814:
+	sub	fp, fp, #1
+	uxth	fp, fp
+.L1825:
+	movw	r7, #3912
+	ldrh	r0, [r6, r7]
+	mla	r0, r0, r5, fp
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1814
 	mov	r1, #0
-	bl	FtlGetLastWrittenPage
-	cmn	r0, #1
-	mov	r7, r0
-	beq	.L1782
-.L1856:
-	mov	r8, r7
-.L1848:
-	ldr	r3, .L1866
-	movw	r2, #3848
-	mov	r5, #0
-	str	r4, [sp, #32]
-	movw	ip, #65535
-	ldrh	r9, [r3, r2]
-	ldr	r2, .L1866+4
-	ldr	sl, [r2, #-972]
-	ldr	r6, [r2, #-1168]
-	movw	r2, #3928
-	ldrh	lr, [r3, r2]
-	mov	r2, r4
-	mov	r3, r5
-	b	.L1784
-.L1782:
+	mov	r2, #16
+	strh	fp, [sl, #-2]	@ movhi
+	ldr	r0, [r4, #-936]
+	bl	ftl_memset
+	ldr	r3, .L1826+16
+	strh	r3, [r9, #0]	@ movhi
 	mov	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	mov	r2, r3	@ movhi
-.L1863:
-	strb	r2, [r4, #6]
-	b	.L1777
-.L1786:
-	ldrh	r0, [r2, #16]
-	cmp	r0, ip
-	beq	.L1785
-	mov	fp, #36
-	orr	r0, r8, r0, asl #10
-	mla	r1, fp, r5, sl
-	str	r0, [r1, #4]
-	mov	r0, #0
-	str	r0, [r1, #8]
-	mul	r0, lr, r5
+	str	r3, [r9, #4]
+	ldrh	r3, [sl, #-2]
+	ldrh	r7, [r6, r7]
+	strh	r3, [r9, #2]	@ movhi
+	ldrh	r3, [sl, #-2]
+	ldr	r1, [r8, #28]
+	ldr	r0, [r4, #188]
+	mla	r7, r7, r5, r3
+	mov	r3, r7, asl #10
+	str	r3, [r4, #184]
+	ldr	r3, .L1826+20
+	ldrh	r2, [r4, r3]
+	mov	r2, r2, asl #2
+	bl	memcpy
+	mov	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1826+12
+	bl	FlashEraseBlocks
+	mov	r1, #1
+	mov	r3, r1
+	ldr	r0, .L1826+12
+	mov	r2, r1
+	bl	FlashProgPages
+	ldr	r3, [r4, #180]
+	cmn	r3, #1
+	bne	.L1812
+	uxth	r0, r7
+	bl	FtlBbmMapBadBlock
+	b	.L1825
+.L1812:
+	uxth	r0, r7
 	add	r5, r5, #1
-	uxth	r5, r5
-	add	fp, r0, #3
+	bl	FtlBbmMapBadBlock
+	add	r8, r8, #4
+.L1810:
+	movw	r3, #3870
+	ldrh	r3, [r6, r3]
+	cmp	r5, r3
+	bcc	.L1816
+	mov	r4, #0
+	ldr	r7, .L1826
+	movw	r6, #3930
+	b	.L1817
+.L1818:
+	mov	r0, r4
+	add	r4, r4, #1
+	bl	FtlBbmMapBadBlock
+	uxth	r4, r4
+.L1817:
+	ldrh	r3, [r7, r6]
+	ldr	r5, .L1826
+	cmp	r3, r4
+	bhi	.L1818
+	movw	r7, #3992
+	movw	r6, #3980
+	ldrh	r4, [r5, r7]
+	sub	r4, r4, #1
+	uxth	r4, r4
+	b	.L1819
+.L1824:
+	mov	r0, r4
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1820
+	mov	r0, r4
+	bl	FlashTestBlk
 	cmp	r0, #0
-	movlt	r0, fp
-	bic	r0, r0, #3
-	add	r0, r6, r0
-	str	r0, [r1, #12]
-.L1785:
+	beq	.L1821
+	mov	r0, r4
+	bl	FtlBbmMapBadBlock
+	b	.L1820
+.L1821:
+	ldrh	r2, [r5, r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	streqh	r4, [r5, r6]	@ movhi
+.L1822:
+	ldrne	r2, .L1826
+	movne	r3, #3984
+	strneh	r4, [r2, r3]	@ movhi
+	bne	.L1823
+.L1820:
+	sub	r4, r4, #1
+	uxth	r4, r4
+.L1819:
+	ldrh	r3, [r5, r7]
+	sub	r3, r3, #48
+	cmp	r4, r3
+	bgt	.L1824
+.L1823:
+	ldr	r4, .L1826
+	movw	r6, #3980
+	mov	r5, #3984
+	mov	r7, #0
+	movw	r8, #3982
+	mov	r2, #2
+	ldr	r0, [r4, #4044]
+	mov	r1, #1
+	ldrh	r3, [r4, r6]
+	str	r7, [r4, #3988]
+	strh	r7, [r4, r8]	@ movhi
+	mov	r3, r3, asl #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, r5]
+	mov	r3, r3, asl #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4, r6]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, r5]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #3988]
+	ldrh	r2, [r4, r5]
 	add	r3, r3, #1
-	add	r2, r2, #2
-	uxth	r3, r3
-.L1784:
-	cmp	r3, r9
-	bne	.L1786
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	movne	r3, #0
-	bne	.L1857
-	ldr	r3, .L1866
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	adds	r3, r3, #0
-	movne	r3, #1
-.L1857:
-	ldr	r6, .L1866+4
-	mov	r1, r5
-	str	r3, [sp, #20]
-	mov	sl, #0
-	ldr	r2, [sp, #20]
-	ldr	r0, [r6, #-972]
+	str	r3, [r4, #3988]
+	ldrh	r3, [r4, r6]
+	strh	r7, [r4, r8]	@ movhi
+	strh	r2, [r4, r6]	@ movhi
+	strh	r3, [r4, r5]	@ movhi
+	bl	FtlBbmTblFlush
+.L1809:
+	mov	r0, #0
+	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1827:
+	.align	2
+.L1826:
+	.word	.LANCHOR0
+	.word	.LANCHOR0+3980
+	.word	.LANCHOR2
+	.word	.LANCHOR2+180
+	.word	-3872
+	.word	-1028
+	.fnend
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.align	2
+	.type	ftl_load_l2p_region, %function
+ftl_load_l2p_region:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r6, .L1833
+	mov	r5, #12
+	ldr	r3, [r6, #-1032]
+	ldr	r7, [r3, r0, asl #2]
+	cmp	r7, #0
+	bne	.L1829
+	mul	r5, r5, r1
+	ldr	r3, [r6, #-1852]
+	ldr	r2, .L1833+4
+	mov	r1, #255
+	add	r3, r3, r5
+	ldr	r0, [r3, #8]
+	movw	r3, #3926
+	ldrh	r2, [r2, r3]
+	bl	ftl_memset
+	ldr	r3, [r6, #-1852]
+	strh	r4, [r3, r5]	@ movhi
+	ldr	r3, [r6, #-1852]
+	add	r5, r3, r5
+	str	r7, [r5, #4]
+	b	.L1830
+.L1829:
+	mul	r5, r5, r1
+	ldr	r3, [r6, #-1852]
+	mov	r1, #1
+	str	r7, [r6, #184]
+	add	r0, r6, #180
+	mov	r2, r1
+	add	r3, r3, r5
+	ldr	r3, [r3, #8]
+	str	r3, [r6, #188]
+	ldr	r3, [r6, #-936]
+	str	r3, [r6, #192]
 	bl	FlashReadPages
-	ldr	fp, [r6, #-1800]
-	movw	ip, #65535
-	str	ip, [sp, #4]
-	str	fp, [sp, #8]
-	b	.L1788
-.L1793:
-	mov	lr, #36
-	ldr	r1, [r6, #-972]
-	mul	r2, lr, sl
-	add	r3, r1, r2
-	ldr	r2, [r1, r2]
-	cmp	r2, #0
-	bne	.L1789
-	ldr	r3, [r3, #12]
-	ldr	fp, [r3, #4]
-	cmn	fp, #1
-	beq	.L1790
-	ldr	r1, [r6, #-1800]
-	mov	r0, fp
-	str	r3, [sp, #0]
-	bl	ftl_cmp_data_ver
-	ldr	r3, [sp, #0]
-	cmp	r0, #0
-	addne	fp, fp, #1
-	strne	fp, [r6, #-1800]
-.L1790:
-	ldr	r3, [r3, #0]
-	cmn	r3, #1
-	bne	.L1792
-	b	.L1791
-.L1789:
-	ldr	r1, [r3, #4]
-	movw	fp, #294
-	ldr	r0, .L1866+8
+	ldr	r3, [r6, #180]
+	ldr	r8, [r6, #192]
+	cmp	r3, #256
+	bne	.L1831
+	mov	r1, r4
+	mov	r2, r7
+	ldr	r0, .L1833+8
 	bl	printk
-	ldrh	r3, [r4, #0]
-	uxth	r2, r8
-	str	r2, [sp, #4]
-	strh	r3, [r6, fp]	@ movhi
-.L1792:
-	add	sl, sl, #1
-.L1788:
-	uxth	r9, sl
-	cmp	r9, r5
-	bcc	.L1793
-.L1791:
-	ldr	r3, .L1866+4
-	cmp	r9, r5
-	addeq	r7, r7, #1
-	uxthne	r7, r7
-	movne	r2, #36
-	ldrne	r3, [r3, #-972]
-	uxtheq	r7, r7
-	ldreq	r3, [r3, #-972]
-	mlane	r9, r2, r9, r3
-	ldreq	r0, [r3, #4]
-	ldrne	r0, [r9, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1866
-	cmp	r2, #1
-	str	r0, [sp, #16]
-	bne	.L1796
-	ldrb	r1, [r3, #928]	@ zero_extendqisi2
-	cmp	r1, #0
-	addeq	r7, r3, r7, asl #1
-	movweq	r1, #3076
-	ldreqh	r7, [r7, r1]
-.L1796:
-	movw	r1, #3916
-	ldr	ip, [sp, #12]
-	ldrh	r3, [r3, r1]
-	ldr	fp, [sp, #24]
-	cmp	r3, r7
-	streqh	r7, [r4, #2]	@ movhi
-	moveq	r3, #0
-	streqb	r3, [r4, #6]
-	streqh	r3, [r4, #4]	@ movhi
-	ldr	r3, [sp, #16]
-	cmp	r7, ip
-	cmpeq	r3, fp
-	beq	.L1864
-.L1798:
-	ldr	fp, [sp, #4]
-	movw	r3, #65535
-	ldr	ip, [sp, #8]
-	cmp	fp, r3
-	sub	r6, ip, #1
-	bne	.L1799
-	cmp	r2, #0
-	bne	.L1800
-.L1799:
-	ldr	r2, .L1866+4
-	uxth	r3, r8
-	ldr	ip, [sp, #12]
-	mvn	fp, #0
-	mov	sl, r3
-	mov	r9, fp
-	ldr	r1, [r2, #-1008]
-	ldr	r8, .L1866+4
-	cmn	r1, #1
-	streq	r6, [r2, #-1008]
-	ldr	r2, [r2, #-1008]
-	str	r2, [sp, #4]
-	add	r2, ip, #7
-	cmp	r3, r2
-	subgt	r5, r3, #7
-	mov	r3, r7
-	ldrle	r5, [sp, #12]
-	mov	r7, r6
-	uxthgt	r5, r5
-	b	.L1803
-.L1805:
-	ldrh	r0, [r1, #16]
-	movw	lr, #65535
-	cmp	r0, lr
-	beq	.L1804
-	ldr	ip, [sp, #8]
-	mov	r3, #36
-	orr	r0, r5, r0, asl #10
-	mla	lr, r3, r6, ip
-	add	r6, r6, #1
-	uxth	r6, r6
-	str	r0, [lr, #4]
-.L1804:
-	add	r2, r2, #1
-	add	r1, r1, #2
-	uxth	r2, r2
-.L1816:
-	ldr	lr, [sp, #36]
-	cmp	r2, lr
-	bne	.L1805
-	ldr	r3, [sp, #28]
-	mov	r1, r6
-	ldr	r0, [r8, #-972]
-	ldr	r2, [sp, #20]
-	str	r3, [sp, #0]
-	bl	FlashReadPages
-	ldr	r2, .L1866
-	add	r0, r8, r5, asl #1
-	mov	r1, #0
-	str	r0, [sp, #8]
-	ldr	r3, [sp, #0]
-	ldrb	ip, [r2, #928]	@ zero_extendqisi2
-	ldr	r2, [r8, #-972]
-	str	ip, [sp, #28]
-	b	.L1806
-.L1814:
-	ldr	r0, [r2, #0]
-	cmp	r0, #0
-	bne	.L1807
-	ldr	r0, [r2, #12]
-	movw	ip, #65535
-	ldrh	lr, [r0, #0]
-	cmp	lr, ip
-	beq	.L1808
-	ldr	r0, [r0, #4]
-	cmn	r0, #1
-	beq	.L1808
-	cmn	fp, #1
-	ldr	r9, [r8, #-1008]
-	str	r0, [r8, #-1008]
-	bne	.L1808
-	ldr	lr, [sp, #8]
-	sub	r0, lr, #892
-	ldrh	r0, [r0, #0]
-	cmp	r0, ip
-	bne	.L1809
-	ldr	r0, [sp, #28]
-	cmp	r0, #0
-	beq	.L1808
-.L1809:
-	cmp	r9, r7
-	mvneq	fp, #0
-	movne	fp, r9
-	b	.L1808
-.L1807:
-	mov	r6, r7
-	ldrh	r1, [r4, #0]
-	mov	r7, r3
-	ldr	r3, .L1866+4
-	movw	r2, #294
-	strh	r1, [r3, r2]	@ movhi
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1800
-	add	r5, r3, r5, asl #1
-	movw	r2, #65535
-	sub	r5, r5, #892
-	ldrh	r1, [r5, #0]
-	cmp	r1, r2
-	bne	.L1810
-	cmn	fp, #1
-	bne	.L1859
-.L1811:
-	ldr	fp, [sp, #4]
-	cmp	fp, r6
-	beq	.L1812
-.L1859:
-	str	fp, [r3, #-1008]
-	b	.L1800
-.L1812:
-	ldr	r2, [r3, #-1008]
-	b	.L1865
-.L1810:
-	cmp	r9, r6
-	beq	.L1813
-	cmn	r9, #1
-	strne	r9, [r3, #-1008]
-	b	.L1800
-.L1813:
-	ldr	r2, [r3, #-1008]
-	cmp	r2, r6
-	beq	.L1800
-.L1865:
-	sub	r2, r2, #1
-	b	.L1860
-.L1808:
-	add	r1, r1, #1
-	add	r2, r2, #36
-	uxth	r1, r1
-.L1806:
-	cmp	r1, r6
-	bne	.L1814
-	add	r5, r5, #1
-	uxth	r5, r5
-.L1803:
-	cmp	r5, sl
-	bhi	.L1815
-	ldr	r1, .L1866
-	movw	r2, #3848
-	ldr	lr, [r8, #-972]
-	mov	r6, #0
-	str	r3, [sp, #28]
-	ldrh	ip, [r1, r2]
+	ldr	r3, .L1833+12
+	mov	r2, r7, lsr #10
+	sub	r0, r6, #1088
 	mov	r1, r4
-	str	lr, [sp, #8]
-	mov	r2, r6
-	str	ip, [sp, #36]
-	b	.L1816
-.L1815:
-	mov	r6, r7
-	mov	r7, r3
-	ldr	r3, .L1866+4
-	mvn	r2, #0
-.L1860:
-	str	r2, [r3, #-1008]
-.L1800:
-	ldr	r5, .L1866+4
-	mov	r3, #296
-	mov	r2, #1
-	sub	r0, r5, #1088
-	strh	r2, [r5, r3]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	r8, [sp, #12]
-	str	r7, [sp, #8]
-.L1817:
-	ldr	r3, .L1866
-	movw	r2, #3848
-	mov	r7, #0
-	ldr	lr, [r5, #-972]
-	mov	fp, #36
-	ldrh	sl, [r3, r2]
-	mov	r2, r4
-	ldrb	ip, [r3, #928]	@ zero_extendqisi2
-	mov	r3, r7
-	b	.L1818
-.L1821:
-	ldrh	r0, [r2, #16]
-	movw	r1, #65535
-	cmp	r0, r1
-	beq	.L1819
-	mla	r1, fp, r7, lr
-	orr	r0, r8, r0, asl #10
-	str	r0, [r1, #4]
-	ldrb	r9, [r4, #8]	@ zero_extendqisi2
-	cmp	r9, #1
-	bne	.L1820
-	cmp	ip, #0
-	orrne	r0, r0, #-2147483648
-	strne	r0, [r1, #4]
-.L1820:
-	add	r7, r7, #1
-	uxth	r7, r7
-.L1819:
-	add	r3, r3, #1
-	add	r2, r2, #2
-	uxth	r3, r3
-.L1818:
-	cmp	r3, sl
-	bne	.L1821
-	mov	r1, r7
-	ldr	r0, [r5, #-972]
-	ldr	r2, [sp, #20]
-	bl	FlashReadPages
-	mov	r3, #36
-	mul	r3, r3, r7
-	mov	r7, #0
-	str	r3, [sp, #36]
-	b	.L1822
-.L1843:
-	ldr	r9, [r5, #-972]
-	add	r9, r9, r7
-	ldr	sl, [r9, #4]
-	ubfx	r0, sl, #10, #16
-	str	sl, [sp, #52]
-	bl	P2V_plane
-	ldr	r3, [sp, #12]
-	cmp	r8, r3
-	bcc	.L1823
-	ldr	fp, [sp, #24]
-	mov	ip, r3
-	cmp	r0, fp
-	movcs	r3, #0
-	movcc	r3, #1
-	cmp	r8, ip
-	movne	r3, #0
-	cmp	r3, #0
-	bne	.L1823
-	ldr	r3, [sp, #16]
-	ldr	ip, [sp, #8]
-	cmp	r0, r3
-	cmpeq	r8, ip
-	beq	.L1855
-	ldr	r3, [r9, #0]
-	cmn	r3, #1
-	beq	.L1825
-	ldr	sl, [r9, #12]
-	movw	r3, #61589
-	ldrh	r2, [sl, #0]
-	cmp	r2, r3
-	bne	.L1832
-.L1826:
-	ldr	r6, [sl, #4]
-	cmn	r6, #1
-	beq	.L1827
-	ldr	r1, [r5, #-1800]
-	mov	r0, r6
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	addne	r3, r6, #1
-	strne	r3, [r5, #-1800]
-.L1827:
-	ldr	r9, [sl, #8]
-	add	r1, sp, #48
-	ldr	r3, [sl, #12]
-	mov	r2, #0
-	mov	r0, r9
-	str	r3, [sp, #44]
-	bl	log2phys
-	ldr	r1, [r5, #-1008]
-	cmn	r1, #1
-	beq	.L1828
-	mov	r0, r6
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1828
-	ldr	r3, [sp, #44]
-	cmn	r3, #1
-	beq	.L1829
-	ldr	r0, [r5, #-972]
-	mov	r1, #1
-	mov	r2, #0
-	add	r0, r0, r7
-	ldr	fp, [r0, #12]
-	str	r3, [r0, #4]
-	str	fp, [sp, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5, #-972]
-	ldr	ip, [fp, #4]
-	add	fp, r3, r7
-	ldr	r3, [r3, r7]
-	str	ip, [sp, #28]
-	cmn	r3, #1
-	bne	.L1830
-	b	.L1831
-.L1829:
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L1832
-	mov	r0, r9
-	add	r1, sp, #44
-	mov	r2, #1
-	bl	log2phys
+	strh	r2, [r6, r3]	@ movhi
+	ldr	r3, [r6, #-1852]
+	add	r3, r3, r5
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L1831:
+	ldrh	r3, [r8, #8]
+	cmp	r3, r4
+	beq	.L1832
+	mov	r2, r7
+	ldr	r7, .L1833
+	mov	r1, r4
+	ldr	r0, .L1833+16
+	bl	printk
+	ldr	r6, .L1833+4
+	mov	r2, #4
+	ldr	r0, .L1833+20
+	mov	r3, r2
+	ldr	r1, [r7, #192]
+	bl	rknand_print_hex
+	mov	r3, #3952
+	ldrh	r3, [r6, r3]
+	mov	r2, #4
+	ldr	r0, .L1833+24
+	ldr	r1, [r7, #-1032]
+	bl	rknand_print_hex
+	mov	r3, #1
+	str	r3, [r6, #4040]
 .L1832:
-	ldrh	r0, [r4, #0]
-	b	.L1862
+	ldr	r3, .L1833
+	mov	r1, #0
+	ldr	r3, [r3, #-1852]
+	add	r2, r3, r5
+	str	r1, [r2, #4]
+	strh	r4, [r3, r5]	@ movhi
 .L1830:
-	ldr	r3, [sp, #4]
-	ldr	sl, [r3, #8]
-	cmp	sl, r9
-	bne	.L1831
-	ldr	r0, [r5, #-1008]
-	ldr	r1, [sp, #28]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1831
-	ldr	r3, [sp, #48]
-	ldr	r2, [sp, #52]
-	cmp	r3, r2
-	beq	.L1836
+	mov	r0, #0
+	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
+.L1834:
+	.align	2
 .L1833:
-	ldr	r2, [sp, #44]
-	cmp	r3, r2
-	beq	.L1831
-	cmn	r3, #1
-	streq	r3, [fp, #0]
-	beq	.L1835
-	ldr	ip, [fp, #12]
-	mov	r0, fp
-	str	r3, [fp, #4]
-	mov	r1, #1
-	mov	r2, #0
-	str	ip, [sp, #4]
-	bl	FlashReadPages
-.L1835:
-	ldr	r3, [r5, #-972]
-	ldr	r3, [r3, r7]
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LC138
+	.word	-1048
+	.word	.LC139
+	.word	.LC98
+	.word	.LC140
+	.fnend
+	.size	ftl_load_l2p_region, .-ftl_load_l2p_region
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, lr}
+	.save {r3, r4, r5, r6, r7, r8, sl, lr}
+	mov	r8, r2
+	ldr	r3, .L1844
+	movw	r2, #3924
+	mov	r4, r1
+	ldrh	r7, [r3, r2]
+	mvn	r2, #0
+	add	r7, r7, #7
+	mov	r6, r0, lsr r7
+	bic	r7, r0, r2, asl r7
+	movw	r2, #3954
+	ldrh	r2, [r3, r2]
+	uxth	r6, r6
+	ldr	r3, .L1844+4
+	uxth	r7, r7
+	ldr	sl, [r3, #-1852]
+	mov	r3, #0
+	mov	r5, r3
+	b	.L1836
+.L1842:
+	add	r3, r3, #12
+	add	r1, sl, r3
+	ldrh	r1, [r1, #-12]
+	cmp	r1, r6
+	bne	.L1837
+.L1838:
+	cmp	r8, #0
+	ldr	r3, .L1844+4
+	mov	r2, #12
+	bne	.L1839
+	ldr	r3, [r3, #-1852]
+	mla	r2, r2, r5, r3
+	ldr	r3, [r2, #8]
+	ldr	r3, [r3, r7, asl #2]
+	str	r3, [r4, #0]
+	b	.L1840
+.L1839:
+	mul	r2, r2, r5
+	ldr	r1, [r3, #-1852]
+	ldr	r0, [r4, #0]
+	add	r1, r1, r2
+	ldr	r1, [r1, #8]
+	str	r0, [r1, r7, asl #2]
+	ldr	r1, [r3, #-1852]
+	add	r2, r1, r2
+	ldr	r1, [r2, #4]
+	orr	r1, r1, #-2147483648
+	str	r1, [r2, #4]
+	ldr	r2, .L1844+8
+	strh	r6, [r3, r2]	@ movhi
+.L1840:
+	ldr	r3, .L1844+4
+	mov	r2, #12
+	mov	r0, #0
+	ldr	r3, [r3, #-1852]
+	mla	r5, r2, r5, r3
+	ldr	r3, [r5, #4]
 	cmn	r3, #1
-	beq	.L1836
-	ldr	r3, [sp, #4]
-	ldr	r0, [r5, #-1008]
-	ldr	r9, [r3, #4]
-	mov	r1, r9
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1836
-	ldr	r0, [sp, #28]
-	mov	r1, r9
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1831
+	addne	r3, r3, #1
+	strne	r3, [r5, #4]
+	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
+.L1837:
+	add	r5, r5, #1
+	uxth	r5, r5
 .L1836:
-	mov	r0, sl
-	ldr	r1, [sp, #44]
-	bl	FtlReUsePrevPpa
-.L1831:
-	ldrh	r0, [r4, #0]
-	mvn	r3, #0
-	str	r3, [sp, #44]
-	bl	decrement_vpc_count
+	cmp	r5, r2
+	bne	.L1842
+	bl	select_l2p_ram_region
+	mov	r3, #12
+	mul	r3, r3, r0
+	mov	r5, r0
+	add	r2, sl, r3
+	ldrh	r1, [sl, r3]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L1843
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L1843
+	bl	flush_l2p_region
+.L1843:
+	mov	r0, r6
+	mov	r1, r5
+	bl	ftl_load_l2p_region
 	b	.L1838
-.L1828:
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
+.L1845:
+	.align	2
+.L1844:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	-1848
+	.fnend
+	.size	log2phys, .-log2phys
+	.align	2
+	.type	FtlReadRefresh.part.15, %function
+FtlReadRefresh.part.15:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	.pad #40
+	sub	sp, sp, #40
+	ldr	r4, .L1854
+	ldr	r6, .L1854+4
+	ldr	r2, [r4, #-1624]
+	ldr	r3, [r6, #3976]
 	cmp	r2, r3
-	beq	.L1838
-	mov	r0, r9
-	add	r1, sp, #52
-	mov	r2, #1
-	bl	log2phys
-	ldr	fp, [sp, #48]
-	cmn	fp, #1
-	beq	.L1838
-	ldr	r3, [sp, #44]
-	cmp	fp, r3
-	beq	.L1838
-	ubfx	r0, fp, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1866+12
-	ldrh	r3, [r5, r3]
-	cmp	r3, r0
-	beq	.L1839
-	ldr	r3, .L1866+16
-	ldrh	r3, [r5, r3]
-	cmp	r3, r0
-	beq	.L1839
-	ldr	r3, .L1866+20
-	ldrh	r3, [r5, r3]
-	cmp	r3, r0
-	bne	.L1838
-.L1839:
-	ldr	ip, .L1866+4
-	mov	r1, #1
+	bcs	.L1847
+	mov	r5, #2048
+.L1850:
+	ldr	r0, [r4, #-1624]
+	ldr	r3, [r6, #3976]
+	cmp	r0, r3
+	bcs	.L1852
+	mov	r1, sp
 	mov	r2, #0
-	ldr	r0, [ip, #-972]
-	str	fp, [r0, #4]
-	ldr	sl, [r0, #12]
-	bl	FlashReadPages
-	ldr	r0, .L1866+4
-	ldr	r1, [sl, #4]
-	ldr	r3, [r0, #-972]
-	ldr	r3, [r3, #0]
-	cmn	r3, #1
-	beq	.L1838
-	mov	r0, r6
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	bne	.L1838
-	mov	r0, r9
-	add	r1, sp, #48
-	mov	r2, #1
 	bl	log2phys
-.L1838:
-	ldr	r0, [sp, #44]
+	ldr	r0, [sp, #0]
+	ldr	r3, [r4, #-1624]
 	cmn	r0, #1
-	beq	.L1823
+	add	r3, r3, #1
+	str	r3, [r4, #-1624]
+	beq	.L1849
+	str	r0, [sp, #8]
+	add	r0, sp, #40
+	mov	r2, #0
+	mov	r1, #1
+	str	r2, [r0, #-36]!
+	str	r3, [sp, #20]
+	str	r2, [sp, #12]
+	str	r2, [sp, #16]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	cmp	r3, #256
+	bne	.L1852
+	ldr	r0, [sp, #0]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, [r5, #-2016]
-	mov	r3, r0, asl #1
-	mov	r1, r0
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1840
-.L1862:
-	bl	decrement_vpc_count
-	b	.L1823
-.L1840:
-	ldr	r0, .L1866+24
-	bl	printk
-	b	.L1823
-.L1825:
-	ldrh	r3, [r4, #0]
-	movw	r1, #294
-	mov	r2, r6
-	ldr	r0, .L1866+28
-	strh	r3, [r5, r1]	@ movhi
-	mov	r1, sl
-	bl	printk
-	ldr	r3, [r5, #300]
-	cmp	r3, #31
-	addls	r2, r5, r3, asl #2
-	addls	r3, r3, #1
-	ldrls	r1, [sp, #52]
-	strls	r3, [r5, #300]
-	strls	r1, [r2, #304]
-	ldrh	r0, [r4, #0]
-	bl	decrement_vpc_count
-	ldr	r3, [r5, #-1008]
-	cmn	r3, #1
-	beq	.L1861
-.L1842:
-	cmp	r3, r6
-	bls	.L1823
-.L1861:
-	str	r6, [r5, #-1008]
-.L1823:
-	add	r7, r7, #36
-.L1822:
-	ldr	r3, [sp, #36]
-	cmp	r7, r3
-	bne	.L1843
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	add	r8, r8, #1
-	cmp	r3, #1
-	uxth	r8, r8
-	bne	.L1844
-	ldr	r3, .L1866
-	ldrb	r2, [r3, #928]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L1844
-	movw	r2, #3918
-	ldr	ip, [sp, #8]
-	ldrh	r3, [r3, r2]
-	cmp	ip, r8
-	cmpeq	r3, r8
-	beq	.L1855
-.L1844:
-	ldr	r3, .L1866
-	movw	r2, #3916
-	ldrh	r2, [r3, r2]
-	cmp	r8, r2
-	bne	.L1817
-	mov	r2, #0
-	movw	r1, #3848
-	strh	r2, [r4, #4]	@ movhi
-	ldrh	r1, [r3, r1]
-	mov	r3, r2
-	strh	r8, [r4, #2]	@ movhi
-	movw	r2, #65535
-	ldr	r0, [sp, #32]
-	b	.L1845
+	bl	FtlGcRefreshBlock
+	b	.L1852
+.L1849:
+	subs	r5, r5, #1
+	bne	.L1850
+	b	.L1848
 .L1847:
-	add	r0, r0, #2
-	ldrh	ip, [r0, #14]
-	cmp	ip, r2
-	strneb	r3, [r4, #6]
-	bne	.L1777
-.L1846:
-	add	r3, r3, #1
-	uxth	r3, r3
-.L1845:
-	cmp	r3, r1
-	bne	.L1847
-	b	.L1777
+	ldr	r3, [r4, #-1836]
+	mov	r0, #0
+	str	r0, [r4, #-1628]
+	str	r0, [r4, #-1624]
+	str	r3, [r4, #-1632]
+	b	.L1848
+.L1852:
+	mvn	r0, #0
+.L1848:
+	add	sp, sp, #40
+	ldmfd	sp!, {r4, r5, r6, pc}
 .L1855:
-.L1824:
-	ldr	r7, [sp, #8]
-	ldr	r3, [sp, #16]
-	strh	r7, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-.L1864:
-	mov	r0, r4
-	mov	r1, r7
-	mov	r2, r3
-	bl	ftl_sb_update_avl_pages
-.L1777:
+	.align	2
+.L1854:
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.fnend
+	.size	FtlReadRefresh.part.15, .-FtlReadRefresh.part.15
+	.align	2
+	.global	FtlReadRefresh
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1863
+	ldr	r2, [r3, #-1628]
+	cmp	r2, #0
+	beq	.L1857
+	b	FtlReadRefresh.part.15
+.L1857:
+	ldr	r2, .L1863+4
+	ldr	r0, [r3, #-1784]
+	ldr	r1, [r2, #3840]
+	ldrb	r2, [r2, #928]	@ zero_extendqisi2
+	cmp	r2, #0
+	ldr	r2, [r3, #-1836]
+	addeq	r0, r1, r0, lsr #10
+	moveq	r1, #33554432
+	movne	r0, #4194304
+	moveq	r0, r1, asr r0
+	ldr	r1, [r3, #-1632]
+	add	r3, r2, #1048576
+	cmp	r1, r3
+	bhi	.L1859
+	add	r1, r0, r1
+	cmp	r1, r2
+	bcc	.L1859
+	ldr	r3, .L1863
+	ldrb	r3, [r3, #-2044]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1860
+.L1859:
+	ldr	r3, .L1863
+	mov	r1, #1
+	str	r2, [r3, #-1632]
+	str	r1, [r3, #-1628]
+	mov	r1, #0
+	str	r1, [r3, #-1624]
+.L1860:
 	mov	r0, #0
-	add	sp, sp, #60
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L1867:
+	bx	lr
+.L1864:
 	.align	2
-.L1866:
-	.word	.LANCHOR0
+.L1863:
 	.word	.LANCHOR2
-	.word	.LC125
-	.word	-1996
-	.word	-1948
-	.word	-1900
-	.word	.LC126
-	.word	.LC127
+	.word	.LANCHOR0
 	.fnend
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
-	.global	FtlWriteDumpData
-	.type	FtlWriteDumpData, %function
-FtlWriteDumpData:
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 40
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
-	.save {r4, r5, r6, r7, r8, sl, lr}
-	.pad #44
-	sub	sp, sp, #44
-	ldr	r4, .L1877
-	ldr	r3, [r4, #-2088]
-	mov	r2, r4
-	cmp	r3, #0
-	bne	.L1868
-	ldr	r3, .L1877+4
-	ldrh	r3, [r4, r3]
-	cmp	r3, #0
-	beq	.L1870
-	ldrb	r1, [r4, #-1988]	@ zero_extendqisi2
-	cmp	r1, #0
+	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
+	.save {r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r7, r0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, .L1871
+	ldr	r1, [r3, #-2016]
+	mov	r5, r0, asl #1
+	ldrh	r2, [r1, r5]
+	cmp	r2, #0
+	addne	r2, r2, #1
+	strneh	r2, [r1, r5]	@ movhi
+	bne	.L1867
+	ldr	r4, [r3, #-2004]
+	cmp	r4, #0
+	beq	.L1867
+	ldr	r1, .L1871+4
+	mov	ip, #6
+	ldrh	lr, [r3, r1]
+	ldr	r3, [r3, #-2024]
+	ldr	r1, .L1871+8
+	rsb	r4, r3, r4
+	mov	r4, r4, asr #1
+	mul	r4, r1, r4
+	movw	r1, #65535
+	uxth	r4, r4
+	b	.L1868
+.L1870:
+	cmp	r4, r0
+	bne	.L1869
+	mov	r1, r4
+	ldr	r0, .L1871+12
+	bl	List_remove_node
+	ldr	r6, .L1871
+	ldr	r3, .L1871+4
+	mov	r0, r4
+	ldrh	r2, [r6, r3]
+	sub	r2, r2, #1
+	strh	r2, [r6, r3]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r6, #-2016]
+	ldrh	r2, [r3, r5]
+	add	r2, r2, #1
+	strh	r2, [r3, r5]	@ movhi
+	b	.L1867
+.L1869:
+	mul	r4, ip, r4
+	ldrh	r4, [r3, r4]
+	cmp	r4, r1
+	beq	.L1867
+	add	r2, r2, #1
+	uxth	r2, r2
+.L1868:
+	cmp	r2, lr
 	bne	.L1870
-	ldr	r5, .L1877+8
-	movw	r0, #3916
-	ldrb	r1, [r4, #-1989]	@ zero_extendqisi2
-	ldrh	r0, [r5, r0]
-	mul	r1, r0, r1
-	cmp	r3, r1
-	beq	.L1870
-	ldrb	r8, [r4, #-1986]	@ zero_extendqisi2
-	movw	r3, #3848
-	ldr	r7, [r5, #3976]
-	cmp	r8, #0
-	ldrh	r6, [r5, r3]
-	bne	.L1868
-	sub	r7, r7, #1
-	mov	r1, sp
-	mov	r2, r8
+.L1867:
 	mov	r0, r7
+	add	r1, sp, #4
+	mov	r2, #1
 	bl	log2phys
-	ldr	r3, [sp, #0]
-	ldr	r0, [r4, #-960]
-	ldr	r4, [r4, #-936]
-	cmn	r3, #1
-	str	r3, [sp, #8]
-	str	r7, [sp, #20]
-	str	r0, [sp, #12]
-	str	r4, [sp, #16]
-	str	r8, [r4, #4]
-	beq	.L1871
-	add	r0, sp, #4
-	mov	r1, #1
-	mov	r2, r8
-	bl	FlashReadPages
-	b	.L1872
-.L1871:
-	movw	r3, #3926
-	mov	r1, #255
-	ldrh	r2, [r5, r3]
-	bl	ftl_memset
+	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
 .L1872:
-	ldr	r3, .L1877+12
-	mov	r6, r6, asl #2
-	ldr	r5, .L1877
-	ldr	sl, .L1877+4
-	strh	r3, [r4, #0]	@ movhi
-	ldr	r8, .L1877+16
-	b	.L1873
-.L1876:
-	ldrh	r3, [r5, sl]
-	cmp	r3, #0
-	beq	.L1874
-	ldr	r3, [sp, #8]
-	sub	r6, r6, #1
-	str	r7, [r4, #8]
-	ldr	r0, .L1877+20
-	str	r3, [r4, #12]
-	ldrh	r3, [r5, r8]
-	strh	r3, [r4, #2]	@ movhi
-	bl	get_new_active_ppa
-	ldr	r3, [r5, #-1800]
+	.align	2
+.L1871:
+	.word	.LANCHOR2
+	.word	-2000
+	.word	-1431655765
+	.word	.LANCHOR2-2004
+	.fnend
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.align	2
+	.global	Ftlscanalldata
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	mov	r1, #0
+	ldr	r4, .L1879
+	.pad #32
+	sub	sp, sp, #32
+	ldr	r0, .L1879+4
+	mov	r5, #0
+	bl	printk
+	ldr	r7, .L1879+8
+	mov	r6, r4
+	b	.L1874
+.L1878:
+	mov	r0, r5
+	add	r1, sp, #28
+	mov	r2, #0
+	bl	log2phys
+	movs	r3, r5, asl #21
+	bne	.L1875
+	ldr	r0, .L1879+12
+	mov	r1, r5
+	ldr	r2, [sp, #28]
+	bl	printk
+.L1875:
+	ldr	r3, [sp, #28]
+	cmn	r3, #1
+	beq	.L1876
+	str	r3, [r4, #184]
 	mov	r2, #0
+	ldr	r3, [r4, #-960]
 	mov	r1, #1
-	str	r0, [sp, #8]
-	add	r0, sp, #4
-	str	r3, [r4, #4]
-	add	r3, r3, #1
+	ldr	r8, [r4, #-936]
+	ldr	r0, .L1879+16
+	str	r3, [r4, #188]
+	str	r5, [r4, #196]
+	str	r8, [r4, #192]
+	str	r2, [r4, #180]
+	bl	FlashReadPages
+	ldr	r3, [r4, #180]
 	cmn	r3, #1
-	str	r3, [r5, #-1800]
-	moveq	r3, #0
-	streq	r3, [r5, #-1800]
-	mov	r3, r2
-	bl	FlashProgPages
-	ldrh	r0, [r5, r8]
-	bl	decrement_vpc_count
-.L1873:
-	cmp	r6, #0
-	bne	.L1876
+	cmpne	r3, #256
+	beq	.L1877
+	ldr	r3, [r8, #8]
+	cmp	r3, r5
+	beq	.L1876
+.L1877:
+	ldr	r3, [r6, #192]
+	ldr	r2, [r6, #188]
+	ldr	r0, .L1879+20
+	ldr	r1, [r3, #4]
+	str	r1, [sp, #0]
+	ldr	r1, [r3, #8]
+	str	r1, [sp, #4]
+	ldr	r1, [r3, #12]
+	str	r1, [sp, #8]
+	ldr	r1, [r2, #0]
+	str	r1, [sp, #12]
+	mov	r1, r5
+	ldr	r2, [r2, #4]
+	str	r2, [sp, #16]
+	ldr	r2, [r6, #184]
+	ldr	r3, [r3, #0]
+	bl	printk
+.L1876:
+	add	r5, r5, #1
 .L1874:
-	ldr	r3, .L1877
-	mov	r2, #1
-	strb	r2, [r3, #-1986]
-	b	.L1868
-.L1870:
-	mov	r3, #0
-	strb	r3, [r2, #-1986]
-.L1868:
-	add	sp, sp, #44
-	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L1878:
+	ldr	r3, [r7, #3976]
+	cmp	r5, r3
+	bcc	.L1878
+	add	sp, sp, #32
+	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
+.L1880:
 	.align	2
-.L1877:
+.L1879:
 	.word	.LANCHOR2
-	.word	-1992
+	.word	.LC141
 	.word	.LANCHOR0
-	.word	-3947
-	.word	-1996
-	.word	.LANCHOR2-1996
+	.word	.LC142
+	.word	.LANCHOR2+180
+	.word	.LC143
 	.fnend
-	.size	FtlWriteDumpData, .-FtlWriteDumpData
+	.size	Ftlscanalldata, .-Ftlscanalldata
 	.align	2
-	.global	l2p_flush
-	.type	l2p_flush, %function
-l2p_flush:
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-	bl	FtlWriteDumpData
-	mov	r4, #0
-	ldr	r7, .L1883
-	movw	r6, #3954
-	ldr	r5, .L1883+4
-	b	.L1880
-.L1882:
-	ldr	r3, [r5, #-1852]
-	mov	r2, #12
-	mla	r3, r2, r4, r3
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1881
-	mov	r0, r4
-	bl	flush_l2p_region
-.L1881:
-	add	r4, r4, #1
-	uxth	r4, r4
-.L1880:
-	ldrh	r3, [r7, r6]
-	cmp	r3, r4
-	bhi	.L1882
-	mov	r0, #0
-	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0, #0]
+	.pad #60
+	sub	sp, sp, #60
+	mov	r4, r0
+	cmp	r3, r2
+	beq	.L1882
+	ldrh	r3, [r0, #2]
+	ldr	r1, .L1971
+	ldrb	fp, [r0, #6]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	movw	r3, #3916
+	ldrh	r3, [r1, r3]
+	ldr	ip, [sp, #12]
+	str	fp, [sp, #24]
+	cmp	r3, ip
+	mov	r3, #0
+	streqh	r3, [r0, #4]	@ movhi
+	moveq	r2, r3	@ movhi
+	ldrneh	r0, [r0, #16]
+	bne	.L1884
+	b	.L1968
+.L1885:
+	add	r3, r3, #1
+	uxth	r3, r3
+	add	r1, r4, r3, asl #1
+	ldrh	r0, [r1, #16]
 .L1884:
-	.align	2
-.L1883:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.fnend
-	.size	l2p_flush, .-l2p_flush
-	.align	2
-	.global	FtlVpcCheckAndModify
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
-	.save {r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r4, #0
-	ldr	r6, .L1892
-	ldr	r1, .L1892+4
-	ldr	r0, .L1892+8
-	bl	printk
-	movw	r3, #3858
-	ldrh	r2, [r6, r3]
-	mov	r1, #0
-	ldr	r5, .L1892+12
-	mov	r2, r2, asl #1
-	ldr	r0, [r5, #-916]
-	bl	ftl_memset
-	b	.L1886
-.L1888:
-	mov	r0, r4
-	add	r1, sp, #4
-	mov	r2, #0
-	bl	log2phys
-	ldr	r0, [sp, #4]
+	cmp	r0, r2
+	beq	.L1885
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L1886
+	bl	FtlGetLastWrittenPage
 	cmn	r0, #1
+	mov	r7, r0
 	beq	.L1887
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, [r5, #-916]
-	mov	r0, r0, asl #1
-	ldrh	r2, [r3, r0]
-	add	r2, r2, #1
-	strh	r2, [r3, r0]	@ movhi
-.L1887:
-	add	r4, r4, #1
+	ldr	r3, .L1971
+	ldrb	r2, [r3, #928]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1961
+	add	r3, r3, r0, asl #1
+	movw	r2, #3076
+	ldrh	r8, [r3, r2]
+	b	.L1953
 .L1886:
-	ldr	r3, [r6, #3976]
-	cmp	r4, r3
-	bcc	.L1888
-	mov	r4, #0
-	ldr	r7, .L1892
-	ldr	r5, .L1892+12
-	movw	r8, #65535
+	mov	r1, #0
+	bl	FtlGetLastWrittenPage
+	cmn	r0, #1
+	mov	r7, r0
+	beq	.L1887
+.L1961:
+	mov	r8, r7
+.L1953:
+	ldr	r3, .L1971
+	movw	r2, #3848
+	mov	r5, #0
+	str	r4, [sp, #32]
+	movw	ip, #65535
+	ldrh	r9, [r3, r2]
+	ldr	r2, .L1971+4
+	ldr	sl, [r2, #-972]
+	ldr	r6, [r2, #-1168]
+	movw	r2, #3928
+	ldrh	lr, [r3, r2]
+	mov	r2, r4
+	mov	r3, r5
 	b	.L1889
+.L1887:
+	mov	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	mov	r2, r3	@ movhi
+.L1968:
+	strb	r2, [r4, #6]
+	b	.L1882
 .L1891:
-	ldr	r3, [r5, #-2016]
-	mov	r6, r4, asl #1
-	ldrh	r2, [r3, r6]
-	ldr	r3, [r5, #-916]
-	ldrh	r3, [r3, r6]
-	cmp	r2, r3
-	beq	.L1890
-	cmp	r2, r8
-	beq	.L1890
-	ldr	r0, .L1892+16
-	mov	r1, r4
-	bl	printk
-	ldr	r3, .L1892+20
-	ldrh	r3, [r5, r3]
-	cmp	r3, r4
-	beq	.L1890
-	ldr	r3, .L1892+24
-	ldrh	r3, [r5, r3]
-	cmp	r3, r4
-	beq	.L1890
-	ldr	r3, .L1892+28
-	ldrh	r3, [r5, r3]
-	cmp	r3, r4
+	ldrh	r0, [r2, #16]
+	cmp	r0, ip
 	beq	.L1890
-	ldr	r3, [r5, #-916]
-	mov	r0, r4
-	ldrh	r2, [r3, r6]
-	ldr	r3, [r5, #-2016]
-	strh	r2, [r3, r6]	@ movhi
-	bl	update_vpc_list
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
+	mov	fp, #36
+	orr	r0, r8, r0, asl #10
+	mla	r1, fp, r5, sl
+	str	r0, [r1, #4]
+	mov	r0, #0
+	str	r0, [r1, #8]
+	mul	r0, lr, r5
+	add	r5, r5, #1
+	uxth	r5, r5
+	add	fp, r0, #3
+	cmp	r0, #0
+	movlt	r0, fp
+	bic	r0, r0, #3
+	add	r0, r6, r0
+	str	r0, [r1, #12]
 .L1890:
-	add	r4, r4, #1
-	uxth	r4, r4
+	add	r3, r3, #1
+	add	r2, r2, #2
+	uxth	r3, r3
 .L1889:
-	mov	r3, #3856
-	ldrh	r3, [r7, r3]
-	cmp	r3, r4
-	bhi	.L1891
-	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
-.L1893:
-	.align	2
-.L1892:
-	.word	.LANCHOR0
-	.word	.LANCHOR3+15
-	.word	.LC128
-	.word	.LANCHOR2
-	.word	.LC129
-	.word	-1996
-	.word	-1900
-	.word	-1948
-	.fnend
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
-	.align	2
-	.global	allocate_new_data_superblock
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1906
-	stmfd	sp!, {r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r2, [r3, #-2088]
-	ldrh	r5, [r0, #0]
+	cmp	r3, r9
+	bne	.L1891
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	movne	r3, #0
+	bne	.L1962
+	ldr	r3, .L1971
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	movne	r3, #1
+.L1962:
+	ldr	r6, .L1971+4
+	mov	r1, r5
+	str	r3, [sp, #20]
+	mov	sl, #0
+	ldr	r2, [sp, #20]
+	ldr	r0, [r6, #-972]
+	bl	FlashReadPages
+	ldr	fp, [r6, #-1800]
+	movw	ip, #65535
+	str	ip, [sp, #4]
+	str	fp, [sp, #8]
+	b	.L1893
+.L1898:
+	mov	lr, #36
+	ldr	r1, [r6, #-972]
+	mul	r2, lr, sl
+	add	r3, r1, r2
+	ldr	r2, [r1, r2]
 	cmp	r2, #0
-	bne	.L1895
-	movw	r2, #65535
-	cmp	r5, r2
-	beq	.L1896
-	ldr	r2, [r3, #-2016]
-	mov	r3, r5, asl #1
-	mov	r0, r5
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1897
-	bl	INSERT_DATA_LIST
+	bne	.L1894
+	ldr	r3, [r3, #12]
+	ldr	fp, [r3, #4]
+	cmn	fp, #1
+	beq	.L1895
+	ldr	r1, [r6, #-1800]
+	mov	r0, fp
+	str	r3, [sp, #0]
+	bl	ftl_cmp_data_ver
+	ldr	r3, [sp, #0]
+	cmp	r0, #0
+	addne	fp, fp, #1
+	strne	fp, [r6, #-1800]
+.L1895:
+	ldr	r3, [r3, #0]
+	cmn	r3, #1
+	bne	.L1897
 	b	.L1896
+.L1894:
+	ldr	r1, [r3, #4]
+	movw	fp, #294
+	ldr	r0, .L1971+8
+	bl	printk
+	ldrh	r3, [r4, #0]
+	uxth	r2, r8
+	str	r2, [sp, #4]
+	strh	r3, [r6, fp]	@ movhi
 .L1897:
-	bl	INSERT_FREE_LIST
+	add	sl, sl, #1
+.L1893:
+	uxth	r9, sl
+	cmp	r9, r5
+	bcc	.L1898
 .L1896:
-	mov	r3, #0
-	strb	r3, [r4, #8]
-	ldr	r3, .L1906+4
-	cmp	r4, r3
-	beq	.L1898
-	ldr	r2, .L1906+8
-	movw	r3, #3868
-	ldrh	r3, [r2, r3]
-	cmp	r3, #1
-	beq	.L1898
-	ldrb	r2, [r2, #928]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L1899
-.L1898:
-	mov	r3, #1
-	strb	r3, [r4, #8]
-	b	.L1900
-.L1899:
-	ldr	r2, .L1906+12
-	cmp	r4, r2
-	bne	.L1900
-	cmp	r3, #3
-	ldr	r3, .L1906
-	beq	.L1901
-	ldr	r2, [r3, #-1712]
+	ldr	r3, .L1971+4
+	cmp	r9, r5
+	addeq	r7, r7, #1
+	uxthne	r7, r7
+	movne	r2, #36
+	ldrne	r3, [r3, #-972]
+	uxtheq	r7, r7
+	ldreq	r3, [r3, #-972]
+	mlane	r9, r2, r9, r3
+	ldreq	r0, [r3, #4]
+	ldrne	r0, [r9, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L1971
 	cmp	r2, #1
-	bne	.L1902
+	str	r0, [sp, #16]
+	bne	.L1901
+	ldrb	r1, [r3, #928]	@ zero_extendqisi2
+	cmp	r1, #0
+	addeq	r7, r3, r7, asl #1
+	movweq	r1, #3076
+	ldreqh	r7, [r7, r1]
 .L1901:
-	mov	r2, #1
-	strb	r2, [r3, #-1988]
-.L1902:
-	ldr	r2, .L1906+8
-	ldr	r2, [r2, #3840]
-	cmp	r2, #0
-	beq	.L1900
-	ldr	r3, [r3, #-1780]
-	cmp	r3, #29
-	ldrls	r3, .L1906
-	movls	r2, #1
-	strlsb	r2, [r3, #-1988]
-.L1900:
-	ldr	r3, .L1906+16
-	ldr	r6, .L1906
-	ldrh	r0, [r6, r3]
+	movw	r1, #3916
+	ldr	ip, [sp, #12]
+	ldrh	r3, [r3, r1]
+	ldr	fp, [sp, #24]
+	cmp	r3, r7
+	streqh	r7, [r4, #2]	@ movhi
+	moveq	r3, #0
+	streqb	r3, [r4, #6]
+	streqh	r3, [r4, #4]	@ movhi
+	ldr	r3, [sp, #16]
+	cmp	r7, ip
+	cmpeq	r3, fp
+	beq	.L1969
+.L1903:
+	ldr	fp, [sp, #4]
 	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1903
-	cmp	r5, r0
+	ldr	ip, [sp, #8]
+	cmp	fp, r3
+	sub	r6, ip, #1
 	bne	.L1904
-	ldr	r2, [r6, #-2016]
-	mov	r3, r0, asl #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1905
+	cmp	r2, #0
+	bne	.L1905
 .L1904:
-	bl	update_vpc_list
-.L1905:
-	ldr	r3, .L1906+16
-	mvn	r2, #0
-	strh	r2, [r6, r3]	@ movhi
-.L1903:
-	mov	r0, r4
-	bl	allocate_data_superblock
-	bl	l2p_flush
-	mov	r0, #0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1895:
-	mov	r0, #0
-	ldmfd	sp!, {r4, r5, r6, pc}
-.L1907:
-	.align	2
-.L1906:
-	.word	.LANCHOR2
-	.word	.LANCHOR2-1948
-	.word	.LANCHOR0
-	.word	.LANCHOR2-1996
-	.word	-1020
-	.fnend
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.align	2
-	.type	ftl_do_gc.part.21, %function
-ftl_do_gc.part.21:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2005
-	movw	ip, #65535
-	ldr	r2, .L2005+4
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.pad #36
-	sub	sp, sp, #36
-	mov	sl, r1
-	str	r0, [sp, #16]
-	ldrh	r0, [r3, r2]
-	cmp	r0, ip
+	ldr	r2, .L1971+4
+	uxth	r3, r8
+	ldr	ip, [sp, #12]
+	mvn	fp, #0
+	mov	sl, r3
+	mov	r9, fp
+	ldr	r1, [r2, #-1008]
+	ldr	r8, .L1971+4
+	cmn	r1, #1
+	streq	r6, [r2, #-1008]
+	ldr	r2, [r2, #-1008]
+	str	r2, [sp, #4]
+	add	r2, ip, #7
+	cmp	r3, r2
+	subgt	r5, r3, #7
+	mov	r3, r7
+	ldrle	r5, [sp, #12]
+	mov	r7, r6
+	uxthgt	r5, r5
+	b	.L1908
+.L1910:
+	ldrh	r0, [r1, #16]
+	movw	lr, #65535
+	cmp	r0, lr
 	beq	.L1909
-	ldr	r1, .L2005+8
-	ldrh	r4, [r3, r1]
-	cmp	r4, ip
-	streqh	r0, [r3, r1]	@ movhi
-	mvneq	r1, #0
-	streqh	r1, [r3, r2]	@ movhi
+	ldr	ip, [sp, #8]
+	mov	r3, #36
+	orr	r0, r5, r0, asl #10
+	mla	lr, r3, r6, ip
+	add	r6, r6, #1
+	uxth	r6, r6
+	str	r0, [lr, #4]
 .L1909:
-	ldr	r1, [sp, #16]
-	ldr	r2, [r3, #-1192]
-	cmp	r1, #1
 	add	r2, r2, #1
-	add	r2, r2, r1, asl #7
-	str	r2, [r3, #-1192]
-	bne	.L1910
-	ldr	r3, .L2005+12
-	ldr	r1, [r3, #3840]
-	cmp	r1, #0
-	bne	.L1911
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1910
-.L1911:
-	ldr	r4, .L2005
-	ldr	r3, [r4, #-1780]
-	cmp	r3, #29
-	bhi	.L1910
-	mov	r3, #432
-	ldrh	r3, [r4, r3]
-	add	r2, r2, r3
-	str	r2, [r4, #-1192]
-	bl	FtlGcReFreshBadBlk
-	ldr	r3, .L2005+16
-	movw	r2, #65535
-	ldrh	r3, [r4, r3]
-	cmp	r3, r2
-	bne	.L1910
-	ldr	r2, .L2005+8
-	ldrh	r2, [r4, r2]
-	cmp	r2, r3
+	add	r1, r1, #2
+	uxth	r2, r2
+.L1921:
+	ldr	lr, [sp, #36]
+	cmp	r2, lr
 	bne	.L1910
-	ldr	r3, [r4, #-1192]
-	cmp	r3, #1024
-	bhi	.L1912
-	ldr	r3, .L2005+20
-	ldrh	r3, [r4, r3]
-	cmp	r3, #63
-	bhi	.L1910
-.L1912:
-	ldr	r3, .L2005
-	mov	r2, #432
-	ldr	r0, .L2005+20
+	ldr	r3, [sp, #28]
+	mov	r1, r6
+	ldr	r0, [r8, #-972]
+	ldr	r2, [sp, #20]
+	str	r3, [sp, #0]
+	bl	FlashReadPages
+	ldr	r2, .L1971
+	add	r0, r8, r5, asl #1
 	mov	r1, #0
-	strh	r1, [r3, r2]	@ movhi
-	ldrh	ip, [r3, r0]
-	ldr	r0, .L2005+24
-	ldrh	r0, [r3, r0]
-	add	r0, r0, #64
-	cmp	ip, r0
-	bgt	.L1910
-	str	r1, [r3, #-1192]
-	ldr	r1, [r3, #-1780]
-	cmp	r1, #0
-	moveq	r1, #6
-	beq	.L2001
-	cmp	r1, #5
-	bhi	.L1914
-	mov	r1, #18
-.L2001:
-	strh	r1, [r3, r2]	@ movhi
-.L1914:
-	mov	r0, #32
-	movw	r7, #65535
-	bl	List_get_gc_head_node
-	uxth	r2, r0
-	cmp	r2, r7
-	beq	.L1915
-	ldr	r5, .L2005
-	ldr	r6, .L2005+28
-	ldrh	r0, [r5, r6]
+	str	r0, [sp, #8]
+	ldr	r3, [sp, #0]
+	ldrb	ip, [r2, #928]	@ zero_extendqisi2
+	ldr	r2, [r8, #-972]
+	str	ip, [sp, #28]
+	b	.L1911
+.L1919:
+	ldr	r0, [r2, #0]
 	cmp	r0, #0
-	moveq	r3, #1
-	streqh	r3, [r5, r6]	@ movhi
-	beq	.L1915
-	ldr	r3, .L2005+12
-	movw	ip, #3918
-	movw	lr, #3848
-	ldr	r9, [r5, #-2016]
-	mov	r2, r2, asl #1
-	ldrh	ip, [r3, ip]
-	ldrh	r3, [r3, lr]
-	ldrh	r1, [r9, r2]
-	mul	r3, r3, ip
-	add	r3, r3, #1
-	cmp	r1, r3
-	bgt	.L1915
-	add	fp, r0, #1
-	mov	r8, #0
-	str	r8, [r5, #-1184]
-	uxth	fp, fp
-	strh	fp, [r5, r6]	@ movhi
-	str	r2, [sp, #8]
-	bl	List_get_gc_head_node
-	ldr	r2, [sp, #8]
-	uxth	r4, r0
-	cmp	r4, r7
-	beq	.L1915
-	ldrh	r2, [r9, r2]
-	mov	r7, r4, asl #1
-	ldr	r0, .L2005+32
-	mov	r1, fp
-	ldrh	r3, [r9, r7]
-	str	r2, [sp, #0]
-	mov	r2, r4
-	bl	printk
-	ldrh	r3, [r5, r6]
-	cmp	r3, #40
-	bls	.L1917
-	ldr	r3, [r5, #-2016]
-	ldrh	r3, [r3, r7]
-	cmp	r3, #32
-	strhih	r8, [r5, r6]	@ movhi
-.L1917:
-	ldr	r2, .L2005
-	mov	r3, #432
-	mov	r1, #6
-	strh	r1, [r2, r3]	@ movhi
-	b	.L1919
-.L1915:
-	bl	GetSwlReplaceBlock
-	movw	r3, #65535
-	cmp	r0, r3
-	mov	r4, r0
-	bne	.L1919
-	ldr	r2, .L2005
-	mov	r3, #432
-	mov	r1, #0
-	strh	r1, [r2, r3]	@ movhi
-.L1910:
-	ldr	r5, .L2005
-	movw	r4, #65535
-	ldr	r3, .L2005+16
-	ldrh	r2, [r5, r3]
-	cmp	r2, r4
-	bne	.L1919
-	sub	r3, r3, #140
-	ldrh	r3, [r5, r3]
-	cmp	r3, r2
-	movne	r4, r2
-	bne	.L1919
-	ldr	r2, .L2005+8
-	ldrh	r7, [r5, r2]
-	cmp	r7, r3
-	movne	r4, r3
-	bne	.L1919
-	ldr	r8, .L2005+20
-	ldr	r2, [r5, #-1192]
-	ldrh	r3, [r5, r8]
-	cmp	r3, #23
-	movhi	r3, #1024
-	movls	r3, #5120
-	cmp	r2, r3
-	movls	r4, r7
-	bls	.L1919
-	mov	r2, #432
-	mov	r3, #0
-	str	r3, [r5, #-1192]
-	mov	r6, r5
-	strh	r3, [r5, r2]	@ movhi
-	bl	GetSwlReplaceBlock
-	cmp	r0, r7
-	mov	r4, r0
-	bne	.L1921
-	ldr	r3, .L2005+24
-	ldrh	r1, [r5, r8]
-	ldrh	r2, [r5, r3]
-	cmp	r1, r2
-	movcs	r2, #80
-	strcsh	r2, [r5, r3]	@ movhi
-	bcs	.L1931
-	mov	r0, #64
-	bl	List_get_gc_head_node
-	uxth	r3, r0
-	cmp	r3, r4
-	beq	.L1931
-	ldr	r2, [r5, #-1000]
+	bne	.L1912
+	ldr	r0, [r2, #12]
+	movw	ip, #65535
+	ldrh	lr, [r0, #0]
+	cmp	lr, ip
+	beq	.L1913
+	ldr	r0, [r0, #4]
+	cmn	r0, #1
+	beq	.L1913
+	cmn	fp, #1
+	ldr	r9, [r8, #-1008]
+	str	r0, [r8, #-1008]
+	bne	.L1913
+	ldr	lr, [sp, #8]
+	sub	r0, lr, #892
+	ldrh	r0, [r0, #0]
+	cmp	r0, ip
+	bne	.L1914
+	ldr	r0, [sp, #28]
+	cmp	r0, #0
+	beq	.L1913
+.L1914:
+	cmp	r9, r7
+	mvneq	fp, #0
+	movne	fp, r9
+	b	.L1913
+.L1912:
+	mov	r6, r7
+	ldrh	r1, [r4, #0]
+	mov	r7, r3
+	ldr	r3, .L1971+4
+	movw	r2, #294
+	strh	r1, [r3, r2]	@ movhi
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1924
-	ldr	r2, .L2005+12
-	movw	r1, #3868
-	ldrh	r1, [r2, r1]
-	cmp	r1, #3
+	bne	.L1905
+	add	r5, r3, r5, asl #1
+	movw	r2, #65535
+	sub	r5, r5, #892
+	ldrh	r1, [r5, #0]
+	cmp	r1, r2
+	bne	.L1915
+	cmn	fp, #1
+	bne	.L1964
+.L1916:
+	ldr	fp, [sp, #4]
+	cmp	fp, r6
+	beq	.L1917
+.L1964:
+	str	fp, [r3, #-1008]
+	b	.L1905
+.L1917:
+	ldr	r2, [r3, #-1008]
+	b	.L1970
+.L1915:
+	cmp	r9, r6
+	beq	.L1918
+	cmn	r9, #1
+	strne	r9, [r3, #-1008]
+	b	.L1905
+.L1918:
+	ldr	r2, [r3, #-1008]
+	cmp	r2, r6
+	beq	.L1905
+.L1970:
+	sub	r2, r2, #1
+	b	.L1965
+.L1913:
+	add	r1, r1, #1
+	add	r2, r2, #36
+	uxth	r1, r1
+.L1911:
+	cmp	r1, r6
+	bne	.L1919
+	add	r5, r5, #1
+	uxth	r5, r5
+.L1908:
+	cmp	r5, sl
+	bhi	.L1920
+	ldr	r1, .L1971
+	movw	r2, #3848
+	ldr	lr, [r8, #-972]
+	mov	r6, #0
+	str	r3, [sp, #28]
+	ldrh	ip, [r1, r2]
+	mov	r1, r4
+	str	lr, [sp, #8]
+	mov	r2, r6
+	str	ip, [sp, #36]
+	b	.L1921
+.L1920:
+	mov	r6, r7
+	mov	r7, r3
+	ldr	r3, .L1971+4
+	mvn	r2, #0
+.L1965:
+	str	r2, [r3, #-1008]
+.L1905:
+	ldr	r5, .L1971+4
+	mov	r3, #296
+	mov	r2, #1
+	sub	r0, r5, #1088
+	strh	r2, [r5, r3]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	r8, [sp, #12]
+	str	r7, [sp, #8]
+.L1922:
+	ldr	r3, .L1971
+	movw	r2, #3848
+	mov	r7, #0
+	ldr	lr, [r5, #-972]
+	mov	fp, #36
+	ldrh	sl, [r3, r2]
+	mov	r2, r4
+	ldrb	ip, [r3, #928]	@ zero_extendqisi2
+	mov	r3, r7
+	b	.L1923
+.L1926:
+	ldrh	r0, [r2, #16]
+	movw	r1, #65535
+	cmp	r0, r1
 	beq	.L1924
-	ldr	r1, [r5, #-1712]
-	cmp	r1, #0
-	bne	.L1924
-	ldr	r1, [r2, #3840]
-	cmp	r1, #0
-	bne	.L1924
-	ldrb	r0, [r2, #928]	@ zero_extendqisi2
-	cmp	r0, #0
-	beq	.L1925
+	mla	r1, fp, r7, lr
+	orr	r0, r8, r0, asl #10
+	str	r0, [r1, #4]
+	ldrb	r9, [r4, #8]	@ zero_extendqisi2
+	cmp	r9, #1
+	bne	.L1925
+	cmp	ip, #0
+	orrne	r0, r0, #-2147483648
+	strne	r0, [r1, #4]
+.L1925:
+	add	r7, r7, #1
+	uxth	r7, r7
 .L1924:
-	ldr	r1, .L2005
-	mov	r3, r3, asl #1
-	movw	ip, #3848
-	movw	lr, #3868
-	ldr	r2, [r1, #-2016]
-	ldrh	r0, [r2, r3]
-	movw	r2, #3918
-	ldr	r3, .L2005+12
-	ldrh	r2, [r3, r2]
-	ldrh	ip, [r3, ip]
-	ldrh	r3, [r3, lr]
-	mul	ip, ip, r2
-	cmp	r3, #3
-	moveq	r3, r2, lsr #1
+	add	r3, r3, #1
+	add	r2, r2, #2
+	uxth	r3, r3
+.L1923:
+	cmp	r3, sl
+	bne	.L1926
+	mov	r1, r7
+	ldr	r0, [r5, #-972]
+	ldr	r2, [sp, #20]
+	bl	FlashReadPages
+	mov	r3, #36
+	mul	r3, r3, r7
+	mov	r7, #0
+	str	r3, [sp, #36]
+	b	.L1927
+.L1948:
+	ldr	r9, [r5, #-972]
+	add	r9, r9, r7
+	ldr	sl, [r9, #4]
+	ubfx	r0, sl, #10, #16
+	str	sl, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	r8, r3
+	bcc	.L1928
+	ldr	fp, [sp, #24]
+	mov	ip, r3
+	cmp	r0, fp
+	movcs	r3, #0
+	movcc	r3, #1
+	cmp	r8, ip
 	movne	r3, #0
-	add	r3, ip, r3
+	cmp	r3, #0
+	bne	.L1928
+	ldr	r3, [sp, #16]
+	ldr	ip, [sp, #8]
 	cmp	r0, r3
-	bgt	.L1927
-	mov	r0, #0
-	bl	List_get_gc_head_node
-	ldr	r2, .L2005+12
-	ldr	r3, .L2005
-	ldr	r2, [r2, #3976]
-	ldr	r1, [r3, #-1844]
-	add	r2, r2, r2, asl #1
-	cmp	r1, r2, lsr #2
-	ldr	r2, .L2005+24
-	movhi	r1, #128
-	movls	r1, #160
-	strh	r1, [r3, r2]	@ movhi
-	uxth	r4, r0
-	b	.L1929
-.L1927:
-	ldr	r3, .L2005+24
-	mov	r2, #128
-	strh	r2, [r1, r3]	@ movhi
-	b	.L1931
-.L1925:
-	ldr	r2, [r5, #-2016]
-	mov	r3, r3, asl #1
-	ldr	r6, .L2005
-	ldr	r5, .L2005+24
-	ldrh	r3, [r2, r3]
-	cmp	r3, #7
-	movhi	r3, #64
-	strhih	r3, [r6, r5]	@ movhi
-	bhi	.L1931
-	bl	List_get_gc_head_node
-	mov	r3, #128
-	strh	r3, [r6, r5]	@ movhi
-	uxth	r4, r0
-.L1929:
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L1931
-.L1921:
-	ldr	r1, .L2005
-	mov	r0, r4, asl #1
-	ldr	r3, .L2005+20
-	ldr	ip, [r1, #-2080]
-	ldrh	r2, [r1, r3]
-	ldr	r3, [r1, #-2016]
-	ldrh	r3, [r3, r0]
-	ldrh	r0, [ip, r0]
-	str	r0, [sp, #0]
-	ldr	r0, .L2005+36
-	ldrh	r1, [r1, r0]
-	ldr	r0, .L2005+40
-	str	r1, [sp, #4]
-	mov	r1, r4
-	bl	printk
+	cmpeq	r8, ip
+	beq	.L1960
+	ldr	r3, [r9, #0]
+	cmn	r3, #1
+	beq	.L1930
+	ldr	sl, [r9, #12]
+	movw	r3, #61589
+	ldrh	r2, [sl, #0]
+	cmp	r2, r3
+	bne	.L1937
 .L1931:
-	bl	FtlGcReFreshBadBlk
-.L1919:
-	movw	r0, #65535
-	rsb	ip, r0, r4
-	rsbs	r1, ip, #0
-	ldr	r3, [sp, #16]
-	adc	r1, r1, ip
-	ldr	r5, .L2005
-	cmp	r3, #0
-	movne	r2, #0
-	andeq	r2, r1, #1
-	cmp	r2, #0
+	ldr	r6, [sl, #4]
+	cmn	r6, #1
 	beq	.L1932
-	ldr	r3, .L2005+20
-	ldrh	r2, [r5, r3]
-	cmp	r2, #24
-	movhi	r6, #1
-	bhi	.L1933
-	ldr	r1, .L2005+12
-	movw	r3, #3916
-	cmp	r2, #16
-	ldrh	r6, [r1, r3]
-	movhi	r6, r6, lsr #5
-	bhi	.L1933
-	cmp	r2, #12
-	movhi	r6, r6, lsr #4
-	bhi	.L1933
-	cmp	r2, #8
-	movhi	r6, r6, lsr #2
-.L1933:
-	ldr	r1, .L2005+36
-	ldr	r3, .L2005
-	ldrh	r0, [r5, r1]
-	cmp	r0, r2
-	mov	r0, r1
-	bcs	.L1937
-	ldr	r2, .L2005+44
-	movw	ip, #65535
-	ldrh	r2, [r3, r2]
-	cmp	r2, ip
-	bne	.L1938
-	ldr	ip, .L2005+8
-	ldrh	ip, [r3, ip]
-	cmp	ip, r2
-	bne	.L1938
-	mov	r2, #432
-	ldrh	r0, [r3, r2]
+	ldr	r1, [r5, #-1800]
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1939
-	ldr	r2, .L2005+12
-	ldr	ip, [r3, #-1844]
-	ldr	r2, [r2, #3976]
-	add	r2, r2, r2, asl #1
-	cmp	ip, r2, lsr #2
-	movcs	r2, #18
-	bcs	.L2003
-.L1939:
-	ldr	r3, .L2005
-	ldr	r2, .L2005+48
-	ldr	r1, .L2005+36
-	ldrh	r2, [r3, r2]
-	add	r2, r2, r2, asl #1
-	mov	r2, r2, asr #2
-.L2003:
-	strh	r2, [r3, r1]	@ movhi
+	addne	r3, r6, #1
+	strne	r3, [r5, #-1800]
+.L1932:
+	ldr	r9, [sl, #8]
+	add	r1, sp, #48
+	ldr	r3, [sl, #12]
+	mov	r2, #0
+	mov	r0, r9
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r1, [r5, #-1008]
+	cmn	r1, #1
+	beq	.L1933
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1933
+	ldr	r3, [sp, #44]
+	cmn	r3, #1
+	beq	.L1934
+	ldr	r0, [r5, #-972]
+	mov	r1, #1
 	mov	r2, #0
-	ldr	r3, .L2005
-	str	r2, [r3, #-1184]
-	b	.L1942
-.L1938:
-	ldr	r3, .L2005
-	ldr	r2, .L2005+48
-	ldrh	r2, [r3, r2]
-	add	r2, r2, r2, asl #1
-	mov	r2, r2, asr #2
-	strh	r2, [r3, r0]	@ movhi
+	add	r0, r0, r7
+	ldr	fp, [r0, #12]
+	str	r3, [r0, #4]
+	str	fp, [sp, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5, #-972]
+	ldr	ip, [fp, #4]
+	add	fp, r3, r7
+	ldr	r3, [r3, r7]
+	str	ip, [sp, #28]
+	cmn	r3, #1
+	bne	.L1935
+	b	.L1936
+.L1934:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L1937
+	mov	r0, r9
+	add	r1, sp, #44
+	mov	r2, #1
+	bl	log2phys
 .L1937:
-	ldr	r3, .L2005+12
-	cmp	sl, #2
-	movw	r4, #65535
-	movhi	sl, #0
-	movls	sl, #1
-	ldr	r3, [r3, #3840]
-	cmp	r3, #0
-	moveq	sl, #0
-	cmp	sl, #0
-	addne	r6, r6, #1
-	uxthne	r6, r6
+	ldrh	r0, [r4, #0]
+	b	.L1967
+.L1935:
+	ldr	r3, [sp, #4]
+	ldr	sl, [r3, #8]
+	cmp	sl, r9
+	bne	.L1936
+	ldr	r0, [r5, #-1008]
+	ldr	r1, [sp, #28]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1936
+	ldr	r3, [sp, #48]
+	ldr	r2, [sp, #52]
+	cmp	r3, r2
+	beq	.L1941
+.L1938:
+	ldr	r2, [sp, #44]
+	cmp	r3, r2
+	beq	.L1936
+	cmn	r3, #1
+	streq	r3, [fp, #0]
+	beq	.L1940
+	ldr	ip, [fp, #12]
+	mov	r0, fp
+	str	r3, [fp, #4]
+	mov	r1, #1
+	mov	r2, #0
+	str	ip, [sp, #4]
+	bl	FlashReadPages
+.L1940:
+	ldr	r3, [r5, #-972]
+	ldr	r3, [r3, r7]
+	cmn	r3, #1
+	beq	.L1941
+	ldr	r3, [sp, #4]
+	ldr	r0, [r5, #-1008]
+	ldr	r9, [r3, #4]
+	mov	r1, r9
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1941
+	ldr	r0, [sp, #28]
+	mov	r1, r9
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1936
+.L1941:
+	mov	r0, sl
+	ldr	r1, [sp, #44]
+	bl	FtlReUsePrevPpa
+.L1936:
+	ldrh	r0, [r4, #0]
+	mvn	r3, #0
+	str	r3, [sp, #44]
+	bl	decrement_vpc_count
 	b	.L1943
-.L1932:
-	ldr	r3, .L2005+44
+.L1933:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	beq	.L1943
+	mov	r0, r9
+	add	r1, sp, #52
+	mov	r2, #1
+	bl	log2phys
+	ldr	fp, [sp, #48]
+	cmn	fp, #1
+	beq	.L1943
+	ldr	r3, [sp, #44]
+	cmp	fp, r3
+	beq	.L1943
+	ubfx	r0, fp, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1971+12
 	ldrh	r3, [r5, r3]
 	cmp	r3, r0
-	bne	.L1944
-	ldr	r0, .L2005+8
-	ldrh	r0, [r5, r0]
-	cmp	r0, r3
-	movne	r1, #0
-	andeq	r1, r1, #1
-	cmp	r1, #0
 	beq	.L1944
-	ldr	r1, .L2005+16
-	ldrh	r4, [r5, r1]
-	cmp	r4, r3
-	movne	r4, r3
-	bne	.L1944
-	ldr	r3, .L2005+20
-	mov	r6, #432
-	str	r2, [r5, #-1184]
-	ldrh	r7, [r5, r3]
-	add	r3, r3, #804
-	ldrh	r2, [r5, r3]
-	cmp	r2, r7
-	bcs	.L1945
-	ldrh	r2, [r5, r6]
-	cmp	r2, #0
-	bne	.L1946
-	ldr	r2, .L2005+12
-	ldr	r1, [r5, #-1844]
-	ldr	r2, [r2, #3976]
-	add	r2, r2, r2, asl #1
-	cmp	r1, r2, lsr #2
-	movcs	r2, #18
-	strcsh	r2, [r5, r3]	@ movhi
-	bcs	.L1948
-.L1946:
-	ldr	r3, .L2005
-	ldr	r2, .L2005+48
-	ldr	r1, .L2005+36
-	ldrh	r2, [r3, r2]
-	add	r2, r2, r2, asl #1
-	mov	r2, r2, asr #2
-	strh	r2, [r3, r1]	@ movhi
-.L1948:
-	bl	FtlReadRefresh
-	mov	r3, #432
-	ldr	r2, .L2005
-	b	.L2004
-.L1945:
-	ldrh	r0, [r5, r6]
-	cmp	r0, #0
-	bne	.L1944
-	ldr	r2, .L2005+48
-	ldrh	r4, [r5, r2]
-	add	r2, r4, r4, asl #1
-	mov	r2, r2, asr #2
-	strh	r2, [r5, r3]	@ movhi
-	bl	List_get_gc_head_node
-	ldr	r3, [r5, #-2016]
-	ldr	r1, .L2005+12
-	movw	r2, #3918
-	ldrh	r2, [r1, r2]
-	uxth	r0, r0
-	mov	r0, r0, asl #1
-	ldrh	r3, [r3, r0]
-	movw	r0, #3848
-	ldrh	r1, [r1, r0]
-	mul	r2, r1, r2
-	add	r2, r2, r2, lsr #31
-	cmp	r3, r2, asr #1
-	ble	.L1949
-	sub	r4, r4, #1
-	cmp	r7, r4
-	blt	.L1949
-	bl	FtlReadRefresh
-	ldrh	r0, [r5, r6]
-	b	.L1942
-.L1949:
-	cmp	r3, #0
-	movwne	r4, #65535
-	bne	.L1944
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldr	r3, .L2005+20
-	ldr	r2, .L2005
-	ldrh	r0, [r2, r3]
-	add	r0, r0, #1
-	b	.L1942
+	ldr	r3, .L1971+16
+	ldrh	r3, [r5, r3]
+	cmp	r3, r0
+	beq	.L1944
+	ldr	r3, .L1971+20
+	ldrh	r3, [r5, r3]
+	cmp	r3, r0
+	bne	.L1943
 .L1944:
-	ldr	r3, .L2005+12
-	ldr	r6, [r3, #3840]
-	cmp	r6, #0
-	movne	r6, #2
-	moveq	r6, #1
-.L1943:
-	ldr	r3, .L2005
-	movw	r0, #65535
-	ldr	r2, .L2005+16
-	ldrh	r1, [r3, r2]
-	cmp	r1, r0
-	bne	.L1950
-	cmp	r4, r1
-	strneh	r4, [r3, r2]	@ movhi
-	bne	.L1952
-	ldr	r2, .L2005+8
-	ldrh	r1, [r3, r2]
-	cmp	r1, r4
-	beq	.L1952
-	ldr	r0, [r3, #-2016]
-	mov	r1, r1, asl #1
-	ldrh	r1, [r0, r1]
-	cmp	r1, #0
-	mvneq	r1, #0
-	streqh	r1, [r3, r2]	@ movhi
-	ldr	r3, .L2005
-	ldr	r1, .L2005+16
-	ldrh	r0, [r3, r2]
-	strh	r0, [r3, r1]	@ movhi
-	mvn	r1, #0
-	strh	r1, [r3, r2]	@ movhi
-.L1952:
-	ldr	r5, .L2005
-	mov	r3, #0
-	ldr	r7, .L2005+16
-	strb	r3, [r5, #-1752]
-	movw	r3, #65535
-	ldrh	r0, [r5, r7]
-	cmp	r0, r3
-	beq	.L1950
-	bl	IsBlkInGcList
-	cmp	r0, #0
-	mvnne	r3, #0
-	strneh	r3, [r5, r7]	@ movhi
-	ldr	r3, .L2005+12
-	ldr	r7, .L2005
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1955
-	ldr	r3, .L2005+16
-	ldrh	r0, [r7, r3]
-	bl	ftl_get_blk_mode
-	strb	r0, [r7, #-1752]
-.L1955:
-	ldr	r8, .L2005+16
-	movw	r3, #65535
-	ldr	r5, .L2005
-	ldrh	r2, [r7, r8]
-	cmp	r2, r3
-	beq	.L1950
-	add	r0, r5, r8
-	bl	make_superblock
-	ldr	r1, .L2005+52
-	movw	r2, #434
-	mov	r3, #0
-	strh	r3, [r5, r2]	@ movhi
-	strh	r3, [r5, r1]	@ movhi
-	strb	r3, [r5, #-1754]
-	ldrh	r3, [r5, r8]
-	ldr	r2, [r5, #-2016]
-	mov	r3, r3, asl #1
-	ldrh	r2, [r2, r3]
-	mov	r3, #436
-	strh	r2, [r5, r3]	@ movhi
-.L1950:
-	ldr	r3, .L2005
-	ldr	r2, .L2005+16
-	ldrh	r1, [r3, r2]
-	sub	r2, r2, #236
-	ldrh	r2, [r3, r2]
-	cmp	r2, r1
-	mov	r2, r3
-	beq	.L1956
-	ldr	r0, .L2005+56
-	ldrh	r3, [r3, r0]
-	cmp	r3, r1
-	movne	fp, r4
-	bne	.L2000
-.L1957:
-.L1956:
-	ldr	r3, .L2005+16
-	mvn	r1, #0
-	strh	r1, [r2, r3]	@ movhi
-	mov	r3, #432
-.L2004:
-	ldrh	r0, [r2, r3]
-	b	.L1942
-.L2000:
-	ldr	r4, .L2005
-	movw	sl, #65535
-	ldr	r3, .L2005+16
-	ldrh	r3, [r4, r3]
-	cmp	r3, sl
-	bne	.L1959
-	ldr	r5, .L2005+28
-	mov	r3, #0
-	str	r3, [r4, #-1184]
-.L1999:
-	ldrh	r8, [r4, r5]
-	mov	r0, r8
-	bl	List_get_gc_head_node
-	ldr	r3, .L2005+16
-	movw	r1, #65535
-	uxth	r7, r0
-	strh	r7, [r4, r3]	@ movhi
-	cmp	r7, r1
-	bne	.L1961
-	ldr	r2, .L2005
-	add	r3, r3, #572
-	mov	r1, #0
-	mov	r0, #8
-	strh	r1, [r2, r3]	@ movhi
-	b	.L1942
-.L1961:
-	mov	r0, r7
-	bl	IsBlkInGcList
+	ldr	ip, .L1971+4
+	mov	r1, #1
+	mov	r2, #0
+	ldr	r0, [ip, #-972]
+	str	fp, [r0, #4]
+	ldr	sl, [r0, #12]
+	bl	FlashReadPages
+	ldr	r0, .L1971+4
+	ldr	r1, [sl, #4]
+	ldr	r3, [r0, #-972]
+	ldr	r3, [r3, #0]
+	cmn	r3, #1
+	beq	.L1943
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	add	r0, r8, #1
-	strneh	r0, [r4, r5]	@ movhi
-	bne	.L1999
-	ldr	ip, .L2005+12
-	movw	r8, #3916
-	movw	sl, #3848
-	ldr	r2, [r4, #-2016]
-	mov	r3, r7, asl #1
-	uxth	r0, r0
-	ldrh	r8, [ip, r8]
-	ldrh	ip, [ip, sl]
-	strh	r0, [r4, r5]	@ movhi
-	ldrh	r1, [r2, r3]
-	mul	r8, ip, r8
-	add	ip, r8, r8, lsr #31
-	cmp	r1, ip, asr #1
-	bgt	.L1964
-	cmp	r0, #48
-	bls	.L1965
-	cmp	r1, #8
-	bls	.L1965
-	ldr	r1, .L2005+60
-	ldrh	r1, [r4, r1]
-	cmp	r1, #35
-	bhi	.L1965
-.L1964:
-	mov	r1, #0
-	strh	r1, [r4, r5]	@ movhi
-.L1965:
+	bne	.L1943
+	mov	r0, r9
+	add	r1, sp, #48
+	mov	r2, #1
+	bl	log2phys
+.L1943:
+	ldr	r0, [sp, #44]
+	cmn	r0, #1
+	beq	.L1928
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r2, [r5, #-2016]
+	mov	r3, r0, asl #1
+	mov	r1, r0
 	ldrh	r3, [r2, r3]
-	movw	r2, #65535
-	ldr	sl, .L2005
-	cmp	r3, r8
-	cmpge	fp, r2
-	movne	r8, #0
-	moveq	r8, #1
-	bne	.L1966
-	ldr	r3, .L2005+16
-	mvn	r2, #0
-	strh	r2, [sl, r3]	@ movhi
-	add	r3, r3, #572
-	mov	r2, #0
-	strh	r2, [sl, r3]	@ movhi
-	mov	r3, #432
-	ldrh	r0, [sl, r3]
-	b	.L1942
-.L1966:
 	cmp	r3, #0
-	bne	.L1967
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r3, [r4, r5]
-	add	r3, r3, #1
-	strh	r3, [r4, r5]	@ movhi
-	b	.L1999
+	beq	.L1945
 .L1967:
-	ldr	r3, .L2005+12
-	strb	r8, [sl, #-1752]
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1968
-	mov	r0, r7
-	bl	ftl_get_blk_mode
-	strb	r0, [sl, #-1752]
-.L1968:
-	ldr	r4, .L2005
-	sub	r0, r4, #1760
-	bl	make_superblock
-	movw	r1, #434
-	mov	r3, #0
-	strh	r3, [r4, r1]	@ movhi
-	ldr	r1, .L2005+16
-	ldr	r0, [r4, #-2016]
-	ldrh	r1, [r4, r1]
-	mov	r1, r1, asl #1
-	ldrh	r0, [r0, r1]
-	mov	r1, #436
-	strb	r3, [r4, #-1754]
-	strh	r0, [r4, r1]	@ movhi
-	ldr	r1, .L2005+52
-	strh	r3, [r4, r1]	@ movhi
-.L1959:
-	ldr	sl, [sp, #16]
-	cmp	sl, #1
-	bne	.L1969
-	bl	FtlReadRefresh
-.L1969:
-	ldr	r3, .L2005
-	mov	r2, #1
-	movw	r1, #3916
-	str	r2, [r3, #-996]
-	ldr	r2, .L2005+12
-	ldrh	r9, [r2, r1]
-	ldrb	r1, [r2, #928]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L1970
-	ldrb	r1, [r3, #-1752]	@ zero_extendqisi2
-	cmp	r1, #1
-	movweq	r1, #3918
-	ldreqh	r9, [r2, r1]
-.L1970:
-	ldr	r2, .L2005+52
-	mov	r8, #0
-	str	fp, [sp, #20]
-	mov	fp, r9
-	ldr	r4, .L2005
+	bl	decrement_vpc_count
+	b	.L1928
+.L1945:
+	ldr	r0, .L1971+24
+	bl	printk
+	b	.L1928
+.L1930:
+	ldrh	r3, [r4, #0]
+	movw	r1, #294
+	mov	r2, r6
+	ldr	r0, .L1971+28
+	strh	r3, [r5, r1]	@ movhi
+	mov	r1, sl
+	bl	printk
+	ldr	r3, [r5, #300]
+	cmp	r3, #31
+	addls	r2, r5, r3, asl #2
+	addls	r3, r3, #1
+	ldrls	r1, [sp, #52]
+	strls	r3, [r5, #300]
+	strls	r1, [r2, #304]
+	ldrh	r0, [r4, #0]
+	bl	decrement_vpc_count
+	ldr	r3, [r5, #-1008]
+	cmn	r3, #1
+	beq	.L1966
+.L1947:
+	cmp	r3, r6
+	bls	.L1928
+.L1966:
+	str	r6, [r5, #-1008]
+.L1928:
+	add	r7, r7, #36
+.L1927:
+	ldr	r3, [sp, #36]
+	cmp	r7, r3
+	bne	.L1948
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	add	r8, r8, #1
+	cmp	r3, #1
+	uxth	r8, r8
+	bne	.L1949
+	ldr	r3, .L1971
+	ldrb	r2, [r3, #928]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L1949
+	movw	r2, #3918
+	ldr	ip, [sp, #8]
 	ldrh	r3, [r3, r2]
-	add	r2, r3, r6
-	cmp	r2, r9
-	rsbgt	r6, r3, r9
-	uxthgt	r6, r6
-	b	.L1972
-.L1974:
-	ldrh	r1, [r2, #2]!
-	movw	sl, #65535
+	cmp	ip, r8
+	cmpeq	r3, r8
+	beq	.L1960
+.L1949:
+	ldr	r3, .L1971
+	movw	r2, #3916
+	ldrh	r2, [r3, r2]
+	cmp	r8, r2
+	bne	.L1922
+	mov	r2, #0
+	movw	r1, #3848
+	strh	r2, [r4, #4]	@ movhi
+	ldrh	r1, [r3, r1]
+	mov	r3, r2
+	strh	r8, [r4, #2]	@ movhi
+	movw	r2, #65535
+	ldr	r0, [sp, #32]
+	b	.L1950
+.L1952:
+	add	r0, r0, #2
+	ldrh	ip, [r0, #14]
+	cmp	ip, r2
+	strneb	r3, [r4, #6]
+	bne	.L1882
+.L1951:
 	add	r3, r3, #1
-	cmp	r1, sl
 	uxth	r3, r3
-	orrne	r1, ip, r1, asl #10
-	mlane	sl, r0, r7, lr
-	addne	r7, r7, #1
-	uxthne	r7, r7
-	strne	r1, [sl, #4]
-.L1980:
-	cmp	r3, r5
-	bne	.L1974
-	ldr	r0, [r4, #-1164]
-	mov	r1, r7
-	ldrb	r2, [r4, #-1752]	@ zero_extendqisi2
-	mov	r5, #0
-	bl	FlashReadPages
-	mov	r9, r5
-	mov	sl, r6
-	b	.L1975
-.L1978:
-	ldr	r3, [r4, #-1164]
-	add	r2, r3, r5
-	ldr	r3, [r3, r5]
-	ldr	r6, [r2, #12]
-	cmn	r3, #1
-	beq	.L1976
-	ldrh	r3, [r6, #0]
-	movw	r1, #61589
+.L1950:
 	cmp	r3, r1
-	bne	.L1976
-	add	r1, sp, #28
-	mov	r2, #0
-	ldr	r0, [r6, #8]
-	bl	log2phys
-	ldr	r1, [r4, #-1164]
-	ldr	r2, [sp, #28]
-	add	r1, r1, r5
-	bic	r2, r2, #-2147483648
-	ldr	r3, [r1, #4]
-	cmp	r2, r3
-	bne	.L1976
-	movw	r3, #434
-	ldr	r0, [r4, #-1180]
-	ldrh	r2, [r4, r3]
-	ldr	r1, [r1, #16]
-	add	r2, r2, #1
-	strh	r2, [r4, r3]	@ movhi
-	ldr	r2, [r4, #-968]
-	mov	r3, #36
-	mla	r2, r3, r0, r2
-	str	r1, [r2, #16]
-	str	r2, [sp, #8]
-	str	r3, [sp, #12]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r2, [sp, #8]
-	ldr	r1, [r4, #-1180]
-	str	r0, [r2, #4]
-	ldr	r3, [sp, #12]
-	ldr	r2, [r4, #-968]
-	mla	r3, r3, r1, r2
-	ldr	r2, [r4, #-1164]
-	add	r2, r2, r5
-	ldr	r1, [r2, #8]
-	str	r1, [r3, #8]
-	mov	r1, #1
-	ldr	r2, [r2, #12]
-	str	r2, [r3, #12]
-	ldr	r3, [sp, #28]
-	str	r3, [r6, #12]
-	ldr	r3, .L2005+44
-	ldrh	r3, [r4, r3]
-	strh	r3, [r6, #2]	@ movhi
-	ldr	r3, [r4, #-1800]
-	ldr	r0, [r4, #-1164]
-	str	r3, [r6, #4]
-	add	r0, r0, r5
-	ldr	r3, [r4, #-1180]
-	add	r3, r3, #1
-	str	r3, [r4, #-1180]
-	bl	FtlGcBufAlloc
-	ldr	r3, .L2005+12
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	bne	.L1952
+	b	.L1882
+.L1960:
+.L1929:
+	ldr	r7, [sp, #8]
+	ldr	r3, [sp, #16]
+	strh	r7, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+.L1969:
+	mov	r0, r4
+	mov	r1, r7
+	mov	r2, r3
+	bl	ftl_sb_update_avl_pages
+.L1882:
+	mov	r0, #0
+	add	sp, sp, #60
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L1972:
+	.align	2
+.L1971:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC144
+	.word	-1996
+	.word	-1948
+	.word	-1900
+	.word	.LC145
+	.word	.LC146
+	.fnend
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.align	2
+	.global	FtlWriteDumpData
+	.type	FtlWriteDumpData, %function
+FtlWriteDumpData:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
+	.save {r4, r5, r6, r7, r8, sl, lr}
+	.pad #44
+	sub	sp, sp, #44
+	ldr	r5, .L1982
+	ldr	r3, [r5, #4040]
 	cmp	r3, #0
-	bne	.L1977
-	ldrb	r3, [r4, #-1893]	@ zero_extendqisi2
-	ldr	r2, [r4, #-1180]
-	cmp	r2, r3
-	beq	.L1977
-	ldr	r3, .L2005+64
+	bne	.L1973
+	ldr	r4, .L1982+4
+	ldr	r3, .L1982+8
+	mov	r2, r4
 	ldrh	r3, [r4, r3]
 	cmp	r3, #0
-	bne	.L1976
-.L1977:
-	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	ldrne	r3, .L2005
-	movne	r2, #0
-	strne	r2, [r3, #-996]
-	movne	r2, #432
-	bne	.L2004
+	beq	.L1975
+	ldrb	r1, [r4, #-1988]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L1975
+	movw	r0, #3916
+	ldrb	r1, [r4, #-1989]	@ zero_extendqisi2
+	ldrh	r0, [r5, r0]
+	mul	r1, r0, r1
+	cmp	r3, r1
+	beq	.L1975
+	ldrb	r8, [r4, #-1986]	@ zero_extendqisi2
+	movw	r3, #3848
+	ldr	r7, [r5, #3976]
+	cmp	r8, #0
+	ldrh	r6, [r5, r3]
+	bne	.L1973
+	sub	r7, r7, #1
+	mov	r1, sp
+	mov	r2, r8
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	ldr	r0, [r4, #-960]
+	ldr	r4, [r4, #-936]
+	cmn	r3, #1
+	str	r3, [sp, #8]
+	str	r7, [sp, #20]
+	str	r0, [sp, #12]
+	str	r4, [sp, #16]
+	str	r8, [r4, #4]
+	beq	.L1976
+	add	r0, sp, #4
+	mov	r1, #1
+	mov	r2, r8
+	bl	FlashReadPages
+	b	.L1977
 .L1976:
-	add	r9, r9, #1
-	add	r5, r5, #36
-	uxth	r9, r9
-.L1975:
-	cmp	r9, r7
-	bne	.L1978
-	add	r8, r8, #1
-	mov	r6, sl
-.L1972:
-	uxth	r3, r8
-	ldr	r7, .L2005
-	cmp	r3, r6
-	ldr	r3, .L2005+52
-	bcs	.L1979
-	ldr	r1, .L2005+12
-	movw	r2, #3848
-	ldrh	ip, [r4, r3]
-	mov	r7, #0
-	ldr	lr, [r4, #-1164]
-	mov	r3, r7
-	ldrh	r5, [r1, r2]
-	add	ip, ip, r8
-	ldr	r2, .L2005+68
-	mov	r0, #36
-	b	.L1980
-.L1979:
-	ldrh	r2, [r7, r3]
-	mov	r9, fp
-	ldr	fp, [sp, #20]
-	add	r6, r6, r2
-	uxth	r6, r6
-	strh	r6, [r7, r3]	@ movhi
-	cmp	r6, r9
-	bcc	.L1981
-	ldr	r3, [r7, #-1180]
+	movw	r3, #3926
+	mov	r1, #255
+	ldrh	r2, [r5, r3]
+	bl	ftl_memset
+.L1977:
+	ldr	r3, .L1982+12
+	mov	r6, r6, asl #2
+	ldr	r5, .L1982+4
+	ldr	sl, .L1982+8
+	strh	r3, [r4, #0]	@ movhi
+	ldr	r8, .L1982+16
+	b	.L1978
+.L1981:
+	ldrh	r3, [r5, sl]
 	cmp	r3, #0
-	beq	.L1982
-	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	movne	r3, #0
-	strne	r3, [r7, #-996]
-	movne	r3, #432
-	ldrneh	r0, [r7, r3]
-	bne	.L1942
-.L1982:
-	ldr	r3, .L2005
-	movw	r2, #434
-	ldrh	ip, [r3, r2]
-	cmp	ip, #0
-	bne	.L1983
-	ldr	r2, .L2005+16
-	ldr	r0, [r3, #-2016]
-	ldrh	r1, [r3, r2]
-	mov	r1, r1, asl #1
-	ldrh	r4, [r0, r1]
-	cmp	r4, #0
-	beq	.L1983
-	strh	ip, [r0, r1]	@ movhi
-	ldrh	r0, [r3, r2]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
+	beq	.L1979
+	ldr	r3, [sp, #8]
+	sub	r6, r6, #1
+	str	r7, [r4, #8]
+	ldr	r0, .L1982+20
+	str	r3, [r4, #12]
+	ldrh	r3, [r5, r8]
+	strh	r3, [r4, #2]	@ movhi
+	bl	get_new_active_ppa
+	ldr	r3, [r5, #-1800]
+	mov	r2, #0
+	mov	r1, #1
+	str	r0, [sp, #8]
+	add	r0, sp, #4
+	str	r3, [r4, #4]
+	add	r3, r3, #1
+	cmn	r3, #1
+	str	r3, [r5, #-1800]
+	moveq	r3, #0
+	streq	r3, [r5, #-1800]
+	mov	r3, r2
+	bl	FlashProgPages
+	ldrh	r0, [r5, r8]
+	bl	decrement_vpc_count
+.L1978:
+	cmp	r6, #0
+	bne	.L1981
+.L1979:
+	ldr	r3, .L1982+4
+	mov	r2, #1
+	strb	r2, [r3, #-1986]
+	b	.L1973
+.L1975:
+	mov	r3, #0
+	strb	r3, [r2, #-1986]
+.L1973:
+	add	sp, sp, #44
+	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
 .L1983:
-	ldr	r3, .L2005+16
-	mvn	r1, #0
-	ldr	r2, .L2005
-	strh	r1, [r2, r3]	@ movhi
-.L1981:
-	ldr	r3, .L2005
-	ldr	r2, .L2005+20
-	ldrh	r2, [r3, r2]
-	cmp	r2, #2
-	ldrls	r2, .L2005+12
-	movwls	r3, #3916
-	ldrlsh	r6, [r2, r3]
-	bls	.L2000
-.L1984:
-	mov	r1, #0
-	str	r1, [r3, #-996]
-	mov	r1, #432
-	ldrh	r0, [r3, r1]
-	cmp	r0, #0
-	addeq	r0, r2, #1
-.L1942:
-	add	sp, sp, #36
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2006:
 	.align	2
-.L2005:
+.L1982:
+	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	-1140
-	.word	-1142
+	.word	-1992
+	.word	-3947
+	.word	-1996
+	.word	.LANCHOR2-1996
+	.fnend
+	.size	FtlWriteDumpData, .-FtlWriteDumpData
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+	bl	FtlWriteDumpData
+	mov	r4, #0
+	ldr	r7, .L1988
+	movw	r6, #3954
+	ldr	r5, .L1988+4
+	b	.L1985
+.L1987:
+	ldr	r3, [r5, #-1852]
+	mov	r2, #12
+	mla	r3, r2, r4, r3
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1986
+	mov	r0, r4
+	bl	flush_l2p_region
+.L1986:
+	add	r4, r4, #1
+	uxth	r4, r4
+.L1985:
+	ldrh	r3, [r7, r6]
+	cmp	r3, r4
+	bhi	.L1987
+	mov	r0, #0
+	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
+.L1989:
+	.align	2
+.L1988:
 	.word	.LANCHOR0
-	.word	-1760
-	.word	-2000
-	.word	-1194
-	.word	-1188
-	.word	.LC130
-	.word	-1196
-	.word	.LC131
-	.word	-1900
-	.word	-1776
-	.word	-1758
-	.word	-1948
-	.word	-1156
-	.word	-1896
-	.word	.LANCHOR2-1746
+	.word	.LANCHOR2
 	.fnend
-	.size	ftl_do_gc.part.21, .-ftl_do_gc.part.21
+	.size	l2p_flush, .-l2p_flush
 	.align	2
-	.global	ftl_do_gc
-	.type	ftl_do_gc, %function
-ftl_do_gc:
+	.global	allocate_new_data_superblock
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
+	ldr	r3, .L2002
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 	mov	r4, r0
-	ldr	r3, .L2014
-	mov	r5, r1
-	ldr	r0, [r3, #-2088]
-	cmp	r0, #0
-	movne	r0, #0
-	ldmnefd	sp!, {r3, r4, r5, pc}
-	ldr	r2, [r3, #-996]
-	cmp	r2, #0
-	ldmnefd	sp!, {r3, r4, r5, pc}
-	ldr	r1, .L2014+4
-	ldrh	r1, [r3, r1]
-	cmp	r1, #47
-	movls	r0, r2
-	ldmlsfd	sp!, {r3, r4, r5, pc}
-	ldr	r1, .L2014+8
-	movw	r2, #3000
-	ldrh	r1, [r1, r2]
-	movw	r2, #65535
-	cmp	r1, r2
-	beq	.L2009
-	ldr	r1, .L2014+12
-	ldrh	r3, [r3, r1]
-	cmp	r3, r2
-	beq	.L2009
-	mov	r0, #1
-	bl	FtlGcFreeTempBlock
-	cmp	r0, #0
-	bne	.L2013
-.L2009:
+	ldr	r3, [r3, #4040]
+	ldrh	r5, [r0, #0]
+	cmp	r3, #0
+	bne	.L1991
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L1992
+	ldr	r3, .L2002+4
+	mov	r0, r5
+	ldr	r2, [r3, #-2016]
+	mov	r3, r5, asl #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L1993
+	bl	INSERT_DATA_LIST
+	b	.L1992
+.L1993:
+	bl	INSERT_FREE_LIST
+.L1992:
+	mov	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2002+8
+	cmp	r4, r3
+	beq	.L1994
+	ldr	r2, .L2002
+	movw	r3, #3868
+	ldrh	r3, [r2, r3]
+	cmp	r3, #1
+	beq	.L1994
+	ldrb	r2, [r2, #928]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L1995
+.L1994:
+	mov	r3, #1
+	strb	r3, [r4, #8]
+	b	.L1996
+.L1995:
+	ldr	r2, .L2002+12
+	cmp	r4, r2
+	bne	.L1996
+	cmp	r3, #3
+	ldr	r3, .L2002+4
+	beq	.L1997
+	ldr	r2, [r3, #-1712]
+	cmp	r2, #1
+	bne	.L1998
+.L1997:
+	mov	r2, #1
+	strb	r2, [r3, #-1988]
+.L1998:
+	ldr	r2, .L2002
+	ldr	r2, [r2, #3840]
+	cmp	r2, #0
+	beq	.L1996
+	ldr	r3, [r3, #-1780]
+	cmp	r3, #29
+	ldrls	r3, .L2002+4
+	movls	r2, #1
+	strlsb	r2, [r3, #-1988]
+.L1996:
+	ldr	r3, .L2002+16
+	ldr	r6, .L2002+4
+	ldrh	r0, [r6, r3]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1999
+	cmp	r5, r0
+	bne	.L2000
+	ldr	r2, [r6, #-2016]
+	mov	r3, r0, asl #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L2001
+.L2000:
+	bl	update_vpc_list
+.L2001:
+	ldr	r3, .L2002+16
+	mvn	r2, #0
+	strh	r2, [r6, r3]	@ movhi
+.L1999:
 	mov	r0, r4
-	mov	r1, r5
-	ldmfd	sp!, {r3, r4, r5, lr}
-	b	ftl_do_gc.part.21
-.L2013:
-	mov	r0, #1
-	ldmfd	sp!, {r3, r4, r5, pc}
-.L2015:
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	mov	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1991:
+	mov	r0, #0
+	ldmfd	sp!, {r4, r5, r6, pc}
+.L2003:
 	.align	2
-.L2014:
+.L2002:
+	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	-2008
-	.word	.LANCHOR1
-	.word	-1900
+	.word	.LANCHOR2-1948
+	.word	.LANCHOR2-1996
+	.word	-1020
 	.fnend
-	.size	ftl_do_gc, .-ftl_do_gc
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
+	.global	FtlVpcCheckAndModify
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2038
-	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
-	.save {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
-	ldr	r4, [r3, #440]
-	ldr	r3, [r3, #-2088]
-	cmp	r3, #0
-	bne	.L2017
-	ldr	r3, .L2038+4
-	ldr	r1, [r3, #3968]
-	cmp	r1, #0
-	beq	.L2017
-	ldrb	r8, [r3, #928]	@ zero_extendqisi2
-	cmp	r8, #0
-	beq	.L2018
-	ldrb	r8, [r4, #8]	@ zero_extendqisi2
-	sub	lr, r8, #1
-	rsbs	r8, lr, #0
-	adc	r8, r8, lr
-.L2018:
-	ldr	r0, [r3, #3972]
-	mov	r2, r8
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r5, #0
-	bl	FlashProgPages
-	mov	r7, r5
-	ldr	r6, .L2038+4
-	ldr	r9, .L2038
-	b	.L2019
-.L2024:
-	ldr	r2, [r6, #3972]
-	add	r3, r2, r5
-	ldr	r2, [r2, r5]
-	cmn	r2, #1
-	beq	.L2037
-	ldr	r2, [r3, #4]
-	cmp	r8, #0
-	ldr	r0, [r3, #16]
-	add	r1, sp, #4
-	str	r2, [sp, #4]
-	orrne	r2, r2, #-2147483648
-	strne	r2, [sp, #4]
-	mov	r2, #1
-	bl	log2phys
-	ldr	r3, [r6, #3972]
-	add	r3, r3, r5
-	ldr	r3, [r3, #12]
-	ldr	r0, [r3, #12]
-	cmn	r0, #1
-	beq	.L2022
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r2, [r9, #-2016]
-	mov	r3, r0, asl #1
-	mov	sl, r0
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	bne	.L2023
-	ldr	r0, .L2038+8
-	mov	r1, sl
+	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
+	.save {r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r4, #0
+	ldr	r6, .L2011
+	ldr	r1, .L2011+4
+	ldr	r0, .L2011+8
 	bl	printk
-.L2023:
-	mov	r0, sl
-	bl	decrement_vpc_count
-.L2022:
-	add	r7, r7, #1
-	add	r5, r5, #36
-.L2019:
-	ldr	r3, [r6, #3968]
-	cmp	r7, r3
-	bcc	.L2024
-	b	.L2025
-.L2033:
-	ldr	r3, [r6, #3972]
-	mvn	r2, #0
-	movw	sl, #3916
-	str	r2, [r3, r5]
-	b	.L2026
-.L2029:
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #0]
-	cmp	r3, r0
-	bne	.L2027
-	ldr	r2, [r7, #-2016]
-	mov	r3, r3, asl #1
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r2, r3]
-	rsb	r1, r1, r0
-	strh	r1, [r2, r3]	@ movhi
-	ldrh	r3, [r6, sl]
-	strh	r3, [r4, #2]	@ movhi
-	mov	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-.L2027:
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L2028
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L2028:
-	ldr	r3, [r7, #-1612]
-	add	r3, r3, #1
-	str	r3, [r7, #-1612]
-	ldr	r3, [r6, #3972]
-	add	r3, r3, r5
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
+	movw	r3, #3858
+	ldrh	r2, [r6, r3]
+	mov	r1, #0
+	ldr	r5, .L2011+12
+	mov	r2, r2, asl #1
+	ldr	r0, [r5, #-916]
+	bl	ftl_memset
+	b	.L2005
+.L2007:
 	mov	r0, r4
-	bl	get_new_active_ppa
-	mov	r1, #1
-	mov	r2, r8
-	mov	r3, r0
-	str	r0, [sp, #4]
-	ldr	r0, [r6, #3972]
-	add	r0, r0, r5
-	str	r3, [r0, #4]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	ldr	r3, [r7, #-2088]
-	cmp	r3, #0
-	bne	.L2017
-.L2026:
-	ldr	r2, [r6, #3972]
-	add	r3, r2, r5
-	ldr	r2, [r2, r5]
-	cmn	r2, #1
-	beq	.L2029
-	ldr	r2, [r3, #4]
-	cmp	r8, #0
-	ldr	r0, [r3, #16]
 	add	r1, sp, #4
-	str	r2, [sp, #4]
-	orrne	r2, r2, #-2147483648
-	strne	r2, [sp, #4]
-	mov	r2, #1
+	mov	r2, #0
 	bl	log2phys
-	ldr	r3, [r6, #3972]
-	add	r3, r3, r5
-	ldr	r3, [r3, #12]
-	ldr	r0, [r3, #12]
+	ldr	r0, [sp, #4]
 	cmn	r0, #1
-	beq	.L2031
+	beq	.L2006
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, [r7, #-2016]
-	mov	r3, r0, asl #1
-	mov	sl, r0
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	bne	.L2032
-	ldr	r0, .L2038+8
-	mov	r1, sl
+	ldr	r3, [r5, #-916]
+	mov	r0, r0, asl #1
+	ldrh	r2, [r3, r0]
+	add	r2, r2, #1
+	strh	r2, [r3, r0]	@ movhi
+.L2006:
+	add	r4, r4, #1
+.L2005:
+	ldr	r3, [r6, #3976]
+	cmp	r4, r3
+	bcc	.L2007
+	mov	r4, #0
+	ldr	r7, .L2011
+	ldr	r5, .L2011+12
+	movw	r8, #65535
+	b	.L2008
+.L2010:
+	ldr	r3, [r5, #-2016]
+	mov	r6, r4, asl #1
+	ldrh	r2, [r3, r6]
+	ldr	r3, [r5, #-916]
+	ldrh	r3, [r3, r6]
+	cmp	r2, r3
+	beq	.L2009
+	cmp	r2, r8
+	beq	.L2009
+	ldr	r0, .L2011+16
+	mov	r1, r4
 	bl	printk
-.L2032:
-	mov	r0, sl
-	bl	decrement_vpc_count
-.L2031:
-	add	r9, r9, #1
-	add	r5, r5, #36
-	b	.L2020
-.L2037:
-	ldr	r6, .L2038+4
-	mov	r5, #0
-	ldr	r7, .L2038
-	mov	r9, r5
-.L2020:
-	ldr	r3, [r6, #3968]
-	cmp	r9, r3
-	bcc	.L2033
-	movw	r4, #16386
-	ldr	r6, .L2038
-	ldr	r5, .L2038+12
-	b	.L2034
-.L2035:
-	mov	r0, #1
-	mov	r1, r0
-	bl	ftl_do_gc
-	subs	r4, r4, #1
-	beq	.L2025
-.L2034:
-	ldrh	r3, [r6, r5]
-	cmp	r3, #0
-	bne	.L2035
-.L2025:
-	ldr	r3, .L2038+4
-	mov	r2, #0
-	str	r2, [r3, #3968]
-.L2017:
-	mov	r0, #0
-	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, pc}
-.L2039:
+	ldr	r3, .L2011+20
+	ldrh	r3, [r5, r3]
+	cmp	r3, r4
+	beq	.L2009
+	ldr	r3, .L2011+24
+	ldrh	r3, [r5, r3]
+	cmp	r3, r4
+	beq	.L2009
+	ldr	r3, .L2011+28
+	ldrh	r3, [r5, r3]
+	cmp	r3, r4
+	beq	.L2009
+	ldr	r3, [r5, #-916]
+	mov	r0, r4
+	ldrh	r2, [r3, r6]
+	ldr	r3, [r5, #-2016]
+	strh	r2, [r3, r6]	@ movhi
+	bl	update_vpc_list
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2009:
+	add	r4, r4, #1
+	uxth	r4, r4
+.L2008:
+	mov	r3, #3856
+	ldrh	r3, [r7, r3]
+	cmp	r3, r4
+	bhi	.L2010
+	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, pc}
+.L2012:
 	.align	2
-.L2038:
-	.word	.LANCHOR2
+.L2011:
 	.word	.LANCHOR0
-	.word	.LC132
-	.word	-1138
+	.word	.LANCHOR3+48
+	.word	.LC101
+	.word	.LANCHOR2
+	.word	.LC147
+	.word	-1996
+	.word	-1900
+	.word	-1948
 	.fnend
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
@@ -17769,54 +17742,54 @@ FtlGcFreeTempBlock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2036
 	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
 	.save {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
-	movw	r3, #3916
-	ldr	r2, .L2063
-	ldrh	r1, [r2, r3]
-	ldr	r3, .L2063+4
-	ldr	r2, [r3, #-2088]
+	movw	r2, #3916
+	ldrh	r1, [r3, r2]
+	ldr	r2, [r3, #4040]
 	cmp	r2, #0
-	bne	.L2061
-	ldr	ip, .L2063+8
+	bne	.L2034
+	ldr	ip, .L2036+4
+	ldr	r3, .L2036+8
 	ldrh	r4, [r3, ip]
 	movw	ip, #65535
 	cmp	r4, ip
-	beq	.L2042
+	beq	.L2015
 	cmp	r0, #0
-	beq	.L2043
-	ldr	lr, .L2063+12
+	beq	.L2016
+	ldr	lr, .L2036+12
 	movw	r0, #3000
 	ldrh	r5, [lr, r0]
 	cmp	r5, ip
 	movne	r1, #2
-	bne	.L2043
+	bne	.L2016
 	strh	r2, [lr, r0]	@ movhi
 	sub	r2, r2, #2000
 	ldrh	r3, [r3, r2]
 	cmp	r3, #17
 	movhi	r1, #2
-.L2043:
-	ldr	r0, .L2063+16
+.L2016:
+	ldr	r0, .L2036+16
 	bl	FtlGcScanTempBlk
 	cmn	r0, #1
 	str	r0, [sp, #4]
-	beq	.L2044
-	ldr	r3, .L2063+4
+	beq	.L2017
+	ldr	r3, .L2036
 	mov	r4, r4, asl #1
-	ldr	r3, [r3, #-2080]
+	ldr	r3, [r3, #4048]
 	ldrh	r2, [r3, r4]
 	cmp	r2, #4
-	bls	.L2045
+	bls	.L2018
 	sub	r2, r2, #5
 	mov	r0, #1
 	strh	r2, [r3, r4]	@ movhi
 	bl	FtlEctTblFlush
-.L2045:
-	ldr	r3, .L2063+4
+.L2018:
+	ldr	r3, .L2036+8
 	ldr	r2, [r3, #-1012]
 	cmp	r2, #0
-	bne	.L2046
+	bne	.L2019
 	ldr	r2, [r3, #-1612]
 	ldr	r0, [sp, #4]
 	add	r2, r2, #1
@@ -17824,36 +17797,36 @@ FtlGcFreeTempBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2046:
-	ldr	r3, .L2063+4
+.L2019:
+	ldr	r3, .L2036+8
 	mov	r2, #0
 	str	r2, [r3, #-1012]
-	b	.L2059
-.L2044:
-	ldr	r2, .L2063+12
+	b	.L2032
+.L2017:
+	ldr	r2, .L2036+12
 	movw	r3, #3000
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2059
-.L2042:
-	ldr	r6, .L2063+4
+	bne	.L2032
+.L2015:
+	ldr	r6, .L2036+8
 	movw	r3, #65535
-	ldr	r5, .L2063+8
+	ldr	r5, .L2036+4
 	mov	r4, #0
 	str	r4, [r6, #-1012]
 	ldrh	r2, [r6, r5]
 	cmp	r2, r3
 	moveq	r0, r4
-	beq	.L2041
+	beq	.L2014
 	bl	FtlCacheWriteBack
-	ldr	ip, .L2063
+	ldr	ip, .L2036
 	movw	r0, #3916
 	ldrb	r1, [r6, #-1893]	@ zero_extendqisi2
 	ldrh	r3, [r6, r5]
 	ldrh	r0, [ip, r0]
 	ldr	r2, [r6, #-2016]
-	ldr	sl, .L2063+20
+	ldr	sl, .L2036+20
 	mov	r3, r3, asl #1
 	mul	r1, r0, r1
 	strh	r1, [r2, r3]	@ movhi
@@ -17861,8 +17834,8 @@ FtlGcFreeTempBlock:
 	ldrh	r2, [r6, sl]
 	add	r3, r2, r3
 	str	r3, [r6, #-1816]
-	b	.L2047
-.L2050:
+	b	.L2020
+.L2023:
 	mov	r7, #12
 	ldr	r8, [r6, #-1148]
 	mul	r7, r7, r4
@@ -17874,7 +17847,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [sp, #4]
 	ldr	r3, [r8, r7]
 	cmp	r0, r3
-	bne	.L2048
+	bne	.L2021
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	add	r1, r5, #4
@@ -17883,116 +17856,116 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r5, #8]
 	bl	log2phys
 	mov	r0, r7
-	b	.L2062
-.L2048:
+	b	.L2035
+.L2021:
 	ldr	r3, [r5, #4]
 	cmp	r0, r3
-	beq	.L2049
-	ldr	r3, .L2063+8
+	beq	.L2022
+	ldr	r3, .L2036+4
 	ldrh	r0, [r6, r3]
-.L2062:
+.L2035:
 	bl	decrement_vpc_count
-.L2049:
+.L2022:
 	add	r4, r4, #1
 	uxth	r4, r4
-.L2047:
+.L2020:
 	ldrh	r3, [r6, sl]
-	ldr	r5, .L2063+4
+	ldr	r5, .L2036+8
 	cmp	r3, r4
-	bhi	.L2050
+	bhi	.L2023
 	movw	r0, #65535
-	ldr	r4, .L2063+8
+	ldr	r4, .L2036+4
 	bl	decrement_vpc_count
-	ldr	r3, .L2063
+	ldr	r3, .L2036
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2051
-	ldr	r0, .L2063+24
+	beq	.L2024
+	ldr	r0, .L2036+24
 	ldrh	r1, [r5, r4]
 	bl	printk
-.L2051:
+.L2024:
 	ldrh	r0, [r5, r4]
 	ldr	r2, [r5, #-2016]
 	mov	r3, r0, asl #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L2052
+	beq	.L2025
 	bl	INSERT_DATA_LIST
-	b	.L2053
-.L2052:
+	b	.L2026
+.L2025:
 	bl	INSERT_FREE_LIST
-.L2053:
-	ldr	r4, .L2063+4
+.L2026:
+	ldr	r4, .L2036+8
 	mvn	r2, #0
-	ldr	r3, .L2063+8
+	ldr	r3, .L2036+4
 	strh	r2, [r4, r3]	@ movhi
 	mov	r3, #0
-	ldr	r2, .L2063+20
+	ldr	r2, .L2036+20
 	strh	r3, [r4, r2]	@ movhi
 	sub	r2, r2, #12
 	strh	r3, [r4, r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2063
+	ldr	r3, .L2036
 	mov	r1, r4
 	ldr	r3, [r3, #3840]
 	cmp	r3, #0
-	beq	.L2054
+	beq	.L2027
 	ldr	r3, [r4, #-1780]
 	cmp	r3, #29
-	bhi	.L2054
-	ldr	r3, .L2063+28
+	bhi	.L2027
+	ldr	r3, .L2036+28
 	mvn	r1, #0
-	ldr	r2, .L2063+32
+	ldr	r2, .L2036+32
 	ldrh	r3, [r4, r3]
 	ldrh	r2, [r4, r2]
 	cmp	r2, r3
 	movcc	r3, r3, asl #1
-	ldrcc	r2, .L2063+36
+	ldrcc	r2, .L2036+36
 	strcch	r3, [r4, r2]	@ movhi
-	ldr	r3, .L2063+40
-	ldr	r2, .L2063+4
+	ldr	r3, .L2036+40
+	ldr	r2, .L2036+8
 	strh	r1, [r2, r3]	@ movhi
-	b	.L2061
-.L2054:
-	ldr	r2, .L2063+28
-	ldr	r0, .L2063+32
-	ldr	r3, .L2063+4
+	b	.L2034
+.L2027:
+	ldr	r2, .L2036+28
+	ldr	r0, .L2036+32
+	ldr	r3, .L2036+8
 	ldrh	r2, [r1, r2]
 	ldrh	r1, [r1, r0]
 	add	r0, r2, r2, asl #1
 	cmp	r1, r0, lsr #2
-	ble	.L2061
-	ldr	r1, .L2063+40
+	ble	.L2034
+	ldr	r1, .L2036+40
 	mvn	r0, #0
 	strh	r0, [r3, r1]	@ movhi
-	ldr	r1, .L2063
+	ldr	r1, .L2036
 	ldrb	r0, [r1, #928]	@ zero_extendqisi2
-	ldr	r1, .L2063+36
+	ldr	r1, .L2036+36
 	cmp	r0, #0
 	subne	r2, r2, #2
 	moveq	r2, #20
 	strneh	r2, [r3, r1]	@ movhi
 	streqh	r2, [r3, r1]	@ movhi
-	beq	.L2041
-	b	.L2061
-.L2059:
+	beq	.L2014
+	b	.L2034
+.L2032:
 	mov	r0, #1
-	b	.L2041
-.L2061:
+	b	.L2014
+.L2034:
 	mov	r0, #0
-.L2041:
+.L2014:
 	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, sl, pc}
-.L2064:
+.L2037:
 	.align	2
-.L2063:
+.L2036:
 	.word	.LANCHOR0
-	.word	.LANCHOR2
 	.word	-1900
+	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR2-1900
 	.word	-1144
-	.word	.LC133
+	.word	.LC148
 	.word	-1776
 	.word	-2000
 	.word	-1196
@@ -18000,44 +17973,30 @@ FtlGcFreeTempBlock:
 	.fnend
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
-	.global	Ftl_gc_temp_data_write_back
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
+	.type	Ftl_gc_temp_data_write_back.part.22, %function
+Ftl_gc_temp_data_write_back.part.22:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2074
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	ldr	r3, .L2074+4
-	beq	.L2066
-	ldr	r2, [r3, #-1180]
-	tst	r2, #1
-	beq	.L2066
-	ldr	r2, .L2074+8
-	ldrh	r2, [r3, r2]
-	cmp	r2, #0
-	bne	.L2071
-.L2066:
 	mov	r2, #0
-	ldr	r0, [r3, #-968]
-	ldr	r1, [r3, #-1180]
+	ldr	r4, .L2044
 	mov	r3, r2
-	bl	FlashProgPages
-	mov	r4, #0
-	ldr	r5, .L2074+4
+	mov	r5, #0
 	mov	r6, #36
-	b	.L2068
-.L2070:
-	mul	r3, r6, r4
-	ldr	r1, [r5, #-968]
+	ldr	r0, [r4, #-968]
+	ldr	r1, [r4, #-1180]
+	bl	FlashProgPages
+	b	.L2039
+.L2042:
+	mul	r3, r6, r5
+	ldr	r1, [r4, #-968]
 	add	r2, r1, r3
 	ldr	r1, [r1, r3]
 	cmn	r1, #1
-	bne	.L2069
-	ldr	r2, .L2074+12
+	bne	.L2040
+	ldr	r2, .L2044+4
 	mov	lr, #0
 	ldr	ip, [r7, #-2016]
 	ldrh	r0, [r7, r2]
@@ -18054,23 +18013,24 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-	b	.L2073
-.L2069:
+	mov	r0, #1
+	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
+.L2040:
 	ldr	r3, [r2, #12]
-	add	r4, r4, #1
+	add	r5, r5, #1
 	ldr	r1, [r2, #4]
-	uxth	r4, r4
+	uxth	r5, r5
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-.L2068:
-	ldr	r1, [r5, #-1180]
-	ldr	r7, .L2074+4
-	cmp	r4, r1
-	bcc	.L2070
+.L2039:
+	ldr	r1, [r4, #-1180]
+	ldr	r7, .L2044
+	cmp	r5, r1
+	bcc	.L2042
 	ldr	r0, [r7, #-968]
 	bl	FtlGcBufFree
-	ldr	r3, .L2074+8
+	ldr	r3, .L2044+8
 	mov	r0, #0
 	str	r0, [r7, #-1180]
 	ldrh	r3, [r7, r3]
@@ -18078,19 +18038,50 @@ Ftl_gc_temp_data_write_back:
 	ldmnefd	sp!, {r3, r4, r5, r6, r7, pc}
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-.L2073:
 	mov	r0, #1
 	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L2071:
+.L2045:
+	.align	2
+.L2044:
+	.word	.LANCHOR2
+	.word	-1900
+	.word	-1896
+	.fnend
+	.size	Ftl_gc_temp_data_write_back.part.22, .-Ftl_gc_temp_data_write_back.part.22
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L2051
+	ldr	r2, [r3, #4040]
+	cmp	r2, #0
+	bne	.L2047
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2048
+	ldr	r3, .L2051+4
+	ldr	r2, [r3, #-1180]
+	tst	r2, #1
+	beq	.L2048
+	ldr	r2, .L2051+8
+	ldrh	r3, [r3, r2]
+	cmp	r3, #0
+	bne	.L2047
+.L2048:
+	b	Ftl_gc_temp_data_write_back.part.22
+.L2047:
 	mov	r0, #0
-	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
-.L2075:
+	bx	lr
+.L2052:
 	.align	2
-.L2074:
+.L2051:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	-1896
-	.word	-1900
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
@@ -18103,12 +18094,12 @@ FtlGcPageRecovery:
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movw	r5, #3916
-	ldr	r6, .L2078
-	ldr	r0, .L2078+4
-	ldr	r4, .L2078+8
+	ldr	r6, .L2055
+	ldr	r0, .L2055+4
+	ldr	r4, .L2055+8
 	ldrh	r1, [r6, r5]
 	bl	FtlGcScanTempBlk
-	ldr	r3, .L2078+12
+	ldr	r3, .L2055+12
 	ldrh	r2, [r4, r3]
 	ldrh	r3, [r6, r5]
 	cmp	r2, r3
@@ -18120,9 +18111,9 @@ FtlGcPageRecovery:
 	mov	r3, #0
 	str	r3, [r4, #-1012]
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2079:
+.L2056:
 	.align	2
-.L2078:
+.L2055:
 	.word	.LANCHOR0
 	.word	.LANCHOR2-1900
 	.word	.LANCHOR2
@@ -18139,8 +18130,8 @@ FtlPowerLostRecovery:
 	stmfd	sp!, {r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r4, #0
-	ldr	r3, .L2081
-	ldr	r5, .L2081+4
+	ldr	r3, .L2058
+	ldr	r5, .L2058+4
 	str	r4, [r3, #300]
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -18156,9 +18147,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	ldmfd	sp!, {r3, r4, r5, pc}
-.L2082:
+.L2059:
 	.align	2
-.L2081:
+.L2058:
 	.word	.LANCHOR2
 	.word	.LANCHOR2-1996
 	.fnend
@@ -18173,9 +18164,9 @@ FtlSysBlkInit:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r3, #296
-	ldr	r6, .L2094
+	ldr	r6, .L2071
 	mov	r2, #0
-	ldr	r4, .L2094+4
+	ldr	r4, .L2071+4
 	mvn	r5, #0
 	ldr	r0, [r6, #3852]
 	strh	r2, [r4, r3]	@ movhi
@@ -18183,2473 +18174,3344 @@ FtlSysBlkInit:
 	strh	r5, [r4, r3]	@ movhi
 	uxth	r0, r0
 	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L2094+8
-	ldrh	r2, [r4, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2084
-	bl	FtlLoadSysInfo
-	subs	r7, r0, #0
-	bne	.L2084
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	r0, #1
-	bl	FtlUpdateVaildLpn
-	movw	r3, #3954
-	ldrh	r2, [r6, r3]
-	mov	r3, r7
-	ldr	r1, [r4, #-1852]
-	b	.L2085
-.L2087:
-	add	r0, r1, r7
-	add	r7, r7, #12
-	ldr	r0, [r0, #4]
+	bl	FtlScanSysBlk
+	ldr	r3, .L2071+8
+	ldrh	r2, [r4, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2061
+	bl	FtlLoadSysInfo
+	subs	r7, r0, #0
+	bne	.L2061
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	r0, #1
+	bl	FtlUpdateVaildLpn
+	movw	r3, #3954
+	ldrh	r2, [r6, r3]
+	mov	r3, r7
+	ldr	r1, [r4, #-1852]
+	b	.L2062
+.L2064:
+	add	r0, r1, r7
+	add	r7, r7, #12
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L2063
+	add	r3, r3, #1
+.L2062:
+	cmp	r3, r2
+	blt	.L2064
+.L2063:
+	ldr	r4, .L2071+4
+	cmp	r3, r2
+	ldr	r1, .L2071+12
+	ldrh	r0, [r4, r1]
+	add	r0, r0, #1
+	strh	r0, [r4, r1]	@ movhi
+	blt	.L2065
+	mov	r3, #296
+	ldrh	r3, [r4, r3]
+	cmp	r3, #0
+	beq	.L2066
+.L2065:
+	ldr	r0, .L2071+16
+	bl	FtlSuperblockPowerLostFix
+	ldr	r0, .L2071+20
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L2071+24
+	ldr	r1, [r4, #-2016]
+	ldr	r2, .L2071+28
+	ldrh	r3, [r4, r3]
+	ldrh	r0, [r4, r2]
+	mov	r3, r3, asl #1
+	ldrh	ip, [r1, r3]
+	rsb	r0, r0, ip
+	strh	r0, [r1, r3]	@ movhi
+	ldr	r0, .L2071
+	movw	r1, #3916
+	ldr	r3, .L2071+32
+	ldr	lr, [r4, #-2016]
+	ldrh	ip, [r0, r1]
+	strh	ip, [r4, r3]	@ movhi
+	mov	r3, #0
+	strh	r3, [r4, r2]	@ movhi
+	add	r2, r2, #44
+	strb	r3, [r4, #-1990]
+	ldrh	ip, [r4, r2]
+	add	r2, r2, #4
+	ldrh	r5, [r4, r2]
+	mov	ip, ip, asl #1
+	ldrh	r6, [lr, ip]
+	rsb	r5, r5, r6
+	strh	r5, [lr, ip]	@ movhi
+	ldrh	r0, [r0, r1]
+	ldr	r1, .L2071+36
+	strh	r3, [r4, r2]	@ movhi
+	strb	r3, [r4, #-1942]
+	strh	r0, [r4, r1]	@ movhi
+	ldr	r0, .L2071+40
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L2071+44
+	bl	FtlMapBlkWriteDumpData
+	ldr	r3, .L2071+48
+	ldrh	r2, [r4, r3]
+	add	r2, r2, #1
+	strh	r2, [r4, r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+.L2066:
+	ldr	r4, .L2071+4
+	movw	r3, #65535
+	ldr	r5, .L2071+24
+	ldrh	r2, [r4, r5]
+	cmp	r2, r3
+	beq	.L2067
+	ldr	r3, .L2071+28
+	ldrh	r3, [r4, r3]
+	cmp	r3, #0
+	bne	.L2067
+	ldr	r3, .L2071+52
+	ldrh	r3, [r4, r3]
+	cmp	r3, #0
+	bne	.L2067
+	bl	FtlVpcTblFlush
+	ldrh	r0, [r4, r5]
+	bl	FtlGcRefreshOpenBlock
+	ldr	r3, .L2071+56
+	ldrh	r0, [r4, r3]
+	bl	FtlGcRefreshOpenBlock
+	ldr	r0, .L2071+16
+	bl	allocate_new_data_superblock
+	ldr	r0, .L2071+20
+	bl	allocate_new_data_superblock
+	add	r0, r4, #248
+	bl	FtlMapBlkWriteDumpData
+.L2067:
+	ldr	r3, .L2071+12
+	ldr	r2, .L2071+4
+	ldrh	r5, [r2, r3]
+	ands	r5, r5, #31
+	movne	r5, #0
+	bne	.L2061
+	bl	FtlVpcCheckAndModify
+.L2061:
+	mov	r0, r5
+	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
+.L2072:
+	.align	2
+.L2071:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	-1772
+	.word	-2044
+	.word	.LANCHOR2-1996
+	.word	.LANCHOR2-1948
+	.word	-1996
+	.word	-1992
+	.word	-1994
+	.word	-1946
+	.word	.LANCHOR2-1088
+	.word	.LANCHOR2+248
+	.word	-2042
+	.word	-1944
+	.word	-1948
+	.fnend
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.align	2
+	.type	FtlLowFormat.part.26, %function
+FtlLowFormat.part.26:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	mov	r6, #3952
+	ldr	r5, .L2094
+	mov	r1, #0
+	ldr	r4, .L2094+4
+	ldrh	r2, [r5, r6]
+	ldr	r0, [r4, #-900]
+	mov	r2, r2, asl #2
+	bl	ftl_memset
+	ldrh	r2, [r5, r6]
+	mov	r1, #0
+	ldr	r0, [r4, #-1032]
+	mov	r2, r2, asl #2
+	bl	ftl_memset
+	ldr	r0, [r5, #3852]
+	mov	r3, #0
+	str	r3, [r4, #-1804]
+	str	r3, [r4, #-1800]
+	uxth	r0, r0
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
 	cmp	r0, #0
-	blt	.L2086
+	beq	.L2074
+	bl	FtlMakeBbt
+.L2074:
+	mov	r3, #0
+	ldr	ip, .L2094
+	movw	r0, #3922
+	ldr	r2, .L2094+4
+	ldr	r1, .L2094+8
+	b	.L2075
+.L2076:
+	ldr	lr, [r2, #-944]
+	mvn	r4, r3
+	orr	r4, r3, r4, asl #16
+	str	r4, [lr, r3, asl #2]
+	ldr	lr, [r2, #-940]
+	str	r1, [lr, r3, asl #2]
 	add	r3, r3, #1
+	uxth	r3, r3
+.L2075:
+	ldrh	lr, [ip, r0]
+	ldr	r8, .L2094
+	cmp	r3, lr, asl #7
+	blt	.L2076
+	mov	r3, #3856
+	mov	r5, #0
+	ldrh	r6, [r8, r3]
+	movw	r7, #3858
+	b	.L2077
+.L2078:
+	mov	r0, r6
+	mov	r1, #1
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, #1
+	uxth	r6, r6
+	add	r5, r5, r0
+	uxth	r5, r5
+.L2077:
+	ldrh	r3, [r8, r7]
+	ldr	r4, .L2094
+	cmp	r3, r6
+	bhi	.L2078
+	movw	r3, #3848
+	ldrh	r1, [r4, r3]
+	sub	r3, r5, #3
+	cmp	r3, r1, asl #1
+	blt	.L2079
+	mov	r0, r5
+	movw	r6, #3858
+	bl	__aeabi_uidiv
+	ldr	r3, [r4, #3948]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldr	r0, [r4, #3852]
+	uxth	r0, r0
+	bl	FtlFreeSysBlkQueueInit
+	mov	r3, #3856
+	ldrh	r5, [r4, r3]
+	b	.L2080
+.L2081:
+	mov	r0, r5
+	mov	r1, #1
+	bl	FtlLowFormatEraseBlock
+	add	r5, r5, #1
+	uxth	r5, r5
+.L2080:
+	ldrh	r3, [r4, r6]
+	cmp	r3, r5
+	bhi	.L2081
+.L2079:
+	mov	r4, #0
+	ldr	r8, .L2094
+	mov	r6, r4
+	mov	r7, #3856
+	b	.L2082
+.L2083:
+	mov	r0, r6
+	mov	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, #1
+	uxth	r6, r6
+	add	r4, r4, r0
+	uxth	r4, r4
+.L2082:
+	ldrh	r3, [r8, r7]
+	ldr	r5, .L2094
+	cmp	r3, r6
+	bhi	.L2083
+	movw	r3, #3858
+	ldr	r8, .L2094+4
+	ldrh	r3, [r5, r3]
+	ldr	fp, [r5, #3860]
+	ldr	r9, .L2094+12
+	str	r3, [r8, #-984]
+	movw	r3, #3848
+	ldrh	r6, [r5, r3]
+	mov	r0, fp
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	ubfx	sl, r0, #5, #16
+	mov	r7, r0
+	add	r3, sl, #36
+	strh	r3, [r8, r9]	@ movhi
+	mov	r3, #24
+	str	r0, [r5, #3976]
+	mul	r3, r3, r6
+	cmp	r4, r3
+	ble	.L2084
+	rsb	r0, r4, fp
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	str	r0, [r5, #3976]
+	mov	r0, r0, lsr #5
+	add	r0, r0, #24
+	strh	r0, [r8, r9]	@ movhi
+.L2084:
+	ldr	r3, .L2094
+	ldr	r3, [r3, #3840]
+	cmp	r3, #1
+	bne	.L2085
+	mov	r0, r4
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	ldr	r8, .L2094+4
+	ldr	r5, .L2094+12
+	ldrh	r9, [r8, r5]
+	uxtah	r0, r9, r0
+	add	r9, r9, r0, lsr #2
+	strh	r9, [r8, r5]	@ movhi
 .L2085:
-	cmp	r3, r2
-	blt	.L2087
+	ldr	r3, .L2094
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2086
+	mov	r0, r4
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	ldr	r8, .L2094+4
+	ldr	r5, .L2094+12
+	ldrh	r9, [r8, r5]
+	uxtah	r0, r9, r0
+	add	r9, r9, r0, lsr #2
+	strh	r9, [r8, r5]	@ movhi
 .L2086:
-	ldr	r4, .L2094+4
-	cmp	r3, r2
-	ldr	r1, .L2094+12
-	ldrh	r0, [r4, r1]
-	add	r0, r0, #1
-	strh	r0, [r4, r1]	@ movhi
-	blt	.L2088
-	mov	r3, #296
-	ldrh	r3, [r4, r3]
+	ldr	r0, .L2094
+	movw	r3, #3908
+	ldrh	r3, [r0, r3]
 	cmp	r3, #0
-	beq	.L2089
-.L2088:
-	ldr	r0, .L2094+16
-	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L2094+20
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L2094+24
-	ldr	r1, [r4, #-2016]
-	ldr	r2, .L2094+28
+	beq	.L2087
+	ldr	r1, .L2094+4
+	ldr	r2, .L2094+12
+	ldrh	ip, [r1, r2]
+	add	ip, ip, r3, lsr #1
+	strh	ip, [r1, r2]	@ movhi
+	mul	ip, r6, r3
+	cmp	ip, r4
+	strgt	r7, [r0, #3976]
+	addgt	r3, r3, #32
+	addgt	sl, sl, r3
+	strgth	sl, [r1, r2]	@ movhi
+.L2087:
+	ldr	r4, .L2094+4
+	ldr	r5, .L2094
+	ldr	r3, .L2094+12
+	ldr	r7, .L2094+16
+	ldr	r2, [r5, #3976]
 	ldrh	r3, [r4, r3]
-	ldrh	r0, [r4, r2]
-	mov	r3, r3, asl #1
-	ldrh	ip, [r1, r3]
-	rsb	r0, r0, ip
-	strh	r0, [r1, r3]	@ movhi
-	ldr	r0, .L2094
-	movw	r1, #3916
-	ldr	r3, .L2094+32
-	ldr	lr, [r4, #-2016]
-	ldrh	ip, [r0, r1]
-	strh	ip, [r4, r3]	@ movhi
+	rsb	r3, r3, r2
+	mul	r6, r6, r3
+	movw	r3, #3916
+	ldrh	r3, [r5, r3]
+	str	r6, [r4, #216]
+	mul	r6, r3, r6
+	movw	r3, #3922
+	ldrh	r3, [r5, r3]
+	str	r6, [r5, #3976]
+	mul	r6, r3, r6
+	str	r6, [r5, #3956]
+	mvn	r6, #0
+	bl	FtlBbmTblFlush
+	movw	r3, #3858
+	ldrh	r2, [r5, r3]
+	mov	r1, #0
+	ldr	r0, [r4, #-2016]
+	mov	r2, r2, asl #1
+	bl	ftl_memset
+	ldr	r1, .L2094+20
 	mov	r3, #0
-	strh	r3, [r4, r2]	@ movhi
-	add	r2, r2, #44
+	ldr	r2, .L2094+24
+	str	r3, [r4, #-1844]
+	strh	r3, [r4, r1]	@ movhi
+	sub	r1, r1, #236
+	strb	r3, [r4, #-1754]
+	strh	r3, [r4, r1]	@ movhi
+	mov	r1, #255
+	strb	r3, [r4, #-1752]
 	strb	r3, [r4, #-1990]
-	ldrh	ip, [r4, r2]
-	add	r2, r2, #4
-	ldrh	r5, [r4, r2]
-	mov	ip, ip, asl #1
-	ldrh	r6, [lr, ip]
-	rsb	r5, r5, r6
-	strh	r5, [lr, ip]	@ movhi
-	ldrh	r0, [r0, r1]
-	ldr	r1, .L2094+36
-	strh	r3, [r4, r2]	@ movhi
-	strb	r3, [r4, #-1942]
-	strh	r0, [r4, r1]	@ movhi
+	strh	r3, [r4, r7]	@ movhi
+	mov	r3, #1
+	strb	r3, [r4, #-1988]
+	mov	r3, #3856
+	strh	r6, [r4, r2]	@ movhi
+	ldrh	r2, [r5, r3]
+	ldr	r0, [r4, #-1840]
+	mov	r2, r2, lsr #3
+	bl	ftl_memset
+.L2088:
+	ldr	r0, .L2094+28
+	bl	make_superblock
+	ldrb	r3, [r4, #-1989]	@ zero_extendqisi2
+	ldr	r5, .L2094+4
+	cmp	r3, #0
+	ldr	r3, .L2094+16
+	bne	.L2089
+	ldrh	r3, [r4, r7]
+	ldr	r2, [r4, #-2016]
+	mov	r3, r3, asl #1
+	strh	r6, [r2, r3]	@ movhi
+	ldrh	r3, [r4, r7]
+	add	r3, r3, #1
+	strh	r3, [r4, r7]	@ movhi
+	b	.L2088
+.L2089:
+	ldr	r2, [r5, #-1804]
+	mvn	r7, #0
+	ldr	r1, [r5, #-2016]
+	ldr	r6, .L2094+32
+	str	r2, [r5, #-1984]
+	add	r2, r2, #1
+	str	r2, [r5, #-1804]
+	ldr	r2, .L2094+36
+	ldrh	r0, [r5, r2]
+	ldrh	r2, [r5, r3]
+	mov	r2, r2, asl #1
+	strh	r0, [r1, r2]	@ movhi
+	mov	r2, #0
 	ldr	r0, .L2094+40
-	bl	FtlMapBlkWriteDumpData
+	ldrh	r3, [r5, r3]
+	strb	r2, [r5, #-1942]
+	add	r3, r3, #1
+	strh	r2, [r5, r0]	@ movhi
+	strh	r3, [r5, r6]	@ movhi
+	mov	r3, #1
+	strb	r3, [r5, #-1940]
+.L2090:
 	ldr	r0, .L2094+44
-	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L2094+48
-	ldrh	r2, [r4, r3]
-	add	r2, r2, #1
-	strh	r2, [r4, r3]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-.L2089:
+	bl	make_superblock
+	ldrb	r3, [r5, #-1941]	@ zero_extendqisi2
 	ldr	r4, .L2094+4
-	movw	r3, #65535
-	ldr	r5, .L2094+24
-	ldrh	r2, [r4, r5]
-	cmp	r2, r3
-	beq	.L2090
-	ldr	r3, .L2094+28
-	ldrh	r3, [r4, r3]
 	cmp	r3, #0
-	bne	.L2090
-	ldr	r3, .L2094+52
+	bne	.L2091
+	ldrh	r3, [r5, r6]
+	ldr	r2, [r5, #-2016]
+	mov	r3, r3, asl #1
+	strh	r7, [r2, r3]	@ movhi
+	ldrh	r3, [r5, r6]
+	add	r3, r3, #1
+	strh	r3, [r5, r6]	@ movhi
+	b	.L2090
+.L2091:
+	ldr	r3, [r4, #-1804]
+	mvn	r5, #0
+	ldr	r2, [r4, #-2016]
+	str	r3, [r4, #-1936]
+	add	r3, r3, #1
+	str	r3, [r4, #-1804]
+	ldr	r3, .L2094+48
+	ldrh	r1, [r4, r3]
+	sub	r3, r3, #4
 	ldrh	r3, [r4, r3]
-	cmp	r3, #0
-	bne	.L2090
-	bl	FtlVpcTblFlush
-	ldrh	r0, [r4, r5]
-	bl	FtlGcRefreshOpenBlock
+	mov	r3, r3, asl #1
+	strh	r1, [r2, r3]	@ movhi
+	ldr	r3, .L2094+52
+	strh	r5, [r4, r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	ldr	r3, .L2094+56
-	ldrh	r0, [r4, r3]
-	bl	FtlGcRefreshOpenBlock
-	ldr	r0, .L2094+16
-	bl	allocate_new_data_superblock
-	ldr	r0, .L2094+20
-	bl	allocate_new_data_superblock
-	add	r0, r4, #248
-	bl	FtlMapBlkWriteDumpData
-.L2090:
-	ldr	r3, .L2094+12
-	ldr	r2, .L2094+4
-	ldrh	r5, [r2, r3]
-	ands	r5, r5, #31
-	movne	r5, #0
-	bne	.L2084
-	bl	FtlVpcCheckAndModify
-.L2084:
-	mov	r0, r5
-	ldmfd	sp!, {r3, r4, r5, r6, r7, pc}
+	mov	r2, #0
+	strh	r0, [r4, r3]	@ movhi
+	add	r3, r3, #2
+	strh	r2, [r4, r3]	@ movhi
+	add	r3, r3, #2
+	ldr	r2, [r4, #216]
+	strh	r5, [r4, r3]	@ movhi
+	add	r3, r3, #2
+	strh	r2, [r4, r3]	@ movhi
+	ldr	r3, [r4, #-1804]
+	str	r3, [r4, #-1764]
+	add	r3, r3, #1
+	str	r3, [r4, #-1804]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	ldmnefd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
+	ldr	r3, .L2094+60
+	mov	r2, #1
+	str	r2, [r3, #2996]
+	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 .L2095:
 	.align	2
 .L2094:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	-1772
-	.word	-2044
-	.word	.LANCHOR2-1996
-	.word	.LANCHOR2-1948
+	.word	168778952
+	.word	-1776
 	.word	-1996
+	.word	-1758
+	.word	-1760
+	.word	.LANCHOR2-1996
+	.word	-1948
 	.word	-1992
-	.word	-1994
 	.word	-1946
-	.word	.LANCHOR2-1088
-	.word	.LANCHOR2+248
-	.word	-2042
+	.word	.LANCHOR2-1948
 	.word	-1944
-	.word	-1948
-	.fnend
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.align	2
-	.global	Ftl_get_new_temp_ppa
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-	ldr	r3, .L2099
-	ldr	r5, .L2099+4
-	ldrh	r2, [r5, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2097
-	ldr	r3, .L2099+8
-	ldrh	r3, [r5, r3]
-	cmp	r3, #0
-	bne	.L2098
-.L2097:
-	bl	FtlCacheWriteBack
-	mov	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2099+12
-	mov	r4, #0
-	strb	r4, [r5, #-1892]
-	bl	allocate_data_superblock
-	ldr	r3, .L2099+16
-	strh	r4, [r5, r3]	@ movhi
-	add	r3, r3, #12
-	strh	r4, [r5, r3]	@ movhi
-	bl	l2p_flush
-	mov	r0, r4
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2098:
-	ldr	r0, .L2099+12
-	ldmfd	sp!, {r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L2100:
-	.align	2
-.L2099:
 	.word	-1900
-	.word	.LANCHOR2
-	.word	-1896
-	.word	.LANCHOR2-1900
-	.word	-1156
-	.fnend
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
-	.save {r0, r1, r2, r4, r5, r6, r7, lr}
-	add	r2, r1, r0
-	ldr	r5, .L2111
-	mov	r7, r0
-	mov	r4, r1
-	ldr	r3, [r5, #3956]
-	cmp	r2, r3
-	mvnhi	r0, #0
-	bhi	.L2102
-	cmp	r1, #31
-	bls	.L2109
-	ldr	r3, .L2111+4
-	ldr	r3, [r3, #-2088]
-	cmp	r3, #0
-	bne	.L2109
-	bl	FtlCacheWriteBack
-	movw	r3, #3922
-	ldrh	r6, [r5, r3]
-	mov	r0, r7
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mls	r7, r0, r6, r7
-	mov	r5, r0
-	uxth	r7, r7
-	cmp	r7, #0
-	beq	.L2103
-	rsb	r6, r7, r6
-	add	r5, r0, #1
-	cmp	r6, r4
-	movcs	r6, r4
-	uxth	r6, r6
-	rsb	r4, r6, r4
-.L2103:
-	mvn	r3, #0
-	ldr	r7, .L2111
-	str	r3, [sp, #4]
-	movw	r6, #3922
-	b	.L2104
-.L2106:
-	mov	r0, r5
-	mov	r1, sp
-	mov	r2, #0
-	bl	log2phys
-	ldr	r3, [sp, #0]
-	cmn	r3, #1
-	beq	.L2105
-	ldr	r3, .L2111+4
-	add	r1, sp, #4
-	mov	r0, r5
-	ldr	r2, [r3, #444]
-	add	r2, r2, #1
-	str	r2, [r3, #444]
-	ldr	r2, [r3, #-1832]
-	add	r2, r2, #1
-	str	r2, [r3, #-1832]
-	mov	r2, #1
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L2105:
-	ldrh	r3, [r7, r6]
-	add	r5, r5, #1
-	rsb	r4, r3, r4
-.L2104:
-	ldrh	r3, [r7, r6]
-	cmp	r4, r3
-	bcs	.L2106
-	ldr	r3, .L2111+4
-	mov	r4, #0
-	ldr	r2, [r3, #444]
-	cmp	r2, #32
-	bls	.L2110
-	str	r4, [r3, #444]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L2110
-.L2109:
-	mov	r0, #0
-	b	.L2102
-.L2110:
-	mov	r0, r4
-.L2102:
-	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
-.L2112:
-	.align	2
-.L2111:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.fnend
-	.size	ftl_discard, .-ftl_discard
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_discard
-	.fnend
-	.size	FtlDiscard, .-FtlDiscard
-	.align	2
-	.global	ftl_cache_flush
-	.type	ftl_cache_flush, %function
-ftl_cache_flush:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FtlCacheWriteBack
-	.fnend
-	.size	ftl_cache_flush, .-ftl_cache_flush
-	.align	2
-	.global	rk_ftl_cache_write_back
-	.type	rk_ftl_cache_write_back, %function
-rk_ftl_cache_write_back:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FtlCacheWriteBack
+	.word	-1772
+	.word	.LANCHOR1
 	.fnend
-	.size	rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
+	.size	FtlLowFormat.part.26, .-FtlLowFormat.part.26
 	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	stmfd	sp!, {r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L2118
-	ldr	r3, [r3, #-2088]
+	ldr	r3, .L2098
+	ldr	r3, [r3, #4040]
 	cmp	r3, #0
-	bne	.L2117
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2117:
+	bne	.L2097
+	bl	FtlLowFormat.part.26
+.L2097:
 	mov	r0, #0
 	ldmfd	sp!, {r3, pc}
-.L2119:
+.L2099:
 	.align	2
-.L2118:
-	.word	.LANCHOR2
+.L2098:
+	.word	.LANCHOR0
 	.fnend
-	.size	FtlSysFlush, .-FtlSysFlush
+	.size	FtlLowFormat, .-FtlLowFormat
 	.align	2
-	.global	FtlDeInit
-	.type	FtlDeInit, %function
-FtlDeInit:
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	ldr	r3, .L2122
-	ldr	r3, [r3, #2996]
-	cmp	r3, #1
-	bne	.L2121
-	bl	FtlSysFlush
-.L2121:
+	stmfd	sp!, {r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+	ldr	r3, .L2103
+	ldr	r5, .L2103+4
+	ldrh	r2, [r5, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2101
+	ldr	r3, .L2103+8
+	ldrh	r3, [r5, r3]
+	cmp	r3, #0
+	bne	.L2102
+.L2101:
+	bl	FtlCacheWriteBack
 	mov	r0, #0
-	ldmfd	sp!, {r3, pc}
-.L2123:
-	.align	2
-.L2122:
-	.word	.LANCHOR1
-	.fnend
-	.size	FtlDeInit, .-FtlDeInit
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2103+12
+	mov	r4, #0
+	strb	r4, [r5, #-1892]
+	bl	allocate_data_superblock
+	ldr	r3, .L2103+16
+	strh	r4, [r5, r3]	@ movhi
+	add	r3, r3, #12
+	strh	r4, [r5, r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2102:
+	ldr	r0, .L2103+12
+	ldmfd	sp!, {r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2104:
 	.align	2
-	.global	ftl_deinit
-	.type	ftl_deinit, %function
-ftl_deinit:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	bl	ftl_flash_de_init
-	bl	FtlDeInit
-	ldmfd	sp!, {r3, lr}
-	b	ftl_flash_de_init
+.L2103:
+	.word	-1900
+	.word	.LANCHOR2
+	.word	-1896
+	.word	.LANCHOR2-1900
+	.word	-1156
 	.fnend
-	.size	ftl_deinit, .-ftl_deinit
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
+	.type	ftl_do_gc.part.23, %function
+ftl_do_gc.part.23:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
+	ldr	r3, .L2202
+	movw	ip, #65535
+	ldr	r2, .L2202+4
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.pad #36
+	sub	sp, sp, #36
+	mov	sl, r1
+	str	r0, [sp, #16]
+	ldrh	r0, [r3, r2]
+	cmp	r0, ip
+	beq	.L2106
+	ldr	r1, .L2202+8
+	ldrh	r4, [r3, r1]
+	cmp	r4, ip
+	streqh	r0, [r3, r1]	@ movhi
+	mvneq	r1, #0
+	streqh	r1, [r3, r2]	@ movhi
+.L2106:
+	ldr	r1, [sp, #16]
+	ldr	r2, [r3, #-1192]
+	cmp	r1, #1
+	add	r2, r2, #1
+	add	r2, r2, r1, asl #7
+	str	r2, [r3, #-1192]
+	bne	.L2107
+	ldr	r3, .L2202+12
+	ldr	r1, [r3, #3840]
+	cmp	r1, #0
+	bne	.L2108
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2107
+.L2108:
+	ldr	r4, .L2202
+	ldr	r3, [r4, #-1780]
+	cmp	r3, #29
+	bhi	.L2107
+	mov	r3, #432
+	ldrh	r3, [r4, r3]
+	add	r2, r2, r3
+	str	r2, [r4, #-1192]
+	bl	FtlGcReFreshBadBlk
+	ldr	r3, .L2202+16
+	movw	r2, #65535
+	ldrh	r3, [r4, r3]
+	cmp	r3, r2
+	bne	.L2107
+	ldr	r2, .L2202+8
+	ldrh	r2, [r4, r2]
+	cmp	r2, r3
+	bne	.L2107
+	ldr	r3, [r4, #-1192]
+	cmp	r3, #1024
+	bhi	.L2109
+	ldr	r3, .L2202+20
+	ldrh	r3, [r4, r3]
+	cmp	r3, #63
+	bhi	.L2107
+.L2109:
+	ldr	r3, .L2202
+	mov	r2, #432
+	ldr	r0, .L2202+20
 	mov	r1, #0
-	ldr	r0, .L2126
+	strh	r1, [r3, r2]	@ movhi
+	ldrh	ip, [r3, r0]
+	ldr	r0, .L2202+24
+	ldrh	r0, [r3, r0]
+	add	r0, r0, #64
+	cmp	ip, r0
+	bgt	.L2107
+	str	r1, [r3, #-1192]
+	ldr	r1, [r3, #-1780]
+	cmp	r1, #0
+	moveq	r1, #6
+	beq	.L2198
+	cmp	r1, #5
+	bhi	.L2111
+	mov	r1, #18
+.L2198:
+	strh	r1, [r3, r2]	@ movhi
+.L2111:
+	mov	r0, #32
+	movw	r7, #65535
+	bl	List_get_gc_head_node
+	uxth	r2, r0
+	cmp	r2, r7
+	beq	.L2112
+	ldr	r5, .L2202
+	ldr	r6, .L2202+28
+	ldrh	r0, [r5, r6]
+	cmp	r0, #0
+	moveq	r3, #1
+	streqh	r3, [r5, r6]	@ movhi
+	beq	.L2112
+	ldr	r3, .L2202+12
+	movw	ip, #3918
+	movw	lr, #3848
+	ldr	r9, [r5, #-2016]
+	mov	r2, r2, asl #1
+	ldrh	ip, [r3, ip]
+	ldrh	r3, [r3, lr]
+	ldrh	r1, [r9, r2]
+	mul	r3, r3, ip
+	add	r3, r3, #1
+	cmp	r1, r3
+	bgt	.L2112
+	add	fp, r0, #1
+	mov	r8, #0
+	str	r8, [r5, #-1184]
+	uxth	fp, fp
+	strh	fp, [r5, r6]	@ movhi
+	str	r2, [sp, #8]
+	bl	List_get_gc_head_node
+	ldr	r2, [sp, #8]
+	uxth	r4, r0
+	cmp	r4, r7
+	beq	.L2112
+	ldrh	r2, [r9, r2]
+	mov	r7, r4, asl #1
+	ldr	r0, .L2202+32
+	mov	r1, fp
+	ldrh	r3, [r9, r7]
+	str	r2, [sp, #0]
+	mov	r2, r4
 	bl	printk
-	ldmfd	sp!, {r3, lr}
-	b	ftl_deinit
-.L2127:
-	.align	2
+	ldrh	r3, [r5, r6]
+	cmp	r3, #40
+	bls	.L2114
+	ldr	r3, [r5, #-2016]
+	ldrh	r3, [r3, r7]
+	cmp	r3, #32
+	strhih	r8, [r5, r6]	@ movhi
+.L2114:
+	ldr	r2, .L2202
+	mov	r3, #432
+	mov	r1, #6
+	strh	r1, [r2, r3]	@ movhi
+	b	.L2116
+.L2112:
+	bl	GetSwlReplaceBlock
+	movw	r3, #65535
+	cmp	r0, r3
+	mov	r4, r0
+	bne	.L2116
+	ldr	r2, .L2202
+	mov	r3, #432
+	mov	r1, #0
+	strh	r1, [r2, r3]	@ movhi
+.L2107:
+	ldr	r5, .L2202
+	movw	r4, #65535
+	ldr	r3, .L2202+16
+	ldrh	r2, [r5, r3]
+	cmp	r2, r4
+	bne	.L2116
+	sub	r3, r3, #140
+	ldrh	r3, [r5, r3]
+	cmp	r3, r2
+	movne	r4, r2
+	bne	.L2116
+	ldr	r2, .L2202+8
+	ldrh	r7, [r5, r2]
+	cmp	r7, r3
+	movne	r4, r3
+	bne	.L2116
+	ldr	r8, .L2202+20
+	ldr	r2, [r5, #-1192]
+	ldrh	r3, [r5, r8]
+	cmp	r3, #23
+	movhi	r3, #1024
+	movls	r3, #5120
+	cmp	r2, r3
+	movls	r4, r7
+	bls	.L2116
+	mov	r2, #432
+	mov	r3, #0
+	str	r3, [r5, #-1192]
+	mov	r6, r5
+	strh	r3, [r5, r2]	@ movhi
+	bl	GetSwlReplaceBlock
+	cmp	r0, r7
+	mov	r4, r0
+	bne	.L2118
+	ldr	r3, .L2202+24
+	ldrh	r1, [r5, r8]
+	ldrh	r2, [r5, r3]
+	cmp	r1, r2
+	movcs	r2, #80
+	strcsh	r2, [r5, r3]	@ movhi
+	bcs	.L2128
+	mov	r0, #64
+	bl	List_get_gc_head_node
+	uxth	r3, r0
+	cmp	r3, r4
+	beq	.L2128
+	ldr	r2, [r5, #-1000]
+	cmp	r2, #0
+	bne	.L2121
+	ldr	r2, .L2202+12
+	movw	r1, #3868
+	ldrh	r1, [r2, r1]
+	cmp	r1, #3
+	beq	.L2121
+	ldr	r1, [r5, #-1712]
+	cmp	r1, #0
+	bne	.L2121
+	ldr	r1, [r2, #3840]
+	cmp	r1, #0
+	bne	.L2121
+	ldrb	r0, [r2, #928]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L2122
+.L2121:
+	ldr	r1, .L2202
+	mov	r3, r3, asl #1
+	movw	ip, #3848
+	movw	lr, #3868
+	ldr	r2, [r1, #-2016]
+	ldrh	r0, [r2, r3]
+	movw	r2, #3918
+	ldr	r3, .L2202+12
+	ldrh	r2, [r3, r2]
+	ldrh	ip, [r3, ip]
+	ldrh	r3, [r3, lr]
+	mul	ip, ip, r2
+	cmp	r3, #3
+	moveq	r3, r2, lsr #1
+	movne	r3, #0
+	add	r3, ip, r3
+	cmp	r0, r3
+	bgt	.L2124
+	mov	r0, #0
+	bl	List_get_gc_head_node
+	ldr	r2, .L2202+12
+	ldr	r3, .L2202
+	ldr	r2, [r2, #3976]
+	ldr	r1, [r3, #-1844]
+	add	r2, r2, r2, asl #1
+	cmp	r1, r2, lsr #2
+	ldr	r2, .L2202+24
+	movhi	r1, #128
+	movls	r1, #160
+	strh	r1, [r3, r2]	@ movhi
+	uxth	r4, r0
+	b	.L2126
+.L2124:
+	ldr	r3, .L2202+24
+	mov	r2, #128
+	strh	r2, [r1, r3]	@ movhi
+	b	.L2128
+.L2122:
+	ldr	r2, [r5, #-2016]
+	mov	r3, r3, asl #1
+	ldr	r6, .L2202
+	ldr	r5, .L2202+24
+	ldrh	r3, [r2, r3]
+	cmp	r3, #7
+	movhi	r3, #64
+	strhih	r3, [r6, r5]	@ movhi
+	bhi	.L2128
+	bl	List_get_gc_head_node
+	mov	r3, #128
+	strh	r3, [r6, r5]	@ movhi
+	uxth	r4, r0
 .L2126:
-	.word	.LC134
-	.fnend
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.align	2
-	.global	rk_ftl_garbage_collect
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_do_gc
-	.fnend
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.align	2
-	.global	ftl_fix_nand_power_lost_error
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2138
-	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
-	.save {r4, r5, r6, r7, r8, sl, lr}
-	.pad #52
-	sub	sp, sp, #52
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2129
-	ldr	r4, .L2138+4
-	movw	r3, #294
-	ldr	r0, .L2138+8
-	movw	r7, #4097
-	ldrh	r6, [r4, r3]
-	ldr	r3, [r4, #-2016]
-	mov	r5, r6, asl #1
-	mov	r1, r6
-	ldrh	r2, [r3, r5]
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L2128
+.L2118:
+	ldr	r1, .L2202
+	mov	r0, r4, asl #1
+	ldr	r3, .L2202+20
+	ldr	ip, .L2202+12
+	ldrh	r2, [r1, r3]
+	ldr	ip, [ip, #4048]
+	ldr	r3, [r1, #-2016]
+	ldrh	r3, [r3, r0]
+	ldrh	r0, [ip, r0]
+	str	r0, [sp, #0]
+	ldr	r0, .L2202+36
+	ldrh	r1, [r1, r0]
+	ldr	r0, .L2202+40
+	str	r1, [sp, #4]
+	mov	r1, r4
 	bl	printk
-	ldr	r3, .L2138+12
-	ldrh	r0, [r4, r3]
-	bl	FtlGcRefreshOpenBlock
-	ldr	r3, .L2138+16
-	ldrh	r0, [r4, r3]
-	bl	FtlGcRefreshOpenBlock
-	ldr	r0, .L2138+20
-	bl	allocate_new_data_superblock
-	ldr	r0, .L2138+24
-	bl	allocate_new_data_superblock
-	b	.L2131
-.L2133:
-	mov	r0, #1
-	mov	r1, r0
-	bl	ftl_do_gc
-	ldr	r3, [r4, #-2016]
-	ldrh	r3, [r3, r5]
+.L2128:
+	bl	FtlGcReFreshBadBlk
+.L2116:
+	movw	r0, #65535
+	rsb	ip, r0, r4
+	rsbs	r1, ip, #0
+	ldr	r3, [sp, #16]
+	adc	r1, r1, ip
+	ldr	r5, .L2202
 	cmp	r3, #0
-	beq	.L2132
-.L2131:
-	subs	r7, r7, #1
-	bne	.L2133
-.L2132:
-	ldr	r7, .L2138+4
-	mov	r1, r6
-	ldr	r0, .L2138+8
-	ldr	r3, [r7, #-2016]
-	ldrh	r2, [r3, r5]
-	bl	printk
-	ldr	r3, [r7, #-2016]
-	ldrh	r4, [r3, r5]
-	cmp	r4, #0
-	bne	.L2134
-	add	r8, sp, #48
-	mov	r0, sp
-	strh	r6, [r8, #-48]!	@ movhi
-	add	r8, r8, #14
-	bl	make_superblock
-	ldr	r2, .L2138
-	movw	r3, #3848
-	ldr	r7, [r7, #-2084]
-	movw	lr, #65535
-	mov	ip, #36
-	ldrh	sl, [r2, r3]
-	mov	r1, r4
-	mov	r3, r4
-	b	.L2135
-.L2137:
-	ldrh	r0, [r8, #2]!
-	cmp	r0, lr
-	beq	.L2136
-	mla	r2, ip, r4, r7
-	add	r4, r4, #1
-	mov	r0, r0, asl #10
-	uxth	r4, r4
-	stmib	r2, {r0, r1}
-	str	r1, [r2, #12]
+	movne	r2, #0
+	andeq	r2, r1, #1
+	cmp	r2, #0
+	beq	.L2129
+	ldr	r3, .L2202+20
+	ldrh	r2, [r5, r3]
+	cmp	r2, #24
+	movhi	r6, #1
+	bhi	.L2130
+	ldr	r1, .L2202+12
+	movw	r3, #3916
+	cmp	r2, #16
+	ldrh	r6, [r1, r3]
+	movhi	r6, r6, lsr #5
+	bhi	.L2130
+	cmp	r2, #12
+	movhi	r6, r6, lsr #4
+	bhi	.L2130
+	cmp	r2, #8
+	movhi	r6, r6, lsr #2
+.L2130:
+	ldr	r1, .L2202+36
+	ldr	r3, .L2202
+	ldrh	r0, [r5, r1]
+	cmp	r0, r2
+	mov	r0, r1
+	bcs	.L2134
+	ldr	r2, .L2202+44
+	movw	ip, #65535
+	ldrh	r2, [r3, r2]
+	cmp	r2, ip
+	bne	.L2135
+	ldr	ip, .L2202+8
+	ldrh	ip, [r3, ip]
+	cmp	ip, r2
+	bne	.L2135
+	mov	r2, #432
+	ldrh	r0, [r3, r2]
+	cmp	r0, #0
+	bne	.L2136
+	ldr	r2, .L2202+12
+	ldr	ip, [r3, #-1844]
+	ldr	r2, [r2, #3976]
+	add	r2, r2, r2, asl #1
+	cmp	ip, r2, lsr #2
+	movcs	r2, #18
+	bcs	.L2200
 .L2136:
-	add	r3, r3, #1
-	uxth	r3, r3
+	ldr	r3, .L2202
+	ldr	r2, .L2202+48
+	ldr	r1, .L2202+36
+	ldrh	r2, [r3, r2]
+	add	r2, r2, r2, asl #1
+	mov	r2, r2, asr #2
+.L2200:
+	strh	r2, [r3, r1]	@ movhi
+	mov	r2, #0
+	ldr	r3, .L2202
+	str	r2, [r3, #-1184]
+	b	.L2139
 .L2135:
-	cmp	r3, sl
-	bne	.L2137
-	ldr	r7, .L2138+4
-	mov	r1, r6
-	ldr	r0, .L2138+28
-	ldr	r3, [r7, #-2016]
-	ldrh	r2, [r3, r5]
-	bl	printk
-	mov	r1, #0
-	mov	r2, r4
-	ldr	r0, [r7, #-2084]
-	bl	FlashEraseBlocks
-	ldr	r0, [r7, #-2084]
-	mov	r1, #1
-	mov	r2, r4
-	bl	FlashEraseBlocks
+	ldr	r3, .L2202
+	ldr	r2, .L2202+48
+	ldrh	r2, [r3, r2]
+	add	r2, r2, r2, asl #1
+	mov	r2, r2, asr #2
+	strh	r2, [r3, r0]	@ movhi
 .L2134:
-	ldr	r2, .L2138+4
-	movw	r3, #294
-	mvn	r1, #0
-	strh	r1, [r2, r3]	@ movhi
+	ldr	r3, .L2202+12
+	cmp	sl, #2
+	movw	r4, #65535
+	movhi	sl, #0
+	movls	sl, #1
+	ldr	r3, [r3, #3840]
+	cmp	r3, #0
+	moveq	sl, #0
+	cmp	sl, #0
+	addne	r6, r6, #1
+	uxthne	r6, r6
+	b	.L2140
 .L2129:
-	add	sp, sp, #52
-	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
-.L2139:
-	.align	2
-.L2138:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LC135
-	.word	-1996
-	.word	-1948
-	.word	.LANCHOR2-1996
-	.word	.LANCHOR2-1948
-	.word	.LC136
-	.fnend
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.align	2
-	.global	FtlInit
-	.type	FtlInit, %function
-FtlInit:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2202+44
+	ldrh	r3, [r5, r3]
+	cmp	r3, r0
+	bne	.L2141
+	ldr	r0, .L2202+8
+	ldrh	r0, [r5, r0]
+	cmp	r0, r3
+	movne	r1, #0
+	andeq	r1, r1, #1
+	cmp	r1, #0
+	beq	.L2141
+	ldr	r1, .L2202+16
+	ldrh	r4, [r5, r1]
+	cmp	r4, r3
+	movne	r4, r3
+	bne	.L2141
+	ldr	r3, .L2202+20
+	mov	r6, #432
+	str	r2, [r5, #-1184]
+	ldrh	r7, [r5, r3]
+	add	r3, r3, #804
+	ldrh	r2, [r5, r3]
+	cmp	r2, r7
+	bcs	.L2142
+	ldrh	r2, [r5, r6]
+	cmp	r2, #0
+	bne	.L2143
+	ldr	r2, .L2202+12
+	ldr	r1, [r5, #-1844]
+	ldr	r2, [r2, #3976]
+	add	r2, r2, r2, asl #1
+	cmp	r1, r2, lsr #2
+	movcs	r2, #18
+	strcsh	r2, [r5, r3]	@ movhi
+	bcs	.L2145
+.L2143:
+	ldr	r3, .L2202
+	ldr	r2, .L2202+48
+	ldr	r1, .L2202+36
+	ldrh	r2, [r3, r2]
+	add	r2, r2, r2, asl #1
+	mov	r2, r2, asr #2
+	strh	r2, [r3, r1]	@ movhi
+.L2145:
+	bl	FtlReadRefresh
+	mov	r3, #432
+	ldr	r2, .L2202
+	b	.L2201
+.L2142:
+	ldrh	r0, [r5, r6]
+	cmp	r0, #0
+	bne	.L2141
+	ldr	r2, .L2202+48
+	ldrh	r4, [r5, r2]
+	add	r2, r4, r4, asl #1
+	mov	r2, r2, asr #2
+	strh	r2, [r5, r3]	@ movhi
+	bl	List_get_gc_head_node
+	ldr	r3, [r5, #-2016]
+	ldr	r1, .L2202+12
+	movw	r2, #3918
+	ldrh	r2, [r1, r2]
+	uxth	r0, r0
+	mov	r0, r0, asl #1
+	ldrh	r3, [r3, r0]
+	movw	r0, #3848
+	ldrh	r1, [r1, r0]
+	mul	r2, r1, r2
+	add	r2, r2, r2, lsr #31
+	cmp	r3, r2, asr #1
+	ble	.L2146
+	sub	r4, r4, #1
+	cmp	r7, r4
+	blt	.L2146
+	bl	FtlReadRefresh
+	ldrh	r0, [r5, r6]
+	b	.L2139
+.L2146:
+	cmp	r3, #0
+	movwne	r4, #65535
+	bne	.L2141
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2202+20
+	ldr	r2, .L2202
+	ldrh	r0, [r2, r3]
+	add	r0, r0, #1
+	b	.L2139
 .L2141:
-	stmfd	sp!, {r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-	mvn	r3, #0
-	ldr	r4, .L2151
-	ldr	r6, .L2151+4
-	ldr	r5, .L2151+8
-	ldr	r1, .L2151+12
-	str	r3, [r6, #2996]
+	ldr	r3, .L2202+12
+	ldr	r6, [r3, #3840]
+	cmp	r6, #0
+	movne	r6, #2
+	moveq	r6, #1
+.L2140:
+	ldr	r3, .L2202
+	movw	r0, #65535
+	ldr	r2, .L2202+16
+	ldrh	r1, [r3, r2]
+	cmp	r1, r0
+	bne	.L2147
+	cmp	r4, r1
+	strneh	r4, [r3, r2]	@ movhi
+	bne	.L2149
+	ldr	r2, .L2202+8
+	ldrh	r1, [r3, r2]
+	cmp	r1, r4
+	beq	.L2149
+	ldr	r0, [r3, #-2016]
+	mov	r1, r1, asl #1
+	ldrh	r1, [r0, r1]
+	cmp	r1, #0
+	mvneq	r1, #0
+	streqh	r1, [r3, r2]	@ movhi
+	ldr	r3, .L2202
+	ldr	r1, .L2202+16
+	ldrh	r0, [r3, r2]
+	strh	r0, [r3, r1]	@ movhi
+	mvn	r1, #0
+	strh	r1, [r3, r2]	@ movhi
+.L2149:
+	ldr	r5, .L2202
 	mov	r3, #0
-	ldr	r0, .L2151+16
-	str	r3, [r4, #448]
-	str	r3, [r4, #-2088]
-	bl	printk
-	ldr	r0, .L2151+20
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r0, [r5, #3852]
-	uxth	r0, r0
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cmp	r0, #0
-	ldrne	r0, .L2151+24
-	bne	.L2150
-	bl	FtlSysBlkInit
+	ldr	r7, .L2202+16
+	strb	r3, [r5, #-1752]
+	movw	r3, #65535
+	ldrh	r0, [r5, r7]
+	cmp	r0, r3
+	beq	.L2147
+	bl	IsBlkInGcList
 	cmp	r0, #0
-	beq	.L2144
-	ldr	r0, .L2151+28
-.L2150:
-	ldr	r1, .L2151+32
-	bl	printk
-	b	.L2143
-.L2144:
-	mov	r1, #1
-	str	r1, [r6, #2996]
-	bl	ftl_do_gc
-	ldr	r3, .L2151+36
-	ldrh	r3, [r4, r3]
-	cmp	r3, #15
-	bhi	.L2145
-	mov	r4, #1024
-.L2146:
-	mov	r0, #1
-	mov	r1, r0
-	bl	ftl_do_gc
-	subs	r4, r4, #1
-	bne	.L2146
-	b	.L2143
-.L2145:
-	ldrb	r3, [r5, #928]	@ zero_extendqisi2
+	mvnne	r3, #0
+	strneh	r3, [r5, r7]	@ movhi
+	ldr	r3, .L2202+12
+	ldr	r7, .L2202
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2143
-	mov	r4, #128
-.L2147:
-	mov	r0, #1
-	mov	r1, r0
-	bl	ftl_do_gc
-	subs	r4, r4, #1
-	bne	.L2147
-.L2143:
-	mov	r0, #0
-	ldmfd	sp!, {r4, r5, r6, pc}
+	beq	.L2152
+	ldr	r3, .L2202+16
+	ldrh	r0, [r7, r3]
+	bl	ftl_get_blk_mode
+	strb	r0, [r7, #-1752]
 .L2152:
-	.align	2
-.L2151:
-	.word	.LANCHOR2
-	.word	.LANCHOR1
-	.word	.LANCHOR0
-	.word	.LC79
-	.word	.LC78
-	.word	.LANCHOR0+3048
-	.word	.LC137
-	.word	.LC138
-	.word	.LANCHOR3+36
-	.word	-2000
-	.fnend
-	.size	FtlInit, .-FtlInit
-	.align	2
-	.type	ftl_write.part.22, %function
-ftl_write.part.22:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 96
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	mov	r3, #2048
-	ldr	r4, .L2198
-	.pad #100
-	sub	sp, sp, #100
-	ldr	r8, .L2198+4
-	mov	r5, r1
-	mov	r7, r0
-	mov	r9, r2
-	str	r3, [r4, #452]
-	movw	r3, #3922
-	ldrh	r6, [r8, r3]
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	str	r0, [sp, #16]
-	sub	r0, r7, #1
-	add	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	sl, [r8, #3968]
-	cmp	sl, #0
-	rsb	fp, r3, r0
-	str	r0, [sp, #36]
-	add	r3, fp, #1
-	str	r3, [sp, #20]
-	ldr	lr, [sp, #20]
-	ldr	r3, [r4, #-1828]
-	add	r3, lr, r3
-	str	r3, [r4, #-1828]
-	ldr	r3, [r4, #-1812]
-	add	r3, r5, r3
-	str	r3, [r4, #-1812]
-	beq	.L2186
-	ldr	r3, [r8, #3972]
-	sub	sl, sl, #1
-	mov	r2, #36
-	ldr	r0, [sp, #16]
-	mla	sl, r2, sl, r3
-	ldr	r3, [sl, #16]
-	cmp	r0, r3
-	strne	r5, [sp, #32]
-	bne	.L2155
-	ldr	r3, [r4, #-1824]
-	mov	r0, r7
-	mov	r1, r6
-	add	r3, r3, #1
-	str	r3, [r4, #-1824]
-	ldr	r3, [r4, #456]
-	add	r3, r3, #1
-	str	r3, [r4, #456]
-	bl	__aeabi_uidivmod
-	ldr	r0, [sl, #8]
-	rsb	r8, r1, r6
-	add	r0, r0, r1, asl #9
-	cmp	r8, r5
-	movcs	r8, r5
-	mov	r1, r9
-	mov	r3, r8, asl #9
-	str	r3, [sp, #4]
+	ldr	r8, .L2202+16
+	movw	r3, #65535
+	ldr	r5, .L2202
+	ldrh	r2, [r7, r8]
+	cmp	r2, r3
+	beq	.L2147
+	add	r0, r5, r8
+	bl	make_superblock
+	ldr	r1, .L2202+52
+	movw	r2, #434
+	mov	r3, #0
+	strh	r3, [r5, r2]	@ movhi
+	strh	r3, [r5, r1]	@ movhi
+	strb	r3, [r5, #-1754]
+	ldrh	r3, [r5, r8]
+	ldr	r2, [r5, #-2016]
+	mov	r3, r3, asl #1
+	ldrh	r2, [r2, r3]
+	mov	r3, #436
+	strh	r2, [r5, r3]	@ movhi
+.L2147:
+	ldr	r3, .L2202
+	ldr	r2, .L2202+16
+	ldrh	r1, [r3, r2]
+	sub	r2, r2, #236
+	ldrh	r2, [r3, r2]
+	cmp	r2, r1
 	mov	r2, r3
-	bl	memcpy
-	cmp	fp, #0
-	ldr	r3, [sp, #4]
-	bne	.L2156
-	ldr	r2, [r4, #456]
-	cmp	r2, #2
-	ble	.L2157
-.L2156:
-	add	r9, r9, r3
-	add	r7, r7, r8
-	ldr	r3, [sp, #16]
-	rsb	r1, r8, r5
-	str	fp, [sp, #20]
-	add	r3, r3, #1
-	str	r1, [sp, #32]
-	str	r3, [sp, #16]
-.L2155:
-	ldr	r3, .L2198
-	mov	r2, #0
-	str	r2, [r3, #456]
-	b	.L2154
-.L2186:
-	str	r5, [sp, #32]
+	beq	.L2153
+	ldr	r0, .L2202+56
+	ldrh	r3, [r3, r0]
+	cmp	r3, r1
+	movne	fp, r4
+	bne	.L2197
 .L2154:
-	ldr	r0, [sp, #16]
-	ldr	r1, [sp, #36]
-	bl	FtlCacheMetchLpa
-	cmp	r0, #0
-	beq	.L2158
-	bl	FtlCacheWriteBack
+.L2153:
+	ldr	r3, .L2202+16
+	mvn	r1, #0
+	strh	r1, [r2, r3]	@ movhi
+	mov	r3, #432
+.L2201:
+	ldrh	r0, [r2, r3]
+	b	.L2139
+.L2197:
+	ldr	r4, .L2202
+	movw	sl, #65535
+	ldr	r3, .L2202+16
+	ldrh	r3, [r4, r3]
+	cmp	r3, sl
+	bne	.L2156
+	ldr	r5, .L2202+28
+	mov	r3, #0
+	str	r3, [r4, #-1184]
+.L2196:
+	ldrh	r8, [r4, r5]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	ldr	r3, .L2202+16
+	movw	r1, #65535
+	uxth	r7, r0
+	strh	r7, [r4, r3]	@ movhi
+	cmp	r7, r1
+	bne	.L2158
+	ldr	r2, .L2202
+	add	r3, r3, #572
+	mov	r1, #0
+	mov	r0, #8
+	strh	r1, [r2, r3]	@ movhi
+	b	.L2139
 .L2158:
-	cmp	r5, r6, asl #1
-	ldr	r3, .L2198
-	ldr	r4, .L2198+4
-	mov	fp, #0
-	movcc	r6, #0
-	movcs	r6, #1
-	str	r6, [sp, #24]
-	ldr	r6, .L2198+8
-	ldr	r5, [sp, #16]
-	mov	sl, r4
-	str	fp, [sp, #40]
-	str	r6, [r3, #440]
-	b	.L2195
-.L2184:
-	ldrh	r1, [r6, #4]
-	cmp	r1, #0
-	bne	.L2160
-	ldr	r2, .L2198+8
-	ldr	r3, .L2198+12
-	cmp	r6, r2
-	bne	.L2161
-	ldr	r2, .L2198+16
-	ldrh	r8, [r8, r2]
-	cmp	r8, #0
-	bne	.L2162
-	ldr	r0, .L2198+20
-	str	r3, [sp, #4]
-	bl	allocate_new_data_superblock
-	ldr	r3, [sp, #4]
-	str	r8, [r3, #3004]
-.L2162:
-	ldr	r0, .L2198+8
-	str	r3, [sp, #4]
-	bl	allocate_new_data_superblock
-	ldr	r3, [sp, #4]
-	ldr	r2, [r3, #3004]
-	ldr	r3, .L2198+20
-	cmp	r2, #0
-	movne	r6, r3
-	b	.L2163
+	mov	r0, r7
+	bl	IsBlkInGcList
+	cmp	r0, #0
+	add	r0, r8, #1
+	strneh	r0, [r4, r5]	@ movhi
+	bne	.L2196
+	ldr	ip, .L2202+12
+	movw	r8, #3916
+	movw	sl, #3848
+	ldr	r2, [r4, #-2016]
+	mov	r3, r7, asl #1
+	uxth	r0, r0
+	ldrh	r8, [ip, r8]
+	ldrh	ip, [ip, sl]
+	strh	r0, [r4, r5]	@ movhi
+	ldrh	r1, [r2, r3]
+	mul	r8, ip, r8
+	add	ip, r8, r8, lsr #31
+	cmp	r1, ip, asr #1
+	bgt	.L2161
+	cmp	r0, #48
+	bls	.L2162
+	cmp	r1, #8
+	bls	.L2162
+	ldr	r1, .L2202+60
+	ldrh	r1, [r4, r1]
+	cmp	r1, #35
+	bhi	.L2162
 .L2161:
-	str	r1, [r3, #3004]
-	ldr	r3, .L2198+24
-	ldrh	r3, [r8, r3]
-	cmp	r3, #0
-	movne	r6, r2
+	mov	r1, #0
+	strh	r1, [r4, r5]	@ movhi
+.L2162:
+	ldrh	r3, [r2, r3]
+	movw	r2, #65535
+	ldr	sl, .L2202
+	cmp	r3, r8
+	cmpge	fp, r2
+	movne	r8, #0
+	moveq	r8, #1
 	bne	.L2163
-	mov	r0, r6
-	bl	allocate_new_data_superblock
+	ldr	r3, .L2202+16
+	mvn	r2, #0
+	strh	r2, [sl, r3]	@ movhi
+	add	r3, r3, #572
+	mov	r2, #0
+	strh	r2, [sl, r3]	@ movhi
+	mov	r3, #432
+	ldrh	r0, [sl, r3]
+	b	.L2139
 .L2163:
-	ldrh	r3, [r6, #4]
 	cmp	r3, #0
 	bne	.L2164
-	mov	r0, r6
-	bl	allocate_new_data_superblock
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r4, r5]
+	add	r3, r3, #1
+	strh	r3, [r4, r5]	@ movhi
+	b	.L2196
 .L2164:
-	ldr	r3, .L2198
-	str	r6, [r3, #440]
-.L2160:
-	ldr	r2, .L2198
-	mov	r8, r6
-	ldrh	r3, [r6, #4]
-	ldr	r1, [r2, #-976]
-	ldr	r2, [r4, #3968]
-	rsb	r2, r2, r1
-	cmp	r3, r2
-	movcc	r2, r3
-	ldr	r3, [sp, #20]
-	cmp	r2, r3
-	movcc	r3, r2
-	str	r3, [sp, #52]
-	mov	r3, #0
-	str	r3, [sp, #28]
-	b	.L2165
-.L2181:
-	ldrh	r3, [r8, #4]
+	ldr	r3, .L2202+12
+	strb	r8, [sl, #-1752]
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2166
-	ldr	r6, [sp, #36]
-	rsb	r2, r6, r5
-	ldr	r6, [sp, #24]
-	rsbs	r3, r2, #0
-	adc	r3, r3, r2
-	tst	r3, r6
-	beq	.L2167
-	ldr	r6, [sp, #28]
-	cmp	r6, #0
-	beq	.L2167
-	movw	lr, #3922
-	ldr	r6, [sp, #32]
-	ldrh	r2, [r4, lr]
-	add	r1, r6, r7
-	mls	r1, r2, r5, r1
-	cmp	r1, r2
+	beq	.L2165
+	mov	r0, r7
+	bl	ftl_get_blk_mode
+	strb	r0, [sl, #-1752]
+.L2165:
+	ldr	r4, .L2202
+	sub	r0, r4, #1760
+	bl	make_superblock
+	movw	r1, #434
+	mov	r3, #0
+	strh	r3, [r4, r1]	@ movhi
+	ldr	r1, .L2202+16
+	ldr	r0, [r4, #-2016]
+	ldrh	r1, [r4, r1]
+	mov	r1, r1, asl #1
+	ldrh	r0, [r0, r1]
+	mov	r1, #436
+	strb	r3, [r4, #-1754]
+	strh	r0, [r4, r1]	@ movhi
+	ldr	r1, .L2202+52
+	strh	r3, [r4, r1]	@ movhi
+.L2156:
+	ldr	sl, [sp, #16]
+	cmp	sl, #1
 	bne	.L2166
+	bl	FtlReadRefresh
+.L2166:
+	ldr	r3, .L2202
+	mov	r2, #1
+	movw	r1, #3916
+	str	r2, [r3, #-996]
+	ldr	r2, .L2202+12
+	ldrh	r9, [r2, r1]
+	ldrb	r1, [r2, #928]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L2167
+	ldrb	r1, [r3, #-1752]	@ zero_extendqisi2
+	cmp	r1, #1
+	movweq	r1, #3918
+	ldreqh	r9, [r2, r1]
 .L2167:
-	add	r1, sp, #56
-	mov	r2, #0
-	mov	r0, r5
-	str	r3, [sp, #4]
-	bl	log2phys
-	mov	r0, r8
-	bl	get_new_active_ppa
-	ldr	lr, [r4, #3968]
-	ldr	r1, [r4, #3972]
-	movw	r2, #3928
-	mov	ip, #36
-	ldrh	r2, [r4, r2]
-	ldr	r6, .L2198
-	mla	r1, ip, lr, r1
-	mul	lr, lr, r2
-	ldr	r6, [r6, #-928]
-	bic	lr, lr, #3
-	str	r6, [sp, #48]
-	str	lr, [sp, #44]
-	add	r6, r6, lr
-	str	r5, [r1, #16]
-	str	r6, [r1, #12]
-	str	r0, [r1, #4]
-	movw	r0, #3926
-	ldrh	lr, [r4, r0]
-	ldr	r0, [r4, #3968]
-	mul	lr, r0, lr
-	ldr	r0, .L2198
-	bic	lr, lr, #3
-	str	lr, [sp, #12]
-	ldr	lr, [r0, #-948]
-	ldr	r0, [sp, #12]
-	add	lr, lr, r0
-	mov	r0, r6
-	str	lr, [r1, #8]
-	mov	r1, #0
-	str	ip, [sp, #8]
-	bl	ftl_memset
-	ldr	r1, [sp, #16]
-	ldr	ip, [sp, #8]
-	rsb	r3, r1, r5
-	rsbs	r1, r3, #0
-	adc	r1, r1, r3
-	ldr	r3, [sp, #4]
-	str	r1, [sp, #12]
-	orrs	r1, r1, r3
-	beq	.L2168
-	ldr	r2, [sp, #12]
-	cmp	r2, #0
-	beq	.L2169
-	movw	r3, #3922
-	mov	r0, r7
-	ldrh	fp, [r4, r3]
-	mov	r1, fp
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #32]
-	rsb	fp, r1, fp
-	str	r1, [sp, #40]
-	cmp	fp, r3
-	movcs	fp, r3
-	b	.L2170
-.L2169:
-	cmp	r3, #0
-	beq	.L2170
-	ldr	r3, [sp, #32]
-	movw	lr, #3922
-	add	fp, r3, r7
-	ldrh	r3, [r4, lr]
-	mls	fp, r3, r5, fp
-	ldr	r3, [sp, #12]
-	str	r3, [sp, #40]
-	uxth	fp, fp
-.L2170:
-	movw	lr, #3922
-	ldrh	r3, [r4, lr]
-	cmp	fp, r3
-	bne	.L2171
-	ldr	r3, [sp, #12]
-	ldr	r0, [sl, #3968]
-	cmp	r3, #0
-	ldr	r2, [sl, #3972]
-	ldr	r3, [sp, #24]
-	muleq	r1, r5, fp
-	movne	r1, r9
-	rsbeq	r1, r7, r1
-	addeq	r1, r9, r1, asl #9
-	cmp	r3, #0
-	mov	r3, #36
-	mla	r3, r3, r0, r2
-	strne	r1, [r3, #8]
-	bne	.L2174
-	ldr	r0, [r3, #8]
-	movw	r3, #3926
-	ldrh	r2, [sl, r3]
-	b	.L2196
+	ldr	r2, .L2202+52
+	mov	r8, #0
+	str	fp, [sp, #20]
+	mov	fp, r9
+	ldr	r4, .L2202
+	ldrh	r3, [r3, r2]
+	add	r2, r3, r6
+	cmp	r2, r9
+	rsbgt	r6, r3, r9
+	uxthgt	r6, r6
+	b	.L2169
 .L2171:
-	ldr	r2, [sp, #56]
-	mov	r3, #36
-	cmn	r2, #1
-	beq	.L2175
-	ldr	r1, [r4, #3968]
-	add	r0, sp, #60
-	str	r2, [sp, #64]
-	ldr	r2, [r4, #3972]
-	str	r5, [sp, #76]
-	mla	r3, r3, r1, r2
-	mov	r1, #1
-	ldr	r2, [r3, #8]
-	ldr	r3, [r3, #12]
-	str	r2, [sp, #68]
-	mov	r2, #0
-	str	r3, [sp, #72]
+	ldrh	r1, [r2, #2]!
+	movw	sl, #65535
+	add	r3, r3, #1
+	cmp	r1, sl
+	uxth	r3, r3
+	orrne	r1, ip, r1, asl #10
+	mlane	sl, r0, r7, lr
+	addne	r7, r7, #1
+	uxthne	r7, r7
+	strne	r1, [sl, #4]
+.L2177:
+	cmp	r3, r5
+	bne	.L2171
+	ldr	r0, [r4, #-1164]
+	mov	r1, r7
+	ldrb	r2, [r4, #-1752]	@ zero_extendqisi2
+	mov	r5, #0
 	bl	FlashReadPages
-	ldr	r3, [sp, #60]
-	cmn	r3, #1
-	ldr	r3, .L2198
-	ldreq	r2, [r3, #-1636]
-	addeq	r2, r2, #1
-	streq	r2, [r3, #-1636]
-	beq	.L2177
-	ldr	r2, [r6, #8]
-	cmp	r2, r5
-	beq	.L2177
-	ldr	r2, [r3, #-1636]
-	ldr	r0, .L2198+28
-	add	r2, r2, #1
-	str	r2, [r3, #-1636]
-	mov	r2, r5
-	ldr	r1, [r6, #8]
-	bl	printk
-	b	.L2177
-.L2175:
-	ldr	r1, [r4, #3968]
-	ldr	r2, [r4, #3972]
-	mla	r3, r3, r1, r2
-	mov	r1, #0
-	ldr	r0, [r3, #8]
-	movw	r3, #3926
+	mov	r9, r5
+	mov	sl, r6
+	b	.L2172
+.L2175:
+	ldr	r3, [r4, #-1164]
+	add	r2, r3, r5
+	ldr	r3, [r3, r5]
+	ldr	r6, [r2, #12]
+	cmn	r3, #1
+	beq	.L2173
+	ldrh	r3, [r6, #0]
+	movw	r1, #61589
+	cmp	r3, r1
+	bne	.L2173
+	add	r1, sp, #28
+	mov	r2, #0
+	ldr	r0, [r6, #8]
+	bl	log2phys
+	ldr	r1, [r4, #-1164]
+	ldr	r2, [sp, #28]
+	add	r1, r1, r5
+	bic	r2, r2, #-2147483648
+	ldr	r3, [r1, #4]
+	cmp	r2, r3
+	bne	.L2173
+	movw	r3, #434
+	ldr	r0, [r4, #-1180]
 	ldrh	r2, [r4, r3]
-	bl	ftl_memset
-.L2177:
-	ldr	r3, [sp, #12]
-	ldr	r1, [r4, #3968]
-	cmp	r3, #0
-	ldr	r2, [r4, #3972]
+	ldr	r1, [r1, #16]
+	add	r2, r2, #1
+	strh	r2, [r4, r3]	@ movhi
+	ldr	r2, [r4, #-968]
 	mov	r3, #36
-	movweq	lr, #3922
+	mla	r2, r3, r0, r2
+	str	r1, [r2, #16]
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r2, [sp, #8]
+	ldr	r1, [r4, #-1180]
+	str	r0, [r2, #4]
+	ldr	r3, [sp, #12]
+	ldr	r2, [r4, #-968]
 	mla	r3, r3, r1, r2
-	ldreqh	r1, [r4, lr]
-	movne	r1, r9
-	mov	r2, fp, asl #9
-	muleq	r1, r1, r5
-	ldrne	r0, [r3, #8]
-	ldrne	r3, [sp, #40]
-	rsbeq	r1, r7, r1
-	ldreq	r0, [r3, #8]
-	addne	r0, r0, r3, asl #9
-	addeq	r1, r9, r1, asl #9
-	b	.L2196
-.L2168:
-	ldr	r3, [sp, #24]
-	ldr	r2, [r4, #3968]
+	ldr	r2, [r4, #-1164]
+	add	r2, r2, r5
+	ldr	r1, [r2, #8]
+	str	r1, [r3, #8]
+	mov	r1, #1
+	ldr	r2, [r2, #12]
+	str	r2, [r3, #12]
+	ldr	r3, [sp, #28]
+	str	r3, [r6, #12]
+	ldr	r3, .L2202+44
+	ldrh	r3, [r4, r3]
+	strh	r3, [r6, #2]	@ movhi
+	ldr	r3, [r4, #-1800]
+	ldr	r0, [r4, #-1164]
+	str	r3, [r6, #4]
+	add	r0, r0, r5
+	ldr	r3, [r4, #-1180]
+	add	r3, r3, #1
+	str	r3, [r4, #-1180]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L2202+12
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2174
+	ldrb	r3, [r4, #-1893]	@ zero_extendqisi2
+	ldr	r2, [r4, #-1180]
+	cmp	r2, r3
+	beq	.L2174
+	ldr	r3, .L2202+64
+	ldrh	r3, [r4, r3]
+	cmp	r3, #0
+	bne	.L2173
+.L2174:
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	ldrne	r3, .L2202
+	movne	r2, #0
+	strne	r2, [r3, #-996]
+	movne	r2, #432
+	bne	.L2201
+.L2173:
+	add	r9, r9, #1
+	add	r5, r5, #36
+	uxth	r9, r9
+.L2172:
+	cmp	r9, r7
+	bne	.L2175
+	add	r8, r8, #1
+	mov	r6, sl
+.L2169:
+	uxth	r3, r8
+	ldr	r7, .L2202
+	cmp	r3, r6
+	ldr	r3, .L2202+52
+	bcs	.L2176
+	ldr	r1, .L2202+12
+	movw	r2, #3848
+	ldrh	ip, [r4, r3]
+	mov	r7, #0
+	ldr	lr, [r4, #-1164]
+	mov	r3, r7
+	ldrh	r5, [r1, r2]
+	add	ip, ip, r8
+	ldr	r2, .L2202+68
+	mov	r0, #36
+	b	.L2177
+.L2176:
+	ldrh	r2, [r7, r3]
+	mov	r9, fp
+	ldr	fp, [sp, #20]
+	add	r6, r6, r2
+	uxth	r6, r6
+	strh	r6, [r7, r3]	@ movhi
+	cmp	r6, r9
+	bcc	.L2178
+	ldr	r3, [r7, #-1180]
 	cmp	r3, #0
-	ldr	r3, [r4, #3972]
-	mla	ip, ip, r2, r3
 	beq	.L2179
-	movw	lr, #3922
-	ldrh	r3, [r4, lr]
-	mul	r3, r3, r5
-	rsb	r3, r7, r3
-	add	r3, r9, r3, asl #9
-	str	r3, [ip, #8]
-	b	.L2174
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	movne	r3, #0
+	strne	r3, [r7, #-996]
+	movne	r3, #432
+	ldrneh	r0, [r7, r3]
+	bne	.L2139
 .L2179:
-	movw	r0, #3922
-	movw	r3, #3926
-	ldrh	r1, [r4, r0]
-	ldrh	r2, [r4, r3]
-	ldr	r0, [ip, #8]
-	mul	r1, r1, r5
-	rsb	r1, r7, r1
-	add	r1, r9, r1, asl #9
-.L2196:
-	bl	memcpy
-.L2174:
-	ldr	r3, .L2198+32
-	ldr	r0, [sp, #48]
-	ldr	lr, [sp, #44]
-	strh	r3, [r0, lr]	@ movhi
-	ldr	r3, .L2198
-	str	r5, [r6, #8]
-	add	r5, r5, #1
-	ldr	r2, [r3, #-1800]
-	str	r2, [r6, #4]
-	add	r2, r2, #1
+	ldr	r3, .L2202
+	movw	r2, #434
+	ldrh	ip, [r3, r2]
+	cmp	ip, #0
+	bne	.L2180
+	ldr	r2, .L2202+16
+	ldr	r0, [r3, #-2016]
+	ldrh	r1, [r3, r2]
+	mov	r1, r1, asl #1
+	ldrh	r4, [r0, r1]
+	cmp	r4, #0
+	beq	.L2180
+	strh	ip, [r0, r1]	@ movhi
+	ldrh	r0, [r3, r2]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2180:
+	ldr	r3, .L2202+16
+	mvn	r1, #0
+	ldr	r2, .L2202
+	strh	r1, [r2, r3]	@ movhi
+.L2178:
+	ldr	r3, .L2202
+	ldr	r2, .L2202+20
+	ldrh	r2, [r3, r2]
+	cmp	r2, #2
+	ldrls	r2, .L2202+12
+	movwls	r3, #3916
+	ldrlsh	r6, [r2, r3]
+	bls	.L2197
+.L2181:
+	mov	r1, #0
+	str	r1, [r3, #-996]
+	mov	r1, #432
+	ldrh	r0, [r3, r1]
+	cmp	r0, #0
+	addeq	r0, r2, #1
+.L2139:
+	add	sp, sp, #36
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L2203:
+	.align	2
+.L2202:
+	.word	.LANCHOR2
+	.word	-1140
+	.word	-1142
+	.word	.LANCHOR0
+	.word	-1760
+	.word	-2000
+	.word	-1194
+	.word	-1188
+	.word	.LC149
+	.word	-1196
+	.word	.LC150
+	.word	-1900
+	.word	-1776
+	.word	-1758
+	.word	-1948
+	.word	-1156
+	.word	-1896
+	.word	.LANCHOR2-1746
+	.fnend
+	.size	ftl_do_gc.part.23, .-ftl_do_gc.part.23
+	.align	2
+	.global	ftl_do_gc
+	.type	ftl_do_gc, %function
+ftl_do_gc:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L2211
+	mov	r5, r1
+	ldr	r0, [r3, #4040]
+	cmp	r0, #0
+	movne	r0, #0
+	ldmnefd	sp!, {r3, r4, r5, pc}
+	ldr	r3, .L2211+4
+	ldr	r2, [r3, #-996]
+	cmp	r2, #0
+	ldmnefd	sp!, {r3, r4, r5, pc}
+	ldr	r1, .L2211+8
+	ldrh	r1, [r3, r1]
+	cmp	r1, #47
+	movls	r0, r2
+	ldmlsfd	sp!, {r3, r4, r5, pc}
+	ldr	r1, .L2211+12
+	movw	r2, #3000
+	ldrh	r1, [r1, r2]
+	movw	r2, #65535
+	cmp	r1, r2
+	beq	.L2206
+	ldr	r1, .L2211+16
+	ldrh	r3, [r3, r1]
+	cmp	r3, r2
+	beq	.L2206
+	mov	r0, #1
+	bl	FtlGcFreeTempBlock
+	cmp	r0, #0
+	bne	.L2210
+.L2206:
+	mov	r0, r4
+	mov	r1, r5
+	ldmfd	sp!, {r3, r4, r5, lr}
+	b	ftl_do_gc.part.23
+.L2210:
+	mov	r0, #1
+	ldmfd	sp!, {r3, r4, r5, pc}
+.L2212:
+	.align	2
+.L2211:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	-2008
+	.word	.LANCHOR1
+	.word	-1900
+	.fnend
+	.size	ftl_do_gc, .-ftl_do_gc
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2236
+	stmfd	sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
+	.save {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
+	ldr	r4, [r3, #440]
+	ldr	r3, .L2236+4
+	ldr	r2, [r3, #4040]
+	cmp	r2, #0
+	bne	.L2214
+	ldr	r1, [r3, #3968]
+	cmp	r1, #0
+	beq	.L2214
+	ldrb	r8, [r3, #928]	@ zero_extendqisi2
+	cmp	r8, #0
+	beq	.L2215
+	ldrb	r8, [r4, #8]	@ zero_extendqisi2
+	sub	lr, r8, #1
+	rsbs	r8, lr, #0
+	adc	r8, r8, lr
+.L2215:
+	ldr	r5, .L2236+4
+	mov	r2, r8
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r6, #0
+	mov	r7, r6
+	ldr	r9, .L2236
+	ldr	r0, [r5, #3972]
+	bl	FlashProgPages
+	b	.L2216
+.L2221:
+	ldr	r2, [r5, #3972]
+	add	r3, r2, r6
+	ldr	r2, [r2, r6]
 	cmn	r2, #1
-	str	r2, [r3, #-1800]
-	moveq	r2, #0
-	streq	r2, [r3, #-1800]
-	ldr	r3, [sp, #56]
-	str	r3, [r6, #12]
-	ldrh	r3, [r8, #0]
-	strh	r3, [r6, #2]	@ movhi
-	ldr	r3, [r4, #3968]
-	add	r3, r3, #1
-	str	r3, [r4, #3968]
-	ldr	r3, [sp, #28]
-	add	r3, r3, #1
-	str	r3, [sp, #28]
-.L2165:
-	ldr	r6, [sp, #28]
-	ldr	r3, [sp, #52]
-	cmp	r6, r3
-	bne	.L2181
-.L2166:
-	ldr	r3, [sp, #20]
-	mov	r6, r8
-	ldr	lr, [sp, #28]
-	ldr	r2, [r4, #3968]
-	rsb	r3, lr, r3
-	str	r3, [sp, #20]
-	ldr	r3, .L2198
-	ldr	r0, [sp, #24]
-	ldr	r3, [r3, #-976]
-	cmp	r2, r3
-	orrcs	r0, r0, #1
-	uxtb	r3, r0
-	cmp	r3, #0
-	bne	.L2182
-	ldrh	r2, [r8, #4]
+	beq	.L2235
+	ldr	r2, [r3, #4]
+	cmp	r8, #0
+	ldr	r0, [r3, #16]
+	add	r1, sp, #4
+	str	r2, [sp, #4]
+	orrne	r2, r2, #-2147483648
+	strne	r2, [sp, #4]
+	mov	r2, #1
+	bl	log2phys
+	ldr	r3, [r5, #3972]
+	add	r3, r3, r6
+	ldr	r3, [r3, #12]
+	ldr	r0, [r3, #12]
+	cmn	r0, #1
+	beq	.L2219
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r2, [r9, #-2016]
+	mov	r3, r0, asl #1
+	mov	sl, r0
+	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	bne	.L2192
-.L2182:
-	bl	FtlCacheWriteBack
-	ldr	lr, [sp, #20]
+	bne	.L2220
+	ldr	r0, .L2236+8
+	mov	r1, sl
+	bl	printk
+.L2220:
+	mov	r0, sl
+	bl	decrement_vpc_count
+.L2219:
+	add	r7, r7, #1
+	add	r6, r6, #36
+.L2216:
+	ldr	r3, [r5, #3968]
+	cmp	r7, r3
+	bcc	.L2221
+	b	.L2222
+.L2231:
+	ldr	r3, [r5, #3972]
+	mvn	r2, #0
+	ldr	r7, .L2236
+	str	r2, [r3, r6]
+	b	.L2223
+.L2227:
+	ldr	r0, [r3, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4, #0]
+	cmp	r3, r0
+	bne	.L2224
+	ldr	r2, [r7, #-2016]
+	mov	r3, r3, asl #1
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r2, r3]
+	rsb	r1, r1, r0
+	strh	r1, [r2, r3]	@ movhi
+	movw	r3, #3916
+	ldrh	r3, [r5, r3]
+	strh	r3, [r4, #2]	@ movhi
 	mov	r3, #0
-	str	r3, [sl, #3968]
-	cmp	lr, #1
-	ldr	r3, [sp, #24]
-	movls	r3, #0
-.L2192:
-	str	r3, [sp, #24]
-.L2195:
-	ldr	r3, [sp, #20]
-	ldr	r8, .L2198
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2224:
+	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L2184
-	mov	r0, r3
-	ldr	r6, [sp, #36]
-	ldr	r3, [sp, #16]
-	rsb	r1, r3, r6
-	bl	ftl_do_gc
-	ldr	r3, .L2198+36
-	ldrh	r3, [r8, r3]
-	cmp	r3, #31
-	bhi	.L2157
-	ldr	r2, .L2198+40
-	mov	r3, #128
-	mov	r4, #16
-	strh	r3, [r8, r2]	@ movhi
-	sub	r2, r2, #2
-	strh	r3, [r8, r2]	@ movhi
-.L2185:
-	mov	r0, #0
+	bne	.L2225
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L2225:
+	ldr	r3, [r7, #-1612]
+	add	r3, r3, #1
+	str	r3, [r7, #-1612]
+	ldr	r3, [r5, #3972]
+	add	r3, r3, r6
+	ldr	r0, [r3, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
 	mov	r1, #1
-	bl	ftl_do_gc
-	ldr	r3, [r8, #-2088]
+	mov	r2, r8
+	mov	r3, r0
+	str	r0, [sp, #4]
+	ldr	r0, [r5, #3972]
+	add	r0, r0, r6
+	str	r3, [r0, #4]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	ldr	r3, [r5, #3972]
+	ldr	r3, [r3, r6]
+	cmn	r3, #1
+	moveq	r3, #1
+	streq	r3, [r5, #4040]
+	ldr	r3, [r9, #4040]
 	cmp	r3, #0
-	bne	.L2157
+	bne	.L2214
+.L2223:
+	ldr	r2, [r5, #3972]
+	add	r3, r2, r6
+	ldr	r2, [r2, r6]
+	cmn	r2, #1
+	beq	.L2227
+	ldr	r2, [r3, #4]
+	cmp	r8, #0
+	ldr	r0, [r3, #16]
+	add	r1, sp, #4
+	str	r2, [sp, #4]
+	orrne	r2, r2, #-2147483648
+	strne	r2, [sp, #4]
+	mov	r2, #1
+	bl	log2phys
+	ldr	r3, [r5, #3972]
+	add	r3, r3, r6
+	ldr	r3, [r3, #12]
+	ldr	r0, [r3, #12]
+	cmn	r0, #1
+	beq	.L2229
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2236
+	ldr	r2, [r3, #-2016]
+	mov	r3, r0, asl #1
+	mov	r7, r0
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	bne	.L2230
+	ldr	r0, .L2236+8
+	mov	r1, r7
+	bl	printk
+.L2230:
+	mov	r0, r7
+	bl	decrement_vpc_count
+.L2229:
+	add	sl, sl, #1
+	add	r6, r6, #36
+	b	.L2217
+.L2235:
+	ldr	r5, .L2236+4
+	mov	r6, #0
+	mov	sl, r6
+	mov	r9, r5
+.L2217:
+	ldr	r3, [r5, #3968]
+	cmp	sl, r3
+	bcc	.L2231
+	movw	r4, #16386
+	ldr	r6, .L2236
+	ldr	r5, .L2236+12
+	b	.L2232
+.L2233:
+	mov	r0, #1
+	mov	r1, r0
+	bl	ftl_do_gc
 	subs	r4, r4, #1
-	bne	.L2185
-.L2157:
+	beq	.L2222
+.L2232:
+	ldrh	r3, [r6, r5]
+	cmp	r3, #0
+	bne	.L2233
+.L2222:
+	ldr	r3, .L2236+4
+	mov	r2, #0
+	str	r2, [r3, #3968]
+.L2214:
 	mov	r0, #0
-	add	sp, sp, #100
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2199:
+	ldmfd	sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, pc}
+.L2237:
 	.align	2
-.L2198:
+.L2236:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
-	.word	.LANCHOR2-1996
-	.word	.LANCHOR1
-	.word	-1944
-	.word	.LANCHOR2-1948
-	.word	-1992
-	.word	.LC139
-	.word	-3947
-	.word	-2000
-	.word	-1194
+	.word	.LC151
+	.word	-1138
 	.fnend
-	.size	ftl_write.part.22, .-ftl_write.part.22
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
+	.global	ftl_cache_flush
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	mov	ip, r0
-	mov	r0, r1
-	mov	r1, r2
-	mov	r2, r3
-	ldr	r3, .L2205
-	ldr	r3, [r3, #-2088]
+	b	FtlCacheWriteBack
+	.fnend
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.align	2
+	.global	rk_ftl_cache_write_back
+	.type	rk_ftl_cache_write_back, %function
+rk_ftl_cache_write_back:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FtlCacheWriteBack
+	.fnend
+	.size	rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	ldr	r3, .L2242
+	ldr	r3, [r3, #4040]
 	cmp	r3, #0
-	movne	r0, #0
-	bxne	lr
-	cmp	ip, #16
-	bne	.L2202
-	add	r0, r0, #256
-	b	FtlVendorPartWrite
-.L2202:
-	ldr	r3, .L2205+4
-	add	ip, r1, r0
-	ldr	r3, [r3, #3956]
-	cmp	ip, r3
-	bhi	.L2204
-	b	ftl_write.part.22
-.L2204:
-	mvn	r0, #0
-	bx	lr
-.L2206:
+	bne	.L2241
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2241:
+	mov	r0, #0
+	ldmfd	sp!, {r3, pc}
+.L2243:
 	.align	2
-.L2205:
-	.word	.LANCHOR2
+.L2242:
 	.word	.LANCHOR0
 	.fnend
-	.size	ftl_write, .-ftl_write
+	.size	FtlSysFlush, .-FtlSysFlush
 	.align	2
-	.global	FtlWrite
-	.type	FtlWrite, %function
-FtlWrite:
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_write
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	ldr	r3, .L2246
+	ldr	r3, [r3, #2996]
+	cmp	r3, #1
+	bne	.L2245
+	bl	FtlSysFlush
+.L2245:
+	mov	r0, #0
+	ldmfd	sp!, {r3, pc}
+.L2247:
+	.align	2
+.L2246:
+	.word	.LANCHOR1
 	.fnend
-	.size	FtlWrite, .-FtlWrite
+	.size	FtlDeInit, .-FtlDeInit
 	.align	2
-	.global	ftl_sys_write
-	.type	ftl_sys_write, %function
-ftl_sys_write:
+	.global	ftl_deinit
+	.type	ftl_deinit, %function
+ftl_deinit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	ip, r1
-	mov	r3, r2
-	add	r1, r0, #256
-	mov	r2, ip
-	mov	r0, #16
-	b	ftl_write
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	bl	ftl_flash_de_init
+	bl	FtlDeInit
+	ldmfd	sp!, {r3, lr}
+	b	ftl_flash_de_init
 	.fnend
-	.size	ftl_sys_write, .-ftl_sys_write
+	.size	ftl_deinit, .-ftl_deinit
 	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-	mov	r4, r1
-	mov	r5, r0
-	bl	rknand_device_lock
-	mov	r2, r4
-	mov	r1, #1
-	mov	r0, r5
-	bl	ftl_sys_write
-	mov	r4, r0
-	bl	rknand_device_unlock
-	mov	r0, r4
-	ldmfd	sp!, {r3, r4, r5, pc}
+	stmfd	sp!, {r3, lr}
+	.save {r3, lr}
+	mov	r1, #0
+	ldr	r0, .L2250
+	bl	printk
+	ldmfd	sp!, {r3, lr}
+	b	ftl_deinit
+.L2251:
+	.align	2
+.L2250:
+	.word	.LC152
 	.fnend
-	.size	StorageSysDataStore, .-StorageSysDataStore
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
 	.align	2
-	.global	ftl_vendor_write
-	.type	ftl_vendor_write, %function
-ftl_vendor_write:
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	ip, r1
-	mov	r3, r2
-	stmfd	sp!, {r4, lr}
-	.save {r4, lr}
-	mov	r4, r0
+	@ link register save eliminated.
+	b	ftl_do_gc
+	.fnend
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.align	2
+	.global	ftl_fix_nand_power_lost_error
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2262
+	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
+	.save {r4, r5, r6, r7, r8, sl, lr}
+	.pad #52
+	sub	sp, sp, #52
+	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2253
+	ldr	r4, .L2262+4
+	movw	r3, #294
+	ldr	r0, .L2262+8
+	movw	r7, #4097
+	ldrh	r6, [r4, r3]
+	ldr	r3, [r4, #-2016]
+	mov	r5, r6, asl #1
+	mov	r1, r6
+	ldrh	r2, [r3, r5]
+	bl	printk
+	ldr	r3, .L2262+12
+	ldrh	r0, [r4, r3]
+	bl	FtlGcRefreshOpenBlock
+	ldr	r3, .L2262+16
+	ldrh	r0, [r4, r3]
+	bl	FtlGcRefreshOpenBlock
+	ldr	r0, .L2262+20
+	bl	allocate_new_data_superblock
+	ldr	r0, .L2262+24
+	bl	allocate_new_data_superblock
+	b	.L2255
+.L2257:
+	mov	r0, #1
+	mov	r1, r0
+	bl	ftl_do_gc
+	ldr	r3, [r4, #-2016]
+	ldrh	r3, [r3, r5]
+	cmp	r3, #0
+	beq	.L2256
+.L2255:
+	subs	r7, r7, #1
+	bne	.L2257
+.L2256:
+	ldr	r4, .L2262+4
+	mov	r1, r6
+	ldr	r0, .L2262+8
+	ldr	r3, [r4, #-2016]
+	ldrh	r2, [r3, r5]
+	bl	printk
+	ldr	r3, [r4, #-2016]
+	ldrh	r4, [r3, r5]
+	cmp	r4, #0
+	bne	.L2258
+	add	r7, sp, #48
+	mov	r0, sp
+	strh	r6, [r7, #-48]!	@ movhi
+	add	r7, r7, #14
+	bl	make_superblock
+	ldr	r3, .L2262
+	movw	r2, #3848
+	movw	lr, #65535
+	mov	ip, #36
 	mov	r1, r4
-	mov	r0, #16
-	mov	r2, ip
-	ldmfd	sp!, {r4, lr}
-	b	ftl_write
+	ldrh	r8, [r3, r2]
+	ldr	sl, [r3, #4044]
+	mov	r3, r4
+	b	.L2259
+.L2261:
+	ldrh	r0, [r7, #2]!
+	cmp	r0, lr
+	beq	.L2260
+	mla	r2, ip, r4, sl
+	add	r4, r4, #1
+	mov	r0, r0, asl #10
+	uxth	r4, r4
+	stmib	r2, {r0, r1}
+	str	r1, [r2, #12]
+.L2260:
+	add	r3, r3, #1
+	uxth	r3, r3
+.L2259:
+	cmp	r3, r8
+	bne	.L2261
+	ldr	r3, .L2262+4
+	mov	r1, r6
+	ldr	r0, .L2262+28
+	ldr	r3, [r3, #-2016]
+	ldrh	r2, [r3, r5]
+	ldr	r5, .L2262
+	bl	printk
+	mov	r1, #0
+	mov	r2, r4
+	ldr	r0, [r5, #4044]
+	bl	FlashEraseBlocks
+	ldr	r0, [r5, #4044]
+	mov	r1, #1
+	mov	r2, r4
+	bl	FlashEraseBlocks
+.L2258:
+	ldr	r2, .L2262+4
+	movw	r3, #294
+	mvn	r1, #0
+	strh	r1, [r2, r3]	@ movhi
+.L2253:
+	add	sp, sp, #52
+	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, pc}
+.L2263:
+	.align	2
+.L2262:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC153
+	.word	-1996
+	.word	-1948
+	.word	.LANCHOR2-1996
+	.word	.LANCHOR2-1948
+	.word	.LC154
 	.fnend
-	.size	ftl_vendor_write, .-ftl_vendor_write
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.align	2
-	.global	FlashBootVendorWrite
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
+	.global	FtlInit
+	.type	FtlInit, %function
+FtlInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.L2265:
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-	mov	r6, r0
-	mov	r5, r1
-	mov	r4, r2
-	bl	rknand_device_lock
-	mov	r2, r4
-	mov	r1, r5
-	mov	r0, r6
-	bl	ftl_vendor_write
-	mov	r4, r0
-	bl	rknand_device_unlock
-	mov	r0, r4
+	mvn	r3, #0
+	ldr	r4, .L2275
+	ldr	r6, .L2275+4
+	ldr	r5, .L2275+8
+	ldr	r1, .L2275+12
+	str	r3, [r6, #2996]
+	mov	r3, #0
+	ldr	r0, .L2275+16
+	str	r3, [r4, #4040]
+	str	r3, [r5, #444]
+	bl	printk
+	ldr	r0, .L2275+20
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r0, [r4, #3852]
+	uxth	r0, r0
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cmp	r0, #0
+	ldrne	r0, .L2275+24
+	bne	.L2274
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	beq	.L2268
+	ldr	r0, .L2275+28
+.L2274:
+	ldr	r1, .L2275+32
+	bl	printk
+	b	.L2267
+.L2268:
+	mov	r1, #1
+	str	r1, [r6, #2996]
+	bl	ftl_do_gc
+	ldr	r3, .L2275+36
+	ldrh	r3, [r5, r3]
+	cmp	r3, #15
+	bhi	.L2269
+	mov	r4, #1024
+.L2270:
+	mov	r0, #1
+	mov	r1, r0
+	bl	ftl_do_gc
+	subs	r4, r4, #1
+	bne	.L2270
+	b	.L2267
+.L2269:
+	ldrb	r3, [r4, #928]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2267
+	mov	r4, #128
+.L2271:
+	mov	r0, #1
+	mov	r1, r0
+	bl	ftl_do_gc
+	subs	r4, r4, #1
+	bne	.L2271
+.L2267:
+	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, pc}
-	.fnend
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+.L2276:
 	.align	2
-	.global	ftl_read
-	.type	ftl_read, %function
-ftl_read:
+.L2275:
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LC79
+	.word	.LC78
+	.word	.LANCHOR0+3048
+	.word	.LC155
+	.word	.LC156
+	.word	.LANCHOR3+69
+	.word	-2000
+	.fnend
+	.size	FtlInit, .-FtlInit
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 64
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	cmp	r0, #16
-	.pad #68
-	sub	sp, sp, #68
+	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
+	.save {r0, r1, r2, r4, r5, r6, r7, lr}
+	add	r2, r1, r0
+	ldr	r5, .L2287
+	mov	r7, r0
 	mov	r4, r1
-	mov	r8, r3
-	str	r2, [sp, #28]
-	bne	.L2213
-	add	r0, r1, #256
-	mov	r1, r2
-	mov	r2, r3
-	bl	FtlVendorPartRead
-	str	r0, [sp, #16]
-	b	.L2214
-.L2213:
-	ldr	r3, [sp, #28]
-	add	r3, r3, r1
-	str	r3, [sp, #20]
-	ldr	r3, .L2243
-	ldr	r1, [sp, #20]
-	ldr	r2, [r3, #3956]
-	cmp	r1, r2
-	mvnhi	r3, #0
-	strhi	r3, [sp, #16]
-	bhi	.L2214
-	movw	r2, #3922
-	mov	r0, r4
-	ldrh	r5, [r3, r2]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #20]
-	mov	r1, r5
-	str	r0, [sp, #12]
-	sub	r0, r3, #1
-	bl	__aeabi_uidiv
-	ldr	r1, [sp, #12]
-	rsb	r3, r1, #1
-	ldr	r1, [sp, #28]
-	add	r3, r3, r0
-	str	r3, [sp, #8]
-	ldr	r3, .L2243+4
-	mov	fp, r0
-	ldr	r0, [sp, #12]
-	ldr	r2, [r3, #-1808]
-	add	r2, r1, r2
-	ldr	r1, [sp, #8]
-	str	r2, [r3, #-1808]
-	ldr	r2, [r3, #-1836]
-	add	r2, r1, r2
-	mov	r1, fp
-	str	r2, [r3, #-1836]
-	bl	FtlCacheMetchLpa
-	cmp	r0, #0
-	beq	.L2215
+	ldr	r3, [r5, #3956]
+	cmp	r2, r3
+	mvnhi	r0, #0
+	bhi	.L2278
+	cmp	r1, #31
+	bls	.L2285
+	ldr	r3, [r5, #4040]
+	cmp	r3, #0
+	bne	.L2285
 	bl	FtlCacheWriteBack
-.L2215:
-	mov	r9, #0
-	ldr	r6, [sp, #12]
-	str	r9, [sp, #32]
-	mov	r5, r9
-	str	r9, [sp, #16]
-	ldr	r7, .L2243
-	b	.L2238
-.L2232:
-	mov	r2, #0
-	mov	r0, r6
-	add	r1, sp, #60
-	bl	log2phys
-	ldr	r2, [sp, #60]
-	cmn	r2, #1
-	bne	.L2239
-	b	.L2242
-.L2220:
-	mla	r0, r0, r6, sl
-	cmp	r0, r4
-	bcc	.L2219
-	ldr	r2, [sp, #20]
-	cmp	r0, r2
-	bcs	.L2219
-	rsb	r0, r4, r0
-	mov	r1, #0
-	mov	r2, #512
-	str	r3, [sp, #4]
-	add	r0, r8, r0, asl #9
-	bl	ftl_memset
-	ldr	r3, [sp, #4]
-.L2219:
-	add	sl, sl, #1
-	b	.L2217
-.L2242:
-	mov	sl, #0
 	movw	r3, #3922
-.L2217:
-	ldrh	r0, [r7, r3]
-	cmp	sl, r0
-	bcc	.L2220
-	b	.L2221
-.L2239:
-	ldr	r3, .L2243+4
-	mov	sl, #36
-	ldr	r1, [r3, #-972]
-	mla	sl, sl, r5, r1
-	ldr	r1, [sp, #12]
-	cmp	r6, r1
-	str	r2, [sl, #4]
-	movw	r2, #3922
-	bne	.L2222
-	ldr	r3, [r3, #-944]
-	mov	r0, r4
-	str	r3, [sl, #8]
-	ldrh	r3, [r7, r2]
-	mov	r1, r3
+	ldrh	r6, [r5, r3]
+	mov	r0, r7
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mls	r7, r0, r6, r7
+	mov	r5, r0
+	uxth	r7, r7
+	cmp	r7, #0
+	beq	.L2279
+	rsb	r6, r7, r6
+	add	r5, r0, #1
+	cmp	r6, r4
+	movcs	r6, r4
+	uxth	r6, r6
+	rsb	r4, r6, r4
+.L2279:
+	mvn	r3, #0
+	ldr	r7, .L2287
 	str	r3, [sp, #4]
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #4]
-	str	r1, [sp, #36]
-	rsb	r2, r1, r3
-	ldr	r1, [sp, #28]
-	cmp	r2, r1
-	movcc	r1, r2
-	str	r1, [sp, #32]
-	cmp	r1, r3
-	streq	r8, [sl, #8]
-	b	.L2223
-.L2222:
-	cmp	r6, fp
-	ldrneh	r3, [r7, r2]
-	mulne	r3, r3, r6
-	bne	.L2240
-	ldr	r3, [r3, #-940]
-	ldrh	r2, [r7, r2]
-	ldr	r1, [sp, #20]
-	str	r3, [sl, #8]
-	mul	r3, r2, r6
-	rsb	r9, r3, r1
-	cmp	r9, r2
-	bne	.L2223
-.L2240:
-	rsb	r3, r4, r3
-	add	r3, r8, r3, asl #9
-	str	r3, [sl, #8]
-.L2223:
-	movw	r3, #3928
-	ldr	r2, .L2243+4
-	ldrh	r3, [r7, r3]
-	str	r6, [sl, #16]
-	ldr	r2, [r2, #-932]
-	mul	r3, r3, r5
-	add	r5, r5, #1
-	bic	r3, r3, #3
-	add	r3, r2, r3
-	str	r3, [sl, #12]
-.L2221:
-	ldr	r3, [sp, #8]
-	add	r6, r6, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #8]
-	beq	.L2225
-	movw	r3, #3848
-	ldrh	r3, [r7, r3]
-	cmp	r5, r3, asl #3
-	bne	.L2238
-.L2225:
-	cmp	r5, #0
-	beq	.L2238
-	ldr	sl, .L2243+4
-	mov	r1, r5
+	movw	r6, #3922
+	b	.L2280
+.L2282:
+	mov	r0, r5
+	mov	r1, sp
 	mov	r2, #0
-	ldr	r0, [sl, #-972]
-	bl	FlashReadPages
-	ldr	r3, [sp, #36]
-	str	r6, [sp, #52]
-	mov	r6, r5
-	mov	r3, r3, asl #9
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #32]
-	mov	r3, r3, asl #9
-	str	r3, [sp, #44]
-	mov	r3, r9, asl #9
-	str	r3, [sp, #48]
-	mov	r3, #0
-	str	r3, [sp, #24]
-.L2231:
-	ldr	r3, [sp, #24]
-	mov	r5, #36
-	ldr	r1, [sp, #12]
-	mul	r5, r5, r3
-	ldr	r3, [sl, #-972]
-	add	r3, r3, r5
-	ldr	r2, [r3, #16]
-	cmp	r2, r1
-	bne	.L2227
-	ldr	r1, [r3, #8]
-	ldr	r3, [sl, #-944]
-	cmp	r1, r3
-	bne	.L2228
-	ldr	r3, [sp, #40]
-	mov	r0, r8
-	ldr	r2, [sp, #44]
-	add	r1, r1, r3
-	b	.L2241
-.L2227:
-	cmp	r2, fp
-	bne	.L2228
-	ldr	r1, [r3, #8]
-	ldr	r3, [sl, #-940]
-	cmp	r1, r3
-	bne	.L2228
-	movw	r2, #3922
-	ldrh	r0, [r7, r2]
-	ldr	r2, [sp, #48]
-	mul	r0, r0, fp
-	rsb	r0, r4, r0
-	add	r0, r8, r0, asl #9
-.L2241:
-	bl	memcpy
-.L2228:
-	ldr	r3, [sl, #-972]
-	add	r0, r3, r5
-	ldr	r2, [r3, r5]
-	cmn	r2, #1
-	streq	r2, [sp, #16]
-	ldreq	r1, [sl, #-1636]
-	addeq	r1, r1, #1
-	streq	r1, [sl, #-1636]
-	ldr	r3, [r3, r5]
-	cmp	r3, #256
-	bne	.L2230
-	ldr	r0, [r0, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L2230:
-	ldr	r3, [sp, #24]
-	add	r3, r3, #1
-	str	r3, [sp, #24]
-	cmp	r3, r6
-	bne	.L2231
-	ldr	r6, [sp, #52]
-	mov	r5, #0
-.L2238:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L2232
-	ldr	r3, .L2243+8
-	ldr	r2, .L2243+4
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L2214
-	ldr	r0, [sp, #8]
-	mov	r1, #1
-	bl	ftl_do_gc
-.L2214:
-	ldr	r0, [sp, #16]
-	add	sp, sp, #68
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2244:
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	cmn	r3, #1
+	beq	.L2281
+	ldr	r3, .L2287+4
+	add	r1, sp, #4
+	mov	r0, r5
+	ldr	r2, [r3, #448]
+	add	r2, r2, #1
+	str	r2, [r3, #448]
+	ldr	r2, [r3, #-1832]
+	add	r2, r2, #1
+	str	r2, [r3, #-1832]
+	mov	r2, #1
+	bl	log2phys
+	ldr	r0, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2281:
+	ldrh	r3, [r7, r6]
+	add	r5, r5, #1
+	rsb	r4, r3, r4
+.L2280:
+	ldrh	r3, [r7, r6]
+	cmp	r4, r3
+	bcs	.L2282
+	ldr	r3, .L2287+4
+	mov	r4, #0
+	ldr	r2, [r3, #448]
+	cmp	r2, #32
+	bls	.L2286
+	str	r4, [r3, #448]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2286
+.L2285:
+	mov	r0, #0
+	b	.L2278
+.L2286:
+	mov	r0, r4
+.L2278:
+	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, pc}
+.L2288:
 	.align	2
-.L2243:
+.L2287:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	-1138
-	.fnend
-	.size	ftl_read, .-ftl_read
-	.align	2
-	.global	FtlRead
-	.type	FtlRead, %function
-FtlRead:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_read
 	.fnend
-	.size	FtlRead, .-FtlRead
+	.size	ftl_discard, .-ftl_discard
 	.align	2
-	.global	ftl_sys_read
-	.type	ftl_sys_read, %function
-ftl_sys_read:
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	mov	ip, r1
-	mov	r3, r2
-	add	r1, r0, #256
-	mov	r2, ip
-	mov	r0, #16
-	b	ftl_read
+	b	ftl_discard
 	.fnend
-	.size	ftl_sys_read, .-ftl_sys_read
+	.size	FtlDiscard, .-FtlDiscard
 	.align	2
-	.global	StorageSysDataLoad
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
+	.type	ftl_write.part.24, %function
+ftl_write.part.24:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-	mov	r2, #512
-	mov	r5, r0
-	mov	r4, r1
-	mov	r0, r1
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	mov	r3, #2048
+	ldr	r4, .L2335
+	.pad #100
+	sub	sp, sp, #100
+	ldr	r8, .L2335+4
+	mov	r5, r1
+	mov	r7, r0
+	mov	r9, r2
+	str	r3, [r4, #452]
+	movw	r3, #3922
+	ldrh	r6, [r8, r3]
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	str	r0, [sp, #16]
+	sub	r0, r7, #1
+	add	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	sl, [r8, #3968]
+	cmp	sl, #0
+	rsb	fp, r3, r0
+	str	r0, [sp, #36]
+	add	r3, fp, #1
+	str	r3, [sp, #20]
+	ldr	lr, [sp, #20]
+	ldr	r3, [r4, #-1828]
+	add	r3, lr, r3
+	str	r3, [r4, #-1828]
+	ldr	r3, [r4, #-1812]
+	add	r3, r5, r3
+	str	r3, [r4, #-1812]
+	beq	.L2323
+	ldr	r3, [r8, #3972]
+	sub	sl, sl, #1
+	mov	r2, #36
+	ldr	r0, [sp, #16]
+	mla	sl, r2, sl, r3
+	ldr	r3, [sl, #16]
+	cmp	r0, r3
+	strne	r5, [sp, #32]
+	bne	.L2292
+	ldr	r3, [r4, #-1824]
+	mov	r0, r7
+	mov	r1, r6
+	add	r3, r3, #1
+	str	r3, [r4, #-1824]
+	ldr	r3, [r4, #456]
+	add	r3, r3, #1
+	str	r3, [r4, #456]
+	bl	__aeabi_uidivmod
+	ldr	r0, [sl, #8]
+	rsb	r8, r1, r6
+	add	r0, r0, r1, asl #9
+	cmp	r8, r5
+	movcs	r8, r5
+	mov	r1, r9
+	mov	r3, r8, asl #9
+	str	r3, [sp, #4]
+	mov	r2, r3
+	bl	memcpy
+	cmp	fp, #0
+	ldr	r3, [sp, #4]
+	bne	.L2293
+	ldr	r2, [r4, #456]
+	cmp	r2, #2
+	ble	.L2294
+.L2293:
+	add	r9, r9, r3
+	add	r7, r7, r8
+	ldr	r3, [sp, #16]
+	rsb	r1, r8, r5
+	str	fp, [sp, #20]
+	add	r3, r3, #1
+	str	r1, [sp, #32]
+	str	r3, [sp, #16]
+.L2292:
+	ldr	r3, .L2335
+	mov	r2, #0
+	str	r2, [r3, #456]
+	b	.L2291
+.L2323:
+	str	r5, [sp, #32]
+.L2291:
+	ldr	r0, [sp, #16]
+	ldr	r1, [sp, #36]
+	bl	FtlCacheMetchLpa
+	cmp	r0, #0
+	beq	.L2295
+	bl	FtlCacheWriteBack
+.L2295:
+	cmp	r5, r6, asl #1
+	ldr	r3, .L2335
+	ldr	r4, .L2335+4
+	mov	fp, #0
+	movcc	r6, #0
+	movcs	r6, #1
+	str	r6, [sp, #24]
+	ldr	r6, .L2335+8
+	ldr	r5, [sp, #16]
+	mov	sl, r4
+	str	fp, [sp, #40]
+	str	r6, [r3, #440]
+	b	.L2332
+.L2321:
+	ldrh	r1, [r6, #4]
+	cmp	r1, #0
+	bne	.L2297
+	ldr	r2, .L2335+8
+	ldr	r3, .L2335+12
+	cmp	r6, r2
+	bne	.L2298
+	ldr	r2, .L2335+16
+	ldrh	r8, [r8, r2]
+	cmp	r8, #0
+	bne	.L2299
+	ldr	r0, .L2335+20
+	str	r3, [sp, #4]
+	bl	allocate_new_data_superblock
+	ldr	r3, [sp, #4]
+	str	r8, [r3, #3004]
+.L2299:
+	ldr	r0, .L2335+8
+	str	r3, [sp, #4]
+	bl	allocate_new_data_superblock
+	ldr	r3, [sp, #4]
+	ldr	r2, [r3, #3004]
+	ldr	r3, .L2335+20
+	cmp	r2, #0
+	movne	r6, r3
+	b	.L2300
+.L2298:
+	str	r1, [r3, #3004]
+	ldr	r3, .L2335+24
+	ldrh	r3, [r8, r3]
+	cmp	r3, #0
+	movne	r6, r2
+	bne	.L2300
+	mov	r0, r6
+	bl	allocate_new_data_superblock
+.L2300:
+	ldrh	r3, [r6, #4]
+	cmp	r3, #0
+	bne	.L2301
+	mov	r0, r6
+	bl	allocate_new_data_superblock
+.L2301:
+	ldr	r3, .L2335
+	str	r6, [r3, #440]
+.L2297:
+	ldr	r2, .L2335
+	mov	r8, r6
+	ldrh	r3, [r6, #4]
+	ldr	r1, [r2, #-976]
+	ldr	r2, [r4, #3968]
+	rsb	r2, r2, r1
+	cmp	r3, r2
+	movcc	r2, r3
+	ldr	r3, [sp, #20]
+	cmp	r2, r3
+	movcc	r3, r2
+	str	r3, [sp, #52]
+	mov	r3, #0
+	str	r3, [sp, #28]
+	b	.L2302
+.L2318:
+	ldrh	r3, [r8, #4]
+	cmp	r3, #0
+	beq	.L2303
+	ldr	r6, [sp, #36]
+	rsb	r2, r6, r5
+	ldr	r6, [sp, #24]
+	rsbs	r3, r2, #0
+	adc	r3, r3, r2
+	tst	r3, r6
+	beq	.L2304
+	ldr	r6, [sp, #28]
+	cmp	r6, #0
+	beq	.L2304
+	movw	lr, #3922
+	ldr	r6, [sp, #32]
+	ldrh	r2, [r4, lr]
+	add	r1, r6, r7
+	mls	r1, r2, r5, r1
+	cmp	r1, r2
+	bne	.L2303
+.L2304:
+	add	r1, sp, #56
+	mov	r2, #0
+	mov	r0, r5
+	str	r3, [sp, #4]
+	bl	log2phys
+	mov	r0, r8
+	bl	get_new_active_ppa
+	ldr	lr, [r4, #3968]
+	ldr	r1, [r4, #3972]
+	movw	r2, #3928
+	mov	ip, #36
+	ldrh	r2, [r4, r2]
+	ldr	r6, .L2335
+	mla	r1, ip, lr, r1
+	mul	lr, lr, r2
+	ldr	r6, [r6, #-928]
+	bic	lr, lr, #3
+	str	r6, [sp, #48]
+	str	lr, [sp, #44]
+	add	r6, r6, lr
+	str	r5, [r1, #16]
+	str	r6, [r1, #12]
+	str	r0, [r1, #4]
+	movw	r0, #3926
+	ldrh	lr, [r4, r0]
+	ldr	r0, [r4, #3968]
+	mul	lr, r0, lr
+	ldr	r0, .L2335
+	bic	lr, lr, #3
+	str	lr, [sp, #12]
+	ldr	lr, [r0, #-948]
+	ldr	r0, [sp, #12]
+	add	lr, lr, r0
+	mov	r0, r6
+	str	lr, [r1, #8]
 	mov	r1, #0
+	str	ip, [sp, #8]
 	bl	ftl_memset
-	bl	rknand_device_lock
-	mov	r2, r4
-	mov	r1, #1
-	mov	r0, r5
-	bl	ftl_sys_read
-	mov	r4, r0
-	bl	rknand_device_unlock
-	mov	r0, r4
-	ldmfd	sp!, {r3, r4, r5, pc}
-	.fnend
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.align	2
-	.global	ftl_vendor_read
-	.type	ftl_vendor_read, %function
-ftl_vendor_read:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	ip, r1
-	mov	r3, r2
-	stmfd	sp!, {r4, lr}
-	.save {r4, lr}
-	mov	r4, r0
-	mov	r1, r4
-	mov	r0, #16
-	mov	r2, ip
-	ldmfd	sp!, {r4, lr}
-	b	ftl_read
-	.fnend
-	.size	ftl_vendor_read, .-ftl_vendor_read
-	.align	2
-	.global	FlashBootVendorRead
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-	mov	r6, r0
-	mov	r5, r1
-	mov	r4, r2
-	bl	rknand_device_lock
-	mov	r2, r4
-	mov	r1, r5
-	mov	r0, r6
-	bl	ftl_vendor_read
-	mov	r4, r0
-	bl	rknand_device_unlock
-	mov	r0, r4
-	ldmfd	sp!, {r4, r5, r6, pc}
-	.fnend
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.align	2
-	.type	rk_ftl_vendor_ops.constprop.26, %function
-rk_ftl_vendor_ops.constprop.26:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	ldr	r1, [sp, #16]
+	ldr	ip, [sp, #8]
+	rsb	r3, r1, r5
+	rsbs	r1, r3, #0
+	adc	r1, r1, r3
+	ldr	r3, [sp, #4]
+	str	r1, [sp, #12]
+	orrs	r1, r1, r3
+	beq	.L2305
+	ldr	r2, [sp, #12]
 	cmp	r2, #0
-	mov	r3, r0
-	mov	r2, r3
-	mov	r0, r1
-	mov	r1, #128
-	beq	.L2251
-	b	FlashBootVendorWrite
-.L2251:
-	b	FlashBootVendorRead
-	.fnend
-	.size	rk_ftl_vendor_ops.constprop.26, .-rk_ftl_vendor_ops.constprop.26
-	.align	2
-	.global	FlashLoadFactorBbt
-	.type	FlashLoadFactorBbt, %function
-FlashLoadFactorBbt:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	movw	r2, #3062
-	ldr	r9, .L2261
-	movw	r3, #3060
-	ldr	r4, .L2261+4
-	.pad #52
-	sub	sp, sp, #52
+	beq	.L2306
+	movw	r3, #3922
+	mov	r0, r7
+	ldrh	fp, [r4, r3]
+	mov	r1, fp
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #32]
+	rsb	fp, r1, fp
+	str	r1, [sp, #40]
+	cmp	fp, r3
+	movcs	fp, r3
+	b	.L2307
+.L2306:
+	cmp	r3, #0
+	beq	.L2307
+	ldr	r3, [sp, #32]
+	movw	lr, #3922
+	add	fp, r3, r7
+	ldrh	r3, [r4, lr]
+	mls	fp, r3, r5, fp
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #40]
+	uxth	fp, fp
+.L2307:
+	movw	lr, #3922
+	ldrh	r3, [r4, lr]
+	cmp	fp, r3
+	bne	.L2308
+	ldr	r3, [sp, #12]
+	ldr	r0, [sl, #3968]
+	cmp	r3, #0
+	ldr	r2, [sl, #3972]
+	ldr	r3, [sp, #24]
+	muleq	r1, r5, fp
+	movne	r1, r9
+	rsbeq	r1, r7, r1
+	addeq	r1, r9, r1, asl #9
+	cmp	r3, #0
+	mov	r3, #36
+	mla	r3, r3, r0, r2
+	strne	r1, [r3, #8]
+	bne	.L2311
+	ldr	r0, [r3, #8]
+	movw	r3, #3926
+	ldrh	r2, [sl, r3]
+	b	.L2333
+.L2308:
+	ldr	r2, [sp, #56]
+	mov	r3, #36
+	cmn	r2, #1
+	beq	.L2312
+	ldr	r1, [r4, #3968]
+	add	r0, sp, #60
+	str	r2, [sp, #64]
+	ldr	r2, [r4, #3972]
+	str	r5, [sp, #76]
+	mla	r3, r3, r1, r2
+	mov	r1, #1
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #68]
+	mov	r2, #0
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #60]
+	cmn	r3, #1
+	ldr	r3, .L2335
+	ldreq	r2, [r3, #-1636]
+	addeq	r2, r2, #1
+	streq	r2, [r3, #-1636]
+	beq	.L2314
+	ldr	r2, [r6, #8]
+	cmp	r2, r5
+	beq	.L2314
+	ldr	r2, [r3, #-1636]
+	ldr	r0, .L2335+28
+	add	r2, r2, #1
+	str	r2, [r3, #-1636]
+	mov	r2, r5
+	ldr	r1, [r6, #8]
+	bl	printk
+	b	.L2314
+.L2312:
+	ldr	r1, [r4, #3968]
+	ldr	r2, [r4, #3972]
+	mla	r3, r3, r1, r2
 	mov	r1, #0
-	mvn	r7, #0
-	ldrh	r3, [r9, r3]
-	add	r0, r4, #232
-	ldrh	r8, [r9, r2]
-	mov	r2, #16
-	mov	r6, #0
-	mul	r8, r8, r3
+	ldr	r0, [r3, #8]
+	movw	r3, #3926
+	ldrh	r2, [r4, r3]
 	bl	ftl_memset
-	ldr	r3, [r4, #228]
-	str	r6, [sp, #20]
-	mov	r4, r6
+.L2314:
+	ldr	r3, [sp, #12]
+	ldr	r1, [r4, #3968]
+	cmp	r3, #0
+	ldr	r2, [r4, #3972]
+	mov	r3, #36
+	movweq	lr, #3922
+	mla	r3, r3, r1, r2
+	ldreqh	r1, [r4, lr]
+	movne	r1, r9
+	mov	r2, fp, asl #9
+	muleq	r1, r1, r5
+	ldrne	r0, [r3, #8]
+	ldrne	r3, [sp, #40]
+	rsbeq	r1, r7, r1
+	ldreq	r0, [r3, #8]
+	addne	r0, r0, r3, asl #9
+	addeq	r1, r9, r1, asl #9
+	b	.L2333
+.L2305:
+	ldr	r3, [sp, #24]
+	ldr	r2, [r4, #3968]
+	cmp	r3, #0
+	ldr	r3, [r4, #3972]
+	mla	ip, ip, r2, r3
+	beq	.L2316
+	movw	lr, #3922
+	ldrh	r3, [r4, lr]
+	mul	r3, r3, r5
+	rsb	r3, r7, r3
+	add	r3, r9, r3, asl #9
+	str	r3, [ip, #8]
+	b	.L2311
+.L2316:
+	movw	r0, #3922
+	movw	r3, #3926
+	ldrh	r1, [r4, r0]
+	ldrh	r2, [r4, r3]
+	ldr	r0, [ip, #8]
+	mul	r1, r1, r5
+	rsb	r1, r7, r1
+	add	r1, r9, r1, asl #9
+.L2333:
+	bl	memcpy
+.L2311:
+	ldr	r3, .L2335+32
+	ldr	r0, [sp, #48]
+	ldr	lr, [sp, #44]
+	strh	r3, [r0, lr]	@ movhi
+	ldr	r3, .L2335
+	str	r5, [r6, #8]
+	add	r5, r5, #1
+	ldr	r2, [r3, #-1800]
+	str	r2, [r6, #4]
+	add	r2, r2, #1
+	cmn	r2, #1
+	str	r2, [r3, #-1800]
+	moveq	r2, #0
+	streq	r2, [r3, #-1800]
+	ldr	r3, [sp, #56]
+	str	r3, [r6, #12]
+	ldrh	r3, [r8, #0]
+	strh	r3, [r6, #2]	@ movhi
+	ldr	r3, [r4, #3968]
+	add	r3, r3, #1
+	str	r3, [r4, #3968]
+	ldr	r3, [sp, #28]
+	add	r3, r3, #1
+	str	r3, [sp, #28]
+.L2302:
+	ldr	r6, [sp, #28]
+	ldr	r3, [sp, #52]
+	cmp	r6, r3
+	bne	.L2318
+.L2303:
+	ldr	r3, [sp, #20]
+	mov	r6, r8
+	ldr	lr, [sp, #28]
+	ldr	r2, [r4, #3968]
+	rsb	r3, lr, r3
+	str	r3, [sp, #20]
+	ldr	r3, .L2335
+	ldr	r0, [sp, #24]
+	ldr	r3, [r3, #-976]
+	cmp	r2, r3
+	orrcs	r0, r0, #1
+	uxtb	r3, r0
+	cmp	r3, #0
+	bne	.L2319
+	ldrh	r2, [r8, #4]
+	cmp	r2, #0
+	bne	.L2329
+.L2319:
+	bl	FtlCacheWriteBack
+	ldr	lr, [sp, #20]
+	mov	r3, #0
+	str	r3, [sl, #3968]
+	cmp	lr, #1
+	ldr	r3, [sp, #24]
+	movls	r3, #0
+.L2329:
 	str	r3, [sp, #24]
-	uxth	r8, r8
-	add	r3, r8, r7
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L2253
-.L2259:
-	ldr	r5, [sp, #4]
-	sub	r3, r8, #12
-	mul	fp, r8, r4
-	ldr	sl, .L2261+4
-	b	.L2254
-.L2257:
-	add	r2, fp, r5
+.L2332:
+	ldr	r3, [sp, #20]
+	ldr	r8, .L2335
+	cmp	r3, #0
+	bne	.L2321
+	mov	r0, r3
+	ldr	r6, [sp, #36]
+	ldr	r3, [sp, #16]
+	rsb	r1, r3, r6
+	bl	ftl_do_gc
+	ldr	r3, .L2335+36
+	ldrh	r3, [r8, r3]
+	cmp	r3, #31
+	bhi	.L2294
+	ldr	r2, .L2335+40
+	mov	r3, #128
+	ldr	r5, .L2335+4
+	mov	r4, #16
+	strh	r3, [r8, r2]	@ movhi
+	sub	r2, r2, #2
+	strh	r3, [r8, r2]	@ movhi
+.L2322:
+	mov	r0, #0
 	mov	r1, #1
-	add	r0, sp, #12
-	str	r3, [sp, #0]
-	mov	r2, r2, asl #10
-	str	r2, [sp, #16]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #0]
-	cmn	r2, #1
-	beq	.L2255
-	ldr	r2, [sl, #228]
-	ldrh	r1, [r2, #0]
-	movw	r2, #61664
-	cmp	r1, r2
-	bne	.L2255
-	ldr	r0, .L2261+8
-	mov	r1, r4
-	mov	r2, r5
-	add	r6, r6, #1
-	bl	printk
-	ldr	r3, .L2261+4
-	uxth	r6, r6
-	add	r3, r3, r4, asl #1
-	strh	r5, [r3, #232]	@ movhi
-	b	.L2256
-.L2255:
-	sub	r5, r5, #1
-	uxth	r5, r5
-.L2254:
-	cmp	r5, r3
-	bgt	.L2257
-.L2256:
-	ldrb	r3, [r9, #3762]	@ zero_extendqisi2
-	add	r4, r4, #1
-	cmp	r3, r6
-	uxtb	r4, r4
-	moveq	r7, #0
-.L2253:
-	ldrb	r3, [r9, #3762]	@ zero_extendqisi2
-	cmp	r3, r4
-	bhi	.L2259
-	mov	r0, r7
-	add	sp, sp, #52
+	bl	ftl_do_gc
+	ldr	r3, [r5, #4040]
+	cmp	r3, #0
+	bne	.L2294
+	subs	r4, r4, #1
+	bne	.L2322
+.L2294:
+	mov	r0, #0
+	add	sp, sp, #100
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2262:
+.L2336:
 	.align	2
-.L2261:
-	.word	.LANCHOR0
+.L2335:
 	.word	.LANCHOR2
-	.word	.LC140
+	.word	.LANCHOR0
+	.word	.LANCHOR2-1996
+	.word	.LANCHOR1
+	.word	-1944
+	.word	.LANCHOR2-1948
+	.word	-1992
+	.word	.LC157
+	.word	-3947
+	.word	-2000
+	.word	-1194
 	.fnend
-	.size	FlashLoadFactorBbt, .-FlashLoadFactorBbt
+	.size	ftl_write.part.24, .-ftl_write.part.24
 	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 40
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2273
-	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-	.save {r4, r5, r6, r7, r8, r9, sl, lr}
-	mov	r6, r1
-	mov	r9, r2
-	movw	r1, #3062
-	movw	r2, #3060
-	ldrh	r8, [r3, r1]
-	ldrh	r2, [r3, r2]
-	.pad #40
-	sub	sp, sp, #40
-	ldr	r7, .L2273+4
-	mov	r4, r0
-	mul	r8, r8, r2
-	ldr	r3, [r7, #148]
-	str	r3, [sp, #12]
-	ldr	r3, [r7, #228]
-	uxth	r8, r8
-	sub	r5, r8, #1
-	mul	sl, r8, r6
-	str	r3, [sp, #16]
-	uxth	r5, r5
-	sub	r8, r8, #16
-	b	.L2264
-.L2270:
-	mov	r1, #1
-	add	r3, r5, sl
-	add	r0, sp, #4
-	mov	r2, r1
-	mov	r3, r3, asl #10
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmn	r3, #1
-	beq	.L2265
-	ldr	r3, [r7, #228]
-	ldrh	r2, [r3, #0]
-	movw	r3, #61664
-	cmp	r2, r3
-	bne	.L2265
+	mov	ip, r0
+	mov	r0, r1
+	mov	r1, r2
+	mov	r2, r3
+	ldr	r3, .L2342
+	stmfd	sp!, {r4, lr}
+	.save {r4, lr}
+	ldr	r4, [r3, #4040]
 	cmp	r4, #0
-	moveq	r0, r4
-	beq	.L2266
-	cmp	r6, #0
-	ldreq	r3, .L2273+4
-	moveq	r0, #1
-	beq	.L2267
-	b	.L2268
-.L2269:
-	ldr	r2, [r3, #148]
-	ubfx	r1, r6, #5, #16
-	and	lr, r6, #31
-	add	r6, r6, #1
-	ldr	ip, [r2, r1, asl #2]
-	uxth	r6, r6
-	orr	ip, ip, r0, asl lr
-	str	ip, [r2, r1, asl #2]
-.L2267:
-	ldr	r2, [r3, #156]
-	cmp	r6, r2
-	bcc	.L2269
-.L2268:
-	ldr	r3, .L2273+4
-	mov	r2, r9
-	mov	r0, r4
-	ldr	r1, [r3, #148]
-	bl	memcpy
-	mov	r2, #4
-	ldr	r0, .L2273+8
-	mov	r1, r4
-	mov	r3, r2
-	bl	rknand_print_hex
-	mov	r0, #0
-	b	.L2266
-.L2265:
-	sub	r5, r5, #1
-	uxth	r5, r5
-.L2264:
-	cmp	r5, r8
-	bgt	.L2270
+	movne	r0, #0
+	ldmnefd	sp!, {r4, pc}
+	cmp	ip, #16
+	bne	.L2339
+	add	r0, r0, #256
+	ldmfd	sp!, {r4, lr}
+	b	FtlVendorPartWrite
+.L2339:
+	ldr	r3, [r3, #3956]
+	add	ip, r1, r0
+	cmp	ip, r3
+	bhi	.L2341
+	ldmfd	sp!, {r4, lr}
+	b	ftl_write.part.24
+.L2341:
 	mvn	r0, #0
-.L2266:
-	add	sp, sp, #40
-	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
-.L2274:
+	ldmfd	sp!, {r4, pc}
+.L2343:
 	.align	2
-.L2273:
+.L2342:
 	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LC141
 	.fnend
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.size	ftl_write, .-ftl_write
 	.align	2
-	.global	FlashGetBadBlockList
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2282
-	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r3, [r3, #3624]
-	ldr	r6, .L2282+4
-	ldrb	r2, [r3, #13]	@ zero_extendqisi2
-	ldrh	r4, [r3, #14]
-	ldr	r0, [r6, #136]
-	mul	r4, r4, r2
-	uxth	r4, r4
-	add	r2, r4, #7
-	mov	r2, r2, lsr #3
-	bl	FlashReadFacBbtData
-	cmn	r0, #1
-	beq	.L2281
-	mov	r2, #0
-	mov	r0, r4, lsr #4
-	mov	r3, r2
-	sub	r4, r4, #1
-	mov	r1, #1
-	b	.L2277
-.L2279:
-	ldr	ip, [r6, #136]
-	mov	r8, r2, lsr #5
-	and	r7, r2, #31
-	ldr	ip, [ip, r8, asl #2]
-	ands	ip, ip, r1, asl r7
-	movne	ip, r3, asl #1
-	addne	r3, r3, #1
-	uxthne	r3, r3
-	strneh	r2, [r5, ip]	@ movhi
-	cmp	r3, r0
-	bcs	.L2281
-	add	r2, r2, #1
-	uxth	r2, r2
-.L2277:
-	cmp	r2, r4
-	blt	.L2279
-	b	.L2276
-.L2281:
-	mov	r3, #0
-.L2276:
-	mov	r3, r3, asl #1
-	mvn	r2, #0
-	mov	r0, #0
-	strh	r2, [r5, r3]	@ movhi
-	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L2283:
+	@ link register save eliminated.
+	b	ftl_write
+	.fnend
+	.size	FtlWrite, .-FtlWrite
 	.align	2
-.L2282:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
+	.global	ftl_sys_write
+	.type	ftl_sys_write, %function
+ftl_sys_write:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	ip, r1
+	mov	r3, r2
+	add	r1, r0, #256
+	mov	r2, ip
+	mov	r0, #16
+	b	ftl_write
 	.fnend
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.size	ftl_sys_write, .-ftl_sys_write
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	ldr	r4, .L2302
-	ldr	r5, [r4, #-2088]
-	cmp	r5, #0
-	bne	.L2285
-	ldr	r7, .L2302+4
-	bl	FtlBbtMemInit
-	ldr	r6, .L2302+8
-	bl	FtlLoadFactoryBbt
-	add	sl, r7, #12
-	b	.L2286
-.L2292:
-	ldrh	r3, [sl], #2
-	movw	r2, #65535
-	ldr	r0, [r4, #-960]
-	movw	fp, #3912
-	ldr	r9, [r4, #-936]
-	cmp	r3, r2
-	str	r0, [r4, #188]
-	str	r9, [r4, #192]
-	beq	.L2287
-	ldrh	r8, [r6, fp]
-	mov	r1, #1
-	mov	r2, r1
-	ldr	r0, .L2302+12
-	mla	r8, r8, r5, r3
-	mov	r3, r8, asl #10
-	str	r3, [r4, #184]
-	bl	FlashReadPages
-	ldrh	r2, [r6, fp]
-	ldr	r0, [r7, #28]
-	add	r2, r2, #7
-	ldr	r1, [r4, #188]
-	mov	r2, r2, lsr #3
-	bl	memcpy
-	b	.L2288
-.L2287:
-	mov	r1, r5
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #188]
-	ldr	r1, [r7, #28]
-	bl	FtlBbt2Bitmap
-	ldrh	fp, [r6, fp]
-.L2290:
-	sub	fp, fp, #1
-	uxth	fp, fp
-.L2301:
-	movw	r8, #3912
-	ldrh	r0, [r6, r8]
-	mla	r0, r0, r5, fp
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2290
-	mov	r1, #0
-	mov	r2, #16
-	strh	fp, [sl, #-2]	@ movhi
-	ldr	r0, [r4, #-936]
-	bl	ftl_memset
-	ldr	r3, .L2302+16
-	strh	r3, [r9, #0]	@ movhi
-	mov	r3, #0
-	str	r3, [r9, #4]
-	ldrh	r3, [sl, #-2]
-	ldrh	r8, [r6, r8]
-	strh	r3, [r9, #2]	@ movhi
-	ldrh	r3, [sl, #-2]
-	ldr	r1, [r7, #28]
-	ldr	r0, [r4, #188]
-	mla	r8, r8, r5, r3
-	mov	r3, r8, asl #10
-	str	r3, [r4, #184]
-	ldr	r3, .L2302+20
-	ldrh	r2, [r4, r3]
-	mov	r2, r2, asl #2
-	bl	memcpy
-	mov	r1, #1
-	mov	r2, r1
-	ldr	r0, .L2302+12
-	bl	FlashEraseBlocks
+	stmfd	sp!, {r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+	mov	r4, r1
+	mov	r5, r0
+	bl	rknand_device_lock
+	mov	r2, r4
 	mov	r1, #1
-	mov	r3, r1
-	ldr	r0, .L2302+12
-	mov	r2, r1
-	bl	FlashProgPages
-	ldr	r3, [r4, #180]
-	cmn	r3, #1
-	bne	.L2288
-	uxth	r0, r8
-	bl	FtlBbmMapBadBlock
-	b	.L2301
-.L2288:
-	uxth	r0, r8
-	add	r5, r5, #1
-	bl	FtlBbmMapBadBlock
-	add	r7, r7, #4
-.L2286:
-	movw	r3, #3870
-	ldrh	r3, [r6, r3]
-	cmp	r5, r3
-	bcc	.L2292
-	mov	r4, #0
-	ldr	r7, .L2302+8
-	movw	r6, #3930
-	b	.L2293
-.L2294:
-	mov	r0, r4
-	add	r4, r4, #1
-	bl	FtlBbmMapBadBlock
-	uxth	r4, r4
-.L2293:
-	ldrh	r3, [r7, r6]
-	ldr	r5, .L2302+8
-	cmp	r3, r4
-	bhi	.L2294
-	movw	r7, #3992
-	movw	r6, #3980
-	ldrh	r4, [r5, r7]
-	sub	r4, r4, #1
-	uxth	r4, r4
-	b	.L2295
-.L2300:
-	mov	r0, r4
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2296
-	mov	r0, r4
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L2297
+	mov	r0, r5
+	bl	ftl_sys_write
+	mov	r4, r0
+	bl	rknand_device_unlock
 	mov	r0, r4
-	bl	FtlBbmMapBadBlock
-	b	.L2296
-.L2297:
-	ldrh	r2, [r5, r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	streqh	r4, [r5, r6]	@ movhi
-.L2298:
-	ldrne	r2, .L2302+8
-	movne	r3, #3984
-	strneh	r4, [r2, r3]	@ movhi
-	bne	.L2299
-.L2296:
-	sub	r4, r4, #1
-	uxth	r4, r4
-.L2295:
-	ldrh	r3, [r5, r7]
-	sub	r3, r3, #48
-	cmp	r4, r3
-	bgt	.L2300
-.L2299:
-	ldr	r4, .L2302+8
-	movw	r6, #3980
-	ldr	r3, .L2302
-	mov	r5, #3984
-	mov	r7, #0
-	movw	r8, #3982
-	str	r7, [r4, #3988]
-	mov	r2, #2
-	ldr	r0, [r3, #-2084]
-	mov	r1, #1
-	ldrh	r3, [r4, r6]
-	strh	r7, [r4, r8]	@ movhi
-	mov	r3, r3, asl #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, r5]
-	mov	r3, r3, asl #10
-	str	r3, [r0, #40]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4, r6]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, r5]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #3988]
-	ldrh	r2, [r4, r5]
-	add	r3, r3, #1
-	str	r3, [r4, #3988]
-	ldrh	r3, [r4, r6]
-	strh	r7, [r4, r8]	@ movhi
-	strh	r2, [r4, r6]	@ movhi
-	strh	r3, [r4, r5]	@ movhi
-	bl	FtlBbmTblFlush
-.L2285:
-	mov	r0, #0
-	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2303:
+	ldmfd	sp!, {r3, r4, r5, pc}
+	.fnend
+	.size	StorageSysDataStore, .-StorageSysDataStore
 	.align	2
-.L2302:
-	.word	.LANCHOR2
-	.word	.LANCHOR0+3980
-	.word	.LANCHOR0
-	.word	.LANCHOR2+180
-	.word	-3872
-	.word	-1028
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	ip, r1
+	mov	r3, r2
+	stmfd	sp!, {r4, lr}
+	.save {r4, lr}
+	mov	r4, r0
+	mov	r1, r4
+	mov	r0, #16
+	mov	r2, ip
+	ldmfd	sp!, {r4, lr}
+	b	ftl_write
 	.fnend
-	.size	FtlMakeBbt, .-FtlMakeBbt
+	.size	ftl_vendor_write, .-ftl_vendor_write
 	.align	2
-	.type	FtlLowFormat.part.24, %function
-FtlLowFormat.part.24:
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
-	mov	r6, #3952
-	ldr	r5, .L2325
-	mov	r1, #0
-	ldr	r4, .L2325+4
-	ldrh	r2, [r5, r6]
-	ldr	r0, [r4, #-900]
-	mov	r2, r2, asl #2
-	bl	ftl_memset
-	ldrh	r2, [r5, r6]
-	mov	r1, #0
-	ldr	r0, [r4, #-1032]
-	mov	r2, r2, asl #2
-	bl	ftl_memset
-	ldr	r0, [r5, #3852]
-	mov	r3, #0
-	str	r3, [r4, #-1804]
-	str	r3, [r4, #-1800]
-	uxth	r0, r0
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cmp	r0, #0
-	beq	.L2305
-	bl	FtlMakeBbt
-.L2305:
-	mov	r3, #0
-	ldr	ip, .L2325
-	movw	r0, #3922
-	ldr	r2, .L2325+4
-	ldr	r1, .L2325+8
-	b	.L2306
-.L2307:
-	ldr	lr, [r2, #-944]
-	mvn	r4, r3
-	orr	r4, r3, r4, asl #16
-	str	r4, [lr, r3, asl #2]
-	ldr	lr, [r2, #-940]
-	str	r1, [lr, r3, asl #2]
-	add	r3, r3, #1
-	uxth	r3, r3
-.L2306:
-	ldrh	lr, [ip, r0]
-	ldr	r8, .L2325
-	cmp	r3, lr, asl #7
-	blt	.L2307
-	mov	r3, #3856
-	mov	r5, #0
-	ldrh	r6, [r8, r3]
-	movw	r7, #3858
-	b	.L2308
-.L2309:
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	mov	r4, r2
+	bl	rknand_device_lock
+	mov	r2, r4
+	mov	r1, r5
 	mov	r0, r6
-	mov	r1, #1
-	bl	FtlLowFormatEraseBlock
-	add	r6, r6, #1
-	uxth	r6, r6
-	add	r5, r5, r0
-	uxth	r5, r5
-.L2308:
-	ldrh	r3, [r8, r7]
-	ldr	r4, .L2325
-	cmp	r3, r6
-	bhi	.L2309
-	movw	r3, #3848
-	ldrh	r1, [r4, r3]
-	sub	r3, r5, #3
-	cmp	r3, r1, asl #1
-	blt	.L2310
-	mov	r0, r5
-	movw	r6, #3858
+	bl	ftl_vendor_write
+	mov	r4, r0
+	bl	rknand_device_unlock
+	mov	r0, r4
+	ldmfd	sp!, {r4, r5, r6, pc}
+	.fnend
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+	cmp	r0, #16
+	.pad #68
+	sub	sp, sp, #68
+	mov	r4, r1
+	mov	r8, r3
+	str	r2, [sp, #28]
+	bne	.L2350
+	add	r0, r1, #256
+	mov	r1, r2
+	mov	r2, r3
+	bl	FtlVendorPartRead
+	str	r0, [sp, #16]
+	b	.L2351
+.L2350:
+	ldr	r3, [sp, #28]
+	add	r3, r3, r1
+	str	r3, [sp, #20]
+	ldr	r3, .L2380
+	ldr	r1, [sp, #20]
+	ldr	r2, [r3, #3956]
+	cmp	r1, r2
+	mvnhi	r3, #0
+	strhi	r3, [sp, #16]
+	bhi	.L2351
+	movw	r2, #3922
+	mov	r0, r4
+	ldrh	r5, [r3, r2]
+	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, [r4, #3948]
-	add	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-	ldr	r0, [r4, #3852]
-	uxth	r0, r0
-	bl	FtlFreeSysBlkQueueInit
-	mov	r3, #3856
-	ldrh	r5, [r4, r3]
-	b	.L2311
-.L2312:
-	mov	r0, r5
-	mov	r1, #1
-	bl	FtlLowFormatEraseBlock
-	add	r5, r5, #1
-	uxth	r5, r5
-.L2311:
-	ldrh	r3, [r4, r6]
-	cmp	r3, r5
-	bhi	.L2312
-.L2310:
-	mov	r4, #0
-	ldr	r8, .L2325
-	mov	r6, r4
-	mov	r7, #3856
-	b	.L2313
-.L2314:
+	ldr	r3, [sp, #20]
+	mov	r1, r5
+	str	r0, [sp, #12]
+	sub	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r1, [sp, #12]
+	rsb	r3, r1, #1
+	ldr	r1, [sp, #28]
+	add	r3, r3, r0
+	str	r3, [sp, #8]
+	ldr	r3, .L2380+4
+	mov	fp, r0
+	ldr	r0, [sp, #12]
+	ldr	r2, [r3, #-1808]
+	add	r2, r1, r2
+	ldr	r1, [sp, #8]
+	str	r2, [r3, #-1808]
+	ldr	r2, [r3, #-1836]
+	add	r2, r1, r2
+	mov	r1, fp
+	str	r2, [r3, #-1836]
+	bl	FtlCacheMetchLpa
+	cmp	r0, #0
+	beq	.L2352
+	bl	FtlCacheWriteBack
+.L2352:
+	mov	r9, #0
+	ldr	r6, [sp, #12]
+	str	r9, [sp, #32]
+	mov	r5, r9
+	str	r9, [sp, #16]
+	ldr	r7, .L2380
+	b	.L2375
+.L2369:
+	mov	r2, #0
 	mov	r0, r6
+	add	r1, sp, #60
+	bl	log2phys
+	ldr	r2, [sp, #60]
+	cmn	r2, #1
+	bne	.L2376
+	b	.L2379
+.L2357:
+	mla	r0, r0, r6, sl
+	cmp	r0, r4
+	bcc	.L2356
+	ldr	r2, [sp, #20]
+	cmp	r0, r2
+	bcs	.L2356
+	rsb	r0, r4, r0
 	mov	r1, #0
-	bl	FtlLowFormatEraseBlock
+	mov	r2, #512
+	str	r3, [sp, #4]
+	add	r0, r8, r0, asl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #4]
+.L2356:
+	add	sl, sl, #1
+	b	.L2354
+.L2379:
+	mov	sl, #0
+	movw	r3, #3922
+.L2354:
+	ldrh	r0, [r7, r3]
+	cmp	sl, r0
+	bcc	.L2357
+	b	.L2358
+.L2376:
+	ldr	r3, .L2380+4
+	mov	sl, #36
+	ldr	r1, [r3, #-972]
+	mla	sl, sl, r5, r1
+	ldr	r1, [sp, #12]
+	cmp	r6, r1
+	str	r2, [sl, #4]
+	movw	r2, #3922
+	bne	.L2359
+	ldr	r3, [r3, #-944]
+	mov	r0, r4
+	str	r3, [sl, #8]
+	ldrh	r3, [r7, r2]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #4]
+	str	r1, [sp, #36]
+	rsb	r2, r1, r3
+	ldr	r1, [sp, #28]
+	cmp	r2, r1
+	movcc	r1, r2
+	str	r1, [sp, #32]
+	cmp	r1, r3
+	streq	r8, [sl, #8]
+	b	.L2360
+.L2359:
+	cmp	r6, fp
+	ldrneh	r3, [r7, r2]
+	mulne	r3, r3, r6
+	bne	.L2377
+	ldr	r3, [r3, #-940]
+	ldrh	r2, [r7, r2]
+	ldr	r1, [sp, #20]
+	str	r3, [sl, #8]
+	mul	r3, r2, r6
+	rsb	r9, r3, r1
+	cmp	r9, r2
+	bne	.L2360
+.L2377:
+	rsb	r3, r4, r3
+	add	r3, r8, r3, asl #9
+	str	r3, [sl, #8]
+.L2360:
+	movw	r3, #3928
+	ldr	r2, .L2380+4
+	ldrh	r3, [r7, r3]
+	str	r6, [sl, #16]
+	ldr	r2, [r2, #-932]
+	mul	r3, r3, r5
+	add	r5, r5, #1
+	bic	r3, r3, #3
+	add	r3, r2, r3
+	str	r3, [sl, #12]
+.L2358:
+	ldr	r3, [sp, #8]
 	add	r6, r6, #1
-	uxth	r6, r6
-	add	r4, r4, r0
-	uxth	r4, r4
-.L2313:
-	ldrh	r3, [r8, r7]
-	ldr	r5, .L2325
+	subs	r3, r3, #1
+	str	r3, [sp, #8]
+	beq	.L2362
+	movw	r3, #3848
+	ldrh	r3, [r7, r3]
+	cmp	r5, r3, asl #3
+	bne	.L2375
+.L2362:
+	cmp	r5, #0
+	beq	.L2375
+	ldr	sl, .L2380+4
+	mov	r1, r5
+	mov	r2, #0
+	ldr	r0, [sl, #-972]
+	bl	FlashReadPages
+	ldr	r3, [sp, #36]
+	str	r6, [sp, #52]
+	mov	r6, r5
+	mov	r3, r3, asl #9
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #32]
+	mov	r3, r3, asl #9
+	str	r3, [sp, #44]
+	mov	r3, r9, asl #9
+	str	r3, [sp, #48]
+	mov	r3, #0
+	str	r3, [sp, #24]
+.L2368:
+	ldr	r3, [sp, #24]
+	mov	r5, #36
+	ldr	r1, [sp, #12]
+	mul	r5, r5, r3
+	ldr	r3, [sl, #-972]
+	add	r3, r3, r5
+	ldr	r2, [r3, #16]
+	cmp	r2, r1
+	bne	.L2364
+	ldr	r1, [r3, #8]
+	ldr	r3, [sl, #-944]
+	cmp	r1, r3
+	bne	.L2365
+	ldr	r3, [sp, #40]
+	mov	r0, r8
+	ldr	r2, [sp, #44]
+	add	r1, r1, r3
+	b	.L2378
+.L2364:
+	cmp	r2, fp
+	bne	.L2365
+	ldr	r1, [r3, #8]
+	ldr	r3, [sl, #-940]
+	cmp	r1, r3
+	bne	.L2365
+	movw	r2, #3922
+	ldrh	r0, [r7, r2]
+	ldr	r2, [sp, #48]
+	mul	r0, r0, fp
+	rsb	r0, r4, r0
+	add	r0, r8, r0, asl #9
+.L2378:
+	bl	memcpy
+.L2365:
+	ldr	r3, [sl, #-972]
+	add	r0, r3, r5
+	ldr	r2, [r3, r5]
+	cmn	r2, #1
+	streq	r2, [sp, #16]
+	ldreq	r1, [sl, #-1636]
+	addeq	r1, r1, #1
+	streq	r1, [sl, #-1636]
+	ldr	r3, [r3, r5]
+	cmp	r3, #256
+	bne	.L2367
+	ldr	r0, [r0, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+.L2367:
+	ldr	r3, [sp, #24]
+	add	r3, r3, #1
+	str	r3, [sp, #24]
 	cmp	r3, r6
-	bhi	.L2314
-	movw	r3, #3858
-	ldr	r8, .L2325+4
-	ldrh	r3, [r5, r3]
-	ldr	fp, [r5, #3860]
-	ldr	r9, .L2325+12
-	str	r3, [r8, #-984]
-	movw	r3, #3848
-	ldrh	r6, [r5, r3]
-	mov	r0, fp
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	ubfx	sl, r0, #5, #16
-	mov	r7, r0
-	add	r3, sl, #36
-	strh	r3, [r8, r9]	@ movhi
-	mov	r3, #24
-	str	r0, [r5, #3976]
-	mul	r3, r3, r6
-	cmp	r4, r3
-	ble	.L2315
-	rsb	r0, r4, fp
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	str	r0, [r5, #3976]
-	mov	r0, r0, lsr #5
-	add	r0, r0, #24
-	strh	r0, [r8, r9]	@ movhi
-.L2315:
-	ldr	r3, .L2325
-	ldr	r3, [r3, #3840]
-	cmp	r3, #1
-	bne	.L2316
-	mov	r0, r4
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	ldr	r8, .L2325+4
-	ldr	r5, .L2325+12
-	ldrh	r9, [r8, r5]
-	uxtah	r0, r9, r0
-	add	r9, r9, r0, lsr #2
-	strh	r9, [r8, r5]	@ movhi
-.L2316:
-	ldr	r3, .L2325
-	ldrb	r3, [r3, #928]	@ zero_extendqisi2
+	bne	.L2368
+	ldr	r6, [sp, #52]
+	mov	r5, #0
+.L2375:
+	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L2317
-	mov	r0, r4
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	ldr	r8, .L2325+4
-	ldr	r5, .L2325+12
-	ldrh	r9, [r8, r5]
-	uxtah	r0, r9, r0
-	add	r9, r9, r0, lsr #2
-	strh	r9, [r8, r5]	@ movhi
-.L2317:
-	ldr	r0, .L2325
-	movw	r3, #3908
-	ldrh	r3, [r0, r3]
+	bne	.L2369
+	ldr	r3, .L2380+8
+	ldr	r2, .L2380+4
+	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L2318
-	ldr	r1, .L2325+4
-	ldr	r2, .L2325+12
-	ldrh	ip, [r1, r2]
-	add	ip, ip, r3, lsr #1
-	strh	ip, [r1, r2]	@ movhi
-	mul	ip, r6, r3
-	cmp	ip, r4
-	strgt	r7, [r0, #3976]
-	addgt	r3, r3, #32
-	addgt	sl, sl, r3
-	strgth	sl, [r1, r2]	@ movhi
-.L2318:
-	ldr	r4, .L2325+4
-	ldr	r5, .L2325
-	ldr	r3, .L2325+12
-	ldr	r7, .L2325+16
-	ldr	r2, [r5, #3976]
-	ldrh	r3, [r4, r3]
-	rsb	r3, r3, r2
-	mul	r6, r6, r3
-	movw	r3, #3916
-	ldrh	r3, [r5, r3]
-	str	r6, [r4, #216]
-	mul	r6, r3, r6
-	movw	r3, #3922
-	ldrh	r3, [r5, r3]
-	str	r6, [r5, #3976]
-	mul	r6, r3, r6
-	str	r6, [r5, #3956]
-	mvn	r6, #0
-	bl	FtlBbmTblFlush
-	movw	r3, #3858
-	ldrh	r2, [r5, r3]
+	beq	.L2351
+	ldr	r0, [sp, #8]
+	mov	r1, #1
+	bl	ftl_do_gc
+.L2351:
+	ldr	r0, [sp, #16]
+	add	sp, sp, #68
+	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+.L2381:
+	.align	2
+.L2380:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	-1138
+	.fnend
+	.size	ftl_read, .-ftl_read
+	.align	2
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_read
+	.fnend
+	.size	FtlRead, .-FtlRead
+	.align	2
+	.global	ftl_sys_read
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	ip, r1
+	mov	r3, r2
+	add	r1, r0, #256
+	mov	r2, ip
+	mov	r0, #16
+	b	ftl_read
+	.fnend
+	.size	ftl_sys_read, .-ftl_sys_read
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+	mov	r2, #512
+	mov	r5, r0
+	mov	r4, r1
+	mov	r0, r1
 	mov	r1, #0
-	ldr	r0, [r4, #-2016]
-	mov	r2, r2, asl #1
-	bl	ftl_memset
-	ldr	r1, .L2325+20
-	mov	r3, #0
-	ldr	r2, .L2325+24
-	str	r3, [r4, #-1844]
-	strh	r3, [r4, r1]	@ movhi
-	sub	r1, r1, #236
-	strb	r3, [r4, #-1754]
-	strh	r3, [r4, r1]	@ movhi
-	mov	r1, #255
-	strb	r3, [r4, #-1752]
-	strb	r3, [r4, #-1990]
-	strh	r3, [r4, r7]	@ movhi
-	mov	r3, #1
-	strb	r3, [r4, #-1988]
-	mov	r3, #3856
-	strh	r6, [r4, r2]	@ movhi
-	ldrh	r2, [r5, r3]
-	ldr	r0, [r4, #-1840]
-	mov	r2, r2, lsr #3
 	bl	ftl_memset
-.L2319:
-	ldr	r0, .L2325+28
-	bl	make_superblock
-	ldrb	r3, [r4, #-1989]	@ zero_extendqisi2
-	ldr	r5, .L2325+4
-	cmp	r3, #0
-	ldr	r3, .L2325+16
-	bne	.L2320
-	ldrh	r3, [r4, r7]
-	ldr	r2, [r4, #-2016]
-	mov	r3, r3, asl #1
-	strh	r6, [r2, r3]	@ movhi
-	ldrh	r3, [r4, r7]
-	add	r3, r3, #1
-	strh	r3, [r4, r7]	@ movhi
-	b	.L2319
-.L2320:
-	ldr	r2, [r5, #-1804]
-	mvn	r7, #0
-	ldr	r1, [r5, #-2016]
-	ldr	r6, .L2325+32
-	str	r2, [r5, #-1984]
-	add	r2, r2, #1
-	str	r2, [r5, #-1804]
-	ldr	r2, .L2325+36
-	ldrh	r0, [r5, r2]
-	ldrh	r2, [r5, r3]
-	mov	r2, r2, asl #1
-	strh	r0, [r1, r2]	@ movhi
-	mov	r2, #0
-	ldr	r0, .L2325+40
-	ldrh	r3, [r5, r3]
-	strb	r2, [r5, #-1942]
-	add	r3, r3, #1
-	strh	r2, [r5, r0]	@ movhi
-	strh	r3, [r5, r6]	@ movhi
-	mov	r3, #1
-	strb	r3, [r5, #-1940]
-.L2321:
-	ldr	r0, .L2325+44
-	bl	make_superblock
-	ldrb	r3, [r5, #-1941]	@ zero_extendqisi2
-	ldr	r4, .L2325+4
-	cmp	r3, #0
-	bne	.L2322
-	ldrh	r3, [r5, r6]
-	ldr	r2, [r5, #-2016]
-	mov	r3, r3, asl #1
-	strh	r7, [r2, r3]	@ movhi
-	ldrh	r3, [r5, r6]
-	add	r3, r3, #1
-	strh	r3, [r5, r6]	@ movhi
-	b	.L2321
-.L2322:
-	ldr	r3, [r4, #-1804]
-	mvn	r5, #0
-	ldr	r2, [r4, #-2016]
-	str	r3, [r4, #-1936]
-	add	r3, r3, #1
-	str	r3, [r4, #-1804]
-	ldr	r3, .L2325+48
-	ldrh	r1, [r4, r3]
-	sub	r3, r3, #4
-	ldrh	r3, [r4, r3]
-	mov	r3, r3, asl #1
-	strh	r1, [r2, r3]	@ movhi
-	ldr	r3, .L2325+52
-	strh	r5, [r4, r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2325+56
-	mov	r2, #0
-	strh	r0, [r4, r3]	@ movhi
-	add	r3, r3, #2
-	strh	r2, [r4, r3]	@ movhi
-	add	r3, r3, #2
-	ldr	r2, [r4, #216]
-	strh	r5, [r4, r3]	@ movhi
-	add	r3, r3, #2
-	strh	r2, [r4, r3]	@ movhi
-	ldr	r3, [r4, #-1804]
-	str	r3, [r4, #-1764]
-	add	r3, r3, #1
-	str	r3, [r4, #-1804]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cmp	r0, #0
-	ldmnefd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-	ldr	r3, .L2325+60
-	mov	r2, #1
-	str	r2, [r3, #2996]
-	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2326:
+	bl	rknand_device_lock
+	mov	r2, r4
+	mov	r1, #1
+	mov	r0, r5
+	bl	ftl_sys_read
+	mov	r4, r0
+	bl	rknand_device_unlock
+	mov	r0, r4
+	ldmfd	sp!, {r3, r4, r5, pc}
+	.fnend
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.align	2
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	ip, r1
+	mov	r3, r2
+	stmfd	sp!, {r4, lr}
+	.save {r4, lr}
+	mov	r4, r0
+	mov	r1, r4
+	mov	r0, #16
+	mov	r2, ip
+	ldmfd	sp!, {r4, lr}
+	b	ftl_read
+	.fnend
+	.size	ftl_vendor_read, .-ftl_vendor_read
 	.align	2
-.L2325:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	168778952
-	.word	-1776
-	.word	-1996
-	.word	-1758
-	.word	-1760
-	.word	.LANCHOR2-1996
-	.word	-1948
-	.word	-1992
-	.word	-1946
-	.word	.LANCHOR2-1948
-	.word	-1944
-	.word	-1900
-	.word	-1772
-	.word	.LANCHOR1
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	mov	r4, r2
+	bl	rknand_device_lock
+	mov	r2, r4
+	mov	r1, r5
+	mov	r0, r6
+	bl	ftl_vendor_read
+	mov	r4, r0
+	bl	rknand_device_unlock
+	mov	r0, r4
+	ldmfd	sp!, {r4, r5, r6, pc}
 	.fnend
-	.size	FtlLowFormat.part.24, .-FtlLowFormat.part.24
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
 	.align	2
-	.global	FtlLowFormat
-	.type	FtlLowFormat, %function
-FtlLowFormat:
+	.type	rk_ftl_vendor_ops.constprop.28, %function
+rk_ftl_vendor_ops.constprop.28:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, lr}
-	.save {r3, lr}
-	ldr	r3, .L2329
-	ldr	r3, [r3, #-2088]
-	cmp	r3, #0
-	bne	.L2328
-	bl	FtlLowFormat.part.24
-.L2328:
-	mov	r0, #0
-	ldmfd	sp!, {r3, pc}
-.L2330:
+	@ link register save eliminated.
+	cmp	r2, #0
+	mov	r3, r0
+	mov	r2, r3
+	mov	r0, r1
+	mov	r1, #128
+	beq	.L2388
+	b	FlashBootVendorWrite
+.L2388:
+	b	FlashBootVendorRead
+	.fnend
+	.size	rk_ftl_vendor_ops.constprop.28, .-rk_ftl_vendor_ops.constprop.28
 	.align	2
-.L2329:
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	stmfd	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
+	.save {r0, r1, r2, r4, r5, r6, r7, r8, sl, lr}
+	mov	r4, #0
+	ldr	r1, .L2400
+	ldr	r0, .L2400+4
+	bl	printk
+	ldr	r0, .L2400+8
+	mov	r1, #8192
+	ldr	r6, .L2400+12
+	bl	__memzero
+	ldr	r5, .L2400+16
+	b	.L2390
+.L2392:
+	mov	r0, r4
+	add	r1, sp, #4
+	mov	r2, #0
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	cmn	r0, #1
+	beq	.L2391
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	add	r0, r5, r0, asl #1
+	add	r0, r0, #460
+	ldrh	r3, [r0, #0]
+	add	r3, r3, #1
+	strh	r3, [r0, #0]	@ movhi
+.L2391:
+	add	r4, r4, #1
+.L2390:
+	ldr	r3, [r6, #3976]
+	ldr	r7, .L2400+12
+	cmp	r4, r3
+	bcc	.L2392
+	ldr	r5, .L2400+16
+	mov	r6, #3856
+	ldr	r0, .L2400+20
+	mov	r2, #2
+	ldrh	r3, [r7, r6]
+	mov	r4, #0
+	ldr	r1, [r5, #-2016]
+	bl	rknand_print_hex
+	ldr	r0, .L2400+24
+	add	r1, r5, #460
+	mov	r2, #2
+	ldrh	r3, [r7, r6]
+	bl	rknand_print_hex
+	b	.L2393
+.L2395:
+	ldr	r2, [r5, #-2016]
+	mov	r3, r4, asl #1
+	ldrh	r2, [r2, r3]
+	add	r3, r5, r3
+	add	r3, r3, #460
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L2394
+	ldr	r0, .L2400+28
+	mov	r1, r4
+	bl	printk
+.L2394:
+	add	r4, r4, #1
+	uxth	r4, r4
+.L2393:
+	ldrh	r3, [r7, r6]
+	cmp	r3, r4
+	ldr	r3, .L2400+16
+	bhi	.L2395
+	ldr	r2, [r3, #-2004]
+	cmp	r2, #0
+	beq	.L2389
+	ldr	r4, [r3, #-2024]
+	mov	r6, #0
+	ldr	r1, .L2400+32
+	mov	r5, r3
+	rsb	r2, r4, r2
+	ldr	r4, .L2400+36
+	mov	r8, #6
+	movw	sl, #65535
+	mov	r2, r2, asr #1
+	ldrh	r7, [r3, r1]
+	mul	r4, r4, r2
+	uxth	r4, r4
+	b	.L2397
+.L2399:
+	ldr	r2, [r5, #-2016]
+	mov	r3, r4, asl #1
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	beq	.L2398
+	add	r3, r5, r3
+	ldr	r0, .L2400+40
+	add	r3, r3, #460
+	mov	r1, r4
+	ldrh	r3, [r3, #0]
+	bl	printk
+.L2398:
+	mul	r4, r8, r4
+	ldr	r3, [r5, #-2024]
+	ldrh	r4, [r3, r4]
+	cmp	r4, sl
+	beq	.L2389
+	add	r6, r6, #1
+	uxth	r6, r6
+.L2397:
+	cmp	r6, r7
+	bne	.L2399
+.L2389:
+	ldmfd	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, sl, pc}
+.L2401:
+	.align	2
+.L2400:
+	.word	.LANCHOR3+77
+	.word	.LC101
+	.word	.LANCHOR2+460
+	.word	.LANCHOR0
 	.word	.LANCHOR2
+	.word	.LC158
+	.word	.LC159
+	.word	.LC160
+	.word	-2000
+	.word	-1431655765
+	.word	.LC161
 	.fnend
-	.size	FtlLowFormat, .-FtlLowFormat
+	.size	FtlCheckVpc, .-FtlCheckVpc
 	.align	2
 	.global	HynixGetReadRetryDefault
 	.type	HynixGetReadRetryDefault, %function
@@ -20657,7 +21519,7 @@ HynixGetReadRetryDefault:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2416
+	ldr	r3, .L2487
 	mvn	r2, #83
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
@@ -20673,16 +21535,16 @@ HynixGetReadRetryDefault:
 	strb	r0, [r3, #5]
 	strb	r1, [r3, #6]
 	strb	r2, [r3, #7]
-	bne	.L2332
+	bne	.L2403
 	mvn	r2, #88
 	strb	r2, [r3, #4]
-	ldr	r3, .L2416+4
+	ldr	r3, .L2487+4
 	mvn	r2, #8
 	strb	r2, [r3, #3025]
-	b	.L2388
-.L2332:
+	b	.L2459
+.L2403:
 	cmp	r4, #3
-	bne	.L2334
+	bne	.L2405
 	mvn	r2, #79
 	strb	r2, [r3, #4]
 	mvn	r2, #78
@@ -20698,10 +21560,10 @@ HynixGetReadRetryDefault:
 	mvn	r2, #73
 	strb	r2, [r3, #10]
 	mvn	r2, #72
-	b	.L2411
-.L2334:
+	b	.L2482
+.L2405:
 	cmp	r4, #4
-	bne	.L2335
+	bne	.L2406
 	mvn	ip, #51
 	strb	r0, [r3, #9]
 	strb	ip, [r3, #4]
@@ -20714,14 +21576,14 @@ HynixGetReadRetryDefault:
 	strb	ip, [r3, #7]
 	mvn	ip, #50
 	strb	ip, [r3, #8]
-.L2411:
+.L2482:
 	mov	r6, #8
 	strb	r2, [r3, #11]
 	mov	r5, r6
-	b	.L2333
-.L2335:
+	b	.L2404
+.L2406:
 	cmp	r4, #5
-	bne	.L2336
+	bne	.L2407
 	mov	r2, #56
 	mov	r6, #8
 	strb	r2, [r3, #4]
@@ -20731,10 +21593,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	mov	r2, #59
 	strb	r2, [r3, #7]
-	b	.L2410
-.L2336:
+	b	.L2481
+.L2407:
 	cmp	r4, #6
-	bne	.L2337
+	bne	.L2408
 	mov	r2, #14
 	mov	r6, #12
 	strb	r2, [r3, #4]
@@ -20744,10 +21606,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	mov	r2, #17
 	strb	r2, [r3, #7]
-	b	.L2410
-.L2337:
+	b	.L2481
+.L2408:
 	cmp	r4, #7
-	bne	.L2388
+	bne	.L2459
 	mvn	r2, #79
 	mov	r6, #12
 	strb	r2, [r3, #4]
@@ -20770,17 +21632,17 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #12]
 	mvn	r2, #42
 	strb	r2, [r3, #13]
-	b	.L2333
-.L2388:
+	b	.L2404
+.L2459:
 	mov	r6, #7
-.L2410:
+.L2481:
 	mov	r5, #4
-.L2333:
+.L2404:
 	sub	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L2406
-	b	.L2414
-.L2344:
+	bhi	.L2477
+	b	.L2485
+.L2415:
 	add	r2, fp, r8
 	add	r4, fp, #20
 	mov	r7, #0
@@ -20792,7 +21654,7 @@ HynixGetReadRetryDefault:
 	ldr	r1, [r2, #864]
 	add	sl, sl, #8
 	add	sl, r1, sl, asl #8
-.L2340:
+.L2411:
 	add	r2, fp, r7
 	str	r5, [sl, #8]
 	mov	r0, #80
@@ -20806,26 +21668,26 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #12]
 	uxtb	r2, r7
 	cmp	r2, r6
-	bcc	.L2340
+	bcc	.L2411
 	mov	r2, #0
-	b	.L2341
-.L2342:
+	b	.L2412
+.L2413:
 	ldrb	r7, [r0, r1, asl #2]	@ zero_extendqisi2
 	ldrb	r5, [r4, r2]	@ zero_extendqisi2
 	add	r5, r7, r5
 	strb	r5, [ip, r1, asl #3]
 	add	r1, r1, #1
 	cmp	r1, #7
-	bne	.L2342
+	bne	.L2413
 	add	r2, r2, #1
 	cmp	r2, #4
-	beq	.L2343
-.L2341:
+	beq	.L2414
+.L2412:
 	mov	r1, #1
 	add	ip, r4, r2
 	add	r0, r2, r9
-	b	.L2342
-.L2343:
+	b	.L2413
+.L2414:
 	add	r8, r8, #1
 	mov	r2, #0
 	strb	r2, [r4, #16]
@@ -20836,24 +21698,24 @@ HynixGetReadRetryDefault:
 	strb	r2, [r4, #48]
 	strb	r2, [r4, #41]
 	strb	r2, [r4, #49]
-	b	.L2338
-.L2414:
-	ldr	r9, .L2416+8
+	b	.L2409
+.L2485:
+	ldr	r9, .L2487+8
 	mov	r3, r6
 	mov	r8, #0
 	mov	r6, r5
-.L2338:
-	ldr	fp, .L2416
+.L2409:
+	ldr	fp, .L2487
 	ldrb	r2, [fp, #3762]	@ zero_extendqisi2
 	cmp	r2, r8
-	bhi	.L2344
+	bhi	.L2415
 	mov	r5, r6
 	mov	r6, r3
-	b	.L2345
-.L2406:
+	b	.L2416
+.L2477:
 	sub	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L2345
+	bhi	.L2416
 	mul	r3, r6, r5
 	mov	sl, #0
 	mov	r7, sl
@@ -20862,8 +21724,8 @@ HynixGetReadRetryDefault:
 	mov	r3, r3, asl #4
 	str	r2, [sp, #24]
 	str	r3, [sp, #52]
-	b	.L2346
-.L2387:
+	b	.L2417
+.L2458:
 	add	r3, r1, sl
 	ldrb	r6, [r3, #3764]	@ zero_extendqisi2
 	add	r3, r1, r6, asl #3
@@ -20888,30 +21750,30 @@ HynixGetReadRetryDefault:
 	cmp	r4, #4
 	mov	r3, #54
 	str	r3, [r8, #8]
-	bne	.L2349
+	bne	.L2420
 	mov	r3, #255
 	str	r3, [r8, #4]
 	mov	r3, #64
 	str	r3, [r9, fp, asl #8]
 	mov	r3, #204
-	b	.L2412
-.L2349:
+	b	.L2483
+.L2420:
 	sub	r3, r4, #5
 	cmp	r3, #1
-	ldrls	r3, .L2416
+	ldrls	r3, .L2487
 	ldrlsb	r3, [r3, #4]	@ zero_extendqisi2
 	strls	r3, [r8, #4]
 	movls	r3, #82
-	bls	.L2413
-.L2351:
+	bls	.L2484
+.L2422:
 	mov	r3, #174
 	str	r3, [r8, #4]
 	mov	r3, #176
 	str	r7, [r9, fp, asl #8]
-.L2412:
+.L2483:
 	str	r3, [r8, #4]
 	mov	r3, #77
-.L2413:
+.L2484:
 	cmp	r4, #6
 	str	r3, [r9, fp, asl #8]
 	mov	r0, r6
@@ -20939,77 +21801,77 @@ HynixGetReadRetryDefault:
 	cmp	r3, #1
 	str	r3, [sp, #36]
 	movls	r1, #16
-	bls	.L2355
+	bls	.L2426
 	cmp	r4, #7
 	moveq	r1, #32
 	movne	r1, #2
-.L2355:
-	ldr	r3, .L2416+12
+.L2426:
+	ldr	r3, .L2487+12
 	ldr	r2, [r3, #148]
 	mov	r3, #0
-.L2356:
+.L2427:
 	ldr	r0, [r8, #0]
 	strb	r0, [r2, r3]
 	add	r3, r3, #1
 	uxtb	r0, r3
 	cmp	r0, r1
-	bcc	.L2356
+	bcc	.L2427
 	cmp	r4, #7
-	bne	.L2357
+	bne	.L2428
 	mov	r3, #0
-.L2359:
+.L2430:
 	ldrb	r1, [r2, #0]	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2358
+	beq	.L2429
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	cmp	r1, #10
-	beq	.L2358
+	beq	.L2429
 	add	r3, r3, #1
 	add	r2, r2, #4
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2359
-	b	.L2360
-.L2358:
+	bne	.L2430
+	b	.L2431
+.L2429:
 	cmp	r3, #6
-	bls	.L2361
-.L2360:
-	ldr	r0, .L2416+16
+	bls	.L2432
+.L2431:
+	ldr	r0, .L2487+16
 	mov	r1, #0
 	bl	printk
-.L2362:
-	b	.L2362
-.L2357:
+.L2433:
+	b	.L2433
+.L2428:
 	cmp	r4, #6
-	bne	.L2361
+	bne	.L2432
 	mov	r1, #8
-.L2363:
+.L2434:
 	ldrb	r3, [r2], #1	@ zero_extendqisi2
 	cmp	r3, #12
-	beq	.L2361
+	beq	.L2432
 	ldrb	r3, [r2, #7]	@ zero_extendqisi2
 	cmp	r3, #4
-	beq	.L2361
+	beq	.L2432
 	sub	r1, r1, #1
 	uxtb	r1, r1
 	cmp	r1, #0
-	bne	.L2363
-	b	.L2415
-.L2365:
-	b	.L2365
-.L2361:
-	ldr	r3, .L2416+12
+	bne	.L2434
+	b	.L2486
+.L2436:
+	b	.L2436
+.L2432:
+	ldr	r3, .L2487+12
 	mov	r2, #0
 	ldr	ip, [r3, #148]
 	str	ip, [sp, #40]
-.L2366:
+.L2437:
 	ldr	r1, [r8, #0]
 	ldr	lr, [sp, #40]
 	ldr	ip, [sp, #52]
 	strb	r1, [lr, r2]
 	add	r2, r2, #1
 	cmp	r2, ip
-	blt	.L2366
+	blt	.L2437
 	ldr	r2, [sp, #24]
 	ldr	r1, [r3, #148]
 	mov	r3, #8
@@ -21017,10 +21879,10 @@ HynixGetReadRetryDefault:
 	mov	lr, r2, asl #3
 	add	r1, r1, ip
 	str	ip, [sp, #32]
-.L2368:
+.L2439:
 	mov	r2, #0
 	mov	r0, r2
-.L2367:
+.L2438:
 	ldr	ip, [r1, r2]
 	add	r0, r0, #1
 	mvn	ip, ip
@@ -21028,14 +21890,14 @@ HynixGetReadRetryDefault:
 	ldr	ip, [sp, #24]
 	add	r2, r2, #4
 	cmp	r0, ip
-	blt	.L2367
+	blt	.L2438
 	subs	r3, r3, #1
 	add	r1, r1, lr
-	bne	.L2368
+	bne	.L2439
 	str	r3, [sp, #16]
 	str	sl, [sp, #60]
-	b	.L2369
-.L2373:
+	b	.L2440
+.L2444:
 	mov	lr, #1
 	mov	r0, #0
 	mov	ip, lr, asl r2
@@ -21043,7 +21905,7 @@ HynixGetReadRetryDefault:
 	mov	sl, #16
 	str	r3, [sp, #4]
 	str	sl, [sp, #20]
-.L2371:
+.L2442:
 	ldr	r3, [sp, #56]
 	ldr	r3, [r3, r0]
 	and	sl, ip, r3
@@ -21054,13 +21916,13 @@ HynixGetReadRetryDefault:
 	subs	r3, r3, #1
 	add	r0, r0, sl
 	str	r3, [sp, #20]
-	bne	.L2371
+	bne	.L2442
 	cmp	lr, #8
 	add	r2, r2, #1
 	orrhi	r1, r1, ip
 	cmp	r2, #32
 	ldr	r3, [sp, #4]
-	bne	.L2373
+	bne	.L2444
 	ldr	ip, [sp, #16]
 	ldr	r2, [sp, #24]
 	add	ip, ip, #1
@@ -21069,50 +21931,50 @@ HynixGetReadRetryDefault:
 	str	ip, [sp, #16]
 	str	r1, [sl, r3]
 	add	r3, r3, #4
-	bge	.L2374
-.L2369:
-	ldr	sl, .L2416+12
+	bge	.L2445
+.L2440:
+	ldr	sl, .L2487+12
 	mov	r1, #0
 	mov	r2, r1
 	ldr	sl, [sl, #148]
 	add	ip, sl, r3
 	str	ip, [sp, #56]
 	str	sl, [sp, #44]
-	b	.L2373
-.L2374:
-	ldr	r3, .L2416+12
+	b	.L2444
+.L2445:
+	ldr	r3, .L2487+12
 	ldr	sl, [sp, #60]
 	ldr	r1, [r3, #148]
 	mov	r3, #0
 	mov	r2, r3
-.L2376:
+.L2447:
 	ldr	r0, [r1, r3]
 	add	r3, r3, #4
 	cmp	r0, #0
 	addeq	r2, r2, #1
 	cmp	r3, #32
-	bne	.L2376
+	bne	.L2447
 	cmp	r2, #7
-	ble	.L2377
-	ldr	r0, .L2416+20
+	ble	.L2448
+	ldr	r0, .L2487+20
 	mov	r2, #1
 	mov	r3, #1024
 	bl	rknand_print_hex
-	ldr	r0, .L2416+16
+	ldr	r0, .L2487+16
 	mov	r1, #0
 	bl	printk
-.L2378:
-	b	.L2378
-.L2377:
+.L2449:
+	b	.L2449
+.L2448:
 	cmp	r4, #6
 	moveq	r0, #4
 	streq	r0, [sp, #16]
-	beq	.L2379
+	beq	.L2450
 	cmp	r4, #7
 	moveq	lr, #10
 	movne	lr, #8
 	str	lr, [sp, #16]
-.L2379:
+.L2450:
 	cmp	r5, #0
 	ldr	r0, [sp, #40]
 	subne	r3, r5, #1
@@ -21123,14 +21985,14 @@ HynixGetReadRetryDefault:
 	ldr	r1, [sp, #28]
 	addne	r3, r3, #1
 	strne	r3, [sp, #20]
-	b	.L2382
-.L2383:
+	b	.L2453
+.L2454:
 	ldrb	lr, [ip], #1	@ zero_extendqisi2
 	strb	lr, [r1, r3]
 	add	r3, r3, #1
 	uxtb	lr, r3
 	cmp	lr, r5
-	bcc	.L2383
+	bcc	.L2454
 	ldr	r3, [sp, #20]
 	add	r2, r2, #1
 	ldr	ip, [sp, #16]
@@ -21138,12 +22000,12 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #48]
 	add	r1, r1, ip
 	cmp	r2, r3
-	bge	.L2384
-.L2382:
+	bge	.L2455
+.L2453:
 	mov	ip, r0
 	mov	r3, #0
-	b	.L2383
-.L2384:
+	b	.L2454
+.L2455:
 	mov	r3, #255
 	mov	r0, r6
 	str	r3, [r8, #8]
@@ -21152,10 +22014,10 @@ HynixGetReadRetryDefault:
 	cmp	ip, #1
 	movhi	r3, #56
 	strhi	r3, [r8, #8]
-	bhi	.L2386
+	bhi	.L2457
 	mov	r3, #54
 	str	r3, [r8, #8]
-	ldr	r3, .L2416
+	ldr	r3, .L2487
 	mov	r0, sl
 	mvn	r1, #0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -21164,36 +22026,36 @@ HynixGetReadRetryDefault:
 	str	r7, [r9, fp, asl #8]
 	str	r3, [r8, #8]
 	bl	FlashReadCmd
-.L2386:
+.L2457:
 	mov	r0, r6
 	add	sl, sl, #1
 	bl	NandcWaitFlashReady
 	uxtb	sl, sl
-.L2346:
-	ldr	r1, .L2416
+.L2417:
+	ldr	r1, .L2487
 	ldrb	r3, [r1, #3762]	@ zero_extendqisi2
 	cmp	r3, sl
-	bhi	.L2387
+	bhi	.L2458
 	ldr	r6, [sp, #48]
-.L2345:
-	ldr	r3, .L2416
+.L2416:
+	ldr	r3, .L2487
 	strb	r5, [r3, #1]
 	strb	r6, [r3, #2]
 	add	sp, sp, #68
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2415:
-	ldr	r0, .L2416+16
+.L2486:
+	ldr	r0, .L2487+16
 	bl	printk
-	b	.L2365
-.L2417:
+	b	.L2436
+.L2488:
 	.align	2
-.L2416:
+.L2487:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR1+3008
 	.word	.LANCHOR2
-	.word	.LC142
-	.word	.LC143
+	.word	.LC162
+	.word	.LC163
 	.fnend
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.align	2
@@ -21209,15 +22071,15 @@ FlashGetReadRetryDefault:
 	ldmeqfd	sp!, {r3, pc}
 	sub	r2, r3, #1
 	cmp	r2, #6
-	bhi	.L2420
+	bhi	.L2491
 	ldmfd	sp!, {r3, lr}
 	b	HynixGetReadRetryDefault
-.L2420:
+.L2491:
 	cmp	r3, #49
-	bne	.L2421
-	ldr	r0, .L2422
+	bne	.L2492
+	ldr	r0, .L2493
 	mov	r2, #64
-	ldr	r1, .L2422+4
+	ldr	r1, .L2493+4
 	strb	r3, [r0, #0]
 	mov	r3, #4
 	strb	r3, [r0, #1]
@@ -21226,12 +22088,12 @@ FlashGetReadRetryDefault:
 	add	r0, r0, #4
 	bl	memcpy
 	ldmfd	sp!, {r3, pc}
-.L2421:
+.L2492:
 	ldmfd	sp!, {r3, lr}
-	b	FlashGetReadRetryDefault.part.25
-.L2423:
+	b	FlashGetReadRetryDefault.part.27
+.L2494:
 	.align	2
-.L2422:
+.L2493:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+2924
 	.fnend
@@ -21247,9 +22109,9 @@ FlashInit:
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r0, #32768
-	ldr	r5, .L2475
+	ldr	r5, .L2546
 	bl	ftl_malloc
-	ldr	r6, .L2475+4
+	ldr	r6, .L2546+4
 	mov	r4, #0
 	str	r0, [r5, #148]
 	mov	r0, #32768
@@ -21277,161 +22139,161 @@ FlashInit:
 	str	r0, [r5, #224]
 	mov	r0, r7
 	bl	NandcInit
-	ldr	r5, .L2475+8
+	ldr	r5, .L2546+8
 	mov	r7, #44
-.L2428:
+.L2499:
 	uxtb	r0, r4
 	mov	r1, r5
 	bl	FlashReadIDRaw
 	cmp	r4, #0
-	bne	.L2425
+	bne	.L2496
 	ldrb	r3, [r6, #2980]	@ zero_extendqisi2
 	sub	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2466
+	bhi	.L2537
 	ldrb	r3, [r6, #2981]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2467
-.L2425:
+	beq	.L2538
+.L2496:
 	ldrb	r3, [r5, #0]	@ zero_extendqisi2
 	add	r4, r4, #1
 	cmp	r3, #181
 	streqb	r7, [r5, #0]
 	cmp	r4, #4
 	add	r5, r5, #8
-	bne	.L2428
-	ldr	r4, .L2475+4
+	bne	.L2499
+	ldr	r4, .L2546+4
 	ldrb	r3, [r4, #2980]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L2429
+	beq	.L2500
 	ldr	r0, [r4, #3784]
 	bl	NandcSetDdrMode
-.L2429:
-	ldr	r5, .L2475+4
+.L2500:
+	ldr	r5, .L2546+4
 	mov	r1, #0
 	mov	r2, #852
 	mov	r0, r5
 	bl	ftl_memset
-	ldr	r3, .L2475+12
+	ldr	r3, .L2546+12
 	str	r3, [r4, #3624]
 	mov	r3, #0
 	strb	r3, [r4, #860]
 	ldrb	r3, [r4, #2981]	@ zero_extendqisi2
 	cmp	r3, #161
 	cmpne	r3, #241
-	beq	.L2430
+	beq	.L2501
 	cmp	r3, #218
-	beq	.L2430
+	beq	.L2501
 	cmp	r3, #209
-	beq	.L2430
+	beq	.L2501
 	cmp	r3, #220
-	bne	.L2431
+	bne	.L2502
 	ldrb	r2, [r5, #2983]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L2431
-.L2430:
-	ldr	r2, .L2475+4
+	bne	.L2502
+.L2501:
+	ldr	r2, .L2546+4
 	mov	r1, #1
 	mov	r0, #16
-	ldr	ip, .L2475+16
+	ldr	ip, .L2546+16
 	strb	r1, [r2, #852]
-	ldr	r1, .L2475
+	ldr	r1, .L2546
 	strb	r0, [r2, #853]
 	strb	r3, [ip, #3038]
 	strb	r0, [r1, #152]
 	ldrb	r0, [r2, #2980]	@ zero_extendqisi2
 	cmp	r0, #152
 	strb	r0, [ip, #3037]
-	bne	.L2432
+	bne	.L2503
 	ldrb	r0, [r2, #2984]	@ zero_extendqisi2
 	sxtb	r0, r0
 	cmp	r0, #0
 	movge	r0, #24
 	strgeb	r0, [r1, #152]
-.L2432:
+.L2503:
 	ldr	r1, [r2, #3776]
-	ldr	r2, .L2475+20
+	ldr	r2, .L2546+20
 	cmp	r1, r2
-	ldreq	r2, .L2475
+	ldreq	r2, .L2546
 	moveq	r1, #16
 	streqb	r1, [r2, #152]
 	cmp	r3, #218
-	bne	.L2434
-	ldr	r3, .L2475+16
+	bne	.L2505
+	ldr	r3, .L2546+16
 	movw	r2, #3050
 	mov	r1, #2048
 	strh	r1, [r3, r2]	@ movhi
 	mvn	r2, #37
-	b	.L2472
-.L2434:
+	b	.L2543
+.L2505:
 	cmp	r3, #220
-	bne	.L2435
-	ldr	r3, .L2475+16
+	bne	.L2506
+	ldr	r3, .L2546+16
 	movw	r2, #3050
 	mov	r1, #4096
 	strh	r1, [r3, r2]	@ movhi
 	mvn	r2, #35
-.L2472:
+.L2543:
 	strb	r2, [r3, #3038]
-.L2435:
-	ldr	r1, .L2475+24
+.L2506:
+	ldr	r1, .L2546+24
 	mov	r2, #32
-	ldr	r0, .L2475+28
+	ldr	r0, .L2546+28
 	bl	memcpy
-	ldr	r0, .L2475+12
+	ldr	r0, .L2546+12
 	mov	r2, #32
 	add	r1, r0, #144
 	bl	memcpy
-.L2431:
-	ldr	r4, .L2475+4
+.L2502:
+	ldr	r4, .L2546+4
 	ldrb	r3, [r4, #852]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2436
+	bne	.L2507
 	bl	FlashLoadPhyInfoInRam
 	cmp	r0, #0
-	bne	.L2437
+	bne	.L2508
 	ldr	r3, [r4, #3624]
 	ldrh	r0, [r3, #16]
 	ubfx	r0, r0, #8, #3
 	strb	r0, [r4, #3772]
 	tst	r0, #1
-	bne	.L2437
+	bne	.L2508
 	mov	r3, #1
 	strb	r3, [r4, #3780]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #3772]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L2437:
-	ldr	r4, .L2475+4
+.L2508:
+	ldr	r4, .L2546+4
 	ldr	r3, [r4, #3624]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r4, #928]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2436
+	beq	.L2507
 	ldr	r3, [r4, #3784]
 	cmp	r3, #0
-	beq	.L2439
+	beq	.L2510
 	mov	r0, #1
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
-	b	.L2473
-.L2439:
+	b	.L2544
+.L2510:
 	ldrb	r0, [r4, #3772]	@ zero_extendqisi2
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #3772]	@ zero_extendqisi2
-.L2473:
+.L2544:
 	bl	NandcSetMode
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2436
-	ldr	r4, .L2475+4
+	beq	.L2507
+	ldr	r4, .L2546+4
 	mov	r0, #1
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
 	bl	NandcSetMode
-	ldr	r0, .L2475+32
+	ldr	r0, .L2546+32
 	ldr	r3, [r4, #3624]
 	ldrh	r1, [r3, #14]
 	bl	printk
@@ -21442,38 +22304,38 @@ FlashInit:
 	ldr	r3, [r4, #3624]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2475+36
-	ldr	r0, .L2475
+	ldr	r1, .L2546+36
+	ldr	r0, .L2546
 	ldr	r3, [r4, #3624]
 	ldrh	r1, [r0, r1]
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	add	r1, r1, #4080
 	add	r1, r1, #15
 	cmp	r2, r1, lsr #12
-	blt	.L2442
+	blt	.L2513
 	ldrh	r1, [r3, #14]
 	add	r1, r1, #255
 	cmp	r2, r1, lsr #8
-	bge	.L2443
-.L2442:
+	bge	.L2514
+.L2513:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L2443:
-	ldr	r3, .L2475+4
+.L2514:
+	ldr	r3, .L2546+4
 	ldrb	r3, [r3, #3772]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2444
+	beq	.L2515
 	bl	FlashSavePhyInfo
-	ldr	r3, .L2475
+	ldr	r3, .L2546
 	mov	r0, #0
 	ldr	r1, [r3, #160]
 	bl	FlashDdrParaScan
-.L2444:
+.L2515:
 	bl	FlashSavePhyInfo
-.L2436:
-	ldr	r4, .L2475+4
-	ldr	r5, .L2475
+.L2507:
+	ldr	r4, .L2546+4
+	ldr	r5, .L2546
 	ldr	r3, [r4, #3624]
 	ldrb	r2, [r3, #26]	@ zero_extendqisi2
 	ldrh	r0, [r3, #10]
@@ -21499,7 +22361,7 @@ FlashInit:
 	ldr	r3, [r4, #3624]
 	ldrh	r2, [r3, #16]
 	tst	r2, #64
-	beq	.L2445
+	beq	.L2516
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	strb	r0, [r4, #3761]
@@ -21509,77 +22371,77 @@ FlashInit:
 	sub	r3, r0, #1
 	uxtb	r3, r3
 	cmp	r3, #6
-	bhi	.L2446
-	ldr	r3, .L2475+40
+	bhi	.L2517
+	ldr	r3, .L2546+40
 	str	r3, [r5, #172]
 	sub	r3, r0, #5
 	uxtb	r3, r3
 	cmp	r3, #1
 	movls	r3, #1
 	strls	r3, [r4, #3828]
-	bls	.L2448
+	bls	.L2519
 	cmp	r0, #7
 	addeq	r4, r4, #28
-	beq	.L2449
-.L2448:
-	ldr	r4, .L2475+44
-.L2449:
+	beq	.L2520
+.L2519:
+	ldr	r4, .L2546+44
+.L2520:
 	mov	r3, #0
 	mov	r2, r3
-.L2451:
+.L2522:
 	ldrsb	r1, [r4, r2]
 	add	r2, r2, #1
 	cmp	r1, #0
 	addeq	r3, r3, #1
 	cmp	r2, #32
-	bne	.L2451
+	bne	.L2522
 	cmp	r3, #27
-	bls	.L2445
+	bls	.L2516
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L2445
-.L2446:
+	b	.L2516
+.L2517:
 	sub	r3, r0, #17
 	uxtb	r3, r3
 	cmp	r3, #2
-	bhi	.L2452
-	ldr	r3, .L2475+48
+	bhi	.L2523
+	ldr	r3, .L2546+48
 	cmp	r0, #19
 	str	r3, [r5, #172]
 	mov	r3, #7
 	strb	r3, [r5, #140]
 	moveq	r3, #15
 	streqb	r3, [r5, #140]
-	b	.L2445
-.L2452:
+	b	.L2516
+.L2523:
 	cmp	r0, #33
 	cmpne	r0, #65
-	beq	.L2453
+	beq	.L2524
 	cmp	r0, #66
-	bne	.L2454
-.L2453:
-	ldr	r3, .L2475
+	bne	.L2525
+.L2524:
+	ldr	r3, .L2546
 	mov	r1, #4
-	ldr	r2, .L2475+52
+	ldr	r2, .L2546+52
 	str	r2, [r3, #172]
-	ldr	r2, .L2475+4
+	ldr	r2, .L2546+4
 	strb	r1, [r2, #3760]
 	mov	r2, #7
 	strb	r2, [r3, #140]
-	b	.L2445
-.L2454:
+	b	.L2516
+.L2525:
 	cmp	r0, #67
 	cmpne	r0, #34
-	beq	.L2455
+	beq	.L2526
 	cmp	r0, #35
-	beq	.L2455
+	beq	.L2526
 	cmp	r0, #68
-	bne	.L2456
-.L2455:
-	ldr	r3, .L2475
+	bne	.L2527
+.L2526:
+	ldr	r3, .L2546
 	cmp	r0, #35
 	cmpne	r0, #68
-	ldr	r2, .L2475+52
+	ldr	r2, .L2546+52
 	sub	r0, r0, #67
 	uxtb	r0, r0
 	str	r2, [r3, #172]
@@ -21588,68 +22450,68 @@ FlashInit:
 	moveq	r2, #17
 	streqb	r2, [r3, #140]
 	cmp	r0, #1
-	ldr	r3, .L2475+4
+	ldr	r3, .L2546+4
 	movls	r2, #4
 	movhi	r2, #5
 	strb	r2, [r3, #3760]
-	b	.L2445
-.L2456:
+	b	.L2516
+.L2527:
 	cmp	r0, #49
-	ldreq	r3, .L2475+56
+	ldreq	r3, .L2546+56
 	streq	r3, [r5, #172]
-.L2445:
-	ldr	r2, .L2475+4
-	ldr	r3, .L2475+20
+.L2516:
+	ldr	r2, .L2546+4
+	ldr	r3, .L2546+20
 	ldr	r1, [r2, #3776]
 	cmp	r1, r3
-	bne	.L2459
+	bne	.L2530
 	ldrb	r3, [r2, #928]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrne	r3, [r2, #3624]
 	movne	r1, #0
 	strneb	r1, [r3, #18]
-.L2459:
+.L2530:
 	ldrb	r2, [r2, #2980]	@ zero_extendqisi2
-	ldr	r3, .L2475+4
+	ldr	r3, .L2546+4
 	cmp	r2, #44
-	bne	.L2460
+	bne	.L2531
 	ldrb	r2, [r3, #3780]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L2460
+	beq	.L2531
 	ldr	r1, [r3, #3776]
-	ldr	r2, .L2475+20
+	ldr	r2, .L2546+20
 	cmp	r1, r2
-	bne	.L2461
+	bne	.L2532
 	ldrb	r3, [r3, #928]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2460
-.L2461:
-	ldr	r3, .L2475+4
+	bne	.L2531
+.L2532:
+	ldr	r3, .L2546+4
 	mov	r2, #0
 	mov	r0, #1
 	strb	r2, [r3, #3780]
 	bl	FlashSetInterfaceMode
 	mov	r0, #1
 	bl	NandcSetMode
-.L2460:
+.L2531:
 	mov	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r2, .L2475+4
+	ldr	r2, .L2546+4
 	ldrb	r3, [r2, #3772]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2462
+	beq	.L2533
 	ldrb	r2, [r2, #3780]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L2463
+	bne	.L2534
 	tst	r3, #1
-	bne	.L2462
-.L2463:
-	ldr	r3, .L2475
+	bne	.L2533
+.L2534:
+	ldr	r3, .L2546
 	mov	r0, #0
 	ldr	r1, [r3, #160]
 	bl	FlashDdrParaScan
-.L2462:
-	ldr	r4, .L2475+4
+.L2533:
+	ldr	r4, .L2546+4
 	mov	r0, #0
 	bl	flash_exit_slc_mode
 	mov	r8, #16
@@ -21659,7 +22521,7 @@ FlashInit:
 	bl	FlashBchSel
 	add	r0, r4, #932
 	bl	FlashReadIdbDataRaw
-	ldr	r0, .L2475+60
+	ldr	r0, .L2546+60
 	strb	r8, [r4, #853]
 	bl	FlashTimingCfg
 	ldr	r5, [r4, #3624]
@@ -21703,7 +22565,7 @@ FlashInit:
 	ldrb	lr, [r4, #852]	@ zero_extendqisi2
 	strh	r1, [r4, r2]	@ movhi
 	cmp	lr, #1
-	bne	.L2465
+	bne	.L2536
 	mov	r7, r7, lsr #1
 	mov	ip, ip, asl #1
 	mov	r1, r1, asl #1
@@ -21713,21 +22575,21 @@ FlashInit:
 	strh	r7, [r4, r6]	@ movhi
 	strh	ip, [r4, r0]	@ movhi
 	strh	r2, [r4, r3]	@ movhi
-.L2465:
+.L2536:
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	bl	ftl_flash_suspend
 	mov	r0, #0
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L2466:
+.L2537:
 	mvn	r0, #1
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L2467:
+.L2538:
 	mvn	r0, #1
 	ldmfd	sp!, {r4, r5, r6, r7, r8, pc}
-.L2476:
+.L2547:
 	.align	2
-.L2475:
+.L2546:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2980
@@ -21736,7 +22598,7 @@ FlashInit:
 	.word	1446522928
 	.word	.LANCHOR1+2796
 	.word	.LANCHOR0+896
-	.word	.LC144
+	.word	.LC164
 	.word	-894
 	.word	HynixReadRetrial
 	.word	.LANCHOR0+20
@@ -21753,46 +22615,48 @@ rk_ftl_init:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	stmfd	sp!, {r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
+	stmfd	sp!, {r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 	mov	r0, #2048
 	bl	ftl_malloc
-	ldr	r4, .L2481
+	ldr	r4, .L2552
+	ldr	r6, .L2552+4
 	mov	r5, #0
-	add	r1, r4, #464
-	str	r5, [r4, #132]
-	str	r5, [r4, #464]
-	str	r0, [r4, #460]
-	add	r0, r4, #132
+	mov	r1, r6
+	str	r5, [r1, #472]!
+	str	r0, [r6, #468]
+	mov	r0, r4
+	str	r5, [r0, #132]!
 	bl	rknand_get_reg_addr
 	ldr	r3, [r4, #132]
 	cmp	r3, r5
 	mvneq	r4, #0
-	beq	.L2478
+	beq	.L2549
 	bl	rk_nandc_irq_init
-	ldr	r0, [r4, #460]
 	mov	r1, r5
 	mov	r2, r5
 	mov	r3, #2048
+	ldr	r0, [r6, #468]
 	bl	FlashSramLoadStore
 	bl	rknand_flash_cs_init
 	ldr	r0, [r4, #132]
 	bl	FlashInit
 	subs	r4, r0, #0
-	bne	.L2479
+	bne	.L2550
 	bl	FtlInit
-.L2479:
-	ldr	r0, .L2481+4
+.L2550:
+	ldr	r0, .L2552+8
 	mov	r1, r4
 	bl	printk
-.L2478:
+.L2549:
 	mov	r0, r4
-	ldmfd	sp!, {r3, r4, r5, pc}
-.L2482:
+	ldmfd	sp!, {r4, r5, r6, pc}
+.L2553:
 	.align	2
-.L2481:
+.L2552:
 	.word	.LANCHOR2
-	.word	.LC145
+	.word	.LANCHOR4
+	.word	.LC165
 	.fnend
 	.size	rk_ftl_init, .-rk_ftl_init
 	.align	2
@@ -21802,7 +22666,7 @@ FtlReInitForSDUpdata:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2508
+	ldr	r3, .L2579
 	stmfd	sp!, {r4, r5, lr}
 	.save {r4, r5, lr}
 	.pad #20
@@ -21810,22 +22674,22 @@ FtlReInitForSDUpdata:
 	ldrb	r4, [r3, #928]	@ zero_extendqisi2
 	cmp	r4, #0
 	movne	r0, #0
-	bne	.L2484
-	ldr	r5, .L2508+4
+	bne	.L2555
+	ldr	r5, .L2579+4
 	ldr	r0, [r5, #132]
 	bl	FlashInit
 	cmp	r0, #0
 	movne	r0, r4
-	bne	.L2484
+	bne	.L2555
 	bl	FlashLoadFactorBbt
 	cmp	r0, #0
-	beq	.L2485
+	beq	.L2556
 	bl	FlashMakeFactorBbt
-.L2485:
+.L2556:
 	ldr	r0, [r5, #136]
 	bl	FlashReadIdbDataRaw
 	cmp	r0, #0
-	beq	.L2486
+	beq	.L2557
 	mov	r1, #0
 	mov	r2, #16
 	mov	r0, sp
@@ -21834,73 +22698,73 @@ FtlReInitForSDUpdata:
 	mov	r3, #0
 	mov	r0, #1
 	mov	r2, r3
-.L2488:
+.L2559:
 	ands	ip, r1, r0, asl r2
 	add	r2, r2, #1
 	addne	r3, r3, #1
 	cmp	r2, #16
-	bne	.L2488
+	bne	.L2559
 	cmp	r3, #6
-	ldrls	r3, .L2508
-	bls	.L2504
+	ldrls	r3, .L2579
+	bls	.L2575
 	mov	r2, #0
 	mov	r0, #1
-.L2489:
+.L2560:
 	ands	ip, r1, r0, asl r2
 	add	r2, r2, #1
 	addne	r3, r3, #1
 	cmp	r2, #24
-	bne	.L2489
+	bne	.L2560
 	cmp	r3, #17
-	ldr	r3, .L2508
+	ldr	r3, .L2579
 	movhi	r2, #36
-.L2504:
+.L2575:
 	strb	r2, [r3, #853]
 	movw	r2, #3074
-	ldr	r3, .L2508
+	ldr	r3, .L2579
 	ldrb	r1, [r3, #853]	@ zero_extendqisi2
 	strh	r1, [r3, r2]	@ movhi
-.L2486:
-	ldr	r1, .L2508+8
+.L2557:
+	ldr	r1, .L2579+8
 	mov	r4, #1
-	ldr	r0, .L2508+12
+	ldr	r0, .L2579+12
 	bl	printk
-	ldr	r0, .L2508+16
+	ldr	r0, .L2579+16
 	bl	FtlConstantsInit
 	bl	FtlVariablesInit
-	ldr	r3, .L2508
+	ldr	r3, .L2579
 	ldr	r0, [r3, #3852]
 	uxth	r0, r0
 	bl	FtlFreeSysBlkQueueInit
-	b	.L2493
-.L2495:
+	b	.L2564
+.L2566:
 	add	r4, r4, #1
-.L2493:
+.L2564:
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	bne	.L2506
-.L2494:
+	bne	.L2577
+.L2565:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	beq	.L2496
-.L2506:
+	beq	.L2567
+.L2577:
 	bl	FtlLowFormat
 	cmp	r4, #3
-	bls	.L2495
-	b	.L2507
-.L2496:
-	ldr	r3, .L2508+20
+	bls	.L2566
+	b	.L2578
+.L2567:
+	ldr	r3, .L2579+20
 	mov	r2, #1
 	str	r2, [r3, #2996]
-	b	.L2484
-.L2507:
+	b	.L2555
+.L2578:
 	mvn	r0, #0
-.L2484:
+.L2555:
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, pc}
-.L2509:
+.L2580:
 	.align	2
-.L2508:
+.L2579:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC79
@@ -21917,15 +22781,15 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L2512
+	ldr	r3, .L2583
 	ldr	r2, [r3, #3776]
-	ldr	r3, .L2512+4
+	ldr	r3, .L2583+4
 	cmp	r2, r3
 	bxne	lr
 	b	flash_enter_slc_mode
-.L2513:
+.L2584:
 	.align	2
-.L2512:
+.L2583:
 	.word	.LANCHOR0
 	.word	1446522928
 	.fnend
@@ -21938,15 +22802,15 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L2516
+	ldr	r3, .L2587
 	ldr	r2, [r3, #3776]
-	ldr	r3, .L2516+4
+	ldr	r3, .L2587+4
 	cmp	r2, r3
 	bxne	lr
 	b	flash_exit_slc_mode
-.L2517:
+.L2588:
 	.align	2
-.L2516:
+.L2587:
 	.word	.LANCHOR0
 	.word	1446522928
 	.fnend
@@ -21960,13 +22824,13 @@ IdBlockReadData:
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r4, r0
-	ldr	r5, .L2522
+	ldr	r5, .L2593
 	mov	fp, r1
 	.pad #28
 	sub	sp, sp, #28
 	mov	r1, r4
 	mov	sl, r2
-	ldr	r0, .L2522+4
+	ldr	r0, .L2593+4
 	ldr	r3, [r5, #3624]
 	mov	r2, fp
 	mov	r9, r5
@@ -21984,8 +22848,8 @@ IdBlockReadData:
 	mul	r2, r7, r8
 	str	r1, [sp, #16]
 	ubfx	r2, r2, #2, #2
-	b	.L2519
-.L2521:
+	b	.L2590
+.L2592:
 	add	r1, r6, r8
 	ldrb	r0, [r5, #928]	@ zero_extendqisi2
 	ubfx	r1, r1, #2, #16
@@ -21996,12 +22860,12 @@ IdBlockReadData:
 	add	r3, r3, #3072
 	add	r3, r3, #4
 	ldrh	r3, [r3, #0]
-	beq	.L2520
+	beq	.L2591
 	ldr	r0, [r5, #3776]
-	ldr	lr, .L2522+8
+	ldr	lr, .L2593+8
 	cmp	r0, lr
 	moveq	r3, r1
-.L2520:
+.L2591:
 	ldr	r1, [sp, #16]
 	add	r2, r2, r1
 	mla	r2, r7, r3, r2
@@ -22009,7 +22873,7 @@ IdBlockReadData:
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrb	r3, [r9, #3836]	@ zero_extendqisi2
 	str	r3, [sp, #20]
-	ldr	r3, .L2522+12
+	ldr	r3, .L2593+12
 	ldrb	r0, [r3, #152]	@ zero_extendqisi2
 	str	ip, [sp, #4]
 	str	r1, [sp, #8]
@@ -22035,25 +22899,25 @@ IdBlockReadData:
 	add	r6, ip, r6
 	add	sl, sl, ip, asl #9
 	uxth	r6, r6
-.L2519:
+.L2590:
 	cmp	r6, fp
-	bcc	.L2521
+	bcc	.L2592
 	mov	r1, r4
 	mov	r2, fp
 	mov	r3, #0
-	ldr	r0, .L2522+16
+	ldr	r0, .L2593+16
 	bl	printk
 	mov	r0, #0
 	add	sp, sp, #28
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2523:
+.L2594:
 	.align	2
-.L2522:
+.L2593:
 	.word	.LANCHOR0
-	.word	.LC146
+	.word	.LC166
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LC147
+	.word	.LC167
 	.fnend
 	.size	IdBlockReadData, .-IdBlockReadData
 	.section	.text.unlikely
@@ -22063,7 +22927,7 @@ IDBlockWriteData:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2532
+	ldr	r3, .L2603
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r5, r0
@@ -22073,7 +22937,7 @@ IDBlockWriteData:
 	sub	sp, sp, #92
 	mov	r1, r5
 	mov	sl, r2
-	ldr	r0, .L2532+4
+	ldr	r0, .L2603+4
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
 	mov	r2, fp
 	ldrh	r7, [r3, #10]
@@ -22091,14 +22955,14 @@ IDBlockWriteData:
 	bl	FlashEraseBlock
 	cmp	fp, r7
 	movls	r8, #1
-	bls	.L2525
+	bls	.L2596
 	mov	r0, #0
 	add	r1, r7, r5
 	mov	r2, r0
 	mov	r8, #2
 	bl	FlashEraseBlock
-.L2525:
-	ldr	r4, .L2532
+.L2596:
+	ldr	r4, .L2603
 	mov	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r3, [r4, #3624]
@@ -22118,12 +22982,12 @@ IDBlockWriteData:
 	rsb	r1, r1, r5
 	mov	r7, ip
 	str	r1, [sp, #12]
-	b	.L2526
-.L2530:
+	b	.L2597
+.L2601:
 	add	r3, r8, r7
 	ubfx	r3, r3, #2, #16
 	cmp	r3, #0
-	beq	.L2527
+	beq	.L2598
 	add	r1, r3, #1
 	ldrb	r0, [r4, #928]	@ zero_extendqisi2
 	add	r2, r4, r1, asl #1
@@ -22131,16 +22995,16 @@ IDBlockWriteData:
 	add	r2, r2, #3072
 	add	r2, r2, #4
 	ldrh	r2, [r2, #0]
-	beq	.L2528
+	beq	.L2599
 	ldr	r0, [r4, #3776]
-	ldr	ip, .L2532+8
+	ldr	ip, .L2603+8
 	cmp	r0, ip
 	moveq	r2, r1
-.L2528:
+.L2599:
 	sub	r2, r2, #-1073741823
 	mov	r2, r2, asl #2
 	str	r2, [sp, #24]
-.L2527:
+.L2598:
 	movw	r2, #61424
 	str	r2, [sp, #28]
 	add	r2, r4, r3, asl #1
@@ -22148,15 +23012,15 @@ IDBlockWriteData:
 	ldrh	r5, [r2, #4]
 	ldrb	r2, [r4, #928]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L2529
+	beq	.L2600
 	ldr	r2, [r4, #3776]
-	ldr	r1, .L2532+8
+	ldr	r1, .L2603+8
 	cmp	r2, r1
 	moveq	r5, r3
-.L2529:
+.L2600:
 	ldr	ip, [sp, #12]
 	add	r8, r8, #4
-	ldr	r2, .L2532+12
+	ldr	r2, .L2603+12
 	uxth	r8, r8
 	mla	r3, r6, r5, ip
 	ldrb	ip, [r9, #3836]	@ zero_extendqisi2
@@ -22190,27 +23054,27 @@ IDBlockWriteData:
 	mov	r1, r0
 	mov	r0, #0
 	bl	FlashPageProgMsbFFData
-.L2526:
+.L2597:
 	ldr	ip, [sp, #16]
 	cmp	r8, ip
-	bcc	.L2530
+	bcc	.L2601
 	ldr	r5, [sp, #20]
 	mov	r2, fp
 	mov	r3, #0
-	ldr	r0, .L2532+16
+	ldr	r0, .L2603+16
 	mov	r1, r5
 	bl	printk
 	mov	r0, #0
 	add	sp, sp, #92
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2533:
+.L2604:
 	.align	2
-.L2532:
+.L2603:
 	.word	.LANCHOR0
-	.word	.LC148
+	.word	.LC168
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LC149
+	.word	.LC169
 	.fnend
 	.size	IDBlockWriteData, .-IDBlockWriteData
 	.text
@@ -22221,7 +23085,7 @@ write_idblock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2558
+	ldr	r3, .L2629
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	r5, r0
@@ -22232,24 +23096,24 @@ write_idblock:
 	mov	r6, r1
 	mov	r7, r2
 	ldrb	r4, [r3, #9]	@ zero_extendqisi2
-	ldrh	r8, [r3, #10]
+	ldrh	sl, [r3, #10]
 	bl	ftl_malloc
-	subs	sl, r0, #0
-	beq	.L2552
+	subs	r9, r0, #0
+	beq	.L2623
 	add	r5, r5, #508
 	add	r5, r5, #3
 	mov	r5, r5, lsr #9
 	cmp	r5, #8
 	movls	r5, #8
-	bls	.L2536
+	bls	.L2607
 	cmp	r5, #500
-	bhi	.L2552
-.L2536:
-	mul	r4, r8, r4
-	mov	r0, r5
-	uxth	r4, r4
-	str	r4, [sp, #12]
-	mov	r1, r4
+	bhi	.L2623
+.L2607:
+	mul	sl, sl, r4
+	uxth	sl, sl
+	sub	r0, sl, #1
+	add	r0, r0, r5
+	mov	r1, sl
 	bl	__aeabi_uidiv
 	mov	r3, #0
 	movw	r2, #63999
@@ -22257,10 +23121,10 @@ write_idblock:
 	str	r0, [sp, #20]
 	add	r0, r6, #254976
 	add	r0, r0, #1020
-.L2541:
+.L2612:
 	ldr	r1, [r0], #-4
 	cmp	r1, #0
-	bne	.L2537
+	bne	.L2608
 	ldr	r1, [r6, r3, asl #2]
 	add	r3, r3, #1
 	cmp	r3, ip
@@ -22268,29 +23132,29 @@ write_idblock:
 	movcs	r3, #0
 	cmp	r2, #4096
 	str	r1, [r0, #4]
-	bne	.L2541
-	b	.L2540
-.L2537:
-	ldr	r0, .L2558+4
+	bne	.L2612
+	b	.L2611
+.L2608:
+	ldr	r0, .L2629+4
 	bl	printk
-.L2540:
-	ldr	r4, .L2558
+.L2611:
+	ldr	r4, .L2629
 	mov	r1, r7
 	mov	r3, #5
-	ldr	r0, .L2558+8
+	ldr	r0, .L2629+8
 	mov	r2, #4
 	mov	r8, r5
 	bl	rknand_print_hex
 	ldrb	r2, [r4, #853]	@ zero_extendqisi2
 	ldr	r1, [r6, #512]
-	ldr	r0, .L2558+12
+	ldr	r0, .L2629+12
 	bl	printk
-	ldr	r2, .L2558+16
+	ldr	r2, .L2629+16
 	movw	r3, #3074
 	mov	r1, r5
 	ldrh	r3, [r4, r3]
 	ldr	r2, [r2, #156]
-	ldr	r0, .L2558+20
+	ldr	r0, .L2629+20
 	str	r2, [sp, #0]
 	mov	r2, r5
 	bl	printk
@@ -22300,54 +23164,53 @@ write_idblock:
 	mov	r7, r6
 	mov	r1, r5, asl #7
 	cmp	r2, r3
+	str	r1, [sp, #24]
 	mov	r2, #0
-	mov	r9, r2
 	strhi	r3, [r6, #512]
-	str	r1, [sp, #24]
 	str	r2, [sp, #16]
-.L2549:
-	ldr	r1, .L2558
+	str	r2, [sp, #12]
+.L2620:
+	ldr	r1, .L2629
 	ldr	r3, [r4], #4
 	ldrb	r2, [r1, #853]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcs	.L2543
-	ldr	r1, .L2558+16
+	bcs	.L2614
+	ldr	r1, .L2629+16
 	ldr	r2, [r1, #156]
 	cmp	r3, r2
-	bcc	.L2543
+	bcc	.L2614
 	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #20]
+	ldr	r1, [sp, #12]
 	cmp	r2, #1
 	movls	r2, #0
 	movhi	r2, #1
-	cmp	r9, #0
-	cmpne	r1, #1
 	str	r2, [sp, #28]
-	bls	.L2544
+	ldr	r2, [sp, #20]
+	cmp	r1, #0
+	cmpne	r2, #1
+	bls	.L2615
 	ldr	r2, [r4, #-8]
 	add	r2, r2, #1
 	cmp	r3, r2
-	beq	.L2543
-.L2544:
-	mov	r0, sl
+	beq	.L2614
+.L2615:
+	mov	r0, r9
 	mov	r1, #512
 	bl	__memzero
-	ldr	r2, [sp, #12]
 	ldr	r0, [r4, #-4]
 	mov	r1, r8
-	mov	r6, #0
-	mul	r0, r0, r2
 	mov	r2, r7
+	mov	r6, #0
+	mul	r0, r0, sl
 	bl	IDBlockWriteData
-	ldr	r3, [sp, #12]
 	ldr	r0, [r4, #-4]
-	mov	r2, sl
+	mov	r2, r9
 	mov	r1, r8
-	mul	r0, r0, r3
+	mul	r0, r0, sl
 	bl	IdBlockReadData
-	mov	r2, sl
+	mov	r2, r9
 	mov	r3, r7
-.L2548:
+.L2619:
 	mov	fp, r2
 	mov	r5, r3
 	ldr	r0, [fp, #0]
@@ -22355,13 +23218,13 @@ write_idblock:
 	ldr	r1, [r5, #0]
 	add	r3, r3, #4
 	cmp	r0, r1
-	beq	.L2545
-	mov	r0, sl
+	beq	.L2616
+	mov	r0, r9
 	mov	r1, #512
 	bl	__memzero
 	ldr	r3, [fp, #0]
-	mov	r1, r9
-	ldr	r0, .L2558+24
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2629+24
 	str	r3, [sp, #0]
 	ldr	r3, [r5, #0]
 	bic	r5, r6, #255
@@ -22370,82 +23233,82 @@ write_idblock:
 	mov	r3, r6
 	ldr	r2, [r4, #-4]
 	bl	printk
-	ldr	r0, .L2558+28
+	ldr	r0, .L2629+28
 	add	r1, r7, r5
 	mov	r2, #4
 	mov	r3, #256
 	bl	rknand_print_hex
 	mov	r3, #256
-	add	r1, sl, r5
+	add	r1, r9, r5
 	mov	r2, #4
-	ldr	r0, .L2558+32
+	ldr	r0, .L2629+32
 	bl	rknand_print_hex
 	mov	r0, #0
 	bl	flash_boot_enter_slc_mode
-	ldr	r2, [sp, #12]
 	ldr	r1, [r4, #-4]
 	mov	r0, #0
-	mul	r1, r1, r2
 	mov	r2, r0
+	mul	r1, r1, sl
 	bl	FlashEraseBlock
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	beq	.L2546
+	beq	.L2617
 	ldr	r1, [r4, #-4]
 	mov	r0, #0
-	ldr	r2, [sp, #12]
-	add	r1, r1, #1
-	mul	r1, r2, r1
 	mov	r2, r0
+	add	r1, r1, #1
+	mul	r1, sl, r1
 	bl	FlashEraseBlock
-.L2546:
+.L2617:
 	mov	r0, #0
 	bl	flash_boot_exit_slc_mode
-	ldr	r0, .L2558+36
 	ldr	r1, [r4, #-4]
+	ldr	r0, .L2629+36
 	bl	printk
-	ldr	r3, [sp, #24]
-	cmp	r6, r3
-	bcc	.L2543
-	b	.L2547
-.L2545:
+	ldr	r1, [sp, #24]
+	cmp	r6, r1
+	bcc	.L2614
+	b	.L2618
+.L2616:
 	ldr	r1, [sp, #24]
 	add	r6, r6, #1
 	cmp	r6, r1
-	bne	.L2548
-.L2547:
+	bne	.L2619
+.L2618:
 	ldr	r2, [sp, #16]
 	add	r2, r2, #1
 	str	r2, [sp, #16]
-.L2543:
-	add	r9, r9, #1
-	cmp	r9, #5
-	bne	.L2549
-	mov	r0, sl
+.L2614:
+	ldr	r3, [sp, #12]
+	add	r3, r3, #1
+	str	r3, [sp, #12]
+	cmp	r3, #5
+	bne	.L2620
+	mov	r0, r9
 	bl	ftl_free
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
+	ldr	r1, [sp, #16]
+	cmp	r1, #0
 	mvneq	r0, #0
 	movne	r0, #0
-	b	.L2535
-.L2552:
+	b	.L2606
+.L2623:
 	mvn	r0, #0
-.L2535:
+.L2606:
 	add	sp, sp, #36
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2559:
+.L2630:
 	.align	2
-.L2558:
+.L2629:
 	.word	.LANCHOR0
-	.word	.LC150
-	.word	.LC151
-	.word	.LC152
+	.word	.LC170
+	.word	.LC171
+	.word	.LC172
 	.word	.LANCHOR2
-	.word	.LC153
-	.word	.LC154
-	.word	.LC155
-	.word	.LC156
-	.word	.LC157
+	.word	.LC173
+	.word	.LC174
+	.word	.LC175
+	.word	.LC176
+	.word	.LC177
 	.fnend
 	.size	write_idblock, .-write_idblock
 	.align	2
@@ -22460,22 +23323,22 @@ CRC_32:
 	stmfd	sp!, {r4, lr}
 	.save {r4, lr}
 	mov	r2, r0
-	ldr	ip, .L2563
-	b	.L2561
-.L2562:
+	ldr	ip, .L2634
+	b	.L2632
+.L2633:
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	add	r2, r2, #1
 	eor	r4, r4, r0, lsr #24
 	add	r4, ip, r4, asl #2
 	ldr	r4, [r4, #3068]
 	eor	r0, r4, r0, asl #8
-.L2561:
+.L2632:
 	cmp	r2, r1
-	bne	.L2562
+	bne	.L2633
 	ldmfd	sp!, {r4, pc}
-.L2564:
+.L2635:
 	.align	2
-.L2563:
+.L2634:
 	.word	.LANCHOR1
 	.fnend
 	.size	CRC_32, .-CRC_32
@@ -22486,7 +23349,7 @@ rknand_sys_storage_ioctl:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 528
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2681
+	ldr	r3, .L2752
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	cmp	r1, r3
@@ -22494,102 +23357,102 @@ rknand_sys_storage_ioctl:
 	sub	sp, sp, #528
 	mov	r5, r1
 	mov	r4, r2
-	beq	.L2574
-	bhi	.L2583
-	ldr	r3, .L2681+4
+	beq	.L2645
+	bhi	.L2654
+	ldr	r3, .L2752+4
 	cmp	r1, r3
-	beq	.L2571
-	bhi	.L2584
+	beq	.L2642
+	bhi	.L2655
 	sub	r3, r3, #125
 	cmp	r1, r3
-	beq	.L2568
-	bhi	.L2585
+	beq	.L2639
+	bhi	.L2656
 	sub	r3, r3, #237
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2677
-.L2585:
-	ldr	r3, .L2681+8
+	bne	.L2698
+	b	.L2748
+.L2656:
+	ldr	r3, .L2752+8
 	cmp	r1, r3
-	beq	.L2569
+	beq	.L2640
 	add	r3, r3, #1
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2678
-.L2584:
-	ldr	r3, .L2681+12
+	bne	.L2698
+	b	.L2749
+.L2655:
+	ldr	r3, .L2752+12
 	cmp	r1, r3
-	beq	.L2573
-	bhi	.L2586
-	ldr	r3, .L2681+16
+	beq	.L2644
+	bhi	.L2657
+	ldr	r3, .L2752+16
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2679
-.L2586:
-	ldr	r3, .L2681+20
+	bne	.L2698
+	b	.L2750
+.L2657:
+	ldr	r3, .L2752+20
 	cmp	r1, r3
-	beq	.L2573
+	beq	.L2644
 	add	r3, r3, #10
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2573
-.L2583:
-	ldr	r3, .L2681+24
+	bne	.L2698
+	b	.L2644
+.L2654:
+	ldr	r3, .L2752+24
 	cmp	r1, r3
-	beq	.L2579
-	bhi	.L2587
+	beq	.L2650
+	bhi	.L2658
 	sub	r3, r3, #78
 	cmp	r1, r3
-	beq	.L2576
-	bcc	.L2575
+	beq	.L2647
+	bcc	.L2646
 	add	r3, r3, #21
 	cmp	r1, r3
-	beq	.L2577
+	beq	.L2648
 	add	r3, r3, #56
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2680
-.L2587:
-	ldr	r3, .L2681+28
+	bne	.L2698
+	b	.L2751
+.L2658:
+	ldr	r3, .L2752+28
 	cmp	r1, r3
-	beq	.L2582
-	bhi	.L2588
+	beq	.L2653
+	bhi	.L2659
 	sub	r3, r3, #956
 	sub	r3, r3, #1
 	cmp	r1, r3
-	beq	.L2580
+	beq	.L2651
 	add	r3, r3, #956
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2581
-.L2588:
-	ldr	r3, .L2681+32
+	bne	.L2698
+	b	.L2652
+.L2659:
+	ldr	r3, .L2752+32
 	cmp	r1, r3
-	beq	.L2581
+	beq	.L2652
 	add	r3, r3, #1
 	cmp	r1, r3
-	bne	.L2627
-	b	.L2582
-.L2575:
-	ldr	r0, .L2681+36
+	bne	.L2698
+	b	.L2653
+.L2646:
+	ldr	r0, .L2752+36
 	bl	printk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	mov	r1, r4
 	mov	r2, #512
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2676
-.L2589:
-	ldr	r0, .L2681+40
+	bne	.L2747
+.L2660:
+	ldr	r0, .L2752+40
 	ldmia	r5, {r1, r2}
 	bl	printk
 	ldr	r3, [r5, #4]
 	cmp	r3, #8
 	str	r3, [sp, #4]
-	bhi	.L2598
+	bhi	.L2669
 	bl	rknand_device_lock
 	ldr	r1, [sp, #4]
 	mov	r2, r5
@@ -22602,137 +23465,137 @@ rknand_sys_storage_ioctl:
 	mov	r2, r2, asl #9
 	bl	rk_copy_to_user
 	cmp	r0, #0
-	beq	.L2662
-	ldr	r0, .L2681+44
-.L2675:
+	beq	.L2733
+	ldr	r0, .L2752+44
+.L2746:
 	bl	printk
-	b	.L2598
-.L2576:
-	ldr	r0, .L2681+48
+	b	.L2669
+.L2647:
+	ldr	r0, .L2752+48
 	bl	printk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	mov	r1, r4
 	mov	r2, #4096
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2676
-.L2593:
-	ldr	r4, .L2681+52
-	ldr	r0, .L2681+56
+	bne	.L2747
+.L2664:
+	ldr	r4, .L2752+52
+	ldr	r0, .L2752+56
 	ldmia	r5, {r1, r2}
 	bl	printk
-	ldr	r3, [r4, #468]
+	ldr	r3, [r4, #476]
 	cmp	r3, #0
-	bne	.L2594
+	bne	.L2665
 	mov	r0, #260096
 	bl	ftl_malloc
 	cmp	r0, #0
-	str	r0, [r4, #468]
-	beq	.L2598
-.L2595:
+	str	r0, [r4, #476]
+	beq	.L2669
+.L2666:
 	mov	r1, #260096
 	bl	__memzero
-.L2594:
+.L2665:
 	ldr	r2, [r5, #4]
 	movw	r3, #4088
 	cmp	r2, r3
-	bhi	.L2598
+	bhi	.L2669
 	ldr	r3, [r5, #0]
 	cmp	r3, #251904
-	bhi	.L2598
-	ldr	r1, .L2681+52
-	ldr	r0, [r1, #468]
+	bhi	.L2669
+	ldr	r1, .L2752+52
+	ldr	r0, [r1, #476]
 	add	r1, r5, #8
 	add	r0, r0, r3
 	bl	memcpy
-.L2662:
+.L2733:
 	mov	r0, r5
 	bl	ftl_free
-.L2663:
+.L2734:
 	mov	r4, #0
-	b	.L2592
-.L2680:
-	ldr	r0, .L2681+60
+	b	.L2663
+.L2751:
+	ldr	r0, .L2752+60
 	bl	printk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	mov	r1, r4
 	mov	r2, #28
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	beq	.L2597
-.L2676:
-	ldr	r0, .L2681+64
-	b	.L2675
-.L2597:
+	beq	.L2668
+.L2747:
+	ldr	r0, .L2752+64
+	b	.L2746
+.L2668:
 	ldmia	r5, {r1, r2}
-	ldr	r0, .L2681+68
+	ldr	r0, .L2752+68
 	bl	printk
 	ldr	r1, [r5, #0]
 	cmp	r1, #256000
-	bhi	.L2598
-	ldr	r4, .L2681+52
-	ldr	r0, [r4, #468]
+	bhi	.L2669
+	ldr	r4, .L2752+52
+	ldr	r0, [r4, #476]
 	cmp	r0, #0
-	beq	.L2598
-.L2599:
+	beq	.L2669
+.L2670:
 	bl	CRC_32
 	ldr	r3, [r5, #4]
 	cmp	r3, r0
-	beq	.L2600
+	beq	.L2671
 	mov	r0, r5
 	bl	ftl_free
-	b	.L2640
-.L2600:
+	b	.L2711
+.L2671:
 	bl	rknand_device_lock
-	ldr	r1, [r4, #468]
+	ldr	r1, [r4, #476]
 	add	r2, r5, #8
 	ldr	r0, [r5, #0]
 	bl	write_idblock
 	mov	r6, #0
 	bl	rknand_device_unlock
-	ldr	r0, [r4, #468]
+	ldr	r0, [r4, #476]
 	bl	ftl_free
-	str	r6, [r4, #468]
+	str	r6, [r4, #476]
 	mov	r0, r5
 	mov	r4, r6
 	bl	ftl_free
-	b	.L2592
-.L2598:
+	b	.L2663
+.L2669:
 	mov	r0, r5
-	b	.L2666
-.L2577:
-	ldr	r0, .L2681+72
+	b	.L2737
+.L2648:
+	ldr	r0, .L2752+72
 	bl	printk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	bl	ftl_read_flash_info
 	mov	r0, r4
 	mov	r1, r5
 	mov	r2, #11
-	b	.L2671
-.L2574:
-	ldr	r0, .L2681+76
+	b	.L2742
+.L2645:
+	ldr	r0, .L2752+76
 	bl	printk
 	bl	nand_blk_add_whole_disk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	bl	rknand_device_lock
 	mov	r1, #0
 	mov	r2, #64
 	mov	r0, r5
 	bl	FlashReadFacBbtData
 	bl	rknand_device_unlock
-	ldr	r0, .L2681+80
+	ldr	r0, .L2752+80
 	mov	r1, r5
 	mov	r2, #4
 	mov	r3, #8
@@ -22740,25 +23603,25 @@ rknand_sys_storage_ioctl:
 	mov	r0, r4
 	mov	r1, r5
 	mov	r2, #64
-	b	.L2671
-.L2579:
-	ldr	r0, .L2681+84
+	b	.L2742
+.L2650:
+	ldr	r0, .L2752+84
 	bl	printk
-	ldr	r3, .L2681+52
+	ldr	r3, .L2752+52
 	add	r1, sp, #528
 	mov	r0, r4
 	mov	r2, #4
-	ldr	r3, [r3, #472]
+	ldr	r3, [r3, #480]
 	ldr	r3, [r3, #20]
 	str	r3, [r1, #-524]!
-	b	.L2667
-.L2580:
-	ldr	r0, .L2681+88
+	b	.L2738
+.L2651:
+	ldr	r0, .L2752+88
 	bl	printk
 	mov	r0, #4096
 	bl	ftl_malloc
 	subs	r5, r0, #0
-	beq	.L2634
+	beq	.L2705
 	bl	rknand_device_lock
 	mov	r1, #264
 	mov	r2, #2
@@ -22769,259 +23632,259 @@ rknand_sys_storage_ioctl:
 	mov	r0, r4
 	mov	r1, r5
 	mov	r2, #1024
-.L2671:
+.L2742:
 	bl	rk_copy_to_user
 	subs	r4, r0, #0
 	mov	r0, r5
-	beq	.L2603
-.L2666:
+	beq	.L2674
+.L2737:
 	bl	ftl_free
-	b	.L2657
-.L2603:
+	b	.L2728
+.L2674:
 	bl	ftl_free
-	b	.L2592
-.L2568:
-	ldr	r0, .L2681+92
+	b	.L2663
+.L2639:
+	ldr	r0, .L2752+92
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	subs	r5, r0, #0
-	bne	.L2668
-.L2604:
+	bne	.L2739
+.L2675:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+96
+	ldr	r3, .L2752+96
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r3, [sp, #12]
 	cmp	r3, #512
-	bhi	.L2659
-	ldr	r6, .L2681+52
+	bhi	.L2730
+	ldr	r6, .L2752+52
 	mov	r2, #512
 	add	r0, sp, #8
-	ldr	r1, [r6, #472]
+	ldr	r1, [r6, #480]
 	bl	memcpy
-	ldr	r2, [r6, #476]
-	ldr	r3, .L2681+100
+	ldr	r2, [r6, #484]
+	ldr	r3, .L2752+100
 	cmp	r2, r3
-	beq	.L2605
+	beq	.L2676
 	add	r0, sp, #72
 	mov	r1, #128
 	str	r5, [sp, #16]
 	str	r5, [sp, #20]
 	bl	__memzero
-.L2605:
+.L2676:
 	add	r0, sp, #264
 	mov	r1, #256
 	mov	r3, #0
 	str	r3, [sp, #24]
 	bl	__memzero
-	b	.L2674
-.L2569:
-	ldr	r0, .L2681+104
+	b	.L2745
+.L2640:
+	ldr	r0, .L2752+104
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2668
-.L2606:
+	bne	.L2739
+.L2677:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+96
+	ldr	r3, .L2752+96
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r3, [sp, #12]
 	cmp	r3, #512
-	bhi	.L2659
-	ldr	r4, .L2681+52
-	ldr	r3, .L2681+100
-	ldr	r2, [r4, #476]
+	bhi	.L2730
+	ldr	r4, .L2752+52
+	ldr	r3, .L2752+100
+	ldr	r2, [r4, #484]
 	cmp	r2, r3
-	bne	.L2640
+	bne	.L2711
 	ldr	r3, [sp, #20]
 	sub	r2, r3, #1
 	cmp	r2, #127
 	mvnhi	r4, #2
-	bhi	.L2566
-	ldr	r0, [r4, #472]
+	bhi	.L2637
+	ldr	r0, [r4, #480]
 	add	r1, sp, #72
 	str	r3, [r0, #12]
 	add	r0, r0, #64
 	ldr	r2, [sp, #20]
 	bl	memcpy
 	mov	r0, #1
-	ldr	r1, [r4, #472]
-	b	.L2664
-.L2679:
-	ldr	r0, .L2681+108
+	ldr	r1, [r4, #480]
+	b	.L2735
+.L2750:
+	ldr	r0, .L2752+108
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2668
-.L2607:
+	bne	.L2739
+.L2678:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+112
+	ldr	r3, .L2752+112
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r3, [sp, #12]
 	cmp	r3, #512
-	bhi	.L2659
-	ldr	r5, .L2681+52
-	ldr	r4, [r5, #480]
+	bhi	.L2730
+	ldr	r5, .L2752+52
+	ldr	r4, [r5, #488]
 	cmp	r4, #0
-	beq	.L2566
-	ldr	r3, [r5, #484]
-	ldr	r2, .L2681+116
+	beq	.L2637
+	ldr	r3, [r5, #492]
+	ldr	r2, .L2752+116
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L2608
+	beq	.L2679
 	str	r2, [r3, #0]
 	mov	r2, #504
-	ldr	r3, [r5, #484]
+	ldr	r3, [r5, #492]
 	str	r2, [r3, #4]
 	mov	r2, #0
 	str	r2, [r3, #8]
 	str	r2, [r3, #12]
-.L2608:
-	ldr	r1, [r5, #484]
+.L2679:
+	ldr	r1, [r5, #492]
 	mov	r4, #0
 	mov	r0, r4
 	str	r4, [r1, #16]
 	bl	StorageSysDataStore
-	ldr	r3, [r5, #472]
-	ldr	r2, .L2681+96
-	ldr	r5, .L2681+52
+	ldr	r3, [r5, #480]
+	ldr	r2, .L2752+96
+	ldr	r5, .L2752+52
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
 	strne	r2, [r3, #0]
-	ldr	r0, [r5, #472]
+	ldr	r0, [r5, #480]
 	mov	r1, #128
-	ldrne	r3, .L2681+52
+	ldrne	r3, .L2752+52
 	movne	r2, #504
-	ldrne	r3, [r3, #472]
+	ldrne	r3, [r3, #480]
 	stmneib	r3, {r2, r4}
 	mov	r4, #0
 	str	r4, [r0, #12]
 	add	r0, r0, #64
 	bl	__memzero
 	mov	r0, #1
-	ldr	r1, [r5, #472]
+	ldr	r1, [r5, #480]
 	bl	StorageSysDataStore
-	str	r4, [r5, #480]
-	str	r4, [r5, #476]
-	b	.L2592
-.L2571:
-	ldr	r0, .L2681+120
+	str	r4, [r5, #488]
+	str	r4, [r5, #484]
+	b	.L2663
+.L2642:
+	ldr	r0, .L2752+120
 	bl	printk
 	mov	r1, r4
 	add	r0, sp, #8
 	mov	r2, #520
 	bl	rk_copy_from_user
 	subs	r4, r0, #0
-	bne	.L2668
-.L2610:
+	bne	.L2739
+.L2681:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+124
+	ldr	r3, .L2752+124
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r3, [sp, #12]
 	cmp	r3, #512
-	bhi	.L2659
-	ldr	r5, .L2681+52
-	ldr	r3, [r5, #480]
+	bhi	.L2730
+	ldr	r5, .L2752+52
+	ldr	r3, [r5, #488]
 	cmp	r3, #1
-	beq	.L2566
-	ldr	r3, [r5, #484]
+	beq	.L2637
+	ldr	r3, [r5, #492]
 	mov	r0, #0
-	ldr	r2, .L2681+116
+	ldr	r2, .L2752+116
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
 	strne	r2, [r3, #0]
-	ldr	r1, [r5, #484]
-	ldrne	r3, [r5, #484]
+	ldr	r1, [r5, #492]
+	ldrne	r3, [r5, #492]
 	movne	r2, #504
 	strne	r4, [r3, #12]
 	stmneib	r3, {r2, r4}
 	mov	r3, #1
 	str	r3, [r1, #16]
 	bl	StorageSysDataStore
-	ldr	r3, [r5, #472]
-	ldr	r2, .L2681+96
+	ldr	r3, [r5, #480]
+	ldr	r2, .L2752+96
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L2612
+	beq	.L2683
 	str	r2, [r3, #0]
 	mov	r1, #504
-	ldr	r3, .L2681+52
+	ldr	r3, .L2752+52
 	mov	r2, #0
-	ldr	r3, [r3, #472]
+	ldr	r3, [r3, #480]
 	stmib	r3, {r1, r2}
-.L2612:
-	ldr	r5, .L2681+52
+.L2683:
+	ldr	r5, .L2752+52
 	mov	r1, #128
 	mov	r4, #0
-	ldr	r0, [r5, #472]
+	ldr	r0, [r5, #480]
 	str	r4, [r0, #12]
 	add	r0, r0, #64
 	bl	__memzero
 	mov	r0, #1
-	ldr	r1, [r5, #472]
+	ldr	r1, [r5, #480]
 	bl	StorageSysDataStore
 	mov	r3, #1
-	str	r3, [r5, #480]
-	b	.L2592
-.L2678:
-	ldr	r0, .L2681+128
+	str	r3, [r5, #488]
+	b	.L2663
+.L2749:
+	ldr	r0, .L2752+128
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2668
-.L2613:
+	bne	.L2739
+.L2684:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+132
+	ldr	r3, .L2752+132
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r2, [sp, #12]
 	cmp	r2, #512
 	addls	r0, sp, #16
-	ldrls	r1, .L2681+136
-	bls	.L2673
-	b	.L2659
-.L2573:
-	ldr	r3, .L2681+20
+	ldrls	r1, .L2752+136
+	bls	.L2744
+	b	.L2730
+.L2644:
+	ldr	r3, .L2752+20
 	cmp	r5, r3
-	ldreq	r0, .L2681+140
-	beq	.L2660
-	ldr	r3, .L2681+144
+	ldreq	r0, .L2752+140
+	beq	.L2731
+	ldr	r3, .L2752+144
 	cmp	r5, r3
-	ldreq	r0, .L2681+148
-	ldrne	r0, .L2681+152
-.L2660:
+	ldreq	r0, .L2752+148
+	ldrne	r0, .L2752+152
+.L2731:
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2668
-.L2617:
+	bne	.L2739
+.L2688:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+156
+	ldr	r3, .L2752+156
 	cmp	r2, r3
-	bne	.L2657
-	ldr	r3, .L2681+144
-	ldr	r6, .L2681+52
+	bne	.L2728
+	ldr	r3, .L2752+144
+	ldr	r6, .L2752+52
 	cmp	r5, r3
-	bne	.L2618
-	ldr	r3, [r6, #472]
+	bne	.L2689
+	ldr	r3, [r6, #480]
 	mov	r0, r4
 	add	r1, sp, #8
 	mov	r2, #16
@@ -23032,29 +23895,29 @@ rknand_sys_storage_ioctl:
 	cmp	r0, #0
 	moveq	r4, r0
 	mvnne	r4, #13
-	b	.L2566
-.L2618:
-	ldr	r3, [r6, #1000]
+	b	.L2637
+.L2689:
+	ldr	r3, [r6, #1008]
 	cmp	r3, #10
-	bhi	.L2657
-	ldr	r3, [r6, #472]
+	bhi	.L2728
+	ldr	r3, [r6, #480]
 	ldr	r1, [sp, #12]
 	ldr	r2, [r3, #24]
 	cmp	r2, r1
-	beq	.L2619
+	beq	.L2690
 	cmp	r2, #0
-	beq	.L2619
-	ldr	r0, .L2681+160
+	beq	.L2690
+	ldr	r0, .L2752+160
 	bl	printk
-	ldr	r3, [r6, #1000]
+	ldr	r3, [r6, #1008]
 	add	r3, r3, #1
-	str	r3, [r6, #1000]
-	b	.L2657
-.L2619:
-	ldr	r0, .L2681+52
+	str	r3, [r6, #1008]
+	b	.L2728
+.L2690:
+	ldr	r0, .L2752+52
 	mov	r2, #0
-	str	r2, [r0, #1000]
-	ldr	r0, .L2681+20
+	str	r2, [r0, #1008]
+	ldr	r0, .L2752+20
 	cmp	r5, r0
 	mov	r0, #1
 	strne	r1, [r3, #24]
@@ -23067,112 +23930,112 @@ rknand_sys_storage_ioctl:
 	cmn	r0, #1
 	mvneq	r4, #1
 	movne	r4, #0
-	b	.L2592
-.L2581:
-	ldr	r0, .L2681+164
+	b	.L2663
+.L2652:
+	ldr	r0, .L2752+164
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2668
-.L2622:
+	bne	.L2739
+.L2693:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+168
+	ldr	r3, .L2752+168
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r2, [sp, #12]
 	cmp	r2, #504
-	bhi	.L2659
-	ldr	r3, .L2681+172
+	bhi	.L2730
+	ldr	r3, .L2752+172
 	add	r0, sp, #16
 	cmp	r5, r3
-	ldr	r3, .L2681+52
-	ldreq	r1, [r3, #1004]
-	ldrne	r1, [r3, #1008]
+	ldr	r3, .L2752+52
+	ldreq	r1, [r3, #1012]
+	ldrne	r1, [r3, #1016]
 	add	r1, r1, #8
-.L2673:
+.L2744:
 	bl	memcpy
-.L2674:
+.L2745:
 	add	r1, sp, #8
 	mov	r0, r4
 	mov	r2, #520
-.L2667:
+.L2738:
 	bl	rk_copy_to_user
 	subs	r4, r0, #0
-	bne	.L2657
-	b	.L2592
-.L2582:
-	ldr	r0, .L2681+176
+	bne	.L2728
+	b	.L2663
+.L2653:
+	ldr	r0, .L2752+176
 	bl	printk
 	add	r0, sp, #8
 	mov	r1, r4
 	mov	r2, #520
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	beq	.L2625
-.L2668:
-	ldr	r0, .L2681+64
+	beq	.L2696
+.L2739:
+	ldr	r0, .L2752+64
 	bl	printk
-	b	.L2657
-.L2625:
+	b	.L2728
+.L2696:
 	ldr	r2, [sp, #8]
-	ldr	r3, .L2681+168
+	ldr	r3, .L2752+168
 	cmp	r2, r3
-	bne	.L2659
+	bne	.L2730
 	ldr	r2, [sp, #12]
 	cmp	r2, #504
-	bhi	.L2659
-	ldr	r3, .L2681+28
+	bhi	.L2730
+	ldr	r3, .L2752+28
 	add	r2, r2, #8
-	ldr	r4, .L2681+52
+	ldr	r4, .L2752+52
 	cmp	r5, r3
-	bne	.L2626
+	bne	.L2697
 	add	r1, sp, #8
-	ldr	r0, [r4, #1004]
+	ldr	r0, [r4, #1012]
 	bl	memcpy
-	ldr	r1, [r4, #1004]
+	ldr	r1, [r4, #1012]
 	mov	r0, #2
-.L2664:
+.L2735:
 	bl	StorageSysDataStore
 	mov	r4, r0
-	b	.L2592
-.L2626:
+	b	.L2663
+.L2697:
 	add	r1, sp, #8
-	ldr	r0, [r4, #1008]
+	ldr	r0, [r4, #1016]
 	bl	memcpy
 	mov	r0, #3
-	ldr	r1, [r4, #1008]
-	b	.L2664
-.L2677:
-	bl	rknand_dev_flush
-	b	.L2663
-.L2659:
+	ldr	r1, [r4, #1016]
+	b	.L2735
+.L2748:
+	bl	rknand_dev_flush
+	b	.L2734
+.L2730:
 	mvn	r4, #0
-.L2592:
+.L2663:
 	mov	r1, r4
-	ldr	r0, .L2681+180
+	ldr	r0, .L2752+180
 	bl	printk
-	b	.L2566
-.L2627:
+	b	.L2637
+.L2698:
 	mvn	r4, #21
-	b	.L2566
-.L2634:
+	b	.L2637
+.L2705:
 	mvn	r4, #11
-	b	.L2566
-.L2640:
+	b	.L2637
+.L2711:
 	mvn	r4, #1
-	b	.L2566
-.L2657:
+	b	.L2637
+.L2728:
 	mvn	r4, #13
-.L2566:
+.L2637:
 	mov	r0, r4
 	add	sp, sp, #528
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2682:
+.L2753:
 	.align	2
-.L2681:
+.L2752:
 	.word	1074033155
 	.word	1074029694
 	.word	1074029570
@@ -23182,43 +24045,43 @@ rknand_sys_storage_ioctl:
 	.word	1074033235
 	.word	1074034193
 	.word	1074034194
-	.word	.LC158
-	.word	.LC160
-	.word	.LC161
-	.word	.LC162
-	.word	.LANCHOR2
-	.word	.LC163
-	.word	.LC164
-	.word	.LC159
-	.word	.LC165
-	.word	.LC166
-	.word	.LC167
-	.word	.LC168
-	.word	.LC169
-	.word	.LC170
-	.word	.LC171
+	.word	.LC178
+	.word	.LC180
+	.word	.LC181
+	.word	.LC182
+	.word	.LANCHOR4
+	.word	.LC183
+	.word	.LC184
+	.word	.LC179
+	.word	.LC185
+	.word	.LC186
+	.word	.LC187
+	.word	.LC188
+	.word	.LC189
+	.word	.LC190
+	.word	.LC191
 	.word	1263358532
 	.word	-1067903959
-	.word	.LC172
-	.word	.LC173
+	.word	.LC192
+	.word	.LC193
 	.word	1112753220
 	.word	1146313043
-	.word	.LC174
+	.word	.LC194
 	.word	1112755781
-	.word	.LC175
+	.word	.LC195
 	.word	1094995539
-	.word	.LANCHOR2+488
-	.word	.LC176
+	.word	.LANCHOR4+496
+	.word	.LC196
 	.word	1074031676
-	.word	.LC177
-	.word	.LC178
+	.word	.LC197
+	.word	.LC198
 	.word	1280262987
-	.word	.LC179
-	.word	.LC180
+	.word	.LC199
+	.word	.LC200
 	.word	1145980246
 	.word	1074034192
-	.word	.LC181
-	.word	.LC182
+	.word	.LC201
+	.word	.LC202
 	.fnend
 	.size	rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl
 	.align	2
@@ -23231,55 +24094,55 @@ rk_ftl_storage_sys_init:
 	stmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r2, #512
-	ldr	r4, .L2686
+	ldr	r4, .L2757
 	mov	r6, #0
-	add	r0, r4, #488
-	ldr	r5, [r4, #460]
-	str	r6, [r4, #468]
+	add	r0, r4, #496
+	ldr	r5, [r4, #468]
+	str	r6, [r4, #476]
 	add	r1, r5, #1536
 	add	r3, r5, #512
-	str	r5, [r4, #484]
-	str	r3, [r4, #472]
+	str	r5, [r4, #492]
+	str	r3, [r4, #480]
 	add	r3, r5, #1024
-	str	r1, [r4, #1008]
-	str	r3, [r4, #1004]
+	str	r1, [r4, #1016]
+	str	r3, [r4, #1012]
 	bl	memcpy
 	ldr	r7, [r5, #508]
 	ldr	r3, [r5, #16]
 	cmp	r7, r6
-	str	r6, [r4, #476]
-	str	r6, [r4, #1000]
-	str	r3, [r4, #480]
-	beq	.L2684
+	str	r6, [r4, #484]
+	str	r6, [r4, #1008]
+	str	r3, [r4, #488]
+	beq	.L2755
 	mov	r0, r5
 	mov	r1, #508
 	bl	JSHash
 	cmp	r7, r0
-	beq	.L2684
+	beq	.L2755
 	str	r6, [r5, #16]
-	ldr	r0, .L2686+4
-	str	r6, [r4, #480]
+	ldr	r0, .L2757+4
+	str	r6, [r4, #488]
 	bl	printk
-.L2684:
-	ldr	r3, [r4, #480]
+.L2755:
+	ldr	r3, [r4, #488]
 	mov	r0, #2
-	ldr	r4, .L2686
+	ldr	r4, .L2757
 	cmp	r3, #0
-	ldrne	r2, .L2686+8
-	ldrne	r3, .L2686
-	ldr	r1, [r4, #1004]
-	strne	r2, [r3, #476]
+	ldrne	r2, .L2757+8
+	ldrne	r3, .L2757
+	ldr	r1, [r4, #1012]
+	strne	r2, [r3, #484]
 	bl	StorageSysDataLoad
-	ldr	r1, [r4, #1008]
+	ldr	r1, [r4, #1016]
 	mov	r0, #3
 	bl	StorageSysDataLoad
 	ldmfd	sp!, {r3, r4, r5, r6, r7, lr}
 	b	rknand_sys_storage_init
-.L2687:
+.L2758:
 	.align	2
-.L2686:
-	.word	.LANCHOR2
-	.word	.LC183
+.L2757:
+	.word	.LANCHOR4
+	.word	.LC203
 	.word	-1067903959
 	.fnend
 	.size	rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init
@@ -23306,83 +24169,83 @@ rk_ftl_vendor_storage_init:
 	.save {r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r0, #65536
 	bl	ftl_malloc
-	ldr	r7, .L2697
+	ldr	r7, .L2768
 	cmp	r0, #0
-	str	r0, [r7, #1012]
-	beq	.L2695
-	ldr	sl, .L2697+4
+	str	r0, [r7, #1020]
+	beq	.L2766
+	ldr	sl, .L2768+4
 	mov	r6, #0
 	mov	r4, r6
 	mov	r5, r6
 	movw	r8, #65532
-.L2693:
-	ldr	r0, [r7, #1012]
+.L2764:
+	ldr	r0, [r7, #1020]
 	mov	r1, r5, asl #7
 	mov	r2, #0
-	bl	rk_ftl_vendor_ops.constprop.26
+	bl	rk_ftl_vendor_ops.constprop.28
 	cmp	r0, #0
-	bne	.L2691
-	ldr	r3, [r7, #1012]
-	ldr	r0, .L2697+8
+	bne	.L2762
+	ldr	r3, [r7, #1020]
+	ldr	r0, .L2768+8
 	ldr	r1, [r3, #0]
 	ldr	r2, [r3, r8]
 	ldr	r3, [r3, #4]
 	bl	printk
-	ldr	r0, [r7, #1012]
+	ldr	r0, [r7, #1020]
 	ldr	r3, [r0, #0]
 	cmp	r3, sl
-	bne	.L2692
+	bne	.L2763
 	ldr	r3, [r0, r8]
 	ldr	r2, [r0, #4]
 	cmp	r3, r2
-	bne	.L2692
+	bne	.L2763
 	cmp	r4, r3
 	movcc	r6, r5
 	movcc	r4, r3
-.L2692:
+.L2763:
 	add	r5, r5, #1
 	cmp	r5, #2
-	bne	.L2693
+	bne	.L2764
 	cmp	r4, #0
-	beq	.L2694
+	beq	.L2765
 	mov	r1, r6, asl #7
 	mov	r2, #0
-	bl	rk_ftl_vendor_ops.constprop.26
+	bl	rk_ftl_vendor_ops.constprop.28
 	cmp	r0, #0
 	ldmeqfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-	b	.L2691
-.L2694:
+	b	.L2762
+.L2765:
 	mov	r1, #65536
 	bl	__memzero
-	ldr	r3, .L2697
-	ldr	r1, .L2697+4
+	ldr	r3, .L2768
+	ldr	r1, .L2768+4
 	mov	r2, #1
 	mov	r0, r4
-	ldr	r3, [r3, #1012]
+	ldr	r3, [r3, #1020]
 	stmia	r3, {r1, r2}
 	movw	r1, #65532
 	str	r2, [r3, r1]
-	ldr	r2, .L2697+12
+	ldr	r2, .L2768+12
 	strh	r4, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L2691:
-	ldr	r4, .L2697
-	ldr	r0, [r4, #1012]
+.L2762:
+	ldr	r4, .L2768
+	ldr	r0, [r4, #1020]
 	bl	kfree
 	mov	r3, #0
 	mvn	r0, #0
-	str	r3, [r4, #1012]
+	str	r3, [r4, #1020]
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L2695:
+.L2766:
 	mvn	r0, #11
 	ldmfd	sp!, {r3, r4, r5, r6, r7, r8, sl, pc}
-.L2698:
+.L2769:
 	.align	2
-.L2697:
-	.word	.LANCHOR2
+.L2768:
+	.word	.LANCHOR4
 	.word	1380668996
-	.word	.LC184
+	.word	.LC204
 	.word	-1032
 	.fnend
 	.size	rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init
@@ -23395,21 +24258,21 @@ rk_ftl_vendor_read:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	mov	r3, r0
 	mov	r0, r1
-	ldr	r1, .L2706
+	ldr	r1, .L2777
 	stmfd	sp!, {r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-	ldr	ip, [r1, #1012]
+	ldr	ip, [r1, #1020]
 	cmp	ip, #0
 	ldrneh	r4, [ip, #10]
 	movne	r5, ip
 	movne	r1, #0
-	bne	.L2701
-	b	.L2705
-.L2703:
+	bne	.L2772
+	b	.L2776
+.L2774:
 	ldrh	r6, [r5, #16]
 	add	r5, r5, #8
 	cmp	r6, r3
-	bne	.L2702
+	bne	.L2773
 	add	r1, r1, #2
 	add	r1, ip, r1, asl #3
 	ldrh	r4, [r1, #4]
@@ -23422,20 +24285,20 @@ rk_ftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2702:
+.L2773:
 	add	r1, r1, #1
-.L2701:
+.L2772:
 	cmp	r1, r4
-	bcc	.L2703
+	bcc	.L2774
 	mvn	r0, #0
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2705:
+.L2776:
 	mvn	r0, #0
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2707:
+.L2778:
 	.align	2
-.L2706:
-	.word	.LANCHOR2
+.L2777:
+	.word	.LANCHOR4
 	.fnend
 	.size	rk_ftl_vendor_read, .-rk_ftl_vendor_read
 	.align	2
@@ -23445,46 +24308,46 @@ rk_ftl_vendor_write:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2725
+	ldr	r3, .L2796
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 	mov	sl, r0
-	ldr	r4, [r3, #1012]
+	ldr	r4, [r3, #1020]
 	.pad #20
 	sub	sp, sp, #20
 	mov	r9, r1
 	mov	r5, r2
 	cmp	r4, #0
-	beq	.L2721
+	beq	.L2792
 	add	r8, r2, #63
 	ldrh	r2, [r4, #8]
 	ldrh	r3, [r4, #10]
 	bic	r8, r8, #63
 	mov	r7, #0
 	str	r2, [sp, #8]
-	b	.L2710
-.L2717:
+	b	.L2781
+.L2788:
 	add	r2, r7, #2
 	mov	r2, r2, asl #3
 	add	r6, r4, r2
 	ldrh	r2, [r4, r2]
 	cmp	r2, sl
-	bne	.L2711
+	bne	.L2782
 	ldrh	r2, [r6, #4]
 	add	r2, r2, #63
 	bic	r2, r2, #63
 	str	r2, [sp, #12]
 	cmp	r5, r2
-	bls	.L2712
+	bls	.L2783
 	ldrh	r2, [r4, #14]
 	cmp	r2, r8
-	bcc	.L2721
+	bcc	.L2792
 	sub	r3, r3, #1
 	mov	fp, r8
 	ldrh	r6, [r6, #2]
 	mov	r8, r3
-	b	.L2713
-.L2714:
+	b	.L2784
+.L2785:
 	add	r7, r7, #1
 	mov	r2, r2, asl #3
 	add	r0, r7, #2
@@ -23509,10 +24372,10 @@ rk_ftl_vendor_write:
 	bl	memcpy
 	ldr	r3, [sp, #4]
 	add	r6, r6, r3
-.L2713:
+.L2784:
 	cmp	r7, r8
 	add	r2, r7, #2
-	bcc	.L2714
+	bcc	.L2785
 	mov	r2, r2, asl #3
 	uxth	r6, r6
 	add	r3, r4, r2
@@ -23532,8 +24395,8 @@ rk_ftl_vendor_write:
 	add	r3, r2, r3
 	rsb	r8, r8, r3
 	strh	r8, [r4, #14]	@ movhi
-	b	.L2724
-.L2712:
+	b	.L2795
+.L2783:
 	ldrh	r0, [r6, #2]
 	mov	r1, r9
 	mov	r2, r5
@@ -23541,15 +24404,15 @@ rk_ftl_vendor_write:
 	add	r0, r4, r0
 	bl	memcpy
 	strh	r5, [r6, #4]	@ movhi
-	b	.L2724
-.L2711:
+	b	.L2795
+.L2782:
 	add	r7, r7, #1
-.L2710:
+.L2781:
 	cmp	r7, r3
-	bcc	.L2717
+	bcc	.L2788
 	ldrh	r2, [r4, #14]
 	cmp	r2, r8
-	bcc	.L2721
+	bcc	.L2792
 	add	r3, r3, #2
 	uxth	r8, r8
 	mov	r1, r9
@@ -23573,7 +24436,7 @@ rk_ftl_vendor_write:
 	ldrh	r3, [r4, #10]
 	add	r3, r3, #1
 	strh	r3, [r4, #10]	@ movhi
-.L2724:
+.L2795:
 	ldr	r3, [r4, #4]
 	movw	r2, #65532
 	mov	r0, r4
@@ -23590,18 +24453,18 @@ rk_ftl_vendor_write:
 	strhih	r3, [r4, #8]	@ movhi
 	ldr	r3, [sp, #8]
 	mov	r1, r3, asl #7
-	bl	rk_ftl_vendor_ops.constprop.26
+	bl	rk_ftl_vendor_ops.constprop.28
 	mov	r0, #0
-	b	.L2709
-.L2721:
+	b	.L2780
+.L2792:
 	mvn	r0, #0
-.L2709:
+.L2780:
 	add	sp, sp, #20
 	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
-.L2726:
+.L2797:
 	.align	2
-.L2725:
-	.word	.LANCHOR2
+.L2796:
+	.word	.LANCHOR4
 	.fnend
 	.size	rk_ftl_vendor_write, .-rk_ftl_vendor_write
 	.align	2
@@ -23619,30 +24482,30 @@ rk_ftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	subs	r4, r0, #0
 	mvneq	r5, #0
-	beq	.L2728
-	ldr	r3, .L2744
+	beq	.L2799
+	ldr	r3, .L2815
 	cmp	r6, r3
-	beq	.L2730
+	beq	.L2801
 	add	r3, r3, #1
 	cmp	r6, r3
-	bne	.L2741
-	b	.L2743
-.L2730:
+	bne	.L2812
+	b	.L2814
+.L2801:
 	mov	r1, r5
 	mov	r2, #8
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2741
+	bne	.L2812
 	ldr	r2, [r4, #0]
-	ldr	r3, .L2744+4
+	ldr	r3, .L2815+4
 	cmp	r2, r3
-	bne	.L2740
+	bne	.L2811
 	ldrh	r0, [r4, #4]
 	add	r1, r4, #8
 	ldrh	r2, [r4, #6]
 	bl	rk_ftl_vendor_read
 	cmn	r0, #1
-	beq	.L2736
+	beq	.L2807
 	uxth	r2, r0
 	mov	r1, r4
 	strh	r2, [r4, #6]	@ movhi
@@ -23652,48 +24515,48 @@ rk_ftl_vendor_storage_ioctl:
 	cmp	r0, #0
 	moveq	r5, r0
 	mvnne	r5, #13
-	b	.L2729
-.L2743:
+	b	.L2800
+.L2814:
 	mov	r1, r5
 	mov	r2, #8
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2741
+	bne	.L2812
 	ldr	r2, [r4, #0]
-	ldr	r3, .L2744+4
+	ldr	r3, .L2815+4
 	cmp	r2, r3
-	bne	.L2740
+	bne	.L2811
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L2740
+	bhi	.L2811
 	mov	r0, r4
 	mov	r1, r5
 	add	r2, r2, #8
 	bl	rk_copy_from_user
 	cmp	r0, #0
-	bne	.L2741
+	bne	.L2812
 	ldrh	r0, [r4, #4]
 	add	r1, r4, #8
 	ldrh	r2, [r4, #6]
 	bl	rk_ftl_vendor_write
-.L2736:
+.L2807:
 	mov	r5, r0
-	b	.L2729
-.L2740:
+	b	.L2800
+.L2811:
 	mvn	r5, #0
-	b	.L2729
-.L2741:
+	b	.L2800
+.L2812:
 	mvn	r5, #13
-.L2729:
+.L2800:
 	mov	r0, r4
 	bl	kfree
-.L2728:
+.L2799:
 	mov	r0, r5
 	ldmfd	sp!, {r4, r5, r6, pc}
-.L2745:
+.L2816:
 	.align	2
-.L2744:
+.L2815:
 	.word	1074034177
 	.word	1448232273
 	.fnend
@@ -23712,6 +24575,7 @@ rk_ftl_vendor_storage_ioctl:
 	.global	RK29_NANDC1_REG_BASE
 	.global	RK29_NANDC_REG_BASE
 	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	last_cache_match_count
@@ -23939,23 +24803,35 @@ rk_ftl_vendor_storage_ioctl:
 	.global	read_retry_cur_offset
 	.section	.rodata
 	.set	.LANCHOR3,. + 0
-	.type	__func__.14459, %object
-	.size	__func__.14459, 11
-__func__.14459:
+	.type	__func__.14466, %object
+	.size	__func__.14466, 11
+__func__.14466:
 	.ascii	"FtlMemInit\000"
 .LC0:
 	.byte	60
 	.byte	40
 	.byte	24
 	.byte	16
-	.type	__func__.15408, %object
-	.size	__func__.15408, 21
-__func__.15408:
+	.type	__func__.15268, %object
+	.size	__func__.15268, 16
+__func__.15268:
+	.ascii	"FtlScanAllBlock\000"
+	.type	__func__.15249, %object
+	.size	__func__.15249, 17
+__func__.15249:
+	.ascii	"FtlDumpBlockInfo\000"
+	.type	__func__.15516, %object
+	.size	__func__.15516, 21
+__func__.15516:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.14532, %object
-	.size	__func__.14532, 8
-__func__.14532:
+	.type	__func__.14539, %object
+	.size	__func__.14539, 8
+__func__.14539:
 	.ascii	"FtlInit\000"
+	.type	__func__.15213, %object
+	.size	__func__.15213, 12
+__func__.15213:
+	.ascii	"FtlCheckVpc\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
@@ -24092,9 +24968,9 @@ __func__.14532:
 .LC66:
 	.ascii	"WR_CHK = 0x%x %x %x %x\012\000"
 .LC67:
-	.ascii	"Read Err Cnt = 0x%x\012\000"
+	.ascii	"Read Err = 0x%x\012\000"
 .LC68:
-	.ascii	"Prog Err Cnt = 0x%x\012\000"
+	.ascii	"Prog Err = 0x%x\012\000"
 .LC69:
 	.ascii	"gc_free_blk_th= 0x%x\012\000"
 .LC70:
@@ -24116,7 +24992,7 @@ __func__.14532:
 .LC78:
 	.ascii	"%s\012\000"
 .LC79:
-	.ascii	"FTL version: 5.0.48 20180528\000"
+	.ascii	"FTL version: 5.0.48 20180703\000"
 .LC80:
 	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
 	.ascii	"\012\000"
@@ -24162,174 +25038,220 @@ __func__.14532:
 .LC100:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 .LC101:
-	.ascii	"prog error: = %x\012\000"
+	.ascii	"...%s enter...\012\000"
 .LC102:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"blk = %x vpc=%x mode = %x\012\000"
 .LC103:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
 .LC104:
-	.ascii	"prog read d error: = %x %x %x\012\000"
+	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
 .LC105:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.ascii	"superBlkID = %x vpc=%x\012\000"
 .LC106:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+	.ascii	"flashmode = %x pagenum = %x %x\012\000"
 .LC107:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
 .LC108:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.ascii	"prog error: = %x\012\000"
 .LC109:
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
+	.ascii	"prog read error: = %x\012\000"
 .LC110:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.ascii	"prog read s error: = %x %x %x\012\000"
 .LC111:
-	.ascii	"FlashMakeFactorBbt %d\012\000"
+	.ascii	"prog read d error: = %x %x %x\012\000"
 .LC112:
-	.ascii	"bad block:%d %d\012\000"
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 .LC113:
-	.ascii	"FMFB:%d %d\012\000"
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
 .LC114:
-	.ascii	"E:bad block:%d\012\000"
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
 .LC115:
-	.ascii	"FMFB:Save %d %d\012\000"
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 .LC116:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 .LC117:
-	.ascii	"page map lost: %x %x\012\000"
+	.ascii	"decrement_vpc_count %x = %d\012\000"
 .LC118:
-	.ascii	"FtlMapWritePage error = %x\012\000"
+	.ascii	"FlashMakeFactorBbt %d\012\000"
 .LC119:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"bad block:%d %d\012\000"
 .LC120:
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+	.ascii	"FMFB:%d %d\012\000"
 .LC121:
-	.ascii	"slc mode\000"
+	.ascii	"E:bad block:%d\012\000"
 .LC122:
-	.ascii	"no ect\000"
+	.ascii	"FMFB:Save %d %d\012\000"
 .LC123:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
 .LC124:
-	.ascii	"page map lost %x %x %x %x\012\000"
+	.ascii	"page map lost: %x %x\012\000"
 .LC125:
-	.ascii	"RSB refresh addr %x\012\000"
+	.ascii	"FtlMapWritePage error = %x\012\000"
 .LC126:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC127:
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 .LC128:
-	.ascii	"...%s enter...\012\000"
+	.ascii	"slc mode\000"
 .LC129:
-	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
+	.ascii	"no ect\000"
 .LC130:
-	.ascii	"%d GC datablk  = %x vpc %x %x\012\000"
+	.ascii	"FLFB:%d %d\012\000"
 .LC131:
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
 .LC132:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.ascii	"Mblk:\000"
 .LC133:
-	.ascii	"GC des block %x done\012\000"
+	.ascii	"L2P:\000"
 .LC134:
-	.ascii	"rk_ftl_de_init %x\012\000"
+	.ascii	"L2PC:\000"
 .LC135:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
+	.ascii	"\000"
 .LC136:
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.ascii	":\000"
 .LC137:
-	.ascii	"...%s: no bad block mapping table, format device\012"
-	.ascii	"\000"
+	.ascii	"BBT:\000"
 .LC138:
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 .LC139:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC140:
-	.ascii	"FLFB:%d %d\012\000"
+	.ascii	"map_ppn:\000"
 .LC141:
-	.ascii	"BBT:\000"
+	.ascii	"Ftlscanalldata = %x\012\000"
 .LC142:
-	.ascii	"otp error! %d\000"
+	.ascii	"scan lpa = %x ppa= %x\012\000"
 .LC143:
-	.ascii	"rr\000"
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
 .LC144:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.ascii	"RSB refresh addr %x\012\000"
 .LC145:
-	.ascii	"FtlInit %x\012\000"
+	.ascii	"spuer block %x vpn is 0\012 \000"
 .LC146:
-	.ascii	"IdBlockReadData %x %x\012\000"
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 .LC147:
-	.ascii	"IdBlockReadData %x %x ret= %x\012\000"
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 .LC148:
-	.ascii	"IDBlockWriteData %x %x\012\000"
+	.ascii	"GC des block %x done\012\000"
 .LC149:
-	.ascii	"IDBlockWriteData %x %x ret= %x\012\000"
+	.ascii	"%d GC datablk  = %x vpc %x %x\012\000"
 .LC150:
-	.ascii	"write_idblock fix data %x %x\012\000"
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 .LC151:
-	.ascii	"idblk:\000"
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 .LC152:
-	.ascii	"idb reverse %x %x\012\000"
+	.ascii	"rk_ftl_de_init %x\012\000"
 .LC153:
-	.ascii	"write_idblock totle_sec %x %x %x %x\012\000"
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
 .LC154:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+.LC155:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC156:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+.LC157:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+.LC158:
+	.ascii	"vpc1\000"
+.LC159:
+	.ascii	"vpc2\000"
+.LC160:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC161:
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
+.LC162:
+	.ascii	"otp error! %d\000"
+.LC163:
+	.ascii	"rr\000"
+.LC164:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+.LC165:
+	.ascii	"FtlInit %x\012\000"
+.LC166:
+	.ascii	"IdBlockReadData %x %x\012\000"
+.LC167:
+	.ascii	"IdBlockReadData %x %x ret= %x\012\000"
+.LC168:
+	.ascii	"IDBlockWriteData %x %x\012\000"
+.LC169:
+	.ascii	"IDBlockWriteData %x %x ret= %x\012\000"
+.LC170:
+	.ascii	"write_idblock fix data %x %x\012\000"
+.LC171:
+	.ascii	"idblk:\000"
+.LC172:
+	.ascii	"idb reverse %x %x\012\000"
+.LC173:
+	.ascii	"write_idblock totle_sec %x %x %x %x\012\000"
+.LC174:
 	.ascii	"write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
 	.ascii	"\012\000"
-.LC155:
+.LC175:
 	.ascii	"write\000"
-.LC156:
+.LC176:
 	.ascii	"read\000"
-.LC157:
+.LC177:
 	.ascii	"write_idblock error %d\012\000"
-.LC158:
+.LC178:
 	.ascii	"READ_SECTOR_IO\012\000"
-.LC159:
+.LC179:
 	.ascii	"rk_copy_from_user error\012\000"
-.LC160:
+.LC180:
 	.ascii	"READ_SECTOR_IO %x %x\012\000"
-.LC161:
+.LC181:
 	.ascii	"rk_copy_to_user error\012\000"
-.LC162:
+.LC182:
 	.ascii	"WRITE_SECTOR_IO\012\000"
-.LC163:
+.LC183:
 	.ascii	"WRITE_SECTOR_IO %x %x\012\000"
-.LC164:
+.LC184:
 	.ascii	"END_WRITE_SECTOR_IO\012\000"
-.LC165:
+.LC185:
 	.ascii	"END_WRITE_SECTOR_IO %x %x\012\000"
-.LC166:
+.LC186:
 	.ascii	"GET_FLASH_INFO_IO\012\000"
-.LC167:
+.LC187:
 	.ascii	"GET_BAD_BLOCK_IO\012\000"
-.LC168:
+.LC188:
 	.ascii	"bbt:\000"
-.LC169:
+.LC189:
 	.ascii	"GET_LOCK_FLAG_IO\012\000"
-.LC170:
+.LC190:
 	.ascii	"GET_PUBLIC_KEY_IO\012\000"
-.LC171:
+.LC191:
 	.ascii	"RKNAND_GET_DRM_KEY\012\000"
-.LC172:
+.LC192:
 	.ascii	"RKNAND_STORE_DRM_KEY\012\000"
-.LC173:
+.LC193:
 	.ascii	"RKNAND_DIASBLE_SECURE_BOOT\012\000"
-.LC174:
+.LC194:
 	.ascii	"RKNAND_ENASBLE_SECURE_BOOT\012\000"
-.LC175:
+.LC195:
 	.ascii	"RKNAND_GET_SN_SECTOR\012\000"
-.LC176:
+.LC196:
 	.ascii	"RKNAND_LOADER_UNLOCK\012\000"
-.LC177:
+.LC197:
 	.ascii	"RKNAND_LOADER_STATUS\012\000"
-.LC178:
+.LC198:
 	.ascii	"RKNAND_LOADER_LOCK\012\000"
-.LC179:
+.LC199:
 	.ascii	"LockKey not match %d\012\000"
-.LC180:
+.LC200:
 	.ascii	"RKNAND_GET_VENDOR_SECTOR\012\000"
-.LC181:
+.LC201:
 	.ascii	"RKNAND_STORE_VENDOR_SECTOR\012\000"
-.LC182:
+.LC202:
 	.ascii	"return ret = %lx\012\000"
-.LC183:
+.LC203:
 	.ascii	"secureBootEn check error\012\000"
-.LC184:
+.LC204:
 	.ascii	"\0013vendor storage %x,%x,%x\012\000"
 	.data
 	.align	2
@@ -27056,6 +27978,7 @@ gTable_Crc32:
 	.align	2
 	.set	.LANCHOR0,. + 0
 	.set	.LANCHOR2,. + 8184
+	.set	.LANCHOR4,. + 16368
 	.type	gReadRetryInfo, %object
 	.size	gReadRetryInfo, 852
 gReadRetryInfo:
@@ -27393,10 +28316,6 @@ g_MaxLpn:
 	.size	gBbtInfo, 60
 gBbtInfo:
 	.space	60
-	.type	gSysFreeQueue, %object
-	.size	gSysFreeQueue, 2056
-gSysFreeQueue:
-	.space	2056
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
@@ -27413,6 +28332,10 @@ p_erase_count_table:
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -27942,14 +28865,14 @@ g_gc_cur_blk_max_valid_pages:
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
-	.space	4
-	.type	gc_discard_updated, %object
-	.size	gc_discard_updated, 4
-gc_discard_updated:
 	.space	4
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
+	.space	4
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
 	.space	4
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
@@ -27959,6 +28882,10 @@ g_ftl_nand_free_count:
 	.size	last_cache_match_count, 4
 last_cache_match_count:
 	.space	4
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.space	8192
 	.type	gLoaderBootInfo, %object
 	.size	gLoaderBootInfo, 4
 gLoaderBootInfo:
diff --git a/drivers/rk_nand/rk_ftlv5_arm64.S b/drivers/rk_nand/rk_ftlv5_arm64.S
index 3b00f1785f9a1..379404130efdf 100644
--- a/drivers/rk_nand/rk_ftlv5_arm64.S
+++ b/drivers/rk_nand/rk_ftlv5_arm64.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-06-15
+ * date: 2018-07-03
  * function: rk ftl v5 for rockchip soc base on arm v8 to support MLC NAND.
  */
 	.cpu generic+fp+simd
@@ -1857,6 +1857,40 @@ SandiskSetRRPara:
 	ret
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.align	2
+	.global	micron_auto_read_calibration_config
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	str	x19, [sp,16]
+	uxtb	w19, w0
+	mov	w0, w19
+	sbfiz	x19, x19, 4, 32
+	str	x1, [x29,40]
+	bl	NandcWaitFlashReady
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
+	add	x3, x3, 40
+	add	x0, x3, x19
+	ldr	x19, [x3,x19]
+	ldrb	w2, [x0,8]
+	mov	w0, 239
+	add	x19, x19, x2, lsl 8
+	str	w0, [x19,2056]
+	mov	w0, 150
+	str	w0, [x19,2052]
+	mov	w0, 200
+	bl	NandcDelayns
+	ldr	x1, [x29,40]
+	str	w1, [x19,2048]
+	str	wzr, [x19,2048]
+	str	wzr, [x19,2048]
+	str	wzr, [x19,2048]
+	ldr	x19, [sp,16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
+	.align	2
 	.global	FlashEraseSLc2KBlocks
 	.type	FlashEraseSLc2KBlocks, %function
 FlashEraseSLc2KBlocks:
@@ -1874,9 +1908,9 @@ FlashEraseSLc2KBlocks:
 	mov	w22, 0
 	add	x25, x21, 1720
 	add	x23, x23, :lo12:.LC1
-.L260:
+.L261:
 	cmp	w22, w24
-	beq	.L269
+	beq	.L270
 	add	x2, x29, 88
 	sub	w4, w24, w22
 	mov	x0, x20
@@ -1886,11 +1920,11 @@ FlashEraseSLc2KBlocks:
 	ldr	w2, [x29,92]
 	ldrb	w0, [x21,1676]
 	cmp	w2, w0
-	bcc	.L261
+	bcc	.L262
 	mov	w0, -1
 	str	w0, [x20]
-	b	.L262
-.L261:
+	b	.L263
+.L262:
 	uxtw	x2, w2
 	add	x0, x21, x2
 	ldrb	w19, [x0,1680]
@@ -1923,24 +1957,24 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29,88]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L263
+	tbz	x0, 0, .L264
 	mov	w0, -1
 	str	w0, [x20]
-.L263:
+.L264:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L264
+	bne	.L265
 	ldr	w1, [x29,88]
 	mov	x0, x23
 	bl	printk
-.L264:
+.L265:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-.L262:
+.L263:
 	add	w22, w22, 1
 	add	x20, x20, 56
-	b	.L260
-.L269:
+	b	.L261
+.L270:
 	mov	w0, 0
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -1974,16 +2008,16 @@ HynixGetReadRetryDefault:
 	mov	w0, -81
 	strb	w3, [x1,6]
 	strb	w0, [x1,7]
-	bne	.L271
+	bne	.L272
 	mov	w0, -89
 	strb	w0, [x1,4]
 	adrp	x0, .LANCHOR1+3017
 	mov	w1, -9
 	strb	w1, [x0,#:lo12:.LANCHOR1+3017]
-	b	.L326
-.L271:
+	b	.L327
+.L272:
 	cmp	w26, 3
-	bne	.L273
+	bne	.L274
 	mov	w0, -80
 	strb	w0, [x1,4]
 	mov	w0, -79
@@ -1999,10 +2033,10 @@ HynixGetReadRetryDefault:
 	mov	w0, -74
 	strb	w0, [x1,10]
 	mov	w0, -73
-	b	.L359
-.L273:
+	b	.L360
+.L274:
 	cmp	w26, 4
-	bne	.L274
+	bne	.L275
 	mov	w5, -52
 	strb	w5, [x1,4]
 	mov	w5, -65
@@ -2015,14 +2049,14 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x1,10]
 	strb	w5, [x1,8]
-.L359:
+.L360:
 	mov	w27, 8
 	strb	w0, [x1,11]
 	mov	w28, w27
-	b	.L272
-.L274:
+	b	.L273
+.L275:
 	cmp	w26, 5
-	bne	.L275
+	bne	.L276
 	mov	w0, 56
 	strb	w0, [x1,4]
 	mov	w0, 57
@@ -2032,10 +2066,10 @@ HynixGetReadRetryDefault:
 	strb	w0, [x1,6]
 	mov	w0, 59
 	strb	w0, [x1,7]
-	b	.L358
-.L275:
+	b	.L359
+.L276:
 	cmp	w26, 6
-	bne	.L276
+	bne	.L277
 	mov	w0, 14
 	strb	w0, [x1,4]
 	mov	w0, 15
@@ -2045,10 +2079,10 @@ HynixGetReadRetryDefault:
 	strb	w0, [x1,6]
 	mov	w0, 17
 	strb	w0, [x1,7]
-	b	.L358
-.L276:
+	b	.L359
+.L277:
 	cmp	w26, 7
-	bne	.L326
+	bne	.L327
 	mov	w0, -80
 	strb	w0, [x1,4]
 	mov	w0, -79
@@ -2071,15 +2105,15 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w0, -43
 	strb	w0, [x1,13]
-	b	.L272
-.L326:
+	b	.L273
+.L327:
 	mov	w27, 7
-.L358:
+.L359:
 	mov	w28, 4
-.L272:
+.L273:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L355
+	bhi	.L356
 	adrp	x22, .LANCHOR1
 	add	x25, x20, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:.LANCHOR1
@@ -2087,10 +2121,10 @@ HynixGetReadRetryDefault:
 	add	x26, x25, 4056
 	add	x3, x25, 40
 	add	x22, x22, 3000
-.L277:
+.L278:
 	ldrb	w0, [x25,1676]
 	cmp	w0, w21
-	bls	.L284
+	bls	.L285
 	add	x0, x25, x21, sxtw
 	ldrb	w0, [x0,1680]
 	mov	x23, 0
@@ -2102,7 +2136,7 @@ HynixGetReadRetryDefault:
 	ldrb	w0, [x1,8]
 	mov	w1, 55
 	add	x24, x24, x0, lsl 8
-.L279:
+.L280:
 	add	x0, x26, x23
 	str	w1, [x24,2056]
 	str	x3, [x29,128]
@@ -2117,12 +2151,12 @@ HynixGetReadRetryDefault:
 	ldr	x1, [x29,136]
 	cmp	w28, w23, uxtb
 	ldr	x3, [x29,128]
-	bhi	.L279
+	bhi	.L280
 	mov	x0, 0
-.L280:
+.L281:
 	add	w2, w0, 8
 	mov	x1, 0
-.L281:
+.L282:
 	add	x5, x1, x0
 	add	x1, x1, 4
 	add	x5, x22, x5
@@ -2132,10 +2166,10 @@ HynixGetReadRetryDefault:
 	add	w5, w6, w5
 	strb	w5, [x19,w2,sxtw]
 	add	w2, w2, 8
-	bne	.L281
+	bne	.L282
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L280
+	bne	.L281
 	add	w21, w21, 1
 	strb	wzr, [x19,16]
 	strb	wzr, [x19,24]
@@ -2145,11 +2179,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19,48]
 	strb	wzr, [x19,41]
 	strb	wzr, [x19,49]
-	b	.L277
-.L355:
+	b	.L278
+.L356:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L284
+	bhi	.L285
 	mul	w25, w28, w27
 	sub	w23, w28, #1
 	mov	w21, 0
@@ -2165,11 +2199,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29,128]
 	sub	w0, w26, #5
 	str	w0, [x29,136]
-.L285:
+.L286:
 	ldrb	w0, [x25,1676]
 	cmp	w0, w21
-	bhi	.L325
-.L284:
+	bhi	.L326
+.L285:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -2180,7 +2214,7 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp,80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L325:
+.L326:
 	add	x0, x25, x21, sxtw
 	ldrb	w1, [x0,1680]
 	str	x1, [x29,112]
@@ -2198,42 +2232,42 @@ HynixGetReadRetryDefault:
 	cmp	w26, 7
 	add	x6, x25, 4056
 	ldr	x1, [x29,112]
-	beq	.L286
+	beq	.L287
 	add	x1, x6, x1, lsl 6
 	add	x6, x1, 20
-	b	.L287
-.L286:
+	b	.L288
+.L287:
 	mov	x0, 160
 	madd	x1, x1, x0, x6
 	add	x6, x1, 28
-.L287:
+.L288:
 	mov	w0, 54
 	cmp	w26, 4
 	str	w0, [x19,2056]
-	bne	.L288
+	bne	.L289
 	mov	w0, 255
 	str	w0, [x19,2052]
 	mov	w0, 64
 	str	w0, [x19,2048]
 	mov	w0, 204
-	b	.L360
-.L288:
+	b	.L361
+.L289:
 	ldr	w0, [x29,136]
 	cmp	w0, 1
-	bhi	.L290
+	bhi	.L291
 	ldrb	w0, [x25,4060]
 	str	w0, [x19,2052]
 	mov	w0, 82
-	b	.L361
-.L290:
+	b	.L362
+.L291:
 	mov	w0, 174
 	str	w0, [x19,2052]
 	str	wzr, [x19,2048]
 	mov	w0, 176
-.L360:
+.L361:
 	str	w0, [x19,2052]
 	mov	w0, 77
-.L361:
+.L362:
 	str	w0, [x19,2048]
 	mov	w0, 22
 	str	w0, [x19,2056]
@@ -2247,13 +2281,13 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19,2056]
 	str	wzr, [x19,2052]
 	str	wzr, [x19,2052]
-	bne	.L291
+	bne	.L292
 	mov	w0, 31
 	str	w0, [x19,2052]
-	b	.L292
-.L291:
-	str	wzr, [x19,2052]
+	b	.L293
 .L292:
+	str	wzr, [x19,2052]
+.L293:
 	mov	w7, 2
 	str	w7, [x19,2052]
 	str	wzr, [x19,2052]
@@ -2267,85 +2301,85 @@ HynixGetReadRetryDefault:
 	mov	w1, 16
 	ldr	x6, [x29,104]
 	cmp	w0, 1
-	bls	.L294
+	bls	.L295
 	ldr	x7, [x29,112]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L294:
+.L295:
 	ldr	x0, [x25]
 	mov	x7, 0
-.L295:
+.L296:
 	ldr	w8, [x19,2048]
 	strb	w8, [x0,x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L295
+	bhi	.L296
 	cmp	w26, 7
-	bne	.L296
+	bne	.L297
 	mov	w1, 0
-.L298:
+.L299:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L297
+	beq	.L298
 	ldrb	w7, [x0,1]
 	cmp	w7, 10
-	beq	.L297
+	beq	.L298
 	add	w1, w1, 1
 	add	x0, x0, 4
 	uxtb	w1, w1
 	cmp	w1, 8
-	bne	.L298
-	b	.L299
-.L297:
+	bne	.L299
+	b	.L300
+.L298:
 	cmp	w1, 7
-	bne	.L300
-.L299:
+	bne	.L301
+.L300:
 	adrp	x0, .LC2
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC2
 	bl	printk
-.L301:
-	b	.L301
-.L296:
+.L302:
+	b	.L302
+.L297:
 	cmp	w26, 6
-	bne	.L300
+	bne	.L301
 	mov	x1, 0
-.L302:
+.L303:
 	ldrb	w7, [x0,x1]
 	cmp	w7, 12
-	beq	.L300
+	beq	.L301
 	add	x7, x0, x1
 	ldrb	w7, [x7,8]
 	cmp	w7, 4
-	beq	.L300
+	beq	.L301
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L302
+	bne	.L303
 	adrp	x0, .LC2
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC2
 	bl	printk
-.L304:
-	b	.L304
-.L300:
+.L305:
+	b	.L305
+.L301:
 	ldr	x9, [x25]
 	mov	x0, 0
-.L305:
+.L306:
 	ldr	w1, [x29,124]
 	cmp	w1, w0
-	ble	.L362
+	ble	.L363
 	ldr	w1, [x19,2048]
 	strb	w1, [x9,x0]
 	add	x0, x0, 1
-	b	.L305
-.L362:
+	b	.L306
+.L363:
 	ldr	x11, [x25]
 	mov	w8, w22
 	mov	w7, 8
-.L308:
+.L309:
 	mov	w0, 0
-.L307:
+.L308:
 	add	w1, w0, w8
 	add	w0, w0, 1
 	sbfiz	x1, x1, 2, 32
@@ -2353,52 +2387,52 @@ HynixGetReadRetryDefault:
 	ldr	w10, [x11,x1]
 	mvn	w10, w10
 	str	w10, [x11,x1]
-	bne	.L307
+	bne	.L308
 	ldr	w0, [x29,120]
 	subs	w7, w7, #1
 	add	w8, w8, w0
-	bne	.L308
+	bne	.L309
 	mov	x7, 0
 	mov	w15, 1
-.L309:
+.L310:
 	mov	w1, 0
 	ldr	x14, [x25]
 	mov	w10, w1
-.L313:
+.L314:
 	lsl	w8, w15, w10
 	mov	w12, w7
 	mov	w0, 16
 	mov	w11, 0
-.L311:
+.L312:
 	ldr	w13, [x14,w12,sxtw 2]
 	add	w12, w12, w22
 	and	w13, w8, w13
 	cmp	w13, w8
 	csinc	w11, w11, w11, ne
 	subs	w0, w0, #1
-	bne	.L311
+	bne	.L312
 	cmp	w11, 9
 	orr	w8, w1, w8
 	add	w10, w10, 1
 	csel	w1, w8, w1, cs
 	cmp	w10, 32
-	bne	.L313
+	bne	.L314
 	str	w1, [x14,x7,lsl 2]
 	add	x7, x7, 1
 	cmp	w22, w7
-	bgt	.L309
+	bgt	.L310
 	mov	x7, 0
 	ldr	x1, [x25]
 	mov	w8, w7
-.L316:
+.L317:
 	ldr	w10, [x1,x7]
 	add	x7, x7, 4
 	cmp	w10, wzr
 	csinc	w8, w8, w8, ne
 	cmp	x7, 32
-	bne	.L316
+	bne	.L317
 	cmp	w8, 7
-	ble	.L317
+	ble	.L318
 	adrp	x0, .LC3
 	mov	w2, 1
 	add	x0, x0, :lo12:.LC3
@@ -2408,39 +2442,39 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC2
 	bl	printk
+.L319:
+	b	.L319
 .L318:
-	b	.L318
-.L317:
 	cmp	w26, 6
 	mov	w7, 4
-	beq	.L319
+	beq	.L320
 	cmp	w26, 7
 	mov	w7, 10
 	mov	w1, 8
 	csel	w7, w1, w7, ne
-.L319:
-	mov	w8, 0
 .L320:
-	mov	x1, 0
+	mov	w8, 0
 .L321:
+	mov	x1, 0
+.L322:
 	add	w10, w0, w1
 	ldrb	w11, [x9,x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
 	strb	w11, [x6,w10,sxtw]
-	bhi	.L321
+	bhi	.L322
 	add	w8, w8, 1
 	add	x9, x9, x23
 	cmp	w8, w27
 	add	w0, w0, w7
-	blt	.L320
+	blt	.L321
 	mov	w0, 255
 	str	w0, [x19,2056]
 	mov	w0, w24
 	bl	NandcWaitFlashReady
 	ldr	w0, [x29,136]
 	cmp	w0, 1
-	bhi	.L323
+	bhi	.L324
 	mov	w0, 54
 	str	w0, [x19,2056]
 	adrp	x0, .LANCHOR0+4060
@@ -2452,16 +2486,16 @@ HynixGetReadRetryDefault:
 	str	w0, [x19,2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-	b	.L324
-.L323:
+	b	.L325
+.L324:
 	mov	w0, 56
 	str	w0, [x19,2056]
-.L324:
+.L325:
 	mov	w0, w24
 	add	w21, w21, 1
 	bl	NandcWaitFlashReady
 	uxtb	w21, w21
-	b	.L285
+	b	.L286
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.align	2
 	.global	FlashGetReadRetryDefault
@@ -2470,15 +2504,15 @@ FlashGetReadRetryDefault:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, w0
 	add	x29, sp, 0
-	cbz	w0, .L363
+	cbz	w0, .L364
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L365
+	bhi	.L366
 	bl	HynixGetReadRetryDefault
-	b	.L363
-.L365:
+	b	.L364
+.L366:
 	cmp	w0, 49
-	bne	.L366
+	bne	.L367
 	adrp	x0, .LANCHOR0
 	mov	w2, 64
 	add	x0, x0, :lo12:.LANCHOR0
@@ -2491,30 +2525,30 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 2936
-	b	.L381
-.L366:
+	b	.L382
+.L367:
 	sub	w0, w0, #65
 	cmp	w0, 1
-	bls	.L372
+	bls	.L373
 	cmp	w1, 33
-	bne	.L367
-.L372:
+	bne	.L368
+.L373:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	strb	w1, [x0,4056]
 	mov	w1, 4
-	b	.L382
-.L367:
+	b	.L383
+.L368:
 	cmp	w1, 67
-	beq	.L373
+	beq	.L374
 	cmp	w1, 34
-	bne	.L369
-.L373:
+	bne	.L370
+.L374:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	strb	w1, [x0,4056]
 	mov	w1, 5
-.L382:
+.L383:
 	strb	w1, [x0,4057]
 	mov	w1, 7
 	strb	w1, [x0,4058]
@@ -2523,13 +2557,13 @@ FlashGetReadRetryDefault:
 	add	x0, x0, 4060
 	add	x1, x1, 2784
 	mov	w2, 45
-	b	.L381
-.L369:
+	b	.L382
+.L370:
 	cmp	w1, 68
-	beq	.L374
+	beq	.L375
 	cmp	w1, 35
-	bne	.L363
-.L374:
+	bne	.L364
+.L375:
 	adrp	x0, .LANCHOR0
 	mov	w2, 95
 	add	x0, x0, :lo12:.LANCHOR0
@@ -2542,9 +2576,9 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 2832
-.L381:
+.L382:
 	bl	ftl_memcpy
-.L363:
+.L364:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
@@ -2574,7 +2608,7 @@ FlashReadDpCmd:
 	cmp	w0, 1
 	and	w5, w1, 255
 	lsr	w0, w1, 16
-	bne	.L384
+	bne	.L385
 	add	x19, x6, x19, lsl 8
 	ldrb	w2, [x3,8]
 	str	x1, [x29,72]
@@ -2597,8 +2631,8 @@ FlashReadDpCmd:
 	str	w20, [x19,2052]
 	str	w0, [x19,2056]
 	ldr	x1, [x29,72]
-	b	.L385
-.L384:
+	b	.L386
+.L385:
 	add	x19, x6, x19, lsl 8
 	ldrb	w2, [x3,8]
 	str	w2, [x19,2056]
@@ -2612,7 +2646,7 @@ FlashReadDpCmd:
 	str	w22, [x19,2052]
 	str	w20, [x19,2052]
 	str	w0, [x19,2056]
-.L385:
+.L386:
 	mov	w0, w21
 	bl	FlashSetRandomizer
 	ldr	x23, [sp,48]
@@ -2637,21 +2671,21 @@ ftl_flash_de_init:
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L387
+	bne	.L388
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L387:
+.L388:
 	add	x19, x19, :lo12:.LANCHOR2
 	ldrb	w0, [x19,572]
-	cbz	w0, .L388
+	cbz	w0, .L389
 	ldrb	w0, [x19,564]
-	tbz	x0, 0, .L388
+	tbz	x0, 0, .L389
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19,572]
-.L388:
+.L389:
 	adrp	x0, .LANCHOR0+40
 	ldr	x0, [x0,#:lo12:.LANCHOR0+40]
 	str	wzr, [x0,336]
@@ -2688,37 +2722,37 @@ NandcTimeCfg:
 	add	x1, x1, :lo12:.LANCHOR0
 	sdiv	w0, w0, w2
 	cmp	w0, 250
-	ble	.L397
+	ble	.L398
 	ldr	x0, [x1,3976]
 	mov	w1, 8354
-	b	.L404
-.L397:
+	b	.L405
+.L398:
 	cmp	w0, 220
-	ble	.L399
+	ble	.L400
 	ldr	x0, [x1,3976]
-	b	.L405
-.L399:
+	b	.L406
+.L400:
 	cmp	w0, 185
-	ble	.L400
+	ble	.L401
 	ldr	x0, [x1,3976]
 	mov	w1, 4226
-	b	.L404
-.L400:
+	b	.L405
+.L401:
 	cmp	w0, 160
 	ldr	x0, [x1,3976]
-	ble	.L401
+	ble	.L402
 	mov	w1, 4194
-	b	.L404
-.L401:
+	b	.L405
+.L402:
 	cmp	w19, 35
 	mov	w1, 4193
-	bls	.L404
+	bls	.L405
 	cmp	w19, 99
 	mov	w1, 4225
-	bls	.L404
-.L405:
+	bls	.L405
+.L406:
 	mov	w1, 8322
-.L404:
+.L405:
 	str	w1, [x0,4]
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -2734,15 +2768,15 @@ FlashTimingCfg:
 	and	w1, w1, -33
 	cmp	w1, 1
 	add	x29, sp, 0
-	bls	.L407
+	bls	.L408
 	mov	w1, 8322
 	cmp	w0, w1
-	bne	.L408
-.L407:
+	bne	.L409
+.L408:
 	adrp	x1, .LANCHOR0+3976
 	ldr	x1, [x1,#:lo12:.LANCHOR0+3976]
 	str	w0, [x1,4]
-.L408:
+.L409:
 	adrp	x0, .LANCHOR1+277
 	ldrb	w0, [x0,#:lo12:.LANCHOR1+277]
 	bl	NandcTimeCfg
@@ -2784,10 +2818,10 @@ NandcInit:
 	ldr	w4, [x0,352]
 	str	w4, [x3,568]
 	cmp	w4, 2049
-	bne	.L410
+	bne	.L411
 	mov	w1, 8
 	str	w1, [x3,580]
-.L410:
+.L411:
 	add	x20, x20, :lo12:.LANCHOR0
 	str	w2, [x0]
 	ldr	x0, [x20,3976]
@@ -2849,21 +2883,21 @@ NandcBchSel:
 	adrp	x1, .LANCHOR2+644
 	str	w0, [x1,#:lo12:.LANCHOR2+644]
 	mov	w1, 4096
-	bne	.L413
-.L416:
+	bne	.L414
+.L417:
 	and	w1, w1, -17
-	b	.L414
-.L413:
+	b	.L415
+.L414:
 	cmp	w0, 24
-	bne	.L415
+	bne	.L416
 	orr	w1, w1, 16
-	b	.L414
-.L415:
+	b	.L415
+.L416:
 	cmp	w0, 40
 	orr	w1, w1, 262144
 	orr	w1, w1, 16
-	beq	.L416
-.L414:
+	beq	.L417
+.L415:
 	orr	w1, w1, 1
 	str	w1, [x2,12]
 	ret
@@ -2914,23 +2948,23 @@ ftl_flash_resume:
 	str	w3, [x2,336]
 	ldr	w1, [x1,4012]
 	str	w1, [x2,344]
-.L423:
+.L424:
 	lsl	x0, x19, 3
 	ldrb	w1, [x0,x20]
 	sub	w1, w1, #1
 	uxtb	w1, w1
 	cmp	w1, 253
-	bhi	.L422
+	bhi	.L423
 	mov	w0, w19
 	bl	FlashReset
-.L422:
+.L423:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L423
+	bne	.L424
 	adrp	x19, .LANCHOR2
 	add	x19, x19, :lo12:.LANCHOR2
 	ldrb	w0, [x19,572]
-	cbz	w0, .L424
+	cbz	w0, .L425
 	mov	w0, 1
 	bl	NandcSetMode
 	ldrb	w0, [x19,564]
@@ -2939,7 +2973,7 @@ ftl_flash_resume:
 	bl	NandcSetMode
 	lsr	w0, w21, 8
 	bl	NandcSetDdrPara
-.L424:
+.L425:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,1912]
 	ldrb	w0, [x0,20]
@@ -2972,18 +3006,18 @@ NandcIqrWaitFlashReady:
 	orr	w0, w0, 2
 	str	w0, [x19,364]
 	ldr	w0, [x19]
-	tbnz	x0, 9, .L431
+	tbnz	x0, 9, .L432
 	mov	x0, x19
 	bl	wait_for_nand_flash_ready
-	b	.L430
-.L431:
+	b	.L431
+.L432:
 	ldr	w0, [x19,368]
 	orr	w0, w0, 2
 	str	w0, [x19,368]
 	ldr	w0, [x19,364]
 	and	w0, w0, -3
 	str	w0, [x19,364]
-.L430:
+.L431:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3007,17 +3041,17 @@ FlashEraseBlocks:
 	mov	x24, x0
 	ldrb	w2, [x20,24]
 	mov	w19, 0
-	cbz	w2, .L434
+	cbz	w2, .L435
 	mov	w1, w23
 	bl	FlashEraseSLc2KBlocks
-	b	.L435
-.L434:
+	b	.L436
+.L435:
 	mov	w27, 56
 	adrp	x28, .LANCHOR2
 	add	x25, x20, 1720
-.L465:
+.L466:
 	cmp	w19, w23
-	bcs	.L466
+	bcs	.L467
 	umull	x5, w19, w27
 	mov	w1, 0
 	sub	w4, w23, w19
@@ -3032,11 +3066,11 @@ FlashEraseBlocks:
 	ldr	w0, [x29,124]
 	ldr	x5, [x29,96]
 	cmp	w0, w1
-	bcc	.L436
+	bcc	.L437
 	mov	w0, -1
 	str	w0, [x24,x5]
-	b	.L437
-.L436:
+	b	.L438
+.L437:
 	add	x1, x28, :lo12:.LANCHOR2
 	mov	x2, 24
 	ldrb	w1, [x1,648]
@@ -3045,9 +3079,9 @@ FlashEraseBlocks:
 	csel	w22, w22, wzr, ne
 	madd	x1, x1, x2, x25
 	ldr	x1, [x1,8]
-	cbz	x1, .L439
+	cbz	x1, .L440
 	bl	FlashWaitCmdDone
-.L439:
+.L440:
 	ldr	w1, [x29,124]
 	mov	x0, 24
 	ldr	w2, [x29,120]
@@ -3055,12 +3089,12 @@ FlashEraseBlocks:
 	str	x21, [x0,8]
 	str	xzr, [x0,16]
 	str	w2, [x0,4]
-	cbz	w22, .L440
+	cbz	w22, .L441
 	add	w2, w19, 1
 	umull	x2, w2, w27
 	add	x2, x24, x2
 	str	x2, [x0,16]
-.L440:
+.L441:
 	add	x0, x20, x1
 	ldrb	w21, [x0,1680]
 	mov	x0, 24
@@ -3069,16 +3103,16 @@ FlashEraseBlocks:
 	strb	w21, [x25,x1]
 	bl	NandcFlashCs
 	cmp	w26, 1
-	bne	.L441
+	bne	.L442
 	ldrb	w0, [x20,136]
-	cbz	w0, .L441
+	cbz	w0, .L442
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-	b	.L442
-.L441:
+	b	.L443
+.L442:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-.L442:
+.L443:
 	ldr	w1, [x29,124]
 	add	x0, x20, 1688
 	add	w19, w19, w22
@@ -3094,54 +3128,54 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-.L437:
+.L438:
 	add	w19, w19, 1
-	b	.L465
-.L466:
+	b	.L466
+.L467:
 	ldr	x0, [x29,104]
 	mov	x20, 0
 	mov	x21, 24
 	add	x19, x0, :lo12:.LANCHOR0
 	ldr	x0, [x19,3976]
 	bl	NandcIqrWaitFlashReady
-.L444:
+.L445:
 	ldrb	w0, [x19,1676]
 	cmp	w0, w20
-	bls	.L467
+	bls	.L468
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w26, 1
-	bne	.L445
+	bne	.L446
 	ldrb	w0, [x19,136]
-	cbz	w0, .L445
+	cbz	w0, .L446
 	madd	x0, x20, x21, x19
 	ldrb	w0, [x0,1720]
 	bl	flash_exit_slc_mode
-.L445:
+.L446:
 	add	x20, x20, 1
-	b	.L444
-.L467:
+	b	.L445
+.L468:
 	adrp	x0, .LANCHOR2+652
 	ldr	w0, [x0,#:lo12:.LANCHOR2+652]
-	cbnz	w0, .L447
-.L449:
+	cbnz	w0, .L448
+.L450:
 	mov	w0, 0
-	b	.L435
-.L447:
+	b	.L436
+.L448:
 	adrp	x0, IDByte
 	ldrb	w0, [x0,#:lo12:IDByte]
 	cmp	w0, 69
-	bne	.L449
+	bne	.L450
 	mov	x0, 0
 	mov	x1, 56
-.L448:
+.L449:
 	cmp	w23, w0
-	bls	.L449
+	bls	.L450
 	mul	x2, x0, x1
 	add	x0, x0, 1
 	str	wzr, [x24,x2]
-	b	.L448
-.L435:
+	b	.L449
+.L436:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -3179,11 +3213,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L470:
+.L471:
 	ldr	w1, [x0,8]
 	str	w1, [sp,8]
 	ldr	w1, [sp,8]
-	tbz	x1, 20, .L470
+	tbz	x1, 20, .L471
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -3224,7 +3258,7 @@ NandcXferStart:
 	ldr	w0, [x0,580]
 	bfi	w20, w3, 4, 1
 	cmp	w0, 3
-	bls	.L474
+	bls	.L475
 	ldr	w0, [x21,16]
 	cmp	x5, xzr
 	str	w0, [x29,88]
@@ -3232,11 +3266,11 @@ NandcXferStart:
 	ldr	w0, [x29,88]
 	and	w0, w0, -5
 	str	w0, [x29,88]
-	cbnz	w7, .L488
-	cbz	x22, .L475
-.L488:
-	cbnz	w25, .L477
-.L485:
+	cbnz	w7, .L489
+	cbz	x22, .L476
+.L489:
+	cbnz	w25, .L478
+.L486:
 	mov	x0, x21
 	add	w23, w23, 1
 	asr	w23, w23, 1
@@ -3249,11 +3283,11 @@ NandcXferStart:
 	orr	w0, w0, 1
 	str	w0, [x21,364]
 	mov	x0, x22
-	cbnz	x22, .L479
+	cbnz	x22, .L480
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	x0, [x0,592]
-	b	.L479
-.L477:
+	b	.L480
+.L478:
 	add	x1, x19, :lo12:.LANCHOR2
 	mov	w4, 128
 	mov	w2, 0
@@ -3264,26 +3298,26 @@ NandcXferStart:
 	cmp	w0, 25
 	mov	w0, 64
 	csel	w4, w0, w4, cc
-.L481:
+.L482:
 	cmp	w3, w8
-	bcs	.L485
+	bcs	.L486
 	lsr	w0, w2, 2
 	ubfiz	x0, x0, 2, 30
-	cbz	w7, .L482
+	cbz	w7, .L483
 	ldrh	w6, [x5,2]
 	ldr	x10, [x1,600]
 	ldrh	w11, [x5],4
 	orr	w6, w11, w6, lsl 16
 	str	w6, [x10,x0]
-	b	.L483
-.L482:
+	b	.L484
+.L483:
 	ldr	x6, [x1,600]
 	str	w9, [x6,x0]
-.L483:
+.L484:
 	add	w3, w3, 1
 	add	w2, w2, w4
-	b	.L481
-.L479:
+	b	.L482
+.L480:
 	add	x19, x19, :lo12:.LANCHOR2
 	ubfx	x23, x20, 22, 5
 	mov	w2, w25
@@ -3313,12 +3347,12 @@ NandcXferStart:
 	ldr	w0, [x29,88]
 	orr	w0, w0, 448
 	str	w0, [x29,88]
-	cbnz	x22, .L486
+	cbnz	x22, .L487
 	ldr	w0, [x29,88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29,88]
-.L486:
+.L487:
 	ldr	w0, [x29,88]
 	cmp	w25, wzr
 	cset	w1, eq
@@ -3330,10 +3364,10 @@ NandcXferStart:
 	ldr	w0, [x29,88]
 	orr	w0, w0, 1
 	str	w0, [x29,88]
-.L475:
+.L476:
 	ldr	w0, [x29,88]
 	str	w0, [x21,16]
-.L474:
+.L475:
 	str	w24, [x21,12]
 	str	w20, [x21,8]
 	orr	w20, w20, 4
@@ -3363,36 +3397,36 @@ NandcXferComp:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w0, [x0,580]
 	cmp	w0, 3
-	bls	.L523
+	bls	.L524
 	ldr	w0, [x19,16]
-	tbz	x0, 2, .L523
+	tbz	x0, 2, .L524
 	mov	x0, x19
 	bl	wait_for_nandc_xfer_completed
 	ldr	w21, [x19,16]
 	ldr	w0, [x19,8]
 	ubfx	x21, x21, 1, 1
 	str	w0, [x29,64]
-	cbz	w21, .L494
+	cbz	w21, .L495
 	adrp	x22, .LC4
 	adrp	x23, .LC5
 	mov	w21, 0
 	add	x22, x22, :lo12:.LC4
 	add	x23, x23, :lo12:.LC5
-.L495:
+.L496:
 	ldr	w2, [x19,28]
 	ldr	w1, [x29,64]
 	ubfx	x2, x2, 16, 5
 	ubfx	x1, x1, 22, 6
 	cmp	w2, w1
-	bge	.L503
+	bge	.L504
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w0, [x0,580]
 	cmp	w0, 5
-	bhi	.L496
-.L499:
+	bhi	.L497
+.L500:
 	add	w21, w21, 1
 	and	w0, w21, 16777215
-	cbnz	w0, .L495
+	cbnz	w0, .L496
 	ldr	w2, [x19,28]
 	mov	w1, w21
 	ldr	w3, [x29,64]
@@ -3405,19 +3439,19 @@ NandcXferComp:
 	mov	w2, 4
 	mov	w3, 512
 	bl	rknand_print_hex
-	b	.L495
-.L496:
+	b	.L496
+.L497:
 	ldr	w0, [x19]
 	str	w0, [x29,72]
 	ldr	w0, [x29,72]
-	tbz	x0, 13, .L499
+	tbz	x0, 13, .L500
 	ldr	w0, [x29,72]
-	tbz	x0, 17, .L499
-.L503:
+	tbz	x0, 17, .L500
+.L504:
 	add	x19, x20, :lo12:.LANCHOR2
 	add	x19, x19, 592
 	ldr	w0, [x19,40]
-	cbz	w0, .L504
+	cbz	w0, .L505
 	ldr	w1, [x29,64]
 	mov	w2, 0
 	ldr	w0, [x19,32]
@@ -3430,20 +3464,20 @@ NandcXferComp:
 	ubfx	x1, x1, 22, 5
 	lsl	w1, w1, 7
 	bl	rknand_dma_unmap_single
-	b	.L504
-.L494:
+	b	.L505
+.L495:
 	adrp	x22, .LC6
 	adrp	x23, .LC5
 	add	x22, x22, :lo12:.LC6
 	add	x23, x23, :lo12:.LC5
-.L505:
+.L506:
 	ldr	w0, [x29,64]
-	tbnz	x0, 20, .L531
+	tbnz	x0, 20, .L532
 	ldr	w0, [x19,8]
 	add	w21, w21, 1
 	str	w0, [x29,64]
 	and	w0, w21, 16777215
-	cbnz	w0, .L505
+	cbnz	w0, .L506
 	ldr	w2, [x29,64]
 	mov	w1, w21
 	ldr	w3, [x19,28]
@@ -3455,18 +3489,18 @@ NandcXferComp:
 	mov	w2, 4
 	mov	w3, 512
 	bl	rknand_print_hex
-	b	.L505
-.L531:
+	b	.L506
+.L532:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w0, [x0,640]
-	cbz	w0, .L508
+	cbz	w0, .L509
 	mov	x0, x19
 	bl	NandcSendDumpDataStart
-.L508:
+.L509:
 	add	x21, x20, :lo12:.LANCHOR2
 	add	x21, x21, 592
 	ldr	w0, [x21,40]
-	cbz	w0, .L509
+	cbz	w0, .L510
 	ldr	w1, [x29,64]
 	mov	w2, 1
 	ldr	w0, [x21,32]
@@ -3479,22 +3513,22 @@ NandcXferComp:
 	ubfx	x1, x1, 22, 5
 	lsl	w1, w1, 7
 	bl	rknand_dma_unmap_single
-.L509:
+.L510:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w0, [x0,640]
-	cbz	w0, .L504
+	cbz	w0, .L505
 	mov	x0, x19
 	bl	NandcSendDumpDataDone
-.L504:
+.L505:
 	add	x20, x20, :lo12:.LANCHOR2
 	str	wzr, [x20,632]
-	b	.L492
-.L523:
+	b	.L493
+.L524:
 	ldr	w0, [x19,8]
 	str	w0, [x29,64]
 	ldr	w0, [x29,64]
-	tbz	x0, 20, .L523
-.L492:
+	tbz	x0, 20, .L524
+.L493:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -3517,14 +3551,14 @@ NandcCopy1KB:
 	add	x4, x0, 4096
 	add	x21, x0, 512
 	add	x2, x4, x2
-	bne	.L533
-	cbz	x3, .L534
+	bne	.L534
+	cbz	x3, .L535
 	mov	x0, x2
 	mov	x1, x3
 	mov	w2, 1024
 	bl	ftl_memcpy
-.L534:
-	cbz	x20, .L532
+.L535:
+	cbz	x20, .L533
 	mov	w0, 48
 	lsr	w19, w19, 1
 	ldrb	w1, [x20,1]
@@ -3538,15 +3572,15 @@ NandcCopy1KB:
 	ldrb	w1, [x20,3]
 	orr	w0, w0, w1, lsl 24
 	str	w0, [x21,w19,sxtw 2]
-	b	.L532
-.L533:
-	cbz	x3, .L537
+	b	.L533
+.L534:
+	cbz	x3, .L538
 	mov	x1, x2
 	mov	x0, x3
 	mov	w2, 1024
 	bl	ftl_memcpy
-.L537:
-	cbz	x20, .L532
+.L538:
+	cbz	x20, .L533
 	mov	w0, 48
 	lsr	w19, w19, 1
 	mul	w19, w19, w0
@@ -3559,7 +3593,7 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20,2]
 	strb	w0, [x20,3]
-.L532:
+.L533:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -3586,14 +3620,14 @@ NandcXferData:
 	uxtb	w23, w2
 	mov	x25, x3
 	mov	x21, x4
-	cbnz	x0, .L549
-	cbnz	x4, .L550
+	cbnz	x0, .L550
+	cbnz	x4, .L551
 	add	x0, x29, 112
 	mov	w1, 255
 	mov	w2, 64
 	add	x21, x29, 112
 	bl	ftl_memset
-.L550:
+.L551:
 	mov	w0, w24
 	mov	w1, w20
 	mov	w2, w23
@@ -3604,7 +3638,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w24
 	bl	NandcXferComp
-	cbnz	w20, .L551
+	cbnz	w20, .L552
 	adrp	x0, .LANCHOR2
 	ubfx	x3, x23, 1, 7
 	add	x2, x0, :lo12:.LANCHOR2
@@ -3615,10 +3649,10 @@ NandcXferData:
 	mov	w1, 64
 	csel	w4, w1, w4, cc
 	mov	w1, w20
-.L553:
+.L554:
 	cmp	x21, x3
 	add	w5, w1, w4
-	beq	.L595
+	beq	.L596
 	ldr	x6, [x2,600]
 	and	x1, x1, 4294967292
 	add	x21, x21, 4
@@ -3631,29 +3665,29 @@ NandcXferData:
 	lsr	w1, w1, 24
 	strb	w1, [x21,-1]
 	mov	w1, w5
-	b	.L553
-.L595:
+	b	.L554
+.L596:
 	add	x0, x0, :lo12:.LANCHOR2
 	lsr	w23, w23, 2
 	ldr	w4, [x0,644]
 	ldr	w5, [x0,580]
 	mov	w0, 0
 	mov	w22, w0
-.L555:
+.L556:
 	cmp	w0, w23
-	bcs	.L551
-	cbz	w4, .L551
+	bcs	.L552
+	cbz	w4, .L552
 	uxtw	x1, w0
 	add	x1, x1, 8
 	ldr	w1, [x19,x1,lsl 2]
 	str	w1, [x29,104]
 	ldr	w1, [x29,104]
-	tbnz	x1, 2, .L579
+	tbnz	x1, 2, .L580
 	ldr	w3, [x29,104]
 	ubfx	x3, x3, 15, 1
-	cbnz	w3, .L579
+	cbnz	w3, .L580
 	cmp	w5, 5
-	bls	.L557
+	bls	.L558
 	ldr	w2, [x29,104]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29,104]
@@ -3666,20 +3700,20 @@ NandcXferData:
 	orr	w1, w3, w1, lsl 5
 	ldr	w3, [x29,104]
 	cmp	w2, w1
-	bls	.L558
+	bls	.L559
 	ldr	w1, [x29,104]
 	ubfx	x3, x3, 3, 5
 	ubfx	x1, x1, 27, 1
 	orr	w3, w3, w1, lsl 5
-	b	.L559
-.L558:
+	b	.L560
+.L559:
 	ubfx	x1, x3, 16, 5
 	ldr	w3, [x29,104]
 	ubfx	x3, x3, 29, 1
-	b	.L594
-.L557:
+	b	.L595
+.L558:
 	cmp	w5, 3
-	bls	.L559
+	bls	.L560
 	ldr	w2, [x29,104]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29,104]
@@ -3692,43 +3726,43 @@ NandcXferData:
 	orr	w1, w3, w1, lsl 5
 	ldr	w3, [x29,104]
 	cmp	w2, w1
-	bls	.L560
+	bls	.L561
 	ubfx	x1, x3, 3, 5
 	ldr	w3, [x29,104]
 	ubfx	x3, x3, 28, 1
-	b	.L594
-.L560:
+	b	.L595
+.L561:
 	ubfx	x1, x3, 16, 5
 	ldr	w3, [x29,104]
 	ubfx	x3, x3, 30, 1
-.L594:
+.L595:
 	orr	w3, w1, w3, lsl 5
-.L559:
+.L560:
 	cmp	w22, w3
 	csel	w22, w22, w3, cs
-	b	.L556
-.L579:
+	b	.L557
+.L580:
 	mov	w22, -1
-.L556:
+.L557:
 	add	w0, w0, 1
-	b	.L555
-.L551:
+	b	.L556
+.L552:
 	str	wzr, [x19,16]
-	b	.L562
-.L549:
+	b	.L563
+.L550:
 	cmp	w20, 1
-	bne	.L593
+	bne	.L594
 	mov	w22, 0
 	mov	w27, 2
-.L563:
+.L564:
 	cmp	w22, w23
-	bcs	.L596
+	bcs	.L597
 	and	w26, w22, 3
 	mov	x3, x25
-	cbz	x25, .L565
+	cbz	x25, .L566
 	ubfiz	x0, x22, 9, 23
 	add	x3, x25, x0
-.L565:
+.L566:
 	cmp	x21, xzr
 	mov	x0, x19
 	csel	w4, w27, wzr, ne
@@ -3747,11 +3781,11 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w24
 	bl	NandcXferComp
-	b	.L563
-.L596:
+	b	.L564
+.L597:
 	mov	w22, 0
-	b	.L562
-.L593:
+	b	.L563
+.L594:
 	mov	w1, 0
 	mov	x4, 0
 	mov	w26, 0
@@ -3762,16 +3796,16 @@ NandcXferData:
 	mov	w22, w26
 	mov	w27, 2
 	bl	NandcXferStart
-.L568:
+.L569:
 	cmp	w26, w23
-	bcs	.L562
+	bcs	.L563
 	mov	w0, w24
 	add	w28, w26, 2
 	bl	NandcXferComp
 	ldr	w0, [x19,32]
 	cmp	w28, w23
 	str	w0, [x29,104]
-	bcs	.L569
+	bcs	.L570
 	mov	x4, 0
 	mov	w0, w24
 	mov	w1, 0
@@ -3779,9 +3813,9 @@ NandcXferData:
 	and	w3, w28, 3
 	mov	x5, x4
 	bl	NandcXferStart
-.L569:
+.L570:
 	ldr	w0, [x29,104]
-	tbnz	x0, 2, .L584
+	tbnz	x0, 2, .L585
 	ldr	w0, [x29,104]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29,104]
@@ -3789,16 +3823,16 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-	b	.L570
-.L584:
+	b	.L571
+.L585:
 	mov	w22, -1
-.L570:
+.L571:
 	and	w2, w26, 3
 	mov	x3, x25
-	cbz	x25, .L571
+	cbz	x25, .L572
 	ubfiz	x3, x26, 9, 23
 	add	x3, x25, x3
-.L571:
+.L572:
 	cmp	x21, xzr
 	mov	x0, x19
 	csel	w4, w27, wzr, ne
@@ -3807,23 +3841,23 @@ NandcXferData:
 	mov	w26, w28
 	add	x4, x21, x4
 	bl	NandcCopy1KB
-	b	.L568
-.L562:
-	cbnz	w20, .L574
+	b	.L569
+.L563:
+	cbnz	w20, .L575
 	adrp	x0, .LANCHOR2+580
 	ldr	w0, [x0,#:lo12:.LANCHOR2+580]
 	cmp	w0, 5
-	bls	.L574
+	bls	.L575
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L574
+	bne	.L575
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L574:
+.L575:
 	mov	w0, w22
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -3846,7 +3880,7 @@ FlashReadRawPage:
 	str	x21, [sp,32]
 	mov	x21, x2
 	ldrb	w20, [x0,#:lo12:.LANCHOR1+265]
-	cbnz	w19, .L598
+	cbnz	w19, .L599
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w5, [x0,25]
@@ -3855,7 +3889,7 @@ FlashReadRawPage:
 	cmp	w1, w0
 	mov	w0, 4
 	csel	w20, w20, w0, cs
-.L598:
+.L599:
 	mov	w0, w19
 	str	x4, [x29,48]
 	str	x1, [x29,56]
@@ -3911,7 +3945,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L601
+	cbz	w4, .L602
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -3929,41 +3963,41 @@ FlashDdrTunningRead:
 	ldrb	w0, [x27,564]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L602
-.L611:
+	bne	.L603
+.L612:
 	mov	w21, -1
-	b	.L603
-.L602:
+	b	.L604
+.L603:
 	adrp	x0, .LC7
 	mov	w1, w25
 	add	x0, x0, :lo12:.LC7
 	mov	w2, w21
 	bl	printk
 	cmp	w21, 9
-	bhi	.L604
+	bhi	.L605
 	add	x20, x20, x24, sxtw 4
 	ldr	x0, [x20,40]
 	ldr	w1, [x0,3840]
 	ldr	w1, [x0]
 	orr	w1, w1, 131072
 	str	w1, [x0]
-.L604:
+.L605:
 	add	x19, x19, :lo12:.LANCHOR2
 	ldr	w0, [x19,656]
 	add	w0, w0, 1
 	str	w0, [x19,656]
 	cmp	w0, 2047
-	bls	.L603
+	bls	.L604
 	mov	x23, 0
 	str	wzr, [x19,656]
 	mov	x28, x23
-.L601:
+.L602:
 	mov	w19, 0
 	mov	w27, -1
 	mov	w5, w19
 	mov	w6, w19
 	mov	w20, w19
-.L609:
+.L610:
 	mov	w0, w22
 	str	x5, [x29,104]
 	str	x6, [x29,112]
@@ -3977,63 +4011,63 @@ FlashDdrTunningRead:
 	ldr	x6, [x29,112]
 	cmp	w0, w1
 	ldr	x5, [x29,104]
-	bhi	.L605
+	bhi	.L606
 	cmp	w0, 2
-	bhi	.L615
+	bhi	.L616
 	add	w20, w20, 1
 	cmp	w20, 9
-	bls	.L615
+	bls	.L616
 	sub	w19, w22, w20
 	mov	w21, w0
 	mov	w27, 0
-	b	.L607
-.L605:
+	b	.L608
+.L606:
 	cmp	w6, w20
-	bcs	.L616
+	bcs	.L617
 	cmp	w20, 7
 	sub	w5, w19, w20
-	bhi	.L617
+	bhi	.L618
 	mov	w6, w20
-	b	.L616
-.L615:
+	b	.L617
+.L616:
 	mov	x23, 0
 	mov	w19, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, x23
-	b	.L606
-.L616:
+	b	.L607
+.L617:
 	mov	w20, 0
-.L606:
+.L607:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L609
-.L607:
+	bls	.L610
+.L608:
 	cmp	w6, w20
 	csel	w19, w19, w5, cc
-	b	.L608
-.L617:
+	b	.L609
+.L618:
 	mov	w19, w5
-.L608:
-	cbz	w19, .L610
+.L609:
+	cbz	w19, .L611
 	adrp	x0, .LC8
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC8
 	bl	printk
 	mov	w0, w19
 	bl	NandcSetDdrPara
-.L610:
-	cbz	w27, .L603
+.L611:
+	cbz	w27, .L604
 	adrp	x0, .LC9
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC9
 	mov	w2, w25
 	bl	printk
-	cbz	w26, .L611
+	cbz	w26, .L612
 	ldr	w0, [x29,124]
 	lsr	w0, w0, 8
 	bl	NandcSetDdrPara
-.L603:
+.L604:
 	mov	w0, w21
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4063,17 +4097,17 @@ FlashReadPage:
 	cmn	w0, #1
 	mov	w19, w0
 	adrp	x23, .LANCHOR2
-	bne	.L627
+	bne	.L628
 	adrp	x21, .LANCHOR0
 	add	x26, x21, :lo12:.LANCHOR0
 	ldrb	w27, [x26,32]
-	cbnz	w27, .L628
-.L630:
+	cbnz	w27, .L629
+.L631:
 	add	x0, x23, :lo12:.LANCHOR2
 	ldrb	w0, [x0,572]
-	cbz	w0, .L627
-	b	.L648
-.L628:
+	cbz	w0, .L628
+	b	.L649
+.L629:
 	mov	w0, w20
 	mov	w1, w22
 	mov	x2, x25
@@ -4082,10 +4116,10 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w27, [x26,32]
 	cmn	w0, #1
-	beq	.L630
+	beq	.L631
 	mov	w19, w0
-	b	.L627
-.L648:
+	b	.L628
+.L649:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w1, w22
 	mov	x2, x25
@@ -4097,19 +4131,19 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	cmn	w0, #1
 	mov	w19, w0
-	beq	.L631
+	beq	.L632
 	ldrb	w0, [x21,4044]
 	cmp	w19, w0, lsr 1
-	bls	.L627
-.L631:
+	bls	.L628
+.L632:
 	lsr	w0, w26, 8
 	bl	NandcSetDdrPara
-.L627:
+.L628:
 	add	x21, x23, :lo12:.LANCHOR2
 	cmn	w19, #1
 	ldr	x4, [x21,664]
-	bne	.L632
-	cbz	x4, .L632
+	bne	.L633
+	cbz	x4, .L633
 	mov	w1, w22
 	mov	x2, x25
 	mov	x3, x24
@@ -4123,10 +4157,10 @@ FlashReadPage:
 	mov	w3, w22
 	bl	printk
 	cmn	w19, #1
-	bne	.L632
+	bne	.L633
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L632
+	cbz	w0, .L633
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x21,664]
@@ -4138,7 +4172,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L632:
+.L633:
 	mov	w0, w19
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -4177,24 +4211,24 @@ FlashDdrParaScan:
 	mov	x3, x2
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L653
+	beq	.L654
 	cmn	w22, #1
-	bne	.L650
-.L653:
+	bne	.L651
+.L654:
 	add	x20, x19, :lo12:.LANCHOR2
 	ldrb	w0, [x20,564]
-	tbz	x0, 0, .L650
+	tbz	x0, 0, .L651
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20,572]
-	b	.L652
-.L650:
+	b	.L653
+.L651:
 	add	x19, x19, :lo12:.LANCHOR2
 	mov	w0, 1
 	strb	w0, [x19,572]
-.L652:
+.L653:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4235,10 +4269,10 @@ FlashLoadPhyInfo:
 	mov	w24, -1
 	ldrh	w28, [x21,10]
 	bl	flash_enter_slc_mode
-.L661:
+.L662:
 	add	w26, w20, 1
 	mov	x22, 0
-.L663:
+.L664:
 	add	x0, x29, 104
 	ldrb	w0, [x22,x0]
 	bl	FlashBchSel
@@ -4248,32 +4282,32 @@ FlashLoadPhyInfo:
 	mov	x3, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L662
+	bne	.L663
 	ldr	x2, [x19,#:lo12:.LANCHOR0]
 	mov	w0, 0
 	mov	w1, w26
 	mov	x3, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L662
+	bne	.L663
 	add	x22, x22, 1
 	cmp	x22, 4
-	beq	.L664
-	b	.L663
-.L665:
+	beq	.L665
+	b	.L664
+.L666:
 	mov	w1, 2036
 	add	x0, x26, 12
 	mov	w24, -1
 	bl	JSHash
 	ldr	w1, [x26,8]
 	cmp	w1, w0
-	beq	.L675
-.L664:
+	beq	.L676
+.L665:
 	subs	w27, w27, #1
 	add	w20, w20, w28
-	bne	.L661
+	bne	.L662
 	mov	w0, w27
-.L674:
+.L675:
 	bl	flash_exit_slc_mode
 	mov	w0, w24
 	ldp	x19, x20, [sp,16]
@@ -4283,15 +4317,15 @@ FlashLoadPhyInfo:
 	ldp	x27, x28, [sp,80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L662:
+.L663:
 	add	x22, x25, :lo12:.LANCHOR2
 	mov	w0, 20036
 	movk	w0, 0x4e41, lsl 16
 	ldr	x26, [x22,672]
 	ldr	w1, [x26]
 	cmp	w1, w0
-	bne	.L664
-	cbnz	w24, .L665
+	bne	.L665
+	cbnz	w24, .L666
 	add	x23, x23, :lo12:.LANCHOR1
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x23,266]
@@ -4299,8 +4333,8 @@ FlashLoadPhyInfo:
 	mov	w0, w24
 	add	w20, w20, 1
 	str	w20, [x19,8]
-	b	.L674
-.L675:
+	b	.L675
+.L676:
 	add	x1, x26, 160
 	mov	w2, 32
 	mov	x0, x21
@@ -4323,18 +4357,18 @@ FlashLoadPhyInfo:
 	ldrh	w0, [x21,10]
 	udiv	w0, w20, w0
 	add	w2, w0, 1
-	cbz	w0, .L667
+	cbz	w0, .L668
 	str	w2, [x24,8]
-	b	.L668
-.L667:
+	b	.L669
+.L668:
 	mov	w0, 2
 	str	w0, [x24,8]
-.L668:
+.L669:
 	add	x0, x25, :lo12:.LANCHOR2
 	ldrh	w1, [x1,14]
 	mov	w24, 0
 	strb	w1, [x0,684]
-	b	.L664
+	b	.L665
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.align	2
 	.global	ToshibaReadRetrial
@@ -4371,21 +4405,21 @@ ToshibaReadRetrial:
 	sub	w0, w0, #67
 	uxtb	w0, w0
 	cmp	w0, 1
-	bls	.L677
+	bls	.L678
 	adrp	x0, .LANCHOR2+572
 	ldrb	w0, [x0,#:lo12:.LANCHOR2+572]
-	cbz	w0, .L678
+	cbz	w0, .L679
 	mov	w0, w22
 	mov	w22, 1
 	bl	NandcSetDdrMode
-.L678:
+.L679:
 	ubfiz	x0, x28, 8, 8
 	mov	w2, 92
 	add	x0, x24, x0
 	str	w2, [x0,2056]
 	mov	w2, 197
 	str	w2, [x0,2056]
-.L677:
+.L678:
 	adrp	x0, g_maxRetryCount
 	mov	w21, 1
 	add	x0, x0, :lo12:g_maxRetryCount
@@ -4397,44 +4431,44 @@ ToshibaReadRetrial:
 	str	x0, [x29,104]
 	ubfiz	x0, x28, 8, 8
 	str	x0, [x29,96]
-.L679:
+.L680:
 	adrp	x0, g_maxRetryCount
 	ldrb	w0, [x0,#:lo12:g_maxRetryCount]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcs	.L704
+	bcs	.L705
 	ldrb	w0, [x20,#:lo12:g_retryMode]
 	mov	w1, w21
 	sub	w0, w0, #67
 	uxtb	w0, w0
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L680
+	bhi	.L681
 	bl	SandiskSetRRPara
-	b	.L681
-.L680:
-	bl	ToshibaSetRRPara
+	b	.L682
 .L681:
+	bl	ToshibaSetRRPara
+.L682:
 	ldrb	w0, [x20,#:lo12:g_retryMode]
 	cmp	w0, 34
-	bne	.L682
+	bne	.L683
 	ldr	x0, [x29,112]
 	ldrb	w0, [x0]
 	sub	w0, w0, #3
 	cmp	w21, w0
-	bne	.L682
+	bne	.L683
 	ldr	x0, [x29,104]
 	mov	w1, 179
 	add	x0, x24, x0
 	str	w1, [x0,8]
-.L682:
+.L683:
 	ldr	x0, [x29,96]
 	mov	w1, 38
 	add	x0, x24, x0
 	str	w1, [x0,2056]
 	mov	w1, 93
 	str	w1, [x0,2056]
-	cbz	w22, .L683
+	cbz	w22, .L684
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29,132]
@@ -4445,17 +4479,17 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-	b	.L684
-.L683:
+	b	.L685
+.L684:
 	ldr	w1, [x29,132]
 	mov	w0, w23
 	mov	x2, x27
 	mov	x3, x26
 	bl	FlashReadRawPage
 	mov	w28, w0
-.L684:
+.L685:
 	cmn	w28, #1
-	beq	.L685
+	beq	.L686
 	ldr	x0, [x29,120]
 	cmn	w25, #1
 	csel	w25, w25, w28, ne
@@ -4463,27 +4497,27 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L687
+	bcc	.L688
 	mov	x26, 0
 	mov	x27, x26
-.L685:
+.L686:
 	add	w21, w21, 1
-	b	.L679
-.L704:
+	b	.L680
+.L705:
 	mov	w28, w25
-.L687:
+.L688:
 	ldrb	w0, [x20,#:lo12:g_retryMode]
 	mov	w1, 0
 	sub	w0, w0, #67
 	uxtb	w0, w0
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L689
+	bhi	.L690
 	bl	SandiskSetRRPara
-	b	.L690
-.L689:
-	bl	ToshibaSetRRPara
+	b	.L691
 .L690:
+	bl	ToshibaSetRRPara
+.L691:
 	ldr	x0, [x29,136]
 	add	x0, x0, 8
 	add	x24, x24, x0, lsl 8
@@ -4494,17 +4528,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L691
+	bcc	.L692
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L691:
+.L692:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
-	cbz	w22, .L692
+	cbz	w22, .L693
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L692:
+.L693:
 	mov	w0, w28
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4544,11 +4578,11 @@ SamsungReadRetrial:
 	ldrb	w21, [x2,8]
 	add	x21, x21, 8
 	add	x21, x0, x21, lsl 8
-.L706:
+.L707:
 	ldrb	w0, [x27]
 	add	w0, w0, 1
 	cmp	w26, w0
-	bcs	.L709
+	bcs	.L710
 	mov	x0, x21
 	mov	w1, w26
 	bl	SamsungSetRRPara
@@ -4558,22 +4592,22 @@ SamsungReadRetrial:
 	mov	x3, x23
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L707
+	beq	.L708
 	add	x1, x20, :lo12:.LANCHOR0
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	ldrb	w1, [x1,4044]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L712
+	bcc	.L713
 	mov	x23, 0
 	mov	x24, x23
-.L707:
+.L708:
 	add	w26, w26, 1
-	b	.L706
-.L712:
+	b	.L707
+.L713:
 	mov	w19, w0
-.L709:
+.L710:
 	mov	x0, x21
 	mov	w1, 0
 	add	x20, x20, :lo12:.LANCHOR0
@@ -4581,11 +4615,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x20,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L711
+	bcc	.L712
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L711:
+.L712:
 	mov	w0, w19
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -4599,125 +4633,163 @@ SamsungReadRetrial:
 	.global	MicronReadRetrial
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
-	stp	x29, x30, [sp, -144]!
-	adrp	x4, .LANCHOR0
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp,32]
-	uxtb	w22, w0
-	add	x0, x4, :lo12:.LANCHOR0
-	stp	x23, x24, [sp,48]
 	stp	x19, x20, [sp,16]
+	adrp	x20, .LANCHOR0
+	stp	x21, x22, [sp,32]
+	uxtb	w21, w0
+	add	x0, x20, :lo12:.LANCHOR0
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-	mov	w24, w1
-	mov	x25, x2
-	ldrb	w20, [x0,4044]
-	mov	x23, x3
+	stp	x23, x24, [sp,48]
+	mov	w28, w1
+	mov	x26, x2
+	ldrb	w19, [x0,4044]
+	mov	x22, x3
 	ldrb	w0, [x0,136]
-	mov	x19, x4
-	cbnz	w0, .L719
-	add	w20, w20, w20, lsl 1
-	ubfx	x20, x20, 2, 8
-	b	.L720
-.L719:
-	mov	w0, 3
-	sdiv	w20, w20, w0
+	cbnz	w0, .L720
+	add	w19, w19, w19, lsl 1
+	ubfx	x19, x19, 2, 8
+	b	.L721
 .L720:
-	mov	w0, w22
-	adrp	x28, g_maxRetryCount
-	mov	w27, 0
-	add	x28, x28, :lo12:g_maxRetryCount
-	bl	NandcWaitFlashReady
-	add	x4, x19, :lo12:.LANCHOR0
-	sbfiz	x0, x22, 4, 32
-	add	x4, x4, 40
-	mov	w19, -1
-	add	x1, x4, x0
-	mov	w7, 239
-	mov	w8, 137
-	ldr	x4, [x4,x0]
-	ldrb	w21, [x1,8]
-	lsl	x6, x21, 8
+	mov	w0, 3
+	sdiv	w19, w19, w0
 .L721:
-	ldrb	w0, [x28]
-	cmp	w27, w0
-	bcs	.L724
-	add	x26, x4, x6
+	adrp	x0, g_maxRetryCount
+	adrp	x27, .LC11
+	add	x0, x0, :lo12:g_maxRetryCount
+	mov	w25, 0
+	str	x0, [x29,152]
+	add	x0, x27, :lo12:.LC11
+	str	x0, [x29,144]
+	add	x20, x20, :lo12:.LANCHOR0
+	add	x23, x20, 40
+	add	x23, x23, x21, sxtw 4
+.L732:
+	mov	w0, w21
+	mov	w24, 0
+	mov	w27, -1
+	bl	NandcWaitFlashReady
+	ldrb	w4, [x23,8]
+	mov	w9, 239
+	ldr	x6, [x23]
+	mov	w10, 137
+	lsl	x8, x4, 8
+.L722:
+	ldr	x0, [x29,152]
+	ldrb	w0, [x0]
+	cmp	w24, w0
+	bcs	.L725
+	add	x2, x6, x8
 	mov	w0, 200
-	str	x6, [x29,104]
-	str	x4, [x29,112]
-	str	w7, [x26,2056]
-	str	w8, [x26,2052]
-	str	x7, [x29,120]
-	str	x8, [x29,128]
+	str	x4, [x29,96]
+	str	x8, [x29,104]
+	str	w9, [x2,2056]
+	str	w10, [x2,2052]
+	str	x6, [x29,112]
+	str	x9, [x29,120]
+	str	x10, [x29,128]
+	str	x2, [x29,136]
 	bl	NandcDelayns
-	add	w5, w27, 1
-	str	w5, [x26,2048]
-	str	wzr, [x26,2048]
-	mov	w0, w22
-	str	wzr, [x26,2048]
-	mov	w1, w24
-	str	wzr, [x26,2048]
-	mov	x2, x25
-	mov	x3, x23
-	str	x5, [x29,136]
+	ldr	x2, [x29,136]
+	add	w7, w24, 1
+	mov	w0, w21
+	mov	w1, w28
+	mov	x3, x22
+	str	x7, [x29,136]
+	str	w7, [x2,2048]
+	str	wzr, [x2,2048]
+	str	wzr, [x2,2048]
+	str	wzr, [x2,2048]
+	mov	x2, x26
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	ldr	x5, [x29,136]
-	ldr	x8, [x29,128]
-	ldr	x7, [x29,120]
-	ldr	x4, [x29,112]
-	ldr	x6, [x29,104]
-	beq	.L722
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	cmp	w0, w20
-	bcc	.L729
-	mov	x23, 0
-	mov	x25, x23
-.L722:
-	mov	w27, w5
-	b	.L721
-.L729:
-	mov	w19, w0
-.L724:
-	add	x21, x4, x21, lsl 8
+	ldr	x7, [x29,136]
+	ldr	x10, [x29,128]
+	ldr	x9, [x29,120]
+	ldr	x6, [x29,112]
+	ldr	x8, [x29,104]
+	ldr	x4, [x29,96]
+	beq	.L723
+	cmn	w27, #1
+	csel	w27, w27, w0, ne
+	cmp	w0, w19
+	bcc	.L734
+	mov	x22, 0
+	mov	x26, x22
+.L723:
+	mov	w24, w7
+	b	.L722
+.L734:
+	mov	x22, 0
+	mov	w27, w0
+	mov	x26, x22
+.L725:
+	add	x1, x6, x4, lsl 8
 	mov	w0, 239
-	str	w0, [x21,2056]
+	str	x1, [x29,136]
+	str	w0, [x1,2056]
 	mov	w0, 137
-	str	w0, [x21,2052]
+	str	w0, [x1,2052]
 	mov	w0, 200
 	bl	NandcDelayns
-	str	wzr, [x21,2048]
-	str	wzr, [x21,2048]
-	cmp	w19, w20
-	str	wzr, [x21,2048]
-	str	wzr, [x21,2048]
-	bcc	.L726
-	cmn	w19, #1
+	ldr	x1, [x29,136]
+	cmp	w27, w19
+	str	wzr, [x1,2048]
+	str	wzr, [x1,2048]
+	str	wzr, [x1,2048]
+	str	wzr, [x1,2048]
+	bcc	.L727
+	cmn	w27, #1
 	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L726:
-	cmn	w19, #1
-	beq	.L730
-	cmp	w19, 256
-	bne	.L727
-.L730:
-	adrp	x0, .LC11
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC11
-	mov	w2, w24
-	mov	w3, w27
-	mov	w4, w19
-	bl	printk
+	csel	w27, w27, w0, eq
 .L727:
-	mov	w0, w19
+	cmn	w27, #1
+	cset	w6, eq
+	cbnz	w6, .L736
+	cmp	w27, 256
+	cset	w1, eq
+	cbz	w1, .L728
+.L736:
+	ldr	x0, [x29,144]
+	mov	w1, w24
+	mov	w2, w28
+	mov	w3, w24
+	mov	w4, w27
+	str	x6, [x29,136]
+	bl	printk
+	cbnz	w25, .L730
+	ldr	x6, [x29,136]
+	cbz	w6, .L741
+	ldrb	w0, [x20,136]
+	cbz	w0, .L741
+	mov	w0, w21
+	mov	w1, 3
+	mov	w25, 1
+	bl	micron_auto_read_calibration_config
+	b	.L732
+.L730:
+	mov	w0, w21
+	mov	w1, 0
+	bl	micron_auto_read_calibration_config
+	cmn	w27, #1
+	mov	w0, 256
+	csel	w27, w27, w0, eq
+	b	.L741
+.L728:
+	cbz	w25, .L741
+	mov	w0, w21
+	mov	w27, 256
+	bl	micron_auto_read_calibration_config
+.L741:
+	mov	w0, w27
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
 	ldp	x25, x26, [sp,64]
 	ldp	x27, x28, [sp,80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 160
 	ret
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.align	2
@@ -4745,18 +4817,18 @@ HynixReadRetrial:
 	ldrb	w19, [x0,12]
 	ldrb	w1, [x1,19]
 	cmp	w1, 7
-	bne	.L740
+	bne	.L750
 	ldrb	w19, [x0,20]
-.L740:
+.L750:
 	mov	w0, w23
 	mov	w28, 0
 	mov	w20, -1
 	bl	NandcWaitFlashReady
 	add	x4, x21, :lo12:.LANCHOR0
 	add	x5, x4, 4060
-.L741:
+.L751:
 	cmp	w28, w25
-	bcs	.L745
+	bcs	.L755
 	add	w19, w19, 1
 	ldrb	w1, [x4,4057]
 	mov	x2, x5
@@ -4776,42 +4848,42 @@ HynixReadRetrial:
 	cmn	w0, #1
 	ldr	x5, [x29,104]
 	ldr	x4, [x29,96]
-	beq	.L743
+	beq	.L753
 	ldrb	w1, [x4,4044]
 	cmn	w20, #1
 	csel	w20, w20, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L750
+	bcc	.L760
 	mov	x24, 0
 	mov	x26, x24
-.L743:
+.L753:
 	add	w28, w28, 1
-	b	.L741
-.L750:
+	b	.L751
+.L760:
 	mov	w20, w0
-.L745:
+.L755:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x1, [x0,1912]
 	add	x0, x0, 4056
 	add	x0, x0, x22
 	ldrb	w1, [x1,19]
 	cmp	w1, 7
-	bne	.L747
+	bne	.L757
 	strb	w19, [x0,20]
-	b	.L748
-.L747:
+	b	.L758
+.L757:
 	strb	w19, [x0,12]
-.L748:
+.L758:
 	add	x21, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x21,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w20, w0, lsr 2
-	bcc	.L749
+	bcc	.L759
 	cmn	w20, #1
 	mov	w0, 256
 	csel	w20, w20, w0, eq
-.L749:
+.L759:
 	mov	w0, w20
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4835,21 +4907,21 @@ FlashProgPage:
 	mov	w20, w1
 	mov	x22, x2
 	ldrb	w21, [x0,#:lo12:.LANCHOR1+265]
-	cbnz	w19, .L757
+	cbnz	w19, .L767
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w1, [x0,25]
 	ldr	w2, [x0,28]
 	mul	w1, w1, w2
 	cmp	w20, w1
-	bcs	.L757
+	bcs	.L767
 	ldrb	w0, [x0,24]
-	cbnz	w0, .L758
+	cbnz	w0, .L768
 	sub	w21, w21, #2
-	b	.L757
-.L758:
+	b	.L767
+.L768:
 	mov	w21, 4
-.L757:
+.L767:
 	mov	w0, w19
 	str	x4, [x29,56]
 	bl	NandcWaitFlashReady
@@ -4959,7 +5031,7 @@ FlashSavePhyInfo:
 	mov	w0, 0
 	mov	w19, w21
 	bl	flash_enter_slc_mode
-.L762:
+.L772:
 	add	x20, x22, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w0, 0
@@ -4988,34 +5060,34 @@ FlashSavePhyInfo:
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L760
+	beq	.L770
 	ldr	x25, [x24,672]
 	mov	w0, 20036
 	movk	w0, 0x4e41, lsl 16
 	ldr	w1, [x25]
 	cmp	w1, w0
-	bne	.L760
+	bne	.L770
 	mov	w1, 2036
 	add	x0, x25, 12
 	bl	JSHash
 	ldr	w1, [x25,8]
 	cmp	w1, w0
-	bne	.L760
+	bne	.L770
 	ldr	w0, [x20,28]
 	cmp	w21, 1
 	str	w26, [x20,8]
 	mul	w19, w19, w0
 	str	w19, [x24,680]
-	beq	.L763
+	beq	.L773
 	mov	w21, 1
-.L760:
+.L770:
 	cmp	w26, 4
 	mov	w19, w26
-	bne	.L762
-	b	.L761
-.L763:
+	bne	.L772
+	b	.L771
+.L773:
 	mov	w21, 2
-.L761:
+.L771:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w21, wzr
@@ -5056,10 +5128,10 @@ FlashReadIdbDataRaw:
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L769
+	bne	.L779
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L769:
+.L779:
 	adrp	x25, .LC12
 	mov	x0, x27
 	mov	w1, 0
@@ -5068,13 +5140,13 @@ FlashReadIdbDataRaw:
 	mov	w20, 2
 	add	x25, x25, :lo12:.LC12
 	bl	ftl_memset
-.L770:
+.L780:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x0,25]
 	cmp	w20, w0
-	bcs	.L774
+	bcs	.L784
 	mov	x23, 0
-.L772:
+.L782:
 	add	x0, x29, 104
 	add	x19, x21, :lo12:.LANCHOR0
 	ldrb	w26, [x23,x0]
@@ -5087,18 +5159,18 @@ FlashReadIdbDataRaw:
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L771
+	bne	.L781
 	add	x23, x23, 1
 	cmp	x23, 4
-	bne	.L772
-	b	.L773
-.L771:
+	bne	.L782
+	b	.L783
+.L781:
 	ldr	x0, [x19]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L773
+	bne	.L783
 	mov	w1, w26
 	mov	x0, x25
 	bl	printk
@@ -5111,16 +5183,16 @@ FlashReadIdbDataRaw:
 	strb	w0, [x19,25]
 	ldr	w0, [x19,8]
 	cmp	w0, w20
-	bls	.L777
+	bls	.L787
 	mov	w24, 0
 	str	w20, [x19,8]
 	bl	FlashSavePhyInfo
-.L773:
+.L783:
 	add	w20, w20, 1
-	b	.L770
-.L777:
+	b	.L780
+.L787:
 	mov	w24, 0
-.L774:
+.L784:
 	mov	w0, w28
 	add	x22, x22, :lo12:.LANCHOR2
 	bl	FlashBchSel
@@ -5128,10 +5200,10 @@ FlashReadIdbDataRaw:
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L779
+	bne	.L789
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L779:
+.L789:
 	mov	w0, w24
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -5194,7 +5266,7 @@ FlashInit:
 	add	x0, x25, :lo12:.LC13
 	mov	x26, x21
 	str	x0, [x29,104]
-.L786:
+.L796:
 	uxtb	w25, w27
 	mov	w0, w25
 	bl	FlashReset
@@ -5229,7 +5301,7 @@ FlashInit:
 	sub	w0, w2, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bhi	.L782
+	bhi	.L792
 	ldr	x0, [x29,104]
 	add	w1, w27, 1
 	ldrb	w3, [x21,1]
@@ -5238,35 +5310,35 @@ FlashInit:
 	ldrb	w6, [x21,4]
 	ldrb	w7, [x21,5]
 	bl	printk
-.L782:
-	cbnz	w27, .L783
+.L792:
+	cbnz	w27, .L793
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bhi	.L830
+	bhi	.L840
 	ldrb	w0, [x26,1]
 	cmp	w0, 255
-	beq	.L830
+	beq	.L840
 	bl	FlashCs123Init
-.L783:
+.L793:
 	ldrb	w0, [x21]
 	cmp	w0, 181
-	bne	.L785
+	bne	.L795
 	strb	w28, [x21]
-.L785:
+.L795:
 	add	w27, w27, 1
 	add	x24, x24, 16
 	cmp	w27, 4
 	add	x21, x21, 8
-	bne	.L786
+	bne	.L796
 	ldrb	w0, [x23,#:lo12:IDByte]
 	cmp	w0, 173
-	beq	.L787
+	beq	.L797
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w0, [x0,576]
 	bl	NandcSetDdrMode
-.L787:
+.L797:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	mov	w2, 852
@@ -5284,16 +5356,16 @@ FlashInit:
 	cmp	w0, 161
 	cset	w2, eq
 	orr	w2, w3, w2
-	cbnz	w2, .L788
+	cbnz	w2, .L798
 	and	w2, w0, -33
 	cmp	w2, 209
-	beq	.L788
+	beq	.L798
 	cmp	w0, 220
-	bne	.L789
+	bne	.L799
 	ldrb	w2, [x4,3]
 	cmp	w2, 149
-	bne	.L789
-.L788:
+	bne	.L799
+.L798:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w4, 1
 	mov	w5, 16
@@ -5307,37 +5379,37 @@ FlashInit:
 	strb	w5, [x2,3033]
 	strb	w0, [x2,3034]
 	cmp	w5, 152
-	bne	.L790
+	bne	.L800
 	ldrsb	w2, [x6,4]
-	tbnz	w2, #31, .L790
+	tbnz	w2, #31, .L800
 	mov	w2, 24
 	strb	w2, [x4,685]
-.L790:
+.L800:
 	add	x2, x20, :lo12:.LANCHOR2
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
 	ldr	w5, [x2,568]
 	cmp	w5, w4
-	bne	.L791
+	bne	.L801
 	mov	w4, 16
 	strb	w4, [x2,685]
-.L791:
-	cbz	w3, .L792
+.L801:
+	cbz	w3, .L802
 	add	x0, x1, :lo12:.LANCHOR1
 	mov	w2, 2048
 	strh	w2, [x0,3046]
 	mov	w2, -38
-	b	.L861
-.L792:
+	b	.L871
+.L802:
 	cmp	w0, 220
-	bne	.L793
+	bne	.L803
 	add	x0, x1, :lo12:.LANCHOR1
 	mov	w2, 4096
 	strh	w2, [x0,3046]
 	mov	w2, -36
-.L861:
+.L871:
 	strb	w2, [x0,3034]
-.L793:
+.L803:
 	add	x21, x1, :lo12:.LANCHOR1
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x1, x21, 2688
@@ -5348,45 +5420,45 @@ FlashInit:
 	add	x1, x21, 3032
 	mov	w2, 32
 	bl	ftl_memcpy
-.L789:
+.L799:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x21,24]
-	cbnz	w0, .L794
+	cbnz	w0, .L804
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L796
+	cbnz	w0, .L806
 	ldr	x0, [x21,1912]
 	add	x21, x20, :lo12:.LANCHOR2
 	ldrb	w1, [x0,17]
 	and	w0, w1, 7
 	strb	w0, [x21,564]
-	tbnz	x1, 0, .L796
+	tbnz	x1, 0, .L806
 	mov	w1, 1
 	strb	w1, [x21,572]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x21,564]
 	bl	NandcSetMode
-.L796:
+.L806:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x1, [x0,1912]
 	ldrb	w1, [x1,26]
 	strb	w1, [x0,136]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L794
+	cbz	w0, .L804
 	add	x21, x20, :lo12:.LANCHOR2
 	ldr	w0, [x21,576]
-	cbz	w0, .L799
+	cbz	w0, .L809
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
-	b	.L862
-.L799:
+	b	.L872
+.L809:
 	ldrb	w0, [x21,564]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x21,564]
-.L862:
+.L872:
 	bl	NandcSetMode
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L794
+	cbz	w0, .L804
 	mov	w0, 1
 	add	x21, x19, :lo12:.LANCHOR0
 	bl	FlashSetInterfaceMode
@@ -5399,7 +5471,7 @@ FlashInit:
 	bl	printk
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L784
+	beq	.L794
 	bl	FlashDieInfoInit
 	ldr	x0, [x21,1912]
 	ldrb	w0, [x0,19]
@@ -5409,27 +5481,27 @@ FlashInit:
 	ldrb	w2, [x0,9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L801
+	blt	.L811
 	ldrh	w1, [x0,14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L802
-.L801:
+	bge	.L812
+.L811:
 	ldrh	w1, [x0,14]
 	and	w1, w1, -256
 	strh	w1, [x0,14]
-.L802:
+.L812:
 	add	x21, x20, :lo12:.LANCHOR2
 	ldrb	w0, [x21,564]
 	tst	w0, 6
-	beq	.L803
+	beq	.L813
 	bl	FlashSavePhyInfo
 	ldr	w1, [x21,680]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L803:
+.L813:
 	bl	FlashSavePhyInfo
-.L794:
+.L804:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x22, x20, :lo12:.LANCHOR2
 	ldr	x2, [x21,1912]
@@ -5453,7 +5525,7 @@ FlashInit:
 	bl	FlashDieInfoInit
 	ldr	x0, [x21,1912]
 	ldrh	w1, [x0,16]
-	tbz	x1, 6, .L805
+	tbz	x1, 6, .L815
 	adrp	x1, g_retryMode
 	adrp	x3, g_maxRegNum
 	ldrb	w0, [x0,19]
@@ -5468,64 +5540,64 @@ FlashInit:
 	uxtb	w2, w2
 	cmp	w2, 6
 	mov	x2, x1
-	bhi	.L806
+	bhi	.L816
 	adrp	x1, HynixReadRetrial
 	add	x1, x1, :lo12:HynixReadRetrial
 	str	x1, [x22,664]
 	sub	w1, w0, #5
 	uxtb	w1, w1
 	cmp	w1, 1
-	bhi	.L807
+	bhi	.L817
 	mov	w1, 1
 	str	w1, [x22,640]
-	b	.L808
-.L807:
+	b	.L818
+.L817:
 	cmp	w0, 7
 	add	x21, x21, 4084
-	beq	.L809
-.L808:
+	beq	.L819
+.L818:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x21, x21, 4076
-.L809:
+.L819:
 	mov	x1, 0
 	mov	w2, w1
-.L811:
+.L821:
 	ldrsb	w3, [x21,x1]
 	add	x1, x1, 1
 	cmp	w3, wzr
 	csinc	w2, w2, w2, ne
 	cmp	x1, 32
-	bne	.L811
+	bne	.L821
 	cmp	w2, 27
-	bls	.L805
+	bls	.L815
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L805
-.L806:
+	b	.L815
+.L816:
 	sub	w3, w0, #17
 	uxtb	w3, w3
 	cmp	w3, 2
-	bhi	.L813
+	bhi	.L823
 	adrp	x2, MicronReadRetrial
 	cmp	w0, 19
 	add	x2, x2, :lo12:MicronReadRetrial
 	str	x2, [x22,664]
-	beq	.L814
+	beq	.L824
 	mov	w0, 7
-	b	.L864
-.L814:
+	b	.L874
+.L824:
 	mov	w0, 15
-.L864:
+.L874:
 	strb	w0, [x1,#:lo12:g_maxRetryCount]
-	b	.L805
-.L813:
+	b	.L815
+.L823:
 	sub	w1, w0, #65
 	uxtb	w1, w1
 	cmp	w1, 1
-	bls	.L832
+	bls	.L842
 	cmp	w0, 33
-	bne	.L815
-.L832:
+	bne	.L825
+.L842:
 	add	x0, x20, :lo12:.LANCHOR2
 	adrp	x1, ToshibaReadRetrial
 	add	x1, x1, :lo12:ToshibaReadRetrial
@@ -5534,8 +5606,8 @@ FlashInit:
 	strb	w0, [x5,#:lo12:g_maxRegNum]
 	mov	w0, 7
 	strb	w0, [x2,#:lo12:g_maxRetryCount]
-	b	.L805
-.L815:
+	b	.L815
+.L825:
 	sub	w1, w0, #67
 	uxtb	w1, w1
 	cmp	w1, 1
@@ -5543,84 +5615,84 @@ FlashInit:
 	cset	w4, ls
 	uxtb	w1, w1
 	cmp	w1, 1
-	bls	.L833
-	cbz	w4, .L817
-.L833:
+	bls	.L843
+	cbz	w4, .L827
+.L843:
 	add	x1, x20, :lo12:.LANCHOR2
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	cmp	w0, 35
 	str	x3, [x1,664]
-	beq	.L819
+	beq	.L829
 	cmp	w0, 68
-	beq	.L819
+	beq	.L829
 	mov	w0, 7
-	b	.L863
-.L819:
+	b	.L873
+.L829:
 	mov	w0, 17
-.L863:
+.L873:
 	strb	w0, [x2,#:lo12:g_maxRetryCount]
 	mov	w0, 4
-	cbnz	w4, .L865
+	cbnz	w4, .L875
 	mov	w0, 5
-.L865:
+.L875:
 	strb	w0, [x5,#:lo12:g_maxRegNum]
-	b	.L805
-.L817:
+	b	.L815
+.L827:
 	cmp	w0, 49
-	bne	.L805
+	bne	.L815
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x22,664]
-.L805:
+.L815:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w1, [x0,568]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L822
+	bne	.L832
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x0,136]
-	cbz	w2, .L822
+	cbz	w2, .L832
 	ldr	x0, [x0,1912]
 	strb	wzr, [x0,18]
-.L822:
+.L832:
 	ldrb	w0, [x23,#:lo12:IDByte]
 	cmp	w0, 44
-	bne	.L823
+	bne	.L833
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrb	w0, [x0,572]
-	cbz	w0, .L823
+	cbz	w0, .L833
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L824
+	bne	.L834
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbnz	w0, .L823
-.L824:
+	cbnz	w0, .L833
+.L834:
 	add	x0, x20, :lo12:.LANCHOR2
 	strb	wzr, [x0,572]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L823:
+.L833:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	add	x1, x20, :lo12:.LANCHOR2
 	ldrb	w0, [x1,564]
 	tst	w0, 6
-	beq	.L825
+	beq	.L835
 	ldrb	w1, [x1,572]
-	cbnz	w1, .L826
-	tbnz	x0, 0, .L825
-.L826:
+	cbnz	w1, .L836
+	tbnz	x0, 0, .L835
+.L836:
 	add	x20, x20, :lo12:.LANCHOR2
 	mov	w0, 0
 	ldr	w1, [x20,680]
 	bl	FlashDdrParaScan
-.L825:
+.L835:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	mov	w20, 16
@@ -5667,7 +5739,7 @@ FlashInit:
 	ldrb	w5, [x19,24]
 	strh	w2, [x19,4038]
 	cmp	w5, 1
-	bne	.L828
+	bne	.L838
 	lsl	w2, w2, 1
 	lsr	w4, w4, 1
 	lsl	w3, w3, 1
@@ -5677,15 +5749,15 @@ FlashInit:
 	strh	w4, [x19,4030]
 	strh	w3, [x19,4036]
 	strh	w2, [x19,4042]
-.L828:
+.L838:
 	ldrb	w0, [x1,20]
 	bl	FlashBchSel
 	bl	ftl_flash_suspend
 	mov	w0, 0
-	b	.L784
-.L830:
+	b	.L794
+.L840:
 	mov	w0, -2
-.L784:
+.L794:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -5711,38 +5783,38 @@ FlashPageProgMsbFFData:
 	ldr	x2, [x0,1912]
 	ldrb	w0, [x0,136]
 	ldrb	w3, [x2,19]
-	cbz	w0, .L867
+	cbz	w0, .L877
 	adrp	x0, .LANCHOR2+568
 	ldr	w2, [x0,#:lo12:.LANCHOR2+568]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w2, w0
-	beq	.L866
-.L867:
+	beq	.L876
+.L877:
 	sub	w0, w3, #5
 	uxtb	w0, w0
 	cmp	w0, 2
-	bls	.L868
+	bls	.L878
 	cmp	w3, 68
-	beq	.L868
+	beq	.L878
 	sub	w3, w3, #19
 	and	w3, w3, -17
 	uxtb	w3, w3
-	cbnz	w3, .L866
-.L868:
+	cbnz	w3, .L876
+.L878:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w21, w1
 	add	x24, x20, 652
 	mov	w25, 65535
 	adrp	x26, .LANCHOR2
-.L870:
+.L880:
 	ldr	x0, [x20,1912]
 	ldrh	w0, [x0,10]
 	cmp	w0, w19
-	bls	.L866
+	bls	.L876
 	ldrh	w0, [x24,w19,sxtw 1]
 	cmp	w0, w25
-	bne	.L866
+	bne	.L876
 	add	x23, x26, :lo12:.LANCHOR2
 	mov	w1, 255
 	mov	w2, 32768
@@ -5755,8 +5827,8 @@ FlashPageProgMsbFFData:
 	add	w19, w19, 1
 	bl	FlashProgPage
 	uxth	w19, w19
-	b	.L870
-.L866:
+	b	.L880
+.L876:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -5787,9 +5859,9 @@ FlashReadSlc2KPages:
 	add	x21, x21, :lo12:.LANCHOR0
 	add	x23, x23, :lo12:.LC15
 	add	x24, x24, :lo12:.LC17
-.L876:
+.L886:
 	cmp	w22, w25
-	beq	.L910
+	beq	.L920
 	mov	w1, w27
 	sub	w4, w25, w22
 	mov	x0, x19
@@ -5800,11 +5872,11 @@ FlashReadSlc2KPages:
 	adrp	x5, .LANCHOR0
 	ldrb	w1, [x21,1676]
 	cmp	w0, w1
-	bcc	.L877
+	bcc	.L887
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L878
-.L877:
+	b	.L888
+.L887:
 	add	x0, x21, x0, uxtw
 	ldrb	w28, [x0,1680]
 	str	x5, [x29,96]
@@ -5853,58 +5925,58 @@ FlashReadSlc2KPages:
 	ldrb	w0, [x0,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w3, w0, lsr 2
-	bls	.L881
+	bls	.L891
 	cmn	w3, #1
 	mov	w0, 256
 	csel	w3, w3, w0, eq
-.L881:
+.L891:
 	cmp	w3, 256
-	beq	.L892
+	beq	.L902
 	cmn	w3, #1
-	bne	.L882
-.L892:
+	bne	.L892
+.L902:
 	str	w3, [x19]
-	b	.L884
-.L882:
+	b	.L894
+.L892:
 	str	wzr, [x19]
-.L884:
+.L894:
 	ldr	x0, [x19,16]
-	cbz	x0, .L885
+	cbz	x0, .L895
 	ldr	w1, [x0,8]
 	cmn	w1, #1
-	bne	.L885
+	bne	.L895
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L885
+	beq	.L895
 	str	w1, [x19]
-.L885:
+.L895:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L878
+	bne	.L888
 	add	x5, x5, :lo12:.LANCHOR0
 	ldr	w1, [x19,4]
 	mov	x0, x23
 	ldrb	w2, [x5,4044]
 	bl	printk
 	ldr	x1, [x19,8]
-	cbz	x1, .L887
+	cbz	x1, .L897
 	adrp	x0, .LC16
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC16
 	mov	w3, 8
 	bl	rknand_print_hex
-.L887:
+.L897:
 	ldr	x1, [x19,16]
-	cbz	x1, .L878
+	cbz	x1, .L888
 	mov	w2, 4
 	mov	x0, x24
 	mov	w3, w2
 	bl	rknand_print_hex
-.L878:
+.L888:
 	add	w22, w22, 1
 	add	x19, x19, 56
-	b	.L876
-.L910:
+	b	.L886
+.L920:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -5936,10 +6008,10 @@ FlashReadPages:
 	ldrb	w23, [x3,24]
 	str	w2, [x29,140]
 	str	w4, [x29,136]
-	cbz	w23, .L951
+	cbz	w23, .L961
 	bl	FlashReadSlc2KPages
-	b	.L1000
-.L951:
+	b	.L1010
+.L961:
 	adrp	x0, .LC15
 	mov	w25, w23
 	add	x0, x0, :lo12:.LC15
@@ -5950,10 +6022,10 @@ FlashReadPages:
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	str	x0, [x29,112]
-.L912:
+.L922:
 	ldr	w0, [x29,144]
 	cmp	w25, w0
-	bcs	.L1002
+	bcs	.L1012
 	mov	w27, 56
 	ldr	w0, [x29,144]
 	ldr	w1, [x29,140]
@@ -5970,11 +6042,11 @@ FlashReadPages:
 	ldr	w0, [x29,168]
 	ldrb	w2, [x1,1676]
 	cmp	w0, w2
-	bcc	.L914
+	bcc	.L924
 	mov	w0, -1
 	str	w0, [x26,x27]
-	b	.L915
-.L914:
+	b	.L925
+.L924:
 	add	x0, x1, x0, uxtw
 	adrp	x24, .LANCHOR2
 	ldrb	w19, [x0,1680]
@@ -5991,26 +6063,26 @@ FlashReadPages:
 	sub	w0, w2, #1
 	uxtb	w0, w0
 	cmp	w0, 6
-	bhi	.L917
+	bhi	.L927
 	add	x1, x1, 4056
 	sxtw	x0, w19
 	add	x1, x1, x0
 	cmp	w2, 7
 	ldrb	w3, [x1,12]
-	bne	.L918
+	bne	.L928
 	ldrb	w3, [x1,20]
-.L918:
+.L928:
 	add	x1, x24, :lo12:.LANCHOR2
 	add	x0, x1, x0
 	ldrb	w0, [x0,560]
 	cmp	w0, w3
-	beq	.L917
+	beq	.L927
 	add	x2, x22, :lo12:.LANCHOR0
 	mov	w0, w19
 	add	x2, x2, 4060
 	ldrb	w1, [x2,-3]
 	bl	HynixSetRRPara
-.L917:
+.L927:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29,140]
@@ -6018,38 +6090,38 @@ FlashReadPages:
 	cset	w0, eq
 	orr	w0, w0, w28, lsr 31
 	str	w0, [x29,152]
-	cbz	w0, .L919
+	cbz	w0, .L929
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L919
+	cbz	w0, .L929
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-	b	.L920
-.L919:
+	b	.L930
+.L929:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-.L920:
+.L930:
 	cmp	w19, 255
 	ldr	w1, [x29,172]
-	bne	.L958
+	bne	.L968
 	cmn	w1, #1
 	cset	w0, ne
-	cbz	w0, .L952
-.L958:
-	cbz	w20, .L924
+	cbz	w0, .L962
+.L968:
+	cbz	w20, .L934
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	w2, [x0,28]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-	b	.L925
-.L924:
+	b	.L935
+.L934:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L925
-.L952:
+	b	.L935
+.L962:
 	mov	w20, w0
-.L922:
+.L932:
 	ldrb	w2, [x29,148]
 	mov	w0, w19
 	ldr	x3, [x21,8]
@@ -6058,15 +6130,15 @@ FlashReadPages:
 	bl	NandcXferData
 	cmn	w0, #1
 	mov	w28, w0
-	bne	.L926
+	bne	.L936
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x0,32]
-	cbz	w1, .L926
+	cbz	w1, .L936
 	strb	wzr, [x0,32]
 	mov	w20, 0
-	b	.L920
-.L926:
-	cbz	w20, .L927
+	b	.L930
+.L936:
+	cbz	w20, .L937
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	w1, [x29,172]
 	ldr	w2, [x0,28]
@@ -6086,23 +6158,23 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L927:
+.L937:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	add	x6, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x29,136]
 	cmn	w28, #1
 	strb	w0, [x6,32]
-	bne	.L934
+	bne	.L944
 	add	x0, x24, :lo12:.LANCHOR2
 	ldrb	w0, [x0,572]
-	cbnz	w0, .L929
-.L933:
+	cbnz	w0, .L939
+.L943:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldr	x20, [x0,664]
-	cbnz	x20, .L930
-	b	.L1003
-.L929:
+	cbnz	x20, .L940
+	b	.L1013
+.L939:
 	ldr	x0, [x6,3976]
 	mov	w4, 1
 	ldr	w1, [x29,172]
@@ -6114,18 +6186,18 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	cmn	w0, #1
 	mov	w28, w0
-	beq	.L932
+	beq	.L942
 	ldr	x6, [x29,104]
 	ldrb	w0, [x6,4044]
 	cmp	w28, w0, lsr 1
-	bls	.L954
-.L932:
+	bls	.L964
+.L942:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L933
-	b	.L954
-.L930:
+	beq	.L943
+	b	.L964
+.L940:
 	ldr	w1, [x29,172]
 	mov	w0, w19
 	ldr	x2, [x21,8]
@@ -6134,20 +6206,20 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w28, w0
 	mov	w20, 0
-	bne	.L935
+	bne	.L945
 	add	x2, x22, :lo12:.LANCHOR0
 	ldr	x0, [x2,1912]
 	ldrb	w0, [x0,19]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 6
-	bhi	.L936
+	bhi	.L946
 	ldrb	w1, [x2,4057]
 	mov	w0, w19
 	add	x2, x2, 4060
 	mov	w3, w20
 	bl	HynixSetRRPara
-.L936:
+.L946:
 	ldr	w1, [x29,172]
 	mov	w0, w19
 	ldr	x2, [x21,8]
@@ -6164,18 +6236,18 @@ FlashReadPages:
 	bl	printk
 	cmn	w28, #1
 	ldr	x4, [x29,104]
-	bne	.L935
+	bne	.L945
 	ldrb	w0, [x4,136]
-	cbz	w0, .L935
+	cbz	w0, .L945
 	ldr	w0, [x29,152]
-	cbz	w0, .L937
+	cbz	w0, .L947
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-	b	.L938
-.L937:
+	b	.L948
+.L947:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-.L938:
+.L948:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldr	w1, [x29,172]
 	ldr	x2, [x21,8]
@@ -6185,102 +6257,102 @@ FlashReadPages:
 	mov	w0, w19
 	blr	x4
 	mov	w28, w0
-	b	.L935
-.L1003:
+	b	.L945
+.L1013:
 	ldr	w1, [x29,172]
 	mov	w0, w19
 	ldr	x2, [x21,8]
 	ldr	x3, [x21,16]
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L935
-.L954:
+	b	.L945
+.L964:
 	mov	w20, 0
-.L934:
+.L944:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L935
+	bls	.L945
 	add	x0, x24, :lo12:.LANCHOR2
 	ldr	x0, [x0,664]
 	cmp	x0, xzr
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L935:
+.L945:
 	cmp	w28, 256
-	beq	.L959
+	beq	.L969
 	cmn	w28, #1
-	bne	.L939
-.L959:
+	bne	.L949
+.L969:
 	str	w28, [x26,x27]
-	b	.L941
-.L939:
+	b	.L951
+.L949:
 	str	wzr, [x26,x27]
-.L941:
+.L951:
 	ldr	w3, [x26,x27]
 	cmn	w3, #1
-	bne	.L943
+	bne	.L953
 	add	x2, x22, :lo12:.LANCHOR0
 	ldr	w1, [x21,4]
 	ldr	x0, [x29,128]
 	ldrb	w2, [x2,4044]
 	bl	printk
 	ldr	x1, [x21,16]
-	cbz	x1, .L943
+	cbz	x1, .L953
 	mov	w2, 4
 	ldr	x0, [x29,120]
 	mov	w3, w2
 	bl	rknand_print_hex
-.L943:
-	cbz	w20, .L945
+.L953:
+	cbz	w20, .L955
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,4044]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L946
+	bls	.L956
 	add	x24, x24, :lo12:.LANCHOR2
 	ldr	x0, [x24,664]
 	cmp	x0, xzr
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L946:
+.L956:
 	add	w0, w25, 1
 	mov	w1, 56
 	cmp	w23, 256
 	umull	x0, w0, w1
-	beq	.L960
+	beq	.L970
 	cmn	w23, #1
-	bne	.L947
-.L960:
+	bne	.L957
+.L970:
 	str	w23, [x26,x0]
-	b	.L945
-.L947:
+	b	.L955
+.L957:
 	str	wzr, [x26,x0]
-.L945:
+.L955:
 	ldr	w0, [x29,152]
 	add	w25, w25, w20
-	cbz	w0, .L915
+	cbz	w0, .L925
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L915
+	cbz	w0, .L925
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-.L915:
+.L925:
 	add	w25, w25, 1
-	b	.L912
-.L1002:
+	b	.L922
+.L1012:
 	mov	w0, 0
-	b	.L1000
-.L925:
+	b	.L1010
+.L935:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L922
+	cbz	w20, .L932
 	ldr	w1, [x29,172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-	b	.L922
-.L1000:
+	b	.L932
+.L1010:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -6324,18 +6396,18 @@ FlashLoadFactorBbt:
 	str	xzr, [x29,144]
 	uxth	w25, w25
 	str	w0, [x29,124]
-.L1005:
+.L1015:
 	add	x1, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x1,1676]
 	cmp	w1, w19
-	bls	.L1015
+	bls	.L1025
 	mul	w3, w19, w21
 	mov	w20, w25
 	mov	w4, 61664
-.L1006:
+.L1016:
 	ldr	w0, [x29,124]
 	cmp	w20, w0
-	ble	.L1008
+	ble	.L1018
 	add	w1, w3, w20
 	add	x0, x29, 136
 	lsl	w1, w1, 10
@@ -6349,12 +6421,12 @@ FlashLoadFactorBbt:
 	ldr	x3, [x29,112]
 	cmn	w0, #1
 	ldr	x4, [x29,104]
-	beq	.L1007
+	beq	.L1017
 	add	x24, x23, :lo12:.LANCHOR2
 	ldr	x0, [x24,696]
 	ldrh	w0, [x0]
 	cmp	w0, w4
-	bne	.L1007
+	bne	.L1017
 	add	x24, x24, 728
 	mov	x0, x26
 	mov	w1, w19
@@ -6363,20 +6435,20 @@ FlashLoadFactorBbt:
 	bl	printk
 	strh	w20, [x24,w19,sxtw 1]
 	uxth	w28, w28
-	b	.L1008
-.L1007:
+	b	.L1018
+.L1017:
 	sub	w20, w20, #1
 	uxth	w20, w20
-	b	.L1006
-.L1008:
+	b	.L1016
+.L1018:
 	add	x1, x22, :lo12:.LANCHOR0
 	add	w19, w19, 1
 	uxtb	w19, w19
 	ldrb	w1, [x1,1676]
 	cmp	w1, w28
 	csel	w27, w27, wzr, ne
-	b	.L1005
-.L1015:
+	b	.L1015
+.L1025:
 	mov	w0, w27
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -6417,9 +6489,9 @@ FlashReadFacBbtData:
 	sub	w19, w3, #16
 	mul	w24, w23, w3
 	uxth	w20, w20
-.L1017:
+.L1027:
 	cmp	w20, w19
-	ble	.L1025
+	ble	.L1035
 	add	w0, w20, w24
 	mov	w1, 1
 	lsl	w0, w0, 10
@@ -6429,26 +6501,26 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29,88]
 	cmn	w0, #1
-	beq	.L1018
+	beq	.L1028
 	add	x0, x21, :lo12:.LANCHOR2
 	ldr	x0, [x0,696]
 	ldrh	w0, [x0]
 	cmp	w0, w26
-	bne	.L1018
+	bne	.L1028
 	mov	w0, w22
-	cbz	x22, .L1019
+	cbz	x22, .L1029
 	mov	x0, x22
 	mov	w1, w23
 	mov	w2, w25
 	bl	FlashReadFacBbtData.part.6
-	b	.L1019
-.L1018:
+	b	.L1029
+.L1028:
 	sub	w20, w20, #1
 	uxth	w20, w20
-	b	.L1017
-.L1025:
+	b	.L1027
+.L1035:
 	mov	w0, -1
-.L1019:
+.L1029:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -6478,37 +6550,37 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L1027
-.L1031:
+	bne	.L1037
+.L1041:
 	mov	w1, 0
-	b	.L1028
-.L1027:
+	b	.L1038
+.L1037:
 	mov	w2, 0
 	lsr	w0, w19, 4
 	mov	w1, w2
 	sub	w19, w19, #1
 	mov	w5, 1
-.L1029:
+.L1039:
 	cmp	w2, w19
-	bge	.L1028
+	bge	.L1038
 	add	x3, x20, :lo12:.LANCHOR2
 	ubfx	x4, x2, 5, 11
 	ldr	x6, [x3,688]
 	lsl	w3, w5, w2
 	ldr	w4, [x6,x4,lsl 2]
 	tst	w3, w4
-	beq	.L1030
+	beq	.L1040
 	add	w3, w1, 1
 	ubfiz	x1, x1, 1, 16
 	strh	w2, [x21,x1]
 	uxth	w1, w3
-.L1030:
+.L1040:
 	cmp	w1, w0
-	bcs	.L1031
+	bcs	.L1041
 	add	w2, w2, 1
 	uxth	w2, w2
-	b	.L1029
-.L1028:
+	b	.L1039
+.L1038:
 	ubfiz	x1, x1, 1, 16
 	mov	w0, -1
 	ldp	x19, x20, [sp,16]
@@ -6540,9 +6612,9 @@ FlashProgSlc2KPages:
 	mov	w25, 0
 	add	x22, x22, :lo12:.LANCHOR0
 	mov	w28, -1
-.L1037:
+.L1047:
 	cmp	w25, w23
-	beq	.L1066
+	beq	.L1076
 	mov	w1, w24
 	sub	w4, w23, w25
 	mov	x0, x21
@@ -6552,10 +6624,10 @@ FlashProgSlc2KPages:
 	ldr	w0, [x29,100]
 	ldrb	w1, [x22,1676]
 	cmp	w0, w1
-	bcc	.L1038
+	bcc	.L1048
 	str	w28, [x21]
-	b	.L1039
-.L1038:
+	b	.L1049
+.L1048:
 	add	x0, x22, x0, uxtw
 	ldrb	w20, [x0,1680]
 	mov	w0, w20
@@ -6610,36 +6682,36 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29,96]
 	mov	w0, w20
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1042
+	tbz	x0, 0, .L1052
 	str	w28, [x21]
-.L1042:
+.L1052:
 	mov	w0, w20
 	bl	NandcFlashDeCs
-.L1039:
+.L1049:
 	add	w25, w25, 1
 	add	x21, x21, 56
-	b	.L1037
-.L1066:
+	b	.L1047
+.L1076:
 	mov	w21, 0
-	cbz	w27, .L1064
+	cbz	w27, .L1074
 	adrp	x25, .LC23
 	adrp	x26, .LC22
 	adrp	x27, .LC21
 	add	x25, x25, :lo12:.LC23
 	add	x26, x26, :lo12:.LC22
 	add	x27, x27, :lo12:.LC21
-.L1065:
+.L1075:
 	cmp	w21, w23
-	beq	.L1064
+	beq	.L1074
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1045
+	bne	.L1055
 	adrp	x0, .LC20
 	ldr	w1, [x19,4]
 	add	x0, x0, :lo12:.LC20
 	bl	printk
-	b	.L1046
-.L1045:
+	b	.L1056
+.L1055:
 	adrp	x20, .LANCHOR2
 	sub	w4, w23, w21
 	add	x22, x20, :lo12:.LANCHOR2
@@ -6666,44 +6738,44 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w22, [x29,104]
 	cmn	w22, #1
-	bne	.L1047
+	bne	.L1057
 	ldr	w1, [x19,4]
 	mov	x0, x27
 	bl	printk
 	str	w22, [x19]
-.L1047:
+.L1057:
 	ldr	x0, [x19,16]
-	cbz	x0, .L1048
+	cbz	x0, .L1058
 	ldr	w2, [x0]
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x0, [x0,712]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1048
+	beq	.L1058
 	ldr	w1, [x19,4]
 	mov	x0, x26
 	bl	printk
 	mov	w0, -1
 	str	w0, [x19]
-.L1048:
+.L1058:
 	ldr	x0, [x19,8]
-	cbz	x0, .L1046
+	cbz	x0, .L1056
 	add	x20, x20, :lo12:.LANCHOR2
 	ldr	w2, [x0]
 	ldr	x0, [x20,704]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1046
+	beq	.L1056
 	ldr	w1, [x19,4]
 	mov	x0, x25
 	bl	printk
 	mov	w0, -1
 	str	w0, [x19]
-.L1046:
+.L1056:
 	add	w21, w21, 1
 	add	x19, x19, 56
-	b	.L1065
-.L1064:
+	b	.L1075
+.L1074:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -6736,18 +6808,18 @@ FlashProgPages:
 	ldrb	w4, [x4,24]
 	ldrb	w27, [x6,#:lo12:.LANCHOR1+265]
 	ldrb	w5, [x5,19]
-	cbz	w4, .L1068
+	cbz	w4, .L1078
 	bl	FlashProgSlc2KPages
-	b	.L1069
-.L1068:
+	b	.L1079
+.L1078:
 	sub	w0, w5, #1
 	adrp	x28, .LANCHOR2
 	str	w0, [x29,120]
 	add	x0, x28, :lo12:.LANCHOR2
 	str	x0, [x29,112]
-.L1120:
+.L1130:
 	cmp	w22, w25
-	bcs	.L1121
+	bcs	.L1131
 	mov	w20, 56
 	mov	w1, w23
 	add	x2, x29, 128
@@ -6762,11 +6834,11 @@ FlashProgPages:
 	ldr	w0, [x29,132]
 	ldrb	w2, [x1,1676]
 	cmp	w0, w2
-	bcc	.L1070
+	bcc	.L1080
 	mov	w0, -1
 	str	w0, [x19,x20]
-	b	.L1071
-.L1070:
+	b	.L1081
+.L1080:
 	add	x3, x28, :lo12:.LANCHOR2
 	uxtw	x0, w0
 	ldrb	w3, [x3,648]
@@ -6775,15 +6847,15 @@ FlashProgPages:
 	csel	w24, w24, wzr, ne
 	madd	x0, x0, x3, x1
 	ldr	x0, [x0,1728]
-	cbz	x0, .L1073
+	cbz	x0, .L1083
 	cmp	w2, 1
-	bne	.L1074
+	bne	.L1084
 	ldr	x0, [x1,3976]
 	bl	NandcIqrWaitFlashReady
-.L1074:
+.L1084:
 	ldrb	w0, [x29,132]
 	bl	FlashWaitCmdDone
-.L1073:
+.L1083:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w2, [x29,132]
 	mov	x1, 24
@@ -6793,13 +6865,13 @@ FlashProgPages:
 	str	x26, [x0,8]
 	str	xzr, [x0,16]
 	str	w1, [x0,4]
-	cbz	w24, .L1075
+	cbz	w24, .L1085
 	add	w1, w22, 1
 	mov	w3, 56
 	umull	x1, w1, w3
 	add	x1, x19, x1
 	str	x1, [x0,16]
-.L1075:
+.L1085:
 	add	x1, x21, :lo12:.LANCHOR0
 	add	x0, x1, x2
 	ldrb	w20, [x0,1680]
@@ -6808,11 +6880,11 @@ FlashProgPages:
 	ldrb	w0, [x1,1676]
 	strb	w20, [x2,1720]
 	cmp	w0, 1
-	bne	.L1076
+	bne	.L1086
 	mov	w0, w20
 	bl	NandcWaitFlashReady
-	b	.L1077
-.L1076:
+	b	.L1087
+.L1086:
 	mov	w0, w20
 	str	x1, [x29,104]
 	bl	NandcFlashCs
@@ -6827,35 +6899,35 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-.L1077:
+.L1087:
 	ldr	w0, [x29,120]
 	cmp	w0, 6
-	bhi	.L1078
+	bhi	.L1088
 	ldr	x0, [x29,112]
 	add	x0, x0, x20, sxtw
 	ldrb	w0, [x0,560]
-	cbz	w0, .L1078
+	cbz	w0, .L1088
 	add	x2, x21, :lo12:.LANCHOR0
 	mov	w0, w20
 	add	x2, x2, 4060
 	mov	w3, 0
 	ldrb	w1, [x2,-3]
 	bl	HynixSetRRPara
-.L1078:
+.L1088:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w23, 1
-	bne	.L1079
+	bne	.L1089
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L1079
+	cbz	w0, .L1089
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	b	.L1080
-.L1079:
+	b	.L1090
+.L1089:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L1080:
+.L1090:
 	ldr	w1, [x29,128]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -6865,7 +6937,7 @@ FlashProgPages:
 	mov	w1, 1
 	mov	w2, w27
 	bl	NandcXferData
-	cbz	w24, .L1081
+	cbz	w24, .L1091
 	ldr	w1, [x29,128]
 	mov	w0, w20
 	add	x26, x21, :lo12:.LANCHOR0
@@ -6893,45 +6965,45 @@ FlashProgPages:
 	ldr	x3, [x4,8]
 	ldr	x4, [x4,16]
 	bl	NandcXferData
-.L1081:
+.L1091:
 	ldr	w1, [x29,128]
 	mov	w0, w20
 	add	w22, w22, w24
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-.L1071:
+.L1081:
 	add	w22, w22, 1
-	b	.L1120
-.L1121:
+	b	.L1130
+.L1131:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	x20, 0
 	mov	x22, 24
 	ldr	x0, [x21,3976]
 	bl	NandcIqrWaitFlashReady
-.L1083:
+.L1093:
 	ldrb	w0, [x21,1676]
 	cmp	w0, w20
-	bls	.L1122
+	bls	.L1132
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w23, 1
-	bne	.L1084
+	bne	.L1094
 	ldrb	w0, [x21,136]
-	cbz	w0, .L1084
+	cbz	w0, .L1094
 	madd	x0, x20, x22, x21
 	ldrb	w0, [x0,1720]
 	bl	flash_exit_slc_mode
-.L1084:
+.L1094:
 	add	x20, x20, 1
-	b	.L1083
-.L1122:
+	b	.L1093
+.L1132:
 	ldr	w0, [x29,124]
-	cbnz	w0, .L1086
-.L1094:
+	cbnz	w0, .L1096
+.L1104:
 	mov	w0, 0
-	b	.L1069
-.L1086:
+	b	.L1079
+.L1096:
 	adrp	x24, .LC23
 	adrp	x26, .LC22
 	adrp	x27, .LC21
@@ -6939,18 +7011,18 @@ FlashProgPages:
 	add	x24, x24, :lo12:.LC23
 	add	x26, x26, :lo12:.LC22
 	add	x27, x27, :lo12:.LC21
-.L1087:
+.L1097:
 	cmp	w21, w25
-	beq	.L1094
+	beq	.L1104
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1088
+	bne	.L1098
 	adrp	x0, .LC20
 	ldr	w1, [x19,4]
 	add	x0, x0, :lo12:.LC20
 	bl	printk
-	b	.L1089
-.L1088:
+	b	.L1099
+.L1098:
 	adrp	x20, .LANCHOR2
 	sub	w4, w25, w21
 	add	x22, x20, :lo12:.LANCHOR2
@@ -6977,44 +7049,44 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w22, [x29,136]
 	cmn	w22, #1
-	bne	.L1090
+	bne	.L1100
 	ldr	w1, [x19,4]
 	mov	x0, x27
 	bl	printk
 	str	w22, [x19]
-.L1090:
+.L1100:
 	ldr	x0, [x19,16]
-	cbz	x0, .L1091
+	cbz	x0, .L1101
 	ldr	w2, [x0]
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x0, [x0,712]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1091
+	beq	.L1101
 	ldr	w1, [x19,4]
 	mov	x0, x26
 	bl	printk
 	mov	w0, -1
 	str	w0, [x19]
-.L1091:
+.L1101:
 	ldr	x0, [x19,8]
-	cbz	x0, .L1089
+	cbz	x0, .L1099
 	add	x20, x20, :lo12:.LANCHOR2
 	ldr	w2, [x0]
 	ldr	x0, [x20,704]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1089
+	beq	.L1099
 	ldr	w1, [x19,4]
 	mov	x0, x24
 	bl	printk
 	mov	w0, -1
 	str	w0, [x19]
-.L1089:
+.L1099:
 	add	w21, w21, 1
 	add	x19, x19, 56
-	b	.L1087
-.L1069:
+	b	.L1097
+.L1079:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -7077,10 +7149,10 @@ FlashTestBlk:
 	ldr	w2, [x0,#:lo12:.LANCHOR0+8]
 	mov	w0, 0
 	cmp	w1, w2
-	bcc	.L1125
+	bcc	.L1135
 	mov	w0, w1
 	bl	FlashTestBlk.part.7
-.L1125:
+.L1135:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -7137,17 +7209,17 @@ FlashMakeFactorBbt:
 	sub	w0, w22, #1
 	uxth	w0, w0
 	str	w0, [x29,132]
-.L1129:
+.L1139:
 	add	x23, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x23,1676]
 	cmp	w0, w20
-	bls	.L1180
+	bls	.L1190
 	ldr	x0, [x29,136]
 	sxtw	x24, w20
 	add	x0, x0, :lo12:.LANCHOR2
 	add	x0, x0, 728
 	ldrh	w21, [x0,w20,sxtw 1]
-	cbnz	w21, .L1159
+	cbnz	w21, .L1169
 	ldrh	w2, [x23,4036]
 	mov	w1, w21
 	ldr	x0, [x19,#:lo12:.LANCHOR0]
@@ -7161,15 +7233,15 @@ FlashMakeFactorBbt:
 	and	w0, w0, 4
 	uxtb	w0, w0
 	str	w0, [x29,128]
-.L1131:
+.L1141:
 	uxth	w28, w26
 	cmp	w28, w22
-	bcs	.L1141
+	bcs	.L1151
 	mov	w0, -1
 	strb	w0, [x29,166]
 	strb	w0, [x29,167]
 	ldr	w0, [x29,124]
-	cbz	w0, .L1133
+	cbz	w0, .L1143
 	add	x4, x19, :lo12:.LANCHOR0
 	add	x2, x29, 166
 	add	x0, x4, 1688
@@ -7184,7 +7256,7 @@ FlashMakeFactorBbt:
 	ldr	x3, [x29,112]
 	ldrb	w0, [x4,24]
 	cmp	w0, 1
-	bne	.L1133
+	bne	.L1143
 	ldr	w1, [x4,28]
 	mov	w0, w27
 	add	x2, x29, 167
@@ -7194,9 +7266,9 @@ FlashMakeFactorBbt:
 	ldrb	w1, [x29,167]
 	and	w0, w1, w0
 	strb	w0, [x29,166]
-.L1133:
+.L1143:
 	ldr	w0, [x29,120]
-	cbz	w0, .L1135
+	cbz	w0, .L1145
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x2, x29, 167
 	add	x0, x0, 1688
@@ -7208,40 +7280,40 @@ FlashMakeFactorBbt:
 	mov	w0, w27
 	add	w1, w1, w21
 	bl	FlashReadSpare
-.L1135:
+.L1145:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x29,166]
 	ldr	x0, [x0,1912]
 	ldrb	w0, [x0,7]
 	cmp	w0, 8
-	beq	.L1160
+	beq	.L1170
 	cmp	w0, 1
-	bne	.L1136
-.L1160:
+	bne	.L1146
+.L1170:
 	mov	w0, 1
-	cbz	w1, .L1138
+	cbz	w1, .L1148
 	ldrb	w0, [x29,167]
 	cmp	w0, wzr
 	cset	w0, eq
-	b	.L1138
-.L1136:
+	b	.L1148
+.L1146:
 	cmp	w1, 255
 	mov	w0, 1
-	bne	.L1138
+	bne	.L1148
 	ldrb	w0, [x29,167]
 	cmp	w0, 255
 	cset	w0, ne
-.L1138:
+.L1148:
 	ldr	w1, [x29,128]
-	cbz	w1, .L1139
+	cbz	w1, .L1149
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 1688
 	ldr	w1, [x0,x24,lsl 2]
 	mov	w0, w27
 	add	w1, w21, w1
 	bl	SandiskProgTestBadBlock
-.L1139:
-	cbz	w0, .L1140
+.L1149:
+	cbz	w0, .L1150
 	adrp	x0, .LC25
 	mov	w1, w20
 	mov	w2, w26
@@ -7262,12 +7334,12 @@ FlashMakeFactorBbt:
 	ldrb	w0, [x2,1676]
 	mul	w0, w1, w0
 	cmp	w23, w0
-	bgt	.L1141
-.L1140:
+	bgt	.L1151
+.L1150:
 	add	w26, w26, 1
 	add	w21, w21, w25
-	b	.L1131
-.L1141:
+	b	.L1141
+.L1151:
 	adrp	x0, .LC26
 	mov	w1, w20
 	mov	w2, w23
@@ -7278,28 +7350,28 @@ FlashMakeFactorBbt:
 	ldrb	w0, [x1,1676]
 	mul	w0, w2, w0
 	cmp	w23, w0
-	blt	.L1143
+	blt	.L1153
 	ldrh	w2, [x1,4036]
 	mov	w1, 0
 	ldr	x0, [x19,#:lo12:.LANCHOR0]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1143:
-	cbnz	w20, .L1145
+.L1153:
+	cbnz	w20, .L1155
 	add	x0, x19, :lo12:.LANCHOR0
 	adrp	x26, .LC27
 	mov	w21, w20
 	add	x26, x26, :lo12:.LC27
 	mov	w23, 1
 	ldrh	w27, [x0,8]
-.L1146:
+.L1156:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,25]
 	cmp	w0, w27
-	bls	.L1181
+	bls	.L1191
 	mov	w0, w27
 	bl	FlashTestBlk
-	cbz	w0, .L1147
+	cbz	w0, .L1157
 	mov	w1, w27
 	mov	x0, x26
 	add	w21, w21, 1
@@ -7312,22 +7384,22 @@ FlashMakeFactorBbt:
 	ldr	w3, [x2,x1]
 	orr	w0, w3, w0
 	str	w0, [x2,x1]
-.L1147:
+.L1157:
 	add	w27, w27, 1
 	uxth	w27, w27
-	b	.L1146
-.L1181:
+	b	.L1156
+.L1191:
 	adrp	x26, .LC27
 	ldr	w28, [x29,132]
 	sub	w27, w22, #50
 	add	x26, x26, :lo12:.LC27
 	mov	w23, 1
-.L1149:
+.L1159:
 	cmp	w28, w27
-	ble	.L1182
+	ble	.L1192
 	mov	w0, w28
 	bl	FlashTestBlk
-	cbz	w0, .L1150
+	cbz	w0, .L1160
 	mov	w1, w28
 	mov	x0, x26
 	bl	printk
@@ -7338,23 +7410,23 @@ FlashMakeFactorBbt:
 	ldr	w3, [x2,x1]
 	orr	w0, w3, w0
 	str	w0, [x2,x1]
-.L1150:
+.L1160:
 	sub	w28, w28, #1
 	uxth	w28, w28
-	b	.L1149
-.L1182:
+	b	.L1159
+.L1192:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x0,25]
 	ldr	w2, [x0,8]
 	sub	w1, w1, w2
 	cmp	w21, w1
-	bcc	.L1145
+	bcc	.L1155
 	ldrh	w2, [x0,4036]
 	mov	w1, 0
 	ldr	x0, [x19,#:lo12:.LANCHOR0]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1145:
+.L1155:
 	ldr	x0, [x29,136]
 	adrp	x23, .LC28
 	ldr	w27, [x29,132]
@@ -7362,22 +7434,22 @@ FlashMakeFactorBbt:
 	mul	w26, w20, w22
 	add	x28, x0, :lo12:.LANCHOR2
 	mov	w21, -3872
-.L1153:
+.L1163:
 	mov	w2, w27
 	mov	x0, x23
 	mov	w1, w20
 	bl	printk
 	ldr	x2, [x19,#:lo12:.LANCHOR0]
-.L1154:
+.L1164:
 	ubfx	x0, x27, 5, 11
 	ldr	w0, [x2,x0,lsl 2]
 	lsr	w0, w0, w27
 	and	w1, w0, 1
-	tbz	x0, 0, .L1183
+	tbz	x0, 0, .L1193
 	sub	w27, w27, #1
 	uxth	w27, w27
-	b	.L1154
-.L1183:
+	b	.L1164
+.L1193:
 	add	x0, x28, 728
 	strh	w27, [x0,x24,lsl 1]
 	ldr	x0, [x29,152]
@@ -7401,15 +7473,15 @@ FlashMakeFactorBbt:
 	mov	w3, w1
 	bl	FlashProgPages
 	ldr	w0, [x29,168]
-	cbz	w0, .L1159
+	cbz	w0, .L1169
 	sub	w27, w27, #1
 	uxth	w27, w27
-	b	.L1153
-.L1159:
+	b	.L1163
+.L1169:
 	add	w20, w20, 1
 	uxtb	w20, w20
-	b	.L1129
-.L1180:
+	b	.L1139
+.L1190:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -7424,14 +7496,14 @@ FlashMakeFactorBbt:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L1185:
+.L1195:
 	cmp	w2, w0
-	bhi	.L1187
+	bhi	.L1197
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	uxth	w1, w1
-	b	.L1185
-.L1187:
+	b	.L1195
+.L1197:
 	sub	w0, w1, #1
 	ret
 	.size	Ftl_log2, .-Ftl_log2
@@ -7487,30 +7559,30 @@ FtlConstantsInit:
 	strh	w2, [x0,770]
 	strh	w1, [x0,772]
 	strh	w4, [x0,758]
-.L1192:
+.L1202:
 	add	x5, x0, 776
 	strb	w3, [x3,x5]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L1192
+	bne	.L1202
 	ldrh	w3, [x24,20]
 	ldrb	w0, [x24,15]
 	cmp	w3, w0
-	bcs	.L1193
+	bcs	.L1203
 	uxtb	w8, w1
 	mov	w3, 0
 	mul	w11, w1, w2
 	ubfiz	w10, w8, 1, 7
 	add	x12, x19, :lo12:.LANCHOR2
-.L1194:
+.L1204:
 	cmp	w3, w1
-	bcs	.L1196
+	bcs	.L1206
 	uxtb	w0, w3
 	mov	w5, w3
 	mov	w7, 0
-.L1197:
+.L1207:
 	cmp	w7, w2
-	bcs	.L1219
+	bcs	.L1229
 	add	x9, x12, 776
 	add	w13, w5, w11
 	add	w14, w0, w8
@@ -7520,35 +7592,35 @@ FtlConstantsInit:
 	strb	w14, [x9,x13]
 	add	w5, w5, w1
 	uxtb	w0, w0
-	b	.L1197
-.L1219:
+	b	.L1207
+.L1229:
 	add	w3, w3, 1
-	b	.L1194
-.L1196:
+	b	.L1204
+.L1206:
 	add	x0, x19, :lo12:.LANCHOR2
 	lsl	w2, w2, 1
 	lsr	w4, w4, 1
 	strh	w2, [x0,770]
 	strh	w4, [x0,758]
-.L1193:
+.L1203:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w2, 5
 	cmp	w6, 1
 	strh	w2, [x0,808]
 	strh	wzr, [x0,810]
-	bne	.L1198
+	bne	.L1208
 	strh	w6, [x0,808]
-.L1198:
+.L1208:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w2, 4352
 	adrp	x22, .LANCHOR0
 	strh	w2, [x0,812]
 	add	x2, x22, :lo12:.LANCHOR0
 	ldrb	w27, [x2,24]
-	cbz	w27, .L1199
+	cbz	w27, .L1209
 	mov	w2, 384
 	strh	w2, [x0,812]
-.L1199:
+.L1209:
 	add	x21, x19, :lo12:.LANCHOR2
 	ldrh	w20, [x21,758]
 	ldrh	w23, [x21,770]
@@ -7582,10 +7654,10 @@ FtlConstantsInit:
 	mul	w0, w23, w20
 	strh	w2, [x21,830]
 	str	w0, [x21,764]
-	bls	.L1200
+	bls	.L1210
 	and	w0, w20, 255
 	strh	w0, [x21,810]
-.L1200:
+.L1210:
 	add	x2, x19, :lo12:.LANCHOR2
 	mul	w0, w25, w28
 	ldrh	w1, [x2,810]
@@ -7600,15 +7672,15 @@ FtlConstantsInit:
 	sdiv	w0, w1, w0
 	uxth	w0, w0
 	cmp	w0, 4
-	bhi	.L1216
+	bhi	.L1226
 	mov	w0, 4
-.L1216:
+.L1226:
 	strh	w0, [x2,840]
-	cbz	w27, .L1203
+	cbz	w27, .L1213
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w1, 640
 	strh	w1, [x0,812]
-.L1203:
+.L1213:
 	add	x1, x19, :lo12:.LANCHOR2
 	lsl	w20, w20, 6
 	cmp	w23, 1
@@ -7626,9 +7698,9 @@ FtlConstantsInit:
 	ldrh	w0, [x1,840]
 	udiv	w0, w0, w23
 	add	w20, w20, w0
-	bne	.L1217
+	bne	.L1227
 	add	w20, w20, 4
-.L1217:
+.L1227:
 	str	w20, [x1,744]
 	add	x20, x19, :lo12:.LANCHOR2
 	add	x22, x22, :lo12:.LANCHOR0
@@ -7658,18 +7730,18 @@ FtlConstantsInit:
 	ldr	w1, [x20,848]
 	add	w4, w1, 3
 	str	w4, [x20,848]
-	cbz	w5, .L1206
+	cbz	w5, .L1216
 	add	w2, w2, 4
 	add	w1, w1, 5
 	strh	w2, [x20,840]
-	b	.L1218
-.L1206:
+	b	.L1228
+.L1216:
 	cmp	w4, 7
-	bhi	.L1207
+	bhi	.L1217
 	mov	w1, 8
-.L1218:
+.L1228:
 	str	w1, [x20,848]
-.L1207:
+.L1217:
 	add	x19, x19, :lo12:.LANCHOR2
 	ldrh	w1, [x19,756]
 	strh	wzr, [x19,860]
@@ -7678,10 +7750,10 @@ FtlConstantsInit:
 	add	w1, w1, 52
 	add	w0, w1, w0, lsl 2
 	cmp	w0, w3, lsl 9
-	bcs	.L1208
+	bcs	.L1218
 	mov	w0, 1
 	strh	w0, [x19,860]
-.L1208:
+.L1218:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -7743,9 +7815,9 @@ FtlMemInit:
 	strh	wzr, [x0,962]
 	str	w2, [x0,964]
 	cmp	w2, w1
-	bls	.L1221
+	bls	.L1231
 	str	w1, [x0,964]
-.L1221:
+.L1231:
 	add	x19, x20, :lo12:.LANCHOR2
 	mov	w22, 56
 	ldrh	w0, [x19,822]
@@ -7929,106 +8001,106 @@ FtlMemInit:
 	ldrh	w5, [x19,770]
 	mov	w0, 1
 	mov	w2, w4
-.L1222:
+.L1232:
 	cmp	w0, w5
 	add	x1, x1, 8
-	bcs	.L1322
+	bcs	.L1332
 	ldr	x3, [x19,1328]
 	add	w0, w0, 1
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x1,32]
-	b	.L1222
-.L1322:
+	b	.L1232
+.L1332:
 	add	x1, x20, :lo12:.LANCHOR2
-.L1224:
+.L1234:
 	cmp	w0, 8
-	beq	.L1323
+	beq	.L1333
 	add	x2, x1, x0, uxtw 3
 	add	w0, w0, 1
 	str	xzr, [x2,1328]
-	b	.L1224
-.L1323:
+	b	.L1234
+.L1333:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x1, [x0,1192]
-	cbnz	x1, .L1226
-.L1228:
+	cbnz	x1, .L1236
+.L1238:
 	adrp	x0, .LC29
 	adrp	x1, .LANCHOR3
 	add	x0, x0, :lo12:.LC29
 	add	x1, x1, :lo12:.LANCHOR3
 	bl	printk
 	mov	w0, -1
-	b	.L1227
-.L1226:
+	b	.L1237
+.L1236:
 	ldr	x1, [x0,1200]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1240]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1256]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1264]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1272]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1280]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1328]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x0, [x0,1184]
-	cbz	x0, .L1228
+	cbz	x0, .L1238
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x1, [x0,976]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,984]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,992]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1008]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1016]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1024]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1000]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1048]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1056]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x0, [x0,1064]
-	cbz	x0, .L1228
+	cbz	x0, .L1238
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x1, [x0,1072]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1088]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1096]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1104]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1112]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1120]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1128]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1168]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1152]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x0, [x0,1208]
-	cbz	x0, .L1228
+	cbz	x0, .L1238
 	adrp	x0, .LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	x1, [x0,1216]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x1, [x0,1224]
-	cbz	x1, .L1228
+	cbz	x1, .L1238
 	ldr	x0, [x0,1232]
-	cbz	x0, .L1228
+	cbz	x0, .L1238
 	mov	w0, 0
-.L1227:
+.L1237:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -8044,23 +8116,23 @@ IsBlkInVendorPart:
 	add	x1, x1, :lo12:.LANCHOR2
 	mov	w0, 0
 	ldrh	w2, [x1,1392]
-	cbz	w2, .L1325
+	cbz	w2, .L1335
 	ldrh	w2, [x1,840]
 	ldr	x3, [x1,1208]
 	mov	x1, 0
-.L1326:
+.L1336:
 	cmp	w2, w1, uxth
-	bls	.L1331
+	bls	.L1341
 	add	x1, x1, 1
 	add	x0, x3, x1, lsl 1
 	ldrh	w0, [x0,-2]
 	cmp	w0, w4
-	bne	.L1326
+	bne	.L1336
 	mov	w0, 1
-	b	.L1325
-.L1331:
+	b	.L1335
+.L1341:
 	mov	w0, 0
-.L1325:
+.L1335:
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	2
@@ -8072,25 +8144,25 @@ FtlCacheMetchLpa:
 	add	x2, x2, :lo12:.LANCHOR2
 	mov	w0, 0
 	ldr	w3, [x2,968]
-	cbz	w3, .L1333
+	cbz	w3, .L1343
 	ldr	x5, [x2,1032]
 	mov	x0, 56
 	mov	x2, 0
-.L1334:
+.L1344:
 	cmp	w3, w2
-	bls	.L1343
+	bls	.L1353
 	madd	x4, x2, x0, x5
 	add	x2, x2, 1
 	ldr	w4, [x4,24]
 	cmp	w4, w6
-	bcc	.L1334
+	bcc	.L1344
 	cmp	w4, w1
-	bhi	.L1334
+	bhi	.L1344
 	mov	w0, 1
-	b	.L1333
-.L1343:
+	b	.L1343
+.L1353:
 	mov	w0, 0
-.L1333:
+.L1343:
 	ret
 	.size	FtlCacheMetchLpa, .-FtlCacheMetchLpa
 	.align	2
@@ -8195,10 +8267,10 @@ FtlBbt2Bitmap:
 	mov	x3, 0
 	mov	w0, 65535
 	mov	w5, 1
-.L1352:
+.L1362:
 	ldrh	w2, [x20,x3]
 	cmp	w2, w0
-	beq	.L1350
+	beq	.L1360
 	ubfx	x4, x2, 5, 11
 	add	x3, x3, 2
 	lsl	x4, x4, 2
@@ -8207,8 +8279,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x19,x4]
 	orr	w2, w1, w2
 	str	w2, [x19,x4]
-	bne	.L1352
-.L1350:
+	bne	.L1362
+.L1360:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8226,7 +8298,7 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp,48]
 	ldr	w1, [x19,1400]
 	stp	x25, x26, [sp,64]
-	cbnz	w1, .L1357
+	cbnz	w1, .L1367
 	ldr	x0, [x19,1048]
 	mov	x22, 0
 	ldr	x3, [x19,1112]
@@ -8235,13 +8307,13 @@ FtlBbmTblFlush:
 	str	x0, [x19,1416]
 	str	x3, [x19,1424]
 	bl	ftl_memset
-.L1358:
+.L1368:
 	ldrh	w1, [x19,770]
 	mov	w0, w22
 	add	x20, x19, 1408
 	add	x22, x22, 1
 	cmp	w0, w1
-	bge	.L1366
+	bge	.L1376
 	add	x1, x21, x22, lsl 3
 	ldrh	w2, [x19,1288]
 	ldr	x3, [x20,8]
@@ -8250,8 +8322,8 @@ FtlBbmTblFlush:
 	add	x0, x3, x0, sxtw 2
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	b	.L1358
-.L1366:
+	b	.L1368
+.L1376:
 	ldr	x25, [x20,16]
 	mov	w1, 255
 	mov	w2, 16
@@ -8275,7 +8347,7 @@ FtlBbmTblFlush:
 	strh	w0, [x25,10]
 	ldr	w0, [x19,744]
 	strh	w0, [x25,12]
-.L1360:
+.L1370:
 	ldr	x0, [x19,1048]
 	str	x0, [x20,8]
 	ldrh	w1, [x19,1296]
@@ -8298,7 +8370,7 @@ FtlBbmTblFlush:
 	ldrh	w0, [x19,1298]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L1361
+	blt	.L1371
 	ldr	w1, [x19,1304]
 	ldrh	w0, [x19,1296]
 	add	w1, w1, 1
@@ -8322,20 +8394,20 @@ FtlBbmTblFlush:
 	mov	w2, w1
 	mov	w3, w1
 	bl	FlashProgPages
-.L1361:
+.L1371:
 	ldrh	w1, [x19,1298]
 	ldr	w0, [x20]
 	add	w1, w1, 1
 	strh	w1, [x19,1298]
 	cmn	w0, #1
-	bne	.L1362
+	bne	.L1372
 	ldr	w1, [x20,4]
 	mov	x0, x24
 	add	w26, w26, 1
 	bl	printk
 	uxth	w26, w26
 	cmp	w26, 3
-	bls	.L1360
+	bls	.L1370
 	adrp	x0, .LC33
 	ldr	w1, [x20,4]
 	add	x0, x0, :lo12:.LC33
@@ -8343,12 +8415,12 @@ FtlBbmTblFlush:
 	bl	printk
 	mov	w0, 1
 	str	w0, [x19,1400]
-	b	.L1357
-.L1362:
-	cbnz	w23, .L1357
+	b	.L1367
+.L1372:
+	cbnz	w23, .L1367
 	mov	w23, 1
-	b	.L1360
-.L1357:
+	b	.L1370
+.L1367:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -8379,19 +8451,19 @@ FtlLoadFactoryBbt:
 	mov	w25, -1
 	str	x24, [x21,16]
 	mov	w26, 61664
-.L1368:
+.L1378:
 	ldrh	w0, [x19,770]
 	cmp	w22, w0
-	bcs	.L1377
+	bcs	.L1387
 	ldrh	w20, [x19,814]
 	strh	w25, [x23,12]
-.L1370:
+.L1380:
 	sub	w20, w20, #1
 	ldrh	w0, [x19,814]
 	uxth	w20, w20
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L1371
+	ble	.L1381
 	madd	w0, w22, w0, w20
 	mov	w1, 1
 	lsl	w0, w0, 10
@@ -8401,16 +8473,16 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1370
+	beq	.L1380
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L1370
+	bne	.L1380
 	strh	w20, [x23,12]
-.L1371:
+.L1381:
 	add	w22, w22, 1
 	add	x23, x23, 2
-	b	.L1368
-.L1377:
+	b	.L1378
+.L1387:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -8452,19 +8524,19 @@ FtlBbtCalcTotleCnt:
 	ldrh	w1, [x0,814]
 	ldrh	w21, [x0,770]
 	mul	w21, w1, w21
-.L1380:
+.L1390:
 	cmp	w20, w21
-	bge	.L1386
+	bge	.L1396
 	mov	w0, w20
 	bl	FtlBbmIsBadBlock
-	cbz	w0, .L1381
+	cbz	w0, .L1391
 	add	w19, w19, 1
 	uxth	w19, w19
-.L1381:
+.L1391:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L1380
-.L1386:
+	b	.L1390
+.L1396:
 	mov	w0, w19
 	ldr	x21, [sp,32]
 	ldp	x19, x20, [sp,16]
@@ -8486,7 +8558,7 @@ FtlMakeBbt:
 	stp	x27, x28, [sp,80]
 	mov	x21, x19
 	ldr	w22, [x20,1400]
-	cbnz	w22, .L1388
+	cbnz	w22, .L1398
 	add	x24, x20, 1296
 	mov	x19, x20
 	mov	x25, x24
@@ -8494,10 +8566,10 @@ FtlMakeBbt:
 	mov	w28, -3872
 	bl	FtlBbtMemInit
 	bl	FtlLoadFactoryBbt
-.L1389:
+.L1399:
 	ldrh	w0, [x19,770]
 	cmp	w22, w0
-	bcs	.L1407
+	bcs	.L1417
 	ldrh	w4, [x25,12]
 	mov	w1, 65535
 	ldr	x0, [x19,1048]
@@ -8505,7 +8577,7 @@ FtlMakeBbt:
 	cmp	w4, w1
 	str	x0, [x20,8]
 	str	x26, [x20,16]
-	beq	.L1390
+	beq	.L1400
 	ldrh	w0, [x19,814]
 	mov	w1, 1
 	mov	w2, w1
@@ -8520,23 +8592,23 @@ FtlMakeBbt:
 	ldr	x1, [x20,8]
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-	b	.L1391
-.L1390:
+	b	.L1401
+.L1400:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x20,8]
 	ldr	x1, [x24,32]
 	bl	FtlBbt2Bitmap
 	ldrh	w23, [x19,814]
-.L1393:
+.L1403:
 	sub	w23, w23, #1
 	uxth	w23, w23
-.L1392:
+.L1402:
 	ldrh	w0, [x19,814]
 	madd	w0, w22, w0, w23
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1393
+	beq	.L1403
 	ldr	x0, [x19,1112]
 	mov	w1, 0
 	mov	w2, 16
@@ -8567,64 +8639,64 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1391
+	bne	.L1401
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1392
-.L1391:
+	b	.L1402
+.L1401:
 	mov	w0, w27
 	add	w22, w22, 1
 	add	x24, x24, 8
 	add	x25, x25, 2
 	bl	FtlBbmMapBadBlock
-	b	.L1389
-.L1407:
+	b	.L1399
+.L1417:
 	mov	w19, 0
-.L1396:
+.L1406:
 	add	x20, x21, :lo12:.LANCHOR2
 	ldrh	w0, [x20,832]
 	cmp	w0, w19
-	bls	.L1408
+	bls	.L1418
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	uxth	w19, w19
-	b	.L1396
-.L1408:
+	b	.L1406
+.L1418:
 	ldrh	w19, [x20,1308]
 	mov	w23, 65535
 	sub	w19, w19, #1
 	uxth	w19, w19
-.L1398:
+.L1408:
 	add	x22, x20, 1296
 	ldrh	w0, [x22,12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1402
+	ble	.L1412
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1399
+	beq	.L1409
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1400
+	cbz	w0, .L1410
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-	b	.L1399
-.L1400:
+	b	.L1409
+.L1410:
 	ldrh	w0, [x20,1296]
 	cmp	w0, w23
-	bne	.L1401
+	bne	.L1411
 	strh	w19, [x20,1296]
-	b	.L1399
-.L1401:
+	b	.L1409
+.L1411:
 	strh	w19, [x22,4]
-	b	.L1402
-.L1399:
+	b	.L1412
+.L1409:
 	sub	w19, w19, #1
 	uxth	w19, w19
-	b	.L1398
-.L1402:
+	b	.L1408
+.L1412:
 	add	x19, x21, :lo12:.LANCHOR2
 	mov	w2, 2
 	ldr	x1, [x19,1016]
@@ -8653,7 +8725,7 @@ FtlMakeBbt:
 	strh	w0, [x19,1300]
 	strh	w1, [x19,1296]
 	bl	FtlBbmTblFlush
-.L1388:
+.L1398:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -8715,16 +8787,16 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L1413
+	bls	.L1423
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
-	b	.L1414
-.L1413:
+	b	.L1424
+.L1423:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
-.L1414:
+.L1424:
 	ret
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.align	2
@@ -8741,12 +8813,12 @@ FtlGetLastWrittenPage:
 	str	x25, [sp,64]
 	mov	w23, w1
 	add	x3, x3, :lo12:.LANCHOR2
-	bne	.L1416
+	bne	.L1426
 	ldrh	w19, [x3,820]
-	b	.L1417
-.L1416:
+	b	.L1427
+.L1426:
 	ldrh	w19, [x3,818]
-.L1417:
+.L1427:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	mov	w1, 1
@@ -8761,12 +8833,12 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29,144]
 	cmn	w0, #1
-	bne	.L1418
+	bne	.L1428
 	mov	w22, 0
 	mov	w25, 2
-.L1419:
+.L1429:
 	cmp	w22, w19
-	bgt	.L1418
+	bgt	.L1428
 	add	w3, w22, w19
 	mov	w1, 1
 	mov	w2, w23
@@ -8778,21 +8850,21 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	bne	.L1420
+	bne	.L1430
 	ldr	w0, [x24,4]
 	cmn	w0, #1
-	bne	.L1420
+	bne	.L1430
 	ldr	w0, [x29,88]
 	cmn	w0, #1
-	beq	.L1420
+	beq	.L1430
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1419
-.L1420:
+	b	.L1429
+.L1430:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1419
-.L1418:
+	b	.L1429
+.L1428:
 	mov	w0, w19
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -8822,11 +8894,11 @@ FtlLoadBbt:
 	ldrh	w20, [x23,814]
 	sub	w20, w20, #1
 	uxth	w20, w20
-.L1427:
+.L1437:
 	ldrh	w0, [x23,814]
 	sub	w0, w0, #48
 	cmp	w20, w0
-	ble	.L1430
+	ble	.L1440
 	lsl	w0, w20, 10
 	mov	w1, 1
 	str	w0, [x21,4]
@@ -8835,7 +8907,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1428
+	bne	.L1438
 	ldr	w0, [x21,4]
 	mov	w1, 1
 	mov	w2, w1
@@ -8843,33 +8915,33 @@ FtlLoadBbt:
 	str	w0, [x21,4]
 	mov	x0, x21
 	bl	FlashReadPages
-.L1428:
+.L1438:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1429
+	beq	.L1439
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1429
+	bne	.L1439
 	ldr	w1, [x22,4]
 	str	w1, [x23,1304]
 	strh	w20, [x23,1296]
 	ldrh	w1, [x22,8]
 	strh	w1, [x23,1300]
-	b	.L1430
-.L1429:
+	b	.L1440
+.L1439:
 	sub	w20, w20, #1
 	uxth	w20, w20
-	b	.L1427
-.L1430:
+	b	.L1437
+.L1440:
 	add	x21, x19, :lo12:.LANCHOR2
 	mov	w2, 65535
 	mov	w0, -1
 	ldrh	w1, [x21,1296]
 	cmp	w1, w2
-	beq	.L1432
+	beq	.L1442
 	ldrh	w1, [x21,1300]
 	cmp	w1, w2
-	beq	.L1434
+	beq	.L1444
 	add	x0, x21, 1408
 	lsl	w1, w1, 10
 	str	w1, [x0,4]
@@ -8878,21 +8950,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21,1408]
 	cmn	w0, #1
-	beq	.L1434
+	beq	.L1444
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1434
+	bne	.L1444
 	ldr	w0, [x22,4]
 	ldr	w1, [x21,1304]
 	cmp	w0, w1
-	bls	.L1434
+	bls	.L1444
 	str	w0, [x21,1304]
 	ldrh	w1, [x21,1300]
 	ldrh	w0, [x22,8]
 	strh	w1, [x21,1296]
 	strh	w0, [x21,1300]
-.L1434:
+.L1444:
 	add	x20, x19, :lo12:.LANCHOR2
 	mov	w1, 1
 	add	x23, x20, 1408
@@ -8902,8 +8974,8 @@ FtlLoadBbt:
 	sxth	w21, w0
 	add	w0, w0, 1
 	strh	w0, [x20,1298]
-.L1436:
-	tbnz	w21, #31, .L1441
+.L1446:
+	tbnz	w21, #31, .L1451
 	ldrh	w0, [x20,1296]
 	mov	w1, 1
 	mov	w2, w1
@@ -8915,44 +8987,44 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1437
+	beq	.L1447
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1437
-.L1441:
+	bne	.L1447
+.L1451:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x22,10]
 	mov	w2, 65535
 	strh	w0, [x1,1302]
 	ldrh	w0, [x22,12]
 	cmp	w0, w2
-	bne	.L1438
-	b	.L1439
-.L1437:
+	bne	.L1448
+	b	.L1449
+.L1447:
 	sub	w21, w21, #1
 	sxth	w21, w21
-	b	.L1436
-.L1438:
+	b	.L1446
+.L1448:
 	ldr	w2, [x1,744]
 	cmp	w0, w2
-	beq	.L1439
+	beq	.L1449
 	ldrh	w1, [x1,758]
 	lsr	w1, w1, 2
 	cmp	w0, w1
-	bcs	.L1439
+	bcs	.L1449
 	cmp	w2, w1
-	bcs	.L1439
+	bcs	.L1449
 	bl	FtlSysBlkNumInit
-.L1439:
+.L1449:
 	add	x19, x19, :lo12:.LANCHOR2
 	mov	x20, 0
 	add	x21, x19, 1296
-.L1442:
+.L1452:
 	ldrh	w0, [x19,770]
 	mov	w1, w20
 	add	x20, x20, 1
 	cmp	w1, w0
-	bcs	.L1460
+	bcs	.L1470
 	ldrh	w2, [x19,1288]
 	add	x0, x21, x20, lsl 3
 	ldr	x3, [x19,1416]
@@ -8961,10 +9033,10 @@ FtlLoadBbt:
 	lsl	w2, w2, 2
 	add	x1, x3, x1, lsl 2
 	bl	ftl_memcpy
-	b	.L1442
-.L1460:
+	b	.L1452
+.L1470:
 	mov	w0, 0
-.L1432:
+.L1442:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -9016,39 +9088,43 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
 	stp	x29, x30, [sp, -48]!
-	adrp	x2, .LANCHOR2
 	uxth	w1, w1
 	add	x29, sp, 0
+	stp	x21, x22, [sp,32]
 	stp	x19, x20, [sp,16]
+	uxth	w21, w0
+	mov	w0, 65533
+	sub	w2, w21, #1
+	cmp	w0, w2, uxth
+	bcc	.L1474
+	adrp	x2, .LANCHOR2
 	add	x20, x2, :lo12:.LANCHOR2
 	mov	x19, x2
-	stp	x21, x22, [sp,32]
-	uxth	w22, w0
 	ldrh	w0, [x20,1470]
 	cmp	w0, 1024
-	beq	.L1464
-	cbz	w1, .L1466
+	beq	.L1474
+	cbz	w1, .L1476
 	ldr	w0, [x20,1400]
-	cbnz	w0, .L1466
-	mov	w0, w22
+	cbnz	w0, .L1476
+	mov	w0, w21
 	bl	P2V_block_in_plane
-	uxth	w21, w0
+	uxth	w22, w0
 	ldr	x0, [x20,1016]
-	lsl	w1, w22, 10
+	lsl	w1, w21, 10
 	str	w1, [x0,4]
 	mov	w1, 1
 	mov	w2, w1
 	ldr	x0, [x20,1016]
 	bl	FlashEraseBlocks
-	ubfiz	x1, x21, 1, 16
+	ubfiz	x0, x22, 1, 16
 	ldr	x2, [x20,1168]
-	ldrh	w0, [x2,x1]
-	add	w0, w0, 1
-	strh	w0, [x2,x1]
+	ldrh	w1, [x2,x0]
+	add	w1, w1, 1
+	strh	w1, [x2,x0]
 	ldr	w0, [x20,912]
 	add	w0, w0, 1
 	str	w0, [x20,912]
-.L1466:
+.L1476:
 	add	x1, x19, :lo12:.LANCHOR2
 	add	x1, x1, 1464
 	ldrh	w0, [x1,6]
@@ -9058,9 +9134,9 @@ FtlFreeSysBlkQueueIn:
 	add	x0, x1, x2, sxtw 1
 	add	w2, w2, 1
 	and	w2, w2, 1023
-	strh	w22, [x0,8]
+	strh	w21, [x0,8]
 	strh	w2, [x1,4]
-.L1464:
+.L1474:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -9085,7 +9161,7 @@ FtlLowFormatEraseBlock:
 	ldr	w2, [x3,1400]
 	str	w0, [x29,120]
 	mov	w0, 0
-	cbnz	w2, .L1474
+	cbnz	w2, .L1484
 	adrp	x28, .LANCHOR0
 	str	w25, [x3,944]
 	add	x0, x28, :lo12:.LANCHOR0
@@ -9096,10 +9172,10 @@ FtlLowFormatEraseBlock:
 	mov	w23, 56
 	ldrb	w0, [x0,136]
 	str	w0, [x29,124]
-.L1475:
+.L1485:
 	ldrh	w0, [x26,748]
 	cmp	w0, w27
-	bls	.L1519
+	bls	.L1529
 	umull	x0, w27, w23
 	ldr	x1, [x26,1016]
 	str	wzr, [x1,x0]
@@ -9109,15 +9185,15 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	uxth	w22, w0
 	mov	w1, w22
-	cbz	w24, .L1476
+	cbz	w24, .L1486
 	str	x1, [x29,112]
 	bl	IsBlkInVendorPart
 	ldr	x1, [x29,112]
-	cbnz	w0, .L1477
-.L1476:
+	cbnz	w0, .L1487
+.L1486:
 	mov	w0, w1
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1478
+	cbnz	w0, .L1488
 	umull	x0, w20, w23
 	ldr	x1, [x26,1016]
 	lsl	w22, w22, 10
@@ -9135,16 +9211,16 @@ FtlLowFormatEraseBlock:
 	uxth	w20, w20
 	add	x0, x4, x0, sxtw 2
 	str	x0, [x1,16]
-	b	.L1477
-.L1478:
+	b	.L1487
+.L1488:
 	add	w19, w19, 1
 	uxth	w19, w19
-.L1477:
+.L1487:
 	add	w2, w27, 1
 	uxth	w27, w2
-	b	.L1475
-.L1519:
-	cbz	w20, .L1498
+	b	.L1485
+.L1529:
+	cbz	w20, .L1508
 	ldr	w0, [x29,124]
 	mov	w2, w20
 	strb	wzr, [x26,648]
@@ -9157,55 +9233,55 @@ FtlLowFormatEraseBlock:
 	ldrb	w0, [x29,120]
 	strb	w0, [x26,648]
 	mov	x26, 56
-.L1481:
+.L1491:
 	cmp	w20, w23, uxth
-	bls	.L1520
+	bls	.L1530
 	add	x1, x21, :lo12:.LANCHOR2
 	mul	x0, x23, x26
 	ldr	x1, [x1,1016]
 	add	x2, x1, x0
 	ldr	w0, [x1,x0]
 	cmn	w0, #1
-	bne	.L1482
+	bne	.L1492
 	ldr	w0, [x2,4]
 	add	w19, w19, 1
 	lsr	w0, w0, 10
 	uxth	w19, w19
 	bl	FtlBbmMapBadBlock
-.L1482:
+.L1492:
 	add	x23, x23, 1
-	b	.L1481
-.L1520:
-	cbnz	w24, .L1484
+	b	.L1491
+.L1530:
+	cbnz	w24, .L1494
 	mov	w0, 1
 	uxth	w22, w22
 	mov	w27, 6
 	str	w0, [x29,124]
-	b	.L1485
-.L1484:
+	b	.L1495
+.L1494:
 	add	x0, x21, :lo12:.LANCHOR2
 	add	x28, x28, :lo12:.LANCHOR0
 	ldrh	w0, [x0,820]
 	str	w0, [x29,124]
 	ldrb	w0, [x28,136]
-	cbnz	w0, .L1501
+	cbnz	w0, .L1511
 	ldr	w0, [x29,124]
 	mov	w22, 1
 	lsr	w27, w0, 2
-	b	.L1485
-.L1501:
+	b	.L1495
+.L1511:
 	mov	w22, 1
 	mov	w27, w22
-.L1485:
+.L1495:
 	mov	w23, 0
 	add	x28, x21, :lo12:.LANCHOR2
-.L1494:
+.L1504:
 	mov	w26, 0
 	mov	w20, w26
-.L1486:
+.L1496:
 	ldrh	w0, [x28,748]
 	cmp	w0, w26
-	bls	.L1521
+	bls	.L1531
 	mov	w0, 56
 	ldr	x1, [x28,1016]
 	umull	x0, w26, w0
@@ -9217,15 +9293,15 @@ FtlLowFormatEraseBlock:
 	uxth	w2, w0
 	str	w2, [x29,112]
 	mov	w1, w2
-	cbz	w24, .L1487
+	cbz	w24, .L1497
 	str	x1, [x29,104]
 	bl	IsBlkInVendorPart
 	ldr	x1, [x29,104]
-	cbnz	w0, .L1488
-.L1487:
+	cbnz	w0, .L1498
+.L1497:
 	mov	w0, w1
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1488
+	cbnz	w0, .L1498
 	mov	w0, 56
 	ldr	x1, [x28,1016]
 	ldr	w2, [x29,112]
@@ -9246,12 +9322,12 @@ FtlLowFormatEraseBlock:
 	ldr	x2, [x28,1096]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1,16]
-.L1488:
+.L1498:
 	add	w3, w26, 1
 	uxth	w26, w3
-	b	.L1486
-.L1521:
-	cbz	w20, .L1498
+	b	.L1496
+.L1531:
+	cbz	w20, .L1508
 	ldr	x0, [x28,1016]
 	mov	w1, w20
 	mov	w2, w22
@@ -9261,15 +9337,15 @@ FtlLowFormatEraseBlock:
 	ldrb	w0, [x29,120]
 	mov	x1, 0
 	strb	w0, [x28,648]
-.L1491:
+.L1501:
 	cmp	w20, w1, uxth
-	bls	.L1522
+	bls	.L1532
 	mov	x0, 56
 	ldr	x2, [x28,1016]
 	mul	x0, x1, x0
 	add	x3, x2, x0
 	ldr	w0, [x2,x0]
-	cbz	w0, .L1492
+	cbz	w0, .L1502
 	ldr	w0, [x3,4]
 	add	w19, w19, 1
 	str	x1, [x29,112]
@@ -9277,47 +9353,47 @@ FtlLowFormatEraseBlock:
 	uxth	w19, w19
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29,112]
-.L1492:
+.L1502:
 	add	x1, x1, 1
-	b	.L1491
-.L1522:
+	b	.L1501
+.L1532:
 	add	w23, w23, w27
 	ldr	w0, [x29,124]
 	uxth	w23, w23
 	cmp	w23, w0
-	bcc	.L1494
+	bcc	.L1504
 	mov	x23, 0
 	mov	x26, 56
-.L1495:
+.L1505:
 	cmp	w20, w23, uxth
-	bls	.L1523
-	cbz	w24, .L1496
+	bls	.L1533
+	cbz	w24, .L1506
 	add	x1, x21, :lo12:.LANCHOR2
 	mul	x0, x23, x26
 	ldr	x1, [x1,1016]
 	add	x2, x1, x0
 	ldr	w0, [x1,x0]
-	cbnz	w0, .L1496
+	cbnz	w0, .L1506
 	ldr	w0, [x2,4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L1496:
+.L1506:
 	add	x23, x23, 1
-	b	.L1495
-.L1523:
+	b	.L1505
+.L1533:
 	cmp	w25, 63
-	bls	.L1502
-	cbz	w24, .L1498
-.L1502:
+	bls	.L1512
+	cbz	w24, .L1508
+.L1512:
 	add	x21, x21, :lo12:.LANCHOR2
 	mov	w1, w22
 	mov	w2, w20
 	ldr	x0, [x21,1016]
 	bl	FlashEraseBlocks
-.L1498:
+.L1508:
 	mov	w0, w19
-.L1474:
+.L1484:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -9330,21 +9406,23 @@ FtlLowFormatEraseBlock:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR2
+	adrp	x1, .LANCHOR2
+	add	x0, x1, :lo12:.LANCHOR2
+	add	x0, x0, 1464
+	ldrh	w6, [x0,2084]
+	ldrh	w2, [x0,6]
+	cbz	w2, .L1534
 	mov	w5, 0
-	add	x1, x0, :lo12:.LANCHOR2
+	ldrh	w3, [x0,2]
+	ldrh	w2, [x0,4]
 	mov	w4, w5
-	add	x1, x1, 1464
-	ldrh	w6, [x1,2084]
 	and	w6, w6, 31
-	ldrh	w3, [x1,2]
-	ldrh	w2, [x1,4]
-.L1525:
+.L1536:
 	cmp	w4, w6
-	bge	.L1532
-	add	x5, x1, x3, sxtw 1
+	bge	.L1544
+	add	x5, x0, x3, sxtw 1
 	ldrh	w7, [x5,8]
-	add	x5, x1, x2, sxtw 1
+	add	x5, x0, x2, sxtw 1
 	add	w4, w4, 1
 	strh	w7, [x5,8]
 	mov	w5, 1
@@ -9353,13 +9431,13 @@ FtlFreeSysBLkSort:
 	uxth	w4, w4
 	and	w3, w3, 1023
 	and	w2, w2, 1023
-	b	.L1525
-.L1532:
-	cbz	w5, .L1524
-	add	x0, x0, :lo12:.LANCHOR2
+	b	.L1536
+.L1544:
+	cbz	w5, .L1534
+	add	x0, x1, :lo12:.LANCHOR2
 	strh	w3, [x0,1466]
 	strh	w2, [x0,1468]
-.L1524:
+.L1534:
 	ret
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.align	2
@@ -9375,18 +9453,18 @@ remove_from_free_sys_Queue:
 	add	x20, x20, :lo12:.LANCHOR2
 	add	x20, x20, 1464
 	ldrh	w3, [x20,6]
-	cbz	w3, .L1534
+	cbz	w3, .L1546
 	ldrh	w4, [x20,2]
 	mov	w19, w0
-.L1535:
+.L1547:
 	cmp	w19, w3
-	bcs	.L1540
+	bcs	.L1552
 	add	w2, w19, w4
 	ubfiz	x2, x2, 1, 10
 	add	x2, x20, x2
 	ldrh	w0, [x2,8]
 	cmp	w0, w1
-	bne	.L1536
+	bne	.L1548
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
 	bl	printk
@@ -9404,13 +9482,13 @@ remove_from_free_sys_Queue:
 	strh	w1, [x19,8]
 	strh	w0, [x20,6]
 	mov	w0, 1
-	b	.L1534
-.L1536:
+	b	.L1546
+.L1548:
 	add	w19, w19, 1
-	b	.L1535
-.L1540:
+	b	.L1547
+.L1552:
 	mov	w0, 0
-.L1534:
+.L1546:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9431,10 +9509,10 @@ FtlFreeSysBlkQueueOut:
 	add	x21, x19, 1464
 	adrp	x24, .LANCHOR0
 	add	x23, x23, :lo12:.LC36
-.L1542:
+.L1554:
 	ldrh	w1, [x21,6]
 	adrp	x22, .LANCHOR2
-	cbz	w1, .L1543
+	cbz	w1, .L1555
 	ldrh	w2, [x21,2]
 	sub	w1, w1, #1
 	add	x0, x21, x2, sxtw 1
@@ -9444,7 +9522,7 @@ FtlFreeSysBlkQueueOut:
 	and	w2, w2, 1023
 	strh	w2, [x21,2]
 	ldrh	w20, [x0,8]
-	cbnz	w1, .L1544
+	cbnz	w1, .L1556
 	mov	w0, w20
 	str	x1, [x29,88]
 	bl	P2V_block_in_plane
@@ -9455,11 +9533,11 @@ FtlFreeSysBlkQueueOut:
 	str	w2, [x0,4]
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L1545
+	cbz	w0, .L1557
 	ldr	x0, [x19,1016]
 	mov	w2, 1
 	bl	FlashEraseBlocks
-.L1545:
+.L1557:
 	add	x25, x22, :lo12:.LANCHOR2
 	mov	w1, 1
 	mov	w2, w1
@@ -9473,22 +9551,25 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x25,912]
 	add	w0, w0, 1
 	str	w0, [x25,912]
-	b	.L1544
-.L1543:
+	b	.L1556
+.L1555:
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
 	bl	printk
-.L1546:
-	b	.L1546
-.L1544:
-	cbnz	w20, .L1547
+.L1558:
+	b	.L1558
+.L1556:
+	sub	w0, w20, #1
+	mov	w1, 65533
+	cmp	w1, w0, uxth
+	bcs	.L1559
 	add	x22, x22, :lo12:.LANCHOR2
 	mov	x0, x23
 	mov	w1, w20
 	ldrh	w2, [x22,1470]
 	bl	printk
-	b	.L1542
-.L1547:
+	b	.L1554
+.L1559:
 	mov	w0, w20
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -9507,7 +9588,7 @@ insert_data_list:
 	mov	x4, x2
 	ldrh	w1, [x3,756]
 	cmp	w1, w0
-	bls	.L1553
+	bls	.L1565
 	mov	w7, 6
 	ldr	x11, [x3,1280]
 	mov	w1, -1
@@ -9516,10 +9597,10 @@ insert_data_list:
 	strh	w1, [x5,2]
 	strh	w1, [x11,x10]
 	ldr	x1, [x3,3568]
-	cbnz	x1, .L1554
+	cbnz	x1, .L1566
 	str	x5, [x3,3568]
-	b	.L1553
-.L1554:
+	b	.L1565
+.L1566:
 	ubfiz	x8, x0, 1, 16
 	ldr	x13, [x3,1184]
 	ldrh	w2, [x5,4]
@@ -9539,13 +9620,13 @@ insert_data_list:
 	add	x9, x14, x8
 	mov	w8, w7
 	uxth	w2, w2
-.L1562:
+.L1574:
 	add	w3, w3, 1
 	cmp	w0, w2
 	uxth	w3, w3
-	beq	.L1553
+	beq	.L1565
 	cmp	w3, w17
-	bhi	.L1553
+	bhi	.L1565
 	ubfiz	x15, x2, 1, 16
 	ldrh	w16, [x1,4]
 	cmp	w16, wzr
@@ -9553,47 +9634,47 @@ insert_data_list:
 	mul	w7, w7, w16
 	csinv	w7, w7, wzr, ne
 	cmp	w7, w6
-	bne	.L1558
+	bne	.L1570
 	ldrh	w15, [x14,x15]
 	ldrh	w7, [x9]
 	cmp	w15, w7
-	bcc	.L1560
-	b	.L1559
-.L1558:
-	bhi	.L1559
-.L1560:
+	bcc	.L1572
+	b	.L1571
+.L1570:
+	bhi	.L1571
+.L1572:
 	ldrh	w7, [x1]
 	cmp	w7, w18
-	bne	.L1561
+	bne	.L1573
 	strh	w2, [x5,2]
 	add	x2, x4, :lo12:.LANCHOR2
 	strh	w0, [x1]
 	str	x5, [x2,3576]
-	b	.L1553
-.L1561:
+	b	.L1565
+.L1573:
 	umull	x1, w7, w8
 	mov	w2, w7
 	add	x1, x12, x1
-	b	.L1562
-.L1559:
+	b	.L1574
+.L1571:
 	strh	w2, [x11,x10]
 	ldrh	w2, [x1,2]
 	strh	w2, [x5,2]
 	add	x2, x4, :lo12:.LANCHOR2
 	ldr	x3, [x2,3568]
 	cmp	x1, x3
-	bne	.L1563
+	bne	.L1575
 	strh	w0, [x1,2]
 	str	x5, [x2,3568]
-	b	.L1553
-.L1563:
+	b	.L1565
+.L1575:
 	ldrh	w3, [x1,2]
 	mov	w4, 6
 	ldr	x2, [x2,1280]
 	umull	x3, w3, w4
 	strh	w0, [x2,x3]
 	strh	w0, [x1,2]
-.L1553:
+.L1565:
 	mov	w0, 0
 	ret
 	.size	insert_data_list, .-insert_data_list
@@ -9619,7 +9700,7 @@ insert_free_list:
 	uxth	w0, w0
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L1568
+	beq	.L1580
 	adrp	x2, .LANCHOR2
 	mov	w6, 6
 	add	x5, x2, :lo12:.LANCHOR2
@@ -9631,10 +9712,10 @@ insert_free_list:
 	strh	w1, [x4,2]
 	strh	w1, [x9,x8]
 	ldr	x1, [x5,3592]
-	cbnz	x1, .L1569
+	cbnz	x1, .L1581
 	str	x4, [x5,3592]
-	b	.L1568
-.L1569:
+	b	.L1580
+.L1581:
 	ldr	x11, [x5,1168]
 	ubfiz	x2, x0, 1, 16
 	ldr	x10, [x5,1280]
@@ -9644,41 +9725,41 @@ insert_free_list:
 	asr	x2, x2, 1
 	madd	x2, x5, x2, x2
 	uxth	w2, w2
-.L1572:
+.L1584:
 	ubfiz	x5, x2, 1, 16
 	ldrh	w5, [x11,x5]
 	cmp	w5, w12
-	bcs	.L1570
+	bcs	.L1582
 	ldrh	w5, [x1]
 	cmp	w5, w7
-	bne	.L1571
+	bne	.L1583
 	strh	w2, [x4,2]
 	strh	w0, [x1]
-	b	.L1568
-.L1571:
+	b	.L1580
+.L1583:
 	umull	x1, w5, w6
 	mov	w2, w5
 	add	x1, x10, x1
-	b	.L1572
-.L1570:
+	b	.L1584
+.L1582:
 	ldrh	w5, [x1,2]
 	strh	w5, [x4,2]
 	strh	w2, [x9,x8]
 	add	x2, x3, :lo12:.LANCHOR2
 	ldr	x3, [x2,3592]
 	cmp	x1, x3
-	bne	.L1573
+	bne	.L1585
 	strh	w0, [x1,2]
 	str	x4, [x2,3592]
-	b	.L1568
-.L1573:
+	b	.L1580
+.L1585:
 	ldrh	w3, [x1,2]
 	mov	w4, 6
 	ldr	x2, [x2,1280]
 	umull	x3, w3, w4
 	strh	w0, [x2,x3]
 	strh	w0, [x1,2]
-.L1568:
+.L1580:
 	mov	w0, 0
 	ret
 	.size	insert_free_list, .-insert_free_list
@@ -9711,31 +9792,31 @@ List_remove_node:
 	ldr	x2, [x6,1280]
 	add	x4, x2, x1
 	cmp	x4, x3
-	bne	.L1576
+	bne	.L1588
 	ldrh	w3, [x2,x1]
 	cmp	w3, w7
-	bne	.L1577
+	bne	.L1589
 	str	xzr, [x0]
-	b	.L1578
-.L1577:
+	b	.L1590
+.L1589:
 	umull	x3, w3, w5
 	add	x3, x2, x3
 	str	x3, [x0]
 	mov	w0, -1
 	strh	w0, [x3,2]
-	b	.L1578
-.L1576:
+	b	.L1590
+.L1588:
 	ldrh	w0, [x2,x1]
 	ldrh	w3, [x4,2]
 	cmp	w0, w7
-	bne	.L1579
+	bne	.L1591
 	cmp	w3, w0
-	beq	.L1578
+	beq	.L1590
 	umull	x3, w3, w5
 	mov	w0, -1
 	strh	w0, [x2,x3]
-	b	.L1578
-.L1579:
+	b	.L1590
+.L1591:
 	umull	x0, w0, w5
 	add	x0, x2, x0
 	strh	w3, [x0,2]
@@ -9744,7 +9825,7 @@ List_remove_node:
 	ldrh	w7, [x2,x1]
 	umull	x3, w3, w5
 	strh	w7, [x0,x3]
-.L1578:
+.L1590:
 	mov	w0, -1
 	strh	w0, [x2,x1]
 	strh	w0, [x4,2]
@@ -9761,14 +9842,14 @@ List_pop_index_node:
 	str	x19, [sp,16]
 	mov	w19, 65535
 	ldr	x2, [x0]
-	cbz	x2, .L1581
+	cbz	x2, .L1593
 	adrp	x3, .LANCHOR2+1280
 	mov	w5, w19
 	mov	w6, 6
 	ldr	x4, [x3,#:lo12:.LANCHOR2+1280]
-.L1582:
-	cbnz	w1, .L1583
-.L1585:
+.L1594:
+	cbnz	w1, .L1595
+.L1597:
 	sub	x2, x2, x4
 	mov	x1, -6148914691236517206
 	asr	x2, x2, 1
@@ -9776,17 +9857,17 @@ List_pop_index_node:
 	uxth	w19, w2
 	mov	w1, w19
 	bl	List_remove_node
-	b	.L1581
-.L1583:
+	b	.L1593
+.L1595:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L1585
+	beq	.L1597
 	umull	x3, w3, w6
 	sub	w1, w1, #1
 	add	x2, x4, x3
 	uxth	w1, w1
-	b	.L1582
-.L1581:
+	b	.L1594
+.L1593:
 	mov	w0, w19
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -9801,26 +9882,26 @@ List_get_gc_head_node:
 	add	x2, x2, :lo12:.LANCHOR2
 	mov	w0, 65535
 	ldr	x1, [x2,3568]
-	cbz	x1, .L1593
+	cbz	x1, .L1605
 	ldr	x4, [x2,1280]
 	mov	w5, 6
-.L1589:
-	cbz	w3, .L1590
+.L1601:
+	cbz	w3, .L1602
 	ldrh	w2, [x1]
 	cmp	w2, w0
-	beq	.L1593
+	beq	.L1605
 	umull	x2, w2, w5
 	sub	w3, w3, #1
 	add	x1, x4, x2
 	uxth	w3, w3
-	b	.L1589
-.L1590:
+	b	.L1601
+.L1602:
 	sub	x1, x1, x4
 	mov	x0, -6148914691236517206
 	asr	x1, x1, 1
 	madd	x1, x0, x1, x1
 	uxth	w0, w1
-.L1593:
+.L1605:
 	ret
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.align	2
@@ -9835,20 +9916,20 @@ List_update_data_list:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w1, [x0,3608]
 	cmp	w1, w20
-	beq	.L1595
+	beq	.L1607
 	ldrh	w1, [x0,3656]
 	cmp	w1, w20
-	beq	.L1595
+	beq	.L1607
 	ldrh	w1, [x0,3704]
 	cmp	w1, w20
-	beq	.L1595
+	beq	.L1607
 	mov	w3, 6
 	ldr	x4, [x0,1280]
 	ldr	x2, [x0,3568]
 	umull	x3, w20, w3
 	add	x1, x4, x3
 	cmp	x1, x2
-	beq	.L1595
+	beq	.L1607
 	ldr	x5, [x0,1184]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w2, [x5,x0]
@@ -9859,11 +9940,11 @@ List_update_data_list:
 	mov	w0, 65535
 	csinv	w2, w2, wzr, ne
 	cmp	w1, w0
-	bne	.L1597
+	bne	.L1609
 	ldrh	w0, [x4,x3]
 	cmp	w0, w1
-	beq	.L1595
-.L1597:
+	beq	.L1607
+.L1609:
 	mov	w0, 6
 	mov	x3, -6148914691236517206
 	umull	x1, w1, w0
@@ -9876,7 +9957,7 @@ List_update_data_list:
 	mul	w0, w0, w1
 	csinv	w0, w0, wzr, ne
 	cmp	w2, w0
-	bcs	.L1595
+	bcs	.L1607
 	add	x19, x19, :lo12:.LANCHOR2
 	mov	w1, w20
 	add	x0, x19, 3568
@@ -9886,7 +9967,7 @@ List_update_data_list:
 	strh	w0, [x19,3584]
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1595:
+.L1607:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -9913,74 +9994,74 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L1602:
+.L1614:
 	ldrh	w1, [x19,6]
 	cmp	w1, w0
-	bls	.L1615
+	bls	.L1627
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20,x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L1603:
+.L1615:
 	ldrh	w3, [x19,10]
 	cmp	w3, w1
-	bls	.L1616
+	bls	.L1628
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x25,x3]
 	cmp	w4, w2
-	bne	.L1604
+	bne	.L1616
 	ldrh	w4, [x21,x3]
 	add	w4, w4, 1
 	strh	w4, [x21,x3]
-.L1604:
+.L1616:
 	add	w1, w1, 1
 	uxth	w1, w1
-	b	.L1603
-.L1616:
+	b	.L1615
+.L1628:
 	add	w0, w0, 1
 	uxth	w0, w0
-	b	.L1602
-.L1615:
+	b	.L1614
+.L1627:
 	mov	w24, 0
 	ldrh	w26, [x21]
 	mov	w20, w24
 	adrp	x27, .LANCHOR2
-.L1607:
+.L1619:
 	ldrh	w0, [x19,10]
 	cmp	w0, w20
-	bls	.L1617
+	bls	.L1629
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L1608
+	bne	.L1620
 	add	x0, x27, :lo12:.LANCHOR2
 	ldrh	w1, [x19,2]
 	ldrh	w0, [x0,820]
 	cmp	w1, w0
-	bcs	.L1608
+	bcs	.L1620
 	strh	w0, [x21,x22,lsl 1]
-.L1608:
+.L1620:
 	lsl	x22, x22, 1
 	ldrh	w23, [x21,x22]
 	cmp	w26, w23
-	bls	.L1609
+	bls	.L1621
 	mov	w24, w20
 	mov	w26, w23
-.L1609:
-	cbnz	w23, .L1610
+.L1621:
+	cbnz	w23, .L1622
 	ldrh	w0, [x25,x22]
-	cbz	w0, .L1610
+	cbz	w0, .L1622
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	w23, [x25,x22]
 	ldrh	w0, [x19,8]
 	sub	w0, w0, #1
 	strh	w0, [x19,8]
-.L1610:
+.L1622:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L1607
-.L1617:
+	b	.L1619
+.L1629:
 	mov	w0, w24
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -10001,12 +10082,12 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldrh	w2, [x0,10]
 	ldr	x1, [x0,16]
-.L1619:
+.L1631:
 	cmp	w20, w2
-	beq	.L1623
+	beq	.L1635
 	mov	x22, x1
 	ldrh	w21, [x1],2
-	cbnz	w21, .L1620
+	cbnz	w21, .L1632
 	mov	x19, x0
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x22]
@@ -10014,15 +10095,15 @@ ftl_map_blk_alloc_new_blk:
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L1621
+	bcs	.L1633
 	adrp	x2, .LANCHOR2+1470
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	ldrh	w2, [x2,#:lo12:.LANCHOR2+1470]
 	bl	printk
-.L1622:
-	b	.L1622
-.L1621:
+.L1634:
+	b	.L1634
+.L1633:
 	ldr	w0, [x19,48]
 	strh	w21, [x19,2]
 	add	w0, w0, 1
@@ -10031,12 +10112,12 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19,8]
-	b	.L1623
-.L1620:
+	b	.L1635
+.L1632:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L1619
-.L1623:
+	b	.L1631
+.L1635:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -10047,127 +10128,130 @@ ftl_map_blk_alloc_new_blk:
 	.global	FtlMapWritePage
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp,16]
-	adrp	x20, .LANCHOR2
-	mov	x19, x0
-	stp	x21, x22, [sp,32]
-	add	x22, x20, :lo12:.LANCHOR2
-	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
-	ldr	w21, [x22,1400]
-	mov	w24, w1
+	adrp	x25, .LANCHOR2
+	mov	x26, x2
+	stp	x23, x24, [sp,48]
 	stp	x27, x28, [sp,80]
-	mov	x25, x2
-	cbnz	w21, .L1626
 	adrp	x23, .LC38
-	mov	w26, 65535
-	add	x28, x22, 1408
-	add	x23, x23, :lo12:.LC38
-.L1627:
-	ldr	w1, [x22,896]
+	add	x28, x25, :lo12:.LANCHOR2
+	stp	x21, x22, [sp,32]
+	stp	x19, x20, [sp,16]
+	mov	w24, w1
+	mov	x19, x0
+	mov	w22, 0
+	add	x0, x23, :lo12:.LC38
+	mov	w27, 65535
+	add	x21, x28, 1408
+	str	x0, [x29,104]
+.L1638:
+	add	x0, x25, :lo12:.LANCHOR2
+	adrp	x20, .LANCHOR2
+	ldr	w1, [x0,896]
 	add	w1, w1, 1
-	str	w1, [x22,896]
-	ldrh	w1, [x22,820]
-	ldrh	w0, [x19,2]
-	sub	w1, w1, #1
-	cmp	w0, w1
-	bge	.L1628
+	str	w1, [x0,896]
+	ldrh	w0, [x0,820]
+	ldrh	w1, [x19,2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L1639
 	ldrh	w0, [x19]
-	cmp	w0, w26
-	bne	.L1629
-.L1628:
+	cmp	w0, w27
+	bne	.L1640
+.L1639:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1629:
-	ldrh	w1, [x19]
-	mov	w2, 16
+.L1640:
+	ldr	w1, [x28,1400]
+	cbnz	w1, .L1641
+	ldrh	w2, [x19]
 	ldr	x0, [x19,16]
-	ldrh	w27, [x0,x1,lsl 1]
-	ldrh	w1, [x19,2]
-	ldr	x0, [x22,1112]
-	orr	w1, w1, w27, lsl 10
-	str	w1, [x28,4]
-	mov	w1, 0
-	str	x25, [x28,8]
-	str	x0, [x28,16]
+	ldrh	w23, [x0,x2,lsl 1]
+	mov	w2, 16
+	ldrh	w0, [x19,2]
+	str	x26, [x21,8]
+	orr	w0, w0, w23, lsl 10
+	str	w0, [x21,4]
+	ldr	x0, [x28,1112]
+	str	x0, [x21,16]
 	bl	ftl_memset
-	ldr	x1, [x28,16]
-	ldr	w0, [x19,48]
-	str	w0, [x1,4]
-	strh	w24, [x1,8]
-	ldrh	w0, [x19,4]
-	strh	w0, [x1]
-	mov	x0, x28
-	strh	w27, [x1,2]
+	ldr	x0, [x21,16]
+	ldr	w1, [x19,48]
+	str	w1, [x0,4]
+	strh	w24, [x0,8]
+	ldrh	w1, [x19,4]
+	strh	w1, [x0]
 	mov	w1, 1
+	strh	w23, [x0,2]
 	mov	w3, w1
+	mov	x0, x21
 	mov	w2, w1
 	bl	FlashProgPages
 	ldrh	w3, [x19,2]
 	add	w3, w3, 1
 	uxth	w3, w3
 	strh	w3, [x19,2]
-	ldr	w1, [x28]
-	cmn	w1, #1
-	bne	.L1630
-	ldr	w1, [x28,4]
-	mov	x0, x23
-	add	w21, w21, 1
+	ldr	w0, [x21]
+	cmn	w0, #1
+	bne	.L1642
+	ldr	x0, [x29,104]
+	add	w22, w22, 1
+	ldr	w1, [x21,4]
+	uxth	w22, w22
 	bl	printk
-	uxth	w21, w21
 	ldrh	w0, [x19,2]
 	cmp	w0, 2
-	bhi	.L1631
-	ldrh	w1, [x22,820]
-	sub	w1, w1, #1
-	strh	w1, [x19,2]
-.L1631:
-	cmp	w21, 3
-	bls	.L1627
+	bhi	.L1643
+	ldrh	w0, [x28,820]
+	sub	w0, w0, #1
+	strh	w0, [x19,2]
+.L1643:
+	cmp	w22, 3
+	bls	.L1638
 	add	x20, x20, :lo12:.LANCHOR2
 	adrp	x0, .LC39
 	add	x0, x0, :lo12:.LC39
-	mov	w2, w21
+	mov	w2, w22
 	ldr	w1, [x20,1412]
 	bl	printk
 	mov	w0, 1
 	str	w0, [x20,1400]
-	b	.L1626
-.L1630:
-	cbz	w1, .L1633
-	strh	w27, [x19,60]
-.L1633:
+	b	.L1641
+.L1642:
+	cbz	w0, .L1645
+	strh	w23, [x19,60]
+.L1645:
 	cmp	w3, 1
-	beq	.L1627
-	cmp	w1, 256
-	beq	.L1627
+	beq	.L1638
+	cmp	w0, 256
+	beq	.L1638
 	add	x20, x20, :lo12:.LANCHOR2
 	ldr	x0, [x19,40]
 	ldr	w1, [x20,1412]
 	str	w1, [x0,w24,uxtw 2]
-.L1626:
+.L1641:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
 	ldp	x25, x26, [sp,64]
 	ldp	x27, x28, [sp,80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 112
 	ret
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
-	stp	x27, x28, [sp,80]
+	str	x27, [sp,80]
 	mov	x19, x0
 	adrp	x20, .LANCHOR2
 	ldr	x22, [x0,16]
@@ -10177,39 +10261,39 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19,8]
 	sub	w1, w4, #4
 	cmp	w2, w1
-	bge	.L1638
+	bge	.L1650
 	ldrh	w2, [x19,60]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1640
+	beq	.L1652
 	add	x1, x20, :lo12:.LANCHOR2
 	ldrh	w2, [x19,2]
 	ldrh	w1, [x1,820]
 	cmp	w2, w1
-	bcc	.L1640
-.L1638:
+	bcc	.L1652
+.L1650:
 	ldrh	w1, [x19,60]
 	uxth	w21, w0
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1642
+	beq	.L1654
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w3, [x19,2]
 	ldrh	w0, [x0,820]
 	cmp	w0, w3
-	bhi	.L1642
+	bhi	.L1654
 	mov	x2, 0
-.L1643:
+.L1655:
 	uxth	w0, w2
 	cmp	w0, w4
-	bcs	.L1644
+	bcs	.L1656
 	add	x2, x2, 1
 	add	x5, x22, x2, lsl 1
 	ldrh	w5, [x5,-2]
 	cmp	w5, w1
-	bne	.L1643
+	bne	.L1655
 	mov	w21, w0
-.L1644:
+.L1656:
 	ubfiz	x2, x0, 1, 16
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
@@ -10217,12 +10301,12 @@ ftl_map_blk_gc:
 	bl	printk
 	mov	w0, -1
 	strh	w0, [x19,60]
-.L1642:
+.L1654:
 	ubfiz	x21, x21, 1, 16
-	ldrh	w25, [x22,x21]
-	cbz	w25, .L1640
+	ldrh	w24, [x22,x21]
+	cbz	w24, .L1652
 	ldr	w0, [x19,52]
-	cbnz	w0, .L1640
+	cbnz	w0, .L1652
 	mov	w1, 1
 	str	w1, [x19,52]
 	strh	w0, [x22,x21]
@@ -10233,76 +10317,79 @@ ftl_map_blk_gc:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w0, [x0,820]
 	cmp	w1, w0
-	bcc	.L1646
+	bcc	.L1658
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1646:
-	add	x24, x20, :lo12:.LANCHOR2
-	adrp	x26, .LC41
+.L1658:
+	add	x25, x20, :lo12:.LANCHOR2
 	mov	w21, 0
-	add	x22, x24, 1408
-	mov	w27, 1
-	add	x26, x26, :lo12:.LC41
-.L1647:
+	add	x22, x25, 1408
+.L1659:
 	ldrh	w0, [x19,6]
 	cmp	w0, w21
-	bls	.L1657
-	ubfiz	x28, x21, 2, 16
-	ldr	w0, [x23,x28]
-	cmp	w25, w0, lsr 10
-	bne	.L1648
-	ldr	x3, [x24,1112]
+	bls	.L1670
+	ubfiz	x0, x21, 2, 16
+	add	x27, x23, x0
+	ldr	w1, [x23,x0]
+	cmp	w24, w1, lsr 10
+	bne	.L1660
+	ldr	x1, [x25,1056]
+	ldr	x26, [x25,1112]
+	str	x1, [x22,8]
 	mov	w1, 1
-	ldr	x0, [x24,1056]
+	str	x26, [x22,16]
 	mov	w2, w1
-	str	x3, [x22,16]
-	str	x0, [x22,8]
-	str	x3, [x29,104]
-	ldr	w0, [x23,x28]
+	ldr	w0, [x23,x0]
 	str	w0, [x22,4]
 	mov	x0, x22
 	bl	FlashReadPages
 	ldr	w0, [x22]
-	ldr	x3, [x29,104]
 	cmn	w0, #1
-	bne	.L1649
-	str	wzr, [x23,x28]
-	mov	x0, x26
-	ldr	w1, [x22,4]
-	ldrh	w2, [x3,8]
+	bne	.L1661
+.L1663:
+	add	x20, x20, :lo12:.LANCHOR2
+	str	wzr, [x27]
+	adrp	x0, .LC41
+	ldrh	w2, [x26,8]
+	add	x0, x0, :lo12:.LC41
+	ldr	w1, [x20,1412]
 	bl	printk
-	str	w27, [x24,1400]
-	b	.L1648
-.L1649:
+	mov	w0, 1
+	str	w0, [x20,1400]
+	b	.L1662
+.L1661:
+	ldrh	w0, [x26,8]
+	cmp	w0, w21
+	bne	.L1663
 	ldr	x2, [x22,8]
 	mov	x0, x19
 	mov	w1, w21
 	bl	FtlMapWritePage
-.L1648:
+.L1660:
 	add	w21, w21, 1
 	uxth	w21, w21
-	b	.L1647
-.L1657:
-	mov	w0, w25
+	b	.L1659
+.L1670:
+	mov	w0, w24
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19,52]
-.L1640:
+.L1652:
 	add	x20, x20, :lo12:.LANCHOR2
 	ldrh	w1, [x19,2]
 	ldrh	w0, [x20,820]
 	cmp	w1, w0
-	bcc	.L1651
+	bcc	.L1662
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1651:
+.L1662:
 	mov	w0, 0
+	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
 	ldp	x25, x26, [sp,64]
-	ldp	x27, x28, [sp,80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 96
 	ret
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
@@ -10319,12 +10406,12 @@ Ftl_write_map_blk_to_last_page:
 	ldr	w20, [x1,1400]
 	ldr	x22, [x0,16]
 	ldr	x23, [x0,40]
-	cbnz	w20, .L1659
+	cbnz	w20, .L1672
 	mov	x19, x0
 	ldrh	w0, [x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1660
+	bne	.L1673
 	ldrh	w0, [x19,8]
 	add	w0, w0, 1
 	strh	w0, [x19,8]
@@ -10335,8 +10422,8 @@ Ftl_write_map_blk_to_last_page:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	str	w0, [x19,48]
-	b	.L1659
-.L1660:
+	b	.L1672
+.L1673:
 	ubfiz	x0, x0, 1, 16
 	ldr	w2, [x19,48]
 	ldrh	w22, [x22,x0]
@@ -10359,14 +10446,14 @@ Ftl_write_map_blk_to_last_page:
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	mov	w0, w20
-.L1661:
+.L1674:
 	ldrh	w1, [x19,6]
 	cmp	w1, w0
-	bls	.L1664
+	bls	.L1677
 	ubfiz	x3, x0, 2, 32
 	ldr	w1, [x23,x3]
 	cmp	w22, w1, lsr 10
-	bne	.L1662
+	bne	.L1675
 	add	x2, x21, :lo12:.LANCHOR2
 	add	w20, w20, 1
 	uxth	w20, w20
@@ -10377,11 +10464,11 @@ Ftl_write_map_blk_to_last_page:
 	ldr	w3, [x23,x3]
 	add	x1, x2, x1
 	str	w3, [x1,4]
-.L1662:
+.L1675:
 	add	w0, w0, 1
 	uxth	w0, w0
-	b	.L1661
-.L1664:
+	b	.L1674
+.L1677:
 	mov	w1, 1
 	add	x0, x21, :lo12:.LANCHOR2
 	add	x0, x0, 1408
@@ -10393,7 +10480,7 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19,2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.L1659:
+.L1672:
 	mov	w0, 0
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -10438,209 +10525,241 @@ select_l2p_ram_region:
 	mov	w5, 65535
 	ldrh	w2, [x1,858]
 	ldr	x1, [x1,1264]
-.L1667:
+.L1680:
 	uxth	w0, w4
 	cmp	w0, w2
-	bcs	.L1683
+	bcs	.L1696
 	add	x4, x4, 1
 	add	x6, x1, x4, lsl 4
 	ldrh	w6, [x6,-16]
 	cmp	w6, w5
-	bne	.L1667
-	b	.L1668
-.L1683:
+	bne	.L1680
+	b	.L1681
+.L1696:
 	mov	w0, w2
 	mov	x4, 0
 	mov	w7, -2147483648
-.L1670:
+.L1683:
 	uxth	w6, w4
 	cmp	w6, w2
-	bcs	.L1684
+	bcs	.L1697
 	add	x5, x1, x4, lsl 4
 	ldr	w5, [x5,4]
-	tbnz	w5, #31, .L1679
+	tbnz	w5, #31, .L1692
 	cmp	w5, w7
-	bcc	.L1671
-.L1679:
+	bcc	.L1684
+.L1692:
 	mov	w5, w7
 	mov	w6, w0
-.L1671:
+.L1684:
 	add	x4, x4, 1
 	mov	w7, w5
 	mov	w0, w6
-	b	.L1670
-.L1684:
+	b	.L1683
+.L1697:
 	cmp	w0, w2
-	bcc	.L1668
+	bcc	.L1681
 	add	x0, x3, :lo12:.LANCHOR2
 	add	x1, x1, 4
 	mov	w4, -1
 	mov	w3, 0
 	ldrh	w5, [x0,3816]
 	mov	w0, w2
-.L1674:
+.L1687:
 	cmp	w3, w2
-	beq	.L1668
+	beq	.L1681
 	ldr	w7, [x1]
 	cmp	w7, w4
-	bcs	.L1675
+	bcs	.L1688
 	ldrh	w6, [x1,-4]
 	cmp	w6, w5
 	csel	w4, w4, w7, eq
 	cmp	w6, w5
 	csel	w0, w0, w3, eq
-.L1675:
+.L1688:
 	add	w3, w3, 1
 	add	x1, x1, 16
 	uxth	w3, w3
-	b	.L1674
-.L1668:
+	b	.L1687
+.L1681:
 	ret
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.align	2
 	.global	log2phys
 	.type	log2phys, %function
 log2phys:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp,32]
-	adrp	x21, .LANCHOR2
-	add	x3, x21, :lo12:.LANCHOR2
+	stp	x19, x20, [sp,16]
+	adrp	x19, .LANCHOR2
+	add	x3, x19, :lo12:.LANCHOR2
+	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-	stp	x23, x24, [sp,48]
-	stp	x19, x20, [sp,16]
-	mov	x26, x1
-	mov	w27, w2
+	stp	x21, x22, [sp,32]
+	mov	x25, x1
+	mov	w26, w2
 	ldrh	w1, [x3,826]
 	mov	x2, 1
-	ldr	x20, [x3,1264]
+	ldr	x21, [x3,1264]
 	add	w1, w1, 7
 	lsr	w28, w0, w1
 	lsl	x1, x2, x1
 	sub	w1, w1, #1
 	and	w23, w1, w0
 	ldrh	w1, [x3,858]
-	uxth	w25, w28
+	uxth	w24, w28
 	mov	x0, 0
 	uxth	x23, w23
-.L1686:
-	uxth	x19, w0
-	cmp	w19, w1
-	bcs	.L1700
+.L1699:
+	uxth	x20, w0
+	cmp	w20, w1
+	bcs	.L1714
 	add	x0, x0, 1
-	add	x2, x20, x0, lsl 4
+	add	x2, x21, x0, lsl 4
 	ldrh	w2, [x2,-16]
-	cmp	w2, w25
-	bne	.L1686
-.L1687:
-	cbnz	w27, .L1688
-	add	x0, x21, :lo12:.LANCHOR2
+	cmp	w2, w24
+	bne	.L1699
+.L1700:
+	cbnz	w26, .L1701
+	add	x0, x19, :lo12:.LANCHOR2
 	ldr	x1, [x0,1264]
-	add	x1, x1, x19, lsl 4
+	add	x1, x1, x20, lsl 4
 	ldr	x0, [x1,8]
 	ldr	w0, [x0,x23,lsl 2]
-	str	w0, [x26]
-	b	.L1689
-.L1688:
-	add	x1, x21, :lo12:.LANCHOR2
-	lsl	x0, x19, 4
-	ldr	w3, [x26]
+	str	w0, [x25]
+	b	.L1702
+.L1701:
+	add	x1, x19, :lo12:.LANCHOR2
+	lsl	x0, x20, 4
+	ldr	w3, [x25]
 	ldr	x2, [x1,1264]
 	add	x2, x2, x0
 	ldr	x2, [x2,8]
 	str	w3, [x2,x23,lsl 2]
-	strh	w25, [x1,3816]
+	strh	w24, [x1,3816]
 	ldr	x2, [x1,1264]
 	add	x0, x2, x0
 	ldr	w2, [x0,4]
 	orr	w2, w2, -2147483648
 	str	w2, [x0,4]
-.L1689:
-	add	x21, x21, :lo12:.LANCHOR2
-	ldr	x0, [x21,1264]
-	add	x19, x0, x19, lsl 4
-	ldr	w0, [x19,4]
+.L1702:
+	add	x19, x19, :lo12:.LANCHOR2
+	ldr	x0, [x19,1264]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20,4]
 	cmn	w0, #1
-	beq	.L1697
+	beq	.L1711
 	add	w0, w0, 1
-	str	w0, [x19,4]
-	b	.L1697
-.L1700:
+	str	w0, [x20,4]
+	b	.L1711
+.L1714:
 	bl	select_l2p_ram_region
-	uxth	x19, w0
-	ubfiz	x22, x19, 4, 16
+	uxth	x20, w0
+	ubfiz	x22, x20, 4, 16
 	mov	w2, 65535
-	add	x1, x20, x22
-	ldrh	w3, [x20,x22]
+	add	x1, x21, x22
+	ldrh	w3, [x21,x22]
 	cmp	w3, w2
-	beq	.L1692
+	beq	.L1705
 	ldr	w1, [x1,4]
-	tbz	w1, #31, .L1692
+	tbz	w1, #31, .L1705
 	bl	flush_l2p_region
-.L1692:
-	add	x20, x21, :lo12:.LANCHOR2
-	ubfiz	x0, x25, 2, 16
-	ldr	x1, [x20,1240]
-	ldr	w24, [x1,x0]
-	cbnz	w24, .L1693
-	ldr	x0, [x20,1264]
+.L1705:
+	add	x21, x19, :lo12:.LANCHOR2
+	ubfiz	x0, x24, 2, 16
+	ldr	x1, [x21,1240]
+	ldr	w27, [x1,x0]
+	cbnz	w27, .L1706
+	ldr	x0, [x21,1264]
 	mov	w1, 255
-	ldrh	w2, [x20,828]
+	ldrh	w2, [x21,828]
 	add	x0, x0, x22
 	ldr	x0, [x0,8]
 	bl	ftl_memset
-	ldr	x0, [x20,1264]
-	strh	w25, [x0,x22]
-	ldr	x0, [x20,1264]
+	ldr	x0, [x21,1264]
+	strh	w24, [x0,x22]
+	ldr	x0, [x21,1264]
 	add	x22, x0, x22
-	str	w24, [x22,4]
-	b	.L1687
-.L1693:
-	ldr	x1, [x20,1264]
-	add	x0, x20, 1408
-	str	w24, [x0,4]
-	add	x1, x1, x22
-	ldr	x1, [x1,8]
-	str	x1, [x0,8]
-	ldr	x1, [x20,1112]
-	str	x1, [x0,16]
+	str	w27, [x22,4]
+	b	.L1700
+.L1706:
+	ldr	x0, [x21,1264]
+	add	x3, x21, 1408
 	mov	w1, 1
+	str	x3, [x29,104]
+	add	x0, x0, x22
 	mov	w2, w1
+	str	w27, [x21,1412]
+	ldr	x0, [x0,8]
+	str	x0, [x21,1416]
+	ldr	x0, [x21,1112]
+	str	x0, [x21,1424]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	w0, [x20,1408]
+	ldr	w0, [x21,1408]
+	ldr	x3, [x29,104]
 	cmp	w0, 256
-	bne	.L1694
-	and	w28, w28, 65535
+	ldr	x4, [x3,16]
+	bne	.L1707
+	and	w3, w28, 65535
 	adrp	x0, .LC42
-	mov	w2, w24
-	mov	w1, w28
+	mov	w1, w3
+	mov	w2, w27
 	add	x0, x0, :lo12:.LC42
-	lsr	w24, w24, 10
+	str	x4, [x29,96]
+	str	x3, [x29,104]
 	bl	printk
-	strh	w24, [x20,3812]
-	add	x0, x20, 3752
-	ldr	x2, [x20,1264]
-	mov	w1, w28
+	add	x0, x21, 3752
+	ldr	x2, [x21,1264]
+	lsr	w1, w27, 10
+	ldr	x3, [x29,104]
 	add	x2, x2, x22
+	strh	w1, [x0,60]
+	mov	w1, w3
 	ldr	x2, [x2,8]
 	bl	FtlMapWritePage
-.L1694:
-	add	x1, x21, :lo12:.LANCHOR2
+	ldr	x4, [x29,96]
+.L1707:
+	ldrh	w0, [x4,8]
+	cmp	w0, w24
+	beq	.L1708
+	adrp	x0, .LC43
+	add	x21, x19, :lo12:.LANCHOR2
+	uxth	w1, w28
+	mov	w2, w27
+	add	x0, x0, :lo12:.LC43
+	bl	printk
+	mov	w2, 4
+	ldr	x1, [x21,1424]
+	adrp	x0, .LC17
+	mov	w3, w2
+	add	x0, x0, :lo12:.LC17
+	bl	rknand_print_hex
+	adrp	x0, .LC44
+	ldr	x1, [x21,1240]
+	ldrh	w3, [x21,856]
+	add	x0, x0, :lo12:.LC44
+	mov	w2, 4
+	bl	rknand_print_hex
+	mov	w0, 1
+	str	w0, [x21,1400]
+.L1708:
+	add	x1, x19, :lo12:.LANCHOR2
 	ldr	x0, [x1,1264]
 	add	x0, x0, x22
 	str	wzr, [x0,4]
 	ldr	x0, [x1,1264]
-	strh	w25, [x0,x22]
-	b	.L1687
-.L1697:
+	strh	w24, [x0,x22]
+	b	.L1700
+.L1711:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
 	ldp	x25, x26, [sp,64]
 	ldp	x27, x28, [sp,80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 112
 	ret
 	.size	log2phys, .-log2phys
 	.align	2
@@ -10664,12 +10783,12 @@ FtlVendorPartWrite:
 	mov	x24, x2
 	ldrh	w23, [x19,826]
 	mov	w21, -1
-	bhi	.L1702
+	bhi	.L1716
 	lsr	w23, w25, w23
 	mov	w21, 0
 	add	x27, x19, 3824
-.L1703:
-	cbz	w22, .L1702
+.L1717:
+	cbz	w22, .L1716
 	ldrh	w1, [x19,824]
 	ldr	x0, [x19,1232]
 	udiv	w26, w25, w1
@@ -10681,8 +10800,8 @@ FtlVendorPartWrite:
 	cmp	w20, w22
 	csel	w20, w0, w20, hi
 	cmp	w20, w1
-	beq	.L1705
-	cbz	w2, .L1705
+	beq	.L1719
+	cbz	w2, .L1719
 	ldr	x0, [x19,1064]
 	mov	w1, 1
 	str	w2, [x29,108]
@@ -10691,13 +10810,13 @@ FtlVendorPartWrite:
 	add	x0, x29, 104
 	str	xzr, [x29,120]
 	bl	FlashReadPages
-	b	.L1706
-.L1705:
+	b	.L1720
+.L1719:
 	ldr	x0, [x19,1064]
 	mov	w1, 0
 	ldrh	w2, [x19,828]
 	bl	ftl_memset
-.L1706:
+.L1720:
 	ldr	x0, [x19,1064]
 	lsl	w28, w20, 9
 	ubfiz	x26, x26, 9, 16
@@ -10715,8 +10834,8 @@ FtlVendorPartWrite:
 	bl	FtlMapWritePage
 	cmn	w0, #1
 	csinv	w21, w21, wzr, ne
-	b	.L1703
-.L1702:
+	b	.L1717
+.L1716:
 	mov	w0, w21
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -10747,16 +10866,16 @@ FtlVendorPartRead:
 	ldrh	w20, [x3,826]
 	cmp	w2, w1
 	mov	w0, -1
-	bhi	.L1717
-	adrp	x26, .LC43
+	bhi	.L1731
+	adrp	x26, .LC45
 	add	x0, x3, 3824
 	lsr	w20, w23, w20
 	mov	w21, 0
 	mov	x28, x3
-	add	x26, x26, :lo12:.LC43
+	add	x26, x26, :lo12:.LC45
 	str	x0, [x29,104]
-.L1718:
-	cbz	w22, .L1726
+.L1732:
+	cbz	w22, .L1740
 	ldrh	w19, [x28,824]
 	ldr	x0, [x28,1232]
 	udiv	w24, w23, w19
@@ -10768,7 +10887,7 @@ FtlVendorPartRead:
 	cmp	w19, w22
 	csel	w19, w0, w19, hi
 	lsl	w27, w19, 9
-	cbz	w4, .L1720
+	cbz	w4, .L1734
 	ldr	x0, [x28,1064]
 	mov	w1, 1
 	str	x0, [x29,128]
@@ -10784,7 +10903,7 @@ FtlVendorPartRead:
 	ldr	w0, [x28,1408]
 	csinv	w21, w21, wzr, ne
 	cmp	w0, 256
-	bne	.L1722
+	bne	.L1736
 	mov	w1, w20
 	mov	w2, w4
 	mov	x0, x26
@@ -10793,28 +10912,28 @@ FtlVendorPartRead:
 	mov	w1, w20
 	ldr	x2, [x28,1064]
 	bl	FtlMapWritePage
-.L1722:
+.L1736:
 	ldr	x1, [x28,1064]
 	ubfiz	x24, x24, 9, 16
 	mov	x0, x25
 	mov	w2, w27
 	add	x1, x1, x24
 	bl	ftl_memcpy
-	b	.L1723
-.L1720:
+	b	.L1737
+.L1734:
 	mov	x0, x25
 	mov	w1, w4
 	mov	w2, w27
 	bl	ftl_memset
-.L1723:
+.L1737:
 	add	w20, w20, 1
 	sub	w22, w22, w19
 	add	w23, w23, w19
 	add	x25, x25, x27, sxtw
-	b	.L1718
-.L1726:
+	b	.L1732
+.L1740:
 	mov	w0, w21
-.L1717:
+.L1731:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -10852,13 +10971,13 @@ FtlUpdateVaildLpn:
 	adrp	x1, .LANCHOR2
 	add	x3, x1, :lo12:.LANCHOR2
 	ldrh	w2, [x3,3888]
-	cbnz	w0, .L1730
+	cbnz	w0, .L1744
 	cmp	w2, 4
-	bhi	.L1730
+	bhi	.L1744
 	add	w2, w2, 1
 	strh	w2, [x3,3888]
-	b	.L1729
-.L1730:
+	b	.L1743
+.L1744:
 	add	x0, x1, :lo12:.LANCHOR2
 	mov	w7, 65535
 	strh	wzr, [x0,3888]
@@ -10866,20 +10985,20 @@ FtlUpdateVaildLpn:
 	ldrh	w5, [x0,756]
 	ldr	x6, [x0,1184]
 	mov	x0, 0
-.L1731:
+.L1745:
 	cmp	w5, w0, uxth
-	bls	.L1729
+	bls	.L1743
 	ldrh	w4, [x6,x0,lsl 1]
 	cmp	w4, w7
-	beq	.L1732
+	beq	.L1746
 	add	x3, x1, :lo12:.LANCHOR2
 	ldr	w2, [x3,3892]
 	add	w2, w4, w2
 	str	w2, [x3,3892]
-.L1732:
+.L1746:
 	add	x0, x0, 1
-	b	.L1731
-.L1729:
+	b	.L1745
+.L1743:
 	ret
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	2
@@ -10893,13 +11012,13 @@ FtlMapBlkWriteDumpData:
 	ldr	w1, [x0,56]
 	ldrh	w19, [x0,6]
 	ldr	x4, [x0,40]
-	cbz	w1, .L1735
+	cbz	w1, .L1749
 	adrp	x1, .LANCHOR2
 	str	wzr, [x0,56]
 	add	x2, x1, :lo12:.LANCHOR2
 	mov	x21, x1
 	ldr	w3, [x2,1400]
-	cbnz	w3, .L1735
+	cbnz	w3, .L1749
 	mov	x20, x0
 	sub	w19, w19, #1
 	add	x0, x2, 1408
@@ -10911,23 +11030,23 @@ FtlMapBlkWriteDumpData:
 	str	x1, [x0,8]
 	ldr	w3, [x4,x3]
 	str	w3, [x0,4]
-	cbz	w3, .L1739
+	cbz	w3, .L1753
 	mov	w1, 1
 	mov	w2, w1
 	bl	FlashReadPages
-	b	.L1740
-.L1739:
+	b	.L1754
+.L1753:
 	ldrh	w2, [x2,828]
 	mov	x0, x1
 	mov	w1, 255
 	bl	ftl_memset
-.L1740:
+.L1754:
 	add	x2, x21, :lo12:.LANCHOR2
 	mov	x0, x20
 	mov	w1, w19
 	ldr	x2, [x2,1416]
 	bl	FtlMapWritePage
-.L1735:
+.L1749:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -10946,7 +11065,7 @@ FtlVpcTblFlush:
 	add	x19, x22, :lo12:.LANCHOR2
 	stp	x23, x24, [sp,48]
 	ldr	w0, [x19,1400]
-	cbnz	w0, .L1743
+	cbnz	w0, .L1757
 	ldr	x21, [x19,1112]
 	add	x20, x19, 3520
 	ldr	x1, [x19,1048]
@@ -11026,7 +11145,7 @@ FtlVpcTblFlush:
 	ldr	x1, [x1,#:lo12:.LANCHOR0+16]
 	bl	ftl_memcpy
 	ldrh	w0, [x19,860]
-	cbz	w0, .L1744
+	cbz	w0, .L1758
 	ldrh	w0, [x19,756]
 	ldrh	w2, [x19,856]
 	lsr	w1, w0, 3
@@ -11038,14 +11157,14 @@ FtlVpcTblFlush:
 	add	x0, x1, x0
 	ldr	x1, [x19,1240]
 	bl	ftl_memcpy
-.L1744:
+.L1758:
 	add	x19, x22, :lo12:.LANCHOR2
 	mov	w0, 0
 	mov	w23, 0
 	mov	w25, 65535
 	add	x20, x19, 1408
 	bl	FtlUpdateVaildLpn
-.L1745:
+.L1759:
 	ldr	x0, [x19,1048]
 	str	x0, [x20,8]
 	ldr	x0, [x19,1112]
@@ -11063,7 +11182,7 @@ FtlVpcTblFlush:
 	ldrh	w1, [x19,3898]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1746
+	blt	.L1760
 	ldrh	w0, [x19,3896]
 	ldrh	w25, [x19,3900]
 	strh	wzr, [x19,3898]
@@ -11083,45 +11202,45 @@ FtlVpcTblFlush:
 	mov	w3, w1
 	mov	x0, x20
 	bl	FlashProgPages
-.L1746:
+.L1760:
 	ldrh	w1, [x19,3898]
 	ldr	w2, [x20]
 	add	w1, w1, 1
 	cmn	w2, #1
 	uxth	w1, w1
 	strh	w1, [x19,3898]
-	bne	.L1747
+	bne	.L1761
 	cmp	w1, 1
-	bne	.L1748
+	bne	.L1762
 	ldrh	w1, [x19,820]
 	sub	w1, w1, #1
 	strh	w1, [x19,3898]
-.L1748:
+.L1762:
 	add	w23, w23, 1
 	uxth	w23, w23
 	cmp	w23, 3
-	bls	.L1745
+	bls	.L1759
 	add	x22, x22, :lo12:.LANCHOR2
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	mov	w2, w23
 	ldr	w1, [x22,1412]
 	bl	printk
 	mov	w0, 1
 	str	w0, [x22,1400]
-	b	.L1743
-.L1747:
+	b	.L1757
+.L1761:
 	cmp	w1, 1
-	beq	.L1745
+	beq	.L1759
 	cmp	w2, 256
-	beq	.L1745
+	beq	.L1759
 	mov	w0, 65535
 	cmp	w25, w0
-	beq	.L1743
+	beq	.L1757
 	mov	w0, w25
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1743:
+.L1757:
 	mov	w0, 0
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -11172,19 +11291,19 @@ FtlScanSysBlk:
 	mov	w2, 12
 	bl	ftl_memset
 	ldrh	w21, [x20,756]
-.L1755:
+.L1769:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x1,758]
 	cmp	w0, w21
-	bls	.L1796
+	bls	.L1810
 	mov	x27, 0
 	ldrh	w3, [x1,748]
 	ldrh	w2, [x1,830]
 	mov	w20, w27
 	mov	x23, x1
-.L1797:
+.L1811:
 	cmp	w3, w27, uxth
-	bls	.L1830
+	bls	.L1844
 	add	x0, x23, 776
 	mov	w1, w21
 	str	x2, [x29,112]
@@ -11195,7 +11314,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	x3, [x29,120]
 	ldr	x2, [x29,112]
-	cbnz	w0, .L1756
+	cbnz	w0, .L1770
 	mov	w0, 56
 	ldr	x1, [x23,992]
 	lsl	w28, w28, 10
@@ -11214,11 +11333,11 @@ FtlScanSysBlk:
 	ldr	x4, [x23,1128]
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x0,16]
-.L1756:
+.L1770:
 	add	x27, x27, 1
-	b	.L1797
-.L1830:
-	cbz	w20, .L1759
+	b	.L1811
+.L1844:
+	cbz	w20, .L1773
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w1, w20
 	mov	w2, 1
@@ -11227,9 +11346,9 @@ FtlScanSysBlk:
 	adrp	x28, .LANCHOR0
 	ldr	x0, [x0,992]
 	bl	FlashReadPages
-.L1760:
+.L1774:
 	cmp	w20, w23, uxth
-	bls	.L1759
+	bls	.L1773
 	add	x0, x19, :lo12:.LANCHOR2
 	mul	x5, x23, x26
 	ldr	x0, [x0,992]
@@ -11239,9 +11358,9 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x25, [x1,16]
 	ubfx	x24, x4, 10, 16
-	bne	.L1762
+	bne	.L1776
 	mov	w6, 16
-.L1761:
+.L1775:
 	add	x7, x19, :lo12:.LANCHOR2
 	str	x6, [x29,104]
 	str	x7, [x29,112]
@@ -11262,44 +11381,44 @@ FtlScanSysBlk:
 	ldr	x5, [x29,120]
 	ldr	x6, [x29,104]
 	ldr	x0, [x7,992]
-	bne	.L1763
+	bne	.L1777
 	str	w27, [x0,x5]
-	b	.L1762
-.L1763:
+	b	.L1776
+.L1777:
 	ldr	w0, [x0,x5]
 	cmn	w0, #1
-	bne	.L1762
+	bne	.L1776
 	sub	w6, w6, #1
 	uxth	w6, w6
-	cbnz	w6, .L1761
-.L1762:
+	cbnz	w6, .L1775
+.L1776:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	x1, [x0,992]
 	ldr	w1, [x1,x5]
 	cmn	w1, #1
-	beq	.L1765
+	beq	.L1779
 	ldr	w0, [x0,872]
 	cmn	w0, #1
-	beq	.L1766
+	beq	.L1780
 	ldr	w1, [x25,4]
 	cmp	w0, w1
-	bhi	.L1767
-.L1766:
+	bhi	.L1781
+.L1780:
 	ldr	w0, [x25,4]
 	cmn	w0, #1
-	beq	.L1767
+	beq	.L1781
 	add	x1, x19, :lo12:.LANCHOR2
 	add	w0, w0, 1
 	str	w0, [x1,872]
-.L1767:
+.L1781:
 	ldrh	w0, [x25]
 	mov	w1, 61604
 	cmp	w0, w1
-	beq	.L1769
-	bhi	.L1770
+	beq	.L1783
+	bhi	.L1784
 	mov	w1, 61574
 	cmp	w0, w1
-	bne	.L1768
+	bne	.L1782
 	add	x5, x19, :lo12:.LANCHOR2
 	ldrh	w6, [x5,840]
 	ldrh	w0, [x5,1392]
@@ -11307,16 +11426,16 @@ FtlScanSysBlk:
 	ldr	x5, [x5,1224]
 	sxth	x1, w2
 	sub	w2, w2, w0
-	b	.L1783
-.L1770:
+	b	.L1797
+.L1784:
 	mov	w1, 61634
 	cmp	w0, w1
-	beq	.L1772
+	beq	.L1786
 	cmp	w0, w22
-	bne	.L1768
+	bne	.L1782
 	mov	w0, w24
-	b	.L1829
-.L1772:
+	b	.L1843
+.L1786:
 	add	x5, x19, :lo12:.LANCHOR2
 	ldr	w6, [x5,848]
 	ldrh	w0, [x5,3908]
@@ -11327,27 +11446,27 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	sxth	x1, w1
 	sxth	w2, w2
-.L1774:
+.L1788:
 	cmp	w1, w2
-	ble	.L1831
+	ble	.L1845
 	sbfiz	x7, x1, 2, 32
 	ldr	w10, [x25,4]
 	sxth	x8, w1
 	ldr	w9, [x5,x7]
 	cmp	w10, w9
-	bls	.L1775
+	bls	.L1789
 	ldr	w2, [x5]
-	cbnz	w2, .L1776
+	cbnz	w2, .L1790
 	cmp	w0, w6
-	beq	.L1776
+	beq	.L1790
 	add	x2, x19, :lo12:.LANCHOR2
 	add	w0, w0, 1
 	strh	w0, [x2,3908]
-.L1776:
+.L1790:
 	mov	w0, 0
-.L1777:
+.L1791:
 	cmp	w0, w1
-	beq	.L1832
+	beq	.L1846
 	add	x5, x19, :lo12:.LANCHOR2
 	sxtw	x2, w0
 	lsl	x6, x2, 2
@@ -11362,31 +11481,31 @@ FtlScanSysBlk:
 	add	x6, x5, x2
 	ldrh	w6, [x6,2]
 	strh	w6, [x5,x2]
-	b	.L1777
-.L1832:
+	b	.L1791
+.L1846:
 	add	x2, x19, :lo12:.LANCHOR2
 	ldr	w5, [x25,4]
 	ldr	x0, [x2,1256]
 	str	w5, [x0,x7]
 	ldr	x0, [x2,1192]
 	strh	w24, [x0,x8,lsl 1]
-	tbz	w1, #31, .L1779
-	b	.L1768
-.L1775:
+	tbz	w1, #31, .L1793
+	b	.L1782
+.L1789:
 	sub	w1, w1, #1
 	sxth	x1, w1
-	b	.L1774
-.L1831:
-	tbz	w1, #31, .L1812
-	b	.L1768
-.L1779:
+	b	.L1788
+.L1845:
+	tbz	w1, #31, .L1826
+	b	.L1782
+.L1793:
 	ldrh	w0, [x2,3908]
 	ldr	w2, [x2,848]
 	sub	w2, w2, w0
 	sub	w2, w2, #1
 	cmp	w1, w2, sxth
-	bgt	.L1768
-.L1812:
+	bgt	.L1782
+.L1826:
 	add	x2, x19, :lo12:.LANCHOR2
 	add	w0, w0, 1
 	ldr	w3, [x25,4]
@@ -11394,33 +11513,33 @@ FtlScanSysBlk:
 	ldr	x0, [x2,1256]
 	str	w3, [x0,x1,lsl 2]
 	ldr	x0, [x2,1192]
-	b	.L1828
-.L1789:
+	b	.L1842
+.L1803:
 	sbfiz	x7, x1, 2, 32
 	ldr	w10, [x25,4]
 	sxth	x8, w1
 	ldr	w9, [x5,x7]
 	cmp	w10, w9
-	bhi	.L1833
+	bhi	.L1847
 	sub	w1, w1, #1
 	sxth	x1, w1
-.L1783:
+.L1797:
 	cmp	w1, w2
-	bgt	.L1789
-	b	.L1788
-.L1833:
+	bgt	.L1803
+	b	.L1802
+.L1847:
 	ldr	w2, [x5]
-	cbnz	w2, .L1785
+	cbnz	w2, .L1799
 	cmp	w0, w6
-	beq	.L1785
+	beq	.L1799
 	add	x2, x19, :lo12:.LANCHOR2
 	add	w0, w0, 1
 	strh	w0, [x2,1392]
-.L1785:
+.L1799:
 	mov	w0, 0
-.L1786:
+.L1800:
 	cmp	w0, w1
-	beq	.L1834
+	beq	.L1848
 	add	x5, x19, :lo12:.LANCHOR2
 	sxtw	x2, w0
 	lsl	x6, x2, 2
@@ -11435,105 +11554,105 @@ FtlScanSysBlk:
 	add	x6, x5, x2
 	ldrh	w6, [x6,2]
 	strh	w6, [x5,x2]
-	b	.L1786
-.L1834:
+	b	.L1800
+.L1848:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w5, [x25,4]
 	ldr	x2, [x0,1224]
 	str	w5, [x2,x7]
 	ldr	x0, [x0,1208]
 	strh	w24, [x0,x8,lsl 1]
-.L1788:
-	tbnz	w1, #31, .L1768
+.L1802:
+	tbnz	w1, #31, .L1782
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w2, [x0,840]
 	ldrh	w5, [x0,1392]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w1, w2, sxth
-	bgt	.L1768
+	bgt	.L1782
 	ldr	x2, [x0,1224]
 	add	w5, w5, 1
 	ldr	w3, [x25,4]
 	strh	w5, [x0,1392]
 	str	w3, [x2,x1,lsl 2]
 	ldr	x0, [x0,1208]
-.L1828:
+.L1842:
 	strh	w24, [x0,x1,lsl 1]
-	b	.L1768
-.L1769:
+	b	.L1782
+.L1783:
 	add	x0, x19, :lo12:.LANCHOR2
 	add	x1, x0, 3896
 	ldrh	w2, [x0,3896]
 	cmp	w2, w22
-	bne	.L1790
+	bne	.L1804
 	strh	w24, [x0,3896]
 	ldr	w0, [x25,4]
 	str	w0, [x1,8]
-	b	.L1768
-.L1790:
+	b	.L1782
+.L1804:
 	ldrh	w0, [x1,4]
 	cmp	w0, w22
-	beq	.L1791
+	beq	.L1805
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1791:
+.L1805:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	w2, [x25,4]
 	add	x0, x1, 3896
 	ldr	w5, [x0,8]
 	cmp	w5, w2
-	bcs	.L1792
+	bcs	.L1806
 	ldrh	w2, [x1,3896]
 	strh	w2, [x0,4]
 	strh	w24, [x1,3896]
 	ldr	w1, [x25,4]
 	str	w1, [x0,8]
-	b	.L1768
-.L1792:
+	b	.L1782
+.L1806:
 	strh	w24, [x0,4]
-	b	.L1768
-.L1765:
+	b	.L1782
+.L1779:
 	add	x0, x28, :lo12:.LANCHOR0
 	ldrb	w1, [x0,136]
 	mov	w0, w24
-	cbz	w1, .L1793
-.L1829:
+	cbz	w1, .L1807
+.L1843:
 	mov	w1, 0
-.L1793:
+.L1807:
 	bl	FtlFreeSysBlkQueueIn
-.L1768:
+.L1782:
 	add	x23, x23, 1
-	b	.L1760
-.L1759:
+	b	.L1774
+.L1773:
 	add	w21, w21, 1
 	uxth	w21, w21
-	b	.L1755
-.L1796:
+	b	.L1769
+.L1810:
 	ldr	x2, [x1,1192]
 	ldrh	w0, [x2]
-	cbz	w0, .L1798
-.L1801:
+	cbz	w0, .L1812
+.L1815:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	x2, [x1,1208]
 	ldrh	w0, [x2]
-	cbz	w0, .L1799
-	b	.L1822
-.L1798:
+	cbz	w0, .L1813
+	b	.L1836
+.L1812:
 	ldrh	w3, [x1,3908]
-	cbz	w3, .L1801
+	cbz	w3, .L1815
 	ldr	w1, [x1,848]
-.L1802:
+.L1816:
 	cmp	w0, w1
-	bcs	.L1801
+	bcs	.L1815
 	ldrh	w3, [x2,w0,sxtw 1]
-	cbz	w3, .L1803
+	cbz	w3, .L1817
 	mov	w6, w0
-.L1804:
+.L1818:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	w2, [x1,848]
 	cmp	w0, w2
-	bcs	.L1801
+	bcs	.L1815
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	ldr	x4, [x1,1192]
@@ -11548,26 +11667,26 @@ FtlScanSysBlk:
 	str	w5, [x4,x2,lsl 2]
 	ldr	x1, [x1,1192]
 	strh	wzr, [x1,x3]
-	b	.L1804
-.L1803:
+	b	.L1818
+.L1817:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1802
-.L1799:
+	b	.L1816
+.L1813:
 	ldrh	w3, [x1,1392]
-	cbz	w3, .L1822
+	cbz	w3, .L1836
 	ldrh	w1, [x1,840]
-.L1807:
+.L1821:
 	cmp	w0, w1
 	mov	w6, w0
-	bge	.L1822
+	bge	.L1836
 	ldrh	w3, [x2,w0,sxtw 1]
-	cbz	w3, .L1808
-.L1809:
+	cbz	w3, .L1822
+.L1823:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldrh	w2, [x1,840]
 	cmp	w0, w2
-	bge	.L1822
+	bge	.L1836
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	ldr	x4, [x1,1208]
@@ -11582,12 +11701,12 @@ FtlScanSysBlk:
 	str	w5, [x4,x2,lsl 2]
 	ldr	x1, [x1,1208]
 	strh	wzr, [x1,x3]
-	b	.L1809
-.L1808:
+	b	.L1823
+.L1822:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1807
-.L1822:
+	b	.L1821
+.L1836:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11615,18 +11734,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1836
-	adrp	x0, .LC45
-	adrp	x1, .LC46
-	add	x1, x1, :lo12:.LC46
-	add	x0, x0, :lo12:.LC45
+	beq	.L1850
+	adrp	x0, .LC47
+	adrp	x1, .LC48
+	add	x1, x1, :lo12:.LC48
+	add	x0, x0, :lo12:.LC47
 	bl	printk
 	ldrh	w2, [x19,1144]
 	mov	w1, 0
 	ldr	x0, [x19,1160]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1836:
+.L1850:
 	mov	w0, 0
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -11639,10 +11758,10 @@ ftl_set_blk_mode:
 	stp	x29, x30, [sp, -16]!
 	uxth	w0, w0
 	add	x29, sp, 0
-	cbz	w1, .L1838
+	cbz	w1, .L1852
 	bl	ftl_set_blk_mode.part.17
-	b	.L1837
-.L1838:
+	b	.L1851
+.L1852:
 	adrp	x1, .LANCHOR0+16
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -11652,7 +11771,7 @@ ftl_set_blk_mode:
 	ldr	w1, [x3,x2]
 	bic	w0, w1, w0
 	str	w0, [x3,x2]
-.L1837:
+.L1851:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
@@ -11670,301 +11789,645 @@ ftl_get_blk_mode:
 	ret
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	stp	x29, x30, [sp, -128]!
-	mov	w1, 0
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	stp	x29, x30, [sp, -96]!
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC49
+	add	x1, x1, :lo12:.LANCHOR3
 	add	x29, sp, 0
+	add	x1, x1, 16
+	add	x0, x0, :lo12:.LC49
+	str	x25, [sp,64]
 	stp	x19, x20, [sp,16]
+	adrp	x19, .LANCHOR2
+	mov	w20, 0
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
-	stp	x25, x26, [sp,64]
-	stp	x27, x28, [sp,80]
-	mov	x19, x0
-	adrp	x21, .LANCHOR2
-	ldr	x0, [x0,40]
-	mov	w26, 0
-	str	x0, [x29,120]
+	add	x19, x19, :lo12:.LANCHOR2
+	bl	printk
+	add	x0, x19, 3912
+	mov	w1, 0
+	mov	x2, 8192
+	bl	memset
+.L1856:
+	ldr	w0, [x19,1396]
+	cmp	w20, w0
+	bcs	.L1873
+	mov	w0, w20
+	add	x1, x29, 92
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x29,92]
+	cmn	w0, #1
+	beq	.L1857
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	uxth	w0, w0
+	add	x2, x19, 3912
+	ldrh	w1, [x2,w0,sxtw 1]
+	add	w1, w1, 1
+	strh	w1, [x2,w0,sxtw 1]
+.L1857:
+	add	w20, w20, 1
+	b	.L1856
+.L1873:
+	ldr	x1, [x19,1184]
+	adrp	x0, .LC50
+	ldrh	w3, [x19,756]
+	add	x0, x0, :lo12:.LC50
+	mov	w2, 2
+	adrp	x21, .LC52
+	mov	w20, 0
+	add	x21, x21, :lo12:.LC52
+	bl	rknand_print_hex
+	adrp	x0, .LC51
+	ldrh	w3, [x19,756]
+	add	x0, x0, :lo12:.LC51
+	add	x1, x19, 3912
+	mov	w2, 2
+	bl	rknand_print_hex
+.L1859:
+	ldrh	w0, [x19,756]
+	cmp	w0, w20
+	bls	.L1874
+	ubfiz	x0, x20, 1, 16
+	ldr	x1, [x19,1184]
+	ldrh	w2, [x1,x0]
+	add	x0, x19, 3912
+	ldrh	w3, [x0,w20,sxtw 1]
+	cmp	w2, w3
+	beq	.L1860
+	mov	x0, x21
+	mov	w1, w20
+	bl	printk
+.L1860:
+	add	w20, w20, 1
+	uxth	w20, w20
+	b	.L1859
+.L1874:
+	ldr	x0, [x19,3592]
+	cbz	x0, .L1855
+	ldr	x20, [x19,1280]
+	adrp	x22, .LC53
+	ldrh	w23, [x19,3600]
+	mov	w21, 0
+	sub	x20, x0, x20
+	mov	x0, -6148914691236517206
+	asr	x20, x20, 1
+	add	x22, x22, :lo12:.LC53
+	mov	w24, 6
+	mov	w25, 65535
+	madd	x20, x0, x20, x20
+	uxth	w20, w20
+.L1863:
+	cmp	w21, w23
+	beq	.L1855
+	ubfiz	x0, x20, 1, 16
+	ldr	x1, [x19,1184]
+	ldrh	w2, [x1,x0]
+	cbz	w2, .L1864
+	add	x3, x19, 3912
+	mov	x0, x22
+	mov	w1, w20
+	ldrh	w3, [x3,w20,sxtw 1]
+	bl	printk
+.L1864:
+	umull	x20, w20, w24
+	ldr	x0, [x19,1280]
+	ldrh	w20, [x0,x20]
+	cmp	w20, w25
+	beq	.L1855
+	add	w21, w21, 1
+	uxth	w21, w21
+	b	.L1863
+.L1855:
+	ldp	x19, x20, [sp,16]
+	ldp	x21, x22, [sp,32]
+	ldp	x23, x24, [sp,48]
+	ldr	x25, [sp,64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.align	2
+	.global	FtlDumpSysBlock
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
+	sub	sp, sp, #96
+	adrp	x2, .LANCHOR2
+	add	x2, x2, :lo12:.LANCHOR2
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp,32]
+	stp	x21, x22, [sp,48]
+	stp	x23, x24, [sp,64]
+	str	x25, [sp,80]
+	add	x19, x2, 1408
+	uxth	w23, w0
+	adrp	x22, .LC54
+	ldr	x0, [x2,1048]
+	adrp	x25, .LC55
+	str	x0, [x19,8]
+	lsl	w24, w23, 10
+	ldr	x0, [x2,1112]
+	mov	w20, 0
+	str	x0, [x19,16]
+	mov	x21, x2
+	add	x22, x22, :lo12:.LC54
+	add	x25, x25, :lo12:.LC55
+.L1876:
+	ldrh	w0, [x21,820]
+	cmp	w20, w0
+	bge	.L1882
+	mov	w1, 1
+	orr	w0, w20, w24
+	mov	w2, w1
+	str	w0, [x19,4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x0, [x19,8]
+	mov	w1, w23
+	ldr	x7, [x19,16]
+	ldr	w0, [x0]
+	str	w0, [sp]
+	mov	x0, x22
+	ldr	w4, [x7]
+	ldr	w5, [x7,4]
+	ldr	w6, [x7,8]
+	ldr	w2, [x19]
+	ldr	w3, [x19,4]
+	ldr	w7, [x7,12]
+	bl	printk
+	ldr	x0, [x19,16]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1877
+	ldr	x1, [x21,1048]
+	mov	x0, x25
+	mov	w2, 4
+	mov	w3, 768
+	bl	rknand_print_hex
+.L1877:
+	add	w20, w20, 1
+	sxth	w20, w20
+	b	.L1876
+.L1882:
+	sub	sp, x29, #16
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldr	x25, [sp,80]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 96
+	ret
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
+	.align	2
+	.global	Ftlscanalldata
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	sub	sp, sp, #96
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	mov	w1, 0
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp,64]
+	adrp	x23, .LANCHOR2
+	stp	x21, x22, [sp,48]
+	adrp	x21, .LC57
+	add	x22, x23, :lo12:.LANCHOR2
+	stp	x19, x20, [sp,32]
+	add	x21, x21, :lo12:.LC57
+	mov	w20, 0
+	add	x19, x22, 1408
+	bl	printk
+.L1884:
+	add	x0, x23, :lo12:.LANCHOR2
+	ldr	w0, [x0,1396]
+	cmp	w20, w0
+	bcs	.L1891
+	mov	w0, w20
+	add	x1, x29, 76
+	mov	w2, 0
+	bl	log2phys
+	and	w0, w20, 2047
+	cbnz	w0, .L1885
+	ldr	w2, [x29,76]
+	mov	x0, x21
+	mov	w1, w20
+	bl	printk
+.L1885:
+	ldr	w0, [x29,76]
+	cmn	w0, #1
+	beq	.L1887
+	str	w0, [x19,4]
+	mov	w1, 1
+	ldr	x0, [x22,1048]
+	mov	w2, 0
+	str	x0, [x19,8]
+	mov	x0, x19
+	ldr	x24, [x22,1112]
+	str	w20, [x19,24]
+	str	x24, [x19,16]
+	str	wzr, [x19]
+	bl	FlashReadPages
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L1888
+	cmp	w0, 256
+	beq	.L1888
+	ldr	w0, [x24,8]
+	cmp	w0, w20
+	beq	.L1887
+.L1888:
+	ldr	x7, [x19,8]
+	mov	w1, w20
+	ldr	x6, [x19,16]
+	ldr	w0, [x7,4]
+	str	w0, [sp]
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
+	ldr	w3, [x6]
+	ldr	w4, [x6,4]
+	ldr	w5, [x6,8]
+	ldr	w2, [x19,4]
+	ldr	w6, [x6,12]
+	ldr	w7, [x7]
+	bl	printk
+.L1887:
+	add	w20, w20, 1
+	b	.L1884
+.L1891:
+	sub	sp, x29, #16
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 96
+	ret
+	.size	Ftlscanalldata, .-Ftlscanalldata
+	.align	2
+	.global	dump_map_info
+	.type	dump_map_info, %function
+dump_map_info:
+	sub	sp, sp, #128
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x21, x22, [sp,48]
+	adrp	x22, .LANCHOR2
+	add	x0, x22, :lo12:.LANCHOR2
+	stp	x25, x26, [sp,80]
+	stp	x23, x24, [sp,64]
+	stp	x27, x28, [sp,96]
+	stp	x19, x20, [sp,32]
+	adrp	x24, .LC59
+	mov	w25, 56
+	ldrh	w21, [x0,756]
+	mov	w26, 4
+	mov	x27, 56
+	add	x24, x24, :lo12:.LC59
+.L1893:
+	add	x19, x22, :lo12:.LANCHOR2
+	ldrh	w0, [x19,758]
+	cmp	w0, w21
+	bls	.L1906
+	mov	x23, 0
+	ldrh	w3, [x19,748]
+	ldrh	w2, [x19,830]
+	mov	w20, w23
+.L1902:
+	cmp	w3, w23, uxth
+	bls	.L1907
+	add	x0, x19, 776
+	mov	w1, w21
+	str	x2, [x29,96]
+	str	x3, [x29,104]
+	ldrb	w0, [x0,x23]
+	bl	V2P_block
+	uxth	w28, w0
+	bl	FtlBbmIsBadBlock
+	ldr	x3, [x29,104]
+	ldr	x2, [x29,96]
+	cbnz	w0, .L1894
+	umull	x0, w20, w25
+	ldr	x1, [x19,992]
+	lsl	w28, w28, 10
+	add	x1, x1, x0
+	str	w28, [x1,4]
+	ldr	x1, [x19,992]
+	ldr	x4, [x19,1128]
+	add	x0, x1, x0
+	ldr	x1, [x19,1072]
+	str	x1, [x0,8]
+	mul	w1, w20, w2
+	add	w20, w20, 1
+	sdiv	w1, w1, w26
+	uxth	w20, w20
+	add	x1, x4, x1, sxtw 2
+	str	x1, [x0,16]
+.L1894:
+	add	x23, x23, 1
+	b	.L1902
+.L1907:
+	cbz	w20, .L1897
+	add	x0, x22, :lo12:.LANCHOR2
+	mov	w1, w20
+	mov	w2, 1
+	mov	x19, 0
+	ldr	x0, [x0,992]
+	bl	FlashReadPages
+.L1898:
+	cmp	w20, w19, uxth
+	bls	.L1897
+	add	x0, x22, :lo12:.LANCHOR2
+	ldr	x0, [x0,992]
+	madd	x0, x19, x27, x0
+	add	x19, x19, 1
+	ldr	x7, [x0,8]
+	ldr	x6, [x0,16]
+	ldr	w2, [x0,4]
+	ldr	w0, [x7,4]
+	str	w0, [sp]
+	ubfx	x1, x2, 10, 16
+	mov	x0, x24
+	ldr	w3, [x6]
+	ldr	w4, [x6,4]
+	ldr	w5, [x6,8]
+	ldr	w7, [x7]
+	ldr	w6, [x6,12]
+	bl	printk
+	b	.L1898
+.L1897:
+	add	w21, w21, 1
+	uxth	w21, w21
+	b	.L1893
+.L1906:
+	adrp	x23, .LC60
+	mov	w21, 0
+	add	x22, x19, 1408
+	add	x23, x23, :lo12:.LC60
+.L1901:
+	ldrh	w0, [x19,3908]
+	cmp	w21, w0
+	bge	.L1904
+	sbfiz	x24, x21, 1, 32
+	mov	w20, 0
+.L1905:
+	ldrh	w0, [x19,820]
+	cmp	w20, w0
+	bge	.L1908
+	ldr	x0, [x19,1192]
+	mov	w1, 1
+	mov	w2, w1
+	ldrh	w0, [x0,x24]
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x22,4]
+	mov	x0, x22
+	add	w20, w20, 1
+	bl	FlashReadPages
+	sxth	w20, w20
+	ldr	x0, [x22,8]
+	ldr	x1, [x19,1192]
+	ldr	x7, [x22,16]
+	ldr	w2, [x0]
+	ldrh	w1, [x1,x24]
+	str	w2, [sp]
+	ldr	w0, [x0,4]
+	str	w0, [sp,8]
+	mov	x0, x23
+	ldr	w4, [x7]
+	ldr	w5, [x7,4]
+	ldr	w6, [x7,8]
+	ldr	w2, [x22]
+	ldr	w3, [x22,4]
+	ldr	w7, [x7,12]
+	bl	printk
+	b	.L1905
+.L1908:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L1901
+.L1904:
+	ldr	x1, [x19,1192]
+	adrp	x0, .LC61
+	ldr	w3, [x19,848]
+	add	x0, x0, :lo12:.LC61
+	mov	w2, 2
+	bl	rknand_print_hex
+	ldr	x1, [x19,1240]
+	adrp	x0, .LC62
+	ldrh	w3, [x19,856]
+	add	x0, x0, :lo12:.LC62
+	mov	w2, 4
+	bl	rknand_print_hex
+	ldr	x1, [x19,1248]
+	adrp	x0, .LC63
+	ldrh	w3, [x19,856]
+	add	x0, x0, :lo12:.LC63
+	mov	w2, 4
+	bl	rknand_print_hex
+	sub	sp, x29, #16
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldp	x25, x26, [sp,80]
+	ldp	x27, x28, [sp,96]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 128
+	ret
+	.size	dump_map_info, .-dump_map_info
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -128]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp,16]
+	mov	x19, x0
+	adrp	x20, .LANCHOR2
+	stp	x21, x22, [sp,32]
+	stp	x23, x24, [sp,48]
+	stp	x25, x26, [sp,64]
+	stp	x27, x28, [sp,80]
 	ldrh	w23, [x19,6]
-	ldrh	w0, [x19,8]
-	str	w0, [x29,116]
+	mov	w27, 0
+	ldr	x0, [x0,40]
 	lsl	w2, w23, 2
-	ldr	x0, [x29,120]
+	ldrh	w24, [x19,8]
+	str	x0, [x29,120]
 	ldr	x22, [x19,16]
 	ldr	x25, [x19,24]
 	bl	ftl_memset
+	add	x5, x20, :lo12:.LANCHOR2
+	str	x20, [x29,112]
+	add	x4, x5, 1408
 	str	wzr, [x19,52]
-	add	x1, x21, :lo12:.LANCHOR2
 	str	wzr, [x19,48]
-	add	x6, x1, 1408
-	mov	x27, x1
-	mov	x24, x6
-	ldr	x0, [x1,1048]
-	ldr	x20, [x1,1112]
-	str	x0, [x1,1416]
+	mov	x26, x5
+	ldr	x0, [x5,1048]
+	mov	x20, x4
+	ldr	x21, [x5,1112]
+	str	x0, [x5,1416]
 	mov	w0, -1
-	str	x20, [x1,1424]
+	str	x21, [x5,1424]
 	strh	w0, [x19]
 	strh	w0, [x19,2]
 	mov	w0, 1
 	str	w0, [x19,56]
-	ldr	w0, [x29,116]
-	sub	w0, w0, #1
-	str	w0, [x29,112]
-.L1842:
-	ldr	w0, [x29,116]
-	cmp	w26, w0
-	bge	.L1859
-	ldr	w0, [x29,112]
-	sxtw	x28, w26
-	cmp	w26, w0
-	bne	.L1843
+	sub	w0, w24, #1
+	str	w0, [x29,108]
+.L1910:
+	cmp	w27, w24
+	bge	.L1927
+	ldr	w0, [x29,108]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L1911
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
 	ldrh	w0, [x22,x0]
+	mov	w22, 0
 	bl	FtlGetLastWrittenPage
-	strh	w26, [x19]
-	sxth	w27, w0
+	strh	w27, [x19]
+	sxth	w26, w0
 	add	w0, w0, 1
 	strh	w0, [x19,2]
-	add	x26, x21, :lo12:.LANCHOR2
-	add	w27, w27, 1
-	add	x26, x26, 1408
+	add	w26, w26, 1
 	ldr	w0, [x25,x28,lsl 2]
-	mov	w25, 0
 	str	w0, [x19,48]
-.L1844:
-	cmp	w25, w27
-	bge	.L1859
+	ldr	x0, [x29,112]
+	add	x25, x0, :lo12:.LANCHOR2
+	add	x25, x25, 1408
+.L1912:
+	cmp	w22, w26
+	bge	.L1927
 	ldrh	w0, [x24]
 	mov	w1, 1
 	mov	w2, w1
-	orr	w0, w25, w0, lsl 10
-	str	w0, [x26,4]
-	mov	x0, x26
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x25,4]
+	mov	x0, x25
 	bl	FlashReadPages
-	ldr	w0, [x26]
+	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L1845
-	ldrh	w0, [x20,8]
+	beq	.L1913
+	ldrh	w0, [x21,8]
 	cmp	w0, w23
-	bcs	.L1846
-	ldrh	w2, [x20]
+	bcs	.L1914
+	ldrh	w2, [x21]
 	ldrh	w1, [x19,4]
 	cmp	w2, w1
-	bne	.L1846
+	bne	.L1914
 	ubfiz	x0, x0, 2, 16
 	ldr	x2, [x29,120]
-	ldr	w1, [x26,4]
+	ldr	w1, [x25,4]
 	str	w1, [x2,x0]
-	b	.L1846
-.L1845:
+	b	.L1914
+.L1913:
 	ldrh	w0, [x24]
 	strh	w0, [x19,60]
-.L1846:
-	add	w25, w25, 1
-	sxth	w25, w25
-	b	.L1844
-.L1859:
-	add	x20, x21, :lo12:.LANCHOR2
-	add	x0, x20, 3752
-	cmp	x19, x0
-	bne	.L1849
-	b	.L1886
-.L1843:
-	ldr	x0, [x27,1048]
-	lsl	x1, x28, 1
-	str	x0, [x24,8]
-	add	x28, x22, x1
-	ldrh	w0, [x27,820]
-	ldrh	w1, [x22,x1]
+.L1914:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L1912
+.L1927:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	ldr	x0, [x29,112]
+	ldrh	w1, [x19,2]
+	add	x20, x0, :lo12:.LANCHOR2
+	ldrh	w0, [x20,820]
+	cmp	w1, w0
+	bne	.L1917
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+	b	.L1917
+.L1911:
+	ldr	x0, [x26,1048]
+	str	x0, [x20,8]
+	lsl	x0, x28, 1
+	add	x28, x22, x0
+	ldrh	w1, [x22,x0]
+	ldrh	w0, [x26,820]
 	sub	w0, w0, #1
 	orr	w0, w0, w1, lsl 10
 	mov	w1, 1
-	str	w0, [x24,4]
+	str	w0, [x20,4]
 	mov	w2, w1
-	mov	x0, x24
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1873
-	ldrh	w1, [x20]
+	beq	.L1928
+	ldrh	w1, [x21]
 	mov	w3, 0
 	ldrh	w0, [x19,4]
 	cmp	w1, w0
-	bne	.L1883
-	ldrh	w0, [x20,8]
+	bne	.L1934
+	ldrh	w0, [x21,8]
 	mov	w1, 64245
 	cmp	w0, w1
-	bne	.L1883
-.L1851:
-	ldrh	w0, [x27,820]
+	bne	.L1934
+.L1919:
+	ldrh	w0, [x26,820]
 	sub	w0, w0, #1
 	cmp	w3, w0
-	bge	.L1854
-	ldr	x0, [x27,1048]
-	sbfiz	x2, x3, 3, 32
-	ldrh	w1, [x0,x2]
-	cmp	w1, w23
-	bcs	.L1852
-	add	x2, x0, x2
-	ubfiz	x1, x1, 2, 16
-	ldr	w0, [x2,4]
+	bge	.L1922
+	ldr	x2, [x26,1048]
+	sbfiz	x1, x3, 3, 32
+	ldrh	w0, [x2,x1]
+	cmp	w0, w23
+	bcs	.L1920
+	add	x1, x2, x1
+	ubfiz	x0, x0, 2, 16
 	ldr	x2, [x29,120]
-	str	w0, [x2,x1]
-.L1852:
+	ldr	w1, [x1,4]
+	str	w1, [x2,x0]
+.L1920:
 	add	w3, w3, 1
 	sxth	w3, w3
-	b	.L1851
-.L1873:
+	b	.L1919
+.L1928:
 	mov	w3, 0
-.L1883:
-	ldrh	w0, [x27,820]
+.L1934:
+	ldrh	w0, [x26,820]
 	cmp	w3, w0
-	bge	.L1854
+	bge	.L1922
 	ldrh	w0, [x28]
 	mov	w1, 1
 	mov	w2, w1
-	str	x3, [x29,104]
+	str	x3, [x29,96]
 	orr	w0, w3, w0, lsl 10
-	str	w0, [x24,4]
-	mov	x0, x24
+	str	w0, [x20,4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
-	ldr	x3, [x29,104]
+	ldr	w0, [x20]
+	ldr	x3, [x29,96]
 	cmn	w0, #1
-	beq	.L1855
-	ldrh	w1, [x20,8]
-	cmp	w1, w23
-	bcs	.L1855
-	ldrh	w2, [x20]
-	ldrh	w0, [x19,4]
-	cmp	w2, w0
-	bne	.L1855
-	ubfiz	x1, x1, 2, 16
+	beq	.L1923
+	ldrh	w0, [x21,8]
+	cmp	w0, w23
+	bcs	.L1923
+	ldrh	w2, [x21]
+	ldrh	w1, [x19,4]
+	cmp	w2, w1
+	bne	.L1923
+	ubfiz	x0, x0, 2, 16
 	ldr	x2, [x29,120]
-	ldr	w0, [x24,4]
-	str	w0, [x2,x1]
-.L1855:
+	ldr	w1, [x20,4]
+	str	w1, [x2,x0]
+.L1923:
 	add	w3, w3, 1
 	sxth	w3, w3
-	b	.L1883
-.L1854:
-	add	w4, w26, 1
-	sxth	w26, w4
-	b	.L1842
-.L1871:
-	ubfiz	x23, x24, 2, 32
-	ldr	x0, [x20,1248]
-	ldr	w1, [x0,x23]
-	sub	w2, w1, #1
-	cmn	w2, #3
-	bls	.L1887
-.L1864:
-	add	w24, w24, 1
-.L1862:
-	ldrh	w0, [x20,856]
-	cmp	w24, w0
-	bcc	.L1871
-.L1849:
-	mov	x0, x19
-	add	x21, x21, :lo12:.LANCHOR2
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19,2]
-	ldrh	w0, [x21,820]
-	cmp	w1, w0
-	bne	.L1861
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-	b	.L1861
-.L1886:
-	ldrh	w0, [x20,860]
-	cbz	w0, .L1849
-	adrp	x25, .LC47
-	mov	w24, 0
-	add	x27, x20, 1408
-	add	x25, x25, :lo12:.LC47
-	b	.L1862
-.L1887:
-	ldr	x2, [x20,1240]
-	ldr	w2, [x2,x23]
-	cmp	w1, w2
-	beq	.L1864
-	ldr	x1, [x20,1048]
-	ldr	x26, [x20,1112]
-	str	x1, [x27,8]
-	mov	w1, 1
-	str	x26, [x27,16]
-	mov	w2, w1
-	ldr	w0, [x0,x23]
-	str	w0, [x27,4]
-	mov	x0, x27
-	bl	FlashReadPages
-	ldr	w0, [x27]
-	cmn	w0, #1
-	beq	.L1864
-	ldrh	w1, [x26]
-	ldrh	w0, [x20,3756]
-	cmp	w1, w0
-	bne	.L1864
-	ldr	x0, [x20,1240]
-	ldr	w3, [x26,4]
-	ldr	w1, [x0,x23]
-	str	w1, [x27,4]
-	ldr	w0, [x0,x23]
-	cbnz	w0, .L1866
-	str	w0, [x26,4]
-	b	.L1867
-.L1866:
-	mov	w1, 1
-	mov	x0, x27
-	mov	w2, w1
-	str	x3, [x29,120]
-	bl	FlashReadPages
-	ldr	x3, [x29,120]
-.L1867:
-	ldr	w4, [x26,4]
-	cmp	w3, w4
-	bls	.L1864
-	ldr	x1, [x20,1248]
-	mov	x0, x25
-	ldr	x2, [x20,1240]
-	ldr	w1, [x1,x23]
-	ldr	w2, [x2,x23]
-	bl	printk
-	ldr	x0, [x20,1248]
-	ldr	w1, [x0,x23]
-	ldr	x0, [x20,1240]
-	str	w1, [x0,x23]
-	mov	w1, 0
-	ldr	x0, [x20,1248]
-	ldrh	w3, [x20,3908]
-	ldr	w2, [x0,x23]
-	ubfx	x2, x2, 10, 16
-.L1868:
-	cmp	w1, w3
-	bge	.L1888
-	ldrh	w0, [x22,w1,sxtw 1]
-	cmp	w0, w2
-	beq	.L1864
-	add	w1, w1, 1
-	sxth	w1, w1
-	b	.L1868
-.L1888:
-	ldr	w0, [x20,848]
-	cmp	w3, w0
-	bcs	.L1864
-	ubfiz	x3, x3, 1, 16
-	strh	w2, [x22,x3]
-	ldrh	w0, [x20,3908]
-	add	w0, w0, 1
-	strh	w0, [x20,3908]
-	mov	w0, w2
-	bl	remove_from_free_sys_Queue
-	b	.L1864
-.L1861:
+	b	.L1934
+.L1922:
+	add	w6, w27, 1
+	sxth	w27, w6
+	b	.L1910
+.L1917:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -12032,11 +12495,11 @@ FtlL2PDataInit:
 	bl	ftl_memset
 	mov	w2, 0
 	mov	w4, -1
-.L1891:
+.L1937:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w1, [x0,858]
 	cmp	w1, w2
-	bls	.L1893
+	bls	.L1939
 	ldr	x3, [x0,1264]
 	ubfiz	x1, x2, 4, 16
 	add	x3, x3, x1
@@ -12054,8 +12517,8 @@ FtlL2PDataInit:
 	and	x1, x1, -4
 	add	x0, x0, x1
 	str	x0, [x3,8]
-	b	.L1891
-.L1893:
+	b	.L1937
+.L1939:
 	ldr	w3, [x0,848]
 	add	x1, x0, 3752
 	strh	w3, [x0,3762]
@@ -12107,41 +12570,41 @@ ftl_sb_update_avl_pages:
 	strh	wzr, [x0,4]
 	mov	w6, 65535
 	ldrh	w4, [x4,748]
-.L1896:
+.L1942:
 	cmp	w2, w4
-	bcs	.L1902
+	bcs	.L1948
 	add	x5, x0, x2, sxtw 1
 	ldrh	w5, [x5,16]
 	cmp	w5, w6
-	beq	.L1897
+	beq	.L1943
 	ldrh	w5, [x0,4]
 	add	w5, w5, 1
 	strh	w5, [x0,4]
-.L1897:
+.L1943:
 	add	w2, w2, 1
 	uxth	w2, w2
-	b	.L1896
-.L1902:
+	b	.L1942
+.L1948:
 	add	x3, x3, :lo12:.LANCHOR2
 	mov	w6, 65535
 	add	x4, x0, x4, uxth 1
 	ldrh	w5, [x3,818]
 	mov	x3, x0
-.L1899:
+.L1945:
 	cmp	x3, x4
-	beq	.L1903
+	beq	.L1949
 	ldrh	w2, [x3,16]
 	cmp	w2, w6
-	beq	.L1900
+	beq	.L1946
 	ldrh	w2, [x0,4]
 	add	w2, w5, w2
 	sub	w2, w2, #1
 	sub	w2, w2, w1
 	strh	w2, [x0,4]
-.L1900:
+.L1946:
 	add	x3, x3, 2
-	b	.L1899
-.L1903:
+	b	.L1945
+.L1949:
 	ret
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	2
@@ -12162,9 +12625,9 @@ FtlReUsePrevPpa:
 	ubfiz	x22, x0, 1, 16
 	ldr	x3, [x2,1184]
 	ldrh	w1, [x3,x22]
-	cbnz	w1, .L1905
+	cbnz	w1, .L1951
 	ldr	x19, [x2,3592]
-	cbz	x19, .L1906
+	cbz	x19, .L1952
 	ldrh	w3, [x2,3600]
 	mov	x4, -6148914691236517206
 	ldr	x2, [x2,1280]
@@ -12174,11 +12637,11 @@ FtlReUsePrevPpa:
 	madd	x19, x4, x19, x19
 	mov	w4, 6
 	uxth	w19, w19
-.L1907:
+.L1953:
 	cmp	w1, w3
-	beq	.L1906
+	beq	.L1952
 	cmp	w19, w0
-	bne	.L1908
+	bne	.L1954
 	add	x21, x21, :lo12:.LANCHOR2
 	mov	w1, w19
 	add	x0, x21, 3592
@@ -12192,19 +12655,19 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1,x22]
 	add	w0, w0, 1
 	strh	w0, [x1,x22]
-	b	.L1906
-.L1908:
+	b	.L1952
+.L1954:
 	umull	x19, w19, w4
 	ldrh	w19, [x2,x19]
 	cmp	w19, w5
-	beq	.L1906
+	beq	.L1952
 	add	w1, w1, 1
 	uxth	w1, w1
-	b	.L1907
-.L1905:
+	b	.L1953
+.L1951:
 	add	w1, w1, 1
 	strh	w1, [x3,x22]
-.L1906:
+.L1952:
 	add	x1, x29, 60
 	mov	w0, w20
 	mov	w2, 1
@@ -12235,9 +12698,9 @@ make_superblock:
 	mov	x23, x1
 	mov	w25, -1
 	ldrh	w24, [x1,748]
-.L1914:
+.L1960:
 	cmp	w24, w21, uxth
-	bls	.L1925
+	bls	.L1971
 	add	x0, x23, 776
 	ldrh	w1, [x19]
 	ldrb	w0, [x0,x21]
@@ -12245,16 +12708,16 @@ make_superblock:
 	strh	w25, [x22]
 	mov	w26, w0
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1915
+	cbnz	w0, .L1961
 	strh	w26, [x22]
 	ldrb	w0, [x19,7]
 	add	w0, w0, 1
 	strb	w0, [x19,7]
-.L1915:
+.L1961:
 	add	x21, x21, 1
 	add	x22, x22, 2
-	b	.L1914
-.L1925:
+	b	.L1960
+.L1971:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrb	w1, [x19,7]
 	strb	wzr, [x19,9]
@@ -12262,21 +12725,21 @@ make_superblock:
 	mul	w1, w1, w2
 	strh	w1, [x19,4]
 	ldr	w1, [x0,652]
-	cbz	w1, .L1917
+	cbz	w1, .L1963
 	ldrh	w1, [x19]
 	ldr	x0, [x0,1168]
 	ldrh	w0, [x0,x1,lsl 1]
 	cmp	w0, 59
-	bhi	.L1917
+	bhi	.L1963
 	mov	w0, 1
 	strb	w0, [x19,9]
-.L1917:
+.L1963:
 	adrp	x0, .LANCHOR0+24
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+24]
-	cbz	w0, .L1918
+	cbz	w0, .L1964
 	mov	w0, 1
 	strb	w0, [x19,9]
-.L1918:
+.L1964:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -12309,19 +12772,19 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20,3896]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1927
-.L1935:
+	bne	.L1973
+.L1981:
 	mov	w19, -1
-	b	.L1928
-.L1927:
+	b	.L1974
+.L1973:
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	sxth	w22, w0
 	add	w0, w0, 1
 	strh	w0, [x23,2]
 	mov	w23, 61604
-.L1929:
-	tbnz	w22, #31, .L1934
+.L1975:
+	tbnz	w22, #31, .L1980
 	ldrh	w0, [x20,3896]
 	mov	w1, 1
 	mov	w2, w1
@@ -12333,18 +12796,18 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1930
+	beq	.L1976
 	ldr	x0, [x20,1048]
 	ldr	w1, [x0]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1930
+	bne	.L1976
 	ldr	x0, [x20,1112]
 	ldrh	w0, [x0]
 	cmp	w0, w23
-	bne	.L1930
-.L1934:
+	bne	.L1976
+.L1980:
 	add	x20, x19, :lo12:.LANCHOR2
 	mov	w2, 48
 	add	x22, x20, 1408
@@ -12370,7 +12833,7 @@ FtlLoadSysInfo:
 	add	x1, x3, x1, lsl 2
 	bl	ftl_memcpy
 	ldrh	w0, [x20,860]
-	cbz	w0, .L1932
+	cbz	w0, .L1978
 	ldrh	w0, [x20,756]
 	ldr	x3, [x22,8]
 	lsr	w1, w0, 3
@@ -12382,55 +12845,57 @@ FtlLoadSysInfo:
 	and	x1, x1, 65532
 	add	x1, x3, x1
 	bl	ftl_memcpy
-	b	.L1932
-.L1930:
+	b	.L1978
+.L1976:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1929
-.L1932:
+	b	.L1975
+.L1978:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
 	ldr	w3, [x0,3520]
 	cmp	w3, w2
-	bne	.L1935
+	bne	.L1981
 	ldrb	w3, [x0,3530]
 	ldrh	w2, [x0,770]
-	ldrh	w4, [x0,3528]
-	strh	w4, [x0,3902]
+	ldrh	w6, [x0,3528]
+	strh	w6, [x0,3902]
 	cmp	w3, w2
-	bne	.L1935
+	bne	.L1981
 	ldrh	w3, [x0,818]
 	add	x21, x21, :lo12:.LANCHOR0
 	ldrh	w2, [x0,824]
-	str	w4, [x0,3912]
-	mul	w3, w3, w4
+	adrp	x4, .LANCHOR4
+	add	x5, x4, :lo12:.LANCHOR4
+	mov	x20, x4
+	mul	w3, w3, w6
 	str	w3, [x0,1396]
-	strh	wzr, [x0,3922]
+	str	w6, [x5,3400]
 	mul	w3, w3, w2
 	str	w3, [x21,4048]
 	ldrh	w2, [x0,1302]
 	ldr	w3, [x0,760]
-	strb	wzr, [x0,3926]
+	strh	wzr, [x5,3410]
 	sub	w2, w3, w2
 	ldrh	w3, [x0,748]
-	sub	w2, w2, w4
-	ldrh	w4, [x0,3534]
-	strh	w4, [x0,3608]
+	sub	w2, w2, w6
+	strb	wzr, [x5,3414]
+	strb	wzr, [x5,3416]
 	udiv	w2, w2, w3
 	ldrh	w3, [x0,3536]
-	strh	w2, [x0,3916]
-	lsr	w5, w3, 6
+	strh	w2, [x5,3404]
+	lsr	w7, w3, 6
 	and	w3, w3, 63
 	strb	w3, [x0,3614]
 	ldrb	w3, [x0,3531]
 	strb	w3, [x0,3616]
 	mov	w3, -1
-	strh	w3, [x0,3920]
+	strh	w3, [x5,3408]
 	ldrh	w3, [x0,3538]
 	strh	w3, [x0,3656]
 	ldrh	w3, [x0,3540]
-	strh	w5, [x0,3610]
+	ldrh	w6, [x0,3534]
 	lsr	w5, w3, 6
 	and	w3, w3, 63
 	strb	w3, [x0,3662]
@@ -12442,8 +12907,9 @@ FtlLoadSysInfo:
 	strh	w5, [x0,3658]
 	lsr	w5, w3, 6
 	and	w3, w3, 63
-	strb	wzr, [x0,3928]
+	strh	w6, [x0,3608]
 	strb	w3, [x0,3710]
+	strh	w7, [x0,3610]
 	strh	w5, [x0,3706]
 	ldrb	w3, [x0,3533]
 	strb	w3, [x0,3712]
@@ -12459,55 +12925,365 @@ FtlLoadSysInfo:
 	str	wzr, [x0,908]
 	str	wzr, [x0,916]
 	str	wzr, [x0,892]
-	bls	.L1936
+	bls	.L1982
 	str	w1, [x0,872]
-.L1936:
+.L1982:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w1, [x0,3556]
 	ldr	w2, [x0,876]
 	cmp	w1, w2
-	bls	.L1937
+	bls	.L1983
 	str	w1, [x0,876]
-.L1937:
+.L1983:
 	mov	w0, 65535
-	cmp	w4, w0
-	beq	.L1938
+	cmp	w6, w0
+	beq	.L1984
 	add	x0, x19, :lo12:.LANCHOR2
 	add	x0, x0, 3608
 	bl	make_superblock
-.L1938:
+.L1984:
 	add	x1, x19, :lo12:.LANCHOR2
 	add	x0, x1, 3656
 	ldrh	w2, [x1,3656]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1939
+	beq	.L1985
 	bl	make_superblock
-.L1939:
-	add	x1, x19, :lo12:.LANCHOR2
-	add	x0, x1, 3704
-	ldrh	w2, [x1,3704]
+.L1985:
+	add	x19, x19, :lo12:.LANCHOR2
 	mov	w1, 65535
+	add	x0, x19, 3704
+	ldrh	w2, [x19,3704]
 	cmp	w2, w1
-	beq	.L1940
+	beq	.L1986
 	bl	make_superblock
-.L1940:
-	add	x19, x19, :lo12:.LANCHOR2
-	mov	w1, 65535
-	add	x0, x19, 3920
-	ldrh	w2, [x19,3920]
+.L1986:
+	add	x1, x20, :lo12:.LANCHOR4
 	mov	w19, 0
+	add	x0, x1, 3408
+	ldrh	w2, [x1,3408]
+	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1928
+	beq	.L1974
+	bl	make_superblock
+.L1974:
+	mov	w0, w19
+	ldr	x23, [sp,48]
+	ldp	x19, x20, [sp,16]
+	ldp	x21, x22, [sp,32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.align	2
+	.global	FtlDumpBlockInfo
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	sub	sp, sp, #176
+	lsr	x0, x0, 10
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp,32]
+	stp	x21, x22, [sp,48]
+	stp	x23, x24, [sp,64]
+	stp	x25, x26, [sp,80]
+	stp	x27, x28, [sp,96]
+	uxtb	w24, w1
+	bl	P2V_block_in_plane
+	adrp	x2, .LANCHOR3
+	adrp	x20, .LANCHOR2
+	uxth	w22, w0
+	add	x1, x2, :lo12:.LANCHOR3
+	add	x19, x20, :lo12:.LANCHOR2
+	adrp	x0, .LC49
+	add	x1, x1, 32
+	add	x0, x0, :lo12:.LC49
+	ldrh	w23, [x19,818]
+	bl	printk
+	ldr	x3, [x19,1184]
+	ubfiz	x2, x22, 1, 16
+	adrp	x0, .LC64
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC64
+	ldrh	w2, [x3,x2]
+	bl	printk
+	strh	w22, [x29,112]
+	add	x0, x29, 112
+	bl	make_superblock
+	cbnz	w24, .L2000
+	adrp	x0, .LANCHOR0+136
+	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
+	cbz	w0, .L2000
+	mov	w0, w22
+	bl	ftl_get_blk_mode
+	cmp	w0, 1
+	mov	w22, w0
+	bne	.L1992
+	ldrh	w23, [x19,820]
+	b	.L1992
+.L2000:
+	mov	w22, 0
+.L1992:
+	add	x3, x20, :lo12:.LANCHOR2
+	adrp	x0, .LC65
+	adrp	x24, .LC60
+	add	x0, x0, :lo12:.LC65
+	mov	w1, w22
+	mov	w2, w23
+	ldrh	w3, [x3,818]
+	mov	w21, 0
+	mov	w26, 65535
+	mov	w27, 56
+	mov	w25, 4
+	add	x24, x24, :lo12:.LC60
+	bl	printk
+.L1993:
+	add	x0, x20, :lo12:.LANCHOR2
+	mov	x3, 0
+	mov	w19, w3
+	ldrh	w5, [x0,748]
+	ldrh	w6, [x0,828]
+	ldrh	w7, [x0,830]
+.L1994:
+	cmp	w5, w3, uxth
+	bls	.L2008
+	add	x0, x29, 112
+	add	x0, x0, x3, lsl 1
+	ldrh	w1, [x0,16]
+	cmp	w1, w26
+	beq	.L1995
+	add	x2, x20, :lo12:.LANCHOR2
+	orr	w1, w21, w1, lsl 10
+	umull	x0, w19, w27
+	ldr	x4, [x2,992]
+	add	x4, x4, x0
+	str	w1, [x4,4]
+	ldr	x1, [x2,992]
+	ldr	x4, [x2,1072]
+	add	x0, x1, x0
+	ldr	x2, [x2,1128]
+	mul	w1, w19, w6
+	sdiv	w1, w1, w25
+	add	x1, x4, x1, sxtw 2
+	str	x1, [x0,8]
+	mul	w1, w19, w7
+	add	w19, w19, 1
+	uxth	w19, w19
+	sdiv	w1, w1, w25
+	add	x1, x2, x1, sxtw 2
+	str	x1, [x0,16]
+.L1995:
+	add	x3, x3, 1
+	b	.L1994
+.L2008:
+	add	x0, x20, :lo12:.LANCHOR2
+	mov	w1, w19
+	mov	w2, w22
+	mov	x28, 0
+	ldr	x0, [x0,992]
+	bl	FlashReadPages
+	mov	x8, 56
+.L1997:
+	cmp	w19, w28, uxth
+	bls	.L2009
+	add	x0, x20, :lo12:.LANCHOR2
+	ldrh	w1, [x29,112]
+	mul	x2, x28, x8
+	str	x8, [x29,104]
+	add	x28, x28, 1
+	ldr	x4, [x0,992]
+	add	x3, x4, x2
+	ldr	x0, [x3,8]
+	ldr	x7, [x3,16]
+	ldr	w5, [x0]
+	str	w5, [sp]
+	ldr	w0, [x0,4]
+	str	w0, [sp,8]
+	mov	x0, x24
+	ldr	w2, [x4,x2]
+	ldr	w5, [x7,4]
+	ldr	w4, [x7]
+	ldr	w6, [x7,8]
+	ldr	w3, [x3,4]
+	ldr	w7, [x7,12]
+	bl	printk
+	ldr	x8, [x29,104]
+	b	.L1997
+.L2009:
+	add	w21, w21, 1
+	uxth	w21, w21
+	cmp	w21, w23
+	bne	.L1993
+.L1999:
+	sub	sp, x29, #16
+	mov	w0, 0
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldp	x25, x26, [sp,80]
+	ldp	x27, x28, [sp,96]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 176
+	ret
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.align	2
+	.global	FtlScanAllBlock
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC49
+	add	x1, x1, :lo12:.LANCHOR3
+	add	x0, x0, :lo12:.LC49
+	add	x1, x1, 56
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp,64]
+	stp	x21, x22, [sp,48]
+	adrp	x23, .LC67
+	adrp	x22, .LC66
+	adrp	x24, .LC68
+	add	x22, x22, :lo12:.LC66
+	stp	x19, x20, [sp,32]
+	add	x23, x23, :lo12:.LC67
+	mov	w20, 0
+	add	x24, x24, :lo12:.LC68
+	stp	x25, x26, [sp,80]
+	bl	printk
+.L2011:
+	adrp	x21, .LANCHOR2
+	add	x19, x21, :lo12:.LANCHOR2
+	ldrh	w0, [x19,758]
+	cmp	w0, w20
+	bls	.L2020
+	mov	w0, w20
+	strh	w20, [x29,80]
+	bl	ftl_get_blk_mode
+	mov	w3, w0
+	ldr	x4, [x19,1184]
+	ubfiz	x2, x20, 1, 16
+	mov	w1, w20
+	mov	x0, x22
+	ldrh	w2, [x4,x2]
+	bl	printk
+	add	x0, x29, 80
 	bl	make_superblock
-.L1928:
-	mov	w0, w19
-	ldr	x23, [sp,48]
-	ldp	x19, x20, [sp,16]
-	ldp	x21, x22, [sp,32]
-	ldp	x29, x30, [sp], 64
+	mov	x1, 0
+	ldrh	w6, [x19,748]
+	ldrh	w7, [x19,828]
+	mov	w9, 65535
+	ldrh	w8, [x19,830]
+	mov	w10, 56
+	mov	w19, w1
+	mov	w5, 4
+.L2012:
+	cmp	w6, w1, uxth
+	bls	.L2021
+	add	x0, x29, 80
+	add	x0, x0, x1, lsl 1
+	ldrh	w0, [x0,16]
+	cmp	w0, w9
+	beq	.L2013
+	add	x3, x21, :lo12:.LANCHOR2
+	lsl	w0, w0, 10
+	umull	x2, w19, w10
+	ldr	x4, [x3,992]
+	add	x4, x4, x2
+	str	w0, [x4,4]
+	ldr	x0, [x3,992]
+	ldr	x4, [x3,1072]
+	add	x2, x0, x2
+	ldr	x3, [x3,1128]
+	mul	w0, w19, w7
+	sdiv	w0, w0, w5
+	add	x0, x4, x0, sxtw 2
+	str	x0, [x2,8]
+	mul	w0, w19, w8
+	add	w19, w19, 1
+	uxth	w19, w19
+	sdiv	w0, w0, w5
+	add	x0, x3, x0, sxtw 2
+	str	x0, [x2,16]
+.L2013:
+	add	x1, x1, 1
+	b	.L2012
+.L2021:
+	add	x0, x21, :lo12:.LANCHOR2
+	mov	w1, w19
+	mov	w2, 0
+	mov	x25, 0
+	mov	x26, 56
+	ldr	x0, [x0,992]
+	bl	FlashReadPages
+.L2015:
+	add	x0, x21, :lo12:.LANCHOR2
+	cmp	w19, w25, uxth
+	bls	.L2022
+	ldr	x4, [x0,992]
+	mul	x2, x25, x26
+	ldrh	w1, [x29,80]
+	add	x25, x25, 1
+	add	x3, x4, x2
+	ldr	x0, [x3,8]
+	ldr	x7, [x3,16]
+	ldr	w5, [x0]
+	str	w5, [sp]
+	ldr	w0, [x0,4]
+	str	w0, [sp,8]
+	mov	x0, x23
+	ldr	w2, [x4,x2]
+	ldr	w5, [x7,4]
+	ldr	w4, [x7]
+	ldr	w6, [x7,8]
+	ldr	w3, [x3,4]
+	ldr	w7, [x7,12]
+	bl	printk
+	b	.L2015
+.L2022:
+	ldr	x0, [x0,992]
+	mov	w1, w19
+	mov	w2, 1
+	mov	x25, 0
+	mov	x26, 56
+	bl	FlashReadPages
+.L2017:
+	cmp	w19, w25, uxth
+	bls	.L2023
+	add	x0, x21, :lo12:.LANCHOR2
+	ldrh	w1, [x29,80]
+	mul	x2, x25, x26
+	add	x25, x25, 1
+	ldr	x4, [x0,992]
+	add	x3, x4, x2
+	ldr	x0, [x3,8]
+	ldr	x7, [x3,16]
+	ldr	w5, [x0]
+	str	w5, [sp]
+	ldr	w0, [x0,4]
+	str	w0, [sp,8]
+	mov	x0, x24
+	ldr	w2, [x4,x2]
+	ldr	w5, [x7,4]
+	ldr	w4, [x7]
+	ldr	w6, [x7,8]
+	ldr	w3, [x3,4]
+	ldr	w7, [x7,12]
+	bl	printk
+	b	.L2017
+.L2023:
+	add	w20, w20, 1
+	uxth	w20, w20
+	b	.L2011
+.L2020:
+	sub	sp, x29, #16
+	mov	w0, 0
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldp	x25, x26, [sp,80]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 144
 	ret
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.align	2
 	.global	SupperBlkListInit
 	.type	SupperBlkListInit, %function
@@ -12538,19 +13314,19 @@ SupperBlkListInit:
 	strh	wzr, [x19,3600]
 	strh	wzr, [x19,862]
 	mov	w19, w27
-.L1946:
+.L2025:
 	add	x0, x21, :lo12:.LANCHOR2
 	ldrh	w1, [x0,756]
 	cmp	w19, w1
-	bge	.L1953
+	bge	.L2032
 	mov	w20, 0
 	ldrh	w3, [x0,748]
 	ldrh	w2, [x0,818]
 	mov	w28, w20
 	mov	x26, x0
-.L1954:
+.L2033:
 	cmp	w28, w3
-	bge	.L1955
+	bge	.L2034
 	add	x0, x26, 776
 	mov	w1, w19
 	str	x2, [x29,96]
@@ -12560,54 +13336,54 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	x3, [x29,104]
 	ldr	x2, [x29,96]
-	cbnz	w0, .L1947
+	cbnz	w0, .L2026
 	add	w20, w2, w20
 	sxth	w20, w20
-.L1947:
+.L2026:
 	add	w28, w28, 1
 	sxth	w28, w28
-	b	.L1954
-.L1955:
-	cbz	w20, .L1949
+	b	.L2033
+.L2034:
+	cbz	w20, .L2028
 	sdiv	w20, w25, w20
 	sxth	w20, w20
-	b	.L1950
-.L1949:
+	b	.L2029
+.L2028:
 	add	x0, x21, :lo12:.LANCHOR2
 	ldr	x0, [x0,1184]
 	strh	w24, [x0,w19,sxtw 1]
-.L1950:
+.L2029:
 	add	x0, x21, :lo12:.LANCHOR2
 	ldr	x1, [x0,1280]
 	smaddl	x1, w19, w23, x1
 	strh	w20, [x1,4]
 	ldrh	w1, [x0,3608]
 	cmp	w19, w1
-	beq	.L1951
+	beq	.L2030
 	ldrh	w1, [x0,3656]
 	cmp	w19, w1
-	beq	.L1951
+	beq	.L2030
 	ldrh	w1, [x0,3704]
 	cmp	w19, w1
-	beq	.L1951
+	beq	.L2030
 	ldr	x0, [x0,1184]
 	ldrh	w0, [x0,w19,sxtw 1]
-	cbnz	w0, .L1952
+	cbnz	w0, .L2031
 	add	w27, w27, 1
 	mov	w0, w19
 	uxth	w27, w27
 	bl	INSERT_FREE_LIST
-	b	.L1951
-.L1952:
+	b	.L2030
+.L2031:
 	add	w22, w22, 1
 	mov	w0, w19
 	uxth	w22, w22
 	bl	INSERT_DATA_LIST
-.L1951:
+.L2030:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1946
-.L1953:
+	b	.L2025
+.L2032:
 	strh	w22, [x0,3584]
 	strh	w27, [x0,3600]
 	mov	w0, 0
@@ -12623,24 +13399,25 @@ SupperBlkListInit:
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR2
+	adrp	x0, .LANCHOR4
 	mov	w1, 19539
-	add	x0, x0, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR4
 	movk	w1, 0x4654, lsl 16
 	stp	x29, x30, [sp, -16]!
-	add	x2, x0, 3968
+	add	x2, x0, 3456
 	add	x29, sp, 0
-	ldr	w3, [x0,3968]
+	ldr	w3, [x0,3456]
 	cmp	w3, w1
-	bne	.L1956
+	bne	.L2035
 	mov	w1, 72
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x2,4]
-	adrp	x1, .LANCHOR4
-	add	x1, x1, :lo12:.LANCHOR4
-	ldr	w3, [x1,128]
-	ldr	w1, [x1,132]
-	str	w1, [x2,92]
+	ldr	w1, [x0,3968]
+	ldr	w0, [x0,3972]
+	str	w0, [x2,92]
+	adrp	x0, .LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR2
+	str	w1, [x2,88]
 	ldr	w1, [x0,880]
 	str	w1, [x2,8]
 	ldr	w1, [x0,884]
@@ -12667,9 +13444,8 @@ Ftl_save_ext_data:
 	mov	w1, 1
 	str	w0, [x2,64]
 	mov	w0, 0
-	str	w3, [x2,88]
 	bl	FtlVendorPartWrite
-.L1956:
+.L2035:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -12683,30 +13459,30 @@ FtlEctTblFlush:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	w4, [x3,652]
-	cbz	w4, .L1959
+	cbz	w4, .L2038
 	ldr	w3, [x3,920]
 	cmp	w3, 29
 	mov	w3, 4
 	csel	w1, w1, w3, hi
-.L1959:
+.L2038:
 	adrp	x3, .LANCHOR4
 	add	x3, x3, :lo12:.LANCHOR4
-	ldrh	w4, [x3,136]
+	ldrh	w4, [x3,3976]
 	cmp	w4, 31
-	bhi	.L1960
+	bhi	.L2039
 	add	w4, w4, 1
 	mov	w1, 1
-	strh	w4, [x3,136]
-.L1960:
-	cbnz	w0, .L1961
+	strh	w4, [x3,3976]
+.L2039:
+	cbnz	w0, .L2040
 	add	x0, x2, :lo12:.LANCHOR2
 	ldr	x3, [x0,1160]
 	ldr	w0, [x3,20]
 	add	w1, w1, w0
 	ldr	w0, [x3,16]
 	cmp	w0, w1
-	bcc	.L1962
-.L1961:
+	bcc	.L2041
+.L2040:
 	add	x2, x2, :lo12:.LANCHOR2
 	ldr	x0, [x2,1160]
 	ldr	w1, [x0,16]
@@ -12726,7 +13502,7 @@ FtlEctTblFlush:
 	mov	w0, 64
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1962:
+.L2041:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -12740,86 +13516,88 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
-	adrp	x19, .LANCHOR2
+	adrp	x19, .LANCHOR4
 	str	x21, [sp,32]
-	add	x20, x19, :lo12:.LANCHOR2
-	add	x21, x20, 3968
+	add	x20, x19, :lo12:.LANCHOR4
+	add	x21, x20, 3456
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w1, [x20,3968]
+	ldr	w1, [x20,3456]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	beq	.L1967
+	beq	.L2046
 	mov	x0, x21
 	mov	w1, 0
 	mov	w2, 512
 	bl	ftl_memset
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
-	str	w0, [x20,3968]
-.L1967:
-	add	x0, x19, :lo12:.LANCHOR2
+	str	w0, [x20,3456]
+.L2046:
+	add	x1, x19, :lo12:.LANCHOR4
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
-	adrp	x20, .LANCHOR4
-	ldr	w3, [x0,3968]
+	add	x0, x1, 3456
+	adrp	x20, .LANCHOR2
+	ldr	w3, [x1,3456]
 	cmp	w3, w2
-	bne	.L1968
-	add	x2, x20, :lo12:.LANCHOR4
-	ldr	w3, [x0,4056]
-	ldr	w1, [x0,4028]
-	str	w1, [x0,868]
-	str	w3, [x2,128]
-	ldr	w3, [x0,4060]
-	str	w3, [x2,132]
-	ldr	w2, [x0,3976]
-	str	w2, [x0,880]
-	ldr	w2, [x0,3980]
-	str	w2, [x0,884]
-	ldr	w2, [x0,3984]
-	str	w2, [x0,900]
-	ldr	w2, [x0,3988]
-	str	w2, [x0,896]
-	ldr	w2, [x0,3996]
-	str	w2, [x0,908]
-	ldr	w2, [x0,4000]
-	str	w2, [x0,912]
-	ldr	w2, [x0,4004]
-	str	w2, [x0,888]
-	ldr	w2, [x0,4008]
-	str	w2, [x0,892]
-	ldr	w2, [x0,4012]
-	str	w2, [x0,916]
-	ldr	w2, [x0,4016]
-	str	w2, [x0,920]
-.L1968:
-	add	x0, x19, :lo12:.LANCHOR2
+	bne	.L2047
+	ldr	w2, [x1,3544]
+	str	w2, [x1,3968]
+	ldr	w2, [x1,3548]
+	str	w2, [x1,3972]
+	add	x1, x20, :lo12:.LANCHOR2
+	ldr	w2, [x0,8]
+	str	w2, [x1,880]
+	ldr	w2, [x0,12]
+	str	w2, [x1,884]
+	ldr	w2, [x0,16]
+	str	w2, [x1,900]
+	ldr	w2, [x0,20]
+	str	w2, [x1,896]
+	ldr	w2, [x0,28]
+	str	w2, [x1,908]
+	ldr	w2, [x0,32]
+	str	w2, [x1,912]
+	ldr	w2, [x0,36]
+	str	w2, [x1,888]
+	ldr	w2, [x0,40]
+	str	w2, [x1,892]
+	ldr	w2, [x0,44]
+	str	w2, [x1,916]
+	ldr	w2, [x0,48]
+	ldr	w0, [x0,60]
+	str	w2, [x1,920]
+	str	w0, [x1,868]
+.L2047:
+	add	x1, x19, :lo12:.LANCHOR4
+	add	x0, x20, :lo12:.LANCHOR2
+	ldr	w2, [x1,3524]
 	mov	w1, 34661
 	movk	w1, 0x1234, lsl 16
-	ldr	w2, [x0,4036]
 	str	wzr, [x0,864]
 	cmp	w2, w1
-	bne	.L1969
+	bne	.L2048
 	mov	w1, 1
 	str	w1, [x0,652]
-	adrp	x0, .LC45
-	adrp	x1, .LC48
-	add	x0, x0, :lo12:.LC45
-	add	x1, x1, :lo12:.LC48
+	adrp	x0, .LC47
+	adrp	x1, .LC69
+	add	x0, x0, :lo12:.LC47
+	add	x1, x1, :lo12:.LC69
 	bl	printk
-.L1969:
-	add	x0, x19, :lo12:.LANCHOR2
-	add	x20, x20, :lo12:.LANCHOR4
+.L2048:
+	add	x0, x20, :lo12:.LANCHOR2
+	add	x19, x19, :lo12:.LANCHOR4
+	ldr	x21, [sp,32]
 	ldrh	w2, [x0,808]
 	ldr	w3, [x0,904]
 	ldr	w1, [x0,908]
 	ldrh	w0, [x0,756]
 	madd	w1, w2, w3, w1
 	udiv	w0, w1, w0
-	str	w0, [x20,140]
+	str	w0, [x19,3980]
 	ldp	x19, x20, [sp,16]
-	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
@@ -12842,25 +13620,25 @@ update_multiplier_value:
 	mov	w19, w22
 	ldrh	w25, [x1,818]
 	mov	x23, x1
-.L1971:
+.L2050:
 	cmp	w24, w22, uxth
-	bls	.L1978
+	bls	.L2057
 	add	x0, x23, 776
 	mov	w1, w20
 	ldrb	w0, [x0,x22]
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1972
+	cbnz	w0, .L2051
 	add	w19, w19, w25
 	uxth	w19, w19
-.L1972:
+.L2051:
 	add	x22, x22, 1
-	b	.L1971
-.L1978:
-	cbz	w19, .L1974
+	b	.L2050
+.L2057:
+	cbz	w19, .L2053
 	mov	w0, 32768
 	sdiv	w19, w0, w19
-.L1974:
+.L2053:
 	add	x0, x21, :lo12:.LANCHOR2
 	mov	w1, 6
 	umull	x20, w20, w1
@@ -12883,7 +13661,7 @@ GetFreeBlockMinEraseCount:
 	add	x2, x2, :lo12:.LANCHOR2
 	ldr	x1, [x2,3592]
 	mov	w0, w1
-	cbz	x1, .L1980
+	cbz	x1, .L2059
 	ldr	x0, [x2,1280]
 	sub	x1, x1, x0
 	mov	x0, -6148914691236517206
@@ -12892,7 +13670,7 @@ GetFreeBlockMinEraseCount:
 	ldr	x0, [x2,1168]
 	and	x1, x1, 65535
 	ldrh	w0, [x0,x1,lsl 1]
-.L1980:
+.L2059:
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.align	2
@@ -12904,7 +13682,7 @@ GetFreeBlockMaxEraseCount:
 	add	x5, x2, :lo12:.LANCHOR2
 	ldr	x1, [x5,3592]
 	mov	w0, w1
-	cbz	x1, .L1983
+	cbz	x1, .L2062
 	ldrh	w3, [x5,3600]
 	mov	w0, 7
 	mov	w6, 6
@@ -12920,25 +13698,25 @@ GetFreeBlockMaxEraseCount:
 	madd	x1, x3, x1, x1
 	mov	w3, 0
 	uxth	w1, w1
-.L1985:
+.L2064:
 	cmp	w3, w4
-	beq	.L1988
+	beq	.L2067
 	umull	x5, w1, w6
 	ldrh	w5, [x0,x5]
 	cmp	w5, w7
-	bne	.L1986
-.L1988:
+	bne	.L2065
+.L2067:
 	add	x2, x2, :lo12:.LANCHOR2
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x2,1168]
 	ldrh	w0, [x0,x1]
-	b	.L1983
-.L1986:
+	b	.L2062
+.L2065:
 	add	w3, w3, 1
 	mov	w1, w5
 	uxth	w3, w3
-	b	.L1985
-.L1983:
+	b	.L2064
+.L2062:
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	2
@@ -12946,11 +13724,11 @@ GetFreeBlockMaxEraseCount:
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LC49
+	adrp	x1, .LC70
 	add	x29, sp, 0
 	stp	x25, x26, [sp,64]
 	adrp	x25, .LANCHOR0
-	add	x1, x1, :lo12:.LC49
+	add	x1, x1, :lo12:.LC70
 	add	x25, x25, :lo12:.LANCHOR0
 	str	x27, [sp,80]
 	stp	x23, x24, [sp,48]
@@ -12960,459 +13738,459 @@ FtlPrintInfo2buf:
 	bl	strcpy
 	add	x20, x23, 12
 	ldr	w2, [x25,4016]
-	adrp	x1, .LC50
+	adrp	x1, .LC71
 	adrp	x24, .LANCHOR2
 	mov	x0, x20
-	add	x1, x1, :lo12:.LC50
+	add	x1, x1, :lo12:.LC71
 	add	x22, x24, :lo12:.LANCHOR2
 	bl	sprintf
 	add	x20, x20, x0, sxtw
-	adrp	x1, .LC51
+	adrp	x1, .LC72
 	mov	x0, x20
 	ldr	w2, [x22,836]
-	add	x1, x1, :lo12:.LC51
+	add	x1, x1, :lo12:.LC72
 	bl	sprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR1+3064
 	ldr	w0, [x0,#:lo12:.LANCHOR1+3064]
 	cmp	w0, 1
-	beq	.L1991
+	beq	.L2070
 	sub	w0, w20, w23
-	b	.L1992
-.L1991:
+	b	.L2071
+.L2070:
 	add	x0, x29, 96
 	add	x1, x29, 100
 	add	x2, x29, 104
 	add	x3, x29, 108
-	adrp	x19, .LANCHOR4
 	bl	NandcGetTimeCfg
-	add	x19, x19, :lo12:.LANCHOR4
 	ldr	w4, [x29,104]
-	adrp	x1, .LC52
+	adrp	x1, .LC73
 	ldr	w5, [x29,108]
-	add	x1, x1, :lo12:.LC52
-	ldr	w3, [x29,100]
 	mov	x0, x20
+	ldr	w3, [x29,100]
+	add	x1, x1, :lo12:.LC73
 	ldr	w2, [x29,96]
 	bl	sprintf
 	add	x21, x20, x0, sxtw
-	adrp	x1, .LC53
+	adrp	x1, .LC74
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC53
+	add	x1, x1, :lo12:.LC74
 	add	x21, x21, 10
+	adrp	x20, .LANCHOR4
 	bl	strcpy
+	add	x20, x20, :lo12:.LANCHOR4
 	ldr	w2, [x22,1396]
-	adrp	x1, .LC54
+	adrp	x1, .LC75
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC54
+	add	x1, x1, :lo12:.LC75
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,3892]
-	adrp	x1, .LC55
+	adrp	x1, .LC76
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC55
+	add	x1, x1, :lo12:.LC76
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,900]
-	adrp	x1, .LC56
+	adrp	x1, .LC77
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC56
+	add	x1, x1, :lo12:.LC77
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,888]
-	adrp	x1, .LC57
+	adrp	x1, .LC78
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC57
+	add	x1, x1, :lo12:.LC78
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,884]
-	adrp	x1, .LC58
+	adrp	x1, .LC79
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC58
+	add	x1, x1, :lo12:.LC79
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,892]
-	adrp	x1, .LC59
+	adrp	x1, .LC80
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC59
+	add	x1, x1, :lo12:.LC80
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,896]
-	adrp	x1, .LC60
+	adrp	x1, .LC81
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC60
+	add	x1, x1, :lo12:.LC81
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,880]
-	adrp	x1, .LC61
+	adrp	x1, .LC82
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC61
+	add	x1, x1, :lo12:.LC82
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldr	w2, [x19,128]
-	adrp	x1, .LC62
+	ldr	w2, [x20,3968]
+	adrp	x1, .LC83
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC62
+	add	x1, x1, :lo12:.LC83
 	lsr	w2, w2, 11
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldr	w2, [x19,132]
-	adrp	x1, .LC63
+	ldr	w2, [x20,3972]
+	adrp	x1, .LC84
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC63
+	add	x1, x1, :lo12:.LC84
 	lsr	w2, w2, 11
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,872]
-	adrp	x1, .LC64
+	adrp	x1, .LC85
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC64
+	add	x1, x1, :lo12:.LC85
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,876]
-	adrp	x1, .LC65
-	add	x1, x1, :lo12:.LC65
+	adrp	x1, .LC86
+	add	x1, x1, :lo12:.LC86
 	mov	x0, x21
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	bl	FtlBbtCalcTotleCnt
 	uxth	w3, w0
 	ldrh	w2, [x22,1302]
-	adrp	x1, .LC66
+	adrp	x1, .LC87
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC66
+	add	x1, x1, :lo12:.LC87
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3600]
-	adrp	x1, .LC67
+	adrp	x1, .LC88
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC67
+	add	x1, x1, :lo12:.LC88
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,904]
-	adrp	x1, .LC68
+	adrp	x1, .LC89
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC68
+	add	x1, x1, :lo12:.LC89
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,908]
-	adrp	x1, .LC69
+	adrp	x1, .LC90
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC69
+	add	x1, x1, :lo12:.LC90
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldr	w2, [x19,140]
-	adrp	x1, .LC70
+	ldr	w2, [x20,3980]
+	adrp	x1, .LC91
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC70
+	add	x1, x1, :lo12:.LC91
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,912]
-	adrp	x1, .LC71
+	adrp	x1, .LC92
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC71
+	add	x1, x1, :lo12:.LC92
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,916]
-	adrp	x1, .LC72
+	adrp	x1, .LC93
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC72
+	add	x1, x1, :lo12:.LC93
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,920]
-	adrp	x1, .LC73
+	adrp	x1, .LC94
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC73
+	add	x1, x1, :lo12:.LC94
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3550]
-	adrp	x1, .LC74
+	adrp	x1, .LC95
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC74
+	add	x1, x1, :lo12:.LC95
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3548]
-	adrp	x1, .LC75
+	adrp	x1, .LC96
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC75
+	add	x1, x1, :lo12:.LC96
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x25,4048]
-	adrp	x1, .LC76
+	adrp	x1, .LC97
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC76
+	add	x1, x1, :lo12:.LC97
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,852]
-	adrp	x1, .LC77
+	adrp	x1, .LC98
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC77
+	add	x1, x1, :lo12:.LC98
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,744]
-	adrp	x1, .LC78
+	adrp	x1, .LC99
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC78
+	add	x1, x1, :lo12:.LC99
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,1470]
-	adrp	x1, .LC79
+	adrp	x1, .LC100
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC79
+	add	x1, x1, :lo12:.LC100
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,756]
-	adrp	x1, .LC80
+	adrp	x1, .LC101
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC80
+	add	x1, x1, :lo12:.LC101
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrh	w2, [x22,3916]
-	adrp	x1, .LC81
+	ldrh	w2, [x20,3404]
+	adrp	x1, .LC102
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC81
+	add	x1, x1, :lo12:.LC102
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w2, [x22,760]
-	adrp	x1, .LC82
+	adrp	x1, .LC103
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC82
+	add	x1, x1, :lo12:.LC103
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3896]
-	adrp	x1, .LC83
+	adrp	x1, .LC104
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC83
+	add	x1, x1, :lo12:.LC104
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,1296]
-	adrp	x1, .LC84
+	adrp	x1, .LC105
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC84
+	add	x1, x1, :lo12:.LC105
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3610]
-	adrp	x1, .LC85
+	adrp	x1, .LC106
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC85
+	add	x1, x1, :lo12:.LC106
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3614]
-	adrp	x1, .LC86
+	adrp	x1, .LC107
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC86
+	add	x1, x1, :lo12:.LC107
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3608]
-	adrp	x1, .LC87
+	adrp	x1, .LC108
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC87
+	add	x1, x1, :lo12:.LC108
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3616]
-	adrp	x1, .LC88
+	adrp	x1, .LC109
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC88
+	add	x1, x1, :lo12:.LC109
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3612]
-	adrp	x1, .LC89
+	adrp	x1, .LC110
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC89
+	add	x1, x1, :lo12:.LC110
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w3, [x22,3608]
-	adrp	x1, .LC90
+	adrp	x1, .LC111
 	ldr	x2, [x22,1184]
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC90
+	add	x1, x1, :lo12:.LC111
 	ldrh	w2, [x2,x3,lsl 1]
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3658]
-	adrp	x1, .LC91
+	adrp	x1, .LC112
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC91
+	add	x1, x1, :lo12:.LC112
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3662]
-	adrp	x1, .LC92
+	adrp	x1, .LC113
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC92
+	add	x1, x1, :lo12:.LC113
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3656]
-	adrp	x1, .LC93
+	adrp	x1, .LC114
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC93
+	add	x1, x1, :lo12:.LC114
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3664]
-	adrp	x1, .LC94
+	adrp	x1, .LC115
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC94
+	add	x1, x1, :lo12:.LC115
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3660]
-	adrp	x1, .LC95
+	adrp	x1, .LC116
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC95
+	add	x1, x1, :lo12:.LC116
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w3, [x22,3656]
-	adrp	x1, .LC96
+	adrp	x1, .LC117
 	ldr	x2, [x22,1184]
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC96
+	add	x1, x1, :lo12:.LC117
 	ldrh	w2, [x2,x3,lsl 1]
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3706]
-	adrp	x1, .LC97
+	adrp	x1, .LC118
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC97
+	add	x1, x1, :lo12:.LC118
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3710]
-	adrp	x1, .LC98
+	adrp	x1, .LC119
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC98
+	add	x1, x1, :lo12:.LC119
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3704]
-	adrp	x1, .LC99
+	adrp	x1, .LC120
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC99
+	add	x1, x1, :lo12:.LC120
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrb	w2, [x22,3712]
-	adrp	x1, .LC100
+	adrp	x1, .LC121
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC100
+	add	x1, x1, :lo12:.LC121
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldrh	w2, [x22,3708]
-	adrp	x1, .LC101
+	adrp	x1, .LC122
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC101
+	add	x1, x1, :lo12:.LC122
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrh	w2, [x22,3922]
-	adrp	x1, .LC102
+	ldrh	w2, [x20,3410]
+	adrp	x1, .LC123
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC102
+	add	x1, x1, :lo12:.LC123
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrb	w2, [x22,3926]
-	adrp	x1, .LC103
+	ldrb	w2, [x20,3414]
+	adrp	x1, .LC124
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC103
+	add	x1, x1, :lo12:.LC124
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrh	w2, [x22,3920]
-	adrp	x1, .LC104
+	ldrh	w2, [x20,3408]
+	adrp	x1, .LC125
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC104
+	add	x1, x1, :lo12:.LC125
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrb	w2, [x22,3928]
-	adrp	x1, .LC105
+	ldrb	w2, [x20,3416]
+	adrp	x1, .LC126
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC105
+	add	x1, x1, :lo12:.LC126
 	bl	sprintf
 	add	x21, x21, x0, sxtw
-	ldrh	w2, [x22,3924]
-	adrp	x1, .LC106
+	ldrh	w2, [x20,3412]
+	adrp	x1, .LC127
 	mov	x0, x21
-	add	x1, x1, :lo12:.LC106
+	add	x1, x1, :lo12:.LC127
 	bl	sprintf
 	add	x21, x21, x0, sxtw
 	ldr	w3, [x22,868]
-	adrp	x1, .LC107
+	adrp	x1, .LC128
 	ldr	w2, [x22,652]
-	add	x1, x1, :lo12:.LC107
-	ldr	w4, [x22,4052]
+	add	x1, x1, :lo12:.LC128
+	ldr	w4, [x20,3540]
 	mov	x0, x21
-	ldr	w5, [x22,4044]
+	ldr	w5, [x20,3532]
 	orr	w2, w2, w3, lsl 8
-	ldr	w3, [x22,4048]
+	ldr	w3, [x20,3536]
 	bl	sprintf
 	add	x19, x21, x0, sxtw
-	ldr	w2, [x22,4040]
-	adrp	x1, .LC108
+	ldr	w2, [x20,3528]
+	adrp	x1, .LC129
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC108
+	add	x1, x1, :lo12:.LC129
 	bl	sprintf
 	add	x19, x19, x0, sxtw
-	ldr	w2, [x22,4064]
-	adrp	x1, .LC109
+	ldr	w2, [x20,3552]
+	adrp	x1, .LC130
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC109
+	add	x1, x1, :lo12:.LC130
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w2, [x22,952]
-	adrp	x1, .LC110
+	adrp	x1, .LC131
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC110
+	add	x1, x1, :lo12:.LC131
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w2, [x22,954]
-	adrp	x1, .LC111
+	adrp	x1, .LC132
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC111
+	add	x1, x1, :lo12:.LC132
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	ldr	w2, [x22,940]
-	adrp	x1, .LC112
+	adrp	x1, .LC133
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC112
+	add	x1, x1, :lo12:.LC133
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w2, [x22,956]
-	adrp	x1, .LC113
-	add	x1, x1, :lo12:.LC113
+	adrp	x1, .LC134
+	add	x1, x1, :lo12:.LC134
 	mov	x0, x19
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	bl	GetFreeBlockMinEraseCount
 	uxth	w2, w0
-	adrp	x1, .LC114
+	adrp	x1, .LC135
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC114
+	add	x1, x1, :lo12:.LC135
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w0, [x22,3600]
 	bl	GetFreeBlockMaxEraseCount
 	uxth	w2, w0
-	adrp	x1, .LC115
+	adrp	x1, .LC136
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC115
+	add	x1, x1, :lo12:.LC136
 	bl	sprintf
 	add	x19, x19, x0, sxtw
-	ldrh	w0, [x22,3920]
+	ldrh	w0, [x20,3408]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1993
+	beq	.L2072
 	ubfiz	x2, x0, 1, 16
 	ldr	x3, [x22,1184]
-	adrp	x1, .LC116
+	adrp	x1, .LC137
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC116
+	add	x1, x1, :lo12:.LC137
 	ldrh	w2, [x3,x2]
 	bl	sprintf
 	add	x19, x19, x0, sxtw
-.L1993:
+.L2072:
 	mov	w0, 0
-	adrp	x22, .LC117
+	adrp	x22, .LC138
 	mov	w20, 0
 	mov	w27, 65535
 	bl	List_get_gc_head_node
 	mov	w26, 6
 	uxth	w3, w0
-	add	x22, x22, :lo12:.LC117
-.L1995:
+	add	x22, x22, :lo12:.LC138
+.L2074:
 	cmp	w3, w27
-	beq	.L1994
+	beq	.L2073
 	add	x21, x24, :lo12:.LANCHOR2
 	ubfiz	x6, x3, 1, 16
 	umull	x25, w3, w26
@@ -13432,14 +14210,14 @@ FtlPrintInfo2buf:
 	ldr	x0, [x21,1280]
 	cmp	w20, 16
 	ldrh	w3, [x0,x25]
-	bne	.L1995
-.L1994:
+	bne	.L2074
+.L2073:
 	add	x1, x24, :lo12:.LANCHOR2
-	adrp	x22, .LC118
+	adrp	x22, .LC139
 	mov	w20, 0
 	mov	w27, 65535
 	mov	w26, 6
-	add	x22, x22, :lo12:.LC118
+	add	x22, x22, :lo12:.LC139
 	ldr	x0, [x1,3592]
 	ldr	x3, [x1,1280]
 	sub	x3, x0, x3
@@ -13447,9 +14225,9 @@ FtlPrintInfo2buf:
 	asr	x3, x3, 1
 	madd	x3, x0, x3, x3
 	uxth	w3, w3
-.L1997:
+.L2076:
 	cmp	w3, w27
-	beq	.L1996
+	beq	.L2075
 	add	x21, x24, :lo12:.LANCHOR2
 	ubfiz	x5, x3, 1, 16
 	umull	x25, w3, w26
@@ -13467,10 +14245,10 @@ FtlPrintInfo2buf:
 	ldr	x0, [x21,1280]
 	cmp	w20, 4
 	ldrh	w3, [x0,x25]
-	bne	.L1997
-.L1996:
+	bne	.L2076
+.L2075:
 	sub	w0, w19, w23
-.L1992:
+.L2071:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -13484,11 +14262,11 @@ FtlPrintInfo2buf:
 	.type	ftl_proc_ftl_read, %function
 ftl_proc_ftl_read:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC45
-	adrp	x2, .LC119
+	adrp	x1, .LC47
+	adrp	x2, .LC140
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LC45
-	add	x2, x2, :lo12:.LC119
+	add	x1, x1, :lo12:.LC47
+	add	x2, x2, :lo12:.LC140
 	stp	x19, x20, [sp,16]
 	mov	x20, x0
 	bl	sprintf
@@ -13514,76 +14292,76 @@ GetSwlReplaceBlock:
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
 	adrp	x19, .LANCHOR2
-	ldr	w3, [x1,140]
+	ldr	w3, [x1,3980]
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	w2, [x1,920]
 	cmp	w3, w2
-	bcs	.L2002
+	bcs	.L2081
 	str	wzr, [x1,904]
 	ldrh	w3, [x1,756]
 	ldr	x5, [x1,1168]
 	mov	x1, 0
-.L2003:
+.L2082:
 	cmp	w3, w1
-	bls	.L2035
+	bls	.L2114
 	add	x4, x19, :lo12:.LANCHOR2
 	ldrh	w6, [x5,x1,lsl 1]
 	add	x1, x1, 1
 	ldr	w2, [x4,904]
 	add	w2, w6, w2
 	str	w2, [x4,904]
-	b	.L2003
-.L2035:
+	b	.L2082
+.L2114:
 	add	x2, x19, :lo12:.LANCHOR2
 	add	x4, x0, :lo12:.LANCHOR4
 	ldr	w1, [x2,904]
 	udiv	w3, w1, w3
-	str	w3, [x4,140]
+	str	w3, [x4,3980]
 	ldr	w3, [x2,908]
 	sub	w1, w1, w3
 	ldrh	w3, [x2,808]
 	udiv	w1, w1, w3
 	str	w1, [x2,904]
-	b	.L2005
-.L2002:
+	b	.L2084
+.L2081:
 	ldr	w2, [x1,916]
 	cmp	w3, w2
-	bls	.L2005
+	bls	.L2084
 	add	w2, w2, 1
 	str	w2, [x1,916]
 	mov	w1, 0
-.L2007:
+.L2086:
 	add	x2, x19, :lo12:.LANCHOR2
 	ldrh	w3, [x2,756]
 	cmp	w1, w3
-	bcs	.L2005
+	bcs	.L2084
 	ubfiz	x3, x1, 1, 32
 	ldr	x4, [x2,1168]
 	add	w1, w1, 1
 	ldrh	w2, [x4,x3]
 	add	w2, w2, 1
 	strh	w2, [x4,x3]
-	b	.L2007
-.L2005:
+	b	.L2086
+.L2084:
 	add	x1, x19, :lo12:.LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	w21, [x1,920]
-	ldr	w23, [x0,140]
+	ldr	w23, [x0,3980]
 	add	w0, w21, 256
 	cmp	w0, w23
-	bls	.L2010
+	bls	.L2089
 	ldr	w2, [x1,916]
 	add	w0, w21, 768
 	cmp	w0, w2
-	bls	.L2010
+	bls	.L2089
 	ldr	w0, [x1,652]
-	cbz	w0, .L2013
+	cbz	w0, .L2092
 	cmp	w21, 30
-	bls	.L2010
-.L2013:
+	bls	.L2089
+.L2092:
 	mov	w0, 65535
-	b	.L2012
-.L2010:
+	b	.L2091
+.L2089:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x0,3600]
 	add	w0, w0, w0, lsl 1
@@ -13592,13 +14370,13 @@ GetSwlReplaceBlock:
 	uxth	w6, w0
 	add	w0, w21, 64
 	cmp	w6, w0
-	bcs	.L2022
+	bcs	.L2101
 	cmp	w21, 30
-	bhi	.L2013
-.L2022:
+	bhi	.L2092
+.L2101:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	x3, [x1,3568]
-	cbz	x3, .L2013
+	cbz	x3, .L2092
 	mov	w26, 65535
 	mov	x0, -6148914691236517206
 	ldrh	w9, [x1,756]
@@ -13609,16 +14387,16 @@ GetSwlReplaceBlock:
 	add	x0, x0, 1
 	mov	w1, 0
 	mov	w10, 6
-.L2015:
+.L2094:
 	ldrh	w5, [x3]
 	cmp	w5, w8
-	beq	.L2017
+	beq	.L2096
 	add	w1, w1, 1
 	uxth	w1, w1
 	cmp	w1, w9
-	bhi	.L2013
+	bhi	.L2092
 	ldrh	w2, [x3,4]
-	cbz	w2, .L2016
+	cbz	w2, .L2095
 	sub	x4, x3, x7
 	asr	x4, x4, 1
 	mul	x4, x4, x0
@@ -13626,51 +14404,51 @@ GetSwlReplaceBlock:
 	and	x4, x4, 65535
 	ldrh	w2, [x25,x4,lsl 1]
 	cmp	w2, w21
-	bls	.L2021
+	bls	.L2100
 	cmp	w2, w26
-	bcs	.L2016
+	bcs	.L2095
 	mov	w26, w2
 	mov	w20, w3
-.L2016:
+.L2095:
 	umull	x3, w5, w10
 	add	x3, x7, x3
-	b	.L2015
-.L2021:
+	b	.L2094
+.L2100:
 	mov	w20, w3
-.L2017:
+.L2096:
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L2013
+	beq	.L2092
 	ubfiz	x24, x20, 1, 16
 	ldrh	w22, [x25,x24]
 	cmp	w22, w21
-	bls	.L2019
+	bls	.L2098
 	str	x6, [x29,88]
 	bl	GetFreeBlockMinEraseCount
 	ldr	x6, [x29,88]
 	cmp	w21, w0, uxth
-	bcs	.L2019
+	bcs	.L2098
 	add	x0, x19, :lo12:.LANCHOR2
 	str	w26, [x0,920]
-.L2019:
+.L2098:
 	cmp	w22, w23
-	bcs	.L2013
+	bcs	.L2092
 	add	w0, w22, 128
 	cmp	w6, w0
-	ble	.L2013
+	ble	.L2092
 	add	w0, w22, 256
 	cmp	w0, w23
-	bcc	.L2020
+	bcc	.L2099
 	add	x0, x19, :lo12:.LANCHOR2
 	add	w22, w22, 768
 	ldr	w0, [x0,916]
 	cmp	w22, w0
-	bcs	.L2013
-.L2020:
+	bcs	.L2092
+.L2099:
 	add	x19, x19, :lo12:.LANCHOR2
-	adrp	x0, .LC120
+	adrp	x0, .LC141
 	ldrh	w5, [x25,x24]
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC141
 	mov	w1, w20
 	mov	w2, w23
 	ldr	x4, [x19,1184]
@@ -13680,7 +14458,7 @@ GetSwlReplaceBlock:
 	mov	w0, 1
 	str	w0, [x19,928]
 	mov	w0, w20
-.L2012:
+.L2091:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -13697,13 +14475,13 @@ free_data_superblock:
 	mov	w1, 65535
 	cmp	w0, w1
 	add	x29, sp, 0
-	beq	.L2037
+	beq	.L2116
 	adrp	x2, .LANCHOR2+1184
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2,#:lo12:.LANCHOR2+1184]
 	strh	wzr, [x2,x1]
 	bl	INSERT_FREE_LIST
-.L2037:
+.L2116:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -13722,15 +14500,15 @@ allocate_data_superblock:
 	stp	x25, x26, [sp,64]
 	ldr	w1, [x19,1400]
 	stp	x27, x28, [sp,80]
-	cbnz	w1, .L2039
+	cbnz	w1, .L2118
 	mov	x20, x0
 	add	x23, x19, 3704
 	adrp	x22, .LANCHOR0
 	mov	w24, 7
 	add	x25, x19, 3592
-.L2040:
+.L2119:
 	cmp	x20, x23
-	bne	.L2041
+	bne	.L2120
 	ldrh	w2, [x19,3600]
 	ldr	w4, [x19,928]
 	lsr	w3, w2, 1
@@ -13739,43 +14517,43 @@ allocate_data_superblock:
 	add	w1, w1, w0, lsr 2
 	ldr	w0, [x19,652]
 	uxth	w1, w1
-	cbz	w0, .L2042
+	cbz	w0, .L2121
 	ldr	w0, [x19,920]
 	cmp	w0, 29
-	bhi	.L2042
+	bhi	.L2121
 	cmp	w0, 2
 	mov	w1, 0
-	bls	.L2043
-	tbz	x2, 0, .L2070
-	cbz	w4, .L2043
-.L2070:
+	bls	.L2122
+	tbz	x2, 0, .L2149
+	cbz	w4, .L2122
+.L2149:
 	mov	w1, w3
-	b	.L2042
-.L2041:
+	b	.L2121
+.L2120:
 	ldrb	w0, [x20,8]
 	mov	w1, 0
 	cmp	w0, 1
-	bne	.L2043
+	bne	.L2122
 	ldrh	w0, [x19,768]
 	cmp	w0, 1
-	beq	.L2043
+	beq	.L2122
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbnz	w0, .L2043
+	cbnz	w0, .L2122
 	ldr	w2, [x19,652]
 	ldrh	w0, [x19,3600]
 	lsr	w1, w0, 3
-	cbz	w2, .L2042
+	cbz	w2, .L2121
 	ldr	w2, [x19,920]
 	cmp	w2, 1
-	bhi	.L2042
+	bhi	.L2121
 	mul	w1, w0, w24
 	lsr	w1, w1, 3
-.L2042:
-	cbz	w1, .L2043
+.L2121:
+	cbz	w1, .L2122
 	sub	w1, w1, #1
 	uxth	w1, w1
-.L2043:
+.L2122:
 	ldrb	w2, [x20,8]
 	mov	x0, x25
 	bl	List_pop_index_node
@@ -13787,20 +14565,20 @@ allocate_data_superblock:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20,7]
-	cbz	w0, .L2045
+	cbz	w0, .L2124
 	mov	x0, 0
 	ldrh	w5, [x19,748]
 	mov	w26, w0
 	mov	x3, 56
 	mov	w6, 65535
-	b	.L2046
-.L2045:
+	b	.L2125
+.L2124:
 	ubfiz	x27, x27, 1, 16
 	ldr	x0, [x19,1184]
 	mov	w1, -1
 	strh	w1, [x0,x27]
-	b	.L2040
-.L2049:
+	b	.L2119
+.L2128:
 	ldr	x4, [x19,1016]
 	madd	x1, x0, x3, x4
 	str	xzr, [x1,16]
@@ -13808,40 +14586,40 @@ allocate_data_superblock:
 	add	x1, x20, x0, lsl 1
 	ldrh	w1, [x1,16]
 	cmp	w1, w6
-	beq	.L2048
+	beq	.L2127
 	umull	x2, w26, w3
 	add	w26, w26, 1
 	lsl	w1, w1, 10
 	add	x2, x4, x2
 	uxth	w26, w26
 	str	w1, [x2,4]
-.L2048:
+.L2127:
 	add	x0, x0, 1
-.L2046:
+.L2125:
 	cmp	w5, w0, uxth
-	bhi	.L2049
+	bhi	.L2128
 	add	x0, x19, 3608
 	uxtw	x28, w27
 	cmp	x20, x0
-	bne	.L2050
+	bne	.L2129
 	ldr	w1, [x19,652]
-	cbz	w1, .L2050
+	cbz	w1, .L2129
 	ldr	x1, [x19,1168]
 	ldrh	w1, [x1,x28,lsl 1]
 	cmp	w1, 30
-	bls	.L2050
+	bls	.L2129
 	strb	wzr, [x19,3616]
-.L2050:
+.L2129:
 	ldrb	w0, [x20,8]
-	cbnz	w0, .L2051
+	cbnz	w0, .L2130
 	lsl	x0, x28, 1
 	ldr	x1, [x19,1168]
 	mov	w2, 2
 	ldrh	w3, [x1,x0]
-	cbz	w3, .L2095
+	cbz	w3, .L2174
 	ldrh	w2, [x19,808]
 	add	w2, w3, w2
-.L2095:
+.L2174:
 	strh	w2, [x1,x0]
 	mov	w1, 0
 	ldr	w0, [x19,904]
@@ -13849,8 +14627,8 @@ allocate_data_superblock:
 	str	w0, [x19,904]
 	mov	w0, w27
 	bl	ftl_set_blk_mode
-	b	.L2054
-.L2051:
+	b	.L2133
+.L2130:
 	lsl	x0, x28, 1
 	ldr	x2, [x19,1168]
 	ldrh	w1, [x2,x0]
@@ -13861,15 +14639,15 @@ allocate_data_superblock:
 	str	w0, [x19,908]
 	mov	w0, w27
 	bl	ftl_set_blk_mode.part.17
-.L2054:
+.L2133:
 	lsl	x28, x28, 1
 	ldr	x0, [x19,1168]
 	ldr	w1, [x19,916]
 	ldrh	w0, [x0,x28]
 	cmp	w0, w1
-	bls	.L2055
+	bls	.L2134
 	str	w0, [x19,916]
-.L2055:
+.L2134:
 	ldrh	w1, [x19,808]
 	mov	x3, 56
 	ldr	w2, [x19,904]
@@ -13877,39 +14655,39 @@ allocate_data_superblock:
 	madd	w0, w1, w2, w0
 	ldrh	w1, [x19,756]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR4+140
-	str	w0, [x1,#:lo12:.LANCHOR4+140]
+	adrp	x1, .LANCHOR4+3980
+	str	w0, [x1,#:lo12:.LANCHOR4+3980]
 	ldr	x1, [x19,1160]
 	ldr	w0, [x1,16]
 	add	w0, w0, 1
 	str	w0, [x1,16]
 	mov	x0, 0
-.L2056:
+.L2135:
 	cmp	w26, w0, uxth
-	bls	.L2097
+	bls	.L2176
 	ldr	x1, [x19,1016]
 	madd	x1, x0, x3, x1
 	add	x0, x0, 1
 	ldr	w2, [x1,4]
 	and	w2, w2, -1024
 	str	w2, [x1,4]
-	b	.L2056
-.L2097:
+	b	.L2135
+.L2176:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2058
+	cbz	w0, .L2137
 	ldrb	w0, [x20,8]
 	cmp	w0, 1
 	ldr	x0, [x19,1016]
-	bne	.L2059
+	bne	.L2138
 	mov	w1, 0
-	b	.L2096
-.L2059:
+	b	.L2175
+.L2138:
 	mov	w1, 1
-.L2096:
+.L2175:
 	mov	w2, w26
 	bl	FlashEraseBlocks
-.L2058:
+.L2137:
 	ldrb	w1, [x20,8]
 	mov	w2, w26
 	ldr	x0, [x19,1016]
@@ -13917,15 +14695,15 @@ allocate_data_superblock:
 	mov	x1, 0
 	mov	x4, 56
 	mov	w2, w1
-.L2060:
+.L2139:
 	cmp	w26, w1, uxth
-	bls	.L2098
+	bls	.L2177
 	mul	x0, x1, x4
 	ldr	x3, [x19,1016]
 	add	x5, x3, x0
 	ldr	w3, [x3,x0]
 	cmn	w3, #1
-	bne	.L2061
+	bne	.L2140
 	ldr	w0, [x5,4]
 	add	w2, w2, 1
 	str	x4, [x29,104]
@@ -13944,22 +14722,22 @@ allocate_data_superblock:
 	ldrb	w0, [x20,7]
 	sub	w0, w0, #1
 	strb	w0, [x20,7]
-.L2061:
+.L2140:
 	add	x1, x1, 1
-	b	.L2060
-.L2098:
-	cbz	w2, .L2063
+	b	.L2139
+.L2177:
+	cbz	w2, .L2142
 	mov	w0, w27
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L2063:
+.L2142:
 	ldrb	w0, [x20,7]
-	cbnz	w0, .L2064
+	cbnz	w0, .L2143
 	ldr	x0, [x19,1184]
 	mov	w1, -1
 	strh	w1, [x0,x28]
-	b	.L2040
-.L2064:
+	b	.L2119
+.L2143:
 	add	x21, x21, :lo12:.LANCHOR2
 	strh	wzr, [x20,2]
 	strb	wzr, [x20,6]
@@ -13975,7 +14753,7 @@ allocate_data_superblock:
 	ldr	x1, [x21,1184]
 	ldrh	w2, [x20]
 	strh	w0, [x1,x2,lsl 1]
-.L2039:
+.L2118:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -13989,20 +14767,20 @@ allocate_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x0, .LANCHOR4+144
+	adrp	x0, .LANCHOR4+3984
 	mov	w1, 0
 	adrp	x7, .LANCHOR2
 	mov	w8, 24
 	mov	w9, 1
 	mov	w4, 4
-	str	wzr, [x0,#:lo12:.LANCHOR4+144]
+	str	wzr, [x0,#:lo12:.LANCHOR4+3984]
 	mov	w10, 56
-.L2100:
+.L2179:
 	add	x2, x7, :lo12:.LANCHOR2
 	adrp	x6, .LANCHOR2
 	ldrh	w0, [x2,748]
 	cmp	w1, w0
-	bcs	.L2104
+	bcs	.L2183
 	umull	x3, w1, w8
 	ldr	x5, [x2,1104]
 	ldr	x6, [x2,1072]
@@ -14030,15 +14808,15 @@ FtlGcBufInit:
 	str	x2, [x0,8]
 	ldr	x2, [x5,8]
 	str	x2, [x0,16]
-	b	.L2100
-.L2104:
+	b	.L2179
+.L2183:
 	mov	w7, 24
 	mov	w4, 4
-.L2102:
+.L2181:
 	add	x1, x6, :lo12:.LANCHOR2
 	ldr	w2, [x1,1040]
 	cmp	w0, w2
-	bcs	.L2105
+	bcs	.L2184
 	umull	x3, w0, w7
 	ldr	x5, [x1,1104]
 	ldr	x8, [x1,1072]
@@ -14059,8 +14837,8 @@ FtlGcBufInit:
 	uxth	w0, w0
 	add	x1, x1, x2, sxtw 2
 	str	x1, [x3,8]
-	b	.L2102
-.L2105:
+	b	.L2181
+.L2184:
 	ret
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
@@ -14068,23 +14846,23 @@ FtlGcBufInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR4
-	mov	w1, -1
+	mov	w0, -1
+	mov	w1, 0
 	add	x29, sp, 0
-	str	x19, [sp,16]
+	stp	x19, x20, [sp,16]
+	adrp	x20, .LANCHOR4
 	adrp	x19, .LANCHOR2
 	add	x19, x19, :lo12:.LANCHOR2
-	add	x0, x0, :lo12:.LANCHOR4
+	add	x20, x20, :lo12:.LANCHOR4
 	ldrh	w2, [x19,840]
-	strh	w1, [x0,160]
-	mov	w1, -1
-	str	xzr, [x0,152]
+	strh	w0, [x20,4000]
+	mov	w0, -1
+	str	w0, [x20,4012]
 	lsl	w2, w2, 1
-	str	w1, [x0,172]
-	mov	w1, 0
-	str	wzr, [x0,164]
-	str	wzr, [x0,168]
 	ldr	x0, [x19,1208]
+	str	xzr, [x20,3992]
+	str	wzr, [x20,4004]
+	str	wzr, [x20,4008]
 	str	wzr, [x19,652]
 	strh	wzr, [x19,1392]
 	bl	ftl_memset
@@ -14104,12 +14882,12 @@ FtlVariablesInit:
 	bl	ftl_memset
 	mov	w1, 0
 	mov	w2, 512
-	add	x0, x19, 3968
+	add	x0, x20, 3456
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
-	ldr	x19, [sp,16]
 	mov	w0, 0
+	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -14124,32 +14902,32 @@ FtlGcBufFree:
 	mov	w9, 24
 	ldr	w8, [x2,1040]
 	ldr	x5, [x2,1104]
-.L2108:
+.L2187:
 	cmp	w3, w1
-	bcs	.L2107
+	bcs	.L2186
 	umull	x4, w3, w7
 	mov	w2, 0
 	add	x4, x0, x4
-.L2113:
+.L2192:
 	cmp	w2, w8
-	bcs	.L2110
+	bcs	.L2189
 	umull	x6, w2, w9
 	add	x10, x5, x6
 	ldr	x11, [x5,x6]
 	ldr	x6, [x4,8]
 	cmp	x11, x6
-	bne	.L2109
+	bne	.L2188
 	str	wzr, [x10,16]
-	b	.L2110
-.L2109:
+	b	.L2189
+.L2188:
 	add	w2, w2, 1
 	uxth	w2, w2
-	b	.L2113
-.L2110:
+	b	.L2192
+.L2189:
 	add	w3, w3, 1
 	uxth	w3, w3
-	b	.L2108
-.L2107:
+	b	.L2187
+.L2186:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
@@ -14164,17 +14942,17 @@ FtlGcBufAlloc:
 	ldr	w5, [x2,1040]
 	ldr	x6, [x2,1104]
 	mov	w2, 0
-.L2115:
+.L2194:
 	cmp	w2, w1
-	bcs	.L2121
+	bcs	.L2200
 	mov	w3, 0
-.L2119:
+.L2198:
 	cmp	w3, w5
-	bcs	.L2117
+	bcs	.L2196
 	umull	x4, w3, w7
 	add	x4, x6, x4
 	ldr	w10, [x4,16]
-	cbnz	w10, .L2116
+	cbnz	w10, .L2195
 	umull	x3, w2, w9
 	str	w8, [x4,16]
 	add	x3, x0, x3
@@ -14182,41 +14960,41 @@ FtlGcBufAlloc:
 	str	x10, [x3,8]
 	ldr	x4, [x4,8]
 	str	x4, [x3,16]
-	b	.L2117
-.L2116:
+	b	.L2196
+.L2195:
 	add	w3, w3, 1
 	uxth	w3, w3
-	b	.L2119
-.L2117:
+	b	.L2198
+.L2196:
 	add	w2, w2, 1
 	uxth	w2, w2
-	b	.L2115
-.L2121:
+	b	.L2194
+.L2200:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR4+176
+	adrp	x1, .LANCHOR4+4016
 	uxth	w0, w0
-	ldrh	w2, [x1,#:lo12:.LANCHOR4+176]
+	ldrh	w2, [x1,#:lo12:.LANCHOR4+4016]
 	adrp	x1, .LANCHOR2+976
 	ldr	x3, [x1,#:lo12:.LANCHOR2+976]
 	mov	x1, 0
-.L2123:
+.L2202:
 	cmp	w2, w1, uxth
-	bls	.L2127
+	bls	.L2206
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4,-2]
 	cmp	w4, w0
-	bne	.L2123
+	bne	.L2202
 	mov	w0, 1
-	b	.L2124
-.L2127:
+	b	.L2203
+.L2206:
 	mov	w0, 0
-.L2124:
+.L2203:
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	2
@@ -14237,33 +15015,33 @@ FtlGcUpdatePage:
 	ldr	x1, [x29,32]
 	uxth	w9, w0
 	mov	x6, 0
-	ldrh	w8, [x4,176]
+	ldrh	w8, [x4,4016]
 	adrp	x4, .LANCHOR2
 	add	x5, x4, :lo12:.LANCHOR2
 	ldr	x7, [x5,976]
-.L2129:
+.L2208:
 	uxth	w5, w6
 	cmp	w5, w8
-	bcs	.L2133
+	bcs	.L2212
 	add	x6, x6, 1
 	add	x10, x7, x6, lsl 1
 	ldrh	w10, [x10,-2]
 	cmp	w10, w9
-	bne	.L2129
-.L2133:
+	bne	.L2208
+.L2212:
 	cmp	w5, w8
-	bne	.L2131
+	bne	.L2210
 	ubfiz	x5, x5, 1, 16
 	strh	w0, [x7,x5]
 	add	x0, x3, :lo12:.LANCHOR4
-	ldrh	w5, [x0,176]
+	ldrh	w5, [x0,4016]
 	add	w5, w5, 1
-	strh	w5, [x0,176]
-.L2131:
+	strh	w5, [x0,4016]
+.L2210:
 	add	x3, x3, :lo12:.LANCHOR4
 	add	x4, x4, :lo12:.LANCHOR2
 	mov	w0, 12
-	ldrh	w5, [x3,178]
+	ldrh	w5, [x3,4018]
 	ldr	x6, [x4,984]
 	umull	x5, w5, w0
 	add	x6, x6, x5
@@ -14272,9 +15050,9 @@ FtlGcUpdatePage:
 	add	x0, x1, x5
 	str	w2, [x0,8]
 	str	w19, [x1,x5]
-	ldrh	w0, [x3,178]
+	ldrh	w0, [x3,4018]
 	add	w0, w0, 1
-	strh	w0, [x3,178]
+	strh	w0, [x3,4018]
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -14292,8 +15070,8 @@ FtlGcPageVarInit:
 	add	x19, x19, :lo12:.LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR4
 	ldrh	w2, [x19,822]
-	strh	wzr, [x0,176]
-	strh	wzr, [x0,178]
+	strh	wzr, [x0,4016]
+	strh	wzr, [x0,4018]
 	lsl	w2, w2, 1
 	ldr	x0, [x19,976]
 	bl	ftl_memset
@@ -14327,49 +15105,49 @@ FtlGcScanTempBlk:
 	ldrh	w26, [x0,3068]
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L2158
-	cbnz	w26, .L2137
-	b	.L2138
-.L2158:
+	beq	.L2237
+	cbnz	w26, .L2216
+	b	.L2217
+.L2237:
 	mov	w26, 0
-.L2137:
+.L2216:
 	adrp	x0, .LANCHOR2+818
 	ldr	w1, [x29,152]
 	ldrh	w0, [x0,#:lo12:.LANCHOR2+818]
 	cmp	w1, w0
-	bne	.L2139
-.L2138:
+	bne	.L2218
+.L2217:
 	bl	FtlGcPageVarInit
-.L2139:
+.L2218:
 	mov	w0, -1
 	adrp	x25, .LANCHOR2
 	str	w0, [x29,156]
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	mov	w22, 0
 	mov	w23, 65535
 	mov	x21, x25
 	mov	x24, x25
 	str	x0, [x29,128]
-.L2152:
+.L2231:
 	ldrh	w0, [x19]
 	strb	wzr, [x19,8]
 	cmp	w0, w23
-	beq	.L2159
-.L2141:
-.L2155:
+	beq	.L2238
+.L2220:
+.L2234:
 	add	x0, x25, :lo12:.LANCHOR2
 	mov	x2, x19
 	mov	w20, 0
 	ldrh	w5, [x0,748]
 	ldrh	w8, [x0,830]
 	add	x5, x19, x5, lsl 1
-.L2142:
+.L2221:
 	cmp	x2, x5
-	beq	.L2167
+	beq	.L2246
 	ldrh	w1, [x2,16]
 	cmp	w1, w23
-	beq	.L2143
+	beq	.L2222
 	add	x6, x21, :lo12:.LANCHOR2
 	mov	w0, 56
 	orr	w1, w26, w1, lsl 10
@@ -14388,19 +15166,19 @@ FtlGcScanTempBlk:
 	sdiv	w1, w1, w3
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x0,16]
-.L2143:
+.L2222:
 	add	x2, x2, 2
-	b	.L2142
-.L2167:
+	b	.L2221
+.L2246:
 	add	x0, x21, :lo12:.LANCHOR2
 	mov	w1, w20
 	mov	w2, 0
 	mov	x27, 0
 	ldr	x0, [x0,992]
 	bl	FlashReadPages
-.L2145:
+.L2224:
 	cmp	w20, w27, uxth
-	bls	.L2168
+	bls	.L2247
 	mov	x0, 56
 	mul	x28, x27, x0
 	add	x0, x21, :lo12:.LANCHOR2
@@ -14417,53 +15195,53 @@ FtlGcScanTempBlk:
 	ldr	x8, [x29,104]
 	ldr	x2, [x29,120]
 	ldr	w0, [x8,x28]
-	cbnz	w0, .L2146
+	cbnz	w0, .L2225
 	ldr	x1, [x29,112]
 	add	x27, x27, 1
 	ldr	x5, [x1,16]
 	ldrh	w0, [x5]
 	cmp	w0, w23
-	bne	.L2147
-	adrp	x0, .LANCHOR4+168
+	bne	.L2226
+	adrp	x0, .LANCHOR4+4008
 	mov	w1, 1
-	str	w1, [x0,#:lo12:.LANCHOR4+168]
-	b	.L2140
-.L2147:
+	str	w1, [x0,#:lo12:.LANCHOR4+4008]
+	b	.L2219
+.L2226:
 	mov	w1, w2
 	ldr	w0, [x5,12]
 	ldr	w2, [x5,8]
 	bl	FtlGcUpdatePage
-	b	.L2145
-.L2146:
+	b	.L2224
+.L2225:
 	ldr	x0, [x29,128]
 	ldrh	w1, [x19]
 	bl	printk
 	ldr	x0, [x29,144]
 	ldr	w0, [x0,652]
-	cbnz	w0, .L2148
+	cbnz	w0, .L2227
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L2149
-.L2148:
+	cbz	w0, .L2228
+.L2227:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldrh	w1, [x19]
 	ldr	x0, [x0,1168]
 	ldrh	w0, [x0,x1,lsl 1]
 	cmp	w0, 119
-	bls	.L2150
-.L2149:
+	bls	.L2229
+.L2228:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldr	x0, [x0,992]
 	ldr	w0, [x0,x28]
 	cmn	w0, #1
-	bne	.L2151
-.L2150:
+	bne	.L2230
+.L2229:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldr	x0, [x0,992]
 	add	x5, x0, x28
 	ldr	w0, [x5,4]
 	str	w0, [x29,156]
-.L2151:
+.L2230:
 	add	x0, x24, :lo12:.LANCHOR2
 	ldrh	w1, [x19]
 	mov	w26, 0
@@ -14474,36 +15252,36 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x19]
 	bl	FtlGcPageVarInit
-	b	.L2152
-.L2168:
+	b	.L2231
+.L2247:
 	ldr	w0, [x29,152]
 	add	w22, w22, 1
 	add	w3, w26, 1
 	cmp	w22, w0
 	uxth	w26, w3
-	bcs	.L2154
-.L2156:
+	bcs	.L2233
+.L2235:
 	add	x0, x21, :lo12:.LANCHOR2
 	ldrh	w0, [x0,818]
 	cmp	w0, w26
-	bhi	.L2155
-	b	.L2159
-.L2154:
+	bhi	.L2234
+	b	.L2238
+.L2233:
 	ldr	x0, [x29,136]
 	add	x1, x0, :lo12:.LANCHOR1
 	ldrh	w0, [x1,3068]
 	cmp	w0, w23
-	beq	.L2156
+	beq	.L2235
 	add	w0, w0, w22
 	strh	w0, [x1,3068]
 	add	x0, x21, :lo12:.LANCHOR2
 	ldrh	w0, [x0,818]
 	cmp	w0, w26
-	bls	.L2156
-	b	.L2157
-.L2159:
+	bls	.L2235
+	b	.L2236
+.L2238:
 	mov	w6, 0
-.L2140:
+.L2219:
 	ldr	x0, [x29,136]
 	mov	w1, w26
 	strh	w26, [x19,2]
@@ -14514,7 +15292,7 @@ FtlGcScanTempBlk:
 	strh	w0, [x20,3068]
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.L2157:
+.L2236:
 	ldr	w0, [x29,156]
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -14532,28 +15310,28 @@ FtlGcRefreshOpenBlock:
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	uxth	w19, w0
-	adrp	x0, .LC122
+	adrp	x0, .LC143
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC143
 	bl	printk
 	adrp	x2, .LANCHOR2
 	add	x2, x2, :lo12:.LANCHOR2
 	ldrh	w3, [x2,948]
 	cmp	w3, w19
-	beq	.L2170
+	beq	.L2249
 	ldrh	w1, [x2,950]
 	cmp	w1, w19
-	beq	.L2170
+	beq	.L2249
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L2171
+	bne	.L2250
 	strh	w19, [x2,948]
-	b	.L2170
-.L2171:
+	b	.L2249
+.L2250:
 	cmp	w1, w0
-	bne	.L2170
+	bne	.L2249
 	strh	w19, [x2,950]
-.L2170:
+.L2249:
 	mov	w0, 0
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -14567,28 +15345,28 @@ FtlGcRefreshBlock:
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	uxth	w19, w0
-	adrp	x0, .LC122
+	adrp	x0, .LC143
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC143
 	bl	printk
 	adrp	x2, .LANCHOR2
 	add	x2, x2, :lo12:.LANCHOR2
 	ldrh	w3, [x2,948]
 	cmp	w3, w19
-	beq	.L2173
+	beq	.L2252
 	ldrh	w1, [x2,950]
 	cmp	w1, w19
-	beq	.L2173
+	beq	.L2252
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L2174
+	bne	.L2253
 	strh	w19, [x2,948]
-	b	.L2173
-.L2174:
+	b	.L2252
+.L2253:
 	cmp	w1, w0
-	bne	.L2173
+	bne	.L2252
 	strh	w19, [x2,950]
-.L2173:
+.L2252:
 	mov	w0, 0
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -14610,48 +15388,48 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	uxth	w21, w0
 	ldrh	w1, [x22,958]
-	adrp	x0, .LC123
+	adrp	x0, .LC144
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC144
 	bl	printk
 	mov	w0, w21
 	bl	FtlGcRefreshBlock
 	ldr	w0, [x22,652]
-	cbz	w0, .L2176
+	cbz	w0, .L2255
 	ubfiz	x0, x21, 1, 16
 	ldr	x2, [x22,1168]
 	ldrh	w1, [x2,x0]
 	cmp	w1, 29
-	bls	.L2176
+	bls	.L2255
 	sub	w1, w1, #30
 	strh	w1, [x2,x0]
-.L2176:
+.L2255:
 	add	x0, x19, :lo12:.LANCHOR2
 	adrp	x1, .LANCHOR4
 	add	x1, x1, :lo12:.LANCHOR4
-	add	x1, x1, 184
+	add	x1, x1, 4024
 	ldrh	w3, [x0,958]
 	mov	x0, 0
-.L2177:
+.L2256:
 	cmp	w3, w0, uxth
-	bls	.L2183
+	bls	.L2262
 	add	x0, x0, 1
 	add	x2, x1, x0, lsl 1
 	ldrh	w2, [x2,-2]
 	cmp	w2, w20
-	bne	.L2177
-	b	.L2178
-.L2183:
+	bne	.L2256
+	b	.L2257
+.L2262:
 	cmp	w3, 15
-	bhi	.L2178
+	bhi	.L2257
 	adrp	x1, .LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR2
 	add	x1, x1, :lo12:.LANCHOR4
 	add	w0, w3, 1
-	add	x1, x1, 184
+	add	x1, x1, 4024
 	strh	w0, [x19,958]
 	strh	w20, [x1,w3,sxtw 1]
-.L2178:
+.L2257:
 	mov	w0, 0
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -14669,20 +15447,20 @@ FtlGcReFreshBadBlk:
 	adrp	x19, .LANCHOR2
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w1, [x0,958]
-	cbz	w1, .L2185
+	cbz	w1, .L2264
 	ldrh	w3, [x0,948]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L2185
+	bne	.L2264
 	ldrh	w2, [x0,962]
 	cmp	w2, w1
-	bcc	.L2186
+	bcc	.L2265
 	strh	wzr, [x0,962]
-.L2186:
+.L2265:
 	add	x19, x19, :lo12:.LANCHOR2
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
-	add	x0, x0, 184
+	add	x0, x0, 4024
 	ldrh	w1, [x19,962]
 	ldrh	w0, [x0,w1,sxtw 1]
 	bl	P2V_block_in_plane
@@ -14690,7 +15468,7 @@ FtlGcReFreshBadBlk:
 	ldrh	w0, [x19,962]
 	add	w0, w0, 1
 	strh	w0, [x19,962]
-.L2185:
+.L2264:
 	mov	w0, 0
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -14712,15 +15490,15 @@ FtlGcFreeBadSuperBlk:
 	stp	x21, x22, [sp,32]
 	stp	x25, x26, [sp,64]
 	mov	w21, 0
-	cbz	w0, .L2192
+	cbz	w0, .L2271
 	adrp	x24, .LANCHOR4
-	adrp	x22, .LC124
-	add	x22, x22, :lo12:.LC124
+	adrp	x22, .LC145
+	add	x22, x22, :lo12:.LC145
 	add	x25, x24, :lo12:.LANCHOR4
-.L2200:
+.L2279:
 	ldrh	w0, [x19,748]
 	cmp	w0, w21
-	bls	.L2201
+	bls	.L2280
 	add	x0, x19, 776
 	mov	w1, w23
 	mov	w20, 0
@@ -14728,14 +15506,14 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0,w21,sxtw]
 	bl	V2P_block
 	uxth	w26, w0
-.L2193:
+.L2272:
 	ldrh	w0, [x19,958]
 	cmp	w0, w20
-	bls	.L2202
-	add	x0, x27, 184
+	bls	.L2281
+	add	x0, x27, 4024
 	ldrh	w0, [x0,w20,sxtw 1]
 	cmp	w0, w26
-	bne	.L2194
+	bne	.L2273
 	mov	w1, w26
 	mov	x0, x22
 	bl	printk
@@ -14744,29 +15522,29 @@ FtlGcFreeBadSuperBlk:
 	bl	FtlBbmTblFlush
 	ldrh	w2, [x19,958]
 	mov	w3, w20
-.L2195:
+.L2274:
 	cmp	w3, w2
-	bcs	.L2203
-	add	x4, x25, 184
+	bcs	.L2282
+	add	x4, x25, 4024
 	add	w0, w3, 1
 	ldrh	w1, [x4,w0,sxtw 1]
 	strh	w1, [x4,w3,sxtw 1]
 	uxth	w3, w0
-	b	.L2195
-.L2203:
+	b	.L2274
+.L2282:
 	sub	w2, w2, #1
 	strh	w2, [x19,958]
-.L2194:
+.L2273:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L2193
-.L2202:
+	b	.L2272
+.L2281:
 	add	w21, w21, 1
 	uxth	w21, w21
-	b	.L2200
-.L2201:
+	b	.L2279
+.L2280:
 	bl	FtlGcReFreshBadBlk
-.L2192:
+.L2271:
 	mov	w0, 0
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -14785,29 +15563,31 @@ update_vpc_list:
 	stp	x19, x20, [sp,16]
 	adrp	x20, .LANCHOR2
 	uxth	w19, w0
-	add	x1, x20, :lo12:.LANCHOR2
+	add	x2, x20, :lo12:.LANCHOR2
 	ubfiz	x0, x19, 1, 16
-	ldr	x2, [x1,1184]
-	ldrh	w2, [x2,x0]
-	cbnz	w2, .L2205
-	ldrh	w0, [x1,3920]
-	cmp	w0, w19
-	bne	.L2206
-	mov	w0, -1
-	strh	w0, [x1,3920]
-	b	.L2207
-.L2206:
-	ldrh	w3, [x1,3608]
-	mov	w0, w2
+	ldr	x1, [x2,1184]
+	ldrh	w1, [x1,x0]
+	cbnz	w1, .L2284
+	adrp	x0, .LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR4
+	ldrh	w3, [x0,3408]
+	cmp	w3, w19
+	bne	.L2285
+	mov	w1, -1
+	strh	w1, [x0,3408]
+	b	.L2286
+.L2285:
+	ldrh	w3, [x2,3608]
+	mov	w0, w1
 	cmp	w3, w19
-	beq	.L2208
-	ldrh	w3, [x1,3656]
+	beq	.L2287
+	ldrh	w3, [x2,3656]
 	cmp	w3, w19
-	beq	.L2208
-	ldrh	w1, [x1,3704]
-	cmp	w1, w19
-	beq	.L2208
-.L2207:
+	beq	.L2287
+	ldrh	w2, [x2,3704]
+	cmp	w2, w19
+	beq	.L2287
+.L2286:
 	add	x20, x20, :lo12:.LANCHOR2
 	mov	w1, w19
 	add	x0, x20, 3568
@@ -14820,12 +15600,12 @@ update_vpc_list:
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
 	mov	w0, 1
-	b	.L2208
-.L2205:
+	b	.L2287
+.L2284:
 	mov	w0, w19
 	bl	List_update_data_list
 	mov	w0, 0
-.L2208:
+.L2287:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -14840,43 +15620,43 @@ decrement_vpc_count:
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	cmp	w1, w0
-	beq	.L2213
+	beq	.L2292
 	adrp	x2, .LANCHOR2+1184
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2,#:lo12:.LANCHOR2+1184]
 	ldrh	w19, [x2,x0]
-	cbnz	w19, .L2214
-	adrp	x0, .LC125
+	cbnz	w19, .L2293
+	adrp	x0, .LC146
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC146
 	bl	printk
-	b	.L2218
-.L2214:
+	b	.L2297
+.L2293:
 	sub	w19, w19, #1
 	strh	w19, [x2,x0]
-.L2213:
+.L2292:
 	adrp	x19, .LANCHOR4
 	mov	w0, 65535
 	add	x19, x19, :lo12:.LANCHOR4
-	ldrh	w2, [x19,160]
+	ldrh	w2, [x19,4000]
 	cmp	w2, w0
-	bne	.L2216
-	strh	w1, [x19,160]
-.L2218:
+	bne	.L2295
+	strh	w1, [x19,4000]
+.L2297:
 	mov	w0, 0
-	b	.L2215
-.L2216:
+	b	.L2294
+.L2295:
 	cmp	w2, w1
 	str	x1, [x29,40]
 	mov	w0, 0
-	beq	.L2215
+	beq	.L2294
 	mov	w0, w2
 	bl	update_vpc_list
 	cmp	w0, wzr
 	ldr	x1, [x29,40]
 	cset	w0, ne
-	strh	w1, [x19,160]
-.L2215:
+	strh	w1, [x19,4000]
+.L2294:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -14896,7 +15676,7 @@ FtlRecoverySuperblock:
 	mov	x19, x0
 	ldrh	w0, [x0]
 	cmp	w0, w2
-	beq	.L2377
+	beq	.L2456
 	ldrh	w0, [x19,2]
 	adrp	x20, .LANCHOR2
 	str	w0, [x29,188]
@@ -14905,44 +15685,44 @@ FtlRecoverySuperblock:
 	ldr	w1, [x29,188]
 	ldrh	w0, [x0,818]
 	cmp	w0, w1
-	bne	.L2222
+	bne	.L2301
 	strh	wzr, [x19,4]
-	b	.L2383
-.L2222:
+	b	.L2462
+.L2301:
 	ldrh	w0, [x19,16]
 	mov	w1, 0
-.L2223:
+.L2302:
 	cmp	w0, w2
-	bne	.L2386
+	bne	.L2465
 	add	w1, w1, 1
 	uxth	w1, w1
 	add	x0, x19, x1, sxtw 1
 	ldrh	w0, [x0,16]
-	b	.L2223
-.L2386:
+	b	.L2302
+.L2465:
 	ldrb	w1, [x19,8]
 	cmp	w1, 1
-	bne	.L2225
+	bne	.L2304
 	bl	FtlGetLastWrittenPage
 	cmn	w0, #1
 	mov	w21, w0
-	beq	.L2226
+	beq	.L2305
 	adrp	x0, .LANCHOR0
 	mov	w23, w21
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w1, [x0,136]
-	cbnz	w1, .L2300
+	cbnz	w1, .L2379
 	add	x0, x0, 140
 	ldrh	w23, [x0,w21,sxtw 1]
-	b	.L2300
-.L2225:
+	b	.L2379
+.L2304:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	cmn	w0, #1
 	mov	w21, w0
-	beq	.L2226
+	beq	.L2305
 	mov	w23, w0
-.L2300:
+.L2379:
 	add	x0, x20, :lo12:.LANCHOR2
 	mov	x2, x19
 	mov	w25, 0
@@ -14952,16 +15732,16 @@ FtlRecoverySuperblock:
 	ldrh	w4, [x0,748]
 	ldrh	w7, [x0,830]
 	add	x4, x19, x4, lsl 1
-	b	.L2228
-.L2226:
+	b	.L2307
+.L2305:
 	strh	wzr, [x19,2]
-.L2383:
+.L2462:
 	strb	wzr, [x19,6]
-	b	.L2377
-.L2230:
+	b	.L2456
+.L2309:
 	ldrh	w1, [x2,16]
 	cmp	w1, w8
-	beq	.L2229
+	beq	.L2308
 	add	x5, x20, :lo12:.LANCHOR2
 	orr	w1, w23, w1, lsl 10
 	umull	x0, w25, w9
@@ -14978,21 +15758,21 @@ FtlRecoverySuperblock:
 	sdiv	w1, w1, w10
 	add	x1, x5, x1, sxtw 2
 	str	x1, [x0,16]
-.L2229:
+.L2308:
 	add	x2, x2, 2
-.L2228:
+.L2307:
 	cmp	x2, x4
-	bne	.L2230
+	bne	.L2309
 	ldrb	w0, [x19,8]
 	str	wzr, [x29,184]
 	cmp	w0, 1
-	bne	.L2231
+	bne	.L2310
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
 	cmp	w0, wzr
 	cset	w0, ne
 	str	w0, [x29,184]
-.L2231:
+.L2310:
 	add	x22, x20, :lo12:.LANCHOR2
 	ldr	w2, [x29,184]
 	mov	w1, w25
@@ -15002,26 +15782,26 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22,992]
 	bl	FlashReadPages
 	ldr	w0, [x22,876]
-	adrp	x22, .LC126
+	adrp	x22, .LC147
 	str	w0, [x29,176]
-	add	x22, x22, :lo12:.LC126
+	add	x22, x22, :lo12:.LC147
 	uxth	w0, w23
 	str	w0, [x29,168]
-.L2232:
+.L2311:
 	uxth	w2, w26
 	cmp	w2, w25
-	bcs	.L2239
+	bcs	.L2318
 	add	x6, x20, :lo12:.LANCHOR2
 	mov	x0, 56
 	mul	x0, x26, x0
 	ldr	x4, [x6,992]
 	add	x1, x4, x0
 	ldr	w0, [x4,x0]
-	cbnz	w0, .L2233
+	cbnz	w0, .L2312
 	ldr	x7, [x1,16]
 	ldr	w4, [x7,4]
 	cmn	w4, #1
-	beq	.L2234
+	beq	.L2313
 	ldr	w1, [x6,876]
 	mov	w0, w4
 	str	x7, [x29,136]
@@ -15033,34 +15813,34 @@ FtlRecoverySuperblock:
 	ldr	x4, [x29,152]
 	ldr	x2, [x29,144]
 	ldr	x7, [x29,136]
-	cbz	w0, .L2234
+	cbz	w0, .L2313
 	add	w4, w4, 1
 	str	w4, [x6,876]
-.L2234:
+.L2313:
 	ldr	w0, [x7]
 	cmn	w0, #1
-	bne	.L2235
-.L2239:
+	bne	.L2314
+.L2318:
 	cmp	w2, w25
-	bne	.L2378
+	bne	.L2457
 	add	x0, x20, :lo12:.LANCHOR2
 	add	w21, w21, 1
 	uxth	w21, w21
 	ldr	x0, [x0,992]
 	ldr	w0, [x0,4]
-	b	.L2379
-.L2233:
+	b	.L2458
+.L2312:
 	ldr	w1, [x1,4]
 	mov	x0, x22
 	bl	printk
 	ldr	w24, [x29,168]
 	add	x0, x27, :lo12:.LANCHOR4
 	ldrh	w1, [x19]
-	strh	w1, [x0,218]
-.L2235:
+	strh	w1, [x0,4058]
+.L2314:
 	add	x26, x26, 1
-	b	.L2232
-.L2378:
+	b	.L2311
+.L2457:
 	add	x0, x20, :lo12:.LANCHOR2
 	mov	w1, 56
 	uxth	w21, w21
@@ -15068,83 +15848,83 @@ FtlRecoverySuperblock:
 	ldr	x0, [x0,992]
 	add	x2, x0, x2
 	ldr	w0, [x2,4]
-.L2379:
+.L2458:
 	lsr	x0, x0, 10
 	bl	P2V_plane
 	uxth	w26, w0
 	ldrb	w1, [x19,8]
 	cmp	w1, 1
-	bne	.L2241
+	bne	.L2320
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w2, [x0,136]
-	cbnz	w2, .L2241
+	cbnz	w2, .L2320
 	add	x0, x0, 140
 	ldrh	w21, [x0,w21,sxtw 1]
-.L2241:
+.L2320:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w0, [x0,818]
 	cmp	w0, w21
-	bne	.L2242
+	bne	.L2321
 	strh	w21, [x19,2]
 	strb	wzr, [x19,6]
 	strh	wzr, [x19,4]
-.L2242:
+.L2321:
 	uxth	w0, w28
 	str	w0, [x29,152]
 	ldr	w0, [x29,188]
 	cmp	w21, w0
-	bne	.L2243
+	bne	.L2322
 	ldr	w0, [x29,152]
 	cmp	w26, w0
-	beq	.L2384
-.L2243:
+	beq	.L2463
+.L2322:
 	ldr	w0, [x29,176]
 	adrp	x25, .LANCHOR4
 	sub	w22, w0, #1
 	mov	w0, 65535
 	cmp	w24, w0
-	bne	.L2244
-	cbnz	w1, .L2245
-.L2244:
+	bne	.L2323
+	cbnz	w1, .L2324
+.L2323:
 	add	x0, x25, :lo12:.LANCHOR4
 	uxth	w6, w23
-	ldr	w1, [x0,172]
+	ldr	w1, [x0,4012]
 	cmn	w1, #1
-	bne	.L2246
-	str	w22, [x0,172]
-.L2246:
+	bne	.L2325
+	str	w22, [x0,4012]
+.L2325:
 	add	x0, x25, :lo12:.LANCHOR4
 	ldr	w24, [x29,188]
-	ldr	w3, [x0,172]
+	ldr	w3, [x0,4012]
 	ldr	w0, [x29,188]
 	add	w0, w0, 7
 	cmp	w0, w23, uxth
-	bge	.L2247
+	bge	.L2326
 	sub	w24, w6, #7
 	uxth	w24, w24
-.L2247:
+.L2326:
 	adrp	x7, .LANCHOR0
 	mov	w28, -1
 	add	x5, x7, :lo12:.LANCHOR0
 	mov	w27, w28
 	mov	w4, 65535
 	add	x5, x5, 652
-.L2248:
+.L2327:
 	cmp	w24, w6
-	bhi	.L2261
+	bhi	.L2340
 	add	x0, x20, :lo12:.LANCHOR2
 	mov	w23, 0
 	mov	w10, 56
 	ldrh	w2, [x0,748]
 	mov	x0, x19
 	add	x2, x19, x2, lsl 1
-.L2262:
+.L2341:
 	cmp	x0, x2
-	beq	.L2387
+	beq	.L2466
 	ldrh	w1, [x0,16]
 	cmp	w1, w4
-	beq	.L2249
+	beq	.L2328
 	add	x9, x20, :lo12:.LANCHOR2
 	orr	w1, w24, w1, lsl 10
 	umull	x8, w23, w10
@@ -15153,10 +15933,10 @@ FtlRecoverySuperblock:
 	uxth	w23, w23
 	add	x8, x9, x8
 	str	w1, [x8,4]
-.L2249:
+.L2328:
 	add	x0, x0, 2
-	b	.L2262
-.L2387:
+	b	.L2341
+.L2466:
 	add	x8, x20, :lo12:.LANCHOR2
 	ldr	w2, [x29,184]
 	mov	w1, w23
@@ -15180,99 +15960,99 @@ FtlRecoverySuperblock:
 	ldr	x0, [x8,992]
 	ldr	x5, [x29,128]
 	add	x0, x0, 16
-.L2251:
+.L2330:
 	cmp	w1, w23
-	beq	.L2388
+	beq	.L2467
 	ldr	w2, [x0,-16]
-	cbnz	w2, .L2252
+	cbnz	w2, .L2331
 	ldr	x2, [x0]
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2253
+	beq	.L2332
 	ldr	w8, [x2,4]
 	cmn	w8, #1
-	beq	.L2253
+	beq	.L2332
 	add	x2, x25, :lo12:.LANCHOR4
 	cmn	w28, #1
-	ldr	w27, [x2,172]
-	str	w8, [x2,172]
-	bne	.L2253
+	ldr	w27, [x2,4012]
+	str	w8, [x2,4012]
+	bne	.L2332
 	ldrh	w2, [x5,x10,lsl 1]
 	cmp	w2, w4
-	bne	.L2254
-	cbz	w9, .L2253
-.L2254:
+	bne	.L2333
+	cbz	w9, .L2332
+.L2333:
 	cmp	w27, w22
 	csinv	w28, w27, wzr, ne
-	b	.L2253
-.L2252:
+	b	.L2332
+.L2331:
 	add	x0, x25, :lo12:.LANCHOR4
 	ldrh	w1, [x19]
-	strh	w1, [x0,218]
+	strh	w1, [x0,4058]
 	ldrb	w1, [x19,8]
-	cbnz	w1, .L2245
+	cbnz	w1, .L2324
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x1, x1, 652
 	ldrh	w2, [x1,w24,sxtw 1]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L2256
+	bne	.L2335
 	cmn	w28, #1
-	beq	.L2257
-	str	w28, [x0,172]
-	b	.L2245
-.L2257:
+	beq	.L2336
+	str	w28, [x0,4012]
+	b	.L2324
+.L2336:
 	cmp	w3, w22
-	beq	.L2258
-	str	w3, [x0,172]
-	b	.L2245
-.L2258:
-	ldr	w1, [x0,172]
-	b	.L2385
-.L2256:
+	beq	.L2337
+	str	w3, [x0,4012]
+	b	.L2324
+.L2337:
+	ldr	w1, [x0,4012]
+	b	.L2464
+.L2335:
 	cmp	w27, w22
-	beq	.L2259
+	beq	.L2338
 	cmn	w27, #1
-	beq	.L2245
-	str	w27, [x0,172]
-	b	.L2245
-.L2259:
-	ldr	w1, [x0,172]
+	beq	.L2324
+	str	w27, [x0,4012]
+	b	.L2324
+.L2338:
+	ldr	w1, [x0,4012]
 	cmp	w1, w22
-	beq	.L2245
-.L2385:
+	beq	.L2324
+.L2464:
 	sub	w1, w1, #1
-	b	.L2380
-.L2253:
+	b	.L2459
+.L2332:
 	add	w1, w1, 1
 	add	x0, x0, 56
 	uxth	w1, w1
-	b	.L2251
-.L2388:
+	b	.L2330
+.L2467:
 	add	w24, w24, 1
 	uxth	w24, w24
-	b	.L2248
-.L2261:
+	b	.L2327
+.L2340:
 	add	x0, x25, :lo12:.LANCHOR4
 	mov	w1, -1
-.L2380:
-	str	w1, [x0,172]
-.L2245:
+.L2459:
+	str	w1, [x0,4012]
+.L2324:
 	add	x0, x25, :lo12:.LANCHOR4
 	mov	w1, 1
-	strh	w1, [x0,220]
+	strh	w1, [x0,4060]
 	add	x0, x20, :lo12:.LANCHOR2
 	add	x0, x0, 3752
 	bl	FtlMapBlkWriteDumpData
 	ldr	w23, [x29,188]
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	str	x0, [x29,128]
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	str	x0, [x29,120]
-.L2263:
+.L2342:
 	add	x0, x20, :lo12:.LANCHOR2
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
@@ -15283,12 +16063,12 @@ FtlRecoverySuperblock:
 	ldrb	w6, [x1,136]
 	mov	x1, x19
 	add	x3, x19, x3, lsl 1
-.L2264:
+.L2343:
 	cmp	x1, x3
-	beq	.L2389
+	beq	.L2468
 	ldrh	w2, [x1,16]
 	cmp	w2, w7
-	beq	.L2265
+	beq	.L2344
 	ldr	w0, [x29,176]
 	add	x5, x20, :lo12:.LANCHOR2
 	orr	w2, w23, w2, lsl 10
@@ -15298,33 +16078,33 @@ FtlRecoverySuperblock:
 	str	w2, [x4,4]
 	ldrb	w2, [x19,8]
 	cmp	w2, 1
-	bne	.L2266
-	cbz	w6, .L2266
+	bne	.L2345
+	cbz	w6, .L2345
 	ldr	x2, [x5,992]
 	add	x0, x2, x0
 	ldr	w2, [x0,4]
 	orr	w2, w2, -2147483648
 	str	w2, [x0,4]
-.L2266:
+.L2345:
 	ldr	w0, [x29,176]
 	add	w0, w0, 1
 	uxth	w0, w0
 	str	w0, [x29,176]
-.L2265:
+.L2344:
 	add	x1, x1, 2
-	b	.L2264
-.L2389:
+	b	.L2343
+.L2468:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	w1, [x29,176]
 	ldr	w2, [x29,184]
 	ldr	x0, [x0,992]
 	bl	FlashReadPages
 	str	xzr, [x29,160]
-.L2268:
+.L2347:
 	ldrh	w0, [x29,160]
 	ldr	w1, [x29,176]
 	cmp	w1, w0, uxth
-	bls	.L2390
+	bls	.L2469
 	ldr	x0, [x29,160]
 	mov	x24, 56
 	mul	x24, x0, x24
@@ -15340,38 +16120,38 @@ FtlRecoverySuperblock:
 	ldr	w1, [x29,188]
 	cmp	w23, w1
 	ldr	x1, [x29,168]
-	bcc	.L2269
+	bcc	.L2348
 	ldr	w2, [x29,152]
 	cmp	w0, w2
-	bcs	.L2304
+	bcs	.L2383
 	ldr	w2, [x29,188]
 	cmp	w23, w2
-	beq	.L2269
-.L2304:
+	beq	.L2348
+.L2383:
 	cmp	w0, w26
-	bne	.L2305
+	bne	.L2384
 	cmp	w23, w21
-	beq	.L2271
-.L2305:
+	beq	.L2350
+.L2384:
 	ldr	w0, [x28,x24]
 	cmn	w0, #1
-	beq	.L2273
+	beq	.L2352
 	ldr	x28, [x27,16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2280
+	bne	.L2359
 	ldr	w22, [x28,4]
 	cmn	w22, #1
-	beq	.L2275
+	beq	.L2354
 	add	x27, x20, :lo12:.LANCHOR2
 	mov	w0, w22
 	ldr	w1, [x27,876]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2275
+	cbz	w0, .L2354
 	add	w0, w22, 1
 	str	w0, [x27,876]
-.L2275:
+.L2354:
 	ldr	w27, [x28,8]
 	add	x1, x29, 200
 	ldr	w0, [x28,12]
@@ -15381,15 +16161,15 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	add	x0, x25, :lo12:.LANCHOR4
 	str	x0, [x29,136]
-	ldr	w1, [x0,172]
+	ldr	w1, [x0,4012]
 	cmn	w1, #1
-	beq	.L2276
+	beq	.L2355
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2276
+	cbz	w0, .L2355
 	ldr	w1, [x29,196]
 	cmn	w1, #1
-	beq	.L2277
+	beq	.L2356
 	add	x3, x20, :lo12:.LANCHOR2
 	str	x3, [x29,112]
 	ldr	x0, [x3,992]
@@ -15410,45 +16190,45 @@ FtlRecoverySuperblock:
 	add	x4, x2, x24
 	ldr	w0, [x2,x24]
 	cmn	w0, #1
-	bne	.L2278
-	b	.L2279
-.L2277:
+	bne	.L2357
+	b	.L2358
+.L2356:
 	ldr	w0, [x29,204]
 	ldr	w1, [x29,200]
 	cmp	w1, w0
-	bne	.L2280
+	bne	.L2359
 	mov	w0, w27
 	add	x1, x29, 196
 	mov	w2, 1
 	bl	log2phys
-.L2280:
+.L2359:
 	ldrh	w0, [x19]
-	b	.L2382
-.L2278:
+	b	.L2461
+.L2357:
 	ldr	x0, [x29,168]
 	ldr	w28, [x0,8]
 	cmp	w28, w27
-	bne	.L2279
+	bne	.L2358
 	ldr	x0, [x29,136]
 	ldr	w1, [x29,144]
 	str	x2, [x29,96]
-	ldr	w0, [x0,172]
+	ldr	w0, [x0,4012]
 	str	x3, [x29,104]
 	str	x4, [x29,112]
 	bl	ftl_cmp_data_ver
 	ldr	x4, [x29,112]
 	ldr	x3, [x29,104]
 	ldr	x2, [x29,96]
-	cbz	w0, .L2279
+	cbz	w0, .L2358
 	ldr	w0, [x29,200]
 	ldr	w1, [x29,204]
 	cmp	w0, w1
-	beq	.L2285
+	beq	.L2364
 	ldr	w1, [x29,196]
 	cmp	w0, w1
-	beq	.L2279
+	beq	.L2358
 	cmn	w0, #1
-	beq	.L2283
+	beq	.L2362
 	str	w0, [x4,4]
 	mov	w2, 0
 	ldr	x1, [x4,16]
@@ -15457,65 +16237,65 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	add	x0, x0, x24
 	bl	FlashReadPages
-	b	.L2284
-.L2283:
+	b	.L2363
+.L2362:
 	str	w0, [x2,x24]
-.L2284:
+.L2363:
 	adrp	x0, .LANCHOR2+992
 	ldr	x0, [x0,#:lo12:.LANCHOR2+992]
 	ldr	w0, [x0,x24]
 	cmn	w0, #1
-	beq	.L2285
+	beq	.L2364
 	ldr	x0, [x29,168]
 	ldr	w24, [x0,4]
 	add	x0, x25, :lo12:.LANCHOR4
 	mov	w1, w24
-	ldr	w0, [x0,172]
+	ldr	w0, [x0,4012]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2285
+	cbz	w0, .L2364
 	ldr	w0, [x29,144]
 	mov	w1, w24
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2279
-.L2285:
+	cbz	w0, .L2358
+.L2364:
 	ldr	w1, [x29,196]
 	mov	w0, w28
 	bl	FtlReUsePrevPpa
-.L2279:
+.L2358:
 	mov	w0, -1
 	str	w0, [x29,196]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L2287
-.L2276:
+	b	.L2366
+.L2355:
 	ldr	w0, [x29,204]
 	ldr	w1, [x29,200]
 	cmp	w1, w0
-	beq	.L2287
+	beq	.L2366
 	mov	w0, w27
 	add	x1, x29, 204
 	mov	w2, 1
 	bl	log2phys
 	ldr	w24, [x29,200]
 	cmn	w24, #1
-	beq	.L2287
+	beq	.L2366
 	ldr	w0, [x29,196]
 	cmp	w24, w0
-	beq	.L2287
+	beq	.L2366
 	lsr	x0, x24, 10
 	bl	P2V_block_in_plane
 	uxth	w0, w0
 	add	x1, x20, :lo12:.LANCHOR2
 	ldrh	w2, [x1,3608]
 	cmp	w2, w0
-	beq	.L2290
+	beq	.L2369
 	ldrh	w2, [x1,3656]
 	cmp	w2, w0
-	beq	.L2290
+	beq	.L2369
 	ldrh	w1, [x1,3704]
 	cmp	w1, w0
-	bne	.L2287
-.L2290:
+	bne	.L2366
+.L2369:
 	add	x28, x20, :lo12:.LANCHOR2
 	mov	w1, 1
 	mov	w2, 0
@@ -15530,18 +16310,18 @@ FtlRecoverySuperblock:
 	ldr	w0, [x0]
 	ldr	w1, [x3,4]
 	cmn	w0, #1
-	beq	.L2287
+	beq	.L2366
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2287
+	cbnz	w0, .L2366
 	mov	w0, w27
 	add	x1, x29, 200
 	mov	w2, 1
 	bl	log2phys
-.L2287:
+.L2366:
 	ldr	w0, [x29,196]
 	cmn	w0, #1
-	beq	.L2269
+	beq	.L2348
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	uxth	w1, w0
@@ -15549,91 +16329,91 @@ FtlRecoverySuperblock:
 	ubfiz	x3, x1, 1, 16
 	ldr	x2, [x2,1184]
 	ldrh	w2, [x2,x3]
-	cbz	w2, .L2291
-.L2382:
+	cbz	w2, .L2370
+.L2461:
 	bl	decrement_vpc_count
-	b	.L2269
-.L2291:
+	b	.L2348
+.L2370:
 	ldr	x0, [x29,120]
 	bl	printk
-	b	.L2269
-.L2273:
+	b	.L2348
+.L2352:
 	add	x24, x25, :lo12:.LANCHOR4
 	ldrh	w0, [x19]
 	mov	w2, w22
-	strh	w0, [x24,218]
+	strh	w0, [x24,4058]
 	ldr	x0, [x29,128]
 	bl	printk
-	ldr	w0, [x24,224]
+	ldr	w0, [x24,4064]
 	cmp	w0, 31
-	bhi	.L2292
-	add	x1, x24, 232
+	bhi	.L2371
+	add	x1, x24, 4072
 	ldr	w2, [x29,204]
 	str	w2, [x1,w0,uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x24,224]
-.L2292:
+	str	w0, [x24,4064]
+.L2371:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	add	x0, x25, :lo12:.LANCHOR4
-	ldr	w1, [x0,172]
+	ldr	w1, [x0,4012]
 	cmn	w1, #1
-	beq	.L2381
+	beq	.L2460
 	cmp	w1, w22
-	bls	.L2269
-.L2381:
-	str	w22, [x0,172]
-.L2269:
+	bls	.L2348
+.L2460:
+	str	w22, [x0,4012]
+.L2348:
 	ldr	x0, [x29,160]
 	add	x0, x0, 1
 	str	x0, [x29,160]
-	b	.L2268
-.L2390:
+	b	.L2347
+.L2469:
 	ldrb	w0, [x19,8]
 	add	w23, w23, 1
 	cmp	w0, 1
 	uxth	w23, w23
-	bne	.L2295
+	bne	.L2374
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2295
+	cbz	w0, .L2374
 	cmp	w21, w23
-	bne	.L2295
+	bne	.L2374
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w0, [x0,820]
 	cmp	w0, w23
-	beq	.L2271
-.L2295:
+	beq	.L2350
+.L2374:
 	add	x0, x20, :lo12:.LANCHOR2
 	ldrh	w1, [x0,818]
 	cmp	w23, w1
-	bne	.L2263
+	bne	.L2342
 	ldrh	w2, [x0,748]
 	mov	w3, 65535
 	strh	w23, [x19,2]
 	mov	x0, 0
 	strh	wzr, [x19,4]
-.L2297:
+.L2376:
 	uxth	w1, w0
 	cmp	w1, w2
-	bcs	.L2377
+	bcs	.L2456
 	add	x0, x0, 1
 	add	x4, x19, x0, lsl 1
 	ldrh	w4, [x4,14]
 	cmp	w4, w3
-	beq	.L2297
+	beq	.L2376
 	strb	w1, [x19,6]
-	b	.L2377
-.L2271:
+	b	.L2456
+.L2350:
 	strb	w26, [x19,6]
 	strh	w21, [x19,2]
-.L2384:
+.L2463:
 	mov	x0, x19
 	mov	w1, w21
 	mov	w2, w26
 	bl	ftl_sb_update_avl_pages
-.L2377:
+.L2456:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -15653,11 +16433,11 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp,32]
 	str	x23, [sp,48]
 	ldrh	w1, [x0,4]
-	cbz	w1, .L2391
+	cbz	w1, .L2470
 	ldrh	w1, [x0]
 	mov	w20, 65535
 	cmp	w1, w20
-	beq	.L2391
+	beq	.L2470
 	mov	x19, x0
 	ldrb	w0, [x0,6]
 	adrp	x21, .LANCHOR0
@@ -15666,10 +16446,10 @@ FtlSlcSuperblockCheck:
 	add	x21, x21, :lo12:.LANCHOR0
 	add	x22, x21, 652
 	ldrh	w0, [x19,x0,lsl 1]
-.L2395:
+.L2474:
 	cmp	w0, w20
-	bne	.L2402
-.L2397:
+	bne	.L2481
+.L2476:
 	ldrb	w0, [x19,6]
 	add	x1, x23, :lo12:.LANCHOR2
 	add	w0, w0, 1
@@ -15677,51 +16457,51 @@ FtlSlcSuperblockCheck:
 	uxtb	w0, w0
 	strb	w0, [x19,6]
 	cmp	w1, w0
-	bne	.L2396
+	bne	.L2475
 	ldrh	w0, [x19,2]
 	strb	wzr, [x19,6]
 	add	w0, w0, 1
 	strh	w0, [x19,2]
-.L2396:
+.L2475:
 	ldrb	w0, [x19,6]
 	add	x0, x0, 8
 	ldrh	w0, [x19,x0,lsl 1]
-	b	.L2395
-.L2402:
+	b	.L2474
+.L2481:
 	ldrb	w1, [x19,8]
 	cmp	w1, 1
-	bne	.L2398
+	bne	.L2477
 	ldrb	w0, [x21,136]
-	cbnz	w0, .L2398
+	cbnz	w0, .L2477
 	ldrh	w0, [x19,2]
 	ldrh	w0, [x22,w0,sxtw 1]
 	cmp	w0, w20
-	bne	.L2398
+	bne	.L2477
 	ldrh	w0, [x19,4]
 	sub	w0, w0, #1
 	strh	w0, [x19,4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w1, [x19,4]
-	cbnz	w1, .L2397
+	cbnz	w1, .L2476
 	ldrh	w0, [x19,2]
 	strb	w1, [x19,6]
 	add	w0, w0, 1
 	strh	w0, [x19,2]
-	b	.L2391
-.L2398:
+	b	.L2470
+.L2477:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2391
+	cbz	w0, .L2470
 	cmp	w1, 1
-	bne	.L2391
+	bne	.L2470
 	adrp	x0, .LANCHOR2
 	ldrh	w2, [x19,2]
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w1, [x0,820]
 	cmp	w2, w1
-	bcc	.L2391
+	bcc	.L2470
 	ldrh	w1, [x19]
 	ldr	x3, [x0,1184]
 	lsl	x1, x1, 1
@@ -15733,7 +16513,7 @@ FtlSlcSuperblockCheck:
 	ldrh	w0, [x0,818]
 	strh	w0, [x19,2]
 	strb	wzr, [x19,6]
-.L2391:
+.L2470:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -15760,11 +16540,11 @@ get_new_active_ppa:
 	add	x0, x0, 8
 	add	x24, x20, 652
 	ldrh	w0, [x19,x0,lsl 1]
-.L2404:
+.L2483:
 	cmp	w0, w22
 	adrp	x21, .LANCHOR2
-	bne	.L2419
-.L2405:
+	bne	.L2498
+.L2484:
 	ldrb	w0, [x19,6]
 	add	x1, x23, :lo12:.LANCHOR2
 	add	w0, w0, 1
@@ -15772,33 +16552,33 @@ get_new_active_ppa:
 	uxtb	w0, w0
 	strb	w0, [x19,6]
 	cmp	w1, w0
-	bne	.L2406
+	bne	.L2485
 	ldrh	w0, [x19,2]
 	strb	wzr, [x19,6]
 	add	w0, w0, 1
 	strh	w0, [x19,2]
-.L2406:
+.L2485:
 	ldrb	w0, [x19,6]
 	add	x0, x0, 8
 	ldrh	w0, [x19,x0,lsl 1]
-	b	.L2404
-.L2419:
+	b	.L2483
+.L2498:
 	ldrb	w1, [x19,8]
 	cmp	w1, 1
-	bne	.L2407
+	bne	.L2486
 	ldrb	w1, [x20,136]
-	cbnz	w1, .L2407
+	cbnz	w1, .L2486
 	ldrh	w1, [x19,2]
 	ldrh	w1, [x24,w1,sxtw 1]
 	cmp	w1, w22
-	bne	.L2407
+	bne	.L2486
 	ldrh	w0, [x19,4]
 	sub	w0, w0, #1
 	strh	w0, [x19,4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L2405
-.L2407:
+	b	.L2484
+.L2486:
 	ldrh	w1, [x19,4]
 	adrp	x20, .LANCHOR0
 	ldrh	w22, [x19,2]
@@ -15809,51 +16589,51 @@ get_new_active_ppa:
 	strh	w1, [x19,4]
 	mov	w24, w23
 	add	x25, x20, 652
-.L2408:
+.L2487:
 	add	x0, x21, :lo12:.LANCHOR2
 	ldrb	w1, [x19,6]
 	ldrh	w2, [x0,748]
-.L2410:
+.L2489:
 	add	w1, w1, 1
 	uxtb	w1, w1
 	cmp	w1, w2
-	bne	.L2409
+	bne	.L2488
 	ldrh	w1, [x19,2]
 	add	w1, w1, 1
 	strh	w1, [x19,2]
 	mov	w1, 0
-.L2409:
+.L2488:
 	add	x0, x19, x1, sxtw 1
 	ldrh	w0, [x0,16]
 	cmp	w0, w23
-	beq	.L2410
+	beq	.L2489
 	ldrb	w0, [x19,8]
 	strb	w1, [x19,6]
 	cmp	w0, 1
-	bne	.L2415
+	bne	.L2494
 	ldrb	w0, [x20,136]
-	cbnz	w0, .L2412
+	cbnz	w0, .L2491
 	ldrh	w0, [x19,2]
 	ldrh	w0, [x25,w0,sxtw 1]
 	cmp	w0, w24
-	bne	.L2412
+	bne	.L2491
 	ldrh	w1, [x19,4]
-	cbz	w1, .L2412
+	cbz	w1, .L2491
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19,4]
 	bl	decrement_vpc_count
-	b	.L2408
-.L2412:
+	b	.L2487
+.L2491:
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	ldrb	w0, [x1,136]
-	cbz	w0, .L2415
+	cbz	w0, .L2494
 	add	x2, x21, :lo12:.LANCHOR2
 	ldrh	w1, [x19,2]
 	ldrh	w0, [x2,820]
 	cmp	w1, w0
-	bcc	.L2415
+	bcc	.L2494
 	ldrh	w1, [x19]
 	ldr	x0, [x2,1184]
 	lsl	x1, x1, 1
@@ -15865,7 +16645,7 @@ get_new_active_ppa:
 	ldrh	w0, [x2,818]
 	strh	w0, [x19,2]
 	strb	wzr, [x19,6]
-.L2415:
+.L2494:
 	mov	w0, w22
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -15887,20 +16667,20 @@ FtlWriteDumpData:
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	ldr	w0, [x20,1400]
-	cbnz	w0, .L2420
+	cbnz	w0, .L2499
 	ldrh	w2, [x20,3612]
-	cbz	w2, .L2422
+	cbz	w2, .L2501
 	ldrb	w1, [x20,3616]
-	cbnz	w1, .L2422
+	cbnz	w1, .L2501
 	ldrb	w1, [x20,3615]
 	ldrh	w3, [x20,818]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2422
+	beq	.L2501
 	ldrb	w23, [x20,3618]
 	ldr	w22, [x20,1396]
 	ldrh	w24, [x20,748]
-	cbnz	w23, .L2420
+	cbnz	w23, .L2499
 	sub	w22, w22, #1
 	add	x1, x29, 84
 	mov	w0, w22
@@ -15915,29 +16695,29 @@ FtlWriteDumpData:
 	str	x1, [x29,96]
 	str	x21, [x29,104]
 	str	w23, [x21,4]
-	beq	.L2424
+	beq	.L2503
 	add	x0, x29, 88
 	mov	w1, 1
 	mov	w2, w23
 	bl	FlashReadPages
-	b	.L2425
-.L2424:
+	b	.L2504
+.L2503:
 	ldr	x0, [x20,1048]
 	mov	w1, 255
 	ldrh	w2, [x20,828]
 	bl	ftl_memset
-.L2425:
+.L2504:
 	add	x25, x19, :lo12:.LANCHOR2
 	mov	w0, -3947
 	lsl	w24, w24, 2
 	strh	w0, [x21]
 	mov	w23, 0
 	add	x20, x25, 3608
-.L2426:
+.L2505:
 	cmp	w23, w24
-	beq	.L2427
+	beq	.L2506
 	ldrh	w0, [x20,4]
-	cbz	w0, .L2427
+	cbz	w0, .L2506
 	ldr	w0, [x29,92]
 	add	w23, w23, 1
 	str	w0, [x21,12]
@@ -15960,16 +16740,16 @@ FtlWriteDumpData:
 	bl	FlashProgPages
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-	b	.L2426
-.L2427:
+	b	.L2505
+.L2506:
 	add	x19, x19, :lo12:.LANCHOR2
 	mov	w0, 1
 	strb	w0, [x19,3618]
-	b	.L2420
-.L2422:
+	b	.L2499
+.L2501:
 	add	x19, x19, :lo12:.LANCHOR2
 	strb	wzr, [x19,3618]
-.L2420:
+.L2499:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -15987,23 +16767,23 @@ l2p_flush:
 	mov	w19, 0
 	adrp	x20, .LANCHOR2
 	bl	FtlWriteDumpData
-.L2438:
+.L2517:
 	add	x1, x20, :lo12:.LANCHOR2
 	ldrh	w0, [x1,858]
 	cmp	w0, w19
-	bls	.L2441
+	bls	.L2520
 	ldr	x1, [x1,1264]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0,4]
-	tbz	w0, #31, .L2439
+	tbz	w0, #31, .L2518
 	mov	w0, w19
 	bl	flush_l2p_region
-.L2439:
+.L2518:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2438
-.L2441:
+	b	.L2517
+.L2520:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -16016,64 +16796,62 @@ FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
-	mov	x19, x0
-	adrp	x0, .LANCHOR0+136
-	stp	x21, x22, [sp,32]
+	adrp	x20, .LANCHOR2
 	str	x23, [sp,48]
-	ldrb	w20, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w20, .L2456
-	ldrb	w20, [x19,8]
-	cmp	w20, 1
-	bne	.L2451
-	ldrh	w21, [x19,4]
-	b	.L2443
-.L2451:
-	mov	w20, 0
-.L2456:
-	mov	w21, 12
-.L2443:
-	adrp	x23, .LANCHOR2
-	mov	w22, -1
-.L2444:
-	sub	w21, w21, #1
-	cmn	w21, #1
-	beq	.L2446
+	add	x1, x20, :lo12:.LANCHOR2
+	stp	x21, x22, [sp,32]
+	ldr	w1, [x1,1400]
+	cbnz	w1, .L2521
+	adrp	x2, .LANCHOR0+136
+	ldrb	w21, [x2,#:lo12:.LANCHOR0+136]
+	cbz	w21, .L2535
+	ldrb	w21, [x0,8]
+	cmp	w21, 1
+	bne	.L2531
+	ldrh	w22, [x0,4]
+	b	.L2523
+.L2531:
+	mov	w21, w1
+.L2535:
+	mov	w22, 12
+.L2523:
+	mov	x19, x0
+	mov	w23, -1
+.L2524:
+	sub	w22, w22, #1
+	cmn	w22, #1
+	beq	.L2526
 	ldrh	w0, [x19,4]
-	cbnz	w0, .L2445
-.L2446:
-	adrp	x0, .LANCHOR2
-	ldrh	w1, [x19]
-	add	x0, x0, :lo12:.LANCHOR2
-	ldrh	w4, [x19,4]
-	lsl	x1, x1, 1
-	ldr	x3, [x0,1184]
-	ldrh	w2, [x3,x1]
-	sub	w2, w2, w4
-	strh	w2, [x3,x1]
+	cbnz	w0, .L2525
+.L2526:
+	add	x20, x20, :lo12:.LANCHOR2
+	ldrh	w0, [x19]
+	ldrh	w3, [x19,4]
+	lsl	x0, x0, 1
+	ldr	x2, [x20,1184]
+	ldrh	w1, [x2,x0]
+	sub	w1, w1, w3
+	strh	w1, [x2,x0]
 	strb	wzr, [x19,6]
-	ldrh	w0, [x0,818]
+	ldrh	w0, [x20,818]
 	strh	w0, [x19,2]
 	strh	wzr, [x19,4]
-	ldp	x21, x22, [sp,32]
-	ldp	x19, x20, [sp,16]
-	ldr	x23, [sp,48]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2445:
+	b	.L2521
+.L2525:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29,76]
 	cmn	w0, #1
-	beq	.L2446
-	add	x2, x23, :lo12:.LANCHOR2
-	str	w22, [x29,96]
+	beq	.L2526
+	add	x2, x20, :lo12:.LANCHOR2
+	str	w23, [x29,96]
 	mov	w3, 0
 	ldr	x1, [x2,1112]
 	ldr	x0, [x2,1048]
 	str	x0, [x29,80]
 	str	x1, [x29,88]
-	str	w22, [x1,8]
-	str	w22, [x1,12]
+	str	w23, [x1,8]
+	str	w23, [x1,12]
 	ldrh	w0, [x19]
 	strh	w0, [x1,2]
 	strh	wzr, [x1]
@@ -16085,11 +16863,17 @@ FtlSuperblockPowerLostFix:
 	csel	w0, w0, wzr, ne
 	str	w0, [x2,876]
 	add	x0, x29, 72
-	mov	w2, w20
+	mov	w2, w21
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L2444
+	b	.L2524
+.L2521:
+	ldp	x19, x20, [sp,16]
+	ldp	x21, x22, [sp,32]
+	ldr	x23, [sp,48]
+	ldp	x29, x30, [sp], 128
+	ret
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -16097,11 +16881,11 @@ FtlSuperblockPowerLostFix:
 FtlVpcCheckAndModify:
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR3
-	adrp	x0, .LC129
+	adrp	x0, .LC49
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x29, sp, 0
-	add	x1, x1, 16
-	add	x0, x0, :lo12:.LC129
+	add	x1, x1, 72
+	add	x0, x0, :lo12:.LC49
 	stp	x19, x20, [sp,16]
 	stp	x21, x22, [sp,32]
 	adrp	x19, .LANCHOR2
@@ -16115,18 +16899,18 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x0,1176]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2458:
+.L2537:
 	add	x19, x21, :lo12:.LANCHOR2
 	ldr	w0, [x19,1396]
 	cmp	w20, w0
-	bcs	.L2473
+	bcs	.L2552
 	mov	w0, w20
 	add	x1, x29, 76
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x29,76]
 	cmn	w0, #1
-	beq	.L2459
+	beq	.L2538
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	ubfiz	x0, x0, 1, 16
@@ -16134,39 +16918,39 @@ FtlVpcCheckAndModify:
 	ldrh	w1, [x2,x0]
 	add	w1, w1, 1
 	strh	w1, [x2,x0]
-.L2459:
+.L2538:
 	add	w20, w20, 1
-	b	.L2458
-.L2473:
-	adrp	x22, .LC130
+	b	.L2537
+.L2552:
+	adrp	x22, .LC150
 	mov	w20, 0
 	mov	w23, 65535
-	add	x22, x22, :lo12:.LC130
-.L2461:
+	add	x22, x22, :lo12:.LC150
+.L2540:
 	ldrh	w0, [x19,756]
 	cmp	w0, w20
-	bls	.L2474
+	bls	.L2553
 	ubfiz	x21, x20, 1, 16
 	ldr	x0, [x19,1184]
 	ldrh	w2, [x0,x21]
 	ldr	x0, [x19,1176]
 	ldrh	w3, [x0,x21]
 	cmp	w2, w3
-	beq	.L2464
+	beq	.L2543
 	cmp	w2, w23
-	beq	.L2464
+	beq	.L2543
 	mov	x0, x22
 	mov	w1, w20
 	bl	printk
 	ldrh	w0, [x19,3608]
 	cmp	w0, w20
-	beq	.L2464
+	beq	.L2543
 	ldrh	w0, [x19,3704]
 	cmp	w0, w20
-	beq	.L2464
+	beq	.L2543
 	ldrh	w0, [x19,3656]
 	cmp	w0, w20
-	beq	.L2464
+	beq	.L2543
 	ldr	x0, [x19,1176]
 	ldrh	w1, [x0,x21]
 	ldr	x0, [x19,1184]
@@ -16175,11 +16959,11 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2464:
+.L2543:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L2461
-.L2474:
+	b	.L2540
+.L2553:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -16198,89 +16982,89 @@ allocate_new_data_superblock:
 	stp	x21, x22, [sp,32]
 	ldr	w1, [x2,1400]
 	ldrh	w22, [x0]
-	cbnz	w1, .L2476
+	cbnz	w1, .L2555
 	mov	x21, x0
 	mov	w0, 65535
 	cmp	w22, w0
-	beq	.L2477
+	beq	.L2556
 	ubfiz	x1, x22, 1, 16
 	ldr	x0, [x2,1184]
 	ldrh	w0, [x0,x1]
-	cbz	w0, .L2478
+	cbz	w0, .L2557
 	mov	w0, w22
 	bl	INSERT_DATA_LIST
-	b	.L2477
-.L2478:
+	b	.L2556
+.L2557:
 	mov	w0, w22
 	bl	INSERT_FREE_LIST
-.L2477:
+.L2556:
 	add	x1, x19, :lo12:.LANCHOR2
 	strb	wzr, [x21,8]
 	add	x0, x1, 3656
 	cmp	x21, x0
-	beq	.L2479
+	beq	.L2558
 	ldrh	w2, [x1,768]
 	cmp	w2, 1
-	beq	.L2479
+	beq	.L2558
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L2480
-.L2479:
+	cbz	w0, .L2559
+.L2558:
 	mov	w0, 1
 	strb	w0, [x21,8]
-	b	.L2481
-.L2480:
+	b	.L2560
+.L2559:
 	add	x0, x1, 3608
 	cmp	x21, x0
-	bne	.L2481
+	bne	.L2560
 	cmp	w2, 3
-	beq	.L2483
+	beq	.L2562
 	ldr	w0, [x1,868]
 	cmp	w0, 1
-	bne	.L2484
-.L2483:
+	bne	.L2563
+.L2562:
 	add	x1, x19, :lo12:.LANCHOR2
 	mov	w0, 1
 	strb	w0, [x1,3616]
-.L2484:
+.L2563:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldr	w0, [x1,652]
-	cbz	w0, .L2481
+	cbz	w0, .L2560
 	ldr	w0, [x1,920]
 	cmp	w0, 29
-	bhi	.L2481
+	bhi	.L2560
 	mov	w0, 1
 	strb	w0, [x1,3616]
-.L2481:
+.L2560:
 	adrp	x1, .LANCHOR4
 	add	x0, x1, :lo12:.LANCHOR4
 	mov	x20, x1
-	ldrh	w2, [x0,160]
+	ldrh	w2, [x0,4000]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L2486
+	beq	.L2565
 	cmp	w22, w2
-	bne	.L2487
+	bne	.L2566
 	add	x19, x19, :lo12:.LANCHOR2
 	ubfiz	x1, x2, 1, 16
 	ldr	x0, [x19,1184]
 	ldrh	w0, [x0,x1]
-	cbz	w0, .L2488
-.L2487:
+	cbz	w0, .L2567
+.L2566:
 	mov	w0, w2
 	bl	update_vpc_list
-.L2488:
+.L2567:
 	add	x1, x20, :lo12:.LANCHOR4
 	mov	w0, -1
-	strh	w0, [x1,160]
-.L2486:
+	strh	w0, [x1,4000]
+.L2565:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2476:
+.L2555:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -16292,34 +17076,37 @@ allocate_new_data_superblock:
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR2
-	add	x0, x1, :lo12:.LANCHOR2
+	adrp	x1, .LANCHOR4
+	add	x2, x1, :lo12:.LANCHOR4
 	add	x29, sp, 0
-	add	x2, x0, 3968
+	add	x0, x2, 3456
 	stp	x19, x20, [sp,16]
-	str	x21, [sp,32]
-	ldr	w3, [x2,80]
-	cbz	w3, .L2502
-	ldr	w3, [x2,84]
-	ldr	w1, [x0,1396]
-	cmp	w3, w1
-	bcs	.L2503
-	mov	w20, 2048
-	mov	x19, x0
-.L2508:
-	ldr	w0, [x19,4052]
-	ldr	w1, [x19,1396]
+	stp	x21, x22, [sp,32]
+	adrp	x19, .LANCHOR2
+	ldr	w3, [x0,80]
+	cbz	w3, .L2581
+	add	x1, x19, :lo12:.LANCHOR2
+	ldr	w4, [x0,84]
+	ldr	w3, [x1,1396]
+	cmp	w4, w3
+	bcs	.L2582
+	mov	w21, 2048
+	mov	x20, x2
+.L2587:
+	add	x1, x19, :lo12:.LANCHOR2
+	ldr	w0, [x20,3540]
+	ldr	w1, [x1,1396]
 	cmp	w0, w1
-	bcs	.L2505
+	bcs	.L2584
 	add	x1, x29, 52
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x19,4052]
+	ldr	w0, [x20,3540]
 	ldr	w1, [x29,52]
 	add	w0, w0, 1
-	str	w0, [x19,4052]
+	str	w0, [x20,3540]
 	cmn	w1, #1
-	beq	.L2506
+	beq	.L2585
 	str	w1, [x29,60]
 	mov	w2, 0
 	str	w0, [x29,80]
@@ -16331,58 +17118,60 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29,56]
 	cmp	w0, 256
-	bne	.L2505
+	bne	.L2584
 	ldr	w0, [x29,52]
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L2505
-.L2506:
-	subs	w20, w20, #1
-	bne	.L2508
-.L2505:
+	b	.L2584
+.L2585:
+	subs	w21, w21, #1
+	bne	.L2587
+.L2584:
 	mov	w0, -1
-	b	.L2510
-.L2503:
-	ldr	w0, [x0,900]
-	str	wzr, [x2,80]
-	str	wzr, [x2,84]
-	str	w0, [x2,76]
-	b	.L2516
-.L2502:
+	b	.L2589
+.L2582:
+	ldr	w1, [x1,900]
+	str	wzr, [x0,80]
+	str	wzr, [x0,84]
+	str	w1, [x0,76]
+	b	.L2595
+.L2581:
+	add	x2, x19, :lo12:.LANCHOR2
+	ldr	w0, [x2,916]
+	ldr	w3, [x2,652]
 	adrp	x2, .LANCHOR0+136
-	ldr	w3, [x0,916]
-	ldr	w0, [x0,652]
 	ldrb	w4, [x2,#:lo12:.LANCHOR0+136]
 	mov	w2, 4194304
-	cbnz	w4, .L2511
-	add	w0, w0, w3, lsr 10
+	cbnz	w4, .L2590
+	add	w0, w3, w0, lsr 10
 	mov	w3, 33554432
 	asr	w2, w3, w0
-.L2511:
-	add	x4, x1, :lo12:.LANCHOR2
-	ldr	w3, [x4,900]
-	ldr	w0, [x4,4044]
-	add	w5, w3, 1048576
-	cmp	w0, w5
-	bhi	.L2512
+.L2590:
+	add	x19, x19, :lo12:.LANCHOR2
+	add	x0, x1, :lo12:.LANCHOR4
+	ldr	w3, [x19,900]
+	ldr	w0, [x0,3532]
+	add	w4, w3, 1048576
+	cmp	w0, w4
+	bhi	.L2591
 	add	w0, w2, w0
 	cmp	w0, w3
-	bcc	.L2512
-	ldrb	w2, [x4,3548]
+	bcc	.L2591
+	ldrb	w2, [x19,3548]
 	mov	w0, 0
-	cbnz	w2, .L2510
-.L2512:
-	add	x0, x1, :lo12:.LANCHOR2
+	cbnz	w2, .L2589
+.L2591:
+	add	x0, x1, :lo12:.LANCHOR4
 	mov	w1, 1
-	str	wzr, [x0,4052]
-	str	w1, [x0,4048]
-	str	w3, [x0,4044]
-.L2516:
+	str	wzr, [x0,3540]
+	str	w1, [x0,3536]
+	str	w3, [x0,3532]
+.L2595:
 	mov	w0, 0
-.L2510:
+.L2589:
 	ldp	x19, x20, [sp,16]
-	ldr	x21, [sp,32]
+	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 112
 	ret
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -16401,293 +17190,302 @@ ftl_do_gc:
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
 	ldr	w4, [x3,1400]
-	cbnz	w4, .L2662
+	cbnz	w4, .L2741
 	ldr	w4, [x3,924]
-	cbnz	w4, .L2662
+	cbnz	w4, .L2741
 	ldrh	w4, [x3,3584]
 	cmp	w4, 47
-	bls	.L2662
-	mov	w23, w0
+	bls	.L2741
+	str	w0, [x29,124]
 	adrp	x0, .LANCHOR1+3068
 	mov	w24, w1
 	ldrh	w1, [x0,#:lo12:.LANCHOR1+3068]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2519
-.L2522:
+	bne	.L2598
+.L2601:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w1, [x0,950]
 	cmp	w1, w2
-	bne	.L2520
-	b	.L2521
-.L2519:
+	bne	.L2599
+	b	.L2600
+.L2598:
 	ldrh	w1, [x3,3704]
 	cmp	w1, w0
-	beq	.L2522
+	beq	.L2601
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
 	mov	w2, 1
-	cbz	w0, .L2522
-	b	.L2662
-.L2520:
+	cbz	w0, .L2601
+	b	.L2741
+.L2599:
 	ldrh	w3, [x0,948]
 	cmp	w3, w2
-	bne	.L2521
+	bne	.L2600
 	strh	w1, [x0,948]
 	mov	w1, -1
 	strh	w1, [x0,950]
-.L2521:
+.L2600:
 	add	x1, x19, :lo12:.LANCHOR2
-	cmp	w23, 1
+	ldr	w2, [x29,124]
+	adrp	x22, .LANCHOR4
+	cmp	w2, 1
 	ldr	w0, [x1,940]
 	add	w0, w0, 1
-	add	w0, w0, w23, lsl 7
+	add	w0, w0, w2, lsl 7
 	str	w0, [x1,940]
-	bne	.L2533
+	bne	.L2612
 	ldr	w1, [x1,652]
-	cbnz	w1, .L2524
+	cbnz	w1, .L2603
 	adrp	x1, .LANCHOR0+136
 	ldrb	w1, [x1,#:lo12:.LANCHOR0+136]
-	cbz	w1, .L2533
-.L2524:
+	cbz	w1, .L2612
+.L2603:
 	add	x20, x19, :lo12:.LANCHOR2
 	ldr	w1, [x20,920]
 	cmp	w1, 29
-	bhi	.L2533
-	adrp	x21, .LANCHOR4
-	add	x1, x21, :lo12:.LANCHOR4
-	ldrh	w1, [x1,360]
+	bhi	.L2612
+	adrp	x21, .LANCHOR5
+	add	x1, x21, :lo12:.LANCHOR5
+	ldrh	w1, [x1,-152]
 	add	w0, w0, w1
 	str	w0, [x20,940]
 	bl	FtlGcReFreshBadBlk
-	ldrh	w0, [x20,3920]
+	add	x0, x22, :lo12:.LANCHOR4
 	mov	w1, 65535
+	ldrh	w0, [x0,3408]
 	cmp	w0, w1
-	bne	.L2533
+	bne	.L2612
 	ldrh	w1, [x20,948]
 	cmp	w1, w0
-	bne	.L2533
+	bne	.L2612
 	ldr	w0, [x20,940]
 	cmp	w0, 1024
-	bhi	.L2525
+	bhi	.L2604
 	ldrh	w0, [x20,3600]
 	cmp	w0, 63
-	bhi	.L2533
-.L2525:
+	bhi	.L2612
+.L2604:
 	add	x0, x19, :lo12:.LANCHOR2
-	add	x1, x21, :lo12:.LANCHOR4
+	add	x1, x21, :lo12:.LANCHOR5
 	ldrh	w2, [x0,954]
 	ldrh	w3, [x0,3600]
 	add	w2, w2, 64
-	strh	wzr, [x1,360]
+	strh	wzr, [x1,-152]
 	cmp	w3, w2
-	bgt	.L2533
+	bgt	.L2612
 	str	wzr, [x0,940]
 	ldr	w0, [x0,920]
-	cbnz	w0, .L2526
+	cbnz	w0, .L2605
 	mov	w0, 6
-	b	.L2684
-.L2526:
+	b	.L2763
+.L2605:
 	cmp	w0, 5
-	bhi	.L2527
+	bhi	.L2606
 	mov	w0, 18
-.L2684:
-	strh	w0, [x1,360]
-.L2527:
+.L2763:
+	strh	w0, [x1,-152]
+.L2606:
 	mov	w0, 32
 	mov	w27, 65535
 	bl	List_get_gc_head_node
 	uxth	w25, w0
 	cmp	w25, w27
-	beq	.L2532
-	add	x22, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x22,956]
-	cbz	w0, .L2529
-	ldrh	w1, [x22,820]
+	beq	.L2611
+	add	x23, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x23,956]
+	cbz	w0, .L2608
+	ldrh	w1, [x23,820]
 	ubfiz	x25, x25, 1, 16
-	ldrh	w3, [x22,748]
-	ldr	x26, [x22,1184]
+	ldrh	w3, [x23,748]
+	ldr	x26, [x23,1184]
 	mul	w1, w1, w3
 	ldrh	w2, [x26,x25]
 	add	w1, w1, 1
 	cmp	w2, w1
-	bgt	.L2532
+	bgt	.L2611
 	add	w1, w0, 1
-	str	wzr, [x22,928]
+	str	wzr, [x23,928]
 	uxth	w1, w1
-	strh	w1, [x22,956]
-	str	x1, [x29,120]
+	strh	w1, [x23,956]
+	str	x1, [x29,112]
 	bl	List_get_gc_head_node
 	uxth	w20, w0
 	cmp	w20, w27
-	ldr	x1, [x29,120]
-	beq	.L2532
+	ldr	x1, [x29,112]
+	beq	.L2611
 	ubfiz	x27, x20, 1, 16
-	adrp	x0, .LC131
+	adrp	x0, .LC151
 	ldrh	w4, [x26,x25]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC151
 	mov	w2, w20
 	ldrh	w3, [x26,x27]
 	bl	printk
-	ldrh	w0, [x22,956]
+	ldrh	w0, [x23,956]
 	cmp	w0, 40
-	bls	.L2530
-	ldr	x0, [x22,1184]
+	bls	.L2609
+	ldr	x0, [x23,1184]
 	ldrh	w0, [x0,x27]
 	cmp	w0, 32
-	bls	.L2530
-	strh	wzr, [x22,956]
-.L2530:
-	add	x21, x21, :lo12:.LANCHOR4
+	bls	.L2609
+	strh	wzr, [x23,956]
+.L2609:
+	add	x21, x21, :lo12:.LANCHOR5
 	mov	w0, 6
-	strh	w0, [x21,360]
-	b	.L2534
-.L2529:
+	strh	w0, [x21,-152]
+	b	.L2613
+.L2608:
 	mov	w0, 1
-	strh	w0, [x22,956]
-.L2532:
+	strh	w0, [x23,956]
+.L2611:
 	bl	GetSwlReplaceBlock
 	uxth	w20, w0
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L2534
-	add	x21, x21, :lo12:.LANCHOR4
-	strh	wzr, [x21,360]
-.L2533:
-	add	x22, x19, :lo12:.LANCHOR2
+	bne	.L2613
+	add	x21, x21, :lo12:.LANCHOR5
+	strh	wzr, [x21,-152]
+.L2612:
+	add	x0, x22, :lo12:.LANCHOR4
+	ldrh	w20, [x0,3408]
 	mov	w0, 65535
-	ldrh	w20, [x22,3920]
 	cmp	w20, w0
-	bne	.L2690
-	ldrh	w0, [x22,3704]
+	bne	.L2769
+	add	x23, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x23,3704]
 	cmp	w0, w20
-	beq	.L2691
-.L2534:
+	beq	.L2770
+.L2613:
 	mov	w0, 65535
 	cmp	w20, w0
 	cset	w1, eq
-	cbz	w1, .L2547
-	cbnz	w23, .L2547
+	cbz	w1, .L2626
+	ldr	w0, [x29,124]
+	cbnz	w0, .L2626
 	add	x0, x19, :lo12:.LANCHOR2
-	mov	w21, 1
+	mov	w23, 1
 	ldrh	w1, [x0,3600]
 	cmp	w1, 24
-	bhi	.L2548
+	bhi	.L2627
 	cmp	w1, 16
-	ldrh	w21, [x0,818]
-	bls	.L2549
-	lsr	w21, w21, 5
-	b	.L2548
-.L2549:
+	ldrh	w23, [x0,818]
+	bls	.L2628
+	lsr	w23, w23, 5
+	b	.L2627
+.L2628:
 	cmp	w1, 12
-	bls	.L2550
-	lsr	w21, w21, 4
-	b	.L2548
-.L2550:
-	lsr	w0, w21, 2
+	bls	.L2629
+	lsr	w23, w23, 4
+	b	.L2627
+.L2629:
+	lsr	w0, w23, 2
 	cmp	w1, 9
-	csel	w21, w0, w21, cs
-.L2548:
+	csel	w23, w0, w23, cs
+.L2627:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w2, [x0,952]
 	cmp	w2, w1
-	bcs	.L2552
+	bcs	.L2631
 	ldrh	w1, [x0,3704]
 	mov	w2, 65535
 	cmp	w1, w2
-	bne	.L2553
+	bne	.L2632
 	ldrh	w2, [x0,948]
 	cmp	w2, w1
-	bne	.L2553
-	adrp	x1, .LANCHOR4+360
-	ldrh	w2, [x1,#:lo12:.LANCHOR4+360]
-	cbnz	w2, .L2554
+	bne	.L2632
+	adrp	x1, .LANCHOR5-152
+	ldrh	w2, [x1,#:lo12:.LANCHOR5-152]
+	cbnz	w2, .L2633
 	ldr	w1, [x0,1396]
 	ldr	w3, [x0,3892]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
-	bcs	.L2555
-.L2554:
+	bcs	.L2634
+.L2633:
+	add	x22, x22, :lo12:.LANCHOR4
 	add	x1, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x1,3916]
+	ldrh	w0, [x22,3404]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x1,952]
-	b	.L2556
-.L2555:
+	b	.L2635
+.L2634:
 	mov	w1, 18
 	strh	w1, [x0,952]
-.L2556:
+.L2635:
 	add	x19, x19, :lo12:.LANCHOR2
 	str	wzr, [x19,928]
-	b	.L2662
-.L2553:
+	b	.L2741
+.L2632:
+	add	x0, x22, :lo12:.LANCHOR4
 	add	x1, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x1,3916]
+	ldrh	w0, [x0,3404]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x1,952]
-.L2552:
+.L2631:
 	cmp	w24, 2
-	bhi	.L2617
+	bhi	.L2696
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w0, [x0,652]
-	cbz	w0, .L2617
-	add	w21, w21, 1
-	uxth	w21, w21
-	b	.L2617
-.L2547:
+	cbz	w0, .L2696
+	add	w23, w23, 1
+	uxth	w23, w23
+	b	.L2696
+.L2626:
 	add	x21, x19, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x21,3704]
 	cmp	w0, w2
-	bne	.L2559
-	cbz	w1, .L2559
+	bne	.L2638
+	cbz	w1, .L2638
 	ldrh	w1, [x21,948]
 	cmp	w1, w0
-	bne	.L2559
-	ldrh	w1, [x21,3920]
-	cmp	w1, w0
-	beq	.L2560
-.L2565:
+	bne	.L2638
+	add	x1, x22, :lo12:.LANCHOR4
+	ldrh	w2, [x1,3408]
+	cmp	w2, w0
+	beq	.L2639
+.L2644:
 	mov	w20, 65535
-	b	.L2559
-.L2560:
+	b	.L2638
+.L2639:
 	ldrh	w24, [x21,3600]
-	adrp	x20, .LANCHOR4
+	adrp	x20, .LANCHOR5
 	ldrh	w0, [x21,952]
 	str	wzr, [x21,928]
 	cmp	w0, w24
-	bcs	.L2561
-	add	x0, x20, :lo12:.LANCHOR4
-	ldrh	w0, [x0,360]
-	cbnz	w0, .L2562
+	bcs	.L2640
+	add	x0, x20, :lo12:.LANCHOR5
+	ldrh	w0, [x0,-152]
+	cbnz	w0, .L2641
 	ldr	w0, [x21,1396]
 	ldr	w1, [x21,3892]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L2563
-.L2562:
+	bcs	.L2642
+.L2641:
+	add	x22, x22, :lo12:.LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x19,3916]
+	ldrh	w0, [x22,3404]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x19,952]
-	b	.L2564
-.L2563:
+	b	.L2643
+.L2642:
 	mov	w0, 18
 	strh	w0, [x21,952]
-.L2564:
-	add	x20, x20, :lo12:.LANCHOR4
+.L2643:
+	add	x20, x20, :lo12:.LANCHOR5
 	bl	FtlReadRefresh
-	ldrh	w2, [x20,360]
-	b	.L2662
-.L2561:
-	add	x22, x20, :lo12:.LANCHOR4
-	ldrh	w0, [x22,360]
-	cbnz	w0, .L2565
-	ldrh	w20, [x21,3916]
+	ldrh	w2, [x20,-152]
+	b	.L2741
+.L2640:
+	add	x23, x20, :lo12:.LANCHOR5
+	ldrh	w0, [x23,-152]
+	cbnz	w0, .L2644
+	ldrh	w20, [x1,3404]
 	add	w1, w20, w20, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x21,952]
@@ -16701,456 +17499,468 @@ ftl_do_gc:
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L2566
+	ble	.L2645
 	sub	w20, w20, #1
 	cmp	w24, w20
-	blt	.L2566
+	blt	.L2645
 	bl	FtlReadRefresh
-	b	.L2688
-.L2566:
-	cbnz	w1, .L2565
+	b	.L2767
+.L2645:
+	cbnz	w1, .L2644
 	mov	w0, -1
 	add	x19, x19, :lo12:.LANCHOR2
 	bl	decrement_vpc_count
 	ldrh	w2, [x19,3600]
 	add	w2, w2, 1
-	b	.L2662
-.L2559:
+	b	.L2741
+.L2638:
 	add	x0, x19, :lo12:.LANCHOR2
-	mov	w21, 2
+	mov	w23, 2
 	ldr	w0, [x0,652]
 	cmp	w0, wzr
-	csinc	w21, w21, wzr, ne
-	b	.L2558
-.L2617:
+	csinc	w23, w23, wzr, ne
+	b	.L2637
+.L2696:
 	mov	w20, 65535
-.L2558:
-	add	x0, x19, :lo12:.LANCHOR2
+.L2637:
+	add	x0, x22, :lo12:.LANCHOR4
 	mov	w2, 65535
-	ldrh	w1, [x0,3920]
+	ldrh	w1, [x0,3408]
 	cmp	w1, w2
-	bne	.L2568
+	bne	.L2647
 	cmp	w20, w1
-	beq	.L2569
-	strh	w20, [x0,3920]
-	b	.L2570
-.L2569:
-	ldrh	w1, [x0,948]
-	cmp	w1, w20
-	beq	.L2570
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x0,1184]
-	ldrh	w1, [x2,x1]
-	cbnz	w1, .L2571
-	mov	w1, -1
-	strh	w1, [x0,948]
-.L2571:
-	add	x0, x19, :lo12:.LANCHOR2
-	ldrh	w1, [x0,948]
-	strh	w1, [x0,3920]
-	mov	w1, -1
-	strh	w1, [x0,948]
-.L2570:
-	add	x22, x19, :lo12:.LANCHOR2
+	beq	.L2648
+	strh	w20, [x0,3408]
+	b	.L2649
+.L2648:
+	add	x1, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x1,948]
+	cmp	w0, w20
+	beq	.L2649
+	ubfiz	x0, x0, 1, 16
+	ldr	x2, [x1,1184]
+	ldrh	w0, [x2,x0]
+	cbnz	w0, .L2650
+	mov	w0, -1
+	strh	w0, [x1,948]
+.L2650:
+	add	x1, x19, :lo12:.LANCHOR2
+	add	x0, x22, :lo12:.LANCHOR4
+	ldrh	w2, [x1,948]
+	strh	w2, [x0,3408]
+	mov	w0, -1
+	strh	w0, [x1,948]
+.L2649:
+	add	x21, x22, :lo12:.LANCHOR4
 	mov	w1, 65535
-	ldrh	w0, [x22,3920]
-	strb	wzr, [x22,3928]
+	ldrh	w0, [x21,3408]
+	strb	wzr, [x21,3416]
 	cmp	w0, w1
-	beq	.L2568
+	beq	.L2647
 	bl	IsBlkInGcList
-	cbz	w0, .L2573
+	cbz	w0, .L2652
 	mov	w0, -1
-	strh	w0, [x22,3920]
-.L2573:
+	strh	w0, [x21,3408]
+.L2652:
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L2574
-	add	x0, x19, :lo12:.LANCHOR2
-	add	x22, x0, 3920
-	ldrh	w0, [x0,3920]
+	cbz	w0, .L2653
+	add	x0, x22, :lo12:.LANCHOR4
+	add	x21, x0, 3408
+	ldrh	w0, [x0,3408]
 	bl	ftl_get_blk_mode
-	strb	w0, [x22,8]
-.L2574:
-	add	x22, x19, :lo12:.LANCHOR2
+	strb	w0, [x21,8]
+.L2653:
+	add	x21, x22, :lo12:.LANCHOR4
 	mov	w0, 65535
-	add	x24, x22, 3920
-	ldrh	w1, [x22,3920]
+	add	x24, x21, 3408
+	ldrh	w1, [x21,3408]
 	cmp	w1, w0
-	beq	.L2568
+	beq	.L2647
 	mov	x0, x24
 	bl	make_superblock
-	strh	wzr, [x22,3922]
-	adrp	x0, .LANCHOR4
-	ldrh	w2, [x22,3920]
-	add	x0, x0, :lo12:.LANCHOR4
-	ldr	x1, [x22,1184]
-	strb	wzr, [x22,3926]
-	strh	wzr, [x0,362]
+	strh	wzr, [x21,3410]
+	adrp	x0, .LANCHOR5
+	add	x1, x19, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR5
+	ldrh	w2, [x21,3408]
+	strb	wzr, [x21,3414]
+	ldr	x1, [x1,1184]
+	strh	wzr, [x0,-150]
 	ldrh	w1, [x1,x2,lsl 1]
-	strh	w1, [x0,364]
-.L2568:
-	add	x3, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x3,3920]
-	ldrh	w1, [x3,3608]
-	cmp	w1, w0
-	beq	.L2575
-	ldrh	w1, [x3,3656]
+	strh	w1, [x0,-148]
+.L2647:
+	add	x21, x22, :lo12:.LANCHOR4
+	add	x1, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x21,3408]
+	ldrh	w2, [x1,3608]
+	cmp	w2, w0
+	beq	.L2654
+	ldrh	w1, [x1,3656]
 	cmp	w1, w0
-	beq	.L2575
-.L2576:
-	mov	x28, x3
-	mov	w24, 65535
-	b	.L2577
-.L2575:
-	add	x19, x19, :lo12:.LANCHOR2
+	bne	.L2656
+.L2655:
+.L2654:
+	add	x22, x22, :lo12:.LANCHOR4
 	mov	w0, -1
-	strh	w0, [x19,3920]
-	b	.L2689
-.L2598:
-	ldrh	w0, [x28,3922]
-	add	w21, w21, w0
-	uxth	w21, w21
-	strh	w21, [x28,3922]
-	cmp	w21, w25
-	bcs	.L2692
-.L2600:
-	ldrh	w0, [x28,3600]
+	strh	w0, [x22,3408]
+	b	.L2768
+.L2677:
+	ldrh	w0, [x21,3410]
+	add	w23, w23, w0
+	uxth	w23, w23
+	strh	w23, [x21,3410]
+	cmp	w23, w26
+	bcs	.L2771
+.L2679:
+	add	x1, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x1,3600]
 	cmp	w0, 2
-	bhi	.L2603
-	ldrh	w21, [x28,818]
-.L2577:
-	ldrh	w0, [x28,3920]
-	cmp	w0, w24
-	bne	.L2578
-	str	wzr, [x28,928]
-	adrp	x25, .LANCHOR4
-.L2579:
-	ldrh	w22, [x28,956]
-	mov	w0, w22
+	bhi	.L2682
+	ldrh	w23, [x1,818]
+.L2656:
+	ldrh	w0, [x21,3408]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L2657
+	add	x0, x19, :lo12:.LANCHOR2
+	str	wzr, [x0,928]
+.L2658:
+	add	x26, x19, :lo12:.LANCHOR2
+	ldrh	w24, [x26,956]
+	mov	w0, w24
 	bl	List_get_gc_head_node
-	uxth	w26, w0
-	cmp	w26, w24
-	strh	w26, [x28,3920]
-	bne	.L2580
-	strh	wzr, [x28,956]
+	uxth	w27, w0
+	mov	w0, 65535
+	strh	w27, [x21,3408]
+	cmp	w27, w0
+	bne	.L2659
+	strh	wzr, [x26,956]
 	mov	w2, 8
-	b	.L2662
-.L2580:
-	mov	w0, w26
-	add	w22, w22, 1
+	b	.L2741
+.L2659:
+	mov	w0, w27
+	add	w24, w24, 1
 	bl	IsBlkInGcList
-	cbz	w0, .L2581
-	strh	w22, [x28,956]
-	b	.L2579
-.L2581:
-	ldrh	w5, [x28,748]
-	ubfiz	x1, x26, 1, 16
-	ldrh	w0, [x28,818]
-	uxth	w22, w22
-	ldr	x2, [x28,1184]
-	mov	w3, 2
-	strh	w22, [x28,956]
-	mul	w0, w0, w5
-	ldrh	w4, [x2,x1]
-	sdiv	w5, w0, w3
-	cmp	w4, w5
-	bgt	.L2583
-	cmp	w4, 8
-	bls	.L2584
-	cmp	w22, 48
-	bls	.L2584
-	add	x4, x25, :lo12:.LANCHOR4
-	ldrh	w4, [x4,176]
-	cmp	w4, 35
-	bhi	.L2584
-.L2583:
-	strh	wzr, [x28,956]
-.L2584:
+	cbz	w0, .L2660
+	strh	w24, [x26,956]
+	b	.L2658
+.L2660:
+	ldrh	w4, [x26,748]
+	ubfiz	x1, x27, 1, 16
+	ldrh	w0, [x26,818]
+	uxth	w24, w24
+	ldr	x2, [x26,1184]
+	strh	w24, [x26,956]
+	mul	w0, w0, w4
+	mov	w4, 2
+	ldrh	w3, [x2,x1]
+	sdiv	w4, w0, w4
+	cmp	w3, w4
+	bgt	.L2662
+	cmp	w3, 8
+	bls	.L2663
+	cmp	w24, 48
+	bls	.L2663
+	ldrh	w3, [x21,4016]
+	cmp	w3, 35
+	bhi	.L2663
+.L2662:
+	add	x3, x19, :lo12:.LANCHOR2
+	strh	wzr, [x3,956]
+.L2663:
 	ldrh	w1, [x2,x1]
 	cmp	w1, w0
-	blt	.L2585
-	cmp	w20, w24
-	bne	.L2585
+	blt	.L2664
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L2664
+	add	x22, x22, :lo12:.LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR2
 	mov	w0, -1
 	strh	wzr, [x19,956]
-	strh	w0, [x19,3920]
-.L2689:
-	adrp	x0, .LANCHOR4+360
-	ldrh	w2, [x0,#:lo12:.LANCHOR4+360]
-	b	.L2662
-.L2585:
-	cbnz	w1, .L2586
+	strh	w0, [x22,3408]
+.L2768:
+	adrp	x0, .LANCHOR5-152
+	ldrh	w2, [x0,#:lo12:.LANCHOR5-152]
+	b	.L2741
+.L2664:
+	cbnz	w1, .L2665
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldrh	w0, [x28,956]
+	add	x1, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x1,956]
 	add	w0, w0, 1
-	strh	w0, [x28,956]
-	b	.L2579
-.L2586:
+	strh	w0, [x1,956]
+	b	.L2658
+.L2665:
 	adrp	x0, .LANCHOR0
-	strb	wzr, [x28,3928]
+	strb	wzr, [x21,3416]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2587
-	mov	w0, w26
+	cbz	w0, .L2666
+	mov	w0, w27
 	bl	ftl_get_blk_mode
-	strb	w0, [x28,3928]
-.L2587:
-	add	x22, x28, 3920
-	mov	x0, x22
+	strb	w0, [x21,3416]
+.L2666:
+	add	x24, x21, 3408
+	mov	x0, x24
 	bl	make_superblock
-	adrp	x1, .LANCHOR4
-	ldrh	w2, [x28,3920]
-	add	x1, x1, :lo12:.LANCHOR4
-	ldr	x0, [x28,1184]
-	strh	wzr, [x1,362]
+	adrp	x1, .LANCHOR5
+	add	x0, x19, :lo12:.LANCHOR2
+	add	x1, x1, :lo12:.LANCHOR5
+	ldrh	w2, [x21,3408]
+	ldr	x0, [x0,1184]
+	strh	wzr, [x1,-150]
 	ldrh	w0, [x0,x2,lsl 1]
-	strh	w0, [x1,364]
-	strh	wzr, [x28,3922]
-	strb	wzr, [x28,3926]
-.L2578:
-	cmp	w23, 1
-	bne	.L2588
-	bl	FtlReadRefresh
-.L2588:
-	mov	w0, 1
-	str	w0, [x28,924]
-	adrp	x0, .LANCHOR0
-	ldrh	w25, [x28,818]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldrb	w0, [x0,136]
-	cbz	w0, .L2589
-	ldrb	w0, [x28,3928]
+	strh	w0, [x1,-148]
+	strh	wzr, [x21,3410]
+	strb	wzr, [x21,3414]
+.L2657:
+	ldr	w0, [x29,124]
 	cmp	w0, 1
-	bne	.L2589
-	ldrh	w25, [x28,820]
-.L2589:
-	ldrh	w0, [x28,3922]
-	add	w1, w0, w21
-	cmp	w1, w25
-	ble	.L2590
-	sub	w21, w25, w0
-	uxth	w21, w21
-.L2590:
-	mov	w26, 0
-.L2591:
-	cmp	w21, w26, uxth
-	bls	.L2598
-	add	x1, x28, 3920
-	ldrh	w4, [x1,2]
+	bne	.L2667
+	bl	FtlReadRefresh
+.L2667:
+	add	x0, x19, :lo12:.LANCHOR2
+	mov	w1, 1
+	str	w1, [x0,924]
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
+	ldrh	w26, [x0,818]
+	ldrb	w1, [x1,136]
+	cbz	w1, .L2668
+	ldrb	w1, [x21,3416]
+	cmp	w1, 1
+	bne	.L2668
+	ldrh	w26, [x0,820]
+.L2668:
+	ldrh	w0, [x21,3410]
+	add	w1, w0, w23
+	cmp	w1, w26
+	ble	.L2669
+	sub	w23, w26, w0
+	uxth	w23, w23
+.L2669:
+	mov	w27, 0
+.L2670:
+	cmp	w23, w27, uxth
+	bls	.L2677
+	add	x1, x21, 3408
+	add	x0, x19, :lo12:.LANCHOR2
+	ldrh	w3, [x1,2]
+	ldrh	w6, [x0,748]
 	mov	x0, 0
-	ldrh	w6, [x28,748]
-	add	w4, w4, w26
-	mov	w22, w0
-.L2599:
+	add	w3, w3, w27
+	mov	w24, w0
+.L2678:
 	cmp	w6, w0, uxth
-	bls	.L2693
+	bls	.L2772
 	add	x2, x1, x0, lsl 1
+	mov	w4, 65535
 	ldrh	w2, [x2,16]
-	cmp	w2, w24
-	beq	.L2592
-	mov	w3, 56
-	ldr	x7, [x28,1024]
-	orr	w2, w4, w2, lsl 10
-	umull	x5, w22, w3
-	add	w22, w22, 1
-	add	x5, x7, x5
-	uxth	w22, w22
-	str	w2, [x5,4]
-.L2592:
+	cmp	w2, w4
+	beq	.L2671
+	add	x5, x19, :lo12:.LANCHOR2
+	mov	w4, 56
+	orr	w2, w3, w2, lsl 10
+	umull	x4, w24, w4
+	ldr	x5, [x5,1024]
+	add	w24, w24, 1
+	add	x4, x5, x4
+	uxth	w24, w24
+	str	w2, [x4,4]
+.L2671:
 	add	x0, x0, 1
-	b	.L2599
-.L2693:
-	ldr	x0, [x28,1024]
-	mov	w1, w22
-	ldrb	w2, [x28,3928]
-	mov	x27, 0
+	b	.L2678
+.L2772:
+	add	x25, x19, :lo12:.LANCHOR2
+	ldrb	w2, [x21,3416]
+	mov	w1, w24
+	mov	x28, 0
+	ldr	x0, [x25,1024]
 	bl	FlashReadPages
-.L2594:
-	cmp	w22, w27, uxth
-	bls	.L2694
+.L2673:
+	cmp	w24, w28, uxth
+	bls	.L2773
 	mov	x0, 56
-	mul	x5, x27, x0
-	ldr	x0, [x28,1024]
+	mul	x5, x28, x0
+	ldr	x0, [x25,1024]
 	add	x1, x0, x5
 	ldr	w0, [x0,x5]
 	cmn	w0, #1
 	ldr	x4, [x1,16]
-	beq	.L2619
+	beq	.L2698
 	ldrh	w0, [x4]
 	mov	w1, 61589
 	cmp	w0, w1
-	bne	.L2619
+	bne	.L2698
 	ldr	w0, [x4,8]
 	add	x1, x29, 140
 	mov	w2, 0
-	str	x5, [x29,112]
-	str	x4, [x29,120]
+	str	x5, [x29,104]
+	str	x4, [x29,112]
 	bl	log2phys
-	ldr	x6, [x28,1024]
-	ldr	x5, [x29,112]
+	ldr	x2, [x25,1024]
+	ldr	x5, [x29,104]
 	ldr	w0, [x29,140]
-	add	x6, x6, x5
-	ldr	x4, [x29,120]
+	add	x2, x2, x5
+	ldr	x4, [x29,112]
 	and	w0, w0, 2147483647
-	ldr	w1, [x6,4]
+	ldr	w1, [x2,4]
 	cmp	w0, w1
-	bne	.L2619
-	adrp	x0, .LANCHOR4
-	ldr	x1, [x28,1000]
-	add	x2, x0, :lo12:.LANCHOR4
-	str	x2, [x29,112]
+	bne	.L2698
+	adrp	x0, .LANCHOR5
+	mov	x3, 56
+	add	x1, x0, :lo12:.LANCHOR5
 	str	x5, [x29,96]
 	str	x4, [x29,104]
-	ldrh	w0, [x2,362]
+	ldrh	w0, [x1,-150]
 	add	w0, w0, 1
-	strh	w0, [x2,362]
-	ldr	w0, [x2,144]
-	mov	x2, 56
-	madd	x1, x0, x2, x1
-	ldr	w0, [x6,24]
-	str	x1, [x29,120]
+	strh	w0, [x1,-150]
+	ldr	w0, [x21,3984]
+	ldr	x1, [x25,1000]
+	madd	x1, x0, x3, x1
+	ldr	w0, [x2,24]
+	str	x1, [x29,112]
 	str	w0, [x1,24]
 	bl	Ftl_get_new_temp_ppa
-	ldr	x1, [x29,120]
-	mov	x3, 56
-	ldr	x2, [x29,112]
+	ldr	x1, [x29,112]
+	mov	x2, 56
 	ldr	x5, [x29,96]
-	str	w0, [x1,4]
-	ldr	w0, [x2,144]
-	ldr	x1, [x28,1000]
 	ldr	x4, [x29,104]
-	str	x2, [x29,120]
-	madd	x0, x0, x3, x1
-	ldr	x1, [x28,1024]
+	str	w0, [x1,4]
+	ldr	w0, [x21,3984]
+	ldr	x1, [x25,1000]
+	madd	x0, x0, x2, x1
+	ldr	x1, [x25,1024]
 	add	x1, x1, x5
-	ldr	x6, [x1,8]
-	str	x6, [x0,8]
-	add	x6, x28, 3704
-	str	x6, [x29,112]
+	ldr	x2, [x1,8]
+	str	x2, [x0,8]
+	add	x2, x25, 3704
+	str	x2, [x29,112]
 	ldr	x1, [x1,16]
 	str	x1, [x0,16]
 	mov	w1, 1
 	ldr	w0, [x29,140]
 	str	w0, [x4,12]
-	ldrh	w0, [x28,3704]
+	ldrh	w0, [x25,3704]
 	strh	w0, [x4,2]
-	ldr	w0, [x28,876]
+	ldr	w0, [x25,876]
 	str	w0, [x4,4]
-	ldr	w0, [x2,144]
+	ldr	w0, [x21,3984]
 	add	w0, w0, 1
-	str	w0, [x2,144]
-	ldr	x0, [x28,1024]
+	str	w0, [x21,3984]
+	ldr	x0, [x25,1024]
 	add	x0, x0, x5
 	bl	FtlGcBufAlloc
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbnz	w0, .L2596
-	ldr	x6, [x29,112]
-	ldr	x2, [x29,120]
-	ldrb	w0, [x6,7]
-	ldr	w1, [x2,144]
+	cbnz	w0, .L2675
+	ldr	x2, [x29,112]
+	ldr	w1, [x21,3984]
+	ldrb	w0, [x2,7]
 	cmp	w1, w0
-	beq	.L2596
-	ldrh	w0, [x6,4]
-	cbnz	w0, .L2619
-.L2596:
+	beq	.L2675
+	ldrh	w0, [x2,4]
+	cbnz	w0, .L2698
+.L2675:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2619
-	adrp	x0, .LANCHOR4
+	cbz	w0, .L2698
+	adrp	x0, .LANCHOR5
 	add	x19, x19, :lo12:.LANCHOR2
-	add	x0, x0, :lo12:.LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR5
 	str	wzr, [x19,924]
-	ldrh	w2, [x0,360]
-	b	.L2662
-.L2619:
-	add	x27, x27, 1
-	b	.L2594
-.L2694:
-	add	w26, w26, 1
-	b	.L2591
-.L2692:
-	adrp	x0, .LANCHOR4
-	add	x22, x0, :lo12:.LANCHOR4
-	mov	x21, x0
-	ldr	w1, [x22,144]
-	cbz	w1, .L2601
+	ldrh	w2, [x0,-152]
+	b	.L2741
+.L2698:
+	add	x28, x28, 1
+	b	.L2673
+.L2773:
+	add	w27, w27, 1
+	b	.L2670
+.L2771:
+	ldr	w0, [x21,3984]
+	adrp	x23, .LANCHOR5
+	cbz	w0, .L2680
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2601
-	str	wzr, [x28,924]
-.L2688:
-	ldrh	w2, [x22,360]
-	b	.L2662
-.L2601:
-	add	x0, x21, :lo12:.LANCHOR4
-	ldrh	w2, [x0,362]
-	cbnz	w2, .L2602
-	ldrh	w0, [x28,3920]
-	ldr	x1, [x28,1184]
+	cbz	w0, .L2680
+	add	x19, x19, :lo12:.LANCHOR2
+	add	x23, x23, :lo12:.LANCHOR5
+	str	wzr, [x19,924]
+.L2767:
+	ldrh	w2, [x23,-152]
+	b	.L2741
+.L2680:
+	add	x23, x23, :lo12:.LANCHOR5
+	ldrh	w2, [x23,-150]
+	cbnz	w2, .L2681
+	add	x1, x19, :lo12:.LANCHOR2
+	ldrh	w0, [x21,3408]
 	lsl	x0, x0, 1
-	ldrh	w4, [x1,x0]
-	cbz	w4, .L2602
+	ldr	x1, [x1,1184]
+	ldrh	w3, [x1,x0]
+	cbz	w3, .L2681
 	strh	w2, [x1,x0]
-	ldrh	w0, [x28,3920]
+	ldrh	w0, [x21,3408]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2602:
+.L2681:
 	mov	w0, -1
-	strh	w0, [x28,3920]
-	b	.L2600
-.L2603:
-	adrp	x1, .LANCHOR4+360
-	str	wzr, [x28,924]
-	ldrh	w2, [x1,#:lo12:.LANCHOR4+360]
+	strh	w0, [x21,3408]
+	b	.L2679
+.L2682:
+	str	wzr, [x1,924]
+	adrp	x1, .LANCHOR5-152
+	ldrh	w2, [x1,#:lo12:.LANCHOR5-152]
 	cmp	w2, wzr
 	csinc	w2, w2, w0, ne
-	b	.L2662
-.L2691:
-	ldrh	w25, [x22,948]
+	b	.L2741
+.L2770:
+	ldrh	w25, [x23,948]
 	cmp	w25, w20
-	bne	.L2534
-	ldrh	w0, [x22,3600]
+	bne	.L2613
+	ldrh	w0, [x23,3600]
 	mov	w2, 1024
-	ldr	w1, [x22,940]
+	ldr	w1, [x23,940]
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L2534
-	adrp	x0, .LANCHOR4+360
-	str	wzr, [x22,940]
-	strh	wzr, [x0,#:lo12:.LANCHOR4+360]
+	bls	.L2613
+	adrp	x0, .LANCHOR5-152
+	str	wzr, [x23,940]
+	strh	wzr, [x0,#:lo12:.LANCHOR5-152]
 	bl	GetSwlReplaceBlock
 	uxth	w20, w0
 	cmp	w20, w25
-	bne	.L2536
-	ldrh	w1, [x22,3600]
-	ldrh	w0, [x22,954]
+	bne	.L2615
+	ldrh	w1, [x23,3600]
+	ldrh	w0, [x23,954]
 	cmp	w1, w0
-	bcs	.L2537
+	bcs	.L2616
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	uxth	w0, w0
 	cmp	w0, w20
-	beq	.L2546
-	ldr	w2, [x22,864]
+	beq	.L2625
+	ldr	w2, [x23,864]
 	uxtw	x1, w0
-	cbnz	w2, .L2539
-	ldrh	w0, [x22,768]
+	cbnz	w2, .L2618
+	ldrh	w0, [x23,768]
 	cmp	w0, 3
-	beq	.L2539
-	ldr	w0, [x22,868]
-	cbnz	w0, .L2539
-	ldr	w0, [x22,652]
-	cbnz	w0, .L2539
+	beq	.L2618
+	ldr	w0, [x23,868]
+	cbnz	w0, .L2618
+	ldr	w0, [x23,652]
+	cbnz	w0, .L2618
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L2540
-.L2539:
+	cbz	w0, .L2619
+.L2618:
 	add	x2, x19, :lo12:.LANCHOR2
 	ldr	x0, [x2,1184]
 	ldrh	w4, [x0,x1,lsl 1]
@@ -17164,7 +17974,7 @@ ftl_do_gc:
 	csel	w0, w1, w0, eq
 	add	w0, w3, w0
 	cmp	w4, w0
-	bgt	.L2542
+	bgt	.L2621
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	uxth	w20, w0
@@ -17173,45 +17983,45 @@ ftl_do_gc:
 	ldr	w2, [x0,3892]
 	add	w1, w1, w1, lsl 1
 	cmp	w2, w1, lsr 2
-	bhi	.L2686
+	bhi	.L2765
 	mov	w1, 160
-	b	.L2685
-.L2542:
+	b	.L2764
+.L2621:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w1, 128
-	b	.L2687
-.L2540:
-	ldr	x2, [x22,1184]
+	b	.L2766
+.L2619:
+	ldr	x2, [x23,1184]
 	ldrh	w1, [x2,x1,lsl 1]
 	cmp	w1, 7
-	bhi	.L2545
+	bhi	.L2624
 	bl	List_get_gc_head_node
 	uxth	w20, w0
 	add	x0, x19, :lo12:.LANCHOR2
-.L2686:
+.L2765:
 	mov	w1, 128
-.L2685:
+.L2764:
 	strh	w1, [x0,954]
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L2546
-	b	.L2536
-.L2545:
+	beq	.L2625
+	b	.L2615
+.L2624:
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w1, 64
-.L2687:
+.L2766:
 	strh	w1, [x0,954]
-	b	.L2546
-.L2537:
+	b	.L2625
+.L2616:
 	mov	w0, 80
-	strh	w0, [x22,954]
-	b	.L2546
-.L2536:
+	strh	w0, [x23,954]
+	b	.L2625
+.L2615:
 	add	x5, x19, :lo12:.LANCHOR2
 	ubfiz	x4, x20, 1, 32
-	adrp	x0, .LC132
+	adrp	x0, .LC152
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC152
 	ldr	x3, [x5,1184]
 	ldr	x6, [x5,1168]
 	ldrh	w2, [x5,3600]
@@ -17219,13 +18029,13 @@ ftl_do_gc:
 	ldrh	w5, [x5,952]
 	ldrh	w4, [x6,x4]
 	bl	printk
-.L2546:
+.L2625:
 	bl	FtlGcReFreshBadBlk
-	b	.L2534
-.L2690:
+	b	.L2613
+.L2769:
 	mov	w20, w0
-	b	.L2534
-.L2662:
+	b	.L2613
+.L2741:
 	mov	w0, w2
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -17240,142 +18050,145 @@ ftl_do_gc:
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR4+368
+	adrp	x0, .LANCHOR5-144
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	adrp	x19, .LANCHOR2
-	ldr	x20, [x0,#:lo12:.LANCHOR4+368]
+	ldr	x20, [x0,#:lo12:.LANCHOR5-144]
 	add	x0, x19, :lo12:.LANCHOR2
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
 	ldr	w22, [x0,1400]
-	cbnz	w22, .L2697
+	cbnz	w22, .L2776
 	ldr	w1, [x0,968]
-	cbz	w1, .L2697
+	cbz	w1, .L2776
 	adrp	x0, .LANCHOR0+136
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
-	cbz	w0, .L2699
+	cbz	w0, .L2778
 	ldrb	w0, [x20,8]
 	cmp	w0, 1
 	cset	w22, eq
-.L2699:
+.L2778:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrb	w3, [x20,9]
-	adrp	x25, .LC133
+	adrp	x24, .LC153
 	mov	w2, w22
 	mov	w23, 0
-	mov	w26, 56
+	mov	w25, 56
 	ldr	x0, [x0,1032]
-	add	x25, x25, :lo12:.LC133
+	add	x24, x24, :lo12:.LC153
 	bl	FlashProgPages
-.L2700:
+.L2779:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w1, [x0,968]
 	cmp	w23, w1
-	bcs	.L2718
-	umull	x21, w23, w26
+	bcs	.L2797
+	umull	x21, w23, w25
 	ldr	x1, [x0,1032]
 	add	x0, x1, x21
-	ldr	w24, [x1,x21]
-	cmn	w24, #1
-	beq	.L2721
+	ldr	w1, [x1,x21]
+	cmn	w1, #1
+	beq	.L2800
 	ldr	w1, [x0,4]
-	cbz	w22, .L2735
+	cbz	w22, .L2814
 	orr	w1, w1, -2147483648
-.L2735:
+.L2814:
 	ldr	w0, [x0,24]
 	mov	w2, 1
 	str	w1, [x29,108]
-	add	x24, x19, :lo12:.LANCHOR2
+	add	x26, x19, :lo12:.LANCHOR2
 	add	x1, x29, 108
 	bl	log2phys
-	ldr	x0, [x24,1032]
+	ldr	x0, [x26,1032]
 	add	x21, x0, x21
 	ldr	x0, [x21,16]
 	ldr	w0, [x0,12]
 	cmn	w0, #1
-	beq	.L2704
+	beq	.L2783
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	uxth	w1, w0
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x24,1184]
+	ldr	x2, [x26,1184]
 	mov	w21, w1
 	ldrh	w2, [x2,x0]
-	cbnz	w2, .L2705
-	mov	x0, x25
+	cbnz	w2, .L2784
+	mov	x0, x24
 	bl	printk
-.L2705:
+.L2784:
 	mov	w0, w21
 	bl	decrement_vpc_count
-.L2704:
+.L2783:
 	add	w23, w23, 1
-	b	.L2700
-.L2737:
+	b	.L2779
+.L2816:
 	mov	w20, 16386
-.L2717:
+.L2796:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x0,958]
-	cbz	w0, .L2718
+	cbz	w0, .L2797
 	mov	w0, 1
 	mov	w1, w0
 	bl	ftl_do_gc
 	subs	w20, w20, #1
-	bne	.L2717
-.L2718:
+	bne	.L2796
+.L2797:
 	add	x19, x19, :lo12:.LANCHOR2
 	str	wzr, [x19,968]
-	b	.L2697
-.L2721:
-	adrp	x25, .LC133
-	mov	w23, 0
-	mov	w26, 56
-	mov	w27, 1
-	add	x25, x25, :lo12:.LC133
-.L2701:
+	b	.L2776
+.L2800:
+	adrp	x25, .LANCHOR4
+	adrp	x26, .LC153
+	mov	w24, 0
+	mov	w27, 56
+	add	x25, x25, :lo12:.LANCHOR4
+	add	x26, x26, :lo12:.LC153
+.L2780:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w1, [x0,968]
-	cmp	w23, w1
-	bcs	.L2737
-	umull	x21, w23, w26
+	cmp	w24, w1
+	bcs	.L2816
+	umull	x21, w24, w27
 	ldr	x0, [x0,1032]
-	str	w24, [x0,x21]
-.L2707:
-	add	x28, x19, :lo12:.LANCHOR2
-	ldr	x0, [x28,1032]
+	mov	w1, -1
+	mov	w28, 1
+	str	w1, [x0,x21]
+.L2786:
+	add	x23, x19, :lo12:.LANCHOR2
+	ldr	x0, [x23,1032]
 	add	x1, x0, x21
 	ldr	w0, [x0,x21]
 	cmn	w0, #1
 	ldr	w0, [x1,4]
-	bne	.L2738
+	bne	.L2817
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2708
-	ldr	x2, [x28,1184]
+	bne	.L2787
+	ldr	x2, [x23,1184]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20,4]
 	ldrh	w0, [x2,x1]
 	sub	w0, w0, w3
 	strh	w0, [x2,x1]
 	strb	wzr, [x20,6]
-	ldrh	w0, [x28,818]
+	ldrh	w0, [x23,818]
 	strh	w0, [x20,2]
 	strh	wzr, [x20,4]
-.L2708:
+.L2787:
 	ldrh	w0, [x20,4]
-	cbnz	w0, .L2709
+	cbnz	w0, .L2788
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2709:
-	add	x28, x19, :lo12:.LANCHOR2
-	ldr	w0, [x28,4064]
+.L2788:
+	add	x23, x19, :lo12:.LANCHOR2
+	ldr	w0, [x25,3552]
 	add	w0, w0, 1
-	str	w0, [x28,4064]
-	ldr	x0, [x28,1032]
+	str	w0, [x25,3552]
+	ldr	x0, [x23,1032]
 	add	x0, x0, x21
 	ldr	w0, [x0,4]
 	lsr	x0, x0, 10
@@ -17383,58 +18196,58 @@ FtlCacheWriteBack:
 	mov	x0, x20
 	bl	get_new_active_ppa
 	str	w0, [x29,108]
-	ldr	x1, [x28,1032]
+	ldr	x1, [x23,1032]
 	mov	w2, w22
 	add	x1, x1, x21
 	str	w0, [x1,4]
 	mov	w1, 1
-	ldr	x0, [x28,1032]
+	ldr	x0, [x23,1032]
 	ldrb	w3, [x20,9]
 	add	x0, x0, x21
 	bl	FlashProgPages
-	ldr	x0, [x28,1032]
+	ldr	x0, [x23,1032]
 	ldr	w0, [x0,x21]
 	cmn	w0, #1
-	bne	.L2710
-	str	w27, [x28,1400]
-.L2710:
+	bne	.L2789
+	str	w28, [x23,1400]
+.L2789:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	w0, [x0,1400]
-	cbz	w0, .L2707
-	b	.L2697
-.L2738:
-	cbz	w22, .L2736
+	cbz	w0, .L2786
+	b	.L2776
+.L2817:
+	cbz	w22, .L2815
 	orr	w0, w0, -2147483648
-.L2736:
+.L2815:
 	str	w0, [x29,108]
 	mov	w2, 1
 	ldr	w0, [x1,24]
-	add	x28, x19, :lo12:.LANCHOR2
+	add	x23, x19, :lo12:.LANCHOR2
 	add	x1, x29, 108
 	bl	log2phys
-	ldr	x0, [x28,1032]
+	ldr	x0, [x23,1032]
 	add	x21, x0, x21
 	ldr	x0, [x21,16]
 	ldr	w0, [x0,12]
 	cmn	w0, #1
-	beq	.L2714
+	beq	.L2793
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	uxth	w1, w0
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x28,1184]
+	ldr	x2, [x23,1184]
 	mov	w21, w1
 	ldrh	w2, [x2,x0]
-	cbnz	w2, .L2715
-	mov	x0, x25
+	cbnz	w2, .L2794
+	mov	x0, x26
 	bl	printk
-.L2715:
+.L2794:
 	mov	w0, w21
 	bl	decrement_vpc_count
-.L2714:
-	add	w23, w23, 1
-	b	.L2701
-.L2697:
+.L2793:
+	add	w24, w24, 1
+	b	.L2780
+.L2776:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -17452,13 +18265,13 @@ FtlSysFlush:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	w0, [x0,#:lo12:.LANCHOR2+1400]
-	cbnz	w0, .L2740
+	cbnz	w0, .L2819
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	mov	w0, 1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2740:
+.L2819:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -17472,9 +18285,9 @@ FtlDeInit:
 	add	x29, sp, 0
 	ldr	w0, [x0,#:lo12:.LANCHOR1+3064]
 	cmp	w0, 1
-	bne	.L2742
+	bne	.L2821
 	bl	FtlSysFlush
-.L2742:
+.L2821:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -17517,45 +18330,45 @@ ftl_discard:
 	ldr	w1, [x0,#:lo12:.LANCHOR0+4048]
 	mov	w0, -1
 	cmp	w2, w1
-	bhi	.L2746
+	bhi	.L2825
 	cmp	w19, 31
-	bls	.L2760
+	bls	.L2839
 	adrp	x22, .LANCHOR2
 	add	x21, x22, :lo12:.LANCHOR2
 	ldr	w0, [x21,1400]
-	cbnz	w0, .L2760
+	cbnz	w0, .L2839
 	bl	FtlCacheWriteBack
 	ldrh	w1, [x21,824]
 	udiv	w21, w20, w1
 	msub	w20, w1, w21, w20
 	uxth	w20, w20
-	cbz	w20, .L2749
+	cbz	w20, .L2828
 	sub	w1, w1, w20
 	add	w21, w21, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L2749:
+.L2828:
 	mov	w0, -1
-	adrp	x23, .LANCHOR4
+	adrp	x23, .LANCHOR5
 	str	w0, [x29,76]
-.L2750:
+.L2829:
 	add	x20, x22, :lo12:.LANCHOR2
 	ldrh	w0, [x20,824]
 	cmp	w19, w0
-	bcc	.L2761
+	bcc	.L2840
 	mov	w0, w21
 	add	x1, x29, 72
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x29,72]
 	cmn	w0, #1
-	beq	.L2751
-	add	x1, x23, :lo12:.LANCHOR4
+	beq	.L2830
+	add	x1, x23, :lo12:.LANCHOR5
 	mov	w2, 1
-	ldr	w0, [x1,376]
+	ldr	w0, [x1,-136]
 	add	w0, w0, 1
-	str	w0, [x1,376]
+	str	w0, [x1,-136]
 	ldr	w0, [x20,888]
 	add	x1, x29, 76
 	add	w0, w0, 1
@@ -17566,24 +18379,24 @@ ftl_discard:
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2751:
+.L2830:
 	add	x0, x22, :lo12:.LANCHOR2
 	add	w21, w21, 1
 	ldrh	w0, [x0,824]
 	sub	w19, w19, w0
-	b	.L2750
-.L2761:
-	adrp	x0, .LANCHOR4
-	add	x0, x0, :lo12:.LANCHOR4
-	ldr	w1, [x0,376]
+	b	.L2829
+.L2840:
+	adrp	x0, .LANCHOR5
+	add	x0, x0, :lo12:.LANCHOR5
+	ldr	w1, [x0,-136]
 	cmp	w1, 32
-	bls	.L2760
-	str	wzr, [x0,376]
+	bls	.L2839
+	str	wzr, [x0,-136]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2760:
+.L2839:
 	mov	w0, 0
-.L2746:
+.L2825:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -17604,95 +18417,94 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp,64]
 	ldr	w3, [x2,1400]
 	ldrh	w1, [x2,818]
-	cbnz	w3, .L2797
+	cbnz	w3, .L2876
 	ldrh	w20, [x2,3704]
 	mov	w4, 65535
 	cmp	w20, w4
-	bne	.L2765
-.L2774:
-	add	x20, x19, :lo12:.LANCHOR2
-	adrp	x21, .LANCHOR4
-	add	x22, x21, :lo12:.LANCHOR4
+	bne	.L2844
+.L2853:
+	add	x21, x19, :lo12:.LANCHOR2
+	adrp	x20, .LANCHOR4
+	add	x22, x20, :lo12:.LANCHOR4
 	mov	w0, 65535
-	add	x23, x20, 3704
-	ldrh	w1, [x20,3704]
-	str	wzr, [x22,168]
+	add	x23, x21, 3704
+	ldrh	w1, [x21,3704]
+	str	wzr, [x22,4008]
 	cmp	w1, w0
-	beq	.L2797
+	beq	.L2876
 	bl	FtlCacheWriteBack
 	mov	w26, 12
 	ldrb	w0, [x23,7]
-	ldrh	w3, [x20,818]
-	ldr	x1, [x20,1184]
-	ldrh	w2, [x20,3704]
+	ldrh	w3, [x21,818]
+	ldr	x1, [x21,1184]
+	ldrh	w2, [x21,3704]
 	mul	w0, w0, w3
 	strh	w0, [x1,x2,lsl 1]
-	ldrh	w1, [x22,178]
+	ldrh	w1, [x22,4018]
 	mov	w22, 0
-	ldr	w0, [x20,880]
+	ldr	w0, [x21,880]
 	add	w0, w1, w0
-	str	w0, [x20,880]
-	b	.L2775
-.L2765:
-	cbz	w0, .L2768
+	str	w0, [x21,880]
+	b	.L2854
+.L2844:
+	cbz	w0, .L2847
 	adrp	x0, .LANCHOR1
 	add	x0, x0, :lo12:.LANCHOR1
 	ldrh	w5, [x0,3068]
 	cmp	w5, w4
-	beq	.L2769
-.L2770:
+	beq	.L2848
+.L2849:
 	mov	w1, 2
-	b	.L2768
-.L2769:
+	b	.L2847
+.L2848:
 	strh	w3, [x0,3068]
 	ldrh	w0, [x2,3600]
 	cmp	w0, 17
-	bhi	.L2770
-.L2768:
+	bhi	.L2849
+.L2847:
 	add	x21, x19, :lo12:.LANCHOR2
 	add	x0, x21, 3704
 	bl	FtlGcScanTempBlk
 	str	w0, [x29,92]
 	cmn	w0, #1
-	beq	.L2771
+	beq	.L2850
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x21,1168]
 	ldrh	w0, [x1,x20]
 	cmp	w0, 4
-	bls	.L2772
+	bls	.L2851
 	sub	w0, w0, #5
 	strh	w0, [x1,x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2772:
+.L2851:
 	adrp	x0, .LANCHOR4
-	add	x1, x0, :lo12:.LANCHOR4
-	mov	x20, x0
-	ldr	w1, [x1,168]
-	cbnz	w1, .L2773
-	add	x19, x19, :lo12:.LANCHOR2
-	ldr	w0, [x19,4064]
+	add	x1, x0, :lo12:.LANCHOR4
+	mov	x19, x0
+	ldr	w2, [x1,4008]
+	cbnz	w2, .L2852
+	ldr	w0, [x1,3552]
 	add	w0, w0, 1
-	str	w0, [x19,4064]
+	str	w0, [x1,3552]
 	ldr	w0, [x29,92]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2773:
-	add	x0, x20, :lo12:.LANCHOR4
-	str	wzr, [x0,168]
+.L2852:
+	add	x0, x19, :lo12:.LANCHOR4
+	str	wzr, [x0,4008]
 	mov	w0, 1
-	b	.L2764
-.L2771:
+	b	.L2843
+.L2850:
 	adrp	x0, .LANCHOR1+3068
 	mov	w1, 65535
 	ldrh	w2, [x0,#:lo12:.LANCHOR1+3068]
 	mov	w0, 1
 	cmp	w2, w1
-	bne	.L2764
-	b	.L2774
-.L2778:
-	ldr	x25, [x20,984]
+	bne	.L2843
+	b	.L2853
+.L2857:
+	ldr	x25, [x21,984]
 	add	x1, x29, 92
 	umull	x24, w22, w26
 	mov	w2, 0
@@ -17702,7 +18514,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x29,92]
 	ldr	w1, [x25,x24]
 	cmp	w0, w1
-	bne	.L2776
+	bne	.L2855
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -17711,92 +18523,93 @@ FtlGcFreeTempBlock:
 	mov	w2, 1
 	bl	log2phys
 	mov	w0, w24
-.L2796:
+.L2875:
 	bl	decrement_vpc_count
-.L2777:
+.L2856:
 	add	w22, w22, 1
 	uxth	w22, w22
-.L2775:
-	add	x0, x21, :lo12:.LANCHOR4
-	ldrh	w0, [x0,178]
+.L2854:
+	add	x0, x20, :lo12:.LANCHOR4
+	ldrh	w0, [x0,4018]
 	cmp	w0, w22
-	bhi	.L2778
-	b	.L2798
-.L2776:
+	bhi	.L2857
+	b	.L2877
+.L2855:
 	ldr	w1, [x23,4]
 	cmp	w0, w1
-	beq	.L2777
-	ldrh	w0, [x20,3704]
-	b	.L2796
-.L2798:
+	beq	.L2856
+	ldrh	w0, [x21,3704]
+	b	.L2875
+.L2877:
 	mov	w0, -1
-	adrp	x20, .LANCHOR0
+	adrp	x21, .LANCHOR0
 	bl	decrement_vpc_count
-	add	x0, x20, :lo12:.LANCHOR0
+	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2779
+	cbz	w0, .L2858
 	add	x1, x19, :lo12:.LANCHOR2
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w1, [x1,3704]
 	bl	printk
-.L2779:
+.L2858:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x1,3704]
 	ldr	x1, [x1,1184]
 	ubfiz	x2, x0, 1, 16
 	ldrh	w1, [x1,x2]
-	cbz	w1, .L2780
+	cbz	w1, .L2859
 	bl	INSERT_DATA_LIST
-	b	.L2781
-.L2780:
+	b	.L2860
+.L2859:
 	bl	INSERT_FREE_LIST
-.L2781:
+.L2860:
 	add	x22, x19, :lo12:.LANCHOR2
-	add	x21, x21, :lo12:.LANCHOR4
+	add	x23, x20, :lo12:.LANCHOR4
 	mov	w0, -1
-	strh	wzr, [x21,178]
+	strh	wzr, [x23,4018]
 	strh	w0, [x22,3704]
-	strh	wzr, [x21,176]
+	strh	wzr, [x23,4016]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	ldr	w0, [x22,652]
-	cbz	w0, .L2782
+	cbz	w0, .L2861
 	ldr	w0, [x22,920]
 	cmp	w0, 29
-	bhi	.L2782
-	ldrh	w0, [x22,3916]
+	bhi	.L2861
+	ldrh	w0, [x23,3404]
 	ldrh	w1, [x22,3600]
 	cmp	w1, w0
-	bcs	.L2783
+	bcs	.L2862
 	lsl	w0, w0, 1
 	strh	w0, [x22,952]
-.L2783:
-	add	x19, x19, :lo12:.LANCHOR2
+.L2862:
+	add	x20, x20, :lo12:.LANCHOR4
 	mov	w0, -1
-	strh	w0, [x19,3920]
-.L2797:
+	strh	w0, [x20,3408]
+.L2876:
 	mov	w0, 0
-	b	.L2764
-.L2782:
+	b	.L2843
+.L2861:
+	add	x20, x20, :lo12:.LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR2
-	ldrh	w1, [x19,3916]
+	ldrh	w1, [x20,3404]
 	ldrh	w0, [x19,3600]
 	add	w2, w1, w1, lsl 1
 	cmp	w0, w2, lsr 2
-	ble	.L2797
-	add	x20, x20, :lo12:.LANCHOR0
+	ble	.L2876
+	add	x21, x21, :lo12:.LANCHOR0
 	mov	w0, -1
-	strh	w0, [x19,3920]
-	ldrb	w0, [x20,136]
-	cbz	w0, .L2784
+	strh	w0, [x20,3408]
+	ldrb	w0, [x21,136]
+	cbz	w0, .L2863
 	sub	w1, w1, #2
 	strh	w1, [x19,952]
-	b	.L2797
-.L2784:
+	b	.L2876
+.L2863:
 	mov	w1, 20
 	strh	w1, [x19,952]
-.L2764:
+.L2843:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -17820,14 +18633,14 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19,3706]
 	ldrh	w0, [x19,818]
 	cmp	w1, w0
-	bcc	.L2799
+	bcc	.L2878
 	add	x0, x19, 3752
 	bl	FtlMapBlkWriteDumpData
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR4+168
-	str	wzr, [x0,#:lo12:.LANCHOR4+168]
-.L2799:
+	adrp	x0, .LANCHOR4+4008
+	str	wzr, [x0,#:lo12:.LANCHOR4+4008]
+.L2878:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17837,11 +18650,11 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR4+224
+	adrp	x0, .LANCHOR4+4064
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	adrp	x19, .LANCHOR2
-	str	wzr, [x0,#:lo12:.LANCHOR4+224]
+	str	wzr, [x0,#:lo12:.LANCHOR4+4064]
 	add	x19, x19, :lo12:.LANCHOR2
 	add	x20, x19, 3608
 	add	x19, x19, 3656
@@ -17875,22 +18688,22 @@ FtlSysBlkInit:
 	add	x0, x19, :lo12:.LANCHOR4
 	add	x21, x20, :lo12:.LANCHOR2
 	str	x23, [sp,48]
-	strh	w1, [x0,218]
-	strh	wzr, [x0,220]
+	strh	w1, [x0,4058]
+	strh	wzr, [x0,4060]
 	ldrh	w0, [x21,752]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	ldrh	w1, [x21,3896]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2803
-.L2805:
+	bne	.L2882
+.L2884:
 	mov	w23, -1
-	b	.L2804
-.L2803:
+	b	.L2883
+.L2882:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L2805
+	cbnz	w0, .L2884
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17903,25 +18716,25 @@ FtlSysBlkInit:
 	ldrh	w2, [x21,858]
 	mov	x1, 0
 	ldr	x0, [x21,1264]
-.L2806:
+.L2885:
 	cmp	w1, w2
 	mov	w3, w1
-	bge	.L2810
+	bge	.L2889
 	add	x4, x0, x1, lsl 4
 	add	x1, x1, 1
 	ldr	w4, [x4,4]
-	tbz	w4, #31, .L2806
-.L2810:
+	tbz	w4, #31, .L2885
+.L2889:
 	add	x0, x20, :lo12:.LANCHOR2
 	cmp	w3, w2
 	ldrh	w1, [x0,3548]
 	add	w1, w1, 1
 	strh	w1, [x0,3548]
-	blt	.L2807
+	blt	.L2886
 	add	x19, x19, :lo12:.LANCHOR4
-	ldrh	w0, [x19,220]
-	cbz	w0, .L2811
-.L2807:
+	ldrh	w0, [x19,4060]
+	cbz	w0, .L2890
+.L2886:
 	add	x19, x20, :lo12:.LANCHOR2
 	add	x22, x19, 3608
 	add	x21, x19, 3656
@@ -17961,18 +18774,18 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-.L2811:
+.L2890:
 	add	x19, x20, :lo12:.LANCHOR2
 	mov	w0, 65535
 	add	x22, x19, 3608
 	ldrh	w1, [x19,3608]
 	cmp	w1, w0
-	beq	.L2812
+	beq	.L2891
 	ldrh	w0, [x19,3612]
-	cbnz	w0, .L2812
+	cbnz	w0, .L2891
 	ldrh	w0, [x19,3660]
 	add	x21, x19, 3656
-	cbnz	w0, .L2812
+	cbnz	w0, .L2891
 	bl	FtlVpcTblFlush
 	ldrh	w0, [x19,3608]
 	bl	FtlGcRefreshOpenBlock
@@ -17984,13 +18797,13 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	add	x0, x19, 3824
 	bl	FtlMapBlkWriteDumpData
-.L2812:
+.L2891:
 	add	x20, x20, :lo12:.LANCHOR2
 	ldrh	w0, [x20,3548]
 	and	w0, w0, 31
-	cbnz	w0, .L2804
+	cbnz	w0, .L2883
 	bl	FtlVpcCheckAndModify
-.L2804:
+.L2883:
 	mov	w0, w23
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -18002,14 +18815,15 @@ FtlSysBlkInit:
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	adrp	x19, .LANCHOR2
+	str	x23, [sp,48]
 	add	x20, x19, :lo12:.LANCHOR2
 	stp	x21, x22, [sp,32]
 	ldr	w21, [x20,1400]
-	cbnz	w21, .L2820
+	cbnz	w21, .L2899
 	ldrh	w2, [x20,856]
 	mov	w1, w21
 	ldr	x0, [x20,1248]
@@ -18025,15 +18839,15 @@ FtlLowFormat:
 	str	w21, [x20,876]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2821
+	cbz	w0, .L2900
 	bl	FtlMakeBbt
-.L2821:
+.L2900:
 	mov	w0, 0
-.L2822:
+.L2901:
 	add	x1, x19, :lo12:.LANCHOR2
 	ldrh	w2, [x1,824]
 	cmp	w0, w2, lsl 7
-	bge	.L2849
+	bge	.L2928
 	ubfiz	x3, x0, 2, 16
 	ldr	x4, [x1,1088]
 	mvn	w2, w0
@@ -18045,15 +18859,15 @@ FtlLowFormat:
 	movk	w1, 0xa0f, lsl 16
 	uxth	w0, w0
 	str	w1, [x2,x3]
-	b	.L2822
-.L2849:
+	b	.L2901
+.L2928:
 	ldrh	w21, [x1,756]
 	mov	w20, 0
-.L2824:
+.L2903:
 	add	x22, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x22,758]
 	cmp	w0, w21
-	bls	.L2850
+	bls	.L2929
 	mov	w0, w21
 	mov	w1, 1
 	add	w21, w21, 1
@@ -18061,17 +18875,17 @@ FtlLowFormat:
 	add	w0, w20, w0
 	uxth	w21, w21
 	uxth	w20, w0
-	b	.L2824
-.L2850:
+	b	.L2903
+.L2929:
 	ldrh	w0, [x22,748]
 	sub	w1, w20, #3
 	cmp	w1, w0, lsl 1
-	bge	.L2826
-.L2830:
+	bge	.L2905
+.L2909:
 	mov	w20, 0
 	mov	w21, w20
-	b	.L2827
-.L2826:
+	b	.L2906
+.L2905:
 	udiv	w20, w20, w0
 	ldr	w0, [x22,852]
 	add	w0, w20, w0
@@ -18079,22 +18893,22 @@ FtlLowFormat:
 	ldrh	w0, [x22,752]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w20, [x22,756]
-.L2828:
+.L2907:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x0,758]
 	cmp	w0, w20
-	bls	.L2830
+	bls	.L2909
 	mov	w0, w20
 	mov	w1, 1
 	add	w20, w20, 1
 	bl	FtlLowFormatEraseBlock
 	uxth	w20, w20
-	b	.L2828
-.L2827:
-	add	x2, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x2,756]
-	cmp	w0, w21
-	bls	.L2851
+	b	.L2907
+.L2906:
+	add	x0, x19, :lo12:.LANCHOR2
+	ldrh	w1, [x0,756]
+	cmp	w1, w21
+	bls	.L2930
 	mov	w0, w21
 	mov	w1, 0
 	add	w21, w21, 1
@@ -18102,114 +18916,119 @@ FtlLowFormat:
 	add	w0, w20, w0
 	uxth	w21, w21
 	uxth	w20, w0
-	b	.L2827
-.L2851:
-	ldrh	w3, [x2,748]
-	ldr	w1, [x2,760]
-	ldrh	w0, [x2,758]
-	str	w0, [x2,944]
-	udiv	w4, w1, w3
-	str	w4, [x2,1396]
-	ubfx	x5, x4, 5, 16
-	add	w0, w5, 36
-	strh	w0, [x2,3916]
-	mov	w0, 24
-	mul	w0, w3, w0
-	cmp	w20, w0
-	ble	.L2832
+	b	.L2906
+.L2930:
+	ldrh	w1, [x0,758]
+	adrp	x21, .LANCHOR4
+	ldrh	w2, [x0,748]
+	add	x6, x21, :lo12:.LANCHOR4
+	str	w1, [x0,944]
+	ldr	w1, [x0,760]
+	udiv	w3, w1, w2
+	str	w3, [x0,1396]
+	ubfx	x5, x3, 5, 16
+	add	w4, w5, 36
+	strh	w4, [x6,3404]
+	mov	w4, 24
+	mul	w4, w2, w4
+	cmp	w20, w4
+	ble	.L2911
 	sub	w1, w1, w20
-	udiv	w1, w1, w3
-	str	w1, [x2,1396]
+	udiv	w1, w1, w2
+	str	w1, [x0,1396]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2,3916]
-.L2832:
-	add	x2, x19, :lo12:.LANCHOR2
-	ldr	w0, [x2,652]
+	strh	w1, [x6,3404]
+.L2911:
+	add	x0, x19, :lo12:.LANCHOR2
+	ldr	w0, [x0,652]
 	cmp	w0, 1
-	bne	.L2833
-	ldrh	w1, [x2,3916]
-	udiv	w0, w20, w3
-	add	w0, w1, w0
-	add	w0, w1, w0, asr 2
-	strh	w0, [x2,3916]
-.L2833:
-	adrp	x21, .LANCHOR0
-	add	x0, x21, :lo12:.LANCHOR0
+	bne	.L2912
+	add	x1, x21, :lo12:.LANCHOR4
+	udiv	w0, w20, w2
+	ldrh	w4, [x1,3404]
+	add	w0, w4, w0
+	add	w0, w4, w0, asr 2
+	strh	w0, [x1,3404]
+.L2912:
+	adrp	x22, .LANCHOR0
+	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2834
-	add	x1, x19, :lo12:.LANCHOR2
-	udiv	w0, w20, w3
-	ldrh	w2, [x1,3916]
-	add	w0, w2, w0
-	add	w0, w2, w0, asr 2
-	strh	w0, [x1,3916]
-.L2834:
-	add	x0, x19, :lo12:.LANCHOR2
-	ldrh	w1, [x0,810]
-	cbz	w1, .L2836
-	ldrh	w2, [x0,3916]
-	add	w2, w2, w1, lsr 1
-	strh	w2, [x0,3916]
-	mul	w2, w1, w3
-	cmp	w2, w20
-	ble	.L2836
+	cbz	w0, .L2913
+	add	x1, x21, :lo12:.LANCHOR4
+	udiv	w0, w20, w2
+	ldrh	w4, [x1,3404]
+	add	w0, w4, w0
+	add	w0, w4, w0, asr 2
+	strh	w0, [x1,3404]
+.L2913:
+	add	x6, x19, :lo12:.LANCHOR2
+	ldrh	w1, [x6,810]
+	cbz	w1, .L2915
+	add	x0, x21, :lo12:.LANCHOR4
+	ldrh	w4, [x0,3404]
+	add	w4, w4, w1, lsr 1
+	strh	w4, [x0,3404]
+	mul	w4, w1, w2
+	cmp	w4, w20
+	ble	.L2915
 	add	w1, w1, 32
-	str	w4, [x0,1396]
+	str	w3, [x6,1396]
 	add	w1, w5, w1
-	strh	w1, [x0,3916]
-.L2836:
+	strh	w1, [x0,3404]
+.L2915:
 	add	x19, x19, :lo12:.LANCHOR2
-	add	x21, x21, :lo12:.LANCHOR0
-	add	x20, x19, 3608
-	mov	w22, -1
+	add	x20, x21, :lo12:.LANCHOR4
+	add	x22, x22, :lo12:.LANCHOR0
+	mov	w23, -1
+	ldrh	w0, [x20,3404]
 	ldr	w1, [x19,1396]
-	ldrh	w0, [x19,3916]
 	sub	w0, w1, w0
 	ldrh	w1, [x19,818]
-	mul	w0, w0, w3
-	str	w0, [x19,3912]
+	mul	w0, w0, w2
+	str	w0, [x20,3400]
 	mul	w0, w0, w1
 	ldrh	w1, [x19,824]
 	str	w0, [x19,1396]
 	mul	w0, w0, w1
-	str	w0, [x21,4048]
+	str	w0, [x22,4048]
 	bl	FtlBbmTblFlush
 	ldrh	w2, [x19,758]
 	mov	w1, 0
 	ldr	x0, [x19,1184]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	str	wzr, [x19,3892]
+	strh	w23, [x20,3408]
+	strh	wzr, [x20,3410]
 	mov	w0, 1
+	strb	wzr, [x20,3414]
+	mov	w1, 255
+	strb	wzr, [x20,3416]
+	add	x20, x19, 3608
 	ldrh	w2, [x19,756]
 	strb	w0, [x20,8]
-	mov	w1, 255
-	ldr	x0, [x21,16]
+	ldr	x0, [x22,16]
 	lsr	w2, w2, 3
-	strh	w22, [x19,3920]
-	strh	wzr, [x19,3922]
-	strb	wzr, [x19,3926]
-	strb	wzr, [x19,3928]
+	str	wzr, [x19,3892]
 	strh	wzr, [x20,2]
 	strb	wzr, [x20,6]
 	strh	wzr, [x19,3608]
 	bl	ftl_memset
-.L2838:
+.L2917:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20,7]
-	cbnz	w0, .L2839
+	cbnz	w0, .L2918
 	ldrh	w1, [x20]
 	ldr	x0, [x19,1184]
-	strh	w22, [x0,x1,lsl 1]
+	strh	w23, [x0,x1,lsl 1]
 	ldrh	w0, [x20]
 	add	w0, w0, 1
 	strh	w0, [x20]
-	b	.L2838
-.L2839:
+	b	.L2917
+.L2918:
 	ldr	w0, [x19,872]
-	mov	w21, -1
+	mov	w22, -1
 	str	w0, [x20,12]
 	add	w0, w0, 1
 	ldrh	w1, [x20]
@@ -18226,20 +19045,21 @@ FtlLowFormat:
 	strh	w1, [x19,3656]
 	mov	w1, 1
 	strb	w1, [x19,3664]
-.L2840:
+.L2919:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20,7]
-	cbnz	w0, .L2841
+	cbnz	w0, .L2920
 	ldrh	w1, [x20]
 	ldr	x0, [x19,1184]
-	strh	w21, [x0,x1,lsl 1]
+	strh	w22, [x0,x1,lsl 1]
 	ldrh	w0, [x20]
 	add	w0, w0, 1
 	strh	w0, [x20]
-	b	.L2840
-.L2841:
+	b	.L2919
+.L2920:
 	ldr	w0, [x19,872]
+	add	x21, x21, :lo12:.LANCHOR4
 	str	w0, [x20,12]
 	add	w0, w0, 1
 	ldrh	w1, [x20]
@@ -18251,7 +19071,7 @@ FtlLowFormat:
 	strh	w20, [x19,3704]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x19,3896]
-	ldr	w0, [x19,3912]
+	ldr	w0, [x21,3400]
 	strh	w0, [x19,3902]
 	ldr	w0, [x19,872]
 	str	w0, [x19,3904]
@@ -18261,15 +19081,16 @@ FtlLowFormat:
 	str	w0, [x19,872]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2820
+	cbnz	w0, .L2899
 	adrp	x0, .LANCHOR1+3064
 	mov	w1, 1
 	str	w1, [x0,#:lo12:.LANCHOR1+3064]
-.L2820:
+.L2899:
 	mov	w0, 0
+	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
-	ldp	x29, x30, [sp], 48
+	ldp	x29, x30, [sp], 64
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
 	.align	2
@@ -18282,24 +19103,24 @@ FtlReInitForSDUpdata:
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,136]
-	cbz	w0, .L2853
-.L2855:
+	cbz	w0, .L2932
+.L2934:
 	mov	w0, 0
-	b	.L2854
-.L2853:
+	b	.L2933
+.L2932:
 	adrp	x0, RK29_NANDC_REG_BASE
 	ldr	x0, [x0,#:lo12:RK29_NANDC_REG_BASE]
 	bl	FlashInit
-	cbnz	w0, .L2855
+	cbnz	w0, .L2934
 	bl	FlashLoadFactorBbt
-	cbz	w0, .L2856
+	cbz	w0, .L2935
 	bl	FlashMakeFactorBbt
-.L2856:
+.L2935:
 	adrp	x20, .LANCHOR2
 	add	x0, x20, :lo12:.LANCHOR2
 	ldr	x0, [x0,688]
 	bl	FlashReadIdbDataRaw
-	cbz	w0, .L2857
+	cbz	w0, .L2936
 	mov	w1, 0
 	mov	w2, 16
 	add	x0, x29, 32
@@ -18308,43 +19129,43 @@ FtlReInitForSDUpdata:
 	ldr	w2, [x29,32]
 	mov	w1, w0
 	mov	w4, 1
-.L2859:
+.L2938:
 	lsl	w3, w4, w1
 	add	w1, w1, 1
 	tst	w3, w2
 	cset	w3, ne
 	cmp	w1, 16
 	add	w0, w0, w3
-	bne	.L2859
+	bne	.L2938
 	cmp	w0, 6
-	bhi	.L2860
+	bhi	.L2939
 	add	x0, x19, :lo12:.LANCHOR0
-	b	.L2882
-.L2860:
+	b	.L2961
+.L2939:
 	mov	w1, 0
 	mov	w4, 1
-.L2863:
+.L2942:
 	lsl	w3, w4, w1
 	add	w1, w1, 1
 	tst	w3, w2
 	cset	w3, ne
 	cmp	w1, 24
 	add	w0, w0, w3
-	bne	.L2863
+	bne	.L2942
 	cmp	w0, 17
 	add	x0, x19, :lo12:.LANCHOR0
-	bls	.L2882
+	bls	.L2961
 	mov	w1, 36
-.L2882:
+.L2961:
 	strb	w1, [x0,25]
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x0,25]
 	strh	w1, [x0,4042]
-.L2857:
-	adrp	x0, .LC45
-	adrp	x1, .LC119
-	add	x1, x1, :lo12:.LC119
-	add	x0, x0, :lo12:.LC45
+.L2936:
+	adrp	x0, .LC47
+	adrp	x1, .LC140
+	add	x1, x1, :lo12:.LC140
+	add	x0, x0, :lo12:.LC47
 	add	x20, x20, :lo12:.LANCHOR2
 	bl	printk
 	add	x0, x19, :lo12:.LANCHOR0
@@ -18354,25 +19175,25 @@ FtlReInitForSDUpdata:
 	bl	FtlVariablesInit
 	ldrh	w0, [x20,752]
 	bl	FtlFreeSysBlkQueueInit
-.L2865:
+.L2944:
 	bl	FtlLoadBbt
-	cbz	w0, .L2866
-.L2884:
+	cbz	w0, .L2945
+.L2963:
 	bl	FtlLowFormat
 	cmp	w19, 3
-	bhi	.L2885
+	bhi	.L2964
 	add	w19, w19, 1
-	b	.L2865
-.L2885:
+	b	.L2944
+.L2964:
 	mov	w0, -1
-	b	.L2854
-.L2866:
+	b	.L2933
+.L2945:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2884
+	cbnz	w0, .L2963
 	adrp	x1, .LANCHOR1+3064
 	mov	w2, 1
 	str	w2, [x1,#:lo12:.LANCHOR1+3064]
-.L2854:
+.L2933:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -18381,83 +19202,86 @@ FtlReInitForSDUpdata:
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-	adrp	x0, .LANCHOR0+136
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	ldrb	w0, [x0,#:lo12:.LANCHOR0+136]
 	stp	x19, x20, [sp,16]
-	stp	x21, x22, [sp,32]
-	str	x23, [sp,48]
-	adrp	x21, .LANCHOR4
 	adrp	x19, .LANCHOR2
-	cbz	w0, .L2887
-	add	x0, x21, :lo12:.LANCHOR4
-	ldr	w0, [x0,144]
-	tbz	x0, 0, .L2887
+	str	x23, [sp,48]
 	add	x0, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x0,3708]
-	cbz	w0, .L2887
-.L2892:
+	stp	x21, x22, [sp,32]
+	ldr	w1, [x0,1400]
+	cbz	w1, .L2966
+.L2969:
 	mov	w0, 0
-	b	.L2888
-.L2887:
+	b	.L2967
+.L2966:
+	adrp	x1, .LANCHOR0+136
+	adrp	x22, .LANCHOR4
+	ldrb	w1, [x1,#:lo12:.LANCHOR0+136]
+	cbz	w1, .L2968
+	add	x1, x22, :lo12:.LANCHOR4
+	ldr	w1, [x1,3984]
+	tbz	x1, 0, .L2968
+	ldrh	w0, [x0,3708]
+	cbnz	w0, .L2969
+.L2968:
 	add	x0, x19, :lo12:.LANCHOR2
-	add	x1, x21, :lo12:.LANCHOR4
+	add	x1, x22, :lo12:.LANCHOR4
 	mov	w2, 0
-	mov	w20, 0
+	mov	w21, 0
 	mov	w3, w2
 	mov	w23, 56
 	ldr	x0, [x0,1000]
-	ldr	w1, [x1,144]
+	ldr	w1, [x1,3984]
 	bl	FlashProgPages
-.L2889:
-	add	x22, x21, :lo12:.LANCHOR4
-	ldr	w1, [x22,144]
-	cmp	w20, w1
-	bcs	.L2903
-	add	x0, x19, :lo12:.LANCHOR2
-	umull	x1, w20, w23
-	ldr	x2, [x0,1000]
-	add	x3, x2, x1
-	ldr	w2, [x2,x1]
+.L2970:
+	add	x20, x22, :lo12:.LANCHOR4
+	ldr	w1, [x20,3984]
+	cmp	w21, w1
+	bcs	.L2980
+	add	x1, x19, :lo12:.LANCHOR2
+	umull	x0, w21, w23
+	ldr	x2, [x1,1000]
+	add	x3, x2, x0
+	ldr	w2, [x2,x0]
 	cmn	w2, #1
-	bne	.L2890
-	ldrh	w4, [x0,3704]
-	ldr	x3, [x0,1184]
+	bne	.L2971
+	ldrh	w4, [x1,3704]
+	ldr	x3, [x1,1184]
 	strh	wzr, [x3,x4,lsl 1]
-	strh	w2, [x0,3704]
-	ldr	w2, [x0,4064]
+	strh	w2, [x1,3704]
+	ldr	x1, [x1,1000]
+	ldr	w2, [x20,3552]
+	add	x0, x1, x0
 	add	w2, w2, 1
-	str	w2, [x0,4064]
-	ldr	x0, [x0,1000]
-	add	x1, x0, x1
-	ldr	w0, [x1,4]
+	str	w2, [x20,3552]
+	ldr	w0, [x0,4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-	b	.L2902
-.L2890:
+	b	.L2979
+.L2971:
 	ldr	x2, [x3,16]
-	add	w20, w20, 1
+	add	w21, w21, 1
 	ldr	w1, [x3,4]
-	uxth	w20, w20
+	uxth	w21, w21
 	ldr	w0, [x2,12]
 	ldr	w2, [x2,8]
 	bl	FtlGcUpdatePage
-	b	.L2889
-.L2903:
+	b	.L2970
+.L2980:
 	add	x19, x19, :lo12:.LANCHOR2
 	ldr	x0, [x19,1000]
 	bl	FtlGcBufFree
-	str	wzr, [x22,144]
+	str	wzr, [x20,3984]
 	ldrh	w0, [x19,3708]
-	cbnz	w0, .L2892
+	cbnz	w0, .L2969
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.L2902:
+.L2979:
 	mov	w0, 1
-.L2888:
+.L2967:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -18477,10 +19301,10 @@ Ftl_get_new_temp_ppa:
 	ldrh	w2, [x0,3704]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L2905
+	beq	.L2982
 	ldrh	w0, [x1,4]
-	cbnz	w0, .L2906
-.L2905:
+	cbnz	w0, .L2983
+.L2982:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -18490,13 +19314,13 @@ Ftl_get_new_temp_ppa:
 	bl	allocate_data_superblock
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
-	strh	wzr, [x0,176]
-	strh	wzr, [x0,178]
+	strh	wzr, [x0,4016]
+	strh	wzr, [x0,4018]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2906:
+.L2983:
 	add	x0, x19, :lo12:.LANCHOR2
 	add	x0, x0, 3704
 	bl	get_new_active_ppa
@@ -18508,7 +19332,7 @@ Ftl_get_new_temp_ppa:
 	.global	ftl_read
 	.type	ftl_read, %function
 ftl_read:
-	stp	x29, x30, [sp, -176]!
+	stp	x29, x30, [sp, -192]!
 	cmp	w0, 16
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
@@ -18519,81 +19343,86 @@ ftl_read:
 	mov	w20, w1
 	mov	w28, w2
 	mov	x25, x3
-	bne	.L2908
+	bne	.L2985
 	add	w0, w1, 256
 	mov	w1, w2
 	mov	x2, x3
 	bl	FtlVendorPartRead
-	b	.L2909
-.L2908:
+	b	.L2986
+.L2985:
 	add	w0, w1, w2
-	str	w0, [x29,156]
+	str	w0, [x29,172]
 	adrp	x0, .LANCHOR0+4048
-	ldr	w2, [x29,156]
+	ldr	w2, [x29,172]
 	ldr	w1, [x0,#:lo12:.LANCHOR0+4048]
 	mov	w0, -1
 	cmp	w2, w1
-	bhi	.L2909
+	bhi	.L2986
 	adrp	x19, .LANCHOR2
+	adrp	x21, .LANCHOR4
+	add	x0, x19, :lo12:.LANCHOR2
 	sub	w24, w2, #1
-	add	x1, x19, :lo12:.LANCHOR2
-	ldrh	w0, [x1,824]
-	udiv	w27, w20, w0
-	udiv	w24, w24, w0
-	adrp	x0, .LANCHOR4
-	add	x0, x0, :lo12:.LANCHOR4
+	add	x2, x21, :lo12:.LANCHOR4
+	ldrh	w1, [x0,824]
+	udiv	w27, w20, w1
+	udiv	w24, w24, w1
+	ldr	w1, [x2,3972]
+	add	w1, w28, w1
 	sub	w23, w24, w27
+	str	w1, [x2,3972]
 	add	w23, w23, 1
-	ldr	w2, [x0,132]
-	add	w2, w28, w2
-	str	w2, [x0,132]
-	ldr	w0, [x1,900]
-	add	w0, w23, w0
-	str	w0, [x1,900]
-	mov	w0, w27
+	ldr	w1, [x0,900]
+	add	w1, w23, w1
+	str	w1, [x0,900]
 	mov	w1, w24
+	mov	w0, w27
 	bl	FtlCacheMetchLpa
-	cbz	w0, .L2910
+	mov	x1, x21
+	cbz	w0, .L2987
+	str	x21, [x29,160]
 	bl	FtlCacheWriteBack
-.L2910:
+	ldr	x1, [x29,160]
+.L2987:
 	mov	w26, 0
+	add	x0, x1, :lo12:.LANCHOR4
 	mov	w21, w27
-	str	w26, [x29,152]
+	str	w26, [x29,168]
 	mov	w22, w26
-	str	w26, [x29,140]
-.L2911:
-	cbz	w23, .L2952
+	str	w26, [x29,156]
+	str	x0, [x29,112]
+.L2988:
+	cbz	w23, .L3029
 	mov	w0, w21
-	add	x1, x29, 172
+	add	x1, x29, 188
 	mov	w2, 0
 	bl	log2phys
-	ldr	w3, [x29,172]
+	ldr	w3, [x29,188]
 	cmn	w3, #1
-	bne	.L2950
+	bne	.L3027
 	mov	w3, 0
-.L2912:
+.L2989:
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x0,824]
 	cmp	w3, w0
-	bcs	.L2916
+	bcs	.L2993
 	madd	w0, w21, w0, w3
 	cmp	w0, w20
-	bcc	.L2914
-	ldr	w1, [x29,156]
+	bcc	.L2991
+	ldr	w1, [x29,172]
 	cmp	w0, w1
-	bcs	.L2914
+	bcs	.L2991
 	sub	w0, w0, w20
 	mov	w1, 0
 	ubfiz	x0, x0, 9, 23
 	mov	w2, 512
 	add	x0, x25, x0
-	str	x3, [x29,144]
+	str	x3, [x29,160]
 	bl	ftl_memset
-	ldr	x3, [x29,144]
-.L2914:
+	ldr	x3, [x29,160]
+.L2991:
 	add	w3, w3, 1
-	b	.L2912
-.L2950:
+	b	.L2989
+.L3027:
 	add	x2, x19, :lo12:.LANCHOR2
 	mov	w0, 56
 	cmp	w21, w27
@@ -18602,40 +19431,40 @@ ftl_read:
 	add	x0, x0, x1
 	str	w3, [x0,4]
 	ldrh	w0, [x2,824]
-	bne	.L2917
+	bne	.L2994
 	ldr	x3, [x2,992]
 	ldr	x2, [x2,1088]
 	add	x3, x3, x1
 	str	x2, [x3,8]
 	udiv	w2, w20, w0
 	msub	w2, w2, w0, w20
-	str	w2, [x29,112]
+	str	w2, [x29,128]
 	sub	w2, w0, w2
 	cmp	w2, w28
 	csel	w2, w2, w28, ls
-	str	w2, [x29,152]
+	str	w2, [x29,168]
 	cmp	w2, w0
-	bne	.L2918
+	bne	.L2995
 	str	x25, [x3,8]
-	b	.L2918
-.L2917:
+	b	.L2995
+.L2994:
 	cmp	w21, w24
-	bne	.L2919
+	bne	.L2996
 	ldr	x3, [x2,992]
 	ldr	x2, [x2,1096]
 	add	x3, x3, x1
-	ldr	w4, [x29,156]
+	ldr	w4, [x29,172]
 	str	x2, [x3,8]
 	mul	w2, w21, w0
 	sub	w26, w4, w2
 	cmp	w26, w0
-	bne	.L2918
+	bne	.L2995
 	sub	w2, w2, w20
 	ubfiz	x2, x2, 9, 23
 	add	x2, x25, x2
 	str	x2, [x3,8]
-	b	.L2918
-.L2919:
+	b	.L2995
+.L2996:
 	ldr	x2, [x2,992]
 	mul	w0, w21, w0
 	add	x2, x2, x1
@@ -18643,7 +19472,7 @@ ftl_read:
 	ubfiz	x0, x0, 9, 23
 	add	x0, x25, x0
 	str	x0, [x2,8]
-.L2918:
+.L2995:
 	add	x2, x19, :lo12:.LANCHOR2
 	ldr	x0, [x2,992]
 	add	x1, x0, x1
@@ -18655,35 +19484,35 @@ ftl_read:
 	and	x0, x0, 4294967292
 	add	x0, x2, x0
 	str	x0, [x1,16]
-.L2916:
+.L2993:
 	subs	w23, w23, #1
 	add	w21, w21, 1
-	beq	.L2920
+	beq	.L2997
 	add	x0, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x0,748]
 	cmp	w22, w0, lsl 3
-	bne	.L2911
-.L2920:
-	cbz	w22, .L2911
+	bne	.L2988
+.L2997:
+	cbz	w22, .L2988
 	add	x0, x19, :lo12:.LANCHOR2
 	mov	w1, w22
 	mov	w2, 0
 	ldr	x0, [x0,992]
 	bl	FlashReadPages
-	str	xzr, [x29,144]
-	ldr	x0, [x29,112]
+	str	xzr, [x29,160]
+	ldr	x0, [x29,128]
 	ubfiz	x0, x0, 9, 23
-	str	x0, [x29,128]
-	ldr	w0, [x29,152]
+	str	x0, [x29,144]
+	ldr	w0, [x29,168]
 	lsl	w0, w0, 9
-	str	w0, [x29,136]
+	str	w0, [x29,152]
 	lsl	w0, w26, 9
-	str	w0, [x29,108]
-.L2922:
-	ldr	w0, [x29,144]
+	str	w0, [x29,124]
+.L2999:
+	ldr	w0, [x29,160]
 	cmp	w22, w0
-	bls	.L2953
-	ldr	x0, [x29,144]
+	bls	.L3030
+	ldr	x0, [x29,160]
 	add	x2, x19, :lo12:.LANCHOR2
 	mov	x1, 56
 	mul	x3, x0, x1
@@ -18691,77 +19520,79 @@ ftl_read:
 	add	x0, x0, x3
 	ldr	w1, [x0,24]
 	cmp	w1, w27
-	bne	.L2923
+	bne	.L3000
 	ldr	x1, [x0,8]
 	ldr	x0, [x2,1088]
 	cmp	x1, x0
-	bne	.L2924
-	ldr	x2, [x29,128]
+	bne	.L3001
+	ldr	x2, [x29,144]
 	mov	x0, x25
-	str	x3, [x29,96]
+	str	x3, [x29,104]
 	add	x1, x1, x2
-	ldr	w2, [x29,136]
-	b	.L2951
-.L2923:
+	ldr	w2, [x29,152]
+	b	.L3028
+.L3000:
 	cmp	w1, w24
-	bne	.L2924
+	bne	.L3001
 	ldr	x1, [x0,8]
 	ldr	x0, [x2,1096]
 	cmp	x1, x0
-	bne	.L2924
+	bne	.L3001
 	ldrh	w0, [x2,824]
-	ldr	w2, [x29,108]
-	str	x3, [x29,96]
+	ldr	w2, [x29,124]
+	str	x3, [x29,104]
 	mul	w0, w24, w0
 	sub	w0, w0, w20
 	ubfiz	x0, x0, 9, 23
 	add	x0, x25, x0
-.L2951:
+.L3028:
 	bl	ftl_memcpy
-	ldr	x3, [x29,96]
-.L2924:
+	ldr	x3, [x29,104]
+.L3001:
 	add	x0, x19, :lo12:.LANCHOR2
-	ldr	x1, [x0,992]
-	add	x5, x1, x3
-	ldr	w4, [x1,x3]
-	cmn	w4, #1
-	bne	.L2925
-	ldr	w2, [x0,4040]
-	str	w4, [x29,140]
-	add	w2, w2, 1
-	str	w2, [x0,4040]
-.L2925:
-	ldr	w0, [x1,x3]
+	ldr	x0, [x0,992]
+	add	x5, x0, x3
+	ldr	w2, [x0,x3]
+	cmn	w2, #1
+	bne	.L3002
+	ldr	x1, [x29,112]
+	str	w2, [x29,156]
+	add	x4, x1, 3456
+	ldr	w1, [x1,3528]
+	add	w1, w1, 1
+	str	w1, [x4,72]
+.L3002:
+	ldr	w0, [x0,x3]
 	cmp	w0, 256
-	bne	.L2926
+	bne	.L3003
 	ldr	w0, [x5,4]
 	lsr	x0, x0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L2926:
-	ldr	x0, [x29,144]
+.L3003:
+	ldr	x0, [x29,160]
 	add	x0, x0, 1
-	str	x0, [x29,144]
-	b	.L2922
-.L2953:
+	str	x0, [x29,160]
+	b	.L2999
+.L3030:
 	mov	w22, 0
-	b	.L2911
-.L2952:
+	b	.L2988
+.L3029:
 	add	x19, x19, :lo12:.LANCHOR2
 	ldrh	w0, [x19,958]
-	cbz	w0, .L2929
+	cbz	w0, .L3006
 	mov	w0, w23
 	mov	w1, 1
 	bl	ftl_do_gc
-.L2929:
-	ldr	w0, [x29,140]
-.L2909:
+.L3006:
+	ldr	w0, [x29,156]
+.L2986:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
 	ldp	x25, x26, [sp,64]
 	ldp	x27, x28, [sp,80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 192
 	ret
 	.size	ftl_read, .-ftl_read
 	.align	2
@@ -18770,22 +19601,22 @@ ftl_read:
 FtlInit:
 	stp	x29, x30, [sp, -48]!
 	mov	w0, -1
-	adrp	x1, .LC119
+	adrp	x1, .LC140
 	add	x29, sp, 0
 	str	x21, [sp,32]
 	adrp	x21, .LANCHOR1
 	add	x21, x21, :lo12:.LANCHOR1
-	add	x1, x1, :lo12:.LC119
+	add	x1, x1, :lo12:.LC140
 	stp	x19, x20, [sp,16]
 	adrp	x19, .LANCHOR2
 	adrp	x20, .LANCHOR0
 	str	w0, [x21,3064]
-	adrp	x0, .LANCHOR4+380
+	adrp	x0, .LANCHOR5-132
 	add	x19, x19, :lo12:.LANCHOR2
 	add	x20, x20, :lo12:.LANCHOR0
-	str	wzr, [x0,#:lo12:.LANCHOR4+380]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	str	wzr, [x0,#:lo12:.LANCHOR5-132]
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	str	wzr, [x19,1400]
 	bl	printk
 	add	x0, x20, 4016
@@ -18795,47 +19626,47 @@ FtlInit:
 	ldrh	w0, [x19,752]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2955
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
-	b	.L2967
-.L2955:
+	cbz	w0, .L3032
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	b	.L3044
+.L3032:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2957
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
-.L2967:
+	cbz	w0, .L3034
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+.L3044:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
-	add	x1, x1, 40
+	add	x1, x1, 96
 	bl	printk
-	b	.L2956
-.L2957:
+	b	.L3033
+.L3034:
 	mov	w1, 1
 	str	w1, [x21,3064]
 	bl	ftl_do_gc
 	ldrh	w0, [x19,3600]
 	cmp	w0, 15
-	bhi	.L2958
+	bhi	.L3035
 	mov	w19, 1024
-.L2959:
+.L3036:
 	mov	w0, 1
 	mov	w1, w0
 	bl	ftl_do_gc
 	subs	w19, w19, #1
-	bne	.L2959
-	b	.L2956
-.L2958:
+	bne	.L3036
+	b	.L3033
+.L3035:
 	ldrb	w0, [x20,136]
-	cbz	w0, .L2956
+	cbz	w0, .L3033
 	mov	w19, 128
-.L2961:
+.L3038:
 	mov	w0, 1
 	mov	w1, w0
 	bl	ftl_do_gc
 	subs	w19, w19, #1
-	bne	.L2961
-.L2956:
+	bne	.L3038
+.L3033:
 	mov	w0, 0
 	ldr	x21, [sp,32]
 	ldp	x19, x20, [sp,16]
@@ -18862,31 +19693,33 @@ ftl_write:
 	mov	x22, x3
 	str	x1, [x29,152]
 	ldr	w3, [x2,1400]
-	cbnz	w3, .L2969
+	cbnz	w3, .L3046
 	cmp	w4, 16
-	bne	.L2970
+	bne	.L3047
 	add	w0, w20, 256
 	mov	w1, w21
 	mov	x2, x22
 	bl	FtlVendorPartWrite
-	b	.L2969
-.L2970:
+	b	.L3046
+.L3047:
 	adrp	x0, .LANCHOR0+4048
 	add	w24, w20, w21
 	ldr	w1, [x0,#:lo12:.LANCHOR0+4048]
 	mov	w0, -1
 	cmp	w24, w1
-	bhi	.L2969
-	adrp	x4, .LANCHOR4
+	bhi	.L3046
+	adrp	x5, .LANCHOR5
 	ldrh	w1, [x2,824]
-	add	x26, x4, :lo12:.LANCHOR4
+	add	x26, x5, :lo12:.LANCHOR5
 	sub	w24, w24, #1
 	mov	w0, 2048
-	ldr	w3, [x2,968]
+	adrp	x4, .LANCHOR4
 	udiv	w23, w20, w1
+	add	x3, x4, :lo12:.LANCHOR4
+	str	w0, [x26,-128]
 	cmp	w21, w1, lsl 1
-	str	w0, [x26,384]
-	str	x4, [x29,144]
+	str	x5, [x29,144]
+	str	x4, [x29,112]
 	udiv	w0, w24, w1
 	str	w0, [x29,200]
 	sub	w28, w0, w23
@@ -18894,12 +19727,13 @@ ftl_write:
 	ldr	w0, [x2,884]
 	add	w0, w25, w0
 	str	w0, [x2,884]
-	ldr	w0, [x26,128]
+	ldr	w0, [x3,3968]
 	add	w0, w21, w0
-	str	w0, [x26,128]
+	str	w0, [x3,3968]
+	ldr	w3, [x2,968]
 	cset	w0, cs
 	str	w0, [x29,204]
-	cbz	w3, .L2972
+	cbz	w3, .L3049
 	mov	w0, 56
 	sub	w3, w3, #1
 	umull	x3, w3, w0
@@ -18907,13 +19741,13 @@ ftl_write:
 	add	x3, x0, x3
 	ldr	w0, [x3,24]
 	cmp	w23, w0
-	bne	.L2973
+	bne	.L3050
 	ldr	w0, [x2,892]
 	add	w0, w0, 1
 	str	w0, [x2,892]
-	ldr	w0, [x26,388]
+	ldr	w0, [x26,-124]
 	add	w0, w0, 1
-	str	w0, [x26,388]
+	str	w0, [x26,-124]
 	msub	w0, w23, w1, w20
 	sub	w1, w1, w0
 	ubfiz	x0, x0, 9, 23
@@ -18925,84 +19759,84 @@ ftl_write:
 	mov	w2, w25
 	mov	x1, x22
 	bl	ftl_memcpy
-	cbnz	w28, .L2974
-	ldr	w0, [x26,388]
+	cbnz	w28, .L3051
+	ldr	w0, [x26,-124]
 	cmp	w0, 2
-	bgt	.L2974
-.L3007:
+	bgt	.L3051
+.L3084:
 	mov	w0, 0
-	b	.L2969
-.L2974:
+	b	.L3046
+.L3051:
 	add	x22, x22, x25
 	sub	w21, w21, w19
 	add	w20, w20, w19
 	add	w23, w23, 1
 	mov	w25, w28
-.L2973:
+.L3050:
 	ldr	x0, [x29,144]
-	add	x0, x0, :lo12:.LANCHOR4
-	str	wzr, [x0,388]
-.L2972:
+	add	x0, x0, :lo12:.LANCHOR5
+	str	wzr, [x0,-124]
+.L3049:
 	ldr	w1, [x29,200]
 	mov	w0, w23
 	bl	FtlCacheMetchLpa
-	cbz	w0, .L2975
+	cbz	w0, .L3052
 	bl	FtlCacheWriteBack
-.L2975:
+.L3052:
 	ldr	x0, [x29,144]
 	ldr	x1, [x29,152]
-	add	x0, x0, :lo12:.LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR5
 	str	w23, [x29,192]
 	add	x3, x1, :lo12:.LANCHOR2
 	add	x19, x3, 3608
 	mov	x24, x3
-	str	x19, [x0,368]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	str	x19, [x0,-144]
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	str	x19, [x29,176]
-	str	x0, [x29,104]
-.L2976:
-	cbz	w25, .L3036
+	str	x0, [x29,96]
+.L3053:
+	cbz	w25, .L3113
 	ldrh	w0, [x19,4]
-	cbnz	w0, .L2977
+	cbnz	w0, .L3054
 	ldr	x1, [x29,176]
 	adrp	x26, .LANCHOR1
 	cmp	x19, x1
-	bne	.L2978
+	bne	.L3055
 	add	x0, x24, 3656
 	ldrh	w19, [x0,4]
-	cbnz	w19, .L2979
+	cbnz	w19, .L3056
 	bl	allocate_new_data_superblock
 	add	x0, x26, :lo12:.LANCHOR1
 	str	w19, [x0,3072]
-.L2979:
+.L3056:
 	ldr	x0, [x29,176]
 	add	x26, x26, :lo12:.LANCHOR1
 	add	x19, x24, 3656
 	bl	allocate_new_data_superblock
 	ldr	w0, [x26,3072]
-	cbnz	w0, .L2980
-.L2981:
+	cbnz	w0, .L3057
+.L3058:
 	ldr	x19, [x29,176]
-	b	.L2980
-.L2978:
+	b	.L3057
+.L3055:
 	add	x26, x26, :lo12:.LANCHOR1
 	str	w0, [x26,3072]
 	ldr	x0, [x29,176]
 	ldrh	w0, [x0,4]
-	cbnz	w0, .L2981
+	cbnz	w0, .L3058
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L2980:
+.L3057:
 	ldrh	w0, [x19,4]
-	cbnz	w0, .L2982
+	cbnz	w0, .L3059
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L2982:
+.L3059:
 	ldr	x0, [x29,144]
-	add	x0, x0, :lo12:.LANCHOR4
-	str	x19, [x0,368]
-.L2977:
+	add	x0, x0, :lo12:.LANCHOR5
+	str	x19, [x0,-144]
+.L3054:
 	ldr	w0, [x24,964]
 	mov	x28, 0
 	ldr	w2, [x24,968]
@@ -19015,31 +19849,31 @@ ftl_write:
 	str	w0, [x29,140]
 	ldr	w0, [x29,204]
 	and	w0, w0, 1
-	str	w0, [x29,116]
+	str	w0, [x29,108]
 	add	w0, w21, w20
 	str	w0, [x29,136]
-.L2983:
+.L3060:
 	ldr	w1, [x29,192]
 	mov	w0, w28
 	add	w27, w1, w28
 	ldr	w1, [x29,140]
 	cmp	w28, w1
-	bcs	.L3037
+	bcs	.L3114
 	ldrh	w1, [x19,4]
-	cbz	w1, .L3013
+	cbz	w1, .L3090
 	ldr	w1, [x29,200]
 	cmp	w27, w1
 	cset	w7, eq
-	cbz	w0, .L2985
-	ldr	w1, [x29,116]
+	cbz	w0, .L3062
+	ldr	w1, [x29,108]
 	tst	w7, w1
-	beq	.L2985
+	beq	.L3062
 	ldrh	w1, [x24,824]
 	ldr	w2, [x29,136]
 	msub	w2, w27, w1, w2
 	cmp	w2, w1
-	bne	.L3013
-.L2985:
+	bne	.L3090
+.L3062:
 	add	x1, x29, 212
 	mov	w2, 0
 	mov	w0, w27
@@ -19078,10 +19912,10 @@ ftl_write:
 	cmp	w27, w23
 	cset	w0, eq
 	str	w0, [x29,196]
-	cbnz	w0, .L3016
+	cbnz	w0, .L3093
 	ldr	x7, [x29,160]
 	ldr	x5, [x29,184]
-	cbz	w7, .L2986
+	cbz	w7, .L3063
 	ldr	w0, [x29,136]
 	ldrh	w2, [x24,824]
 	msub	w2, w27, w2, w0
@@ -19089,8 +19923,8 @@ ftl_write:
 	str	w0, [x29,184]
 	ldr	w0, [x29,196]
 	str	w0, [x29,160]
-	b	.L2989
-.L3016:
+	b	.L3066
+.L3093:
 	ldrh	w2, [x24,824]
 	udiv	w0, w20, w2
 	msub	w0, w0, w2, w20
@@ -19099,39 +19933,39 @@ ftl_write:
 	cmp	w2, w21
 	csel	w0, w2, w21, ls
 	str	w0, [x29,184]
-.L2989:
+.L3066:
 	ldrh	w0, [x24,824]
 	ldr	w1, [x29,184]
 	cmp	w1, w0
-	bne	.L2990
+	bne	.L3067
 	ldr	w0, [x29,196]
 	mov	x1, x22
-	cbnz	w0, .L2991
+	cbnz	w0, .L3068
 	ldr	w0, [x29,184]
 	mul	w1, w0, w27
 	sub	w1, w1, w20
 	ubfiz	x1, x1, 9, 23
 	add	x1, x22, x1
-.L2991:
+.L3068:
 	ldr	w2, [x29,204]
 	mov	w0, 56
-	cbz	w2, .L2992
+	cbz	w2, .L3069
 	ldr	w2, [x24,968]
 	umull	x0, w2, w0
 	ldr	x2, [x24,1032]
 	add	x0, x2, x0
-	b	.L3033
-.L2992:
+	b	.L3110
+.L3069:
 	ldr	w2, [x24,968]
 	umull	x0, w2, w0
 	ldr	x2, [x24,1032]
 	add	x0, x2, x0
 	ldr	x0, [x0,8]
-	b	.L3034
-.L2990:
+	b	.L3111
+.L3067:
 	ldr	w0, [x29,212]
 	cmn	w0, #1
-	beq	.L2994
+	beq	.L3071
 	str	w0, [x29,220]
 	mov	w1, 56
 	ldr	w0, [x24,968]
@@ -19149,24 +19983,28 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	w0, [x29,216]
 	cmn	w0, #1
-	bne	.L2995
-	ldr	w0, [x24,4040]
-	add	w0, w0, 1
-	str	w0, [x24,4040]
-	b	.L2997
-.L2995:
+	bne	.L3072
+	ldr	x0, [x29,112]
+	add	x0, x0, :lo12:.LANCHOR4
+	ldr	w1, [x0,3528]
+	add	w1, w1, 1
+	str	w1, [x0,3528]
+	b	.L3074
+.L3072:
 	ldr	w0, [x26,8]
 	cmp	w0, w27
-	beq	.L2997
-	ldr	w0, [x24,4040]
+	beq	.L3074
+	ldr	x0, [x29,112]
 	mov	w2, w27
-	add	w0, w0, 1
-	str	w0, [x24,4040]
-	ldr	x0, [x29,104]
+	add	x0, x0, :lo12:.LANCHOR4
+	ldr	w1, [x0,3528]
+	add	w1, w1, 1
+	str	w1, [x0,3528]
+	ldr	x0, [x29,96]
 	ldr	w1, [x26,8]
 	bl	printk
-	b	.L2997
-.L2994:
+	b	.L3074
+.L3071:
 	ldr	w0, [x24,968]
 	mov	w1, 56
 	ldrh	w2, [x24,828]
@@ -19176,12 +20014,12 @@ ftl_write:
 	mov	w1, 0
 	ldr	x0, [x0,8]
 	bl	ftl_memset
-.L2997:
+.L3074:
 	ldr	w1, [x29,184]
 	mov	w0, 56
 	lsl	w2, w1, 9
 	ldr	w1, [x29,196]
-	cbz	w1, .L2998
+	cbz	w1, .L3075
 	ldr	w1, [x24,968]
 	umull	x0, w1, w0
 	ldr	x1, [x24,1032]
@@ -19191,8 +20029,8 @@ ftl_write:
 	ldr	x1, [x1,8]
 	add	x0, x1, x0
 	mov	x1, x22
-	b	.L3035
-.L2998:
+	b	.L3112
+.L3075:
 	ldr	w1, [x24,968]
 	umull	x0, w1, w0
 	ldr	x1, [x24,1032]
@@ -19203,12 +20041,12 @@ ftl_write:
 	sub	w1, w1, w20
 	ubfiz	x1, x1, 9, 23
 	add	x1, x22, x1
-	b	.L3035
-.L2986:
+	b	.L3112
+.L3063:
 	ldr	w0, [x29,204]
 	ldrh	w1, [x24,824]
 	ldr	w2, [x24,968]
-	cbz	w0, .L2999
+	cbz	w0, .L3076
 	mul	w1, w27, w1
 	umull	x0, w2, w5
 	sub	w1, w1, w20
@@ -19216,10 +20054,10 @@ ftl_write:
 	ubfiz	x1, x1, 9, 23
 	add	x0, x2, x0
 	add	x1, x22, x1
-.L3033:
+.L3110:
 	str	x1, [x0,8]
-	b	.L2993
-.L2999:
+	b	.L3070
+.L3076:
 	umull	x0, w2, w5
 	ldr	x2, [x24,1032]
 	mul	w1, w27, w1
@@ -19228,11 +20066,11 @@ ftl_write:
 	ubfiz	x1, x1, 9, 23
 	ldr	x0, [x0,8]
 	add	x1, x22, x1
-.L3034:
+.L3111:
 	ldrh	w2, [x24,828]
-.L3035:
+.L3112:
 	bl	ftl_memcpy
-.L2993:
+.L3070:
 	ldr	x1, [x29,120]
 	mov	w0, -3947
 	ldr	x2, [x29,128]
@@ -19252,33 +20090,33 @@ ftl_write:
 	ldr	w0, [x24,968]
 	add	w0, w0, 1
 	str	w0, [x24,968]
-	b	.L2983
-.L3037:
+	b	.L3060
+.L3114:
 	str	w27, [x29,192]
 	mov	x0, x1
-	b	.L2984
-.L3013:
+	b	.L3061
+.L3090:
 	str	w27, [x29,192]
-.L2984:
+.L3061:
 	sub	w25, w25, w0
 	ldr	w0, [x29,204]
-	cbnz	w0, .L3003
+	cbnz	w0, .L3080
 	ldr	w1, [x24,968]
 	ldr	w0, [x24,964]
 	cmp	w1, w0
-	bcs	.L3003
+	bcs	.L3080
 	ldrh	w0, [x19,4]
-	cbz	w0, .L3003
-.L3005:
+	cbz	w0, .L3080
+.L3082:
 	str	wzr, [x29,204]
-	b	.L2976
-.L3003:
+	b	.L3053
+.L3080:
 	bl	FtlCacheWriteBack
 	str	wzr, [x24,968]
 	cmp	w25, 1
-	bhi	.L2976
-	b	.L3005
-.L3036:
+	bhi	.L3053
+	b	.L3082
+.L3113:
 	ldr	w1, [x29,200]
 	mov	w0, w25
 	sub	w1, w1, w23
@@ -19287,23 +20125,23 @@ ftl_write:
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w1, [x0,3600]
 	cmp	w1, 31
-	bhi	.L3007
+	bhi	.L3084
 	mov	w1, 128
 	mov	w19, 16
 	strh	w1, [x0,954]
 	strh	w1, [x0,952]
-.L3008:
+.L3085:
 	mov	w0, 0
 	mov	w1, 1
 	bl	ftl_do_gc
 	ldr	x0, [x29,152]
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0,1400]
-	cbnz	w0, .L3007
+	cbnz	w0, .L3084
 	subs	w19, w19, #1
-	bne	.L3008
-	b	.L3007
-.L2969:
+	bne	.L3085
+	b	.L3084
+.L3046:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -19355,16 +20193,16 @@ ftl_fix_nand_power_lost_error:
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
-	cbz	w0, .L3040
+	cbz	w0, .L3117
 	adrp	x21, .LANCHOR4
 	adrp	x19, .LANCHOR2
 	add	x0, x21, :lo12:.LANCHOR4
 	add	x20, x19, :lo12:.LANCHOR2
-	adrp	x24, .LC138
+	adrp	x24, .LC158
 	add	x26, x20, 3608
 	add	x25, x20, 3656
-	ldrh	w23, [x0,218]
-	add	x0, x24, :lo12:.LC138
+	ldrh	w23, [x0,4058]
+	add	x0, x24, :lo12:.LC158
 	ldr	x2, [x20,1184]
 	ubfiz	x22, x23, 1, 16
 	mov	w1, w23
@@ -19379,26 +20217,26 @@ ftl_fix_nand_power_lost_error:
 	bl	allocate_new_data_superblock
 	mov	x0, x25
 	bl	allocate_new_data_superblock
-.L3042:
+.L3119:
 	subs	w20, w20, #1
-	beq	.L3046
+	beq	.L3123
 	mov	w0, 1
 	mov	w1, w0
 	bl	ftl_do_gc
 	add	x0, x19, :lo12:.LANCHOR2
 	ldr	x0, [x0,1184]
 	ldrh	w0, [x0,x22]
-	cbnz	w0, .L3042
-.L3046:
+	cbnz	w0, .L3119
+.L3123:
 	add	x20, x19, :lo12:.LANCHOR2
-	add	x0, x24, :lo12:.LC138
+	add	x0, x24, :lo12:.LC158
 	mov	w1, w23
 	ldr	x2, [x20,1184]
 	ldrh	w2, [x2,x22]
 	bl	printk
 	ldr	x0, [x20,1184]
 	ldrh	w0, [x0,x22]
-	cbnz	w0, .L3044
+	cbnz	w0, .L3121
 	add	x0, x29, 80
 	strh	w23, [x29,80]
 	bl	make_superblock
@@ -19407,14 +20245,14 @@ ftl_fix_nand_power_lost_error:
 	mov	w6, 65535
 	mov	w20, w0
 	mov	w7, 56
-.L3047:
+.L3124:
 	cmp	w5, w0, uxth
-	bls	.L3054
+	bls	.L3131
 	add	x1, x29, 80
 	add	x1, x1, x0, lsl 1
 	ldrh	w2, [x1,16]
 	cmp	w2, w6
-	beq	.L3048
+	beq	.L3125
 	add	x4, x19, :lo12:.LANCHOR2
 	lsl	w2, w2, 10
 	umull	x1, w20, w7
@@ -19427,14 +20265,14 @@ ftl_fix_nand_power_lost_error:
 	add	x1, x2, x1
 	str	xzr, [x1,8]
 	str	xzr, [x1,16]
-.L3048:
+.L3125:
 	add	x0, x0, 1
-	b	.L3047
-.L3054:
+	b	.L3124
+.L3131:
 	add	x19, x19, :lo12:.LANCHOR2
-	adrp	x0, .LC139
+	adrp	x0, .LC159
 	mov	w1, w23
-	add	x0, x0, :lo12:.LC139
+	add	x0, x0, :lo12:.LC159
 	ldr	x2, [x19,1184]
 	ldrh	w2, [x2,x22]
 	bl	printk
@@ -19446,11 +20284,11 @@ ftl_fix_nand_power_lost_error:
 	mov	w1, 1
 	mov	w2, w20
 	bl	FlashEraseBlocks
-.L3044:
+.L3121:
 	add	x21, x21, :lo12:.LANCHOR4
 	mov	w0, -1
-	strh	w0, [x21,218]
-.L3040:
+	strh	w0, [x21,4058]
+.L3117:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -19459,6 +20297,7 @@ ftl_fix_nand_power_lost_error:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	last_cache_match_count
@@ -19683,19 +20522,33 @@ ftl_fix_nand_power_lost_error:
 	.section	.rodata
 	.align	3
 .LANCHOR3 = . + 0
-	.type	__func__.19441, %object
-	.size	__func__.19441, 11
-__func__.19441:
+	.type	__func__.19448, %object
+	.size	__func__.19448, 11
+__func__.19448:
 	.string	"FtlMemInit"
 	.zero	5
-	.type	__func__.20390, %object
-	.size	__func__.20390, 21
-__func__.20390:
+	.type	__func__.20195, %object
+	.size	__func__.20195, 12
+__func__.20195:
+	.string	"FtlCheckVpc"
+	.zero	4
+	.type	__func__.20228, %object
+	.size	__func__.20228, 17
+__func__.20228:
+	.string	"FtlDumpBlockInfo"
+	.zero	7
+	.type	__func__.20247, %object
+	.size	__func__.20247, 16
+__func__.20247:
+	.string	"FtlScanAllBlock"
+	.type	__func__.20495, %object
+	.size	__func__.20495, 21
+__func__.20495:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.19514, %object
-	.size	__func__.19514, 8
-__func__.19514:
+	.type	__func__.19521, %object
+	.size	__func__.19521, 8
+__func__.19521:
 	.string	"FtlInit"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
@@ -19785,198 +20638,238 @@ __func__.19514:
 .LC42:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 .LC43:
-	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC44:
-	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.string	"map_ppn:"
 .LC45:
-	.string	"%s\n"
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 .LC46:
-	.string	"no ect"
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 .LC47:
-	.string	"page map lost %x %x %x %x\n"
+	.string	"%s\n"
 .LC48:
-	.string	"slc mode"
+	.string	"no ect"
 .LC49:
-	.string	"FLASH INFO:\n"
+	.string	"...%s enter...\n"
 .LC50:
-	.string	"FLASH ID: %x\n"
+	.string	"vpc1"
 .LC51:
-	.string	"Device Capacity: %d MB\n"
+	.string	"vpc2"
 .LC52:
-	.string	"FMWAIT: %x %x %x %x\n"
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC53:
-	.string	"FTL INFO:\n"
+	.string	"free blk vpc error %x = %x  %x\n"
 .LC54:
-	.string	"g_MaxLpn = 0x%x\n"
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
 .LC55:
-	.string	"g_VaildLpn = 0x%x\n"
+	.string	":"
 .LC56:
-	.string	"read_page_count = 0x%x\n"
+	.string	"Ftlscanalldata = %x\n"
 .LC57:
-	.string	"discard_page_count = 0x%x\n"
+	.string	"scan lpa = %x ppa= %x\n"
 .LC58:
-	.string	"write_page_count = 0x%x\n"
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC59:
-	.string	"cache_write_count = 0x%x\n"
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC60:
-	.string	"l2p_write_count = 0x%x\n"
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC61:
-	.string	"gc_page_count = 0x%x\n"
+	.string	"Mblk:"
 .LC62:
-	.string	"totle_write = %d MB\n"
+	.string	"L2P:"
 .LC63:
-	.string	"totle_read = %d MB\n"
+	.string	"L2PC:"
 .LC64:
-	.string	"GSV = 0x%x\n"
+	.string	"superBlkID = %x vpc=%x\n"
 .LC65:
-	.string	"GDV = 0x%x\n"
+	.string	"flashmode = %x pagenum = %x %x\n"
 .LC66:
-	.string	"bad blk num = %d %d\n"
+	.string	"blk = %x vpc=%x mode = %x\n"
 .LC67:
-	.string	"free_superblocks = 0x%x\n"
+	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC68:
-	.string	"mlc_EC = 0x%x\n"
+	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC69:
-	.string	"slc_EC = 0x%x\n"
+	.string	"slc mode"
 .LC70:
-	.string	"avg_EC = 0x%x\n"
+	.string	"FLASH INFO:\n"
 .LC71:
-	.string	"sys_EC = 0x%x\n"
+	.string	"FLASH ID: %x\n"
 .LC72:
-	.string	"max_EC = 0x%x\n"
+	.string	"Device Capacity: %d MB\n"
 .LC73:
-	.string	"min_EC = 0x%x\n"
+	.string	"FMWAIT: %x %x %x %x\n"
 .LC74:
-	.string	"PLT = 0x%x\n"
+	.string	"FTL INFO:\n"
 .LC75:
-	.string	"POT = 0x%x\n"
+	.string	"g_MaxLpn = 0x%x\n"
 .LC76:
-	.string	"MaxSector = 0x%x\n"
+	.string	"g_VaildLpn = 0x%x\n"
 .LC77:
-	.string	"init_sys_blks_pp = 0x%x\n"
+	.string	"read_page_count = 0x%x\n"
 .LC78:
-	.string	"sys_blks_pp = 0x%x\n"
+	.string	"discard_page_count = 0x%x\n"
 .LC79:
-	.string	"free sysblock = 0x%x\n"
+	.string	"write_page_count = 0x%x\n"
 .LC80:
-	.string	"data_blks_pp = 0x%x\n"
+	.string	"cache_write_count = 0x%x\n"
 .LC81:
-	.string	"data_op_blks_pp = 0x%x\n"
+	.string	"l2p_write_count = 0x%x\n"
 .LC82:
-	.string	"max_data_blks = 0x%x\n"
+	.string	"gc_page_count = 0x%x\n"
 .LC83:
-	.string	"Sys.id = 0x%x\n"
+	.string	"totle_write = %d MB\n"
 .LC84:
-	.string	"Bbt.id = 0x%x\n"
+	.string	"totle_read = %d MB\n"
 .LC85:
-	.string	"ACT.page = 0x%x\n"
+	.string	"GSV = 0x%x\n"
 .LC86:
-	.string	"ACT.plane = 0x%x\n"
+	.string	"GDV = 0x%x\n"
 .LC87:
-	.string	"ACT.id = 0x%x\n"
+	.string	"bad blk num = %d %d\n"
 .LC88:
-	.string	"ACT.mode = 0x%x\n"
+	.string	"free_superblocks = 0x%x\n"
 .LC89:
-	.string	"ACT.a_pages = 0x%x\n"
+	.string	"mlc_EC = 0x%x\n"
 .LC90:
-	.string	"ACT VPC = 0x%x\n"
+	.string	"slc_EC = 0x%x\n"
 .LC91:
-	.string	"BUF.page = 0x%x\n"
+	.string	"avg_EC = 0x%x\n"
 .LC92:
-	.string	"BUF.plane = 0x%x\n"
+	.string	"sys_EC = 0x%x\n"
 .LC93:
-	.string	"BUF.id = 0x%x\n"
+	.string	"max_EC = 0x%x\n"
 .LC94:
-	.string	"BUF.mode = 0x%x\n"
+	.string	"min_EC = 0x%x\n"
 .LC95:
-	.string	"BUF.a_pages = 0x%x\n"
+	.string	"PLT = 0x%x\n"
 .LC96:
-	.string	"BUF VPC = 0x%x\n"
+	.string	"POT = 0x%x\n"
 .LC97:
-	.string	"TMP.page = 0x%x\n"
+	.string	"MaxSector = 0x%x\n"
 .LC98:
-	.string	"TMP.plane = 0x%x\n"
+	.string	"init_sys_blks_pp = 0x%x\n"
 .LC99:
-	.string	"TMP.id = 0x%x\n"
+	.string	"sys_blks_pp = 0x%x\n"
 .LC100:
-	.string	"TMP.mode = 0x%x\n"
+	.string	"free sysblock = 0x%x\n"
 .LC101:
-	.string	"TMP.a_pages = 0x%x\n"
+	.string	"data_blks_pp = 0x%x\n"
 .LC102:
-	.string	"GC.page = 0x%x\n"
+	.string	"data_op_blks_pp = 0x%x\n"
 .LC103:
-	.string	"GC.plane = 0x%x\n"
+	.string	"max_data_blks = 0x%x\n"
 .LC104:
-	.string	"GC.id = 0x%x\n"
+	.string	"Sys.id = 0x%x\n"
 .LC105:
-	.string	"GC.mode = 0x%x\n"
+	.string	"Bbt.id = 0x%x\n"
 .LC106:
-	.string	"GC.a_pages = 0x%x\n"
+	.string	"ACT.page = 0x%x\n"
 .LC107:
-	.string	"WR_CHK = 0x%x %x %x %x\n"
+	.string	"ACT.plane = 0x%x\n"
 .LC108:
-	.string	"Read Err Cnt = 0x%x\n"
+	.string	"ACT.id = 0x%x\n"
 .LC109:
-	.string	"Prog Err Cnt = 0x%x\n"
+	.string	"ACT.mode = 0x%x\n"
 .LC110:
-	.string	"gc_free_blk_th= 0x%x\n"
+	.string	"ACT.a_pages = 0x%x\n"
 .LC111:
-	.string	"gc_merge_free_blk_th= 0x%x\n"
+	.string	"ACT VPC = 0x%x\n"
 .LC112:
-	.string	"gc_skip_write_count= 0x%x\n"
+	.string	"BUF.page = 0x%x\n"
 .LC113:
-	.string	"gc_blk_index= 0x%x\n"
+	.string	"BUF.plane = 0x%x\n"
 .LC114:
-	.string	"free min EC= 0x%x\n"
+	.string	"BUF.id = 0x%x\n"
 .LC115:
-	.string	"free max EC= 0x%x\n"
+	.string	"BUF.mode = 0x%x\n"
 .LC116:
-	.string	"GC__SB VPC = 0x%x\n"
+	.string	"BUF.a_pages = 0x%x\n"
 .LC117:
-	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
+	.string	"BUF VPC = 0x%x\n"
 .LC118:
-	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+	.string	"TMP.page = 0x%x\n"
 .LC119:
-	.string	"FTL version: 5.0.48 20180615"
+	.string	"TMP.plane = 0x%x\n"
 .LC120:
-	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
+	.string	"TMP.id = 0x%x\n"
 .LC121:
-	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
+	.string	"TMP.mode = 0x%x\n"
 .LC122:
-	.string	"FtlGcRefreshBlock  0x%x\n"
+	.string	"TMP.a_pages = 0x%x\n"
 .LC123:
-	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
+	.string	"GC.page = 0x%x\n"
 .LC124:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.string	"GC.plane = 0x%x\n"
 .LC125:
-	.string	"decrement_vpc_count %x = %d\n"
+	.string	"GC.id = 0x%x\n"
 .LC126:
-	.string	"RSB refresh addr %x\n"
+	.string	"GC.mode = 0x%x\n"
 .LC127:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"GC.a_pages = 0x%x\n"
 .LC128:
-	.string	"g_recovery_ppa %x ver %x\n "
+	.string	"WR_CHK = 0x%x %x %x %x\n"
 .LC129:
-	.string	"...%s enter...\n"
+	.string	"Read Err = 0x%x\n"
 .LC130:
-	.string	"FtlCheckVpc %x = %x  %x\n"
+	.string	"Prog Err = 0x%x\n"
 .LC131:
-	.string	"%d GC datablk  = %x vpc %x %x\n"
+	.string	"gc_free_blk_th= 0x%x\n"
 .LC132:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.string	"gc_merge_free_blk_th= 0x%x\n"
 .LC133:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.string	"gc_skip_write_count= 0x%x\n"
 .LC134:
-	.string	"GC des block %x done\n"
+	.string	"gc_blk_index= 0x%x\n"
 .LC135:
-	.string	"...%s: no bad block mapping table, format device\n"
+	.string	"free min EC= 0x%x\n"
 .LC136:
-	.string	"...%s FtlSysBlkInit error ,format device!\n"
+	.string	"free max EC= 0x%x\n"
 .LC137:
-	.string	"FtlWrite: lpa error:%x %x\n"
+	.string	"GC__SB VPC = 0x%x\n"
 .LC138:
-	.string	"fix power lost blk = %x vpc=%x\n"
+	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
 .LC139:
+	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+.LC140:
+	.string	"FTL version: 5.0.48 20180703"
+.LC141:
+	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
+.LC142:
+	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
+.LC143:
+	.string	"FtlGcRefreshBlock  0x%x\n"
+.LC144:
+	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
+.LC145:
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+.LC146:
+	.string	"decrement_vpc_count %x = %d\n"
+.LC147:
+	.string	"RSB refresh addr %x\n"
+.LC148:
+	.string	"spuer block %x vpn is 0\n "
+.LC149:
+	.string	"g_recovery_ppa %x ver %x\n "
+.LC150:
+	.string	"FtlCheckVpc %x = %x  %x\n"
+.LC151:
+	.string	"%d GC datablk  = %x vpc %x %x\n"
+.LC152:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+.LC153:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+.LC154:
+	.string	"GC des block %x done\n"
+.LC155:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC156:
+	.string	"...%s FtlSysBlkInit error ,format device!\n"
+.LC157:
+	.string	"FtlWrite: lpa error:%x %x\n"
+.LC158:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC159:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.data
 	.align	3
@@ -22447,7 +23340,8 @@ power_up_flag:
 	.align	3
 .LANCHOR0 = . + 0
 .LANCHOR2 = . + 4352
-.LANCHOR4 = . + 8704
+.LANCHOR4 = . + 13056
+.LANCHOR5 = . + 17408
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
@@ -23217,6 +24111,10 @@ gSysInfo:
 g_totle_map_block:
 	.zero	2
 	.zero	2
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.zero	8192
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
diff --git a/drivers/rk_nand/rk_zftl_arm64.S b/drivers/rk_nand/rk_zftl_arm64.S
index 658e71a576580..efe0577639814 100644
--- a/drivers/rk_nand/rk_zftl_arm64.S
+++ b/drivers/rk_nand/rk_zftl_arm64.S
@@ -4202,7 +4202,7 @@ gc_write_completed:
 	bl	printk
 	adrp	x0, .LC0
 	mov	x1, x22
-	mov	w2, 539
+	mov	w2, 544
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
@@ -4241,7 +4241,7 @@ gc_write_completed:
 	beq	.L658
 	adrp	x0, .LC0
 	mov	x1, x22
-	mov	w2, 546
+	mov	w2, 551
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
@@ -5743,7 +5743,7 @@ gc_free_src_blk:
 .L946:
 	adrp	x0, .LC0
 	mov	x1, x21
-	mov	w2, 793
+	mov	w2, 798
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
@@ -8437,10 +8437,9 @@ gc_static_wearleveling:
 	cmp	w2, w0
 	ble	.L1315
 	ldr	w0, [x4,x3]
-	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
-	cmp	w0, w2
-	ble	.L1316
+	cmp	w0, w21
+	bls	.L1316
 	cbz	w1, .L1315
 	ldrh	w0, [x4,x3]
 	and	w0, w0, 2047
@@ -8476,13 +8475,13 @@ gc_static_wearleveling:
 	cmp	w2, w0
 	ble	.L1315
 	ldrh	w0, [x4,x3]
-	add	w2, w20, 2
+	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
 	ble	.L1317
 	cbz	w1, .L1315
 	ldr	w0, [x4,x3]
-	add	w1, w21, 2
+	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
 	bgt	.L1315
@@ -12918,154 +12917,6 @@ sblk_read_page:
 	ret
 	.size	sblk_read_page, .-sblk_read_page
 	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #112
-	stp	x29, x30, [sp,16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp,32]
-	adrp	x19, .LANCHOR0
-	str	x27, [sp,96]
-	add	x20, x19, :lo12:.LANCHOR0
-	stp	x21, x22, [sp,48]
-	stp	x23, x24, [sp,64]
-	stp	x25, x26, [sp,80]
-	ldr	x0, [x20,2904]
-	ldr	x23, [x20,608]
-	add	x20, x20, 2896
-	cbnz	x0, .L2157
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x20,8]
-.L2157:
-	add	x0, x19, :lo12:.LANCHOR0
-	ldr	x20, [x0,2904]
-	cbnz	x20, .L2158
-	adrp	x1, .LANCHOR3
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 366
-	add	x1, x1, 296
-	add	x0, x0, :lo12:.LC0
-	bl	printk
-	bl	dump_stack
-.L2158:
-	mov	w24, 0
-	add	x25, x23, 80
-	add	x21, x19, :lo12:.LANCHOR0
-	adrp	x26, .LANCHOR4
-.L2159:
-	ldrb	w0, [x25,9]
-	cmp	w24, w0
-	bge	.L2180
-	mov	w22, 1
-	sxtw	x27, w24
-.L2168:
-	add	x0, x21, 2896
-	ldrh	w1, [x0,20]
-	cmp	w22, w1
-	bgt	.L2181
-	add	x1, x27, 8
-	ldrh	w2, [x21,3350]
-	ldrh	w0, [x0,16]
-	ldrh	w1, [x25,x1,lsl 1]
-	mul	w1, w1, w2
-	ldrb	w2, [x21,3257]
-	cmp	w2, 3
-	bne	.L2160
-	add	w1, w1, w0
-	orr	w1, w1, w22, lsl 24
-	b	.L2179
-.L2160:
-	cmp	w2, 2
-	bne	.L2162
-	sub	w0, w0, #1
-	add	w1, w0, w1
-	add	w1, w1, w22
-	orr	w1, w1, 33554432
-	b	.L2179
-.L2162:
-	add	w1, w1, w0
-.L2179:
-	str	w1, [x20,40]
-	mov	x0, x20
-	mov	w1, 1
-	bl	sblk_read_page
-	ldr	w2, [x20,52]
-	cmn	w2, #1
-	beq	.L2163
-	add	x3, x26, :lo12:.LANCHOR4
-	ldrh	w0, [x21,2918]
-	ldr	x1, [x20,24]
-	lsl	x0, x0, 2
-	ldr	x4, [x3,1136]
-	ldr	w5, [x4,x0]
-	ldr	w4, [x1,4]
-	cmp	w5, w4
-	bne	.L2163
-	ldr	x3, [x3,1144]
-	ldr	w3, [x3,x0]
-	ldr	w0, [x1,8]
-	cmp	w3, w0
-	beq	.L2164
-.L2163:
-	add	x0, x26, :lo12:.LANCHOR4
-	ldrh	w4, [x21,2918]
-	lsl	x4, x4, 2
-	ldr	x1, [x0,1136]
-	ldr	w3, [x1,x4]
-	cmn	w3, #1
-	beq	.L2164
-	adrp	x1, .LANCHOR2
-	ldr	w1, [x1,#:lo12:.LANCHOR2]
-	tbz	x1, 10, .L2165
-	ldr	x7, [x20,24]
-	ldr	x5, [x0,1144]
-	ldr	w0, [x7,12]
-	str	w0, [sp]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
-	ldr	w4, [x5,x4]
-	ldr	w6, [x7,4]
-	ldr	w5, [x7]
-	ldr	w1, [x20,40]
-	ldr	w7, [x7,8]
-	bl	printk
-.L2165:
-	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x23,80]
-	ldr	x0, [x19,600]
-	strh	wzr, [x0,x1,lsl 1]
-	mov	w0, -1
-	b	.L2166
-.L2164:
-	ldrh	w0, [x21,2918]
-	add	w22, w22, 1
-	add	w0, w0, 1
-	strh	w0, [x21,2918]
-	b	.L2168
-.L2181:
-	add	w24, w24, 1
-	b	.L2159
-.L2180:
-	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x19,2912]
-	add	w0, w0, 1
-	strh	w0, [x19,2912]
-	mov	w0, 0
-.L2166:
-	sub	sp, x29, #16
-	ldp	x19, x20, [sp,32]
-	ldp	x21, x22, [sp,48]
-	ldp	x23, x24, [sp,64]
-	ldp	x25, x26, [sp,80]
-	ldr	x27, [sp,96]
-	ldp	x29, x30, [sp,16]
-	add	sp, sp, 112
-	ret
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.align	2
 	.global	flash_prog_page
 	.type	flash_prog_page, %function
 flash_prog_page:
@@ -13090,24 +12941,24 @@ flash_prog_page:
 	add	x22, x19, x22, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x27, x23, 24, 2
-	tbz	x0, 4, .L2183
-	adrp	x0, .LC162
+	tbz	x0, 4, .L2157
+	adrp	x0, .LC161
 	mov	w2, w27
-	add	x0, x0, :lo12:.LC162
+	add	x0, x0, :lo12:.LC161
 	bl	printk
-.L2183:
+.L2157:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w27, .L2184
+	cbnz	w27, .L2158
 	bl	zftl_flash_enter_slc_mode
-	b	.L2185
-.L2184:
+	b	.L2159
+.L2158:
 	bl	zftl_flash_exit_slc_mode
-.L2185:
+.L2159:
 	ubfiz	x4, x20, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -13139,16 +12990,16 @@ flash_prog_page:
 	mov	w0, w20
 	and	w19, w21, 4
 	bl	nandc_de_cs
-	tbz	x21, 2, .L2186
+	tbz	x21, 2, .L2160
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2186
-	adrp	x0, .LC163
+	tbz	x0, 12, .L2160
+	adrp	x0, .LC162
 	mov	w1, w23
-	add	x0, x0, :lo12:.LC163
+	add	x0, x0, :lo12:.LC162
 	mov	w2, w19
 	bl	printk
-.L2186:
+.L2160:
 	mov	w0, w19
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -13169,13 +13020,13 @@ flash_test_blk:
 	uxtb	w22, w0
 	uxth	w20, w1
 	adrp	x19, .LANCHOR4
-	cbnz	w22, .L2197
+	cbnz	w22, .L2171
 	add	x0, x19, :lo12:.LANCHOR4
 	ldrb	w1, [x0,1266]
 	mov	w0, w22
 	cmp	w1, w20
-	bhi	.L2198
-.L2197:
+	bhi	.L2172
+.L2171:
 	add	x19, x19, :lo12:.LANCHOR4
 	mov	w1, 165
 	mov	w2, 32
@@ -13192,7 +13043,7 @@ flash_test_blk:
 	mov	w1, w21
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2203
+	beq	.L2177
 	adrp	x20, .LANCHOR2
 	ldr	x2, [x19,1248]
 	add	x20, x20, :lo12:.LANCHOR2
@@ -13203,7 +13054,7 @@ flash_test_blk:
 	ldrb	w4, [x20,9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2203
+	beq	.L2177
 	ldrb	w4, [x20,9]
 	mov	w0, w22
 	ldr	x2, [x19,1248]
@@ -13212,28 +13063,28 @@ flash_test_blk:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	w20, w0
-	beq	.L2203
+	beq	.L2177
 	ldr	x0, [x19,1248]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	bfi	w0, w0, 16, 16
 	cmp	w1, w0
-	bne	.L2203
+	bne	.L2177
 	ldr	x0, [x19,1256]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	bfi	w0, w0, 16, 16
 	cmp	w1, w0
 	csinv	w20, w20, wzr, eq
-	b	.L2200
-.L2203:
+	b	.L2174
+.L2177:
 	mov	w20, -1
-.L2200:
+.L2174:
 	mov	w0, w22
 	mov	w1, w21
 	bl	flash_erase_block
 	mov	w0, w20
-.L2198:
+.L2172:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -13295,28 +13146,28 @@ flash_start_tlc_page_prog:
 	mov	x23, x6
 	cmp	w0, w26
 	mov	x19, x4
-	bhi	.L2213
+	bhi	.L2187
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 648
-	add	x1, x1, 320
+	add	x1, x1, 296
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2213:
+.L2187:
 	add	x4, x19, :lo12:.LANCHOR0
 	add	x26, x4, x26, sxtw
 	ldrb	w26, [x26,736]
 	mov	w0, w26
 	ldr	x19, [x4,536]
 	bl	nandc_cs
-	cbz	w25, .L2214
+	cbz	w25, .L2188
 	sxtw	x1, w26
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 8
 	str	w25, [x1,8]
-.L2214:
+.L2188:
 	ubfiz	x7, x26, 8, 8
 	mov	w0, 128
 	add	x19, x19, x7
@@ -13422,16 +13273,16 @@ sblk_tlc_prog_one_page:
 	mov	x20, x0
 	ldr	x0, [x0]
 	ldr	w21, [x0,40]
-.L2220:
+.L2194:
 	mov	w0, w21
 	mov	w1, 1
 	bl	queue_lun_state
 	mov	w19, w0
-	cbz	w0, .L2222
+	cbz	w0, .L2196
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2220
-.L2222:
+	b	.L2194
+.L2196:
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	ldr	x21, [sp,32]
@@ -13454,17 +13305,17 @@ sblk_xlc_prog_pages:
 	ldr	x0, [x0]
 	mov	w24, w2
 	ldr	w20, [x0,40]
-.L2224:
+.L2198:
 	mov	w0, w20
 	mov	w1, 1
 	bl	queue_lun_state
-	cbz	w0, .L2228
+	cbz	w0, .L2202
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2224
-.L2228:
+	b	.L2198
+.L2202:
 	cmp	w24, 2
-	bne	.L2226
+	bne	.L2200
 	ldr	x6, [x19]
 	mov	w1, 1
 	ldr	x0, [x22]
@@ -13548,11 +13399,11 @@ sblk_xlc_prog_pages:
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x0, x0, 2835
 	bl	buf_add_tail
-	b	.L2227
-.L2226:
+	b	.L2201
+.L2200:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-.L2227:
+.L2201:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -13581,50 +13432,50 @@ flash_start_page_prog:
 	and	w20, w1, 2097151
 	ubfx	x23, x1, 24, 2
 	cmp	w0, w24
-	bhi	.L2230
+	bhi	.L2204
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 699
-	add	x1, x1, 352
+	add	x1, x1, 328
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2230:
+.L2204:
 	add	x28, x22, :lo12:.LANCHOR0
 	add	x0, x28, x24, sxtw
 	ldrb	w21, [x0,736]
 	ldr	x19, [x28,536]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2231
+	cbnz	w0, .L2205
 	ldrb	w0, [x28,633]
 	cmp	w0, 1
-	bne	.L2232
+	bne	.L2206
 	bl	nandc_wait_flash_ready
-	b	.L2231
-.L2232:
+	b	.L2205
+.L2206:
 	mov	w0, w24
 	mov	w1, w20
 	mov	w2, 64
 	bl	flash_wait_device_ready_raw
-.L2231:
+.L2205:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w23, .L2233
+	cbnz	w23, .L2207
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	ldrb	w0, [x22,#:lo12:.LANCHOR0]
-	cbz	w0, .L2234
+	cbz	w0, .L2208
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L2234
-.L2233:
+	b	.L2208
+.L2207:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-.L2234:
+.L2208:
 	ubfiz	x4, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -13674,28 +13525,28 @@ queue_prog_cmd:
 	add	x1, x0, :lo12:.LANCHOR0
 	ldrb	w2, [x1,2835]
 	cmp	w2, 255
-	beq	.L2239
+	beq	.L2213
 	ubfx	x4, x4, 21, 3
 	add	x1, x1, 784
-.L2241:
+.L2215:
 	add	x3, x1, x2, lsl 6
 	ldr	w5, [x3,40]
 	ubfx	x5, x5, 21, 3
 	cmp	w4, w5
-	bne	.L2240
+	bne	.L2214
 	ldrb	w5, [x3,58]
 	add	x3, x3, 48
 	cmp	w5, 6
-	bne	.L2240
+	bne	.L2214
 	mov	w1, 3
 	strb	w1, [x3,10]
-	b	.L2239
-.L2240:
+	b	.L2213
+.L2214:
 	lsl	x2, x2, 6
 	ldrb	w2, [x1,x2]
 	cmp	w2, 255
-	bne	.L2241
-.L2239:
+	bne	.L2215
+.L2213:
 	mov	w1, 3
 	strb	w1, [x19,58]
 	mov	w1, 1
@@ -13724,63 +13575,63 @@ sblk_prog_page:
 	mov	x19, x0
 	uxtb	w20, w1
 	ldrh	w0, [x0,50]
-	cbz	w0, .L2247
+	cbz	w0, .L2221
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2247
-	adrp	x0, .LC164
+	tbz	x0, 8, .L2221
+	adrp	x0, .LC163
 	ldr	w1, [x19,40]
-	add	x0, x0, :lo12:.LC164
+	add	x0, x0, :lo12:.LC163
 	mov	w2, w20
 	bl	printk
-.L2247:
+.L2221:
 	adrp	x24, .LANCHOR0
 	adrp	x25, .LC0
 	add	x23, x24, :lo12:.LANCHOR0
 	mov	w21, 0
 	add	x27, x23, 784
 	add	x25, x25, :lo12:.LC0
-.L2248:
-	cbz	w20, .L2278
+.L2222:
+	cbz	w20, .L2252
 	ldrb	w26, [x19]
 	ldr	w22, [x19,40]
-.L2249:
+.L2223:
 	mov	w0, w22
 	mov	w1, 1
 	bl	queue_lun_state
-	cbz	w0, .L2279
+	cbz	w0, .L2253
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2249
-.L2279:
+	b	.L2223
+.L2253:
 	cmp	w20, 1
-	beq	.L2251
+	beq	.L2225
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrb	w0, [x0,781]
-	cbnz	w0, .L2252
-.L2251:
+	cbnz	w0, .L2226
+.L2225:
 	mov	x0, x19
 	bl	queue_prog_cmd
-	b	.L2253
-.L2252:
+	b	.L2227
+.L2226:
 	ldrb	w0, [x19]
 	ubfx	x28, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2254
+	bne	.L2228
 	adrp	x1, .LANCHOR3
 	mov	w2, 546
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	x0, x25
-	add	x1, x1, 376
+	add	x1, x1, 352
 	bl	printk
 	bl	dump_stack
-.L2254:
+.L2228:
 	ldrb	w0, [x19]
 	add	x0, x27, x0, lsl 6
 	ldr	w4, [x0,40]
 	ubfx	x0, x4, 21, 3
 	cmp	w28, w0
-	bne	.L2255
+	bne	.L2229
 	ldrh	w3, [x23,3340]
 	mov	w1, 21
 	ldrb	w6, [x23,3338]
@@ -13801,13 +13652,13 @@ sblk_prog_page:
 	and	w0, w1, w5
 	cmp	w0, w3
 	uxth	w2, w2
-	beq	.L2255
+	beq	.L2229
 	and	w22, w2, w22
 	and	w2, w2, w4
 	cmp	w22, w2
-	bne	.L2255
+	bne	.L2229
 	cmp	w21, w6
-	beq	.L2255
+	beq	.L2229
 	ldr	w1, [x19,40]
 	mov	w0, 17
 	ldr	x2, [x19,8]
@@ -13822,20 +13673,20 @@ sblk_prog_page:
 	strb	w0, [x19]
 	add	x0, x23, 2835
 	bl	buf_add_tail
-	b	.L2253
-.L2255:
+	b	.L2227
+.L2229:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-.L2253:
+.L2227:
 	subs	w20, w20, #1
-	beq	.L2278
+	beq	.L2252
 	add	x19, x24, :lo12:.LANCHOR0
 	sbfiz	x26, x26, 6, 32
 	add	x19, x19, 784
 	add	x19, x19, x26
-	b	.L2248
-.L2278:
+	b	.L2222
+.L2252:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -13857,13 +13708,13 @@ ftl_flush:
 	mov	x19, x2
 	adrp	x20, .LANCHOR4
 	ldrb	w1, [x0,2857]
-	cbz	w1, .L2281
+	cbz	w1, .L2255
 	add	x2, x20, :lo12:.LANCHOR4
 	add	x0, x0, 784
 	ldrb	w2, [x2,1267]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2281:
+.L2255:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR4
 	mov	w0, -1
@@ -13885,15 +13736,15 @@ zftl_cache_flush:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+2857]
-	cbz	w0, .L2285
+	cbz	w0, .L2259
 	bl	timer_get_time
 	adrp	x1, .LANCHOR4+1268
 	ldr	w1, [x1,#:lo12:.LANCHOR4+1268]
 	add	w1, w1, 100
 	cmp	w0, w1
-	bls	.L2285
+	bls	.L2259
 	bl	ftl_flush
-.L2285:
+.L2259:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	zftl_cache_flush, .-zftl_cache_flush
@@ -13920,50 +13771,50 @@ flash_prog_page_en:
 	cmp	w0, w21
 	ubfx	x28, x20, 24, 2
 	mov	x19, x6
-	bhi	.L2290
+	bhi	.L2264
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 473
-	add	x1, x1, 392
+	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2290:
+.L2264:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w26, w20
 	add	x1, x0, x21, sxtw
 	ldrb	w27, [x1,736]
-	cbnz	w28, .L2291
+	cbnz	w28, .L2265
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1,#:lo12:.LANCHOR0]
-	cbz	w1, .L2292
+	cbz	w1, .L2266
 	ldrb	w0, [x0,1]
-	cbz	w0, .L2291
-.L2292:
+	cbz	w0, .L2265
+.L2266:
 	add	x6, x19, :lo12:.LANCHOR0
 	ldrh	w26, [x6,2]
 	ldrb	w1, [x6,1]
 	udiv	w2, w20, w26
 	mul	w26, w2, w26
 	sub	w0, w20, w26
-	cbz	w1, .L2293
+	cbz	w1, .L2267
 	add	w26, w26, w0, lsl 1
-	b	.L2291
-.L2293:
+	b	.L2265
+.L2267:
 	add	x6, x6, 4
 	ldrh	w0, [x6,w0,uxtw 1]
 	add	w26, w0, w26
-.L2291:
+.L2265:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L2294
-	adrp	x0, .LC165
+	tbz	x0, 4, .L2268
+	adrp	x0, .LC164
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC165
+	add	x0, x0, :lo12:.LC164
 	mov	w2, w20
 	bl	printk
-.L2294:
+.L2268:
 	mov	w1, w26
 	mov	w0, w27
 	mov	x2, x23
@@ -13971,7 +13822,7 @@ flash_prog_page_en:
 	mov	w4, w24
 	bl	flash_prog_page
 	mov	w26, w0
-	cbz	w25, .L2295
+	cbz	w25, .L2269
 	adrp	x19, .LANCHOR4
 	mov	w0, w21
 	add	x25, x19, :lo12:.LANCHOR4
@@ -13981,53 +13832,53 @@ flash_prog_page_en:
 	ldr	x3, [x25,1256]
 	bl	flash_read_page_en
 	cmp	w0, 512
-	beq	.L2296
+	beq	.L2270
 	cmn	w0, #1
-	beq	.L2296
+	beq	.L2270
 	ldr	x0, [x25,1248]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2296
+	bne	.L2270
 	ldr	x0, [x25,1256]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2295
-.L2296:
+	beq	.L2269
+.L2270:
 	add	x19, x19, :lo12:.LANCHOR4
 	mov	w2, 4
-	adrp	x0, .LC166
+	adrp	x0, .LC165
 	mov	w3, w2
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC165
 	ldr	x1, [x19,1256]
 	bl	rknand_print_hex
 	mov	w2, 4
-	adrp	x0, .LC167
+	adrp	x0, .LC166
 	ldr	x1, [x19,1248]
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC166
 	mov	w3, w2
 	bl	rknand_print_hex
-	b	.L2297
-.L2295:
+	b	.L2271
+.L2269:
 	cmn	w26, #1
 	mov	w0, w26
-	bne	.L2298
-.L2297:
-	adrp	x0, .LC168
+	bne	.L2272
+.L2271:
+	adrp	x0, .LC167
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	printk
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 499
-	add	x1, x1, 392
+	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
 	mov	w0, -1
-.L2298:
+.L2272:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -14058,20 +13909,20 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	cmn	w0, #1
 	mov	w19, w0
-	bne	.L2312
+	bne	.L2286
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
-	add	x1, x1, 416
+	add	x1, x1, 392
 	mov	w2, 2151
 	bl	printk
 	bl	dump_stack
-	adrp	x0, .LC168
+	adrp	x0, .LC167
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	printk
-.L2312:
+.L2286:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 64
@@ -14096,15 +13947,15 @@ ftl_info_flush:
 	adrp	x23, .LANCHOR3
 	add	x19, x22, :lo12:.LANCHOR4
 	ldrb	w2, [x0,2832]
-	adrp	x24, .LC169
+	adrp	x24, .LC168
 	add	x23, x23, :lo12:.LANCHOR3
 	add	x0, x19, 1280
 	lsl	w2, w2, 1
 	mov	w25, 0
-	add	x24, x24, :lo12:.LC169
-	add	x23, x23, 432
+	add	x24, x24, :lo12:.LC168
+	add	x23, x23, 408
 	bl	ftl_memset
-.L2314:
+.L2288:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w27, [x19,1536]
 	ldrh	w20, [x19,1538]
@@ -14119,29 +13970,29 @@ ftl_info_flush:
 	str	w0, [x19,1284]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2315
+	tbz	x0, 12, .L2289
 	ldr	w3, [x3,4]
 	mov	x0, x24
 	mov	w1, w27
 	mov	w2, w20
 	bl	printk
-.L2315:
+.L2289:
 	add	x1, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x19,1538]
 	ldrh	w1, [x1,3300]
 	cmp	w1, w0
-	bhi	.L2316
+	bhi	.L2290
 	adrp	x20, .LC0
 	add	x20, x20, :lo12:.LC0
-.L2321:
+.L2295:
 	ldrb	w1, [x19,1537]
 	add	w1, w1, 1
 	uxtb	w1, w1
 	strb	w1, [x19,1537]
 	cmp	w1, 7
-	bls	.L2317
+	bls	.L2291
 	mov	x1, 0
-.L2320:
+.L2294:
 	add	x0, x21, :lo12:.LANCHOR0
 	uxth	w25, w1
 	ldr	x2, [x0,728]
@@ -14151,24 +14002,24 @@ ftl_info_flush:
 	add	w0, w2, 127
 	uxtb	w0, w0
 	cmp	w0, 125
-	bhi	.L2318
+	bhi	.L2292
 	mov	x1, x23
 	mov	w2, 742
 	mov	x0, x20
 	bl	printk
 	bl	dump_stack
-	b	.L2319
-.L2318:
+	b	.L2293
+.L2292:
 	cmp	w2, 255
-	bne	.L2319
+	bne	.L2293
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L2320
+	bne	.L2294
 	mov	w25, w1
-.L2319:
+.L2293:
 	strb	w25, [x19,1537]
 	mov	w25, 1
-.L2317:
+.L2291:
 	add	x27, x21, :lo12:.LANCHOR0
 	ldrb	w1, [x19,1537]
 	ldr	x0, [x27,728]
@@ -14176,7 +14027,7 @@ ftl_info_flush:
 	ldrb	w2, [x1,40]
 	strb	w2, [x19,1536]
 	cmp	w2, 255
-	beq	.L2321
+	beq	.L2295
 	ldrh	w20, [x27,3350]
 	mov	w0, 0
 	mul	w20, w2, w20
@@ -14191,13 +14042,13 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19,1538]
-	b	.L2322
-.L2316:
+	b	.L2296
+.L2290:
 	madd	w20, w27, w28, w20
-	cbnz	w0, .L2322
+	cbnz	w0, .L2296
 	mov	w1, w20
 	bl	flash_erase_block
-.L2322:
+.L2296:
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w0, 0
@@ -14210,41 +14061,41 @@ ftl_info_flush:
 	adrp	x0, .LANCHOR5
 	add	w1, w1, 1
 	strh	w1, [x19,1538]
-	beq	.L2323
+	beq	.L2297
 	add	x1, x0, :lo12:.LANCHOR5
 	ldrb	w1, [x1,576]
-	cbz	w1, .L2324
-.L2323:
+	cbz	w1, .L2298
+.L2297:
 	add	x0, x0, :lo12:.LANCHOR5
 	strb	wzr, [x0,576]
-	b	.L2314
-.L2324:
-	cbnz	w25, .L2325
-.L2333:
+	b	.L2288
+.L2298:
+	cbnz	w25, .L2299
+.L2307:
 	add	x22, x22, :lo12:.LANCHOR4
 	ldrb	w0, [x22,1536]
 	cmp	w0, 255
-	bne	.L2327
+	bne	.L2301
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 778
-	add	x1, x1, 432
+	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L2327
-.L2325:
+	b	.L2301
+.L2299:
 	ldrb	w19, [x19,1537]
 	adrp	x20, .LANCHOR3
 	adrp	x23, .LC0
 	add	x20, x20, :lo12:.LANCHOR3
 	add	w19, w19, 1
 	add	x23, x23, :lo12:.LC0
-	add	x20, x20, 432
-.L2328:
+	add	x20, x20, 408
+.L2302:
 	cmp	w19, 7
-	bhi	.L2333
+	bhi	.L2307
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x1, [x0,728]
 	add	w0, w19, 8
@@ -14253,27 +14104,27 @@ ftl_info_flush:
 	add	w0, w24, 127
 	uxtb	w0, w0
 	cmp	w0, 125
-	bhi	.L2329
+	bhi	.L2303
 	mov	x1, x20
 	mov	w2, 771
 	mov	x0, x23
 	bl	printk
 	bl	dump_stack
-	b	.L2330
-.L2329:
+	b	.L2304
+.L2303:
 	cmp	w24, 255
-	beq	.L2331
-.L2330:
+	beq	.L2305
+.L2304:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0,3350]
 	mov	w0, 0
 	mul	w1, w24, w1
 	bl	flash_erase_block
-.L2331:
+.L2305:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2328
-.L2327:
+	b	.L2302
+.L2301:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -14312,10 +14163,10 @@ ftl_info_blk_init:
 	str	x1, [x23,2864]
 	mov	w1, 0
 	str	x24, [x23,584]
-	adrp	x26, .LC170
+	adrp	x26, .LC169
 	adrp	x27, .LANCHOR2
 	bl	ftl_memset
-	add	x26, x26, :lo12:.LC170
+	add	x26, x26, :lo12:.LC169
 	add	x0, x20, 640
 	mov	w1, 0
 	mov	w2, 16384
@@ -14327,7 +14178,7 @@ ftl_info_blk_init:
 	strh	wzr, [x22,1538]
 	ldrb	w0, [x0,40]
 	strb	w0, [x22,1536]
-.L2351:
+.L2325:
 	add	x5, x19, :lo12:.LANCHOR0
 	add	w0, w20, 8
 	sxth	w25, w20
@@ -14335,7 +14186,7 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w1, [x0,32]
 	cmp	w1, 255
-	beq	.L2347
+	beq	.L2321
 	ldrh	w22, [x5,3350]
 	mov	w0, 0
 	ldrb	w4, [x5,2832]
@@ -14348,7 +14199,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	mov	w28, w0
 	ldr	x5, [x29,104]
-	bne	.L2348
+	bne	.L2322
 	ldrb	w4, [x5,2832]
 	mov	w0, 0
 	add	w1, w22, 1
@@ -14356,9 +14207,9 @@ ftl_info_blk_init:
 	mov	x3, x23
 	bl	ftl_read_page
 	mov	w28, w0
-.L2348:
+.L2322:
 	ldr	w0, [x27,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2349
+	tbz	x0, 12, .L2323
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w2, w28
@@ -14367,39 +14218,39 @@ ftl_info_blk_init:
 	mov	x0, x26
 	ldr	w4, [x4]
 	bl	printk
-.L2349:
+.L2323:
 	cmn	w28, #1
-	beq	.L2347
+	beq	.L2321
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldr	w1, [x0]
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	cmp	w1, w0
-	beq	.L2359
-.L2347:
+	beq	.L2333
+.L2321:
 	sub	w20, w20, #1
 	cmn	w20, #1
-	bne	.L2351
+	bne	.L2325
 	mov	w25, 0
-	b	.L2350
-.L2359:
+	b	.L2324
+.L2333:
 	mov	w20, w25
-.L2350:
+.L2324:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2352
+	tbz	x0, 12, .L2326
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w2, 4800
 	ldr	x3, [x0,2864]
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldr	w3, [x3]
 	bl	printk
-.L2352:
+.L2326:
 	cmn	w20, #1
-	bne	.L2353
+	bne	.L2327
 	add	x0, x21, :lo12:.LANCHOR4
 	mov	w1, 0
 	add	x19, x19, :lo12:.LANCHOR0
@@ -14410,13 +14261,13 @@ ftl_info_blk_init:
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	str	w0, [x1]
-	mov	w0, 8
+	mov	w0, 9
 	movk	w0, 0x6, lsl 16
 	ldr	x1, [x19,2864]
 	str	w0, [x1,12]
 	mov	w0, w20
-	b	.L2354
-.L2353:
+	b	.L2328
+.L2327:
 	add	x26, x19, :lo12:.LANCHOR0
 	add	x23, x21, :lo12:.LANCHOR4
 	add	w0, w25, 8
@@ -14438,8 +14289,8 @@ ftl_info_blk_init:
 	ldrb	w0, [x23,1536]
 	ldrh	w23, [x26,3350]
 	mul	w23, w0, w23
-.L2355:
-	tbnz	w22, #31, .L2358
+.L2329:
+	tbnz	w22, #31, .L2332
 	add	x26, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	add	w1, w22, w23
@@ -14448,14 +14299,14 @@ ftl_info_blk_init:
 	ldrb	w4, [x26,2832]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2356
+	beq	.L2330
 	ldr	x0, [x26,2864]
 	ldr	w1, [x0]
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	cmp	w1, w0
-	bne	.L2356
-.L2358:
+	bne	.L2330
+.L2332:
 	add	x21, x21, :lo12:.LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR0
 	strh	w20, [x21,1538]
@@ -14469,12 +14320,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2354
-.L2356:
+	b	.L2328
+.L2330:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L2355
-.L2354:
+	b	.L2329
+.L2328:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -14501,30 +14352,30 @@ ftl_ext_info_flush:
 	ldr	x1, [x1,608]
 	ldr	w3, [x1,520]
 	cmp	w0, w3
-	bls	.L2377
+	bls	.L2351
 	ldr	w2, [x1,12]
 	sub	w2, w2, w3
 	add	w2, w2, w0
 	str	w2, [x1,12]
-	b	.L2390
-.L2377:
-	bcs	.L2378
-.L2390:
+	b	.L2364
+.L2351:
+	bcs	.L2352
+.L2364:
 	str	w0, [x1,520]
-.L2378:
+.L2352:
 	adrp	x23, .LANCHOR3
 	adrp	x19, .LANCHOR4
 	add	x23, x23, :lo12:.LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR4
 	mov	w0, 0
-	add	x23, x23, 448
+	add	x23, x23, 424
 	add	x19, x19, 1280
 	bl	ftl_total_vpn_update
-.L2379:
+.L2353:
 	adrp	x24, .LANCHOR5
 	add	x24, x24, :lo12:.LANCHOR5
 	add	x25, x24, 640
-.L2382:
+.L2356:
 	add	x2, x22, :lo12:.LANCHOR0
 	ldr	x0, [x2,2864]
 	ldr	w1, [x0,56]
@@ -14533,22 +14384,22 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0,140]
 	ldrh	w0, [x2,3300]
 	cmp	w1, w0
-	bcc	.L2380
+	bcc	.L2354
 	bl	ftl_ext_alloc_new_blk
-.L2380:
+.L2354:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2381
+	bne	.L2355
 	adrp	x0, .LC0
 	mov	x1, x23
 	mov	w2, 1747
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2381:
+.L2355:
 	add	x21, x22, :lo12:.LANCHOR0
 	mov	w0, 21
 	mov	w1, 1
@@ -14585,17 +14436,17 @@ ftl_ext_info_flush:
 	uxth	w1, w1
 	strh	w1, [x2,140]
 	cmp	w1, 1
-	beq	.L2382
+	beq	.L2356
 	cmn	w0, #1
-	beq	.L2383
+	beq	.L2357
 	ldrb	w0, [x24,578]
-	cbz	w0, .L2384
-.L2383:
+	cbz	w0, .L2358
+.L2357:
 	adrp	x0, .LANCHOR5
 	add	x0, x0, :lo12:.LANCHOR5
 	strb	wzr, [x0,578]
-	b	.L2379
-.L2384:
+	b	.L2353
+.L2358:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -14642,26 +14493,26 @@ ftl_ext_info_init:
 	adrp	x0, .LANCHOR2
 	mov	w23, w24
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2392
+	tbz	x0, 12, .L2366
 	ldr	x5, [x26,2864]
 	adrp	x1, .LANCHOR3
-	adrp	x0, .LC172
+	adrp	x0, .LC171
 	add	x1, x1, :lo12:.LANCHOR3
-	add	x0, x0, :lo12:.LC172
-	add	x1, x1, 472
+	add	x0, x0, :lo12:.LC171
+	add	x1, x1, 448
 	ldrh	w5, [x5,130]
 	mov	w2, 1791
 	mov	w3, w24
 	uxth	w4, w27
 	bl	printk
-.L2392:
+.L2366:
 	add	x20, x20, :lo12:.LANCHOR5
 	add	x21, x21, :lo12:.LANCHOR4
 	mov	w26, w24
 	add	x20, x20, 640
 	add	x21, x21, 1280
-.L2393:
-	tbnz	w26, #31, .L2398
+.L2367:
+	tbnz	w26, #31, .L2372
 	add	x27, x19, :lo12:.LANCHOR0
 	mov	w0, w25
 	mov	x2, x20
@@ -14671,31 +14522,31 @@ ftl_ext_info_init:
 	madd	w1, w22, w1, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	beq	.L2394
+	beq	.L2368
 	cmn	w0, #1
-	beq	.L2394
+	beq	.L2368
 	ldr	x0, [x27,608]
 	ldr	w1, [x0]
 	mov	w0, 20038
 	movk	w0, 0x4549, lsl 16
 	cmp	w1, w0
-	bne	.L2394
-.L2398:
+	bne	.L2368
+.L2372:
 	bl	zftl_sblk_list_init
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,140]
 	cmp	w1, w24
-	bgt	.L2396
+	bgt	.L2370
 	add	w23, w23, 1
 	strh	w23, [x0,140]
 	bl	ftl_ext_info_flush
-	b	.L2396
-.L2394:
+	b	.L2370
+.L2368:
 	sub	w26, w26, #1
 	sxth	w26, w26
-	b	.L2393
-.L2396:
+	b	.L2367
+.L2370:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x20, [x19,608]
 	bl	timer_get_time
@@ -14756,13 +14607,13 @@ ftl_write_last_log_page:
 	ldrh	w24, [x0,12]
 	cmp	w1, 1
 	ldr	x22, [x19,3872]
-	bne	.L2410
+	bne	.L2384
 	mov	x20, x0
 	bl	ftl_get_new_free_page
 	cmn	w0, #1
 	mov	w23, w0
 	mov	w21, 0
-	beq	.L2410
+	beq	.L2384
 	ldrh	w0, [x20]
 	add	x22, x22, x24, uxth 2
 	bl	ftl_vpn_decrement
@@ -14787,7 +14638,7 @@ ftl_write_last_log_page:
 	str	w21, [x2,8]
 	str	w21, [x2,12]
 	bl	ftl_prog_ppa_page
-.L2410:
+.L2384:
 	mov	w0, w21
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -14810,34 +14661,34 @@ ftl_open_sblk_recovery:
 	stp	x21, x22, [sp,32]
 	stp	x25, x26, [sp,64]
 	mov	x27, x1
-	tbz	x0, 12, .L2415
-	adrp	x0, .LC173
+	tbz	x0, 12, .L2389
+	adrp	x0, .LC172
 	ldrh	w1, [x19,2]
-	add	x0, x0, :lo12:.LC173
+	add	x0, x0, :lo12:.LC172
 	bl	printk
-.L2415:
+.L2389:
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2416
-	adrp	x0, .LC174
+	tbz	x0, 12, .L2390
+	adrp	x0, .LC173
 	ldrb	w1, [x19,5]
-	add	x0, x0, :lo12:.LC174
+	add	x0, x0, :lo12:.LC173
 	bl	printk
-.L2416:
+.L2390:
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2417
-	adrp	x0, .LC175
+	tbz	x0, 12, .L2391
+	adrp	x0, .LC174
 	ldrh	w1, [x19]
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC174
 	bl	printk
-.L2417:
+.L2391:
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2418
-	adrp	x0, .LC176
+	tbz	x0, 12, .L2392
+	adrp	x0, .LC175
 	ldrh	w1, [x19,16]
 	ldrh	w2, [x19,18]
-	add	x0, x0, :lo12:.LC176
+	add	x0, x0, :lo12:.LC175
 	bl	printk
-.L2418:
+.L2392:
 	ldrh	w0, [x19,10]
 	adrp	x21, .LANCHOR0
 	strh	w0, [x19,14]
@@ -14845,7 +14696,7 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19]
 	ldrh	w0, [x0,576]
 	cmp	w1, w0
-	bcs	.L2414
+	bcs	.L2388
 	mov	w0, 1
 	adrp	x25, .LANCHOR4
 	adrp	x26, .LANCHOR3
@@ -14855,25 +14706,25 @@ ftl_open_sblk_recovery:
 	ldrb	w22, [x19,5]
 	mov	x20, x0
 	ldrh	w23, [x19,2]
-	add	x0, x26, 496
+	add	x0, x26, 472
 	mov	w28, 0
 	add	x25, x25, 1280
 	str	x0, [x29,120]
-.L2421:
+.L2395:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0,3300]
 	cmp	w0, w23
-	bls	.L2424
+	bls	.L2398
 	ldrb	w22, [x19,5]
-.L2422:
+.L2396:
 	ldrb	w0, [x19,9]
 	cmp	w0, w22
-	bls	.L2498
+	bls	.L2472
 	add	x0, x19, x22, sxtw 1
 	ldrh	w0, [x0,16]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2423
+	beq	.L2397
 	add	x3, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20,24]
 	ldrh	w1, [x3,3350]
@@ -14883,21 +14734,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	mov	w26, w0
-	beq	.L2424
+	beq	.L2398
 	cmn	w0, #1
-	beq	.L2425
+	beq	.L2399
 	ldr	x0, [x20,24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2425
+	bne	.L2399
 	ldr	w0, [x0,4]
 	cmn	w0, #1
-	bne	.L2425
+	bne	.L2399
 	ldr	x0, [x20,8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2424
-.L2425:
+	beq	.L2398
+.L2399:
 	adrp	x0, .LANCHOR5+577
 	mov	w1, 1
 	strb	w1, [x0,#:lo12:.LANCHOR5+577]
@@ -14905,14 +14756,14 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19,10]
 	madd	w0, w23, w0, w22
 	cmp	w1, w0
-	beq	.L2426
+	beq	.L2400
 	adrp	x0, .LC0
 	ldr	x1, [x29,120]
 	mov	w2, 1396
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2426:
+.L2400:
 	ldrh	w0, [x19,10]
 	ldrh	w1, [x19,6]
 	ldrb	w2, [x19,9]
@@ -14921,28 +14772,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x0,3300]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2427
+	beq	.L2401
 	adrp	x0, .LC0
 	ldr	x1, [x29,120]
 	mov	w2, 1397
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2427:
+.L2401:
 	cmn	w26, #1
-	beq	.L2431
+	beq	.L2405
 	ldr	x0, [x20,24]
 	ldr	w0, [x0,4]
 	cmn	w0, #1
-	beq	.L2431
+	beq	.L2405
 	bl	lpa_hash_get_ppa
-	cbz	x27, .L2429
+	cbz	x27, .L2403
 	ldr	x2, [x20,24]
 	ldr	w3, [x2,8]
 	cmp	w0, w3
-	beq	.L2429
+	beq	.L2403
 	cmn	w0, #1
-	beq	.L2429
+	beq	.L2403
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w5, 21
 	mov	w28, 1
@@ -14956,7 +14807,7 @@ ftl_open_sblk_recovery:
 	udiv	w3, w3, w1
 	ldrh	w1, [x27]
 	cmp	w1, w3, uxth
-	bne	.L2429
+	bne	.L2403
 	ldr	w6, [x2]
 	mov	x2, x25
 	ldrb	w3, [x4,2832]
@@ -14970,11 +14821,11 @@ ftl_open_sblk_recovery:
 	ldr	x4, [x29,112]
 	cmp	w0, w6
 	ldr	x5, [x29,96]
-	bcc	.L2429
+	bcc	.L2403
 	ldr	x0, [x20,24]
 	ldr	w1, [x0,8]
 	cmn	w1, #1
-	beq	.L2431
+	beq	.L2405
 	ldrh	w0, [x4,3340]
 	sub	w5, w5, w0
 	lsr	w1, w1, w0
@@ -14984,22 +14835,22 @@ ftl_open_sblk_recovery:
 	and	w1, w28, w1
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
-	b	.L2431
-.L2429:
+	b	.L2405
+.L2403:
 	ldr	x2, [x20,24]
 	add	x1, x21, :lo12:.LANCHOR0
 	ldr	w3, [x2,4]
 	ldr	w0, [x1,2840]
 	cmp	w3, w0
-	bcs	.L2431
+	bcs	.L2405
 	ldrb	w0, [x19,9]
 	ldrh	w4, [x1,3300]
 	ldrh	w3, [x19,10]
 	mul	w0, w0, w4
 	sub	w0, w0, #1
 	cmp	w3, w0
-	blt	.L2499
-.L2431:
+	blt	.L2473
+.L2405:
 	ldrh	w0, [x19,6]
 	mov	w28, 1
 	sub	w0, w0, #1
@@ -15007,16 +14858,16 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x19,10]
 	add	w0, w0, 1
 	strh	w0, [x19,10]
-.L2423:
+.L2397:
 	add	w22, w22, 1
 	uxth	w22, w22
-	b	.L2422
-.L2498:
+	b	.L2396
+.L2472:
 	add	w23, w23, 1
 	strb	wzr, [x19,5]
 	uxth	w23, w23
-	b	.L2421
-.L2424:
+	b	.L2395
+.L2398:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x19,10]
 	ldrh	w1, [x19,6]
@@ -15027,35 +14878,35 @@ ftl_open_sblk_recovery:
 	strb	w22, [x19,5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2435
+	beq	.L2409
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 1473
-	add	x1, x1, 496
+	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2435:
+.L2409:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w3, [x19,10]
 	ldr	x4, [x0,3872]
 	mov	w0, 0
 	mov	w2, w0
-.L2436:
+.L2410:
 	cmp	w2, w3
-	bcs	.L2500
+	bcs	.L2474
 	ldrh	w1, [x19,12]
 	add	w1, w2, w1
 	ldr	w1, [x4,x1,lsl 2]
 	cmn	w1, #1
-	beq	.L2437
+	beq	.L2411
 	add	w1, w0, 1
 	uxth	w0, w1
-.L2437:
+.L2411:
 	add	w2, w2, 1
-	b	.L2436
-.L2500:
+	b	.L2410
+.L2474:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrb	w1, [x19,9]
 	sub	w0, w0, w3
@@ -15063,44 +14914,44 @@ ftl_open_sblk_recovery:
 	madd	w0, w1, w22, w0
 	uxth	w22, w0
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2439
+	tbz	x0, 12, .L2413
 	ldrh	w1, [x19]
-	adrp	x0, .LC177
+	adrp	x0, .LC176
 	ldr	x4, [x2,600]
-	add	x0, x0, :lo12:.LC177
+	add	x0, x0, :lo12:.LC176
 	ubfiz	x3, x1, 1, 16
 	mov	w2, w22
 	ldrh	w3, [x4,x3]
 	bl	printk
-.L2439:
+.L2413:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x19]
-	adrp	x23, .LC178
+	adrp	x23, .LC177
 	mov	w25, -1
-	add	x23, x23, :lo12:.LC178
+	add	x23, x23, :lo12:.LC177
 	ldr	x0, [x0,600]
 	strh	w22, [x0,x1,lsl 1]
 	mov	x0, x20
 	mov	w22, 0
 	bl	buf_free
-.L2440:
+.L2414:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x2,3276]
 	cmp	w22, w0, lsl 1
-	bcs	.L2501
-	cbz	w28, .L2441
+	bcs	.L2475
+	cbz	w28, .L2415
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bls	.L2441
+	bls	.L2415
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w26, w0
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2442
+	tbz	x0, 12, .L2416
 	mov	x0, x23
 	mov	w1, w26
 	bl	printk
-.L2442:
+.L2416:
 	add	x3, x21, :lo12:.LANCHOR0
 	ldr	x0, [x20,24]
 	ldr	x1, [x3,2864]
@@ -15121,10 +14972,10 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x19]
 	bl	ftl_vpn_decrement
-.L2441:
+.L2415:
 	add	w22, w22, 1
-	b	.L2440
-.L2501:
+	b	.L2414
+.L2475:
 	ldrh	w1, [x2,3300]
 	ldrh	w0, [x19,12]
 	ldrb	w3, [x19,9]
@@ -15134,30 +14985,30 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x2,3872]
 	ldr	w0, [x1,x0]
 	cmn	w0, #1
-	beq	.L2444
+	beq	.L2418
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 1503
-	add	x1, x1, 496
+	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2444:
+.L2418:
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bne	.L2414
+	bne	.L2388
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-	b	.L2414
-.L2499:
+	b	.L2388
+.L2473:
 	ldr	x0, [x1,2864]
 	ldr	w2, [x2]
 	ldr	w1, [x0,8]
 	cmp	w2, w1
-	bls	.L2432
+	bls	.L2406
 	str	w2, [x0,8]
-.L2432:
+.L2406:
 	ldr	x1, [x20,24]
 	ldrh	w0, [x19,10]
 	ldrh	w2, [x19,12]
@@ -15165,8 +15016,8 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x1,4]
 	ldr	w1, [x1,8]
 	bl	lpa_hash_update_ppa
-	b	.L2431
-.L2414:
+	b	.L2405
+.L2388:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -15193,8 +15044,8 @@ pm_write_page:
 	mov	x24, x1
 	adrp	x25, .LANCHOR0
 	add	x23, x23, :lo12:.LC0
-	add	x22, x22, 520
-.L2503:
+	add	x22, x22, 496
+.L2477:
 	add	x2, x25, :lo12:.LANCHOR0
 	adrp	x19, .LANCHOR0
 	ldr	x0, [x2,2864]
@@ -15204,28 +15055,28 @@ pm_write_page:
 	str	w1, [x0,48]
 	ldrh	w1, [x2,3300]
 	cmp	w3, w1
-	bcs	.L2504
+	bcs	.L2478
 	ldrh	w1, [x0,692]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2505
-.L2504:
+	bne	.L2479
+.L2478:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2505:
+.L2479:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,692]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2506
+	bne	.L2480
 	mov	x1, x22
 	mov	w2, 230
 	mov	x0, x23
 	bl	printk
 	bl	dump_stack
-.L2506:
+.L2480:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x20, .LANCHOR7
 	add	x27, x20, :lo12:.LANCHOR7
@@ -15257,28 +15108,28 @@ pm_write_page:
 	uxth	w2, w2
 	strh	w2, [x1,696]
 	cmp	w2, 1
-	beq	.L2507
+	beq	.L2481
 	ldrb	w2, [x27,-120]
-	cbz	w2, .L2508
-.L2507:
+	cbz	w2, .L2482
+.L2481:
 	add	x20, x20, :lo12:.LANCHOR7
 	strb	wzr, [x20,-120]
-	b	.L2503
-.L2508:
+	b	.L2477
+.L2482:
 	cmn	w0, #1
-	bne	.L2510
-	adrp	x0, .LC179
+	bne	.L2484
+	adrp	x0, .LC178
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC179
+	add	x0, x0, :lo12:.LC178
 	bl	printk
-	b	.L2503
-.L2510:
+	b	.L2477
+.L2484:
 	ldrh	w0, [x1,698]
 	cmp	w21, w0
-	bcs	.L2511
+	bcs	.L2485
 	add	x21, x1, x21, uxtw 2
 	str	w26, [x21,704]
-.L2511:
+.L2485:
 	mov	w0, 0
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -15301,31 +15152,31 @@ flash_info_flush:
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-	tbz	x0, 12, .L2516
+	tbz	x0, 12, .L2490
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 251
-	add	x2, x2, 536
+	add	x2, x2, 512
 	bl	printk
-.L2516:
+.L2490:
 	adrp	x22, .LANCHOR4
 	adrp	x23, .LANCHOR0
 	add	x0, x22, :lo12:.LANCHOR4
 	mov	w1, 0
 	mov	w2, 64
 	add	x19, x23, :lo12:.LANCHOR0
-	adrp	x24, .LC181
-	adrp	x25, .LC182
+	adrp	x24, .LC180
+	adrp	x25, .LC181
 	ldr	x0, [x0,1232]
 	mov	w26, 0
-	add	x24, x24, :lo12:.LC181
-	add	x25, x25, :lo12:.LC182
+	add	x24, x24, :lo12:.LC180
+	add	x25, x25, :lo12:.LC181
 	bl	ftl_memset
 	ldr	x1, [x19,728]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	mov	w2, 4
 	mov	w3, 16
 	bl	rknand_print_hex
@@ -15334,7 +15185,7 @@ flash_info_flush:
 	ldr	w1, [x19,8]
 	bl	js_hash
 	str	w0, [x19,12]
-.L2517:
+.L2491:
 	add	x21, x22, :lo12:.LANCHOR4
 	add	x27, x23, :lo12:.LANCHOR0
 	mov	x0, x24
@@ -15348,7 +15199,7 @@ flash_info_flush:
 	ldrh	w0, [x21,1242]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L2518
+	blt	.L2492
 	ldr	x1, [x27,728]
 	ldrb	w19, [x21,1241]
 	strh	wzr, [x21,1242]
@@ -15369,14 +15220,14 @@ flash_info_flush:
 	ldrh	w0, [x27,2]
 	mul	w19, w19, w0
 	mov	w0, 0
-	b	.L2526
-.L2518:
+	b	.L2500
+.L2492:
 	madd	w19, w20, w28, w19
-	cbnz	w0, .L2519
-.L2526:
+	cbnz	w0, .L2493
+.L2500:
 	mov	w1, w19
 	bl	flash_erase_block
-.L2519:
+.L2493:
 	add	x2, x23, :lo12:.LANCHOR0
 	add	x20, x22, :lo12:.LANCHOR4
 	mov	w4, 4
@@ -15398,16 +15249,16 @@ flash_info_flush:
 	ldrh	w1, [x20,1242]
 	add	w1, w1, 1
 	strh	w1, [x20,1242]
-	bne	.L2520
+	bne	.L2494
 	mov	x0, x25
 	mov	w1, w19
 	bl	printk
-	b	.L2517
-.L2520:
-	cbnz	w26, .L2527
+	b	.L2491
+.L2494:
+	cbnz	w26, .L2501
 	mov	w26, 1
-	b	.L2517
-.L2527:
+	b	.L2491
+.L2501:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -15431,15 +15282,15 @@ nand_flash_init:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	stp	x25, x26, [sp,64]
 	str	x27, [sp,80]
-	tbz	x0, 12, .L2529
+	tbz	x0, 12, .L2503
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 2209
-	add	x2, x2, 560
+	add	x2, x2, 536
 	bl	printk
-.L2529:
+.L2503:
 	mov	x0, x19
 	adrp	x19, .LANCHOR0
 	add	x22, x19, :lo12:.LANCHOR0
@@ -15464,71 +15315,71 @@ nand_flash_init:
 	mov	w2, 32
 	mov	w27, 44
 	bl	ftl_memset
-.L2535:
+.L2509:
 	mov	w0, w23
 	mov	x1, x24
 	bl	flash_read_id
 	add	x0, x22, 744
 	strb	w26, [x23,x0]
-	cbnz	x23, .L2530
+	cbnz	x23, .L2504
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bls	.L2531
-.L2533:
+	bls	.L2505
+.L2507:
 	mov	w22, -2
-	b	.L2597
-.L2531:
+	b	.L2571
+.L2505:
 	ldrb	w0, [x25,1]
 	cmp	w0, 255
-	beq	.L2533
-.L2530:
+	beq	.L2507
+.L2504:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2534
+	bne	.L2508
 	strb	w27, [x24]
-.L2534:
+.L2508:
 	add	x23, x23, 1
 	add	x24, x24, 8
 	cmp	x23, 4
-	bne	.L2535
+	bne	.L2509
 	add	x23, x20, :lo12:.LANCHOR2
 	add	x24, x19, :lo12:.LANCHOR0
 	add	x23, x23, 440
 	mov	w22, 0
 	add	x24, x24, 748
-.L2538:
+.L2512:
 	ldrb	w2, [x23]
 	add	x0, x23, 1
 	mov	x1, x24
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2536
+	cbnz	w0, .L2510
 	add	x1, x20, :lo12:.LANCHOR2
 	ubfiz	x22, x22, 5, 32
 	add	x0, x1, 440
 	adds	x22, x0, x22
-	beq	.L2533
+	beq	.L2507
 	ldrb	w3, [x22,22]
 	mov	x0, 0
-	b	.L2540
-.L2536:
+	b	.L2514
+.L2510:
 	add	w22, w22, 1
 	add	x23, x23, 32
 	cmp	w22, 30
-	bne	.L2538
-	b	.L2533
-.L2540:
+	bne	.L2512
+	b	.L2507
+.L2514:
 	add	x4, x1, x0, lsl 5
 	mov	w2, w0
 	ldrb	w4, [x4,1400]
 	cmp	w4, w3
-	beq	.L2539
+	beq	.L2513
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2540
+	bne	.L2514
 	mov	w2, w0
-.L2539:
+.L2513:
 	add	x23, x20, :lo12:.LANCHOR2
 	add	x24, x19, :lo12:.LANCHOR0
 	add	x1, x23, 1400
@@ -15544,30 +15395,30 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24,516]
 	cmp	w0, 8
-	bhi	.L2541
+	bhi	.L2515
 	ldrb	w1, [x23,20]
 	cmp	w1, 60
-	bls	.L2542
+	bls	.L2516
 	mov	w1, 60
 	strb	w1, [x23,20]
-.L2542:
+.L2516:
 	cmp	w0, 8
-	bne	.L2541
+	bne	.L2515
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,748]
 	cmp	w0, 44
-	beq	.L2603
-.L2541:
+	beq	.L2577
+.L2515:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2543
+	tbz	x0, 12, .L2517
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 2233
-	add	x2, x2, 560
+	add	x2, x2, 536
 	bl	printk
-.L2543:
+.L2517:
 	add	x23, x21, :lo12:.LANCHOR4
 	mov	w0, 16384
 	add	x22, x19, :lo12:.LANCHOR0
@@ -15616,10 +15467,10 @@ nand_flash_init:
 	strb	w2, [x22,3348]
 	strb	w0, [x19,#:lo12:.LANCHOR0]
 	cmp	w1, 9
-	bne	.L2544
+	bne	.L2518
 	mov	w1, 70
 	strb	w1, [x22,632]
-.L2544:
+.L2518:
 	add	x2, x20, :lo12:.LANCHOR2
 	add	x1, x21, :lo12:.LANCHOR4
 	add	x2, x2, 376
@@ -15628,26 +15479,26 @@ nand_flash_init:
 	ldrb	w0, [x2,19]
 	ldrh	w2, [x2,16]
 	strb	w0, [x3,725]
-	tbz	x2, 6, .L2546
+	tbz	x2, 6, .L2520
 	sub	w2, w0, #17
 	uxtb	w2, w2
 	cmp	w2, 2
-	bhi	.L2547
+	bhi	.L2521
 	adrp	x2, micron_read_retrial
 	cmp	w0, 19
 	add	x2, x2, :lo12:micron_read_retrial
 	str	x2, [x1,1224]
-	bne	.L2599
+	bne	.L2573
 	mov	w0, 15
-	b	.L2600
-.L2547:
+	b	.L2574
+.L2521:
 	sub	w2, w0, #65
 	uxtb	w2, w2
 	cmp	w2, 1
-	bls	.L2568
+	bls	.L2542
 	cmp	w0, 33
-	bne	.L2550
-.L2568:
+	bne	.L2524
+.L2542:
 	add	x0, x21, :lo12:.LANCHOR4
 	adrp	x1, toshiba_read_retrial
 	add	x1, x1, :lo12:toshiba_read_retrial
@@ -15657,8 +15508,8 @@ nand_flash_init:
 	strb	w2, [x1,726]
 	mov	w1, 7
 	strb	w1, [x0,1216]
-	b	.L2546
-.L2550:
+	b	.L2520
+.L2524:
 	sub	w2, w0, #67
 	uxtb	w2, w2
 	cmp	w2, 1
@@ -15666,106 +15517,106 @@ nand_flash_init:
 	cset	w3, ls
 	uxtb	w2, w2
 	cmp	w2, 1
-	bls	.L2569
-	cbz	w3, .L2552
-.L2569:
+	bls	.L2543
+	cbz	w3, .L2526
+.L2543:
 	add	x2, x21, :lo12:.LANCHOR4
 	adrp	x1, toshiba_read_retrial
 	add	x1, x1, :lo12:toshiba_read_retrial
 	cmp	w0, 35
 	str	x1, [x2,1224]
-	beq	.L2554
+	beq	.L2528
 	cmp	w0, 68
-	beq	.L2554
+	beq	.L2528
 	mov	w0, 7
 	strb	w0, [x2,1216]
-	b	.L2555
-.L2554:
+	b	.L2529
+.L2528:
 	add	x0, x21, :lo12:.LANCHOR4
 	mov	w1, 17
 	strb	w1, [x0,1216]
-.L2555:
+.L2529:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 4
-	cbnz	w3, .L2601
+	cbnz	w3, .L2575
 	mov	w1, 5
-.L2601:
+.L2575:
 	strb	w1, [x0,726]
-	b	.L2546
-.L2552:
+	b	.L2520
+.L2526:
 	sub	w0, w0, #36
 	uxtb	w0, w0
 	cmp	w0, 1
-	bhi	.L2546
+	bhi	.L2520
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x1,1224]
-.L2599:
+.L2573:
 	mov	w0, 7
-.L2600:
+.L2574:
 	strb	w0, [x1,1216]
-.L2546:
+.L2520:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2557
+	tbz	x0, 12, .L2531
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 2281
-	add	x2, x2, 560
+	add	x2, x2, 536
 	bl	printk
-.L2557:
+.L2531:
 	add	x0, x19, :lo12:.LANCHOR0
 	strb	wzr, [x0,672]
 	ldrb	w0, [x0,780]
-	tbz	x0, 0, .L2558
+	tbz	x0, 0, .L2532
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-	b	.L2602
-.L2558:
+	b	.L2576
+.L2532:
 	mov	w0, 4
-.L2602:
+.L2576:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	cmn	w0, #1
 	mov	w22, w0
-	bne	.L2560
+	bne	.L2534
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2561
+	tbz	x0, 12, .L2535
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 2301
-	add	x2, x2, 560
+	add	x2, x2, 536
 	bl	printk
-.L2561:
+.L2535:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, 17
 	ldr	x0, [x19,728]
 	strb	w1, [x0,32]
-	b	.L2597
-.L2560:
+	b	.L2571
+.L2534:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 6
-	bhi	.L2562
+	bhi	.L2536
 	add	x0, x21, :lo12:.LANCHOR4
 	adrp	x1, hynix_read_retrial
 	add	x1, x1, :lo12:hynix_read_retrial
 	str	x1, [x0,1224]
-.L2562:
+.L2536:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x19,780]
-	tbz	x0, 2, .L2564
+	tbz	x0, 2, .L2538
 	ldr	x0, [x19,728]
 	ldrb	w0, [x0,19]
-	cbz	w0, .L2564
+	cbz	w0, .L2538
 	add	x21, x21, :lo12:.LANCHOR4
 	ldrh	w1, [x19,2]
 	mov	w0, 0
@@ -15773,33 +15624,33 @@ nand_flash_init:
 	mul	w1, w2, w1
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x19,672]
-	cbnz	w0, .L2564
+	cbnz	w0, .L2538
 	ldr	x1, [x19,728]
 	strb	w0, [x1,19]
 	bl	flash_info_flush
-.L2564:
+.L2538:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2566
+	tbz	x0, 12, .L2540
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
 	mov	w1, 2356
-	add	x2, x2, 560
+	add	x2, x2, 536
 	bl	printk
-.L2566:
+.L2540:
 	bl	nand_flash_print_info
 	mov	w22, 0
-	b	.L2597
-.L2603:
+	b	.L2571
+.L2577:
 	add	x0, x20, :lo12:.LANCHOR2
 	add	x0, x0, 376
 	ldrb	w1, [x0,28]
 	cmp	w1, 3
-	bne	.L2541
+	bne	.L2515
 	strb	wzr, [x0,28]
-	b	.L2541
-.L2597:
+	b	.L2515
+.L2571:
 	mov	w0, w22
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -15826,19 +15677,19 @@ ftl_sysblk_dump:
 	bl	buf_alloc
 	ldr	x24, [x0,8]
 	mov	w20, 0
-	adrp	x22, .LC183
-	adrp	x23, .LC184
+	adrp	x22, .LC182
+	adrp	x23, .LC183
 	mov	x27, x0
 	mov	w19, w20
 	adrp	x28, .LANCHOR0
-	add	x22, x22, :lo12:.LC183
-	add	x23, x23, :lo12:.LC184
+	add	x22, x22, :lo12:.LC182
+	add	x23, x23, :lo12:.LC183
 	add	x24, x24, 704
-.L2605:
+.L2579:
 	add	x3, x28, :lo12:.LANCHOR0
 	ldrh	w1, [x3,3300]
 	cmp	w1, w19
-	bls	.L2617
+	bls	.L2591
 	ldrh	w21, [x3,3350]
 	ldr	x1, [x27,8]
 	ldr	x2, [x27,24]
@@ -15874,28 +15725,28 @@ ftl_sysblk_dump:
 	mov	w3, 32
 	bl	rknand_print_hex
 	cmp	w26, 512
-	beq	.L2610
+	beq	.L2584
 	cmn	w26, #1
-	bne	.L2606
-.L2610:
+	bne	.L2580
+.L2584:
 	mov	w20, 1
-.L2606:
+.L2580:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2605
-.L2617:
+	b	.L2579
+.L2591:
 	mov	x0, x27
 	bl	buf_free
-	cbz	w20, .L2609
+	cbz	w20, .L2583
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 1339
-	add	x1, x1, 576
+	add	x1, x1, 552
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2609:
+.L2583:
 	sub	sp, x29, #48
 	mov	w0, w20
 	ldp	x19, x20, [sp,64]
@@ -15912,31 +15763,31 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LC185
+	adrp	x0, .LC184
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC184
 	ldrb	w1, [x19,2834]
 	bl	printk
 	adrp	x3, .LANCHOR4
-	adrp	x0, .LC186
+	adrp	x0, .LC185
 	add	x3, x3, :lo12:.LANCHOR4
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC185
 	ldrb	w1, [x3,1536]
 	ldrb	w2, [x3,1537]
 	ldrh	w3, [x3,1538]
 	bl	printk
 	ldr	x2, [x19,2864]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	ldrh	w1, [x2,130]
 	ldrh	w2, [x2,140]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	add	x5, x1, 16
 	ldrh	w1, [x1,16]
 	ldrh	w2, [x5,2]
@@ -15945,8 +15796,8 @@ dump_ftl_info:
 	ldrh	w5, [x5,10]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	add	x5, x1, 48
 	ldrh	w1, [x1,48]
 	ldrh	w2, [x5,2]
@@ -15955,8 +15806,8 @@ dump_ftl_info:
 	ldrh	w5, [x5,10]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	add	x5, x1, 80
 	ldrh	w1, [x1,80]
 	ldrh	w4, [x5,6]
@@ -15969,32 +15820,32 @@ dump_ftl_info:
 	ldrb	w3, [x19,3276]
 	ldr	x1, [x19,3872]
 	mul	w3, w0, w3
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	lsl	w3, w3, 1
 	bl	rknand_print_hex
 	ldr	x1, [x19,600]
-	adrp	x0, .LC192
+	adrp	x0, .LC191
 	ldrh	w3, [x19,576]
-	add	x0, x0, :lo12:.LC192
+	add	x0, x0, :lo12:.LC191
 	mov	w2, 2
 	bl	rknand_print_hex
 	ldr	x3, [x19,2864]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	mov	w2, 4
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	ldr	x1, [x19,584]
-	adrp	x0, .LC193
+	adrp	x0, .LC192
 	ldrh	w3, [x19,576]
-	add	x0, x0, :lo12:.LC193
+	add	x0, x0, :lo12:.LC192
 	mov	w2, 4
 	bl	rknand_print_hex
-	adrp	x0, .LC194
+	adrp	x0, .LC193
 	add	x1, x19, 3360
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC193
 	mov	w2, 2
 	mov	w3, 256
 	bl	rknand_print_hex
@@ -16003,8 +15854,8 @@ dump_ftl_info:
 	ldrb	w3, [x19,3276]
 	ldr	x1, [x19,3880]
 	mul	w3, w0, w3
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	lsl	w3, w3, 1
 	bl	rknand_print_hex
 	ldr	x19, [sp,16]
@@ -16035,19 +15886,19 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 7
 	cset	w4, eq
-	cbnz	w4, .L2623
+	cbnz	w4, .L2597
 	cmp	w3, w7
-	bne	.L2620
-.L2623:
+	bne	.L2594
+.L2597:
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printk
 	bl	dump_ftl_info
 	mov	w4, -1
-.L2620:
+.L2594:
 	mov	w0, w4
 	ldp	x29, x30, [sp], 16
 	ret
@@ -16063,26 +15914,26 @@ load_l2p_region:
 	stp	x19, x20, [sp,16]
 	cmp	w22, 31
 	uxth	w20, w0
-	bls	.L2626
+	bls	.L2600
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 31
-	add	x1, x1, 592
+	add	x1, x1, 568
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2626:
+.L2600:
 	adrp	x21, .LANCHOR0
 	adrp	x19, .LANCHOR7
 	add	x21, x21, :lo12:.LANCHOR0
 	ldr	x0, [x21,2864]
 	ldrh	w2, [x0,698]
 	cmp	w20, w2
-	bls	.L2627
-	adrp	x0, .LC197
+	bls	.L2601
+	adrp	x0, .LC196
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC196
 	add	x19, x19, :lo12:.LANCHOR7
 	bl	printk
 	mov	x0, 0
@@ -16093,15 +15944,15 @@ load_l2p_region:
 	ldr	x0, [x21,2864]
 	ldrh	w0, [x0,698]
 	cmp	w0, w20
-	bcs	.L2629
+	bcs	.L2603
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
-	add	x1, x1, 592
+	add	x1, x1, 568
 	mov	w2, 35
-	b	.L2633
-.L2627:
+	b	.L2607
+.L2601:
 	add	x0, x0, x20, sxtw 2
 	sbfiz	x22, x22, 4, 32
 	ldr	w4, [x0,704]
@@ -16109,19 +15960,19 @@ load_l2p_region:
 	add	x23, x0, x22
 	strh	w20, [x0,x22]
 	strh	wzr, [x23,2]
-	cbnz	w4, .L2630
-	adrp	x0, .LC198
+	cbnz	w4, .L2604
+	adrp	x0, .LC197
 	mov	w1, w20
 	mov	w2, w4
 	add	x19, x19, :lo12:.LANCHOR7
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC197
 	bl	printk
 	ldr	x0, [x23,8]
 	mov	w1, 255
 	ldrh	w2, [x19,-118]
 	bl	ftl_memset
-	b	.L2629
-.L2630:
+	b	.L2603
+.L2604:
 	add	x22, x19, :lo12:.LANCHOR7
 	ldrb	w3, [x21,2832]
 	ldr	x1, [x23,8]
@@ -16134,47 +15985,47 @@ load_l2p_region:
 	ldr	x4, [x29,72]
 	ldr	w2, [x0]
 	cmp	w2, w20
-	beq	.L2631
-	adrp	x0, .LC199
+	beq	.L2605
+	adrp	x0, .LC198
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC199
+	add	x0, x0, :lo12:.LC198
 	bl	printk
 	ldr	x3, [x21,2864]
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	mov	w2, 4
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	ldrb	w3, [x21,2832]
-	adrp	x0, .LC201
+	adrp	x0, .LC200
 	ldr	x1, [x23,8]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC200
 	mov	w2, 4
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	adrp	x0, .LC202
+	adrp	x0, .LC201
 	ldr	x1, [x22,-128]
-	add	x0, x0, :lo12:.LC202
+	add	x0, x0, :lo12:.LC201
 	mov	w2, 4
 	mov	w3, 16
 	bl	rknand_print_hex
-.L2631:
+.L2605:
 	add	x19, x19, :lo12:.LANCHOR7
 	ldr	x0, [x19,-128]
 	ldr	w0, [x0]
 	cmp	w0, w20
-	beq	.L2629
+	beq	.L2603
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
-	add	x1, x1, 592
+	add	x1, x1, 568
 	mov	w2, 59
-.L2633:
+.L2607:
 	bl	printk
 	bl	dump_stack
-.L2629:
+.L2603:
 	mov	w0, 0
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -16201,24 +16052,24 @@ pm_gc:
 	ldrh	w0, [x19,1164]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2636
+	blt	.L2610
 	bl	pm_free_sblk
 	ldr	x2, [x20,2864]
 	ldrh	w1, [x19,1164]
 	ldrh	w3, [x2,688]
 	sub	w1, w1, #1
 	cmp	w3, w1
-	blt	.L2636
+	blt	.L2610
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0,416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2638
+	bne	.L2612
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, 131
-	add	x1, x1, 608
+	add	x1, x1, 584
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
@@ -16226,7 +16077,7 @@ pm_gc:
 	ldr	x1, [x20,2864]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0,416]
-.L2638:
+.L2612:
 	bl	pm_select_ram_region
 	uxth	x20, w0
 	add	x0, x23, :lo12:.LANCHOR0
@@ -16237,27 +16088,27 @@ pm_gc:
 	ldrh	w0, [x0,x1]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2639
+	beq	.L2613
 	ldr	x1, [x19,8]
-	cbz	x1, .L2639
+	cbz	x1, .L2613
 	ldrsh	w2, [x19,2]
-	tbz	w2, #31, .L2639
+	tbz	w2, #31, .L2613
 	bl	pm_write_page
 	ldrh	w0, [x19,2]
 	and	w0, w0, 32767
 	strh	w0, [x19,2]
-.L2639:
+.L2613:
 	add	x23, x23, :lo12:.LANCHOR0
 	mov	w19, 0
 	add	x0, x23, 3904
 	mov	w24, 21
 	mov	w25, 1
 	add	x20, x0, x20, lsl 4
-.L2640:
+.L2614:
 	ldr	x0, [x23,2864]
 	ldrh	w1, [x0,698]
 	cmp	w1, w19
-	bls	.L2646
+	bls	.L2620
 	ldrh	w1, [x23,3340]
 	add	x0, x0, x19, sxtw 2
 	ldr	w0, [x0,704]
@@ -16269,7 +16120,7 @@ pm_gc:
 	ldrb	w0, [x23,3338]
 	udiv	w1, w1, w0
 	cmp	w21, w1, uxth
-	bne	.L2641
+	bne	.L2615
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16278,13 +16129,13 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x20]
-.L2641:
+.L2615:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2640
-.L2646:
+	b	.L2614
+.L2620:
 	bl	pm_free_sblk
-.L2636:
+.L2610:
 	mov	w0, 0
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -16312,10 +16163,10 @@ pm_flush_id:
 	and	w0, w0, 32767
 	strh	w0, [x20,2]
 	ldr	w0, [x19,3896]
-	cbz	w0, .L2648
+	cbz	w0, .L2622
 	bl	pm_gc
 	str	wzr, [x19,3896]
-.L2648:
+.L2622:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -16332,16 +16183,16 @@ pm_flush:
 	mov	x19, 0
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x20, x20, 3904
-.L2654:
+.L2628:
 	add	x1, x20, x19, lsl 4
 	uxth	w0, w19
 	ldrsh	w1, [x1,2]
-	tbz	w1, #31, .L2653
+	tbz	w1, #31, .L2627
 	bl	pm_flush_id
-.L2653:
+.L2627:
 	add	x19, x19, 1
 	cmp	x19, 32
-	bne	.L2654
+	bne	.L2628
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -16398,19 +16249,19 @@ pm_init:
 	mov	w24, -1
 	str	x0, [x22,-128]
 	add	x22, x20, 512
-.L2660:
+.L2634:
 	strh	w24, [x20]
 	strh	wzr, [x20,2]
-	cbz	w23, .L2659
+	cbz	w23, .L2633
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20,8]
-.L2659:
+.L2633:
 	add	x20, x20, 16
 	cmp	x20, x22
-	bne	.L2660
+	bne	.L2634
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR7
 	mov	w4, 4
@@ -16427,20 +16278,20 @@ pm_init:
 	mov	w24, w21
 	ldrh	w2, [x1,696]
 	cmp	w2, w21
-	bgt	.L2661
-	adrp	x0, .LC203
+	bgt	.L2635
+	adrp	x0, .LC202
 	ldrh	w1, [x1,692]
 	mov	w3, w21
-	add	x0, x0, :lo12:.LC203
-	adrp	x26, .LC204
+	add	x0, x0, :lo12:.LC202
+	adrp	x26, .LC203
 	add	w21, w21, 1
 	bl	printk
-	add	x26, x26, :lo12:.LC204
+	add	x26, x26, :lo12:.LC203
 	ldr	x0, [x20,2864]
 	ldrsh	w20, [x0,696]
-.L2662:
+.L2636:
 	cmp	w20, w21
-	bge	.L2675
+	bge	.L2649
 	add	x27, x19, :lo12:.LANCHOR0
 	mov	x2, x23
 	mov	x3, x25
@@ -16463,21 +16314,21 @@ pm_init:
 	ldr	w1, [x25]
 	bl	printk
 	cmp	w28, 512
-	beq	.L2663
+	beq	.L2637
 	cmn	w28, #1
-	beq	.L2663
+	beq	.L2637
 	ldr	x1, [x27,2864]
 	ldr	w0, [x25]
 	ldrh	w2, [x1,698]
 	cmp	w0, w2
-	bcs	.L2663
+	bcs	.L2637
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0,704]
-.L2663:
+.L2637:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L2662
-.L2675:
+	b	.L2636
+.L2649:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x0, .LANCHOR5+577
 	mov	w1, 1
@@ -16492,7 +16343,7 @@ pm_init:
 	ldr	x1, [x19,3912]
 	mov	w0, -1
 	bl	pm_write_page
-.L2661:
+.L2635:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16530,28 +16381,28 @@ pm_log2phys:
 	uxth	w25, w20
 	msub	w24, w25, w24, w0
 	uxth	x24, w24
-	bcc	.L2688
-	adrp	x0, .LC205
+	bcc	.L2662
+	adrp	x0, .LC204
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC205
+	add	x0, x0, :lo12:.LC204
 	bl	printk
 	mov	w0, -1
-	b	.L2678
-.L2692:
+	b	.L2652
+.L2666:
 	ldrh	w0, [x3]
 	cmp	w0, w25
-	beq	.L2680
-.L2679:
+	beq	.L2654
+.L2653:
 	add	w19, w19, 1
 	add	x3, x3, 16
 	uxth	x19, w19
 	cmp	w19, 32
-	beq	.L2691
-.L2688:
+	beq	.L2665
+.L2662:
 	ldr	x0, [x3,8]
-	cbnz	x0, .L2692
-	b	.L2679
-.L2691:
+	cbnz	x0, .L2666
+	b	.L2653
+.L2665:
 	bl	pm_select_ram_region
 	uxth	x19, w0
 	add	x2, x21, :lo12:.LANCHOR0
@@ -16562,21 +16413,21 @@ pm_log2phys:
 	ldrh	w3, [x2,x3]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L2693
-.L2684:
+	bne	.L2667
+.L2658:
 	adrp	x0, .LANCHOR7-116
 	strb	w19, [x0,#:lo12:.LANCHOR7-116]
 	mov	w0, w25
 	bl	load_l2p_region
-.L2680:
-	cbnz	w23, .L2681
+.L2654:
+	cbnz	w23, .L2655
 	add	x0, x21, :lo12:.LANCHOR0
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0,3912]
 	ldr	w0, [x0,x24,lsl 2]
 	str	w0, [x22]
-	b	.L2682
-.L2681:
+	b	.L2656
+.L2655:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w2, [x22]
 	add	x0, x0, 3904
@@ -16588,7 +16439,7 @@ pm_log2phys:
 	strh	w1, [x0,2]
 	adrp	x0, .LANCHOR4+64
 	strb	w20, [x0,#:lo12:.LANCHOR4+64]
-.L2682:
+.L2656:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w2, 32767
 	add	x21, x21, 3904
@@ -16597,18 +16448,18 @@ pm_log2phys:
 	ldrh	w1, [x19,2]
 	and	w3, w1, 32767
 	cmp	w3, w2
-	beq	.L2678
+	beq	.L2652
 	add	w1, w1, 1
 	strh	w1, [x19,2]
-	b	.L2678
-.L2693:
+	b	.L2652
+.L2667:
 	ldrsh	w2, [x4,2]
-	tbz	w2, #31, .L2684
+	tbz	w2, #31, .L2658
 	str	x1, [x29,88]
 	bl	pm_flush_id
 	ldr	x1, [x29,88]
-	b	.L2684
-.L2678:
+	b	.L2658
+.L2652:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -16642,7 +16493,7 @@ gc_recovery:
 	add	x22, x21, 80
 	cmp	w1, w0
 	ldr	x0, [x24,608]
-	beq	.L2695
+	beq	.L2669
 	mov	w1, -1
 	strh	w1, [x0,130]
 	mov	w0, 1
@@ -16657,37 +16508,37 @@ gc_recovery:
 	ldrb	w1, [x24,3257]
 	str	w0, [x29,152]
 	cmp	w1, 3
-	bne	.L2696
+	bne	.L2670
 	ldrh	w1, [x24,3300]
 	sub	w1, w1, #1
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-	b	.L2739
-.L2696:
+	b	.L2713
+.L2670:
 	cmp	w1, 2
-	bne	.L2697
+	bne	.L2671
 	ldrh	w1, [x24,3300]
 	add	w0, w0, w1, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-.L2739:
+.L2713:
 	str	w0, [x19,40]
-.L2697:
+.L2671:
 	mov	x0, x19
 	mov	w1, 1
 	bl	sblk_read_page
 	ldr	w0, [x19,52]
 	cmp	w0, 512
-	beq	.L2698
+	beq	.L2672
 	cmn	w0, #1
-	beq	.L2698
+	beq	.L2672
 	ldr	x0, [x19,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2699
-.L2698:
+	beq	.L2673
+.L2672:
 	mov	x0, x19
 	bl	buf_free
 	ldr	x7, [x19,24]
@@ -16698,8 +16549,8 @@ gc_recovery:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	ldr	w3, [x6]
 	ldr	w4, [x6,4]
 	ldr	w5, [x6,8]
@@ -16708,8 +16559,8 @@ gc_recovery:
 	ldr	w6, [x6,12]
 	ldr	w7, [x7]
 	bl	printk
-	b	.L2742
-.L2699:
+	b	.L2716
+.L2673:
 	add	x24, x20, :lo12:.LANCHOR0
 	ldr	x0, [x29,136]
 	ldr	x1, [x19,8]
@@ -16731,28 +16582,28 @@ gc_recovery:
 	ldrb	w26, [x24,3257]
 	ldrh	w25, [x24,3300]
 	cmp	w26, 2
-	bne	.L2701
+	bne	.L2675
 	lsl	w25, w25, 1
 	mov	w26, 1
-.L2701:
+.L2675:
 	mov	w23, 0
-	adrp	x24, .LC207
-	add	x0, x24, :lo12:.LC207
+	adrp	x24, .LC206
+	add	x0, x24, :lo12:.LC206
 	mov	w27, w23
 	str	x0, [x29,112]
-	b	.L2702
-.L2744:
+	b	.L2676
+.L2718:
 	ldr	x0, [x0,1144]
 	ldr	w1, [x0,x12]
 	ldr	w0, [x7,8]
 	cmp	w1, w0
-	bne	.L2706
-.L2729:
+	bne	.L2680
+.L2703:
 	add	w27, w27, 1
 	add	w28, w28, 1
-.L2710:
+.L2684:
 	cmp	w28, w26
-	bhi	.L2743
+	bhi	.L2717
 	ldr	x0, [x29,128]
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x0, 8
@@ -16762,10 +16613,10 @@ gc_recovery:
 	cmp	w1, 3
 	mul	w0, w0, w2
 	str	w0, [x29,152]
-	bne	.L2703
+	bne	.L2677
 	add	w0, w0, w23
 	orr	w0, w0, w28, lsl 24
-.L2740:
+.L2714:
 	str	w0, [x19,40]
 	mov	w1, 1
 	mov	x0, x19
@@ -16778,8 +16629,8 @@ gc_recovery:
 	ldr	x1, [x0,1136]
 	ldr	w3, [x1,x12]
 	cmp	w3, w6
-	beq	.L2744
-.L2706:
+	beq	.L2718
+.L2680:
 	ldr	x0, [x29,136]
 	str	x12, [x29,104]
 	add	x13, x0, :lo12:.LANCHOR4
@@ -16799,10 +16650,10 @@ gc_recovery:
 	ldr	x0, [x13,1136]
 	ldr	w0, [x0,x12]
 	cmn	w0, #1
-	beq	.L2729
+	beq	.L2703
 	mov	x0, x19
 	bl	buf_free
-.L2742:
+.L2716:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x21,80]
 	mov	w28, 0
@@ -16811,38 +16662,38 @@ gc_recovery:
 	ldr	x0, [x0,608]
 	ldrh	w1, [x21,80]
 	strh	w1, [x0,130]
-	b	.L2700
-.L2709:
+	b	.L2674
+.L2683:
 	add	w23, w23, 1
-.L2702:
+.L2676:
 	cmp	w23, w25
-	beq	.L2711
+	beq	.L2685
 	sub	w0, w23, #1
 	mov	w24, 0
 	str	w0, [x29,124]
-.L2712:
+.L2686:
 	ldrb	w0, [x22,9]
 	cmp	w24, w0
-	bge	.L2709
+	bge	.L2683
 	sxtw	x0, w24
 	mov	w28, 1
 	str	x0, [x29,128]
-	b	.L2710
-.L2703:
+	b	.L2684
+.L2677:
 	cmp	w1, 2
-	bne	.L2705
+	bne	.L2679
 	ldr	w1, [x29,124]
 	add	w0, w0, w1
 	add	w0, w0, w28
 	orr	w0, w0, 33554432
-	b	.L2740
-.L2705:
+	b	.L2714
+.L2679:
 	add	w0, w0, w23
-	b	.L2740
-.L2743:
+	b	.L2714
+.L2717:
 	add	w24, w24, 1
-	b	.L2712
-.L2711:
+	b	.L2686
+.L2685:
 	mov	x0, x19
 	mov	w28, 0
 	mov	w27, w28
@@ -16855,22 +16706,22 @@ gc_recovery:
 	ldrh	w0, [x0,3274]
 	mul	w0, w1, w0
 	strh	w0, [x2,x3,lsl 1]
-.L2713:
+.L2687:
 	cmp	w27, w25
-	beq	.L2724
+	beq	.L2698
 	sub	w0, w27, #1
 	mov	w24, 0
 	str	w0, [x29,104]
-.L2725:
+.L2699:
 	ldrb	w0, [x22,9]
 	cmp	w24, w0
-	bge	.L2722
+	bge	.L2696
 	sxtw	x0, w24
 	mov	w23, 1
 	str	x0, [x29,112]
-.L2723:
+.L2697:
 	cmp	w23, w26
-	bhi	.L2745
+	bhi	.L2719
 	ldr	x1, [x29,136]
 	ldr	w0, [x29,128]
 	add	x1, x1, :lo12:.LANCHOR4
@@ -16878,7 +16729,7 @@ gc_recovery:
 	ldr	x2, [x1,1136]
 	ldr	w6, [x2,x0]
 	cmn	w6, #1
-	beq	.L2714
+	beq	.L2688
 	ldr	x1, [x1,1144]
 	str	x6, [x29,96]
 	ldr	w0, [x1,x0]
@@ -16888,13 +16739,13 @@ gc_recovery:
 	str	w0, [x29,156]
 	cmn	w0, #1
 	ldr	x6, [x29,96]
-	bne	.L2715
+	bne	.L2689
 	mov	w0, w6
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	x6, [x29,96]
-.L2715:
+.L2689:
 	ldr	x0, [x29,112]
 	add	x0, x0, 8
 	ldrh	w1, [x22,x0,lsl 1]
@@ -16903,21 +16754,21 @@ gc_recovery:
 	ldrb	w0, [x0,3257]
 	cmp	w0, 3
 	mul	w1, w1, w2
-	bne	.L2716
+	bne	.L2690
 	add	w1, w1, w27
 	orr	w1, w1, w23, lsl 24
-	b	.L2741
-.L2716:
+	b	.L2715
+.L2690:
 	cmp	w0, 2
-	bne	.L2718
+	bne	.L2692
 	ldr	w0, [x29,104]
 	add	w1, w1, w0
 	add	w1, w1, w23
 	orr	w1, w1, 33554432
-	b	.L2741
-.L2718:
+	b	.L2715
+.L2692:
 	add	w1, w1, w27
-.L2741:
+.L2715:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w2, [x29,124]
 	str	w1, [x29,152]
@@ -16935,19 +16786,19 @@ gc_recovery:
 	ldr	w1, [x29,124]
 	cmp	w0, w1
 	uxth	x19, w19
-	bne	.L2719
+	bne	.L2693
 	mov	w0, w6
 	add	x1, x29, 152
 	add	w28, w28, 1
 	bl	pm_log2phys
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-	b	.L2720
-.L2719:
+	b	.L2694
+.L2693:
 	ldr	w1, [x29,152]
 	cmp	w0, w1
 	csinc	w28, w28, w28, ne
-.L2720:
+.L2694:
 	ldr	w0, [x29,128]
 	add	x1, x20, :lo12:.LANCHOR0
 	add	w0, w0, 1
@@ -16956,31 +16807,31 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0,2]
 	ands	w0, w0, 224
-	bne	.L2714
+	bne	.L2688
 	lsl	x19, x19, 1
 	ldr	x1, [x1,600]
 	ldrh	w2, [x1,x19]
-	cbz	w2, .L2714
+	cbz	w2, .L2688
 	strh	w0, [x1,x19]
-.L2714:
+.L2688:
 	add	w23, w23, 1
-	b	.L2723
-.L2745:
+	b	.L2697
+.L2719:
 	add	w24, w24, 1
-	b	.L2725
-.L2722:
+	b	.L2699
+.L2696:
 	add	w27, w27, 1
-	b	.L2713
-.L2724:
+	b	.L2687
+.L2698:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x21,80]
 	ldr	x0, [x0,600]
 	strh	w28, [x0,x1,lsl 1]
-.L2700:
+.L2674:
 	ldrh	w1, [x21,80]
-	adrp	x0, .LC208
+	adrp	x0, .LC207
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC207
 	bl	printk
 	mov	w0, -1
 	strh	w0, [x21,80]
@@ -16991,9 +16842,9 @@ gc_recovery:
 	ldr	x0, [x0,608]
 	ldrh	w0, [x0,130]
 	cmp	w0, w1
-	beq	.L2726
+	beq	.L2700
 	bl	ftl_free_sblk
-.L2726:
+.L2700:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w0, -1
 	ldr	x1, [x20,2864]
@@ -17002,15 +16853,15 @@ gc_recovery:
 	strh	w0, [x1,130]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2694
-.L2695:
+	b	.L2668
+.L2669:
 	ldrh	w0, [x0,130]
 	cmp	w0, w1
-	beq	.L2694
+	beq	.L2668
 	ldr	x1, [x24,2864]
 	ldrh	w1, [x1,126]
 	cmp	w1, w0
-	bne	.L2728
+	bne	.L2702
 	bl	pm_flush
 	ldr	x0, [x24,608]
 	ldrh	w0, [x0,130]
@@ -17020,12 +16871,12 @@ gc_recovery:
 	strh	w1, [x0,126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2728:
+.L2702:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, -1
 	ldr	x0, [x20,608]
 	strh	w1, [x0,130]
-.L2694:
+.L2668:
 	sub	sp, x29, #32
 	ldp	x19, x20, [sp,48]
 	ldp	x21, x22, [sp,64]
@@ -17091,14 +16942,14 @@ zftl_init:
 	strh	w7, [x20,576]
 	mov	x20, x11
 	strh	w10, [x23,-118]
-.L2747:
+.L2721:
 	cmp	w2, w4
-	bhi	.L2813
+	bhi	.L2787
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	uxth	w1, w1
-	b	.L2747
-.L2813:
+	b	.L2721
+.L2787:
 	mul	w3, w0, w3
 	add	x2, x19, :lo12:.LANCHOR0
 	sub	w1, w1, #1
@@ -17107,14 +16958,14 @@ zftl_init:
 	mov	w1, 1
 	lsr	w4, w5, 21
 	mov	w2, 0
-.L2749:
+.L2723:
 	cmp	w1, w4
-	bhi	.L2814
+	bhi	.L2788
 	add	w2, w2, 1
 	lsl	w1, w1, 1
 	uxth	w2, w2
-	b	.L2749
-.L2814:
+	b	.L2723
+.L2788:
 	mov	w1, 57344
 	mov	w4, 1
 	movk	w1, 0x1c, lsl 16
@@ -17151,10 +17002,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x4,3306]
 	cmp	w0, 79
-	bhi	.L2751
+	bhi	.L2725
 	mov	w0, 80
 	strh	w0, [x4,3306]
-.L2751:
+.L2725:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 2000
 	mov	w3, 256
@@ -17168,10 +17019,10 @@ zftl_init:
 	strh	w3, [x2,1162]
 	mov	w2, 32
 	strh	w2, [x0,592]
-	beq	.L2752
+	beq	.L2726
 	ldrb	w0, [x0,3272]
-	cbz	w0, .L2753
-.L2752:
+	cbz	w0, .L2727
+.L2726:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 150
 	mov	w3, 64
@@ -17181,84 +17032,84 @@ zftl_init:
 	mov	w3, 12
 	strh	w3, [x0,592]
 	ldrb	w3, [x19,#:lo12:.LANCHOR0]
-	cbnz	w3, .L2753
+	cbnz	w3, .L2727
 	mov	w3, 4
 	strh	w3, [x0,592]
 	mov	w3, 600
 	strh	w3, [x0,3346]
 	mov	w0, 128
 	strh	w0, [x2,1160]
-.L2753:
+.L2727:
+	ldr	w0, [x20,#:lo12:.LANCHOR2]
+	tbz	x0, 12, .L2729
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
+	bl	printk
+.L2729:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2755
+	tbz	x0, 12, .L2730
+	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC209
 	add	x0, x0, :lo12:.LC209
+	ldr	w1, [x1,2836]
 	bl	printk
-.L2755:
+.L2730:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2756
+	tbz	x0, 12, .L2731
 	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC210
 	add	x0, x0, :lo12:.LC210
-	ldr	w1, [x1,2836]
+	ldr	w1, [x1,2840]
 	bl	printk
-.L2756:
+.L2731:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2757
-	add	x1, x19, :lo12:.LANCHOR0
+	tbz	x0, 12, .L2732
+	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC211
 	add	x0, x0, :lo12:.LC211
-	ldr	w1, [x1,2840]
+	ldr	w1, [x1,-108]
 	bl	printk
-.L2757:
+.L2732:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2758
+	tbz	x0, 12, .L2733
 	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC212
 	add	x0, x0, :lo12:.LC212
-	ldr	w1, [x1,-108]
+	ldrh	w1, [x1,-104]
 	bl	printk
-.L2758:
+.L2733:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2759
+	tbz	x0, 12, .L2734
 	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC213
 	add	x0, x0, :lo12:.LC213
-	ldrh	w1, [x1,-104]
+	ldrh	w1, [x1,-118]
 	bl	printk
-.L2759:
+.L2734:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2760
-	add	x1, x21, :lo12:.LANCHOR7
+	tbz	x0, 12, .L2735
+	add	x22, x22, :lo12:.LANCHOR4
 	adrp	x0, .LC214
 	add	x0, x0, :lo12:.LC214
-	ldrh	w1, [x1,-118]
+	ldrh	w1, [x22,1164]
 	bl	printk
-.L2760:
+.L2735:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2761
-	add	x22, x22, :lo12:.LANCHOR4
+	tbz	x0, 12, .L2736
+	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC215
 	add	x0, x0, :lo12:.LC215
-	ldrh	w1, [x22,1164]
+	ldrh	w1, [x1,3306]
 	bl	printk
-.L2761:
+.L2736:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2762
+	tbz	x0, 12, .L2737
 	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC216
 	add	x0, x0, :lo12:.LC216
-	ldrh	w1, [x1,3306]
-	bl	printk
-.L2762:
-	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2763
-	add	x1, x19, :lo12:.LANCHOR0
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
 	ldrh	w1, [x1,3308]
 	bl	printk
-.L2763:
+.L2737:
 	add	x22, x19, :lo12:.LANCHOR0
 	bl	buf_init
 	mov	w0, 6
@@ -17287,11 +17138,11 @@ zftl_init:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x22,608]
-	tbz	x0, 12, .L2764
-	adrp	x0, .LC218
-	add	x0, x0, :lo12:.LC218
+	tbz	x0, 12, .L2738
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printk
-.L2764:
+.L2738:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x3, x21, :lo12:.LANCHOR7
 	ldrh	w0, [x2,3300]
@@ -17306,28 +17157,28 @@ zftl_init:
 	add	w24, w24, 704
 	lsl	w22, w22, 1
 	add	w22, w22, 632
-	tbz	x0, 12, .L2765
-	adrp	x0, .LC219
+	tbz	x0, 12, .L2739
+	adrp	x0, .LC218
 	ldrh	w3, [x3,-118]
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC218
 	mov	w1, w22
 	mov	w2, w24
 	bl	printk
-.L2765:
+.L2739:
 	add	x21, x21, :lo12:.LANCHOR7
 	ldrh	w0, [x21,-118]
 	cmp	w22, w0
-	bhi	.L2767
+	bhi	.L2741
 	cmp	w24, w0
-	bls	.L2766
-.L2767:
-.L2768:
-	b	.L2768
-.L2766:
+	bls	.L2740
+.L2741:
+.L2742:
+	b	.L2742
+.L2740:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2769
+	beq	.L2743
 	bl	ftl_ext_info_init
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
@@ -17360,18 +17211,18 @@ zftl_init:
 	mov	w0, 1
 	bl	ftl_total_vpn_update
 	ldrb	w0, [x23,577]
-	cbz	w0, .L2770
+	cbz	w0, .L2744
 	ldr	x1, [x19,2864]
 	ldr	w0, [x1,68]
 	add	w0, w0, 1
 	str	w0, [x1,68]
-.L2770:
+.L2744:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2769:
+.L2743:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -17397,11 +17248,11 @@ rk_ftl_init:
 	strb	wzr, [x21,-102]
 	bl	ftl_malloc
 	str	x0, [x19,1176]
-	cbnz	x0, .L2816
-.L2818:
+	cbnz	x0, .L2790
+.L2792:
 	mov	w0, -1
-	b	.L2817
-.L2816:
+	b	.L2791
+.L2790:
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x21,-96]
@@ -17411,7 +17262,7 @@ rk_ftl_init:
 	str	xzr, [x1,-88]!
 	bl	rknand_get_reg_addr
 	ldr	x0, [x19,1184]
-	cbz	x0, .L2818
+	cbz	x0, .L2792
 	bl	rk_nandc_irq_init
 	mov	w1, 0
 	ldr	x0, [x21,-96]
@@ -17471,14 +17322,14 @@ rk_ftl_init:
 	ldr	x0, [x19,1184]
 	bl	nand_flash_init
 	mov	w22, w0
-	cbnz	w0, .L2819
+	cbnz	w0, .L2793
 	bl	zftl_init
 	mov	w19, w0
 	bl	zftl_proc_debug_init
 	mov	w0, 1
 	strb	w0, [x21,-102]
-	b	.L2820
-.L2819:
+	b	.L2794
+.L2793:
 	ldr	x1, [x19,1176]
 	adrp	x2, ftl_read_flash_info
 	add	x2, x2, :lo12:ftl_read_flash_info
@@ -17533,7 +17384,7 @@ rk_ftl_init:
 	bl	FlashInit
 	mov	w19, w0
 	cmn	w22, #2
-	bne	.L2821
+	bne	.L2795
 	add	x22, x21, :lo12:.LANCHOR2
 	adrp	x1, gNandParaInfo
 	add	x22, x22, 376
@@ -17543,22 +17394,22 @@ rk_ftl_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x22,18]
 	bl	flash_lsb_page_tbl_build
-.L2821:
+.L2795:
 	adrp	x0, g_nandc_version_data
 	ldr	w1, [x0,#:lo12:g_nandc_version_data]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
 	adrp	x1, .LANCHOR0
-	bne	.L2822
+	bne	.L2796
 	adrp	x0, gFlashSlcMode
 	ldrb	w0, [x0,#:lo12:gFlashSlcMode]
-	cbnz	w0, .L2823
-.L2822:
+	cbnz	w0, .L2797
+.L2796:
 	add	x0, x20, :lo12:.LANCHOR4
 	strb	wzr, [x1,#:lo12:.LANCHOR0]
 	strb	wzr, [x0,1264]
-.L2823:
+.L2797:
 	adrp	x2, gNandFlashIDBEccBits
 	add	x0, x1, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR2
@@ -17572,28 +17423,28 @@ rk_ftl_init:
 	strb	w2, [x0,724]
 	mov	w2, 1
 	mov	w0, 0
-.L2824:
+.L2798:
 	cmp	w2, w3
-	bhi	.L2829
+	bhi	.L2803
 	add	w0, w0, 1
 	lsl	w2, w2, 1
 	uxth	w0, w0
-	b	.L2824
-.L2829:
+	b	.L2798
+.L2803:
 	add	x1, x1, :lo12:.LANCHOR0
 	sub	w0, w0, #1
 	strb	wzr, [x1,672]
 	strh	w0, [x1,3340]
-	cbnz	w19, .L2820
+	cbnz	w19, .L2794
 	bl	FtlInit
 	mov	w19, w0
-.L2820:
-	adrp	x0, .LC220
+.L2794:
+	adrp	x0, .LC219
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC220
+	add	x0, x0, :lo12:.LC219
 	bl	printk
 	mov	w0, w19
-.L2817:
+.L2791:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -17621,12 +17472,12 @@ gc_update_l2p_map_new:
 	mul	w24, w24, w0
 	bl	timer_get_time
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2831
-	adrp	x0, .LC221
+	tbz	x0, 8, .L2805
+	adrp	x0, .LC220
 	ldrh	w1, [x20,80]
-	add	x0, x0, :lo12:.LC221
+	add	x0, x0, :lo12:.LC220
 	bl	printk
-.L2831:
+.L2805:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	sub	w2, w24, #1
@@ -17635,21 +17486,21 @@ gc_update_l2p_map_new:
 	adrp	x27, .LANCHOR4
 	ldr	x0, [x0,600]
 	strh	w2, [x0,x1,lsl 1]
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
-	str	x0, [x29,120]
 	adrp	x0, .LC222
 	add	x0, x0, :lo12:.LC222
+	str	x0, [x29,120]
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
 	str	x0, [x29,112]
-.L2832:
+.L2806:
 	cmp	w23, w24
-	beq	.L2864
+	beq	.L2838
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	x0, [x0,1136]
 	ldr	w2, [x0,w23,sxtw 2]
 	cmn	w2, #1
-	beq	.L2833
+	beq	.L2807
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 7
@@ -17657,27 +17508,27 @@ gc_update_l2p_map_new:
 	and	w0, w0, 65535
 	str	w0, [x29,140]
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2834
+	tbz	x0, 8, .L2808
 	ldr	x0, [x29,112]
 	mov	w3, w23
 	ldr	w1, [x29,140]
 	bl	printk
-.L2834:
+.L2808:
 	mov	w25, w23
-.L2840:
+.L2814:
 	add	x1, x27, :lo12:.LANCHOR4
 	sbfiz	x26, x25, 2, 32
 	ldr	x0, [x1,1136]
 	ldr	w4, [x0,x26]
 	cmn	w4, #1
-	beq	.L2835
+	beq	.L2809
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x29,140]
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 7
 	udiv	w0, w4, w0
 	cmp	w2, w0, uxth
-	bne	.L2835
+	bne	.L2809
 	ldr	x0, [x1,1144]
 	str	x4, [x29,104]
 	ldr	w28, [x0,x26]
@@ -17686,16 +17537,16 @@ gc_update_l2p_map_new:
 	str	w0, [x29,156]
 	cmn	w0, #1
 	ldr	x4, [x29,104]
-	bne	.L2836
+	bne	.L2810
 	mov	w0, w4
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	x4, [x29,104]
-.L2836:
+.L2810:
 	ldr	w3, [x29,156]
 	cmp	w3, w28
-	bne	.L2837
+	bne	.L2811
 	add	x0, x27, :lo12:.LANCHOR4
 	add	x1, x29, 152
 	mov	w2, 1
@@ -17716,60 +17567,60 @@ gc_update_l2p_map_new:
 	and	w28, w0, w28
 	ldrb	w0, [x2,3338]
 	udiv	w0, w28, w0
-	b	.L2863
-.L2837:
+	b	.L2837
+.L2811:
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2839
+	tbz	x0, 8, .L2813
 	ldr	x0, [x29,120]
 	mov	w1, w4
 	mov	w2, w28
 	bl	printk
-.L2839:
+.L2813:
 	ldr	x0, [x29,128]
 	ldrh	w0, [x0]
-.L2863:
+.L2837:
 	bl	ftl_vpn_decrement
 	add	x0, x27, :lo12:.LANCHOR4
 	mov	w1, -1
 	ldr	x0, [x0,1136]
 	str	w1, [x0,x26]
 	bl	timer_get_time
-.L2835:
+.L2809:
 	add	w25, w25, 1
 	cmp	w25, w24
-	bne	.L2840
-.L2833:
+	bne	.L2814
+.L2807:
 	add	w23, w23, 1
-	b	.L2832
-.L2864:
+	b	.L2806
+.L2838:
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2842
+	tbz	x0, 8, .L2816
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w3, [x20,80]
 	ldr	x1, [x0,608]
 	ldr	x2, [x0,600]
-	adrp	x0, .LC224
-	add	x0, x0, :lo12:.LC224
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	ldrh	w1, [x1,80]
 	ldrh	w2, [x2,x3,lsl 1]
 	mov	w3, w21
 	bl	printk
-.L2842:
+.L2816:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x1,lsl 1]
 	cmp	w0, w21
-	beq	.L2843
+	beq	.L2817
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 483
-	add	x1, x1, 616
+	mov	w2, 488
+	add	x1, x1, 592
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2843:
+.L2817:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	ldr	x0, [x19,600]
@@ -17804,48 +17655,48 @@ gc_scan_src_blk_one_page:
 	ldrb	w7, [x3,3276]
 	ldrh	w1, [x1,40]
 	ldrh	w3, [x2,2]
-.L2866:
+.L2840:
 	cmp	w1, w6
-	bne	.L2908
+	bne	.L2882
 	add	w0, w0, 1
 	uxtb	w0, w0
 	cmp	w0, w7
-	bne	.L2867
+	bne	.L2841
 	add	w3, w3, 1
 	mov	w4, 1
 	mov	w0, 0
 	uxth	w3, w3
-.L2867:
+.L2841:
 	add	x1, x2, x0, sxtw 1
 	mov	w5, 1
 	ldrh	w1, [x1,40]
-	b	.L2866
-.L2908:
-	cbz	w5, .L2869
+	b	.L2840
+.L2882:
+	cbz	w5, .L2843
 	add	x2, x19, :lo12:.LANCHOR0
 	strb	w0, [x2,2900]
-.L2869:
-	cbz	w4, .L2870
+.L2843:
+	cbz	w4, .L2844
 	add	x0, x19, :lo12:.LANCHOR0
 	strh	w3, [x0,2898]
-.L2870:
+.L2844:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x0,3257]
 	ldrh	w20, [x0,3350]
 	cmp	w2, 2
 	mul	w1, w1, w20
-	bne	.L2871
+	bne	.L2845
 	ldrb	w2, [x0,2902]
 	add	x0, x0, 2896
-	cbnz	w2, .L2871
+	cbnz	w2, .L2845
 	ldrh	w20, [x0,2]
 	add	w20, w1, w20, lsl 1
-	b	.L2872
-.L2871:
+	b	.L2846
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w20, [x0,2898]
 	add	w20, w1, w20
-.L2872:
+.L2846:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x1, x2, 2896
 	ldrb	w0, [x2,2900]
@@ -17854,26 +17705,26 @@ gc_scan_src_blk_one_page:
 	strb	w0, [x2,2900]
 	ldrb	w2, [x2,3276]
 	cmp	w2, w0
-	bne	.L2873
+	bne	.L2847
 	ldrh	w0, [x1,2]
 	strb	wzr, [x1,4]
 	add	w0, w0, 1
 	strh	w0, [x1,2]
-.L2873:
+.L2847:
 	mov	w0, 1
 	mov	w21, 0
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	buf_alloc
 	mov	x22, x0
-.L2884:
+.L2858:
 	ldrb	w0, [x19,2902]
-	cbnz	w21, .L2886
+	cbnz	w21, .L2860
 	cmp	w0, 3
-	beq	.L2874
-.L2886:
+	beq	.L2848
+.L2860:
 	cmp	w0, w21
-	bgt	.L2876
-.L2885:
+	bgt	.L2850
+.L2859:
 	mov	x0, x22
 	bl	buf_free
 	ldr	x23, [sp,48]
@@ -17881,56 +17732,56 @@ gc_scan_src_blk_one_page:
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2876:
+.L2850:
 	ldrb	w1, [x19,3257]
 	cmp	w1, 2
-	bne	.L2877
-	cbnz	w0, .L2877
+	bne	.L2851
+	cbnz	w0, .L2851
 	add	w0, w21, w20
 	orr	w0, w0, 33554432
-	b	.L2907
-.L2877:
+	b	.L2881
+.L2851:
 	orr	w0, w20, w21, lsl 24
-.L2907:
+.L2881:
 	str	w0, [x22,40]
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w0, [x22,52]
 	cmp	w0, 512
-	beq	.L2881
+	beq	.L2855
 	cmn	w0, #1
-	beq	.L2881
+	beq	.L2855
 	ldr	x0, [x22,24]
 	ldr	w23, [x0,4]
 	mov	w0, w23
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,76]
 	cmn	w0, #1
-	bne	.L2882
+	bne	.L2856
 	mov	w0, w23
 	add	x1, x29, 76
 	mov	w2, 0
 	bl	pm_log2phys
-.L2882:
+.L2856:
 	ldr	w0, [x29,76]
 	cmp	w20, w0
-	bne	.L2881
+	bne	.L2855
 	ldrh	w2, [x19,2920]
 	ldr	x1, [x19,3248]
 	str	w20, [x1,x2,lsl 2]
 	ldrh	w1, [x19,2920]
 	add	w1, w1, 1
 	strh	w1, [x19,2920]
-.L2881:
+.L2855:
 	ldrh	w0, [x19,2922]
 	add	w0, w0, 1
 	strh	w0, [x19,2922]
-.L2874:
+.L2848:
 	add	w21, w21, 1
 	cmp	w21, 4
-	bne	.L2884
-	b	.L2885
+	bne	.L2858
+	b	.L2859
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.align	2
 	.global	gc_scan_src_blk
@@ -17947,32 +17798,32 @@ gc_scan_src_blk:
 	ldrh	w1, [x0,2896]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2910
+	bne	.L2884
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 920
-	add	x1, x1, 640
+	mov	w2, 925
+	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2910:
+.L2884:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w3, 65535
 	mov	w0, 0
 	ldrh	w1, [x2,2896]
 	cmp	w1, w3
-	beq	.L2911
+	beq	.L2885
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2912
+	tbz	x0, 8, .L2886
 	ubfiz	x3, x1, 1, 16
 	ldr	x2, [x2,600]
-	adrp	x0, .LC225
-	add	x0, x0, :lo12:.LC225
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
 	ldrh	w2, [x2,x3]
 	bl	printk
-.L2912:
+.L2886:
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	timer_get_time
 	add	x21, x20, 2896
@@ -17981,74 +17832,74 @@ gc_scan_src_blk:
 	bl	ftl_get_blk_list_in_sblk
 	uxtb	w1, w0
 	strb	w1, [x21,5]
-	cbnz	w1, .L2913
+	cbnz	w1, .L2887
 	mov	w0, -1
 	strh	w0, [x20,2896]
-	b	.L2939
-.L2913:
+	b	.L2913
+.L2887:
 	ldrh	w3, [x20,2896]
 	ldr	x2, [x20,584]
 	add	x2, x2, x3, lsl 2
 	ldrb	w2, [x2,2]
 	tst	w2, 192
 	and	w4, w2, 224
-	beq	.L2914
+	beq	.L2888
 	cmp	w4, 224
-	beq	.L2914
+	beq	.L2888
 	ldr	x2, [x20,608]
 	ldrh	w5, [x2,16]
 	cmp	w5, w3
-	beq	.L2914
+	beq	.L2888
 	ldrh	w5, [x2,48]
 	cmp	w5, w3
-	beq	.L2914
+	beq	.L2888
 	ldrh	w2, [x2,80]
 	cmp	w2, w3
-	bne	.L2915
-.L2914:
-	cbnz	w4, .L2916
+	bne	.L2889
+.L2888:
+	cbnz	w4, .L2890
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x3,lsl 1]
-	cbz	w0, .L2917
+	cbz	w0, .L2891
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 940
-	add	x1, x1, 640
+	mov	w2, 945
+	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2917:
+.L2891:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0,2896]
 	ldr	x0, [x0,600]
 	strh	wzr, [x0,x1,lsl 1]
-.L2916:
+.L2890:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	wzr, [x19,2920]
 	strh	w0, [x19,2896]
-.L2939:
+.L2913:
 	mov	w0, 0
-	b	.L2911
-.L2915:
+	b	.L2885
+.L2889:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x21, x0, sxtw 1
 	ldrh	w20, [x0,40]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L2918
+	bne	.L2892
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 948
-	add	x1, x1, 640
+	mov	w2, 953
+	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2918:
+.L2892:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w24, 1
 	ldrh	w3, [x2,2896]
@@ -18062,16 +17913,16 @@ gc_scan_src_blk:
 	mul	w1, w20, w1
 	and	w3, w3, 224
 	cmp	w3, 160
-	bne	.L2919
+	bne	.L2893
 	ldrb	w3, [x2,3257]
 	cmp	w3, 2
 	uxth	w24, w3
 	orr	w1, w1, w3, lsl 24
-	bne	.L2919
+	bne	.L2893
 	ldrh	w0, [x2,3274]
 	sub	w0, w0, #1
 	uxth	w0, w0
-.L2919:
+.L2893:
 	add	x20, x19, :lo12:.LANCHOR0
 	orr	w23, w0, w1
 	mov	w0, 1
@@ -18094,29 +17945,29 @@ gc_scan_src_blk:
 	strh	wzr, [x20,2920]
 	ldr	w0, [x21,52]
 	cmp	w0, 512
-	beq	.L2940
+	beq	.L2914
 	cmn	w0, #1
-	beq	.L2940
+	beq	.L2914
 	ldr	x0, [x21,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2922
+	beq	.L2896
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 980
-	add	x1, x1, 640
+	mov	w2, 985
+	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2940:
+.L2914:
 	mov	x0, x21
 	bl	buf_free
 	mov	w0, -1
-	b	.L2911
-.L2922:
+	b	.L2885
+.L2896:
 	ldrb	w0, [x20,3276]
 	mov	x26, 0
 	ldrh	w22, [x20,3300]
@@ -18126,21 +17977,21 @@ gc_scan_src_blk:
 	mul	w22, w24, w22
 	mov	w24, 21
 	uxth	w22, w22
-.L2923:
+.L2897:
 	cmp	w22, w26
-	ble	.L2941
+	ble	.L2915
 	ldr	w0, [x23,x26,lsl 2]
 	cmn	w0, #1
-	beq	.L2925
+	beq	.L2899
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,92]
 	cmn	w0, #1
-	bne	.L2926
+	bne	.L2900
 	ldr	w0, [x23,x26,lsl 2]
 	add	x1, x29, 92
 	mov	w2, 0
 	bl	pm_log2phys
-.L2926:
+.L2900:
 	ldrh	w1, [x20,3340]
 	ldr	w2, [x29,92]
 	sub	w0, w24, w1
@@ -18152,18 +18003,18 @@ gc_scan_src_blk:
 	ldrb	w0, [x20,3338]
 	udiv	w1, w1, w0
 	cmp	w1, w3
-	bne	.L2925
+	bne	.L2899
 	ldrh	w3, [x20,2920]
 	ldr	x1, [x20,3248]
 	str	w2, [x1,x3,lsl 2]
 	ldrh	w1, [x20,2920]
 	add	w1, w1, 1
 	strh	w1, [x20,2920]
-.L2925:
+.L2899:
 	bl	timer_get_time
 	add	x26, x26, 1
-	b	.L2923
-.L2941:
+	b	.L2897
+.L2915:
 	mov	x0, x21
 	bl	buf_free
 	add	x0, x19, :lo12:.LANCHOR0
@@ -18173,11 +18024,11 @@ gc_scan_src_blk:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x0,2920]
 	cmp	w2, w3
-	beq	.L2929
-	adrp	x0, .LC226
-	add	x0, x0, :lo12:.LC226
+	beq	.L2903
+	adrp	x0, .LC225
+	add	x0, x0, :lo12:.LC225
 	bl	printk
-.L2929:
+.L2903:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x19,2896]
 	ldr	x1, [x19,600]
@@ -18185,7 +18036,7 @@ gc_scan_src_blk:
 	strh	w3, [x1,x2,lsl 1]
 	strh	wzr, [x19,2924]
 	ldrh	w0, [x19,2920]
-.L2911:
+.L2885:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18207,14 +18058,14 @@ gc_scan_static_data:
 	ldr	x0, [x3,608]
 	ldr	w1, [x0,544]
 	cmn	w1, #1
-	beq	.L2943
+	beq	.L2917
 	adrp	x21, .LANCHOR3
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w20, 11
 	add	x22, x22, :lo12:.LC0
-	add	x21, x21, 656
-.L2944:
+	add	x21, x21, 632
+.L2918:
 	add	x24, x19, :lo12:.LANCHOR0
 	add	x1, x29, 76
 	mov	w2, 0
@@ -18223,7 +18074,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29,76]
 	cmn	w0, #1
-	beq	.L2945
+	beq	.L2919
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x23, x0
@@ -18233,7 +18084,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23,52]
 	cmp	w0, 256
-	bne	.L2946
+	bne	.L2920
 	ldrh	w0, [x24,3340]
 	mov	w2, 21
 	mov	w1, 1
@@ -18247,23 +18098,23 @@ gc_scan_static_data:
 	udiv	w0, w2, w0
 	mov	w2, 0
 	bl	gc_add_sblk
-.L2946:
+.L2920:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x1, [x23,24]
 	ldr	x0, [x0,608]
 	ldr	w1, [x1,4]
 	ldr	w0, [x0,544]
 	cmp	w1, w0
-	beq	.L2947
+	beq	.L2921
 	mov	x1, x21
-	mov	w2, 1419
+	mov	w2, 1424
 	mov	x0, x22
 	bl	printk
 	bl	dump_stack
-.L2947:
+.L2921:
 	mov	x0, x23
 	bl	buf_free
-.L2945:
+.L2919:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldr	x1, [x2,608]
 	ldr	w2, [x2,2840]
@@ -18271,7 +18122,7 @@ gc_scan_static_data:
 	add	w0, w0, 1
 	str	w0, [x1,544]
 	cmp	w0, w2
-	bcc	.L2948
+	bcc	.L2922
 	mov	w0, -1
 	str	w0, [x1,544]
 	ldr	w0, [x1,548]
@@ -18282,37 +18133,37 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2942
-.L2948:
+	b	.L2916
+.L2922:
 	ldr	w0, [x29,76]
 	cmn	w0, #1
-	bne	.L2942
+	bne	.L2916
 	sub	w20, w20, #1
 	uxth	w20, w20
-	cbnz	w20, .L2944
-	b	.L2942
-.L2943:
+	cbnz	w20, .L2918
+	b	.L2916
+.L2917:
 	ldr	w1, [x0,536]
 	ldr	w2, [x0,12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2953
+	bhi	.L2927
 	ldr	x3, [x3,2864]
 	ldr	w1, [x0,540]
 	ldr	w3, [x3,44]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w3, w1
-	bls	.L2942
-.L2953:
+	bls	.L2916
+.L2927:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldr	w1, [x1,44]
 	str	w1, [x0,540]
 	str	w2, [x0,536]
 	str	wzr, [x0,544]
-.L2942:
+.L2916:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18336,45 +18187,45 @@ gc_block_vpn_scan:
 	ldrh	w0, [x20,576]
 	ldr	w1, [x1,608]
 	cmp	w1, w0
-	bcs	.L2958
+	bcs	.L2932
 	bl	timer_get_time
 	ldr	x21, [x20,608]
 	ldr	w1, [x21,604]
 	add	w1, w1, 28672
 	add	w1, w1, 1328
 	cmp	w0, w1
-	bls	.L2958
+	bls	.L2932
 	bl	timer_get_time
 	str	w0, [x21,604]
 	ldr	x0, [x20,608]
 	ldrh	w2, [x20,576]
 	ldr	w1, [x0,600]
 	cmp	w1, w2
-	bcs	.L2962
+	bcs	.L2936
 	ldr	x2, [x20,2864]
 	ldrh	w2, [x2,134]
 	cmp	w1, w2
-	bcs	.L2963
-.L2962:
+	bcs	.L2937
+.L2936:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x1, [x1,2864]
 	ldrh	w1, [x1,134]
 	str	w1, [x0,600]
-.L2963:
+.L2937:
 	ldr	w25, [x0,600]
 	mov	w0, 65535
 	uxth	w20, w25
 	cmp	w20, w0
-	bne	.L2964
+	bne	.L2938
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1712
-	add	x1, x1, 680
+	mov	w2, 1717
+	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2964:
+.L2938:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldr	x0, [x21,608]
 	ldr	w1, [x0,600]
@@ -18387,47 +18238,47 @@ gc_block_vpn_scan:
 	mov	w0, w20
 	bl	ftl_get_blk_list_in_sblk
 	uxth	w1, w0
-	cbz	w1, .L2958
+	cbz	w1, .L2932
 	uxtw	x22, w20
 	ldr	x24, [x21,584]
 	add	x24, x24, x22, lsl 2
 	ldrb	w1, [x24,2]
 	tst	w1, 192
 	and	w2, w1, 224
-	beq	.L2965
+	beq	.L2939
 	cmp	w2, 224
-	beq	.L2965
+	beq	.L2939
 	ldr	x1, [x21,608]
 	ldrh	w3, [x1,16]
 	cmp	w3, w20
-	beq	.L2965
+	beq	.L2939
 	ldrh	w3, [x1,48]
 	cmp	w3, w20
-	beq	.L2965
+	beq	.L2939
 	ldrh	w1, [x1,80]
 	cmp	w1, w20
-	bne	.L2966
-.L2965:
-	cbnz	w2, .L2958
+	bne	.L2940
+.L2939:
+	cbnz	w2, .L2932
 	add	x0, x19, :lo12:.LANCHOR0
 	lsl	x22, x22, 1
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x22]
-	cbz	w0, .L2967
+	cbz	w0, .L2941
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1728
-	add	x1, x1, 680
+	mov	w2, 1733
+	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2967:
+.L2941:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x0, [x19,600]
 	strh	wzr, [x0,x22]
-	b	.L2958
-.L2966:
+	b	.L2932
+.L2940:
 	and	w0, w0, 65535
 	add	x1, x29, 144
 	sub	w0, w0, #1
@@ -18435,16 +18286,16 @@ gc_block_vpn_scan:
 	ldrh	w21, [x0,-16]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2969
+	bne	.L2943
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1734
-	add	x1, x1, 680
+	mov	w2, 1739
+	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2969:
+.L2943:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w3, [x24,2]
 	mov	w26, 1
@@ -18455,16 +18306,16 @@ gc_block_vpn_scan:
 	sub	w0, w0, #1
 	mul	w1, w21, w1
 	uxth	w0, w0
-	bne	.L2970
+	bne	.L2944
 	ldrb	w3, [x2,3257]
 	cmp	w3, 2
 	uxth	w26, w3
 	orr	w1, w1, w3, lsl 24
-	bne	.L2970
+	bne	.L2944
 	ldrh	w0, [x2,3274]
 	sub	w0, w0, #1
 	uxth	w0, w0
-.L2970:
+.L2944:
 	orr	w21, w0, w1
 	mov	w0, 1
 	bl	buf_alloc
@@ -18482,30 +18333,30 @@ gc_block_vpn_scan:
 	bl	ftl_memset
 	ldr	w0, [x23,52]
 	cmp	w0, 512
-	beq	.L2982
+	beq	.L2956
 	cmn	w0, #1
 	cset	w2, eq
-	cbz	w2, .L2971
-.L2982:
+	cbz	w2, .L2945
+.L2956:
 	mov	w0, w20
 	mov	w1, 1
 	mov	w2, 0
-	b	.L2995
-.L2971:
+	b	.L2969
+.L2945:
 	ldr	x0, [x23,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2973
+	beq	.L2947
 	mov	w0, w20
 	mov	w1, 1
-.L2995:
+.L2969:
 	bl	gc_add_sblk
 	mov	x0, x23
 	bl	buf_free
-	b	.L2958
-.L2973:
+	b	.L2932
+.L2947:
 	ldrb	w0, [x21,3276]
 	mov	x27, 0
 	ldrh	w1, [x21,3300]
@@ -18516,22 +18367,22 @@ gc_block_vpn_scan:
 	uxth	w0, w26
 	ldr	x26, [x23,8]
 	str	w0, [x29,108]
-.L2974:
+.L2948:
 	ldr	w0, [x29,108]
 	cmp	w0, w27
-	ble	.L2996
+	ble	.L2970
 	ldr	w0, [x26,x27,lsl 2]
 	cmn	w0, #1
-	beq	.L2975
+	beq	.L2949
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,124]
 	cmn	w0, #1
-	bne	.L2976
+	bne	.L2950
 	ldr	w0, [x26,x27,lsl 2]
 	add	x1, x29, 124
 	mov	w2, 0
 	bl	pm_log2phys
-.L2976:
+.L2950:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w1, 21
 	ldrh	w0, [x4,3340]
@@ -18545,39 +18396,39 @@ gc_block_vpn_scan:
 	and	w0, w2, w0
 	udiv	w0, w0, w1
 	cmp	w0, w28
-	bne	.L2975
+	bne	.L2949
 	add	w21, w21, 1
 	uxth	w21, w21
-.L2975:
+.L2949:
 	add	x27, x27, 1
-	b	.L2974
-.L2996:
+	b	.L2948
+.L2970:
 	mov	x0, x23
 	bl	buf_free
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2978
+	tbz	x0, 8, .L2952
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w4, [x24,2]
 	uxth	w1, w25
 	mov	w3, w21
 	ubfx	x4, x4, 5, 3
 	ldr	x2, [x0,600]
-	adrp	x0, .LC227
-	add	x0, x0, :lo12:.LC227
+	adrp	x0, .LC226
+	add	x0, x0, :lo12:.LC226
 	ldrh	w2, [x2,x22,lsl 1]
 	bl	printk
-.L2978:
+.L2952:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w21, 31
 	ldr	x0, [x19,600]
 	strh	w21, [x0,x22,lsl 1]
-	bhi	.L2958
+	bhi	.L2932
 	mov	w0, w20
 	mov	w1, 1
 	mov	w2, 0
 	bl	gc_add_sblk
-.L2958:
+.L2932:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18609,9 +18460,9 @@ ftl_sblk_dump:
 	add	x1, x0, x25
 	ldrh	w4, [x0,x25]
 	ldr	w5, [x0,x25]
-	adrp	x0, .LC228
+	adrp	x0, .LC227
 	ldrb	w3, [x1,2]
-	add	x0, x0, :lo12:.LC228
+	add	x0, x0, :lo12:.LC227
 	mov	w1, w20
 	and	w4, w4, 2047
 	ubfx	x2, x3, 5, 3
@@ -18621,19 +18472,19 @@ ftl_sblk_dump:
 	mov	w1, 65535
 	mov	w0, 0
 	cmp	w20, w1
-	beq	.L2998
+	beq	.L2972
 	ldrh	w1, [x19,576]
 	cmp	w1, w20
-	bls	.L2998
+	bls	.L2972
 	ldr	x0, [x19,584]
 	mov	w26, 1
 	add	x0, x0, x25
 	ldrb	w0, [x0,2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2999
+	bne	.L2973
 	ldrb	w26, [x19,3257]
-.L2999:
+.L2973:
 	add	x1, x29, 192
 	mov	w0, w20
 	strh	w20, [x29,176]
@@ -18654,8 +18505,8 @@ ftl_sblk_dump:
 	mul	w1, w1, w2
 	strh	w1, [x29,182]
 	ldr	x1, [x0,584]
-	adrp	x0, .LC229
-	add	x0, x0, :lo12:.LC229
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	add	x1, x1, x25
 	ldrb	w2, [x1,2]
 	mov	w1, w20
@@ -18664,56 +18515,56 @@ ftl_sblk_dump:
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x28, x0
-	adrp	x0, .LC183
+	adrp	x0, .LC182
 	str	w22, [x29,152]
-	add	x0, x0, :lo12:.LC183
+	add	x0, x0, :lo12:.LC182
 	str	x0, [x29,120]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	add	x0, x0, 704
+	add	x0, x0, 680
 	str	x0, [x29,112]
-.L3000:
+.L2974:
 	add	x21, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x21,3300]
 	cmp	w0, w19
-	bls	.L3016
+	bls	.L2990
 	lsl	w0, w19, 1
 	str	wzr, [x29,156]
 	sub	w0, w0, #1
 	str	w0, [x29,132]
-.L3017:
+.L2991:
 	ldrb	w0, [x29,185]
 	ldr	w1, [x29,156]
 	cmp	w0, w1
-	bls	.L3014
+	bls	.L2988
 	mov	w24, 1
-.L3015:
+.L2989:
 	cmp	w24, w26
 	ldr	w0, [x29,156]
-	bhi	.L3034
+	bhi	.L3008
 	add	x1, x29, 176
 	add	x0, x1, x0, sxtw 1
 	ldrh	w2, [x0,16]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L3001
+	beq	.L2975
 	add	x1, x23, :lo12:.LANCHOR0
 	cmp	w26, 3
 	ldrh	w0, [x1,3350]
 	mul	w0, w2, w0
 	add	w21, w0, w19
-	bne	.L3002
+	bne	.L2976
 	orr	w21, w21, w24, lsl 24
-	b	.L3003
-.L3002:
+	b	.L2977
+.L2976:
 	cmp	w26, 2
-	bne	.L3003
+	bne	.L2977
 	ldr	w3, [x29,132]
 	ldrb	w21, [x1,3257]
 	add	w0, w0, w3
 	add	w0, w0, w24
 	orr	w21, w0, w21, lsl 24
-.L3003:
+.L2977:
 	mov	w1, 1
 	str	w21, [x28,40]
 	mov	x0, x28
@@ -18745,23 +18596,23 @@ ftl_sblk_dump:
 	bl	printk
 	ldr	x9, [x29,104]
 	cmp	w9, 512
-	beq	.L3021
+	beq	.L2995
 	cmn	w9, #1
-	bne	.L3005
-.L3021:
+	bne	.L2979
+.L2995:
 	mov	w0, 1
 	str	w0, [x29,152]
-.L3005:
+.L2979:
 	add	x0, x23, :lo12:.LANCHOR0
 	ldr	x0, [x0,584]
 	add	x0, x0, x25
 	ldrb	w0, [x0,2]
 	and	w0, w0, 224
 	cmp	w0, 32
-	beq	.L3001
+	beq	.L2975
 	cmp	w0, 224
 	cset	w2, eq
-	cbnz	w2, .L3001
+	cbnz	w2, .L2975
 	ldr	x0, [x28,24]
 	str	x2, [x29,104]
 	ldr	w0, [x0,4]
@@ -18769,82 +18620,82 @@ ftl_sblk_dump:
 	str	w0, [x29,172]
 	cmn	w0, #1
 	ldr	x2, [x29,104]
-	bne	.L3007
+	bne	.L2981
 	ldr	x0, [x28,24]
 	add	x1, x29, 172
 	ldr	w0, [x0,4]
 	bl	pm_log2phys
-.L3007:
+.L2981:
 	ldr	w0, [x29,172]
 	cmp	w0, w21
-	bne	.L3008
+	bne	.L2982
 	ldr	x2, [x28,24]
 	add	w22, w22, 1
-	adrp	x0, .LC230
+	adrp	x0, .LC229
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC230
+	add	x0, x0, :lo12:.LC229
 	mov	w3, w22
 	ldr	w2, [x2,4]
 	bl	printk
-.L3008:
+.L2982:
 	ldr	x0, [x29,144]
-	cbz	x0, .L3010
+	cbz	x0, .L2984
 	ubfiz	x21, x27, 2, 32
 	ldr	w2, [x0,x21]
 	ldr	x0, [x28,24]
 	ldr	w0, [x0,4]
 	cmp	w0, w2
-	beq	.L3011
+	beq	.L2985
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3011
-	adrp	x0, .LC231
+	tbz	x0, 12, .L2985
+	adrp	x0, .LC230
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC231
+	add	x0, x0, :lo12:.LC230
 	bl	printk
-.L3011:
+.L2985:
 	ldr	x0, [x29,144]
 	ldr	x1, [x28,24]
 	ldr	w0, [x0,x21]
 	ldr	w1, [x1,4]
 	cmp	w1, w0
-	beq	.L3010
+	beq	.L2984
 	cmn	w0, #1
-	beq	.L3010
+	beq	.L2984
 	adrp	x0, .LC0
 	ldr	x1, [x29,112]
 	mov	w2, 1300
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3010:
+.L2984:
 	add	w27, w27, 1
-.L3001:
+.L2975:
 	add	w24, w24, 1
 	uxth	w24, w24
-	b	.L3015
-.L3034:
+	b	.L2989
+.L3008:
 	add	w0, w0, 1
 	uxth	w0, w0
 	str	w0, [x29,156]
-	b	.L3017
-.L3014:
+	b	.L2991
+.L2988:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L3000
-.L3016:
+	b	.L2974
+.L2990:
 	mov	x0, x28
 	bl	buf_free
 	ldr	x3, [x29,136]
-	adrp	x0, .LC232
+	adrp	x0, .LC231
 	ldr	x2, [x21,600]
-	add	x0, x0, :lo12:.LC232
+	add	x0, x0, :lo12:.LC231
 	mov	w1, w20
 	ldrh	w2, [x2,x3,lsl 1]
 	mov	w3, w22
 	bl	printk
 	ldr	w0, [x29,152]
-.L2998:
+.L2972:
 	sub	sp, x29, #48
 	ldp	x19, x20, [sp,64]
 	ldp	x21, x22, [sp,80]
@@ -18872,30 +18723,30 @@ zftl_read:
 	stp	x27, x28, [sp,80]
 	mov	w25, w2
 	mov	x23, x3
-	tbz	x0, 12, .L3036
-	adrp	x0, .LC233
+	tbz	x0, 12, .L3010
+	adrp	x0, .LC232
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC232
 	mov	w2, w22
 	mov	w3, w25
 	bl	printk
-.L3036:
-	cbnz	w19, .L3037
+.L3010:
+	cbnz	w19, .L3011
 	adrp	x0, .LANCHOR0+520
 	mov	w19, 24576
 	ldr	w2, [x0,#:lo12:.LANCHOR0+520]
-	b	.L3038
-.L3037:
+	b	.L3012
+.L3011:
 	cmp	w19, 3
 	mov	w0, -1
-	bhi	.L3039
+	bhi	.L3013
 	lsl	w19, w19, 13
 	mov	w2, 8192
-.L3038:
+.L3012:
 	add	w1, w22, w25
 	mov	w0, -1
 	cmp	w1, w2
-	bhi	.L3039
+	bhi	.L3013
 	add	w22, w19, w22
 	adrp	x19, .LANCHOR0
 	add	x1, x19, :lo12:.LANCHOR0
@@ -18918,10 +18769,10 @@ zftl_read:
 	str	x0, [x29,128]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	add	x0, x0, 720
+	add	x0, x0, 696
 	str	x0, [x29,120]
-.L3040:
-	cbz	w24, .L3100
+.L3014:
+	cbz	w24, .L3074
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w1, [x29,136]
 	cmp	w20, w27
@@ -18930,12 +18781,12 @@ zftl_read:
 	ldrb	w0, [x0,2832]
 	cset	w26, eq
 	uxth	w21, w0
-	cbnz	w26, .L3070
-	cbz	w2, .L3041
-	b	.L3099
-.L3070:
-	cbz	w2, .L3043
-.L3099:
+	cbnz	w26, .L3044
+	cbz	w2, .L3015
+	b	.L3073
+.L3044:
+	cbz	w2, .L3017
+.L3073:
 	udiv	w26, w22, w0
 	msub	w26, w26, w0, w22
 	uxth	w0, w25
@@ -18944,21 +18795,21 @@ zftl_read:
 	uxth	w21, w21
 	cmp	w21, w25
 	csel	w21, w0, w21, hi
-	b	.L3041
-.L3043:
+	b	.L3015
+.L3017:
 	msub	w21, w0, w20, w28
 	mov	w26, w2
 	uxtb	w21, w21
-.L3041:
+.L3015:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	add	x1, x1, 784
-.L3046:
+.L3020:
 	ldr	w2, [x1,36]
 	cmp	w2, w20
-	bne	.L3044
+	bne	.L3018
 	ldrb	w2, [x1,2]
-	tbz	x2, 3, .L3044
+	tbz	x2, 3, .L3018
 	add	x2, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 6, 32
 	add	x0, x2, x1
@@ -18970,48 +18821,48 @@ zftl_read:
 	add	x23, x23, x21
 	add	x1, x1, x26
 	bl	ftl_memcpy
-	b	.L3045
-.L3044:
+	b	.L3019
+.L3018:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3046
+	bne	.L3020
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3047
+	bne	.L3021
 	mov	w0, w20
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
-.L3047:
+.L3021:
 	ldr	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3048
+	bne	.L3022
 	mov	w21, 0
-.L3049:
+.L3023:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w21, w0
-	bcs	.L3045
+	bcs	.L3019
 	madd	w0, w20, w0, w21
 	cmp	w0, w22
-	bcc	.L3050
+	bcc	.L3024
 	cmp	w0, w28
-	bcs	.L3050
+	bcs	.L3024
 	mov	x0, x23
 	mov	w1, 0
 	mov	w2, 512
 	add	x23, x23, 512
 	bl	ftl_memset
-.L3050:
+.L3024:
 	add	w21, w21, 1
-	b	.L3049
-.L3048:
+	b	.L3023
+.L3022:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3052
+	cbz	x0, .L3026
 	add	x2, x19, :lo12:.LANCHOR0
 	ldr	x3, [x2,2864]
 	ldr	w2, [x3,40]
@@ -19027,36 +18878,36 @@ zftl_read:
 	str	w20, [x0,36]
 	strb	w26, [x0,57]
 	bl	zftl_add_read_buf
-.L3045:
+.L3019:
 	add	w20, w20, 1
 	sub	w24, w24, #1
-.L3052:
-	cbz	w24, .L3071
+.L3026:
+	cbz	w24, .L3045
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2834]
 	cmp	w0, 2
-	bhi	.L3040
-.L3071:
+	bhi	.L3014
+.L3045:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x2,3894]
-	cbz	w1, .L3040
+	cbz	w1, .L3014
 	add	x0, x2, 784
 	ldrb	w2, [x2,3893]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-.L3055:
+.L3029:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x0,3894]
-	cbz	w1, .L3101
+	cbz	w1, .L3075
 	ldrb	w0, [x0,3893]
 	cmp	w0, 255
-	bne	.L3056
+	bne	.L3030
 	ldr	x1, [x29,120]
 	mov	w2, 1064
 	ldr	x0, [x29,128]
 	bl	printk
 	bl	dump_stack
-.L3056:
+.L3030:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x1, x2, 784
 	ldrb	w21, [x2,3893]
@@ -19066,16 +18917,16 @@ zftl_read:
 	ldr	w8, [x26,52]
 	strb	w0, [x2,3893]
 	cmn	w8, #1
-	bne	.L3057
+	bne	.L3031
 	ldr	x1, [x2,608]
 	str	w8, [x29,140]
 	ldr	w0, [x1,552]
 	add	w0, w0, 1
 	str	w0, [x1,552]
-	b	.L3058
-.L3057:
+	b	.L3032
+.L3031:
 	cmp	w8, 256
-	bne	.L3058
+	bne	.L3032
 	ldrh	w0, [x2,3340]
 	mov	w1, 21
 	mov	w5, 1
@@ -19090,8 +18941,8 @@ zftl_read:
 	ldrb	w4, [x2,3338]
 	ldr	w2, [x26,36]
 	udiv	w4, w0, w4
-	adrp	x0, .LC234
-	add	x0, x0, :lo12:.LC234
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
 	str	x4, [x29,112]
 	uxth	w1, w4
 	bl	printk
@@ -19102,7 +18953,7 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	x8, [x29,96]
-.L3058:
+.L3032:
 	add	x9, x19, :lo12:.LANCHOR0
 	add	x1, x9, 784
 	add	x1, x1, x21, lsl 6
@@ -19111,7 +18962,7 @@ zftl_read:
 	ldr	w3, [x0,4]
 	ldr	w0, [x1,36]
 	cmp	w3, w0
-	beq	.L3059
+	beq	.L3033
 	ldr	x3, [x9,608]
 	str	x8, [x29,96]
 	str	x9, [x29,104]
@@ -19119,9 +18970,9 @@ zftl_read:
 	str	x10, [x29,112]
 	add	w0, w0, 1
 	str	w0, [x3,552]
-	adrp	x0, .LC235
+	adrp	x0, .LC234
 	ldr	x7, [x1,24]
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC234
 	ldr	w2, [x10,4]
 	ldr	w3, [x10,8]
 	ldr	w4, [x7]
@@ -19146,7 +18997,7 @@ zftl_read:
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x8, [x29,96]
-.L3059:
+.L3033:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 784
 	add	x0, x0, x21, lsl 6
@@ -19154,35 +19005,35 @@ zftl_read:
 	ldr	w0, [x0,36]
 	ldr	w1, [x1,4]
 	cmp	w1, w0
-	bne	.L3072
+	bne	.L3046
 	cmn	w8, #1
-	bne	.L3060
-.L3072:
+	bne	.L3034
+.L3046:
 	ldr	x1, [x29,120]
 	mov	w2, 1085
 	ldr	x0, [x29,128]
 	bl	printk
 	bl	dump_stack
-.L3060:
+.L3034:
 	add	x1, x19, :lo12:.LANCHOR0
 	add	x0, x1, 784
 	add	x21, x0, x21, lsl 6
 	ldrb	w1, [x1,2832]
 	ldrb	w2, [x21,56]
 	cmp	w1, w2
-	bls	.L3062
+	bls	.L3036
 	ldrb	w3, [x21,57]
 	lsl	w2, w2, 9
 	ldr	x1, [x21,8]
 	ldr	x0, [x21,16]
 	add	x1, x1, x3, lsl 9
 	bl	ftl_memcpy
-	b	.L3063
-.L3062:
+	b	.L3037
+.L3036:
 	ldrb	w0, [x21,2]
 	and	w0, w0, -9
 	strb	w0, [x21,2]
-.L3063:
+.L3037:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	x1, x26
 	add	x0, x21, 3895
@@ -19192,18 +19043,18 @@ zftl_read:
 	ldrb	w0, [x21,3894]
 	sub	w0, w0, #1
 	strb	w0, [x21,3894]
-	b	.L3055
-.L3101:
+	b	.L3029
+.L3075:
 	mov	w2, -1
 	strb	w1, [x0,3894]
 	strb	w2, [x0,3893]
-	b	.L3040
-.L3100:
+	b	.L3014
+.L3074:
 	bl	timer_get_time
 	adrp	x1, .LANCHOR7-80
 	str	w0, [x1,#:lo12:.LANCHOR7-80]
 	ldr	w0, [x29,140]
-.L3039:
+.L3013:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -19258,34 +19109,34 @@ zftl_debug_proc_write:
 	stp	x23, x24, [sp,80]
 	stp	x25, x26, [sp,96]
 	mov	x21, x2
-	bhi	.L3105
+	bhi	.L3079
 	mov	x0, x19
 	bl	rk_copy_from_user
 	mov	x22, x0
 	mov	x0, -14
-	cbnz	x22, .L3105
-	adrp	x0, .LC236
+	cbnz	x22, .L3079
+	adrp	x0, .LC235
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC236
+	add	x0, x0, :lo12:.LC235
 	strb	w22, [x19,x21]
 	bl	printk
-	adrp	x0, .LC237
+	adrp	x0, .LC236
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC237
+	add	x0, x0, :lo12:.LC236
 	mov	w2, 1
 	mov	w3, 16
 	bl	rknand_print_hex
 	bl	rknand_device_lock
-	adrp	x1, .LC238
+	adrp	x1, .LC237
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC238
+	add	x1, x1, :lo12:.LC237
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3106
+	cbnz	w0, .L3080
 	adrp	x23, .LANCHOR0
-	adrp	x0, .LC239
+	adrp	x0, .LC238
 	add	x19, x23, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC238
 	mov	w2, 4
 	adrp	x20, .LANCHOR4
 	ldr	x3, [x19,2864]
@@ -19294,19 +19145,19 @@ zftl_debug_proc_write:
 	bl	rknand_print_hex
 	add	x3, x20, :lo12:.LANCHOR4
 	ldr	x1, [x19,2864]
-	adrp	x0, .LC240
+	adrp	x0, .LC239
 	mov	w2, 2
-	add	x0, x0, :lo12:.LC240
+	add	x0, x0, :lo12:.LC239
 	add	x1, x1, 416
 	ldrh	w3, [x3,1164]
 	mov	w19, w22
 	mov	w22, 65535
 	bl	rknand_print_hex
-.L3107:
+.L3081:
 	add	x0, x20, :lo12:.LANCHOR4
 	ldrh	w0, [x0,1164]
 	cmp	w19, w0
-	bge	.L3110
+	bge	.L3084
 	mov	w0, 300
 	bl	msleep
 	add	x0, x23, :lo12:.LANCHOR0
@@ -19314,63 +19165,63 @@ zftl_debug_proc_write:
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0,416]
 	cmp	w0, w22
-	beq	.L3108
+	beq	.L3082
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L3108:
+.L3082:
 	add	w19, w19, 1
-	b	.L3107
-.L3106:
-	adrp	x1, .LC241
+	b	.L3081
+.L3080:
+	adrp	x1, .LC240
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC241
+	add	x1, x1, :lo12:.LC240
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3111
+	cbnz	w0, .L3085
 	adrp	x23, .LANCHOR0
-	adrp	x0, .LC239
+	adrp	x0, .LC238
 	add	x20, x23, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC238
 	mov	w2, 4
 	add	x22, x29, 192
-	adrp	x24, .LC244
+	adrp	x24, .LC243
 	ldr	x3, [x20,2864]
-	add	x24, x24, :lo12:.LC244
+	add	x24, x24, :lo12:.LC243
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	adrp	x3, .LANCHOR4+1164
 	ldr	x1, [x20,2864]
-	adrp	x0, .LC240
+	adrp	x0, .LC239
 	mov	w2, 2
-	add	x0, x0, :lo12:.LC240
+	add	x0, x0, :lo12:.LC239
 	add	x1, x1, 416
 	ldrh	w3, [x3,#:lo12:.LANCHOR4+1164]
 	bl	rknand_print_hex
-	adrp	x0, .LC242
+	adrp	x0, .LC241
 	add	x1, x19, 7
-	add	x0, x0, :lo12:.LC242
+	add	x0, x0, :lo12:.LC241
 	str	x1, [x22,-88]!
 	add	x19, x20, 3904
 	mov	x20, x23
 	bl	printk
-	adrp	x23, .LC243
+	adrp	x23, .LC242
 	ldr	x0, [x29,104]
 	mov	x1, x22
 	add	x25, x19, 512
-	add	x23, x23, :lo12:.LC243
+	add	x23, x23, :lo12:.LC242
 	bl	rk_simple_strtoull.constprop.31
 	mov	w22, w0
 	str	w0, [x29,100]
 	uxth	w26, w0
-.L3113:
+.L3087:
 	ldrh	w1, [x19]
 	mov	x0, x23
 	ldrh	w2, [x19,2]
 	bl	printk
 	ldrh	w0, [x19]
 	cmp	w0, w26
-	bne	.L3112
+	bne	.L3086
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	x1, [x19,8]
 	mov	w2, 4
@@ -19378,10 +19229,10 @@ zftl_debug_proc_write:
 	mov	x0, x24
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-.L3112:
+.L3086:
 	add	x19, x19, 16
 	cmp	x19, x25
-	bne	.L3113
+	bne	.L3087
 	mov	w0, 300
 	add	x20, x20, :lo12:.LANCHOR0
 	bl	msleep
@@ -19404,8 +19255,8 @@ zftl_debug_proc_write:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	ldr	w3, [x6]
 	ldr	w2, [x19,52]
 	ldr	w4, [x6,4]
@@ -19414,28 +19265,28 @@ zftl_debug_proc_write:
 	ldr	w6, [x6,12]
 	bl	printk
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC245
-	add	x0, x0, :lo12:.LC245
+	adrp	x0, .LC244
+	add	x0, x0, :lo12:.LC244
 	ldr	x1, [x19,8]
 	mov	w2, 4
 	lsl	w3, w3, 7
-	b	.L3128
-.L3111:
-	adrp	x1, .LC246
+	b	.L3102
+.L3085:
+	adrp	x1, .LC245
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC246
+	add	x1, x1, :lo12:.LC245
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3114
+	cbnz	w0, .L3088
 	bl	dump_ftl_info
-	b	.L3110
-.L3114:
-	adrp	x1, .LC247
+	b	.L3084
+.L3088:
+	adrp	x1, .LC246
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC247
+	add	x1, x1, :lo12:.LC246
 	mov	x2, 9
 	bl	memcmp
-	cbnz	w0, .L3115
+	cbnz	w0, .L3089
 	add	x1, x29, 192
 	add	x0, x19, 9
 	str	x0, [x1,-88]!
@@ -19444,24 +19295,24 @@ zftl_debug_proc_write:
 	adrp	x1, .LANCHOR0+3336
 	strh	w0, [x1,#:lo12:.LANCHOR0+3336]
 	bl	dump_all_list_info
-	b	.L3110
-.L3115:
-	adrp	x1, .LC248
+	b	.L3084
+.L3089:
+	adrp	x1, .LC247
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC248
+	add	x1, x1, :lo12:.LC247
 	mov	x2, 8
 	bl	memcmp
-	cbz	w0, .L3110
-	adrp	x1, .LC249
+	cbz	w0, .L3084
+	adrp	x1, .LC248
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC249
+	add	x1, x1, :lo12:.LC248
 	mov	x2, 8
 	bl	memcmp
-	cbnz	w0, .L3117
+	cbnz	w0, .L3091
 	add	x20, x29, 192
-	adrp	x0, .LC242
+	adrp	x0, .LC241
 	add	x1, x19, 8
-	add	x0, x0, :lo12:.LC242
+	add	x0, x0, :lo12:.LC241
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19486,8 +19337,8 @@ zftl_debug_proc_write:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	ldr	w3, [x6]
 	ldr	w4, [x6,4]
 	ldr	w5, [x6,8]
@@ -19496,34 +19347,34 @@ zftl_debug_proc_write:
 	ldr	w7, [x7]
 	bl	printk
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC201
+	adrp	x0, .LC200
 	ldr	x1, [x19,8]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC200
 	mov	w2, 4
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC202
+	adrp	x0, .LC201
 	ldr	x1, [x19,24]
-	add	x0, x0, :lo12:.LC202
+	add	x0, x0, :lo12:.LC201
 	mov	w2, 4
 	lsl	w3, w3, 1
-.L3128:
+.L3102:
 	bl	rknand_print_hex
 	mov	x0, x19
 	bl	buf_free
-	b	.L3110
-.L3117:
-	adrp	x1, .LC250
+	b	.L3084
+.L3091:
+	adrp	x1, .LC249
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC250
+	add	x1, x1, :lo12:.LC249
 	mov	x2, 8
 	bl	memcmp
-	cbnz	w0, .L3118
+	cbnz	w0, .L3092
 	add	x20, x29, 192
-	adrp	x0, .LC242
+	adrp	x0, .LC241
 	add	x1, x19, 8
-	add	x0, x0, :lo12:.LC242
+	add	x0, x0, :lo12:.LC241
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19532,18 +19383,18 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	mov	x1, x22
 	bl	ftl_sblk_dump
-	b	.L3110
-.L3118:
-	adrp	x1, .LC251
+	b	.L3084
+.L3092:
+	adrp	x1, .LC250
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC251
+	add	x1, x1, :lo12:.LC250
 	mov	x2, 10
 	bl	memcmp
-	cbnz	w0, .L3119
+	cbnz	w0, .L3093
 	add	x20, x29, 192
-	adrp	x0, .LC242
+	adrp	x0, .LC241
 	add	x1, x19, 10
-	add	x0, x0, :lo12:.LC242
+	add	x0, x0, :lo12:.LC241
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19552,20 +19403,20 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	adrp	x1, .LANCHOR2
 	str	w0, [x1,#:lo12:.LANCHOR2]
-	b	.L3110
-.L3119:
-	adrp	x1, .LC252
+	b	.L3084
+.L3093:
+	adrp	x1, .LC251
 	mov	x2, 8
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC252
+	add	x1, x1, :lo12:.LC251
 	bl	memcmp
 	mov	w2, w0
 	str	x2, [x29,88]
-	cbnz	w0, .L3120
+	cbnz	w0, .L3094
 	add	x1, x19, 8
-	adrp	x0, .LC242
+	adrp	x0, .LC241
 	add	x19, x29, 192
-	add	x0, x0, :lo12:.LC242
+	add	x0, x0, :lo12:.LC241
 	str	x1, [x19,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19576,18 +19427,21 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	cmn	w0, #1
 	ldr	x2, [x29,88]
-	bne	.L3121
+	bne	.L3095
 	mov	w0, w19
 	add	x1, x29, 100
 	bl	pm_log2phys
-.L3121:
-	adrp	x0, .LC253
+.L3095:
+	adrp	x0, .LC252
 	ldr	w2, [x29,100]
 	mov	w1, w19
+	add	x0, x0, :lo12:.LC252
+	bl	printk
+	b	.L3084
+.L3094:
+	adrp	x0, .LC253
 	add	x0, x0, :lo12:.LC253
 	bl	printk
-	b	.L3110
-.L3120:
 	adrp	x0, .LC254
 	add	x0, x0, :lo12:.LC254
 	bl	printk
@@ -19612,13 +19466,10 @@ zftl_debug_proc_write:
 	adrp	x0, .LC261
 	add	x0, x0, :lo12:.LC261
 	bl	printk
-	adrp	x0, .LC262
-	add	x0, x0, :lo12:.LC262
-	bl	printk
-.L3110:
+.L3084:
 	bl	rknand_device_unlock
 	mov	x0, x21
-.L3105:
+.L3079:
 	sub	sp, x29, #32
 	ldp	x19, x20, [sp,48]
 	ldp	x21, x22, [sp,64]
@@ -19629,6 +19480,184 @@ zftl_debug_proc_write:
 	ret
 	.size	zftl_debug_proc_write, .-zftl_debug_proc_write
 	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #128
+	stp	x29, x30, [sp,16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp,32]
+	adrp	x19, .LANCHOR0
+	add	x20, x19, :lo12:.LANCHOR0
+	stp	x21, x22, [sp,48]
+	stp	x23, x24, [sp,64]
+	stp	x25, x26, [sp,80]
+	stp	x27, x28, [sp,96]
+	ldr	x0, [x20,2904]
+	ldr	x23, [x20,608]
+	add	x20, x20, 2896
+	cbnz	x0, .L3104
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x20,8]
+.L3104:
+	add	x0, x19, :lo12:.LANCHOR0
+	ldr	x20, [x0,2904]
+	cbnz	x20, .L3105
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR3
+	mov	w2, 366
+	add	x1, x1, 712
+	add	x0, x0, :lo12:.LC0
+	bl	printk
+	bl	dump_stack
+.L3105:
+	mov	w24, 0
+	add	x25, x23, 80
+	add	x21, x19, :lo12:.LANCHOR0
+	adrp	x27, .LANCHOR4
+.L3106:
+	ldrb	w0, [x25,9]
+	cmp	w24, w0
+	bge	.L3129
+	mov	w22, 1
+	sxtw	x28, w24
+.L3115:
+	add	x0, x21, 2896
+	ldrh	w1, [x0,20]
+	cmp	w22, w1
+	bgt	.L3130
+	add	x1, x28, 8
+	ldrh	w2, [x21,3350]
+	ldrh	w0, [x0,16]
+	ldrh	w1, [x25,x1,lsl 1]
+	mul	w1, w1, w2
+	ldrb	w2, [x21,3257]
+	cmp	w2, 3
+	bne	.L3107
+	add	w1, w1, w0
+	orr	w1, w1, w22, lsl 24
+	b	.L3128
+.L3107:
+	cmp	w2, 2
+	bne	.L3109
+	sub	w0, w0, #1
+	add	w1, w0, w1
+	add	w1, w1, w22
+	orr	w1, w1, 33554432
+	b	.L3128
+.L3109:
+	add	w1, w1, w0
+.L3128:
+	str	w1, [x20,40]
+	mov	x0, x20
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	w0, [x20,52]
+	cmn	w0, #1
+	beq	.L3110
+	add	x2, x27, :lo12:.LANCHOR4
+	ldrh	w0, [x21,2918]
+	ldr	x1, [x20,24]
+	lsl	x0, x0, 2
+	ldr	x3, [x2,1136]
+	ldr	w4, [x3,x0]
+	ldr	w3, [x1,4]
+	cmp	w4, w3
+	bne	.L3110
+	ldr	x2, [x2,1144]
+	ldr	w2, [x2,x0]
+	ldr	w0, [x1,8]
+	cmp	w2, w0
+	beq	.L3111
+.L3110:
+	add	x26, x27, :lo12:.LANCHOR4
+	ldrh	w0, [x21,2918]
+	add	x4, x21, 2896
+	ldr	x1, [x26,1136]
+	ldr	w0, [x1,x0,lsl 2]
+	cmn	w0, #1
+	beq	.L3111
+	ldrb	w5, [x25,9]
+	adrp	x0, .LC262
+	ldrh	w3, [x21,3274]
+	add	x0, x0, :lo12:.LC262
+	mov	w2, 4
+	str	x4, [x29,104]
+	mul	w3, w5, w3
+	bl	rknand_print_hex
+	ldrb	w5, [x25,9]
+	adrp	x0, .LC263
+	ldrh	w3, [x21,3274]
+	add	x0, x0, :lo12:.LC263
+	ldr	x1, [x26,1144]
+	mov	w2, 4
+	mul	w3, w5, w3
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR2
+	ldr	x4, [x29,104]
+	ldr	w0, [x0,#:lo12:.LANCHOR2]
+	tbz	x0, 10, .L3112
+	ldr	x7, [x20,24]
+	ldrh	w4, [x4,22]
+	ldr	x5, [x26,1144]
+	ldr	w0, [x7,12]
+	lsl	x4, x4, 2
+	ldr	x3, [x26,1136]
+	str	w0, [sp]
+	adrp	x0, .LC264
+	add	x0, x0, :lo12:.LC264
+	ldr	w3, [x3,x4]
+	ldr	w6, [x7,4]
+	ldr	w4, [x5,x4]
+	ldr	w1, [x20,40]
+	ldr	w5, [x7]
+	ldr	w2, [x20,52]
+	ldr	w7, [x7,8]
+	bl	printk
+.L3112:
+	add	x19, x19, :lo12:.LANCHOR0
+	mov	x1, 0
+	ldr	x0, [x19,608]
+	ldrh	w0, [x0,80]
+	bl	ftl_sblk_dump
+	ldr	x0, [x19,600]
+	ldrh	w1, [x23,80]
+	strh	wzr, [x0,x1,lsl 1]
+	mov	w0, -1
+	b	.L3113
+.L3111:
+	ldrh	w0, [x21,2918]
+	add	w22, w22, 1
+	add	w0, w0, 1
+	strh	w0, [x21,2918]
+	b	.L3115
+.L3130:
+	add	w24, w24, 1
+	b	.L3106
+.L3129:
+	add	x19, x19, :lo12:.LANCHOR0
+	ldrh	w1, [x19,2912]
+	ldrb	w3, [x19,3348]
+	add	w0, w1, 1
+	strh	w0, [x19,2912]
+	mov	w0, 0
+	cbz	w3, .L3113
+	add	w1, w1, 2
+	strh	w1, [x19,2912]
+.L3113:
+	sub	sp, x29, #16
+	ldp	x19, x20, [sp,32]
+	ldp	x21, x22, [sp,48]
+	ldp	x23, x24, [sp,64]
+	ldp	x25, x26, [sp,80]
+	ldp	x27, x28, [sp,96]
+	ldp	x29, x30, [sp,16]
+	add	sp, sp, 128
+	ret
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.align	2
 	.global	ftl_update_l2p_map
 	.type	ftl_update_l2p_map, %function
 ftl_update_l2p_map:
@@ -19651,7 +19680,7 @@ ftl_update_l2p_map:
 	add	x0, x20, x24, sxtw 2
 	ldr	w0, [x0,-4]
 	cmn	w0, #1
-	beq	.L3130
+	beq	.L3132
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -19660,24 +19689,24 @@ ftl_update_l2p_map:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3130:
-	adrp	x0, .LC264
+.L3132:
+	adrp	x0, .LC266
 	mov	x28, 0
-	add	x0, x0, :lo12:.LC264
-	adrp	x27, .LC263
+	add	x0, x0, :lo12:.LC266
+	adrp	x27, .LC265
 	str	x0, [x29,120]
-	adrp	x0, .LC265
-	add	x0, x0, :lo12:.LC265
+	adrp	x0, .LC267
+	add	x0, x0, :lo12:.LC267
 	mov	w22, w28
 	str	x0, [x29,112]
-	add	x27, x27, :lo12:.LC263
-.L3131:
+	add	x27, x27, :lo12:.LC265
+.L3133:
 	cmp	w28, w24
 	mov	w25, w28
-	bge	.L3158
+	bge	.L3160
 	ldr	w2, [x20,x28,lsl 2]
 	cmn	w2, #1
-	beq	.L3132
+	beq	.L3134
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w21, [x0,2832]
 	adrp	x0, .LANCHOR2
@@ -19685,22 +19714,22 @@ ftl_update_l2p_map:
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	udiv	w21, w2, w21
 	and	w21, w21, 65535
-	tbz	x0, 12, .L3136
+	tbz	x0, 12, .L3138
 	mov	x0, x27
 	mov	w1, w21
 	mov	w3, w28
 	bl	printk
-.L3136:
+.L3138:
 	sbfiz	x26, x25, 2, 32
 	ldr	w0, [x20,x26]
 	cmn	w0, #1
-	beq	.L3134
+	beq	.L3136
 	add	x3, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x3,2832]
 	lsl	w1, w1, 7
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3134
+	bne	.L3136
 	ldrb	w0, [x23,9]
 	ldrh	w2, [x3,3350]
 	str	x3, [x29,104]
@@ -19714,13 +19743,13 @@ ftl_update_l2p_map:
 	ldr	w1, [x20,x26]
 	bl	pm_ppa_update_check
 	ldr	x3, [x29,104]
-	cbz	w0, .L3135
+	cbz	w0, .L3137
 	ldr	x1, [x3,3872]
 	mov	w2, 4
 	ldr	x0, [x29,112]
 	mov	w3, w24
 	bl	rknand_print_hex
-.L3135:
+.L3137:
 	ldr	w0, [x20,x26]
 	add	x1, x29, 140
 	mov	w2, 1
@@ -19729,27 +19758,27 @@ ftl_update_l2p_map:
 	uxth	w22, w22
 	mov	w0, -1
 	str	w0, [x20,x26]
-.L3134:
+.L3136:
 	add	w25, w25, 1
 	cmp	w25, w24
-	bne	.L3136
-.L3132:
+	bne	.L3138
+.L3134:
 	add	x28, x28, 1
-	b	.L3131
-.L3158:
+	b	.L3133
+.L3160:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3138
+	tbz	x0, 12, .L3140
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x23]
 	mov	w2, w22
 	ubfiz	x3, x1, 1, 16
 	ldr	x4, [x0,600]
-	adrp	x0, .LC266
-	add	x0, x0, :lo12:.LC266
+	adrp	x0, .LC268
+	add	x0, x0, :lo12:.LC268
 	ldrh	w3, [x4,x3]
 	bl	printk
-.L3138:
+.L3140:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x23]
 	ldr	x0, [x19,600]
@@ -19775,9 +19804,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3160
+	beq	.L3162
 	bl	zftl_insert_data_list
-.L3160:
+.L3162:
 	adrp	x0, .LANCHOR0+608
 	mov	w2, 2
 	mov	w1, 3
@@ -19816,10 +19845,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp,32]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-.L3164:
+.L3166:
 	ldrb	w0, [x24,2856]
 	adrp	x21, .LANCHOR0
-	cbz	w0, .L3166
+	cbz	w0, .L3168
 	ldrb	w1, [x24,2888]
 	sub	w0, w0, #1
 	ldr	x2, [x29,112]
@@ -19832,7 +19861,7 @@ ftl_write_commit:
 	strb	w1, [x24,2888]
 	ldr	w1, [x27,36]
 	cmp	w1, w0
-	bcc	.L3167
+	bcc	.L3169
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -19841,7 +19870,7 @@ ftl_write_commit:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3167:
+.L3169:
 	ldr	x0, [x29,128]
 	add	x1, x21, :lo12:.LANCHOR0
 	add	x4, x1, 784
@@ -19849,32 +19878,32 @@ ftl_write_commit:
 	ldr	w2, [x1,2840]
 	ldr	w23, [x0,36]
 	cmp	w23, w2
-	bcc	.L3168
+	bcc	.L3170
 	mov	x0, x27
 	bl	buf_free
 	mov	w0, -1
-	b	.L3222
-.L3168:
+	b	.L3224
+.L3170:
 	ldr	x25, [x0,8]
 	ldr	x28, [x0,24]
 	ldrb	w22, [x0,57]
 	ldrb	w20, [x0,56]
 	ldrb	w0, [x1,2857]
-	cbz	w0, .L3170
+	cbz	w0, .L3172
 	ldr	x0, [x29,120]
 	ldrb	w3, [x0,1267]
 	add	x3, x4, x3, lsl 6
-.L3171:
+.L3173:
 	ldrb	w5, [x3]
 	cmp	w5, 255
-	beq	.L3224
+	beq	.L3226
 	sbfiz	x3, x5, 6, 32
 	add	x3, x4, x3
-	b	.L3171
-.L3224:
+	b	.L3173
+.L3226:
 	ldr	w0, [x3,36]
 	cmp	w0, w23
-	bne	.L3170
+	bne	.L3172
 	ldr	x0, [x3,8]
 	ubfiz	x1, x22, 9, 8
 	lsl	w2, w20, 9
@@ -19883,29 +19912,29 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	mov	x0, x27
 	bl	buf_free
-	b	.L3164
-.L3170:
+	b	.L3166
+.L3172:
 	mov	w0, w23
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3174
+	bne	.L3176
 	mov	w0, w23
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
-.L3174:
+.L3176:
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w3, 0
 	add	x4, x4, 784
 	ldr	x19, [x4,-176]
 	add	x19, x19, 16
-.L3177:
+.L3179:
 	ldr	w0, [x4,36]
 	cmp	w0, w23
-	bne	.L3175
+	bne	.L3177
 	ldrb	w5, [x4,2]
-	tbz	x5, 3, .L3175
+	tbz	x5, 3, .L3177
 	add	x0, x21, :lo12:.LANCHOR0
 	ubfiz	x3, x3, 6, 32
 	add	x0, x0, 784
@@ -19915,22 +19944,22 @@ ftl_write_commit:
 	strb	w5, [x3,2]
 	ldr	x26, [x3,8]
 	str	w0, [x29,156]
-	b	.L3176
-.L3175:
+	b	.L3178
+.L3177:
 	add	w3, w3, 1
 	add	x4, x4, 64
 	cmp	w3, 32
-	bne	.L3177
+	bne	.L3179
 	mov	x26, 0
-.L3176:
+.L3178:
 	add	x3, x21, :lo12:.LANCHOR0
 	str	wzr, [x29,136]
 	ldrb	w0, [x3,2832]
 	cmp	w20, w0
-	bcs	.L3178
+	bcs	.L3180
 	add	w20, w22, w20
-	cbz	x26, .L3179
-	cbz	w22, .L3180
+	cbz	x26, .L3181
+	cbz	w22, .L3182
 	mov	x0, x25
 	mov	x1, x26
 	lsl	w2, w22, 9
@@ -19939,28 +19968,28 @@ ftl_write_commit:
 	ldr	x3, [x29,136]
 	ldr	x19, [x3,608]
 	add	x19, x19, 48
-.L3180:
+.L3182:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w2, [x0,2832]
 	cmp	w20, w2
-	bcc	.L3181
+	bcc	.L3183
 	ldr	x19, [x0,608]
 	add	x19, x19, 16
-	b	.L3223
-.L3181:
+	b	.L3225
+.L3183:
 	ubfiz	x1, x20, 9, 9
 	sub	w2, w2, w20
 	add	x0, x25, x1
 	lsl	w2, w2, 9
 	add	x1, x26, x1
 	bl	ftl_memcpy
-.L3223:
+.L3225:
 	str	wzr, [x29,136]
-	b	.L3178
-.L3179:
+	b	.L3180
+.L3181:
 	ldr	w0, [x29,156]
 	cmn	w0, #1
-	beq	.L3182
+	beq	.L3184
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x26, x0
@@ -19975,11 +20004,11 @@ ftl_write_commit:
 	add	w1, w1, 1
 	str	w1, [x29,136]
 	cmp	w0, w23
-	bne	.L3183
+	bne	.L3185
 	ldr	w0, [x26,52]
 	cmn	w0, #1
-	bne	.L3184
-.L3183:
+	bne	.L3186
+.L3185:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w2, [x29,156]
 	mov	w3, w23
@@ -19987,26 +20016,26 @@ ftl_write_commit:
 	ldr	w0, [x1,552]
 	add	w0, w0, 1
 	str	w0, [x1,552]
-	adrp	x0, .LC267
+	adrp	x0, .LC269
 	ldrb	w1, [x26,1]
-	add	x0, x0, :lo12:.LC267
+	add	x0, x0, :lo12:.LC269
 	ldr	w4, [x26,52]
 	bl	printk
-	adrp	x0, .LC202
+	adrp	x0, .LC201
 	mov	w2, 4
 	ldr	x1, [x26,24]
-	add	x0, x0, :lo12:.LC202
+	add	x0, x0, :lo12:.LC201
 	mov	w3, w2
 	bl	rknand_print_hex
-.L3184:
+.L3186:
 	ldr	x0, [x26,24]
 	ldr	w0, [x0,4]
 	cmp	w0, w23
-	bne	.L3185
+	bne	.L3187
 	ldr	w0, [x26,52]
 	cmn	w0, #1
-	bne	.L3186
-.L3185:
+	bne	.L3188
+.L3187:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -20015,55 +20044,55 @@ ftl_write_commit:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3186:
-	cbz	w22, .L3187
+.L3188:
+	cbz	w22, .L3189
 	ldr	w0, [x29,156]
 	lsl	w2, w22, 9
 	cmn	w0, #1
-	beq	.L3188
+	beq	.L3190
 	ldr	x1, [x26,8]
 	mov	x0, x25
 	bl	ftl_memcpy
-	b	.L3189
-.L3182:
-	cbz	w22, .L3187
+	b	.L3191
+.L3184:
+	cbz	w22, .L3189
 	lsl	w2, w22, 9
-.L3188:
+.L3190:
 	mov	x0, x25
 	mov	w1, 0
 	bl	ftl_memset
-.L3189:
+.L3191:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x19, [x0,608]
 	add	x19, x19, 48
-.L3187:
+.L3189:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w2, [x0,2832]
 	cmp	w20, w2
-	bcc	.L3190
-	bls	.L3191
+	bcc	.L3192
+	bls	.L3193
 	ldr	x19, [x0,608]
 	add	x19, x19, 16
-	b	.L3191
-.L3190:
+	b	.L3193
+.L3192:
 	ldr	w0, [x29,156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3192
+	beq	.L3194
 	ldr	x1, [x26,8]
 	lsl	x20, x0, 2
 	add	x0, x25, x20
 	add	x1, x1, x20
 	bl	ftl_memcpy
-	b	.L3191
-.L3192:
+	b	.L3193
+.L3194:
 	add	x0, x25, x0, lsl 2
 	mov	w1, 0
 	bl	ftl_memset
-.L3191:
-	cbz	x26, .L3178
+.L3193:
+	cbz	x26, .L3180
 	ldrb	w0, [x26,2]
 	mov	x1, x26
 	and	w0, w0, -9
@@ -20073,13 +20102,13 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x26
 	bl	buf_free
-.L3178:
+.L3180:
 	ldrh	w0, [x19,6]
-	cbnz	w0, .L3193
+	cbnz	w0, .L3195
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3193:
+.L3195:
 	mov	x0, x19
 	add	x20, x21, :lo12:.LANCHOR0
 	bl	ftl_get_new_free_page
@@ -20119,11 +20148,11 @@ ftl_write_commit:
 	str	w0, [x1,1268]
 	cmp	w2, 2
 	adrp	x0, .LANCHOR4
-	bhi	.L3194
+	bhi	.L3196
 	ldrh	w1, [x19,6]
 	cmp	w1, 1
-	bne	.L3166
-.L3194:
+	bne	.L3168
+.L3196:
 	ldrb	w1, [x19,5]
 	mov	w4, 2
 	add	x6, x21, :lo12:.LANCHOR0
@@ -20137,14 +20166,14 @@ ftl_write_commit:
 	ldrb	w5, [x1,1267]
 	mov	w1, 0
 	mov	w3, w5
-.L3198:
+.L3200:
 	cmp	w1, w4
-	beq	.L3225
+	beq	.L3227
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x6,x3]
-	b	.L3198
-.L3225:
+	b	.L3200
+.L3227:
 	add	x0, x0, :lo12:.LANCHOR4
 	uxtb	w1, w1
 	sub	w2, w2, w1
@@ -20157,20 +20186,20 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bne	.L3166
+	bne	.L3168
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3166:
+.L3168:
 	add	x21, x21, :lo12:.LANCHOR0
 	ldrb	w19, [x21,2856]
-	cbnz	w19, .L3164
+	cbnz	w19, .L3166
 	bl	ftl_write_completed
 	mov	w0, w19
-.L3222:
+.L3224:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -20195,10 +20224,10 @@ gc_do_copy_back:
 	stp	x27, x28, [sp,96]
 	ldrb	w0, [x21,3273]
 	ldr	x22, [x21,608]
-	cbnz	w0, .L3227
+	cbnz	w0, .L3229
 	bl	buf_alloc
 	mov	x20, x0
-	cbz	x0, .L3226
+	cbz	x0, .L3228
 	ldrh	w22, [x21,2922]
 	mov	w0, w22
 	add	w22, w22, 1
@@ -20211,60 +20240,60 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	w0, [x20,52]
 	cmp	w0, 512
-	beq	.L3280
+	beq	.L3282
 	cmn	w0, #1
-	bne	.L3229
-.L3280:
+	bne	.L3231
+.L3282:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 595
+	mov	w2, 600
 	add	x1, x1, 784
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3229:
+.L3231:
 	ldr	x0, [x20,24]
 	ldr	w21, [x0,4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,144]
 	cmn	w0, #1
-	bne	.L3231
+	bne	.L3233
 	mov	w0, w21
 	add	x1, x29, 144
 	mov	w2, 0
 	bl	pm_log2phys
-.L3231:
+.L3233:
 	ldr	w22, [x29,144]
 	cmp	w22, w23
-	bne	.L3232
+	bne	.L3234
 	add	x1, x19, :lo12:.LANCHOR0
 	add	x0, x1, 784
 	add	x1, x1, 2832
-.L3235:
+.L3237:
 	ldr	w2, [x0,36]
 	cmp	w2, w21
-	bne	.L3233
+	bne	.L3235
 	ldrb	w2, [x0,2]
-	tbz	x2, 1, .L3233
+	tbz	x2, 1, .L3235
 	mov	x0, x20
 	bl	buf_free
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3226
+	tbz	x0, 8, .L3228
 	add	x19, x19, :lo12:.LANCHOR0
-	adrp	x0, .LC268
+	adrp	x0, .LC270
 	mov	w1, w21
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC268
+	add	x0, x0, :lo12:.LC270
 	ldrh	w3, [x19,2922]
 	bl	printk
-	b	.L3226
-.L3233:
+	b	.L3228
+.L3235:
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3235
+	bne	.L3237
 	add	x23, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x20,2]
 	str	w21, [x20,36]
@@ -20279,20 +20308,20 @@ gc_do_copy_back:
 	str	w0, [x20,32]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3236
+	tbz	x0, 8, .L3238
 	ldr	w2, [x29,144]
 	mov	w0, w21
 	str	x2, [x29,136]
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	ldr	x2, [x29,136]
-	adrp	x0, .LC269
+	adrp	x0, .LC271
 	ldrh	w5, [x23,2922]
-	add	x0, x0, :lo12:.LC269
+	add	x0, x0, :lo12:.LC271
 	mov	w1, w21
 	mov	w4, w22
 	bl	printk
-.L3236:
+.L3238:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	x0, x20
 	bl	ftl_gc_write_buf
@@ -20304,34 +20333,34 @@ gc_do_copy_back:
 	ldrh	w0, [x19,2924]
 	add	w0, w0, 1
 	strh	w0, [x19,2924]
-	b	.L3226
-.L3232:
+	b	.L3228
+.L3234:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3238
+	tbz	x0, 8, .L3240
 	mov	w0, w21
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	ldrh	w5, [x19,2922]
-	adrp	x0, .LC269
-	add	x0, x0, :lo12:.LC269
+	adrp	x0, .LC271
+	add	x0, x0, :lo12:.LC271
 	mov	w1, w21
 	mov	w2, w22
 	mov	w4, w23
 	bl	printk
-.L3238:
+.L3240:
 	mov	x0, x20
 	bl	buf_free
-	b	.L3226
-.L3227:
+	b	.L3228
+.L3229:
 	ldrb	w24, [x21,3257]
 	add	x0, x21, 2896
 	add	x22, x22, 80
 	cmp	w24, 3
-	bne	.L3239
+	bne	.L3241
 	ldrb	w1, [x21,3272]
-	cbz	w1, .L3240
+	cbz	w1, .L3242
 	ldrb	w20, [x22,9]
 	ldrh	w21, [x0,314]
 	str	w24, [x29,136]
@@ -20340,8 +20369,8 @@ gc_do_copy_back:
 	sdiv	w23, w21, w23
 	madd	w20, w23, w20, w21
 	uxth	w20, w20
-	b	.L3242
-.L3240:
+	b	.L3244
+.L3242:
 	ldrh	w20, [x0,314]
 	adrp	x0, .LANCHOR2
 	ldrb	w21, [x22,9]
@@ -20358,9 +20387,9 @@ gc_do_copy_back:
 	cmp	w25, 1
 	add	w21, w21, w21, lsl 1
 	uxth	w21, w21
-	bne	.L3243
-	b	.L3242
-.L3239:
+	bne	.L3245
+	b	.L3244
+.L3241:
 	ldrb	w20, [x22,9]
 	ldrb	w1, [x21,3348]
 	ldrh	w21, [x0,314]
@@ -20368,38 +20397,38 @@ gc_do_copy_back:
 	sdiv	w23, w21, w20
 	msub	w20, w23, w20, w21
 	uxth	w20, w20
-	cbz	w1, .L3321
+	cbz	w1, .L3323
 	mov	w0, 2
-.L3321:
+.L3323:
 	str	w0, [x29,136]
-.L3242:
+.L3244:
 	mov	w25, 0
 	add	x24, x19, :lo12:.LANCHOR0
 	adrp	x3, .LANCHOR4
-.L3245:
+.L3247:
 	ldrb	w1, [x22,9]
 	ldr	w0, [x29,136]
 	mul	w0, w0, w1
 	cmp	w25, w0
-	bge	.L3278
+	bge	.L3280
 	ldrh	w0, [x24,3274]
 	add	w26, w21, w25
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w26, w0
-	beq	.L3278
+	beq	.L3280
 	add	x0, x3, :lo12:.LANCHOR4
 	sbfiz	x26, x26, 2, 32
 	ldr	x1, [x0,1144]
 	ldr	w0, [x1,x26]
 	cmn	w0, #1
-	bne	.L3246
+	bne	.L3248
 	ldrh	w27, [x24,2922]
 	ldrh	w0, [x24,2920]
 	str	x3, [x29,120]
 	str	x1, [x29,128]
 	cmp	w0, w27
-	bls	.L3226
+	bls	.L3228
 	mov	w0, w27
 	add	w27, w27, 1
 	bl	gc_get_src_ppa_from_index
@@ -20407,17 +20436,17 @@ gc_do_copy_back:
 	ldr	x1, [x29,128]
 	ldr	x3, [x29,120]
 	str	w0, [x1,x26]
-.L3246:
+.L3248:
 	add	w25, w25, 1
 	uxth	w25, w25
-	b	.L3245
-.L3278:
+	b	.L3247
+.L3280:
 	mov	w25, 1
-.L3243:
+.L3245:
 	adrp	x0, .LANCHOR2
 	str	x0, [x29,120]
 	ldr	w1, [x0,#:lo12:.LANCHOR2]
-	tbz	x1, 8, .L3248
+	tbz	x1, 8, .L3250
 	adrp	x0, .LANCHOR4+1144
 	add	x4, x19, :lo12:.LANCHOR0
 	ubfiz	x5, x21, 2, 16
@@ -20425,13 +20454,13 @@ gc_do_copy_back:
 	mov	w2, w25
 	mov	w3, w20
 	ldr	x6, [x0,#:lo12:.LANCHOR4+1144]
-	adrp	x0, .LC270
+	adrp	x0, .LC272
 	ldrh	w4, [x4,3210]
-	add	x0, x0, :lo12:.LC270
+	add	x0, x0, :lo12:.LC272
 	ldr	w5, [x6,x5]
 	mov	w6, w21
 	bl	printk
-.L3248:
+.L3250:
 	adrp	x0, .LC0
 	mov	w27, 0
 	add	x0, x0, :lo12:.LC0
@@ -20440,12 +20469,12 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LANCHOR3
 	add	x0, x0, 784
 	str	x0, [x29,104]
-.L3249:
+.L3251:
 	ldrb	w0, [x22,9]
 	ldr	w1, [x29,136]
 	mul	w0, w1, w0
 	cmp	w27, w0
-	bge	.L3325
+	bge	.L3327
 	add	w26, w21, w27
 	sxtw	x0, w26
 	str	x0, [x29,128]
@@ -20454,11 +20483,11 @@ gc_do_copy_back:
 	ldr	x0, [x0,3264]
 	ldrb	w0, [x0,x1]
 	cmp	w0, 255
-	bne	.L3250
+	bne	.L3252
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x24, x0
-	cbnz	x0, .L3251
+	cbnz	x0, .L3253
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -20466,8 +20495,8 @@ gc_do_copy_back:
 	mov	w0, w24
 	bl	buf_alloc
 	mov	x24, x0
-	cbz	x0, .L3226
-.L3251:
+	cbz	x0, .L3228
+.L3253:
 	add	x28, x19, :lo12:.LANCHOR0
 	ldr	x2, [x29,128]
 	ldrb	w1, [x24,1]
@@ -20484,7 +20513,7 @@ gc_do_copy_back:
 	sub	w0, w0, #1
 	cmp	w26, w0
 	adrp	x26, .LANCHOR4
-	bne	.L3252
+	bne	.L3254
 	add	x26, x26, :lo12:.LANCHOR4
 	mov	w1, -1
 	ldr	x0, [x26,1136]
@@ -20524,8 +20553,8 @@ gc_do_copy_back:
 	ldr	x1, [x28,608]
 	ldr	x0, [x24,24]
 	ldr	w1, [x1,132]
-	b	.L3322
-.L3252:
+	b	.L3324
+.L3254:
 	ldr	x0, [x29,128]
 	mov	w1, 1
 	lsl	x28, x0, 2
@@ -20537,10 +20566,10 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3253
+	beq	.L3255
 	cmn	w0, #1
-	bne	.L3254
-.L3253:
+	bne	.L3256
+.L3255:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w2, 21
 	mov	w1, 1
@@ -20557,35 +20586,35 @@ gc_do_copy_back:
 	bl	ftl_sblk_dump
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3281
+	beq	.L3283
 	cmn	w0, #1
-	bne	.L3254
-.L3281:
+	bne	.L3256
+.L3283:
 	ldr	x0, [x24,24]
 	mov	w1, -1
 	str	w1, [x0,4]
-.L3254:
+.L3256:
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3282
+	beq	.L3284
 	cmn	w0, #1
-	bne	.L3257
-.L3282:
+	bne	.L3259
+.L3284:
 	ldr	x1, [x29,104]
-	mov	w2, 710
+	mov	w2, 715
 	ldr	x0, [x29,112]
 	bl	printk
 	bl	dump_stack
-.L3257:
+.L3259:
 	ldr	x1, [x24,24]
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x1,4]
 	ldr	w0, [x0,2840]
 	cmp	w2, w0
-	bcc	.L3259
+	bcc	.L3261
 	mov	w0, -1
 	str	w0, [x1,4]
-.L3259:
+.L3261:
 	ldr	x0, [x24,24]
 	add	x26, x26, :lo12:.LANCHOR4
 	ldr	w1, [x0,4]
@@ -20593,9 +20622,9 @@ gc_do_copy_back:
 	str	w1, [x0,x28]
 	ldr	x0, [x24,24]
 	ldr	w1, [x24,40]
-.L3322:
+.L3324:
 	str	w1, [x0,8]
-.L3250:
+.L3252:
 	add	x3, x19, :lo12:.LANCHOR0
 	ldr	x2, [x29,128]
 	add	x1, x3, 784
@@ -20611,7 +20640,7 @@ gc_do_copy_back:
 	cmp	w0, 3
 	strb	w25, [x1,61]
 	adrp	x2, .LANCHOR4
-	bne	.L3260
+	bne	.L3262
 	udiv	w0, w27, w0
 	ldrh	w3, [x3,3350]
 	add	x2, x2, :lo12:.LANCHOR4
@@ -20629,30 +20658,30 @@ gc_do_copy_back:
 	add	w0, w0, 1
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x1,x4,lsl 2]
-	b	.L3261
-.L3260:
+	b	.L3263
+.L3262:
 	cmp	w0, 2
-	bne	.L3262
+	bne	.L3264
 	ldrb	w6, [x3,3348]
 	add	x1, x1, 32
 	ldrh	w0, [x3,3350]
-	cbnz	w6, .L3263
+	cbnz	w6, .L3265
 	add	w3, w27, w20
 	add	x3, x22, x3, sxtw 1
 	ldrh	w3, [x3,16]
 	madd	w0, w3, w0, w23
-	b	.L3324
-.L3263:
+	b	.L3326
+.L3265:
 	add	w3, w20, w27, lsr 1
 	add	x3, x22, x3, sxtw 1
 	ldrh	w3, [x3,16]
 	madd	w0, w3, w0, w23
 	and	w3, w27, 1
 	add	w0, w0, w3
-.L3324:
+.L3326:
 	orr	w0, w0, 33554432
 	str	w0, [x1,8]
-.L3262:
+.L3264:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR4
 	add	x0, x0, 784
@@ -20661,10 +20690,10 @@ gc_do_copy_back:
 	ldrh	w1, [x0,48]
 	ldr	x0, [x2,1152]
 	str	w3, [x0,x1,lsl 2]
-.L3261:
+.L3263:
 	ldr	x0, [x29,120]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3264
+	tbz	x0, 8, .L3266
 	add	x0, x29, 144
 	ldr	x1, [x29,128]
 	mov	w2, w25
@@ -20683,57 +20712,57 @@ gc_do_copy_back:
 	ldr	x0, [x5,24]
 	ldr	w0, [x0,4]
 	str	w0, [sp,8]
-	adrp	x0, .LC271
-	add	x0, x0, :lo12:.LC271
+	adrp	x0, .LC273
+	add	x0, x0, :lo12:.LC273
 	ldr	w5, [x5,40]
 	bl	printk
-.L3264:
+.L3266:
 	add	w8, w27, 1
 	uxth	w27, w8
-	b	.L3249
-.L3325:
+	b	.L3251
+.L3327:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w0, [x2,3257]
 	cmp	w0, 3
 	add	x0, x29, 144
-	bne	.L3308
+	bne	.L3310
 	ldrb	w1, [x2,3272]
-	cbz	w1, .L3267
-.L3270:
+	cbz	w1, .L3269
+.L3272:
 	ldr	x1, [x29,144]
 	strb	wzr, [x1,60]
-	b	.L3268
-.L3267:
+	b	.L3270
+.L3269:
 	cmp	w25, 1
 	mov	w2, 9
-	beq	.L3323
+	beq	.L3325
 	cmp	w25, 2
-	bne	.L3270
+	bne	.L3272
 	mov	w2, 13
-.L3323:
+.L3325:
 	ldr	x1, [x29,144]
 	strb	w2, [x1,60]
-.L3268:
+.L3270:
 	ldrb	w2, [x22,9]
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-	b	.L3271
-.L3308:
+	b	.L3273
+.L3310:
 	ldrb	w2, [x22,9]
 	ldr	w3, [x29,136]
 	mul	w2, w2, w3
 	sub	w2, w2, #1
 	cmp	w1, w2
-	bge	.L3326
+	bge	.L3328
 	ldr	x2, [x0,w1,sxtw 3]
 	add	w1, w1, 1
 	ldr	x3, [x0,w1,sxtw 3]
 	uxth	w1, w1
 	ldrb	w3, [x3,1]
 	strb	w3, [x2]
-	b	.L3308
-.L3326:
+	b	.L3310
+.L3328:
 	ldr	x0, [x0,w2,sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
@@ -20741,20 +20770,20 @@ gc_do_copy_back:
 	ldr	x0, [x29,144]
 	mul	w1, w3, w1
 	bl	sblk_prog_page
-.L3271:
+.L3273:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x22,9]
 	ldrb	w3, [x1,3272]
-	cbz	w3, .L3273
+	cbz	w3, .L3275
 	add	w0, w2, w2, lsl 1
 	and	w2, w0, 1023
-	b	.L3274
-.L3273:
+	b	.L3276
+.L3275:
 	ldrb	w1, [x1,3348]
 	ubfiz	w0, w2, 1, 8
 	cmp	w1, wzr
 	csel	w2, w0, w2, ne
-.L3274:
+.L3276:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldr	w0, [x1,52]
@@ -20768,12 +20797,12 @@ gc_do_copy_back:
 	ldrb	w2, [x22,9]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	blt	.L3275
+	blt	.L3277
 	ldr	x0, [x19,608]
 	strh	wzr, [x0,86]
-.L3275:
+.L3277:
 	bl	gc_write_completed
-.L3226:
+.L3228:
 	sub	sp, x29, #16
 	ldp	x19, x20, [sp,32]
 	ldp	x21, x22, [sp,48]
@@ -20806,63 +20835,63 @@ zftl_do_gc:
 	add	w20, w0, w20
 	ldrh	w22, [x1,2846]
 	uxth	w20, w20
-	bne	.L3328
+	bne	.L3330
 	adrp	x21, .LANCHOR7
 	add	x1, x21, :lo12:.LANCHOR7
 	ldr	w23, [x1,-80]
-	cbnz	w23, .L3329
+	cbnz	w23, .L3331
 	ldr	w1, [x1,-76]
-	cbz	w1, .L3328
-.L3329:
+	cbz	w1, .L3330
+.L3331:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1,3306]
 	cmp	w20, w2, lsr 2
-	bls	.L3328
+	bls	.L3330
 	ldrh	w1, [x1,2872]
 	cmp	w1, w20
-	bcs	.L3328
+	bcs	.L3330
 	add	w23, w23, 20
 	bl	timer_get_time
 	cmp	w23, w0
-	bcs	.L3330
+	bcs	.L3332
 	add	x0, x21, :lo12:.LANCHOR7
 	str	wzr, [x0,-80]
-.L3330:
+.L3332:
 	add	x19, x21, :lo12:.LANCHOR7
 	ldr	w20, [x19,-76]
 	bl	timer_get_time
 	add	w20, w20, 20
 	cmp	w20, w0
-	bcs	.L3511
+	bcs	.L3515
 	str	wzr, [x19,-76]
-	b	.L3511
-.L3328:
+	b	.L3515
+.L3330:
 	adrp	x23, .LANCHOR4
 	add	x1, x23, :lo12:.LANCHOR4
 	ldrb	w2, [x1,1130]
 	mov	w1, 16
 	cmp	w2, 6
-	bhi	.L3484
-	adrp	x1, .L3334
-	add	x1, x1, :lo12:.L3334
+	bhi	.L3488
+	adrp	x1, .L3336
+	add	x1, x1, :lo12:.L3336
 	ldrh	w1, [x1,w2,uxtw #1]
-	adr	x2, .Lrtx3334
+	adr	x2, .Lrtx3336
 	add	x1, x2, w1, sxth #2
 	br	x1
-.Lrtx3334:
+.Lrtx3336:
 	.section	.rodata
 	.align	0
 	.align	2
-.L3334:
-	.2byte	(.L3333 - .Lrtx3334) / 4
-	.2byte	(.L3335 - .Lrtx3334) / 4
-	.2byte	(.L3336 - .Lrtx3334) / 4
-	.2byte	(.L3337 - .Lrtx3334) / 4
-	.2byte	(.L3338 - .Lrtx3334) / 4
-	.2byte	(.L3442 - .Lrtx3334) / 4
-	.2byte	(.L3340 - .Lrtx3334) / 4
+.L3336:
+	.2byte	(.L3335 - .Lrtx3336) / 4
+	.2byte	(.L3337 - .Lrtx3336) / 4
+	.2byte	(.L3338 - .Lrtx3336) / 4
+	.2byte	(.L3339 - .Lrtx3336) / 4
+	.2byte	(.L3340 - .Lrtx3336) / 4
+	.2byte	(.L3446 - .Lrtx3336) / 4
+	.2byte	(.L3342 - .Lrtx3336) / 4
 	.text
-.L3333:
+.L3335:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	w22, w22, w0
 	ldrh	w1, [x24,80]
@@ -20873,12 +20902,12 @@ zftl_do_gc:
 	mov	w0, 65535
 	cmp	w1, w0
 	uxth	w25, w25
-	beq	.L3341
-	cbnz	w26, .L3342
+	beq	.L3343
+	cbnz	w26, .L3344
 	ldrh	w0, [x21,2872]
 	cmp	w20, w0, lsl 1
-	bge	.L3511
-.L3342:
+	bge	.L3515
+.L3344:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w1, 5
 	ldrh	w0, [x21,3304]
@@ -20889,7 +20918,7 @@ zftl_do_gc:
 	uxth	w2, w0
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3344
+	beq	.L3346
 	add	x3, x23, :lo12:.LANCHOR4
 	ubfiz	x2, x2, 1, 16
 	ldr	w1, [x3,1132]
@@ -20899,112 +20928,112 @@ zftl_do_gc:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x21,3300]
 	cmp	w3, w2
-	bcs	.L3345
+	bcs	.L3347
 	ldrh	w3, [x21,576]
 	cmp	w1, w3, lsr 4
-	bls	.L3344
+	bls	.L3346
 	ldrh	w1, [x21,2874]
 	cmp	w1, w2
-	bls	.L3344
-.L3345:
+	bls	.L3346
+.L3347:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w2, [x2,3273]
 	bl	gc_add_sblk
-	cbz	w0, .L3346
+	cbz	w0, .L3348
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	str	wzr, [x23,1132]
 	strb	w0, [x23,1130]
-	b	.L3511
-.L3344:
+	b	.L3515
+.L3346:
 	add	x0, x19, :lo12:.LANCHOR0
 	strh	wzr, [x0,3304]
-.L3346:
+.L3348:
 	cmp	w22, 15
 	mov	w21, 2
-	bls	.L3347
-	cbz	w25, .L3444
+	bls	.L3349
+	cbz	w25, .L3448
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w21, 1
 	ldrh	w1, [x0,2854]
 	ldrh	w0, [x0,3308]
 	cmp	w1, w0
-	bls	.L3347
-.L3444:
+	bls	.L3349
+.L3448:
 	mov	w21, 2
-.L3347:
+.L3349:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3348
+	tbz	x0, 8, .L3350
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w3, w20
 	mov	w4, w22
 	ldr	x0, [x1,608]
 	ldrb	w2, [x1,3273]
-	mov	w1, 1848
+	mov	w1, 1853
 	ldrh	w5, [x0,124]
 	ldrh	w6, [x0,120]
 	ldrh	w7, [x0,122]
 	ldrh	w0, [x24,80]
 	str	w0, [sp]
-	adrp	x0, .LC272
-	add	x0, x0, :lo12:.LC272
+	adrp	x0, .LC274
+	add	x0, x0, :lo12:.LC274
 	bl	printk
-.L3348:
+.L3350:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, w21
 	mov	w2, 1
 	ldrb	w0, [x19,3273]
 	bl	gc_search_src_blk
 	cmp	w0, wzr
-	ble	.L3349
-.L3350:
+	ble	.L3351
+.L3352:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
-	b	.L3514
-.L3349:
+	b	.L3518
+.L3351:
 	ldrb	w0, [x19,3273]
 	mov	w1, 3
 	mov	w2, 1
 	bl	gc_search_src_blk
 	cmp	w0, wzr
-	bgt	.L3350
-	b	.L3511
-.L3341:
+	bgt	.L3352
+	b	.L3515
+.L3343:
 	cmp	w26, 1
-	bne	.L3351
+	bne	.L3353
 	bl	gc_scan_static_data
 	ldr	x0, [x21,608]
 	ldrh	w0, [x0,122]
-	cbz	w0, .L3352
-.L3353:
+	cbz	w0, .L3354
+.L3355:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	w0, [x19,3273]
-	b	.L3514
-.L3352:
+	b	.L3518
+.L3354:
 	bl	gc_static_wearleveling
-	cbnz	w0, .L3353
+	cbnz	w0, .L3355
 	bl	gc_block_vpn_scan
-	cbz	w22, .L3445
+	cbz	w22, .L3449
 	cmp	w20, w25
-	bcs	.L3356
+	bcs	.L3358
 	ldrh	w0, [x21,3306]
 	cmp	w20, w0, lsl 1
-	blt	.L3357
-.L3356:
+	blt	.L3359
+.L3358:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	w1, w20, w25
 	ldrh	w2, [x0,3306]
 	cmp	w1, w2, lsl 1
-	blt	.L3357
+	blt	.L3359
 	ldrh	w1, [x0,2854]
 	ldrh	w0, [x0,3308]
 	cmp	w1, w0
-	bcc	.L3445
-.L3357:
+	bcc	.L3449
+.L3359:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x27, x23, :lo12:.LANCHOR4
 	mov	w28, 1
@@ -21014,17 +21043,17 @@ zftl_do_gc:
 	strb	w28, [x21,3273]
 	str	w1, [x27,1132]
 	cmp	w1, w0, lsr 5
-	bls	.L3359
+	bls	.L3361
 	ldrh	w0, [x21,2854]
 	cmp	w0, w22
-	bls	.L3359
+	bls	.L3361
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	uxth	w1, w0
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3445
+	beq	.L3449
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x21,600]
 	ldrb	w2, [x21,3276]
@@ -21033,47 +21062,47 @@ zftl_do_gc:
 	ldrh	w1, [x21,3300]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	bgt	.L3355
+	bgt	.L3357
 	str	wzr, [x27,1132]
 	mov	w0, w28
 	mov	w1, 2
-	b	.L3504
-.L3359:
+	b	.L3508
+.L3361:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x0,2854]
 	ldrh	w1, [x0,3308]
 	cmp	w2, w1
-	bcc	.L3362
+	bcc	.L3364
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
-	b	.L3505
-.L3362:
+	b	.L3509
+.L3364:
 	ldrh	w24, [x0,2850]
-	cbnz	w24, .L3363
+	cbnz	w24, .L3365
 	ldrh	w0, [x0,2852]
 	cmp	w0, 8
-	bls	.L3355
-.L3363:
+	bls	.L3357
+.L3365:
 	mov	w0, 1
 	mov	w1, w0
-.L3504:
+.L3508:
 	mov	w2, 4
-.L3505:
+.L3509:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3350
-	b	.L3445
-.L3351:
+	cbnz	w0, .L3352
+	b	.L3449
+.L3353:
 	ldrh	w0, [x21,2872]
 	cmp	w0, w20
-	bcc	.L3511
-.L3445:
+	bcc	.L3515
+.L3449:
 	mov	w24, 16
-.L3355:
+.L3357:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldr	w0, [x21,2884]
-	cbz	w0, .L3364
+	cbz	w0, .L3366
 	mov	w0, 1
 	mov	w1, 5
 	strb	w0, [x21,3273]
@@ -21083,105 +21112,105 @@ zftl_do_gc:
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3365
+	beq	.L3367
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x21,600]
 	ldrh	w1, [x2,x1]
 	cmp	w1, 8
-	bhi	.L3365
+	bhi	.L3367
 	mov	w2, 1
 	mov	w1, 0
 	str	w2, [x21,2884]
 	bl	gc_add_sblk
-	cbnz	w0, .L3350
-.L3365:
+	cbnz	w0, .L3352
+.L3367:
 	mov	w1, 4
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3366
+	beq	.L3368
 	add	x3, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x3,600]
 	ldrh	w1, [x2,x1]
 	cmp	w1, 4
-	bhi	.L3366
+	bhi	.L3368
 	mov	w2, 1
 	mov	w1, 0
 	str	w2, [x3,2884]
 	bl	gc_add_sblk
-	cbnz	w0, .L3350
-.L3366:
+	cbnz	w0, .L3352
+.L3368:
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.12
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3364
+	beq	.L3366
 	add	x2, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2,600]
 	ldrh	w1, [x3,x1]
 	cmp	w1, 4
-	bhi	.L3364
+	bhi	.L3366
 	mov	w1, 1
 	str	w1, [x2,2884]
 	mov	w2, 0
 	bl	gc_add_sblk
-	cbnz	w0, .L3350
-.L3364:
+	cbnz	w0, .L3352
+.L3366:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	ldr	x7, [x21,608]
 	strb	w0, [x21,3273]
 	ldrh	w5, [x7,124]
-	cbz	w5, .L3367
+	cbz	w5, .L3369
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	wzr, [x21,3273]
 	strb	w0, [x23,1130]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3368
+	tbz	x0, 8, .L3370
 	ldrh	w6, [x7,120]
-	adrp	x0, .LC273
+	adrp	x0, .LC275
 	ldrh	w7, [x7,122]
-	mov	w1, 1946
+	mov	w1, 1951
 	mov	w2, 0
 	mov	w3, w20
 	mov	w4, w22
-	add	x0, x0, :lo12:.LC273
+	add	x0, x0, :lo12:.LC275
 	bl	printk
-	b	.L3368
-.L3367:
+	b	.L3370
+.L3369:
 	ldrh	w2, [x21,2872]
 	cmp	w20, w2
-	bcs	.L3369
-	cbz	w22, .L3370
+	bcs	.L3371
+	cbz	w22, .L3372
 	cmp	w22, 16
-	bls	.L3371
+	bls	.L3373
 	ldrh	w2, [x21,2854]
 	ldrh	w1, [x21,3308]
 	cmp	w2, w1
-	bhi	.L3371
+	bhi	.L3373
 	mov	w1, w0
 	mov	w2, 4
 	str	x5, [x29,104]
 	bl	gc_search_src_blk
 	uxth	w0, w0
 	ldr	x5, [x29,104]
-	cbnz	w0, .L3372
+	cbnz	w0, .L3374
 	ldrb	w0, [x21,3273]
-	b	.L3513
-.L3372:
+	b	.L3517
+.L3374:
 	mov	w1, 5
 	mov	w0, w5
 	bl	zftl_get_gc_node
 	uxth	w2, w0
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3439
+	beq	.L3443
 	add	x3, x23, :lo12:.LANCHOR4
 	ubfiz	x2, x2, 1, 16
 	ldr	w1, [x3,1132]
@@ -21191,14 +21220,14 @@ zftl_do_gc:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x21,3300]
 	cmp	w3, w2
-	bcs	.L3375
+	bcs	.L3377
 	ldrh	w3, [x21,576]
 	cmp	w1, w3, lsr 4
-	bls	.L3439
+	bls	.L3443
 	ldrh	w1, [x21,2874]
 	cmp	w1, w2
-	bls	.L3439
-.L3375:
+	bls	.L3443
+.L3377:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w2, [x19,3273]
@@ -21207,71 +21236,71 @@ zftl_do_gc:
 	str	w0, [x19,2884]
 	add	x0, x23, :lo12:.LANCHOR4
 	str	wzr, [x0,1132]
-	b	.L3439
-.L3371:
+	b	.L3443
+.L3373:
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3439
+	cbnz	w0, .L3443
 	add	x19, x19, :lo12:.LANCHOR0
-.L3510:
+.L3514:
 	ldrb	w0, [x19,3273]
 	mov	w1, 3
 	mov	w2, 2
-.L3507:
+.L3511:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	b	.L3373
-.L3370:
+	b	.L3375
+.L3372:
 	adrp	x0, .LANCHOR2
 	strb	w22, [x21,3273]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3377
-	adrp	x0, .LC273
+	tbz	x0, 8, .L3379
+	adrp	x0, .LC275
 	ldrh	w6, [x7,120]
 	ldrh	w7, [x7,122]
-	add	x0, x0, :lo12:.LC273
-	mov	w1, 1976
+	add	x0, x0, :lo12:.LC275
+	mov	w1, 1981
 	mov	w2, w22
 	mov	w3, w20
 	mov	w4, w22
 	mov	w5, w22
 	bl	printk
-.L3377:
+.L3379:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w20, 16
 	ldrb	w0, [x19,3273]
-	bls	.L3378
-.L3513:
+	bls	.L3380
+.L3517:
 	mov	w1, 3
 	mov	w2, 4
-	b	.L3507
-.L3378:
+	b	.L3511
+.L3380:
 	mov	w1, 1
 	mov	w2, w1
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3439
-	b	.L3510
-.L3369:
+	cbnz	w0, .L3443
+	b	.L3514
+.L3371:
 	cmp	w26, 1
 	mov	w1, w24
-	bne	.L3484
+	bne	.L3488
 	cmp	w20, w2, lsl 1
-	bge	.L3379
+	bge	.L3381
 	cmp	w25, w22, lsr 1
-	bcs	.L3380
+	bcs	.L3382
 	ldrh	w2, [x21,2854]
 	ldrh	w0, [x21,3308]
 	cmp	w2, w0
-	bcs	.L3380
+	bcs	.L3382
 	ldrh	w0, [x21,3306]
 	lsr	w0, w0, 2
 	strh	w0, [x21,2872]
-	b	.L3484
-.L3380:
+	b	.L3488
+.L3382:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -21279,12 +21308,12 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w27, w21
 	cmp	w21, w1
-	bne	.L3381
-.L3386:
+	bne	.L3383
+.L3388:
 	cmp	w22, 1
-	bhi	.L3382
-	b	.L3383
-.L3381:
+	bhi	.L3384
+	b	.L3385
+.L3383:
 	add	x26, x23, :lo12:.LANCHOR4
 	add	x2, x19, :lo12:.LANCHOR0
 	uxtw	x21, w21
@@ -21293,94 +21322,94 @@ zftl_do_gc:
 	add	w1, w1, 1
 	str	w1, [x26,1132]
 	cmp	w1, w3, lsr 4
-	bls	.L3384
+	bls	.L3386
 	ldr	x1, [x2,600]
 	str	wzr, [x26,1132]
 	ldrh	w3, [x1,x21,lsl 1]
 	ldrh	w1, [x2,2874]
 	cmp	w3, w1
-	bcs	.L3384
+	bcs	.L3386
 	mov	w1, 0
 	mov	w2, 1
 	bl	gc_add_sblk
-	cbz	w0, .L3384
+	cbz	w0, .L3386
 	mov	w0, 1
 	strb	w0, [x26,1130]
-	b	.L3368
-.L3384:
+	b	.L3370
+.L3386:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x0, [x1,600]
 	ldrh	w2, [x0,x21,lsl 1]
 	ldrh	w0, [x1,3300]
 	cmp	w2, w0, lsr 1
-	bhi	.L3385
+	bhi	.L3387
 	mov	w0, w27
 	mov	w1, 1
 	mov	w2, 0
 	bl	gc_add_sblk
-	b	.L3439
-.L3385:
+	b	.L3443
+.L3387:
 	ldrh	w3, [x1,2850]
 	ldrh	w0, [x1,2852]
 	add	w0, w3, w0
 	ldrh	w3, [x1,3306]
 	cmp	w0, w3, lsl 1
-	ble	.L3386
+	ble	.L3388
 	ldrh	w0, [x1,2874]
 	cmp	w0, w2
-	bcc	.L3383
-	b	.L3386
-.L3382:
+	bcc	.L3385
+	b	.L3388
+.L3384:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	cmp	w22, 16
 	strb	w0, [x21,3273]
-	bls	.L3387
+	bls	.L3389
 	ldrh	w2, [x21,2854]
 	ldrh	w1, [x21,3308]
 	cmp	w2, w1
-	bhi	.L3387
+	bhi	.L3389
 	mov	w1, w0
 	mov	w2, 4
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3388
+	cbnz	w0, .L3390
 	ldrb	w0, [x21,3273]
 	mov	w1, 3
 	mov	w2, 4
-	b	.L3506
-.L3387:
+	b	.L3510
+.L3389:
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3388
+	cbnz	w0, .L3390
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 3
 	mov	w2, 2
 	ldrb	w0, [x0,3273]
-.L3506:
+.L3510:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-.L3388:
+.L3390:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w20, w25, lsr 1
 	ldrh	w1, [x19,3306]
-	bls	.L3508
+	bls	.L3512
 	lsr	w1, w1, 2
-	b	.L3509
-.L3383:
+	b	.L3513
+.L3385:
 	cmp	w20, w25
 	add	x19, x19, :lo12:.LANCHOR0
-	bcs	.L3390
+	bcs	.L3392
 	mov	w0, 4
 	strb	wzr, [x19,3273]
 	bl	zftl_get_gc_node.part.12
 	uxth	w0, w0
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3390
+	beq	.L3392
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x19,600]
 	ldrb	w2, [x19,3276]
@@ -21388,134 +21417,134 @@ zftl_do_gc:
 	ldrh	w0, [x19,3300]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	bgt	.L3390
+	bgt	.L3392
 	mov	w1, 3
 	mov	w0, 0
 	mov	w2, 4
 	bl	gc_search_src_blk
 	uxth	w0, w0
 	ldrh	w1, [x19,3306]
-.L3508:
+.L3512:
 	lsr	w1, w1, 1
-.L3509:
+.L3513:
 	strh	w1, [x19,2872]
-	b	.L3373
-.L3390:
+	b	.L3375
+.L3392:
 	ldrh	w0, [x19,3306]
 	lsr	w0, w0, 2
 	strh	w0, [x19,2872]
-	b	.L3368
-.L3379:
+	b	.L3370
+.L3381:
 	ldrh	w0, [x21,3306]
 	mov	w24, w5
 	lsr	w0, w0, 2
 	strh	w0, [x21,2872]
-	b	.L3368
-.L3373:
+	b	.L3370
+.L3375:
 	mov	w1, w24
-	cbz	w0, .L3484
-.L3439:
+	cbz	w0, .L3488
+.L3443:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	strb	w0, [x23,1130]
-	b	.L3368
-.L3335:
+	b	.L3370
+.L3337:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x20,2896]
 	cmp	w1, w0
-	bne	.L3393
+	bne	.L3395
 	bl	gc_get_src_blk
 	strh	w0, [x20,2896]
-.L3393:
+.L3395:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	add	x1, x0, 2896
 	ldrh	w3, [x0,2896]
 	cmp	w3, w2
-	beq	.L3512
+	beq	.L3516
 	ldrh	w5, [x1,56]
 	uxtw	x4, w3
 	ldr	x2, [x0,584]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3396
+	cbz	w5, .L3398
 	mov	x0, 0
-.L3395:
+.L3397:
 	cmp	w5, w0, uxth
-	bls	.L3396
+	bls	.L3398
 	add	x0, x0, 1
 	add	x6, x1, x0, lsl 1
 	ldrh	w6, [x6,56]
 	cmp	w6, w3
-	bne	.L3395
-.L3401:
+	bne	.L3397
+.L3403:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	w0, [x19,2896]
-	b	.L3511
-.L3396:
+	b	.L3515
+.L3398:
 	ldrb	w0, [x2,2]
 	tst	w0, 192
-	beq	.L3452
+	beq	.L3456
 	and	w0, w0, 224
 	cmp	w0, 224
-	bne	.L3398
-.L3452:
+	bne	.L3400
+.L3456:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x4,lsl 1]
-	cbz	w0, .L3401
+	cbz	w0, .L3403
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2209
+	mov	w2, 2214
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L3401
-.L3398:
+	b	.L3403
+.L3400:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 2
-	b	.L3514
-.L3336:
+	b	.L3518
+.L3338:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3402
+	bne	.L3404
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 3
-.L3514:
+.L3518:
 	strb	w0, [x23,1130]
-	b	.L3511
-.L3402:
+	b	.L3515
+.L3404:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w3, 65535
 	ldrh	w0, [x1,2896]
 	cmp	w0, w3
-	beq	.L3350
+	beq	.L3352
 	ldrh	w3, [x1,2920]
 	add	x23, x23, :lo12:.LANCHOR4
-	cbz	w3, .L3403
+	cbz	w3, .L3405
 	mov	w0, 4
 	strh	wzr, [x1,2922]
 	strb	w0, [x23,1130]
-	b	.L3511
-.L3403:
+	b	.L3515
+.L3405:
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1,600]
 	mov	w2, 1
 	strb	w2, [x23,1130]
 	ldrh	w0, [x1,x0]
-	cbz	w0, .L3404
+	cbz	w0, .L3406
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2237
+	mov	w2, 2242
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3404:
+.L3406:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x20, 2896
 	ldrh	w0, [x20,2896]
@@ -21527,70 +21556,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	uxth	w0, w0
 	cmp	w0, 8
-	bhi	.L3405
+	bhi	.L3407
 	strh	w0, [x21,30]
-	b	.L3401
-.L3405:
+	b	.L3403
+.L3407:
 	strh	wzr, [x21,30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3401
-.L3337:
+	b	.L3403
+.L3339:
 	add	x21, x19, :lo12:.LANCHOR0
-.L3485:
+.L3489:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w2, [x21,2898]
 	add	x0, x21, 2896
 	ldrh	w1, [x21,3300]
 	cmp	w2, w1
-	bcs	.L3407
+	bcs	.L3409
 	cmp	w20, 7
-	bls	.L3485
-	b	.L3511
-.L3407:
+	bls	.L3489
+	b	.L3515
+.L3409:
 	ldrh	w3, [x0,24]
 	adrp	x2, .LANCHOR2
-	cbz	w3, .L3408
+	cbz	w3, .L3410
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w1, 4
 	strh	wzr, [x0,26]
 	strb	w1, [x23,1130]
 	ldr	w1, [x2,#:lo12:.LANCHOR2]
-	tbz	x1, 8, .L3409
+	tbz	x1, 8, .L3411
 	ldrh	w1, [x0]
-	adrp	x0, .LC274
+	adrp	x0, .LC276
 	ldr	x4, [x21,600]
-	add	x0, x0, :lo12:.LC274
+	add	x0, x0, :lo12:.LC276
 	ubfiz	x2, x1, 1, 16
 	ldrh	w2, [x4,x2]
 	bl	printk
-.L3409:
+.L3411:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x0,2896]
 	ldr	x1, [x0,600]
 	ldrh	w0, [x0,2920]
 	ldrh	w1, [x1,x2,lsl 1]
 	cmp	w1, w0
-	beq	.L3410
+	beq	.L3412
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2271
+	mov	w2, 2276
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3410:
+.L3412:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19,2896]
 	ldr	x0, [x19,600]
 	ldrh	w2, [x19,2920]
 	strh	w2, [x0,x1,lsl 1]
-	b	.L3511
-.L3408:
+	b	.L3515
+.L3410:
 	add	x23, x23, :lo12:.LANCHOR4
 	ldrh	w1, [x0]
 	mov	w0, 1
@@ -21598,29 +21627,29 @@ zftl_do_gc:
 	add	x20, x20, x1, uxth 2
 	strb	w0, [x23,1130]
 	ldr	w0, [x2,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3411
+	tbz	x0, 8, .L3413
 	ldrb	w2, [x20,2]
-	adrp	x0, .LC275
-	add	x0, x0, :lo12:.LC275
+	adrp	x0, .LC277
+	add	x0, x0, :lo12:.LC277
 	ubfx	x2, x2, 5, 3
 	bl	printk
-.L3411:
+.L3413:
 	ldrb	w0, [x20,2]
 	tst	w0, 192
-	beq	.L3453
+	beq	.L3457
 	and	w0, w0, 224
 	cmp	w0, 224
-	bne	.L3412
-.L3453:
+	bne	.L3414
+.L3457:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2281
+	mov	w2, 2286
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3412:
+.L3414:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x20, x19, 2896
 	ldrh	w0, [x19,2896]
@@ -21631,59 +21660,59 @@ zftl_do_gc:
 	add	w0, w0, 1
 	uxth	w0, w0
 	cmp	w0, 8
-	bhi	.L3414
+	bhi	.L3416
 	strh	w0, [x20,30]
-	b	.L3511
-.L3414:
-	strh	wzr, [x20,30]
 	b	.L3515
-.L3338:
-	cbnz	w26, .L3415
+.L3416:
+	strh	wzr, [x20,30]
+	b	.L3519
+.L3340:
+	cbnz	w26, .L3417
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0,2872]
 	cmp	w0, w20
-	bcc	.L3511
-.L3415:
+	bcc	.L3515
+.L3417:
 	ldrh	w1, [x24,80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3416
+	bne	.L3418
 	add	x22, x19, :lo12:.LANCHOR0
 	ldrb	w21, [x22,3273]
 	cmp	w21, 1
-	bne	.L3416
+	bne	.L3418
 	bl	ftl_flush
 	ldrh	w0, [x22,3214]
-	cbz	w0, .L3417
+	cbz	w0, .L3419
 	mov	w0, w21
-.L3417:
+.L3419:
 	mov	w1, 5
 	bl	zftl_gc_get_free_sblk
 	uxth	w20, w0
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3419
+	beq	.L3421
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x21, [x0,584]
 	add	x21, x21, x20, uxth 2
 	ldrb	w0, [x21,2]
 	tst	w0, 224
-	beq	.L3420
+	beq	.L3422
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2310
+	mov	w2, 2315
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3420:
+.L3422:
 	ldrb	w0, [x21,2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21,2]
-.L3440:
+.L3444:
 	mov	w0, w20
 	mov	w1, 1
 	add	x19, x19, :lo12:.LANCHOR0
@@ -21740,8 +21769,8 @@ zftl_do_gc:
 	strh	wzr, [x19,3212]
 	strh	wzr, [x19,3216]
 	bl	ftl_info_flush
-	b	.L3511
-.L3416:
+	b	.L3515
+.L3418:
 	cmp	w26, 1
 	mov	w21, 4
 	csinc	w21, w21, wzr, eq
@@ -21749,23 +21778,23 @@ zftl_do_gc:
 	add	w0, w21, 4
 	add	x20, x19, :lo12:.LANCHOR0
 	csel	w21, w0, w21, ls
-.L3423:
+.L3425:
 	sub	w21, w21, #1
 	uxtb	w21, w21
 	cmp	w21, 255
-	beq	.L3511
+	beq	.L3515
 	bl	gc_do_copy_back
 	ldrb	w0, [x20,3273]
-	cbnz	w0, .L3424
+	cbnz	w0, .L3426
 	ldrb	w0, [x20,2834]
 	cmp	w0, 3
-	bhi	.L3425
+	bhi	.L3427
 	bl	ftl_write_commit
-.L3425:
+.L3427:
 	ldrh	w1, [x20,2922]
 	ldrh	w0, [x20,2920]
 	cmp	w1, w0
-	bcc	.L3423
+	bcc	.L3425
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	strb	w0, [x23,1130]
@@ -21774,41 +21803,41 @@ zftl_do_gc:
 	ldrh	w1, [x20,2896]
 	ldr	x0, [x20,600]
 	ldrh	w0, [x0,x1,lsl 1]
-	cbz	w0, .L3427
+	cbz	w0, .L3429
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2385
+	mov	w2, 2390
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3427:
+.L3429:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1,2896]
 	ldr	x3, [x1,600]
 	ubfiz	x2, x0, 1, 16
 	ldrh	w4, [x3,x2]
-	cbnz	w4, .L3428
+	cbnz	w4, .L3430
 	strh	w4, [x3,x2]
 	ldrh	w0, [x1,2896]
 	bl	ftl_free_sblk
-	b	.L3401
-.L3428:
+	b	.L3403
+.L3430:
 	mov	w1, 0
 	mov	w2, 1
 	bl	gc_add_sblk
-	b	.L3401
-.L3424:
+	b	.L3403
+.L3426:
 	add	x0, x20, 2896
 	ldrh	w1, [x0,320]
-	cbz	w1, .L3429
+	cbz	w1, .L3431
 	strh	wzr, [x0,320]
 	ldr	w0, [x0,324]
 	cmn	w0, #1
-	beq	.L3430
+	beq	.L3432
 	bl	ftl_mask_bad_block
-.L3430:
+.L3432:
 	add	x20, x19, :lo12:.LANCHOR0
 	ldr	x0, [x20,608]
 	str	wzr, [x20,3220]
@@ -21822,9 +21851,9 @@ zftl_do_gc:
 	strh	w0, [x2,126]
 	strh	w0, [x1,130]
 	ldr	x0, [x20,2904]
-	cbz	x0, .L3431
+	cbz	x0, .L3433
 	bl	buf_free
-.L3431:
+.L3433:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x23, x23, :lo12:.LANCHOR4
 	str	xzr, [x19,2904]
@@ -21832,21 +21861,21 @@ zftl_do_gc:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2421
+	mov	w2, 2426
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	strb	wzr, [x23,1130]
 	bl	printk
 	bl	dump_stack
-	b	.L3511
-.L3429:
+	b	.L3515
+.L3431:
 	ldrh	w1, [x24,86]
 	cmp	w1, 1
-	bls	.L3432
+	bls	.L3434
 	ldrh	w2, [x0,26]
 	ldrh	w1, [x0,24]
 	cmp	w2, w1
-	bcc	.L3423
+	bcc	.L3425
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w1, 1
 	strb	w1, [x23,1130]
@@ -21858,15 +21887,15 @@ zftl_do_gc:
 	strh	w2, [x1,58]
 	mov	w1, -1
 	strh	w1, [x0]
-	b	.L3511
-.L3432:
+	b	.L3515
+.L3434:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w1, 5
 	ldrh	w2, [x0,26]
 	strb	w1, [x23,1130]
 	ldrh	w1, [x0,24]
 	cmp	w2, w1
-	bcc	.L3433
+	bcc	.L3435
 	ldrh	w1, [x0,56]
 	add	w2, w1, 1
 	add	x1, x0, x1, sxtw 1
@@ -21875,7 +21904,7 @@ zftl_do_gc:
 	strh	w2, [x1,58]
 	mov	w1, -1
 	strh	w1, [x0]
-.L3433:
+.L3435:
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
@@ -21891,21 +21920,23 @@ zftl_do_gc:
 	strh	w1, [x20,2914]
 	cmp	w2, 2
 	strh	w2, [x20,2916]
-	bne	.L3434
+	bne	.L3437
 	lsl	w1, w1, 1
 	strh	w1, [x20,2914]
+	ldrb	w1, [x20,3348]
+	cbnz	w1, .L3437
 	mov	w1, 1
 	strh	w1, [x20,2916]
-.L3434:
+.L3437:
 	add	x19, x19, :lo12:.LANCHOR0
 	strh	wzr, [x19,2918]
-	b	.L3511
-.L3442:
+	b	.L3515
+.L3446:
 	mov	w21, 0
 	add	x24, x19, :lo12:.LANCHOR0
-.L3339:
+.L3341:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3436
+	cbz	w0, .L3440
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x23, x23, :lo12:.LANCHOR4
 	ldr	x0, [x19,608]
@@ -21922,32 +21953,32 @@ zftl_do_gc:
 	bl	buf_free
 	str	xzr, [x19,2904]
 	strb	wzr, [x23,1130]
-.L3515:
+.L3519:
 	bl	flt_sys_flush
-	b	.L3511
-.L3436:
+	b	.L3515
+.L3440:
 	ldrh	w1, [x24,2912]
 	ldrh	w0, [x24,2914]
 	cmp	w1, w0
-	bcc	.L3437
+	bcc	.L3441
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 6
 	strb	w0, [x23,1130]
 	ldr	x0, [x24,2904]
 	bl	buf_free
 	str	xzr, [x24,2904]
-	b	.L3511
-.L3437:
+	b	.L3515
+.L3441:
 	cmp	w20, 15
-	bls	.L3339
+	bls	.L3341
 	cmp	w26, 1
-	bne	.L3511
+	bne	.L3515
 	add	w21, w21, 1
 	uxtb	w21, w21
 	cmp	w21, 4
-	bls	.L3339
-	b	.L3511
-.L3340:
+	bls	.L3341
+	b	.L3515
+.L3342:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21960,26 +21991,26 @@ zftl_do_gc:
 	strh	w20, [x0,126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3512:
+.L3516:
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	wzr, [x23,1130]
-.L3511:
+.L3515:
 	mov	w1, 16
-	b	.L3484
-.L3368:
+	b	.L3488
+.L3370:
 	mov	w1, w24
-	b	.L3484
-.L3419:
+	b	.L3488
+.L3421:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2316
+	mov	w2, 2321
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L3440
-.L3484:
+	b	.L3444
+.L3488:
 	sub	sp, x29, #16
 	mov	w0, w1
 	ldp	x19, x20, [sp,32]
@@ -22008,30 +22039,30 @@ zftl_write:
 	stp	x21, x22, [sp,32]
 	mov	w28, w1
 	mov	x25, x3
-	tbz	x0, 12, .L3517
-	adrp	x0, .LC276
+	tbz	x0, 12, .L3521
+	adrp	x0, .LC278
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC276
+	add	x0, x0, :lo12:.LC278
 	mov	w2, w28
 	mov	w3, w23
 	bl	printk
-.L3517:
-	cbnz	w19, .L3518
+.L3521:
+	cbnz	w19, .L3522
 	adrp	x0, .LANCHOR0+520
 	mov	w19, 24576
 	ldr	w2, [x0,#:lo12:.LANCHOR0+520]
-	b	.L3519
-.L3518:
+	b	.L3523
+.L3522:
 	cmp	w19, 3
 	mov	w0, -1
-	bhi	.L3520
+	bhi	.L3524
 	lsl	w19, w19, 13
 	mov	w2, 8192
-.L3519:
+.L3523:
 	add	w1, w28, w23
 	mov	w0, -1
 	cmp	w1, w2
-	bhi	.L3520
+	bhi	.L3524
 	add	w28, w19, w28
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
@@ -22044,15 +22075,15 @@ zftl_write:
 	udiv	w22, w22, w0
 	sub	w20, w22, w24
 	add	w20, w20, 1
-.L3521:
-	cbz	w20, .L3540
+.L3525:
+	cbz	w20, .L3544
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbnz	x0, .L3522
+	cbnz	x0, .L3526
 	bl	ftl_write_commit
-	b	.L3521
-.L3522:
+	b	.L3525
+.L3526:
 	strb	wzr, [x0,57]
 	add	x0, x19, :lo12:.LANCHOR0
 	cmp	w21, w24
@@ -22060,12 +22091,12 @@ zftl_write:
 	cset	w0, eq
 	strb	w4, [x27,56]
 	cmp	w21, w22
-	beq	.L3524
-	cbz	w0, .L3525
-	b	.L3534
-.L3524:
-	cbz	w0, .L3526
-.L3534:
+	beq	.L3528
+	cbz	w0, .L3529
+	b	.L3538
+.L3528:
+	cbz	w0, .L3530
+.L3538:
 	udiv	w0, w28, w4
 	msub	w0, w0, w4, w28
 	uxtb	w0, w0
@@ -22074,12 +22105,12 @@ zftl_write:
 	uxtb	w4, w4
 	cmp	w4, w23
 	csel	w4, w23, w4, hi
-	b	.L3538
-.L3526:
+	b	.L3542
+.L3530:
 	msub	w4, w4, w21, w26
-.L3538:
+.L3542:
 	strb	w4, [x27,56]
-.L3525:
+.L3529:
 	ldrb	w1, [x27,57]
 	sub	w20, w20, #1
 	ldr	x0, [x27,8]
@@ -22100,11 +22131,11 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	w0, [x27,56]
 	add	x25, x25, x0, lsl 9
-	b	.L3521
-.L3540:
+	b	.L3525
+.L3544:
 	bl	ftl_write_commit
 	mov	w0, w20
-.L3539:
+.L3543:
 	mov	w1, 1
 	bl	zftl_do_gc
 	add	x1, x19, :lo12:.LANCHOR0
@@ -22112,15 +22143,15 @@ zftl_write:
 	ldrh	w0, [x1,2848]
 	add	w0, w2, w0
 	cmp	w0, 7
-	bgt	.L3541
+	bgt	.L3545
 	mov	w0, 0
-	b	.L3539
-.L3541:
+	b	.L3543
+.L3545:
 	bl	timer_get_time
 	adrp	x1, .LANCHOR7-76
 	str	w0, [x1,#:lo12:.LANCHOR7-76]
 	mov	w0, 0
-.L3520:
+.L3524:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22178,7 +22209,7 @@ zftl_discard:
 	stp	x27, x28, [sp,80]
 	ldr	w1, [x1,520]
 	cmp	w2, w1
-	bhi	.L3545
+	bhi	.L3549
 	adrp	x23, .LANCHOR7
 	add	w24, w0, 24576
 	add	x0, x23, :lo12:.LANCHOR7
@@ -22187,14 +22218,14 @@ zftl_discard:
 	add	w1, w19, w1
 	str	w1, [x0,-72]
 	ldr	w0, [x25,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3546
-	adrp	x0, .LC277
+	tbz	x0, 12, .L3550
+	adrp	x0, .LC279
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC277
+	add	x0, x0, :lo12:.LC279
 	mov	w3, w19
 	mov	w4, 0
 	bl	printk
-.L3546:
+.L3550:
 	add	x20, x21, :lo12:.LANCHOR0
 	ldr	x0, [x20,2864]
 	ldr	w26, [x0,8]
@@ -22205,7 +22236,7 @@ zftl_discard:
 	ldrb	w22, [x20,2832]
 	udiv	w20, w24, w22
 	msub	w27, w20, w22, w24
-	cbz	w27, .L3547
+	cbz	w27, .L3551
 	sub	w22, w22, w27
 	mov	w0, w20
 	cmp	w22, w19
@@ -22213,20 +22244,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	bne	.L3548
+	bne	.L3552
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
-.L3548:
+.L3552:
 	ldr	w0, [x29,120]
 	and	w28, w22, 65535
 	cmn	w0, #1
-	beq	.L3550
+	beq	.L3554
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3550
+	cbz	x0, .L3554
 	strb	w27, [x0,57]
 	ubfiz	x27, x27, 9, 25
 	str	w20, [x0,36]
@@ -22247,31 +22278,31 @@ zftl_discard:
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3550:
+.L3554:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3547:
-	cbz	w19, .L3552
+.L3551:
+	cbz	w19, .L3556
 	bl	ftl_flush
-.L3552:
+.L3556:
 	mov	w0, -1
 	mov	w27, 1
 	str	w0, [x29,124]
 	mov	w28, 21
-.L3553:
+.L3557:
 	add	x22, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x22,2832]
 	cmp	w19, w0
-	bcc	.L3592
+	bcc	.L3596
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3554
+	beq	.L3558
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3556
+	cbz	x0, .L3560
 	ldrb	w2, [x22,2832]
 	mov	w1, 0
 	str	w20, [x0,36]
@@ -22286,15 +22317,15 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	b	.L3591
-.L3554:
+	b	.L3595
+.L3558:
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3556
+	beq	.L3560
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -22309,36 +22340,36 @@ zftl_discard:
 	and	w0, w2, w0
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-.L3591:
+.L3595:
 	ldr	x1, [x22,2864]
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3556:
+.L3560:
 	add	x0, x21, :lo12:.LANCHOR0
 	add	w20, w20, 1
 	ldrb	w0, [x0,2832]
 	sub	w19, w19, w0
-	b	.L3553
-.L3592:
-	cbz	w19, .L3560
+	b	.L3557
+.L3596:
+	cbz	w19, .L3564
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	bne	.L3561
+	bne	.L3565
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
-.L3561:
+.L3565:
 	ldr	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3560
+	beq	.L3564
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x22, x0
-	cbz	x0, .L3560
+	cbz	x0, .L3564
 	str	w20, [x0,36]
 	strb	wzr, [x0,57]
 	strb	w19, [x0,56]
@@ -22346,7 +22377,7 @@ zftl_discard:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w19, w0
-	bcc	.L3563
+	bcc	.L3567
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -22355,7 +22386,7 @@ zftl_discard:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3563:
+.L3567:
 	ldr	x0, [x22,8]
 	mov	w1, 0
 	lsl	w2, w19, 9
@@ -22368,20 +22399,20 @@ zftl_discard:
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3560:
+.L3564:
 	add	x0, x23, :lo12:.LANCHOR7
 	mov	w4, 0
 	ldr	w1, [x0,-72]
 	cmp	w1, 8192
-	bls	.L3545
+	bls	.L3549
 	ldr	w0, [x25,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3564
-	adrp	x0, .LC277
+	tbz	x0, 12, .L3568
+	adrp	x0, .LC279
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC277
+	add	x0, x0, :lo12:.LC279
 	mov	w3, w19
 	bl	printk
-.L3564:
+.L3568:
 	add	x23, x23, :lo12:.LANCHOR7
 	add	x21, x21, :lo12:.LANCHOR0
 	str	wzr, [x23,-72]
@@ -22389,7 +22420,7 @@ zftl_discard:
 	mov	w0, 1
 	mov	w4, 0
 	str	w0, [x21,2884]
-.L3545:
+.L3549:
 	mov	w0, w4
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -22419,29 +22450,29 @@ id_block_prog_msb_ff_data:
 	ldrb	w2, [x0,19]
 	add	x0, x20, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1264]
-	cbnz	w0, .L3593
+	cbnz	w0, .L3597
 	sub	w0, w2, #5
 	uxtb	w0, w0
 	cmp	w0, 2
-	bls	.L3595
+	bls	.L3599
 	cmp	w2, 68
-	beq	.L3595
+	beq	.L3599
 	sub	w2, w2, #19
 	and	w2, w2, -17
 	uxtb	w2, w2
-	cbnz	w2, .L3593
-.L3595:
-	adrp	x24, .LC278
+	cbnz	w2, .L3597
+.L3599:
+	adrp	x24, .LC280
 	mov	w25, w1
-	add	x24, x24, :lo12:.LC278
+	add	x24, x24, :lo12:.LC280
 	add	x20, x20, :lo12:.LANCHOR4
 	mov	w27, 65535
-.L3597:
+.L3601:
 	add	x28, x21, :lo12:.LANCHOR0
 	ldr	x0, [x28,624]
 	ldrh	w0, [x0,10]
 	cmp	w0, w19
-	bls	.L3593
+	bls	.L3597
 	add	x22, x20, 68
 	add	w26, w19, w25
 	mov	x0, x24
@@ -22451,7 +22482,7 @@ id_block_prog_msb_ff_data:
 	bl	printk
 	ldrh	w0, [x22,w19,sxtw 1]
 	cmp	w0, w27
-	bne	.L3593
+	bne	.L3597
 	ldr	x0, [x20,1192]
 	mov	w1, 255
 	mov	w2, 16384
@@ -22465,8 +22496,8 @@ id_block_prog_msb_ff_data:
 	ldrb	w4, [x4,9]
 	mov	x3, x2
 	bl	flash_prog_page
-	b	.L3597
-.L3593:
+	b	.L3601
+.L3597:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22499,17 +22530,17 @@ write_idblock:
 	bl	ftl_malloc
 	mov	x23, x0
 	mov	w0, -1
-	cbz	x23, .L3644
+	cbz	x23, .L3648
 	add	w19, w19, 511
 	lsr	w19, w19, 9
 	cmp	w19, 8
-	bls	.L3630
+	bls	.L3634
 	cmp	w19, 500
-	bhi	.L3644
-	b	.L3601
-.L3630:
+	bhi	.L3648
+	b	.L3605
+.L3634:
 	mov	w19, 8
-.L3601:
+.L3605:
 	mul	w20, w20, w21
 	add	x3, x26, 253952
 	mov	w2, 63999
@@ -22520,9 +22551,9 @@ write_idblock:
 	udiv	w0, w19, w0
 	str	w0, [x29,120]
 	mov	w0, 0
-.L3605:
+.L3609:
 	ldr	w1, [x3]
-	cbnz	w1, .L3602
+	cbnz	w1, .L3606
 	ldr	w1, [x26,w0,uxtw 2]
 	add	w0, w0, 1
 	cmp	w0, w4
@@ -22530,56 +22561,56 @@ write_idblock:
 	csel	w0, w0, wzr, cc
 	str	w1, [x3],-4
 	cmp	w2, 4096
-	bne	.L3605
-	b	.L3604
-.L3602:
-	adrp	x0, .LC279
-	add	x0, x0, :lo12:.LC279
+	bne	.L3609
+	b	.L3608
+.L3606:
+	adrp	x0, .LC281
+	add	x0, x0, :lo12:.LC281
 	bl	printk
-.L3604:
+.L3608:
 	ldr	x1, [x29,128]
-	adrp	x0, .LC280
-	add	x0, x0, :lo12:.LC280
+	adrp	x0, .LC282
+	add	x0, x0, :lo12:.LC282
 	mov	w2, 4
 	mov	w3, 5
 	mov	x21, 0
 	mov	w28, w21
 	bl	rknand_print_hex
-	adrp	x0, .LC281
+	adrp	x0, .LC283
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC281
+	add	x0, x0, :lo12:.LC283
 	mov	w2, w19
 	bl	printk
-.L3627:
+.L3631:
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	ldrb	w1, [x1,-102]
-	cbnz	w1, .L3606
+	cbnz	w1, .L3610
 	ldr	x1, [x29,128]
 	ldr	w2, [x29,152]
 	ldr	w1, [x1,x21,lsl 2]
 	mul	w20, w1, w2
-	cbz	w21, .L3607
+	cbz	w21, .L3611
 	ldr	w2, [x29,120]
 	cmp	w2, 1
-	bls	.L3607
+	bls	.L3611
 	sub	w0, w21, #1
 	ldr	x2, [x29,128]
 	ldr	w0, [x2,x0,lsl 2]
 	add	w0, w0, 1
 	cmp	w1, w0
-	bne	.L3607
-	b	.L3608
-.L3606:
+	bne	.L3611
+	b	.L3612
+.L3610:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,728]
 	add	x0, x0, x21, uxtw
 	ldrb	w20, [x0,32]
 	cmp	w20, 255
-	beq	.L3608
+	beq	.L3612
 	ldr	w0, [x29,152]
 	mul	w20, w20, w0
-.L3607:
+.L3611:
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x23
@@ -22598,12 +22629,12 @@ write_idblock:
 	bl	flash_erase_block
 	cmp	w19, w24
 	mov	w2, 1
-	bls	.L3609
+	bls	.L3613
 	mov	w0, 0
 	add	w1, w20, w24
 	bl	flash_erase_block
 	mov	w2, 2
-.L3609:
+.L3613:
 	add	x27, x22, :lo12:.LANCHOR0
 	ldr	x1, [x27,624]
 	ldrh	w0, [x1,10]
@@ -22618,10 +22649,10 @@ write_idblock:
 	sub	w0, w20, w0
 	str	w0, [x29,156]
 	cmp	w20, w0
-	bne	.L3634
+	bne	.L3638
 	ldrb	w0, [x27,516]
 	cmp	w0, 9
-	bne	.L3634
+	bne	.L3638
 	adrp	x0, .LANCHOR4
 	mov	w1, 0
 	add	x0, x0, :lo12:.LANCHOR4
@@ -22659,18 +22690,18 @@ write_idblock:
 	str	w0, [x3,8]
 	sub	w0, w19, #4
 	str	w0, [x29,144]
-	b	.L3610
-.L3634:
+	b	.L3614
+.L3638:
 	str	w19, [x29,144]
 	mov	x3, 0
-.L3610:
+.L3614:
 	str	x26, [x29,136]
 	mov	w24, 0
 	add	x27, x22, :lo12:.LANCHOR0
-.L3612:
+.L3616:
 	ldr	w0, [x29,112]
 	cmp	w24, w0
-	bcs	.L3653
+	bcs	.L3657
 	ldr	w0, [x29,124]
 	adrp	x2, .LANCHOR4
 	add	x2, x2, :lo12:.LANCHOR4
@@ -22680,34 +22711,34 @@ write_idblock:
 	add	w1, w4, 1
 	ldrb	w2, [x2,1264]
 	ldrh	w0, [x0,w1,sxtw 1]
-	cbz	w2, .L3614
+	cbz	w2, .L3618
 	ldrb	w6, [x27,1]
 	lsl	w0, w1, 1
 	cmp	w6, wzr
 	csel	w0, w0, w1, ne
-.L3614:
+.L3618:
 	ldrb	w1, [x27,516]
 	cmp	w1, 9
-	beq	.L3652
+	beq	.L3656
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-.L3652:
+.L3656:
 	str	w0, [x29,160]
 	mov	w0, 61424
 	str	w0, [x29,164]
 	add	x0, x27, 4
 	ldrh	w0, [x0,w4,sxtw 1]
-	cbnz	w2, .L3618
+	cbnz	w2, .L3622
 	mov	w4, w0
-	b	.L3619
-.L3618:
+	b	.L3623
+.L3622:
 	ldrb	w1, [x27,1]
 	lsl	w0, w4, 1
 	cmp	w1, wzr
 	csel	w4, w0, w4, ne
-.L3619:
+.L3623:
 	mul	w0, w4, w25
-	cbnz	x3, .L3620
+	cbnz	x3, .L3624
 	ldr	w1, [x29,156]
 	add	x2, x29, 160
 	str	x4, [x29,104]
@@ -22718,28 +22749,28 @@ write_idblock:
 	ldr	x4, [x29,104]
 	add	x0, x0, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1264]
-	cbnz	w0, .L3621
+	cbnz	w0, .L3625
 	ldr	w1, [x29,156]
 	add	w2, w4, 1
 	udiv	w1, w1, w25
 	bl	id_block_prog_msb_ff_data
-.L3621:
+.L3625:
 	ldr	x0, [x29,136]
 	add	x0, x0, 2048
 	str	x0, [x29,136]
-	b	.L3622
-.L3620:
+	b	.L3626
+.L3624:
 	ldr	w1, [x29,156]
 	add	x2, x29, 160
 	add	w0, w0, w1
 	mov	x1, x3
 	bl	fw_flash_page_prog.constprop.28
-.L3622:
+.L3626:
 	add	w24, w24, 4
 	mov	x3, 0
 	uxth	w24, w24
-	b	.L3612
-.L3653:
+	b	.L3616
+.L3657:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x29,116]
 	mov	x2, x23
@@ -22750,15 +22781,15 @@ write_idblock:
 	ldr	w0, [x29,144]
 	mov	x1, 0
 	lsl	w0, w0, 7
-.L3624:
+.L3628:
 	cmp	w0, w1
-	bls	.L3654
+	bls	.L3658
 	ldr	w3, [x23,x1,lsl 2]
 	add	x1, x1, 1
 	add	x2, x26, x1, lsl 2
 	ldr	w2, [x2,-4]
 	cmp	w3, w2
-	beq	.L3624
+	beq	.L3628
 	mov	x0, x23
 	mov	w1, 0
 	mov	w2, 512
@@ -22766,21 +22797,21 @@ write_idblock:
 	mov	w1, w20
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L3608
-.L3654:
+	b	.L3612
+.L3658:
 	add	w28, w28, 1
 	cmp	w28, 5
-	bhi	.L3628
-.L3608:
+	bhi	.L3632
+.L3612:
 	add	x21, x21, 1
 	cmp	x21, 4
-	bne	.L3627
-.L3628:
+	bne	.L3631
+.L3632:
 	mov	x0, x23
 	bl	ftl_free
 	cmp	w28, wzr
 	csetm	w0, eq
-.L3644:
+.L3648:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22798,17 +22829,17 @@ CRC_32:
 	mov	x5, x0
 	add	x3, x3, :lo12:.LANCHOR2
 	mov	w0, w2
-.L3656:
+.L3660:
 	cmp	w1, w2
-	bls	.L3658
+	bls	.L3662
 	ldrb	w4, [x5,x2]
 	add	x6, x3, 2296
 	add	x2, x2, 1
 	eor	w4, w4, w0, lsr 24
 	ldr	w4, [x6,w4,uxtw 2]
 	eor	w0, w4, w0, lsl 8
-	b	.L3656
-.L3658:
+	b	.L3660
+.L3662:
 	ret
 	.size	CRC_32, .-CRC_32
 	.align	2
@@ -22825,146 +22856,146 @@ rknand_sys_storage_ioctl:
 	stp	x21, x22, [sp,32]
 	mov	w19, w1
 	mov	x20, x2
-	beq	.L3661
+	beq	.L3665
 	mov	w0, 29187
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3662
+	bhi	.L3666
 	mov	w0, 25726
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3663
+	beq	.L3667
 	mov	w0, 25726
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3664
+	bhi	.L3668
 	mov	w0, 25601
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3665
+	beq	.L3669
 	mov	w0, 25601
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3666
+	bhi	.L3670
 	mov	w0, 25364
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bne	.L3723
+	bne	.L3727
 	bl	rknand_dev_flush
-	b	.L3757
-.L3666:
+	b	.L3761
+.L3670:
 	mov	w0, 25602
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3668
+	beq	.L3672
 	mov	w0, 25603
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3669
-	b	.L3723
-.L3664:
+	beq	.L3673
+	b	.L3727
+.L3668:
 	mov	w0, 27688
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3670
+	beq	.L3674
 	mov	w0, 27688
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3671
+	bhi	.L3675
 	mov	w0, 25727
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3672
-	b	.L3723
-.L3671:
+	beq	.L3676
+	b	.L3727
+.L3675:
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3670
+	beq	.L3674
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3670
-	b	.L3723
-.L3662:
+	beq	.L3674
+	b	.L3727
+.L3666:
 	mov	w0, 29267
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3673
+	beq	.L3677
 	mov	w0, 29267
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3674
+	bhi	.L3678
 	mov	w0, 29189
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3675
+	beq	.L3679
 	mov	w0, 29189
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bcc	.L3676
+	bcc	.L3680
 	mov	w0, 29210
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3677
+	beq	.L3681
 	mov	w0, 29266
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3678
-	b	.L3723
-.L3674:
+	beq	.L3682
+	b	.L3727
+.L3678:
 	mov	w0, 30225
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3679
+	beq	.L3683
 	mov	w0, 30225
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3680
+	bhi	.L3684
 	mov	w0, 29268
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3681
+	beq	.L3685
 	mov	w0, 30224
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3682
-	b	.L3723
-.L3680:
+	beq	.L3686
+	b	.L3727
+.L3684:
 	mov	w0, 30226
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3682
+	beq	.L3686
 	mov	w0, 30227
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3679
-	b	.L3723
-.L3676:
-	adrp	x0, .LC282
-	add	x0, x0, :lo12:.LC282
+	beq	.L3683
+	b	.L3727
+.L3680:
+	adrp	x0, .LC284
+	add	x0, x0, :lo12:.LC284
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbnz	x0, .L3683
-.L3688:
+	cbnz	x0, .L3687
+.L3692:
 	mov	x0, -12
-	b	.L3660
-.L3683:
+	b	.L3664
+.L3687:
 	mov	x1, x20
 	mov	x2, 512
 	bl	rk_copy_from_user
-	cbnz	x0, .L3764
-	adrp	x0, .LC284
+	cbnz	x0, .L3768
+	adrp	x0, .LC286
 	ldr	w1, [x19]
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC284
+	add	x0, x0, :lo12:.LC286
 	bl	printk
 	ldr	w0, [x19,4]
 	str	w0, [x29,52]
 	cmp	w0, 8
-	bhi	.L3761
+	bhi	.L3765
 	bl	rknand_device_lock
 	ldr	w1, [x29,52]
 	mov	x2, x19
@@ -22976,106 +23007,106 @@ rknand_sys_storage_ioctl:
 	mov	x1, x19
 	ubfiz	x2, x2, 9, 23
 	bl	rk_copy_to_user
-	cbz	x0, .L3767
-	adrp	x0, .LC285
-	add	x0, x0, :lo12:.LC285
-.L3759:
+	cbz	x0, .L3771
+	adrp	x0, .LC287
+	add	x0, x0, :lo12:.LC287
+.L3763:
 	bl	printk
-.L3761:
+.L3765:
 	mov	x0, x19
-.L3762:
+.L3766:
 	bl	ftl_free
-.L3760:
+.L3764:
 	mov	x0, -14
-	b	.L3660
-.L3675:
-	adrp	x0, .LC286
-	add	x0, x0, :lo12:.LC286
+	b	.L3664
+.L3679:
+	adrp	x0, .LC288
+	add	x0, x0, :lo12:.LC288
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3688
+	cbz	x0, .L3692
 	mov	x1, x20
 	mov	x2, 4096
 	bl	rk_copy_from_user
-	cbnz	x0, .L3764
-	adrp	x0, .LC287
+	cbnz	x0, .L3768
+	adrp	x0, .LC289
 	ldr	w1, [x19]
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC287
+	add	x0, x0, :lo12:.LC289
 	bl	printk
 	adrp	x0, .LANCHOR7
 	add	x22, x0, :lo12:.LANCHOR7
 	mov	x20, x0
 	ldr	x21, [x22,-64]
-	cbnz	x21, .L3690
+	cbnz	x21, .L3694
 	mov	w0, 260096
 	bl	ftl_malloc
 	str	x0, [x22,-64]
-	cbz	x0, .L3761
+	cbz	x0, .L3765
 	mov	w1, w21
 	mov	x2, 260096
 	bl	memset
-.L3690:
+.L3694:
 	ldr	w2, [x19,4]
 	cmp	w2, 4088
-	bhi	.L3761
+	bhi	.L3765
 	ldr	w0, [x19]
 	mov	w1, 55296
 	movk	w1, 0x3, lsl 16
 	cmp	w0, w1
-	bhi	.L3761
+	bhi	.L3765
 	add	x20, x20, :lo12:.LANCHOR7
 	uxtw	x2, w2
 	ldr	x1, [x20,-64]
 	add	x0, x1, x0, uxtw
 	add	x1, x19, 8
 	bl	memcpy
-.L3767:
+.L3771:
 	mov	x0, x19
 	bl	ftl_free
-	b	.L3757
-.L3678:
-	adrp	x0, .LC288
-	add	x0, x0, :lo12:.LC288
+	b	.L3761
+.L3682:
+	adrp	x0, .LC290
+	add	x0, x0, :lo12:.LC290
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3688
+	cbz	x0, .L3692
 	mov	x1, x20
 	mov	x2, 28
 	bl	rk_copy_from_user
-	cbz	x0, .L3693
-.L3764:
-	adrp	x0, .LC283
-	add	x0, x0, :lo12:.LC283
-	b	.L3759
-.L3693:
+	cbz	x0, .L3697
+.L3768:
+	adrp	x0, .LC285
+	add	x0, x0, :lo12:.LC285
+	b	.L3763
+.L3697:
 	ldr	w1, [x19]
-	adrp	x0, .LC289
+	adrp	x0, .LC291
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC289
+	add	x0, x0, :lo12:.LC291
 	bl	printk
 	ldr	w1, [x19]
 	mov	w0, 59392
 	movk	w0, 0x3, lsl 16
 	cmp	w1, w0
-	bhi	.L3761
+	bhi	.L3765
 	adrp	x20, .LANCHOR7
 	add	x20, x20, :lo12:.LANCHOR7
 	ldr	x0, [x20,-64]
-	cbz	x0, .L3761
+	cbz	x0, .L3765
 	bl	CRC_32
 	ldr	w1, [x19,4]
 	cmp	w1, w0
-	beq	.L3696
+	beq	.L3700
 	mov	x0, x19
 	bl	ftl_free
 	mov	x0, -2
-	b	.L3660
-.L3696:
+	b	.L3664
+.L3700:
 	bl	rknand_device_lock
 	ldr	x1, [x20,-64]
 	add	x2, x19, 8
@@ -23085,39 +23116,39 @@ rknand_sys_storage_ioctl:
 	ldr	x0, [x20,-64]
 	bl	ftl_free
 	str	xzr, [x20,-64]
-	b	.L3767
-.L3677:
-	adrp	x0, .LC290
-	add	x0, x0, :lo12:.LC290
+	b	.L3771
+.L3681:
+	adrp	x0, .LC292
+	add	x0, x0, :lo12:.LC292
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3688
+	cbz	x0, .L3692
 	bl	ReadFlashInfo
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 11
-	b	.L3769
-.L3661:
-	adrp	x0, .LC291
-	add	x0, x0, :lo12:.LC291
+	b	.L3773
+.L3665:
+	adrp	x0, .LC293
+	add	x0, x0, :lo12:.LC293
 	bl	printk
 	bl	nand_blk_add_whole_disk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3688
+	cbz	x0, .L3692
 	mov	w1, 0
 	mov	w2, 64
 	bl	ftl_memset
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 64
-	b	.L3769
-.L3673:
-	adrp	x0, .LC292
-	add	x0, x0, :lo12:.LC292
+	b	.L3773
+.L3677:
+	adrp	x0, .LC294
+	add	x0, x0, :lo12:.LC294
 	bl	printk
 	adrp	x0, .LANCHOR7-56
 	add	x1, x29, 52
@@ -23126,18 +23157,18 @@ rknand_sys_storage_ioctl:
 	ldr	w0, [x0,20]
 	str	w0, [x29,52]
 	mov	x0, x20
-.L3752:
+.L3756:
 	bl	rk_copy_to_user
-	cbnz	x0, .L3760
-	b	.L3757
-.L3681:
-	adrp	x0, .LC293
-	add	x0, x0, :lo12:.LC293
+	cbnz	x0, .L3764
+	b	.L3761
+.L3685:
+	adrp	x0, .LC295
+	add	x0, x0, :lo12:.LC295
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3688
+	cbz	x0, .L3692
 	bl	rknand_device_lock
 	mov	w1, 264
 	mov	w2, 2
@@ -23148,41 +23179,41 @@ rknand_sys_storage_ioctl:
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 1024
-.L3769:
+.L3773:
 	bl	rk_copy_to_user
 	mov	x19, x0
 	mov	x0, x21
-	cbnz	x19, .L3762
+	cbnz	x19, .L3766
 	bl	ftl_free
-	b	.L3687
-.L3665:
-	adrp	x0, .LC294
-	add	x0, x0, :lo12:.LC294
+	b	.L3691
+.L3669:
+	adrp	x0, .LC296
+	add	x0, x0, :lo12:.LC296
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
 	mov	x19, x0
-	cbz	x0, .L3701
-.L3706:
-	adrp	x0, .LC283
-	add	x0, x0, :lo12:.LC283
+	cbz	x0, .L3705
+.L3710:
+	adrp	x0, .LC285
+	add	x0, x0, :lo12:.LC285
 	bl	printk
-	b	.L3760
-.L3701:
+	b	.L3764
+.L3705:
 	ldr	w1, [x29,56]
 	mov	w0, 21060
 	movk	w0, 0x4b4d, lsl 16
 	cmp	w1, w0
-	beq	.L3702
-.L3703:
+	beq	.L3706
+.L3707:
 	mov	x19, -1
-	b	.L3687
-.L3702:
+	b	.L3691
+.L3706:
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3703
+	bhi	.L3707
 	adrp	x21, .LANCHOR7
 	add	x0, x29, 56
 	add	x21, x21, :lo12:.LANCHOR7
@@ -23193,37 +23224,37 @@ rknand_sys_storage_ioctl:
 	mov	w0, 5161
 	movk	w0, 0xc059, lsl 16
 	cmp	w1, w0
-	beq	.L3704
+	beq	.L3708
 	add	x0, x29, 120
 	mov	w1, w19
 	mov	x2, 128
 	str	w19, [x29,64]
 	str	w19, [x29,68]
 	bl	memset
-.L3704:
+.L3708:
 	add	x0, x29, 312
 	mov	w1, 0
 	mov	x2, 256
 	str	wzr, [x29,72]
 	bl	memset
-	b	.L3766
-.L3668:
-	adrp	x0, .LC295
-	add	x0, x0, :lo12:.LC295
+	b	.L3770
+.L3672:
+	adrp	x0, .LC297
+	add	x0, x0, :lo12:.LC297
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 21060
 	movk	w0, 0x4b4d, lsl 16
 	cmp	w1, w0
-	bne	.L3703
+	bne	.L3707
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3703
+	bhi	.L3707
 	adrp	x1, .LANCHOR7
 	mov	w2, 5161
 	add	x1, x1, :lo12:.LANCHOR7
@@ -23231,12 +23262,12 @@ rknand_sys_storage_ioctl:
 	mov	x0, -2
 	ldr	w3, [x1,-48]
 	cmp	w3, w2
-	bne	.L3660
+	bne	.L3664
 	ldr	w2, [x29,68]
 	mov	x0, -3
 	sub	w3, w2, #1
 	cmp	w3, 127
-	bhi	.L3660
+	bhi	.L3664
 	ldr	x19, [x1,-56]
 	add	x1, x29, 120
 	add	x0, x19, 64
@@ -23245,38 +23276,38 @@ rknand_sys_storage_ioctl:
 	bl	memcpy
 	mov	w0, 1
 	mov	x1, x19
-	b	.L3758
-.L3672:
-	adrp	x0, .LC296
-	add	x0, x0, :lo12:.LC296
+	b	.L3762
+.L3676:
+	adrp	x0, .LC298
+	add	x0, x0, :lo12:.LC298
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 17476
 	movk	w0, 0x4253, lsl 16
 	cmp	w1, w0
-	bne	.L3703
+	bne	.L3707
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3703
+	bhi	.L3707
 	adrp	x19, .LANCHOR7
 	add	x0, x19, :lo12:.LANCHOR7
 	ldr	w1, [x0,-44]
-	cbnz	w1, .L3707
-.L3710:
+	cbnz	w1, .L3711
+.L3714:
 	mov	x0, 0
-	b	.L3660
-.L3707:
+	b	.L3664
+.L3711:
 	ldr	x1, [x0,-40]
 	mov	w2, 22867
 	movk	w2, 0x4453, lsl 16
 	ldr	w3, [x1]
 	cmp	w3, w2
-	beq	.L3708
+	beq	.L3712
 	mov	w2, 22867
 	movk	w2, 0x4453, lsl 16
 	str	w2, [x1]
@@ -23286,7 +23317,7 @@ rknand_sys_storage_ioctl:
 	ldr	x0, [x0,-40]
 	str	wzr, [x0,8]
 	str	wzr, [x0,12]
-.L3708:
+.L3712:
 	add	x20, x19, :lo12:.LANCHOR7
 	mov	w0, 0
 	ldr	x1, [x20,-40]
@@ -23297,7 +23328,7 @@ rknand_sys_storage_ioctl:
 	movk	w1, 0x4b4d, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	beq	.L3709
+	beq	.L3713
 	mov	w1, 21060
 	movk	w1, 0x4b4d, lsl 16
 	str	w1, [x0]
@@ -23306,7 +23337,7 @@ rknand_sys_storage_ioctl:
 	str	w1, [x0,4]
 	ldr	x0, [x20,-56]
 	str	wzr, [x0,8]
-.L3709:
+.L3713:
 	add	x19, x19, :lo12:.LANCHOR7
 	mov	w1, 0
 	mov	x2, 128
@@ -23319,35 +23350,35 @@ rknand_sys_storage_ioctl:
 	bl	StorageSysDataStore
 	str	wzr, [x19,-44]
 	str	wzr, [x19,-48]
-	b	.L3757
-.L3663:
-	adrp	x0, .LC297
-	add	x0, x0, :lo12:.LC297
+	b	.L3761
+.L3667:
+	adrp	x0, .LC299
+	add	x0, x0, :lo12:.LC299
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w2, [x29,56]
 	mov	w1, 20037
 	movk	w1, 0x4253, lsl 16
 	cmp	w2, w1
-	bne	.L3703
+	bne	.L3707
 	ldr	w1, [x29,60]
 	cmp	w1, 512
-	bhi	.L3703
+	bhi	.L3707
 	adrp	x19, .LANCHOR7
 	add	x1, x19, :lo12:.LANCHOR7
 	ldr	w2, [x1,-44]
 	cmp	w2, 1
-	beq	.L3710
+	beq	.L3714
 	ldr	x2, [x1,-40]
 	mov	w3, 22867
 	movk	w3, 0x4453, lsl 16
 	ldr	w4, [x2]
 	cmp	w4, w3
-	beq	.L3711
+	beq	.L3715
 	mov	w3, 22867
 	movk	w3, 0x4453, lsl 16
 	str	w3, [x2]
@@ -23357,7 +23388,7 @@ rknand_sys_storage_ioctl:
 	ldr	x1, [x1,-40]
 	str	w0, [x1,8]
 	str	w0, [x1,12]
-.L3711:
+.L3715:
 	add	x20, x19, :lo12:.LANCHOR7
 	mov	w0, 1
 	ldr	x1, [x20,-40]
@@ -23369,7 +23400,7 @@ rknand_sys_storage_ioctl:
 	movk	w1, 0x4b4d, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	beq	.L3712
+	beq	.L3716
 	mov	w1, 21060
 	movk	w1, 0x4b4d, lsl 16
 	str	w1, [x0]
@@ -23378,7 +23409,7 @@ rknand_sys_storage_ioctl:
 	str	w1, [x0,4]
 	ldr	x0, [x20,-56]
 	str	wzr, [x0,8]
-.L3712:
+.L3716:
 	add	x19, x19, :lo12:.LANCHOR7
 	mov	w1, 0
 	mov	x2, 128
@@ -23391,66 +23422,66 @@ rknand_sys_storage_ioctl:
 	bl	StorageSysDataStore
 	mov	w0, 1
 	str	w0, [x19,-44]
-	b	.L3757
-.L3669:
-	adrp	x0, .LC298
-	add	x0, x0, :lo12:.LC298
+	b	.L3761
+.L3673:
+	adrp	x0, .LC300
+	add	x0, x0, :lo12:.LC300
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 20051
 	movk	w0, 0x4144, lsl 16
 	cmp	w1, w0
-	bne	.L3703
+	bne	.L3707
 	ldr	w2, [x29,60]
 	cmp	w2, 512
-	bhi	.L3703
+	bhi	.L3707
 	adrp	x1, .LANCHOR7
 	add	x0, x29, 64
 	add	x1, x1, :lo12:.LANCHOR7
 	uxtw	x2, w2
 	sub	x1, x1, #32
-	b	.L3765
-.L3670:
+	b	.L3769
+.L3674:
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3713
-	adrp	x0, .LC299
-	add	x0, x0, :lo12:.LC299
-	b	.L3755
-.L3713:
+	bne	.L3717
+	adrp	x0, .LC301
+	add	x0, x0, :lo12:.LC301
+	b	.L3759
+.L3717:
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3715
-	adrp	x0, .LC300
-	add	x0, x0, :lo12:.LC300
-	b	.L3755
-.L3715:
-	adrp	x0, .LC301
-	add	x0, x0, :lo12:.LC301
-.L3755:
+	bne	.L3719
+	adrp	x0, .LC302
+	add	x0, x0, :lo12:.LC302
+	b	.L3759
+.L3719:
+	adrp	x0, .LC303
+	add	x0, x0, :lo12:.LC303
+.L3759:
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 17227
 	movk	w0, 0x4c4f, lsl 16
 	cmp	w1, w0
-	bne	.L3760
+	bne	.L3764
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
 	adrp	x0, .LANCHOR7
-	bne	.L3716
+	bne	.L3720
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x1, x29, 56
 	mov	x2, 16
@@ -23460,65 +23491,65 @@ rknand_sys_storage_ioctl:
 	strb	w0, [x29,64]
 	mov	x0, x20
 	bl	rk_copy_to_user
-	cbz	x0, .L3660
-	b	.L3760
-.L3716:
+	cbz	x0, .L3664
+	b	.L3764
+.L3720:
 	add	x20, x0, :lo12:.LANCHOR7
 	ldr	w1, [x20,480]
 	cmp	w1, 10
-	bhi	.L3760
+	bhi	.L3764
 	ldr	x1, [x20,-56]
 	ldr	w2, [x29,60]
 	ldr	w3, [x1,24]
 	cmp	w3, w2
-	beq	.L3717
-	cbz	w3, .L3717
-	adrp	x0, .LC302
+	beq	.L3721
+	cbz	w3, .L3721
+	adrp	x0, .LC304
 	mov	w1, w2
-	add	x0, x0, :lo12:.LC302
+	add	x0, x0, :lo12:.LC304
 	bl	printk
 	ldr	w0, [x20,480]
 	add	w0, w0, 1
 	str	w0, [x20,480]
-	b	.L3760
-.L3717:
+	b	.L3764
+.L3721:
 	add	x0, x0, :lo12:.LANCHOR7
 	str	wzr, [x0,480]
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3718
+	bne	.L3722
 	str	wzr, [x1,20]
 	str	wzr, [x1,24]
-	b	.L3719
-.L3718:
+	b	.L3723
+.L3722:
 	mov	w0, 1
 	str	w2, [x1,24]
 	str	w0, [x1,20]
-.L3719:
+.L3723:
 	mov	w0, 1
 	mov	x19, -2
 	bl	StorageSysDataStore
 	cmn	w0, #1
-	bne	.L3757
-	b	.L3687
-.L3682:
-	adrp	x0, .LC303
-	add	x0, x0, :lo12:.LC303
+	bne	.L3761
+	b	.L3691
+.L3686:
+	adrp	x0, .LC305
+	add	x0, x0, :lo12:.LC305
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 17750
 	movk	w0, 0x444e, lsl 16
 	cmp	w1, w0
-	bne	.L3703
+	bne	.L3707
 	ldr	w2, [x29,60]
 	cmp	w2, 504
-	bhi	.L3703
+	bhi	.L3707
 	mov	w0, 30224
 	adrp	x1, .LANCHOR7
 	movk	w0, 0x4004, lsl 16
@@ -23526,72 +23557,72 @@ rknand_sys_storage_ioctl:
 	cmp	w19, w0
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x29, 64
-	bne	.L3720
+	bne	.L3724
 	ldr	x1, [x1,488]
-	b	.L3756
-.L3720:
+	b	.L3760
+.L3724:
 	ldr	x1, [x1,496]
-.L3756:
+.L3760:
 	add	x1, x1, 8
-.L3765:
+.L3769:
 	bl	memcpy
-.L3766:
+.L3770:
 	mov	x0, x20
 	add	x1, x29, 56
 	mov	x2, 520
-	b	.L3752
-.L3679:
-	adrp	x0, .LC304
-	add	x0, x0, :lo12:.LC304
+	b	.L3756
+.L3683:
+	adrp	x0, .LC306
+	add	x0, x0, :lo12:.LC306
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3706
+	cbnz	x0, .L3710
 	ldr	w1, [x29,56]
 	mov	w0, 17750
 	movk	w0, 0x444e, lsl 16
 	cmp	w1, w0
-	bne	.L3703
+	bne	.L3707
 	ldr	w2, [x29,60]
 	cmp	w2, 504
-	bhi	.L3703
+	bhi	.L3707
 	mov	w0, 30225
 	add	w2, w2, 8
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
 	adrp	x19, .LANCHOR7
 	add	x19, x19, :lo12:.LANCHOR7
-	bne	.L3722
+	bne	.L3726
 	ldr	x0, [x19,488]
 	add	x1, x29, 56
 	bl	memcpy
 	mov	w0, 2
 	ldr	x1, [x19,488]
-	b	.L3758
-.L3722:
+	b	.L3762
+.L3726:
 	ldr	x0, [x19,496]
 	add	x1, x29, 56
 	bl	memcpy
 	ldr	x1, [x19,496]
 	mov	w0, 3
-.L3758:
+.L3762:
 	bl	StorageSysDataStore
 	uxtw	x19, w0
-	b	.L3687
-.L3757:
+	b	.L3691
+.L3761:
 	mov	x19, 0
-.L3687:
-	adrp	x0, .LC305
+.L3691:
+	adrp	x0, .LC307
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC305
+	add	x0, x0, :lo12:.LC307
 	bl	printk
 	mov	x0, x19
-	b	.L3660
-.L3723:
+	b	.L3664
+.L3727:
 	mov	x0, -22
-.L3660:
+.L3664:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -23626,25 +23657,25 @@ rk_ftl_storage_sys_init:
 	ldr	w0, [x21,16]
 	ldr	w22, [x21,508]
 	str	w0, [x19,-44]
-	cbz	w22, .L3772
+	cbz	w22, .L3776
 	mov	x0, x21
 	mov	w1, 508
 	bl	js_hash
 	cmp	w22, w0
-	beq	.L3772
-	adrp	x0, .LC306
+	beq	.L3776
+	adrp	x0, .LC308
 	str	wzr, [x21,16]
-	add	x0, x0, :lo12:.LC306
+	add	x0, x0, :lo12:.LC308
 	str	wzr, [x19,-44]
 	bl	printk
-.L3772:
+.L3776:
 	add	x0, x20, :lo12:.LANCHOR7
 	ldr	w1, [x0,-44]
-	cbz	w1, .L3773
+	cbz	w1, .L3777
 	mov	w1, 5161
 	movk	w1, 0xc059, lsl 16
 	str	w1, [x0,-48]
-.L3773:
+.L3777:
 	add	x20, x20, :lo12:.LANCHOR7
 	mov	w0, 2
 	ldr	x1, [x20,488]
@@ -23680,19 +23711,19 @@ rk_ftl_vendor_storage_init:
 	add	x1, x21, :lo12:.LANCHOR7
 	mov	w19, -12
 	str	x0, [x1,504]
-	cbz	x0, .L3782
+	cbz	x0, .L3786
 	mov	w23, 0
-	adrp	x24, .LC307
+	adrp	x24, .LC309
 	mov	w19, w23
 	mov	w22, w23
-	add	x24, x24, :lo12:.LC307
-.L3786:
+	add	x24, x24, :lo12:.LC309
+.L3790:
 	add	x20, x21, :lo12:.LANCHOR7
 	lsl	w0, w22, 7
 	mov	w1, 128
 	ldr	x2, [x20,504]
 	bl	FlashBootVendorRead
-	cbnz	w0, .L3783
+	cbnz	w0, .L3787
 	ldr	x3, [x20,504]
 	mov	x0, x24
 	add	x2, x3, 61440
@@ -23705,29 +23736,29 @@ rk_ftl_vendor_storage_init:
 	movk	w0, 0x524b, lsl 16
 	ldr	w1, [x20]
 	cmp	w1, w0
-	bne	.L3784
+	bne	.L3788
 	ldr	w0, [x20,4]
 	cmp	w19, w0
-	bcs	.L3784
+	bcs	.L3788
 	add	x1, x20, 61440
 	ldr	w1, [x1,4092]
 	cmp	w1, w0
 	csel	w23, w23, w22, ne
 	csel	w19, w19, w0, ne
-.L3784:
-	cbnz	w22, .L3794
+.L3788:
+	cbnz	w22, .L3798
 	mov	w22, 1
-	b	.L3786
-.L3794:
-	cbz	w19, .L3787
+	b	.L3790
+.L3798:
+	cbz	w19, .L3791
 	lsl	w0, w23, 7
 	mov	w1, 128
 	mov	x2, x20
 	bl	FlashBootVendorRead
 	mov	w19, w0
-	cbz	w0, .L3782
-	b	.L3783
-.L3787:
+	cbz	w0, .L3786
+	b	.L3787
+.L3791:
 	mov	x0, x20
 	mov	w1, w19
 	mov	x2, 65536
@@ -23741,14 +23772,14 @@ rk_ftl_vendor_storage_init:
 	mov	w0, -1032
 	strh	w19, [x20,12]
 	strh	w0, [x20,14]
-	b	.L3782
-.L3783:
+	b	.L3786
+.L3787:
 	add	x21, x21, :lo12:.LANCHOR7
 	mov	w19, -1
 	ldr	x0, [x21,504]
 	bl	kfree
 	str	xzr, [x21,504]
-.L3782:
+.L3786:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -23766,18 +23797,18 @@ rk_ftl_vendor_read:
 	ldr	x5, [x3,#:lo12:.LANCHOR7+504]
 	mov	w3, -1
 	str	x19, [sp,16]
-	cbz	x5, .L3796
+	cbz	x5, .L3800
 	ldrh	w3, [x5,10]
 	mov	x4, 0
-.L3797:
+.L3801:
 	cmp	w4, w3
 	mov	w6, w4
-	bcs	.L3801
+	bcs	.L3805
 	add	x7, x5, x4, lsl 3
 	add	x4, x4, 1
 	ldrh	w7, [x7,16]
 	cmp	w7, w0
-	bne	.L3797
+	bne	.L3801
 	add	x6, x5, x6, uxtw 3
 	ldrh	w4, [x6,20]
 	mov	x0, x1
@@ -23789,10 +23820,10 @@ rk_ftl_vendor_read:
 	uxtw	x2, w19
 	bl	memcpy
 	mov	w3, w19
-	b	.L3796
-.L3801:
+	b	.L3800
+.L3805:
 	mov	w3, -1
-.L3796:
+.L3800:
 	mov	w0, w3
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -23815,38 +23846,38 @@ rk_ftl_vendor_write:
 	mov	w26, w2
 	mov	x28, x1
 	mov	w2, -1
-	cbz	x19, .L3803
+	cbz	x19, .L3807
 	add	w20, w26, 63
 	ldrh	w3, [x19,10]
 	ldrh	w23, [x19,8]
 	and	w20, w20, -64
 	mov	x2, 0
-.L3804:
+.L3808:
 	cmp	w2, w3
 	mov	w4, w2
-	bcs	.L3819
+	bcs	.L3823
 	add	x0, x19, x2, lsl 3
 	add	x2, x2, 1
 	ldrh	w0, [x0,16]
 	cmp	w0, w6
-	bne	.L3804
+	bne	.L3808
 	add	x21, x19, x4, uxtw 3
 	ldrh	w24, [x21,20]
 	add	x5, x19, 1024
 	add	w24, w24, 63
 	and	w24, w24, -64
 	cmp	w26, w24
-	bls	.L3805
+	bls	.L3809
 	ldrh	w0, [x19,14]
 	mov	w2, -1
 	cmp	w0, w20
-	bcc	.L3803
+	bcc	.L3807
 	ldrh	w21, [x21,18]
 	add	w22, w3, w2
-.L3806:
+.L3810:
 	cmp	w4, w22
 	uxtw	x3, w4
-	bcs	.L3820
+	bcs	.L3824
 	add	x3, x19, x3, lsl 3
 	add	w25, w4, 1
 	add	x1, x19, x25, uxtw 3
@@ -23869,8 +23900,8 @@ rk_ftl_vendor_write:
 	mov	w4, w25
 	ldr	x6, [x29,96]
 	ldr	x5, [x29,104]
-	b	.L3806
-.L3820:
+	b	.L3810
+.L3824:
 	add	x3, x19, x3, lsl 3
 	uxth	w21, w21
 	mov	x1, x28
@@ -23887,20 +23918,20 @@ rk_ftl_vendor_write:
 	add	w24, w24, w0
 	sub	w24, w24, w20
 	strh	w24, [x19,14]
-	b	.L3818
-.L3805:
+	b	.L3822
+.L3809:
 	ldrh	w0, [x21,18]
 	mov	x1, x28
 	uxtw	x2, w26
 	add	x0, x5, x0
 	bl	memcpy
 	strh	w26, [x21,20]
-	b	.L3818
-.L3819:
+	b	.L3822
+.L3823:
 	ldrh	w4, [x19,14]
 	mov	w2, -1
 	cmp	w4, w20
-	bcc	.L3803
+	bcc	.L3807
 	add	x3, x19, x3, uxth 3
 	strh	w6, [x3,16]
 	uxth	w20, w20
@@ -23920,7 +23951,7 @@ rk_ftl_vendor_write:
 	ldrh	w0, [x19,10]
 	add	w0, w0, 1
 	strh	w0, [x19,10]
-.L3818:
+.L3822:
 	ldr	w0, [x19,4]
 	add	x1, x19, 61440
 	mov	x2, x19
@@ -23937,7 +23968,7 @@ rk_ftl_vendor_write:
 	lsl	w0, w23, 7
 	bl	FlashBootVendorWrite
 	mov	w2, 0
-.L3803:
+.L3807:
 	mov	w0, w2
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -23961,37 +23992,37 @@ rk_ftl_vendor_storage_ioctl:
 	mov	x21, x2
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3822
+	cbz	x0, .L3826
 	mov	w2, 30209
 	ldr	x1, [x29,56]
 	movk	w2, 0x4004, lsl 16
 	cmp	w1, w2
-	beq	.L3824
+	beq	.L3828
 	mov	w2, 30210
 	movk	w2, 0x4004, lsl 16
 	cmp	w1, w2
-	beq	.L3825
-	b	.L3836
-.L3824:
+	beq	.L3829
+	b	.L3840
+.L3828:
 	mov	x1, x21
 	mov	x2, 8
 	bl	rk_copy_from_user
-	cbnz	x0, .L3836
+	cbnz	x0, .L3840
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	beq	.L3827
-.L3828:
+	beq	.L3831
+.L3832:
 	mov	x20, -1
-	b	.L3823
-.L3827:
+	b	.L3827
+.L3831:
 	ldrh	w0, [x19,4]
 	add	x1, x19, 8
 	ldrh	w2, [x19,6]
 	bl	rk_ftl_vendor_read
 	cmn	w0, #1
-	beq	.L3828
+	beq	.L3832
 	uxth	x2, w0
 	strh	w0, [x19,6]
 	mov	x1, x19
@@ -24001,38 +24032,38 @@ rk_ftl_vendor_storage_ioctl:
 	bl	rk_copy_to_user
 	cmp	x0, xzr
 	csel	x20, xzr, x20, eq
-	b	.L3823
-.L3825:
+	b	.L3827
+.L3829:
 	mov	x1, x21
 	mov	x2, 8
 	bl	rk_copy_from_user
-	cbnz	x0, .L3836
+	cbnz	x0, .L3840
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	bne	.L3828
+	bne	.L3832
 	ldrh	w3, [x19,6]
 	cmp	w3, 4087
-	bhi	.L3828
+	bhi	.L3832
 	add	w2, w3, 8
 	mov	x0, x19
 	mov	x1, x21
 	sxtw	x2, w2
 	bl	rk_copy_from_user
-	cbnz	x0, .L3836
+	cbnz	x0, .L3840
 	ldrh	w0, [x19,4]
 	add	x1, x19, 8
 	ldrh	w2, [x19,6]
 	bl	rk_ftl_vendor_write
 	sxtw	x20, w0
-	b	.L3823
-.L3836:
+	b	.L3827
+.L3840:
 	mov	x20, -14
-.L3823:
+.L3827:
 	mov	x0, x19
 	bl	kfree
-.L3822:
+.L3826:
 	mov	x0, x20
 	ldr	x21, [sp,32]
 	ldp	x19, x20, [sp,16]
@@ -25105,11 +25136,6 @@ __func__.34426:
 __func__.34506:
 	.string	"sblk_read_page"
 	.zero	1
-	.type	__func__.33493, %object
-	.size	__func__.33493, 21
-__func__.33493:
-	.string	"gc_check_data_one_wl"
-	.zero	3
 	.type	__func__.18539, %object
 	.size	__func__.18539, 26
 __func__.18539:
@@ -25211,6 +25237,11 @@ __func__.34129:
 __func__.33331:
 	.string	"zftl_read"
 	.zero	6
+	.type	__func__.33493, %object
+	.size	__func__.33493, 21
+__func__.33493:
+	.string	"gc_check_data_one_wl"
+	.zero	3
 	.type	__func__.34219, %object
 	.size	__func__.34219, 19
 __func__.34219:
@@ -25240,7 +25271,7 @@ __func__.33362:
 .LC1:
 	.string	"%s\n"
 .LC2:
-	.string	"FTL version: 6.0.8 20180615"
+	.string	"FTL version: 6.0.9 20180704"
 .LC3:
 	.string	"zftl_debug:0x%x\n"
 .LC4:
@@ -25558,298 +25589,302 @@ __func__.33362:
 .LC160:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 .LC161:
-	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC162:
 	.string	"flash_prog_page %x %x %x\n"
-.LC163:
+.LC162:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
-.LC164:
+.LC163:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
-.LC165:
+.LC164:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC166:
+.LC165:
 	.string	"spare"
-.LC167:
+.LC166:
 	.string	"data"
-.LC168:
+.LC167:
 	.string	"write error: %x\n"
-.LC169:
+.LC168:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
-.LC170:
+.LC169:
 	.string	"%d %x @%d %x\n"
-.LC171:
+.LC170:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC172:
+.LC171:
 	.string	"%s %d %d %x %x\n"
-.LC173:
+.LC172:
 	.string	"saved_active_page  = %x\n"
-.LC174:
+.LC173:
 	.string	"saved_active_plane = %x\n"
-.LC175:
+.LC174:
 	.string	"sblk = %x\n"
-.LC176:
+.LC175:
 	.string	"phy_blk = %x %x\n"
-.LC177:
+.LC176:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC178:
+.LC177:
 	.string	"dump write = %x\n"
-.LC179:
+.LC178:
 	.string	"pm_write_page write error: %x\n"
-.LC180:
+.LC179:
 	.string	"finfo:"
-.LC181:
+.LC180:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC182:
+.LC181:
 	.string	"sys_info_flush error:%x\n"
-.LC183:
+.LC182:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC184:
+.LC183:
 	.string	"l2p:"
-.LC185:
+.LC184:
 	.string	"free_buf_count: %d\n"
-.LC186:
+.LC185:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC187:
+.LC186:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC188:
+.LC187:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC189:
+.LC188:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC190:
+.LC189:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC191:
+.LC190:
 	.string	"lpa:"
-.LC192:
+.LC191:
 	.string	"vpn:"
-.LC193:
+.LC192:
 	.string	"sblk:"
-.LC194:
+.LC193:
 	.string	"lpa_hash:"
-.LC195:
+.LC194:
 	.string	"lpa_hash_index:"
-.LC196:
+.LC195:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
-.LC197:
+.LC196:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC198:
+.LC197:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC199:
+.LC198:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC200:
+.LC199:
 	.string	"pm_ppa:"
-.LC201:
+.LC200:
 	.string	"data:"
-.LC202:
+.LC201:
 	.string	"spare:"
-.LC203:
+.LC202:
 	.string	"pm_init posr %x %x %x\n"
-.LC204:
+.LC203:
 	.string	"pm_init recovery %x %x %x\n"
-.LC205:
+.LC204:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
-.LC206:
+.LC205:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC207:
+.LC206:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC208:
+.LC207:
 	.string	"gc_recovery: %x vpn = %x\n"
-.LC209:
+.LC208:
 	.string	"_c_user_data_density := %d\n"
-.LC210:
+.LC209:
 	.string	"_c_totle_phy_density := %d\n"
-.LC211:
+.LC210:
 	.string	"_c_totle_log_page := %d\n"
-.LC212:
+.LC211:
 	.string	"_c_totle_data_density := %d\n"
-.LC213:
+.LC212:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC214:
+.LC213:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC215:
+.LC214:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC216:
+.LC215:
 	.string	"_min_slc_super_block := %d\n"
-.LC217:
+.LC216:
 	.string	"_max_xlc_super_block := %d\n"
-.LC218:
+.LC217:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC219:
+.LC218:
 	.string	"flash info size: %d %d %d\n"
-.LC220:
+.LC219:
 	.string	"ftl_init %x\n"
-.LC221:
+.LC220:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC222:
+.LC221:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC223:
+.LC222:
 	.string	"lpa: %x %x %x\n"
-.LC224:
+.LC223:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
-.LC225:
+.LC224:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC226:
+.LC225:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
-.LC227:
+.LC226:
 	.string	"gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:%d\n"
-.LC228:
+.LC227:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC229:
+.LC228:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC230:
+.LC229:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC231:
+.LC230:
 	.string	"index= %x, lpa=%x\n"
-.LC232:
+.LC231:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
-.LC233:
+.LC232:
 	.string	"ftl_read %x %x %x\n"
-.LC234:
+.LC233:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC235:
+.LC234:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
-.LC236:
+.LC235:
 	.string	"zftl debug cmd: %s\n"
-.LC237:
+.LC236:
 	.string	"cmd:"
-.LC238:
+.LC237:
 	.string	"dumpl2p"
-.LC239:
+.LC238:
 	.string	"pm l2p:"
-.LC240:
+.LC239:
 	.string	"pm blk:"
-.LC241:
+.LC240:
 	.string	"dumppm:"
-.LC242:
+.LC241:
 	.string	"p_cmd: %s\n"
-.LC243:
+.LC242:
 	.string	"pm ram = %x, %x\n"
-.LC244:
+.LC243:
 	.string	"ram:"
-.LC245:
+.LC244:
 	.string	"pm:"
-.LC246:
+.LC245:
 	.string	"dumpsys"
-.LC247:
+.LC246:
 	.string	"dumplist:"
-.LC248:
+.LC247:
 	.string	"vpncheck"
-.LC249:
+.LC248:
 	.string	"dumpppa:"
-.LC250:
+.LC249:
 	.string	"dumpblk:"
-.LC251:
+.LC250:
 	.string	"setzdebug:"
-.LC252:
+.LC251:
 	.string	"lpa2ppa:"
-.LC253:
+.LC252:
 	.string	"lpa: %x--> ppa: %x\n"
-.LC254:
+.LC253:
 	.string	"help:\n"
-.LC255:
+.LC254:
 	.string	"1. echo dumpl2p > /proc/zftl_debug\n"
-.LC256:
+.LC255:
 	.string	"2. echo dumppm:x > /proc/zftl_debug\n"
-.LC257:
+.LC256:
 	.string	"3. echo dumpsys > /proc/zftl_debug\n"
-.LC258:
+.LC257:
 	.string	"4. echo dumpppa:x > /proc/zftl_debug\n"
-.LC259:
+.LC258:
 	.string	"5. echo vpncheck > /proc/zftl_debug\n"
-.LC260:
+.LC259:
 	.string	"6. echo setzdebug:x > /proc/zftl_debug\n"
-.LC261:
+.LC260:
 	.string	"7. echo dumplist > /proc/zftl_debug\n"
-.LC262:
+.LC261:
 	.string	"8. echo lpa2ppa:x> /proc/zftl_debug\n"
+.LC262:
+	.string	"gc_lpa:"
 .LC263:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
+	.string	"gc_ppa:"
 .LC264:
-	.string	"ftl_update_l2p_map"
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 .LC265:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC266:
-	.string	"sblk %x vpn: %d %d\n"
+	.string	"ftl_update_l2p_map"
 .LC267:
-	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
+	.string	"lpa_tbl:"
 .LC268:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
+	.string	"sblk %x vpn: %d %d\n"
 .LC269:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 .LC270:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC271:
-	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC272:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
 .LC273:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 .LC274:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC275:
-	.string	"gc free %x, %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC276:
-	.string	"ftlwrite %x %x %x\n"
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
 .LC277:
-	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.string	"gc free %x, %d\n"
 .LC278:
-	.string	"id_block_prog_msb_ff_data slc page = %d pageadd=%x %x\n"
+	.string	"ftlwrite %x %x %x\n"
 .LC279:
-	.string	"write_idblock fix data %x %x\n"
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 .LC280:
-	.string	"idblk:"
+	.string	"id_block_prog_msb_ff_data slc page = %d pageadd=%x %x\n"
 .LC281:
-	.string	"write_idblock totle_sec %x %x\n"
+	.string	"write_idblock fix data %x %x\n"
 .LC282:
-	.string	"READ_SECTOR_IO\n"
+	.string	"idblk:"
 .LC283:
-	.string	"rk_copy_from_user error\n"
+	.string	"write_idblock totle_sec %x %x\n"
 .LC284:
-	.string	"READ_SECTOR_IO %x %x\n"
+	.string	"READ_SECTOR_IO\n"
 .LC285:
-	.string	"rk_copy_to_user error\n"
+	.string	"rk_copy_from_user error\n"
 .LC286:
-	.string	"WRITE_SECTOR_IO\n"
+	.string	"READ_SECTOR_IO %x %x\n"
 .LC287:
-	.string	"WRITE_SECTOR_IO %x %x\n"
+	.string	"rk_copy_to_user error\n"
 .LC288:
-	.string	"END_WRITE_SECTOR_IO\n"
+	.string	"WRITE_SECTOR_IO\n"
 .LC289:
-	.string	"END_WRITE_SECTOR_IO %x %x\n"
+	.string	"WRITE_SECTOR_IO %x %x\n"
 .LC290:
-	.string	"GET_FLASH_INFO_IO\n"
+	.string	"END_WRITE_SECTOR_IO\n"
 .LC291:
-	.string	"GET_BAD_BLOCK_IO\n"
+	.string	"END_WRITE_SECTOR_IO %x %x\n"
 .LC292:
-	.string	"GET_LOCK_FLAG_IO\n"
+	.string	"GET_FLASH_INFO_IO\n"
 .LC293:
-	.string	"GET_PUBLIC_KEY_IO\n"
+	.string	"GET_BAD_BLOCK_IO\n"
 .LC294:
-	.string	"RKNAND_GET_DRM_KEY\n"
+	.string	"GET_LOCK_FLAG_IO\n"
 .LC295:
-	.string	"RKNAND_STORE_DRM_KEY\n"
+	.string	"GET_PUBLIC_KEY_IO\n"
 .LC296:
-	.string	"RKNAND_DIASBLE_SECURE_BOOT\n"
+	.string	"RKNAND_GET_DRM_KEY\n"
 .LC297:
-	.string	"RKNAND_ENASBLE_SECURE_BOOT\n"
+	.string	"RKNAND_STORE_DRM_KEY\n"
 .LC298:
-	.string	"RKNAND_GET_SN_SECTOR\n"
+	.string	"RKNAND_DIASBLE_SECURE_BOOT\n"
 .LC299:
-	.string	"RKNAND_LOADER_UNLOCK\n"
+	.string	"RKNAND_ENASBLE_SECURE_BOOT\n"
 .LC300:
-	.string	"RKNAND_LOADER_STATUS\n"
+	.string	"RKNAND_GET_SN_SECTOR\n"
 .LC301:
-	.string	"RKNAND_LOADER_LOCK\n"
+	.string	"RKNAND_LOADER_UNLOCK\n"
 .LC302:
-	.string	"LockKey not match %d\n"
+	.string	"RKNAND_LOADER_STATUS\n"
 .LC303:
-	.string	"RKNAND_GET_VENDOR_SECTOR\n"
+	.string	"RKNAND_LOADER_LOCK\n"
 .LC304:
-	.string	"RKNAND_STORE_VENDOR_SECTOR\n"
+	.string	"LockKey not match %d\n"
 .LC305:
-	.string	"return ret = %lx\n"
+	.string	"RKNAND_GET_VENDOR_SECTOR\n"
 .LC306:
-	.string	"secureBootEn check error\n"
+	.string	"RKNAND_STORE_VENDOR_SECTOR\n"
 .LC307:
+	.string	"return ret = %lx\n"
+.LC308:
+	.string	"secureBootEn check error\n"
+.LC309:
 	.string	"\0013vendor storage %x,%x,%x\n"
 	.data
 	.align	3

From 2bba0563a82108b3fe91104ee82b8df2a5e3b73f Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Mon, 2 Jul 2018 17:12:25 +0800
Subject: [PATCH 0085/1852] drm/rockchip: add support mcu init screen

the mcu init cmd should be sent from crtc mcu interface,
so we add the rockchip_drm_crtc_send_mcu_cmd to do this.

Change-Id: I7fedfb90c6074e8837a825d10e0dcd9c16bfc1d0
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/panel/panel-simple.c        | 64 ++++++++++++++++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 26 +++++++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h |  1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 84 +++++++++++++++++++++
 include/drm/drm_panel.h                     |  3 +
 5 files changed, 178 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 9a2be6f20e46b..ce93af189b050 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -37,6 +37,7 @@
 #include <video/mipi_display.h>
 #include <linux/of_device.h>
 #include <video/of_display_timing.h>
+#include <linux/of_graph.h>
 #include <video/videomode.h>
 
 struct cmd_ctrl_hdr {
@@ -121,6 +122,7 @@ struct panel_simple {
 
 	struct panel_cmds *on_cmds;
 	struct panel_cmds *off_cmds;
+	struct device_node *np_crtc;
 };
 
 enum rockchip_cmd_type {
@@ -129,6 +131,12 @@ enum rockchip_cmd_type {
 	CMD_TYPE_MCU
 };
 
+enum MCU_IOCTL {
+	MCU_WRCMD = 0,
+	MCU_WRDATA,
+	MCU_SETBYPASS,
+};
+
 static inline int get_panel_cmd_type(const char *s)
 {
 	if (!s)
@@ -256,6 +264,32 @@ static void panel_simple_spi_write_cmd(struct panel_simple *panel,
 	gpiod_direction_output(panel->spi_cs_gpio, 1);
 }
 
+static int panel_simple_mcu_send_cmds(struct panel_simple *panel,
+				      struct panel_cmds *cmds)
+{
+	int i;
+
+	if (!cmds)
+		return -EINVAL;
+
+	rockchip_drm_crtc_send_mcu_cmd(panel->base.drm,
+				       panel->np_crtc, MCU_SETBYPASS, 1);
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct cmd_desc *cmd = &cmds->cmds[i];
+		u32 value = 0;
+
+		value = cmd->payload[0];
+		rockchip_drm_crtc_send_mcu_cmd(panel->base.drm, panel->np_crtc,
+					       cmd->dchdr.dtype, value);
+		if (cmd->dchdr.wait)
+			msleep(cmd->dchdr.wait);
+	}
+	rockchip_drm_crtc_send_mcu_cmd(panel->base.drm,
+				       panel->np_crtc, MCU_SETBYPASS, 0);
+
+	return 0;
+}
+
 static int panel_simple_spi_send_cmds(struct panel_simple *panel,
 				      struct panel_cmds *cmds)
 {
@@ -524,6 +558,7 @@ static int panel_simple_loader_protect(struct drm_panel *panel, bool on)
 static int panel_simple_disable(struct drm_panel *panel)
 {
 	struct panel_simple *p = to_panel_simple(panel);
+	int err = 0;
 
 	if (!p->enabled)
 		return 0;
@@ -536,6 +571,11 @@ static int panel_simple_disable(struct drm_panel *panel)
 	if (p->desc && p->desc->delay.disable)
 		msleep(p->desc->delay.disable);
 
+	if (p->cmd_type == CMD_TYPE_MCU) {
+		err = panel_simple_mcu_send_cmds(p, p->off_cmds);
+		if (err)
+			dev_err(p->dev, "failed to send mcu off cmds\n");
+	}
 	p->enabled = false;
 
 	return 0;
@@ -623,10 +663,16 @@ static int panel_simple_prepare(struct drm_panel *panel)
 static int panel_simple_enable(struct drm_panel *panel)
 {
 	struct panel_simple *p = to_panel_simple(panel);
+	int err = 0;
 
 	if (p->enabled)
 		return 0;
 
+	if (p->cmd_type == CMD_TYPE_MCU) {
+		err = panel_simple_mcu_send_cmds(p, p->on_cmds);
+		if (err)
+			dev_err(p->dev, "failed to send mcu on cmds\n");
+	}
 	if (p->desc && p->desc->delay.enable)
 		msleep(p->desc->delay.enable);
 
@@ -793,6 +839,24 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
 		gpiod_direction_output(panel->spi_cs_gpio, 1);
 		gpiod_direction_output(panel->spi_sdi_gpio, 1);
 		gpiod_direction_output(panel->spi_scl_gpio, 1);
+	} else if (panel->cmd_type == CMD_TYPE_MCU) {
+		struct device_node *port, *endpoint;
+		struct device_node *np;
+
+		port = of_graph_get_port_by_id(dev->of_node, 0);
+		if (port) {
+			endpoint = of_get_next_child(port, NULL);
+			/* get connect device node */
+			np = of_graph_get_remote_port_parent(endpoint);
+
+			port = of_graph_get_port_by_id(np, 0);
+			if (port) {
+				endpoint = of_get_next_child(port, NULL);
+				/* get crtc device node */
+				np = of_graph_get_remote_port_parent(endpoint);
+				panel->np_crtc = np;
+			}
+		}
 	}
 	panel->power_invert =
 			of_property_read_bool(dev->of_node, "power-invert");
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 3b52320bcfa2e..4519d72507197 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -895,6 +895,32 @@ static int __init rockchip_clocks_loader_unprotect(void)
 late_initcall_sync(rockchip_clocks_loader_unprotect);
 #endif
 
+int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
+				   struct device_node *np_crtc,
+				   u32 type, u32 value)
+{
+	struct drm_crtc *crtc;
+	int pipe = 0;
+	struct rockchip_drm_private *priv;
+
+	if (!np_crtc || !of_device_is_available(np_crtc))
+		return -EINVAL;
+
+	drm_for_each_crtc(crtc, drm_dev) {
+		if (of_get_parent(crtc->port) == np_crtc)
+			break;
+	}
+
+	pipe = drm_crtc_index(crtc);
+	if (pipe >= ROCKCHIP_MAX_CRTC)
+		return -EINVAL;
+	priv = crtc->dev->dev_private;
+	if (priv->crtc_funcs[pipe]->crtc_send_mcu_cmd)
+		priv->crtc_funcs[pipe]->crtc_send_mcu_cmd(crtc, type, value);
+
+	return 0;
+}
+
 /*
  * Attach a (component) device to the shared drm dma mapping from master drm
  * device.  This is used by the VOPs to map GEM buffers to a common DMA
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 4b2b7888626e5..0a6b9cd580f90 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -53,6 +53,7 @@ struct rockchip_crtc_funcs {
 					   const struct drm_display_mode *mode,
 					   int output_type);
 	void (*crtc_close)(struct drm_crtc *crtc);
+	void (*crtc_send_mcu_cmd)(struct drm_crtc *crtc, u32 type, u32 value);
 };
 
 struct drm_rockchip_subdrv {
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 71cd1a6ea9075..a2c1d85bba95b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -181,6 +181,15 @@ struct vop_plane_state {
 	unsigned long offset;
 };
 
+struct rockchip_mcu_timing {
+	int mcu_pix_total;
+	int mcu_cs_pst;
+	int mcu_cs_pend;
+	int mcu_rw_pst;
+	int mcu_rw_pend;
+	int mcu_hold_mode;
+};
+
 struct vop_win {
 	struct vop_win *parent;
 	struct drm_plane base;
@@ -273,6 +282,8 @@ struct vop {
 
 	struct rockchip_dclk_pll *pll;
 
+	struct rockchip_mcu_timing mcu_timing;
+
 	struct vop_win win[];
 };
 
@@ -2411,6 +2422,36 @@ static void vop_crtc_close(struct drm_crtc *crtc)
 	mutex_unlock(&vop->vop_lock);
 }
 
+static void vop_crtc_send_mcu_cmd(struct drm_crtc *crtc,  u32 type, u32 value)
+{
+	struct vop *vop = NULL;
+
+	if (!crtc)
+		return;
+
+	vop = to_vop(crtc);
+	mutex_lock(&vop->vop_lock);
+	if (vop && vop->is_enabled) {
+		switch (type) {
+		case MCU_WRCMD:
+			VOP_CTRL_SET(vop, mcu_rs, 0);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			break;
+		case MCU_WRDATA:
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			break;
+		case MCU_SETBYPASS:
+			VOP_CTRL_SET(vop, mcu_bypass, value ? 1 : 0);
+			break;
+		default:
+			break;
+		}
+	}
+	mutex_unlock(&vop->vop_lock);
+}
+
 static const struct rockchip_crtc_funcs private_crtc_funcs = {
 	.loader_protect = vop_crtc_loader_protect,
 	.enable_vblank = vop_crtc_enable_vblank,
@@ -2422,6 +2463,7 @@ static const struct rockchip_crtc_funcs private_crtc_funcs = {
 	.mode_valid = vop_crtc_mode_valid,
 	.bandwidth = vop_crtc_bandwidth,
 	.crtc_close = vop_crtc_close,
+	.crtc_send_mcu_cmd = vop_crtc_send_mcu_cmd,
 };
 
 static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -2555,6 +2597,21 @@ static bool vop_crtc_mode_update(struct drm_crtc *crtc)
 	return false;
 }
 
+static void vop_mcu_mode(struct drm_crtc *crtc)
+{
+	struct vop *vop = to_vop(crtc);
+
+	VOP_CTRL_SET(vop, mcu_clk_sel, 1);
+	VOP_CTRL_SET(vop, mcu_type, 1);
+
+	VOP_CTRL_SET(vop, mcu_hold_mode, 1);
+	VOP_CTRL_SET(vop, mcu_pix_total, vop->mcu_timing.mcu_pix_total);
+	VOP_CTRL_SET(vop, mcu_cs_pst, vop->mcu_timing.mcu_cs_pst);
+	VOP_CTRL_SET(vop, mcu_cs_pend, vop->mcu_timing.mcu_cs_pend);
+	VOP_CTRL_SET(vop, mcu_rw_pst, vop->mcu_timing.mcu_rw_pst);
+	VOP_CTRL_SET(vop, mcu_rw_pend, vop->mcu_timing.mcu_rw_pend);
+}
+
 static void vop_crtc_enable(struct drm_crtc *crtc)
 {
 	struct vop *vop = to_vop(crtc);
@@ -2717,6 +2774,9 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 
 	clk_set_rate(vop->dclk, adjusted_mode->crtc_clock * 1000);
 
+	if (vop->mcu_timing.mcu_pix_total)
+		vop_mcu_mode(crtc);
+
 	vop_cfg_done(vop);
 
 	enable_irq(vop->irq);
@@ -3403,6 +3463,8 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
 	} else {
 		VOP_CTRL_SET(vop, reg_done_frm, 0);
 	}
+	if (vop->mcu_timing.mcu_pix_total)
+		VOP_CTRL_SET(vop, mcu_hold_mode, 0);
 
 	vop->mode_update = false;
 	spin_unlock_irqrestore(&vop->irq_lock, flags);
@@ -4271,6 +4333,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	size_t alloc_size;
 	int ret, irq, i;
 	int num_wins = 0;
+	struct device_node *mcu = NULL;
 
 	vop_data = of_device_get_match_data(dev);
 	if (!vop_data)
@@ -4405,6 +4468,27 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	of_rockchip_drm_sub_backlight_register(dev, &vop->crtc,
 					       &rockchip_sub_backlight_ops);
 
+	mcu = of_get_child_by_name(dev->of_node, "mcu-timing");
+	if (!mcu) {
+		DRM_INFO("no mcu-timing node found in %s\n",
+			 dev->of_node->full_name);
+	} else {
+		u32 val;
+
+		if (!of_property_read_u32(mcu, "mcu-pix-total", &val))
+			vop->mcu_timing.mcu_pix_total = val;
+		if (!of_property_read_u32(mcu, "mcu-cs-pst", &val))
+			vop->mcu_timing.mcu_cs_pst = val;
+		if (!of_property_read_u32(mcu, "mcu-cs-pend", &val))
+			vop->mcu_timing.mcu_cs_pend = val;
+		if (!of_property_read_u32(mcu, "mcu-rw-pst", &val))
+			vop->mcu_timing.mcu_rw_pst = val;
+		if (!of_property_read_u32(mcu, "mcu-rw-pend", &val))
+			vop->mcu_timing.mcu_rw_pend = val;
+		if (!of_property_read_u32(mcu, "mcu-hold-mode", &val))
+			vop->mcu_timing.mcu_hold_mode = val;
+	}
+
 	return 0;
 }
 
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index 0e1da22da9390..bc4d0091979a6 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -143,6 +143,9 @@ void drm_panel_remove(struct drm_panel *panel);
 int drm_panel_attach(struct drm_panel *panel, struct drm_connector *connector);
 int drm_panel_detach(struct drm_panel *panel);
 
+int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
+				   struct device_node *np_crtc,
+				   u32 type, u32 value);
 struct drm_panel *drm_find_panel_by_connector(struct drm_connector *connector);
 #ifdef CONFIG_OF
 struct drm_panel *of_drm_find_panel(struct device_node *np);

From 6b269699f34e3c73318110b070aec69e1c41fb3a Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 6 Jul 2018 17:11:50 +0800
Subject: [PATCH 0086/1852] soc: rockchip: opp_select: Parse
 'rockchip,pvtm-thermal-zone' first for pvtm

Sometimes pvtm thermal zone is different from wide-temperature control
thermal zone, so let pvtm parse 'rockchip,pvtm-thermal-zone' first.

Change-Id: Ia6bdfbabb99b053864cbc3cbf14aac675e26483c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../devicetree/bindings/cpufreq/cpufreq-rockchip.txt          | 2 ++
 drivers/soc/rockchip/rockchip_opp_select.c                    | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
index 01b16ad55c433..617572aa2d152 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-rockchip.txt
@@ -47,6 +47,8 @@ In 'operating-points-v2' table:
                        used when current temperature is below reference
                        temperature. Conversely, The second one is used when
                        current temperature is above reference temperature.
+- rockchip,pvtm-thermal-zone: A thermal zone node containing thermal sensor,
+                       it's used to get the current temperature.
 - rockchip,thermal-zone: A thermal zone node containing thermal sensor,
                        it's used to get the current temperature.
 
diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index 61c290ab49137..da9c538b2df8a 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -232,9 +232,9 @@ static int rockchip_parse_pvtm_config(struct device_node *np,
 	if (of_property_read_u32_array(np, "rockchip,pvtm-temp-prop",
 				       pvtm->temp_prop, 2))
 		return -EINVAL;
-	if (of_property_read_string(np, "rockchip,thermal-zone",
+	if (of_property_read_string(np, "rockchip,pvtm-thermal-zone",
 				    &pvtm->tz_name)) {
-		if (of_property_read_string(np, "rockchip,pvtm-thermal-zone",
+		if (of_property_read_string(np, "rockchip,thermal-zone",
 					    &pvtm->tz_name))
 			return -EINVAL;
 	}

From ea5c1d9dadefe6178e43cb96e7cfc07a43aa3d02 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 11:07:25 +0800
Subject: [PATCH 0087/1852] thermal: Add thermal_notifier_list for thermal zone

Change-Id: I92c3308a4582ec3dbc03d2d6f2bbda60efe7245a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/thermal/thermal_core.c | 12 +++++++++++-
 include/linux/thermal.h        |  4 ++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c
index b26e6f7a050c3..7e71f5b01ccaa 100644
--- a/drivers/thermal/thermal_core.c
+++ b/drivers/thermal/thermal_core.c
@@ -612,6 +612,11 @@ void thermal_zone_device_update(struct thermal_zone_device *tz)
 
 	thermal_zone_set_trips(tz);
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	srcu_notifier_call_chain(&tz->thermal_notifier_list,
+				 tz->temperature, tz);
+#endif
+
 	for (count = 0; count < tz->trips; count++)
 		handle_thermal_trip(tz, count);
 }
@@ -1870,7 +1875,9 @@ struct thermal_zone_device *thermal_zone_device_register(const char *type,
 	tz = kzalloc(sizeof(struct thermal_zone_device), GFP_KERNEL);
 	if (!tz)
 		return ERR_PTR(-ENOMEM);
-
+#ifdef CONFIG_ARCH_ROCKCHIP
+	srcu_init_notifier_head(&tz->thermal_notifier_list);
+#endif
 	INIT_LIST_HEAD(&tz->thermal_instances);
 	idr_init(&tz->idr);
 	mutex_init(&tz->lock);
@@ -2067,6 +2074,9 @@ void thermal_zone_device_unregister(struct thermal_zone_device *tz)
 	thermal_set_governor(tz, NULL);
 
 	thermal_remove_hwmon_sysfs(tz);
+#ifdef CONFIG_ARCH_ROCKCHIP
+	srcu_cleanup_notifier_head(&tz->thermal_notifier_list);
+#endif
 	release_idr(&thermal_tz_idr, &thermal_idr_lock, tz->id);
 	idr_destroy(&tz->idr);
 	mutex_destroy(&tz->lock);
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index 328d6c0a90739..5b0718c850cef 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -183,6 +183,7 @@ struct thermal_attr {
  * @lock:	lock to protect thermal_instances list
  * @node:	node in thermal_tz_list (in thermal_core.c)
  * @poll_queue:	delayed work for polling
+ * @thermal_notifier_list: list head of thermal notifier
  */
 struct thermal_zone_device {
 	int id;
@@ -213,6 +214,9 @@ struct thermal_zone_device {
 	struct mutex lock;
 	struct list_head node;
 	struct delayed_work poll_queue;
+#ifdef CONFIG_ARCH_ROCKCHIP
+	struct srcu_notifier_head thermal_notifier_list;
+#endif
 };
 
 /**

From a6265c49237ccf074e9370998c42c995898a3738 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 17:57:54 +0800
Subject: [PATCH 0088/1852] soc: rockchip: opp_select: Implement APIs for
 wide-temperature control

Add a basic wide-temperature control model for device to adjust opp
table and max frequency.

Change-Id: I23f29ac1892093c527e730164eba086f02667de3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/cpufreq/rockchip-cpufreq.c         |  66 +++-
 drivers/soc/rockchip/rockchip_opp_select.c | 348 +++++++++++++++++++++
 include/linux/cpufreq.h                    |  21 ++
 include/soc/rockchip/rockchip_opp_select.h |  51 +++
 4 files changed, 481 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/rockchip-cpufreq.c b/drivers/cpufreq/rockchip-cpufreq.c
index 73ebcf3f70374..07726dcdfdb0d 100644
--- a/drivers/cpufreq/rockchip-cpufreq.c
+++ b/drivers/cpufreq/rockchip-cpufreq.c
@@ -42,6 +42,7 @@ struct cluster_info {
 	unsigned int reboot_freq;
 	unsigned int threshold_freq;
 	unsigned int scale_rate;
+	unsigned int temp_limit_rate;
 	int volt_sel;
 	int scale;
 	int process;
@@ -189,6 +190,56 @@ int rockchip_cpufreq_check_rate_volt(struct device *dev)
 }
 EXPORT_SYMBOL_GPL(rockchip_cpufreq_check_rate_volt);
 
+int rockchip_cpufreq_set_temp_limit_rate(struct device *dev, unsigned long rate)
+{
+	struct cluster_info *cluster;
+
+	cluster = rockchip_cluster_lookup_by_dev(dev);
+	if (!cluster)
+		return -EINVAL;
+	cluster->temp_limit_rate = rate / 1000;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(rockchip_cpufreq_set_temp_limit_rate);
+
+int rockchip_cpufreq_update_policy(struct device *dev)
+{
+	struct cluster_info *cluster;
+	unsigned int cpu;
+
+	cluster = rockchip_cluster_lookup_by_dev(dev);
+	if (!cluster)
+		return -EINVAL;
+	cpu = cpumask_any(&cluster->cpus);
+	cpufreq_update_policy(cpu);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(rockchip_cpufreq_update_policy);
+
+int rockchip_cpufreq_update_cur_volt(struct device *dev)
+{
+	struct cluster_info *cluster;
+	struct cpufreq_policy *policy;
+	unsigned int cpu;
+
+	cluster = rockchip_cluster_lookup_by_dev(dev);
+	if (!cluster)
+		return -EINVAL;
+	cpu = cpumask_any(&cluster->cpus);
+
+	policy = cpufreq_cpu_get(cpu);
+	if (!policy)
+		return -ENODEV;
+	down_write(&policy->rwsem);
+	dev_pm_opp_check_rate_volt(dev, false);
+	up_write(&policy->rwsem);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(rockchip_cpufreq_update_cur_volt);
+
 static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
 {
 	struct device_node *np;
@@ -314,6 +365,16 @@ static int rockchip_cpufreq_policy_notifier(struct notifier_block *nb,
 	if (!cluster)
 		return NOTIFY_DONE;
 
+	if (cluster->scale_rate) {
+		if (cluster->scale_rate < policy->max)
+			policy->max = cluster->scale_rate;
+	}
+
+	if (cluster->temp_limit_rate) {
+		if (cluster->temp_limit_rate < policy->max)
+			policy->max = cluster->temp_limit_rate;
+	}
+
 	if (cluster->rebooting) {
 		if (cluster->reboot_freq < policy->max)
 			policy->max = cluster->reboot_freq;
@@ -324,11 +385,6 @@ static int rockchip_cpufreq_policy_notifier(struct notifier_block *nb,
 		return NOTIFY_OK;
 	}
 
-	if (cluster->scale_rate) {
-		if (cluster->scale_rate < policy->max)
-			policy->max = cluster->scale_rate;
-	}
-
 	return NOTIFY_OK;
 }
 
diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index da9c538b2df8a..f32809fd5dea0 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -5,6 +5,7 @@
  */
 #include <linux/clk.h>
 #include <linux/cpufreq.h>
+#include <linux/devfreq.h>
 #include <linux/nvmem-consumer.h>
 #include <linux/regulator/consumer.h>
 #include <linux/slab.h>
@@ -16,11 +17,15 @@
 
 #include "../../clk/rockchip/clk.h"
 #include "../../base/power/opp/opp.h"
+#include "../../devfreq/governor.h"
 
 #define MAX_PROP_NAME_LEN	6
 #define SEL_TABLE_END		~1
 #define LEAKAGE_INVALID		0xff
 
+#define to_thermal_opp_info(nb) container_of(nb, struct thermal_opp_info, \
+					     thermal_nb)
+
 struct sel_table {
 	int min;
 	int max;
@@ -762,6 +767,349 @@ int rockchip_adjust_power_scale(struct device *dev, int scale)
 }
 EXPORT_SYMBOL(rockchip_adjust_power_scale);
 
+static int rockchip_adjust_low_temp_opp_volt(struct thermal_opp_info *info,
+					     bool is_low_temp)
+{
+	struct device *dev = info->dev;
+	struct dev_pm_opp *opp;
+	unsigned long rate;
+	int i, count, ret = 0;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
+	rcu_read_lock();
+#endif
+	count = dev_pm_opp_get_opp_count(dev);
+	if (count <= 0) {
+		ret = count ? count : -ENODATA;
+		goto out;
+	}
+
+	for (i = 0, rate = 0; i < count; i++, rate++) {
+		/* find next rate */
+		opp = dev_pm_opp_find_freq_ceil(dev, &rate);
+		if (IS_ERR(opp)) {
+			ret = PTR_ERR(opp);
+			goto out;
+		}
+		if (is_low_temp) {
+			opp->u_volt = info->opp_table[i].low_temp_volt;
+			opp->u_volt_min = opp->u_volt;
+			if (opp->u_volt_max < opp->u_volt)
+				opp->u_volt_max = opp->u_volt;
+		} else {
+			opp->u_volt = info->opp_table[i].volt;
+			opp->u_volt_min = opp->u_volt;
+			if (opp->u_volt_max < opp->u_volt)
+				opp->u_volt_max = opp->u_volt;
+		}
+	}
+
+out:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
+	rcu_read_unlock();
+#endif
+	return ret;
+}
+
+int rockchip_cpu_low_temp_adjust(struct thermal_opp_info *info,
+				 bool is_low)
+{
+	struct device *dev = info->dev;
+	int ret = 0;
+
+	if (!info->low_limit)
+		goto next;
+
+	if (is_low)
+		rockchip_cpufreq_set_temp_limit_rate(dev, info->low_limit);
+	else
+		rockchip_cpufreq_set_temp_limit_rate(dev, 0);
+	ret = rockchip_cpufreq_update_policy(dev);
+	if (ret)
+		return ret;
+
+next:
+	ret = rockchip_cpufreq_update_cur_volt(dev);
+
+	return ret;
+}
+EXPORT_SYMBOL(rockchip_cpu_low_temp_adjust);
+
+int rockchip_cpu_high_temp_adjust(struct thermal_opp_info *info,
+				  bool is_high)
+{
+	struct device *dev = info->dev;
+	int ret = 0;
+
+	if (!info->high_limit)
+		return ret;
+
+	if (is_high)
+		rockchip_cpufreq_set_temp_limit_rate(dev, info->high_limit);
+	else
+		rockchip_cpufreq_set_temp_limit_rate(dev, 0);
+	ret = rockchip_cpufreq_update_policy(dev);
+
+	return ret;
+}
+EXPORT_SYMBOL(rockchip_cpu_high_temp_adjust);
+
+int rockchip_dev_low_temp_adjust(struct thermal_opp_info *info,
+				 bool is_low)
+{
+	struct devfreq *df;
+
+	if (info->dev_data && info->dev_data->data) {
+		df = (struct devfreq *)info->dev_data->data;
+		mutex_lock(&df->lock);
+		update_devfreq(df);
+		mutex_unlock(&df->lock);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(rockchip_dev_low_temp_adjust);
+
+int rockchip_dev_high_temp_adjust(struct thermal_opp_info *info,
+				  bool is_high)
+{
+	return 0;
+}
+EXPORT_SYMBOL(rockchip_dev_high_temp_adjust);
+
+static void rockchip_low_temp_adjust(struct thermal_opp_info *info,
+				     bool is_low)
+{
+	struct thermal_opp_device_data *dev_data = info->dev_data;
+	int ret = 0;
+
+	dev_dbg(info->dev, "low_temp %d\n", is_low);
+	rockchip_adjust_low_temp_opp_volt(info, is_low);
+	if (dev_data->low_temp_adjust)
+		ret = dev_data->low_temp_adjust(info, is_low);
+	if (!ret)
+		info->is_low_temp = is_low;
+}
+
+static void rockchip_high_temp_adjust(struct thermal_opp_info *info,
+				      bool is_high)
+{
+	struct thermal_opp_device_data *dev_data = info->dev_data;
+	int ret = 0;
+
+	dev_dbg(info->dev, "high_temp %d\n", is_high);
+	if (dev_data->high_temp_adjust)
+		ret = dev_data->high_temp_adjust(info, is_high);
+	if (!ret)
+		info->is_high_temp = is_high;
+}
+
+static int rockchip_thermal_zone_notifier_call(struct notifier_block *nb,
+					       unsigned long value, void *data)
+{
+	struct thermal_opp_info *info = to_thermal_opp_info(nb);
+	int temperature = (int)value;
+
+	dev_dbg(info->dev, "temp=%d\n", temperature);
+
+	if (temperature < info->low_temp) {
+		if (info->is_high_temp)
+			rockchip_high_temp_adjust(info, false);
+		if (!info->is_low_temp)
+			rockchip_low_temp_adjust(info, true);
+	} else if (temperature > (info->low_temp + info->temp_hysteresis)) {
+		if (info->is_low_temp)
+			rockchip_low_temp_adjust(info, false);
+	}
+
+	if (temperature > info->high_temp) {
+		if (!info->is_high_temp)
+			rockchip_high_temp_adjust(info, true);
+	} else if (temperature < (info->high_temp - info->temp_hysteresis)) {
+		if (info->is_high_temp)
+			rockchip_high_temp_adjust(info, false);
+	}
+
+	return NOTIFY_OK;
+}
+
+static int rockchip_get_low_temp_volt(struct thermal_opp_info *info,
+				      unsigned long rate, int *delta_volt)
+{
+	int i, ret = -EINVAL;
+	int _rate = (int)(rate / 1000000);
+
+	if (!info->low_temp_table)
+		return ret;
+
+	for (i = 0; info->low_temp_table[i].sel != SEL_TABLE_END; i++) {
+		if (_rate >= info->low_temp_table[i].min &&
+		    _rate <= info->low_temp_table[i].max) {
+			*delta_volt = info->low_temp_table[i].sel;
+			ret = 0;
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_init_temp_opp_table(struct thermal_opp_info *info)
+{
+	struct device *dev = info->dev;
+	struct dev_pm_opp *opp;
+	int delta_volt = 0;
+	int i, max_opps, ret = 0;
+	unsigned long rate;
+	bool reach_max_volt = false;
+	bool reach_high_temp_max_volt = false;
+
+	max_opps = dev_pm_opp_get_opp_count(dev);
+	if (max_opps <= 0) {
+		ret = max_opps ? max_opps : -ENODATA;
+		goto out;
+	}
+	info->opp_table = kzalloc(sizeof(*info->opp_table) * max_opps,
+				  GFP_KERNEL);
+	if (!info->opp_table) {
+		ret = -ENOMEM;
+		goto out;
+	}
+	info->num_opps = max_opps;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
+	rcu_read_lock();
+#endif
+	for (i = 0, rate = 0; i < max_opps; i++, rate++) {
+		/* find next rate */
+		opp = dev_pm_opp_find_freq_ceil(dev, &rate);
+		if (IS_ERR(opp)) {
+			ret = PTR_ERR(opp);
+			goto out;
+		}
+		info->opp_table[i].rate = opp->rate;
+		info->opp_table[i].volt = opp->u_volt;
+
+		if (opp->u_volt <= info->high_temp_max_volt) {
+			if (!reach_high_temp_max_volt)
+				info->high_limit = opp->rate;
+			if (opp->u_volt == info->high_temp_max_volt)
+				reach_high_temp_max_volt = true;
+		}
+
+		if (rockchip_get_low_temp_volt(info, opp->rate, &delta_volt))
+			delta_volt = 0;
+		if ((opp->u_volt + delta_volt) <= info->max_volt) {
+			info->opp_table[i].low_temp_volt =
+				opp->u_volt + delta_volt;
+			if (!reach_max_volt)
+				info->low_limit = opp->rate;
+			if (info->opp_table[i].low_temp_volt == info->max_volt)
+				reach_max_volt = true;
+		} else {
+			info->opp_table[i].low_temp_volt = info->max_volt;
+		}
+		dev_dbg(dev, "rate=%lu, volt=%lu, low_temp_volt=%lu\n",
+			info->opp_table[i].rate, info->opp_table[i].volt,
+			info->opp_table[i].low_temp_volt);
+	}
+	if (info->low_limit == opp->rate)
+		info->low_limit = 0;
+	if (info->high_limit == opp->rate)
+		info->high_limit = 0;
+out:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
+	rcu_read_unlock();
+#endif
+
+	return ret;
+}
+
+struct thermal_opp_info *
+rockchip_register_thermal_notifier(struct device *dev,
+				   struct thermal_opp_device_data *data)
+{
+	struct device_node *np;
+	struct thermal_zone_device *tz;
+	struct thermal_opp_info *info = NULL;
+	const char *tz_name;
+
+	np = of_parse_phandle(dev->of_node, "operating-points-v2", 0);
+	if (!np) {
+		dev_warn(dev, "OPP-v2 not supported\n");
+		goto err_out;
+	}
+	if (of_property_read_string(np, "rockchip,thermal-zone", &tz_name))
+		goto err_np;
+
+	tz = thermal_zone_get_zone_by_name(tz_name);
+	if (IS_ERR_OR_NULL(tz))
+		goto err_np;
+
+	info = kzalloc(sizeof(*info), GFP_KERNEL);
+	if (!info)
+		goto err_np;
+	info->tz = tz;
+	info->dev = dev;
+	info->thermal_nb.notifier_call = rockchip_thermal_zone_notifier_call;
+	info->dev_data = data;
+
+	if (of_property_read_u32(np, "rockchip,max-volt", &info->max_volt))
+		info->max_volt = INT_MAX;
+	of_property_read_u32(np, "rockchip,temp-hysteresis",
+			     &info->temp_hysteresis);
+	if (of_property_read_u32(np, "rockchip,low-temp", &info->low_temp))
+		info->low_temp = INT_MIN;
+	rockchip_get_sel_table(np, "rockchip,low-temp-adjust-volt",
+			       &info->low_temp_table);
+	if (of_property_read_u32(np, "rockchip,high-temp", &info->high_temp))
+		info->high_temp = INT_MAX;
+	if (of_property_read_u32(np, "rockchip,high-temp-max-volt",
+				 &info->high_temp_max_volt))
+		info->high_temp_max_volt = INT_MAX;
+	rockchip_init_temp_opp_table(info);
+	dev_info(dev, "l=%d h=%d hyst=%d l_limit=%lu h_limit=%lu\n",
+		 info->low_temp, info->high_temp, info->temp_hysteresis,
+		 info->low_limit, info->high_limit);
+
+	if ((info->low_temp + info->temp_hysteresis) > info->high_temp) {
+		dev_err(dev, "Invalid temperature, low=%d high=%d hyst=%d\n",
+			info->low_temp, info->high_temp,
+			info->temp_hysteresis);
+		goto info_free;
+	}
+
+	if (!info->low_temp_table && !info->low_limit && !info->high_limit)
+		goto info_free;
+
+	srcu_notifier_chain_register(&tz->thermal_notifier_list,
+				     &info->thermal_nb);
+	thermal_zone_device_update(tz);
+	of_node_put(np);
+
+	return info;
+
+info_free:
+	kfree(info);
+err_np:
+	of_node_put(np);
+err_out:
+	return ERR_PTR(-EINVAL);
+}
+EXPORT_SYMBOL(rockchip_register_thermal_notifier);
+
+void rockchip_unregister_thermal_notifier(struct thermal_opp_info *info)
+{
+	if (!info)
+		return;
+
+	srcu_notifier_chain_unregister(&info->tz->thermal_notifier_list,
+				       &info->thermal_nb);
+	kfree(info->low_temp_table);
+	kfree(info->opp_table);
+	kfree(info);
+}
+EXPORT_SYMBOL(rockchip_unregister_thermal_notifier);
+
 int rockchip_init_opp_table(struct device *dev,
 			    const struct of_device_id *matches,
 			    char *lkg_name, char *reg_name)
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index be27ec362a9dc..91f97be1ede7e 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -699,7 +699,11 @@ unsigned long cpufreq_scale_max_freq_capacity(int cpu);
 unsigned int rockchip_cpufreq_adjust_target(int cpu, unsigned int freq);
 int rockchip_cpufreq_get_scale(int cpu);
 int rockchip_cpufreq_set_scale_rate(struct device *dev, unsigned long rate);
+int rockchip_cpufreq_set_temp_limit_rate(struct device *dev,
+					 unsigned long rate);
 int rockchip_cpufreq_check_rate_volt(struct device *dev);
+int rockchip_cpufreq_update_policy(struct device *dev);
+int rockchip_cpufreq_update_cur_volt(struct device *dev);
 #else
 static inline unsigned int rockchip_cpufreq_adjust_target(int cpu,
 							  unsigned int freq)
@@ -722,5 +726,22 @@ static inline int rockchip_cpufreq_check_rate_volt(struct device *dev)
 {
 	return -EINVAL;
 }
+
+static inline int rockchip_cpufreq_set_temp_limit_rate(struct device *dev,
+						       unsigned long rate)
+{
+	return -EINVAL;
+}
+
+static inline int rockchip_cpufreq_update_policy(struct device *dev)
+{
+	return -EINVAL;
+}
+
+static inline int rockchip_cpufreq_update_cur_volt(struct device *dev)
+{
+	return -EINVAL;
+}
+
 #endif
 #endif /* _LINUX_CPUFREQ_H */
diff --git a/include/soc/rockchip/rockchip_opp_select.h b/include/soc/rockchip/rockchip_opp_select.h
index 5d3d37b442ea9..2f6778c84eee4 100644
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -6,6 +6,45 @@
 #ifndef __SOC_ROCKCHIP_OPP_SELECT_H
 #define __SOC_ROCKCHIP_OPP_SELECT_H
 
+struct thermal_opp_info;
+
+enum thermal_opp_type {
+	THERMAL_OPP_TPYE_CPU = 0,
+	THERMAL_OPP_TPYE_DEV,
+};
+
+struct thermal_opp_device_data {
+	enum thermal_opp_type type;
+	void *data;
+	int (*low_temp_adjust)(struct thermal_opp_info *info, bool is_low);
+	int (*high_temp_adjust)(struct thermal_opp_info *info, bool is_low);
+};
+
+struct thermal_opp_table {
+	unsigned long rate;
+	unsigned long volt;
+	unsigned long low_temp_volt;
+};
+
+struct thermal_opp_info {
+	struct device *dev;
+	struct thermal_zone_device *tz;
+	struct notifier_block thermal_nb;
+	struct sel_table *low_temp_table;
+	struct thermal_opp_table *opp_table;
+	struct thermal_opp_device_data *dev_data;
+	unsigned int num_opps;
+	unsigned long low_limit;
+	unsigned long high_limit;
+	int low_temp;
+	int high_temp;
+	int temp_hysteresis;
+	int max_volt;
+	int high_temp_max_volt;
+	bool is_low_temp;
+	bool is_high_temp;
+};
+
 void rockchip_of_get_lkg_sel(struct device *dev, struct device_node *np,
 			     char *lkg_name, int process,
 			     int *volt_sel, int *scale_sel);
@@ -27,5 +66,17 @@ int rockchip_adjust_power_scale(struct device *dev, int scale);
 int rockchip_init_opp_table(struct device *dev,
 			    const struct of_device_id *matches,
 			    char *lkg_name, char *reg_name);
+struct thermal_opp_info *
+rockchip_register_thermal_notifier(struct device *dev,
+				   struct thermal_opp_device_data *data);
+void rockchip_unregister_thermal_notifier(struct thermal_opp_info *info);
+int rockchip_cpu_low_temp_adjust(struct thermal_opp_info *info,
+				 bool is_low);
+int rockchip_cpu_high_temp_adjust(struct thermal_opp_info *info,
+				  bool is_high);
+int rockchip_dev_low_temp_adjust(struct thermal_opp_info *info,
+				 bool is_low);
+int rockchip_dev_high_temp_adjust(struct thermal_opp_info *info,
+				  bool is_high);
 
 #endif

From e011336fae4ea16c9a0143c4e786d2646822f00d Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 18:15:44 +0800
Subject: [PATCH 0089/1852] cpufreq: dt: Add wide-temperature control

Change-Id: I42a7d28944a1fb10728b74663fdd62c0f766dee5
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/cpufreq/cpufreq-dt.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index c3889bf41545e..977e9b5ba8818 100644
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -32,9 +32,20 @@
 #include <soc/rockchip/rockchip_opp_select.h>
 #endif
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+static struct thermal_opp_device_data cpu_devdata = {
+	.type = THERMAL_OPP_TPYE_CPU,
+	.low_temp_adjust = rockchip_cpu_low_temp_adjust,
+	.high_temp_adjust = rockchip_cpu_high_temp_adjust,
+};
+#endif
+
 struct private_data {
 	struct device *cpu_dev;
 	struct thermal_cooling_device *cdev;
+#ifdef CONFIG_ARCH_ROCKCHIP
+	struct thermal_opp_info *opp_info;
+#endif
 	const char *reg_name;
 };
 
@@ -310,6 +321,13 @@ static int cpufreq_init(struct cpufreq_policy *policy)
 	policy->down_transition_delay_us = 50000; /* 50ms */
 
 #ifdef CONFIG_ARCH_ROCKCHIP
+	priv->opp_info = rockchip_register_thermal_notifier(cpu_dev,
+							    &cpu_devdata);
+	if (IS_ERR(priv->opp_info)) {
+		dev_dbg(priv->cpu_dev,
+			"running cpufreq without thermal notifier\n");
+		priv->opp_info = NULL;
+	}
 	rockchip_cpufreq_check_rate_volt(cpu_dev);
 #endif
 
@@ -334,13 +352,16 @@ static int cpufreq_exit(struct cpufreq_policy *policy)
 	struct cpumask cpus;
 	struct private_data *priv = policy->driver_data;
 
+	priv->cpu_dev = get_cpu_device(policy->cpu);
 #ifdef CONFIG_ARCH_ROCKCHIP
 	cpumask_set_cpu(policy->cpu, policy->cpus);
 	if (cpufreq_generic_suspend(policy))
 		pr_err("%s: Failed to suspend driver: %p\n", __func__, policy);
 	cpumask_clear_cpu(policy->cpu, policy->cpus);
+	rockchip_cpufreq_set_scale_rate(priv->cpu_dev, 0);
+	rockchip_cpufreq_set_temp_limit_rate(priv->cpu_dev, 0);
+	rockchip_unregister_thermal_notifier(priv->opp_info);
 #endif
-	priv->cpu_dev = get_cpu_device(policy->cpu);
 	cpufreq_cooling_unregister(priv->cdev);
 	dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
 	cpumask_copy(&cpus, policy->related_cpus);

From f7f37e1cb27627e9942c682cbe1578ea3df7e452 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 27 Jun 2018 18:19:21 +0800
Subject: [PATCH 0090/1852] PM / devfreq: rockchip_dmc: Add wide-temperature
 control

Change-Id: Ia90494728679287fb505c1ee0ddffaa9a52bf0cb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/devfreq/rockchip_dmc.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/devfreq/rockchip_dmc.c b/drivers/devfreq/rockchip_dmc.c
index 3f03b81400b74..3989ba3210aa2 100644
--- a/drivers/devfreq/rockchip_dmc.c
+++ b/drivers/devfreq/rockchip_dmc.c
@@ -770,6 +770,7 @@ struct rockchip_dmcfreq {
 	struct freq_map_table *vop_bw_tbl;
 	struct work_struct devfreq_update;
 	struct input_handler input_handler;
+	struct thermal_opp_info *opp_info;
 
 	unsigned long rate, target_rate;
 	unsigned long volt, target_volt;
@@ -810,6 +811,12 @@ struct rockchip_dmcfreq {
 	int (*set_auto_self_refresh)(u32 en);
 };
 
+static struct thermal_opp_device_data dmc_devdata = {
+	.type = THERMAL_OPP_TPYE_DEV,
+	.low_temp_adjust = rockchip_dev_low_temp_adjust,
+	.high_temp_adjust = rockchip_dev_high_temp_adjust,
+};
+
 static struct pm_qos_request pm_qos;
 
 static DECLARE_RWSEM(rockchip_dmcfreq_sem);
@@ -3111,6 +3118,14 @@ static int rockchip_dmcfreq_probe(struct platform_device *pdev)
 			dev_err(dev, "failed to register input handler\n");
 	}
 
+	dmc_devdata.data = data->devfreq;
+	data->opp_info = rockchip_register_thermal_notifier(dev,
+							    &dmc_devdata);
+	if (IS_ERR(data->opp_info)) {
+		dev_dbg(dev, "without thermal notifier\n");
+		data->opp_info = NULL;
+	}
+
 	ret = ddr_power_model_simple_init(data);
 
 	if (!ret) {

From 79728feceaaae91177d7d9762ce9c96285ac4e86 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 29 Jun 2018 15:49:36 +0800
Subject: [PATCH 0091/1852] MALI: midgard: Add wide-temperature control

Change-Id: Ibf1c6ebd91d2e793fa8efe0383df346dd8c67b45
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../arm/midgard/backend/gpu/mali_kbase_devfreq.c | 16 ++++++++++++++++
 drivers/gpu/arm/midgard/mali_kbase_defs.h        |  1 +
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
index 0127d2a1d66fc..1495f06cd9b9e 100644
--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
@@ -45,6 +45,13 @@
 #define dev_pm_opp_find_freq_ceil opp_find_freq_ceil
 #define dev_pm_opp_find_freq_floor opp_find_freq_floor
 #endif /* Linux >= 3.13 */
+#include <soc/rockchip/rockchip_opp_select.h>
+
+static struct thermal_opp_device_data gpu_devdata = {
+	.type = THERMAL_OPP_TPYE_DEV,
+	.low_temp_adjust = rockchip_dev_low_temp_adjust,
+	.high_temp_adjust = rockchip_dev_high_temp_adjust,
+};
 
 /**
  * opp_translate - Translate nominal OPP frequency from devicetree into real
@@ -378,6 +385,14 @@ int kbase_devfreq_init(struct kbase_device *kbdev)
 	devfreq_recommended_opp(kbdev->dev, &opp_rate, 0);
 	rcu_read_unlock();
 	kbdev->devfreq->last_status.current_frequency = opp_rate;
+
+	gpu_devdata.data = kbdev->devfreq;
+	kbdev->opp_info = rockchip_register_thermal_notifier(kbdev->dev,
+							     &gpu_devdata);
+	if (IS_ERR(kbdev->opp_info)) {
+		dev_dbg(kbdev->dev, "without thermal notifier\n");
+		kbdev->opp_info = NULL;
+	}
 #ifdef CONFIG_DEVFREQ_THERMAL
 	err = kbase_ipa_init(kbdev);
 	if (err) {
@@ -420,6 +435,7 @@ void kbase_devfreq_term(struct kbase_device *kbdev)
 
 	dev_dbg(kbdev->dev, "Term Mali devfreq\n");
 
+	rockchip_unregister_thermal_notifier(kbdev->opp_info);
 #ifdef CONFIG_DEVFREQ_THERMAL
 	if (kbdev->devfreq_cooling)
 		devfreq_cooling_unregister(kbdev->devfreq_cooling);
diff --git a/drivers/gpu/arm/midgard/mali_kbase_defs.h b/drivers/gpu/arm/midgard/mali_kbase_defs.h
index 91f159b384136..9526dd9e1a20c 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_defs.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_defs.h
@@ -1096,6 +1096,7 @@ struct kbase_device {
 	u64 current_core_mask;
 	struct kbase_devfreq_opp *opp_table;
 	int num_opps;
+	struct thermal_opp_info *opp_info;
 #ifdef CONFIG_DEVFREQ_THERMAL
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
 	struct devfreq_cooling_device *devfreq_cooling;

From 6fe7686c6f8451ec00a5ce05c06e0923fde5674a Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 29 Jun 2018 16:20:24 +0800
Subject: [PATCH 0092/1852] MALI: bifrost: Add wide-temperature control

Change-Id: I74ec8bed3065740148814114a72b2740e58688e6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../arm/bifrost/backend/gpu/mali_kbase_devfreq.c | 15 +++++++++++++++
 drivers/gpu/arm/bifrost/mali_kbase_defs.h        |  1 +
 .../backend/gpu/mali_kbase_devfreq.c             | 16 ++++++++++++++++
 .../gpu/arm/bifrost_for_linux/mali_kbase_defs.h  |  1 +
 4 files changed, 33 insertions(+)

diff --git a/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_devfreq.c
index 0ea045c23f3ed..ce6f8d7fb4e00 100644
--- a/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_devfreq.c
+++ b/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_devfreq.c
@@ -47,6 +47,13 @@
 #define dev_pm_opp_find_freq_ceil opp_find_freq_ceil
 #define dev_pm_opp_find_freq_floor opp_find_freq_floor
 #endif /* Linux >= 3.13 */
+#include <soc/rockchip/rockchip_opp_select.h>
+
+static struct thermal_opp_device_data gpu_devdata = {
+	.type = THERMAL_OPP_TPYE_DEV,
+	.low_temp_adjust = rockchip_dev_low_temp_adjust,
+	.high_temp_adjust = rockchip_dev_high_temp_adjust,
+};
 
 /**
  * opp_translate - Translate nominal OPP frequency from devicetree into real
@@ -396,6 +403,13 @@ int kbase_devfreq_init(struct kbase_device *kbdev)
 	devfreq_recommended_opp(kbdev->dev, &opp_rate, 0);
 	rcu_read_unlock();
 	kbdev->devfreq->last_status.current_frequency = opp_rate;
+	gpu_devdata.data = kbdev->devfreq;
+	kbdev->opp_info = rockchip_register_thermal_notifier(kbdev->dev,
+							     &gpu_devdata);
+	if (IS_ERR(kbdev->opp_info)) {
+		dev_dbg(kbdev->dev, "without thermal notifier\n");
+		kbdev->opp_info = NULL;
+	}
 #ifdef CONFIG_DEVFREQ_THERMAL
 	err = kbase_ipa_init(kbdev);
 	if (err) {
@@ -437,6 +451,7 @@ void kbase_devfreq_term(struct kbase_device *kbdev)
 
 	dev_dbg(kbdev->dev, "Term Mali devfreq\n");
 
+	rockchip_unregister_thermal_notifier(kbdev->opp_info);
 #ifdef CONFIG_DEVFREQ_THERMAL
 	if (kbdev->devfreq_cooling)
 		devfreq_cooling_unregister(kbdev->devfreq_cooling);
diff --git a/drivers/gpu/arm/bifrost/mali_kbase_defs.h b/drivers/gpu/arm/bifrost/mali_kbase_defs.h
index 908293236ec4e..a79d01dca13b7 100644
--- a/drivers/gpu/arm/bifrost/mali_kbase_defs.h
+++ b/drivers/gpu/arm/bifrost/mali_kbase_defs.h
@@ -1536,6 +1536,7 @@ struct kbase_device {
 	struct kbase_devfreq_opp *opp_table;
 	int num_opps;
 	struct kbasep_pm_metrics last_devfreq_metrics;
+	struct thermal_opp_info *opp_info;
 #ifdef CONFIG_DEVFREQ_THERMAL
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
 	struct devfreq_cooling_device *devfreq_cooling;
diff --git a/drivers/gpu/arm/bifrost_for_linux/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/bifrost_for_linux/backend/gpu/mali_kbase_devfreq.c
index 9e7f1276048a5..a69008437fa1d 100644
--- a/drivers/gpu/arm/bifrost_for_linux/backend/gpu/mali_kbase_devfreq.c
+++ b/drivers/gpu/arm/bifrost_for_linux/backend/gpu/mali_kbase_devfreq.c
@@ -43,6 +43,14 @@
 #define dev_pm_opp_find_freq_floor opp_find_freq_floor
 #endif /* Linux >= 3.13 */
 
+#include <soc/rockchip/rockchip_opp_select.h>
+
+static struct thermal_opp_device_data gpu_devdata = {
+	.type = THERMAL_OPP_TPYE_DEV,
+	.low_temp_adjust = rockchip_dev_low_temp_adjust,
+	.high_temp_adjust = rockchip_dev_high_temp_adjust,
+};
+
 /**
  * opp_translate - Translate nominal OPP frequency from devicetree into real
  *                 frequency and core mask
@@ -369,6 +377,13 @@ int kbase_devfreq_init(struct kbase_device *kbdev)
 	devfreq_recommended_opp(kbdev->dev, &opp_rate, 0);
 	rcu_read_unlock();
 	kbdev->devfreq->last_status.current_frequency = opp_rate;
+	gpu_devdata.data = kbdev->devfreq;
+	kbdev->opp_info = rockchip_register_thermal_notifier(kbdev->dev,
+							     &gpu_devdata);
+	if (IS_ERR(kbdev->opp_info)) {
+		dev_dbg(kbdev->dev, "without thermal notifier\n");
+		kbdev->opp_info = NULL;
+	}
 #ifdef CONFIG_DEVFREQ_THERMAL
 	err = kbase_ipa_init(kbdev);
 	if (err) {
@@ -410,6 +425,7 @@ void kbase_devfreq_term(struct kbase_device *kbdev)
 
 	dev_dbg(kbdev->dev, "Term Mali devfreq\n");
 
+	rockchip_unregister_thermal_notifier(kbdev->opp_info);
 #ifdef CONFIG_DEVFREQ_THERMAL
 	if (kbdev->devfreq_cooling)
 		devfreq_cooling_unregister(kbdev->devfreq_cooling);
diff --git a/drivers/gpu/arm/bifrost_for_linux/mali_kbase_defs.h b/drivers/gpu/arm/bifrost_for_linux/mali_kbase_defs.h
index d957c1461440b..14b596c07fe76 100644
--- a/drivers/gpu/arm/bifrost_for_linux/mali_kbase_defs.h
+++ b/drivers/gpu/arm/bifrost_for_linux/mali_kbase_defs.h
@@ -1126,6 +1126,7 @@ struct kbase_device {
 	u64 current_core_mask;
 	struct kbase_devfreq_opp *opp_table;
 	int num_opps;
+	struct thermal_opp_info *opp_info;
 #ifdef CONFIG_DEVFREQ_THERMAL
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
 	struct devfreq_cooling_device *devfreq_cooling;

From 10362a94da6be87ea9012520a0f29507de28c744 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 29 Jun 2018 16:29:09 +0800
Subject: [PATCH 0093/1852] MALI: utgard: Add wide-temperature control

Change-Id: Ibb3c8431dd995bc4aefbde2e2f7082a60cfb40e0
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../gpu/arm/mali400/mali/common/mali_osk_mali.h  |  1 +
 .../gpu/arm/mali400/mali/linux/mali_devfreq.c    | 16 ++++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/arm/mali400/mali/common/mali_osk_mali.h b/drivers/gpu/arm/mali400/mali/common/mali_osk_mali.h
index 657854d83e0f1..98842df4cc72a 100755
--- a/drivers/gpu/arm/mali400/mali/common/mali_osk_mali.h
+++ b/drivers/gpu/arm/mali400/mali/common/mali_osk_mali.h
@@ -37,6 +37,7 @@ struct mali_device {
 	struct devfreq *devfreq;
 	unsigned long current_freq;
 	unsigned long current_voltage;
+	struct thermal_opp_info *opp_info;
 #ifdef CONFIG_DEVFREQ_THERMAL
 	struct thermal_cooling_device *devfreq_cooling;
 #endif
diff --git a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c
index 06c83f017165e..c9b8652f100d0 100644
--- a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c
+++ b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c
@@ -36,6 +36,14 @@
 
 #include "mali_pm_metrics.h"
 
+#include <soc/rockchip/rockchip_opp_select.h>
+
+static struct thermal_opp_device_data gpu_devdata = {
+	.type = THERMAL_OPP_TPYE_DEV,
+	.low_temp_adjust = rockchip_dev_low_temp_adjust,
+	.high_temp_adjust = rockchip_dev_high_temp_adjust,
+};
+
 static int
 mali_devfreq_target(struct device *dev, unsigned long *target_freq, u32 flags)
 {
@@ -268,6 +276,13 @@ int mali_devfreq_init(struct mali_device *mdev)
 	devfreq_recommended_opp(mdev->dev, &opp_rate, 0);
 	rcu_read_unlock();
 	mdev->devfreq->last_status.current_frequency = opp_rate;
+	gpu_devdata.data = mdev->devfreq;
+	mdev->opp_info = rockchip_register_thermal_notifier(mdev->dev,
+							    &gpu_devdata);
+	if (IS_ERR(mdev->opp_info)) {
+		dev_dbg(mdev->dev, "without thermal notifier\n");
+		mdev->opp_info = NULL;
+	}
 #ifdef CONFIG_DEVFREQ_THERMAL
 	if (of_machine_is_compatible("rockchip,rk3036"))
 		return 0;
@@ -319,6 +334,7 @@ void mali_devfreq_term(struct mali_device *mdev)
 
 	MALI_DEBUG_PRINT(2, ("Term Mali devfreq\n"));
 
+	rockchip_unregister_thermal_notifier(mdev->opp_info);
 #ifdef CONFIG_DEVFREQ_THERMAL
 	devfreq_cooling_unregister(mdev->devfreq_cooling);
 #endif

From b267ec610a1667cea0bd563d407779c360a8b7b6 Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Fri, 6 Jul 2018 17:10:19 +0800
Subject: [PATCH 0094/1852] spi: rockchip: fix bug when no high_speed pinctrl
 state

[    1.644632] rockchip-spi ff190000.spi: no high_speed pinctrl state
[    1.646337] Unable to handle kernel NULL pointer dereference at virtual address 00000005
[    1.647412] pgd = ffffff80093b9000
[    1.647873] [00000005] *pgd=00000000feffe003, *pud=00000000feffe003, *pmd=0000000000000000
[    1.649019] Internal error: Oops: 96000005 [#1] SMP
[    1.649643] Modules linked in:
[    1.650065] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.120-rockchip-ayufan-195 #1
[    1.651042] Hardware name: Pine64 Rock64 (DT)
[    1.651603] task: ffffffc0f5d48000 task.stack: ffffffc0f5d44000
[    1.652366] PC is at pinctrl_select_state+0x3c/0x12c
[    1.653004] LR is at pinctrl_select_state+0x7c/0x12c
[    1.653641] pc : [<ffffff8008596840>] lr : [<ffffff8008596880>] pstate: 60000045
[    1.654574] sp : ffffffc0f5d47420

patch from:https://github.com/rockchip-linux/kernel/pull/78/commits/c9dc2ab32795362ab2be1e1bdd1223f2d74da552

Change-Id: Ie2926a505288d7198a4d49c2abf5a4207281c89d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 drivers/spi/spi-rockchip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 060806eaf8d69..215200d5786ce 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -777,10 +777,10 @@ static int rockchip_spi_probe(struct platform_device *pdev)
 
 	rs->high_speed_state = pinctrl_lookup_state(rs->dev->pins->p,
 						     "high_speed");
-	if (IS_ERR_OR_NULL(rs->high_speed_state))
+	if (IS_ERR_OR_NULL(rs->high_speed_state)) {
 		dev_warn(&pdev->dev, "no high_speed pinctrl state\n");
-	else
 		rs->high_speed_state = NULL;
+	}
 
 	ret = devm_spi_register_master(&pdev->dev, master);
 	if (ret) {

From a3a0a6e897292427bbe9e34905632c9719ea594f Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Thu, 17 Nov 2016 11:24:20 -0800
Subject: [PATCH 0095/1852] UPSTREAM: dm bufio: avoid sleeping while holding
 the dm_bufio lock

We've seen in-field reports showing _lots_ (18 in one case, 41 in
another) of tasks all sitting there blocked on:

  mutex_lock+0x4c/0x68
  dm_bufio_shrink_count+0x38/0x78
  shrink_slab.part.54.constprop.65+0x100/0x464
  shrink_zone+0xa8/0x198

In the two cases analyzed, we see one task that looks like this:

  Workqueue: kverityd verity_prefetch_io

  __switch_to+0x9c/0xa8
  __schedule+0x440/0x6d8
  schedule+0x94/0xb4
  schedule_timeout+0x204/0x27c
  schedule_timeout_uninterruptible+0x44/0x50
  wait_iff_congested+0x9c/0x1f0
  shrink_inactive_list+0x3a0/0x4cc
  shrink_lruvec+0x418/0x5cc
  shrink_zone+0x88/0x198
  try_to_free_pages+0x51c/0x588
  __alloc_pages_nodemask+0x648/0xa88
  __get_free_pages+0x34/0x7c
  alloc_buffer+0xa4/0x144
  __bufio_new+0x84/0x278
  dm_bufio_prefetch+0x9c/0x154
  verity_prefetch_io+0xe8/0x10c
  process_one_work+0x240/0x424
  worker_thread+0x2fc/0x424
  kthread+0x10c/0x114

...and that looks to be the one holding the mutex.

The problem has been reproduced on fairly easily:
0. Be running Chrome OS w/ verity enabled on the root filesystem
1. Pick test patch: http://crosreview.com/412360
2. Install launchBalloons.sh and balloon.arm from
     http://crbug.com/468342
   ...that's just a memory stress test app.
3. On a 4GB rk3399 machine, run
     nice ./launchBalloons.sh 4 900 100000
   ...that tries to eat 4 * 900 MB of memory and keep accessing.
4. Login to the Chrome web browser and restore many tabs

With that, I've seen printouts like:
  DOUG: long bufio 90758 ms
...and stack trace always show's we're in dm_bufio_prefetch().

The problem is that we try to allocate memory with GFP_NOIO while
we're holding the dm_bufio lock.  Instead we should be using
GFP_NOWAIT.  Using GFP_NOIO can cause us to sleep while holding the
lock and that causes the above problems.

The current behavior explained by David Rientjes:

  It will still try reclaim initially because __GFP_WAIT (or
  __GFP_KSWAPD_RECLAIM) is set by GFP_NOIO.  This is the cause of
  contention on dm_bufio_lock() that the thread holds.  You want to
  pass GFP_NOWAIT instead of GFP_NOIO to alloc_buffer() when holding a
  mutex that can be contended by a concurrent slab shrinker (if
  count_objects didn't use a trylock, this pattern would trivially
  deadlock).

This change significantly increases responsiveness of the system while
in this state.  It makes a real difference because it unblocks kswapd.
In the bug report analyzed, kswapd was hung:

   kswapd0         D ffffffc000204fd8     0    72      2 0x00000000
   Call trace:
   [<ffffffc000204fd8>] __switch_to+0x9c/0xa8
   [<ffffffc00090b794>] __schedule+0x440/0x6d8
   [<ffffffc00090bac0>] schedule+0x94/0xb4
   [<ffffffc00090be44>] schedule_preempt_disabled+0x28/0x44
   [<ffffffc00090d900>] __mutex_lock_slowpath+0x120/0x1ac
   [<ffffffc00090d9d8>] mutex_lock+0x4c/0x68
   [<ffffffc000708e7c>] dm_bufio_shrink_count+0x38/0x78
   [<ffffffc00030b268>] shrink_slab.part.54.constprop.65+0x100/0x464
   [<ffffffc00030dbd8>] shrink_zone+0xa8/0x198
   [<ffffffc00030e578>] balance_pgdat+0x328/0x508
   [<ffffffc00030eb7c>] kswapd+0x424/0x51c
   [<ffffffc00023f06c>] kthread+0x10c/0x114
   [<ffffffc000203dd0>] ret_from_fork+0x10/0x40

By unblocking kswapd memory pressure should be reduced.

Change-Id: I10da1bcb02160d75320c16259a54b5de4aafede1
Suggested-by: David Rientjes <rientjes@google.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
(cherry picked from commit 9ea61cac0b1ad0c09022f39fd97e9b99a2cfc2dc)
Signed-off-by: Minchan Kim <minchan@google.com>
---
 drivers/md/dm-bufio.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c
index 969c815c90b68..d566c32e222a7 100644
--- a/drivers/md/dm-bufio.c
+++ b/drivers/md/dm-bufio.c
@@ -818,7 +818,8 @@ static struct dm_buffer *__alloc_buffer_wait_no_callback(struct dm_bufio_client
 	 * dm-bufio is resistant to allocation failures (it just keeps
 	 * one buffer reserved in cases all the allocations fail).
 	 * So set flags to not try too hard:
-	 *	GFP_NOIO: don't recurse into the I/O layer
+	 *	GFP_NOWAIT: don't wait; if we need to sleep we'll release our
+	 *		    mutex and wait ourselves.
 	 *	__GFP_NORETRY: don't retry and rather return failure
 	 *	__GFP_NOMEMALLOC: don't use emergency reserves
 	 *	__GFP_NOWARN: don't print a warning in case of failure
@@ -828,7 +829,7 @@ static struct dm_buffer *__alloc_buffer_wait_no_callback(struct dm_bufio_client
 	 */
 	while (1) {
 		if (dm_bufio_cache_size_latch != 1) {
-			b = alloc_buffer(c, GFP_NOIO | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN);
+			b = alloc_buffer(c, GFP_NOWAIT | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN);
 			if (b)
 				return b;
 		}

From bb84765366940b1dcaee9a726242643511d3b53f Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Tue, 22 May 2018 11:41:31 -0700
Subject: [PATCH 0096/1852] ANDROID: build: cuttlefish: Fix path to clang.

Reconcile with changes made to the kernel manifest. Clang must come from
master because it was not usable for kernel builds in older branches of
the Android platform.

Bug: 63889157
Change-Id: Id0a080fc2f1cba495f37f26afa48e43e736b756a
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 build.config.cuttlefish.x86_64 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build.config.cuttlefish.x86_64 b/build.config.cuttlefish.x86_64
index b3d89109fe751..f69b6ac335f8f 100644
--- a/build.config.cuttlefish.x86_64
+++ b/build.config.cuttlefish.x86_64
@@ -6,7 +6,7 @@ DEFCONFIG=x86_64_cuttlefish_defconfig
 EXTRA_CMDS=''
 KERNEL_DIR=common
 POST_DEFCONFIG_CMDS="check_defconfig"
-CLANG_PREBUILT_BIN=prebuilts/clang/host/linux-x86/clang-4630689/bin
+CLANG_PREBUILT_BIN=prebuilts-master/clang/host/linux-x86/clang-4630689/bin
 LINUX_GCC_CROSS_COMPILE_PREBUILTS_BIN=prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/bin
 FILES="
 arch/x86/boot/bzImage

From 35d5ccb040ca11bacaea775ade79f7c9a0008aad Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Tue, 22 May 2018 16:09:23 -0700
Subject: [PATCH 0097/1852] ANDROID: build: cuttlefish: Upgrade clang to newer
 version.

Use the same clang version as hikey-linaro.

Bug: 63889157
Change-Id: I6932d6149642d429086207e63aa8a8d5c2afd6f7
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 build.config.cuttlefish.x86_64 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build.config.cuttlefish.x86_64 b/build.config.cuttlefish.x86_64
index f69b6ac335f8f..4f2fd3755d74e 100644
--- a/build.config.cuttlefish.x86_64
+++ b/build.config.cuttlefish.x86_64
@@ -6,7 +6,7 @@ DEFCONFIG=x86_64_cuttlefish_defconfig
 EXTRA_CMDS=''
 KERNEL_DIR=common
 POST_DEFCONFIG_CMDS="check_defconfig"
-CLANG_PREBUILT_BIN=prebuilts-master/clang/host/linux-x86/clang-4630689/bin
+CLANG_PREBUILT_BIN=prebuilts-master/clang/host/linux-x86/clang-4679922/bin
 LINUX_GCC_CROSS_COMPILE_PREBUILTS_BIN=prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/bin
 FILES="
 arch/x86/boot/bzImage

From df0689de09a7e54e0f231a9d232fdb0fd093da42 Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Tue, 22 May 2018 18:01:41 -0700
Subject: [PATCH 0098/1852] ANDROID: build: cuttlefish: Upgrade clang to newer
 version.

The last upgrade introduced a new build failure, because it had a bug
which caused it to emit PLT relocations, certain types of which cannot
be handled by the reloc tool in the kernel.

See https://bugs.llvm.org/show_bug.cgi?id=36674 for more details.

Bug: 63889157
Change-Id: I813febdbacb0579abcb12dc7f2164cce1e2f5a26
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 build.config.cuttlefish.x86_64 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build.config.cuttlefish.x86_64 b/build.config.cuttlefish.x86_64
index 4f2fd3755d74e..ceef306dc4042 100644
--- a/build.config.cuttlefish.x86_64
+++ b/build.config.cuttlefish.x86_64
@@ -6,7 +6,7 @@ DEFCONFIG=x86_64_cuttlefish_defconfig
 EXTRA_CMDS=''
 KERNEL_DIR=common
 POST_DEFCONFIG_CMDS="check_defconfig"
-CLANG_PREBUILT_BIN=prebuilts-master/clang/host/linux-x86/clang-4679922/bin
+CLANG_PREBUILT_BIN=prebuilts-master/clang/host/linux-x86/clang-r328903/bin
 LINUX_GCC_CROSS_COMPILE_PREBUILTS_BIN=prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/bin
 FILES="
 arch/x86/boot/bzImage

From 8ab60b102556148a13022e48112cdfdffbcfe687 Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Tue, 22 May 2018 17:38:34 -0700
Subject: [PATCH 0099/1852] x86: vdso: Fix leaky vdso linker with CC=clang.

The vdso{32,64}.so can fail to build when CC=clang when clang tries to
find a suitable GCC toolchain to link these libraries with.

/usr/bin/ld: arch/x86/entry/vdso/vclock_gettime.o: access beyond end of merged section (782)

This happens because the host environment leaked into the CROSS_COMPILE
environment due to the way clang searches for suitable GCC toolchains.

Most of the time this goes unnoticed because the host linker is new
enough to work anyway, but on this particular machine it was not.

Extract the needed --target and --gcc-toolchain flags added in the top
level Makefile from KBUILD_CFLAGS.

Bug: 63889157
Change-Id: If7d4097d1d2eaf95f18d0295483bde8792a06844
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 arch/x86/entry/vdso/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/entry/vdso/Makefile b/arch/x86/entry/vdso/Makefile
index fddeb1f4dcd22..32acb36d0a9ab 100644
--- a/arch/x86/entry/vdso/Makefile
+++ b/arch/x86/entry/vdso/Makefile
@@ -166,7 +166,8 @@ quiet_cmd_vdso = VDSO    $@
 		 sh $(srctree)/$(src)/checkundef.sh '$(NM)' '$@'
 
 VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=both) \
-	$(call cc-ldoption, -Wl$(comma)--build-id) -Wl,-Bsymbolic $(LTO_CFLAGS)
+	$(call cc-ldoption, -Wl$(comma)--build-id) -Wl,-Bsymbolic $(LTO_CFLAGS) \
+	$(filter --target=% --gcc-toolchain=%,$(KBUILD_CFLAGS))
 GCOV_PROFILE := n
 
 #

From 7b1452d0cc65c6612cb92886c5a704f0f57ba3c3 Mon Sep 17 00:00:00 2001
From: Connor O'Brien <connoro@google.com>
Date: Wed, 23 May 2018 13:00:23 -0700
Subject: [PATCH 0100/1852] ANDROID: proc: fix undefined behavior in
 proc_uid_base_readdir

When uid_base_stuff has no entries, proc_uid_base_readdir tries to
compute an address before the start of the array. Revise this check to
use uid_base_stuff + nents instead, which makes the code valid
regardless of array size.

Bug: 80158484
Test: No more compiler warning with CONFIG_CPU_FREQ_TIMES=n
Change-Id: I6e55b27c3ba8210cee194f6d27bbd62c0b263796
Signed-off-by: Connor O'Brien <connoro@google.com>
---
 fs/proc/uid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/proc/uid.c b/fs/proc/uid.c
index 040591d341f81..11f1efc33c599 100644
--- a/fs/proc/uid.c
+++ b/fs/proc/uid.c
@@ -174,7 +174,7 @@ static int proc_uid_base_readdir(struct file *file, struct dir_context *ctx)
 		return 0;
 
 	for (u = uid_base_stuff + (ctx->pos - 2);
-	     u <= uid_base_stuff + nents - 1; u++) {
+	     u < uid_base_stuff + nents; u++) {
 		if (!proc_fill_cache(file, ctx, u->name, u->len,
 				     proc_uident_instantiate, NULL, u))
 			break;

From bd1356ee3d0be85d6981c7c6cf1d8416d8cf1d2e Mon Sep 17 00:00:00 2001
From: Daniel Bristot de Oliveira <bristot@redhat.com>
Date: Wed, 22 Jun 2016 17:28:41 -0300
Subject: [PATCH 0101/1852] cgroup: Disable IRQs while holding css_set_lock

While testing the deadline scheduler + cgroup setup I hit this
warning.

[  132.612935] ------------[ cut here ]------------
[  132.612951] WARNING: CPU: 5 PID: 0 at kernel/softirq.c:150 __local_bh_enable_ip+0x6b/0x80
[  132.612952] Modules linked in: (a ton of modules...)
[  132.612981] CPU: 5 PID: 0 Comm: swapper/5 Not tainted 4.7.0-rc2 #2
[  132.612981] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.8.2-20150714_191134- 04/01/2014
[  132.612982]  0000000000000086 45c8bb5effdd088b ffff88013fd43da0 ffffffff813d229e
[  132.612984]  0000000000000000 0000000000000000 ffff88013fd43de0 ffffffff810a652b
[  132.612985]  00000096811387b5 0000000000000200 ffff8800bab29d80 ffff880034c54c00
[  132.612986] Call Trace:
[  132.612987]  <IRQ>  [<ffffffff813d229e>] dump_stack+0x63/0x85
[  132.612994]  [<ffffffff810a652b>] __warn+0xcb/0xf0
[  132.612997]  [<ffffffff810e76a0>] ? push_dl_task.part.32+0x170/0x170
[  132.612999]  [<ffffffff810a665d>] warn_slowpath_null+0x1d/0x20
[  132.613000]  [<ffffffff810aba5b>] __local_bh_enable_ip+0x6b/0x80
[  132.613008]  [<ffffffff817d6c8a>] _raw_write_unlock_bh+0x1a/0x20
[  132.613010]  [<ffffffff817d6c9e>] _raw_spin_unlock_bh+0xe/0x10
[  132.613015]  [<ffffffff811388ac>] put_css_set+0x5c/0x60
[  132.613016]  [<ffffffff8113dc7f>] cgroup_free+0x7f/0xa0
[  132.613017]  [<ffffffff810a3912>] __put_task_struct+0x42/0x140
[  132.613018]  [<ffffffff810e776a>] dl_task_timer+0xca/0x250
[  132.613027]  [<ffffffff810e76a0>] ? push_dl_task.part.32+0x170/0x170
[  132.613030]  [<ffffffff8111371e>] __hrtimer_run_queues+0xee/0x270
[  132.613031]  [<ffffffff81113ec8>] hrtimer_interrupt+0xa8/0x190
[  132.613034]  [<ffffffff81051a58>] local_apic_timer_interrupt+0x38/0x60
[  132.613035]  [<ffffffff817d9b0d>] smp_apic_timer_interrupt+0x3d/0x50
[  132.613037]  [<ffffffff817d7c5c>] apic_timer_interrupt+0x8c/0xa0
[  132.613038]  <EOI>  [<ffffffff81063466>] ? native_safe_halt+0x6/0x10
[  132.613043]  [<ffffffff81037a4e>] default_idle+0x1e/0xd0
[  132.613044]  [<ffffffff810381cf>] arch_cpu_idle+0xf/0x20
[  132.613046]  [<ffffffff810e8fda>] default_idle_call+0x2a/0x40
[  132.613047]  [<ffffffff810e92d7>] cpu_startup_entry+0x2e7/0x340
[  132.613048]  [<ffffffff81050235>] start_secondary+0x155/0x190
[  132.613049] ---[ end trace f91934d162ce9977 ]---

The warn is the spin_(lock|unlock)_bh(&css_set_lock) in the interrupt
context. Converting the spin_lock_bh to spin_lock_irq(save) to avoid
this problem - and other problems of sharing a spinlock with an
interrupt.

Change-Id: I5b5d5c79c3f380ac35f58596fc2cebaf6348eb67
Cc: Tejun Heo <tj@kernel.org>
Cc: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Juri Lelli <juri.lelli@arm.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: cgroups@vger.kernel.org
Cc: stable@vger.kernel.org # 4.5+
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Rik van Riel <riel@redhat.com>
Reviewed-by: "Luis Claudio R. Goncalves" <lgoncalv@redhat.com>
Signed-off-by: Daniel Bristot de Oliveira <bristot@redhat.com>
Acked-by: Zefan Li <lizefan@huawei.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
---
 kernel/cgroup.c | 122 +++++++++++++++++++++++++-----------------------
 1 file changed, 64 insertions(+), 58 deletions(-)

diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index e56763b1f8d9a..02c0b6185d5ab 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -785,6 +785,8 @@ static void put_css_set_locked(struct css_set *cset)
 
 static void put_css_set(struct css_set *cset)
 {
+	unsigned long flags;
+
 	/*
 	 * Ensure that the refcount doesn't hit zero while any readers
 	 * can see it. Similar to atomic_dec_and_lock(), but for an
@@ -793,9 +795,9 @@ static void put_css_set(struct css_set *cset)
 	if (atomic_add_unless(&cset->refcount, -1, 1))
 		return;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irqsave(&css_set_lock, flags);
 	put_css_set_locked(cset);
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irqrestore(&css_set_lock, flags);
 }
 
 /*
@@ -1018,11 +1020,11 @@ static struct css_set *find_css_set(struct css_set *old_cset,
 
 	/* First see if we already have a cgroup group that matches
 	 * the desired set */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	cset = find_existing_css_set(old_cset, cgrp, template);
 	if (cset)
 		get_css_set(cset);
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	if (cset)
 		return cset;
@@ -1050,7 +1052,7 @@ static struct css_set *find_css_set(struct css_set *old_cset,
 	 * find_existing_css_set() */
 	memcpy(cset->subsys, template, sizeof(cset->subsys));
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	/* Add reference counts and links from the new css_set. */
 	list_for_each_entry(link, &old_cset->cgrp_links, cgrp_link) {
 		struct cgroup *c = link->cgrp;
@@ -1076,7 +1078,7 @@ static struct css_set *find_css_set(struct css_set *old_cset,
 		css_get(css);
 	}
 
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	return cset;
 }
@@ -1140,7 +1142,7 @@ static void cgroup_destroy_root(struct cgroup_root *root)
 	 * Release all the links from cset_links to this hierarchy's
 	 * root cgroup
 	 */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	list_for_each_entry_safe(link, tmp_link, &cgrp->cset_links, cset_link) {
 		list_del(&link->cset_link);
@@ -1148,7 +1150,7 @@ static void cgroup_destroy_root(struct cgroup_root *root)
 		kfree(link);
 	}
 
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	if (!list_empty(&root->root_list)) {
 		list_del(&root->root_list);
@@ -1552,11 +1554,11 @@ static int rebind_subsystems(struct cgroup_root *dst_root,
 		ss->root = dst_root;
 		css->cgroup = dcgrp;
 
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		hash_for_each(css_set_table, i, cset, hlist)
 			list_move_tail(&cset->e_cset_node[ss->id],
 				       &dcgrp->e_csets[ss->id]);
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 
 		src_root->subsys_mask &= ~(1 << ssid);
 		scgrp->subtree_control &= ~(1 << ssid);
@@ -1820,7 +1822,7 @@ static void cgroup_enable_task_cg_lists(void)
 {
 	struct task_struct *p, *g;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	if (use_task_css_set_links)
 		goto out_unlock;
@@ -1845,8 +1847,12 @@ static void cgroup_enable_task_cg_lists(void)
 		 * entry won't be deleted though the process has exited.
 		 * Do it while holding siglock so that we don't end up
 		 * racing against cgroup_exit().
+		 *
+		 * Interrupts were already disabled while acquiring
+		 * the css_set_lock, so we do not need to disable it
+		 * again when acquiring the sighand->siglock here.
 		 */
-		spin_lock_irq(&p->sighand->siglock);
+		spin_lock(&p->sighand->siglock);
 		if (!(p->flags & PF_EXITING)) {
 			struct css_set *cset = task_css_set(p);
 
@@ -1855,11 +1861,11 @@ static void cgroup_enable_task_cg_lists(void)
 			list_add_tail(&p->cg_list, &cset->tasks);
 			get_css_set(cset);
 		}
-		spin_unlock_irq(&p->sighand->siglock);
+		spin_unlock(&p->sighand->siglock);
 	} while_each_thread(g, p);
 	read_unlock(&tasklist_lock);
 out_unlock:
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 }
 
 static void init_cgroup_housekeeping(struct cgroup *cgrp)
@@ -1964,13 +1970,13 @@ static int cgroup_setup_root(struct cgroup_root *root, unsigned long ss_mask)
 	 * Link the root cgroup in this hierarchy into all the css_set
 	 * objects.
 	 */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	hash_for_each(css_set_table, i, cset, hlist) {
 		link_css_set(&tmp_links, cset, root_cgrp);
 		if (css_set_populated(cset))
 			cgroup_update_populated(root_cgrp, true);
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	BUG_ON(!list_empty(&root_cgrp->self.children));
 	BUG_ON(atomic_read(&root->nr_cgrps) != 1);
@@ -2213,7 +2219,7 @@ char *task_cgroup_path(struct task_struct *task, char *buf, size_t buflen)
 	char *path = NULL;
 
 	mutex_lock(&cgroup_mutex);
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	root = idr_get_next(&cgroup_hierarchy_idr, &hierarchy_id);
 
@@ -2226,7 +2232,7 @@ char *task_cgroup_path(struct task_struct *task, char *buf, size_t buflen)
 			path = buf;
 	}
 
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	mutex_unlock(&cgroup_mutex);
 	return path;
 }
@@ -2401,7 +2407,7 @@ static int cgroup_taskset_migrate(struct cgroup_taskset *tset,
 	 * the new cgroup.  There are no failure cases after here, so this
 	 * is the commit point.
 	 */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(cset, &tset->src_csets, mg_node) {
 		list_for_each_entry_safe(task, tmp_task, &cset->mg_tasks, cg_list) {
 			struct css_set *from_cset = task_css_set(task);
@@ -2412,7 +2418,7 @@ static int cgroup_taskset_migrate(struct cgroup_taskset *tset,
 			put_css_set_locked(from_cset);
 		}
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	/*
 	 * Migration is committed, all target tasks are now on dst_csets.
@@ -2441,13 +2447,13 @@ static int cgroup_taskset_migrate(struct cgroup_taskset *tset,
 		}
 	}
 out_release_tset:
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_splice_init(&tset->dst_csets, &tset->src_csets);
 	list_for_each_entry_safe(cset, tmp_cset, &tset->src_csets, mg_node) {
 		list_splice_tail_init(&cset->mg_tasks, &cset->tasks);
 		list_del_init(&cset->mg_node);
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	return ret;
 }
 
@@ -2464,14 +2470,14 @@ static void cgroup_migrate_finish(struct list_head *preloaded_csets)
 
 	lockdep_assert_held(&cgroup_mutex);
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry_safe(cset, tmp_cset, preloaded_csets, mg_preload_node) {
 		cset->mg_src_cgrp = NULL;
 		cset->mg_dst_cset = NULL;
 		list_del_init(&cset->mg_preload_node);
 		put_css_set_locked(cset);
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 }
 
 /**
@@ -2621,7 +2627,7 @@ static int cgroup_migrate(struct task_struct *leader, bool threadgroup,
 	 * already PF_EXITING could be freed from underneath us unless we
 	 * take an rcu_read_lock.
 	 */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	rcu_read_lock();
 	task = leader;
 	do {
@@ -2630,7 +2636,7 @@ static int cgroup_migrate(struct task_struct *leader, bool threadgroup,
 			break;
 	} while_each_thread(leader, task);
 	rcu_read_unlock();
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	return cgroup_taskset_migrate(&tset, cgrp);
 }
@@ -2651,7 +2657,7 @@ static int cgroup_attach_task(struct cgroup *dst_cgrp,
 	int ret;
 
 	/* look up all src csets */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	rcu_read_lock();
 	task = leader;
 	do {
@@ -2661,7 +2667,7 @@ static int cgroup_attach_task(struct cgroup *dst_cgrp,
 			break;
 	} while_each_thread(leader, task);
 	rcu_read_unlock();
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	/* prepare dst csets and commit */
 	ret = cgroup_migrate_prepare_dst(dst_cgrp, &preloaded_csets);
@@ -2695,9 +2701,9 @@ static int cgroup_procs_write_permission(struct task_struct *task,
 		struct cgroup *cgrp;
 		struct inode *inode;
 
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		cgrp = task_cgroup_from_root(task, &cgrp_dfl_root);
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 
 		while (!cgroup_is_descendant(dst_cgrp, cgrp))
 			cgrp = cgroup_parent(cgrp);
@@ -2799,9 +2805,9 @@ int cgroup_attach_task_all(struct task_struct *from, struct task_struct *tsk)
 		if (root == &cgrp_dfl_root)
 			continue;
 
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		from_cgrp = task_cgroup_from_root(from, root);
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 
 		retval = cgroup_attach_task(from_cgrp, tsk, false);
 		if (retval)
@@ -2926,7 +2932,7 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
 	percpu_down_write(&cgroup_threadgroup_rwsem);
 
 	/* look up all csses currently attached to @cgrp's subtree */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	css_for_each_descendant_pre(css, cgroup_css(cgrp, NULL)) {
 		struct cgrp_cset_link *link;
 
@@ -2938,14 +2944,14 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
 			cgroup_migrate_add_src(link->cset, cgrp,
 					       &preloaded_csets);
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	/* NULL dst indicates self on default hierarchy */
 	ret = cgroup_migrate_prepare_dst(NULL, &preloaded_csets);
 	if (ret)
 		goto out_finish;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(src_cset, &preloaded_csets, mg_preload_node) {
 		struct task_struct *task, *ntask;
 
@@ -2957,7 +2963,7 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
 		list_for_each_entry_safe(task, ntask, &src_cset->tasks, cg_list)
 			cgroup_taskset_add(task, &tset);
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	ret = cgroup_taskset_migrate(&tset, cgrp);
 out_finish:
@@ -3640,10 +3646,10 @@ static int cgroup_task_count(const struct cgroup *cgrp)
 	int count = 0;
 	struct cgrp_cset_link *link;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(link, &cgrp->cset_links, cset_link)
 		count += atomic_read(&link->cset->refcount);
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	return count;
 }
 
@@ -3981,7 +3987,7 @@ void css_task_iter_start(struct cgroup_subsys_state *css,
 
 	memset(it, 0, sizeof(*it));
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	it->ss = css->ss;
 
@@ -3994,7 +4000,7 @@ void css_task_iter_start(struct cgroup_subsys_state *css,
 
 	css_task_iter_advance_css_set(it);
 
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 }
 
 /**
@@ -4012,7 +4018,7 @@ struct task_struct *css_task_iter_next(struct css_task_iter *it)
 		it->cur_task = NULL;
 	}
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	if (it->task_pos) {
 		it->cur_task = list_entry(it->task_pos, struct task_struct,
@@ -4021,7 +4027,7 @@ struct task_struct *css_task_iter_next(struct css_task_iter *it)
 		css_task_iter_advance(it);
 	}
 
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	return it->cur_task;
 }
@@ -4035,10 +4041,10 @@ struct task_struct *css_task_iter_next(struct css_task_iter *it)
 void css_task_iter_end(struct css_task_iter *it)
 {
 	if (it->cur_cset) {
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		list_del(&it->iters_node);
 		put_css_set_locked(it->cur_cset);
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 	}
 
 	if (it->cur_task)
@@ -4067,10 +4073,10 @@ int cgroup_transfer_tasks(struct cgroup *to, struct cgroup *from)
 	mutex_lock(&cgroup_mutex);
 
 	/* all tasks in @from are being moved, all csets are source */
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(link, &from->cset_links, cset_link)
 		cgroup_migrate_add_src(link->cset, to, &preloaded_csets);
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	ret = cgroup_migrate_prepare_dst(to, &preloaded_csets);
 	if (ret)
@@ -5175,10 +5181,10 @@ static int cgroup_destroy_locked(struct cgroup *cgrp)
 	 */
 	cgrp->self.flags &= ~CSS_ONLINE;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(link, &cgrp->cset_links, cset_link)
 		link->cset->dead = true;
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 
 	/* initiate massacre of all css's */
 	for_each_css(css, ssid, cgrp)
@@ -5438,7 +5444,7 @@ int proc_cgroup_show(struct seq_file *m, struct pid_namespace *ns,
 		goto out;
 
 	mutex_lock(&cgroup_mutex);
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 
 	for_each_root(root) {
 		struct cgroup_subsys *ss;
@@ -5490,7 +5496,7 @@ int proc_cgroup_show(struct seq_file *m, struct pid_namespace *ns,
 
 	retval = 0;
 out_unlock:
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	mutex_unlock(&cgroup_mutex);
 	kfree(buf);
 out:
@@ -5651,13 +5657,13 @@ void cgroup_post_fork(struct task_struct *child,
 	if (use_task_css_set_links) {
 		struct css_set *cset;
 
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		cset = task_css_set(current);
 		if (list_empty(&child->cg_list)) {
 			get_css_set(cset);
 			css_set_move_task(child, NULL, cset, false);
 		}
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 	}
 
 	/*
@@ -5701,9 +5707,9 @@ void cgroup_exit(struct task_struct *tsk)
 	cset = task_css_set(tsk);
 
 	if (!list_empty(&tsk->cg_list)) {
-		spin_lock_bh(&css_set_lock);
+		spin_lock_irq(&css_set_lock);
 		css_set_move_task(tsk, cset, NULL, false);
-		spin_unlock_bh(&css_set_lock);
+		spin_unlock_irq(&css_set_lock);
 	} else {
 		get_css_set(cset);
 	}
@@ -5916,7 +5922,7 @@ static int current_css_set_cg_links_read(struct seq_file *seq, void *v)
 	if (!name_buf)
 		return -ENOMEM;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	rcu_read_lock();
 	cset = rcu_dereference(current->cgroups);
 	list_for_each_entry(link, &cset->cgrp_links, cgrp_link) {
@@ -5927,7 +5933,7 @@ static int current_css_set_cg_links_read(struct seq_file *seq, void *v)
 			   c->root->hierarchy_id, name_buf);
 	}
 	rcu_read_unlock();
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	kfree(name_buf);
 	return 0;
 }
@@ -5938,7 +5944,7 @@ static int cgroup_css_links_read(struct seq_file *seq, void *v)
 	struct cgroup_subsys_state *css = seq_css(seq);
 	struct cgrp_cset_link *link;
 
-	spin_lock_bh(&css_set_lock);
+	spin_lock_irq(&css_set_lock);
 	list_for_each_entry(link, &css->cgroup->cset_links, cset_link) {
 		struct css_set *cset = link->cset;
 		struct task_struct *task;
@@ -5961,7 +5967,7 @@ static int cgroup_css_links_read(struct seq_file *seq, void *v)
 	overflow:
 		seq_puts(seq, "  ...\n");
 	}
-	spin_unlock_bh(&css_set_lock);
+	spin_unlock_irq(&css_set_lock);
 	return 0;
 }
 

From e48e95b7986d764c5f9828cf206d9e6a9963e18f Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 7 May 2018 17:22:08 -0700
Subject: [PATCH 0102/1852] BACKPORT, FROMLIST: fscrypt: add Speck128/256
 support

fscrypt currently only supports AES encryption.  However, many low-end
mobile devices have older CPUs that don't have AES instructions, e.g.
the ARMv8 Cryptography Extensions.  Currently, user data on such devices
is not encrypted at rest because AES is too slow, even when the NEON
bit-sliced implementation of AES is used.  Unfortunately, it is
infeasible to encrypt these devices at all when AES is the only option.

Therefore, this patch updates fscrypt to support the Speck block cipher,
which was recently added to the crypto API.  The C implementation of
Speck is not especially fast, but Speck can be implemented very
efficiently with general-purpose vector instructions, e.g. ARM NEON.
For example, on an ARMv7 processor, we measured the NEON-accelerated
Speck128/256-XTS at 69 MB/s for both encryption and decryption, while
AES-256-XTS with the NEON bit-sliced implementation was only 22 MB/s
encryption and 19 MB/s decryption.

There are multiple variants of Speck.  This patch only adds support for
Speck128/256, which is the variant with a 128-bit block size and 256-bit
key size -- the same as AES-256.  This is believed to be the most secure
variant of Speck, and it's only about 6% slower than Speck128/128.
Speck64/128 would be at least 20% faster because it has 20% rounds, and
it can be even faster on CPUs that can't efficiently do the 64-bit
operations needed for Speck128.  However, Speck64's 64-bit block size is
not preferred security-wise.  ARM NEON also supports the needed 64-bit
operations even on 32-bit CPUs, resulting in Speck128 being fast enough
for our targeted use cases so far.

The chosen modes of operation are XTS for contents and CTS-CBC for
filenames.  These are the same modes of operation that fscrypt defaults
to for AES.  Note that as with the other fscrypt modes, Speck will not
be used unless userspace chooses to use it.  Nor are any of the existing
modes (which are all AES-based) being removed, of course.

We intentionally don't make CONFIG_FS_ENCRYPTION select
CONFIG_CRYPTO_SPECK, so people will have to enable Speck support
themselves if they need it.  This is because we shouldn't bloat the
FS_ENCRYPTION dependencies with every new cipher, especially ones that
aren't recommended for most users.  Moreover, CRYPTO_SPECK is just the
generic implementation, which won't be fast enough for many users; in
practice, they'll need to enable CRYPTO_SPECK_NEON to get acceptable
performance.

More details about our choice of Speck can be found in our patches that
added Speck to the crypto API, and the follow-on discussion threads.
We're planning a publication that explains the choice in more detail.
But briefly, we can't use ChaCha20 as we previously proposed, since it
would be insecure to use a stream cipher in this context, with potential
IV reuse during writes on f2fs and/or on wear-leveling flash storage.

We also evaluated many other lightweight and/or ARX-based block ciphers
such as Chaskey-LTS, RC5, LEA, CHAM, Threefish, RC6, NOEKEON, SPARX, and
XTEA.  However, all had disadvantages vs. Speck, such as insufficient
performance with NEON, much less published cryptanalysis, or an
insufficient security level.  Various design choices in Speck make it
perform better with NEON than competing ciphers while still having a
security margin similar to AES, and in the case of Speck128 also the
same available security levels.  Unfortunately, Speck does have some
political baggage attached -- it's an NSA designed cipher, and was
rejected from an ISO standard (though for context, as far as I know none
of the above-mentioned alternatives are ISO standards either).
Nevertheless, we believe it is a good solution to the problem from a
technical perspective.

Certain algorithms constructed from ChaCha or the ChaCha permutation,
such as MEM (Masked Even-Mansour) or HPolyC, may also meet our
performance requirements.  However, these are new constructions that
need more time to receive the cryptographic review and acceptance needed
to be confident in their security.  HPolyC hasn't been published yet,
and we are concerned that MEM makes stronger assumptions about the
underlying permutation than the ChaCha stream cipher does.  In contrast,
the XTS mode of operation is relatively well accepted, and Speck has
over 70 cryptanalysis papers.  Of course, these ChaCha-based algorithms
can still be added later if they become ready.

The best known attack on Speck128/256 is a differential cryptanalysis
attack on 25 of 34 rounds with 2^253 time complexity and 2^125 chosen
plaintexts, i.e. only marginally faster than brute force.  There is no
known attack on the full 34 rounds.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>

(cherry-picked from commit 12d28f79558f2e987c5f3817f89e1ccc0f11a7b5
 https://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt.git master)
(dropped Documentation/filesystems/fscrypt.rst change)
(fixed merge conflict in fs/crypto/keyinfo.c)
(also ported change to fs/ext4/, which isn't using fs/crypto/ in this
 kernel version)
Change-Id: I62c632044dfd06a2c5b74c2fb058f9c3b8af0add
Signed-off-by: Eric Biggers <ebiggers@google.com>
---
 fs/crypto/fscrypt_private.h |  4 ++++
 fs/crypto/keyinfo.c         |  2 ++
 fs/ext4/crypto.c            | 12 ++++++++++--
 fs/ext4/crypto_fname.c      |  6 ------
 fs/ext4/crypto_key.c        |  6 ++++++
 fs/ext4/crypto_policy.c     | 14 +++++---------
 fs/ext4/ext4.h              |  5 +++--
 fs/ext4/ext4_crypto.h       |  4 ++++
 include/uapi/linux/fs.h     |  2 ++
 9 files changed, 36 insertions(+), 19 deletions(-)

diff --git a/fs/crypto/fscrypt_private.h b/fs/crypto/fscrypt_private.h
index 426aa1b27f179..fe6f6524c1aaa 100644
--- a/fs/crypto/fscrypt_private.h
+++ b/fs/crypto/fscrypt_private.h
@@ -101,6 +101,10 @@ static inline bool fscrypt_valid_enc_modes(u32 contents_mode,
 	    filenames_mode == FS_ENCRYPTION_MODE_AES_256_CTS)
 		return true;
 
+	if (contents_mode == FS_ENCRYPTION_MODE_SPECK128_256_XTS &&
+	    filenames_mode == FS_ENCRYPTION_MODE_SPECK128_256_CTS)
+		return true;
+
 	return false;
 }
 
diff --git a/fs/crypto/keyinfo.c b/fs/crypto/keyinfo.c
index 7c00331da5df3..472f69188a961 100644
--- a/fs/crypto/keyinfo.c
+++ b/fs/crypto/keyinfo.c
@@ -134,6 +134,8 @@ static const struct {
 					     FS_AES_128_CBC_KEY_SIZE },
 	[FS_ENCRYPTION_MODE_AES_128_CTS] = { "cts(cbc(aes))",
 					     FS_AES_128_CTS_KEY_SIZE },
+	[FS_ENCRYPTION_MODE_SPECK128_256_XTS] = { "xts(speck128)",	64 },
+	[FS_ENCRYPTION_MODE_SPECK128_256_CTS] = { "cts(cbc(speck128))",	32 },
 };
 
 static int determine_cipher_type(struct fscrypt_info *ci, struct inode *inode,
diff --git a/fs/ext4/crypto.c b/fs/ext4/crypto.c
index f240cef8b3265..f6096ee776628 100644
--- a/fs/ext4/crypto.c
+++ b/fs/ext4/crypto.c
@@ -457,9 +457,17 @@ int ext4_encrypted_zeroout(struct inode *inode, struct ext4_extent *ex)
 	return err;
 }
 
-bool ext4_valid_contents_enc_mode(uint32_t mode)
+bool ext4_valid_enc_modes(uint32_t contents_mode, uint32_t filenames_mode)
 {
-	return (mode == EXT4_ENCRYPTION_MODE_AES_256_XTS);
+	if (contents_mode == EXT4_ENCRYPTION_MODE_AES_256_XTS) {
+		return (filenames_mode == EXT4_ENCRYPTION_MODE_AES_256_CTS ||
+			filenames_mode == EXT4_ENCRYPTION_MODE_AES_256_HEH);
+	}
+
+	if (contents_mode == EXT4_ENCRYPTION_MODE_SPECK128_256_XTS)
+		return filenames_mode == EXT4_ENCRYPTION_MODE_SPECK128_256_CTS;
+
+	return false;
 }
 
 /**
diff --git a/fs/ext4/crypto_fname.c b/fs/ext4/crypto_fname.c
index 026716bdbbfc1..5e5afb6ef71ab 100644
--- a/fs/ext4/crypto_fname.c
+++ b/fs/ext4/crypto_fname.c
@@ -42,12 +42,6 @@ static void ext4_dir_crypt_complete(struct crypto_async_request *req, int res)
 	complete(&ecr->completion);
 }
 
-bool ext4_valid_filenames_enc_mode(uint32_t mode)
-{
-	return (mode == EXT4_ENCRYPTION_MODE_AES_256_CTS ||
-		mode == EXT4_ENCRYPTION_MODE_AES_256_HEH);
-}
-
 static unsigned max_name_len(struct inode *inode)
 {
 	return S_ISLNK(inode->i_mode) ? inode->i_sb->s_blocksize :
diff --git a/fs/ext4/crypto_key.c b/fs/ext4/crypto_key.c
index 14ae7781f2a8c..68225223ffd8f 100644
--- a/fs/ext4/crypto_key.c
+++ b/fs/ext4/crypto_key.c
@@ -258,6 +258,12 @@ int ext4_get_encryption_info(struct inode *inode)
 	case EXT4_ENCRYPTION_MODE_AES_256_HEH:
 		cipher_str = "heh(aes)";
 		break;
+	case EXT4_ENCRYPTION_MODE_SPECK128_256_XTS:
+		cipher_str = "xts(speck128)";
+		break;
+	case EXT4_ENCRYPTION_MODE_SPECK128_256_CTS:
+		cipher_str = "cts(cbc(speck128))";
+		break;
 	default:
 		printk_once(KERN_WARNING
 			    "ext4: unsupported key mode %d (ino %u)\n",
diff --git a/fs/ext4/crypto_policy.c b/fs/ext4/crypto_policy.c
index e4f4fc4e56abe..818fa45ecf08b 100644
--- a/fs/ext4/crypto_policy.c
+++ b/fs/ext4/crypto_policy.c
@@ -60,16 +60,12 @@ static int ext4_create_encryption_context_from_policy(
 	ctx.format = EXT4_ENCRYPTION_CONTEXT_FORMAT_V1;
 	memcpy(ctx.master_key_descriptor, policy->master_key_descriptor,
 	       EXT4_KEY_DESCRIPTOR_SIZE);
-	if (!ext4_valid_contents_enc_mode(policy->contents_encryption_mode)) {
+	if (!ext4_valid_enc_modes(policy->contents_encryption_mode,
+				  policy->filenames_encryption_mode)) {
 		printk(KERN_WARNING
-		       "%s: Invalid contents encryption mode %d\n", __func__,
-			policy->contents_encryption_mode);
-		return -EINVAL;
-	}
-	if (!ext4_valid_filenames_enc_mode(policy->filenames_encryption_mode)) {
-		printk(KERN_WARNING
-		       "%s: Invalid filenames encryption mode %d\n", __func__,
-			policy->filenames_encryption_mode);
+		       "%s: Invalid encryption modes (contents %d, filenames %d)\n",
+		       __func__, policy->contents_encryption_mode,
+		       policy->filenames_encryption_mode);
 		return -EINVAL;
 	}
 	if (policy->flags & ~EXT4_POLICY_FLAGS_VALID)
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index 6edacb849e482..40992b68e6391 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -589,6 +589,8 @@ enum {
 #define EXT4_ENCRYPTION_MODE_AES_256_GCM	2
 #define EXT4_ENCRYPTION_MODE_AES_256_CBC	3
 #define EXT4_ENCRYPTION_MODE_AES_256_CTS	4
+#define EXT4_ENCRYPTION_MODE_SPECK128_256_XTS	7
+#define EXT4_ENCRYPTION_MODE_SPECK128_256_CTS	8
 #define EXT4_ENCRYPTION_MODE_AES_256_HEH	126
 
 #include "ext4_crypto.h"
@@ -2259,7 +2261,7 @@ int ext4_get_policy(struct inode *inode,
 
 /* crypto.c */
 extern struct kmem_cache *ext4_crypt_info_cachep;
-bool ext4_valid_contents_enc_mode(uint32_t mode);
+bool ext4_valid_enc_modes(uint32_t contents_mode, uint32_t filenames_mode);
 uint32_t ext4_validate_encryption_key_size(uint32_t mode, uint32_t size);
 extern struct workqueue_struct *ext4_read_workqueue;
 struct ext4_crypto_ctx *ext4_get_crypto_ctx(struct inode *inode,
@@ -2290,7 +2292,6 @@ static inline int ext4_sb_has_crypto(struct super_block *sb)
 #endif
 
 /* crypto_fname.c */
-bool ext4_valid_filenames_enc_mode(uint32_t mode);
 u32 ext4_fname_crypto_round_up(u32 size, u32 blksize);
 unsigned ext4_fname_encrypted_size(struct inode *inode, u32 ilen);
 int ext4_fname_crypto_alloc_buffer(struct inode *inode,
diff --git a/fs/ext4/ext4_crypto.h b/fs/ext4/ext4_crypto.h
index e52637d969db2..f7ba3be9d7acb 100644
--- a/fs/ext4/ext4_crypto.h
+++ b/fs/ext4/ext4_crypto.h
@@ -124,6 +124,10 @@ static inline int ext4_encryption_key_size(int mode)
 		return EXT4_AES_256_CTS_KEY_SIZE;
 	case EXT4_ENCRYPTION_MODE_AES_256_HEH:
 		return EXT4_AES_256_HEH_KEY_SIZE;
+	case EXT4_ENCRYPTION_MODE_SPECK128_256_XTS:
+		return 64;
+	case EXT4_ENCRYPTION_MODE_SPECK128_256_CTS:
+		return 32;
 	default:
 		BUG();
 	}
diff --git a/include/uapi/linux/fs.h b/include/uapi/linux/fs.h
index 60d27496c3281..d122ea5338d1c 100644
--- a/include/uapi/linux/fs.h
+++ b/include/uapi/linux/fs.h
@@ -193,6 +193,8 @@ struct inodes_stat_t {
 #define FS_ENCRYPTION_MODE_AES_256_CTS		4
 #define FS_ENCRYPTION_MODE_AES_128_CBC		5
 #define FS_ENCRYPTION_MODE_AES_128_CTS		6
+#define FS_ENCRYPTION_MODE_SPECK128_256_XTS	7
+#define FS_ENCRYPTION_MODE_SPECK128_256_CTS	8
 
 
 struct fscrypt_policy {

From 761d0a3b2e17939627a97b5755f2cb790b5298aa Mon Sep 17 00:00:00 2001
From: Joel Fernandes <joelaf@google.com>
Date: Thu, 9 Nov 2017 10:52:19 -0800
Subject: [PATCH 0103/1852] UPSTREAM: sched/fair: Consider RT/IRQ pressure in
 capacity_spare_wake

capacity_spare_wake in the slow path influences choice of idlest groups,
as we search for groups with maximum spare capacity. In scenarios where
RT pressure is high, a sub optimal group can be chosen and hurt
performance of the task being woken up.

Several tests with results are included below to show improvements with
this change.

1) Hackbench on Pixel 2 Android device (4x4 ARM64 Octa core)
------------------------------------------------------------
Here we have RT activity running on big CPU cluster induced with rt-app,
and running hackbench in parallel. The RT tasks are bound to 4 CPUs on
the big cluster (cpu 4,5,6,7) and have 100ms periodicity with
runtime=20ms sleep=80ms.

Hackbench shows big benefit (30%) improvement when number of tasks is 8
and 32: Note: data is completion time in seconds (lower is better).
Number of loops for 8 and 16 tasks is 50000, and for 32 tasks its 20000.
+--------+-----+-------+-------------------+---------------------------+
| groups | fds | tasks | Without Patch     | With Patch                |
+--------+-----+-------+---------+---------+-----------------+---------+
|        |     |       | Mean    | Stdev   | Mean            | Stdev   |
|        |     |       +-------------------+-----------------+---------+
|      1 |   8 |     8 | 1.0534  | 0.13722 | 0.7293 (+30.7%) | 0.02653 |
|      2 |   8 |    16 | 1.6219  | 0.16631 | 1.6391 (-1%)    | 0.24001 |
|      4 |   8 |    32 | 1.2538  | 0.13086 | 1.1080 (+11.6%) | 0.16201 |
+--------+-----+-------+---------+---------+-----------------+---------+

2) Rohit ran barrier.c test (details below) with following improvements:
------------------------------------------------------------------------
This was Rohit's original use case for a patch he posted at [1] however
from his recent tests he showed my patch can replace his slow path
changes [1] and there's no need to selectively scan/skip CPUs in
find_idlest_group_cpu in the slow path to get the improvement he sees.

barrier.c (open_mp code) as a micro-benchmark. It does a number of
iterations and barrier sync at the end of each for loop.

Here barrier,c is running in along with ping on CPU 0 and 1 as:
'ping -l 10000 -q -s 10 -f hostX'

barrier.c can be found at:
http://www.spinics.net/lists/kernel/msg2506955.html

Following are the results for the iterations per second with this
micro-benchmark (higher is better), on a 44 core, 2 socket 88 Threads
Intel x86 machine:
+--------+------------------+---------------------------+
|Threads | Without patch    | With patch                |
|        |                  |                           |
+--------+--------+---------+-----------------+---------+
|        | Mean   | Std Dev | Mean            | Std Dev |
+--------+--------+---------+-----------------+---------+
|1       | 539.36 | 60.16   | 572.54 (+6.15%) | 40.95   |
|2       | 481.01 | 19.32   | 530.64 (+10.32%)| 56.16   |
|4       | 474.78 | 22.28   | 479.46 (+0.99%) | 18.89   |
|8       | 450.06 | 24.91   | 447.82 (-0.50%) | 12.36   |
|16      | 436.99 | 22.57   | 441.88 (+1.12%) | 7.39    |
|32      | 388.28 | 55.59   | 429.4  (+10.59%)| 31.14   |
|64      | 314.62 | 6.33    | 311.81 (-0.89%) | 11.99   |
+--------+--------+---------+-----------------+---------+

3) ping+hackbench test on bare-metal sever (Rohit ran this test)
----------------------------------------------------------------
Here hackbench is running in threaded mode along
with, running ping on CPU 0 and 1 as:
'ping -l 10000 -q -s 10 -f hostX'

This test is running on 2 socket, 20 core and 40 threads Intel x86
machine:
Number of loops is 10000 and runtime is in seconds (Lower is better).

+--------------+-----------------+--------------------------+
|Task Groups   | Without patch   |  With patch              |
|              +-------+---------+----------------+---------+
|(Groups of 40)| Mean  | Std Dev |  Mean          | Std Dev |
+--------------+-------+---------+----------------+---------+
|1             | 0.851 | 0.007   |  0.828 (+2.77%)| 0.032   |
|2             | 1.083 | 0.203   |  1.087 (-0.37%)| 0.246   |
|4             | 1.601 | 0.051   |  1.611 (-0.62%)| 0.055   |
|8             | 2.837 | 0.060   |  2.827 (+0.35%)| 0.031   |
|16            | 5.139 | 0.133   |  5.107 (+0.63%)| 0.085   |
|25            | 7.569 | 0.142   |  7.503 (+0.88%)| 0.143   |
+--------------+-------+---------+----------------+---------+

[1] https://patchwork.kernel.org/patch/9991635/

Matt Fleming also ran cyclictest and several different hackbench tests
on his test machines to santiy-check that the patch doesn't harm any
of his usecases.

Change-Id: Ibcedbb65273545ff2f4d1962b4eaca14072b1bd2
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Cc: Morten Ramussen <morten.rasmussen@arm.com>
Cc: Brendan Jackman <brendan.jackman@arm.com>
Tested-by: Rohit Jain <rohit.k.jain@oracle.com>
Tested-by: Matt Fleming <matt@codeblueprint.co.uk>
Signed-off-by: Joel Fernandes <joelaf@google.com>
Reviewed-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
---
 kernel/sched/fair.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 4eac96233ff3e..1e18c18a8a3c0 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -5985,7 +5985,7 @@ boosted_task_util(struct task_struct *task)
 
 static unsigned long capacity_spare_wake(int cpu, struct task_struct *p)
 {
-	return capacity_orig_of(cpu) - cpu_util_wake(cpu, p);
+	return max_t(long, capacity_of(cpu) - cpu_util_wake(cpu, p), 0);
 }
 
 /*

From d3d6a4b1301df51b4820ffc8f59169e080d8203f Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim <jaegeuk@kernel.org>
Date: Thu, 24 May 2018 13:57:26 -0700
Subject: [PATCH 0104/1852] FROMLIST: f2fs: early updates queued for v4.18-rc1

Cherry-picked from:
  origin/upstream-f2fs-stable-linux-4.4.y

85d2070f60c6 ("f2fs: turn down IO priority of discard from background")
4738f527db84 ("f2fs: don't split checkpoint in fstrim")
31e2713935ea ("f2fs: issue discard commands proactively in high fs utilization")
70676ef73646 ("f2fs: add fsync_mode=nobarrier for non-atomic files")
bb53d06b5f21 ("f2fs: let fstrim issue discard commands in lower priority")

Signed-off-by: Jaegeuk Kim <jaegeuk@google.com>
---
 Documentation/ABI/testing/sysfs-fs-f2fs |   1 +
 Documentation/filesystems/f2fs.txt      |  16 +-
 fs/f2fs/f2fs.h                          |  13 +-
 fs/f2fs/file.c                          |   2 +-
 fs/f2fs/segment.c                       | 246 ++++++++++++------------
 fs/f2fs/super.c                         |   4 +
 fs/f2fs/sysfs.c                         |   3 +
 7 files changed, 148 insertions(+), 137 deletions(-)

diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs
index b8d0a30f16445..f82da9bbb1fd7 100644
--- a/Documentation/ABI/testing/sysfs-fs-f2fs
+++ b/Documentation/ABI/testing/sysfs-fs-f2fs
@@ -101,6 +101,7 @@ Date:		February 2015
 Contact:	"Jaegeuk Kim" <jaegeuk@kernel.org>
 Description:
 		 Controls the trimming rate in batch mode.
+		 <deprecated>
 
 What:		/sys/fs/f2fs/<disk>/cp_interval
 Date:		October 2015
diff --git a/Documentation/filesystems/f2fs.txt b/Documentation/filesystems/f2fs.txt
index 1f52baea2f698..ecccb51c7279a 100644
--- a/Documentation/filesystems/f2fs.txt
+++ b/Documentation/filesystems/f2fs.txt
@@ -180,13 +180,15 @@ whint_mode=%s          Control which write hints are passed down to block
                        passes down hints with its policy.
 alloc_mode=%s          Adjust block allocation policy, which supports "reuse"
                        and "default".
-fsync_mode=%s          Control the policy of fsync. Currently supports "posix"
-                       and "strict". In "posix" mode, which is default, fsync
-                       will follow POSIX semantics and does a light operation
-                       to improve the filesystem performance. In "strict" mode,
-                       fsync will be heavy and behaves in line with xfs, ext4
-                       and btrfs, where xfstest generic/342 will pass, but the
-                       performance will regress.
+fsync_mode=%s          Control the policy of fsync. Currently supports "posix",
+                       "strict", and "nobarrier". In "posix" mode, which is
+                       default, fsync will follow POSIX semantics and does a
+                       light operation to improve the filesystem performance.
+                       In "strict" mode, fsync will be heavy and behaves in line
+                       with xfs, ext4 and btrfs, where xfstest generic/342 will
+                       pass, but the performance will regress. "nobarrier" is
+                       based on "posix", but doesn't issue flush command for
+                       non-atomic files likewise "nobarrier" mount option.
 test_dummy_encryption  Enable dummy encryption, which provides a fake fscrypt
                        context. The fake fscrypt context is used by xfstests.
 
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index d0bfcfed35e2f..97c17b3d984c2 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -238,15 +238,12 @@ enum {
 #define	CP_DISCARD	0x00000010
 #define CP_TRIMMED	0x00000020
 
-#define DEF_BATCHED_TRIM_SECTIONS	2048
-#define BATCHED_TRIM_SEGMENTS(sbi)	\
-		(GET_SEG_FROM_SEC(sbi, SM_I(sbi)->trim_sections))
-#define BATCHED_TRIM_BLOCKS(sbi)	\
-		(BATCHED_TRIM_SEGMENTS(sbi) << (sbi)->log_blocks_per_seg)
 #define MAX_DISCARD_BLOCKS(sbi)		BLKS_PER_SEC(sbi)
 #define DEF_MAX_DISCARD_REQUEST		8	/* issue 8 discards per round */
+#define DEF_MAX_DISCARD_LEN		512	/* Max. 2MB per discard */
 #define DEF_MIN_DISCARD_ISSUE_TIME	50	/* 50 ms, if exists */
 #define DEF_MAX_DISCARD_ISSUE_TIME	60000	/* 60 s, if no candidates */
+#define DEF_DISCARD_URGENT_UTIL		80	/* do more discard over 80% */
 #define DEF_CP_INTERVAL			60	/* 60 secs */
 #define DEF_IDLE_INTERVAL		5	/* 5 secs */
 
@@ -753,7 +750,8 @@ static inline void set_extent_info(struct extent_info *ei, unsigned int fofs,
 static inline bool __is_discard_mergeable(struct discard_info *back,
 						struct discard_info *front)
 {
-	return back->lstart + back->len == front->lstart;
+	return (back->lstart + back->len == front->lstart) &&
+		(back->len + front->len < DEF_MAX_DISCARD_LEN);
 }
 
 static inline bool __is_discard_back_mergeable(struct discard_info *cur,
@@ -1139,6 +1137,7 @@ enum {
 enum fsync_mode {
 	FSYNC_MODE_POSIX,	/* fsync follows posix semantics */
 	FSYNC_MODE_STRICT,	/* fsync behaves in line with ext4 */
+	FSYNC_MODE_NOBARRIER,	/* fsync behaves nobarrier based on posix */
 };
 
 #ifdef CONFIG_F2FS_FS_ENCRYPTION
@@ -2853,8 +2852,6 @@ int f2fs_flush_device_cache(struct f2fs_sb_info *sbi);
 void destroy_flush_cmd_control(struct f2fs_sb_info *sbi, bool free);
 void invalidate_blocks(struct f2fs_sb_info *sbi, block_t addr);
 bool is_checkpointed_data(struct f2fs_sb_info *sbi, block_t blkaddr);
-void init_discard_policy(struct discard_policy *dpolicy, int discard_type,
-						unsigned int granularity);
 void drop_discard_cmd(struct f2fs_sb_info *sbi);
 void stop_discard_thread(struct f2fs_sb_info *sbi);
 bool f2fs_wait_discard_bios(struct f2fs_sb_info *sbi);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 7587758a285fc..40d03d58b390d 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -309,7 +309,7 @@ static int f2fs_do_sync_file(struct file *file, loff_t start, loff_t end,
 	remove_ino_entry(sbi, ino, APPEND_INO);
 	clear_inode_flag(inode, FI_APPEND_WRITE);
 flush_out:
-	if (!atomic)
+	if (!atomic && F2FS_OPTION(sbi).fsync_mode != FSYNC_MODE_NOBARRIER)
 		ret = f2fs_issue_flush(sbi, inode->i_ino);
 	if (!ret) {
 		remove_ino_entry(sbi, ino, UPDATE_INO);
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 01bc94df9f003..478a4504ba9a8 100644
--- a/fs/f2fs/segment.c
+++ b/fs/f2fs/segment.c
@@ -996,6 +996,39 @@ static void __check_sit_bitmap(struct f2fs_sb_info *sbi,
 #endif
 }
 
+static void __init_discard_policy(struct f2fs_sb_info *sbi,
+				struct discard_policy *dpolicy,
+				int discard_type, unsigned int granularity)
+{
+	/* common policy */
+	dpolicy->type = discard_type;
+	dpolicy->sync = true;
+	dpolicy->granularity = granularity;
+
+	dpolicy->max_requests = DEF_MAX_DISCARD_REQUEST;
+	dpolicy->io_aware_gran = MAX_PLIST_NUM;
+
+	if (discard_type == DPOLICY_BG) {
+		dpolicy->min_interval = DEF_MIN_DISCARD_ISSUE_TIME;
+		dpolicy->max_interval = DEF_MAX_DISCARD_ISSUE_TIME;
+		dpolicy->io_aware = true;
+		dpolicy->sync = false;
+		if (utilization(sbi) > DEF_DISCARD_URGENT_UTIL) {
+			dpolicy->granularity = 1;
+			dpolicy->max_interval = DEF_MIN_DISCARD_ISSUE_TIME;
+		}
+	} else if (discard_type == DPOLICY_FORCE) {
+		dpolicy->min_interval = DEF_MIN_DISCARD_ISSUE_TIME;
+		dpolicy->max_interval = DEF_MAX_DISCARD_ISSUE_TIME;
+		dpolicy->io_aware = false;
+	} else if (discard_type == DPOLICY_FSTRIM) {
+		dpolicy->io_aware = false;
+	} else if (discard_type == DPOLICY_UMOUNT) {
+		dpolicy->io_aware = false;
+	}
+}
+
+
 /* this function is copied from blkdev_issue_discard from block/blk-lib.c */
 static void __submit_discard_cmd(struct f2fs_sb_info *sbi,
 						struct discard_policy *dpolicy,
@@ -1210,68 +1243,6 @@ static int __queue_discard_cmd(struct f2fs_sb_info *sbi,
 	return 0;
 }
 
-static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
-					struct discard_policy *dpolicy,
-					unsigned int start, unsigned int end)
-{
-	struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
-	struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
-	struct rb_node **insert_p = NULL, *insert_parent = NULL;
-	struct discard_cmd *dc;
-	struct blk_plug plug;
-	int issued;
-
-next:
-	issued = 0;
-
-	mutex_lock(&dcc->cmd_lock);
-	f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
-
-	dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
-					NULL, start,
-					(struct rb_entry **)&prev_dc,
-					(struct rb_entry **)&next_dc,
-					&insert_p, &insert_parent, true);
-	if (!dc)
-		dc = next_dc;
-
-	blk_start_plug(&plug);
-
-	while (dc && dc->lstart <= end) {
-		struct rb_node *node;
-
-		if (dc->len < dpolicy->granularity)
-			goto skip;
-
-		if (dc->state != D_PREP) {
-			list_move_tail(&dc->list, &dcc->fstrim_list);
-			goto skip;
-		}
-
-		__submit_discard_cmd(sbi, dpolicy, dc);
-
-		if (++issued >= dpolicy->max_requests) {
-			start = dc->lstart + dc->len;
-
-			blk_finish_plug(&plug);
-			mutex_unlock(&dcc->cmd_lock);
-
-			schedule();
-
-			goto next;
-		}
-skip:
-		node = rb_next(&dc->rb_node);
-		dc = rb_entry_safe(node, struct discard_cmd, rb_node);
-
-		if (fatal_signal_pending(current))
-			break;
-	}
-
-	blk_finish_plug(&plug);
-	mutex_unlock(&dcc->cmd_lock);
-}
-
 static int __issue_discard_cmd(struct f2fs_sb_info *sbi,
 					struct discard_policy *dpolicy)
 {
@@ -1412,7 +1383,18 @@ static unsigned int __wait_discard_cmd_range(struct f2fs_sb_info *sbi,
 static void __wait_all_discard_cmd(struct f2fs_sb_info *sbi,
 						struct discard_policy *dpolicy)
 {
-	__wait_discard_cmd_range(sbi, dpolicy, 0, UINT_MAX);
+	struct discard_policy dp;
+
+	if (dpolicy) {
+		__wait_discard_cmd_range(sbi, dpolicy, 0, UINT_MAX);
+		return;
+	}
+
+	/* wait all */
+	__init_discard_policy(sbi, &dp, DPOLICY_FSTRIM, 1);
+	__wait_discard_cmd_range(sbi, &dp, 0, UINT_MAX);
+	__init_discard_policy(sbi, &dp, DPOLICY_UMOUNT, 1);
+	__wait_discard_cmd_range(sbi, &dp, 0, UINT_MAX);
 }
 
 /* This should be covered by global mutex, &sit_i->sentry_lock */
@@ -1457,11 +1439,13 @@ bool f2fs_wait_discard_bios(struct f2fs_sb_info *sbi)
 	struct discard_policy dpolicy;
 	bool dropped;
 
-	init_discard_policy(&dpolicy, DPOLICY_UMOUNT, dcc->discard_granularity);
+	__init_discard_policy(sbi, &dpolicy, DPOLICY_UMOUNT,
+					dcc->discard_granularity);
 	__issue_discard_cmd(sbi, &dpolicy);
 	dropped = __drop_discard_cmd(sbi);
-	__wait_all_discard_cmd(sbi, &dpolicy);
 
+	/* just to make sure there is no pending discard commands */
+	__wait_all_discard_cmd(sbi, NULL);
 	return dropped;
 }
 
@@ -1477,7 +1461,7 @@ static int issue_discard_thread(void *data)
 	set_freezable();
 
 	do {
-		init_discard_policy(&dpolicy, DPOLICY_BG,
+		__init_discard_policy(sbi, &dpolicy, DPOLICY_BG,
 					dcc->discard_granularity);
 
 		wait_event_interruptible_timeout(*q,
@@ -1495,7 +1479,7 @@ static int issue_discard_thread(void *data)
 			dcc->discard_wake = 0;
 
 		if (sbi->gc_thread && sbi->gc_thread->gc_urgent)
-			init_discard_policy(&dpolicy, DPOLICY_FORCE, 1);
+			__init_discard_policy(sbi, &dpolicy, DPOLICY_FORCE, 1);
 
 		sb_start_intwrite(sbi->sb);
 
@@ -1788,32 +1772,6 @@ void clear_prefree_segments(struct f2fs_sb_info *sbi, struct cp_control *cpc)
 	wake_up_discard_thread(sbi, false);
 }
 
-void init_discard_policy(struct discard_policy *dpolicy,
-				int discard_type, unsigned int granularity)
-{
-	/* common policy */
-	dpolicy->type = discard_type;
-	dpolicy->sync = true;
-	dpolicy->granularity = granularity;
-
-	dpolicy->max_requests = DEF_MAX_DISCARD_REQUEST;
-	dpolicy->io_aware_gran = MAX_PLIST_NUM;
-
-	if (discard_type == DPOLICY_BG) {
-		dpolicy->min_interval = DEF_MIN_DISCARD_ISSUE_TIME;
-		dpolicy->max_interval = DEF_MAX_DISCARD_ISSUE_TIME;
-		dpolicy->io_aware = true;
-	} else if (discard_type == DPOLICY_FORCE) {
-		dpolicy->min_interval = DEF_MIN_DISCARD_ISSUE_TIME;
-		dpolicy->max_interval = DEF_MAX_DISCARD_ISSUE_TIME;
-		dpolicy->io_aware = false;
-	} else if (discard_type == DPOLICY_FSTRIM) {
-		dpolicy->io_aware = false;
-	} else if (discard_type == DPOLICY_UMOUNT) {
-		dpolicy->io_aware = false;
-	}
-}
-
 static int create_discard_cmd_control(struct f2fs_sb_info *sbi)
 {
 	dev_t dev = sbi->sb->s_bdev->bd_dev;
@@ -2453,11 +2411,72 @@ bool exist_trim_candidates(struct f2fs_sb_info *sbi, struct cp_control *cpc)
 	return has_candidate;
 }
 
+static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
+					struct discard_policy *dpolicy,
+					unsigned int start, unsigned int end)
+{
+	struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
+	struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
+	struct rb_node **insert_p = NULL, *insert_parent = NULL;
+	struct discard_cmd *dc;
+	struct blk_plug plug;
+	int issued;
+
+next:
+	issued = 0;
+
+	mutex_lock(&dcc->cmd_lock);
+	f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
+
+	dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
+					NULL, start,
+					(struct rb_entry **)&prev_dc,
+					(struct rb_entry **)&next_dc,
+					&insert_p, &insert_parent, true);
+	if (!dc)
+		dc = next_dc;
+
+	blk_start_plug(&plug);
+
+	while (dc && dc->lstart <= end) {
+		struct rb_node *node;
+
+		if (dc->len < dpolicy->granularity)
+			goto skip;
+
+		if (dc->state != D_PREP) {
+			list_move_tail(&dc->list, &dcc->fstrim_list);
+			goto skip;
+		}
+
+		__submit_discard_cmd(sbi, dpolicy, dc);
+
+		if (++issued >= dpolicy->max_requests) {
+			start = dc->lstart + dc->len;
+
+			blk_finish_plug(&plug);
+			mutex_unlock(&dcc->cmd_lock);
+			__wait_all_discard_cmd(sbi, NULL);
+			congestion_wait(BLK_RW_ASYNC, HZ/50);
+			goto next;
+		}
+skip:
+		node = rb_next(&dc->rb_node);
+		dc = rb_entry_safe(node, struct discard_cmd, rb_node);
+
+		if (fatal_signal_pending(current))
+			break;
+	}
+
+	blk_finish_plug(&plug);
+	mutex_unlock(&dcc->cmd_lock);
+}
+
 int f2fs_trim_fs(struct f2fs_sb_info *sbi, struct fstrim_range *range)
 {
 	__u64 start = F2FS_BYTES_TO_BLK(range->start);
 	__u64 end = start + F2FS_BYTES_TO_BLK(range->len) - 1;
-	unsigned int start_segno, end_segno, cur_segno;
+	unsigned int start_segno, end_segno;
 	block_t start_block, end_block;
 	struct cp_control cpc;
 	struct discard_policy dpolicy;
@@ -2483,40 +2502,27 @@ int f2fs_trim_fs(struct f2fs_sb_info *sbi, struct fstrim_range *range)
 
 	cpc.reason = CP_DISCARD;
 	cpc.trim_minlen = max_t(__u64, 1, F2FS_BYTES_TO_BLK(range->minlen));
+	cpc.trim_start = start_segno;
+	cpc.trim_end = end_segno;
 
-	/* do checkpoint to issue discard commands safely */
-	for (cur_segno = start_segno; cur_segno <= end_segno;
-					cur_segno = cpc.trim_end + 1) {
-		cpc.trim_start = cur_segno;
-
-		if (sbi->discard_blks == 0)
-			break;
-		else if (sbi->discard_blks < BATCHED_TRIM_BLOCKS(sbi))
-			cpc.trim_end = end_segno;
-		else
-			cpc.trim_end = min_t(unsigned int,
-				rounddown(cur_segno +
-				BATCHED_TRIM_SEGMENTS(sbi),
-				sbi->segs_per_sec) - 1, end_segno);
-
-		mutex_lock(&sbi->gc_mutex);
-		err = write_checkpoint(sbi, &cpc);
-		mutex_unlock(&sbi->gc_mutex);
-		if (err)
-			break;
+	if (sbi->discard_blks == 0)
+		goto out;
 
-		schedule();
-	}
+	mutex_lock(&sbi->gc_mutex);
+	err = write_checkpoint(sbi, &cpc);
+	mutex_unlock(&sbi->gc_mutex);
+	if (err)
+		goto out;
 
 	start_block = START_BLOCK(sbi, start_segno);
-	end_block = START_BLOCK(sbi, min(cur_segno, end_segno) + 1);
+	end_block = START_BLOCK(sbi, end_segno + 1);
 
-	init_discard_policy(&dpolicy, DPOLICY_FSTRIM, cpc.trim_minlen);
+	__init_discard_policy(sbi, &dpolicy, DPOLICY_FSTRIM, cpc.trim_minlen);
 	__issue_discard_cmd_range(sbi, &dpolicy, start_block, end_block);
 	trimmed = __wait_discard_cmd_range(sbi, &dpolicy,
 					start_block, end_block);
-out:
 	range->len = F2FS_BLK_TO_BYTES(trimmed);
+out:
 	return err;
 }
 
@@ -3904,8 +3910,6 @@ int build_segment_manager(struct f2fs_sb_info *sbi)
 	sm_info->min_hot_blocks = DEF_MIN_HOT_BLOCKS;
 	sm_info->min_ssr_sections = reserved_sections(sbi);
 
-	sm_info->trim_sections = DEF_BATCHED_TRIM_SECTIONS;
-
 	INIT_LIST_HEAD(&sm_info->sit_entry_set);
 
 	init_rwsem(&sm_info->curseg_lock);
diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index 55b2bad556716..cb57ad3ca32d2 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/super.c
@@ -740,6 +740,10 @@ static int parse_options(struct super_block *sb, char *options)
 			} else if (strlen(name) == 6 &&
 					!strncmp(name, "strict", 6)) {
 				F2FS_OPTION(sbi).fsync_mode = FSYNC_MODE_STRICT;
+			} else if (strlen(name) == 9 &&
+					!strncmp(name, "nobarrier", 9)) {
+				F2FS_OPTION(sbi).fsync_mode =
+							FSYNC_MODE_NOBARRIER;
 			} else {
 				kfree(name);
 				return -EINVAL;
diff --git a/fs/f2fs/sysfs.c b/fs/f2fs/sysfs.c
index f33a56d6e6dd7..2c53de9251bec 100644
--- a/fs/f2fs/sysfs.c
+++ b/fs/f2fs/sysfs.c
@@ -245,6 +245,9 @@ static ssize_t f2fs_sbi_store(struct f2fs_attr *a,
 		return count;
 	}
 
+	if (!strcmp(a->attr.name, "trim_sections"))
+		return -EINVAL;
+
 	*ui = t;
 
 	if (!strcmp(a->attr.name, "iostat_enable") && *ui == 0)

From 976ab7d13857abf46cb80d74eae3705abdce947f Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Thu, 31 May 2018 13:36:29 -0700
Subject: [PATCH 0105/1852] ANDROID: Update x86_64_cuttlefish_defconfig

Merge with the configs from kernel/configs.git added recently.

This should fix ipsec VPN functionality.

Bug: 80540078
Change-Id: I9cc99f5e34d2809670fe2fc0df121610657f6769
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 arch/x86/configs/x86_64_cuttlefish_defconfig | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/x86/configs/x86_64_cuttlefish_defconfig b/arch/x86/configs/x86_64_cuttlefish_defconfig
index 9f0107157b8f2..c8bb388132336 100644
--- a/arch/x86/configs/x86_64_cuttlefish_defconfig
+++ b/arch/x86/configs/x86_64_cuttlefish_defconfig
@@ -11,6 +11,7 @@ CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_SCHED=y
@@ -56,6 +57,7 @@ CONFIG_RANDOMIZE_BASE=y
 CONFIG_PHYSICAL_ALIGN=0x1000000
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE="console=ttyS0 reboot=p nopti"
+CONFIG_PM_AUTOSLEEP=y
 CONFIG_PM_WAKELOCKS=y
 CONFIG_PM_WAKELOCKS_LIMIT=0
 # CONFIG_PM_WAKELOCKS_GC is not set
@@ -88,8 +90,8 @@ CONFIG_IP_MROUTE=y
 CONFIG_IP_PIMSM_V1=y
 CONFIG_IP_PIMSM_V2=y
 CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=y
 CONFIG_INET_ESP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG_DESTROY=y
@@ -105,6 +107,7 @@ CONFIG_INET6_AH=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_NETLABEL=y
 CONFIG_NETFILTER=y
@@ -298,7 +301,6 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_HIDRAW=y
 CONFIG_UHID=y
-# CONFIG_HID_GENERIC is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_ACRUX=y
 CONFIG_HID_ACRUX_FF=y
@@ -362,6 +364,8 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_DUMMY_HCD=y
 CONFIG_USB_CONFIGFS=y
 CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_MTP=y
+CONFIG_USB_CONFIGFS_F_PTP=y
 CONFIG_USB_CONFIGFS_F_ACC=y
 CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
 CONFIG_USB_CONFIGFS_UEVENT=y
@@ -423,7 +427,6 @@ CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_LOCKUP_DETECTOR=y
 CONFIG_PANIC_TIMEOUT=5
-# CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
@@ -440,3 +443,4 @@ CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_SHA512=y

From a3c1d67f24cb19bb675fb09d2ea4b19320ff1a51 Mon Sep 17 00:00:00 2001
From: Alistair Strachan <astrachan@google.com>
Date: Thu, 31 May 2018 15:47:36 -0700
Subject: [PATCH 0106/1852] ANDROID: x86_64_cuttlefish_defconfig: Enable F2FS

Bug: 80475502
Change-Id: I061467404f1d4b828ac1b7423db375a35934ce28
Signed-off-by: Alistair Strachan <astrachan@google.com>
---
 arch/x86/configs/x86_64_cuttlefish_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/configs/x86_64_cuttlefish_defconfig b/arch/x86/configs/x86_64_cuttlefish_defconfig
index c8bb388132336..71026930c04c1 100644
--- a/arch/x86/configs/x86_64_cuttlefish_defconfig
+++ b/arch/x86/configs/x86_64_cuttlefish_defconfig
@@ -394,6 +394,9 @@ CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_EXT4_ENCRYPTION=y
+CONFIG_F2FS_FS=y
+CONFIG_F2FS_FS_SECURITY=y
+CONFIG_F2FS_FS_ENCRYPTION=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set

From dd4f95f7599b964604b398a8db57d7067f37a6e2 Mon Sep 17 00:00:00 2001
From: Roman Kiryanov <rkir@google.com>
Date: Mon, 4 Jun 2018 15:57:00 -0700
Subject: [PATCH 0107/1852] goldfish: pipe: ANDROID: remove redundant blank
 lines

Bug: 72717639
Change-Id: I951c34c7247c764ccd40a3e62680909b76403c4c
Signed-off-by: Roman Kiryanov <rkir@google.com>
---
 drivers/platform/goldfish/goldfish_pipe_v2.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/platform/goldfish/goldfish_pipe_v2.c b/drivers/platform/goldfish/goldfish_pipe_v2.c
index 543b5a0833638..ad586866e403b 100644
--- a/drivers/platform/goldfish/goldfish_pipe_v2.c
+++ b/drivers/platform/goldfish/goldfish_pipe_v2.c
@@ -993,7 +993,6 @@ static int goldfish_dma_mmap_locked(
 				dma->phys_begin >> PAGE_SHIFT,
 				sz_requested,
 				vma->vm_page_prot);
-
 	if (status < 0) {
 		dev_err(pdev_dev, "Cannot remap pfn range....\n");
 		return -EAGAIN;
@@ -1022,7 +1021,6 @@ static int goldfish_dma_mmap(struct file *filp, struct vm_area_struct *vma)
 	status = goldfish_dma_mmap_locked(pipe, vma);
 	mutex_unlock(&pipe->lock);
 	return status;
-
 }
 
 static int goldfish_pipe_dma_create_region(

From 3032972c4172f34b7e39396523a0c312713d1009 Mon Sep 17 00:00:00 2001
From: Roman Kiryanov <rkir@google.com>
Date: Mon, 4 Jun 2018 10:43:24 -0700
Subject: [PATCH 0108/1852] Update arch/x86/configs/x86_64_ranchu_defconfig

Bug: 72717639
Change-Id: Ia7519bd03fefa2a3d7c91e3a2537599bfd6be70d
Signed-off-by: Roman Kiryanov <rkir@google.com>
---
 arch/x86/configs/x86_64_ranchu_defconfig | 70 +++++++++++++++++++++++-
 1 file changed, 67 insertions(+), 3 deletions(-)

diff --git a/arch/x86/configs/x86_64_ranchu_defconfig b/arch/x86/configs/x86_64_ranchu_defconfig
index e8ed8eef62ec8..5cf2450842ab6 100644
--- a/arch/x86/configs/x86_64_ranchu_defconfig
+++ b/arch/x86/configs/x86_64_ranchu_defconfig
@@ -1,5 +1,6 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_POSIX_MQUEUE=y
+# CONFIG_USELIB is not set
 CONFIG_AUDIT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -8,20 +9,29 @@ CONFIG_TASKSTATS=y
 CONFIG_TASK_DELAY_ACCT=y
 CONFIG_TASK_XACCT=y
 CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
 CONFIG_CGROUP_DEBUG=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS_ALL=y
+CONFIG_BPF_SYSCALL=y
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_CC_STACKPROTECTOR_STRONG=y
 CONFIG_ARCH_MMAP_RND_BITS=32
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS=16
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_OSF_PARTITION=y
 CONFIG_AMIGA_PARTITION=y
@@ -34,6 +44,9 @@ CONFIG_SGI_PARTITION=y
 CONFIG_SUN_PARTITION=y
 CONFIG_KARMA_PARTITION=y
 CONFIG_SMP=y
+CONFIG_GOLDFISH=y
+CONFIG_HYPERVISOR_GUEST=y
+CONFIG_PARAVIRT=y
 CONFIG_MCORE2=y
 CONFIG_MAXSMP=y
 CONFIG_PREEMPT=y
@@ -47,6 +60,9 @@ CONFIG_EFI=y
 CONFIG_EFI_STUB=y
 CONFIG_HZ_100=y
 CONFIG_PHYSICAL_START=0x100000
+CONFIG_RANDOMIZE_BASE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="nopti"
 CONFIG_PM_AUTOSLEEP=y
 CONFIG_PM_WAKELOCKS=y
 CONFIG_PM_WAKELOCKS_LIMIT=0
@@ -69,6 +85,7 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_XFRM_USER=y
+CONFIG_XFRM_STATISTICS=y
 CONFIG_NET_KEY=y
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
@@ -84,6 +101,8 @@ CONFIG_IP_MROUTE=y
 CONFIG_IP_PIMSM_V1=y
 CONFIG_IP_PIMSM_V2=y
 CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
@@ -95,6 +114,7 @@ CONFIG_INET6_AH=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_NETLABEL=y
 CONFIG_NETFILTER=y
@@ -153,6 +173,10 @@ CONFIG_IP_NF_MATCH_ECN=y
 CONFIG_IP_NF_MATCH_TTL=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
 CONFIG_IP_NF_MANGLE=y
 CONFIG_IP_NF_RAW=y
 CONFIG_IP_NF_SECURITY=y
@@ -161,6 +185,7 @@ CONFIG_IP_NF_ARPFILTER=y
 CONFIG_IP_NF_ARP_MANGLE=y
 CONFIG_NF_CONNTRACK_IPV6=y
 CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
 CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_REJECT=y
 CONFIG_IP6_NF_MANGLE=y
@@ -177,10 +202,13 @@ CONFIG_MAC80211_LEDS=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DMA_CMA=y
 CONFIG_CONNECTOR=y
+CONFIG_OF=y
+CONFIG_OF_UNITTEST=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_VIRTIO_BLK=y
+CONFIG_UID_SYS_STATS=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_SR_VENDOR=y
@@ -210,6 +238,7 @@ CONFIG_DM_VERITY_FEC=y
 CONFIG_NETDEVICES=y
 CONFIG_NETCONSOLE=y
 CONFIG_TUN=y
+CONFIG_VETH=y
 CONFIG_VIRTIO_NET=y
 CONFIG_BNX2=y
 CONFIG_TIGON3=y
@@ -231,6 +260,7 @@ CONFIG_PPP_MPPE=y
 CONFIG_PPPOLAC=y
 CONFIG_PPPOPNS=y
 CONFIG_USB_USBNET=y
+CONFIG_MAC80211_HWSIM=y
 CONFIG_INPUT_POLLDEV=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
@@ -263,7 +293,10 @@ CONFIG_SERIAL_NONSTANDARD=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_NVRAM=y
+# CONFIG_DEVPORT is not set
 CONFIG_I2C_I801=y
 CONFIG_BATTERY_GOLDFISH=y
 CONFIG_WATCHDOG=y
@@ -280,6 +313,18 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
+CONFIG_SND_HDA_INTEL=y
+CONFIG_SND_HDA_CODEC_REALTEK=y
+CONFIG_SND_HDA_CODEC_ANALOG=y
+CONFIG_SND_HDA_CODEC_SIGMATEL=y
+CONFIG_SND_HDA_CODEC_VIA=y
+CONFIG_SND_HDA_CODEC_HDMI=y
+CONFIG_SND_HDA_CODEC_CIRRUS=y
+CONFIG_SND_HDA_CODEC_CONEXANT=y
+CONFIG_SND_HDA_CODEC_CA0110=y
+CONFIG_SND_HDA_CODEC_CA0132=y
+CONFIG_SND_HDA_CODEC_CMEDIA=y
+CONFIG_SND_HDA_CODEC_SI3054=y
 CONFIG_HIDRAW=y
 CONFIG_UHID=y
 CONFIG_HID_A4TECH=y
@@ -349,6 +394,15 @@ CONFIG_USB_UHCI_HCD=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_OTG_WAKELOCK=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_MTP=y
+CONFIG_USB_CONFIGFS_F_PTP=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
 CONFIG_EDAC=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
@@ -362,8 +416,6 @@ CONFIG_SW_SYNC=y
 CONFIG_ION=y
 CONFIG_GOLDFISH_AUDIO=y
 CONFIG_GOLDFISH_SYNC=y
-CONFIG_SND_HDA_INTEL=y
-CONFIG_GOLDFISH=y
 CONFIG_GOLDFISH_PIPE=y
 CONFIG_ANDROID=y
 CONFIG_ANDROID_BINDER_IPC=y
@@ -373,6 +425,7 @@ CONFIG_EXT4_FS_SECURITY=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_QFMT_V2=y
 CONFIG_FUSE_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
@@ -383,8 +436,10 @@ CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_HUGETLBFS=y
+CONFIG_SDCARD_FS=y
 CONFIG_PSTORE=y
 CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_PMSG=y
 CONFIG_PSTORE_RAM=y
 # CONFIG_NETWORK_FILESYSTEMS is not set
 CONFIG_NLS_DEFAULT="utf8"
@@ -399,16 +454,24 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DETECT_HUNG_TASK=y
 CONFIG_PANIC_TIMEOUT=5
 CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
 CONFIG_SCHED_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
 CONFIG_KEYS=y
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
+CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_AES_X86_64=y
 CONFIG_CRYPTO_TWOFISH=y
 CONFIG_ASYMMETRIC_KEY_TYPE=y
 CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
@@ -417,3 +480,4 @@ CONFIG_PKCS7_MESSAGE_PARSER=y
 CONFIG_PKCS7_TEST_KEY=y
 # CONFIG_VIRTUALIZATION is not set
 CONFIG_CRC_T10DIF=y
+CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder"

From 99aece515b5d8fce2efa3bf1f1303d9dc0bb9d6b Mon Sep 17 00:00:00 2001
From: Roman Kiryanov <rkir@google.com>
Date: Mon, 4 Jun 2018 18:22:58 -0700
Subject: [PATCH 0109/1852] goldfish: pipe: ANDROID: add missing check for
 memory allocated

Bug: 72717639
Change-Id: I9bc8db41f2269c38a259d842ea52bdc0037f3bae
Signed-off-by: Roman Kiryanov <rkir@google.com>
---
 drivers/platform/goldfish/goldfish_pipe_v2.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/platform/goldfish/goldfish_pipe_v2.c b/drivers/platform/goldfish/goldfish_pipe_v2.c
index ad586866e403b..60ab13a24e7df 100644
--- a/drivers/platform/goldfish/goldfish_pipe_v2.c
+++ b/drivers/platform/goldfish/goldfish_pipe_v2.c
@@ -948,7 +948,8 @@ static int goldfish_pipe_dma_alloc_locked(struct goldfish_pipe *pipe)
 				dma->dma_size,
 				&dma->phys_begin,
 				GFP_KERNEL);
-	return -ENOMEM;
+	if (!dma->dma_vaddr)
+		return -ENOMEM;
 
 	dma->phys_end = dma->phys_begin + dma->dma_size;
 	pipe->dev->dma_alloc_total += dma->dma_size;

From 57ba3d2d499b91dda28c781d248a45fe24cfacbe Mon Sep 17 00:00:00 2001
From: Roman Kiryanov <rkir@google.com>
Date: Mon, 4 Jun 2018 18:25:35 -0700
Subject: [PATCH 0110/1852] goldfish: pipe: ANDROID: address must be written as
 __pa(x), not x

The previous change missed the __pa transformation applied to the address before passing it further. The value also has to be written from the high part first.

Bug: 72717639
Change-Id: Id0756ca733f26ced1d74179764116db05ec47bea
Signed-off-by: Roman Kiryanov <rkir@google.com>
---
 drivers/platform/goldfish/goldfish_pipe_v2.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/goldfish/goldfish_pipe_v2.c b/drivers/platform/goldfish/goldfish_pipe_v2.c
index 60ab13a24e7df..957fa907beb34 100644
--- a/drivers/platform/goldfish/goldfish_pipe_v2.c
+++ b/drivers/platform/goldfish/goldfish_pipe_v2.c
@@ -1150,6 +1150,15 @@ static struct miscdevice goldfish_pipe_miscdev = {
 	.fops = &goldfish_pipe_fops,
 };
 
+
+static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth)
+{
+	const unsigned long paddr = __pa(addr);
+
+	writel(paddr >> 32, porth);
+	writel((u32)paddr, portl);
+}
+
 static int goldfish_pipe_device_init_v2(struct platform_device *pdev)
 {
 	struct goldfish_pipe_dev *dev = &goldfish_pipe_dev;
@@ -1193,14 +1202,14 @@ static int goldfish_pipe_device_init_v2(struct platform_device *pdev)
 	dev->buffers = (struct goldfish_pipe_dev_buffers *)page;
 
 	/* Send the buffer addresses to the host */
-	gf_write_ptr(&dev->buffers->signalled_pipe_buffers,
+	write_pa_addr(&dev->buffers->signalled_pipe_buffers,
 		dev->base + PIPE_REG_SIGNAL_BUFFER,
 		dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
 
 	writel((u32)MAX_SIGNALLED_PIPES,
 		dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
 
-	gf_write_ptr(&dev->buffers->open_command_params,
+	write_pa_addr(&dev->buffers->open_command_params,
 		dev->base + PIPE_REG_OPEN_BUFFER,
 		dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
 

From db6012fdf1904b2a52f94ab38ee65c92b627e8b6 Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim <jaegeuk@kernel.org>
Date: Thu, 31 May 2018 10:20:48 -0700
Subject: [PATCH 0111/1852] FROMLIST: f2fs: run fstrim asynchronously if
 runtime discard is on

Cherry-picked from:
        origin/upstream-f2fs-stable-linux-4.4.y

We don't need to wait for whole bunch of discard candidates in fstrim, since
runtime discard will issue them in idle time.

Change-Id: I32602711842d603cca030765eab49b337789e8ad
Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
---
 fs/f2fs/segment.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 478a4504ba9a8..a02d5c1a7ed2f 100644
--- a/fs/f2fs/segment.c
+++ b/fs/f2fs/segment.c
@@ -2519,9 +2519,18 @@ int f2fs_trim_fs(struct f2fs_sb_info *sbi, struct fstrim_range *range)
 
 	__init_discard_policy(sbi, &dpolicy, DPOLICY_FSTRIM, cpc.trim_minlen);
 	__issue_discard_cmd_range(sbi, &dpolicy, start_block, end_block);
-	trimmed = __wait_discard_cmd_range(sbi, &dpolicy,
+
+	/*
+	 * We filed discard candidates, but actually we don't need to wait for
+	 * all of them, since they'll be issued in idle time along with runtime
+	 * discard option. User configuration looks like using runtime discard
+	 * or periodic fstrim instead of it.
+	 */
+	if (!test_opt(sbi, DISCARD)) {
+		trimmed = __wait_discard_cmd_range(sbi, &dpolicy,
 					start_block, end_block);
-	range->len = F2FS_BLK_TO_BYTES(trimmed);
+		range->len = F2FS_BLK_TO_BYTES(trimmed);
+	}
 out:
 	return err;
 }

From f437210375d45c79fb0cc65d196dc5647112bb41 Mon Sep 17 00:00:00 2001
From: Ingo Molnar <mingo@elte.hu>
Date: Wed, 2 May 2018 13:30:57 +0200
Subject: [PATCH 0112/1852] 8139too: Use disable_irq_nosync() in
 rtl8139_poll_controller()

[ Upstream commit af3e0fcf78879f718c5f73df0814951bd7057d34 ]

Use disable_irq_nosync() instead of disable_irq() as this might be
called in atomic context with netpoll.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/realtek/8139too.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/realtek/8139too.c b/drivers/net/ethernet/realtek/8139too.c
index ef668d300800c..d987d571fdd62 100644
--- a/drivers/net/ethernet/realtek/8139too.c
+++ b/drivers/net/ethernet/realtek/8139too.c
@@ -2229,7 +2229,7 @@ static void rtl8139_poll_controller(struct net_device *dev)
 	struct rtl8139_private *tp = netdev_priv(dev);
 	const int irq = tp->pci_dev->irq;
 
-	disable_irq(irq);
+	disable_irq_nosync(irq);
 	rtl8139_interrupt(irq, dev);
 	enable_irq(irq);
 }

From dd45168886f20a552654ec85fc5f6e9fe114537d Mon Sep 17 00:00:00 2001
From: Hangbin Liu <liuhangbin@gmail.com>
Date: Fri, 27 Apr 2018 20:59:24 +0800
Subject: [PATCH 0113/1852] bridge: check iface upper dev when setting master
 via ioctl

[ Upstream commit e8238fc2bd7b4c3c7554fa2df067e796610212fc ]

When we set a bond slave's master to bridge via ioctl, we only check
the IFF_BRIDGE_PORT flag. Although we will find the slave's real master
at netdev_master_upper_dev_link() later, it already does some settings
and allocates some resources. It would be better to return as early
as possible.

v1 -> v2:
use netdev_master_upper_dev_get() instead of netdev_has_any_upper_dev()
to check if we have a master, because not all upper devs are masters,
e.g. vlan device.

Reported-by: syzbot+de73361ee4971b6e6f75@syzkaller.appspotmail.com
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
Acked-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/br_if.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c
index ec02f5869a780..3400b1e476688 100644
--- a/net/bridge/br_if.c
+++ b/net/bridge/br_if.c
@@ -456,8 +456,8 @@ int br_add_if(struct net_bridge *br, struct net_device *dev)
 	if (dev->netdev_ops->ndo_start_xmit == br_dev_xmit)
 		return -ELOOP;
 
-	/* Device is already being bridged */
-	if (br_port_exists(dev))
+	/* Device has master upper dev */
+	if (netdev_master_upper_dev_get(dev))
 		return -EBUSY;
 
 	/* No bridging devices that dislike that (e.g. wireless) */

From 045d733307cecd055ad2a4cce6c258791a96273a Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Thu, 3 May 2018 09:39:20 -0700
Subject: [PATCH 0114/1852] dccp: fix tasklet usage

[ Upstream commit a8d7aa17bbc970971ccdf71988ea19230ab368b1 ]

syzbot reported a crash in tasklet_action_common() caused by dccp.

dccp needs to make sure socket wont disappear before tasklet handler
has completed.

This patch takes a reference on the socket when arming the tasklet,
and moves the sock_put() from dccp_write_xmit_timer() to dccp_write_xmitlet()

kernel BUG at kernel/softirq.c:514!
invalid opcode: 0000 [#1] SMP KASAN
Dumping ftrace buffer:
   (ftrace buffer empty)
Modules linked in:
CPU: 1 PID: 17 Comm: ksoftirqd/1 Not tainted 4.17.0-rc3+ #30
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:tasklet_action_common.isra.19+0x6db/0x700 kernel/softirq.c:515
RSP: 0018:ffff8801d9b3faf8 EFLAGS: 00010246
dccp_close: ABORT with 65423 bytes unread
RAX: 1ffff1003b367f6b RBX: ffff8801daf1f3f0 RCX: 0000000000000000
RDX: ffff8801cf895498 RSI: 0000000000000004 RDI: 0000000000000000
RBP: ffff8801d9b3fc40 R08: ffffed0039f12a95 R09: ffffed0039f12a94
dccp_close: ABORT with 65423 bytes unread
R10: ffffed0039f12a94 R11: ffff8801cf8954a3 R12: 0000000000000000
R13: ffff8801d9b3fc18 R14: dffffc0000000000 R15: ffff8801cf895490
FS:  0000000000000000(0000) GS:ffff8801daf00000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000001b2bc28000 CR3: 00000001a08a9000 CR4: 00000000001406e0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
 tasklet_action+0x1d/0x20 kernel/softirq.c:533
 __do_softirq+0x2e0/0xaf5 kernel/softirq.c:285
dccp_close: ABORT with 65423 bytes unread
 run_ksoftirqd+0x86/0x100 kernel/softirq.c:646
 smpboot_thread_fn+0x417/0x870 kernel/smpboot.c:164
 kthread+0x345/0x410 kernel/kthread.c:238
 ret_from_fork+0x3a/0x50 arch/x86/entry/entry_64.S:412
Code: 48 8b 85 e8 fe ff ff 48 8b 95 f0 fe ff ff e9 94 fb ff ff 48 89 95 f0 fe ff ff e8 81 53 6e 00 48 8b 95 f0 fe ff ff e9 62 fb ff ff <0f> 0b 48 89 cf 48 89 8d e8 fe ff ff e8 64 53 6e 00 48 8b 8d e8
RIP: tasklet_action_common.isra.19+0x6db/0x700 kernel/softirq.c:515 RSP: ffff8801d9b3faf8

Fixes: dc841e30eaea ("dccp: Extend CCID packet dequeueing interface")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: Gerrit Renker <gerrit@erg.abdn.ac.uk>
Cc: dccp@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dccp/ccids/ccid2.c | 14 ++++++++++++--
 net/dccp/timer.c       |  2 +-
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/net/dccp/ccids/ccid2.c b/net/dccp/ccids/ccid2.c
index 7753681195c15..86a2ed0fb219c 100644
--- a/net/dccp/ccids/ccid2.c
+++ b/net/dccp/ccids/ccid2.c
@@ -126,6 +126,16 @@ static void ccid2_change_l_seq_window(struct sock *sk, u64 val)
 						  DCCPF_SEQ_WMAX));
 }
 
+static void dccp_tasklet_schedule(struct sock *sk)
+{
+	struct tasklet_struct *t = &dccp_sk(sk)->dccps_xmitlet;
+
+	if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) {
+		sock_hold(sk);
+		__tasklet_schedule(t);
+	}
+}
+
 static void ccid2_hc_tx_rto_expire(unsigned long data)
 {
 	struct sock *sk = (struct sock *)data;
@@ -166,7 +176,7 @@ static void ccid2_hc_tx_rto_expire(unsigned long data)
 
 	/* if we were blocked before, we may now send cwnd=1 packet */
 	if (sender_was_blocked)
-		tasklet_schedule(&dccp_sk(sk)->dccps_xmitlet);
+		dccp_tasklet_schedule(sk);
 	/* restart backed-off timer */
 	sk_reset_timer(sk, &hc->tx_rtotimer, jiffies + hc->tx_rto);
 out:
@@ -706,7 +716,7 @@ static void ccid2_hc_tx_packet_recv(struct sock *sk, struct sk_buff *skb)
 done:
 	/* check if incoming Acks allow pending packets to be sent */
 	if (sender_was_blocked && !ccid2_cwnd_network_limited(hc))
-		tasklet_schedule(&dccp_sk(sk)->dccps_xmitlet);
+		dccp_tasklet_schedule(sk);
 	dccp_ackvec_parsed_cleanup(&hc->tx_av_chunks);
 }
 
diff --git a/net/dccp/timer.c b/net/dccp/timer.c
index 3ef7acef3ce8c..aa7c7dad7f968 100644
--- a/net/dccp/timer.c
+++ b/net/dccp/timer.c
@@ -230,12 +230,12 @@ static void dccp_write_xmitlet(unsigned long data)
 	else
 		dccp_write_xmit(sk);
 	bh_unlock_sock(sk);
+	sock_put(sk);
 }
 
 static void dccp_write_xmit_timer(unsigned long data)
 {
 	dccp_write_xmitlet(data);
-	sock_put((struct sock *)data);
 }
 
 void dccp_init_xmit_timers(struct sock *sk)

From 789e0fe701dc46936815d52b77ba8c8ef810930b Mon Sep 17 00:00:00 2001
From: Andrey Ignatov <rdna@fb.com>
Date: Thu, 10 May 2018 10:59:34 -0700
Subject: [PATCH 0115/1852] ipv4: fix memory leaks in udp_sendmsg,
 ping_v4_sendmsg

[ Upstream commit 1b97013bfb11d66f041de691de6f0fec748ce016 ]

Fix more memory leaks in ip_cmsg_send() callers. Part of them were fixed
earlier in 919483096bfe.

* udp_sendmsg one was there since the beginning when linux sources were
  first added to git;
* ping_v4_sendmsg one was copy/pasted in c319b4d76b9e.

Whenever return happens in udp_sendmsg() or ping_v4_sendmsg() IP options
have to be freed if they were allocated previously.

Add label so that future callers (if any) can use it instead of kfree()
before return that is easy to forget.

Fixes: c319b4d76b9e (net: ipv4: add IPPROTO_ICMP socket kind)
Signed-off-by: Andrey Ignatov <rdna@fb.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ping.c | 7 +++++--
 net/ipv4/udp.c  | 7 +++++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index a989aba861e0b..15ce4bb45ce69 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -777,8 +777,10 @@ static int ping_v4_sendmsg(struct sock *sk, struct msghdr *msg, size_t len)
 	ipc.addr = faddr = daddr;
 
 	if (ipc.opt && ipc.opt->opt.srr) {
-		if (!daddr)
-			return -EINVAL;
+		if (!daddr) {
+			err = -EINVAL;
+			goto out_free;
+		}
 		faddr = ipc.opt->opt.faddr;
 	}
 	tos = get_rttos(&ipc, inet);
@@ -844,6 +846,7 @@ static int ping_v4_sendmsg(struct sock *sk, struct msghdr *msg, size_t len)
 
 out:
 	ip_rt_put(rt);
+out_free:
 	if (free)
 		kfree(ipc.opt);
 	if (!err) {
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index 96cea662e05bd..4c61b3ecfb6e9 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -991,8 +991,10 @@ int udp_sendmsg(struct sock *sk, struct msghdr *msg, size_t len)
 	ipc.addr = faddr = daddr;
 
 	if (ipc.opt && ipc.opt->opt.srr) {
-		if (!daddr)
-			return -EINVAL;
+		if (!daddr) {
+			err = -EINVAL;
+			goto out_free;
+		}
 		faddr = ipc.opt->opt.faddr;
 		connected = 0;
 	}
@@ -1106,6 +1108,7 @@ int udp_sendmsg(struct sock *sk, struct msghdr *msg, size_t len)
 
 out:
 	ip_rt_put(rt);
+out_free:
 	if (free)
 		kfree(ipc.opt);
 	if (!err)

From 549bf6b7f1638904a37d6d936ebd951ccac2bea6 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 7 May 2018 09:02:25 -0700
Subject: [PATCH 0116/1852] llc: better deal with too small mtu

[ Upstream commit 2c5d5b13c6eb79f5677e206b8aad59b3a2097f60 ]

syzbot loves to set very small mtu on devices, since it brings joy.
We must make llc_ui_sendmsg() fool proof.

usercopy: Kernel memory overwrite attempt detected to wrapped address (offset 0, size 18446612139802320068)!

kernel BUG at mm/usercopy.c:100!
invalid opcode: 0000 [#1] SMP KASAN
Dumping ftrace buffer:
   (ftrace buffer empty)
Modules linked in:
CPU: 0 PID: 17464 Comm: syz-executor1 Not tainted 4.17.0-rc3+ #36
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:usercopy_abort+0xbb/0xbd mm/usercopy.c:88
RSP: 0018:ffff8801868bf800 EFLAGS: 00010282
RAX: 000000000000006c RBX: ffffffff87d2fb00 RCX: 0000000000000000
RDX: 000000000000006c RSI: ffffffff81610731 RDI: ffffed0030d17ef6
RBP: ffff8801868bf858 R08: ffff88018daa4200 R09: ffffed003b5c4fb0
R10: ffffed003b5c4fb0 R11: ffff8801dae27d87 R12: ffffffff87d2f8e0
R13: ffffffff87d2f7a0 R14: ffffffff87d2f7a0 R15: ffffffff87d2f7a0
FS:  00007f56a14ac700(0000) GS:ffff8801dae00000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000001b2bc21000 CR3: 00000001abeb1000 CR4: 00000000001426f0
DR0: 0000000020000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000030602
Call Trace:
 check_bogus_address mm/usercopy.c:153 [inline]
 __check_object_size+0x5d9/0x5d9 mm/usercopy.c:256
 check_object_size include/linux/thread_info.h:108 [inline]
 check_copy_size include/linux/thread_info.h:139 [inline]
 copy_from_iter_full include/linux/uio.h:121 [inline]
 memcpy_from_msg include/linux/skbuff.h:3305 [inline]
 llc_ui_sendmsg+0x4b1/0x1530 net/llc/af_llc.c:941
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg+0xd5/0x120 net/socket.c:639
 __sys_sendto+0x3d7/0x670 net/socket.c:1789
 __do_sys_sendto net/socket.c:1801 [inline]
 __se_sys_sendto net/socket.c:1797 [inline]
 __x64_sys_sendto+0xe1/0x1a0 net/socket.c:1797
 do_syscall_64+0x1b1/0x800 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x49/0xbe
RIP: 0033:0x455979
RSP: 002b:00007f56a14abc68 EFLAGS: 00000246 ORIG_RAX: 000000000000002c
RAX: ffffffffffffffda RBX: 00007f56a14ac6d4 RCX: 0000000000455979
RDX: 0000000000000000 RSI: 0000000020000000 RDI: 0000000000000018
RBP: 000000000072bea0 R08: 00000000200012c0 R09: 0000000000000010
R10: 0000000000000000 R11: 0000000000000246 R12: 00000000ffffffff
R13: 0000000000000548 R14: 00000000006fbf60 R15: 0000000000000000
Code: 55 c0 e8 c0 55 bb ff ff 75 c8 48 8b 55 c0 4d 89 f9 ff 75 d0 4d 89 e8 48 89 d9 4c 89 e6 41 56 48 c7 c7 80 fa d2 87 e8 a0 0b a3 ff <0f> 0b e8 95 55 bb ff e8 c0 a8 f7 ff 8b 95 14 ff ff ff 4d 89 e8
RIP: usercopy_abort+0xbb/0xbd mm/usercopy.c:88 RSP: ffff8801868bf800

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/llc/af_llc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c
index 09f2f3471ad6f..83e8a295c8062 100644
--- a/net/llc/af_llc.c
+++ b/net/llc/af_llc.c
@@ -926,6 +926,9 @@ static int llc_ui_sendmsg(struct socket *sock, struct msghdr *msg, size_t len)
 	if (size > llc->dev->mtu)
 		size = llc->dev->mtu;
 	copied = size - hdrlen;
+	rc = -EINVAL;
+	if (copied < 0)
+		goto release;
 	release_sock(sk);
 	skb = sock_alloc_send_skb(sk, size, noblock, &rc);
 	lock_sock(sk);

From cc55d33ef515fcc05a5e11226895e140372c2eef Mon Sep 17 00:00:00 2001
From: Rob Taglang <rob@taglang.io>
Date: Thu, 3 May 2018 17:13:06 -0400
Subject: [PATCH 0117/1852] net: ethernet: sun: niu set correct packet size in
 skb

[ Upstream commit 14224923c3600bae2ac4dcae3bf0c3d4dc2812be ]

Currently, skb->len and skb->data_len are set to the page size, not
the packet size. This causes the frame check sequence to not be
located at the "end" of the packet resulting in ethernet frame check
errors. The driver does work currently, but stricter kernel facing
networking solutions like OpenVSwitch will drop these packets as
invalid.

These changes set the packet size correctly so that these errors no
longer occur. The length does not include the frame check sequence, so
that subtraction was removed.

Tested on Oracle/SUN Multithreaded 10-Gigabit Ethernet Network
Controller [108e:abcd] and validated in wireshark.

Signed-off-by: Rob Taglang <rob@taglang.io>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/sun/niu.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c
index ab6051a43134f..ccebf89aa1e43 100644
--- a/drivers/net/ethernet/sun/niu.c
+++ b/drivers/net/ethernet/sun/niu.c
@@ -3442,7 +3442,7 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np,
 
 		len = (val & RCR_ENTRY_L2_LEN) >>
 			RCR_ENTRY_L2_LEN_SHIFT;
-		len -= ETH_FCS_LEN;
+		append_size = len + ETH_HLEN + ETH_FCS_LEN;
 
 		addr = (val & RCR_ENTRY_PKT_BUF_ADDR) <<
 			RCR_ENTRY_PKT_BUF_ADDR_SHIFT;
@@ -3452,7 +3452,6 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np,
 					 RCR_ENTRY_PKTBUFSZ_SHIFT];
 
 		off = addr & ~PAGE_MASK;
-		append_size = rcr_size;
 		if (num_rcr == 1) {
 			int ptype;
 
@@ -3465,7 +3464,7 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np,
 			else
 				skb_checksum_none_assert(skb);
 		} else if (!(val & RCR_ENTRY_MULTI))
-			append_size = len - skb->len;
+			append_size = append_size - skb->len;
 
 		niu_rx_skb_append(skb, page, off, append_size, rcr_size);
 		if ((page->index + rp->rbr_block_size) - rcr_size == addr) {

From d1fea0c8ad9aba91b28576e20db8afefa58fae87 Mon Sep 17 00:00:00 2001
From: Moshe Shemesh <moshe@mellanox.com>
Date: Wed, 9 May 2018 18:35:13 +0300
Subject: [PATCH 0118/1852] net/mlx4_en: Verify coalescing parameters are in
 range

[ Upstream commit 6ad4e91c6d796b38a7f0e724db1de28eeb122bad ]

Add check of coalescing parameters received through ethtool are within
range of values supported by the HW.
Driver gets the coalescing rx/tx-usecs and rx/tx-frames as set by the
users through ethtool. The ethtool support up to 32 bit value for each.
However, mlx4 modify cq limits the coalescing time parameter and
coalescing frames parameters to 16 bits.
Return out of range error if user tries to set these parameters to
higher values.
Change type of sample-interval and adaptive_rx_coal parameters in mlx4
driver to u32 as the ethtool holds them as u32 and these parameters are
not limited due to mlx4 HW.

Fixes: c27a02cd94d6 ('mlx4_en: Add driver for Mellanox ConnectX 10GbE NIC')
Signed-off-by: Moshe Shemesh <moshe@mellanox.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 16 ++++++++++++++++
 drivers/net/ethernet/mellanox/mlx4/mlx4_en.h    |  7 +++++--
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
index ddb5541882f5b..bcfac000199e7 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
@@ -967,6 +967,22 @@ static int mlx4_en_set_coalesce(struct net_device *dev,
 	if (!coal->tx_max_coalesced_frames_irq)
 		return -EINVAL;
 
+	if (coal->tx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
+	    coal->rx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
+	    coal->rx_coalesce_usecs_low > MLX4_EN_MAX_COAL_TIME ||
+	    coal->rx_coalesce_usecs_high > MLX4_EN_MAX_COAL_TIME) {
+		netdev_info(dev, "%s: maximum coalesce time supported is %d usecs\n",
+			    __func__, MLX4_EN_MAX_COAL_TIME);
+		return -ERANGE;
+	}
+
+	if (coal->tx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS ||
+	    coal->rx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS) {
+		netdev_info(dev, "%s: maximum coalesced frames supported is %d\n",
+			    __func__, MLX4_EN_MAX_COAL_PKTS);
+		return -ERANGE;
+	}
+
 	priv->rx_frames = (coal->rx_max_coalesced_frames ==
 			   MLX4_EN_AUTO_CONF) ?
 				MLX4_EN_RX_COAL_TARGET :
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 10aa6544cf4db..607daaffae986 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -140,6 +140,9 @@ enum {
 #define MLX4_EN_TX_COAL_PKTS	16
 #define MLX4_EN_TX_COAL_TIME	0x10
 
+#define MLX4_EN_MAX_COAL_PKTS	U16_MAX
+#define MLX4_EN_MAX_COAL_TIME	U16_MAX
+
 #define MLX4_EN_RX_RATE_LOW		400000
 #define MLX4_EN_RX_COAL_TIME_LOW	0
 #define MLX4_EN_RX_RATE_HIGH		450000
@@ -518,8 +521,8 @@ struct mlx4_en_priv {
 	u16 rx_usecs_low;
 	u32 pkt_rate_high;
 	u16 rx_usecs_high;
-	u16 sample_interval;
-	u16 adaptive_rx_coal;
+	u32 sample_interval;
+	u32 adaptive_rx_coal;
 	u32 msg_enable;
 	u32 loopback_ok;
 	u32 validate_loopback;

From 8cfb68a3047464239a99c14be95a536d536606dc Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Wed, 2 May 2018 10:03:30 -0700
Subject: [PATCH 0119/1852] net_sched: fq: take care of throttled flows before
 reuse

[ Upstream commit 7df40c2673a1307c3260aab6f9d4b9bf97ca8fd7 ]

Normally, a socket can not be freed/reused unless all its TX packets
left qdisc and were TX-completed. However connect(AF_UNSPEC) allows
this to happen.

With commit fc59d5bdf1e3 ("pkt_sched: fq: clear time_next_packet for
reused flows") we cleared f->time_next_packet but took no special
action if the flow was still in the throttled rb-tree.

Since f->time_next_packet is the key used in the rb-tree searches,
blindly clearing it might break rb-tree integrity. We need to make
sure the flow is no longer in the rb-tree to avoid this problem.

Fixes: fc59d5bdf1e3 ("pkt_sched: fq: clear time_next_packet for reused flows")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sched/sch_fq.c | 37 +++++++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/net/sched/sch_fq.c b/net/sched/sch_fq.c
index 3c6a47d66a047..117ed90c5f216 100644
--- a/net/sched/sch_fq.c
+++ b/net/sched/sch_fq.c
@@ -126,6 +126,28 @@ static bool fq_flow_is_detached(const struct fq_flow *f)
 	return f->next == &detached;
 }
 
+static bool fq_flow_is_throttled(const struct fq_flow *f)
+{
+	return f->next == &throttled;
+}
+
+static void fq_flow_add_tail(struct fq_flow_head *head, struct fq_flow *flow)
+{
+	if (head->first)
+		head->last->next = flow;
+	else
+		head->first = flow;
+	head->last = flow;
+	flow->next = NULL;
+}
+
+static void fq_flow_unset_throttled(struct fq_sched_data *q, struct fq_flow *f)
+{
+	rb_erase(&f->rate_node, &q->delayed);
+	q->throttled_flows--;
+	fq_flow_add_tail(&q->old_flows, f);
+}
+
 static void fq_flow_set_throttled(struct fq_sched_data *q, struct fq_flow *f)
 {
 	struct rb_node **p = &q->delayed.rb_node, *parent = NULL;
@@ -153,15 +175,6 @@ static void fq_flow_set_throttled(struct fq_sched_data *q, struct fq_flow *f)
 
 static struct kmem_cache *fq_flow_cachep __read_mostly;
 
-static void fq_flow_add_tail(struct fq_flow_head *head, struct fq_flow *flow)
-{
-	if (head->first)
-		head->last->next = flow;
-	else
-		head->first = flow;
-	head->last = flow;
-	flow->next = NULL;
-}
 
 /* limit number of collected flows per round */
 #define FQ_GC_MAX 8
@@ -265,6 +278,8 @@ static struct fq_flow *fq_classify(struct sk_buff *skb, struct fq_sched_data *q)
 				     f->socket_hash != sk->sk_hash)) {
 				f->credit = q->initial_quantum;
 				f->socket_hash = sk->sk_hash;
+				if (fq_flow_is_throttled(f))
+					fq_flow_unset_throttled(q, f);
 				f->time_next_packet = 0ULL;
 			}
 			return f;
@@ -419,9 +434,7 @@ static void fq_check_throttled(struct fq_sched_data *q, u64 now)
 			q->time_next_delayed_flow = f->time_next_packet;
 			break;
 		}
-		rb_erase(p, &q->delayed);
-		q->throttled_flows--;
-		fq_flow_add_tail(&q->old_flows, f);
+		fq_flow_unset_throttled(q, f);
 	}
 }
 

From 5b9080639dd4eb62517e6f8c0c5c6d7c166aaeda Mon Sep 17 00:00:00 2001
From: Lance Richardson <lance.richardson.net@gmail.com>
Date: Wed, 25 Apr 2018 10:21:54 -0400
Subject: [PATCH 0120/1852] net: support compat 64-bit time in {s,g}etsockopt

[ Upstream commit 988bf7243e03ef69238381594e0334a79cef74a6 ]

For the x32 ABI, struct timeval has two 64-bit fields. However
the kernel currently interprets the user-space values used for
the SO_RCVTIMEO and SO_SNDTIMEO socket options as having a pair
of 32-bit fields.

When the seconds portion of the requested timeout is less than 2**32,
the seconds portion of the effective timeout is correct but the
microseconds portion is zero.  When the seconds portion of the
requested timeout is zero and the microseconds portion is non-zero,
the kernel interprets the timeout as zero (never timeout).

Fix by using 64-bit time for SO_RCVTIMEO/SO_SNDTIMEO as required
for the ABI.

The code included below demonstrates the problem.

Results before patch:
    $ gcc -m64 -Wall -O2 -o socktmo socktmo.c && ./socktmo
    recv time: 2.008181 seconds
    send time: 2.015985 seconds

    $ gcc -m32 -Wall -O2 -o socktmo socktmo.c && ./socktmo
    recv time: 2.016763 seconds
    send time: 2.016062 seconds

    $ gcc -mx32 -Wall -O2 -o socktmo socktmo.c && ./socktmo
    recv time: 1.007239 seconds
    send time: 1.023890 seconds

Results after patch:
    $ gcc -m64 -O2 -Wall -o socktmo socktmo.c && ./socktmo
    recv time: 2.010062 seconds
    send time: 2.015836 seconds

    $ gcc -m32 -O2 -Wall -o socktmo socktmo.c && ./socktmo
    recv time: 2.013974 seconds
    send time: 2.015981 seconds

    $ gcc -mx32 -O2 -Wall -o socktmo socktmo.c && ./socktmo
    recv time: 2.030257 seconds
    send time: 2.013383 seconds

 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/socket.h>
 #include <sys/types.h>
 #include <sys/time.h>

 void checkrc(char *str, int rc)
 {
         if (rc >= 0)
                 return;

         perror(str);
         exit(1);
 }

 static char buf[1024];
 int main(int argc, char **argv)
 {
         int rc;
         int socks[2];
         struct timeval tv;
         struct timeval start, end, delta;

         rc = socketpair(AF_UNIX, SOCK_STREAM, 0, socks);
         checkrc("socketpair", rc);

         /* set timeout to 1.999999 seconds */
         tv.tv_sec = 1;
         tv.tv_usec = 999999;
         rc = setsockopt(socks[0], SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof tv);
         rc = setsockopt(socks[0], SOL_SOCKET, SO_SNDTIMEO, &tv, sizeof tv);
         checkrc("setsockopt", rc);

         /* measure actual receive timeout */
         gettimeofday(&start, NULL);
         rc = recv(socks[0], buf, sizeof buf, 0);
         gettimeofday(&end, NULL);
         timersub(&end, &start, &delta);

         printf("recv time: %ld.%06ld seconds\n",
                (long)delta.tv_sec, (long)delta.tv_usec);

         /* fill send buffer */
         do {
                 rc = send(socks[0], buf, sizeof buf, 0);
         } while (rc > 0);

         /* measure actual send timeout */
         gettimeofday(&start, NULL);
         rc = send(socks[0], buf, sizeof buf, 0);
         gettimeofday(&end, NULL);
         timersub(&end, &start, &delta);

         printf("send time: %ld.%06ld seconds\n",
                (long)delta.tv_sec, (long)delta.tv_usec);
         exit(0);
 }

Fixes: 515c7af85ed9 ("x32: Use compat shims for {g,s}etsockopt")
Reported-by: Gopal RajagopalSai <gopalsr83@gmail.com>
Signed-off-by: Lance Richardson <lance.richardson.net@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/compat.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/compat.c b/net/compat.c
index 0ccf3ecf6bbb1..17e97b106458c 100644
--- a/net/compat.c
+++ b/net/compat.c
@@ -358,7 +358,8 @@ static int compat_sock_setsockopt(struct socket *sock, int level, int optname,
 	if (optname == SO_ATTACH_FILTER)
 		return do_set_attach_filter(sock, level, optname,
 					    optval, optlen);
-	if (optname == SO_RCVTIMEO || optname == SO_SNDTIMEO)
+	if (!COMPAT_USE_64BIT_TIME &&
+	    (optname == SO_RCVTIMEO || optname == SO_SNDTIMEO))
 		return do_set_sock_timeout(sock, level, optname, optval, optlen);
 
 	return sock_setsockopt(sock, level, optname, optval, optlen);
@@ -423,7 +424,8 @@ static int do_get_sock_timeout(struct socket *sock, int level, int optname,
 static int compat_sock_getsockopt(struct socket *sock, int level, int optname,
 				char __user *optval, int __user *optlen)
 {
-	if (optname == SO_RCVTIMEO || optname == SO_SNDTIMEO)
+	if (!COMPAT_USE_64BIT_TIME &&
+	    (optname == SO_RCVTIMEO || optname == SO_SNDTIMEO))
 		return do_get_sock_timeout(sock, level, optname, optval, optlen);
 	return sock_getsockopt(sock, level, optname, optval, optlen);
 }

From 4ba7e6137ebf01bbdfd14bfae176feaf898e7858 Mon Sep 17 00:00:00 2001
From: Stefano Brivio <sbrivio@redhat.com>
Date: Thu, 3 May 2018 18:13:25 +0200
Subject: [PATCH 0121/1852] openvswitch: Don't swap table in nlattr_set() after
 OVS_ATTR_NESTED is found

[ Upstream commit 72f17baf2352ded6a1d3f4bb2d15da8c678cd2cb ]

If an OVS_ATTR_NESTED attribute type is found while walking
through netlink attributes, we call nlattr_set() recursively
passing the length table for the following nested attributes, if
different from the current one.

However, once we're done with those sub-nested attributes, we
should continue walking through attributes using the current
table, instead of using the one related to the sub-nested
attributes.

For example, given this sequence:

1  OVS_KEY_ATTR_PRIORITY
2  OVS_KEY_ATTR_TUNNEL
3	OVS_TUNNEL_KEY_ATTR_ID
4	OVS_TUNNEL_KEY_ATTR_IPV4_SRC
5	OVS_TUNNEL_KEY_ATTR_IPV4_DST
6	OVS_TUNNEL_KEY_ATTR_TTL
7	OVS_TUNNEL_KEY_ATTR_TP_SRC
8	OVS_TUNNEL_KEY_ATTR_TP_DST
9  OVS_KEY_ATTR_IN_PORT
10 OVS_KEY_ATTR_SKB_MARK
11 OVS_KEY_ATTR_MPLS

we switch to the 'ovs_tunnel_key_lens' table on attribute #3,
and we don't switch back to 'ovs_key_lens' while setting
attributes #9 to #11 in the sequence. As OVS_KEY_ATTR_MPLS
evaluates to 21, and the array size of 'ovs_tunnel_key_lens' is
15, we also get this kind of KASan splat while accessing the
wrong table:

[ 7654.586496] ==================================================================
[ 7654.594573] BUG: KASAN: global-out-of-bounds in nlattr_set+0x164/0xde9 [openvswitch]
[ 7654.603214] Read of size 4 at addr ffffffffc169ecf0 by task handler29/87430
[ 7654.610983]
[ 7654.612644] CPU: 21 PID: 87430 Comm: handler29 Kdump: loaded Not tainted 3.10.0-866.el7.test.x86_64 #1
[ 7654.623030] Hardware name: Dell Inc. PowerEdge R730/072T6D, BIOS 2.1.7 06/16/2016
[ 7654.631379] Call Trace:
[ 7654.634108]  [<ffffffffb65a7c50>] dump_stack+0x19/0x1b
[ 7654.639843]  [<ffffffffb53ff373>] print_address_description+0x33/0x290
[ 7654.647129]  [<ffffffffc169b37b>] ? nlattr_set+0x164/0xde9 [openvswitch]
[ 7654.654607]  [<ffffffffb53ff812>] kasan_report.part.3+0x242/0x330
[ 7654.661406]  [<ffffffffb53ff9b4>] __asan_report_load4_noabort+0x34/0x40
[ 7654.668789]  [<ffffffffc169b37b>] nlattr_set+0x164/0xde9 [openvswitch]
[ 7654.676076]  [<ffffffffc167ef68>] ovs_nla_get_match+0x10c8/0x1900 [openvswitch]
[ 7654.684234]  [<ffffffffb61e9cc8>] ? genl_rcv+0x28/0x40
[ 7654.689968]  [<ffffffffb61e7733>] ? netlink_unicast+0x3f3/0x590
[ 7654.696574]  [<ffffffffc167dea0>] ? ovs_nla_put_tunnel_info+0xb0/0xb0 [openvswitch]
[ 7654.705122]  [<ffffffffb4f41b50>] ? unwind_get_return_address+0xb0/0xb0
[ 7654.712503]  [<ffffffffb65d9355>] ? system_call_fastpath+0x1c/0x21
[ 7654.719401]  [<ffffffffb4f41d79>] ? update_stack_state+0x229/0x370
[ 7654.726298]  [<ffffffffb4f41d79>] ? update_stack_state+0x229/0x370
[ 7654.733195]  [<ffffffffb53fe4b5>] ? kasan_unpoison_shadow+0x35/0x50
[ 7654.740187]  [<ffffffffb53fe62a>] ? kasan_kmalloc+0xaa/0xe0
[ 7654.746406]  [<ffffffffb53fec32>] ? kasan_slab_alloc+0x12/0x20
[ 7654.752914]  [<ffffffffb53fe711>] ? memset+0x31/0x40
[ 7654.758456]  [<ffffffffc165bf92>] ovs_flow_cmd_new+0x2b2/0xf00 [openvswitch]

[snip]

[ 7655.132484] The buggy address belongs to the variable:
[ 7655.138226]  ovs_tunnel_key_lens+0xf0/0xffffffffffffd400 [openvswitch]
[ 7655.145507]
[ 7655.147166] Memory state around the buggy address:
[ 7655.152514]  ffffffffc169eb80: 00 00 00 00 00 00 00 00 00 00 fa fa fa fa fa fa
[ 7655.160585]  ffffffffc169ec00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 7655.168644] >ffffffffc169ec80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fa fa
[ 7655.176701]                                                              ^
[ 7655.184372]  ffffffffc169ed00: fa fa fa fa 00 00 00 00 fa fa fa fa 00 00 00 05
[ 7655.192431]  ffffffffc169ed80: fa fa fa fa 00 00 00 00 00 00 00 00 00 00 00 00
[ 7655.200490] ==================================================================

Reported-by: Hangbin Liu <liuhangbin@gmail.com>
Fixes: 982b52700482 ("openvswitch: Fix mask generation for nested attributes.")
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Reviewed-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/openvswitch/flow_netlink.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/net/openvswitch/flow_netlink.c b/net/openvswitch/flow_netlink.c
index 21e4d339217ee..624c4719e4045 100644
--- a/net/openvswitch/flow_netlink.c
+++ b/net/openvswitch/flow_netlink.c
@@ -1141,13 +1141,10 @@ static void nlattr_set(struct nlattr *attr, u8 val,
 
 	/* The nlattr stream should already have been validated */
 	nla_for_each_nested(nla, attr, rem) {
-		if (tbl[nla_type(nla)].len == OVS_ATTR_NESTED) {
-			if (tbl[nla_type(nla)].next)
-				tbl = tbl[nla_type(nla)].next;
-			nlattr_set(nla, val, tbl);
-		} else {
+		if (tbl[nla_type(nla)].len == OVS_ATTR_NESTED)
+			nlattr_set(nla, val, tbl[nla_type(nla)].next ? : tbl);
+		else
 			memset(nla_data(nla), val, nla_len(nla));
-		}
 
 		if (nla_type(nla) == OVS_KEY_ATTR_CT_STATE)
 			*(u32 *)nla_data(nla) &= CT_SUPPORTED_MASK;

From 827a645a1f6e84af394d9f25cc8183abaca0a600 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
Date: Wed, 2 May 2018 22:22:54 +0200
Subject: [PATCH 0122/1852] qmi_wwan: do not steal interfaces from class
 drivers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 5697db4a696c41601a1d15c1922150b4dbf5726c ]

The USB_DEVICE_INTERFACE_NUMBER matching macro assumes that
the { vendorid, productid, interfacenumber } set uniquely
identifies one specific function.  This has proven to fail
for some configurable devices. One example is the Quectel
EM06/EP06 where the same interface number can be either
QMI or MBIM, without the device ID changing either.

Fix by requiring the vendor-specific class for interface number
based matching.  Functions of other classes can and should use
class based matching instead.

Fixes: 03304bcb5ec4 ("net: qmi_wwan: use fixed interface number matching")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/qmi_wwan.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index a6f0a8f516d6e..8aaa09b3c7533 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -855,6 +855,18 @@ static int qmi_wwan_probe(struct usb_interface *intf,
 		id->driver_info = (unsigned long)&qmi_wwan_info;
 	}
 
+	/* There are devices where the same interface number can be
+	 * configured as different functions. We should only bind to
+	 * vendor specific functions when matching on interface number
+	 */
+	if (id->match_flags & USB_DEVICE_ID_MATCH_INT_NUMBER &&
+	    desc->bInterfaceClass != USB_CLASS_VENDOR_SPEC) {
+		dev_dbg(&intf->dev,
+			"Rejecting interface number match for class %02x\n",
+			desc->bInterfaceClass);
+		return -ENODEV;
+	}
+
 	/* Quectel EC20 quirk where we've QMI on interface 4 instead of 0 */
 	if (quectel_ec20_detected(intf) && desc->bInterfaceNumber == 0) {
 		dev_dbg(&intf->dev, "Quectel EC20 quirk, skipping interface 0\n");

From cbae7a4169bbd1f2d5bafd055dcc5fa3c44f6e9e Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 7 May 2018 21:11:21 +0200
Subject: [PATCH 0123/1852] r8169: fix powering up RTL8168h

[ Upstream commit 3148dedfe79e422f448a10250d3e2cdf8b7ee617 ]

Since commit a92a08499b1f "r8169: improve runtime pm in general and
suspend unused ports" interfaces w/o link are runtime-suspended after
10s. On systems where drivers take longer to load this can lead to the
situation that the interface is runtime-suspended already when it's
initially brought up.
This shouldn't be a problem because rtl_open() resumes MAC/PHY.
However with at least one chip version the interface doesn't properly
come up, as reported here:
https://bugzilla.kernel.org/show_bug.cgi?id=199549

The vendor driver uses a delay to give certain chip versions some
time to resume before starting the PHY configuration. So let's do
the same. I don't know which chip versions may be affected,
therefore apply this delay always.

This patch was reported to fix the issue for RTL8168h.
I was able to reproduce the issue on an Asus H310I-Plus which also
uses a RTL8168h. Also in my case the patch fixed the issue.

Reported-by: Slava Kardakov <ojab@ojab.ru>
Tested-by: Slava Kardakov <ojab@ojab.ru>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/realtek/r8169.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index a82c89af71244..8b4069ea52ced 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -4832,6 +4832,9 @@ static void rtl_pll_power_down(struct rtl8169_private *tp)
 static void rtl_pll_power_up(struct rtl8169_private *tp)
 {
 	rtl_generic_op(tp, tp->pll_power_ops.up);
+
+	/* give MAC/PHY some time to resume */
+	msleep(20);
 }
 
 static void rtl_init_pll_power_ops(struct rtl8169_private *tp)

From 01b0d9583cefad410dcf4e18cdd85efb02fdd574 Mon Sep 17 00:00:00 2001
From: Xin Long <lucien.xin@gmail.com>
Date: Thu, 26 Apr 2018 14:13:57 +0800
Subject: [PATCH 0124/1852] sctp: handle two v4 addrs comparison in
 sctp_inet6_cmp_addr

[ Upstream commit d625329b06e46bd20baf9ee40847d11982569204 ]

Since sctp ipv6 socket also supports v4 addrs, it's possible to
compare two v4 addrs in pf v6 .cmp_addr, sctp_inet6_cmp_addr.

However after Commit 1071ec9d453a ("sctp: do not check port in
sctp_inet6_cmp_addr"), it no longer calls af1->cmp_addr, which
in this case is sctp_v4_cmp_addr, but calls __sctp_v6_cmp_addr
where it handles them as two v6 addrs. It would cause a out of
bounds crash.

syzbot found this crash when trying to bind two v4 addrs to a
v6 socket.

This patch fixes it by adding the process for two v4 addrs in
sctp_inet6_cmp_addr.

Fixes: 1071ec9d453a ("sctp: do not check port in sctp_inet6_cmp_addr")
Reported-by: syzbot+cd494c1dd681d4d93ebb@syzkaller.appspotmail.com
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sctp/ipv6.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/sctp/ipv6.c b/net/sctp/ipv6.c
index 1cd7b7e33fa35..5ca8309ea7b12 100644
--- a/net/sctp/ipv6.c
+++ b/net/sctp/ipv6.c
@@ -863,6 +863,9 @@ static int sctp_inet6_cmp_addr(const union sctp_addr *addr1,
 	if (sctp_is_any(sk, addr1) || sctp_is_any(sk, addr2))
 		return 1;
 
+	if (addr1->sa.sa_family == AF_INET && addr2->sa.sa_family == AF_INET)
+		return addr1->v4.sin_addr.s_addr == addr2->v4.sin_addr.s_addr;
+
 	return __sctp_v6_cmp_addr(addr1, addr2);
 }
 

From f7636e72c94c7501645721dcfb2653f9bcb9c4cb Mon Sep 17 00:00:00 2001
From: Xin Long <lucien.xin@gmail.com>
Date: Wed, 2 May 2018 13:39:46 +0800
Subject: [PATCH 0125/1852] sctp: use the old asoc when making the cookie-ack
 chunk in dupcook_d

[ Upstream commit 46e16d4b956867013e0bbd7f2bad206f4aa55752 ]

When processing a duplicate cookie-echo chunk, for case 'D', sctp will
not process the param from this chunk. It means old asoc has nothing
to be updated, and the new temp asoc doesn't have the complete info.

So there's no reason to use the new asoc when creating the cookie-ack
chunk. Otherwise, like when auth is enabled for cookie-ack, the chunk
can not be set with auth, and it will definitely be dropped by peer.

This issue is there since very beginning, and we fix it by using the
old asoc instead.

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sctp/sm_statefuns.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/sctp/sm_statefuns.c b/net/sctp/sm_statefuns.c
index 29c7c43de1086..40eaef2682390 100644
--- a/net/sctp/sm_statefuns.c
+++ b/net/sctp/sm_statefuns.c
@@ -1959,7 +1959,7 @@ static sctp_disposition_t sctp_sf_do_dupcook_d(struct net *net,
 		}
 	}
 
-	repl = sctp_make_cookie_ack(new_asoc, chunk);
+	repl = sctp_make_cookie_ack(asoc, chunk);
 	if (!repl)
 		goto nomem;
 

From 0d2fbff56a9a43393dc68884a9051c895089a680 Mon Sep 17 00:00:00 2001
From: Michael Chan <michael.chan@broadcom.com>
Date: Thu, 3 May 2018 20:04:27 -0400
Subject: [PATCH 0126/1852] tg3: Fix vunmap() BUG_ON() triggered from
 tg3_free_consistent().

[ Upstream commit d89a2adb8bfe6f8949ff389acdb9fa298b6e8e12 ]

tg3_free_consistent() calls dma_free_coherent() to free tp->hw_stats
under spinlock and can trigger BUG_ON() in vunmap() because vunmap()
may sleep.  Fix it by removing the spinlock and relying on the
TG3_FLAG_INIT_COMPLETE flag to prevent race conditions between
tg3_get_stats64() and tg3_free_consistent().  TG3_FLAG_INIT_COMPLETE
is always cleared under tp->lock before tg3_free_consistent()
and therefore tg3_get_stats64() can safely access tp->hw_stats
under tp->lock if TG3_FLAG_INIT_COMPLETE is set.

Fixes: f5992b72ebe0 ("tg3: Fix race condition in tg3_get_stats64().")
Reported-by: Zumeng Chen <zumeng.chen@gmail.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/tg3.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 3bba92fc9c1a0..1325825d52252 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -8722,14 +8722,15 @@ static void tg3_free_consistent(struct tg3 *tp)
 	tg3_mem_rx_release(tp);
 	tg3_mem_tx_release(tp);
 
-	/* Protect tg3_get_stats64() from reading freed tp->hw_stats. */
-	tg3_full_lock(tp, 0);
+	/* tp->hw_stats can be referenced safely:
+	 *     1. under rtnl_lock
+	 *     2. or under tp->lock if TG3_FLAG_INIT_COMPLETE is set.
+	 */
 	if (tp->hw_stats) {
 		dma_free_coherent(&tp->pdev->dev, sizeof(struct tg3_hw_stats),
 				  tp->hw_stats, tp->stats_mapping);
 		tp->hw_stats = NULL;
 	}
-	tg3_full_unlock(tp);
 }
 
 /*
@@ -14163,7 +14164,7 @@ static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev,
 	struct tg3 *tp = netdev_priv(dev);
 
 	spin_lock_bh(&tp->lock);
-	if (!tp->hw_stats) {
+	if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) {
 		*stats = tp->net_stats_prev;
 		spin_unlock_bh(&tp->lock);
 		return stats;

From 1c32b132f99ec25ecf09dfc8b03f0263382fe34f Mon Sep 17 00:00:00 2001
From: Debabrata Banerjee <dbanerje@akamai.com>
Date: Wed, 9 May 2018 19:32:10 -0400
Subject: [PATCH 0127/1852] bonding: do not allow rlb updates to invalid mac

[ Upstream commit 4fa8667ca3989ce14cf66301fa251544fbddbdd0 ]

Make sure multicast, broadcast, and zero mac's cannot be the output of rlb
updates, which should all be directed arps. Receive load balancing will be
collapsed if any of these happen, as the switch will broadcast.

Signed-off-by: Debabrata Banerjee <dbanerje@akamai.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/bonding/bond_alb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index bb9e9fc45e1ba..82d23bd3a742c 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -453,7 +453,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)
 {
 	int i;
 
-	if (!client_info->slave)
+	if (!client_info->slave || !is_valid_ether_addr(client_info->mac_dst))
 		return;
 
 	for (i = 0; i < RLB_ARP_BURST_SIZE; i++) {

From 58d6295dd7c4a59453a1c5968b9a56555ece2c57 Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Wed, 25 Apr 2018 11:33:08 -0700
Subject: [PATCH 0128/1852] tcp: ignore Fast Open on repair mode

[ Upstream commit 16ae6aa1705299789f71fdea59bfb119c1fbd9c0 ]

The TCP repair sequence of operation is to first set the socket in
repair mode, then inject the TCP stats into the socket with repair
socket options, then call connect() to re-activate the socket. The
connect syscall simply returns and set state to ESTABLISHED
mode. As a result Fast Open is meaningless for TCP repair.

However allowing sendto() system call with MSG_FASTOPEN flag half-way
during the repair operation could unexpectedly cause data to be
sent, before the operation finishes changing the internal TCP stats
(e.g. MSS).  This in turn triggers TCP warnings on inconsistent
packet accounting.

The fix is to simply disallow Fast Open operation once the socket
is in the repair mode.

Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: Yuchung Cheng <ycheng@google.com>
Reviewed-by: Neal Cardwell <ncardwell@google.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 6cf6b99c17233..49073965f18f5 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -1108,7 +1108,7 @@ int tcp_sendmsg(struct sock *sk, struct msghdr *msg, size_t size)
 	lock_sock(sk);
 
 	flags = msg->msg_flags;
-	if (flags & MSG_FASTOPEN) {
+	if ((flags & MSG_FASTOPEN) && !tp->repair) {
 		err = tcp_sendmsg_fastopen(sk, msg, &copied_syn, size);
 		if (err == -EINPROGRESS && copied_syn > 0)
 			goto out;

From a56e15035cf9bf7f084ae9f9f4004108f88faffd Mon Sep 17 00:00:00 2001
From: Xin Long <lucien.xin@gmail.com>
Date: Wed, 2 May 2018 13:45:12 +0800
Subject: [PATCH 0129/1852] sctp: fix the issue that the cookie-ack with auth
 can't get processed

[ Upstream commit ce402f044e4e432c296f90eaabb8dbe8f3624391 ]

When auth is enabled for cookie-ack chunk, in sctp_inq_pop, sctp
processes auth chunk first, then continues to the next chunk in
this packet if chunk_end + chunk_hdr size < skb_tail_pointer().
Otherwise, it will go to the next packet or discard this chunk.

However, it missed the fact that cookie-ack chunk's size is equal
to chunk_hdr size, which couldn't match that check, and thus this
chunk would not get processed.

This patch fixes it by changing the check to chunk_end + chunk_hdr
size <= skb_tail_pointer().

Fixes: 26b87c788100 ("net: sctp: fix remote memory pressure from excessive queueing")
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sctp/inqueue.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/sctp/inqueue.c b/net/sctp/inqueue.c
index 7e8a16c77039e..8d9b7ad25b65d 100644
--- a/net/sctp/inqueue.c
+++ b/net/sctp/inqueue.c
@@ -178,7 +178,7 @@ struct sctp_chunk *sctp_inq_pop(struct sctp_inq *queue)
 	skb_pull(chunk->skb, sizeof(sctp_chunkhdr_t));
 	chunk->subh.v = NULL; /* Subheader is no longer valid.  */
 
-	if (chunk->chunk_end + sizeof(sctp_chunkhdr_t) <
+	if (chunk->chunk_end + sizeof(sctp_chunkhdr_t) <=
 	    skb_tail_pointer(chunk->skb)) {
 		/* This is not a singleton */
 		chunk->singleton = 0;

From 1c5e768af44f9772ac9f294434dfffba5f8995e7 Mon Sep 17 00:00:00 2001
From: Xin Long <lucien.xin@gmail.com>
Date: Sat, 5 May 2018 14:59:47 +0800
Subject: [PATCH 0130/1852] sctp: delay the authentication for the duplicated
 cookie-echo chunk

[ Upstream commit 59d8d4434f429b4fa8a346fd889058bda427a837 ]

Now sctp only delays the authentication for the normal cookie-echo
chunk by setting chunk->auth_chunk in sctp_endpoint_bh_rcv(). But
for the duplicated one with auth, in sctp_assoc_bh_rcv(), it does
authentication first based on the old asoc, which will definitely
fail due to the different auth info in the old asoc.

The duplicated cookie-echo chunk will create a new asoc with the
auth info from this chunk, and the authentication should also be
done with the new asoc's auth info for all of the collision 'A',
'B' and 'D'. Otherwise, the duplicated cookie-echo chunk with auth
will never pass the authentication and create the new connection.

This issue exists since very beginning, and this fix is to make
sctp_assoc_bh_rcv() follow the way sctp_endpoint_bh_rcv() does
for the normal cookie-echo chunk to delay the authentication.

While at it, remove the unused params from sctp_sf_authenticate()
and define sctp_auth_chunk_verify() used for all the places that
do the delayed authentication.

v1->v2:
  fix the typo in changelog as Marcelo noticed.

Acked-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sctp/associola.c    | 30 +++++++++++++-
 net/sctp/sm_statefuns.c | 87 +++++++++++++++++++++++------------------
 2 files changed, 77 insertions(+), 40 deletions(-)

diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 559afd0ee7de0..a40b8b0ef0d57 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -1000,9 +1000,10 @@ static void sctp_assoc_bh_rcv(struct work_struct *work)
 	struct sctp_endpoint *ep;
 	struct sctp_chunk *chunk;
 	struct sctp_inq *inqueue;
-	int state;
 	sctp_subtype_t subtype;
+	int first_time = 1;	/* is this the first time through the loop */
 	int error = 0;
+	int state;
 
 	/* The association should be held so we should be safe. */
 	ep = asoc->ep;
@@ -1013,6 +1014,30 @@ static void sctp_assoc_bh_rcv(struct work_struct *work)
 		state = asoc->state;
 		subtype = SCTP_ST_CHUNK(chunk->chunk_hdr->type);
 
+		/* If the first chunk in the packet is AUTH, do special
+		 * processing specified in Section 6.3 of SCTP-AUTH spec
+		 */
+		if (first_time && subtype.chunk == SCTP_CID_AUTH) {
+			struct sctp_chunkhdr *next_hdr;
+
+			next_hdr = sctp_inq_peek(inqueue);
+			if (!next_hdr)
+				goto normal;
+
+			/* If the next chunk is COOKIE-ECHO, skip the AUTH
+			 * chunk while saving a pointer to it so we can do
+			 * Authentication later (during cookie-echo
+			 * processing).
+			 */
+			if (next_hdr->type == SCTP_CID_COOKIE_ECHO) {
+				chunk->auth_chunk = skb_clone(chunk->skb,
+							      GFP_ATOMIC);
+				chunk->auth = 1;
+				continue;
+			}
+		}
+
+normal:
 		/* SCTP-AUTH, Section 6.3:
 		 *    The receiver has a list of chunk types which it expects
 		 *    to be received only after an AUTH-chunk.  This list has
@@ -1051,6 +1076,9 @@ static void sctp_assoc_bh_rcv(struct work_struct *work)
 		/* If there is an error on chunk, discard this packet. */
 		if (error && chunk)
 			chunk->pdiscard = 1;
+
+		if (first_time)
+			first_time = 0;
 	}
 	sctp_association_put(asoc);
 }
diff --git a/net/sctp/sm_statefuns.c b/net/sctp/sm_statefuns.c
index 40eaef2682390..df9ac3746c1b5 100644
--- a/net/sctp/sm_statefuns.c
+++ b/net/sctp/sm_statefuns.c
@@ -144,10 +144,8 @@ static sctp_disposition_t sctp_sf_violation_chunk(
 				     void *arg,
 				     sctp_cmd_seq_t *commands);
 
-static sctp_ierror_t sctp_sf_authenticate(struct net *net,
-				    const struct sctp_endpoint *ep,
+static sctp_ierror_t sctp_sf_authenticate(
 				    const struct sctp_association *asoc,
-				    const sctp_subtype_t type,
 				    struct sctp_chunk *chunk);
 
 static sctp_disposition_t __sctp_sf_do_9_1_abort(struct net *net,
@@ -615,6 +613,38 @@ sctp_disposition_t sctp_sf_do_5_1C_ack(struct net *net,
 	return SCTP_DISPOSITION_CONSUME;
 }
 
+static bool sctp_auth_chunk_verify(struct net *net, struct sctp_chunk *chunk,
+				   const struct sctp_association *asoc)
+{
+	struct sctp_chunk auth;
+
+	if (!chunk->auth_chunk)
+		return true;
+
+	/* SCTP-AUTH:  auth_chunk pointer is only set when the cookie-echo
+	 * is supposed to be authenticated and we have to do delayed
+	 * authentication.  We've just recreated the association using
+	 * the information in the cookie and now it's much easier to
+	 * do the authentication.
+	 */
+
+	/* Make sure that we and the peer are AUTH capable */
+	if (!net->sctp.auth_enable || !asoc->peer.auth_capable)
+		return false;
+
+	/* set-up our fake chunk so that we can process it */
+	auth.skb = chunk->auth_chunk;
+	auth.asoc = chunk->asoc;
+	auth.sctp_hdr = chunk->sctp_hdr;
+	auth.chunk_hdr = (struct sctp_chunkhdr *)
+				skb_push(chunk->auth_chunk,
+					 sizeof(struct sctp_chunkhdr));
+	skb_pull(chunk->auth_chunk, sizeof(struct sctp_chunkhdr));
+	auth.transport = chunk->transport;
+
+	return sctp_sf_authenticate(asoc, &auth) == SCTP_IERROR_NO_ERROR;
+}
+
 /*
  * Respond to a normal COOKIE ECHO chunk.
  * We are the side that is being asked for an association.
@@ -751,36 +781,9 @@ sctp_disposition_t sctp_sf_do_5_1D_ce(struct net *net,
 	if (error)
 		goto nomem_init;
 
-	/* SCTP-AUTH:  auth_chunk pointer is only set when the cookie-echo
-	 * is supposed to be authenticated and we have to do delayed
-	 * authentication.  We've just recreated the association using
-	 * the information in the cookie and now it's much easier to
-	 * do the authentication.
-	 */
-	if (chunk->auth_chunk) {
-		struct sctp_chunk auth;
-		sctp_ierror_t ret;
-
-		/* Make sure that we and the peer are AUTH capable */
-		if (!net->sctp.auth_enable || !new_asoc->peer.auth_capable) {
-			sctp_association_free(new_asoc);
-			return sctp_sf_pdiscard(net, ep, asoc, type, arg, commands);
-		}
-
-		/* set-up our fake chunk so that we can process it */
-		auth.skb = chunk->auth_chunk;
-		auth.asoc = chunk->asoc;
-		auth.sctp_hdr = chunk->sctp_hdr;
-		auth.chunk_hdr = (sctp_chunkhdr_t *)skb_push(chunk->auth_chunk,
-					    sizeof(sctp_chunkhdr_t));
-		skb_pull(chunk->auth_chunk, sizeof(sctp_chunkhdr_t));
-		auth.transport = chunk->transport;
-
-		ret = sctp_sf_authenticate(net, ep, new_asoc, type, &auth);
-		if (ret != SCTP_IERROR_NO_ERROR) {
-			sctp_association_free(new_asoc);
-			return sctp_sf_pdiscard(net, ep, asoc, type, arg, commands);
-		}
+	if (!sctp_auth_chunk_verify(net, chunk, new_asoc)) {
+		sctp_association_free(new_asoc);
+		return sctp_sf_pdiscard(net, ep, asoc, type, arg, commands);
 	}
 
 	repl = sctp_make_cookie_ack(new_asoc, chunk);
@@ -1717,13 +1720,15 @@ static sctp_disposition_t sctp_sf_do_dupcook_a(struct net *net,
 			       GFP_ATOMIC))
 		goto nomem;
 
+	if (!sctp_auth_chunk_verify(net, chunk, new_asoc))
+		return SCTP_DISPOSITION_DISCARD;
+
 	/* Make sure no new addresses are being added during the
 	 * restart.  Though this is a pretty complicated attack
 	 * since you'd have to get inside the cookie.
 	 */
-	if (!sctp_sf_check_restart_addrs(new_asoc, asoc, chunk, commands)) {
+	if (!sctp_sf_check_restart_addrs(new_asoc, asoc, chunk, commands))
 		return SCTP_DISPOSITION_CONSUME;
-	}
 
 	/* If the endpoint is in the SHUTDOWN-ACK-SENT state and recognizes
 	 * the peer has restarted (Action A), it MUST NOT setup a new
@@ -1828,6 +1833,9 @@ static sctp_disposition_t sctp_sf_do_dupcook_b(struct net *net,
 			       GFP_ATOMIC))
 		goto nomem;
 
+	if (!sctp_auth_chunk_verify(net, chunk, new_asoc))
+		return SCTP_DISPOSITION_DISCARD;
+
 	/* Update the content of current association.  */
 	sctp_add_cmd_sf(commands, SCTP_CMD_UPDATE_ASSOC, SCTP_ASOC(new_asoc));
 	sctp_add_cmd_sf(commands, SCTP_CMD_NEW_STATE,
@@ -1920,6 +1928,9 @@ static sctp_disposition_t sctp_sf_do_dupcook_d(struct net *net,
 	 * a COOKIE ACK.
 	 */
 
+	if (!sctp_auth_chunk_verify(net, chunk, asoc))
+		return SCTP_DISPOSITION_DISCARD;
+
 	/* Don't accidentally move back into established state. */
 	if (asoc->state < SCTP_STATE_ESTABLISHED) {
 		sctp_add_cmd_sf(commands, SCTP_CMD_TIMER_STOP,
@@ -3985,10 +3996,8 @@ sctp_disposition_t sctp_sf_eat_fwd_tsn_fast(
  *
  * The return value is the disposition of the chunk.
  */
-static sctp_ierror_t sctp_sf_authenticate(struct net *net,
-				    const struct sctp_endpoint *ep,
+static sctp_ierror_t sctp_sf_authenticate(
 				    const struct sctp_association *asoc,
-				    const sctp_subtype_t type,
 				    struct sctp_chunk *chunk)
 {
 	struct sctp_authhdr *auth_hdr;
@@ -4087,7 +4096,7 @@ sctp_disposition_t sctp_sf_eat_auth(struct net *net,
 						  commands);
 
 	auth_hdr = (struct sctp_authhdr *)chunk->skb->data;
-	error = sctp_sf_authenticate(net, ep, asoc, type, chunk);
+	error = sctp_sf_authenticate(asoc, chunk);
 	switch (error) {
 	case SCTP_IERROR_AUTH_BAD_HMAC:
 		/* Generate the ERROR chunk and discard the rest

From 5e3e8286e6ca416b87004fa053fcc3563ccfc94c Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 10 Feb 2016 12:47:03 +0100
Subject: [PATCH 0131/1852] ALSA: timer: Call notifier in the same spinlock

commit f65e0d299807d8a11812845c972493c3f9a18e10 upstream.

snd_timer_notify1() is called outside the spinlock and it retakes the
lock after the unlock.  This is rather racy, and it's safer to move
snd_timer_notify() call inside the main spinlock.

The patch also contains a slight refactoring / cleanup of the code.
Now all start/stop/continue/pause look more symmetric and a bit better
readable.

Change-Id: I67b36169b97cec99c6af5361a7e3b011f25d736a
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

From 24400db7b76c6f188090fef1037bbe7593437fcb Mon Sep 17 00:00:00 2001
From: Richard Guy Briggs <rgb@redhat.com>
Date: Tue, 28 Jun 2016 12:06:58 -0400
Subject: [PATCH 0132/1852] audit: move calcs after alloc and check when
 logging set loginuid

commit 76a658c20efd541a62838d9ff68ce94170d7a549 upstream.

Move the calculations of values after the allocation in case the
allocation fails.  This avoids wasting effort in the rare case that it
fails, but more importantly saves us extra logic to release the tty
ref.

Signed-off-by: Richard Guy Briggs <rgb@redhat.com>
Signed-off-by: Paul Moore <paul@paul-moore.com>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/auditsc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/kernel/auditsc.c b/kernel/auditsc.c
index 6375465af0a7a..76f41594ddca0 100644
--- a/kernel/auditsc.c
+++ b/kernel/auditsc.c
@@ -1981,14 +1981,15 @@ static void audit_log_set_loginuid(kuid_t koldloginuid, kuid_t kloginuid,
 	if (!audit_enabled)
 		return;
 
+	ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_LOGIN);
+	if (!ab)
+		return;
+
 	uid = from_kuid(&init_user_ns, task_uid(current));
 	oldloginuid = from_kuid(&init_user_ns, koldloginuid);
 	loginuid = from_kuid(&init_user_ns, kloginuid),
 	tty = audit_get_tty(current);
 
-	ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_LOGIN);
-	if (!ab)
-		return;
 	audit_log_format(ab, "pid=%d uid=%u", task_tgid_nr(current), uid);
 	audit_log_task_context(ab);
 	audit_log_format(ab, " old-auid=%u auid=%u tty=%s old-ses=%u ses=%u res=%d",

From b2503e2cb68ebaf0a9fb4cb4a4a6404dcdf052fa Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Mon, 18 Apr 2016 17:09:44 +0200
Subject: [PATCH 0133/1852] arm64: introduce mov_q macro to move a constant
 into a 64-bit register

commit 30b5ba5cf333cc650e474eaf2cc1ae91bc7cf89f upstream.

Implement a macro mov_q that can be used to move an immediate constant
into a 64-bit register, using between 2 and 4 movz/movk instructions
(depending on the operand)

Change-Id: I86ef884a3cfaa5ae2d2a75195a64bbbf9ef31725
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

From c56129b9ad02b1deca5a53907729145df64c2129 Mon Sep 17 00:00:00 2001
From: Suzuki K Poulose <suzuki.poulose@arm.com>
Date: Mon, 26 Mar 2018 15:12:49 +0100
Subject: [PATCH 0134/1852] arm64: Add work around for Arm Cortex-A55 Erratum
 1024718

commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream.

Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
from an erratum 1024718, which causes incorrect updates when DBM/AP
bits in a page table entry is modified without a break-before-make
sequence. The work around is to skip enabling the hardware DBM feature
on the affected cores. The hardware Access Flag management features
is not affected. There are some other cores suffering from this
errata, which could be added to the midr_list to trigger the work
around.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: ckadabi@codeaurora.org
Reviewed-by: Dave Martin <dave.martin@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/Kconfig                 | 14 +++++++++++
 arch/arm64/include/asm/assembler.h | 40 ++++++++++++++++++++++++++++++
 arch/arm64/include/asm/cputype.h   | 18 +++++++++++---
 arch/arm64/mm/proc.S               |  5 ++++
 4 files changed, 73 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 2cbb42f7366a4..986e1d3c96f60 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -426,6 +426,20 @@ config ARM64_ERRATUM_843419
 
 	  If unsure, say Y.
 
+config ARM64_ERRATUM_1024718
+	bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update"
+	default y if !ARCH_ROCKCHIP
+	help
+	  This option adds work around for Arm Cortex-A55 Erratum 1024718.
+
+	  Affected Cortex-A55 cores (r0p0, r0p1, r1p0) could cause incorrect
+	  update of the hardware dirty bit when the DBM/AP bits are updated
+	  without a break-before-make. The work around is to disable the usage
+	  of hardware DBM locally on the affected cores. CPUs not affected by
+	  erratum will continue to use the feature.
+
+	  If unsure, say Y.
+
 config CAVIUM_ERRATUM_22375
 	bool "Cavium erratum 22375, 24313"
 	default y
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 5f6c8345c0e6e..8dade9319f3e9 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -27,6 +27,7 @@
 #include <asm/cpufeature.h>
 #include <asm/page.h>
 #include <asm/pgtable-hwdef.h>
+#include <asm/cputype.h>
 #include <asm/ptrace.h>
 #include <asm/thread_info.h>
 
@@ -398,4 +399,43 @@ alternative_endif
 	mrs	\rd, sp_el0
 	.endm
 
+/*
+ * Check the MIDR_EL1 of the current CPU for a given model and a range of
+ * variant/revision. See asm/cputype.h for the macros used below.
+ *
+ *	model:		MIDR_CPU_PART of CPU
+ *	rv_min:		Minimum of MIDR_CPU_VAR_REV()
+ *	rv_max:		Maximum of MIDR_CPU_VAR_REV()
+ *	res:		Result register.
+ *	tmp1, tmp2, tmp3: Temporary registers
+ *
+ * Corrupts: res, tmp1, tmp2, tmp3
+ * Returns:  0, if the CPU id doesn't match. Non-zero otherwise
+ */
+	.macro	cpu_midr_match model, rv_min, rv_max, res, tmp1, tmp2, tmp3
+	mrs		\res, midr_el1
+	mov_q		\tmp1, (MIDR_REVISION_MASK | MIDR_VARIANT_MASK)
+	mov_q		\tmp2, MIDR_CPU_PART_MASK
+	and		\tmp3, \res, \tmp2	// Extract model
+	and		\tmp1, \res, \tmp1	// rev & variant
+	mov_q		\tmp2, \model
+	cmp		\tmp3, \tmp2
+	cset		\res, eq
+	cbz		\res, .Ldone\@		// Model matches ?
+
+	.if (\rv_min != 0)			// Skip min check if rv_min == 0
+	mov_q		\tmp3, \rv_min
+	cmp		\tmp1, \tmp3
+	cset		\res, ge
+	.endif					// \rv_min != 0
+	/* Skip rv_max check if rv_min == rv_max && rv_min != 0 */
+	.if ((\rv_min != \rv_max) || \rv_min == 0)
+	mov_q		\tmp2, \rv_max
+	cmp		\tmp1, \tmp2
+	cset		\tmp2, le
+	and		\res, \res, \tmp2
+	.endif
+.Ldone\@:
+	.endm
+
 #endif	/* __ASM_ASSEMBLER_H */
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index b3a83da152a7c..8042c98ec0403 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -51,7 +51,15 @@
 #define MIDR_IMPLEMENTOR(midr)	\
 	(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
 
-#define MIDR_CPU_MODEL(imp, partnum) \
+#define MIDR_CPU_VAR_REV(var, rev) \
+	(((var) << MIDR_VARIANT_SHIFT) | (rev))
+
+#define MIDR_CPU_PART_MASK	  \
+	(MIDR_IMPLEMENTOR_MASK	| \
+	 MIDR_ARCHITECTURE_MASK | \
+	 MIDR_PARTNUM_MASK)
+
+#define MIDR_CPU_PART(imp, partnum) \
 	(((imp)			<< MIDR_IMPLEMENTOR_SHIFT) | \
 	(0xf			<< MIDR_ARCHITECTURE_SHIFT) | \
 	((partnum)		<< MIDR_PARTNUM_SHIFT))
@@ -75,14 +83,16 @@
 #define ARM_CPU_PART_FOUNDATION		0xD00
 #define ARM_CPU_PART_CORTEX_A57		0xD07
 #define ARM_CPU_PART_CORTEX_A53		0xD03
+#define ARM_CPU_PART_CORTEX_A55		0xD05
 
 #define APM_CPU_PART_POTENZA		0x000
 
 #define CAVIUM_CPU_PART_THUNDERX	0x0A1
 
-#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
-#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
-#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
+#define MIDR_CORTEX_A53 MIDR_CPU_PART(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
+#define MIDR_CORTEX_A55 MIDR_CPU_PART(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55)
+#define MIDR_CORTEX_A57 MIDR_CPU_PART(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
+#define MIDR_THUNDERX	MIDR_CPU_PART(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 19834ff5360cd..bfe9cb2289362 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -247,6 +247,11 @@ ENTRY(__cpu_setup)
 	cbz	x9, 2f
 	cmp	x9, #2
 	b.lt	1f
+#ifdef CONFIG_ARM64_ERRATUM_1024718
+	/* Disable hardware DBM on Cortex-A55 r0p0, r0p1 & r1p0 */
+	cpu_midr_match MIDR_CORTEX_A55, MIDR_CPU_VAR_REV(0, 0), MIDR_CPU_VAR_REV(1, 0), x1, x2, x3, x4
+	cbnz	x1, 1f
+#endif
 	orr	x10, x10, #TCR_HD		// hardware Dirty flag update
 1:	orr	x10, x10, #TCR_HA		// hardware Access flag update
 2:

From 5e18c457bcfaa01e67359d8b92743b3d579f84c9 Mon Sep 17 00:00:00 2001
From: Mel Gorman <mgorman@suse.de>
Date: Wed, 9 Aug 2017 08:27:11 +0100
Subject: [PATCH 0135/1852] futex: Remove unnecessary warning from
 get_futex_key

commit 48fb6f4db940e92cfb16cd878cddd59ea6120d06 upstream.

Commit 65d8fc777f6d ("futex: Remove requirement for lock_page() in
get_futex_key()") removed an unnecessary lock_page() with the
side-effect that page->mapping needed to be treated very carefully.

Two defensive warnings were added in case any assumption was missed and
the first warning assumed a correct application would not alter a
mapping backing a futex key.  Since merging, it has not triggered for
any unexpected case but Mark Rutland reported the following bug
triggering due to the first warning.

  kernel BUG at kernel/futex.c:679!
  Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
  Modules linked in:
  CPU: 0 PID: 3695 Comm: syz-executor1 Not tainted 4.13.0-rc3-00020-g307fec773ba3 #3
  Hardware name: linux,dummy-virt (DT)
  task: ffff80001e271780 task.stack: ffff000010908000
  PC is at get_futex_key+0x6a4/0xcf0 kernel/futex.c:679
  LR is at get_futex_key+0x6a4/0xcf0 kernel/futex.c:679
  pc : [<ffff00000821ac14>] lr : [<ffff00000821ac14>] pstate: 80000145

The fact that it's a bug instead of a warning was due to an unrelated
arm64 problem, but the warning itself triggered because the underlying
mapping changed.

This is an application issue but from a kernel perspective it's a
recoverable situation and the warning is unnecessary so this patch
removes the warning.  The warning may potentially be triggered with the
following test program from Mark although it may be necessary to adjust
NR_FUTEX_THREADS to be a value smaller than the number of CPUs in the
system.

    #include <linux/futex.h>
    #include <pthread.h>
    #include <stdio.h>
    #include <stdlib.h>
    #include <sys/mman.h>
    #include <sys/syscall.h>
    #include <sys/time.h>
    #include <unistd.h>

    #define NR_FUTEX_THREADS 16
    pthread_t threads[NR_FUTEX_THREADS];

    void *mem;

    #define MEM_PROT  (PROT_READ | PROT_WRITE)
    #define MEM_SIZE  65536

    static int futex_wrapper(int *uaddr, int op, int val,
                             const struct timespec *timeout,
                             int *uaddr2, int val3)
    {
        syscall(SYS_futex, uaddr, op, val, timeout, uaddr2, val3);
    }

    void *poll_futex(void *unused)
    {
        for (;;) {
            futex_wrapper(mem, FUTEX_CMP_REQUEUE_PI, 1, NULL, mem + 4, 1);
        }
    }

    int main(int argc, char *argv[])
    {
        int i;

        mem = mmap(NULL, MEM_SIZE, MEM_PROT,
               MAP_SHARED | MAP_ANONYMOUS, -1, 0);

        printf("Mapping @ %p\n", mem);

        printf("Creating futex threads...\n");

        for (i = 0; i < NR_FUTEX_THREADS; i++)
            pthread_create(&threads[i], NULL, poll_futex, NULL);

        printf("Flipping mapping...\n");
        for (;;) {
            mmap(mem, MEM_SIZE, MEM_PROT,
                 MAP_FIXED | MAP_SHARED | MAP_ANONYMOUS, -1, 0);
        }

        return 0;
    }

Reported-and-tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org # 4.7+
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/futex.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/kernel/futex.c b/kernel/futex.c
index 760a97da10503..7e88cf1df6b02 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -666,13 +666,14 @@ get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw)
 		 * this reference was taken by ihold under the page lock
 		 * pinning the inode in place so i_lock was unnecessary. The
 		 * only way for this check to fail is if the inode was
-		 * truncated in parallel so warn for now if this happens.
+		 * truncated in parallel which is almost certainly an
+		 * application bug. In such a case, just retry.
 		 *
 		 * We are not calling into get_futex_key_refs() in file-backed
 		 * cases, therefore a successful atomic_inc return below will
 		 * guarantee that get_futex_key() will still imply smp_mb(); (B).
 		 */
-		if (WARN_ON_ONCE(!atomic_inc_not_zero(&inode->i_count))) {
+		if (!atomic_inc_not_zero(&inode->i_count)) {
 			rcu_read_unlock();
 			put_page(page_head);
 

From d64386007aa92eed483ed014357e35f9af3a1a99 Mon Sep 17 00:00:00 2001
From: Jiri Slaby <jslaby@suse.cz>
Date: Thu, 24 Aug 2017 09:31:05 +0200
Subject: [PATCH 0136/1852] futex: Remove duplicated code and fix undefined
 behaviour

commit 30d6e0a4190d37740e9447e4e4815f06992dd8c3 upstream.

There is code duplicated over all architecture's headers for
futex_atomic_op_inuser. Namely op decoding, access_ok check for uaddr,
and comparison of the result.

Remove this duplication and leave up to the arches only the needed
assembly which is now in arch_futex_atomic_op_inuser.

This effectively distributes the Will Deacon's arm64 fix for undefined
behaviour reported by UBSAN to all architectures. The fix was done in
commit 5f16a046f8e1 (arm64: futex: Fix undefined behaviour with
FUTEX_OP_OPARG_SHIFT usage). Look there for an example dump.

And as suggested by Thomas, check for negative oparg too, because it was
also reported to cause undefined behaviour report.

Note that s390 removed access_ok check in d12a29703 ("s390/uaccess:
remove pointless access_ok() checks") as access_ok there returns true.
We introduce it back to the helper for the sake of simplicity (it gets
optimized away anyway).

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> [s390]
Acked-by: Chris Metcalf <cmetcalf@mellanox.com> [for tile]
Reviewed-by: Darren Hart (VMware) <dvhart@infradead.org>
Reviewed-by: Will Deacon <will.deacon@arm.com> [core/arm64]
Cc: linux-mips@linux-mips.org
Cc: Rich Felker <dalias@libc.org>
Cc: linux-ia64@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Cc: peterz@infradead.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: sparclinux@vger.kernel.org
Cc: Jonas Bonn <jonas@southpole.se>
Cc: linux-s390@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: linux-hexagon@vger.kernel.org
Cc: Helge Deller <deller@gmx.de>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: linux-snps-arc@lists.infradead.org
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-xtensa@linux-xtensa.org
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: openrisc@lists.librecores.org
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Stafford Horne <shorne@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Richard Henderson <rth@twiddle.net>
Cc: Chris Zankel <chris@zankel.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-parisc@vger.kernel.org
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: linux-alpha@vger.kernel.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: "David S. Miller" <davem@davemloft.net>
Link: http://lkml.kernel.org/r/20170824073105.3901-1-jslaby@suse.cz
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/alpha/include/asm/futex.h      | 26 +++------------
 arch/arc/include/asm/futex.h        | 40 +++--------------------
 arch/arm/include/asm/futex.h        | 26 +++------------
 arch/arm64/include/asm/futex.h      | 26 +++------------
 arch/frv/include/asm/futex.h        |  3 +-
 arch/frv/kernel/futex.c             | 27 +++-------------
 arch/hexagon/include/asm/futex.h    | 38 +++-------------------
 arch/ia64/include/asm/futex.h       | 25 +++------------
 arch/microblaze/include/asm/futex.h | 38 +++-------------------
 arch/mips/include/asm/futex.h       | 25 +++------------
 arch/parisc/include/asm/futex.h     | 25 +++------------
 arch/powerpc/include/asm/futex.h    | 26 +++------------
 arch/s390/include/asm/futex.h       | 23 +++----------
 arch/sh/include/asm/futex.h         | 26 +++------------
 arch/sparc/include/asm/futex_64.h   | 26 +++------------
 arch/tile/include/asm/futex.h       | 40 +++--------------------
 arch/x86/include/asm/futex.h        | 40 +++--------------------
 arch/xtensa/include/asm/futex.h     | 27 +++-------------
 include/asm-generic/futex.h         | 50 ++++++-----------------------
 kernel/futex.c                      | 39 ++++++++++++++++++++++
 20 files changed, 126 insertions(+), 470 deletions(-)

diff --git a/arch/alpha/include/asm/futex.h b/arch/alpha/include/asm/futex.h
index f939794363ac6..56474690e6855 100644
--- a/arch/alpha/include/asm/futex.h
+++ b/arch/alpha/include/asm/futex.h
@@ -29,18 +29,10 @@
 	:	"r" (uaddr), "r"(oparg)				\
 	:	"memory")
 
-static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -66,17 +58,9 @@ static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/arc/include/asm/futex.h b/arch/arc/include/asm/futex.h
index 11e1b1f3acda7..eb887dd13e748 100644
--- a/arch/arc/include/asm/futex.h
+++ b/arch/arc/include/asm/futex.h
@@ -73,20 +73,11 @@
 
 #endif
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
-		return -EFAULT;
-
 #ifndef CONFIG_ARC_HAS_LLSC
 	preempt_disable();	/* to guarantee atomic r-m-w of futex op */
 #endif
@@ -118,30 +109,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 	preempt_enable();
 #endif
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ:
-			ret = (oldval == cmparg);
-			break;
-		case FUTEX_OP_CMP_NE:
-			ret = (oldval != cmparg);
-			break;
-		case FUTEX_OP_CMP_LT:
-			ret = (oldval < cmparg);
-			break;
-		case FUTEX_OP_CMP_GE:
-			ret = (oldval >= cmparg);
-			break;
-		case FUTEX_OP_CMP_LE:
-			ret = (oldval <= cmparg);
-			break;
-		case FUTEX_OP_CMP_GT:
-			ret = (oldval > cmparg);
-			break;
-		default:
-			ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 6795368ad0238..cc414382dab4b 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -128,20 +128,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 #endif /* !SMP */
 
 static inline int
-futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret, tmp;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 #ifndef CONFIG_SMP
 	preempt_disable();
 #endif
@@ -172,17 +162,9 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 	preempt_enable();
 #endif
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
index f32b42e8725dc..5bb2fd4674e7c 100644
--- a/arch/arm64/include/asm/futex.h
+++ b/arch/arm64/include/asm/futex.h
@@ -48,20 +48,10 @@ do {									\
 } while (0)
 
 static inline int
-futex_atomic_op_inuser(unsigned int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (int)(encoded_op << 8) >> 20;
-	int cmparg = (int)(encoded_op << 20) >> 20;
 	int oldval = 0, ret, tmp;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1U << (oparg & 0x1f);
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 	pagefault_disable();
 
 	switch (op) {
@@ -91,17 +81,9 @@ futex_atomic_op_inuser(unsigned int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/frv/include/asm/futex.h b/arch/frv/include/asm/futex.h
index 4bea27f50a7ab..2702bd802d447 100644
--- a/arch/frv/include/asm/futex.h
+++ b/arch/frv/include/asm/futex.h
@@ -7,7 +7,8 @@
 #include <asm/errno.h>
 #include <asm/uaccess.h>
 
-extern int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr);
+extern int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr);
 
 static inline int
 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
diff --git a/arch/frv/kernel/futex.c b/arch/frv/kernel/futex.c
index d155ca9e5098c..37f7b2bf7f730 100644
--- a/arch/frv/kernel/futex.c
+++ b/arch/frv/kernel/futex.c
@@ -186,20 +186,10 @@ static inline int atomic_futex_op_xchg_xor(int oparg, u32 __user *uaddr, int *_o
 /*
  * do the futex operations
  */
-int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 	pagefault_disable();
 
 	switch (op) {
@@ -225,18 +215,9 @@ int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS; break;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
 
 	return ret;
 
-} /* end futex_atomic_op_inuser() */
+} /* end arch_futex_atomic_op_inuser() */
diff --git a/arch/hexagon/include/asm/futex.h b/arch/hexagon/include/asm/futex.h
index 7e597f8434da0..c607b77c8215d 100644
--- a/arch/hexagon/include/asm/futex.h
+++ b/arch/hexagon/include/asm/futex.h
@@ -31,18 +31,9 @@
 
 
 static inline int
-futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -72,30 +63,9 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ:
-			ret = (oldval == cmparg);
-			break;
-		case FUTEX_OP_CMP_NE:
-			ret = (oldval != cmparg);
-			break;
-		case FUTEX_OP_CMP_LT:
-			ret = (oldval < cmparg);
-			break;
-		case FUTEX_OP_CMP_GE:
-			ret = (oldval >= cmparg);
-			break;
-		case FUTEX_OP_CMP_LE:
-			ret = (oldval <= cmparg);
-			break;
-		case FUTEX_OP_CMP_GT:
-			ret = (oldval > cmparg);
-			break;
-		default:
-			ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index 76acbcd5c0609..6d67dc1eaf2be 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -45,18 +45,9 @@ do {									\
 } while (0)
 
 static inline int
-futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -84,17 +75,9 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index 01848f056f439..a9dad9e5e132f 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -29,18 +29,9 @@
 })
 
 static inline int
-futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -66,30 +57,9 @@ futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ:
-			ret = (oldval == cmparg);
-			break;
-		case FUTEX_OP_CMP_NE:
-			ret = (oldval != cmparg);
-			break;
-		case FUTEX_OP_CMP_LT:
-			ret = (oldval < cmparg);
-			break;
-		case FUTEX_OP_CMP_GE:
-			ret = (oldval >= cmparg);
-			break;
-		case FUTEX_OP_CMP_LE:
-			ret = (oldval <= cmparg);
-			break;
-		case FUTEX_OP_CMP_GT:
-			ret = (oldval > cmparg);
-			break;
-		default:
-			ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h
index 1de190bdfb9c9..a9e61ea54ca96 100644
--- a/arch/mips/include/asm/futex.h
+++ b/arch/mips/include/asm/futex.h
@@ -83,18 +83,9 @@
 }
 
 static inline int
-futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -125,17 +116,9 @@ futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
index 49df14805a9b4..ae5b64981d729 100644
--- a/arch/parisc/include/asm/futex.h
+++ b/arch/parisc/include/asm/futex.h
@@ -32,20 +32,11 @@ _futex_spin_unlock_irqrestore(u32 __user *uaddr, unsigned long int *flags)
 }
 
 static inline int
-futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
 	unsigned long int flags;
 	u32 val;
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(*uaddr)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -98,17 +89,9 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 2a9cf845473bb..f4c7467f74655 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -31,18 +31,10 @@
 	: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
 	: "cr0", "memory")
 
-static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -68,17 +60,9 @@ static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/s390/include/asm/futex.h b/arch/s390/include/asm/futex.h
index a4811aa0304d0..8f8eec9e1198c 100644
--- a/arch/s390/include/asm/futex.h
+++ b/arch/s390/include/asm/futex.h
@@ -21,17 +21,12 @@
 		: "0" (-EFAULT), "d" (oparg), "a" (uaddr),		\
 		  "m" (*uaddr) : "cc");
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, newval, ret;
 
 	load_kernel_asce();
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
 
 	pagefault_disable();
 	switch (op) {
@@ -60,17 +55,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 	}
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/sh/include/asm/futex.h b/arch/sh/include/asm/futex.h
index 7be39a646fbd0..e05187d26d764 100644
--- a/arch/sh/include/asm/futex.h
+++ b/arch/sh/include/asm/futex.h
@@ -10,20 +10,11 @@
 /* XXX: UP variants, fix for SH-4A and SMP.. */
 #include <asm/futex-irq.h>
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 	pagefault_disable();
 
 	switch (op) {
@@ -49,17 +40,8 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
 
 	return ret;
 }
diff --git a/arch/sparc/include/asm/futex_64.h b/arch/sparc/include/asm/futex_64.h
index 4e899b0dabf79..1cfd89d922080 100644
--- a/arch/sparc/include/asm/futex_64.h
+++ b/arch/sparc/include/asm/futex_64.h
@@ -29,22 +29,14 @@
 	: "r" (uaddr), "r" (oparg), "i" (-EFAULT)	\
 	: "memory")
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret, tem;
 
-	if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))))
-		return -EFAULT;
 	if (unlikely((((unsigned long) uaddr) & 0x3UL)))
 		return -EINVAL;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
 	pagefault_disable();
 
 	switch (op) {
@@ -69,17 +61,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/tile/include/asm/futex.h b/arch/tile/include/asm/futex.h
index 1a6ef1b69cb13..d96d9dab5c0b5 100644
--- a/arch/tile/include/asm/futex.h
+++ b/arch/tile/include/asm/futex.h
@@ -106,12 +106,9 @@
 	lock = __atomic_hashed_lock((int __force *)uaddr)
 #endif
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int uninitialized_var(val), ret;
 
 	__futex_prolog();
@@ -119,12 +116,6 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 	/* The 32-bit futex code makes this assumption, so validate it here. */
 	BUILD_BUG_ON(sizeof(atomic_t) != sizeof(int));
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 	pagefault_disable();
 	switch (op) {
 	case FUTEX_OP_SET:
@@ -148,30 +139,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 	}
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ:
-			ret = (val == cmparg);
-			break;
-		case FUTEX_OP_CMP_NE:
-			ret = (val != cmparg);
-			break;
-		case FUTEX_OP_CMP_LT:
-			ret = (val < cmparg);
-			break;
-		case FUTEX_OP_CMP_GE:
-			ret = (val >= cmparg);
-			break;
-		case FUTEX_OP_CMP_LE:
-			ret = (val <= cmparg);
-			break;
-		case FUTEX_OP_CMP_GT:
-			ret = (val > cmparg);
-			break;
-		default:
-			ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = val;
+
 	return ret;
 }
 
diff --git a/arch/x86/include/asm/futex.h b/arch/x86/include/asm/futex.h
index b4c1f54534366..f4dc9b63bdda9 100644
--- a/arch/x86/include/asm/futex.h
+++ b/arch/x86/include/asm/futex.h
@@ -41,20 +41,11 @@
 		       "+m" (*uaddr), "=&r" (tem)		\
 		     : "r" (oparg), "i" (-EFAULT), "1" (0))
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret, tem;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
-
 	pagefault_disable();
 
 	switch (op) {
@@ -80,30 +71,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ:
-			ret = (oldval == cmparg);
-			break;
-		case FUTEX_OP_CMP_NE:
-			ret = (oldval != cmparg);
-			break;
-		case FUTEX_OP_CMP_LT:
-			ret = (oldval < cmparg);
-			break;
-		case FUTEX_OP_CMP_GE:
-			ret = (oldval >= cmparg);
-			break;
-		case FUTEX_OP_CMP_LE:
-			ret = (oldval <= cmparg);
-			break;
-		case FUTEX_OP_CMP_GT:
-			ret = (oldval > cmparg);
-			break;
-		default:
-			ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/arch/xtensa/include/asm/futex.h b/arch/xtensa/include/asm/futex.h
index 72bfc1cbc2b54..5bfbc1c401d4c 100644
--- a/arch/xtensa/include/asm/futex.h
+++ b/arch/xtensa/include/asm/futex.h
@@ -44,18 +44,10 @@
 	: "r" (uaddr), "I" (-EFAULT), "r" (oparg)	\
 	: "memory")
 
-static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
+		u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 #if !XCHAL_HAVE_S32C1I
 	return -ENOSYS;
@@ -89,19 +81,10 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (ret)
-		return ret;
+	if (!ret)
+		*oval = oldval;
 
-	switch (cmp) {
-	case FUTEX_OP_CMP_EQ: return (oldval == cmparg);
-	case FUTEX_OP_CMP_NE: return (oldval != cmparg);
-	case FUTEX_OP_CMP_LT: return (oldval < cmparg);
-	case FUTEX_OP_CMP_GE: return (oldval >= cmparg);
-	case FUTEX_OP_CMP_LE: return (oldval <= cmparg);
-	case FUTEX_OP_CMP_GT: return (oldval > cmparg);
-	}
-
-	return -ENOSYS;
+	return ret;
 }
 
 static inline int
diff --git a/include/asm-generic/futex.h b/include/asm-generic/futex.h
index bf2d34c9d8043..f0d8b1c51343c 100644
--- a/include/asm-generic/futex.h
+++ b/include/asm-generic/futex.h
@@ -13,7 +13,7 @@
  */
 
 /**
- * futex_atomic_op_inuser() - Atomic arithmetic operation with constant
+ * arch_futex_atomic_op_inuser() - Atomic arithmetic operation with constant
  *			  argument and comparison of the previous
  *			  futex value with another constant.
  *
@@ -25,18 +25,11 @@
  * <0 - On error
  */
 static inline int
-futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval, ret;
 	u32 tmp;
 
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
 	preempt_disable();
 	pagefault_disable();
 
@@ -74,17 +67,9 @@ futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 	pagefault_enable();
 	preempt_enable();
 
-	if (ret == 0) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (ret == 0)
+		*oval = oldval;
+
 	return ret;
 }
 
@@ -126,18 +111,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 
 #else
 static inline int
-futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
+arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
 {
-	int op = (encoded_op >> 28) & 7;
-	int cmp = (encoded_op >> 24) & 15;
-	int oparg = (encoded_op << 8) >> 20;
-	int cmparg = (encoded_op << 20) >> 20;
 	int oldval = 0, ret;
-	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-		oparg = 1 << oparg;
-
-	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
-		return -EFAULT;
 
 	pagefault_disable();
 
@@ -153,17 +129,9 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
 	pagefault_enable();
 
-	if (!ret) {
-		switch (cmp) {
-		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-		default: ret = -ENOSYS;
-		}
-	}
+	if (!ret)
+		*oval = oldval;
+
 	return ret;
 }
 
diff --git a/kernel/futex.c b/kernel/futex.c
index 7e88cf1df6b02..ec10f3eb85146 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -1453,6 +1453,45 @@ futex_wake(u32 __user *uaddr, unsigned int flags, int nr_wake, u32 bitset)
 	return ret;
 }
 
+static int futex_atomic_op_inuser(unsigned int encoded_op, u32 __user *uaddr)
+{
+	unsigned int op =	  (encoded_op & 0x70000000) >> 28;
+	unsigned int cmp =	  (encoded_op & 0x0f000000) >> 24;
+	int oparg = sign_extend32((encoded_op & 0x00fff000) >> 12, 12);
+	int cmparg = sign_extend32(encoded_op & 0x00000fff, 12);
+	int oldval, ret;
+
+	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) {
+		if (oparg < 0 || oparg > 31)
+			return -EINVAL;
+		oparg = 1 << oparg;
+	}
+
+	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+		return -EFAULT;
+
+	ret = arch_futex_atomic_op_inuser(op, oparg, &oldval, uaddr);
+	if (ret)
+		return ret;
+
+	switch (cmp) {
+	case FUTEX_OP_CMP_EQ:
+		return oldval == cmparg;
+	case FUTEX_OP_CMP_NE:
+		return oldval != cmparg;
+	case FUTEX_OP_CMP_LT:
+		return oldval < cmparg;
+	case FUTEX_OP_CMP_GE:
+		return oldval >= cmparg;
+	case FUTEX_OP_CMP_LE:
+		return oldval <= cmparg;
+	case FUTEX_OP_CMP_GT:
+		return oldval > cmparg;
+	default:
+		return -ENOSYS;
+	}
+}
+
 /*
  * Wake up all waiters hashed on the physical page that is mapped
  * to this virtual address:

From 78c67367d18d754ac1b7efdb082a025446f693b9 Mon Sep 17 00:00:00 2001
From: Antony Antony <antony@phenome.org>
Date: Thu, 7 Dec 2017 21:54:27 +0100
Subject: [PATCH 0137/1852] xfrm: fix xfrm_do_migrate() with AEAD e.g(AES-GCM)

commit 75bf50f4aaa1c78d769d854ab3d975884909e4fb upstream.

copy geniv when cloning the xfrm state.

x->geniv was not copied to the new state and migration would fail.

xfrm_do_migrate
  ..
  xfrm_state_clone()
   ..
   ..
   esp_init_aead()
   crypto_alloc_aead()
    crypto_alloc_tfm()
     crypto_find_alg() return EAGAIN and failed

Signed-off-by: Antony Antony <antony@phenome.org>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_state.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c
index 70535b8ee4d64..9b6e51450fc58 100644
--- a/net/xfrm/xfrm_state.c
+++ b/net/xfrm/xfrm_state.c
@@ -1159,6 +1159,7 @@ static struct xfrm_state *xfrm_state_clone(struct xfrm_state *orig)
 
 	if (orig->aead) {
 		x->aead = xfrm_algo_aead_clone(orig->aead);
+		x->geniv = orig->geniv;
 		if (!x->aead)
 			goto error;
 	}

From 433fbfdfdf29fbec9d63883a54c8e2d8eaef7b83 Mon Sep 17 00:00:00 2001
From: Vasily Averin <vvs@virtuozzo.com>
Date: Thu, 2 Nov 2017 13:03:42 +0300
Subject: [PATCH 0138/1852] lockd: lost rollback of set_grace_period() in
 lockd_down_net()

commit 3a2b19d1ee5633f76ae8a88da7bc039a5d1732aa upstream.

Commit efda760fe95ea ("lockd: fix lockd shutdown race") is incorrect,
it removes lockd_manager and disarm grace_period_end for init_net only.

If nfsd was started from another net namespace lockd_up_net() calls
set_grace_period() that adds lockd_manager into per-netns list
and queues grace_period_end delayed work.

These action should be reverted in lockd_down_net().
Otherwise it can lead to double list_add on after restart nfsd in netns,
and to use-after-free if non-disarmed delayed work will be executed after netns destroy.

Fixes: efda760fe95e ("lockd: fix lockd shutdown race")
Cc: stable@vger.kernel.org
Signed-off-by: Vasily Averin <vvs@virtuozzo.com>
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/lockd/svc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/fs/lockd/svc.c b/fs/lockd/svc.c
index a2edb0049eb54..f038d4ac9aec0 100644
--- a/fs/lockd/svc.c
+++ b/fs/lockd/svc.c
@@ -271,6 +271,8 @@ static void lockd_down_net(struct svc_serv *serv, struct net *net)
 	if (ln->nlmsvc_users) {
 		if (--ln->nlmsvc_users == 0) {
 			nlm_shutdown_hosts_net(net);
+			cancel_delayed_work_sync(&ln->grace_period_end);
+			locks_end_grace(&ln->lockd_manager);
 			svc_shutdown_net(serv, net);
 			dprintk("lockd_down_net: per-net data destroyed; net=%p\n", net);
 		}

From 469429d3745120049535785e94aaa01b94b4b5ac Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Thu, 17 May 2018 11:44:48 +0200
Subject: [PATCH 0139/1852] Revert "ARM: dts: imx6qdl-wandboard: Fix audio
 channel swap"

This reverts commit 9de3a3bfed892608dc30a6bc3fd8bdbeae5b51a5 which was
commit 79935915300c5eb88a0e94fa9148a7505c14a02a upstream.

As Ben points out:
	This depends on:

	commit 570c70a60f53ca737ead4e5966c446bf0d39fac9
	Author: Fabio Estevam <fabio.estevam@nxp.com>
	Date:   Wed Apr 5 11:32:34 2017 -0300

	    ASoC: sgtl5000: Allow LRCLK pad drive strength to be changed

which did not show up until 4.13, so this makes no sense to have in this
stable branch.

Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 7a032dd84bb22..9e096d811beda 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -88,7 +88,6 @@
 		clocks = <&clks 201>;
 		VDDA-supply = <&reg_2p5v>;
 		VDDIO-supply = <&reg_3p3v>;
-		lrclk-strength = <3>;
 	};
 };
 

From e60d8034ec33ca37fd67b4752ed585bf18e7d4f9 Mon Sep 17 00:00:00 2001
From: James Chapman <jchapman@katalix.com>
Date: Wed, 3 Jan 2018 22:48:05 +0000
Subject: [PATCH 0140/1852] l2tp: revert "l2tp: fix missing print session
 offset info"

commit de3b58bc359a861d5132300f53f95e83f71954b3 upstream.

Revert commit 820da5357572 ("l2tp: fix missing print session offset
info").  The peer_offset parameter is removed.

Signed-off-by: James Chapman <jchapman@katalix.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Guillaume Nault <g.nault@alphalink.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/l2tp/l2tp_netlink.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/net/l2tp/l2tp_netlink.c b/net/l2tp/l2tp_netlink.c
index ae3438685caae..fb3248ff8b484 100644
--- a/net/l2tp/l2tp_netlink.c
+++ b/net/l2tp/l2tp_netlink.c
@@ -732,8 +732,6 @@ static int l2tp_nl_session_send(struct sk_buff *skb, u32 portid, u32 seq, int fl
 
 	if ((session->ifname[0] &&
 	     nla_put_string(skb, L2TP_ATTR_IFNAME, session->ifname)) ||
-	    (session->offset &&
-	     nla_put_u16(skb, L2TP_ATTR_OFFSET, session->offset)) ||
 	    (session->cookie_len &&
 	     nla_put(skb, L2TP_ATTR_COOKIE, session->cookie_len,
 		     &session->cookie[0])) ||

From d5f101799d21b6f1fbe61ecf21290787ed4bc95a Mon Sep 17 00:00:00 2001
From: "Michael Kerrisk (man-pages)" <mtk.manpages@gmail.com>
Date: Tue, 11 Oct 2016 13:53:43 -0700
Subject: [PATCH 0141/1852] pipe: cap initial pipe capacity according to
 pipe-max-size limit

commit 086e774a57fba4695f14383c0818994c0b31da7c upstream.

This is a patch that provides behavior that is more consistent, and
probably less surprising to users. I consider the change optional, and
welcome opinions about whether it should be applied.

By default, pipes are created with a capacity of 64 kiB.  However,
/proc/sys/fs/pipe-max-size may be set smaller than this value.  In this
scenario, an unprivileged user could thus create a pipe whose initial
capacity exceeds the limit. Therefore, it seems logical to cap the
initial pipe capacity according to the value of pipe-max-size.

The test program shown earlier in this patch series can be used to
demonstrate the effect of the change brought about with this patch:

    # cat /proc/sys/fs/pipe-max-size
    1048576
    # sudo -u mtk ./test_F_SETPIPE_SZ 1
    Initial pipe capacity: 65536
    # echo 10000 > /proc/sys/fs/pipe-max-size
    # cat /proc/sys/fs/pipe-max-size
    16384
    # sudo -u mtk ./test_F_SETPIPE_SZ 1
    Initial pipe capacity: 16384
    # ./test_F_SETPIPE_SZ 1
    Initial pipe capacity: 65536

The last two executions of 'test_F_SETPIPE_SZ' show that pipe-max-size
caps the initial allocation for a new pipe for unprivileged users, but
not for privileged users.

Link: http://lkml.kernel.org/r/31dc7064-2a17-9c5b-1df1-4e3012ee992c@gmail.com
Signed-off-by: Michael Kerrisk <mtk.manpages@gmail.com>
Reviewed-by: Vegard Nossum <vegard.nossum@oracle.com>
Cc: Willy Tarreau <w@1wt.eu>
Cc: <socketpair@gmail.com>
Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Jens Axboe <axboe@fb.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/pipe.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/pipe.c b/fs/pipe.c
index 39eff9a672535..1e7263bb837a6 100644
--- a/fs/pipe.c
+++ b/fs/pipe.c
@@ -616,6 +616,9 @@ struct pipe_inode_info *alloc_pipe_info(void)
 		unsigned long pipe_bufs = PIPE_DEF_BUFFERS;
 		struct user_struct *user = get_current_user();
 
+		if (pipe_bufs * PAGE_SIZE > pipe_max_size && !capable(CAP_SYS_RESOURCE))
+			pipe_bufs = pipe_max_size >> PAGE_SHIFT;
+
 		if (!too_many_pipe_buffers_hard(user)) {
 			if (too_many_pipe_buffers_soft(user))
 				pipe_bufs = 1;

From ed1f87f8fb7bd2830b96d41eb01a3e2c56c37ec0 Mon Sep 17 00:00:00 2001
From: Jiri Slaby <jslaby@suse.cz>
Date: Thu, 30 Nov 2017 15:35:44 +0100
Subject: [PATCH 0142/1852] futex: futex_wake_op, fix sign_extend32 sign bits

commit d70ef22892ed6c066e51e118b225923c9b74af34 upstream.

sign_extend32 counts the sign bit parameter from 0, not from 1.  So we
have to use "11" for 12th bit, not "12".

This mistake means we have not allowed negative op and cmp args since
commit 30d6e0a4190d ("futex: Remove duplicated code and fix undefined
behaviour") till now.

Fixes: 30d6e0a4190d ("futex: Remove duplicated code and fix undefined behaviour")
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Darren Hart <dvhart@infradead.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/futex.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/kernel/futex.c b/kernel/futex.c
index ec10f3eb85146..aedb36c0fd92a 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -1457,8 +1457,8 @@ static int futex_atomic_op_inuser(unsigned int encoded_op, u32 __user *uaddr)
 {
 	unsigned int op =	  (encoded_op & 0x70000000) >> 28;
 	unsigned int cmp =	  (encoded_op & 0x0f000000) >> 24;
-	int oparg = sign_extend32((encoded_op & 0x00fff000) >> 12, 12);
-	int cmparg = sign_extend32(encoded_op & 0x00000fff, 12);
+	int oparg = sign_extend32((encoded_op & 0x00fff000) >> 12, 11);
+	int cmparg = sign_extend32(encoded_op & 0x00000fff, 11);
 	int oldval, ret;
 
 	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) {

From 2f82913b36c55fd24f46e7c94bbb3bf064d05b54 Mon Sep 17 00:00:00 2001
From: zhongjiang <zhongjiang@huawei.com>
Date: Mon, 10 Jul 2017 15:53:01 -0700
Subject: [PATCH 0143/1852] kernel/exit.c: avoid undefined behaviour when
 calling wait4()

commit dd83c161fbcc5d8be637ab159c0de015cbff5ba4 upstream.

wait4(-2147483648, 0x20, 0, 0xdd0000) triggers:
UBSAN: Undefined behaviour in kernel/exit.c:1651:9

The related calltrace is as follows:

  negation of -2147483648 cannot be represented in type 'int':
  CPU: 9 PID: 16482 Comm: zj Tainted: G    B          ---- -------   3.10.0-327.53.58.71.x86_64+ #66
  Hardware name: Huawei Technologies Co., Ltd. Tecal RH2285          /BC11BTSA              , BIOS CTSAV036 04/27/2011
  Call Trace:
    dump_stack+0x19/0x1b
    ubsan_epilogue+0xd/0x50
    __ubsan_handle_negate_overflow+0x109/0x14e
    SyS_wait4+0x1cb/0x1e0
    system_call_fastpath+0x16/0x1b

Exclude the overflow to avoid the UBSAN warning.

Link: http://lkml.kernel.org/r/1497264618-20212-1-git-send-email-zhongjiang@huawei.com
Signed-off-by: zhongjiang <zhongjiang@huawei.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Xishi Qiu <qiuxishi@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/exit.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/kernel/exit.c b/kernel/exit.c
index 0a480853d527c..e9bfee5fcce5e 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -1619,6 +1619,10 @@ SYSCALL_DEFINE4(wait4, pid_t, upid, int __user *, stat_addr,
 			__WNOTHREAD|__WCLONE|__WALL))
 		return -EINVAL;
 
+	/* -INT_MIN is not defined */
+	if (upid == INT_MIN)
+		return -ESRCH;
+
 	if (upid == -1)
 		type = PIDTYPE_MAX;
 	else if (upid < 0) {

From 8754a754db9cee52fde36fb5b9bd35f8809b8b6e Mon Sep 17 00:00:00 2001
From: Shuah Khan <shuahkh@osg.samsung.com>
Date: Wed, 11 Apr 2018 18:13:30 -0600
Subject: [PATCH 0144/1852] usbip: usbip_host: refine probe and disconnect
 debug msgs to be useful

commit 28b68acc4a88dcf91fd1dcf2577371dc9bf574cc upstream.

Refine probe and disconnect debug msgs to be useful and say what is
in progress.

Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/usbip/stub_dev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/usbip/stub_dev.c b/drivers/usb/usbip/stub_dev.c
index 0931f32711198..fc6b581d2d5dc 100644
--- a/drivers/usb/usbip/stub_dev.c
+++ b/drivers/usb/usbip/stub_dev.c
@@ -316,7 +316,7 @@ static int stub_probe(struct usb_device *udev)
 	struct bus_id_priv *busid_priv;
 	int rc;
 
-	dev_dbg(&udev->dev, "Enter\n");
+	dev_dbg(&udev->dev, "Enter probe\n");
 
 	/* check we should claim or not by busid_table */
 	busid_priv = get_busid_priv(udev_busid);
@@ -419,7 +419,7 @@ static void stub_disconnect(struct usb_device *udev)
 	struct bus_id_priv *busid_priv;
 	int rc;
 
-	dev_dbg(&udev->dev, "Enter\n");
+	dev_dbg(&udev->dev, "Enter disconnect\n");
 
 	busid_priv = get_busid_priv(udev_busid);
 	if (!busid_priv) {

From 6dcf12ceb59eddbdf54faf2623f11c9dffe8f09d Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Mon, 30 Apr 2018 16:17:19 -0600
Subject: [PATCH 0145/1852] usbip: usbip_host: delete device from busid_table
 after rebind

commit 1e180f167d4e413afccbbb4a421b48b2de832549 upstream.

Device is left in the busid_table after unbind and rebind. Rebind
initiates usb bus scan and the original driver claims the device.
After rescan the device should be deleted from the busid_table as
it no longer belongs to usbip_host.

Fix it to delete the device after device_attach() succeeds.

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/usbip/stub_main.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/usbip/stub_main.c b/drivers/usb/usbip/stub_main.c
index f761e02e75c9c..c289f0593bb8b 100644
--- a/drivers/usb/usbip/stub_main.c
+++ b/drivers/usb/usbip/stub_main.c
@@ -201,6 +201,9 @@ static ssize_t rebind_store(struct device_driver *dev, const char *buf,
 	if (!bid)
 		return -ENODEV;
 
+	/* mark the device for deletion so probe ignores it during rescan */
+	bid->status = STUB_BUSID_OTHER;
+
 	/* device_attach() callers should hold parent lock for USB */
 	if (bid->udev->dev.parent)
 		device_lock(bid->udev->dev.parent);
@@ -212,6 +215,9 @@ static ssize_t rebind_store(struct device_driver *dev, const char *buf,
 		return ret;
 	}
 
+	/* delete device from busid_table */
+	del_match_busid((char *) buf);
+
 	return count;
 }
 

From 60faafd90330f95290fffd6b21a64f7ffc153a5b Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Mon, 30 Apr 2018 16:17:20 -0600
Subject: [PATCH 0146/1852] usbip: usbip_host: run rebind from exit when module
 is removed

commit 7510df3f29d44685bab7b1918b61a8ccd57126a9 upstream.

After removing usbip_host module, devices it releases are left without
a driver. For example, when a keyboard or a mass storage device are
bound to usbip_host when it is removed, these devices are no longer
bound to any driver.

Fix it to run device_attach() from the module exit routine to restore
the devices to their original drivers. This includes cleanup changes
and moving device_attach() code to a common routine to be called from
rebind_store() and usbip_host_exit().

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/usbip/stub_dev.c  |  6 +---
 drivers/usb/usbip/stub_main.c | 60 +++++++++++++++++++++++++++++------
 2 files changed, 52 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/usbip/stub_dev.c b/drivers/usb/usbip/stub_dev.c
index fc6b581d2d5dc..6276cc3e6ba99 100644
--- a/drivers/usb/usbip/stub_dev.c
+++ b/drivers/usb/usbip/stub_dev.c
@@ -463,12 +463,8 @@ static void stub_disconnect(struct usb_device *udev)
 	busid_priv->sdev = NULL;
 	stub_device_free(sdev);
 
-	if (busid_priv->status == STUB_BUSID_ALLOC) {
+	if (busid_priv->status == STUB_BUSID_ALLOC)
 		busid_priv->status = STUB_BUSID_ADDED;
-	} else {
-		busid_priv->status = STUB_BUSID_OTHER;
-		del_match_busid((char *)udev_busid);
-	}
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/usb/usbip/stub_main.c b/drivers/usb/usbip/stub_main.c
index c289f0593bb8b..5a4f5d9d3ea1e 100644
--- a/drivers/usb/usbip/stub_main.c
+++ b/drivers/usb/usbip/stub_main.c
@@ -28,6 +28,7 @@
 #define DRIVER_DESC "USB/IP Host Driver"
 
 struct kmem_cache *stub_priv_cache;
+
 /*
  * busid_tables defines matching busids that usbip can grab. A user can change
  * dynamically what device is locally used and what device is exported to a
@@ -184,6 +185,51 @@ static ssize_t store_match_busid(struct device_driver *dev, const char *buf,
 static DRIVER_ATTR(match_busid, S_IRUSR | S_IWUSR, show_match_busid,
 		   store_match_busid);
 
+static int do_rebind(char *busid, struct bus_id_priv *busid_priv)
+{
+	int ret;
+
+	/* device_attach() callers should hold parent lock for USB */
+	if (busid_priv->udev->dev.parent)
+		device_lock(busid_priv->udev->dev.parent);
+	ret = device_attach(&busid_priv->udev->dev);
+	if (busid_priv->udev->dev.parent)
+		device_unlock(busid_priv->udev->dev.parent);
+	if (ret < 0) {
+		dev_err(&busid_priv->udev->dev, "rebind failed\n");
+		return ret;
+	}
+	return 0;
+}
+
+static void stub_device_rebind(void)
+{
+#if IS_MODULE(CONFIG_USBIP_HOST)
+	struct bus_id_priv *busid_priv;
+	int i;
+
+	/* update status to STUB_BUSID_OTHER so probe ignores the device */
+	spin_lock(&busid_table_lock);
+	for (i = 0; i < MAX_BUSID; i++) {
+		if (busid_table[i].name[0] &&
+		    busid_table[i].shutdown_busid) {
+			busid_priv = &(busid_table[i]);
+			busid_priv->status = STUB_BUSID_OTHER;
+		}
+	}
+	spin_unlock(&busid_table_lock);
+
+	/* now run rebind */
+	for (i = 0; i < MAX_BUSID; i++) {
+		if (busid_table[i].name[0] &&
+		    busid_table[i].shutdown_busid) {
+			busid_priv = &(busid_table[i]);
+			do_rebind(busid_table[i].name, busid_priv);
+		}
+	}
+#endif
+}
+
 static ssize_t rebind_store(struct device_driver *dev, const char *buf,
 				 size_t count)
 {
@@ -204,16 +250,9 @@ static ssize_t rebind_store(struct device_driver *dev, const char *buf,
 	/* mark the device for deletion so probe ignores it during rescan */
 	bid->status = STUB_BUSID_OTHER;
 
-	/* device_attach() callers should hold parent lock for USB */
-	if (bid->udev->dev.parent)
-		device_lock(bid->udev->dev.parent);
-	ret = device_attach(&bid->udev->dev);
-	if (bid->udev->dev.parent)
-		device_unlock(bid->udev->dev.parent);
-	if (ret < 0) {
-		dev_err(&bid->udev->dev, "rebind failed\n");
+	ret = do_rebind((char *) buf, bid);
+	if (ret < 0)
 		return ret;
-	}
 
 	/* delete device from busid_table */
 	del_match_busid((char *) buf);
@@ -339,6 +378,9 @@ static void __exit usbip_host_exit(void)
 	 */
 	usb_deregister_device_driver(&stub_driver);
 
+	/* initiate scan to attach devices */
+	stub_device_rebind();
+
 	kmem_cache_destroy(stub_priv_cache);
 }
 

From edaa42ef4671fdad35a602e670885a0238537013 Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Mon, 14 May 2018 20:49:58 -0600
Subject: [PATCH 0147/1852] usbip: usbip_host: fix NULL-ptr deref and
 use-after-free errors

commit 22076557b07c12086eeb16b8ce2b0b735f7a27e7 upstream.

usbip_host updates device status without holding lock from stub probe,
disconnect and rebind code paths. When multiple requests to import a
device are received, these unprotected code paths step all over each
other and drive fails with NULL-ptr deref and use-after-free errors.

The driver uses a table lock to protect the busid array for adding and
deleting busids to the table. However, the probe, disconnect and rebind
paths get the busid table entry and update the status without holding
the busid table lock. Add a new finer grain lock to protect the busid
entry. This new lock will be held to search and update the busid entry
fields from get_busid_idx(), add_match_busid() and del_match_busid().

match_busid_show() does the same to access the busid entry fields.

get_busid_priv() changed to return the pointer to the busid entry holding
the busid lock. stub_probe(), stub_disconnect() and stub_device_rebind()
call put_busid_priv() to release the busid lock before returning. This
changes fixes the unprotected code paths eliminating the race conditions
in updating the busid entries.

Reported-by: Jakub Jirasek
Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/usbip/stub.h      |  2 ++
 drivers/usb/usbip/stub_dev.c  | 33 ++++++++++++++++++++---------
 drivers/usb/usbip/stub_main.c | 40 ++++++++++++++++++++++++++++++-----
 3 files changed, 60 insertions(+), 15 deletions(-)

diff --git a/drivers/usb/usbip/stub.h b/drivers/usb/usbip/stub.h
index 266e2b0ce9a84..47ccd73a74f00 100644
--- a/drivers/usb/usbip/stub.h
+++ b/drivers/usb/usbip/stub.h
@@ -88,6 +88,7 @@ struct bus_id_priv {
 	struct stub_device *sdev;
 	struct usb_device *udev;
 	char shutdown_busid;
+	spinlock_t busid_lock;
 };
 
 /* stub_priv is allocated from stub_priv_cache */
@@ -98,6 +99,7 @@ extern struct usb_device_driver stub_driver;
 
 /* stub_main.c */
 struct bus_id_priv *get_busid_priv(const char *busid);
+void put_busid_priv(struct bus_id_priv *bid);
 int del_match_busid(char *busid);
 void stub_device_cleanup_urbs(struct stub_device *sdev);
 
diff --git a/drivers/usb/usbip/stub_dev.c b/drivers/usb/usbip/stub_dev.c
index 6276cc3e6ba99..4aad99a59958b 100644
--- a/drivers/usb/usbip/stub_dev.c
+++ b/drivers/usb/usbip/stub_dev.c
@@ -314,7 +314,7 @@ static int stub_probe(struct usb_device *udev)
 	struct stub_device *sdev = NULL;
 	const char *udev_busid = dev_name(&udev->dev);
 	struct bus_id_priv *busid_priv;
-	int rc;
+	int rc = 0;
 
 	dev_dbg(&udev->dev, "Enter probe\n");
 
@@ -331,13 +331,15 @@ static int stub_probe(struct usb_device *udev)
 		 * other matched drivers by the driver core.
 		 * See driver_probe_device() in driver/base/dd.c
 		 */
-		return -ENODEV;
+		rc = -ENODEV;
+		goto call_put_busid_priv;
 	}
 
 	if (udev->descriptor.bDeviceClass == USB_CLASS_HUB) {
 		dev_dbg(&udev->dev, "%s is a usb hub device... skip!\n",
 			 udev_busid);
-		return -ENODEV;
+		rc = -ENODEV;
+		goto call_put_busid_priv;
 	}
 
 	if (!strcmp(udev->bus->bus_name, "vhci_hcd")) {
@@ -345,13 +347,16 @@ static int stub_probe(struct usb_device *udev)
 			"%s is attached on vhci_hcd... skip!\n",
 			udev_busid);
 
-		return -ENODEV;
+		rc = -ENODEV;
+		goto call_put_busid_priv;
 	}
 
 	/* ok, this is my device */
 	sdev = stub_device_alloc(udev);
-	if (!sdev)
-		return -ENOMEM;
+	if (!sdev) {
+		rc = -ENOMEM;
+		goto call_put_busid_priv;
+	}
 
 	dev_info(&udev->dev,
 		"usbip-host: register new device (bus %u dev %u)\n",
@@ -383,7 +388,9 @@ static int stub_probe(struct usb_device *udev)
 	}
 	busid_priv->status = STUB_BUSID_ALLOC;
 
-	return 0;
+	rc = 0;
+	goto call_put_busid_priv;
+
 err_files:
 	usb_hub_release_port(udev->parent, udev->portnum,
 			     (struct usb_dev_state *) udev);
@@ -394,6 +401,9 @@ static int stub_probe(struct usb_device *udev)
 
 	busid_priv->sdev = NULL;
 	stub_device_free(sdev);
+
+call_put_busid_priv:
+	put_busid_priv(busid_priv);
 	return rc;
 }
 
@@ -432,7 +442,7 @@ static void stub_disconnect(struct usb_device *udev)
 	/* get stub_device */
 	if (!sdev) {
 		dev_err(&udev->dev, "could not get device");
-		return;
+		goto call_put_busid_priv;
 	}
 
 	dev_set_drvdata(&udev->dev, NULL);
@@ -447,12 +457,12 @@ static void stub_disconnect(struct usb_device *udev)
 				  (struct usb_dev_state *) udev);
 	if (rc) {
 		dev_dbg(&udev->dev, "unable to release port\n");
-		return;
+		goto call_put_busid_priv;
 	}
 
 	/* If usb reset is called from event handler */
 	if (busid_priv->sdev->ud.eh == current)
-		return;
+		goto call_put_busid_priv;
 
 	/* shutdown the current connection */
 	shutdown_busid(busid_priv);
@@ -465,6 +475,9 @@ static void stub_disconnect(struct usb_device *udev)
 
 	if (busid_priv->status == STUB_BUSID_ALLOC)
 		busid_priv->status = STUB_BUSID_ADDED;
+
+call_put_busid_priv:
+	put_busid_priv(busid_priv);
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/usb/usbip/stub_main.c b/drivers/usb/usbip/stub_main.c
index 5a4f5d9d3ea1e..82df6ea4d1a6f 100644
--- a/drivers/usb/usbip/stub_main.c
+++ b/drivers/usb/usbip/stub_main.c
@@ -40,6 +40,8 @@ static spinlock_t busid_table_lock;
 
 static void init_busid_table(void)
 {
+	int i;
+
 	/*
 	 * This also sets the bus_table[i].status to
 	 * STUB_BUSID_OTHER, which is 0.
@@ -47,6 +49,9 @@ static void init_busid_table(void)
 	memset(busid_table, 0, sizeof(busid_table));
 
 	spin_lock_init(&busid_table_lock);
+
+	for (i = 0; i < MAX_BUSID; i++)
+		spin_lock_init(&busid_table[i].busid_lock);
 }
 
 /*
@@ -58,15 +63,20 @@ static int get_busid_idx(const char *busid)
 	int i;
 	int idx = -1;
 
-	for (i = 0; i < MAX_BUSID; i++)
+	for (i = 0; i < MAX_BUSID; i++) {
+		spin_lock(&busid_table[i].busid_lock);
 		if (busid_table[i].name[0])
 			if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) {
 				idx = i;
+				spin_unlock(&busid_table[i].busid_lock);
 				break;
 			}
+		spin_unlock(&busid_table[i].busid_lock);
+	}
 	return idx;
 }
 
+/* Returns holding busid_lock. Should call put_busid_priv() to unlock */
 struct bus_id_priv *get_busid_priv(const char *busid)
 {
 	int idx;
@@ -74,13 +84,21 @@ struct bus_id_priv *get_busid_priv(const char *busid)
 
 	spin_lock(&busid_table_lock);
 	idx = get_busid_idx(busid);
-	if (idx >= 0)
+	if (idx >= 0) {
 		bid = &(busid_table[idx]);
+		/* get busid_lock before returning */
+		spin_lock(&bid->busid_lock);
+	}
 	spin_unlock(&busid_table_lock);
 
 	return bid;
 }
 
+void put_busid_priv(struct bus_id_priv *bid)
+{
+	spin_unlock(&bid->busid_lock);
+}
+
 static int add_match_busid(char *busid)
 {
 	int i;
@@ -93,15 +111,19 @@ static int add_match_busid(char *busid)
 		goto out;
 	}
 
-	for (i = 0; i < MAX_BUSID; i++)
+	for (i = 0; i < MAX_BUSID; i++) {
+		spin_lock(&busid_table[i].busid_lock);
 		if (!busid_table[i].name[0]) {
 			strlcpy(busid_table[i].name, busid, BUSID_SIZE);
 			if ((busid_table[i].status != STUB_BUSID_ALLOC) &&
 			    (busid_table[i].status != STUB_BUSID_REMOV))
 				busid_table[i].status = STUB_BUSID_ADDED;
 			ret = 0;
+			spin_unlock(&busid_table[i].busid_lock);
 			break;
 		}
+		spin_unlock(&busid_table[i].busid_lock);
+	}
 
 out:
 	spin_unlock(&busid_table_lock);
@@ -122,6 +144,8 @@ int del_match_busid(char *busid)
 	/* found */
 	ret = 0;
 
+	spin_lock(&busid_table[idx].busid_lock);
+
 	if (busid_table[idx].status == STUB_BUSID_OTHER)
 		memset(busid_table[idx].name, 0, BUSID_SIZE);
 
@@ -129,6 +153,7 @@ int del_match_busid(char *busid)
 	    (busid_table[idx].status != STUB_BUSID_ADDED))
 		busid_table[idx].status = STUB_BUSID_REMOV;
 
+	spin_unlock(&busid_table[idx].busid_lock);
 out:
 	spin_unlock(&busid_table_lock);
 
@@ -141,9 +166,12 @@ static ssize_t show_match_busid(struct device_driver *drv, char *buf)
 	char *out = buf;
 
 	spin_lock(&busid_table_lock);
-	for (i = 0; i < MAX_BUSID; i++)
+	for (i = 0; i < MAX_BUSID; i++) {
+		spin_lock(&busid_table[i].busid_lock);
 		if (busid_table[i].name[0])
 			out += sprintf(out, "%s ", busid_table[i].name);
+		spin_unlock(&busid_table[i].busid_lock);
+	}
 	spin_unlock(&busid_table_lock);
 	out += sprintf(out, "\n");
 
@@ -219,7 +247,7 @@ static void stub_device_rebind(void)
 	}
 	spin_unlock(&busid_table_lock);
 
-	/* now run rebind */
+	/* now run rebind - no need to hold locks. driver files are removed */
 	for (i = 0; i < MAX_BUSID; i++) {
 		if (busid_table[i].name[0] &&
 		    busid_table[i].shutdown_busid) {
@@ -249,6 +277,8 @@ static ssize_t rebind_store(struct device_driver *dev, const char *buf,
 
 	/* mark the device for deletion so probe ignores it during rescan */
 	bid->status = STUB_BUSID_OTHER;
+	/* release the busid lock */
+	put_busid_priv(bid);
 
 	ret = do_rebind((char *) buf, bid);
 	if (ret < 0)

From 56cd25efdda4c291c25141c78a620d065da2a51f Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Tue, 15 May 2018 17:57:23 -0600
Subject: [PATCH 0148/1852] usbip: usbip_host: fix bad unlock balance during
 stub_probe()

commit c171654caa875919be3c533d3518da8be5be966e upstream.

stub_probe() calls put_busid_priv() in an error path when device isn't
found in the busid_table. Fix it by making put_busid_priv() safe to be
called with null struct bus_id_priv pointer.

This problem happens when "usbip bind" is run without loading usbip_host
driver and then running modprobe. The first failed bind attempt unbinds
the device from the original driver and when usbip_host is modprobed,
stub_probe() runs and doesn't find the device in its busid table and calls
put_busid_priv(0 with null bus_id_priv pointer.

usbip-host 3-10.2: 3-10.2 is not in match_busid table...  skip!

[  367.359679] =====================================
[  367.359681] WARNING: bad unlock balance detected!
[  367.359683] 4.17.0-rc4+ #5 Not tainted
[  367.359685] -------------------------------------
[  367.359688] modprobe/2768 is trying to release lock (
[  367.359689]
==================================================================
[  367.359696] BUG: KASAN: null-ptr-deref in print_unlock_imbalance_bug+0x99/0x110
[  367.359699] Read of size 8 at addr 0000000000000058 by task modprobe/2768

[  367.359705] CPU: 4 PID: 2768 Comm: modprobe Not tainted 4.17.0-rc4+ #5

Fixes: 22076557b07c ("usbip: usbip_host: fix NULL-ptr deref and use-after-free errors") in usb-linus
Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/usbip/stub_main.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/usbip/stub_main.c b/drivers/usb/usbip/stub_main.c
index 82df6ea4d1a6f..fa90496ca7a8e 100644
--- a/drivers/usb/usbip/stub_main.c
+++ b/drivers/usb/usbip/stub_main.c
@@ -96,7 +96,8 @@ struct bus_id_priv *get_busid_priv(const char *busid)
 
 void put_busid_priv(struct bus_id_priv *bid)
 {
-	spin_unlock(&bid->busid_lock);
+	if (bid)
+		spin_unlock(&bid->busid_lock);
 }
 
 static int add_match_busid(char *busid)

From e8ad7c4bde181e3a3ed015f0347fba9f0ab189f2 Mon Sep 17 00:00:00 2001
From: Federico Cuello <fedux@fedux.com.ar>
Date: Wed, 9 May 2018 00:13:38 +0200
Subject: [PATCH 0149/1852] ALSA: usb: mixer: volume quirk for CM102-A+/102S+

commit 21493316a3c4598f308d5a9fa31cc74639c4caff upstream.

Currently it's not possible to set volume lower than 26% (it just mutes).

Also fixes this warning:

  Warning! Unlikely big volume range (=9472), cval->res is probably wrong.
  [13] FU [PCM Playback Volume] ch = 2, val = -9473/-1/1

, and volume works fine for full range.

Signed-off-by: Federico Cuello <fedux@fedux.com.ar>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/usb/mixer.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c
index c5447ff078b3e..97d6a18e69567 100644
--- a/sound/usb/mixer.c
+++ b/sound/usb/mixer.c
@@ -904,6 +904,14 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval,
 		}
 		break;
 
+	case USB_ID(0x0d8c, 0x0103):
+		if (!strcmp(kctl->id.name, "PCM Playback Volume")) {
+			usb_audio_info(chip,
+				 "set volume quirk for CM102-A+/102S+\n");
+			cval->min = -256;
+		}
+		break;
+
 	case USB_ID(0x0471, 0x0101):
 	case USB_ID(0x0471, 0x0104):
 	case USB_ID(0x0471, 0x0105):

From fdfac215e46ba5178a538fbb5e3f9beec92aeb36 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Tue, 8 May 2018 09:27:46 +0200
Subject: [PATCH 0150/1852] ALSA: hda: Add Lenovo C50 All in one to the
 power_save blacklist

commit c8beccc19b92f5172994c0732db689c08f4f98e5 upstream.

Power-saving is causing loud plops on the Lenovo C50 All in one, add it
to the blacklist.

BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1572975
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/hda_intel.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 3be91696ac35a..d0b55c866370b 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2072,6 +2072,8 @@ static struct snd_pci_quirk power_save_blacklist[] = {
 	SND_PCI_QUIRK(0x1849, 0x0c0c, "Asrock B85M-ITX", 0),
 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
 	SND_PCI_QUIRK(0x1043, 0x8733, "Asus Prime X370-Pro", 0),
+	/* https://bugzilla.redhat.com/show_bug.cgi?id=1572975 */
+	SND_PCI_QUIRK(0x17aa, 0x36a7, "Lenovo C50 All in one", 0),
 	/* https://bugzilla.kernel.org/show_bug.cgi?id=198611 */
 	SND_PCI_QUIRK(0x17aa, 0x2227, "Lenovo X1 Carbon 3rd Gen", 0),
 	{}

From ccc4ea454d032b299a9538feb252d0b4fa0753d4 Mon Sep 17 00:00:00 2001
From: Wenwen Wang <wang6495@umn.edu>
Date: Sat, 5 May 2018 13:38:03 -0500
Subject: [PATCH 0151/1852] ALSA: control: fix a redundant-copy issue

commit 3f12888dfae2a48741c4caa9214885b3aaf350f9 upstream.

In snd_ctl_elem_add_compat(), the fields of the struct 'data' need to be
copied from the corresponding fields of the struct 'data32' in userspace.
This is achieved by invoking copy_from_user() and get_user() functions. The
problem here is that the 'type' field is copied twice. One is by
copy_from_user() and one is by get_user(). Given that the 'type' field is
not used between the two copies, the second copy is *completely* redundant
and should be removed for better performance and cleanup. Also, these two
copies can cause inconsistent data: as the struct 'data32' resides in
userspace and a malicious userspace process can race to change the 'type'
field between the two copies to cause inconsistent data. Depending on how
the data is used in the future, such an inconsistency may cause potential
security risks.

For above reasons, we should take out the second copy.

Signed-off-by: Wenwen Wang <wang6495@umn.edu>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/control_compat.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/sound/core/control_compat.c b/sound/core/control_compat.c
index 0608f216f3592..ac0a40b9ba1e8 100644
--- a/sound/core/control_compat.c
+++ b/sound/core/control_compat.c
@@ -400,8 +400,7 @@ static int snd_ctl_elem_add_compat(struct snd_ctl_file *file,
 	if (copy_from_user(&data->id, &data32->id, sizeof(data->id)) ||
 	    copy_from_user(&data->type, &data32->type, 3 * sizeof(u32)))
 		goto error;
-	if (get_user(data->owner, &data32->owner) ||
-	    get_user(data->type, &data32->type))
+	if (get_user(data->owner, &data32->owner))
 		goto error;
 	switch (data->type) {
 	case SNDRV_CTL_ELEM_TYPE_BOOLEAN:

From ba10a91d3bd2453ec674264701d824c9224db4a6 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Thu, 19 Apr 2018 19:53:32 +0300
Subject: [PATCH 0152/1852] spi: pxa2xx: Allow 64-bit DMA

commit efc4a13724b852ddaa3358402a8dec024ffbcb17 upstream.

Currently the 32-bit device address only is supported for DMA. However,
starting from Intel Sunrisepoint PCH the DMA address of the device FIFO
can be 64-bit.

Change the respective variable to be compatible with DMA engine
expectations, i.e. to phys_addr_t.

Fixes: 34cadd9c1bcb ("spi: pxa2xx: Add support for Intel Sunrisepoint")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/spi/spi-pxa2xx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h
index 58efa98313aa0..24c07fea9de27 100644
--- a/drivers/spi/spi-pxa2xx.h
+++ b/drivers/spi/spi-pxa2xx.h
@@ -38,7 +38,7 @@ struct driver_data {
 
 	/* SSP register addresses */
 	void __iomem *ioaddr;
-	u32 ssdr_physical;
+	phys_addr_t ssdr_physical;
 
 	/* SSP masks*/
 	u32 dma_cr1;

From 9beeaadcd3789074a4b834fd7863f727028db39b Mon Sep 17 00:00:00 2001
From: Stewart Smith <stewart@linux.vnet.ibm.com>
Date: Wed, 9 Dec 2015 17:18:18 +1100
Subject: [PATCH 0153/1852] powerpc/powernv: panic() on OPAL < V3

commit 786842b62f81f20d14894925e8c225328ee8144b upstream.

The OpenPower Abstraction Layer firmware went through a couple
of iterations in the lab before being released. What we now know
as OPAL advertises itself as OPALv3.

OPALv2 and OPALv1 never made it outside the lab, and the possibility
of anyone at all ever building a mainline kernel today and expecting
it to boot on such hardware is zero.

Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Mike Galbraith <mgalbraith@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/powernv/opal.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index ae29eaf85e9e2..ecb874a455c33 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -103,11 +103,8 @@ int __init early_init_dt_scan_opal(unsigned long node,
 		powerpc_firmware_features |= FW_FEATURE_OPALv2;
 		powerpc_firmware_features |= FW_FEATURE_OPALv3;
 		pr_info("OPAL V3 detected !\n");
-	} else if (of_flat_dt_is_compatible(node, "ibm,opal-v2")) {
-		powerpc_firmware_features |= FW_FEATURE_OPALv2;
-		pr_info("OPAL V2 detected !\n");
 	} else {
-		pr_info("OPAL V1 detected !\n");
+		panic("OPAL != V3 detected, no longer supported.\n");
 	}
 
 	/* Reinit all cores with the right endian */

From b62e02840406ff6ba547f96ca7375be45b3beeec Mon Sep 17 00:00:00 2001
From: Stewart Smith <stewart@linux.vnet.ibm.com>
Date: Wed, 9 Dec 2015 17:18:19 +1100
Subject: [PATCH 0154/1852] powerpc/powernv: Remove OPALv2 firmware define and
 references

commit 7261aafc095763b119136a562540dea7b1ccf657 upstream.

OPALv2 only ever existed in the lab and didn't escape to the world.
All OPAL systems in the wild are OPALv3.

The probability of there being an OPALv2 system still powered on
anywhere inside IBM is approximately zero, let alone anyone
expecting to run mainline kernels.

So, start to remove references to OPALv2.

Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Mike Galbraith <mgalbraith@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/include/asm/firmware.h    | 4 +---
 arch/powerpc/platforms/powernv/opal.c  | 8 ++------
 arch/powerpc/platforms/powernv/setup.c | 4 ----
 arch/powerpc/platforms/powernv/smp.c   | 4 ++--
 4 files changed, 5 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index e05808a328db2..50af5e5ea86fd 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -47,7 +47,6 @@
 #define FW_FEATURE_VPHN		ASM_CONST(0x0000000004000000)
 #define FW_FEATURE_XCMO		ASM_CONST(0x0000000008000000)
 #define FW_FEATURE_OPAL		ASM_CONST(0x0000000010000000)
-#define FW_FEATURE_OPALv2	ASM_CONST(0x0000000020000000)
 #define FW_FEATURE_SET_MODE	ASM_CONST(0x0000000040000000)
 #define FW_FEATURE_BEST_ENERGY	ASM_CONST(0x0000000080000000)
 #define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000)
@@ -70,8 +69,7 @@ enum {
 		FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY |
 		FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN,
 	FW_FEATURE_PSERIES_ALWAYS = 0,
-	FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2 |
-		FW_FEATURE_OPALv3,
+	FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv3,
 	FW_FEATURE_POWERNV_ALWAYS = 0,
 	FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
 	FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index ecb874a455c33..dc5fe926ad352 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -100,7 +100,6 @@ int __init early_init_dt_scan_opal(unsigned long node,
 
 	powerpc_firmware_features |= FW_FEATURE_OPAL;
 	if (of_flat_dt_is_compatible(node, "ibm,opal-v3")) {
-		powerpc_firmware_features |= FW_FEATURE_OPALv2;
 		powerpc_firmware_features |= FW_FEATURE_OPALv3;
 		pr_info("OPAL V3 detected !\n");
 	} else {
@@ -349,7 +348,7 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
 	 * enough room and be done with it
 	 */
 	spin_lock_irqsave(&opal_write_lock, flags);
-	if (firmware_has_feature(FW_FEATURE_OPALv2)) {
+	if (firmware_has_feature(FW_FEATURE_OPALv3)) {
 		rc = opal_console_write_buffer_space(vtermno, &olen);
 		len = be64_to_cpu(olen);
 		if (rc || len < total_len) {
@@ -693,10 +692,7 @@ static int __init opal_init(void)
 	}
 
 	/* Register OPAL consoles if any ports */
-	if (firmware_has_feature(FW_FEATURE_OPALv2))
-		consoles = of_find_node_by_path("/ibm,opal/consoles");
-	else
-		consoles = of_node_get(opal_node);
+	consoles = of_find_node_by_path("/ibm,opal/consoles");
 	if (consoles) {
 		for_each_child_of_node(consoles, np) {
 			if (strcmp(np->name, "serial"))
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 30c6b3b7be902..dc0a6ba1f2da5 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -142,10 +142,6 @@ static void pnv_show_cpuinfo(struct seq_file *m)
 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 	if (firmware_has_feature(FW_FEATURE_OPALv3))
 		seq_printf(m, "firmware\t: OPAL v3\n");
-	else if (firmware_has_feature(FW_FEATURE_OPALv2))
-		seq_printf(m, "firmware\t: OPAL v2\n");
-	else if (firmware_has_feature(FW_FEATURE_OPAL))
-		seq_printf(m, "firmware\t: OPAL v1\n");
 	else
 		seq_printf(m, "firmware\t: BML\n");
 	of_node_put(root);
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index ca264833ee64d..9b968a3151035 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -65,10 +65,10 @@ static int pnv_smp_kick_cpu(int nr)
 	BUG_ON(nr < 0 || nr >= NR_CPUS);
 
 	/*
-	 * If we already started or OPALv2 is not supported, we just
+	 * If we already started or OPALv3 is not supported, we just
 	 * kick the CPU via the PACA
 	 */
-	if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
+	if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv3))
 		goto kick;
 
 	/*

From 8612501eb7d6df0999c5fe1c38616aad4937b7c3 Mon Sep 17 00:00:00 2001
From: Stewart Smith <stewart@linux.vnet.ibm.com>
Date: Wed, 9 Dec 2015 17:18:20 +1100
Subject: [PATCH 0155/1852] powerpc/powernv: remove FW_FEATURE_OPALv3 and just
 use FW_FEATURE_OPAL

commit e4d54f71d29997344b4c4c8d47708240f9f23a5c upstream.

Long ago, only in the lab, there was OPALv1 and OPALv2. Now there is
just OPALv3, with nobody ever expecting anything on pre-OPALv3 to
be cared about or supported by mainline kernels.

So, let's remove FW_FEATURE_OPALv3 and instead use FW_FEATURE_OPAL
exclusively.

Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Mike Galbraith <mgalbraith@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/include/asm/firmware.h          |  3 +-
 arch/powerpc/platforms/powernv/eeh-powernv.c |  4 +-
 arch/powerpc/platforms/powernv/idle.c        |  2 +-
 arch/powerpc/platforms/powernv/opal-xscom.c  |  2 +-
 arch/powerpc/platforms/powernv/opal.c        | 25 +++----
 arch/powerpc/platforms/powernv/pci-ioda.c    |  2 +-
 arch/powerpc/platforms/powernv/setup.c       |  8 +--
 arch/powerpc/platforms/powernv/smp.c         | 74 ++++++++------------
 drivers/cpufreq/powernv-cpufreq.c            |  2 +-
 drivers/cpuidle/cpuidle-powernv.c            |  2 +-
 10 files changed, 54 insertions(+), 70 deletions(-)

diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 50af5e5ea86fd..b0629249778b3 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -51,7 +51,6 @@
 #define FW_FEATURE_BEST_ENERGY	ASM_CONST(0x0000000080000000)
 #define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000)
 #define FW_FEATURE_PRRN		ASM_CONST(0x0000000200000000)
-#define FW_FEATURE_OPALv3	ASM_CONST(0x0000000400000000)
 
 #ifndef __ASSEMBLY__
 
@@ -69,7 +68,7 @@ enum {
 		FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY |
 		FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN,
 	FW_FEATURE_PSERIES_ALWAYS = 0,
-	FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv3,
+	FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL,
 	FW_FEATURE_POWERNV_ALWAYS = 0,
 	FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
 	FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 92736851c795a..3f653f5201e7b 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -48,8 +48,8 @@ static int pnv_eeh_init(void)
 	struct pci_controller *hose;
 	struct pnv_phb *phb;
 
-	if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
-		pr_warn("%s: OPALv3 is required !\n",
+	if (!firmware_has_feature(FW_FEATURE_OPAL)) {
+		pr_warn("%s: OPAL is required !\n",
 			__func__);
 		return -EINVAL;
 	}
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 59d735d2e5c05..15bfbcd5debc2 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -242,7 +242,7 @@ static int __init pnv_init_idle_states(void)
 	if (cpuidle_disable != IDLE_NO_OVERRIDE)
 		goto out;
 
-	if (!firmware_has_feature(FW_FEATURE_OPALv3))
+	if (!firmware_has_feature(FW_FEATURE_OPAL))
 		goto out;
 
 	power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index 7634d1c62299b..d0ac535cf5d7c 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -126,7 +126,7 @@ static const struct scom_controller opal_scom_controller = {
 
 static int opal_xscom_init(void)
 {
-	if (firmware_has_feature(FW_FEATURE_OPALv3))
+	if (firmware_has_feature(FW_FEATURE_OPAL))
 		scom_init(&opal_scom_controller);
 	return 0;
 }
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index dc5fe926ad352..e48826aa314c3 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -98,10 +98,9 @@ int __init early_init_dt_scan_opal(unsigned long node,
 	pr_debug("OPAL Entry = 0x%llx (sizep=%p runtimesz=%d)\n",
 		 opal.size, sizep, runtimesz);
 
-	powerpc_firmware_features |= FW_FEATURE_OPAL;
 	if (of_flat_dt_is_compatible(node, "ibm,opal-v3")) {
-		powerpc_firmware_features |= FW_FEATURE_OPALv3;
-		pr_info("OPAL V3 detected !\n");
+		powerpc_firmware_features |= FW_FEATURE_OPAL;
+		pr_info("OPAL detected !\n");
 	} else {
 		panic("OPAL != V3 detected, no longer supported.\n");
 	}
@@ -348,17 +347,15 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
 	 * enough room and be done with it
 	 */
 	spin_lock_irqsave(&opal_write_lock, flags);
-	if (firmware_has_feature(FW_FEATURE_OPALv3)) {
-		rc = opal_console_write_buffer_space(vtermno, &olen);
-		len = be64_to_cpu(olen);
-		if (rc || len < total_len) {
-			spin_unlock_irqrestore(&opal_write_lock, flags);
-			/* Closed -> drop characters */
-			if (rc)
-				return total_len;
-			opal_poll_events(NULL);
-			return -EAGAIN;
-		}
+	rc = opal_console_write_buffer_space(vtermno, &olen);
+	len = be64_to_cpu(olen);
+	if (rc || len < total_len) {
+		spin_unlock_irqrestore(&opal_write_lock, flags);
+		/* Closed -> drop characters */
+		if (rc)
+			return total_len;
+		opal_poll_events(NULL);
+		return -EAGAIN;
 	}
 
 	/* We still try to handle partial completions, though they
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index ecb7f3220355b..eac3b7cc78c6f 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -344,7 +344,7 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
 		return;
 	}
 
-	if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
+	if (!firmware_has_feature(FW_FEATURE_OPAL)) {
 		pr_info("  Firmware too old to support M64 window\n");
 		return;
 	}
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index dc0a6ba1f2da5..c57afc619b204 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -140,8 +140,8 @@ static void pnv_show_cpuinfo(struct seq_file *m)
 	if (root)
 		model = of_get_property(root, "model", NULL);
 	seq_printf(m, "machine\t\t: PowerNV %s\n", model);
-	if (firmware_has_feature(FW_FEATURE_OPALv3))
-		seq_printf(m, "firmware\t: OPAL v3\n");
+	if (firmware_has_feature(FW_FEATURE_OPAL))
+		seq_printf(m, "firmware\t: OPAL\n");
 	else
 		seq_printf(m, "firmware\t: BML\n");
 	of_node_put(root);
@@ -270,9 +270,9 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 {
 	xics_kexec_teardown_cpu(secondary);
 
-	/* On OPAL v3, we return all CPUs to firmware */
+	/* On OPAL, we return all CPUs to firmware */
 
-	if (!firmware_has_feature(FW_FEATURE_OPALv3))
+	if (!firmware_has_feature(FW_FEATURE_OPAL))
 		return;
 
 	if (secondary) {
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 9b968a3151035..ad7b1a3dbed09 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -61,14 +61,15 @@ static int pnv_smp_kick_cpu(int nr)
 	unsigned long start_here =
 			__pa(ppc_function_entry(generic_secondary_smp_init));
 	long rc;
+	uint8_t status;
 
 	BUG_ON(nr < 0 || nr >= NR_CPUS);
 
 	/*
-	 * If we already started or OPALv3 is not supported, we just
+	 * If we already started or OPAL is not supported, we just
 	 * kick the CPU via the PACA
 	 */
-	if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv3))
+	if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
 		goto kick;
 
 	/*
@@ -77,55 +78,42 @@ static int pnv_smp_kick_cpu(int nr)
 	 * first time. OPAL v3 allows us to query OPAL to know if it
 	 * has the CPUs, so we do that
 	 */
-	if (firmware_has_feature(FW_FEATURE_OPALv3)) {
-		uint8_t status;
-
-		rc = opal_query_cpu_status(pcpu, &status);
-		if (rc != OPAL_SUCCESS) {
-			pr_warn("OPAL Error %ld querying CPU %d state\n",
-				rc, nr);
-			return -ENODEV;
-		}
+	rc = opal_query_cpu_status(pcpu, &status);
+	if (rc != OPAL_SUCCESS) {
+		pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
+		return -ENODEV;
+	}
 
-		/*
-		 * Already started, just kick it, probably coming from
-		 * kexec and spinning
-		 */
-		if (status == OPAL_THREAD_STARTED)
-			goto kick;
+	/*
+	 * Already started, just kick it, probably coming from
+	 * kexec and spinning
+	 */
+	if (status == OPAL_THREAD_STARTED)
+		goto kick;
 
-		/*
-		 * Available/inactive, let's kick it
-		 */
-		if (status == OPAL_THREAD_INACTIVE) {
-			pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
-				 nr, pcpu);
-			rc = opal_start_cpu(pcpu, start_here);
-			if (rc != OPAL_SUCCESS) {
-				pr_warn("OPAL Error %ld starting CPU %d\n",
-					rc, nr);
-				return -ENODEV;
-			}
-		} else {
-			/*
-			 * An unavailable CPU (or any other unknown status)
-			 * shouldn't be started. It should also
-			 * not be in the possible map but currently it can
-			 * happen
-			 */
-			pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
-				 " (status %d)...\n", nr, pcpu, status);
+	/*
+	 * Available/inactive, let's kick it
+	 */
+	if (status == OPAL_THREAD_INACTIVE) {
+		pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
+		rc = opal_start_cpu(pcpu, start_here);
+		if (rc != OPAL_SUCCESS) {
+			pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
 			return -ENODEV;
 		}
 	} else {
 		/*
-		 * On OPAL v2, we just kick it and hope for the best,
-		 * we must not test the error from opal_start_cpu() or
-		 * we would fail to get CPUs from kexec.
+		 * An unavailable CPU (or any other unknown status)
+		 * shouldn't be started. It should also
+		 * not be in the possible map but currently it can
+		 * happen
 		 */
-		opal_start_cpu(pcpu, start_here);
+		pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
+			 " (status %d)...\n", nr, pcpu, status);
+		return -ENODEV;
 	}
- kick:
+
+kick:
 	return smp_generic_kick_cpu(nr);
 }
 
diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
index c4b0ef65988c9..57e6c45724e73 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -592,7 +592,7 @@ static int __init powernv_cpufreq_init(void)
 	int rc = 0;
 
 	/* Don't probe on pseries (guest) platforms */
-	if (!firmware_has_feature(FW_FEATURE_OPALv3))
+	if (!firmware_has_feature(FW_FEATURE_OPAL))
 		return -ENODEV;
 
 	/* Discover pstates from device tree and init */
diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
index d5c5a476360fc..c44a843cb405f 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -282,7 +282,7 @@ static int powernv_idle_probe(void)
 	if (cpuidle_disable != IDLE_NO_OVERRIDE)
 		return -ENODEV;
 
-	if (firmware_has_feature(FW_FEATURE_OPALv3)) {
+	if (firmware_has_feature(FW_FEATURE_OPAL)) {
 		cpuidle_state_table = powernv_states;
 		/* Device tree can indicate more idle states */
 		max_idle_state = powernv_add_idle_states();

From 5352ef27c1fe64324046959d35987d80e9d12067 Mon Sep 17 00:00:00 2001
From: Anders Roxell <anders.roxell@linaro.org>
Date: Wed, 27 Jan 2016 20:26:54 +0100
Subject: [PATCH 0156/1852] cpuidle: coupled: remove unused define
 cpuidle_coupled_lock

commit 75274b33e779ae40a750bcb4bd0b07c4dfef4746 upstream.

This was found with the -RT patch enabled, but the fix should apply to
non-RT also.

Used multi_v7_defconfig+PREEMPT_RT_FULL=y and this caused a compilation
warning without this fix:
../drivers/cpuidle/coupled.c:122:21: warning: 'cpuidle_coupled_lock'
defined but not used [-Wunused-variable]

Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Mike Galbraith <mgalbraith@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpuidle/coupled.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/cpuidle/coupled.c b/drivers/cpuidle/coupled.c
index 344058f8501a2..d5657d50ac404 100644
--- a/drivers/cpuidle/coupled.c
+++ b/drivers/cpuidle/coupled.c
@@ -119,7 +119,6 @@ struct cpuidle_coupled {
 
 #define CPUIDLE_COUPLED_NOT_IDLE	(-1)
 
-static DEFINE_MUTEX(cpuidle_coupled_lock);
 static DEFINE_PER_CPU(struct call_single_data, cpuidle_coupled_poke_cb);
 
 /*

From 5b3db232a9b8cd6fdee24ce86b5194b0d8005380 Mon Sep 17 00:00:00 2001
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Wed, 10 Jan 2018 17:10:12 +1100
Subject: [PATCH 0157/1852] powerpc: Don't preempt_disable() in show_cpuinfo()

commit 349524bc0da698ec77f2057cf4a4948eb6349265 upstream.

This causes warnings from cpufreq mutex code. This is also rather
unnecessary and ineffective. If we really want to prevent concurrent
unplug, we could take the unplug read lock but I don't see this being
critical.

Fixes: cd77b5ce208c ("powerpc/powernv/cpufreq: Fix the frequency read by /proc/cpuinfo")
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Acked-by: Michal Suchanek <msuchanek@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/setup-common.c | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 44c8d03558ac4..3182247841143 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -217,14 +217,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 	unsigned short maj;
 	unsigned short min;
 
-	/* We only show online cpus: disable preempt (overzealous, I
-	 * knew) to prevent cpu going down. */
-	preempt_disable();
-	if (!cpu_online(cpu_id)) {
-		preempt_enable();
-		return 0;
-	}
-
 #ifdef CONFIG_SMP
 	pvr = per_cpu(cpu_pvr, cpu_id);
 #else
@@ -329,9 +321,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 #ifdef CONFIG_SMP
 	seq_printf(m, "\n");
 #endif
-
-	preempt_enable();
-
 	/* If this is the last cpu, print the summary */
 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
 		show_cpuinfo_summary(m);

From 9a26f63a01fd64f3da5b6f2e98ffe92c3b8dd432 Mon Sep 17 00:00:00 2001
From: Vladimir Davydov <vdavydov@virtuozzo.com>
Date: Thu, 14 Jan 2016 15:19:38 -0800
Subject: [PATCH 0158/1852] vmscan: do not force-scan file lru if its absolute
 size is small

commit 316bda0e6cc5f36f94b4af8bded16d642c90ad75 upstream.

We assume there is enough inactive page cache if the size of inactive
file lru is greater than the size of active file lru, in which case we
force-scan file lru ignoring anonymous pages.  While this logic works
fine when there are plenty of page cache pages, it fails if the size of
file lru is small (several MB): in this case (lru_size >> prio) will be
0 for normal scan priorities, as a result, if inactive file lru happens
to be larger than active file lru, anonymous pages of a cgroup will
never get evicted unless the system experiences severe memory pressure,
even if there are gigabytes of unused anonymous memory there, which is
unfair in respect to other cgroups, whose workloads might be page cache
oriented.

This patch attempts to fix this by elaborating the "enough inactive page
cache" check: it makes it not only check that inactive lru size > active
lru size, but also that we will scan something from the cgroup at the
current scan priority.  If these conditions do not hold, we proceed to
SCAN_FRACT as usual.

Signed-off-by: Vladimir Davydov <vdavydov@virtuozzo.com>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Mel Gorman <mgorman@techsingularity.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/vmscan.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/mm/vmscan.c b/mm/vmscan.c
index 930f7c67a9c16..12a69e6c10ba8 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -2057,10 +2057,16 @@ static void get_scan_count(struct lruvec *lruvec, int swappiness,
 	}
 
 	/*
-	 * There is enough inactive page cache, do not reclaim
-	 * anything from the anonymous working set right now.
+	 * If there is enough inactive page cache, i.e. if the size of the
+	 * inactive list is greater than that of the active list *and* the
+	 * inactive list actually has some pages to scan on this priority, we
+	 * do not reclaim anything from the anonymous working set right now.
+	 * Without the second condition we could end up never scanning an
+	 * lruvec even if it has plenty of old anonymous pages unless the
+	 * system is under heavy pressure.
 	 */
-	if (!inactive_file_is_low(lruvec)) {
+	if (!inactive_file_is_low(lruvec) &&
+	    get_lru_size(lruvec, LRU_INACTIVE_FILE) >> sc->priority) {
 		scan_balance = SCAN_FILE;
 		goto out;
 	}

From e90c2032532eaabc1e5e43de0ffbf88a28bd1e2d Mon Sep 17 00:00:00 2001
From: Johannes Weiner <hannes@cmpxchg.org>
Date: Thu, 14 Jan 2016 15:20:18 -0800
Subject: [PATCH 0159/1852] proc: meminfo: estimate available memory more
 conservatively

commit 84ad5802a33a4964a49b8f7d24d80a214a096b19 upstream.

The MemAvailable item in /proc/meminfo is to give users a hint of how
much memory is allocatable without causing swapping, so it excludes the
zones' low watermarks as unavailable to userspace.

However, for a userspace allocation, kswapd will actually reclaim until
the free pages hit a combination of the high watermark and the page
allocator's lowmem protection that keeps a certain amount of DMA and
DMA32 memory from userspace as well.

Subtract the full amount we know to be unavailable to userspace from the
number of free pages when calculating MemAvailable.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Mel Gorman <mgorman@suse.de>
Acked-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/meminfo.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/fs/proc/meminfo.c b/fs/proc/meminfo.c
index 9155a5a0d3b9d..df4661abadc40 100644
--- a/fs/proc/meminfo.c
+++ b/fs/proc/meminfo.c
@@ -57,11 +57,8 @@ static int meminfo_proc_show(struct seq_file *m, void *v)
 	/*
 	 * Estimate the amount of memory available for userspace allocations,
 	 * without causing swapping.
-	 *
-	 * Free memory cannot be taken below the low watermark, before the
-	 * system starts swapping.
 	 */
-	available = i.freeram - wmark_low;
+	available = i.freeram - totalreserve_pages;
 
 	/*
 	 * Not all the page cache can be freed, otherwise the system will

From f47f3ffd903a882e53e0ad0c73c64a918c844256 Mon Sep 17 00:00:00 2001
From: Mel Gorman <mgorman@techsingularity.net>
Date: Tue, 15 Mar 2016 14:55:36 -0700
Subject: [PATCH 0160/1852] mm: filemap: remove redundant code in
 do_read_cache_page

commit 32b635298ff4e991d8d8f64dc23782b02eec29c3 upstream.

do_read_cache_page and __read_cache_page duplicate page filler code when
filling the page for the first time.  This patch simply removes the
duplicate logic.

Signed-off-by: Mel Gorman <mgorman@techsingularity.net>
Reviewed-by: Jan Kara <jack@suse.cz>
Cc: Hugh Dickins <hughd@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/filemap.c | 43 ++++++++++++-------------------------------
 1 file changed, 12 insertions(+), 31 deletions(-)

diff --git a/mm/filemap.c b/mm/filemap.c
index b15f1d8bba439..87795b4330086 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -2215,7 +2215,7 @@ static struct page *wait_on_page_read(struct page *page)
 	return page;
 }
 
-static struct page *__read_cache_page(struct address_space *mapping,
+static struct page *do_read_cache_page(struct address_space *mapping,
 				pgoff_t index,
 				int (*filler)(void *, struct page *),
 				void *data,
@@ -2237,31 +2237,19 @@ static struct page *__read_cache_page(struct address_space *mapping,
 			/* Presumably ENOMEM for radix tree node */
 			return ERR_PTR(err);
 		}
+
+filler:
 		err = filler(data, page);
 		if (err < 0) {
 			page_cache_release(page);
-			page = ERR_PTR(err);
-		} else {
-			page = wait_on_page_read(page);
+			return ERR_PTR(err);
 		}
-	}
-	return page;
-}
-
-static struct page *do_read_cache_page(struct address_space *mapping,
-				pgoff_t index,
-				int (*filler)(void *, struct page *),
-				void *data,
-				gfp_t gfp)
-
-{
-	struct page *page;
-	int err;
 
-retry:
-	page = __read_cache_page(mapping, index, filler, data, gfp);
-	if (IS_ERR(page))
-		return page;
+		page = wait_on_page_read(page);
+		if (IS_ERR(page))
+			return page;
+		goto out;
+	}
 	if (PageUptodate(page))
 		goto out;
 
@@ -2269,21 +2257,14 @@ static struct page *do_read_cache_page(struct address_space *mapping,
 	if (!page->mapping) {
 		unlock_page(page);
 		page_cache_release(page);
-		goto retry;
+		goto repeat;
 	}
 	if (PageUptodate(page)) {
 		unlock_page(page);
 		goto out;
 	}
-	err = filler(data, page);
-	if (err < 0) {
-		page_cache_release(page);
-		return ERR_PTR(err);
-	} else {
-		page = wait_on_page_read(page);
-		if (IS_ERR(page))
-			return page;
-	}
+	goto filler;
+
 out:
 	mark_page_accessed(page);
 	return page;

From f158d179dd2ebdc4c6f4a637691e7e3fe1549ba1 Mon Sep 17 00:00:00 2001
From: Mel Gorman <mgorman@techsingularity.net>
Date: Tue, 15 Mar 2016 14:55:39 -0700
Subject: [PATCH 0161/1852] mm: filemap: avoid unnecessary calls to lock_page
 when waiting for IO to complete during a read

commit ebded02788b5d7c7600f8cff26ae07896d568649 upstream.

In the generic read paths the kernel looks up a page in the page cache
and if it's up to date, it is used.  If not, the page lock is acquired
to wait for IO to complete and then check the page.  If multiple
processes are waiting on IO, they all serialise against the lock and
duplicate the checks.  This is unnecessary.

The page lock in itself does not give any guarantees to the callers
about the page state as it can be immediately truncated or reclaimed
after the page is unlocked.  It's sufficient to wait_on_page_locked and
then continue if the page is up to date on wakeup.

It is possible that a truncated but up-to-date page is returned but the
reference taken during read prevents it disappearing underneath the
caller and the data is still valid if PageUptodate.

The overall impact is small as even if processes serialise on the lock,
the lock section is tiny once the IO is complete.  Profiles indicated
that unlock_page and friends are generally a tiny portion of a
read-intensive workload.  An artificial test was created that had
instances of dd access a cache-cold file on an ext4 filesystem and
measure how long the read took.

paralleldd
                                    4.4.0                 4.4.0
                                  vanilla             avoidlock
Amean    Elapsd-1          5.28 (  0.00%)        5.15 (  2.50%)
Amean    Elapsd-4          5.29 (  0.00%)        5.17 (  2.12%)
Amean    Elapsd-7          5.28 (  0.00%)        5.18 (  1.78%)
Amean    Elapsd-12         5.20 (  0.00%)        5.33 ( -2.50%)
Amean    Elapsd-21         5.14 (  0.00%)        5.21 ( -1.41%)
Amean    Elapsd-30         5.30 (  0.00%)        5.12 (  3.38%)
Amean    Elapsd-48         5.78 (  0.00%)        5.42 (  6.21%)
Amean    Elapsd-79         6.78 (  0.00%)        6.62 (  2.46%)
Amean    Elapsd-110        9.09 (  0.00%)        8.99 (  1.15%)
Amean    Elapsd-128       10.60 (  0.00%)       10.43 (  1.66%)

The impact is small but intuitively, it makes sense to avoid unnecessary
calls to lock_page.

Signed-off-by: Mel Gorman <mgorman@techsingularity.net>
Reviewed-by: Jan Kara <jack@suse.cz>
Cc: Hugh Dickins <hughd@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/filemap.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/mm/filemap.c b/mm/filemap.c
index 87795b4330086..21e750b6e810f 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1581,6 +1581,15 @@ static ssize_t do_generic_file_read(struct file *filp, loff_t *ppos,
 					index, last_index - index);
 		}
 		if (!PageUptodate(page)) {
+			/*
+			 * See comment in do_read_cache_page on why
+			 * wait_on_page_locked is used to avoid unnecessarily
+			 * serialisations and why it's safe.
+			 */
+			wait_on_page_locked_killable(page);
+			if (PageUptodate(page))
+				goto page_ok;
+
 			if (inode->i_blkbits == PAGE_CACHE_SHIFT ||
 					!mapping->a_ops->is_partially_uptodate)
 				goto page_not_up_to_date;
@@ -2253,12 +2262,52 @@ static struct page *do_read_cache_page(struct address_space *mapping,
 	if (PageUptodate(page))
 		goto out;
 
+	/*
+	 * Page is not up to date and may be locked due one of the following
+	 * case a: Page is being filled and the page lock is held
+	 * case b: Read/write error clearing the page uptodate status
+	 * case c: Truncation in progress (page locked)
+	 * case d: Reclaim in progress
+	 *
+	 * Case a, the page will be up to date when the page is unlocked.
+	 *    There is no need to serialise on the page lock here as the page
+	 *    is pinned so the lock gives no additional protection. Even if the
+	 *    the page is truncated, the data is still valid if PageUptodate as
+	 *    it's a race vs truncate race.
+	 * Case b, the page will not be up to date
+	 * Case c, the page may be truncated but in itself, the data may still
+	 *    be valid after IO completes as it's a read vs truncate race. The
+	 *    operation must restart if the page is not uptodate on unlock but
+	 *    otherwise serialising on page lock to stabilise the mapping gives
+	 *    no additional guarantees to the caller as the page lock is
+	 *    released before return.
+	 * Case d, similar to truncation. If reclaim holds the page lock, it
+	 *    will be a race with remove_mapping that determines if the mapping
+	 *    is valid on unlock but otherwise the data is valid and there is
+	 *    no need to serialise with page lock.
+	 *
+	 * As the page lock gives no additional guarantee, we optimistically
+	 * wait on the page to be unlocked and check if it's up to date and
+	 * use the page if it is. Otherwise, the page lock is required to
+	 * distinguish between the different cases. The motivation is that we
+	 * avoid spurious serialisations and wakeups when multiple processes
+	 * wait on the same page for IO to complete.
+	 */
+	wait_on_page_locked(page);
+	if (PageUptodate(page))
+		goto out;
+
+	/* Distinguish between all the cases under the safety of the lock */
 	lock_page(page);
+
+	/* Case c or d, restart the operation */
 	if (!page->mapping) {
 		unlock_page(page);
 		page_cache_release(page);
 		goto repeat;
 	}
+
+	/* Someone else locked and filled the page in a very small window */
 	if (PageUptodate(page)) {
 		unlock_page(page);
 		goto out;

From d48989dc4eef599afcdc86e32a5f19fc1716d49f Mon Sep 17 00:00:00 2001
From: Waiman Long <Waiman.Long@hpe.com>
Date: Wed, 14 Dec 2016 15:04:10 -0800
Subject: [PATCH 0162/1852] signals: avoid unnecessary taking of
 sighand->siglock

commit c7be96af89d4b53211862d8599b2430e8900ed92 upstream.

When running certain database workload on a high-end system with many
CPUs, it was found that spinlock contention in the sigprocmask syscalls
became a significant portion of the overall CPU cycles as shown below.

  9.30%  9.30%  905387  dataserver  /proc/kcore 0x7fff8163f4d2
  [k] _raw_spin_lock_irq
            |
            ---_raw_spin_lock_irq
               |
               |--99.34%-- __set_current_blocked
               |          sigprocmask
               |          sys_rt_sigprocmask
               |          system_call_fastpath
               |          |
               |          |--50.63%-- __swapcontext
               |          |          |
               |          |          |--99.91%-- upsleepgeneric
               |          |
               |          |--49.36%-- __setcontext
               |          |          ktskRun

Looking further into the swapcontext function in glibc, it was found that
the function always call sigprocmask() without checking if there are
changes in the signal mask.

A check was added to the __set_current_blocked() function to avoid taking
the sighand->siglock spinlock if there is no change in the signal mask.
This will prevent unneeded spinlock contention when many threads are
trying to call sigprocmask().

With this patch applied, the spinlock contention in sigprocmask() was
gone.

Link: http://lkml.kernel.org/r/1474979209-11867-1-git-send-email-Waiman.Long@hpe.com
Signed-off-by: Waiman Long <Waiman.Long@hpe.com>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Stas Sergeev <stsp@list.ru>
Cc: Scott J Norton <scott.norton@hpe.com>
Cc: Douglas Hatch <doug.hatch@hpe.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/signal.h | 17 +++++++++++++++++
 kernel/signal.c        |  7 +++++++
 2 files changed, 24 insertions(+)

diff --git a/include/linux/signal.h b/include/linux/signal.h
index d80259afb9e5f..bcc094cb697cc 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -97,6 +97,23 @@ static inline int sigisemptyset(sigset_t *set)
 	}
 }
 
+static inline int sigequalsets(const sigset_t *set1, const sigset_t *set2)
+{
+	switch (_NSIG_WORDS) {
+	case 4:
+		return	(set1->sig[3] == set2->sig[3]) &&
+			(set1->sig[2] == set2->sig[2]) &&
+			(set1->sig[1] == set2->sig[1]) &&
+			(set1->sig[0] == set2->sig[0]);
+	case 2:
+		return	(set1->sig[1] == set2->sig[1]) &&
+			(set1->sig[0] == set2->sig[0]);
+	case 1:
+		return	set1->sig[0] == set2->sig[0];
+	}
+	return 0;
+}
+
 #define sigmask(sig)	(1UL << ((sig) - 1))
 
 #ifndef __HAVE_ARCH_SIG_SETOPS
diff --git a/kernel/signal.c b/kernel/signal.c
index 4f8855412c6e9..13783d19438b2 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -2495,6 +2495,13 @@ void __set_current_blocked(const sigset_t *newset)
 {
 	struct task_struct *tsk = current;
 
+	/*
+	 * In case the signal mask hasn't changed, there is nothing we need
+	 * to do. The current->blocked shouldn't be modified by other task.
+	 */
+	if (sigequalsets(&tsk->blocked, newset))
+		return;
+
 	spin_lock_irq(&tsk->sighand->siglock);
 	__set_task_blocked(tsk, newset);
 	spin_unlock_irq(&tsk->sighand->siglock);

From a91efc325927e12d6a48e86570803e205bec6bb6 Mon Sep 17 00:00:00 2001
From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Date: Thu, 25 Feb 2016 15:09:19 -0800
Subject: [PATCH 0163/1852] cpufreq: intel_pstate: Enable HWP by default

commit 7791e4aa59ad724e0b4c8b4dea547a5735108972 upstream.

If the processor supports HWP, enable it by default without checking
for the cpu model. This will allow to enable HWP in all supported
processors without driver change.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpufreq/intel_pstate.c | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 7ff8b15a34225..88728d9970881 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -1361,6 +1361,11 @@ static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
 static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
 #endif /* CONFIG_ACPI */
 
+static const struct x86_cpu_id hwp_support_ids[] __initconst = {
+	{ X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_HWP },
+	{}
+};
+
 static int __init intel_pstate_init(void)
 {
 	int cpu, rc = 0;
@@ -1370,17 +1375,16 @@ static int __init intel_pstate_init(void)
 	if (no_load)
 		return -ENODEV;
 
+	if (x86_match_cpu(hwp_support_ids) && !no_hwp) {
+		copy_cpu_funcs(&core_params.funcs);
+		hwp_active++;
+		goto hwp_cpu_matched;
+	}
+
 	id = x86_match_cpu(intel_pstate_cpu_ids);
 	if (!id)
 		return -ENODEV;
 
-	/*
-	 * The Intel pstate driver will be ignored if the platform
-	 * firmware has its own power management modes.
-	 */
-	if (intel_pstate_platform_pwr_mgmt_exists())
-		return -ENODEV;
-
 	cpu_def = (struct cpu_defaults *)id->driver_data;
 
 	copy_pid_params(&cpu_def->pid_policy);
@@ -1389,17 +1393,20 @@ static int __init intel_pstate_init(void)
 	if (intel_pstate_msrs_not_valid())
 		return -ENODEV;
 
+hwp_cpu_matched:
+	/*
+	 * The Intel pstate driver will be ignored if the platform
+	 * firmware has its own power management modes.
+	 */
+	if (intel_pstate_platform_pwr_mgmt_exists())
+		return -ENODEV;
+
 	pr_info("Intel P-state driver initializing.\n");
 
 	all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
 	if (!all_cpu_data)
 		return -ENOMEM;
 
-	if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp) {
-		pr_info("intel_pstate: HWP enabled\n");
-		hwp_active++;
-	}
-
 	if (!hwp_active && hwp_only)
 		goto out;
 
@@ -1410,6 +1417,9 @@ static int __init intel_pstate_init(void)
 	intel_pstate_debug_expose_params();
 	intel_pstate_sysfs_expose_params();
 
+	if (hwp_active)
+		pr_info("intel_pstate: HWP enabled\n");
+
 	return rc;
 out:
 	get_online_cpus();

From 12c90a974c6df55e0cb3afcbe522e1d2fa1831b6 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Wed, 9 May 2018 14:36:09 -0400
Subject: [PATCH 0164/1852] tracing/x86/xen: Remove zero data size trace events
 trace_xen_mmu_flush_tlb{_all}

commit 45dd9b0666a162f8e4be76096716670cf1741f0e upstream.

Doing an audit of trace events, I discovered two trace events in the xen
subsystem that use a hack to create zero data size trace events. This is not
what trace events are for. Trace events add memory footprint overhead, and
if all you need to do is see if a function is hit or not, simply make that
function noinline and use function tracer filtering.

Worse yet, the hack used was:

 __array(char, x, 0)

Which creates a static string of zero in length. There's assumptions about
such constructs in ftrace that this is a dynamic string that is nul
terminated. This is not the case with these tracepoints and can cause
problems in various parts of ftrace.

Nuke the trace events!

Link: http://lkml.kernel.org/r/20180509144605.5a220327@gandalf.local.home

Cc: stable@vger.kernel.org
Fixes: 95a7d76897c1e ("xen/mmu: Use Xen specific TLB flush instead of the generic one.")
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/xen/mmu.c         |  4 ----
 include/trace/events/xen.h | 16 ----------------
 2 files changed, 20 deletions(-)

diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 63146c378f1e7..2b05f681a1fdd 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1316,8 +1316,6 @@ void xen_flush_tlb_all(void)
 	struct mmuext_op *op;
 	struct multicall_space mcs;
 
-	trace_xen_mmu_flush_tlb_all(0);
-
 	preempt_disable();
 
 	mcs = xen_mc_entry(sizeof(*op));
@@ -1335,8 +1333,6 @@ static void xen_flush_tlb(void)
 	struct mmuext_op *op;
 	struct multicall_space mcs;
 
-	trace_xen_mmu_flush_tlb(0);
-
 	preempt_disable();
 
 	mcs = xen_mc_entry(sizeof(*op));
diff --git a/include/trace/events/xen.h b/include/trace/events/xen.h
index bce990f5a35d7..d6be935caa501 100644
--- a/include/trace/events/xen.h
+++ b/include/trace/events/xen.h
@@ -377,22 +377,6 @@ DECLARE_EVENT_CLASS(xen_mmu_pgd,
 DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_pin);
 DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_unpin);
 
-TRACE_EVENT(xen_mmu_flush_tlb_all,
-	    TP_PROTO(int x),
-	    TP_ARGS(x),
-	    TP_STRUCT__entry(__array(char, x, 0)),
-	    TP_fast_assign((void)x),
-	    TP_printk("%s", "")
-	);
-
-TRACE_EVENT(xen_mmu_flush_tlb,
-	    TP_PROTO(int x),
-	    TP_ARGS(x),
-	    TP_STRUCT__entry(__array(char, x, 0)),
-	    TP_fast_assign((void)x),
-	    TP_printk("%s", "")
-	);
-
 TRACE_EVENT(xen_mmu_flush_tlb_single,
 	    TP_PROTO(unsigned long addr),
 	    TP_ARGS(addr),

From ffad99da825955d18a793a821907e31c30747ce1 Mon Sep 17 00:00:00 2001
From: Mateusz Guzik <mguzik@redhat.com>
Date: Wed, 20 Jan 2016 15:01:05 -0800
Subject: [PATCH 0165/1852] proc read mm's {arg,env}_{start,end} with mmap
 semaphore taken.

commit a3b609ef9f8b1dbfe97034ccad6cd3fe71fbe7ab upstream.

Only functions doing more than one read are modified.  Consumeres
happened to deal with possibly changing data, but it does not seem like
a good thing to rely on.

Signed-off-by: Mateusz Guzik <mguzik@redhat.com>
Acked-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Jarod Wilson <jarod@redhat.com>
Cc: Jan Stancek <jstancek@redhat.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Anshuman Khandual <anshuman.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/base.c | 13 ++++++++++---
 mm/util.c      | 16 ++++++++++++----
 2 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/fs/proc/base.c b/fs/proc/base.c
index 440ec5f002142..d9d3261ff94e6 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -954,6 +954,7 @@ static ssize_t environ_read(struct file *file, char __user *buf,
 	unsigned long src = *ppos;
 	int ret = 0;
 	struct mm_struct *mm = file->private_data;
+	unsigned long env_start, env_end;
 
 	/* Ensure the process spawned far enough to have an environment. */
 	if (!mm || !mm->env_end)
@@ -966,19 +967,25 @@ static ssize_t environ_read(struct file *file, char __user *buf,
 	ret = 0;
 	if (!atomic_inc_not_zero(&mm->mm_users))
 		goto free;
+
+	down_read(&mm->mmap_sem);
+	env_start = mm->env_start;
+	env_end = mm->env_end;
+	up_read(&mm->mmap_sem);
+
 	while (count > 0) {
 		size_t this_len, max_len;
 		int retval;
 
-		if (src >= (mm->env_end - mm->env_start))
+		if (src >= (env_end - env_start))
 			break;
 
-		this_len = mm->env_end - (mm->env_start + src);
+		this_len = env_end - (env_start + src);
 
 		max_len = min_t(size_t, PAGE_SIZE, count);
 		this_len = min(max_len, this_len);
 
-		retval = access_remote_vm(mm, (mm->env_start + src),
+		retval = access_remote_vm(mm, (env_start + src),
 			page, this_len, 0);
 
 		if (retval <= 0) {
diff --git a/mm/util.c b/mm/util.c
index 2ab16a2487768..6ca10015fd419 100644
--- a/mm/util.c
+++ b/mm/util.c
@@ -429,17 +429,25 @@ int get_cmdline(struct task_struct *task, char *buffer, int buflen)
 	int res = 0;
 	unsigned int len;
 	struct mm_struct *mm = get_task_mm(task);
+	unsigned long arg_start, arg_end, env_start, env_end;
 	if (!mm)
 		goto out;
 	if (!mm->arg_end)
 		goto out_mm;	/* Shh! No looking before we're done */
 
-	len = mm->arg_end - mm->arg_start;
+	down_read(&mm->mmap_sem);
+	arg_start = mm->arg_start;
+	arg_end = mm->arg_end;
+	env_start = mm->env_start;
+	env_end = mm->env_end;
+	up_read(&mm->mmap_sem);
+
+	len = arg_end - arg_start;
 
 	if (len > buflen)
 		len = buflen;
 
-	res = access_process_vm(task, mm->arg_start, buffer, len, 0);
+	res = access_process_vm(task, arg_start, buffer, len, 0);
 
 	/*
 	 * If the nul at the end of args has been overwritten, then
@@ -450,10 +458,10 @@ int get_cmdline(struct task_struct *task, char *buffer, int buflen)
 		if (len < res) {
 			res = len;
 		} else {
-			len = mm->env_end - mm->env_start;
+			len = env_end - env_start;
 			if (len > buflen - res)
 				len = buflen - res;
-			res += access_process_vm(task, mm->env_start,
+			res += access_process_vm(task, env_start,
 						 buffer+res, len, 0);
 			res = strnlen(buffer, res);
 		}

From 7ad8803999bc1e66ee0cf4e31599e78747167980 Mon Sep 17 00:00:00 2001
From: Janis Danisevskis <jdanis@google.com>
Date: Fri, 20 May 2016 17:00:08 -0700
Subject: [PATCH 0166/1852] procfs: fix pthread cross-thread naming if
 !PR_DUMPABLE

commit 1b3044e39a89cb1d4d5313da477e8dfea2b5232d upstream.

The PR_DUMPABLE flag causes the pid related paths of the proc file
system to be owned by ROOT.

The implementation of pthread_set/getname_np however needs access to
/proc/<pid>/task/<tid>/comm.  If PR_DUMPABLE is false this
implementation is locked out.

This patch installs a special permission function for the file "comm"
that grants read and write access to all threads of the same group
regardless of the ownership of the inode.  For all other threads the
function falls back to the generic inode permission check.

[akpm@linux-foundation.org: fix spello in comment]
Signed-off-by: Janis Danisevskis <jdanis@google.com>
Acked-by: Kees Cook <keescook@chromium.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Minfei Huang <mnfhuang@gmail.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Calvin Owens <calvinowens@fb.com>
Cc: Jann Horn <jann@thejh.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/base.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/proc/base.c b/fs/proc/base.c
index d9d3261ff94e6..8fc435d802c7c 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -3178,7 +3178,7 @@ int proc_pid_readdir(struct file *file, struct dir_context *ctx)
  * used for the node /proc/<pid>/task/<tid>/comm.
  * It bypasses generic permission checks in the case where a task of the same
  * task group attempts to access the node.
- * The rational behind this is that glibc and bionic access this node for
+ * The rationale behind this is that glibc and bionic access this node for
  * cross thread naming (pthread_set/getname_np(!self)). However, if
  * PR_SET_DUMPABLE gets set to 0 this node among others becomes uid=0 gid=0,
  * which locks out the cross thread naming implementation.

From e3209d36aeed3b6a8a47cb5e65a34f6fd2856977 Mon Sep 17 00:00:00 2001
From: Nicholas Piggin <npiggin@gmail.com>
Date: Tue, 15 May 2018 01:59:47 +1000
Subject: [PATCH 0167/1852] powerpc/powernv: Fix NVRAM sleep in invalid context
 when crashing

commit c1d2a31397ec51f0370f6bd17b19b39152c263cb upstream.

Similarly to opal_event_shutdown, opal_nvram_write can be called in
the crash path with irqs disabled. Special case the delay to avoid
sleeping in invalid context.

Fixes: 3b8070335f75 ("powerpc/powernv: Fix OPAL NVRAM driver OPAL_BUSY loops")
Cc: stable@vger.kernel.org # v3.2
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/powernv/opal-nvram.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/opal-nvram.c b/arch/powerpc/platforms/powernv/opal-nvram.c
index 1bceb95f422d0..5584247f50292 100644
--- a/arch/powerpc/platforms/powernv/opal-nvram.c
+++ b/arch/powerpc/platforms/powernv/opal-nvram.c
@@ -44,6 +44,10 @@ static ssize_t opal_nvram_read(char *buf, size_t count, loff_t *index)
 	return count;
 }
 
+/*
+ * This can be called in the panic path with interrupts off, so use
+ * mdelay in that case.
+ */
 static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
 {
 	s64 rc = OPAL_BUSY;
@@ -58,10 +62,16 @@ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
 	while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 		rc = opal_write_nvram(__pa(buf), count, off);
 		if (rc == OPAL_BUSY_EVENT) {
-			msleep(OPAL_BUSY_DELAY_MS);
+			if (in_interrupt() || irqs_disabled())
+				mdelay(OPAL_BUSY_DELAY_MS);
+			else
+				msleep(OPAL_BUSY_DELAY_MS);
 			opal_poll_events(NULL);
 		} else if (rc == OPAL_BUSY) {
-			msleep(OPAL_BUSY_DELAY_MS);
+			if (in_interrupt() || irqs_disabled())
+				mdelay(OPAL_BUSY_DELAY_MS);
+			else
+				msleep(OPAL_BUSY_DELAY_MS);
 		}
 	}
 

From bd6f145d7effc9722a763ede830e8415b06dde4e Mon Sep 17 00:00:00 2001
From: Pavel Tatashin <pasha.tatashin@oracle.com>
Date: Fri, 18 May 2018 16:09:13 -0700
Subject: [PATCH 0168/1852] mm: don't allow deferred pages with NEED_PER_CPU_KM

commit ab1e8d8960b68f54af42b6484b5950bd13a4054b upstream.

It is unsafe to do virtual to physical translations before mm_init() is
called if struct page is needed in order to determine the memory section
number (see SECTION_IN_PAGE_FLAGS).  This is because only in mm_init()
we initialize struct pages for all the allocated memory when deferred
struct pages are used.

My recent fix in commit c9e97a1997 ("mm: initialize pages on demand
during boot") exposed this problem, because it greatly reduced number of
pages that are initialized before mm_init(), but the problem existed
even before my fix, as Fengguang Wu found.

Below is a more detailed explanation of the problem.

We initialize struct pages in four places:

1. Early in boot a small set of struct pages is initialized to fill the
   first section, and lower zones.

2. During mm_init() we initialize "struct pages" for all the memory that
   is allocated, i.e reserved in memblock.

3. Using on-demand logic when pages are allocated after mm_init call
   (when memblock is finished)

4. After smp_init() when the rest free deferred pages are initialized.

The problem occurs if we try to do va to phys translation of a memory
between steps 1 and 2.  Because we have not yet initialized struct pages
for all the reserved pages, it is inherently unsafe to do va to phys if
the translation itself requires access of "struct page" as in case of
this combination: CONFIG_SPARSE && !CONFIG_SPARSE_VMEMMAP

The following path exposes the problem:

  start_kernel()
   trap_init()
    setup_cpu_entry_areas()
     setup_cpu_entry_area(cpu)
      get_cpu_gdt_paddr(cpu)
       per_cpu_ptr_to_phys(addr)
        pcpu_addr_to_page(addr)
         virt_to_page(addr)
          pfn_to_page(__pa(addr) >> PAGE_SHIFT)

We disable this path by not allowing NEED_PER_CPU_KM with deferred
struct pages feature.

The problems are discussed in these threads:
  http://lkml.kernel.org/r/20180418135300.inazvpxjxowogyge@wfg-t540p.sh.intel.com
  http://lkml.kernel.org/r/20180419013128.iurzouiqxvcnpbvz@wfg-t540p.sh.intel.com
  http://lkml.kernel.org/r/20180426202619.2768-1-pasha.tatashin@oracle.com

Link: http://lkml.kernel.org/r/20180515175124.1770-1-pasha.tatashin@oracle.com
Fixes: 3a80a7fa7989 ("mm: meminit: initialise a subset of struct pages if CONFIG_DEFERRED_STRUCT_PAGE_INIT is set")
Signed-off-by: Pavel Tatashin <pasha.tatashin@oracle.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Steven Sistare <steven.sistare@oracle.com>
Cc: Daniel Jordan <daniel.m.jordan@oracle.com>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Fengguang Wu <fengguang.wu@intel.com>
Cc: Dennis Zhou <dennisszhou@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mm/Kconfig b/mm/Kconfig
index 97a4e06b15c00..5753f69b23f40 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -628,6 +628,7 @@ config DEFERRED_STRUCT_PAGE_INIT
 	default n
 	depends on ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT
 	depends on MEMORY_HOTPLUG
+	depends on !NEED_PER_CPU_KM
 	help
 	  Ordinarily all struct pages are initialised during early boot in a
 	  single thread. On very large machines this can take a considerable

From a6959e14b4e45cc7c54631b7e504d12a9dcd08a8 Mon Sep 17 00:00:00 2001
From: Julian Wiedmann <jwi@linux.ibm.com>
Date: Wed, 2 May 2018 08:48:43 +0200
Subject: [PATCH 0169/1852] s390/qdio: fix access to uninitialized qdio_q
 fields

commit e521813468f786271a87e78e8644243bead48fad upstream.

Ever since CQ/QAOB support was added, calling qdio_free() straight after
qdio_alloc() results in qdio_release_memory() accessing uninitialized
memory (ie. q->u.out.use_cq and q->u.out.aobs). Followed by a
kmem_cache_free() on the random AOB addresses.

For older kernels that don't have 6e30c549f6ca, the same applies if
qdio_establish() fails in the DEV_STATE_ONLINE check.

While initializing q->u.out.use_cq would be enough to fix this
particular bug, the more future-proof change is to just zero-alloc the
whole struct.

Fixes: 104ea556ee7f ("qdio: support asynchronous delivery of storage blocks")
Cc: <stable@vger.kernel.org> #v3.2+
Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/cio/qdio_setup.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 48b3866a9ded3..3da5f3f3cf8b5 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -140,7 +140,7 @@ static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
 	int i;
 
 	for (i = 0; i < nr_queues; i++) {
-		q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
+		q = kmem_cache_zalloc(qdio_q_cache, GFP_KERNEL);
 		if (!q)
 			return -ENOMEM;
 

From fe1961b40130dbfcb6367d292a960f97d8b48e83 Mon Sep 17 00:00:00 2001
From: Hendrik Brueckner <brueckner@linux.ibm.com>
Date: Thu, 3 May 2018 15:56:15 +0200
Subject: [PATCH 0170/1852] s390/cpum_sf: ensure sample frequency of perf event
 attributes is non-zero

commit 4bbaf2584b86b0772413edeac22ff448f36351b1 upstream.

Correct a trinity finding for the perf_event_open() system call with
a perf event attribute structure that uses a frequency but has the
sampling frequency set to zero.  This causes a FP divide exception during
the sample rate initialization for the hardware sampling facility.

Fixes: 8c069ff4bd606 ("s390/perf: add support for the CPU-Measurement Sampling Facility")
Cc: stable@vger.kernel.org # 3.14+
Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/kernel/perf_cpum_sf.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c
index 3d8da1e742c2b..b79d51459cf25 100644
--- a/arch/s390/kernel/perf_cpum_sf.c
+++ b/arch/s390/kernel/perf_cpum_sf.c
@@ -744,6 +744,10 @@ static int __hw_perf_event_init(struct perf_event *event)
 	 */
 	rate = 0;
 	if (attr->freq) {
+		if (!attr->sample_freq) {
+			err = -EINVAL;
+			goto out;
+		}
 		rate = freq_to_sample_rate(&si, attr->sample_freq);
 		rate = hw_limit_rate(&si, rate);
 		attr->freq = 0;

From bf611a6554fcf5c311d1cf8f04062c4869af6344 Mon Sep 17 00:00:00 2001
From: Julian Wiedmann <jwi@linux.ibm.com>
Date: Wed, 2 May 2018 08:28:34 +0200
Subject: [PATCH 0171/1852] s390/qdio: don't release memory in qdio_setup_irq()

commit 2e68adcd2fb21b7188ba449f0fab3bee2910e500 upstream.

Calling qdio_release_memory() on error is just plain wrong. It frees
the main qdio_irq struct, when following code still uses it.

Also, no other error path in qdio_establish() does this. So trust
callers to clean up via qdio_free() if some step of the QDIO
initialization fails.

Fixes: 779e6e1c724d ("[S390] qdio: new qdio driver.")
Cc: <stable@vger.kernel.org> #v2.6.27+
Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/cio/qdio_setup.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 3da5f3f3cf8b5..35286907c6363 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -456,7 +456,6 @@ int qdio_setup_irq(struct qdio_initialize *init_data)
 {
 	struct ciw *ciw;
 	struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
-	int rc;
 
 	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
 	memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
@@ -493,16 +492,14 @@ int qdio_setup_irq(struct qdio_initialize *init_data)
 	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
 	if (!ciw) {
 		DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
-		rc = -EINVAL;
-		goto out_err;
+		return -EINVAL;
 	}
 	irq_ptr->equeue = *ciw;
 
 	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
 	if (!ciw) {
 		DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
-		rc = -EINVAL;
-		goto out_err;
+		return -EINVAL;
 	}
 	irq_ptr->aqueue = *ciw;
 
@@ -510,9 +507,6 @@ int qdio_setup_irq(struct qdio_initialize *init_data)
 	irq_ptr->orig_handler = init_data->cdev->handler;
 	init_data->cdev->handler = qdio_int_handler;
 	return 0;
-out_err:
-	qdio_release_memory(irq_ptr);
-	return rc;
 }
 
 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,

From 6a1cf0481df434c1edc9134042a02caea3f147eb Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Tue, 24 Apr 2018 11:18:49 +0200
Subject: [PATCH 0172/1852] s390: remove indirect branch from
 do_softirq_own_stack

commit 9f18fff63cfd6f559daa1eaae60640372c65f84b upstream.

The inline assembly to call __do_softirq on the irq stack uses
an indirect branch. This can be replaced with a normal relative
branch.

Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/kernel/irq.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index f41d5208aaf76..590e9394b4ddf 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -173,10 +173,9 @@ void do_softirq_own_stack(void)
 		new -= STACK_FRAME_OVERHEAD;
 		((struct stack_frame *) new)->back_chain = old;
 		asm volatile("   la    15,0(%0)\n"
-			     "   basr  14,%2\n"
+			     "   brasl 14,__do_softirq\n"
 			     "   la    15,0(%1)\n"
-			     : : "a" (new), "a" (old),
-			         "a" (__do_softirq)
+			     : : "a" (new), "a" (old)
 			     : "0", "1", "2", "3", "4", "5", "14",
 			       "cc", "memory" );
 	} else {

From 71d70fdb9acd40811fbb72bd93b5b2a0541b6940 Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Fri, 4 May 2018 07:59:58 +0200
Subject: [PATCH 0173/1852] efi: Avoid potential crashes, fix the 'struct
 efi_pci_io_protocol_32' definition for mixed mode

commit 0b3225ab9407f557a8e20f23f37aa7236c10a9b1 upstream.

Mixed mode allows a kernel built for x86_64 to interact with 32-bit
EFI firmware, but requires us to define all struct definitions carefully
when it comes to pointer sizes.

'struct efi_pci_io_protocol_32' currently uses a 'void *' for the
'romimage' field, which will be interpreted as a 64-bit field
on such kernels, potentially resulting in bogus memory references
and subsequent crashes.

Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: <stable@vger.kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20180504060003.19618-13-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/boot/compressed/eboot.c | 6 ++++--
 include/linux/efi.h              | 8 ++++----
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index 583d539a41977..2bc6651791cc8 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -364,7 +364,8 @@ __setup_efi_pci32(efi_pci_io_protocol_32 *pci, struct pci_setup_rom **__rom)
 	if (status != EFI_SUCCESS)
 		goto free_struct;
 
-	memcpy(rom->romdata, pci->romimage, pci->romsize);
+	memcpy(rom->romdata, (void *)(unsigned long)pci->romimage,
+	       pci->romsize);
 	return status;
 
 free_struct:
@@ -470,7 +471,8 @@ __setup_efi_pci64(efi_pci_io_protocol_64 *pci, struct pci_setup_rom **__rom)
 	if (status != EFI_SUCCESS)
 		goto free_struct;
 
-	memcpy(rom->romdata, pci->romimage, pci->romsize);
+	memcpy(rom->romdata, (void *)(unsigned long)pci->romimage,
+	       pci->romsize);
 	return status;
 
 free_struct:
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 516d830412065..bfe8e8eaab763 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -364,8 +364,8 @@ typedef struct {
 	u32 attributes;
 	u32 get_bar_attributes;
 	u32 set_bar_attributes;
-	uint64_t romsize;
-	void *romimage;
+	u64 romsize;
+	u32 romimage;
 } efi_pci_io_protocol_32;
 
 typedef struct {
@@ -384,8 +384,8 @@ typedef struct {
 	u64 attributes;
 	u64 get_bar_attributes;
 	u64 set_bar_attributes;
-	uint64_t romsize;
-	void *romimage;
+	u64 romsize;
+	u64 romimage;
 } efi_pci_io_protocol_64;
 
 typedef struct {

From fffe5b28f17fd4366694a153f3259b2aba05f2a3 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sun, 13 May 2018 05:04:16 +0100
Subject: [PATCH 0174/1852] ARM: 8771/1: kprobes: Prohibit kprobes on
 do_undefinstr

commit eb0146daefdde65665b7f076fbff7b49dade95b9 upstream.

Prohibit kprobes on do_undefinstr because kprobes on
arm is implemented by undefined instruction. This means
if we probe do_undefinstr(), it can cause infinit
recursive exception.

Fixes: 24ba613c9d6c ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/kernel/traps.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index c92b535150a0e..306a2a5817854 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -19,6 +19,7 @@
 #include <linux/uaccess.h>
 #include <linux/hardirq.h>
 #include <linux/kdebug.h>
+#include <linux/kprobes.h>
 #include <linux/module.h>
 #include <linux/kexec.h>
 #include <linux/bug.h>
@@ -395,7 +396,8 @@ void unregister_undef_hook(struct undef_hook *hook)
 	raw_spin_unlock_irqrestore(&undef_lock, flags);
 }
 
-static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
+static nokprobe_inline
+int call_undef_hook(struct pt_regs *regs, unsigned int instr)
 {
 	struct undef_hook *hook;
 	unsigned long flags;
@@ -468,6 +470,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 
 	arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6);
 }
+NOKPROBE_SYMBOL(do_undefinstr)
 
 /*
  * Handle FIQ similarly to NMI on x86 systems.

From fb1dad5a8927a66f9a00c78294b2130065c10eed Mon Sep 17 00:00:00 2001
From: Dexuan Cui <decui@microsoft.com>
Date: Tue, 15 May 2018 19:52:50 +0000
Subject: [PATCH 0175/1852] tick/broadcast: Use for_each_cpu() specially on UP
 kernels

commit 5596fe34495cf0f645f417eb928ef224df3e3cb4 upstream.

for_each_cpu() unintuitively reports CPU0 as set independent of the actual
cpumask content on UP kernels. This causes an unexpected PIT interrupt
storm on a UP kernel running in an SMP virtual machine on Hyper-V, and as
a result, the virtual machine can suffer from a strange random delay of 1~20
minutes during boot-up, and sometimes it can hang forever.

Protect if by checking whether the cpumask is empty before entering the
for_each_cpu() loop.

[ tglx: Use !IS_ENABLED(CONFIG_SMP) instead of #ifdeffery ]

Signed-off-by: Dexuan Cui <decui@microsoft.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Josh Poulson <jopoulso@microsoft.com>
Cc: "Michael Kelley (EOSG)" <Michael.H.Kelley@microsoft.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: stable@vger.kernel.org
Cc: Rakib Mullick <rakib.mullick@gmail.com>
Cc: Jork Loeser <Jork.Loeser@microsoft.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: KY Srinivasan <kys@microsoft.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Link: https://lkml.kernel.org/r/KL1P15301MB000678289FE55BA365B3279ABF990@KL1P15301MB0006.APCP153.PROD.OUTLOOK.COM
Link: https://lkml.kernel.org/r/KL1P15301MB0006FA63BC22BEB64902EAA0BF930@KL1P15301MB0006.APCP153.PROD.OUTLOOK.COM
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/time/tick-broadcast.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c
index d2a20e83ebaed..22d7454b387bc 100644
--- a/kernel/time/tick-broadcast.c
+++ b/kernel/time/tick-broadcast.c
@@ -610,6 +610,14 @@ static void tick_handle_oneshot_broadcast(struct clock_event_device *dev)
 	now = ktime_get();
 	/* Find all expired events */
 	for_each_cpu(cpu, tick_broadcast_oneshot_mask) {
+		/*
+		 * Required for !SMP because for_each_cpu() reports
+		 * unconditionally CPU0 as set on UP kernels.
+		 */
+		if (!IS_ENABLED(CONFIG_SMP) &&
+		    cpumask_empty(tick_broadcast_oneshot_mask))
+			break;
+
 		td = &per_cpu(tick_cpu_device, cpu);
 		if (td->evtdev->next_event.tv64 <= now.tv64) {
 			cpumask_set_cpu(cpu, tmpmask);

From eced767f4c1c880bd96eb8dc52781179b7095056 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sun, 13 May 2018 05:03:54 +0100
Subject: [PATCH 0176/1852] ARM: 8769/1: kprobes: Fix to use get_kprobe_ctlblk
 after irq-disabed

commit 69af7e23a6870df2ea6fa79ca16493d59b3eebeb upstream.

Since get_kprobe_ctlblk() uses smp_processor_id() to access
per-cpu variable, it hits smp_processor_id sanity check as below.

[    7.006928] BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
[    7.007859] caller is debug_smp_processor_id+0x20/0x24
[    7.008438] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.16.0-rc1-00192-g4eb17253e4b5 #1
[    7.008890] Hardware name: Generic DT based system
[    7.009917] [<c0313f0c>] (unwind_backtrace) from [<c030e6d8>] (show_stack+0x20/0x24)
[    7.010473] [<c030e6d8>] (show_stack) from [<c0c64694>] (dump_stack+0x84/0x98)
[    7.010990] [<c0c64694>] (dump_stack) from [<c071ca5c>] (check_preemption_disabled+0x138/0x13c)
[    7.011592] [<c071ca5c>] (check_preemption_disabled) from [<c071ca80>] (debug_smp_processor_id+0x20/0x24)
[    7.012214] [<c071ca80>] (debug_smp_processor_id) from [<c03335e0>] (optimized_callback+0x2c/0xe4)
[    7.013077] [<c03335e0>] (optimized_callback) from [<bf0021b0>] (0xbf0021b0)

To fix this issue, call get_kprobe_ctlblk() right after
irq-disabled since that disables preemption.

Fixes: 0dc016dbd820 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/probes/kprobes/opt-arm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c
index bcdecc25461bc..ddc5a82eb10d9 100644
--- a/arch/arm/probes/kprobes/opt-arm.c
+++ b/arch/arm/probes/kprobes/opt-arm.c
@@ -165,13 +165,14 @@ optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
 {
 	unsigned long flags;
 	struct kprobe *p = &op->kp;
-	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+	struct kprobe_ctlblk *kcb;
 
 	/* Save skipped registers */
 	regs->ARM_pc = (unsigned long)op->kp.addr;
 	regs->ARM_ORIG_r0 = ~0UL;
 
 	local_irq_save(flags);
+	kcb = get_kprobe_ctlblk();
 
 	if (kprobe_running()) {
 		kprobes_inc_nmissed_count(&op->kp);

From b691ebc03f8f4dc9d4f49624fb904eb066df5ef7 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sun, 13 May 2018 05:04:10 +0100
Subject: [PATCH 0177/1852] ARM: 8770/1: kprobes: Prohibit probing on
 optimized_callback

commit 70948c05fdde0aac32f9667856a88725c192fa40 upstream.

Prohibit probing on optimized_callback() because
it is called from kprobes itself. If we put a kprobes
on it, that will cause a recursive call loop.
Mark it NOKPROBE_SYMBOL.

Fixes: 0dc016dbd820 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/probes/kprobes/opt-arm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c
index ddc5a82eb10d9..b2aa9b32bff2b 100644
--- a/arch/arm/probes/kprobes/opt-arm.c
+++ b/arch/arm/probes/kprobes/opt-arm.c
@@ -192,6 +192,7 @@ optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
 
 	local_irq_restore(flags);
 }
+NOKPROBE_SYMBOL(optimized_callback)
 
 int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *orig)
 {

From 3ba58847c72ee55bb869ff59f580d8c5c40c3d9a Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sun, 13 May 2018 05:04:29 +0100
Subject: [PATCH 0178/1852] ARM: 8772/1: kprobes: Prohibit kprobes on get_user
 functions

commit 0d73c3f8e7f6ee2aab1bb350f60c180f5ae21a2c upstream.

Since do_undefinstr() uses get_user to get the undefined
instruction, it can be called before kprobes processes
recursive check. This can cause an infinit recursive
exception.
Prohibit probing on get_user functions.

Fixes: 24ba613c9d6c ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/include/asm/assembler.h | 10 ++++++++++
 arch/arm/lib/getuser.S           | 10 ++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 2c16d9e7c03ca..4a275fba6059d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -530,4 +530,14 @@ THUMB(	orr	\reg , \reg , #PSR_T_BIT	)
 #endif
 	.endm
 
+#ifdef CONFIG_KPROBES
+#define _ASM_NOKPROBE(entry)				\
+	.pushsection "_kprobe_blacklist", "aw" ;	\
+	.balign 4 ;					\
+	.long entry;					\
+	.popsection
+#else
+#define _ASM_NOKPROBE(entry)
+#endif
+
 #endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index df73914e81c83..746e7801dcdf7 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -38,6 +38,7 @@ ENTRY(__get_user_1)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_1)
+_ASM_NOKPROBE(__get_user_1)
 
 ENTRY(__get_user_2)
 	check_uaccess r0, 2, r1, r2, __get_user_bad
@@ -58,6 +59,7 @@ rb	.req	r0
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_2)
+_ASM_NOKPROBE(__get_user_2)
 
 ENTRY(__get_user_4)
 	check_uaccess r0, 4, r1, r2, __get_user_bad
@@ -65,6 +67,7 @@ ENTRY(__get_user_4)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_4)
+_ASM_NOKPROBE(__get_user_4)
 
 ENTRY(__get_user_8)
 	check_uaccess r0, 8, r1, r2, __get_user_bad8
@@ -78,6 +81,7 @@ ENTRY(__get_user_8)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_8)
+_ASM_NOKPROBE(__get_user_8)
 
 #ifdef __ARMEB__
 ENTRY(__get_user_32t_8)
@@ -91,6 +95,7 @@ ENTRY(__get_user_32t_8)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_32t_8)
+_ASM_NOKPROBE(__get_user_32t_8)
 
 ENTRY(__get_user_64t_1)
 	check_uaccess r0, 1, r1, r2, __get_user_bad8
@@ -98,6 +103,7 @@ ENTRY(__get_user_64t_1)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_64t_1)
+_ASM_NOKPROBE(__get_user_64t_1)
 
 ENTRY(__get_user_64t_2)
 	check_uaccess r0, 2, r1, r2, __get_user_bad8
@@ -114,6 +120,7 @@ rb	.req	r0
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_64t_2)
+_ASM_NOKPROBE(__get_user_64t_2)
 
 ENTRY(__get_user_64t_4)
 	check_uaccess r0, 4, r1, r2, __get_user_bad8
@@ -121,6 +128,7 @@ ENTRY(__get_user_64t_4)
 	mov	r0, #0
 	ret	lr
 ENDPROC(__get_user_64t_4)
+_ASM_NOKPROBE(__get_user_64t_4)
 #endif
 
 __get_user_bad8:
@@ -131,6 +139,8 @@ __get_user_bad:
 	ret	lr
 ENDPROC(__get_user_bad)
 ENDPROC(__get_user_bad8)
+_ASM_NOKPROBE(__get_user_bad)
+_ASM_NOKPROBE(__get_user_bad8)
 
 .pushsection __ex_table, "a"
 	.long	1b, __get_user_bad

From b0fce0b735100ffec171448098acd0ed80e57f49 Mon Sep 17 00:00:00 2001
From: Filipe Manana <fdmanana@suse.com>
Date: Fri, 11 May 2018 16:42:42 +0100
Subject: [PATCH 0179/1852] Btrfs: fix xattr loss after power failure

commit 9a8fca62aacc1599fea8e813d01e1955513e4fad upstream.

If a file has xattrs, we fsync it, to ensure we clear the flags
BTRFS_INODE_NEEDS_FULL_SYNC and BTRFS_INODE_COPY_EVERYTHING from its
inode, the current transaction commits and then we fsync it (without
either of those bits being set in its inode), we end up not logging
all its xattrs. This results in deleting all xattrs when replying the
log after a power failure.

Trivial reproducer

  $ mkfs.btrfs -f /dev/sdb
  $ mount /dev/sdb /mnt

  $ touch /mnt/foobar
  $ setfattr -n user.xa -v qwerty /mnt/foobar
  $ xfs_io -c "fsync" /mnt/foobar

  $ sync

  $ xfs_io -c "pwrite -S 0xab 0 64K" /mnt/foobar
  $ xfs_io -c "fsync" /mnt/foobar
  <power failure>

  $ mount /dev/sdb /mnt
  $ getfattr --absolute-names --dump /mnt/foobar
  <empty output>
  $

So fix this by making sure all xattrs are logged if we log a file's inode
item and neither the flags BTRFS_INODE_NEEDS_FULL_SYNC nor
BTRFS_INODE_COPY_EVERYTHING were set in the inode.

Fixes: 36283bf777d9 ("Btrfs: fix fsync xattr loss in the fast fsync path")
Cc: <stable@vger.kernel.org> # 4.2+
Signed-off-by: Filipe Manana <fdmanana@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tree-log.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index d6359af9789d7..6ba022ed4a52c 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -4568,6 +4568,7 @@ static int btrfs_log_inode(struct btrfs_trans_handle *trans,
 	struct extent_map_tree *em_tree = &BTRFS_I(inode)->extent_tree;
 	u64 logged_isize = 0;
 	bool need_log_inode_item = true;
+	bool xattrs_logged = false;
 
 	path = btrfs_alloc_path();
 	if (!path)
@@ -4808,6 +4809,7 @@ static int btrfs_log_inode(struct btrfs_trans_handle *trans,
 	err = btrfs_log_all_xattrs(trans, root, inode, path, dst_path);
 	if (err)
 		goto out_unlock;
+	xattrs_logged = true;
 	if (max_key.type >= BTRFS_EXTENT_DATA_KEY && !fast_search) {
 		btrfs_release_path(path);
 		btrfs_release_path(dst_path);
@@ -4820,6 +4822,11 @@ static int btrfs_log_inode(struct btrfs_trans_handle *trans,
 	btrfs_release_path(dst_path);
 	if (need_log_inode_item) {
 		err = log_inode_item(trans, log, dst_path, inode);
+		if (!err && !xattrs_logged) {
+			err = btrfs_log_all_xattrs(trans, root, inode, path,
+						   dst_path);
+			btrfs_release_path(path);
+		}
 		if (err)
 			goto out_unlock;
 	}

From 9d76a669734b1da435b2daefd988212d716718fd Mon Sep 17 00:00:00 2001
From: Anand Jain <anand.jain@oracle.com>
Date: Thu, 17 May 2018 15:16:51 +0800
Subject: [PATCH 0180/1852] btrfs: fix crash when trying to resume balance
 without the resume flag

commit 02ee654d3a04563c67bfe658a05384548b9bb105 upstream.

We set the BTRFS_BALANCE_RESUME flag in the btrfs_recover_balance()
only, which isn't called during the remount. So when resuming from
the paused balance we hit the bug:

 kernel: kernel BUG at fs/btrfs/volumes.c:3890!
 ::
 kernel:  balance_kthread+0x51/0x60 [btrfs]
 kernel:  kthread+0x111/0x130
 ::
 kernel: RIP: btrfs_balance+0x12e1/0x1570 [btrfs] RSP: ffffba7d0090bde8

Reproducer:
  On a mounted filesystem:

  btrfs balance start --full-balance /btrfs
  btrfs balance pause /btrfs
  mount -o remount,ro /dev/sdb /btrfs
  mount -o remount,rw /dev/sdb /btrfs

To fix this set the BTRFS_BALANCE_RESUME flag in
btrfs_resume_balance_async().

CC: stable@vger.kernel.org # 4.4+
Signed-off-by: Anand Jain <anand.jain@oracle.com>
Reviewed-by: David Sterba <dsterba@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/volumes.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 6d874b1cd53c6..ed75d70b4bc27 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -3850,6 +3850,15 @@ int btrfs_resume_balance_async(struct btrfs_fs_info *fs_info)
 		return 0;
 	}
 
+	/*
+	 * A ro->rw remount sequence should continue with the paused balance
+	 * regardless of who pauses it, system or the user as of now, so set
+	 * the resume flag.
+	 */
+	spin_lock(&fs_info->balance_lock);
+	fs_info->balance_ctl->flags |= BTRFS_BALANCE_RESUME;
+	spin_unlock(&fs_info->balance_lock);
+
 	tsk = kthread_run(balance_kthread, fs_info, "btrfs-balance");
 	return PTR_ERR_OR_ZERO(tsk);
 }

From 85ce925d7491fd10c7fb48effd47c7c402a93d06 Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.liu@linux.alibaba.com>
Date: Wed, 16 May 2018 01:37:36 +0800
Subject: [PATCH 0181/1852] btrfs: fix reading stale metadata blocks after
 degraded raid1 mounts

commit 02a3307aa9c20b4f6626255b028f07f6cfa16feb upstream.

If a btree block, aka. extent buffer, is not available in the extent
buffer cache, it'll be read out from the disk instead, i.e.

btrfs_search_slot()
  read_block_for_search()  # hold parent and its lock, go to read child
    btrfs_release_path()
    read_tree_block()  # read child

Unfortunately, the parent lock got released before reading child, so
commit 5bdd3536cbbe ("Btrfs: Fix block generation verification race") had
used 0 as parent transid to read the child block.  It forces
read_tree_block() not to check if parent transid is different with the
generation id of the child that it reads out from disk.

A simple PoC is included in btrfs/124,

0. A two-disk raid1 btrfs,

1. Right after mkfs.btrfs, block A is allocated to be device tree's root.

2. Mount this filesystem and put it in use, after a while, device tree's
   root got COW but block A hasn't been allocated/overwritten yet.

3. Umount it and reload the btrfs module to remove both disks from the
   global @fs_devices list.

4. mount -odegraded dev1 and write some data, so now block A is allocated
   to be a leaf in checksum tree.  Note that only dev1 has the latest
   metadata of this filesystem.

5. Umount it and mount it again normally (with both disks), since raid1
   can pick up one disk by the writer task's pid, if btrfs_search_slot()
   needs to read block A, dev2 which does NOT have the latest metadata
   might be read for block A, then we got a stale block A.

6. As parent transid is not checked, block A is marked as uptodate and
   put into the extent buffer cache, so the future search won't bother
   to read disk again, which means it'll make changes on this stale
   one and make it dirty and flush it onto disk.

To avoid the problem, parent transid needs to be passed to
read_tree_block().

In order to get a valid parent transid, we need to hold the parent's
lock until finishing reading child.

This patch needs to be slightly adapted for stable kernels, the
&first_key parameter added to read_tree_block() is from 4.16+
(581c1760415c4). The fix is to replace 0 by 'gen'.

Fixes: 5bdd3536cbbe ("Btrfs: Fix block generation verification race")
CC: stable@vger.kernel.org # 4.4+
Signed-off-by: Liu Bo <bo.liu@linux.alibaba.com>
Reviewed-by: Filipe Manana <fdmanana@suse.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
[ update changelog ]
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/ctree.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c
index 0f2b7c622ce3e..e2f5be261532d 100644
--- a/fs/btrfs/ctree.c
+++ b/fs/btrfs/ctree.c
@@ -2497,10 +2497,8 @@ read_block_for_search(struct btrfs_trans_handle *trans,
 	if (p->reada)
 		reada_for_search(root, p, level, slot, key->objectid);
 
-	btrfs_release_path(p);
-
 	ret = -EAGAIN;
-	tmp = read_tree_block(root, blocknr, 0);
+	tmp = read_tree_block(root, blocknr, gen);
 	if (!IS_ERR(tmp)) {
 		/*
 		 * If the read above didn't mark this buffer up to date,
@@ -2512,6 +2510,8 @@ read_block_for_search(struct btrfs_trans_handle *trans,
 			ret = -EIO;
 		free_extent_buffer(tmp);
 	}
+
+	btrfs_release_path(p);
 	return ret;
 }
 

From 021607974ad033d66bb8b3c78821b142678d6fa3 Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Thu, 17 May 2018 13:13:29 -0400
Subject: [PATCH 0182/1852] net: test tailroom before appending to linear skb

[ Upstream commit 113f99c3358564a0647d444c2ae34e8b1abfd5b9 ]

Device features may change during transmission. In particular with
corking, a device may toggle scatter-gather in between allocating
and writing to an skb.

Do not unconditionally assume that !NETIF_F_SG at write time implies
that the same held at alloc time and thus the skb has sufficient
tailroom.

This issue predates git history.

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Reported-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Willem de Bruijn <willemb@google.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_output.c  | 3 ++-
 net/ipv6/ip6_output.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index 62e41d38da785..c1d7dc4339760 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -1062,7 +1062,8 @@ static int __ip_append_data(struct sock *sk,
 		if (copy > length)
 			copy = length;
 
-		if (!(rt->dst.dev->features&NETIF_F_SG)) {
+		if (!(rt->dst.dev->features&NETIF_F_SG) &&
+		    skb_tailroom(skb) >= copy) {
 			unsigned int off;
 
 			off = skb->len;
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index bd2a72f9e4885..33ffb29dd620e 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -1533,7 +1533,8 @@ static int __ip6_append_data(struct sock *sk,
 		if (copy > length)
 			copy = length;
 
-		if (!(rt->dst.dev->features&NETIF_F_SG)) {
+		if (!(rt->dst.dev->features&NETIF_F_SG) &&
+		    skb_tailroom(skb) >= copy) {
 			unsigned int off;
 
 			off = skb->len;

From 0f2f2489de715fc601864af41797e911ffa32144 Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Fri, 11 May 2018 13:24:25 -0400
Subject: [PATCH 0183/1852] packet: in packet_snd start writing at link layer
 allocation

[ Upstream commit b84bbaf7a6c8cca24f8acf25a2c8e46913a947ba ]

Packet sockets allow construction of packets shorter than
dev->hard_header_len to accommodate protocols with variable length
link layer headers. These packets are padded to dev->hard_header_len,
because some device drivers interpret that as a minimum packet size.

packet_snd reserves dev->hard_header_len bytes on allocation.
SOCK_DGRAM sockets call skb_push in dev_hard_header() to ensure that
link layer headers are stored in the reserved range. SOCK_RAW sockets
do the same in tpacket_snd, but not in packet_snd.

Syzbot was able to send a zero byte packet to a device with massive
116B link layer header, causing padding to cross over into skb_shinfo.
Fix this by writing from the start of the llheader reserved range also
in the case of packet_snd/SOCK_RAW.

Update skb_set_network_header to the new offset. This also corrects
it for SOCK_DGRAM, where it incorrectly double counted reserve due to
the skb_push in dev_hard_header.

Fixes: 9ed988cd5915 ("packet: validate variable length ll headers")
Reported-by: syzbot+71d74a5406d02057d559@syzkaller.appspotmail.com
Signed-off-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/packet/af_packet.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index f165514a4db56..392d4e2c0a246 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -2771,13 +2771,15 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
 	if (skb == NULL)
 		goto out_unlock;
 
-	skb_set_network_header(skb, reserve);
+	skb_reset_network_header(skb);
 
 	err = -EINVAL;
 	if (sock->type == SOCK_DGRAM) {
 		offset = dev_hard_header(skb, dev, ntohs(proto), addr, NULL, len);
 		if (unlikely(offset < 0))
 			goto out_free;
+	} else if (reserve) {
+		skb_push(skb, reserve);
 	}
 
 	/* Returns -EFAULT on error */

From 8e9ffda7fce1d5b1a178ba107747cb5398095973 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Fri, 18 May 2018 04:47:55 -0700
Subject: [PATCH 0184/1852] sock_diag: fix use-after-free read in __sk_free

[ Upstream commit 9709020c86f6bf8439ca3effc58cfca49a5de192 ]

We must not call sock_diag_has_destroy_listeners(sk) on a socket
that has no reference on net structure.

BUG: KASAN: use-after-free in sock_diag_has_destroy_listeners include/linux/sock_diag.h:75 [inline]
BUG: KASAN: use-after-free in __sk_free+0x329/0x340 net/core/sock.c:1609
Read of size 8 at addr ffff88018a02e3a0 by task swapper/1/0

CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.17.0-rc5+ #54
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 <IRQ>
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x1b9/0x294 lib/dump_stack.c:113
 print_address_description+0x6c/0x20b mm/kasan/report.c:256
 kasan_report_error mm/kasan/report.c:354 [inline]
 kasan_report.cold.7+0x242/0x2fe mm/kasan/report.c:412
 __asan_report_load8_noabort+0x14/0x20 mm/kasan/report.c:433
 sock_diag_has_destroy_listeners include/linux/sock_diag.h:75 [inline]
 __sk_free+0x329/0x340 net/core/sock.c:1609
 sk_free+0x42/0x50 net/core/sock.c:1623
 sock_put include/net/sock.h:1664 [inline]
 reqsk_free include/net/request_sock.h:116 [inline]
 reqsk_put include/net/request_sock.h:124 [inline]
 inet_csk_reqsk_queue_drop_and_put net/ipv4/inet_connection_sock.c:672 [inline]
 reqsk_timer_handler+0xe27/0x10e0 net/ipv4/inet_connection_sock.c:739
 call_timer_fn+0x230/0x940 kernel/time/timer.c:1326
 expire_timers kernel/time/timer.c:1363 [inline]
 __run_timers+0x79e/0xc50 kernel/time/timer.c:1666
 run_timer_softirq+0x4c/0x70 kernel/time/timer.c:1692
 __do_softirq+0x2e0/0xaf5 kernel/softirq.c:285
 invoke_softirq kernel/softirq.c:365 [inline]
 irq_exit+0x1d1/0x200 kernel/softirq.c:405
 exiting_irq arch/x86/include/asm/apic.h:525 [inline]
 smp_apic_timer_interrupt+0x17e/0x710 arch/x86/kernel/apic/apic.c:1052
 apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:863
 </IRQ>
RIP: 0010:native_safe_halt+0x6/0x10 arch/x86/include/asm/irqflags.h:54
RSP: 0018:ffff8801d9ae7c38 EFLAGS: 00000282 ORIG_RAX: ffffffffffffff13
RAX: dffffc0000000000 RBX: 1ffff1003b35cf8a RCX: 0000000000000000
RDX: 1ffffffff11a30d0 RSI: 0000000000000001 RDI: ffffffff88d18680
RBP: ffff8801d9ae7c38 R08: ffffed003b5e46c3 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001
R13: ffff8801d9ae7cf0 R14: ffffffff897bef20 R15: 0000000000000000
 arch_safe_halt arch/x86/include/asm/paravirt.h:94 [inline]
 default_idle+0xc2/0x440 arch/x86/kernel/process.c:354
 arch_cpu_idle+0x10/0x20 arch/x86/kernel/process.c:345
 default_idle_call+0x6d/0x90 kernel/sched/idle.c:93
 cpuidle_idle_call kernel/sched/idle.c:153 [inline]
 do_idle+0x395/0x560 kernel/sched/idle.c:262
 cpu_startup_entry+0x104/0x120 kernel/sched/idle.c:368
 start_secondary+0x426/0x5b0 arch/x86/kernel/smpboot.c:269
 secondary_startup_64+0xa5/0xb0 arch/x86/kernel/head_64.S:242

Allocated by task 4557:
 save_stack+0x43/0xd0 mm/kasan/kasan.c:448
 set_track mm/kasan/kasan.c:460 [inline]
 kasan_kmalloc+0xc4/0xe0 mm/kasan/kasan.c:553
 kasan_slab_alloc+0x12/0x20 mm/kasan/kasan.c:490
 kmem_cache_alloc+0x12e/0x760 mm/slab.c:3554
 kmem_cache_zalloc include/linux/slab.h:691 [inline]
 net_alloc net/core/net_namespace.c:383 [inline]
 copy_net_ns+0x159/0x4c0 net/core/net_namespace.c:423
 create_new_namespaces+0x69d/0x8f0 kernel/nsproxy.c:107
 unshare_nsproxy_namespaces+0xc3/0x1f0 kernel/nsproxy.c:206
 ksys_unshare+0x708/0xf90 kernel/fork.c:2408
 __do_sys_unshare kernel/fork.c:2476 [inline]
 __se_sys_unshare kernel/fork.c:2474 [inline]
 __x64_sys_unshare+0x31/0x40 kernel/fork.c:2474
 do_syscall_64+0x1b1/0x800 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x49/0xbe

Freed by task 69:
 save_stack+0x43/0xd0 mm/kasan/kasan.c:448
 set_track mm/kasan/kasan.c:460 [inline]
 __kasan_slab_free+0x11a/0x170 mm/kasan/kasan.c:521
 kasan_slab_free+0xe/0x10 mm/kasan/kasan.c:528
 __cache_free mm/slab.c:3498 [inline]
 kmem_cache_free+0x86/0x2d0 mm/slab.c:3756
 net_free net/core/net_namespace.c:399 [inline]
 net_drop_ns.part.14+0x11a/0x130 net/core/net_namespace.c:406
 net_drop_ns net/core/net_namespace.c:405 [inline]
 cleanup_net+0x6a1/0xb20 net/core/net_namespace.c:541
 process_one_work+0xc1e/0x1b50 kernel/workqueue.c:2145
 worker_thread+0x1cc/0x1440 kernel/workqueue.c:2279
 kthread+0x345/0x410 kernel/kthread.c:240
 ret_from_fork+0x3a/0x50 arch/x86/entry/entry_64.S:412

The buggy address belongs to the object at ffff88018a02c140
 which belongs to the cache net_namespace of size 8832
The buggy address is located 8800 bytes inside of
 8832-byte region [ffff88018a02c140, ffff88018a02e3c0)
The buggy address belongs to the page:
page:ffffea0006280b00 count:1 mapcount:0 mapping:ffff88018a02c140 index:0x0 compound_mapcount: 0
flags: 0x2fffc0000008100(slab|head)
raw: 02fffc0000008100 ffff88018a02c140 0000000000000000 0000000100000001
raw: ffffea00062a1320 ffffea0006268020 ffff8801d9bdde40 0000000000000000
page dumped because: kasan: bad access detected

Fixes: b922622ec6ef ("sock_diag: don't broadcast kernel sockets")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Craig Gallek <kraig@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/sock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/core/sock.c b/net/core/sock.c
index 410acdf9dcc2d..ba656a2771fb0 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -1474,7 +1474,7 @@ void sk_destruct(struct sock *sk)
 
 static void __sk_free(struct sock *sk)
 {
-	if (unlikely(sock_diag_has_destroy_listeners(sk) && sk->sk_net_refcnt))
+	if (unlikely(sk->sk_net_refcnt && sock_diag_has_destroy_listeners(sk)))
 		sock_diag_broadcast_destroy(sk);
 	else
 		sk_destruct(sk);

From 0acbfdfab31a286a7302216e4f0503f081af2213 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 14 May 2018 21:14:26 -0700
Subject: [PATCH 0185/1852] tcp: purge write queue in tcp_connect_init()

[ Upstream commit 7f582b248d0a86bae5788c548d7bb5bca6f7691a ]

syzkaller found a reliable way to crash the host, hitting a BUG()
in __tcp_retransmit_skb()

Malicous MSG_FASTOPEN is the root cause. We need to purge write queue
in tcp_connect_init() at the point we init snd_una/write_seq.

This patch also replaces the BUG() by a less intrusive WARN_ON_ONCE()

kernel BUG at net/ipv4/tcp_output.c:2837!
invalid opcode: 0000 [#1] SMP KASAN
Dumping ftrace buffer:
   (ftrace buffer empty)
Modules linked in:
CPU: 0 PID: 5276 Comm: syz-executor0 Not tainted 4.17.0-rc3+ #51
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:__tcp_retransmit_skb+0x2992/0x2eb0 net/ipv4/tcp_output.c:2837
RSP: 0000:ffff8801dae06ff8 EFLAGS: 00010206
RAX: ffff8801b9fe61c0 RBX: 00000000ffc18a16 RCX: ffffffff864e1a49
RDX: 0000000000000100 RSI: ffffffff864e2e12 RDI: 0000000000000005
RBP: ffff8801dae073a0 R08: ffff8801b9fe61c0 R09: ffffed0039c40dd2
R10: ffffed0039c40dd2 R11: ffff8801ce206e93 R12: 00000000421eeaad
R13: ffff8801ce206d4e R14: ffff8801ce206cc0 R15: ffff8801cd4f4a80
FS:  0000000000000000(0000) GS:ffff8801dae00000(0063) knlGS:00000000096bc900
CS:  0010 DS: 002b ES: 002b CR0: 0000000080050033
CR2: 0000000020000000 CR3: 00000001c47b6000 CR4: 00000000001406f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
 <IRQ>
 tcp_retransmit_skb+0x2e/0x250 net/ipv4/tcp_output.c:2923
 tcp_retransmit_timer+0xc50/0x3060 net/ipv4/tcp_timer.c:488
 tcp_write_timer_handler+0x339/0x960 net/ipv4/tcp_timer.c:573
 tcp_write_timer+0x111/0x1d0 net/ipv4/tcp_timer.c:593
 call_timer_fn+0x230/0x940 kernel/time/timer.c:1326
 expire_timers kernel/time/timer.c:1363 [inline]
 __run_timers+0x79e/0xc50 kernel/time/timer.c:1666
 run_timer_softirq+0x4c/0x70 kernel/time/timer.c:1692
 __do_softirq+0x2e0/0xaf5 kernel/softirq.c:285
 invoke_softirq kernel/softirq.c:365 [inline]
 irq_exit+0x1d1/0x200 kernel/softirq.c:405
 exiting_irq arch/x86/include/asm/apic.h:525 [inline]
 smp_apic_timer_interrupt+0x17e/0x710 arch/x86/kernel/apic/apic.c:1052
 apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:863

Fixes: cf60af03ca4e ("net-tcp: Fast Open client - sendmsg(MSG_FASTOPEN)")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Yuchung Cheng <ycheng@google.com>
Cc: Neal Cardwell <ncardwell@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_output.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 7d82c172db78f..e490c9a290346 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2587,8 +2587,10 @@ int __tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
 		return -EBUSY;
 
 	if (before(TCP_SKB_CB(skb)->seq, tp->snd_una)) {
-		if (before(TCP_SKB_CB(skb)->end_seq, tp->snd_una))
-			BUG();
+		if (unlikely(before(TCP_SKB_CB(skb)->end_seq, tp->snd_una))) {
+			WARN_ON_ONCE(1);
+			return -EINVAL;
+		}
 		if (tcp_trim_head(sk, skb, tp->snd_una - TCP_SKB_CB(skb)->seq))
 			return -ENOMEM;
 	}
@@ -3117,6 +3119,7 @@ static void tcp_connect_init(struct sock *sk)
 	sock_reset_flag(sk, SOCK_DONE);
 	tp->snd_wnd = 0;
 	tcp_init_wl(tp, 0);
+	tcp_write_queue_purge(sk);
 	tp->snd_una = tp->write_seq;
 	tp->snd_sml = tp->write_seq;
 	tp->snd_up = tp->write_seq;

From 8bb2f580296f38e3dec01943bb690c5510596b06 Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Thu, 17 May 2018 17:18:30 -0400
Subject: [PATCH 0186/1852] ext2: fix a block leak

commit 5aa1437d2d9a068c0334bd7c9dafa8ec4f97f13b upstream.

open file, unlink it, then use ioctl(2) to make it immutable or
append only.  Now close it and watch the blocks *not* freed...

Immutable/append-only checks belong in ->setattr().
Note: the bug is old and backport to anything prior to 737f2e93b972
("ext2: convert to use the new truncate convention") will need
these checks lifted into ext2_setattr().

Cc: stable@kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext2/inode.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c
index 0aa9bf6e6e53e..f600c43f00472 100644
--- a/fs/ext2/inode.c
+++ b/fs/ext2/inode.c
@@ -1175,21 +1175,11 @@ static void __ext2_truncate_blocks(struct inode *inode, loff_t offset)
 
 static void ext2_truncate_blocks(struct inode *inode, loff_t offset)
 {
-	/*
-	 * XXX: it seems like a bug here that we don't allow
-	 * IS_APPEND inode to have blocks-past-i_size trimmed off.
-	 * review and fix this.
-	 *
-	 * Also would be nice to be able to handle IO errors and such,
-	 * but that's probably too much to ask.
-	 */
 	if (!(S_ISREG(inode->i_mode) || S_ISDIR(inode->i_mode) ||
 	    S_ISLNK(inode->i_mode)))
 		return;
 	if (ext2_inode_is_fast_symlink(inode))
 		return;
-	if (IS_APPEND(inode) || IS_IMMUTABLE(inode))
-		return;
 
 	dax_sem_down_write(EXT2_I(inode));
 	__ext2_truncate_blocks(inode, offset);

From 632d5663b10974432cce32734e63d3d551780010 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:28 +0200
Subject: [PATCH 0187/1852] s390: add assembler macros for CPU alternatives

[ Upstream commit fba9eb7946251d6e420df3bdf7bc45195be7be9a ]

Add a header with macros usable in assembler files to emit alternative
code sequences. It works analog to the alternatives for inline assmeblies
in C files, with the same restrictions and capabilities.
The syntax is

     ALTERNATIVE "<default instructions sequence>", \
		 "<alternative instructions sequence>", \
		 "<features-bit>"
and

     ALTERNATIVE_2 "<default instructions sequence>", \
		   "<alternative instructions sqeuence #1>", \
		   "<feature-bit #1>",
		   "<alternative instructions sqeuence #2>", \
		   "<feature-bit #2>"

Reviewed-by: Vasily Gorbik <gor@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/alternative-asm.h | 108 ++++++++++++++++++++++++
 1 file changed, 108 insertions(+)
 create mode 100644 arch/s390/include/asm/alternative-asm.h

diff --git a/arch/s390/include/asm/alternative-asm.h b/arch/s390/include/asm/alternative-asm.h
new file mode 100644
index 0000000000000..955d620db23ed
--- /dev/null
+++ b/arch/s390/include/asm/alternative-asm.h
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_S390_ALTERNATIVE_ASM_H
+#define _ASM_S390_ALTERNATIVE_ASM_H
+
+#ifdef __ASSEMBLY__
+
+/*
+ * Check the length of an instruction sequence. The length may not be larger
+ * than 254 bytes and it has to be divisible by 2.
+ */
+.macro alt_len_check start,end
+	.if ( \end - \start ) > 254
+	.error "cpu alternatives does not support instructions blocks > 254 bytes\n"
+	.endif
+	.if ( \end - \start ) % 2
+	.error "cpu alternatives instructions length is odd\n"
+	.endif
+.endm
+
+/*
+ * Issue one struct alt_instr descriptor entry (need to put it into
+ * the section .altinstructions, see below). This entry contains
+ * enough information for the alternatives patching code to patch an
+ * instruction. See apply_alternatives().
+ */
+.macro alt_entry orig_start, orig_end, alt_start, alt_end, feature
+	.long	\orig_start - .
+	.long	\alt_start - .
+	.word	\feature
+	.byte	\orig_end - \orig_start
+	.byte	\alt_end - \alt_start
+.endm
+
+/*
+ * Fill up @bytes with nops. The macro emits 6-byte nop instructions
+ * for the bulk of the area, possibly followed by a 4-byte and/or
+ * a 2-byte nop if the size of the area is not divisible by 6.
+ */
+.macro alt_pad_fill bytes
+	.fill	( \bytes ) / 6, 6, 0xc0040000
+	.fill	( \bytes ) % 6 / 4, 4, 0x47000000
+	.fill	( \bytes ) % 6 % 4 / 2, 2, 0x0700
+.endm
+
+/*
+ * Fill up @bytes with nops. If the number of bytes is larger
+ * than 6, emit a jg instruction to branch over all nops, then
+ * fill an area of size (@bytes - 6) with nop instructions.
+ */
+.macro alt_pad bytes
+	.if ( \bytes > 0 )
+	.if ( \bytes > 6 )
+	jg	. + \bytes
+	alt_pad_fill \bytes - 6
+	.else
+	alt_pad_fill \bytes
+	.endif
+	.endif
+.endm
+
+/*
+ * Define an alternative between two instructions. If @feature is
+ * present, early code in apply_alternatives() replaces @oldinstr with
+ * @newinstr. ".skip" directive takes care of proper instruction padding
+ * in case @newinstr is longer than @oldinstr.
+ */
+.macro ALTERNATIVE oldinstr, newinstr, feature
+	.pushsection .altinstr_replacement,"ax"
+770:	\newinstr
+771:	.popsection
+772:	\oldinstr
+773:	alt_len_check 770b, 771b
+	alt_len_check 772b, 773b
+	alt_pad ( ( 771b - 770b ) - ( 773b - 772b ) )
+774:	.pushsection .altinstructions,"a"
+	alt_entry 772b, 774b, 770b, 771b, \feature
+	.popsection
+.endm
+
+/*
+ * Define an alternative between two instructions. If @feature is
+ * present, early code in apply_alternatives() replaces @oldinstr with
+ * @newinstr. ".skip" directive takes care of proper instruction padding
+ * in case @newinstr is longer than @oldinstr.
+ */
+.macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2
+	.pushsection .altinstr_replacement,"ax"
+770:	\newinstr1
+771:	\newinstr2
+772:	.popsection
+773:	\oldinstr
+774:	alt_len_check 770b, 771b
+	alt_len_check 771b, 772b
+	alt_len_check 773b, 774b
+	.if ( 771b - 770b > 772b - 771b )
+	alt_pad ( ( 771b - 770b ) - ( 774b - 773b ) )
+	.else
+	alt_pad ( ( 772b - 771b ) - ( 774b - 773b ) )
+	.endif
+775:	.pushsection .altinstructions,"a"
+	alt_entry 773b, 775b, 770b, 771b,\feature1
+	alt_entry 773b, 775b, 771b, 772b,\feature2
+	.popsection
+.endm
+
+#endif	/*  __ASSEMBLY__  */
+
+#endif /* _ASM_S390_ALTERNATIVE_ASM_H */

From a25f8055c5d500a4ca2aa42c1a3e12affb942f8e Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:29 +0200
Subject: [PATCH 0188/1852] s390: move expoline assembler macros to a header

[ Upstream commit 6dd85fbb87d1d6b87a3b1f02ca28d7b2abd2e7ba ]

To be able to use the expoline branches in different assembler
files move the associated macros from entry.S to a new header
nospec-insn.h.

While we are at it make the macros a bit nicer to use.

Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/nospec-insn.h | 125 ++++++++++++++++++++++++++++
 arch/s390/kernel/entry.S            | 105 ++++++-----------------
 2 files changed, 149 insertions(+), 81 deletions(-)
 create mode 100644 arch/s390/include/asm/nospec-insn.h

diff --git a/arch/s390/include/asm/nospec-insn.h b/arch/s390/include/asm/nospec-insn.h
new file mode 100644
index 0000000000000..fcb6529de9b75
--- /dev/null
+++ b/arch/s390/include/asm/nospec-insn.h
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_S390_NOSPEC_ASM_H
+#define _ASM_S390_NOSPEC_ASM_H
+
+#ifdef __ASSEMBLY__
+
+#ifdef CONFIG_EXPOLINE
+
+/*
+ * The expoline macros are used to create thunks in the same format
+ * as gcc generates them. The 'comdat' section flag makes sure that
+ * the various thunks are merged into a single copy.
+ */
+	.macro __THUNK_PROLOG_NAME name
+	.pushsection .text.\name,"axG",@progbits,\name,comdat
+	.globl \name
+	.hidden \name
+	.type \name,@function
+\name:
+	.cfi_startproc
+	.endm
+
+	.macro __THUNK_EPILOG
+	.cfi_endproc
+	.popsection
+	.endm
+
+	.macro __THUNK_PROLOG_BR r1,r2
+	__THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
+	.endm
+
+	.macro __THUNK_BR r1,r2
+	jg	__s390x_indirect_jump_r\r2\()use_r\r1
+	.endm
+
+	.macro __THUNK_BRASL r1,r2,r3
+	brasl	\r1,__s390x_indirect_jump_r\r3\()use_r\r2
+	.endm
+
+	.macro	__DECODE_RR expand,reg,ruse
+	.set __decode_fail,1
+	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \reg,%r\r1
+	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \ruse,%r\r2
+	\expand \r1,\r2
+	.set __decode_fail,0
+	.endif
+	.endr
+	.endif
+	.endr
+	.if __decode_fail == 1
+	.error "__DECODE_RR failed"
+	.endif
+	.endm
+
+	.macro	__DECODE_RRR expand,rsave,rtarget,ruse
+	.set __decode_fail,1
+	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \rsave,%r\r1
+	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \rtarget,%r\r2
+	.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \ruse,%r\r3
+	\expand \r1,\r2,\r3
+	.set __decode_fail,0
+	.endif
+	.endr
+	.endif
+	.endr
+	.endif
+	.endr
+	.if __decode_fail == 1
+	.error "__DECODE_RRR failed"
+	.endif
+	.endm
+
+	.macro __THUNK_EX_BR reg,ruse
+#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
+	exrl	0,555f
+	j	.
+#else
+	larl	\ruse,555f
+	ex	0,0(\ruse)
+	j	.
+#endif
+555:	br	\reg
+	.endm
+
+	.macro GEN_BR_THUNK reg,ruse=%r1
+	__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
+	__THUNK_EX_BR \reg,\ruse
+	__THUNK_EPILOG
+	.endm
+
+	.macro BR_EX reg,ruse=%r1
+557:	__DECODE_RR __THUNK_BR,\reg,\ruse
+	.pushsection .s390_indirect_branches,"a",@progbits
+	.long	557b-.
+	.popsection
+	.endm
+
+	.macro BASR_EX rsave,rtarget,ruse=%r1
+559:	__DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
+	.pushsection .s390_indirect_branches,"a",@progbits
+	.long	559b-.
+	.popsection
+	.endm
+
+#else
+	.macro GEN_BR_THUNK reg,ruse=%r1
+	.endm
+
+	 .macro BR_EX reg,ruse=%r1
+	br	\reg
+	.endm
+
+	.macro BASR_EX rsave,rtarget,ruse=%r1
+	basr	\rsave,\rtarget
+	.endm
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_S390_NOSPEC_ASM_H */
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index c637303262151..5416d5d68308e 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -23,6 +23,7 @@
 #include <asm/vx-insn.h>
 #include <asm/setup.h>
 #include <asm/nmi.h>
+#include <asm/nospec-insn.h>
 
 __PT_R0      =	__PT_GPRS
 __PT_R1      =	__PT_GPRS + 8
@@ -225,74 +226,16 @@ _PIF_WORK	= (_PIF_PER_TRAP)
 	.popsection
 	.endm
 
-#ifdef CONFIG_EXPOLINE
-
-	.macro GEN_BR_THUNK name,reg,tmp
-	.section .text.\name,"axG",@progbits,\name,comdat
-	.globl \name
-	.hidden \name
-	.type \name,@function
-\name:
-	.cfi_startproc
-#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
-	exrl	0,0f
-#else
-	larl	\tmp,0f
-	ex	0,0(\tmp)
-#endif
-	j	.
-0:	br	\reg
-	.cfi_endproc
-	.endm
-
-	GEN_BR_THUNK __s390x_indirect_jump_r1use_r9,%r9,%r1
-	GEN_BR_THUNK __s390x_indirect_jump_r1use_r14,%r14,%r1
-	GEN_BR_THUNK __s390x_indirect_jump_r11use_r14,%r14,%r11
-
-	.macro BASR_R14_R9
-0:	brasl	%r14,__s390x_indirect_jump_r1use_r9
-	.pushsection .s390_indirect_branches,"a",@progbits
-	.long	0b-.
-	.popsection
-	.endm
-
-	.macro BR_R1USE_R14
-0:	jg	__s390x_indirect_jump_r1use_r14
-	.pushsection .s390_indirect_branches,"a",@progbits
-	.long	0b-.
-	.popsection
-	.endm
-
-	.macro BR_R11USE_R14
-0:	jg	__s390x_indirect_jump_r11use_r14
-	.pushsection .s390_indirect_branches,"a",@progbits
-	.long	0b-.
-	.popsection
-	.endm
-
-#else	/* CONFIG_EXPOLINE */
-
-	.macro BASR_R14_R9
-	basr	%r14,%r9
-	.endm
-
-	.macro BR_R1USE_R14
-	br	%r14
-	.endm
-
-	.macro BR_R11USE_R14
-	br	%r14
-	.endm
-
-#endif /* CONFIG_EXPOLINE */
-
+	GEN_BR_THUNK %r9
+	GEN_BR_THUNK %r14
+	GEN_BR_THUNK %r14,%r11
 
 	.section .kprobes.text, "ax"
 
 ENTRY(__bpon)
 	.globl __bpon
 	BPON
-	BR_R1USE_R14
+	BR_EX	%r14
 
 /*
  * Scheduler resume function, called by switch_to
@@ -322,7 +265,7 @@ ENTRY(__switch_to)
 	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
 	jz	0f
 	.insn	s,0xb2800000,__LC_LPP		# set program parameter
-0:	BR_R1USE_R14
+0:	BR_EX	%r14
 
 .L__critical_start:
 
@@ -388,7 +331,7 @@ sie_exit:
 	xgr	%r5,%r5
 	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
 	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
-	BR_R1USE_R14
+	BR_EX	%r14
 .Lsie_fault:
 	lghi	%r14,-EFAULT
 	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
@@ -445,7 +388,7 @@ ENTRY(system_call)
 	lgf	%r9,0(%r8,%r10)			# get system call add.
 	TSTMSK	__TI_flags(%r12),_TIF_TRACE
 	jnz	.Lsysc_tracesys
-	BASR_R14_R9				# call sys_xxxx
+	BASR_EX	%r14,%r9			# call sys_xxxx
 	stg	%r2,__PT_R2(%r11)		# store return value
 
 .Lsysc_return:
@@ -585,7 +528,7 @@ ENTRY(system_call)
 	lmg	%r3,%r7,__PT_R3(%r11)
 	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
 	lg	%r2,__PT_ORIG_GPR2(%r11)
-	BASR_R14_R9			# call sys_xxx
+	BASR_EX	%r14,%r9		# call sys_xxx
 	stg	%r2,__PT_R2(%r11)	# store return value
 .Lsysc_tracenogo:
 	TSTMSK	__TI_flags(%r12),_TIF_TRACE
@@ -609,7 +552,7 @@ ENTRY(ret_from_fork)
 	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
 ENTRY(kernel_thread_starter)
 	la	%r2,0(%r10)
-	BASR_R14_R9
+	BASR_EX	%r14,%r9
 	j	.Lsysc_tracenogo
 
 /*
@@ -685,7 +628,7 @@ ENTRY(pgm_check_handler)
 	je	.Lpgm_return
 	lgf	%r9,0(%r10,%r1)		# load address of handler routine
 	lgr	%r2,%r11		# pass pointer to pt_regs
-	BASR_R14_R9			# branch to interrupt-handler
+	BASR_EX	%r14,%r9		# branch to interrupt-handler
 .Lpgm_return:
 	LOCKDEP_SYS_EXIT
 	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
@@ -962,7 +905,7 @@ ENTRY(psw_idle)
 	stpt	__TIMER_IDLE_ENTER(%r2)
 .Lpsw_idle_lpsw:
 	lpswe	__SF_EMPTY(%r15)
-	BR_R1USE_R14
+	BR_EX	%r14
 .Lpsw_idle_end:
 
 /*
@@ -1007,7 +950,7 @@ ENTRY(save_fpu_regs)
 .Lsave_fpu_regs_done:
 	oi	__LC_CPU_FLAGS+7,_CIF_FPU
 .Lsave_fpu_regs_exit:
-	BR_R1USE_R14
+	BR_EX	%r14
 .Lsave_fpu_regs_end:
 
 /*
@@ -1054,7 +997,7 @@ load_fpu_regs:
 .Lload_fpu_regs_done:
 	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
 .Lload_fpu_regs_exit:
-	BR_R1USE_R14
+	BR_EX	%r14
 .Lload_fpu_regs_end:
 
 .L__critical_end:
@@ -1227,7 +1170,7 @@ cleanup_critical:
 	jl	0f
 	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
 	jl	.Lcleanup_load_fpu_regs
-0:	BR_R11USE_R14
+0:	BR_EX	%r14
 
 	.align	8
 .Lcleanup_table:
@@ -1257,7 +1200,7 @@ cleanup_critical:
 	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
 	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
 	larl	%r9,sie_exit			# skip forward to sie_exit
-	BR_R11USE_R14
+	BR_EX	%r14
 #endif
 
 .Lcleanup_system_call:
@@ -1315,7 +1258,7 @@ cleanup_critical:
 	stg	%r15,56(%r11)		# r15 stack pointer
 	# set new psw address and exit
 	larl	%r9,.Lsysc_do_svc
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 .Lcleanup_system_call_insn:
 	.quad	system_call
 	.quad	.Lsysc_stmg
@@ -1325,7 +1268,7 @@ cleanup_critical:
 
 .Lcleanup_sysc_tif:
 	larl	%r9,.Lsysc_tif
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 
 .Lcleanup_sysc_restore:
 	# check if stpt has been executed
@@ -1342,14 +1285,14 @@ cleanup_critical:
 	mvc	0(64,%r11),__PT_R8(%r9)
 	lmg	%r0,%r7,__PT_R0(%r9)
 1:	lmg	%r8,%r9,__LC_RETURN_PSW
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 .Lcleanup_sysc_restore_insn:
 	.quad	.Lsysc_exit_timer
 	.quad	.Lsysc_done - 4
 
 .Lcleanup_io_tif:
 	larl	%r9,.Lio_tif
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 
 .Lcleanup_io_restore:
 	# check if stpt has been executed
@@ -1363,7 +1306,7 @@ cleanup_critical:
 	mvc	0(64,%r11),__PT_R8(%r9)
 	lmg	%r0,%r7,__PT_R0(%r9)
 1:	lmg	%r8,%r9,__LC_RETURN_PSW
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 .Lcleanup_io_restore_insn:
 	.quad	.Lio_exit_timer
 	.quad	.Lio_done - 4
@@ -1415,17 +1358,17 @@ cleanup_critical:
 	# prepare return psw
 	nihh	%r8,0xfcfd		# clear irq & wait state bits
 	lg	%r9,48(%r11)		# return from psw_idle
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 .Lcleanup_idle_insn:
 	.quad	.Lpsw_idle_lpsw
 
 .Lcleanup_save_fpu_regs:
 	larl	%r9,save_fpu_regs
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 
 .Lcleanup_load_fpu_regs:
 	larl	%r9,load_fpu_regs
-	BR_R11USE_R14
+	BR_EX	%r14,%r11
 
 /*
  * Integer constants

From 89ba1ec7038e21bce8f15f09ae2147fbdb09fc52 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:30 +0200
Subject: [PATCH 0189/1852] s390/lib: use expoline for indirect branches

[ Upstream commit 97489e0663fa700d6e7febddc43b58df98d7bcda ]

The return from the memmove, memset, memcpy, __memset16, __memset32 and
__memset64 functions are done with "br %r14". These are indirect branches
as well and need to use execute trampolines for CONFIG_EXPOLINE=y.

Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/lib/mem.S | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/s390/lib/mem.S b/arch/s390/lib/mem.S
index c6d553e85ab11..16c5998b97922 100644
--- a/arch/s390/lib/mem.S
+++ b/arch/s390/lib/mem.S
@@ -5,6 +5,9 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/nospec-insn.h>
+
+	GEN_BR_THUNK %r14
 
 /*
  * memset implementation
@@ -38,7 +41,7 @@ ENTRY(memset)
 .Lmemset_clear_rest:
 	larl	%r3,.Lmemset_xc
 	ex	%r4,0(%r3)
-	br	%r14
+	BR_EX	%r14
 .Lmemset_fill:
 	stc	%r3,0(%r2)
 	cghi	%r4,1
@@ -55,7 +58,7 @@ ENTRY(memset)
 .Lmemset_fill_rest:
 	larl	%r3,.Lmemset_mvc
 	ex	%r4,0(%r3)
-	br	%r14
+	BR_EX	%r14
 .Lmemset_xc:
 	xc	0(1,%r1),0(%r1)
 .Lmemset_mvc:
@@ -77,7 +80,7 @@ ENTRY(memcpy)
 .Lmemcpy_rest:
 	larl	%r5,.Lmemcpy_mvc
 	ex	%r4,0(%r5)
-	br	%r14
+	BR_EX	%r14
 .Lmemcpy_loop:
 	mvc	0(256,%r1),0(%r3)
 	la	%r1,256(%r1)

From 6892e3520f47ce4ed53514a48c2a8b464d91f23c Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:32 +0200
Subject: [PATCH 0190/1852] s390/kernel: use expoline for indirect branches

[ Upstream commit c50c84c3ac4d5db683904bdb3257798b6ef980ae ]

The assember code in arch/s390/kernel uses a few more indirect branches
which need to be done with execute trampolines for CONFIG_EXPOLINE=y.

Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/kernel/base.S   | 24 ++++++++++++++----------
 arch/s390/kernel/reipl.S  |  5 ++++-
 arch/s390/kernel/swsusp.S | 10 ++++++----
 3 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/arch/s390/kernel/base.S b/arch/s390/kernel/base.S
index 326f717df587c..61fca549a93bd 100644
--- a/arch/s390/kernel/base.S
+++ b/arch/s390/kernel/base.S
@@ -8,18 +8,22 @@
 
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
+#include <asm/nospec-insn.h>
 #include <asm/ptrace.h>
 #include <asm/sigp.h>
 
+	GEN_BR_THUNK %r9
+	GEN_BR_THUNK %r14
+
 ENTRY(s390_base_mcck_handler)
 	basr	%r13,0
 0:	lg	%r15,__LC_PANIC_STACK	# load panic stack
 	aghi	%r15,-STACK_FRAME_OVERHEAD
 	larl	%r1,s390_base_mcck_handler_fn
-	lg	%r1,0(%r1)
-	ltgr	%r1,%r1
+	lg	%r9,0(%r1)
+	ltgr	%r9,%r9
 	jz	1f
-	basr	%r14,%r1
+	BASR_EX	%r14,%r9
 1:	la	%r1,4095
 	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
 	lpswe	__LC_MCK_OLD_PSW
@@ -36,10 +40,10 @@ ENTRY(s390_base_ext_handler)
 	basr	%r13,0
 0:	aghi	%r15,-STACK_FRAME_OVERHEAD
 	larl	%r1,s390_base_ext_handler_fn
-	lg	%r1,0(%r1)
-	ltgr	%r1,%r1
+	lg	%r9,0(%r1)
+	ltgr	%r9,%r9
 	jz	1f
-	basr	%r14,%r1
+	BASR_EX	%r14,%r9
 1:	lmg	%r0,%r15,__LC_SAVE_AREA_ASYNC
 	ni	__LC_EXT_OLD_PSW+1,0xfd	# clear wait state bit
 	lpswe	__LC_EXT_OLD_PSW
@@ -56,10 +60,10 @@ ENTRY(s390_base_pgm_handler)
 	basr	%r13,0
 0:	aghi	%r15,-STACK_FRAME_OVERHEAD
 	larl	%r1,s390_base_pgm_handler_fn
-	lg	%r1,0(%r1)
-	ltgr	%r1,%r1
+	lg	%r9,0(%r1)
+	ltgr	%r9,%r9
 	jz	1f
-	basr	%r14,%r1
+	BASR_EX	%r14,%r9
 	lmg	%r0,%r15,__LC_SAVE_AREA_SYNC
 	lpswe	__LC_PGM_OLD_PSW
 1:	lpswe	disabled_wait_psw-0b(%r13)
@@ -116,7 +120,7 @@ ENTRY(diag308_reset)
 	larl	%r4,.Lcontinue_psw	# Restore PSW flags
 	lpswe	0(%r4)
 .Lcontinue:
-	br	%r14
+	BR_EX	%r14
 .align 16
 .Lrestart_psw:
 	.long	0x00080000,0x80000000 + .Lrestart_part2
diff --git a/arch/s390/kernel/reipl.S b/arch/s390/kernel/reipl.S
index 52aab0bd84f89..6b1b91c17b407 100644
--- a/arch/s390/kernel/reipl.S
+++ b/arch/s390/kernel/reipl.S
@@ -6,8 +6,11 @@
 
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
+#include <asm/nospec-insn.h>
 #include <asm/sigp.h>
 
+	GEN_BR_THUNK %r14
+
 #
 # store_status
 #
@@ -62,7 +65,7 @@ ENTRY(store_status)
 	st	%r3,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 4(%r1)
 	larl	%r2,store_status
 	stg	%r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 8(%r1)
-	br	%r14
+	BR_EX	%r14
 
 	.section .bss
 	.align	8
diff --git a/arch/s390/kernel/swsusp.S b/arch/s390/kernel/swsusp.S
index 2d6b6e81f812c..60a829c77378d 100644
--- a/arch/s390/kernel/swsusp.S
+++ b/arch/s390/kernel/swsusp.S
@@ -12,6 +12,7 @@
 #include <asm/ptrace.h>
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
+#include <asm/nospec-insn.h>
 #include <asm/sigp.h>
 
 /*
@@ -23,6 +24,8 @@
  * (see below) in the resume process.
  * This function runs with disabled interrupts.
  */
+	GEN_BR_THUNK %r14
+
 	.section .text
 ENTRY(swsusp_arch_suspend)
 	stmg	%r6,%r15,__SF_GPRS(%r15)
@@ -102,7 +105,7 @@ ENTRY(swsusp_arch_suspend)
 	spx	0x318(%r1)
 	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
 	lghi	%r2,0
-	br	%r14
+	BR_EX	%r14
 
 /*
  * Restore saved memory image to correct place and restore register context.
@@ -196,11 +199,10 @@ pgm_check_entry:
 	larl	%r15,init_thread_union
 	ahi	%r15,1<<(PAGE_SHIFT+THREAD_ORDER)
 	larl	%r2,.Lpanic_string
-	larl	%r3,_sclp_print_early
 	lghi	%r1,0
 	sam31
 	sigp	%r1,%r0,SIGP_SET_ARCHITECTURE
-	basr	%r14,%r3
+	brasl	%r14,_sclp_print_early
 	larl	%r3,.Ldisabled_wait_31
 	lpsw	0(%r3)
 4:
@@ -266,7 +268,7 @@ restore_registers:
 	/* Return 0 */
 	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
 	lghi	%r2,0
-	br	%r14
+	BR_EX	%r14
 
 	.section .data..nosave,"aw",@progbits
 	.align	8

From 90b3d16e5f5be8fd0e2fecb2a8076ce86a726da6 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:33 +0200
Subject: [PATCH 0191/1852] s390: move spectre sysfs attribute code

[ Upstream commit 4253b0e0627ee3461e64c2495c616f1c8f6b127b ]

The nospec-branch.c file is compiled without the gcc options to
generate expoline thunks. The return branch of the sysfs show
functions cpu_show_spectre_v1 and cpu_show_spectre_v2 is an indirect
branch as well. These need to be compiled with expolines.

Move the sysfs functions for spectre reporting to a separate file
and loose an '.' for one of the messages.

Cc: stable@vger.kernel.org # 4.16
Fixes: d424986f1d ("s390: add sysfs attributes for spectre")
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/kernel/Makefile        |  1 +
 arch/s390/kernel/nospec-branch.c | 18 ------------------
 arch/s390/kernel/nospec-sysfs.c  | 21 +++++++++++++++++++++
 3 files changed, 22 insertions(+), 18 deletions(-)
 create mode 100644 arch/s390/kernel/nospec-sysfs.c

diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 8ccfbf22ecbb0..c4d4d4ef5e581 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -49,6 +49,7 @@ obj-y	+= nospec-branch.o
 
 extra-y				+= head.o head64.o vmlinux.lds
 
+obj-$(CONFIG_SYSFS)		+= nospec-sysfs.o
 CFLAGS_REMOVE_nospec-branch.o	+= $(CC_FLAGS_EXPOLINE)
 
 obj-$(CONFIG_MODULES)		+= s390_ksyms.o module.o
diff --git a/arch/s390/kernel/nospec-branch.c b/arch/s390/kernel/nospec-branch.c
index 9f3b5b3827435..060ec24ad0c42 100644
--- a/arch/s390/kernel/nospec-branch.c
+++ b/arch/s390/kernel/nospec-branch.c
@@ -44,24 +44,6 @@ static int __init nospec_report(void)
 }
 arch_initcall(nospec_report);
 
-#ifdef CONFIG_SYSFS
-ssize_t cpu_show_spectre_v1(struct device *dev,
-			    struct device_attribute *attr, char *buf)
-{
-	return sprintf(buf, "Mitigation: __user pointer sanitization\n");
-}
-
-ssize_t cpu_show_spectre_v2(struct device *dev,
-			    struct device_attribute *attr, char *buf)
-{
-	if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
-		return sprintf(buf, "Mitigation: execute trampolines\n");
-	if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
-		return sprintf(buf, "Mitigation: limited branch prediction.\n");
-	return sprintf(buf, "Vulnerable\n");
-}
-#endif
-
 #ifdef CONFIG_EXPOLINE
 
 int nospec_disable = IS_ENABLED(CONFIG_EXPOLINE_OFF);
diff --git a/arch/s390/kernel/nospec-sysfs.c b/arch/s390/kernel/nospec-sysfs.c
new file mode 100644
index 0000000000000..8affad5f18cb5
--- /dev/null
+++ b/arch/s390/kernel/nospec-sysfs.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <linux/device.h>
+#include <linux/cpu.h>
+#include <asm/facility.h>
+#include <asm/nospec-branch.h>
+
+ssize_t cpu_show_spectre_v1(struct device *dev,
+			    struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "Mitigation: __user pointer sanitization\n");
+}
+
+ssize_t cpu_show_spectre_v2(struct device *dev,
+			    struct device_attribute *attr, char *buf)
+{
+	if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
+		return sprintf(buf, "Mitigation: execute trampolines\n");
+	if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
+		return sprintf(buf, "Mitigation: limited branch prediction\n");
+	return sprintf(buf, "Vulnerable\n");
+}

From 54a7c329bf6774a364e7dd68da93e27ceb79df62 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:35 +0200
Subject: [PATCH 0192/1852] s390: extend expoline to BC instructions

[ Upstream commit 6deaa3bbca804b2a3627fd685f75de64da7be535 ]

The BPF JIT uses a 'b <disp>(%r<x>)' instruction in the definition
of the sk_load_word and sk_load_half functions.

Add support for branch-on-condition instructions contained in the
thunk code of an expoline.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/nospec-insn.h | 57 +++++++++++++++++++++++++++++
 arch/s390/kernel/nospec-branch.c    | 25 ++++++++++---
 2 files changed, 77 insertions(+), 5 deletions(-)

diff --git a/arch/s390/include/asm/nospec-insn.h b/arch/s390/include/asm/nospec-insn.h
index fcb6529de9b75..087fc9b972c5d 100644
--- a/arch/s390/include/asm/nospec-insn.h
+++ b/arch/s390/include/asm/nospec-insn.h
@@ -29,10 +29,18 @@
 	__THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
 	.endm
 
+	.macro __THUNK_PROLOG_BC d0,r1,r2
+	__THUNK_PROLOG_NAME __s390x_indirect_branch_\d0\()_\r2\()use_\r1
+	.endm
+
 	.macro __THUNK_BR r1,r2
 	jg	__s390x_indirect_jump_r\r2\()use_r\r1
 	.endm
 
+	.macro __THUNK_BC d0,r1,r2
+	jg	__s390x_indirect_branch_\d0\()_\r2\()use_\r1
+	.endm
+
 	.macro __THUNK_BRASL r1,r2,r3
 	brasl	\r1,__s390x_indirect_jump_r\r3\()use_r\r2
 	.endm
@@ -75,6 +83,23 @@
 	.endif
 	.endm
 
+	.macro	__DECODE_DRR expand,disp,reg,ruse
+	.set __decode_fail,1
+	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \reg,%r\r1
+	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	.ifc \ruse,%r\r2
+	\expand \disp,\r1,\r2
+	.set __decode_fail,0
+	.endif
+	.endr
+	.endif
+	.endr
+	.if __decode_fail == 1
+	.error "__DECODE_DRR failed"
+	.endif
+	.endm
+
 	.macro __THUNK_EX_BR reg,ruse
 #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 	exrl	0,555f
@@ -87,17 +112,42 @@
 555:	br	\reg
 	.endm
 
+	.macro __THUNK_EX_BC disp,reg,ruse
+#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
+	exrl	0,556f
+	j	.
+#else
+	larl	\ruse,556f
+	ex	0,0(\ruse)
+	j	.
+#endif
+556:	b	\disp(\reg)
+	.endm
+
 	.macro GEN_BR_THUNK reg,ruse=%r1
 	__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
 	__THUNK_EX_BR \reg,\ruse
 	__THUNK_EPILOG
 	.endm
 
+	.macro GEN_B_THUNK disp,reg,ruse=%r1
+	__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
+	__THUNK_EX_BC \disp,\reg,\ruse
+	__THUNK_EPILOG
+	.endm
+
 	.macro BR_EX reg,ruse=%r1
 557:	__DECODE_RR __THUNK_BR,\reg,\ruse
 	.pushsection .s390_indirect_branches,"a",@progbits
 	.long	557b-.
 	.popsection
+	.endm
+
+	 .macro B_EX disp,reg,ruse=%r1
+558:	__DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
+	.pushsection .s390_indirect_branches,"a",@progbits
+	.long	558b-.
+	.popsection
 	.endm
 
 	.macro BASR_EX rsave,rtarget,ruse=%r1
@@ -109,10 +159,17 @@
 
 #else
 	.macro GEN_BR_THUNK reg,ruse=%r1
+	.endm
+
+	.macro GEN_B_THUNK disp,reg,ruse=%r1
 	.endm
 
 	 .macro BR_EX reg,ruse=%r1
 	br	\reg
+	.endm
+
+	 .macro B_EX disp,reg,ruse=%r1
+	b	\disp(\reg)
 	.endm
 
 	.macro BASR_EX rsave,rtarget,ruse=%r1
diff --git a/arch/s390/kernel/nospec-branch.c b/arch/s390/kernel/nospec-branch.c
index 060ec24ad0c42..d5eed651b5abd 100644
--- a/arch/s390/kernel/nospec-branch.c
+++ b/arch/s390/kernel/nospec-branch.c
@@ -94,7 +94,6 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
 	s32 *epo;
 
 	/* Second part of the instruction replace is always a nop */
-	memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x00, 0x00 }, 4);
 	for (epo = start; epo < end; epo++) {
 		instr = (u8 *) epo + *epo;
 		if (instr[0] == 0xc0 && (instr[1] & 0x0f) == 0x04)
@@ -115,18 +114,34 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
 			br = thunk + (*(int *)(thunk + 2)) * 2;
 		else
 			continue;
-		if (br[0] != 0x07 || (br[1] & 0xf0) != 0xf0)
+		/* Check for unconditional branch 0x07f? or 0x47f???? */
+		if ((br[0] & 0xbf) != 0x07 || (br[1] & 0xf0) != 0xf0)
 			continue;
+
+		memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x07, 0x00 }, 4);
 		switch (type) {
 		case BRCL_EXPOLINE:
-			/* brcl to thunk, replace with br + nop */
 			insnbuf[0] = br[0];
 			insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
+			if (br[0] == 0x47) {
+				/* brcl to b, replace with bc + nopr */
+				insnbuf[2] = br[2];
+				insnbuf[3] = br[3];
+			} else {
+				/* brcl to br, replace with bcr + nop */
+			}
 			break;
 		case BRASL_EXPOLINE:
-			/* brasl to thunk, replace with basr + nop */
-			insnbuf[0] = 0x0d;
 			insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
+			if (br[0] == 0x47) {
+				/* brasl to b, replace with bas + nopr */
+				insnbuf[0] = 0x4d;
+				insnbuf[2] = br[2];
+				insnbuf[3] = br[3];
+			} else {
+				/* brasl to br, replace with basr + nop */
+				insnbuf[0] = 0x0d;
+			}
 			break;
 		}
 

From 5c9e08e18626a87aa8c8a2cc2644a9ff425a86b6 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 23 May 2018 18:21:36 +0200
Subject: [PATCH 0193/1852] s390: use expoline thunks in the BPF JIT

[ Upstream commit de5cb6eb514ebe241e3edeb290cb41deb380b81d ]

The BPF JIT need safe guarding against spectre v2 in the sk_load_xxx
assembler stubs and the indirect branches generated by the JIT itself
need to be converted to expolines.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/net/bpf_jit.S      | 16 +++++----
 arch/s390/net/bpf_jit_comp.c | 63 ++++++++++++++++++++++++++++++++++--
 2 files changed, 71 insertions(+), 8 deletions(-)

diff --git a/arch/s390/net/bpf_jit.S b/arch/s390/net/bpf_jit.S
index a1c917d881ec4..fa716f2a95a7a 100644
--- a/arch/s390/net/bpf_jit.S
+++ b/arch/s390/net/bpf_jit.S
@@ -8,6 +8,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/nospec-insn.h>
 #include "bpf_jit.h"
 
 /*
@@ -53,7 +54,7 @@ ENTRY(sk_load_##NAME##_pos);						\
 	clg	%r3,STK_OFF_HLEN(%r15);	/* Offset + SIZE > hlen? */	\
 	jh	sk_load_##NAME##_slow;					\
 	LOAD	%r14,-SIZE(%r3,%r12);	/* Get data from skb */		\
-	b	OFF_OK(%r6);		/* Return */			\
+	B_EX	OFF_OK,%r6;		/* Return */			\
 									\
 sk_load_##NAME##_slow:;							\
 	lgr	%r2,%r7;		/* Arg1 = skb pointer */	\
@@ -63,11 +64,14 @@ sk_load_##NAME##_slow:;							\
 	brasl	%r14,skb_copy_bits;	/* Get data from skb */		\
 	LOAD	%r14,STK_OFF_TMP(%r15);	/* Load from temp bufffer */	\
 	ltgr	%r2,%r2;		/* Set cc to (%r2 != 0) */	\
-	br	%r6;			/* Return */
+	BR_EX	%r6;			/* Return */
 
 sk_load_common(word, 4, llgf)	/* r14 = *(u32 *) (skb->data+offset) */
 sk_load_common(half, 2, llgh)	/* r14 = *(u16 *) (skb->data+offset) */
 
+	GEN_BR_THUNK %r6
+	GEN_B_THUNK OFF_OK,%r6
+
 /*
  * Load 1 byte from SKB (optimized version)
  */
@@ -79,7 +83,7 @@ ENTRY(sk_load_byte_pos)
 	clg	%r3,STK_OFF_HLEN(%r15)	# Offset >= hlen?
 	jnl	sk_load_byte_slow
 	llgc	%r14,0(%r3,%r12)	# Get byte from skb
-	b	OFF_OK(%r6)		# Return OK
+	B_EX	OFF_OK,%r6		# Return OK
 
 sk_load_byte_slow:
 	lgr	%r2,%r7			# Arg1 = skb pointer
@@ -89,7 +93,7 @@ sk_load_byte_slow:
 	brasl	%r14,skb_copy_bits	# Get data from skb
 	llgc	%r14,STK_OFF_TMP(%r15)	# Load result from temp buffer
 	ltgr	%r2,%r2			# Set cc to (%r2 != 0)
-	br	%r6			# Return cc
+	BR_EX	%r6			# Return cc
 
 #define sk_negative_common(NAME, SIZE, LOAD)				\
 sk_load_##NAME##_slow_neg:;						\
@@ -103,7 +107,7 @@ sk_load_##NAME##_slow_neg:;						\
 	jz	bpf_error;						\
 	LOAD	%r14,0(%r2);		/* Get data from pointer */	\
 	xr	%r3,%r3;		/* Set cc to zero */		\
-	br	%r6;			/* Return cc */
+	BR_EX	%r6;			/* Return cc */
 
 sk_negative_common(word, 4, llgf)
 sk_negative_common(half, 2, llgh)
@@ -112,4 +116,4 @@ sk_negative_common(byte, 1, llgc)
 bpf_error:
 # force a return 0 from jit handler
 	ltgr	%r15,%r15	# Set condition code
-	br	%r6
+	BR_EX	%r6
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index 1395eeb6005ff..a26528afceb26 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -24,6 +24,8 @@
 #include <linux/bpf.h>
 #include <asm/cacheflush.h>
 #include <asm/dis.h>
+#include <asm/facility.h>
+#include <asm/nospec-branch.h>
 #include "bpf_jit.h"
 
 int bpf_jit_enable __read_mostly;
@@ -41,6 +43,8 @@ struct bpf_jit {
 	int base_ip;		/* Base address for literal pool */
 	int ret0_ip;		/* Address of return 0 */
 	int exit_ip;		/* Address of exit */
+	int r1_thunk_ip;	/* Address of expoline thunk for 'br %r1' */
+	int r14_thunk_ip;	/* Address of expoline thunk for 'br %r14' */
 	int tail_call_start;	/* Tail call start offset */
 	int labels[1];		/* Labels for local jumps */
 };
@@ -248,6 +252,19 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
 	REG_SET_SEEN(b2);					\
 })
 
+#define EMIT6_PCREL_RILB(op, b, target)				\
+({								\
+	int rel = (target - jit->prg) / 2;			\
+	_EMIT6(op | reg_high(b) << 16 | rel >> 16, rel & 0xffff);	\
+	REG_SET_SEEN(b);					\
+})
+
+#define EMIT6_PCREL_RIL(op, target)				\
+({								\
+	int rel = (target - jit->prg) / 2;			\
+	_EMIT6(op | rel >> 16, rel & 0xffff);			\
+})
+
 #define _EMIT6_IMM(op, imm)					\
 ({								\
 	unsigned int __imm = (imm);				\
@@ -475,8 +492,45 @@ static void bpf_jit_epilogue(struct bpf_jit *jit)
 	EMIT4(0xb9040000, REG_2, BPF_REG_0);
 	/* Restore registers */
 	save_restore_regs(jit, REGS_RESTORE);
+	if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
+		jit->r14_thunk_ip = jit->prg;
+		/* Generate __s390_indirect_jump_r14 thunk */
+		if (test_facility(35)) {
+			/* exrl %r0,.+10 */
+			EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
+		} else {
+			/* larl %r1,.+14 */
+			EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
+			/* ex 0,0(%r1) */
+			EMIT4_DISP(0x44000000, REG_0, REG_1, 0);
+		}
+		/* j . */
+		EMIT4_PCREL(0xa7f40000, 0);
+	}
 	/* br %r14 */
 	_EMIT2(0x07fe);
+
+	if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable &&
+	    (jit->seen & SEEN_FUNC)) {
+		jit->r1_thunk_ip = jit->prg;
+		/* Generate __s390_indirect_jump_r1 thunk */
+		if (test_facility(35)) {
+			/* exrl %r0,.+10 */
+			EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
+			/* j . */
+			EMIT4_PCREL(0xa7f40000, 0);
+			/* br %r1 */
+			_EMIT2(0x07f1);
+		} else {
+			/* larl %r1,.+14 */
+			EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
+			/* ex 0,S390_lowcore.br_r1_tampoline */
+			EMIT4_DISP(0x44000000, REG_0, REG_0,
+				   offsetof(struct _lowcore, br_r1_trampoline));
+			/* j . */
+			EMIT4_PCREL(0xa7f40000, 0);
+		}
+	}
 }
 
 /*
@@ -980,8 +1034,13 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i
 		/* lg %w1,<d(imm)>(%l) */
 		EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
 			      EMIT_CONST_U64(func));
-		/* basr %r14,%w1 */
-		EMIT2(0x0d00, REG_14, REG_W1);
+		if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
+			/* brasl %r14,__s390_indirect_jump_r1 */
+			EMIT6_PCREL_RILB(0xc0050000, REG_14, jit->r1_thunk_ip);
+		} else {
+			/* basr %r14,%w1 */
+			EMIT2(0x0d00, REG_14, REG_W1);
+		}
 		/* lgr %b0,%r2: load return value into %b0 */
 		EMIT4(0xb9040000, BPF_REG_0, REG_2);
 		if (bpf_helper_changes_skb_data((void *)func)) {

From f82e354fde83ff3864adb33c8cb2bbab3151d4b5 Mon Sep 17 00:00:00 2001
From: Jason Yan <yanaijie@huawei.com>
Date: Thu, 8 Mar 2018 10:34:53 +0800
Subject: [PATCH 0194/1852] scsi: libsas: defer ata device eh commands to
 libata

commit 318aaf34f1179b39fa9c30fa0f3288b645beee39 upstream.

When ata device doing EH, some commands still attached with tasks are
not passed to libata when abort failed or recover failed, so libata did
not handle these commands. After these commands done, sas task is freed,
but ata qc is not freed. This will cause ata qc leak and trigger a
warning like below:

WARNING: CPU: 0 PID: 28512 at drivers/ata/libata-eh.c:4037
ata_eh_finish+0xb4/0xcc
CPU: 0 PID: 28512 Comm: kworker/u32:2 Tainted: G     W  OE 4.14.0#1
......
Call trace:
[<ffff0000088b7bd0>] ata_eh_finish+0xb4/0xcc
[<ffff0000088b8420>] ata_do_eh+0xc4/0xd8
[<ffff0000088b8478>] ata_std_error_handler+0x44/0x8c
[<ffff0000088b8068>] ata_scsi_port_error_handler+0x480/0x694
[<ffff000008875fc4>] async_sas_ata_eh+0x4c/0x80
[<ffff0000080f6be8>] async_run_entry_fn+0x4c/0x170
[<ffff0000080ebd70>] process_one_work+0x144/0x390
[<ffff0000080ec100>] worker_thread+0x144/0x418
[<ffff0000080f2c98>] kthread+0x10c/0x138
[<ffff0000080855dc>] ret_from_fork+0x10/0x18

If ata qc leaked too many, ata tag allocation will fail and io blocked
for ever.

As suggested by Dan Williams, defer ata device commands to libata and
merge sas_eh_finish_cmd() with sas_eh_defer_cmd(). libata will handle
ata qcs correctly after this.

Signed-off-by: Jason Yan <yanaijie@huawei.com>
CC: Xiaofei Tan <tanxiaofei@huawei.com>
CC: John Garry <john.garry@huawei.com>
CC: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/libsas/sas_scsi_host.c | 33 ++++++++++++-----------------
 1 file changed, 13 insertions(+), 20 deletions(-)

diff --git a/drivers/scsi/libsas/sas_scsi_host.c b/drivers/scsi/libsas/sas_scsi_host.c
index 519dac4e341e3..9a8c2f97ed705 100644
--- a/drivers/scsi/libsas/sas_scsi_host.c
+++ b/drivers/scsi/libsas/sas_scsi_host.c
@@ -222,6 +222,7 @@ int sas_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 static void sas_eh_finish_cmd(struct scsi_cmnd *cmd)
 {
 	struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(cmd->device->host);
+	struct domain_device *dev = cmd_to_domain_dev(cmd);
 	struct sas_task *task = TO_SAS_TASK(cmd);
 
 	/* At this point, we only get called following an actual abort
@@ -230,6 +231,14 @@ static void sas_eh_finish_cmd(struct scsi_cmnd *cmd)
 	 */
 	sas_end_task(cmd, task);
 
+	if (dev_is_sata(dev)) {
+		/* defer commands to libata so that libata EH can
+		 * handle ata qcs correctly
+		 */
+		list_move_tail(&cmd->eh_entry, &sas_ha->eh_ata_q);
+		return;
+	}
+
 	/* now finish the command and move it on to the error
 	 * handler done list, this also takes it off the
 	 * error handler pending list.
@@ -237,22 +246,6 @@ static void sas_eh_finish_cmd(struct scsi_cmnd *cmd)
 	scsi_eh_finish_cmd(cmd, &sas_ha->eh_done_q);
 }
 
-static void sas_eh_defer_cmd(struct scsi_cmnd *cmd)
-{
-	struct domain_device *dev = cmd_to_domain_dev(cmd);
-	struct sas_ha_struct *ha = dev->port->ha;
-	struct sas_task *task = TO_SAS_TASK(cmd);
-
-	if (!dev_is_sata(dev)) {
-		sas_eh_finish_cmd(cmd);
-		return;
-	}
-
-	/* report the timeout to libata */
-	sas_end_task(cmd, task);
-	list_move_tail(&cmd->eh_entry, &ha->eh_ata_q);
-}
-
 static void sas_scsi_clear_queue_lu(struct list_head *error_q, struct scsi_cmnd *my_cmd)
 {
 	struct scsi_cmnd *cmd, *n;
@@ -260,7 +253,7 @@ static void sas_scsi_clear_queue_lu(struct list_head *error_q, struct scsi_cmnd
 	list_for_each_entry_safe(cmd, n, error_q, eh_entry) {
 		if (cmd->device->sdev_target == my_cmd->device->sdev_target &&
 		    cmd->device->lun == my_cmd->device->lun)
-			sas_eh_defer_cmd(cmd);
+			sas_eh_finish_cmd(cmd);
 	}
 }
 
@@ -622,12 +615,12 @@ static void sas_eh_handle_sas_errors(struct Scsi_Host *shost, struct list_head *
 		case TASK_IS_DONE:
 			SAS_DPRINTK("%s: task 0x%p is done\n", __func__,
 				    task);
-			sas_eh_defer_cmd(cmd);
+			sas_eh_finish_cmd(cmd);
 			continue;
 		case TASK_IS_ABORTED:
 			SAS_DPRINTK("%s: task 0x%p is aborted\n",
 				    __func__, task);
-			sas_eh_defer_cmd(cmd);
+			sas_eh_finish_cmd(cmd);
 			continue;
 		case TASK_IS_AT_LU:
 			SAS_DPRINTK("task 0x%p is at LU: lu recover\n", task);
@@ -638,7 +631,7 @@ static void sas_eh_handle_sas_errors(struct Scsi_Host *shost, struct list_head *
 					    "recovered\n",
 					    SAS_ADDR(task->dev),
 					    cmd->device->lun);
-				sas_eh_defer_cmd(cmd);
+				sas_eh_finish_cmd(cmd);
 				sas_scsi_clear_queue_lu(work_q, cmd);
 				goto Again;
 			}

From 5697b54069a77dc649cbbd8287912f9d4d91fb18 Mon Sep 17 00:00:00 2001
From: Alexander Potapenko <glider@google.com>
Date: Fri, 18 May 2018 16:23:18 +0200
Subject: [PATCH 0195/1852] scsi: sg: allocate with __GFP_ZERO in
 sg_build_indirect()

commit a45b599ad808c3c982fdcdc12b0b8611c2f92824 upstream.

This shall help avoid copying uninitialized memory to the userspace when
calling ioctl(fd, SG_IO) with an empty command.

Reported-by: syzbot+7d26fc1eea198488deab@syzkaller.appspotmail.com
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Potapenko <glider@google.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index cb19c9ad1b579..841f3fbec77ce 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -1903,7 +1903,7 @@ sg_build_indirect(Sg_scatter_hold * schp, Sg_fd * sfp, int buff_size)
 		num = (rem_sz > scatter_elem_sz_prev) ?
 			scatter_elem_sz_prev : rem_sz;
 
-		schp->pages[k] = alloc_pages(gfp_mask, order);
+		schp->pages[k] = alloc_pages(gfp_mask | __GFP_ZERO, order);
 		if (!schp->pages[k])
 			goto out;
 

From 15f203079a58fa91f5b4a636583998289b9cee50 Mon Sep 17 00:00:00 2001
From: Jens Remus <jremus@linux.ibm.com>
Date: Thu, 3 May 2018 13:52:47 +0200
Subject: [PATCH 0196/1852] scsi: zfcp: fix infinite iteration on ERP ready
 list

commit fa89adba1941e4f3b213399b81732a5c12fd9131 upstream.

zfcp_erp_adapter_reopen() schedules blocking of all of the adapter's
rports via zfcp_scsi_schedule_rports_block() and enqueues a reopen
adapter ERP action via zfcp_erp_action_enqueue(). Both are separately
processed asynchronously and concurrently.

Blocking of rports is done in a kworker by zfcp_scsi_rport_work(). It
calls zfcp_scsi_rport_block(), which then traces a DBF REC "scpdely" via
zfcp_dbf_rec_trig().  zfcp_dbf_rec_trig() acquires the DBF REC spin lock
and then iterates with list_for_each() over the adapter's ERP ready list
without holding the ERP lock. This opens a race window in which the
current list entry can be moved to another list, causing list_for_each()
to iterate forever on the wrong list, as the erp_ready_head is never
encountered as terminal condition.

Meanwhile the ERP action can be processed in the ERP thread by
zfcp_erp_thread(). It calls zfcp_erp_strategy(), which acquires the ERP
lock and then calls zfcp_erp_action_to_running() to move the ERP action
from the ready to the running list.  zfcp_erp_action_to_running() can
move the ERP action using list_move() just during the aforementioned
race window. It then traces a REC RUN "erator1" via zfcp_dbf_rec_run().
zfcp_dbf_rec_run() tries to acquire the DBF REC spin lock. If this is
held by the infinitely looping kworker, it effectively spins forever.

Example Sequence Diagram:

Process                ERP Thread             rport_work
-------------------    -------------------    -------------------
zfcp_erp_adapter_reopen()
zfcp_erp_adapter_block()
zfcp_scsi_schedule_rports_block()
lock ERP                                      zfcp_scsi_rport_work()
zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER)
list_add_tail() on ready                      !(rport_task==RPORT_ADD)
wake_up() ERP thread                          zfcp_scsi_rport_block()
zfcp_dbf_rec_trig()    zfcp_erp_strategy()    zfcp_dbf_rec_trig()
unlock ERP                                    lock DBF REC
zfcp_erp_wait()        lock ERP
|                      zfcp_erp_action_to_running()
|                                             list_for_each() ready
|                      list_move()              current entry
|                        ready to running
|                      zfcp_dbf_rec_run()       endless loop over running
|                      zfcp_dbf_rec_run_lvl()
|                      lock DBF REC spins forever

Any adapter recovery can trigger this, such as setting the device offline
or reboot.

V4.9 commit 4eeaa4f3f1d6 ("zfcp: close window with unblocked rport
during rport gone") introduced additional tracing of (un)blocking of
rports. It missed that the adapter->erp_lock must be held when calling
zfcp_dbf_rec_trig().

This fix uses the approach formerly introduced by commit aa0fec62391c
("[SCSI] zfcp: Fix sparse warning by providing new entry in dbf") that got
later removed by commit ae0904f60fab ("[SCSI] zfcp: Redesign of the debug
tracing for recovery actions.").

Introduce zfcp_dbf_rec_trig_lock(), a wrapper for zfcp_dbf_rec_trig() that
acquires and releases the adapter->erp_lock for read.

Reported-by: Sebastian Ott <sebott@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Fixes: 4eeaa4f3f1d6 ("zfcp: close window with unblocked rport during rport gone")
Cc: <stable@vger.kernel.org> # 2.6.32+
Reviewed-by: Benjamin Block <bblock@linux.vnet.ibm.com>
Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_dbf.c  | 23 ++++++++++++++++++++++-
 drivers/s390/scsi/zfcp_ext.h  |  5 ++++-
 drivers/s390/scsi/zfcp_scsi.c | 14 +++++++-------
 3 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index 34367d1729610..4534a7ce77b82 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -3,7 +3,7 @@
  *
  * Debug traces for zfcp.
  *
- * Copyright IBM Corp. 2002, 2017
+ * Copyright IBM Corp. 2002, 2018
  */
 
 #define KMSG_COMPONENT "zfcp"
@@ -287,6 +287,27 @@ void zfcp_dbf_rec_trig(char *tag, struct zfcp_adapter *adapter,
 	spin_unlock_irqrestore(&dbf->rec_lock, flags);
 }
 
+/**
+ * zfcp_dbf_rec_trig_lock - trace event related to triggered recovery with lock
+ * @tag: identifier for event
+ * @adapter: adapter on which the erp_action should run
+ * @port: remote port involved in the erp_action
+ * @sdev: scsi device involved in the erp_action
+ * @want: wanted erp_action
+ * @need: required erp_action
+ *
+ * The adapter->erp_lock must not be held.
+ */
+void zfcp_dbf_rec_trig_lock(char *tag, struct zfcp_adapter *adapter,
+			    struct zfcp_port *port, struct scsi_device *sdev,
+			    u8 want, u8 need)
+{
+	unsigned long flags;
+
+	read_lock_irqsave(&adapter->erp_lock, flags);
+	zfcp_dbf_rec_trig(tag, adapter, port, sdev, want, need);
+	read_unlock_irqrestore(&adapter->erp_lock, flags);
+}
 
 /**
  * zfcp_dbf_rec_run_lvl - trace event related to running recovery
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 21c8c689b02bb..7a7984a50683e 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -3,7 +3,7 @@
  *
  * External function declarations.
  *
- * Copyright IBM Corp. 2002, 2016
+ * Copyright IBM Corp. 2002, 2018
  */
 
 #ifndef ZFCP_EXT_H
@@ -34,6 +34,9 @@ extern int zfcp_dbf_adapter_register(struct zfcp_adapter *);
 extern void zfcp_dbf_adapter_unregister(struct zfcp_adapter *);
 extern void zfcp_dbf_rec_trig(char *, struct zfcp_adapter *,
 			      struct zfcp_port *, struct scsi_device *, u8, u8);
+extern void zfcp_dbf_rec_trig_lock(char *tag, struct zfcp_adapter *adapter,
+				   struct zfcp_port *port,
+				   struct scsi_device *sdev, u8 want, u8 need);
 extern void zfcp_dbf_rec_run(char *, struct zfcp_erp_action *);
 extern void zfcp_dbf_rec_run_lvl(int level, char *tag,
 				 struct zfcp_erp_action *erp);
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index a9b8104b982eb..bb99db2948ab2 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -3,7 +3,7 @@
  *
  * Interface to Linux SCSI midlayer.
  *
- * Copyright IBM Corp. 2002, 2017
+ * Copyright IBM Corp. 2002, 2018
  */
 
 #define KMSG_COMPONENT "zfcp"
@@ -616,9 +616,9 @@ static void zfcp_scsi_rport_register(struct zfcp_port *port)
 	ids.port_id = port->d_id;
 	ids.roles = FC_RPORT_ROLE_FCP_TARGET;
 
-	zfcp_dbf_rec_trig("scpaddy", port->adapter, port, NULL,
-			  ZFCP_PSEUDO_ERP_ACTION_RPORT_ADD,
-			  ZFCP_PSEUDO_ERP_ACTION_RPORT_ADD);
+	zfcp_dbf_rec_trig_lock("scpaddy", port->adapter, port, NULL,
+			       ZFCP_PSEUDO_ERP_ACTION_RPORT_ADD,
+			       ZFCP_PSEUDO_ERP_ACTION_RPORT_ADD);
 	rport = fc_remote_port_add(port->adapter->scsi_host, 0, &ids);
 	if (!rport) {
 		dev_err(&port->adapter->ccw_device->dev,
@@ -640,9 +640,9 @@ static void zfcp_scsi_rport_block(struct zfcp_port *port)
 	struct fc_rport *rport = port->rport;
 
 	if (rport) {
-		zfcp_dbf_rec_trig("scpdely", port->adapter, port, NULL,
-				  ZFCP_PSEUDO_ERP_ACTION_RPORT_DEL,
-				  ZFCP_PSEUDO_ERP_ACTION_RPORT_DEL);
+		zfcp_dbf_rec_trig_lock("scpdely", port->adapter, port, NULL,
+				       ZFCP_PSEUDO_ERP_ACTION_RPORT_DEL,
+				       ZFCP_PSEUDO_ERP_ACTION_RPORT_DEL);
 		fc_remote_port_delete(rport);
 		port->rport = NULL;
 	}

From 6250d5a905109b70887012bf50e2142a6a71c762 Mon Sep 17 00:00:00 2001
From: Vinod Koul <vinod.koul@intel.com>
Date: Tue, 12 Apr 2016 21:07:06 +0530
Subject: [PATCH 0197/1852] dmaengine: ensure dmaengine helpers check valid
 callback

commit 757d12e5849be549076901b0d33c60d5f360269c upstream.

dmaengine has various device callbacks and exposes helper
functions to invoke these. These helpers should check if channel,
device and callback is valid or not before invoking them.

Reported-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Jianming Qiao <jianming.qiao@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/dmaengine.h | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 59c5d73758d69..3050f88daf9eb 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -776,6 +776,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
 	sg_dma_address(&sg) = buf;
 	sg_dma_len(&sg) = len;
 
+	if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+		return NULL;
+
 	return chan->device->device_prep_slave_sg(chan, &sg, 1,
 						  dir, flags, NULL);
 }
@@ -784,6 +787,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
 	struct dma_chan *chan, struct scatterlist *sgl,	unsigned int sg_len,
 	enum dma_transfer_direction dir, unsigned long flags)
 {
+	if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+		return NULL;
+
 	return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
 						  dir, flags, NULL);
 }
@@ -795,6 +801,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg(
 	enum dma_transfer_direction dir, unsigned long flags,
 	struct rio_dma_ext *rio_ext)
 {
+	if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+		return NULL;
+
 	return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
 						  dir, flags, rio_ext);
 }
@@ -805,6 +814,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
 		size_t period_len, enum dma_transfer_direction dir,
 		unsigned long flags)
 {
+	if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic)
+		return NULL;
+
 	return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
 						period_len, dir, flags);
 }
@@ -813,6 +825,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
 		struct dma_chan *chan, struct dma_interleaved_template *xt,
 		unsigned long flags)
 {
+	if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma)
+		return NULL;
+
 	return chan->device->device_prep_interleaved_dma(chan, xt, flags);
 }
 
@@ -820,7 +835,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
 		struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
 		unsigned long flags)
 {
-	if (!chan || !chan->device)
+	if (!chan || !chan->device || !chan->device->device_prep_dma_memset)
 		return NULL;
 
 	return chan->device->device_prep_dma_memset(chan, dest, value,
@@ -833,6 +848,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg(
 		struct scatterlist *src_sg, unsigned int src_nents,
 		unsigned long flags)
 {
+	if (!chan || !chan->device || !chan->device->device_prep_dma_sg)
+		return NULL;
+
 	return chan->device->device_prep_dma_sg(chan, dst_sg, dst_nents,
 			src_sg, src_nents, flags);
 }

From cc9121c77c571cf7c832b26505ac6374368b74d9 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Thu, 18 Feb 2016 17:06:30 +0100
Subject: [PATCH 0198/1852] gpio: rcar: Add Runtime PM handling for interrupts

commit b26a719bdba9aa926ceaadecc66e07623d2b8a53 upstream.

The R-Car GPIO driver handles Runtime PM for requested GPIOs only.

When using a GPIO purely as an interrupt source, no Runtime PM handling
is done, and the GPIO module's clock may not be enabled.

To fix this:
  - Add .irq_request_resources() and .irq_release_resources() callbacks
    to handle Runtime PM when an interrupt is requested,
  - Add irq_bus_lock() and sync_unlock() callbacks to handle Runtime PM
    when e.g. disabling/enabling an interrupt, or configuring the
    interrupt type.

Fixes: d5c3d84657db57bd "net: phy: Avoid polling PHY with PHY_IGNORE_INTERRUPTS"
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[fabrizio: cherry-pick to v4.4.y. Use container_of instead of
gpiochip_get_data.]
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpio/gpio-rcar.c | 46 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 3cbb25ecfc7a1..32fceda236c9b 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -200,6 +200,48 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)
 	return 0;
 }
 
+static void gpio_rcar_irq_bus_lock(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
+						gpio_chip);
+
+	pm_runtime_get_sync(&p->pdev->dev);
+}
+
+static void gpio_rcar_irq_bus_sync_unlock(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
+						gpio_chip);
+
+	pm_runtime_put(&p->pdev->dev);
+}
+
+
+static int gpio_rcar_irq_request_resources(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
+						gpio_chip);
+	int error;
+
+	error = pm_runtime_get_sync(&p->pdev->dev);
+	if (error < 0)
+		return error;
+
+	return 0;
+}
+
+static void gpio_rcar_irq_release_resources(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
+						gpio_chip);
+
+	pm_runtime_put(&p->pdev->dev);
+}
+
 static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
 {
 	struct gpio_rcar_priv *p = dev_id;
@@ -460,6 +502,10 @@ static int gpio_rcar_probe(struct platform_device *pdev)
 	irq_chip->irq_unmask = gpio_rcar_irq_enable;
 	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
 	irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;
+	irq_chip->irq_bus_lock = gpio_rcar_irq_bus_lock;
+	irq_chip->irq_bus_sync_unlock = gpio_rcar_irq_bus_sync_unlock;
+	irq_chip->irq_request_resources = gpio_rcar_irq_request_resources;
+	irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
 	irq_chip->flags	= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;
 
 	ret = gpiochip_add(gpio_chip);

From c1dc1dfc9eb8aa32c8c53c448756104fc05a9520 Mon Sep 17 00:00:00 2001
From: Johannes Berg <johannes.berg@intel.com>
Date: Tue, 3 Apr 2018 14:33:49 +0200
Subject: [PATCH 0199/1852] cfg80211: limit wiphy names to 128 bytes

commit a7cfebcb7594a24609268f91299ab85ba064bf82 upstream.

There's currently no limit on wiphy names, other than netlink
message size and memory limitations, but that causes issues when,
for example, the wiphy name is used in a uevent, e.g. in rfkill
where we use the same name for the rfkill instance, and then the
buffer there is "only" 2k for the environment variables.

This was reported by syzkaller, which used a 4k name.

Limit the name to something reasonable, I randomly picked 128.

Reported-by: syzbot+230d9e642a85d3fec29c@syzkaller.appspotmail.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/uapi/linux/nl80211.h | 2 ++
 net/wireless/core.c          | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index 1f0b4cf5dd03d..f4227173b5d85 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -2195,6 +2195,8 @@ enum nl80211_attrs {
 #define NL80211_ATTR_KEYS NL80211_ATTR_KEYS
 #define NL80211_ATTR_FEATURE_FLAGS NL80211_ATTR_FEATURE_FLAGS
 
+#define NL80211_WIPHY_NAME_MAXLEN		128
+
 #define NL80211_MAX_SUPP_RATES			32
 #define NL80211_MAX_SUPP_HT_RATES		77
 #define NL80211_MAX_SUPP_REG_RULES		64
diff --git a/net/wireless/core.c b/net/wireless/core.c
index eeaf83acba1b9..a1e909ae0f781 100644
--- a/net/wireless/core.c
+++ b/net/wireless/core.c
@@ -94,6 +94,9 @@ static int cfg80211_dev_check_name(struct cfg80211_registered_device *rdev,
 
 	ASSERT_RTNL();
 
+	if (strlen(newname) > NL80211_WIPHY_NAME_MAXLEN)
+		return -EINVAL;
+
 	/* prohibit calling the thing phy%d when %d is not its number */
 	sscanf(newname, PHY_NAME "%d%n", &wiphy_idx, &taken);
 	if (taken == strlen(newname) && wiphy_idx != rdev->wiphy_idx) {

From aedf717067767fbc2d55c653fb1bc8260f9596f1 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Fri, 18 May 2018 16:09:16 -0700
Subject: [PATCH 0200/1852] hfsplus: stop workqueue when fill_super() failed

commit 66072c29328717072fd84aaff3e070e3f008ba77 upstream.

syzbot is reporting ODEBUG messages at hfsplus_fill_super() [1].  This
is because hfsplus_fill_super() forgot to call cancel_delayed_work_sync().

As far as I can see, it is hfsplus_mark_mdb_dirty() from
hfsplus_new_inode() in hfsplus_fill_super() that calls
queue_delayed_work().  Therefore, I assume that hfsplus_new_inode() does
not fail if queue_delayed_work() was called, and the out_put_hidden_dir
label is the appropriate location to call cancel_delayed_work_sync().

[1] https://syzkaller.appspot.com/bug?id=a66f45e96fdbeb76b796bf46eb25ea878c42a6c9

Link: http://lkml.kernel.org/r/964a8b27-cd69-357c-fe78-76b066056201@I-love.SAKURA.ne.jp
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+4f2e5f086147d543ab03@syzkaller.appspotmail.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: David Howells <dhowells@redhat.com>
Cc: Ernesto A. Fernandez <ernesto.mnd.fernandez@gmail.com>
Cc: Vyacheslav Dubeyko <slava@dubeyko.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/hfsplus/super.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/hfsplus/super.c b/fs/hfsplus/super.c
index 7302d96ae8bfd..fa40e756c5013 100644
--- a/fs/hfsplus/super.c
+++ b/fs/hfsplus/super.c
@@ -585,6 +585,7 @@ static int hfsplus_fill_super(struct super_block *sb, void *data, int silent)
 	return 0;
 
 out_put_hidden_dir:
+	cancel_delayed_work_sync(&sbi->sync_work);
 	iput(sbi->hidden_dir);
 out_put_root:
 	dput(sb->s_root);

From c38ef23cafcf038c9ea3a52c803ab2dec67c8a3d Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Wed, 9 May 2018 19:42:20 +0900
Subject: [PATCH 0201/1852] x86/kexec: Avoid double free_page() upon
 do_kexec_load() failure

commit a466ef76b815b86748d9870ef2a430af7b39c710 upstream.

>From ff82bedd3e12f0d3353282054ae48c3bd8c72012 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Wed, 9 May 2018 12:12:39 +0900
Subject: x86/kexec: Avoid double free_page() upon do_kexec_load() failure

syzbot is reporting crashes after memory allocation failure inside
do_kexec_load() [1]. This is because free_transition_pgtable() is called
by both init_transition_pgtable() and machine_kexec_cleanup() when memory
allocation failed inside init_transition_pgtable().

Regarding 32bit code, machine_kexec_free_page_tables() is called by both
machine_kexec_alloc_page_tables() and machine_kexec_cleanup() when memory
allocation failed inside machine_kexec_alloc_page_tables().

Fix this by leaving the error handling to machine_kexec_cleanup()
(and optionally setting NULL after free_page()).

[1] https://syzkaller.appspot.com/bug?id=91e52396168cf2bdd572fe1e1bc0bc645c1c6b40

Fixes: f5deb79679af6eb4 ("x86: kexec: Use one page table in x86_64 machine_kexec")
Fixes: 92be3d6bdf2cb349 ("kexec/i386: allocate page table pages dynamically")
Reported-by: syzbot <syzbot+d96f60296ef613fe1d69@syzkaller.appspotmail.com>
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Baoquan He <bhe@redhat.com>
Cc: thomas.lendacky@amd.com
Cc: prudo@linux.vnet.ibm.com
Cc: Huang Ying <ying.huang@intel.com>
Cc: syzkaller-bugs@googlegroups.com
Cc: takahiro.akashi@linaro.org
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: akpm@linux-foundation.org
Cc: dyoung@redhat.com
Cc: kirill.shutemov@linux.intel.com
Link: https://lkml.kernel.org/r/201805091942.DGG12448.tMFVFSJFQOOLHO@I-love.SAKURA.ne.jp
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/machine_kexec_32.c | 6 +++++-
 arch/x86/kernel/machine_kexec_64.c | 4 +++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 469b23d6acc27..fd7e9937ddd6d 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -71,12 +71,17 @@ static void load_segments(void)
 static void machine_kexec_free_page_tables(struct kimage *image)
 {
 	free_page((unsigned long)image->arch.pgd);
+	image->arch.pgd = NULL;
 #ifdef CONFIG_X86_PAE
 	free_page((unsigned long)image->arch.pmd0);
+	image->arch.pmd0 = NULL;
 	free_page((unsigned long)image->arch.pmd1);
+	image->arch.pmd1 = NULL;
 #endif
 	free_page((unsigned long)image->arch.pte0);
+	image->arch.pte0 = NULL;
 	free_page((unsigned long)image->arch.pte1);
+	image->arch.pte1 = NULL;
 }
 
 static int machine_kexec_alloc_page_tables(struct kimage *image)
@@ -93,7 +98,6 @@ static int machine_kexec_alloc_page_tables(struct kimage *image)
 	    !image->arch.pmd0 || !image->arch.pmd1 ||
 #endif
 	    !image->arch.pte0 || !image->arch.pte1) {
-		machine_kexec_free_page_tables(image);
 		return -ENOMEM;
 	}
 	return 0;
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 615cc42ad6315..2ddb850bceab2 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -37,8 +37,11 @@ static struct kexec_file_ops *kexec_file_loaders[] = {
 static void free_transition_pgtable(struct kimage *image)
 {
 	free_page((unsigned long)image->arch.pud);
+	image->arch.pud = NULL;
 	free_page((unsigned long)image->arch.pmd);
+	image->arch.pmd = NULL;
 	free_page((unsigned long)image->arch.pte);
+	image->arch.pte = NULL;
 }
 
 static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
@@ -79,7 +82,6 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
 	set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
 	return 0;
 err:
-	free_transition_pgtable(image);
 	return result;
 }
 

From 9b5d6da2c8a124eb80ed99e91c796235c86b4d45 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sat, 26 May 2018 08:49:01 +0200
Subject: [PATCH 0202/1852] Linux 4.4.133

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 6b0c49d2d4440..2ad1ecd6cb0e1 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 132
+SUBLEVEL = 133
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 39065d153413f490d733638af774614a35256764 Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@mips.com>
Date: Mon, 30 Apr 2018 15:56:47 +0100
Subject: [PATCH 0203/1852] MIPS: ptrace: Expose FIR register through FP regset

commit 71e909c0cdad28a1df1fa14442929e68615dee45 upstream.

Correct commit 7aeb753b5353 ("MIPS: Implement task_user_regset_view.")
and expose the FIR register using the unused 4 bytes at the end of the
NT_PRFPREG regset.  Without that register included clients cannot use
the PTRACE_GETREGSET request to retrieve the complete FPU register set
and have to resort to one of the older interfaces, either PTRACE_PEEKUSR
or PTRACE_GETFPREGS, to retrieve the missing piece of data.  Also the
register is irreversibly missing from core dumps.

This register is architecturally hardwired and read-only so the write
path does not matter.  Ignore data supplied on writes then.

Fixes: 7aeb753b5353 ("MIPS: Implement task_user_regset_view.")
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.13+
Patchwork: https://patchwork.linux-mips.org/patch/19273/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/ptrace.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 0f0030e7f6d97..fedf5ae11e132 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -482,7 +482,7 @@ static int fpr_get_msa(struct task_struct *target,
 /*
  * Copy the floating-point context to the supplied NT_PRFPREG buffer.
  * Choose the appropriate helper for general registers, and then copy
- * the FCSR register separately.
+ * the FCSR and FIR registers separately.
  */
 static int fpr_get(struct task_struct *target,
 		   const struct user_regset *regset,
@@ -490,6 +490,7 @@ static int fpr_get(struct task_struct *target,
 		   void *kbuf, void __user *ubuf)
 {
 	const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
+	const int fir_pos = fcr31_pos + sizeof(u32);
 	int err;
 
 	if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
@@ -502,6 +503,12 @@ static int fpr_get(struct task_struct *target,
 	err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 				  &target->thread.fpu.fcr31,
 				  fcr31_pos, fcr31_pos + sizeof(u32));
+	if (err)
+		return err;
+
+	err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+				  &boot_cpu_data.fpu_id,
+				  fir_pos, fir_pos + sizeof(u32));
 
 	return err;
 }
@@ -550,7 +557,8 @@ static int fpr_set_msa(struct task_struct *target,
 /*
  * Copy the supplied NT_PRFPREG buffer to the floating-point context.
  * Choose the appropriate helper for general registers, and then copy
- * the FCSR register separately.
+ * the FCSR register separately.  Ignore the incoming FIR register
+ * contents though, as the register is read-only.
  *
  * We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
  * which is supposed to have been guaranteed by the kernel before
@@ -564,6 +572,7 @@ static int fpr_set(struct task_struct *target,
 		   const void *kbuf, const void __user *ubuf)
 {
 	const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
+	const int fir_pos = fcr31_pos + sizeof(u32);
 	u32 fcr31;
 	int err;
 
@@ -591,6 +600,11 @@ static int fpr_set(struct task_struct *target,
 		ptrace_setfcr31(target, fcr31);
 	}
 
+	if (count > 0)
+		err = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+						fir_pos,
+						fir_pos + sizeof(u32));
+
 	return err;
 }
 

From d5e66543451b0713d70fc83b43278e091b3e404a Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@mips.com>
Date: Mon, 14 May 2018 16:49:43 +0100
Subject: [PATCH 0204/1852] MIPS: Fix ptrace(2) PTRACE_PEEKUSR and
 PTRACE_POKEUSR accesses to o32 FGRs

commit 9a3a92ccfe3620743d4ae57c987dc8e9c5f88996 upstream.

Check the TIF_32BIT_FPREGS task setting of the tracee rather than the
tracer in determining the layout of floating-point general registers in
the floating-point context, correcting access to odd-numbered registers
for o32 tracees where the setting disagrees between the two processes.

Fixes: 597ce1723e0f ("MIPS: Support for 64-bit FP with O32 binaries")
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.14+
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/ptrace.c   | 4 ++--
 arch/mips/kernel/ptrace32.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index fedf5ae11e132..8f9d85a087e48 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -829,7 +829,7 @@ long arch_ptrace(struct task_struct *child, long request,
 			fregs = get_fpu_regs(child);
 
 #ifdef CONFIG_32BIT
-			if (test_thread_flag(TIF_32BIT_FPREGS)) {
+			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 				/*
 				 * The odd registers are actually the high
 				 * order bits of the values stored in the even
@@ -918,7 +918,7 @@ long arch_ptrace(struct task_struct *child, long request,
 
 			init_fp_ctx(child);
 #ifdef CONFIG_32BIT
-			if (test_thread_flag(TIF_32BIT_FPREGS)) {
+			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 				/*
 				 * The odd registers are actually the high
 				 * order bits of the values stored in the even
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 283b5a1967d14..b4b7e02443e73 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -97,7 +97,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 				break;
 			}
 			fregs = get_fpu_regs(child);
-			if (test_thread_flag(TIF_32BIT_FPREGS)) {
+			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 				/*
 				 * The odd registers are actually the high
 				 * order bits of the values stored in the even
@@ -203,7 +203,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 				       sizeof(child->thread.fpu));
 				child->thread.fpu.fcr31 = 0;
 			}
-			if (test_thread_flag(TIF_32BIT_FPREGS)) {
+			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 				/*
 				 * The odd registers are actually the high
 				 * order bits of the values stored in the even

From 8dde2039bc53101e015589ffef51fea8d3cba627 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Mon, 14 May 2018 18:23:50 +0100
Subject: [PATCH 0205/1852] KVM: Fix spelling mistake: "cop_unsuable" ->
 "cop_unusable"

commit ba3696e94d9d590d9a7e55f68e81c25dba515191 upstream.

Trivial fix to spelling mistake in debugfs_entries text.

Fixes: 669e846e6c4e ("KVM/MIPS32: MIPS arch specific APIs for KVM")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kernel-janitors@vger.kernel.org
Cc: <stable@vger.kernel.org> # 3.10+
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kvm/mips.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
index a017b23ee4aa1..8a95c3d76a9a6 100644
--- a/arch/mips/kvm/mips.c
+++ b/arch/mips/kvm/mips.c
@@ -40,7 +40,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
 	{ "cache",	  VCPU_STAT(cache_exits),	 KVM_STAT_VCPU },
 	{ "signal",	  VCPU_STAT(signal_exits),	 KVM_STAT_VCPU },
 	{ "interrupt",	  VCPU_STAT(int_exits),		 KVM_STAT_VCPU },
-	{ "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
+	{ "cop_unusable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
 	{ "tlbmod",	  VCPU_STAT(tlbmod_exits),	 KVM_STAT_VCPU },
 	{ "tlbmiss_ld",	  VCPU_STAT(tlbmiss_ld_exits),	 KVM_STAT_VCPU },
 	{ "tlbmiss_st",	  VCPU_STAT(tlbmiss_st_exits),	 KVM_STAT_VCPU },

From 0e3282c50ace390dde219b4de2356db9b5394b3a Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Sun, 6 May 2018 12:15:20 -0400
Subject: [PATCH 0206/1852] affs_lookup(): close a race with affs_remove_link()

commit 30da870ce4a4e007c901858a96e9e394a1daa74a upstream.

we unlock the directory hash too early - if we are looking at secondary
link and primary (in another directory) gets removed just as we unlock,
we could have the old primary moved in place of the secondary, leaving
us to look into freed entry (and leaving our dentry with ->d_fsdata
pointing to a freed entry).

Cc: stable@vger.kernel.org # 2.4.4+
Acked-by: David Sterba <dsterba@suse.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/affs/namei.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/fs/affs/namei.c b/fs/affs/namei.c
index 181e05b46e726..92448d0ad900c 100644
--- a/fs/affs/namei.c
+++ b/fs/affs/namei.c
@@ -224,9 +224,10 @@ affs_lookup(struct inode *dir, struct dentry *dentry, unsigned int flags)
 
 	affs_lock_dir(dir);
 	bh = affs_find_entry(dir, dentry);
-	affs_unlock_dir(dir);
-	if (IS_ERR(bh))
+	if (IS_ERR(bh)) {
+		affs_unlock_dir(dir);
 		return ERR_CAST(bh);
+	}
 	if (bh) {
 		u32 ino = bh->b_blocknr;
 
@@ -240,10 +241,13 @@ affs_lookup(struct inode *dir, struct dentry *dentry, unsigned int flags)
 		}
 		affs_brelse(bh);
 		inode = affs_iget(sb, ino);
-		if (IS_ERR(inode))
+		if (IS_ERR(inode)) {
+			affs_unlock_dir(dir);
 			return ERR_CAST(inode);
+		}
 	}
 	d_add(dentry, inode);
+	affs_unlock_dir(dir);
 	return NULL;
 }
 

From 288e65667ad25b1a609bc598ca7575a3e85e109f Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Sun, 20 May 2018 16:46:23 -0400
Subject: [PATCH 0207/1852] aio: fix io_destroy(2) vs. lookup_ioctx() race

commit baf10564fbb66ea222cae66fbff11c444590ffd9 upstream.

kill_ioctx() used to have an explicit RCU delay between removing the
reference from ->ioctx_table and percpu_ref_kill() dropping the refcount.
At some point that delay had been removed, on the theory that
percpu_ref_kill() itself contained an RCU delay.  Unfortunately, that was
the wrong kind of RCU delay and it didn't care about rcu_read_lock() used
by lookup_ioctx().  As the result, we could get ctx freed right under
lookup_ioctx().  Tejun has fixed that in a6d7cff472e ("fs/aio: Add explicit
RCU grace period when freeing kioctx"); however, that fix is not enough.

Suppose io_destroy() from one thread races with e.g. io_setup() from another;
CPU1 removes the reference from current->mm->ioctx_table[...] just as CPU2
has picked it (under rcu_read_lock()).  Then CPU1 proceeds to drop the
refcount, getting it to 0 and triggering a call of free_ioctx_users(),
which proceeds to drop the secondary refcount and once that reaches zero
calls free_ioctx_reqs().  That does
        INIT_RCU_WORK(&ctx->free_rwork, free_ioctx);
        queue_rcu_work(system_wq, &ctx->free_rwork);
and schedules freeing the whole thing after RCU delay.

In the meanwhile CPU2 has gotten around to percpu_ref_get(), bumping the
refcount from 0 to 1 and returned the reference to io_setup().

Tejun's fix (that queue_rcu_work() in there) guarantees that ctx won't get
freed until after percpu_ref_get().  Sure, we'd increment the counter before
ctx can be freed.  Now we are out of rcu_read_lock() and there's nothing to
stop freeing of the whole thing.  Unfortunately, CPU2 assumes that since it
has grabbed the reference, ctx is *NOT* going away until it gets around to
dropping that reference.

The fix is obvious - use percpu_ref_tryget_live() and treat failure as miss.
It's not costlier than what we currently do in normal case, it's safe to
call since freeing *is* delayed and it closes the race window - either
lookup_ioctx() comes before percpu_ref_kill() (in which case ctx->users
won't reach 0 until the caller of lookup_ioctx() drops it) or lookup_ioctx()
fails, ctx->users is unaffected and caller of lookup_ioctx() doesn't see
the object in question at all.

Cc: stable@kernel.org
Fixes: a6d7cff472e "fs/aio: Add explicit RCU grace period when freeing kioctx"
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/aio.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/aio.c b/fs/aio.c
index 88ede4a84ce05..4efaf29354a61 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -1066,8 +1066,8 @@ static struct kioctx *lookup_ioctx(unsigned long ctx_id)
 
 	ctx = rcu_dereference(table->table[id]);
 	if (ctx && ctx->user_id == ctx_id) {
-		percpu_ref_get(&ctx->users);
-		ret = ctx;
+		if (percpu_ref_tryget_live(&ctx->users))
+			ret = ctx;
 	}
 out:
 	rcu_read_unlock();

From b9fdcf5d0bc8777723e25f09c15445a3c74783f2 Mon Sep 17 00:00:00 2001
From: Ben Hutchings <ben.hutchings@codethink.co.uk>
Date: Thu, 17 May 2018 22:34:39 +0100
Subject: [PATCH 0208/1852] ALSA: timer: Fix pause event notification

commit 3ae180972564846e6d794e3615e1ab0a1e6c4ef9 upstream.

Commit f65e0d299807 ("ALSA: timer: Call notifier in the same spinlock")
combined the start/continue and stop/pause functions, and in doing so
changed the event code for the pause case to SNDRV_TIMER_EVENT_CONTINUE.
Change it back to SNDRV_TIMER_EVENT_PAUSE.

Fixes: f65e0d299807 ("ALSA: timer: Call notifier in the same spinlock")
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/core/timer.c b/sound/core/timer.c
index 5a718b2d3c9a0..ef850a99d64a8 100644
--- a/sound/core/timer.c
+++ b/sound/core/timer.c
@@ -548,7 +548,7 @@ static int snd_timer_stop1(struct snd_timer_instance *timeri, bool stop)
 	}
 	timeri->flags &= ~(SNDRV_TIMER_IFLG_RUNNING | SNDRV_TIMER_IFLG_START);
 	snd_timer_notify1(timeri, stop ? SNDRV_TIMER_EVENT_STOP :
-			  SNDRV_TIMER_EVENT_CONTINUE);
+			  SNDRV_TIMER_EVENT_PAUSE);
  unlock:
 	spin_unlock_irqrestore(&timer->lock, flags);
 	return result;
@@ -570,7 +570,7 @@ static int snd_timer_stop_slave(struct snd_timer_instance *timeri, bool stop)
 		list_del_init(&timeri->ack_list);
 		list_del_init(&timeri->active_list);
 		snd_timer_notify1(timeri, stop ? SNDRV_TIMER_EVENT_STOP :
-				  SNDRV_TIMER_EVENT_CONTINUE);
+				  SNDRV_TIMER_EVENT_PAUSE);
 		spin_unlock(&timeri->timer->lock);
 	}
 	spin_unlock_irqrestore(&slave_active_lock, flags);

From b9958f9330ff2ffa95390e971f76e3b6f0306d1f Mon Sep 17 00:00:00 2001
From: Corneliu Doban <corneliu.doban@broadcom.com>
Date: Fri, 18 May 2018 15:03:56 -0700
Subject: [PATCH 0209/1852] mmc: sdhci-iproc: fix 32bit writes for
 TRANSFER_MODE register

commit 5f651b870485ee60f5abbbd85195a6852978894a upstream.

When the host controller accepts only 32bit writes, the value of the
16bit TRANSFER_MODE register, that has the same 32bit address as the
16bit COMMAND register, needs to be saved and it will be written
in a 32bit write together with the command as this will trigger the
host to send the command on the SD interface.
When sending the tuning command, TRANSFER_MODE is written and then
sdhci_set_transfer_mode reads it back to clear AUTO_CMD12 bit and
write it again resulting in wrong value to be written because the
initial write value was saved in a shadow and the read-back returned
a wrong value, from the register.
Fix sdhci_iproc_readw to return the saved value of TRANSFER_MODE
when a saved value exist.
Same fix for read of BLOCK_SIZE and BLOCK_COUNT registers, that are
saved for a different reason, although a scenario that will cause the
mentioned problem on this registers is not probable.

Fixes: b580c52d58d9 ("mmc: sdhci-iproc: add IPROC SDHCI driver")
Signed-off-by: Corneliu Doban <corneliu.doban@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Cc: stable@vger.kernel.org # v4.1+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mmc/host/sdhci-iproc.c | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
index f280744578e42..ffd448149796a 100644
--- a/drivers/mmc/host/sdhci-iproc.c
+++ b/drivers/mmc/host/sdhci-iproc.c
@@ -32,6 +32,8 @@ struct sdhci_iproc_host {
 	const struct sdhci_iproc_data *data;
 	u32 shadow_cmd;
 	u32 shadow_blk;
+	bool is_cmd_shadowed;
+	bool is_blk_shadowed;
 };
 
 #define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
@@ -47,8 +49,22 @@ static inline u32 sdhci_iproc_readl(struct sdhci_host *host, int reg)
 
 static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg)
 {
-	u32 val = sdhci_iproc_readl(host, (reg & ~3));
-	u16 word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff;
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+	struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host);
+	u32 val;
+	u16 word;
+
+	if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) {
+		/* Get the saved transfer mode */
+		val = iproc_host->shadow_cmd;
+	} else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
+		   iproc_host->is_blk_shadowed) {
+		/* Get the saved block info */
+		val = iproc_host->shadow_blk;
+	} else {
+		val = sdhci_iproc_readl(host, (reg & ~3));
+	}
+	word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff;
 	return word;
 }
 
@@ -104,13 +120,15 @@ static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg)
 
 	if (reg == SDHCI_COMMAND) {
 		/* Write the block now as we are issuing a command */
-		if (iproc_host->shadow_blk != 0) {
+		if (iproc_host->is_blk_shadowed) {
 			sdhci_iproc_writel(host, iproc_host->shadow_blk,
 				SDHCI_BLOCK_SIZE);
-			iproc_host->shadow_blk = 0;
+			iproc_host->is_blk_shadowed = false;
 		}
 		oldval = iproc_host->shadow_cmd;
-	} else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
+		iproc_host->is_cmd_shadowed = false;
+	} else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
+		   iproc_host->is_blk_shadowed) {
 		/* Block size and count are stored in shadow reg */
 		oldval = iproc_host->shadow_blk;
 	} else {
@@ -122,9 +140,11 @@ static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg)
 	if (reg == SDHCI_TRANSFER_MODE) {
 		/* Save the transfer mode until the command is issued */
 		iproc_host->shadow_cmd = newval;
+		iproc_host->is_cmd_shadowed = true;
 	} else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
 		/* Save the block info until the command is issued */
 		iproc_host->shadow_blk = newval;
+		iproc_host->is_blk_shadowed = true;
 	} else {
 		/* Command or other regular 32-bit write */
 		sdhci_iproc_writel(host, newval, reg & ~3);

From 74d384cdb1b270b20b863355c046b21f144e6637 Mon Sep 17 00:00:00 2001
From: Tejun Heo <tj@kernel.org>
Date: Tue, 8 May 2018 14:21:56 -0700
Subject: [PATCH 0210/1852] libata: Blacklist some Sandisk SSDs for NCQ

commit 322579dcc865b94b47345ad1b6002ad167f85405 upstream.

Sandisk SSDs SD7SN6S256G and SD8SN8U256G are regularly locking up
regularly under sustained moderate load with NCQ enabled.  Blacklist
for now.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Dave Jones <davej@codemonkey.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-core.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 60d6db82ce5a6..c77fae2d7428a 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4187,6 +4187,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
 	/* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
 	{ "C300-CTFDDAC128MAG",	"0001",		ATA_HORKAGE_NONCQ, },
 
+	/* Some Sandisk SSDs lock up hard with NCQ enabled.  Reported on
+	   SD7SN6S256G and SD8SN8U256G */
+	{ "SanDisk SD[78]SN*G",	NULL,		ATA_HORKAGE_NONCQ, },
+
 	/* devices which puke on READ_NATIVE_MAX */
 	{ "HDS724040KLSA80",	"KFAOA20N",	ATA_HORKAGE_BROKEN_HPA, },
 	{ "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },

From a24f70e6fb8e7cc3275d2dc043e91e2276aea2fb Mon Sep 17 00:00:00 2001
From: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Date: Sat, 19 May 2018 22:29:36 +0100
Subject: [PATCH 0211/1852] libata: blacklist Micron 500IT SSD with MU01
 firmware

commit 136d769e0b3475d71350aa3648a116a6ee7a8f6c upstream.

While whitelisting Micron M500DC drives, the tweaked blacklist entry
enabled queued TRIM from M500IT variants also. But these do not support
queued TRIM. And while using those SSDs with the latest kernel we have
seen errors and even the partition table getting corrupted.

Some part from the dmesg:
[    6.727384] ata1.00: ATA-9: Micron_M500IT_MTFDDAK060MBD, MU01, max UDMA/133
[    6.727390] ata1.00: 117231408 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
[    6.741026] ata1.00: supports DRM functions and may not be fully accessible
[    6.759887] ata1.00: configured for UDMA/133
[    6.762256] scsi 0:0:0:0: Direct-Access     ATA      Micron_M500IT_MT MU01 PQ: 0 ANSI: 5

and then for the error:
[  120.860334] ata1.00: exception Emask 0x1 SAct 0x7ffc0007 SErr 0x0 action 0x6 frozen
[  120.860338] ata1.00: irq_stat 0x40000008
[  120.860342] ata1.00: failed command: SEND FPDMA QUEUED
[  120.860351] ata1.00: cmd 64/01:00:00:00:00/00:00:00:00:00/a0 tag 0 ncq dma 512 out
         res 40/00:00:00:00:00/00:00:00:00:00/00 Emask 0x5 (timeout)
[  120.860353] ata1.00: status: { DRDY }
[  120.860543] ata1: hard resetting link
[  121.166128] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[  121.166376] ata1.00: supports DRM functions and may not be fully accessible
[  121.186238] ata1.00: supports DRM functions and may not be fully accessible
[  121.204445] ata1.00: configured for UDMA/133
[  121.204454] ata1.00: device reported invalid CHS sector 0
[  121.204541] sd 0:0:0:0: [sda] tag#18 UNKNOWN(0x2003) Result: hostbyte=0x00 driverbyte=0x08
[  121.204546] sd 0:0:0:0: [sda] tag#18 Sense Key : 0x5 [current]
[  121.204550] sd 0:0:0:0: [sda] tag#18 ASC=0x21 ASCQ=0x4
[  121.204555] sd 0:0:0:0: [sda] tag#18 CDB: opcode=0x93 93 08 00 00 00 00 00 04 28 80 00 00 00 30 00 00
[  121.204559] print_req_error: I/O error, dev sda, sector 272512

After few reboots with these errors, and the SSD is corrupted.
After blacklisting it, the errors are not seen and the SSD does not get
corrupted any more.

Fixes: 243918be6393 ("libata: Do not blacklist Micron M500DC")
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: stable@vger.kernel.org
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-core.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index c77fae2d7428a..f9b86a1d922d7 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4251,6 +4251,8 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
 	{ "SanDisk SD7UB3Q*G1001",	NULL,	ATA_HORKAGE_NOLPM, },
 
 	/* devices that don't properly handle queued TRIM commands */
+	{ "Micron_M500IT_*",		"MU01",	ATA_HORKAGE_NO_NCQ_TRIM |
+						ATA_HORKAGE_ZERO_AFTER_TRIM, },
 	{ "Micron_M500_*",		NULL,	ATA_HORKAGE_NO_NCQ_TRIM |
 						ATA_HORKAGE_ZERO_AFTER_TRIM, },
 	{ "Crucial_CT*M500*",		NULL,	ATA_HORKAGE_NO_NCQ_TRIM |

From f85828357b24e9888c340e40a0abd60e7cd9025c Mon Sep 17 00:00:00 2001
From: Joe Jin <joe.jin@oracle.com>
Date: Thu, 17 May 2018 12:33:28 -0700
Subject: [PATCH 0212/1852] xen-swiotlb: fix the check condition for
 xen_swiotlb_free_coherent

commit 4855c92dbb7b3b85c23e88ab7ca04f99b9677b41 upstream.

When run raidconfig from Dom0 we found that the Xen DMA heap is reduced,
but Dom Heap is increased by the same size. Tracing raidconfig we found
that the related ioctl() in megaraid_sas will call dma_alloc_coherent()
to apply memory. If the memory allocated by Dom0 is not in the DMA area,
it will exchange memory with Xen to meet the requiment. Later drivers
call dma_free_coherent() to free the memory, on xen_swiotlb_free_coherent()
the check condition (dev_addr + size - 1 <= dma_mask) is always false,
it prevents calling xen_destroy_contiguous_region() to return the memory
to the Xen DMA heap.

This issue introduced by commit 6810df88dcfc2 "xen-swiotlb: When doing
coherent alloc/dealloc check before swizzling the MFNs.".

Signed-off-by: Joe Jin <joe.jin@oracle.com>
Tested-by: John Sobecki <john.sobecki@oracle.com>
Reviewed-by: Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: stable@vger.kernel.org
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/swiotlb-xen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index f7b19c25c3a47..1889e928a0daa 100644
--- a/drivers/xen/swiotlb-xen.c
+++ b/drivers/xen/swiotlb-xen.c
@@ -359,7 +359,7 @@ xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
 	 * physical address */
 	phys = xen_bus_to_phys(dev_addr);
 
-	if (((dev_addr + size - 1 > dma_mask)) ||
+	if (((dev_addr + size - 1 <= dma_mask)) ||
 	    range_straddles_page_boundary(phys, size))
 		xen_destroy_contiguous_region(phys, order);
 

From e19d0fddebeabc1232e8098d561b1fa0205e2ae6 Mon Sep 17 00:00:00 2001
From: Davidlohr Bueso <dave@stgolabs.net>
Date: Fri, 25 May 2018 14:47:27 -0700
Subject: [PATCH 0213/1852] Revert "ipc/shm: Fix shmat mmap nil-page
 protection"

commit a73ab244f0dad8fffb3291b905f73e2d3eaa7c00 upstream.

Patch series "ipc/shm: shmat() fixes around nil-page".

These patches fix two issues reported[1] a while back by Joe and Andrea
around how shmat(2) behaves with nil-page.

The first reverts a commit that it was incorrectly thought that mapping
nil-page (address=0) was a no no with MAP_FIXED.  This is not the case,
with the exception of SHM_REMAP; which is address in the second patch.

I chose two patches because it is easier to backport and it explicitly
reverts bogus behaviour.  Both patches ought to be in -stable and ltp
testcases need updated (the added testcase around the cve can be
modified to just test for SHM_RND|SHM_REMAP).

[1] lkml.kernel.org/r/20180430172152.nfa564pvgpk3ut7p@linux-n805

This patch (of 2):

Commit 95e91b831f87 ("ipc/shm: Fix shmat mmap nil-page protection")
worked on the idea that we should not be mapping as root addr=0 and
MAP_FIXED.  However, it was reported that this scenario is in fact
valid, thus making the patch both bogus and breaks userspace as well.

For example X11's libint10.so relies on shmat(1, SHM_RND) for lowmem
initialization[1].

[1] https://cgit.freedesktop.org/xorg/xserver/tree/hw/xfree86/os-support/linux/int10/linux.c#n347
Link: http://lkml.kernel.org/r/20180503203243.15045-2-dave@stgolabs.net
Fixes: 95e91b831f87 ("ipc/shm: Fix shmat mmap nil-page protection")
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
Reported-by: Joe Lawrence <joe.lawrence@redhat.com>
Reported-by: Andrea Arcangeli <aarcange@redhat.com>
Cc: Manfred Spraul <manfred@colorfullife.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 ipc/shm.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/ipc/shm.c b/ipc/shm.c
index a492dd81cf56a..4d0df8b8813f5 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -1113,13 +1113,8 @@ long do_shmat(int shmid, char __user *shmaddr, int shmflg,
 		goto out;
 	else if ((addr = (ulong)shmaddr)) {
 		if (addr & (shmlba - 1)) {
-			/*
-			 * Round down to the nearest multiple of shmlba.
-			 * For sane do_mmap_pgoff() parameters, avoid
-			 * round downs that trigger nil-page and MAP_FIXED.
-			 */
-			if ((shmflg & SHM_RND) && addr >= shmlba)
-				addr &= ~(shmlba - 1);
+			if (shmflg & SHM_RND)
+				addr &= ~(shmlba - 1);  /* round down */
 			else
 #ifndef __ARCH_FORCE_SHMLBA
 				if (addr & ~PAGE_MASK)

From 8a92793896e7433682442402ef2d4b344bcd04aa Mon Sep 17 00:00:00 2001
From: Davidlohr Bueso <dave@stgolabs.net>
Date: Fri, 25 May 2018 14:47:30 -0700
Subject: [PATCH 0214/1852] ipc/shm: fix shmat() nil address after round-down
 when remapping

commit 8f89c007b6dec16a1793cb88de88fcc02117bbbc upstream.

shmat()'s SHM_REMAP option forbids passing a nil address for; this is in
fact the very first thing we check for.  Andrea reported that for
SHM_RND|SHM_REMAP cases we can end up bypassing the initial addr check,
but we need to check again if the address was rounded down to nil.  As
of this patch, such cases will return -EINVAL.

Link: http://lkml.kernel.org/r/20180503204934.kk63josdu6u53fbd@linux-n805
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
Reported-by: Andrea Arcangeli <aarcange@redhat.com>
Cc: Joe Lawrence <joe.lawrence@redhat.com>
Cc: Manfred Spraul <manfred@colorfullife.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 ipc/shm.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/ipc/shm.c b/ipc/shm.c
index 4d0df8b8813f5..32974cfe59471 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -1113,9 +1113,17 @@ long do_shmat(int shmid, char __user *shmaddr, int shmflg,
 		goto out;
 	else if ((addr = (ulong)shmaddr)) {
 		if (addr & (shmlba - 1)) {
-			if (shmflg & SHM_RND)
+			if (shmflg & SHM_RND) {
 				addr &= ~(shmlba - 1);  /* round down */
-			else
+
+				/*
+				 * Ensure that the round-down is non-nil
+				 * when remapping. This can happen for
+				 * cases when addr < shmlba.
+				 */
+				if (!addr && (shmflg & SHM_REMAP))
+					goto out;
+			} else
 #ifndef __ARCH_FORCE_SHMLBA
 				if (addr & ~PAGE_MASK)
 #endif

From 842feee8d9dd589486930766ebb485e2fd4254f5 Mon Sep 17 00:00:00 2001
From: David Hildenbrand <david@redhat.com>
Date: Fri, 25 May 2018 14:48:11 -0700
Subject: [PATCH 0215/1852] kasan: fix memory hotplug during boot

commit 3f1959721558a976aaf9c2024d5bc884e6411bf7 upstream.

Using module_init() is wrong.  E.g.  ACPI adds and onlines memory before
our memory notifier gets registered.

This makes sure that ACPI memory detected during boot up will not result
in a kernel crash.

Easily reproducible with QEMU, just specify a DIMM when starting up.

Link: http://lkml.kernel.org/r/20180522100756.18478-3-david@redhat.com
Fixes: 786a8959912e ("kasan: disable memory hotplug")
Signed-off-by: David Hildenbrand <david@redhat.com>
Acked-by: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/kasan/kasan.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
index cfdbe1ce9ef8f..eeaaac0fb24a1 100644
--- a/mm/kasan/kasan.c
+++ b/mm/kasan/kasan.c
@@ -818,5 +818,5 @@ static int __init kasan_memhotplug_init(void)
 	return 0;
 }
 
-module_init(kasan_memhotplug_init);
+core_initcall(kasan_memhotplug_init);
 #endif

From 3eaafabd84ab4a0f9521dd5738c5094fdb094868 Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Fri, 25 May 2018 14:47:57 -0700
Subject: [PATCH 0216/1852] kernel/sys.c: fix potential Spectre v1 issue

commit 23d6aef74da86a33fa6bb75f79565e0a16ee97c2 upstream.

`resource' can be controlled by user-space, hence leading to a potential
exploitation of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

  kernel/sys.c:1474 __do_compat_sys_old_getrlimit() warn: potential spectre issue 'get_current()->signal->rlim' (local cap)
  kernel/sys.c:1455 __do_sys_old_getrlimit() warn: potential spectre issue 'get_current()->signal->rlim' (local cap)

Fix this by sanitizing *resource* before using it to index
current->signal->rlim

Notice that given that speculation windows are large, the policy is to
kill the speculation on the first load and not worry if it can be
completed with a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2

Link: http://lkml.kernel.org/r/20180515030038.GA11822@embeddedor.com
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/sys.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/kernel/sys.c b/kernel/sys.c
index ba3ddb43dd9fe..cf40663a54c2b 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -55,6 +55,8 @@
 #include <linux/uidgid.h>
 #include <linux/cred.h>
 
+#include <linux/nospec.h>
+
 #include <linux/kmsg_dump.h>
 /* Move somewhere else to avoid recompiling? */
 #include <generated/utsrelease.h>
@@ -1313,6 +1315,7 @@ SYSCALL_DEFINE2(old_getrlimit, unsigned int, resource,
 	if (resource >= RLIM_NLIMITS)
 		return -EINVAL;
 
+	resource = array_index_nospec(resource, RLIM_NLIMITS);
 	task_lock(current->group_leader);
 	x = current->signal->rlim[resource];
 	task_unlock(current->group_leader);

From 3c0f72b86ae267f9557b638ecd44a9ea36206c27 Mon Sep 17 00:00:00 2001
From: zhongjiang <zhongjiang@huawei.com>
Date: Mon, 10 Jul 2017 15:52:57 -0700
Subject: [PATCH 0217/1852] kernel/signal.c: avoid undefined behaviour in
 kill_something_info

commit 4ea77014af0d6205b05503d1c7aac6eace11d473 upstream.

When running kill(72057458746458112, 0) in userspace I hit the following
issue.

  UBSAN: Undefined behaviour in kernel/signal.c:1462:11
  negation of -2147483648 cannot be represented in type 'int':
  CPU: 226 PID: 9849 Comm: test Tainted: G    B          ---- -------   3.10.0-327.53.58.70.x86_64_ubsan+ #116
  Hardware name: Huawei Technologies Co., Ltd. RH8100 V3/BC61PBIA, BIOS BLHSV028 11/11/2014
  Call Trace:
    dump_stack+0x19/0x1b
    ubsan_epilogue+0xd/0x50
    __ubsan_handle_negate_overflow+0x109/0x14e
    SYSC_kill+0x43e/0x4d0
    SyS_kill+0xe/0x10
    system_call_fastpath+0x16/0x1b

Add code to avoid the UBSAN detection.

[akpm@linux-foundation.org: tweak comment]
Link: http://lkml.kernel.org/r/1496670008-59084-1-git-send-email-zhongjiang@huawei.com
Signed-off-by: zhongjiang <zhongjiang@huawei.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Xishi Qiu <qiuxishi@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/signal.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/kernel/signal.c b/kernel/signal.c
index 13783d19438b2..86a5544dea913 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -1392,6 +1392,10 @@ static int kill_something_info(int sig, struct siginfo *info, pid_t pid)
 		return ret;
 	}
 
+	/* -INT_MIN is undefined.  Exclude this case to avoid a UBSAN warning */
+	if (pid == INT_MIN)
+		return -ESRCH;
+
 	read_lock(&tasklist_lock);
 	if (pid != -1) {
 		ret = __kill_pgrp_info(sig, info,

From 1ed742216af2193465847025eac9836e29d732f9 Mon Sep 17 00:00:00 2001
From: Brian Foster <bfoster@redhat.com>
Date: Wed, 25 Jan 2017 07:53:43 -0800
Subject: [PATCH 0218/1852] xfs: remove racy hasattr check from attr ops

commit 5a93790d4e2df73e30c965ec6e49be82fc3ccfce upstream.

xfs_attr_[get|remove]() have unlocked attribute fork checks to optimize
away a lock cycle in cases where the fork does not exist or is otherwise
empty. This check is not safe, however, because an attribute fork short
form to extent format conversion includes a transient state that causes
the xfs_inode_hasattr() check to fail. Specifically,
xfs_attr_shortform_to_leaf() creates an empty extent format attribute
fork and then adds the existing shortform attributes to it.

This means that lookup of an existing xattr can spuriously return
-ENOATTR when racing against a setxattr that causes the associated
format conversion. This was originally reproduced by an untar on a
particularly configured glusterfs volume, but can also be reproduced on
demand with properly crafted xattr requests.

The format conversion occurs under the exclusive ilock. xfs_attr_get()
and xfs_attr_remove() already have the proper locking and checks further
down in the functions to handle this situation correctly. Drop the
unlocked checks to avoid the spurious failure and rely on the existing
logic.

Signed-off-by: Brian Foster <bfoster@redhat.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
Cc: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/xfs/libxfs/xfs_attr.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/fs/xfs/libxfs/xfs_attr.c b/fs/xfs/libxfs/xfs_attr.c
index f949818fa1c76..fb9636cc927cf 100644
--- a/fs/xfs/libxfs/xfs_attr.c
+++ b/fs/xfs/libxfs/xfs_attr.c
@@ -130,9 +130,6 @@ xfs_attr_get(
 	if (XFS_FORCED_SHUTDOWN(ip->i_mount))
 		return -EIO;
 
-	if (!xfs_inode_hasattr(ip))
-		return -ENOATTR;
-
 	error = xfs_attr_args_init(&args, ip, name, flags);
 	if (error)
 		return error;
@@ -417,9 +414,6 @@ xfs_attr_remove(
 	if (XFS_FORCED_SHUTDOWN(dp->i_mount))
 		return -EIO;
 
-	if (!xfs_inode_hasattr(dp))
-		return -ENOATTR;
-
 	error = xfs_attr_args_init(&args, dp, name, flags);
 	if (error)
 		return error;

From 3d00bc69855c019fe8c34345d52d3280bfd50965 Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Fri, 4 May 2018 08:23:01 -0400
Subject: [PATCH 0219/1852] do d_instantiate/unlock_new_inode combinations
 safely

commit 1e2e547a93a00ebc21582c06ca3c6cfea2a309ee upstream.

For anything NFS-exported we do _not_ want to unlock new inode
before it has grown an alias; original set of fixes got the
ordering right, but missed the nasty complication in case of
lockdep being enabled - unlock_new_inode() does
	lockdep_annotate_inode_mutex_key(inode)
which can only be done before anyone gets a chance to touch
->i_mutex.  Unfortunately, flipping the order and doing
unlock_new_inode() before d_instantiate() opens a window when
mkdir can race with open-by-fhandle on a guessed fhandle, leading
to multiple aliases for a directory inode and all the breakage
that follows from that.

	Correct solution: a new primitive (d_instantiate_new())
combining these two in the right order - lockdep annotate, then
d_instantiate(), then the rest of unlock_new_inode().  All
combinations of d_instantiate() with unlock_new_inode() should
be converted to that.

Cc: stable@kernel.org	# 2.6.29 and later
Tested-by: Mike Marshall <hubcap@omnibond.com>
Reviewed-by: Andreas Dilger <adilger@dilger.ca>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/inode.c       | 16 ++++------------
 fs/dcache.c            | 22 ++++++++++++++++++++++
 fs/ecryptfs/inode.c    |  3 +--
 fs/ext2/namei.c        |  6 ++----
 fs/ext4/namei.c        |  6 ++----
 fs/f2fs/namei.c        | 12 ++++--------
 fs/jffs2/dir.c         | 12 ++++--------
 fs/jfs/namei.c         | 12 ++++--------
 fs/nilfs2/namei.c      |  6 ++----
 fs/reiserfs/namei.c    | 12 ++++--------
 fs/udf/namei.c         |  6 ++----
 fs/ufs/namei.c         |  6 ++----
 include/linux/dcache.h |  1 +
 13 files changed, 54 insertions(+), 66 deletions(-)

diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 81b5a461d94e2..1f01a8172308a 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -6413,8 +6413,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry,
 		goto out_unlock_inode;
 	} else {
 		btrfs_update_inode(trans, root, inode);
-		unlock_new_inode(inode);
-		d_instantiate(dentry, inode);
+		d_instantiate_new(dentry, inode);
 	}
 
 out_unlock:
@@ -6489,8 +6488,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry,
 		goto out_unlock_inode;
 
 	BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops;
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 out_unlock:
 	btrfs_end_transaction(trans, root);
@@ -6633,12 +6631,7 @@ static int btrfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
 	if (err)
 		goto out_fail_inode;
 
-	d_instantiate(dentry, inode);
-	/*
-	 * mkdir is special.  We're unlocking after we call d_instantiate
-	 * to avoid a race with nfsd calling d_instantiate.
-	 */
-	unlock_new_inode(inode);
+	d_instantiate_new(dentry, inode);
 	drop_on_err = 0;
 
 out_fail:
@@ -9789,8 +9782,7 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry,
 		goto out_unlock_inode;
 	}
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 out_unlock:
 	btrfs_end_transaction(trans, root);
diff --git a/fs/dcache.c b/fs/dcache.c
index 4d43df7721fef..a69e9b42814a3 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -1897,6 +1897,28 @@ struct dentry *d_instantiate_unique(struct dentry *entry, struct inode *inode)
 
 EXPORT_SYMBOL(d_instantiate_unique);
 
+/*
+ * This should be equivalent to d_instantiate() + unlock_new_inode(),
+ * with lockdep-related part of unlock_new_inode() done before
+ * anything else.  Use that instead of open-coding d_instantiate()/
+ * unlock_new_inode() combinations.
+ */
+void d_instantiate_new(struct dentry *entry, struct inode *inode)
+{
+	BUG_ON(!hlist_unhashed(&entry->d_u.d_alias));
+	BUG_ON(!inode);
+	lockdep_annotate_inode_mutex_key(inode);
+	security_d_instantiate(entry, inode);
+	spin_lock(&inode->i_lock);
+	__d_instantiate(entry, inode);
+	WARN_ON(!(inode->i_state & I_NEW));
+	inode->i_state &= ~I_NEW;
+	smp_mb();
+	wake_up_bit(&inode->i_state, __I_NEW);
+	spin_unlock(&inode->i_lock);
+}
+EXPORT_SYMBOL(d_instantiate_new);
+
 /**
  * d_instantiate_no_diralias - instantiate a non-aliased dentry
  * @entry: dentry to complete
diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c
index e2e47ba5d313a..844d0c4da84fa 100644
--- a/fs/ecryptfs/inode.c
+++ b/fs/ecryptfs/inode.c
@@ -287,8 +287,7 @@ ecryptfs_create(struct inode *directory_inode, struct dentry *ecryptfs_dentry,
 		iput(ecryptfs_inode);
 		goto out;
 	}
-	unlock_new_inode(ecryptfs_inode);
-	d_instantiate(ecryptfs_dentry, ecryptfs_inode);
+	d_instantiate_new(ecryptfs_dentry, ecryptfs_inode);
 out:
 	return rc;
 }
diff --git a/fs/ext2/namei.c b/fs/ext2/namei.c
index 3267a80dbbe26..da3d40ef16685 100644
--- a/fs/ext2/namei.c
+++ b/fs/ext2/namei.c
@@ -40,8 +40,7 @@ static inline int ext2_add_nondir(struct dentry *dentry, struct inode *inode)
 {
 	int err = ext2_add_link(dentry, inode);
 	if (!err) {
-		unlock_new_inode(inode);
-		d_instantiate(dentry, inode);
+		d_instantiate_new(dentry, inode);
 		return 0;
 	}
 	inode_dec_link_count(inode);
@@ -267,8 +266,7 @@ static int ext2_mkdir(struct inode * dir, struct dentry * dentry, umode_t mode)
 	if (err)
 		goto out_fail;
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 out:
 	return err;
 
diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c
index 32960b3ecd4fb..97472088d65a7 100644
--- a/fs/ext4/namei.c
+++ b/fs/ext4/namei.c
@@ -2429,8 +2429,7 @@ static int ext4_add_nondir(handle_t *handle,
 	int err = ext4_add_entry(handle, dentry, inode);
 	if (!err) {
 		ext4_mark_inode_dirty(handle, inode);
-		unlock_new_inode(inode);
-		d_instantiate(dentry, inode);
+		d_instantiate_new(dentry, inode);
 		return 0;
 	}
 	drop_nlink(inode);
@@ -2669,8 +2668,7 @@ static int ext4_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
 	err = ext4_mark_inode_dirty(handle, dir);
 	if (err)
 		goto out_clear_inode;
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	if (IS_DIRSYNC(dir))
 		ext4_handle_sync(handle);
 
diff --git a/fs/f2fs/namei.c b/fs/f2fs/namei.c
index fecae8685d2a7..0355891dbbf8b 100644
--- a/fs/f2fs/namei.c
+++ b/fs/f2fs/namei.c
@@ -294,8 +294,7 @@ static int f2fs_create(struct inode *dir, struct dentry *dentry, umode_t mode,
 
 	alloc_nid_done(sbi, ino);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 	if (IS_DIRSYNC(dir))
 		f2fs_sync_fs(sbi->sb, 1);
@@ -594,8 +593,7 @@ static int f2fs_symlink(struct inode *dir, struct dentry *dentry,
 	err = page_symlink(inode, disk_link.name, disk_link.len);
 
 err_out:
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 	/*
 	 * Let's flush symlink data in order to avoid broken symlink as much as
@@ -658,8 +656,7 @@ static int f2fs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
 
 	alloc_nid_done(sbi, inode->i_ino);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 	if (IS_DIRSYNC(dir))
 		f2fs_sync_fs(sbi->sb, 1);
@@ -710,8 +707,7 @@ static int f2fs_mknod(struct inode *dir, struct dentry *dentry,
 
 	alloc_nid_done(sbi, inode->i_ino);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 	if (IS_DIRSYNC(dir))
 		f2fs_sync_fs(sbi->sb, 1);
diff --git a/fs/jffs2/dir.c b/fs/jffs2/dir.c
index 30c4c9ebb693f..e273171696972 100644
--- a/fs/jffs2/dir.c
+++ b/fs/jffs2/dir.c
@@ -207,8 +207,7 @@ static int jffs2_create(struct inode *dir_i, struct dentry *dentry,
 		  __func__, inode->i_ino, inode->i_mode, inode->i_nlink,
 		  f->inocache->pino_nlink, inode->i_mapping->nrpages);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	return 0;
 
  fail:
@@ -428,8 +427,7 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char
 	mutex_unlock(&dir_f->sem);
 	jffs2_complete_reservation(c);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	return 0;
 
  fail:
@@ -573,8 +571,7 @@ static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, umode_t mode
 	mutex_unlock(&dir_f->sem);
 	jffs2_complete_reservation(c);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	return 0;
 
  fail:
@@ -745,8 +742,7 @@ static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, umode_t mode
 	mutex_unlock(&dir_f->sem);
 	jffs2_complete_reservation(c);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	return 0;
 
  fail:
diff --git a/fs/jfs/namei.c b/fs/jfs/namei.c
index 9d7551f5c32a9..f217ae750adbe 100644
--- a/fs/jfs/namei.c
+++ b/fs/jfs/namei.c
@@ -178,8 +178,7 @@ static int jfs_create(struct inode *dip, struct dentry *dentry, umode_t mode,
 		unlock_new_inode(ip);
 		iput(ip);
 	} else {
-		unlock_new_inode(ip);
-		d_instantiate(dentry, ip);
+		d_instantiate_new(dentry, ip);
 	}
 
       out2:
@@ -313,8 +312,7 @@ static int jfs_mkdir(struct inode *dip, struct dentry *dentry, umode_t mode)
 		unlock_new_inode(ip);
 		iput(ip);
 	} else {
-		unlock_new_inode(ip);
-		d_instantiate(dentry, ip);
+		d_instantiate_new(dentry, ip);
 	}
 
       out2:
@@ -1058,8 +1056,7 @@ static int jfs_symlink(struct inode *dip, struct dentry *dentry,
 		unlock_new_inode(ip);
 		iput(ip);
 	} else {
-		unlock_new_inode(ip);
-		d_instantiate(dentry, ip);
+		d_instantiate_new(dentry, ip);
 	}
 
       out2:
@@ -1443,8 +1440,7 @@ static int jfs_mknod(struct inode *dir, struct dentry *dentry,
 		unlock_new_inode(ip);
 		iput(ip);
 	} else {
-		unlock_new_inode(ip);
-		d_instantiate(dentry, ip);
+		d_instantiate_new(dentry, ip);
 	}
 
       out1:
diff --git a/fs/nilfs2/namei.c b/fs/nilfs2/namei.c
index c9a1a491aa912..cd7f5b0abe842 100644
--- a/fs/nilfs2/namei.c
+++ b/fs/nilfs2/namei.c
@@ -50,8 +50,7 @@ static inline int nilfs_add_nondir(struct dentry *dentry, struct inode *inode)
 {
 	int err = nilfs_add_link(dentry, inode);
 	if (!err) {
-		d_instantiate(dentry, inode);
-		unlock_new_inode(inode);
+		d_instantiate_new(dentry, inode);
 		return 0;
 	}
 	inode_dec_link_count(inode);
@@ -246,8 +245,7 @@ static int nilfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
 		goto out_fail;
 
 	nilfs_mark_inode_dirty(inode);
-	d_instantiate(dentry, inode);
-	unlock_new_inode(inode);
+	d_instantiate_new(dentry, inode);
 out:
 	if (!err)
 		err = nilfs_transaction_commit(dir->i_sb);
diff --git a/fs/reiserfs/namei.c b/fs/reiserfs/namei.c
index 3ebc70167e416..eb611bdd47254 100644
--- a/fs/reiserfs/namei.c
+++ b/fs/reiserfs/namei.c
@@ -687,8 +687,7 @@ static int reiserfs_create(struct inode *dir, struct dentry *dentry, umode_t mod
 	reiserfs_update_inode_transaction(inode);
 	reiserfs_update_inode_transaction(dir);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	retval = journal_end(&th);
 
 out_failed:
@@ -771,8 +770,7 @@ static int reiserfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode
 		goto out_failed;
 	}
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	retval = journal_end(&th);
 
 out_failed:
@@ -871,8 +869,7 @@ static int reiserfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode
 	/* the above add_entry did not update dir's stat data */
 	reiserfs_update_sd(&th, dir);
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	retval = journal_end(&th);
 out_failed:
 	reiserfs_write_unlock(dir->i_sb);
@@ -1186,8 +1183,7 @@ static int reiserfs_symlink(struct inode *parent_dir,
 		goto out_failed;
 	}
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	retval = journal_end(&th);
 out_failed:
 	reiserfs_write_unlock(parent_dir->i_sb);
diff --git a/fs/udf/namei.c b/fs/udf/namei.c
index c97b5a8d1e24c..f34c545f4e549 100644
--- a/fs/udf/namei.c
+++ b/fs/udf/namei.c
@@ -611,8 +611,7 @@ static int udf_add_nondir(struct dentry *dentry, struct inode *inode)
 	if (fibh.sbh != fibh.ebh)
 		brelse(fibh.ebh);
 	brelse(fibh.sbh);
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 
 	return 0;
 }
@@ -722,8 +721,7 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode)
 	inc_nlink(dir);
 	dir->i_ctime = dir->i_mtime = current_fs_time(dir->i_sb);
 	mark_inode_dirty(dir);
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	if (fibh.sbh != fibh.ebh)
 		brelse(fibh.ebh);
 	brelse(fibh.sbh);
diff --git a/fs/ufs/namei.c b/fs/ufs/namei.c
index 47966554317c9..2ec7689c25cf6 100644
--- a/fs/ufs/namei.c
+++ b/fs/ufs/namei.c
@@ -38,8 +38,7 @@ static inline int ufs_add_nondir(struct dentry *dentry, struct inode *inode)
 {
 	int err = ufs_add_link(dentry, inode);
 	if (!err) {
-		unlock_new_inode(inode);
-		d_instantiate(dentry, inode);
+		d_instantiate_new(dentry, inode);
 		return 0;
 	}
 	inode_dec_link_count(inode);
@@ -191,8 +190,7 @@ static int ufs_mkdir(struct inode * dir, struct dentry * dentry, umode_t mode)
 	if (err)
 		goto out_fail;
 
-	unlock_new_inode(inode);
-	d_instantiate(dentry, inode);
+	d_instantiate_new(dentry, inode);
 	return 0;
 
 out_fail:
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 51b47269e2feb..0aa9a374cc46c 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -238,6 +238,7 @@ extern seqlock_t rename_lock;
  * These are the low-level FS interfaces to the dcache..
  */
 extern void d_instantiate(struct dentry *, struct inode *);
+extern void d_instantiate_new(struct dentry *, struct inode *);
 extern struct dentry * d_instantiate_unique(struct dentry *, struct inode *);
 extern int d_instantiate_no_diralias(struct dentry *, struct inode *);
 extern void __d_drop(struct dentry *dentry);

From 47ccee4a33164ba06ecb33df89a200d8a465278e Mon Sep 17 00:00:00 2001
From: Hector Martin <marcan@marcan.st>
Date: Fri, 3 Nov 2017 20:28:57 +0900
Subject: [PATCH 0220/1852] firewire-ohci: work around oversized DMA reads on
 JMicron controllers

[ Upstream commit 188775181bc05f29372b305ef96485840e351fde ]

At least some JMicron controllers issue buggy oversized DMA reads when
fetching context descriptors, always fetching 0x20 bytes at once for
descriptors which are only 0x10 bytes long. This is often harmless, but
can cause page faults on modern systems with IOMMUs:

DMAR: [DMA Read] Request device [05:00.0] fault addr fff56000 [fault reason 06] PTE Read access is not set
firewire_ohci 0000:05:00.0: DMA context IT0 has stopped, error code: evt_descriptor_read

This works around the problem by always leaving 0x10 padding bytes at
the end of descriptor buffer pages, which should be harmless to do
unconditionally for controllers in case others have the same behavior.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/firewire/ohci.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index c2f5117fd8cb0..5545a7f3a98f3 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1130,7 +1130,13 @@ static int context_add_buffer(struct context *ctx)
 		return -ENOMEM;
 
 	offset = (void *)&desc->buffer - (void *)desc;
-	desc->buffer_size = PAGE_SIZE - offset;
+	/*
+	 * Some controllers, like JMicron ones, always issue 0x20-byte DMA reads
+	 * for descriptors, even 0x10-byte ones. This can cause page faults when
+	 * an IOMMU is in use and the oversized read crosses a page boundary.
+	 * Work around this by always leaving at least 0x10 bytes of padding.
+	 */
+	desc->buffer_size = PAGE_SIZE - offset - 0x10;
 	desc->buffer_bus = bus_addr + offset;
 	desc->used = 0;
 

From 1f67b9627c2eac37b16e47bdd558ad660c93f4bb Mon Sep 17 00:00:00 2001
From: NeilBrown <neilb@suse.com>
Date: Wed, 13 Dec 2017 09:57:09 +1100
Subject: [PATCH 0221/1852] NFSv4: always set NFS_LOCK_LOST when a lock is
 lost.

[ Upstream commit dce2630c7da73b0634686bca557cc8945cc450c8 ]

There are 2 comments in the NFSv4 code which suggest that
SIGLOST should possibly be sent to a process.  In these
cases a lock has been lost.
The current practice is to set NFS_LOCK_LOST so that
read/write returns EIO when a lock is lost.
So change these comments to code when sets NFS_LOCK_LOST.

One case is when lock recovery after apparent server restart
fails with NFS4ERR_DENIED, NFS4ERR_RECLAIM_BAD, or
NFS4ERRO_RECLAIM_CONFLICT.  The other case is when a lock
attempt as part of lease recovery fails with NFS4ERR_DENIED.

In an ideal world, these should not happen.  However I have
a packet trace showing an NFSv4.1 session getting
NFS4ERR_BADSESSION after an extended network parition.  The
NFSv4.1 client treats this like server reboot until/unless
it get NFS4ERR_NO_GRACE, in which case it switches over to
"nograce" recovery mode.  In this network trace, the client
attempts to recover a lock and the server (incorrectly)
reports NFS4ERR_DENIED rather than NFS4ERR_NO_GRACE.  This
leads to the ineffective comment and the client then
continues to write using the OPEN stateid.

Signed-off-by: NeilBrown <neilb@suse.com>
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/nfs/nfs4proc.c  | 12 ++++++++----
 fs/nfs/nfs4state.c |  5 ++++-
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 0f397e62de5a9..41c8ddbc80dc4 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -1780,7 +1780,7 @@ static int nfs4_open_reclaim(struct nfs4_state_owner *sp, struct nfs4_state *sta
 	return ret;
 }
 
-static int nfs4_handle_delegation_recall_error(struct nfs_server *server, struct nfs4_state *state, const nfs4_stateid *stateid, int err)
+static int nfs4_handle_delegation_recall_error(struct nfs_server *server, struct nfs4_state *state, const nfs4_stateid *stateid, struct file_lock *fl, int err)
 {
 	switch (err) {
 		default:
@@ -1827,7 +1827,11 @@ static int nfs4_handle_delegation_recall_error(struct nfs_server *server, struct
 			return -EAGAIN;
 		case -ENOMEM:
 		case -NFS4ERR_DENIED:
-			/* kill_proc(fl->fl_pid, SIGLOST, 1); */
+			if (fl) {
+				struct nfs4_lock_state *lsp = fl->fl_u.nfs4_fl.owner;
+				if (lsp)
+					set_bit(NFS_LOCK_LOST, &lsp->ls_flags);
+			}
 			return 0;
 	}
 	return err;
@@ -1863,7 +1867,7 @@ int nfs4_open_delegation_recall(struct nfs_open_context *ctx,
 		err = nfs4_open_recover_helper(opendata, FMODE_READ);
 	}
 	nfs4_opendata_put(opendata);
-	return nfs4_handle_delegation_recall_error(server, state, stateid, err);
+	return nfs4_handle_delegation_recall_error(server, state, stateid, NULL, err);
 }
 
 static void nfs4_open_confirm_prepare(struct rpc_task *task, void *calldata)
@@ -6157,7 +6161,7 @@ int nfs4_lock_delegation_recall(struct file_lock *fl, struct nfs4_state *state,
 	if (err != 0)
 		return err;
 	err = _nfs4_do_setlk(state, F_SETLK, fl, NFS_LOCK_NEW);
-	return nfs4_handle_delegation_recall_error(server, state, stateid, err);
+	return nfs4_handle_delegation_recall_error(server, state, stateid, fl, err);
 }
 
 struct nfs_release_lockowner_data {
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index 83fba40396ae2..44f5cea496994 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -1386,6 +1386,7 @@ static int nfs4_reclaim_locks(struct nfs4_state *state, const struct nfs4_state_
 	struct inode *inode = state->inode;
 	struct nfs_inode *nfsi = NFS_I(inode);
 	struct file_lock *fl;
+	struct nfs4_lock_state *lsp;
 	int status = 0;
 	struct file_lock_context *flctx = inode->i_flctx;
 	struct list_head *list;
@@ -1426,7 +1427,9 @@ static int nfs4_reclaim_locks(struct nfs4_state *state, const struct nfs4_state_
 		case -NFS4ERR_DENIED:
 		case -NFS4ERR_RECLAIM_BAD:
 		case -NFS4ERR_RECLAIM_CONFLICT:
-			/* kill_proc(fl->fl_pid, SIGLOST, 1); */
+			lsp = fl->fl_u.nfs4_fl.owner;
+			if (lsp)
+				set_bit(NFS_LOCK_LOST, &lsp->ls_flags);
 			status = 0;
 		}
 		spin_lock(&flctx->flc_lock);

From 71ae3bd3311ec36b572680bc3e27eb02fb8f0711 Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Mon, 15 Jan 2018 10:44:35 +0100
Subject: [PATCH 0222/1852] ALSA: hda - Use IS_REACHABLE() for dependency on
 input

[ Upstream commit c469652bb5e8fb715db7d152f46d33b3740c9b87 ]

The commit ffcd28d88e4f ("ALSA: hda - Select INPUT for Realtek
HD-audio codec") introduced the reverse-selection of CONFIG_INPUT for
Realtek codec in order to avoid the mess with dependency between
built-in and modules.  Later on, we obtained IS_REACHABLE() macro
exactly for this kind of problems, and now we can remove th INPUT
selection in Kconfig and put IS_REACHABLE(INPUT) to the appropriate
places in the code, so that the driver doesn't need to select other
subsystem forcibly.

Fixes: ffcd28d88e4f ("ALSA: hda - Select INPUT for Realtek HD-audio codec")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # and build-tested
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/Kconfig         | 1 -
 sound/pci/hda/patch_realtek.c | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/sound/pci/hda/Kconfig b/sound/pci/hda/Kconfig
index e94cfd5c69f7e..ebec1a1ae5438 100644
--- a/sound/pci/hda/Kconfig
+++ b/sound/pci/hda/Kconfig
@@ -84,7 +84,6 @@ config SND_HDA_PATCH_LOADER
 config SND_HDA_CODEC_REALTEK
 	tristate "Build Realtek HD-audio codec support"
 	select SND_HDA_GENERIC
-	select INPUT
 	help
 	  Say Y or M here to include Realtek HD-audio codec support in
 	  snd-hda-intel driver, such as ALC880.
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 6a789278970e9..580b8943b965c 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -3495,6 +3495,7 @@ static void alc280_fixup_hp_gpio4(struct hda_codec *codec,
 	}
 }
 
+#if IS_REACHABLE(INPUT)
 static void gpio2_mic_hotkey_event(struct hda_codec *codec,
 				   struct hda_jack_callback *event)
 {
@@ -3627,6 +3628,10 @@ static void alc233_fixup_lenovo_line2_mic_hotkey(struct hda_codec *codec,
 		spec->kb_dev = NULL;
 	}
 }
+#else /* INPUT */
+#define alc280_fixup_hp_gpio2_mic_hotkey	NULL
+#define alc233_fixup_lenovo_line2_mic_hotkey	NULL
+#endif /* INPUT */
 
 static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec,
 				const struct hda_fixup *fix, int action)

From 858c1d67216dc77156f87120f3d2a39ac4c49843 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Mon, 15 Jan 2018 11:08:38 +0300
Subject: [PATCH 0223/1852] ASoC: au1x: Fix timeout tests in
 au1xac97c_ac97_read()

[ Upstream commit 123af9043e93cb6f235207d260d50f832cdb5439 ]

The loop timeout doesn't work because it's a post op and ends with "tmo"
set to -1.  I changed it from a post-op to a pre-op and I changed the
initial the starting value from 5 to 6 so we still iterate 5 times.  I
left the other as it was because it's a large number.

Fixes: b3c70c9ea62a ("ASoC: Alchemy AC97C/I2SC audio support")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/au1x/ac97c.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/au1x/ac97c.c b/sound/soc/au1x/ac97c.c
index 29a97d52e8adb..66d6c52e7761c 100644
--- a/sound/soc/au1x/ac97c.c
+++ b/sound/soc/au1x/ac97c.c
@@ -91,8 +91,8 @@ static unsigned short au1xac97c_ac97_read(struct snd_ac97 *ac97,
 	do {
 		mutex_lock(&ctx->lock);
 
-		tmo = 5;
-		while ((RD(ctx, AC97_STATUS) & STAT_CP) && tmo--)
+		tmo = 6;
+		while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo)
 			udelay(21);	/* wait an ac97 frame time */
 		if (!tmo) {
 			pr_debug("ac97rd timeout #1\n");
@@ -105,7 +105,7 @@ static unsigned short au1xac97c_ac97_read(struct snd_ac97 *ac97,
 		 * poll, Forrest, poll...
 		 */
 		tmo = 0x10000;
-		while ((RD(ctx, AC97_STATUS) & STAT_CP) && tmo--)
+		while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo)
 			asm volatile ("nop");
 		data = RD(ctx, AC97_CMDRESP);
 

From b0df686343bb92022a82f504af724752b3052947 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Thu, 26 Oct 2017 15:45:47 +0200
Subject: [PATCH 0224/1852] kvm: x86: fix KVM_XEN_HVM_CONFIG ioctl
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 51776043afa415435c7e4636204fbe4f7edc4501 ]

This ioctl is obsolete (it was used by Xenner as far as I know) but
still let's not break it gratuitously...  Its handler is copying
directly into struct kvm.  Go through a bounce buffer instead, with
the added benefit that we can actually do something useful with the
flags argument---the previous code was exiting with -EINVAL but still
doing the copy.

This technically is a userspace ABI breakage, but since no one should be
using the ioctl, it's a good occasion to see if someone actually
complains.

Cc: kernel-hardening@lists.openwall.com
Cc: Kees Cook <keescook@chromium.org>
Cc: Radim Kr�mář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/x86.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f37f0c72b22a9..9cea09597d66c 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3973,13 +3973,14 @@ long kvm_arch_vm_ioctl(struct file *filp,
 		mutex_unlock(&kvm->lock);
 		break;
 	case KVM_XEN_HVM_CONFIG: {
+		struct kvm_xen_hvm_config xhc;
 		r = -EFAULT;
-		if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
-				   sizeof(struct kvm_xen_hvm_config)))
+		if (copy_from_user(&xhc, argp, sizeof(xhc)))
 			goto out;
 		r = -EINVAL;
-		if (kvm->arch.xen_hvm_config.flags)
+		if (xhc.flags)
 			goto out;
+		memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
 		r = 0;
 		break;
 	}

From 10194acb06515e47ba56851f1f9d0826a3e7dd8c Mon Sep 17 00:00:00 2001
From: Anna-Maria Gleixner <anna-maria@linutronix.de>
Date: Thu, 21 Dec 2017 11:41:37 +0100
Subject: [PATCH 0225/1852] tracing/hrtimer: Fix tracing bugs by taking all
 clock bases and modes into account

[ Upstream commit 91633eed73a3ac37aaece5c8c1f93a18bae616a9 ]

So far only CLOCK_MONOTONIC and CLOCK_REALTIME were taken into account as
well as HRTIMER_MODE_ABS/REL in the hrtimer_init tracepoint. The query for
detecting the ABS or REL timer modes is not valid anymore, it got broken
by the introduction of HRTIMER_MODE_PINNED.

HRTIMER_MODE_PINNED is not evaluated in the hrtimer_init() call, but for the
sake of completeness print all given modes.

Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de>
Cc: Christoph Hellwig <hch@lst.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: keescook@chromium.org
Link: http://lkml.kernel.org/r/20171221104205.7269-9-anna-maria@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/trace/events/timer.h | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/include/trace/events/timer.h b/include/trace/events/timer.h
index 073b9ac245ba0..e844556794dca 100644
--- a/include/trace/events/timer.h
+++ b/include/trace/events/timer.h
@@ -125,6 +125,20 @@ DEFINE_EVENT(timer_class, timer_cancel,
 	TP_ARGS(timer)
 );
 
+#define decode_clockid(type)						\
+	__print_symbolic(type,						\
+		{ CLOCK_REALTIME,	"CLOCK_REALTIME"	},	\
+		{ CLOCK_MONOTONIC,	"CLOCK_MONOTONIC"	},	\
+		{ CLOCK_BOOTTIME,	"CLOCK_BOOTTIME"	},	\
+		{ CLOCK_TAI,		"CLOCK_TAI"		})
+
+#define decode_hrtimer_mode(mode)					\
+	__print_symbolic(mode,						\
+		{ HRTIMER_MODE_ABS,		"ABS"		},	\
+		{ HRTIMER_MODE_REL,		"REL"		},	\
+		{ HRTIMER_MODE_ABS_PINNED,	"ABS|PINNED"	},	\
+		{ HRTIMER_MODE_REL_PINNED,	"REL|PINNED"	})
+
 /**
  * hrtimer_init - called when the hrtimer is initialized
  * @hrtimer:	pointer to struct hrtimer
@@ -151,10 +165,8 @@ TRACE_EVENT(hrtimer_init,
 	),
 
 	TP_printk("hrtimer=%p clockid=%s mode=%s", __entry->hrtimer,
-		  __entry->clockid == CLOCK_REALTIME ?
-			"CLOCK_REALTIME" : "CLOCK_MONOTONIC",
-		  __entry->mode == HRTIMER_MODE_ABS ?
-			"HRTIMER_MODE_ABS" : "HRTIMER_MODE_REL")
+		  decode_clockid(__entry->clockid),
+		  decode_hrtimer_mode(__entry->mode))
 );
 
 /**

From 459deb51ce802ef996c8623d46ecd1d54a8b7a62 Mon Sep 17 00:00:00 2001
From: Alex Williamson <alex.williamson@redhat.com>
Date: Tue, 16 Jan 2018 10:05:26 -0700
Subject: [PATCH 0226/1852] PCI: Add function 1 DMA alias quirk for Marvell
 9128

[ Upstream commit aa008206634363ef800fbd5f0262016c9ff81dea ]

The Marvell 9128 is the original device generating bug 42679, from which
many other Marvell DMA alias quirks have been sourced, but we didn't have
positive confirmation of the fix on 9128 until now.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679
Link: https://www.spinics.net/lists/kvm/msg161459.html
Reported-by: Binarus <lists@binarus.de>
Tested-by: Binarus <lists@binarus.de>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/quirks.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4eb1cf0ed00c3..7a13e84d3c277 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3614,6 +3614,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9120,
 			 quirk_dma_func1_alias);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9123,
 			 quirk_dma_func1_alias);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9128,
+			 quirk_dma_func1_alias);
 /* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c14 */
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9130,
 			 quirk_dma_func1_alias);

From d346c0334619d8befe88c91cdfc1b0fb2e10c038 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Thu, 11 Jan 2018 19:47:45 -0500
Subject: [PATCH 0227/1852] tools lib traceevent: Simplify pointer print logic
 and fix %pF

[ Upstream commit 38d70b7ca1769f26c0b79f3c08ff2cc949712b59 ]

When processing %pX in pretty_print(), simplify the logic slightly by
incrementing the ptr to the format string if isalnum(ptr[1]) is true.
This follows the logic a bit more closely to what is in the kernel.

Also, this fixes a small bug where %pF was not giving the offset of the
function.

Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Namhyung Kim <namhyung@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Link: http://lkml.kernel.org/r/20180112004822.260262257@goodmis.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/lib/traceevent/event-parse.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/tools/lib/traceevent/event-parse.c b/tools/lib/traceevent/event-parse.c
index 68276f35e3236..6e4a10fe9dd0e 100644
--- a/tools/lib/traceevent/event-parse.c
+++ b/tools/lib/traceevent/event-parse.c
@@ -4905,21 +4905,22 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
 				else
 					ls = 2;
 
-				if (*(ptr+1) == 'F' || *(ptr+1) == 'f' ||
-				    *(ptr+1) == 'S' || *(ptr+1) == 's') {
+				if (isalnum(ptr[1]))
 					ptr++;
+
+				if (*ptr == 'F' || *ptr == 'f' ||
+				    *ptr == 'S' || *ptr == 's') {
 					show_func = *ptr;
-				} else if (*(ptr+1) == 'M' || *(ptr+1) == 'm') {
-					print_mac_arg(s, *(ptr+1), data, size, event, arg);
-					ptr++;
+				} else if (*ptr == 'M' || *ptr == 'm') {
+					print_mac_arg(s, *ptr, data, size, event, arg);
 					arg = arg->next;
 					break;
-				} else if (*(ptr+1) == 'I' || *(ptr+1) == 'i') {
+				} else if (*ptr == 'I' || *ptr == 'i') {
 					int n;
 
-					n = print_ip_arg(s, ptr+1, data, size, event, arg);
+					n = print_ip_arg(s, ptr, data, size, event, arg);
 					if (n > 0) {
-						ptr += n;
+						ptr += n - 1;
 						arg = arg->next;
 						break;
 					}

From 8776305b8fe592435a5bc8163a4dc9dd3b5c5c82 Mon Sep 17 00:00:00 2001
From: Arnaldo Carvalho de Melo <acme@redhat.com>
Date: Mon, 15 Jan 2018 11:07:58 -0300
Subject: [PATCH 0228/1852] perf callchain: Fix attr.sample_max_stack setting

[ Upstream commit 249d98e567e25dd03e015e2d31e1b7b9648f34df ]

When setting the "dwarf" unwinder for a specific event and not
specifying the max-stack, the attr.sample_max_stack ended up using an
uninitialized callchain_param.max_stack, fix it by using designated
initializers for that callchain_param variable, zeroing all non
explicitely initialized struct members.

Here is what happened:

  # perf trace -vv --no-syscalls --max-stack 4 -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1
  callchain: type DWARF
  callchain: stack dump size 8192
  perf_event_attr:
    type                             2
    size                             112
    config                           0x730
    { sample_period, sample_freq }   1
    sample_type                      IP|TID|TIME|ADDR|CALLCHAIN|CPU|PERIOD|RAW|REGS_USER|STACK_USER|DATA_SRC
    exclude_callchain_user           1
    { wakeup_events, wakeup_watermark } 1
    sample_regs_user                 0xff0fff
    sample_stack_user                8192
    sample_max_stack                 50656
  sys_perf_event_open failed, error -75
  Value too large for defined data type
  # perf trace -vv --no-syscalls --max-stack 4 -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1
  callchain: type DWARF
  callchain: stack dump size 8192
  perf_event_attr:
    type                             2
    size                             112
    config                           0x730
    sample_type                      IP|TID|TIME|ADDR|CALLCHAIN|CPU|PERIOD|RAW|REGS_USER|STACK_USER|DATA_SRC
    exclude_callchain_user           1
    sample_regs_user                 0xff0fff
    sample_stack_user                8192
    sample_max_stack                 30448
  sys_perf_event_open failed, error -75
  Value too large for defined data type
  #

Now the attr.sample_max_stack is set to zero and the above works as
expected:

  # perf trace --no-syscalls --max-stack 4 -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1
  PING ::1(::1) 56 data bytes
  64 bytes from ::1: icmp_seq=1 ttl=64 time=0.072 ms

  --- ::1 ping statistics ---
  1 packets transmitted, 1 received, 0% packet loss, time 0ms
  rtt min/avg/max/mdev = 0.072/0.072/0.072/0.000 ms
       0.000 probe_libc:inet_pton:(7feb7a998350))
                                         __inet_pton (inlined)
                                         gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so)
                                         __GI_getaddrinfo (inlined)
                                         [0xffffaa39b6108f3f] (/usr/bin/ping)
  #

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Hendrick Brueckner <brueckner@linux.vnet.ibm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Thomas Richter <tmricht@linux.vnet.ibm.com>
Cc: Wang Nan <wangnan0@huawei.com>
Link: https://lkml.kernel.org/n/tip-is9tramondqa9jlxxsgcm9iz@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/evsel.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
index 6e0a16c7176a1..8a84f82845f36 100644
--- a/tools/perf/util/evsel.c
+++ b/tools/perf/util/evsel.c
@@ -625,13 +625,13 @@ static void apply_config_terms(struct perf_evsel *evsel,
 	struct perf_evsel_config_term *term;
 	struct list_head *config_terms = &evsel->config_terms;
 	struct perf_event_attr *attr = &evsel->attr;
-	struct callchain_param param;
+	/* callgraph default */
+	struct callchain_param param = {
+		.record_mode = callchain_param.record_mode,
+	};
 	u32 dump_size = 0;
 	char *callgraph_buf = NULL;
 
-	/* callgraph default */
-	param.record_mode = callchain_param.record_mode;
-
 	list_for_each_entry(term, config_terms, list) {
 		switch (term->type) {
 		case PERF_EVSEL__CONFIG_TERM_PERIOD:

From 0014694d5cbd5c9173ebf6da8c47ef1de5ac5ea4 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Thu, 11 Jan 2018 19:47:51 -0500
Subject: [PATCH 0229/1852] tools lib traceevent: Fix get_field_str() for
 dynamic strings

[ Upstream commit d777f8de99b05d399c0e4e51cdce016f26bd971b ]

If a field is a dynamic string, get_field_str() returned just the
offset/size value and not the string. Have it parse the offset/size
correctly to return the actual string. Otherwise filtering fails when
trying to filter fields that are dynamic strings.

Reported-by: Gopanapalli Pradeep <prap_hai@yahoo.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Namhyung Kim <namhyung@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Link: http://lkml.kernel.org/r/20180112004823.146333275@goodmis.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/lib/traceevent/parse-filter.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/tools/lib/traceevent/parse-filter.c b/tools/lib/traceevent/parse-filter.c
index 88cccea3ca991..64309d73921b2 100644
--- a/tools/lib/traceevent/parse-filter.c
+++ b/tools/lib/traceevent/parse-filter.c
@@ -1867,17 +1867,25 @@ static const char *get_field_str(struct filter_arg *arg, struct pevent_record *r
 	struct pevent *pevent;
 	unsigned long long addr;
 	const char *val = NULL;
+	unsigned int size;
 	char hex[64];
 
 	/* If the field is not a string convert it */
 	if (arg->str.field->flags & FIELD_IS_STRING) {
 		val = record->data + arg->str.field->offset;
+		size = arg->str.field->size;
+
+		if (arg->str.field->flags & FIELD_IS_DYNAMIC) {
+			addr = *(unsigned int *)val;
+			val = record->data + (addr & 0xffff);
+			size = addr >> 16;
+		}
 
 		/*
 		 * We need to copy the data since we can't be sure the field
 		 * is null terminated.
 		 */
-		if (*(val + arg->str.field->size - 1)) {
+		if (*(val + size - 1)) {
 			/* copy it */
 			memcpy(arg->str.buffer, val, arg->str.field->size);
 			/* the buffer is already NULL terminated */

From 92e34e6a99a6ca1e2aec53930e3b8c55886cd03e Mon Sep 17 00:00:00 2001
From: mulhern <amulhern@redhat.com>
Date: Mon, 27 Nov 2017 10:02:39 -0500
Subject: [PATCH 0230/1852] dm thin: fix documentation relative to low water
 mark threshold

[ Upstream commit 9b28a1102efc75d81298198166ead87d643a29ce ]

Fixes:
1. The use of "exceeds" when the opposite of exceeds, falls below,
was meant.
2. Properly speaking, a table can not exceed a threshold.

It emphasizes the important point, which is that it is the userspace
daemon's responsibility to check for low free space when a device
is resumed, since it won't get a special event indicating low free
space in that situation.

Signed-off-by: mulhern <amulhern@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/device-mapper/thin-provisioning.txt | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Documentation/device-mapper/thin-provisioning.txt b/Documentation/device-mapper/thin-provisioning.txt
index 1699a55b7b709..ef639960b272d 100644
--- a/Documentation/device-mapper/thin-provisioning.txt
+++ b/Documentation/device-mapper/thin-provisioning.txt
@@ -112,9 +112,11 @@ $low_water_mark is expressed in blocks of size $data_block_size.  If
 free space on the data device drops below this level then a dm event
 will be triggered which a userspace daemon should catch allowing it to
 extend the pool device.  Only one such event will be sent.
-Resuming a device with a new table itself triggers an event so the
-userspace daemon can use this to detect a situation where a new table
-already exceeds the threshold.
+
+No special event is triggered if a just resumed device's free space is below
+the low water mark. However, resuming a device always triggers an
+event; a userspace daemon should verify that free space exceeds the low
+water mark when handling this event.
 
 A low water mark for the metadata device is maintained in the kernel and
 will trigger a dm event if free space on the metadata device drops below

From 33d246d4cd0b4282c91cd81ed7ee9415bb5122f0 Mon Sep 17 00:00:00 2001
From: Jan Chochol <jan@chochol.info>
Date: Fri, 5 Jan 2018 08:39:12 +0100
Subject: [PATCH 0231/1852] nfs: Do not convert nfs_idmap_cache_timeout to
 jiffies

[ Upstream commit cbebc6ef4fc830f4040d4140bf53484812d5d5d9 ]

Since commit 57e62324e469 ("NFS: Store the legacy idmapper result in the
keyring") nfs_idmap_cache_timeout changed units from jiffies to seconds.
Unfortunately sysctl interface was not updated accordingly.

As a effect updating /proc/sys/fs/nfs/idmap_cache_timeout with some
value will incorrectly multiply this value by HZ.
Also reading /proc/sys/fs/nfs/idmap_cache_timeout will show real value
divided by HZ.

Fixes: 57e62324e469 ("NFS: Store the legacy idmapper result in the keyring")
Signed-off-by: Jan Chochol <jan@chochol.info>
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/nfs/nfs4sysctl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/nfs/nfs4sysctl.c b/fs/nfs/nfs4sysctl.c
index 0fbd3ab1be222..44a7bbbf92f80 100644
--- a/fs/nfs/nfs4sysctl.c
+++ b/fs/nfs/nfs4sysctl.c
@@ -31,7 +31,7 @@ static struct ctl_table nfs4_cb_sysctls[] = {
 		.data = &nfs_idmap_cache_timeout,
 		.maxlen = sizeof(int),
 		.mode = 0644,
-		.proc_handler = proc_dointvec_jiffies,
+		.proc_handler = proc_dointvec,
 	},
 	{ }
 };

From a3325f6d8ad3657f4296cfcc30aaefd9afdae945 Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Sun, 24 Dec 2017 13:04:07 -0800
Subject: [PATCH 0232/1852] watchdog: sp5100_tco: Fix watchdog disable bit
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit f541c09ebfc61697b586b38c9ebaf4b70defb278 ]

According to all published information, the watchdog disable bit for SB800
compatible controllers is bit 1 of PM register 0x48, not bit 2. For the
most part that doesn't matter in practice, since the bit has to be cleared
to enable watchdog address decoding, which is the default setting, but it
still needs to be fixed.

Cc: Zoltán Böszörményi <zboszor@pr.hu>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/watchdog/sp5100_tco.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/watchdog/sp5100_tco.h b/drivers/watchdog/sp5100_tco.h
index 2b28c00da0df0..dfe20b81ced54 100644
--- a/drivers/watchdog/sp5100_tco.h
+++ b/drivers/watchdog/sp5100_tco.h
@@ -54,7 +54,7 @@
 #define SB800_PM_WATCHDOG_CONFIG	0x4C
 
 #define SB800_PCI_WATCHDOG_DECODE_EN	(1 << 0)
-#define SB800_PM_WATCHDOG_DISABLE	(1 << 2)
+#define SB800_PM_WATCHDOG_DISABLE	(1 << 1)
 #define SB800_PM_WATCHDOG_SECOND_RES	(3 << 0)
 #define SB800_ACPI_MMIO_DECODE_EN	(1 << 0)
 #define SB800_ACPI_MMIO_SEL		(1 << 1)

From 14d2ddcf9d06393e1b888f9ad1061dd0c902529f Mon Sep 17 00:00:00 2001
From: Ulf Magnusson <ulfalizer@gmail.com>
Date: Sun, 8 Oct 2017 19:11:21 +0200
Subject: [PATCH 0233/1852] kconfig: Don't leak main menus during parsing

[ Upstream commit 0724a7c32a54e3e50d28e19e30c59014f61d4e2c ]

If a 'mainmenu' entry appeared in the Kconfig files, two things would
leak:

	- The 'struct property' allocated for the default "Linux Kernel
	  Configuration" prompt.

	- The string for the T_WORD/T_WORD_QUOTE prompt after the
	  T_MAINMENU token, allocated on the heap in zconf.l.

To fix it, introduce a new 'no_mainmenu_stmt' nonterminal that matches
if there's no 'mainmenu' and adds the default prompt. That means the
prompt only gets allocated once regardless of whether there's a
'mainmenu' statement or not, and managing it becomes simple.

Summary from Valgrind on 'menuconfig' (ARCH=x86) before the fix:

	LEAK SUMMARY:
	   definitely lost: 344,568 bytes in 14,352 blocks
	   ...

Summary after the fix:

	LEAK SUMMARY:
	   definitely lost: 344,440 bytes in 14,350 blocks
	   ...

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 scripts/kconfig/zconf.y | 33 ++++++++++++++++++++++++---------
 1 file changed, 24 insertions(+), 9 deletions(-)

diff --git a/scripts/kconfig/zconf.y b/scripts/kconfig/zconf.y
index 71bf8bff696a4..5122ed2d839ab 100644
--- a/scripts/kconfig/zconf.y
+++ b/scripts/kconfig/zconf.y
@@ -107,7 +107,27 @@ static struct menu *current_menu, *current_entry;
 %%
 input: nl start | start;
 
-start: mainmenu_stmt stmt_list | stmt_list;
+start: mainmenu_stmt stmt_list | no_mainmenu_stmt stmt_list;
+
+/* mainmenu entry */
+
+mainmenu_stmt: T_MAINMENU prompt nl
+{
+	menu_add_prompt(P_MENU, $2, NULL);
+};
+
+/* Default main menu, if there's no mainmenu entry */
+
+no_mainmenu_stmt: /* empty */
+{
+	/*
+	 * Hack: Keep the main menu title on the heap so we can safely free it
+	 * later regardless of whether it comes from the 'prompt' in
+	 * mainmenu_stmt or here
+	 */
+	menu_add_prompt(P_MENU, strdup("Linux Kernel Configuration"), NULL);
+};
+
 
 stmt_list:
 	  /* empty */
@@ -344,13 +364,6 @@ if_block:
 	| if_block choice_stmt
 ;
 
-/* mainmenu entry */
-
-mainmenu_stmt: T_MAINMENU prompt nl
-{
-	menu_add_prompt(P_MENU, $2, NULL);
-};
-
 /* menu entry */
 
 menu: T_MENU prompt T_EOL
@@ -495,6 +508,7 @@ word_opt: /* empty */			{ $$ = NULL; }
 
 void conf_parse(const char *name)
 {
+	const char *tmp;
 	struct symbol *sym;
 	int i;
 
@@ -502,7 +516,6 @@ void conf_parse(const char *name)
 
 	sym_init();
 	_menu_init();
-	rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL);
 
 	if (getenv("ZCONF_DEBUG"))
 		zconfdebug = 1;
@@ -512,8 +525,10 @@ void conf_parse(const char *name)
 	if (!modules_sym)
 		modules_sym = sym_find( "n" );
 
+	tmp = rootmenu.prompt->text;
 	rootmenu.prompt->text = _(rootmenu.prompt->text);
 	rootmenu.prompt->text = sym_expand_string_value(rootmenu.prompt->text);
+	free((char*)tmp);
 
 	menu_finalize(&rootmenu);
 	for_all_symbols(i, sym) {

From 3078e66d0089ce3d2f9fd2c6aed24954bcadc87e Mon Sep 17 00:00:00 2001
From: Ulf Magnusson <ulfalizer@gmail.com>
Date: Sun, 8 Oct 2017 19:35:44 +0200
Subject: [PATCH 0234/1852] kconfig: Fix automatic menu creation mem leak

[ Upstream commit ae7440ef0c8013d68c00dad6900e7cce5311bb1c ]

expr_trans_compare() always allocates and returns a new expression,
giving the following leak outline:

	...
	*Allocate*
	basedep = expr_trans_compare(basedep, E_UNEQUAL, &symbol_no);
	...
	for (menu = parent->next; menu; menu = menu->next) {
		...
		*Copy*
		dep2 = expr_copy(basedep);
		...
		*Free copy*
		expr_free(dep2);
	}
	*basedep lost!*

Fix by freeing 'basedep' after the loop.

Summary from Valgrind on 'menuconfig' (ARCH=x86) before the fix:

	LEAK SUMMARY:
	   definitely lost: 344,376 bytes in 14,349 blocks
	   ...

Summary after the fix:

	LEAK SUMMARY:
	   definitely lost: 44,448 bytes in 1,852 blocks
	   ...

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 scripts/kconfig/menu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c
index b05cc3d4a9bea..8360feaf51ce3 100644
--- a/scripts/kconfig/menu.c
+++ b/scripts/kconfig/menu.c
@@ -364,6 +364,7 @@ void menu_finalize(struct menu *parent)
 			menu->parent = parent;
 			last_menu = menu;
 		}
+		expr_free(basedep);
 		if (last_menu) {
 			parent->list = parent->next;
 			parent->next = last_menu->next;

From 57ad61f3f71be9688f440990955f1b910ebd5575 Mon Sep 17 00:00:00 2001
From: Ulf Magnusson <ulfalizer@gmail.com>
Date: Sun, 8 Oct 2017 19:35:45 +0200
Subject: [PATCH 0235/1852] kconfig: Fix expr_free() E_NOT leak

[ Upstream commit 5b1374b3b3c2fc4f63a398adfa446fb8eff791a4 ]

Only the E_NOT operand and not the E_NOT node itself was freed, due to
accidentally returning too early in expr_free(). Outline of leak:

	switch (e->type) {
	...
	case E_NOT:
		expr_free(e->left.expr);
		return;
	...
	}
	*Never reached, 'e' leaked*
	free(e);

Fix by changing the 'return' to a 'break'.

Summary from Valgrind on 'menuconfig' (ARCH=x86) before the fix:

	LEAK SUMMARY:
	   definitely lost: 44,448 bytes in 1,852 blocks
	   ...

Summary after the fix:

	LEAK SUMMARY:
	   definitely lost: 1,608 bytes in 67 blocks
	   ...

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 scripts/kconfig/expr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/kconfig/expr.c b/scripts/kconfig/expr.c
index cbf4996dd9c10..ed29bad1f03a3 100644
--- a/scripts/kconfig/expr.c
+++ b/scripts/kconfig/expr.c
@@ -113,7 +113,7 @@ void expr_free(struct expr *e)
 		break;
 	case E_NOT:
 		expr_free(e->left.expr);
-		return;
+		break;
 	case E_EQUAL:
 	case E_GEQ:
 	case E_GTH:

From fe0924246092d4b65056ed3d16d618b9e8e5ce0b Mon Sep 17 00:00:00 2001
From: "weiyongjun (A)" <weiyongjun1@huawei.com>
Date: Thu, 18 Jan 2018 02:23:34 +0000
Subject: [PATCH 0236/1852] mac80211_hwsim: fix possible memory leak in
 hwsim_new_radio_nl()

[ Upstream commit 0ddcff49b672239dda94d70d0fcf50317a9f4b51 ]

'hwname' is malloced in hwsim_new_radio_nl() and should be freed
before leaving from the error handling cases, otherwise it will cause
memory leak.

Fixes: ff4dd73dd2b4 ("mac80211_hwsim: check HWSIM_ATTR_RADIO_NAME length")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/mac80211_hwsim.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index 8a9164da6c50b..e8b770a95f7ae 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -2925,8 +2925,10 @@ static int hwsim_new_radio_nl(struct sk_buff *msg, struct genl_info *info)
 	if (info->attrs[HWSIM_ATTR_REG_CUSTOM_REG]) {
 		u32 idx = nla_get_u32(info->attrs[HWSIM_ATTR_REG_CUSTOM_REG]);
 
-		if (idx >= ARRAY_SIZE(hwsim_world_regdom_custom))
+		if (idx >= ARRAY_SIZE(hwsim_world_regdom_custom)) {
+			kfree(hwname);
 			return -EINVAL;
+		}
 		param.regd = hwsim_world_regdom_custom[idx];
 	}
 

From b0c795a4e3c2f4ae6dadb5447195ab17846eb515 Mon Sep 17 00:00:00 2001
From: Wei Yongjun <weiyongjun1@huawei.com>
Date: Thu, 18 Jan 2018 01:43:19 +0000
Subject: [PATCH 0237/1852] ipmi/powernv: Fix error return code in
 ipmi_powernv_probe()

[ Upstream commit e749d328b0b450aa78d562fa26a0cd8872325dd9 ]

Fix to return a negative error code from the request_irq() error
handling case instead of 0, as done elsewhere in this function.

Fixes: dce143c3381c ("ipmi/powernv: Convert to irq event interface")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/ipmi/ipmi_powernv.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/char/ipmi/ipmi_powernv.c b/drivers/char/ipmi/ipmi_powernv.c
index 6e658aa114f19..a70518a4fcecb 100644
--- a/drivers/char/ipmi/ipmi_powernv.c
+++ b/drivers/char/ipmi/ipmi_powernv.c
@@ -251,8 +251,9 @@ static int ipmi_powernv_probe(struct platform_device *pdev)
 		ipmi->irq = opal_event_request(prop);
 	}
 
-	if (request_irq(ipmi->irq, ipmi_opal_event, IRQ_TYPE_LEVEL_HIGH,
-				"opal-ipmi", ipmi)) {
+	rc = request_irq(ipmi->irq, ipmi_opal_event, IRQ_TYPE_LEVEL_HIGH,
+			 "opal-ipmi", ipmi);
+	if (rc) {
 		dev_warn(dev, "Unable to request irq\n");
 		goto err_dispose;
 	}

From 99aa4fba68268e00dc99b75f96fa6a48103b8847 Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.li.liu@oracle.com>
Date: Wed, 15 Nov 2017 16:10:28 -0700
Subject: [PATCH 0238/1852] Btrfs: set plug for fsync

[ Upstream commit 343e4fc1c60971b0734de26dbbd475d433950982 ]

Setting plug can merge adjacent IOs before dispatching IOs to the disk
driver.

Without plug, it'd not be a problem for single disk usecases, but for
multiple disks using raid profile, a large IO can be split to several
IOs of stripe length, and plug can be helpful to bring them together
for each disk so that we can save several disk access.

Moreover, fsync issues synchronous writes, so plug can really take
effect.

Signed-off-by: Liu Bo <bo.li.liu@oracle.com>
Reviewed-by: David Sterba <dsterba@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/file.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index d4a6eef318545..0529736205957 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -1861,10 +1861,19 @@ int btrfs_release_file(struct inode *inode, struct file *filp)
 static int start_ordered_ops(struct inode *inode, loff_t start, loff_t end)
 {
 	int ret;
+	struct blk_plug plug;
 
+	/*
+	 * This is only called in fsync, which would do synchronous writes, so
+	 * a plug can merge adjacent IOs as much as possible.  Esp. in case of
+	 * multiple disks using raid profile, a large IO can be split to
+	 * several segments of stripe length (currently 64K).
+	 */
+	blk_start_plug(&plug);
 	atomic_inc(&BTRFS_I(inode)->sync_writers);
 	ret = btrfs_fdatawrite_range(inode, start, end);
 	atomic_dec(&BTRFS_I(inode)->sync_writers);
+	blk_finish_plug(&plug);
 
 	return ret;
 }

From 6a79456676c5132035f22aed78ccf98944dffdfd Mon Sep 17 00:00:00 2001
From: Nikolay Borisov <nborisov@suse.com>
Date: Tue, 12 Dec 2017 11:14:49 +0200
Subject: [PATCH 0239/1852] btrfs: Fix out of bounds access in
 btrfs_search_slot

[ Upstream commit 9ea2c7c9da13c9073e371c046cbbc45481ecb459 ]

When modifying a tree where the root is at BTRFS_MAX_LEVEL - 1 then
the level variable is going to be 7 (this is the max height of the
tree). On the other hand btrfs_cow_block is always called with
"level + 1" as an index into the nodes and slots arrays. This leads to
an out of bounds access. Admittdely this will be benign since an OOB
access of the nodes array will likely read the 0th element from the
slots array, which in this case is going to be 0 (since we start CoW at
the top of the tree). The OOB access into the slots array in turn will
read the 0th and 1st values of the locks array, which would both be 0
at the time. However, this benign behavior relies on the fact that the
path being passed hasn't been initialised, if it has already been used to
query a btree then it could potentially have populated the nodes/slots arrays.

Fix it by explicitly checking if we are at level 7 (the maximum allowed
index in nodes/slots arrays) and explicitly call the CoW routine with
NULL for parent's node/slot.

Signed-off-by: Nikolay Borisov <nborisov@suse.com>
Fixes-coverity-id: 711515
Reviewed-by: David Sterba <dsterba@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/ctree.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c
index e2f5be261532d..38ee086754687 100644
--- a/fs/btrfs/ctree.c
+++ b/fs/btrfs/ctree.c
@@ -2769,6 +2769,8 @@ int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root
 		 * contention with the cow code
 		 */
 		if (cow) {
+			bool last_level = (level == (BTRFS_MAX_LEVEL - 1));
+
 			/*
 			 * if we don't really need to cow this block
 			 * then we don't want to set the path blocking,
@@ -2793,9 +2795,13 @@ int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root
 			}
 
 			btrfs_set_path_blocking(p);
-			err = btrfs_cow_block(trans, root, b,
-					      p->nodes[level + 1],
-					      p->slots[level + 1], &b);
+			if (last_level)
+				err = btrfs_cow_block(trans, root, b, NULL, 0,
+						      &b);
+			else
+				err = btrfs_cow_block(trans, root, b,
+						      p->nodes[level + 1],
+						      p->slots[level + 1], &b);
 			if (err) {
 				ret = err;
 				goto done;

From b26c044b209180a714fd035aaab84c6fbc72086c Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.li.liu@oracle.com>
Date: Tue, 2 Jan 2018 13:36:41 -0700
Subject: [PATCH 0240/1852] Btrfs: fix scrub to repair raid6 corruption

[ Upstream commit 762221f095e3932669093466aaf4b85ed9ad2ac1 ]

The raid6 corruption is that,
suppose that all disks can be read without problems and if the content
that was read out doesn't match its checksum, currently for raid6
btrfs at most retries twice,

- the 1st retry is to rebuild with all other stripes, it'll eventually
  be a raid5 xor rebuild,
- if the 1st fails, the 2nd retry will deliberately fail parity p so
  that it will do raid6 style rebuild,

however, the chances are that another non-parity stripe content also
has something corrupted, so that the above retries are not able to
return correct content.

We've fixed normal reads to rebuild raid6 correctly with more retries
in Patch "Btrfs: make raid6 rebuild retry more"[1], this is to fix
scrub to do the exactly same rebuild process.

[1]: https://patchwork.kernel.org/patch/10091755/

Signed-off-by: Liu Bo <bo.li.liu@oracle.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/raid56.c  | 18 ++++++++++++++----
 fs/btrfs/volumes.c |  9 ++++++++-
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/fs/btrfs/raid56.c b/fs/btrfs/raid56.c
index 1a33d3eb36de1..b9fa99577bf7a 100644
--- a/fs/btrfs/raid56.c
+++ b/fs/btrfs/raid56.c
@@ -2160,11 +2160,21 @@ int raid56_parity_recover(struct btrfs_root *root, struct bio *bio,
 	}
 
 	/*
-	 * reconstruct from the q stripe if they are
-	 * asking for mirror 3
+	 * Loop retry:
+	 * for 'mirror == 2', reconstruct from all other stripes.
+	 * for 'mirror_num > 2', select a stripe to fail on every retry.
 	 */
-	if (mirror_num == 3)
-		rbio->failb = rbio->real_stripes - 2;
+	if (mirror_num > 2) {
+		/*
+		 * 'mirror == 3' is to fail the p stripe and
+		 * reconstruct from the q stripe.  'mirror > 3' is to
+		 * fail a data stripe and reconstruct from p+q stripe.
+		 */
+		rbio->failb = rbio->real_stripes - (mirror_num - 1);
+		ASSERT(rbio->failb > 0);
+		if (rbio->failb <= rbio->faila)
+			rbio->failb--;
+	}
 
 	ret = lock_stripe_add(rbio);
 
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index ed75d70b4bc27..b4d63a9842fac 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -5056,7 +5056,14 @@ int btrfs_num_copies(struct btrfs_fs_info *fs_info, u64 logical, u64 len)
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID5)
 		ret = 2;
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID6)
-		ret = 3;
+		/*
+		 * There could be two corrupted data stripes, we need
+		 * to loop retry in order to rebuild the correct data.
+		 *
+		 * Fail a stripe at a time on every retry except the
+		 * stripe under reconstruction.
+		 */
+		ret = map->num_stripes;
 	else
 		ret = 1;
 	free_extent_map(em);

From ccc359d7a833364f6d8fa6c780648feb99b3abb8 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 18 Jan 2018 14:16:38 +0100
Subject: [PATCH 0241/1852] scsi: fas216: fix sense buffer initialization

[ Upstream commit 96d5eaa9bb74d299508d811d865c2c41b38b0301 ]

While testing with the ARM specific memset() macro removed, I ran into a
compiler warning that shows an old bug:

drivers/scsi/arm/fas216.c: In function 'fas216_rq_sns_done':
drivers/scsi/arm/fas216.c:2014:40: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to provide an explicit length? [-Werror=sizeof-pointer-memaccess]

It turns out that the definition of the scsi_cmd structure changed back
in linux-2.6.25, so now we clear only four bytes (sizeof(pointer))
instead of 96 (SCSI_SENSE_BUFFERSIZE). I did not check whether we
actually need to initialize the buffer here, but it's clear that if we
do it, we should use the correct size.

Fixes: de25deb18016 ("[SCSI] use dynamically allocated sense buffer")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/arm/fas216.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/arm/fas216.c b/drivers/scsi/arm/fas216.c
index decdc71b6b860..f6d7c4712e66a 100644
--- a/drivers/scsi/arm/fas216.c
+++ b/drivers/scsi/arm/fas216.c
@@ -2009,7 +2009,7 @@ static void fas216_rq_sns_done(FAS216_Info *info, struct scsi_cmnd *SCpnt,
 		 * have valid data in the sense buffer that could
 		 * confuse the higher levels.
 		 */
-		memset(SCpnt->sense_buffer, 0, sizeof(SCpnt->sense_buffer));
+		memset(SCpnt->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
 //printk("scsi%d.%c: sense buffer: ", info->host->host_no, '0' + SCpnt->device->id);
 //{ int i; for (i = 0; i < 32; i++) printk("%02x ", SCpnt->sense_buffer[i]); printk("\n"); }
 	/*

From abf18ce2343e06224806bbe4273ea983c3093cb9 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Wed, 10 Jan 2018 12:39:03 +0300
Subject: [PATCH 0242/1852] HID: roccat: prevent an out of bounds read in
 kovaplus_profile_activated()

[ Upstream commit 7ad81482cad67cbe1ec808490d1ddfc420c42008 ]

We get the "new_profile_index" value from the mouse device when we're
handling raw events.  Smatch taints it as untrusted data and complains
that we need a bounds check.  This seems like a reasonable warning
otherwise there is a small read beyond the end of the array.

Fixes: 0e70f97f257e ("HID: roccat: Add support for Kova[+] mouse")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Silvan Jegen <s.jegen@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/hid-roccat-kovaplus.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/hid/hid-roccat-kovaplus.c b/drivers/hid/hid-roccat-kovaplus.c
index 966047711fbfc..1073c0d1fae59 100644
--- a/drivers/hid/hid-roccat-kovaplus.c
+++ b/drivers/hid/hid-roccat-kovaplus.c
@@ -37,6 +37,8 @@ static uint kovaplus_convert_event_cpi(uint value)
 static void kovaplus_profile_activated(struct kovaplus_device *kovaplus,
 		uint new_profile_index)
 {
+	if (new_profile_index >= ARRAY_SIZE(kovaplus->profile_settings))
+		return;
 	kovaplus->actual_profile = new_profile_index;
 	kovaplus->actual_cpi = kovaplus->profile_settings[new_profile_index].cpi_startup_level;
 	kovaplus->actual_x_sensitivity = kovaplus->profile_settings[new_profile_index].sensitivity_x;

From dcdbe01782766cf0e40f72ffae161b95495a48c6 Mon Sep 17 00:00:00 2001
From: Jake Daryll Obina <jake.obina@gmail.com>
Date: Fri, 22 Sep 2017 00:00:14 +0800
Subject: [PATCH 0243/1852] jffs2: Fix use-after-free bug in jffs2_iget()'s
 error handling path

[ Upstream commit 5bdd0c6f89fba430e18d636493398389dadc3b17 ]

If jffs2_iget() fails for a newly-allocated inode, jffs2_do_clear_inode()
can get called twice in the error handling path, the first call in
jffs2_iget() itself and the second through iget_failed(). This can result
to a use-after-free error in the second jffs2_do_clear_inode() call, such
as shown by the oops below wherein the second jffs2_do_clear_inode() call
was trying to free node fragments that were already freed in the first
jffs2_do_clear_inode() call.

[   78.178860] jffs2: error: (1904) jffs2_do_read_inode_internal: CRC failed for read_inode of inode 24 at physical location 0x1fc00c
[   78.178914] Unable to handle kernel paging request at virtual address 6b6b6b6b6b6b6b7b
[   78.185871] pgd = ffffffc03a567000
[   78.188794] [6b6b6b6b6b6b6b7b] *pgd=0000000000000000, *pud=0000000000000000
[   78.194968] Internal error: Oops: 96000004 [#1] PREEMPT SMP
...
[   78.513147] PC is at rb_first_postorder+0xc/0x28
[   78.516503] LR is at jffs2_kill_fragtree+0x28/0x90 [jffs2]
[   78.520672] pc : [<ffffff8008323d28>] lr : [<ffffff8000eb1cc8>] pstate: 60000105
[   78.526757] sp : ffffff800cea38f0
[   78.528753] x29: ffffff800cea38f0 x28: ffffffc01f3f8e80
[   78.532754] x27: 0000000000000000 x26: ffffff800cea3c70
[   78.536756] x25: 00000000dc67c8ae x24: ffffffc033d6945d
[   78.540759] x23: ffffffc036811740 x22: ffffff800891a5b8
[   78.544760] x21: 0000000000000000 x20: 0000000000000000
[   78.548762] x19: ffffffc037d48910 x18: ffffff800891a588
[   78.552764] x17: 0000000000000800 x16: 0000000000000c00
[   78.556766] x15: 0000000000000010 x14: 6f2065646f6e695f
[   78.560767] x13: 6461657220726f66 x12: 2064656c69616620
[   78.564769] x11: 435243203a6c616e x10: 7265746e695f6564
[   78.568771] x9 : 6f6e695f64616572 x8 : ffffffc037974038
[   78.572774] x7 : bbbbbbbbbbbbbbbb x6 : 0000000000000008
[   78.576775] x5 : 002f91d85bd44a2f x4 : 0000000000000000
[   78.580777] x3 : 0000000000000000 x2 : 000000403755e000
[   78.584779] x1 : 6b6b6b6b6b6b6b6b x0 : 6b6b6b6b6b6b6b6b
...
[   79.038551] [<ffffff8008323d28>] rb_first_postorder+0xc/0x28
[   79.042962] [<ffffff8000eb5578>] jffs2_do_clear_inode+0x88/0x100 [jffs2]
[   79.048395] [<ffffff8000eb9ddc>] jffs2_evict_inode+0x3c/0x48 [jffs2]
[   79.053443] [<ffffff8008201ca8>] evict+0xb0/0x168
[   79.056835] [<ffffff8008202650>] iput+0x1c0/0x200
[   79.060228] [<ffffff800820408c>] iget_failed+0x30/0x3c
[   79.064097] [<ffffff8000eba0c0>] jffs2_iget+0x2d8/0x360 [jffs2]
[   79.068740] [<ffffff8000eb0a60>] jffs2_lookup+0xe8/0x130 [jffs2]
[   79.073434] [<ffffff80081f1a28>] lookup_slow+0x118/0x190
[   79.077435] [<ffffff80081f4708>] walk_component+0xfc/0x28c
[   79.081610] [<ffffff80081f4dd0>] path_lookupat+0x84/0x108
[   79.085699] [<ffffff80081f5578>] filename_lookup+0x88/0x100
[   79.089960] [<ffffff80081f572c>] user_path_at_empty+0x58/0x6c
[   79.094396] [<ffffff80081ebe14>] vfs_statx+0xa4/0x114
[   79.098138] [<ffffff80081ec44c>] SyS_newfstatat+0x58/0x98
[   79.102227] [<ffffff800808354c>] __sys_trace_return+0x0/0x4
[   79.106489] Code: d65f03c0 f9400001 b40000e1 aa0103e0 (f9400821)

The jffs2_do_clear_inode() call in jffs2_iget() is unnecessary since
iget_failed() will eventually call jffs2_do_clear_inode() if needed, so
just remove it.

Fixes: 5451f79f5f81 ("iget: stop JFFS2 from using iget() and read_inode()")
Reviewed-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Jake Daryll Obina <jake.obina@gmail.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/jffs2/fs.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c
index 2caf1682036dc..85e2594fe95cf 100644
--- a/fs/jffs2/fs.c
+++ b/fs/jffs2/fs.c
@@ -361,7 +361,6 @@ struct inode *jffs2_iget(struct super_block *sb, unsigned long ino)
 	ret = -EIO;
 error:
 	mutex_unlock(&f->sem);
-	jffs2_do_clear_inode(c, f);
 	iget_failed(inode);
 	return ERR_PTR(ret);
 }

From ba6b1d0a376bb8dba1c531259e73daf40c65b7b8 Mon Sep 17 00:00:00 2001
From: Michael Bringmann <mwb@linux.vnet.ibm.com>
Date: Tue, 28 Nov 2017 16:58:36 -0600
Subject: [PATCH 0244/1852] powerpc/numa: Use ibm,max-associativity-domains to
 discover possible nodes

[ Upstream commit a346137e9142b039fd13af2e59696e3d40c487ef ]

On powerpc systems which allow 'hot-add' of CPU or memory resources,
it may occur that the new resources are to be inserted into nodes that
were not used for these resources at bootup. In the kernel, any node
that is used must be defined and initialized. These empty nodes may
occur when,

* Dedicated vs. shared resources. Shared resources require information
  such as the VPHN hcall for CPU assignment to nodes. Associativity
  decisions made based on dedicated resource rules, such as
  associativity properties in the device tree, may vary from decisions
  made using the values returned by the VPHN hcall.

* memoryless nodes at boot. Nodes need to be defined as 'possible' at
  boot for operation with other code modules. Previously, the powerpc
  code would limit the set of possible nodes to those which have
  memory assigned at boot, and were thus online. Subsequent add/remove
  of CPUs or memory would only work with this subset of possible
  nodes.

* memoryless nodes with CPUs at boot. Due to the previous restriction
  on nodes, nodes that had CPUs but no memory were being collapsed
  into other nodes that did have memory at boot. In practice this
  meant that the node assignment presented by the runtime kernel
  differed from the affinity and associativity attributes presented by
  the device tree or VPHN hcalls. Nodes that might be known to the
  pHyp were not 'possible' in the runtime kernel because they did not
  have memory at boot.

This patch ensures that sufficient nodes are defined to support
configuration requirements after boot, as well as at boot. This patch
set fixes a couple of problems.

* Nodes known to powerpc to be memoryless at boot, but to have CPUs in
  them are allowed to be 'possible' and 'online'. Memory allocations
  for those nodes are taken from another node that does have memory
  until and if memory is hot-added to the node. * Nodes which have no
  resources assigned at boot, but which may still be referenced
  subsequently by affinity or associativity attributes, are kept in
  the list of 'possible' nodes for powerpc. Hot-add of memory or CPUs
  to the system can reference these nodes and bring them online
  instead of redirecting to one of the set of nodes that were known to
  have memory at boot.

This patch extracts the value of the lowest domain level (number of
allocable resources) from the device tree property
"ibm,max-associativity-domains" to use as the maximum number of nodes
to setup as possibly available in the system. This new setting will
override the instruction:

    nodes_and(node_possible_map, node_possible_map, node_online_map);

presently seen in the function arch/powerpc/mm/numa.c:initmem_init().

If the "ibm,max-associativity-domains" property is not present at
boot, no operation will be performed to define or enable additional
nodes, or enable the above 'nodes_and()'.

Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/mm/numa.c | 37 ++++++++++++++++++++++++++++++++++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 669a15e7fa76a..8fd8425af27f8 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -951,6 +951,34 @@ static void __init setup_node_data(int nid, u64 start_pfn, u64 end_pfn)
 	NODE_DATA(nid)->node_spanned_pages = spanned_pages;
 }
 
+static void __init find_possible_nodes(void)
+{
+	struct device_node *rtas;
+	u32 numnodes, i;
+
+	if (min_common_depth <= 0)
+		return;
+
+	rtas = of_find_node_by_path("/rtas");
+	if (!rtas)
+		return;
+
+	if (of_property_read_u32_index(rtas,
+				"ibm,max-associativity-domains",
+				min_common_depth, &numnodes))
+		goto out;
+
+	for (i = 0; i < numnodes; i++) {
+		if (!node_possible(i)) {
+			setup_node_data(i, 0, 0);
+			node_set(i, node_possible_map);
+		}
+	}
+
+out:
+	of_node_put(rtas);
+}
+
 void __init initmem_init(void)
 {
 	int nid, cpu;
@@ -966,12 +994,15 @@ void __init initmem_init(void)
 	memblock_dump_all();
 
 	/*
-	 * Reduce the possible NUMA nodes to the online NUMA nodes,
-	 * since we do not support node hotplug. This ensures that  we
-	 * lower the maximum NUMA node ID to what is actually present.
+	 * Modify the set of possible NUMA nodes to reflect information
+	 * available about the set of online nodes, and the set of nodes
+	 * that we expect to make use of for this platform's affinity
+	 * calculations.
 	 */
 	nodes_and(node_possible_map, node_possible_map, node_online_map);
 
+	find_possible_nodes();
+
 	for_each_online_node(nid) {
 		unsigned long start_pfn, end_pfn;
 

From 8aae636d4cd6d107e15dbb09f97aa136369bf600 Mon Sep 17 00:00:00 2001
From: Michael Bringmann <mwb@linux.vnet.ibm.com>
Date: Tue, 28 Nov 2017 16:58:40 -0600
Subject: [PATCH 0245/1852] powerpc/numa: Ensure nodes initialized for hotplug

[ Upstream commit ea05ba7c559c8e5a5946c3a94a2a266e9a6680a6 ]

This patch fixes some problems encountered at runtime with
configurations that support memory-less nodes, or that hot-add CPUs
into nodes that are memoryless during system execution after boot. The
problems of interest include:

* Nodes known to powerpc to be memoryless at boot, but to have CPUs in
  them are allowed to be 'possible' and 'online'. Memory allocations
  for those nodes are taken from another node that does have memory
  until and if memory is hot-added to the node.

* Nodes which have no resources assigned at boot, but which may still
  be referenced subsequently by affinity or associativity attributes,
  are kept in the list of 'possible' nodes for powerpc. Hot-add of
  memory or CPUs to the system can reference these nodes and bring
  them online instead of redirecting the references to one of the set
  of nodes known to have memory at boot.

Note that this software operates under the context of CPU hotplug. We
are not doing memory hotplug in this code, but rather updating the
kernel's CPU topology (i.e. arch_update_cpu_topology /
numa_update_cpu_topology). We are initializing a node that may be used
by CPUs or memory before it can be referenced as invalid by a CPU
hotplug operation. CPU hotplug operations are protected by a range of
APIs including cpu_maps_update_begin/cpu_maps_update_done,
cpus_read/write_lock / cpus_read/write_unlock, device locks, and more.
Memory hotplug operations, including try_online_node, are protected by
mem_hotplug_begin/mem_hotplug_done, device locks, and more. In the
case of CPUs being hot-added to a previously memoryless node, the
try_online_node operation occurs wholly within the CPU locks with no
overlap. Using HMC hot-add/hot-remove operations, we have been able to
add and remove CPUs to any possible node without failures. HMC
operations involve a degree self-serialization, though.

Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/mm/numa.c | 47 +++++++++++++++++++++++++++++++++---------
 1 file changed, 37 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 8fd8425af27f8..3c4faa4c2742b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -551,7 +551,7 @@ static int numa_setup_cpu(unsigned long lcpu)
 	nid = of_node_to_nid_single(cpu);
 
 out_present:
-	if (nid < 0 || !node_online(nid))
+	if (nid < 0 || !node_possible(nid))
 		nid = first_online_node;
 
 	map_cpu_to_node(lcpu, nid);
@@ -969,10 +969,8 @@ static void __init find_possible_nodes(void)
 		goto out;
 
 	for (i = 0; i < numnodes; i++) {
-		if (!node_possible(i)) {
-			setup_node_data(i, 0, 0);
+		if (!node_possible(i))
 			node_set(i, node_possible_map);
-		}
 	}
 
 out:
@@ -1335,6 +1333,40 @@ static long vphn_get_associativity(unsigned long cpu,
 	return rc;
 }
 
+static inline int find_and_online_cpu_nid(int cpu)
+{
+	__be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
+	int new_nid;
+
+	/* Use associativity from first thread for all siblings */
+	vphn_get_associativity(cpu, associativity);
+	new_nid = associativity_to_nid(associativity);
+	if (new_nid < 0 || !node_possible(new_nid))
+		new_nid = first_online_node;
+
+	if (NODE_DATA(new_nid) == NULL) {
+#ifdef CONFIG_MEMORY_HOTPLUG
+		/*
+		 * Need to ensure that NODE_DATA is initialized for a node from
+		 * available memory (see memblock_alloc_try_nid). If unable to
+		 * init the node, then default to nearest node that has memory
+		 * installed.
+		 */
+		if (try_online_node(new_nid))
+			new_nid = first_online_node;
+#else
+		/*
+		 * Default to using the nearest node that has memory installed.
+		 * Otherwise, it would be necessary to patch the kernel MM code
+		 * to deal with more memoryless-node error conditions.
+		 */
+		new_nid = first_online_node;
+#endif
+	}
+
+	return new_nid;
+}
+
 /*
  * Update the CPU maps and sysfs entries for a single CPU when its NUMA
  * characteristics change. This function doesn't perform any locking and is
@@ -1400,7 +1432,6 @@ int arch_update_cpu_topology(void)
 {
 	unsigned int cpu, sibling, changed = 0;
 	struct topology_update_data *updates, *ud;
-	__be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
 	cpumask_t updated_cpus;
 	struct device *dev;
 	int weight, new_nid, i = 0;
@@ -1435,11 +1466,7 @@ int arch_update_cpu_topology(void)
 			continue;
 		}
 
-		/* Use associativity from first thread for all siblings */
-		vphn_get_associativity(cpu, associativity);
-		new_nid = associativity_to_nid(associativity);
-		if (new_nid < 0 || !node_online(new_nid))
-			new_nid = first_online_node;
+		new_nid = find_and_online_cpu_nid(cpu);
 
 		if (new_nid == numa_cpu_lookup_table[cpu]) {
 			cpumask_andnot(&cpu_associativity_changes_mask,

From cc1b8334764144cb170a19cebc9034f7b98ec2c5 Mon Sep 17 00:00:00 2001
From: Leon Romanovsky <leonro@mellanox.com>
Date: Sun, 28 Jan 2018 11:25:30 +0200
Subject: [PATCH 0246/1852] RDMA/mlx5: Avoid memory leak in case of XRCD
 dealloc failure

[ Upstream commit b081808a66345ba725b77ecd8d759bee874cd937 ]

Failure in XRCD FW deallocation command leaves memory leaked and
returns error to the user which he can't do anything about it.

This patch changes behavior to always free memory and always return
success to the user.

Fixes: e126ba97dba9 ("mlx5: Add driver for Mellanox Connect-IB adapters")
Reviewed-by: Majd Dibbiny <majd@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/mlx5/qp.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index c5390f6f94c54..43d277a931c2a 100644
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -3161,12 +3161,9 @@ int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
 	int err;
 
 	err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn);
-	if (err) {
+	if (err)
 		mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn);
-		return err;
-	}
 
 	kfree(xrcd);
-
 	return 0;
 }

From 9e6b65d743b90cdd84c326a4ab3917e28fb16ba5 Mon Sep 17 00:00:00 2001
From: Logan Gunthorpe <logang@deltatee.com>
Date: Mon, 18 Dec 2017 11:25:05 -0700
Subject: [PATCH 0247/1852] ntb_transport: Fix bug with max_mw_size parameter

[ Upstream commit cbd27448faff4843ac4b66cc71445a10623ff48d ]

When using the max_mw_size parameter of ntb_transport to limit the size of
the Memory windows, communication cannot be established and the queues
freeze.

This is because the mw_size that's reported to the peer is correctly
limited but the size used locally is not. So the MW is initialized
with a buffer smaller than the window but the TX side is using the
full window. This means the TX side will be writing to a region of the
window that points nowhere.

This is easily fixed by applying the same limit to tx_size in
ntb_transport_init_queue().

Fixes: e26a5843f7f5 ("NTB: Split ntb_hw_intel and ntb_transport drivers")
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ntb/ntb_transport.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index 3bbdf60f8908a..49f3fba75f4d3 100644
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -955,6 +955,9 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
 	mw_base = nt->mw_vec[mw_num].phys_addr;
 	mw_size = nt->mw_vec[mw_num].phys_size;
 
+	if (max_mw_size && mw_size > max_mw_size)
+		mw_size = max_mw_size;
+
 	tx_size = (unsigned int)mw_size / num_qps_mw;
 	qp_offset = tx_size * (qp_num / mw_count);
 

From 5b3ae392a67a943bcf3b6f8ea548db1c452a5168 Mon Sep 17 00:00:00 2001
From: piaojun <piaojun@huawei.com>
Date: Wed, 31 Jan 2018 16:14:44 -0800
Subject: [PATCH 0248/1852] ocfs2: return -EROFS to mount.ocfs2 if inode block
 is invalid

[ Upstream commit 025bcbde3634b2c9b316f227fed13ad6ad6817fb ]

If metadata is corrupted such as 'invalid inode block', we will get
failed by calling 'mount()' and then set filesystem readonly as below:

  ocfs2_mount
    ocfs2_initialize_super
      ocfs2_init_global_system_inodes
        ocfs2_iget
          ocfs2_read_locked_inode
            ocfs2_validate_inode_block
	      ocfs2_error
	        ocfs2_handle_error
	          ocfs2_set_ro_flag(osb, 0);  // set readonly

In this situation we need return -EROFS to 'mount.ocfs2', so that user
can fix it by fsck.  And then mount again.  In addition, 'mount.ocfs2'
should be updated correspondingly as it only return 1 for all errno.
And I will post a patch for 'mount.ocfs2' too.

Link: http://lkml.kernel.org/r/5A4302FA.2010606@huawei.com
Signed-off-by: Jun Piao <piaojun@huawei.com>
Reviewed-by: Alex Chen <alex.chen@huawei.com>
Reviewed-by: Joseph Qi <jiangqi903@gmail.com>
Reviewed-by: Changwei Ge <ge.changwei@h3c.com>
Reviewed-by: Gang He <ghe@suse.com>
Cc: Mark Fasheh <mfasheh@versity.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Junxiao Bi <junxiao.bi@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ocfs2/super.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/fs/ocfs2/super.c b/fs/ocfs2/super.c
index 2de4c8a9340c2..4f5141350af86 100644
--- a/fs/ocfs2/super.c
+++ b/fs/ocfs2/super.c
@@ -477,9 +477,8 @@ static int ocfs2_init_global_system_inodes(struct ocfs2_super *osb)
 		new = ocfs2_get_system_file_inode(osb, i, osb->slot_num);
 		if (!new) {
 			ocfs2_release_system_inodes(osb);
-			status = -EINVAL;
+			status = ocfs2_is_soft_readonly(osb) ? -EROFS : -EINVAL;
 			mlog_errno(status);
-			/* FIXME: Should ERROR_RO_FS */
 			mlog(ML_ERROR, "Unable to load system inode %d, "
 			     "possibly corrupt fs?", i);
 			goto bail;
@@ -508,7 +507,7 @@ static int ocfs2_init_local_system_inodes(struct ocfs2_super *osb)
 		new = ocfs2_get_system_file_inode(osb, i, osb->slot_num);
 		if (!new) {
 			ocfs2_release_system_inodes(osb);
-			status = -EINVAL;
+			status = ocfs2_is_soft_readonly(osb) ? -EROFS : -EINVAL;
 			mlog(ML_ERROR, "status=%d, sysfile=%d, slot=%d\n",
 			     status, i, osb->slot_num);
 			goto bail;

From be46b6bacb91536d770eeb25ed695cc995ee2657 Mon Sep 17 00:00:00 2001
From: piaojun <piaojun@huawei.com>
Date: Wed, 31 Jan 2018 16:14:59 -0800
Subject: [PATCH 0249/1852] ocfs2/acl: use 'ip_xattr_sem' to protect getting
 extended attribute

[ Upstream commit 16c8d569f5704a84164f30ff01b29879f3438065 ]

The race between *set_acl and *get_acl will cause getting incomplete
xattr data as below:

  processA                                    processB

  ocfs2_set_acl
    ocfs2_xattr_set
      __ocfs2_xattr_set_handle

                                              ocfs2_get_acl_nolock
                                                ocfs2_xattr_get_nolock:

processB may get incomplete xattr data if processA hasn't set_acl done.

So we should use 'ip_xattr_sem' to protect getting extended attribute in
ocfs2_get_acl_nolock(), as other processes could be changing it
concurrently.

Link: http://lkml.kernel.org/r/5A5DDCFF.7030001@huawei.com
Signed-off-by: Jun Piao <piaojun@huawei.com>
Reviewed-by: Alex Chen <alex.chen@huawei.com>
Cc: Mark Fasheh <mfasheh@versity.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Junxiao Bi <junxiao.bi@oracle.com>
Cc: Joseph Qi <jiangqi903@gmail.com>
Cc: Changwei Ge <ge.changwei@h3c.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ocfs2/acl.c   | 6 ++++++
 fs/ocfs2/xattr.c | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/fs/ocfs2/acl.c b/fs/ocfs2/acl.c
index 164307b994052..1e0d8da0d3cd6 100644
--- a/fs/ocfs2/acl.c
+++ b/fs/ocfs2/acl.c
@@ -314,7 +314,9 @@ struct posix_acl *ocfs2_iop_get_acl(struct inode *inode, int type)
 		return ERR_PTR(ret);
 	}
 
+	down_read(&OCFS2_I(inode)->ip_xattr_sem);
 	acl = ocfs2_get_acl_nolock(inode, type, di_bh);
+	up_read(&OCFS2_I(inode)->ip_xattr_sem);
 
 	ocfs2_inode_unlock(inode, 0);
 	brelse(di_bh);
@@ -333,7 +335,9 @@ int ocfs2_acl_chmod(struct inode *inode, struct buffer_head *bh)
 	if (!(osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL))
 		return 0;
 
+	down_read(&OCFS2_I(inode)->ip_xattr_sem);
 	acl = ocfs2_get_acl_nolock(inode, ACL_TYPE_ACCESS, bh);
+	up_read(&OCFS2_I(inode)->ip_xattr_sem);
 	if (IS_ERR(acl) || !acl)
 		return PTR_ERR(acl);
 	ret = __posix_acl_chmod(&acl, GFP_KERNEL, inode->i_mode);
@@ -364,8 +368,10 @@ int ocfs2_init_acl(handle_t *handle,
 
 	if (!S_ISLNK(inode->i_mode)) {
 		if (osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) {
+			down_read(&OCFS2_I(dir)->ip_xattr_sem);
 			acl = ocfs2_get_acl_nolock(dir, ACL_TYPE_DEFAULT,
 						   dir_bh);
+			up_read(&OCFS2_I(dir)->ip_xattr_sem);
 			if (IS_ERR(acl))
 				return PTR_ERR(acl);
 		}
diff --git a/fs/ocfs2/xattr.c b/fs/ocfs2/xattr.c
index 877830b05e127..4f0788232f2f9 100644
--- a/fs/ocfs2/xattr.c
+++ b/fs/ocfs2/xattr.c
@@ -639,9 +639,11 @@ int ocfs2_calc_xattr_init(struct inode *dir,
 						     si->value_len);
 
 	if (osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) {
+		down_read(&OCFS2_I(dir)->ip_xattr_sem);
 		acl_len = ocfs2_xattr_get_nolock(dir, dir_bh,
 					OCFS2_XATTR_INDEX_POSIX_ACL_DEFAULT,
 					"", NULL, 0);
+		up_read(&OCFS2_I(dir)->ip_xattr_sem);
 		if (acl_len > 0) {
 			a_size = ocfs2_xattr_entry_real_size(0, acl_len);
 			if (S_ISDIR(mode))

From 77e534814105ac4e0c5bf0bf03d58d84006f68b0 Mon Sep 17 00:00:00 2001
From: piaojun <piaojun@huawei.com>
Date: Wed, 31 Jan 2018 16:15:32 -0800
Subject: [PATCH 0250/1852] ocfs2: return error when we attempt to access a
 dirty bh in jbd2

[ Upstream commit d984187e3a1ad7d12447a7ab2c43ce3717a2b5b3 ]

We should not reuse the dirty bh in jbd2 directly due to the following
situation:

1. When removing extent rec, we will dirty the bhs of extent rec and
   truncate log at the same time, and hand them over to jbd2.

2. The bhs are submitted to jbd2 area successfully.

3. The write-back thread of device help flush the bhs to disk but
   encounter write error due to abnormal storage link.

4. After a while the storage link become normal. Truncate log flush
   worker triggered by the next space reclaiming found the dirty bh of
   truncate log and clear its 'BH_Write_EIO' and then set it uptodate in
   __ocfs2_journal_access():

   ocfs2_truncate_log_worker
     ocfs2_flush_truncate_log
       __ocfs2_flush_truncate_log
         ocfs2_replay_truncate_records
           ocfs2_journal_access_di
             __ocfs2_journal_access // here we clear io_error and set 'tl_bh' uptodata.

5. Then jbd2 will flush the bh of truncate log to disk, but the bh of
   extent rec is still in error state, and unfortunately nobody will
   take care of it.

6. At last the space of extent rec was not reduced, but truncate log
   flush worker have given it back to globalalloc. That will cause
   duplicate cluster problem which could be identified by fsck.ocfs2.

Sadly we can hardly revert this but set fs read-only in case of ruining
atomicity and consistency of space reclaim.

Link: http://lkml.kernel.org/r/5A6E8092.8090701@huawei.com
Fixes: acf8fdbe6afb ("ocfs2: do not BUG if buffer not uptodate in __ocfs2_journal_access")
Signed-off-by: Jun Piao <piaojun@huawei.com>
Reviewed-by: Yiwen Jiang <jiangyiwen@huawei.com>
Reviewed-by: Changwei Ge <ge.changwei@h3c.com>
Cc: Mark Fasheh <mfasheh@versity.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Junxiao Bi <junxiao.bi@oracle.com>
Cc: Joseph Qi <jiangqi903@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ocfs2/journal.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/fs/ocfs2/journal.c b/fs/ocfs2/journal.c
index 13534f4fe5b51..722eb5bc9b8f0 100644
--- a/fs/ocfs2/journal.c
+++ b/fs/ocfs2/journal.c
@@ -666,23 +666,24 @@ static int __ocfs2_journal_access(handle_t *handle,
 	/* we can safely remove this assertion after testing. */
 	if (!buffer_uptodate(bh)) {
 		mlog(ML_ERROR, "giving me a buffer that's not uptodate!\n");
-		mlog(ML_ERROR, "b_blocknr=%llu\n",
-		     (unsigned long long)bh->b_blocknr);
+		mlog(ML_ERROR, "b_blocknr=%llu, b_state=0x%lx\n",
+		     (unsigned long long)bh->b_blocknr, bh->b_state);
 
 		lock_buffer(bh);
 		/*
-		 * A previous attempt to write this buffer head failed.
-		 * Nothing we can do but to retry the write and hope for
-		 * the best.
+		 * A previous transaction with a couple of buffer heads fail
+		 * to checkpoint, so all the bhs are marked as BH_Write_EIO.
+		 * For current transaction, the bh is just among those error
+		 * bhs which previous transaction handle. We can't just clear
+		 * its BH_Write_EIO and reuse directly, since other bhs are
+		 * not written to disk yet and that will cause metadata
+		 * inconsistency. So we should set fs read-only to avoid
+		 * further damage.
 		 */
 		if (buffer_write_io_error(bh) && !buffer_uptodate(bh)) {
-			clear_buffer_write_io_error(bh);
-			set_buffer_uptodate(bh);
-		}
-
-		if (!buffer_uptodate(bh)) {
 			unlock_buffer(bh);
-			return -EIO;
+			return ocfs2_error(osb->sb, "A previous attempt to "
+					"write this buffer head failed\n");
 		}
 		unlock_buffer(bh);
 	}

From b5a3ae1ddd1180f608e7d1a1e9d345f9e2f38668 Mon Sep 17 00:00:00 2001
From: Yisheng Xie <xieyisheng1@huawei.com>
Date: Wed, 31 Jan 2018 16:16:11 -0800
Subject: [PATCH 0251/1852] mm/mempolicy: fix the check of nodemask from user

[ Upstream commit 56521e7a02b7b84a5e72691a1fb15570e6055545 ]

As Xiaojun reported the ltp of migrate_pages01 will fail on arm64 system
which has 4 nodes[0...3], all have memory and CONFIG_NODES_SHIFT=2:

  migrate_pages01    0  TINFO  :  test_invalid_nodes
  migrate_pages01   14  TFAIL  :  migrate_pages_common.c:45: unexpected failure - returned value = 0, expected: -1
  migrate_pages01   15  TFAIL  :  migrate_pages_common.c:55: call succeeded unexpectedly

In this case the test_invalid_nodes of migrate_pages01 will call:
SYSC_migrate_pages as:

  migrate_pages(0, , {0x0000000000000001}, 64, , {0x0000000000000010}, 64) = 0

The new nodes specifies one or more node IDs that are greater than the
maximum supported node ID, however, the errno is not set to EINVAL as
expected.

As man pages of set_mempolicy[1], mbind[2], and migrate_pages[3]
mentioned, when nodemask specifies one or more node IDs that are greater
than the maximum supported node ID, the errno should set to EINVAL.
However, get_nodes only check whether the part of bits
[BITS_PER_LONG*BITS_TO_LONGS(MAX_NUMNODES), maxnode) is zero or not, and
remain [MAX_NUMNODES, BITS_PER_LONG*BITS_TO_LONGS(MAX_NUMNODES)
unchecked.

This patch is to check the bits of [MAX_NUMNODES, maxnode) in get_nodes
to let migrate_pages set the errno to EINVAL when nodemask specifies one
or more node IDs that are greater than the maximum supported node ID,
which follows the manpage's guide.

[1] http://man7.org/linux/man-pages/man2/set_mempolicy.2.html
[2] http://man7.org/linux/man-pages/man2/mbind.2.html
[3] http://man7.org/linux/man-pages/man2/migrate_pages.2.html

Link: http://lkml.kernel.org/r/1510882624-44342-3-git-send-email-xieyisheng1@huawei.com
Signed-off-by: Yisheng Xie <xieyisheng1@huawei.com>
Reported-by: Tan Xiaojun <tanxiaojun@huawei.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Chris Salls <salls@cs.ucsb.edu>
Cc: Christopher Lameter <cl@linux.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/mempolicy.c | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index 62e4af5b287fb..70a5cc835793e 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -1233,6 +1233,7 @@ static int get_nodes(nodemask_t *nodes, const unsigned long __user *nmask,
 		     unsigned long maxnode)
 {
 	unsigned long k;
+	unsigned long t;
 	unsigned long nlongs;
 	unsigned long endmask;
 
@@ -1249,13 +1250,19 @@ static int get_nodes(nodemask_t *nodes, const unsigned long __user *nmask,
 	else
 		endmask = (1UL << (maxnode % BITS_PER_LONG)) - 1;
 
-	/* When the user specified more nodes than supported just check
-	   if the non supported part is all zero. */
+	/*
+	 * When the user specified more nodes than supported just check
+	 * if the non supported part is all zero.
+	 *
+	 * If maxnode have more longs than MAX_NUMNODES, check
+	 * the bits in that area first. And then go through to
+	 * check the rest bits which equal or bigger than MAX_NUMNODES.
+	 * Otherwise, just check bits [MAX_NUMNODES, maxnode).
+	 */
 	if (nlongs > BITS_TO_LONGS(MAX_NUMNODES)) {
 		if (nlongs > PAGE_SIZE/sizeof(long))
 			return -EINVAL;
 		for (k = BITS_TO_LONGS(MAX_NUMNODES); k < nlongs; k++) {
-			unsigned long t;
 			if (get_user(t, nmask + k))
 				return -EFAULT;
 			if (k == nlongs - 1) {
@@ -1268,6 +1275,16 @@ static int get_nodes(nodemask_t *nodes, const unsigned long __user *nmask,
 		endmask = ~0UL;
 	}
 
+	if (maxnode > MAX_NUMNODES && MAX_NUMNODES % BITS_PER_LONG != 0) {
+		unsigned long valid_mask = endmask;
+
+		valid_mask &= ~((1UL << (MAX_NUMNODES % BITS_PER_LONG)) - 1);
+		if (get_user(t, nmask + nlongs - 1))
+			return -EFAULT;
+		if (t & valid_mask)
+			return -EINVAL;
+	}
+
 	if (copy_from_user(nodes_addr(*nodes), nmask, nlongs*sizeof(unsigned long)))
 		return -EFAULT;
 	nodes_addr(*nodes)[nlongs-1] &= endmask;

From b8820966a6c7a40c63c19c39f3af989187c436ff Mon Sep 17 00:00:00 2001
From: Yisheng Xie <xieyisheng1@huawei.com>
Date: Wed, 31 Jan 2018 16:16:15 -0800
Subject: [PATCH 0252/1852] mm/mempolicy: add nodes_empty check in
 SYSC_migrate_pages

[ Upstream commit 0486a38bcc4749808edbc848f1bcf232042770fc ]

As in manpage of migrate_pages, the errno should be set to EINVAL when
none of the node IDs specified by new_nodes are on-line and allowed by
the process's current cpuset context, or none of the specified nodes
contain memory.  However, when test by following case:

	new_nodes = 0;
	old_nodes = 0xf;
	ret = migrate_pages(pid, old_nodes, new_nodes, MAX);

The ret will be 0 and no errno is set.  As the new_nodes is empty, we
should expect EINVAL as documented.

To fix the case like above, this patch check whether target nodes AND
current task_nodes is empty, and then check whether AND
node_states[N_MEMORY] is empty.

Link: http://lkml.kernel.org/r/1510882624-44342-4-git-send-email-xieyisheng1@huawei.com
Signed-off-by: Yisheng Xie <xieyisheng1@huawei.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Chris Salls <salls@cs.ucsb.edu>
Cc: Christopher Lameter <cl@linux.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Cc: Tan Xiaojun <tanxiaojun@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/mempolicy.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index 70a5cc835793e..d4f68070f35c3 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -1411,10 +1411,14 @@ SYSCALL_DEFINE4(migrate_pages, pid_t, pid, unsigned long, maxnode,
 		goto out_put;
 	}
 
-	if (!nodes_subset(*new, node_states[N_MEMORY])) {
-		err = -EINVAL;
+	task_nodes = cpuset_mems_allowed(current);
+	nodes_and(*new, *new, task_nodes);
+	if (nodes_empty(*new))
+		goto out_put;
+
+	nodes_and(*new, *new, node_states[N_MEMORY]);
+	if (nodes_empty(*new))
 		goto out_put;
-	}
 
 	err = security_task_movememory(task);
 	if (err)

From 07dfd89b43add71c2590bdf8803a170cd5dd9b83 Mon Sep 17 00:00:00 2001
From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Date: Wed, 31 Jan 2018 16:17:43 -0800
Subject: [PATCH 0253/1852] asm-generic: provide generic_pmdp_establish()

[ Upstream commit c58f0bb77ed8bf93dfdde762b01cb67eebbdfc29 ]

Patch series "Do not lose dirty bit on THP pages", v4.

Vlastimil noted that pmdp_invalidate() is not atomic and we can lose
dirty and access bits if CPU sets them after pmdp dereference, but
before set_pmd_at().

The bug can lead to data loss, but the race window is tiny and I haven't
seen any reports that suggested that it happens in reality.  So I don't
think it worth sending it to stable.

Unfortunately, there's no way to address the issue in a generic way.  We
need to fix all architectures that support THP one-by-one.

All architectures that have THP supported have to provide atomic
pmdp_invalidate() that returns previous value.

If generic implementation of pmdp_invalidate() is used, architecture
needs to provide atomic pmdp_estabish().

pmdp_estabish() is not used out-side generic implementation of
pmdp_invalidate() so far, but I think this can change in the future.

This patch (of 12):

This is an implementation of pmdp_establish() that is only suitable for
an architecture that doesn't have hardware dirty/accessed bits.  In this
case we can't race with CPU which sets these bits and non-atomic
approach is fine.

Link: http://lkml.kernel.org/r/20171213105756.69879-2-kirill.shutemov@linux.intel.com
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: David Daney <david.daney@cavium.com>
Cc: David Miller <davem@davemloft.net>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nitin Gupta <nitin.m.gupta@oracle.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/asm-generic/pgtable.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 4814cf9710482..25b793325b09c 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -237,6 +237,21 @@ extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
 #endif
 
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+/*
+ * This is an implementation of pmdp_establish() that is only suitable for an
+ * architecture that doesn't have hardware dirty/accessed bits. In this case we
+ * can't race with CPU which sets these bits and non-atomic aproach is fine.
+ */
+static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
+		unsigned long address, pmd_t *pmdp, pmd_t pmd)
+{
+	pmd_t old_pmd = *pmdp;
+	set_pmd_at(vma->vm_mm, address, pmdp, pmd);
+	return old_pmd;
+}
+#endif
+
 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
 			    pmd_t *pmdp);

From 059afd1322e830260a8bdcc24930b5ec3ec3c065 Mon Sep 17 00:00:00 2001
From: Mel Gorman <mgorman@techsingularity.net>
Date: Wed, 31 Jan 2018 16:19:52 -0800
Subject: [PATCH 0254/1852] mm: pin address_space before dereferencing it while
 isolating an LRU page

[ Upstream commit 69d763fc6d3aee787a3e8c8c35092b4f4960fa5d ]

Minchan Kim asked the following question -- what locks protects
address_space destroying when race happens between inode trauncation and
__isolate_lru_page? Jan Kara clarified by describing the race as follows

CPU1                                            CPU2

truncate(inode)                                 __isolate_lru_page()
  ...
  truncate_inode_page(mapping, page);
    delete_from_page_cache(page)
      spin_lock_irqsave(&mapping->tree_lock, flags);
        __delete_from_page_cache(page, NULL)
          page_cache_tree_delete(..)
            ...                                   mapping = page_mapping(page);
            page->mapping = NULL;
            ...
      spin_unlock_irqrestore(&mapping->tree_lock, flags);
      page_cache_free_page(mapping, page)
        put_page(page)
          if (put_page_testzero(page)) -> false
- inode now has no pages and can be freed including embedded address_space

                                                  if (mapping && !mapping->a_ops->migratepage)
- we've dereferenced mapping which is potentially already free.

The race is theoretically possible but unlikely.  Before the
delete_from_page_cache, truncate_cleanup_page is called so the page is
likely to be !PageDirty or PageWriteback which gets skipped by the only
caller that checks the mappping in __isolate_lru_page.  Even if the race
occurs, a substantial amount of work has to happen during a tiny window
with no preemption but it could potentially be done using a virtual
machine to artifically slow one CPU or halt it during the critical
window.

This patch should eliminate the race with truncation by try-locking the
page before derefencing mapping and aborting if the lock was not
acquired.  There was a suggestion from Huang Ying to use RCU as a
side-effect to prevent mapping being freed.  However, I do not like the
solution as it's an unconventional means of preserving a mapping and
it's not a context where rcu_read_lock is obviously protecting rcu data.

Link: http://lkml.kernel.org/r/20180104102512.2qos3h5vqzeisrek@techsingularity.net
Fixes: c82449352854 ("mm: compaction: make isolate_lru_page() filter-aware again")
Signed-off-by: Mel Gorman <mgorman@techsingularity.net>
Acked-by: Minchan Kim <minchan@kernel.org>
Cc: "Huang, Ying" <ying.huang@intel.com>
Cc: Jan Kara <jack@suse.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/vmscan.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/mm/vmscan.c b/mm/vmscan.c
index 12a69e6c10ba8..534ff623719d6 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -1312,6 +1312,7 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode)
 
 		if (PageDirty(page)) {
 			struct address_space *mapping;
+			bool migrate_dirty;
 
 			/* ISOLATE_CLEAN means only clean pages */
 			if (mode & ISOLATE_CLEAN)
@@ -1320,10 +1321,19 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode)
 			/*
 			 * Only pages without mappings or that have a
 			 * ->migratepage callback are possible to migrate
-			 * without blocking
+			 * without blocking. However, we can be racing with
+			 * truncation so it's necessary to lock the page
+			 * to stabilise the mapping as truncation holds
+			 * the page lock until after the page is removed
+			 * from the page cache.
 			 */
+			if (!trylock_page(page))
+				return ret;
+
 			mapping = page_mapping(page);
-			if (mapping && !mapping->a_ops->migratepage)
+			migrate_dirty = mapping && mapping->a_ops->migratepage;
+			unlock_page(page);
+			if (!migrate_dirty)
 				return ret;
 		}
 	}

From f4598f9fb7c7f083aaee94f1813aa9fa0371b4aa Mon Sep 17 00:00:00 2001
From: Alex Estrin <alex.estrin@intel.com>
Date: Thu, 1 Feb 2018 10:55:41 -0800
Subject: [PATCH 0255/1852] IB/ipoib: Fix for potential no-carrier state

[ Upstream commit 1029361084d18cc270f64dfd39529fafa10cfe01 ]

On reboot SM can program port pkey table before ipoib registered its
event handler, which could result in missing pkey event and leave root
interface with initial pkey value from index 0.

Since OPA port starts with invalid pkey in index 0, root interface will
fail to initialize and stay down with no-carrier flag.

For IB ipoib interface may end up with pkey different from value
opensm put in pkey table idx 0, resulting in connectivity issues
(different mcast groups, for example).

Close the window by calling event handler after registration
to make sure ipoib pkey is in sync with port pkey table.

Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Alex Estrin <alex.estrin@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/ulp/ipoib/ipoib_main.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 37b42447045d0..fcb18b11db75c 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -1953,6 +1953,9 @@ static struct net_device *ipoib_add_port(const char *format,
 		goto event_failed;
 	}
 
+	/* call event handler to ensure pkey in sync */
+	queue_work(ipoib_workqueue, &priv->flush_heavy);
+
 	result = register_netdev(priv->dev);
 	if (result) {
 		printk(KERN_WARNING "%s: couldn't register ipoib port %d; error %d\n",

From 3bb1395eeebb923d55fa6f946e360052b8a412d7 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Fri, 2 Feb 2018 15:56:18 +0100
Subject: [PATCH 0256/1852] x86/power: Fix swsusp_arch_resume prototype

[ Upstream commit 328008a72d38b5bde6491e463405c34a81a65d3e ]

The declaration for swsusp_arch_resume marks it as 'asmlinkage', but the
definition in x86-32 does not, and it fails to include the header with the
declaration. This leads to a warning when building with
link-time-optimizations:

kernel/power/power.h:108:23: error: type of 'swsusp_arch_resume' does not match original declaration [-Werror=lto-type-mismatch]
 extern asmlinkage int swsusp_arch_resume(void);
                       ^
arch/x86/power/hibernate_32.c:148:0: note: 'swsusp_arch_resume' was previously declared here
 int swsusp_arch_resume(void)

This moves the declaration into a globally visible header file and fixes up
both x86 definitions to match it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Len Brown <len.brown@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Nicolas Pitre <nico@linaro.org>
Cc: linux-pm@vger.kernel.org
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Bart Van Assche <bart.vanassche@wdc.com>
Link: https://lkml.kernel.org/r/20180202145634.200291-2-arnd@arndb.de
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/power/hibernate_32.c | 2 +-
 arch/x86/power/hibernate_64.c | 2 +-
 include/linux/suspend.h       | 2 ++
 kernel/power/power.h          | 3 ---
 4 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/x86/power/hibernate_32.c b/arch/x86/power/hibernate_32.c
index 291226b952a99..77ac4e4deb168 100644
--- a/arch/x86/power/hibernate_32.c
+++ b/arch/x86/power/hibernate_32.c
@@ -142,7 +142,7 @@ static inline void resume_init_first_level_page_table(pgd_t *pg_dir)
 #endif
 }
 
-int swsusp_arch_resume(void)
+asmlinkage int swsusp_arch_resume(void)
 {
 	int error;
 
diff --git a/arch/x86/power/hibernate_64.c b/arch/x86/power/hibernate_64.c
index 009947d419a61..0e0c773edffc2 100644
--- a/arch/x86/power/hibernate_64.c
+++ b/arch/x86/power/hibernate_64.c
@@ -78,7 +78,7 @@ static int set_up_temporary_mappings(void)
 	return 0;
 }
 
-int swsusp_arch_resume(void)
+asmlinkage int swsusp_arch_resume(void)
 {
 	int error;
 
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index c59803dc68de7..be1ab158ad1a6 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -377,6 +377,8 @@ extern int swsusp_page_is_forbidden(struct page *);
 extern void swsusp_set_page_free(struct page *);
 extern void swsusp_unset_page_free(struct page *);
 extern unsigned long get_safe_page(gfp_t gfp_mask);
+extern asmlinkage int swsusp_arch_suspend(void);
+extern asmlinkage int swsusp_arch_resume(void);
 
 extern void hibernation_set_ops(const struct platform_hibernation_ops *ops);
 extern int hibernate(void);
diff --git a/kernel/power/power.h b/kernel/power/power.h
index 51f02ecaf1255..2610516601ee7 100644
--- a/kernel/power/power.h
+++ b/kernel/power/power.h
@@ -94,9 +94,6 @@ extern int in_suspend;
 extern dev_t swsusp_resume_device;
 extern sector_t swsusp_resume_block;
 
-extern asmlinkage int swsusp_arch_suspend(void);
-extern asmlinkage int swsusp_arch_resume(void);
-
 extern int create_basic_memory_bitmaps(void);
 extern void free_basic_memory_bitmaps(void);
 extern int hibernate_preallocate_memory(void);

From 781271fe634ae75219d33e775d1814cf1fbd89ec Mon Sep 17 00:00:00 2001
From: Jean Delvare <jdelvare@suse.de>
Date: Sat, 3 Feb 2018 11:25:20 +0100
Subject: [PATCH 0257/1852] firmware: dmi_scan: Fix handling of empty DMI
 strings

[ Upstream commit a7770ae194569e96a93c48aceb304edded9cc648 ]

The handling of empty DMI strings looks quite broken to me:
* Strings from 1 to 7 spaces are not considered empty.
* True empty DMI strings (string index set to 0) are not considered
  empty, and result in allocating a 0-char string.
* Strings with invalid index also result in allocating a 0-char
  string.
* Strings starting with 8 spaces are all considered empty, even if
  non-space characters follow (sounds like a weird thing to do, but
  I have actually seen occurrences of this in DMI tables before.)
* Strings which are considered empty are reported as 8 spaces,
  instead of being actually empty.

Some of these issues are the result of an off-by-one error in memcmp,
the rest is incorrect by design.

So let's get it square: missing strings and strings made of only
spaces, regardless of their length, should be treated as empty and
no memory should be allocated for them. All other strings are
non-empty and should be allocated.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Fixes: 79da4721117f ("x86: fix DMI out of memory problems")
Cc: Parag Warudkar <parag.warudkar@gmail.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/firmware/dmi_scan.c | 22 +++++++++-------------
 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
index 0e08e665f715f..053a23a7be940 100644
--- a/drivers/firmware/dmi_scan.c
+++ b/drivers/firmware/dmi_scan.c
@@ -18,7 +18,7 @@ EXPORT_SYMBOL_GPL(dmi_kobj);
  * of and an antecedent to, SMBIOS, which stands for System
  * Management BIOS.  See further: http://www.dmtf.org/standards
  */
-static const char dmi_empty_string[] = "        ";
+static const char dmi_empty_string[] = "";
 
 static u32 dmi_ver __initdata;
 static u32 dmi_len;
@@ -44,25 +44,21 @@ static int dmi_memdev_nr;
 static const char * __init dmi_string_nosave(const struct dmi_header *dm, u8 s)
 {
 	const u8 *bp = ((u8 *) dm) + dm->length;
+	const u8 *nsp;
 
 	if (s) {
-		s--;
-		while (s > 0 && *bp) {
+		while (--s > 0 && *bp)
 			bp += strlen(bp) + 1;
-			s--;
-		}
-
-		if (*bp != 0) {
-			size_t len = strlen(bp)+1;
-			size_t cmp_len = len > 8 ? 8 : len;
 
-			if (!memcmp(bp, dmi_empty_string, cmp_len))
-				return dmi_empty_string;
+		/* Strings containing only spaces are considered empty */
+		nsp = bp;
+		while (*nsp == ' ')
+			nsp++;
+		if (*nsp != '\0')
 			return bp;
-		}
 	}
 
-	return "";
+	return dmi_empty_string;
 }
 
 static const char * __init dmi_string(const struct dmi_header *dm, u8 s)

From 6f20fb22c4a62f212a4681f473684074e0bd3062 Mon Sep 17 00:00:00 2001
From: Chen Yu <yu.c.chen@intel.com>
Date: Mon, 29 Jan 2018 10:26:46 +0800
Subject: [PATCH 0258/1852] ACPI: processor_perflib: Do not send _PPC change
 notification if not ready

[ Upstream commit ba1edb9a5125a617d612f98eead14b9b84e75c3a ]

The following warning was triggered after resumed from S3 -
if all the nonboot CPUs were put offline before suspend:

[ 1840.329515] unchecked MSR access error: RDMSR from 0x771 at rIP: 0xffffffff86061e3a (native_read_msr+0xa/0x30)
[ 1840.329516] Call Trace:
[ 1840.329521]  __rdmsr_on_cpu+0x33/0x50
[ 1840.329525]  generic_exec_single+0x81/0xb0
[ 1840.329527]  smp_call_function_single+0xd2/0x100
[ 1840.329530]  ? acpi_ds_result_pop+0xdd/0xf2
[ 1840.329532]  ? acpi_ds_create_operand+0x215/0x23c
[ 1840.329534]  rdmsrl_on_cpu+0x57/0x80
[ 1840.329536]  ? cpumask_next+0x1b/0x20
[ 1840.329538]  ? rdmsrl_on_cpu+0x57/0x80
[ 1840.329541]  intel_pstate_update_perf_limits+0xf3/0x220
[ 1840.329544]  ? notifier_call_chain+0x4a/0x70
[ 1840.329546]  intel_pstate_set_policy+0x4e/0x150
[ 1840.329548]  cpufreq_set_policy+0xcd/0x2f0
[ 1840.329550]  cpufreq_update_policy+0xb2/0x130
[ 1840.329552]  ? cpufreq_update_policy+0x130/0x130
[ 1840.329556]  acpi_processor_ppc_has_changed+0x65/0x80
[ 1840.329558]  acpi_processor_notify+0x80/0x100
[ 1840.329561]  acpi_ev_notify_dispatch+0x44/0x5c
[ 1840.329563]  acpi_os_execute_deferred+0x14/0x20
[ 1840.329565]  process_one_work+0x193/0x3c0
[ 1840.329567]  worker_thread+0x35/0x3b0
[ 1840.329569]  kthread+0x125/0x140
[ 1840.329571]  ? process_one_work+0x3c0/0x3c0
[ 1840.329572]  ? kthread_park+0x60/0x60
[ 1840.329575]  ? do_syscall_64+0x67/0x180
[ 1840.329577]  ret_from_fork+0x25/0x30
[ 1840.329585] unchecked MSR access error: WRMSR to 0x774 (tried to write 0x0000000000000000) at rIP: 0xffffffff86061f78 (native_write_msr+0x8/0x30)
[ 1840.329586] Call Trace:
[ 1840.329587]  __wrmsr_on_cpu+0x37/0x40
[ 1840.329589]  generic_exec_single+0x81/0xb0
[ 1840.329592]  smp_call_function_single+0xd2/0x100
[ 1840.329594]  ? acpi_ds_create_operand+0x215/0x23c
[ 1840.329595]  ? cpumask_next+0x1b/0x20
[ 1840.329597]  wrmsrl_on_cpu+0x57/0x70
[ 1840.329598]  ? rdmsrl_on_cpu+0x57/0x80
[ 1840.329599]  ? wrmsrl_on_cpu+0x57/0x70
[ 1840.329602]  intel_pstate_hwp_set+0xd3/0x150
[ 1840.329604]  intel_pstate_set_policy+0x119/0x150
[ 1840.329606]  cpufreq_set_policy+0xcd/0x2f0
[ 1840.329607]  cpufreq_update_policy+0xb2/0x130
[ 1840.329610]  ? cpufreq_update_policy+0x130/0x130
[ 1840.329613]  acpi_processor_ppc_has_changed+0x65/0x80
[ 1840.329615]  acpi_processor_notify+0x80/0x100
[ 1840.329617]  acpi_ev_notify_dispatch+0x44/0x5c
[ 1840.329619]  acpi_os_execute_deferred+0x14/0x20
[ 1840.329620]  process_one_work+0x193/0x3c0
[ 1840.329622]  worker_thread+0x35/0x3b0
[ 1840.329624]  kthread+0x125/0x140
[ 1840.329625]  ? process_one_work+0x3c0/0x3c0
[ 1840.329626]  ? kthread_park+0x60/0x60
[ 1840.329628]  ? do_syscall_64+0x67/0x180
[ 1840.329631]  ret_from_fork+0x25/0x30

This is because if there's only one online CPU, the MSR_PM_ENABLE
(package wide)can not be enabled after resumed, due to
intel_pstate_hwp_enable() will only be invoked on AP's online
process after resumed - if there's no AP online, the HWP remains
disabled after resumed (BIOS has disabled it in S3). Then if
there comes a _PPC change notification which touches HWP register
during this stage, the warning is triggered.

Since we don't call acpi_processor_register_performance() when
HWP is enabled, the pr->performance will be NULL. When this is
NULL we don't need to do _PPC change notification.

Reported-by: Doug Smythies <dsmythies@telus.net>
Suggested-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Yu Chen <yu.c.chen@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/processor_perflib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index bb01dea39fdcc..9825780a1cd25 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -161,7 +161,7 @@ int acpi_processor_ppc_has_changed(struct acpi_processor *pr, int event_flag)
 {
 	int ret;
 
-	if (ignore_ppc) {
+	if (ignore_ppc || !pr->performance) {
 		/*
 		 * Only when it is notification event, the _OST object
 		 * will be evaluated. Otherwise it is skipped.

From e6dc162efacf15a0e29e0d71310604a7feddf74c Mon Sep 17 00:00:00 2001
From: Yonghong Song <yhs@fb.com>
Date: Fri, 2 Feb 2018 22:37:15 -0800
Subject: [PATCH 0259/1852] bpf: fix selftests/bpf test_kmod.sh failure when
 CONFIG_BPF_JIT_ALWAYS_ON=y

[ Upstream commit 09584b406742413ac4c8d7e030374d4daa045b69 ]

With CONFIG_BPF_JIT_ALWAYS_ON is defined in the config file,
tools/testing/selftests/bpf/test_kmod.sh failed like below:
  [root@localhost bpf]# ./test_kmod.sh
  sysctl: setting key "net.core.bpf_jit_enable": Invalid argument
  [ JIT enabled:0 hardened:0 ]
  [  132.175681] test_bpf: #297 BPF_MAXINSNS: Jump, gap, jump, ... FAIL to prog_create err=-524 len=4096
  [  132.458834] test_bpf: Summary: 348 PASSED, 1 FAILED, [340/340 JIT'ed]
  [ JIT enabled:1 hardened:0 ]
  [  133.456025] test_bpf: #297 BPF_MAXINSNS: Jump, gap, jump, ... FAIL to prog_create err=-524 len=4096
  [  133.730935] test_bpf: Summary: 348 PASSED, 1 FAILED, [340/340 JIT'ed]
  [ JIT enabled:1 hardened:1 ]
  [  134.769730] test_bpf: #297 BPF_MAXINSNS: Jump, gap, jump, ... FAIL to prog_create err=-524 len=4096
  [  135.050864] test_bpf: Summary: 348 PASSED, 1 FAILED, [340/340 JIT'ed]
  [ JIT enabled:1 hardened:2 ]
  [  136.442882] test_bpf: #297 BPF_MAXINSNS: Jump, gap, jump, ... FAIL to prog_create err=-524 len=4096
  [  136.821810] test_bpf: Summary: 348 PASSED, 1 FAILED, [340/340 JIT'ed]
  [root@localhost bpf]#

The test_kmod.sh load/remove test_bpf.ko multiple times with different
settings for sysctl net.core.bpf_jit_{enable,harden}. The failed test #297
of test_bpf.ko is designed such that JIT always fails.

Commit 290af86629b2 (bpf: introduce BPF_JIT_ALWAYS_ON config)
introduced the following tightening logic:
    ...
        if (!bpf_prog_is_dev_bound(fp->aux)) {
                fp = bpf_int_jit_compile(fp);
    #ifdef CONFIG_BPF_JIT_ALWAYS_ON
                if (!fp->jited) {
                        *err = -ENOTSUPP;
                        return fp;
                }
    #endif
    ...
With this logic, Test #297 always gets return value -ENOTSUPP
when CONFIG_BPF_JIT_ALWAYS_ON is defined, causing the test failure.

This patch fixed the failure by marking Test #297 as expected failure
when CONFIG_BPF_JIT_ALWAYS_ON is defined.

Fixes: 290af86629b2 (bpf: introduce BPF_JIT_ALWAYS_ON config)
Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 lib/test_bpf.c | 31 ++++++++++++++++++++++++++-----
 1 file changed, 26 insertions(+), 5 deletions(-)

diff --git a/lib/test_bpf.c b/lib/test_bpf.c
index b7908d949a5f3..b1495f586f295 100644
--- a/lib/test_bpf.c
+++ b/lib/test_bpf.c
@@ -83,6 +83,7 @@ struct bpf_test {
 		__u32 result;
 	} test[MAX_SUBTESTS];
 	int (*fill_helper)(struct bpf_test *self);
+	int expected_errcode; /* used when FLAG_EXPECTED_FAIL is set in the aux */
 	__u8 frag_data[MAX_DATA];
 };
 
@@ -1780,7 +1781,9 @@ static struct bpf_test tests[] = {
 		},
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
-		{ }
+		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{
 		"check: div_k_0",
@@ -1790,7 +1793,9 @@ static struct bpf_test tests[] = {
 		},
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
-		{ }
+		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{
 		"check: unknown insn",
@@ -1801,7 +1806,9 @@ static struct bpf_test tests[] = {
 		},
 		CLASSIC | FLAG_EXPECTED_FAIL,
 		{ },
-		{ }
+		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{
 		"check: out of range spill/fill",
@@ -1811,7 +1818,9 @@ static struct bpf_test tests[] = {
 		},
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
-		{ }
+		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{
 		"JUMPS + HOLES",
@@ -1903,6 +1912,8 @@ static struct bpf_test tests[] = {
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
 		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{
 		"check: LDX + RET X",
@@ -1913,6 +1924,8 @@ static struct bpf_test tests[] = {
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
 		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{	/* Mainly checking JIT here. */
 		"M[]: alt STX + LDX",
@@ -2087,6 +2100,8 @@ static struct bpf_test tests[] = {
 		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
 		{ },
 		{ },
+		.fill_helper = NULL,
+		.expected_errcode = -EINVAL,
 	},
 	{	/* Passes checker but fails during runtime. */
 		"LD [SKF_AD_OFF-1]",
@@ -4462,6 +4477,7 @@ static struct bpf_test tests[] = {
 		{ },
 		{ },
 		.fill_helper = bpf_fill_maxinsns4,
+		.expected_errcode = -EINVAL,
 	},
 	{	/* Mainly checking JIT here. */
 		"BPF_MAXINSNS: Very long jump",
@@ -4517,10 +4533,15 @@ static struct bpf_test tests[] = {
 	{
 		"BPF_MAXINSNS: Jump, gap, jump, ...",
 		{ },
+#ifdef CONFIG_BPF_JIT_ALWAYS_ON
+		CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL,
+#else
 		CLASSIC | FLAG_NO_DATA,
+#endif
 		{ },
 		{ { 0, 0xababcbac } },
 		.fill_helper = bpf_fill_maxinsns11,
+		.expected_errcode = -ENOTSUPP,
 	},
 	{
 		"BPF_MAXINSNS: ld_abs+get_processor_id",
@@ -5290,7 +5311,7 @@ static struct bpf_prog *generate_filter(int which, int *err)
 
 		*err = bpf_prog_create(&fp, &fprog);
 		if (tests[which].aux & FLAG_EXPECTED_FAIL) {
-			if (*err == -EINVAL) {
+			if (*err == tests[which].expected_errcode) {
 				pr_cont("PASS\n");
 				/* Verifier rejected filter as expected. */
 				*err = 0;

From 047766ab9c07265c81091aace242db3388318b47 Mon Sep 17 00:00:00 2001
From: Matt Redfearn <matt.redfearn@mips.com>
Date: Mon, 29 Jan 2018 11:26:45 +0000
Subject: [PATCH 0260/1852] MIPS: TXx9: use IS_BUILTIN() for CONFIG_LEDS_CLASS

[ Upstream commit 0cde5b44a30f1daaef1c34e08191239dc63271c4 ]

When commit b27311e1cace ("MIPS: TXx9: Add RBTX4939 board support")
added board support for the RBTX4939, it added a call to
led_classdev_register even if the LED class is built as a module.
Built-in arch code cannot call module code directly like this. Commit
b33b44073734 ("MIPS: TXX9: use IS_ENABLED() macro") subsequently
changed the inclusion of this code to a single check that
CONFIG_LEDS_CLASS is either builtin or a module, but the same issue
remains.

This leads to MIPS allmodconfig builds failing when CONFIG_MACH_TX49XX=y
is set:

arch/mips/txx9/rbtx4939/setup.o: In function `rbtx4939_led_probe':
setup.c:(.init.text+0xc0): undefined reference to `of_led_classdev_register'
make: *** [Makefile:999: vmlinux] Error 1

Fix this by using the IS_BUILTIN() macro instead.

Fixes: b27311e1cace ("MIPS: TXx9: Add RBTX4939 board support")
Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18544/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/txx9/rbtx4939/setup.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c
index 37030409745c3..586ca7ea3e7cc 100644
--- a/arch/mips/txx9/rbtx4939/setup.c
+++ b/arch/mips/txx9/rbtx4939/setup.c
@@ -186,7 +186,7 @@ static void __init rbtx4939_update_ioc_pen(void)
 
 #define RBTX4939_MAX_7SEGLEDS	8
 
-#if IS_ENABLED(CONFIG_LEDS_CLASS)
+#if IS_BUILTIN(CONFIG_LEDS_CLASS)
 static u8 led_val[RBTX4939_MAX_7SEGLEDS];
 struct rbtx4939_led_data {
 	struct led_classdev cdev;
@@ -261,7 +261,7 @@ static inline void rbtx4939_led_setup(void)
 
 static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
 {
-#if IS_ENABLED(CONFIG_LEDS_CLASS)
+#if IS_BUILTIN(CONFIG_LEDS_CLASS)
 	unsigned long flags;
 	local_irq_save(flags);
 	/* bit7: reserved for LED class */

From e82cdad1ac4ce6235914eec1c82fbdcb30d83a4e Mon Sep 17 00:00:00 2001
From: Ross Lagerwall <ross.lagerwall@citrix.com>
Date: Thu, 11 Jan 2018 09:36:38 +0000
Subject: [PATCH 0261/1852] xen-netfront: Fix race between device setup and
 open

[ Upstream commit f599c64fdf7d9c108e8717fb04bc41c680120da4 ]

When a netfront device is set up it registers a netdev fairly early on,
before it has set up the queues and is actually usable. A userspace tool
like NetworkManager will immediately try to open it and access its state
as soon as it appears. The bug can be reproduced by hotplugging VIFs
until the VM runs out of grant refs. It registers the netdev but fails
to set up any queues (since there are no more grant refs). In the
meantime, NetworkManager opens the device and the kernel crashes trying
to access the queues (of which there are none).

Fix this in two ways:
* For initial setup, register the netdev much later, after the queues
are setup. This avoids the race entirely.
* During a suspend/resume cycle, the frontend reconnects to the backend
and the queues are recreated. It is possible (though highly unlikely) to
race with something opening the device and accessing the queues after
they have been destroyed but before they have been recreated. Extend the
region covered by the rtnl semaphore to protect against this race. There
is a possibility that we fail to recreate the queues so check for this
in the open function.

Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/xen-netfront.c | 46 ++++++++++++++++++++------------------
 1 file changed, 24 insertions(+), 22 deletions(-)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index fee4c01fbdfd2..a0de2453fa09e 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -342,6 +342,9 @@ static int xennet_open(struct net_device *dev)
 	unsigned int i = 0;
 	struct netfront_queue *queue = NULL;
 
+	if (!np->queues)
+		return -ENODEV;
+
 	for (i = 0; i < num_queues; ++i) {
 		queue = &np->queues[i];
 		napi_enable(&queue->napi);
@@ -1363,18 +1366,8 @@ static int netfront_probe(struct xenbus_device *dev,
 #ifdef CONFIG_SYSFS
 	info->netdev->sysfs_groups[0] = &xennet_dev_group;
 #endif
-	err = register_netdev(info->netdev);
-	if (err) {
-		pr_warn("%s: register_netdev err=%d\n", __func__, err);
-		goto fail;
-	}
 
 	return 0;
-
- fail:
-	xennet_free_netdev(netdev);
-	dev_set_drvdata(&dev->dev, NULL);
-	return err;
 }
 
 static void xennet_end_access(int ref, void *page)
@@ -1743,8 +1736,6 @@ static void xennet_destroy_queues(struct netfront_info *info)
 {
 	unsigned int i;
 
-	rtnl_lock();
-
 	for (i = 0; i < info->netdev->real_num_tx_queues; i++) {
 		struct netfront_queue *queue = &info->queues[i];
 
@@ -1753,8 +1744,6 @@ static void xennet_destroy_queues(struct netfront_info *info)
 		netif_napi_del(&queue->napi);
 	}
 
-	rtnl_unlock();
-
 	kfree(info->queues);
 	info->queues = NULL;
 }
@@ -1770,8 +1759,6 @@ static int xennet_create_queues(struct netfront_info *info,
 	if (!info->queues)
 		return -ENOMEM;
 
-	rtnl_lock();
-
 	for (i = 0; i < *num_queues; i++) {
 		struct netfront_queue *queue = &info->queues[i];
 
@@ -1780,7 +1767,7 @@ static int xennet_create_queues(struct netfront_info *info,
 
 		ret = xennet_init_queue(queue);
 		if (ret < 0) {
-			dev_warn(&info->netdev->dev,
+			dev_warn(&info->xbdev->dev,
 				 "only created %d queues\n", i);
 			*num_queues = i;
 			break;
@@ -1794,10 +1781,8 @@ static int xennet_create_queues(struct netfront_info *info,
 
 	netif_set_real_num_tx_queues(info->netdev, *num_queues);
 
-	rtnl_unlock();
-
 	if (*num_queues == 0) {
-		dev_err(&info->netdev->dev, "no queues\n");
+		dev_err(&info->xbdev->dev, "no queues\n");
 		return -EINVAL;
 	}
 	return 0;
@@ -1839,6 +1824,7 @@ static int talk_to_netback(struct xenbus_device *dev,
 		goto out;
 	}
 
+	rtnl_lock();
 	if (info->queues)
 		xennet_destroy_queues(info);
 
@@ -1849,6 +1835,7 @@ static int talk_to_netback(struct xenbus_device *dev,
 		info->queues = NULL;
 		goto out;
 	}
+	rtnl_unlock();
 
 	/* Create shared ring, alloc event channel -- for each queue */
 	for (i = 0; i < num_queues; ++i) {
@@ -1945,8 +1932,10 @@ static int talk_to_netback(struct xenbus_device *dev,
 	xenbus_transaction_end(xbt, 1);
  destroy_ring:
 	xennet_disconnect_backend(info);
+	rtnl_lock();
 	xennet_destroy_queues(info);
  out:
+	rtnl_unlock();
 	device_unregister(&dev->dev);
 	return err;
 }
@@ -1982,6 +1971,15 @@ static int xennet_connect(struct net_device *dev)
 	netdev_update_features(dev);
 	rtnl_unlock();
 
+	if (dev->reg_state == NETREG_UNINITIALIZED) {
+		err = register_netdev(dev);
+		if (err) {
+			pr_warn("%s: register_netdev err=%d\n", __func__, err);
+			device_unregister(&np->xbdev->dev);
+			return err;
+		}
+	}
+
 	/*
 	 * All public and private state should now be sane.  Get
 	 * ready to start sending and receiving packets and give the driver
@@ -2172,10 +2170,14 @@ static int xennet_remove(struct xenbus_device *dev)
 
 	xennet_disconnect_backend(info);
 
-	unregister_netdev(info->netdev);
+	if (info->netdev->reg_state == NETREG_REGISTERED)
+		unregister_netdev(info->netdev);
 
-	if (info->queues)
+	if (info->queues) {
+		rtnl_lock();
 		xennet_destroy_queues(info);
+		rtnl_unlock();
+	}
 	xennet_free_netdev(info->netdev);
 
 	return 0;

From 23cc663d14837553d4bd8bbcd6397380a161f43d Mon Sep 17 00:00:00 2001
From: Ross Lagerwall <ross.lagerwall@citrix.com>
Date: Thu, 11 Jan 2018 09:36:37 +0000
Subject: [PATCH 0262/1852] xen/grant-table: Use put_page instead of free_page

[ Upstream commit 3ac7292a25db1c607a50752055a18aba32ac2176 ]

The page given to gnttab_end_foreign_access() to free could be a
compound page so use put_page() instead of free_page() since it can
handle both compound and single pages correctly.

This bug was discovered when migrating a Xen VM with several VIFs and
CONFIG_DEBUG_VM enabled. It hits a BUG usually after fewer than 10
iterations. All netfront devices disconnect from the backend during a
suspend/resume and this will call gnttab_end_foreign_access() if a
netfront queue has an outstanding skb. The mismatch between calling
get_page() and free_page() on a compound page causes a reference
counting error which is detected when DEBUG_VM is enabled.

Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/grant-table.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c
index c49f79ed58c53..4b7ce442d8e56 100644
--- a/drivers/xen/grant-table.c
+++ b/drivers/xen/grant-table.c
@@ -328,7 +328,7 @@ static void gnttab_handle_deferred(unsigned long unused)
 			if (entry->page) {
 				pr_debug("freeing g.e. %#x (pfn %#lx)\n",
 					 entry->ref, page_to_pfn(entry->page));
-				__free_page(entry->page);
+				put_page(entry->page);
 			} else
 				pr_info("freeing g.e. %#x\n", entry->ref);
 			kfree(entry);
@@ -384,7 +384,7 @@ void gnttab_end_foreign_access(grant_ref_t ref, int readonly,
 	if (gnttab_end_foreign_access_ref(ref, readonly)) {
 		put_free_entry(ref);
 		if (page != 0)
-			free_page(page);
+			put_page(virt_to_page(page));
 	} else
 		gnttab_add_deferred(ref, readonly,
 				    page ? virt_to_page(page) : NULL);

From bc22b05ef20f23c7de65d17d51d74e167477e085 Mon Sep 17 00:00:00 2001
From: Guanglei Li <guanglei.li@oracle.com>
Date: Tue, 6 Feb 2018 10:43:21 +0800
Subject: [PATCH 0263/1852] RDS: IB: Fix null pointer issue

[ Upstream commit 2c0aa08631b86a4678dbc93b9caa5248014b4458 ]

Scenario:
1. Port down and do fail over
2. Ap do rds_bind syscall

PID: 47039  TASK: ffff89887e2fe640  CPU: 47  COMMAND: "kworker/u:6"
 #0 [ffff898e35f159f0] machine_kexec at ffffffff8103abf9
 #1 [ffff898e35f15a60] crash_kexec at ffffffff810b96e3
 #2 [ffff898e35f15b30] oops_end at ffffffff8150f518
 #3 [ffff898e35f15b60] no_context at ffffffff8104854c
 #4 [ffff898e35f15ba0] __bad_area_nosemaphore at ffffffff81048675
 #5 [ffff898e35f15bf0] bad_area_nosemaphore at ffffffff810487d3
 #6 [ffff898e35f15c00] do_page_fault at ffffffff815120b8
 #7 [ffff898e35f15d10] page_fault at ffffffff8150ea95
    [exception RIP: unknown or invalid address]
    RIP: 0000000000000000  RSP: ffff898e35f15dc8  RFLAGS: 00010282
    RAX: 00000000fffffffe  RBX: ffff889b77f6fc00  RCX:ffffffff81c99d88
    RDX: 0000000000000000  RSI: ffff896019ee08e8  RDI:ffff889b77f6fc00
    RBP: ffff898e35f15df0   R8: ffff896019ee08c8  R9:0000000000000000
    R10: 0000000000000400  R11: 0000000000000000  R12:ffff896019ee08c0
    R13: ffff889b77f6fe68  R14: ffffffff81c99d80  R15: ffffffffa022a1e0
    ORIG_RAX: ffffffffffffffff  CS: 0010 SS: 0018
 #8 [ffff898e35f15dc8] cma_ndev_work_handler at ffffffffa022a228 [rdma_cm]
 #9 [ffff898e35f15df8] process_one_work at ffffffff8108a7c6
 #10 [ffff898e35f15e58] worker_thread at ffffffff8108bda0
 #11 [ffff898e35f15ee8] kthread at ffffffff81090fe6

PID: 45659  TASK: ffff880d313d2500  CPU: 31  COMMAND: "oracle_45659_ap"
 #0 [ffff881024ccfc98] __schedule at ffffffff8150bac4
 #1 [ffff881024ccfd40] schedule at ffffffff8150c2cf
 #2 [ffff881024ccfd50] __mutex_lock_slowpath at ffffffff8150cee7
 #3 [ffff881024ccfdc0] mutex_lock at ffffffff8150cdeb
 #4 [ffff881024ccfde0] rdma_destroy_id at ffffffffa022a027 [rdma_cm]
 #5 [ffff881024ccfe10] rds_ib_laddr_check at ffffffffa0357857 [rds_rdma]
 #6 [ffff881024ccfe50] rds_trans_get_preferred at ffffffffa0324c2a [rds]
 #7 [ffff881024ccfe80] rds_bind at ffffffffa031d690 [rds]
 #8 [ffff881024ccfeb0] sys_bind at ffffffff8142a670

PID: 45659                          PID: 47039
rds_ib_laddr_check
  /* create id_priv with a null event_handler */
  rdma_create_id
  rdma_bind_addr
    cma_acquire_dev
      /* add id_priv to cma_dev->id_list */
      cma_attach_to_dev
                                    cma_ndev_work_handler
                                      /* event_hanlder is null */
                                      id_priv->id.event_handler

Signed-off-by: Guanglei Li <guanglei.li@oracle.com>
Signed-off-by: Honglei Wang <honglei.wang@oracle.com>
Reviewed-by: Junxiao Bi <junxiao.bi@oracle.com>
Reviewed-by: Yanjun Zhu <yanjun.zhu@oracle.com>
Reviewed-by: Leon Romanovsky <leonro@mellanox.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Acked-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/rds/ib.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/rds/ib.c b/net/rds/ib.c
index f222885ac0c73..ed51ccc84b3a2 100644
--- a/net/rds/ib.c
+++ b/net/rds/ib.c
@@ -336,7 +336,8 @@ static int rds_ib_laddr_check(struct net *net, __be32 addr)
 	/* Create a CMA ID and try to bind it. This catches both
 	 * IB and iWARP capable NICs.
 	 */
-	cm_id = rdma_create_id(&init_net, NULL, NULL, RDMA_PS_TCP, IB_QPT_RC);
+	cm_id = rdma_create_id(&init_net, rds_rdma_cm_event_handler,
+			       NULL, RDMA_PS_TCP, IB_QPT_RC);
 	if (IS_ERR(cm_id))
 		return PTR_ERR(cm_id);
 

From 60ab7a36b7706a5a6e9a091101df5adf1026c5a5 Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Wed, 31 Jan 2018 12:12:20 +0000
Subject: [PATCH 0264/1852] arm64: spinlock: Fix theoretical trylock() A-B-A
 with LSE atomics

[ Upstream commit 202fb4ef81e3ec765c23bd1e6746a5c25b797d0e ]

If the spinlock "next" ticket wraps around between the initial LDR
and the cmpxchg in the LSE version of spin_trylock, then we can erroneously
think that we have successfuly acquired the lock because we only check
whether the next ticket return by the cmpxchg is equal to the owner ticket
in our updated lock word.

This patch fixes the issue by performing a full 32-bit check of the lock
word when trying to determine whether or not the CASA instruction updated
memory.

Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/asm/spinlock.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/spinlock.h b/arch/arm64/include/asm/spinlock.h
index 73f5d548bba1f..6d95f5d62d533 100644
--- a/arch/arm64/include/asm/spinlock.h
+++ b/arch/arm64/include/asm/spinlock.h
@@ -123,8 +123,8 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
 	"	cbnz	%w1, 1f\n"
 	"	add	%w1, %w0, %3\n"
 	"	casa	%w0, %w1, %2\n"
-	"	and	%w1, %w1, #0xffff\n"
-	"	eor	%w1, %w1, %w0, lsr #16\n"
+	"	sub	%w1, %w1, %3\n"
+	"	eor	%w1, %w1, %w0\n"
 	"1:")
 	: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)
 	: "I" (1 << TICKET_SHIFT)

From 9ac7b07aaf509f5f2675a5577109295e36699971 Mon Sep 17 00:00:00 2001
From: Alexey Dobriyan <adobriyan@gmail.com>
Date: Tue, 6 Feb 2018 15:36:59 -0800
Subject: [PATCH 0265/1852] proc: fix /proc/*/map_files lookup

[ Upstream commit ac7f1061c2c11bb8936b1b6a94cdb48de732f7a4 ]

Current code does:

	if (sscanf(dentry->d_name.name, "%lx-%lx", start, end) != 2)

However sscanf() is broken garbage.

It silently accepts whitespace between format specifiers
(did you know that?).

It silently accepts valid strings which result in integer overflow.

Do not use sscanf() for any even remotely reliable parsing code.

	OK
	# readlink '/proc/1/map_files/55a23af39000-55a23b05b000'
	/lib/systemd/systemd

	broken
	# readlink '/proc/1/map_files/               55a23af39000-55a23b05b000'
	/lib/systemd/systemd

	broken
	# readlink '/proc/1/map_files/55a23af39000-55a23b05b000    '
	/lib/systemd/systemd

	very broken
	# readlink '/proc/1/map_files/1000000000000000055a23af39000-55a23b05b000'
	/lib/systemd/systemd

Andrei said:

: This patch breaks criu.  It was a bug in criu.  And this bug is on a minor
: path, which works when memfd_create() isn't available.  It is a reason why
: I ask to not backport this patch to stable kernels.
:
: In CRIU this bug can be triggered, only if this patch will be backported
: to a kernel which version is lower than v3.16.

Link: http://lkml.kernel.org/r/20171120212706.GA14325@avx2
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Pavel Emelyanov <xemul@openvz.org>
Cc: Andrei Vagin <avagin@virtuozzo.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/base.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/fs/proc/base.c b/fs/proc/base.c
index 8fc435d802c7c..d1a675d32320a 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -95,6 +95,8 @@
 #include "internal.h"
 #include "fd.h"
 
+#include "../../lib/kstrtox.h"
+
 /* NOTE:
  *	Implementing inode permission operations in /proc is almost
  *	certainly an error.  Permission checks need to happen during
@@ -1837,8 +1839,33 @@ bool proc_fill_cache(struct file *file, struct dir_context *ctx,
 static int dname_to_vma_addr(struct dentry *dentry,
 			     unsigned long *start, unsigned long *end)
 {
-	if (sscanf(dentry->d_name.name, "%lx-%lx", start, end) != 2)
+	const char *str = dentry->d_name.name;
+	unsigned long long sval, eval;
+	unsigned int len;
+
+	len = _parse_integer(str, 16, &sval);
+	if (len & KSTRTOX_OVERFLOW)
+		return -EINVAL;
+	if (sval != (unsigned long)sval)
 		return -EINVAL;
+	str += len;
+
+	if (*str != '-')
+		return -EINVAL;
+	str++;
+
+	len = _parse_integer(str, 16, &eval);
+	if (len & KSTRTOX_OVERFLOW)
+		return -EINVAL;
+	if (eval != (unsigned long)eval)
+		return -EINVAL;
+	str += len;
+
+	if (*str != '\0')
+		return -EINVAL;
+
+	*start = sval;
+	*end = eval;
 
 	return 0;
 }

From 66813415c4cbb4cc1fa399c5e46c4a0994b1db5f Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Fri, 2 Feb 2018 16:48:47 +0100
Subject: [PATCH 0266/1852] cifs: silence compiler warnings showing up with
 gcc-8.0.0

[ Upstream commit ade7db991b47ab3016a414468164f4966bd08202 ]

This bug was fixed before, but came up again with the latest
compiler in another function:

fs/cifs/cifssmb.c: In function 'CIFSSMBSetEA':
fs/cifs/cifssmb.c:6362:3: error: 'strncpy' offset 8 is out of the bounds [0, 4] [-Werror=array-bounds]
   strncpy(parm_data->list[0].name, ea_name, name_len);

Let's apply the same fix that was used for the other instances.

Fixes: b2a3ad9ca502 ("cifs: silence compiler warnings showing up with gcc-4.7.0")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Steve French <smfrench@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/cifssmb.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 0c92af11f4f45..8632380d2b941 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -6421,9 +6421,7 @@ CIFSSMBSetEA(const unsigned int xid, struct cifs_tcon *tcon,
 	pSMB->InformationLevel =
 		cpu_to_le16(SMB_SET_FILE_EA);
 
-	parm_data =
-		(struct fealist *) (((char *) &pSMB->hdr.Protocol) +
-				       offset);
+	parm_data = (void *)pSMB + offsetof(struct smb_hdr, Protocol) + offset;
 	pSMB->ParameterOffset = cpu_to_le16(param_offset);
 	pSMB->DataOffset = cpu_to_le16(offset);
 	pSMB->SetupCount = 1;

From 4d4472b20ee8a38a8dafe588af978096c59d7dad Mon Sep 17 00:00:00 2001
From: Coly Li <colyli@suse.de>
Date: Wed, 7 Feb 2018 11:41:41 -0800
Subject: [PATCH 0267/1852] bcache: properly set task state in
 bch_writeback_thread()

[ Upstream commit 99361bbf26337186f02561109c17a4c4b1a7536a ]

Kernel thread routine bch_writeback_thread() has the following code block,

447         down_write(&dc->writeback_lock);
448~450     if (check conditions) {
451                 up_write(&dc->writeback_lock);
452                 set_current_state(TASK_INTERRUPTIBLE);
453
454                 if (kthread_should_stop())
455                         return 0;
456
457                 schedule();
458                 continue;
459         }

If condition check is true, its task state is set to TASK_INTERRUPTIBLE
and call schedule() to wait for others to wake up it.

There are 2 issues in current code,
1, Task state is set to TASK_INTERRUPTIBLE after the condition checks, if
   another process changes the condition and call wake_up_process(dc->
   writeback_thread), then at line 452 task state is set back to
   TASK_INTERRUPTIBLE, the writeback kernel thread will lose a chance to be
   waken up.
2, At line 454 if kthread_should_stop() is true, writeback kernel thread
   will return to kernel/kthread.c:kthread() with TASK_INTERRUPTIBLE and
   call do_exit(). It is not good to enter do_exit() with task state
   TASK_INTERRUPTIBLE, in following code path might_sleep() is called and a
   warning message is reported by __might_sleep(): "WARNING: do not call
   blocking ops when !TASK_RUNNING; state=1 set at [xxxx]".

For the first issue, task state should be set before condition checks.
Ineed because dc->writeback_lock is required when modifying all the
conditions, calling set_current_state() inside code block where dc->
writeback_lock is hold is safe. But this is quite implicit, so I still move
set_current_state() before all the condition checks.

For the second issue, frankley speaking it does not hurt when kernel thread
exits with TASK_INTERRUPTIBLE state, but this warning message scares users,
makes them feel there might be something risky with bcache and hurt their
data.  Setting task state to TASK_RUNNING before returning fixes this
problem.

In alloc.c:allocator_wait(), there is also a similar issue, and is also
fixed in this patch.

Changelog:
v3: merge two similar fixes into one patch
v2: fix the race issue in v1 patch.
v1: initial buggy fix.

Signed-off-by: Coly Li <colyli@suse.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Cc: Michael Lyle <mlyle@lyle.org>
Cc: Junhui Tang <tang.junhui@zte.com.cn>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/alloc.c     | 4 +++-
 drivers/md/bcache/writeback.c | 7 +++++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/md/bcache/alloc.c b/drivers/md/bcache/alloc.c
index aa84fcfd59fcf..16c3390e5d9f3 100644
--- a/drivers/md/bcache/alloc.c
+++ b/drivers/md/bcache/alloc.c
@@ -285,8 +285,10 @@ do {									\
 			break;						\
 									\
 		mutex_unlock(&(ca)->set->bucket_lock);			\
-		if (kthread_should_stop())				\
+		if (kthread_should_stop()) {				\
+			set_current_state(TASK_RUNNING);		\
 			return 0;					\
+		}							\
 									\
 		try_to_freeze();					\
 		schedule();						\
diff --git a/drivers/md/bcache/writeback.c b/drivers/md/bcache/writeback.c
index bbb1dc9e1639b..4639270bf99bc 100644
--- a/drivers/md/bcache/writeback.c
+++ b/drivers/md/bcache/writeback.c
@@ -425,19 +425,22 @@ static int bch_writeback_thread(void *arg)
 
 	while (!kthread_should_stop()) {
 		down_write(&dc->writeback_lock);
+		set_current_state(TASK_INTERRUPTIBLE);
 		if (!atomic_read(&dc->has_dirty) ||
 		    (!test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) &&
 		     !dc->writeback_running)) {
 			up_write(&dc->writeback_lock);
-			set_current_state(TASK_INTERRUPTIBLE);
 
-			if (kthread_should_stop())
+			if (kthread_should_stop()) {
+				set_current_state(TASK_RUNNING);
 				return 0;
+			}
 
 			try_to_freeze();
 			schedule();
 			continue;
 		}
+		set_current_state(TASK_RUNNING);
 
 		searched_full_index = refill_dirty(dc);
 

From fb3eb1434502e560bcdf7a8dcae4a8742a3f768b Mon Sep 17 00:00:00 2001
From: Tang Junhui <tang.junhui@zte.com.cn>
Date: Wed, 7 Feb 2018 11:41:43 -0800
Subject: [PATCH 0268/1852] bcache: fix for allocator and register thread race
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 682811b3ce1a5a4e20d700939a9042f01dbc66c4 ]

After long time running of random small IO writing,
I reboot the machine, and after the machine power on,
I found bcache got stuck, the stack is:
[root@ceph153 ~]# cat /proc/2510/task/*/stack
[<ffffffffa06b2455>] closure_sync+0x25/0x90 [bcache]
[<ffffffffa06b6be8>] bch_journal+0x118/0x2b0 [bcache]
[<ffffffffa06b6dc7>] bch_journal_meta+0x47/0x70 [bcache]
[<ffffffffa06be8f7>] bch_prio_write+0x237/0x340 [bcache]
[<ffffffffa06a8018>] bch_allocator_thread+0x3c8/0x3d0 [bcache]
[<ffffffff810a631f>] kthread+0xcf/0xe0
[<ffffffff8164c318>] ret_from_fork+0x58/0x90
[<ffffffffffffffff>] 0xffffffffffffffff
[root@ceph153 ~]# cat /proc/2038/task/*/stack
[<ffffffffa06b1abd>] __bch_btree_map_nodes+0x12d/0x150 [bcache]
[<ffffffffa06b1bd1>] bch_btree_insert+0xf1/0x170 [bcache]
[<ffffffffa06b637f>] bch_journal_replay+0x13f/0x230 [bcache]
[<ffffffffa06c75fe>] run_cache_set+0x79a/0x7c2 [bcache]
[<ffffffffa06c0cf8>] register_bcache+0xd48/0x1310 [bcache]
[<ffffffff812f702f>] kobj_attr_store+0xf/0x20
[<ffffffff8125b216>] sysfs_write_file+0xc6/0x140
[<ffffffff811dfbfd>] vfs_write+0xbd/0x1e0
[<ffffffff811e069f>] SyS_write+0x7f/0xe0
[<ffffffff8164c3c9>] system_call_fastpath+0x16/0x1
The stack shows the register thread and allocator thread
were getting stuck when registering cache device.

I reboot the machine several times, the issue always
exsit in this machine.

I debug the code, and found the call trace as bellow:
register_bcache()
   ==>run_cache_set()
      ==>bch_journal_replay()
         ==>bch_btree_insert()
            ==>__bch_btree_map_nodes()
               ==>btree_insert_fn()
                  ==>btree_split() //node need split
                     ==>btree_check_reserve()
In btree_check_reserve(), It will check if there is enough buckets
of RESERVE_BTREE type, since allocator thread did not work yet, so
no buckets of RESERVE_BTREE type allocated, so the register thread
waits on c->btree_cache_wait, and goes to sleep.

Then the allocator thread initialized, the call trace is bellow:
bch_allocator_thread()
==>bch_prio_write()
   ==>bch_journal_meta()
      ==>bch_journal()
         ==>journal_wait_for_write()
In journal_wait_for_write(), It will check if journal is full by
journal_full(), but the long time random small IO writing
causes the exhaustion of journal buckets(journal.blocks_free=0),
In order to release the journal buckets,
the allocator calls btree_flush_write() to flush keys to
btree nodes, and waits on c->journal.wait until btree nodes writing
over or there has already some journal buckets space, then the
allocator thread goes to sleep. but in btree_flush_write(), since
bch_journal_replay() is not finished, so no btree nodes have journal
(condition "if (btree_current_write(b)->journal)" never satisfied),
so we got no btree node to flush, no journal bucket released,
and allocator sleep all the times.

Through the above analysis, we can see that:
1) Register thread wait for allocator thread to allocate buckets of
   RESERVE_BTREE type;
2) Alloctor thread wait for register thread to replay journal, so it
   can flush btree nodes and get journal bucket.
   then they are all got stuck by waiting for each other.

Hua Rui provided a patch for me, by allocating some buckets of
RESERVE_BTREE type in advance, so the register thread can get bucket
when btree node splitting and no need to waiting for the allocator
thread. I tested it, it has effect, and register thread run a step
forward, but finally are still got stuck, the reason is only 8 bucket
of RESERVE_BTREE type were allocated, and in bch_journal_replay(),
after 2 btree nodes splitting, only 4 bucket of RESERVE_BTREE type left,
then btree_check_reserve() is not satisfied anymore, so it goes to sleep
again, and in the same time, alloctor thread did not flush enough btree
nodes to release a journal bucket, so they all got stuck again.

So we need to allocate more buckets of RESERVE_BTREE type in advance,
but how much is enough?  By experience and test, I think it should be
as much as journal buckets. Then I modify the code as this patch,
and test in the machine, and it works.

This patch modified base on Hua Rui’s patch, and allocate more buckets
of RESERVE_BTREE type in advance to avoid register thread and allocate
thread going to wait for each other.

[patch v2] ca->sb.njournal_buckets would be 0 in the first time after
cache creation, and no journal exists, so just 8 btree buckets is OK.

Signed-off-by: Hua Rui <huarui.dev@gmail.com>
Signed-off-by: Tang Junhui <tang.junhui@zte.com.cn>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/btree.c |  9 ++++++---
 drivers/md/bcache/super.c | 13 ++++++++++++-
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/md/bcache/btree.c b/drivers/md/bcache/btree.c
index a5a6909280fea..4ed621ad27e40 100644
--- a/drivers/md/bcache/btree.c
+++ b/drivers/md/bcache/btree.c
@@ -1869,14 +1869,17 @@ void bch_initial_gc_finish(struct cache_set *c)
 	 */
 	for_each_cache(ca, c, i) {
 		for_each_bucket(b, ca) {
-			if (fifo_full(&ca->free[RESERVE_PRIO]))
+			if (fifo_full(&ca->free[RESERVE_PRIO]) &&
+			    fifo_full(&ca->free[RESERVE_BTREE]))
 				break;
 
 			if (bch_can_invalidate_bucket(ca, b) &&
 			    !GC_MARK(b)) {
 				__bch_invalidate_one_bucket(ca, b);
-				fifo_push(&ca->free[RESERVE_PRIO],
-					  b - ca->buckets);
+				if (!fifo_push(&ca->free[RESERVE_PRIO],
+				   b - ca->buckets))
+					fifo_push(&ca->free[RESERVE_BTREE],
+						  b - ca->buckets);
 			}
 		}
 	}
diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c
index f636af441da68..24b89def3a689 100644
--- a/drivers/md/bcache/super.c
+++ b/drivers/md/bcache/super.c
@@ -1828,6 +1828,7 @@ void bch_cache_release(struct kobject *kobj)
 static int cache_alloc(struct cache_sb *sb, struct cache *ca)
 {
 	size_t free;
+	size_t btree_buckets;
 	struct bucket *b;
 
 	__module_get(THIS_MODULE);
@@ -1837,9 +1838,19 @@ static int cache_alloc(struct cache_sb *sb, struct cache *ca)
 	ca->journal.bio.bi_max_vecs = 8;
 	ca->journal.bio.bi_io_vec = ca->journal.bio.bi_inline_vecs;
 
+	/*
+	 * when ca->sb.njournal_buckets is not zero, journal exists,
+	 * and in bch_journal_replay(), tree node may split,
+	 * so bucket of RESERVE_BTREE type is needed,
+	 * the worst situation is all journal buckets are valid journal,
+	 * and all the keys need to replay,
+	 * so the number of  RESERVE_BTREE type buckets should be as much
+	 * as journal buckets
+	 */
+	btree_buckets = ca->sb.njournal_buckets ?: 8;
 	free = roundup_pow_of_two(ca->sb.nbuckets) >> 10;
 
-	if (!init_fifo(&ca->free[RESERVE_BTREE], 8, GFP_KERNEL) ||
+	if (!init_fifo(&ca->free[RESERVE_BTREE], btree_buckets, GFP_KERNEL) ||
 	    !init_fifo_exact(&ca->free[RESERVE_PRIO], prio_buckets(ca), GFP_KERNEL) ||
 	    !init_fifo(&ca->free[RESERVE_MOVINGGC], free, GFP_KERNEL) ||
 	    !init_fifo(&ca->free[RESERVE_NONE], free, GFP_KERNEL) ||

From a173a8db477b46d265cdfcf4f1353fdc1e32b308 Mon Sep 17 00:00:00 2001
From: Tang Junhui <tang.junhui@zte.com.cn>
Date: Wed, 7 Feb 2018 11:41:46 -0800
Subject: [PATCH 0269/1852] bcache: fix for data collapse after re-attaching an
 attached device

[ Upstream commit 73ac105be390c1de42a2f21643c9778a5e002930 ]

back-end device sdm has already attached a cache_set with ID
f67ebe1f-f8bc-4d73-bfe5-9dc88607f119, then try to attach with
another cache set, and it returns with an error:
[root]# cd /sys/block/sdm/bcache
[root]# echo 5ccd0a63-148e-48b8-afa2-aca9cbd6279f > attach
-bash: echo: write error: Invalid argument

After that, execute a command to modify the label of bcache
device:
[root]# echo data_disk1 > label

Then we reboot the system, when the system power on, the back-end
device can not attach to cache_set, a messages show in the log:
Feb  5 12:05:52 ceph152 kernel: [922385.508498] bcache:
bch_cached_dev_attach() couldn't find uuid for sdm in set

In sysfs_attach(), dc->sb.set_uuid was assigned to the value
which input through sysfs, no matter whether it is success
or not in bch_cached_dev_attach(). For example, If the back-end
device has already attached to an cache set, bch_cached_dev_attach()
would fail, but dc->sb.set_uuid was changed. Then modify the
label of bcache device, it will call bch_write_bdev_super(),
which would write the dc->sb.set_uuid to the super block, so we
record a wrong cache set ID in the super block, after the system
reboot, the cache set couldn't find the uuid of the back-end
device, so the bcache device couldn't exist and use any more.

In this patch, we don't assigned cache set ID to dc->sb.set_uuid
in sysfs_attach() directly, but input it into bch_cached_dev_attach(),
and assigned dc->sb.set_uuid to the cache set ID after the back-end
device attached to the cache set successful.

Signed-off-by: Tang Junhui <tang.junhui@zte.com.cn>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/bcache.h |  2 +-
 drivers/md/bcache/super.c  | 10 ++++++----
 drivers/md/bcache/sysfs.c  |  6 ++++--
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/md/bcache/bcache.h b/drivers/md/bcache/bcache.h
index 02619cabda8b5..7fe7df56fa334 100644
--- a/drivers/md/bcache/bcache.h
+++ b/drivers/md/bcache/bcache.h
@@ -904,7 +904,7 @@ void bcache_write_super(struct cache_set *);
 
 int bch_flash_dev_create(struct cache_set *c, uint64_t size);
 
-int bch_cached_dev_attach(struct cached_dev *, struct cache_set *);
+int bch_cached_dev_attach(struct cached_dev *, struct cache_set *, uint8_t *);
 void bch_cached_dev_detach(struct cached_dev *);
 void bch_cached_dev_run(struct cached_dev *);
 void bcache_device_stop(struct bcache_device *);
diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c
index 24b89def3a689..ef28ddfff7c61 100644
--- a/drivers/md/bcache/super.c
+++ b/drivers/md/bcache/super.c
@@ -936,7 +936,8 @@ void bch_cached_dev_detach(struct cached_dev *dc)
 	cached_dev_put(dc);
 }
 
-int bch_cached_dev_attach(struct cached_dev *dc, struct cache_set *c)
+int bch_cached_dev_attach(struct cached_dev *dc, struct cache_set *c,
+			  uint8_t *set_uuid)
 {
 	uint32_t rtime = cpu_to_le32(get_seconds());
 	struct uuid_entry *u;
@@ -945,7 +946,8 @@ int bch_cached_dev_attach(struct cached_dev *dc, struct cache_set *c)
 
 	bdevname(dc->bdev, buf);
 
-	if (memcmp(dc->sb.set_uuid, c->sb.set_uuid, 16))
+	if ((set_uuid && memcmp(set_uuid, c->sb.set_uuid, 16)) ||
+	    (!set_uuid && memcmp(dc->sb.set_uuid, c->sb.set_uuid, 16)))
 		return -ENOENT;
 
 	if (dc->disk.c) {
@@ -1189,7 +1191,7 @@ static void register_bdev(struct cache_sb *sb, struct page *sb_page,
 
 	list_add(&dc->list, &uncached_devices);
 	list_for_each_entry(c, &bch_cache_sets, list)
-		bch_cached_dev_attach(dc, c);
+		bch_cached_dev_attach(dc, c, NULL);
 
 	if (BDEV_STATE(&dc->sb) == BDEV_STATE_NONE ||
 	    BDEV_STATE(&dc->sb) == BDEV_STATE_STALE)
@@ -1711,7 +1713,7 @@ static void run_cache_set(struct cache_set *c)
 	bcache_write_super(c);
 
 	list_for_each_entry_safe(dc, t, &uncached_devices, list)
-		bch_cached_dev_attach(dc, c);
+		bch_cached_dev_attach(dc, c, NULL);
 
 	flash_devs_run(c);
 
diff --git a/drivers/md/bcache/sysfs.c b/drivers/md/bcache/sysfs.c
index 4fbb5532f24c7..1efe316152818 100644
--- a/drivers/md/bcache/sysfs.c
+++ b/drivers/md/bcache/sysfs.c
@@ -263,11 +263,13 @@ STORE(__cached_dev)
 	}
 
 	if (attr == &sysfs_attach) {
-		if (bch_parse_uuid(buf, dc->sb.set_uuid) < 16)
+		uint8_t		set_uuid[16];
+
+		if (bch_parse_uuid(buf, set_uuid) < 16)
 			return -EINVAL;
 
 		list_for_each_entry(c, &bch_cache_sets, list) {
-			v = bch_cached_dev_attach(dc, c);
+			v = bch_cached_dev_attach(dc, c, set_uuid);
 			if (!v)
 				return size;
 		}

From 28e922d8d348272d2ce306461b8255da627ca4a6 Mon Sep 17 00:00:00 2001
From: Tang Junhui <tang.junhui@zte.com.cn>
Date: Wed, 7 Feb 2018 11:41:45 -0800
Subject: [PATCH 0270/1852] bcache: return attach error when no cache set exist

[ Upstream commit 7f4fc93d4713394ee8f1cd44c238e046e11b4f15 ]

I attach a back-end device to a cache set, and the cache set is not
registered yet, this back-end device did not attach successfully, and no
error returned:
[root]# echo 87859280-fec6-4bcc-20df7ca8f86b > /sys/block/sde/bcache/attach
[root]#

In sysfs_attach(), the return value "v" is initialized to "size" in
the beginning, and if no cache set exist in bch_cache_sets, the "v" value
would not change any more, and return to sysfs, sysfs regard it as success
since the "size" is a positive number.

This patch fixes this issue by assigning "v" with "-ENOENT" in the
initialization.

Signed-off-by: Tang Junhui <tang.junhui@zte.com.cn>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/sysfs.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/md/bcache/sysfs.c b/drivers/md/bcache/sysfs.c
index 1efe316152818..5a5c1f1bd8a53 100644
--- a/drivers/md/bcache/sysfs.c
+++ b/drivers/md/bcache/sysfs.c
@@ -191,7 +191,7 @@ STORE(__cached_dev)
 {
 	struct cached_dev *dc = container_of(kobj, struct cached_dev,
 					     disk.kobj);
-	ssize_t v = size;
+	ssize_t v;
 	struct cache_set *c;
 	struct kobj_uevent_env *env;
 
@@ -268,6 +268,7 @@ STORE(__cached_dev)
 		if (bch_parse_uuid(buf, set_uuid) < 16)
 			return -EINVAL;
 
+		v = -ENOENT;
 		list_for_each_entry(c, &bch_cache_sets, list) {
 			v = bch_cached_dev_attach(dc, c, set_uuid);
 			if (!v)
@@ -275,7 +276,7 @@ STORE(__cached_dev)
 		}
 
 		pr_err("Can't attach %s: cache set not found", buf);
-		size = v;
+		return v;
 	}
 
 	if (attr == &sysfs_detach && dc->disk.c)

From 3e968aa9cf3102fdb7cf622cbdbfd1791c4b063b Mon Sep 17 00:00:00 2001
From: Jesper Dangaard Brouer <brouer@redhat.com>
Date: Thu, 8 Feb 2018 12:48:32 +0100
Subject: [PATCH 0271/1852] tools/libbpf: handle issues with bpf ELF objects
 containing .eh_frames

[ Upstream commit e3d91b0ca523d53158f435a3e13df7f0cb360ea2 ]

V3: More generic skipping of relo-section (suggested by Daniel)

If clang >= 4.0.1 is missing the option '-target bpf', it will cause
llc/llvm to create two ELF sections for "Exception Frames", with
section names '.eh_frame' and '.rel.eh_frame'.

The BPF ELF loader library libbpf fails when loading files with these
sections.  The other in-kernel BPF ELF loader in samples/bpf/bpf_load.c,
handle this gracefully. And iproute2 loader also seems to work with these
"eh" sections.

The issue in libbpf is caused by bpf_object__elf_collect() skipping
some sections, and later when performing relocation it will be
pointing to a skipped section, as these sections cannot be found by
bpf_object__find_prog_by_idx() in bpf_object__collect_reloc().

This is a general issue that also occurs for other sections, like
debug sections which are also skipped and can have relo section.

As suggested by Daniel.  To avoid keeping state about all skipped
sections, instead perform a direct qlookup in the ELF object.  Lookup
the section that the relo-section points to and check if it contains
executable machine instructions (denoted by the sh_flags
SHF_EXECINSTR).  Use this check to also skip irrelevant relo-sections.

Note, for samples/bpf/ the '-target bpf' parameter to clang cannot be used
due to incompatibility with asm embedded headers, that some of the samples
include. This is explained in more details by Yonghong Song in bpf_devel_QA.

Signed-off-by: Jesper Dangaard Brouer <brouer@redhat.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/lib/bpf/libbpf.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/tools/lib/bpf/libbpf.c b/tools/lib/bpf/libbpf.c
index e176bad19bcb7..ca080a129b335 100644
--- a/tools/lib/bpf/libbpf.c
+++ b/tools/lib/bpf/libbpf.c
@@ -487,6 +487,24 @@ bpf_object__init_maps(struct bpf_object *obj, void *data,
 	return 0;
 }
 
+static bool section_have_execinstr(struct bpf_object *obj, int idx)
+{
+	Elf_Scn *scn;
+	GElf_Shdr sh;
+
+	scn = elf_getscn(obj->efile.elf, idx);
+	if (!scn)
+		return false;
+
+	if (gelf_getshdr(scn, &sh) != &sh)
+		return false;
+
+	if (sh.sh_flags & SHF_EXECINSTR)
+		return true;
+
+	return false;
+}
+
 static int bpf_object__elf_collect(struct bpf_object *obj)
 {
 	Elf *elf = obj->efile.elf;
@@ -567,6 +585,14 @@ static int bpf_object__elf_collect(struct bpf_object *obj)
 		} else if (sh.sh_type == SHT_REL) {
 			void *reloc = obj->efile.reloc;
 			int nr_reloc = obj->efile.nr_reloc + 1;
+			int sec = sh.sh_info; /* points to other section */
+
+			/* Only do relo for section with exec instructions */
+			if (!section_have_execinstr(obj, sec)) {
+				pr_debug("skip relo %s(%d) for section(%d)\n",
+					 name, idx, sec);
+				continue;
+			}
 
 			reloc = realloc(reloc,
 					sizeof(*obj->efile.reloc) * nr_reloc);

From 41db099d4d5f56ac4194c8952e7eda766a3877f7 Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Tue, 13 Feb 2018 13:22:57 +0000
Subject: [PATCH 0272/1852] locking/qspinlock: Ensure node->count is updated
 before initialising node

[ Upstream commit 11dc13224c975efcec96647a4768a6f1bb7a19a8 ]

When queuing on the qspinlock, the count field for the current CPU's head
node is incremented. This needn't be atomic because locking in e.g. IRQ
context is balanced and so an IRQ will return with node->count as it
found it.

However, the compiler could in theory reorder the initialisation of
node[idx] before the increment of the head node->count, causing an
IRQ to overwrite the initialised node and potentially corrupt the lock
state.

Avoid the potential for this harmful compiler reordering by placing a
barrier() between the increment of the head node->count and the subsequent
node initialisation.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1518528177-19169-3-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/locking/qspinlock.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
index 8173bc7fec92e..3b40c8809e52e 100644
--- a/kernel/locking/qspinlock.c
+++ b/kernel/locking/qspinlock.c
@@ -423,6 +423,14 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
 	tail = encode_tail(smp_processor_id(), idx);
 
 	node += idx;
+
+	/*
+	 * Ensure that we increment the head node->count before initialising
+	 * the actual node. If the compiler is kind enough to reorder these
+	 * stores, then an IRQ could overwrite our assignments.
+	 */
+	barrier();
+
 	node->locked = 0;
 	node->next = NULL;
 	pv_init_node(node);

From cf9ccbdb0b2e6e405ad8c22b58134b7a5c374cfe Mon Sep 17 00:00:00 2001
From: Mark Salter <msalter@redhat.com>
Date: Fri, 2 Feb 2018 09:20:29 -0500
Subject: [PATCH 0273/1852] irqchip/gic-v3: Change pr_debug message to pr_devel

[ Upstream commit b6dd4d83dc2f78cebc9a7e6e7e4bc2be4d29b94d ]

The pr_debug() in gic-v3 gic_send_sgi() can trigger a circular locking
warning:

 GICv3: CPU10: ICC_SGI1R_EL1 5000400
 ======================================================
 WARNING: possible circular locking dependency detected
 4.15.0+ #1 Tainted: G        W
 ------------------------------------------------------
 dynamic_debug01/1873 is trying to acquire lock:
  ((console_sem).lock){-...}, at: [<0000000099c891ec>] down_trylock+0x20/0x4c

 but task is already holding lock:
  (&rq->lock){-.-.}, at: [<00000000842e1587>] __task_rq_lock+0x54/0xdc

 which lock already depends on the new lock.

 the existing dependency chain (in reverse order) is:

 -> #2 (&rq->lock){-.-.}:
        __lock_acquire+0x3b4/0x6e0
        lock_acquire+0xf4/0x2a8
        _raw_spin_lock+0x4c/0x60
        task_fork_fair+0x3c/0x148
        sched_fork+0x10c/0x214
        copy_process.isra.32.part.33+0x4e8/0x14f0
        _do_fork+0xe8/0x78c
        kernel_thread+0x48/0x54
        rest_init+0x34/0x2a4
        start_kernel+0x45c/0x488

 -> #1 (&p->pi_lock){-.-.}:
        __lock_acquire+0x3b4/0x6e0
        lock_acquire+0xf4/0x2a8
        _raw_spin_lock_irqsave+0x58/0x70
        try_to_wake_up+0x48/0x600
        wake_up_process+0x28/0x34
        __up.isra.0+0x60/0x6c
        up+0x60/0x68
        __up_console_sem+0x4c/0x7c
        console_unlock+0x328/0x634
        vprintk_emit+0x25c/0x390
        dev_vprintk_emit+0xc4/0x1fc
        dev_printk_emit+0x88/0xa8
        __dev_printk+0x58/0x9c
        _dev_info+0x84/0xa8
        usb_new_device+0x100/0x474
        hub_port_connect+0x280/0x92c
        hub_event+0x740/0xa84
        process_one_work+0x240/0x70c
        worker_thread+0x60/0x400
        kthread+0x110/0x13c
        ret_from_fork+0x10/0x18

 -> #0 ((console_sem).lock){-...}:
        validate_chain.isra.34+0x6e4/0xa20
        __lock_acquire+0x3b4/0x6e0
        lock_acquire+0xf4/0x2a8
        _raw_spin_lock_irqsave+0x58/0x70
        down_trylock+0x20/0x4c
        __down_trylock_console_sem+0x3c/0x9c
        console_trylock+0x20/0xb0
        vprintk_emit+0x254/0x390
        vprintk_default+0x58/0x90
        vprintk_func+0xbc/0x164
        printk+0x80/0xa0
        __dynamic_pr_debug+0x84/0xac
        gic_raise_softirq+0x184/0x18c
        smp_cross_call+0xac/0x218
        smp_send_reschedule+0x3c/0x48
        resched_curr+0x60/0x9c
        check_preempt_curr+0x70/0xdc
        wake_up_new_task+0x310/0x470
        _do_fork+0x188/0x78c
        SyS_clone+0x44/0x50
        __sys_trace_return+0x0/0x4

 other info that might help us debug this:

 Chain exists of:
   (console_sem).lock --> &p->pi_lock --> &rq->lock

  Possible unsafe locking scenario:

        CPU0                    CPU1
        ----                    ----
   lock(&rq->lock);
                                lock(&p->pi_lock);
                                lock(&rq->lock);
   lock((console_sem).lock);

  *** DEADLOCK ***

 2 locks held by dynamic_debug01/1873:
  #0:  (&p->pi_lock){-.-.}, at: [<000000001366df53>] wake_up_new_task+0x40/0x470
  #1:  (&rq->lock){-.-.}, at: [<00000000842e1587>] __task_rq_lock+0x54/0xdc

 stack backtrace:
 CPU: 10 PID: 1873 Comm: dynamic_debug01 Tainted: G        W        4.15.0+ #1
 Hardware name: GIGABYTE R120-T34-00/MT30-GS2-00, BIOS T48 10/02/2017
 Call trace:
  dump_backtrace+0x0/0x188
  show_stack+0x24/0x2c
  dump_stack+0xa4/0xe0
  print_circular_bug.isra.31+0x29c/0x2b8
  check_prev_add.constprop.39+0x6c8/0x6dc
  validate_chain.isra.34+0x6e4/0xa20
  __lock_acquire+0x3b4/0x6e0
  lock_acquire+0xf4/0x2a8
  _raw_spin_lock_irqsave+0x58/0x70
  down_trylock+0x20/0x4c
  __down_trylock_console_sem+0x3c/0x9c
  console_trylock+0x20/0xb0
  vprintk_emit+0x254/0x390
  vprintk_default+0x58/0x90
  vprintk_func+0xbc/0x164
  printk+0x80/0xa0
  __dynamic_pr_debug+0x84/0xac
  gic_raise_softirq+0x184/0x18c
  smp_cross_call+0xac/0x218
  smp_send_reschedule+0x3c/0x48
  resched_curr+0x60/0x9c
  check_preempt_curr+0x70/0xdc
  wake_up_new_task+0x310/0x470
  _do_fork+0x188/0x78c
  SyS_clone+0x44/0x50
  __sys_trace_return+0x0/0x4
 GICv3: CPU0: ICC_SGI1R_EL1 12000

This could be fixed with printk_deferred() but that might lessen its
usefulness for debugging. So change it to pr_devel to keep it out of
production kernels. Developers working on gic-v3 can enable it as
needed in their kernels.

Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/irqchip/irq-gic-v3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 79b60aab3aabb..55a65586997d6 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -601,7 +601,7 @@ static void gic_send_sgi(u64 cluster_id, u16 tlist, unsigned int irq)
 	       MPIDR_TO_SGI_AFFINITY(cluster_id, 1)	|
 	       tlist << ICC_SGI1R_TARGET_LIST_SHIFT);
 
-	pr_debug("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
+	pr_devel("CPU%d: ICC_SGI1R_EL1 %llx\n", smp_processor_id(), val);
 	gic_write_sgi1r(val);
 }
 

From 1c3d61c001225cfc08feca7308ba0ec720808ca1 Mon Sep 17 00:00:00 2001
From: Sujit Reddy Thumma <sthumma@codeaurora.org>
Date: Wed, 24 Jan 2018 09:52:35 +0530
Subject: [PATCH 0274/1852] scsi: ufs: Enable quirk to ignore sending
 WRITE_SAME command

[ Upstream commit 84af7e8b895088d89f246d6b0f82717fafdebf61 ]

WRITE_SAME command is not supported by UFS. Enable a quirk for the upper
level drivers to not send WRITE SAME command.

[mkp: botched patch, applied by hand]

Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/ufs/ufshcd.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 47bb213c7b6f8..b316fddac6029 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -2935,6 +2935,8 @@ static int ufshcd_slave_alloc(struct scsi_device *sdev)
 	/* REPORT SUPPORTED OPERATION CODES is not supported */
 	sdev->no_report_opcodes = 1;
 
+	/* WRITE_SAME command is not supported */
+	sdev->no_write_same = 1;
 
 	ufshcd_set_queue_depth(sdev);
 

From 0c05cf04c43d336125fa1b80c40a1ccfd48bb042 Mon Sep 17 00:00:00 2001
From: Chad Dupuis <chad.dupuis@cavium.com>
Date: Wed, 24 Jan 2018 08:07:06 -0800
Subject: [PATCH 0275/1852] scsi: bnx2fc: Fix check in SCSI completion handler
 for timed out request

[ Upstream commit ecf7ff49945f5741fa1da112f994939f942031d3 ]

When a request times out we set the io_req flag BNX2FC_FLAG_IO_COMPL so
that if a subsequent completion comes in on that task ID we will ignore
it.  The issue is that in the check for this flag there is a missing
return so we will continue to process a request which may have already
been returned to the ownership of the SCSI layer.  This can cause
unpredictable results.

Solution is to add in the missing return.

[mkp: typo plus title shortening]

Signed-off-by: Chad Dupuis <chad.dupuis@cavium.com>
Reviewed-by: Laurence Oberman <loberman@redhat.com>
Tested-by: Laurence Oberman <loberman@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/bnx2fc/bnx2fc_io.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/scsi/bnx2fc/bnx2fc_io.c b/drivers/scsi/bnx2fc/bnx2fc_io.c
index 0002caf687dd0..eb3b5c0f299fa 100644
--- a/drivers/scsi/bnx2fc/bnx2fc_io.c
+++ b/drivers/scsi/bnx2fc/bnx2fc_io.c
@@ -1858,6 +1858,7 @@ void bnx2fc_process_scsi_cmd_compl(struct bnx2fc_cmd *io_req,
 		/* we will not receive ABTS response for this IO */
 		BNX2FC_IO_DBG(io_req, "Timer context finished processing "
 			   "this scsi cmd\n");
+		return;
 	}
 
 	/* Cancel the timeout_work, as we received IO completion */

From dcd4b9da3b5b967b574ac8a15a47345929f5eb47 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 25 Jan 2018 17:13:40 +0300
Subject: [PATCH 0276/1852] scsi: sym53c8xx_2: iterator underflow in
 sym_getsync()

[ Upstream commit e6f791d95313c85f3dd4a26141e28e50ae9aa0ae ]

We wanted to exit the loop with "div" set to zero, but instead, if we
don't hit the break then "div" is -1 when we finish the loop.  It leads
to an array underflow a few lines later.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Acked-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sym53c8xx_2/sym_hipd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/sym53c8xx_2/sym_hipd.c b/drivers/scsi/sym53c8xx_2/sym_hipd.c
index 6b349e3018692..c6425e3df5a04 100644
--- a/drivers/scsi/sym53c8xx_2/sym_hipd.c
+++ b/drivers/scsi/sym53c8xx_2/sym_hipd.c
@@ -536,7 +536,7 @@ sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fa
 	 *  Look for the greatest clock divisor that allows an 
 	 *  input speed faster than the period.
 	 */
-	while (div-- > 0)
+	while (--div > 0)
 		if (kpc >= (div_10M[div] << 2)) break;
 
 	/*

From 9d53dfda5c601eed1c68892670398abbbf055f49 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 25 Jan 2018 17:27:27 +0300
Subject: [PATCH 0277/1852] scsi: mptfusion: Add bounds check in
 mptctl_hp_targetinfo()

[ Upstream commit a7043e9529f3c367cc4d82997e00be034cbe57ca ]

My static checker complains about an out of bounds read:

    drivers/message/fusion/mptctl.c:2786 mptctl_hp_targetinfo()
    error: buffer overflow 'hd->sel_timeout' 255 <= u32max.

It's true that we probably should have a bounds check here.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/message/fusion/mptctl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c
index 02b5f69e1a423..14cf6dfc3b145 100644
--- a/drivers/message/fusion/mptctl.c
+++ b/drivers/message/fusion/mptctl.c
@@ -2698,6 +2698,8 @@ mptctl_hp_targetinfo(unsigned long arg)
 				__FILE__, __LINE__, iocnum);
 		return -ENODEV;
 	}
+	if (karg.hdr.id >= MPT_MAX_FC_DEVICES)
+		return -EINVAL;
 	dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_hp_targetinfo called.\n",
 	    ioc->name));
 

From 6aa287a6309a6736b20d87e10e331f6d0f0f862c Mon Sep 17 00:00:00 2001
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Thu, 25 Jan 2018 08:24:29 -0800
Subject: [PATCH 0278/1852] scsi: qla2xxx: Avoid triggering undefined behavior
 in qla2x00_mbx_completion()

[ Upstream commit c02189e12ce3bf3808cb880569d3b10249f50bd9 ]

A left shift must shift less than the bit width of the left argument.
Avoid triggering undefined behavior if ha->mbx_count == 32.

This patch avoids that UBSAN reports the following complaint:

UBSAN: Undefined behaviour in drivers/scsi/qla2xxx/qla_isr.c:275:14
shift exponent 32 is too large for 32-bit type 'int'
Call Trace:
 dump_stack+0x4e/0x6c
 ubsan_epilogue+0xd/0x3b
 __ubsan_handle_shift_out_of_bounds+0x112/0x14c
 qla2x00_mbx_completion+0x1c5/0x25d [qla2xxx]
 qla2300_intr_handler+0x1ea/0x3bb [qla2xxx]
 qla2x00_mailbox_command+0x77b/0x139a [qla2xxx]
 qla2x00_mbx_reg_test+0x83/0x114 [qla2xxx]
 qla2x00_chip_diag+0x354/0x45f [qla2xxx]
 qla2x00_initialize_adapter+0x2c2/0xa4e [qla2xxx]
 qla2x00_probe_one+0x1681/0x392e [qla2xxx]
 pci_device_probe+0x10b/0x1f1
 driver_probe_device+0x21f/0x3a4
 __driver_attach+0xa9/0xe1
 bus_for_each_dev+0x6e/0xb5
 driver_attach+0x22/0x3c
 bus_add_driver+0x1d1/0x2ae
 driver_register+0x78/0x130
 __pci_register_driver+0x75/0xa8
 qla2x00_module_init+0x21b/0x267 [qla2xxx]
 do_one_initcall+0x5a/0x1e2
 do_init_module+0x9d/0x285
 load_module+0x20db/0x38e3
 SYSC_finit_module+0xa8/0xbc
 SyS_finit_module+0x9/0xb
 do_syscall_64+0x77/0x271
 entry_SYSCALL64_slow_path+0x25/0x25

Reported-by: Meelis Roos <mroos@linux.ee>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: Himanshu Madhani <himanshu.madhani@cavium.com>
Reviewed-by: Laurence Oberman <loberman@redhat.com>
Acked-by: Himanshu Madhani <himanshu.madhani@cavium.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/qla2xxx/qla_isr.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 1f6a3b86965f7..440d79e6aea5d 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -268,7 +268,8 @@ qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
 
 	/* Read all mbox registers? */
-	mboxes = (1 << ha->mbx_count) - 1;
+	WARN_ON_ONCE(ha->mbx_count > 32);
+	mboxes = (1ULL << ha->mbx_count) - 1;
 	if (!ha->mcp)
 		ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
 	else
@@ -2495,7 +2496,8 @@ qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 
 	/* Read all mbox registers? */
-	mboxes = (1 << ha->mbx_count) - 1;
+	WARN_ON_ONCE(ha->mbx_count > 32);
+	mboxes = (1ULL << ha->mbx_count) - 1;
 	if (!ha->mcp)
 		ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
 	else

From 1c3eaa2d23c86a54ee6d2f33244553d6bdeccf89 Mon Sep 17 00:00:00 2001
From: Ulf Magnusson <ulfalizer@gmail.com>
Date: Mon, 5 Feb 2018 02:21:31 +0100
Subject: [PATCH 0279/1852] ARC: Fix malformed ARC_EMUL_UNALIGNED default

[ Upstream commit 827cc2fa024dd6517d62de7a44c7b42f32af371b ]

'default N' should be 'default n', though they happen to have the same
effect here, due to undefined symbols (N in this case) evaluating to n
in a tristate sense.

Remove the default from ARC_EMUL_UNALIGNED instead of changing it. bool
and tristate symbols implicitly default to n.

Discovered with the
https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_ulfalizer_Kconfiglib_blob_master_examples_list-5Fundefined.py&d=DwIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=c14YS-cH-kdhTOW89KozFhBtBJgs1zXscZojEZQ0THs&m=WxxD8ozR7QQUVzNCBksiznaisBGO_crN7PBOvAoju8s&s=1LmxsNqxwT-7wcInVpZ6Z1J27duZKSoyKxHIJclXU_M&e=
script.

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 2d785f5a30418..c4ee25e88a7b0 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -479,7 +479,6 @@ config ARC_CURR_IN_REG
 
 config ARC_EMUL_UNALIGNED
 	bool "Emulate unaligned memory access (userspace only)"
-	default N
 	select SYSCTL_ARCH_UNALIGN_NO_WARN
 	select SYSCTL_ARCH_UNALIGN_ALLOW
 	depends on ISA_ARCOMPACT

From ef0b3fdfe45721a29f3cef5e245586f1af069bdf Mon Sep 17 00:00:00 2001
From: John Keeping <john@metanate.com>
Date: Fri, 12 Jan 2018 18:43:32 +0000
Subject: [PATCH 0280/1852] usb: gadget: f_uac2: fix bFirstInterface in
 composite gadget

[ Upstream commit 8813a59ed892305b5ac1b5b901740b1ad4b5fefa ]

If there are multiple functions associated with a configuration, then
the UAC2 interfaces may not start at zero.  Set the correct first
interface number in the association descriptor so that the audio
interfaces are enumerated correctly in this case.

Reviewed-by: Krzysztof Opasiak <k.opasiak@samsung.com>
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/function/f_uac2.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index 12064d3bddf64..b5dab103be382 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -1052,6 +1052,8 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
 		dev_err(dev, "%s:%d Error!\n", __func__, __LINE__);
 		return ret;
 	}
+	iad_desc.bFirstInterface = ret;
+
 	std_ac_if_desc.bInterfaceNumber = ret;
 	agdev->ac_intf = ret;
 	agdev->ac_alt = 0;

From ca0d0a502446409d468f7c046f2d94bc4be0cce7 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 12 Feb 2018 00:14:42 +0100
Subject: [PATCH 0281/1852] usb: gadget: fsl_udc_core: fix ep valid checks

[ Upstream commit 20c63f4089cceab803438c383631963e34c4d8e5 ]

Clang reports the following warning:
  drivers/usb/gadget/udc/fsl_udc_core.c:1312:10: warning: address of array
  'ep->name' will always evaluate to 'true' [-Wpointer-bool-conversion]
        if (ep->name)
        ~~  ~~~~^~~~

It seems that the authors intention was to check if the ep has been
configured through struct_ep_setup. Check whether struct usb_ep name
pointer has been set instead.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/udc/fsl_udc_core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
index aac0ce8aeb0bf..8991a40707926 100644
--- a/drivers/usb/gadget/udc/fsl_udc_core.c
+++ b/drivers/usb/gadget/udc/fsl_udc_core.c
@@ -1310,7 +1310,7 @@ static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
 {
 	struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
 
-	if (ep->name)
+	if (ep->ep.name)
 		nuke(ep, -ESHUTDOWN);
 }
 
@@ -1698,7 +1698,7 @@ static void dtd_complete_irq(struct fsl_udc *udc)
 		curr_ep = get_ep_by_pipe(udc, i);
 
 		/* If the ep is configured */
-		if (curr_ep->name == NULL) {
+		if (!curr_ep->ep.name) {
 			WARNING("Invalid EP?");
 			continue;
 		}

From 93fae0bc1acfc193fcc6ce2657ead1bc9d0a7645 Mon Sep 17 00:00:00 2001
From: Vardan Mikayelyan <mvardan@synopsys.com>
Date: Tue, 16 Jan 2018 16:04:24 +0400
Subject: [PATCH 0282/1852] usb: dwc2: Fix dwc2_hsotg_core_init_disconnected()

[ Upstream commit 755d739534f998d92e348fba8ffb0478416576e7 ]

We should call dwc2_hsotg_enqueue_setup() after properly
setting lx_state. Because it may cause error-out from
dwc2_hsotg_enqueue_setup() due to wrong value in lx_state.

Issue can be reproduced by loading driver while connected
A-Connector (start in A-HOST mode) then disconnect A-Connector
to switch to B-DEVICE.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/dwc2/gadget.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 0c4fa75a1f725..a2dd5fe4553c7 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2642,12 +2642,6 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
 	dwc2_writel(dwc2_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) |
 	       DXEPCTL_USBACTEP, hsotg->regs + DIEPCTL0);
 
-	dwc2_hsotg_enqueue_setup(hsotg);
-
-	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",
-		dwc2_readl(hsotg->regs + DIEPCTL0),
-		dwc2_readl(hsotg->regs + DOEPCTL0));
-
 	/* clear global NAKs */
 	val = DCTL_CGOUTNAK | DCTL_CGNPINNAK;
 	if (!is_usb_reset)
@@ -2658,6 +2652,12 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
 	mdelay(3);
 
 	hsotg->lx_state = DWC2_L0;
+
+	dwc2_hsotg_enqueue_setup(hsotg);
+
+	dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",
+		dwc2_readl(hsotg->regs + DIEPCTL0),
+		dwc2_readl(hsotg->regs + DOEPCTL0));
 }
 
 static void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg)

From 5e6c415777e624004842818f907e93f76597719e Mon Sep 17 00:00:00 2001
From: Anders Roxell <anders.roxell@linaro.org>
Date: Tue, 6 Feb 2018 16:20:44 -0600
Subject: [PATCH 0283/1852] selftests: memfd: add config fragment for fuse
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 9a606f8d55cfc932ec02172aaed4124fdc150047 ]

The memfd test requires to insert the fuse module (CONFIG_FUSE_FS).

Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Daniel Díaz <daniel.diaz@linaro.org>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/memfd/config | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 tools/testing/selftests/memfd/config

diff --git a/tools/testing/selftests/memfd/config b/tools/testing/selftests/memfd/config
new file mode 100644
index 0000000000000..835c7f4dadcd1
--- /dev/null
+++ b/tools/testing/selftests/memfd/config
@@ -0,0 +1 @@
+CONFIG_FUSE_FS=m

From 177fbf5447417d1f9955f4bebdf775f4377ad908 Mon Sep 17 00:00:00 2001
From: "Michael Kelley (EOSG)" <Michael.H.Kelley@microsoft.com>
Date: Wed, 24 Jan 2018 22:49:57 +0000
Subject: [PATCH 0284/1852] scsi: storvsc: Increase cmd_per_lun for higher
 speed devices

[ Upstream commit cabe92a55e3a12005a4ac4d3954c9a174b0efe2a ]

Increase cmd_per_lun to allow more I/Os in progress per device,
particularly for NVMe's.  The Hyper-V host side can handle the higher
count with no issues.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Reviewed-by: K. Y. Srinivasan <kys@microsoft.com>
Acked-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/storvsc_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/storvsc_drv.c b/drivers/scsi/storvsc_drv.c
index 351d81dc22009..44b7a69d022ad 100644
--- a/drivers/scsi/storvsc_drv.c
+++ b/drivers/scsi/storvsc_drv.c
@@ -1538,7 +1538,7 @@ static struct scsi_host_template scsi_driver = {
 	.eh_timed_out =		storvsc_eh_timed_out,
 	.slave_alloc =		storvsc_device_alloc,
 	.slave_configure =	storvsc_device_configure,
-	.cmd_per_lun =		255,
+	.cmd_per_lun =		2048,
 	.this_id =		-1,
 	.use_clustering =	ENABLE_CLUSTERING,
 	/* Make sure we dont get a sg segment crosses a page boundary */

From 78982d90b1ae95cfe38c7c9260e0dd7847187105 Mon Sep 17 00:00:00 2001
From: Meelis Roos <mroos@linux.ee>
Date: Fri, 9 Feb 2018 08:57:44 +0200
Subject: [PATCH 0285/1852] scsi: aacraid: fix shutdown crash when init fails

[ Upstream commit 00c20cdc79259c6c5bf978b21af96c2d3edb646d ]

When aacraid init fails with "AAC0: adapter self-test failed.", shutdown
leads to UBSAN warning and then oops:

[154316.118423] ================================================================================
[154316.118508] UBSAN: Undefined behaviour in drivers/scsi/scsi_lib.c:2328:27
[154316.118566] member access within null pointer of type 'struct Scsi_Host'
[154316.118631] CPU: 2 PID: 14530 Comm: reboot Tainted: G        W        4.15.0-dirty #89
[154316.118701] Hardware name: Hewlett Packard HP NetServer/HP System Board, BIOS 4.06.46 PW 06/25/2003
[154316.118774] Call Trace:
[154316.118848]  dump_stack+0x48/0x65
[154316.118916]  ubsan_epilogue+0xe/0x40
[154316.118976]  __ubsan_handle_type_mismatch+0xfb/0x180
[154316.119043]  scsi_block_requests+0x20/0x30
[154316.119135]  aac_shutdown+0x18/0x40 [aacraid]
[154316.119196]  pci_device_shutdown+0x33/0x50
[154316.119269]  device_shutdown+0x18a/0x390
[...]
[154316.123435] BUG: unable to handle kernel NULL pointer dereference at 000000f4
[154316.123515] IP: scsi_block_requests+0xa/0x30

This is because aac_shutdown() does

        struct Scsi_Host *shost = pci_get_drvdata(dev);
        scsi_block_requests(shost);

and that assumes shost has been assigned with pci_set_drvdata().

However, pci_set_drvdata(pdev, shost) is done in aac_probe_one() far
after bailing out with error from calling the init function
((*aac_drivers[index].init)(aac)), and when the init function fails, no
error is returned from aac_probe_one() so PCI layer assumes there is
driver attached, and tries to shut it down later.

Fix it by returning error from aac_probe_one() when card-specific init
function fails.

This fixes reboot on my HP NetRAID-4M with dead battery.

Signed-off-by: Meelis Roos <mroos@linux.ee>
Reviewed-by: Dave Carroll <david.carroll@microsemi.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/aacraid/linit.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index aa6eccb8940bc..807b9b2a53d2e 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -1189,8 +1189,10 @@ static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
 	 *	Map in the registers from the adapter.
 	 */
 	aac->base_size = AAC_MIN_FOOTPRINT_SIZE;
-	if ((*aac_drivers[index].init)(aac))
+	if ((*aac_drivers[index].init)(aac)) {
+		error = -ENODEV;
 		goto out_unmap;
+	}
 
 	if (aac->sync_mode) {
 		if (aac_sync_mode)

From 81aa925723027abae85cc0794275b5a4abb14eb2 Mon Sep 17 00:00:00 2001
From: Manish Rangankar <manish.rangankar@cavium.com>
Date: Sun, 11 Feb 2018 22:48:41 -0800
Subject: [PATCH 0286/1852] scsi: qla4xxx: skip error recovery in case of
 register disconnect.

[ Upstream commit 1bc5ad3a6acdcf56f83272f2de1cd2389ea9e9e2 ]

A system crashes when continuously removing/re-adding the storage
controller.

Signed-off-by: Manish Rangankar <manish.rangankar@cavium.com>
Reviewed-by: Ewan D. Milne <emilne@redhat.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/qla4xxx/ql4_def.h |  2 ++
 drivers/scsi/qla4xxx/ql4_os.c  | 46 ++++++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h
index a7cfc270bd08a..ce1d063f3e836 100644
--- a/drivers/scsi/qla4xxx/ql4_def.h
+++ b/drivers/scsi/qla4xxx/ql4_def.h
@@ -168,6 +168,8 @@
 #define DEV_DB_NON_PERSISTENT	0
 #define DEV_DB_PERSISTENT	1
 
+#define QL4_ISP_REG_DISCONNECT 0xffffffffU
+
 #define COPY_ISID(dst_isid, src_isid) {			\
 	int i, j;					\
 	for (i = 0, j = ISID_SIZE - 1; i < ISID_SIZE;)	\
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index 01c3610a60cf0..d8c03431d0aa8 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -262,6 +262,24 @@ static struct iscsi_transport qla4xxx_iscsi_transport = {
 
 static struct scsi_transport_template *qla4xxx_scsi_transport;
 
+static int qla4xxx_isp_check_reg(struct scsi_qla_host *ha)
+{
+	u32 reg_val = 0;
+	int rval = QLA_SUCCESS;
+
+	if (is_qla8022(ha))
+		reg_val = readl(&ha->qla4_82xx_reg->host_status);
+	else if (is_qla8032(ha) || is_qla8042(ha))
+		reg_val = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_ALIVE_COUNTER);
+	else
+		reg_val = readw(&ha->reg->ctrl_status);
+
+	if (reg_val == QL4_ISP_REG_DISCONNECT)
+		rval = QLA_ERROR;
+
+	return rval;
+}
+
 static int qla4xxx_send_ping(struct Scsi_Host *shost, uint32_t iface_num,
 			     uint32_t iface_type, uint32_t payload_size,
 			     uint32_t pid, struct sockaddr *dst_addr)
@@ -9196,10 +9214,17 @@ static int qla4xxx_eh_abort(struct scsi_cmnd *cmd)
 	struct srb *srb = NULL;
 	int ret = SUCCESS;
 	int wait = 0;
+	int rval;
 
 	ql4_printk(KERN_INFO, ha, "scsi%ld:%d:%llu: Abort command issued cmd=%p, cdb=0x%x\n",
 		   ha->host_no, id, lun, cmd, cmd->cmnd[0]);
 
+	rval = qla4xxx_isp_check_reg(ha);
+	if (rval != QLA_SUCCESS) {
+		ql4_printk(KERN_INFO, ha, "PCI/Register disconnect, exiting.\n");
+		return FAILED;
+	}
+
 	spin_lock_irqsave(&ha->hardware_lock, flags);
 	srb = (struct srb *) CMD_SP(cmd);
 	if (!srb) {
@@ -9251,6 +9276,7 @@ static int qla4xxx_eh_device_reset(struct scsi_cmnd *cmd)
 	struct scsi_qla_host *ha = to_qla_host(cmd->device->host);
 	struct ddb_entry *ddb_entry = cmd->device->hostdata;
 	int ret = FAILED, stat;
+	int rval;
 
 	if (!ddb_entry)
 		return ret;
@@ -9270,6 +9296,12 @@ static int qla4xxx_eh_device_reset(struct scsi_cmnd *cmd)
 		      cmd, jiffies, cmd->request->timeout / HZ,
 		      ha->dpc_flags, cmd->result, cmd->allowed));
 
+	rval = qla4xxx_isp_check_reg(ha);
+	if (rval != QLA_SUCCESS) {
+		ql4_printk(KERN_INFO, ha, "PCI/Register disconnect, exiting.\n");
+		return FAILED;
+	}
+
 	/* FIXME: wait for hba to go online */
 	stat = qla4xxx_reset_lun(ha, ddb_entry, cmd->device->lun);
 	if (stat != QLA_SUCCESS) {
@@ -9313,6 +9345,7 @@ static int qla4xxx_eh_target_reset(struct scsi_cmnd *cmd)
 	struct scsi_qla_host *ha = to_qla_host(cmd->device->host);
 	struct ddb_entry *ddb_entry = cmd->device->hostdata;
 	int stat, ret;
+	int rval;
 
 	if (!ddb_entry)
 		return FAILED;
@@ -9330,6 +9363,12 @@ static int qla4xxx_eh_target_reset(struct scsi_cmnd *cmd)
 		      ha->host_no, cmd, jiffies, cmd->request->timeout / HZ,
 		      ha->dpc_flags, cmd->result, cmd->allowed));
 
+	rval = qla4xxx_isp_check_reg(ha);
+	if (rval != QLA_SUCCESS) {
+		ql4_printk(KERN_INFO, ha, "PCI/Register disconnect, exiting.\n");
+		return FAILED;
+	}
+
 	stat = qla4xxx_reset_target(ha, ddb_entry);
 	if (stat != QLA_SUCCESS) {
 		starget_printk(KERN_INFO, scsi_target(cmd->device),
@@ -9384,9 +9423,16 @@ static int qla4xxx_eh_host_reset(struct scsi_cmnd *cmd)
 {
 	int return_status = FAILED;
 	struct scsi_qla_host *ha;
+	int rval;
 
 	ha = to_qla_host(cmd->device->host);
 
+	rval = qla4xxx_isp_check_reg(ha);
+	if (rval != QLA_SUCCESS) {
+		ql4_printk(KERN_INFO, ha, "PCI/Register disconnect, exiting.\n");
+		return FAILED;
+	}
+
 	if ((is_qla8032(ha) || is_qla8042(ha)) && ql4xdontresethba)
 		qla4_83xx_set_idc_dontreset(ha);
 

From 3514d065ede812911e32eeddb6b167c9932b6ac9 Mon Sep 17 00:00:00 2001
From: Qi Hou <qi.hou@windriver.com>
Date: Thu, 11 Jan 2018 12:54:43 +0800
Subject: [PATCH 0287/1852] ARM: OMAP2+: timer: fix a kmemleak caused in
 omap_get_timer_dt

[ Upstream commit db35340c536f1af0108ec9a0b2126a05d358d14a ]

When more than one GP timers are used as kernel system timers and the
corresponding nodes in device-tree are marked with the same "disabled"
property, then the "attr" field of the property will be initialized
more than once as the property being added to sys file system via
__of_add_property_sysfs().

In __of_add_property_sysfs(), the "name" field of pp->attr.attr is set
directly to the return value of safe_name(), without taking care of
whether it's already a valid pointer to a memory block. If it is, its
old value will always be overwritten by the new one and the memory block
allocated before will a "ghost", then a kmemleak happened.

That the same "disabled" property being added to different nodes of device
tree would cause that kind of kmemleak overhead, at least once.

To fix it, allocate the property dynamically, and delete static one.

Signed-off-by: Qi Hou <qi.hou@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/mach-omap2/timer.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 83fc403aec3c9..1f774ec4ab272 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -136,12 +136,6 @@ static struct clock_event_device clockevent_gpt = {
 	.tick_resume		= omap2_gp_timer_shutdown,
 };
 
-static struct property device_disabled = {
-	.name = "status",
-	.length = sizeof("disabled"),
-	.value = "disabled",
-};
-
 static const struct of_device_id omap_timer_match[] __initconst = {
 	{ .compatible = "ti,omap2420-timer", },
 	{ .compatible = "ti,omap3430-timer", },
@@ -183,8 +177,17 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
 				  of_get_property(np, "ti,timer-secure", NULL)))
 			continue;
 
-		if (!of_device_is_compatible(np, "ti,omap-counter32k"))
-			of_add_property(np, &device_disabled);
+		if (!of_device_is_compatible(np, "ti,omap-counter32k")) {
+			struct property *prop;
+
+			prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+			if (!prop)
+				return NULL;
+			prop->name = "status";
+			prop->value = "disabled";
+			prop->length = strlen(prop->value);
+			of_add_property(np, prop);
+		}
 		return np;
 	}
 

From 2472ca6e255b907b730b1b9b4db4f8fc5733db1c Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Fri, 9 Feb 2018 08:15:53 -0800
Subject: [PATCH 0288/1852] ARM: OMAP3: Fix prm wake interrupt for resume

[ Upstream commit d3be6d2a08bd26580562d9714d3d97ea9ba22c73 ]

For platform_suspend_ops, the finish call is too late to re-enable wake
irqs and we need re-enable wake irqs on wake call instead.

Otherwise noirq resume for devices has already happened. And then
dev_pm_disarm_wake_irq() has already disabled the dedicated wake irqs
when the interrupt triggers and the wake irq is never handled.

For devices that are already in PM runtime suspended state when we
enter suspend this means that a possible wake irq will never trigger.

And this can lead into a situation where a device has a pending padconf
wake irq, and the device will stay unresponsive to any further wake
irqs.

This issue can be easily reproduced by setting serial console log level
to zero, letting the serial console idle, and suspend the system from
an ssh terminal. Then try to wake up the system by typing to the serial
console.

Note that this affects only omap3 PRM interrupt as that's currently
the only omap variant that does anything in omap_pm_wake().

In general, for the wake irqs to work, the interrupt must have either
IRQF_NO_SUSPEND or IRQF_EARLY_RESUME set for it to trigger before
dev_pm_disarm_wake_irq() disables the wake irqs.

Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/mach-omap2/pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 58920bc8807bc..3d876bde8c859 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -231,7 +231,7 @@ static void omap_pm_end(void)
 	cpu_idle_poll_ctrl(false);
 }
 
-static void omap_pm_finish(void)
+static void omap_pm_wake(void)
 {
 	if (cpu_is_omap34xx())
 		omap_prcm_irq_complete();
@@ -241,7 +241,7 @@ static const struct platform_suspend_ops omap_pm_ops = {
 	.begin		= omap_pm_begin,
 	.end		= omap_pm_end,
 	.enter		= omap_pm_enter,
-	.finish		= omap_pm_finish,
+	.wake		= omap_pm_wake,
 	.valid		= suspend_valid_only_mem,
 };
 

From 186145160c95c7ef9deda352040bc5b2952911a8 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Tue, 2 Jan 2018 16:25:35 +0100
Subject: [PATCH 0289/1852] ARM: OMAP1: clock: Fix debugfs_create_*() usage

[ Upstream commit 8cbbf1745dcde7ba7e423dc70619d223de90fd43 ]

When exposing data access through debugfs, the correct
debugfs_create_*() functions must be used, depending on data type.

Remove all casts from data pointers passed to debugfs_create_*()
functions, as such casts prevent the compiler from flagging bugs.

Correct all wrong usage:
  - clk.rate is unsigned long, not u32,
  - clk.flags is u8, not u32, which exposed the successive
    clk.rate_offset and clk.src_offset fields.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/mach-omap1/clock.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 4f5fd4a084c06..034b89499bd72 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -1031,17 +1031,17 @@ static int clk_debugfs_register_one(struct clk *c)
 		return -ENOMEM;
 	c->dent = d;
 
-	d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
+	d = debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount);
 	if (!d) {
 		err = -ENOMEM;
 		goto err_out;
 	}
-	d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+	d = debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate);
 	if (!d) {
 		err = -ENOMEM;
 		goto err_out;
 	}
-	d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
+	d = debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags);
 	if (!d) {
 		err = -ENOMEM;
 		goto err_out;

From a4107c918d7614c36b787736a0f4b03410a77377 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Wed, 14 Feb 2018 15:45:07 -0800
Subject: [PATCH 0290/1852] NFC: llcp: Limit size of SDP URI

[ Upstream commit fe9c842695e26d8116b61b80bfb905356f07834b ]

The tlv_len is u8, so we need to limit the size of the SDP URI. Enforce
this both in the NLA policy and in the code that performs the allocation
and copy, to avoid writing past the end of the allocated buffer.

Fixes: d9b8d8e19b073 ("NFC: llcp: Service Name Lookup netlink interface")
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/nfc/llcp_commands.c | 4 ++++
 net/nfc/netlink.c       | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/net/nfc/llcp_commands.c b/net/nfc/llcp_commands.c
index 3621a902cb6e3..d25212b135ea7 100644
--- a/net/nfc/llcp_commands.c
+++ b/net/nfc/llcp_commands.c
@@ -149,6 +149,10 @@ struct nfc_llcp_sdp_tlv *nfc_llcp_build_sdreq_tlv(u8 tid, char *uri,
 
 	pr_debug("uri: %s, len: %zu\n", uri, uri_len);
 
+	/* sdreq->tlv_len is u8, takes uri_len, + 3 for header, + 1 for NULL */
+	if (WARN_ON_ONCE(uri_len > U8_MAX - 4))
+		return NULL;
+
 	sdreq = kzalloc(sizeof(struct nfc_llcp_sdp_tlv), GFP_KERNEL);
 	if (sdreq == NULL)
 		return NULL;
diff --git a/net/nfc/netlink.c b/net/nfc/netlink.c
index 12dfb457275de..32cb0c87e8522 100644
--- a/net/nfc/netlink.c
+++ b/net/nfc/netlink.c
@@ -68,7 +68,8 @@ static const struct nla_policy nfc_genl_policy[NFC_ATTR_MAX + 1] = {
 };
 
 static const struct nla_policy nfc_sdp_genl_policy[NFC_SDP_ATTR_MAX + 1] = {
-	[NFC_SDP_ATTR_URI] = { .type = NLA_STRING },
+	[NFC_SDP_ATTR_URI] = { .type = NLA_STRING,
+			       .len = U8_MAX - 4 },
 	[NFC_SDP_ATTR_SAP] = { .type = NLA_U8 },
 };
 

From f8a2daef9c90fe951fd723c2c5338d29e496dfd4 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Sat, 10 Feb 2018 13:20:34 +0100
Subject: [PATCH 0291/1852] mac80211: round IEEE80211_TX_STATUS_HEADROOM up to
 multiple of 4

[ Upstream commit 651b9920d7a694ffb1f885aef2bbb068a25d9d66 ]

This ensures that mac80211 allocated management frames are properly
aligned, which makes copying them more efficient.
For instance, mt76 uses iowrite32_copy to copy beacon frames to beacon
template memory on the chip.
Misaligned 32-bit accesses cause CPU exceptions on MIPS and should be
avoided.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/mac80211.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 7a49a31f6ddcc..ec11cb1c0d808 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -3898,7 +3898,7 @@ static inline int ieee80211_sta_ps_transition_ni(struct ieee80211_sta *sta,
  * The TX headroom reserved by mac80211 for its own tx_status functions.
  * This is enough for the radiotap header.
  */
-#define IEEE80211_TX_STATUS_HEADROOM	14
+#define IEEE80211_TX_STATUS_HEADROOM	ALIGN(14, 4)
 
 /**
  * ieee80211_sta_set_buffered - inform mac80211 about driver-buffered frames

From e40b36d6bb1a136f995c776b5c4cd1dca2a7be0e Mon Sep 17 00:00:00 2001
From: Yufen Yu <yuyufen@huawei.com>
Date: Tue, 6 Feb 2018 17:39:15 +0800
Subject: [PATCH 0292/1852] md raid10: fix NULL deference in
 handle_write_completed()

[ Upstream commit 01a69cab01c184d3786af09e9339311123d63d22 ]

In the case of 'recover', an r10bio with R10BIO_WriteError &
R10BIO_IsRecover will be progressed by handle_write_completed().
This function traverses all r10bio->devs[copies].
If devs[m].repl_bio != NULL, it thinks conf->mirrors[dev].replacement
is also not NULL. However, this is not always true.

When there is an rdev of raid10 has replacement, then each r10bio
->devs[m].repl_bio != NULL in conf->r10buf_pool. However, in 'recover',
even if corresponded replacement is NULL, it doesn't clear r10bio
->devs[m].repl_bio, resulting in replacement NULL deference.

This bug was introduced when replacement support for raid10 was
added in Linux 3.3.

As NeilBrown suggested:
	Elsewhere the determination of "is this device part of the
	resync/recovery" is made by resting bio->bi_end_io.
	If this is end_sync_write, then we tried to write here.
	If it is NULL, then we didn't try to write.

Fixes: 9ad1aefc8ae8 ("md/raid10:  Handle replacement devices during resync.")
Cc: stable (V3.3+)
Suggested-by: NeilBrown <neilb@suse.com>
Signed-off-by: Yufen Yu <yuyufen@huawei.com>
Signed-off-by: Shaohua Li <sh.li@alibaba-inc.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/raid10.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index bf0410403a6f8..7b6acedc89c17 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -2630,7 +2630,8 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)
 		for (m = 0; m < conf->copies; m++) {
 			int dev = r10_bio->devs[m].devnum;
 			rdev = conf->mirrors[dev].rdev;
-			if (r10_bio->devs[m].bio == NULL)
+			if (r10_bio->devs[m].bio == NULL ||
+				r10_bio->devs[m].bio->bi_end_io == NULL)
 				continue;
 			if (!r10_bio->devs[m].bio->bi_error) {
 				rdev_clear_badblocks(
@@ -2645,7 +2646,8 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)
 					md_error(conf->mddev, rdev);
 			}
 			rdev = conf->mirrors[dev].replacement;
-			if (r10_bio->devs[m].repl_bio == NULL)
+			if (r10_bio->devs[m].repl_bio == NULL ||
+				r10_bio->devs[m].repl_bio->bi_end_io == NULL)
 				continue;
 
 			if (!r10_bio->devs[m].repl_bio->bi_error) {

From 85025b02abd779bb206951287aec15fd60623f99 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Mon, 5 Feb 2018 21:09:59 +0100
Subject: [PATCH 0293/1852] drm/exynos: fix comparison to bitshift when dealing
 with a mask

[ Upstream commit 1293b6191010672c0c9dacae8f71c6f3e4d70cbe ]

Due to a typo, the mask was destroyed by a comparison instead of a bit
shift.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/exynos/regs-fimc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/regs-fimc.h b/drivers/gpu/drm/exynos/regs-fimc.h
index 30496134a3d07..d7cbe53c4c01f 100644
--- a/drivers/gpu/drm/exynos/regs-fimc.h
+++ b/drivers/gpu/drm/exynos/regs-fimc.h
@@ -569,7 +569,7 @@
 #define EXYNOS_CIIMGEFF_FIN_EMBOSSING		(4 << 26)
 #define EXYNOS_CIIMGEFF_FIN_SILHOUETTE		(5 << 26)
 #define EXYNOS_CIIMGEFF_FIN_MASK			(7 << 26)
-#define EXYNOS_CIIMGEFF_PAT_CBCR_MASK		((0xff < 13) | (0xff < 0))
+#define EXYNOS_CIIMGEFF_PAT_CBCR_MASK		((0xff << 13) | (0xff << 0))
 
 /* Real input DMA size register */
 #define EXYNOS_CIREAL_ISIZE_AUTOLOAD_ENABLE	(1 << 31)

From 4505d54bd975e5ab49fbcbbff3da57309e28298f Mon Sep 17 00:00:00 2001
From: Andreas Kemnade <andreas@kemnade.info>
Date: Tue, 20 Feb 2018 07:30:10 -0600
Subject: [PATCH 0294/1852] usb: musb: fix enumeration after resume

[ Upstream commit 17539f2f4f0b7fa906b508765c8ada07a1e45f52 ]

On dm3730 there are enumeration problems after resume.
Investigation led to the cause that the MUSB_POWER_SOFTCONN
bit is not set. If it was set before suspend (because it
was enabled via musb_pullup()), it is set in
musb_restore_context() so the pullup is enabled. But then
musb_start() is called which overwrites MUSB_POWER and
therefore disables MUSB_POWER_SOFTCONN, so no pullup is
enabled and the device is not enumerated.

So let's do a subset of what musb_start() does
in the same way as musb_suspend() does it. Platform-specific
stuff it still called as there might be some phy-related stuff
which needs to be enabled.
Also interrupts are enabled, as it was the original idea
of calling musb_start() in musb_resume() according to
Commit 6fc6f4b87cb3 ("usb: musb: Disable interrupts on suspend,
enable them on resume")

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/musb/musb_core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 06d83825923a5..c6cd8691967f1 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -2522,7 +2522,8 @@ static int musb_resume(struct device *dev)
 	pm_runtime_set_active(dev);
 	pm_runtime_enable(dev);
 
-	musb_start(musb);
+	musb_enable_interrupts(musb);
+	musb_platform_enable(musb);
 
 	return 0;
 }

From 8be1d7cf9d96c6bdf2b9ec04702c1d2da47ef189 Mon Sep 17 00:00:00 2001
From: Andrea Parri <parri.andrea@gmail.com>
Date: Tue, 20 Feb 2018 19:45:56 +0100
Subject: [PATCH 0295/1852] locking/xchg/alpha: Add unconditional memory
 barrier to cmpxchg()

[ Upstream commit cb13b424e986aed68d74cbaec3449ea23c50e167 ]

Continuing along with the fight against smp_read_barrier_depends() [1]
(or rather, against its improper use), add an unconditional barrier to
cmpxchg.  This guarantees that dependency ordering is preserved when a
dependency is headed by an unsuccessful cmpxchg.  As it turns out, the
change could enable further simplification of LKMM as proposed in [2].

[1] https://marc.info/?l=linux-kernel&m=150884953419377&w=2
    https://marc.info/?l=linux-kernel&m=150884946319353&w=2
    https://marc.info/?l=linux-kernel&m=151215810824468&w=2
    https://marc.info/?l=linux-kernel&m=151215816324484&w=2

[2] https://marc.info/?l=linux-kernel&m=151881978314872&w=2

Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-alpha@vger.kernel.org
Link: http://lkml.kernel.org/r/1519152356-4804-1-git-send-email-parri.andrea@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/alpha/include/asm/xchg.h | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/alpha/include/asm/xchg.h b/arch/alpha/include/asm/xchg.h
index 0ca9724597c16..d0a1cf4c7010e 100644
--- a/arch/alpha/include/asm/xchg.h
+++ b/arch/alpha/include/asm/xchg.h
@@ -127,10 +127,9 @@ ____xchg(, volatile void *ptr, unsigned long x, int size)
  * store NEW in MEM.  Return the initial value in MEM.  Success is
  * indicated by comparing RETURN with OLD.
  *
- * The memory barrier should be placed in SMP only when we actually
- * make the change. If we don't change anything (so if the returned
- * prev is equal to old) then we aren't acquiring anything new and
- * we don't need any memory barrier as far I can tell.
+ * The memory barrier is placed in SMP unconditionally, in order to
+ * guarantee that dependency ordering is preserved when a dependency
+ * is headed by an unsuccessful operation.
  */
 
 static inline unsigned long
@@ -149,8 +148,8 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
 	"	or	%1,%2,%2\n"
 	"	stq_c	%2,0(%4)\n"
 	"	beq	%2,3f\n"
-		__ASM__MB
 	"2:\n"
+		__ASM__MB
 	".subsection 2\n"
 	"3:	br	1b\n"
 	".previous"
@@ -176,8 +175,8 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
 	"	or	%1,%2,%2\n"
 	"	stq_c	%2,0(%4)\n"
 	"	beq	%2,3f\n"
-		__ASM__MB
 	"2:\n"
+		__ASM__MB
 	".subsection 2\n"
 	"3:	br	1b\n"
 	".previous"
@@ -199,8 +198,8 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
 	"	mov %4,%1\n"
 	"	stl_c %1,%2\n"
 	"	beq %1,3f\n"
-		__ASM__MB
 	"2:\n"
+		__ASM__MB
 	".subsection 2\n"
 	"3:	br 1b\n"
 	".previous"
@@ -222,8 +221,8 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
 	"	mov %4,%1\n"
 	"	stq_c %1,%2\n"
 	"	beq %1,3f\n"
-		__ASM__MB
 	"2:\n"
+		__ASM__MB
 	".subsection 2\n"
 	"3:	br 1b\n"
 	".previous"

From 4e9d2e7f6fdfd1b631f0463cc494879d9e2bb586 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Tue, 20 Feb 2018 14:09:11 +0100
Subject: [PATCH 0296/1852] md: raid5: avoid string overflow warning

[ Upstream commit 53b8d89ddbdbb0e4625a46d2cdbb6f106c52f801 ]

gcc warns about a possible overflow of the kmem_cache string, when adding
four characters to a string of the same length:

drivers/md/raid5.c: In function 'setup_conf':
drivers/md/raid5.c:2207:34: error: '-alt' directive writing 4 bytes into a region of size between 1 and 32 [-Werror=format-overflow=]
  sprintf(conf->cache_name[1], "%s-alt", conf->cache_name[0]);
                                  ^~~~
drivers/md/raid5.c:2207:2: note: 'sprintf' output between 5 and 36 bytes into a destination of size 32
  sprintf(conf->cache_name[1], "%s-alt", conf->cache_name[0]);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

If I'm counting correctly, we need 11 characters for the fixed part
of the string and 18 characters for a 64-bit pointer (when no gendisk
is used), so that leaves three characters for conf->level, which should
always be sufficient.

This makes the code use snprintf() with the correct length, to
make the code more robust against changes, and to get the compiler
to shut up.

In commit f4be6b43f1ac ("md/raid5: ensure we create a unique name for
kmem_cache when mddev has no gendisk") from 2010, Neil said that
the pointer could be removed "shortly" once devices without gendisk
are disallowed. I have no idea if that happened, but if it did, that
should probably be changed as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shaohua Li <sh.li@alibaba-inc.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/raid5.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index e2130fb4597d7..d59b861764a10 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -2028,15 +2028,16 @@ static int grow_one_stripe(struct r5conf *conf, gfp_t gfp)
 static int grow_stripes(struct r5conf *conf, int num)
 {
 	struct kmem_cache *sc;
+	size_t namelen = sizeof(conf->cache_name[0]);
 	int devs = max(conf->raid_disks, conf->previous_raid_disks);
 
 	if (conf->mddev->gendisk)
-		sprintf(conf->cache_name[0],
+		snprintf(conf->cache_name[0], namelen,
 			"raid%d-%s", conf->level, mdname(conf->mddev));
 	else
-		sprintf(conf->cache_name[0],
+		snprintf(conf->cache_name[0], namelen,
 			"raid%d-%p", conf->level, conf->mddev);
-	sprintf(conf->cache_name[1], "%s-alt", conf->cache_name[0]);
+	snprintf(conf->cache_name[1], namelen, "%.27s-alt", conf->cache_name[0]);
 
 	conf->active_name = 0;
 	sc = kmem_cache_create(conf->cache_name[conf->active_name],

From 704748833a7cb7d8850a2c95e37be6c046c7d445 Mon Sep 17 00:00:00 2001
From: David Rientjes <rientjes@google.com>
Date: Wed, 21 Feb 2018 14:45:32 -0800
Subject: [PATCH 0297/1852] kernel/relay.c: limit kmalloc size to
 KMALLOC_MAX_SIZE

[ Upstream commit 88913bd8ea2a75d7e460a4bed5f75e1c32660d7e ]

chan->n_subbufs is set by the user and relay_create_buf() does a kmalloc()
of chan->n_subbufs * sizeof(size_t *).

kmalloc_slab() will generate a warning when this fails if
chan->subbufs * sizeof(size_t *) > KMALLOC_MAX_SIZE.

Limit chan->n_subbufs to the maximum allowed kmalloc() size.

Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1802061216100.122576@chino.kir.corp.google.com
Fixes: f6302f1bcd75 ("relay: prevent integer overflow in relay_open()")
Signed-off-by: David Rientjes <rientjes@google.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/relay.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/relay.c b/kernel/relay.c
index 0b4570cfacaeb..f6d5f08bdfaa5 100644
--- a/kernel/relay.c
+++ b/kernel/relay.c
@@ -163,7 +163,7 @@ static struct rchan_buf *relay_create_buf(struct rchan *chan)
 {
 	struct rchan_buf *buf;
 
-	if (chan->n_subbufs > UINT_MAX / sizeof(size_t *))
+	if (chan->n_subbufs > KMALLOC_MAX_SIZE / sizeof(size_t *))
 		return NULL;
 
 	buf = kzalloc(sizeof(struct rchan_buf), GFP_KERNEL);

From cac5c98864143a0186dff6a9aea1a002e1726b52 Mon Sep 17 00:00:00 2001
From: Mark Lord <mlord@pobox.com>
Date: Tue, 20 Feb 2018 14:49:20 -0500
Subject: [PATCH 0298/1852] powerpc/bpf/jit: Fix 32-bit JIT for seccomp_data
 access

[ Upstream commit 083b20907185b076f21c265b30fe5b5f24c03d8c ]

I am using SECCOMP to filter syscalls on a ppc32 platform, and noticed
that the JIT compiler was failing on the BPF even though the
interpreter was working fine.

The issue was that the compiler was missing one of the instructions
used by SECCOMP, so here is a patch to enable JIT for that
instruction.

Fixes: eb84bab0fb38 ("ppc: Kconfig: Enable BPF JIT on ppc32")
Signed-off-by: Mark Lord <mlord@pobox.com>
Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/net/bpf_jit_comp.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 2d66a8446198d..345e255c06a25 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -329,6 +329,9 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 			BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
 			PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, len));
 			break;
+		case BPF_LDX | BPF_W | BPF_ABS: /* A = *((u32 *)(seccomp_data + K)); */
+			PPC_LWZ_OFFS(r_A, r_skb, K);
+			break;
 		case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
 			PPC_LWZ_OFFS(r_X, r_skb, offsetof(struct sk_buff, len));
 			break;

From 905f7fea1200453991b35bbb1f9b954c453d02ac Mon Sep 17 00:00:00 2001
From: Sebastian Ott <sebott@linux.vnet.ibm.com>
Date: Wed, 7 Feb 2018 13:18:19 +0100
Subject: [PATCH 0299/1852] s390/cio: fix return code after missing interrupt

[ Upstream commit 770b55c995d171f026a9efb85e71e3b1ea47b93d ]

When a timeout occurs for users of ccw_device_start_timeout
we will stop the IO and call the drivers int handler with
the irb pointer set to ERR_PTR(-ETIMEDOUT). Sometimes
however we'd set the irb pointer to ERR_PTR(-EIO) which is
not intended. Just set the correct value in all codepaths.

Reported-by: Julian Wiedmann <jwi@linux.vnet.ibm.com>
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/cio/device_fsm.c | 6 ++++--
 drivers/s390/cio/io_sch.h     | 1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/s390/cio/device_fsm.c b/drivers/s390/cio/device_fsm.c
index 92e03b42e661f..f605421a47d8b 100644
--- a/drivers/s390/cio/device_fsm.c
+++ b/drivers/s390/cio/device_fsm.c
@@ -822,6 +822,7 @@ ccw_device_online_timeout(struct ccw_device *cdev, enum dev_event dev_event)
 
 	ccw_device_set_timeout(cdev, 0);
 	cdev->private->iretry = 255;
+	cdev->private->async_kill_io_rc = -ETIMEDOUT;
 	ret = ccw_device_cancel_halt_clear(cdev);
 	if (ret == -EBUSY) {
 		ccw_device_set_timeout(cdev, 3*HZ);
@@ -898,7 +899,7 @@ ccw_device_killing_irq(struct ccw_device *cdev, enum dev_event dev_event)
 	/* OK, i/o is dead now. Call interrupt handler. */
 	if (cdev->handler)
 		cdev->handler(cdev, cdev->private->intparm,
-			      ERR_PTR(-EIO));
+			      ERR_PTR(cdev->private->async_kill_io_rc));
 }
 
 static void
@@ -915,7 +916,7 @@ ccw_device_killing_timeout(struct ccw_device *cdev, enum dev_event dev_event)
 	ccw_device_online_verify(cdev, 0);
 	if (cdev->handler)
 		cdev->handler(cdev, cdev->private->intparm,
-			      ERR_PTR(-EIO));
+			      ERR_PTR(cdev->private->async_kill_io_rc));
 }
 
 void ccw_device_kill_io(struct ccw_device *cdev)
@@ -923,6 +924,7 @@ void ccw_device_kill_io(struct ccw_device *cdev)
 	int ret;
 
 	cdev->private->iretry = 255;
+	cdev->private->async_kill_io_rc = -EIO;
 	ret = ccw_device_cancel_halt_clear(cdev);
 	if (ret == -EBUSY) {
 		ccw_device_set_timeout(cdev, 3*HZ);
diff --git a/drivers/s390/cio/io_sch.h b/drivers/s390/cio/io_sch.h
index b108f4a5c7dd3..b142c7a389b7e 100644
--- a/drivers/s390/cio/io_sch.h
+++ b/drivers/s390/cio/io_sch.h
@@ -155,6 +155,7 @@ struct ccw_device_private {
 	unsigned long intparm;	/* user interruption parameter */
 	struct qdio_irq *qdio_data;
 	struct irb irb;		/* device status */
+	int async_kill_io_rc;
 	struct senseid senseid;	/* SenseID info */
 	struct pgid pgid[8];	/* path group IDs per chpid*/
 	struct ccw1 iccws[2];	/* ccws for SNID/SID/SPGID commands */

From a8af53cbf2106428d9126ecd770bd15177a8a7a6 Mon Sep 17 00:00:00 2001
From: Sebastian Ott <sebott@linux.vnet.ibm.com>
Date: Mon, 12 Feb 2018 12:01:03 +0100
Subject: [PATCH 0300/1852] s390/cio: clear timer when terminating driver I/O

[ Upstream commit 410d5e13e7638bc146321671e223d56495fbf3c7 ]

When we terminate driver I/O (because we need to stop using a certain
channel path) we also need to ensure that a timer (which may have been
set up using ccw_device_start_timeout) is cleared.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/cio/device_fsm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/s390/cio/device_fsm.c b/drivers/s390/cio/device_fsm.c
index f605421a47d8b..3fc73b5894f09 100644
--- a/drivers/s390/cio/device_fsm.c
+++ b/drivers/s390/cio/device_fsm.c
@@ -923,6 +923,7 @@ void ccw_device_kill_io(struct ccw_device *cdev)
 {
 	int ret;
 
+	ccw_device_set_timeout(cdev, 0);
 	cdev->private->iretry = 255;
 	cdev->private->async_kill_io_rc = -EIO;
 	ret = ccw_device_cancel_halt_clear(cdev);

From 652b14d49bb195973338ebff72a18850886911d5 Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Thu, 22 Feb 2018 10:02:49 -0800
Subject: [PATCH 0301/1852] ARM: OMAP: Fix dmtimer init for omap1

[ Upstream commit ba6887836178d43b3665b9da075c2c5dfe1d207c ]

We need to enable PM runtime on omap1 also as otherwise we
will get errors:

omap_timer omap_timer.1: omap_dm_timer_probe: pm_runtime_get_sync failed!
omap_timer: probe of omap_timer.1 failed with error -13
...

We are checking for OMAP_TIMER_NEEDS_RESET flag elsewhere so this is
safe to do.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/plat-omap/dmtimer.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 8ca94d379bc35..6f75c32dc3bf0 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -854,11 +854,8 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
 	timer->irq = irq->start;
 	timer->pdev = pdev;
 
-	/* Skip pm_runtime_enable for OMAP1 */
-	if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
-		pm_runtime_enable(dev);
-		pm_runtime_irq_safe(dev);
-	}
+	pm_runtime_enable(dev);
+	pm_runtime_irq_safe(dev);
 
 	if (!timer->reserved) {
 		ret = pm_runtime_get_sync(dev);

From 0692003c9462ccfb82f951f957c99ada03caf5c4 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Tue, 20 Feb 2018 21:42:26 -0800
Subject: [PATCH 0302/1852] smsc75xx: fix smsc75xx_set_features()

[ Upstream commit 88e80c62671ceecdbb77c902731ec95a4bfa62f9 ]

If an attempt is made to disable RX checksums, USB adapter is changed
but netdev->features is not, because smsc75xx_set_features() returns a
non zero value.

This throws errors from netdev_rx_csum_fault() :
<devname>: hw csum failure

Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Steve Glendinning <steve.glendinning@shawell.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/smsc75xx.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/usb/smsc75xx.c b/drivers/net/usb/smsc75xx.c
index c5f375befd2f0..7337e6c0e1263 100644
--- a/drivers/net/usb/smsc75xx.c
+++ b/drivers/net/usb/smsc75xx.c
@@ -945,10 +945,11 @@ static int smsc75xx_set_features(struct net_device *netdev,
 	/* it's racing here! */
 
 	ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
-	if (ret < 0)
+	if (ret < 0) {
 		netdev_warn(dev->net, "Error writing RFE_CTL\n");
-
-	return ret;
+		return ret;
+	}
+	return 0;
 }
 
 static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)

From 129b591b3dc83a2d9442c2c09953d3121e112028 Mon Sep 17 00:00:00 2001
From: Johannes Berg <johannes.berg@intel.com>
Date: Thu, 22 Feb 2018 20:55:28 +0100
Subject: [PATCH 0303/1852] regulatory: add NUL to request alpha2

[ Upstream commit 657308f73e674e86b60509a430a46e569bf02846 ]

Similar to the ancient commit a5fe8e7695dc ("regulatory: add NUL
to alpha2"), add another byte to alpha2 in the request struct so
that when we use nla_put_string(), we don't overrun anything.

Fixes: 73d54c9e74c4 ("cfg80211: add regulatory netlink multicast group")
Reported-by: Kees Cook <keescook@google.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/regulatory.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/net/regulatory.h b/include/net/regulatory.h
index ebc5a2ed86317..f83cacce33085 100644
--- a/include/net/regulatory.h
+++ b/include/net/regulatory.h
@@ -78,7 +78,7 @@ struct regulatory_request {
 	int wiphy_idx;
 	enum nl80211_reg_initiator initiator;
 	enum nl80211_user_reg_hint_type user_reg_hint_type;
-	char alpha2[2];
+	char alpha2[3];
 	enum nl80211_dfs_regions dfs_region;
 	bool intersect;
 	bool processed;

From 612ef172f168afbece2fdf7f77fa2d0bd29e1f05 Mon Sep 17 00:00:00 2001
From: Andrea Parri <parri.andrea@gmail.com>
Date: Thu, 22 Feb 2018 10:24:48 +0100
Subject: [PATCH 0304/1852] locking/xchg/alpha: Fix xchg() and cmpxchg() memory
 ordering bugs

[ Upstream commit 472e8c55cf6622d1c112dc2bc777f68bbd4189db ]

Successful RMW operations are supposed to be fully ordered, but
Alpha's xchg() and cmpxchg() do not meet this requirement.

Will Deacon noticed the bug:

  > So MP using xchg:
  >
  > WRITE_ONCE(x, 1)
  > xchg(y, 1)
  >
  > smp_load_acquire(y) == 1
  > READ_ONCE(x) == 0
  >
  > would be allowed.

... which thus violates the above requirement.

Fix it by adding a leading smp_mb() to the xchg() and cmpxchg() implementations.

Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-alpha@vger.kernel.org
Link: http://lkml.kernel.org/r/1519291488-5752-1-git-send-email-parri.andrea@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/alpha/include/asm/xchg.h | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/arch/alpha/include/asm/xchg.h b/arch/alpha/include/asm/xchg.h
index d0a1cf4c7010e..7081e52291d07 100644
--- a/arch/alpha/include/asm/xchg.h
+++ b/arch/alpha/include/asm/xchg.h
@@ -11,6 +11,10 @@
  * Atomic exchange.
  * Since it can be used to implement critical sections
  * it must clobber "memory" (also for interrupts in UP).
+ *
+ * The leading and the trailing memory barriers guarantee that these
+ * operations are fully ordered.
+ *
  */
 
 static inline unsigned long
@@ -18,6 +22,7 @@ ____xchg(_u8, volatile char *m, unsigned long val)
 {
 	unsigned long ret, tmp, addr64;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"	andnot	%4,7,%3\n"
 	"	insbl	%1,%4,%1\n"
@@ -42,6 +47,7 @@ ____xchg(_u16, volatile short *m, unsigned long val)
 {
 	unsigned long ret, tmp, addr64;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"	andnot	%4,7,%3\n"
 	"	inswl	%1,%4,%1\n"
@@ -66,6 +72,7 @@ ____xchg(_u32, volatile int *m, unsigned long val)
 {
 	unsigned long dummy;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"1:	ldl_l %0,%4\n"
 	"	bis $31,%3,%1\n"
@@ -86,6 +93,7 @@ ____xchg(_u64, volatile long *m, unsigned long val)
 {
 	unsigned long dummy;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"1:	ldq_l %0,%4\n"
 	"	bis $31,%3,%1\n"
@@ -127,9 +135,12 @@ ____xchg(, volatile void *ptr, unsigned long x, int size)
  * store NEW in MEM.  Return the initial value in MEM.  Success is
  * indicated by comparing RETURN with OLD.
  *
- * The memory barrier is placed in SMP unconditionally, in order to
- * guarantee that dependency ordering is preserved when a dependency
- * is headed by an unsuccessful operation.
+ * The leading and the trailing memory barriers guarantee that these
+ * operations are fully ordered.
+ *
+ * The trailing memory barrier is placed in SMP unconditionally, in
+ * order to guarantee that dependency ordering is preserved when a
+ * dependency is headed by an unsuccessful operation.
  */
 
 static inline unsigned long
@@ -137,6 +148,7 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
 {
 	unsigned long prev, tmp, cmp, addr64;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"	andnot	%5,7,%4\n"
 	"	insbl	%1,%5,%1\n"
@@ -164,6 +176,7 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
 {
 	unsigned long prev, tmp, cmp, addr64;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"	andnot	%5,7,%4\n"
 	"	inswl	%1,%5,%1\n"
@@ -191,6 +204,7 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
 {
 	unsigned long prev, cmp;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"1:	ldl_l %0,%5\n"
 	"	cmpeq %0,%3,%1\n"
@@ -214,6 +228,7 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
 {
 	unsigned long prev, cmp;
 
+	smp_mb();
 	__asm__ __volatile__(
 	"1:	ldq_l %0,%5\n"
 	"	cmpeq %0,%3,%1\n"

From f79b724dc6db6484297c48828d192fadb5e2773f Mon Sep 17 00:00:00 2001
From: Samuel Neves <sneves@dei.uc.pt>
Date: Wed, 21 Feb 2018 20:50:36 +0000
Subject: [PATCH 0305/1852] x86/topology: Update the 'cpu cores' field in
 /proc/cpuinfo correctly across CPU hotplug operations

[ Upstream commit 4596749339e06dc7a424fc08a15eded850ed78b7 ]

Without this fix, /proc/cpuinfo will display an incorrect amount
of CPU cores, after bringing them offline and online again, as
exemplified below:

  $ cat /proc/cpuinfo | grep cores
  cpu cores	: 4
  cpu cores	: 8
  cpu cores	: 8
  cpu cores	: 20
  cpu cores	: 4
  cpu cores	: 3
  cpu cores	: 2
  cpu cores	: 2

This patch fixes this by always zeroing the booted_cores variable
upon turning off a logical CPU.

Tested-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
Signed-off-by: Samuel Neves <sneves@dei.uc.pt>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: jgross@suse.com
Cc: luto@kernel.org
Cc: prarit@redhat.com
Cc: vkuznets@redhat.com
Link: http://lkml.kernel.org/r/20180221205036.5244-1-sneves@dei.uc.pt
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/smpboot.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 00c7878043efc..48ca93242bfdd 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1344,6 +1344,7 @@ static void remove_siblinginfo(int cpu)
 	cpumask_clear(topology_core_cpumask(cpu));
 	c->phys_proc_id = 0;
 	c->cpu_core_id = 0;
+	c->booted_cores = 0;
 	cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
 }
 

From 1ae5b7ee67764624afdf5bd729573580b00640dc Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Date: Sun, 11 Feb 2018 05:44:21 -0500
Subject: [PATCH 0306/1852] media: dmxdev: fix error code for invalid ioctls

[ Upstream commit a145f64c6107d3aa5a7cec9f8977d04ac2a896c9 ]

Returning -EINVAL when an ioctl is not implemented is a very
bad idea, as it is hard to distinguish from other error
contitions that an ioctl could lead. Replace it by its
right error code: -ENOTTY.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/dvb-core/dmxdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/dvb-core/dmxdev.c b/drivers/media/dvb-core/dmxdev.c
index ea9abde902e9e..209db65ab610e 100644
--- a/drivers/media/dvb-core/dmxdev.c
+++ b/drivers/media/dvb-core/dmxdev.c
@@ -1071,7 +1071,7 @@ static int dvb_demux_do_ioctl(struct file *file,
 		break;
 
 	default:
-		ret = -EINVAL;
+		ret = -ENOTTY;
 		break;
 	}
 	mutex_unlock(&dmxdev->mutex);

From 8d2739a03af53980dac5f9d7098accd5ffa1c3c4 Mon Sep 17 00:00:00 2001
From: Yufen Yu <yuyufen@huawei.com>
Date: Sat, 24 Feb 2018 12:05:56 +0800
Subject: [PATCH 0307/1852] md/raid1: fix NULL pointer dereference

[ Upstream commit 3de59bb9d551428cbdc76a9ea57883f82e350b4d ]

In handle_write_finished(), if r1_bio->bios[m] != NULL, it thinks
the corresponding conf->mirrors[m].rdev is also not NULL. But, it
is not always true.

Even if some io hold replacement rdev(i.e. rdev->nr_pending.count > 0),
raid1_remove_disk() can also set the rdev as NULL. That means,
bios[m] != NULL, but mirrors[m].rdev is NULL, resulting in NULL
pointer dereference in handle_write_finished and sync_request_write.

This patch can fix BUGs as follows:

 BUG: unable to handle kernel NULL pointer dereference at 0000000000000140
 IP: [<ffffffff815bbbbd>] raid1d+0x2bd/0xfc0
 PGD 12ab52067 PUD 12f587067 PMD 0
 Oops: 0000 [#1] SMP
 CPU: 1 PID: 2008 Comm: md3_raid1 Not tainted 4.1.44+ #130
 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-1.fc26 04/01/2014
 Call Trace:
  ? schedule+0x37/0x90
  ? prepare_to_wait_event+0x83/0xf0
  md_thread+0x144/0x150
  ? wake_atomic_t_function+0x70/0x70
  ? md_start_sync+0xf0/0xf0
  kthread+0xd8/0xf0
  ? kthread_worker_fn+0x160/0x160
  ret_from_fork+0x42/0x70
  ? kthread_worker_fn+0x160/0x160

 BUG: unable to handle kernel NULL pointer dereference at 00000000000000b8
 IP: sync_request_write+0x9e/0x980
 PGD 800000007c518067 P4D 800000007c518067 PUD 8002b067 PMD 0
 Oops: 0000 [#1] SMP PTI
 CPU: 24 PID: 2549 Comm: md3_raid1 Not tainted 4.15.0+ #118
 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-1.fc26 04/01/2014
 Call Trace:
  ? sched_clock+0x5/0x10
  ? sched_clock_cpu+0xc/0xb0
  ? flush_pending_writes+0x3a/0xd0
  ? pick_next_task_fair+0x4d5/0x5f0
  ? __switch_to+0xa2/0x430
  raid1d+0x65a/0x870
  ? find_pers+0x70/0x70
  ? find_pers+0x70/0x70
  ? md_thread+0x11c/0x160
  md_thread+0x11c/0x160
  ? finish_wait+0x80/0x80
  kthread+0x111/0x130
  ? kthread_create_worker_on_cpu+0x70/0x70
  ? do_syscall_64+0x6f/0x190
  ? SyS_exit_group+0x10/0x10
  ret_from_fork+0x35/0x40

Reviewed-by: NeilBrown <neilb@suse.com>
Signed-off-by: Yufen Yu <yuyufen@huawei.com>
Signed-off-by: Shaohua Li <sh.li@alibaba-inc.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/raid1.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index f24a9e14021d0..89dcbf2fa8460 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -1686,6 +1686,17 @@ static int raid1_remove_disk(struct mddev *mddev, struct md_rdev *rdev)
 			struct md_rdev *repl =
 				conf->mirrors[conf->raid_disks + number].rdev;
 			freeze_array(conf, 0);
+			if (atomic_read(&repl->nr_pending)) {
+				/* It means that some queued IO of retry_list
+				 * hold repl. Thus, we cannot set replacement
+				 * as NULL, avoiding rdev NULL pointer
+				 * dereference in sync_request_write and
+				 * handle_write_finished.
+				 */
+				err = -EBUSY;
+				unfreeze_array(conf);
+				goto abort;
+			}
 			clear_bit(Replacement, &repl->flags);
 			p->rdev = repl;
 			conf->mirrors[conf->raid_disks + number].rdev = NULL;

From 0c613eb8041aa7305b009a86b2f50586db168573 Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Tue, 23 Jan 2018 10:59:49 +0100
Subject: [PATCH 0308/1852] batman-adv: fix packet checksum in receive path

[ Upstream commit abd6360591d3f8259f41c34e31ac4826dfe621b8 ]

eth_type_trans() internally calls skb_pull(), which does not adjust the
skb checksum; skb_postpull_rcsum() is necessary to avoid log spam of the
form "bat0: hw csum failure" when packets with CHECKSUM_COMPLETE are
received.

Note that in usual setups, packets don't reach batman-adv with
CHECKSUM_COMPLETE (I assume NICs bail out of checksumming when they see
batadv's ethtype?), which is why the log messages do not occur on every
system using batman-adv. I could reproduce this issue by stacking
batman-adv on top of a VXLAN interface.

Fixes: c6c8fea29769 ("net: Add batman-adv meshing protocol")
Tested-by: Maximilian Wilhelm <max@sdn.clinic>
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/batman-adv/soft-interface.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/net/batman-adv/soft-interface.c b/net/batman-adv/soft-interface.c
index 720f1a5b81ac0..9f1fe6169befa 100644
--- a/net/batman-adv/soft-interface.c
+++ b/net/batman-adv/soft-interface.c
@@ -430,13 +430,7 @@ void batadv_interface_rx(struct net_device *soft_iface,
 
 	/* skb->dev & skb->pkt_type are set here */
 	skb->protocol = eth_type_trans(skb, soft_iface);
-
-	/* should not be necessary anymore as we use skb_pull_rcsum()
-	 * TODO: please verify this and remove this TODO
-	 * -- Dec 21st 2009, Simon Wunderlich
-	 */
-
-	/* skb->ip_summed = CHECKSUM_UNNECESSARY; */
+	skb_postpull_rcsum(skb, eth_hdr(skb), ETH_HLEN);
 
 	batadv_inc_counter(bat_priv, BATADV_CNT_RX);
 	batadv_add_counter(bat_priv, BATADV_CNT_RX_BYTES,

From c0bb1789e8b48e4b2e2ba8c09979614a6bb035a1 Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Tue, 23 Jan 2018 10:59:50 +0100
Subject: [PATCH 0309/1852] batman-adv: invalidate checksum on fragment
 reassembly

[ Upstream commit 3bf2a09da956b43ecfaa630a2ef9a477f991a46a ]

A more sophisticated implementation could try to combine fragment checksums
when all fragments have CHECKSUM_COMPLETE and are split at even offsets.
For now, we just set ip_summed to CHECKSUM_NONE to avoid "hw csum failure"
warnings in the kernel log when fragmented frames are received. In
consequence, skb_pull_rcsum() can be replaced with skb_pull().

Note that in usual setups, packets don't reach batman-adv with
CHECKSUM_COMPLETE (I assume NICs bail out of checksumming when they see
batadv's ethtype?), which is why the log messages do not occur on every
system using batman-adv. I could reproduce this issue by stacking
batman-adv on top of a VXLAN interface.

Fixes: 610bfc6bc99b ("batman-adv: Receive fragmented packets and merge")
Tested-by: Maximilian Wilhelm <max@sdn.clinic>
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/batman-adv/fragmentation.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/batman-adv/fragmentation.c b/net/batman-adv/fragmentation.c
index 700c96c82a151..5d2f9d4879b20 100644
--- a/net/batman-adv/fragmentation.c
+++ b/net/batman-adv/fragmentation.c
@@ -278,7 +278,8 @@ batadv_frag_merge_packets(struct hlist_head *chain)
 	/* Move the existing MAC header to just before the payload. (Override
 	 * the fragment header.)
 	 */
-	skb_pull_rcsum(skb_out, hdr_size);
+	skb_pull(skb_out, hdr_size);
+	skb_out->ip_summed = CHECKSUM_NONE;
 	memmove(skb_out->data - ETH_HLEN, skb_mac_header(skb_out), ETH_HLEN);
 	skb_set_mac_header(skb_out, -ETH_HLEN);
 	skb_reset_network_header(skb_out);

From 631e6530c7379367c5d96d90095191a15e63b163 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Mon, 19 Feb 2018 01:24:53 +0100
Subject: [PATCH 0310/1852] netfilter: ebtables: convert BUG_ONs to WARN_ONs

[ Upstream commit fc6a5d0601c5ac1d02f283a46f60b87b2033e5ca ]

All of these conditions are not fatal and should have
been WARN_ONs from the get-go.

Convert them to WARN_ONs and bail out.

Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/netfilter/ebtables.c | 27 ++++++++++++++++++---------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c
index 50b76011f4704..8eaaf291b2852 100644
--- a/net/bridge/netfilter/ebtables.c
+++ b/net/bridge/netfilter/ebtables.c
@@ -1614,7 +1614,8 @@ static int compat_match_to_user(struct ebt_entry_match *m, void __user **dstptr,
 	int off = ebt_compat_match_offset(match, m->match_size);
 	compat_uint_t msize = m->match_size - off;
 
-	BUG_ON(off >= m->match_size);
+	if (WARN_ON(off >= m->match_size))
+		return -EINVAL;
 
 	if (copy_to_user(cm->u.name, match->name,
 	    strlen(match->name) + 1) || put_user(msize, &cm->match_size))
@@ -1641,7 +1642,8 @@ static int compat_target_to_user(struct ebt_entry_target *t,
 	int off = xt_compat_target_offset(target);
 	compat_uint_t tsize = t->target_size - off;
 
-	BUG_ON(off >= t->target_size);
+	if (WARN_ON(off >= t->target_size))
+		return -EINVAL;
 
 	if (copy_to_user(cm->u.name, target->name,
 	    strlen(target->name) + 1) || put_user(tsize, &cm->match_size))
@@ -1869,7 +1871,8 @@ static int ebt_buf_add(struct ebt_entries_buf_state *state,
 	if (state->buf_kern_start == NULL)
 		goto count_only;
 
-	BUG_ON(state->buf_kern_offset + sz > state->buf_kern_len);
+	if (WARN_ON(state->buf_kern_offset + sz > state->buf_kern_len))
+		return -EINVAL;
 
 	memcpy(state->buf_kern_start + state->buf_kern_offset, data, sz);
 
@@ -1882,7 +1885,8 @@ static int ebt_buf_add_pad(struct ebt_entries_buf_state *state, unsigned int sz)
 {
 	char *b = state->buf_kern_start;
 
-	BUG_ON(b && state->buf_kern_offset > state->buf_kern_len);
+	if (WARN_ON(b && state->buf_kern_offset > state->buf_kern_len))
+		return -EINVAL;
 
 	if (b != NULL && sz > 0)
 		memset(b + state->buf_kern_offset, 0, sz);
@@ -1959,8 +1963,10 @@ static int compat_mtw_from_user(struct compat_ebt_entry_mwt *mwt,
 	pad = XT_ALIGN(size_kern) - size_kern;
 
 	if (pad > 0 && dst) {
-		BUG_ON(state->buf_kern_len <= pad);
-		BUG_ON(state->buf_kern_offset - (match_size + off) + size_kern > state->buf_kern_len - pad);
+		if (WARN_ON(state->buf_kern_len <= pad))
+			return -EINVAL;
+		if (WARN_ON(state->buf_kern_offset - (match_size + off) + size_kern > state->buf_kern_len - pad))
+			return -EINVAL;
 		memset(dst + size_kern, 0, pad);
 	}
 	return off + match_size;
@@ -2011,7 +2017,8 @@ static int ebt_size_mwt(struct compat_ebt_entry_mwt *match32,
 		if (ret < 0)
 			return ret;
 
-		BUG_ON(ret < match32->match_size);
+		if (WARN_ON(ret < match32->match_size))
+			return -EINVAL;
 		growth += ret - match32->match_size;
 		growth += ebt_compat_entry_padsize();
 
@@ -2121,7 +2128,8 @@ static int size_entry_mwt(struct ebt_entry *entry, const unsigned char *base,
 
 	startoff = state->buf_user_offset - startoff;
 
-	BUG_ON(*total < startoff);
+	if (WARN_ON(*total < startoff))
+		return -EINVAL;
 	*total -= startoff;
 	return 0;
 }
@@ -2249,7 +2257,8 @@ static int compat_do_replace(struct net *net, void __user *user,
 	state.buf_kern_len = size64;
 
 	ret = compat_copy_entries(entries_tmp, tmp.entries_size, &state);
-	BUG_ON(ret < 0);	/* parses same data again */
+	if (WARN_ON(ret < 0))
+		goto out_unlock;
 
 	vfree(entries_tmp);
 	tmp.entries_size = size64;

From 862804ea269e27688800a5acb1fcc1f8810db4a5 Mon Sep 17 00:00:00 2001
From: Jianchao Wang <jianchao.w.wang@oracle.com>
Date: Thu, 15 Feb 2018 19:13:41 +0800
Subject: [PATCH 0311/1852] nvme-pci: Fix nvme queue cleanup if IRQ setup fails

[ Upstream commit f25a2dfc20e3a3ed8fe6618c331799dd7bd01190 ]

This patch fixes nvme queue cleanup if requesting an IRQ handler for
the queue's vector fails. It does this by resetting the cq_vector to
the uninitialized value of -1 so it is ignored for a controller reset.

Signed-off-by: Jianchao Wang <jianchao.w.wang@oracle.com>
[changelog updates, removed misc whitespace changes]
Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/nvme/host/pci.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 290d295aa6d56..e6f17c53c5aaa 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1583,7 +1583,7 @@ static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
 	nvmeq->cq_vector = qid - 1;
 	result = adapter_alloc_cq(dev, qid, nvmeq);
 	if (result < 0)
-		return result;
+		goto release_vector;
 
 	result = adapter_alloc_sq(dev, qid, nvmeq);
 	if (result < 0)
@@ -1597,9 +1597,12 @@ static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
 	return result;
 
  release_sq:
+	dev->online_queues--;
 	adapter_delete_sq(dev, qid);
  release_cq:
 	adapter_delete_cq(dev, qid);
+ release_vector:
+	nvmeq->cq_vector = -1;
 	return result;
 }
 

From d853a81032fcf68e42948da64b5fd64b82906bce Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Mon, 26 Feb 2018 11:36:14 +0000
Subject: [PATCH 0312/1852] clocksource/drivers/fsl_ftm_timer: Fix error return
 checking

[ Upstream commit f287eb9013ccf199cbfa4eabd80c36fedfc15a73 ]

The error checks on freq for a negative error return always fails because
freq is unsigned and can never be negative. Fix this by making freq a
signed long.

Detected with Coccinelle:
drivers/clocksource/fsl_ftm_timer.c:287:5-9: WARNING: Unsigned expression
compared with zero: freq <= 0
drivers/clocksource/fsl_ftm_timer.c:291:5-9: WARNING: Unsigned expression
compared with zero: freq <= 0

Fixes: 2529c3a33079 ("clocksource: Add Freescale FlexTimer Module (FTM) timer support")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: kernel-janitors@vger.kernel.org
Link: https://lkml.kernel.org/r/20180226113614.3092-1-colin.king@canonical.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clocksource/fsl_ftm_timer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/fsl_ftm_timer.c b/drivers/clocksource/fsl_ftm_timer.c
index 517e1c7624d44..a00209702f399 100644
--- a/drivers/clocksource/fsl_ftm_timer.c
+++ b/drivers/clocksource/fsl_ftm_timer.c
@@ -281,7 +281,7 @@ static int __init __ftm_clk_init(struct device_node *np, char *cnt_name,
 
 static unsigned long __init ftm_clk_init(struct device_node *np)
 {
-	unsigned long freq;
+	long freq;
 
 	freq = __ftm_clk_init(np, "ftm-evt-counter-en", "ftm-evt");
 	if (freq <= 0)

From c48687384378e80ad45fdad5e04d4185456a568b Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Sun, 25 Feb 2018 19:12:10 -0800
Subject: [PATCH 0313/1852] r8152: fix tx packets accounting

[ Upstream commit 4c27bf3c5b7434ccb9ab962301da661c26b467a4 ]

r8152 driver handles TSO packets (limited to ~16KB) quite well,
but pretends each TSO logical packet is a single packet on the wire.

There is also some error since headers are accounted once, but
error rate is small enough that we do not care.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/r8152.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index b2c1a435357ff..2991d71555405 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -1610,7 +1610,7 @@ static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
 
 		tx_data += len;
 		agg->skb_len += len;
-		agg->skb_num++;
+		agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
 
 		dev_kfree_skb_any(skb);
 

From 6ada92685d65453a1a2bd32e8f946f92e6453ec5 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 21 Feb 2018 11:50:03 +1000
Subject: [PATCH 0314/1852] virtio-gpu: fix ioctl and expose the fixed status
 to userspace.

[ Upstream commit 9a191b114906457c4b2494c474f58ae4142d4e67 ]

This exposes to mesa that it can use the fixed ioctl for querying
later cap sets, cap set 1 is forever frozen in time.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20180221015003.22884-1-airlied@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 17 +++++++++++------
 include/uapi/drm/virtgpu_drm.h         |  1 +
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index b4de18e65db8d..6296e9f270ca6 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -208,6 +208,9 @@ static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 	case VIRTGPU_PARAM_3D_FEATURES:
 		value = vgdev->has_virgl_3d == true ? 1 : 0;
 		break;
+	case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
+		value = 1;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -483,7 +486,7 @@ static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 {
 	struct virtio_gpu_device *vgdev = dev->dev_private;
 	struct drm_virtgpu_get_caps *args = data;
-	int size;
+	unsigned size, host_caps_size;
 	int i;
 	int found_valid = -1;
 	int ret;
@@ -492,6 +495,10 @@ static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 	if (vgdev->num_capsets == 0)
 		return -ENOSYS;
 
+	/* don't allow userspace to pass 0 */
+	if (args->size == 0)
+		return -EINVAL;
+
 	spin_lock(&vgdev->display_info_lock);
 	for (i = 0; i < vgdev->num_capsets; i++) {
 		if (vgdev->capsets[i].id == args->cap_set_id) {
@@ -507,11 +514,9 @@ static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 		return -EINVAL;
 	}
 
-	size = vgdev->capsets[found_valid].max_size;
-	if (args->size > size) {
-		spin_unlock(&vgdev->display_info_lock);
-		return -EINVAL;
-	}
+	host_caps_size = vgdev->capsets[found_valid].max_size;
+	/* only copy to user the minimum of the host caps size or the guest caps size */
+	size = min(args->size, host_caps_size);
 
 	list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 		if (cache_ent->id == args->cap_set_id &&
diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
index fc9e2d6e5e2f5..232367124712f 100644
--- a/include/uapi/drm/virtgpu_drm.h
+++ b/include/uapi/drm/virtgpu_drm.h
@@ -60,6 +60,7 @@ struct drm_virtgpu_execbuffer {
 };
 
 #define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
+#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */
 
 struct drm_virtgpu_getparam {
 	uint64_t param;

From 58ba595e88837b50953e7b9d04b0420360b233fd Mon Sep 17 00:00:00 2001
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Wed, 14 Feb 2018 18:40:12 +0900
Subject: [PATCH 0315/1852] dmaengine: rcar-dmac: fix max_chunk_size for R-Car
 Gen3

[ Upstream commit d716d9b702bb759dd6fb50804f10a174bd156d71 ]

According to R-Car Gen3 Rev.0.80 manual, the DMATCR can be set to
16,777,215 as maximum. So, this patch fixes the max_chunk_size for
safety on all of SoCs. Otherwise, a system may hang if the DMATCR
is set to 0 on R-Car Gen3.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/dma/sh/rcar-dmac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 7820d07e7beea..2b36d1c63aa5f 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -851,7 +851,7 @@ rcar_dmac_chan_prep_sg(struct rcar_dmac_chan *chan, struct scatterlist *sgl,
 
 	rcar_dmac_chan_configure_desc(chan, desc);
 
-	max_chunk_size = (RCAR_DMATCR_MASK + 1) << desc->xfer_shift;
+	max_chunk_size = RCAR_DMATCR_MASK << desc->xfer_shift;
 
 	/*
 	 * Allocate and fill the transfer chunk descriptors. We own the only

From 76333c25574ca6c8c769a20bdce518b5423408fd Mon Sep 17 00:00:00 2001
From: Tang Junhui <tang.junhui@zte.com.cn>
Date: Tue, 27 Feb 2018 09:49:30 -0800
Subject: [PATCH 0316/1852] bcache: fix kcrashes with fio in RAID5 backend dev

[ Upstream commit 60eb34ec5526e264c2bbaea4f7512d714d791caf ]

Kernel crashed when run fio in a RAID5 backend bcache device, the call
trace is bellow:
[  440.012034] kernel BUG at block/blk-ioc.c:146!
[  440.012696] invalid opcode: 0000 [#1] SMP NOPTI
[  440.026537] CPU: 2 PID: 2205 Comm: md127_raid5 Not tainted 4.15.0 #8
[  440.027441] Hardware name: HP ProLiant MicroServer Gen8, BIOS J06 07/16
/2015
[  440.028615] RIP: 0010:put_io_context+0x8b/0x90
[  440.029246] RSP: 0018:ffffa8c882b43af8 EFLAGS: 00010246
[  440.029990] RAX: 0000000000000000 RBX: ffffa8c88294fca0 RCX: 0000000000
0f4240
[  440.031006] RDX: 0000000000000004 RSI: 0000000000000286 RDI: ffffa8c882
94fca0
[  440.032030] RBP: ffffa8c882b43b10 R08: 0000000000000003 R09: ffff949cb8
0c1700
[  440.033206] R10: 0000000000000104 R11: 000000000000b71c R12: 00000000000
01000
[  440.034222] R13: 0000000000000000 R14: ffff949cad84db70 R15: ffff949cb11
bd1e0
[  440.035239] FS:  0000000000000000(0000) GS:ffff949cba280000(0000) knlGS:
0000000000000000
[  440.060190] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  440.084967] CR2: 00007ff0493ef000 CR3: 00000002f1e0a002 CR4: 00000000001
606e0
[  440.110498] Call Trace:
[  440.135443]  bio_disassociate_task+0x1b/0x60
[  440.160355]  bio_free+0x1b/0x60
[  440.184666]  bio_put+0x23/0x30
[  440.208272]  search_free+0x23/0x40 [bcache]
[  440.231448]  cached_dev_write_complete+0x31/0x70 [bcache]
[  440.254468]  closure_put+0xb6/0xd0 [bcache]
[  440.277087]  request_endio+0x30/0x40 [bcache]
[  440.298703]  bio_endio+0xa1/0x120
[  440.319644]  handle_stripe+0x418/0x2270 [raid456]
[  440.340614]  ? load_balance+0x17b/0x9c0
[  440.360506]  handle_active_stripes.isra.58+0x387/0x5a0 [raid456]
[  440.380675]  ? __release_stripe+0x15/0x20 [raid456]
[  440.400132]  raid5d+0x3ed/0x5d0 [raid456]
[  440.419193]  ? schedule+0x36/0x80
[  440.437932]  ? schedule_timeout+0x1d2/0x2f0
[  440.456136]  md_thread+0x122/0x150
[  440.473687]  ? wait_woken+0x80/0x80
[  440.491411]  kthread+0x102/0x140
[  440.508636]  ? find_pers+0x70/0x70
[  440.524927]  ? kthread_associate_blkcg+0xa0/0xa0
[  440.541791]  ret_from_fork+0x35/0x40
[  440.558020] Code: c2 48 00 5b 41 5c 41 5d 5d c3 48 89 c6 4c 89 e7 e8 bb c2
48 00 48 8b 3d bc 36 4b 01 48 89 de e8 7c f7 e0 ff 5b 41 5c 41 5d 5d c3 <0f> 0b
0f 1f 00 0f 1f 44 00 00 55 48 8d 47 b8 48 89 e5 41 57 41
[  440.610020] RIP: put_io_context+0x8b/0x90 RSP: ffffa8c882b43af8
[  440.628575] ---[ end trace a1fd79d85643a73e ]--

All the crash issue happened when a bypass IO coming, in such scenario
s->iop.bio is pointed to the s->orig_bio. In search_free(), it finishes the
s->orig_bio by calling bio_complete(), and after that, s->iop.bio became
invalid, then kernel would crash when calling bio_put(). Maybe its upper
layer's faulty, since bio should not be freed before we calling bio_put(),
but we'd better calling bio_put() first before calling bio_complete() to
notify upper layer ending this bio.

This patch moves bio_complete() under bio_put() to avoid kernel crash.

[mlyle: fixed commit subject for character limits]

Reported-by: Matthias Ferdinand <bcache@mfedv.net>
Tested-by: Matthias Ferdinand <bcache@mfedv.net>
Signed-off-by: Tang Junhui <tang.junhui@zte.com.cn>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/request.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/md/bcache/request.c b/drivers/md/bcache/request.c
index e73aeb0e892c1..e497bde96db38 100644
--- a/drivers/md/bcache/request.c
+++ b/drivers/md/bcache/request.c
@@ -633,11 +633,11 @@ static void do_bio_hook(struct search *s, struct bio *orig_bio)
 static void search_free(struct closure *cl)
 {
 	struct search *s = container_of(cl, struct search, cl);
-	bio_complete(s);
 
 	if (s->iop.bio)
 		bio_put(s->iop.bio);
 
+	bio_complete(s);
 	closure_debug_destroy(cl);
 	mempool_free(s, s->d->c->search);
 }

From cfc78a4bbb779e9be9237030ef799259e6f37cc6 Mon Sep 17 00:00:00 2001
From: Xin Long <lucien.xin@gmail.com>
Date: Tue, 27 Feb 2018 19:19:41 +0800
Subject: [PATCH 0317/1852] sit: fix IFLA_MTU ignored on NEWLINK

[ Upstream commit 2b3957c34b6d7f03544b12ebbf875eee430745db ]

Commit 128bb975dc3c ("ip6_gre: init dev->mtu and dev->hard_header_len
correctly") fixed IFLA_MTU ignored on NEWLINK for ip6_gre. The same
mtu fix is also needed for sit.

Note that dev->hard_header_len setting for sit works fine, no need to
fix it. sit is actually ipv4 tunnel, it can't call ip6_tnl_change_mtu
to set mtu.

Reported-by: Jianlin Shi <jishi@redhat.com>
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/sit.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index 51f7c32f04d7b..dec4e7bda5f37 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -1574,6 +1574,13 @@ static int ipip6_newlink(struct net *src_net, struct net_device *dev,
 	if (err < 0)
 		return err;
 
+	if (tb[IFLA_MTU]) {
+		u32 mtu = nla_get_u32(tb[IFLA_MTU]);
+
+		if (mtu >= IPV6_MIN_MTU && mtu <= 0xFFF8 - dev->hard_header_len)
+			dev->mtu = mtu;
+	}
+
 #ifdef CONFIG_IPV6_SIT_6RD
 	if (ipip6_netlink_6rd_parms(data, &ip6rd))
 		err = ipip6_tunnel_update_6rd(nt, &ip6rd);

From bb04a9e08b9686a887a9f46a073916e09f40dc1c Mon Sep 17 00:00:00 2001
From: Claudiu Manoil <claudiu.manoil@nxp.com>
Date: Tue, 27 Feb 2018 17:33:10 +0200
Subject: [PATCH 0318/1852] gianfar: Fix Rx byte accounting for ndev stats

[ Upstream commit 590399ddf9561f2ed0839311c8ae1be21597ba68 ]

Don't include in the Rx bytecount of the packet sent up the stack:
the FCB (frame control block), and the padding bytes inserted by
the controller into the frame payload, nor the FCS. All these are
being pulled out of the skb by gfar_process_frame().
This issue is old, likely from the driver's beginnings, however
it was amplified by recent:
commit d903ec77118c ("gianfar: simplify FCS handling and fix memory leak")
which basically added the FCS to the Rx bytecount, and so brought
this to my attention.

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/freescale/gianfar.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 901661149b448..2d61369f586f7 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -3053,9 +3053,6 @@ static void gfar_process_frame(struct net_device *ndev, struct sk_buff *skb)
 	if (ndev->features & NETIF_F_RXCSUM)
 		gfar_rx_checksum(skb, fcb);
 
-	/* Tell the skb what kind of packet this is */
-	skb->protocol = eth_type_trans(skb, ndev);
-
 	/* There's need to check for NETIF_F_HW_VLAN_CTAG_RX here.
 	 * Even if vlan rx accel is disabled, on some chips
 	 * RXFCB_VLN is pseudo randomly set.
@@ -3126,13 +3123,15 @@ int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
 			continue;
 		}
 
+		gfar_process_frame(ndev, skb);
+
 		/* Increment the number of packets */
 		total_pkts++;
 		total_bytes += skb->len;
 
 		skb_record_rx_queue(skb, rx_queue->qindex);
 
-		gfar_process_frame(ndev, skb);
+		skb->protocol = eth_type_trans(skb, ndev);
 
 		/* Send the packet up the stack */
 		napi_gro_receive(&rx_queue->grp->napi_rx, skb);

From eda216aae6a4a3b165449daac71571ab0777b26d Mon Sep 17 00:00:00 2001
From: Joey Pabalinas <joeypabalinas@gmail.com>
Date: Tue, 27 Feb 2018 22:05:53 -1000
Subject: [PATCH 0319/1852] net/tcp/illinois: replace broken algorithm
 reference link

[ Upstream commit ecc832758a654e375924ebf06a4ac971acb5ce60 ]

The link to the pdf containing the algorithm description is now a
dead link; it seems http://www.ifp.illinois.edu/~srikant/ has been
moved to https://sites.google.com/a/illinois.edu/srikant/ and none of
the original papers can be found there...

I have replaced it with the only working copy I was able to find.

n.b. there is also a copy available at:

http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.296.6350&rep=rep1&type=pdf

However, this seems to only be a *cached* version, so I am unsure
exactly how reliable that link can be expected to remain over time
and have decided against using that one.

Signed-off-by: Joey Pabalinas <joeypabalinas@gmail.com>

 net/ipv4/tcp_illinois.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_illinois.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv4/tcp_illinois.c b/net/ipv4/tcp_illinois.c
index 2ab9bbb6faffb..5ed6a89894fd8 100644
--- a/net/ipv4/tcp_illinois.c
+++ b/net/ipv4/tcp_illinois.c
@@ -6,7 +6,7 @@
  * The algorithm is described in:
  * "TCP-Illinois: A Loss and Delay-Based Congestion Control Algorithm
  *  for High-Speed Networks"
- * http://www.ifp.illinois.edu/~srikant/Papers/liubassri06perf.pdf
+ * http://tamerbasar.csl.illinois.edu/LiuBasarSrikantPerfEvalArtJun2008.pdf
  *
  * Implemented from description in paper and ns-2 simulation.
  * Copyright (C) 2007 Stephen Hemminger <shemminger@linux-foundation.org>

From d2045d34aac46e1faa5a564fc571714393b7c58b Mon Sep 17 00:00:00 2001
From: Roger Pau Monne <roger.pau@citrix.com>
Date: Wed, 28 Feb 2018 09:19:03 +0000
Subject: [PATCH 0320/1852] xen/pirq: fix error path cleanup when binding MSIs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 910f8befdf5bccf25287d9f1743e3e546bcb7ce0 ]

Current cleanup in the error path of xen_bind_pirq_msi_to_irq is
wrong. First of all there's an off-by-one in the cleanup loop, which
can lead to unbinding wrong IRQs.

Secondly IRQs not bound won't be freed, thus leaking IRQ numbers.

Note that there's no need to differentiate between bound and unbound
IRQs when freeing them, __unbind_from_irq will deal with both of them
correctly.

Fixes: 4892c9b4ada9f9 ("xen: add support for MSI message groups")
Reported-by: Hooman Mirhadi <mirhadih@amazon.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Amit Shah <aams@amazon.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/events/events_base.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c
index 83ec7b89d3085..468961c59fa55 100644
--- a/drivers/xen/events/events_base.c
+++ b/drivers/xen/events/events_base.c
@@ -764,8 +764,8 @@ int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
 	mutex_unlock(&irq_mapping_update_lock);
 	return irq;
 error_irq:
-	for (; i >= 0; i--)
-		__unbind_from_irq(irq + i);
+	while (nvec--)
+		__unbind_from_irq(irq + nvec);
 	mutex_unlock(&irq_mapping_update_lock);
 	return ret;
 }

From 681b22401c7858f1500a1e40355f411cd941b86a Mon Sep 17 00:00:00 2001
From: Filipe Manana <fdmanana@suse.com>
Date: Tue, 6 Feb 2018 20:39:20 +0000
Subject: [PATCH 0321/1852] Btrfs: send, fix issuing write op when processing
 hole in no data mode

[ Upstream commit d4dfc0f4d39475ccbbac947880b5464a74c30b99 ]

When doing an incremental send of a filesystem with the no-holes feature
enabled, we end up issuing a write operation when using the no data mode
send flag, instead of issuing an update extent operation. Fix this by
issuing the update extent operation instead.

Trivial reproducer:

  $ mkfs.btrfs -f -O no-holes /dev/sdc
  $ mkfs.btrfs -f /dev/sdd
  $ mount /dev/sdc /mnt/sdc
  $ mount /dev/sdd /mnt/sdd

  $ xfs_io -f -c "pwrite -S 0xab 0 32K" /mnt/sdc/foobar
  $ btrfs subvolume snapshot -r /mnt/sdc /mnt/sdc/snap1

  $ xfs_io -c "fpunch 8K 8K" /mnt/sdc/foobar
  $ btrfs subvolume snapshot -r /mnt/sdc /mnt/sdc/snap2

  $ btrfs send /mnt/sdc/snap1 | btrfs receive /mnt/sdd
  $ btrfs send --no-data -p /mnt/sdc/snap1 /mnt/sdc/snap2 \
       | btrfs receive -vv /mnt/sdd

Before this change the output of the second receive command is:

  receiving snapshot snap2 uuid=f6922049-8c22-e544-9ff9-fc6755918447...
  utimes
  write foobar, offset 8192, len 8192
  utimes foobar
  BTRFS_IOC_SET_RECEIVED_SUBVOL uuid=f6922049-8c22-e544-9ff9-...

After this change it is:

  receiving snapshot snap2 uuid=564d36a3-ebc8-7343-aec9-bf6fda278e64...
  utimes
  update_extent foobar: offset=8192, len=8192
  utimes foobar
  BTRFS_IOC_SET_RECEIVED_SUBVOL uuid=564d36a3-ebc8-7343-aec9-bf6fda278e64...

Signed-off-by: Filipe Manana <fdmanana@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/send.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c
index 19b56873b797b..83c73738165e2 100644
--- a/fs/btrfs/send.c
+++ b/fs/btrfs/send.c
@@ -4674,6 +4674,9 @@ static int send_hole(struct send_ctx *sctx, u64 end)
 	u64 len;
 	int ret = 0;
 
+	if (sctx->flags & BTRFS_SEND_FLAG_NO_FILE_DATA)
+		return send_update_extent(sctx, offset, end - offset);
+
 	p = fs_path_alloc();
 	if (!p)
 		return -ENOMEM;

From 75d3f14fa9a453f078bda74f5530e7fc8d1e708f Mon Sep 17 00:00:00 2001
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Mon, 26 Feb 2018 15:22:22 +1100
Subject: [PATCH 0322/1852] selftests/powerpc: Skip the subpage_prot tests if
 the syscall is unavailable

[ Upstream commit cd4a6f3ab4d80cb919d15897eb3cbc85c2009d4b ]

The subpage_prot syscall is only functional when the system is using
the Hash MMU. Since commit 5b2b80714796 ("powerpc/mm: Invalidate
subpage_prot() system call on radix platforms") it returns ENOENT when
the Radix MMU is active. Currently this just makes the test fail.

Additionally the syscall is not available if the kernel is built with
4K pages, or if CONFIG_PPC_SUBPAGE_PROT=n, in which case it returns
ENOSYS because the syscall is missing entirely.

So check explicitly for ENOENT and ENOSYS and skip if we see either of
those.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/powerpc/mm/subpage_prot.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tools/testing/selftests/powerpc/mm/subpage_prot.c b/tools/testing/selftests/powerpc/mm/subpage_prot.c
index 440180ff8089d..ca29f58728175 100644
--- a/tools/testing/selftests/powerpc/mm/subpage_prot.c
+++ b/tools/testing/selftests/powerpc/mm/subpage_prot.c
@@ -135,6 +135,16 @@ static int run_test(void *addr, unsigned long size)
 	return 0;
 }
 
+static int syscall_available(void)
+{
+	int rc;
+
+	errno = 0;
+	rc = syscall(__NR_subpage_prot, 0, 0, 0);
+
+	return rc == 0 || (errno != ENOENT && errno != ENOSYS);
+}
+
 int test_anon(void)
 {
 	unsigned long align;
@@ -145,6 +155,8 @@ int test_anon(void)
 	void *mallocblock;
 	unsigned long mallocsize;
 
+	SKIP_IF(!syscall_available());
+
 	if (getpagesize() != 0x10000) {
 		fprintf(stderr, "Kernel page size must be 64K!\n");
 		return 1;
@@ -180,6 +192,8 @@ int test_file(void)
 	off_t filesize;
 	int fd;
 
+	SKIP_IF(!syscall_available());
+
 	fd = open(file_name, O_RDWR);
 	if (fd == -1) {
 		perror("failed to open file");

From d3bd8f7fd09dda651ccebbd247265c587e1946bc Mon Sep 17 00:00:00 2001
From: Paul Mackerras <paulus@ozlabs.org>
Date: Fri, 2 Mar 2018 15:38:04 +1100
Subject: [PATCH 0323/1852] KVM: PPC: Book3S HV: Fix VRMA initialization with
 2MB or 1GB memory backing

[ Upstream commit debd574f4195e205ba505b25e19b2b797f4bcd94 ]

The current code for initializing the VRMA (virtual real memory area)
for HPT guests requires the page size of the backing memory to be one
of 4kB, 64kB or 16MB.  With a radix host we have the possibility that
the backing memory page size can be 2MB or 1GB.  In these cases, if the
guest switches to HPT mode, KVM will not initialize the VRMA and the
guest will fail to run.

In fact it is not necessary that the VRMA page size is the same as the
backing memory page size; any VRMA page size less than or equal to the
backing memory page size is acceptable.  Therefore we now choose the
largest page size out of the set {4k, 64k, 16M} which is not larger
than the backing memory page size.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kvm/book3s_hv.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 428563b195c31..767ac1572c02d 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3002,15 +3002,17 @@ static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
 		goto up_out;
 
 	psize = vma_kernel_pagesize(vma);
-	porder = __ilog2(psize);
 
 	up_read(&current->mm->mmap_sem);
 
 	/* We can handle 4k, 64k or 16M pages in the VRMA */
-	err = -EINVAL;
-	if (!(psize == 0x1000 || psize == 0x10000 ||
-	      psize == 0x1000000))
-		goto out_srcu;
+	if (psize >= 0x1000000)
+		psize = 0x1000000;
+	else if (psize >= 0x10000)
+		psize = 0x10000;
+	else
+		psize = 0x1000;
+	porder = __ilog2(psize);
 
 	/* Update VRMASD field in the LPCR */
 	senc = slb_pgsize_encoding(psize);

From 47e3ba36d3e8a3f28d7c1fd1a075d9515cd1a4a0 Mon Sep 17 00:00:00 2001
From: Igor Pylypiv <igor.pylypiv@gmail.com>
Date: Wed, 28 Feb 2018 00:59:12 -0800
Subject: [PATCH 0324/1852] watchdog: f71808e_wdt: Fix magic close handling

[ Upstream commit 7bd3e7b743956afbec30fb525bc3c5e22e3d475c ]

Watchdog close is "expected" when any byte is 'V' not just the last one.
Writing "V" to the device fails because the last byte is the end of string.

$ echo V > /dev/watchdog
f71808e_wdt: Unexpected close, not stopping watchdog!

Signed-off-by: Igor Pylypiv <igor.pylypiv@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/watchdog/f71808e_wdt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index aa93df5833dcc..2048aad91add8 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -520,7 +520,8 @@ static ssize_t watchdog_write(struct file *file, const char __user *buf,
 				char c;
 				if (get_user(c, buf + i))
 					return -EFAULT;
-				expect_close = (c == 'V');
+				if (c == 'V')
+					expect_close = true;
 			}
 
 			/* Properly order writes across fork()ed processes */

From 031871d2bdbbe0459b72ff7de16609d5b4822421 Mon Sep 17 00:00:00 2001
From: Benjamin Poirier <bpoirier@suse.com>
Date: Tue, 20 Feb 2018 15:12:00 +0900
Subject: [PATCH 0325/1852] e1000e: Fix check_for_link return value with
 autoneg off

[ Upstream commit 4e7dc08e57c95673d2edaba8983c3de4dd1f65f5 ]

When autoneg is off, the .check_for_link callback functions clear the
get_link_status flag and systematically return a "pseudo-error". This means
that the link is not detected as up until the next execution of the
e1000_watchdog_task() 2 seconds later.

Fixes: 19110cfbb34d ("e1000e: Separate signaling for link check/link up")
Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
Acked-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/intel/e1000e/ich8lan.c | 2 +-
 drivers/net/ethernet/intel/e1000e/mac.c     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 1908a38e7f316..485b9cc53f8b0 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -1574,7 +1574,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
 	 * we have already determined whether we have link or not.
 	 */
 	if (!mac->autoneg)
-		return -E1000_ERR_CONFIG;
+		return 1;
 
 	/* Auto-Neg is enabled.  Auto Speed Detection takes care
 	 * of MAC speed/duplex configuration.  So we only need to
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
index 645ace74429ee..fe133f33a6c6a 100644
--- a/drivers/net/ethernet/intel/e1000e/mac.c
+++ b/drivers/net/ethernet/intel/e1000e/mac.c
@@ -450,7 +450,7 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
 	 * we have already determined whether we have link or not.
 	 */
 	if (!mac->autoneg)
-		return -E1000_ERR_CONFIG;
+		return 1;
 
 	/* Auto-Neg is enabled.  Auto Speed Detection takes care
 	 * of MAC speed/duplex configuration.  So we only need to

From f2037cf14aeef9f413b5d84dae84e404e14b1a8d Mon Sep 17 00:00:00 2001
From: Pierre-Yves Kerbrat <pkerbrat@kalray.eu>
Date: Fri, 26 Jan 2018 11:24:12 +0100
Subject: [PATCH 0326/1852] e1000e: allocate ring descriptors with
 dma_zalloc_coherent

[ Upstream commit aea3fca005fb45f80869f2e8d56fd4e64c1d1fdb ]

Descriptor rings were not initialized at zero when allocated
When area contained garbage data, it caused skb_over_panic in
e1000_clean_rx_irq (if data had E1000_RXD_STAT_DD bit set)

This patch makes use of dma_zalloc_coherent to make sure the
ring is memset at 0 to prevent the area from containing garbage.

Following is the signature of the panic:
IODDR0@0.0: skbuff: skb_over_panic: text:80407b20 len:64010 put:64010 head:ab46d800 data:ab46d842 tail:0xab47d24c end:0xab46df40 dev:eth0
IODDR0@0.0: BUG: failure at net/core/skbuff.c:105/skb_panic()!
IODDR0@0.0: Kernel panic - not syncing: BUG!
IODDR0@0.0:
IODDR0@0.0: Process swapper/0 (pid: 0, threadinfo=81728000, task=8173cc00 ,cpu: 0)
IODDR0@0.0: SP = <815a1c0c>
IODDR0@0.0: Stack:      00000001
IODDR0@0.0: b2d89800 815e33ac
IODDR0@0.0: ea73c040 00000001
IODDR0@0.0: 60040003 0000fa0a
IODDR0@0.0: 00000002
IODDR0@0.0:
IODDR0@0.0: 804540c0 815a1c70
IODDR0@0.0: b2744000 602ac070
IODDR0@0.0: 815a1c44 b2d89800
IODDR0@0.0: 8173cc00 815a1c08
IODDR0@0.0:
IODDR0@0.0:     00000006
IODDR0@0.0: 815a1b50 00000000
IODDR0@0.0: 80079434 00000001
IODDR0@0.0: ab46df40 b2744000
IODDR0@0.0: b2d89800
IODDR0@0.0:
IODDR0@0.0: 0000fa0a 8045745c
IODDR0@0.0: 815a1c88 0000fa0a
IODDR0@0.0: 80407b20 b2789f80
IODDR0@0.0: 00000005 80407b20
IODDR0@0.0:
IODDR0@0.0:
IODDR0@0.0: Call Trace:
IODDR0@0.0: [<804540bc>] skb_panic+0xa4/0xa8
IODDR0@0.0: [<80079430>] console_unlock+0x2f8/0x6d0
IODDR0@0.0: [<80457458>] skb_put+0xa0/0xc0
IODDR0@0.0: [<80407b1c>] e1000_clean_rx_irq+0x2dc/0x3e8
IODDR0@0.0: [<80407b1c>] e1000_clean_rx_irq+0x2dc/0x3e8
IODDR0@0.0: [<804079c8>] e1000_clean_rx_irq+0x188/0x3e8
IODDR0@0.0: [<80407b1c>] e1000_clean_rx_irq+0x2dc/0x3e8
IODDR0@0.0: [<80468b48>] __dev_kfree_skb_any+0x88/0xa8
IODDR0@0.0: [<804101ac>] e1000e_poll+0x94/0x288
IODDR0@0.0: [<8046e9d4>] net_rx_action+0x19c/0x4e8
IODDR0@0.0:   ...
IODDR0@0.0: Maximum depth to print reached. Use kstack=<maximum_depth_to_print> To specify a custom value (where 0 means to display the full backtrace)
IODDR0@0.0: ---[ end Kernel panic - not syncing: BUG!

Signed-off-by: Pierre-Yves Kerbrat <pkerbrat@kalray.eu>
Signed-off-by: Marius Gligor <mgligor@kalray.eu>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Reviewed-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/intel/e1000e/netdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 20d8806d2bff8..6369d88b81c1b 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -2330,8 +2330,8 @@ static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
 {
 	struct pci_dev *pdev = adapter->pdev;
 
-	ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
-					GFP_KERNEL);
+	ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
+					 GFP_KERNEL);
 	if (!ring->desc)
 		return -ENOMEM;
 

From 4f0082a0738f3ef6c6e3ee48b2a5801156c0d381 Mon Sep 17 00:00:00 2001
From: Merlijn Wajer <merlijn@wizzup.org>
Date: Mon, 5 Mar 2018 11:35:10 -0600
Subject: [PATCH 0327/1852] usb: musb: call pm_runtime_{get,put}_sync before
 reading vbus registers

[ Upstream commit df6b074dbe248d8c43a82131e8fd429e401841a5 ]

Without pm_runtime_{get,put}_sync calls in place, reading
vbus status via /sys causes the following error:

Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa0ab060
pgd = b333e822
[fa0ab060] *pgd=48011452(bad)

[<c05261b0>] (musb_default_readb) from [<c0525bd0>] (musb_vbus_show+0x58/0xe4)
[<c0525bd0>] (musb_vbus_show) from [<c04c0148>] (dev_attr_show+0x20/0x44)
[<c04c0148>] (dev_attr_show) from [<c0259f74>] (sysfs_kf_seq_show+0x80/0xdc)
[<c0259f74>] (sysfs_kf_seq_show) from [<c0210bac>] (seq_read+0x250/0x448)
[<c0210bac>] (seq_read) from [<c01edb40>] (__vfs_read+0x1c/0x118)
[<c01edb40>] (__vfs_read) from [<c01edccc>] (vfs_read+0x90/0x144)
[<c01edccc>] (vfs_read) from [<c01ee1d0>] (SyS_read+0x3c/0x74)
[<c01ee1d0>] (SyS_read) from [<c0106fe0>] (ret_fast_syscall+0x0/0x54)

Solution was suggested by Tony Lindgren <tony@atomide.com>.

Signed-off-by: Merlijn Wajer <merlijn@wizzup.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/musb/musb_core.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index c6cd8691967f1..3a81b4c4d0ddc 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1775,6 +1775,7 @@ musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf)
 	int		vbus;
 	u8		devctl;
 
+	pm_runtime_get_sync(dev);
 	spin_lock_irqsave(&musb->lock, flags);
 	val = musb->a_wait_bcon;
 	vbus = musb_platform_get_vbus_status(musb);
@@ -1788,6 +1789,7 @@ musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf)
 			vbus = 0;
 	}
 	spin_unlock_irqrestore(&musb->lock, flags);
+	pm_runtime_put_sync(dev);
 
 	return sprintf(buf, "Vbus %s, timeout %lu msec\n",
 			vbus ? "on" : "off", val);

From 786e78a014dd55df8bdf4bb9596a29a94b5937c5 Mon Sep 17 00:00:00 2001
From: Hannes Reinecke <hare@suse.de>
Date: Mon, 26 Feb 2018 15:26:01 +0100
Subject: [PATCH 0328/1852] scsi: mpt3sas: Do not mark fw_event workqueue as
 WQ_MEM_RECLAIM

[ Upstream commit 864449eea7c600596e305ffdc4a6a846414b222c ]

The firmware event workqueue should not be marked as WQ_MEM_RECLAIM
as it's doesn't need to make forward progress under memory pressure.
In the current state it will result in a deadlock if the device had been
forcefully removed.

Cc: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
Cc: Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com>
Acked-by: Sreekanth Reddy <Sreekanth.Reddy@broadcom.com>
Signed-off-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/mpt3sas/mpt3sas_scsih.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index b868ef3b2ca37..7d67a68bcc624 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -8637,7 +8637,7 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	snprintf(ioc->firmware_event_name, sizeof(ioc->firmware_event_name),
 	    "fw_event_%s%d", ioc->driver_name, ioc->id);
 	ioc->firmware_event_thread = alloc_ordered_workqueue(
-	    ioc->firmware_event_name, WQ_MEM_RECLAIM);
+	    ioc->firmware_event_name, 0);
 	if (!ioc->firmware_event_thread) {
 		pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
 		    ioc->name, __FILE__, __LINE__, __func__);

From e3f813b9e285e4549b2023d287ec554276485931 Mon Sep 17 00:00:00 2001
From: Jeremy Cline <jeremy@jcline.org>
Date: Tue, 6 Mar 2018 21:47:32 +0000
Subject: [PATCH 0329/1852] scsi: sd: Keep disk read-only when re-reading
 partition

[ Upstream commit 20bd1d026aacc5399464f8328f305985c493cde3 ]

If the read-only flag is true on a SCSI disk, re-reading the partition
table sets the flag back to false.

To observe this bug, you can run:

1. blockdev --setro /dev/sda
2. blockdev --rereadpt /dev/sda
3. blockdev --getro /dev/sda

This commit reads the disk's old state and combines it with the device
disk-reported state rather than unconditionally marking it as RW.

Reported-by: Li Ning <lining916740672@icloud.com>
Signed-off-by: Jeremy Cline <jeremy@jcline.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 8c9e4a3ec3fba..6fffb73766dec 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2395,6 +2395,7 @@ sd_read_write_protect_flag(struct scsi_disk *sdkp, unsigned char *buffer)
 	int res;
 	struct scsi_device *sdp = sdkp->device;
 	struct scsi_mode_data data;
+	int disk_ro = get_disk_ro(sdkp->disk);
 	int old_wp = sdkp->write_prot;
 
 	set_disk_ro(sdkp->disk, 0);
@@ -2435,7 +2436,7 @@ sd_read_write_protect_flag(struct scsi_disk *sdkp, unsigned char *buffer)
 			  "Test WP failed, assume Write Enabled\n");
 	} else {
 		sdkp->write_prot = ((data.device_specific & 0x80) != 0);
-		set_disk_ro(sdkp->disk, sdkp->write_prot);
+		set_disk_ro(sdkp->disk, sdkp->write_prot || disk_ro);
 		if (sdkp->first_scan || old_wp != sdkp->write_prot) {
 			sd_printk(KERN_NOTICE, sdkp, "Write Protect is %s\n",
 				  sdkp->write_prot ? "on" : "off");

From 0276d23ba28ac1e8598539e57816a7ff52c55721 Mon Sep 17 00:00:00 2001
From: Peter Malone <peter.malone@gmail.com>
Date: Wed, 7 Mar 2018 14:00:34 +0100
Subject: [PATCH 0330/1852] fbdev: Fixing arbitrary kernel leak in case
 FBIOGETCMAP_SPARC in sbusfb_ioctl_helper().

[ Upstream commit 250c6c49e3b68756b14983c076183568636e2bde ]

Fixing arbitrary kernel leak in case FBIOGETCMAP_SPARC in
sbusfb_ioctl_helper().

'index' is defined as an int in sbusfb_ioctl_helper().
We retrieve this from the user:
if (get_user(index, &c->index) ||
    __get_user(count, &c->count) ||
    __get_user(ured, &c->red) ||
    __get_user(ugreen, &c->green) ||
    __get_user(ublue, &c->blue))
       return -EFAULT;

and then we use 'index' in the following way:
red = cmap->red[index + i] >> 8;
green = cmap->green[index + i] >> 8;
blue = cmap->blue[index + i] >> 8;

This is a classic information leak vulnerability. 'index' should be
an unsigned int, given its usage above.

This patch is straight-forward; it changes 'index' to unsigned int
in two switch-cases: FBIOGETCMAP_SPARC && FBIOPUTCMAP_SPARC.

This patch fixes CVE-2018-6412.

Signed-off-by: Peter Malone <peter.malone@gmail.com>
Acked-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/video/fbdev/sbuslib.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/fbdev/sbuslib.c b/drivers/video/fbdev/sbuslib.c
index a350209ffbd3d..31c301d6be621 100644
--- a/drivers/video/fbdev/sbuslib.c
+++ b/drivers/video/fbdev/sbuslib.c
@@ -121,7 +121,7 @@ int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg,
 		unsigned char __user *ured;
 		unsigned char __user *ugreen;
 		unsigned char __user *ublue;
-		int index, count, i;
+		unsigned int index, count, i;
 
 		if (get_user(index, &c->index) ||
 		    __get_user(count, &c->count) ||
@@ -160,7 +160,7 @@ int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg,
 		unsigned char __user *ugreen;
 		unsigned char __user *ublue;
 		struct fb_cmap *cmap = &info->cmap;
-		int index, count, i;
+		unsigned int index, count, i;
 		u8 red, green, blue;
 
 		if (get_user(index, &c->index) ||

From 72b86f6d6e4409692b4b5d846f40b0078b150a38 Mon Sep 17 00:00:00 2001
From: Arvind Yadav <arvind.yadav.cs@gmail.com>
Date: Tue, 6 Mar 2018 15:40:37 +0530
Subject: [PATCH 0331/1852] xen: xenbus: use put_device() instead of kfree()

[ Upstream commit 351b2bccede1cb673ec7957b35ea997ea24c8884 ]

Never directly free @dev after calling device_register(), even
if it returned an error! Always use put_device() to give up the
reference initialized.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/xenbus/xenbus_probe.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c
index 33a31cfef55dd..c2d447687e33f 100644
--- a/drivers/xen/xenbus/xenbus_probe.c
+++ b/drivers/xen/xenbus/xenbus_probe.c
@@ -470,8 +470,11 @@ int xenbus_probe_node(struct xen_bus_type *bus,
 
 	/* Register with generic device framework. */
 	err = device_register(&xendev->dev);
-	if (err)
+	if (err) {
+		put_device(&xendev->dev);
+		xendev = NULL;
 		goto fail;
+	}
 
 	return 0;
 fail:

From a35b0e73b364597609118f53b924e01137b6cff9 Mon Sep 17 00:00:00 2001
From: Fredrik Noring <noring@nocrew.org>
Date: Fri, 9 Mar 2018 18:34:34 +0100
Subject: [PATCH 0332/1852] USB: OHCI: Fix NULL dereference in HCDs using
 HCD_LOCAL_MEM

[ Upstream commit d6c931ea32dc08ac2665bb5f009f9c40ad1bbdb3 ]

Scatter-gather needs to be disabled when using dma_declare_coherent_memory
and HCD_LOCAL_MEM. Andrea Righi made the equivalent fix for EHCI drivers
in commit 4307a28eb01284 "USB: EHCI: fix NULL pointer dererence in HCDs
that use HCD_LOCAL_MEM".

The following NULL pointer WARN_ON_ONCE triggered with OHCI drivers:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 49 at drivers/usb/core/hcd.c:1379 hcd_alloc_coherent+0x4c/0xc8
Modules linked in:
CPU: 0 PID: 49 Comm: usb-storage Not tainted 4.15.0+ #1014
Stack : 00000000 00000000 805a78d2 0000003a 81f5c2cc 8053d367 804d77fc 00000031
        805a3a08 00000563 81ee9400 805a0000 00000000 10058c00 81f61b10 805c0000
        00000000 00000000 805a0000 00d9038e 00000004 803ee818 00000006 312e3420
        805c0000 00000000 00000073 81f61958 00000000 00000000 802eb380 804fd538
        00000009 00000563 81ee9400 805a0000 00000002 80056148 00000000 805a0000
        ...
Call Trace:
[<578af360>] show_stack+0x74/0x104
[<2f3702c6>] __warn+0x118/0x120
[<ae93fc9e>] warn_slowpath_null+0x44/0x58
[<a891a517>] hcd_alloc_coherent+0x4c/0xc8
[<3578fa36>] usb_hcd_map_urb_for_dma+0x4d8/0x534
[<110bc94c>] usb_hcd_submit_urb+0x82c/0x834
[<02eb5baf>] usb_sg_wait+0x14c/0x1a0
[<ccd09e85>] usb_stor_bulk_transfer_sglist.part.1+0xac/0x124
[<87a5c34c>] usb_stor_bulk_srb+0x40/0x60
[<ff1792ac>] usb_stor_Bulk_transport+0x160/0x37c
[<b9e2709c>] usb_stor_invoke_transport+0x3c/0x500
[<004754f4>] usb_stor_control_thread+0x258/0x28c
[<22edf42e>] kthread+0x134/0x13c
[<a419ffd0>] ret_from_kernel_thread+0x14/0x1c
---[ end trace bcdb825805eefdcc ]---

Signed-off-by: Fredrik Noring <noring@nocrew.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>


Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/host/ohci-hcd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 9d1192aea9d0c..602c6e42c34de 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -444,7 +444,8 @@ static int ohci_init (struct ohci_hcd *ohci)
 	struct usb_hcd *hcd = ohci_to_hcd(ohci);
 
 	/* Accept arbitrarily long scatter-gather lists */
-	hcd->self.sg_tablesize = ~0;
+	if (!(hcd->driver->flags & HCD_LOCAL_MEM))
+		hcd->self.sg_tablesize = ~0;
 
 	if (distrust_firmware)
 		ohci->flags |= OHCI_QUIRK_HUB_POWER;

From 81a7f6d3e097d6111806fcaec26f17b90155cccd Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Thu, 8 Mar 2018 12:54:19 +0100
Subject: [PATCH 0333/1852] netfilter: ebtables: fix erroneous reject of last
 rule

[ Upstream commit 932909d9b28d27e807ff8eecb68c7748f6701628 ]

The last rule in the blob has next_entry offset that is same as total size.
This made "ebtables32 -A OUTPUT -d de:ad:be:ef:01:02" fail on 64 bit kernel.

Fixes: b71812168571fa ("netfilter: ebtables: CONFIG_COMPAT: don't trust userland offsets")
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/netfilter/ebtables.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c
index 8eaaf291b2852..51eab9b5baa1a 100644
--- a/net/bridge/netfilter/ebtables.c
+++ b/net/bridge/netfilter/ebtables.c
@@ -2088,8 +2088,12 @@ static int size_entry_mwt(struct ebt_entry *entry, const unsigned char *base,
 	 * offsets are relative to beginning of struct ebt_entry (i.e., 0).
 	 */
 	for (i = 0; i < 4 ; ++i) {
-		if (offsets[i] >= *total)
+		if (offsets[i] > *total)
 			return -EINVAL;
+
+		if (i < 3 && offsets[i] == *total)
+			return -EINVAL;
+
 		if (i == 0)
 			continue;
 		if (offsets[i-1] > offsets[i])

From ccc9905eda3a844ee5dbfae97253037f1c013efd Mon Sep 17 00:00:00 2001
From: Michael Chan <michael.chan@broadcom.com>
Date: Fri, 9 Mar 2018 23:46:10 -0500
Subject: [PATCH 0334/1852] bnxt_en: Check valid VNIC ID in
 bnxt_hwrm_vnic_set_tpa().

[ Upstream commit 3c4fe80b32c685bdc02b280814d0cfe80d441c72 ]

During initialization, if we encounter errors, there is a code path that
calls bnxt_hwrm_vnic_set_tpa() with invalid VNIC ID.  This may cause a
warning in firmware logs.

Fixes: c0c050c58d84 ("bnxt_en: New Broadcom ethernet driver.")
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bnxt/bnxt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
index a38a9cb3d544c..9904d768a20a7 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -2925,6 +2925,9 @@ static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
 	struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
 	struct hwrm_vnic_tpa_cfg_input req = {0};
 
+	if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
+		return 0;
+
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_VNIC_TPA_CFG, -1, -1);
 
 	if (tpa_flags) {

From f48021aaad974f06920f985009461da3a47afa8b Mon Sep 17 00:00:00 2001
From: Arvind Yadav <arvind.yadav.cs@gmail.com>
Date: Tue, 6 Mar 2018 15:35:43 +0530
Subject: [PATCH 0335/1852] workqueue: use put_device() instead of kfree()

[ Upstream commit 537f4146c53c95aac977852b371bafb9c6755ee1 ]

Never directly free @dev after calling device_register(), even
if it returned an error! Always use put_device() to give up the
reference initialized in this function instead.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/workqueue.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index 8df77ed6aa99c..d8a2084b88dbb 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -5199,7 +5199,7 @@ int workqueue_sysfs_register(struct workqueue_struct *wq)
 
 	ret = device_register(&wq_dev->dev);
 	if (ret) {
-		kfree(wq_dev);
+		put_device(&wq_dev->dev);
 		wq->wq_dev = NULL;
 		return ret;
 	}

From f8ba5360ef0e804a1d7a882cfe570c08b750db77 Mon Sep 17 00:00:00 2001
From: Sabrina Dubroca <sd@queasysnail.net>
Date: Wed, 14 Mar 2018 10:21:14 +0100
Subject: [PATCH 0336/1852] ipv4: lock mtu in fnhe when received PMTU <
 net.ipv4.route.min_pmtu

[ Upstream commit d52e5a7e7ca49457dd31fc8b42fb7c0d58a31221 ]

Prior to the rework of PMTU information storage in commit
2c8cec5c10bc ("ipv4: Cache learned PMTU information in inetpeer."),
when a PMTU event advertising a PMTU smaller than
net.ipv4.route.min_pmtu was received, we would disable setting the DF
flag on packets by locking the MTU metric, and set the PMTU to
net.ipv4.route.min_pmtu.

Since then, we don't disable DF, and set PMTU to
net.ipv4.route.min_pmtu, so the intermediate router that has this link
with a small MTU will have to drop the packets.

This patch reestablishes pre-2.6.39 behavior by splitting
rtable->rt_pmtu into a bitfield with rt_mtu_locked and rt_pmtu.
rt_mtu_locked indicates that we shouldn't set the DF bit on that path,
and is checked in ip_dont_fragment().

One possible workaround is to set net.ipv4.route.min_pmtu to a value low
enough to accommodate the lowest MTU encountered.

Fixes: 2c8cec5c10bc ("ipv4: Cache learned PMTU information in inetpeer.")
Signed-off-by: Sabrina Dubroca <sd@queasysnail.net>
Reviewed-by: Stefano Brivio <sbrivio@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/ip.h        | 11 +++++++++--
 include/net/ip_fib.h    |  1 +
 include/net/route.h     |  3 ++-
 net/ipv4/route.c        | 26 +++++++++++++++++++-------
 net/ipv4/xfrm4_policy.c |  1 +
 5 files changed, 32 insertions(+), 10 deletions(-)

diff --git a/include/net/ip.h b/include/net/ip.h
index 119c6cae83805..10664a684acf3 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -280,6 +280,13 @@ int ip_decrease_ttl(struct iphdr *iph)
 	return --iph->ttl;
 }
 
+static inline int ip_mtu_locked(const struct dst_entry *dst)
+{
+	const struct rtable *rt = (const struct rtable *)dst;
+
+	return rt->rt_mtu_locked || dst_metric_locked(dst, RTAX_MTU);
+}
+
 static inline
 int ip_dont_fragment(const struct sock *sk, const struct dst_entry *dst)
 {
@@ -287,7 +294,7 @@ int ip_dont_fragment(const struct sock *sk, const struct dst_entry *dst)
 
 	return  pmtudisc == IP_PMTUDISC_DO ||
 		(pmtudisc == IP_PMTUDISC_WANT &&
-		 !(dst_metric_locked(dst, RTAX_MTU)));
+		 !ip_mtu_locked(dst));
 }
 
 static inline bool ip_sk_accept_pmtu(const struct sock *sk)
@@ -313,7 +320,7 @@ static inline unsigned int ip_dst_mtu_maybe_forward(const struct dst_entry *dst,
 	struct net *net = dev_net(dst->dev);
 
 	if (net->ipv4.sysctl_ip_fwd_use_pmtu ||
-	    dst_metric_locked(dst, RTAX_MTU) ||
+	    ip_mtu_locked(dst) ||
 	    !forwarding)
 		return dst_mtu(dst);
 
diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h
index bda1721e96227..3afb7c4c70988 100644
--- a/include/net/ip_fib.h
+++ b/include/net/ip_fib.h
@@ -56,6 +56,7 @@ struct fib_nh_exception {
 	int				fnhe_genid;
 	__be32				fnhe_daddr;
 	u32				fnhe_pmtu;
+	bool				fnhe_mtu_locked;
 	__be32				fnhe_gw;
 	unsigned long			fnhe_expires;
 	struct rtable __rcu		*fnhe_rth_input;
diff --git a/include/net/route.h b/include/net/route.h
index 3adb9c724818d..11dfd0df0e67d 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -64,7 +64,8 @@ struct rtable {
 	__be32			rt_gateway;
 
 	/* Miscellaneous cached information */
-	u32			rt_pmtu;
+	u32			rt_mtu_locked:1,
+				rt_pmtu:31;
 
 	u32			rt_table_id;
 
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index ce4f10e9513af..75406603fa1e4 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -615,6 +615,7 @@ static inline u32 fnhe_hashfun(__be32 daddr)
 static void fill_route_from_fnhe(struct rtable *rt, struct fib_nh_exception *fnhe)
 {
 	rt->rt_pmtu = fnhe->fnhe_pmtu;
+	rt->rt_mtu_locked = fnhe->fnhe_mtu_locked;
 	rt->dst.expires = fnhe->fnhe_expires;
 
 	if (fnhe->fnhe_gw) {
@@ -625,7 +626,7 @@ static void fill_route_from_fnhe(struct rtable *rt, struct fib_nh_exception *fnh
 }
 
 static void update_or_create_fnhe(struct fib_nh *nh, __be32 daddr, __be32 gw,
-				  u32 pmtu, unsigned long expires)
+				  u32 pmtu, bool lock, unsigned long expires)
 {
 	struct fnhe_hash_bucket *hash;
 	struct fib_nh_exception *fnhe;
@@ -662,8 +663,10 @@ static void update_or_create_fnhe(struct fib_nh *nh, __be32 daddr, __be32 gw,
 			fnhe->fnhe_genid = genid;
 		if (gw)
 			fnhe->fnhe_gw = gw;
-		if (pmtu)
+		if (pmtu) {
 			fnhe->fnhe_pmtu = pmtu;
+			fnhe->fnhe_mtu_locked = lock;
+		}
 		fnhe->fnhe_expires = max(1UL, expires);
 		/* Update all cached dsts too */
 		rt = rcu_dereference(fnhe->fnhe_rth_input);
@@ -687,6 +690,7 @@ static void update_or_create_fnhe(struct fib_nh *nh, __be32 daddr, __be32 gw,
 		fnhe->fnhe_daddr = daddr;
 		fnhe->fnhe_gw = gw;
 		fnhe->fnhe_pmtu = pmtu;
+		fnhe->fnhe_mtu_locked = lock;
 		fnhe->fnhe_expires = expires;
 
 		/* Exception created; mark the cached routes for the nexthop
@@ -768,7 +772,8 @@ static void __ip_do_redirect(struct rtable *rt, struct sk_buff *skb, struct flow
 				struct fib_nh *nh = &FIB_RES_NH(res);
 
 				update_or_create_fnhe(nh, fl4->daddr, new_gw,
-						0, jiffies + ip_rt_gc_timeout);
+						0, false,
+						jiffies + ip_rt_gc_timeout);
 			}
 			if (kill_route)
 				rt->dst.obsolete = DST_OBSOLETE_KILL;
@@ -981,15 +986,18 @@ static void __ip_rt_update_pmtu(struct rtable *rt, struct flowi4 *fl4, u32 mtu)
 {
 	struct dst_entry *dst = &rt->dst;
 	struct fib_result res;
+	bool lock = false;
 
-	if (dst_metric_locked(dst, RTAX_MTU))
+	if (ip_mtu_locked(dst))
 		return;
 
 	if (ipv4_mtu(dst) < mtu)
 		return;
 
-	if (mtu < ip_rt_min_pmtu)
+	if (mtu < ip_rt_min_pmtu) {
+		lock = true;
 		mtu = ip_rt_min_pmtu;
+	}
 
 	if (rt->rt_pmtu == mtu &&
 	    time_before(jiffies, dst->expires - ip_rt_mtu_expires / 2))
@@ -999,7 +1007,7 @@ static void __ip_rt_update_pmtu(struct rtable *rt, struct flowi4 *fl4, u32 mtu)
 	if (fib_lookup(dev_net(dst->dev), fl4, &res, 0) == 0) {
 		struct fib_nh *nh = &FIB_RES_NH(res);
 
-		update_or_create_fnhe(nh, fl4->daddr, 0, mtu,
+		update_or_create_fnhe(nh, fl4->daddr, 0, mtu, lock,
 				      jiffies + ip_rt_mtu_expires);
 	}
 	rcu_read_unlock();
@@ -1256,7 +1264,7 @@ static unsigned int ipv4_mtu(const struct dst_entry *dst)
 
 	mtu = READ_ONCE(dst->dev->mtu);
 
-	if (unlikely(dst_metric_locked(dst, RTAX_MTU))) {
+	if (unlikely(ip_mtu_locked(dst))) {
 		if (rt->rt_uses_gateway && mtu > 576)
 			mtu = 576;
 	}
@@ -1479,6 +1487,7 @@ static struct rtable *rt_dst_alloc(struct net_device *dev,
 		rt->rt_is_input = 0;
 		rt->rt_iif = 0;
 		rt->rt_pmtu = 0;
+		rt->rt_mtu_locked = 0;
 		rt->rt_gateway = 0;
 		rt->rt_uses_gateway = 0;
 		rt->rt_table_id = 0;
@@ -2399,6 +2408,7 @@ struct dst_entry *ipv4_blackhole_route(struct net *net, struct dst_entry *dst_or
 		rt->rt_is_input = ort->rt_is_input;
 		rt->rt_iif = ort->rt_iif;
 		rt->rt_pmtu = ort->rt_pmtu;
+		rt->rt_mtu_locked = ort->rt_mtu_locked;
 
 		rt->rt_genid = rt_genid_ipv4(net);
 		rt->rt_flags = ort->rt_flags;
@@ -2501,6 +2511,8 @@ static int rt_fill_info(struct net *net,  __be32 dst, __be32 src, u32 table_id,
 	memcpy(metrics, dst_metrics_ptr(&rt->dst), sizeof(metrics));
 	if (rt->rt_pmtu && expires)
 		metrics[RTAX_MTU - 1] = rt->rt_pmtu;
+	if (rt->rt_mtu_locked && expires)
+		metrics[RTAX_LOCK - 1] |= BIT(RTAX_MTU);
 	if (rtnetlink_put_metrics(skb, metrics) < 0)
 		goto nla_put_failure;
 
diff --git a/net/ipv4/xfrm4_policy.c b/net/ipv4/xfrm4_policy.c
index 39eebc7b2831b..528f137186874 100644
--- a/net/ipv4/xfrm4_policy.c
+++ b/net/ipv4/xfrm4_policy.c
@@ -101,6 +101,7 @@ static int xfrm4_fill_dst(struct xfrm_dst *xdst, struct net_device *dev,
 	xdst->u.rt.rt_gateway = rt->rt_gateway;
 	xdst->u.rt.rt_uses_gateway = rt->rt_uses_gateway;
 	xdst->u.rt.rt_pmtu = rt->rt_pmtu;
+	xdst->u.rt.rt_mtu_locked = rt->rt_mtu_locked;
 	xdst->u.rt.rt_table_id = rt->rt_table_id;
 	INIT_LIST_HEAD(&xdst->u.rt.rt_uncached);
 

From 76485f7231500029c30c06e72501ef07b95f5715 Mon Sep 17 00:00:00 2001
From: Cathy Zhou <Cathy.Zhou@Oracle.COM>
Date: Wed, 14 Mar 2018 10:56:07 -0700
Subject: [PATCH 0337/1852] sunvnet: does not support GSO for sctp

[ Upstream commit cf55612a945039476abfd73e39064b2e721c3272 ]

The NETIF_F_GSO_SOFTWARE implies support for GSO on SCTP, but the
sunvnet driver does not support GSO for sctp.  Here we remove the
NETIF_F_GSO_SOFTWARE feature flag and only report NETIF_F_ALL_TSO
instead.

Signed-off-by: Cathy Zhou <Cathy.Zhou@Oracle.COM>
Signed-off-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/sun/sunvnet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/sun/sunvnet.c b/drivers/net/ethernet/sun/sunvnet.c
index cc106d892e297..b15e322b8bfe5 100644
--- a/drivers/net/ethernet/sun/sunvnet.c
+++ b/drivers/net/ethernet/sun/sunvnet.c
@@ -1787,7 +1787,7 @@ static struct vnet *vnet_new(const u64 *local_mac,
 	dev->ethtool_ops = &vnet_ethtool_ops;
 	dev->watchdog_timeo = VNET_TX_TIMEOUT;
 
-	dev->hw_features = NETIF_F_TSO | NETIF_F_GSO | NETIF_F_GSO_SOFTWARE |
+	dev->hw_features = NETIF_F_TSO | NETIF_F_GSO | NETIF_F_ALL_TSO |
 			   NETIF_F_HW_CSUM | NETIF_F_SG;
 	dev->features = dev->hw_features;
 

From 5c2d3a5747522e9e767c7ec9a445f525a0a04fb9 Mon Sep 17 00:00:00 2001
From: Toshiaki Makita <makita.toshiaki@lab.ntt.co.jp>
Date: Tue, 13 Mar 2018 14:51:27 +0900
Subject: [PATCH 0338/1852] net: Fix vlan untag for bridge and vlan_dev with
 reorder_hdr off

[ Upstream commit 4bbb3e0e8239f9079bf1fe20b3c0cb598714ae61 ]

When we have a bridge with vlan_filtering on and a vlan device on top of
it, packets would be corrupted in skb_vlan_untag() called from
br_dev_xmit().

The problem sits in skb_reorder_vlan_header() used in skb_vlan_untag(),
which makes use of skb->mac_len. In this function mac_len is meant for
handling rx path with vlan devices with reorder_header disabled, but in
tx path mac_len is typically 0 and cannot be used, which is the problem
in this case.

The current code even does not properly handle rx path (skb_vlan_untag()
called from __netif_receive_skb_core()) with reorder_header off actually.

In rx path single tag case, it works as follows:

- Before skb_reorder_vlan_header()

 mac_header                                data
   v                                        v
   +-------------------+-------------+------+----
   |        ETH        |    VLAN     | ETH  |
   |       ADDRS       | TPID | TCI  | TYPE |
   +-------------------+-------------+------+----
   <-------- mac_len --------->
                       <------------->
                        to be removed

- After skb_reorder_vlan_header()

            mac_header                     data
                 v                          v
                 +-------------------+------+----
                 |        ETH        | ETH  |
                 |       ADDRS       | TYPE |
                 +-------------------+------+----
                 <-------- mac_len --------->

This is ok, but in rx double tag case, it corrupts packets:

- Before skb_reorder_vlan_header()

 mac_header                                              data
   v                                                      v
   +-------------------+-------------+-------------+------+----
   |        ETH        |    VLAN     |    VLAN     | ETH  |
   |       ADDRS       | TPID | TCI  | TPID | TCI  | TYPE |
   +-------------------+-------------+-------------+------+----
   <--------------- mac_len ---------------->
                                     <------------->
                                    should be removed
                       <--------------------------->
                         actually will be removed

- After skb_reorder_vlan_header()

            mac_header                                   data
                 v                                        v
                               +-------------------+------+----
                               |        ETH        | ETH  |
                               |       ADDRS       | TYPE |
                               +-------------------+------+----
                 <--------------- mac_len ---------------->

So, two of vlan tags are both removed while only inner one should be
removed and mac_header (and mac_len) is broken.

skb_vlan_untag() is meant for removing the vlan header at (skb->data - 2),
so use skb->data and skb->mac_header to calculate the right offset.

Reported-by: Brandon Carpenter <brandon.carpenter@cypherpath.com>
Fixes: a6e18ff11170 ("vlan: Fix untag operations of stacked vlans with REORDER_HEADER off")
Signed-off-by: Toshiaki Makita <makita.toshiaki@lab.ntt.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/uapi/linux/if_ether.h | 1 +
 net/core/skbuff.c             | 7 +++++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/uapi/linux/if_ether.h b/include/uapi/linux/if_ether.h
index ea9221b0331ad..064d2026ab388 100644
--- a/include/uapi/linux/if_ether.h
+++ b/include/uapi/linux/if_ether.h
@@ -29,6 +29,7 @@
  */
 
 #define ETH_ALEN	6		/* Octets in one ethernet addr	 */
+#define ETH_TLEN	2		/* Octets in ethernet type field */
 #define ETH_HLEN	14		/* Total octets in header.	 */
 #define ETH_ZLEN	60		/* Min. octets in frame sans FCS */
 #define ETH_DATA_LEN	1500		/* Max. octets in payload	 */
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 5668dd3f99699..31b9aaca3730b 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -4295,13 +4295,16 @@ EXPORT_SYMBOL_GPL(skb_gso_transport_seglen);
 
 static struct sk_buff *skb_reorder_vlan_header(struct sk_buff *skb)
 {
+	int mac_len;
+
 	if (skb_cow(skb, skb_headroom(skb)) < 0) {
 		kfree_skb(skb);
 		return NULL;
 	}
 
-	memmove(skb->data - ETH_HLEN, skb->data - skb->mac_len - VLAN_HLEN,
-		2 * ETH_ALEN);
+	mac_len = skb->data - skb_mac_header(skb);
+	memmove(skb_mac_header(skb) + VLAN_HLEN, skb_mac_header(skb),
+		mac_len - VLAN_HLEN - ETH_TLEN);
 	skb->mac_header += VLAN_HLEN;
 	return skb;
 }

From 4c1cc596bf3f60153c50c6eb193259796dafd5eb Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Fri, 16 Mar 2018 11:29:10 +0100
Subject: [PATCH 0339/1852] batman-adv: fix header size check in
 batadv_dbg_arp()

[ Upstream commit 6f27d2c2a8c236d296201c19abb8533ec20d212b ]

Checking for 0 is insufficient: when an SKB without a batadv header, but
with a VLAN header is received, hdr_size will be 4, making the following
code interpret the Ethernet header as a batadv header.

Fixes: be1db4f6615b ("batman-adv: make the Distributed ARP Table vlan aware")
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/batman-adv/distributed-arp-table.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/batman-adv/distributed-arp-table.c b/net/batman-adv/distributed-arp-table.c
index 5f19133c5530f..c2dff7c6e9607 100644
--- a/net/batman-adv/distributed-arp-table.c
+++ b/net/batman-adv/distributed-arp-table.c
@@ -374,7 +374,7 @@ static void batadv_dbg_arp(struct batadv_priv *bat_priv, struct sk_buff *skb,
 		   batadv_arp_hw_src(skb, hdr_size), &ip_src,
 		   batadv_arp_hw_dst(skb, hdr_size), &ip_dst);
 
-	if (hdr_size == 0)
+	if (hdr_size < sizeof(struct batadv_unicast_packet))
 		return;
 
 	unicast_4addr_packet = (struct batadv_unicast_4addr_packet *)skb->data;

From b36eb6d93329e59e6cfe1f1ae1c6cba8c27c9fe1 Mon Sep 17 00:00:00 2001
From: Stefano Brivio <sbrivio@redhat.com>
Date: Thu, 15 Mar 2018 17:16:27 +0100
Subject: [PATCH 0340/1852] vti4: Don't count header length twice on tunnel
 setup

[ Upstream commit dd1df24737727e119c263acf1be2a92763938297 ]

This re-introduces the effect of commit a32452366b72 ("vti4:
Don't count header length twice.") which was accidentally
reverted by merge commit f895f0cfbb77 ("Merge branch 'master' of
git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec").

The commit message from Steffen Klassert said:

    We currently count the size of LL_MAX_HEADER and struct iphdr
    twice for vti4 devices, this leads to a wrong device mtu.
    The size of LL_MAX_HEADER and struct iphdr is already counted in
    ip_tunnel_bind_dev(), so don't do it again in vti_tunnel_init().

And this is still the case now: ip_tunnel_bind_dev() already
accounts for the header length of the link layer (not
necessarily LL_MAX_HEADER, if the output device is found), plus
one IP header.

For example, with a vti device on top of veth, with MTU of 1500,
the existing implementation would set the initial vti MTU to
1332, accounting once for LL_MAX_HEADER (128, included in
hard_header_len by vti) and twice for the same IP header (once
from hard_header_len, once from ip_tunnel_bind_dev()).

It should instead be 1480, because ip_tunnel_bind_dev() is able
to figure out that the output device is veth, so no additional
link layer header is attached, and will properly count one
single IP header.

The existing issue had the side effect of avoiding PMTUD for
most xfrm policies, by arbitrarily lowering the initial MTU.
However, the only way to get a consistent PMTU value is to let
the xfrm PMTU discovery do its course, and commit d6af1a31cc72
("vti: Add pmtu handling to vti_xmit.") now takes care of local
delivery cases where the application ignores local socket
notifications.

Fixes: b9959fd3b0fa ("vti: switch to new ip tunnel code")
Fixes: f895f0cfbb77 ("Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec")
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Acked-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_vti.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/net/ipv4/ip_vti.c b/net/ipv4/ip_vti.c
index a03f834f16d5b..4b7c81f88abf2 100644
--- a/net/ipv4/ip_vti.c
+++ b/net/ipv4/ip_vti.c
@@ -366,7 +366,6 @@ static int vti_tunnel_init(struct net_device *dev)
 	memcpy(dev->dev_addr, &iph->saddr, 4);
 	memcpy(dev->broadcast, &iph->daddr, 4);
 
-	dev->hard_header_len	= LL_MAX_HEADER + sizeof(struct iphdr);
 	dev->mtu		= ETH_DATA_LEN;
 	dev->flags		= IFF_NOARP;
 	dev->addr_len		= 4;

From c3f30c441ed3cb1554cd710357da446e6b4eef36 Mon Sep 17 00:00:00 2001
From: Stefano Brivio <sbrivio@redhat.com>
Date: Thu, 15 Mar 2018 17:16:29 +0100
Subject: [PATCH 0341/1852] vti4: Don't override MTU passed on link creation
 via IFLA_MTU

[ Upstream commit 03080e5ec72740c1a62e6730f2a5f3f114f11b19 ]

Don't hardcode a MTU value on vti tunnel initialization,
ip_tunnel_newlink() is able to deal with this already. See also
commit ffc2b6ee4174 ("ip_gre: fix IFLA_MTU ignored on NEWLINK").

Fixes: 1181412c1a67 ("net/ipv4: VTI support new module for ip_vti.")
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Acked-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_vti.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/net/ipv4/ip_vti.c b/net/ipv4/ip_vti.c
index 4b7c81f88abf2..fa79e8118b9bc 100644
--- a/net/ipv4/ip_vti.c
+++ b/net/ipv4/ip_vti.c
@@ -366,7 +366,6 @@ static int vti_tunnel_init(struct net_device *dev)
 	memcpy(dev->dev_addr, &iph->saddr, 4);
 	memcpy(dev->broadcast, &iph->daddr, 4);
 
-	dev->mtu		= ETH_DATA_LEN;
 	dev->flags		= IFF_NOARP;
 	dev->addr_len		= 4;
 	dev->features		|= NETIF_F_LLTX;

From 7e3fc0684796edf0b188fd4cb248f1c9467199be Mon Sep 17 00:00:00 2001
From: Song Liu <songliubraving@fb.com>
Date: Mon, 12 Mar 2018 09:59:43 -0700
Subject: [PATCH 0342/1852] perf/cgroup: Fix child event counting bug

[ Upstream commit c917e0f259908e75bd2a65877e25f9d90c22c848 ]

When a perf_event is attached to parent cgroup, it should count events
for all children cgroups:

   parent_group   <---- perf_event
     \
      - child_group  <---- process(es)

However, in our tests, we found this perf_event cannot report reliable
results. Here is an example case:

  # create cgroups
  mkdir -p /sys/fs/cgroup/p/c
  # start perf for parent group
  perf stat -e instructions -G "p"

  # on another console, run test process in child cgroup:
  stressapptest -s 2 -M 1000 & echo $! > /sys/fs/cgroup/p/c/cgroup.procs

  # after the test process is done, stop perf in the first console shows

       <not counted>      instructions              p

The instruction should not be "not counted" as the process runs in the
child cgroup.

We found this is because perf_event->cgrp and cpuctx->cgrp are not
identical, thus perf_event->cgrp are not updated properly.

This patch fixes this by updating perf_cgroup properly for ancestor
cgroup(s).

Reported-by: Ephraim Park <ephiepark@fb.com>
Signed-off-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <jolsa@redhat.com>
Cc: <kernel-team@fb.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/20180312165943.1057894-1-songliubraving@fb.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/events/core.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/kernel/events/core.c b/kernel/events/core.c
index 5f9dbe127b377..0c7d0fab2b7f0 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -424,9 +424,15 @@ static inline void __update_cgrp_time(struct perf_cgroup *cgrp)
 
 static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx)
 {
-	struct perf_cgroup *cgrp_out = cpuctx->cgrp;
-	if (cgrp_out)
-		__update_cgrp_time(cgrp_out);
+	struct perf_cgroup *cgrp = cpuctx->cgrp;
+	struct cgroup_subsys_state *css;
+
+	if (cgrp) {
+		for (css = &cgrp->css; css; css = css->parent) {
+			cgrp = container_of(css, struct perf_cgroup, css);
+			__update_cgrp_time(cgrp);
+		}
+	}
 }
 
 static inline void update_cgrp_time_from_event(struct perf_event *event)
@@ -454,6 +460,7 @@ perf_cgroup_set_timestamp(struct task_struct *task,
 {
 	struct perf_cgroup *cgrp;
 	struct perf_cgroup_info *info;
+	struct cgroup_subsys_state *css;
 
 	/*
 	 * ctx->lock held by caller
@@ -464,8 +471,12 @@ perf_cgroup_set_timestamp(struct task_struct *task,
 		return;
 
 	cgrp = perf_cgroup_from_task(task, ctx);
-	info = this_cpu_ptr(cgrp->info);
-	info->timestamp = ctx->timestamp;
+
+	for (css = &cgrp->css; css; css = css->parent) {
+		cgrp = container_of(css, struct perf_cgroup, css);
+		info = this_cpu_ptr(cgrp->info);
+		info->timestamp = ctx->timestamp;
+	}
 }
 
 #define PERF_CGROUP_SWOUT	0x1 /* cgroup switch out every event */

From af5ffb787ede2b0faa877235327b0019511aa1b2 Mon Sep 17 00:00:00 2001
From: Chien Tin Tung <chien.tin.tung@intel.com>
Date: Wed, 21 Mar 2018 13:09:25 -0500
Subject: [PATCH 0343/1852] RDMA/ucma: Correct option size check using optlen

[ Upstream commit 5f3e3b85cc0a5eae1c46d72e47d3de7bf208d9e2 ]

The option size check is using optval instead of optlen
causing the set option call to fail. Use the correct
field, optlen, for size check.

Fixes: 6a21dfc0d0db ("RDMA/ucma: Limit possible option size")
Signed-off-by: Chien Tin Tung <chien.tin.tung@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Reviewed-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/core/ucma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index 2b9c00faca7d2..795938edce3fc 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -1295,7 +1295,7 @@ static ssize_t ucma_set_option(struct ucma_file *file, const char __user *inbuf,
 	if (IS_ERR(ctx))
 		return PTR_ERR(ctx);
 
-	if (unlikely(cmd.optval > KMALLOC_MAX_SIZE))
+	if (unlikely(cmd.optlen > KMALLOC_MAX_SIZE))
 		return -EINVAL;
 
 	optval = memdup_user((void __user *) (unsigned long) cmd.optval,

From 4e8337d1f342148fbb4780b1088b5e9bc941f00b Mon Sep 17 00:00:00 2001
From: Yisheng Xie <xieyisheng1@huawei.com>
Date: Thu, 22 Mar 2018 16:17:02 -0700
Subject: [PATCH 0344/1852] mm/mempolicy.c: avoid use uninitialized
 preferred_node

[ Upstream commit 8970a63e965b43288c4f5f40efbc2bbf80de7f16 ]

Alexander reported a use of uninitialized memory in __mpol_equal(),
which is caused by incorrect use of preferred_node.

When mempolicy in mode MPOL_PREFERRED with flags MPOL_F_LOCAL, it uses
numa_node_id() instead of preferred_node, however, __mpol_equal() uses
preferred_node without checking whether it is MPOL_F_LOCAL or not.

[akpm@linux-foundation.org: slight comment tweak]
Link: http://lkml.kernel.org/r/4ebee1c2-57f6-bcb8-0e2d-1833d1ee0bb7@huawei.com
Fixes: fc36b8d3d819 ("mempolicy: use MPOL_F_LOCAL to Indicate Preferred Local Policy")
Signed-off-by: Yisheng Xie <xieyisheng1@huawei.com>
Reported-by: Alexander Potapenko <glider@google.com>
Tested-by: Alexander Potapenko <glider@google.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Dmitriy Vyukov <dvyukov@google.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Michal Hocko <mhocko@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/mempolicy.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index d4f68070f35c3..b9b2e25342d4c 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -2143,6 +2143,9 @@ bool __mpol_equal(struct mempolicy *a, struct mempolicy *b)
 	case MPOL_INTERLEAVE:
 		return !!nodes_equal(a->v.nodes, b->v.nodes);
 	case MPOL_PREFERRED:
+		/* a's ->flags is the same as b's */
+		if (a->flags & MPOL_F_LOCAL)
+			return true;
 		return a->v.preferred_node == b->v.preferred_node;
 	default:
 		BUG();

From b426118be7d5bfc9fea54107fb476a5fa13e7d44 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 17 Mar 2018 21:38:56 +0900
Subject: [PATCH 0345/1852] selftests: ftrace: Add probe event argument syntax
 testcase

[ Upstream commit 871bef2000968c312a4000b2f56d370dcedbc93c ]

Add a testcase for probe event argument syntax which
ensures the kprobe_events interface correctly parses
given event arguments.

Link: http://lkml.kernel.org/r/152129033679.31874.12705519603869152799.stgit@devbox

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../test.d/kprobe/kprobe_args_syntax.tc       | 97 +++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_syntax.tc

diff --git a/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_syntax.tc b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_syntax.tc
new file mode 100644
index 0000000000000..231bcd2c4eb59
--- /dev/null
+++ b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_syntax.tc
@@ -0,0 +1,97 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0
+# description: Kprobe event argument syntax
+
+[ -f kprobe_events ] || exit_unsupported # this is configurable
+
+grep "x8/16/32/64" README > /dev/null || exit_unsupported # version issue
+
+echo 0 > events/enable
+echo > kprobe_events
+
+PROBEFUNC="vfs_read"
+GOODREG=
+BADREG=
+GOODSYM="_sdata"
+if ! grep -qw ${GOODSYM} /proc/kallsyms ; then
+  GOODSYM=$PROBEFUNC
+fi
+BADSYM="deaqswdefr"
+SYMADDR=0x`grep -w ${GOODSYM} /proc/kallsyms | cut -f 1 -d " "`
+GOODTYPE="x16"
+BADTYPE="y16"
+
+case `uname -m` in
+x86_64|i[3456]86)
+  GOODREG=%ax
+  BADREG=%ex
+;;
+aarch64)
+  GOODREG=%x0
+  BADREG=%ax
+;;
+arm*)
+  GOODREG=%r0
+  BADREG=%ax
+;;
+esac
+
+test_goodarg() # Good-args
+{
+  while [ "$1" ]; do
+    echo "p ${PROBEFUNC} $1" > kprobe_events
+    shift 1
+  done;
+}
+
+test_badarg() # Bad-args
+{
+  while [ "$1" ]; do
+    ! echo "p ${PROBEFUNC} $1" > kprobe_events
+    shift 1
+  done;
+}
+
+echo > kprobe_events
+
+: "Register access"
+test_goodarg ${GOODREG}
+test_badarg ${BADREG}
+
+: "Symbol access"
+test_goodarg "@${GOODSYM}" "@${SYMADDR}" "@${GOODSYM}+10" "@${GOODSYM}-10"
+test_badarg "@" "@${BADSYM}" "@${GOODSYM}*10" "@${GOODSYM}/10" \
+	    "@${GOODSYM}%10" "@${GOODSYM}&10" "@${GOODSYM}|10"
+
+: "Stack access"
+test_goodarg "\$stack" "\$stack0" "\$stack1"
+test_badarg "\$stackp" "\$stack0+10" "\$stack1-10"
+
+: "Retval access"
+echo "r ${PROBEFUNC} \$retval" > kprobe_events
+! echo "p ${PROBEFUNC} \$retval" > kprobe_events
+
+: "Comm access"
+test_goodarg "\$comm"
+
+: "Indirect memory access"
+test_goodarg "+0(${GOODREG})" "-0(${GOODREG})" "+10(\$stack)" \
+	"+0(\$stack1)" "+10(@${GOODSYM}-10)" "+0(+10(+20(\$stack)))"
+test_badarg "+(${GOODREG})" "(${GOODREG}+10)" "-(${GOODREG})" "(${GOODREG})" \
+	"+10(\$comm)" "+0(${GOODREG})+10"
+
+: "Name assignment"
+test_goodarg "varname=${GOODREG}"
+test_badarg "varname=varname2=${GOODREG}"
+
+: "Type syntax"
+test_goodarg "${GOODREG}:${GOODTYPE}"
+test_badarg "${GOODREG}::${GOODTYPE}" "${GOODREG}:${BADTYPE}" \
+	"${GOODTYPE}:${GOODREG}"
+
+: "Combination check"
+
+test_goodarg "\$comm:string" "+0(\$stack):string"
+test_badarg "\$comm:x64" "\$stack:string" "${GOODREG}:string"
+
+echo > kprobe_events

From cdf8ec2da7359c594c8e69c0b8317a52fd5ef6a8 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 17 Mar 2018 21:39:44 +0900
Subject: [PATCH 0346/1852] selftests: ftrace: Add a testcase for string type
 with kprobe_event

[ Upstream commit 5fbdbed797b6d12d043a5121fdbc8d8b49d10e80 ]

Add a testcase for string type with kprobe event.
This tests good/bad syntax combinations and also
the traced data is correct in several way.

Link: http://lkml.kernel.org/r/152129038381.31874.9201387794548737554.stgit@devbox

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../test.d/kprobe/kprobe_args_string.tc       | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_string.tc

diff --git a/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_string.tc b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_string.tc
new file mode 100644
index 0000000000000..5ba73035e1d95
--- /dev/null
+++ b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_args_string.tc
@@ -0,0 +1,46 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0
+# description: Kprobe event string type argument
+
+[ -f kprobe_events ] || exit_unsupported # this is configurable
+
+echo 0 > events/enable
+echo > kprobe_events
+
+case `uname -m` in
+x86_64)
+  ARG2=%si
+  OFFS=8
+;;
+i[3456]86)
+  ARG2=%cx
+  OFFS=4
+;;
+aarch64)
+  ARG2=%x1
+  OFFS=8
+;;
+arm*)
+  ARG2=%r1
+  OFFS=4
+;;
+*)
+  echo "Please implement other architecture here"
+  exit_untested
+esac
+
+: "Test get argument (1)"
+echo "p:testprobe create_trace_kprobe arg1=+0(+0(${ARG2})):string" > kprobe_events
+echo 1 > events/kprobes/testprobe/enable
+! echo test >> kprobe_events
+tail -n 1 trace | grep -qe "testprobe.* arg1=\"test\""
+
+echo 0 > events/kprobes/testprobe/enable
+: "Test get argument (2)"
+echo "p:testprobe create_trace_kprobe arg1=+0(+0(${ARG2})):string arg2=+0(+${OFFS}(${ARG2})):string" > kprobe_events
+echo 1 > events/kprobes/testprobe/enable
+! echo test1 test2 >> kprobe_events
+tail -n 1 trace | grep -qe "testprobe.* arg1=\"test1\" arg2=\"test2\""
+
+echo 0 > events/enable
+echo > kprobe_events

From 2069ad0b031aed4320e3504acf70416f187e6b46 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 17 Mar 2018 21:40:31 +0900
Subject: [PATCH 0347/1852] selftests: ftrace: Add a testcase for probepoint

[ Upstream commit dfa453bc90eca0febff33c8d292a656e53702158 ]

Add a testcase for probe point definition. This tests
symbol, address and symbol+offset syntax. The offset
must be positive and smaller than UINT_MAX.

Link: http://lkml.kernel.org/r/152129043097.31874.14273580606301767394.stgit@devbox

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../ftrace/test.d/kprobe/probepoint.tc        | 43 +++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 tools/testing/selftests/ftrace/test.d/kprobe/probepoint.tc

diff --git a/tools/testing/selftests/ftrace/test.d/kprobe/probepoint.tc b/tools/testing/selftests/ftrace/test.d/kprobe/probepoint.tc
new file mode 100644
index 0000000000000..4fda01a08da46
--- /dev/null
+++ b/tools/testing/selftests/ftrace/test.d/kprobe/probepoint.tc
@@ -0,0 +1,43 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0
+# description: Kprobe events - probe points
+
+[ -f kprobe_events ] || exit_unsupported # this is configurable
+
+TARGET_FUNC=create_trace_kprobe
+
+dec_addr() { # hexaddr
+  printf "%d" "0x"`echo $1 | tail -c 8`
+}
+
+set_offs() { # prev target next
+  A1=`dec_addr $1`
+  A2=`dec_addr $2`
+  A3=`dec_addr $3`
+  TARGET="0x$2" # an address
+  PREV=`expr $A1 - $A2` # offset to previous symbol
+  NEXT=+`expr $A3 - $A2` # offset to next symbol
+  OVERFLOW=+`printf "0x%x" ${PREV}` # overflow offset to previous symbol
+}
+
+# We have to decode symbol addresses to get correct offsets.
+# If the offset is not an instruction boundary, it cause -EILSEQ.
+set_offs `grep -A1 -B1 ${TARGET_FUNC} /proc/kallsyms | cut -f 1 -d " " | xargs`
+
+UINT_TEST=no
+# printf "%x" -1 returns (unsigned long)-1.
+if [ `printf "%x" -1 | wc -c` != 9 ]; then
+  UINT_TEST=yes
+fi
+
+echo 0 > events/enable
+echo > kprobe_events
+echo "p:testprobe ${TARGET_FUNC}" > kprobe_events
+echo "p:testprobe ${TARGET}" > kprobe_events
+echo "p:testprobe ${TARGET_FUNC}${NEXT}" > kprobe_events
+! echo "p:testprobe ${TARGET_FUNC}${PREV}" > kprobe_events
+if [ "${UINT_TEST}" = yes ]; then
+! echo "p:testprobe ${TARGET_FUNC}${OVERFLOW}" > kprobe_events
+fi
+echo > kprobe_events
+clear_trace

From e37f0aeb7dec766f311b058b7976af128c07a507 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Linus=20L=C3=BCssing?= <linus.luessing@c0d3.blue>
Date: Tue, 20 Mar 2018 03:13:27 +0100
Subject: [PATCH 0348/1852] batman-adv: fix multicast-via-unicast transmission
 with AP isolation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit f8fb3419ead44f9a3136995acd24e35da4525177 ]

For multicast frames AP isolation is only supposed to be checked on
the receiving nodes and never on the originating one.

Furthermore, the isolation or wifi flag bits should only be intepreted
as such for unicast and never multicast TT entries.

By injecting flags to the multicast TT entry claimed by a single
target node it was verified in tests that this multicast address
becomes unreachable, leading to packet loss.

Omitting the "src" parameter to the batadv_transtable_search() call
successfully skipped the AP isolation check and made the target
reachable again.

Fixes: 1d8ab8d3c176 ("batman-adv: Modified forwarding behaviour for multicast packets")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/batman-adv/multicast.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/batman-adv/multicast.c b/net/batman-adv/multicast.c
index eb76386f8d4b5..8aa2d65df86f3 100644
--- a/net/batman-adv/multicast.c
+++ b/net/batman-adv/multicast.c
@@ -428,8 +428,8 @@ static struct batadv_orig_node *
 batadv_mcast_forw_tt_node_get(struct batadv_priv *bat_priv,
 			      struct ethhdr *ethhdr)
 {
-	return batadv_transtable_search(bat_priv, ethhdr->h_source,
-					ethhdr->h_dest, BATADV_NO_FLAGS);
+	return batadv_transtable_search(bat_priv, NULL, ethhdr->h_dest,
+					BATADV_NO_FLAGS);
 }
 
 /**

From 4a2efde8df4b6a2b67c8ef2c017c4b5701711a3e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Linus=20L=C3=BCssing?= <linus.luessing@c0d3.blue>
Date: Thu, 22 Mar 2018 00:21:32 +0100
Subject: [PATCH 0349/1852] batman-adv: fix packet loss for broadcasted DHCP
 packets to a server
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit a752c0a4524889cdc0765925258fd1fd72344100 ]

DHCP connectivity issues can currently occur if the following conditions
are met:

1) A DHCP packet from a client to a server
2) This packet has a multicast destination
3) This destination has a matching entry in the translation table
   (FF:FF:FF:FF:FF:FF for IPv4, 33:33:00:01:00:02/33:33:00:01:00:03
    for IPv6)
4) The orig-node determined by TT for the multicast destination
   does not match the orig-node determined by best-gateway-selection

In this case the DHCP packet will be dropped.

The "gateway-out-of-range" check is supposed to only be applied to
unicasted DHCP packets to a specific DHCP server.

In that case dropping the the unicasted frame forces the client to
retry via a broadcasted one, but now directed to the new best
gateway.

A DHCP packet with broadcast/multicast destination is already ensured to
always be delivered to the best gateway. Dropping a multicasted
DHCP packet here will only prevent completing DHCP as there is no
other fallback.

So far, it seems the unicast check was implicitly performed by
expecting the batadv_transtable_search() to return NULL for multicast
destinations. However, a multicast address could have always ended up in
the translation table and in fact is now common.

To fix this potential loss of a DHCP client-to-server packet to a
multicast address this patch adds an explicit multicast destination
check to reliably bail out of the gateway-out-of-range check for such
destinations.

The issue and fix were tested in the following three node setup:

- Line topology, A-B-C
- A: gateway client, DHCP client
- B: gateway server, hop-penalty increased: 30->60, DHCP server
- C: gateway server, code modifications to announce FF:FF:FF:FF:FF:FF

Without this patch, A would never transmit its DHCP Discover packet
due to an always "out-of-range" condition. With this patch,
a full DHCP handshake between A and B was possible again.

Fixes: be7af5cf9cae ("batman-adv: refactoring gateway handling code")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/batman-adv/gateway_client.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/batman-adv/gateway_client.c b/net/batman-adv/gateway_client.c
index e6c8382c79ba8..6abfba1e227f9 100644
--- a/net/batman-adv/gateway_client.c
+++ b/net/batman-adv/gateway_client.c
@@ -798,6 +798,9 @@ bool batadv_gw_out_of_range(struct batadv_priv *bat_priv,
 
 	vid = batadv_get_vid(skb, 0);
 
+	if (is_multicast_ether_addr(ethhdr->h_dest))
+		goto out;
+
 	orig_dst_node = batadv_transtable_search(bat_priv, ethhdr->h_source,
 						 ethhdr->h_dest, vid);
 	if (!orig_dst_node)

From 51784fabf446f29297ae6c41b6f327d88e62564a Mon Sep 17 00:00:00 2001
From: Jinbum Park <jinb.park7@gmail.com>
Date: Tue, 6 Mar 2018 01:37:21 +0100
Subject: [PATCH 0350/1852] ARM: 8748/1: mm: Define vdso_start, vdso_end as
 array

[ Upstream commit 73b9160d0dfe44dfdaffd6465dc1224c38a4a73c ]

Define vdso_start, vdso_end as array to avoid compile-time analysis error
for the case of built with CONFIG_FORTIFY_SOURCE.

and, since vdso_start, vdso_end are used in vdso.c only,
move extern-declaration from vdso.h to vdso.c.

If kernel is built with CONFIG_FORTIFY_SOURCE,
compile-time error happens at this code.
- if (memcmp(&vdso_start, "177ELF", 4))

The size of "&vdso_start" is recognized as 1 byte, but n is 4,
So that compile-time error is reported.

Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Jinbum Park <jinb.park7@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/include/asm/vdso.h |  2 --
 arch/arm/kernel/vdso.c      | 12 +++++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/vdso.h b/arch/arm/include/asm/vdso.h
index d0295f1dd1a38..ff65b6d96c7ef 100644
--- a/arch/arm/include/asm/vdso.h
+++ b/arch/arm/include/asm/vdso.h
@@ -11,8 +11,6 @@ struct mm_struct;
 
 void arm_install_vdso(struct mm_struct *mm, unsigned long addr);
 
-extern char vdso_start, vdso_end;
-
 extern unsigned int vdso_total_pages;
 
 #else /* CONFIG_VDSO */
diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c
index bbbffe9461221..6f7772feababf 100644
--- a/arch/arm/kernel/vdso.c
+++ b/arch/arm/kernel/vdso.c
@@ -39,6 +39,8 @@
 
 static struct page **vdso_text_pagelist;
 
+extern char vdso_start[], vdso_end[];
+
 /* Total number of pages needed for the data and text portions of the VDSO. */
 unsigned int vdso_total_pages __ro_after_init;
 
@@ -179,13 +181,13 @@ static int __init vdso_init(void)
 	unsigned int text_pages;
 	int i;
 
-	if (memcmp(&vdso_start, "\177ELF", 4)) {
+	if (memcmp(vdso_start, "\177ELF", 4)) {
 		pr_err("VDSO is not a valid ELF object!\n");
 		return -ENOEXEC;
 	}
 
-	text_pages = (&vdso_end - &vdso_start) >> PAGE_SHIFT;
-	pr_debug("vdso: %i text pages at base %p\n", text_pages, &vdso_start);
+	text_pages = (vdso_end - vdso_start) >> PAGE_SHIFT;
+	pr_debug("vdso: %i text pages at base %p\n", text_pages, vdso_start);
 
 	/* Allocate the VDSO text pagelist */
 	vdso_text_pagelist = kcalloc(text_pages, sizeof(struct page *),
@@ -200,7 +202,7 @@ static int __init vdso_init(void)
 	for (i = 0; i < text_pages; i++) {
 		struct page *page;
 
-		page = virt_to_page(&vdso_start + i * PAGE_SIZE);
+		page = virt_to_page(vdso_start + i * PAGE_SIZE);
 		vdso_text_pagelist[i] = page;
 	}
 
@@ -211,7 +213,7 @@ static int __init vdso_init(void)
 
 	cntvct_ok = cntvct_functional();
 
-	patch_vdso(&vdso_start);
+	patch_vdso(vdso_start);
 
 	return 0;
 }

From 838e35fc785e7cc4f6d9d06c73021f3ffa8b31f0 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sat, 24 Mar 2018 22:08:14 +0100
Subject: [PATCH 0351/1852] net: qmi_wwan: add BroadMobi BM806U 2020:2033

[ Upstream commit 743989254ea9f132517806d8893ca9b6cf9dc86b ]

BroadMobi BM806U is an Qualcomm MDM9225 based 3G/4G modem.
Tested hardware BM806U is mounted on D-Link DWR-921-C3 router.
The USB id is added to qmi_wwan.c to allow QMI communication with
the BM806U.

Tested on 4.14 kernel and OpenWRT.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/qmi_wwan.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 8aaa09b3c7533..3c241c1ae94f9 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -713,6 +713,7 @@ static const struct usb_device_id products[] = {
 	{QMI_FIXED_INTF(0x19d2, 0x2002, 4)},	/* ZTE (Vodafone) K3765-Z */
 	{QMI_FIXED_INTF(0x2001, 0x7e19, 4)},	/* D-Link DWM-221 B1 */
 	{QMI_FIXED_INTF(0x2001, 0x7e35, 4)},	/* D-Link DWM-222 */
+	{QMI_FIXED_INTF(0x2020, 0x2033, 4)},	/* BroadMobi BM806U */
 	{QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)},    /* Sierra Wireless MC7700 */
 	{QMI_FIXED_INTF(0x114f, 0x68a2, 8)},    /* Sierra Wireless MC7750 */
 	{QMI_FIXED_INTF(0x1199, 0x68a2, 8)},	/* Sierra Wireless MC7710 in QMI mode */

From 07ef5e269306841200b6a5074116647046decf70 Mon Sep 17 00:00:00 2001
From: Torsten Hilbrich <torsten.hilbrich@secunet.com>
Date: Mon, 26 Mar 2018 07:19:57 +0200
Subject: [PATCH 0352/1852] net/usb/qmi_wwan.c: Add USB id for lt4120 modem

[ Upstream commit f3d801baf118c9d452ee7c278df16880c892e669 ]

This is needed to support the modem found in HP EliteBook 820 G3.

Signed-off-by: Torsten Hilbrich <torsten.hilbrich@secunet.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/qmi_wwan.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 3c241c1ae94f9..6861363825127 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -763,6 +763,7 @@ static const struct usb_device_id products[] = {
 	{QMI_FIXED_INTF(0x413c, 0x81a9, 8)},	/* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card */
 	{QMI_FIXED_INTF(0x413c, 0x81b1, 8)},	/* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card */
 	{QMI_FIXED_INTF(0x03f0, 0x4e1d, 8)},	/* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */
+	{QMI_FIXED_INTF(0x03f0, 0x9d1d, 1)},	/* HP lt4120 Snapdragon X5 LTE */
 	{QMI_FIXED_INTF(0x22de, 0x9061, 3)},	/* WeTelecom WPD-600N */
 	{QMI_FIXED_INTF(0x1e0e, 0x9001, 5)},	/* SIMCom 7230E */
 

From feb54cb99cba8735cea19057d5095abe7f96bb68 Mon Sep 17 00:00:00 2001
From: Giuseppe Lippolis <giu.lippolis@gmail.com>
Date: Mon, 26 Mar 2018 16:34:39 +0200
Subject: [PATCH 0353/1852] net-usb: add qmi_wwan if on lte modem wistron neweb
 d18q1

[ Upstream commit d4c4bc11353f3bea6754f7d21e3612c9f32d1d64 ]

This modem is embedded on dlink dwr-921 router.
    The oem configuration states:

    T:  Bus=02 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=480 MxCh= 0
    D:  Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs=  1
    P:  Vendor=1435 ProdID=0918 Rev= 2.32
    S:  Manufacturer=Android
    S:  Product=Android
    S:  SerialNumber=0123456789ABCDEF
    C:* #Ifs= 7 Cfg#= 1 Atr=80 MxPwr=500mA
    I:* If#= 0 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=option
    E:  Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=42 Prot=01 Driver=(none)
    E:  Ad=82(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
    E:  Ad=84(I) Atr=03(Int.) MxPS=  64 Ivl=32ms
    E:  Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan
    E:  Ad=86(I) Atr=03(Int.) MxPS=  64 Ivl=32ms
    E:  Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 4 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan
    E:  Ad=88(I) Atr=03(Int.) MxPS=  64 Ivl=32ms
    E:  Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 5 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan
    E:  Ad=8a(I) Atr=03(Int.) MxPS=  64 Ivl=32ms
    E:  Ad=89(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=06(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    I:* If#= 6 Alt= 0 #EPs= 2 Cls=08(stor.) Sub=06 Prot=50 Driver=(none)
    E:  Ad=8b(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
    E:  Ad=07(O) Atr=02(Bulk) MxPS= 512 Ivl=125us

Tested on openwrt distribution

Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/qmi_wwan.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 6861363825127..d72205f06a1de 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -637,6 +637,9 @@ static const struct usb_device_id products[] = {
 	{QMI_FIXED_INTF(0x0846, 0x68a2, 8)},
 	{QMI_FIXED_INTF(0x12d1, 0x140c, 1)},	/* Huawei E173 */
 	{QMI_FIXED_INTF(0x12d1, 0x14ac, 1)},	/* Huawei E1820 */
+	{QMI_FIXED_INTF(0x1435, 0xd181, 3)},	/* Wistron NeWeb D18Q1 */
+	{QMI_FIXED_INTF(0x1435, 0xd181, 4)},	/* Wistron NeWeb D18Q1 */
+	{QMI_FIXED_INTF(0x1435, 0xd181, 5)},	/* Wistron NeWeb D18Q1 */
 	{QMI_FIXED_INTF(0x16d8, 0x6003, 0)},	/* CMOTech 6003 */
 	{QMI_FIXED_INTF(0x16d8, 0x6007, 0)},	/* CMOTech CHE-628S */
 	{QMI_FIXED_INTF(0x16d8, 0x6008, 0)},	/* CMOTech CMU-301 */

From 9bd0de29584f649fd5ad2cecad5dbf84694efa49 Mon Sep 17 00:00:00 2001
From: Cong Wang <xiyou.wangcong@gmail.com>
Date: Mon, 26 Mar 2018 15:08:33 -0700
Subject: [PATCH 0354/1852] llc: properly handle dev_queue_xmit() return value

[ Upstream commit b85ab56c3f81c5a24b5a5213374f549df06430da ]

llc_conn_send_pdu() pushes the skb into write queue and
calls llc_conn_send_pdus() to flush them out. However, the
status of dev_queue_xmit() is not returned to caller,
in this case, llc_conn_state_process().

llc_conn_state_process() needs hold the skb no matter
success or failure, because it still uses it after that,
therefore we should hold skb before dev_queue_xmit() when
that skb is the one being processed by llc_conn_state_process().

For other callers, they can just pass NULL and ignore
the return value as they are.

Reported-by: Noam Rathaus <noamr@beyondsecurity.com>
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/llc_conn.h |  2 +-
 net/llc/llc_c_ac.c     | 15 +++++++++------
 net/llc/llc_conn.c     | 32 +++++++++++++++++++++++---------
 3 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/include/net/llc_conn.h b/include/net/llc_conn.h
index ea985aa7a6c5e..df528a6235487 100644
--- a/include/net/llc_conn.h
+++ b/include/net/llc_conn.h
@@ -104,7 +104,7 @@ void llc_sk_reset(struct sock *sk);
 
 /* Access to a connection */
 int llc_conn_state_process(struct sock *sk, struct sk_buff *skb);
-void llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb);
+int llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb);
 void llc_conn_rtn_pdu(struct sock *sk, struct sk_buff *skb);
 void llc_conn_resend_i_pdu_as_cmd(struct sock *sk, u8 nr, u8 first_p_bit);
 void llc_conn_resend_i_pdu_as_rsp(struct sock *sk, u8 nr, u8 first_f_bit);
diff --git a/net/llc/llc_c_ac.c b/net/llc/llc_c_ac.c
index f8d4ab8ca1a5f..4b60f68cb4925 100644
--- a/net/llc/llc_c_ac.c
+++ b/net/llc/llc_c_ac.c
@@ -389,7 +389,7 @@ static int llc_conn_ac_send_i_cmd_p_set_0(struct sock *sk, struct sk_buff *skb)
 	llc_pdu_init_as_i_cmd(skb, 0, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
-		llc_conn_send_pdu(sk, skb);
+		rc = llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	return rc;
@@ -916,7 +916,7 @@ static int llc_conn_ac_send_i_rsp_f_set_ackpf(struct sock *sk,
 	llc_pdu_init_as_i_cmd(skb, llc->ack_pf, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
-		llc_conn_send_pdu(sk, skb);
+		rc = llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	return rc;
@@ -935,14 +935,17 @@ static int llc_conn_ac_send_i_rsp_f_set_ackpf(struct sock *sk,
 int llc_conn_ac_send_i_as_ack(struct sock *sk, struct sk_buff *skb)
 {
 	struct llc_sock *llc = llc_sk(sk);
+	int ret;
 
 	if (llc->ack_must_be_send) {
-		llc_conn_ac_send_i_rsp_f_set_ackpf(sk, skb);
+		ret = llc_conn_ac_send_i_rsp_f_set_ackpf(sk, skb);
 		llc->ack_must_be_send = 0 ;
 		llc->ack_pf = 0;
-	} else
-		llc_conn_ac_send_i_cmd_p_set_0(sk, skb);
-	return 0;
+	} else {
+		ret = llc_conn_ac_send_i_cmd_p_set_0(sk, skb);
+	}
+
+	return ret;
 }
 
 /**
diff --git a/net/llc/llc_conn.c b/net/llc/llc_conn.c
index d861b74ad068c..79c346fd859b2 100644
--- a/net/llc/llc_conn.c
+++ b/net/llc/llc_conn.c
@@ -30,7 +30,7 @@
 #endif
 
 static int llc_find_offset(int state, int ev_type);
-static void llc_conn_send_pdus(struct sock *sk);
+static int llc_conn_send_pdus(struct sock *sk, struct sk_buff *skb);
 static int llc_conn_service(struct sock *sk, struct sk_buff *skb);
 static int llc_exec_conn_trans_actions(struct sock *sk,
 				       struct llc_conn_state_trans *trans,
@@ -193,11 +193,11 @@ int llc_conn_state_process(struct sock *sk, struct sk_buff *skb)
 	return rc;
 }
 
-void llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb)
+int llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb)
 {
 	/* queue PDU to send to MAC layer */
 	skb_queue_tail(&sk->sk_write_queue, skb);
-	llc_conn_send_pdus(sk);
+	return llc_conn_send_pdus(sk, skb);
 }
 
 /**
@@ -255,7 +255,7 @@ void llc_conn_resend_i_pdu_as_cmd(struct sock *sk, u8 nr, u8 first_p_bit)
 	if (howmany_resend > 0)
 		llc->vS = (llc->vS + 1) % LLC_2_SEQ_NBR_MODULO;
 	/* any PDUs to re-send are queued up; start sending to MAC */
-	llc_conn_send_pdus(sk);
+	llc_conn_send_pdus(sk, NULL);
 out:;
 }
 
@@ -296,7 +296,7 @@ void llc_conn_resend_i_pdu_as_rsp(struct sock *sk, u8 nr, u8 first_f_bit)
 	if (howmany_resend > 0)
 		llc->vS = (llc->vS + 1) % LLC_2_SEQ_NBR_MODULO;
 	/* any PDUs to re-send are queued up; start sending to MAC */
-	llc_conn_send_pdus(sk);
+	llc_conn_send_pdus(sk, NULL);
 out:;
 }
 
@@ -340,12 +340,16 @@ int llc_conn_remove_acked_pdus(struct sock *sk, u8 nr, u16 *how_many_unacked)
 /**
  *	llc_conn_send_pdus - Sends queued PDUs
  *	@sk: active connection
+ *	@hold_skb: the skb held by caller, or NULL if does not care
  *
- *	Sends queued pdus to MAC layer for transmission.
+ *	Sends queued pdus to MAC layer for transmission. When @hold_skb is
+ *	NULL, always return 0. Otherwise, return 0 if @hold_skb is sent
+ *	successfully, or 1 for failure.
  */
-static void llc_conn_send_pdus(struct sock *sk)
+static int llc_conn_send_pdus(struct sock *sk, struct sk_buff *hold_skb)
 {
 	struct sk_buff *skb;
+	int ret = 0;
 
 	while ((skb = skb_dequeue(&sk->sk_write_queue)) != NULL) {
 		struct llc_pdu_sn *pdu = llc_pdu_sn_hdr(skb);
@@ -357,10 +361,20 @@ static void llc_conn_send_pdus(struct sock *sk)
 			skb_queue_tail(&llc_sk(sk)->pdu_unack_q, skb);
 			if (!skb2)
 				break;
-			skb = skb2;
+			dev_queue_xmit(skb2);
+		} else {
+			bool is_target = skb == hold_skb;
+			int rc;
+
+			if (is_target)
+				skb_get(skb);
+			rc = dev_queue_xmit(skb);
+			if (is_target)
+				ret = rc;
 		}
-		dev_queue_xmit(skb);
 	}
+
+	return ret;
 }
 
 /**

From 6ab63e204ce904e807381697c2e285471e4ae945 Mon Sep 17 00:00:00 2001
From: Vinayak Menon <vinmenon@codeaurora.org>
Date: Wed, 28 Mar 2018 16:01:16 -0700
Subject: [PATCH 0355/1852] mm/kmemleak.c: wait for scan completion before
 disabling free

[ Upstream commit 914b6dfff790544d9b77dfd1723adb3745ec9700 ]

A crash is observed when kmemleak_scan accesses the object->pointer,
likely due to the following race.

  TASK A             TASK B                     TASK C
  kmemleak_write
   (with "scan" and
   NOT "scan=on")
  kmemleak_scan()
                     create_object
                     kmem_cache_alloc fails
                     kmemleak_disable
                     kmemleak_do_cleanup
                     kmemleak_free_enabled = 0
                                                kfree
                                                kmemleak_free bails out
                                                 (kmemleak_free_enabled is 0)
                                                slub frees object->pointer
  update_checksum
  crash - object->pointer
   freed (DEBUG_PAGEALLOC)

kmemleak_do_cleanup waits for the scan thread to complete, but not for
direct call to kmemleak_scan via kmemleak_write.  So add a wait for
kmemleak_scan completion before disabling kmemleak_free, and while at it
fix the comment on stop_scan_thread.

[vinmenon@codeaurora.org: fix stop_scan_thread comment]
  Link: http://lkml.kernel.org/r/1522219972-22809-1-git-send-email-vinmenon@codeaurora.org
Link: http://lkml.kernel.org/r/1522063429-18992-1-git-send-email-vinmenon@codeaurora.org
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/kmemleak.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/mm/kmemleak.c b/mm/kmemleak.c
index b0fe986a28564..6e59969377129 100644
--- a/mm/kmemleak.c
+++ b/mm/kmemleak.c
@@ -1523,8 +1523,7 @@ static void start_scan_thread(void)
 }
 
 /*
- * Stop the automatic memory scanning thread. This function must be called
- * with the scan_mutex held.
+ * Stop the automatic memory scanning thread.
  */
 static void stop_scan_thread(void)
 {
@@ -1787,12 +1786,15 @@ static void kmemleak_do_cleanup(struct work_struct *work)
 {
 	stop_scan_thread();
 
+	mutex_lock(&scan_mutex);
 	/*
-	 * Once the scan thread has stopped, it is safe to no longer track
-	 * object freeing. Ordering of the scan thread stopping and the memory
-	 * accesses below is guaranteed by the kthread_stop() function.
+	 * Once it is made sure that kmemleak_scan has stopped, it is safe to no
+	 * longer track object freeing. Ordering of the scan thread stopping and
+	 * the memory accesses below is guaranteed by the kthread_stop()
+	 * function.
 	 */
 	kmemleak_free_enabled = 0;
+	mutex_unlock(&scan_mutex);
 
 	if (!kmemleak_found_leaks)
 		__kmemleak_do_cleanup();

From 71bbeb79c59df4c74d0922ae244155bddb939c20 Mon Sep 17 00:00:00 2001
From: Toshiaki Makita <makita.toshiaki@lab.ntt.co.jp>
Date: Thu, 29 Mar 2018 19:05:29 +0900
Subject: [PATCH 0356/1852] net: Fix untag for vlan packets without ethernet
 header

[ Upstream commit ae4745730cf8e693d354ccd4dbaf59ea440c09a9 ]

In some situation vlan packets do not have ethernet headers. One example
is packets from tun devices. Users can specify vlan protocol in tun_pi
field instead of IP protocol, and skb_vlan_untag() attempts to untag such
packets.

skb_vlan_untag() (more precisely, skb_reorder_vlan_header() called by it)
however did not expect packets without ethernet headers, so in such a case
size argument for memmove() underflowed and triggered crash.

====
BUG: unable to handle kernel paging request at ffff8801cccb8000
IP: __memmove+0x24/0x1a0 arch/x86/lib/memmove_64.S:43
PGD 9cee067 P4D 9cee067 PUD 1d9401063 PMD 1cccb7063 PTE 2810100028101
Oops: 000b [#1] SMP KASAN
Dumping ftrace buffer:
   (ftrace buffer empty)
Modules linked in:
CPU: 1 PID: 17663 Comm: syz-executor2 Not tainted 4.16.0-rc7+ #368
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:__memmove+0x24/0x1a0 arch/x86/lib/memmove_64.S:43
RSP: 0018:ffff8801cc046e28 EFLAGS: 00010287
RAX: ffff8801ccc244c4 RBX: fffffffffffffffe RCX: fffffffffff6c4c2
RDX: fffffffffffffffe RSI: ffff8801cccb7ffc RDI: ffff8801cccb8000
RBP: ffff8801cc046e48 R08: ffff8801ccc244be R09: ffffed0039984899
R10: 0000000000000001 R11: ffffed0039984898 R12: ffff8801ccc244c4
R13: ffff8801ccc244c0 R14: ffff8801d96b7c06 R15: ffff8801d96b7b40
FS:  00007febd562d700(0000) GS:ffff8801db300000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: ffff8801cccb8000 CR3: 00000001ccb2f006 CR4: 00000000001606e0
DR0: 0000000020000000 DR1: 0000000020000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000600
Call Trace:
 memmove include/linux/string.h:360 [inline]
 skb_reorder_vlan_header net/core/skbuff.c:5031 [inline]
 skb_vlan_untag+0x470/0xc40 net/core/skbuff.c:5061
 __netif_receive_skb_core+0x119c/0x3460 net/core/dev.c:4460
 __netif_receive_skb+0x2c/0x1b0 net/core/dev.c:4627
 netif_receive_skb_internal+0x10b/0x670 net/core/dev.c:4701
 netif_receive_skb+0xae/0x390 net/core/dev.c:4725
 tun_rx_batched.isra.50+0x5ee/0x870 drivers/net/tun.c:1555
 tun_get_user+0x299e/0x3c20 drivers/net/tun.c:1962
 tun_chr_write_iter+0xb9/0x160 drivers/net/tun.c:1990
 call_write_iter include/linux/fs.h:1782 [inline]
 new_sync_write fs/read_write.c:469 [inline]
 __vfs_write+0x684/0x970 fs/read_write.c:482
 vfs_write+0x189/0x510 fs/read_write.c:544
 SYSC_write fs/read_write.c:589 [inline]
 SyS_write+0xef/0x220 fs/read_write.c:581
 do_syscall_64+0x281/0x940 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x42/0xb7
RIP: 0033:0x454879
RSP: 002b:00007febd562cc68 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
RAX: ffffffffffffffda RBX: 00007febd562d6d4 RCX: 0000000000454879
RDX: 0000000000000157 RSI: 0000000020000180 RDI: 0000000000000014
RBP: 000000000072bea0 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000246 R12: 00000000ffffffff
R13: 00000000000006b0 R14: 00000000006fc120 R15: 0000000000000000
Code: 90 90 90 90 90 90 90 48 89 f8 48 83 fa 20 0f 82 03 01 00 00 48 39 fe 7d 0f 49 89 f0 49 01 d0 49 39 f8 0f 8f 9f 00 00 00 48 89 d1 <f3> a4 c3 48 81 fa a8 02 00 00 72 05 40 38 fe 74 3b 48 83 ea 20
RIP: __memmove+0x24/0x1a0 arch/x86/lib/memmove_64.S:43 RSP: ffff8801cc046e28
CR2: ffff8801cccb8000
====

We don't need to copy headers for packets which do not have preceding
headers of vlan headers, so skip memmove() in that case.

Fixes: 4bbb3e0e8239 ("net: Fix vlan untag for bridge and vlan_dev with reorder_hdr off")
Reported-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Toshiaki Makita <makita.toshiaki@lab.ntt.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/skbuff.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 31b9aaca3730b..fa02c680eebc0 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -4303,8 +4303,10 @@ static struct sk_buff *skb_reorder_vlan_header(struct sk_buff *skb)
 	}
 
 	mac_len = skb->data - skb_mac_header(skb);
-	memmove(skb_mac_header(skb) + VLAN_HLEN, skb_mac_header(skb),
-		mac_len - VLAN_HLEN - ETH_TLEN);
+	if (likely(mac_len > VLAN_HLEN + ETH_TLEN)) {
+		memmove(skb_mac_header(skb) + VLAN_HLEN, skb_mac_header(skb),
+			mac_len - VLAN_HLEN - ETH_TLEN);
+	}
 	skb->mac_header += VLAN_HLEN;
 	return skb;
 }

From 1cbb90d6dad97cfd47f2c8b4a42b4c9c2379a83a Mon Sep 17 00:00:00 2001
From: Yelena Krivosheev <yelena@marvell.com>
Date: Fri, 30 Mar 2018 12:05:31 +0200
Subject: [PATCH 0357/1852] net: mvneta: fix enable of all initialized RXQs

[ Upstream commit e81b5e01c14add8395dfba7130f8829206bb507d ]

In mvneta_port_up() we enable relevant RX and TX port queues by write
queues bit map to an appropriate register.

q_map must be ZERO in the beginning of this process.

Signed-off-by: Yelena Krivosheev <yelena@marvell.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/marvell/mvneta.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 7430dd44019e5..ea693bbf56d84 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -818,6 +818,7 @@ static void mvneta_port_up(struct mvneta_port *pp)
 	}
 	mvreg_write(pp, MVNETA_TXQ_CMD, q_map);
 
+	q_map = 0;
 	/* Enable all initialized RXQs. */
 	mvreg_write(pp, MVNETA_RXQ_CMD, BIT(rxq_def));
 }

From f725145c875ade4a08be9798378e1eb12a2d5692 Mon Sep 17 00:00:00 2001
From: Rich Felker <dalias@libc.org>
Date: Thu, 15 Mar 2018 20:01:36 -0400
Subject: [PATCH 0358/1852] sh: fix debug trap failure to process signals
 before return to user

[ Upstream commit 96a598996f6ac518ac79839ecbb17c91af91f4f7 ]

When responding to a debug trap (breakpoint) in userspace, the
kernel's trap handler raised SIGTRAP but returned from the trap via a
code path that ignored pending signals, resulting in an infinite loop
re-executing the trapping instruction.

Signed-off-by: Rich Felker <dalias@libc.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/sh/kernel/entry-common.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 13047a4facd2e..5a9017ba26aba 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -255,7 +255,7 @@ debug_trap:
 	mov.l	@r8, r8
 	jsr	@r8
 	 nop
-	bra	__restore_all
+	bra	ret_from_exception
 	 nop
 	CFI_ENDPROC
 

From b9c9ea074fc365b597495753cf42176095bf38e6 Mon Sep 17 00:00:00 2001
From: Joerg Roedel <joro@8bytes.org>
Date: Wed, 11 Apr 2018 17:24:38 +0200
Subject: [PATCH 0359/1852] x86/pgtable: Don't set huge PUD/PMD on non-leaf
 entries

[ Upstream commit e3e288121408c3abeed5af60b87b95c847143845 ]

The pmd_set_huge() and pud_set_huge() functions are used from
the generic ioremap() code to establish large mappings where this
is possible.

But the generic ioremap() code does not check whether the
PMD/PUD entries are already populated with a non-leaf entry,
so that any page-table pages these entries point to will be
lost.

Further, on x86-32 with SHARED_KERNEL_PMD=0, this causes a
BUG_ON() in vmalloc_sync_one() when PMD entries are synced
from swapper_pg_dir to the current page-table. This happens
because the PMD entry from swapper_pg_dir was promoted to a
huge-page entry while the current PGD still contains the
non-leaf entry. Because both entries are present and point
to a different page, the BUG_ON() triggers.

This was actually triggered with pti-x32 enabled in a KVM
virtual machine by the graphics driver.

A real and better fix for that would be to improve the
page-table handling in the generic ioremap() code. But that is
out-of-scope for this patch-set and left for later work.

Reported-by: David H. Gutteridge <dhgutteridge@sympatico.ca>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Eduardo Valentin <eduval@amazon.com>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Waiman Long <llong@redhat.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: aliguori@amazon.com
Cc: daniel.gruss@iaik.tugraz.at
Cc: hughd@google.com
Cc: keescook@google.com
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20180411152437.GC15462@8bytes.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/pgtable.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index c013326a0d7ac..08e94b6139ab6 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -1,5 +1,6 @@
 #include <linux/mm.h>
 #include <linux/gfp.h>
+#include <linux/hugetlb.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/tlb.h>
@@ -600,6 +601,10 @@ int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
 	    (mtrr != MTRR_TYPE_WRBACK))
 		return 0;
 
+	/* Bail out if we are we on a populated non-leaf entry: */
+	if (pud_present(*pud) && !pud_huge(*pud))
+		return 0;
+
 	prot = pgprot_4k_2_large(prot);
 
 	set_pte((pte_t *)pud, pfn_pte(
@@ -628,6 +633,10 @@ int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
 		return 0;
 	}
 
+	/* Bail out if we are we on a populated non-leaf entry: */
+	if (pmd_present(*pmd) && !pmd_huge(*pmd))
+		return 0;
+
 	prot = pgprot_4k_2_large(prot);
 
 	set_pte((pte_t *)pmd, pfn_pte(

From c5a14a0c2046a8da995ad0722a22474ace64c6ba Mon Sep 17 00:00:00 2001
From: Danilo Krummrich <danilokrummrich@dk-develop.de>
Date: Tue, 10 Apr 2018 16:31:38 -0700
Subject: [PATCH 0360/1852] fs/proc/proc_sysctl.c: fix potential page fault
 while unregistering sysctl table

[ Upstream commit a0b0d1c345d0317efe594df268feb5ccc99f651e ]

proc_sys_link_fill_cache() does not take currently unregistering sysctl
tables into account, which might result into a page fault in
sysctl_follow_link() - add a check to fix it.

This bug has been present since v3.4.

Link: http://lkml.kernel.org/r/20180228013506.4915-1-danilokrummrich@dk-develop.de
Fixes: 0e47c99d7fe25 ("sysctl: Replace root_list with links between sysctl_table_sets")
Signed-off-by: Danilo Krummrich <danilokrummrich@dk-develop.de>
Acked-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: "Luis R . Rodriguez" <mcgrof@kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/proc_sysctl.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c
index 4dbe1e2daeca6..5e1054f028afd 100644
--- a/fs/proc/proc_sysctl.c
+++ b/fs/proc/proc_sysctl.c
@@ -654,7 +654,10 @@ static bool proc_sys_link_fill_cache(struct file *file,
 				    struct ctl_table *table)
 {
 	bool ret = true;
+
 	head = sysctl_head_grab(head);
+	if (IS_ERR(head))
+		return false;
 
 	if (S_ISLNK(table->mode)) {
 		/* It is not an error if we can not follow the link ignore it */

From aedd1217d7d2473fa46166fa18eb00f58a807635 Mon Sep 17 00:00:00 2001
From: Tom Abraham <tabraham@suse.com>
Date: Tue, 10 Apr 2018 16:29:48 -0700
Subject: [PATCH 0361/1852] swap: divide-by-zero when zero length swap file on
 ssd

[ Upstream commit a06ad633a37c64a0cd4c229fc605cee8725d376e ]

Calling swapon() on a zero length swap file on SSD can lead to a
divide-by-zero.

Although creating such files isn't possible with mkswap and they woud be
considered invalid, it would be better for the swapon code to be more
robust and handle this condition gracefully (return -EINVAL).
Especially since the fix is small and straightforward.

To help with wear leveling on SSD, the swapon syscall calculates a
random position in the swap file using modulo p->highest_bit, which is
set to maxpages - 1 in read_swap_header.

If the swap file is zero length, read_swap_header sets maxpages=1 and
last_page=0, resulting in p->highest_bit=0 and we divide-by-zero when we
modulo p->highest_bit in swapon syscall.

This can be prevented by having read_swap_header return zero if
last_page is zero.

Link: http://lkml.kernel.org/r/5AC747C1020000A7001FA82C@prv-mh.provo.novell.com
Signed-off-by: Thomas Abraham <tabraham@suse.com>
Reported-by: <Mark.Landis@Teradata.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/swapfile.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/mm/swapfile.c b/mm/swapfile.c
index 65e07eb6558b2..80ba8711cd61e 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -2258,6 +2258,10 @@ static unsigned long read_swap_header(struct swap_info_struct *p,
 	maxpages = swp_offset(pte_to_swp_entry(
 			swp_entry_to_pte(swp_entry(0, ~0UL)))) + 1;
 	last_page = swap_header->info.last_page;
+	if (!last_page) {
+		pr_warn("Empty swap-file\n");
+		return 0;
+	}
 	if (last_page > maxpages) {
 		pr_warn("Truncating oversized swap area, only using %luk out of %luk\n",
 			maxpages << (PAGE_SHIFT - 10),

From cc84bbd2f3ca65738cf10748e3c0c19643143d05 Mon Sep 17 00:00:00 2001
From: Jens Axboe <axboe@kernel.dk>
Date: Wed, 11 Apr 2018 11:26:09 -0600
Subject: [PATCH 0362/1852] sr: get/drop reference to device in revalidate and
 check_events

[ Upstream commit 2d097c50212e137e7b53ffe3b37561153eeba87d ]

We can't just use scsi_cd() to get the scsi_cd structure, we have
to grab a live reference to the device. For both callbacks, we're
not inside an open where we already hold a reference to the device.

This fixes device removal/addition under concurrent device access,
which otherwise could result in the below oops.

NULL pointer dereference at 0000000000000010
PGD 0 P4D 0
Oops: 0000 [#1] PREEMPT SMP
Modules linked in:
sr 12:0:0:0: [sr2] scsi-1 drive
 scsi_debug crc_t10dif crct10dif_generic crct10dif_common nvme nvme_core sb_edac xl
sr 12:0:0:0: Attached scsi CD-ROM sr2
 sr_mod cdrom btrfs xor zstd_decompress zstd_compress xxhash lzo_compress zlib_defc
sr 12:0:0:0: Attached scsi generic sg7 type 5
 igb ahci libahci i2c_algo_bit libata dca [last unloaded: crc_t10dif]
CPU: 43 PID: 4629 Comm: systemd-udevd Not tainted 4.16.0+ #650
Hardware name: Dell Inc. PowerEdge T630/0NT78X, BIOS 2.3.4 11/09/2016
RIP: 0010:sr_block_revalidate_disk+0x23/0x190 [sr_mod]
RSP: 0018:ffff883ff357bb58 EFLAGS: 00010292
RAX: ffffffffa00b07d0 RBX: ffff883ff3058000 RCX: ffff883ff357bb66
RDX: 0000000000000003 RSI: 0000000000007530 RDI: ffff881fea631000
RBP: 0000000000000000 R08: ffff881fe4d38400 R09: 0000000000000000
R10: 0000000000000000 R11: 00000000000001b6 R12: 000000000800005d
R13: 000000000800005d R14: ffff883ffd9b3790 R15: 0000000000000000
FS:  00007f7dc8e6d8c0(0000) GS:ffff883fff340000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000000000000010 CR3: 0000003ffda98005 CR4: 00000000003606e0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
 ? __invalidate_device+0x48/0x60
 check_disk_change+0x4c/0x60
 sr_block_open+0x16/0xd0 [sr_mod]
 __blkdev_get+0xb9/0x450
 ? iget5_locked+0x1c0/0x1e0
 blkdev_get+0x11e/0x320
 ? bdget+0x11d/0x150
 ? _raw_spin_unlock+0xa/0x20
 ? bd_acquire+0xc0/0xc0
 do_dentry_open+0x1b0/0x320
 ? inode_permission+0x24/0xc0
 path_openat+0x4e6/0x1420
 ? cpumask_any_but+0x1f/0x40
 ? flush_tlb_mm_range+0xa0/0x120
 do_filp_open+0x8c/0xf0
 ? __seccomp_filter+0x28/0x230
 ? _raw_spin_unlock+0xa/0x20
 ? __handle_mm_fault+0x7d6/0x9b0
 ? list_lru_add+0xa8/0xc0
 ? _raw_spin_unlock+0xa/0x20
 ? __alloc_fd+0xaf/0x160
 ? do_sys_open+0x1a6/0x230
 do_sys_open+0x1a6/0x230
 do_syscall_64+0x5a/0x100
 entry_SYSCALL_64_after_hwframe+0x3d/0xa2

Reviewed-by: Lee Duncan <lduncan@suse.com>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sr.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/scsi/sr.c b/drivers/scsi/sr.c
index 804586aeaffe9..52778a7fed61b 100644
--- a/drivers/scsi/sr.c
+++ b/drivers/scsi/sr.c
@@ -582,18 +582,28 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd,
 static unsigned int sr_block_check_events(struct gendisk *disk,
 					  unsigned int clearing)
 {
-	struct scsi_cd *cd = scsi_cd(disk);
+	unsigned int ret = 0;
+	struct scsi_cd *cd;
 
-	if (atomic_read(&cd->device->disk_events_disable_depth))
+	cd = scsi_cd_get(disk);
+	if (!cd)
 		return 0;
 
-	return cdrom_check_events(&cd->cdi, clearing);
+	if (!atomic_read(&cd->device->disk_events_disable_depth))
+		ret = cdrom_check_events(&cd->cdi, clearing);
+
+	scsi_cd_put(cd);
+	return ret;
 }
 
 static int sr_block_revalidate_disk(struct gendisk *disk)
 {
-	struct scsi_cd *cd = scsi_cd(disk);
 	struct scsi_sense_hdr sshdr;
+	struct scsi_cd *cd;
+
+	cd = scsi_cd_get(disk);
+	if (!cd)
+		return -ENXIO;
 
 	/* if the unit is not ready, nothing more to do */
 	if (scsi_test_unit_ready(cd->device, SR_TIMEOUT, MAX_RETRIES, &sshdr))
@@ -602,6 +612,7 @@ static int sr_block_revalidate_disk(struct gendisk *disk)
 	sr_cd_check(&cd->cdi);
 	get_sectorsize(cd);
 out:
+	scsi_cd_put(cd);
 	return 0;
 }
 

From c31c34b35c95c2771d50ee36107ade41d639d233 Mon Sep 17 00:00:00 2001
From: Carlos Maiolino <cmaiolino@redhat.com>
Date: Tue, 10 Apr 2018 22:39:04 -0700
Subject: [PATCH 0363/1852] Force log to disk before reading the AGF during a
 fstrim

[ Upstream commit 8c81dd46ef3c416b3b95e3020fb90dbd44e6140b ]

Forcing the log to disk after reading the agf is wrong, we might be
calling xfs_log_force with XFS_LOG_SYNC with a metadata lock held.

This can cause a deadlock when racing a fstrim with a filesystem
shutdown.

The deadlock has been identified due a miscalculation bug in device-mapper
dm-thin, which returns lack of space to its users earlier than the device itself
really runs out of space, changing the device-mapper volume into an error state.

The problem happened while filling the filesystem with a single file,
triggering the bug in device-mapper, consequently causing an IO error
and shutting down the filesystem.

If such file is removed, and fstrim executed before the XFS finishes the
shut down process, the fstrim process will end up holding the buffer
lock, and going to sleep on the cil wait queue.

At this point, the shut down process will try to wake up all the threads
waiting on the cil wait queue, but for this, it will try to hold the
same buffer log already held my the fstrim, locking up the filesystem.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/xfs/xfs_discard.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/fs/xfs/xfs_discard.c b/fs/xfs/xfs_discard.c
index e85a9519a5aee..64ad05cb831af 100644
--- a/fs/xfs/xfs_discard.c
+++ b/fs/xfs/xfs_discard.c
@@ -50,19 +50,19 @@ xfs_trim_extents(
 
 	pag = xfs_perag_get(mp, agno);
 
-	error = xfs_alloc_read_agf(mp, NULL, agno, 0, &agbp);
-	if (error || !agbp)
-		goto out_put_perag;
-
-	cur = xfs_allocbt_init_cursor(mp, NULL, agbp, agno, XFS_BTNUM_CNT);
-
 	/*
 	 * Force out the log.  This means any transactions that might have freed
-	 * space before we took the AGF buffer lock are now on disk, and the
+	 * space before we take the AGF buffer lock are now on disk, and the
 	 * volatile disk cache is flushed.
 	 */
 	xfs_log_force(mp, XFS_LOG_SYNC);
 
+	error = xfs_alloc_read_agf(mp, NULL, agno, 0, &agbp);
+	if (error || !agbp)
+		goto out_put_perag;
+
+	cur = xfs_allocbt_init_cursor(mp, NULL, agbp, agno, XFS_BTNUM_CNT);
+
 	/*
 	 * Look up the longest btree in the AGF and start with it.
 	 */

From ea7abdb8216f08c794c52935ce5d6dfead2d5b1b Mon Sep 17 00:00:00 2001
From: Shunyong Yang <shunyong.yang@hxt-semitech.com>
Date: Fri, 6 Apr 2018 10:43:49 +0800
Subject: [PATCH 0364/1852] cpufreq: CPPC: Initialize shared perf capabilities
 of CPUs

[ Upstream commit 8913315e9459b146e5888ab5138e10daa061b885 ]

When multiple CPUs are related in one cpufreq policy, the first online
CPU will be chosen by default to handle cpufreq operations. Let's take
cpu0 and cpu1 as an example.

When cpu0 is offline, policy->cpu will be shifted to cpu1. cpu1's perf
capabilities should be initialized. Otherwise, perf capabilities are 0s
and speed change can not take effect.

This patch copies perf capabilities of the first online CPU to other
shared CPUs when policy shared type is CPUFREQ_SHARED_TYPE_ANY.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpufreq/cppc_cpufreq.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 7c0bdfb1a2ca4..0c797a4c22d34 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -100,9 +100,19 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
 	policy->cpuinfo.max_freq = policy->max;
 	policy->shared_type = cpu->shared_type;
 
-	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
+	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
+		int i;
+
 		cpumask_copy(policy->cpus, cpu->shared_cpu_map);
-	else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
+
+		for_each_cpu(i, policy->cpus) {
+			if (unlikely(i == policy->cpu))
+				continue;
+
+			memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
+			       sizeof(cpu->perf_caps));
+		}
+	} else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
 		/* Support only SW_ANY for now. */
 		pr_debug("Unsupported CPU co-ord type\n");
 		return -EFAULT;

From b260e91cc2dd1671975efbc461c71b7f7f63c249 Mon Sep 17 00:00:00 2001
From: Dave Carroll <david.carroll@microsemi.com>
Date: Tue, 3 Apr 2018 15:50:42 -0600
Subject: [PATCH 0365/1852] scsi: aacraid: Insure command thread is not
 recursively stopped

[ Upstream commit 1c6b41fb92936fa5facea464d5d7cbf855966d04 ]

If a recursive IOP_RESET is invoked, usually due to the eh_thread
handling errors after the first reset, be sure we flag that the command
thread has been stopped to avoid an Oops of the form;

 [ 336.620256] CPU: 28 PID: 1193 Comm: scsi_eh_0 Kdump: loaded Not tainted 4.14.0-49.el7a.ppc64le #1
 [ 336.620297] task: c000003fd630b800 task.stack: c000003fd61a4000
 [ 336.620326] NIP: c000000000176794 LR: c00000000013038c CTR: c00000000024bc10
 [ 336.620361] REGS: c000003fd61a7720 TRAP: 0300 Not tainted (4.14.0-49.el7a.ppc64le)
 [ 336.620395] MSR: 9000000000009033 <SF,HV,EE,ME,IR,DR,RI,LE> CR: 22084022 XER: 20040000
 [ 336.620435] CFAR: c000000000130388 DAR: 0000000000000000 DSISR: 40000000 SOFTE: 1
 [ 336.620435] GPR00: c00000000013038c c000003fd61a79a0 c0000000014c7e00 0000000000000000
 [ 336.620435] GPR04: 000000000000000c 000000000000000c 9000000000009033 0000000000000477
 [ 336.620435] GPR08: 0000000000000477 0000000000000000 0000000000000000 c008000010f7d940
 [ 336.620435] GPR12: c00000000024bc10 c000000007a33400 c0000000001708a8 c000003fe3b881d8
 [ 336.620435] GPR16: c000003fe3b88060 c000003fd61a7d10 fffffffffffff000 000000000000001e
 [ 336.620435] GPR20: 0000000000000001 c000000000ebf1a0 0000000000000001 c000003fe3b88000
 [ 336.620435] GPR24: 0000000000000003 0000000000000002 c000003fe3b88840 c000003fe3b887e8
 [ 336.620435] GPR28: c000003fe3b88000 c000003fc8181788 0000000000000000 c000003fc8181700
 [ 336.620750] NIP [c000000000176794] exit_creds+0x34/0x160
 [ 336.620775] LR [c00000000013038c] __put_task_struct+0x8c/0x1f0
 [ 336.620804] Call Trace:
 [ 336.620817] [c000003fd61a79a0] [c000003fe3b88000] 0xc000003fe3b88000 (unreliable)
 [ 336.620853] [c000003fd61a79d0] [c00000000013038c] __put_task_struct+0x8c/0x1f0
 [ 336.620889] [c000003fd61a7a00] [c000000000171418] kthread_stop+0x1e8/0x1f0
 [ 336.620922] [c000003fd61a7a40] [c008000010f7448c] aac_reset_adapter+0x14c/0x8d0 [aacraid]
 [ 336.620959] [c000003fd61a7b00] [c008000010f60174] aac_eh_host_reset+0x84/0x100 [aacraid]
 [ 336.621010] [c000003fd61a7b30] [c000000000864f24] scsi_try_host_reset+0x74/0x180
 [ 336.621046] [c000003fd61a7bb0] [c000000000867ac0] scsi_eh_ready_devs+0xc00/0x14d0
 [ 336.625165] [c000003fd61a7ca0] [c0000000008699e0] scsi_error_handler+0x550/0x730
 [ 336.632101] [c000003fd61a7dc0] [c000000000170a08] kthread+0x168/0x1b0
 [ 336.639031] [c000003fd61a7e30] [c00000000000b528] ret_from_kernel_thread+0x5c/0xb4
 [ 336.645971] Instruction dump:
 [ 336.648743] 384216a0 7c0802a6 fbe1fff8 f8010010 f821ffd1 7c7f1b78 60000000 60000000
 [ 336.657056] 39400000 e87f0838 f95f0838 7c0004ac <7d401828> 314affff 7d40192d 40c2fff4
 [ 336.663997] -[ end trace 4640cf8d4945ad95 ]-

So flag when the thread is stopped by setting the thread pointer to NULL.

Signed-off-by: Dave Carroll <david.carroll@microsemi.com>
Reviewed-by: Raghava Aditya Renukunta <raghavaaditya.renukunta@microsemi.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/aacraid/commsup.c | 4 +++-
 drivers/scsi/aacraid/linit.c   | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c
index 766a9176b4ada..cf531ad8b6eeb 100644
--- a/drivers/scsi/aacraid/commsup.c
+++ b/drivers/scsi/aacraid/commsup.c
@@ -1321,9 +1321,10 @@ static int _aac_reset_adapter(struct aac_dev *aac, int forced)
 	host = aac->scsi_host_ptr;
 	scsi_block_requests(host);
 	aac_adapter_disable_int(aac);
-	if (aac->thread->pid != current->pid) {
+	if (aac->thread && aac->thread->pid != current->pid) {
 		spin_unlock_irq(host->host_lock);
 		kthread_stop(aac->thread);
+		aac->thread = NULL;
 		jafo = 1;
 	}
 
@@ -1392,6 +1393,7 @@ static int _aac_reset_adapter(struct aac_dev *aac, int forced)
 					  aac->name);
 		if (IS_ERR(aac->thread)) {
 			retval = PTR_ERR(aac->thread);
+			aac->thread = NULL;
 			goto out;
 		}
 	}
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 807b9b2a53d2e..8da8b46da7221 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -1085,6 +1085,7 @@ static void __aac_shutdown(struct aac_dev * aac)
 				up(&fib->event_wait);
 		}
 		kthread_stop(aac->thread);
+		aac->thread = NULL;
 	}
 	aac_send_shutdown(aac);
 	aac_adapter_disable_int(aac);

From 248656c7dd830ba9dc68dc76fe793f00aacc7f91 Mon Sep 17 00:00:00 2001
From: Esben Haabendal <eha@deif.com>
Date: Sun, 8 Apr 2018 22:17:01 +0200
Subject: [PATCH 0366/1852] dp83640: Ensure against premature access to PHY
 registers after reset

[ Upstream commit 76327a35caabd1a932e83d6a42b967aa08584e5d ]

The datasheet specifies a 3uS pause after performing a software
reset. The default implementation of genphy_soft_reset() does not
provide this, so implement soft_reset with the needed pause.

Signed-off-by: Esben Haabendal <eha@deif.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/phy/dp83640.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index e83acc6086785..dc934347ae286 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c
@@ -1203,6 +1203,23 @@ static void dp83640_remove(struct phy_device *phydev)
 	kfree(dp83640);
 }
 
+static int dp83640_soft_reset(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = genphy_soft_reset(phydev);
+	if (ret < 0)
+		return ret;
+
+	/* From DP83640 datasheet: "Software driver code must wait 3 us
+	 * following a software reset before allowing further serial MII
+	 * operations with the DP83640."
+	 */
+	udelay(10);		/* Taking udelay inaccuracy into account */
+
+	return 0;
+}
+
 static int dp83640_config_init(struct phy_device *phydev)
 {
 	struct dp83640_private *dp83640 = phydev->priv;
@@ -1496,6 +1513,7 @@ static struct phy_driver dp83640_driver = {
 	.flags		= PHY_HAS_INTERRUPT,
 	.probe		= dp83640_probe,
 	.remove		= dp83640_remove,
+	.soft_reset	= dp83640_soft_reset,
 	.config_init	= dp83640_config_init,
 	.config_aneg	= genphy_config_aneg,
 	.read_status	= genphy_read_status,

From 0ecae6252abfa4321de461f94145857626bb9888 Mon Sep 17 00:00:00 2001
From: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com>
Date: Thu, 5 Apr 2018 16:25:41 -0700
Subject: [PATCH 0367/1852] mm/ksm: fix interaction with THP

[ Upstream commit 77da2ba0648a4fd52e5ff97b8b2b8dd312aec4b0 ]

This patch fixes a corner case for KSM.  When two pages belong or
belonged to the same transparent hugepage, and they should be merged,
KSM fails to split the page, and therefore no merging happens.

This bug can be reproduced by:
* making sure ksm is running (in case disabling ksmtuned)
* enabling transparent hugepages
* allocating a THP-aligned 1-THP-sized buffer
  e.g. on amd64: posix_memalign(&p, 1<<21, 1<<21)
* filling it with the same values
  e.g. memset(p, 42, 1<<21)
* performing madvise to make it mergeable
  e.g. madvise(p, 1<<21, MADV_MERGEABLE)
* waiting for KSM to perform a few scans

The expected outcome is that the all the pages get merged (1 shared and
the rest sharing); the actual outcome is that no pages get merged (1
unshared and the rest volatile)

The reason of this behaviour is that we increase the reference count
once for both pages we want to merge, but if they belong to the same
hugepage (or compound page), the reference counter used in both cases is
the one of the head of the compound page.  This means that
split_huge_page will find a value of the reference counter too high and
will fail.

This patch solves this problem by testing if the two pages to merge
belong to the same hugepage when attempting to merge them.  If so, the
hugepage is split safely.  This means that the hugepage is not split if
not necessary.

Link: http://lkml.kernel.org/r/1521548069-24758-1-git-send-email-imbrenda@linux.vnet.ibm.com
Signed-off-by: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com>
Co-authored-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/ksm.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/mm/ksm.c b/mm/ksm.c
index 2f028e6d08315..0b496edc704b1 100644
--- a/mm/ksm.c
+++ b/mm/ksm.c
@@ -1494,8 +1494,22 @@ static void cmp_and_merge_page(struct page *page, struct rmap_item *rmap_item)
 	tree_rmap_item =
 		unstable_tree_search_insert(rmap_item, page, &tree_page);
 	if (tree_rmap_item) {
+		bool split;
+
 		kpage = try_to_merge_two_pages(rmap_item, page,
 						tree_rmap_item, tree_page);
+		/*
+		 * If both pages we tried to merge belong to the same compound
+		 * page, then we actually ended up increasing the reference
+		 * count of the same compound page twice, and split_huge_page
+		 * failed.
+		 * Here we set a flag if that happened, and we use it later to
+		 * try split_huge_page again. Since we call put_page right
+		 * afterwards, the reference count will be correct and
+		 * split_huge_page should succeed.
+		 */
+		split = PageTransCompound(page)
+			&& compound_head(page) == compound_head(tree_page);
 		put_page(tree_page);
 		if (kpage) {
 			/*
@@ -1520,6 +1534,20 @@ static void cmp_and_merge_page(struct page *page, struct rmap_item *rmap_item)
 				break_cow(tree_rmap_item);
 				break_cow(rmap_item);
 			}
+		} else if (split) {
+			/*
+			 * We are here if we tried to merge two pages and
+			 * failed because they both belonged to the same
+			 * compound page. We will split the page now, but no
+			 * merging will take place.
+			 * We do not want to add the cost of a full lock; if
+			 * the page is locked, it is better to skip it and
+			 * perhaps try again later.
+			 */
+			if (!trylock_page(page))
+				return;
+			split_huge_page(page);
+			unlock_page(page);
 		}
 	}
 }

From 74826c736ce57e820a2e9f6045e6d6220d66610e Mon Sep 17 00:00:00 2001
From: Huang Ying <ying.huang@intel.com>
Date: Thu, 5 Apr 2018 16:23:20 -0700
Subject: [PATCH 0368/1852] mm: fix races between address_space dereference and
 free in page_evicatable

[ Upstream commit e92bb4dd9673945179b1fc738c9817dd91bfb629 ]

When page_mapping() is called and the mapping is dereferenced in
page_evicatable() through shrink_active_list(), it is possible for the
inode to be truncated and the embedded address space to be freed at the
same time.  This may lead to the following race.

CPU1                                                CPU2

truncate(inode)                                     shrink_active_list()
  ...                                                 page_evictable(page)
  truncate_inode_page(mapping, page);
    delete_from_page_cache(page)
      spin_lock_irqsave(&mapping->tree_lock, flags);
        __delete_from_page_cache(page, NULL)
          page_cache_tree_delete(..)
            ...                                         mapping = page_mapping(page);
            page->mapping = NULL;
            ...
      spin_unlock_irqrestore(&mapping->tree_lock, flags);
      page_cache_free_page(mapping, page)
        put_page(page)
          if (put_page_testzero(page)) -> false
- inode now has no pages and can be freed including embedded address_space

                                                        mapping_unevictable(mapping)
							  test_bit(AS_UNEVICTABLE, &mapping->flags);
- we've dereferenced mapping which is potentially already free.

Similar race exists between swap cache freeing and page_evicatable()
too.

The address_space in inode and swap cache will be freed after a RCU
grace period.  So the races are fixed via enclosing the page_mapping()
and address_space usage in rcu_read_lock/unlock().  Some comments are
added in code to make it clear what is protected by the RCU read lock.

Link: http://lkml.kernel.org/r/20180212081227.1940-1-ying.huang@intel.com
Signed-off-by: "Huang, Ying" <ying.huang@intel.com>
Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Minchan Kim <minchan@kernel.org>
Cc: "Huang, Ying" <ying.huang@intel.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Michal Hocko <mhocko@suse.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/vmscan.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/mm/vmscan.c b/mm/vmscan.c
index 534ff623719d6..b58ca729f20ae 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -3841,7 +3841,13 @@ int zone_reclaim(struct zone *zone, gfp_t gfp_mask, unsigned int order)
  */
 int page_evictable(struct page *page)
 {
-	return !mapping_unevictable(page_mapping(page)) && !PageMlocked(page);
+	int ret;
+
+	/* Prevent address_space of inode and swap cache from being freed */
+	rcu_read_lock();
+	ret = !mapping_unevictable(page_mapping(page)) && !PageMlocked(page);
+	rcu_read_unlock();
+	return ret;
 }
 
 #ifdef CONFIG_SHMEM

From d0cd96fd928aae8a914e0710d4b3da9d278757b8 Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.liu@linux.alibaba.com>
Date: Tue, 3 Apr 2018 01:59:48 +0800
Subject: [PATCH 0369/1852] Btrfs: bail out on error during replay_dir_deletes

[ Upstream commit b98def7ca6e152ee55e36863dddf6f41f12d1dc6 ]

If errors were returned by btrfs_next_leaf(), replay_dir_deletes needs
to bail out, otherwise @ret would be forced to be 0 after 'break;' and
the caller won't be aware of it.

Fixes: e02119d5a7b4 ("Btrfs: Add a write ahead tree log to optimize synchronous operations")
Reviewed-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: Liu Bo <bo.liu@linux.alibaba.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tree-log.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index 6ba022ed4a52c..7bcd57ecf6221 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -2223,8 +2223,10 @@ static noinline int replay_dir_deletes(struct btrfs_trans_handle *trans,
 			nritems = btrfs_header_nritems(path->nodes[0]);
 			if (path->slots[0] >= nritems) {
 				ret = btrfs_next_leaf(root, path);
-				if (ret)
+				if (ret == 1)
 					break;
+				else if (ret < 0)
+					goto out;
 			}
 			btrfs_item_key_to_cpu(path->nodes[0], &found_key,
 					      path->slots[0]);

From f765b9cebdcc2f1fb706d371b0b937228b8b447d Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.liu@linux.alibaba.com>
Date: Tue, 3 Apr 2018 01:59:47 +0800
Subject: [PATCH 0370/1852] Btrfs: fix NULL pointer dereference in
 log_dir_items

[ Upstream commit 80c0b4210a963e31529e15bf90519708ec947596 ]

0, 1 and <0 can be returned by btrfs_next_leaf(), and when <0 is
returned, path->nodes[0] could be NULL, log_dir_items lacks such a
check for <0 and we may run into a null pointer dereference panic.

Fixes: e02119d5a7b4 ("Btrfs: Add a write ahead tree log to optimize synchronous operations")
Reviewed-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: Liu Bo <bo.liu@linux.alibaba.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tree-log.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index 7bcd57ecf6221..8097085622258 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -3380,8 +3380,11 @@ static noinline int log_dir_items(struct btrfs_trans_handle *trans,
 		 * from this directory and from this transaction
 		 */
 		ret = btrfs_next_leaf(root, path);
-		if (ret == 1) {
-			last_offset = (u64)-1;
+		if (ret) {
+			if (ret == 1)
+				last_offset = (u64)-1;
+			else
+				err = ret;
 			goto done;
 		}
 		btrfs_item_key_to_cpu(path->nodes[0], &tmp, path->slots[0]);

From 1c13327d076981181edc5379c75b7677f46a5895 Mon Sep 17 00:00:00 2001
From: Nikolay Borisov <nborisov@suse.com>
Date: Thu, 5 Apr 2018 10:40:15 +0300
Subject: [PATCH 0371/1852] btrfs: Fix possible softlock on single core
 machines

[ Upstream commit 1e1c50a929bc9e49bc3f9935b92450d9e69f8158 ]

do_chunk_alloc implements a loop checking whether there is a pending
chunk allocation and if so causes the caller do loop. Generally this
loop is executed only once, however testing with btrfs/072 on a single
core vm machines uncovered an extreme case where the system could loop
indefinitely. This is due to a missing cond_resched when loop which
doesn't give a chance to the previous chunk allocator finish its job.

The fix is to simply add the missing cond_resched.

Fixes: 6d74119f1a3e ("Btrfs: avoid taking the chunk_mutex in do_chunk_alloc")
Signed-off-by: Nikolay Borisov <nborisov@suse.com>
Reviewed-by: David Sterba <dsterba@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/extent-tree.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 260f94b019c91..982a9d509817d 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -4392,6 +4392,7 @@ static int do_chunk_alloc(struct btrfs_trans_handle *trans,
 	if (wait_for_alloc) {
 		mutex_unlock(&fs_info->chunk_mutex);
 		wait_for_alloc = 0;
+		cond_resched();
 		goto again;
 	}
 

From 02e0737037d283cdf5e196ddd420de7ff3814d17 Mon Sep 17 00:00:00 2001
From: Jun Piao <piaojun@huawei.com>
Date: Thu, 5 Apr 2018 16:18:48 -0700
Subject: [PATCH 0372/1852] ocfs2/dlm: don't handle migrate lockres if already
 in shutdown

[ Upstream commit bb34f24c7d2c98d0c81838a7700e6068325b17a0 ]

We should not handle migrate lockres if we are already in
'DLM_CTXT_IN_SHUTDOWN', as that will cause lockres remains after leaving
dlm domain.  At last other nodes will get stuck into infinite loop when
requsting lock from us.

The problem is caused by concurrency umount between nodes.  Before
receiveing N1's DLM_BEGIN_EXIT_DOMAIN_MSG, N2 has picked up N1 as the
migrate target.  So N2 will continue sending lockres to N1 even though
N1 has left domain.

        N1                             N2 (owner)
                                       touch file

    access the file,
    and get pr lock

                                       begin leave domain and
                                       pick up N1 as new owner

    begin leave domain and
    migrate all lockres done

                                       begin migrate lockres to N1

    end leave domain, but
    the lockres left
    unexpectedly, because
    migrate task has passed

[piaojun@huawei.com: v3]
  Link: http://lkml.kernel.org/r/5A9CBD19.5020107@huawei.com
Link: http://lkml.kernel.org/r/5A99F028.2090902@huawei.com
Signed-off-by: Jun Piao <piaojun@huawei.com>
Reviewed-by: Yiwen Jiang <jiangyiwen@huawei.com>
Reviewed-by: Joseph Qi <jiangqi903@gmail.com>
Reviewed-by: Changwei Ge <ge.changwei@h3c.com>
Cc: Mark Fasheh <mark@fasheh.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Junxiao Bi <junxiao.bi@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ocfs2/dlm/dlmdomain.c   | 14 --------------
 fs/ocfs2/dlm/dlmdomain.h   | 25 ++++++++++++++++++++++++-
 fs/ocfs2/dlm/dlmrecovery.c |  9 +++++++++
 3 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/fs/ocfs2/dlm/dlmdomain.c b/fs/ocfs2/dlm/dlmdomain.c
index 2ee7fe747cea4..c55a9c47ac174 100644
--- a/fs/ocfs2/dlm/dlmdomain.c
+++ b/fs/ocfs2/dlm/dlmdomain.c
@@ -674,20 +674,6 @@ static void dlm_leave_domain(struct dlm_ctxt *dlm)
 	spin_unlock(&dlm->spinlock);
 }
 
-int dlm_shutting_down(struct dlm_ctxt *dlm)
-{
-	int ret = 0;
-
-	spin_lock(&dlm_domain_lock);
-
-	if (dlm->dlm_state == DLM_CTXT_IN_SHUTDOWN)
-		ret = 1;
-
-	spin_unlock(&dlm_domain_lock);
-
-	return ret;
-}
-
 void dlm_unregister_domain(struct dlm_ctxt *dlm)
 {
 	int leave = 0;
diff --git a/fs/ocfs2/dlm/dlmdomain.h b/fs/ocfs2/dlm/dlmdomain.h
index fd6122a38dbdf..8a9281411c18f 100644
--- a/fs/ocfs2/dlm/dlmdomain.h
+++ b/fs/ocfs2/dlm/dlmdomain.h
@@ -28,7 +28,30 @@
 extern spinlock_t dlm_domain_lock;
 extern struct list_head dlm_domains;
 
-int dlm_shutting_down(struct dlm_ctxt *dlm);
+static inline int dlm_joined(struct dlm_ctxt *dlm)
+{
+	int ret = 0;
+
+	spin_lock(&dlm_domain_lock);
+	if (dlm->dlm_state == DLM_CTXT_JOINED)
+		ret = 1;
+	spin_unlock(&dlm_domain_lock);
+
+	return ret;
+}
+
+static inline int dlm_shutting_down(struct dlm_ctxt *dlm)
+{
+	int ret = 0;
+
+	spin_lock(&dlm_domain_lock);
+	if (dlm->dlm_state == DLM_CTXT_IN_SHUTDOWN)
+		ret = 1;
+	spin_unlock(&dlm_domain_lock);
+
+	return ret;
+}
+
 void dlm_fire_domain_eviction_callbacks(struct dlm_ctxt *dlm,
 					int node_num);
 
diff --git a/fs/ocfs2/dlm/dlmrecovery.c b/fs/ocfs2/dlm/dlmrecovery.c
index 4a338803e7e92..88149b4387c29 100644
--- a/fs/ocfs2/dlm/dlmrecovery.c
+++ b/fs/ocfs2/dlm/dlmrecovery.c
@@ -1377,6 +1377,15 @@ int dlm_mig_lockres_handler(struct o2net_msg *msg, u32 len, void *data,
 	if (!dlm_grab(dlm))
 		return -EINVAL;
 
+	if (!dlm_joined(dlm)) {
+		mlog(ML_ERROR, "Domain %s not joined! "
+			  "lockres %.*s, master %u\n",
+			  dlm->name, mres->lockname_len,
+			  mres->lockname, mres->master);
+		dlm_put(dlm);
+		return -EINVAL;
+	}
+
 	BUG_ON(!(mres->flags & (DLM_MRES_RECOVERY|DLM_MRES_MIGRATION)));
 
 	real_master = mres->master;

From 7d4421e427a541a3c4b49ff9b1cffa516cced62c Mon Sep 17 00:00:00 2001
From: Davidlohr Bueso <dave@stgolabs.net>
Date: Mon, 2 Apr 2018 09:49:54 -0700
Subject: [PATCH 0373/1852] sched/rt: Fix rq->clock_update_flags <
 RQCF_ACT_SKIP warning

[ Upstream commit d29a20645d5e929aa7e8616f28e5d8e1c49263ec ]

While running rt-tests' pi_stress program I got the following splat:

  rq->clock_update_flags < RQCF_ACT_SKIP
  WARNING: CPU: 27 PID: 0 at kernel/sched/sched.h:960 assert_clock_updated.isra.38.part.39+0x13/0x20

  [...]

  <IRQ>
  enqueue_top_rt_rq+0xf4/0x150
  ? cpufreq_dbs_governor_start+0x170/0x170
  sched_rt_rq_enqueue+0x65/0x80
  sched_rt_period_timer+0x156/0x360
  ? sched_rt_rq_enqueue+0x80/0x80
  __hrtimer_run_queues+0xfa/0x260
  hrtimer_interrupt+0xcb/0x220
  smp_apic_timer_interrupt+0x62/0x120
  apic_timer_interrupt+0xf/0x20
  </IRQ>

  [...]

  do_idle+0x183/0x1e0
  cpu_startup_entry+0x5f/0x70
  start_secondary+0x192/0x1d0
  secondary_startup_64+0xa5/0xb0

We can get rid of it be the "traditional" means of adding an
update_rq_clock() call after acquiring the rq->lock in
do_sched_rt_period_timer().

The case for the RT task throttling (which this workload also hits)
can be ignored in that the skip_update call is actually bogus and
quite the contrary (the request bits are removed/reverted).

By setting RQCF_UPDATED we really don't care if the skip is happening
or not and will therefore make the assert_clock_updated() check happy.

Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
Reviewed-by: Matt Fleming <matt@codeblueprint.co.uk>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: dave@stgolabs.net
Cc: linux-kernel@vger.kernel.org
Cc: rostedt@goodmis.org
Link: http://lkml.kernel.org/r/20180402164954.16255-1-dave@stgolabs.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/sched/rt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
index ff2623b698b2a..4184d4a97fd23 100644
--- a/kernel/sched/rt.c
+++ b/kernel/sched/rt.c
@@ -826,6 +826,8 @@ static int do_sched_rt_period_timer(struct rt_bandwidth *rt_b, int overrun)
 		struct rq *rq = rq_of_rt_rq(rt_rq);
 
 		raw_spin_lock(&rq->lock);
+		update_rq_clock(rq);
+
 		if (rt_rq->rt_time) {
 			u64 runtime;
 

From 4bdff7bf75f6d09e692fe30d45dd043a80ecb31d Mon Sep 17 00:00:00 2001
From: Sean Christopherson <sean.j.christopherson@intel.com>
Date: Fri, 23 Mar 2018 09:34:00 -0700
Subject: [PATCH 0374/1852] KVM: VMX: raise internal error for exception during
 invalid protected mode state
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit add5ff7a216ee545a214013f26d1ef2f44a9c9f8 ]

Exit to userspace with KVM_INTERNAL_ERROR_EMULATION if we encounter
an exception in Protected Mode while emulating guest due to invalid
guest state.  Unlike Big RM, KVM doesn't support emulating exceptions
in PM, i.e. PM exceptions are always injected via the VMCS.  Because
we will never do VMRESUME due to emulation_required, the exception is
never realized and we'll keep emulating the faulting instruction over
and over until we receive a signal.

Exit to userspace iff there is a pending exception, i.e. don't exit
simply on a requested event. The purpose of this check and exit is to
aid in debugging a guest that is in all likelihood already doomed.
Invalid guest state in PM is extremely limited in normal operation,
e.g. it generally only occurs for a few instructions early in BIOS,
and any exception at this time is all but guaranteed to be fatal.
Non-vectored interrupts, e.g. INIT, SIPI and SMI, can be cleanly
handled/emulated, while checking for vectored interrupts, e.g. INTR
and NMI, without hitting false positives would add a fair amount of
complexity for almost no benefit (getting hit by lightning seems
more likely than encountering this specific scenario).

Add a WARN_ON_ONCE to vmx_queue_exception() if we try to inject an
exception via the VMCS and emulation_required is true.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Radim Kr�mář <rkrcmar@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/vmx.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 528b4352fa99e..a750fc7c74583 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2319,6 +2319,8 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
 		return;
 	}
 
+	WARN_ON_ONCE(vmx->emulation_required);
+
 	if (kvm_exception_is_soft(nr)) {
 		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
 			     vmx->vcpu.arch.event_exit_inst_len);
@@ -6037,12 +6039,12 @@ static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
 			goto out;
 		}
 
-		if (err != EMULATE_DONE) {
-			vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
-			vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
-			vcpu->run->internal.ndata = 0;
-			return 0;
-		}
+		if (err != EMULATE_DONE)
+			goto emulation_error;
+
+		if (vmx->emulation_required && !vmx->rmode.vm86_active &&
+		    vcpu->arch.exception.pending)
+			goto emulation_error;
 
 		if (vcpu->arch.halt_request) {
 			vcpu->arch.halt_request = 0;
@@ -6058,6 +6060,12 @@ static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
 
 out:
 	return ret;
+
+emulation_error:
+	vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+	vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
+	vcpu->run->internal.ndata = 0;
+	return 0;
 }
 
 static int __grow_ple_window(int val)

From bd22fb4990876bec6eda32dc6f6686caaa13fe15 Mon Sep 17 00:00:00 2001
From: David Howells <dhowells@redhat.com>
Date: Wed, 4 Apr 2018 13:41:26 +0100
Subject: [PATCH 0375/1852] fscache: Fix hanging wait on page discarded by
 writeback

[ Upstream commit 2c98425720233ae3e135add0c7e869b32913502f ]

If the fscache asynchronous write operation elects to discard a page that's
pending storage to the cache because the page would be over the store limit
then it needs to wake the page as someone may be waiting on completion of
the write.

The problem is that the store limit may be updated by a different
asynchronous operation - and so may miss the write - and that the store
limit may not even get updated until later by the netfs.

Fix the kernel hang by making fscache_write_op() mark as written any pages
that are over the limit.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fscache/page.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/fs/fscache/page.c b/fs/fscache/page.c
index 6b35fc4860a03..1de16a5a5c4ee 100644
--- a/fs/fscache/page.c
+++ b/fs/fscache/page.c
@@ -776,6 +776,7 @@ static void fscache_write_op(struct fscache_operation *_op)
 
 	_enter("{OP%x,%d}", op->op.debug_id, atomic_read(&op->op.usage));
 
+again:
 	spin_lock(&object->lock);
 	cookie = object->cookie;
 
@@ -816,10 +817,6 @@ static void fscache_write_op(struct fscache_operation *_op)
 		goto superseded;
 	page = results[0];
 	_debug("gang %d [%lx]", n, page->index);
-	if (page->index >= op->store_limit) {
-		fscache_stat(&fscache_n_store_pages_over_limit);
-		goto superseded;
-	}
 
 	radix_tree_tag_set(&cookie->stores, page->index,
 			   FSCACHE_COOKIE_STORING_TAG);
@@ -829,6 +826,9 @@ static void fscache_write_op(struct fscache_operation *_op)
 	spin_unlock(&cookie->stores_lock);
 	spin_unlock(&object->lock);
 
+	if (page->index >= op->store_limit)
+		goto discard_page;
+
 	fscache_stat(&fscache_n_store_pages);
 	fscache_stat(&fscache_n_cop_write_page);
 	ret = object->cache->ops->write_page(op, page);
@@ -844,6 +844,11 @@ static void fscache_write_op(struct fscache_operation *_op)
 	_leave("");
 	return;
 
+discard_page:
+	fscache_stat(&fscache_n_store_pages_over_limit);
+	fscache_end_page_write(object, page);
+	goto again;
+
 superseded:
 	/* this writer is going away and there aren't any more things to
 	 * write */

From e21981bd67d0c480712755f86af5fab14d56a23c Mon Sep 17 00:00:00 2001
From: "David S. Miller" <davem@davemloft.net>
Date: Tue, 3 Apr 2018 08:24:35 -0700
Subject: [PATCH 0376/1852] sparc64: Make atomic_xchg() an inline function
 rather than a macro.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit d13864b68e41c11e4231de90cf358658f6ecea45 ]

This avoids a lot of -Wunused warnings such as:

====================
kernel/debug/debug_core.c: In function ‘kgdb_cpu_enter’:
./arch/sparc/include/asm/cmpxchg_64.h:55:22: warning: value computed is not used [-Wunused-value]
 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))

./arch/sparc/include/asm/atomic_64.h:86:30: note: in expansion of macro ‘xchg’
 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
                              ^~~~
kernel/debug/debug_core.c:508:4: note: in expansion of macro ‘atomic_xchg’
    atomic_xchg(&kgdb_active, cpu);
    ^~~~~~~~~~~
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/sparc/include/asm/atomic_64.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index f2fbf9e16fafc..29070c9a70f95 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -74,7 +74,11 @@ ATOMIC_OP(xor)
 #define atomic64_add_negative(i, v) (atomic64_add_return(i, v) < 0)
 
 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+
+static inline int atomic_xchg(atomic_t *v, int new)
+{
+	return xchg(&v->counter, new);
+}
 
 static inline int __atomic_add_unless(atomic_t *v, int a, int u)
 {

From 061494f36e93caeda4c31fc567e6629da097928a Mon Sep 17 00:00:00 2001
From: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Date: Wed, 28 Mar 2018 20:14:05 +0100
Subject: [PATCH 0377/1852] rtc: snvs: Fix usage of snvs_rtc_enable

[ Upstream commit 1485991c024603b2fb4ae77beb7a0d741128a48e ]

commit 179a502f8c46 ("rtc: snvs: add Freescale rtc-snvs driver") introduces
the SNVS RTC driver with a function snvs_rtc_enable().

snvs_rtc_enable() can return an error on the enable path however this
driver does not currently trap that failure on the probe() path and
consequently if enabling the RTC fails we encounter a later error spinning
forever in rtc_write_sync_lp().

[   36.093481] [<c010d630>] (__irq_svc) from [<c0c2e9ec>] (_raw_spin_unlock_irqrestore+0x34/0x44)
[   36.102122] [<c0c2e9ec>] (_raw_spin_unlock_irqrestore) from [<c072e32c>] (regmap_read+0x4c/0x5c)
[   36.110938] [<c072e32c>] (regmap_read) from [<c085d0f4>] (rtc_write_sync_lp+0x6c/0x98)
[   36.118881] [<c085d0f4>] (rtc_write_sync_lp) from [<c085d160>] (snvs_rtc_alarm_irq_enable+0x40/0x4c)
[   36.128041] [<c085d160>] (snvs_rtc_alarm_irq_enable) from [<c08567b4>] (rtc_timer_do_work+0xd8/0x1a8)
[   36.137291] [<c08567b4>] (rtc_timer_do_work) from [<c01441b8>] (process_one_work+0x28c/0x76c)
[   36.145840] [<c01441b8>] (process_one_work) from [<c01446cc>] (worker_thread+0x34/0x58c)
[   36.153961] [<c01446cc>] (worker_thread) from [<c014aee4>] (kthread+0x138/0x150)
[   36.161388] [<c014aee4>] (kthread) from [<c0107e14>] (ret_from_fork+0x14/0x20)
[   36.168635] rcu_sched kthread starved for 2602 jiffies! g496 c495 f0x2 RCU_GP_WAIT_FQS(3) ->state=0x0 ->cpu=0
[   36.178564] rcu_sched       R  running task        0     8      2 0x00000000
[   36.185664] [<c0c288b0>] (__schedule) from [<c0c29134>] (schedule+0x3c/0xa0)
[   36.192739] [<c0c29134>] (schedule) from [<c0c2db80>] (schedule_timeout+0x78/0x4e0)
[   36.200422] [<c0c2db80>] (schedule_timeout) from [<c01a7ab0>] (rcu_gp_kthread+0x648/0x1864)
[   36.208800] [<c01a7ab0>] (rcu_gp_kthread) from [<c014aee4>] (kthread+0x138/0x150)
[   36.216309] [<c014aee4>] (kthread) from [<c0107e14>] (ret_from_fork+0x14/0x20)

This patch fixes by parsing the result of rtc_write_sync_lp() and
propagating both in the probe and elsewhere. If the RTC doesn't start we
don't proceed loading the driver and don't get into this loop mess later
on.

Fixes: 179a502f8c46 ("rtc: snvs: add Freescale rtc-snvs driver")
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/rtc/rtc-snvs.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/rtc-snvs.c b/drivers/rtc/rtc-snvs.c
index afab89f5be489..a161fbf6f172c 100644
--- a/drivers/rtc/rtc-snvs.c
+++ b/drivers/rtc/rtc-snvs.c
@@ -132,20 +132,23 @@ static int snvs_rtc_set_time(struct device *dev, struct rtc_time *tm)
 {
 	struct snvs_rtc_data *data = dev_get_drvdata(dev);
 	unsigned long time;
+	int ret;
 
 	rtc_tm_to_time(tm, &time);
 
 	/* Disable RTC first */
-	snvs_rtc_enable(data, false);
+	ret = snvs_rtc_enable(data, false);
+	if (ret)
+		return ret;
 
 	/* Write 32-bit time to 47-bit timer, leaving 15 LSBs blank */
 	regmap_write(data->regmap, data->offset + SNVS_LPSRTCLR, time << CNTR_TO_SECS_SH);
 	regmap_write(data->regmap, data->offset + SNVS_LPSRTCMR, time >> (32 - CNTR_TO_SECS_SH));
 
 	/* Enable RTC again */
-	snvs_rtc_enable(data, true);
+	ret = snvs_rtc_enable(data, true);
 
-	return 0;
+	return ret;
 }
 
 static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
@@ -287,7 +290,11 @@ static int snvs_rtc_probe(struct platform_device *pdev)
 	regmap_write(data->regmap, data->offset + SNVS_LPSR, 0xffffffff);
 
 	/* Enable RTC */
-	snvs_rtc_enable(data, true);
+	ret = snvs_rtc_enable(data, true);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to enable rtc %d\n", ret);
+		goto error_rtc_device_register;
+	}
 
 	device_init_wakeup(&pdev->dev, true);
 

From 73f5b1e4aa0f4decbe1cf1c476fea45363c1a8d3 Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Sun, 1 Apr 2018 10:26:30 -0700
Subject: [PATCH 0378/1852] net: bgmac: Fix endian access in
 bgmac_dma_tx_ring_free()

[ Upstream commit 60d6e6f0b9e422dd01aeda39257ee0428e5e2a3f ]

bgmac_dma_tx_ring_free() assigns the ctl1 word which is a litle endian
32-bit word without using proper accessors, fix this, and because a
length cannot be negative, use unsigned int while at it.

Fixes: 9cde94506eac ("bgmac: implement scatter/gather support")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bgmac.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index a5e4b4b93d1bd..ec37662644082 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -531,7 +531,8 @@ static void bgmac_dma_tx_ring_free(struct bgmac *bgmac,
 	int i;
 
 	for (i = 0; i < BGMAC_TX_RING_SLOTS; i++) {
-		int len = dma_desc[i].ctl1 & BGMAC_DESC_CTL1_LEN;
+		u32 ctl1 = le32_to_cpu(dma_desc[i].ctl1);
+		unsigned int len = ctl1 & BGMAC_DESC_CTL1_LEN;
 
 		slot = &ring->slots[i];
 		dev_kfree_skb(slot->skb);

From d97413a2fc313d415be848e185f30662e8405535 Mon Sep 17 00:00:00 2001
From: Vicente Bergas <vicencb@gmail.com>
Date: Tue, 20 Mar 2018 19:41:10 +0100
Subject: [PATCH 0379/1852] Bluetooth: btusb: Add USB ID 7392:a611 for Edimax
 EW-7611ULB

[ Upstream commit a41e0796396eeceff673af4a38feaee149c6ff86 ]

This WiFi/Bluetooth USB dongle uses a Realtek chipset, so, use btrtl for it.

Product information:
https://wikidevi.com/wiki/Edimax_EW-7611ULB

>From /sys/kernel/debug/usb/devices
T:  Bus=02 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#=  3 Spd=480  MxCh= 0
D:  Ver= 2.10 Cls=ef(misc ) Sub=02 Prot=01 MxPS=64 #Cfgs=  1
P:  Vendor=7392 ProdID=a611 Rev= 2.00
S:  Manufacturer=Realtek
S:  Product=Edimax Wi-Fi N150 Bluetooth4.0 USB Adapter
S:  SerialNumber=00e04c000001
C:* #Ifs= 3 Cfg#= 1 Atr=e0 MxPwr=500mA
A:  FirstIf#= 0 IfCount= 2 Cls=e0(wlcon) Sub=01 Prot=01
I:* If#= 0 Alt= 0 #EPs= 3 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=81(I) Atr=03(Int.) MxPS=  16 Ivl=1ms
E:  Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
E:  Ad=82(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
I:* If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=   0 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=   0 Ivl=1ms
I:  If#= 1 Alt= 1 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=   9 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=   9 Ivl=1ms
I:  If#= 1 Alt= 2 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  17 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  17 Ivl=1ms
I:  If#= 1 Alt= 3 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  25 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  25 Ivl=1ms
I:  If#= 1 Alt= 4 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  33 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  33 Ivl=1ms
I:  If#= 1 Alt= 5 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  49 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  49 Ivl=1ms
I:* If#= 2 Alt= 0 #EPs= 6 Cls=ff(vend.) Sub=ff Prot=ff Driver=rtl8723bu
E:  Ad=84(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms
E:  Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
E:  Ad=06(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
E:  Ad=87(I) Atr=03(Int.) MxPS=  64 Ivl=500us
E:  Ad=08(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms
E:  Ad=09(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms

Tested-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/bluetooth/btusb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 54cef3dc0beba..054fdf7199dea 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -336,6 +336,9 @@ static const struct usb_device_id blacklist_table[] = {
 	{ USB_DEVICE(0x13d3, 0x3459), .driver_info = BTUSB_REALTEK },
 	{ USB_DEVICE(0x13d3, 0x3494), .driver_info = BTUSB_REALTEK },
 
+	/* Additional Realtek 8723BU Bluetooth devices */
+	{ USB_DEVICE(0x7392, 0xa611), .driver_info = BTUSB_REALTEK },
+
 	/* Additional Realtek 8821AE Bluetooth devices */
 	{ USB_DEVICE(0x0b05, 0x17dc), .driver_info = BTUSB_REALTEK },
 	{ USB_DEVICE(0x13d3, 0x3414), .driver_info = BTUSB_REALTEK },

From 3ba58145540d5ac8e9c5a58513e9d6f9ed56f09f Mon Sep 17 00:00:00 2001
From: Qu Wenruo <wqu@suse.com>
Date: Tue, 27 Mar 2018 20:44:18 +0800
Subject: [PATCH 0380/1852] btrfs: tests/qgroup: Fix wrong tree backref level

[ Upstream commit 3c0efdf03b2d127f0e40e30db4e7aa0429b1b79a ]

The extent tree of the test fs is like the following:

 BTRFS info (device (null)): leaf 16327509003777336587 total ptrs 1 free space 3919
  item 0 key (4096 168 4096) itemoff 3944 itemsize 51
          extent refs 1 gen 1 flags 2
          tree block key (68719476736 0 0) level 1
                                           ^^^^^^^
          ref#0: tree block backref root 5

And it's using an empty tree for fs tree, so there is no way that its
level can be 1.

For REAL (created by mkfs) fs tree backref with no skinny metadata, the
result should look like:

 item 3 key (30408704 EXTENT_ITEM 4096) itemoff 3845 itemsize 51
         refs 1 gen 4 flags TREE_BLOCK
         tree block key (256 INODE_ITEM 0) level 0
                                           ^^^^^^^
         tree block backref root 5

Fix the level to 0, so it won't break later tree level checker.

Fixes: faa2dbf004e8 ("Btrfs: add sanity tests for new qgroup accounting code")
Signed-off-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tests/qgroup-tests.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/btrfs/tests/qgroup-tests.c b/fs/btrfs/tests/qgroup-tests.c
index 846d277b19013..2b2978c04e80f 100644
--- a/fs/btrfs/tests/qgroup-tests.c
+++ b/fs/btrfs/tests/qgroup-tests.c
@@ -70,7 +70,7 @@ static int insert_normal_tree_ref(struct btrfs_root *root, u64 bytenr,
 	btrfs_set_extent_generation(leaf, item, 1);
 	btrfs_set_extent_flags(leaf, item, BTRFS_EXTENT_FLAG_TREE_BLOCK);
 	block_info = (struct btrfs_tree_block_info *)(item + 1);
-	btrfs_set_tree_block_level(leaf, block_info, 1);
+	btrfs_set_tree_block_level(leaf, block_info, 0);
 	iref = (struct btrfs_extent_inline_ref *)(block_info + 1);
 	if (parent > 0) {
 		btrfs_set_extent_inline_ref_type(leaf, iref,

From ed2961830492e124fe4f730efb8ea71c8bdb6992 Mon Sep 17 00:00:00 2001
From: Filipe Manana <fdmanana@suse.com>
Date: Mon, 26 Mar 2018 23:59:12 +0100
Subject: [PATCH 0381/1852] Btrfs: fix copy_items() return value when logging
 an inode

[ Upstream commit 8434ec46c6e3232cebc25a910363b29f5c617820 ]

When logging an inode, at tree-log.c:copy_items(), if we call
btrfs_next_leaf() at the loop which checks for the need to log holes, we
need to make sure copy_items() returns the value 1 to its caller and
not 0 (on success). This is because the path the caller passed was
released and is now different from what is was before, and the caller
expects a return value of 0 to mean both success and that the path
has not changed, while a return value of 1 means both success and
signals the caller that it can not reuse the path, it has to perform
another tree search.

Even though this is a case that should not be triggered on normal
circumstances or very rare at least, its consequences can be very
unpredictable (especially when replaying a log tree).

Fixes: 16e7549f045d ("Btrfs: incompatible format change to remove hole extents")
Signed-off-by: Filipe Manana <fdmanana@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tree-log.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index 8097085622258..738f5d6beb95e 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -3835,6 +3835,7 @@ static noinline int copy_items(struct btrfs_trans_handle *trans,
 			ASSERT(ret == 0);
 			src = src_path->nodes[0];
 			i = 0;
+			need_find_last_extent = true;
 		}
 
 		btrfs_item_key_to_cpu(src, &key, i);

From c12cba897beef1ab0a646bcdda75220668bdd017 Mon Sep 17 00:00:00 2001
From: Jeff Mahoney <jeffm@suse.com>
Date: Fri, 16 Mar 2018 14:36:27 -0400
Subject: [PATCH 0382/1852] btrfs: fix lockdep splat in
 btrfs_alloc_subvolume_writers

[ Upstream commit 8a5a916d9a35e13576d79cc16e24611821b13e34 ]

While running btrfs/011, I hit the following lockdep splat.

This is the important bit:
   pcpu_alloc+0x1ac/0x5e0
   __percpu_counter_init+0x4e/0xb0
   btrfs_init_fs_root+0x99/0x1c0 [btrfs]
   btrfs_get_fs_root.part.54+0x5b/0x150 [btrfs]
   resolve_indirect_refs+0x130/0x830 [btrfs]
   find_parent_nodes+0x69e/0xff0 [btrfs]
   btrfs_find_all_roots_safe+0xa0/0x110 [btrfs]
   btrfs_find_all_roots+0x50/0x70 [btrfs]
   btrfs_qgroup_prepare_account_extents+0x53/0x90 [btrfs]
   btrfs_commit_transaction+0x3ce/0x9b0 [btrfs]

The percpu_counter_init call in btrfs_alloc_subvolume_writers
uses GFP_KERNEL, which we can't do during transaction commit.

This switches it to GFP_NOFS.

========================================================
WARNING: possible irq lock inversion dependency detected
4.12.14-kvmsmall #8 Tainted: G        W
--------------------------------------------------------
kswapd0/50 just changed the state of lock:
 (&delayed_node->mutex){+.+.-.}, at: [<ffffffffc06994fa>] __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
but this lock took another, RECLAIM_FS-unsafe lock in the past:
 (pcpu_alloc_mutex){+.+.+.}

and interrupts could create inverse lock ordering between them.

other info that might help us debug this:
Chain exists of:
  &delayed_node->mutex --> &found->groups_sem --> pcpu_alloc_mutex

 Possible interrupt unsafe locking scenario:

       CPU0                    CPU1
       ----                    ----
  lock(pcpu_alloc_mutex);
                               local_irq_disable();
                               lock(&delayed_node->mutex);
                               lock(&found->groups_sem);
  <Interrupt>
    lock(&delayed_node->mutex);

 *** DEADLOCK ***

2 locks held by kswapd0/50:
 #0:  (shrinker_rwsem){++++..}, at: [<ffffffff811dc11f>] shrink_slab+0x7f/0x5b0
 #1:  (&type->s_umount_key#30){+++++.}, at: [<ffffffff8126dec6>] trylock_super+0x16/0x50

the shortest dependencies between 2nd lock and 1st lock:
   -> (pcpu_alloc_mutex){+.+.+.} ops: 4904 {
      HARDIRQ-ON-W at:
                          __mutex_lock+0x4e/0x8c0
                          pcpu_alloc+0x1ac/0x5e0
                          alloc_kmem_cache_cpus.isra.70+0x25/0xa0
                          __do_tune_cpucache+0x2c/0x220
                          do_tune_cpucache+0x26/0xc0
                          enable_cpucache+0x6d/0xf0
                          kmem_cache_init_late+0x42/0x75
                          start_kernel+0x343/0x4cb
                          x86_64_start_kernel+0x127/0x134
                          secondary_startup_64+0xa5/0xb0
      SOFTIRQ-ON-W at:
                          __mutex_lock+0x4e/0x8c0
                          pcpu_alloc+0x1ac/0x5e0
                          alloc_kmem_cache_cpus.isra.70+0x25/0xa0
                          __do_tune_cpucache+0x2c/0x220
                          do_tune_cpucache+0x26/0xc0
                          enable_cpucache+0x6d/0xf0
                          kmem_cache_init_late+0x42/0x75
                          start_kernel+0x343/0x4cb
                          x86_64_start_kernel+0x127/0x134
                          secondary_startup_64+0xa5/0xb0
      RECLAIM_FS-ON-W at:
                             __kmalloc+0x47/0x310
                             pcpu_extend_area_map+0x2b/0xc0
                             pcpu_alloc+0x3ec/0x5e0
                             alloc_kmem_cache_cpus.isra.70+0x25/0xa0
                             __do_tune_cpucache+0x2c/0x220
                             do_tune_cpucache+0x26/0xc0
                             enable_cpucache+0x6d/0xf0
                             __kmem_cache_create+0x1bf/0x390
                             create_cache+0xba/0x1b0
                             kmem_cache_create+0x1f8/0x2b0
                             ksm_init+0x6f/0x19d
                             do_one_initcall+0x50/0x1b0
                             kernel_init_freeable+0x201/0x289
                             kernel_init+0xa/0x100
                             ret_from_fork+0x3a/0x50
      INITIAL USE at:
                         __mutex_lock+0x4e/0x8c0
                         pcpu_alloc+0x1ac/0x5e0
                         alloc_kmem_cache_cpus.isra.70+0x25/0xa0
                         setup_cpu_cache+0x2f/0x1f0
                         __kmem_cache_create+0x1bf/0x390
                         create_boot_cache+0x8b/0xb1
                         kmem_cache_init+0xa1/0x19e
                         start_kernel+0x270/0x4cb
                         x86_64_start_kernel+0x127/0x134
                         secondary_startup_64+0xa5/0xb0
    }
    ... key      at: [<ffffffff821d8e70>] pcpu_alloc_mutex+0x70/0xa0
    ... acquired at:
   pcpu_alloc+0x1ac/0x5e0
   __percpu_counter_init+0x4e/0xb0
   btrfs_init_fs_root+0x99/0x1c0 [btrfs]
   btrfs_get_fs_root.part.54+0x5b/0x150 [btrfs]
   resolve_indirect_refs+0x130/0x830 [btrfs]
   find_parent_nodes+0x69e/0xff0 [btrfs]
   btrfs_find_all_roots_safe+0xa0/0x110 [btrfs]
   btrfs_find_all_roots+0x50/0x70 [btrfs]
   btrfs_qgroup_prepare_account_extents+0x53/0x90 [btrfs]
   btrfs_commit_transaction+0x3ce/0x9b0 [btrfs]
   transaction_kthread+0x176/0x1b0 [btrfs]
   kthread+0x102/0x140
   ret_from_fork+0x3a/0x50

  -> (&fs_info->commit_root_sem){++++..} ops: 1566382 {
     HARDIRQ-ON-W at:
                        down_write+0x3e/0xa0
                        cache_block_group+0x287/0x420 [btrfs]
                        find_free_extent+0x106c/0x12d0 [btrfs]
                        btrfs_reserve_extent+0xd8/0x170 [btrfs]
                        cow_file_range.isra.66+0x133/0x470 [btrfs]
                        run_delalloc_range+0x121/0x410 [btrfs]
                        writepage_delalloc.isra.50+0xfe/0x180 [btrfs]
                        __extent_writepage+0x19a/0x360 [btrfs]
                        extent_write_cache_pages.constprop.56+0x249/0x3e0 [btrfs]
                        extent_writepages+0x4d/0x60 [btrfs]
                        do_writepages+0x1a/0x70
                        __filemap_fdatawrite_range+0xa7/0xe0
                        btrfs_rename+0x5ee/0xdb0 [btrfs]
                        vfs_rename+0x52a/0x7e0
                        SyS_rename+0x351/0x3b0
                        do_syscall_64+0x79/0x1e0
                        entry_SYSCALL_64_after_hwframe+0x42/0xb7
     HARDIRQ-ON-R at:
                        down_read+0x35/0x90
                        caching_thread+0x57/0x560 [btrfs]
                        normal_work_helper+0x1c0/0x5e0 [btrfs]
                        process_one_work+0x1e0/0x5c0
                        worker_thread+0x44/0x390
                        kthread+0x102/0x140
                        ret_from_fork+0x3a/0x50
     SOFTIRQ-ON-W at:
                        down_write+0x3e/0xa0
                        cache_block_group+0x287/0x420 [btrfs]
                        find_free_extent+0x106c/0x12d0 [btrfs]
                        btrfs_reserve_extent+0xd8/0x170 [btrfs]
                        cow_file_range.isra.66+0x133/0x470 [btrfs]
                        run_delalloc_range+0x121/0x410 [btrfs]
                        writepage_delalloc.isra.50+0xfe/0x180 [btrfs]
                        __extent_writepage+0x19a/0x360 [btrfs]
                        extent_write_cache_pages.constprop.56+0x249/0x3e0 [btrfs]
                        extent_writepages+0x4d/0x60 [btrfs]
                        do_writepages+0x1a/0x70
                        __filemap_fdatawrite_range+0xa7/0xe0
                        btrfs_rename+0x5ee/0xdb0 [btrfs]
                        vfs_rename+0x52a/0x7e0
                        SyS_rename+0x351/0x3b0
                        do_syscall_64+0x79/0x1e0
                        entry_SYSCALL_64_after_hwframe+0x42/0xb7
     SOFTIRQ-ON-R at:
                        down_read+0x35/0x90
                        caching_thread+0x57/0x560 [btrfs]
                        normal_work_helper+0x1c0/0x5e0 [btrfs]
                        process_one_work+0x1e0/0x5c0
                        worker_thread+0x44/0x390
                        kthread+0x102/0x140
                        ret_from_fork+0x3a/0x50
     INITIAL USE at:
                       down_write+0x3e/0xa0
                       cache_block_group+0x287/0x420 [btrfs]
                       find_free_extent+0x106c/0x12d0 [btrfs]
                       btrfs_reserve_extent+0xd8/0x170 [btrfs]
                       cow_file_range.isra.66+0x133/0x470 [btrfs]
                       run_delalloc_range+0x121/0x410 [btrfs]
                       writepage_delalloc.isra.50+0xfe/0x180 [btrfs]
                       __extent_writepage+0x19a/0x360 [btrfs]
                       extent_write_cache_pages.constprop.56+0x249/0x3e0 [btrfs]
                       extent_writepages+0x4d/0x60 [btrfs]
                       do_writepages+0x1a/0x70
                       __filemap_fdatawrite_range+0xa7/0xe0
                       btrfs_rename+0x5ee/0xdb0 [btrfs]
                       vfs_rename+0x52a/0x7e0
                       SyS_rename+0x351/0x3b0
                       do_syscall_64+0x79/0x1e0
                       entry_SYSCALL_64_after_hwframe+0x42/0xb7
   }
   ... key      at: [<ffffffffc0729578>] __key.61970+0x0/0xfffffffffff9aa88 [btrfs]
   ... acquired at:
   cache_block_group+0x287/0x420 [btrfs]
   find_free_extent+0x106c/0x12d0 [btrfs]
   btrfs_reserve_extent+0xd8/0x170 [btrfs]
   btrfs_alloc_tree_block+0x12f/0x4c0 [btrfs]
   btrfs_create_tree+0xbb/0x2a0 [btrfs]
   btrfs_create_uuid_tree+0x37/0x140 [btrfs]
   open_ctree+0x23c0/0x2660 [btrfs]
   btrfs_mount+0xd36/0xf90 [btrfs]
   mount_fs+0x3a/0x160
   vfs_kern_mount+0x66/0x150
   btrfs_mount+0x18c/0xf90 [btrfs]
   mount_fs+0x3a/0x160
   vfs_kern_mount+0x66/0x150
   do_mount+0x1c1/0xcc0
   SyS_mount+0x7e/0xd0
   do_syscall_64+0x79/0x1e0
   entry_SYSCALL_64_after_hwframe+0x42/0xb7

 -> (&found->groups_sem){++++..} ops: 2134587 {
    HARDIRQ-ON-W at:
                      down_write+0x3e/0xa0
                      __link_block_group+0x34/0x130 [btrfs]
                      btrfs_read_block_groups+0x33d/0x7b0 [btrfs]
                      open_ctree+0x2054/0x2660 [btrfs]
                      btrfs_mount+0xd36/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      btrfs_mount+0x18c/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      do_mount+0x1c1/0xcc0
                      SyS_mount+0x7e/0xd0
                      do_syscall_64+0x79/0x1e0
                      entry_SYSCALL_64_after_hwframe+0x42/0xb7
    HARDIRQ-ON-R at:
                      down_read+0x35/0x90
                      btrfs_calc_num_tolerated_disk_barrier_failures+0x113/0x1f0 [btrfs]
                      open_ctree+0x207b/0x2660 [btrfs]
                      btrfs_mount+0xd36/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      btrfs_mount+0x18c/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      do_mount+0x1c1/0xcc0
                      SyS_mount+0x7e/0xd0
                      do_syscall_64+0x79/0x1e0
                      entry_SYSCALL_64_after_hwframe+0x42/0xb7
    SOFTIRQ-ON-W at:
                      down_write+0x3e/0xa0
                      __link_block_group+0x34/0x130 [btrfs]
                      btrfs_read_block_groups+0x33d/0x7b0 [btrfs]
                      open_ctree+0x2054/0x2660 [btrfs]
                      btrfs_mount+0xd36/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      btrfs_mount+0x18c/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      do_mount+0x1c1/0xcc0
                      SyS_mount+0x7e/0xd0
                      do_syscall_64+0x79/0x1e0
                      entry_SYSCALL_64_after_hwframe+0x42/0xb7
    SOFTIRQ-ON-R at:
                      down_read+0x35/0x90
                      btrfs_calc_num_tolerated_disk_barrier_failures+0x113/0x1f0 [btrfs]
                      open_ctree+0x207b/0x2660 [btrfs]
                      btrfs_mount+0xd36/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      btrfs_mount+0x18c/0xf90 [btrfs]
                      mount_fs+0x3a/0x160
                      vfs_kern_mount+0x66/0x150
                      do_mount+0x1c1/0xcc0
                      SyS_mount+0x7e/0xd0
                      do_syscall_64+0x79/0x1e0
                      entry_SYSCALL_64_after_hwframe+0x42/0xb7
    INITIAL USE at:
                     down_write+0x3e/0xa0
                     __link_block_group+0x34/0x130 [btrfs]
                     btrfs_read_block_groups+0x33d/0x7b0 [btrfs]
                     open_ctree+0x2054/0x2660 [btrfs]
                     btrfs_mount+0xd36/0xf90 [btrfs]
                     mount_fs+0x3a/0x160
                     vfs_kern_mount+0x66/0x150
                     btrfs_mount+0x18c/0xf90 [btrfs]
                     mount_fs+0x3a/0x160
                     vfs_kern_mount+0x66/0x150
                     do_mount+0x1c1/0xcc0
                     SyS_mount+0x7e/0xd0
                     do_syscall_64+0x79/0x1e0
                     entry_SYSCALL_64_after_hwframe+0x42/0xb7
  }
  ... key      at: [<ffffffffc0729488>] __key.59101+0x0/0xfffffffffff9ab78 [btrfs]
  ... acquired at:
   find_free_extent+0xcb4/0x12d0 [btrfs]
   btrfs_reserve_extent+0xd8/0x170 [btrfs]
   btrfs_alloc_tree_block+0x12f/0x4c0 [btrfs]
   __btrfs_cow_block+0x110/0x5b0 [btrfs]
   btrfs_cow_block+0xd7/0x290 [btrfs]
   btrfs_search_slot+0x1f6/0x960 [btrfs]
   btrfs_lookup_inode+0x2a/0x90 [btrfs]
   __btrfs_update_delayed_inode+0x65/0x210 [btrfs]
   btrfs_commit_inode_delayed_inode+0x121/0x130 [btrfs]
   btrfs_evict_inode+0x3fe/0x6a0 [btrfs]
   evict+0xc4/0x190
   __dentry_kill+0xbf/0x170
   dput+0x2ae/0x2f0
   SyS_rename+0x2a6/0x3b0
   do_syscall_64+0x79/0x1e0
   entry_SYSCALL_64_after_hwframe+0x42/0xb7

-> (&delayed_node->mutex){+.+.-.} ops: 5580204 {
   HARDIRQ-ON-W at:
                    __mutex_lock+0x4e/0x8c0
                    btrfs_delayed_update_inode+0x46/0x6e0 [btrfs]
                    btrfs_update_inode+0x83/0x110 [btrfs]
                    btrfs_dirty_inode+0x62/0xe0 [btrfs]
                    touch_atime+0x8c/0xb0
                    do_generic_file_read+0x818/0xb10
                    __vfs_read+0xdc/0x150
                    vfs_read+0x8a/0x130
                    SyS_read+0x45/0xa0
                    do_syscall_64+0x79/0x1e0
                    entry_SYSCALL_64_after_hwframe+0x42/0xb7
   SOFTIRQ-ON-W at:
                    __mutex_lock+0x4e/0x8c0
                    btrfs_delayed_update_inode+0x46/0x6e0 [btrfs]
                    btrfs_update_inode+0x83/0x110 [btrfs]
                    btrfs_dirty_inode+0x62/0xe0 [btrfs]
                    touch_atime+0x8c/0xb0
                    do_generic_file_read+0x818/0xb10
                    __vfs_read+0xdc/0x150
                    vfs_read+0x8a/0x130
                    SyS_read+0x45/0xa0
                    do_syscall_64+0x79/0x1e0
                    entry_SYSCALL_64_after_hwframe+0x42/0xb7
   IN-RECLAIM_FS-W at:
                       __mutex_lock+0x4e/0x8c0
                       __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
                       btrfs_evict_inode+0x22c/0x6a0 [btrfs]
                       evict+0xc4/0x190
                       dispose_list+0x35/0x50
                       prune_icache_sb+0x42/0x50
                       super_cache_scan+0x139/0x190
                       shrink_slab+0x262/0x5b0
                       shrink_node+0x2eb/0x2f0
                       kswapd+0x2eb/0x890
                       kthread+0x102/0x140
                       ret_from_fork+0x3a/0x50
   INITIAL USE at:
                   __mutex_lock+0x4e/0x8c0
                   btrfs_delayed_update_inode+0x46/0x6e0 [btrfs]
                   btrfs_update_inode+0x83/0x110 [btrfs]
                   btrfs_dirty_inode+0x62/0xe0 [btrfs]
                   touch_atime+0x8c/0xb0
                   do_generic_file_read+0x818/0xb10
                   __vfs_read+0xdc/0x150
                   vfs_read+0x8a/0x130
                   SyS_read+0x45/0xa0
                   do_syscall_64+0x79/0x1e0
                   entry_SYSCALL_64_after_hwframe+0x42/0xb7
 }
 ... key      at: [<ffffffffc072d488>] __key.56935+0x0/0xfffffffffff96b78 [btrfs]
 ... acquired at:
   __lock_acquire+0x264/0x11c0
   lock_acquire+0xbd/0x1e0
   __mutex_lock+0x4e/0x8c0
   __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
   btrfs_evict_inode+0x22c/0x6a0 [btrfs]
   evict+0xc4/0x190
   dispose_list+0x35/0x50
   prune_icache_sb+0x42/0x50
   super_cache_scan+0x139/0x190
   shrink_slab+0x262/0x5b0
   shrink_node+0x2eb/0x2f0
   kswapd+0x2eb/0x890
   kthread+0x102/0x140
   ret_from_fork+0x3a/0x50

stack backtrace:
CPU: 1 PID: 50 Comm: kswapd0 Tainted: G        W        4.12.14-kvmsmall #8 SLE15 (unreleased)
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.0.0-prebuilt.qemu-project.org 04/01/2014
Call Trace:
 dump_stack+0x78/0xb7
 print_irq_inversion_bug.part.38+0x19f/0x1aa
 check_usage_forwards+0x102/0x120
 ? ret_from_fork+0x3a/0x50
 ? check_usage_backwards+0x110/0x110
 mark_lock+0x16c/0x270
 __lock_acquire+0x264/0x11c0
 ? pagevec_lookup_entries+0x1a/0x30
 ? truncate_inode_pages_range+0x2b3/0x7f0
 lock_acquire+0xbd/0x1e0
 ? __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
 __mutex_lock+0x4e/0x8c0
 ? __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
 ? __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
 ? btrfs_evict_inode+0x1f6/0x6a0 [btrfs]
 __btrfs_release_delayed_node+0x3a/0x1f0 [btrfs]
 btrfs_evict_inode+0x22c/0x6a0 [btrfs]
 evict+0xc4/0x190
 dispose_list+0x35/0x50
 prune_icache_sb+0x42/0x50
 super_cache_scan+0x139/0x190
 shrink_slab+0x262/0x5b0
 shrink_node+0x2eb/0x2f0
 kswapd+0x2eb/0x890
 kthread+0x102/0x140
 ? mem_cgroup_shrink_node+0x2c0/0x2c0
 ? kthread_create_on_node+0x40/0x40
 ret_from_fork+0x3a/0x50

Signed-off-by: Jeff Mahoney <jeffm@suse.com>
Reviewed-by: Liu Bo <bo.liu@linux.alibaba.com>
Signed-off-by: David Sterba <dsterba@suse.com>

Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/disk-io.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 85b207d19aa53..208b3f5ffb3f1 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -1196,7 +1196,7 @@ static struct btrfs_subvolume_writers *btrfs_alloc_subvolume_writers(void)
 	if (!writers)
 		return ERR_PTR(-ENOMEM);
 
-	ret = percpu_counter_init(&writers->counter, 0, GFP_KERNEL);
+	ret = percpu_counter_init(&writers->counter, 0, GFP_NOFS);
 	if (ret < 0) {
 		kfree(writers);
 		return ERR_PTR(ret);

From 8960934b53a62ac09e0637c3098473427a1985c4 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 29 Mar 2018 12:01:53 +0300
Subject: [PATCH 0383/1852] xen/acpi: off by one in read_acpi_id()

[ Upstream commit c37a3c94775855567b90f91775b9691e10bd2806 ]

If acpi_id is == nr_acpi_bits, then we access one element beyond the end
of the acpi_psd[] array or we set one bit beyond the end of the bit map
when we do __set_bit(acpi_id, acpi_id_present);

Fixes: 59a568029181 ("xen/acpi-processor: C and P-state driver that uploads said data to hypervisor.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Joao Martins <joao.m.martins@oracle.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/xen-acpi-processor.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c
index 2e319d0c395da..84cc98f3cabe7 100644
--- a/drivers/xen/xen-acpi-processor.c
+++ b/drivers/xen/xen-acpi-processor.c
@@ -362,9 +362,9 @@ read_acpi_id(acpi_handle handle, u32 lvl, void *context, void **rv)
 	}
 	/* There are more ACPI Processor objects than in x2APIC or MADT.
 	 * This can happen with incorrect ACPI SSDT declerations. */
-	if (acpi_id > nr_acpi_bits) {
-		pr_debug("We only have %u, trying to set %u\n",
-			 nr_acpi_bits, acpi_id);
+	if (acpi_id >= nr_acpi_bits) {
+		pr_debug("max acpi id %u, trying to set %u\n",
+			 nr_acpi_bits - 1, acpi_id);
 		return AE_OK;
 	}
 	/* OK, There is a ACPI Processor object */

From 8d368af13dc4a6fd3a18c8bff664c8c2e352f417 Mon Sep 17 00:00:00 2001
From: Lenny Szubowicz <lszubowi@redhat.com>
Date: Tue, 27 Mar 2018 09:56:40 -0400
Subject: [PATCH 0384/1852] ACPI: acpi_pad: Fix memory leak in power saving
 threads

[ Upstream commit 8b29d29abc484d638213dd79a18a95ae7e5bb402 ]

Fix once per second (round_robin_time) memory leak of about 1 KB in
each acpi_pad kernel idling thread that is activated.

Found by testing with kmemleak.

Signed-off-by: Lenny Szubowicz <lszubowi@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/acpi_pad.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c
index 8ea8211b2d589..f8bb0e4d035af 100644
--- a/drivers/acpi/acpi_pad.c
+++ b/drivers/acpi/acpi_pad.c
@@ -108,6 +108,7 @@ static void round_robin_cpu(unsigned int tsk_index)
 		cpumask_andnot(tmp, cpu_online_mask, pad_busy_cpus);
 	if (cpumask_empty(tmp)) {
 		mutex_unlock(&round_robin_lock);
+		free_cpumask_var(tmp);
 		return;
 	}
 	for_each_cpu(cpu, tmp) {
@@ -125,6 +126,8 @@ static void round_robin_cpu(unsigned int tsk_index)
 	mutex_unlock(&round_robin_lock);
 
 	set_cpus_allowed_ptr(current, cpumask_of(preferred_cpu));
+
+	free_cpumask_var(tmp);
 }
 
 static void exit_round_robin(unsigned int tsk_index)

From 7df3e8236c4d947655cf9e64a98a48a6a9982fc0 Mon Sep 17 00:00:00 2001
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Fri, 30 Mar 2018 23:27:25 +1100
Subject: [PATCH 0385/1852] powerpc/mpic: Check if cpu_possible() in
 mpic_physmask()

[ Upstream commit 0834d627fbea00c1444075eb3e448e1974da452d ]

In mpic_physmask() we loop over all CPUs up to 32, then get the hard
SMP processor id of that CPU.

Currently that's possibly walking off the end of the paca array, but
in a future patch we will change the paca array to be an array of
pointers, and in that case we will get a NULL for missing CPUs and
oops. eg:

  Unable to handle kernel paging request for data at address 0x88888888888888b8
  Faulting instruction address: 0xc00000000004e380
  Oops: Kernel access of bad area, sig: 11 [#1]
  ...
  NIP .mpic_set_affinity+0x60/0x1a0
  LR  .irq_do_set_affinity+0x48/0x100

Fix it by checking the CPU is possible, this also fixes the code if
there are gaps in the CPU numbering which probably never happens on
mpic systems but who knows.

Debugged-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/sysdev/mpic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 2a0452e364ba7..d11f931cac694 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -626,7 +626,7 @@ static inline u32 mpic_physmask(u32 cpumask)
 	int i;
 	u32 mask = 0;
 
-	for (i = 0; i < min(32, NR_CPUS); ++i, cpumask >>= 1)
+	for (i = 0; i < min(32, NR_CPUS) && cpu_possible(i); ++i, cpumask >>= 1)
 		mask |= (cpumask & 1) << get_hard_smp_processor_id(i);
 	return mask;
 }

From 53c500738436a040420230da85c5e69e4eae3523 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@linux-m68k.org>
Date: Wed, 28 Mar 2018 17:12:18 +1000
Subject: [PATCH 0386/1852] m68k: set dma and coherent masks for platform FEC
 ethernets

[ Upstream commit f61e64310b75733d782e930d1fb404b84699eed6 ]

As of commit 205e1b7f51e4 ("dma-mapping: warn when there is no
coherent_dma_mask") the Freescale FEC driver is issuing the following
warning on driver initialization on ColdFire systems:

WARNING: CPU: 0 PID: 1 at ./include/linux/dma-mapping.h:516 0x40159e20
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 4.16.0-rc7-dirty #4
Stack from 41833dd8:
        41833dd8 40259c53 40025534 40279e26 00000003 00000000 4004e514 41827000
        400255de 40244e42 00000204 40159e20 00000009 00000000 00000000 4024531d
        40159e20 40244e42 00000204 00000000 00000000 00000000 00000007 00000000
        00000000 40279e26 4028d040 40226576 4003ae88 40279e26 418273f6 41833ef8
        7fffffff 418273f2 41867028 4003c9a2 4180ac6c 00000004 41833f8c 4013e71c
        40279e1c 40279e26 40226c16 4013ced2 40279e26 40279e58 4028d040 00000000
Call Trace:
        [<40025534>] 0x40025534
 [<4004e514>] 0x4004e514
 [<400255de>] 0x400255de
 [<40159e20>] 0x40159e20
 [<40159e20>] 0x40159e20

It is not fatal, the driver and the system continue to function normally.

As per the warning the coherent_dma_mask is not set on this device.
There is nothing special about the DMA memory coherency on this hardware
so we can just set the mask to 32bits in the platform data for the FEC
ethernet devices.

Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/m68k/coldfire/device.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/m68k/coldfire/device.c b/arch/m68k/coldfire/device.c
index 71ea4c02795d4..8a2dc0af4cadb 100644
--- a/arch/m68k/coldfire/device.c
+++ b/arch/m68k/coldfire/device.c
@@ -135,7 +135,11 @@ static struct platform_device mcf_fec0 = {
 	.id			= 0,
 	.num_resources		= ARRAY_SIZE(mcf_fec0_resources),
 	.resource		= mcf_fec0_resources,
-	.dev.platform_data	= FEC_PDATA,
+	.dev = {
+		.dma_mask		= &mcf_fec0.dev.coherent_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= FEC_PDATA,
+	}
 };
 
 #ifdef MCFFEC_BASE1
@@ -167,7 +171,11 @@ static struct platform_device mcf_fec1 = {
 	.id			= 1,
 	.num_resources		= ARRAY_SIZE(mcf_fec1_resources),
 	.resource		= mcf_fec1_resources,
-	.dev.platform_data	= FEC_PDATA,
+	.dev = {
+		.dma_mask		= &mcf_fec1.dev.coherent_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= FEC_PDATA,
+	}
 };
 #endif /* MCFFEC_BASE1 */
 #endif /* CONFIG_FEC */

From d8d7103f982faa948cedd9b7d43912dd68867485 Mon Sep 17 00:00:00 2001
From: Helge Deller <deller@gmx.de>
Date: Sun, 25 Mar 2018 14:04:22 +0200
Subject: [PATCH 0387/1852] parisc/pci: Switch LBA PCI bus from Hard Fail to
 Soft Fail mode

[ Upstream commit b845f66f78bf42a4ce98e5cfe0e94fab41dd0742 ]

Carlo Pisani noticed that his C3600 workstation behaved unstable during heavy
I/O on the PCI bus with a VIA VT6421 IDE/SATA PCI card.

To avoid such instability, this patch switches the LBA PCI bus from Hard Fail
mode into Soft Fail mode. In this mode the bus will return -1UL for timed out
MMIO transactions, which is exactly how the x86 (and most other architectures)
PCI busses behave.

This patch is based on a proposal by Grant Grundler and Kyle McMartin 10
years ago:
https://www.spinics.net/lists/linux-parisc/msg01027.html

Cc: Carlo Pisani <carlojpisani@gmail.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Reviewed-by: Grant Grundler <grantgrundler@gmail.com>
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/parisc/lba_pci.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 312cb5b74dec6..1d288fa4f4d68 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -1365,9 +1365,27 @@ lba_hw_init(struct lba_device *d)
 		WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG);
 	}
 
-	/* Set HF mode as the default (vs. -1 mode). */
+
+	/*
+	 * Hard Fail vs. Soft Fail on PCI "Master Abort".
+	 *
+	 * "Master Abort" means the MMIO transaction timed out - usually due to
+	 * the device not responding to an MMIO read. We would like HF to be
+	 * enabled to find driver problems, though it means the system will
+	 * crash with a HPMC.
+	 *
+	 * In SoftFail mode "~0L" is returned as a result of a timeout on the
+	 * pci bus. This is like how PCI busses on x86 and most other
+	 * architectures behave.  In order to increase compatibility with
+	 * existing (x86) PCI hardware and existing Linux drivers we enable
+	 * Soft Faul mode on PA-RISC now too.
+	 */
         stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);
+#if defined(ENABLE_HARDFAIL)
 	WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
+#else
+	WRITE_REG32(stat & ~HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
+#endif
 
 	/*
 	** Writing a zero to STAT_CTL.rf (bit 0) will clear reset signal

From 0b9c16d038a1e365c0de8b98b09b73e743ad94e4 Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Mon, 26 Mar 2018 19:50:31 -0700
Subject: [PATCH 0388/1852] hwmon: (nct6775) Fix writing pwmX_mode

[ Upstream commit 415eb2a1aaa4881cf85bd86c683356fdd8094a23 ]

pwmX_mode is defined in the ABI as 0=DC mode, 1=pwm mode. The chip
register bit is set to 1 for DC mode. This got mixed up, and writing
1 into pwmX_mode resulted in DC mode enabled. Fix it up by using
the ABI definition throughout the driver for consistency.

Fixes: 77eb5b3703d99 ("hwmon: (nct6775) Add support for pwm, pwm_mode, ... ")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hwmon/nct6775.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/hwmon/nct6775.c b/drivers/hwmon/nct6775.c
index d7ebdf8651f5f..d3c6115f16b90 100644
--- a/drivers/hwmon/nct6775.c
+++ b/drivers/hwmon/nct6775.c
@@ -1390,7 +1390,7 @@ static void nct6775_update_pwm(struct device *dev)
 		duty_is_dc = data->REG_PWM_MODE[i] &&
 		  (nct6775_read_value(data, data->REG_PWM_MODE[i])
 		   & data->PWM_MODE_MASK[i]);
-		data->pwm_mode[i] = duty_is_dc;
+		data->pwm_mode[i] = !duty_is_dc;
 
 		fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
 		for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
@@ -2267,7 +2267,7 @@ show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
 	struct nct6775_data *data = nct6775_update_device(dev);
 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
 
-	return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
+	return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
 }
 
 static ssize_t
@@ -2288,9 +2288,9 @@ store_pwm_mode(struct device *dev, struct device_attribute *attr,
 	if (val > 1)
 		return -EINVAL;
 
-	/* Setting DC mode is not supported for all chips/channels */
+	/* Setting DC mode (0) is not supported for all chips/channels */
 	if (data->REG_PWM_MODE[nr] == 0) {
-		if (val)
+		if (!val)
 			return -EINVAL;
 		return count;
 	}
@@ -2299,7 +2299,7 @@ store_pwm_mode(struct device *dev, struct device_attribute *attr,
 	data->pwm_mode[nr] = val;
 	reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
 	reg &= ~data->PWM_MODE_MASK[nr];
-	if (val)
+	if (!val)
 		reg |= data->PWM_MODE_MASK[nr];
 	nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
 	mutex_unlock(&data->update_lock);

From a69f05103ebe99fb9335e1ae9c554ae96901be34 Mon Sep 17 00:00:00 2001
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
Date: Thu, 8 Mar 2018 23:27:31 +0100
Subject: [PATCH 0389/1852] rtc: hctosys: Ensure system time doesn't overflow
 time_t

[ Upstream commit b3a5ac42ab18b7d1a8f2f072ca0ee76a3b754a43 ]

On 32bit platforms, time_t is still a signed 32bit long. If it is
overflowed, userspace and the kernel cant agree on the current system time.
This causes multiple issues, in particular with systemd:
https://github.com/systemd/systemd/issues/1143

A good workaround is to simply avoid using hctosys which is something I
greatly encourage as the time is better set by userspace.

However, many distribution enable it and use systemd which is rendering the
system unusable in case the RTC holds a date after 2038 (and more so after
2106). Many drivers have workaround for this case and they should be
eliminated so there is only one place left to fix when userspace is able to
cope with dates after the 31bit overflow.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/rtc/hctosys.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/hctosys.c b/drivers/rtc/hctosys.c
index e1cfa06810ef2..e79f2a181ad24 100644
--- a/drivers/rtc/hctosys.c
+++ b/drivers/rtc/hctosys.c
@@ -49,6 +49,11 @@ static int __init rtc_hctosys(void)
 
 	tv64.tv_sec = rtc_tm_to_time64(&tm);
 
+#if BITS_PER_LONG == 32
+	if (tv64.tv_sec > INT_MAX)
+		goto err_read;
+#endif
+
 	err = do_settimeofday64(&tv64);
 
 	dev_info(rtc->dev.parent,

From 439af3b5d4f3f9bf6f60d1da16c09b39ec4274b7 Mon Sep 17 00:00:00 2001
From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Date: Wed, 21 Mar 2018 17:10:25 +0530
Subject: [PATCH 0390/1852] powerpc/perf: Prevent kernel address leak to
 userspace via BHRB buffer

[ Upstream commit bb19af816025d495376bd76bf6fbcf4244f9a06d ]

The current Branch History Rolling Buffer (BHRB) code does not check
for any privilege levels before updating the data from BHRB. This
could leak kernel addresses to userspace even when profiling only with
userspace privileges. Add proper checks to prevent it.

Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/perf/core-book3s.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 4eba7c00ea1fb..02b9c9914b097 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -448,6 +448,16 @@ static void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
 				/* invalid entry */
 				continue;
 
+			/*
+			 * BHRB rolling buffer could very much contain the kernel
+			 * addresses at this point. Check the privileges before
+			 * exporting it to userspace (avoid exposure of regions
+			 * where we could have speculative execution)
+			 */
+			if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN) &&
+				is_kernel_addr(addr))
+				continue;
+
 			/* Branches are read most recent first (ie. mfbhrb 0 is
 			 * the most recent branch).
 			 * There are two types of valid entries:

From 4fc29c90974ddaed4abb0364a4b4a0f1fd3e0367 Mon Sep 17 00:00:00 2001
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Wed, 21 Mar 2018 17:10:24 +0530
Subject: [PATCH 0391/1852] powerpc/perf: Fix kernel address leak via sampling
 registers

[ Upstream commit e1ebd0e5b9d0a10ba65e63a3514b6da8c6a5a819 ]

Current code in power_pmu_disable() does not clear the sampling
registers like Sampling Instruction Address Register (SIAR) and
Sampling Data Address Register (SDAR) after disabling the PMU. Since
these are userspace readable and could contain kernel addresses, add
code to explicitly clear the content of these registers.

Also add a "context synchronizing instruction" to enforce no further
updates to these registers as suggested by Power ISA v3.0B. From
section 9.4, on page 1108:

  "If an mtspr instruction is executed that changes the value of a
  Performance Monitor register other than SIAR, SDAR, and SIER, the
  change is not guaranteed to have taken effect until after a
  subsequent context synchronizing instruction has been executed (see
  Chapter 11. "Synchronization Requirements for Context Alterations"
  on page 1133)."

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
[mpe: Massage change log and add ISA reference]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/perf/core-book3s.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 02b9c9914b097..30e2e8efbe6b7 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1198,6 +1198,7 @@ static void power_pmu_disable(struct pmu *pmu)
 		 */
 		write_mmcr0(cpuhw, val);
 		mb();
+		isync();
 
 		/*
 		 * Disable instruction sampling if it was enabled
@@ -1206,12 +1207,26 @@ static void power_pmu_disable(struct pmu *pmu)
 			mtspr(SPRN_MMCRA,
 			      cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
 			mb();
+			isync();
 		}
 
 		cpuhw->disabled = 1;
 		cpuhw->n_added = 0;
 
 		ebb_switch_out(mmcr0);
+
+#ifdef CONFIG_PPC64
+		/*
+		 * These are readable by userspace, may contain kernel
+		 * addresses and are not switched by context switch, so clear
+		 * them now to avoid leaking anything to userspace in general
+		 * including to another process.
+		 */
+		if (ppmu->flags & PPMU_ARCH_207S) {
+			mtspr(SPRN_SDAR, 0);
+			mtspr(SPRN_SIAR, 0);
+		}
+#endif
 	}
 
 	local_irq_restore(flags);

From 8b22728811d8bc8e93b6adc8cb8091bbed83632a Mon Sep 17 00:00:00 2001
From: Frank Asseg <frank.asseg@objecthunter.net>
Date: Mon, 12 Mar 2018 19:57:06 +0100
Subject: [PATCH 0392/1852] tools/thermal: tmon: fix for segfault

[ Upstream commit 6c59f64b7ecf2bccbe73931d7d573d66ed13b537 ]

Fixes a segfault occurring when e.g. <TAB> is pressed multiple times in the
ncurses tmon application. The segfault is caused by incrementing
cur_thermal_record in the main function without checking if it's value reached
NR_THERMAL_RECORD immediately. Since the boundary check only occurred in
update_thermal_data a race condition existed, which lead to an attempted read
beyond the last element of the trec array.

The fix was implemented by moving the cur_thermal_record incrementation to the
update_thermal_data function using a temporary variable on which the boundary
condition is checked before updating cur_thread_record, so that the variable is
never incremented beyond the trec array's boundary.

It seems the segfault does not occur on every machine: On a HP EliteBook G4 the
segfault happens, while it does not happen on a Thinkpad T540p.

Signed-off-by: Frank Asseg <frank.asseg@objecthunter.net>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/thermal/tmon/sysfs.c | 12 +++++++-----
 tools/thermal/tmon/tmon.c  |  1 -
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/tools/thermal/tmon/sysfs.c b/tools/thermal/tmon/sysfs.c
index 1c12536f2081e..18f523557983b 100644
--- a/tools/thermal/tmon/sysfs.c
+++ b/tools/thermal/tmon/sysfs.c
@@ -486,6 +486,7 @@ int zone_instance_to_index(int zone_inst)
 int update_thermal_data()
 {
 	int i;
+	int next_thermal_record = cur_thermal_record + 1;
 	char tz_name[256];
 	static unsigned long samples;
 
@@ -495,9 +496,9 @@ int update_thermal_data()
 	}
 
 	/* circular buffer for keeping historic data */
-	if (cur_thermal_record >= NR_THERMAL_RECORDS)
-		cur_thermal_record = 0;
-	gettimeofday(&trec[cur_thermal_record].tv, NULL);
+	if (next_thermal_record >= NR_THERMAL_RECORDS)
+		next_thermal_record = 0;
+	gettimeofday(&trec[next_thermal_record].tv, NULL);
 	if (tmon_log) {
 		fprintf(tmon_log, "%lu ", ++samples);
 		fprintf(tmon_log, "%3.1f ", p_param.t_target);
@@ -507,11 +508,12 @@ int update_thermal_data()
 		snprintf(tz_name, 256, "%s/%s%d", THERMAL_SYSFS, TZONE,
 			ptdata.tzi[i].instance);
 		sysfs_get_ulong(tz_name, "temp",
-				&trec[cur_thermal_record].temp[i]);
+				&trec[next_thermal_record].temp[i]);
 		if (tmon_log)
 			fprintf(tmon_log, "%lu ",
-				trec[cur_thermal_record].temp[i]/1000);
+				trec[next_thermal_record].temp[i] / 1000);
 	}
+	cur_thermal_record = next_thermal_record;
 	for (i = 0; i < ptdata.nr_cooling_dev; i++) {
 		char cdev_name[256];
 		unsigned long val;
diff --git a/tools/thermal/tmon/tmon.c b/tools/thermal/tmon/tmon.c
index 9aa19652e8e85..b43138f8b8628 100644
--- a/tools/thermal/tmon/tmon.c
+++ b/tools/thermal/tmon/tmon.c
@@ -336,7 +336,6 @@ int main(int argc, char **argv)
 			show_data_w();
 			show_cooling_device();
 		}
-		cur_thermal_record++;
 		time_elapsed += ticktime;
 		controller_handler(trec[0].temp[target_tz_index] / 1000,
 				&yk);

From 3356eba5588bf6405b81ac31dbe2929fa3f4fa7a Mon Sep 17 00:00:00 2001
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Fri, 23 Mar 2018 20:44:27 +1100
Subject: [PATCH 0393/1852] selftests: Print the test we're running to
 /dev/kmsg

[ Upstream commit 88893cf787d3062c631cc20b875068eb11756e03 ]

Some tests cause the kernel to print things to the kernel log
buffer (ie. printk), in particular oops and warnings etc. However when
running all the tests in succession it's not always obvious which
test(s) caused the kernel to print something.

We can narrow it down by printing which test directory we're running
in to /dev/kmsg, if it's writable.

Example output:

  [  170.149149] kselftest: Running tests in powerpc
  [  305.300132] kworker/dying (71) used greatest stack depth: 7776 bytes
                 left
  [  808.915456] kselftest: Running tests in pstore

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile
index 24ebd3e3eb7de..5d2e479430d15 100644
--- a/tools/testing/selftests/Makefile
+++ b/tools/testing/selftests/Makefile
@@ -90,6 +90,7 @@ ifdef INSTALL_PATH
 	for TARGET in $(TARGETS); do \
 		echo "echo ; echo Running tests in $$TARGET" >> $(ALL_SCRIPT); \
 		echo "echo ========================================" >> $(ALL_SCRIPT); \
+		echo "[ -w /dev/kmsg ] && echo \"kselftest: Running tests in $$TARGET\" >> /dev/kmsg" >> $(ALL_SCRIPT); \
 		echo "cd $$TARGET" >> $(ALL_SCRIPT); \
 		make -s --no-print-directory -C $$TARGET emit_tests >> $(ALL_SCRIPT); \
 		echo "cd \$$ROOT" >> $(ALL_SCRIPT); \

From 39b646e07d8c49428336ecf8b76378803be2b809 Mon Sep 17 00:00:00 2001
From: Leon Romanovsky <leonro@mellanox.com>
Date: Tue, 2 Jan 2018 16:49:56 +0200
Subject: [PATCH 0394/1852] net/mlx5: Protect from command bit overflow

[ Upstream commit 957f6ba8adc7be401a74ccff427e4cfd88d3bfcb ]

The system with CONFIG_UBSAN enabled on produces the following error
during driver initialization. The reason to it that max_reg_cmds can be
larger enough to cause to "1 << max_reg_cmds" overflow the unsigned long.

================================================================================
UBSAN: Undefined behaviour in drivers/net/ethernet/mellanox/mlx5/core/cmd.c:1805:42
signed integer overflow:
-2147483648 - 1 cannot be represented in type 'int'
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.15.0-rc2-00032-g06cda2358d9b-dirty #724
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.7.5-0-ge51488c-20140602_164612-nilsson.home.kraxel.org 04/01/2014
Call Trace:
 dump_stack+0xe9/0x18f
 ? dma_virt_alloc+0x81/0x81
 ubsan_epilogue+0xe/0x4e
 handle_overflow+0x187/0x20c
 mlx5_cmd_init+0x73a/0x12b0
 mlx5_load_one+0x1c3d/0x1d30
 init_one+0xd02/0xf10
 pci_device_probe+0x26c/0x3b0
 driver_probe_device+0x622/0xb40
 __driver_attach+0x175/0x1b0
 bus_for_each_dev+0xef/0x190
 bus_add_driver+0x2db/0x490
 driver_register+0x16b/0x1e0
 __pci_register_driver+0x177/0x1b0
 init+0x6d/0x92
 do_one_initcall+0x15b/0x270
 kernel_init_freeable+0x2d8/0x3d0
 kernel_init+0x14/0x190
 ret_from_fork+0x24/0x30
================================================================================

Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index 6c66d2979795f..16bd585365a85 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -1623,7 +1623,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
 
 	cmd->checksum_disabled = 1;
 	cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
-	cmd->bitmask = (1 << cmd->max_reg_cmds) - 1;
+	cmd->bitmask = (1UL << cmd->max_reg_cmds) - 1;
 
 	cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
 	if (cmd->cmdif_rev > CMD_IF_REV) {

From ace55244b2872435a00f5fcc566c447e73a49340 Mon Sep 17 00:00:00 2001
From: Karthikeyan Periyasamy <periyasa@codeaurora.org>
Date: Mon, 12 Mar 2018 17:09:40 +0530
Subject: [PATCH 0395/1852] ath10k: Fix kernel panic while using worker
 (ath10k_sta_rc_update_wk)

[ Upstream commit 8b2d93dd22615cb7f3046a5a2083a6f8bb8052ed ]

When attempt to run worker (ath10k_sta_rc_update_wk) after the station object
(ieee80211_sta) delete will trigger the kernel panic.

This problem arise in AP + Mesh configuration, Where the current node AP VAP
and neighbor node mesh VAP MAC address are same. When the current mesh node
try to establish the mesh link with neighbor node, driver peer creation for
the neighbor mesh node fails due to duplication MAC address. Already the AP
VAP created with same MAC address.

It is caused by the following scenario steps.

Steps:
1. In above condition, ath10k driver sta_state callback (ath10k_sta_state)
   fails to do the state change for a station from IEEE80211_STA_NOTEXIST
   to IEEE80211_STA_NONE due to peer creation fails. Sta_state callback is
   called from ieee80211_add_station() to handle the new station
   (neighbor mesh node) request from the wpa_supplicant.
2. Concurrently ath10k receive the sta_rc_update callback notification from
   the mesh_neighbour_update() to handle the beacon frames of the above
   neighbor mesh node. since its atomic callback, ath10k driver queue the
   work (ath10k_sta_rc_update_wk) to handle rc update.
3. Due to driver sta_state callback fails (step 1), mac80211 free the station
   object.
4. When the worker (ath10k_sta_rc_update_wk) scheduled to run, it will access
   the station object which is already deleted. so it will trigger kernel
   panic.

Added the peer exist check in sta_rc_update callback before queue the work.

Kernel Panic log:

Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = c0204000
[00000000] *pgd=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
CPU: 1 PID: 1833 Comm: kworker/u4:2 Not tainted 3.14.77 #1
task: dcef0000 ti: d72b6000 task.ti: d72b6000
PC is at pwq_activate_delayed_work+0x10/0x40
LR is at pwq_activate_delayed_work+0xc/0x40
pc : [<c023f988>]    lr : [<c023f984>]    psr: 40000193
sp : d72b7f18  ip : 0000007a  fp : d72b6000
r10: 00000000  r9 : dd404414  r8 : d8c31998
r7 : d72b6038  r6 : 00000004  r5 : d4907ec8  r4 : dcee1300
r3 : ffffffe0  r2 : 00000000  r1 : 00000001  r0 : 00000000
Flags: nZcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c5787d  Table: 595bc06a  DAC: 00000015
...
Process kworker/u4:2 (pid: 1833, stack limit = 0xd72b6238)
Stack: (0xd72b7f18 to 0xd72b8000)
7f00:                                                       00000001 dcee1300
7f20: 00000001 c02410dc d8c31980 dd404400 dd404400 c0242790 d8c31980 00000089
7f40: 00000000 d93e1340 00000000 d8c31980 c0242568 00000000 00000000 00000000
7f60: 00000000 c02474dc 00000000 00000000 000000f8 d8c31980 00000000 00000000
7f80: d72b7f80 d72b7f80 00000000 00000000 d72b7f90 d72b7f90 d72b7fac d93e1340
7fa0: c0247404 00000000 00000000 c0208d20 00000000 00000000 00000000 00000000
7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
7fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
[<c023f988>] (pwq_activate_delayed_work) from [<c02410dc>] (pwq_dec_nr_in_flight+0x58/0xc4)
[<c02410dc>] (pwq_dec_nr_in_flight) from [<c0242790>] (worker_thread+0x228/0x360)
[<c0242790>] (worker_thread) from [<c02474dc>] (kthread+0xd8/0xec)
[<c02474dc>] (kthread) from [<c0208d20>] (ret_from_fork+0x14/0x34)
Code: e92d4038 e1a05000 ebffffbc[69210.619376] SMP: failed to stop secondary CPUs
Rebooting in 3 seconds..

Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/ath10k/mac.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c
index 0c8efdff48436..916b9b12edd20 100644
--- a/drivers/net/wireless/ath/ath10k/mac.c
+++ b/drivers/net/wireless/ath/ath10k/mac.c
@@ -6311,10 +6311,20 @@ static void ath10k_sta_rc_update(struct ieee80211_hw *hw,
 {
 	struct ath10k *ar = hw->priv;
 	struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
+	struct ath10k_vif *arvif = (void *)vif->drv_priv;
+	struct ath10k_peer *peer;
 	u32 bw, smps;
 
 	spin_lock_bh(&ar->data_lock);
 
+	peer = ath10k_peer_find(ar, arvif->vdev_id, sta->addr);
+	if (!peer) {
+		spin_unlock_bh(&ar->data_lock);
+		ath10k_warn(ar, "mac sta rc update failed to find peer %pM on vdev %i\n",
+			    sta->addr, arvif->vdev_id);
+		return;
+	}
+
 	ath10k_dbg(ar, ATH10K_DBG_MAC,
 		   "mac sta rc update for %pM changed %08x bw %d nss %d smps %d\n",
 		   sta->addr, changed, sta->bandwidth, sta->rx_nss,

From 8542a8e0c56688b6e7d42923c30af8a54c961b14 Mon Sep 17 00:00:00 2001
From: Jiandi An <anjiandi@codeaurora.org>
Date: Tue, 6 Mar 2018 23:26:26 -0600
Subject: [PATCH 0396/1852] ima: Fix Kconfig to select TPM 2.0 CRB interface

[ Upstream commit fac37c628fd5d68fd7298d9b57ae8601ee1b4723 ]

TPM_CRB driver provides TPM CRB 2.0 support.  If it is built as a
module, the TPM chip is registered after IMA init.  tpm_pcr_read() in
IMA fails and displays the following message even though eventually
there is a TPM chip on the system.

ima: No TPM chip found, activating TPM-bypass! (rc=-19)

Fix IMA Kconfig to select TPM_CRB so TPM_CRB driver is built in the kernel
and initializes before IMA.

Signed-off-by: Jiandi An <anjiandi@codeaurora.org>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 security/integrity/ima/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/security/integrity/ima/Kconfig b/security/integrity/ima/Kconfig
index df303346029ba..648a0461f8ed1 100644
--- a/security/integrity/ima/Kconfig
+++ b/security/integrity/ima/Kconfig
@@ -10,6 +10,7 @@ config IMA
 	select CRYPTO_HASH_INFO
 	select TCG_TPM if HAS_IOMEM && !UML
 	select TCG_TIS if TCG_TPM && X86
+	select TCG_CRB if TCG_TPM && ACPI
 	select TCG_IBMVTPM if TCG_TPM && PPC_PSERIES
 	help
 	  The Trusted Computing Group(TCG) runtime Integrity

From 89e441693ce0e7529cb4f4a90b962a3b0a2568d9 Mon Sep 17 00:00:00 2001
From: Petr Vorel <pvorel@suse.cz>
Date: Fri, 23 Mar 2018 14:41:08 +0100
Subject: [PATCH 0397/1852] ima: Fallback to the builtin hash algorithm

[ Upstream commit ab60368ab6a452466885ef4edf0cefd089465132 ]

IMA requires having it's hash algorithm be compiled-in due to it's
early use.  The default IMA algorithm is protected by Kconfig to be
compiled-in.

The ima_hash kernel parameter allows to choose the hash algorithm. When
the specified algorithm is not available or available as a module, IMA
initialization fails, which leads to a kernel panic (mknodat syscall calls
ima_post_path_mknod()).  Therefore as fallback we force IMA to use
the default builtin Kconfig hash algorithm.

Fixed crash:

$ grep CONFIG_CRYPTO_MD4 .config
CONFIG_CRYPTO_MD4=m

[    0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.12.14-2.3-default root=UUID=74ae8202-9ca7-4e39-813b-22287ec52f7a video=1024x768-16 plymouth.ignore-serial-consoles console=ttyS0 console=tty resume=/dev/disk/by-path/pci-0000:00:07.0-part3 splash=silent showopts ima_hash=md4
...
[    1.545190] ima: Can not allocate md4 (reason: -2)
...
[    2.610120] BUG: unable to handle kernel NULL pointer dereference at           (null)
[    2.611903] IP: ima_match_policy+0x23/0x390
[    2.612967] PGD 0 P4D 0
[    2.613080] Oops: 0000 [#1] SMP
[    2.613080] Modules linked in: autofs4
[    2.613080] Supported: Yes
[    2.613080] CPU: 0 PID: 1 Comm: systemd Not tainted 4.12.14-2.3-default #1
[    2.613080] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.0.0-prebuilt.qemu-project.org 04/01/2014
[    2.613080] task: ffff88003e2d0040 task.stack: ffffc90000190000
[    2.613080] RIP: 0010:ima_match_policy+0x23/0x390
[    2.613080] RSP: 0018:ffffc90000193e88 EFLAGS: 00010296
[    2.613080] RAX: 0000000000000000 RBX: 000000000000000c RCX: 0000000000000004
[    2.613080] RDX: 0000000000000010 RSI: 0000000000000001 RDI: ffff880037071728
[    2.613080] RBP: 0000000000008000 R08: 0000000000000000 R09: 0000000000000000
[    2.613080] R10: 0000000000000008 R11: 61c8864680b583eb R12: 00005580ff10086f
[    2.613080] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000008000
[    2.613080] FS:  00007f5c1da08940(0000) GS:ffff88003fc00000(0000) knlGS:0000000000000000
[    2.613080] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    2.613080] CR2: 0000000000000000 CR3: 0000000037002000 CR4: 00000000003406f0
[    2.613080] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[    2.613080] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
[    2.613080] Call Trace:
[    2.613080]  ? shmem_mknod+0xbf/0xd0
[    2.613080]  ima_post_path_mknod+0x1c/0x40
[    2.613080]  SyS_mknod+0x210/0x220
[    2.613080]  entry_SYSCALL_64_fastpath+0x1a/0xa5
[    2.613080] RIP: 0033:0x7f5c1bfde570
[    2.613080] RSP: 002b:00007ffde1c90dc8 EFLAGS: 00000246 ORIG_RAX: 0000000000000085
[    2.613080] RAX: ffffffffffffffda RBX: 0000000000000000 RCX: 00007f5c1bfde570
[    2.613080] RDX: 0000000000000000 RSI: 0000000000008000 RDI: 00005580ff10086f
[    2.613080] RBP: 00007ffde1c91040 R08: 00005580ff10086f R09: 0000000000000000
[    2.613080] R10: 0000000000104000 R11: 0000000000000246 R12: 00005580ffb99660
[    2.613080] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000002
[    2.613080] Code: 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 41 57 41 56 44 8d 14 09 41 55 41 54 55 53 44 89 d3 09 cb 48 83 ec 38 48 8b 05 c5 03 29 01 <4c> 8b 20 4c 39 e0 0f 84 d7 01 00 00 4c 89 44 24 08 89 54 24 20
[    2.613080] RIP: ima_match_policy+0x23/0x390 RSP: ffffc90000193e88
[    2.613080] CR2: 0000000000000000
[    2.613080] ---[ end trace 9a9f0a8a73079f6a ]---
[    2.673052] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000009
[    2.673052]
[    2.675337] Kernel Offset: disabled
[    2.676405] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000009

Signed-off-by: Petr Vorel <pvorel@suse.cz>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 security/integrity/ima/ima_crypto.c |  2 ++
 security/integrity/ima/ima_main.c   | 13 +++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/security/integrity/ima/ima_crypto.c b/security/integrity/ima/ima_crypto.c
index 6eb62936c6723..a29209fa56746 100644
--- a/security/integrity/ima/ima_crypto.c
+++ b/security/integrity/ima/ima_crypto.c
@@ -78,6 +78,8 @@ int __init ima_init_crypto(void)
 		       hash_algo_name[ima_hash_algo], rc);
 		return rc;
 	}
+	pr_info("Allocated hash algorithm: %s\n",
+		hash_algo_name[ima_hash_algo]);
 	return 0;
 }
 
diff --git a/security/integrity/ima/ima_main.c b/security/integrity/ima/ima_main.c
index 98289ba2a2e67..236dce30e5175 100644
--- a/security/integrity/ima/ima_main.c
+++ b/security/integrity/ima/ima_main.c
@@ -16,6 +16,9 @@
  *	implements the IMA hooks: ima_bprm_check, ima_file_mmap,
  *	and ima_file_check.
  */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/module.h>
 #include <linux/file.h>
 #include <linux/binfmts.h>
@@ -353,6 +356,16 @@ static int __init init_ima(void)
 
 	hash_setup(CONFIG_IMA_DEFAULT_HASH);
 	error = ima_init();
+
+	if (error && strcmp(hash_algo_name[ima_hash_algo],
+			    CONFIG_IMA_DEFAULT_HASH) != 0) {
+		pr_info("Allocating %s failed, going to use default hash algorithm %s\n",
+			hash_algo_name[ima_hash_algo], CONFIG_IMA_DEFAULT_HASH);
+		hash_setup_done = 0;
+		hash_setup(CONFIG_IMA_DEFAULT_HASH);
+		error = ima_init();
+	}
+
 	if (!error) {
 		ima_initialized = 1;
 		ima_update_policy_flag();

From a1745439ed1a4ad94cf887a0616f62406ffa77b0 Mon Sep 17 00:00:00 2001
From: Jay Vosburgh <jay.vosburgh@canonical.com>
Date: Thu, 22 Mar 2018 14:42:41 +0000
Subject: [PATCH 0398/1852] virtio-net: Fix operstate for virtio when no
 VIRTIO_NET_F_STATUS

[ Upstream commit bda7fab54828bbef2164bb23c0f6b1a7d05cc718 ]

The operstate update logic will leave an interface in the
default UNKNOWN operstate if the interface carrier state never changes
from the default carrier up state set at creation.  This includes the
case of an explicit call to netif_carrier_on, as the carrier on to on
transition has no effect on operstate.

	This affects virtio-net for the case that the virtio peer does
not support VIRTIO_NET_F_STATUS (the feature that provides carrier state
updates).  Without this feature, the virtio specification states that
"the link should be assumed active," so, logically, the operstate should
be UP instead of UNKNOWN.  This has impact on user space applications
that use the operstate to make availability decisions for the interface.

	Resolve this by changing the virtio probe logic slightly to call
netif_carrier_off for both the "with" and "without" VIRTIO_NET_F_STATUS
cases, and then the existing call to netif_carrier_on for the "without"
case will cause an operstate transition.

Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jay Vosburgh <jay.vosburgh@canonical.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/virtio_net.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index d012852502041..2759d386ade79 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -1912,8 +1912,8 @@ static int virtnet_probe(struct virtio_device *vdev)
 
 	/* Assume link up if device can't report link status,
 	   otherwise get link status from config. */
+	netif_carrier_off(dev);
 	if (virtio_has_feature(vi->vdev, VIRTIO_NET_F_STATUS)) {
-		netif_carrier_off(dev);
 		schedule_work(&vi->config_work);
 	} else {
 		vi->status = VIRTIO_NET_S_LINK_UP;

From e355851e9f77dbf8adb275e804c2655fbd0653b8 Mon Sep 17 00:00:00 2001
From: Philipp Puschmann <pp@emlix.com>
Date: Fri, 23 Mar 2018 10:22:15 +0100
Subject: [PATCH 0399/1852] arm: dts: socfpga: fix GIC PPI warning

[ Upstream commit 6d97d5aba08b26108f95dc9fb7bbe4d9436c769c ]

Fixes the warning "GIC: PPI13 is secure or misconfigured" by
changing the interrupt type from level_low to edge_raising

Signed-off-by: Philipp Puschmann <pp@emlix.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/socfpga.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 39c470e291f96..69381deeb7036 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -738,7 +738,7 @@
 		timer@fffec600 {
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0xfffec600 0x100>;
-			interrupts = <1 13 0xf04>;
+			interrupts = <1 13 0xf01>;
 			clocks = <&mpu_periph_clk>;
 		};
 

From 8b880069cb25b75d656599b97b52572b30bb8c03 Mon Sep 17 00:00:00 2001
From: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Date: Fri, 16 Mar 2018 15:33:54 -0700
Subject: [PATCH 0400/1852] usb: dwc3: Update DWC_usb31 GTXFIFOSIZ reg fields

[ Upstream commit 0cab8d26d6e5e053b2bed3356992aaa71dc93628 ]

Update two GTXFIFOSIZ bit fields for the DWC_usb31 controller. TXFDEP
is a 15-bit value instead of 16-bit value, and bit 15 is TXFRAMNUM.

The GTXFIFOSIZ register for DWC_usb31 is as follows:
 +-------+-----------+----------------------------------+
 | BITS  | Name      | Description                      |
 +=======+===========+==================================+
 | 31:16 | TXFSTADDR | Transmit FIFOn RAM Start Address |
 | 15    | TXFRAMNUM | Asynchronous/Periodic TXFIFO     |
 | 14:0  | TXFDEP    | TXFIFO Depth                     |
 +-------+-----------+----------------------------------+

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/dwc3/core.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index aca4cf60b88fa..73176a6e2d8f1 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -238,6 +238,8 @@
 #define DWC3_GUSB3PIPECTL_TX_DEEPH(n)	((n) << 1)
 
 /* Global TX Fifo Size Register */
+#define DWC31_GTXFIFOSIZ_TXFRAMNUM	BIT(15)		/* DWC_usb31 only */
+#define DWC31_GTXFIFOSIZ_TXFDEF(n)	((n) & 0x7fff)	/* DWC_usb31 only */
 #define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
 #define DWC3_GTXFIFOSIZ_TXFSTADDR(n)	((n) & 0xffff0000)
 

From c9284b795b0eaf6693e8e94bd6384a255e1624c4 Mon Sep 17 00:00:00 2001
From: Chunyu Hu <chuhu@redhat.com>
Date: Mon, 5 Mar 2018 13:40:38 +0800
Subject: [PATCH 0401/1852] cpufreq: cppc_cpufreq: Fix cppc_cpufreq_init()
 failure path

[ Upstream commit 55b55abc17f238c61921360e61dde90dd9a326d1 ]

Kmemleak reported the below leak. When cppc_cpufreq_init went into
failure path, the cpu mask is not freed. After fix, this report is
gone. And to avaoid potential NULL pointer reference, check the cpu
value first.

unreferenced object 0xffff800fd5ea4880 (size 128):
  comm "swapper/0", pid 1, jiffies 4294939510 (age 668.680s)
  hex dump (first 32 bytes):
    00 00 00 00 20 00 00 00 00 00 00 00 00 00 00 00  .... ...........
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [<ffff0000082c4ae4>] __kmalloc_node+0x278/0x634
    [<ffff0000088f4a74>] alloc_cpumask_var_node+0x28/0x60
    [<ffff0000088f4af0>] zalloc_cpumask_var+0x14/0x1c
    [<ffff000008d20254>] cppc_cpufreq_init+0xd0/0x19c
    [<ffff000008083828>] do_one_initcall+0xec/0x15c
    [<ffff000008cd1018>] kernel_init_freeable+0x1f4/0x2a4
    [<ffff0000089099b0>] kernel_init+0x18/0x10c
    [<ffff000008084d50>] ret_from_fork+0x10/0x18
    [<ffffffffffffffff>] 0xffffffffffffffff

Signed-off-by: Chunyu Hu <chuhu@redhat.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpufreq/cppc_cpufreq.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 0c797a4c22d34..0dcbf951ad1b6 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -176,8 +176,13 @@ static int __init cppc_cpufreq_init(void)
 	return ret;
 
 out:
-	for_each_possible_cpu(i)
-		kfree(all_cpu_data[i]);
+	for_each_possible_cpu(i) {
+		cpu = all_cpu_data[i];
+		if (!cpu)
+			break;
+		free_cpumask_var(cpu->shared_cpu_map);
+		kfree(cpu);
+	}
 
 	kfree(all_cpu_data);
 	return -ENODEV;

From 2f7b1f936995277e1e6476f51438eac8cbcb81d6 Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Wed, 14 Mar 2018 08:28:31 +0800
Subject: [PATCH 0402/1852] clk: Don't show the incorrect clock phase

[ Upstream commit 1f9c63e8de3d7b377c9d74e4a17524cfb60e6384 ]

It's found that the clock phase output from clk_summary is
wrong compared to the actual phase reading from the register.

cat /sys/kernel/debug/clk/clk_summary | grep sdio_sample
sdio_sample     0        1        0 50000000          0 -22

It exposes an issue that clk core, clk_core_get_phase, always
returns the cached core->phase which should be either updated
by calling clk_set_phase or directly from the first place the
clk was registered.

When registering the clk, the core->phase geting from ->get_phase()
may return negative value indicating error. This is quite common
since the clk's phase may be highly related to its parent chain,
but it was temporarily orphan when registered, since its parent
chains hadn't be ready at that time, so the clk drivers decide to
return error in this case. However, if no clk_set_phase is called or
maybe the ->set_phase() isn't even implemented, the core->phase would
never be updated. This is wrong, and we should try to update it when
all its parent chains are settled down, like the way of updating clock
rate for that. But it's not deserved to complicate the code now and
just update it anyway when calling clk_core_get_phase, which would be
much simple and enough.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index c836505e9d8eb..f674703bdf86c 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1945,7 +1945,7 @@ static int clk_core_get_phase(struct clk_core *core)
 	int ret;
 
 	clk_prepare_lock();
-	/* Always try to update cached phase if possible since */
+	/* Always try to update cached phase if possible */
 	if (core->ops->get_phase)
 		core->phase = core->ops->get_phase(core->hw);
 	ret = core->phase;

From 8ac9a97ddcb1dda36a3ce86830fd512d158e7fe2 Mon Sep 17 00:00:00 2001
From: Michael Schmitz <schmitzmic@gmail.com>
Date: Sat, 3 Mar 2018 12:04:13 +1300
Subject: [PATCH 0403/1852] zorro: Set up z->dev.dma_mask for the DMA API

[ Upstream commit 55496d3fe2acd1a365c43cbd613a20ecd4d74395 ]

The generic DMA API uses dev->dma_mask to check the DMA addressable
memory bitmask, and warns if no mask is set or even allocated.

Set z->dev.dma_coherent_mask on Zorro bus scan, and make z->dev.dma_mask
to point to z->dev.dma_coherent_mask so device drivers that need DMA have
everything set up to avoid warnings from dma_alloc_coherent(). Drivers can
still use dma_set_mask_and_coherent() to explicitly set their DMA bit mask.

Signed-off-by: Michael Schmitz <schmitzmic@gmail.com>
[geert: Handle Zorro II with 24-bit address space]
Acked-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/zorro/zorro.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/zorro/zorro.c b/drivers/zorro/zorro.c
index d295d9878dff7..8ec79385d3cc4 100644
--- a/drivers/zorro/zorro.c
+++ b/drivers/zorro/zorro.c
@@ -16,6 +16,7 @@
 #include <linux/bitops.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
 #include <linux/slab.h>
 
 #include <asm/byteorder.h>
@@ -185,6 +186,17 @@ static int __init amiga_zorro_probe(struct platform_device *pdev)
 		z->dev.parent = &bus->dev;
 		z->dev.bus = &zorro_bus_type;
 		z->dev.id = i;
+		switch (z->rom.er_Type & ERT_TYPEMASK) {
+		case ERT_ZORROIII:
+			z->dev.coherent_dma_mask = DMA_BIT_MASK(32);
+			break;
+
+		case ERT_ZORROII:
+		default:
+			z->dev.coherent_dma_mask = DMA_BIT_MASK(24);
+			break;
+		}
+		z->dev.dma_mask = &z->dev.coherent_dma_mask;
 	}
 
 	/* ... then register them */

From 5ed00f14878c83af0625a13265dbc4d8ba405bd9 Mon Sep 17 00:00:00 2001
From: Coly Li <colyli@suse.de>
Date: Sun, 18 Mar 2018 17:36:15 -0700
Subject: [PATCH 0404/1852] bcache: quit dc->writeback_thread when
 BCACHE_DEV_DETACHING is set

[ Upstream commit fadd94e05c02afec7b70b0b14915624f1782f578 ]

In patch "bcache: fix cached_dev->count usage for bch_cache_set_error()",
cached_dev_get() is called when creating dc->writeback_thread, and
cached_dev_put() is called when exiting dc->writeback_thread. This
modification works well unless people detach the bcache device manually by
    'echo 1 > /sys/block/bcache<N>/bcache/detach'
Because this sysfs interface only calls bch_cached_dev_detach() which wakes
up dc->writeback_thread but does not stop it. The reason is, before patch
"bcache: fix cached_dev->count usage for bch_cache_set_error()", inside
bch_writeback_thread(), if cache is not dirty after writeback,
cached_dev_put() will be called here. And in cached_dev_make_request() when
a new write request makes cache from clean to dirty, cached_dev_get() will
be called there. Since we don't operate dc->count in these locations,
refcount d->count cannot be dropped after cache becomes clean, and
cached_dev_detach_finish() won't be called to detach bcache device.

This patch fixes the issue by checking whether BCACHE_DEV_DETACHING is
set inside bch_writeback_thread(). If this bit is set and cache is clean
(no existing writeback_keys), break the while-loop, call cached_dev_put()
and quit the writeback thread.

Please note if cache is still dirty, even BCACHE_DEV_DETACHING is set the
writeback thread should continue to perform writeback, this is the original
design of manually detach.

It is safe to do the following check without locking, let me explain why,
+	if (!test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) &&
+	    (!atomic_read(&dc->has_dirty) || !dc->writeback_running)) {

If the kenrel thread does not sleep and continue to run due to conditions
are not updated in time on the running CPU core, it just consumes more CPU
cycles and has no hurt. This should-sleep-but-run is safe here. We just
focus on the should-run-but-sleep condition, which means the writeback
thread goes to sleep in mistake while it should continue to run.
1, First of all, no matter the writeback thread is hung or not,
   kthread_stop() from cached_dev_detach_finish() will wake up it and
   terminate by making kthread_should_stop() return true. And in normal
   run time, bit on index BCACHE_DEV_DETACHING is always cleared, the
   condition
	!test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags)
   is always true and can be ignored as constant value.
2, If one of the following conditions is true, the writeback thread should
   go to sleep,
   "!atomic_read(&dc->has_dirty)" or "!dc->writeback_running)"
   each of them independently controls the writeback thread should sleep or
   not, let's analyse them one by one.
2.1 condition "!atomic_read(&dc->has_dirty)"
   If dc->has_dirty is set from 0 to 1 on another CPU core, bcache will
   call bch_writeback_queue() immediately or call bch_writeback_add() which
   indirectly calls bch_writeback_queue() too. In bch_writeback_queue(),
   wake_up_process(dc->writeback_thread) is called. It sets writeback
   thread's task state to TASK_RUNNING and following an implicit memory
   barrier, then tries to wake up the writeback thread.
   In writeback thread, its task state is set to TASK_INTERRUPTIBLE before
   doing the condition check. If other CPU core sets the TASK_RUNNING state
   after writeback thread setting TASK_INTERRUPTIBLE, the writeback thread
   will be scheduled to run very soon because its state is not
   TASK_INTERRUPTIBLE. If other CPU core sets the TASK_RUNNING state before
   writeback thread setting TASK_INTERRUPTIBLE, the implict memory barrier
   of wake_up_process() will make sure modification of dc->has_dirty on
   other CPU core is updated and observed on the CPU core of writeback
   thread. Therefore the condition check will correctly be false, and
   continue writeback code without sleeping.
2.2 condition "!dc->writeback_running)"
   dc->writeback_running can be changed via sysfs file, every time it is
   modified, a following bch_writeback_queue() is alwasy called. So the
   change is always observed on the CPU core of writeback thread. If
   dc->writeback_running is changed from 0 to 1 on other CPU core, this
   condition check will observe the modification and allow writeback
   thread to continue to run without sleeping.
Now we can see, even without a locking protection, multiple conditions
check is safe here, no deadlock or process hang up will happen.

I compose a separte patch because that patch "bcache: fix cached_dev->count
usage for bch_cache_set_error()" already gets a "Reviewed-by:" from Hannes
Reinecke. Also this fix is not trivial and good for a separate patch.

Signed-off-by: Coly Li <colyli@suse.de>
Reviewed-by: Michael Lyle <mlyle@lyle.org>
Cc: Hannes Reinecke <hare@suse.com>
Cc: Huijun Tang <tang.junhui@zte.com.cn>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/bcache/writeback.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/md/bcache/writeback.c b/drivers/md/bcache/writeback.c
index 4639270bf99bc..f2c0000de6137 100644
--- a/drivers/md/bcache/writeback.c
+++ b/drivers/md/bcache/writeback.c
@@ -426,9 +426,15 @@ static int bch_writeback_thread(void *arg)
 	while (!kthread_should_stop()) {
 		down_write(&dc->writeback_lock);
 		set_current_state(TASK_INTERRUPTIBLE);
-		if (!atomic_read(&dc->has_dirty) ||
-		    (!test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) &&
-		     !dc->writeback_running)) {
+		/*
+		 * If the bache device is detaching, skip here and continue
+		 * to perform writeback. Otherwise, if no dirty data on cache,
+		 * or there is dirty data on cache but writeback is disabled,
+		 * the writeback thread should sleep here and wait for others
+		 * to wake up it.
+		 */
+		if (!test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) &&
+		    (!atomic_read(&dc->has_dirty) || !dc->writeback_running)) {
 			up_write(&dc->writeback_lock);
 
 			if (kthread_should_stop()) {
@@ -450,6 +456,14 @@ static int bch_writeback_thread(void *arg)
 			cached_dev_put(dc);
 			SET_BDEV_STATE(&dc->sb, BDEV_STATE_CLEAN);
 			bch_write_bdev_super(dc, NULL);
+			/*
+			 * If bcache device is detaching via sysfs interface,
+			 * writeback thread should stop after there is no dirty
+			 * data on cache. BCACHE_DEV_DETACHING flag is set in
+			 * bch_cached_dev_detach().
+			 */
+			if (test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags))
+				break;
 		}
 
 		up_write(&dc->writeback_lock);

From f3b4664b187d640b1c3f4635926f7e0a5201a9ba Mon Sep 17 00:00:00 2001
From: Erik Schmauss <erik.schmauss@intel.com>
Date: Wed, 14 Mar 2018 16:13:08 -0700
Subject: [PATCH 0405/1852] ACPICA: Events: add a return on failure from
 acpi_hw_register_read

[ Upstream commit b4c0de312613ca676db5bd7e696a44b56795612a ]

This ensures that acpi_ev_fixed_event_detect() does not use fixed_status
and and fixed_enable as uninitialized variables.

Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/acpica/evevent.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c
index bf6873f95e722..0b5eedb60d04f 100644
--- a/drivers/acpi/acpica/evevent.c
+++ b/drivers/acpi/acpica/evevent.c
@@ -204,6 +204,7 @@ u32 acpi_ev_fixed_event_detect(void)
 	u32 fixed_status;
 	u32 fixed_enable;
 	u32 i;
+	acpi_status status;
 
 	ACPI_FUNCTION_NAME(ev_fixed_event_detect);
 
@@ -211,8 +212,12 @@ u32 acpi_ev_fixed_event_detect(void)
 	 * Read the fixed feature status and enable registers, as all the cases
 	 * depend on their values. Ignore errors here.
 	 */
-	(void)acpi_hw_register_read(ACPI_REGISTER_PM1_STATUS, &fixed_status);
-	(void)acpi_hw_register_read(ACPI_REGISTER_PM1_ENABLE, &fixed_enable);
+	status = acpi_hw_register_read(ACPI_REGISTER_PM1_STATUS, &fixed_status);
+	status |=
+	    acpi_hw_register_read(ACPI_REGISTER_PM1_ENABLE, &fixed_enable);
+	if (ACPI_FAILURE(status)) {
+		return (int_status);
+	}
 
 	ACPI_DEBUG_PRINT((ACPI_DB_INTERRUPTS,
 			  "Fixed Event Block: Enable %08X Status %08X\n",

From 89c74d67bbbdd10749333ce45d162dde6b309161 Mon Sep 17 00:00:00 2001
From: Seunghun Han <kkamagui@gmail.com>
Date: Wed, 14 Mar 2018 16:12:56 -0700
Subject: [PATCH 0406/1852] ACPICA: acpi: acpica: fix acpi operand cache leak
 in nseval.c

[ Upstream commit 97f3c0a4b0579b646b6b10ae5a3d59f0441cc12c ]

I found an ACPI cache leak in ACPI early termination and boot continuing case.

When early termination occurs due to malicious ACPI table, Linux kernel
terminates ACPI function and continues to boot process. While kernel terminates
ACPI function, kmem_cache_destroy() reports Acpi-Operand cache leak.

Boot log of ACPI operand cache leak is as follows:
>[    0.464168] ACPI: Added _OSI(Module Device)
>[    0.467022] ACPI: Added _OSI(Processor Device)
>[    0.469376] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.471647] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.477997] ACPI Error: Null stack entry at ffff880215c0aad8 (20170303/exresop-174)
>[    0.482706] ACPI Exception: AE_AML_INTERNAL, While resolving operands for [opcode_name unavailable] (20170303/dswexec-461)
>[    0.487503] ACPI Error: Method parse/execution failed [\DBG] (Node ffff88021710ab40), AE_AML_INTERNAL (20170303/psparse-543)
>[    0.492136] ACPI Error: Method parse/execution failed [\_SB._INI] (Node ffff88021710a618), AE_AML_INTERNAL (20170303/psparse-543)
>[    0.497683] ACPI: Interpreter enabled
>[    0.499385] ACPI: (supports S0)
>[    0.501151] ACPI: Using IOAPIC for interrupt routing
>[    0.503342] ACPI Error: Null stack entry at ffff880215c0aad8 (20170303/exresop-174)
>[    0.506522] ACPI Exception: AE_AML_INTERNAL, While resolving operands for [opcode_name unavailable] (20170303/dswexec-461)
>[    0.510463] ACPI Error: Method parse/execution failed [\DBG] (Node ffff88021710ab40), AE_AML_INTERNAL (20170303/psparse-543)
>[    0.514477] ACPI Error: Method parse/execution failed [\_PIC] (Node ffff88021710ab18), AE_AML_INTERNAL (20170303/psparse-543)
>[    0.518867] ACPI Exception: AE_AML_INTERNAL, Evaluating _PIC (20170303/bus-991)
>[    0.522384] kmem_cache_destroy Acpi-Operand: Slab cache still has objects
>[    0.524597] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.12.0-rc5 #26
>[    0.526795] Hardware name: innotek gmb_h virtual_box/virtual_box, BIOS virtual_box 12/01/2006
>[    0.529668] Call Trace:
>[    0.530811]  ? dump_stack+0x5c/0x81
>[    0.532240]  ? kmem_cache_destroy+0x1aa/0x1c0
>[    0.533905]  ? acpi_os_delete_cache+0xa/0x10
>[    0.535497]  ? acpi_ut_delete_caches+0x3f/0x7b
>[    0.537237]  ? acpi_terminate+0xa/0x14
>[    0.538701]  ? acpi_init+0x2af/0x34f
>[    0.540008]  ? acpi_sleep_proc_init+0x27/0x27
>[    0.541593]  ? do_one_initcall+0x4e/0x1a0
>[    0.543008]  ? kernel_init_freeable+0x19e/0x21f
>[    0.546202]  ? rest_init+0x80/0x80
>[    0.547513]  ? kernel_init+0xa/0x100
>[    0.548817]  ? ret_from_fork+0x25/0x30
>[    0.550587] vgaarb: loaded
>[    0.551716] EDAC MC: Ver: 3.0.0
>[    0.553744] PCI: Probing PCI hardware
>[    0.555038] PCI host bridge to bus 0000:00
> ... Continue to boot and log is omitted ...

I analyzed this memory leak in detail and found acpi_ns_evaluate() function
only removes Info->return_object in AE_CTRL_RETURN_VALUE case. But, when errors
occur, the status value is not AE_CTRL_RETURN_VALUE, and Info->return_object is
also not null. Therefore, this causes acpi operand memory leak.

This cache leak causes a security threat because an old kernel (<= 4.9) shows
memory locations of kernel functions in stack dump. Some malicious users
could use this information to neutralize kernel ASLR.

I made a patch to fix ACPI operand cache leak.

Signed-off-by: Seunghun Han <kkamagui@gmail.com>
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/acpica/nseval.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index 7eba578d36f36..10262cae8a19e 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -308,6 +308,14 @@ acpi_status acpi_ns_evaluate(struct acpi_evaluate_info *info)
 		/* Map AE_CTRL_RETURN_VALUE to AE_OK, we are done with it */
 
 		status = AE_OK;
+	} else if (ACPI_FAILURE(status)) {
+
+		/* If return_object exists, delete it */
+
+		if (info->return_object) {
+			acpi_ut_remove_reference(info->return_object);
+			info->return_object = NULL;
+		}
 	}
 
 	ACPI_DEBUG_PRINT((ACPI_DB_NAMES,

From 2d3c381048dd21b85e8e6533c9488c244a49b197 Mon Sep 17 00:00:00 2001
From: Gregory CLEMENT <gregory.clement@bootlin.com>
Date: Wed, 14 Mar 2018 18:03:40 +0100
Subject: [PATCH 0407/1852] i2c: mv64xxx: Apply errata delay only in standard
 mode

[ Upstream commit 31184d8c6ea49ea0676d100cdd7e1f102ad025b5 ]

The errata FE-8471889 description has been updated. There is still a
timing violation for repeated start. But the errata now states that it
was only the case for the Standard mode (100 kHz), in Fast mode (400 kHz)
there is no issue.

This patch limit the errata fix to the Standard mode.

It has been tesed successfully on the clearfog (Aramda 388 based board).

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-mv64xxx.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 43207f52e5a37..332d32c53c41a 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -856,12 +856,16 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
 	 */
 	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
 		drv_data->offload_enabled = true;
-		drv_data->errata_delay = true;
+		/* The delay is only needed in standard mode (100kHz) */
+		if (bus_freq <= 100000)
+			drv_data->errata_delay = true;
 	}
 
 	if (of_device_is_compatible(np, "marvell,mv78230-a0-i2c")) {
 		drv_data->offload_enabled = false;
-		drv_data->errata_delay = true;
+		/* The delay is only needed in standard mode (100kHz) */
+		if (bus_freq <= 100000)
+			drv_data->errata_delay = true;
 	}
 
 	if (of_device_is_compatible(np, "allwinner,sun6i-a31-i2c"))

From b21ea15dd6caa3c84b364a3ccd27491edd234654 Mon Sep 17 00:00:00 2001
From: Vitaly Kuznetsov <vkuznets@redhat.com>
Date: Fri, 9 Feb 2018 14:01:33 +0100
Subject: [PATCH 0408/1852] KVM: lapic: stop advertising DIRECTED_EOI when
 in-kernel IOAPIC is in use
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 0bcc3fb95b97ac2ca223a5a870287b37f56265ac ]

Devices which use level-triggered interrupts under Windows 2016 with
Hyper-V role enabled don't work: Windows disables EOI broadcast in SPIV
unconditionally. Our in-kernel IOAPIC implementation emulates an old IOAPIC
version which has no EOI register so EOI never happens.

The issue was discovered and discussed a while ago:
https://www.spinics.net/lists/kvm/msg148098.html

While this is a guest OS bug (it should check that IOAPIC has the required
capabilities before disabling EOI broadcast) we can workaround it in KVM:
advertising DIRECTED_EOI with in-kernel IOAPIC makes little sense anyway.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Radim Kr�mář <rkrcmar@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/lapic.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 1c96f09367ae2..a1afd80a68aac 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -288,8 +288,16 @@ void kvm_apic_set_version(struct kvm_vcpu *vcpu)
 	if (!kvm_vcpu_has_lapic(vcpu))
 		return;
 
+	/*
+	 * KVM emulates 82093AA datasheet (with in-kernel IOAPIC implementation)
+	 * which doesn't have EOI register; Some buggy OSes (e.g. Windows with
+	 * Hyper-V role) disable EOI broadcast in lapic not checking for IOAPIC
+	 * version first and level-triggered interrupts never get EOIed in
+	 * IOAPIC.
+	 */
 	feat = kvm_find_cpuid_entry(apic->vcpu, 0x1, 0);
-	if (feat && (feat->ecx & (1 << (X86_FEATURE_X2APIC & 31))))
+	if (feat && (feat->ecx & (1 << (X86_FEATURE_X2APIC & 31))) &&
+	    !ioapic_in_kernel(vcpu->kvm))
 		v |= APIC_LVR_DIRECTED_EOI;
 	apic_set_reg(apic, APIC_LVR, v);
 }

From cc34fc0362e1c1d3f007f5bbca34b47c89915ecb Mon Sep 17 00:00:00 2001
From: Mathias Nyman <mathias.nyman@linux.intel.com>
Date: Fri, 16 Mar 2018 16:33:01 +0200
Subject: [PATCH 0409/1852] xhci: zero usb device slot_id member when disabling
 and freeing a xhci slot

[ Upstream commit a400efe455f7b61ac9a801ac8d0d01f8c8d82dd5 ]

set udev->slot_id to zero when disabling and freeing the xhci slot.
Prevents usb core from calling xhci with a stale slot id.

xHC controller may be reset during resume to recover from some error.
All slots are unusable as they are disabled and freed.
xhci driver starts slot enumeration again from 1 in the order they are
enabled. In the worst case a stale udev->slot_id for one device matches
a newly enabled slot_id for a different device, causing us to
perform a action on the wrong device.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/host/xhci-mem.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index d9363713b7f1a..e4cf3322bcb34 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -960,6 +960,8 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
 	if (dev->out_ctx)
 		xhci_free_container_ctx(xhci, dev->out_ctx);
 
+	if (dev->udev && dev->udev->slot_id)
+		dev->udev->slot_id = 0;
 	kfree(xhci->devs[slot_id]);
 	xhci->devs[slot_id] = NULL;
 }

From feeab1c836d839b87000e7131a02b8481e7f2488 Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Thu, 11 May 2017 08:18:24 +0200
Subject: [PATCH 0410/1852] MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset

[ Upstream commit 05454c1bde91fb013c0431801001da82947e6b5a ]

According to the QCA u-boot source the "PCIE Phase Lock Loop
Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the
QCA955X and QCA956X at offset 0x10.

Since the PCIE PLL config register is only defined for the AR724x fix
only this value. The value is wrong since the day it was added and isn't
used by any driver yet.

Signed-off-by: Mathias Kresin <dev@kresin.me>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16048/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index aa3800c823321..d99ca862dae32 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -167,7 +167,7 @@
 #define AR71XX_AHB_DIV_MASK		0x7
 
 #define AR724X_PLL_REG_CPU_CONFIG	0x00
-#define AR724X_PLL_REG_PCIE_CONFIG	0x18
+#define AR724X_PLL_REG_PCIE_CONFIG	0x10
 
 #define AR724X_PLL_FB_SHIFT		0
 #define AR724X_PLL_FB_MASK		0x3ff

From 07736b2771d8a14ea694d5bef593876eb9284f89 Mon Sep 17 00:00:00 2001
From: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Date: Sat, 3 Mar 2018 10:53:24 +0100
Subject: [PATCH 0411/1852] PCI: Restore config space on runtime resume despite
 being unbound

[ Upstream commit 5775b843a619b3c93f946e2b55a208d9f0f48b59 ]

We leave PCI devices not bound to a driver in D0 during runtime suspend.
But they may have a parent which is bound and can be transitioned to
D3cold at runtime.  Once the parent goes to D3cold, the unbound child
may go to D3cold as well.  When the child goes to D3cold, its internal
state, including configuration of BARs, MSI, ASPM, MPS, etc., is lost.

One example are recent hybrid graphics laptops which cut power to the
discrete GPU when the root port above it goes to ACPI power state D3.
Users may provoke this by unbinding the GPU driver and allowing runtime
PM on the GPU via sysfs:  The PM core will then treat the GPU as
"suspended", which in turn allows the root port to runtime suspend,
causing the power resources listed in its _PR3 object to be powered off.
The GPU's BARs will be uninitialized when a driver later probes it.

Another example are hybrid graphics laptops where the GPU itself (rather
than the root port) is capable of runtime suspending to D3cold.  If the
GPU's integrated HDA controller is not bound and the GPU's driver
decides to runtime suspend to D3cold, the HDA controller's BARs will be
uninitialized when a driver later probes it.

Fix by saving and restoring config space over a runtime suspend cycle
even if the device is not bound.

Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Peter Wu <peter@lekensteyn.nl>              # Nvidia Optimus
Tested-by: Lukas Wunner <lukas@wunner.de>              # MacBook Pro
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
[lukas: add commit message, bikeshed code comments for clarity]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Link: https://patchwork.freedesktop.org/patch/msgid/92fb6e6ae2730915eb733c08e2f76c6a313e3860.1520068884.git.lukas@wunner.de
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/pci-driver.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 32bd8ab79d53f..dd9ebdc968c83 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1140,11 +1140,14 @@ static int pci_pm_runtime_suspend(struct device *dev)
 	int error;
 
 	/*
-	 * If pci_dev->driver is not set (unbound), the device should
-	 * always remain in D0 regardless of the runtime PM status
+	 * If pci_dev->driver is not set (unbound), we leave the device in D0,
+	 * but it may go to D3cold when the bridge above it runtime suspends.
+	 * Save its config space in case that happens.
 	 */
-	if (!pci_dev->driver)
+	if (!pci_dev->driver) {
+		pci_save_state(pci_dev);
 		return 0;
+	}
 
 	if (!pm || !pm->runtime_suspend)
 		return -ENOSYS;
@@ -1195,16 +1198,18 @@ static int pci_pm_runtime_resume(struct device *dev)
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
 
 	/*
-	 * If pci_dev->driver is not set (unbound), the device should
-	 * always remain in D0 regardless of the runtime PM status
+	 * Restoring config space is necessary even if the device is not bound
+	 * to a driver because although we left it in D0, it may have gone to
+	 * D3cold when the bridge above it runtime suspended.
 	 */
+	pci_restore_standard_config(pci_dev);
+
 	if (!pci_dev->driver)
 		return 0;
 
 	if (!pm || !pm->runtime_resume)
 		return -ENOSYS;
 
-	pci_restore_standard_config(pci_dev);
 	pci_fixup_device(pci_fixup_resume_early, pci_dev);
 	__pci_enable_wake(pci_dev, PCI_D0, true, false);
 	pci_fixup_device(pci_fixup_resume, pci_dev);

From e9477ddd8f6ac46bcb1ea5f13484508de614daf8 Mon Sep 17 00:00:00 2001
From: Kamlakant Patel <kamlakant.patel@cavium.com>
Date: Tue, 13 Mar 2018 16:32:27 +0530
Subject: [PATCH 0412/1852] ipmi_ssif: Fix kernel panic at msg_done_handler

[ Upstream commit f002612b9d86613bc6fde0a444e0095225f6053e ]

This happens when BMC doesn't return any data and the code is trying
to print the value of data[2].

Getting following crash:
[  484.728410] Unable to handle kernel NULL pointer dereference at virtual address 00000002
[  484.736496] pgd = ffff0000094a2000
[  484.739885] [00000002] *pgd=00000047fcffe003, *pud=00000047fcffd003, *pmd=0000000000000000
[  484.748158] Internal error: Oops: 96000005 [#1] SMP
[...]
[  485.101451] Call trace:
[...]
[  485.188473] [<ffff000000a46e68>] msg_done_handler+0x668/0x700 [ipmi_ssif]
[  485.195249] [<ffff000000a456b8>] ipmi_ssif_thread+0x110/0x128 [ipmi_ssif]
[  485.202038] [<ffff0000080f1430>] kthread+0x108/0x138
[  485.206994] [<ffff0000080838e0>] ret_from_fork+0x10/0x30
[  485.212294] Code: aa1903e1 aa1803e0 b900227f 95fef6a5 (39400aa3)

Adding a check to validate the data len before printing data[2] to fix this issue.

Signed-off-by: Kamlakant Patel <kamlakant.patel@cavium.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/ipmi/ipmi_ssif.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/char/ipmi/ipmi_ssif.c b/drivers/char/ipmi/ipmi_ssif.c
index 83c206f0fc985..d6d166fe49a3c 100644
--- a/drivers/char/ipmi/ipmi_ssif.c
+++ b/drivers/char/ipmi/ipmi_ssif.c
@@ -757,7 +757,7 @@ static void msg_done_handler(struct ssif_info *ssif_info, int result,
 			ssif_info->ssif_state = SSIF_NORMAL;
 			ipmi_ssif_unlock_cond(ssif_info, flags);
 			pr_warn(PFX "Error getting flags: %d %d, %x\n",
-			       result, len, data[2]);
+			       result, len, (len >= 3) ? data[2] : 0);
 		} else if (data[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2
 			   || data[1] != IPMI_GET_MSG_FLAGS_CMD) {
 			/*
@@ -779,7 +779,7 @@ static void msg_done_handler(struct ssif_info *ssif_info, int result,
 		if ((result < 0) || (len < 3) || (data[2] != 0)) {
 			/* Error clearing flags */
 			pr_warn(PFX "Error clearing flags: %d %d, %x\n",
-			       result, len, data[2]);
+			       result, len, (len >= 3) ? data[2] : 0);
 		} else if (data[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2
 			   || data[1] != IPMI_CLEAR_MSG_FLAGS_CMD) {
 			pr_warn(PFX "Invalid response clearing flags: %x %x\n",

From 553f62ece1e572ef2154205763569ff5315f895e Mon Sep 17 00:00:00 2001
From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
Date: Tue, 6 Feb 2018 19:07:38 +0400
Subject: [PATCH 0413/1852] usb: dwc2: Fix interval type issue

[ Upstream commit 12814a3f8f9b247531d7863170cc82b3fe4218fd ]

The maximum value that unsigned char can hold is 255, meanwhile
the maximum value of interval is  2^(bIntervalMax-1)=2^15.

Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/dwc2/core.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 5f35c0fca4d9f..98e2c7f2f2463 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -212,7 +212,7 @@ struct dwc2_hsotg_ep {
 	unsigned char           dir_in;
 	unsigned char           index;
 	unsigned char           mc;
-	unsigned char           interval;
+	u16                     interval;
 
 	unsigned int            halted:1;
 	unsigned int            periodic:1;

From d51a76bb8b001d2a4269866484915a5c76e2bd09 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Fri, 12 Jan 2018 11:26:16 +0100
Subject: [PATCH 0414/1852] usb: gadget: ffs: Let setup() return
 USB_GADGET_DELAYED_STATUS

[ Upstream commit 946ef68ad4e45aa048a5fb41ce8823ed29da866a ]

Some UDC drivers (like the DWC3) expect that the response to a setup()
request is queued from within the setup function itself so that it is
available as soon as setup() has completed.

Upon receiving a setup request the function fs driver creates an event that
is made available to userspace. And only once userspace has acknowledged
that event the response to the setup request is queued.

So it violates the requirement of those UDC drivers and random failures can
be observed. This is basically a race condition and if userspace is able to
read the event and queue the response fast enough all is good. But if it is
not, for example because other processes are currently scheduled to run,
the USB host that sent the setup request will observe an error.

To avoid this the gadget framework provides the USB_GADGET_DELAYED_STATUS
return code. If a setup() callback returns this value the UDC driver is
aware that response is not yet available and can uses the appropriate
methods to handle this case.

Since in the case of function fs the response will never be available when
the setup() function returns make sure that this status code is used.

This fixed random occasional failures that were previously observed on a
DWC3 based system under high system load.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/function/f_fs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index 8eb5748183425..85014494adf23 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -3020,7 +3020,7 @@ static int ffs_func_setup(struct usb_function *f,
 	__ffs_event_add(ffs, FUNCTIONFS_SETUP);
 	spin_unlock_irqrestore(&ffs->ev.waitq.lock, flags);
 
-	return 0;
+	return USB_GADGET_DELAYED_STATUS;
 }
 
 static void ffs_func_suspend(struct usb_function *f)

From a5ad661c44d5319d32f4eef763814670457574f2 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Fri, 12 Jan 2018 11:05:02 +0100
Subject: [PATCH 0415/1852] usb: gadget: ffs: Execute copy_to_user() with
 USER_DS set

[ Upstream commit 4058ebf33cb0be88ca516f968eda24ab7b6b93e4 ]

When using a AIO read() operation on the function FS gadget driver a URB is
submitted asynchronously and on URB completion the received data is copied
to the userspace buffer associated with the read operation.

This is done from a kernel worker thread invoking copy_to_user() (through
copy_to_iter()). And while the user space process memory is made available
to the kernel thread using use_mm(), some architecture require in addition
to this that the operation runs with USER_DS set. Otherwise the userspace
memory access will fail.

For example on ARM64 with Privileged Access Never (PAN) and User Access
Override (UAO) enabled the following crash occurs.

	Internal error: Accessing user space memory with fs=KERNEL_DS: 9600004f [#1] SMP
	Modules linked in:
	CPU: 2 PID: 1636 Comm: kworker/2:1 Not tainted 4.9.0-04081-g8ab2dfb-dirty #487
	Hardware name: ZynqMP ZCU102 Rev1.0 (DT)
	Workqueue: events ffs_user_copy_worker
	task: ffffffc87afc8080 task.stack: ffffffc87a00c000
	PC is at __arch_copy_to_user+0x190/0x220
	LR is at copy_to_iter+0x78/0x3c8
	[...]
	[<ffffff800847b790>] __arch_copy_to_user+0x190/0x220
	[<ffffff80086f25d8>] ffs_user_copy_worker+0x70/0x130
	[<ffffff80080b8c64>] process_one_work+0x1dc/0x460
	[<ffffff80080b8f38>] worker_thread+0x50/0x4b0
	[<ffffff80080bf5a0>] kthread+0xd8/0xf0
	[<ffffff8008083680>] ret_from_fork+0x10/0x50

Address this by placing a set_fs(USER_DS) before of the copy operation
and revert it again once the copy operation has finished.

This patch is analogous to commit d7ffde35e31a ("vhost: use USER_DS in
vhost_worker thread") which addresses the same underlying issue.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/function/f_fs.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index 85014494adf23..6e16fc66498f9 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -649,11 +649,15 @@ static void ffs_user_copy_worker(struct work_struct *work)
 	bool kiocb_has_eventfd = io_data->kiocb->ki_flags & IOCB_EVENTFD;
 
 	if (io_data->read && ret > 0) {
+		mm_segment_t oldfs = get_fs();
+
+		set_fs(USER_DS);
 		use_mm(io_data->mm);
 		ret = copy_to_iter(io_data->buf, ret, &io_data->data);
 		if (ret != io_data->req->actual && iov_iter_count(&io_data->data))
 			ret = -EFAULT;
 		unuse_mm(io_data->mm);
+		set_fs(oldfs);
 	}
 
 	io_data->kiocb->ki_complete(io_data->kiocb, ret, ret);

From 4f4697b60a937cbdcb6ddb007d94a769423fd20b Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Sun, 25 Feb 2018 18:22:29 +0100
Subject: [PATCH 0416/1852] powerpc: Add missing prototype for
 arch_irq_work_raise()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit f5246862f82f1e16bbf84cda4cddf287672b30fe ]

In commit 4f8b50bbbe63 ("irq_work, ppc: Fix up arch hooks") a new
function arch_irq_work_raise() was added without a prototype in header
irq_work.h.

Fix the following warning (treated as error in W=1):
  arch/powerpc/kernel/time.c:523:6: error: no previous prototype for ‘arch_irq_work_raise’

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/include/asm/irq_work.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/include/asm/irq_work.h b/arch/powerpc/include/asm/irq_work.h
index 744fd54de3741..1bcc84903930e 100644
--- a/arch/powerpc/include/asm/irq_work.h
+++ b/arch/powerpc/include/asm/irq_work.h
@@ -5,5 +5,6 @@ static inline bool arch_irq_work_has_interrupt(void)
 {
 	return true;
 }
+extern void arch_irq_work_raise(void);
 
 #endif /* _ASM_POWERPC_IRQ_WORK_H */

From d1ae348978c21983b4759003fda53598ca7109f4 Mon Sep 17 00:00:00 2001
From: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Date: Fri, 9 Mar 2018 11:11:17 -0800
Subject: [PATCH 0417/1852] ASoC: topology: create TLV data for dapm widgets

[ Upstream commit bde8b3887add8368ecf0ca71117baf2fd56a6fc9 ]

This patch adds the change required to create the TLV data
for dapm widget kcontrols from topology. This also fixes the following
TLV read error shown in amixer while showing the card control contents.
"amixer: Control hw:1 element TLV read error: No such device or address"

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/soc-topology.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c
index e3f34a86413c1..c1e76feb35298 100644
--- a/sound/soc/soc-topology.c
+++ b/sound/soc/soc-topology.c
@@ -1188,6 +1188,9 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create(
 			kfree(sm);
 			continue;
 		}
+
+		/* create any TLV data */
+		soc_tplg_create_tlv(tplg, &kc[i], &mc->hdr);
 	}
 	return kc;
 

From 5304ac610433b2f75680dc8fb55eece94a4e700e Mon Sep 17 00:00:00 2001
From: Peter Zijlstra <peterz@infradead.org>
Date: Fri, 9 Mar 2018 12:52:04 +0100
Subject: [PATCH 0418/1852] perf/core: Fix perf_output_read_group()

[ Upstream commit 9e5b127d6f33468143d90c8a45ca12410e4c3fa7 ]

Mark reported his arm64 perf fuzzer runs sometimes splat like:

  armv8pmu_read_counter+0x1e8/0x2d8
  armpmu_event_update+0x8c/0x188
  armpmu_read+0xc/0x18
  perf_output_read+0x550/0x11e8
  perf_event_read_event+0x1d0/0x248
  perf_event_exit_task+0x468/0xbb8
  do_exit+0x690/0x1310
  do_group_exit+0xd0/0x2b0
  get_signal+0x2e8/0x17a8
  do_signal+0x144/0x4f8
  do_notify_resume+0x148/0x1e8
  work_pending+0x8/0x14

which asserts that we only call pmu::read() on ACTIVE events.

The above callchain does:

  perf_event_exit_task()
    perf_event_exit_task_context()
      task_ctx_sched_out() // INACTIVE
      perf_event_exit_event()
        perf_event_set_state(EXIT) // EXIT
        sync_child_event()
          perf_event_read_event()
            perf_output_read()
              perf_output_read_group()
                leader->pmu->read()

Which results in doing a pmu::read() on an !ACTIVE event.

I _think_ this is 'new' since we added attr.inherit_stat, which added
the perf_event_read_event() to the exit path, without that
perf_event_read_output() would only trigger from samples and for
@event to trigger a sample, it's leader _must_ be ACTIVE too.

Still, adding this check makes it consistent with the @sub case for
the siblings.

Reported-and-Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/events/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/kernel/events/core.c b/kernel/events/core.c
index 0c7d0fab2b7f0..d18fbbb4e169e 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -5355,7 +5355,8 @@ static void perf_output_read_group(struct perf_output_handle *handle,
 	if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
 		values[n++] = running;
 
-	if (leader != event)
+	if ((leader != event) &&
+	    (leader->state == PERF_EVENT_STATE_ACTIVE))
 		leader->pmu->read(leader);
 
 	values[n++] = perf_event_count(leader);

From 26eef56c06e10fe5bd8a01640938b53e1adb6597 Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Sat, 10 Mar 2018 17:49:47 -0800
Subject: [PATCH 0419/1852] hwmon: (pmbus/max8688) Accept negative page
 register values

[ Upstream commit a46f8cd696624ef757be0311eb28f119c36778e8 ]

A negative page register value means that no page needs to be
selected. This is used by status register evaluations and needs
to be accepted.

Fixes: da8e48ab483e1 ("hwmon: (pmbus) Always call _pmbus_read_byte in core driver")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hwmon/pmbus/max8688.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hwmon/pmbus/max8688.c b/drivers/hwmon/pmbus/max8688.c
index dd4883a190456..e951f9b87abb0 100644
--- a/drivers/hwmon/pmbus/max8688.c
+++ b/drivers/hwmon/pmbus/max8688.c
@@ -45,7 +45,7 @@ static int max8688_read_word_data(struct i2c_client *client, int page, int reg)
 {
 	int ret;
 
-	if (page)
+	if (page > 0)
 		return -ENXIO;
 
 	switch (reg) {

From ddfab64f6664acf3454203aeca771ee0587e9a39 Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Sat, 10 Mar 2018 17:55:47 -0800
Subject: [PATCH 0420/1852] hwmon: (pmbus/adm1275) Accept negative page
 register values

[ Upstream commit ecb29abd4cb0670c616fb563a078f25d777ce530 ]

A negative page register value means that no page needs to be
selected. This is used by status register read operations and needs
to be accepted. The failure to do so so results in missed status
and limit registers.

Fixes: da8e48ab483e1 ("hwmon: (pmbus) Always call _pmbus_read_byte in core driver")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hwmon/pmbus/adm1275.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 18477dd1e2437..c3f4c9ef6705d 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -141,7 +141,7 @@ static int adm1275_read_word_data(struct i2c_client *client, int page, int reg)
 	const struct adm1275_data *data = to_adm1275_data(info);
 	int ret = 0;
 
-	if (page)
+	if (page > 0)
 		return -ENXIO;
 
 	switch (reg) {
@@ -218,7 +218,7 @@ static int adm1275_write_word_data(struct i2c_client *client, int page, int reg,
 	const struct adm1275_data *data = to_adm1275_data(info);
 	int ret;
 
-	if (page)
+	if (page > 0)
 		return -ENXIO;
 
 	switch (reg) {

From 68c8a84c32eddf2a8a6110371cff280674cfd538 Mon Sep 17 00:00:00 2001
From: Maurizio Lombardi <mlombard@redhat.com>
Date: Fri, 9 Mar 2018 13:59:06 +0100
Subject: [PATCH 0421/1852] cdrom: do not call check_disk_change() inside
 cdrom_open()

[ Upstream commit 2bbea6e117357d17842114c65e9a9cf2d13ae8a3 ]

when mounting an ISO filesystem sometimes (very rarely)
the system hangs because of a race condition between two tasks.

PID: 6766   TASK: ffff88007b2a6dd0  CPU: 0   COMMAND: "mount"
 #0 [ffff880078447ae0] __schedule at ffffffff8168d605
 #1 [ffff880078447b48] schedule_preempt_disabled at ffffffff8168ed49
 #2 [ffff880078447b58] __mutex_lock_slowpath at ffffffff8168c995
 #3 [ffff880078447bb8] mutex_lock at ffffffff8168bdef
 #4 [ffff880078447bd0] sr_block_ioctl at ffffffffa00b6818 [sr_mod]
 #5 [ffff880078447c10] blkdev_ioctl at ffffffff812fea50
 #6 [ffff880078447c70] ioctl_by_bdev at ffffffff8123a8b3
 #7 [ffff880078447c90] isofs_fill_super at ffffffffa04fb1e1 [isofs]
 #8 [ffff880078447da8] mount_bdev at ffffffff81202570
 #9 [ffff880078447e18] isofs_mount at ffffffffa04f9828 [isofs]
#10 [ffff880078447e28] mount_fs at ffffffff81202d09
#11 [ffff880078447e70] vfs_kern_mount at ffffffff8121ea8f
#12 [ffff880078447ea8] do_mount at ffffffff81220fee
#13 [ffff880078447f28] sys_mount at ffffffff812218d6
#14 [ffff880078447f80] system_call_fastpath at ffffffff81698c49
    RIP: 00007fd9ea914e9a  RSP: 00007ffd5d9bf648  RFLAGS: 00010246
    RAX: 00000000000000a5  RBX: ffffffff81698c49  RCX: 0000000000000010
    RDX: 00007fd9ec2bc210  RSI: 00007fd9ec2bc290  RDI: 00007fd9ec2bcf30
    RBP: 0000000000000000   R8: 0000000000000000   R9: 0000000000000010
    R10: 00000000c0ed0001  R11: 0000000000000206  R12: 00007fd9ec2bc040
    R13: 00007fd9eb6b2380  R14: 00007fd9ec2bc210  R15: 00007fd9ec2bcf30
    ORIG_RAX: 00000000000000a5  CS: 0033  SS: 002b

This task was trying to mount the cdrom.  It allocated and configured a
super_block struct and owned the write-lock for the super_block->s_umount
rwsem. While exclusively owning the s_umount lock, it called
sr_block_ioctl and waited to acquire the global sr_mutex lock.

PID: 6785   TASK: ffff880078720fb0  CPU: 0   COMMAND: "systemd-udevd"
 #0 [ffff880078417898] __schedule at ffffffff8168d605
 #1 [ffff880078417900] schedule at ffffffff8168dc59
 #2 [ffff880078417910] rwsem_down_read_failed at ffffffff8168f605
 #3 [ffff880078417980] call_rwsem_down_read_failed at ffffffff81328838
 #4 [ffff8800784179d0] down_read at ffffffff8168cde0
 #5 [ffff8800784179e8] get_super at ffffffff81201cc7
 #6 [ffff880078417a10] __invalidate_device at ffffffff8123a8de
 #7 [ffff880078417a40] flush_disk at ffffffff8123a94b
 #8 [ffff880078417a88] check_disk_change at ffffffff8123ab50
 #9 [ffff880078417ab0] cdrom_open at ffffffffa00a29e1 [cdrom]
#10 [ffff880078417b68] sr_block_open at ffffffffa00b6f9b [sr_mod]
#11 [ffff880078417b98] __blkdev_get at ffffffff8123ba86
#12 [ffff880078417bf0] blkdev_get at ffffffff8123bd65
#13 [ffff880078417c78] blkdev_open at ffffffff8123bf9b
#14 [ffff880078417c90] do_dentry_open at ffffffff811fc7f7
#15 [ffff880078417cd8] vfs_open at ffffffff811fc9cf
#16 [ffff880078417d00] do_last at ffffffff8120d53d
#17 [ffff880078417db0] path_openat at ffffffff8120e6b2
#18 [ffff880078417e48] do_filp_open at ffffffff8121082b
#19 [ffff880078417f18] do_sys_open at ffffffff811fdd33
#20 [ffff880078417f70] sys_open at ffffffff811fde4e
#21 [ffff880078417f80] system_call_fastpath at ffffffff81698c49
    RIP: 00007f29438b0c20  RSP: 00007ffc76624b78  RFLAGS: 00010246
    RAX: 0000000000000002  RBX: ffffffff81698c49  RCX: 0000000000000000
    RDX: 00007f2944a5fa70  RSI: 00000000000a0800  RDI: 00007f2944a5fa70
    RBP: 00007f2944a5f540   R8: 0000000000000000   R9: 0000000000000020
    R10: 00007f2943614c40  R11: 0000000000000246  R12: ffffffff811fde4e
    R13: ffff880078417f78  R14: 000000000000000c  R15: 00007f2944a4b010
    ORIG_RAX: 0000000000000002  CS: 0033  SS: 002b

This task tried to open the cdrom device, the sr_block_open function
acquired the global sr_mutex lock. The call to check_disk_change()
then saw an event flag indicating a possible media change and tried
to flush any cached data for the device.
As part of the flush, it tried to acquire the super_block->s_umount
lock associated with the cdrom device.
This was the same super_block as created and locked by the previous task.

The first task acquires the s_umount lock and then the sr_mutex_lock;
the second task acquires the sr_mutex_lock and then the s_umount lock.

This patch fixes the issue by moving check_disk_change() out of
cdrom_open() and let the caller take care of it.

Signed-off-by: Maurizio Lombardi <mlombard@redhat.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/block/paride/pcd.c | 2 ++
 drivers/cdrom/cdrom.c      | 3 ---
 drivers/cdrom/gdrom.c      | 3 +++
 drivers/ide/ide-cd.c       | 2 ++
 drivers/scsi/sr.c          | 2 ++
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/block/paride/pcd.c b/drivers/block/paride/pcd.c
index 93362362aa551..8474a1b0740f6 100644
--- a/drivers/block/paride/pcd.c
+++ b/drivers/block/paride/pcd.c
@@ -230,6 +230,8 @@ static int pcd_block_open(struct block_device *bdev, fmode_t mode)
 	struct pcd_unit *cd = bdev->bd_disk->private_data;
 	int ret;
 
+	check_disk_change(bdev);
+
 	mutex_lock(&pcd_mutex);
 	ret = cdrom_open(&cd->info, bdev, mode);
 	mutex_unlock(&pcd_mutex);
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index b5f245d2875cc..0151039bff052 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c
@@ -1154,9 +1154,6 @@ int cdrom_open(struct cdrom_device_info *cdi, struct block_device *bdev,
 
 	cd_dbg(CD_OPEN, "entering cdrom_open\n");
 
-	/* open is event synchronization point, check events first */
-	check_disk_change(bdev);
-
 	/* if this was a O_NONBLOCK open and we should honor the flags,
 	 * do a quick open without drive/disc integrity checks. */
 	cdi->use_count++;
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
index 584bc3126403d..e2808fefbb78b 100644
--- a/drivers/cdrom/gdrom.c
+++ b/drivers/cdrom/gdrom.c
@@ -497,6 +497,9 @@ static struct cdrom_device_ops gdrom_ops = {
 static int gdrom_bdops_open(struct block_device *bdev, fmode_t mode)
 {
 	int ret;
+
+	check_disk_change(bdev);
+
 	mutex_lock(&gdrom_mutex);
 	ret = cdrom_open(gd.cd_info, bdev, mode);
 	mutex_unlock(&gdrom_mutex);
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index ef907fd5ba98a..08a21d635d0dc 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -1593,6 +1593,8 @@ static int idecd_open(struct block_device *bdev, fmode_t mode)
 	struct cdrom_info *info;
 	int rc = -ENXIO;
 
+	check_disk_change(bdev);
+
 	mutex_lock(&ide_cd_mutex);
 	info = ide_cd_get(bdev->bd_disk);
 	if (!info)
diff --git a/drivers/scsi/sr.c b/drivers/scsi/sr.c
index 52778a7fed61b..de53c9694b68e 100644
--- a/drivers/scsi/sr.c
+++ b/drivers/scsi/sr.c
@@ -522,6 +522,8 @@ static int sr_block_open(struct block_device *bdev, fmode_t mode)
 	struct scsi_cd *cd;
 	int ret = -ENXIO;
 
+	check_disk_change(bdev);
+
 	mutex_lock(&sr_mutex);
 	cd = scsi_cd_get(bdev->bd_disk);
 	if (cd) {

From a320b52d4d6e7b625d9e090563c9c651bc303752 Mon Sep 17 00:00:00 2001
From: Andreas Gruenbacher <agruenba@redhat.com>
Date: Tue, 20 Feb 2018 08:03:24 -0700
Subject: [PATCH 0422/1852] gfs2: Fix fallocate chunk size

[ Upstream commit 174d1232ebc84fcde8f5889d1171c9c7e74a10a7 ]

The chunk size of allocations in __gfs2_fallocate is calculated
incorrectly.  The size can collapse, causing __gfs2_fallocate to
allocate one block at a time, which is very inefficient.  This needs
fixing in two places:

In gfs2_quota_lock_check, always set ap->allowed to UINT_MAX to indicate
that there is no quota limit.  This fixes callers that rely on
ap->allowed to be set even when quotas are off.

In __gfs2_fallocate, reset max_blks to UINT_MAX in each iteration of the
loop to make sure that allocation limits from one resource group won't
spill over into another resource group.

Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
Signed-off-by: Bob Peterson <rpeterso@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/gfs2/file.c  | 5 +++--
 fs/gfs2/quota.h | 2 ++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c
index 1543aa1b2a938..8744bd7738235 100644
--- a/fs/gfs2/file.c
+++ b/fs/gfs2/file.c
@@ -806,7 +806,7 @@ static long __gfs2_fallocate(struct file *file, int mode, loff_t offset, loff_t
 	struct gfs2_inode *ip = GFS2_I(inode);
 	struct gfs2_alloc_parms ap = { .aflags = 0, };
 	unsigned int data_blocks = 0, ind_blocks = 0, rblocks;
-	loff_t bytes, max_bytes, max_blks = UINT_MAX;
+	loff_t bytes, max_bytes, max_blks;
 	int error;
 	const loff_t pos = offset;
 	const loff_t count = len;
@@ -858,7 +858,8 @@ static long __gfs2_fallocate(struct file *file, int mode, loff_t offset, loff_t
 			return error;
 		/* ap.allowed tells us how many blocks quota will allow
 		 * us to write. Check if this reduces max_blks */
-		if (ap.allowed && ap.allowed < max_blks)
+		max_blks = UINT_MAX;
+		if (ap.allowed)
 			max_blks = ap.allowed;
 
 		error = gfs2_inplace_reserve(ip, &ap);
diff --git a/fs/gfs2/quota.h b/fs/gfs2/quota.h
index ad04b3acae2b9..a81ed38d8442d 100644
--- a/fs/gfs2/quota.h
+++ b/fs/gfs2/quota.h
@@ -43,6 +43,8 @@ static inline int gfs2_quota_lock_check(struct gfs2_inode *ip,
 {
 	struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
 	int ret;
+
+	ap->allowed = UINT_MAX; /* Assume we are permitted a whole lot */
 	if (sdp->sd_args.ar_quota == GFS2_QUOTA_OFF)
 		return 0;
 	ret = gfs2_quota_lock(ip, NO_UID_QUOTA_CHANGE, NO_GID_QUOTA_CHANGE);

From 62d639db785c4d9e47e465ef1d64fa8528645b6a Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Tue, 6 Feb 2018 09:50:40 +0100
Subject: [PATCH 0423/1852] usb: gadget: udc: change comparison to bitshift
 when dealing with a mask

[ Upstream commit ac87e560f7c0f91b62012e9a159c0681a373b922 ]

Due to a typo, the mask was destroyed by a comparison instead of a bit
shift.

Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/udc/goku_udc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/udc/goku_udc.h b/drivers/usb/gadget/udc/goku_udc.h
index 86d2adafe149a..64eb0f2b5ea00 100644
--- a/drivers/usb/gadget/udc/goku_udc.h
+++ b/drivers/usb/gadget/udc/goku_udc.h
@@ -28,7 +28,7 @@ struct goku_udc_regs {
 #	define INT_EP1DATASET		0x00040
 #	define INT_EP2DATASET		0x00080
 #	define INT_EP3DATASET		0x00100
-#define INT_EPnNAK(n)		(0x00100 < (n))		/* 0 < n < 4 */
+#define INT_EPnNAK(n)		(0x00100 << (n))	/* 0 < n < 4 */
 #	define INT_EP1NAK		0x00200
 #	define INT_EP2NAK		0x00400
 #	define INT_EP3NAK		0x00800

From 532db5b7eeaaf0bcee2bd8b14ea8b10da3f66b0e Mon Sep 17 00:00:00 2001
From: Chris Dickens <christopher.a.dickens@gmail.com>
Date: Sun, 31 Dec 2017 18:59:42 -0800
Subject: [PATCH 0424/1852] usb: gadget: composite: fix incorrect handling of
 OS desc requests

[ Upstream commit 5d6ae4f0da8a64a185074dabb1b2f8c148efa741 ]

When handling an OS descriptor request, one of the first operations is
to zero out the request buffer using the wLength from the setup packet.
There is no bounds checking, so a wLength > 4096 would clobber memory
adjacent to the request buffer. Fix this by taking the min of wLength
and the request buffer length prior to the memset. While at it, define
the buffer length in a header file so that magic numbers don't appear
throughout the code.

When returning data to the host, the data length should be the min of
the wLength and the valid data we have to return. Currently we are
returning wLength, thus requests for a wLength greater than the amount
of data in the OS descriptor buffer would return invalid (albeit zero'd)
data following the valid descriptor data. Fix this by counting the
number of bytes when constructing the data and using this when
determining the length of the request.

Signed-off-by: Chris Dickens <christopher.a.dickens@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/composite.c | 40 ++++++++++++++++------------------
 include/linux/usb/composite.h  |  3 +++
 2 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index faa54382bcd7f..fe79894638c9c 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1328,7 +1328,7 @@ static int count_ext_compat(struct usb_configuration *c)
 	return res;
 }
 
-static void fill_ext_compat(struct usb_configuration *c, u8 *buf)
+static int fill_ext_compat(struct usb_configuration *c, u8 *buf)
 {
 	int i, count;
 
@@ -1355,10 +1355,12 @@ static void fill_ext_compat(struct usb_configuration *c, u8 *buf)
 				buf += 23;
 			}
 			count += 24;
-			if (count >= 4096)
-				return;
+			if (count + 24 >= USB_COMP_EP0_OS_DESC_BUFSIZ)
+				return count;
 		}
 	}
+
+	return count;
 }
 
 static int count_ext_prop(struct usb_configuration *c, int interface)
@@ -1403,25 +1405,20 @@ static int fill_ext_prop(struct usb_configuration *c, int interface, u8 *buf)
 	struct usb_os_desc *d;
 	struct usb_os_desc_ext_prop *ext_prop;
 	int j, count, n, ret;
-	u8 *start = buf;
 
 	f = c->interface[interface];
+	count = 10; /* header length */
 	for (j = 0; j < f->os_desc_n; ++j) {
 		if (interface != f->os_desc_table[j].if_id)
 			continue;
 		d = f->os_desc_table[j].os_desc;
 		if (d)
 			list_for_each_entry(ext_prop, &d->ext_prop, entry) {
-				/* 4kB minus header length */
-				n = buf - start;
-				if (n >= 4086)
-					return 0;
-
-				count = ext_prop->data_len +
+				n = ext_prop->data_len +
 					ext_prop->name_len + 14;
-				if (count > 4086 - n)
-					return -EINVAL;
-				usb_ext_prop_put_size(buf, count);
+				if (count + n >= USB_COMP_EP0_OS_DESC_BUFSIZ)
+					return count;
+				usb_ext_prop_put_size(buf, n);
 				usb_ext_prop_put_type(buf, ext_prop->type);
 				ret = usb_ext_prop_put_name(buf, ext_prop->name,
 							    ext_prop->name_len);
@@ -1447,11 +1444,12 @@ static int fill_ext_prop(struct usb_configuration *c, int interface, u8 *buf)
 				default:
 					return -EINVAL;
 				}
-				buf += count;
+				buf += n;
+				count += n;
 			}
 	}
 
-	return 0;
+	return count;
 }
 
 /*
@@ -1720,6 +1718,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 			req->complete = composite_setup_complete;
 			buf = req->buf;
 			os_desc_cfg = cdev->os_desc_config;
+			w_length = min_t(u16, w_length, USB_COMP_EP0_OS_DESC_BUFSIZ);
 			memset(buf, 0, w_length);
 			buf[5] = 0x01;
 			switch (ctrl->bRequestType & USB_RECIP_MASK) {
@@ -1743,8 +1742,8 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 					count += 16; /* header */
 					put_unaligned_le32(count, buf);
 					buf += 16;
-					fill_ext_compat(os_desc_cfg, buf);
-					value = w_length;
+					value = fill_ext_compat(os_desc_cfg, buf);
+					value = min_t(u16, w_length, value);
 				}
 				break;
 			case USB_RECIP_INTERFACE:
@@ -1773,8 +1772,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 							      interface, buf);
 					if (value < 0)
 						return value;
-
-					value = w_length;
+					value = min_t(u16, w_length, value);
 				}
 				break;
 			}
@@ -2049,8 +2047,8 @@ int composite_os_desc_req_prepare(struct usb_composite_dev *cdev,
 		goto end;
 	}
 
-	/* OS feature descriptor length <= 4kB */
-	cdev->os_desc_req->buf = kmalloc(4096, GFP_KERNEL);
+	cdev->os_desc_req->buf = kmalloc(USB_COMP_EP0_OS_DESC_BUFSIZ,
+					 GFP_KERNEL);
 	if (!cdev->os_desc_req->buf) {
 		ret = PTR_ERR(cdev->os_desc_req->buf);
 		kfree(cdev->os_desc_req);
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 15d7c311e86e6..ccb4fcb454d69 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -53,6 +53,9 @@
 /* big enough to hold our biggest descriptor */
 #define USB_COMP_EP0_BUFSIZ	1024
 
+/* OS feature descriptor length <= 4kB */
+#define USB_COMP_EP0_OS_DESC_BUFSIZ	4096
+
 #define USB_MS_TO_HS_INTERVAL(x)	(ilog2((x * 1000 / 125)) + 1)
 struct usb_configuration;
 

From 34c8775f745fc1d2721c4c9fc2261549328f019b Mon Sep 17 00:00:00 2001
From: Ivan Gorinov <ivan.gorinov@intel.com>
Date: Wed, 7 Mar 2018 11:46:29 -0800
Subject: [PATCH 0425/1852] x86/devicetree: Initialize device tree before using
 it

[ Upstream commit 628df9dc5ad886b0a9b33c75a7b09710eb859ca1 ]

Commit 08d53aa58cb1 added CRC32 calculation in early_init_dt_verify() and
checking in late initcall of_fdt_raw_init(), making early_init_dt_verify()
mandatory.

The required call to early_init_dt_verify() was not added to the
x86-specific implementation, causing failure to create the sysfs entry in
of_fdt_raw_init().

Fixes: 08d53aa58cb1 ("of/fdt: export fdt blob as /sys/firmware/fdt")
Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: https://lkml.kernel.org/r/c8c7e941efc63b5d25ebf9b6350b0f3df38f6098.1520450752.git.ivan.gorinov@intel.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/devicetree.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 1f4acd68b98bc..3950ca77fcd6c 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -11,6 +11,7 @@
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/of_irq.h>
+#include <linux/libfdt.h>
 #include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/of_pci.h>
@@ -276,14 +277,15 @@ static void __init x86_flattree_get_config(void)
 
 	map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
 
-	initial_boot_params = dt = early_memremap(initial_dtb, map_len);
-	size = of_get_flat_dt_size();
+	dt = early_memremap(initial_dtb, map_len);
+	size = fdt_totalsize(dt);
 	if (map_len < size) {
 		early_memunmap(dt, map_len);
-		initial_boot_params = dt = early_memremap(initial_dtb, size);
+		dt = early_memremap(initial_dtb, size);
 		map_len = size;
 	}
 
+	early_init_dt_verify(dt);
 	unflatten_and_copy_device_tree();
 	early_memunmap(dt, map_len);
 }

From c1b96367383c3c2931853d7b963676345ef93f3a Mon Sep 17 00:00:00 2001
From: Ivan Gorinov <ivan.gorinov@intel.com>
Date: Wed, 7 Mar 2018 11:46:53 -0800
Subject: [PATCH 0426/1852] x86/devicetree: Fix device IRQ settings in DT

[ Upstream commit 0a5169add90e43ab45ab1ba34223b8583fcaf675 ]

IRQ parameters for the SoC devices connected directly to I/O APIC lines
(without PCI IRQ routing) may be specified in the Device Tree.

Called from DT IRQ parser, irq_create_fwspec_mapping() calls
irq_domain_alloc_irqs() with a pointer to irq_fwspec structure as @arg.

But x86-specific DT IRQ allocation code casts @arg to of_phandle_args
structure pointer and crashes trying to read the IRQ parameters. The
function was not converted when the mapping descriptor was changed to
irq_fwspec in the generic irqdomain code.

Fixes: 11e4438ee330 ("irqdomain: Introduce a firmware-specific IRQ specifier structure")
Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: https://lkml.kernel.org/r/a234dee27ea60ce76141872da0d6bdb378b2a9ee.1520450752.git.ivan.gorinov@intel.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/devicetree.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 3950ca77fcd6c..74b8dcd1bbdc6 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -200,19 +200,22 @@ static struct of_ioapic_type of_ioapic_type[] =
 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
 			      unsigned int nr_irqs, void *arg)
 {
-	struct of_phandle_args *irq_data = (void *)arg;
+	struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
 	struct of_ioapic_type *it;
 	struct irq_alloc_info tmp;
+	int type_index;
 
-	if (WARN_ON(irq_data->args_count < 2))
+	if (WARN_ON(fwspec->param_count < 2))
 		return -EINVAL;
-	if (irq_data->args[1] >= ARRAY_SIZE(of_ioapic_type))
+
+	type_index = fwspec->param[1];
+	if (type_index >= ARRAY_SIZE(of_ioapic_type))
 		return -EINVAL;
 
-	it = &of_ioapic_type[irq_data->args[1]];
+	it = &of_ioapic_type[type_index];
 	ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity);
 	tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
-	tmp.ioapic_pin = irq_data->args[0];
+	tmp.ioapic_pin = fwspec->param[0];
 
 	return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
 }

From 409ca8f8f18124235e05f0f5361b22031c9c15ad Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Thu, 8 Mar 2018 08:26:48 +0100
Subject: [PATCH 0427/1852] ALSA: vmaster: Propagate slave error

[ Upstream commit 2e2c177ca84aff092c3c96714b0f6a12900f3946 ]

In slave_update() of vmaster code ignores the error from the slave
get() callback and copies the values.  It's not only about the missing
error code but also that this may potentially lead to a leak of
uninitialized variables when the slave get() don't clear them.

This patch fixes slave_update() not to copy the potentially
uninitialized values when an error is returned from the slave get()
callback, and to propagate the error value properly.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/vmaster.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/sound/core/vmaster.c b/sound/core/vmaster.c
index 6c58e6f73a013..7c6ef879c520d 100644
--- a/sound/core/vmaster.c
+++ b/sound/core/vmaster.c
@@ -68,10 +68,13 @@ static int slave_update(struct link_slave *slave)
 		return -ENOMEM;
 	uctl->id = slave->slave.id;
 	err = slave->slave.get(&slave->slave, uctl);
+	if (err < 0)
+		goto error;
 	for (ch = 0; ch < slave->info.count; ch++)
 		slave->vals[ch] = uctl->value.integer.value[ch];
+ error:
 	kfree(uctl);
-	return 0;
+	return err < 0 ? err : 0;
 }
 
 /* get the slave ctl info and save the initial values */

From 383b0d4ffe20bb586b230ae135252c9aec725631 Mon Sep 17 00:00:00 2001
From: Brad Love <brad@nextdimension.cc>
Date: Tue, 6 Mar 2018 14:15:37 -0500
Subject: [PATCH 0428/1852] media: cx23885: Override 888 ImpactVCBe crystal
 frequency

[ Upstream commit 779c79d4b833ec646b0aed878da38edb45bbe156 ]

Hauppauge produced a revision of ImpactVCBe using an 888,
with a 25MHz crystal, instead of using the default third
overtone 50Mhz crystal. This overrides that frequency so
that the cx25840 is properly configured. Without the proper
crystal setup the cx25840 cannot load the firmware or
decode video.

Signed-off-by: Brad Love <brad@nextdimension.cc>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/pci/cx23885/cx23885-core.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c
index e8f847226a199..6eb3be13b4302 100644
--- a/drivers/media/pci/cx23885/cx23885-core.c
+++ b/drivers/media/pci/cx23885/cx23885-core.c
@@ -872,6 +872,16 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
 	if (cx23885_boards[dev->board].clk_freq > 0)
 		dev->clk_freq = cx23885_boards[dev->board].clk_freq;
 
+	if (dev->board == CX23885_BOARD_HAUPPAUGE_IMPACTVCBE &&
+		dev->pci->subsystem_device == 0x7137) {
+		/* Hauppauge ImpactVCBe device ID 0x7137 is populated
+		 * with an 888, and a 25Mhz crystal, instead of the
+		 * usual third overtone 50Mhz. The default clock rate must
+		 * be overridden so the cx25840 is properly configured
+		 */
+		dev->clk_freq = 25000000;
+	}
+
 	dev->pci_bus  = dev->pci->bus->number;
 	dev->pci_slot = PCI_SLOT(dev->pci->devfn);
 	cx23885_irq_add(dev, 0x001f00);

From c21ed620ddf9faa7f68c4346979c358daaa445c7 Mon Sep 17 00:00:00 2001
From: Brad Love <brad@nextdimension.cc>
Date: Tue, 6 Mar 2018 14:15:36 -0500
Subject: [PATCH 0429/1852] media: cx23885: Set subdev host data to clk_freq
 pointer

[ Upstream commit 5ceade1d97fc6687e050c44c257382c192f56276 ]

Currently clk_freq is ignored entirely, because the cx235840 driver
configures the xtal at the chip defaults. This is an issue if a
board is produced with a non-default frequency crystal. If clk_freq
is not zero the cx25840 will attempt to use the setting provided,
or fall back to defaults otherwise.

Signed-off-by: Brad Love <brad@nextdimension.cc>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/pci/cx23885/cx23885-cards.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c
index f384f295676ec..679d122af63ca 100644
--- a/drivers/media/pci/cx23885/cx23885-cards.c
+++ b/drivers/media/pci/cx23885/cx23885-cards.c
@@ -2124,6 +2124,10 @@ void cx23885_card_setup(struct cx23885_dev *dev)
 				&dev->i2c_bus[2].i2c_adap,
 				"cx25840", 0x88 >> 1, NULL);
 		if (dev->sd_cx25840) {
+			/* set host data for clk_freq configuration */
+			v4l2_set_subdev_hostdata(dev->sd_cx25840,
+						&dev->clk_freq);
+
 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
 		}

From cd434e0875fdd14c88df4d8e1741370ae83b9dc5 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Tue, 16 Jan 2018 16:52:15 -0500
Subject: [PATCH 0430/1852] media: s3c-camif: fix out-of-bounds array access

[ Upstream commit a398e043637a4819a0e96467bfecaabf3224dd62 ]

While experimenting with older compiler versions, I ran
into a warning that no longer shows up on gcc-4.8 or newer:

drivers/media/platform/s3c-camif/camif-capture.c: In function '__camif_subdev_try_format':
drivers/media/platform/s3c-camif/camif-capture.c:1265:25: error: array subscript is below array bounds

This is an off-by-one bug, leading to an access before the start of the
array, while newer compilers silently assume this undefined behavior
cannot happen and leave the loop at index 0 if no other entry matches.

As Sylvester explains, we actually need to ensure that the
value is within the range, so this reworks the loop to be
easier to parse correctly, and an additional check to fall
back on the first format value for any unexpected input.

I found an existing gcc bug for it and added a reduced version
of the function there.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69249#c3
Fixes: babde1c243b2 ("[media] V4L: Add driver for S3C24XX/S3C64XX SoC series camera interface")

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/platform/s3c-camif/camif-capture.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/s3c-camif/camif-capture.c b/drivers/media/platform/s3c-camif/camif-capture.c
index 537b858cb94a6..fa6af4a7dae1f 100644
--- a/drivers/media/platform/s3c-camif/camif-capture.c
+++ b/drivers/media/platform/s3c-camif/camif-capture.c
@@ -1268,16 +1268,17 @@ static void __camif_subdev_try_format(struct camif_dev *camif,
 {
 	const struct s3c_camif_variant *variant = camif->variant;
 	const struct vp_pix_limits *pix_lim;
-	int i = ARRAY_SIZE(camif_mbus_formats);
+	unsigned int i;
 
 	/* FIXME: constraints against codec or preview path ? */
 	pix_lim = &variant->vp_pix_limits[VP_CODEC];
 
-	while (i-- >= 0)
+	for (i = 0; i < ARRAY_SIZE(camif_mbus_formats); i++)
 		if (camif_mbus_formats[i] == mf->code)
 			break;
 
-	mf->code = camif_mbus_formats[i];
+	if (i == ARRAY_SIZE(camif_mbus_formats))
+		mf->code = camif_mbus_formats[0];
 
 	if (pad == CAMIF_SD_PAD_SINK) {
 		v4l_bound_align_image(&mf->width, 8, CAMIF_MAX_PIX_WIDTH,

From fbe95c99621bd7d0db9f0d5f8f7b65d5525d76d3 Mon Sep 17 00:00:00 2001
From: Qi Hou <qi.hou@windriver.com>
Date: Tue, 6 Mar 2018 09:13:37 +0800
Subject: [PATCH 0431/1852] dmaengine: pl330: fix a race condition in case of
 threaded irqs

[ Upstream commit a3ca831249ca8c4c226e4ceafee04e280152e59d ]

When booting up with "threadirqs" in command line, all irq handlers of the DMA
controller pl330 will be threaded forcedly. These threads will race for the same
list, pl330->req_done.

Before the callback, the spinlock was released. And after it, the spinlock was
taken. This opened an race window where another threaded irq handler could steal
the spinlock and be permitted to delete entries of the list, pl330->req_done.

If the later deleted an entry that was still referred to by the former, there would
be a kernel panic when the former was scheduled and tried to get the next sibling
of the deleted entry.

The scenario could be depicted as below:

  Thread: T1  pl330->req_done  Thread: T2
      |             |              |
      |          -A-B-C-D-         |
    Locked          |              |
      |             |           Waiting
    Del A           |              |
      |          -B-C-D-           |
    Unlocked        |              |
      |             |           Locked
    Waiting         |              |
      |             |            Del B
      |             |              |
      |           -C-D-         Unlocked
    Waiting         |              |
      |
    Locked
      |
   get C via B
      \
       - Kernel panic

The kernel panic looked like as below:

Unable to handle kernel paging request at virtual address dead000000000108
pgd = ffffff8008c9e000
[dead000000000108] *pgd=000000027fffe003, *pud=000000027fffe003, *pmd=0000000000000000
Internal error: Oops: 96000044 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 85 Comm: irq/59-66330000 Not tainted 4.8.24-WR9.0.0.12_standard #2
Hardware name: Broadcom NS2 SVK (DT)
task: ffffffc1f5cc3c00 task.stack: ffffffc1f5ce0000
PC is at pl330_irq_handler+0x27c/0x390
LR is at pl330_irq_handler+0x2a8/0x390
pc : [<ffffff80084cb694>] lr : [<ffffff80084cb6c0>] pstate: 800001c5
sp : ffffffc1f5ce3d00
x29: ffffffc1f5ce3d00 x28: 0000000000000140
x27: ffffffc1f5c530b0 x26: dead000000000100
x25: dead000000000200 x24: 0000000000418958
x23: 0000000000000001 x22: ffffffc1f5ccd668
x21: ffffffc1f5ccd590 x20: ffffffc1f5ccd418
x19: dead000000000060 x18: 0000000000000001
x17: 0000000000000007 x16: 0000000000000001
x15: ffffffffffffffff x14: ffffffffffffffff
x13: ffffffffffffffff x12: 0000000000000000
x11: 0000000000000001 x10: 0000000000000840
x9 : ffffffc1f5ce0000 x8 : ffffffc1f5cc3338
x7 : ffffff8008ce2020 x6 : 0000000000000000
x5 : 0000000000000000 x4 : 0000000000000001
x3 : dead000000000200 x2 : dead000000000100
x1 : 0000000000000140 x0 : ffffffc1f5ccd590

Process irq/59-66330000 (pid: 85, stack limit = 0xffffffc1f5ce0020)
Stack: (0xffffffc1f5ce3d00 to 0xffffffc1f5ce4000)
3d00: ffffffc1f5ce3d80 ffffff80080f09d0 ffffffc1f5ca0c00 ffffffc1f6f7c600
3d20: ffffffc1f5ce0000 ffffffc1f6f7c600 ffffffc1f5ca0c00 ffffff80080f0998
3d40: ffffffc1f5ce0000 ffffff80080f0000 0000000000000000 0000000000000000
3d60: ffffff8008ce202c ffffff8008ce2020 ffffffc1f5ccd668 ffffffc1f5c530b0
3d80: ffffffc1f5ce3db0 ffffff80080f0d70 ffffffc1f5ca0c40 0000000000000001
3da0: ffffffc1f5ce0000 ffffff80080f0cfc ffffffc1f5ce3e20 ffffff80080bf4f8
3dc0: ffffffc1f5ca0c80 ffffff8008bf3798 ffffff8008955528 ffffffc1f5ca0c00
3de0: ffffff80080f0c30 0000000000000000 0000000000000000 0000000000000000
3e00: 0000000000000000 0000000000000000 0000000000000000 ffffff80080f0b68
3e20: 0000000000000000 ffffff8008083690 ffffff80080bf420 ffffffc1f5ca0c80
3e40: 0000000000000000 0000000000000000 0000000000000000 ffffff80080cb648
3e60: ffffff8008b1c780 0000000000000000 0000000000000000 ffffffc1f5ca0c00
3e80: ffffffc100000000 ffffff8000000000 ffffffc1f5ce3e90 ffffffc1f5ce3e90
3ea0: 0000000000000000 ffffff8000000000 ffffffc1f5ce3eb0 ffffffc1f5ce3eb0
3ec0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3ee0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3f00: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3f20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3f40: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3f60: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3f80: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3fa0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
3fc0: 0000000000000000 0000000000000005 0000000000000000 0000000000000000
3fe0: 0000000000000000 0000000000000000 0000000275ce3ff0 0000000275ce3ff8
Call trace:
Exception stack(0xffffffc1f5ce3b30 to 0xffffffc1f5ce3c60)
3b20:                                   dead000000000060 0000008000000000
3b40: ffffffc1f5ce3d00 ffffff80084cb694 0000000000000008 0000000000000e88
3b60: ffffffc1f5ce3bb0 ffffff80080dac68 ffffffc1f5ce3b90 ffffff8008826fe4
3b80: 00000000000001c0 00000000000001c0 ffffffc1f5ce3bb0 ffffff800848dfcc
3ba0: 0000000000020000 ffffff8008b15ae4 ffffffc1f5ce3c00 ffffff800808f000
3bc0: 0000000000000010 ffffff80088377f0 ffffffc1f5ccd590 0000000000000140
3be0: dead000000000100 dead000000000200 0000000000000001 0000000000000000
3c00: 0000000000000000 ffffff8008ce2020 ffffffc1f5cc3338 ffffffc1f5ce0000
3c20: 0000000000000840 0000000000000001 0000000000000000 ffffffffffffffff
3c40: ffffffffffffffff ffffffffffffffff 0000000000000001 0000000000000007
[<ffffff80084cb694>] pl330_irq_handler+0x27c/0x390
[<ffffff80080f09d0>] irq_forced_thread_fn+0x38/0x88
[<ffffff80080f0d70>] irq_thread+0x140/0x200
[<ffffff80080bf4f8>] kthread+0xd8/0xf0
[<ffffff8008083690>] ret_from_fork+0x10/0x40
Code: f2a00838 f9405763 aa1c03e1 aa1503e0 (f9000443)
---[ end trace f50005726d31199c ]---
Kernel panic - not syncing: Fatal exception in interrupt
SMP: stopping secondary CPUs
SMP: failed to stop secondary CPUs 0-1
Kernel Offset: disabled
Memory Limit: none
---[ end Kernel panic - not syncing: Fatal exception in interrupt

To fix this, re-start with the list-head after dropping the lock then
re-takeing it.

Reviewed-by: Frank Mori Hess <fmh6jj@gmail.com>
Tested-by: Frank Mori Hess <fmh6jj@gmail.com>
Signed-off-by: Qi Hou <qi.hou@windriver.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/dma/pl330.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 6fe0b1a15671f..ee8e25c0e70cc 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1742,7 +1742,7 @@ static void pl330_dotask(unsigned long data)
 /* Returns 1 if state was updated, 0 otherwise */
 static int pl330_update(struct pl330_dmac *pl330)
 {
-	struct dma_pl330_desc *descdone, *tmp;
+	struct dma_pl330_desc *descdone;
 	unsigned long flags;
 	void __iomem *regs;
 	u32 val;
@@ -1822,7 +1822,9 @@ static int pl330_update(struct pl330_dmac *pl330)
 	}
 
 	/* Now that we are in no hurry, do the callbacks */
-	list_for_each_entry_safe(descdone, tmp, &pl330->req_done, rqd) {
+	while (!list_empty(&pl330->req_done)) {
+		descdone = list_first_entry(&pl330->req_done,
+					    struct dma_pl330_desc, rqd);
 		list_del(&descdone->rqd);
 		spin_unlock_irqrestore(&pl330->lock, flags);
 		dma_pl330_rqcb(descdone, PL330_ERR_NONE);

From e4b7e240b4095ec31206510e3b8c61b664b54e27 Mon Sep 17 00:00:00 2001
From: Brad Love <brad@nextdimension.cc>
Date: Thu, 4 Jan 2018 19:04:13 -0500
Subject: [PATCH 0432/1852] media: em28xx: USB bulk packet size fix

[ Upstream commit c7c7e8d7803406daa21e96d00c357de8b77b6764 ]

Hauppauge em28xx bulk devices exhibit continuity errors and corrupted
packets, when run in VMWare virtual machines. Unknown if other
manufacturers bulk models exhibit the same issue. KVM/Qemu is unaffected.

According to documentation the maximum packet multiplier for em28xx in bulk
transfer mode is 256 * 188 bytes. This changes the size of bulk transfers
to maximum supported value and have a bonus beneficial alignment.

Before:

After:

This sets up USB to expect just as many bytes as the em28xx is set to emit.

Successful usage under load afterwards natively and in both VMWare
and KVM/Qemu virtual machines.

Signed-off-by: Brad Love <brad@nextdimension.cc>
Reviewed-by: Michael Ira Krufky <mkrufky@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/usb/em28xx/em28xx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/usb/em28xx/em28xx.h b/drivers/media/usb/em28xx/em28xx.h
index 76bf8ba372b3c..5b53e31ce262a 100644
--- a/drivers/media/usb/em28xx/em28xx.h
+++ b/drivers/media/usb/em28xx/em28xx.h
@@ -187,7 +187,7 @@
    USB 2.0 spec says bulk packet size is always 512 bytes
  */
 #define EM28XX_BULK_PACKET_MULTIPLIER 384
-#define EM28XX_DVB_BULK_PACKET_MULTIPLIER 384
+#define EM28XX_DVB_BULK_PACKET_MULTIPLIER 94
 
 #define EM28XX_INTERLACED_DEFAULT 1
 

From 780c5be162a52fc836f44822f6a515dcb64ea0bd Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Mon, 5 Mar 2018 11:25:58 +0800
Subject: [PATCH 0433/1852] clk: rockchip: Prevent calculating mmc phase if
 clock rate is zero

[ Upstream commit 4bf59902b50012b1dddeeaa23b217d9c4956cdda ]

The MMC sample and drv clock for rockchip platforms are derived from
the bus clock output to the MMC/SDIO card. So it should never happens
that the clk rate is zero given it should inherits the clock rate from
its parent. If something goes wrong and makes the clock rate to be zero,
the calculation would be wrong but may still make the mmc tuning process
work luckily. However it makes people harder to debug when the following
data transfer is unstable.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/rockchip/clk-mmc-phase.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c
index 7336446e6d534..6d60cc497493a 100644
--- a/drivers/clk/rockchip/clk-mmc-phase.c
+++ b/drivers/clk/rockchip/clk-mmc-phase.c
@@ -101,10 +101,8 @@ static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees)
 	 * (2) It is assigned to the wrong parent.
 	 *
 	 * This check help debug the case (1), which seems to be the
-	 * most likely problem we often made and explicitly makes people
-	 * harder to debug the unstable mmc tuning stuff. So hope people
-	 * to have a close look at this comment to help check out what was
-	 * happening.
+	 * most likely problem we often face and which makes it difficult
+	 * for people to debug unstable mmc tuning results.
 	 */
 	if (!rate) {
 		pr_err("%s: invalid clk rate\n", __func__);

From 665613c186f8a99e7a0624c2f1a6c8698c32e882 Mon Sep 17 00:00:00 2001
From: Govindarajulu Varadarajan <gvaradar@cisco.com>
Date: Thu, 1 Mar 2018 11:07:23 -0800
Subject: [PATCH 0434/1852] enic: enable rq before updating rq descriptors

[ Upstream commit e8588e268509292550634d9a35f2723a207683b2 ]

rq should be enabled before posting the buffers to rq desc. If not hw sees
stale value and casuses DMAR errors.

Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/cisco/enic/enic_main.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index b36643ef0593a..0e3b2ebf87f18 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -1726,6 +1726,8 @@ static int enic_open(struct net_device *netdev)
 	}
 
 	for (i = 0; i < enic->rq_count; i++) {
+		/* enable rq before updating rq desc */
+		vnic_rq_enable(&enic->rq[i]);
 		vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
 		/* Need at least one buffer on ring to get going */
 		if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
@@ -1737,8 +1739,6 @@ static int enic_open(struct net_device *netdev)
 
 	for (i = 0; i < enic->wq_count; i++)
 		vnic_wq_enable(&enic->wq[i]);
-	for (i = 0; i < enic->rq_count; i++)
-		vnic_rq_enable(&enic->rq[i]);
 
 	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
 		enic_dev_add_station_addr(enic);
@@ -1765,8 +1765,12 @@ static int enic_open(struct net_device *netdev)
 	return 0;
 
 err_out_free_rq:
-	for (i = 0; i < enic->rq_count; i++)
+	for (i = 0; i < enic->rq_count; i++) {
+		err = vnic_rq_disable(&enic->rq[i]);
+		if (err)
+			return err;
 		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
+	}
 	enic_dev_notify_unset(enic);
 err_out_free_intr:
 	enic_unset_affinity_hint(enic);

From 4fbfeb1d0110c6f0abb04912ce76533d8ccce965 Mon Sep 17 00:00:00 2001
From: "lionel.debieve@st.com" <lionel.debieve@st.com>
Date: Thu, 15 Feb 2018 14:03:08 +0100
Subject: [PATCH 0435/1852] hwrng: stm32 - add reset during probe

[ Upstream commit 326ed382256475aa4b8b7eae8a2f60689fd25e78 ]

Avoid issue when probing the RNG without
reset if bad status has been detected previously

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/hw_random/stm32-rng.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c
index 92a810648bd00..530aacca3eb8e 100644
--- a/drivers/char/hw_random/stm32-rng.c
+++ b/drivers/char/hw_random/stm32-rng.c
@@ -21,6 +21,7 @@
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 
 #define RNG_CR 0x00
@@ -46,6 +47,7 @@ struct stm32_rng_private {
 	struct hwrng rng;
 	void __iomem *base;
 	struct clk *clk;
+	struct reset_control *rst;
 };
 
 static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
@@ -140,6 +142,13 @@ static int stm32_rng_probe(struct platform_device *ofdev)
 	if (IS_ERR(priv->clk))
 		return PTR_ERR(priv->clk);
 
+	priv->rst = devm_reset_control_get(&ofdev->dev, NULL);
+	if (!IS_ERR(priv->rst)) {
+		reset_control_assert(priv->rst);
+		udelay(2);
+		reset_control_deassert(priv->rst);
+	}
+
 	dev_set_drvdata(dev, priv);
 
 	priv->rng.name = dev_driver_string(dev),

From 76221eb5f4eee74f3a931dfef0c59d7af9dd6f3e Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Wed, 28 Feb 2018 11:28:49 +0000
Subject: [PATCH 0436/1852] staging: rtl8192u: return -ENOMEM on failed
 allocation of priv->oldaddr

[ Upstream commit e1a7418529e33bc4efc346324557251a16a3e79b ]

Currently the allocation of priv->oldaddr is not null checked which will
lead to subsequent errors when accessing priv->oldaddr.  Fix this with
a null pointer check and a return of -ENOMEM on allocation failure.

Detected with Coccinelle:
drivers/staging/rtl8192u/r8192U_core.c:1708:2-15: alloc with no test,
possible model on line 1723

Fixes: 8fc8598e61f6 ("Staging: Added Realtek rtl8192u driver to staging")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/staging/rtl8192u/r8192U_core.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c
index e06864f64beb8..0f6bc6b8e4c64 100644
--- a/drivers/staging/rtl8192u/r8192U_core.c
+++ b/drivers/staging/rtl8192u/r8192U_core.c
@@ -1749,6 +1749,8 @@ static short rtl8192_usb_initendpoints(struct net_device *dev)
 
 		priv->rx_urb[16] = usb_alloc_urb(0, GFP_KERNEL);
 		priv->oldaddr = kmalloc(16, GFP_KERNEL);
+		if (!priv->oldaddr)
+			return -ENOMEM;
 		oldaddr = priv->oldaddr;
 		align = ((long)oldaddr) & 3;
 		if (align) {

From f7cda30dc91d5f605f26babe425bb96d1a70e27c Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Thu, 15 Feb 2018 19:36:14 +0000
Subject: [PATCH 0437/1852] rtc: tx4939: avoid unintended sign extension on a
 24 bit shift

[ Upstream commit 347876ad47b9923ce26e686173bbf46581802ffa ]

The shifting of buf[5] by 24 bits to the left will be promoted to
a 32 bit signed int and then sign-extended to an unsigned long. If
the top bit of buf[5] is set then all then all the upper bits sec
end up as also being set because of the sign-extension. Fix this by
casting buf[5] to an unsigned long before the shift.

Detected by CoverityScan, CID#1465292 ("Unintended sign extension")

Fixes: 0e1492330cd2 ("rtc: add rtc-tx4939 driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/rtc/rtc-tx4939.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/rtc-tx4939.c b/drivers/rtc/rtc-tx4939.c
index 560d9a5e02253..a9528083061d5 100644
--- a/drivers/rtc/rtc-tx4939.c
+++ b/drivers/rtc/rtc-tx4939.c
@@ -86,7 +86,8 @@ static int tx4939_rtc_read_time(struct device *dev, struct rtc_time *tm)
 	for (i = 2; i < 6; i++)
 		buf[i] = __raw_readl(&rtcreg->dat);
 	spin_unlock_irq(&pdata->lock);
-	sec = (buf[5] << 24) | (buf[4] << 16) | (buf[3] << 8) | buf[2];
+	sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
+		(buf[3] << 8) | buf[2];
 	rtc_time_to_tm(sec, tm);
 	return rtc_valid_tm(tm);
 }
@@ -147,7 +148,8 @@ static int tx4939_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 	alrm->enabled = (ctl & TX4939_RTCCTL_ALME) ? 1 : 0;
 	alrm->pending = (ctl & TX4939_RTCCTL_ALMD) ? 1 : 0;
 	spin_unlock_irq(&pdata->lock);
-	sec = (buf[5] << 24) | (buf[4] << 16) | (buf[3] << 8) | buf[2];
+	sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
+		(buf[3] << 8) | buf[2];
 	rtc_time_to_tm(sec, &alrm->time);
 	return rtc_valid_tm(&alrm->time);
 }

From 9d38519555b67cead73234b8fd7dce935288bbba Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:37 +0100
Subject: [PATCH 0438/1852] serial: xuartps: Fix out-of-bounds access through
 DT alias

[ Upstream commit e7d75e18d0fc3f7193b65282b651f980c778d935 ]

The cdns_uart_port[] array is indexed using a value derived from the
"serialN" alias in DT, which may lead to an out-of-bounds access.

Fix this by adding a range check.

Fixes: 928e9263492069ee ("tty: xuartps: Initialize ports according to aliases")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/xilinx_uartps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index 009e0dbc12d2c..4f2f4aca8d2e1 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -1026,7 +1026,7 @@ static struct uart_port *cdns_uart_get_port(int id)
 	struct uart_port *port;
 
 	/* Try the given port id if failed use default method */
-	if (cdns_uart_port[id].mapbase != 0) {
+	if (id < CDNS_UART_NR_PORTS && cdns_uart_port[id].mapbase != 0) {
 		/* Find the next unused port */
 		for (id = 0; id < CDNS_UART_NR_PORTS; id++)
 			if (cdns_uart_port[id].mapbase == 0)

From 57c246d592e05f59600fc32b56a1abde1424db5c Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:34 +0100
Subject: [PATCH 0439/1852] serial: samsung: Fix out-of-bounds access through
 serial port index

[ Upstream commit 49ee23b71877831ac087d6083f6f397dc19c9664 ]

The s3c24xx_serial_ports[] array is indexed using a value derived from
the "serialN" alias in DT, or from an incrementing probe index, which
may lead to an out-of-bounds access.

Fix this by adding a range check.

Note that the array size is defined by a Kconfig symbol
(CONFIG_SERIAL_SAMSUNG_UARTS), so this can even be triggered using
a legitimate DTB or legitimate board code.

Fixes: 13a9f6c64fdc55eb ("serial: samsung: Consider DT alias when probing ports")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/samsung.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index e6bc1a6be4a4d..312343beb2490 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1807,6 +1807,10 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
 
 	dbg("s3c24xx_serial_probe(%p) %d\n", pdev, index);
 
+	if (index >= ARRAY_SIZE(s3c24xx_serial_ports)) {
+		dev_err(&pdev->dev, "serial%d out of range\n", index);
+		return -EINVAL;
+	}
 	ourport = &s3c24xx_serial_ports[index];
 
 	ourport->drv_data = s3c24xx_get_driver_data(pdev);

From c43857391dbfc27f45810331ce3a4bb23bee5b38 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:32 +0100
Subject: [PATCH 0440/1852] serial: mxs-auart: Fix out-of-bounds access through
 serial port index

[ Upstream commit dd345a31bfdec350d2593e6de5964e55c7f19c76 ]

The auart_port[] array is indexed using a value derived from the
"serialN" alias in DT, or from platform data, which may lead to an
out-of-bounds access.

Fix this by adding a range check.

Fixes: 1ea6607d4cdc9179 ("serial: mxs-auart: Allow device tree probing")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/mxs-auart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
index cd0414bbe0948..daa4a65ef6ffc 100644
--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -1274,6 +1274,10 @@ static int mxs_auart_probe(struct platform_device *pdev)
 		s->port.line = pdev->id < 0 ? 0 : pdev->id;
 	else if (ret < 0)
 		return ret;
+	if (s->port.line >= ARRAY_SIZE(auart_port)) {
+		dev_err(&pdev->dev, "serial%d out of range\n", s->port.line);
+		return -EINVAL;
+	}
 
 	if (of_id) {
 		pdev->id_entry = of_id->data;

From 6a9d561cdcf2cae7d240c946498f51b5c9ebc8c4 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:31 +0100
Subject: [PATCH 0441/1852] serial: imx: Fix out-of-bounds access through
 serial port index
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 5673444821406dda5fc25e4b52aca419f8065a19 ]

The imx_ports[] array is indexed using a value derived from the
"serialN" alias in DT, or from platform data, which may lead to an
out-of-bounds access.

Fix this by adding a range check.

Fixes: ff05967a07225ab6 ("serial/imx: add of_alias_get_id() reference back")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/imx.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 98176d12b3e11..07ede982b4729 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1923,6 +1923,12 @@ static int serial_imx_probe(struct platform_device *pdev)
 	else if (ret < 0)
 		return ret;
 
+	if (sport->port.line >= ARRAY_SIZE(imx_ports)) {
+		dev_err(&pdev->dev, "serial%d out of range\n",
+			sport->port.line);
+		return -EINVAL;
+	}
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(base))

From f5b6ec90ad9d16144f0a591c9c05685b9279f7be Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:30 +0100
Subject: [PATCH 0442/1852] serial: fsl_lpuart: Fix out-of-bounds access
 through DT alias

[ Upstream commit ffab87fdecc655cc676f8be8dd1a2c5e22bd6d47 ]

The lpuart_ports[] array is indexed using a value derived from the
"serialN" alias in DT, which may lead to an out-of-bounds access.

Fix this by adding a range check.

Fixes: c9e2e946fb0ba5d2 ("tty: serial: add Freescale lpuart driver support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/fsl_lpuart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 3d790033744ef..01e2274b23f2e 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1818,6 +1818,10 @@ static int lpuart_probe(struct platform_device *pdev)
 		dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
 		return ret;
 	}
+	if (ret >= ARRAY_SIZE(lpuart_ports)) {
+		dev_err(&pdev->dev, "serial%d out of range\n", ret);
+		return -EINVAL;
+	}
 	sport->port.line = ret;
 	sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart");
 

From 8bf6e3e434c6343667d3556b64230839b2edb0b0 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 23 Feb 2018 14:38:29 +0100
Subject: [PATCH 0443/1852] serial: arc_uart: Fix out-of-bounds access through
 DT alias

[ Upstream commit f9f5786987e81d166c60833edcb7d1836aa16944 ]

The arc_uart_ports[] array is indexed using a value derived from the
"serialN" alias in DT, which may lead to an out-of-bounds access.

Fix this by adding a range check.

Note that the array size is defined by a Kconfig symbol
(CONFIG_SERIAL_ARC_NR_PORTS), so this can even be triggered using a
legitimate DTB.

Fixes: ea28fd56fcde69af ("serial/arc-uart: switch to devicetree based probing")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/arc_uart.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/tty/serial/arc_uart.c b/drivers/tty/serial/arc_uart.c
index 03ebe401fff74..040018d596087 100644
--- a/drivers/tty/serial/arc_uart.c
+++ b/drivers/tty/serial/arc_uart.c
@@ -597,6 +597,11 @@ static int arc_serial_probe(struct platform_device *pdev)
 	if (dev_id < 0)
 		dev_id = 0;
 
+	if (dev_id >= ARRAY_SIZE(arc_uart_ports)) {
+		dev_err(&pdev->dev, "serial%d out of range\n", dev_id);
+		return -EINVAL;
+	}
+
 	uart = &arc_uart_ports[dev_id];
 	port = &uart->port;
 

From dac9d35b390733549d4ce766088772932ae450a9 Mon Sep 17 00:00:00 2001
From: Thomas Vincent-Cross <me@tvc.id.au>
Date: Tue, 27 Feb 2018 20:20:36 +1100
Subject: [PATCH 0444/1852] PCI: Add function 1 DMA alias quirk for Marvell
 88SE9220

[ Upstream commit 832e4e1f76b8a84991e9db56fdcef1ebce839b8b ]

Add Marvell 88SE9220 DMA quirk as found and tested on bug 42679.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679
Signed-off-by: Thomas Vincent-Cross <me@tvc.id.au>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/quirks.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7a13e84d3c277..5697b32819cbc 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3628,6 +3628,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x917a,
 /* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c46 */
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x91a0,
 			 quirk_dma_func1_alias);
+/* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c127 */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9220,
+			 quirk_dma_func1_alias);
 /* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c49 */
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9230,
 			 quirk_dma_func1_alias);

From 6650ccf37eb7337ec7827bc9ca0d7e172d34cc22 Mon Sep 17 00:00:00 2001
From: Jan Kara <jack@suse.cz>
Date: Thu, 22 Feb 2018 10:39:52 +0100
Subject: [PATCH 0445/1852] udf: Provide saner default for invalid uid / gid
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 116e5258e4115aca0c64ac0bf40ded3b353ed626 ]

Currently when UDF filesystem is recorded without uid / gid (ids are set
to -1), we will assign INVALID_[UG]ID to vfs inode unless user uses uid=
and gid= mount options. In such case filesystem could not be modified in
any way as VFS refuses to modify files with invalid ids (even by root).
This is confusing to users and not very useful default since such media
mode is generally used for removable media. Use overflow[ug]id instead
so that at least root can modify the filesystem.

Reported-by: Steve Kenton <skenton@ou.edu>
Reviewed-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/udf/super.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/udf/super.c b/fs/udf/super.c
index ee09c97f3ab29..159977ec8e548 100644
--- a/fs/udf/super.c
+++ b/fs/udf/super.c
@@ -2073,8 +2073,9 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
 	bool lvid_open = false;
 
 	uopt.flags = (1 << UDF_FLAG_USE_AD_IN_ICB) | (1 << UDF_FLAG_STRICT);
-	uopt.uid = INVALID_UID;
-	uopt.gid = INVALID_GID;
+	/* By default we'll use overflow[ug]id when UDF inode [ug]id == -1 */
+	uopt.uid = make_kuid(current_user_ns(), overflowuid);
+	uopt.gid = make_kgid(current_user_ns(), overflowgid);
 	uopt.umask = 0;
 	uopt.fmode = UDF_INVALID_MODE;
 	uopt.dmode = UDF_INVALID_MODE;

From af61f78e2ab116fa558eba8138017eb7f54366d5 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Wed, 31 Jan 2018 12:33:09 -0500
Subject: [PATCH 0446/1852] media: cx25821: prevent out-of-bounds read on array
 card

[ Upstream commit 67300abdbe9f1717532aaf4e037222762716d0f6 ]

Currently an out of range dev->nr is detected by just reporting the
issue and later on an out-of-bounds read on array card occurs because
of this. Fix this by checking the upper range of dev->nr with the size
of array card (removes the hard coded size), move this check earlier
and also exit with the error -ENOSYS to avoid the later out-of-bounds
array read.

Detected by CoverityScan, CID#711191 ("Out-of-bounds-read")

Fixes: commit 02b20b0b4cde ("V4L/DVB (12730): Add conexant cx25821 driver")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
[hans.verkuil@cisco.com: %ld -> %zd]
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/pci/cx25821/cx25821-core.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/media/pci/cx25821/cx25821-core.c b/drivers/media/pci/cx25821/cx25821-core.c
index 0042803a9de7c..54398d8a4696c 100644
--- a/drivers/media/pci/cx25821/cx25821-core.c
+++ b/drivers/media/pci/cx25821/cx25821-core.c
@@ -871,6 +871,10 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
 	dev->nr = ++cx25821_devcount;
 	sprintf(dev->name, "cx25821[%d]", dev->nr);
 
+	if (dev->nr >= ARRAY_SIZE(card)) {
+		CX25821_INFO("dev->nr >= %zd", ARRAY_SIZE(card));
+		return -ENODEV;
+	}
 	if (dev->pci->device != 0x8210) {
 		pr_info("%s(): Exiting. Incorrect Hardware device = 0x%02x\n",
 			__func__, dev->pci->device);
@@ -886,9 +890,6 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
 		dev->channels[i].sram_channels = &cx25821_sram_channels[i];
 	}
 
-	if (dev->nr > 1)
-		CX25821_INFO("dev->nr > 1!");
-
 	/* board config */
 	dev->board = 1;		/* card[dev->nr]; */
 	dev->_max_num_decoders = MAX_DECODERS;

From be7a055e704aa90ffb5b6e8fa9d7bfa13cacd74b Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Fri, 16 Feb 2018 15:57:53 +0100
Subject: [PATCH 0447/1852] clk: samsung: s3c2410: Fix PLL rates

[ Upstream commit 179db533c08431f509a3823077549773d519358b ]

Rates declared in PLL rate tables should match exactly rates calculated from
the PLL coefficients. If that is not the case, rate of the PLL's child clock
might be set not as expected. For instance, if in the PLL rates table we have
a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate
callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate
will return 393216003. If we now attempt to set rate of a PLL's child divider
clock to 393216000/2 its rate will be 131072001, rather than 196608000.
That is, the divider will be set to 3 instead of 2, because 393216003/2 is
greater than 196608000.

To fix this issue declared rates are changed to exactly match rates generated
by the PLL, as calculated from the P, M, S, K coefficients.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/samsung/clk-s3c2410.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c
index 0945a8852299d..69e3e848716a1 100644
--- a/drivers/clk/samsung/clk-s3c2410.c
+++ b/drivers/clk/samsung/clk-s3c2410.c
@@ -168,7 +168,7 @@ static struct samsung_pll_rate_table pll_s3c2410_12mhz_tbl[] __initdata = {
 	PLL_35XX_RATE(226000000, 105, 1, 1),
 	PLL_35XX_RATE(210000000, 132, 2, 1),
 	/* 2410 common */
-	PLL_35XX_RATE(203000000, 161, 3, 1),
+	PLL_35XX_RATE(202800000, 161, 3, 1),
 	PLL_35XX_RATE(192000000, 88, 1, 1),
 	PLL_35XX_RATE(186000000, 85, 1, 1),
 	PLL_35XX_RATE(180000000, 82, 1, 1),
@@ -178,18 +178,18 @@ static struct samsung_pll_rate_table pll_s3c2410_12mhz_tbl[] __initdata = {
 	PLL_35XX_RATE(147000000, 90, 2, 1),
 	PLL_35XX_RATE(135000000, 82, 2, 1),
 	PLL_35XX_RATE(124000000, 116, 1, 2),
-	PLL_35XX_RATE(118000000, 150, 2, 2),
+	PLL_35XX_RATE(118500000, 150, 2, 2),
 	PLL_35XX_RATE(113000000, 105, 1, 2),
-	PLL_35XX_RATE(101000000, 127, 2, 2),
+	PLL_35XX_RATE(101250000, 127, 2, 2),
 	PLL_35XX_RATE(90000000, 112, 2, 2),
-	PLL_35XX_RATE(85000000, 105, 2, 2),
+	PLL_35XX_RATE(84750000, 105, 2, 2),
 	PLL_35XX_RATE(79000000, 71, 1, 2),
-	PLL_35XX_RATE(68000000, 82, 2, 2),
-	PLL_35XX_RATE(56000000, 142, 2, 3),
+	PLL_35XX_RATE(67500000, 82, 2, 2),
+	PLL_35XX_RATE(56250000, 142, 2, 3),
 	PLL_35XX_RATE(48000000, 120, 2, 3),
-	PLL_35XX_RATE(51000000, 161, 3, 3),
+	PLL_35XX_RATE(50700000, 161, 3, 3),
 	PLL_35XX_RATE(45000000, 82, 1, 3),
-	PLL_35XX_RATE(34000000, 82, 2, 3),
+	PLL_35XX_RATE(33750000, 82, 2, 3),
 	{ /* sentinel */ },
 };
 

From 2a789cf14f811cd462525154f8c68c420a9c5d68 Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Fri, 16 Feb 2018 15:57:50 +0100
Subject: [PATCH 0448/1852] clk: samsung: exynos5260: Fix PLL rates

[ Upstream commit cdb68fbd4e7962be742c4f29475220c5bf28d8a5 ]

Rates declared in PLL rate tables should match exactly rates calculated from
the PLL coefficients. If that is not the case, rate of the PLL's child clock
might be set not as expected. For instance, if in the PLL rates table we have
a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate
callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate
will return 393216003. If we now attempt to set rate of a PLL's child divider
clock to 393216000/2 its rate will be 131072001, rather than 196608000.
That is, the divider will be set to 3 instead of 2, because 393216003/2 is
greater than 196608000.

To fix this issue declared rates are changed to exactly match rates generated
by the PLL, as calculated from the P, M, S, K coefficients.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/samsung/clk-exynos5260.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index d1a29f6c10849..7027e77bf8590 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c
@@ -65,7 +65,7 @@ static struct samsung_pll_rate_table pll2650_24mhz_tbl[] __initdata = {
 	PLL_36XX_RATE(480000000, 160, 2, 2, 0),
 	PLL_36XX_RATE(432000000, 144, 2, 2, 0),
 	PLL_36XX_RATE(400000000, 200, 3, 2, 0),
-	PLL_36XX_RATE(394073130, 459, 7, 2, 49282),
+	PLL_36XX_RATE(394073128, 459, 7, 2, 49282),
 	PLL_36XX_RATE(333000000, 111, 2, 2, 0),
 	PLL_36XX_RATE(300000000, 100, 2, 2, 0),
 	PLL_36XX_RATE(266000000, 266, 3, 3, 0),

From 40984bd8fde6fff1218e3a87f1ef4398d06818f0 Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Fri, 16 Feb 2018 15:57:51 +0100
Subject: [PATCH 0449/1852] clk: samsung: exynos5433: Fix PLL rates

[ Upstream commit ab0447845cffc0fd752df2ccd6b4e34006000ce4 ]

Rates declared in PLL rate tables should match exactly rates calculated from
the PLL coefficients. If that is not the case, rate of the PLL's child clock
might be set not as expected. For instance, if in the PLL rates table we have
a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate
callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate
will return 393216003. If we now attempt to set rate of a PLL's child divider
clock to 393216000/2 its rate will be 131072001, rather than 196608000.
That is, the divider will be set to 3 instead of 2, because 393216003/2 is
greater than 196608000.

To fix this issue declared rates are changed to exactly match rates generated
by the PLL, as calculated from the P, M, S, K coefficients.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/samsung/clk-exynos5433.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index cee062c588dec..91c89ac193b9a 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -747,7 +747,7 @@ static struct samsung_pll_rate_table exynos5443_pll_rates[] = {
 	PLL_35XX_RATE(800000000U,  400, 6,  1),
 	PLL_35XX_RATE(733000000U,  733, 12, 1),
 	PLL_35XX_RATE(700000000U,  175, 3,  1),
-	PLL_35XX_RATE(667000000U,  222, 4,  1),
+	PLL_35XX_RATE(666000000U,  222, 4,  1),
 	PLL_35XX_RATE(633000000U,  211, 4,  1),
 	PLL_35XX_RATE(600000000U,  500, 5,  2),
 	PLL_35XX_RATE(552000000U,  460, 5,  2),
@@ -773,12 +773,12 @@ static struct samsung_pll_rate_table exynos5443_pll_rates[] = {
 /* AUD_PLL */
 static struct samsung_pll_rate_table exynos5443_aud_pll_rates[] = {
 	PLL_36XX_RATE(400000000U, 200, 3, 2,      0),
-	PLL_36XX_RATE(393216000U, 197, 3, 2, -25690),
+	PLL_36XX_RATE(393216003U, 197, 3, 2, -25690),
 	PLL_36XX_RATE(384000000U, 128, 2, 2,      0),
-	PLL_36XX_RATE(368640000U, 246, 4, 2, -15729),
-	PLL_36XX_RATE(361507200U, 181, 3, 2, -16148),
-	PLL_36XX_RATE(338688000U, 113, 2, 2,  -6816),
-	PLL_36XX_RATE(294912000U,  98, 1, 3,  19923),
+	PLL_36XX_RATE(368639991U, 246, 4, 2, -15729),
+	PLL_36XX_RATE(361507202U, 181, 3, 2, -16148),
+	PLL_36XX_RATE(338687988U, 113, 2, 2,  -6816),
+	PLL_36XX_RATE(294912002U,  98, 1, 3,  19923),
 	PLL_36XX_RATE(288000000U,  96, 1, 3,      0),
 	PLL_36XX_RATE(252000000U,  84, 1, 3,      0),
 	{ /* sentinel */ }

From f1f77e63f561a45c1e0e53f451c1234cca1d1404 Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Fri, 16 Feb 2018 15:57:49 +0100
Subject: [PATCH 0450/1852] clk: samsung: exynos5250: Fix PLL rates

[ Upstream commit 2ac051eeabaa411ef89ae7cd5bb8e60cb41ad780 ]

Rates declared in PLL rate tables should match exactly rates calculated
from PLL coefficients. If that is not the case, rate of the PLL's child clock
might be set not as expected. For instance, if in the PLL rates table we have
a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate
callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate
will return 393216003. If we now attempt to set rate of a PLL's child divider
clock to 393216000/2 its rate will be 131072001, rather than 196608000.
That is, the divider will be set to 3 instead of 2, because 393216003/2 is
greater than 196608000.

To fix this issue declared rates are changed to exactly match rates generated
by the PLL, as calculated from the P, M, S, K coefficients.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/samsung/clk-exynos5250.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 5bebf8cb0d70f..f0b564c7c9c16 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -711,13 +711,13 @@ static struct samsung_pll_rate_table epll_24mhz_tbl[] __initdata = {
 	/* sorted in descending order */
 	/* PLL_36XX_RATE(rate, m, p, s, k) */
 	PLL_36XX_RATE(192000000, 64, 2, 2, 0),
-	PLL_36XX_RATE(180633600, 90, 3, 2, 20762),
+	PLL_36XX_RATE(180633605, 90, 3, 2, 20762),
 	PLL_36XX_RATE(180000000, 90, 3, 2, 0),
 	PLL_36XX_RATE(73728000, 98, 2, 4, 19923),
-	PLL_36XX_RATE(67737600, 90, 2, 4, 20762),
+	PLL_36XX_RATE(67737602, 90, 2, 4, 20762),
 	PLL_36XX_RATE(49152000, 98, 3, 4, 19923),
-	PLL_36XX_RATE(45158400, 90, 3, 4, 20762),
-	PLL_36XX_RATE(32768000, 131, 3, 5, 4719),
+	PLL_36XX_RATE(45158401, 90, 3, 4, 20762),
+	PLL_36XX_RATE(32768001, 131, 3, 5, 4719),
 	{ },
 };
 

From 115490bd7328e7d2e19822b4e69c4cd67f0ac94f Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Fri, 16 Feb 2018 15:57:48 +0100
Subject: [PATCH 0451/1852] clk: samsung: exynos3250: Fix PLL rates

[ Upstream commit a8321e7887410a2b2e80ab89d1ef7b30562658ea ]

Rates declared in PLL rate tables should match exactly rates calculated
from PLL coefficients. If that is not the case, rate of the PLL's child clock
might be set not as expected. For instance, if in the PLL rates table we have
a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate
callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate
will return 393216003. If we now attempt to set rate of a PLL's child divider
clock to 393216000/2 its rate will be 131072001, rather than 196608000.
That is, the divider will be set to 3 instead of 2, because 393216003/2 is
greater than 196608000.

To fix this issue declared rates are changed to exactly match rates generated
by the PLL, as calculated from the P, M, S, K coefficients.

In this patch an erroneous P value for 74176002 output frequency is also
corrected.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/samsung/clk-exynos3250.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index fdd41b17a24fc..294efaef5b820 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -683,7 +683,7 @@ static struct samsung_pll_rate_table exynos3250_epll_rates[] = {
 	PLL_36XX_RATE(144000000,  96, 2, 3,     0),
 	PLL_36XX_RATE( 96000000, 128, 2, 4,     0),
 	PLL_36XX_RATE( 84000000, 112, 2, 4,     0),
-	PLL_36XX_RATE( 80000004, 106, 2, 4, 43691),
+	PLL_36XX_RATE( 80000003, 106, 2, 4, 43691),
 	PLL_36XX_RATE( 73728000,  98, 2, 4, 19923),
 	PLL_36XX_RATE( 67737598, 270, 3, 5, 62285),
 	PLL_36XX_RATE( 65535999, 174, 2, 5, 49982),
@@ -719,7 +719,7 @@ static struct samsung_pll_rate_table exynos3250_vpll_rates[] = {
 	PLL_36XX_RATE(148352005,  98, 2, 3, 59070),
 	PLL_36XX_RATE(108000000, 144, 2, 4,     0),
 	PLL_36XX_RATE( 74250000,  99, 2, 4,     0),
-	PLL_36XX_RATE( 74176002,  98, 3, 4, 59070),
+	PLL_36XX_RATE( 74176002,  98, 2, 4, 59070),
 	PLL_36XX_RATE( 54054000, 216, 3, 5, 14156),
 	PLL_36XX_RATE( 54000000, 144, 2, 5,     0),
 	{ /* sentinel */ }

From eedea0a192fa325a7bbc0810ab8f627bb56402f4 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sun, 11 Feb 2018 23:15:37 +0000
Subject: [PATCH 0452/1852] crypto: sunxi-ss - Add MODULE_ALIAS to sun4i-ss

[ Upstream commit 7c73cf4cc2ac16465f5102437dc0a12d66671bd6 ]

The MODULE_ALIAS is required to enable the sun4i-ss driver to load
automatically when built at a module. Tested on a Cubietruck.

Fixes: 6298e948215f ("crypto: sunxi-ss - Add Allwinner Security System crypto accelerator")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/crypto/sunxi-ss/sun4i-ss-core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c
index 107cd2a41cae2..24651d3217cd0 100644
--- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c
+++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c
@@ -422,6 +422,7 @@ static struct platform_driver sun4i_ss_driver = {
 
 module_platform_driver(sun4i_ss_driver);
 
+MODULE_ALIAS("platform:sun4i-ss");
 MODULE_DESCRIPTION("Allwinner Security System cryptographic accelerator");
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Corentin LABBE <clabbe.montjoie@gmail.com>");

From 83ccd63dfdc596285fcee6bd80fbea1065311773 Mon Sep 17 00:00:00 2001
From: Richard Guy Briggs <rgb@redhat.com>
Date: Wed, 21 Feb 2018 04:30:07 -0500
Subject: [PATCH 0453/1852] audit: return on memory error to avoid null pointer
 dereference

[ Upstream commit 23138ead270045f1b3e912e667967b6094244999 ]

If there is a memory allocation error when trying to change an audit
kernel feature value, the ignored allocation error will trigger a NULL
pointer dereference oops on subsequent use of that pointer.  Return
instead.

Passes audit-testsuite.
See: https://github.com/linux-audit/audit-kernel/issues/76

Signed-off-by: Richard Guy Briggs <rgb@redhat.com>
[PM: not necessary (other funcs check for NULL), but a good practice]
Signed-off-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/audit.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/kernel/audit.c b/kernel/audit.c
index d8e9fba58cbc1..d440c25cb3be3 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -744,6 +744,8 @@ static void audit_log_feature_change(int which, u32 old_feature, u32 new_feature
 		return;
 
 	ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_FEATURE_CHANGE);
+	if (!ab)
+		return;
 	audit_log_task_info(ab, current);
 	audit_log_format(ab, " feature=%s old=%u new=%u old_lock=%u new_lock=%u res=%d",
 			 audit_feature_names[which], !!old_feature, !!new_feature,

From 4e4c767e500336be632c14bc0f9b5017038b87f2 Mon Sep 17 00:00:00 2001
From: Joe Perches <joe@perches.com>
Date: Tue, 5 Dec 2017 23:04:58 -0800
Subject: [PATCH 0454/1852] MIPS: Octeon: Fix logging messages with spurious
 periods after newlines

[ Upstream commit db6775ca6e0353d2618ca7d5e210fc36ad43bbd4 ]

Using a period after a newline causes bad output.

Fixes: 64b139f97c01 ("MIPS: OCTEON: irq: add CIB and other fixes")
Signed-off-by: Joe Perches <joe@perches.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17886/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/cavium-octeon/octeon-irq.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 10d0b21403754..63d35076722d0 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -2240,7 +2240,7 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
 
 	parent_irq = irq_of_parse_and_map(ciu_node, 0);
 	if (!parent_irq) {
-		pr_err("ERROR: Couldn't acquire parent_irq for %s\n.",
+		pr_err("ERROR: Couldn't acquire parent_irq for %s\n",
 			ciu_node->name);
 		return -EINVAL;
 	}
@@ -2252,7 +2252,7 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
 
 	addr = of_get_address(ciu_node, 0, NULL, NULL);
 	if (!addr) {
-		pr_err("ERROR: Couldn't acquire reg(0) %s\n.", ciu_node->name);
+		pr_err("ERROR: Couldn't acquire reg(0) %s\n", ciu_node->name);
 		return -EINVAL;
 	}
 	host_data->raw_reg = (u64)phys_to_virt(
@@ -2260,7 +2260,7 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
 
 	addr = of_get_address(ciu_node, 1, NULL, NULL);
 	if (!addr) {
-		pr_err("ERROR: Couldn't acquire reg(1) %s\n.", ciu_node->name);
+		pr_err("ERROR: Couldn't acquire reg(1) %s\n", ciu_node->name);
 		return -EINVAL;
 	}
 	host_data->en_reg = (u64)phys_to_virt(
@@ -2268,7 +2268,7 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
 
 	r = of_property_read_u32(ciu_node, "cavium,max-bits", &val);
 	if (r) {
-		pr_err("ERROR: Couldn't read cavium,max-bits from %s\n.",
+		pr_err("ERROR: Couldn't read cavium,max-bits from %s\n",
 			ciu_node->name);
 		return r;
 	}
@@ -2278,7 +2278,7 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
 					   &octeon_irq_domain_cib_ops,
 					   host_data);
 	if (!cib_domain) {
-		pr_err("ERROR: Couldn't irq_domain_add_linear()\n.");
+		pr_err("ERROR: Couldn't irq_domain_add_linear()\n");
 		return -ENOMEM;
 	}
 

From 09762e0bb2edf8dd7b8a3db4ca1c42b986a16334 Mon Sep 17 00:00:00 2001
From: Baoquan He <bhe@redhat.com>
Date: Wed, 14 Feb 2018 13:46:56 +0800
Subject: [PATCH 0455/1852] x86/apic: Set up through-local-APIC mode on the
 boot CPU if 'noapic' specified

[ Upstream commit bee3204ec3c49f6f53add9c3962c9012a5c036fa ]

Currently the kdump kernel becomes very slow if 'noapic' is specified.
Normal kernel doesn't have this bug.

Kernel parameter 'noapic' is used to disable IO-APIC in system for
testing or special purpose. Here the root cause is that in kdump
kernel LAPIC is disabled since commit:

  522e664644 ("x86/apic: Disable I/O APIC before shutdown of the local APIC")

In this case we need set up through-local-APIC on boot CPU in
setup_local_APIC().

In normal kernel the legacy irq mode is enabled by the BIOS. If
it is virtual wire mode, the local-APIC has been enabled and set as
through-local-APIC.

Though we fixed the regression introduced by commit 522e664644,
to further improve robustness set up the through-local-APIC mode
explicitly, do not rely on the default boot IRQ mode.

Signed-off-by: Baoquan He <bhe@redhat.com>
Reviewed-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: douly.fnst@cn.fujitsu.com
Cc: joro@8bytes.org
Cc: prarit@redhat.com
Cc: uobergfe@redhat.com
Link: http://lkml.kernel.org/r/20180214054656.3780-7-bhe@redhat.com
[ Rewrote the changelog. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/apic/apic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index a3e1f8497f8c6..deddc9b932990 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1368,7 +1368,7 @@ void setup_local_APIC(void)
 	 * TODO: set up through-local-APIC from through-I/O-APIC? --macro
 	 */
 	value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
-	if (!cpu && (pic_mode || !value)) {
+	if (!cpu && (pic_mode || !value || skip_ioapic_setup)) {
 		value = APIC_DM_EXTINT;
 		apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
 	} else {

From 93b383df9648a65bb3c91fcf56ba71e4eb36f1c5 Mon Sep 17 00:00:00 2001
From: Jiri Olsa <jolsa@kernel.org>
Date: Thu, 15 Feb 2018 13:26:35 +0100
Subject: [PATCH 0456/1852] perf tests: Use arch__compare_symbol_names to
 compare symbols

[ Upstream commit ab6e9a99345131cd8e54268d1d0dc04a33f7ed11 ]

The symbol search called by machine__find_kernel_symbol_by_name is using
internally arch__compare_symbol_names function to compare 2 symbol
names, because different archs have different ways of comparing symbols.
Mostly for skipping '.' prefixes and similar.

In test 1 when we try to find matching symbols in kallsyms and vmlinux,
by address and by symbol name. When either is found we compare the pair
symbol names  by simple strcmp, which is not good enough for reasons
explained in previous paragraph.

On powerpc this can cause lockup, because even thought we found the
pair, the compared names are different and don't match simple strcmp.
Following code path is executed, that leads to lockup:

   - we find the pair in kallsyms by sym->start
next_pair:
   - we compare the names and it fails
   - we find the pair by sym->name
   - the pair addresses match so we call goto next_pair
     because we assume the names match in this case

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Fixes: 031b84c407c3 ("perf probe ppc: Enable matching against dot symbols automatically")
Link: http://lkml.kernel.org/r/20180215122635.24029-10-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/tests/vmlinux-kallsyms.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/tests/vmlinux-kallsyms.c b/tools/perf/tests/vmlinux-kallsyms.c
index d677e018e5042..bf907c50fcaea 100644
--- a/tools/perf/tests/vmlinux-kallsyms.c
+++ b/tools/perf/tests/vmlinux-kallsyms.c
@@ -126,7 +126,7 @@ int test__vmlinux_matches_kallsyms(void)
 
 		if (pair && UM(pair->start) == mem_start) {
 next_pair:
-			if (strcmp(sym->name, pair->name) == 0) {
+			if (arch__compare_symbol_names(sym->name, pair->name) == 0) {
 				/*
 				 * kallsyms don't have the symbol end, so we
 				 * set that by using the next symbol start - 1,

From 0bb69fb1ff6e4eaedabb090a889eb79a1aca124c Mon Sep 17 00:00:00 2001
From: Jiri Olsa <jolsa@redhat.com>
Date: Fri, 16 Feb 2018 13:36:19 +0100
Subject: [PATCH 0457/1852] perf report: Fix memory corruption in
 --branch-history mode --branch-history

[ Upstream commit e3ebaa465136ecfedf9c6f4671df02bf625f8125 ]

Jin Yao reported memory corrupton in perf report with
branch info used for stack trace:

  > Following command lines will cause perf crash.

  > perf record -j call -g -a <application>
  > perf report --branch-history
  >
  > *** Error in `perf': double free or corruption (!prev): 0x00000000104aa040 ***
  > ======= Backtrace: =========
  > /lib/x86_64-linux-gnu/libc.so.6(+0x77725)[0x7f6b37254725]
  > /lib/x86_64-linux-gnu/libc.so.6(+0x7ff4a)[0x7f6b3725cf4a]
  > /lib/x86_64-linux-gnu/libc.so.6(cfree+0x4c)[0x7f6b37260abc]
  > perf[0x51b914]
  > perf(hist_entry_iter__add+0x1e5)[0x51f305]
  > perf[0x43cf01]
  > perf[0x4fa3bf]
  > perf[0x4fa923]
  > perf[0x4fd396]
  > perf[0x4f9614]
  > perf(perf_session__process_events+0x89e)[0x4fc38e]
  > perf(cmd_report+0x15d2)[0x43f202]
  > perf[0x4a059f]
  > perf(main+0x631)[0x427b71]
  > /lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0xf0)[0x7f6b371fd830]
  > perf(_start+0x29)[0x427d89]

For the cumulative output, we allocate the he_cache array based on the
--max-stack option value and populate it with data from 'callchain_cursor'.

The --max-stack option value does not ensure now the limit for number of
callchain_cursor nodes, so the cumulative iter code will allocate smaller array
than it's actually needed and cause above corruption.

I think the --max-stack limit does not apply here anyway, because we add
callchain data as normal hist entries, while the --max-stack control the limit
of single entry callchain depth.

Using the callchain_cursor.nr as he_cache array count to fix this. Also
removing struct hist_entry_iter::max_stack, because there's no longer any use
for it.

We need more fixes to ensure that the branch stack code follows properly the
logic of --max-stack, which is not the case at the moment.

Original-patch-by: Jin Yao <yao.jin@linux.intel.com>
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Reported-by: Jin Yao <yao.jin@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20180216123619.GA9945@krava
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/hist.c | 4 +---
 tools/perf/util/hist.h | 1 -
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index 4fd37d6708cb9..f6720afa9f346 100644
--- a/tools/perf/util/hist.c
+++ b/tools/perf/util/hist.c
@@ -720,7 +720,7 @@ iter_prepare_cumulative_entry(struct hist_entry_iter *iter,
 	 * cumulated only one time to prevent entries more than 100%
 	 * overhead.
 	 */
-	he_cache = malloc(sizeof(*he_cache) * (iter->max_stack + 1));
+	he_cache = malloc(sizeof(*he_cache) * (callchain_cursor.nr + 1));
 	if (he_cache == NULL)
 		return -ENOMEM;
 
@@ -881,8 +881,6 @@ int hist_entry_iter__add(struct hist_entry_iter *iter, struct addr_location *al,
 	if (err)
 		return err;
 
-	iter->max_stack = max_stack_depth;
-
 	err = iter->ops->prepare_entry(iter, al);
 	if (err)
 		goto out;
diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h
index a48a2078d288f..46b7591acd9c6 100644
--- a/tools/perf/util/hist.h
+++ b/tools/perf/util/hist.h
@@ -91,7 +91,6 @@ struct hist_entry_iter {
 	int curr;
 
 	bool hide_unresolved;
-	int max_stack;
 
 	struct perf_evsel *evsel;
 	struct perf_sample *sample;

From 5269a1f31fbda1bbc5f18c1bb51a320a0dc0ba10 Mon Sep 17 00:00:00 2001
From: Prashant Bhole <bhole_prashant_q7@lab.ntt.co.jp>
Date: Thu, 15 Feb 2018 09:19:26 +0900
Subject: [PATCH 0458/1852] selftests/net: fixes psock_fanout eBPF test case

[ Upstream commit ddd0010392d9cbcb95b53d11b7cafc67b373ab56 ]

eBPF test fails due to verifier failure because log_buf is too small.
Fixed by increasing log_buf size

Signed-off-by: Prashant Bhole <bhole_prashant_q7@lab.ntt.co.jp>
Acked-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/net/psock_fanout.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/net/psock_fanout.c b/tools/testing/selftests/net/psock_fanout.c
index 4124593696862..9b654a070e7d8 100644
--- a/tools/testing/selftests/net/psock_fanout.c
+++ b/tools/testing/selftests/net/psock_fanout.c
@@ -97,6 +97,8 @@ static int sock_fanout_open(uint16_t typeflags, int num_packets)
 
 static void sock_fanout_set_ebpf(int fd)
 {
+	static char log_buf[65536];
+
 	const int len_off = __builtin_offsetof(struct __sk_buff, len);
 	struct bpf_insn prog[] = {
 		{ BPF_ALU64 | BPF_MOV | BPF_X,   6, 1, 0, 0 },
@@ -109,7 +111,6 @@ static void sock_fanout_set_ebpf(int fd)
 		{ BPF_ALU   | BPF_MOV | BPF_K,   0, 0, 0, 0 },
 		{ BPF_JMP   | BPF_EXIT,          0, 0, 0, 0 }
 	};
-	char log_buf[512];
 	union bpf_attr attr;
 	int pfd;
 

From b46ed521ef87c41f5e864e954e75ff98ad0ee30f Mon Sep 17 00:00:00 2001
From: Richard Haines <richard_c_haines@btinternet.com>
Date: Mon, 13 Nov 2017 20:54:22 +0000
Subject: [PATCH 0459/1852] netlabel: If PF_INET6, check sk_buff ip header
 version

[ Upstream commit 213d7f94775322ba44e0bbb55ec6946e9de88cea ]

When resolving a fallback label, check the sk_buff version as it
is possible (e.g. SCTP) to have family = PF_INET6 while
receiving ip_hdr(skb)->version = 4.

Signed-off-by: Richard Haines <richard_c_haines@btinternet.com>
Acked-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netlabel/netlabel_unlabeled.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/net/netlabel/netlabel_unlabeled.c b/net/netlabel/netlabel_unlabeled.c
index b0380927f05f9..3f33ec44bd283 100644
--- a/net/netlabel/netlabel_unlabeled.c
+++ b/net/netlabel/netlabel_unlabeled.c
@@ -1469,6 +1469,16 @@ int netlbl_unlabel_getattr(const struct sk_buff *skb,
 		iface = rcu_dereference(netlbl_unlhsh_def);
 	if (iface == NULL || !iface->valid)
 		goto unlabel_getattr_nolabel;
+
+#if IS_ENABLED(CONFIG_IPV6)
+	/* When resolving a fallback label, check the sk_buff version as
+	 * it is possible (e.g. SCTP) to have family = PF_INET6 while
+	 * receiving ip_hdr(skb)->version = 4.
+	 */
+	if (family == PF_INET6 && ip_hdr(skb)->version == 4)
+		family = PF_INET;
+#endif /* IPv6 */
+
 	switch (family) {
 	case PF_INET: {
 		struct iphdr *hdr4;

From b329a6a0d3cf961c7f1e50397f279fdbe7f92388 Mon Sep 17 00:00:00 2001
From: James Smart <jsmart2021@gmail.com>
Date: Tue, 30 Jan 2018 15:58:55 -0800
Subject: [PATCH 0460/1852] scsi: lpfc: Fix issue_lip if link is disabled

[ Upstream commit 2289e9598dde9705400559ca2606fb8c145c34f0 ]

The driver ignored checks on whether the link should be kept
administratively down after a link bounce. Correct the checks.

Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/lpfc/lpfc_attr.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 4639dac64e7f4..f096766150bc9 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -634,7 +634,12 @@ lpfc_issue_lip(struct Scsi_Host *shost)
 	LPFC_MBOXQ_t *pmboxq;
 	int mbxstatus = MBXERR_ERROR;
 
+	/*
+	 * If the link is offline, disabled or BLOCK_MGMT_IO
+	 * it doesn't make any sense to allow issue_lip
+	 */
 	if ((vport->fc_flag & FC_OFFLINE_MODE) ||
+	    (phba->hba_flag & LINK_DISABLED) ||
 	    (phba->sli.sli_flag & LPFC_BLOCK_MGMT_IO))
 		return -EPERM;
 

From 301fa53ccb3964f17fe90affdeef4665fc2a8a9c Mon Sep 17 00:00:00 2001
From: James Smart <jsmart2021@gmail.com>
Date: Tue, 30 Jan 2018 15:58:54 -0800
Subject: [PATCH 0461/1852] scsi: lpfc: Fix soft lockup in lpfc worker thread
 during LIP testing

[ Upstream commit 161df4f09987ae2e9f0f97f0b38eee298b4a39ff ]

During link bounce testing in a point-to-point topology, the host may
enter a soft lockup on the lpfc_worker thread:

    Call Trace:
     lpfc_work_done+0x1f3/0x1390 [lpfc]
     lpfc_do_work+0x16f/0x180 [lpfc]
     kthread+0xc7/0xe0
     ret_from_fork+0x3f/0x70

The driver was simultaneously setting a combination of flags that caused
lpfc_do_work()to effectively spin between slow path work and new event
data, causing the lockup.

Ensure in the typical wq completions, that new event data flags are set
if the slow path flag is running. The slow path will eventually
reschedule the wq handling.

Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/lpfc/lpfc_hbadisc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index be901f6db6d31..4131addfb8729 100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -691,8 +691,9 @@ lpfc_work_done(struct lpfc_hba *phba)
 	    (phba->hba_flag & HBA_SP_QUEUE_EVT)) {
 		if (pring->flag & LPFC_STOP_IOCB_EVENT) {
 			pring->flag |= LPFC_DEFERRED_RING_EVENT;
-			/* Set the lpfc data pending flag */
-			set_bit(LPFC_DATA_READY, &phba->data_flags);
+			/* Preserve legacy behavior. */
+			if (!(phba->hba_flag & HBA_SP_QUEUE_EVT))
+				set_bit(LPFC_DATA_READY, &phba->data_flags);
 		} else {
 			if (phba->link_state >= LPFC_LINK_UP) {
 				pring->flag &= ~LPFC_DEFERRED_RING_EVENT;

From dae87d4b2e0de6c5c1ae7c60e8bb8ae590912f1d Mon Sep 17 00:00:00 2001
From: James Smart <jsmart2021@gmail.com>
Date: Tue, 30 Jan 2018 15:58:45 -0800
Subject: [PATCH 0462/1852] scsi: lpfc: Fix frequency of Release WQE CQEs

[ Upstream commit 04673e38f56b30cd39b1fa0f386137d818b17781 ]

The driver controls when the hardware sends completions that communicate
consumption of elements from the WQ. This is done by setting a WQEC bit
on a WQE.

The current driver sets it on every Nth WQE posting. However, the driver
isn't clearing the bit if the WQE is reused. Thus, if the queue depth
isn't evenly divisible by N, with enough time, it can be set on every
element, creating a lot of overhead and risking CQ full conditions.

Correct by clearing the bit when not setting it on an Nth element.

Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/lpfc/lpfc_sli.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index ef43847153ead..3406586b92012 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -115,6 +115,8 @@ lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe *wqe)
 	/* set consumption flag every once in a while */
 	if (!((q->host_index + 1) % q->entry_repost))
 		bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
+	else
+		bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
 	if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
 		bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
 	lpfc_sli_pcimem_bcopy(wqe, temp_wqe, q->entry_size);

From bfed3ebe616998b8992b3fd6e331a258ed4aafa1 Mon Sep 17 00:00:00 2001
From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Date: Fri, 26 Jan 2018 23:13:44 +0100
Subject: [PATCH 0463/1852] regulator: of: Add a missing 'of_node_put()' in an
 error handling path of 'of_regulator_match()'

[ Upstream commit 30966861a7a2051457be8c49466887d78cc47e97 ]

If an unlikely failure in 'of_get_regulator_init_data()' occurs, we must
release the reference on the current 'child' node before returning.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/regulator/of_regulator.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c
index 3e829496ba814..ecb520b74b6c1 100644
--- a/drivers/regulator/of_regulator.c
+++ b/drivers/regulator/of_regulator.c
@@ -305,6 +305,7 @@ int of_regulator_match(struct device *dev, struct device_node *node,
 				dev_err(dev,
 					"failed to parse DT for regulator %s\n",
 					child->name);
+				of_node_put(child);
 				return -EINVAL;
 			}
 			match->of_node = of_node_get(child);

From f43463b767fa5e747650848ec1c7a5d09bff0485 Mon Sep 17 00:00:00 2001
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 5 Feb 2018 16:43:56 +0100
Subject: [PATCH 0464/1852] ASoC: samsung: i2s: Ensure the RCLK rate is
 properly determined

[ Upstream commit 647d04f8e07afc7c3b7a42b3ee01a8b28db29631 ]

If the RCLK mux clock configuration is specified in DT and no set_sysclk()
callback is used in the sound card driver the sclk_srcrate field will remain
set to 0, leading to an incorrect PSR divider setting.
To fix this the frequency value is retrieved from the CLK_I2S_RCLK_SRC clock,
so the actual RCLK mux selection is taken into account.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/samsung/i2s.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index fd6e247d9fd85..91bad6731c9d3 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -640,8 +640,12 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
 		tmp |= mod_slave;
 		break;
 	case SND_SOC_DAIFMT_CBS_CFS:
-		/* Set default source clock in Master mode */
-		if (i2s->rclk_srcrate == 0)
+		/*
+		 * Set default source clock in Master mode, only when the
+		 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
+		 * clock configuration assigned in DT is not overwritten.
+		 */
+		if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
 			i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 							0, SND_SOC_CLOCK_IN);
 		break;
@@ -856,6 +860,11 @@ static int config_setup(struct i2s_dai *i2s)
 		return 0;
 
 	if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
+		struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
+
+		if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc))
+			i2s->rclk_srcrate = clk_get_rate(rclksrc);
+
 		psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
 		writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 		dev_dbg(&i2s->pdev->dev,

From 6dfd3da2457cee780f149cccb47a727d544d8fea Mon Sep 17 00:00:00 2001
From: Larry Finger <Larry.Finger@lwfinger.net>
Date: Sun, 11 Feb 2018 12:24:32 -0600
Subject: [PATCH 0465/1852] Bluetooth: btusb: Add device ID for RTL8822BE

[ Upstream commit fed03fe7e55b7dc16077f672bd9d7bbe92b3a691 ]

The Asus Z370-I contains a Realtek RTL8822BE device with an associated
BT chip using a USB ID of 0b05:185c. This device is added to the driver.

Signed-off-by: Hon Weng Chong <honwchong@gmail.com>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/bluetooth/btusb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 054fdf7199dea..91676535a1a3c 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -346,6 +346,9 @@ static const struct usb_device_id blacklist_table[] = {
 	{ USB_DEVICE(0x13d3, 0x3461), .driver_info = BTUSB_REALTEK },
 	{ USB_DEVICE(0x13d3, 0x3462), .driver_info = BTUSB_REALTEK },
 
+	/* Additional Realtek 8822BE Bluetooth devices */
+	{ USB_DEVICE(0x0b05, 0x185c), .driver_info = BTUSB_REALTEK },
+
 	/* Silicon Wave based devices */
 	{ USB_DEVICE(0x0c10, 0x0000), .driver_info = BTUSB_SWAVE },
 

From ead65f6982d63f08f49e3107beb286246cc11605 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Fri, 8 Dec 2017 10:19:19 -0800
Subject: [PATCH 0466/1852] kdb: make "mdr" command repeat

[ Upstream commit 1e0ce03bf142454f38a5fc050bf4fd698d2d36d8 ]

The "mdr" command should repeat (continue) when only Enter/Return
is pressed, so make it do so.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: kgdb-bugreport@lists.sourceforge.net
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/debug/kdb/kdb_main.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/kernel/debug/kdb/kdb_main.c b/kernel/debug/kdb/kdb_main.c
index 2a20c0dfdafc7..5a58421d7e2d7 100644
--- a/kernel/debug/kdb/kdb_main.c
+++ b/kernel/debug/kdb/kdb_main.c
@@ -1564,6 +1564,7 @@ static int kdb_md(int argc, const char **argv)
 	int symbolic = 0;
 	int valid = 0;
 	int phys = 0;
+	int raw = 0;
 
 	kdbgetintenv("MDCOUNT", &mdcount);
 	kdbgetintenv("RADIX", &radix);
@@ -1573,9 +1574,10 @@ static int kdb_md(int argc, const char **argv)
 	repeat = mdcount * 16 / bytesperword;
 
 	if (strcmp(argv[0], "mdr") == 0) {
-		if (argc != 2)
+		if (argc == 2 || (argc == 0 && last_addr != 0))
+			valid = raw = 1;
+		else
 			return KDB_ARGCOUNT;
-		valid = 1;
 	} else if (isdigit(argv[0][2])) {
 		bytesperword = (int)(argv[0][2] - '0');
 		if (bytesperword == 0) {
@@ -1611,7 +1613,10 @@ static int kdb_md(int argc, const char **argv)
 		radix = last_radix;
 		bytesperword = last_bytesperword;
 		repeat = last_repeat;
-		mdcount = ((repeat * bytesperword) + 15) / 16;
+		if (raw)
+			mdcount = repeat;
+		else
+			mdcount = ((repeat * bytesperword) + 15) / 16;
 	}
 
 	if (argc) {
@@ -1628,7 +1633,10 @@ static int kdb_md(int argc, const char **argv)
 			diag = kdbgetularg(argv[nextarg], &val);
 			if (!diag) {
 				mdcount = (int) val;
-				repeat = mdcount * 16 / bytesperword;
+				if (raw)
+					repeat = mdcount;
+				else
+					repeat = mdcount * 16 / bytesperword;
 			}
 		}
 		if (argc >= nextarg+1) {
@@ -1638,8 +1646,15 @@ static int kdb_md(int argc, const char **argv)
 		}
 	}
 
-	if (strcmp(argv[0], "mdr") == 0)
-		return kdb_mdr(addr, mdcount);
+	if (strcmp(argv[0], "mdr") == 0) {
+		int ret;
+		last_addr = addr;
+		ret = kdb_mdr(addr, mdcount);
+		last_addr += mdcount;
+		last_repeat = mdcount;
+		last_bytesperword = bytesperword; // to make REPEAT happy
+		return ret;
+	}
 
 	switch (radix) {
 	case 10:

From b74b24f9e0c6eea7c8cb9a5ece827c79e2ea7d53 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Wed, 25 Apr 2018 18:35:26 +0200
Subject: [PATCH 0467/1852] s390/ftrace: use expoline for indirect branches

commit 23a4d7fd34856da8218c4cfc23dba7a6ec0a423a upstream.

The return from the ftrace_stub, _mcount, ftrace_caller and
return_to_handler functions is done with "br %r14" and "br %r1".
These are indirect branches as well and need to use execute
trampolines for CONFIG_EXPOLINE=y.

The ftrace_caller function is a special case as it returns to the
start of a function and may only use %r0 and %r1. For a pre z10
machine the standard execute trampoline uses a LARL + EX to do
this, but this requires *two* registers in the range %r1..%r15.
To get around this the 'br %r1' located in the lowcore is used,
then the EX instruction does not need an address register.
But the lowcore trick may only be used for pre z14 machines,
with noexec=on the mapping for the first page may not contain
instructions. The solution for that is an ALTERNATIVE in the
expoline THUNK generated by 'GEN_BR_THUNK %r1' to switch to
EXRL, this relies on the fact that a machine that supports
noexec=on has EXRL as well.

Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/nospec-insn.h | 13 +++++++++++++
 arch/s390/kernel/asm-offsets.c      |  1 +
 arch/s390/kernel/mcount.S           | 14 +++++++++-----
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/arch/s390/include/asm/nospec-insn.h b/arch/s390/include/asm/nospec-insn.h
index 087fc9b972c5d..9a56e738d645a 100644
--- a/arch/s390/include/asm/nospec-insn.h
+++ b/arch/s390/include/asm/nospec-insn.h
@@ -2,10 +2,15 @@
 #ifndef _ASM_S390_NOSPEC_ASM_H
 #define _ASM_S390_NOSPEC_ASM_H
 
+#include <asm/alternative-asm.h>
+#include <asm/asm-offsets.h>
+
 #ifdef __ASSEMBLY__
 
 #ifdef CONFIG_EXPOLINE
 
+_LC_BR_R1 = __LC_BR_R1
+
 /*
  * The expoline macros are used to create thunks in the same format
  * as gcc generates them. The 'comdat' section flag makes sure that
@@ -101,13 +106,21 @@
 	.endm
 
 	.macro __THUNK_EX_BR reg,ruse
+	# Be very careful when adding instructions to this macro!
+	# The ALTERNATIVE replacement code has a .+10 which targets
+	# the "br \reg" after the code has been patched.
 #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 	exrl	0,555f
 	j	.
 #else
+	.ifc \reg,%r1
+	ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
+	j	.
+	.else
 	larl	\ruse,555f
 	ex	0,0(\ruse)
 	j	.
+	.endif
 #endif
 555:	br	\reg
 	.endm
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index dc6c9c6045430..39572281e2130 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -170,6 +170,7 @@ int main(void)
 	OFFSET(__LC_MACHINE_FLAGS, _lowcore, machine_flags);
 	OFFSET(__LC_GMAP, _lowcore, gmap);
 	OFFSET(__LC_PASTE, _lowcore, paste);
+	OFFSET(__LC_BR_R1, _lowcore, br_r1_trampoline);
 	/* software defined ABI-relevant lowcore locations 0xe00 - 0xe20 */
 	OFFSET(__LC_DUMP_REIPL, _lowcore, ipib);
 	/* hardware defined lowcore locations 0x1000 - 0x18ff */
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
index e499370fbccb3..6c1c7d399bf95 100644
--- a/arch/s390/kernel/mcount.S
+++ b/arch/s390/kernel/mcount.S
@@ -8,12 +8,16 @@
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
 #include <asm/ftrace.h>
+#include <asm/nospec-insn.h>
 #include <asm/ptrace.h>
 
+	GEN_BR_THUNK %r1
+	GEN_BR_THUNK %r14
+
 	.section .kprobes.text, "ax"
 
 ENTRY(ftrace_stub)
-	br	%r14
+	BR_EX	%r14
 
 #define STACK_FRAME_SIZE  (STACK_FRAME_OVERHEAD + __PT_SIZE)
 #define STACK_PTREGS	  (STACK_FRAME_OVERHEAD)
@@ -21,7 +25,7 @@ ENTRY(ftrace_stub)
 #define STACK_PTREGS_PSW  (STACK_PTREGS + __PT_PSW)
 
 ENTRY(_mcount)
-	br	%r14
+	BR_EX	%r14
 
 ENTRY(ftrace_caller)
 	.globl	ftrace_regs_caller
@@ -49,7 +53,7 @@ ENTRY(ftrace_caller)
 #endif
 	lgr	%r3,%r14
 	la	%r5,STACK_PTREGS(%r15)
-	basr	%r14,%r1
+	BASR_EX	%r14,%r1
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 # The j instruction gets runtime patched to a nop instruction.
 # See ftrace_enable_ftrace_graph_caller.
@@ -64,7 +68,7 @@ ftrace_graph_caller_end:
 #endif
 	lg	%r1,(STACK_PTREGS_PSW+8)(%r15)
 	lmg	%r2,%r15,(STACK_PTREGS_GPRS+2*8)(%r15)
-	br	%r1
+	BR_EX	%r1
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 
@@ -77,6 +81,6 @@ ENTRY(return_to_handler)
 	aghi	%r15,STACK_FRAME_OVERHEAD
 	lgr	%r14,%r2
 	lmg	%r2,%r5,32(%r15)
-	br	%r14
+	BR_EX	%r14
 
 #endif

From aa57be759b62b70465c6118ea4ba3f3d26711a46 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 30 May 2018 07:49:18 +0200
Subject: [PATCH 0468/1852] Linux 4.4.134

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 2ad1ecd6cb0e1..196ec683a945d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 133
+SUBLEVEL = 134
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 0011d9c12f6dfdbcaf22acfe4dcb09e8010d5506 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 30 May 2018 20:44:08 +0200
Subject: [PATCH 0469/1852] Revert "vti4: Don't override MTU passed on link
 creation via IFLA_MTU"

This reverts commit 33cebc976c3b77bdf8f3fb4478cf776131ebfe4f which is
03080e5ec727 ("vti4: Don't override MTU passed on link creation via
IFLA_MTU") upstream as it causes test failures.

This commit should not have been backported to anything older than 4.16,
despite what the changelog said as the mtu must be set in older kernels,
unlike is needed in 4.16 and newer.

Thanks to Alistair Strachan for the debugging help figuring this out,
and for 'git bisect' for making my life a whole lot easier.

Cc: Alistair Strachan <astrachan@google.com>
Cc: Stefano Brivio <sbrivio@redhat.com>
Cc: Sabrina Dubroca <sd@queasysnail.net>
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_vti.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/ipv4/ip_vti.c b/net/ipv4/ip_vti.c
index fa79e8118b9bc..4b7c81f88abf2 100644
--- a/net/ipv4/ip_vti.c
+++ b/net/ipv4/ip_vti.c
@@ -366,6 +366,7 @@ static int vti_tunnel_init(struct net_device *dev)
 	memcpy(dev->dev_addr, &iph->saddr, 4);
 	memcpy(dev->broadcast, &iph->daddr, 4);
 
+	dev->mtu		= ETH_DATA_LEN;
 	dev->flags		= IFF_NOARP;
 	dev->addr_len		= 4;
 	dev->features		|= NETIF_F_LLTX;

From 724170e6f7914a3e1074766f33cdb3c74af1d0f8 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 30 May 2018 22:11:35 +0200
Subject: [PATCH 0470/1852] Linux 4.4.135

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 196ec683a945d..2f24e579f5a4c 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 134
+SUBLEVEL = 135
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From dcdc400756890336d49d598ae2a477048bcaa69c Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Mon, 21 May 2018 17:44:57 +0100
Subject: [PATCH 0471/1852] arm64: lse: Add early clobbers to some input/output
 asm operands

commit 32c3fa7cdf0c4a3eb8405fc3e13398de019e828b upstream.

For LSE atomics that read and write a register operand, we need to
ensure that these operands are annotated as "early clobber" if the
register is written before all of the input operands have been consumed.
Failure to do so can result in the compiler allocating the same register
to both operands, leading to splats such as:

 Unable to handle kernel paging request at virtual address 11111122222221
 [...]
 x1 : 1111111122222222 x0 : 1111111122222221
 Process swapper/0 (pid: 1, stack limit = 0x000000008209f908)
 Call trace:
  test_atomic64+0x1360/0x155c

where x0 has been allocated as both the value to be stored and also the
atomic_t pointer.

This patch adds the missing clobbers.

Cc: <stable@vger.kernel.org>
Cc: Dave Martin <dave.martin@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Reported-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/asm/atomic_lse.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
index 39c1d340fec59..a000e47d5016a 100644
--- a/arch/arm64/include/asm/atomic_lse.h
+++ b/arch/arm64/include/asm/atomic_lse.h
@@ -114,7 +114,7 @@ static inline void atomic_and(int i, atomic_t *v)
 	/* LSE atomics */
 	"	mvn	%w[i], %w[i]\n"
 	"	stclr	%w[i], %[v]")
-	: [i] "+r" (w0), [v] "+Q" (v->counter)
+	: [i] "+&r" (w0), [v] "+Q" (v->counter)
 	: "r" (x1)
 	: __LL_SC_CLOBBERS);
 }
@@ -131,7 +131,7 @@ static inline void atomic_sub(int i, atomic_t *v)
 	/* LSE atomics */
 	"	neg	%w[i], %w[i]\n"
 	"	stadd	%w[i], %[v]")
-	: [i] "+r" (w0), [v] "+Q" (v->counter)
+	: [i] "+&r" (w0), [v] "+Q" (v->counter)
 	: "r" (x1)
 	: __LL_SC_CLOBBERS);
 }
@@ -151,7 +151,7 @@ static inline int atomic_sub_return##name(int i, atomic_t *v)		\
 	"	neg	%w[i], %w[i]\n"					\
 	"	ldadd" #mb "	%w[i], w30, %[v]\n"			\
 	"	add	%w[i], %w[i], w30")				\
-	: [i] "+r" (w0), [v] "+Q" (v->counter)				\
+	: [i] "+&r" (w0), [v] "+Q" (v->counter)				\
 	: "r" (x1)							\
 	: __LL_SC_CLOBBERS , ##cl);					\
 									\
@@ -255,7 +255,7 @@ static inline void atomic64_and(long i, atomic64_t *v)
 	/* LSE atomics */
 	"	mvn	%[i], %[i]\n"
 	"	stclr	%[i], %[v]")
-	: [i] "+r" (x0), [v] "+Q" (v->counter)
+	: [i] "+&r" (x0), [v] "+Q" (v->counter)
 	: "r" (x1)
 	: __LL_SC_CLOBBERS);
 }
@@ -272,7 +272,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
 	/* LSE atomics */
 	"	neg	%[i], %[i]\n"
 	"	stadd	%[i], %[v]")
-	: [i] "+r" (x0), [v] "+Q" (v->counter)
+	: [i] "+&r" (x0), [v] "+Q" (v->counter)
 	: "r" (x1)
 	: __LL_SC_CLOBBERS);
 }
@@ -292,7 +292,7 @@ static inline long atomic64_sub_return##name(long i, atomic64_t *v)	\
 	"	neg	%[i], %[i]\n"					\
 	"	ldadd" #mb "	%[i], x30, %[v]\n"			\
 	"	add	%[i], %[i], x30")				\
-	: [i] "+r" (x0), [v] "+Q" (v->counter)				\
+	: [i] "+&r" (x0), [v] "+Q" (v->counter)				\
 	: "r" (x1)							\
 	: __LL_SC_CLOBBERS, ##cl);					\
 									\
@@ -412,7 +412,7 @@ static inline long __cmpxchg_double##name(unsigned long old1,		\
 	"	eor	%[old1], %[old1], %[oldval1]\n"			\
 	"	eor	%[old2], %[old2], %[oldval2]\n"			\
 	"	orr	%[old1], %[old1], %[old2]")			\
-	: [old1] "+r" (x0), [old2] "+r" (x1),				\
+	: [old1] "+&r" (x0), [old2] "+&r" (x1),				\
 	  [v] "+Q" (*(unsigned long *)ptr)				\
 	: [new1] "r" (x2), [new2] "r" (x3), [ptr] "r" (x4),		\
 	  [oldval1] "r" (oldval1), [oldval2] "r" (oldval2)		\

From 1d38e1664f1a2581ec7e8fcd07dd2e5ca5b236d4 Mon Sep 17 00:00:00 2001
From: Michael Neuling <mikey@neuling.org>
Date: Fri, 18 May 2018 11:37:42 +1000
Subject: [PATCH 0472/1852] powerpc/64s: Clear PCR on boot

commit faf37c44a105f3608115785f17cbbf3500f8bc71 upstream.

Clear the PCR (Processor Compatibility Register) on boot to ensure we
are not running in a compatibility mode.

We've seen this cause problems when a crash (and kdump) occurs while
running compat mode guests. The kdump kernel then runs with the PCR
set and causes problems. The symptom in the kdump kernel (also seen in
petitboot after fast-reboot) is early userspace programs taking
sigills on newer instructions (seen in libc).

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: stable@vger.kernel.org
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/cpu_setup_power.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 9c9b7411b28bb..55eb3b752ca04 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -27,6 +27,7 @@ _GLOBAL(__setup_cpu_power7)
 	beqlr
 	li	r0,0
 	mtspr	SPRN_LPID,r0
+	mtspr	SPRN_PCR,r0
 	mfspr	r3,SPRN_LPCR
 	bl	__init_LPCR
 	bl	__init_tlb_power7
@@ -40,6 +41,7 @@ _GLOBAL(__restore_cpu_power7)
 	beqlr
 	li	r0,0
 	mtspr	SPRN_LPID,r0
+	mtspr	SPRN_PCR,r0
 	mfspr	r3,SPRN_LPCR
 	bl	__init_LPCR
 	bl	__init_tlb_power7
@@ -55,6 +57,7 @@ _GLOBAL(__setup_cpu_power8)
 	beqlr
 	li	r0,0
 	mtspr	SPRN_LPID,r0
+	mtspr	SPRN_PCR,r0
 	mfspr	r3,SPRN_LPCR
 	ori	r3, r3, LPCR_PECEDH
 	bl	__init_LPCR
@@ -74,6 +77,7 @@ _GLOBAL(__restore_cpu_power8)
 	beqlr
 	li	r0,0
 	mtspr	SPRN_LPID,r0
+	mtspr	SPRN_PCR,r0
 	mfspr   r3,SPRN_LPCR
 	ori	r3, r3, LPCR_PECEDH
 	bl	__init_LPCR

From c963242c9189d3546290ae4c28f6b9a663bd2658 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: Mon, 21 Nov 2016 13:19:31 +0100
Subject: [PATCH 0473/1852] USB: serial: cp210x: use tcflag_t to fix
 incompatible pointer type

commit 009615ab7fd4e43b82a38e4e6adc5e23c1ee567f upstream.

On sparc32, tcflag_t is unsigned long, unlike all other architectures:

    drivers/usb/serial/cp210x.c: In function 'cp210x_get_termios':
    drivers/usb/serial/cp210x.c:717:3: warning: passing argument 2 of 'cp210x_get_termios_port' from incompatible pointer type
       cp210x_get_termios_port(tty->driver_data,
       ^
    drivers/usb/serial/cp210x.c:35:13: note: expected 'unsigned int *' but argument is of type 'tcflag_t *'
     static void cp210x_get_termios_port(struct usb_serial_port *port,
		 ^

Consistently use tcflag_t to fix this.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/cp210x.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 32cadca198b29..e7a051386b326 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -33,7 +33,7 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *);
 static void cp210x_close(struct usb_serial_port *);
 static void cp210x_get_termios(struct tty_struct *, struct usb_serial_port *);
 static void cp210x_get_termios_port(struct usb_serial_port *port,
-	unsigned int *cflagp, unsigned int *baudp);
+	tcflag_t *cflagp, unsigned int *baudp);
 static void cp210x_change_speed(struct tty_struct *, struct usb_serial_port *,
 							struct ktermios *);
 static void cp210x_set_termios(struct tty_struct *, struct usb_serial_port *,
@@ -515,7 +515,7 @@ static void cp210x_get_termios(struct tty_struct *tty,
 			&tty->termios.c_cflag, &baud);
 		tty_encode_baud_rate(tty, baud, baud);
 	} else {
-		unsigned int cflag;
+		tcflag_t cflag;
 		cflag = 0;
 		cp210x_get_termios_port(port, &cflag, &baud);
 	}
@@ -526,10 +526,11 @@ static void cp210x_get_termios(struct tty_struct *tty,
  * This is the heart of cp210x_get_termios which always uses a &usb_serial_port.
  */
 static void cp210x_get_termios_port(struct usb_serial_port *port,
-	unsigned int *cflagp, unsigned int *baudp)
+	tcflag_t *cflagp, unsigned int *baudp)
 {
 	struct device *dev = &port->dev;
-	unsigned int cflag, modem_ctl[4];
+	tcflag_t cflag;
+	unsigned int modem_ctl[4];
 	unsigned int baud;
 	unsigned int bits;
 

From c3f4cbb5a46ea05b36c60f96ee26d8e617ebd08b Mon Sep 17 00:00:00 2001
From: Yoshinori Sato <ysato@users.sourceforge.jp>
Date: Sat, 20 Jun 2015 14:02:19 +0900
Subject: [PATCH 0474/1852] sh: New gcc support

commit 940d4113f3306e07a1f86541489b686d1a979d54 upstream.

New gcc (4.8 or later) used new shift helper functions.
So we need added new helper to private libgcc.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Rich Felker <dalias@libc.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/sh/kernel/sh_ksyms_32.c |  3 +++
 arch/sh/lib/ashlsi3.S        | 35 ++++++++++++++++++++++++++---------
 arch/sh/lib/ashrsi3.S        | 33 ++++++++++++++++++++++++---------
 arch/sh/lib/lshrsi3.S        | 34 +++++++++++++++++++++++++---------
 4 files changed, 78 insertions(+), 27 deletions(-)

diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index d77f2f6c7ff07..0b30b9dfc87f2 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -34,6 +34,9 @@ DECLARE_EXPORT(__sdivsi3);
 DECLARE_EXPORT(__lshrsi3);
 DECLARE_EXPORT(__ashrsi3);
 DECLARE_EXPORT(__ashlsi3);
+DECLARE_EXPORT(__lshrsi3_r0);
+DECLARE_EXPORT(__ashrsi3_r0);
+DECLARE_EXPORT(__ashlsi3_r0);
 DECLARE_EXPORT(__ashiftrt_r4_6);
 DECLARE_EXPORT(__ashiftrt_r4_7);
 DECLARE_EXPORT(__ashiftrt_r4_8);
diff --git a/arch/sh/lib/ashlsi3.S b/arch/sh/lib/ashlsi3.S
index bd47e9b403a5b..70a6434945ab8 100644
--- a/arch/sh/lib/ashlsi3.S
+++ b/arch/sh/lib/ashlsi3.S
@@ -54,21 +54,38 @@ Boston, MA 02110-1301, USA.  */
 !
 ! (none)
 !
+! __ashlsi3_r0
+!
+! Entry:
+!
+! r4: Value to shift
+! r0: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
+
+
 	.global	__ashlsi3
+	.global	__ashlsi3_r0
 	
 	.align	2
 __ashlsi3:
-	mov	#31,r0
-	and	r0,r5
+	mov	r5,r0
+	.align	2
+__ashlsi3_r0:
+	and	#31,r0
+	mov.l	r4,@-r15
+	mov	r0,r4
 	mova	ashlsi3_table,r0
-	mov.b	@(r0,r5),r5
-#ifdef __sh1__
-	add	r5,r0
+	mov.b	@(r0,r4),r4
+	add	r4,r0
 	jmp	@r0
-#else
-	braf	r5
-#endif
-	mov	r4,r0
+	mov.l	@r15+,r0
 
 	.align	2
 ashlsi3_table:
diff --git a/arch/sh/lib/ashrsi3.S b/arch/sh/lib/ashrsi3.S
index 6f3cf46b77c2c..602599d802091 100644
--- a/arch/sh/lib/ashrsi3.S
+++ b/arch/sh/lib/ashrsi3.S
@@ -54,22 +54,37 @@ Boston, MA 02110-1301, USA.  */
 !
 ! (none)
 !
+! __ashrsi3_r0
+!
+! Entry:
+!
+! r4: Value to shift
+! r0: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
 
 	.global	__ashrsi3
+	.global	__ashrsi3_r0
 	
 	.align	2
 __ashrsi3:
-	mov	#31,r0
-	and	r0,r5
+	mov	r5,r0
+	.align	2
+__ashrsi3_r0:
+	and	#31,r0
+	mov.l	r4,@-r15
+	mov	r0,r4
 	mova	ashrsi3_table,r0
-	mov.b	@(r0,r5),r5
-#ifdef __sh1__
-	add	r5,r0
+	mov.b	@(r0,r4),r4
+	add	r4,r0
 	jmp	@r0
-#else
-	braf	r5
-#endif
-	mov	r4,r0
+	mov.l	@r15+,r0
 
 	.align	2
 ashrsi3_table:
diff --git a/arch/sh/lib/lshrsi3.S b/arch/sh/lib/lshrsi3.S
index 1e7aaa5571303..f2a6959f526d3 100644
--- a/arch/sh/lib/lshrsi3.S
+++ b/arch/sh/lib/lshrsi3.S
@@ -53,22 +53,38 @@ Boston, MA 02110-1301, USA.  */
 ! Destroys:
 !
 ! (none)
+!
+! __lshrsi3_r0
+!
+! Entry:
+!
+! r0: Value to shift
+! r5: Shifts
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! (none)
 !
 	.global	__lshrsi3
+	.global	__lshrsi3_r0
 	
 	.align	2
 __lshrsi3:
-	mov	#31,r0
-	and	r0,r5
+	mov	r5,r0
+	.align	2
+__lshrsi3_r0:
+	and	#31,r0
+	mov.l	r4,@-r15
+	mov	r0,r4
 	mova	lshrsi3_table,r0
-	mov.b	@(r0,r5),r5
-#ifdef __sh1__
-	add	r5,r0
+	mov.b	@(r0,r4),r4
+	add	r4,r0
 	jmp	@r0
-#else
-	braf	r5
-#endif
-	mov	r4,r0
+	mov.l	@r15+,r0
 
 	.align	2
 lshrsi3_table:

From 5edf8f6608298c8fbb802459b862ff42eb9d14d4 Mon Sep 17 00:00:00 2001
From: Brian Foster <bfoster@redhat.com>
Date: Thu, 15 Mar 2018 10:51:58 -0700
Subject: [PATCH 0475/1852] xfs: detect agfl count corruption and reset agfl

commit a27ba2607e60312554cbcd43fc660b2c7f29dc9c upstream.

The struct xfs_agfl v5 header was originally introduced with
unexpected padding that caused the AGFL to operate with one less
slot than intended. The header has since been packed, but the fix
left an incompatibility for users who upgrade from an old kernel
with the unpacked header to a newer kernel with the packed header
while the AGFL happens to wrap around the end. The newer kernel
recognizes one extra slot at the physical end of the AGFL that the
previous kernel did not. The new kernel will eventually attempt to
allocate a block from that slot, which contains invalid data, and
cause a crash.

This condition can be detected by comparing the active range of the
AGFL to the count. While this detects a padding mismatch, it can
also trigger false positives for unrelated flcount corruption. Since
we cannot distinguish a size mismatch due to padding from unrelated
corruption, we can't trust the AGFL enough to simply repopulate the
empty slot.

Instead, avoid unnecessarily complex detection logic and and use a
solution that can handle any form of flcount corruption that slips
through read verifiers: distrust the entire AGFL and reset it to an
empty state. Any valid blocks within the AGFL are intentionally
leaked. This requires xfs_repair to rectify (which was already
necessary based on the state the AGFL was found in). The reset
mitigates the side effect of the padding mismatch problem from a
filesystem crash to a free space accounting inconsistency. The
generic approach also means that this patch can be safely backported
to kernels with or without a packed struct xfs_agfl.

Check the AGF for an invalid freelist count on initial read from
disk. If detected, set a flag on the xfs_perag to indicate that a
reset is required before the AGFL can be used. In the first
transaction that attempts to use a flagged AGFL, reset it to empty,
warn the user about the inconsistency and allow the freelist fixup
code to repopulate the AGFL with new blocks. The xfs_perag flag is
cleared to eliminate the need for repeated checks on each block
allocation operation.

This allows kernels that include the packing fix commit 96f859d52bcb
("libxfs: pack the agfl header structure so XFS_AGFL_SIZE is correct")
to handle older unpacked AGFL formats without a filesystem crash.

Suggested-by: Dave Chinner <david@fromorbit.com>
Signed-off-by: Brian Foster <bfoster@redhat.com>
Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
Reviewed-by Dave Chiluk <chiluk+linuxxfs@indeed.com>
Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Dave Chiluk <chiluk+linuxxfs@indeed.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/xfs/libxfs/xfs_alloc.c | 94 +++++++++++++++++++++++++++++++++++++++
 fs/xfs/xfs_mount.h        |  1 +
 fs/xfs/xfs_trace.h        |  9 +++-
 3 files changed, 103 insertions(+), 1 deletion(-)

diff --git a/fs/xfs/libxfs/xfs_alloc.c b/fs/xfs/libxfs/xfs_alloc.c
index e1e7fe3b5424c..b663b756f5529 100644
--- a/fs/xfs/libxfs/xfs_alloc.c
+++ b/fs/xfs/libxfs/xfs_alloc.c
@@ -1923,6 +1923,93 @@ xfs_alloc_space_available(
 	return true;
 }
 
+/*
+ * Check the agfl fields of the agf for inconsistency or corruption. The purpose
+ * is to detect an agfl header padding mismatch between current and early v5
+ * kernels. This problem manifests as a 1-slot size difference between the
+ * on-disk flcount and the active [first, last] range of a wrapped agfl. This
+ * may also catch variants of agfl count corruption unrelated to padding. Either
+ * way, we'll reset the agfl and warn the user.
+ *
+ * Return true if a reset is required before the agfl can be used, false
+ * otherwise.
+ */
+static bool
+xfs_agfl_needs_reset(
+	struct xfs_mount	*mp,
+	struct xfs_agf		*agf)
+{
+	uint32_t		f = be32_to_cpu(agf->agf_flfirst);
+	uint32_t		l = be32_to_cpu(agf->agf_fllast);
+	uint32_t		c = be32_to_cpu(agf->agf_flcount);
+	int			agfl_size = XFS_AGFL_SIZE(mp);
+	int			active;
+
+	/* no agfl header on v4 supers */
+	if (!xfs_sb_version_hascrc(&mp->m_sb))
+		return false;
+
+	/*
+	 * The agf read verifier catches severe corruption of these fields.
+	 * Repeat some sanity checks to cover a packed -> unpacked mismatch if
+	 * the verifier allows it.
+	 */
+	if (f >= agfl_size || l >= agfl_size)
+		return true;
+	if (c > agfl_size)
+		return true;
+
+	/*
+	 * Check consistency between the on-disk count and the active range. An
+	 * agfl padding mismatch manifests as an inconsistent flcount.
+	 */
+	if (c && l >= f)
+		active = l - f + 1;
+	else if (c)
+		active = agfl_size - f + l + 1;
+	else
+		active = 0;
+
+	return active != c;
+}
+
+/*
+ * Reset the agfl to an empty state. Ignore/drop any existing blocks since the
+ * agfl content cannot be trusted. Warn the user that a repair is required to
+ * recover leaked blocks.
+ *
+ * The purpose of this mechanism is to handle filesystems affected by the agfl
+ * header padding mismatch problem. A reset keeps the filesystem online with a
+ * relatively minor free space accounting inconsistency rather than suffer the
+ * inevitable crash from use of an invalid agfl block.
+ */
+static void
+xfs_agfl_reset(
+	struct xfs_trans	*tp,
+	struct xfs_buf		*agbp,
+	struct xfs_perag	*pag)
+{
+	struct xfs_mount	*mp = tp->t_mountp;
+	struct xfs_agf		*agf = XFS_BUF_TO_AGF(agbp);
+
+	ASSERT(pag->pagf_agflreset);
+	trace_xfs_agfl_reset(mp, agf, 0, _RET_IP_);
+
+	xfs_warn(mp,
+	       "WARNING: Reset corrupted AGFL on AG %u. %d blocks leaked. "
+	       "Please unmount and run xfs_repair.",
+	         pag->pag_agno, pag->pagf_flcount);
+
+	agf->agf_flfirst = 0;
+	agf->agf_fllast = cpu_to_be32(XFS_AGFL_SIZE(mp) - 1);
+	agf->agf_flcount = 0;
+	xfs_alloc_log_agf(tp, agbp, XFS_AGF_FLFIRST | XFS_AGF_FLLAST |
+				    XFS_AGF_FLCOUNT);
+
+	pag->pagf_flcount = 0;
+	pag->pagf_agflreset = false;
+}
+
 /*
  * Decide whether to use this allocation group for this allocation.
  * If so, fix up the btree freelist's size.
@@ -1983,6 +2070,10 @@ xfs_alloc_fix_freelist(
 		}
 	}
 
+	/* reset a padding mismatched agfl before final free space check */
+	if (pag->pagf_agflreset)
+		xfs_agfl_reset(tp, agbp, pag);
+
 	/* If there isn't enough total space or single-extent, reject it. */
 	need = xfs_alloc_min_freelist(mp, pag);
 	if (!xfs_alloc_space_available(args, need, flags))
@@ -2121,6 +2212,7 @@ xfs_alloc_get_freelist(
 		agf->agf_flfirst = 0;
 
 	pag = xfs_perag_get(mp, be32_to_cpu(agf->agf_seqno));
+	ASSERT(!pag->pagf_agflreset);
 	be32_add_cpu(&agf->agf_flcount, -1);
 	xfs_trans_agflist_delta(tp, -1);
 	pag->pagf_flcount--;
@@ -2226,6 +2318,7 @@ xfs_alloc_put_freelist(
 		agf->agf_fllast = 0;
 
 	pag = xfs_perag_get(mp, be32_to_cpu(agf->agf_seqno));
+	ASSERT(!pag->pagf_agflreset);
 	be32_add_cpu(&agf->agf_flcount, 1);
 	xfs_trans_agflist_delta(tp, 1);
 	pag->pagf_flcount++;
@@ -2417,6 +2510,7 @@ xfs_alloc_read_agf(
 		pag->pagb_count = 0;
 		pag->pagb_tree = RB_ROOT;
 		pag->pagf_init = 1;
+		pag->pagf_agflreset = xfs_agfl_needs_reset(mp, agf);
 	}
 #ifdef DEBUG
 	else if (!XFS_FORCED_SHUTDOWN(mp)) {
diff --git a/fs/xfs/xfs_mount.h b/fs/xfs/xfs_mount.h
index b57098481c10a..ae3e52749f20e 100644
--- a/fs/xfs/xfs_mount.h
+++ b/fs/xfs/xfs_mount.h
@@ -278,6 +278,7 @@ typedef struct xfs_perag {
 	char		pagi_inodeok;	/* The agi is ok for inodes */
 	__uint8_t	pagf_levels[XFS_BTNUM_AGF];
 					/* # of levels in bno & cnt btree */
+	bool		pagf_agflreset; /* agfl requires reset before use */
 	__uint32_t	pagf_flcount;	/* count of blocks in freelist */
 	xfs_extlen_t	pagf_freeblks;	/* total free blocks */
 	xfs_extlen_t	pagf_longest;	/* longest free space */
diff --git a/fs/xfs/xfs_trace.h b/fs/xfs/xfs_trace.h
index 877079eb0f8f0..cc6fa64821d2d 100644
--- a/fs/xfs/xfs_trace.h
+++ b/fs/xfs/xfs_trace.h
@@ -1485,7 +1485,7 @@ TRACE_EVENT(xfs_trans_commit_lsn,
 		  __entry->lsn)
 );
 
-TRACE_EVENT(xfs_agf,
+DECLARE_EVENT_CLASS(xfs_agf_class,
 	TP_PROTO(struct xfs_mount *mp, struct xfs_agf *agf, int flags,
 		 unsigned long caller_ip),
 	TP_ARGS(mp, agf, flags, caller_ip),
@@ -1541,6 +1541,13 @@ TRACE_EVENT(xfs_agf,
 		  __entry->longest,
 		  (void *)__entry->caller_ip)
 );
+#define DEFINE_AGF_EVENT(name) \
+DEFINE_EVENT(xfs_agf_class, name, \
+	TP_PROTO(struct xfs_mount *mp, struct xfs_agf *agf, int flags, \
+		 unsigned long caller_ip), \
+	TP_ARGS(mp, agf, flags, caller_ip))
+DEFINE_AGF_EVENT(xfs_agf);
+DEFINE_AGF_EVENT(xfs_agfl_reset);
 
 TRACE_EVENT(xfs_free_extent,
 	TP_PROTO(struct xfs_mount *mp, xfs_agnumber_t agno, xfs_agblock_t agbno,

From 1db832be9946a8431bdde243b998592418b19f18 Mon Sep 17 00:00:00 2001
From: Mimi Zohar <zohar@linux.vnet.ibm.com>
Date: Wed, 2 Nov 2016 09:14:16 -0400
Subject: [PATCH 0476/1852] Revert "ima: limit file hash setting by user to fix
 and log modes"

commit f5acb3dcba1ffb7f0b8cbb9dba61500eea5d610b upstream.

Userspace applications have been modified to write security xattrs,
but they are not context aware.  In the case of security.ima, the
security xattr can be either a file hash or a file signature.
Permitting writing one, but not the other requires the application to
be context aware.

In addition, userspace applications might write files to a staging
area, which might not be in policy, and then change some file metadata
(eg. owner) making it in policy.  As a result, these files are not
labeled properly.

This reverts commit c68ed80c97d9720f51ef31fe91560fdd1e121533, which
prevents writing file hashes as security.ima xattrs.

Requested-by: Patrick Ohly <patrick.ohly@intel.com>
Cc: Dmitry Kasatkin <dmitry.kasatkin@gmail.com>
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Cc: Mike Rapoport <rppt@linux.vnet.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 security/integrity/ima/ima_appraise.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/security/integrity/ima/ima_appraise.c b/security/integrity/ima/ima_appraise.c
index 8da7c91b725d3..c36b98b07d6be 100644
--- a/security/integrity/ima/ima_appraise.c
+++ b/security/integrity/ima/ima_appraise.c
@@ -383,14 +383,10 @@ int ima_inode_setxattr(struct dentry *dentry, const char *xattr_name,
 	result = ima_protect_xattr(dentry, xattr_name, xattr_value,
 				   xattr_value_len);
 	if (result == 1) {
-		bool digsig;
-
 		if (!xattr_value_len || (xvalue->type >= IMA_XATTR_LAST))
 			return -EINVAL;
-		digsig = (xvalue->type == EVM_IMA_XATTR_DIGSIG);
-		if (!digsig && (ima_appraise & IMA_APPRAISE_ENFORCE))
-			return -EPERM;
-		ima_reset_appraise_flags(d_backing_inode(dentry), digsig);
+		ima_reset_appraise_flags(d_backing_inode(dentry),
+			 (xvalue->type == EVM_IMA_XATTR_DIGSIG) ? 1 : 0);
 		result = 0;
 	}
 	return result;

From 71d40c30c397efb08568994926e6159671c84123 Mon Sep 17 00:00:00 2001
From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Date: Tue, 22 May 2018 17:19:57 -0700
Subject: [PATCH 0477/1852] Input: elan_i2c_smbus - fix corrupted stack

commit 40f7090bb1b4ec327ea1e1402ff5783af5b35195 upstream.

New ICs (like the one on the Lenovo T480s) answer to
ETP_SMBUS_IAP_VERSION_CMD 4 bytes instead of 3. This corrupts the stack
as i2c_smbus_read_block_data() uses the values returned by the i2c
device to know how many data it need to return.

i2c_smbus_read_block_data() can read up to 32 bytes (I2C_SMBUS_BLOCK_MAX)
and there is no safeguard on how many bytes are provided in the return
value. Ensure we always have enough space for any future firmware.
Also 0-initialize the values to prevent any access to uninitialized memory.

Cc: <stable@vger.kernel.org> # v4.4.x, v4.9.x, v4.14.x, v4.15.x, v4.16.x
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Acked-by: KT Liao <kt.liao@emc.com.tw>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c_smbus.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/input/mouse/elan_i2c_smbus.c b/drivers/input/mouse/elan_i2c_smbus.c
index cb6aecbc1dc28..25dba1d7aa57f 100644
--- a/drivers/input/mouse/elan_i2c_smbus.c
+++ b/drivers/input/mouse/elan_i2c_smbus.c
@@ -130,7 +130,7 @@ static int elan_smbus_get_baseline_data(struct i2c_client *client,
 					bool max_baseline, u8 *value)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  max_baseline ?
@@ -149,7 +149,7 @@ static int elan_smbus_get_version(struct i2c_client *client,
 				  bool iap, u8 *version)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  iap ? ETP_SMBUS_IAP_VERSION_CMD :
@@ -169,7 +169,7 @@ static int elan_smbus_get_sm_version(struct i2c_client *client,
 				     u8 *ic_type, u8 *version)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  ETP_SMBUS_SM_VERSION_CMD, val);
@@ -186,7 +186,7 @@ static int elan_smbus_get_sm_version(struct i2c_client *client,
 static int elan_smbus_get_product_id(struct i2c_client *client, u16 *id)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  ETP_SMBUS_UNIQUEID_CMD, val);
@@ -203,7 +203,7 @@ static int elan_smbus_get_checksum(struct i2c_client *client,
 				   bool iap, u16 *csum)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  iap ? ETP_SMBUS_FW_CHECKSUM_CMD :
@@ -223,7 +223,7 @@ static int elan_smbus_get_max(struct i2c_client *client,
 			      unsigned int *max_x, unsigned int *max_y)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client, ETP_SMBUS_RANGE_CMD, val);
 	if (error) {
@@ -241,7 +241,7 @@ static int elan_smbus_get_resolution(struct i2c_client *client,
 				     u8 *hw_res_x, u8 *hw_res_y)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  ETP_SMBUS_RESOLUTION_CMD, val);
@@ -261,7 +261,7 @@ static int elan_smbus_get_num_traces(struct i2c_client *client,
 				     unsigned int *y_traces)
 {
 	int error;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client,
 					  ETP_SMBUS_XY_TRACENUM_CMD, val);
@@ -288,7 +288,7 @@ static int elan_smbus_iap_get_mode(struct i2c_client *client,
 {
 	int error;
 	u16 constant;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	error = i2c_smbus_read_block_data(client, ETP_SMBUS_IAP_CTRL_CMD, val);
 	if (error < 0) {
@@ -339,7 +339,7 @@ static int elan_smbus_prepare_fw_update(struct i2c_client *client)
 	int len;
 	int error;
 	enum tp_mode mode;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 	u8 cmd[4] = {0x0F, 0x78, 0x00, 0x06};
 	u16 password;
 
@@ -413,7 +413,7 @@ static int elan_smbus_write_fw_block(struct i2c_client *client,
 	struct device *dev = &client->dev;
 	int error;
 	u16 result;
-	u8 val[3];
+	u8 val[I2C_SMBUS_BLOCK_MAX] = {0};
 
 	/*
 	 * Due to the limitation of smbus protocol limiting

From 6313c5557ca20d3c7e303ce195aa358a653863c5 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Sun, 27 May 2018 20:54:44 -0400
Subject: [PATCH 0478/1852] tracing: Fix crash when freeing instances with
 event triggers

commit 86b389ff22bd6ad8fd3cb98e41cd271886c6d023 upstream.

If a instance has an event trigger enabled when it is freed, it could cause
an access of free memory. Here's the case that crashes:

 # cd /sys/kernel/tracing
 # mkdir instances/foo
 # echo snapshot > instances/foo/events/initcall/initcall_start/trigger
 # rmdir instances/foo

Would produce:

 general protection fault: 0000 [#1] PREEMPT SMP PTI
 Modules linked in: tun bridge ...
 CPU: 5 PID: 6203 Comm: rmdir Tainted: G        W         4.17.0-rc4-test+ #933
 Hardware name: Hewlett-Packard HP Compaq Pro 6300 SFF/339A, BIOS K01 v03.03 07/14/2016
 RIP: 0010:clear_event_triggers+0x3b/0x70
 RSP: 0018:ffffc90003783de0 EFLAGS: 00010286
 RAX: 0000000000000000 RBX: 6b6b6b6b6b6b6b2b RCX: 0000000000000000
 RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff8800c7130ba0
 RBP: ffffc90003783e00 R08: ffff8801131993f8 R09: 0000000100230016
 R10: ffffc90003783d80 R11: 0000000000000000 R12: ffff8800c7130ba0
 R13: ffff8800c7130bd8 R14: ffff8800cc093768 R15: 00000000ffffff9c
 FS:  00007f6f4aa86700(0000) GS:ffff88011eb40000(0000) knlGS:0000000000000000
 CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
 CR2: 00007f6f4a5aed60 CR3: 00000000cd552001 CR4: 00000000001606e0
 Call Trace:
  event_trace_del_tracer+0x2a/0xc5
  instance_rmdir+0x15c/0x200
  tracefs_syscall_rmdir+0x52/0x90
  vfs_rmdir+0xdb/0x160
  do_rmdir+0x16d/0x1c0
  __x64_sys_rmdir+0x17/0x20
  do_syscall_64+0x55/0x1a0
  entry_SYSCALL_64_after_hwframe+0x49/0xbe

This was due to the call the clears out the triggers when an instance is
being deleted not removing the trigger from the link list.

Cc: stable@vger.kernel.org
Fixes: 85f2b08268c01 ("tracing: Add basic event trigger framework")
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_events_trigger.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/kernel/trace/trace_events_trigger.c b/kernel/trace/trace_events_trigger.c
index 42a4009fd75ad..2172dd61577e4 100644
--- a/kernel/trace/trace_events_trigger.c
+++ b/kernel/trace/trace_events_trigger.c
@@ -469,9 +469,10 @@ clear_event_triggers(struct trace_array *tr)
 	struct trace_event_file *file;
 
 	list_for_each_entry(file, &tr->events, list) {
-		struct event_trigger_data *data;
-		list_for_each_entry_rcu(data, &file->triggers, list) {
+		struct event_trigger_data *data, *n;
+		list_for_each_entry_safe(data, n, &file->triggers, list) {
 			trace_event_trigger_enable_disable(file, 0);
+			list_del_rcu(&data->list);
 			if (data->ops->free)
 				data->ops->free(data->ops, data);
 		}

From 82914b21d7bf551e662c4fb496d5ef03a5531673 Mon Sep 17 00:00:00 2001
From: Sachin Grover <sgrover@codeaurora.org>
Date: Fri, 25 May 2018 14:01:39 +0530
Subject: [PATCH 0479/1852] selinux: KASAN: slab-out-of-bounds in
 xattr_getsecurity

commit efe3de79e0b52ca281ef6691480c8c68c82a4657 upstream.

Call trace:
 [<ffffff9203a8d7a8>] dump_backtrace+0x0/0x428
 [<ffffff9203a8dbf8>] show_stack+0x28/0x38
 [<ffffff920409bfb8>] dump_stack+0xd4/0x124
 [<ffffff9203d187e8>] print_address_description+0x68/0x258
 [<ffffff9203d18c00>] kasan_report.part.2+0x228/0x2f0
 [<ffffff9203d1927c>] kasan_report+0x5c/0x70
 [<ffffff9203d1776c>] check_memory_region+0x12c/0x1c0
 [<ffffff9203d17cdc>] memcpy+0x34/0x68
 [<ffffff9203d75348>] xattr_getsecurity+0xe0/0x160
 [<ffffff9203d75490>] vfs_getxattr+0xc8/0x120
 [<ffffff9203d75d68>] getxattr+0x100/0x2c8
 [<ffffff9203d76fb4>] SyS_fgetxattr+0x64/0xa0
 [<ffffff9203a83f70>] el0_svc_naked+0x24/0x28

If user get root access and calls security.selinux setxattr() with an
embedded NUL on a file and then if some process performs a getxattr()
on that file with a length greater than the actual length of the string,
it would result in a panic.

To fix this, add the actual length of the string to the security context
instead of the length passed by the userspace process.

Signed-off-by: Sachin Grover <sgrover@codeaurora.org>
Cc: stable@vger.kernel.org
Signed-off-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 security/selinux/ss/services.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index 23dca68ffe25e..0a258c0602d13 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -1441,7 +1441,7 @@ static int security_context_to_sid_core(const char *scontext, u32 scontext_len,
 				      scontext_len, &context, def_sid);
 	if (rc == -EINVAL && force) {
 		context.str = str;
-		context.len = scontext_len;
+		context.len = strlen(str) + 1;
 		str = NULL;
 	} else if (rc)
 		goto out_unlock;

From c21c531a799b77cbcdb02cca8977317248ce4747 Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 14 May 2018 20:09:24 -0700
Subject: [PATCH 0480/1852] cfg80211: further limit wiphy names to 64 bytes

commit 814596495dd2b9d4aab92d8f89cf19060d25d2ea upstream.

wiphy names were recently limited to 128 bytes by commit a7cfebcb7594
("cfg80211: limit wiphy names to 128 bytes").  As it turns out though,
this isn't sufficient because dev_vprintk_emit() needs the syslog header
string "SUBSYSTEM=ieee80211\0DEVICE=+ieee80211:$devname" to fit into 128
bytes.  This triggered the "device/subsystem name too long" WARN when
the device name was >= 90 bytes.  As before, this was reproduced by
syzbot by sending an HWSIM_CMD_NEW_RADIO command to the MAC80211_HWSIM
generic netlink family.

Fix it by further limiting wiphy names to 64 bytes.

Reported-by: syzbot+e64565577af34b3768dc@syzkaller.appspotmail.com
Fixes: a7cfebcb7594 ("cfg80211: limit wiphy names to 128 bytes")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/uapi/linux/nl80211.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index f4227173b5d85..d3aea4f10faf4 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -2195,7 +2195,7 @@ enum nl80211_attrs {
 #define NL80211_ATTR_KEYS NL80211_ATTR_KEYS
 #define NL80211_ATTR_FEATURE_FLAGS NL80211_ATTR_FEATURE_FLAGS
 
-#define NL80211_WIPHY_NAME_MAXLEN		128
+#define NL80211_WIPHY_NAME_MAXLEN		64
 
 #define NL80211_MAX_SUPP_RATES			32
 #define NL80211_MAX_SUPP_HT_RATES		77

From 903626482189a938f88cf0e8c873b8028dc03778 Mon Sep 17 00:00:00 2001
From: Matthias Kaehlcke <mka@chromium.org>
Date: Thu, 8 Feb 2018 16:57:12 -0800
Subject: [PATCH 0481/1852] rtlwifi: rtl8192cu: Remove variable self-assignment
 in rf.c

commit fb239c1209bb0f0b4830cc72507cc2f2d63fadbd upstream.

In _rtl92c_get_txpower_writeval_by_regulatory() the variable writeVal
is assigned to itself in an if ... else statement, apparently only to
document that the branch condition is handled and that a previously read
value should be returned unmodified. The self-assignment causes clang to
raise the following warning:

drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c:304:13:
  error: explicitly assigning value of variable of type 'u32'
    (aka 'unsigned int') to itself [-Werror,-Wself-assign]
  writeVal = writeVal;

Delete the branch with the self-assignment.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Larry Finger <Larry.Finger@lwfinger.net>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c
index 5624ade92cc04..c2a156a8aceca 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c
@@ -304,9 +304,6 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
 			writeVal = 0x00000000;
 		if (rtlpriv->dm.dynamic_txhighpower_lvl == TXHIGHPWRLEVEL_BT1)
 			writeVal = writeVal - 0x06060606;
-		else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
-			 TXHIGHPWRLEVEL_BT2)
-			writeVal = writeVal;
 		*(p_outwriteval + rf) = writeVal;
 	}
 }

From 79684ce69bac727754a86891b18802d5bb7b6a7f Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Thu, 19 Oct 2017 14:33:52 +0200
Subject: [PATCH 0482/1852] ASoC: Intel: sst: remove redundant variable
 dma_dev_name

commit 271ef65b5882425d500e969e875c98e47a6b0c86 upstream.

The pointer dma_dev_name is assigned but never read, it is redundant
and can therefore be removed.

Cleans up clang warning:
sound/soc/intel/common/sst-firmware.c:288:3: warning: Value stored to
'dma_dev_name' is never read

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/intel/common/sst-firmware.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/intel/common/sst-firmware.c b/sound/soc/intel/common/sst-firmware.c
index 1636a1eeb0021..be1b69c63bdf1 100644
--- a/sound/soc/intel/common/sst-firmware.c
+++ b/sound/soc/intel/common/sst-firmware.c
@@ -260,7 +260,6 @@ int sst_dma_new(struct sst_dsp *sst)
 	struct sst_pdata *sst_pdata = sst->pdata;
 	struct sst_dma *dma;
 	struct resource mem;
-	const char *dma_dev_name;
 	int ret = 0;
 
 	if (sst->pdata->resindex_dma_base == -1)
@@ -271,7 +270,6 @@ int sst_dma_new(struct sst_dsp *sst)
 	* is attached to the ADSP IP. */
 	switch (sst->pdata->dma_engine) {
 	case SST_DMA_TYPE_DW:
-		dma_dev_name = "dw_dmac";
 		break;
 	default:
 		dev_err(sst->dev, "error: invalid DMA engine %d\n",

From 3b6f1772bddc5cf18a4e4a56090a990516aa9f7b Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 24 Nov 2016 17:26:22 +0100
Subject: [PATCH 0483/1852] irda: fix overly long udelay()

commit c9bd28233b6d0d82ac3ba0215723be0a8262c39c upstream.

irda_get_mtt() returns a hardcoded '10000' in some cases,
and with gcc-7, we get a build error because this triggers a
compile-time check in udelay():

drivers/net/irda/w83977af_ir.o: In function `w83977af_hard_xmit':
w83977af_ir.c:(.text.w83977af_hard_xmit+0x14c): undefined reference to `__bad_udelay'

Older compilers did not run into this because they either did not
completely inline the irda_get_mtt() or did not consider the
10000 value a constant expression.

The code has been wrong since the start of git history.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/irda/w83977af_ir.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/irda/w83977af_ir.c b/drivers/net/irda/w83977af_ir.c
index 4e3d2e7c697c7..e8c3a8c32534b 100644
--- a/drivers/net/irda/w83977af_ir.c
+++ b/drivers/net/irda/w83977af_ir.c
@@ -518,7 +518,9 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
 		
 		mtt = irda_get_mtt(skb);
 		pr_debug("%s(%ld), mtt=%d\n", __func__ , jiffies, mtt);
-			if (mtt)
+			if (mtt > 1000)
+				mdelay(mtt/1000);
+			else if (mtt)
 				udelay(mtt);
 
 			/* Enable DMA interrupt */

From 0af977b3afe41483dcae23edfcd5ce212842d0a7 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Sun, 10 Dec 2017 17:55:03 -0800
Subject: [PATCH 0484/1852] tcp: avoid integer overflows in
 tcp_rcv_space_adjust()

commit 607065bad9931e72207b0cac365d7d4abc06bd99 upstream.

When using large tcp_rmem[2] values (I did tests with 500 MB),
I noticed overflows while computing rcvwin.

Lets fix this before the following patch.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Wei Wang <weiwan@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
[Backport: sysctl_tcp_rmem is not Namespace-ify'd in older kernels]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/tcp.h  |  2 +-
 net/ipv4/tcp_input.c | 10 ++++++----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index 2260f92f14929..5b6df1a8dc74e 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -324,7 +324,7 @@ struct tcp_sock {
 
 /* Receiver queue space */
 	struct {
-		int	space;
+		u32	space;
 		u32	seq;
 		u32	time;
 	} rcvq_space;
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index e898af31f4428..ca04c59555cfc 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -558,8 +558,8 @@ static inline void tcp_rcv_rtt_measure_ts(struct sock *sk,
 void tcp_rcv_space_adjust(struct sock *sk)
 {
 	struct tcp_sock *tp = tcp_sk(sk);
+	u32 copied;
 	int time;
-	int copied;
 
 	time = tcp_time_stamp - tp->rcvq_space.time;
 	if (time < (tp->rcv_rtt_est.rtt >> 3) || tp->rcv_rtt_est.rtt == 0)
@@ -581,12 +581,13 @@ void tcp_rcv_space_adjust(struct sock *sk)
 
 	if (sysctl_tcp_moderate_rcvbuf &&
 	    !(sk->sk_userlocks & SOCK_RCVBUF_LOCK)) {
-		int rcvwin, rcvmem, rcvbuf;
+		int rcvmem, rcvbuf;
+		u64 rcvwin;
 
 		/* minimal window to cope with packet losses, assuming
 		 * steady state. Add some cushion because of small variations.
 		 */
-		rcvwin = (copied << 1) + 16 * tp->advmss;
+		rcvwin = ((u64)copied << 1) + 16 * tp->advmss;
 
 		/* If rate increased by 25%,
 		 *	assume slow start, rcvwin = 3 * copied
@@ -606,7 +607,8 @@ void tcp_rcv_space_adjust(struct sock *sk)
 		while (tcp_win_from_space(rcvmem) < tp->advmss)
 			rcvmem += 128;
 
-		rcvbuf = min(rcvwin / tp->advmss * rcvmem, sysctl_tcp_rmem[2]);
+		do_div(rcvwin, tp->advmss);
+		rcvbuf = min_t(u64, rcvwin * rcvmem, sysctl_tcp_rmem[2]);
 		if (rcvbuf > sk->sk_rcvbuf) {
 			sk->sk_rcvbuf = rcvbuf;
 

From f1494fff570d60606cb6f9fb8ee95f79e57b562e Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:41 +0100
Subject: [PATCH 0485/1852] i2c: rcar: make sure clocks are on when doing clock
 calculation

commit e43e0df13f8528ca55ed79f469c4b2af897fa796 upstream.

When calculating the bus speed, the clock should be on, of course. Most
bootloaders left them on, so this went unnoticed so far.

Move the ioremapping out of this clock-enabled-block and prepare for
adding hw initialization there, too.

Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 26 +++++++++++++++++---------
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 599c0d7bd906d..fef53c1ce25d7 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -650,19 +650,23 @@ static int rcar_i2c_probe(struct platform_device *pdev)
 		return PTR_ERR(priv->clk);
 	}
 
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->io = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->io))
+		return PTR_ERR(priv->io);
+
 	bus_speed = 100000; /* default 100 kHz */
 	of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed);
 
 	priv->devtype = (enum rcar_i2c_type)of_match_device(rcar_i2c_dt_ids, dev)->data;
 
+	pm_runtime_enable(dev);
+	pm_runtime_get_sync(dev);
 	ret = rcar_i2c_clock_calculate(priv, bus_speed, dev);
 	if (ret < 0)
-		return ret;
+		goto out_pm_put;
 
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	priv->io = devm_ioremap_resource(dev, res);
-	if (IS_ERR(priv->io))
-		return PTR_ERR(priv->io);
+	pm_runtime_put(dev);
 
 	irq = platform_get_irq(pdev, 0);
 	init_waitqueue_head(&priv->wait);
@@ -682,22 +686,26 @@ static int rcar_i2c_probe(struct platform_device *pdev)
 			       dev_name(dev), priv);
 	if (ret < 0) {
 		dev_err(dev, "cannot get irq %d\n", irq);
-		return ret;
+		goto out_pm_disable;
 	}
 
-	pm_runtime_enable(dev);
 	platform_set_drvdata(pdev, priv);
 
 	ret = i2c_add_numbered_adapter(adap);
 	if (ret < 0) {
 		dev_err(dev, "reg adap failed: %d\n", ret);
-		pm_runtime_disable(dev);
-		return ret;
+		goto out_pm_disable;
 	}
 
 	dev_info(dev, "probed\n");
 
 	return 0;
+
+ out_pm_put:
+	pm_runtime_put(dev);
+ out_pm_disable:
+	pm_runtime_disable(dev);
+	return ret;
 }
 
 static int rcar_i2c_remove(struct platform_device *pdev)

From c4df6f8df297f55acb2095604a3e502dd5ea8194 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:42 +0100
Subject: [PATCH 0486/1852] i2c: rcar: rework hw init

commit 2c78cdc1c06308a59d6ed4145cdba73fdeff8c0d upstream.

We don't need to init HW before every transfer since we know the HW
state then. HW init at probe time is enough. While here, add setting the
clock register which belongs to init HW. Also, set MDBS bit since not
setting it is prohibited according to the manual.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index fef53c1ce25d7..b8ff5f2d3d411 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -144,9 +144,10 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
 {
 	/* reset master mode */
 	rcar_i2c_write(priv, ICMIER, 0);
-	rcar_i2c_write(priv, ICMCR, 0);
+	rcar_i2c_write(priv, ICMCR, MDBS);
 	rcar_i2c_write(priv, ICMSR, 0);
-	rcar_i2c_write(priv, ICMAR, 0);
+	/* start clock */
+	rcar_i2c_write(priv, ICCCR, priv->icccr);
 }
 
 static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
@@ -496,16 +497,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 
 	pm_runtime_get_sync(dev);
 
-	/*-------------- spin lock -----------------*/
-	spin_lock_irqsave(&priv->lock, flags);
-
-	rcar_i2c_init(priv);
-	/* start clock */
-	rcar_i2c_write(priv, ICCCR, priv->icccr);
-
-	spin_unlock_irqrestore(&priv->lock, flags);
-	/*-------------- spin unlock -----------------*/
-
 	ret = rcar_i2c_bus_barrier(priv);
 	if (ret < 0)
 		goto out;
@@ -666,6 +657,7 @@ static int rcar_i2c_probe(struct platform_device *pdev)
 	if (ret < 0)
 		goto out_pm_put;
 
+	rcar_i2c_init(priv);
 	pm_runtime_put(dev);
 
 	irq = platform_get_irq(pdev, 0);

From bcbc284e13590605388dbd545e07af72b51d16db Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:43 +0100
Subject: [PATCH 0487/1852] i2c: rcar: remove unused IOERROR state

commit 90f779e565bdc18dd4f79d81cf11f43a7266010b upstream.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index b8ff5f2d3d411..7510733a39b5b 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -94,7 +94,6 @@
 #define RCAR_IRQ_ACK_RECV	(~(MAT | MDR) & 0xFF)
 
 #define ID_LAST_MSG	(1 << 0)
-#define ID_IOERROR	(1 << 1)
 #define ID_DONE		(1 << 2)
 #define ID_ARBLOST	(1 << 3)
 #define ID_NACK		(1 << 4)
@@ -541,11 +540,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 			break;
 		}
 
-		if (rcar_i2c_flags_has(priv, ID_IOERROR)) {
-			ret = -EIO;
-			break;
-		}
-
 		ret = i + 1; /* The number of transfer */
 	}
 out:

From 28e27ecc80a1e25fbcbfca47d3889cb981511a27 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:44 +0100
Subject: [PATCH 0488/1852] i2c: rcar: remove spinlock

commit ff2316b87a336bff940939cd9fc56287ed48e578 upstream.

After making sure to reinit the HW and clear interrupts in the timeout
case, we know that interrupts are always disabled in the sections
protected by the spinlock. Thus, we can simply remove it which is a
preparation for further refactoring. While here, rename the timeout
variable to time_left which is way more readable.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 23 ++++-------------------
 1 file changed, 4 insertions(+), 19 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 7510733a39b5b..46b6a5fd5c1b9 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -33,7 +33,6 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/slab.h>
-#include <linux/spinlock.h>
 
 /* register offsets */
 #define ICSCR	0x00	/* slave ctrl */
@@ -110,7 +109,6 @@ struct rcar_i2c_priv {
 	struct i2c_msg	*msg;
 	struct clk *clk;
 
-	spinlock_t lock;
 	wait_queue_head_t wait;
 
 	int pos;
@@ -429,9 +427,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 	irqreturn_t result = IRQ_HANDLED;
 	u32 msr;
 
-	/*-------------- spin lock -----------------*/
-	spin_lock(&priv->lock);
-
 	if (rcar_i2c_slave_irq(priv))
 		goto exit;
 
@@ -478,9 +473,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 	}
 
 exit:
-	spin_unlock(&priv->lock);
-	/*-------------- spin unlock -----------------*/
-
 	return result;
 }
 
@@ -490,9 +482,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 {
 	struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
 	struct device *dev = rcar_i2c_priv_to_dev(priv);
-	unsigned long flags;
 	int i, ret;
-	long timeout;
+	long time_left;
 
 	pm_runtime_get_sync(dev);
 
@@ -507,9 +498,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 			break;
 		}
 
-		/*-------------- spin lock -----------------*/
-		spin_lock_irqsave(&priv->lock, flags);
-
 		/* init each data */
 		priv->msg	= &msgs[i];
 		priv->pos	= 0;
@@ -519,13 +507,11 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 
 		rcar_i2c_prepare_msg(priv);
 
-		spin_unlock_irqrestore(&priv->lock, flags);
-		/*-------------- spin unlock -----------------*/
-
-		timeout = wait_event_timeout(priv->wait,
+		time_left = wait_event_timeout(priv->wait,
 					     rcar_i2c_flags_has(priv, ID_DONE),
 					     adap->timeout);
-		if (!timeout) {
+		if (!time_left) {
+			rcar_i2c_init(priv);
 			ret = -ETIMEDOUT;
 			break;
 		}
@@ -656,7 +642,6 @@ static int rcar_i2c_probe(struct platform_device *pdev)
 
 	irq = platform_get_irq(pdev, 0);
 	init_waitqueue_head(&priv->wait);
-	spin_lock_init(&priv->lock);
 
 	adap = &priv->adap;
 	adap->nr = pdev->id;

From 2196ed33d5a4e3beffaeaf737c263aee6b4aa38d Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:45 +0100
Subject: [PATCH 0489/1852] i2c: rcar: refactor setup of a msg

commit b9d0684c79c4b9d30ce0d47d3270493dd0e76e59 upstream.

We want to reuse this function later.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 46b6a5fd5c1b9..7a4d8d2345541 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -106,7 +106,8 @@ enum rcar_i2c_type {
 struct rcar_i2c_priv {
 	void __iomem *io;
 	struct i2c_adapter adap;
-	struct i2c_msg	*msg;
+	struct i2c_msg *msg;
+	int msgs_left;
 	struct clk *clk;
 
 	wait_queue_head_t wait;
@@ -255,6 +256,11 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
 {
 	int read = !!rcar_i2c_is_recv(priv);
 
+	priv->pos = 0;
+	priv->flags = 0;
+	if (priv->msgs_left == 1)
+		rcar_i2c_flags_set(priv, ID_LAST_MSG);
+
 	rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
 	rcar_i2c_write(priv, ICMSR, 0);
 	rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
@@ -499,11 +505,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 		}
 
 		/* init each data */
-		priv->msg	= &msgs[i];
-		priv->pos	= 0;
-		priv->flags	= 0;
-		if (i == num - 1)
-			rcar_i2c_flags_set(priv, ID_LAST_MSG);
+		priv->msg = &msgs[i];
+		priv->msgs_left = num - i;
 
 		rcar_i2c_prepare_msg(priv);
 

From cab85fc92fa96355c62edfc691239457d1cb19a1 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:46 +0100
Subject: [PATCH 0490/1852] i2c: rcar: init new messages in irq

commit cc21d0b4b62e41e5013d763adade5ea4462c33a4 upstream.

Setting up new messages was done in process context while handling a
message was in interrupt context. Because of the HW design, this IP core
is sensitive to timing, so the context switches were too expensive. Move
this setup to interrupt context as well.

In my test setup, this fixed the occasional 'data byte sent twice' issue
which a number of people have seen. It also fixes to send REP_START
after a read message which was wrongly send as a STOP + START sequence
before.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 90 +++++++++++++++++------------------
 1 file changed, 43 insertions(+), 47 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 7a4d8d2345541..44662e25b24a7 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -267,10 +267,17 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
 	rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
 }
 
+static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv)
+{
+	priv->msg++;
+	priv->msgs_left--;
+	rcar_i2c_prepare_msg(priv);
+}
+
 /*
  *		interrupt functions
  */
-static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
+static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
 {
 	struct i2c_msg *msg = priv->msg;
 
@@ -280,7 +287,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
 	 * Do nothing
 	 */
 	if (!(msr & MDE))
-		return 0;
+		return;
 
 	/*
 	 * If address transfer phase finished,
@@ -309,29 +316,23 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
 		 * [ICRXTX] -> [SHIFT] -> [I2C bus]
 		 */
 
-		if (priv->flags & ID_LAST_MSG)
+		if (priv->flags & ID_LAST_MSG) {
 			/*
 			 * If current msg is the _LAST_ msg,
 			 * prepare stop condition here.
 			 * ID_DONE will be set on STOP irq.
 			 */
 			rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
-		else
-			/*
-			 * If current msg is _NOT_ last msg,
-			 * it doesn't call stop phase.
-			 * thus, there is no STOP irq.
-			 * return ID_DONE here.
-			 */
-			return ID_DONE;
+		} else {
+			rcar_i2c_next_msg(priv);
+			return;
+		}
 	}
 
 	rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
-
-	return 0;
 }
 
-static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
+static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
 {
 	struct i2c_msg *msg = priv->msg;
 
@@ -341,7 +342,7 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
 	 * Do nothing
 	 */
 	if (!(msr & MDR))
-		return 0;
+		return;
 
 	if (msr & MAT) {
 		/*
@@ -367,9 +368,10 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
 	else
 		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
 
-	rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
-
-	return 0;
+	if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG))
+		rcar_i2c_next_msg(priv);
+	else
+		rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
 }
 
 static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
@@ -462,14 +464,15 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 
 	/* Stop */
 	if (msr & MST) {
+		priv->msgs_left--; /* The last message also made it */
 		rcar_i2c_flags_set(priv, ID_DONE);
 		goto out;
 	}
 
 	if (rcar_i2c_is_recv(priv))
-		rcar_i2c_flags_set(priv, rcar_i2c_irq_recv(priv, msr));
+		rcar_i2c_irq_recv(priv, msr);
 	else
-		rcar_i2c_flags_set(priv, rcar_i2c_irq_send(priv, msr));
+		rcar_i2c_irq_send(priv, msr);
 
 out:
 	if (rcar_i2c_flags_has(priv, ID_DONE)) {
@@ -501,35 +504,28 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 		/* This HW can't send STOP after address phase */
 		if (msgs[i].len == 0) {
 			ret = -EOPNOTSUPP;
-			break;
-		}
-
-		/* init each data */
-		priv->msg = &msgs[i];
-		priv->msgs_left = num - i;
-
-		rcar_i2c_prepare_msg(priv);
-
-		time_left = wait_event_timeout(priv->wait,
-					     rcar_i2c_flags_has(priv, ID_DONE),
-					     adap->timeout);
-		if (!time_left) {
-			rcar_i2c_init(priv);
-			ret = -ETIMEDOUT;
-			break;
-		}
-
-		if (rcar_i2c_flags_has(priv, ID_NACK)) {
-			ret = -ENXIO;
-			break;
-		}
-
-		if (rcar_i2c_flags_has(priv, ID_ARBLOST)) {
-			ret = -EAGAIN;
-			break;
+			goto out;
 		}
+	}
 
-		ret = i + 1; /* The number of transfer */
+	/* init data */
+	priv->msg = msgs;
+	priv->msgs_left = num;
+
+	rcar_i2c_prepare_msg(priv);
+
+	time_left = wait_event_timeout(priv->wait,
+				     rcar_i2c_flags_has(priv, ID_DONE),
+				     num * adap->timeout);
+	if (!time_left) {
+		rcar_i2c_init(priv);
+		ret = -ETIMEDOUT;
+	} else if (rcar_i2c_flags_has(priv, ID_NACK)) {
+		ret = -ENXIO;
+	} else if (rcar_i2c_flags_has(priv, ID_ARBLOST)) {
+		ret = -EAGAIN;
+	} else {
+		ret = num - priv->msgs_left; /* The number of transfer */
 	}
 out:
 	pm_runtime_put(dev);

From 95e0df96a2b409eb613cc18c417023ea5ba0e70f Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:47 +0100
Subject: [PATCH 0491/1852] i2c: rcar: don't issue stop when HW does it
 automatically

commit d89667b14f9d13b684287f6189ca209af5feee43 upstream.

The manual says (55.4.8.6) that HW does automatically send STOP after
NACK was received. My measuerments confirm that.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 44662e25b24a7..6f23b97a15574 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -455,8 +455,8 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 
 	/* Nack */
 	if (msr & MNR) {
-		/* go to stop phase */
-		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+		/* HW automatically sends STOP after received NACK */
+		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
 		rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
 		rcar_i2c_flags_set(priv, ID_NACK);
 		goto out;

From 6af97d129b097ef2bd9fbafc0df4de511b390388 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:48 +0100
Subject: [PATCH 0492/1852] i2c: rcar: check master irqs before slave irqs

commit c3be0af15959e11fa535d5332ab3d7cf34abd09b upstream.

Due to the HW design, master IRQs are timing critical, so give them
precedence over slave IRQ.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 6f23b97a15574..ee3e02acf77d7 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -432,19 +432,17 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
 static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 {
 	struct rcar_i2c_priv *priv = ptr;
-	irqreturn_t result = IRQ_HANDLED;
 	u32 msr;
 
-	if (rcar_i2c_slave_irq(priv))
-		goto exit;
-
 	msr = rcar_i2c_read(priv, ICMSR);
 
 	/* Only handle interrupts that are currently enabled */
 	msr &= rcar_i2c_read(priv, ICMIER);
 	if (!msr) {
-		result = IRQ_NONE;
-		goto exit;
+		if (rcar_i2c_slave_irq(priv))
+			return IRQ_HANDLED;
+
+		return IRQ_NONE;
 	}
 
 	/* Arbitration lost */
@@ -481,8 +479,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 		wake_up(&priv->wait);
 	}
 
-exit:
-	return result;
+	return IRQ_HANDLED;
 }
 
 static int rcar_i2c_master_xfer(struct i2c_adapter *adap,

From 2b3891675275f23088ff5e9ac2cc88e1d26382a5 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Thu, 19 Nov 2015 16:56:49 +0100
Subject: [PATCH 0493/1852] i2c: rcar: revoke START request early

commit 52df445f29b79006d8b2dcd129152987c0d3bd64 upstream.

If we don't clear START generation as soon as possible, it may cause
another message to be generated, e.g. when receiving NACK in address
phase. To keep the race window as small as possible, we clear it right
at the beginning of the interrupt. We don't need any checks since we
always want to stop START and STOP generation on the next occasion after
we started it.

This patch improves the situation but sadly does not completely fix it.
It is still to be researched if we can do better given this HW design.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 23 +++++++----------------
 1 file changed, 7 insertions(+), 16 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index ee3e02acf77d7..6f89484765e30 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -83,6 +83,7 @@
 
 #define RCAR_BUS_PHASE_START	(MDBS | MIE | ESG)
 #define RCAR_BUS_PHASE_DATA	(MDBS | MIE)
+#define RCAR_BUS_MASK_DATA	(~(ESG | FSB) & 0xFF)
 #define RCAR_BUS_PHASE_STOP	(MDBS | MIE | FSB)
 
 #define RCAR_IRQ_SEND	(MNR | MAL | MST | MAT | MDE)
@@ -289,13 +290,6 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
 	if (!(msr & MDE))
 		return;
 
-	/*
-	 * If address transfer phase finished,
-	 * goto data phase.
-	 */
-	if (msr & MAT)
-		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
-
 	if (priv->pos < msg->len) {
 		/*
 		 * Prepare next data to ICRXTX register.
@@ -345,11 +339,7 @@ static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
 		return;
 
 	if (msr & MAT) {
-		/*
-		 * Address transfer phase finished,
-		 * but, there is no data at this point.
-		 * Do nothing.
-		 */
+		/* Address transfer phase finished, but no data at this point. */
 	} else if (priv->pos < msg->len) {
 		/*
 		 * get received data
@@ -365,8 +355,6 @@ static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
 	 */
 	if (priv->pos + 1 >= msg->len)
 		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
-	else
-		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
 
 	if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG))
 		rcar_i2c_next_msg(priv);
@@ -432,7 +420,11 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
 static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 {
 	struct rcar_i2c_priv *priv = ptr;
-	u32 msr;
+	u32 msr, val;
+
+	/* Clear START or STOP as soon as we can */
+	val = rcar_i2c_read(priv, ICMCR);
+	rcar_i2c_write(priv, ICMCR, val & RCAR_BUS_MASK_DATA);
 
 	msr = rcar_i2c_read(priv, ICMSR);
 
@@ -454,7 +446,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
 	/* Nack */
 	if (msr & MNR) {
 		/* HW automatically sends STOP after received NACK */
-		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
 		rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
 		rcar_i2c_flags_set(priv, ID_NACK);
 		goto out;

From 0bb6adae1817c3e8e6a65d8ebd9e95deac18766a Mon Sep 17 00:00:00 2001
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Thu, 12 Nov 2015 13:37:40 +0900
Subject: [PATCH 0494/1852] dmaengine: usb-dmac: fix endless loop in
 usb_dmac_chan_terminate_all()

commit d9f5efade2cfd729138a7cafb46d01044da40f5e upstream.

This patch fixes an issue that list_for_each_entry() in
usb_dmac_chan_terminate_all() is possible to cause endless loop because
this will move own desc to the desc_freed. So, this driver should use
list_for_each_entry_safe() instead of list_for_each_entry().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/dma/sh/usb-dmac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/sh/usb-dmac.c b/drivers/dma/sh/usb-dmac.c
index 56410ea75ac50..6682b3eec2b66 100644
--- a/drivers/dma/sh/usb-dmac.c
+++ b/drivers/dma/sh/usb-dmac.c
@@ -448,7 +448,7 @@ usb_dmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 static int usb_dmac_chan_terminate_all(struct dma_chan *chan)
 {
 	struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
-	struct usb_dmac_desc *desc;
+	struct usb_dmac_desc *desc, *_desc;
 	unsigned long flags;
 	LIST_HEAD(head);
 	LIST_HEAD(list);
@@ -459,7 +459,7 @@ static int usb_dmac_chan_terminate_all(struct dma_chan *chan)
 	if (uchan->desc)
 		uchan->desc = NULL;
 	list_splice_init(&uchan->desc_got, &list);
-	list_for_each_entry(desc, &list, node)
+	list_for_each_entry_safe(desc, _desc, &list, node)
 		list_move_tail(&desc->node, &uchan->desc_freed);
 	spin_unlock_irqrestore(&uchan->vc.lock, flags);
 	vchan_dma_desc_free_list(&uchan->vc, &head);

From 67af1e8a1758512536e2701767a399562f7f81bb Mon Sep 17 00:00:00 2001
From: Martin Kelly <mkelly@xevo.com>
Date: Mon, 26 Mar 2018 14:27:52 -0700
Subject: [PATCH 0495/1852] iio:kfifo_buf: check for uint overflow

commit 3d13de4b027d5f6276c0f9d3a264f518747d83f2 upstream.

Currently, the following causes a kernel OOPS in memcpy:

echo 1073741825 > buffer/length
echo 1 > buffer/enable

Note that using 1073741824 instead of 1073741825 causes "write error:
Cannot allocate memory" but no OOPS.

This is because 1073741824 == 2^30 and 1073741825 == 2^30+1. Since kfifo
rounds up to the nearest power of 2, it will actually call kmalloc with
roundup_pow_of_two(length) * bytes_per_datum.

Using length == 1073741825 and bytes_per_datum == 2, we get:

kmalloc(roundup_pow_of_two(1073741825) * 2
or kmalloc(2147483648 * 2)
or kmalloc(4294967296)
or kmalloc(UINT_MAX + 1)

so this overflows to 0, causing kmalloc to return ZERO_SIZE_PTR and
subsequent memcpy to fail once the device is enabled.

Fix this by checking for overflow prior to allocating a kfifo. With this
check added, the above code returns -EINVAL when enabling the buffer,
rather than causing an OOPS.

Signed-off-by: Martin Kelly <mkelly@xevo.com>
cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/iio/buffer/kfifo_buf.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iio/buffer/kfifo_buf.c b/drivers/iio/buffer/kfifo_buf.c
index c5b999f0c5194..7ef9b13262a80 100644
--- a/drivers/iio/buffer/kfifo_buf.c
+++ b/drivers/iio/buffer/kfifo_buf.c
@@ -24,6 +24,13 @@ static inline int __iio_allocate_kfifo(struct iio_kfifo *buf,
 	if ((length == 0) || (bytes_per_datum == 0))
 		return -EINVAL;
 
+	/*
+	 * Make sure we don't overflow an unsigned int after kfifo rounds up to
+	 * the next power of 2.
+	 */
+	if (roundup_pow_of_two(length) > UINT_MAX / bytes_per_datum)
+		return -EINVAL;
+
 	return __kfifo_alloc((struct __kfifo *)&buf->kf, length,
 			     bytes_per_datum, GFP_KERNEL);
 }

From 55ccda939790f96552885f362f0530769c719511 Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@mips.com>
Date: Wed, 16 May 2018 16:39:58 +0100
Subject: [PATCH 0496/1852] MIPS: ptrace: Fix PTRACE_PEEKUSR requests for
 64-bit FGRs

commit c7e814628df65f424fe197dde73bfc67e4a244d7 upstream.

Use 64-bit accesses for 64-bit floating-point general registers with
PTRACE_PEEKUSR, removing the truncation of their upper halves in the
FR=1 mode, caused by commit bbd426f542cb ("MIPS: Simplify FP context
access"), which inadvertently switched them to using 32-bit accesses.

The PTRACE_POKEUSR side is fine as it's never been broken and continues
using 64-bit accesses.

Fixes: bbd426f542cb ("MIPS: Simplify FP context access")
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.15+
Patchwork: https://patchwork.linux-mips.org/patch/19334/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/ptrace.c   | 2 +-
 arch/mips/kernel/ptrace32.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 8f9d85a087e48..0b70d62e22317 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -840,7 +840,7 @@ long arch_ptrace(struct task_struct *child, long request,
 				break;
 			}
 #endif
-			tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
+			tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
 			break;
 		case PC:
 			tmp = regs->cp0_epc;
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index b4b7e02443e73..d95117e71f690 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -107,7 +107,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 						addr & 1);
 				break;
 			}
-			tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
+			tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
 			break;
 		case PC:
 			tmp = regs->cp0_epc;

From ad4b0658becabff284949b8163975ffdca76c1cd Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@mips.com>
Date: Tue, 15 May 2018 23:04:44 +0100
Subject: [PATCH 0497/1852] MIPS: prctl: Disallow FRE without FR with
 PR_SET_FP_MODE requests

commit 28e4213dd331e944e7fca1954a946829162ed9d4 upstream.

Having PR_FP_MODE_FRE (i.e. Config5.FRE) set without PR_FP_MODE_FR (i.e.
Status.FR) is not supported as the lone purpose of Config5.FRE is to
emulate Status.FR=0 handling on FPU hardware that has Status.FR=1
hardwired[1][2].  Also we do not handle this case elsewhere, and assume
throughout our code that TIF_HYBRID_FPREGS and TIF_32BIT_FPREGS cannot
be set both at once for a task, leading to inconsistent behaviour if
this does happen.

Return unsuccessfully then from prctl(2) PR_SET_FP_MODE calls requesting
PR_FP_MODE_FRE to be set with PR_FP_MODE_FR clear.  This corresponds to
modes allowed by `mips_set_personality_fp'.

References:

[1] "MIPS Architecture For Programmers, Vol. III: MIPS32 / microMIPS32
    Privileged Resource Architecture", Imagination Technologies,
    Document Number: MD00090, Revision 6.02, July 10, 2015, Table 9.69
    "Config5 Register Field Descriptions", p. 262

[2] "MIPS Architecture For Programmers, Volume III: MIPS64 / microMIPS64
    Privileged Resource Architecture", Imagination Technologies,
    Document Number: MD00091, Revision 6.03, December 22, 2015, Table
    9.72 "Config5 Register Field Descriptions", p. 288

Fixes: 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.0+
Patchwork: https://patchwork.linux-mips.org/patch/19327/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/process.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index fe61ce7ad9b1b..054a22c0873b6 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -684,6 +684,10 @@ int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
 	if (value & ~known_bits)
 		return -EOPNOTSUPP;
 
+	/* Setting FRE without FR is not supported.  */
+	if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
+		return -EOPNOTSUPP;
+
 	/* Avoid inadvertently triggering emulation */
 	if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
 	    !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))

From af7913e401311c854b972309f774f8e420de686f Mon Sep 17 00:00:00 2001
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Mon, 21 May 2018 11:17:29 -0700
Subject: [PATCH 0498/1852] scsi: scsi_transport_srp: Fix shost to rport
 translation

commit c9ddf73476ff4fffb7a87bd5107a0705bf2cf64b upstream.

Since an SRP remote port is attached as a child to shost->shost_gendev
and as the only child, the translation from the shost pointer into an
rport pointer must happen by looking up the shost child that is an
rport. This patch fixes the following KASAN complaint:

BUG: KASAN: slab-out-of-bounds in srp_timed_out+0x57/0x110 [scsi_transport_srp]
Read of size 4 at addr ffff880035d3fcc0 by task kworker/1:0H/19

CPU: 1 PID: 19 Comm: kworker/1:0H Not tainted 4.16.0-rc3-dbg+ #1
Workqueue: kblockd blk_mq_timeout_work
Call Trace:
dump_stack+0x85/0xc7
print_address_description+0x65/0x270
kasan_report+0x231/0x350
srp_timed_out+0x57/0x110 [scsi_transport_srp]
scsi_times_out+0xc7/0x3f0 [scsi_mod]
blk_mq_terminate_expired+0xc2/0x140
bt_iter+0xbc/0xd0
blk_mq_queue_tag_busy_iter+0x1c7/0x350
blk_mq_timeout_work+0x325/0x3f0
process_one_work+0x441/0xa50
worker_thread+0x76/0x6c0
kthread+0x1b2/0x1d0
ret_from_fork+0x24/0x30

Fixes: e68ca75200fe ("scsi_transport_srp: Reduce failover time")
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: Hannes Reinecke <hare@suse.com>
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: Jason Gunthorpe <jgg@mellanox.com>
Cc: Doug Ledford <dledford@redhat.com>
Cc: Laurence Oberman <loberman@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/scsi_transport_srp.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/scsi_transport_srp.c b/drivers/scsi/scsi_transport_srp.c
index e3cd3ece44121..c3d1891d2d3f3 100644
--- a/drivers/scsi/scsi_transport_srp.c
+++ b/drivers/scsi/scsi_transport_srp.c
@@ -52,6 +52,8 @@ struct srp_internal {
 	struct transport_container rport_attr_cont;
 };
 
+static int scsi_is_srp_rport(const struct device *dev);
+
 #define to_srp_internal(tmpl) container_of(tmpl, struct srp_internal, t)
 
 #define	dev_to_rport(d)	container_of(d, struct srp_rport, dev)
@@ -61,9 +63,24 @@ static inline struct Scsi_Host *rport_to_shost(struct srp_rport *r)
 	return dev_to_shost(r->dev.parent);
 }
 
+static int find_child_rport(struct device *dev, void *data)
+{
+	struct device **child = data;
+
+	if (scsi_is_srp_rport(dev)) {
+		WARN_ON_ONCE(*child);
+		*child = dev;
+	}
+	return 0;
+}
+
 static inline struct srp_rport *shost_to_rport(struct Scsi_Host *shost)
 {
-	return transport_class_to_srp_rport(&shost->shost_gendev);
+	struct device *child = NULL;
+
+	WARN_ON_ONCE(device_for_each_child(&shost->shost_gendev, &child,
+					   find_child_rport) < 0);
+	return child ? dev_to_rport(child) : NULL;
 }
 
 /**
@@ -637,7 +654,8 @@ static enum blk_eh_timer_return srp_timed_out(struct scsi_cmnd *scmd)
 	struct srp_rport *rport = shost_to_rport(shost);
 
 	pr_debug("timeout for sdev %s\n", dev_name(&sdev->sdev_gendev));
-	return rport->fast_io_fail_tmo < 0 && rport->dev_loss_tmo < 0 &&
+	return rport && rport->fast_io_fail_tmo < 0 &&
+		rport->dev_loss_tmo < 0 &&
 		i->f->reset_timer_if_blocked && scsi_device_blocked(sdev) ?
 		BLK_EH_RESET_TIMER : BLK_EH_NOT_HANDLED;
 }

From a790b50b7da32c77ed473e2d20dbbf46fe0c75eb Mon Sep 17 00:00:00 2001
From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Date: Thu, 24 May 2018 11:27:26 +0300
Subject: [PATCH 0499/1852] stm class: Use vmalloc for the master map

commit b5e2ced9bf81393034072dd4d372f6b430bc1f0a upstream.

Fengguang is running into a warning from the buddy allocator:

> swapper/0: page allocation failure: order:9, mode:0x14040c0(GFP_KERNEL|__GFP_COMP), nodemask=(null)
> CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.17.0-rc1 #262
> Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-1 04/01/2014
> Call Trace:
...
>  __kmalloc+0x14b/0x180: ____cache_alloc at mm/slab.c:3127
>  stm_register_device+0xf3/0x5c0: stm_register_device at drivers/hwtracing/stm/core.c:695
...

Which is basically a result of the stm class trying to allocate ~512kB
for the dummy_stm with its default parameters. There's no reason, however,
for it not to be vmalloc()ed instead, which is what this patch does.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
CC: stable@vger.kernel.org # v4.4+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hwtracing/stm/core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/hwtracing/stm/core.c b/drivers/hwtracing/stm/core.c
index cb07713acedaf..d5d9349b10127 100644
--- a/drivers/hwtracing/stm/core.c
+++ b/drivers/hwtracing/stm/core.c
@@ -650,7 +650,7 @@ static void stm_device_release(struct device *dev)
 {
 	struct stm_device *stm = to_stm_device(dev);
 
-	kfree(stm);
+	vfree(stm);
 }
 
 int stm_register_device(struct device *parent, struct stm_data *stm_data,
@@ -667,7 +667,7 @@ int stm_register_device(struct device *parent, struct stm_data *stm_data,
 		return -EINVAL;
 
 	nmasters = stm_data->sw_end - stm_data->sw_start;
-	stm = kzalloc(sizeof(*stm) + nmasters * sizeof(void *), GFP_KERNEL);
+	stm = vzalloc(sizeof(*stm) + nmasters * sizeof(void *));
 	if (!stm)
 		return -ENOMEM;
 
@@ -709,7 +709,7 @@ int stm_register_device(struct device *parent, struct stm_data *stm_data,
 	/* matches device_initialize() above */
 	put_device(&stm->dev);
 err_free:
-	kfree(stm);
+	vfree(stm);
 
 	return err;
 }

From b7292b62d51c272d1497e0a7e02a552e7b698051 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sat, 26 May 2018 08:49:24 +0200
Subject: [PATCH 0500/1852] hwtracing: stm: fix build error on some arches

commit 806e30873f0e74d9d41b0ef761bd4d3e55c7d510 upstream.

Commit b5e2ced9bf81 ("stm class: Use vmalloc for the master map") caused
a build error on some arches as vmalloc.h was not explicitly included.

Fix that by adding it to the list of includes.

Fixes: b5e2ced9bf81 ("stm class: Use vmalloc for the master map")
Reported-by: kbuild test robot <lkp@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hwtracing/stm/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/hwtracing/stm/core.c b/drivers/hwtracing/stm/core.c
index d5d9349b10127..129fcf1c06d98 100644
--- a/drivers/hwtracing/stm/core.c
+++ b/drivers/hwtracing/stm/core.c
@@ -26,6 +26,7 @@
 #include <linux/stm.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
+#include <linux/vmalloc.h>
 #include "stm.h"
 
 #include <uapi/linux/stm.h>

From 865ad3ae679a4644d475040dc32ee6f325f32d16 Mon Sep 17 00:00:00 2001
From: Ondrej Zary <linux@rainbow-software.org>
Date: Fri, 9 Mar 2018 23:22:04 +0100
Subject: [PATCH 0501/1852] drm/i915: Disable LVDS on Radiant P845
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit b3fb22733ae61050f8d10a1d6a8af176c5c5db1a upstream.

Radiant P845 does not have LVDS, only VGA.

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105468
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180309222204.4771-1-linux@rainbow-software.org
(cherry picked from commit 7f7105f99b75aca4f8c2a748ed6b82c7f8be3293)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/i915/intel_lvds.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 5722a393e19b8..f8c104bb23d3b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -768,6 +768,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 		},
 	},
+	{
+		.callback = intel_no_lvds_dmi_callback,
+		.ident = "Radiant P845",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Radiant Systems Inc"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "P845"),
+		},
+	},
 
 	{ }	/* terminating entry */
 };

From bfecad05601960ad88ac0bfc35aad2597abf5bfe Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 25 Apr 2016 17:35:27 +0200
Subject: [PATCH 0502/1852] Kbuild: change CC_OPTIMIZE_FOR_SIZE definition

commit 877417e6ffb9578e8580abf76a71e15732473456 upstream.

CC_OPTIMIZE_FOR_SIZE disables the often useful -Wmaybe-unused warning,
because that causes a ridiculous amount of false positives when combined
with -Os.

This means a lot of warnings don't show up in testing by the developers
that should see them with an 'allmodconfig' kernel that has
CC_OPTIMIZE_FOR_SIZE enabled, but only later in randconfig builds
that don't.

This changes the Kconfig logic around CC_OPTIMIZE_FOR_SIZE to make
it a 'choice' statement defaulting to CC_OPTIMIZE_FOR_PERFORMANCE
that gets added for this purpose. The allmodconfig and allyesconfig
kernels now default to -O2 with the maybe-unused warning enabled.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michal Marek <mmarek@suse.com>
Cc: Nathan Chancellor <natechancellor@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 init/Kconfig | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/init/Kconfig b/init/Kconfig
index a35e73a4e55dc..b72e83288f660 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1382,6 +1382,17 @@ source "usr/Kconfig"
 
 endif
 
+choice
+	prompt "Compiler optimization level"
+	default CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE
+
+config CC_OPTIMIZE_FOR_PERFORMANCE
+	bool "Optimize for performance"
+	help
+	  This is the default optimization level for the kernel, building
+	  with the "-O2" compiler flag for best performance and most
+	  helpful compile-time warnings.
+
 config CC_OPTIMIZE_FOR_SIZE
 	bool "Optimize for size"
 	help
@@ -1390,6 +1401,8 @@ config CC_OPTIMIZE_FOR_SIZE
 
 	  If unsure, say N.
 
+endchoice
+
 config SYSCTL
 	bool
 

From bdc9c6ed479ed79e964c67e92aaea9f6837e8f8f Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Wed, 23 May 2018 22:53:22 -0400
Subject: [PATCH 0503/1852] fix io_destroy()/aio_complete() race

commit 4faa99965e027cc057c5145ce45fa772caa04e8d upstream.

If io_destroy() gets to cancelling everything that can be cancelled and
gets to kiocb_cancel() calling the function driver has left in ->ki_cancel,
it becomes vulnerable to a race with IO completion.  At that point req
is already taken off the list and aio_complete() does *NOT* spin until
we (in free_ioctx_users()) releases ->ctx_lock.  As the result, it proceeds
to kiocb_free(), freing req just it gets passed to ->ki_cancel().

Fix is simple - remove from the list after the call of kiocb_cancel().  All
instances of ->ki_cancel() already have to cope with the being called with
iocb still on list - that's what happens in io_cancel(2).

Cc: stable@kernel.org
Fixes: 0460fef2a921 "aio: use cancellation list lazily"
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/aio.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/fs/aio.c b/fs/aio.c
index 4efaf29354a61..c283eb03cb38e 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -628,9 +628,8 @@ static void free_ioctx_users(struct percpu_ref *ref)
 	while (!list_empty(&ctx->active_reqs)) {
 		req = list_first_entry(&ctx->active_reqs,
 				       struct aio_kiocb, ki_list);
-
-		list_del_init(&req->ki_list);
 		kiocb_cancel(req);
+		list_del_init(&req->ki_list);
 	}
 
 	spin_unlock_irq(&ctx->ctx_lock);

From c2aeb528de9095809f6bce53645adaf44c41eae8 Mon Sep 17 00:00:00 2001
From: Hugh Dickins <hughd@google.com>
Date: Fri, 1 Jun 2018 16:50:50 -0700
Subject: [PATCH 0504/1852] mm: fix the NULL mapping case in
 __isolate_lru_page()

commit 145e1a71e090575c74969e3daa8136d1e5b99fc8 upstream.

George Boole would have noticed a slight error in 4.16 commit
69d763fc6d3a ("mm: pin address_space before dereferencing it while
isolating an LRU page").  Fix it, to match both the comment above it,
and the original behaviour.

Although anonymous pages are not marked PageDirty at first, we have an
old habit of calling SetPageDirty when a page is removed from swap
cache: so there's a category of ex-swap pages that are easily
migratable, but were inadvertently excluded from compaction's async
migration in 4.16.

Link: http://lkml.kernel.org/r/alpine.LSU.2.11.1805302014001.12558@eggly.anvils
Fixes: 69d763fc6d3a ("mm: pin address_space before dereferencing it while isolating an LRU page")
Signed-off-by: Hugh Dickins <hughd@google.com>
Acked-by: Minchan Kim <minchan@kernel.org>
Acked-by: Mel Gorman <mgorman@techsingularity.net>
Reported-by:  Ivan Kalvachev <ikalvachev@gmail.com>
Cc: "Huang, Ying" <ying.huang@intel.com>
Cc: Jan Kara <jack@suse.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/vmscan.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/vmscan.c b/mm/vmscan.c
index b58ca729f20ae..76853088f66bf 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -1331,7 +1331,7 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode)
 				return ret;
 
 			mapping = page_mapping(page);
-			migrate_dirty = mapping && mapping->a_ops->migratepage;
+			migrate_dirty = !mapping || mapping->a_ops->migratepage;
 			unlock_page(page);
 			if (!migrate_dirty)
 				return ret;

From 4abb3f269e3e7cee5ddf394296b900d69dbca76d Mon Sep 17 00:00:00 2001
From: "David S. Miller" <davem@davemloft.net>
Date: Thu, 1 Jun 2017 09:42:46 -0700
Subject: [PATCH 0505/1852] sparc64: Fix build warnings with gcc 7.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 0fde7ad71ee371ede73b3f326e58f9e8d102feb6 upstream.

arch/sparc/kernel/ds.c: In function ‘register_services’:
arch/sparc/kernel/ds.c:912:3: error: ‘strcpy’: writing at least 1 byte
into a region of size 0 overflows the destination

Reported-by: Anatoly Pugachev <matorola@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/sparc/kernel/ds.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index f87a55d770946..9b3f2e212b377 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -908,7 +908,7 @@ static int register_services(struct ds_info *dp)
 		pbuf.req.handle = cp->handle;
 		pbuf.req.major = 1;
 		pbuf.req.minor = 0;
-		strcpy(pbuf.req.svc_id, cp->service_id);
+		strcpy(pbuf.id_buf, cp->service_id);
 
 		err = __ds_send(lp, &pbuf, msg_len);
 		if (err > 0)

From 4635510f8a64381c65d47fef251f1f69abb76e7f Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 6 Jun 2018 16:46:24 +0200
Subject: [PATCH 0506/1852] Linux 4.4.136

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 2f24e579f5a4c..9ab1ef4668b0d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 135
+SUBLEVEL = 136
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 966e563ca94fc7b4e5eb1dcf0cbbe730aae7de4a Mon Sep 17 00:00:00 2001
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Date: Tue, 27 Jun 2017 12:27:24 +0200
Subject: [PATCH 0507/1852] tpm: do not suspend/resume if power stays on

commit b5d0ebc99bf5d0801a5ecbe958caa3d68b8eaee8 upstream.

The suspend/resume behavior of the TPM can be controlled by setting
"powered-while-suspended" in the DTS. This is useful for the cases
when hardware does not power-off the TPM.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: James Morris <james.l.morris@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/tpm/tpm-chip.c      | 13 +++++++++++++
 drivers/char/tpm/tpm-interface.c |  3 +++
 drivers/char/tpm/tpm.h           |  1 +
 3 files changed, 17 insertions(+)

diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index a0d9ac6b6cc91..e759100e41a75 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c
@@ -26,6 +26,7 @@
 #include <linux/spinlock.h>
 #include <linux/freezer.h>
 #include <linux/major.h>
+#include <linux/of.h>
 #include "tpm.h"
 #include "tpm_eventlog.h"
 
@@ -324,8 +325,20 @@ static void tpm1_chip_unregister(struct tpm_chip *chip)
  */
 int tpm_chip_register(struct tpm_chip *chip)
 {
+#ifdef CONFIG_OF
+	struct device_node *np;
+#endif
 	int rc;
 
+#ifdef CONFIG_OF
+	np = of_find_node_by_name(NULL, "vtpm");
+	if (np) {
+		if (of_property_read_bool(np, "powered-while-suspended"))
+			chip->flags |= TPM_CHIP_FLAG_ALWAYS_POWERED;
+	}
+	of_node_put(np);
+#endif
+
 	rc = tpm1_chip_register(chip);
 	if (rc)
 		return rc;
diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c
index 36afc1a21699c..6ee3611d46cda 100644
--- a/drivers/char/tpm/tpm-interface.c
+++ b/drivers/char/tpm/tpm-interface.c
@@ -931,6 +931,9 @@ int tpm_pm_suspend(struct device *dev)
 	if (chip == NULL)
 		return -ENODEV;
 
+	if (chip->flags & TPM_CHIP_FLAG_ALWAYS_POWERED)
+		return 0;
+
 	if (chip->flags & TPM_CHIP_FLAG_TPM2) {
 		tpm2_shutdown(chip, TPM2_SU_STATE);
 		return 0;
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 772d99b3a8e4b..36e1abda00f92 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -168,6 +168,7 @@ struct tpm_vendor_specific {
 enum tpm_chip_flags {
 	TPM_CHIP_FLAG_REGISTERED	= BIT(0),
 	TPM_CHIP_FLAG_TPM2		= BIT(1),
+	TPM_CHIP_FLAG_ALWAYS_POWERED	= BIT(5),
 };
 
 struct tpm_chip {

From d70a7252229ca9a923a3c51b5386216ea01239d1 Mon Sep 17 00:00:00 2001
From: Chris Chiu <chiu@endlessm.com>
Date: Tue, 20 Mar 2018 15:36:40 +0800
Subject: [PATCH 0508/1852] tpm: self test failure should not cause suspend to
 fail

commit 0803d7befa15cab5717d667a97a66214d2a4c083 upstream.

The Acer Acer Veriton X4110G has a TPM device detected as:
  tpm_tis 00:0b: 1.2 TPM (device-id 0xFE, rev-id 71)

After the first S3 suspend, the following error appears during resume:
  tpm tpm0: A TPM error(38) occurred continue selftest

Any following S3 suspend attempts will now fail with this error:
  tpm tpm0: Error (38) sending savestate before suspend
  PM: Device 00:0b failed to suspend: error 38

Error 38 is TPM_ERR_INVALID_POSTINIT which means the TPM is
not in the correct state. This indicates that the platform BIOS
is not sending the usual TPM_Startup command during S3 resume.
>From this point onwards, all TPM commands will fail.

The same issue was previously reported on Foxconn 6150BK8MC and
Sony Vaio TX3.

The platform behaviour seems broken here, but we should not break
suspend/resume because of this.

When the unexpected TPM state is encountered, set a flag to skip the
affected TPM_SaveState command on later suspends.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Chiu <chiu@endlessm.com>
Signed-off-by: Daniel Drake <drake@endlessm.com>
Link: http://lkml.kernel.org/r/CAB4CAwfSCvj1cudi+MWaB5g2Z67d9DwY1o475YOZD64ma23UiQ@mail.gmail.com
Link: https://lkml.org/lkml/2011/3/28/192
Link: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=591031
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/tpm/tpm-interface.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c
index 6ee3611d46cda..95a40ec854ad3 100644
--- a/drivers/char/tpm/tpm-interface.c
+++ b/drivers/char/tpm/tpm-interface.c
@@ -787,6 +787,10 @@ int tpm_do_selftest(struct tpm_chip *chip)
 	loops = jiffies_to_msecs(duration) / delay_msec;
 
 	rc = tpm_continue_selftest(chip);
+	if (rc == TPM_ERR_INVALID_POSTINIT) {
+		chip->flags |= TPM_CHIP_FLAG_ALWAYS_POWERED;
+		dev_info(&chip->dev, "TPM not ready (%d)\n", rc);
+	}
 	/* This may fail if there was no TPM driver during a suspend/resume
 	 * cycle; some may return 10 (BAD_ORDINAL), others 28 (FAILEDSELFTEST)
 	 */

From f42fff5fc3e0a56ac4f1985e7cd633db64ba6c0b Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Fri, 11 May 2018 09:52:01 -0700
Subject: [PATCH 0509/1852] mmap: introduce sane default mmap limits

commit be83bbf806822b1b89e0a0f23cd87cddc409e429 upstream.

The internal VM "mmap()" interfaces are based on the mmap target doing
everything using page indexes rather than byte offsets, because
traditionally (ie 32-bit) we had the situation that the byte offset
didn't fit in a register.  So while the mmap virtual address was limited
by the word size of the architecture, the backing store was not.

So we're basically passing "pgoff" around as a page index, in order to
be able to describe backing store locations that are much bigger than
the word size (think files larger than 4GB etc).

But while this all makes a ton of sense conceptually, we've been dogged
by various drivers that don't really understand this, and internally
work with byte offsets, and then try to work with the page index by
turning it into a byte offset with "pgoff << PAGE_SHIFT".

Which obviously can overflow.

Adding the size of the mapping to it to get the byte offset of the end
of the backing store just exacerbates the problem, and if you then use
this overflow-prone value to check various limits of your device driver
mmap capability, you're just setting yourself up for problems.

The correct thing for drivers to do is to do their limit math in page
indices, the way the interface is designed.  Because the generic mmap
code _does_ test that the index doesn't overflow, since that's what the
mmap code really cares about.

HOWEVER.

Finding and fixing various random drivers is a sisyphean task, so let's
just see if we can just make the core mmap() code do the limiting for
us.  Realistically, the only "big" backing stores we need to care about
are regular files and block devices, both of which are known to do this
properly, and which have nice well-defined limits for how much data they
can access.

So let's special-case just those two known cases, and then limit other
random mmap users to a backing store that still fits in "unsigned long".
Realistically, that's not much of a limit at all on 64-bit, and on
32-bit architectures the only worry might be the GPU drivers, which can
have big physical address spaces.

To make it possible for drivers like that to say that they are 64-bit
clean, this patch does repurpose the "FMODE_UNSIGNED_OFFSET" bit in the
file flags to allow drivers to mark their file descriptors as safe in
the full 64-bit mmap address space.

[ The timing for doing this is less than optimal, and this should really
  go in a merge window. But realistically, this needs wide testing more
  than it needs anything else, and being main-line is the only way to do
  that.

  So the earlier the better, even if it's outside the proper development
  cycle        - Linus ]

Cc: Kees Cook <keescook@chromium.org>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Willy Tarreau <w@1wt.eu>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/mmap.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/mm/mmap.c b/mm/mmap.c
index 9c9ae859fbbb1..88d320b245dd5 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1296,6 +1296,35 @@ static inline int mlock_future_check(struct mm_struct *mm,
 	return 0;
 }
 
+static inline u64 file_mmap_size_max(struct file *file, struct inode *inode)
+{
+	if (S_ISREG(inode->i_mode))
+		return inode->i_sb->s_maxbytes;
+
+	if (S_ISBLK(inode->i_mode))
+		return MAX_LFS_FILESIZE;
+
+	/* Special "we do even unsigned file positions" case */
+	if (file->f_mode & FMODE_UNSIGNED_OFFSET)
+		return 0;
+
+	/* Yes, random drivers might want more. But I'm tired of buggy drivers */
+	return ULONG_MAX;
+}
+
+static inline bool file_mmap_ok(struct file *file, struct inode *inode,
+				unsigned long pgoff, unsigned long len)
+{
+	u64 maxsize = file_mmap_size_max(file, inode);
+
+	if (maxsize && len > maxsize)
+		return false;
+	maxsize -= len;
+	if (pgoff > maxsize >> PAGE_SHIFT)
+		return false;
+	return true;
+}
+
 /*
  * The caller must hold down_write(&current->mm->mmap_sem).
  */
@@ -1361,6 +1390,9 @@ unsigned long do_mmap(struct file *file, unsigned long addr,
 	if (file) {
 		struct inode *inode = file_inode(file);
 
+		if (!file_mmap_ok(file, inode, pgoff, len))
+			return -EOVERFLOW;
+
 		switch (flags & MAP_TYPE) {
 		case MAP_SHARED:
 			if ((prot&PROT_WRITE) && !(file->f_mode&FMODE_WRITE))

From 2f131851746a8a6aacc6562e05e23b5b6305ba39 Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sat, 19 May 2018 09:29:11 -0700
Subject: [PATCH 0510/1852] mmap: relax file size limit for regular files

commit 423913ad4ae5b3e8fb8983f70969fb522261ba26 upstream.

Commit be83bbf80682 ("mmap: introduce sane default mmap limits") was
introduced to catch problems in various ad-hoc character device drivers
doing mmap and getting the size limits wrong.  In the process, it used
"known good" limits for the normal cases of mapping regular files and
block device drivers.

It turns out that the "s_maxbytes" limit was less "known good" than I
thought.  In particular, /proc doesn't set it, but exposes one regular
file to mmap: /proc/vmcore.  As a result, that file got limited to the
default MAX_INT s_maxbytes value.

This went unnoticed for a while, because apparently the only thing that
needs it is the s390 kernel zfcpdump, but there might be other tools
that use this too.

Vasily suggested just changing s_maxbytes for all of /proc, which isn't
wrong, but makes me nervous at this stage.  So instead, just make the
new mmap limit always be MAX_LFS_FILESIZE for regular files, which won't
affect anything else.  It wasn't the regular file case I was worried
about.

I'd really prefer for maxsize to have been per-inode, but that is not
how things are today.

Fixes: be83bbf80682 ("mmap: introduce sane default mmap limits")
Reported-by: Vasily Gorbik <gor@linux.ibm.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/mmap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/mmap.c b/mm/mmap.c
index 88d320b245dd5..3f8142e22490d 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1299,7 +1299,7 @@ static inline int mlock_future_check(struct mm_struct *mm,
 static inline u64 file_mmap_size_max(struct file *file, struct inode *inode)
 {
 	if (S_ISREG(inode->i_mode))
-		return inode->i_sb->s_maxbytes;
+		return MAX_LFS_FILESIZE;
 
 	if (S_ISBLK(inode->i_mode))
 		return MAX_LFS_FILESIZE;

From edfd69ede692760a0f8e385548344b60a2828a42 Mon Sep 17 00:00:00 2001
From: Nathan Chancellor <natechancellor@gmail.com>
Date: Sat, 2 Jun 2018 09:02:09 -0700
Subject: [PATCH 0511/1852] kconfig: Avoid format overflow warning from GCC 8.1
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 2ae89c7a82ea9d81a19b4fc2df23bef4b112f24e upstream.

In file included from scripts/kconfig/zconf.tab.c:2485:
scripts/kconfig/confdata.c: In function ‘conf_write’:
scripts/kconfig/confdata.c:773:22: warning: ‘%s’ directive writing likely 7 or more bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
  sprintf(newname, "%s%s", dirname, basename);
                      ^~
scripts/kconfig/confdata.c:773:19: note: assuming directive output of 7 bytes
  sprintf(newname, "%s%s", dirname, basename);
                   ^~~~~~
scripts/kconfig/confdata.c:773:2: note: ‘sprintf’ output 1 or more bytes (assuming 4104) into a destination of size 4097
  sprintf(newname, "%s%s", dirname, basename);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
scripts/kconfig/confdata.c:776:23: warning: ‘.tmpconfig.’ directive writing 11 bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
   sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
                       ^~~~~~~~~~~
scripts/kconfig/confdata.c:776:3: note: ‘sprintf’ output between 13 and 4119 bytes into a destination of size 4097
   sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Increase the size of tmpname and newname to make GCC happy.

Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 scripts/kconfig/confdata.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c
index dd243d2abd875..138d7f100f7e8 100644
--- a/scripts/kconfig/confdata.c
+++ b/scripts/kconfig/confdata.c
@@ -743,7 +743,7 @@ int conf_write(const char *name)
 	struct menu *menu;
 	const char *basename;
 	const char *str;
-	char dirname[PATH_MAX+1], tmpname[PATH_MAX+1], newname[PATH_MAX+1];
+	char dirname[PATH_MAX+1], tmpname[PATH_MAX+22], newname[PATH_MAX+8];
 	char *env;
 
 	dirname[0] = 0;

From 96b94c2144653e3098406c9e5027dbf58df10cb2 Mon Sep 17 00:00:00 2001
From: Amir Goldstein <amir73il@gmail.com>
Date: Wed, 30 Aug 2017 09:23:12 -0700
Subject: [PATCH 0512/1852] xfs: fix incorrect log_flushed on fsync

commit 47c7d0b19502583120c3f396c7559e7a77288a68 upstream.

When calling into _xfs_log_force{,_lsn}() with a pointer
to log_flushed variable, log_flushed will be set to 1 if:
1. xlog_sync() is called to flush the active log buffer
AND/OR
2. xlog_wait() is called to wait on a syncing log buffers

xfs_file_fsync() checks the value of log_flushed after
_xfs_log_force_lsn() call to optimize away an explicit
PREFLUSH request to the data block device after writing
out all the file's pages to disk.

This optimization is incorrect in the following sequence of events:

 Task A                    Task B
 -------------------------------------------------------
 xfs_file_fsync()
   _xfs_log_force_lsn()
     xlog_sync()
        [submit PREFLUSH]
                           xfs_file_fsync()
                             file_write_and_wait_range()
                               [submit WRITE X]
                               [endio  WRITE X]
                             _xfs_log_force_lsn()
                               xlog_wait()
        [endio  PREFLUSH]

The write X is not guarantied to be on persistent storage
when PREFLUSH request in completed, because write A was submitted
after the PREFLUSH request, but xfs_file_fsync() of task A will
be notified of log_flushed=1 and will skip explicit flush.

If the system crashes after fsync of task A, write X may not be
present on disk after reboot.

This bug was discovered and demonstrated using Josef Bacik's
dm-log-writes target, which can be used to record block io operations
and then replay a subset of these operations onto the target device.
The test goes something like this:
- Use fsx to execute ops of a file and record ops on log device
- Every now and then fsync the file, store md5 of file and mark
  the location in the log
- Then replay log onto device for each mark, mount fs and compare
  md5 of file to stored value

Cc: Christoph Hellwig <hch@lst.de>
Cc: Josef Bacik <jbacik@fb.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/xfs/xfs_log.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
index f52c72a1a06f2..73b725f965ebc 100644
--- a/fs/xfs/xfs_log.c
+++ b/fs/xfs/xfs_log.c
@@ -3323,8 +3323,6 @@ _xfs_log_force(
 		 */
 		if (iclog->ic_state & XLOG_STATE_IOERROR)
 			return -EIO;
-		if (log_flushed)
-			*log_flushed = 1;
 	} else {
 
 no_sleep:
@@ -3432,8 +3430,6 @@ _xfs_log_force_lsn(
 
 				xlog_wait(&iclog->ic_prev->ic_write_wait,
 							&log->l_icloglock);
-				if (log_flushed)
-					*log_flushed = 1;
 				already_slept = 1;
 				goto try_again;
 			}
@@ -3467,9 +3463,6 @@ _xfs_log_force_lsn(
 			 */
 			if (iclog->ic_state & XLOG_STATE_IOERROR)
 				return -EIO;
-
-			if (log_flushed)
-				*log_flushed = 1;
 		} else {		/* just return */
 			spin_unlock(&log->l_icloglock);
 		}

From 6a0efb180750ad38f6b4f0a601a8fe363aac0001 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Tue, 15 May 2018 13:38:15 +1000
Subject: [PATCH 0513/1852] drm: set FMODE_UNSIGNED_OFFSET for drm files

commit 76ef6b28ea4f81c3d511866a9b31392caa833126 upstream.

Since we have the ttm and gem vma managers using a subset
of the file address space for objects, and these start at
0x100000000 they will overflow the new mmap checks.

I've checked all the mmap routines I could see for any
bad behaviour but overall most people use GEM/TTM VMA
managers even the legacy drivers have a hashtable.

Reported-and-Tested-by: Arthur Marsh (amarsh04 on #radeon)
Fixes: be83bbf8068 (mmap: introduce sane default mmap limits)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/drm_fops.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 1c6223e0e8f83..937e5e8839f74 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -209,6 +209,7 @@ static int drm_open_helper(struct file *filp, struct drm_minor *minor)
 		return -ENOMEM;
 
 	filp->private_data = priv;
+	filp->f_mode |= FMODE_UNSIGNED_OFFSET;
 	priv->filp = filp;
 	priv->uid = current_euid();
 	priv->pid = get_pid(task_pid(current));

From 0d9c44ebde2943be2527975ccd31dfcc137ccb37 Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Wed, 14 Mar 2018 20:02:59 +0100
Subject: [PATCH 0514/1852] brcmfmac: Fix check for ISO3166 code

commit 9b9322db5c5a1917a66c71fe47c3848a9a31227e upstream.

The commit "regulatory: add NUL to request alpha2" increases the length of
alpha2 to 3. This causes a regression on brcmfmac, because
brcmf_cfg80211_reg_notifier() expect valid ISO3166 codes in the complete
array. So fix this accordingly.

Fixes: 657308f73e67 ("regulatory: add NUL to request alpha2")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Franky Lin <franky.lin@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
[bwh: Backported to 4.4: adjust filename]
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c b/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c
index 83e5aa6a9f283..ad35e760ed3f0 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c
@@ -6167,7 +6167,7 @@ static void brcmf_cfg80211_reg_notifier(struct wiphy *wiphy,
 		  req->alpha2[0], req->alpha2[1]);
 
 	/* ignore non-ISO3166 country codes */
-	for (i = 0; i < sizeof(req->alpha2); i++)
+	for (i = 0; i < 2; i++)
 		if (req->alpha2[i] < 'A' || req->alpha2[i] > 'Z') {
 			brcmf_err("not a ISO3166 code\n");
 			return;

From 611fe7f67d93deee5a5cf590c37a86b3fa6c1ace Mon Sep 17 00:00:00 2001
From: Julia Lawall <Julia.Lawall@lip6.fr>
Date: Wed, 6 Jun 2018 15:03:22 +0200
Subject: [PATCH 0515/1852] bnx2x: use the right constant

[ Upstream commit dd612f18a49b63af8b3a5f572d999bdb197385bc ]

Nearby code that also tests port suggests that the P0 constant should be
used when port is zero.

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e,e1;
@@

* e ? e1 : e1
// </smpl>

Fixes: 6c3218c6f7e5 ("bnx2x: Adjust ETS to 578xx")
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index d946bba43726f..87534c6efd66b 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -594,7 +594,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
 	 * slots for the highest priority.
 	 */
 	REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS :
-		   NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
+		   NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
 	/* Mapping between the CREDIT_WEIGHT registers and actual client
 	 * numbers
 	 */

From a7d6e3f7c381018ac6efa9254abc988d801f23d6 Mon Sep 17 00:00:00 2001
From: Alexey Kodanev <alexey.kodanev@oracle.com>
Date: Mon, 21 May 2018 19:28:44 +0300
Subject: [PATCH 0516/1852] dccp: don't free ccid2_hc_tx_sock struct in
 dccp_disconnect()

[ Upstream commit 2677d20677314101293e6da0094ede7b5526d2b1 ]

Syzbot reported the use-after-free in timer_is_static_object() [1].

This can happen because the structure for the rto timer (ccid2_hc_tx_sock)
is removed in dccp_disconnect(), and ccid2_hc_tx_rto_expire() can be
called after that.

The report [1] is similar to the one in commit 120e9dabaf55 ("dccp:
defer ccid_hc_tx_delete() at dismantle time"). And the fix is the same,
delay freeing ccid2_hc_tx_sock structure, so that it is freed in
dccp_sk_destruct().

[1]

==================================================================
BUG: KASAN: use-after-free in timer_is_static_object+0x80/0x90
kernel/time/timer.c:607
Read of size 8 at addr ffff8801bebb5118 by task syz-executor2/25299

CPU: 1 PID: 25299 Comm: syz-executor2 Not tainted 4.17.0-rc5+ #54
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS
Google 01/01/2011
Call Trace:
  <IRQ>
  __dump_stack lib/dump_stack.c:77 [inline]
  dump_stack+0x1b9/0x294 lib/dump_stack.c:113
  print_address_description+0x6c/0x20b mm/kasan/report.c:256
  kasan_report_error mm/kasan/report.c:354 [inline]
  kasan_report.cold.7+0x242/0x2fe mm/kasan/report.c:412
  __asan_report_load8_noabort+0x14/0x20 mm/kasan/report.c:433
  timer_is_static_object+0x80/0x90 kernel/time/timer.c:607
  debug_object_activate+0x2d9/0x670 lib/debugobjects.c:508
  debug_timer_activate kernel/time/timer.c:709 [inline]
  debug_activate kernel/time/timer.c:764 [inline]
  __mod_timer kernel/time/timer.c:1041 [inline]
  mod_timer+0x4d3/0x13b0 kernel/time/timer.c:1102
  sk_reset_timer+0x22/0x60 net/core/sock.c:2742
  ccid2_hc_tx_rto_expire+0x587/0x680 net/dccp/ccids/ccid2.c:147
  call_timer_fn+0x230/0x940 kernel/time/timer.c:1326
  expire_timers kernel/time/timer.c:1363 [inline]
  __run_timers+0x79e/0xc50 kernel/time/timer.c:1666
  run_timer_softirq+0x4c/0x70 kernel/time/timer.c:1692
  __do_softirq+0x2e0/0xaf5 kernel/softirq.c:285
  invoke_softirq kernel/softirq.c:365 [inline]
  irq_exit+0x1d1/0x200 kernel/softirq.c:405
  exiting_irq arch/x86/include/asm/apic.h:525 [inline]
  smp_apic_timer_interrupt+0x17e/0x710 arch/x86/kernel/apic/apic.c:1052
  apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:863
  </IRQ>
...
Allocated by task 25374:
  save_stack+0x43/0xd0 mm/kasan/kasan.c:448
  set_track mm/kasan/kasan.c:460 [inline]
  kasan_kmalloc+0xc4/0xe0 mm/kasan/kasan.c:553
  kasan_slab_alloc+0x12/0x20 mm/kasan/kasan.c:490
  kmem_cache_alloc+0x12e/0x760 mm/slab.c:3554
  ccid_new+0x25b/0x3e0 net/dccp/ccid.c:151
  dccp_hdlr_ccid+0x27/0x150 net/dccp/feat.c:44
  __dccp_feat_activate+0x184/0x270 net/dccp/feat.c:344
  dccp_feat_activate_values+0x3a7/0x819 net/dccp/feat.c:1538
  dccp_create_openreq_child+0x472/0x610 net/dccp/minisocks.c:128
  dccp_v4_request_recv_sock+0x12c/0xca0 net/dccp/ipv4.c:408
  dccp_v6_request_recv_sock+0x125d/0x1f10 net/dccp/ipv6.c:415
  dccp_check_req+0x455/0x6a0 net/dccp/minisocks.c:197
  dccp_v4_rcv+0x7b8/0x1f3f net/dccp/ipv4.c:841
  ip_local_deliver_finish+0x2e3/0xd80 net/ipv4/ip_input.c:215
  NF_HOOK include/linux/netfilter.h:288 [inline]
  ip_local_deliver+0x1e1/0x720 net/ipv4/ip_input.c:256
  dst_input include/net/dst.h:450 [inline]
  ip_rcv_finish+0x81b/0x2200 net/ipv4/ip_input.c:396
  NF_HOOK include/linux/netfilter.h:288 [inline]
  ip_rcv+0xb70/0x143d net/ipv4/ip_input.c:492
  __netif_receive_skb_core+0x26f5/0x3630 net/core/dev.c:4592
  __netif_receive_skb+0x2c/0x1e0 net/core/dev.c:4657
  process_backlog+0x219/0x760 net/core/dev.c:5337
  napi_poll net/core/dev.c:5735 [inline]
  net_rx_action+0x7b7/0x1930 net/core/dev.c:5801
  __do_softirq+0x2e0/0xaf5 kernel/softirq.c:285

Freed by task 25374:
  save_stack+0x43/0xd0 mm/kasan/kasan.c:448
  set_track mm/kasan/kasan.c:460 [inline]
  __kasan_slab_free+0x11a/0x170 mm/kasan/kasan.c:521
  kasan_slab_free+0xe/0x10 mm/kasan/kasan.c:528
  __cache_free mm/slab.c:3498 [inline]
  kmem_cache_free+0x86/0x2d0 mm/slab.c:3756
  ccid_hc_tx_delete+0xc3/0x100 net/dccp/ccid.c:190
  dccp_disconnect+0x130/0xc66 net/dccp/proto.c:286
  dccp_close+0x3bc/0xe60 net/dccp/proto.c:1045
  inet_release+0x104/0x1f0 net/ipv4/af_inet.c:427
  inet6_release+0x50/0x70 net/ipv6/af_inet6.c:460
  sock_release+0x96/0x1b0 net/socket.c:594
  sock_close+0x16/0x20 net/socket.c:1149
  __fput+0x34d/0x890 fs/file_table.c:209
  ____fput+0x15/0x20 fs/file_table.c:243
  task_work_run+0x1e4/0x290 kernel/task_work.c:113
  tracehook_notify_resume include/linux/tracehook.h:191 [inline]
  exit_to_usermode_loop+0x2bd/0x310 arch/x86/entry/common.c:166
  prepare_exit_to_usermode arch/x86/entry/common.c:196 [inline]
  syscall_return_slowpath arch/x86/entry/common.c:265 [inline]
  do_syscall_64+0x6ac/0x800 arch/x86/entry/common.c:290
  entry_SYSCALL_64_after_hwframe+0x49/0xbe

The buggy address belongs to the object at ffff8801bebb4cc0
  which belongs to the cache ccid2_hc_tx_sock of size 1240
The buggy address is located 1112 bytes inside of
  1240-byte region [ffff8801bebb4cc0, ffff8801bebb5198)
The buggy address belongs to the page:
page:ffffea0006faed00 count:1 mapcount:0 mapping:ffff8801bebb41c0
index:0xffff8801bebb5240 compound_mapcount: 0
flags: 0x2fffc0000008100(slab|head)
raw: 02fffc0000008100 ffff8801bebb41c0 ffff8801bebb5240 0000000100000003
raw: ffff8801cdba3138 ffffea0007634120 ffff8801cdbaab40 0000000000000000
page dumped because: kasan: bad access detected
...
==================================================================

Reported-by: syzbot+5d47e9ec91a6f15dbd6f@syzkaller.appspotmail.com
Signed-off-by: Alexey Kodanev <alexey.kodanev@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dccp/proto.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/net/dccp/proto.c b/net/dccp/proto.c
index ff3b058cf58ca..936dab12f99f2 100644
--- a/net/dccp/proto.c
+++ b/net/dccp/proto.c
@@ -280,9 +280,7 @@ int dccp_disconnect(struct sock *sk, int flags)
 
 	dccp_clear_xmit_timers(sk);
 	ccid_hc_rx_delete(dp->dccps_hc_rx_ccid, sk);
-	ccid_hc_tx_delete(dp->dccps_hc_tx_ccid, sk);
 	dp->dccps_hc_rx_ccid = NULL;
-	dp->dccps_hc_tx_ccid = NULL;
 
 	__skb_queue_purge(&sk->sk_receive_queue);
 	__skb_queue_purge(&sk->sk_write_queue);

From e40a0f7c74818d2d0b41acae93e24b694d51487f Mon Sep 17 00:00:00 2001
From: Govindarajulu Varadarajan <gvaradar@cisco.com>
Date: Wed, 23 May 2018 11:17:39 -0700
Subject: [PATCH 0517/1852] enic: set DMA mask to 47 bit

[ Upstream commit 322eaa06d55ebc1402a4a8d140945cff536638b4 ]

In commit 624dbf55a359b ("driver/net: enic: Try DMA 64 first, then
failover to DMA") DMA mask was changed from 40 bits to 64 bits.
Hardware actually supports only 47 bits.

Fixes: 624dbf55a359b ("driver/net: enic: Try DMA 64 first, then failover to DMA")
Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/cisco/enic/enic_main.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index 0e3b2ebf87f18..029fa5bee520e 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -2543,11 +2543,11 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	pci_set_master(pdev);
 
 	/* Query PCI controller on system for DMA addressing
-	 * limitation for the device.  Try 64-bit first, and
+	 * limitation for the device.  Try 47-bit first, and
 	 * fail to 32-bit.
 	 */
 
-	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
+	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(47));
 	if (err) {
 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 		if (err) {
@@ -2561,10 +2561,10 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 			goto err_out_release_regions;
 		}
 	} else {
-		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(47));
 		if (err) {
 			dev_err(dev, "Unable to obtain %u-bit DMA "
-				"for consistent allocations, aborting\n", 64);
+				"for consistent allocations, aborting\n", 47);
 			goto err_out_release_regions;
 		}
 		using_dac = 1;

From 320efbe5cfd6142911fb15f7aab255ec20386ccd Mon Sep 17 00:00:00 2001
From: Sabrina Dubroca <sd@queasysnail.net>
Date: Tue, 5 Jun 2018 15:01:59 +0200
Subject: [PATCH 0518/1852] ip6mr: only set ip6mr_table from setsockopt when
 ip6mr_new_table succeeds

[ Upstream commit 848235edb5c93ed086700584c8ff64f6d7fc778d ]

Currently, raw6_sk(sk)->ip6mr_table is set unconditionally during
ip6_mroute_setsockopt(MRT6_TABLE). A subsequent attempt at the same
setsockopt will fail with -ENOENT, since we haven't actually created
that table.

A similar fix for ipv4 was included in commit 5e1859fbcc3c ("ipv4: ipmr:
various fixes and cleanups").

Fixes: d1db275dd3f6 ("ipv6: ip6mr: support multiple tables")
Signed-off-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/ip6mr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/ipv6/ip6mr.c b/net/ipv6/ip6mr.c
index e5846d1f9b558..9b92960f024d7 100644
--- a/net/ipv6/ip6mr.c
+++ b/net/ipv6/ip6mr.c
@@ -1787,7 +1787,8 @@ int ip6_mroute_setsockopt(struct sock *sk, int optname, char __user *optval, uns
 		ret = 0;
 		if (!ip6mr_new_table(net, v))
 			ret = -ENOMEM;
-		raw6_sk(sk)->ip6mr_table = v;
+		else
+			raw6_sk(sk)->ip6mr_table = v;
 		rtnl_unlock();
 		return ret;
 	}

From dd2ca3ad492950bfa0a2b4479024158f4be427f8 Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Wed, 23 May 2018 14:29:52 -0400
Subject: [PATCH 0519/1852] ipv4: remove warning in ip_recv_error

[ Upstream commit 730c54d59403658a62af6517338fa8d4922c1b28 ]

A precondition check in ip_recv_error triggered on an otherwise benign
race. Remove the warning.

The warning triggers when passing an ipv6 socket to this ipv4 error
handling function. RaceFuzzer was able to trigger it due to a race
in setsockopt IPV6_ADDRFORM.

  ---
  CPU0
    do_ipv6_setsockopt
      sk->sk_socket->ops = &inet_dgram_ops;

  ---
  CPU1
    sk->sk_prot->recvmsg
      udp_recvmsg
        ip_recv_error
          WARN_ON_ONCE(sk->sk_family == AF_INET6);

  ---
  CPU0
    do_ipv6_setsockopt
      sk->sk_family = PF_INET;

This socket option converts a v6 socket that is connected to a v4 peer
to an v4 socket. It updates the socket on the fly, changing fields in
sk as well as other structs. This is inherently non-atomic. It races
with the lockless udp_recvmsg path.

No other code makes an assumption that these fields are updated
atomically. It is benign here, too, as ip_recv_error cares only about
the protocol of the skbs enqueued on the error queue, for which
sk_family is not a precise predictor (thanks to another isue with
IPV6_ADDRFORM).

Link: http://lkml.kernel.org/r/20180518120826.GA19515@dragonet.kaist.ac.kr
Fixes: 7ce875e5ecb8 ("ipv4: warn once on passing AF_INET6 socket to ip_recv_error")
Reported-by: DaeRyong Jeong <threeearcat@gmail.com>
Suggested-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_sockglue.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index 1b93ea7669161..ce9a7fbb7c5fc 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -493,8 +493,6 @@ int ip_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
 	int err;
 	int copied;
 
-	WARN_ON_ONCE(sk->sk_family == AF_INET6);
-
 	err = -EAGAIN;
 	skb = sock_dequeue_err_skb(sk);
 	if (!skb)

From ec80b37acfe5e33ae5d6c4aec42b4ab19a6e7f4d Mon Sep 17 00:00:00 2001
From: Wenwen Wang <wang6495@umn.edu>
Date: Mon, 21 May 2018 01:58:07 -0500
Subject: [PATCH 0520/1852] isdn: eicon: fix a missing-check bug

[ Upstream commit 6009d1fe6ba3bb2dab55921da60465329cc1cd89 ]

In divasmain.c, the function divas_write() firstly invokes the function
diva_xdi_open_adapter() to open the adapter that matches with the adapter
number provided by the user, and then invokes the function diva_xdi_write()
to perform the write operation using the matched adapter. The two functions
diva_xdi_open_adapter() and diva_xdi_write() are located in diva.c.

In diva_xdi_open_adapter(), the user command is copied to the object 'msg'
from the userspace pointer 'src' through the function pointer 'cp_fn',
which eventually calls copy_from_user() to do the copy. Then, the adapter
number 'msg.adapter' is used to find out a matched adapter from the
'adapter_queue'. A matched adapter will be returned if it is found.
Otherwise, NULL is returned to indicate the failure of the verification on
the adapter number.

As mentioned above, if a matched adapter is returned, the function
diva_xdi_write() is invoked to perform the write operation. In this
function, the user command is copied once again from the userspace pointer
'src', which is the same as the 'src' pointer in diva_xdi_open_adapter() as
both of them are from the 'buf' pointer in divas_write(). Similarly, the
copy is achieved through the function pointer 'cp_fn', which finally calls
copy_from_user(). After the successful copy, the corresponding command
processing handler of the matched adapter is invoked to perform the write
operation.

It is obvious that there are two copies here from userspace, one is in
diva_xdi_open_adapter(), and one is in diva_xdi_write(). Plus, both of
these two copies share the same source userspace pointer, i.e., the 'buf'
pointer in divas_write(). Given that a malicious userspace process can race
to change the content pointed by the 'buf' pointer, this can pose potential
security issues. For example, in the first copy, the user provides a valid
adapter number to pass the verification process and a valid adapter can be
found. Then the user can modify the adapter number to an invalid number.
This way, the user can bypass the verification process of the adapter
number and inject inconsistent data.

This patch reuses the data copied in
diva_xdi_open_adapter() and passes it to diva_xdi_write(). This way, the
above issues can be avoided.

Signed-off-by: Wenwen Wang <wang6495@umn.edu>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/isdn/hardware/eicon/diva.c      | 22 +++++++++++++++-------
 drivers/isdn/hardware/eicon/diva.h      |  5 +++--
 drivers/isdn/hardware/eicon/divasmain.c | 18 +++++++++++-------
 3 files changed, 29 insertions(+), 16 deletions(-)

diff --git a/drivers/isdn/hardware/eicon/diva.c b/drivers/isdn/hardware/eicon/diva.c
index d91dd580e9781..37aaea88a6adc 100644
--- a/drivers/isdn/hardware/eicon/diva.c
+++ b/drivers/isdn/hardware/eicon/diva.c
@@ -387,10 +387,10 @@ void divasa_xdi_driver_unload(void)
 **  Receive and process command from user mode utility
 */
 void *diva_xdi_open_adapter(void *os_handle, const void __user *src,
-			    int length,
+			    int length, void *mptr,
 			    divas_xdi_copy_from_user_fn_t cp_fn)
 {
-	diva_xdi_um_cfg_cmd_t msg;
+	diva_xdi_um_cfg_cmd_t *msg = (diva_xdi_um_cfg_cmd_t *)mptr;
 	diva_os_xdi_adapter_t *a = NULL;
 	diva_os_spin_lock_magic_t old_irql;
 	struct list_head *tmp;
@@ -400,21 +400,21 @@ void *diva_xdi_open_adapter(void *os_handle, const void __user *src,
 			 length, sizeof(diva_xdi_um_cfg_cmd_t)))
 			return NULL;
 	}
-	if ((*cp_fn) (os_handle, &msg, src, sizeof(msg)) <= 0) {
+	if ((*cp_fn) (os_handle, msg, src, sizeof(*msg)) <= 0) {
 		DBG_ERR(("A: A(?) open, write error"))
 			return NULL;
 	}
 	diva_os_enter_spin_lock(&adapter_lock, &old_irql, "open_adapter");
 	list_for_each(tmp, &adapter_queue) {
 		a = list_entry(tmp, diva_os_xdi_adapter_t, link);
-		if (a->controller == (int)msg.adapter)
+		if (a->controller == (int)msg->adapter)
 			break;
 		a = NULL;
 	}
 	diva_os_leave_spin_lock(&adapter_lock, &old_irql, "open_adapter");
 
 	if (!a) {
-		DBG_ERR(("A: A(%d) open, adapter not found", msg.adapter))
+		DBG_ERR(("A: A(%d) open, adapter not found", msg->adapter))
 			}
 
 	return (a);
@@ -436,8 +436,10 @@ void diva_xdi_close_adapter(void *adapter, void *os_handle)
 
 int
 diva_xdi_write(void *adapter, void *os_handle, const void __user *src,
-	       int length, divas_xdi_copy_from_user_fn_t cp_fn)
+	       int length, void *mptr,
+	       divas_xdi_copy_from_user_fn_t cp_fn)
 {
+	diva_xdi_um_cfg_cmd_t *msg = (diva_xdi_um_cfg_cmd_t *)mptr;
 	diva_os_xdi_adapter_t *a = (diva_os_xdi_adapter_t *) adapter;
 	void *data;
 
@@ -458,7 +460,13 @@ diva_xdi_write(void *adapter, void *os_handle, const void __user *src,
 			return (-2);
 	}
 
-	length = (*cp_fn) (os_handle, data, src, length);
+	if (msg) {
+		*(diva_xdi_um_cfg_cmd_t *)data = *msg;
+		length = (*cp_fn) (os_handle, (char *)data + sizeof(*msg),
+				   src + sizeof(*msg), length - sizeof(*msg));
+	} else {
+		length = (*cp_fn) (os_handle, data, src, length);
+	}
 	if (length > 0) {
 		if ((*(a->interface.cmd_proc))
 		    (a, (diva_xdi_um_cfg_cmd_t *) data, length)) {
diff --git a/drivers/isdn/hardware/eicon/diva.h b/drivers/isdn/hardware/eicon/diva.h
index e979085d1b891..a0a607c0c32e2 100644
--- a/drivers/isdn/hardware/eicon/diva.h
+++ b/drivers/isdn/hardware/eicon/diva.h
@@ -19,10 +19,11 @@ int diva_xdi_read(void *adapter, void *os_handle, void __user *dst,
 		  int max_length, divas_xdi_copy_to_user_fn_t cp_fn);
 
 int diva_xdi_write(void *adapter, void *os_handle, const void __user *src,
-		   int length, divas_xdi_copy_from_user_fn_t cp_fn);
+		   int length, void *msg,
+		   divas_xdi_copy_from_user_fn_t cp_fn);
 
 void *diva_xdi_open_adapter(void *os_handle, const void __user *src,
-			    int length,
+			    int length, void *msg,
 			    divas_xdi_copy_from_user_fn_t cp_fn);
 
 void diva_xdi_close_adapter(void *adapter, void *os_handle);
diff --git a/drivers/isdn/hardware/eicon/divasmain.c b/drivers/isdn/hardware/eicon/divasmain.c
index a2e0ed6c9a4d3..91bd2ba0bdd88 100644
--- a/drivers/isdn/hardware/eicon/divasmain.c
+++ b/drivers/isdn/hardware/eicon/divasmain.c
@@ -591,19 +591,22 @@ static int divas_release(struct inode *inode, struct file *file)
 static ssize_t divas_write(struct file *file, const char __user *buf,
 			   size_t count, loff_t *ppos)
 {
+	diva_xdi_um_cfg_cmd_t msg;
 	int ret = -EINVAL;
 
 	if (!file->private_data) {
 		file->private_data = diva_xdi_open_adapter(file, buf,
-							   count,
+							   count, &msg,
 							   xdi_copy_from_user);
-	}
-	if (!file->private_data) {
-		return (-ENODEV);
+		if (!file->private_data)
+			return (-ENODEV);
+		ret = diva_xdi_write(file->private_data, file,
+				     buf, count, &msg, xdi_copy_from_user);
+	} else {
+		ret = diva_xdi_write(file->private_data, file,
+				     buf, count, NULL, xdi_copy_from_user);
 	}
 
-	ret = diva_xdi_write(file->private_data, file,
-			     buf, count, xdi_copy_from_user);
 	switch (ret) {
 	case -1:		/* Message should be removed from rx mailbox first */
 		ret = -EBUSY;
@@ -622,11 +625,12 @@ static ssize_t divas_write(struct file *file, const char __user *buf,
 static ssize_t divas_read(struct file *file, char __user *buf,
 			  size_t count, loff_t *ppos)
 {
+	diva_xdi_um_cfg_cmd_t msg;
 	int ret = -EINVAL;
 
 	if (!file->private_data) {
 		file->private_data = diva_xdi_open_adapter(file, buf,
-							   count,
+							   count, &msg,
 							   xdi_copy_from_user);
 	}
 	if (!file->private_data) {

From 00b8201bd3d6eb1df06fe87cf5e09dbcc966f357 Mon Sep 17 00:00:00 2001
From: Cong Wang <xiyou.wangcong@gmail.com>
Date: Tue, 5 Jun 2018 09:48:13 -0700
Subject: [PATCH 0521/1852] netdev-FAQ: clarify DaveM's position for stable
 backports

[ Upstream commit 75d4e704fa8d2cf33ff295e5b441317603d7f9fd ]

Per discussion with David at netconf 2018, let's clarify
DaveM's position of handling stable backports in netdev-FAQ.

This is important for people relying on upstream -stable
releases.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/networking/netdev-FAQ.txt | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/networking/netdev-FAQ.txt b/Documentation/networking/netdev-FAQ.txt
index 0fe1c6e0dbcd5..bfc6b3e68cc40 100644
--- a/Documentation/networking/netdev-FAQ.txt
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -168,6 +168,15 @@ A: No.  See above answer.  In short, if you think it really belongs in
    dash marker line as described in Documentation/SubmittingPatches to
    temporarily embed that information into the patch that you send.
 
+Q: Are all networking bug fixes backported to all stable releases?
+
+A: Due to capacity, Dave could only take care of the backports for the last
+   2 stable releases. For earlier stable releases, each stable branch maintainer
+   is supposed to take care of them. If you find any patch is missing from an
+   earlier stable branch, please notify stable@vger.kernel.org with either a
+   commit ID or a formal patch backported, and CC Dave and other relevant
+   networking developers.
+
 Q: Someone said that the comment style and coding convention is different
    for the networking content.  Is this true?
 

From 10ee5b2344249ff5f3a28779e3cf69d7edb5d8cc Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Fri, 1 Jun 2018 09:23:02 -0700
Subject: [PATCH 0522/1852] net/packet: refine check for priv area size

[ Upstream commit eb73190f4fbeedf762394e92d6a4ec9ace684c88 ]

syzbot was able to trick af_packet again [1]

Various commits tried to address the problem in the past,
but failed to take into account V3 header size.

[1]

tpacket_rcv: packet too big, clamped from 72 to 4294967224. macoff=96
BUG: KASAN: use-after-free in prb_run_all_ft_ops net/packet/af_packet.c:1016 [inline]
BUG: KASAN: use-after-free in prb_fill_curr_block.isra.59+0x4e5/0x5c0 net/packet/af_packet.c:1039
Write of size 2 at addr ffff8801cb62000e by task kworker/1:2/2106

CPU: 1 PID: 2106 Comm: kworker/1:2 Not tainted 4.17.0-rc7+ #77
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Workqueue: ipv6_addrconf addrconf_dad_work
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x1b9/0x294 lib/dump_stack.c:113
 print_address_description+0x6c/0x20b mm/kasan/report.c:256
 kasan_report_error mm/kasan/report.c:354 [inline]
 kasan_report.cold.7+0x242/0x2fe mm/kasan/report.c:412
 __asan_report_store2_noabort+0x17/0x20 mm/kasan/report.c:436
 prb_run_all_ft_ops net/packet/af_packet.c:1016 [inline]
 prb_fill_curr_block.isra.59+0x4e5/0x5c0 net/packet/af_packet.c:1039
 __packet_lookup_frame_in_block net/packet/af_packet.c:1094 [inline]
 packet_current_rx_frame net/packet/af_packet.c:1117 [inline]
 tpacket_rcv+0x1866/0x3340 net/packet/af_packet.c:2282
 dev_queue_xmit_nit+0x891/0xb90 net/core/dev.c:2018
 xmit_one net/core/dev.c:3049 [inline]
 dev_hard_start_xmit+0x16b/0xc10 net/core/dev.c:3069
 __dev_queue_xmit+0x2724/0x34c0 net/core/dev.c:3584
 dev_queue_xmit+0x17/0x20 net/core/dev.c:3617
 neigh_resolve_output+0x679/0xad0 net/core/neighbour.c:1358
 neigh_output include/net/neighbour.h:482 [inline]
 ip6_finish_output2+0xc9c/0x2810 net/ipv6/ip6_output.c:120
 ip6_finish_output+0x5fe/0xbc0 net/ipv6/ip6_output.c:154
 NF_HOOK_COND include/linux/netfilter.h:277 [inline]
 ip6_output+0x227/0x9b0 net/ipv6/ip6_output.c:171
 dst_output include/net/dst.h:444 [inline]
 NF_HOOK include/linux/netfilter.h:288 [inline]
 ndisc_send_skb+0x100d/0x1570 net/ipv6/ndisc.c:491
 ndisc_send_ns+0x3c1/0x8d0 net/ipv6/ndisc.c:633
 addrconf_dad_work+0xbef/0x1340 net/ipv6/addrconf.c:4033
 process_one_work+0xc1e/0x1b50 kernel/workqueue.c:2145
 worker_thread+0x1cc/0x1440 kernel/workqueue.c:2279
 kthread+0x345/0x410 kernel/kthread.c:240
 ret_from_fork+0x3a/0x50 arch/x86/entry/entry_64.S:412

The buggy address belongs to the page:
page:ffffea00072d8800 count:0 mapcount:-127 mapping:0000000000000000 index:0xffff8801cb620e80
flags: 0x2fffc0000000000()
raw: 02fffc0000000000 0000000000000000 ffff8801cb620e80 00000000ffffff80
raw: ffffea00072e3820 ffffea0007132d20 0000000000000002 0000000000000000
page dumped because: kasan: bad access detected

Memory state around the buggy address:
 ffff8801cb61ff00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ffff8801cb61ff80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>ffff8801cb620000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
                      ^
 ffff8801cb620080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
 ffff8801cb620100: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

Fixes: 2b6867c2ce76 ("net/packet: fix overflow in check for priv area size")
Fixes: dc808110bb62 ("packet: handle too big packets for PACKET_V3")
Fixes: f6fb8f100b80 ("af-packet: TPACKET_V3 flexible buffer implementation.")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/packet/af_packet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 392d4e2c0a246..420a9b4f403e5 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -4198,7 +4198,7 @@ static int packet_set_ring(struct sock *sk, union tpacket_req_u *req_u,
 			goto out;
 		if (po->tp_version >= TPACKET_V3 &&
 		    req->tp_block_size <=
-			  BLK_PLUS_PRIV((u64)req_u->req3.tp_sizeof_priv))
+		    BLK_PLUS_PRIV((u64)req_u->req3.tp_sizeof_priv) + sizeof(struct tpacket3_hdr))
 			goto out;
 		if (unlikely(req->tp_frame_size < po->tp_hdrlen +
 					po->tp_reserve))

From 30c264ef564a9a66744311ee8b28e6e3d1f5e89b Mon Sep 17 00:00:00 2001
From: Daniele Palmas <dnlplm@gmail.com>
Date: Thu, 31 May 2018 11:18:29 +0200
Subject: [PATCH 0523/1852] net: usb: cdc_mbim: add flag FLAG_SEND_ZLP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 9f7c728332e8966084242fcd951aa46583bc308c ]

Testing Telit LM940 with ICMP packets > 14552 bytes revealed that
the modem needs FLAG_SEND_ZLP to properly work, otherwise the cdc
mbim data interface won't be anymore responsive.

Signed-off-by: Daniele Palmas <dnlplm@gmail.com>
Acked-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/cdc_mbim.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/usb/cdc_mbim.c b/drivers/net/usb/cdc_mbim.c
index 96a5028621c8b..8edbccf06b7bd 100644
--- a/drivers/net/usb/cdc_mbim.c
+++ b/drivers/net/usb/cdc_mbim.c
@@ -593,7 +593,7 @@ static const struct driver_info cdc_mbim_info_zlp = {
  */
 static const struct driver_info cdc_mbim_info_ndp_to_end = {
 	.description = "CDC MBIM",
-	.flags = FLAG_NO_SETINT | FLAG_MULTI_PACKET | FLAG_WWAN,
+	.flags = FLAG_NO_SETINT | FLAG_MULTI_PACKET | FLAG_WWAN | FLAG_SEND_ZLP,
 	.bind = cdc_mbim_bind,
 	.unbind = cdc_mbim_unbind,
 	.manage_power = cdc_mbim_manage_power,

From 451e424e695b19e2572baacb96c1f8ef060ffa19 Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Thu, 24 May 2018 18:10:30 -0400
Subject: [PATCH 0524/1852] packet: fix reserve calculation

[ Upstream commit 9aad13b087ab0a588cd68259de618f100053360e ]

Commit b84bbaf7a6c8 ("packet: in packet_snd start writing at link
layer allocation") ensures that packet_snd always starts writing
the link layer header in reserved headroom allocated for this
purpose.

This is needed because packets may be shorter than hard_header_len,
in which case the space up to hard_header_len may be zeroed. But
that necessary padding is not accounted for in skb->len.

The fix, however, is buggy. It calls skb_push, which grows skb->len
when moving skb->data back. But in this case packet length should not
change.

Instead, call skb_reserve, which moves both skb->data and skb->tail
back, without changing length.

Fixes: b84bbaf7a6c8 ("packet: in packet_snd start writing at link layer allocation")
Reported-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Willem de Bruijn <willemb@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/packet/af_packet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 420a9b4f403e5..3a63f33698d3d 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -2779,7 +2779,7 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
 		if (unlikely(offset < 0))
 			goto out_free;
 	} else if (reserve) {
-		skb_push(skb, reserve);
+		skb_reserve(skb, -reserve);
 	}
 
 	/* Returns -EFAULT on error */

From eff2346aa24c56f9100e1089cdee9dcc4bc6f331 Mon Sep 17 00:00:00 2001
From: Shahed Shaikh <shahed.shaikh@cavium.com>
Date: Mon, 21 May 2018 12:31:47 -0700
Subject: [PATCH 0525/1852] qed: Fix mask for physical address in ILT entry

[ Upstream commit fdd13dd350dda1826579eb5c333d76b14513b812 ]

ILT entry requires 12 bit right shifted physical address.
Existing mask for ILT entry of physical address i.e.
ILT_ENTRY_PHY_ADDR_MASK is not sufficient to handle 64bit
address because upper 8 bits of 64 bit address were getting
masked which resulted in completer abort error on
PCIe bus due to invalid address.

Fix that mask to handle 64bit physical address.

Fixes: fe56b9e6a8d9 ("qed: Add module with basic common support")
Signed-off-by: Shahed Shaikh <shahed.shaikh@cavium.com>
Signed-off-by: Ariel Elior <ariel.elior@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qlogic/qed/qed_cxt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/qlogic/qed/qed_cxt.c b/drivers/net/ethernet/qlogic/qed/qed_cxt.c
index 7ccdb46c67645..21e0af2620ee1 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_cxt.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_cxt.c
@@ -43,7 +43,7 @@
 #define ILT_CFG_REG(cli, reg)	PSWRQ2_REG_ ## cli ## _ ## reg ## _RT_OFFSET
 
 /* ILT entry structure */
-#define ILT_ENTRY_PHY_ADDR_MASK		0x000FFFFFFFFFFFULL
+#define ILT_ENTRY_PHY_ADDR_MASK		(~0ULL >> 12)
 #define ILT_ENTRY_PHY_ADDR_SHIFT	0
 #define ILT_ENTRY_VALID_MASK		0x1ULL
 #define ILT_ENTRY_VALID_SHIFT		52

From b05d023bd2d3df579b6fb1bb143f549a1f05deb0 Mon Sep 17 00:00:00 2001
From: Jack Morgenstein <jackm@dev.mellanox.co.il>
Date: Wed, 23 May 2018 10:41:59 +0300
Subject: [PATCH 0526/1852] net/mlx4: Fix irq-unsafe spinlock usage

[ Upstream commit d546b67cda015fb92bfee93d5dc0ceadb91deaee ]

spin_lock/unlock was used instead of spin_un/lock_irq
in a procedure used in process space, on a spinlock
which can be grabbed in an interrupt.

This caused the stack trace below to be displayed (on kernel
4.17.0-rc1 compiled with Lock Debugging enabled):

[  154.661474] WARNING: SOFTIRQ-safe -> SOFTIRQ-unsafe lock order detected
[  154.668909] 4.17.0-rc1-rdma_rc_mlx+ #3 Tainted: G          I
[  154.675856] -----------------------------------------------------
[  154.682706] modprobe/10159 [HC0[0]:SC0[0]:HE0:SE1] is trying to acquire:
[  154.690254] 00000000f3b0e495 (&(&qp_table->lock)->rlock){+.+.}, at: mlx4_qp_remove+0x20/0x50 [mlx4_core]
[  154.700927]
and this task is already holding:
[  154.707461] 0000000094373b5d (&(&cq->lock)->rlock/1){....}, at: destroy_qp_common+0x111/0x560 [mlx4_ib]
[  154.718028] which would create a new lock dependency:
[  154.723705]  (&(&cq->lock)->rlock/1){....} -> (&(&qp_table->lock)->rlock){+.+.}
[  154.731922]
but this new dependency connects a SOFTIRQ-irq-safe lock:
[  154.740798]  (&(&cq->lock)->rlock){..-.}
[  154.740800]
... which became SOFTIRQ-irq-safe at:
[  154.752163]   _raw_spin_lock_irqsave+0x3e/0x50
[  154.757163]   mlx4_ib_poll_cq+0x36/0x900 [mlx4_ib]
[  154.762554]   ipoib_tx_poll+0x4a/0xf0 [ib_ipoib]
...
to a SOFTIRQ-irq-unsafe lock:
[  154.815603]  (&(&qp_table->lock)->rlock){+.+.}
[  154.815604]
... which became SOFTIRQ-irq-unsafe at:
[  154.827718] ...
[  154.827720]   _raw_spin_lock+0x35/0x50
[  154.833912]   mlx4_qp_lookup+0x1e/0x50 [mlx4_core]
[  154.839302]   mlx4_flow_attach+0x3f/0x3d0 [mlx4_core]

Since mlx4_qp_lookup() is called only in process space, we can
simply replace the spin_un/lock calls with spin_un/lock_irq calls.

Fixes: 6dc06c08bef1 ("net/mlx4: Fix the check in attaching steering rules")
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx4/qp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx4/qp.c b/drivers/net/ethernet/mellanox/mlx4/qp.c
index 62f1a3433a621..d6d87dd8a28fa 100644
--- a/drivers/net/ethernet/mellanox/mlx4/qp.c
+++ b/drivers/net/ethernet/mellanox/mlx4/qp.c
@@ -386,11 +386,11 @@ struct mlx4_qp *mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn)
 	struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table;
 	struct mlx4_qp *qp;
 
-	spin_lock(&qp_table->lock);
+	spin_lock_irq(&qp_table->lock);
 
 	qp = __mlx4_qp_lookup(dev, qpn);
 
-	spin_unlock(&qp_table->lock);
+	spin_unlock_irq(&qp_table->lock);
 	return qp;
 }
 

From 43dd4f866d44a5b66f8a820714b37efa94c359f0 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Mon, 4 Jun 2018 17:46:01 +0300
Subject: [PATCH 0527/1852] team: use netdev_features_t instead of u32

[ Upstream commit 25ea66544bfd1d9df1b7e1502f8717e85fa1e6e6 ]

This code was introduced in 2011 around the same time that we made
netdev_features_t a u64 type.  These days a u32 is not big enough to
hold all the potential features.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/team/team.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index e74709e4b5dd9..49174837c2ba6 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -983,7 +983,8 @@ static void team_port_disable(struct team *team,
 static void ___team_compute_features(struct team *team)
 {
 	struct team_port *port;
-	u32 vlan_features = TEAM_VLAN_FEATURES & NETIF_F_ALL_FOR_ALL;
+	netdev_features_t vlan_features = TEAM_VLAN_FEATURES &
+					  NETIF_F_ALL_FOR_ALL;
 	unsigned short max_hard_header_len = ETH_HLEN;
 	unsigned int dst_release_flag = IFF_XMIT_DST_RELEASE |
 					IFF_XMIT_DST_RELEASE_PERM;

From 00b822fbff66bc0cc53d2aabac74b144d592a41e Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Tue, 5 Jun 2018 09:25:19 -0700
Subject: [PATCH 0528/1852] rtnetlink: validate attributes in do_setlink()

[ Upstream commit 644c7eebbfd59e72982d11ec6cc7d39af12450ae ]

It seems that rtnl_group_changelink() can call do_setlink
while a prior call to validate_linkmsg(dev = NULL, ...) could
not validate IFLA_ADDRESS / IFLA_BROADCAST

Make sure do_setlink() calls validate_linkmsg() instead
of letting its callers having this responsibility.

With help from Dmitry Vyukov, thanks a lot !

BUG: KMSAN: uninit-value in is_valid_ether_addr include/linux/etherdevice.h:199 [inline]
BUG: KMSAN: uninit-value in eth_prepare_mac_addr_change net/ethernet/eth.c:275 [inline]
BUG: KMSAN: uninit-value in eth_mac_addr+0x203/0x2b0 net/ethernet/eth.c:308
CPU: 1 PID: 8695 Comm: syz-executor3 Not tainted 4.17.0-rc5+ #103
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x185/0x1d0 lib/dump_stack.c:113
 kmsan_report+0x149/0x260 mm/kmsan/kmsan.c:1084
 __msan_warning_32+0x6e/0xc0 mm/kmsan/kmsan_instr.c:686
 is_valid_ether_addr include/linux/etherdevice.h:199 [inline]
 eth_prepare_mac_addr_change net/ethernet/eth.c:275 [inline]
 eth_mac_addr+0x203/0x2b0 net/ethernet/eth.c:308
 dev_set_mac_address+0x261/0x530 net/core/dev.c:7157
 do_setlink+0xbc3/0x5fc0 net/core/rtnetlink.c:2317
 rtnl_group_changelink net/core/rtnetlink.c:2824 [inline]
 rtnl_newlink+0x1fe9/0x37a0 net/core/rtnetlink.c:2976
 rtnetlink_rcv_msg+0xa32/0x1560 net/core/rtnetlink.c:4646
 netlink_rcv_skb+0x378/0x600 net/netlink/af_netlink.c:2448
 rtnetlink_rcv+0x50/0x60 net/core/rtnetlink.c:4664
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1678/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x455a09
RSP: 002b:00007fc07480ec68 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
RAX: ffffffffffffffda RBX: 00007fc07480f6d4 RCX: 0000000000455a09
RDX: 0000000000000000 RSI: 00000000200003c0 RDI: 0000000000000014
RBP: 000000000072bea0 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000246 R12: 00000000ffffffff
R13: 00000000000005d0 R14: 00000000006fdc20 R15: 0000000000000000

Uninit was stored to memory at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_save_stack mm/kmsan/kmsan.c:294 [inline]
 kmsan_internal_chain_origin+0x12b/0x210 mm/kmsan/kmsan.c:685
 kmsan_memcpy_origins+0x11d/0x170 mm/kmsan/kmsan.c:527
 __msan_memcpy+0x109/0x160 mm/kmsan/kmsan_instr.c:478
 do_setlink+0xb84/0x5fc0 net/core/rtnetlink.c:2315
 rtnl_group_changelink net/core/rtnetlink.c:2824 [inline]
 rtnl_newlink+0x1fe9/0x37a0 net/core/rtnetlink.c:2976
 rtnetlink_rcv_msg+0xa32/0x1560 net/core/rtnetlink.c:4646
 netlink_rcv_skb+0x378/0x600 net/netlink/af_netlink.c:2448
 rtnetlink_rcv+0x50/0x60 net/core/rtnetlink.c:4664
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1678/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
Uninit was created at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_internal_poison_shadow+0xb8/0x1b0 mm/kmsan/kmsan.c:189
 kmsan_kmalloc+0x94/0x100 mm/kmsan/kmsan.c:315
 kmsan_slab_alloc+0x10/0x20 mm/kmsan/kmsan.c:322
 slab_post_alloc_hook mm/slab.h:446 [inline]
 slab_alloc_node mm/slub.c:2753 [inline]
 __kmalloc_node_track_caller+0xb32/0x11b0 mm/slub.c:4395
 __kmalloc_reserve net/core/skbuff.c:138 [inline]
 __alloc_skb+0x2cb/0x9e0 net/core/skbuff.c:206
 alloc_skb include/linux/skbuff.h:988 [inline]
 netlink_alloc_large_skb net/netlink/af_netlink.c:1182 [inline]
 netlink_sendmsg+0x76e/0x1350 net/netlink/af_netlink.c:1876
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9

Fixes: e7ed828f10bd ("netlink: support setting devgroup parameters")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/rtnetlink.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 5b3d611d8b5f8..2017ffa5197a9 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -1691,6 +1691,10 @@ static int do_setlink(const struct sk_buff *skb,
 	const struct net_device_ops *ops = dev->netdev_ops;
 	int err;
 
+	err = validate_linkmsg(dev, tb);
+	if (err < 0)
+		return err;
+
 	if (tb[IFLA_NET_NS_PID] || tb[IFLA_NET_NS_FD]) {
 		struct net *net = rtnl_link_get_net(dev_net(dev), tb);
 		if (IS_ERR(net)) {
@@ -1982,10 +1986,6 @@ static int rtnl_setlink(struct sk_buff *skb, struct nlmsghdr *nlh)
 		goto errout;
 	}
 
-	err = validate_linkmsg(dev, tb);
-	if (err < 0)
-		goto errout;
-
 	err = do_setlink(skb, dev, ifm, tb, ifname, 0);
 errout:
 	return err;

From da620140092685fe5aa1ede3996f87309648268e Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Tue, 22 May 2018 17:04:49 -0700
Subject: [PATCH 0529/1852] net: phy: broadcom: Fix bcm_write_exp()

[ Upstream commit 79fb218d97980d4fee9a64f4c8ff05289364ba25 ]

On newer PHYs, we need to select the expansion register to write with
setting bits [11:8] to 0xf. This was done correctly by bcm7xxx.c prior
to being migrated to generic code under bcm-phy-lib.c which
unfortunately used the older implementation from the BCM54xx days.

Fix this by creating an inline stub: bcm_write_exp_sel() which adds the
correct value (MII_BCM54XX_EXP_SEL_ER) and update both the Cygnus PHY
and BCM7xxx PHY drivers which require setting these bits.

broadcom.c is unchanged because some PHYs even use a different selector
method, so let them specify it directly (e.g: SerDes secondary selector).

Fixes: a1cba5613edf ("net: phy: Add Broadcom phy library for common interfaces")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/phy/bcm-cygnus.c  | 6 +++---
 drivers/net/phy/bcm-phy-lib.h | 7 +++++++
 drivers/net/phy/bcm7xxx.c     | 4 ++--
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
index 49bbc68268835..9a7dca2bb6188 100644
--- a/drivers/net/phy/bcm-cygnus.c
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -61,17 +61,17 @@ static int bcm_cygnus_afe_config(struct phy_device *phydev)
 		return rc;
 
 	/* make rcal=100, since rdb default is 000 */
-	rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10);
+	rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB1, 0x10);
 	if (rc < 0)
 		return rc;
 
 	/* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
-	rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10);
+	rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x10);
 	if (rc < 0)
 		return rc;
 
 	/* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
-	rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x00);
+	rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x00);
 
 	return 0;
 }
diff --git a/drivers/net/phy/bcm-phy-lib.h b/drivers/net/phy/bcm-phy-lib.h
index b2091c88b44db..ce16b26d49ff3 100644
--- a/drivers/net/phy/bcm-phy-lib.h
+++ b/drivers/net/phy/bcm-phy-lib.h
@@ -14,11 +14,18 @@
 #ifndef _LINUX_BCM_PHY_LIB_H
 #define _LINUX_BCM_PHY_LIB_H
 
+#include <linux/brcmphy.h>
 #include <linux/phy.h>
 
 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
 
+static inline int bcm_phy_write_exp_sel(struct phy_device *phydev,
+					u16 reg, u16 val)
+{
+	return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val);
+}
+
 int bcm_phy_write_misc(struct phy_device *phydev,
 		       u16 reg, u16 chl, u16 value);
 int bcm_phy_read_misc(struct phy_device *phydev,
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 03d4809a91268..bffa70e462020 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -48,10 +48,10 @@
 static void r_rc_cal_reset(struct phy_device *phydev)
 {
 	/* Reset R_CAL/RC_CAL Engine */
-	bcm_phy_write_exp(phydev, 0x00b0, 0x0010);
+	bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0010);
 
 	/* Disable Reset R_AL/RC_CAL Engine */
-	bcm_phy_write_exp(phydev, 0x00b0, 0x0000);
+	bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0000);
 }
 
 static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)

From ae096efc4fbea9b2e3c79efce8b9f4801c0884b7 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Tue, 5 Jun 2018 06:06:19 -0700
Subject: [PATCH 0530/1852] net: metrics: add proper netlink validation

[ Upstream commit 5b5e7a0de2bbf2a1afcd9f49e940010e9fb80d53 ]

Before using nla_get_u32(), better make sure the attribute
is of the proper size.

Code recently was changed, but bug has been there from beginning
of git.

BUG: KMSAN: uninit-value in rtnetlink_put_metrics+0x553/0x960 net/core/rtnetlink.c:746
CPU: 1 PID: 14139 Comm: syz-executor6 Not tainted 4.17.0-rc5+ #103
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x185/0x1d0 lib/dump_stack.c:113
 kmsan_report+0x149/0x260 mm/kmsan/kmsan.c:1084
 __msan_warning_32+0x6e/0xc0 mm/kmsan/kmsan_instr.c:686
 rtnetlink_put_metrics+0x553/0x960 net/core/rtnetlink.c:746
 fib_dump_info+0xc42/0x2190 net/ipv4/fib_semantics.c:1361
 rtmsg_fib+0x65f/0x8c0 net/ipv4/fib_semantics.c:419
 fib_table_insert+0x2314/0x2b50 net/ipv4/fib_trie.c:1287
 inet_rtm_newroute+0x210/0x340 net/ipv4/fib_frontend.c:779
 rtnetlink_rcv_msg+0xa32/0x1560 net/core/rtnetlink.c:4646
 netlink_rcv_skb+0x378/0x600 net/netlink/af_netlink.c:2448
 rtnetlink_rcv+0x50/0x60 net/core/rtnetlink.c:4664
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1678/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x455a09
RSP: 002b:00007faae5fd8c68 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
RAX: ffffffffffffffda RBX: 00007faae5fd96d4 RCX: 0000000000455a09
RDX: 0000000000000000 RSI: 0000000020000000 RDI: 0000000000000013
RBP: 000000000072bea0 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000246 R12: 00000000ffffffff
R13: 00000000000005d0 R14: 00000000006fdc20 R15: 0000000000000000

Uninit was stored to memory at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_save_stack mm/kmsan/kmsan.c:294 [inline]
 kmsan_internal_chain_origin+0x12b/0x210 mm/kmsan/kmsan.c:685
 __msan_chain_origin+0x69/0xc0 mm/kmsan/kmsan_instr.c:529
 fib_convert_metrics net/ipv4/fib_semantics.c:1056 [inline]
 fib_create_info+0x2d46/0x9dc0 net/ipv4/fib_semantics.c:1150
 fib_table_insert+0x3e4/0x2b50 net/ipv4/fib_trie.c:1146
 inet_rtm_newroute+0x210/0x340 net/ipv4/fib_frontend.c:779
 rtnetlink_rcv_msg+0xa32/0x1560 net/core/rtnetlink.c:4646
 netlink_rcv_skb+0x378/0x600 net/netlink/af_netlink.c:2448
 rtnetlink_rcv+0x50/0x60 net/core/rtnetlink.c:4664
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1678/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
Uninit was created at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_internal_poison_shadow+0xb8/0x1b0 mm/kmsan/kmsan.c:189
 kmsan_kmalloc+0x94/0x100 mm/kmsan/kmsan.c:315
 kmsan_slab_alloc+0x10/0x20 mm/kmsan/kmsan.c:322
 slab_post_alloc_hook mm/slab.h:446 [inline]
 slab_alloc_node mm/slub.c:2753 [inline]
 __kmalloc_node_track_caller+0xb32/0x11b0 mm/slub.c:4395
 __kmalloc_reserve net/core/skbuff.c:138 [inline]
 __alloc_skb+0x2cb/0x9e0 net/core/skbuff.c:206
 alloc_skb include/linux/skbuff.h:988 [inline]
 netlink_alloc_large_skb net/netlink/af_netlink.c:1182 [inline]
 netlink_sendmsg+0x76e/0x1350 net/netlink/af_netlink.c:1876
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec0/0x1310 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x152/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9

Fixes: a919525ad832 ("net: Move fib_convert_metrics to metrics file")
Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: David Ahern <dsahern@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/fib_semantics.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/ipv4/fib_semantics.c b/net/ipv4/fib_semantics.c
index 44abc52bae136..9d144cbd4e62a 100644
--- a/net/ipv4/fib_semantics.c
+++ b/net/ipv4/fib_semantics.c
@@ -979,6 +979,8 @@ fib_convert_metrics(struct fib_info *fi, const struct fib_config *cfg)
 			if (val == TCP_CA_UNSPEC)
 				return -EINVAL;
 		} else {
+			if (nla_len(nla) != sizeof(u32))
+				return false;
 			val = nla_get_u32(nla);
 		}
 		if (type == RTAX_ADVMSS && val > 65535 - 40)

From 8b69e168aad7985d429d04bf1ba8cba721f01886 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 13 Jun 2018 16:15:29 +0200
Subject: [PATCH 0531/1852] Linux 4.4.137

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 9ab1ef4668b0d..c3c5f2a4e9e0b 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 136
+SUBLEVEL = 137
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 0a7a15a8c6f8338b4c963c337b6ed8958698a7df Mon Sep 17 00:00:00 2001
From: yu-cheng yu <yu-cheng.yu@intel.com>
Date: Wed, 6 Jan 2016 14:24:51 -0800
Subject: [PATCH 0532/1852] x86/fpu: Fix early FPU command-line parsing

commit 4f81cbafcce2c603db7865e9d0e461f7947d77d4 upstream.

The function fpu__init_system() is executed before
parse_early_param(). This causes wrong FPU configuration. This
patch fixes this issue by parsing boot_command_line in the
beginning of fpu__init_system().

With all four patches in this series, each parameter disables
features as the following:

eagerfpu=off: eagerfpu, avx, avx2, avx512, mpx
no387: fpu
nofxsr: fxsr, fxsropt, xmm
noxsave: xsave, xsaveopt, xsaves, xsavec, avx, avx2, avx512,
mpx, xgetbv1 noxsaveopt: xsaveopt
noxsaves: xsaves

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/1452119094-7252-2-git-send-email-yu-cheng.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/fpu/init.c | 109 +++++++++++++------------------------
 1 file changed, 38 insertions(+), 71 deletions(-)

diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 1011c05b1bd5d..06ea88b4ca44c 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -3,8 +3,11 @@
  */
 #include <asm/fpu/internal.h>
 #include <asm/tlbflush.h>
+#include <asm/setup.h>
+#include <asm/cmdline.h>
 
 #include <linux/sched.h>
+#include <linux/init.h>
 
 /*
  * Initialize the TS bit in CR0 according to the style of context-switches
@@ -262,18 +265,6 @@ static void __init fpu__init_system_xstate_size_legacy(void)
  */
 static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
 
-static int __init eager_fpu_setup(char *s)
-{
-	if (!strcmp(s, "on"))
-		eagerfpu = ENABLE;
-	else if (!strcmp(s, "off"))
-		eagerfpu = DISABLE;
-	else if (!strcmp(s, "auto"))
-		eagerfpu = AUTO;
-	return 1;
-}
-__setup("eagerfpu=", eager_fpu_setup);
-
 /*
  * Pick the FPU context switching strategy:
  */
@@ -307,12 +298,47 @@ static void __init fpu__init_system_ctx_switch(void)
 	printk(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy");
 }
 
+/*
+ * We parse fpu parameters early because fpu__init_system() is executed
+ * before parse_early_param().
+ */
+static void __init fpu__init_parse_early_param(void)
+{
+	/*
+	 * No need to check "eagerfpu=auto" again, since it is the
+	 * initial default.
+	 */
+	if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off"))
+		eagerfpu = DISABLE;
+	else if (cmdline_find_option_bool(boot_command_line, "eagerfpu=on"))
+		eagerfpu = ENABLE;
+
+	if (cmdline_find_option_bool(boot_command_line, "no387"))
+		setup_clear_cpu_cap(X86_FEATURE_FPU);
+
+	if (cmdline_find_option_bool(boot_command_line, "nofxsr")) {
+		setup_clear_cpu_cap(X86_FEATURE_FXSR);
+		setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
+		setup_clear_cpu_cap(X86_FEATURE_XMM);
+	}
+
+	if (cmdline_find_option_bool(boot_command_line, "noxsave"))
+		fpu__xstate_clear_all_cpu_caps();
+
+	if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
+		setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
+
+	if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
+		setup_clear_cpu_cap(X86_FEATURE_XSAVES);
+}
+
 /*
  * Called on the boot CPU once per system bootup, to set up the initial
  * FPU state that is later cloned into all processes:
  */
 void __init fpu__init_system(struct cpuinfo_x86 *c)
 {
+	fpu__init_parse_early_param();
 	fpu__init_system_early_generic(c);
 
 	/*
@@ -336,62 +362,3 @@ void __init fpu__init_system(struct cpuinfo_x86 *c)
 
 	fpu__init_system_ctx_switch();
 }
-
-/*
- * Boot parameter to turn off FPU support and fall back to math-emu:
- */
-static int __init no_387(char *s)
-{
-	setup_clear_cpu_cap(X86_FEATURE_FPU);
-	return 1;
-}
-__setup("no387", no_387);
-
-/*
- * Disable all xstate CPU features:
- */
-static int __init x86_noxsave_setup(char *s)
-{
-	if (strlen(s))
-		return 0;
-
-	fpu__xstate_clear_all_cpu_caps();
-
-	return 1;
-}
-__setup("noxsave", x86_noxsave_setup);
-
-/*
- * Disable the XSAVEOPT instruction specifically:
- */
-static int __init x86_noxsaveopt_setup(char *s)
-{
-	setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
-
-	return 1;
-}
-__setup("noxsaveopt", x86_noxsaveopt_setup);
-
-/*
- * Disable the XSAVES instruction:
- */
-static int __init x86_noxsaves_setup(char *s)
-{
-	setup_clear_cpu_cap(X86_FEATURE_XSAVES);
-
-	return 1;
-}
-__setup("noxsaves", x86_noxsaves_setup);
-
-/*
- * Disable FX save/restore and SSE support:
- */
-static int __init x86_nofxsr_setup(char *s)
-{
-	setup_clear_cpu_cap(X86_FEATURE_FXSR);
-	setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
-	setup_clear_cpu_cap(X86_FEATURE_XMM);
-
-	return 1;
-}
-__setup("nofxsr", x86_nofxsr_setup);

From 52382d86b9e39791d120c0a782234d19b1ded4ad Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Tue, 17 Nov 2015 13:05:43 +0100
Subject: [PATCH 0533/1852] x86: Remove unused function cpu_has_ht_siblings()

commit ed29210cd6a67425026e78aa298fa434e11a74e3 upstream.

It is used nowhere.

Signed-off-by: Juergen Gross <jgross@suse.com>
Link: http://lkml.kernel.org/r/1447761943-770-1-git-send-email-jgross@suse.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/smp.h | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 222a6a3ca2b5e..a438c5598a905 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -21,15 +21,6 @@
 extern int smp_num_siblings;
 extern unsigned int num_processors;
 
-static inline bool cpu_has_ht_siblings(void)
-{
-	bool has_siblings = false;
-#ifdef CONFIG_SMP
-	has_siblings = cpu_has_ht && smp_num_siblings > 1;
-#endif
-	return has_siblings;
-}
-
 DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
 DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);
 /* cpus sharing the last level cache: */

From 0540d2a6756cebcad127010bd16c5b7e7e1f168e Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Mon, 7 Dec 2015 10:39:41 +0100
Subject: [PATCH 0534/1852] x86/cpufeature: Remove unused and seldomly used
 cpu_has_xx macros

commit 362f924b64ba0f4be2ee0cb697690c33d40be721 upstream.

Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.

The remaining ones need more careful inspection before a conversion can
happen. On the TODO.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email-bp@alien8.de
Cc: David Sterba <dsterba@suse.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Chris Mason <clm@fb.com>
Cc: Josef Bacik <jbacik@fb.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/crypto/chacha20_glue.c             |  2 +-
 arch/x86/crypto/crc32c-intel_glue.c         |  2 +-
 arch/x86/include/asm/cmpxchg_32.h           |  2 +-
 arch/x86/include/asm/cmpxchg_64.h           |  2 +-
 arch/x86/include/asm/cpufeature.h           | 37 +++------------------
 arch/x86/include/asm/xor_32.h               |  2 +-
 arch/x86/kernel/cpu/amd.c                   |  4 +--
 arch/x86/kernel/cpu/common.c                |  4 ++-
 arch/x86/kernel/cpu/intel.c                 |  3 +-
 arch/x86/kernel/cpu/intel_cacheinfo.c       |  6 ++--
 arch/x86/kernel/cpu/mtrr/generic.c          |  2 +-
 arch/x86/kernel/cpu/mtrr/main.c             |  2 +-
 arch/x86/kernel/cpu/perf_event_amd.c        |  4 +--
 arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +++---
 arch/x86/kernel/fpu/init.c                  |  4 +--
 arch/x86/kernel/hw_breakpoint.c             |  6 ++--
 arch/x86/kernel/smpboot.c                   |  2 +-
 arch/x86/kernel/vm86_32.c                   |  4 ++-
 arch/x86/mm/setup_nx.c                      |  4 +--
 drivers/char/hw_random/via-rng.c            |  5 +--
 drivers/crypto/padlock-aes.c                |  2 +-
 drivers/crypto/padlock-sha.c                |  2 +-
 drivers/iommu/intel_irq_remapping.c         |  2 +-
 fs/btrfs/disk-io.c                          |  2 +-
 24 files changed, 48 insertions(+), 68 deletions(-)

diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bacea040e7..8baaff5af0b57 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
 
 static int __init chacha20_simd_mod_init(void)
 {
-	if (!cpu_has_ssse3)
+	if (!boot_cpu_has(X86_FEATURE_SSSE3))
 		return -ENODEV;
 
 #ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d75cf59..0e9871693f246 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
 	if (!x86_match_cpu(crc32c_cpu_id))
 		return -ENODEV;
 #ifdef CONFIG_X86_64
-	if (cpu_has_pclmulqdq) {
+	if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
 		alg.update = crc32c_pcl_intel_update;
 		alg.finup = crc32c_pcl_intel_finup;
 		alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index f7e142926481b..e4959d023af84 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)
 
 #endif
 
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
 
 #endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxchg_64.h
index 1af94697aae51..caa23a34c963a 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
 	cmpxchg_local((ptr), (o), (n));					\
 })
 
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
 
 #endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 641f0f2c2982f..dd7578e0fe0e9 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -368,58 +368,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
 
 #define cpu_has_fpu		boot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de		boot_cpu_has(X86_FEATURE_DE)
 #define cpu_has_pse		boot_cpu_has(X86_FEATURE_PSE)
 #define cpu_has_tsc		boot_cpu_has(X86_FEATURE_TSC)
 #define cpu_has_pge		boot_cpu_has(X86_FEATURE_PGE)
 #define cpu_has_apic		boot_cpu_has(X86_FEATURE_APIC)
-#define cpu_has_sep		boot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr		boot_cpu_has(X86_FEATURE_MTRR)
-#define cpu_has_mmx		boot_cpu_has(X86_FEATURE_MMX)
 #define cpu_has_fxsr		boot_cpu_has(X86_FEATURE_FXSR)
 #define cpu_has_xmm		boot_cpu_has(X86_FEATURE_XMM)
 #define cpu_has_xmm2		boot_cpu_has(X86_FEATURE_XMM2)
-#define cpu_has_xmm3		boot_cpu_has(X86_FEATURE_XMM3)
-#define cpu_has_ssse3		boot_cpu_has(X86_FEATURE_SSSE3)
 #define cpu_has_aes		boot_cpu_has(X86_FEATURE_AES)
 #define cpu_has_avx		boot_cpu_has(X86_FEATURE_AVX)
 #define cpu_has_avx2		boot_cpu_has(X86_FEATURE_AVX2)
-#define cpu_has_ht		boot_cpu_has(X86_FEATURE_HT)
-#define cpu_has_nx		boot_cpu_has(X86_FEATURE_NX)
-#define cpu_has_xstore		boot_cpu_has(X86_FEATURE_XSTORE)
-#define cpu_has_xstore_enabled	boot_cpu_has(X86_FEATURE_XSTORE_EN)
-#define cpu_has_xcrypt		boot_cpu_has(X86_FEATURE_XCRYPT)
-#define cpu_has_xcrypt_enabled	boot_cpu_has(X86_FEATURE_XCRYPT_EN)
-#define cpu_has_ace2		boot_cpu_has(X86_FEATURE_ACE2)
-#define cpu_has_ace2_enabled	boot_cpu_has(X86_FEATURE_ACE2_EN)
-#define cpu_has_phe		boot_cpu_has(X86_FEATURE_PHE)
-#define cpu_has_phe_enabled	boot_cpu_has(X86_FEATURE_PHE_EN)
-#define cpu_has_pmm		boot_cpu_has(X86_FEATURE_PMM)
-#define cpu_has_pmm_enabled	boot_cpu_has(X86_FEATURE_PMM_EN)
-#define cpu_has_ds		boot_cpu_has(X86_FEATURE_DS)
-#define cpu_has_pebs		boot_cpu_has(X86_FEATURE_PEBS)
 #define cpu_has_clflush		boot_cpu_has(X86_FEATURE_CLFLUSH)
-#define cpu_has_bts		boot_cpu_has(X86_FEATURE_BTS)
 #define cpu_has_gbpages		boot_cpu_has(X86_FEATURE_GBPAGES)
 #define cpu_has_arch_perfmon	boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
 #define cpu_has_pat		boot_cpu_has(X86_FEATURE_PAT)
-#define cpu_has_xmm4_1		boot_cpu_has(X86_FEATURE_XMM4_1)
-#define cpu_has_xmm4_2		boot_cpu_has(X86_FEATURE_XMM4_2)
 #define cpu_has_x2apic		boot_cpu_has(X86_FEATURE_X2APIC)
 #define cpu_has_xsave		boot_cpu_has(X86_FEATURE_XSAVE)
-#define cpu_has_xsaveopt	boot_cpu_has(X86_FEATURE_XSAVEOPT)
 #define cpu_has_xsaves		boot_cpu_has(X86_FEATURE_XSAVES)
 #define cpu_has_osxsave		boot_cpu_has(X86_FEATURE_OSXSAVE)
 #define cpu_has_hypervisor	boot_cpu_has(X86_FEATURE_HYPERVISOR)
-#define cpu_has_pclmulqdq	boot_cpu_has(X86_FEATURE_PCLMULQDQ)
-#define cpu_has_perfctr_core	boot_cpu_has(X86_FEATURE_PERFCTR_CORE)
-#define cpu_has_perfctr_nb	boot_cpu_has(X86_FEATURE_PERFCTR_NB)
-#define cpu_has_perfctr_l2	boot_cpu_has(X86_FEATURE_PERFCTR_L2)
-#define cpu_has_cx8		boot_cpu_has(X86_FEATURE_CX8)
-#define cpu_has_cx16		boot_cpu_has(X86_FEATURE_CX16)
-#define cpu_has_eager_fpu	boot_cpu_has(X86_FEATURE_EAGER_FPU)
-#define cpu_has_topoext		boot_cpu_has(X86_FEATURE_TOPOEXT)
-#define cpu_has_bpext		boot_cpu_has(X86_FEATURE_BPEXT)
+/*
+ * Do not add any more of those clumsy macros - use static_cpu_has_safe() for
+ * fast paths and boot_cpu_has() otherwise!
+ */
 
 #if __GNUC__ >= 4
 extern void warn_pre_alternatives(void);
diff --git a/arch/x86/include/asm/xor_32.h b/arch/x86/include/asm/xor_32.h
index 5a08bc8bff339..c54beb44c4c1f 100644
--- a/arch/x86/include/asm/xor_32.h
+++ b/arch/x86/include/asm/xor_32.h
@@ -553,7 +553,7 @@ do {							\
 	if (cpu_has_xmm) {				\
 		xor_speed(&xor_block_pIII_sse);		\
 		xor_speed(&xor_block_sse_pf64);		\
-	} else if (cpu_has_mmx) {			\
+	} else if (boot_cpu_has(X86_FEATURE_MMX)) {	\
 		xor_speed(&xor_block_pII_mmx);		\
 		xor_speed(&xor_block_p5_mmx);		\
 	} else {					\
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 4bf9e77f3e059..f4fb8f5b0be4d 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -304,7 +304,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
 	int cpu = smp_processor_id();
 
 	/* get information required for multi-node processors */
-	if (cpu_has_topoext) {
+	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
 		u32 eax, ebx, ecx, edx;
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
@@ -954,7 +954,7 @@ static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
 
 void set_dr_addr_mask(unsigned long mask, int dr)
 {
-	if (!cpu_has_bpext)
+	if (!boot_cpu_has(X86_FEATURE_BPEXT))
 		return;
 
 	switch (dr) {
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8eabbafff2133..0498ad3702f5a 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1539,7 +1539,9 @@ void cpu_init(void)
 
 	printk(KERN_INFO "Initializing CPU#%d\n", cpu);
 
-	if (cpu_feature_enabled(X86_FEATURE_VME) || cpu_has_tsc || cpu_has_de)
+	if (cpu_feature_enabled(X86_FEATURE_VME) ||
+	    cpu_has_tsc ||
+	    boot_cpu_has(X86_FEATURE_DE))
 		cr4_clear_bits(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 
 	load_current_idt();
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 209ac1e7d1f03..565648bc1a0ae 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -445,7 +445,8 @@ static void init_intel(struct cpuinfo_x86 *c)
 
 	if (cpu_has_xmm2)
 		set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
-	if (cpu_has_ds) {
+
+	if (boot_cpu_has(X86_FEATURE_DS)) {
 		unsigned int l1;
 		rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
 		if (!(l1 & (1<<11)))
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index b4ca91cf55b0d..3fa72317ad784 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -591,7 +591,7 @@ cpuid4_cache_lookup_regs(int index, struct _cpuid4_info_regs *this_leaf)
 	unsigned		edx;
 
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
-		if (cpu_has_topoext)
+		if (boot_cpu_has(X86_FEATURE_TOPOEXT))
 			cpuid_count(0x8000001d, index, &eax.full,
 				    &ebx.full, &ecx.full, &edx);
 		else
@@ -637,7 +637,7 @@ static int find_num_cache_leaves(struct cpuinfo_x86 *c)
 void init_amd_cacheinfo(struct cpuinfo_x86 *c)
 {
 
-	if (cpu_has_topoext) {
+	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
 		num_cache_leaves = find_num_cache_leaves(c);
 	} else if (c->extended_cpuid_level >= 0x80000006) {
 		if (cpuid_edx(0x80000006) & 0xf000)
@@ -809,7 +809,7 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,
 	struct cacheinfo *this_leaf;
 	int i, sibling;
 
-	if (cpu_has_topoext) {
+	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
 		unsigned int apicid, nshared, first, last;
 
 		this_leaf = this_cpu_ci->info_list + index;
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index b5624fafa44a5..136ae86f4f5fd 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -349,7 +349,7 @@ static void get_fixed_ranges(mtrr_type *frs)
 
 void mtrr_save_fixed_ranges(void *info)
 {
-	if (cpu_has_mtrr)
+	if (boot_cpu_has(X86_FEATURE_MTRR))
 		get_fixed_ranges(mtrr_state.fixed_ranges);
 }
 
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index fa77ac8291f03..f924f41af89a9 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -682,7 +682,7 @@ void __init mtrr_bp_init(void)
 
 	phys_addr = 32;
 
-	if (cpu_has_mtrr) {
+	if (boot_cpu_has(X86_FEATURE_MTRR)) {
 		mtrr_if = &generic_mtrr_ops;
 		size_or_mask = SIZE_OR_MASK_BITS(36);
 		size_and_mask = 0x00f00000;
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 1cee5d2d7ecea..3ea177cb73665 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -160,7 +160,7 @@ static inline int amd_pmu_addr_offset(int index, bool eventsel)
 	if (offset)
 		return offset;
 
-	if (!cpu_has_perfctr_core)
+	if (!boot_cpu_has(X86_FEATURE_PERFCTR_CORE))
 		offset = index;
 	else
 		offset = index << 1;
@@ -652,7 +652,7 @@ static __initconst const struct x86_pmu amd_pmu = {
 
 static int __init amd_core_pmu_init(void)
 {
-	if (!cpu_has_perfctr_core)
+	if (!boot_cpu_has(X86_FEATURE_PERFCTR_CORE))
 		return 0;
 
 	switch (boot_cpu_data.x86) {
diff --git a/arch/x86/kernel/cpu/perf_event_amd_uncore.c b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
index cc6cedb8f25d5..49742746a6c96 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
@@ -523,10 +523,10 @@ static int __init amd_uncore_init(void)
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
 		goto fail_nodev;
 
-	if (!cpu_has_topoext)
+	if (!boot_cpu_has(X86_FEATURE_TOPOEXT))
 		goto fail_nodev;
 
-	if (cpu_has_perfctr_nb) {
+	if (boot_cpu_has(X86_FEATURE_PERFCTR_NB)) {
 		amd_uncore_nb = alloc_percpu(struct amd_uncore *);
 		if (!amd_uncore_nb) {
 			ret = -ENOMEM;
@@ -540,7 +540,7 @@ static int __init amd_uncore_init(void)
 		ret = 0;
 	}
 
-	if (cpu_has_perfctr_l2) {
+	if (boot_cpu_has(X86_FEATURE_PERFCTR_L2)) {
 		amd_uncore_l2 = alloc_percpu(struct amd_uncore *);
 		if (!amd_uncore_l2) {
 			ret = -ENOMEM;
@@ -583,10 +583,11 @@ static int __init amd_uncore_init(void)
 
 	/* amd_uncore_nb/l2 should have been freed by cleanup_cpu_online */
 	amd_uncore_nb = amd_uncore_l2 = NULL;
-	if (cpu_has_perfctr_l2)
+
+	if (boot_cpu_has(X86_FEATURE_PERFCTR_L2))
 		perf_pmu_unregister(&amd_l2_pmu);
 fail_l2:
-	if (cpu_has_perfctr_nb)
+	if (boot_cpu_has(X86_FEATURE_PERFCTR_NB))
 		perf_pmu_unregister(&amd_nb_pmu);
 	if (amd_uncore_l2)
 		free_percpu(amd_uncore_l2);
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 06ea88b4ca44c..72577ad8c1fb3 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -15,7 +15,7 @@
  */
 static void fpu__init_cpu_ctx_switch(void)
 {
-	if (!cpu_has_eager_fpu)
+	if (!boot_cpu_has(X86_FEATURE_EAGER_FPU))
 		stts();
 	else
 		clts();
@@ -279,7 +279,7 @@ static void __init fpu__init_system_ctx_switch(void)
 	current_thread_info()->status = 0;
 
 	/* Auto enable eagerfpu for xsaveopt */
-	if (cpu_has_xsaveopt && eagerfpu != DISABLE)
+	if (boot_cpu_has(X86_FEATURE_XSAVEOPT) && eagerfpu != DISABLE)
 		eagerfpu = ENABLE;
 
 	if (xfeatures_mask & XFEATURE_MASK_EAGER) {
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 50a3fad5b89f1..2bcfb5f2bc449 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -300,6 +300,10 @@ static int arch_build_bp_info(struct perf_event *bp)
 			return -EINVAL;
 		if (bp->attr.bp_addr & (bp->attr.bp_len - 1))
 			return -EINVAL;
+
+		if (!boot_cpu_has(X86_FEATURE_BPEXT))
+			return -EOPNOTSUPP;
+
 		/*
 		 * It's impossible to use a range breakpoint to fake out
 		 * user vs kernel detection because bp_len - 1 can't
@@ -307,8 +311,6 @@ static int arch_build_bp_info(struct perf_event *bp)
 		 * breakpoints, then we'll have to check for kprobe-blacklisted
 		 * addresses anywhere in the range.
 		 */
-		if (!cpu_has_bpext)
-			return -EOPNOTSUPP;
 		info->mask = bp->attr.bp_len - 1;
 		info->len = X86_BREAKPOINT_LEN_1;
 	}
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 48ca93242bfdd..1f7aefc7b0b41 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -295,7 +295,7 @@ do {									\
 
 static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
-	if (cpu_has_topoext) {
+	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
 		int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
 
 		if (c->phys_proc_id == o->phys_proc_id &&
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index af57736a03096..d6d64a5195591 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -357,8 +357,10 @@ static long do_sys_vm86(struct vm86plus_struct __user *user_vm86, bool plus)
 	tss = &per_cpu(cpu_tss, get_cpu());
 	/* make room for real-mode segments */
 	tsk->thread.sp0 += 16;
-	if (cpu_has_sep)
+
+	if (static_cpu_has_safe(X86_FEATURE_SEP))
 		tsk->thread.sysenter_cs = 0;
+
 	load_sp0(tss, &tsk->thread);
 	put_cpu();
 
diff --git a/arch/x86/mm/setup_nx.c b/arch/x86/mm/setup_nx.c
index 90555bf60aa45..92e2eacb33216 100644
--- a/arch/x86/mm/setup_nx.c
+++ b/arch/x86/mm/setup_nx.c
@@ -31,7 +31,7 @@ early_param("noexec", noexec_setup);
 
 void x86_configure_nx(void)
 {
-	if (cpu_has_nx && !disable_nx)
+	if (boot_cpu_has(X86_FEATURE_NX) && !disable_nx)
 		__supported_pte_mask |= _PAGE_NX;
 	else
 		__supported_pte_mask &= ~_PAGE_NX;
@@ -39,7 +39,7 @@ void x86_configure_nx(void)
 
 void __init x86_report_nx(void)
 {
-	if (!cpu_has_nx) {
+	if (!boot_cpu_has(X86_FEATURE_NX)) {
 		printk(KERN_NOTICE "Notice: NX (Execute Disable) protection "
 		       "missing in CPU!\n");
 	} else {
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index 0c98a9d51a249..44ce806069444 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -140,7 +140,7 @@ static int via_rng_init(struct hwrng *rng)
 	 * RNG configuration like it used to be the case in this
 	 * register */
 	if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
-		if (!cpu_has_xstore_enabled) {
+		if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
 			pr_err(PFX "can't enable hardware RNG "
 				"if XSTORE is not enabled\n");
 			return -ENODEV;
@@ -200,8 +200,9 @@ static int __init mod_init(void)
 {
 	int err;
 
-	if (!cpu_has_xstore)
+	if (!boot_cpu_has(X86_FEATURE_XSTORE))
 		return -ENODEV;
+
 	pr_info("VIA RNG detected\n");
 	err = hwrng_register(&via_rng);
 	if (err) {
diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index da2d6777bd092..97a364694bfce 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -515,7 +515,7 @@ static int __init padlock_init(void)
 	if (!x86_match_cpu(padlock_cpu_id))
 		return -ENODEV;
 
-	if (!cpu_has_xcrypt_enabled) {
+	if (!boot_cpu_has(X86_FEATURE_XCRYPT_EN)) {
 		printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
 		return -ENODEV;
 	}
diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
index 4e154c9b92064..8c5f90647b7a7 100644
--- a/drivers/crypto/padlock-sha.c
+++ b/drivers/crypto/padlock-sha.c
@@ -540,7 +540,7 @@ static int __init padlock_init(void)
 	struct shash_alg *sha1;
 	struct shash_alg *sha256;
 
-	if (!x86_match_cpu(padlock_sha_ids) || !cpu_has_phe_enabled)
+	if (!x86_match_cpu(padlock_sha_ids) || !boot_cpu_has(X86_FEATURE_PHE_EN))
 		return -ENODEV;
 
 	/* Register the newly added algorithm module if on *
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index e9b241b1c9dd8..ac596928f6b40 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -753,7 +753,7 @@ static inline void set_irq_posting_cap(void)
 		 * should have X86_FEATURE_CX16 support, this has been confirmed
 		 * with Intel hardware guys.
 		 */
-		if ( cpu_has_cx16 )
+		if (boot_cpu_has(X86_FEATURE_CX16))
 			intel_irq_remap_ops.capability |= 1 << IRQ_POSTING_CAP;
 
 		for_each_iommu(iommu, drhd)
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 208b3f5ffb3f1..7efd70bfeaf78 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -923,7 +923,7 @@ static int check_async_write(struct inode *inode, unsigned long bio_flags)
 	if (bio_flags & EXTENT_BIO_TREE_LOG)
 		return 0;
 #ifdef CONFIG_X86
-	if (cpu_has_xmm4_2)
+	if (static_cpu_has_safe(X86_FEATURE_XMM4_2))
 		return 0;
 #endif
 	return 1;

From 330a31aabb805d324dbbbcb09d48033ac2e97ae9 Mon Sep 17 00:00:00 2001
From: yu-cheng yu <yu-cheng.yu@intel.com>
Date: Wed, 6 Jan 2016 14:24:53 -0800
Subject: [PATCH 0535/1852] x86/fpu: Disable MPX when eagerfpu is off

commit a5fe93a549c54838063d2952dd9643b0b18aa67f upstream.

This issue is a fallout from the command-line parsing move.

When "eagerfpu=off" is given as a command-line input, the kernel
should disable MPX support. The decision for turning off MPX was
made in fpu__init_system_ctx_switch(), which is after the
selection of the XSAVE format. This patch fixes it by getting
that decision done earlier in fpu__init_system_xstate().

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/1452119094-7252-4-git-send-email-yu-cheng.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/internal.h |  1 +
 arch/x86/kernel/fpu/init.c          | 56 ++++++++++++++++++++++-------
 arch/x86/kernel/fpu/xstate.c        |  3 +-
 3 files changed, 46 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 3c3550c3a4a3f..6b07a842f3aab 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -42,6 +42,7 @@ extern void fpu__init_cpu_xstate(void);
 extern void fpu__init_system(struct cpuinfo_x86 *c);
 extern void fpu__init_check_bugs(void);
 extern void fpu__resume_cpu(void);
+extern u64 fpu__get_supported_xfeatures_mask(void);
 
 /*
  * Debugging facility:
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 72577ad8c1fb3..679a04639d0f1 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -265,8 +265,46 @@ static void __init fpu__init_system_xstate_size_legacy(void)
  */
 static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
 
+/*
+ * Find supported xfeatures based on cpu features and command-line input.
+ * This must be called after fpu__init_parse_early_param() is called and
+ * xfeatures_mask is enumerated.
+ */
+u64 __init fpu__get_supported_xfeatures_mask(void)
+{
+	/* Support all xfeatures known to us */
+	if (eagerfpu != DISABLE)
+		return XCNTXT_MASK;
+
+	/* Warning of xfeatures being disabled for no eagerfpu mode */
+	if (xfeatures_mask & XFEATURE_MASK_EAGER) {
+		pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",
+			xfeatures_mask & XFEATURE_MASK_EAGER);
+	}
+
+	/* Return a mask that masks out all features requiring eagerfpu mode */
+	return ~XFEATURE_MASK_EAGER;
+}
+
+/*
+ * Disable features dependent on eagerfpu.
+ */
+static void __init fpu__clear_eager_fpu_features(void)
+{
+	setup_clear_cpu_cap(X86_FEATURE_MPX);
+}
+
 /*
  * Pick the FPU context switching strategy:
+ *
+ * When eagerfpu is AUTO or ENABLE, we ensure it is ENABLE if either of
+ * the following is true:
+ *
+ * (1) the cpu has xsaveopt, as it has the optimization and doing eager
+ *     FPU switching has a relatively low cost compared to a plain xsave;
+ * (2) the cpu has xsave features (e.g. MPX) that depend on eager FPU
+ *     switching. Should the kernel boot with noxsaveopt, we support MPX
+ *     with eager FPU switching at a higher cost.
  */
 static void __init fpu__init_system_ctx_switch(void)
 {
@@ -278,19 +316,11 @@ static void __init fpu__init_system_ctx_switch(void)
 	WARN_ON_FPU(current->thread.fpu.fpstate_active);
 	current_thread_info()->status = 0;
 
-	/* Auto enable eagerfpu for xsaveopt */
 	if (boot_cpu_has(X86_FEATURE_XSAVEOPT) && eagerfpu != DISABLE)
 		eagerfpu = ENABLE;
 
-	if (xfeatures_mask & XFEATURE_MASK_EAGER) {
-		if (eagerfpu == DISABLE) {
-			pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",
-			       xfeatures_mask & XFEATURE_MASK_EAGER);
-			xfeatures_mask &= ~XFEATURE_MASK_EAGER;
-		} else {
-			eagerfpu = ENABLE;
-		}
-	}
+	if (xfeatures_mask & XFEATURE_MASK_EAGER)
+		eagerfpu = ENABLE;
 
 	if (eagerfpu == ENABLE)
 		setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
@@ -308,10 +338,12 @@ static void __init fpu__init_parse_early_param(void)
 	 * No need to check "eagerfpu=auto" again, since it is the
 	 * initial default.
 	 */
-	if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off"))
+	if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off")) {
 		eagerfpu = DISABLE;
-	else if (cmdline_find_option_bool(boot_command_line, "eagerfpu=on"))
+		fpu__clear_eager_fpu_features();
+	} else if (cmdline_find_option_bool(boot_command_line, "eagerfpu=on")) {
 		eagerfpu = ENABLE;
+	}
 
 	if (cmdline_find_option_bool(boot_command_line, "no387"))
 		setup_clear_cpu_cap(X86_FEATURE_FPU);
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 70fc312221fc6..3fa200ecca623 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -632,8 +632,7 @@ void __init fpu__init_system_xstate(void)
 		BUG();
 	}
 
-	/* Support only the state known to the OS: */
-	xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
+	xfeatures_mask &= fpu__get_supported_xfeatures_mask();
 
 	/* Enable xstate instructions to be able to continue with initialization: */
 	fpu__init_cpu_xstate();

From 9722311bbd9b9ebb73f4281c5c3e1204df6901f0 Mon Sep 17 00:00:00 2001
From: yu-cheng yu <yu-cheng.yu@intel.com>
Date: Wed, 6 Jan 2016 14:24:54 -0800
Subject: [PATCH 0536/1852] x86/fpu: Disable AVX when eagerfpu is off

commit 394db20ca240741a08d472173db13d6f6a6e5a28 upstream.

When "eagerfpu=off" is given as a command-line input, the kernel
should disable AVX support.

The Task Switched bit used for lazy context switching does not
support AVX. If AVX is enabled without eagerfpu context
switching, one task's AVX state could become corrupted or leak
to other tasks. This is a bug and has bad security implications.

This only affects systems that have AVX/AVX2/AVX512 and this
issue will be found only when one actually uses AVX/AVX2/AVX512
_AND_ does eagerfpu=off.

Reference: Intel Software Developer's Manual Vol. 3A

Sec. 2.5 Control Registers:
TS Task Switched bit (bit 3 of CR0) -- Allows the saving of the
x87 FPU/ MMX/SSE/SSE2/SSE3/SSSE3/SSE4 context on a task switch
to be delayed until an x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3/SSE4
instruction is actually executed by the new task.

Sec. 13.4.1 Using the TS Flag to Control the Saving of the X87
FPU and SSE State
When the TS flag is set, the processor monitors the instruction
stream for x87 FPU, MMX, SSE instructions. When the processor
detects one of these instructions, it raises a
device-not-available exeception (#NM) prior to executing the
instruction.

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/1452119094-7252-5-git-send-email-yu-cheng.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/xstate.h | 11 ++++++-----
 arch/x86/kernel/fpu/init.c        |  6 ++++++
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index 3a6c89b703075..af30fdeb140da 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -20,15 +20,16 @@
 
 /* Supported features which support lazy state saving */
 #define XFEATURE_MASK_LAZY	(XFEATURE_MASK_FP | \
-				 XFEATURE_MASK_SSE | \
+				 XFEATURE_MASK_SSE)
+
+/* Supported features which require eager state saving */
+#define XFEATURE_MASK_EAGER	(XFEATURE_MASK_BNDREGS | \
+				 XFEATURE_MASK_BNDCSR | \
 				 XFEATURE_MASK_YMM | \
-				 XFEATURE_MASK_OPMASK |	\
+				 XFEATURE_MASK_OPMASK | \
 				 XFEATURE_MASK_ZMM_Hi256 | \
 				 XFEATURE_MASK_Hi16_ZMM)
 
-/* Supported features which require eager state saving */
-#define XFEATURE_MASK_EAGER	(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
-
 /* All currently supported features */
 #define XCNTXT_MASK	(XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
 
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 679a04639d0f1..81a8732b94f32 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -292,6 +292,12 @@ u64 __init fpu__get_supported_xfeatures_mask(void)
 static void __init fpu__clear_eager_fpu_features(void)
 {
 	setup_clear_cpu_cap(X86_FEATURE_MPX);
+	setup_clear_cpu_cap(X86_FEATURE_AVX);
+	setup_clear_cpu_cap(X86_FEATURE_AVX2);
+	setup_clear_cpu_cap(X86_FEATURE_AVX512F);
+	setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
+	setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
+	setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
 }
 
 /*

From 7e29569031fadcfab58a4c9d78810e3cab192833 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Sun, 24 Jan 2016 14:38:10 -0800
Subject: [PATCH 0537/1852] x86/fpu: Default eagerfpu=on on all CPUs

commit 58122bf1d856a4ea9581d62a07c557d997d46a19 upstream.

We have eager and lazy FPU modes, introduced in:

  304bceda6a18 ("x86, fpu: use non-lazy fpu restore for processors supporting xsave")

The result is rather messy.  There are two code paths in almost all
of the FPU code, and only one of them (the eager case) is tested
frequently, since most kernel developers have new enough hardware
that we use eagerfpu.

It seems that, on any remotely recent hardware, eagerfpu is a win:
glibc uses SSE2, so laziness is probably overoptimistic, and, in any
case, manipulating TS is far slower that saving and restoring the
full state.  (Stores to CR0.TS are serializing and are poorly
optimized.)

To try to shake out any latent issues on old hardware, this changes
the default to eager on all CPUs.  If no performance or functionality
problems show up, a subsequent patch could remove lazy mode entirely.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/ac290de61bf08d9cfc2664a4f5080257ffc1075a.1453675014.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/fpu/init.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 81a8732b94f32..cefa5b510fc5c 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -252,7 +252,10 @@ static void __init fpu__init_system_xstate_size_legacy(void)
  * not only saved the restores along the way, but we also have the
  * FPU ready to be used for the original task.
  *
- * 'eager' switching is used on modern CPUs, there we switch the FPU
+ * 'lazy' is deprecated because it's almost never a performance win
+ * and it's much more complicated than 'eager'.
+ *
+ * 'eager' switching is by default on all CPUs, there we switch the FPU
  * state during every context switch, regardless of whether the task
  * has used FPU instructions in that time slice or not. This is done
  * because modern FPU context saving instructions are able to optimize
@@ -263,7 +266,7 @@ static void __init fpu__init_system_xstate_size_legacy(void)
  *   to use 'eager' restores, if we detect that a task is using the FPU
  *   frequently. See the fpu->counter logic in fpu/internal.h for that. ]
  */
-static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
+static enum { ENABLE, DISABLE } eagerfpu = ENABLE;
 
 /*
  * Find supported xfeatures based on cpu features and command-line input.
@@ -340,15 +343,9 @@ static void __init fpu__init_system_ctx_switch(void)
  */
 static void __init fpu__init_parse_early_param(void)
 {
-	/*
-	 * No need to check "eagerfpu=auto" again, since it is the
-	 * initial default.
-	 */
 	if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off")) {
 		eagerfpu = DISABLE;
 		fpu__clear_eager_fpu_features();
-	} else if (cmdline_find_option_bool(boot_command_line, "eagerfpu=on")) {
-		eagerfpu = ENABLE;
 	}
 
 	if (cmdline_find_option_bool(boot_command_line, "no387"))

From 6b783746866b21c396b3e281e5b268e82e3dabcd Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Thu, 21 Jan 2016 15:24:31 -0800
Subject: [PATCH 0538/1852] x86/fpu: Fix 'no387' regression

commit f363938c70a04e6bc99023a5e0c44ef7879b903f upstream.

After fixing FPU option parsing, we now parse the 'no387' boot option
too early: no387 clears X86_FEATURE_FPU before it's even probed, so
the boot CPU promptly re-enables it.

I suspect it gets even more confused on SMP.

Fix the probing code to leave X86_FEATURE_FPU off if it's been
disabled by setup_clear_cpu_cap().

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Fixes: 4f81cbafcce2 ("x86/fpu: Fix early FPU command-line parsing")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/fpu/init.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index cefa5b510fc5c..a2b1b67758e61 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -78,13 +78,15 @@ static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
 	cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
 	write_cr0(cr0);
 
-	asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
-		     : "+m" (fsw), "+m" (fcw));
+	if (!test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
+		asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
+			     : "+m" (fsw), "+m" (fcw));
 
-	if (fsw == 0 && (fcw & 0x103f) == 0x003f)
-		set_cpu_cap(c, X86_FEATURE_FPU);
-	else
-		clear_cpu_cap(c, X86_FEATURE_FPU);
+		if (fsw == 0 && (fcw & 0x103f) == 0x003f)
+			set_cpu_cap(c, X86_FEATURE_FPU);
+		else
+			clear_cpu_cap(c, X86_FEATURE_FPU);
+	}
 
 #ifndef CONFIG_MATH_EMULATION
 	if (!cpu_has_fpu) {

From 41a1ecb361f1f40c2aae2b68d4d9d8e71131e259 Mon Sep 17 00:00:00 2001
From: Yu-cheng Yu <yu-cheng.yu@intel.com>
Date: Wed, 9 Mar 2016 16:28:54 -0800
Subject: [PATCH 0539/1852] x86/fpu: Revert ("x86/fpu: Disable AVX when
 eagerfpu is off")

commit a65050c6f17e52442716138d48d0a47301a8344b upstream.

Leonid Shatz noticed that the SDM interpretation of the following
recent commit:

  394db20ca240741 ("x86/fpu: Disable AVX when eagerfpu is off")

... is incorrect and that the original behavior of the FPU code was correct.

Because AVX is not stated in CR0 TS bit description, it was mistakenly
believed to be not supported for lazy context switch. This turns out
to be false:

  Intel Software Developer's Manual Vol. 3A, Sec. 2.5 Control Registers:

   'TS Task Switched bit (bit 3 of CR0) -- Allows the saving of the x87 FPU/
    MMX/SSE/SSE2/SSE3/SSSE3/SSE4 context on a task switch to be delayed until
    an x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3/SSE4 instruction is actually executed
    by the new task.'

  Intel Software Developer's Manual Vol. 2A, Sec. 2.4 Instruction Exception
  Specification:

   'AVX instructions refer to exceptions by classes that include #NM
    "Device Not Available" exception for lazy context switch.'

So revert the commit.

Reported-by: Leonid Shatz <leonid.shatz@ravellosystems.com>
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1457569734-3785-1-git-send-email-yu-cheng.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/xstate.h | 9 ++++-----
 arch/x86/kernel/fpu/init.c        | 6 ------
 2 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index af30fdeb140da..f23cd8c80b1c8 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -20,16 +20,15 @@
 
 /* Supported features which support lazy state saving */
 #define XFEATURE_MASK_LAZY	(XFEATURE_MASK_FP | \
-				 XFEATURE_MASK_SSE)
-
-/* Supported features which require eager state saving */
-#define XFEATURE_MASK_EAGER	(XFEATURE_MASK_BNDREGS | \
-				 XFEATURE_MASK_BNDCSR | \
+				 XFEATURE_MASK_SSE | \
 				 XFEATURE_MASK_YMM | \
 				 XFEATURE_MASK_OPMASK | \
 				 XFEATURE_MASK_ZMM_Hi256 | \
 				 XFEATURE_MASK_Hi16_ZMM)
 
+/* Supported features which require eager state saving */
+#define XFEATURE_MASK_EAGER	(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
+
 /* All currently supported features */
 #define XCNTXT_MASK	(XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
 
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index a2b1b67758e61..c3fd07a9621a8 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -297,12 +297,6 @@ u64 __init fpu__get_supported_xfeatures_mask(void)
 static void __init fpu__clear_eager_fpu_features(void)
 {
 	setup_clear_cpu_cap(X86_FEATURE_MPX);
-	setup_clear_cpu_cap(X86_FEATURE_AVX);
-	setup_clear_cpu_cap(X86_FEATURE_AVX2);
-	setup_clear_cpu_cap(X86_FEATURE_AVX512F);
-	setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
-	setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
-	setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
 }
 
 /*

From d21c4d8bb7a1e4c0d73fa866c3a1910ce4baeae7 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@alien8.de>
Date: Fri, 11 Mar 2016 12:32:06 +0100
Subject: [PATCH 0540/1852] x86/fpu: Fix eager-FPU handling on legacy FPU
 machines

commit 6e6867093de35141f0a76b66ac13f9f2e2c8e77a upstream.

i486 derived cores like Intel Quark support only the very old,
legacy x87 FPU (FSAVE/FRSTOR, CPUID bit FXSR is not set), and
our FPU code wasn't handling the saving and restoring there
properly in the 'eagerfpu' case.

So after we made eagerfpu the default for all CPU types:

  58122bf1d856 x86/fpu: Default eagerfpu=on on all CPUs

these old FPU designs broke. First, Andy Shevchenko reported a splat:

  WARNING: CPU: 0 PID: 823 at arch/x86/include/asm/fpu/internal.h:163 fpu__clear+0x8c/0x160

which was us trying to execute FXRSTOR on those machines even though
they don't support it.

After taking care of that, Bryan O'Donoghue reported that a simple FPU
test still failed because we weren't initializing the FPU state properly
on those machines.

Take care of all that.

Reported-and-tested-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yu-cheng <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/20160311113206.GD4312@pd.tnic
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/fpu/core.c | 4 +++-
 arch/x86/kernel/fpu/init.c | 2 +-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index d25097c3fc1d1..d5804adfa6da6 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -409,8 +409,10 @@ static inline void copy_init_fpstate_to_fpregs(void)
 {
 	if (use_xsave())
 		copy_kernel_to_xregs(&init_fpstate.xsave, -1);
-	else
+	else if (static_cpu_has(X86_FEATURE_FXSR))
 		copy_kernel_to_fxregs(&init_fpstate.fxsave);
+	else
+		copy_kernel_to_fregs(&init_fpstate.fsave);
 }
 
 /*
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index c3fd07a9621a8..02a2b73e3f6b5 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -135,7 +135,7 @@ static void __init fpu__init_system_generic(void)
 	 * Set up the legacy init FPU context. (xstate init might overwrite this
 	 * with a more modern format, if the CPU supports it.)
 	 */
-	fpstate_init_fxstate(&init_fpstate.fxsave);
+	fpstate_init(&init_fpstate);
 
 	fpu__init_system_mxcsr();
 }

From d01e7a4ceaaafa582ac4b163702b3d77b02285b4 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Tue, 4 Oct 2016 20:34:31 -0400
Subject: [PATCH 0541/1852] x86/fpu: Hard-disable lazy FPU mode

commit ca6938a1cd8a1c5e861a99b67f84ac166fc2b9e7 upstream.

Since commit:

  58122bf1d856 ("x86/fpu: Default eagerfpu=on on all CPUs")

... in Linux 4.6, eager FPU mode has been the default on all x86
systems, and no one has reported any regressions.

This patch removes the ability to enable lazy mode: use_eager_fpu()
becomes "return true" and all of the FPU mode selection machinery is
removed.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Rik van Riel <riel@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: pbonzini@redhat.com
Link: http://lkml.kernel.org/r/1475627678-20788-3-git-send-email-riel@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h   |  2 +-
 arch/x86/include/asm/fpu/internal.h |  2 +-
 arch/x86/kernel/fpu/init.c          | 91 +----------------------------
 3 files changed, 5 insertions(+), 90 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index dd7578e0fe0e9..232621c5e8593 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -104,7 +104,7 @@
 #define X86_FEATURE_EXTD_APICID	( 3*32+26) /* has extended APICID (8 bits) */
 #define X86_FEATURE_AMD_DCM     ( 3*32+27) /* multi-node processor */
 #define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */
-#define X86_FEATURE_EAGER_FPU	( 3*32+29) /* "eagerfpu" Non lazy FPU restore */
+/* free, was #define X86_FEATURE_EAGER_FPU	( 3*32+29) * "eagerfpu" Non lazy FPU restore */
 #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 6b07a842f3aab..84de3d4f675c2 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -58,7 +58,7 @@ extern u64 fpu__get_supported_xfeatures_mask(void);
  */
 static __always_inline __pure bool use_eager_fpu(void)
 {
-	return static_cpu_has_safe(X86_FEATURE_EAGER_FPU);
+	return true;
 }
 
 static __always_inline __pure bool use_xsaveopt(void)
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 02a2b73e3f6b5..954517285fa23 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -15,10 +15,7 @@
  */
 static void fpu__init_cpu_ctx_switch(void)
 {
-	if (!boot_cpu_has(X86_FEATURE_EAGER_FPU))
-		stts();
-	else
-		clts();
+	clts();
 }
 
 /*
@@ -234,42 +231,6 @@ static void __init fpu__init_system_xstate_size_legacy(void)
 	setup_clear_cpu_cap(X86_FEATURE_XSAVES);
 }
 
-/*
- * FPU context switching strategies:
- *
- * Against popular belief, we don't do lazy FPU saves, due to the
- * task migration complications it brings on SMP - we only do
- * lazy FPU restores.
- *
- * 'lazy' is the traditional strategy, which is based on setting
- * CR0::TS to 1 during context-switch (instead of doing a full
- * restore of the FPU state), which causes the first FPU instruction
- * after the context switch (whenever it is executed) to fault - at
- * which point we lazily restore the FPU state into FPU registers.
- *
- * Tasks are of course under no obligation to execute FPU instructions,
- * so it can easily happen that another context-switch occurs without
- * a single FPU instruction being executed. If we eventually switch
- * back to the original task (that still owns the FPU) then we have
- * not only saved the restores along the way, but we also have the
- * FPU ready to be used for the original task.
- *
- * 'lazy' is deprecated because it's almost never a performance win
- * and it's much more complicated than 'eager'.
- *
- * 'eager' switching is by default on all CPUs, there we switch the FPU
- * state during every context switch, regardless of whether the task
- * has used FPU instructions in that time slice or not. This is done
- * because modern FPU context saving instructions are able to optimize
- * state saving and restoration in hardware: they can detect both
- * unused and untouched FPU state and optimize accordingly.
- *
- * [ Note that even in 'lazy' mode we might optimize context switches
- *   to use 'eager' restores, if we detect that a task is using the FPU
- *   frequently. See the fpu->counter logic in fpu/internal.h for that. ]
- */
-static enum { ENABLE, DISABLE } eagerfpu = ENABLE;
-
 /*
  * Find supported xfeatures based on cpu features and command-line input.
  * This must be called after fpu__init_parse_early_param() is called and
@@ -277,40 +238,10 @@ static enum { ENABLE, DISABLE } eagerfpu = ENABLE;
  */
 u64 __init fpu__get_supported_xfeatures_mask(void)
 {
-	/* Support all xfeatures known to us */
-	if (eagerfpu != DISABLE)
-		return XCNTXT_MASK;
-
-	/* Warning of xfeatures being disabled for no eagerfpu mode */
-	if (xfeatures_mask & XFEATURE_MASK_EAGER) {
-		pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",
-			xfeatures_mask & XFEATURE_MASK_EAGER);
-	}
-
-	/* Return a mask that masks out all features requiring eagerfpu mode */
-	return ~XFEATURE_MASK_EAGER;
-}
-
-/*
- * Disable features dependent on eagerfpu.
- */
-static void __init fpu__clear_eager_fpu_features(void)
-{
-	setup_clear_cpu_cap(X86_FEATURE_MPX);
+	return XCNTXT_MASK;
 }
 
-/*
- * Pick the FPU context switching strategy:
- *
- * When eagerfpu is AUTO or ENABLE, we ensure it is ENABLE if either of
- * the following is true:
- *
- * (1) the cpu has xsaveopt, as it has the optimization and doing eager
- *     FPU switching has a relatively low cost compared to a plain xsave;
- * (2) the cpu has xsave features (e.g. MPX) that depend on eager FPU
- *     switching. Should the kernel boot with noxsaveopt, we support MPX
- *     with eager FPU switching at a higher cost.
- */
+/* Legacy code to initialize eager fpu mode. */
 static void __init fpu__init_system_ctx_switch(void)
 {
 	static bool on_boot_cpu = 1;
@@ -320,17 +251,6 @@ static void __init fpu__init_system_ctx_switch(void)
 
 	WARN_ON_FPU(current->thread.fpu.fpstate_active);
 	current_thread_info()->status = 0;
-
-	if (boot_cpu_has(X86_FEATURE_XSAVEOPT) && eagerfpu != DISABLE)
-		eagerfpu = ENABLE;
-
-	if (xfeatures_mask & XFEATURE_MASK_EAGER)
-		eagerfpu = ENABLE;
-
-	if (eagerfpu == ENABLE)
-		setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
-
-	printk(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy");
 }
 
 /*
@@ -339,11 +259,6 @@ static void __init fpu__init_system_ctx_switch(void)
  */
 static void __init fpu__init_parse_early_param(void)
 {
-	if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off")) {
-		eagerfpu = DISABLE;
-		fpu__clear_eager_fpu_features();
-	}
-
 	if (cmdline_find_option_bool(boot_command_line, "no387"))
 		setup_clear_cpu_cap(X86_FEATURE_FPU);
 

From c12b9a388d187a552e9283a9ea9bd0461f81dd98 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Sun, 24 Jan 2016 14:38:07 -0800
Subject: [PATCH 0542/1852] x86/fpu: Fix FNSAVE usage in eagerfpu mode

commit 5ed73f40735c68d8a656b46d09b1885d3b8740ae upstream.

In eager fpu mode, having deactivated FPU without immediately
reloading some other context is illegal.  Therefore, to recover from
FNSAVE, we can't just deactivate the state -- we need to reload it
if we're not actively context switching.

We had this wrong in fpu__save() and fpu__copy().  Fix both.
__kernel_fpu_begin() was fine -- add a comment.

This fixes a warning triggerable with nofxsr eagerfpu=on.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/60662444e13c76f06e23c15c5dcdba31b4ac3d67.1453675014.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/fpu/core.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index d5804adfa6da6..f9734186a57e1 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -114,6 +114,10 @@ void __kernel_fpu_begin(void)
 	kernel_fpu_disable();
 
 	if (fpu->fpregs_active) {
+		/*
+		 * Ignore return value -- we don't care if reg state
+		 * is clobbered.
+		 */
 		copy_fpregs_to_fpstate(fpu);
 	} else {
 		this_cpu_write(fpu_fpregs_owner_ctx, NULL);
@@ -189,8 +193,12 @@ void fpu__save(struct fpu *fpu)
 
 	preempt_disable();
 	if (fpu->fpregs_active) {
-		if (!copy_fpregs_to_fpstate(fpu))
-			fpregs_deactivate(fpu);
+		if (!copy_fpregs_to_fpstate(fpu)) {
+			if (use_eager_fpu())
+				copy_kernel_to_fpregs(&fpu->state);
+			else
+				fpregs_deactivate(fpu);
+		}
 	}
 	preempt_enable();
 }
@@ -259,7 +267,11 @@ static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)
 	preempt_disable();
 	if (!copy_fpregs_to_fpstate(dst_fpu)) {
 		memcpy(&src_fpu->state, &dst_fpu->state, xstate_size);
-		fpregs_deactivate(src_fpu);
+
+		if (use_eager_fpu())
+			copy_kernel_to_fpregs(&src_fpu->state);
+		else
+			fpregs_deactivate(src_fpu);
 	}
 	preempt_enable();
 }

From 7a05d4500a25239c7d38bcd1c059b72d945d4d6b Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Sun, 24 Jan 2016 14:38:06 -0800
Subject: [PATCH 0543/1852] x86/fpu: Fix math emulation in eager fpu mode

commit 4ecd16ec7059390b430af34bd8bc3ca2b5dcef9a upstream.

Systems without an FPU are generally old and therefore use lazy FPU
switching. Unsurprisingly, math emulation in eager FPU mode is a
bit buggy. Fix it.

There were two bugs involving kernel code trying to use the FPU
registers in eager mode even if they didn't exist and one BUG_ON()
that was incorrect.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/b4b8d112436bd6fab866e1b4011131507e8d7fbe.1453675014.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/internal.h | 3 ++-
 arch/x86/kernel/fpu/core.c          | 2 +-
 arch/x86/kernel/traps.c             | 1 -
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 84de3d4f675c2..146d838e6ee77 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -596,7 +596,8 @@ switch_fpu_prepare(struct fpu *old_fpu, struct fpu *new_fpu, int cpu)
 	 * If the task has used the math, pre-load the FPU on xsave processors
 	 * or if the past 5 consecutive context-switches used math.
 	 */
-	fpu.preload = new_fpu->fpstate_active &&
+	fpu.preload = static_cpu_has(X86_FEATURE_FPU) &&
+		      new_fpu->fpstate_active &&
 		      (use_eager_fpu() || new_fpu->counter > 5);
 
 	if (old_fpu->fpregs_active) {
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index f9734186a57e1..6aa0b519c8510 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -437,7 +437,7 @@ void fpu__clear(struct fpu *fpu)
 {
 	WARN_ON_FPU(fpu != &current->thread.fpu); /* Almost certainly an anomaly */
 
-	if (!use_eager_fpu()) {
+	if (!use_eager_fpu() || !static_cpu_has(X86_FEATURE_FPU)) {
 		/* FPU state will be reallocated lazily at the first use. */
 		fpu__drop(fpu);
 	} else {
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 1fbd2631be606..8c73bf1492b86 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -751,7 +751,6 @@ dotraplinkage void
 do_device_not_available(struct pt_regs *regs, long error_code)
 {
 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
-	BUG_ON(use_eager_fpu());
 
 #ifdef CONFIG_MATH_EMULATION
 	if (read_cr0() & X86_CR0_EM) {

From 01dbc712bdc663398a5769d56290ed173d680a4b Mon Sep 17 00:00:00 2001
From: Kevin Easton <kevin@guarana.org>
Date: Sat, 7 Apr 2018 11:40:33 -0400
Subject: [PATCH 0544/1852] af_key: Always verify length of provided sadb_key

commit 4b66af2d6356a00e94bcdea3e7fea324e8b5c6f4 upstream.

Key extensions (struct sadb_key) include a user-specified number of key
bits.  The kernel uses that number to determine how much key data to copy
out of the message in pfkey_msg2xfrm_state().

The length of the sadb_key message must be verified to be long enough,
even in the case of SADB_X_AALG_NULL.  Furthermore, the sadb_key_len value
must be long enough to include both the key data and the struct sadb_key
itself.

Introduce a helper function verify_key_len(), and call it from
parse_exthdrs() where other exthdr types are similarly checked for
correctness.

Signed-off-by: Kevin Easton <kevin@guarana.org>
Reported-by: syzbot+5022a34ca5a3d49b84223653fab632dfb7b4cf37@syzkaller.appspotmail.com
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Zubin Mithra <zsm@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/key/af_key.c | 45 +++++++++++++++++++++++++++++++++++----------
 1 file changed, 35 insertions(+), 10 deletions(-)

diff --git a/net/key/af_key.c b/net/key/af_key.c
index 15150b412930b..3ba903ff2bb08 100644
--- a/net/key/af_key.c
+++ b/net/key/af_key.c
@@ -437,6 +437,24 @@ static int verify_address_len(const void *p)
 	return 0;
 }
 
+static inline int sadb_key_len(const struct sadb_key *key)
+{
+	int key_bytes = DIV_ROUND_UP(key->sadb_key_bits, 8);
+
+	return DIV_ROUND_UP(sizeof(struct sadb_key) + key_bytes,
+			    sizeof(uint64_t));
+}
+
+static int verify_key_len(const void *p)
+{
+	const struct sadb_key *key = p;
+
+	if (sadb_key_len(key) > key->sadb_key_len)
+		return -EINVAL;
+
+	return 0;
+}
+
 static inline int pfkey_sec_ctx_len(const struct sadb_x_sec_ctx *sec_ctx)
 {
 	return DIV_ROUND_UP(sizeof(struct sadb_x_sec_ctx) +
@@ -533,16 +551,25 @@ static int parse_exthdrs(struct sk_buff *skb, const struct sadb_msg *hdr, void *
 				return -EINVAL;
 			if (ext_hdrs[ext_type-1] != NULL)
 				return -EINVAL;
-			if (ext_type == SADB_EXT_ADDRESS_SRC ||
-			    ext_type == SADB_EXT_ADDRESS_DST ||
-			    ext_type == SADB_EXT_ADDRESS_PROXY ||
-			    ext_type == SADB_X_EXT_NAT_T_OA) {
+			switch (ext_type) {
+			case SADB_EXT_ADDRESS_SRC:
+			case SADB_EXT_ADDRESS_DST:
+			case SADB_EXT_ADDRESS_PROXY:
+			case SADB_X_EXT_NAT_T_OA:
 				if (verify_address_len(p))
 					return -EINVAL;
-			}
-			if (ext_type == SADB_X_EXT_SEC_CTX) {
+				break;
+			case SADB_X_EXT_SEC_CTX:
 				if (verify_sec_ctx_len(p))
 					return -EINVAL;
+				break;
+			case SADB_EXT_KEY_AUTH:
+			case SADB_EXT_KEY_ENCRYPT:
+				if (verify_key_len(p))
+					return -EINVAL;
+				break;
+			default:
+				break;
 			}
 			ext_hdrs[ext_type-1] = (void *) p;
 		}
@@ -1111,14 +1138,12 @@ static struct xfrm_state * pfkey_msg2xfrm_state(struct net *net,
 	key = ext_hdrs[SADB_EXT_KEY_AUTH - 1];
 	if (key != NULL &&
 	    sa->sadb_sa_auth != SADB_X_AALG_NULL &&
-	    ((key->sadb_key_bits+7) / 8 == 0 ||
-	     (key->sadb_key_bits+7) / 8 > key->sadb_key_len * sizeof(uint64_t)))
+	    key->sadb_key_bits == 0)
 		return ERR_PTR(-EINVAL);
 	key = ext_hdrs[SADB_EXT_KEY_ENCRYPT-1];
 	if (key != NULL &&
 	    sa->sadb_sa_encrypt != SADB_EALG_NULL &&
-	    ((key->sadb_key_bits+7) / 8 == 0 ||
-	     (key->sadb_key_bits+7) / 8 > key->sadb_key_len * sizeof(uint64_t)))
+	    key->sadb_key_bits == 0)
 		return ERR_PTR(-EINVAL);
 
 	x = xfrm_state_alloc(net);

From 78a081549be6b2eb5bd6d46be753e936e18c0d41 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Tue, 4 Oct 2016 20:34:30 -0400
Subject: [PATCH 0545/1852] x86/crypto, x86/fpu: Remove X86_FEATURE_EAGER_FPU
 #ifdef from the crc32c code

commit 02f39b2379fb81557ae864ec8f85421c0250c954 upstream.

The crypto code was checking both use_eager_fpu() and
defined(X86_FEATURE_EAGER_FPU).  The latter was nonsensical, so
remove it.  This will avoid breakage when we remove
X86_FEATURE_EAGER_FPU.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Rik van Riel <riel@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: pbonzini@redhat.com
Link: http://lkml.kernel.org/r/1475627678-20788-2-git-send-email-riel@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/crypto/crc32c-intel_glue.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c
index 0e9871693f246..15f5c7675d426 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -58,16 +58,11 @@
 asmlinkage unsigned int crc_pcl(const u8 *buffer, int len,
 				unsigned int crc_init);
 static int crc32c_pcl_breakeven = CRC32C_PCL_BREAKEVEN_EAGERFPU;
-#if defined(X86_FEATURE_EAGER_FPU)
 #define set_pcl_breakeven_point()					\
 do {									\
 	if (!use_eager_fpu())						\
 		crc32c_pcl_breakeven = CRC32C_PCL_BREAKEVEN_NOEAGERFPU;	\
 } while (0)
-#else
-#define set_pcl_breakeven_point()					\
-	(crc32c_pcl_breakeven = CRC32C_PCL_BREAKEVEN_NOEAGERFPU)
-#endif
 #endif /* CONFIG_X86_64 */
 
 static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)

From b91da0da5b4a66e069ee35864a3029a75293cf86 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 16 Jan 2018 08:29:50 +0100
Subject: [PATCH 0546/1852] gpio: No NULL owner

commit 7d18f0a14aa6a0d6bad39111c1fb655f07f71d59 upstream.

Sometimes a GPIO is fetched with NULL as parent device, and
that is just fine. So under these circumstances, avoid using
dev_name() to provide a name for the GPIO line.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Daniel Rosenberg <drosen@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpio/gpiolib.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 745c51a1b6cbf..72048189b4e72 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2200,6 +2200,8 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
 	struct gpio_desc *desc = NULL;
 	int status;
 	enum gpio_lookup_flags lookupflags = 0;
+	/* Maybe we have a device name, maybe not */
+	const char *devname = dev ? dev_name(dev) : "?";
 
 	dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
 
@@ -2228,8 +2230,11 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
 		return desc;
 	}
 
-	/* If a connection label was passed use that, else use the device name as label */
-	status = gpiod_request(desc, con_id ? con_id : dev_name(dev));
+	/*
+	 * If a connection label was passed use that, else attempt to use
+	 * the device name as label
+	 */
+	status = gpiod_request(desc, con_id ? con_id : devname);
 	if (status < 0)
 		return ERR_PTR(status);
 

From 464b532441b9341a3e4a11897f8fa939e6204ca0 Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun, 27 Aug 2017 12:12:25 -0700
Subject: [PATCH 0547/1852] Clarify (and fix) MAX_LFS_FILESIZE macros

commit 0cc3b0ec23ce4c69e1e890ed2b8d2fa932b14aad upstream.

We have a MAX_LFS_FILESIZE macro that is meant to be filled in by
filesystems (and other IO targets) that know they are 64-bit clean and
don't have any 32-bit limits in their IO path.

It turns out that our 32-bit value for that limit was bogus.  On 32-bit,
the VM layer is limited by the page cache to only 32-bit index values,
but our logic for that was confusing and actually wrong.  We used to
define that value to

	(((loff_t)PAGE_SIZE << (BITS_PER_LONG-1))-1)

which is actually odd in several ways: it limits the index to 31 bits,
and then it limits files so that they can't have data in that last byte
of a page that has the highest 31-bit index (ie page index 0x7fffffff).

Neither of those limitations make sense.  The index is actually the full
32 bit unsigned value, and we can use that whole full page.  So the
maximum size of the file would logically be "PAGE_SIZE << BITS_PER_LONG".

However, we do wan tto avoid the maximum index, because we have code
that iterates over the page indexes, and we don't want that code to
overflow.  So the maximum size of a file on a 32-bit host should
actually be one page less than the full 32-bit index.

So the actual limit is ULONG_MAX << PAGE_SHIFT.  That means that we will
not actually be using the page of that last index (ULONG_MAX), but we
can grow a file up to that limit.

The wrong value of MAX_LFS_FILESIZE actually caused problems for Doug
Nazar, who was still using a 32-bit host, but with a 9.7TB 2 x RAID5
volume.  It turns out that our old MAX_LFS_FILESIZE was 8TiB (well, one
byte less), but the actual true VM limit is one page less than 16TiB.

This was invisible until commit c2a9737f45e2 ("vfs,mm: fix a dead loop
in truncate_inode_pages_range()"), which started applying that
MAX_LFS_FILESIZE limit to block devices too.

NOTE! On 64-bit, the page index isn't a limiter at all, and the limit is
actually just the offset type itself (loff_t), which is signed.  But for
clarity, on 64-bit, just use the maximum signed value, and don't make
people have to count the number of 'f' characters in the hex constant.

So just use LLONG_MAX for the 64-bit case.  That was what the value had
been before too, just written out as a hex constant.

Fixes: c2a9737f45e2 ("vfs,mm: fix a dead loop in truncate_inode_pages_range()")
Reported-and-tested-by: Doug Nazar <nazard@nazar.ca>
Cc: Andreas Dilger <adilger@dilger.ca>
Cc: Mark Fasheh <mfasheh@versity.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Dave Kleikamp <shaggy@kernel.org>
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rafael Tinoco <rafael.tinoco@linaro.org>
[backported to 4.4.y due to requests of failed LTP tests - gregkh]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/fs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/linux/fs.h b/include/linux/fs.h
index cfb6ff61df309..b7ce5f44d8c27 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -950,9 +950,9 @@ static inline struct file *get_file(struct file *f)
 /* Page cache limit. The filesystems should put that into their s_maxbytes 
    limits, otherwise bad things can happen in VM. */ 
 #if BITS_PER_LONG==32
-#define MAX_LFS_FILESIZE	(((loff_t)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1) 
+#define MAX_LFS_FILESIZE	((loff_t)ULONG_MAX << PAGE_SHIFT)
 #elif BITS_PER_LONG==64
-#define MAX_LFS_FILESIZE 	((loff_t)0x7fffffffffffffffLL)
+#define MAX_LFS_FILESIZE 	((loff_t)LLONG_MAX)
 #endif
 
 #define FL_POSIX	1

From fc7ffc9a339e9be08f228c04f634086985d804df Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Wed, 6 Jun 2018 16:43:02 +0200
Subject: [PATCH 0548/1852] KVM: x86: introduce linear_{read,write}_system

commit 79367a65743975e5cac8d24d08eccc7fdae832b0 upstream.

Wrap the common invocation of ctxt->ops->read_std and ctxt->ops->write_std, so
as to have a smaller patch when the functions grow another argument.

Fixes: 129a72a0d3c8 ("KVM: x86: Introduce segmented_write_std", 2017-01-12)
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/emulate.c | 64 +++++++++++++++++++++---------------------
 1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 8864fec63a206..c27e09ee86691 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -790,6 +790,19 @@ static inline int jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
 	return assign_eip_near(ctxt, ctxt->_eip + rel);
 }
 
+static int linear_read_system(struct x86_emulate_ctxt *ctxt, ulong linear,
+			      void *data, unsigned size)
+{
+	return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception);
+}
+
+static int linear_write_system(struct x86_emulate_ctxt *ctxt,
+			       ulong linear, void *data,
+			       unsigned int size)
+{
+	return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception);
+}
+
 static int segmented_read_std(struct x86_emulate_ctxt *ctxt,
 			      struct segmented_address addr,
 			      void *data,
@@ -1488,8 +1501,7 @@ static int read_interrupt_descriptor(struct x86_emulate_ctxt *ctxt,
 		return emulate_gp(ctxt, index << 3 | 0x2);
 
 	addr = dt.address + index * 8;
-	return ctxt->ops->read_std(ctxt, addr, desc, sizeof *desc,
-				   &ctxt->exception);
+	return linear_read_system(ctxt, addr, desc, sizeof *desc);
 }
 
 static void get_descriptor_table_ptr(struct x86_emulate_ctxt *ctxt,
@@ -1552,8 +1564,7 @@ static int read_segment_descriptor(struct x86_emulate_ctxt *ctxt,
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
 
-	return ctxt->ops->read_std(ctxt, *desc_addr_p, desc, sizeof(*desc),
-				   &ctxt->exception);
+	return linear_read_system(ctxt, *desc_addr_p, desc, sizeof(*desc));
 }
 
 /* allowed just for 8 bytes segments */
@@ -1567,8 +1578,7 @@ static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt,
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
 
-	return ctxt->ops->write_std(ctxt, addr, desc, sizeof *desc,
-				    &ctxt->exception);
+	return linear_write_system(ctxt, addr, desc, sizeof *desc);
 }
 
 static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
@@ -1729,8 +1739,7 @@ static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
 				return ret;
 		}
 	} else if (ctxt->mode == X86EMUL_MODE_PROT64) {
-		ret = ctxt->ops->read_std(ctxt, desc_addr+8, &base3,
-				sizeof(base3), &ctxt->exception);
+		ret = linear_read_system(ctxt, desc_addr+8, &base3, sizeof(base3));
 		if (ret != X86EMUL_CONTINUE)
 			return ret;
 		if (is_noncanonical_address(get_desc_base(&seg_desc) |
@@ -2043,11 +2052,11 @@ static int __emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq)
 	eip_addr = dt.address + (irq << 2);
 	cs_addr = dt.address + (irq << 2) + 2;
 
-	rc = ops->read_std(ctxt, cs_addr, &cs, 2, &ctxt->exception);
+	rc = linear_read_system(ctxt, cs_addr, &cs, 2);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
 
-	rc = ops->read_std(ctxt, eip_addr, &eip, 2, &ctxt->exception);
+	rc = linear_read_system(ctxt, eip_addr, &eip, 2);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
 
@@ -3025,35 +3034,30 @@ static int task_switch_16(struct x86_emulate_ctxt *ctxt,
 			  u16 tss_selector, u16 old_tss_sel,
 			  ulong old_tss_base, struct desc_struct *new_desc)
 {
-	const struct x86_emulate_ops *ops = ctxt->ops;
 	struct tss_segment_16 tss_seg;
 	int ret;
 	u32 new_tss_base = get_desc_base(new_desc);
 
-	ret = ops->read_std(ctxt, old_tss_base, &tss_seg, sizeof tss_seg,
-			    &ctxt->exception);
+	ret = linear_read_system(ctxt, old_tss_base, &tss_seg, sizeof tss_seg);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
 	save_state_to_tss16(ctxt, &tss_seg);
 
-	ret = ops->write_std(ctxt, old_tss_base, &tss_seg, sizeof tss_seg,
-			     &ctxt->exception);
+	ret = linear_write_system(ctxt, old_tss_base, &tss_seg, sizeof tss_seg);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
-	ret = ops->read_std(ctxt, new_tss_base, &tss_seg, sizeof tss_seg,
-			    &ctxt->exception);
+	ret = linear_read_system(ctxt, new_tss_base, &tss_seg, sizeof tss_seg);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
 	if (old_tss_sel != 0xffff) {
 		tss_seg.prev_task_link = old_tss_sel;
 
-		ret = ops->write_std(ctxt, new_tss_base,
-				     &tss_seg.prev_task_link,
-				     sizeof tss_seg.prev_task_link,
-				     &ctxt->exception);
+		ret = linear_write_system(ctxt, new_tss_base,
+					  &tss_seg.prev_task_link,
+					  sizeof tss_seg.prev_task_link);
 		if (ret != X86EMUL_CONTINUE)
 			return ret;
 	}
@@ -3169,38 +3173,34 @@ static int task_switch_32(struct x86_emulate_ctxt *ctxt,
 			  u16 tss_selector, u16 old_tss_sel,
 			  ulong old_tss_base, struct desc_struct *new_desc)
 {
-	const struct x86_emulate_ops *ops = ctxt->ops;
 	struct tss_segment_32 tss_seg;
 	int ret;
 	u32 new_tss_base = get_desc_base(new_desc);
 	u32 eip_offset = offsetof(struct tss_segment_32, eip);
 	u32 ldt_sel_offset = offsetof(struct tss_segment_32, ldt_selector);
 
-	ret = ops->read_std(ctxt, old_tss_base, &tss_seg, sizeof tss_seg,
-			    &ctxt->exception);
+	ret = linear_read_system(ctxt, old_tss_base, &tss_seg, sizeof tss_seg);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
 	save_state_to_tss32(ctxt, &tss_seg);
 
 	/* Only GP registers and segment selectors are saved */
-	ret = ops->write_std(ctxt, old_tss_base + eip_offset, &tss_seg.eip,
-			     ldt_sel_offset - eip_offset, &ctxt->exception);
+	ret = linear_write_system(ctxt, old_tss_base + eip_offset, &tss_seg.eip,
+				  ldt_sel_offset - eip_offset);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
-	ret = ops->read_std(ctxt, new_tss_base, &tss_seg, sizeof tss_seg,
-			    &ctxt->exception);
+	ret = linear_read_system(ctxt, new_tss_base, &tss_seg, sizeof tss_seg);
 	if (ret != X86EMUL_CONTINUE)
 		return ret;
 
 	if (old_tss_sel != 0xffff) {
 		tss_seg.prev_task_link = old_tss_sel;
 
-		ret = ops->write_std(ctxt, new_tss_base,
-				     &tss_seg.prev_task_link,
-				     sizeof tss_seg.prev_task_link,
-				     &ctxt->exception);
+		ret = linear_write_system(ctxt, new_tss_base,
+					  &tss_seg.prev_task_link,
+					  sizeof tss_seg.prev_task_link);
 		if (ret != X86EMUL_CONTINUE)
 			return ret;
 	}

From 81b674d0b3f376d30b36e8735ff5070a8499a3e1 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Wed, 6 Jun 2018 17:37:49 +0200
Subject: [PATCH 0549/1852] KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
 kvm_write_guest_virt_system

commit ce14e868a54edeb2e30cb7a7b104a2fc4b9d76ca upstream.

Int the next patch the emulator's .read_std and .write_std callbacks will
grow another argument, which is not needed in kvm_read_guest_virt and
kvm_write_guest_virt_system's callers.  Since we have to make separate
functions, let's give the currently existing names a nicer interface, too.

Fixes: 129a72a0d3c8 ("KVM: x86: Introduce segmented_write_std", 2017-01-12)
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/vmx.c | 23 ++++++++++-------------
 arch/x86/kvm/x86.c | 39 ++++++++++++++++++++++++++-------------
 arch/x86/kvm/x86.h |  4 ++--
 3 files changed, 38 insertions(+), 28 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a750fc7c74583..63c44a9bf6bbb 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6692,8 +6692,7 @@ static int nested_vmx_check_vmptr(struct kvm_vcpu *vcpu, int exit_reason,
 			vmcs_read32(VMX_INSTRUCTION_INFO), false, &gva))
 		return 1;
 
-	if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
-				sizeof(vmptr), &e)) {
+	if (kvm_read_guest_virt(vcpu, gva, &vmptr, sizeof(vmptr), &e)) {
 		kvm_inject_page_fault(vcpu, &e);
 		return 1;
 	}
@@ -7211,8 +7210,8 @@ static int handle_vmread(struct kvm_vcpu *vcpu)
 				vmx_instruction_info, true, &gva))
 			return 1;
 		/* _system ok, as nested_vmx_check_permission verified cpl=0 */
-		kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, gva,
-			     &field_value, (is_long_mode(vcpu) ? 8 : 4), NULL);
+		kvm_write_guest_virt_system(vcpu, gva, &field_value,
+					    (is_long_mode(vcpu) ? 8 : 4), NULL);
 	}
 
 	nested_vmx_succeed(vcpu);
@@ -7247,8 +7246,8 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu)
 		if (get_vmx_mem_address(vcpu, exit_qualification,
 				vmx_instruction_info, false, &gva))
 			return 1;
-		if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
-			   &field_value, (is_64_bit_mode(vcpu) ? 8 : 4), &e)) {
+		if (kvm_read_guest_virt(vcpu, gva, &field_value,
+					(is_64_bit_mode(vcpu) ? 8 : 4), &e)) {
 			kvm_inject_page_fault(vcpu, &e);
 			return 1;
 		}
@@ -7338,9 +7337,9 @@ static int handle_vmptrst(struct kvm_vcpu *vcpu)
 			vmx_instruction_info, true, &vmcs_gva))
 		return 1;
 	/* ok to use *_system, as nested_vmx_check_permission verified cpl=0 */
-	if (kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, vmcs_gva,
-				 (void *)&to_vmx(vcpu)->nested.current_vmptr,
-				 sizeof(u64), &e)) {
+	if (kvm_write_guest_virt_system(vcpu, vmcs_gva,
+					(void *)&to_vmx(vcpu)->nested.current_vmptr,
+					sizeof(u64), &e)) {
 		kvm_inject_page_fault(vcpu, &e);
 		return 1;
 	}
@@ -7394,8 +7393,7 @@ static int handle_invept(struct kvm_vcpu *vcpu)
 	if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
 			vmx_instruction_info, false, &gva))
 		return 1;
-	if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &operand,
-				sizeof(operand), &e)) {
+	if (kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e)) {
 		kvm_inject_page_fault(vcpu, &e);
 		return 1;
 	}
@@ -7454,8 +7452,7 @@ static int handle_invvpid(struct kvm_vcpu *vcpu)
 	if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
 			vmx_instruction_info, false, &gva))
 		return 1;
-	if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vpid,
-				sizeof(u32), &e)) {
+	if (kvm_read_guest_virt(vcpu, gva, &vpid, sizeof(u32), &e)) {
 		kvm_inject_page_fault(vcpu, &e);
 		return 1;
 	}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 9cea09597d66c..b6238ce9806d0 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -4245,11 +4245,10 @@ static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
 	return X86EMUL_CONTINUE;
 }
 
-int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
+int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
 			       gva_t addr, void *val, unsigned int bytes,
 			       struct x86_exception *exception)
 {
-	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
 	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
 
 	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
@@ -4257,9 +4256,9 @@ int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
 }
 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
 
-static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
-				      gva_t addr, void *val, unsigned int bytes,
-				      struct x86_exception *exception)
+static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
+			     gva_t addr, void *val, unsigned int bytes,
+			     struct x86_exception *exception)
 {
 	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
 	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
@@ -4274,18 +4273,16 @@ static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
 	return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
 }
 
-int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
-				       gva_t addr, void *val,
-				       unsigned int bytes,
-				       struct x86_exception *exception)
+static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
+				      struct kvm_vcpu *vcpu, u32 access,
+				      struct x86_exception *exception)
 {
-	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
 	void *data = val;
 	int r = X86EMUL_CONTINUE;
 
 	while (bytes) {
 		gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
-							     PFERR_WRITE_MASK,
+							     access,
 							     exception);
 		unsigned offset = addr & (PAGE_SIZE-1);
 		unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
@@ -4306,6 +4303,22 @@ int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
 out:
 	return r;
 }
+
+static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
+			      unsigned int bytes, struct x86_exception *exception)
+{
+	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
+
+	return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
+					   PFERR_WRITE_MASK, exception);
+}
+
+int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
+				unsigned int bytes, struct x86_exception *exception)
+{
+	return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
+					   PFERR_WRITE_MASK, exception);
+}
 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
 
 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
@@ -5025,8 +5038,8 @@ static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_fla
 static const struct x86_emulate_ops emulate_ops = {
 	.read_gpr            = emulator_read_gpr,
 	.write_gpr           = emulator_write_gpr,
-	.read_std            = kvm_read_guest_virt_system,
-	.write_std           = kvm_write_guest_virt_system,
+	.read_std            = emulator_read_std,
+	.write_std           = emulator_write_std,
 	.read_phys           = kvm_read_guest_phys_system,
 	.fetch               = kvm_fetch_guest_virt,
 	.read_emulated       = emulator_read_emulated,
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index f2afa5fe48a6d..53a750a10598d 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -164,11 +164,11 @@ int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
 
 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
 
-int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
+int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
 	gva_t addr, void *val, unsigned int bytes,
 	struct x86_exception *exception);
 
-int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
+int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
 	gva_t addr, void *val, unsigned int bytes,
 	struct x86_exception *exception);
 

From 493cc564181aa47f8bce5dbae810d12cf9b4442d Mon Sep 17 00:00:00 2001
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Thu, 10 May 2018 08:41:13 +0200
Subject: [PATCH 0550/1852] serial: samsung: fix maxburst parameter for DMA
 transactions

commit aa2f80e752c75e593b3820f42c416ed9458fa73e upstream.

The best granularity of residue that DMA engine can report is in the BURST
units, so the serial driver must use MAXBURST = 1 and DMA_SLAVE_BUSWIDTH_1_BYTE
if it relies on exact number of bytes transferred by DMA engine.

Fixes: 62c37eedb74c ("serial: samsung: add dma reqest/release functions")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/samsung.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 312343beb2490..4d532a085db9e 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -860,15 +860,12 @@ static int s3c24xx_serial_request_dma(struct s3c24xx_uart_port *p)
 	dma->rx_conf.direction		= DMA_DEV_TO_MEM;
 	dma->rx_conf.src_addr_width	= DMA_SLAVE_BUSWIDTH_1_BYTE;
 	dma->rx_conf.src_addr		= p->port.mapbase + S3C2410_URXH;
-	dma->rx_conf.src_maxburst	= 16;
+	dma->rx_conf.src_maxburst	= 1;
 
 	dma->tx_conf.direction		= DMA_MEM_TO_DEV;
 	dma->tx_conf.dst_addr_width	= DMA_SLAVE_BUSWIDTH_1_BYTE;
 	dma->tx_conf.dst_addr		= p->port.mapbase + S3C2410_UTXH;
-	if (dma_get_cache_alignment() >= 16)
-		dma->tx_conf.dst_maxburst = 16;
-	else
-		dma->tx_conf.dst_maxburst = 1;
+	dma->tx_conf.dst_maxburst	= 1;
 
 	dma_cap_zero(mask);
 	dma_cap_set(DMA_SLAVE, mask);

From ba9ce371a1477697b2c7f6459ce6f6d2d7eba368 Mon Sep 17 00:00:00 2001
From: Gil Kupfer <gilkup@gmail.com>
Date: Fri, 1 Jun 2018 00:47:47 -0700
Subject: [PATCH 0551/1852] vmw_balloon: fixing double free when batching mode
 is off

commit b23220fe054e92f616b82450fae8cd3ab176cc60 upstream.

The balloon.page field is used for two different purposes if batching is
on or off. If batching is on, the field point to the page which is used
to communicate with with the hypervisor. If it is off, balloon.page
points to the page that is about to be (un)locked.

Unfortunately, this dual-purpose of the field introduced a bug: when the
balloon is popped (e.g., when the machine is reset or the balloon driver
is explicitly removed), the balloon driver frees, unconditionally, the
page that is held in balloon.page.  As a result, if batching is
disabled, this leads to double freeing the last page that is sent to the
hypervisor.

The following error occurs during rmmod when kernel checkers are on, and
the balloon is not empty:

[   42.307653] ------------[ cut here ]------------
[   42.307657] Kernel BUG at ffffffffba1e4b28 [verbose debug info unavailable]
[   42.307720] invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC
[   42.312512] Modules linked in: vmw_vsock_vmci_transport vsock ppdev joydev vmw_balloon(-) input_leds serio_raw vmw_vmci parport_pc shpchp parport i2c_piix4 nfit mac_hid autofs4 vmwgfx drm_kms_helper hid_generic syscopyarea sysfillrect usbhid sysimgblt fb_sys_fops hid ttm mptspi scsi_transport_spi ahci mptscsih drm psmouse vmxnet3 libahci mptbase pata_acpi
[   42.312766] CPU: 10 PID: 1527 Comm: rmmod Not tainted 4.12.0+ #5
[   42.312803] Hardware name: VMware, Inc. VMware Virtual Platform/440BX Desktop Reference Platform, BIOS 6.00 09/30/2016
[   42.313042] task: ffff9bf9680f8000 task.stack: ffffbfefc1638000
[   42.313290] RIP: 0010:__free_pages+0x38/0x40
[   42.313510] RSP: 0018:ffffbfefc163be98 EFLAGS: 00010246
[   42.313731] RAX: 000000000000003e RBX: ffffffffc02b9720 RCX: 0000000000000006
[   42.313972] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff9bf97e08e0a0
[   42.314201] RBP: ffffbfefc163be98 R08: 0000000000000000 R09: 0000000000000000
[   42.314435] R10: 0000000000000000 R11: 0000000000000000 R12: ffffffffc02b97e4
[   42.314505] R13: ffffffffc02b9748 R14: ffffffffc02b9728 R15: 0000000000000200
[   42.314550] FS:  00007f3af5fec700(0000) GS:ffff9bf97e080000(0000) knlGS:0000000000000000
[   42.314599] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   42.314635] CR2: 00007f44f6f4ab24 CR3: 00000003a7d12000 CR4: 00000000000006e0
[   42.314864] Call Trace:
[   42.315774]  vmballoon_pop+0x102/0x130 [vmw_balloon]
[   42.315816]  vmballoon_exit+0x42/0xd64 [vmw_balloon]
[   42.315853]  SyS_delete_module+0x1e2/0x250
[   42.315891]  entry_SYSCALL_64_fastpath+0x23/0xc2
[   42.315924] RIP: 0033:0x7f3af5b0e8e7
[   42.315949] RSP: 002b:00007fffe6ce0148 EFLAGS: 00000206 ORIG_RAX: 00000000000000b0
[   42.315996] RAX: ffffffffffffffda RBX: 000055be676401e0 RCX: 00007f3af5b0e8e7
[   42.316951] RDX: 000000000000000a RSI: 0000000000000800 RDI: 000055be67640248
[   42.317887] RBP: 0000000000000003 R08: 0000000000000000 R09: 1999999999999999
[   42.318845] R10: 0000000000000883 R11: 0000000000000206 R12: 00007fffe6cdf130
[   42.319755] R13: 0000000000000000 R14: 0000000000000000 R15: 000055be676401e0
[   42.320606] Code: c0 74 1c f0 ff 4f 1c 74 02 5d c3 85 f6 74 07 e8 0f d8 ff ff 5d c3 31 f6 e8 c6 fb ff ff 5d c3 48 c7 c6 c8 0f c5 ba e8 58 be 02 00 <0f> 0b 66 0f 1f 44 00 00 66 66 66 66 90 48 85 ff 75 01 c3 55 48
[   42.323462] RIP: __free_pages+0x38/0x40 RSP: ffffbfefc163be98
[   42.325735] ---[ end trace 872e008e33f81508 ]---

To solve the bug, we eliminate the dual purpose of balloon.page.

Fixes: f220a80f0c2e ("VMware balloon: add batching to the vmw_balloon.")
Cc: stable@vger.kernel.org
Reported-by: Oleksandr Natalenko <onatalen@redhat.com>
Signed-off-by: Gil Kupfer <gilkup@gmail.com>
Signed-off-by: Nadav Amit <namit@vmware.com>
Reviewed-by: Xavier Deguillard <xdeguillard@vmware.com>
Tested-by: Oleksandr Natalenko <oleksandr@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/misc/vmw_balloon.c | 23 +++++++----------------
 1 file changed, 7 insertions(+), 16 deletions(-)

diff --git a/drivers/misc/vmw_balloon.c b/drivers/misc/vmw_balloon.c
index 1e688bfec5672..fe90b7e044279 100644
--- a/drivers/misc/vmw_balloon.c
+++ b/drivers/misc/vmw_balloon.c
@@ -576,15 +576,9 @@ static void vmballoon_pop(struct vmballoon *b)
 		}
 	}
 
-	if (b->batch_page) {
-		vunmap(b->batch_page);
-		b->batch_page = NULL;
-	}
-
-	if (b->page) {
-		__free_page(b->page);
-		b->page = NULL;
-	}
+	/* Clearing the batch_page unconditionally has no adverse effect */
+	free_page((unsigned long)b->batch_page);
+	b->batch_page = NULL;
 }
 
 /*
@@ -991,16 +985,13 @@ static const struct vmballoon_ops vmballoon_batched_ops = {
 
 static bool vmballoon_init_batching(struct vmballoon *b)
 {
-	b->page = alloc_page(VMW_PAGE_ALLOC_NOSLEEP);
-	if (!b->page)
-		return false;
+	struct page *page;
 
-	b->batch_page = vmap(&b->page, 1, VM_MAP, PAGE_KERNEL);
-	if (!b->batch_page) {
-		__free_page(b->page);
+	page = alloc_page(GFP_KERNEL | __GFP_ZERO);
+	if (!page)
 		return false;
-	}
 
+	b->batch_page = page_address(page);
 	return true;
 }
 

From e0152a86b58dea4efe1b36a8b098317478f0bfa1 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Wed, 6 Jun 2018 17:38:09 +0200
Subject: [PATCH 0552/1852] kvm: x86: use correct privilege level for
 sgdt/sidt/fxsave/fxrstor access

commit 3c9fa24ca7c9c47605672916491f79e8ccacb9e6 upstream.

The functions that were used in the emulation of fxrstor, fxsave, sgdt and
sidt were originally meant for task switching, and as such they did not
check privilege levels.  This is very bad when the same functions are used
in the emulation of unprivileged instructions.  This is CVE-2018-10853.

The obvious fix is to add a new argument to ops->read_std and ops->write_std,
which decides whether the access is a "system" access or should use the
processor's CPL.

Fixes: 129a72a0d3c8 ("KVM: x86: Introduce segmented_write_std", 2017-01-12)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/kvm_emulate.h |  6 ++++--
 arch/x86/kvm/emulate.c             | 12 ++++++------
 arch/x86/kvm/x86.c                 | 18 ++++++++++++++----
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index fc3c7e49c8e48..ae357d0afc91f 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -105,11 +105,12 @@ struct x86_emulate_ops {
 	 *  @addr:  [IN ] Linear address from which to read.
 	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
 	 *  @bytes: [IN ] Number of bytes to read from memory.
+	 *  @system:[IN ] Whether the access is forced to be at CPL0.
 	 */
 	int (*read_std)(struct x86_emulate_ctxt *ctxt,
 			unsigned long addr, void *val,
 			unsigned int bytes,
-			struct x86_exception *fault);
+			struct x86_exception *fault, bool system);
 
 	/*
 	 * read_phys: Read bytes of standard (non-emulated/special) memory.
@@ -127,10 +128,11 @@ struct x86_emulate_ops {
 	 *  @addr:  [IN ] Linear address to which to write.
 	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
 	 *  @bytes: [IN ] Number of bytes to write to memory.
+	 *  @system:[IN ] Whether the access is forced to be at CPL0.
 	 */
 	int (*write_std)(struct x86_emulate_ctxt *ctxt,
 			 unsigned long addr, void *val, unsigned int bytes,
-			 struct x86_exception *fault);
+			 struct x86_exception *fault, bool system);
 	/*
 	 * fetch: Read bytes of standard (non-emulated/special) memory.
 	 *        Used for instruction fetch.
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index c27e09ee86691..f1507626ed364 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -793,14 +793,14 @@ static inline int jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
 static int linear_read_system(struct x86_emulate_ctxt *ctxt, ulong linear,
 			      void *data, unsigned size)
 {
-	return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception);
+	return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception, true);
 }
 
 static int linear_write_system(struct x86_emulate_ctxt *ctxt,
 			       ulong linear, void *data,
 			       unsigned int size)
 {
-	return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception);
+	return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception, true);
 }
 
 static int segmented_read_std(struct x86_emulate_ctxt *ctxt,
@@ -814,7 +814,7 @@ static int segmented_read_std(struct x86_emulate_ctxt *ctxt,
 	rc = linearize(ctxt, addr, size, false, &linear);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
-	return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception);
+	return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception, false);
 }
 
 static int segmented_write_std(struct x86_emulate_ctxt *ctxt,
@@ -828,7 +828,7 @@ static int segmented_write_std(struct x86_emulate_ctxt *ctxt,
 	rc = linearize(ctxt, addr, size, true, &linear);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
-	return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception);
+	return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception, false);
 }
 
 /*
@@ -2900,12 +2900,12 @@ static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt,
 #ifdef CONFIG_X86_64
 	base |= ((u64)base3) << 32;
 #endif
-	r = ops->read_std(ctxt, base + 102, &io_bitmap_ptr, 2, NULL);
+	r = ops->read_std(ctxt, base + 102, &io_bitmap_ptr, 2, NULL, true);
 	if (r != X86EMUL_CONTINUE)
 		return false;
 	if (io_bitmap_ptr + port/8 > desc_limit_scaled(&tr_seg))
 		return false;
-	r = ops->read_std(ctxt, base + io_bitmap_ptr + port/8, &perm, 2, NULL);
+	r = ops->read_std(ctxt, base + io_bitmap_ptr + port/8, &perm, 2, NULL, true);
 	if (r != X86EMUL_CONTINUE)
 		return false;
 	if ((perm >> bit_idx) & mask)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index b6238ce9806d0..53d43d22a84b1 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -4258,10 +4258,15 @@ EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
 
 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
 			     gva_t addr, void *val, unsigned int bytes,
-			     struct x86_exception *exception)
+			     struct x86_exception *exception, bool system)
 {
 	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
-	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
+	u32 access = 0;
+
+	if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
+		access |= PFERR_USER_MASK;
+
+	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
 }
 
 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
@@ -4305,12 +4310,17 @@ static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes
 }
 
 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
-			      unsigned int bytes, struct x86_exception *exception)
+			      unsigned int bytes, struct x86_exception *exception,
+			      bool system)
 {
 	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
+	u32 access = PFERR_WRITE_MASK;
+
+	if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
+		access |= PFERR_USER_MASK;
 
 	return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
-					   PFERR_WRITE_MASK, exception);
+					   access, exception);
 }
 
 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,

From b04984892fbb73f2b8a24198834a8ac7212939a5 Mon Sep 17 00:00:00 2001
From: Ethan Lee <flibitijibibo@gmail.com>
Date: Thu, 31 May 2018 16:13:17 -0700
Subject: [PATCH 0553/1852] Input: goodix - add new ACPI id for GPD Win 2 touch
 screen

commit 5ca4d1ae9bad0f59bd6f851c39b19f5366953666 upstream.

GPD Win 2 Website: http://www.gpd.hk/gpdwin2.asp

Tested on a unit from the first production run sent to Indiegogo backers

Signed-off-by: Ethan Lee <flibitijibibo@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/touchscreen/goodix.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
index 4d113c9e4b771..7bf2597ce44c6 100644
--- a/drivers/input/touchscreen/goodix.c
+++ b/drivers/input/touchscreen/goodix.c
@@ -425,6 +425,7 @@ MODULE_DEVICE_TABLE(i2c, goodix_ts_id);
 #ifdef CONFIG_ACPI
 static const struct acpi_device_id goodix_acpi_match[] = {
 	{ "GDIX1001", 0 },
+	{ "GDIX1002", 0 },
 	{ }
 };
 MODULE_DEVICE_TABLE(acpi, goodix_acpi_match);

From fe30bb4842b050b14a372b819b8f6e9a88b07209 Mon Sep 17 00:00:00 2001
From: Johannes Wienke <languitar@semipol.de>
Date: Mon, 4 Jun 2018 13:37:26 -0700
Subject: [PATCH 0554/1852] Input: elan_i2c - add ELAN0612 (Lenovo v330 14IKB)
 ACPI ID

commit e6e7e9cd8eed0e18217c899843bffbe8c7dae564 upstream.

Add ELAN0612 to the list of supported touchpads; this ID is used in Lenovo
v330 14IKB devices.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=199253
Signed-off-by: Johannes Wienke <languitar@semipol.de>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c_core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index 3851d5715772f..aeb8250ab0793 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1249,6 +1249,7 @@ static const struct acpi_device_id elan_acpi_id[] = {
 	{ "ELAN060B", 0 },
 	{ "ELAN060C", 0 },
 	{ "ELAN0611", 0 },
+	{ "ELAN0612", 0 },
 	{ "ELAN1000", 0 },
 	{ }
 };

From e46201be48e7bd63102ae6d1d6aa0e32bab602e4 Mon Sep 17 00:00:00 2001
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Thu, 3 May 2018 22:29:29 +1000
Subject: [PATCH 0555/1852] crypto: vmx - Remove overly verbose printk from AES
 init routines

commit 1411b5218adbcf1d45ddb260db5553c52e8d917c upstream.

In the vmx AES init routines we do a printk(KERN_INFO ...) to report
the fallback implementation we're using.

However with a slow console this can significantly affect the speed of
crypto operations. Using 'cryptsetup benchmark' the removal of the
printk() leads to a ~5x speedup for aes-cbc decryption.

So remove them.

Fixes: 8676590a1593 ("crypto: vmx - Adding AES routines for VMX module")
Fixes: 8c755ace357c ("crypto: vmx - Adding CBC routines for VMX module")
Fixes: 4f7f60d312b3 ("crypto: vmx - Adding CTR routines for VMX module")
Fixes: cc333cd68dfa ("crypto: vmx - Adding GHASH routines for VMX module")
Cc: stable@vger.kernel.org # v4.1+
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/crypto/vmx/aes.c     | 2 --
 drivers/crypto/vmx/aes_cbc.c | 2 --
 drivers/crypto/vmx/aes_ctr.c | 2 --
 drivers/crypto/vmx/ghash.c   | 2 --
 4 files changed, 8 deletions(-)

diff --git a/drivers/crypto/vmx/aes.c b/drivers/crypto/vmx/aes.c
index 263af709e5360..b907e4b1bbe22 100644
--- a/drivers/crypto/vmx/aes.c
+++ b/drivers/crypto/vmx/aes.c
@@ -53,8 +53,6 @@ static int p8_aes_init(struct crypto_tfm *tfm)
 		       alg, PTR_ERR(fallback));
 		return PTR_ERR(fallback);
 	}
-	printk(KERN_INFO "Using '%s' as fallback implementation.\n",
-	       crypto_tfm_alg_driver_name((struct crypto_tfm *) fallback));
 
 	crypto_cipher_set_flags(fallback,
 				crypto_cipher_get_flags((struct
diff --git a/drivers/crypto/vmx/aes_cbc.c b/drivers/crypto/vmx/aes_cbc.c
index 3f8bb9a40df12..9506e8693c819 100644
--- a/drivers/crypto/vmx/aes_cbc.c
+++ b/drivers/crypto/vmx/aes_cbc.c
@@ -55,8 +55,6 @@ static int p8_aes_cbc_init(struct crypto_tfm *tfm)
 		       alg, PTR_ERR(fallback));
 		return PTR_ERR(fallback);
 	}
-	printk(KERN_INFO "Using '%s' as fallback implementation.\n",
-	       crypto_tfm_alg_driver_name((struct crypto_tfm *) fallback));
 
 	crypto_blkcipher_set_flags(
 		fallback,
diff --git a/drivers/crypto/vmx/aes_ctr.c b/drivers/crypto/vmx/aes_ctr.c
index d83ab4bac8b12..7d070201b3d30 100644
--- a/drivers/crypto/vmx/aes_ctr.c
+++ b/drivers/crypto/vmx/aes_ctr.c
@@ -53,8 +53,6 @@ static int p8_aes_ctr_init(struct crypto_tfm *tfm)
 		       alg, PTR_ERR(fallback));
 		return PTR_ERR(fallback);
 	}
-	printk(KERN_INFO "Using '%s' as fallback implementation.\n",
-	       crypto_tfm_alg_driver_name((struct crypto_tfm *) fallback));
 
 	crypto_blkcipher_set_flags(
 		fallback,
diff --git a/drivers/crypto/vmx/ghash.c b/drivers/crypto/vmx/ghash.c
index 9cb3a0b715e23..84b9389bf1edb 100644
--- a/drivers/crypto/vmx/ghash.c
+++ b/drivers/crypto/vmx/ghash.c
@@ -64,8 +64,6 @@ static int p8_ghash_init_tfm(struct crypto_tfm *tfm)
 		       alg, PTR_ERR(fallback));
 		return PTR_ERR(fallback);
 	}
-	printk(KERN_INFO "Using '%s' as fallback implementation.\n",
-	       crypto_tfm_alg_driver_name(crypto_shash_tfm(fallback)));
 
 	crypto_shash_set_flags(fallback,
 			       crypto_shash_get_flags((struct crypto_shash

From 59ea1ced23f52925cad53f340faea7fa40e69f39 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sat, 16 Jun 2018 09:54:27 +0200
Subject: [PATCH 0556/1852] Linux 4.4.138

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c3c5f2a4e9e0b..5e639f9f601de 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 137
+SUBLEVEL = 138
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From d87f531b6d0dc11f2f83ad4e25d909710e0c00aa Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 9 Jul 2018 09:45:34 +0800
Subject: [PATCH 0557/1852] drm/panel: simple-panel: no need to send off
 commands in panel_simple_shutdown

Change-Id: Id0129f899efe6500858ad0aa0aefcfbf5aa101f6
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index ce93af189b050..daf891cd314f4 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -929,7 +929,14 @@ static void panel_simple_shutdown(struct device *dev)
 	struct panel_simple *panel = dev_get_drvdata(dev);
 
 	panel_simple_disable(&panel->base);
-	panel_simple_unprepare(&panel->base);
+
+	if (panel->reset_gpio)
+		gpiod_direction_output(panel->reset_gpio, 1);
+
+	if (panel->enable_gpio)
+		gpiod_direction_output(panel->enable_gpio, 0);
+
+	panel_simple_regulator_disable(&panel->base);
 }
 
 static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {

From 3cbd75c9847e31a14999075029021cd9c76e9759 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 6 Jul 2018 19:56:09 +0800
Subject: [PATCH 0558/1852] phy: rockchip: rockchip-inno-usb2: fix lock warning

If the usb otg work as host mode or work as peripheral mode
with vbus always on, the otg_sm_work won't be initialized,
so flush the otg_sm_work in rockchip_usb2phy_exit() will
casuse the following lock warning:

[<ffffff800808b1e0>] dump_backtrace+0x0/0x1ec
[<ffffff800808b3e0>] show_stack+0x14/0x1c
[<ffffff8008403f3c>] dump_stack+0xb8/0xf4
[<ffffff8008107f40>] __lock_acquire+0x670/0x1984
[<ffffff8008109a60>] lock_acquire+0x1a4/0x264
[<ffffff8008129d2c>] del_timer_sync+0x48/0xb8
[<ffffff80080c3c94>] flush_delayed_work+0x20/0x50
[<ffffff80084344ac>] rockchip_usb2phy_exit+0x48/0x58
[<ffffff8008432bc4>] phy_exit+0x64/0xb4
[<ffffff80086733b8>] dwc3_core_exit+0x44/0x98
[<ffffff80086736c4>] dwc3_remove+0x90/0xe4
[<ffffff80085a5a5c>] platform_drv_remove+0x28/0x48
[<ffffff80085a3d14>] __device_release_driver+0xac/0x114
[<ffffff80085a3da4>] device_release_driver+0x28/0x3c
[<ffffff80085a2f38>] bus_remove_device+0x110/0x128
[<ffffff80085a0404>] device_del+0x160/0x1f8
[<ffffff80085a5954>] platform_device_del+0x20/0x88
[<ffffff80085a59d0>] platform_device_unregister+0x14/0x28
[<ffffff80088820f4>] of_platform_device_destroy+0x54/0xa8
[<ffffff800859f790>] device_for_each_child+0x68/0x98
[<ffffff8008882084>] of_platform_depopulate+0x30/0x4c
[<ffffff8008680030>] dwc3_rockchip_probe+0x4d4/0x574
[<ffffff80085a5ad4>] platform_drv_probe+0x58/0xa4
[<ffffff80085a396c>] driver_probe_device+0x118/0x2b0
[<ffffff80085a3b70>] __driver_attach+0x6c/0x98
[<ffffff80085a29d0>] bus_for_each_dev+0x80/0xb0
[<ffffff80085a34a0>] driver_attach+0x20/0x28
[<ffffff80085a3038>] bus_add_driver+0xe8/0x1e4
[<ffffff80085a4ad4>] driver_register+0x94/0xe0
[<ffffff80085a5a2c>] __platform_driver_register+0x48/0x50
[<ffffff8009222224>] dwc3_rockchip_driver_init+0x18/0x20
[<ffffff80080839f4>] do_one_initcall+0x17c/0x198
[<ffffff80091f0e48>] kernel_init_freeable+0x1f8/0x2b0
[<ffffff8008c61810>] kernel_init+0x10/0xf8
[<ffffff80080832c0>] ret_from_fork+0x10/0x50

This patch only allows to flush the otg_sm_work when the usb
bvalid irq is valid.

Fixes: f6fac8b68ad8 ("phy: rockchip: rockchip-inno-usb2: flush otg work when exit")
Change-Id: I4dbe34fa9a330f22abb24ccd625da33425a9f753
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 95942d4c3acef..022d17874b043 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -743,7 +743,8 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 
 	if (rport->port_id == USB2PHY_PORT_HOST)
 		cancel_delayed_work_sync(&rport->sm_work);
-	else if (rport->port_id == USB2PHY_PORT_OTG)
+	else if (rport->port_id == USB2PHY_PORT_OTG &&
+		 rport->bvalid_irq > 0)
 		flush_delayed_work(&rport->otg_sm_work);
 
 	return 0;

From 70551461d05f5610792517f25c27f296d49c3da3 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Mon, 9 Jul 2018 14:06:00 +0800
Subject: [PATCH 0559/1852] arm64: support pack zboot.img

zboot.img: Image.lz4 + resouorce.img
boot.img:  Image + resource.img

Change-Id: I97bc39de99ce85cc21f2491a6db59d1e015f67d0
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm64/Makefile | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 53cde97203a2d..7f9be09fba1d3 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -163,7 +163,7 @@ define archhelp
   echo  '                  install to $$(INSTALL_PATH) and run lilo'
 endef
 
-kernel.img: Image
+kernel.img: Image.lz4
 	$(Q)$(srctree)/scripts/mkkrnlimg $(objtree)/arch/arm64/boot/Image $(objtree)/kernel.img >/dev/null
 	@echo '  Image:  kernel.img is ready'
 ifdef CONFIG_MODULES
@@ -177,6 +177,17 @@ LOGO_KERNEL := $(notdir $(wildcard $(srctree)/logo_kernel.bmp))
 	$(Q) if [ -f $(srctree)/$(LOGO_KERNEL) -a "$(srctree)" != "$(objtree)" ]; then cp -a $(srctree)/$(LOGO_KERNEL) $(objtree)/; fi
 	$(Q)$(srctree)/scripts/resource_tool $(objtree)/arch/arm64/boot/dts/rockchip/$*.dtb $(LOGO) $(LOGO_KERNEL)
 	@echo '  Image:  resource.img (with $*.dtb $(LOGO) $(LOGO_KERNEL)) is ready'
-	$(Q) if [ -x $(srctree)/scripts/mkbootimg ]; then $(srctree)/scripts/mkbootimg --kernel $(objtree)/arch/arm64/boot/Image --second resource.img -o boot.img && echo '  Image:  boot.img (with Image resource.img) is ready'; fi
-
-CLEAN_FILES += boot.img kernel.img resource.img
+	$(Q) if [ -x $(srctree)/scripts/mkbootimg ]; then \
+		$(srctree)/scripts/mkbootimg \
+			--kernel $(objtree)/arch/arm64/boot/Image \
+			--second resource.img \
+			-o boot.img && \
+		echo '  Image:  boot.img (with Image resource.img) is ready'; \
+		$(srctree)/scripts/mkbootimg \
+			--kernel $(objtree)/arch/arm64/boot/Image.lz4 \
+			--second resource.img \
+			-o zboot.img && \
+		echo '  Image:  zboot.img (with Image.lz4 resource.img) is ready'; \
+	fi
+
+CLEAN_FILES += boot.img kernel.img resource.img zboot.img

From d2104475507e5797e3a339231f3fb16cf4b50451 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 9 Jul 2018 14:59:56 +0800
Subject: [PATCH 0560/1852] rk: .gitignore: ignore zboot.img

Change-Id: If4a9a1dc329ccb649e1c5da700e1022227006e82
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 2b1e4601399f0..183499e0a8500 100644
--- a/.gitignore
+++ b/.gitignore
@@ -45,6 +45,7 @@ Module.symvers
 /boot.img
 /kernel.img
 /resource.img
+/zboot.img
 /tags
 /TAGS
 /linux

From 40e646b7037ab2d0ef9b716e3236f0d850cb0e13 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 9 Jul 2018 15:01:30 +0800
Subject: [PATCH 0561/1852] rk: kbuild: Beautify output of LZ4C cmd

replace tab by spaces.

Fixes: 23c2ba084da0 ("Use standard lz4 format for Image.lz4 on ARM64")
Change-Id: I77ebb48ed0c9fa8bd427e10856065d681070bb6b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/Makefile.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 1d0e885628e6e..3ec5f2cf52e02 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -364,7 +364,7 @@ cmd_lz4 = (cat $(filter-out FORCE,$^) | \
 	lz4c -l -c1 stdin stdout && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
 	(rm -f $@ ; false)
 
-quiet_cmd_lz4c = LZ4C	$@
+quiet_cmd_lz4c = LZ4C    $@
 cmd_lz4c = (cat $(filter-out FORCE,$^) | \
 	lz4c -c1 stdin stdout && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
 	(rm -f $@ ; false)

From 2f6f8fabfe0b3cf442198cedff1c1374919dbf40 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Fri, 6 Jul 2018 16:55:35 +0800
Subject: [PATCH 0562/1852] dt-bindings: Document the Rockchip CIF bindings

Add DT bindings documentation for Rockchip CIF.

Change-Id: I9dc33e12845956a69f773a905ff7973d37e10079
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 .../bindings/media/rockchip-cif.txt           | 64 +++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/rockchip-cif.txt

diff --git a/Documentation/devicetree/bindings/media/rockchip-cif.txt b/Documentation/devicetree/bindings/media/rockchip-cif.txt
new file mode 100644
index 0000000000000..c34cee0de0697
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-cif.txt
@@ -0,0 +1,64 @@
+Rockchip SoC Camera Interface
+----------------------------------------------
+
+Rockchip CIF is a camera interface for the Rockchip series of SoCs
+like rk3288, rk312x, RV1108 to receive frame data from camera or CCIR656 encoder,
+and transfer the data into system main memory by AXI bus.
+
+Required properties:
+- compatible: value should be one of the following
+	"rockchip,rk3128-cif";
+	"rockchip,rk3288-cif";
+- reg : offset and length of the register set for the device.
+- interrupts: should contain cif interrupt.
+- clocks: phandle to the required clocks.
+- clock-names: required clock name.
+
+Optional properties:
+- iommus: iommu node attached to cif if exist.
+- resets: CRU reset of cif if exist.
+
+port node
+-------------------
+
+The device node should contain one 'port' child node with child 'endpoint'
+nodes, according to the bindings defined in Documentation/devicetree/bindings/
+media/video-interfaces.txt.
+
+- endpoint(parallel):
+	- remote-endpoint: Connecting to a sensor with a parallel video bus.
+	- parallel_bus properties: Refer to Documentation/devicetree/bindings/
+		media/video-interfaces.txt.
+
+The port node must contain at least one endpoint.
+It could have multiple endpoints, but please note the hardware don't support
+two sensors work at a time, they are supposed to work asynchronously.
+
+Device node example
+-------------------
+
+	cif: cif@1010a000 {
+		compatible = "rockchip,rk3128-cif";
+		reg = <0x1010a000 0x200>;
+
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>,
+			 <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif", "hclk_cif",
+			      "sclk_cif_out";
+		resets = <&cru SRST_CIF0>;
+		reset-names = "rst_cif";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		/* px3se has not iommu attached */
+		/* iommus = <&cif_mmu>; */
+		power-domains = <&power RK3128_PD_VIO>;
+
+		status = "okay";
+
+		port {
+			cif_in: endpoint {
+				remote-endpoint = <&adv7181_out>;
+				vsync-active = <0>;
+				hsync-active = <1>;
+			};
+		};
+	};

From c99d9db3df24c15c79d7b1101ee447e3cb41cd74 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Thu, 28 Jun 2018 15:05:17 +0800
Subject: [PATCH 0563/1852] media: rockchip/cif: add cif driver

This patch adds a new cif driver that is based on the
media controller, async subdev and vb2.

It now works in oneframe mode to receive yuv or bayer raw data.

Change-Id: I34047715405ac8b4eaafc71cc8983b9afa3c0006
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 drivers/media/platform/Kconfig                |   1 +
 drivers/media/platform/Makefile               |   1 +
 drivers/media/platform/rockchip/cif/Kconfig   |  11 +
 drivers/media/platform/rockchip/cif/Makefile  |   3 +
 drivers/media/platform/rockchip/cif/capture.c | 969 ++++++++++++++++++
 drivers/media/platform/rockchip/cif/dev.c     | 501 +++++++++
 drivers/media/platform/rockchip/cif/dev.h     | 177 ++++
 drivers/media/platform/rockchip/cif/regs.h    | 122 +++
 8 files changed, 1785 insertions(+)
 create mode 100644 drivers/media/platform/rockchip/cif/Kconfig
 create mode 100644 drivers/media/platform/rockchip/cif/Makefile
 create mode 100644 drivers/media/platform/rockchip/cif/capture.c
 create mode 100644 drivers/media/platform/rockchip/cif/dev.c
 create mode 100644 drivers/media/platform/rockchip/cif/dev.h
 create mode 100644 drivers/media/platform/rockchip/cif/regs.h

diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 77fd1119b372d..c20c2160c5094 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -122,6 +122,7 @@ source "drivers/media/platform/s5p-tv/Kconfig"
 source "drivers/media/platform/am437x/Kconfig"
 source "drivers/media/platform/xilinx/Kconfig"
 source "drivers/media/platform/rk-isp10/Kconfig"
+source "drivers/media/platform/rockchip/cif/Kconfig"
 source "drivers/media/platform/rockchip/isp1/Kconfig"
 
 endif # V4L_PLATFORM_DRIVERS
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index bed294f93a066..09e3b99408236 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1/
 obj-$(CONFIG_VIDEO_ROCKCHIP_RGA)	+= rockchip/rga/
 
 obj-y	+= omap/
+obj-$(CONFIG_VIDEO_ROCKCHIP_CIF)	+= rockchip/cif/
 obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1)	+= rockchip/isp1/
 
 obj-$(CONFIG_VIDEO_AM437X_VPFE)		+= am437x/
diff --git a/drivers/media/platform/rockchip/cif/Kconfig b/drivers/media/platform/rockchip/cif/Kconfig
new file mode 100644
index 0000000000000..b38f3e79c6692
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/Kconfig
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0
+config VIDEO_ROCKCHIP_CIF
+	tristate "Rockchip Camera Interface driver"
+	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+	depends on ARCH_ROCKCHIP || COMPILE_TEST
+	depends on MEDIA_CAMERA_SUPPORT
+	select VIDEOBUF2_DMA_CONTIG
+	select V4L2_FWNODE
+	default n
+	help
+	  Support for CIF on the rockchip SoCs like rk312x, rk3288.
diff --git a/drivers/media/platform/rockchip/cif/Makefile b/drivers/media/platform/rockchip/cif/Makefile
new file mode 100644
index 0000000000000..7279908243165
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += video_rkcif.o
+video_rkcif-objs += dev.o capture.o
diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c
new file mode 100644
index 0000000000000..36bb99ffface1
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/capture.c
@@ -0,0 +1,969 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip CIF Driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/delay.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fh.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-subdev.h>
+#include <media/videobuf2-dma-contig.h>
+
+#include "dev.h"
+#include "regs.h"
+
+#define CIF_REQ_BUFS_MIN	1
+#define CIF_MIN_WIDTH		64
+#define CIF_MIN_HEIGHT		64
+#define CIF_MAX_WIDTH		8192
+#define CIF_MAX_HEIGHT		8192
+
+#define RKCIF_PLANE_Y			0
+#define RKCIF_PLANE_CBCR		1
+
+#define STREAM_PAD_SINK				0
+#define STREAM_PAD_SOURCE			1
+
+/* TODO: pingpong mode is not yet supported */
+
+/* Get xsubs and ysubs for fourcc formats
+ *
+ * @xsubs: horizontal color samples in a 4*4 matrix, for yuv
+ * @ysubs: vertical color samples in a 4*4 matrix, for yuv
+ */
+static int fcc_xysubs(u32 fcc, u32 *xsubs, u32 *ysubs)
+{
+	switch (fcc) {
+	case V4L2_PIX_FMT_NV16:
+	case V4L2_PIX_FMT_NV61:
+		*xsubs = 2;
+		*ysubs = 1;
+		break;
+	case V4L2_PIX_FMT_NV21:
+	case V4L2_PIX_FMT_NV12:
+		*xsubs = 2;
+		*ysubs = 2;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static const struct cif_output_fmt out_fmts[] = {
+	{
+		.fourcc = V4L2_PIX_FMT_NV16,
+		.cplanes = 2,
+		.mplanes = 1,
+		.fmt_val = YUV_OUTPUT_422 | UV_STORAGE_ORDER_UVUV,
+		.bpp = { 8, 16 },
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV61,
+		.fmt_val = YUV_OUTPUT_422 | UV_STORAGE_ORDER_VUVU,
+		.cplanes = 2,
+		.mplanes = 1,
+		.bpp = { 8, 16 },
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV12,
+		.fmt_val = YUV_OUTPUT_420 | UV_STORAGE_ORDER_UVUV,
+		.cplanes = 2,
+		.mplanes = 1,
+		.bpp = { 8, 16 },
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV21,
+		.fmt_val = YUV_OUTPUT_420 | UV_STORAGE_ORDER_VUVU,
+		.cplanes = 2,
+		.mplanes = 1,
+		.bpp = { 8, 16 },
+	},
+
+	/* TODO: We can support NV12M/NV21M/NV16M/NV61M too */
+};
+
+static const struct cif_input_fmt in_fmts[] = {
+	{
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
+		.fmt_val	= YUV_INPUT_422 | YUV_INPUT_ORDER_YUYV,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
+		.fmt_val	= YUV_INPUT_422 | YUV_INPUT_ORDER_YVYU,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
+		.fmt_val	= YUV_INPUT_422 | YUV_INPUT_ORDER_UYVY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
+		.fmt_val	= YUV_INPUT_422 | YUV_INPUT_ORDER_VYUY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+	},
+};
+
+/* Get active sensor by enabled media link */
+static struct rkcif_sensor_info *get_active_sensor(struct rkcif_stream *stream)
+{
+	struct media_entity *remote_entity;
+	struct media_pad *local, *remote;
+	struct v4l2_subdev *sd;
+	u32 i;
+
+	local = &stream->vdev.entity.pads[0];
+	remote = media_entity_remote_pad(local);
+	if (!remote) {
+		v4l2_err(&stream->cifdev->v4l2_dev, "Not sensor linked\n");
+		return NULL;
+	}
+	remote_entity = remote->entity;
+	sd = media_entity_to_v4l2_subdev(remote_entity);
+
+	for (i = 0; i < stream->cifdev->num_sensors; ++i)
+		if (stream->cifdev->sensors[i].sd == sd)
+			return &stream->cifdev->sensors[i];
+
+	return NULL;
+}
+
+static const struct
+cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd, struct v4l2_rect *rect)
+{
+	struct v4l2_subdev_format fmt;
+	int ret;
+	u32 i;
+
+	ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
+	if (ret < 0) {
+		v4l2_warn(sd->v4l2_dev,
+			  "sensor fmt invalid, set to default size\n");
+		goto set_default;
+	}
+
+	v4l2_dbg(1, rkcif_debug, sd->v4l2_dev,
+		 "remote fmt: mbus code:%d, size:%dx%d\n",
+		 fmt.format.code, fmt.format.width, fmt.format.height);
+	rect->left = 0;
+	rect->top = 0;
+	rect->width = fmt.format.width;
+	rect->height = fmt.format.height;
+
+	for (i = 0; i < ARRAY_SIZE(in_fmts); i++)
+		if (fmt.format.code == in_fmts[i].mbus_code)
+			return &in_fmts[i];
+
+	v4l2_err(sd->v4l2_dev, "remote sensor mbus code not supported\n");
+
+set_default:
+	rect->left = 0;
+	rect->top = 0;
+	rect->width = RKCIF_DEFAULT_WIDTH;
+	rect->height = RKCIF_DEFAULT_HEIGHT;
+
+	return NULL;
+}
+
+static const struct
+cif_output_fmt *find_output_fmt(struct rkcif_stream *stream, u32 pixelfmt)
+{
+	const struct cif_output_fmt *fmt;
+	u32 i;
+
+	for (i = 0; i < ARRAY_SIZE(out_fmts); i++) {
+		fmt = &out_fmts[i];
+		if (fmt->fourcc == pixelfmt)
+			return fmt;
+	}
+
+	return NULL;
+}
+
+/***************************** stream operations ******************************/
+static void rkcif_assign_new_buffer_oneframe(struct rkcif_stream *stream)
+{
+	struct rkcif_dummy_buffer *dummy_buf = &stream->dummy_buf;
+	struct rkcif_device *dev = stream->cifdev;
+	void __iomem *base = dev->base_addr;
+
+	/* Set up an empty buffer for the next frame */
+	spin_lock(&stream->vbq_lock);
+	if (!list_empty(&stream->buf_head)) {
+		stream->curr_buf = list_first_entry(&stream->buf_head,
+					struct rkcif_buffer, queue);
+		list_del(&stream->curr_buf->queue);
+	} else {
+		stream->curr_buf = NULL;
+	}
+	spin_unlock(&stream->vbq_lock);
+
+	if (stream->curr_buf) {
+		write_cif_reg(base, CIF_FRM0_ADDR_Y,
+			      stream->curr_buf->buff_addr[RKCIF_PLANE_Y]);
+		write_cif_reg(base, CIF_FRM0_ADDR_UV,
+			      stream->curr_buf->buff_addr[RKCIF_PLANE_CBCR]);
+		write_cif_reg(base, CIF_FRM1_ADDR_Y,
+			      stream->curr_buf->buff_addr[RKCIF_PLANE_Y]);
+		write_cif_reg(base, CIF_FRM1_ADDR_UV,
+			      stream->curr_buf->buff_addr[RKCIF_PLANE_CBCR]);
+	} else {
+		v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev, "Buf dropped\n");
+		write_cif_reg(base, CIF_FRM0_ADDR_Y, dummy_buf->dma_addr);
+		write_cif_reg(base, CIF_FRM0_ADDR_UV, dummy_buf->dma_addr);
+		write_cif_reg(base, CIF_FRM1_ADDR_Y, dummy_buf->dma_addr);
+		write_cif_reg(base, CIF_FRM1_ADDR_UV, dummy_buf->dma_addr);
+	}
+}
+
+static void rkcif_stream_stop(struct rkcif_stream *stream)
+{
+	struct rkcif_device *cif_dev = stream->cifdev;
+	void __iomem *base = cif_dev->base_addr;
+	u32 val;
+
+	val = read_cif_reg(base, CIF_CTRL);
+	write_cif_reg(base, CIF_CTRL, val & (~ENABLE_CAPTURE));
+	write_cif_reg(base, CIF_INTEN, 0x0);
+	write_cif_reg(base, CIF_INTSTAT, 0x3ff);
+	write_cif_reg(base, CIF_FRAME_STATUS, 0x0);
+
+	stream->state = RKCIF_STATE_READY;
+}
+
+static int rkcif_queue_setup(struct vb2_queue *queue,
+			     const void *parg,
+			     unsigned int *num_buffers,
+			     unsigned int *num_planes,
+			     unsigned int sizes[],
+			     void *alloc_ctxs[])
+{
+	struct rkcif_stream *stream = queue->drv_priv;
+	struct rkcif_device *dev = stream->cifdev;
+	const struct v4l2_format *pfmt = parg;
+	const struct v4l2_pix_format_mplane *pixm;
+	const struct cif_output_fmt *cif_fmt;
+	u32 i;
+
+	if (pfmt) {
+		pixm = &pfmt->fmt.pix_mp;
+		cif_fmt = find_output_fmt(stream, pixm->pixelformat);
+	} else {
+		pixm = &stream->pixm;
+		cif_fmt = stream->cif_fmt_out;
+	}
+
+	*num_planes = cif_fmt->mplanes;
+
+	for (i = 0; i < cif_fmt->mplanes; i++) {
+		const struct v4l2_plane_pix_format *plane_fmt;
+
+		plane_fmt = &pixm->plane_fmt[i];
+		sizes[i] = plane_fmt->sizeimage;
+		alloc_ctxs[i] = dev->alloc_ctx;
+	}
+
+	v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev, "%s count %d, size %d\n",
+		 v4l2_type_names[queue->type], *num_buffers, sizes[0]);
+
+	return 0;
+}
+
+/*
+ * The vb2_buffer are stored in rkcif_buffer, in order to unify
+ * mplane buffer and none-mplane buffer.
+ */
+static void rkcif_buf_queue(struct vb2_buffer *vb)
+{
+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+	struct rkcif_buffer *cifbuf = to_rkcif_buffer(vbuf);
+	struct vb2_queue *queue = vb->vb2_queue;
+	struct rkcif_stream *stream = queue->drv_priv;
+	struct v4l2_pix_format_mplane *pixm = &stream->pixm;
+	const struct cif_output_fmt *fmt = stream->cif_fmt_out;
+	unsigned long lock_flags = 0;
+	int i;
+
+	memset(cifbuf->buff_addr, 0, sizeof(cifbuf->buff_addr));
+	/* If mplanes > 1, every c-plane has its own m-plane,
+	 * otherwise, multiple c-planes are in the same m-plane
+	 */
+	for (i = 0; i < fmt->mplanes; i++) {
+		void *addr = vb2_plane_vaddr(vb, i);
+
+		cifbuf->buff_addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
+		if (rkcif_debug && addr && !stream->cifdev->iommu_en) {
+			memset(addr, 0, pixm->plane_fmt[i].sizeimage);
+			v4l2_info(&stream->cifdev->v4l2_dev,
+				  "Clear buffer, size: 0x%08x\n",
+				  pixm->plane_fmt[i].sizeimage);
+		}
+	}
+	if (fmt->mplanes == 1) {
+		for (i = 0; i < fmt->cplanes - 1; i++)
+			cifbuf->buff_addr[i + 1] = cifbuf->buff_addr[i] +
+				pixm->plane_fmt[i].bytesperline * pixm->height;
+	}
+
+	spin_lock_irqsave(&stream->vbq_lock, lock_flags);
+	list_add_tail(&cifbuf->queue, &stream->buf_head);
+	spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
+}
+
+static int rkcif_create_dummy_buf(struct rkcif_stream *stream)
+{
+	struct rkcif_dummy_buffer *dummy_buf = &stream->dummy_buf;
+	struct rkcif_device *dev = stream->cifdev;
+
+	/* get a maximum plane size */
+	dummy_buf->size = max3(stream->pixm.plane_fmt[0].bytesperline *
+		stream->pixm.height,
+		stream->pixm.plane_fmt[1].sizeimage,
+		stream->pixm.plane_fmt[2].sizeimage);
+
+	dummy_buf->vaddr = dma_alloc_coherent(dev->dev, dummy_buf->size,
+					      &dummy_buf->dma_addr,
+					      GFP_KERNEL);
+	if (!dummy_buf->vaddr) {
+		v4l2_err(&dev->v4l2_dev,
+			 "Failed to allocate the memory for dummy buffer\n");
+		return -ENOMEM;
+	}
+
+	v4l2_info(&dev->v4l2_dev, "Allocate dummy buffer, size: 0x%08x\n",
+		  dummy_buf->size);
+
+	return 0;
+}
+
+static void rkcif_destroy_dummy_buf(struct rkcif_stream *stream)
+{
+	struct rkcif_dummy_buffer *dummy_buf = &stream->dummy_buf;
+	struct rkcif_device *dev = stream->cifdev;
+
+	dma_free_coherent(dev->dev, dummy_buf->size,
+			  dummy_buf->vaddr, dummy_buf->dma_addr);
+}
+
+static void rkcif_stop_streaming(struct vb2_queue *queue)
+{
+	struct rkcif_stream *stream = queue->drv_priv;
+	struct rkcif_device *dev = stream->cifdev;
+	struct rkcif_buffer *buf;
+	struct v4l2_subdev *sd;
+	int ret;
+
+	stream->stopping = true;
+	ret = wait_event_timeout(stream->wq_stopped,
+				 stream->state != RKCIF_STATE_STREAMING,
+				 msecs_to_jiffies(1000));
+	if (!ret)
+		rkcif_stream_stop(stream);
+	pm_runtime_put(dev->dev);
+
+	/* stop the sub device*/
+	sd = dev->active_sensor->sd;
+	v4l2_subdev_call(sd, video, s_stream, 0);
+	v4l2_subdev_call(sd, core, s_power, 0);
+
+	/* release buffers */
+	if (stream->curr_buf) {
+		list_add_tail(&stream->curr_buf->queue, &stream->buf_head);
+		stream->curr_buf = NULL;
+	}
+	while (!list_empty(&stream->buf_head)) {
+		buf = list_first_entry(&stream->buf_head,
+				       struct rkcif_buffer, queue);
+		list_del(&buf->queue);
+		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+	}
+
+	rkcif_destroy_dummy_buf(stream);
+}
+
+/*
+ * CIF supports the following input modes,
+ *    YUV, the default mode
+ *    PAL,
+ *    NTSC,
+ *    RAW, if the input format is raw bayer
+ *    JPEG, TODO
+ *    MIPI, TODO
+ */
+static u32 rkcif_determine_input_mode(struct rkcif_device *dev)
+{
+	struct rkcif_sensor_info *sensor_info = dev->active_sensor;
+	struct rkcif_stream *stream = &dev->stream;
+	v4l2_std_id std;
+	u32 mode = INPUT_MODE_YUV;
+	int ret;
+
+	ret = v4l2_subdev_call(sensor_info->sd, video, querystd, &std);
+	if (ret == 0) {
+		/* retrieve std from sensor if exist */
+		switch (std) {
+		case V4L2_STD_NTSC:
+			mode = INPUT_MODE_NTSC;
+			break;
+		case V4L2_STD_PAL:
+			mode = INPUT_MODE_PAL;
+			break;
+		default:
+			v4l2_err(&dev->v4l2_dev,
+				 "std: %lld is not supported", std);
+		}
+	} else {
+		/* determine input mode by mbus_code (fmt_type) */
+		switch (stream->cif_fmt_in->fmt_type) {
+		case CIF_FMT_TYPE_YUV:
+			mode = INPUT_MODE_YUV;
+			break;
+		case CIF_FMT_TYPE_RAW:
+			mode = INPUT_MODE_RAW;
+			break;
+		}
+	}
+
+	return mode;
+}
+
+static inline u32 rkcif_scl_ctl(struct rkcif_stream *stream)
+{
+	u32 fmt_type = stream->cif_fmt_in->fmt_type;
+
+	return (fmt_type == CIF_FMT_TYPE_YUV) ?
+		ENABLE_YUV_16BIT_BYPASS : ENABLE_RAW_16BIT_BYPASS;
+}
+
+static int rkcif_stream_start(struct rkcif_stream *stream)
+{
+	u32 val, mbus_flags, href_pol, vsync_pol, skip_top = 0;
+	struct rkcif_device *dev = stream->cifdev;
+	struct rkcif_sensor_info *sensor_info;
+	void __iomem *base = dev->base_addr;
+
+	sensor_info = dev->active_sensor;
+	stream->frame_idx = 0;
+
+	mbus_flags = sensor_info->mbus.flags;
+	href_pol = (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) ?
+			HSY_HIGH_ACTIVE : HSY_LOW_ACTIVE;
+	vsync_pol = (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) ?
+			VSY_HIGH_ACTIVE : VSY_LOW_ACTIVE;
+
+	val = vsync_pol | href_pol | rkcif_determine_input_mode(dev) |
+	      stream->cif_fmt_out->fmt_val | stream->cif_fmt_in->fmt_val;
+	write_cif_reg(base, CIF_FOR, val);
+	write_cif_reg(base, CIF_VIR_LINE_WIDTH, stream->pixm.width);
+	write_cif_reg(base, CIF_SET_SIZE,
+		      stream->pixm.width | (stream->pixm.height << 16));
+
+	v4l2_subdev_call(sensor_info->sd, sensor, g_skip_top_lines, &skip_top);
+
+	/* TODO: set crop properly */
+	write_cif_reg(base, CIF_CROP, skip_top << CIF_CROP_Y_SHIFT);
+	write_cif_reg(base, CIF_FRAME_STATUS, FRAME_STAT_CLS);
+	write_cif_reg(base, CIF_INTSTAT, INTSTAT_CLS);
+	write_cif_reg(base, CIF_SCL_CTRL, rkcif_scl_ctl(stream));
+
+	/* Set up an buffer for the next frame */
+	rkcif_assign_new_buffer_oneframe(stream);
+
+	write_cif_reg(base, CIF_INTEN, FRAME_END_EN | PST_INF_FRAME_END);
+	write_cif_reg(base, CIF_CTRL,
+		      AXI_BURST_16 | MODE_ONEFRAME | ENABLE_CAPTURE);
+
+	stream->state = RKCIF_STATE_STREAMING;
+
+	return 0;
+}
+
+static int rkcif_sanity_check_fmt(struct rkcif_stream *stream)
+{
+	struct rkcif_device *dev = stream->cifdev;
+	struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
+	struct v4l2_rect input, *crop;
+
+	stream->cif_fmt_in = get_input_fmt(dev->active_sensor->sd, &input);
+	if (!stream->cif_fmt_in) {
+		v4l2_err(v4l2_dev, "Input fmt is invalid\n");
+		return -EINVAL;
+	}
+
+	crop = &stream->crop;
+	if (crop->width + crop->left > input.width ||
+	    crop->height + crop->top > input.height) {
+		v4l2_err(v4l2_dev, "crop size is bigger than input\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rkcif_start_streaming(struct vb2_queue *queue, unsigned int count)
+{
+	struct rkcif_stream *stream = queue->drv_priv;
+	struct rkcif_device *dev = stream->cifdev;
+	struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
+	struct v4l2_subdev *sd;
+	int ret;
+
+	if (WARN_ON(stream->state != RKCIF_STATE_READY)) {
+		ret = -EBUSY;
+		v4l2_err(v4l2_dev, "stream in busy state\n");
+		goto destroy_buf;
+	}
+
+	ret = rkcif_sanity_check_fmt(stream);
+	if (ret < 0)
+		goto destroy_buf;
+
+	ret = rkcif_create_dummy_buf(stream);
+	if (ret < 0) {
+		v4l2_err(v4l2_dev, "Failed to create dummy_buf, %d\n", ret);
+		goto destroy_buf;
+	}
+
+	ret = pm_runtime_get_sync(dev->dev);
+	if (ret < 0) {
+		v4l2_err(v4l2_dev, "Failed to get runtime pm, %d\n", ret);
+		goto destroy_dummy_buf;
+	}
+	ret = rkcif_stream_start(stream);
+	if (ret < 0)
+		goto runtime_put;
+
+	/* start sub-devices */
+	sd = dev->active_sensor->sd;
+	ret = v4l2_subdev_call(sd, core, s_power, 1);
+	if (ret < 0 && ret != -ENOIOCTLCMD)
+		goto stop_stream;
+	ret = v4l2_subdev_call(sd, video, s_stream, 1);
+	if (ret < 0)
+		goto subdev_poweroff;
+
+	return 0;
+
+subdev_poweroff:
+	v4l2_subdev_call(sd, core, s_power, 0);
+stop_stream:
+	rkcif_stream_stop(stream);
+runtime_put:
+	pm_runtime_put(dev->dev);
+destroy_dummy_buf:
+	rkcif_destroy_dummy_buf(stream);
+destroy_buf:
+	while (!list_empty(&stream->buf_head)) {
+		struct rkcif_buffer *buf;
+
+		buf = list_first_entry(&stream->buf_head,
+				       struct rkcif_buffer, queue);
+		list_del(&buf->queue);
+		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
+	}
+
+	return ret;
+}
+
+static struct vb2_ops rkcif_vb2_ops = {
+	.queue_setup = rkcif_queue_setup,
+	.buf_queue = rkcif_buf_queue,
+	.wait_prepare = vb2_ops_wait_prepare,
+	.wait_finish = vb2_ops_wait_finish,
+	.stop_streaming = rkcif_stop_streaming,
+	.start_streaming = rkcif_start_streaming,
+};
+
+static int rkcif_init_vb2_queue(struct vb2_queue *q,
+				struct rkcif_stream *stream,
+				enum v4l2_buf_type buf_type)
+{
+	q->type = buf_type;
+	q->io_modes = VB2_MMAP | VB2_DMABUF;
+	q->drv_priv = stream;
+	q->ops = &rkcif_vb2_ops;
+	q->mem_ops = &vb2_dma_contig_memops;
+	q->buf_struct_size = sizeof(struct rkcif_buffer);
+	q->min_buffers_needed = CIF_REQ_BUFS_MIN;
+	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+	q->lock = &stream->vlock;
+
+	return vb2_queue_init(q);
+}
+
+static void rkcif_set_fmt(struct rkcif_stream *stream,
+			  struct v4l2_pix_format_mplane *pixm,
+			  bool try)
+{
+	struct rkcif_device *dev = stream->cifdev;
+	const struct cif_output_fmt *fmt;
+	struct v4l2_rect input_rect;
+	unsigned int imagesize = 0, planes;
+	u32 xsubs = 1, ysubs = 1, i;
+
+	fmt = find_output_fmt(stream, pixm->pixelformat);
+	if (!fmt)
+		fmt = &out_fmts[0];
+
+	input_rect.width = RKCIF_DEFAULT_WIDTH;
+	input_rect.height = RKCIF_DEFAULT_HEIGHT;
+
+	if (dev->active_sensor && dev->active_sensor->sd)
+		get_input_fmt(dev->active_sensor->sd, &input_rect);
+
+	/* CIF has not scale function,
+	 * the size should not be larger than input
+	 */
+	pixm->width = clamp_t(u32, pixm->width,
+				CIF_MIN_WIDTH, input_rect.width);
+	pixm->height = clamp_t(u32, pixm->height,
+				CIF_MIN_HEIGHT, input_rect.height);
+	pixm->num_planes = fmt->mplanes;
+	pixm->field = V4L2_FIELD_NONE;
+	pixm->quantization = V4L2_QUANTIZATION_DEFAULT;
+
+	/* calculate plane size and image size */
+	fcc_xysubs(fmt->fourcc, &xsubs, &ysubs);
+
+	planes = fmt->cplanes ? fmt->cplanes : fmt->mplanes;
+
+	for (i = 0; i < planes; i++) {
+		struct v4l2_plane_pix_format *plane_fmt;
+		int width, height, bpl, size;
+
+		if (i == 0) {
+			width = pixm->width;
+			height = pixm->height;
+		} else {
+			width = pixm->width / xsubs;
+			height = pixm->height / ysubs;
+		}
+
+		bpl = width * fmt->bpp[i] / 8;
+		size = bpl * height;
+		imagesize += size;
+
+		if (fmt->mplanes > i) {
+			/* Set bpl and size for each mplane */
+			plane_fmt = pixm->plane_fmt + i;
+			plane_fmt->bytesperline = bpl;
+			plane_fmt->sizeimage = size;
+		}
+		v4l2_dbg(1, rkcif_debug, &stream->cifdev->v4l2_dev,
+			 "C-Plane %i size: %d, Total imagesize: %d\n",
+			 i, size, imagesize);
+	}
+
+	/* convert to non-MPLANE format.
+	 * It's important since we want to unify non-MPLANE
+	 * and MPLANE.
+	 */
+	if (fmt->mplanes == 1)
+		pixm->plane_fmt[0].sizeimage = imagesize;
+
+	if (!try) {
+		stream->cif_fmt_out = fmt;
+		stream->pixm = *pixm;
+
+		v4l2_dbg(1, rkcif_debug, &stream->cifdev->v4l2_dev,
+			 "%s: req(%d, %d) out(%d, %d)\n", __func__,
+			 pixm->width, pixm->height,
+			 stream->pixm.width, stream->pixm.height);
+	}
+}
+
+void rkcif_stream_init(struct rkcif_device *dev)
+{
+	struct rkcif_stream *stream = &dev->stream;
+	struct v4l2_pix_format_mplane pixm;
+
+	memset(stream, 0, sizeof(*stream));
+	memset(&pixm, 0, sizeof(pixm));
+	stream->cifdev = dev;
+
+	INIT_LIST_HEAD(&stream->buf_head);
+	spin_lock_init(&stream->vbq_lock);
+	stream->state = RKCIF_STATE_READY;
+	init_waitqueue_head(&stream->wq_stopped);
+
+	/* Set default format */
+	pixm.pixelformat = V4L2_PIX_FMT_NV12;
+	pixm.width = RKCIF_DEFAULT_WIDTH;
+	pixm.height = RKCIF_DEFAULT_HEIGHT;
+	rkcif_set_fmt(stream, &pixm, false);
+
+	stream->crop.left = 0;
+	stream->crop.top = 0;
+	stream->crop.width = RKCIF_DEFAULT_WIDTH;
+	stream->crop.height = RKCIF_DEFAULT_HEIGHT;
+}
+
+static int rkcif_fh_open(struct file *filp)
+{
+	struct video_device *vdev = video_devdata(filp);
+	struct rkcif_stream *stream = to_rkcif_stream(vdev);
+	struct rkcif_device *cifdev = stream->cifdev;
+
+	/* Make sure active sensor is valid before .set_fmt() */
+	cifdev->active_sensor = get_active_sensor(stream);
+	if (!cifdev->active_sensor) {
+		v4l2_err(vdev, "Not sensor linked\n");
+		return -EINVAL;
+	}
+
+	/* Soft reset via CRU.
+	 * Because CRU would reset iommu too, so there's not chance
+	 * to reset cif once we hold buffers after buf queued
+	 */
+	rkcif_soft_reset(cifdev);
+
+	return v4l2_fh_open(filp);
+}
+
+static const struct v4l2_file_operations rkcif_fops = {
+	.open = rkcif_fh_open,
+	.release = vb2_fop_release,
+	.unlocked_ioctl = video_ioctl2,
+	.poll = vb2_fop_poll,
+	.mmap = vb2_fop_mmap,
+};
+
+static int rkcif_enum_input(struct file *file, void *priv,
+			    struct v4l2_input *input)
+{
+	if (input->index > 0)
+		return -EINVAL;
+
+	input->type = V4L2_INPUT_TYPE_CAMERA;
+	strlcpy(input->name, "Camera", sizeof(input->name));
+
+	return 0;
+}
+
+static int rkcif_try_fmt_vid_cap_mplane(struct file *file, void *fh,
+					struct v4l2_format *f)
+{
+	struct rkcif_stream *stream = video_drvdata(file);
+
+	rkcif_set_fmt(stream, &f->fmt.pix_mp, true);
+
+	return 0;
+}
+
+static int rkcif_enum_fmt_vid_cap_mplane(struct file *file, void *priv,
+					 struct v4l2_fmtdesc *f)
+{
+	const struct cif_output_fmt *fmt = NULL;
+
+	if (f->index >= ARRAY_SIZE(out_fmts))
+		return -EINVAL;
+
+	fmt = &out_fmts[f->index];
+	f->pixelformat = fmt->fourcc;
+
+	return 0;
+}
+
+static int rkcif_s_fmt_vid_cap_mplane(struct file *file,
+				      void *priv, struct v4l2_format *f)
+{
+	struct rkcif_stream *stream = video_drvdata(file);
+	struct rkcif_device *dev = stream->cifdev;
+
+	if (vb2_is_busy(&stream->buf_queue)) {
+		v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
+		return -EBUSY;
+	}
+
+	rkcif_set_fmt(stream, &f->fmt.pix_mp, false);
+
+	return 0;
+}
+
+static int rkcif_g_fmt_vid_cap_mplane(struct file *file, void *fh,
+				      struct v4l2_format *f)
+{
+	struct rkcif_stream *stream = video_drvdata(file);
+
+	f->fmt.pix_mp = stream->pixm;
+
+	return 0;
+}
+
+static int rkcif_querycap(struct file *file, void *priv,
+			  struct v4l2_capability *cap)
+{
+	struct rkcif_stream *stream = video_drvdata(file);
+	struct device *dev = stream->cifdev->dev;
+
+	strlcpy(cap->driver, dev->driver->name, sizeof(cap->driver));
+	strlcpy(cap->card, dev->driver->name, sizeof(cap->card));
+	snprintf(cap->bus_info, sizeof(cap->bus_info),
+		 "platform:%s", dev_name(dev));
+
+	return 0;
+}
+
+static const struct v4l2_ioctl_ops rkcif_v4l2_ioctl_ops = {
+	.vidioc_reqbufs = vb2_ioctl_reqbufs,
+	.vidioc_querybuf = vb2_ioctl_querybuf,
+	.vidioc_create_bufs = vb2_ioctl_create_bufs,
+	.vidioc_qbuf = vb2_ioctl_qbuf,
+	.vidioc_expbuf = vb2_ioctl_expbuf,
+	.vidioc_dqbuf = vb2_ioctl_dqbuf,
+	.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
+	.vidioc_streamon = vb2_ioctl_streamon,
+	.vidioc_streamoff = vb2_ioctl_streamoff,
+	.vidioc_enum_input = rkcif_enum_input,
+	.vidioc_try_fmt_vid_cap_mplane = rkcif_try_fmt_vid_cap_mplane,
+	.vidioc_enum_fmt_vid_cap_mplane = rkcif_enum_fmt_vid_cap_mplane,
+	.vidioc_s_fmt_vid_cap_mplane = rkcif_s_fmt_vid_cap_mplane,
+	.vidioc_g_fmt_vid_cap_mplane = rkcif_g_fmt_vid_cap_mplane,
+	.vidioc_querycap = rkcif_querycap,
+};
+
+void rkcif_unregister_stream_vdev(struct rkcif_device *dev)
+{
+	struct rkcif_stream *stream = &dev->stream;
+
+	media_entity_cleanup(&stream->vdev.entity);
+	video_unregister_device(&stream->vdev);
+}
+
+int rkcif_register_stream_vdev(struct rkcif_device *dev)
+{
+	struct rkcif_stream *stream = &dev->stream;
+	struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
+	struct video_device *vdev = &stream->vdev;
+	int ret;
+
+	strlcpy(vdev->name, "stream_cif", sizeof(vdev->name));
+	mutex_init(&stream->vlock);
+
+	vdev->ioctl_ops = &rkcif_v4l2_ioctl_ops;
+	vdev->release = video_device_release_empty;
+	vdev->fops = &rkcif_fops;
+	vdev->minor = -1;
+	vdev->v4l2_dev = v4l2_dev;
+	vdev->lock = &stream->vlock;
+	vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
+			    V4L2_CAP_STREAMING;
+	video_set_drvdata(vdev, stream);
+	vdev->vfl_dir = VFL_DIR_RX;
+	stream->pad.flags = MEDIA_PAD_FL_SINK;
+
+	dev->alloc_ctx = vb2_dma_contig_init_ctx(v4l2_dev->dev);
+	if (IS_ERR(dev->alloc_ctx)) {
+		v4l2_err(&dev->v4l2_dev, "Failed to init memory allocator\n");
+		ret = PTR_ERR(dev->alloc_ctx);
+		goto err;
+	}
+
+	rkcif_init_vb2_queue(&stream->buf_queue, stream,
+			     V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
+	vdev->queue = &stream->buf_queue;
+
+	ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
+	if (ret < 0) {
+		v4l2_err(v4l2_dev,
+			 "video_register_device failed with error %d\n", ret);
+		return ret;
+	}
+
+	ret = media_entity_init(&vdev->entity, 1, &stream->pad, 0);
+	if (ret < 0)
+		goto unreg;
+
+	return 0;
+unreg:
+	video_unregister_device(vdev);
+err:
+	return ret;
+}
+
+static void rkcif_vb_done_oneframe(struct rkcif_stream *stream,
+				   struct vb2_v4l2_buffer *vb_done)
+{
+	const struct cif_output_fmt *fmt = stream->cif_fmt_out;
+	u32 i;
+
+	/* Dequeue a filled buffer */
+	for (i = 0; i < fmt->mplanes; i++) {
+		vb2_set_plane_payload(&vb_done->vb2_buf, i,
+			stream->pixm.plane_fmt[i].sizeimage);
+	}
+	vb_done->timestamp = ns_to_timeval(ktime_get_ns());
+	vb2_buffer_done(&vb_done->vb2_buf, VB2_BUF_STATE_DONE);
+}
+
+void rkcif_irq_oneframe(struct rkcif_device *cif_dev)
+{
+	struct rkcif_stream *stream = &cif_dev->stream;
+	u32 lastline, lastpix, ctl, cif_frmst, intstat;
+	void __iomem *base = cif_dev->base_addr;
+
+	intstat = read_cif_reg(base, CIF_INTSTAT);
+	cif_frmst = read_cif_reg(base, CIF_FRAME_STATUS);
+	lastline = read_cif_reg(base, CIF_LAST_LINE);
+	lastpix = read_cif_reg(base, CIF_LAST_PIX);
+	ctl = read_cif_reg(base, CIF_CTRL);
+
+	/* There are two irqs enabled:
+	 *  - PST_INF_FRAME_END: cif FIFO is ready, this is prior to FRAME_END
+	 *  -         FRAME_END: cif has saved frame to memory, a frame ready
+	 */
+
+	if ((intstat & PST_INF_FRAME_END)) {
+		write_cif_reg(base, CIF_INTSTAT, PST_INF_FRAME_END_CLR);
+
+		if (stream->stopping)
+			/* To stop CIF ASAP, before FRAME_END irq */
+			write_cif_reg(base, CIF_CTRL, ctl & (~ENABLE_CAPTURE));
+	}
+
+	if ((intstat & FRAME_END)) {
+		struct vb2_v4l2_buffer *vb_done = NULL;
+
+		write_cif_reg(base, CIF_INTSTAT, FRAME_END_CLR);
+
+		if (stream->stopping) {
+			rkcif_stream_stop(stream);
+			stream->stopping = false;
+			wake_up(&stream->wq_stopped);
+			return;
+		}
+
+		if (lastline != stream->pixm.height ||
+		    !(cif_frmst & CIF_F0_READY)) {
+			v4l2_err(&cif_dev->v4l2_dev,
+				 "Bad frame, irq:0x%x frmst:0x%x size:%dx%d\n",
+				 intstat, cif_frmst, lastline, lastpix);
+			/* Clear status to receive into the same buffer */
+			write_cif_reg(base, CIF_FRAME_STATUS, FRM0_STAT_CLS);
+			return;
+		}
+
+		if (stream->curr_buf)
+			vb_done = &stream->curr_buf->vb;
+		rkcif_assign_new_buffer_oneframe(stream);
+
+		/* In one-frame mode, must clear status manually to enable
+		 * the next frame end irq
+		 */
+		write_cif_reg(base, CIF_FRAME_STATUS, FRM0_STAT_CLS);
+
+		if (vb_done)
+			rkcif_vb_done_oneframe(stream, vb_done);
+
+		stream->frame_idx++;
+	}
+}
+
+void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
+{
+	/* TODO */
+}
diff --git a/drivers/media/platform/rockchip/cif/dev.c b/drivers/media/platform/rockchip/cif/dev.c
new file mode 100644
index 0000000000000..dcee6c488046d
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/dev.c
@@ -0,0 +1,501 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip CIF Driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/of_platform.h>
+#include <linux/reset.h>
+#include <linux/pm_runtime.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/dma-iommu.h>
+#include <media/v4l2-fwnode.h>
+
+#include "dev.h"
+#include "regs.h"
+
+struct cif_match_data {
+	const char * const *clks;
+	int size;
+};
+
+int rkcif_debug;
+module_param_named(debug, rkcif_debug, int, 0644);
+MODULE_PARM_DESC(debug, "Debug level (0-1)");
+
+int using_pingpong;
+
+/***************************** media controller *******************************/
+static int rkcif_create_links(struct rkcif_device *dev)
+{
+	unsigned int s, pad;
+	int ret;
+
+	/* sensor links(or mipi-phy) */
+	for (s = 0; s < dev->num_sensors; ++s) {
+		struct rkcif_sensor_info *sensor = &dev->sensors[s];
+
+		for (pad = 0; pad < sensor->sd->entity.num_pads; pad++)
+			if (sensor->sd->entity.pads[pad].flags &
+				MEDIA_PAD_FL_SOURCE)
+				break;
+
+		if (pad == sensor->sd->entity.num_pads) {
+			dev_err(dev->dev, "failed to find src pad for %s\n",
+				sensor->sd->name);
+			return -ENXIO;
+		}
+
+		ret = media_entity_create_link(&sensor->sd->entity,
+				pad, &dev->stream.vdev.entity, 0,
+				s ? 0 : MEDIA_LNK_FL_ENABLED);
+		if (ret) {
+			dev_err(dev->dev, "failed to create link for %s\n",
+				sensor->sd->name);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
+{
+	struct rkcif_device *dev;
+	int ret;
+
+	dev = container_of(notifier, struct rkcif_device, notifier);
+
+	mutex_lock(&dev->media_dev.graph_mutex);
+
+	ret = rkcif_create_links(dev);
+	if (ret < 0)
+		goto unlock;
+
+	ret = v4l2_device_register_subdev_nodes(&dev->v4l2_dev);
+	if (ret < 0)
+		goto unlock;
+
+	v4l2_info(&dev->v4l2_dev, "Async subdev notifier completed\n");
+
+unlock:
+	mutex_unlock(&dev->media_dev.graph_mutex);
+	return ret;
+}
+
+struct rkcif_async_subdev {
+	struct v4l2_async_subdev asd;
+	struct v4l2_mbus_config mbus;
+};
+
+static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
+				 struct v4l2_subdev *subdev,
+				 struct v4l2_async_subdev *asd)
+{
+	struct rkcif_device *cif_dev = container_of(notifier,
+					struct rkcif_device, notifier);
+	struct rkcif_async_subdev *s_asd = container_of(asd,
+					struct rkcif_async_subdev, asd);
+
+	if (cif_dev->num_sensors == ARRAY_SIZE(cif_dev->sensors))
+		return -EBUSY;
+
+	cif_dev->sensors[cif_dev->num_sensors].mbus = s_asd->mbus;
+	cif_dev->sensors[cif_dev->num_sensors].sd = subdev;
+	++cif_dev->num_sensors;
+
+	v4l2_dbg(1, rkcif_debug, subdev, "Async registered subdev\n");
+
+	return 0;
+}
+
+static int rkcif_fwnode_parse(struct device *dev,
+			       struct v4l2_fwnode_endpoint *vep,
+			       struct v4l2_async_subdev *asd)
+{
+	struct rkcif_async_subdev *rk_asd =
+			container_of(asd, struct rkcif_async_subdev, asd);
+	struct v4l2_fwnode_bus_parallel *bus = &vep->bus.parallel;
+
+	/*
+	 * MIPI sensor is linked with a mipi dphy and its media bus config can
+	 * not be get in here
+	 */
+	if (vep->bus_type != V4L2_MBUS_BT656 &&
+		vep->bus_type != V4L2_MBUS_PARALLEL)
+		return 0;
+
+	rk_asd->mbus.flags = bus->flags;
+	rk_asd->mbus.type = vep->bus_type;
+
+	return 0;
+}
+
+static const struct v4l2_async_notifier_operations subdev_notifier_ops = {
+	.bound = subdev_notifier_bound,
+	.complete = subdev_notifier_complete,
+};
+
+static int cif_subdev_notifier(struct rkcif_device *cif_dev)
+{
+	struct v4l2_async_notifier *ntf = &cif_dev->notifier;
+	struct device *dev = cif_dev->dev;
+	int ret;
+
+	ret = v4l2_async_notifier_parse_fwnode_endpoints(dev, ntf,
+			sizeof(struct rkcif_async_subdev), rkcif_fwnode_parse);
+
+	if (ret < 0)
+		return ret;
+
+	if (!ntf->num_subdevs)
+		return -ENODEV;	/* no endpoint */
+
+	ntf->ops = &subdev_notifier_ops;
+
+	return v4l2_async_notifier_register(&cif_dev->v4l2_dev, ntf);
+}
+
+/***************************** platform deive *******************************/
+
+static int rkcif_register_platform_subdevs(struct rkcif_device *cif_dev)
+{
+	int ret;
+
+	ret = rkcif_register_stream_vdev(cif_dev);
+	if (ret < 0)
+		return ret;
+
+	ret = cif_subdev_notifier(cif_dev);
+	if (ret < 0) {
+		v4l2_err(&cif_dev->v4l2_dev,
+			 "Failed to register subdev notifier(%d)\n", ret);
+		rkcif_unregister_stream_vdev(cif_dev);
+	}
+
+	return 0;
+}
+
+static const char * const rk3128_cif_clks[] = {
+	"aclk_cif",
+	"hclk_cif",
+	"sclk_cif_out",
+};
+
+static const char * const rk3288_cif_clks[] = {
+	"aclk_cif0",
+	"hclk_cif0",
+	"cif0_in",
+	"cif0_out",
+};
+
+static const struct cif_match_data rk3128_cif_clk_data = {
+	.clks = rk3128_cif_clks,
+	.size = ARRAY_SIZE(rk3128_cif_clks),
+};
+
+static const struct cif_match_data rk3288_cif_clk_data = {
+	.clks = rk3288_cif_clks,
+	.size = ARRAY_SIZE(rk3288_cif_clks),
+};
+
+static const struct of_device_id rkcif_plat_of_match[] = {
+	{
+		.compatible = "rockchip,rk3128-cif",
+		.data = &rk3128_cif_clk_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-cif",
+		.data = &rk3288_cif_clk_data,
+	},
+	{},
+};
+
+static irqreturn_t rkcif_irq_handler(int irq, void *ctx)
+{
+	struct device *dev = ctx;
+	struct rkcif_device *cif_dev = dev_get_drvdata(dev);
+
+	if (using_pingpong)
+		rkcif_irq_pingpong(cif_dev);
+	else
+		rkcif_irq_oneframe(cif_dev);
+
+	return IRQ_HANDLED;
+}
+
+static void rkcif_disable_sys_clk(struct rkcif_device *cif_dev)
+{
+	int i;
+
+	for (i = cif_dev->clk_size - 1; i >= 0; i--)
+		clk_disable_unprepare(cif_dev->clks[i]);
+}
+
+static int rkcif_enable_sys_clk(struct rkcif_device *cif_dev)
+{
+	int i, ret = -EINVAL;
+
+	for (i = 0; i < cif_dev->clk_size; i++) {
+		ret = clk_prepare_enable(cif_dev->clks[i]);
+
+		if (ret < 0)
+			goto err;
+	}
+
+	return 0;
+
+err:
+	for (--i; i >= 0; --i)
+		clk_disable_unprepare(cif_dev->clks[i]);
+
+	return ret;
+}
+
+static int rkcif_iommu_init(struct rkcif_device *cif_dev)
+{
+	struct iommu_group *group;
+	int ret;
+
+	cif_dev->domain = iommu_domain_alloc(&platform_bus_type);
+	if (!cif_dev->domain)
+		return -ENOMEM;
+
+	ret = iommu_get_dma_cookie(cif_dev->domain);
+	if (ret)
+		goto err_free_domain;
+
+	group = iommu_group_get(cif_dev->dev);
+	if (!group) {
+		group = iommu_group_alloc();
+		if (IS_ERR(group)) {
+			ret = PTR_ERR(group);
+			goto err_put_cookie;
+		}
+		ret = iommu_group_add_device(group, cif_dev->dev);
+		iommu_group_put(group);
+		if (ret)
+			goto err_put_cookie;
+	}
+	iommu_group_put(group);
+
+	ret = iommu_attach_device(cif_dev->domain, cif_dev->dev);
+	if (ret)
+		goto err_put_cookie;
+	if (!common_iommu_setup_dma_ops(cif_dev->dev, 0x10000000, SZ_2G,
+					cif_dev->domain->ops)) {
+		ret = -ENODEV;
+		goto err_detach;
+	}
+
+	return 0;
+
+err_detach:
+	iommu_detach_device(cif_dev->domain, cif_dev->dev);
+err_put_cookie:
+	iommu_put_dma_cookie(cif_dev->domain);
+err_free_domain:
+	iommu_domain_free(cif_dev->domain);
+
+	dev_err(cif_dev->dev, "Failed to setup IOMMU, ret(%d)\n", ret);
+
+	return ret;
+}
+
+static void rkcif_iommu_cleanup(struct rkcif_device *cif_dev)
+{
+	iommu_detach_device(cif_dev->domain, cif_dev->dev);
+	iommu_put_dma_cookie(cif_dev->domain);
+	iommu_domain_free(cif_dev->domain);
+}
+
+static inline bool is_iommu_enable(struct device *dev)
+{
+	struct device_node *iommu;
+
+	iommu = of_parse_phandle(dev->of_node, "iommus", 0);
+	if (!iommu) {
+		dev_info(dev, "no iommu attached, using non-iommu buffers\n");
+		return false;
+	} else if (!of_device_is_available(iommu)) {
+		dev_info(dev, "iommu is disabled, using non-iommu buffers\n");
+		of_node_put(iommu);
+		return false;
+	}
+	of_node_put(iommu);
+
+	return true;
+}
+
+void rkcif_soft_reset(struct rkcif_device *cif_dev)
+{
+	if (cif_dev->iommu_en)
+		rkcif_iommu_cleanup(cif_dev);
+
+	reset_control_assert(cif_dev->cif_rst);
+	udelay(5);
+	reset_control_deassert(cif_dev->cif_rst);
+
+	if (cif_dev->iommu_en)
+		rkcif_iommu_init(cif_dev);
+}
+
+static int rkcif_plat_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *node = pdev->dev.of_node;
+	struct device *dev = &pdev->dev;
+	struct v4l2_device *v4l2_dev;
+	struct rkcif_device *cif_dev;
+	const struct cif_match_data *clk_data;
+	struct resource *res;
+	int i, ret, irq;
+
+	match = of_match_node(rkcif_plat_of_match, node);
+	cif_dev = devm_kzalloc(dev, sizeof(*cif_dev), GFP_KERNEL);
+	if (!cif_dev)
+		return -ENOMEM;
+
+	dev_set_drvdata(dev, cif_dev);
+	cif_dev->dev = dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	cif_dev->base_addr = devm_ioremap_resource(dev, res);
+	if (IS_ERR(cif_dev->base_addr))
+		return PTR_ERR(cif_dev->base_addr);
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0)
+		return irq;
+
+	ret = devm_request_irq(dev, irq, rkcif_irq_handler, IRQF_SHARED,
+			       dev_driver_string(dev), dev);
+	if (ret < 0) {
+		dev_err(dev, "request irq failed: %d\n", ret);
+		return ret;
+	}
+
+	cif_dev->irq = irq;
+	clk_data = match->data;
+	for (i = 0; i < clk_data->size; i++) {
+		struct clk *clk = devm_clk_get(dev, clk_data->clks[i]);
+
+		if (IS_ERR(clk)) {
+			dev_err(dev, "failed to get %s\n", clk_data->clks[i]);
+			return PTR_ERR(clk);
+		}
+		cif_dev->clks[i] = clk;
+	}
+	cif_dev->clk_size = clk_data->size;
+
+	cif_dev->cif_rst = devm_reset_control_get(dev, "rst_cif");
+	if (IS_ERR(cif_dev->cif_rst)) {
+		dev_err(dev, "failed to get core cif reset controller\n");
+		return PTR_ERR(cif_dev->cif_rst);
+	}
+
+	rkcif_stream_init(cif_dev);
+
+	strlcpy(cif_dev->media_dev.model, "rkcif",
+		sizeof(cif_dev->media_dev.model));
+	cif_dev->media_dev.dev = &pdev->dev;
+	v4l2_dev = &cif_dev->v4l2_dev;
+	v4l2_dev->mdev = &cif_dev->media_dev;
+	strlcpy(v4l2_dev->name, "rkcif", sizeof(v4l2_dev->name));
+	v4l2_ctrl_handler_init(&cif_dev->ctrl_handler, 8);
+	v4l2_dev->ctrl_handler = &cif_dev->ctrl_handler;
+
+	ret = v4l2_device_register(cif_dev->dev, &cif_dev->v4l2_dev);
+	if (ret < 0)
+		return ret;
+
+	ret = media_device_register(&cif_dev->media_dev);
+	if (ret < 0) {
+		v4l2_err(v4l2_dev, "Failed to register media device: %d\n",
+			 ret);
+		goto err_unreg_v4l2_dev;
+	}
+
+	/* create & register platefom subdev (from of_node) */
+	ret = rkcif_register_platform_subdevs(cif_dev);
+	if (ret < 0)
+		goto err_unreg_media_dev;
+
+	cif_dev->iommu_en = is_iommu_enable(dev);
+	if (cif_dev->iommu_en)
+		rkcif_iommu_init(cif_dev);
+	pm_runtime_enable(&pdev->dev);
+
+	return 0;
+
+err_unreg_media_dev:
+	media_device_unregister(&cif_dev->media_dev);
+err_unreg_v4l2_dev:
+	v4l2_device_unregister(&cif_dev->v4l2_dev);
+	return ret;
+}
+
+static int rkcif_plat_remove(struct platform_device *pdev)
+{
+	struct rkcif_device *cif_dev = platform_get_drvdata(pdev);
+
+	pm_runtime_disable(&pdev->dev);
+	if (cif_dev->iommu_en)
+		rkcif_iommu_cleanup(cif_dev);
+
+	media_device_unregister(&cif_dev->media_dev);
+	v4l2_device_unregister(&cif_dev->v4l2_dev);
+	rkcif_unregister_stream_vdev(cif_dev);
+
+	return 0;
+}
+
+static int __maybe_unused rkcif_runtime_suspend(struct device *dev)
+{
+	struct rkcif_device *cif_dev = dev_get_drvdata(dev);
+
+	rkcif_disable_sys_clk(cif_dev);
+
+	return pinctrl_pm_select_sleep_state(dev);
+}
+
+static int __maybe_unused rkcif_runtime_resume(struct device *dev)
+{
+	struct rkcif_device *cif_dev = dev_get_drvdata(dev);
+	int ret;
+
+	ret = pinctrl_pm_select_default_state(dev);
+	if (ret < 0)
+		return ret;
+	rkcif_enable_sys_clk(cif_dev);
+
+	return 0;
+}
+
+static const struct dev_pm_ops rkcif_plat_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
+	SET_RUNTIME_PM_OPS(rkcif_runtime_suspend, rkcif_runtime_resume, NULL)
+};
+
+static struct platform_driver rkcif_plat_drv = {
+	.driver = {
+		   .name = CIF_DRIVER_NAME,
+		   .of_match_table = of_match_ptr(rkcif_plat_of_match),
+		   .pm = &rkcif_plat_pm_ops,
+	},
+	.probe = rkcif_plat_probe,
+	.remove = rkcif_plat_remove,
+};
+
+module_platform_driver(rkcif_plat_drv);
+MODULE_AUTHOR("Rockchip Camera/ISP team");
+MODULE_DESCRIPTION("Rockchip CIF platform driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/rockchip/cif/dev.h b/drivers/media/platform/rockchip/cif/dev.h
new file mode 100644
index 0000000000000..0ce96849b2fae
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/dev.h
@@ -0,0 +1,177 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Rockchip CIF Driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _RKCIF_DEV_H
+#define _RKCIF_DEV_H
+
+#include <linux/mutex.h>
+#include <media/media-device.h>
+#include <media/media-entity.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/videobuf2-v4l2.h>
+
+#define CIF_DRIVER_NAME		"rkcif"
+
+#define RKCIF_MAX_BUS_CLK	8
+#define RKCIF_MAX_SENSOR	2
+
+#define RKCIF_DEFAULT_WIDTH	640
+#define RKCIF_DEFAULT_HEIGHT	480
+
+#define write_cif_reg(base, addr, val)  writel(val, (addr) + (base))
+#define read_cif_reg(base, addr) readl((addr) + (base))
+
+enum rkcif_state {
+	RKCIF_STATE_DISABLED,
+	RKCIF_STATE_READY,
+	RKCIF_STATE_STREAMING
+};
+
+struct rkcif_buffer {
+	struct vb2_v4l2_buffer vb;
+	struct list_head queue;
+	union {
+		u32 buff_addr[VIDEO_MAX_PLANES];
+		void *vaddr[VIDEO_MAX_PLANES];
+	};
+};
+
+struct rkcif_dummy_buffer {
+	void *vaddr;
+	dma_addr_t dma_addr;
+	u32 size;
+};
+
+extern int rkcif_debug;
+
+static inline struct rkcif_buffer *to_rkcif_buffer(struct vb2_v4l2_buffer *vb)
+{
+	return container_of(vb, struct rkcif_buffer, vb);
+}
+
+/*
+ * struct rkcif_sensor_info - Sensor infomations
+ * @mbus: media bus configuration
+ */
+struct rkcif_sensor_info {
+	struct v4l2_subdev *sd;
+	struct v4l2_mbus_config mbus;
+};
+
+/*
+ * struct cif_output_fmt - The output format
+ *
+ * @fourcc: pixel format in fourcc
+ * @cplanes: number of colour planes
+ * @fmt_val: the fmt val corresponding to CIF_FOR register
+ * @bpp: bits per pixel for each cplanes
+ */
+struct cif_output_fmt {
+	u32 fourcc;
+	u8 cplanes;
+	u8 mplanes;
+	u32 fmt_val;
+	u8 bpp[VIDEO_MAX_PLANES];
+};
+
+enum cif_fmt_type {
+	CIF_FMT_TYPE_YUV = 0,
+	CIF_FMT_TYPE_RAW,
+};
+
+/*
+ * struct cif_input_fmt - The input mbus format from sensor
+ *
+ * @mbus_code: mbus format
+ * @fmt_val: the fmt val corresponding to CIF_FOR register
+ */
+struct cif_input_fmt {
+	u32 mbus_code;
+	u32 fmt_val;
+	enum cif_fmt_type fmt_type;
+};
+
+/*
+ * struct rkcif_stream - Stream states TODO
+ *
+ * @vbq_lock: lock to protect buf_queue
+ * @buf_queue: queued buffer list
+ * @dummy_buf: dummy space to store dropped data
+ *
+ * rkcif use shadowsock registers, so it need two buffer at a time
+ * @curr_buf: the buffer used for current frame
+ */
+struct rkcif_stream {
+	struct rkcif_device		*cifdev;
+	enum rkcif_state		state;
+	bool				stopping;
+	wait_queue_head_t		wq_stopped;
+	int				frame_idx;
+
+	/* lock between irq and buf_queue */
+	spinlock_t			vbq_lock;
+	struct vb2_queue		buf_queue;
+	struct list_head		buf_head;
+	struct rkcif_dummy_buffer	dummy_buf;
+	struct rkcif_buffer		*curr_buf;
+
+	/* vfd lock */
+	struct mutex			vlock;
+	struct video_device		vdev;
+	/* TODO: pad for dvp and mipi separately? */
+	struct media_pad		pad;
+
+	const struct cif_output_fmt	*cif_fmt_out;
+	const struct cif_input_fmt	*cif_fmt_in;
+	struct v4l2_pix_format_mplane	pixm;
+	struct v4l2_rect		crop;
+};
+
+static inline struct rkcif_stream *to_rkcif_stream(struct video_device *vdev)
+{
+	return container_of(vdev, struct rkcif_stream, vdev);
+}
+
+/*
+ * struct rkcif_device - ISP platform device
+ * @base_addr: base register address
+ * @active_sensor: sensor in-use, set when streaming on
+ * @stream: capture video device
+ */
+struct rkcif_device {
+	struct device			*dev;
+	int				irq;
+	void __iomem			*base_addr;
+	struct clk			*clks[RKCIF_MAX_BUS_CLK];
+	int				clk_size;
+	struct vb2_alloc_ctx		*alloc_ctx;
+	bool				iommu_en;
+	struct iommu_domain		*domain;
+	struct reset_control		*cif_rst;
+
+	struct v4l2_device		v4l2_dev;
+	struct media_device		media_dev;
+	struct v4l2_ctrl_handler	ctrl_handler;
+	struct v4l2_async_notifier	notifier;
+
+	struct rkcif_sensor_info	sensors[RKCIF_MAX_SENSOR];
+	u32				num_sensors;
+	struct rkcif_sensor_info	*active_sensor;
+
+	struct rkcif_stream		stream;
+};
+
+void rkcif_unregister_stream_vdev(struct rkcif_device *dev);
+int rkcif_register_stream_vdev(struct rkcif_device *dev);
+void rkcif_stream_init(struct rkcif_device *dev);
+
+void rkcif_irq_oneframe(struct rkcif_device *cif_dev);
+void rkcif_irq_pingpong(struct rkcif_device *cif_dev);
+void rkcif_soft_reset(struct rkcif_device *cif_dev);
+
+#endif
diff --git a/drivers/media/platform/rockchip/cif/regs.h b/drivers/media/platform/rockchip/cif/regs.h
new file mode 100644
index 0000000000000..8fa9b5c6cfc1c
--- /dev/null
+++ b/drivers/media/platform/rockchip/cif/regs.h
@@ -0,0 +1,122 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Rockchip CIF Driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _RKCIF_REGS_H
+#define _RKCIF_REGS_H
+
+/* CIF Reg Offset */
+#define CIF_CTRL			0x00
+#define CIF_INTEN			0x04
+#define CIF_INTSTAT			0x08
+#define CIF_FOR				0x0c
+#define CIF_LINE_NUM_ADDR		0x10
+#define CIF_FRM0_ADDR_Y			0x14
+#define CIF_FRM0_ADDR_UV		0x18
+#define CIF_FRM1_ADDR_Y			0x1c
+#define CIF_FRM1_ADDR_UV		0x20
+#define CIF_VIR_LINE_WIDTH		0x24
+#define CIF_SET_SIZE			0x28
+#define CIF_SCM_ADDR_Y			0x2c
+#define CIF_SCM_ADDR_U			0x30
+#define CIF_SCM_ADDR_V			0x34
+#define CIF_WB_UP_FILTER		0x38
+#define CIF_WB_LOW_FILTER		0x3c
+#define CIF_WBC_CNT			0x40
+#define CIF_CROP			0x44
+#define CIF_SCL_CTRL			0x48
+#define CIF_SCL_DST			0x4c
+#define CIF_SCL_FCT			0x50
+#define CIF_SCL_VALID_NUM		0x54
+#define CIF_LINE_LOOP_CTR		0x58
+#define CIF_FRAME_STATUS		0x60
+#define CIF_CUR_DST			0x64
+#define CIF_LAST_LINE			0x68
+#define CIF_LAST_PIX			0x6c
+
+/* The key register bit description */
+
+/* CIF_CTRL Reg */
+#define DISABLE_CAPTURE			(0x0 << 0)
+#define ENABLE_CAPTURE			(0x1 << 0)
+#define MODE_ONEFRAME			(0x0 << 1)
+#define MODE_PINGPONG			(0x1 << 1)
+#define MODE_LINELOOP			(0x2 << 1)
+#define AXI_BURST_16			(0xF << 12)
+
+/* CIF_INTEN */
+#define INTEN_DISABLE			(0x0 << 0)
+#define FRAME_END_EN			(0x1 << 0)
+#define BUS_ERR_EN			(0x1 << 6)
+#define SCL_ERR_EN			(0x1 << 7)
+#define PST_INF_FRAME_END_EN		(0x1 << 9)
+
+/* CIF INTSTAT */
+#define INTSTAT_CLS			(0x3FF)
+#define FRAME_END			(0x01 << 0)
+#define PST_INF_FRAME_END		(0x01 << 9)
+#define FRAME_END_CLR			(0x01 << 0)
+#define PST_INF_FRAME_END_CLR		(0x01 << 9)
+#define INTSTAT_ERR			(0xFC)
+
+/* FRAME STATUS */
+#define FRAME_STAT_CLS			0x00
+#define FRM0_STAT_CLS			0x20	/* write 0 to clear frame 0 */
+
+/* CIF FORMAT */
+#define VSY_HIGH_ACTIVE			(0x01 << 0)
+#define VSY_LOW_ACTIVE			(0x00 << 0)
+#define HSY_LOW_ACTIVE			(0x01 << 1)
+#define HSY_HIGH_ACTIVE			(0x00 << 1)
+#define INPUT_MODE_YUV			(0x00 << 2)
+#define INPUT_MODE_PAL			(0x02 << 2)
+#define INPUT_MODE_NTSC			(0x03 << 2)
+#define INPUT_MODE_RAW			(0x04 << 2)
+#define INPUT_MODE_JPEG			(0x05 << 2)
+#define INPUT_MODE_MIPI			(0x06 << 2)
+#define YUV_INPUT_ORDER_UYVY		(0x00 << 5)
+#define YUV_INPUT_ORDER_YVYU		(0x01 << 5)
+#define YUV_INPUT_ORDER_VYUY		(0x10 << 5)
+#define YUV_INPUT_ORDER_YUYV		(0x03 << 5)
+#define YUV_INPUT_422			(0x00 << 7)
+#define YUV_INPUT_420			(0x01 << 7)
+#define INPUT_420_ORDER_EVEN		(0x00 << 8)
+#define INPUT_420_ORDER_ODD		(0x01 << 8)
+#define CCIR_INPUT_ORDER_ODD		(0x00 << 9)
+#define CCIR_INPUT_ORDER_EVEN		(0x01 << 9)
+#define RAW_DATA_WIDTH_8		(0x00 << 11)
+#define RAW_DATA_WIDTH_10		(0x01 << 11)
+#define RAW_DATA_WIDTH_12		(0x02 << 11)
+#define YUV_OUTPUT_422			(0x00 << 16)
+#define YUV_OUTPUT_420			(0x01 << 16)
+#define OUTPUT_420_ORDER_EVEN		(0x00 << 17)
+#define OUTPUT_420_ORDER_ODD		(0x01 << 17)
+#define RAWD_DATA_LITTLE_ENDIAN		(0x00 << 18)
+#define RAWD_DATA_BIG_ENDIAN		(0x01 << 18)
+#define UV_STORAGE_ORDER_UVUV		(0x00 << 19)
+#define UV_STORAGE_ORDER_VUVU		(0x01 << 19)
+
+/* CIF_SCL_CTRL */
+#define ENABLE_SCL_DOWN			(0x01 << 0)
+#define DISABLE_SCL_DOWN		(0x00 << 0)
+#define ENABLE_SCL_UP			(0x01 << 1)
+#define DISABLE_SCL_UP			(0x00 << 1)
+#define ENABLE_YUV_16BIT_BYPASS		(0x01 << 4)
+#define DISABLE_YUV_16BIT_BYPASS	(0x00 << 4)
+#define ENABLE_RAW_16BIT_BYPASS		(0x01 << 5)
+#define DISABLE_RAW_16BIT_BYPASS	(0x00 << 5)
+#define ENABLE_32BIT_BYPASS		(0x01 << 6)
+#define DISABLE_32BIT_BYPASS		(0x00 << 6)
+
+/* CIF_INTSTAT */
+#define CIF_F0_READY			(0x01 << 0)
+#define CIF_F1_READY			(0x01 << 1)
+
+/* CIF CROP */
+#define CIF_CROP_Y_SHIFT		16
+#define CIF_CROP_X_SHIFT		0
+
+#endif

From 0ee0d8587980297223bc3d4b24b64881045ce206 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Fri, 6 Jul 2018 17:05:48 +0800
Subject: [PATCH 0564/1852] ARM: dts: rockchip: add a new cif node for rk312x

Add a new cif node compatible with rk_cif.

Change-Id: Icac6021f0b1e850c589176689ee9a8de3b5f4118
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/rk312x.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index f21ea5fc051c2..6fa1c69350dc0 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -537,6 +537,24 @@
 		status = "disabled";
 	};
 
+	cif_new: cif-new@1010a000 {
+		compatible = "rockchip,rk3128-cif";
+		reg = <0x1010a000 0x200>;
+
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>,
+			 <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif", "hclk_cif",
+			      "sclk_cif_out";
+		resets = <&cru SRST_CIF0>;
+		reset-names = "rst_cif";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		/* rk312x has not iommu attached */
+		/* iommus = <&cif_mmu>; */
+		power-domains = <&power RK3128_PD_VIO>;
+
+		status = "disabled";
+	};
+
 	rga: rga@1010c000 {
 		compatible = "rockchip,rk312x-rga";
 		reg = <0x1010c000 0x1000>;

From eb61374d07a3c0c5b464e06e0bbb5e375ba5cc44 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Thu, 31 May 2018 09:01:38 +0800
Subject: [PATCH 0565/1852] ARM: dts: rockchip: add cif and adv7181 for
 px3se-evb

This enables cif and adds adv7181 device nodes.

Change-Id: Id8ca2ef30ff22032f12ecee3333ac1db51795228
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/px3se-evb.dts | 67 +++++++++++++++++++++++++++++++--
 1 file changed, 64 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts
index fe609cdfed011..f9cd97224799b 100644
--- a/arch/arm/boot/dts/px3se-evb.dts
+++ b/arch/arm/boot/dts/px3se-evb.dts
@@ -145,6 +145,14 @@
 		vin-supply = <&vcc_io>;
 	};
 
+	vcc_cvbs_33: vcc-cvbs-33 {
+		compatible = "regulator-fixed";
+		regulator-name= "vcc-cvbs-33";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&pmic_vcc_cvbs_33>;
+	};
+
 	vcc_sys: vcc-sys {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc_sys";
@@ -173,6 +181,22 @@
 		vin-supply = <&vcc_io>;
 	};
 
+	dvdd_1v8: dvdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "dvdd-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_18>;
+	};
+
+	dvdd_3v3: dvdd-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "dvdd-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_cvbs_33>;
+	};
+
 	wireless-bluetooth {
 		compatible = "bluetooth-platdata";
 
@@ -235,6 +259,18 @@
 	};
 };
 
+&cif_new {
+	status = "okay";
+
+	port {
+		cif_in: endpoint {
+			remote-endpoint = <&adv7181_out>;
+			vsync-active = <0>;
+			hsync-active = <1>;
+		};
+	};
+};
+
 &cpu0 {
 	cpu-supply = <&vdd_arm>;
 };
@@ -415,8 +451,6 @@
 				regulator-name= "pmic-vcc-cvbs-33";
 				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
@@ -449,7 +483,8 @@
 &i2c2 {
 	status = "okay";
 	clock-frequency = <400000>;
-	ts@14 {
+
+	touchscreen: ts@14 {
 		compatible = "goodix,gt9xx";
 		reg = <0x14>;
 		touch-gpio = <&gpio1 8 IRQ_TYPE_LEVEL_LOW>;
@@ -461,6 +496,26 @@
 		tp-supply = <&pmic_vcc_tp_33>;
 		status = "okay";
 	};
+
+	camera: adv7181@21 {
+		compatible = "adi,adv7181";
+		reg = <0x21>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_rst>;
+
+		dvdd-supply = <&dvdd_1v8>;
+		dvddio-supply = <&dvdd_3v3>;
+		reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
+
+		status = "okay";
+
+		port {
+			adv7181_out: endpoint {
+				remote-endpoint = <&cif_in>;
+			};
+		};
+	};
 };
 
 &pwm0 {
@@ -543,6 +598,12 @@
 };
 
 &pinctrl {
+	camera {
+		cif_rst: cif-rst {
+			rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_default>;

From 1296934db95f639e10c40d7f9ff096e08c41b5ff Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Thu, 28 Jun 2018 15:09:25 +0800
Subject: [PATCH 0566/1852] ARM: config: enable CIF and ADV7181D for
 rockchip_linux_defconfig

This enables CONFIG_VIDEO_ROCKCHIP_CIF and CONFIG_VIDEO_ADV7181D
for rockchip_linux_defconfig.

Change-Id: I657e757d80a8e2a581631eedd2b3a19254658883
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/configs/rockchip_linux_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/rockchip_linux_defconfig b/arch/arm/configs/rockchip_linux_defconfig
index f1cec6866df35..2e3d730734a76 100644
--- a/arch/arm/configs/rockchip_linux_defconfig
+++ b/arch/arm/configs/rockchip_linux_defconfig
@@ -295,12 +295,14 @@ CONFIG_USB_VIDEO_CLASS=y
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
 CONFIG_VIDEO_RK_CIF_ISP10=y
+CONFIG_VIDEO_ROCKCHIP_CIF=y
 CONFIG_VIDEO_ROCKCHIP_ISP1=y
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_ROCKCHIP_RGA=y
 CONFIG_VIDEO_ROCKCHIP_VPU=y
 CONFIG_V4L_TEST_DRIVERS=y
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_ADV7181D=y
 CONFIG_VIDEO_TC35874X=y
 CONFIG_VIDEO_IMX219=y
 CONFIG_VIDEO_OV5647=y

From 788c97b7e64ecb5d82d20f5797358ad6b36f71a6 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Fri, 29 Jun 2018 17:42:03 +0800
Subject: [PATCH 0567/1852] ARM: dts: rockchip: enable i2s/codec for px3se-evb

Px3se-evb board has two codecs es8396 and rk312x-codec.
ES8396 is enable by default. One can switch to rk312x-codec
via hardware rework: R7007, R7005, R7214, R7215.

This adds both es8396 and rk312x-codec but makes the latter one
disabled.

Change-Id: I51cad8bc50da8500c527d10ed52465c8f55d77c7
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/px3se-evb.dts | 76 +++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts
index f9cd97224799b..093251b3e30c5 100644
--- a/arch/arm/boot/dts/px3se-evb.dts
+++ b/arch/arm/boot/dts/px3se-evb.dts
@@ -113,6 +113,45 @@
 		reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 	};
 
+	sound-rk312x {
+		compatible = "simple-audio-card";
+		status = "disabled";
+
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "rockchip,rk312x-codec";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_8ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&codec>;
+		};
+	};
+
+	sound-es8396 {
+		compatible = "simple-audio-card";
+		status = "okay";
+
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,es8396-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Microphone Jack",
+			"Line", "Microphone Headset",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"MIC", "Microphone Jack",
+			"DMIC", "Microphone Headset",
+			"Headphone Jack", "LOUTP",
+			"Headphone Jack", "ROUTN";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&es8396>;
+		};
+	};
+
 	usb_control {
 		compatible = "rockchip,rk3126-usb-control";
 
@@ -271,6 +310,20 @@
 	};
 };
 
+&codec {
+	#sound-dai-cells = <0>;
+	hp-ctl-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+	spk-ctl-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+	spk-mute-delay = <200>;
+	hp-mute-delay = <100>;
+	spk_volume = <25>;
+	hp_volume = <25>;
+	capture_volume = <26>;
+	gpio_debug = <1>;
+	codec_hp_det = <1>;
+	status = "disabled";
+};
+
 &cpu0 {
 	cpu-supply = <&vdd_arm>;
 };
@@ -516,6 +569,29 @@
 			};
 		};
 	};
+
+	es8396: es8396@11 {
+		status = "okay";
+		#sound-dai-cells = <0>;
+		compatible = "es8396";
+		reg = <0x11>;
+		clock-names = "mclk";
+		clocks = <&cru SCLK_I2S_OUT>;
+		spk-con-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+		lineout-con-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&i2s_2ch {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2s_bus>;
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&i2s_8ch {
+	#sound-dai-cells = <0>;
+	status = "disabled";
 };
 
 &pwm0 {

From 82bdcbe2f0004578c854e8f60c50bf56a991fbc1 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 9 Jul 2018 15:32:28 +0800
Subject: [PATCH 0568/1852] Revert "arm64: defconfig: rk3308_linux_defconfig:
 enable CONFIG_CYW_BCMDHD"

This reverts commit e2e7ae22030347c2593c5990ef998642518c94dd.
This is a temporary workaround.

Change-Id: I77dbfec1e5e4d9921bc8b8bf6fc8687e7b1744e2
Signed-off-by: Xiao Yao <xiaoyao@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index a1555cb1479fd..7702eb755c818 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -95,7 +95,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_ETHERNET is not set
 CONFIG_WL_ROCKCHIP=y
 CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y
-CONFIG_CYW_BCMDHD=y
+CONFIG_AP6XXX=y
 # CONFIG_RTL_WIRELESS_SOLUTION is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y

From 9b2bb8624f71ffd4f2b8164c465f91649126fe7c Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Mon, 9 Jul 2018 15:53:21 +0800
Subject: [PATCH 0569/1852] drm/rockchip: Sanity check fbdev_helper

The fbdev_helper would not be available when CONFIG_DRM_FBDEV_EMULATION
is disabled.

Change-Id: I9f79c170e862f24eb717c7940d8acaefd060740f
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 4519d72507197..c24c6d907549a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -1485,6 +1485,9 @@ static int rockchip_drm_bind(struct device *dev)
 		struct drm_fb_helper *helper = private->fbdev_helper;
 		struct rockchip_crtc_state *s = NULL;
 
+		if (!helper)
+			break;
+
 		s = to_rockchip_crtc_state(crtc->state);
 		if (is_support_hotplug(s->output_type)) {
 			s->crtc_primary_fb = crtc->primary->fb;

From 3f2ab13fdf00493fb96c24d984c8c1c05c2c8420 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Mon, 2 Jul 2018 20:30:18 +0800
Subject: [PATCH 0570/1852] ASoC: rk3308_codec: fix the orders of dac path
 state

Change-Id: Ibfba1a4db2ba2a9a52d79bfe4b0b55be104a61a6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index b7e68360624b4..328e6c53b272f 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -2587,14 +2587,12 @@ static int rk3308_codec_close_capture(struct rk3308_codec_priv *rk3308)
 static int rk3308_codec_open_playback(struct rk3308_codec_priv *rk3308)
 {
 	rk3308_codec_dac_enable(rk3308);
-	rk3308_codec_set_dac_path_state(rk3308, PATH_BUSY);
 
 	return 0;
 }
 
 static int rk3308_codec_close_playback(struct rk3308_codec_priv *rk3308)
 {
-	rk3308_codec_set_dac_path_state(rk3308, PATH_IDLE);
 	rk3308_codec_dac_disable(rk3308);
 
 	return 0;
@@ -2706,6 +2704,7 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
 		rk3308_codec_dac_mclk_enable(rk3308);
 		rk3308_codec_open_playback(rk3308);
 		rk3308_codec_dac_dig_config(rk3308, params);
+		rk3308_codec_set_dac_path_state(rk3308, PATH_BUSY);
 	} else {
 		rk3308_codec_adc_mclk_enable(rk3308);
 		ret = rk3308_codec_update_adc_grps(rk3308, params);
@@ -2797,13 +2796,15 @@ static void rk3308_pcm_shutdown(struct snd_pcm_substream *substream,
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		rk3308_codec_close_playback(rk3308);
 		rk3308_codec_dac_mclk_disable(rk3308);
+		regcache_cache_only(rk3308->regmap, false);
+		regcache_sync(rk3308->regmap);
+		rk3308_codec_set_dac_path_state(rk3308, PATH_IDLE);
 	} else {
 		rk3308_codec_close_capture(rk3308);
 		rk3308_codec_adc_mclk_disable(rk3308);
+		regcache_cache_only(rk3308->regmap, false);
+		regcache_sync(rk3308->regmap);
 	}
-
-	regcache_cache_only(rk3308->regmap, false);
-	regcache_sync(rk3308->regmap);
 }
 
 static struct snd_soc_dai_ops rk3308_dai_ops = {

From e9bd594879277005ffcb3cabd3ead5d85d73741b Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 6 Jul 2018 22:28:22 +0800
Subject: [PATCH 0571/1852] ASoC: rk3308_codec: add 'rockchip,en-always-grps'
 property

If we would like to wake up via VAD with ACODEC and AMIC,
we need to keep enabling aocdec ADCs after close audio
capture stream, otherwise, the DUT can not be waken up.

This patch can help us to specify the needed ADCs which
are just used for VAD, other ADCs can be closed during
stop capture stream.

Change-Id: I621343902b8c603a5fcbd7875aaa562a29386b04
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 164 +++++++++++++++++++++++++++++++-
 1 file changed, 159 insertions(+), 5 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 328e6c53b272f..76c6e2b1e7cc6 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -54,12 +54,13 @@
 #define CODEC_DRV_NAME			"rk3308-acodec"
 
 #define ADC_GRP_SKIP_MAGIC		0x1001
+#define ADC_GRP_SKIP_MAGIC2		0x1002
 #define ADC_LR_GROUP_MAX		4
 #define ADC_STABLE_MS			20
 #define DEBUG_POP_ALWAYS		0
 #define ENABLE_AGC			0
 #define HPDET_POLL_MS			2000
-#define LOOPBACK_NO_USE			255
+#define NOT_USED			255
 #define LOOPBACK_HANDLE_MS		100
 
 #define GRF_SOC_CON1			0x304
@@ -94,6 +95,7 @@ enum {
 enum {
 	ADC_TYPE_NORMAL = 0,
 	ADC_TYPE_LOOPBACK,
+	ADC_TYPE_ALL,
 };
 
 enum {
@@ -141,6 +143,9 @@ struct rk3308_codec_priv {
 	u32 used_adc_grps;
 	/* The ADC group which is used for loop back */
 	u32 loopback_grp;
+	u32 en_always_grps[ADC_LR_GROUP_MAX];
+	u32 en_always_grps_num;
+	u32 enabled_grps[ADC_LR_GROUP_MAX];
 	u32 i2s_sdis[ADC_LR_GROUP_MAX];
 	u32 to_i2s_grps;
 	u32 delay_loopback_handle_ms;
@@ -561,10 +566,16 @@ static int rk3308_codec_hpout_r_put_tlv(struct snd_kcontrol *kcontrol,
 	return snd_soc_put_volsw_range(kcontrol, ucontrol);
 }
 
+static u32 to_mapped_grp(struct rk3308_codec_priv *rk3308, int idx)
+{
+	return rk3308->i2s_sdis[idx];
+}
+
 static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 			     int type, int idx, u32 *grp)
 {
 	if (type == ADC_TYPE_NORMAL) {
+		u32 mapped_grp = to_mapped_grp(rk3308, idx);
 		int max_grps;
 
 		if (rk3308->enable_all_adcs)
@@ -583,13 +594,24 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 			 * loopback ADCs.
 			 */
 			*grp = ADC_GRP_SKIP_MAGIC;
+		} else if (rk3308->enabled_grps[mapped_grp]) {
+			/* To set the skip flag if the ADC GRP is enabled. */
+			*grp = ADC_GRP_SKIP_MAGIC2;
 		} else {
-			*grp = rk3308->i2s_sdis[idx];
+			*grp = mapped_grp;
 		}
 
 		dev_dbg(rk3308->plat_dev,
 			"ADC_TYPE_NORMAL, idx: %d, get grp: %d\n",
 			idx, *grp);
+	} else if (type == ADC_TYPE_ALL) {
+		if (idx >= ADC_LR_GROUP_MAX)
+			return false;
+
+		*grp = idx;
+		dev_dbg(rk3308->plat_dev,
+			"ADC_TYPE_ALL, idx: %d, get grp: %d\n",
+			idx, *grp);
 	} else {
 		if (idx >= 1)
 			return false;
@@ -1893,6 +1915,19 @@ static bool has_loopback(int loopback_grp)
 	return false;
 }
 
+static bool has_en_always_grps(struct rk3308_codec_priv *rk3308)
+{
+	int idx;
+
+	for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
+		if (rk3308->en_always_grps[idx] >= 0 &&
+		    rk3308->en_always_grps[idx] <= ADC_LR_GROUP_MAX - 1)
+			return true;
+	}
+
+	return false;
+}
+
 static int rk3308_codec_micbias_enable(struct rk3308_codec_priv *rk3308,
 				       int micbias)
 {
@@ -2082,6 +2117,9 @@ static int rk3308_codec_alc_disable(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/*
 		 * 1. Set ACODEC_ALC_DIG_CON9[6] to 0x0, to disable the ALC
 		 * module, then the ALC output gain will keep to the last value
@@ -2095,6 +2133,9 @@ static int rk3308_codec_alc_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/*
 		 * 2. Set ACODEC_ADC_ANA_CON11[1:0], (ACODEC_ADC_ANA_CON11+0x40)
 		 * [1:0], (ACODEC_ADC_ANA_CON11+0x80)[1:0] and
@@ -2403,6 +2444,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 1 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ZEROCROSS_DET_EN |
@@ -2412,6 +2456,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 2 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_EN |
@@ -2421,6 +2468,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 3 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_CLK_EN |
@@ -2430,6 +2480,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 4 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_EN |
@@ -2439,6 +2492,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 5 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_EN |
@@ -2448,6 +2504,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 6 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_BUF_REF_EN |
@@ -2457,6 +2516,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 7 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON06(grp),
 				   RK3308_ADC_CURRENT_MSK,
@@ -2464,6 +2526,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 8 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
 				   RK3308_ADC_CH1_ADC_WORK |
@@ -2473,6 +2538,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 9 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
 				   RK3308_ADC_CH1_ALC_WORK |
@@ -2482,6 +2550,9 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp == ADC_GRP_SKIP_MAGIC2)
+			continue;
+
 		/* vendor step 10 */
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
 				   RK3308_ADC_CH1_MIC_WORK |
@@ -2576,6 +2647,14 @@ static void rk3308_codec_dac_mclk_enable(struct rk3308_codec_priv *rk3308)
 	udelay(20);
 }
 
+static int rk3308_codec_close_all_capture(struct rk3308_codec_priv *rk3308)
+{
+	rk3308_codec_alc_disable(rk3308, ADC_TYPE_ALL);
+	rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_ALL);
+
+	return 0;
+}
+
 static int rk3308_codec_close_capture(struct rk3308_codec_priv *rk3308)
 {
 	rk3308_codec_alc_disable(rk3308, ADC_TYPE_NORMAL);
@@ -2687,6 +2766,32 @@ static void rk3308_codec_set_pm_state(struct rk3308_codec_priv *rk3308,
 	return;
 }
 
+static void rk3308_codec_update_adcs_status(struct rk3308_codec_priv *rk3308,
+					    int state)
+{
+	int idx;
+
+	if (state == PATH_BUSY) {
+		/*
+		 * The used_adc_grps points out the current max ADC grps
+		 * dynamically during enable ADCs.
+		 */
+		for (idx = 0; idx < rk3308->en_always_grps_num; idx++) {
+			u32 mapped_grp = to_mapped_grp(rk3308, idx);
+
+			rk3308->enabled_grps[mapped_grp] = 1;
+		}
+	} else {
+		/* Clear all of enabled_grps flags if en_always_grps is 0 */
+		for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
+			if (rk3308->en_always_grps[idx])
+				continue;
+
+			rk3308->enabled_grps[idx] = 0;
+		}
+	}
+}
+
 static int rk3308_hw_params(struct snd_pcm_substream *substream,
 			    struct snd_pcm_hw_params *params,
 			    struct snd_soc_dai *dai)
@@ -2740,6 +2845,7 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
 
 		rk3308_codec_open_capture(rk3308);
 		rk3308_codec_adc_dig_config(rk3308, params);
+		rk3308_codec_update_adcs_status(rk3308, PATH_BUSY);
 	}
 
 	return 0;
@@ -2801,9 +2907,12 @@ static void rk3308_pcm_shutdown(struct snd_pcm_substream *substream,
 		rk3308_codec_set_dac_path_state(rk3308, PATH_IDLE);
 	} else {
 		rk3308_codec_close_capture(rk3308);
-		rk3308_codec_adc_mclk_disable(rk3308);
+		if (!has_en_always_grps(rk3308))
+			rk3308_codec_adc_mclk_disable(rk3308);
+
 		regcache_cache_only(rk3308->regmap, false);
 		regcache_sync(rk3308->regmap);
+		rk3308_codec_update_adcs_status(rk3308, PATH_IDLE);
 	}
 }
 
@@ -2948,11 +3057,49 @@ static int rk3308_codec_default_gains(struct rk3308_codec_priv *rk3308)
 	return 0;
 }
 
+static int rk3308_codec_setup_en_always_adcs(struct rk3308_codec_priv *rk3308,
+					     struct device_node *np)
+{
+	int num, ret;
+
+	num = of_count_phandle_with_args(np, "rockchip,en-always-grps", NULL);
+	if (num < 0) {
+		if (num == -ENOENT) {
+			/*
+			 * If there is note use 'rockchip,en-always-grps'
+			 * property, return 0 is also right.
+			 */
+			ret = 0;
+		} else {
+			dev_err(rk3308->plat_dev,
+				"Failed to read 'rockchip,adc-grps-route' num: %d\n",
+				num);
+			ret = num;
+		}
+
+		rk3308->en_always_grps_num = 0;
+		return ret;
+	}
+
+	rk3308->en_always_grps_num = num;
+
+	ret = of_property_read_u32_array(np, "rockchip,en-always-grps",
+					 rk3308->en_always_grps, num);
+	if (ret < 0) {
+		dev_err(rk3308->plat_dev,
+			"Failed to read 'rockchip,en-always-grps': %d\n",
+			ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int rk3308_codec_prepare(struct rk3308_codec_priv *rk3308)
 {
 	/* Clear registers for ADC and DAC */
 	rk3308_codec_close_playback(rk3308);
-	rk3308_codec_close_capture(rk3308);
+	rk3308_codec_close_all_capture(rk3308);
 	rk3308_codec_default_gains(rk3308);
 	rk3308_codec_llp_down(rk3308);
 
@@ -3683,7 +3830,7 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	ret = of_property_read_u32(np, "rockchip,delay-loopback-handle-ms",
 				   &rk3308->delay_loopback_handle_ms);
 
-	rk3308->loopback_grp = LOOPBACK_NO_USE;
+	rk3308->loopback_grp = NOT_USED;
 	ret = of_property_read_u32(np, "rockchip,loopback-grp",
 				   &rk3308->loopback_grp);
 	/*
@@ -3703,6 +3850,13 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = rk3308_codec_setup_en_always_adcs(rk3308, np);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to setup enabled always ADCs: %d\n",
+			ret);
+		return ret;
+	}
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(base)) {

From e523f182920b6ef6368acaabc302abb404330746 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 6 Jul 2018 22:33:10 +0800
Subject: [PATCH 0572/1852] ASoC: rk3308_codec: add property
 'rockchip,en-always-grps'

Change-Id: I5965bb1b17bb5f94fa977cd846502e18897cbcf3
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,rk3308-codec.txt         | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
index b04be9ac11197..5384c24424f1e 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
@@ -40,6 +40,8 @@ Optional properties:
 
 - rockchip,delay-loopback-handle-ms: This property points out that the delay for
   handling ADC after enable PAs during loopback.
+- rockchip,en-always-grps: This property will keep the needed ADCs enabled
+  always after enabling once.
 - rockchip,loopback-grp: It points out the ADC group which is the loopback used.
 - rockchip,no-deep-low-power: The codec will not enter deep low power mode
   during suspend.

From d330b2c096e61d5b5c02f5a460dd37f44baa2719 Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Mon, 9 Jul 2018 23:24:51 +0800
Subject: [PATCH 0573/1852] arm64: dts: rockchip: add px30 evb ddr3 v10 board
 for linux

This board exposes a bunch of nice peripherals, including MIPI CSI/CIF,
Ethernet, WIFI, two VOPs and USB HOST/OTG....

Change-Id: I8ca3bc231875c92e5a5b9ed8016bc89feb134fb0
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 .../devicetree/bindings/arm/rockchip.txt      |   2 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../dts/rockchip/px30-evb-ddr3-v10-linux.dts  | 888 ++++++++++++++++++
 3 files changed, 891 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index d34e8fe9fca87..869dbba0361e0 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -126,6 +126,8 @@ Rockchip platforms device tree bindings
 - Rockchip PX30 evb ddr3 board:
     Required root node properties:
       - compatible = "rockchip,px30-evb-ddr3-v10", "rockchip,px30";
+    Or
+      - compatible = "rockchip,px30-evb-ddr3-v10-linux", "rockchip,px30";
 
 - Rockchip PX30 evb ddr4 board:
     Required root node properties:
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 6a9298751c288..6b1075591ae6a 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-lvds-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ai-va-v10.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts
new file mode 100644
index 0000000000000..d066f8abca5a3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts
@@ -0,0 +1,888 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/display/drm_mipi_dsi.h>
+#include <dt-bindings/sensor-dev.h>
+#include "px30.dtsi"
+#include "rk3326-linux.dtsi"
+
+/ {
+	model = "Rockchip linux PX30 evb ddr3 board";
+	compatible = "rockchip,px30-evb-ddr3-v10-linux", "rockchip,px30";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		esc-key {
+			linux,code = <KEY_ESC>;
+			label = "esc";
+			press-threshold-microvolt = <1310000>;
+		};
+
+		home-key {
+			linux,code = <KEY_HOME>;
+			label = "home";
+			press-threshold-microvolt = <624000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <987000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <17000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	charge-animation {
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <0>;
+		rockchip,android-charge-on = <1>;
+		rockchip,uboot-low-power-voltage = <3500>;
+		rockchip,screen-on-voltage = <3600>;
+		status = "okay";
+	};
+
+	rk809-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,rk809-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"Mic Jack", "MICBIAS1",
+			"IN1P", "Mic Jack",
+			"Headphone Jack", "HPOL",
+			"Headphone Jack", "HPOR";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&rk809_codec>;
+		};
+	};
+
+	rk_headset {
+		compatible = "rockchip_headset";
+		headset_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det>;
+		io-channels = <&saradc 1>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		/*clocks = <&rk809 1>;*/
+		/*clock-names = "ext_clock";*/
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc5v0_sys: vccsys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		wifi_chip_type = "AP6210";
+		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&rk809 1>;
+		clock-names = "ext_clock";
+		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default","rts_gpio";
+		pinctrl-0 = <&uart1_rts>;
+		pinctrl-1 = <&uart1_rts_gpio>;
+		BT,reset_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		compatible = "sitronix,st7703", "simple-panel-dsi";
+		reg = <0>;
+		power-supply = <&vcc3v3_lcd>;
+		backlight = <&backlight>;
+		prepare-delay-ms = <2>;
+		reset-delay-ms = <1>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <50>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <68>;
+		height-mm = <121>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			05 fa 01 11
+			39 00 04 b9 f1 12 83
+			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
+				 00 00 00 00 00 44 25 00 91 0a
+				 00 00 02 4f 01 00 00 37
+			15 00 02 b8 25
+			39 00 04 bf 02 11 00
+			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
+				 00
+			39 00 0a c0 73 73 50 50 00 00 08 70 00
+			15 00 02 bc 46
+			15 00 02 cc 0b
+			15 00 02 b4 80
+			39 00 04 b2 c8 12 30
+			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
+				 00 ff 00 c0 10
+			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
+				 77 33 33
+			39 00 07 c6 00 00 ff ff 01 ff
+			39 00 03 b5 09 09
+			39 00 03 b6 87 95
+			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
+				 23 3f 81 0a a0 37 18 00 80 01
+				 00 00 00 00 80 01 00 00 00 48
+				 f8 86 42 08 88 88 80 88 88 88
+				 58 f8 87 53 18 88 88 81 88 88
+				 88 00 00 00 01 00 00 00 00 00
+				 00 00 00 00
+			39 00 3e ea 00 1a 00 00 00 00 02 00 00
+				 00 00 00 1f 88 81 35 78 88 88
+				 85 88 88 88 0f 88 80 24 68 88
+				 88 84 88 88 88 23 10 00 00 1c
+				 00 00 00 00 00 00 00 00 00 00
+				 00 00 00 00 00 30 05 a0 00 00
+				 00 00
+			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
+				 0c 0d 11 13 12 13 11 18 00 06
+				 08 2a 31 3f 38 36 07 0c 0d 11
+				 13 12 13 11 18
+			05 32 01 29
+		];
+
+		panel-exit-sequence = [
+			05 00 01 28
+			05 00 01 10
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <64000000>;
+				hactive = <720>;
+				vactive = <1280>;
+				hfront-porch = <40>;
+				hsync-len = <10>;
+				hback-porch = <40>;
+				vfront-porch = <22>;
+				vsync-len = <4>;
+				vback-porch = <11>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
+&bus_apll {
+	bus-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&dsi_in_vopl {
+	status = "disabled";
+};
+
+&dfi {
+	status = "okay";
+};
+
+&dmc {
+	center-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&gmac {
+	phy-supply = <&vcc_phy>;
+	clock_in_out = "output";
+	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 50000 50000>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	rk809: pmic@20 {
+		compatible = "rockchip,rk809";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default", "pmic-sleep",
+				"pmic-power-off", "pmic-reset";
+		pinctrl-0 = <&pmic_int>;
+		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
+		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
+		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		//fb-inner-reg-idxs = <2>;
+		/* 1: rst regs (default in codes), 0: rst the pmic */
+		pmic-reset-func = <1>;
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc5-supply = <&vcc3v3_sys>;
+		vcc6-supply = <&vcc3v3_sys>;
+		vcc7-supply = <&vcc3v3_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+
+		pwrkey {
+			status = "okay";
+		};
+
+		pinctrl_rk8xx: pinctrl_rk8xx {
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			rk817_slppin_null: rk817_slppin_null {
+				pins = "gpio_slp";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_slp: rk817_slppin_slp {
+				pins = "gpio_slp";
+				function = "pin_fun1";
+			};
+
+			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
+				pins = "gpio_slp";
+				function = "pin_fun2";
+			};
+
+			rk817_slppin_rst: rk817_slppin_rst {
+				pins = "gpio_slp";
+				function = "pin_fun3";
+			};
+		};
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_ddr";
+				regulator-initial-mode = <0x2>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v0: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc_1v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcc3v3_sys: DCDC_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc3v3_sys";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc3v3_lcd: SWITCH_REG1 {
+				regulator-boot-on;
+				regulator-name = "vcc3v3_lcd";
+			};
+
+			vcc5v0_host: SWITCH_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc5v0_host";
+			};
+		};
+
+		rk809_codec: codec {
+			#sound-dai-cells = <0>;
+			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
+			clocks = <&cru SCLK_I2S1_OUT>;
+			clock-names = "mclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2s1_2ch_mclk>;
+			hp-volume = <20>;
+			spk-volume = <3>;
+			status = "okay";
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	sensor@f {
+		status = "okay";
+		compatible = "ak8963";
+		reg = <0x0f>;
+		type = <SENSOR_TYPE_COMPASS>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		layout = <1>;
+		reprobe_en = <1>;
+	};
+
+	gt1x: gt1x@14 {
+		compatible = "goodix,gt1x";
+		reg = <0x14>;
+		power-supply = <&vcc3v3_lcd>;
+		goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+		goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	sensor@4c {
+		status = "okay";
+		compatible = "gs_mma7660";
+		reg = <0x4c>;
+		type = <SENSOR_TYPE_ACCEL>;
+		irq-gpio = <&gpio0 RK_PB7 IRQ_TYPE_LEVEL_LOW>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		layout = <2>;
+		reprobe_en = <1>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	clock-frequency = <100000>;
+
+	/* These are relatively safe rise/fall times; TODO: measure */
+	i2c-scl-falling-time-ns = <50>;
+	i2c-scl-rising-time-ns = <300>;
+
+	ov5695: ov5695@36 {
+		compatible = "ovti,ov5695";
+		reg = <0x36>;
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+		/*reset-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;*/
+		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+		port {
+			ucam_out: endpoint {
+				remote-endpoint = <&mipi_in_ucam>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&i2s1_2ch {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vcc1v8_soc>;
+	vccio2-supply = <&vccio_sd>;
+	vccio3-supply = <&vcc_3v0>;
+	vccio4-supply = <&vcc3v0_pmu>;
+	vccio5-supply = <&vcc_3v0>;
+};
+
+&isp_mmu {
+	status = "okay";
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&mipi_dphy_rx0 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in_ucam: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&ucam_out>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dphy_rx0_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&isp0_mipi_in>;
+			};
+		};
+	};
+};
+
+&nandc0 {
+	status = "okay";
+};
+
+&pmu_io_domains {
+	status = "okay";
+
+	pmuio1-supply = <&vcc3v0_pmu>;
+	pmuio2-supply = <&vcc3v0_pmu>;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&rk_rga {
+	status = "okay";
+};
+
+&rkisp1 {
+	status = "okay";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		isp0_mipi_in: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&dphy_rx0_out>;
+		};
+	};
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <1>;
+};
+
+&route_dsi {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc1v8_soc>;
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&tsadc {
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&tsadc_otp_gpio>;
+	pinctrl-1 = <&tsadc_otp_out>;
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts>;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+
+	u2phy_otg: otg-port {
+		status = "okay";
+	};
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&vpu_combo {
+	status = "okay";
+};
+
+&pinctrl {
+	headphone {
+		hp_det: hp-det {
+			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic_int {
+			rockchip,pins =
+				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		soc_slppin_gpio: soc_slppin_gpio {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		soc_slppin_slp: soc_slppin_slp {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+		};
+
+		soc_slppin_rst: soc_slppin_rst {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */
+

From 60cfb5ac61f22a90cc85747e96e9c7c9561e6c57 Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Tue, 10 Jul 2018 12:39:27 +0800
Subject: [PATCH 0574/1852] arm64: px30_linux_defconfig: add configure for px30
 SoCs

Change-Id: I610c49dcedb7d283f904b8754200b883882945fd
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 arch/arm64/configs/px30_linux_defconfig | 517 ++++++++++++++++++++++++
 1 file changed, 517 insertions(+)
 create mode 100644 arch/arm64/configs/px30_linux_defconfig

diff --git a/arch/arm64/configs/px30_linux_defconfig b/arch/arm64/configs/px30_linux_defconfig
new file mode 100644
index 0000000000000..9b31b5d1814a2
--- /dev/null
+++ b/arch/arm64/configs/px30_linux_defconfig
@@ -0,0 +1,517 @@
+CONFIG_DEFAULT_HOSTNAME="localhost"
+CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_DEFAULT_USE_ENERGY_AWARE=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEASPM_POWERSAVE=y
+# CONFIG_ARM64_ERRATUM_826319 is not set
+# CONFIG_ARM64_ERRATUM_827319 is not set
+# CONFIG_ARM64_ERRATUM_824069 is not set
+# CONFIG_ARM64_ERRATUM_819472 is not set
+# CONFIG_ARM64_ERRATUM_832075 is not set
+# CONFIG_CAVIUM_ERRATUM_22375 is not set
+# CONFIG_CAVIUM_ERRATUM_23154 is not set
+CONFIG_SCHED_MC=y
+CONFIG_NR_CPUS=8
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_HZ_1000=y
+# CONFIG_COMPACTION is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZSMALLOC=y
+CONFIG_SECCOMP=y
+CONFIG_ARMV8_DEPRECATED=y
+CONFIG_SWP_EMULATION=y
+CONFIG_CP15_BARRIER_EMULATION=y
+CONFIG_SETEND_EMULATION=y
+# CONFIG_EFI is not set
+CONFIG_COMPAT=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_ARM_ROCKCHIP_CPUFREQ=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MROUTE=y
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+# CONFIG_IPV6_SIT is not set
+# CONFIG_ANDROID_PARANOID_NETWORK is not set
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIBTUSB=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBFUSB=y
+CONFIG_BT_HCIVHCI=y
+CONFIG_BT_MRVL=y
+CONFIG_BT_MRVL_SDIO=y
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_DEBUGFS=y
+CONFIG_MAC80211_DEBUG_MENU=y
+CONFIG_MAC80211_VERBOSE_DEBUG=y
+CONFIG_RFKILL=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DEBUG_DEVRES=y
+CONFIG_CONNECTOR=y
+CONFIG_ZRAM=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_NVME=y
+CONFIG_ROCKCHIP_SCR=y
+CONFIG_SRAM=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_MD=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HP is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MYRI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_PACKET_ENGINE is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+CONFIG_STMMAC_ETH=y
+# CONFIG_DWMAC_GENERIC is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_ROCKCHIP_PHY=y
+CONFIG_USB_RTL8150=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_NET_CDC_MBIM=y
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+CONFIG_LIBERTAS_THINFIRM=y
+CONFIG_USB_NET_RNDIS_WLAN=y
+CONFIG_WL_ROCKCHIP=y
+CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y
+CONFIG_AP6XXX=y
+CONFIG_RTL8188EU=y
+CONFIG_MWIFIEX=y
+CONFIG_MWIFIEX_SDIO=y
+CONFIG_INPUT_FF_MEMLESS=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_ADC=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_KEYBOARD_ROCKCHIP=y
+CONFIG_KEYBOARD_CROS_EC=y
+# CONFIG_MOUSE_PS2 is not set
+CONFIG_MOUSE_CYAPA=y
+CONFIG_MOUSE_ELAN_I2C=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_GSLX680_VR=y
+CONFIG_TOUCHSCREEN_GSL3673=y
+CONFIG_TOUCHSCREEN_GT9XX=y
+CONFIG_TOUCHSCREEN_ELAN=y
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
+CONFIG_TOUCHSCREEN_GT1X=y
+CONFIG_ROCKCHIP_REMOTECTL=y
+CONFIG_ROCKCHIP_REMOTECTL_PWM=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_RK8XX_PWRKEY=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_INPUT_GPIO=y
+# CONFIG_SERIO is not set
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=5
+CONFIG_SERIAL_8250_RUNTIME_UARTS=5
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_HW_RANDOM=y
+CONFIG_TCG_TPM=y
+CONFIG_TCG_TIS_I2C_INFINEON=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_RK3X=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_RK8XX=y
+CONFIG_BATTERY_SBS=y
+CONFIG_CHARGER_GPIO=y
+CONFIG_CHARGER_BQ24735=y
+CONFIG_BATTERY_RK817=y
+CONFIG_CHARGER_RK817=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_SYSCON_REBOOT_MODE=y
+CONFIG_POWER_AVS=y
+CONFIG_ROCKCHIP_IODOMAIN=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_MFD_CROS_EC=y
+CONFIG_MFD_CROS_EC_SPI=y
+CONFIG_MFD_RK808=y
+CONFIG_MFD_TPS6586X=y
+CONFIG_FUSB_30X=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_ACT8865=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_LP8752=y
+CONFIG_REGULATOR_MP8865=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK818=y
+CONFIG_REGULATOR_TPS6586X=y
+CONFIG_REGULATOR_XZ3216=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+# CONFIG_IR_RC5_DECODER is not set
+# CONFIG_IR_RC6_DECODER is not set
+# CONFIG_IR_JVC_DECODER is not set
+# CONFIG_IR_SONY_DECODER is not set
+# CONFIG_IR_SANYO_DECODER is not set
+# CONFIG_IR_SHARP_DECODER is not set
+# CONFIG_IR_MCE_KBD_DECODER is not set
+# CONFIG_IR_XMP_DECODER is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
+# CONFIG_USB_GSPCA is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=y
+CONFIG_VIDEO_ROCKCHIP_ISP1=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_ROCKCHIP_RGA=y
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+# CONFIG_VIDEO_IR_I2C is not set
+CONFIG_VIDEO_OV5695=y
+# CONFIG_DVB_AU8522_V4L is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+# CONFIG_DVB_TUNER_DIB0090 is not set
+# CONFIG_VGA_ARB is not set
+CONFIG_DRM=y
+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+CONFIG_DRM_DMA_SYNC=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_ROCKCHIP_LVDS=y
+CONFIG_ROCKCHIP_DRM_TVE=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_MALI_PWRSOFT_765=y
+CONFIG_MALI_BIFROST_FOR_LINUX=y
+CONFIG_MALI_BIFROST=y
+CONFIG_MALI_BIFROST_DEVFREQ=y
+CONFIG_MALI_PLATFORM_NAME="rk"
+CONFIG_MALI_BIFROST_EXPERT=y
+CONFIG_MALI_BIFROST_DEBUG=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_RK_VCODEC=y
+CONFIG_ROCKCHIP_MPP_SERVICE=y
+CONFIG_ROCKCHIP_MPP_DEVICE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_DYNAMIC_MINORS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_PROC_FS is not set
+# CONFIG_SND_PCI is not set
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_ROCKCHIP=y
+CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
+CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
+CONFIG_SND_SOC_ROCKCHIP_RT5645=y
+CONFIG_SND_SOC_ES8316=y
+CONFIG_SND_SOC_RK817=y
+CONFIG_SND_SOC_RT5616=y
+CONFIG_SND_SOC_RT5640=y
+CONFIG_SND_SOC_RT5651=y
+CONFIG_SND_SOC_SPDIF=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_USB_HIDDEV=y
+CONFIG_I2C_HID=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+# CONFIG_USB_DEFAULT_PERSIST is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PCI is not set
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_CP210X=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_KEYSPAN=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_SERIAL_OTI6858=y
+CONFIG_USB_SERIAL_QUALCOMM=y
+CONFIG_USB_SERIAL_SIERRAWIRELESS=y
+CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=500
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_TEST=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_IS31FL32XX=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_HYM8563=y
+CONFIG_RTC_DRV_RK808=y
+CONFIG_DMADEVICES=y
+CONFIG_PL330_DMA=y
+CONFIG_STAGING=y
+CONFIG_SENSORS_ISL29018=y
+CONFIG_TSL2583=y
+# CONFIG_ANDROID_TIMED_OUTPUT is not set
+CONFIG_FIQ_DEBUGGER=y
+CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
+CONFIG_FIQ_DEBUGGER_CONSOLE=y
+CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
+CONFIG_COMMON_CLK_RK808=y
+CONFIG_MAILBOX=y
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_ROCKCHIP_SUSPEND_MODE=y
+CONFIG_PM_DEVFREQ=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
+CONFIG_PM_DEVFREQ_EVENT=y
+CONFIG_MEMORY=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_ROCKCHIP_SARADC=y
+CONFIG_SENSORS_TSL2563=y
+CONFIG_IIO_SYSFS_TRIGGER=y
+CONFIG_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_USB=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_EMMC=y
+CONFIG_PHY_ROCKCHIP_DP=y
+CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY=y
+CONFIG_ANDROID=y
+CONFIG_NVMEM=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_ROCKCHIP_SIP=y
+# CONFIG_ACPI is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_XFS_FS=y
+# CONFIG_DNOTIFY is not set
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_SQUASHFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_SWAP=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_CREDENTIALS=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_FUNCTION_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_LKDTM=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
+# CONFIG_CRYPTO_ECHAINIV is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+CONFIG_PKCS7_MESSAGE_PARSER=y
+CONFIG_SYSTEM_TRUSTED_KEYRING=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_SPARC is not set

From de46af184f000c6ac0499ae2d081e254da274382 Mon Sep 17 00:00:00 2001
From: Gaurav Kohli <gkohli@codeaurora.org>
Date: Tue, 23 Jan 2018 13:16:34 +0530
Subject: [PATCH 0575/1852] UPSTREAM: tty: fix data race between tty_init_dev
 and flush of buf

There can be a race, if receive_buf call comes before
tty initialization completes in n_tty_open and tty->disc_data
may be NULL.

CPU0					CPU1
----					----
 000|n_tty_receive_buf_common()   	n_tty_open()
-001|n_tty_receive_buf2()		tty_ldisc_open.isra.3()
-002|tty_ldisc_receive_buf(inline)	tty_ldisc_setup()

Using ldisc semaphore lock in tty_init_dev till disc_data
initializes completely.

Reviewed-by: Alan Cox <alan@linux.intel.com>
Cc: stable <stable@vger.kernel.org>

Change-Id: I3ba3cbd7dcb867a110878c8d0c47e6b920edd0b9
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
(cherry-picked from commit b027e2298bd588d6fa36ed2eda97447fb3eac078)
---
 drivers/tty/tty_io.c    | 8 +++++++-
 drivers/tty/tty_ldisc.c | 4 ++--
 include/linux/tty.h     | 2 ++
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 198451fa9e5d1..33f80b07f1131 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -1546,6 +1546,9 @@ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx)
 			"%s: %s driver does not set tty->port. This will crash the kernel later. Fix the driver!\n",
 			__func__, tty->driver->name);
 
+	retval = tty_ldisc_lock(tty, 5 * HZ);
+	if (retval)
+		goto err_release_lock;
 	tty->port->itty = tty;
 
 	/*
@@ -1556,6 +1559,7 @@ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx)
 	retval = tty_ldisc_setup(tty, tty->link);
 	if (retval)
 		goto err_release_tty;
+	tty_ldisc_unlock(tty);
 	/* Return the tty locked so that it cannot vanish under the caller */
 	return tty;
 
@@ -1569,9 +1573,11 @@ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx)
 
 	/* call the tty release_tty routine to clean out this slot */
 err_release_tty:
-	tty_unlock(tty);
+	tty_ldisc_unlock(tty);
 	printk_ratelimited(KERN_INFO "tty_init_dev: ldisc open failed, "
 				 "clearing slot %d\n", idx);
+err_release_lock:
+	tty_unlock(tty);
 	release_tty(tty, idx);
 	return ERR_PTR(retval);
 }
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
index d9e013dc2c08a..eb1b44c87b6ca 100644
--- a/drivers/tty/tty_ldisc.c
+++ b/drivers/tty/tty_ldisc.c
@@ -321,7 +321,7 @@ static inline void __tty_ldisc_unlock(struct tty_struct *tty)
 	ldsem_up_write(&tty->ldisc_sem);
 }
 
-static int __lockfunc
+int __lockfunc
 tty_ldisc_lock(struct tty_struct *tty, unsigned long timeout)
 {
 	int ret;
@@ -333,7 +333,7 @@ tty_ldisc_lock(struct tty_struct *tty, unsigned long timeout)
 	return 0;
 }
 
-static void tty_ldisc_unlock(struct tty_struct *tty)
+void tty_ldisc_unlock(struct tty_struct *tty)
 {
 	clear_bit(TTY_LDISC_HALTED, &tty->flags);
 	__tty_ldisc_unlock(tty);
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 812cdd8cff22a..bac8e6dc8689c 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -374,6 +374,8 @@ extern struct tty_struct *get_current_tty(void);
 /* tty_io.c */
 extern int __init tty_init(void);
 extern const char *tty_name(const struct tty_struct *tty);
+extern int tty_ldisc_lock(struct tty_struct *tty, unsigned long timeout);
+extern void tty_ldisc_unlock(struct tty_struct *tty);
 #else
 static inline void console_init(void)
 { }

From 50d458b05c3fb22ffafa089c811c3982939f8f66 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 10 Jul 2018 14:39:40 +0800
Subject: [PATCH 0576/1852] drivers: rkflash: add mutex lock for vendor ops

Change-Id: I3787ad654cce43156328866fe2926ebd398e04d9
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/nand_boot.c   |  6 ++----
 drivers/rkflash/rkflash_blk.c | 36 +++++++++++++++++++++++++++++++++--
 2 files changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/rkflash/nand_boot.c b/drivers/rkflash/nand_boot.c
index 0685128ca128f..1a9abc99f79f9 100644
--- a/drivers/rkflash/nand_boot.c
+++ b/drivers/rkflash/nand_boot.c
@@ -35,14 +35,12 @@ unsigned int sftl_flash_get_capacity(void)
 
 int sftl_flash_write(u32 sec, u32 n_sec, void *p_data)
 {
-	sftl_write(sec, n_sec, p_data);
-	return 0;
+	return sftl_write(sec, n_sec, p_data);
 }
 
 int sftl_flash_read(u32 sec, u32 n_sec, void *p_data)
 {
-	sftl_read(sec, n_sec, p_data);
-	return 0;
+	return sftl_read(sec, n_sec, p_data);
 }
 
 void sftl_flash_deinit(void)
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index e3131309ddfde..ce107c6a31859 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -106,6 +106,38 @@ static char *mtd_read_temp_buffer;
 #define MTD_RW_SECTORS (512)
 static DEFINE_MUTEX(g_flash_ops_mutex);
 
+static int vendor_read(u32 sec, u32 n_sec, void *p_data)
+{
+	int ret;
+
+	if (g_boot_ops[g_flash_type]->vendor_read) {
+		mutex_lock(&g_flash_ops_mutex);
+		ret = g_boot_ops[g_flash_type]->vendor_read(sec, n_sec, p_data);
+		mutex_unlock(&g_flash_ops_mutex);
+	} else {
+		ret = -EPERM;
+	}
+
+	return ret;
+}
+
+static int vendor_write(u32 sec, u32 n_sec, void *p_data)
+{
+	int ret;
+
+	if (g_boot_ops[g_flash_type]->vendor_write) {
+		mutex_lock(&g_flash_ops_mutex);
+		ret = g_boot_ops[g_flash_type]->vendor_write(sec,
+							     n_sec,
+							     p_data);
+		mutex_unlock(&g_flash_ops_mutex);
+	} else {
+		ret = -EPERM;
+	}
+
+	return ret;
+}
+
 static unsigned int rk_partition_init(struct flash_part *part)
 {
 	int i, part_num = 0;
@@ -647,8 +679,8 @@ int rkflash_dev_init(void __iomem *reg_addr, enum flash_con_type con_type)
 	pr_info("rkflash[%d] init success\n", tmp_id);
 	g_flash_type = tmp_id;
 	mytr.quit = 1;
-	flash_vendor_dev_ops_register(g_boot_ops[g_flash_type]->vendor_read,
-				      g_boot_ops[g_flash_type]->vendor_write);
+	flash_vendor_dev_ops_register(&vendor_read,
+				      &vendor_write);
 #ifdef CONFIG_RK_SFC_NOR_MTD
 	if (g_flash_type == FLASH_TYPE_SFC_NOR) {
 		pr_info("sfc_nor flash registered as a mtd device\n");

From 9ac0fcc751be6ac6304d247164ac2150323b2966 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 10 Jul 2018 15:12:18 +0800
Subject: [PATCH 0577/1852] soc: rockchip: fix flash vendor structure error

Change-Id: Id589fb607b233929d07d7ccc3f5b3d11dc92eb0c
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 include/uapi/misc/rkflash_vendor_storage.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/uapi/misc/rkflash_vendor_storage.h b/include/uapi/misc/rkflash_vendor_storage.h
index fc36bedb45bf5..e897330ccda22 100644
--- a/include/uapi/misc/rkflash_vendor_storage.h
+++ b/include/uapi/misc/rkflash_vendor_storage.h
@@ -7,8 +7,8 @@
 
 struct RK_VENDOR_REQ {
 	__u32 tag;
-	__u32 id;
-	__u32 len;
+	__u16 id;
+	__u16 len;
 	__u8 data[1024];
 };
 

From 5ffa37f704c552796c6f3a93708c10c00cc0cbf6 Mon Sep 17 00:00:00 2001
From: Chris Diamand <chris.diamand@arm.com>
Date: Thu, 12 Jan 2017 14:57:41 +0000
Subject: [PATCH 0578/1852] UPSTREAM: PM / devfreq: Don't delete sysfs group
 twice

The 'userspace' governor adds a sysfs entry, which is removed when
the governor is changed, or the devfreq device is released. However,
when the latter occurs via device_unregister(), device_del() is
called first, which removes the sysfs entries recursively and deletes
the kobject.

This means we get an Oops when the governor calls
sysfs_remove_group() on the deleted kobject. Fix this by only doing
the call when kobj *hasn't* been kobject_del()'d.

Note that we can't just remove the call to sysfs_remove_group()
entirely - it's needed for when the governor is changed to one which
doesn't need a sysfs entry.

Change-Id: I2ddad9d062ebb1a64582a15cd5b9efc5882bc848
Signed-off-by: Chris Diamand <chris.diamand@arm.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
(cherry picked from commit 924b9111a14f2c913782597d9d0795c67f1a6898)
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 drivers/devfreq/governor_userspace.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/devfreq/governor_userspace.c b/drivers/devfreq/governor_userspace.c
index 35de6e83c1feb..9db4d6f2006ab 100644
--- a/drivers/devfreq/governor_userspace.c
+++ b/drivers/devfreq/governor_userspace.c
@@ -112,7 +112,13 @@ static int userspace_init(struct devfreq *devfreq)
 
 static void userspace_exit(struct devfreq *devfreq)
 {
-	sysfs_remove_group(&devfreq->dev.kobj, &dev_attr_group);
+	/*
+	 * Remove the sysfs entry, unless this is being called after
+	 * device_del(), which should have done this already via kobject_del().
+	 */
+	if (devfreq->dev.kobj.sd)
+		sysfs_remove_group(&devfreq->dev.kobj, &dev_attr_group);
+
 	kfree(devfreq->data);
 	devfreq->data = NULL;
 }

From 180a4634629e563ee882949b0779be4545c52686 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 6 Jul 2018 22:34:51 +0800
Subject: [PATCH 0579/1852] ARM: dts: rk3308-voice-module: enable
 'rockchip,en-always-grps' with AMIC boards

If the VAD which using ACODEC and AMIC is active,
we need to keep ACODEC ADCs enabled during suspend,
otherwise, the system can not be waken up.

Change-Id: I0e6d07608f5ec514f94013a255d9061a138fbee2
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts   | 5 +++++
 arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts  | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
index a05ecdb37d727..5dcc61371bc4e 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
@@ -13,6 +13,11 @@
 	compatible = "rockchip,rk3308-voice-module-amic-mainboard-v10-aarch32", "rockchip,rk3308";
 };
 
+&acodec {
+	/* The grp1/2 (ADC3-6) keeps enabled always for VAD */
+	rockchip,en-always-grps = <1 2>;
+};
+
 &is31fl3236 {
 	reg = <0x3f>;
 };
diff --git a/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
index 2efd960abf4b1..4b96198a4615c 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-voice-module-board-v10-aarch32.dts
@@ -27,4 +27,6 @@
 	rockchip,no-deep-low-power;
 	/* ADC5-6 for 2ch capture, loopback to ADC3-4 */
 	rockchip,adc-grps-route = <2 1 3 0>;
+	/* The grp2 (ADC5-6) keeps enabled always for VAD */
+	rockchip,en-always-grps = <2>;
 };

From d8b2f042727e15a457f45e0c21b8238d87710e92 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 10 Jul 2018 10:41:36 +0800
Subject: [PATCH 0580/1852] ASoC: rockchip: vad: fliter the playback for vad

This patch fliter the playback for vad, because vad only
handle capture.

Change-Id: I96ec24870adc4441081b39030056ed9361477bf3
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 291451d64629c..dae05c9ddf24d 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -581,6 +581,9 @@ static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
 static int rockchip_vad_pcm_startup(struct snd_pcm_substream *substream,
 				    struct snd_soc_dai *dai)
 {
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		return 0;
+
 	vad_substream = substream;
 
 	return 0;

From 01f80c7b72b8b995e0ef3e097481211a7a1b79c4 Mon Sep 17 00:00:00 2001
From: Herman Chen <herman.chen@rock-chips.com>
Date: Tue, 10 Jul 2018 16:32:28 +0800
Subject: [PATCH 0581/1852] iommu/rockchip: export functions used in vcodec

When compile rk-vcodec as ko some unexported functions will fail the
compiling. This patch will fix this issue.

Change-Id: I8afcb4bc3858f0e9efa54e4996cdcb6a45bbe1e1
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
---
 drivers/iommu/rk-iovmm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/iommu/rk-iovmm.c b/drivers/iommu/rk-iovmm.c
index 3dfa109e43610..087ccf60fe779 100644
--- a/drivers/iommu/rk-iovmm.c
+++ b/drivers/iommu/rk-iovmm.c
@@ -38,6 +38,7 @@ int rockchip_iovmm_invalidate_tlb(struct device *dev)
 
 	return ret;
 }
+EXPORT_SYMBOL(rockchip_iovmm_invalidate_tlb);
 
 void rockchip_iovmm_set_fault_handler(struct device *dev,
 				       rockchip_iommu_fault_handler_t handler)
@@ -46,6 +47,7 @@ void rockchip_iovmm_set_fault_handler(struct device *dev,
 
 	data->fault_handler = handler;
 }
+EXPORT_SYMBOL(rockchip_iovmm_set_fault_handler);
 
 int rockchip_iovmm_activate(struct device *dev)
 {
@@ -53,6 +55,7 @@ int rockchip_iovmm_activate(struct device *dev)
 
 	return iommu_attach_device(vmm->domain, dev);
 }
+EXPORT_SYMBOL(rockchip_iovmm_activate);
 
 void rockchip_iovmm_deactivate(struct device *dev)
 {
@@ -60,6 +63,7 @@ void rockchip_iovmm_deactivate(struct device *dev)
 
 	iommu_detach_device(vmm->domain, dev);
 }
+EXPORT_SYMBOL(rockchip_iovmm_deactivate);
 
 dma_addr_t rockchip_iovmm_map(struct device *dev,
 	struct scatterlist *sg, off_t offset, size_t size)

From ce73d6f0862acd527454444e6868b9e58761e0cc Mon Sep 17 00:00:00 2001
From: Kaige Li <kevin.li@rock-chips.com>
Date: Tue, 12 Jun 2018 09:02:53 +0800
Subject: [PATCH 0582/1852] media: soc_camera: fixed camera stop timeout error.

Change-Id: I72a34625706135f35b4231abcec8cc683b2319dc
Signed-off-by: Kaige Li <kevin.li@rock-chips.com>
---
 drivers/media/platform/soc_camera/soc_camera.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
index 959f9454184e4..5f80b35626a8c 100644
--- a/drivers/media/platform/soc_camera/soc_camera.c
+++ b/drivers/media/platform/soc_camera/soc_camera.c
@@ -1045,7 +1045,6 @@ static int soc_camera_streamoff(struct file *file, void *priv,
 		return -EBUSY;
 
 	/* ddl@rock-chips.com: v0.1.1 */
-	v4l2_subdev_call(sd, video, s_stream, 0);
 	if (ici->ops->s_stream)
 		ici->ops->s_stream(icd, 0);
 

From f9f2ca0e1637d72977e4f9e80c37307b9cfefc05 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Wed, 23 May 2018 11:00:09 +0800
Subject: [PATCH 0583/1852] clk: rockchip: px30: Add half-divider clock for
 uart

Change-Id: I74e896e64a212e95200735ad6f16c58abb89496e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 30 ++++++++++++++++++++++++------
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 30a819e7b839b..f9ef001d90ccf 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -170,11 +170,11 @@ PNAME(mux_i2s2_out_p)		= { "clk_i2s2", "xin12m"};
 PNAME(mux_i2s0_tx_rx_p)		= { "clk_i2s0_tx_mux", "clk_i2s0_rx_mux"};
 PNAME(mux_i2s0_rx_tx_p)		= { "clk_i2s0_rx_mux", "clk_i2s0_tx_mux"};
 PNAME(mux_uart_src_p)		= { "gpll", "xin24m", "usb480m", "npll" };
-PNAME(mux_uart1_p)		= { "clk_uart1_src", "dummy", "clk_uart1_frac" };
-PNAME(mux_uart2_p)		= { "clk_uart2_src", "dummy", "clk_uart2_frac" };
-PNAME(mux_uart3_p)		= { "clk_uart3_src", "dummy", "clk_uart3_frac" };
-PNAME(mux_uart4_p)		= { "clk_uart4_src", "dummy", "clk_uart4_frac" };
-PNAME(mux_uart5_p)		= { "clk_uart5_src", "dummy", "clk_uart5_frac" };
+PNAME(mux_uart1_p)		= { "clk_uart1_src", "clk_uart1_np5", "clk_uart1_frac" };
+PNAME(mux_uart2_p)		= { "clk_uart2_src", "clk_uart2_np5", "clk_uart2_frac" };
+PNAME(mux_uart3_p)		= { "clk_uart3_src", "clk_uart3_np5", "clk_uart3_frac" };
+PNAME(mux_uart4_p)		= { "clk_uart4_src", "clk_uart4_np5", "clk_uart4_frac" };
+PNAME(mux_uart5_p)		= { "clk_uart5_src", "clk_uart5_np5", "clk_uart5_frac" };
 PNAME(mux_cif_out_p)		= { "xin24m", "dummy_cpll", "npll", "usb480m" };
 PNAME(mux_dclk_vopb_p)		= { "dclk_vopb_src", "dclk_vopb_frac", "xin24m" };
 PNAME(mux_dclk_vopl_p)		= { "dclk_vopl_src", "dclk_vopl_frac", "xin24m" };
@@ -182,7 +182,7 @@ PNAME(mux_gmac_p)		= { "clk_gmac_src", "gmac_clkin" };
 PNAME(mux_gmac_rmii_sel_p)	= { "clk_gmac_rx_tx_div20", "clk_gmac_rx_tx_div2" };
 PNAME(mux_rtc32k_pmu_p)		= { "xin32k", "pmu_pvtm_32k", "clk_rtc32k_frac", };
 PNAME(mux_wifi_pmu_p)		= { "xin24m", "clk_wifi_pmu_src" };
-PNAME(mux_uart0_pmu_p)		= { "clk_uart0_pmu_src", "dummy", "clk_uart0_frac" };
+PNAME(mux_uart0_pmu_p)		= { "clk_uart0_pmu_src", "clk_uart0_np5", "clk_uart0_frac" };
 PNAME(mux_usbphy_ref_p)		= { "xin24m", "clk_ref24m_pmu" };
 PNAME(mux_mipidsiphy_ref_p)	= { "xin24m", "clk_ref24m_pmu" };
 
@@ -629,6 +629,9 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_UART1_SRC, "clk_uart1_src", mux_uart_src_p, CLK_SET_RATE_NO_REPARENT,
 			PX30_CLKSEL_CON(34), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_CLKGATE_CON(10), 12, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart1_np5", "clk_uart1_src", CLK_SET_RATE_PARENT,
+			PX30_CLKSEL_CON(35), 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(10), 13, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart1_frac", "clk_uart1_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(36), 0,
 			PX30_CLKGATE_CON(10), 14, GFLAGS,
@@ -639,6 +642,9 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_UART2_SRC, "clk_uart2_src", mux_uart_src_p, 0,
 			PX30_CLKSEL_CON(37), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_CLKGATE_CON(11), 0, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart2_np5", "clk_uart2_src", CLK_SET_RATE_PARENT,
+			PX30_CLKSEL_CON(38), 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(11), 1, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart2_frac", "clk_uart2_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(39), 0,
 			PX30_CLKGATE_CON(11), 2, GFLAGS,
@@ -649,6 +655,9 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(0, "clk_uart3_src", mux_uart_src_p, 0,
 			PX30_CLKSEL_CON(40), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_CLKGATE_CON(11), 4, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart3_np5", "clk_uart3_src", CLK_SET_RATE_PARENT,
+			PX30_CLKSEL_CON(41), 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(11), 5, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart3_frac", "clk_uart3_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(42), 0,
 			PX30_CLKGATE_CON(11), 6, GFLAGS,
@@ -659,6 +668,9 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(0, "clk_uart4_src", mux_uart_src_p, 0,
 			PX30_CLKSEL_CON(43), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_CLKGATE_CON(11), 8, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart4_np5", "clk_uart4_src", CLK_SET_RATE_PARENT,
+			PX30_CLKSEL_CON(44), 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(11), 9, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart4_frac", "clk_uart4_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(45), 0,
 			PX30_CLKGATE_CON(11), 10, GFLAGS,
@@ -669,6 +681,9 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(0, "clk_uart5_src", mux_uart_src_p, 0,
 			PX30_CLKSEL_CON(46), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_CLKGATE_CON(11), 12, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart5_np5", "clk_uart5_src", CLK_SET_RATE_PARENT,
+			PX30_CLKSEL_CON(47), 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(11), 13, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart5_frac", "clk_uart5_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(48), 0,
 			PX30_CLKGATE_CON(11), 14, GFLAGS,
@@ -885,6 +900,9 @@ static struct rockchip_clk_branch px30_clk_pmu_branches[] __initdata = {
 	COMPOSITE(0, "clk_uart0_pmu_src", mux_uart_src_p, 0,
 			PX30_PMU_CLKSEL_CON(3), 14, 2, MFLAGS, 0, 5, DFLAGS,
 			PX30_PMU_CLKGATE_CON(1), 0, GFLAGS),
+	COMPOSITE_NOMUX_HALFDIV(0, "clk_uart0_np5", "clk_uart0_pmu_src", CLK_SET_RATE_PARENT,
+			PX30_PMU_CLKSEL_CON(4), 0, 5, DFLAGS,
+			PX30_PMU_CLKGATE_CON(1), 1, GFLAGS),
 	COMPOSITE_FRACMUX(0, "clk_uart0_frac", "clk_uart0_pmu_src", CLK_SET_RATE_PARENT,
 			PX30_PMU_CLKSEL_CON(5), 0,
 			PX30_PMU_CLKGATE_CON(1), 2, GFLAGS,

From 6fd0d9103b1cbd29f1729162f45ea7003cdf1354 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 10 Jul 2018 18:04:48 +0800
Subject: [PATCH 0584/1852] usb: dwc_otg_310: map ep to corresponding TxFIFO
 number

In Dedicated FIFO mode, it uses a simple logic to assign
TxFIFO number for each active endpoint. But it doesn't
guarantee that the FIFO depth is suitable for the maxpacket
of the endpoint. We may meet ep TxFIFO problem if we use
a composite device with more than three functions.

In my test case, I configure an usb composite device with
four functions on rv108: Mass storage + ADB + Rndis + HID.

when the functions are enabled:
echo "mass_storage,ffs,rndis,hidg0" > /sys/class/android_usb/android0/functions

The mass_storage works abnormally because that the mass
storage gadget driver calls ep_enable operation at last,
and the ep1-in of mass_storage is assigned with TxFIFO
number 5. The FIFO mapping between the endpint addresses
and the TxFIFO number is:

Ep1-IN msc   bulk        => TxFIFO number 5, FIFO depth 64 Bytes
Ep3-IN adb   bulk        => TxFIFO number 1, FIFO depth 1024 Bytes
Ep5-IN rndis bulk        => TxFIFO number 3, FIFO depth 512 Bytes
Ep7-IN rndis interrupt   => TxFIFO number 2, FIFO depth 512 Bytes
Ep8-IN hid   interrupt   => TxFIFO number 4, FIFO depth 384 Bytes

This patch use a fixed mapping between the endpint addresses
and the TxFIFO number like this:

EP1-IN => TxFIFO number 1
EP3-IN => TxFIFO number 2
EP5-IN => TxFIFO number 3
EP7-IN => TxFIFO number 4
EP8-IN => TxFIFO number 5
EP9-IN => TxFIFO number 6

With this patch, in my test case (Mass storage+ ADB + Rndis + HID)
the FIFO mapping is:

Ep1-IN msc   bulk        => TxFIFO number 1, FIFO depth 1024 Bytes
Ep3-IN adb   bulk        => TxFIFO number 2, FIFO depth 512 Bytes
Ep5-IN rndis bulk        => TxFIFO number 3, FIFO depth 512 Bytes
Ep7-IN rndis interrupt   => TxFIFO number 4, FIFO depth 384 Bytes
Ep8-IN hid   interrupt   => TxFIFO number 5, FIFO depth 64 Bytes

Change-Id: Id00ed7e78d26d87b6c473ea84d1b1901ef25171e
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd.c | 40 ++++++++++++---------------
 1 file changed, 18 insertions(+), 22 deletions(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
index 68e97eb9a9494..39fbbab27eb20 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
@@ -1399,25 +1399,6 @@ uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t *pcd)
 	return retval;
 }
 
-/**
- * This function assigns periodic Tx FIFO to an periodic EP
- * in shared Tx FIFO mode
- */
-static uint32_t assign_tx_fifo(dwc_otg_core_if_t *core_if)
-{
-	uint32_t TxMsk = 1;
-	int i;
-
-	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; ++i) {
-		if ((TxMsk & core_if->tx_msk) == 0) {
-			core_if->tx_msk |= TxMsk;
-			return i + 1;
-		}
-		TxMsk <<= 1;
-	}
-	return 0;
-}
-
 /**
  * This function assigns periodic Tx FIFO to an periodic EP
  * in shared Tx FIFO mode
@@ -1464,7 +1445,7 @@ static void release_tx_fifo(dwc_otg_core_if_t *core_if, uint32_t fifo_num)
 int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t *pcd,
 			  const uint8_t *ep_desc, void *usb_ep)
 {
-	int num, dir;
+	int num, dir, fifo_map;
 	dwc_otg_pcd_ep_t *ep = NULL;
 	const usb_endpoint_descriptor_t *desc;
 	dwc_irqflags_t flags;
@@ -1497,6 +1478,7 @@ int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t *pcd,
 		for (i = 0; i < epcount; i++) {
 			if (num == pcd->in_ep[i].dwc_ep.num) {
 				ep = &pcd->in_ep[i];
+				fifo_map = i;
 				break;
 			}
 		}
@@ -1543,11 +1525,25 @@ int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t *pcd,
 				    assign_perio_tx_fifo(GET_CORE_IF(pcd));
 			}
 		} else {
+			fifosize_data_t txfifosize;
+			dwc_otg_core_global_regs_t *global_regs =
+				GET_CORE_IF(pcd)->core_global_regs;
+
+			txfifosize.d32 =
+				DWC_READ_REG32(&global_regs->dtxfsiz[fifo_map]);
+
+			if ((txfifosize.b.depth * 4) < ep->dwc_ep.maxpacket)
+				DWC_WARN("No suitable fifo found for ep %d\n", num);
 			/*
 			 * if Dedicated FIFOs mode is on then assign a Tx FIFO.
+			 * According to register DIEPCTL.TxFNum, the TxFIFO Num
+			 * index from 1, and the max FIFO Num is core_if->dev_if
+			 * ->num_in_eps. We make one-to-one fixed mapping here:
+			 * EP1-IN FIFO Num = 1, EP3-IN FIFO Num = 2,
+			 * EP5-IN FIFO Num = 3, EP7-IN FIFO Num = 4,
+			 * EP8-IN FIFO Num = 5, EP9-IN FIFO Num = 6.
 			 */
-			ep->dwc_ep.tx_fifo_num =
-			    assign_tx_fifo(GET_CORE_IF(pcd));
+			ep->dwc_ep.tx_fifo_num = fifo_map + 1;
 		}
 
 		/* Calculating EP info controller base address */

From c7438049ba1c731b6d72d69fc5d7c309b149033a Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 12 Jul 2018 08:40:37 +0800
Subject: [PATCH 0585/1852] usb: dwc_otg_310: resize the depth of TxFIFO number
 1 and 2

The commit c64eaccc619f ("usb: dwc_otg_310: map ep to
corresponding TxFIFO number") use a fixed mapping between
the endpint addresses and the TxFIFO number. The TxFIFO
number 1 is assigned to ep1-in, and the TxFIFO number 2
is assigned to ep3-in. For uvc function, the ep1-in is
used for uvc control ep (interrupt), and the ep3-in is
used for uvc stream ep. So resize the depth of TxFIFO
number 1 to 512 Bytes, and resize the depth of TxFIFO
number 2 to 1024 Bytes.

Change-Id: I07a89aab01206f6b6f853886d564130abffc1586
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_driver.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index 19a0a06abee42..d309af31e9fe2 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -183,8 +183,8 @@ static struct dwc_otg_driver_module_params dwc_otg_module_params = {
 	.en_multiple_tx_fifo = -1,
 	.dev_tx_fifo_size = {
 			     /* dev_tx_fifo_size */
-			     0x100,
 			     0x80,
+			     0x100,
 			     0x80,
 			     0x60,
 			     0x10,

From a32a7533036d114636493f517305e674afb73fd6 Mon Sep 17 00:00:00 2001
From: Guochun Huang <hero.huang@rock-chips.com>
Date: Thu, 12 Jul 2018 15:19:05 +0800
Subject: [PATCH 0586/1852] arm64: dts: rockchip: rk3399-tve1030g: modified
 screen timing

Change-Id: If2bdfdbf6364cf8ea25ed9a197e579b18ad5154c
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
index 610fb1973477f..66d503026a8d4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
@@ -292,6 +292,10 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&lcd_rst_gpio>;
 		reset-delay-ms = <60>;
+		enable-delay-ms = <60>;
+		prepare-delay-ms = <60>;
+		unprepare-delay-ms = <60>;
+		disable-delay-ms = <60>;
 		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
 			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
 		dsi,format = <MIPI_DSI_FMT_RGB888>;

From d5c24ebc5351f00a483f0e701305971c90d2a29a Mon Sep 17 00:00:00 2001
From: Zhang Zhijie <zhangzj@rock-chips.com>
Date: Wed, 4 Jul 2018 11:32:16 +0800
Subject: [PATCH 0587/1852] OP-TEE: remove lock when call tee

OPTEE supports multicore, so the lock before enter tee
is needless and can be removed to avoid unnecessary waiting.

Change-Id: I4e9c5876ba69e362b598e0c0ca78e12a96704b58
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
---
 security/optee_linuxdriver/armtz/tee_tz_drv.c | 30 +++++--------------
 1 file changed, 8 insertions(+), 22 deletions(-)

diff --git a/security/optee_linuxdriver/armtz/tee_tz_drv.c b/security/optee_linuxdriver/armtz/tee_tz_drv.c
index d1d23eb50d6aa..56386a0521f34 100644
--- a/security/optee_linuxdriver/armtz/tee_tz_drv.c
+++ b/security/optee_linuxdriver/armtz/tee_tz_drv.c
@@ -120,32 +120,18 @@ static long tee_smc_call_switchcpu0(struct smc_param *param)
 }
 #endif /* SWITCH_CPU0_DEBUG */
 
-static void e_lock_teez(struct tee_tz *ptee)
+static void wait_completion_teez(struct tee_tz *ptee)
 {
-	mutex_lock(&ptee->mutex);
-}
-
-static void e_lock_wait_completion_teez(struct tee_tz *ptee)
-{
-	/*
-	 * Release the lock until "something happens" and then reacquire it
-	 * again.
-	 *
-	 * This is needed when TEE returns "busy" and we need to try again
-	 * later.
-	 */
 	ptee->c_waiters++;
-	mutex_unlock(&ptee->mutex);
 	/*
 	 * Wait at most one second. Secure world is normally never busy
 	 * more than that so we should normally never timeout.
 	 */
 	wait_for_completion_timeout(&ptee->c, HZ);
-	mutex_lock(&ptee->mutex);
 	ptee->c_waiters--;
 }
 
-static void e_unlock_teez(struct tee_tz *ptee)
+static void complete_teez(struct tee_tz *ptee)
 {
 	/*
 	 * If at least one thread is waiting for "something to happen" let
@@ -153,7 +139,6 @@ static void e_unlock_teez(struct tee_tz *ptee)
 	 */
 	if (ptee->c_waiters)
 		complete(&ptee->c);
-	mutex_unlock(&ptee->mutex);
 }
 
 static void handle_rpc_func_cmd_mutex_wait(struct tee_tz *ptee,
@@ -458,7 +443,6 @@ static void call_tee(struct tee_tz *ptee,
 
 
 	param.a1 = parg32;
-	e_lock_teez(ptee);
 	while (true) {
 		param.a0 = funcid;
 
@@ -478,17 +462,19 @@ static void call_tee(struct tee_tz *ptee,
 			 * exit from secure world and needed resources may
 			 * have become available).
 			 */
-			e_lock_wait_completion_teez(ptee);
+			wait_completion_teez(ptee);
 		} else if (TEESMC_RETURN_IS_RPC(ret)) {
+			/* Wake up waiting task */
+			complete_teez(ptee);
 			/* Process the RPC. */
-			e_unlock_teez(ptee);
 			funcid = handle_rpc(ptee, &param);
-			e_lock_teez(ptee);
 		} else {
 			break;
 		}
 	}
-	e_unlock_teez(ptee);
+
+	/* Wake up waiting task */
+	complete_teez(ptee);
 
 	switch (ret) {
 	case TEESMC_RETURN_UNKNOWN_FUNCTION:

From ada48f49a464f918b204effecf515165a9b8db0a Mon Sep 17 00:00:00 2001
From: Zheng Yang <zhengyang@rock-chips.com>
Date: Fri, 13 Jul 2018 10:12:56 +0800
Subject: [PATCH 0588/1852] drm: rockchip: dw-hdmi: fix colorimetry bt2020
 value

To differentiate extend colorimetry and normal colorimetry, we
add the offset HDMI_COLORIMETRY_EXTENDED in colorimetry property.
It should use same value in dw_hdmi_rockchip_select_output.

Change-Id: I13e10b6e8211e7a2634dbd4b6c5310bc129bfa8d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 15dd40e2ce6c4..a58edabe600c2 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -54,6 +54,8 @@
 #define RK3328_HPD_3V			(BIT(8 + 16) | BIT(13 + 16))
 
 #define HIWORD_UPDATE(val, mask)	(val | (mask) << 16)
+#define RK_HDMI_COLORIMETRY_BT2020	(HDMI_COLORIMETRY_EXTENDED + \
+					 HDMI_EXTENDED_COLORIMETRY_BT2020)
 
 /* HDMI output pixel format */
 enum drm_hdmi_output_type {
@@ -707,7 +709,7 @@ dw_hdmi_rockchip_select_output(struct drm_connector_state *conn_state,
 
 	if ((*eotf > TRADITIONAL_GAMMA_HDR &&
 	     info->hdmi.hdr_panel_metadata.eotf & BIT(*eotf)) ||
-	    (hdmi->colorimetry == HDMI_EXTENDED_COLORIMETRY_BT2020 &&
+	    (hdmi->colorimetry == RK_HDMI_COLORIMETRY_BT2020 &&
 	     info->hdmi.colorimetry & (BIT(6) | BIT(7))))
 		*enc_out_encoding = V4L2_YCBCR_ENC_BT2020;
 	else if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
@@ -892,8 +894,7 @@ static const struct drm_prop_enum_list drm_hdmi_output_enum_list[] = {
 
 static const struct drm_prop_enum_list colorimetry_enum_list[] = {
 	{ HDMI_COLORIMETRY_NONE, "None" },
-	{ HDMI_COLORIMETRY_EXTENDED + HDMI_EXTENDED_COLORIMETRY_BT2020,
-	  "ITU_2020" },
+	{ RK_HDMI_COLORIMETRY_BT2020, "ITU_2020" },
 };
 
 static void

From f7150e760f056c7a3f4e9681f3d54afefae598d8 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 12 Jul 2018 18:09:15 +0800
Subject: [PATCH 0589/1852] soc: rockchip: opp_select: Limit minimum voltage
 when low temperature

Change-Id: I4d4dd9d8a1130a11b6364479c24c1bb452045c23
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/soc/rockchip/rockchip_opp_select.c | 9 ++++++++-
 include/soc/rockchip/rockchip_opp_select.h | 1 +
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index f32809fd5dea0..5480a1d521a5c 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -1001,6 +1001,10 @@ static int rockchip_init_temp_opp_table(struct thermal_opp_info *info)
 		if ((opp->u_volt + delta_volt) <= info->max_volt) {
 			info->opp_table[i].low_temp_volt =
 				opp->u_volt + delta_volt;
+			if (info->opp_table[i].low_temp_volt <
+			    info->low_temp_min_volt)
+				info->opp_table[i].low_temp_volt =
+					info->low_temp_min_volt;
 			if (!reach_max_volt)
 				info->low_limit = opp->rate;
 			if (info->opp_table[i].low_temp_volt == info->max_volt)
@@ -1061,6 +1065,8 @@ rockchip_register_thermal_notifier(struct device *dev,
 		info->low_temp = INT_MIN;
 	rockchip_get_sel_table(np, "rockchip,low-temp-adjust-volt",
 			       &info->low_temp_table);
+	of_property_read_u32(np, "rockchip,low-temp-min-volt",
+			     &info->low_temp_min_volt);
 	if (of_property_read_u32(np, "rockchip,high-temp", &info->high_temp))
 		info->high_temp = INT_MAX;
 	if (of_property_read_u32(np, "rockchip,high-temp-max-volt",
@@ -1078,7 +1084,8 @@ rockchip_register_thermal_notifier(struct device *dev,
 		goto info_free;
 	}
 
-	if (!info->low_temp_table && !info->low_limit && !info->high_limit)
+	if (!info->low_temp_table && !info->low_temp_min_volt &&
+	    !info->low_limit && !info->high_limit)
 		goto info_free;
 
 	srcu_notifier_chain_register(&tz->thermal_notifier_list,
diff --git a/include/soc/rockchip/rockchip_opp_select.h b/include/soc/rockchip/rockchip_opp_select.h
index 2f6778c84eee4..65383555920c2 100644
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -40,6 +40,7 @@ struct thermal_opp_info {
 	int high_temp;
 	int temp_hysteresis;
 	int max_volt;
+	int low_temp_min_volt;
 	int high_temp_max_volt;
 	bool is_low_temp;
 	bool is_high_temp;

From 83b927534343a7638e0ebc953752c29c206fed9f Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 7 Jun 2018 10:47:25 +0800
Subject: [PATCH 0590/1852] clk: rockchip: rk3308: Add rate table for dpll

DPLL isn't the parent clock of ddr, we may need to change dpll rate for
other devices.

Change-Id: I2b41ccf6df78803980be08e4b82cbfb5c7718b69
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3308.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c
index b2655e530505b..79f6f98c49acd 100644
--- a/drivers/clk/rockchip/clk-rk3308.c
+++ b/drivers/clk/rockchip/clk-rk3308.c
@@ -195,7 +195,7 @@ static struct rockchip_pll_clock rk3308_pll_clks[] __initdata = {
 		     RK3308_MODE_CON, 0, 0, 0, rk3308_pll_rates),
 	[dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
 		     0, RK3308_PLL_CON(8),
-		     RK3308_MODE_CON, 2, 1, 0, NULL),
+		     RK3308_MODE_CON, 2, 1, 0, rk3308_pll_rates),
 	[vpll0] = PLL(pll_rk3328, PLL_VPLL0, "vpll0", mux_pll_p,
 		     0, RK3308_PLL_CON(16),
 		     RK3308_MODE_CON, 4, 2, 0, rk3308_pll_rates),

From 3852aabb0d0cfd56e3c93f21bd27f8a952fcdda0 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 12 Jul 2018 15:32:10 +0800
Subject: [PATCH 0591/1852] dmaengine: pl330: _stop: clear interrupt status

This patch kill instructs the DMAC to immediately terminate
execution of a thread. and then clear the interrupt status,
at last, stop generating interrupts for DMA_SEV. to guarantee
the next dma start is clean. otherwise, one interrupt maybe leave
to next start and make some mistake.

we can reporduce the problem as follows:

DMASEV: modify the event-interrupt resource, and if the INTEN sets
function as interrupt, the DMAC will set irq<event_num> HIGH to
generate interrupt. write INTCLR to clear interrupt.

	DMA EXECUTING INSTRUCTS		DMA TERMINATE
		|				|
		|				|
	       ...			      _stop
		|				|
		|			spin_lock_irqsave
	     DMASEV				|
		|				|
		|			    mask INTEN
		|				|
		|			     DMAKILL
		|				|
		|			spin_unlock_irqrestore

in above case, a interrupt was left, and if we unmask INTEN, the DMAC
will set irq<event_num> HIGH to generate interrupt.

to fix this, do as follows:

	DMA EXECUTING INSTRUCTS		DMA TERMINATE
		|				|
		|				|
	       ...			      _stop
		|				|
		|			spin_lock_irqsave
	     DMASEV				|
		|				|
		|			     DMAKILL
		|				|
		|			   clear INTCLR
		|			    mask INTEN
		|				|
		|			spin_unlock_irqrestore

Change-Id: I5d452cad70964c519b53711a292d2d2714b811a1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 drivers/dma/pl330.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index ee8e25c0e70cc..5893c11dd8587 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1031,6 +1031,7 @@ static void _stop(struct pl330_thread *thrd)
 {
 	void __iomem *regs = thrd->dmac->base;
 	u8 insn[6] = {0, 0, 0, 0, 0, 0};
+	u32 inten = readl(regs + INTEN);
 
 	if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
 		UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
@@ -1043,10 +1044,13 @@ static void _stop(struct pl330_thread *thrd)
 
 	_emit_KILL(0, insn);
 
-	/* Stop generating interrupts for SEV */
-	writel(readl(regs + INTEN) & ~(1 << thrd->ev), regs + INTEN);
-
 	_execute_DBGINSN(thrd, insn, is_manager(thrd));
+
+	/* clear the event */
+	if (inten & (1 << thrd->ev))
+		writel(1 << thrd->ev, regs + INTCLR);
+	/* Stop generating interrupts for SEV */
+	writel(inten & ~(1 << thrd->ev), regs + INTEN);
 }
 
 /* Start doing req 'idx' of thread 'thrd' */

From e2c421256c3e3bb88ac96e700c157b2d115ff6c5 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Fri, 13 Jul 2018 10:53:08 +0800
Subject: [PATCH 0592/1852] drivers: rkflash: fix ecc error after suddenly
 power lost

Change-Id: I48e3b94300404a29463d6fcde6ed160a9018728f
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl_arm_v7.S       | 51798 +++++++++++------------
 drivers/rkflash/rk_sftl_arm_v7_thumb.S | 27397 ++++++------
 drivers/rkflash/rk_sftl_arm_v8.S       | 26259 ++++++------
 3 files changed, 51771 insertions(+), 53683 deletions(-)

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index ee7141daed1e1..6897c7ecd7062 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-06-13
+ * date: 2018-07-13
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -18,36 +18,29 @@
 	.text
 .Ltext0:
 	.global	__aeabi_uidiv
-	.align	2
+	.align	1
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	l2p_addr_tran, %function
 l2p_addr_tran:
 	.fnstart
-.LFB261:
+.LFB271:
 	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
 	.loc 1 18 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL0:
-	.movsp ip
-	mov	ip, sp
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 .LCFI0:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI1:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI2:
-	push	{lr}
-	bl	__gnu_mcount_nc
 	.loc 1 18 0
 	mov	r8, r1
-	mov	r9, r2
 	.loc 1 25 0
 	ldr	r3, .L3
+	.loc 1 18 0
+	mov	r9, r2
 	.loc 1 32 0
 	ldr	r6, [r0, #4]
 .LVL1:
@@ -60,26 +53,28 @@ l2p_addr_tran:
 	.loc 1 27 0
 	ldrh	r3, [r3, #14]
 	.loc 1 33 0
-	lsr	r7, r6, #10
+	lsrs	r7, r6, #10
 	.loc 1 37 0
 	ubfx	r6, r6, #0, #10
 .LVL4:
+	.loc 1 27 0
+	cmp	r3, #4
 	.loc 1 34 0
 	uxth	r0, r7
 .LVL5:
-	.loc 1 35 0
-	uxth	r7, r7
-	.loc 1 27 0
-	cmp	r3, #4
 	.loc 1 28 0
+	itt	eq
 	lsreq	r4, r4, #1
 	.loc 1 29 0
 	lsleq	r5, r5, #1
 .LVL6:
+	.loc 1 35 0
+	uxth	r7, r7
 	.loc 1 34 0
 	mov	r1, r4
 .LVL7:
 	.loc 1 29 0
+	it	eq
 	uxtheq	r5, r5
 .LVL8:
 	.loc 1 34 0
@@ -97,171 +92,130 @@ l2p_addr_tran:
 	.loc 1 38 0
 	str	r0, [r9]
 	.loc 1 41 0
-	mov	r0, #0
+	movs	r0, #0
 .LVL13:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+.LVL14:
 .L4:
 	.align	2
 .L3:
 	.word	g_nand_phy_info
-.LFE261:
+.LFE271:
 	.fnend
 	.size	l2p_addr_tran, .-l2p_addr_tran
-	.align	2
+	.align	1
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
 	.fnstart
-.LFB276:
+.LFB286:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL14:
-	.movsp ip
-	mov	ip, sp
-.LCFI3:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI4:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI5:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1346 0
-	.loc 2 1349 0
-	lsr	r1, r0, #5
-	mov	ip, #1
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL15:
+	.loc 2 1398 0
 	ldr	r3, .L6
+	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL15:
+.LVL16:
 	ldr	r2, [r3]
+	movs	r3, #1
+	lsl	r0, r3, r0
 	ldr	r3, [r2, r1, lsl #2]
-	orr	r0, r3, ip, lsl r0
-	str	r0, [r2, r1, lsl #2]
-	ldmfd	sp, {fp, sp, pc}
+	orrs	r3, r3, r0
+	str	r3, [r2, r1, lsl #2]
+	bx	lr
 .L7:
 	.align	2
 .L6:
 	.word	.LANCHOR0
-.LFE276:
+.LFE286:
 	.fnend
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
-	.align	2
+	.align	1
 	.global	Ftl_log2
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
 	.fnstart
-.LFB142:
+.LFB152:
 	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
+	.loc 3 127 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL16:
-	.movsp ip
-	mov	ip, sp
-.LCFI6:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI7:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI8:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 128 0
-	.loc 3 132 0
-	mov	r1, #0
-	.loc 3 130 0
-	mov	r2, #1
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
 .LVL17:
+	.loc 3 131 0
+	movs	r1, #0
+	.loc 3 129 0
+	movs	r2, #1
+.LVL18:
 .L9:
-	.loc 3 132 0 discriminator 1
+	.loc 3 131 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
 	bls	.L10
-	.loc 3 134 0
-	sub	r0, r3, #1
-.LVL18:
-	.loc 3 136 0
-	uxth	r0, r0
-	ldmfd	sp, {fp, sp, pc}
+	.loc 3 133 0
+	subs	r0, r3, #1
 .LVL19:
+	.loc 3 135 0
+	uxth	r0, r0
+	bx	lr
+.LVL20:
 .L10:
-	.loc 3 133 0 discriminator 3
-	lsl	r2, r2, #1
+	.loc 3 132 0 discriminator 3
+	lsls	r2, r2, #1
 	b	.L9
-.LFE142:
+.LFE152:
 	.fnend
 	.size	Ftl_log2, .-Ftl_log2
-	.align	2
+	.align	1
 	.global	FtlPrintInfo
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 	.fnstart
-.LFB143:
+.LFB153:
 	.loc 3 159 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL20:
-	.movsp ip
-	mov	ip, sp
-.LCFI9:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI10:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI11:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 159 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE143:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL21:
+	bx	lr
+.LFE153:
 	.fnend
 	.size	FtlPrintInfo, .-FtlPrintInfo
-	.align	2
+	.align	1
 	.global	FtlSysBlkNumInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 	.fnstart
-.LFB144:
+.LFB154:
 	.loc 3 165 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL21:
-	.movsp ip
-	mov	ip, sp
-.LCFI12:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI13:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI14:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 165 0
-	cmp	r0, #24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL22:
 	.loc 3 168 0
 	ldr	r3, .L13
+	cmp	r0, #24
+	it	cc
 	movcc	r0, #24
 	.loc 3 169 0
 	ldrh	r2, [r3, #8]
@@ -270,134 +224,127 @@ FtlSysBlkNumInit:
 	.loc 3 168 0
 	str	r0, [r3, #4]
 	.loc 3 169 0
-	mul	r2, r0, r2
+	muls	r2, r0, r2
 	.loc 3 170 0
-	sub	r0, r1, r0
-.LVL22:
+	subs	r0, r1, r0
+.LVL23:
 	.loc 3 171 0
 	ldr	r1, [r3, #24]
 	.loc 3 170 0
 	strh	r0, [r3, #16]	@ movhi
 	.loc 3 174 0
-	mov	r0, #0
+	movs	r0, #0
 	.loc 3 169 0
 	str	r2, [r3, #12]
 	.loc 3 171 0
-	sub	r2, r1, r2
+	subs	r2, r1, r2
 	str	r2, [r3, #20]
 	.loc 3 174 0
-	ldmfd	sp, {fp, sp, pc}
+	bx	lr
 .L14:
 	.align	2
 .L13:
 	.word	.LANCHOR0
-.LFE144:
+.LFE154:
 	.fnend
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
-	.align	2
+	.align	1
 	.global	FtlConstantsInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 	.fnstart
-.LFB145:
+.LFB155:
 	.loc 3 183 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL23:
-	.movsp ip
-	mov	ip, sp
-.LCFI15:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI16:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI17:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL24:
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI1:
 	.loc 3 183 0
-	mov	r7, r0
+	mov	fp, r0
 	.loc 3 191 0
-	ldrh	r2, [r7, #14]
+	ldrh	r3, [fp, #14]
 	.loc 3 188 0
+	ldrh	r2, [r0]
 	ldr	r4, .L25
-	.loc 3 197 0
-	ldr	ip, .L25+4
 	.loc 3 191 0
-	cmp	r2, #4
-	.loc 3 188 0
-	ldrh	r1, [r0]
-	.loc 3 192 0
-	ldrheq	r2, [r7, #6]
+	cmp	r3, #4
 	.loc 3 189 0
 	ldrh	r6, [r0, #2]
 	.loc 3 190 0
 	ldrh	r0, [r0, #4]
-.LVL24:
+.LVL25:
 	.loc 3 188 0
-	strh	r1, [r4, #28]	@ movhi
-	.loc 3 192 0
-	lsreq	r2, r2, #1
+	strh	r2, [r4, #28]	@ movhi
 	.loc 3 189 0
 	strh	r6, [r4, #30]	@ movhi
 	.loc 3 190 0
 	strh	r0, [r4, #32]	@ movhi
+	.loc 3 191 0
+	bne	.L16
 	.loc 3 192 0
-	strheq	r2, [r4, #18]	@ movhi
+	ldrh	r3, [fp, #6]
+	lsrs	r3, r3, #1
+	strh	r3, [r4, #18]	@ movhi
 	.loc 3 193 0
-	moveq	r2, #8
-	strheq	r2, [r4, #34]	@ movhi
-	.loc 3 183 0
-	mov	r2, #0
-.LVL25:
+	movs	r3, #8
+	strh	r3, [r4, #34]	@ movhi
+.L16:
+	.loc 3 197 0 discriminator 3
+	ldr	r1, .L25+4
+	.loc 3 183 0 discriminator 3
+	movs	r3, #0
+.LVL26:
 .L17:
 	.loc 3 197 0 discriminator 3
-	strb	r2, [r2, ip]
+	strb	r3, [r3, r1]
 	.loc 3 196 0 discriminator 3
-	add	r2, r2, #1
-	cmp	r2, #32
+	adds	r3, r3, #1
+	cmp	r3, #32
 	bne	.L17
 	.loc 3 205 0
 	ldrh	r5, [r4, #18]
 	.loc 3 204 0
 	smulbb	r6, r6, r0
 	.loc 3 198 0
-	mov	r2, #5
-.LVL26:
+	movs	r3, #5
+.LVL27:
 	.loc 3 200 0
-	cmp	r1, #1
+	cmp	r2, #1
 	.loc 3 198 0
-	strh	r2, [r4, #68]	@ movhi
+	strh	r3, [r4, #68]	@ movhi
 	.loc 3 204 0
 	uxth	r6, r6
-	.loc 3 202 0
-	mov	r3, #640	@ movhi
+	.loc 3 199 0
+	mov	r3, #0
 	.loc 3 205 0
 	smulbb	r0, r0, r5
-	.loc 3 199 0
-	mov	r2, #0
-	.loc 3 201 0
-	strheq	r1, [r4, #68]	@ movhi
 	.loc 3 202 0
-	strh	r3, [r4, #72]	@ movhi
+	mov	r7, #640
+	.loc 3 201 0
+	it	eq
+	strheq	r2, [r4, #68]	@ movhi
+	.loc 3 199 0
+	strh	r3, [r4, #70]	@ movhi
 	.loc 3 205 0
 	uxth	r0, r0
-	.loc 3 199 0
-	strh	r2, [r4, #70]	@ movhi
+	.loc 3 202 0
+	strh	r7, [r4, #72]	@ movhi
 	.loc 3 204 0
 	strh	r6, [r4, #8]	@ movhi
 	.loc 3 205 0
 	strh	r0, [r4, #74]	@ movhi
 	.loc 3 206 0
 	bl	Ftl_log2
-.LVL27:
+.LVL28:
 	.loc 3 207 0
-	ldrh	r9, [r7, #12]
+	ldrh	r9, [fp, #12]
 	.loc 3 210 0
 	ldrh	r10, [r4, #34]
 	.loc 3 206 0
@@ -405,58 +352,53 @@ FtlConstantsInit:
 	.loc 3 207 0
 	strh	r9, [r4, #78]	@ movhi
 	.loc 3 209 0
-	smulbb	r2, r6, r9
+	smulbb	r3, r6, r9
 	.loc 3 210 0
 	mov	r0, r10
 	.loc 3 208 0
 	strh	r9, [r4, #80]	@ movhi
 	.loc 3 209 0
-	strh	r2, [r4, #82]	@ movhi
+	strh	r3, [r4, #82]	@ movhi
 	.loc 3 210 0
 	bl	Ftl_log2
-.LVL28:
-	.loc 3 214 0
-	ldrh	r3, [r7, #20]
+.LVL29:
 	.loc 3 212 0
-	lsl	r2, r10, #9
+	lsl	r3, r10, #9
 	.loc 3 210 0
 	mov	r8, r0
 	strh	r0, [r4, #84]	@ movhi
+	.loc 3 218 0
+	mul	r1, r9, r10
 	.loc 3 212 0
-	uxth	r2, r2
-	mov	r7, #640
-.LVL29:
-	.loc 3 214 0
-	strh	r3, [r4, #90]	@ movhi
-	.loc 3 216 0
-	mul	r3, r5, r6
+	uxth	r3, r3
+	.loc 3 218 0
+	mov	r0, #5120
+	.loc 3 221 0
+	asr	r7, r7, r8
 	.loc 3 212 0
-	strh	r2, [r4, #86]	@ movhi
+	strh	r3, [r4, #86]	@ movhi
 	.loc 3 213 0
-	lsr	r2, r2, #8
+	lsrs	r3, r3, #8
 	.loc 3 223 0
-	lsl	r5, r5, #6
-	.loc 3 218 0
-	mul	r1, r9, r10
+	add	r8, r8, #9
 	.loc 3 213 0
-	strh	r2, [r4, #88]	@ movhi
+	strh	r3, [r4, #88]	@ movhi
 	.loc 3 221 0
-	asr	r7, r7, r8
+	adds	r7, r7, #2
+	.loc 3 214 0
+	ldrh	r3, [fp, #20]
+	strh	r3, [r4, #90]	@ movhi
 	.loc 3 216 0
-	str	r3, [r4, #24]
-	.loc 3 217 0
-	mul	r3, r10, r3
-	.loc 3 223 0
-	add	r8, r8, #9
-	.loc 3 218 0
-	mov	r0, #5120
+	mul	r3, r5, r6
 	.loc 3 223 0
+	lsls	r5, r5, #6
 	asr	r5, r5, r8
-	.loc 3 221 0
-	add	r7, r7, #2
+	.loc 3 216 0
+	str	r3, [r4, #24]
 	.loc 3 217 0
+	mul	r3, r10, r3
 	mul	r3, r9, r3
-	asr	r3, r3, #11
+	asrs	r3, r3, #11
 	str	r3, [r4, #92]
 	.loc 3 218 0
 	bl	__aeabi_idiv
@@ -472,6 +414,7 @@ FtlConstantsInit:
 	.loc 3 221 0
 	strh	r7, [r4, #98]	@ movhi
 	.loc 3 220 0
+	itet	ls
 	movls	r3, #4
 	.loc 3 218 0
 	strhhi	r0, [r4, #96]	@ movhi
@@ -481,7 +424,7 @@ FtlConstantsInit:
 	mul	r3, r6, r5
 	.loc 3 226 0
 	ldrh	r0, [r4, #96]
-	add	r5, r5, #8
+	adds	r5, r5, #8
 	.loc 3 224 0
 	str	r3, [r4, #104]
 	.loc 3 226 0
@@ -491,6 +434,7 @@ FtlConstantsInit:
 	.loc 3 227 0
 	cmp	r6, #1
 	.loc 3 228 0
+	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4, #4]
 	.loc 3 231 0
@@ -500,205 +444,171 @@ FtlConstantsInit:
 	.loc 3 232 0
 	ldr	r3, [r4, #4]
 	.loc 3 236 0
-	mov	r0, #0
+	movs	r0, #0
 	str	r0, [r4, #116]
 	.loc 3 232 0
 	str	r3, [r4, #108]
 	.loc 3 234 0
 	ldr	r3, [r4, #20]
-	lsl	r2, r3, #2
+	lsls	r2, r3, #2
 	ldrh	r3, [r4, #78]
-	mul	r3, r3, r2
+	muls	r3, r2, r3
 	ldrh	r2, [r4, #84]
-	add	r2, r2, #9
-	lsr	r3, r3, r2
-	add	r3, r3, #2
+	adds	r2, r2, #9
+	lsrs	r3, r3, r2
+	adds	r3, r3, #2
 	strh	r3, [r4, #112]	@ movhi
 	.loc 3 235 0
-	mov	r3, #32
+	movs	r3, #32
 	strh	r3, [r4, #114]	@ movhi
 	.loc 3 237 0
 	ldrh	r3, [r4, #96]
-	add	r3, r3, #3
+	adds	r3, r3, #3
 	strh	r3, [r4, #96]	@ movhi
 	.loc 3 238 0
 	ldr	r3, [r4, #104]
-	add	r3, r3, #3
+	adds	r3, r3, #3
 	str	r3, [r4, #104]
 	.loc 3 263 0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL33:
 .L26:
 	.align	2
 .L25:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+36
-.LFE145:
+.LFE155:
 	.fnend
 	.size	FtlConstantsInit, .-FtlConstantsInit
-	.align	2
+	.align	1
 	.global	IsBlkInVendorPart
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
 	.fnstart
-.LFB148:
+.LFB158:
 	.loc 3 514 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL33:
-	.movsp ip
-	mov	ip, sp
-.LCFI18:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI19:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI20:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 514 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL34:
 	.loc 3 517 0
 	ldr	r2, .L34
 	ldrh	r3, [r2, #120]
-	cmp	r3, #0
-.LBB218:
-.LBB219:
+	cbz	r3, .L33
+.LBB222:
+.LBB223:
 	.loc 3 519 0
-	ldrne	r3, [r2, #124]
-	ldrhne	r2, [r2, #96]
-	addne	r2, r3, r2, lsl #1
-.LBE219:
-.LBE218:
-	.loc 3 517 0
-	bne	.L29
+	ldr	r3, [r2, #124]
+	ldrh	r2, [r2, #96]
+	add	r2, r3, r2, lsl #1
+.L29:
+	.loc 3 518 0
+	cmp	r3, r2
+	bne	.L30
 .L33:
+.LBE223:
+.LBE222:
 	.loc 3 524 0
-	mov	r0, #0
-.LVL34:
-	ldmfd	sp, {fp, sp, pc}
+	movs	r0, #0
 .LVL35:
+	bx	lr
+.LVL36:
 .L30:
-.LBB221:
-.LBB220:
+.LBB225:
+.LBB224:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	beq	.L32
-.L29:
-	.loc 3 518 0
-	cmp	r3, r2
-	bne	.L30
-	b	.L33
-.L32:
+	bne	.L29
 	.loc 3 520 0
-	mov	r0, #1
-.LVL36:
-.LBE220:
-.LBE221:
+	movs	r0, #1
+.LVL37:
+.LBE224:
+.LBE225:
 	.loc 3 525 0
-	ldmfd	sp, {fp, sp, pc}
+	bx	lr
 .L35:
 	.align	2
 .L34:
 	.word	.LANCHOR0
-.LFE148:
+.LFE158:
 	.fnend
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
-	.align	2
+	.align	1
 	.global	sftl_get_density
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_get_density, %function
 sftl_get_density:
 	.fnstart
-.LFB161:
-	.loc 3 1212 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI21:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI22:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI23:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 1212 0
+.LFB171:
 	.loc 3 1214 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 3 1216 0
 	ldr	r3, .L37
 	ldr	r0, [r3, #116]
-	ldmfd	sp, {fp, sp, pc}
+	bx	lr
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR0
-.LFE161:
+.LFE171:
 	.fnend
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
-	.align	2
+	.align	1
 	.global	FtlBbmMapBadBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 	.fnstart
-.LFB162:
+.LFB172:
 	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
 	.loc 4 5 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL37:
-	.movsp ip
-	mov	ip, sp
-.LCFI24:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI25:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI26:
-	.pad #8
-	sub	sp, sp, #8
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 5 0
-	.loc 4 10 0
-	ldr	r4, .L40
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL38:
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.save {r4, r5, r6, r7, lr}
+	.pad #12
+.LCFI2:
+.LVL39:
 	.loc 4 5 0
 	mov	r5, r0
 	.loc 4 10 0
+	ldr	r4, .L40
 	ldrh	r7, [r4, #74]
 	mov	r1, r7
 	bl	__aeabi_uidiv
-.LVL38:
+.LVL40:
 	uxth	r6, r0
-.LVL39:
+.LVL41:
 	mov	r1, r7
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL40:
+.LVL42:
 	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
 	.loc 4 15 0
 	ldr	r2, [r2, #156]
-	lsr	r1, r3, #5
-	and	ip, r3, #31
-	mov	lr, #1
-	ldr	r0, [r2, r1, lsl #2]
-	orr	r0, r0, lr, lsl ip
+	lsrs	r1, r3, #5
+	and	r7, r3, #31
+	movs	r0, #1
+	lsls	r0, r0, r7
+	ldr	r7, [r2, r1, lsl #2]
+	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
 	.loc 4 16 0
 	mov	r2, r6
@@ -706,52 +616,45 @@ FtlBbmMapBadBlock:
 	mov	r1, r5
 	ldr	r0, .L40+4
 	bl	printk
-.LVL41:
+.LVL43:
 	.loc 4 17 0
 	ldrh	r3, [r4, #134]
 	.loc 4 19 0
-	mov	r0, #0
+	movs	r0, #0
 	.loc 4 17 0
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	strh	r3, [r4, #134]	@ movhi
 	.loc 4 19 0
-	sub	sp, fp, #28
-.LCFI27:
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL42:
+	add	sp, sp, #12
+.LCFI3:
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL44:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR0
 	.word	.LC0
-.LFE162:
+.LFE172:
 	.fnend
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.align	2
+	.align	1
 	.global	FtlBbmIsBadBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
 	.fnstart
-.LFB163:
+.LFB173:
 	.loc 4 24 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL43:
-	.movsp ip
-	mov	ip, sp
-.LCFI28:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI29:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI30:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL45:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI4:
 	.loc 4 24 0
 	mov	r7, r0
 	.loc 4 30 0
@@ -760,3345 +663,2692 @@ FtlBbmIsBadBlock:
 	.loc 4 31 0
 	mov	r1, r6
 	bl	__aeabi_uidivmod
-.LVL44:
+.LVL46:
 	.loc 4 30 0
 	mov	r0, r7
 	.loc 4 31 0
 	uxth	r4, r1
-.LVL45:
+.LVL47:
 	.loc 4 30 0
 	mov	r1, r6
 	bl	__aeabi_uidiv
-.LVL46:
+.LVL48:
 	uxth	r0, r0
-.LVL47:
+.LVL49:
 	.loc 4 34 0
-	lsr	r2, r4, #5
+	lsrs	r2, r4, #5
 	.loc 4 33 0
 	add	r5, r5, r0, lsl #2
 	.loc 4 34 0
 	and	r4, r4, #31
-.LVL48:
+.LVL50:
 	ldr	r3, [r5, #156]
 	ldr	r0, [r3, r2, lsl #2]
-.LVL49:
-	lsr	r0, r0, r4
+.LVL51:
+	lsrs	r0, r0, r4
 	.loc 4 36 0
 	and	r0, r0, #1
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL52:
 .L44:
 	.align	2
 .L43:
 	.word	.LANCHOR0
-.LFE163:
+.LFE173:
 	.fnend
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
-	.align	2
+	.align	1
 	.global	FtlBbtInfoPrint
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
 	.fnstart
-.LFB164:
+.LFB174:
 	.loc 4 39 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI31:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI32:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI33:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 39 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE164:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+.LFE174:
 	.fnend
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.align	2
+	.align	1
 	.global	FtlBbtMemInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
 	.fnstart
-.LFB167:
+.LFB177:
 	.loc 4 149 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI34:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI35:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI36:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 149 0
-	.loc 4 150 0
-	mvn	r3, #0
-.LBB227:
-.LBB228:
-.LBB229:
-	.loc 1 202 0
-	mov	r2, #16
-.LBE229:
-.LBE228:
-.LBE227:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
 	.loc 4 150 0
 	ldr	r0, .L47
-.LBB234:
+	movw	r3, #65535
+.LBB231:
 .LBB232:
-.LBB230:
+.LBB233:
 	.loc 1 202 0
-	mov	r1, #255
-.LBE230:
+	movs	r2, #16
+	movs	r1, #255
+.LBE233:
 .LBE232:
-.LBE234:
+.LBE231:
 	.loc 4 150 0
 	strh	r3, [r0, #128]	@ movhi
 	.loc 4 151 0
-	mov	r3, #0
+	movs	r3, #0
 	strh	r3, [r0, #134]	@ movhi
+.LBB236:
 .LBB235:
-.LBB233:
-.LBB231:
+.LBB234:
 	.loc 1 202 0
-	add	r0, r0, #140
-	bl	memset
-.LVL50:
-	ldmfd	sp, {fp, sp, pc}
+	adds	r0, r0, #140
+	b	memset
+.LVL53:
 .L48:
 	.align	2
 .L47:
 	.word	.LANCHOR0
-.LBE231:
-.LBE233:
+.LBE234:
 .LBE235:
-.LFE167:
+.LBE236:
+.LFE177:
 	.fnend
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.align	2
+	.align	1
 	.global	FtlBbtCalcTotleCnt
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
 	.fnstart
-.LFB168:
+.LFB178:
 	.loc 4 157 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI37:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI38:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI39:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 157 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 4 160 0
-	mov	r5, #0
 	ldr	r3, .L56
+	.loc 4 157 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI5:
+	.loc 4 160 0
+	movs	r5, #0
 	.loc 4 159 0
 	mov	r4, r5
 	.loc 4 160 0
 	ldrh	r2, [r3, #74]
 	ldrh	r6, [r3, #30]
-	mul	r6, r6, r2
+	muls	r6, r2, r6
 .L50:
 	uxth	r0, r5
-.LVL51:
+.LVL54:
 	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
-.LVL52:
+.LVL55:
 	blt	.L52
 	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+	pop	{r4, r5, r6, pc}
 .L52:
 	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL53:
-	cmp	r0, #0
-	add	r5, r5, #1
+.LVL56:
+	cbz	r0, .L51
 	.loc 4 164 0
-	addne	r4, r4, #1
-	uxthne	r4, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L51:
+	adds	r5, r5, #1
 	b	.L50
 .L57:
 	.align	2
 .L56:
 	.word	.LANCHOR0
-.LFE168:
+.LFE178:
 	.fnend
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
-	.align	2
+	.align	1
 	.global	V2P_block
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
 	.fnstart
-.LFB172:
+.LFB182:
 	.loc 2 5 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL54:
-	.movsp ip
-	mov	ip, sp
-.LCFI40:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI41:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI42:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL57:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI6:
 	.loc 2 5 0
 	mov	r5, r1
-	mov	r7, r0
 	.loc 2 8 0
 	ldr	r4, .L59
+	.loc 2 5 0
+	mov	r7, r0
+	.loc 2 8 0
 	ldrh	r6, [r4, #32]
 	mov	r1, r6
-.LVL55:
+.LVL58:
 	bl	__aeabi_uidiv
-.LVL56:
+.LVL59:
 	ldrh	r4, [r4, #74]
 	smulbb	r5, r6, r5
-.LVL57:
+.LVL60:
 	mov	r1, r6
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL58:
-	add	r0, r5, r1
-	add	r0, r4, r0
+.LVL61:
+	adds	r0, r5, r1
+	add	r0, r0, r4
 	.loc 2 10 0
 	uxth	r0, r0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL62:
 .L60:
 	.align	2
 .L59:
 	.word	.LANCHOR0
-.LFE172:
+.LFE182:
 	.fnend
 	.size	V2P_block, .-V2P_block
-	.align	2
+	.align	1
 	.global	P2V_plane
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
 	.fnstart
-.LFB173:
+.LFB183:
 	.loc 2 13 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL59:
-	.movsp ip
-	mov	ip, sp
-.LCFI43:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI44:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI45:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL63:
+	.loc 2 16 0
+	ldr	r3, .L62
+	.loc 2 13 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI7:
 	.loc 2 13 0
 	mov	r6, r0
 	.loc 2 16 0
-	ldr	r3, .L62
 	ldrh	r5, [r3, #32]
 	ldrh	r1, [r3, #74]
 	bl	__aeabi_uidiv
-.LVL60:
+.LVL64:
 	mov	r1, r5
 	smulbb	r4, r0, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL61:
-	add	r1, r4, r1
+.LVL65:
+	add	r1, r1, r4
 	.loc 2 18 0
 	uxth	r0, r1
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+	pop	{r4, r5, r6, pc}
+.LVL66:
 .L63:
 	.align	2
 .L62:
 	.word	.LANCHOR0
-.LFE173:
+.LFE183:
 	.fnend
 	.size	P2V_plane, .-P2V_plane
-	.align	2
+	.align	1
 	.global	P2V_block_in_plane
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	.fnstart
-.LFB174:
+.LFB184:
 	.loc 2 21 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL62:
-	.movsp ip
-	mov	ip, sp
-.LCFI46:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI47:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI48:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 21 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL67:
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI8:
 	.loc 2 24 0
 	ldr	r4, .L65
 	ldrh	r1, [r4, #74]
 	bl	__aeabi_uidivmod
-.LVL63:
+.LVL68:
 	uxth	r0, r1
 	.loc 2 25 0
 	ldrh	r1, [r4, #32]
 	bl	__aeabi_uidiv
-.LVL64:
+.LVL69:
 	.loc 2 27 0
 	uxth	r0, r0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
+	pop	{r4, pc}
 .L66:
 	.align	2
 .L65:
 	.word	.LANCHOR0
-.LFE174:
+.LFE184:
 	.fnend
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
-	.align	2
+	.align	1
 	.global	ftl_cmp_data_ver
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
 	.fnstart
-.LFB175:
+.LFB185:
 	.loc 2 31 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL65:
-	.movsp ip
-	mov	ip, sp
-.LCFI49:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI50:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI51:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 31 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL70:
 	.loc 2 34 0
 	cmp	r0, r1
 	bls	.L68
 	.loc 2 36 0
-	sub	r0, r0, r1
-.LVL66:
+	subs	r0, r0, r1
+.LVL71:
 	cmp	r0, #-2147483648
+	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
-	ldmfd	sp, {fp, sp, pc}
-.LVL67:
+	bx	lr
+.LVL72:
 .L68:
 	.loc 2 40 0
-	sub	r0, r1, r0
-.LVL68:
+	subs	r0, r1, r0
+.LVL73:
 	cmp	r0, #-2147483648
+	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
 	.loc 2 44 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE175:
+	bx	lr
+.LFE185:
 	.fnend
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.align	2
+	.align	1
 	.global	FtlFreeSysBlkQueueInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	.fnstart
-.LFB177:
+.LFB187:
 	.loc 2 76 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL69:
-	.movsp ip
-	mov	ip, sp
-.LCFI52:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI53:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI54:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 76 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL74:
 	.loc 2 79 0
-	mov	r4, #0
-.LBB241:
+	ldr	r3, .L71
 .LBB242:
 .LBB243:
+.LBB244:
 	.loc 1 202 0
 	mov	r1, #2048
+.LBE244:
 .LBE243:
 .LBE242:
-.LBE241:
+	.loc 2 76 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI9:
 	.loc 2 79 0
-	ldr	r3, .L71
+	movs	r4, #0
 	.loc 2 82 0
 	strh	r0, [r3, #188]	@ movhi
-.LBB248:
-.LBB246:
-.LBB244:
+.LBB249:
+.LBB247:
+.LBB245:
 	.loc 1 202 0
 	add	r0, r3, #196
-.LVL70:
-.LBE244:
-.LBE246:
-.LBE248:
+.LVL75:
+.LBE245:
+.LBE247:
+.LBE249:
 	.loc 2 79 0
 	strh	r4, [r3, #190]	@ movhi
 	.loc 2 80 0
 	strh	r4, [r3, #192]	@ movhi
 	.loc 2 81 0
 	strh	r4, [r3, #194]	@ movhi
-.LBB249:
-.LBB247:
-.LBB245:
+.LBB250:
+.LBB248:
+.LBB246:
 	.loc 1 202 0
 	bl	__memzero
-.LVL71:
-.LBE245:
-.LBE247:
-.LBE249:
+.LVL76:
+.LBE246:
+.LBE248:
+.LBE250:
 	.loc 2 85 0
 	mov	r0, r4
-	ldmfd	sp, {r4, r5, fp, sp, pc}
+	pop	{r4, pc}
 .L72:
 	.align	2
 .L71:
 	.word	.LANCHOR0
-.LFE177:
+.LFE187:
 	.fnend
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.align	2
+	.align	1
 	.global	FtlFreeSysBlkQueueEmpty
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
 	.fnstart
-.LFB178:
+.LFB188:
 	.loc 2 88 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI55:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI56:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI57:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 88 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
 	.loc 2 89 0
 	ldr	r3, .L74
 	ldrh	r0, [r3, #194]
 	.loc 2 90 0
 	clz	r0, r0
-	lsr	r0, r0, #5
-	ldmfd	sp, {fp, sp, pc}
+	lsrs	r0, r0, #5
+	bx	lr
 .L75:
 	.align	2
 .L74:
 	.word	.LANCHOR0
-.LFE178:
+.LFE188:
 	.fnend
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
-	.align	2
+	.align	1
 	.global	FtlFreeSysBlkQueueFull
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
 	.fnstart
-.LFB179:
+.LFB189:
 	.loc 2 93 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI58:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI59:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI60:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 93 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
 	.loc 2 94 0
 	ldr	r3, .L77
 	ldrh	r0, [r3, #194]
 	.loc 2 95 0
-	sub	r0, r0, #1024
-	clz	r0, r0
-	lsr	r0, r0, #5
-	ldmfd	sp, {fp, sp, pc}
+	sub	r3, r0, #1024
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
+	bx	lr
 .L78:
 	.align	2
 .L77:
 	.word	.LANCHOR0
-.LFE179:
+.LFE189:
 	.fnend
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
-	.align	2
+	.align	1
 	.global	FtlFreeSysBLkSort
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 	.fnstart
-.LFB181:
-	.loc 2 116 0
+.LFB191:
+	.loc 2 118 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI61:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI62:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI63:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 116 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 2 123 0
-	mov	r3, #0
-	ldr	r6, .L88
-	mov	r4, r6
-.L80:
-	.loc 2 123 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6, #194]
-	uxth	r2, r3
-	add	r7, r3, #1
-	cmp	r1, r2
-	bhi	.L81
-	mov	r1, #0
-.LVL72:
-.L82:
-	.loc 2 128 0 is_stmt 1 discriminator 1
-	ldrh	lr, [r4, #194]
-.LVL73:
-	sub	r3, lr, #1
-.LVL74:
-	cmp	r1, r3
-	blt	.L87
-	.loc 2 144 0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL75:
-.L81:
-	.loc 2 124 0 discriminator 3
-	ldrh	r2, [r6, #190]
-	uxth	r5, r3
-	add	r3, r2, r5
-	add	r3, r6, r3, lsl #1
-	ldrh	r0, [r3, #196]
-	bl	P2V_block_in_plane
-.LVL76:
-	.loc 2 125 0 discriminator 3
-	ldr	r2, [r6, #2248]
-	lsl	r0, r0, #1
-	ldr	r3, [r6, #2244]
-	ldrh	r2, [r2, r0]
-	str	r2, [r3, r5, lsl #2]
-	mov	r3, r7
-	b	.L80
+	ldr	r3, .L88
+	.loc 2 118 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI10:
+	.loc 2 123 0
+	ldrh	r2, [r3, #194]
+	cbz	r2, .L79
+	.loc 2 119 0
+	ldrh	r5, [r3, #2272]
+	movs	r0, #0
+	ldrh	r1, [r3, #190]
+	mov	r6, r0
+	ldrh	r2, [r3, #192]
+	and	r5, r5, #31
 .LVL77:
-.L87:
-	.loc 2 130 0
-	add	r0, r1, #1
-	.loc 2 131 0
-	ldr	ip, [r4, #2244]
+.L81:
+	.loc 2 124 0 discriminator 1
+	uxth	r4, r0
+	adds	r0, r0, #1
+	cmp	r5, r4
+	bgt	.L82
+	cbz	r6, .L79
+	strh	r1, [r3, #190]	@ movhi
+	strh	r2, [r3, #192]	@ movhi
+.L79:
+	pop	{r4, r5, r6, pc}
 .LVL78:
-	.loc 2 130 0
-	uxth	r0, r0
-	mov	r3, r1
+.L82:
+	.loc 2 125 0 discriminator 3
+	add	r4, r3, r1, lsl #1
+	.loc 2 126 0 discriminator 3
+	adds	r1, r1, #1
+	ubfx	r1, r1, #0, #10
+	.loc 2 125 0 discriminator 3
+	ldrh	r6, [r4, #196]
 .LVL79:
-	mov	r2, r0
-.L83:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	r2, lr
-	bcc	.L85
-	.loc 2 134 0 is_stmt 1
-	cmp	r1, r3
-	beq	.L86
-	.loc 2 136 0
-	ldr	r2, [ip, r1, lsl #2]
-	.loc 2 135 0
-	ldr	lr, [ip, r3, lsl #2]
+	.loc 2 127 0 discriminator 3
+	add	r4, r3, r2, lsl #1
+	strh	r6, [r4, #196]	@ movhi
+	movs	r6, #1
 .LVL80:
-	.loc 2 136 0
-	str	r2, [ip, r3, lsl #2]
-	.loc 2 137 0
-	ldr	r2, [r4, #2244]
-	str	lr, [r2, r1, lsl #2]
-	.loc 2 139 0
-	ldrh	r2, [r4, #190]
-	add	r3, r3, r2
-.LVL81:
-	.loc 2 140 0
-	add	r2, r1, r2
-	.loc 2 139 0
-	add	r3, r3, #4
-	.loc 2 140 0
-	add	r2, r2, #4
-	.loc 2 139 0
-	add	r3, r4, r3, lsl #1
-	.loc 2 140 0
-	add	r2, r4, r2, lsl #1
-	.loc 2 139 0
-	ldrh	ip, [r3, #188]
-.LVL82:
-	.loc 2 140 0
-	ldrh	r1, [r2, #188]
-	strh	r1, [r3, #188]	@ movhi
-	.loc 2 141 0
-	strh	ip, [r2, #188]	@ movhi
-.LVL83:
-.L86:
-	.loc 2 130 0 discriminator 1
-	mov	r1, r0
-	b	.L82
-.LVL84:
-.L85:
-	.loc 2 131 0
-	ldr	r6, [ip, r3, lsl #2]
-	ldr	r5, [ip, r2, lsl #2]
-	cmp	r6, r5
-	movhi	r3, r2
-	.loc 2 130 0
-	add	r2, r2, #1
-	uxth	r2, r2
-	b	.L83
+	.loc 2 128 0 discriminator 3
+	add	r2, r2, r6
+	ubfx	r2, r2, #0, #10
+	b	.L81
 .L89:
 	.align	2
 .L88:
 	.word	.LANCHOR0
-.LFE181:
+.LFE191:
 	.fnend
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.align	2
+	.align	1
 	.global	IsInFreeQueue
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 	.fnstart
-.LFB182:
-	.loc 2 147 0
+.LFB192:
+	.loc 2 163 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL85:
-	.movsp ip
-	mov	ip, sp
-.LCFI64:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI65:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI66:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 147 0
-.LBB250:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL81:
 .LBB251:
+.LBB252:
 	.loc 2 94 0
 	ldr	r3, .L96
-	ldrh	ip, [r3, #194]
+.LBE252:
 .LBE251:
-.LBE250:
-	.loc 2 152 0
-	cmp	ip, #1024
-	.loc 2 155 0
-	ldrhne	lr, [r3, #190]
-	movne	r1, #0
-.LVL86:
-	.loc 2 152 0
-	bne	.L92
+	.loc 2 163 0
+	push	{r4, r5, lr}
+	.save {r4, r5, lr}
+.LCFI11:
+.LBB254:
+.LBB253:
+	.loc 2 94 0
+	ldrh	r4, [r3, #194]
+.LBE253:
+.LBE254:
+	.loc 2 168 0
+	cmp	r4, #1024
+	beq	.L94
+	.loc 2 171 0
+	ldrh	r5, [r3, #190]
+	movs	r1, #0
+.LVL82:
+.L92:
+	.loc 2 170 0 discriminator 1
+	cmp	r1, r4
+	bcc	.L93
 .L94:
-	.loc 2 148 0
-	mov	r0, #0
-.LVL87:
-	ldmfd	sp, {fp, sp, pc}
-.LVL88:
+	.loc 2 164 0
+	movs	r0, #0
+.LVL83:
+	pop	{r4, r5, pc}
+.LVL84:
 .L93:
-	.loc 2 155 0
-	add	r2, r1, lr
+	.loc 2 171 0
+	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
 	ldrh	r2, [r2, #196]
 	cmp	r2, r0
 	beq	.L95
-	.loc 2 154 0 discriminator 2
-	add	r1, r1, #1
-.L92:
-	.loc 2 154 0 is_stmt 0 discriminator 1
-	cmp	r1, ip
-	bcc	.L93
-	b	.L94
+	.loc 2 170 0 discriminator 2
+	adds	r1, r1, #1
+	b	.L92
 .L95:
-	.loc 2 156 0 is_stmt 1
-	mov	r0, #1
-.LVL89:
-	.loc 2 162 0
-	ldmfd	sp, {fp, sp, pc}
+	.loc 2 172 0
+	movs	r0, #1
+.LVL85:
+	.loc 2 178 0
+	pop	{r4, r5, pc}
 .L97:
 	.align	2
 .L96:
 	.word	.LANCHOR0
-.LFE182:
+.LFE192:
 	.fnend
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	.fnstart
-.LFB183:
-	.loc 2 165 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI67:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI68:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI69:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 165 0
-.LBB252:
-.LBB253:
-	.loc 2 89 0
-	ldr	r2, .L101
-	ldrh	r1, [r2, #194]
-.LBE253:
-.LBE252:
-	.loc 2 168 0
-	cmp	r1, #0
-.LBB254:
-	.loc 2 170 0
-	ldrhne	r3, [r2, #190]
-	.loc 2 171 0
-	subne	r1, r1, #1
-	strhne	r1, [r2, #194]	@ movhi
-	.loc 2 170 0
-	addne	r0, r2, r3, lsl #1
-	.loc 2 172 0
-	addne	r3, r3, #1
-	ubfxne	r3, r3, #0, #10
-	.loc 2 170 0
-	ldrhne	r0, [r0, #196]
-.LBE254:
-	.loc 2 166 0
-	movweq	r0, #65535
-.LBB255:
-	.loc 2 172 0
-	strhne	r3, [r2, #190]	@ movhi
-.LBE255:
-	.loc 2 176 0
-	ldmfd	sp, {fp, sp, pc}
-.L102:
-	.align	2
-.L101:
-	.word	.LANCHOR0
-.LFE183:
-	.fnend
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.align	2
+	.align	1
 	.global	insert_data_list
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
 	.fnstart
-.LFB186:
-	.loc 2 217 0
+.LFB196:
+	.loc 2 249 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL90:
-	.movsp ip
-	mov	ip, sp
-.LCFI70:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI71:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI72:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL86:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 217 0
-	.loc 2 225 0
+.LCFI12:
+.LVL87:
+	.loc 2 260 0
+	ldr	r2, .L113
+	ldrh	r3, [r2, #16]
+	mov	r5, r2
+.LVL88:
+	cmp	r3, r0
+	bls	.L100
+.LBB257:
+.LBB258:
+	.loc 2 265 0
+	movs	r4, #6
+	ldr	ip, [r2, #2292]
+	muls	r4, r0, r4
+	.loc 2 266 0
 	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L104
-	.loc 2 230 0
-	ldr	r2, .L116
-	mov	lr, #6
-	mul	lr, lr, r0
-	.loc 2 231 0
-	mvn	ip, #0
-	.loc 2 230 0
-	ldr	r5, [r2, #2252]
-	mov	r4, r2
-	add	r1, r5, lr
+	.loc 2 265 0
+	add	r1, ip, r4
+.LVL89:
+	.loc 2 266 0
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [ip, r4]	@ movhi
+	.loc 2 268 0
+	ldr	r3, [r2, #2296]
+.LVL90:
+	cbnz	r3, .L101
+	.loc 2 269 0
+	str	r1, [r2, #2296]
 .LVL91:
-	.loc 2 231 0
-	strh	ip, [r1, #2]	@ movhi
-	strh	ip, [r5, lr]	@ movhi
-	.loc 2 233 0
-	ldr	r3, [r2, #2256]
+.L100:
+.LBE258:
+.LBE257:
+	.loc 2 323 0
+	movs	r0, #0
 .LVL92:
-	cmp	r3, #0
-	.loc 2 234 0
-	streq	r1, [r2, #2256]
-	.loc 2 233 0
-	beq	.L104
-	.loc 2 238 0
-	ldr	r7, [r2, #2260]
-	lsl	r9, r0, #1
-	.loc 2 239 0
-	ldrh	r2, [r1, #4]
-	.loc 2 238 0
-	ldrh	r6, [r7, r9]
+	add	sp, sp, #12
+.LCFI13:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL93:
-	.loc 2 240 0
-	cmp	r2, #0
-	.loc 2 239 0
-	mulne	ip, r2, r6
+.L101:
+.LCFI14:
+.LBB260:
+.LBB259:
+	.loc 2 274 0
+	ldrh	r6, [r1, #4]
+	.loc 2 273 0
+	lsl	r10, r0, #1
+	ldr	r8, [r2, #2300]
+	ldrh	r2, [r8, r0, lsl #1]
 .LVL94:
-	.loc 2 244 0
-	ldr	r6, [r4, #2252]
+	.loc 2 275 0
+	cmp	r6, #0
+	beq	.L111
+	.loc 2 274 0
+	muls	r6, r2, r6
 .LVL95:
-	sub	r2, r3, r6
-	asr	r8, r2, #1
-	ldr	r2, .L116+4
-	mul	r2, r2, r8
-	.loc 2 252 0
-	ldr	r8, [r4, #2248]
-	add	r4, r8, r9
-	.loc 2 244 0
-	uxth	r2, r2
-	.loc 2 252 0
-	str	r4, [fp, #-48]
+.L102:
+	.loc 2 279 0
+	ldr	lr, [r5, #2292]
+	.loc 2 282 0
+	ldrh	r7, [r5, #16]
+	.loc 2 279 0
+	sub	r2, r3, lr
 .LVL96:
-.L112:
-	.loc 2 246 0
-	lsl	r9, r2, #1
-	.loc 2 247 0
-	ldrh	r4, [r3, #4]
-	.loc 2 246 0
-	ldrh	r10, [r7, r9]
-	.loc 2 248 0
-	cmp	r4, #0
-	.loc 2 249 0
-	mvneq	r4, #0
+	asr	r9, r2, #1
+	ldr	r2, .L113+4
+	.loc 2 282 0
+	str	r7, [sp]
+	.loc 2 279 0
+	mul	r2, r2, r9
+	.loc 2 294 0
+	ldr	r9, [r5, #2304]
+	add	r5, r9, r10
+	.loc 2 279 0
+	uxth	r2, r2
+	.loc 2 294 0
+	str	r5, [sp, #4]
+	.loc 2 256 0
+	movs	r5, #0
 .LVL97:
-	.loc 2 247 0
-	mulne	r4, r4, r10
+.L109:
+	.loc 2 281 0
+	adds	r5, r5, #1
 .LVL98:
-	.loc 2 251 0
-	cmp	ip, r4
-	bne	.L108
-	.loc 2 252 0
-	ldr	r4, [fp, #-48]
+	.loc 2 282 0
+	ldr	r7, [sp]
+	.loc 2 281 0
+	uxth	r5, r5
 .LVL99:
-	ldrh	r9, [r8, r9]
-	ldrh	r4, [r4]
-	cmp	r9, r4
-	bcc	.L110
+	.loc 2 282 0
+	cmp	r5, r7
+	bhi	.L100
+	.loc 2 285 0
+	cmp	r0, r2
+	beq	.L100
+	.loc 2 289 0
+	ldrh	r7, [r3, #4]
+	.loc 2 288 0
+	lsl	r10, r2, #1
+	ldrh	fp, [r8, r2, lsl #1]
+	.loc 2 290 0
+	cbz	r7, .L112
+	.loc 2 289 0
+	mul	r7, r7, fp
 .LVL100:
-.L109:
-	.loc 2 270 0
-	strh	r2, [r5, lr]	@ movhi
-	.loc 2 273 0
-	ldr	ip, .L116
+.L104:
+	.loc 2 293 0
+	cmp	r6, r7
+	bne	.L105
+	.loc 2 294 0
+	ldr	r7, [sp, #4]
 .LVL101:
-	.loc 2 271 0
+	ldrh	r10, [r9, r10]
+	ldrh	r7, [r7]
+	cmp	r10, r7
+	bcc	.L107
+.LVL102:
+.L106:
+	.loc 2 312 0
+	strh	r2, [ip, r4]	@ movhi
+	.loc 2 315 0
+	ldr	r4, .L113
+	.loc 2 313 0
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 2 273 0
-	ldr	r2, [ip, #2256]
+	.loc 2 315 0
+	ldr	r2, [r4, #2296]
 	cmp	r3, r2
-	.loc 2 277 0
-	ldrhne	lr, [r3, #2]
-	movne	r2, #6
-	ldrne	r1, [ip, #2252]
-.LVL102:
-	.loc 2 274 0
-	strheq	r0, [r3, #2]	@ movhi
+	.loc 2 319 0
+	ittte	ne
+	ldrhne	r5, [r3, #2]
 .LVL103:
-	.loc 2 275 0
-	streq	r1, [ip, #2256]
-	.loc 2 277 0
-	mulne	r2, r2, lr
-	strhne	r0, [r1, r2]	@ movhi
+	movne	r2, #6
+	ldrne	r1, [r4, #2292]
 .LVL104:
-	.loc 2 278 0
-	strhne	r0, [r3, #2]	@ movhi
-	b	.L104
+	.loc 2 316 0
+	strheq	r0, [r3, #2]	@ movhi
 .LVL105:
-.L108:
-	.loc 2 256 0
-	bcc	.L109
-.L110:
-	.loc 2 259 0
-	ldrh	r4, [r3]
+	.loc 2 317 0
+	iteee	eq
+	streq	r1, [r4, #2296]
+	.loc 2 319 0
+	mulne	r2, r2, r5
+	strhne	r0, [r1, r2]	@ movhi
 .LVL106:
-	movw	r9, #65535
-	cmp	r4, r9
-	bne	.L111
-	.loc 2 260 0
-	strh	r2, [r1, #2]	@ movhi
-	.loc 2 261 0
-	strh	r0, [r3]	@ movhi
-	.loc 2 262 0
-	ldr	r3, .L116
+	.loc 2 320 0
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L100
 .LVL107:
-	str	r1, [r3, #2264]
+.L111:
+	.loc 2 276 0
+	mov	r6, #-1
 .LVL108:
-.L104:
-	.loc 2 281 0
-	mov	r0, #0
+	b	.L102
 .LVL109:
-	sub	sp, fp, #40
-.LCFI73:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L112:
+	.loc 2 291 0
+	mov	r7, #-1
 .LVL110:
-.L111:
-.LCFI74:
-	.loc 2 267 0
-	mov	r3, #6
+	b	.L104
+.L105:
+	.loc 2 298 0
+	bcc	.L106
+.L107:
+	.loc 2 301 0
+	ldrh	r7, [r3]
 .LVL111:
-	.loc 2 246 0
-	mov	r2, r4
-	.loc 2 267 0
-	mla	r3, r3, r4, r6
+	movw	r10, #65535
+	cmp	r7, r10
+	bne	.L108
+	.loc 2 302 0
+	strh	r2, [r1, #2]	@ movhi
+	.loc 2 303 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 304 0
+	ldr	r3, .L113
 .LVL112:
-	.loc 2 246 0
-	b	.L112
-.L117:
+	str	r1, [r3, #2308]
+	b	.L100
+.LVL113:
+.L108:
+	.loc 2 309 0
+	movs	r3, #6
+.LVL114:
+	mov	r2, r7
+	mla	r3, r3, r7, lr
+.LVL115:
+	b	.L109
+.L114:
 	.align	2
-.L116:
+.L113:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE186:
+.LBE259:
+.LBE260:
+.LFE196:
 	.fnend
 	.size	insert_data_list, .-insert_data_list
-	.align	2
+	.align	1
 	.global	INSERT_DATA_LIST
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 	.fnstart
-.LFB185:
-	.loc 2 186 0
+.LFB195:
+	.loc 2 218 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL113:
-	.movsp ip
-	mov	ip, sp
-.LCFI75:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI76:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI77:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 186 0
-	.loc 2 187 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL116:
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI15:
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL114:
-	.loc 2 188 0
-	ldr	r2, .L120
-	movw	r1, #2268
-	ldrh	r3, [r2, r1]
-	add	r3, r3, #1
+.LVL117:
+	.loc 2 220 0
+	ldr	r2, .L117
+	ldrh	r3, [r2, #2312]
+	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, r1]	@ movhi
-	.loc 2 189 0
+	strh	r3, [r2, #2312]	@ movhi
+	.loc 2 221 0
 	ldrh	r2, [r2, #16]
 	cmp	r2, r3
-	ldmfdcs	sp, {fp, sp, pc}
-.LBB258:
-.LBB259:
-	mov	r2, #189
-	ldr	r1, .L120+4
-	ldr	r0, .L120+8
-	bl	printk
-.LVL115:
-	ldmfd	sp, {fp, sp, pc}
-.L121:
+	bcs	.L115
+.LBB263:
+.LBB264:
+	movs	r2, #221
+	ldr	r1, .L117+4
+	ldr	r0, .L117+8
+.LBE264:
+.LBE263:
+	.loc 2 222 0
+	pop	{r3, lr}
+.LCFI16:
+.LBB266:
+.LBB265:
+	.loc 2 221 0
+	b	printk
+.LVL118:
+.L115:
+.LCFI17:
+	pop	{r3, pc}
+.L118:
 	.align	2
-.L120:
+.L117:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
-.LBE259:
-.LBE258:
-.LFE185:
+.LBE265:
+.LBE266:
+.LFE195:
 	.fnend
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
-	.align	2
+	.align	1
 	.global	insert_free_list
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
 	.fnstart
-.LFB187:
-	.loc 2 284 0
+.LFB197:
+	.loc 2 326 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL116:
-	.movsp ip
-	mov	ip, sp
-.LCFI78:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI79:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI80:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 284 0
-	.loc 2 290 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL119:
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI18:
+	.loc 2 332 0
 	movw	r4, #65535
 	cmp	r0, r4
-	beq	.L123
-	.loc 2 293 0
-	ldr	r2, .L129
-	mov	lr, #6
-	mul	r5, lr, r0
-	.loc 2 294 0
-	mvn	r3, #0
-	.loc 2 293 0
-	ldr	r6, [r2, #2252]
-	mov	r1, r2
-	add	ip, r6, r5
-.LVL117:
-	.loc 2 294 0
-	strh	r3, [ip, #2]	@ movhi
-	strh	r3, [r6, r5]	@ movhi
-	.loc 2 296 0
-	ldr	r3, [r2, #2272]
-.LVL118:
-	cmp	r3, #0
-	.loc 2 297 0
-	streq	ip, [r2, #2272]
-	.loc 2 296 0
-	beq	.L123
-	.loc 2 301 0
-	ldr	r9, [r2, #2248]
-	lsl	r2, r0, #1
-	.loc 2 303 0
-	ldr	r8, [r1, #2252]
-	.loc 2 301 0
-	ldrh	r10, [r9, r2]
-.LVL119:
-	.loc 2 303 0
-	sub	r2, r3, r8
-	asr	r7, r2, #1
-	ldr	r2, .L129+4
-	mul	r2, r2, r7
+	beq	.L120
+	.loc 2 335 0
+	ldr	r2, .L126
+	movs	r1, #6
+	mul	r7, r1, r0
+	ldr	ip, [r2, #2292]
+	mov	r5, r2
+	add	r6, ip, r7
+.LVL120:
+	.loc 2 336 0
+	strh	r4, [r6, #2]	@ movhi
+	strh	r4, [ip, r7]	@ movhi
+	.loc 2 338 0
+	ldr	r3, [r2, #2316]
+.LVL121:
+	cbnz	r3, .L121
+	.loc 2 339 0
+	str	r6, [r2, #2316]
+.LVL122:
+.L120:
+	.loc 2 372 0
+	movs	r0, #0
+.LVL123:
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL124:
+.L121:
+	.loc 2 345 0
+	ldr	lr, [r2, #2292]
+	.loc 2 343 0
+	ldr	r8, [r2, #2304]
+	.loc 2 345 0
+	sub	r2, r3, lr
+	asr	r10, r2, #1
+	ldr	r2, .L126+4
+	.loc 2 343 0
+	ldrh	r9, [r8, r0, lsl #1]
+.LVL125:
+	.loc 2 345 0
+	mul	r2, r2, r10
+	.loc 2 352 0
+	mov	r10, r4
+	.loc 2 345 0
 	uxth	r2, r2
-.L127:
-	.loc 2 306 0
-	lsl	r7, r2, #1
-	.loc 2 307 0
-	ldrh	r7, [r9, r7]
-	cmp	r7, r10
-	bcs	.L125
-	.loc 2 310 0
-	ldrh	r7, [r3]
-	cmp	r7, r4
-	bne	.L126
-	.loc 2 311 0
-	strh	r2, [ip, #2]	@ movhi
-	.loc 2 312 0
+.L124:
+	.loc 2 349 0
+	ldrh	r4, [r8, r2, lsl #1]
+	cmp	r4, r9
+	bcs	.L122
+	.loc 2 352 0
+	ldrh	r4, [r3]
+	cmp	r4, r10
+	bne	.L123
+	.loc 2 353 0
+	strh	r2, [r6, #2]	@ movhi
+	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
+	.loc 2 355 0
+	b	.L120
 .L123:
-	.loc 2 330 0
-	mov	r0, #0
-.LVL120:
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL121:
-.L126:
-	.loc 2 316 0
-	mla	r3, lr, r7, r8
-	.loc 2 306 0
-	mov	r2, r7
-	b	.L127
-.L125:
-	.loc 2 319 0
-	ldrh	lr, [r3, #2]
-	strh	lr, [ip, #2]	@ movhi
-	.loc 2 320 0
-	strh	r2, [r6, r5]	@ movhi
-	.loc 2 322 0
-	ldr	r2, [r1, #2272]
+	.loc 2 358 0
+	mla	r3, r1, r4, lr
+	.loc 2 348 0
+	mov	r2, r4
+	b	.L124
+.L122:
+	.loc 2 361 0
+	ldrh	r1, [r3, #2]
+	strh	r1, [r6, #2]	@ movhi
+	.loc 2 362 0
+	strh	r2, [ip, r7]	@ movhi
+	.loc 2 364 0
+	ldr	r2, [r5, #2316]
 	cmp	r3, r2
-	.loc 2 326 0
-	ldrhne	ip, [r3, #2]
-.LVL122:
+	.loc 2 368 0
+	ittte	ne
+	ldrhne	r4, [r3, #2]
 	movne	r2, #6
-	ldrne	r1, [r1, #2252]
-	.loc 2 323 0
+	ldrne	r1, [r5, #2292]
+	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-.LVL123:
-	.loc 2 324 0
-	streq	ip, [r1, #2272]
-	.loc 2 326 0
-	mulne	r2, r2, ip
-.LVL124:
+	.loc 2 366 0
+	iteee	eq
+	streq	r6, [r5, #2316]
+	.loc 2 368 0
+	mulne	r2, r2, r4
 	strhne	r0, [r1, r2]	@ movhi
-	.loc 2 327 0
+	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L123
-.L130:
+	b	.L120
+.L127:
 	.align	2
-.L129:
+.L126:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE187:
+.LFE197:
 	.fnend
 	.size	insert_free_list, .-insert_free_list
-	.align	2
+	.align	1
 	.global	INSERT_FREE_LIST
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 	.fnstart
-.LFB184:
-	.loc 2 179 0
+.LFB194:
+	.loc 2 211 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL125:
-	.movsp ip
-	mov	ip, sp
-.LCFI81:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI82:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI83:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 179 0
-	.loc 2 180 0
-	bl	insert_free_list
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL126:
-	.loc 2 181 0
-	ldr	r2, .L133
-	movw	r1, #2276
-	ldrh	r3, [r2, r1]
-	add	r3, r3, #1
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI19:
+	.loc 2 212 0
+	bl	insert_free_list
+.LVL127:
+	.loc 2 213 0
+	ldr	r2, .L130
+	ldrh	r3, [r2, #2320]
+	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, r1]	@ movhi
-	.loc 2 182 0
+	strh	r3, [r2, #2320]	@ movhi
+	.loc 2 214 0
 	ldrh	r2, [r2, #16]
 	cmp	r2, r3
-	ldmfdcs	sp, {fp, sp, pc}
-.LBB262:
-.LBB263:
-	mov	r2, #182
-	ldr	r1, .L133+4
-	ldr	r0, .L133+8
-	bl	printk
-.LVL127:
-	ldmfd	sp, {fp, sp, pc}
-.L134:
+	bcs	.L128
+.LBB269:
+.LBB270:
+	movs	r2, #214
+	ldr	r1, .L130+4
+	ldr	r0, .L130+8
+.LBE270:
+.LBE269:
+	.loc 2 215 0
+	pop	{r3, lr}
+.LCFI20:
+.LBB272:
+.LBB271:
+	.loc 2 214 0
+	b	printk
+.LVL128:
+.L128:
+.LCFI21:
+	pop	{r3, pc}
+.L131:
 	.align	2
-.L133:
+.L130:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
-.LBE263:
-.LBE262:
-.LFE184:
+.LBE271:
+.LBE272:
+.LFE194:
 	.fnend
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
-	.align	2
+	.align	1
 	.global	List_remove_node
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
 	.fnstart
-.LFB188:
-	.loc 2 333 0
+.LFB198:
+	.loc 2 375 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL128:
-	.movsp ip
-	mov	ip, sp
-.LCFI84:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI85:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI86:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 333 0
-	.loc 2 336 0
-	mov	r5, #6
-	.loc 2 337 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL129:
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI22:
+	.loc 2 378 0
+	movs	r6, #6
+	ldr	r4, .L138
+	muls	r6, r1, r6
+	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 336 0
-	ldr	r7, .L142
-	mul	r5, r5, r1
-	.loc 2 333 0
+	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 336 0
-	ldr	r6, [r7, #2252]
-	add	r4, r6, r5
-.LVL129:
-	.loc 2 337 0
-	ldrh	r2, [r4, #2]
+	.loc 2 378 0
+	ldr	r7, [r4, #2292]
+	adds	r5, r7, r6
+.LVL130:
+	.loc 2 379 0
+	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L136
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L133
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
-	cmp	r4, r3
-	beq	.L136
-	.loc 2 337 0 discriminator 2
-	movw	r2, #337
-	ldr	r1, .L142+4
-.LVL130:
-	ldr	r0, .L142+8
-	bl	printk
+	cmp	r5, r3
+	beq	.L133
+	.loc 2 379 0 discriminator 2
+	movw	r2, #379
+	ldr	r1, .L138+4
 .LVL131:
-.L136:
-	.loc 2 339 0 is_stmt 1
-	ldr	r3, [r8]
-	movw	r2, #65535
-	cmp	r4, r3
-	ldrh	r3, [r6, r5]
-	bne	.L137
-	.loc 2 340 0
-	cmp	r3, r2
-	.loc 2 343 0
-	ldrne	r2, [r7, #2252]
-	movne	r1, #6
+	ldr	r0, .L138+8
+	bl	printk
 .LVL132:
-	.loc 2 341 0
+.L133:
+	.loc 2 381 0 is_stmt 1
+	ldr	r3, [r8]
+	movw	r1, #65535
+.LVL133:
+	cmp	r5, r3
+	ldrh	r3, [r7, r6]
+	bne	.L134
+	.loc 2 382 0
+	cmp	r3, r1
+	.loc 2 385 0
+	ittee	ne
+	ldrne	r0, [r4, #2292]
+	movne	r2, #6
+	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 343 0
-	mlane	r3, r1, r3, r2
-	.loc 2 344 0
-	mvnne	r2, #0
-	.loc 2 343 0
-	strne	r3, [r8]
-	.loc 2 344 0
-	strhne	r2, [r3, #2]	@ movhi
-.L139:
-	.loc 2 355 0
-	mvn	r3, #0
-	.loc 2 357 0
-	mov	r0, #0
-	.loc 2 355 0
-	strh	r3, [r6, r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 357 0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL133:
-.L137:
-	.loc 2 346 0
-	cmp	r3, r2
-	mov	r2, #6
-	.loc 2 351 0
-	ldrne	r0, [r7, #2252]
-	ldrh	r1, [r4, #2]
-.LVL134:
-	.loc 2 348 0
-	ldreq	r3, [r7, #2252]
-	.loc 2 351 0
+	.loc 2 385 0
+	ittt	ne
 	mlane	r3, r2, r3, r0
-	.loc 2 348 0
-	muleq	r2, r2, r1
-	mvneq	r1, #0
-	.loc 2 351 0
+	strne	r3, [r8]
+	.loc 2 386 0
 	strhne	r1, [r3, #2]	@ movhi
-	.loc 2 352 0
-	ldrhne	r0, [r4, #2]
-	.loc 2 353 0
-	ldrhne	r1, [r6, r5]
-	ldrne	r3, [r7, #2252]
-	mulne	r2, r2, r0
+.L136:
+	.loc 2 399 0
+	movw	r3, #65535
+	.loc 2 401 0
+	movs	r0, #0
+	.loc 2 399 0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 401 0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL134:
+.L134:
+	.loc 2 388 0
+	cmp	r3, r1
+	ldrh	r1, [r5, #2]
+	bne	.L137
+	.loc 2 389 0
+	cmp	r1, r3
+	beq	.L136
+	.loc 2 391 0
+	movs	r2, #6
+	ldr	r0, [r4, #2292]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L136
+.L137:
+	.loc 2 395 0
+	ldr	r0, [r4, #2292]
+	movs	r2, #6
+	mla	r3, r2, r3, r0
+	strh	r1, [r3, #2]	@ movhi
+	.loc 2 396 0
+	ldrh	r0, [r5, #2]
+	.loc 2 397 0
+	ldrh	r1, [r7, r6]
+	ldr	r3, [r4, #2292]
+	muls	r2, r0, r2
 	strh	r1, [r3, r2]	@ movhi
-	b	.L139
-.L143:
+	b	.L136
+.L139:
 	.align	2
-.L142:
+.L138:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
-.LFE188:
+.LFE198:
 	.fnend
 	.size	List_remove_node, .-List_remove_node
-	.align	2
+	.align	1
 	.global	List_pop_index_node
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	.fnstart
-.LFB189:
-	.loc 2 360 0
+.LFB199:
+	.loc 2 404 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL135:
-	.movsp ip
-	mov	ip, sp
-.LCFI87:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI88:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI89:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 360 0
-	.loc 2 364 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI23:
+	.loc 2 408 0
 	ldr	r3, [r0]
 .LVL136:
-	cmp	r3, #0
-	beq	.L150
-	.loc 2 369 0
-	ldr	r2, .L151
-	.loc 2 368 0
-	movw	lr, #65535
-	.loc 2 369 0
-	mov	r4, #6
-	ldr	r2, [r2, #2252]
-.L146:
-	.loc 2 368 0
-	cmp	r1, #0
-	bne	.L147
-.L149:
-	.loc 2 372 0
-	ldr	r4, .L151+4
-	sub	r3, r3, r2
+	cbz	r3, .L146
+	.loc 2 413 0
+	ldr	r2, .L147
+	.loc 2 412 0
+	movw	r5, #65535
+	.loc 2 413 0
+	movs	r6, #6
+	ldr	r2, [r2, #2292]
+.L142:
+	.loc 2 412 0
+	cbnz	r1, .L143
+.L145:
+	.loc 2 416 0
+	ldr	r4, .L147+4
+	subs	r3, r3, r2
 .LVL137:
-	asr	r3, r3, #1
-	mul	r4, r4, r3
-	.loc 2 373 0
+	asrs	r3, r3, #1
+	muls	r4, r3, r4
+	.loc 2 417 0
 	uxth	r1, r4
 .LVL138:
 	bl	List_remove_node
 .LVL139:
 	uxth	r0, r4
-	.loc 2 375 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
+	.loc 2 419 0
+	pop	{r4, r5, r6, pc}
 .LVL140:
-.L147:
-	.loc 2 368 0 discriminator 1
-	ldrh	ip, [r3]
-	cmp	ip, lr
-	beq	.L149
-	.loc 2 370 0
-	sub	r1, r1, #1
+.L143:
+	.loc 2 412 0 discriminator 1
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L145
+	.loc 2 414 0
+	subs	r1, r1, #1
 .LVL141:
-	.loc 2 369 0
-	mla	r3, r4, ip, r2
-	.loc 2 370 0
+	.loc 2 413 0
+	mla	r3, r6, r4, r2
+	.loc 2 414 0
 	uxth	r1, r1
 .LVL142:
-	b	.L146
-.L150:
-	.loc 2 365 0
+	b	.L142
+.L146:
+	.loc 2 409 0
 	movw	r0, #65535
 .LVL143:
-	.loc 2 376 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L152:
+	.loc 2 420 0
+	pop	{r4, r5, r6, pc}
+.L148:
 	.align	2
-.L151:
+.L147:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE189:
+.LFE199:
 	.fnend
 	.size	List_pop_index_node, .-List_pop_index_node
-	.align	2
+	.align	1
 	.global	List_pop_head_node
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 	.fnstart
-.LFB190:
-	.loc 2 379 0
+.LFB200:
+	.loc 2 423 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
 .LVL144:
-	.movsp ip
-	mov	ip, sp
-.LCFI90:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI91:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI92:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 379 0
-	.loc 2 380 0
-	mov	r1, #0
-	bl	List_pop_index_node
+	.loc 2 424 0
+	movs	r1, #0
+	b	List_pop_index_node
 .LVL145:
-	.loc 2 381 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE190:
+.LFE200:
 	.fnend
 	.size	List_pop_head_node, .-List_pop_head_node
-	.align	2
+	.align	1
 	.global	List_get_gc_head_node
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	.fnstart
-.LFB191:
-	.loc 2 384 0
+.LFB201:
+	.loc 2 428 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL146:
-	.movsp ip
-	mov	ip, sp
-.LCFI93:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI94:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI95:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 384 0
-	.loc 2 388 0
-	ldr	r2, .L160
-	ldr	r3, [r2, #2256]
+	.loc 2 432 0
+	ldr	r2, .L156
+	.loc 2 428 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI24:
+	.loc 2 432 0
+	ldr	r3, [r2, #2296]
 .LVL147:
-	cmp	r3, #0
-	.loc 2 393 0
-	ldrne	r1, [r2, #2252]
-	movne	ip, #6
-	.loc 2 392 0
-	movwne	r2, #65535
-	.loc 2 388 0
-	bne	.L156
-.L159:
-	.loc 2 389 0
-	movw	r0, #65535
+	cbz	r3, .L155
+	.loc 2 437 0
+	ldr	r1, [r2, #2292]
+	movs	r4, #6
+	.loc 2 436 0
+	movw	r2, #65535
+.L152:
+	cbz	r0, .L153
+	.loc 2 436 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3]
 .LVL148:
-	ldmfd	sp, {fp, sp, pc}
+	cmp	r3, r2
+	bne	.L154
 .LVL149:
-.L158:
-	.loc 2 394 0
-	sub	r0, r0, #1
+.L155:
+	.loc 2 433 0 is_stmt 1
+	movw	r0, #65535
 .LVL150:
-	.loc 2 393 0
-	mla	r3, ip, r3, r1
+	pop	{r4, pc}
 .LVL151:
-	.loc 2 394 0
-	uxth	r0, r0
+.L154:
+	.loc 2 438 0
+	subs	r0, r0, #1
 .LVL152:
-.L156:
-	.loc 2 392 0
-	cmp	r0, #0
-	beq	.L157
-	.loc 2 392 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r3]
+	.loc 2 437 0
+	mla	r3, r4, r3, r1
 .LVL153:
-	cmp	r3, r2
-	bne	.L158
-	b	.L159
+	.loc 2 438 0
+	uxth	r0, r0
 .LVL154:
-.L157:
-	.loc 2 398 0 is_stmt 1
-	ldr	r0, .L160+4
+	b	.L152
+.L153:
+	.loc 2 442 0
+	ldr	r0, .L156+4
 .LVL155:
-	sub	r3, r3, r1
+	subs	r3, r3, r1
 .LVL156:
-	asr	r3, r3, #1
-	mul	r3, r0, r3
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 401 0
-	ldmfd	sp, {fp, sp, pc}
-.L161:
+	.loc 2 445 0
+	pop	{r4, pc}
+.L157:
 	.align	2
-.L160:
+.L156:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE191:
+.LFE201:
 	.fnend
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
-	.align	2
+	.align	1
 	.global	List_update_data_list
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
 	.fnstart
-.LFB192:
-	.loc 2 404 0
+.LFB202:
+	.loc 2 448 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL157:
-	.movsp ip
-	mov	ip, sp
-.LCFI96:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI97:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI98:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 404 0
-	.loc 2 413 0
-	movw	r3, #2280
-	.loc 2 404 0
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
+.LCFI25:
+	.loc 2 448 0
 	mov	r5, r0
-	.loc 2 413 0
-	ldr	r4, .L170
-	ldrh	r3, [r4, r3]
+	.loc 2 457 0
+	ldr	r4, .L169
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r0
-	beq	.L164
-	.loc 2 413 0 is_stmt 0 discriminator 1
-	movw	r3, #2328
-	ldrh	r3, [r4, r3]
+	beq	.L160
+	.loc 2 457 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
 	cmp	r3, r0
-	beq	.L164
-	.loc 2 413 0 discriminator 2
-	movw	r3, #2376
-	ldrh	r3, [r4, r3]
+	beq	.L160
+	.loc 2 457 0 discriminator 2
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r0
-	beq	.L164
-.LBB266:
-.LBB267:
-	.loc 2 416 0 is_stmt 1
-	mov	r3, #6
-	ldr	r1, [r4, #2252]
-	mul	r3, r3, r0
-	.loc 2 418 0
-	ldr	r2, [r4, #2256]
-	.loc 2 416 0
-	add	r7, r1, r3
+	beq	.L160
+.LBB275:
+.LBB276:
+	.loc 2 460 0 is_stmt 1
+	movs	r7, #6
+	ldr	r9, [r4, #2292]
+	muls	r7, r0, r7
+	.loc 2 462 0
+	ldr	r3, [r4, #2296]
+	.loc 2 460 0
+	add	r8, r9, r7
 .LVL158:
-	.loc 2 418 0
-	cmp	r7, r2
-	beq	.L164
-	.loc 2 421 0
-	ldr	r0, [r4, #2260]
-	lsl	r2, r5, #1
-	.loc 2 422 0
-	ldrh	r6, [r0, r2]
-	.loc 2 426 0
-	movw	r0, #65535
-	.loc 2 422 0
-	ldrh	r2, [r7, #4]
-	.loc 2 424 0
-	muls	r6, r2, r6
+	.loc 2 462 0
+	cmp	r8, r3
+	beq	.L160
+	.loc 2 466 0
+	ldrh	r6, [r8, #4]
+	.loc 2 465 0
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
 .LVL159:
-	.loc 2 426 0
-	ldrh	r2, [r7, #2]
-	.loc 2 424 0
-	mvneq	r6, #0
-	.loc 2 426 0
-	cmp	r2, r0
-	bne	.L167
-	ldrh	r3, [r1, r3]
-	cmp	r3, r2
-	bne	.L167
-	movw	r2, #426
-	ldr	r1, .L170+4
-	ldr	r0, .L170+8
-	bl	printk
+	.loc 2 467 0
+	cmp	r6, #0
+	beq	.L167
+	.loc 2 466 0
+	muls	r6, r3, r6
 .LVL160:
-.L167:
-	.loc 2 427 0
-	ldrh	r3, [r7, #2]
-	mov	r2, #6
-	mul	r2, r2, r3
-	.loc 2 428 0
-	ldr	r3, .L170+12
-	asr	r1, r2, #1
-	mul	r3, r3, r1
-	.loc 2 429 0
-	ldr	r1, [r4, #2260]
-	lsl	r3, r3, #1
-	.loc 2 430 0
-	ldrh	r3, [r1, r3]
-	ldr	r1, [r4, #2252]
-	add	r2, r1, r2
-	ldrh	r2, [r2, #4]
-	.loc 2 432 0
-	muls	r3, r2, r3
+.L162:
+	.loc 2 470 0
+	ldrh	r3, [r8, #2]
 .LVL161:
-	mvneq	r3, #0
-	.loc 2 434 0
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L163
+	ldrh	r2, [r9, r7]
+	cmp	r2, r3
+	bne	.L163
+	mov	r2, #470
+	ldr	r1, .L169+4
+	ldr	r0, .L169+8
+	bl	printk
+.LVL162:
+.L163:
+	.loc 2 471 0
+	ldrh	r3, [r8, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L164
+	ldrh	r2, [r9, r7]
+	cmp	r2, r3
+	beq	.L160
+.L164:
+	.loc 2 473 0
+	movs	r2, #6
+	muls	r2, r3, r2
+	.loc 2 474 0
+	ldr	r3, .L169+12
+	asrs	r1, r2, #1
+	muls	r3, r1, r3
+	.loc 2 475 0
+	ldr	r1, [r4, #2300]
+	ldrh	r0, [r1, r3, lsl #1]
+.LVL163:
+	.loc 2 476 0
+	ldr	r1, [r4, #2292]
+	add	r2, r2, r1
+	ldrh	r3, [r2, #4]
+	.loc 2 477 0
+	cbz	r3, .L168
+	.loc 2 476 0
+	muls	r3, r0, r3
+.LVL164:
+.L165:
+	.loc 2 480 0
 	cmp	r6, r3
-	bcs	.L164
-	.loc 2 435 0
+	bcs	.L160
+	.loc 2 481 0
 	mov	r1, r5
-	ldr	r0, .L170+16
+	ldr	r0, .L169+16
+.LVL165:
 	bl	List_remove_node
-.LVL162:
-	movw	r3, #2268
-	ldrh	r3, [r4, r3]
-	cmp	r3, #0
-	bne	.L169
-	movw	r2, #435
-	ldr	r1, .L170+4
-	ldr	r0, .L170+8
+.LVL166:
+	ldrh	r3, [r4, #2312]
+	cbnz	r3, .L166
+	movw	r2, #481
+	ldr	r1, .L169+4
+	ldr	r0, .L169+8
 	bl	printk
-.LVL163:
-.L169:
-	movw	r2, #2268
-	.loc 2 436 0
+.LVL167:
+.L166:
+	ldrh	r3, [r4, #2312]
+	.loc 2 482 0
 	mov	r0, r5
-	.loc 2 435 0
-	ldrh	r3, [r4, r2]
-	sub	r3, r3, #1
-	strh	r3, [r4, r2]	@ movhi
-	.loc 2 436 0
+	.loc 2 481 0
+	subs	r3, r3, #1
+	strh	r3, [r4, #2312]	@ movhi
+	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL164:
-.L164:
-.LBE267:
-.LBE266:
-	.loc 2 439 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L171:
-	.align	2
+.LVL168:
+.L160:
+.LBE276:
+.LBE275:
+	.loc 2 485 0
+	movs	r0, #0
+.LVL169:
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+.LVL170:
+.L167:
+.LBB278:
+.LBB277:
+	.loc 2 468 0
+	mov	r6, #-1
+.LVL171:
+	b	.L162
+.LVL172:
+.L168:
+	.loc 2 478 0
+	mov	r3, #-1
+.LVL173:
+	b	.L165
 .L170:
+	.align	2
+.L169:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+51
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR0+2256
-.LFE192:
+	.word	.LANCHOR0+2296
+.LBE277:
+.LBE278:
+.LFE202:
 	.fnend
 	.size	List_update_data_list, .-List_update_data_list
-	.align	2
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-	.fnstart
-.LFB195:
-	.loc 2 516 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL165:
-	.movsp ip
-	mov	ip, sp
-.LCFI99:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI100:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI101:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 516 0
-	.loc 2 520 0
-	mov	r3, #0
-	.loc 2 516 0
-	mov	r4, r0
-	.loc 2 520 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
-.LVL166:
-.L173:
-	uxth	r5, r3
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	r5, r1
-	bcc	.L175
-.L176:
-.LBB270:
-.LBB271:
-	.loc 2 532 0 is_stmt 1
-	mov	r2, #532
-	ldr	r1, .L182
-	ldr	r0, .L182+4
-	bl	printk
-.LVL167:
-	b	.L177
-.L175:
-.LBE271:
-.LBE270:
-	.loc 2 521 0
-	mov	r7, r2
-	add	r3, r3, #1
-	ldrh	r6, [r7]
-	add	r2, r2, #2
-	cmp	r6, #0
-	bne	.L173
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL168:
-	.loc 2 523 0
-	cmp	r0, #0
-	.loc 2 522 0
-	strh	r0, [r7]	@ movhi
-	.loc 2 523 0
-	beq	.L174
-	.loc 2 526 0
-	ldr	r3, [r4, #28]
-	.loc 2 524 0
-	strh	r6, [r4, #2]	@ movhi
-	.loc 2 525 0
-	strh	r5, [r4]	@ movhi
-	.loc 2 526 0
-	add	r3, r3, #1
-	str	r3, [r4, #28]
-	.loc 2 527 0
-	ldrh	r3, [r4, #8]
-	add	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L174:
-	.loc 2 532 0
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bls	.L176
-.L177:
-	.loc 2 534 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L183:
-	.align	2
-.L182:
-	.word	.LANCHOR1+73
-	.word	.LC1
-.LFE195:
-	.fnend
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.align	2
+	.align	1
 	.global	select_l2p_ram_region
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	.fnstart
-.LFB200:
-	.loc 2 700 0
+.LFB210:
+	.loc 2 749 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI102:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI103:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI104:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 700 0
-	.loc 2 705 0
-	mov	r1, #0
-	.loc 2 706 0
-	movw	ip, #65535
-	.loc 2 705 0
-	ldr	r0, .L194
-	ldrh	r2, [r0, #114]
-	mov	lr, r0
-	.loc 2 706 0
-	ldr	r3, [r0, #2424]
-	mov	r0, #12
-.L185:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI26:
+	.loc 2 754 0
+	movs	r1, #0
+	ldr	r5, .L181
+	.loc 2 755 0
+	movs	r0, #12
+	movw	r6, #65535
+	.loc 2 754 0
+	ldrh	r2, [r5, #114]
+	.loc 2 755 0
+	ldr	r3, [r5, #2468]
+.L172:
 	uxth	r4, r1
-	.loc 2 705 0 discriminator 1
+	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L187
+	bcc	.L174
 	mov	r4, r2
-	mov	r1, #0
-	mov	r0, #-2147483648
-	.loc 2 716 0
-	mov	r6, #12
-.L188:
-	uxth	r5, r1
-	.loc 2 715 0 discriminator 1
-	cmp	r5, r2
-	bcc	.L190
-	.loc 2 724 0
+	movs	r1, #0
+	mov	r7, #-2147483648
+	.loc 2 765 0
+	mov	ip, #12
+.L175:
+	uxth	r6, r1
+	.loc 2 764 0 discriminator 1
+	cmp	r6, r2
+	bcc	.L177
+	.loc 2 773 0
 	cmp	r4, r2
-	bcc	.L186
-	.loc 2 730 0
-	movw	r1, #2428
+	bcc	.L173
+	.loc 2 779 0
+	ldrh	r7, [r5, #2472]
 	mov	r4, r2
-	ldrh	r5, [lr, r1]
-	mvn	r0, #0
-	mov	r1, #0
-.L191:
-	uxth	ip, r1
-	.loc 2 729 0 discriminator 1
-	cmp	ip, r2
-	bcc	.L193
-	.loc 2 735 0
+	movs	r1, #0
+	mov	r0, #-1
+.L178:
+	uxth	r5, r1
+	.loc 2 778 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L180
+	.loc 2 784 0
 	cmp	r4, r2
-	bcc	.L186
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	movw	r2, #735
-	ldr	r1, .L194+4
-	ldr	r0, .L194+8
+	bcc	.L173
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	r2, #784
+	ldr	r1, .L181+4
+	ldr	r0, .L181+8
 	bl	printk
-.LVL169:
-	b	.L186
-.L187:
-	add	r1, r1, #1
-	.loc 2 706 0 is_stmt 1
-	mla	r5, r0, r1, r3
-	ldrh	r5, [r5, #-12]
-	cmp	r5, ip
-	bne	.L185
-.L186:
-	.loc 2 737 0
+.LVL174:
+	b	.L173
+.L174:
+	adds	r1, r1, #1
+	.loc 2 755 0 is_stmt 1
+	mla	r7, r0, r1, r3
+	ldrh	r7, [r7, #-12]
+	cmp	r7, r6
+	bne	.L172
+.L173:
+	.loc 2 786 0
 	mov	r0, r4
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L190:
-	.loc 2 716 0
-	mla	ip, r6, r1, r3
-	add	r1, r1, #1
-	ldr	ip, [ip, #4]
-	.loc 2 717 0
-	cmp	r0, ip
-	movls	r7, #0
-	movhi	r7, #1
-	cmp	ip, #0
-	movlt	r7, #0
-	cmp	r7, #0
-	movne	r0, ip
+	pop	{r3, r4, r5, r6, r7, pc}
+.L177:
+	.loc 2 765 0
+	mla	r0, ip, r1, r3
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L176
+	.loc 2 766 0
+	cmp	r7, r0
+	itt	hi
+	movhi	r7, r0
+	movhi	r4, r6
+.L176:
+	adds	r1, r1, #1
+	b	.L175
+.L180:
+	.loc 2 779 0
+	ldr	r6, [r3, #4]
+	cmp	r0, r6
+	bls	.L179
+	.loc 2 779 0 is_stmt 0 discriminator 1
+	ldrh	ip, [r3]
+	cmp	ip, r7
+	itt	ne
+	movne	r0, r6
 	movne	r4, r5
-	b	.L188
-.L193:
-	.loc 2 730 0
-	ldr	lr, [r3, #4]
-	cmp	r0, lr
-	bls	.L192
-	.loc 2 730 0 is_stmt 0 discriminator 1
-	ldrh	r6, [r3]
-	cmp	r6, r5
-	movne	r0, lr
-	movne	r4, ip
-.L192:
-	add	r1, r1, #1
-	add	r3, r3, #12
-	b	.L191
-.L195:
+.L179:
+	adds	r1, r1, #1
+	adds	r3, r3, #12
+	b	.L178
+.L182:
 	.align	2
-.L194:
+.L181:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+99
+	.word	.LANCHOR1+73
 	.word	.LC1
-.LFE200:
+.LFE210:
 	.fnend
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
-	.align	2
+	.align	1
 	.global	FtlUpdateVaildLpn
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 	.fnstart
-.LFB206:
-	.loc 2 882 0 is_stmt 1
+.LFB216:
+	.loc 2 931 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL170:
-	.movsp ip
-	mov	ip, sp
-.LCFI105:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI106:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI107:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 882 0
-	.loc 2 885 0
-	movw	r1, #2430
-	ldr	ip, .L202
-	ldrh	r2, [ip, r1]
-	mov	r3, ip
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL175:
+	.loc 2 934 0
+	ldr	r1, .L189
+	.loc 2 931 0
+	push	{r4, r5, lr}
+	.save {r4, r5, lr}
+.LCFI27:
+	mov	r3, r1
+	.loc 2 934 0
+	ldrh	r2, [r1, #2474]
 	cmp	r2, #4
-	cmpls	r0, #0
-	bne	.L197
-	add	r2, r2, #1
-	strh	r2, [ip, r1]	@ movhi
-	.loc 2 894 0
-	ldmfd	sp, {fp, sp, pc}
-.L197:
-	.loc 2 886 0
-	mov	r2, #0
-.LBB274:
-.LBB275:
-	.loc 2 890 0
-	movw	lr, #65535
-.LBE275:
-.LBE274:
-	.loc 2 886 0
-	strh	r2, [ip, r1]	@ movhi
-	.loc 2 887 0
-	str	r2, [ip, #2432]
-	ldrh	r1, [ip, #16]
-.LBB277:
-.LBB276:
-	.loc 2 890 0
-	ldr	r2, [ip, #2260]
+	bhi	.L184
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L184
+	.loc 2 934 0
+	adds	r2, r2, #1
+	strh	r2, [r1, #2474]	@ movhi
+	.loc 2 943 0 is_stmt 1
+	pop	{r4, r5, pc}
+.L184:
+	.loc 2 935 0
+	movs	r2, #0
+	ldrh	r1, [r3, #16]
+	strh	r2, [r3, #2474]	@ movhi
+.LBB281:
+.LBB282:
+	.loc 2 939 0
+	movw	r5, #65535
+.LBE282:
+.LBE281:
+	.loc 2 936 0
+	str	r2, [r3, #2476]
+.LBB284:
+.LBB283:
+	.loc 2 939 0
+	ldr	r2, [r3, #2300]
 	add	r1, r2, r1, lsl #1
-.L198:
-	.loc 2 888 0
+.L185:
+	.loc 2 937 0
 	cmp	r2, r1
-	bne	.L200
-	ldmfd	sp, {fp, sp, pc}
-.L200:
-	.loc 2 890 0
-	ldrh	ip, [r2], #2
-	cmp	ip, lr
-	.loc 2 891 0
-	ldrne	r0, [r3, #2432]
-.LVL171:
-	addne	r0, r0, ip
-	strne	r0, [r3, #2432]
-	b	.L198
-.L203:
+	bne	.L187
+	pop	{r4, r5, pc}
+.L187:
+	.loc 2 939 0
+	ldrh	r4, [r2], #2
+	cmp	r4, r5
+	.loc 2 940 0
+	ittt	ne
+	ldrne	r0, [r3, #2476]
+.LVL176:
+	addne	r0, r0, r4
+	strne	r0, [r3, #2476]
+	b	.L185
+.L190:
 	.align	2
-.L202:
+.L189:
 	.word	.LANCHOR0
-.LBE276:
-.LBE277:
-.LFE206:
+.LBE283:
+.LBE284:
+.LFE216:
 	.fnend
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.align	2
+	.align	1
 	.global	ftl_set_blk_mode
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	.fnstart
-.LFB212:
-	.loc 2 1347 0
+.LFB222:
+	.loc 2 1396 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL172:
-	.movsp ip
-	mov	ip, sp
-.LCFI108:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI109:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI110:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1347 0
-	.loc 2 1348 0
-	cmp	r1, #0
-	.loc 2 1347 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL177:
+	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1348 0
-	beq	.L205
-	bl	ftl_set_blk_mode.part.6
-.LVL173:
-	ldmfd	sp, {fp, sp, pc}
-.LVL174:
-.L205:
-	.loc 2 1351 0
-	ldr	r2, .L207
-	lsr	r0, r0, #5
+	.loc 2 1397 0
+	cbz	r1, .L192
+	b	ftl_set_blk_mode.part.6
+.LVL178:
+.L192:
+	.loc 2 1400 0
+	ldr	r2, .L193
+	lsrs	r0, r0, #5
 	and	r3, r3, #31
-.LVL175:
-	mov	ip, #1
+.LVL179:
 	ldr	r1, [r2]
-.LVL176:
+.LVL180:
+	movs	r2, #1
+	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
-	bic	r3, r2, ip, lsl r3
-	str	r3, [r1, r0, lsl #2]
-	ldmfd	sp, {fp, sp, pc}
-.L208:
+	bic	r2, r2, r3
+	str	r2, [r1, r0, lsl #2]
+	bx	lr
+.L194:
 	.align	2
-.L207:
+.L193:
 	.word	.LANCHOR0
-.LFE212:
+.LFE222:
 	.fnend
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.align	2
+	.align	1
 	.global	ftl_get_blk_mode
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 	.fnstart
-.LFB213:
-	.loc 2 1355 0
+.LFB223:
+	.loc 2 1404 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL177:
-	.movsp ip
-	mov	ip, sp
-.LCFI111:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI112:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI113:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1355 0
-	.loc 2 1356 0
-	lsr	r2, r0, #5
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL181:
+	.loc 2 1405 0
+	ldr	r3, .L196
+	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL178:
-	ldr	r3, .L210
+.LVL182:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	r0, r0, #1
-	ldmfd	sp, {fp, sp, pc}
-.L211:
+	bx	lr
+.L197:
 	.align	2
-.L210:
+.L196:
 	.word	.LANCHOR0
-.LFE213:
+.LFE223:
 	.fnend
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.align	2
+	.align	1
 	.global	ftl_sb_update_avl_pages
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 	.fnstart
-.LFB219:
-	.loc 2 1608 0
+.LFB229:
+	.loc 2 1657 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL179:
-	.movsp ip
-	mov	ip, sp
-.LCFI114:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI115:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI116:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1608 0
-	.loc 2 1610 0
-	mov	r3, #0
-	add	ip, r0, r2, lsl #1
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL183:
+	.loc 2 1659 0
+	movs	r3, #0
+	.loc 2 1657 0
+	push	{r4, r5, r6, r7, lr}
+	.save {r4, r5, r6, r7, lr}
+.LCFI28:
+	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1613 0
-	movw	r5, #65535
-	.loc 2 1611 0
-	ldr	r3, .L219
-	add	ip, ip, #14
-	ldrh	lr, [r3, #8]
-.L213:
-	.loc 2 1611 0 is_stmt 0 discriminator 1
-	cmp	r2, lr
-	bcc	.L215
+	add	r4, r0, r2, lsl #1
+	.loc 2 1662 0
+	movw	r7, #65535
+	.loc 2 1660 0
+	ldr	r3, .L205
+	adds	r4, r4, #14
+	ldrh	r5, [r3, #8]
+.L199:
+	.loc 2 1660 0 is_stmt 0 discriminator 1
+	cmp	r2, r5
+	bcc	.L201
 	ldrh	r3, [r3, #78]
-	add	ip, r0, #16
-	.loc 2 1620 0 is_stmt 1
-	movw	r4, #65535
-	sub	r3, r3, #1
-	sub	r1, r3, r1
-.LVL180:
-	.loc 2 1622 0
-	mov	r3, #0
-	uxth	r1, r1
-.L216:
-	.loc 2 1618 0 discriminator 1
-	uxth	r2, r3
-.LVL181:
-	cmp	lr, r2
-	bhi	.L218
-	.loc 2 1625 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.LVL182:
-.L215:
-	.loc 2 1613 0
-	ldrh	r4, [ip, #2]!
-	.loc 2 1611 0
-	add	r2, r2, #1
-.LVL183:
-	uxth	r2, r2
+	add	r4, r0, #16
+	.loc 2 1669 0 is_stmt 1
+	movw	r6, #65535
+	subs	r3, r3, #1
+	subs	r1, r3, r1
 .LVL184:
-	.loc 2 1613 0
-	cmp	r4, r5
-	.loc 2 1615 0
-	ldrhne	r4, [r0, #4]
-	addne	r4, r4, #1
-	strhne	r4, [r0, #4]	@ movhi
-	b	.L213
+	.loc 2 1671 0
+	movs	r3, #0
+	uxth	r1, r1
+.L202:
+	.loc 2 1667 0 discriminator 1
+	uxth	r2, r3
 .LVL185:
-.L218:
-	.loc 2 1620 0
-	ldrh	r2, [ip], #2
-	add	r3, r3, #1
-	cmp	r2, r4
-	.loc 2 1622 0
+	cmp	r5, r2
+	bhi	.L204
+	.loc 2 1674 0
+	pop	{r4, r5, r6, r7, pc}
+.LVL186:
+.L201:
+	.loc 2 1662 0
+	ldrh	r6, [r4, #2]!
+	.loc 2 1660 0
+	adds	r2, r2, #1
+.LVL187:
+	uxth	r2, r2
+.LVL188:
+	.loc 2 1662 0
+	cmp	r6, r7
+	.loc 2 1664 0
+	ittt	ne
+	ldrhne	r6, [r0, #4]
+	addne	r6, r6, #1
+	strhne	r6, [r0, #4]	@ movhi
+	b	.L199
+.LVL189:
+.L204:
+	.loc 2 1669 0
+	ldrh	r2, [r4], #2
+	adds	r3, r3, #1
+	cmp	r2, r6
+	.loc 2 1671 0
+	ittt	ne
 	ldrhne	r2, [r0, #4]
-	addne	r2, r1, r2
+	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L216
-.L220:
+	b	.L202
+.L206:
 	.align	2
-.L219:
+.L205:
 	.word	.LANCHOR0
-.LFE219:
+.LFE229:
 	.fnend
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.align	2
+	.align	1
 	.global	FtlSlcSuperblockCheck
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	.fnstart
-.LFB222:
-	.loc 2 2013 0
+.LFB232:
+	.loc 2 2062 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL186:
-	.movsp ip
-	mov	ip, sp
-.LCFI117:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI118:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI119:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2013 0
-	.loc 2 2016 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL190:
+	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	cmp	r3, #0
-	ldmfdeq	sp, {fp, sp, pc}
-	.loc 2 2018 0
+	.loc 2 2062 0
+	push	{r4, r5, lr}
+	.save {r4, r5, lr}
+.LCFI29:
+	.loc 2 2065 0
+	cbz	r3, .L207
+	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldmfdeq	sp, {fp, sp, pc}
-.LBB280:
-.LBB281:
-	.loc 2 2020 0
+	beq	.L207
+.LBB287:
+.LBB288:
+	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2025 0
-	mov	lr, #0
-	.loc 2 2020 0
-	add	r2, r0, r2, lsl #1
-	ldrh	r1, [r2, #16]
-.LVL187:
-	.loc 2 2023 0
-	ldr	r2, .L227
-	ldrh	ip, [r2, #8]
-	.loc 2 2021 0
+	.loc 2 2074 0
+	movs	r5, #0
+	.loc 2 2069 0
+	adds	r2, r2, #8
+	ldrh	r1, [r0, r2, lsl #1]
+.LVL191:
+	.loc 2 2072 0
+	ldr	r2, .L213
+	ldrh	r4, [r2, #8]
+	.loc 2 2070 0
 	mov	r2, r3
-.L224:
+.L210:
 	cmp	r1, r2
-	beq	.L226
-	ldmfd	sp, {fp, sp, pc}
-.L226:
-	.loc 2 2022 0
+	beq	.L212
+.L207:
+	pop	{r4, r5, pc}
+.L212:
+	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2023 0
-	cmp	r3, ip
-	.loc 2 2022 0
+	.loc 2 2072 0
+	cmp	r3, r4
+	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
+	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2025 0
-	strbeq	lr, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2074 0
+	strbeq	r5, [r0, #6]
+	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2027 0
+	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	add	r3, r0, r3, lsl #1
-	ldrh	r1, [r3, #16]
-	b	.L224
-.L228:
+	adds	r3, r3, #8
+	ldrh	r1, [r0, r3, lsl #1]
+	b	.L210
+.L214:
 	.align	2
-.L227:
+.L213:
 	.word	.LANCHOR0
-.LBE281:
-.LBE280:
-.LFE222:
+.LBE288:
+.LBE287:
+.LFE232:
 	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.align	2
+	.align	1
 	.global	make_superblock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
 	.fnstart
-.LFB224:
-	.loc 2 2045 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL188:
-	.movsp ip
-	mov	ip, sp
-.LCFI120:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI121:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI122:
-	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2045 0
-	.loc 2 2048 0
-	ldr	r6, .L234
-	.loc 2 2045 0
+.LFB234:
+	.loc 2 2094 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL192:
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI30:
+	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2048 0
+	.loc 2 2097 0
+	ldr	r6, .L220
 	ldrh	r2, [r0]
 	ldrh	r3, [r6, #16]
 	cmp	r2, r3
-	bcc	.L230
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	mov	r2, #2048
-	ldr	r1, .L234+4
-	ldr	r0, .L234+8
+	bcc	.L216
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	movw	r2, #2097
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
 	bl	printk
-.LVL189:
-.L230:
-	.loc 2 2051 0 is_stmt 1
+.LVL193:
+.L216:
+	.loc 2 2100 0 is_stmt 1
 	ldrh	r9, [r6, #8]
 	add	r7, r4, #16
-	.loc 2 2052 0
-	ldr	r10, .L234+12
-	.loc 2 2053 0
-	mvn	r8, #0
-	.loc 2 2049 0
-	mov	r5, #0
+	.loc 2 2101 0
+	ldr	r10, .L220+12
+	.loc 2 2102 0
+	movw	r8, #65535
+	.loc 2 2098 0
+	movs	r5, #0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.L231:
-	.loc 2 2051 0 discriminator 1
+.L217:
+	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r9, r3
-	bhi	.L233
-	.loc 2 2061 0
+	bhi	.L219
+	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	.loc 2 2064 0
-	mov	r0, #0
-	.loc 2 2061 0
+	.loc 2 2113 0
+	movs	r0, #0
+	.loc 2 2110 0
 	ldrh	r2, [r6, #78]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2062 0
-	mov	r3, #1
+	.loc 2 2111 0
+	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2064 0
-	sub	sp, fp, #40
-.LCFI123:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL190:
-.L233:
-.LCFI124:
-	.loc 2 2052 0
-	ldrb	r0, [r10, r5]	@ zero_extendqisi2
-	add	r7, r7, #2
+	.loc 2 2113 0
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL194:
+.L219:
+	.loc 2 2101 0
 	ldrh	r1, [r4]
-	add	r5, r5, #1
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL191:
-	.loc 2 2053 0
-	strh	r8, [r7, #-2]	@ movhi
-	.loc 2 2052 0
-	str	r0, [fp, #-48]
-	.loc 2 2054 0
+.LVL195:
+	.loc 2 2102 0
+	strh	r8, [r7]	@ movhi
+	.loc 2 2101 0
+	mov	fp, r0
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL192:
-	cmp	r0, #0
-	.loc 2 2055 0
-	ldreq	r3, [fp, #-48]
-	strheq	r3, [r7, #-2]	@ movhi
-	.loc 2 2056 0
-	ldrbeq	r3, [r4, #7]	@ zero_extendqisi2
-	addeq	r3, r3, #1
-	strbeq	r3, [r4, #7]
-	b	.L231
-.L235:
+.LVL196:
+	cbnz	r0, .L218
+	.loc 2 2104 0
+	strh	fp, [r7]	@ movhi
+	.loc 2 2105 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L218:
+	adds	r5, r5, #1
+	adds	r7, r7, #2
+	b	.L217
+.L221:
 	.align	2
-.L234:
+.L220:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+121
+	.word	.LANCHOR1+95
 	.word	.LC1
 	.word	.LANCHOR0+36
-.LFE224:
+.LFE234:
 	.fnend
 	.size	make_superblock, .-make_superblock
-	.align	2
+	.align	1
 	.global	update_multiplier_value
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	.fnstart
-.LFB233:
-	.loc 2 2401 0
+.LFB243:
+	.loc 2 2451 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL193:
-	.movsp ip
-	mov	ip, sp
-.LCFI125:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI126:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI127:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2401 0
-	.loc 2 2405 0
-	mov	r5, #0
-	.loc 2 2401 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL197:
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI31:
+	.loc 2 2455 0
+	movs	r5, #0
+	ldr	r6, .L228
+	.loc 2 2451 0
 	mov	r7, r0
-	.loc 2 2405 0
-	ldr	r3, .L242
-	.loc 2 2403 0
+	.loc 2 2453 0
 	mov	r4, r5
-	.loc 2 2405 0
-	ldrh	r8, [r3, #8]
-	mov	r6, r3
-	.loc 2 2408 0
-	ldrh	r9, [r3, #78]
-	.loc 2 2406 0
-	add	r10, r3, #36
-.L237:
-	.loc 2 2405 0 discriminator 1
+	.loc 2 2455 0
+	ldrh	r8, [r6, #8]
+	.loc 2 2456 0
+	add	r10, r6, #36
+	.loc 2 2458 0
+	ldrh	r9, [r6, #78]
+.L223:
+	.loc 2 2455 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L239
-	.loc 2 2410 0
-	cmp	r4, #0
-	moveq	r0, r4
-	beq	.L240
-	.loc 2 2411 0
+	bhi	.L225
+	.loc 2 2460 0
+	cbz	r4, .L227
+	.loc 2 2461 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL194:
-.L240:
-	.loc 2 2412 0
-	ldr	r1, [r6, #2252]
-	mov	r3, #6
+.LVL198:
+.L226:
+	.loc 2 2462 0
+	ldr	r1, [r6, #2292]
+	movs	r3, #6
 	mla	r1, r3, r7, r1
 	strh	r0, [r1, #4]	@ movhi
-	.loc 2 2414 0
-	mov	r0, #0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL195:
-.L239:
-	.loc 2 2406 0
+	.loc 2 2464 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL199:
+.L225:
+	.loc 2 2456 0
 	mov	r1, r7
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL196:
-	.loc 2 2407 0
+.LVL200:
+	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL197:
-	cmp	r0, #0
-	add	r5, r5, #1
-	.loc 2 2408 0
-	addeq	r4, r4, r9
-	uxtheq	r4, r4
-	b	.L237
-.L243:
+.LVL201:
+	cbnz	r0, .L224
+	.loc 2 2458 0
+	add	r4, r4, r9
+	uxth	r4, r4
+.L224:
+	adds	r5, r5, #1
+	b	.L223
+.L227:
+	mov	r0, r4
+	b	.L226
+.L229:
 	.align	2
-.L242:
+.L228:
 	.word	.LANCHOR0
-.LFE233:
+.LFE243:
 	.fnend
 	.size	update_multiplier_value, .-update_multiplier_value
-	.align	2
+	.align	1
 	.global	GetFreeBlockMinEraseCount
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 	.fnstart
-.LFB234:
-	.loc 2 2417 0
+.LFB244:
+	.loc 2 2467 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI128:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI129:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI130:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2417 0
-	.loc 2 2420 0
-	ldr	r2, .L247
-	ldr	r0, [r2, #2272]
-	cmp	r0, #0
-	ldmfdeq	sp, {fp, sp, pc}
-	.loc 2 2421 0
-	ldr	r3, [r2, #2252]
-	sub	r0, r0, r3
-	ldr	r3, .L247+4
-	asr	r0, r0, #1
-	mul	r0, r3, r0
-	ldr	r3, [r2, #2248]
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 2470 0
+	ldr	r2, .L233
+	ldr	r0, [r2, #2316]
+	cbz	r0, .L231
+	.loc 2 2471 0
+	ldr	r3, [r2, #2292]
+	subs	r0, r0, r3
+	ldr	r3, .L233+4
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, [r2, #2304]
 	uxth	r0, r0
-	lsl	r0, r0, #1
-	ldrh	r0, [r3, r0]
-	.loc 2 2423 0
-	ldmfd	sp, {fp, sp, pc}
-.L248:
+	ldrh	r0, [r3, r0, lsl #1]
+.L231:
+	.loc 2 2473 0
+	bx	lr
+.L234:
 	.align	2
-.L247:
+.L233:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE234:
+.LFE244:
 	.fnend
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
-	.align	2
+	.align	1
 	.global	GetFreeBlockMaxEraseCount
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 	.fnstart
-.LFB235:
-	.loc 2 2426 0
+.LFB245:
+	.loc 2 2476 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL198:
-	.movsp ip
-	mov	ip, sp
-.LCFI131:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI132:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI133:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2426 0
-	.loc 2 2431 0
-	ldr	r1, .L257
-	ldr	r3, [r1, #2272]
-	cmp	r3, #0
-	beq	.L255
-	.loc 2 2432 0
-	movw	r2, #2276
-	.loc 2 2434 0
-	ldr	ip, [r1, #2252]
-	.loc 2 2432 0
-	ldrh	r2, [r1, r2]
-	.loc 2 2436 0
-	mov	r4, #6
-	movw	r5, #65535
-	.loc 2 2434 0
-	sub	r3, r3, ip
-	asr	r3, r3, #1
-	.loc 2 2432 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL202:
+	.loc 2 2481 0
+	ldr	r1, .L243
+	.loc 2 2476 0
+	push	{r4, r5, r6, r7, lr}
+	.save {r4, r5, r6, r7, lr}
+.LCFI32:
+	.loc 2 2481 0
+	ldr	r3, [r1, #2316]
+	cbz	r3, .L241
+	.loc 2 2482 0
+	ldrh	r2, [r1, #2320]
+	.loc 2 2486 0
+	movs	r6, #6
+	.loc 2 2484 0
+	ldr	r4, [r1, #2292]
+	.loc 2 2486 0
+	movw	r7, #65535
+	.loc 2 2482 0
 	rsb	r2, r2, r2, lsl #3
-	asr	r2, r2, #3
+	.loc 2 2484 0
+	subs	r3, r3, r4
+	asrs	r3, r3, #1
+	.loc 2 2482 0
+	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2433 0
+	.loc 2 2483 0
+	it	gt
 	uxthgt	r0, r2
-	.loc 2 2434 0
-	ldr	r2, .L257+4
-	mul	r3, r2, r3
-	.loc 2 2435 0
-	mov	r2, #0
-	.loc 2 2434 0
+	.loc 2 2484 0
+	ldr	r2, .L243+4
+	muls	r3, r2, r3
+	.loc 2 2485 0
+	movs	r2, #0
+	.loc 2 2484 0
 	uxth	r3, r3
-.L252:
-	.loc 2 2435 0 discriminator 1
-	uxth	lr, r2
-	cmp	r0, lr
-	bls	.L254
-	.loc 2 2436 0
-	mul	lr, r4, r3
-	add	r2, r2, #1
-	ldrh	lr, [ip, lr]
-	cmp	lr, r5
-	bne	.L256
-.L254:
-	.loc 2 2440 0
-	ldr	r2, [r1, #2248]
-	lsl	r3, r3, #1
-	ldrh	r0, [r2, r3]
-.LVL199:
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.LVL200:
-.L256:
-	mov	r3, lr
-	b	.L252
-.L255:
-	.loc 2 2427 0
+.L238:
+	.loc 2 2485 0 discriminator 1
+	uxth	r5, r2
+	cmp	r0, r5
+	bls	.L240
+	.loc 2 2486 0
+	mul	r5, r6, r3
+	adds	r2, r2, #1
+	ldrh	r5, [r4, r5]
+	cmp	r5, r7
+	bne	.L242
+.L240:
+	.loc 2 2490 0
+	ldr	r2, [r1, #2304]
+	ldrh	r0, [r2, r3, lsl #1]
+.LVL203:
+	pop	{r4, r5, r6, r7, pc}
+.LVL204:
+.L242:
+	mov	r3, r5
+	b	.L238
+.L241:
+	.loc 2 2477 0
 	mov	r0, r3
-.LVL201:
-	.loc 2 2443 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L258:
+.LVL205:
+	.loc 2 2493 0
+	pop	{r4, r5, r6, r7, pc}
+.L244:
 	.align	2
-.L257:
+.L243:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE235:
+.LFE245:
 	.fnend
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.align	2
+	.align	1
 	.global	FtlPrintInfo2buf
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
 	.fnstart
-.LFB140:
+.LFB150:
 	.loc 3 11 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL202:
-	.movsp ip
-	mov	ip, sp
-.LCFI134:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI135:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI136:
-	.pad #20
-	sub	sp, sp, #20
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 11 0
-	.loc 3 17 0
-	ldr	r6, .L271
-	.loc 3 11 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL206:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI33:
 	mov	r7, r0
+	.loc 3 16 0
+	ldr	r6, .L257
+	.loc 3 11 0
+	.pad #20
+	sub	sp, sp, #20
+.LCFI34:
 	.loc 3 15 0
-	ldr	r1, .L271+4
 	add	r5, r7, #12
+	ldr	r1, .L257+4
 	bl	strcpy
-.LVL203:
-	.loc 3 17 0
+.LVL207:
+	.loc 3 16 0
 	ldr	r2, [r6, #92]
 	mov	r0, r5
-	ldr	r1, .L271+8
-	.loc 3 32 0
-	movw	r9, #2276
-	.loc 3 17 0
+	ldr	r1, .L257+8
 	bl	sprintf
-.LVL204:
+.LVL208:
 	add	r5, r5, r0
-	.loc 3 18 0
-	ldr	r1, .L271+12
+	.loc 3 17 0
+	ldr	r1, .L257+12
 	mov	r0, r5
-	add	r5, r5, #10
+	adds	r5, r5, #10
 	bl	strcpy
-.LVL205:
+.LVL209:
+	.loc 3 18 0
+	ldr	r2, [r6, #2480]
+	mov	r0, r5
+	ldr	r1, .L257+16
+	bl	sprintf
+.LVL210:
+	add	r5, r5, r0
 	.loc 3 19 0
-	ldr	r2, [r6, #2436]
+	ldr	r2, [r6, #2476]
+	ldr	r1, .L257+20
 	mov	r0, r5
-	ldr	r1, .L271+16
 	bl	sprintf
-.LVL206:
+.LVL211:
 	add	r5, r5, r0
 	.loc 3 20 0
-	ldr	r2, [r6, #2432]
-	ldr	r1, .L271+20
+	ldr	r2, [r6, #2484]
+	ldr	r1, .L257+24
 	mov	r0, r5
 	bl	sprintf
-.LVL207:
+.LVL212:
 	add	r5, r5, r0
 	.loc 3 21 0
-	ldr	r2, [r6, #2440]
-	ldr	r1, .L271+24
+	ldr	r2, [r6, #2488]
+	ldr	r1, .L257+28
 	mov	r0, r5
 	bl	sprintf
-.LVL208:
+.LVL213:
 	add	r5, r5, r0
 	.loc 3 22 0
-	ldr	r2, [r6, #2444]
-	ldr	r1, .L271+28
+	ldr	r2, [r6, #2492]
+	ldr	r1, .L257+32
 	mov	r0, r5
 	bl	sprintf
-.LVL209:
+.LVL214:
 	add	r5, r5, r0
 	.loc 3 23 0
-	ldr	r2, [r6, #2448]
-	ldr	r1, .L271+32
+	ldr	r2, [r6, #2496]
+	ldr	r1, .L257+36
 	mov	r0, r5
 	bl	sprintf
-.LVL210:
+.LVL215:
 	add	r5, r5, r0
 	.loc 3 24 0
-	ldr	r2, [r6, #2452]
-	ldr	r1, .L271+36
+	ldr	r2, [r6, #2500]
+	ldr	r1, .L257+40
 	mov	r0, r5
 	bl	sprintf
-.LVL211:
+.LVL216:
 	add	r5, r5, r0
 	.loc 3 25 0
-	ldr	r2, [r6, #2456]
-	ldr	r1, .L271+40
+	ldr	r2, [r6, #2504]
+	ldr	r1, .L257+44
 	mov	r0, r5
 	bl	sprintf
-.LVL212:
+.LVL217:
+	.loc 3 26 0
+	ldr	r2, [r6, #2508]
+	.loc 3 25 0
 	add	r5, r5, r0
 	.loc 3 26 0
-	ldr	r2, [r6, #2460]
-	ldr	r1, .L271+44
+	ldr	r1, .L257+48
 	mov	r0, r5
+	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL213:
+.LVL218:
 	.loc 3 27 0
-	ldr	r2, [r6, #2464]
+	ldr	r2, [r6, #2512]
 	.loc 3 26 0
 	add	r5, r5, r0
 	.loc 3 27 0
-	ldr	r1, .L271+48
+	ldr	r1, .L257+52
 	mov	r0, r5
-	.loc 3 39 0
-	ldr	r4, .L271+52
-	.loc 3 50 0
-	ldr	r8, .L271+56
-	.loc 3 27 0
-	lsr	r2, r2, #11
+	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL214:
-	.loc 3 28 0
-	ldr	r2, [r6, #2468]
-	.loc 3 27 0
+.LVL219:
 	add	r5, r5, r0
 	.loc 3 28 0
-	ldr	r1, .L271+60
+	ldr	r2, [r6, #2516]
+	ldr	r1, .L257+56
 	mov	r0, r5
-	lsr	r2, r2, #11
 	bl	sprintf
-.LVL215:
+.LVL220:
 	add	r5, r5, r0
 	.loc 3 29 0
-	ldr	r2, [r6, #2472]
-	ldr	r1, .L271+64
+	ldr	r2, [r6, #2520]
+	ldr	r1, .L257+60
 	mov	r0, r5
 	bl	sprintf
-.LVL216:
+.LVL221:
 	add	r5, r5, r0
 	.loc 3 30 0
-	ldr	r2, [r6, #2476]
-	ldr	r1, .L271+68
+	ldrh	r2, [r6, #134]
+	ldr	r1, .L257+64
 	mov	r0, r5
 	bl	sprintf
-.LVL217:
+.LVL222:
 	add	r5, r5, r0
 	.loc 3 31 0
-	ldrh	r2, [r6, #134]
-	ldr	r1, .L271+72
+	ldrh	r2, [r6, #2320]
+	ldr	r1, .L257+68
 	mov	r0, r5
 	bl	sprintf
-.LVL218:
+.LVL223:
 	add	r5, r5, r0
 	.loc 3 32 0
-	ldrh	r2, [r6, r9]
-	ldr	r1, .L271+76
+	ldr	r2, [r6, #2524]
+	ldr	r1, .L257+72
 	mov	r0, r5
 	bl	sprintf
-.LVL219:
+.LVL224:
 	add	r5, r5, r0
 	.loc 3 33 0
-	ldr	r2, [r6, #2480]
-	ldr	r1, .L271+80
+	ldr	r2, [r6, #2528]
+	ldr	r1, .L257+76
 	mov	r0, r5
 	bl	sprintf
-.LVL220:
+.LVL225:
 	add	r5, r5, r0
 	.loc 3 34 0
-	ldr	r2, [r6, #2484]
-	ldr	r1, .L271+84
+	ldr	r2, [r6, #2532]
+	ldr	r1, .L257+80
 	mov	r0, r5
 	bl	sprintf
-.LVL221:
+.LVL226:
 	add	r5, r5, r0
 	.loc 3 35 0
-	ldr	r2, [r6, #2488]
-	ldr	r1, .L271+88
+	ldr	r2, [r6, #2536]
+	ldr	r1, .L257+84
 	mov	r0, r5
 	bl	sprintf
-.LVL222:
+.LVL227:
 	add	r5, r5, r0
 	.loc 3 36 0
-	ldr	r2, [r6, #2492]
-	ldr	r1, .L271+92
+	ldr	r2, [r6, #2540]
+	ldr	r1, .L257+88
 	mov	r0, r5
 	bl	sprintf
-.LVL223:
+.LVL228:
 	add	r5, r5, r0
 	.loc 3 37 0
-	ldr	r2, [r6, #2496]
-	ldr	r1, .L271+96
+	ldr	r2, [r6, #2544]
+	ldr	r1, .L257+92
 	mov	r0, r5
 	bl	sprintf
-.LVL224:
+.LVL229:
 	add	r5, r5, r0
 	.loc 3 38 0
-	ldr	r2, [r6, #2500]
-	ldr	r1, .L271+100
+	ldrh	r2, [r6, #2274]
+	ldr	r1, .L257+96
 	mov	r0, r5
 	bl	sprintf
-.LVL225:
+.LVL230:
 	add	r5, r5, r0
 	.loc 3 39 0
-	ldrh	r2, [r4, #30]
-	ldr	r1, .L271+104
+	ldrh	r2, [r6, #2272]
+	ldr	r1, .L257+100
 	mov	r0, r5
 	bl	sprintf
-.LVL226:
+.LVL231:
 	add	r5, r5, r0
 	.loc 3 40 0
-	ldrh	r2, [r4, #28]
-	ldr	r1, .L271+108
+	ldr	r2, [r6, #116]
+	ldr	r1, .L257+104
 	mov	r0, r5
 	bl	sprintf
-.LVL227:
+.LVL232:
 	add	r5, r5, r0
 	.loc 3 41 0
-	ldr	r2, [r6, #116]
-	ldr	r1, .L271+112
+	ldr	r2, [r6, #108]
+	ldr	r1, .L257+108
 	mov	r0, r5
 	bl	sprintf
-.LVL228:
+.LVL233:
 	add	r5, r5, r0
 	.loc 3 42 0
-	ldr	r2, [r6, #108]
-	ldr	r1, .L271+116
+	ldr	r2, [r6, #4]
+	ldr	r1, .L257+112
 	mov	r0, r5
 	bl	sprintf
-.LVL229:
+.LVL234:
 	add	r5, r5, r0
 	.loc 3 43 0
-	ldr	r2, [r6, #4]
-	ldr	r1, .L271+120
+	ldrh	r2, [r6, #194]
+	ldr	r1, .L257+116
 	mov	r0, r5
 	bl	sprintf
-.LVL230:
+.LVL235:
 	add	r5, r5, r0
 	.loc 3 44 0
-	ldrh	r2, [r6, #194]
-	ldr	r1, .L271+124
+	ldrh	r2, [r6, #16]
+	ldr	r1, .L257+120
 	mov	r0, r5
 	bl	sprintf
-.LVL231:
+.LVL236:
 	add	r5, r5, r0
 	.loc 3 45 0
-	ldrh	r2, [r6, #16]
-	ldr	r1, .L271+128
+	ldrh	r2, [r6, #2548]
+	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL232:
-	.loc 3 46 0
-	movw	r3, #2552
-	.loc 3 45 0
+.LVL237:
 	add	r5, r5, r0
 	.loc 3 46 0
-	ldrh	r2, [r6, r3]
+	ldr	r2, [r6, #20]
+	ldr	r1, .L257+128
 	mov	r0, r5
-	ldr	r1, .L271+132
-	.loc 3 50 0
-	movw	r4, #2280
-	.loc 3 46 0
 	bl	sprintf
-.LVL233:
+.LVL238:
 	add	r5, r5, r0
 	.loc 3 47 0
-	ldr	r2, [r6, #20]
-	ldr	r1, .L271+136
+	ldrh	r2, [r6, #2552]
+	ldr	r1, .L257+132
 	mov	r0, r5
 	bl	sprintf
-.LVL234:
-	.loc 3 48 0
-	movw	r3, #2556
-	.loc 3 47 0
+.LVL239:
 	add	r5, r5, r0
 	.loc 3 48 0
-	ldrh	r2, [r6, r3]
+	ldrh	r2, [r6, #128]
+	ldr	r1, .L257+136
 	mov	r0, r5
-	ldr	r1, .L271+140
 	bl	sprintf
-.LVL235:
+.LVL240:
 	add	r5, r5, r0
 	.loc 3 49 0
-	ldrh	r2, [r6, #128]
-	ldr	r1, .L271+144
+	ldrh	r2, [r6, #2326]
+	ldr	r1, .L257+140
 	mov	r0, r5
 	bl	sprintf
-.LVL236:
+.LVL241:
 	add	r5, r5, r0
 	.loc 3 50 0
-	ldrh	r2, [r8, #2]
-	ldr	r1, .L271+148
+	ldrb	r2, [r6, #2330]	@ zero_extendqisi2
+	ldr	r1, .L257+144
 	mov	r0, r5
 	bl	sprintf
-.LVL237:
+.LVL242:
 	add	r5, r5, r0
 	.loc 3 51 0
-	ldrb	r2, [r6, #2286]	@ zero_extendqisi2
-	ldr	r1, .L271+152
+	ldrh	r2, [r6, #2324]
+	ldr	r1, .L257+148
 	mov	r0, r5
 	bl	sprintf
-.LVL238:
+.LVL243:
 	add	r5, r5, r0
 	.loc 3 52 0
-	ldrh	r2, [r6, r4]
-	ldr	r1, .L271+156
+	ldrb	r2, [r6, #2332]	@ zero_extendqisi2
+	ldr	r1, .L257+152
 	mov	r0, r5
 	bl	sprintf
-.LVL239:
+.LVL244:
 	add	r5, r5, r0
 	.loc 3 53 0
-	ldrb	r2, [r6, #2288]	@ zero_extendqisi2
-	ldr	r1, .L271+160
+	ldrh	r2, [r6, #2328]
+	ldr	r1, .L257+156
 	mov	r0, r5
 	bl	sprintf
-.LVL240:
+.LVL245:
+	.loc 3 54 0
+	ldr	r3, [r6, #2300]
+	.loc 3 53 0
 	add	r5, r5, r0
 	.loc 3 54 0
-	ldrh	r2, [r8, #4]
-	ldr	r1, .L271+164
+	ldrh	r2, [r6, #2324]
 	mov	r0, r5
+	ldr	r1, .L257+160
+	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL241:
-	.loc 3 55 0
-	ldrh	r3, [r6, r4]
-	.loc 3 54 0
+.LVL246:
 	add	r5, r5, r0
 	.loc 3 55 0
-	ldr	r2, [r6, #2260]
+	ldrh	r2, [r6, #2374]
+	ldr	r1, .L257+164
 	mov	r0, r5
-	ldr	r1, .L271+168
-	.loc 3 56 0
-	movw	r4, #2328
-	.loc 3 55 0
-	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL242:
+.LVL247:
 	add	r5, r5, r0
 	.loc 3 56 0
-	ldrh	r2, [r8, #50]
-	ldr	r1, .L271+172
+	ldrb	r2, [r6, #2378]	@ zero_extendqisi2
+	ldr	r1, .L257+168
 	mov	r0, r5
 	bl	sprintf
-.LVL243:
+.LVL248:
 	add	r5, r5, r0
 	.loc 3 57 0
-	ldrb	r2, [r6, #2334]	@ zero_extendqisi2
-	ldr	r1, .L271+176
+	ldrh	r2, [r6, #2372]
+	ldr	r1, .L257+172
 	mov	r0, r5
 	bl	sprintf
-.LVL244:
+.LVL249:
 	add	r5, r5, r0
 	.loc 3 58 0
-	ldrh	r2, [r6, r4]
-	ldr	r1, .L271+180
+	ldrb	r2, [r6, #2380]	@ zero_extendqisi2
+	ldr	r1, .L257+176
 	mov	r0, r5
 	bl	sprintf
-.LVL245:
+.LVL250:
 	add	r5, r5, r0
 	.loc 3 59 0
-	ldrb	r2, [r6, #2336]	@ zero_extendqisi2
-	ldr	r1, .L271+184
+	ldrh	r2, [r6, #2376]
+	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL246:
+.LVL251:
+	.loc 3 60 0
+	ldr	r3, [r6, #2300]
+	.loc 3 59 0
 	add	r5, r5, r0
 	.loc 3 60 0
-	ldrh	r2, [r8, #52]
-	ldr	r1, .L271+188
+	ldrh	r2, [r6, #2372]
 	mov	r0, r5
+	ldr	r1, .L257+184
+	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL247:
-	.loc 3 61 0
-	ldrh	r3, [r6, r4]
-	.loc 3 60 0
+.LVL252:
 	add	r5, r5, r0
 	.loc 3 61 0
-	ldr	r2, [r6, #2260]
+	ldrh	r2, [r6, #2422]
+	ldr	r1, .L257+188
 	mov	r0, r5
-	ldr	r1, .L271+192
-	.loc 3 62 0
-	add	r4, r8, #96
-	.loc 3 61 0
-	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL248:
+.LVL253:
 	add	r5, r5, r0
 	.loc 3 62 0
-	ldrh	r2, [r8, #98]
-	ldr	r1, .L271+196
+	ldrb	r2, [r6, #2426]	@ zero_extendqisi2
+	ldr	r1, .L257+192
 	mov	r0, r5
 	bl	sprintf
-.LVL249:
+.LVL254:
 	add	r5, r5, r0
 	.loc 3 63 0
-	ldrb	r2, [r6, #2382]	@ zero_extendqisi2
-	ldr	r1, .L271+200
+	ldrh	r2, [r6, #2420]
+	ldr	r1, .L257+196
 	mov	r0, r5
 	bl	sprintf
-.LVL250:
-	.loc 3 64 0
-	movw	r3, #2376
-	.loc 3 63 0
+.LVL255:
 	add	r5, r5, r0
 	.loc 3 64 0
-	ldrh	r2, [r6, r3]
+	ldrb	r2, [r6, #2428]	@ zero_extendqisi2
+	ldr	r1, .L257+200
 	mov	r0, r5
-	ldr	r1, .L271+204
 	bl	sprintf
-.LVL251:
+.LVL256:
 	add	r5, r5, r0
 	.loc 3 65 0
-	ldrb	r2, [r6, #2384]	@ zero_extendqisi2
-	ldr	r1, .L271+208
+	ldrh	r2, [r6, #2424]
+	ldr	r1, .L257+204
 	mov	r0, r5
 	bl	sprintf
-.LVL252:
+.LVL257:
 	add	r5, r5, r0
 	.loc 3 66 0
-	ldrh	r2, [r8, #100]
-	ldr	r1, .L271+212
+	ldrh	r2, [r6, #2566]
+	ldr	r1, .L257+208
 	mov	r0, r5
 	bl	sprintf
-.LVL253:
+.LVL258:
 	add	r5, r5, r0
 	.loc 3 67 0
-	ldrh	r2, [r4, #194]
-	ldr	r1, .L271+216
+	ldrb	r2, [r6, #2570]	@ zero_extendqisi2
+	ldr	r1, .L257+212
 	mov	r0, r5
 	bl	sprintf
-.LVL254:
+.LVL259:
 	add	r5, r5, r0
 	.loc 3 68 0
-	ldrb	r2, [r6, #2574]	@ zero_extendqisi2
-	ldr	r1, .L271+220
+	ldrh	r2, [r6, #2564]
+	ldr	r1, .L257+216
 	mov	r0, r5
 	bl	sprintf
-.LVL255:
-	.loc 3 67 0
-	movw	r8, #2568
-	.loc 3 68 0
+.LVL260:
 	add	r5, r5, r0
 	.loc 3 69 0
-	ldrh	r2, [r6, r8]
+	ldrb	r2, [r6, #2572]	@ zero_extendqisi2
+	ldr	r1, .L257+220
 	mov	r0, r5
-	ldr	r1, .L271+224
 	bl	sprintf
-.LVL256:
+.LVL261:
 	add	r5, r5, r0
 	.loc 3 70 0
-	ldrb	r2, [r6, #2576]	@ zero_extendqisi2
-	ldr	r1, .L271+228
-	mov	r0, r5
-	bl	sprintf
-.LVL257:
-	add	r5, r5, r0
-	.loc 3 71 0
-	ldrh	r2, [r4, #196]
-	ldr	r1, .L271+232
+	ldrh	r2, [r6, #2568]
+	ldr	r1, .L257+224
 	mov	r0, r5
 	bl	sprintf
-.LVL258:
-	.loc 3 72 0
-	ldr	r3, [r6, #2692]
+.LVL262:
 	.loc 3 71 0
+	ldr	r3, [r6, #2688]
+	.loc 3 70 0
 	add	r5, r5, r0
-	.loc 3 72 0
-	ldr	r2, [r6, #2696]
+	.loc 3 71 0
+	ldr	r2, [r6, #2692]
 	mov	r0, r5
-	ldr	r1, .L271+236
+	ldr	r1, .L257+228
 	str	r3, [sp]
-	ldr	r3, [r6, #2700]
-	bl	sprintf
-.LVL259:
-	add	r4, r5, r0
-	.loc 3 73 0
-	ldr	r2, [r6, #2688]
-	ldr	r1, .L271+240
-	mov	r0, r4
-	bl	sprintf
-.LVL260:
-	add	r4, r4, r0
-	.loc 3 74 0
-	ldr	r2, [r6, #2712]
-	ldr	r1, .L271+244
-	mov	r0, r4
-	bl	sprintf
-.LVL261:
-	.loc 3 75 0
-	movw	r3, #3128
-	.loc 3 74 0
-	add	r4, r4, r0
-	.loc 3 75 0
-	ldrh	r2, [r6, r3]
-	mov	r0, r4
-	ldr	r1, .L271+248
-	bl	sprintf
-.LVL262:
-	.loc 3 76 0
-	movw	r3, #3130
-	.loc 3 75 0
-	add	r4, r4, r0
-	.loc 3 76 0
-	ldrh	r2, [r6, r3]
-	mov	r0, r4
-	ldr	r1, .L271+252
+	ldr	r3, [r6, #2696]
 	bl	sprintf
 .LVL263:
-	add	r4, r4, r0
-	.loc 3 77 0
-	ldr	r2, [r6, #3132]
-	ldr	r1, .L271+256
+	adds	r4, r5, r0
+	.loc 3 72 0
+	ldr	r2, [r6, #2684]
+	ldr	r1, .L257+232
 	mov	r0, r4
 	bl	sprintf
 .LVL264:
-	.loc 3 78 0
-	add	r3, r6, #3136
-	.loc 3 77 0
 	add	r4, r4, r0
-	.loc 3 78 0
-	ldrh	r2, [r3]
+	.loc 3 73 0
+	ldr	r2, [r6, #2708]
+	ldr	r1, .L257+236
 	mov	r0, r4
-	ldr	r1, .L271+260
 	bl	sprintf
 .LVL265:
 	add	r4, r4, r0
-	.loc 3 79 0
-	bl	GetFreeBlockMinEraseCount
-.LVL266:
-	ldr	r1, .L271+264
-	mov	r2, r0
+	.loc 3 74 0
+	ldrh	r2, [r6, #3124]
+	ldr	r1, .L257+240
 	mov	r0, r4
 	bl	sprintf
-.LVL267:
+.LVL266:
 	add	r4, r4, r0
-	.loc 3 80 0
-	ldrh	r0, [r6, r9]
-	bl	GetFreeBlockMaxEraseCount
-.LVL268:
-	ldr	r1, .L271+268
-	mov	r2, r0
+	.loc 3 75 0
+	ldrh	r2, [r6, #3126]
+	ldr	r1, .L257+244
 	mov	r0, r4
 	bl	sprintf
-.LVL269:
-	.loc 3 81 0
-	ldr	r3, .L271+272
-	.loc 3 80 0
+.LVL267:
 	add	r4, r4, r0
-	.loc 3 81 0
-	ldr	r3, [r3]
-	cmp	r3, #1
-	beq	.L260
-.LVL270:
-.L265:
-	.loc 3 104 0
-	sub	r0, r4, r7
-	.loc 3 105 0
-	sub	sp, fp, #40
-.LCFI137:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL271:
-.L260:
-.LCFI138:
-	.loc 3 84 0
-	ldrh	r3, [r6, r8]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L262
-	.loc 3 85 0
-	ldr	r2, [r6, #2260]
-	lsl	r3, r3, #1
-	mov	r0, r4
-	ldr	r1, .L271+276
-	ldrh	r2, [r2, r3]
-	bl	sprintf
-.LVL272:
-	add	r4, r4, r0
-.L262:
-.LBB282:
-	.loc 3 87 0
-	mov	r0, #0
-	.loc 3 91 0
-	ldr	r9, .L271+280
-	.loc 3 87 0
-	bl	List_get_gc_head_node
-.LVL273:
-	uxth	r3, r0
-.LVL274:
-	.loc 3 88 0
-	mov	r5, #0
-	.loc 3 89 0
-	movw	r10, #65535
-.L264:
-	cmp	r3, r10
-	beq	.L263
-	.loc 3 91 0 discriminator 2
-	ldr	r2, [r6, #2248]
-	lsl	r1, r3, #1
-	mov	r8, #6
-	mul	r8, r8, r3
-	mov	r0, r4
-	ldrh	r2, [r2, r1]
-	str	r2, [sp, #8]
-	ldr	r2, [r6, #2252]
-	add	r2, r2, r8
-	ldrh	r2, [r2, #4]
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2260]
-	ldrh	r2, [r2, r1]
-	mov	r1, r9
-	str	r2, [sp]
-	mov	r2, r5
-	bl	sprintf
-.LVL275:
-	.loc 3 88 0 discriminator 2
-	add	r5, r5, #1
-	.loc 3 92 0 discriminator 2
-	ldr	r3, [r6, #2252]
-	.loc 3 88 0 discriminator 2
-	cmp	r5, #16
-	.loc 3 91 0 discriminator 2
-	add	r4, r4, r0
-	.loc 3 92 0 discriminator 2
-	ldrh	r3, [r3, r8]
-.LVL276:
-	.loc 3 88 0 discriminator 2
-	bne	.L264
-.L263:
-.LBE282:
-.LBB283:
-	.loc 3 96 0
-	ldr	r2, [r6, #2252]
-	.loc 3 97 0
-	mov	r8, #0
-	.loc 3 96 0
-	ldr	r3, [r6, #2272]
-.LVL277:
-	.loc 3 98 0
-	movw	r9, #65535
-	.loc 3 100 0
-	ldr	r10, .L271+284
-	.loc 3 96 0
-	sub	r3, r3, r2
-	ldr	r2, .L271+288
-	asr	r3, r3, #1
-	mul	r3, r2, r3
-	uxth	r3, r3
-.LVL278:
-.L266:
-	.loc 3 98 0
-	cmp	r3, r9
-	beq	.L265
-	.loc 3 100 0 discriminator 2
-	ldr	r1, [r6, #2248]
-	lsl	r2, r3, #1
-	mov	r5, #6
-	mul	r5, r5, r3
-	mov	r0, r4
-	ldrh	r2, [r1, r2]
-	mov	r1, r10
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2252]
-	add	r2, r2, r5
-	ldrh	r2, [r2, #4]
-	str	r2, [sp]
-	mov	r2, r8
-	.loc 3 97 0 discriminator 2
-	add	r8, r8, #1
-	.loc 3 100 0 discriminator 2
-	bl	sprintf
-.LVL279:
-	.loc 3 97 0 discriminator 2
-	cmp	r8, #4
-	.loc 3 100 0 discriminator 2
-	add	r4, r4, r0
-	.loc 3 97 0 discriminator 2
-	beq	.L265
-	.loc 3 101 0
-	ldr	r3, [r6, #2252]
-	ldrh	r3, [r3, r5]
-.LVL280:
-	b	.L266
-.L272:
+	.loc 3 76 0
+	ldr	r2, [r6, #3128]
+	b	.L258
+.L259:
 	.align	2
-.L271:
+.L257:
 	.word	.LANCHOR0
 	.word	.LC2
 	.word	.LC3
@@ -4112,8 +3362,6 @@ FtlPrintInfo2buf:
 	.word	.LC11
 	.word	.LC12
 	.word	.LC13
-	.word	.LANCHOR0+2504
-	.word	.LANCHOR0+2280
 	.word	.LC14
 	.word	.LC15
 	.word	.LC16
@@ -4163,4791 +3411,4876 @@ FtlPrintInfo2buf:
 	.word	.LC60
 	.word	.LC61
 	.word	.LC62
+.L258:
+	ldr	r1, .L260
+	mov	r0, r4
+	bl	sprintf
+.LVL268:
+	add	r4, r4, r0
+	.loc 3 77 0
+	ldrh	r2, [r6, #3132]
+	ldr	r1, .L260+4
+	mov	r0, r4
+	bl	sprintf
+.LVL269:
+	add	r4, r4, r0
+	.loc 3 78 0
+	bl	GetFreeBlockMinEraseCount
+.LVL270:
+	ldr	r1, .L260+8
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL271:
+	add	r4, r4, r0
+	.loc 3 79 0
+	ldrh	r0, [r6, #2320]
+	bl	GetFreeBlockMaxEraseCount
+.LVL272:
+	ldr	r1, .L260+12
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL273:
+	.loc 3 80 0
+	ldr	r3, .L260+16
+	.loc 3 79 0
+	add	r4, r4, r0
+	.loc 3 80 0
+	ldr	r3, [r3]
+	cmp	r3, #1
+	beq	.L246
+.LVL274:
+.L251:
+	.loc 3 103 0
+	subs	r0, r4, r7
+	.loc 3 104 0
+	add	sp, sp, #20
+.LCFI35:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL275:
+.L246:
+.LCFI36:
+	.loc 3 83 0
+	ldrh	r3, [r6, #2564]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L248
+	.loc 3 84 0
+	ldr	r2, [r6, #2300]
+	mov	r0, r4
+	ldr	r1, .L260+20
+	ldrh	r2, [r2, r3, lsl #1]
+	bl	sprintf
+.LVL276:
+	add	r4, r4, r0
+.L248:
+.LBB289:
+	.loc 3 86 0
+	movs	r0, #0
+	.loc 3 90 0
+	ldr	r9, .L260+28
+	.loc 3 86 0
+	bl	List_get_gc_head_node
+.LVL277:
+	uxth	r3, r0
+.LVL278:
+	.loc 3 87 0
+	movs	r5, #0
+	.loc 3 88 0
+	movw	fp, #65535
+	.loc 3 90 0
+	mov	r10, #6
+.L250:
+	.loc 3 88 0
+	cmp	r3, fp
+	beq	.L249
+	.loc 3 90 0 discriminator 2
+	ldr	r2, [r6, #2304]
+	mul	r8, r10, r3
+	mov	r0, r4
+	mov	r1, r9
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #8]
+	ldr	r2, [r6, #2292]
+	add	r2, r2, r8
+	ldrh	r2, [r2, #4]
+	str	r2, [sp, #4]
+	ldr	r2, [r6, #2300]
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp]
+	mov	r2, r5
+	bl	sprintf
+.LVL279:
+	.loc 3 87 0 discriminator 2
+	adds	r5, r5, #1
+	.loc 3 91 0 discriminator 2
+	ldr	r3, [r6, #2292]
+	.loc 3 87 0 discriminator 2
+	cmp	r5, #16
+	.loc 3 90 0 discriminator 2
+	add	r4, r4, r0
+	.loc 3 91 0 discriminator 2
+	ldrh	r3, [r3, r8]
+.LVL280:
+	.loc 3 87 0 discriminator 2
+	bne	.L250
+.L249:
+.LBE289:
+.LBB290:
+	.loc 3 95 0
+	ldr	r2, [r6, #2292]
+	.loc 3 96 0
+	movs	r5, #0
+	.loc 3 95 0
+	ldr	r3, [r6, #2316]
+.LVL281:
+	.loc 3 97 0
+	movw	r9, #65535
+	.loc 3 99 0
+	ldr	fp, .L260+32
+	mov	r10, #6
+	.loc 3 95 0
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L260+24
+	muls	r3, r2, r3
+	uxth	r3, r3
+.LVL282:
+.L252:
+	.loc 3 97 0
+	cmp	r3, r9
+	beq	.L251
+	.loc 3 99 0 discriminator 2
+	ldr	r2, [r6, #2304]
+	mul	r8, r10, r3
+	mov	r0, r4
+	mov	r1, fp
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #4]
+	ldr	r2, [r6, #2292]
+	add	r2, r2, r8
+	ldrh	r2, [r2, #4]
+	str	r2, [sp]
+	mov	r2, r5
+	.loc 3 96 0 discriminator 2
+	adds	r5, r5, #1
+	.loc 3 99 0 discriminator 2
+	bl	sprintf
+.LVL283:
+	.loc 3 96 0 discriminator 2
+	cmp	r5, #4
+	.loc 3 99 0 discriminator 2
+	add	r4, r4, r0
+	.loc 3 96 0 discriminator 2
+	beq	.L251
+	.loc 3 100 0
+	ldr	r3, [r6, #2292]
+	ldrh	r3, [r3, r8]
+.LVL284:
+	b	.L252
+.L261:
+	.align	2
+.L260:
 	.word	.LC63
 	.word	.LC64
 	.word	.LC65
 	.word	.LC66
 	.word	.LANCHOR2
 	.word	.LC67
+	.word	-1431655765
 	.word	.LC68
 	.word	.LC69
-	.word	-1431655765
-.LBE283:
-.LFE140:
+.LBE290:
+.LFE150:
 	.fnend
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.align	2
+	.align	1
 	.global	rknand_proc_ftlread
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
 	.fnstart
-.LFB141:
-	.loc 3 114 0
+.LFB151:
+	.loc 3 113 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL281:
-	.movsp ip
-	mov	ip, sp
-.LCFI139:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI140:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI141:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 114 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL285:
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI37:
+	.loc 3 113 0
 	mov	r5, r0
-	.loc 3 120 0
-	ldr	r2, .L274
-	ldr	r1, .L274+4
+	.loc 3 119 0
+	ldr	r2, .L263
+	ldr	r1, .L263+4
 	bl	sprintf
-.LVL282:
-	add	r4, r5, r0
-	.loc 3 122 0
+.LVL286:
+	adds	r4, r5, r0
+	.loc 3 121 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL283:
-	add	r0, r4, r0
-	.loc 3 124 0
-	sub	r0, r0, r5
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L275:
+.LVL287:
+	add	r0, r0, r4
+	.loc 3 123 0
+	subs	r0, r0, r5
+	pop	{r3, r4, r5, pc}
+.LVL288:
+.L264:
 	.align	2
-.L274:
+.L263:
 	.word	.LC70
 	.word	.LC71
-.LFE141:
+.LFE151:
 	.fnend
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.align	2
+	.align	1
 	.global	GetSwlReplaceBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 	.fnstart
-.LFB236:
-	.loc 2 2447 0
+.LFB246:
+	.loc 2 2497 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI142:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI143:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI144:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI38:
 	.pad #28
 	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2447 0
-	.loc 2 2456 0
-	ldr	r4, .L300
-	ldr	r2, [r4, #2488]
-	ldr	r3, [r4, #2500]
+.LCFI39:
+	.loc 2 2507 0
+	ldr	r4, .L289
+	ldr	r2, [r4, #2532]
+	ldr	r3, [r4, #2544]
 	cmp	r2, r3
-	bcs	.L277
-	ldr	r2, [r4, #2248]
-	.loc 2 2458 0
-	mov	r3, #0
-	.loc 2 2459 0
+	bcs	.L266
+	.loc 2 2510 0
 	ldrh	r1, [r4, #16]
-	.loc 2 2458 0
-	str	r3, [r4, #2480]
-	sub	r2, r2, #2
-.L278:
-	.loc 2 2459 0 discriminator 1
+	.loc 2 2509 0
+	movs	r3, #0
+	.loc 2 2511 0
+	ldr	r0, [r4, #2304]
+	.loc 2 2509 0
+	str	r3, [r4, #2524]
+.L267:
+	.loc 2 2510 0 discriminator 1
 	cmp	r3, r1
-	bcc	.L279
-	.loc 2 2461 0
-	ldr	r5, [r4, #2480]
+	bcc	.L268
+	.loc 2 2512 0
+	ldr	r5, [r4, #2524]
 	mov	r0, r5
 	bl	__aeabi_uidiv
-.LVL284:
-	str	r0, [r4, #2488]
-	.loc 2 2462 0
-	ldr	r0, [r4, #2484]
+.LVL289:
+	str	r0, [r4, #2532]
+	.loc 2 2513 0
+	ldr	r0, [r4, #2528]
 	ldrh	r1, [r4, #68]
-	sub	r0, r5, r0
+	subs	r0, r5, r0
 	bl	__aeabi_uidiv
-.LVL285:
-	str	r0, [r4, #2480]
-.L280:
-	.loc 2 2468 0
-	ldr	r6, [r4, #2500]
-	ldr	r8, [r4, #2488]
+.LVL290:
+	str	r0, [r4, #2524]
+.L269:
+	.loc 2 2519 0
+	ldr	r6, [r4, #2544]
+	ldr	r7, [r4, #2532]
 	add	r3, r6, #256
-	cmp	r3, r8
-	bls	.L285
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	ldr	r2, [r4, #2496]
+	cmp	r3, r7
+	bls	.L274
+	.loc 2 2519 0 is_stmt 0 discriminator 1
+	ldr	r2, [r4, #2540]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L285
-.LVL286:
-.L287:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L274
+.LVL291:
+.L276:
+	.loc 2 2520 0 is_stmt 1
 	movw	r5, #65535
-.L286:
-	.loc 2 2518 0
+.L275:
+	.loc 2 2566 0
 	mov	r0, r5
-	sub	sp, fp, #40
-.LCFI145:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL287:
-.L279:
-.LCFI146:
-	.loc 2 2460 0 discriminator 3
-	ldrh	r0, [r2, #2]!
-	.loc 2 2459 0 discriminator 3
-	add	r3, r3, #1
-	.loc 2 2460 0 discriminator 3
-	ldr	ip, [r4, #2480]
-	add	r0, r0, ip
-	str	r0, [r4, #2480]
-	b	.L278
-.L277:
-	.loc 2 2463 0
-	ldr	r3, [r4, #2496]
+.LVL292:
+	add	sp, sp, #28
+.LCFI40:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL293:
+.L268:
+.LCFI41:
+	.loc 2 2511 0 discriminator 3
+	ldrh	r2, [r0, r3, lsl #1]
+	.loc 2 2510 0 discriminator 3
+	adds	r3, r3, #1
+	.loc 2 2511 0 discriminator 3
+	ldr	r5, [r4, #2524]
+	add	r2, r2, r5
+	str	r2, [r4, #2524]
+	b	.L267
+.L266:
+	.loc 2 2514 0
+	ldr	r3, [r4, #2540]
 	cmp	r2, r3
-	.loc 2 2464 0
-	addhi	r3, r3, #1
-	strhi	r3, [r4, #2496]
-	.loc 2 2465 0
-	movhi	r3, #0
-	.loc 2 2463 0
-	bls	.L280
-.L282:
-	.loc 2 2465 0 discriminator 1
+	bls	.L269
+	.loc 2 2515 0
+	adds	r3, r3, #1
+	str	r3, [r4, #2540]
+	.loc 2 2516 0
+	movs	r3, #0
+.L271:
+	.loc 2 2516 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	bcs	.L280
-	.loc 2 2466 0 discriminator 3
-	ldr	r0, [r4, #2248]
-	lsl	r1, r3, #1
-	.loc 2 2465 0 discriminator 3
-	add	r3, r3, #1
-	.loc 2 2466 0 discriminator 3
-	ldrh	r2, [r0, r1]
-	add	r2, r2, #1
-	strh	r2, [r0, r1]	@ movhi
-	b	.L282
-.L285:
-	.loc 2 2471 0
-	movw	r3, #2276
-	ldrh	r0, [r4, r3]
+	bcs	.L269
+	.loc 2 2517 0 is_stmt 1 discriminator 3
+	ldr	r1, [r4, #2304]
+	ldrh	r2, [r1, r3, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 2 2516 0 discriminator 3
+	adds	r3, r3, #1
+	b	.L271
+.L274:
+	.loc 2 2522 0
+	ldrh	r0, [r4, #2320]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL288:
-	.loc 2 2472 0
+.LVL294:
+	.loc 2 2523 0
 	add	r3, r6, #64
-	.loc 2 2471 0
-	mov	r10, r0
-.LVL289:
-	.loc 2 2472 0
+	.loc 2 2522 0
+	mov	r9, r0
+.LVL295:
+	.loc 2 2523 0
 	cmp	r0, r3
-	movcs	r3, #0
-	movcc	r3, #1
-	cmp	r6, #30
-	movls	r3, #0
-	cmp	r3, #0
-	bne	.L287
-	.loc 2 2476 0
-	ldr	r3, [r4, #2256]
-.LVL290:
+	bcc	.L276
+	.loc 2 2526 0
+	ldr	r3, [r4, #2296]
+.LVL296:
 	cmp	r3, #0
-	beq	.L287
-	.loc 2 2483 0
-	ldr	r0, [r4, #2252]
-	.loc 2 2484 0
-	movw	r7, #65535
-.LVL291:
-	ldr	r9, [r4, #2248]
-	mov	r2, r7
-	.loc 2 2483 0
-	ldr	ip, .L300+4
-	.loc 2 2495 0
-	mov	lr, #6
-.L288:
-	.loc 2 2479 0
-	ldrh	r1, [r3]
-	movw	r5, #65535
-	cmp	r1, r5
-	bne	.L291
-	mov	r5, r2
-.L290:
-	.loc 2 2498 0
+	beq	.L276
+	.loc 2 2530 0
+	ldrh	r2, [r4, #16]
+	.loc 2 2534 0
+	movw	r1, #65535
+.LVL297:
+	.loc 2 2533 0
+	ldr	lr, [r4, #2292]
+	.loc 2 2534 0
+	movs	r0, #0
+.LVL298:
+	ldr	r8, [r4, #2304]
+	.loc 2 2528 0
+	mov	r10, r1
+	.loc 2 2530 0
+	str	r2, [sp, #20]
+	.loc 2 2543 0
+	mov	fp, #6
+	.loc 2 2534 0
+	mov	r2, r1
+.L277:
+	.loc 2 2528 0
+	ldrh	ip, [r3]
+	cmp	ip, r10
+	bne	.L280
+	mov	r5, r2
+.L279:
+	.loc 2 2546 0
 	movw	r3, #65535
-.LVL292:
+.LVL299:
 	cmp	r5, r3
-	beq	.L287
-	.loc 2 2500 0
-	lsl	r2, r5, #1
-	ldrh	r3, [r9, r2]
-.LVL293:
-	.loc 2 2501 0
-	cmp	r6, r3
-	bcs	.L292
-	str	r3, [fp, #-52]
-	str	r2, [fp, #-48]
-	.loc 2 2503 0
+	beq	.L276
+	.loc 2 2548 0
+	ldrh	r10, [r8, r5, lsl #1]
+.LVL300:
+	lsl	fp, r5, #1
+	.loc 2 2549 0
+	cmp	r6, r10
+	bcs	.L281
+	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL294:
-	ldr	r2, [fp, #-48]
+.LVL301:
 	cmp	r6, r0
-	ldr	r3, [fp, #-52]
-.LVL295:
-	.loc 2 2504 0
-	strcc	r7, [r4, #2500]
-.L292:
-	.loc 2 2506 0
-	cmp	r8, r3
-	bls	.L287
-	.loc 2 2506 0 is_stmt 0 discriminator 1
-	add	r1, r3, #128
-	cmp	r10, r1
-	ble	.L287
-	.loc 2 2508 0 is_stmt 1
-	add	r1, r3, #256
-	cmp	r8, r1
-	bhi	.L293
-	.loc 2 2508 0 is_stmt 0 discriminator 1
-	ldr	r1, [r4, #2496]
-	add	r3, r3, #768
-.LVL296:
-	cmp	r3, r1
-	bcs	.L287
-.LVL297:
-.L293:
-	.loc 2 2510 0 is_stmt 1
-	str	r10, [sp, #8]
+	.loc 2 2552 0
+	it	cc
+	strcc	r1, [r4, #2544]
+.LVL302:
+.L281:
+	.loc 2 2554 0
+	cmp	r7, r10
+	bls	.L276
+	.loc 2 2554 0 is_stmt 0 discriminator 1
+	add	r3, r10, #128
+	cmp	r9, r3
+	ble	.L276
+	.loc 2 2556 0 is_stmt 1
+	add	r3, r10, #256
+	cmp	r7, r3
+	bhi	.L282
+	.loc 2 2556 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #2540]
+	add	r10, r10, #768
+.LVL303:
+	cmp	r10, r3
+	bcs	.L276
+.LVL304:
+.L282:
+	.loc 2 2558 0 is_stmt 1
+	str	r9, [sp, #8]
+	mov	r2, r7
+	ldrh	r3, [r8, fp]
 	mov	r1, r5
-	ldrh	r3, [r9, r2]
-.LVL298:
-	ldr	r0, .L300+8
+.LVL305:
+	ldr	r0, .L289+4
+.LVL306:
 	str	r3, [sp, #4]
-	ldr	r3, [r4, #2260]
-	ldrh	r3, [r3, r2]
-	mov	r2, r8
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, fp]
 	str	r3, [sp]
-	ldr	r3, [r4, #2496]
+	ldr	r3, [r4, #2540]
 	bl	printk
-.LVL299:
-	.loc 2 2511 0
-	mov	r3, #1
-	str	r3, [r4, #3140]
-	.loc 2 2512 0
-	b	.L286
-.LVL300:
-.L291:
-	.loc 2 2481 0
+.LVL307:
+	.loc 2 2559 0
+	movs	r3, #1
+	str	r3, [r4, #3136]
+	.loc 2 2560 0
+	b	.L275
+.LVL308:
+.L280:
+	.loc 2 2529 0
+	adds	r0, r0, #1
+.LVL309:
+	.loc 2 2530 0
+	ldr	r5, [sp, #20]
+	.loc 2 2529 0
+	uxth	r0, r0
+.LVL310:
+	.loc 2 2530 0
+	cmp	r0, r5
+	bhi	.L276
+	.loc 2 2532 0
 	ldrh	r5, [r3, #4]
-	cmp	r5, #0
-	beq	.L289
-	.loc 2 2483 0
-	sub	r3, r3, r0
-.LVL301:
-	asr	r3, r3, #1
-	mul	r3, ip, r3
+	cbz	r5, .L278
+	.loc 2 2533 0
+	ldr	r5, .L289+8
+	sub	r3, r3, lr
+.LVL311:
+	asrs	r3, r3, #1
+	muls	r3, r5, r3
 	uxth	r5, r3
-	.loc 2 2484 0
-	lsl	r3, r5, #1
-	ldrh	r3, [r9, r3]
+	.loc 2 2534 0
+	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r6, r3
-	bcs	.L290
-	.loc 2 2483 0
-	cmp	r7, r3
-	movhi	r7, r3
+	bcs	.L279
+	.loc 2 2538 0
+	cmp	r1, r3
+	itt	hi
+	movhi	r1, r3
+	.loc 2 2533 0
 	movhi	r2, r5
-.LVL302:
-.L289:
-	.loc 2 2495 0
-	mla	r3, lr, r1, r0
-	b	.L288
-.L301:
+.LVL312:
+.L278:
+	.loc 2 2543 0
+	mla	r3, fp, ip, lr
+	b	.L277
+.L290:
 	.align	2
-.L300:
+.L289:
 	.word	.LANCHOR0
-	.word	-1431655765
 	.word	.LC72
-.LFE236:
+	.word	-1431655765
+.LFE246:
 	.fnend
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.align	2
+	.align	1
 	.global	free_data_superblock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
 	.fnstart
-.LFB237:
-	.loc 2 2522 0
+.LFB247:
+	.loc 2 2570 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL303:
-	.movsp ip
-	mov	ip, sp
-.LCFI147:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI148:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI149:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2522 0
-	.loc 2 2523 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL313:
+	.loc 2 2571 0
 	movw	r2, #65535
+	.loc 2 2570 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI42:
+	.loc 2 2571 0
 	cmp	r0, r2
-	beq	.L303
-.LBB286:
-.LBB287:
-	.loc 2 2525 0
-	ldr	r2, .L304
-	lsl	r3, r0, #1
-	mov	r1, #0
-	ldr	r2, [r2, #2260]
-	strh	r1, [r2, r3]	@ movhi
-	.loc 2 2526 0
+	beq	.L292
+.LBB293:
+.LBB294:
+	.loc 2 2573 0
+	ldr	r2, .L293
+	movs	r1, #0
+	ldr	r2, [r2, #2300]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL304:
-.L303:
-.LBE287:
-.LBE286:
-	.loc 2 2528 0
-	mov	r0, #0
-.LVL305:
-	ldmfd	sp, {fp, sp, pc}
-.L305:
+.LVL314:
+.L292:
+.LBE294:
+.LBE293:
+	.loc 2 2576 0
+	movs	r0, #0
+.LVL315:
+	pop	{r3, pc}
+.L294:
 	.align	2
-.L304:
+.L293:
 	.word	.LANCHOR0
-.LFE237:
+.LFE247:
 	.fnend
 	.size	free_data_superblock, .-free_data_superblock
-	.align	2
+	.align	1
 	.global	get_new_active_ppa
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 	.fnstart
-.LFB240:
-	.loc 2 2655 0
+.LFB250:
+	.loc 2 2703 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL306:
-	.movsp ip
-	mov	ip, sp
-.LCFI150:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI151:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI152:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2655 0
-	.loc 2 2659 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL316:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI43:
+	.loc 2 2707 0
 	movw	r3, #65535
-	.loc 2 2655 0
-	mov	r4, r0
-	.loc 2 2659 0
 	ldrh	r2, [r0]
+	.loc 2 2703 0
+	mov	r4, r0
+	.loc 2 2707 0
 	cmp	r2, r3
-	bne	.L307
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	movw	r2, #2659
-	ldr	r1, .L320
-	ldr	r0, .L320+4
+	bne	.L296
+	.loc 2 2707 0 is_stmt 0 discriminator 1
+	movw	r2, #2707
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL307:
-.L307:
-	.loc 2 2660 0 is_stmt 1
-	ldr	r5, .L320+8
+.LVL317:
+.L296:
+	.loc 2 2708 0 is_stmt 1
+	ldr	r5, .L309+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #78]
 	cmp	r2, r3
-	bne	.L308
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	movw	r2, #2660
-	ldr	r1, .L320
-	ldr	r0, .L320+4
+	bne	.L297
+	.loc 2 2708 0 is_stmt 0 discriminator 1
+	movw	r2, #2708
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL308:
-.L308:
-	.loc 2 2661 0 is_stmt 1
+.LVL318:
+.L297:
+	.loc 2 2709 0 is_stmt 1
 	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L309
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	movw	r2, #2661
-	ldr	r1, .L320
-	ldr	r0, .L320+4
+	cbnz	r3, .L298
+	.loc 2 2709 0 is_stmt 0 discriminator 1
+	movw	r2, #2709
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL309:
-.L309:
-	.loc 2 2663 0 is_stmt 1
+.LVL319:
+.L298:
+	.loc 2 2711 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2662 0
-	mov	r3, #0
-	.loc 2 2666 0
+	.loc 2 2710 0
+	movs	r3, #0
+	.loc 2 2714 0
 	ldrh	r1, [r5, #8]
-	.loc 2 2664 0
-	movw	ip, #65535
-	.loc 2 2662 0
+	.loc 2 2712 0
+	movw	r6, #65535
+	.loc 2 2710 0
 	strb	r3, [r4, #10]
-	.loc 2 2663 0
-	add	r2, r4, r2, lsl #1
-	ldrh	r0, [r2, #16]
-.LVL310:
-	.loc 2 2668 0
+	.loc 2 2711 0
+	adds	r2, r2, #8
+	ldrh	r0, [r4, r2, lsl #1]
+.LVL320:
+	.loc 2 2716 0
 	mov	r2, r3
-.L310:
-	.loc 2 2664 0
-	cmp	r0, ip
+.L299:
+	.loc 2 2712 0
+	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L312
-	.loc 2 2673 0
+	beq	.L301
+	.loc 2 2721 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2672 0
+	.loc 2 2720 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2673 0
-	sub	r2, r2, #1
+	.loc 2 2721 0
+	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2672 0
+	.loc 2 2720 0
 	orr	r6, r6, r0, lsl #10
-	.loc 2 2680 0
+	.loc 2 2728 0
 	movw	r0, #65535
-.LVL311:
-	.loc 2 2673 0
+.LVL321:
+	.loc 2 2721 0
 	strh	r2, [r4, #4]	@ movhi
-.L314:
-	.loc 2 2675 0
-	add	r3, r3, #1
+.L303:
+	.loc 2 2723 0
+	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2676 0
+	.loc 2 2724 0
 	cmp	r1, r3
-	.loc 2 2677 0
+	.loc 2 2725 0
+	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2678 0
+	.loc 2 2726 0
 	moveq	r3, #0
-	.loc 2 2680 0
-	add	ip, r4, r3, lsl #1
-	ldrh	ip, [ip, #16]
-	cmp	ip, r0
-	beq	.L314
+	.loc 2 2728 0
+	add	r7, r3, #8
+	ldrh	r7, [r4, r7, lsl #1]
+	cmp	r7, r0
+	beq	.L303
 	strb	r3, [r4, #6]
-	.loc 2 2682 0
-	cmp	r2, #0
-	ldrh	r3, [r4, #2]
-	ldrh	r1, [r5, #78]
-	sub	r3, r3, r1
-	clz	r3, r3
-	lsr	r3, r3, #5
-	moveq	r3, #0
-	cmp	r3, #0
-	beq	.L306
-	.loc 2 2682 0 is_stmt 0 discriminator 2
-	movw	r2, #2682
-	ldr	r1, .L320
-	ldr	r0, .L320+4
+	.loc 2 2730 0
+	ldrh	r1, [r4, #2]
+	ldrh	r3, [r5, #78]
+	cmp	r1, r3
+	bne	.L295
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbz	r2, .L295
+	.loc 2 2730 0 discriminator 2
+	movw	r2, #2730
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL312:
-.L306:
-	.loc 2 2684 0 is_stmt 1
+.LVL322:
+.L295:
+	.loc 2 2732 0 is_stmt 1
 	mov	r0, r6
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL313:
-.L312:
-	.loc 2 2665 0
-	add	r3, r3, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL323:
+.L301:
+	.loc 2 2713 0
+	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2666 0
+	.loc 2 2714 0
 	cmp	r3, r1
-	.loc 2 2665 0
+	.loc 2 2713 0
 	strb	r3, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2715 0
+	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2668 0
+	.loc 2 2716 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2715 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2670 0
+	.loc 2 2718 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	add	r3, r4, r3, lsl #1
-	ldrh	r0, [r3, #16]
-	b	.L310
-.L321:
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	b	.L299
+.L310:
 	.align	2
-.L320:
-	.word	.LANCHOR1+137
+.L309:
+	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
-.LFE240:
+.LFE250:
 	.fnend
 	.size	get_new_active_ppa, .-get_new_active_ppa
-	.align	2
+	.align	1
 	.global	FtlGcBufInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 	.fnstart
-.LFB243:
+.LFB253:
 	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
 	.loc 5 22 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI153:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI154:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI155:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 25 0
+	ldr	r3, .L320
+	.loc 5 30 0
+	mov	ip, #20
 	.loc 5 22 0
+	push	{r4, r5, r6, r7, r8, r9, lr}
+	.save {r4, r5, r6, r7, r8, r9, lr}
+.LCFI44:
 	.loc 5 27 0
-	mov	lr, #12
-	mov	r4, #1
+	mov	r9, #12
+	movs	r6, #1
 	.loc 5 25 0
-	ldr	r3, .L327
-	.loc 5 30 0
-	mov	r5, #20
+	movs	r2, #0
+	.loc 5 29 0
+	mov	r7, r3
 	.loc 5 25 0
-	mov	r2, #0
-	str	r2, [r3, #3144]
-.L323:
+	str	r2, [r3, #3140]
+.L312:
 	.loc 5 26 0 discriminator 1
 	ldrh	r1, [r3, #8]
 	uxth	r0, r2
-	add	ip, r2, #1
+	adds	r4, r2, #1
 	cmp	r0, r1
-	bcc	.L324
+	bcc	.L315
+	.loc 5 37 0 discriminator 1
+	ldr	r7, .L320
 	.loc 5 35 0 discriminator 1
 	mov	ip, #12
-	mov	lr, #0
-.L325:
+	movs	r6, #0
+.L316:
 	.loc 5 34 0 discriminator 1
-	ldr	r2, [r3, #3164]
+	ldr	r2, [r3, #3160]
 	cmp	r1, r2
-	bcc	.L326
+	bcc	.L319
 	.loc 5 39 0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L324:
+	pop	{r4, r5, r6, r7, r8, r9, pc}
+.L315:
 	uxth	r2, r2
 	.loc 5 27 0 discriminator 3
-	ldr	r6, [r3, #3148]
-	mul	r0, lr, r2
-	add	r1, r6, r0
-	str	r4, [r1, #8]
+	ldr	r8, [r3, #3144]
+	mul	lr, r9, r2
+	add	r1, r8, lr
+	str	r6, [r1, #8]
 	.loc 5 28 0 discriminator 3
 	ldrh	r1, [r3, #86]
-	mul	r1, r2, r1
-	add	r7, r1, #3
-	cmp	r1, #0
-	movlt	r1, r7
-	ldr	r7, [r3, #3152]
-	bic	r1, r1, #3
-	add	r1, r7, r1
-	str	r1, [r6, r0]
+	muls	r1, r2, r1
+	it	mi
+	addmi	r1, r1, #3
+	bic	r0, r1, #3
+	ldr	r1, [r3, #3148]
+	add	r1, r1, r0
+	str	r1, [r8, lr]
 	.loc 5 29 0 discriminator 3
+	ldr	r5, [r7, #3152]
+	ldr	r0, [r3, #3144]
 	ldrh	r1, [r3, #88]
-	ldr	r7, [r3, #3148]
-	mul	r1, r2, r1
-	add	r6, r7, r0
-	add	r8, r1, #3
-	cmp	r1, #0
-	movlt	r1, r8
-	ldr	r8, [r3, #3156]
+	muls	r1, r2, r1
+	it	mi
+	addmi	r1, r1, #3
 	bic	r1, r1, #3
-	add	r1, r8, r1
-	str	r1, [r6, #4]
+	add	r8, r0, lr
+	add	r1, r1, r5
+	str	r1, [r8, #4]
 	.loc 5 30 0 discriminator 3
-	ldr	r1, [r3, #3160]
-	mla	r2, r5, r2, r1
-	ldr	r1, [r7, r0]
+	ldr	r1, [r3, #3156]
+	mla	r2, ip, r2, r1
+	ldr	r1, [r0, lr]
 	str	r1, [r2, #8]
 	.loc 5 31 0 discriminator 3
-	ldr	r1, [r6, #4]
+	ldr	r1, [r8, #4]
 	str	r1, [r2, #12]
-	mov	r2, ip
-	b	.L323
-.L326:
+	mov	r2, r4
+	b	.L312
+.L319:
 	.loc 5 35 0 discriminator 3
-	mul	r4, ip, r1
+	mul	r0, ip, r1
+	ldr	r4, [r3, #3144]
+	.loc 5 36 0 discriminator 3
 	ldr	r5, [r3, #3148]
-	add	r2, r5, r4
-	str	lr, [r2, #8]
+	.loc 5 35 0 discriminator 3
+	adds	r2, r4, r0
+	str	r6, [r2, #8]
 	.loc 5 36 0 discriminator 3
 	ldrh	r2, [r3, #86]
-	mul	r2, r1, r2
-	add	r0, r2, #3
-	cmp	r2, #0
-	movlt	r2, r0
-	ldr	r0, [r3, #3152]
+	muls	r2, r1, r2
+	it	mi
+	addmi	r2, r2, #3
 	bic	r2, r2, #3
-	add	r2, r0, r2
-	str	r2, [r5, r4]
+	add	r2, r2, r5
+	str	r2, [r4, r0]
 	.loc 5 37 0 discriminator 3
+	ldr	r2, [r3, #3144]
+	ldr	r4, [r7, #3152]
+	add	r0, r0, r2
 	ldrh	r2, [r3, #88]
-	ldr	r0, [r3, #3148]
-	mul	r2, r1, r2
-	add	r0, r0, r4
+	muls	r2, r1, r2
+	it	mi
+	addmi	r2, r2, #3
+	bic	r2, r2, #3
+	.loc 5 34 0 discriminator 3
+	adds	r1, r1, #1
+	.loc 5 37 0 discriminator 3
+	add	r2, r2, r4
 	.loc 5 34 0 discriminator 3
-	add	r1, r1, #1
 	uxth	r1, r1
 	.loc 5 37 0 discriminator 3
-	add	r4, r2, #3
-	cmp	r2, #0
-	movlt	r2, r4
-	ldr	r4, [r3, #3156]
-	bic	r2, r2, #3
-	add	r2, r4, r2
 	str	r2, [r0, #4]
-	b	.L325
-.L328:
+	b	.L316
+.L321:
 	.align	2
-.L327:
+.L320:
 	.word	.LANCHOR0
-.LFE243:
+.LFE253:
 	.fnend
 	.size	FtlGcBufInit, .-FtlGcBufInit
-	.align	2
+	.align	1
 	.global	FtlGcBufFree
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
 	.fnstart
-.LFB244:
+.LFB254:
 	.loc 5 42 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL314:
-	.movsp ip
-	mov	ip, sp
-.LCFI156:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI157:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI158:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL324:
+	.loc 5 47 0
+	ldr	r3, .L329
 	.loc 5 42 0
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI45:
 	.loc 5 46 0
-	mov	lr, #0
+	movs	r5, #0
 	.loc 5 48 0
-	mov	r5, #20
-	.loc 5 47 0
-	ldr	r3, .L336
-	.loc 5 48 0
-	mov	r7, #12
+	mov	r10, #20
+	mov	lr, #12
 	.loc 5 49 0
-	mov	r8, lr
+	mov	r8, r5
 	.loc 5 47 0
-	ldr	r6, [r3, #3164]
+	ldr	ip, [r3, #3160]
 	.loc 5 48 0
-	ldr	r4, [r3, #3148]
-.L330:
-	uxth	r3, lr
+	ldr	r6, [r3, #3144]
+.L323:
+	uxth	r3, r5
 	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
-	ldmfdls	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+	bls	.L322
 	.loc 5 48 0
-	mla	ip, r5, r3, r0
-	mov	r2, #0
-.L331:
+	mla	r4, r10, r3, r0
+	movs	r2, #0
+.L324:
 	uxth	r3, r2
 	.loc 5 47 0 discriminator 1
-	cmp	r6, r3
-	bls	.L332
+	cmp	ip, r3
+	bls	.L325
 	.loc 5 48 0
-	mul	r3, r7, r3
-	add	r2, r2, #1
-	ldr	r10, [r4, r3]
-	add	r9, r4, r3
-	ldr	r3, [ip, #8]
-	cmp	r10, r3
-	bne	.L331
+	mul	r3, lr, r3
+	ldr	r7, [r4, #8]
+	adds	r2, r2, #1
+	add	r9, r6, r3
+	ldr	r3, [r6, r3]
+	cmp	r3, r7
+	bne	.L324
 	.loc 5 49 0
 	str	r8, [r9, #8]
-.L332:
-	add	lr, lr, #1
-	b	.L330
-.L337:
-	.align	2
-.L336:
+.L325:
+	adds	r5, r5, #1
+	b	.L323
+.L322:
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.L330:
+	.align	2
+.L329:
 	.word	.LANCHOR0
-.LFE244:
+.LFE254:
 	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
-	.align	2
+	.align	1
 	.global	FtlGcBufAlloc
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
 	.fnstart
-.LFB245:
+.LFB255:
 	.loc 5 57 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL315:
-	.movsp ip
-	mov	ip, sp
-.LCFI159:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI160:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI161:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL325:
+	.loc 5 62 0
+	ldr	r3, .L338
+	.loc 5 63 0
+	mov	ip, #12
 	.loc 5 57 0
+	push	{r4, r5, r6, r7, r8, r9, lr}
+	.save {r4, r5, r6, r7, r8, r9, lr}
+.LCFI46:
 	.loc 5 61 0
-	mov	ip, #0
-	.loc 5 63 0
-	mov	r6, #12
-	.loc 5 62 0
-	ldr	r3, .L345
+	movs	r4, #0
 	.loc 5 64 0
-	mov	r7, #1
+	mov	lr, #1
 	.loc 5 65 0
 	mov	r8, #20
 	.loc 5 62 0
-	ldr	r4, [r3, #3164]
+	ldr	r5, [r3, #3160]
 	.loc 5 63 0
-	ldr	r5, [r3, #3148]
-.L339:
-	uxth	r2, ip
+	ldr	r6, [r3, #3144]
+.L332:
+	uxth	r2, r4
 	.loc 5 61 0 discriminator 1
 	cmp	r1, r2
-	bhi	.L343
+	bhi	.L336
 	.loc 5 71 0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L343:
-	mov	lr, #0
-.L340:
-	uxth	r3, lr
+	pop	{r4, r5, r6, r7, r8, r9, pc}
+.L336:
+	mov	r9, #0
+.L333:
+	uxth	r3, r9
 	.loc 5 62 0 discriminator 1
-	cmp	r4, r3
-	bls	.L341
+	cmp	r5, r3
+	bls	.L334
 	.loc 5 63 0
-	mla	r3, r6, r3, r5
-	add	lr, lr, #1
-	ldr	r9, [r3, #8]
-	cmp	r9, #0
-	bne	.L340
+	mla	r3, ip, r3, r6
+	add	r9, r9, #1
+	ldr	r7, [r3, #8]
+	cmp	r7, #0
+	bne	.L333
 	.loc 5 65 0
 	mla	r2, r8, r2, r0
-	ldr	lr, [r3]
+	ldr	r7, [r3]
 	.loc 5 64 0
-	str	r7, [r3, #8]
+	str	lr, [r3, #8]
 	.loc 5 65 0
-	str	lr, [r2, #8]
+	str	r7, [r2, #8]
 	.loc 5 66 0
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L341:
-	add	ip, ip, #1
-	b	.L339
-.L346:
+.L334:
+	adds	r4, r4, #1
+	b	.L332
+.L339:
 	.align	2
-.L345:
+.L338:
 	.word	.LANCHOR0
-.LFE245:
+.LFE255:
 	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.align	2
+	.align	1
 	.global	IsBlkInGcList
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
 	.fnstart
-.LFB246:
+.LFB256:
 	.loc 5 74 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL316:
-	.movsp ip
-	mov	ip, sp
-.LCFI162:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI163:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI164:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 74 0
-	.loc 5 77 0
-	movw	r1, #3172
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL326:
 	.loc 5 78 0
-	ldr	r2, .L352
-	ldr	r3, [r2, #3168]
-	ldrh	r2, [r2, r1]
+	ldr	r2, .L345
+	ldr	r3, [r2, #3164]
+	ldrh	r2, [r2, #3168]
 	add	r2, r3, r2, lsl #1
-.L348:
+.L341:
 	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
-	bne	.L350
+	bne	.L343
 	.loc 5 81 0
-	mov	r0, #0
-.LVL317:
-	ldmfd	sp, {fp, sp, pc}
-.LVL318:
-.L350:
+	movs	r0, #0
+.LVL327:
+	bx	lr
+.LVL328:
+.L343:
 	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L348
+	bne	.L341
 	.loc 5 79 0
-	mov	r0, #1
-.LVL319:
+	movs	r0, #1
+.LVL329:
 	.loc 5 82 0
-	ldmfd	sp, {fp, sp, pc}
-.L353:
+	bx	lr
+.L346:
 	.align	2
-.L352:
+.L345:
 	.word	.LANCHOR0
-.LFE246:
+.LFE256:
 	.fnend
 	.size	IsBlkInGcList, .-IsBlkInGcList
-	.align	2
+	.align	1
 	.global	FtlGcUpdatePage
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
 	.fnstart
-.LFB247:
+.LFB257:
 	.loc 5 85 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL320:
-	.movsp ip
-	mov	ip, sp
-.LCFI165:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI166:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI167:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL330:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI47:
 	.loc 5 85 0
-	mov	r4, r0
+	mov	r5, r0
 	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL321:
+.LVL331:
 	.loc 5 85 0
-	mov	r5, r1
-	mov	r6, r2
+	mov	r6, r1
+	mov	r7, r2
+	.loc 5 91 0
+	movs	r4, #0
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL322:
+.LVL332:
 	.loc 5 91 0
-	ldr	r3, .L358
-	movw	r2, #3172
-	mov	ip, #0
-	ldrh	lr, [r3, r2]
+	ldr	r3, .L351
+	ldrh	r1, [r3, #3168]
 	.loc 5 92 0
-	ldr	r2, [r3, #3168]
-	sub	r1, r2, #2
-.LVL323:
-.L355:
-	uxth	r7, ip
-.LVL324:
+	ldr	r2, [r3, #3164]
+.LVL333:
+.L348:
+	uxth	ip, r4
+.LVL334:
 	.loc 5 91 0 discriminator 1
-	cmp	r7, lr
-	bcc	.L357
+	cmp	ip, r1
+	bcc	.L350
 	.loc 5 96 0
-	bne	.L356
-	.loc 5 97 0
-	lsl	ip, r7, #1
-.LVL325:
-	.loc 5 98 0
-	movw	r1, #3172
+	bne	.L349
 	.loc 5 97 0
-	strh	r0, [r2, ip]	@ movhi
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+.LVL335:
 	.loc 5 98 0
-	ldrh	r2, [r3, r1]
-	add	r2, r2, #1
-	strh	r2, [r3, r1]	@ movhi
-	b	.L356
-.LVL326:
-.L357:
+	ldrh	r0, [r3, #3168]
+.LVL336:
+	adds	r0, r0, #1
+	strh	r0, [r3, #3168]	@ movhi
+	b	.L349
+.LVL337:
+.L350:
+	adds	r4, r4, #1
 	.loc 5 92 0
-	ldrh	r7, [r1, #2]!
-.LVL327:
-	add	ip, ip, #1
-	cmp	r7, r0
-	bne	.L355
-.LVL328:
-.L356:
+	add	ip, r2, r4, lsl #1
+.LVL338:
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L348
+.LVL339:
+.L349:
 	.loc 5 101 0
-	movw	ip, #3180
-	mov	r0, #12
-.LVL329:
-	ldrh	r2, [r3, ip]
-	mul	r0, r0, r2
-	ldr	r2, [r3, #3176]
-	add	r1, r2, r0
+	ldrh	r2, [r3, #3176]
+	movs	r0, #12
+.LVL340:
+	muls	r0, r2, r0
+	ldr	r2, [r3, #3172]
+	adds	r1, r2, r0
+	str	r6, [r1, #4]
 	.loc 5 102 0
-	stmib	r1, {r5, r6}
-.LVL330:
+	str	r7, [r1, #8]
 	.loc 5 103 0
-	str	r4, [r2, r0]
+	str	r5, [r2, r0]
 	.loc 5 107 0
-	ldrh	r2, [r3, ip]
-	add	r2, r2, #1
-	strh	r2, [r3, ip]	@ movhi
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L359:
+	ldrh	r2, [r3, #3176]
+	adds	r2, r2, #1
+	strh	r2, [r3, #3176]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL341:
+.L352:
 	.align	2
-.L358:
+.L351:
 	.word	.LANCHOR0
-.LFE247:
+.LFE257:
 	.fnend
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.align	2
+	.align	1
 	.global	FtlGcRefreshBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
 	.fnstart
-.LFB254:
+.LFB264:
 	.loc 5 345 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL331:
-	.movsp ip
-	mov	ip, sp
-.LCFI168:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI169:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI170:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL342:
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI48:
+	.loc 5 347 0
+	mov	r1, r0
 	.loc 5 345 0
 	mov	r4, r0
 	.loc 5 347 0
-	mov	r1, r0
-	ldr	r0, .L363
-.LVL332:
+	ldr	r0, .L356
+.LVL343:
 	bl	printk
-.LVL333:
+.LVL344:
 	.loc 5 349 0
-	ldr	r3, .L363+4
-	movw	ip, #3182
-	ldrh	lr, [r3, ip]
-	cmp	r4, lr
-	beq	.L361
-	.loc 5 349 0 is_stmt 0 discriminator 1
-	add	r2, r3, #3184
-	ldrh	r0, [r2]
+	ldr	r3, .L356+4
+	ldrh	r0, [r3, #3178]
 	cmp	r4, r0
-	beq	.L361
+	beq	.L354
+	.loc 5 349 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r3, #3180]
+	cmp	r4, r1
+	beq	.L354
 	.loc 5 351 0 is_stmt 1
-	movw	r1, #65535
-	cmp	lr, r1
+	movw	r2, #65535
+	cmp	r0, r2
+	bne	.L355
 	.loc 5 352 0
-	strheq	r4, [r3, ip]	@ movhi
-	.loc 5 351 0
-	beq	.L361
+	strh	r4, [r3, #3178]	@ movhi
+.L354:
+	.loc 5 356 0
+	movs	r0, #0
+	pop	{r4, pc}
+.LVL345:
+.L355:
 	.loc 5 353 0
-	cmp	r0, r1
+	cmp	r1, r2
 	.loc 5 354 0
-	strheq	r4, [r2]	@ movhi
-.L361:
-	.loc 5 356 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L364:
+	it	eq
+	strheq	r4, [r3, #3180]	@ movhi
+	b	.L354
+.L357:
 	.align	2
-.L363:
+.L356:
 	.word	.LC73
 	.word	.LANCHOR0
-.LFE254:
+.LFE264:
 	.fnend
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.align	2
+	.align	1
 	.global	FtlGcMarkBadPhyBlk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
 	.fnstart
-.LFB255:
+.LFB265:
 	.loc 5 359 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL334:
-	.movsp ip
-	mov	ip, sp
-.LCFI171:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI172:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI173:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 359 0
-	.loc 5 364 0
-	movw	r6, #3186
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL346:
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI49:
 	.loc 5 359 0
 	mov	r5, r0
 	.loc 5 364 0
-	ldr	r4, .L369
+	ldr	r4, .L362
 	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL335:
+.LVL347:
 	.loc 5 364 0
 	mov	r2, r5
 	.loc 5 361 0
-	mov	r7, r0
+	mov	r6, r0
 	.loc 5 364 0
-	ldrh	r1, [r4, r6]
-	ldr	r0, .L369+4
+	ldrh	r1, [r4, #3182]
+	ldr	r0, .L362+4
 	bl	printk
-.LVL336:
+.LVL348:
 	.loc 5 366 0
-	mov	r0, r7
+	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL337:
+.LVL349:
 	.loc 5 368 0
-	ldrh	r3, [r4, r6]
-	mov	r2, #0
+	ldrh	r3, [r4, #3182]
+	movs	r2, #0
 	.loc 5 369 0
-	ldr	r0, .L369+8
-.L366:
+	add	r0, r4, #3184
+.L359:
 	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L368
+	bhi	.L361
 	.loc 5 372 0
 	cmp	r3, #15
 	.loc 5 373 0
-	movwls	r2, #3186
-	addls	r1, r3, #1
-	strhls	r1, [r4, r2]	@ movhi
-	lslls	r3, r3, #1
-	ldrls	r2, .L369+8
-	strhls	r5, [r2, r3]	@ movhi
-	b	.L367
-.L368:
-	add	r2, r2, #1
+	itttt	ls
+	addls	r2, r3, #1
+	strhls	r2, [r4, #3182]	@ movhi
+	addls	r4, r4, r3, lsl #1
+	strhls	r5, [r4, #3184]	@ movhi
+	b	.L360
+.L361:
+	adds	r2, r2, #1
 	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L366
-.L367:
+	bne	.L359
+.L360:
 	.loc 5 375 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L370:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL350:
+.L363:
 	.align	2
-.L369:
+.L362:
 	.word	.LANCHOR0
 	.word	.LC74
-	.word	.LANCHOR0+3188
-.LFE255:
+.LFE265:
 	.fnend
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.align	2
+	.align	1
 	.global	FtlGcReFreshBadBlk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
 	.fnstart
-.LFB256:
+.LFB266:
 	.loc 5 379 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI174:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI175:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI176:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 379 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI50:
 	.loc 5 380 0
-	movw	r3, #3186
-	ldr	r4, .L377
-	ldrh	r2, [r4, r3]
-	cmp	r2, #0
-	beq	.L372
+	ldr	r4, .L370
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L365
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	movw	r3, #3182
-	ldrh	r1, [r4, r3]
-	movw	r3, #65535
-	cmp	r1, r3
-	bne	.L372
-	.loc 5 381 0 is_stmt 1
-	movw	r3, #3222
-.LBB290:
-.LBB291:
-	.loc 5 383 0
-	movw	r5, #3222
-.LBE291:
-.LBE290:
-	.loc 5 381 0
-	ldrh	r1, [r4, r3]
+	ldrh	r1, [r4, #3178]
+	movw	r2, #65535
 	cmp	r1, r2
+	bne	.L365
+	.loc 5 381 0 is_stmt 1
+	ldrh	r2, [r4, #3218]
+	cmp	r2, r3
 	.loc 5 382 0
-	movcs	r2, #0
-	strhcs	r2, [r4, r3]	@ movhi
-.LBB293:
-.LBB292:
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4, #3218]	@ movhi
+.LBB297:
+.LBB298:
 	.loc 5 383 0
-	ldrh	r3, [r4, r5]
-	ldr	r2, .L377+4
-	lsl	r3, r3, #1
-	ldrh	r0, [r2, r3]
+	ldrh	r3, [r4, #3218]
+	add	r3, r4, r3, lsl #1
+	ldrh	r0, [r3, #3184]
 	bl	P2V_block_in_plane
-.LVL338:
+.LVL351:
 	bl	FtlGcRefreshBlock
-.LVL339:
+.LVL352:
 	.loc 5 384 0
-	ldrh	r3, [r4, r5]
-	add	r3, r3, #1
-	strh	r3, [r4, r5]	@ movhi
-.L372:
-.LBE292:
-.LBE293:
+	ldrh	r3, [r4, #3218]
+	adds	r3, r3, #1
+	strh	r3, [r4, #3218]	@ movhi
+.L365:
+.LBE298:
+.LBE297:
 	.loc 5 387 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L378:
+	movs	r0, #0
+	pop	{r4, pc}
+.L371:
 	.align	2
-.L377:
+.L370:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3188
-.LFE256:
+.LFE266:
 	.fnend
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.align	2
+	.align	1
 	.global	FlashReadPages
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
 	.fnstart
-.LFB262:
+.LFB272:
 	.loc 1 44 0
 	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL340:
-	.movsp ip
-	mov	ip, sp
-.LCFI177:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI178:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI179:
-	.pad #20
-	sub	sp, sp, #20
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 44 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL353:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI51:
+	mov	r9, r1
 	.loc 1 46 0
-	ldr	r3, .L397
-	.loc 1 44 0
-	mov	r7, r1
-	.loc 1 51 0
-	ldr	r8, .L397+4
+	ldr	r5, .L390
 	mov	r4, r0
-	ldr	r9, .L397+8
 	.loc 1 50 0
-	mov	r5, #0
-.LVL341:
+	movs	r6, #0
+.LVL354:
+	.loc 1 44 0
+	.pad #20
+	sub	sp, sp, #20
+.LCFI52:
+	.loc 1 51 0
+	ldr	r10, .L390+4
 	.loc 1 46 0
-	ldrh	r10, [r3, #12]
-.LVL342:
-	str	r3, [fp, #-56]
-.LVL343:
-.L380:
+	ldrh	r7, [r5, #12]
+.LVL355:
+	.loc 1 51 0
+	ldr	fp, .L390+8
+	.loc 1 53 0
+	ldr	r8, .L390+12
+	str	r5, [sp, #4]
+.LVL356:
+.L373:
 	.loc 1 50 0 discriminator 1
-	cmp	r5, r7
-	bne	.L387
+	cmp	r6, r9
+	bne	.L380
 	.loc 1 71 0
-	mov	r0, #0
-.LVL344:
-	sub	sp, fp, #40
-.LCFI180:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL345:
-.L387:
-.LCFI181:
+	movs	r0, #0
+.LVL357:
+	add	sp, sp, #20
+.LCFI53:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL358:
+.L380:
+.LCFI54:
 	.loc 1 51 0
 	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L381
+	cbz	r3, .L374
 	.loc 1 51 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cmp	r3, #0
-	bne	.L382
-.L381:
+	cbnz	r3, .L375
+.L374:
 	.loc 1 51 0 discriminator 3
-	mov	r2, #51
-.LVL346:
-	mov	r1, r8
-	mov	r0, r9
-.LVL347:
+	movs	r2, #51
+.LVL359:
+	mov	r1, r10
+	mov	r0, fp
+.LVL360:
 	bl	printk
-.LVL348:
-.L382:
-	.loc 1 53 0 is_stmt 1
-	ldr	r6, .L397+12
-	.loc 1 52 0
-	sub	r2, fp, #52
-.LVL349:
-	sub	r1, fp, #48
+.LVL361:
+.L375:
+	.loc 1 52 0 is_stmt 1
+	add	r2, sp, #8
+.LVL362:
+	add	r1, sp, #12
 	mov	r0, r4
-.LVL350:
+.LVL363:
 	bl	l2p_addr_tran
-.LVL351:
+.LVL364:
 	.loc 1 53 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [fp, #-48]
-	ldrb	r0, [fp, #-52]	@ zero_extendqisi2
-	ldr	ip, [r6, #12]
-	blx	ip
-.LVL352:
+	ldr	r1, [sp, #12]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	ldr	r5, [r8, #12]
+	blx	r5
+.LVL365:
 	.loc 1 58 0
-	ldr	r3, [fp, #-56]
+	ldr	r3, [sp, #4]
 	.loc 1 57 0
 	str	r0, [r4]
 	.loc 1 58 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L384
+	bne	.L377
 	.loc 1 59 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [fp, #-48]
-	ldr	r6, [r6, #12]
-	add	r3, r3, #8
+	ldr	r1, [sp, #12]
+	adds	r3, r3, #8
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	ldrb	r0, [fp, #-52]	@ zero_extendqisi2
-	add	r1, r10, r1
-	blx	r6
-.LVL353:
+	ldr	r5, [r8, #12]
+	add	r1, r1, r7
+	blx	r5
+.LVL366:
 	.loc 1 63 0
-	cmn	r0, #1
-	beq	.L385
+	adds	r0, r0, #1
+	beq	.L378
 	.loc 1 64 0 discriminator 1
 	ldr	r3, [r4, #12]
 	.loc 1 63 0 discriminator 1
 	ldr	r2, [r3, #12]
-	cmn	r2, #1
-	bne	.L384
+	adds	r2, r2, #1
+	bne	.L377
 	.loc 1 64 0
 	ldr	r2, [r3, #8]
-	cmn	r2, #1
-	bne	.L384
+	adds	r2, r2, #1
+	bne	.L377
 	.loc 1 65 0
 	ldr	r3, [r3]
-	cmn	r3, #1
-	beq	.L384
-.L385:
+	adds	r3, r3, #1
+	beq	.L377
+.L378:
 	.loc 1 67 0
-	mvn	r3, #0
+	mov	r3, #-1
 	str	r3, [r4]
-.L384:
+.L377:
 	.loc 1 50 0 discriminator 2
-	add	r5, r5, #1
-	add	r4, r4, #20
-	b	.L380
-.L398:
+	adds	r6, r6, #1
+	adds	r4, r4, #20
+	b	.L373
+.L391:
 	.align	2
-.L397:
+.L390:
 	.word	g_nand_phy_info
-	.word	.LANCHOR1+156
+	.word	.LANCHOR1+130
 	.word	.LC1
 	.word	g_nand_ops
-.LFE262:
+.LFE272:
 	.fnend
 	.size	FlashReadPages, .-FlashReadPages
-	.align	2
+	.align	1
 	.global	FtlLoadFactoryBbt
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	.fnstart
-.LFB170:
+.LFB180:
 	.loc 4 279 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI182:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI183:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI184:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 279 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI55:
 	.loc 4 289 0
-	mov	r6, #0
-.LVL354:
-	.loc 4 290 0
-	mvn	r9, #0
+	movs	r6, #0
+.LVL367:
 	.loc 4 286 0
-	ldr	r4, .L409
-	.loc 4 294 0
-	ldr	r10, .L409+4
+	ldr	r4, .L402
+	.loc 4 301 0
+	movw	r10, #61664
 	.loc 4 286 0
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	add	r7, r4, #138
 	.loc 4 287 0
 	ldr	r8, [r4, #3244]
+	.loc 4 294 0
+	addw	r9, r4, #3220
 	.loc 4 286 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 287 0
-	str	r8, [r4, #3236]
-.LVL355:
-.L400:
+	str	r8, [r4, #3232]
+.LVL368:
+.L393:
 	.loc 4 289 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r6, r3
-	bcc	.L405
+	bcc	.L398
 	.loc 4 314 0
-	mov	r0, #0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L405:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL369:
+.L398:
 	.loc 4 291 0
 	ldrh	r5, [r4, #74]
-.LVL356:
+.LVL370:
 	.loc 4 290 0
-	strh	r9, [r7, #2]!	@ movhi
-.LVL357:
-.L402:
+	movw	r3, #65535
+	strh	r3, [r7, #2]!	@ movhi
+.LVL371:
+.L395:
 	.loc 4 291 0 discriminator 2
 	ldrh	r3, [r4, #74]
-	sub	r5, r5, #1
-.LVL358:
+	subs	r5, r5, #1
+.LVL372:
 	uxth	r5, r5
-.LVL359:
+.LVL373:
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L403
+	ble	.L396
 	.loc 4 292 0
 	mla	r3, r6, r3, r5
 	.loc 4 294 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r10
+	mov	r0, r9
 	.loc 4 292 0
-	lsl	r3, r3, #10
-.LVL360:
+	lsls	r3, r3, #10
+.LVL374:
 	.loc 4 293 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL361:
+.LVL375:
 	.loc 4 295 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	beq	.L402
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	beq	.L395
 	.loc 4 301 0
-	ldrh	r2, [r8]
-	movw	r3, #61664
-	cmp	r2, r3
-	bne	.L402
+	ldrh	r3, [r8]
+	cmp	r3, r10
+	bne	.L395
 	.loc 4 303 0
 	strh	r5, [r7]	@ movhi
-.L403:
+.L396:
 	.loc 4 289 0 discriminator 2
-	add	r6, r6, #1
-	b	.L400
-.L410:
+	adds	r6, r6, #1
+	b	.L393
+.L403:
 	.align	2
-.L409:
+.L402:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
-.LFE170:
+.LFE180:
 	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.align	2
+	.align	1
 	.global	FtlGetLastWrittenPage
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
 	.fnstart
-.LFB176:
+.LFB186:
 	.loc 2 47 0
 	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL362:
-	.movsp ip
-	mov	ip, sp
-.LCFI185:
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, fp, ip, lr}
-.LCFI186:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI187:
-	.pad #92
-	sub	sp, sp, #92
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 47 0
-	ldr	r3, .L419
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL376:
+	ldr	r3, .L412
 	.loc 2 51 0
 	cmp	r1, #1
+	.loc 2 47 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI56:
 	.loc 2 57 0
 	lsl	r7, r0, #10
+	.loc 2 47 0
+	.pad #88
+	sub	sp, sp, #88
+.LCFI57:
 	.loc 2 58 0
 	mov	r2, r1
 	.loc 2 47 0
 	mov	r6, r1
 	.loc 2 51 0
-	ldrheq	r5, [r3, #80]
+	it	eq
+	ldrheq	r4, [r3, #80]
 	.loc 2 58 0
 	mov	r1, #1
-.LVL363:
+.LVL377:
 	.loc 2 51 0
-	ldrhne	r5, [r3, #78]
+	it	ne
+	ldrhne	r4, [r3, #78]
 	.loc 2 58 0
-	sub	r0, fp, #120
-.LVL364:
+	add	r0, sp, #4
+.LVL378:
 	.loc 2 53 0
-	ldr	r3, .L419+4
+	ldr	r3, .L412+4
 	.loc 2 56 0
-	sub	r5, r5, #1
-	sxth	r5, r5
-.LVL365:
+	subs	r4, r4, #1
+	sxth	r5, r4
+.LVL379:
 	.loc 2 53 0
-	str	r3, [fp, #-112]
+	str	r3, [sp, #12]
 	.loc 2 54 0
-	sub	r3, fp, #100
-	str	r3, [fp, #-108]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
 	.loc 2 57 0
 	orr	r3, r5, r7
-	str	r3, [fp, #-116]
+	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL366:
+.LVL380:
 	.loc 2 59 0
-	ldr	r3, [fp, #-100]
-	cmn	r3, #1
-	moveq	r8, #0
-.LVL367:
-	beq	.L415
-.L414:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L407
+	mov	r8, #0
+.LVL381:
+.L408:
+	.loc 2 60 0
+	cmp	r8, r5
+	ble	.L411
+.L407:
 	.loc 2 73 0
 	mov	r0, r5
-	sub	sp, fp, #32
-.LCFI188:
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL368:
-.L418:
-.LCFI189:
+	add	sp, sp, #88
+.LCFI58:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL382:
+.L411:
+.LCFI59:
 	.loc 2 61 0
-	add	r3, r8, r5
+	add	r4, r8, r5
 	.loc 2 63 0
 	mov	r2, r6
 	.loc 2 61 0
-	add	r3, r3, r3, lsr #31
+	add	r4, r4, r4, lsr #31
 	.loc 2 63 0
-	mov	r1, #1
-	sub	r0, fp, #120
+	movs	r1, #1
+	add	r0, sp, #4
 	.loc 2 61 0
-	asr	r4, r3, #1
+	asrs	r4, r4, #1
 	.loc 2 62 0
 	sxth	r3, r4
-	orr	r3, r3, r7
-	str	r3, [fp, #-116]
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL369:
+.LVL383:
 	.loc 2 65 0
-	ldr	r3, [fp, #-100]
-	cmn	r3, #1
-	bne	.L416
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L409
 	.loc 2 65 0 is_stmt 0 discriminator 1
-	ldr	r3, [fp, #-96]
-	cmn	r3, #1
-	.loc 2 66 0 is_stmt 1 discriminator 1
-	subeq	r4, r4, #1
-	sxtheq	r5, r4
-	.loc 2 65 0 discriminator 1
-	beq	.L415
-.L416:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	bne	.L409
+	.loc 2 66 0 is_stmt 1
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L408
+.L409:
 	.loc 2 68 0
-	add	r4, r4, #1
+	adds	r4, r4, #1
 	sxth	r8, r4
-.L415:
-	.loc 2 60 0
-	cmp	r8, r5
-	ble	.L418
-	b	.L414
-.L420:
+	b	.L408
+.L413:
 	.align	2
-.L419:
+.L412:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LFE176:
+.LFE186:
 	.fnend
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.align	2
+	.align	1
 	.global	FlashProgPages
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
 	.fnstart
-.LFB263:
+.LFB273:
 	.loc 1 74 0
 	@ args = 0, pretend = 0, frame = 40
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL370:
-	.movsp ip
-	mov	ip, sp
-.LCFI190:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI191:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI192:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL384:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI60:
 	.pad #44
 	sub	sp, sp, #44
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 74 0
-	mov	r8, r3
-	.loc 1 76 0
-	ldr	r3, .L451
-.LVL371:
+.LCFI61:
 	.loc 1 74 0
-	mov	r7, r2
-	mov	r9, r1
+	str	r3, [sp]
+	mov	fp, r1
+	mov	r9, r2
 	mov	r4, r0
+	.loc 1 76 0
+	ldr	r3, .L444
+.LVL385:
 	.loc 1 80 0
 	mov	r5, r0
-.LVL372:
-	.loc 1 76 0
-	ldrh	r2, [r3, #12]
-.LVL373:
+.LVL386:
+	.loc 1 83 0
+	ldr	r8, .L444+28
 	.loc 1 80 0
-	mov	r6, #0
-	str	r3, [fp, #-84]
+	movs	r6, #0
 	.loc 1 76 0
-	str	r2, [fp, #-80]
-.LVL374:
-.L422:
+	ldrh	r10, [r3, #12]
+.LVL387:
+	str	r3, [sp, #4]
+.LVL388:
+.L415:
 	.loc 1 80 0 discriminator 1
-	cmp	r6, r9
-	bne	.L430
+	cmp	r6, fp
+	bne	.L423
 	.loc 1 101 0
-	cmp	r8, #0
-	bne	.L437
-.L450:
+	ldr	r3, [sp]
+.LVL389:
+	cmp	r3, #0
+	bne	.L430
+.L443:
 	.loc 1 131 0
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI193:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL375:
-.L430:
-.LCFI194:
+	movs	r0, #0
+	add	sp, sp, #44
+.LCFI62:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL390:
+.L423:
+.LCFI63:
 	.loc 1 81 0
 	ldr	r3, [r5, #8]
-	cmp	r3, #0
-	beq	.L423
+	cbz	r3, .L416
 	.loc 1 81 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cmp	r3, #0
-	bne	.L424
-.L423:
+	cbnz	r3, .L417
+.L416:
 	.loc 1 81 0 discriminator 3
-	mov	r2, #81
-.LVL376:
-	ldr	r1, .L451+4
-	ldr	r0, .L451+8
+	movs	r2, #81
+	ldr	r1, .L444+4
+	ldr	r0, .L444+8
 	bl	printk
-.LVL377:
-.L424:
+.LVL391:
+.L417:
 	.loc 1 82 0 is_stmt 1
-	sub	r2, fp, #72
-.LVL378:
-	sub	r1, fp, #68
+	add	r2, sp, #12
+	add	r1, sp, #16
 	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL379:
+.LVL392:
 	.loc 1 83 0
-	ldr	r3, .L451+12
-	ldr	r2, [r5, #8]
-	ldr	r1, [fp, #-68]
-	ldr	r10, [r3, #8]
-	ldrb	r0, [fp, #-72]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
-	blx	r10
-.LVL380:
+	ldr	r2, [r5, #8]
+	ldr	r1, [sp, #16]
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+	ldr	r7, [r8, #8]
+	blx	r7
+.LVL393:
 	.loc 1 88 0
-	cmp	r0, #0
-	.loc 1 89 0
-	mvnne	r3, #0
+	cbnz	r0, .L418
 	.loc 1 87 0
-	streq	r0, [r5]
-	.loc 1 89 0
-	strne	r3, [r5]
+	str	r0, [r5]
+.L419:
 	.loc 1 91 0
-	ldr	r3, [fp, #-84]
+	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L428
+	bne	.L421
 	.loc 1 92 0
-	ldr	r1, .L451+12
-	ldr	r0, [fp, #-80]
-.LVL381:
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
-	ldr	r10, [r1, #8]
-	ldr	r1, [fp, #-68]
-	add	r3, r3, #8
+	ldr	r1, [sp, #16]
+	adds	r3, r3, #8
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	add	r1, r0, r1
-	ldrb	r0, [fp, #-72]	@ zero_extendqisi2
-.LVL382:
-	blx	r10
-.LVL383:
+	ldr	r7, [r8, #8]
+	add	r1, r1, r10
+	blx	r7
+.LVL394:
 	.loc 1 96 0
-	cmp	r0, #0
+	cbz	r0, .L421
 	.loc 1 97 0
-	mvnne	r3, #0
-	strne	r3, [r5]
-.L428:
+	mov	r3, #-1
+	str	r3, [r5]
+.L421:
 	.loc 1 80 0 discriminator 2
-	add	r6, r6, #1
-	add	r5, r5, #20
-	b	.L422
-.LVL384:
-.L435:
-.LBB294:
+	adds	r6, r6, #1
+	adds	r5, r5, #20
+	b	.L415
+.L418:
+	.loc 1 89 0
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L419
+.LVL395:
+.L428:
+.LBB299:
 	.loc 1 106 0
-	ldr	r9, .L451+16
-.LVL385:
-	mov	r3, #0
+	movs	r3, #0
+.LVL396:
+	.loc 1 112 0
+	mov	r2, r9
+	.loc 1 106 0
+	str	r3, [r7]
+	.loc 1 112 0
+	movs	r1, #1
 	.loc 1 107 0
 	str	r3, [r8, #3248]
 	.loc 1 112 0
-	mov	r2, r7
-.LVL386:
-	mov	r1, #1
-.LVL387:
-	sub	r0, fp, #64
-	.loc 1 106 0
-	str	r3, [r9]
+	add	r0, sp, #20
 	.loc 1 108 0
 	ldr	r3, [r4, #4]
 	.loc 1 109 0
-	str	r9, [fp, #-56]
+	str	r7, [sp, #28]
 	.loc 1 110 0
-	str	r10, [fp, #-52]
+	str	r10, [sp, #32]
 	.loc 1 108 0
-	str	r3, [fp, #-60]
+	str	r3, [sp, #24]
 	.loc 1 112 0
 	bl	FlashReadPages
-.LVL388:
+.LVL397:
 	.loc 1 113 0
-	ldr	r3, [fp, #-64]
-	cmn	r3, #1
-	bne	.L432
+	ldr	fp, [sp, #20]
+.LVL398:
+	cmp	fp, #-1
+	bne	.L425
 	.loc 1 114 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L451+20
-	str	r3, [fp, #-80]
+	ldr	r0, .L444+12
 	bl	printk
-.LVL389:
+.LVL399:
 	.loc 1 115 0
-	ldr	r3, [fp, #-80]
-	str	r3, [r4]
-.L432:
+	str	fp, [r4]
+.L425:
 	.loc 1 117 0
 	ldr	r3, [r4, #12]
-	cmp	r3, #0
-	beq	.L433
+	cbz	r3, .L426
 	.loc 1 118 0
 	ldr	r2, [r3]
 	ldr	r3, [r8, #3248]
 	cmp	r2, r3
-	beq	.L433
+	beq	.L426
 	.loc 1 119 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L451+24
+	ldr	r0, .L444+16
 	bl	printk
-.LVL390:
+.LVL400:
 	.loc 1 120 0
-	mvn	r3, #0
+	mov	r3, #-1
 	str	r3, [r4]
-.L433:
+.L426:
 	.loc 1 123 0
 	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L434
+	cbz	r3, .L427
 	.loc 1 124 0
 	ldr	r2, [r3]
-	ldr	r3, [r9]
+	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L434
+	beq	.L427
 	.loc 1 125 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L451+28
+	ldr	r0, .L444+20
 	bl	printk
-.LVL391:
+.LVL401:
 	.loc 1 126 0
-	mvn	r3, #0
+	mov	r3, #-1
 	str	r3, [r4]
-.L434:
-.LBE294:
+.L427:
+.LBE299:
 	.loc 1 103 0 discriminator 2
-	add	r5, r5, #1
-	add	r4, r4, #20
-.LVL392:
-.L431:
+	adds	r5, r5, #1
+	adds	r4, r4, #20
+.LVL402:
+.L424:
 	.loc 1 103 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
-	bne	.L435
-	b	.L450
-.LVL393:
-.L437:
-.LBB295:
+	bne	.L428
+	b	.L443
+.LVL403:
+.L430:
+.LBB300:
 	.loc 1 107 0 is_stmt 1
-	ldr	r8, .L451+32
-.LVL394:
-.LBE295:
-	mov	r5, #0
-.LBB296:
-	.loc 1 110 0
+	ldr	r8, .L444+32
+.LBE300:
+	movs	r5, #0
+.LBB301:
+	.loc 1 106 0
+	ldr	r7, .L444+24
+	.loc 1 110 0
 	add	r10, r8, #3248
-	b	.L431
-.L452:
+.LVL404:
+	b	.L424
+.L445:
 	.align	2
-.L451:
+.L444:
 	.word	g_nand_phy_info
-	.word	.LANCHOR1+171
+	.word	.LANCHOR1+145
 	.word	.LC1
-	.word	g_nand_ops
-	.word	check_buf
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
+	.word	check_buf
+	.word	g_nand_ops
 	.word	.LANCHOR0
-.LBE296:
-.LFE263:
+.LBE301:
+.LFE273:
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
-	.align	2
+	.align	1
 	.global	FlashEraseBlocks
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
 	.fnstart
-.LFB264:
+.LFB274:
 	.loc 1 134 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL395:
-	.movsp ip
-	mov	ip, sp
-.LCFI195:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI196:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI197:
-	.pad #8
-	sub	sp, sp, #8
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 134 0
-	.loc 1 137 0
-	ldr	r3, .L464
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL405:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
+	.save {r4, r5, r6, r7, r8, r9, lr}
+	.pad #12
+.LCFI64:
+.LVL406:
 	.loc 1 134 0
 	mov	r8, r2
-	.loc 1 142 0
-	ldr	r7, .L464+4
+	.loc 1 137 0
+	ldr	r5, .L457
+.LVL407:
 	mov	r4, r0
 	.loc 1 140 0
-	mov	r6, #0
-.LVL396:
+	movs	r6, #0
+.LVL408:
+	.loc 1 142 0
+	ldr	r7, .L457+4
 	.loc 1 137 0
-	ldrh	r9, [r3, #12]
-.LVL397:
-	mov	r5, r3
-.LVL398:
-.L454:
+	ldrh	r9, [r5, #12]
+.LVL409:
+.L447:
 	.loc 1 140 0 discriminator 1
 	cmp	r6, r8
-	bne	.L460
+	bne	.L453
 	.loc 1 153 0
-	mov	r0, #0
-.LVL399:
-	sub	sp, fp, #36
-.LCFI198:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL400:
-.L460:
-.LCFI199:
+	movs	r0, #0
+.LVL410:
+	add	sp, sp, #12
+.LCFI65:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, pc}
+.LVL411:
+.L453:
+.LCFI66:
 	.loc 1 141 0
-	sub	r2, fp, #44
-	sub	r1, fp, #40
-.LVL401:
+	add	r1, sp, #4
+	mov	r2, sp
 	mov	r0, r4
-.LVL402:
+.LVL412:
 	bl	l2p_addr_tran
-.LVL403:
+.LVL413:
 	.loc 1 142 0
 	ldr	r3, [r7, #4]
-	ldr	r1, [fp, #-40]
-	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL404:
+.LVL414:
 	.loc 1 144 0
-	cmp	r0, #0
-	.loc 1 145 0
-	mvnne	r3, #0
+	cbnz	r0, .L448
 	.loc 1 143 0
-	streq	r0, [r4]
-	.loc 1 145 0
-	strne	r3, [r4]
+	str	r0, [r4]
+.L449:
 	.loc 1 146 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L458
+	bne	.L451
 	.loc 1 147 0
-	ldr	r1, [fp, #-40]
+	ldr	r1, [sp, #4]
 	ldr	r3, [r7, #4]
-	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
-	add	r1, r9, r1
+	ldrb	r0, [sp]	@ zero_extendqisi2
+	add	r1, r1, r9
 	blx	r3
-.LVL405:
+.LVL415:
 	.loc 1 148 0
-	cmp	r0, #0
+	cbz	r0, .L451
 	.loc 1 149 0
-	mvnne	r3, #0
-	strne	r3, [r4]
-.L458:
+	mov	r3, #-1
+	str	r3, [r4]
+.L451:
 	.loc 1 140 0 discriminator 2
-	add	r6, r6, #1
-	add	r4, r4, #20
-	b	.L454
-.L465:
+	adds	r6, r6, #1
+	adds	r4, r4, #20
+	b	.L447
+.L448:
+	.loc 1 145 0
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L449
+.L458:
 	.align	2
-.L464:
+.L457:
 	.word	g_nand_phy_info
 	.word	g_nand_ops
-.LFE264:
+.LFE274:
 	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.align	2
+	.align	1
 	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
 	.fnstart
-.LFB180:
+.LFB190:
 	.loc 2 98 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL406:
-	.movsp ip
-	mov	ip, sp
-.LCFI200:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI201:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI202:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL416:
+	.loc 2 99 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
 	.loc 2 98 0
-	mov	r6, r0
-.LBB297:
-.LBB298:
-	.loc 2 94 0
-	ldr	r4, .L475
-.LBE298:
-.LBE297:
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI67:
+	.loc 2 98 0
+	mov	r5, r0
 	.loc 2 99 0
+	cmp	r3, r2
+	bhi	.L459
+.LBB310:
+.LBB311:
+	.loc 2 94 0
+	ldr	r4, .L468
+.LBE311:
+.LBE310:
+	.loc 2 101 0
 	ldrh	r3, [r4, #194]
 	cmp	r3, #1024
-	ldmfdeq	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LBB299:
-	.loc 2 101 0
-	cmp	r1, #0
-	beq	.L468
-.LBB300:
-	.loc 2 102 0
-	bl	P2V_block_in_plane
-.LVL407:
-	mov	r5, r0
+	beq	.L459
+.LBB312:
+.LBB313:
 	.loc 2 103 0
-	ldr	r0, [r4, #3760]
-	lsl	r3, r6, #10
+	cbz	r1, .L461
+.LBB314:
 	.loc 2 104 0
-	mov	r2, #1
+	bl	P2V_block_in_plane
+.LVL417:
+	mov	r6, r0
+	.loc 2 105 0
+	ldr	r0, [r4, #3760]
+	lsls	r3, r5, #10
+	.loc 2 106 0
+	movs	r2, #1
 	mov	r1, r2
-	.loc 2 103 0
-	str	r3, [r0, #4]
-	.loc 2 104 0
-	bl	FlashEraseBlocks
-.LVL408:
 	.loc 2 105 0
-	ldr	r2, [r4, #2248]
-	lsl	r0, r5, #1
-	ldrh	r3, [r2, r0]
-	add	r3, r3, #1
-	strh	r3, [r2, r0]	@ movhi
+	str	r3, [r0, #4]
 	.loc 2 106 0
-	ldr	r3, [r4, #2492]
-	add	r3, r3, #1
-	str	r3, [r4, #2492]
-.LVL409:
-.L468:
-.LBE300:
+	bl	FlashEraseBlocks
+.LVL418:
+	.loc 2 107 0
+	ldr	r2, [r4, #2304]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
 	.loc 2 108 0
+	ldr	r3, [r4, #2536]
+	adds	r3, r3, #1
+	str	r3, [r4, #2536]
+.LVL419:
+.L461:
+.LBE314:
+	.loc 2 110 0
 	ldrh	r3, [r4, #194]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	strh	r3, [r4, #194]	@ movhi
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	r3, [r4, #192]
 	add	r2, r4, r3, lsl #1
-	.loc 2 110 0
-	add	r3, r3, #1
+	.loc 2 112 0
+	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 109 0
-	strh	r6, [r2, #196]	@ movhi
-	.loc 2 110 0
+	.loc 2 111 0
+	strh	r5, [r2, #196]	@ movhi
+	.loc 2 112 0
 	strh	r3, [r4, #192]	@ movhi
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L476:
+.L459:
+	pop	{r4, r5, r6, pc}
+.LVL420:
+.L469:
 	.align	2
-.L475:
+.L468:
 	.word	.LANCHOR0
-.LBE299:
-.LFE180:
+.LBE313:
+.LBE312:
+.LFE190:
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.align	2
+	.align	1
 	.global	FtlLowFormatEraseBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
 	.fnstart
-.LFB149:
-	.loc 3 528 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL410:
-	.movsp ip
-	mov	ip, sp
-.LCFI203:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI204:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI205:
-	.pad #28
-	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
+.LFB159:
 	.loc 3 528 0
-	.loc 3 538 0
-	ldr	r3, .L519
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL421:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI68:
 	.loc 3 539 0
 	mov	r10, #0
+	.loc 3 538 0
+	ldr	r4, .L515
 	.loc 3 528 0
-	mov	r6, r1
+	mov	r7, r1
 	.loc 3 536 0
-	mov	r5, r10
+	mov	r6, r10
 	.loc 3 537 0
-	mov	r4, r10
-.LVL411:
+	mov	r5, r10
+.LVL422:
 	.loc 3 540 0
 	mov	r9, #20
-	mov	r8, r3
 	.loc 3 528 0
-	str	r0, [fp, #-52]
+	.pad #20
+	sub	sp, sp, #20
+.LCFI69:
+	.loc 3 551 0
+	mov	fp, r4
+	.loc 3 528 0
+	str	r0, [sp]
 	.loc 3 538 0
-	str	r0, [r3, #3764]
-.L478:
+	str	r0, [r4, #3764]
+.L471:
 	.loc 3 539 0 discriminator 1
-	ldrh	r0, [r8, #8]
-.LVL412:
-	uxth	r1, r10
-	cmp	r0, r1
-	bhi	.L482
+	ldrh	r1, [r4, #8]
+	uxth	r3, r10
+	cmp	r1, r3
+	bhi	.L476
 	.loc 3 559 0
-	cmp	r5, #0
-	beq	.L477
+	cmp	r6, #0
+	beq	.L470
 	.loc 3 563 0
-	mov	r7, #0
+	mov	r8, #0
 	.loc 3 564 0
 	mov	r9, #20
 	.loc 3 562 0
-	mov	r2, r5
-	mov	r1, #0
-	ldr	r0, [r8, #3760]
+	mov	r2, r6
+	movs	r1, #0
+	ldr	r0, [r4, #3760]
+.LVL423:
 	bl	FlashEraseBlocks
-.LVL413:
-.L485:
+.LVL424:
+.L479:
 	.loc 3 563 0 discriminator 1
-	uxth	r2, r7
-	cmp	r5, r2
-	bhi	.L487
-.L488:
+	uxth	r3, r8
+	cmp	r6, r3
+	bhi	.L481
 	.loc 3 571 0
-	cmp	r6, #0
-	.loc 3 578 0
-	ldr	r7, .L519
+	cmp	r7, #0
+	beq	.L498
 	.loc 3 573 0
-	ldrhne	r3, [r8, #80]
-.LVL414:
-	.loc 3 533 0
-	moveq	r3, #6
-.LVL415:
-	streq	r3, [fp, #-64]
-	.loc 3 531 0
-	moveq	r3, #1
-.LVL416:
-	mov	r10, r7
-	streq	r3, [fp, #-56]
+	ldrh	r3, [r4, #80]
+.LVL425:
+	.loc 3 572 0
+	mov	r10, #1
+.LVL426:
 	.loc 3 573 0
-	strne	r3, [fp, #-56]
-	.loc 3 574 0
-	lsrne	r3, r3, #2
-.LVL417:
-	.loc 3 534 0
-	streq	r6, [fp, #-60]
+	str	r3, [sp, #4]
 	.loc 3 574 0
-	strne	r3, [fp, #-64]
-	.loc 3 572 0
-	movne	r3, #1
-.LVL418:
-	strne	r3, [fp, #-60]
-	mov	r3, #0
-.LVL419:
-	str	r3, [fp, #-48]
-.LVL420:
-.L497:
-	.loc 3 578 0
+	lsrs	r3, r3, #2
+.LVL427:
+	str	r3, [sp, #8]
+.LVL428:
+.L482:
 	mov	r8, #0
+.LVL429:
+	.loc 3 579 0
+	mov	fp, #20
+.L492:
+	.loc 3 578 0
+	mov	r9, #0
 	.loc 3 577 0
-	mov	r5, r8
-.L489:
+	mov	r6, r9
+.L483:
 	.loc 3 578 0 discriminator 1
-	ldrh	r1, [r7, #8]
-	uxth	r3, r8
-.LVL421:
+	ldrh	r1, [r4, #8]
+	uxth	r3, r9
+.LVL430:
 	cmp	r1, r3
-	bhi	.L492
+	bhi	.L487
 	.loc 3 593 0
-	cmp	r5, #0
-	beq	.L477
-	.loc 3 596 0
-	ldr	r2, [fp, #-60]
-.LVL422:
-	mov	r3, #1
-	mov	r1, r5
-	ldr	r0, [r7, #3760]
-	bl	FlashProgPages
-.LVL423:
+	cbz	r6, .L470
 	.loc 3 597 0
 	mov	r9, #0
-	.loc 3 598 0
-	mov	r2, #20
-.L494:
+	.loc 3 596 0
+	movs	r3, #1
+	mov	r2, r10
+	mov	r1, r6
+	ldr	r0, [r4, #3760]
+	bl	FlashProgPages
+.LVL431:
+.L489:
 	.loc 3 597 0 discriminator 1
 	uxth	r3, r9
-	cmp	r5, r3
-	bhi	.L496
+	cmp	r6, r3
+	bhi	.L491
 	.loc 3 604 0
-	ldr	r3, [fp, #-48]
-.LVL424:
-	ldr	r2, [fp, #-64]
-.LVL425:
-	add	r3, r3, r2
-.LVL426:
-	uxth	r3, r3
-.LVL427:
-	str	r3, [fp, #-48]
+	ldr	r3, [sp, #8]
+.LVL432:
+	add	r8, r8, r3
+.LVL433:
 	.loc 3 605 0
-	ldr	r2, [fp, #-48]
-.LVL428:
-	ldr	r3, [fp, #-56]
-.LVL429:
-	cmp	r3, r2
-	bhi	.L497
-	mov	r7, #0
+	ldr	r3, [sp, #4]
+.LVL434:
+	.loc 3 604 0
+	uxth	r8, r8
+.LVL435:
+	.loc 3 605 0
+	cmp	r3, r8
+	bhi	.L492
+	mov	r8, #0
+.LVL436:
 	.loc 3 611 0 discriminator 1
 	mov	r9, #20
-.L498:
+.L493:
 	.loc 3 610 0 discriminator 1
-	uxth	r3, r7
-.LVL430:
-	cmp	r5, r3
-	bhi	.L500
+	uxth	r3, r8
+.LVL437:
+	cmp	r6, r3
+	bhi	.L495
 	.loc 3 615 0
-	ldr	r3, [fp, #-52]
-.LVL431:
-	adds	r6, r6, #0
-.LVL432:
-	movne	r6, #1
+	ldr	r3, [sp]
+.LVL438:
 	cmp	r3, #63
-	movhi	r8, r6
-	orrls	r8, r6, #1
-	cmp	r8, #0
-	beq	.L477
-	.loc 3 616 0
-	mov	r2, r5
-.LVL433:
-	ldr	r1, [fp, #-60]
-	ldr	r0, [r10, #3760]
+	bls	.L496
+	.loc 3 615 0 is_stmt 0 discriminator 1
+	cbz	r7, .L470
+.L496:
+	.loc 3 616 0 is_stmt 1
+	mov	r2, r6
+	mov	r1, r10
+	ldr	r0, [r4, #3760]
 	bl	FlashEraseBlocks
-.LVL434:
-.L477:
+.LVL439:
+.L470:
 	.loc 3 619 0
-	mov	r0, r4
-	sub	sp, fp, #40
-.LCFI206:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL435:
-.L482:
-.LCFI207:
+	mov	r0, r5
+.LVL440:
+	add	sp, sp, #20
+.LCFI70:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL441:
+.L476:
+.LCFI71:
 	.loc 3 540 0
-	uxth	r1, r10
-	ldr	ip, [r8, #3760]
-	mov	r3, #0
-	mul	r0, r9, r1
-	str	r3, [ip, r0]
+	uxth	r3, r10
+	ldr	r0, [r4, #3760]
+.LVL442:
+	movs	r2, #0
+	mul	r1, r9, r3
 	.loc 3 541 0
-	add	r0, r8, r1
-	ldrb	r0, [r0, #36]	@ zero_extendqisi2
-	ldr	r1, [fp, #-52]
-	bl	V2P_block
-.LVL436:
-	.loc 3 543 0
-	cmp	r6, #0
+	add	r3, r3, r4
+	.loc 3 540 0
+	str	r2, [r0, r1]
 	.loc 3 541 0
-	mov	r7, r0
+	ldr	r1, [sp]
+	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL443:
+	mov	r8, r0
 	.loc 3 543 0
-	beq	.L479
+	cbz	r7, .L472
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL437:
-	cmp	r0, #0
-	bne	.L480
-.L479:
+.LVL444:
+	cbnz	r0, .L473
+.L472:
 	.loc 3 548 0
-	mov	r0, r7
+	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-.LVL438:
-	cmp	r0, #0
-	.loc 3 554 0
-	addne	r4, r4, #1
-.LVL439:
-	uxthne	r4, r4
-.LVL440:
-	.loc 3 548 0
-	bne	.L480
+.LVL445:
+	cbnz	r0, .L474
 	.loc 3 549 0
-	ldr	r0, [r8, #3760]
-	lsl	r7, r7, #10
-	.loc 3 550 0
-	ldr	r1, [r8, #3768]
+	ldr	r1, [r4, #3760]
+	lsl	r3, r8, #10
+	.loc 3 551 0
+	ldr	r0, [fp, #3772]
 	.loc 3 549 0
-	mla	r0, r9, r5, r0
+	mla	r1, r9, r6, r1
+	str	r3, [r1, #4]
 	.loc 3 550 0
-	str	r1, [r0, #8]
+	ldr	r3, [r4, #3768]
+	str	r3, [r1, #8]
 	.loc 3 551 0
-	ldrh	r1, [r8, #88]
-	.loc 3 549 0
-	str	r7, [r0, #4]
+	ldrh	r3, [r4, #88]
+	muls	r3, r6, r3
+	.loc 3 552 0
+	add	r6, r6, #1
 	.loc 3 551 0
-	mul	r1, r5, r1
+	it	mi
+	addmi	r3, r3, #3
 	.loc 3 552 0
-	add	r5, r5, #1
-	uxth	r5, r5
+	uxth	r6, r6
 	.loc 3 551 0
-	add	ip, r1, #3
-	cmp	r1, #0
-	movlt	r1, ip
-	ldr	ip, [r8, #3772]
-	bic	r1, r1, #3
-	add	r1, ip, r1
-	str	r1, [r0, #12]
-.L480:
+	bic	r3, r3, #3
+	add	r3, r3, r0
+	str	r3, [r1, #12]
+.L473:
 	add	r10, r10, #1
-	b	.L478
-.L487:
+	b	.L471
+.L474:
+	.loc 3 554 0
+	adds	r5, r5, #1
+.LVL446:
+	uxth	r5, r5
+.LVL447:
+	b	.L473
+.L481:
 	.loc 3 564 0
-	mul	r2, r9, r7
-	ldr	r1, [r8, #3760]
-	add	r0, r1, r2
-	ldr	r2, [r1, r2]
-	cmn	r2, #1
-	bne	.L486
+	mul	r3, r9, r8
+	ldr	r2, [r4, #3760]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L480
 	.loc 3 566 0
-	ldr	r0, [r0, #4]
+	ldr	r0, [r1, #4]
 	.loc 3 565 0
-	add	r4, r4, #1
-.LVL441:
-	uxth	r4, r4
-.LVL442:
+	adds	r5, r5, #1
+.LVL448:
+	uxth	r5, r5
+.LVL449:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL443:
-.L486:
-	add	r7, r7, #1
-	b	.L485
-.LVL444:
-.L492:
+.LVL450:
+.L480:
+	add	r8, r8, #1
+	b	.L479
+.L498:
+	.loc 3 533 0
+	movs	r3, #6
+.LVL451:
+	.loc 3 534 0
+	mov	r10, r7
+.LVL452:
+	.loc 3 533 0
+	str	r3, [sp, #8]
+	.loc 3 531 0
+	movs	r3, #1
+.LVL453:
+	str	r3, [sp, #4]
+	b	.L482
+.LVL454:
+.L487:
 	.loc 3 579 0
-	uxth	r3, r8
-	mov	r2, #20
-.LVL445:
-	ldr	r0, [r7, #3760]
-	mul	r1, r2, r3
-	mov	r2, #0
+	uxth	r3, r9
+	ldr	r0, [r4, #3760]
+	movs	r2, #0
+	mul	r1, fp, r3
 	.loc 3 580 0
-	add	r3, r7, r3
+	add	r3, r3, r4
 	.loc 3 579 0
 	str	r2, [r0, r1]
 	.loc 3 580 0
-	ldr	r1, [fp, #-52]
+	ldr	r1, [sp]
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL446:
-	.loc 3 581 0
-	cmp	r6, #0
-	.loc 3 580 0
-	mov	r9, r0
+.LVL455:
+	str	r0, [sp, #12]
 	.loc 3 581 0
-	beq	.L490
+	cbz	r7, .L484
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL447:
-	cmp	r0, #0
-	bne	.L491
-.L490:
+.LVL456:
+	cbnz	r0, .L485
+.L484:
 	.loc 3 585 0
-	mov	r0, r9
+	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-.LVL448:
-	cmp	r0, #0
-	bne	.L491
+.LVL457:
+	cbnz	r0, .L485
 	.loc 3 586 0
-	ldr	r1, [r7, #3760]
-	mov	r3, #20
-	mla	r1, r3, r5, r1
-	ldr	r3, [fp, #-48]
-.LVL449:
-	add	r9, r3, r9, lsl #10
-	.loc 3 587 0
-	ldr	r3, [r7, #3776]
-.LVL450:
+	ldr	r1, [r4, #3760]
+	ldr	r3, [sp, #12]
+	.loc 3 588 0
+	ldr	r2, .L515
+	.loc 3 586 0
+	mla	r1, fp, r6, r1
+	.loc 3 588 0
+	ldr	r0, [r2, #3768]
 	.loc 3 586 0
-	str	r9, [r1, #4]
+	add	r3, r8, r3, lsl #10
+	str	r3, [r1, #4]
 	.loc 3 587 0
+	ldr	r3, [r4, #3776]
 	str	r3, [r1, #8]
 	.loc 3 588 0
-	ldrh	r3, [r7, #88]
-	mul	r3, r5, r3
+	ldrh	r3, [r4, #88]
+	muls	r3, r6, r3
 	.loc 3 589 0
-	add	r5, r5, #1
-	uxth	r5, r5
+	add	r6, r6, #1
+	.loc 3 588 0
+	it	mi
+	addmi	r3, r3, #3
+	.loc 3 589 0
+	uxth	r6, r6
 	.loc 3 588 0
-	add	r0, r3, #3
-	cmp	r3, #0
-	movlt	r3, r0
-	ldr	r0, [r7, #3768]
 	bic	r3, r3, #3
-	add	r3, r0, r3
+	add	r3, r3, r0
 	str	r3, [r1, #12]
+.L485:
+	add	r9, r9, #1
+	b	.L483
 .L491:
-	add	r8, r8, #1
-	b	.L489
-.L496:
 	.loc 3 598 0
-	mul	r3, r2, r9
-	ldr	r1, [r10, #3760]
-	add	r0, r1, r3
-	ldr	r3, [r1, r3]
-	cmp	r3, #0
-	beq	.L495
+	mul	r3, fp, r9
+	ldr	r2, [r4, #3760]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L490
 	.loc 3 600 0
-	ldr	r0, [r0, #4]
+	ldr	r0, [r1, #4]
 	.loc 3 599 0
-	add	r4, r4, #1
-.LVL451:
-	str	r2, [fp, #-68]
-	uxth	r4, r4
-.LVL452:
+	adds	r5, r5, #1
+.LVL458:
+	uxth	r5, r5
+.LVL459:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL453:
-	ldr	r2, [fp, #-68]
-.L495:
+.LVL460:
+.L490:
 	add	r9, r9, #1
-	b	.L494
-.LVL454:
-.L500:
+	b	.L489
+.LVL461:
+.L495:
 	.loc 3 611 0
-	cmp	r6, #0
-	beq	.L499
+	cbz	r7, .L494
 	.loc 3 611 0 is_stmt 0 discriminator 1
-	mul	r3, r9, r7
-	ldr	r2, [r10, #3760]
-.LVL455:
-	add	r1, r2, r3
+	mul	r3, r9, r8
+	ldr	r2, [r4, #3760]
+	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cmp	r3, #0
-	bne	.L499
+	cbnz	r3, .L494
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
-	mov	r1, #1
+	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL456:
-.L499:
-	add	r7, r7, #1
-	b	.L498
-.L520:
+.LVL462:
+.L494:
+	add	r8, r8, #1
+	b	.L493
+.L516:
 	.align	2
-.L519:
+.L515:
 	.word	.LANCHOR0
-.LFE149:
+.LFE159:
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.align	2
-	.global	FlashTestBlk
+	.align	1
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
 	.fnstart
-.LFB265:
-	.loc 1 156 0
-	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL457:
-	.movsp ip
-	mov	ip, sp
-.LCFI208:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI209:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI210:
-	.pad #88
-	sub	sp, sp, #88
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 156 0
-	.loc 1 161 0
-	cmp	r0, #11
-	.loc 1 156 0
-	mov	r4, r0
-	.loc 1 162 0
-	movls	r4, #0
-	.loc 1 161 0
-	bls	.L521
-.LBB313:
-.LBB314:
-	.loc 1 165 0
-	ldr	r5, .L524
-	.loc 1 166 0
-	sub	r0, fp, #84
-.LVL458:
+.LFB193:
+	.loc 2 181 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI72:
 .LBB315:
 .LBB316:
-.LBB317:
-	.loc 1 202 0
-	mov	r2, #32
-	mov	r1, #165
-.LBE317:
+	.loc 2 89 0
+	ldr	r4, .L524
 .LBE316:
 .LBE315:
-	.loc 1 166 0
-	str	r0, [fp, #-92]
-.LVL459:
-	.loc 1 169 0
-	lsl	r4, r4, #10
-.LVL460:
-	.loc 1 165 0
-	str	r5, [fp, #-96]
-.LBB320:
-.LBB319:
+	.loc 2 203 0
+	ldr	r6, .L524+4
+.L518:
 .LBB318:
-	.loc 1 202 0
-	bl	memset
-.LVL461:
+.LBB317:
+	.loc 2 89 0
+	ldrh	r1, [r4, #194]
+.LBE317:
 .LBE318:
-.LBE319:
-.LBE320:
-.LBB321:
-.LBB322:
-.LBB323:
-	ldr	r3, .L524+4
-.LBE323:
-.LBE322:
-.LBE321:
-	.loc 1 170 0
-	mov	r2, #1
+	.loc 2 186 0
+	cbz	r1, .L519
+	.loc 2 187 0
+	ldrh	r3, [r4, #190]
+	.loc 2 188 0
+	subs	r1, r1, #1
+	strh	r1, [r4, #194]	@ movhi
+	.loc 2 187 0
+	add	r2, r4, r3, lsl #1
+	.loc 2 189 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 187 0
+	ldrh	r5, [r2, #196]
+	.loc 2 189 0
+	strh	r3, [r4, #190]	@ movhi
+.LBB319:
+	.loc 2 191 0
+	mov	r0, r5
+	bl	P2V_block_in_plane
+.LVL463:
+	mov	r7, r0
+	.loc 2 192 0
+	ldr	r0, [r4, #3760]
+	lsls	r3, r5, #10
+	.loc 2 193 0
+	movs	r2, #1
 	mov	r1, r2
-	sub	r0, fp, #104
-	.loc 1 169 0
-	str	r4, [fp, #-100]
-.LBB326:
-.LBB325:
-.LBB324:
-	.loc 1 202 0
-	str	r3, [r5]
-	str	r3, [r5, #4]
-.LBE324:
-.LBE325:
-.LBE326:
-	.loc 1 170 0
+	.loc 2 192 0
+	str	r3, [r0, #4]
+	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL462:
-	.loc 1 171 0
-	mov	r3, #1
-	sub	r0, fp, #104
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL463:
+.LVL464:
+	.loc 2 194 0
+	ldr	r2, [r4, #2304]
+	ldrh	r3, [r2, r7, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.LBE319:
+	.loc 2 202 0
+	movw	r2, #65533
+.LBB320:
+	.loc 2 195 0
+	ldr	r3, [r4, #2536]
+	adds	r3, r3, #1
+	str	r3, [r4, #2536]
+.LBE320:
+	.loc 2 202 0
+	subs	r3, r5, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L523
+	.loc 2 203 0
+	ldrh	r2, [r4, #194]
+	mov	r1, r5
+	mov	r0, r6
+	bl	printk
+.LVL465:
+	.loc 2 205 0
+	b	.L518
+.L519:
+	.loc 2 199 0
+	ldr	r0, .L524+8
+	bl	printk
+.LVL466:
+.L522:
+	b	.L522
+.L523:
+	.loc 2 208 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, pc}
+.L525:
+	.align	2
+.L524:
+	.word	.LANCHOR0
+	.word	.LC79
+	.word	.LC78
+.LFE193:
+	.fnend
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	.fnstart
+.LFB205:
+	.loc 2 562 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL467:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI73:
+	.loc 2 562 0
+	mov	r4, r0
+	.loc 2 566 0
+	ldrh	r1, [r0, #10]
+	movs	r3, #0
+	ldr	r2, [r0, #12]
+.LVL468:
+.L527:
+	uxth	r5, r3
+	.loc 2 566 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcs	.L530
+	.loc 2 567 0 is_stmt 1
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L527
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL469:
+	.loc 2 569 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 568 0
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	.loc 2 569 0
+	cmp	r3, r2
+	bls	.L528
+	.loc 2 570 0
+	ldr	r3, .L534
+	ldr	r0, .L534+4
+	ldrh	r2, [r3, #194]
+	bl	printk
+.LVL470:
+.L529:
+	b	.L529
+.L528:
+	.loc 2 576 0
+	ldr	r3, [r4, #28]
+	.loc 2 574 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 575 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 576 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 577 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.LVL471:
+.L530:
+	.loc 2 581 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L532
+.LBB323:
+.LBB324:
+	movw	r2, #581
+	ldr	r1, .L534+8
+	ldr	r0, .L534+12
+	bl	printk
+.LVL472:
+.L532:
+.LBE324:
+.LBE323:
+	.loc 2 583 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL473:
+.L535:
+	.align	2
+.L534:
+	.word	.LANCHOR0
+	.word	.LC80
+	.word	.LANCHOR1+160
+	.word	.LC1
+.LFE205:
+	.fnend
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.align	1
+	.global	FlashTestBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	.fnstart
+.LFB275:
+	.loc 1 156 0
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL474:
+	.loc 1 161 0
+	cmp	r0, #11
+	.loc 1 156 0
+	push	{r4, r5, lr}
+	.save {r4, r5, lr}
+.LCFI74:
+	mov	r4, r0
+	.pad #92
+	sub	sp, sp, #92
+.LCFI75:
+	.loc 1 161 0
+	bls	.L538
+.LBB337:
+.LBB338:
+	.loc 1 165 0
+	ldr	r5, .L539
+	.loc 1 166 0
+	add	r0, sp, #24
+.LBB339:
+.LBB340:
+.LBB341:
+	.loc 1 202 0
+	movs	r2, #32
+	movs	r1, #165
+.LBE341:
+.LBE340:
+.LBE339:
+	.loc 1 169 0
+	lsls	r4, r4, #10
+.LVL475:
+	.loc 1 166 0
+	str	r0, [sp, #16]
+	.loc 1 165 0
+	str	r5, [sp, #12]
+.LBB344:
+.LBB343:
+.LBB342:
+	.loc 1 202 0
+	bl	memset
+.LVL476:
+.LBE342:
+.LBE343:
+.LBE344:
+	.loc 1 170 0
+	movs	r2, #1
+.LBB345:
+.LBB346:
+.LBB347:
+	.loc 1 202 0
+	mov	r3, #1515870810
+.LBE347:
+.LBE346:
+.LBE345:
+	.loc 1 170 0
+	mov	r1, r2
+	add	r0, sp, #4
+.LBB350:
+.LBB349:
+.LBB348:
+	.loc 1 202 0
+	str	r3, [r5]
+	str	r3, [r5, #4]
+.LBE348:
+.LBE349:
+.LBE350:
+	.loc 1 169 0
+	str	r4, [sp, #8]
+	.loc 1 170 0
+	bl	FlashEraseBlocks
+.LVL477:
+	.loc 1 171 0
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL478:
 	.loc 1 172 0
-	ldr	r4, [fp, #-104]
+	ldr	r4, [sp, #4]
 	.loc 1 178 0
-	mov	r2, #1
-	mov	r1, #0
-	sub	r0, fp, #104
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
 	.loc 1 172 0
 	adds	r4, r4, #0
+	it	ne
 	movne	r4, #1
-	rsb	r4, r4, #0
+	negs	r4, r4
 	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL464:
-.L521:
-.LBE314:
-.LBE313:
+.LVL479:
+.L536:
+.LBE338:
+.LBE337:
 	.loc 1 180 0
 	mov	r0, r4
-.LVL465:
-	sub	sp, fp, #20
-.LCFI211:
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L525:
+.LVL480:
+	add	sp, sp, #92
+.LCFI76:
+	@ sp needed
+	pop	{r4, r5, pc}
+.LVL481:
+.L538:
+.LCFI77:
+	.loc 1 162 0
+	movs	r4, #0
+.LVL482:
+	b	.L536
+.L540:
 	.align	2
-.L524:
+.L539:
 	.word	ftl_temp_buf
-	.word	1515870810
-.LFE265:
+.LFE275:
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
-	.align	2
+	.align	1
 	.global	FlashGetBadBlockList
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
 	.fnstart
-.LFB266:
+.LFB276:
 	.loc 1 183 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL466:
-	.movsp ip
-	mov	ip, sp
-.LCFI212:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI213:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI214:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 183 0
-.LBB337:
-.LBB338:
-.LBB339:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL483:
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI78:
+.LBB361:
+.LBB362:
+.LBB363:
 	.loc 1 202 0
 	mov	r2, #256
-.LBE339:
-.LBE338:
-.LBE337:
+.LBE363:
+.LBE362:
+.LBE361:
 	.loc 1 183 0
 	mov	r5, r1
-.LBB344:
-.LBB342:
-.LBB340:
+.LBB368:
+.LBB366:
+.LBB364:
 	.loc 1 202 0
-	mov	r1, #255
-.LVL467:
-.LBE340:
-.LBE342:
-.LBE344:
+	movs	r1, #255
+.LVL484:
+.LBE364:
+.LBE366:
+.LBE368:
 	.loc 1 183 0
 	mov	r4, r0
-.LBB345:
-.LBB343:
-.LBB341:
+.LBB369:
+.LBB367:
+.LBB365:
 	.loc 1 202 0
 	bl	memset
-.LVL468:
-.LBE341:
-.LBE343:
-.LBE345:
+.LVL485:
+.LBE365:
+.LBE367:
+.LBE369:
 	.loc 1 187 0
-	ldr	r3, .L533
+	ldr	r3, .L548
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL469:
+.LVL486:
 	uxth	r0, r0
-.LVL470:
+.LVL487:
 	.loc 1 188 0
 	cmp	r0, #50
-	bls	.L527
-.LBB346:
-.LBB347:
-.LBB348:
+	bls	.L542
+.LBB370:
+.LBB371:
+.LBB372:
 	.loc 1 202 0
 	mov	r2, #256
-	mov	r1, #255
+	movs	r1, #255
 	mov	r0, r4
-.LVL471:
+.LVL488:
 	bl	memset
-.LVL472:
-.LBE348:
-.LBE347:
-.LBE346:
+.LVL489:
+.LBE372:
+.LBE371:
+.LBE370:
 	.loc 1 190 0
-	mov	r0, #0
-.LVL473:
-.L527:
+	movs	r0, #0
+.LVL490:
+.L542:
 	.loc 1 192 0
-	ldr	r3, .L533+4
-.LVL474:
+	ldr	r3, .L548+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	moveq	r3, r4
-.LVL475:
-	addeq	r1, r3, r0, lsl #1
-	beq	.L529
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L530:
-	.loc 1 194 0 discriminator 3
-	ldrh	r2, [r3]
-	lsr	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-.L529:
+	bne	.L547
+	add	r1, r4, r0, lsl #1
+.LVL491:
+	mov	r3, r4
+.L544:
 	.loc 1 193 0 discriminator 1
 	cmp	r3, r1
-	bne	.L530
-.LVL476:
+	bne	.L545
+.L547:
+.LVL492:
 	.loc 1 198 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L534:
+	pop	{r3, r4, r5, pc}
+.LVL493:
+.L545:
+	.loc 1 194 0 discriminator 3
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L544
+.L549:
 	.align	2
-.L533:
+.L548:
 	.word	g_nand_ops
 	.word	g_nand_phy_info
-.LFE266:
+.LFE276:
 	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.align	2
+	.align	1
 	.global	ftl_memset
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
 	.fnstart
-.LFB267:
+.LFB277:
 	.loc 1 201 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL477:
-	.movsp ip
-	mov	ip, sp
-.LCFI215:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI216:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI217:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 201 0
-.LBB353:
-	.loc 1 202 0
-	cmp	r2, #0
-.LBE353:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL494:
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI79:
 	.loc 1 201 0
 	mov	r4, r0
-.LBB354:
+.LBB377:
 	.loc 1 202 0
-	beq	.L536
-.LBE354:
-.LBB355:
-.LBB356:
+	cbz	r2, .L551
+.LBE377:
+.LBB378:
+.LBB379:
 	bl	memset
-.LVL478:
-.L536:
-.LBE356:
-.LBE355:
+.LVL495:
+.L551:
+.LBE379:
+.LBE378:
 	.loc 1 203 0 discriminator 8
 	mov	r0, r4
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.LFE267:
+	pop	{r4, pc}
+.LFE277:
 	.fnend
 	.size	ftl_memset, .-ftl_memset
-	.align	2
+	.align	1
 	.global	FtlMemInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
 	.fnstart
-.LFB146:
+.LFB156:
 	.loc 3 279 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI218:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI219:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI220:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 279 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI80:
 	.loc 3 297 0
 	movw	r3, #65535
-	.loc 3 301 0
-	movw	r2, #3182
 	.loc 3 282 0
-	ldr	r4, .L641
-	mov	r5, #0
+	ldr	r4, .L656
+	movs	r5, #0
 	.loc 3 311 0
-	mov	r6, #12
+	movs	r6, #12
 	.loc 3 312 0
-	mov	r7, #20
+	movs	r7, #20
+	.loc 3 310 0
+	ldrh	r0, [r4, #82]
 	.loc 3 297 0
 	str	r3, [r4, #3784]
 	.loc 3 301 0
-	mvn	r3, #0
-	strh	r3, [r4, r2]	@ movhi
+	strh	r3, [r4, #3178]	@ movhi
 	.loc 3 302 0
-	add	r2, r4, #3184
-	strh	r3, [r2]	@ movhi
+	strh	r3, [r4, #3180]	@ movhi
 	.loc 3 303 0
-	mov	r2, #32
-	movw	r3, #3128
+	movs	r3, #32
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 3 310 0
-	ldrh	r0, [r4, #82]
-	.loc 3 303 0
-	strh	r2, [r4, r3]	@ movhi
+	lsls	r0, r0, #1
 	.loc 3 304 0
-	mov	r2, #128
-	movw	r3, #3130
+	movs	r3, #128
 	.loc 3 282 0
-	str	r5, [r4, #2472]
+	str	r5, [r4, #2516]
 	.loc 3 304 0
-	strh	r2, [r4, r3]	@ movhi
-	.loc 3 305 0
-	add	r3, r4, #3136
-	strh	r5, [r3]	@ movhi
-	.loc 3 306 0
-	movw	r3, #3186
-	strh	r5, [r4, r3]	@ movhi
-	.loc 3 310 0
-	lsl	r0, r0, #1
-	.loc 3 307 0
-	movw	r3, #3222
+	strh	r3, [r4, #3126]	@ movhi
 	.loc 3 283 0
-	str	r5, [r4, #2476]
-	.loc 3 307 0
-	strh	r5, [r4, r3]	@ movhi
+	str	r5, [r4, #2520]
 	.loc 3 284 0
-	str	r5, [r4, #2460]
+	str	r5, [r4, #2504]
 	.loc 3 285 0
-	str	r5, [r4, #2448]
+	str	r5, [r4, #2492]
 	.loc 3 286 0
-	str	r5, [r4, #2444]
+	str	r5, [r4, #2488]
 	.loc 3 287 0
-	str	r5, [r4, #2452]
+	str	r5, [r4, #2496]
 	.loc 3 288 0
-	str	r5, [r4, #2456]
+	str	r5, [r4, #2500]
 	.loc 3 289 0
-	str	r5, [r4, #2440]
+	str	r5, [r4, #2484]
 	.loc 3 290 0
-	str	r5, [r4, #2480]
+	str	r5, [r4, #2524]
 	.loc 3 291 0
-	str	r5, [r4, #2484]
+	str	r5, [r4, #2528]
 	.loc 3 292 0
-	str	r5, [r4, #2492]
+	str	r5, [r4, #2536]
 	.loc 3 293 0
-	str	r5, [r4, #2496]
+	str	r5, [r4, #2540]
 	.loc 3 294 0
-	str	r5, [r4, #2500]
+	str	r5, [r4, #2544]
 	.loc 3 295 0
 	str	r5, [r4, #3780]
 	.loc 3 296 0
-	str	r5, [r4, #3140]
+	str	r5, [r4, #3136]
 	.loc 3 298 0
 	str	r5, [r4, #3788]
 	.loc 3 299 0
-	str	r5, [r4, #3132]
+	str	r5, [r4, #3128]
 	.loc 3 300 0
 	str	r5, [r4, #3764]
+	.loc 3 305 0
+	strh	r5, [r4, #3132]	@ movhi
+	.loc 3 306 0
+	strh	r5, [r4, #3182]	@ movhi
+	.loc 3 307 0
+	strh	r5, [r4, #3218]	@ movhi
 	.loc 3 310 0
 	bl	ftl_malloc
-.LVL479:
-	str	r0, [r4, #3168]
+.LVL496:
+	str	r0, [r4, #3164]
 	.loc 3 311 0
 	ldrh	r0, [r4, #82]
-	mul	r0, r6, r0
+	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL480:
+.LVL497:
 	.loc 3 312 0
 	ldrh	r3, [r4, #8]
 	.loc 3 311 0
-	str	r0, [r4, #3176]
+	str	r0, [r4, #3172]
 	.loc 3 312 0
-	mul	r7, r7, r3
+	muls	r7, r3, r7
 	.loc 3 313 0
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL481:
+.LVL498:
 	str	r0, [r4, #3792]
 	.loc 3 314 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL482:
+.LVL499:
 	str	r0, [r4, #3796]
 	.loc 3 315 0
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL483:
+.LVL500:
 	str	r0, [r4, #3800]
 	.loc 3 316 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL484:
+.LVL501:
 	str	r0, [r4, #3760]
 	.loc 3 317 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL485:
+.LVL502:
 	.loc 3 320 0
 	ldrh	r3, [r4, #8]
 	.loc 3 319 0
 	ldrh	r7, [r4, #86]
 	.loc 3 317 0
-	str	r0, [r4, #3160]
+	str	r0, [r4, #3156]
 	.loc 3 320 0
-	lsl	r3, r3, #1
+	lsls	r3, r3, #1
 	.loc 3 321 0
 	mov	r0, r7
 	.loc 3 320 0
-	add	r3, r3, #1
-	str	r3, [r4, #3164]
+	adds	r3, r3, #1
+	str	r3, [r4, #3160]
 	.loc 3 321 0
 	bl	ftl_malloc
-.LVL486:
-	str	r0, [r4, #2244]
+.LVL503:
+	str	r0, [r4, #3240]
 	.loc 3 322 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL487:
+.LVL504:
 	str	r0, [r4, #3804]
 	.loc 3 323 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL488:
+.LVL505:
 	str	r0, [r4, #3808]
 	.loc 3 324 0
-	ldr	r0, [r4, #3164]
-	mul	r0, r0, r7
+	ldr	r0, [r4, #3160]
+	muls	r0, r7, r0
 	bl	ftl_malloc
-.LVL489:
-	str	r0, [r4, #3152]
+.LVL506:
+	str	r0, [r4, #3148]
 	.loc 3 325 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL490:
+.LVL507:
 	str	r0, [r4, #3776]
 	.loc 3 326 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL491:
+.LVL508:
 	str	r0, [r4, #3768]
 	.loc 3 327 0
-	ldr	r0, [r4, #3164]
-	mul	r0, r6, r0
+	ldr	r0, [r4, #3160]
+	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL492:
+.LVL509:
 	.loc 3 329 0
 	ldrh	r3, [r4, #88]
 	ldrh	r7, [r4, #8]
 	.loc 3 327 0
-	str	r0, [r4, #3148]
+	str	r0, [r4, #3144]
 	.loc 3 329 0
-	mul	r7, r7, r3
+	muls	r7, r3, r7
 	.loc 3 330 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL493:
+.LVL510:
 	str	r0, [r4, #3244]
 	.loc 3 331 0
-	lsl	r0, r7, #2
-	.loc 3 335 0
-	movw	r7, #3812
-	.loc 3 331 0
+	lsls	r0, r7, #2
 	bl	ftl_malloc
-.LVL494:
+.LVL511:
 	.loc 3 332 0
 	ldrh	r3, [r4, #88]
 	.loc 3 331 0
 	str	r0, [r4, #3772]
 	.loc 3 332 0
-	ldr	r0, [r4, #3164]
-	mul	r0, r0, r3
+	ldr	r0, [r4, #3160]
+	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL495:
-	str	r0, [r4, #3156]
+.LVL512:
+	str	r0, [r4, #3152]
 	.loc 3 335 0
 	ldrh	r0, [r4, #18]
-	lsl	r0, r0, #1
+	lsls	r0, r0, #1
 	uxth	r0, r0
-	strh	r0, [r4, r7]	@ movhi
+	strh	r0, [r4, #3812]	@ movhi
 	.loc 3 336 0
 	bl	ftl_malloc
-.LVL496:
+.LVL513:
+	.loc 3 337 0
+	ldrh	r3, [r4, #3812]
+	.loc 3 336 0
 	str	r0, [r4, #3816]
+	.loc 3 338 0
+	ldr	r0, .L656+4
 	.loc 3 337 0
-	ldrh	r0, [r4, r7]
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
 	.loc 3 338 0
-	ldr	r3, .L641+4
+	and	r0, r0, r3, lsl #9
 	.loc 3 337 0
-	add	r0, r0, #544
-	add	r0, r0, #3
-	lsr	r0, r0, #9
-	strh	r0, [r4, r7]	@ movhi
+	strh	r3, [r4, #3812]	@ movhi
 	.loc 3 338 0
-	and	r0, r3, r0, lsl #9
 	bl	ftl_malloc
-.LVL497:
+.LVL514:
 	.loc 3 345 0
 	ldrh	r7, [r4, #18]
 	.loc 3 338 0
 	str	r0, [r4, #3820]
 	.loc 3 339 0
-	add	r0, r0, #32
-	str	r0, [r4, #2248]
+	adds	r0, r0, #32
+	str	r0, [r4, #2304]
 	.loc 3 345 0
-	lsl	r7, r7, #1
+	lsls	r7, r7, #1
 	.loc 3 347 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL498:
+.LVL515:
 	str	r0, [r4, #3824]
 	.loc 3 349 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL499:
+.LVL516:
 	.loc 3 350 0
 	ldr	r7, [r4, #104]
 	.loc 3 349 0
-	str	r0, [r4, #2260]
+	str	r0, [r4, #2300]
 	.loc 3 350 0
-	lsl	r7, r7, #1
+	lsls	r7, r7, #1
 	.loc 3 351 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL500:
+.LVL517:
 	str	r0, [r4, #3828]
 	.loc 3 352 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL501:
+.LVL518:
 	str	r0, [r4, #3832]
 	.loc 3 353 0
 	ldrh	r0, [r4, #18]
-	lsr	r0, r0, #3
-	add	r0, r0, #4
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL502:
+.LVL519:
 	str	r0, [r4]
 	.loc 3 354 0
 	ldrh	r0, [r4, #96]
-	lsl	r0, r0, #1
+	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL503:
+.LVL520:
 	str	r0, [r4, #124]
 	.loc 3 355 0
 	ldrh	r0, [r4, #96]
-	lsl	r0, r0, #1
+	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL504:
+.LVL521:
 	str	r0, [r4, #3836]
 	.loc 3 356 0
 	ldrh	r0, [r4, #96]
-	lsl	r0, r0, #2
+	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL505:
+.LVL522:
 	str	r0, [r4, #3840]
 	.loc 3 357 0
 	ldrh	r0, [r4, #98]
-	lsl	r0, r0, #2
+	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL506:
+.LVL523:
 	.loc 3 358 0
 	ldrh	r2, [r4, #98]
 	mov	r1, r5
 	.loc 3 357 0
 	str	r0, [r4, #3844]
-	.loc 3 370 0
-	movw	r5, #3860
+	add	r5, r4, #156
 	.loc 3 358 0
-	lsl	r2, r2, #2
+	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL507:
+.LVL524:
 	.loc 3 360 0
 	ldrh	r0, [r4, #112]
 	.loc 3 361 0
-	lsl	r0, r0, #2
+	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL508:
+.LVL525:
 	str	r0, [r4, #3848]
 	.loc 3 362 0
 	ldr	r0, [r4, #104]
 	.loc 3 363 0
-	lsl	r0, r0, #2
+	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL509:
+.LVL526:
 	str	r0, [r4, #3852]
 	.loc 3 364 0
 	ldrh	r0, [r4, #114]
 	.loc 3 365 0
-	mul	r0, r6, r0
+	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL510:
+.LVL527:
 	.loc 3 366 0
 	ldrh	r3, [r4, #114]
 	.loc 3 365 0
-	str	r0, [r4, #2424]
+	str	r0, [r4, #2468]
 	.loc 3 366 0
 	ldrh	r0, [r4, #86]
 	.loc 3 367 0
-	mul	r0, r0, r3
+	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL511:
+.LVL528:
 	.loc 3 368 0
 	ldrh	r3, [r4, #18]
 	.loc 3 367 0
 	str	r0, [r4, #3856]
 	.loc 3 369 0
-	mov	r0, #6
-	mul	r0, r0, r3
+	movs	r0, #6
+	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL512:
-	str	r0, [r4, #2252]
+.LVL529:
+	str	r0, [r4, #2292]
 	.loc 3 370 0
 	ldrh	r0, [r4, #74]
 	.loc 3 371 0
 	ldrh	r3, [r4, #30]
 	.loc 3 370 0
-	add	r0, r0, #31
-	asr	r0, r0, #5
-	strh	r0, [r4, r5]	@ movhi
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r4, #3860]	@ movhi
 	.loc 3 371 0
-	mul	r0, r0, r3
+	muls	r0, r3, r0
 	.loc 3 372 0
-	lsl	r0, r0, #2
+	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL513:
+.LVL530:
 	.loc 3 374 0
-	ldrh	r2, [r4, r5]
-	add	ip, r4, #156
+	ldrh	r2, [r4, #3860]
 	.loc 3 373 0
-	ldrh	lr, [r4, #30]
-	mov	r3, #1
-.LVL514:
+	movs	r3, #1
+.LVL531:
+	ldrh	r6, [r4, #30]
 	.loc 3 372 0
 	str	r0, [r4, #156]
-	lsl	r2, r2, #2
+	lsls	r2, r2, #2
 	.loc 3 373 0
 	mov	r1, r2
-.L541:
+.L556:
 	.loc 3 373 0 is_stmt 0 discriminator 1
-	cmp	r3, lr
-	bcc	.L542
-	ldr	r2, .L641+8
+	cmp	r3, r6
+	bcc	.L557
+	ldr	r2, .L656+8
 	.loc 3 379 0 is_stmt 1
-	mov	r1, #0
+	movs	r1, #0
 	add	r3, r2, r3, lsl #2
-.LVL515:
-	add	r2, r2, #56
-	add	r3, r3, #24
-.L543:
+.LVL532:
+	adds	r2, r2, #56
+	adds	r3, r3, #24
+.L558:
 	.loc 3 377 0 discriminator 1
 	cmp	r2, r3
-	bne	.L544
+	bne	.L559
 	.loc 3 383 0
 	ldr	r3, [r4, #3828]
-	cmp	r3, #0
-	bne	.L545
-.L547:
+	cbnz	r3, .L560
+.L562:
 	.loc 3 385 0
-	ldr	r1, .L641+12
-	ldr	r0, .L641+16
+	ldr	r1, .L656+12
+	ldr	r0, .L656+16
 	bl	printk
-.LVL516:
+.LVL533:
 	.loc 3 386 0
-	mvn	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL517:
-.L542:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL534:
+.L557:
 	.loc 3 374 0 discriminator 3
 	ldr	r0, [r4, #156]
 	.loc 3 373 0 discriminator 3
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	.loc 3 374 0 discriminator 3
 	add	r0, r0, r1
 	add	r1, r1, r2
-	str	r0, [ip, #4]!
-	b	.L541
-.LVL518:
-.L544:
+	str	r0, [r5, #4]!
+	b	.L556
+.LVL535:
+.L559:
 	.loc 3 379 0 discriminator 2
 	str	r1, [r3, #4]!
-	b	.L543
-.L545:
+	b	.L558
+.L657:
+	.align	2
+.L656:
+	.word	.LANCHOR0
+	.word	33553920
+	.word	.LANCHOR0+128
+	.word	.LANCHOR1+186
+	.word	.LC81
+.L560:
 	.loc 3 388 0
 	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 393 0
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 398 0
 	ldr	r3, [r4, #3852]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 404 0
-	ldr	r3, [r4, #2424]
+	ldr	r3, [r4, #2468]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 409 0
 	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 414 0
-	ldr	r3, [r4, #2252]
+	ldr	r3, [r4, #2292]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 419 0
 	ldr	r3, [r4, #156]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 425 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 430 0
-	ldr	r3, [r4, #3168]
+	ldr	r3, [r4, #3164]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3176]
+	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 435 0 is_stmt 1
 	ldr	r3, [r4, #3792]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 435 0 discriminator 2
 	ldr	r3, [r4, #3760]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 435 0 discriminator 3
-	ldr	r3, [r4, #3160]
+	ldr	r3, [r4, #3156]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 435 0 discriminator 4
 	ldr	r3, [r4, #3796]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 440 0 is_stmt 1
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 440 0 discriminator 2
 	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 440 0 discriminator 3
-	ldr	r3, [r4, #3152]
+	ldr	r3, [r4, #3148]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 441 0 is_stmt 1
 	ldr	r3, [r4, #3776]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3768]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 441 0 discriminator 2
-	ldr	r3, [r4, #3148]
+	ldr	r3, [r4, #3144]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 446 0 is_stmt 1
 	ldr	r3, [r4, #3244]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 446 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3772]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 446 0 discriminator 2
-	ldr	r3, [r4, #3156]
+	ldr	r3, [r4, #3152]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 452 0 is_stmt 1
-	ldr	r3, [r4, #2248]
+	ldr	r3, [r4, #2304]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 452 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 458 0 is_stmt 1
 	ldr	r3, [r4, #124]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 464 0
-	ldr	r3, .L641
+	ldr	r3, .L658
 	ldr	r2, [r3, #3836]
 	cmp	r2, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 470 0
 	ldr	r2, [r3, #3840]
 	cmp	r2, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 476 0
 	ldr	r3, [r3, #3844]
 	cmp	r3, #0
-	beq	.L547
+	beq	.L562
 	.loc 3 483 0
-	mov	r0, #0
+	movs	r0, #0
 	.loc 3 484 0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L642:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L659:
 	.align	2
-.L641:
+.L658:
 	.word	.LANCHOR0
-	.word	33553920
-	.word	.LANCHOR0+128
-	.word	.LANCHOR1+186
-	.word	.LC78
-.LFE146:
+.LFE156:
 	.fnend
 	.size	FtlMemInit, .-FtlMemInit
-	.align	2
+	.align	1
 	.global	FtlBbt2Bitmap
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
 	.fnstart
-.LFB165:
+.LFB175:
 	.loc 4 66 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL519:
-	.movsp ip
-	mov	ip, sp
-.LCFI221:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI222:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI223:
-	push	{lr}
-	bl	__gnu_mcount_nc
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL536:
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI81:
 	.loc 4 66 0
+	mov	r5, r0
 	.loc 4 69 0
-	movw	r3, #3860
+	ldr	r6, .L666
 	.loc 4 66 0
-	mov	r4, r0
+	mov	r7, r1
+	subs	r4, r5, #2
+	.loc 4 72 0
+	movw	r8, #65535
+	.loc 4 74 0
+	ldr	r9, .L666+4
+	addw	r5, r5, #1022
 	.loc 4 69 0
-	ldr	r6, .L649
-	sub	r5, r4, #2
+	ldrh	r2, [r6, #3860]
+	movs	r1, #0
+.LVL537:
 	.loc 4 74 0
-	ldr	r8, .L649+4
-	add	r4, r4, #1020
-	ldr	r9, .L649+8
-	.loc 4 66 0
-	mov	r7, r1
+	ldr	r10, .L666+8
 	.loc 4 69 0
-	ldrh	r2, [r6, r3]
-	add	r4, r4, #2
-	mov	r1, #0
-.LVL520:
 	mov	r0, r7
-.LVL521:
-	lsl	r2, r2, #2
+.LVL538:
+	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL522:
-.L646:
+.LVL539:
+.L663:
 	.loc 4 72 0
-	ldrh	r3, [r5, #2]
-	movw	r2, #65535
-	cmp	r3, r2
-	ldmfdeq	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+	ldrh	r3, [r4, #2]
+	cmp	r3, r8
+	beq	.L660
 	.loc 4 74 0
 	ldrh	r2, [r6, #74]
 	cmp	r2, r3
-	bhi	.L645
+	bhi	.L662
 	.loc 4 74 0 is_stmt 0 discriminator 1
-	mov	r2, #74
-	mov	r1, r8
-	mov	r0, r9
+	movs	r2, #74
+	mov	r1, r9
+	mov	r0, r10
 	bl	printk
-.LVL523:
-.L645:
+.LVL540:
+.L662:
 	.loc 4 75 0 is_stmt 1 discriminator 2
-	ldrh	r3, [r5, #2]!
-	mov	r0, #1
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
 	.loc 4 70 0 discriminator 2
-	cmp	r4, r5
+	cmp	r5, r4
 	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
+	lsl	r3, r2, r3
 	ldr	r2, [r7, r1, lsl #2]
-	orr	r3, r2, r0, lsl r3
-	str	r3, [r7, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r7, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L646
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L650:
+	bne	.L663
+.L660:
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL541:
+.L667:
 	.align	2
-.L649:
+.L666:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
-.LFE165:
+.LFE175:
 	.fnend
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.align	2
+	.align	1
 	.global	load_l2p_region
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
 	.fnstart
-.LFB193:
-	.loc 2 442 0
+.LFB203:
+	.loc 2 488 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL524:
-	.movsp ip
-	mov	ip, sp
-.LCFI224:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI225:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI226:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 442 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL542:
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI82:
+	.loc 2 488 0
 	mov	r6, r0
+	.loc 2 492 0
+	ldr	r4, .L674
+	.loc 2 488 0
 	mov	r8, r1
-	.loc 2 446 0
-	ldr	r4, .L657
+	.loc 2 492 0
 	ldrh	r3, [r4, #112]
 	cmp	r3, r0
-	bcs	.L652
-	.loc 2 446 0 is_stmt 0 discriminator 1
-	movw	r2, #446
-	ldr	r1, .L657+4
-	ldr	r0, .L657+8
+	bcs	.L669
+	.loc 2 492 0 is_stmt 0 discriminator 1
+	mov	r2, #492
+	ldr	r1, .L674+4
+	ldr	r0, .L674+8
 	bl	printk
-.LVL525:
-.L652:
-	.loc 2 447 0 is_stmt 1
+.LVL543:
+.L669:
+	.loc 2 493 0 is_stmt 1
 	ldr	r3, [r4, #3848]
-	mov	r5, #12
+	movs	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-.LVL526:
-	.loc 2 449 0
-	cmp	r7, #0
-	bne	.L653
-	.loc 2 450 0
+.LVL544:
+	.loc 2 495 0
+	cbnz	r7, .L670
+	.loc 2 496 0
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2424]
+	ldr	r3, [r4, #2468]
 	ldrh	r2, [r4, #86]
-	mov	r1, #255
+	movs	r1, #255
 	add	r3, r3, r5
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL527:
-	.loc 2 451 0
-	ldr	r3, [r4, #2424]
+.LVL545:
+	.loc 2 497 0
+	ldr	r3, [r4, #2468]
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 452 0
-	ldr	r3, [r4, #2424]
-	add	r5, r3, r5
+	.loc 2 498 0
+	ldr	r3, [r4, #2468]
+	add	r5, r5, r3
 	str	r7, [r5, #4]
-.LVL528:
-.L654:
-	.loc 2 473 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL529:
-.L653:
-	.loc 2 456 0
+.LVL546:
+.L671:
+	.loc 2 519 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL547:
+.L670:
+	.loc 2 502 0
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2424]
-	.loc 2 458 0
-	mov	r2, #1
-	ldr	r0, .L657+12
+	ldr	r3, [r4, #2468]
+	.loc 2 504 0
+	movs	r2, #1
+	ldr	r0, .L674+12
 	mov	r1, r2
-	.loc 2 455 0
-	str	r7, [r4, #3228]
-	.loc 2 456 0
+	.loc 2 501 0
+	str	r7, [r4, #3224]
+	.loc 2 502 0
 	add	r3, r3, r5
 	ldr	r3, [r3, #8]
-	str	r3, [r4, #3232]
-	.loc 2 457 0
+	str	r3, [r4, #3228]
+	.loc 2 503 0
 	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3236]
-	.loc 2 458 0
+	str	r3, [r4, #3232]
+	.loc 2 504 0
 	bl	FlashReadPages
-.LVL530:
-	.loc 2 459 0
-	ldr	r8, [r4, #3236]
-.LVL531:
-	.loc 2 461 0
+.LVL548:
+	.loc 2 505 0
+	ldr	r8, [r4, #3232]
+.LVL549:
+	.loc 2 507 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L655
-	.loc 2 462 0
+	beq	.L672
+	.loc 2 508 0
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L657+16
+	ldr	r0, .L674+16
 	bl	printk
-.LVL532:
-	.loc 2 463 0
-	mov	r3, #4
-	ldr	r1, [r4, #3236]
+.LVL550:
+	.loc 2 509 0
+	movs	r3, #4
+	ldr	r1, [r4, #3232]
 	mov	r2, r3
-	ldr	r0, .L657+20
+	ldr	r0, .L674+20
 	bl	rknand_print_hex
-.LVL533:
-	.loc 2 464 0
+.LVL551:
+	.loc 2 510 0
 	ldrh	r3, [r4, #112]
-	mov	r2, #4
+	movs	r2, #4
 	ldr	r1, [r4, #3848]
-	ldr	r0, .L657+24
+	ldr	r0, .L674+24
 	bl	rknand_print_hex
-.LVL534:
-.L655:
-	.loc 2 467 0
+.LVL552:
+.L672:
+	.loc 2 513 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L656
-	.loc 2 467 0 is_stmt 0 discriminator 1
-	movw	r2, #467
-	ldr	r1, .L657+4
-	ldr	r0, .L657+8
+	beq	.L673
+	.loc 2 513 0 is_stmt 0 discriminator 1
+	movw	r2, #513
+	ldr	r1, .L674+4
+	ldr	r0, .L674+8
 	bl	printk
-.LVL535:
-.L656:
-	.loc 2 470 0 is_stmt 1
-	ldr	r3, [r4, #2424]
-	mov	r1, #0
-	add	r2, r3, r5
+.LVL553:
+.L673:
+	.loc 2 516 0 is_stmt 1
+	ldr	r3, [r4, #2468]
+	movs	r1, #0
+	adds	r2, r3, r5
 	str	r1, [r2, #4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 472 0
-	b	.L654
-.L658:
+	.loc 2 518 0
+	b	.L671
+.L675:
 	.align	2
-.L657:
+.L674:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
-	.word	.LANCHOR0+3224
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
-.LFE193:
+	.word	.LANCHOR0+3220
+	.word	.LC82
+	.word	.LC83
+	.word	.LC84
+.LFE203:
 	.fnend
 	.size	load_l2p_region, .-load_l2p_region
-	.align	2
+	.align	1
 	.global	ftl_free_no_use_map_blk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 	.fnstart
-.LFB194:
-	.loc 2 476 0
+.LFB204:
+	.loc 2 522 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL536:
-	.movsp ip
-	mov	ip, sp
-.LCFI227:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI228:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI229:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL554:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 476 0
-	.loc 2 485 0
-	ldrh	r2, [r0, #10]
-	.loc 2 476 0
+.LCFI83:
+.LVL555:
+	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 479 0
+	.loc 2 531 0
+	ldrh	r2, [r0, #10]
+	movs	r1, #0
+	.loc 2 525 0
 	ldr	r5, [r0, #20]
-.LVL537:
-	.loc 2 485 0
-	mov	r1, #0
-	.loc 2 477 0
+.LVL556:
+	.loc 2 523 0
 	ldr	r9, [r0, #12]
-.LVL538:
-	.loc 2 478 0
+.LVL557:
+	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL539:
-	.loc 2 485 0
-	lsl	r2, r2, #1
+.LVL558:
+	.loc 2 531 0
+	lsls	r2, r2, #1
 	mov	r0, r5
-.LVL540:
+.LVL559:
 	bl	ftl_memset
-.LVL541:
-	.loc 2 486 0
-	mov	r2, #0
-.LVL542:
-.L660:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL560:
+	.loc 2 532 0
+	movs	r3, #0
+.LVL561:
+.L677:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
-	uxth	r3, r2
+.LVL562:
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L681
+	.loc 2 540 0 is_stmt 1
+	ldrh	fp, [r5]
+.LVL563:
+	.loc 2 543 0
+	movs	r6, #0
+.LVL564:
+	.loc 2 544 0
+	ldr	r2, .L690
+	.loc 2 541 0
+	mov	r10, r6
+.LVL565:
+.L682:
+	.loc 2 543 0 discriminator 1
+	ldrh	r1, [r4, #10]
+	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L664
-	.loc 2 494 0 is_stmt 1
-	ldrh	r3, [r5]
-.LVL543:
-	.loc 2 497 0
-	mov	r7, #0
-	.loc 2 498 0
-	ldr	r2, .L673
-	.loc 2 495 0
-	mov	r10, r7
-.LVL544:
-.L665:
-	.loc 2 497 0 discriminator 1
-	ldrh	r0, [r4, #10]
-.LVL545:
-	uxth	r1, r7
-	cmp	r0, r1
-	bhi	.L669
-	.loc 2 513 0
+	bhi	.L686
+	.loc 2 559 0
 	mov	r0, r10
-	sub	sp, fp, #40
-.LCFI230:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL546:
-.L664:
-.LCFI231:
-	.loc 2 487 0
-	uxth	r3, r2
-	.loc 2 488 0
-	mov	r1, #0
-	.loc 2 487 0
-	ldr	r0, [r6, r3, lsl #2]
-.LVL547:
-	ubfx	r0, r0, #10, #16
-.LVL548:
-.L661:
-	.loc 2 488 0 discriminator 1
-	ldrh	ip, [r4, #10]
-	uxth	r3, r1
-	cmp	ip, r3
-	addls	r2, r2, #1
-	bls	.L660
-.L663:
-	.loc 2 489 0
-	uxth	r3, r1
-	add	r1, r1, #1
-	lsl	r3, r3, #1
-	ldrh	ip, [r9, r3]
-	cmp	ip, r0
-	.loc 2 490 0
-	ldrheq	ip, [r5, r3]
-	addeq	ip, ip, #1
-	strheq	ip, [r5, r3]	@ movhi
-	b	.L661
-.LVL549:
-.L669:
-	.loc 2 498 0
-	ldrh	r0, [r4]
-	uxth	r6, r7
-.LVL550:
+	add	sp, sp, #12
+.LCFI84:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL566:
+.L681:
+.LCFI85:
+	.loc 2 533 0
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	.loc 2 534 0
+	movs	r2, #0
+	.loc 2 533 0
+	ubfx	r1, r1, #10, #16
+.LVL567:
+.L678:
+	.loc 2 534 0 discriminator 1
+	ldrh	r7, [r4, #10]
+	uxth	r0, r2
+	cmp	r7, r0
+	bhi	.L680
+	adds	r3, r3, #1
+	b	.L677
+.L680:
+	.loc 2 535 0
+	uxth	r0, r2
+	adds	r2, r2, #1
+	ldrh	r7, [r9, r0, lsl #1]
+	cmp	r7, r1
+	.loc 2 536 0
+	ittt	eq
+	ldrheq	r7, [r5, r0, lsl #1]
+	addeq	r7, r7, #1
+	strheq	r7, [r5, r0, lsl #1]	@ movhi
+	b	.L678
+.LVL568:
+.L686:
+	.loc 2 544 0
+	ldrh	r1, [r4]
+	uxth	r7, r6
+	cmp	r1, r3
+	bne	.L683
+	.loc 2 544 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r2, #80]
+	ldrh	r0, [r4, #2]
 	cmp	r0, r1
-	bne	.L666
-	.loc 2 498 0 is_stmt 0 discriminator 1
-	ldrh	ip, [r4, #2]
-	ldrh	r0, [r2, #80]
-	cmp	ip, r0
-	.loc 2 499 0 is_stmt 1 discriminator 1
-	lslcc	ip, r6, #1
-	strhcc	r0, [r5, ip]	@ movhi
-.L666:
-	.loc 2 500 0
-	lsl	r6, r6, #1
-	ldrh	r8, [r5, r6]
-	cmp	r3, r8
-	movhi	r10, r1
-	movhi	r3, r8
-	.loc 2 504 0
+	.loc 2 545 0 is_stmt 1 discriminator 1
+	it	cc
+	strhcc	r1, [r5, r7, lsl #1]	@ movhi
+.L683:
+	.loc 2 546 0
+	ldrh	r8, [r5, r7, lsl #1]
+	cmp	fp, r8
+	itt	hi
+	movhi	r10, r3
+	movhi	fp, r8
+	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L668
-	.loc 2 504 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r9, r6]
-	cmp	r0, #0
-	beq	.L668
-	.loc 2 506 0 is_stmt 1
-	mov	r1, #1
-	str	r2, [fp, #-52]
-	str	r3, [fp, #-48]
+	bne	.L685
+	.loc 2 550 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r9, r7, lsl #1]
+	cbz	r0, .L685
+	.loc 2 552 0 is_stmt 1
+	movs	r1, #1
+	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
-.LVL551:
-	.loc 2 507 0
-	strh	r8, [r9, r6]	@ movhi
-	.loc 2 508 0
-	ldr	r2, [fp, #-52]
-	ldrh	r1, [r4, #8]
-	ldr	r3, [fp, #-48]
-.LVL552:
-	sub	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L668:
-	add	r7, r7, #1
-	b	.L665
-.L674:
+.LVL569:
+	.loc 2 553 0
+	strh	r8, [r9, r7, lsl #1]	@ movhi
+	.loc 2 554 0
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L685:
+	adds	r6, r6, #1
+	b	.L682
+.L691:
 	.align	2
-.L673:
+.L690:
 	.word	.LANCHOR0
-.LFE194:
+.LFE204:
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.align	2
+	.align	1
 	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 	.fnstart
-.LFB197:
-	.loc 2 583 0
+.LFB207:
+	.loc 2 632 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL553:
-	.movsp ip
-	mov	ip, sp
-.LCFI232:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI233:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI234:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 583 0
-	.loc 2 591 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL570:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI86:
+	.loc 2 640 0
 	movw	r2, #65535
-	.loc 2 583 0
-	mov	r4, r0
-	.loc 2 591 0
 	ldrh	r3, [r0]
-	.loc 2 586 0
+	.loc 2 632 0
+	mov	r4, r0
+	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL554:
-	.loc 2 591 0
+.LVL571:
+	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L676
-	.loc 2 592 0
+	bne	.L693
+	.loc 2 641 0
 	ldrh	r3, [r0, #8]
-	cmp	r3, #0
-	beq	.L677
-	.loc 2 592 0 is_stmt 0 discriminator 1
-	mov	r2, #592
-	ldr	r1, .L685
-	ldr	r0, .L685+4
+	cbz	r3, .L694
+	.loc 2 641 0 is_stmt 0 discriminator 1
+	movw	r2, #641
+	ldr	r1, .L702
+	ldr	r0, .L702+4
 	bl	printk
-.LVL555:
-.L677:
-	.loc 2 593 0 is_stmt 1
+.LVL572:
+.L694:
+	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL556:
-	.loc 2 595 0
-	mov	r3, #0
-	.loc 2 594 0
+.LVL573:
+	.loc 2 644 0
+	movs	r3, #0
+	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	r3, [r4, #28]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL557:
-.L678:
-	.loc 2 628 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL558:
-.L676:
-	.loc 2 601 0
-	lsl	r3, r3, #1
-	.loc 2 607 0
-	ldr	r2, [r0, #28]
-	.loc 2 587 0
-	ldr	r6, [r0, #24]
-.LVL559:
-	.loc 2 612 0
-	mov	r1, #255
-	.loc 2 601 0
-	ldrh	r7, [r5, r3]
-	.loc 2 602 0
+.LVL574:
+.L695:
+	.loc 2 677 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL575:
+.L693:
+	.loc 2 650 0
+	ldrh	r6, [r5, r3, lsl #1]
+	.loc 2 661 0
+	movs	r1, #255
+	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L685+8
-.LVL560:
-	orr	r3, r3, r7, lsl #10
+	ldr	r5, .L702+8
+.LVL576:
+	.loc 2 656 0
+	ldr	r2, [r0, #28]
+	.loc 2 636 0
+	ldr	r7, [r0, #24]
+.LVL577:
+	.loc 2 651 0
+	orr	r3, r3, r6, lsl #10
+	str	r3, [r5, #3224]
+	.loc 2 652 0
+	ldr	r3, [r5, #3240]
 	str	r3, [r5, #3228]
-	.loc 2 603 0
-	ldr	r3, [r5, #2244]
-	str	r3, [r5, #3232]
-	.loc 2 604 0
+	.loc 2 653 0
 	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3236]
-	.loc 2 607 0
+	str	r3, [r5, #3232]
+	.loc 2 656 0
 	str	r2, [r3, #4]
-	.loc 2 608 0
-	ldr	r2, .L685+12
+	.loc 2 657 0
+	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	r2, [r0, #4]
-	.loc 2 610 0
-	strh	r7, [r3, #2]	@ movhi
-	.loc 2 609 0
+	.loc 2 659 0
+	strh	r6, [r3, #2]	@ movhi
+	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 612 0
+	.loc 2 661 0
 	ldrh	r2, [r5, #80]
-	ldr	r0, [r5, #2244]
-.LVL561:
-	lsl	r2, r2, #3
+	ldr	r0, [r5, #3240]
+.LVL578:
+	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL562:
-	.loc 2 614 0
-	mov	r2, #0
-	.loc 2 613 0
+.LVL579:
+	.loc 2 663 0
+	movs	r2, #0
+	.loc 2 662 0
 	mov	r3, r2
-.LVL563:
-.L679:
-	.loc 2 614 0 discriminator 1
+.LVL580:
+.L696:
+	.loc 2 663 0 discriminator 1
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L681
-	.loc 2 621 0
-	mov	r2, #1
-	mov	r3, #0
-.LVL564:
+	bhi	.L698
+	.loc 2 670 0
+	movs	r2, #1
+	movs	r3, #0
+.LVL581:
 	mov	r1, r2
-	ldr	r0, .L685+16
+	ldr	r0, .L702+12
 	bl	FlashProgPages
-.LVL565:
-	.loc 2 622 0
+.LVL582:
+	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 622 0
-	add	r3, r3, #1
+	.loc 2 671 0
+	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 626 0
+	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL566:
-	.loc 2 627 0
-	b	.L678
-.LVL567:
-.L681:
+.LVL583:
+	.loc 2 676 0
+	b	.L695
+.LVL584:
+.L698:
 	uxth	r1, r2
-	.loc 2 615 0
-	ldr	r0, [r6, r1, lsl #2]
-	cmp	r7, r0, lsr #10
-	bne	.L680
-	.loc 2 617 0
-	ldr	r0, [r5, #2244]
-	.loc 2 616 0
-	add	r3, r3, #1
-.LVL568:
+	.loc 2 664 0
+	ldr	r0, [r7, r1, lsl #2]
+	cmp	r6, r0, lsr #10
+	bne	.L697
+	.loc 2 666 0
+	ldr	r0, [r5, #3240]
+	.loc 2 665 0
+	adds	r3, r3, #1
+.LVL585:
 	uxth	r3, r3
-.LVL569:
-	.loc 2 617 0
+.LVL586:
+	.loc 2 666 0
 	str	r1, [r0, r3, lsl #3]
-	.loc 2 618 0
-	ldr	r0, [r6, r1, lsl #2]
-	ldr	r1, [r5, #2244]
+	.loc 2 667 0
+	ldr	r0, [r7, r1, lsl #2]
+	ldr	r1, [r5, #3240]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L680:
-	add	r2, r2, #1
-	b	.L679
-.L686:
+.L697:
+	adds	r2, r2, #1
+	b	.L696
+.L703:
 	.align	2
-.L685:
+.L702:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
-	.word	-1291
-	.word	.LANCHOR0+3224
-.LFE197:
+	.word	.LANCHOR0+3220
+.LFE207:
 	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.align	2
+	.align	1
 	.global	FtlMapWritePage
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 	.fnstart
-.LFB198:
-	.loc 2 631 0
+.LFB208:
+	.loc 2 680 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL570:
-	.movsp ip
-	mov	ip, sp
-.LCFI235:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI236:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI237:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 631 0
-	.loc 2 634 0
-	mov	r6, #0
-.LVL571:
-	.loc 2 631 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL587:
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI87:
+	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 637 0
-	ldr	r7, .L706
-	.loc 2 631 0
+	.loc 2 686 0
+	ldr	r7, .L723
+	.loc 2 680 0
 	mov	r8, r1
-	mov	r9, r2
+	mov	r10, r2
+	.loc 2 683 0
+	movs	r6, #0
+.LVL588:
+	.loc 2 699 0
+	ldr	r9, .L723+20
 	mov	r5, r7
-.L688:
-	.loc 2 637 0
-	ldr	r3, [r7, #2456]
-	add	r3, r3, #1
-	str	r3, [r7, #2456]
-	.loc 2 638 0
+.L705:
+	.loc 2 686 0
+	ldr	r3, [r7, #2500]
+	adds	r3, r3, #1
+	str	r3, [r7, #2500]
+	.loc 2 687 0
 	ldrh	r3, [r7, #80]
 	ldrh	r2, [r4, #2]
-	sub	r3, r3, #1
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L689
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L706
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L690
-.L689:
-	.loc 2 639 0 is_stmt 1
+	bne	.L707
+.L706:
+	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL572:
-.L690:
-	.loc 2 650 0
-	ldrh	r3, [r4]
-	ldr	r2, [r4, #12]
-	lsl	r3, r3, #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	bne	.L691
-	.loc 2 650 0 is_stmt 0 discriminator 1
-	movw	r2, #650
-	ldr	r1, .L706+4
-	ldr	r0, .L706+8
+.LVL589:
+.L707:
+	.loc 2 699 0
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L708
+	.loc 2 699 0 is_stmt 0 discriminator 1
+	movw	r2, #699
+	mov	r1, r9
+	ldr	r0, .L723+4
 	bl	printk
-.LVL573:
-.L691:
-	.loc 2 651 0 is_stmt 1
+.LVL590:
+.L708:
+	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L692
-	.loc 2 651 0 is_stmt 0 discriminator 1
-	movw	r2, #651
-	ldr	r1, .L706+4
-	ldr	r0, .L706+8
+	bcc	.L709
+	.loc 2 700 0 is_stmt 0 discriminator 1
+	mov	r2, #700
+	mov	r1, r9
+	ldr	r0, .L723+4
 	bl	printk
-.LVL574:
-.L692:
-	.loc 2 652 0 is_stmt 1
-	ldrh	r3, [r4]
-.LBB362:
-.LBB363:
-.LBB364:
+.LVL591:
+.L709:
+	.loc 2 701 0 is_stmt 1
+	ldrh	r2, [r4]
+.LBB385:
+.LBB386:
+.LBB387:
 	.loc 1 202 0
-	mov	r1, #16
-.LBE364:
-.LBE363:
-.LBE362:
-	.loc 2 652 0
-	ldr	r2, [r4, #12]
-	.loc 2 656 0
+	movs	r1, #16
+.LBE387:
+.LBE386:
+.LBE385:
+	.loc 2 701 0
+	ldr	r3, [r4, #12]
+	.loc 2 705 0
 	ldr	r0, [r5, #3244]
-	.loc 2 652 0
-	lsl	r3, r3, #1
-	ldrh	r10, [r2, r3]
-	.loc 2 654 0
+	.loc 2 701 0
+	ldrh	fp, [r3, r2, lsl #1]
+	.loc 2 703 0
 	ldrh	r3, [r4, #2]
-	.loc 2 656 0
-	str	r0, [r5, #3236]
-	.loc 2 655 0
-	str	r9, [r5, #3232]
-	.loc 2 654 0
-	orr	r3, r3, r10, lsl #10
-	str	r3, [r5, #3228]
-.LBB367:
-.LBB366:
-.LBB365:
+	.loc 2 705 0
+	str	r0, [r5, #3232]
+	.loc 2 704 0
+	str	r10, [r5, #3228]
+	.loc 2 703 0
+	orr	r3, r3, fp, lsl #10
+	str	r3, [r5, #3224]
+.LBB390:
+.LBB389:
+.LBB388:
 	.loc 1 202 0
 	bl	__memzero
-.LVL575:
-.LBE365:
-.LBE366:
-.LBE367:
-	.loc 2 659 0
-	ldr	r3, [r5, #3236]
-.LVL576:
-	.loc 2 660 0
+.LVL592:
+.LBE388:
+.LBE389:
+.LBE390:
+	.loc 2 708 0
+	ldr	r3, [r5, #3232]
+.LVL593:
+	.loc 2 709 0
 	ldr	r2, [r4, #28]
-	.loc 2 664 0
-	ldr	r0, .L706+12
-	.loc 2 661 0
+	.loc 2 713 0
+	ldr	r0, .L723+8
+	.loc 2 710 0
 	strh	r8, [r3, #8]	@ movhi
-	.loc 2 660 0
+	.loc 2 709 0
 	str	r2, [r3, #4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	r2, [r4, #4]
-	.loc 2 663 0
-	strh	r10, [r3, #2]	@ movhi
-	.loc 2 662 0
+	.loc 2 712 0
+	strh	fp, [r3, #2]	@ movhi
+	.loc 2 711 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 664 0
-	mov	r3, #1
-.LVL577:
+	.loc 2 713 0
+	movs	r3, #1
+.LVL594:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL578:
-	.loc 2 665 0
+.LVL595:
+	.loc 2 714 0
 	ldrh	r3, [r4, #2]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 667 0
-	ldr	r2, [r5, #3224]
-	cmn	r2, #1
-	bne	.L693
-	.loc 2 668 0
-	ldr	r1, [r5, #3228]
-	.loc 2 669 0
-	add	r6, r6, #1
-.LVL579:
-	.loc 2 668 0
-	ldr	r0, .L706+16
-	.loc 2 669 0
+	.loc 2 716 0
+	ldr	r2, [r5, #3220]
+	adds	r2, r2, #1
+	bne	.L710
+	.loc 2 717 0
+	ldr	r1, [r5, #3224]
+	.loc 2 718 0
+	adds	r6, r6, #1
+.LVL596:
+	.loc 2 717 0
+	ldr	r0, .L723+12
+	.loc 2 718 0
 	uxth	r6, r6
-.LVL580:
-	.loc 2 668 0
+.LVL597:
+	.loc 2 717 0
 	bl	printk
-.LVL581:
-	.loc 2 670 0
+.LVL598:
+	.loc 2 719 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
-	.loc 2 671 0
+	.loc 2 720 0
+	ittt	ls
 	ldrhls	r3, [r5, #80]
-	subls	r3, r3, #1
+	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
-	.loc 2 673 0
+	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L695
-	.loc 2 674 0
+	bls	.L712
+	.loc 2 723 0
 	mov	r2, r6
-	ldr	r1, [r5, #3228]
-	ldr	r0, .L706+20
+	ldr	r1, [r5, #3224]
+	ldr	r0, .L723+16
 	bl	printk
-.LVL582:
-.L696:
-	b	.L696
-.L695:
-	.loc 2 678 0
+.LVL599:
+.L713:
+	b	.L713
+.L712:
+	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L688
-.L705:
-	b	.L705
-.L693:
-	.loc 2 682 0
+	beq	.L705
+.L722:
+	b	.L722
+.L710:
+	.loc 2 731 0
 	cmp	r3, #1
-	beq	.L688
-	.loc 2 685 0
-	ldr	r2, [r5, #3228]
-	.loc 2 687 0
-	mov	r0, #0
-	.loc 2 685 0
+	beq	.L705
+	.loc 2 734 0
+	ldr	r2, [r5, #3224]
+	.loc 2 736 0
+	movs	r0, #0
+	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	.loc 2 687 0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L707:
+	.loc 2 736 0
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL600:
+.L724:
 	.align	2
-.L706:
+.L723:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+258
 	.word	.LC1
-	.word	.LANCHOR0+3224
-	.word	.LC82
-	.word	.LC83
-.LFE198:
+	.word	.LANCHOR0+3220
+	.word	.LC85
+	.word	.LC86
+	.word	.LANCHOR1+258
+.LFE208:
 	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
-	.align	2
+	.align	1
 	.global	ftl_map_blk_gc
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 	.fnstart
-.LFB196:
-	.loc 2 537 0
+.LFB206:
+	.loc 2 586 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL583:
-	.movsp ip
-	mov	ip, sp
-.LCFI238:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI239:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI240:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL601:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 537 0
+.LCFI88:
+.LVL602:
+	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	r6, [r0, #12]
-.LVL584:
-	.loc 2 542 0
+.LVL603:
+	.loc 2 591 0
 	ldr	r9, [r0, #24]
-.LVL585:
-	.loc 2 545 0
+.LVL604:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL586:
-	.loc 2 547 0
+.LVL605:
+	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L720
-	sub	r3, r3, #4
+	ldr	r5, .L737
+	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L709
-	.loc 2 548 0
+	blt	.L726
+	.loc 2 597 0
 	uxth	r0, r0
-	lsl	r0, r0, #1
-	ldrh	r8, [r6, r0]
-.LVL587:
-	.loc 2 549 0
+	ldrh	r8, [r6, r0, lsl #1]
+.LVL606:
+	.loc 2 598 0
 	cmp	r8, #0
-	beq	.L709
-	.loc 2 549 0 is_stmt 0 discriminator 1
+	beq	.L726
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cmp	r3, #0
-	bne	.L709
-	.loc 2 550 0 is_stmt 1
-	mov	r2, #1
+	cbnz	r3, .L726
+	.loc 2 599 0 is_stmt 1
+	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 551 0
-	strh	r3, [r6, r0]	@ movhi
-	.loc 2 552 0
+	.loc 2 600 0
+	strh	r3, [r6, r0, lsl #1]	@ movhi
+	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 552 0
-	sub	r3, r3, #1
+	.loc 2 601 0
+	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L710
-	.loc 2 554 0
+	bcc	.L727
+	.loc 2 603 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL588:
-.L710:
-	.loc 2 537 0 discriminator 1
-	mov	r6, #0
-.LVL589:
-.L711:
-	.loc 2 556 0 discriminator 1
+.LVL607:
+.L727:
+	.loc 2 613 0 discriminator 1
+	ldr	fp, .L737+12
+	.loc 2 586 0 discriminator 1
+	movs	r6, #0
+.LVL608:
+.L728:
+	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L715
-	.loc 2 572 0
-	mov	r1, #1
+	bhi	.L732
+	.loc 2 621 0
+	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL590:
-	.loc 2 573 0
-	mov	r3, #0
+.LVL609:
+	.loc 2 622 0
+	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL591:
-.L709:
-	.loc 2 577 0
+.LVL610:
+.L726:
+	.loc 2 626 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L716
-	.loc 2 578 0
+	bcc	.L733
+	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL592:
-.L716:
-	.loc 2 580 0
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI241:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL593:
-.L715:
-.LCFI242:
+.LVL611:
+.L733:
+	.loc 2 629 0
+	movs	r0, #0
+	add	sp, sp, #12
+.LCFI89:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL612:
+.L732:
+.LCFI90:
 	uxth	r7, r6
-	.loc 2 557 0
+	.loc 2 606 0
 	ldr	r3, [r9, r7, lsl #2]
 	cmp	r8, r3, lsr #10
-	bne	.L712
-	.loc 2 558 0
+	bne	.L729
+	.loc 2 607 0
 	ldr	r3, [r5, #3804]
-	.loc 2 562 0
-	ldr	r0, .L720+4
-	.loc 2 558 0
-	str	r3, [r5, #3232]
-	.loc 2 559 0
+	.loc 2 611 0
+	ldr	r0, .L737+4
+	.loc 2 607 0
+	str	r3, [r5, #3228]
+	.loc 2 608 0
 	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3236]
-	.loc 2 560 0
+	str	r3, [r5, #3232]
+	.loc 2 609 0
 	ldr	r2, [r9, r7, lsl #2]
-	.loc 2 559 0
-	str	r3, [fp, #-48]
-	.loc 2 560 0
-	str	r2, [r5, #3228]
-	.loc 2 562 0
-	mov	r2, #1
+	.loc 2 608 0
+	str	r3, [sp, #4]
+	.loc 2 609 0
+	str	r2, [r5, #3224]
+	.loc 2 611 0
+	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL594:
-	.loc 2 564 0
-	ldr	r3, [fp, #-48]
+.LVL613:
+	.loc 2 613 0
+	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L713
-	.loc 2 564 0 is_stmt 0 discriminator 1
-	mov	r2, #564
-	ldr	r1, .L720+8
-	ldr	r0, .L720+12
+	beq	.L730
+	.loc 2 613 0 is_stmt 0 discriminator 1
+	movw	r2, #613
+	ldr	r1, .L737+8
+	mov	r0, fp
 	bl	printk
-.LVL595:
-.L713:
-	.loc 2 565 0 is_stmt 1
-	ldr	r3, [r5, #3224]
-	cmn	r3, #1
-	.loc 2 566 0
-	moveq	r3, #0
-	streq	r3, [r9, r7, lsl #2]
-	.loc 2 565 0
-	beq	.L712
-	.loc 2 568 0
-	ldr	r2, [r5, #3232]
+.LVL614:
+.L730:
+	.loc 2 614 0 is_stmt 1
+	ldr	r3, [r5, #3220]
+	adds	r3, r3, #1
+	bne	.L731
+	.loc 2 615 0
+	movs	r3, #0
+	str	r3, [r9, r7, lsl #2]
+.L729:
+	adds	r6, r6, #1
+	b	.L728
+.L731:
+	.loc 2 617 0
+	ldr	r2, [r5, #3228]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL596:
-.L712:
-	add	r6, r6, #1
-	b	.L711
-.L721:
+.LVL615:
+	b	.L729
+.L738:
 	.align	2
-.L720:
+.L737:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+274
 	.word	.LC1
-.LFE196:
+.LFE206:
 	.fnend
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.align	2
+	.align	1
 	.global	flush_l2p_region
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 	.fnstart
-.LFB199:
-	.loc 2 690 0
+.LFB209:
+	.loc 2 739 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL597:
-	.movsp ip
-	mov	ip, sp
-.LCFI243:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI244:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI245:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 690 0
-	.loc 2 693 0
-	mov	r4, #12
-	ldr	r5, .L723
-	mul	r4, r4, r0
-	ldr	r3, [r5, #2424]
-	.loc 2 694 0
-	add	r0, r5, #3856
-.LVL598:
-	add	r0, r0, #8
-	.loc 2 693 0
-	add	r2, r3, r4
-	.loc 2 694 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL616:
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI91:
+	.loc 2 742 0
+	movs	r4, #12
+	ldr	r5, .L740
+	muls	r4, r0, r4
+	ldr	r3, [r5, #2468]
+	.loc 2 743 0
+	addw	r0, r5, #3864
+.LVL617:
+	.loc 2 742 0
+	adds	r2, r3, r4
+	.loc 2 743 0
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL599:
-	.loc 2 695 0
-	ldr	r3, [r5, #2424]
-	.loc 2 697 0
-	mov	r0, #0
-	.loc 2 695 0
-	add	r4, r3, r4
+.LVL618:
+	.loc 2 744 0
+	ldr	r3, [r5, #2468]
+	.loc 2 746 0
+	movs	r0, #0
+	.loc 2 744 0
+	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 697 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L724:
+	.loc 2 746 0
+	pop	{r3, r4, r5, pc}
+.L741:
 	.align	2
-.L723:
+.L740:
 	.word	.LANCHOR0
-.LFE199:
+.LFE209:
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
-	.align	2
+	.align	1
 	.global	log2phys
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
 	.fnstart
-.LFB202:
-	.loc 2 753 0
+.LFB212:
+	.loc 2 802 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL600:
-	.movsp ip
-	mov	ip, sp
-.LCFI246:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI247:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI248:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 753 0
-	.loc 2 757 0
-	mvn	r6, #0
-	.loc 2 753 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL619:
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI92:
+	.loc 2 802 0
 	mov	r7, r1
-	.loc 2 756 0
-	ldr	r4, .L739
-	.loc 2 753 0
-	mov	r10, r2
-	.loc 2 756 0
-	ldrh	r3, [r4, #84]
-	add	r3, r3, #7
+	.loc 2 805 0
+	ldr	r4, .L756
+	.loc 2 802 0
+	mov	r9, r2
+	.loc 2 805 0
+	ldrh	r5, [r4, #84]
+	adds	r3, r5, #7
+	.loc 2 806 0
+	movs	r5, #1
+	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 757 0
-	bic	r6, r0, r6, lsl r3
-	.loc 2 759 0
-	ldr	r3, [r4, #2436]
-	.loc 2 756 0
+	.loc 2 806 0
+	lsls	r5, r5, r3
+	.loc 2 808 0
+	ldr	r3, [r4, #2480]
+	.loc 2 806 0
+	subs	r5, r5, #1
+	.loc 2 805 0
 	uxth	r8, r8
-.LVL601:
-	.loc 2 757 0
-	uxth	r6, r6
-.LVL602:
-	.loc 2 759 0
+.LVL620:
+	.loc 2 806 0
+	ands	r5, r5, r0
+	.loc 2 808 0
 	cmp	r0, r3
-	bcc	.L726
-	.loc 2 759 0 is_stmt 0 discriminator 1
-	movw	r2, #759
-	ldr	r1, .L739+4
-	ldr	r0, .L739+8
-.LVL603:
+	.loc 2 806 0
+	uxth	r5, r5
+.LVL621:
+	.loc 2 808 0
+	bcc	.L743
+	.loc 2 808 0 is_stmt 0 discriminator 1
+	mov	r2, #808
+	ldr	r1, .L756+4
+	ldr	r0, .L756+8
+.LVL622:
 	bl	printk
-.LVL604:
-.L726:
-	.loc 2 761 0 is_stmt 1
+.LVL623:
+.L743:
+	.loc 2 810 0 is_stmt 1
 	ldrh	r2, [r4, #114]
-	mov	r3, #0
-	.loc 2 762 0
-	ldr	r1, [r4, #2424]
-	mov	r9, #12
-.LVL605:
-.L727:
-	uxth	r5, r3
-	.loc 2 761 0 discriminator 1
-	cmp	r5, r2
-	bcc	.L732
-	.loc 2 776 0
+	movs	r3, #0
+	.loc 2 811 0
+	ldr	r1, [r4, #2468]
+	mov	r10, #12
+.LVL624:
+.L744:
+	uxth	r6, r3
+	.loc 2 810 0 discriminator 1
+	cmp	r6, r2
+	bcc	.L749
+	.loc 2 825 0
 	bl	select_l2p_ram_region
-.LVL606:
-	.loc 2 777 0
-	mul	r9, r9, r0
-	ldr	r3, [r4, #2424]
-	.loc 2 776 0
-	mov	r5, r0
-	.loc 2 777 0
-	ldrh	r1, [r3, r9]
-	add	r2, r3, r9
+.LVL625:
+	.loc 2 826 0
+	mul	r10, r10, r0
+	ldr	r3, [r4, #2468]
+	.loc 2 825 0
+	mov	r6, r0
+	.loc 2 826 0
+	ldrh	r1, [r3, r10]
+	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L733
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L750
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L733
-	.loc 2 778 0 is_stmt 1
+	bge	.L750
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL607:
-.L733:
-	.loc 2 781 0
-	mov	r1, r5
+.LVL626:
+.L750:
+	.loc 2 830 0
+	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL608:
-	.loc 2 782 0
-	b	.L728
-.LVL609:
-.L732:
-	add	r3, r3, #1
-	.loc 2 762 0
-	mla	r0, r9, r3, r1
-.LVL610:
+.LVL627:
+	.loc 2 831 0
+	b	.L745
+.LVL628:
+.L749:
+	adds	r3, r3, #1
+	.loc 2 811 0
+	mla	r0, r10, r3, r1
+.LVL629:
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L727
-.L728:
-	.loc 2 764 0
-	cmp	r10, #0
-	mov	r3, #12
-	bne	.L729
-	.loc 2 765 0
-	ldr	r2, [r4, #2424]
-	mla	r3, r3, r5, r2
+	bne	.L744
+.L745:
+	movs	r3, #12
+	.loc 2 813 0
+	cmp	r9, #0
+	bne	.L746
+	.loc 2 814 0
+	ldr	r2, [r4, #2468]
+	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r6, lsl #2]
+	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L730:
-	.loc 2 771 0
-	ldr	r2, [r4, #2424]
-	mov	r3, #12
-	.loc 2 783 0
-	mov	r0, #0
-	.loc 2 771 0
-	mla	r5, r3, r5, r2
-.LVL611:
-	ldr	r3, [r5, #4]
-	cmn	r3, #1
-	.loc 2 772 0
-	addne	r3, r3, #1
-	strne	r3, [r5, #4]
-	.loc 2 783 0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL612:
-.L729:
-	.loc 2 767 0
-	mul	r3, r3, r5
-	ldr	r2, [r4, #2424]
+.L747:
+	.loc 2 820 0
+	ldr	r2, [r4, #2468]
+	movs	r3, #12
+	mla	r6, r3, r6, r2
+.LVL630:
+	ldr	r3, [r6, #4]
+	adds	r2, r3, #1
+	beq	.L753
+	.loc 2 821 0
+	adds	r3, r3, #1
+	str	r3, [r6, #4]
+.L753:
+	.loc 2 832 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL631:
+.L746:
+	.loc 2 816 0
+	muls	r3, r6, r3
+	ldr	r2, [r4, #2468]
 	ldr	r1, [r7]
 	add	r2, r2, r3
 	ldr	r2, [r2, #8]
-	str	r1, [r2, r6, lsl #2]
-	.loc 2 768 0
-	ldr	r2, [r4, #2424]
-	add	r3, r2, r3
+	str	r1, [r2, r5, lsl #2]
+	.loc 2 817 0
+	ldr	r2, [r4, #2468]
+	.loc 2 818 0
+	strh	r8, [r4, #2472]	@ movhi
+	.loc 2 817 0
+	add	r3, r3, r2
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 769 0
-	movw	r3, #2428
-	strh	r8, [r4, r3]	@ movhi
-	b	.L730
-.L740:
+	b	.L747
+.L757:
 	.align	2
-.L739:
+.L756:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
-.LFE202:
+.LFE212:
 	.fnend
 	.size	log2phys, .-log2phys
-	.align	2
+	.align	1
 	.global	FtlReUsePrevPpa
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 	.fnstart
-.LFB220:
-	.loc 2 1628 0
+.LFB230:
+	.loc 2 1677 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL613:
-	.movsp ip
-	mov	ip, sp
-.LCFI249:
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, fp, ip, lr}
-.LCFI250:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI251:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL632:
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.save {r4, r5, r6, r7, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1628 0
-	.loc 2 1631 0
-	ldr	r5, .L751
-	.loc 2 1628 0
-	mov	r7, r0
-	.loc 2 1629 0
+.LCFI93:
+.LVL633:
+	.loc 2 1677 0
+	mov	r6, r0
+	.loc 2 1680 0
+	ldr	r5, .L768
+.LVL634:
+	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL614:
-	.loc 2 1628 0
-	str	r1, [fp, #-40]
-	.loc 2 1629 0
+.LVL635:
+	.loc 2 1677 0
+	str	r1, [sp, #4]
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL615:
-	.loc 2 1631 0
-	ldr	r2, [r5, #2260]
-.LVL616:
-	lsl	r6, r0, #1
-	ldrh	r3, [r2, r6]
-	cmp	r3, #0
-	bne	.L742
-	.loc 2 1632 0
-	ldr	r4, [r5, #2272]
-	cmp	r4, #0
-	beq	.L743
-.LBB368:
-	.loc 2 1635 0
-	movw	r2, #2276
-	.loc 2 1636 0
-	ldr	ip, .L751+4
-	.loc 2 1635 0
-	ldrh	r1, [r5, r2]
-.LVL617:
-	.loc 2 1644 0
-	mov	lr, #6
-	.loc 2 1636 0
-	ldr	r2, [r5, #2252]
-	.loc 2 1644 0
-	movw	r8, #65535
-	.loc 2 1636 0
-	sub	r4, r4, r2
-	asr	r4, r4, #1
-	mul	r4, ip, r4
+.LVL636:
+	.loc 2 1680 0
+	ldr	r2, [r5, #2300]
+	.loc 2 1678 0
+	mov	r7, r0
+.LVL637:
+	.loc 2 1680 0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L759
+	.loc 2 1681 0
+	ldr	r4, [r5, #2316]
+	cbz	r4, .L760
+.LBB391:
+	.loc 2 1685 0
+	ldr	r1, [r5, #2292]
+	.loc 2 1693 0
+	mov	ip, #6
+	.loc 2 1685 0
+	ldr	r2, .L768+4
+	.loc 2 1693 0
+	movw	lr, #65535
+	.loc 2 1684 0
+	ldrh	r0, [r5, #2320]
+.LVL638:
+	.loc 2 1685 0
+	subs	r4, r4, r1
+	asrs	r4, r4, #1
+	muls	r4, r2, r4
 	uxth	r4, r4
-.LVL618:
-.L744:
-	.loc 2 1637 0 discriminator 1
-	uxth	ip, r3
-	cmp	r1, ip
-	bls	.L743
-	.loc 2 1638 0
-	cmp	r4, r0
-	bne	.L745
-	.loc 2 1639 0
+.LVL639:
+.L761:
+	.loc 2 1686 0 discriminator 1
+	uxth	r2, r3
+	cmp	r0, r2
+	bls	.L760
+	.loc 2 1687 0
+	cmp	r4, r7
+	bne	.L762
+	.loc 2 1688 0
 	mov	r1, r4
-.LVL619:
-	ldr	r0, .L751+8
-.LVL620:
+	ldr	r0, .L768+8
+.LVL640:
 	bl	List_remove_node
-.LVL621:
-	movw	r3, #2276
-	ldrh	r3, [r5, r3]
-	cmp	r3, #0
-	bne	.L746
-	.loc 2 1639 0 is_stmt 0 discriminator 1
-	movw	r2, #1639
-	ldr	r1, .L751+12
-	ldr	r0, .L751+16
+.LVL641:
+	ldrh	r3, [r5, #2320]
+	cbnz	r3, .L763
+	.loc 2 1688 0 is_stmt 0 discriminator 1
+	mov	r2, #1688
+	ldr	r1, .L768+12
+	ldr	r0, .L768+16
 	bl	printk
-.LVL622:
-.L746:
-	.loc 2 1639 0 discriminator 3
-	movw	r2, #2276
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+.LVL642:
+.L763:
+	.loc 2 1688 0 discriminator 3
+	ldrh	r3, [r5, #2320]
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1639 0 discriminator 3
-	ldrh	r3, [r5, r2]
-	sub	r3, r3, #1
-	strh	r3, [r5, r2]	@ movhi
-	.loc 2 1640 0 discriminator 3
+	.loc 2 1688 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r5, #2320]	@ movhi
+	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL623:
-	.loc 2 1641 0 discriminator 3
-	ldr	r2, [r5, #2260]
-	ldrh	r3, [r2, r6]
-.LVL624:
-.L742:
-.LBE368:
-	.loc 2 1650 0
-	add	r3, r3, #1
-	strh	r3, [r2, r6]	@ movhi
-	b	.L743
-.LVL625:
-.L745:
-.LBB369:
-	.loc 2 1644 0
-	mul	r4, lr, r4
-.LVL626:
-	add	r3, r3, #1
-	ldrh	r4, [r2, r4]
-.LVL627:
-	cmp	r4, r8
-	bne	.L744
-.L743:
-.LBE369:
-	.loc 2 1652 0
-	mov	r2, #1
-	sub	r1, fp, #40
-.LVL628:
-	mov	r0, r7
-.LVL629:
+.LVL643:
+	.loc 2 1690 0 discriminator 3
+	ldr	r2, [r5, #2300]
+	ldrh	r3, [r2, r7, lsl #1]
+.L759:
+.LBE391:
+	.loc 2 1699 0
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L760
+.LVL644:
+.L762:
+.LBB392:
+	.loc 2 1693 0
+	mul	r4, ip, r4
+.LVL645:
+	adds	r3, r3, #1
+	ldrh	r4, [r1, r4]
+.LVL646:
+	cmp	r4, lr
+	bne	.L761
+.L760:
+.LBE392:
+	.loc 2 1701 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+.LVL647:
 	bl	log2phys
-.LVL630:
-	.loc 2 1653 0
-	sub	sp, fp, #32
-.LCFI252:
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL631:
-.L752:
+.LVL648:
+	.loc 2 1702 0
+	add	sp, sp, #12
+.LCFI94:
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL649:
+.L769:
 	.align	2
-.L751:
+.L768:
 	.word	.LANCHOR0
 	.word	-1431655765
-	.word	.LANCHOR0+2272
+	.word	.LANCHOR0+2316
 	.word	.LANCHOR1+298
 	.word	.LC1
-.LFE220:
+.LFE230:
 	.fnend
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.align	2
+	.align	1
 	.global	ftl_scan_all_data
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	.fnstart
-.LFB231:
-	.loc 2 2275 0
+.LFB241:
+	.loc 2 2325 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI253:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI254:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI255:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI95:
+	.loc 2 2331 0
+	movs	r5, #0
+.LVL650:
+	ldr	r6, .L784
+	.loc 2 2325 0
 	.pad #32
 	sub	sp, sp, #32
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2275 0
-	.loc 2 2281 0
-	ldr	r6, .L761
-	mov	r5, #0
-.LVL632:
-	.loc 2 2280 0
-	mov	r1, #0
-	ldr	r0, .L761+4
-	bl	printk
-.LVL633:
+.LCFI96:
+	.loc 2 2330 0
+	movs	r1, #0
+	.loc 2 2334 0
+	ldr	r8, .L784+16
 	mov	r4, r6
-.LVL634:
-.L754:
-	.loc 2 2281 0 discriminator 1
-	ldr	r3, [r6, #2436]
+	.loc 2 2330 0
+	ldr	r0, .L784+4
+	bl	printk
+.LVL651:
+.L771:
+	.loc 2 2331 0 discriminator 1
+	ldr	r3, [r6, #2480]
 	cmp	r5, r3
-	bcc	.L760
-	.loc 2 2303 0
-	sub	sp, fp, #28
-.LCFI256:
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL635:
-.L760:
-.LCFI257:
-	.loc 2 2282 0
-	mov	r2, #0
-	sub	r1, fp, #32
+	bcc	.L777
+	.loc 2 2353 0
+	add	sp, sp, #32
+.LCFI97:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL652:
+.L777:
+.LCFI98:
+	.loc 2 2332 0
+	movs	r2, #0
+	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL636:
-	.loc 2 2283 0
+.LVL653:
+	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cmp	r3, #0
-	bne	.L755
-	.loc 2 2284 0
-	ldr	r2, [fp, #-32]
+	cbnz	r3, .L772
+	.loc 2 2334 0
+	ldr	r2, [sp, #28]
 	mov	r1, r5
-	ldr	r0, .L761+8
+	mov	r0, r8
 	bl	printk
-.LVL637:
-.L755:
-	.loc 2 2285 0
-	ldr	r3, [fp, #-32]
-	cmn	r3, #1
-	beq	.L757
-	.loc 2 2286 0
-	str	r3, [r4, #3228]
-	.loc 2 2290 0
-	mov	r2, #0
-	.loc 2 2288 0
-	ldr	r3, [r4, #2244]
-	.loc 2 2292 0
-	mov	r1, #1
-	.loc 2 2289 0
+.LVL654:
+.L772:
+	.loc 2 2335 0
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L774
+	.loc 2 2336 0
+	str	r3, [r4, #3224]
+	.loc 2 2340 0
+	movs	r2, #0
+	.loc 2 2338 0
+	ldr	r3, [r4, #3240]
+	.loc 2 2342 0
+	movs	r1, #1
+	.loc 2 2339 0
 	ldr	r7, [r4, #3244]
-	.loc 2 2292 0
-	ldr	r0, .L761+12
-	.loc 2 2288 0
-	str	r3, [r4, #3232]
-	.loc 2 2287 0
-	str	r5, [r4, #3240]
-	.loc 2 2289 0
-	str	r7, [r4, #3236]
-	.loc 2 2290 0
-	str	r2, [r4, #3224]
-	.loc 2 2292 0
+	.loc 2 2342 0
+	ldr	r0, .L784+8
+	.loc 2 2338 0
+	str	r3, [r4, #3228]
+	.loc 2 2337 0
+	str	r5, [r4, #3236]
+	.loc 2 2339 0
+	str	r7, [r4, #3232]
+	.loc 2 2340 0
+	str	r2, [r4, #3220]
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL638:
-	.loc 2 2293 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	cmpne	r3, #256
-	beq	.L758
-	.loc 2 2294 0
+.LVL655:
+	.loc 2 2343 0
+	ldr	r3, [r4, #3220]
+	cmp	r3, #256
+	beq	.L775
+	.loc 2 2343 0 is_stmt 0 discriminator 1
+	adds	r3, r3, #1
+	beq	.L775
+	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L757
-.L758:
-	.loc 2 2297 0
-	ldr	r2, [r4, #3232]
-	ldr	r3, [r4, #3236]
-	ldr	r0, .L761+16
+	beq	.L774
+.L775:
+	.loc 2 2347 0
+	ldr	r2, [r4, #3228]
+	ldr	r3, [r4, #3232]
+	ldr	r0, .L784+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8960,2595 +8293,2387 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3228]
+	ldr	r2, [r4, #3224]
 	bl	printk
-.LVL639:
-.L757:
-	.loc 2 2281 0 discriminator 2
-	add	r5, r5, #1
-	b	.L754
-.L762:
+.LVL656:
+.L774:
+	.loc 2 2331 0 discriminator 2
+	adds	r5, r5, #1
+	b	.L771
+.L785:
 	.align	2
-.L761:
+.L784:
 	.word	.LANCHOR0
-	.word	.LC84
-	.word	.LC85
-	.word	.LANCHOR0+3224
-	.word	.LC86
-.LFE231:
+	.word	.LC87
+	.word	.LANCHOR0+3220
+	.word	.LC89
+	.word	.LC88
+.LFE241:
 	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.align	2
+	.align	1
 	.global	FtlReadRefresh
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
 	.fnstart
-.LFB258:
+.LFB268:
 	.loc 5 419 0
 	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI258:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI259:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI260:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 425 0
+	ldr	r3, .L799
+	.loc 5 419 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI99:
 	.pad #88
 	sub	sp, sp, #88
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 419 0
-	.loc 5 425 0
-	ldr	r3, .L776
-	ldr	r0, [r3, #2696]
+.LCFI100:
 	mov	r4, r3
+	.loc 5 425 0
+	ldr	r0, [r3, #2692]
 	cmp	r0, #0
-	beq	.L764
+	beq	.L787
 	.loc 5 426 0
-	ldr	r1, [r3, #2700]
-	ldr	r2, [r3, #2436]
+	ldr	r1, [r3, #2696]
+	ldr	r2, [r3, #2480]
 	cmp	r1, r2
-	bcs	.L765
+	bcs	.L788
 	mov	r5, #2048
-.LVL640:
-.L770:
-.LBB375:
-.LBB376:
+.LVL657:
+.L793:
+.LBB398:
+.LBB399:
 	.loc 5 428 0
-	ldr	r0, [r4, #2700]
-	ldr	r3, [r4, #2436]
+	ldr	r0, [r4, #2696]
+	ldr	r3, [r4, #2480]
 	cmp	r0, r3
-	bcs	.L767
+	bcs	.L790
 	.loc 5 430 0
-	mov	r2, #0
-	sub	r1, fp, #108
+	movs	r2, #0
+	mov	r1, sp
 	bl	log2phys
-.LVL641:
+.LVL658:
 	.loc 5 432 0
-	ldr	r2, [fp, #-108]
+	ldr	r2, [sp]
 	.loc 5 431 0
-	ldr	r3, [r4, #2700]
+	ldr	r3, [r4, #2696]
 	.loc 5 432 0
-	cmn	r2, #1
+	adds	r1, r2, #1
 	.loc 5 431 0
 	add	r3, r3, #1
-	str	r3, [r4, #2700]
+	str	r3, [r4, #2696]
 	.loc 5 432 0
-	beq	.L768
-.LBB377:
+	beq	.L791
+.LBB400:
 	.loc 5 435 0
-	str	r3, [fp, #-88]
+	str	r3, [sp, #20]
 	.loc 5 438 0
-	sub	r0, fp, #20
+	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L776+4
+	ldr	r3, .L799+4
 	.loc 5 439 0
-	mov	r1, #1
+	movs	r1, #1
 	.loc 5 434 0
-	str	r2, [fp, #-100]
+	str	r2, [sp, #8]
 	.loc 5 438 0
-	mov	r2, #0
+	movs	r2, #0
 	str	r2, [r0, #-84]!
 	.loc 5 436 0
-	str	r3, [fp, #-96]
+	str	r3, [sp, #12]
 	.loc 5 437 0
-	sub	r3, fp, #84
-	str	r3, [fp, #-92]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL642:
+.LVL659:
 	.loc 5 440 0
-	ldr	r3, [fp, #-104]
+	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L767
+	bne	.L790
 	.loc 5 442 0
-	ldr	r0, [fp, #-108]
+	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL643:
+.LVL660:
 	bl	FtlGcRefreshBlock
-.LVL644:
-.L767:
-.LBE377:
-	mvn	r0, #0
-.L763:
-.LBE376:
-.LBE375:
+.LVL661:
+.L790:
+.LBE400:
+	mov	r0, #-1
+.L786:
+.LBE399:
+.LBE398:
 	.loc 5 466 0
-	sub	sp, fp, #20
-.LCFI261:
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L768:
-.LCFI262:
-.LBB379:
-.LBB378:
+	add	sp, sp, #88
+.LCFI101:
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L791:
+.LCFI102:
+.LBB402:
+.LBB401:
 	.loc 5 427 0
 	subs	r5, r5, #1
-	bne	.L770
-	b	.L767
-.LVL645:
-.L765:
-.LBE378:
-.LBE379:
+	bne	.L793
+	b	.L790
+.LVL662:
+.L788:
+.LBE401:
+.LBE402:
 	.loc 5 451 0
-	ldr	r2, [r3, #2440]
+	ldr	r2, [r3, #2484]
 	.loc 5 449 0
-	mov	r0, #0
-	str	r0, [r3, #2696]
+	movs	r0, #0
+	str	r0, [r3, #2692]
 	.loc 5 450 0
-	str	r0, [r3, #2700]
+	str	r0, [r3, #2696]
 	.loc 5 451 0
-	str	r2, [r3, #2692]
-	b	.L763
-.L764:
-.LBB380:
+	str	r2, [r3, #2688]
+	b	.L786
+.L787:
+.LBB403:
 	.loc 5 456 0
-	ldr	r1, [r3, #2440]
-	ldr	r2, [r3, #2692]
-	add	ip, r1, #1048576
-	cmp	r2, ip
-	bhi	.L773
-	.loc 5 454 0
-	ldr	r3, [r3, #2496]
-	.loc 5 457 0
-	mov	ip, #33554432
+	ldr	r1, [r3, #2484]
+	ldr	r6, [r3, #2688]
+	add	r2, r1, #1048576
+	cmp	r6, r2
+	bhi	.L796
 	.loc 5 454 0
-	lsr	r3, r3, #10
+	ldr	r2, [r3, #2540]
+	lsrs	r5, r2, #10
+	mov	r2, #33554432
+	asrs	r2, r2, r5
+.LVL663:
 	.loc 5 457 0
-	add	r2, r2, ip, asr r3
+	add	r2, r2, r6
+.LVL664:
 	cmp	r1, r2
-	bhi	.L773
+	bhi	.L796
 	.loc 5 458 0
-	ldr	r3, .L776+8
-	ldrb	r3, [r3, #28]	@ zero_extendqisi2
+	ldrb	r3, [r3, #2272]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L763
-.L773:
+	bne	.L786
+.L796:
 	.loc 5 460 0
-	mov	r3, #1
+	movs	r3, #1
 	.loc 5 461 0
-	mov	r0, #0
+	movs	r0, #0
 	.loc 5 460 0
-	str	r3, [r4, #2696]
+	str	r3, [r4, #2692]
 	.loc 5 461 0
-	str	r0, [r4, #2700]
+	str	r0, [r4, #2696]
 	.loc 5 462 0
-	str	r1, [r4, #2692]
-	b	.L763
-.L777:
+	str	r1, [r4, #2688]
+	b	.L786
+.L800:
 	.align	2
-.L776:
+.L799:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-	.word	.LANCHOR0+2504
-.LBE380:
-.LFE258:
+.LBE403:
+.LFE268:
 	.fnend
 	.size	FtlReadRefresh, .-FtlReadRefresh
-	.align	2
+	.align	1
 	.global	ftl_check_vpc
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	.fnstart
-.LFB230:
-	.loc 2 2223 0
+.LFB240:
+	.loc 2 2273 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI263:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI264:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI265:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2223 0
-	.loc 2 2232 0
-	ldr	r6, .L802
-	mov	r4, #0
-.LVL646:
-	.loc 2 2229 0
-	ldr	r1, .L802+4
-	ldr	r0, .L802+8
+.LCFI103:
+	.loc 2 2282 0
+	movs	r4, #0
+.LVL665:
+	ldr	r6, .L825
+	.loc 2 2288 0
+	ldr	r7, .L825+4
+	.loc 2 2279 0
+	ldr	r1, .L825+8
 	mov	r5, r6
+	ldr	r0, .L825+12
 	bl	printk
-.LVL647:
-.LBB387:
-.LBB388:
-.LBB389:
+.LVL666:
+.LBB410:
+.LBB411:
+.LBB412:
 	.loc 1 202 0
 	mov	r1, #8192
-	ldr	r0, .L802+12
+	ldr	r0, .L825+4
 	bl	__memzero
-.LVL648:
-.L779:
-.LBE389:
-.LBE388:
-.LBE387:
-	.loc 2 2232 0 discriminator 1
-	ldr	r3, [r6, #2436]
+.LVL667:
+.L802:
+.LBE412:
+.LBE411:
+.LBE410:
+	.loc 2 2282 0 discriminator 1
+	ldr	r3, [r6, #2480]
 	cmp	r4, r3
-	bcc	.L781
-	.loc 2 2245 0 discriminator 1
-	ldr	r8, .L802+12
-	mov	r4, #0
-.LVL649:
-	.loc 2 2247 0 discriminator 1
-	ldr	r9, .L802+16
-	mov	r6, r4
-.LVL650:
-.L782:
-	.loc 2 2243 0 discriminator 1
+	bcc	.L804
+	.loc 2 2295 0 discriminator 1
+	ldr	r8, .L825+4
+	movs	r4, #0
+.LVL668:
+	.loc 2 2297 0 discriminator 1
+	ldr	r10, .L825+24
+	mov	r7, r4
+.LVL669:
+	.loc 2 2295 0 discriminator 1
+	movw	r9, #65535
+.L805:
+	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r5, #16]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L784
-	.loc 2 2255 0
-	ldr	r4, [r5, #2272]
-	cmp	r4, #0
-	beq	.L785
-.LBB390:
-	.loc 2 2257 0
-	movw	r3, #2276
-	.loc 2 2263 0
-	ldr	r9, .L802+12
-	.loc 2 2257 0
-	ldrh	r7, [r5, r3]
-.LVL651:
-	.loc 2 2259 0
-	mov	r8, #0
-	.loc 2 2258 0
-	ldr	r3, [r5, #2252]
-	.loc 2 2263 0
-	ldr	r10, .L802+20
-	.loc 2 2258 0
-	sub	r4, r4, r3
-	ldr	r3, .L802+24
-	asr	r4, r4, #1
-	mul	r4, r3, r4
+	bhi	.L807
+	.loc 2 2305 0
+	ldr	r4, [r5, #2316]
+	cbz	r4, .L808
+.LBB413:
+	.loc 2 2308 0
+	ldr	r3, [r5, #2292]
+	.loc 2 2309 0
+	movs	r6, #0
+	.loc 2 2307 0
+	ldrh	r8, [r5, #2320]
+.LVL670:
+	.loc 2 2316 0
+	mov	fp, #6
+	.loc 2 2313 0
+	ldr	r9, .L825+4
+	.loc 2 2308 0
+	subs	r4, r4, r3
+	ldr	r3, .L825+16
+	asrs	r4, r4, #1
+	.loc 2 2313 0
+	ldr	r10, .L825+28
+	.loc 2 2308 0
+	muls	r4, r3, r4
 	uxth	r4, r4
-.L786:
-	.loc 2 2259 0 discriminator 1
-	uxth	r3, r8
-	cmp	r7, r3
-	bls	.L785
-	.loc 2 2261 0
-	ldr	r2, [r5, #2260]
-	lsl	r3, r4, #1
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	beq	.L787
-	.loc 2 2264 0
-	mov	r6, #1
-	.loc 2 2263 0
-	ldrh	r3, [r9, r3]
+.L809:
+	.loc 2 2309 0 discriminator 1
+	uxth	r3, r6
+	cmp	r8, r3
+	bls	.L808
+	.loc 2 2311 0
+	ldr	r3, [r5, #2300]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L810
+	.loc 2 2314 0
+	movs	r7, #1
+	.loc 2 2313 0
+	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
 	bl	printk
-.LVL652:
-.L787:
-	.loc 2 2266 0
-	mov	r3, #6
-	ldr	r2, [r5, #2252]
-	mul	r4, r3, r4
+.LVL671:
+.L810:
+	.loc 2 2316 0
+	mul	r4, fp, r4
+	ldr	r3, [r5, #2292]
+	adds	r6, r6, #1
+	ldrh	r4, [r3, r4]
 	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L786
-.L785:
-.LBE390:
-	.loc 2 2271 0
-	cmp	r6, #0
-	beq	.L778
-	.loc 2 2271 0 is_stmt 0 discriminator 1
-	movw	r2, #2271
-	ldr	r1, .L802+4
-	ldr	r0, .L802+28
+	bne	.L809
+.L808:
+.LBE413:
+	.loc 2 2321 0
+	cbz	r7, .L801
+	.loc 2 2321 0 is_stmt 0 discriminator 1
+	movw	r2, #2321
+	ldr	r1, .L825+8
+	ldr	r0, .L825+20
 	bl	printk
-.LVL653:
-.L778:
-	.loc 2 2272 0 is_stmt 1
-	sub	sp, fp, #40
-.LCFI266:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL654:
-.L781:
-.LCFI267:
-	.loc 2 2234 0
-	mov	r2, #0
-	sub	r1, fp, #48
+.LVL672:
+.L801:
+	.loc 2 2322 0 is_stmt 1
+	add	sp, sp, #12
+.LCFI104:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL673:
+.L804:
+.LCFI105:
+	.loc 2 2284 0
+	movs	r2, #0
+	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL655:
-	.loc 2 2235 0
-	ldr	r0, [fp, #-48]
-	cmn	r0, #1
-	beq	.L780
-	.loc 2 2237 0
+.LVL674:
+	.loc 2 2285 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L803
+	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL656:
-	.loc 2 2238 0
-	ldr	r2, .L802+12
-	lsl	r0, r0, #1
-	ldrh	r3, [r2, r0]
-	add	r3, r3, #1
-	strh	r3, [r2, r0]	@ movhi
-.L780:
-	.loc 2 2232 0 discriminator 2
-	add	r4, r4, #1
-	b	.L779
-.LVL657:
-.L784:
-	.loc 2 2245 0
-	uxth	r1, r4
-	ldr	r3, [r5, #2260]
-	lsl	r7, r1, #1
-	ldrh	r2, [r3, r7]
-	ldrh	r3, [r8, r7]
+.LVL675:
+	.loc 2 2288 0
+	ldrh	r3, [r7, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r7, r0, lsl #1]	@ movhi
+.L803:
+	.loc 2 2282 0 discriminator 2
+	adds	r4, r4, #1
+	b	.L802
+.LVL676:
+.L807:
+	.loc 2 2295 0
+	ldr	r3, [r5, #2300]
+	uxth	r6, r4
+	ldrh	r2, [r3, r6, lsl #1]
+	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L783
-	.loc 2 2247 0
-	mov	r0, r9
+	beq	.L806
+	.loc 2 2297 0
+	mov	r1, r6
+	mov	r0, r10
 	bl	printk
-.LVL658:
-	.loc 2 2248 0
-	ldr	r3, [r5, #2260]
-	movw	r2, #65535
-	ldrh	r3, [r3, r7]
-	cmp	r3, r2
-	beq	.L783
-	.loc 2 2248 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r8, r7]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+.LVL677:
+	.loc 2 2298 0
+	ldr	r3, [r5, #2300]
+	ldrh	r3, [r3, r6, lsl #1]
+	cmp	r3, r9
+	beq	.L806
+	.loc 2 2298 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r8, r6, lsl #1]
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
-	movhi	r6, #1
-.L783:
-	add	r4, r4, #1
-	b	.L782
-.L803:
+	it	hi
+	movhi	r7, #1
+.L806:
+	adds	r4, r4, #1
+	b	.L805
+.L826:
 	.align	2
-.L802:
+.L825:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+314
-	.word	.LC87
 	.word	check_vpc_table
-	.word	.LC88
-	.word	.LC89
+	.word	.LANCHOR1+314
+	.word	.LC90
 	.word	-1431655765
 	.word	.LC1
-.LFE230:
+	.word	.LC91
+	.word	.LC92
+.LFE240:
 	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
-	.align	2
+	.align	1
 	.global	FtlMapBlkWriteDump_data
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	.fnstart
-.LFB207:
-	.loc 2 897 0
+.LFB217:
+	.loc 2 946 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL659:
-	.movsp ip
-	mov	ip, sp
-.LCFI268:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI269:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI270:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 897 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL678:
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI106:
+	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 903 0
+	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	cmp	r3, #0
-	ldmfdeq	sp, {r4, r5, r6, r7, fp, sp, pc}
-	.loc 2 905 0
-	mov	r3, #0
-	.loc 2 899 0
+	cbz	r3, .L827
+	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 905 0
-	str	r3, [r0, #36]
-	.loc 2 907 0
-	ldr	r3, .L811
-	.loc 2 900 0
+	.loc 2 954 0
+	movs	r3, #0
+	.loc 2 956 0
+	ldr	r4, .L831
+	.loc 2 949 0
 	ldr	r2, [r0, #24]
-.LVL660:
-	.loc 2 899 0
-	sub	r5, r5, #1
-	.loc 2 930 0
+.LVL679:
+	.loc 2 954 0
+	str	r3, [r0, #36]
+	.loc 2 948 0
+	subs	r5, r5, #1
+	.loc 2 956 0
+	ldr	r0, [r4, #3804]
+	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 907 0
-	ldr	r0, [r3, #3804]
-	mov	r4, r3
-	.loc 2 908 0
-	ldr	r1, [r3, #3244]
-	.loc 2 907 0
-	str	r0, [r3, #3232]
-	.loc 2 908 0
-	str	r1, [r3, #3236]
-	.loc 2 930 0
+	.loc 2 957 0
+	ldr	r1, [r4, #3244]
+	.loc 2 956 0
+	str	r0, [r4, #3228]
+	.loc 2 957 0
+	str	r1, [r4, #3232]
+	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL661:
-	.loc 2 932 0
-	cmp	r2, #0
-	.loc 2 931 0
-	str	r2, [r3, #3228]
-	.loc 2 932 0
-	beq	.L806
-	.loc 2 934 0
-	mov	r2, #1
-.LVL662:
-	ldr	r0, .L811+4
+.LVL680:
+	.loc 2 980 0
+	str	r2, [r4, #3224]
+	.loc 2 981 0
+	cbz	r2, .L829
+	.loc 2 983 0
+	movs	r2, #1
+.LVL681:
+	addw	r0, r4, #3220
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL663:
-.L807:
-	.loc 2 941 0
-	ldr	r2, [r4, #3232]
+.LVL682:
+.L830:
+	.loc 2 990 0
+	ldr	r2, [r4, #3228]
 	mov	r1, r5
 	mov	r0, r6
-	bl	FtlMapWritePage
-.LVL664:
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL665:
-.L806:
-	.loc 2 938 0
-	ldrh	r2, [r3, #86]
-.LVL666:
-	mov	r1, #255
+	.loc 2 992 0
+	pop	{r4, r5, r6, lr}
+.LCFI107:
+.LVL683:
+	.loc 2 990 0
+	b	FtlMapWritePage
+.LVL684:
+.L829:
+.LCFI108:
+	.loc 2 987 0
+	ldrh	r2, [r4, #86]
+.LVL685:
+	movs	r1, #255
 	bl	ftl_memset
-.LVL667:
-	b	.L807
-.L812:
+.LVL686:
+	b	.L830
+.LVL687:
+.L827:
+	pop	{r4, r5, r6, pc}
+.L832:
 	.align	2
-.L811:
+.L831:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
-.LFE207:
+.LFE217:
 	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.align	2
+	.align	1
 	.global	FtlScanSysBlk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 	.fnstart
-.LFB210:
-	.loc 2 1095 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI271:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI272:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI273:
-	.pad #28
-	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1095 0
-	.loc 2 1101 0
-	ldr	r4, .L895
-	mov	r5, #0
-	.loc 2 1103 0
+.LFB220:
+	.loc 2 1144 0
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI109:
+	.loc 2 1150 0
+	movs	r5, #0
+	ldr	r4, .L914
+	.loc 2 1144 0
+	.pad #20
+	sub	sp, sp, #20
+.LCFI110:
+	.loc 2 1152 0
 	mov	r1, r5
 	ldr	r2, [r4, #104]
-	.loc 2 1101 0
-	add	r6, r4, #3904
-	.loc 2 1103 0
 	ldr	r0, [r4, #3852]
-	mov	r8, r4
-	.loc 2 1101 0
-	strh	r5, [r6]	@ movhi
-	.loc 2 1102 0
+	.loc 2 1150 0
+	strh	r5, [r4, #3904]	@ movhi
+	.loc 2 1151 0
 	strh	r5, [r4, #120]	@ movhi
-	.loc 2 1103 0
-	lsl	r2, r2, #2
+	.loc 2 1152 0
+	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL668:
-	.loc 2 1104 0
+.LVL688:
+	.loc 2 1153 0
 	ldr	r2, [r4, #104]
 	mov	r1, r5
 	ldr	r0, [r4, #3828]
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL669:
-	.loc 2 1105 0
+.LVL689:
+	.loc 2 1154 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #3840]
-	lsl	r2, r2, #2
+	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL670:
-	.loc 2 1106 0
+.LVL690:
+	.loc 2 1155 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #124]
-	.loc 2 1109 0
-	mov	r5, r4
-	.loc 2 1106 0
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL671:
-.LBB396:
-.LBB397:
-.LBB398:
+.LVL691:
+	.loc 2 1158 0
+	ldrh	r8, [r4, #16]
+.LVL692:
+.LBB419:
+.LBB420:
+.LBB421:
 	.loc 1 202 0
-	ldr	r2, .L895+4
-	mvn	r3, #0
+	mov	r3, #-1
+	str	r3, [r4, #2552]
 	str	r3, [r4, #2556]
-	str	r6, [fp, #-60]
-	str	r3, [r2, #4]
-	str	r3, [r2, #8]
-.LBE398:
-.LBE397:
-.LBE396:
-	.loc 2 1109 0
-	ldrh	r3, [r4, #16]
-.LVL672:
-	str	r3, [fp, #-52]
-.LVL673:
-.L814:
-	.loc 2 1109 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r5, #18]
-.LVL674:
-	ldr	r2, [fp, #-52]
-.LVL675:
-	cmp	r3, r2
-	bls	.L855
-	.loc 2 1120 0 is_stmt 1 discriminator 1
-	mov	r6, #0
-	.loc 2 1113 0 discriminator 1
-	ldrh	r3, [r5, #8]
-	.loc 2 1118 0 discriminator 1
-	ldr	r7, [r5, #3792]
-.LVL676:
-	.loc 2 1119 0 discriminator 1
-	ldr	r10, [r5, #3152]
-	.loc 2 1120 0 discriminator 1
-	ldr	r9, [r5, #3156]
-	ldrh	r2, [r5, #88]
-.LVL677:
-	str	r6, [fp, #-48]
-	b	.L856
-.L816:
-	str	r3, [fp, #-64]
-	.loc 2 1115 0
-	ldr	r3, .L895+8
-	ldr	r1, [fp, #-52]
-	str	r2, [fp, #-68]
-	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	str	r3, [r4, #2560]
+.LVL693:
+.L834:
+.LBE421:
+.LBE420:
+.LBE419:
+	.loc 2 1158 0 discriminator 1
+	ldrh	r3, [r4, #18]
+	cmp	r3, r8
+	bls	.L876
+	.loc 2 1169 0 discriminator 1
+	movs	r5, #0
+	.loc 2 1162 0 discriminator 1
+	ldrh	fp, [r4, #8]
+	.loc 2 1167 0 discriminator 1
+	ldr	r9, [r4, #3792]
+	.loc 2 1169 0 discriminator 1
+	mov	r7, r5
+	.loc 2 1168 0 discriminator 1
+	ldr	r3, [r4, #3148]
+	.loc 2 1167 0 discriminator 1
+	mov	r10, #20
+	.loc 2 1169 0 discriminator 1
+	ldr	r2, [r4, #3152]
+	ldrh	r6, [r4, #88]
+.LVL694:
+	b	.L877
+.L837:
+	str	r3, [sp, #8]
+	.loc 2 1164 0
+	mov	r1, r8
+	ldr	r3, .L914+4
+	str	r2, [sp, #12]
+	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL678:
-	str	r0, [fp, #-56]
-	.loc 2 1116 0
+.LVL695:
+	str	r0, [sp, #4]
+	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL679:
-	cmp	r0, #0
-	ldr	r3, [fp, #-64]
-	ldr	r2, [fp, #-68]
-	bne	.L815
-	.loc 2 1118 0
-	ldr	r1, [fp, #-48]
-.LVL680:
-	mov	r0, #20
-	mla	r0, r0, r1, r7
-	ldr	r1, [fp, #-56]
-.LVL681:
-	lsl	r1, r1, #10
-	.loc 2 1119 0
-	stmib	r0, {r1, r10}
-	.loc 2 1120 0
-	ldr	r1, [fp, #-48]
-.LVL682:
-	mul	r1, r2, r1
-.LVL683:
-	add	ip, r1, #3
-	cmp	r1, #0
-	movlt	r1, ip
+.LVL696:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L835
+	.loc 2 1167 0
+	ldr	r1, [sp, #4]
+	mla	r0, r10, r7, r9
+	lsls	r1, r1, #10
+	.loc 2 1168 0
+	str	r3, [r0, #8]
+	.loc 2 1167 0
+	str	r1, [r0, #4]
+	.loc 2 1169 0
+	mov	r1, r6
+	muls	r1, r7, r1
+	.loc 2 1170 0
+	add	r7, r7, #1
+.LVL697:
+	.loc 2 1169 0
+	it	mi
+	addmi	r1, r1, #3
+	.loc 2 1170 0
+	uxth	r7, r7
+.LVL698:
+	.loc 2 1169 0
 	bic	r1, r1, #3
-	add	r1, r9, r1
+	add	r1, r1, r2
 	str	r1, [r0, #12]
-	.loc 2 1121 0
-	ldr	r1, [fp, #-48]
-.LVL684:
-	add	r1, r1, #1
-.LVL685:
-	uxth	r1, r1
-.LVL686:
-	str	r1, [fp, #-48]
-.L815:
-	add	r6, r6, #1
-.L856:
-	.loc 2 1113 0 discriminator 1
-	uxth	r1, r6
-.LVL687:
-	cmp	r3, r1
-	bhi	.L816
-	.loc 2 1124 0
-	ldr	r3, [fp, #-48]
-.LVL688:
-	cmp	r3, #0
-	bne	.L817
-.LVL689:
-.L854:
-	.loc 2 1109 0
-	ldr	r3, [fp, #-52]
-.LVL690:
-	add	r3, r3, #1
-.LVL691:
-	uxth	r3, r3
-.LVL692:
-	str	r3, [fp, #-52]
-	b	.L814
-.LVL693:
-.L817:
-	.loc 2 1127 0
-	mov	r2, #1
-	ldr	r1, [fp, #-48]
-	mov	r0, r7
+.L835:
+	adds	r5, r5, #1
+.L877:
+	.loc 2 1162 0 discriminator 1
+	uxth	r1, r5
+	cmp	fp, r1
+	bhi	.L837
+	.loc 2 1173 0
+	cbnz	r7, .L838
+.LVL699:
+.L875:
+	.loc 2 1158 0
+	add	r8, r8, #1
+.LVL700:
+	uxth	r8, r8
+.LVL701:
+	b	.L834
+.LVL702:
+.L838:
+	.loc 2 1176 0
+	mov	r0, r9
+	.loc 2 1177 0
+	mov	r9, #0
+	.loc 2 1176 0
+	movs	r2, #1
+	mov	r1, r7
 	bl	FlashReadPages
-.LVL694:
-	.loc 2 1128 0
-	mov	r3, #0
-.LVL695:
-.L894:
-	str	r3, [fp, #-56]
-	.loc 2 1128 0 is_stmt 0 discriminator 2
-	ldr	r2, [fp, #-48]
-.LVL696:
-	ldrh	r3, [fp, #-56]
-	cmp	r2, r3
-	bls	.L854
-	ldr	r3, [fp, #-56]
-	mov	r9, #20
-	mul	r9, r9, r3
-	.loc 2 1129 0 is_stmt 1
+.LVL703:
+.L839:
+	.loc 2 1177 0 discriminator 1
+	uxth	r3, r9
+	cmp	r7, r3
+	bls	.L875
+	movs	r3, #20
+	mul	r10, r3, r9
+	.loc 2 1178 0
 	ldr	r3, [r4, #3792]
-	add	r2, r3, r9
-.LVL697:
-	.loc 2 1132 0
-	ldr	r3, [r3, r9]
-	.loc 2 1129 0
-	ldr	r6, [r2, #4]
-	.loc 2 1130 0
-	ldr	r7, [r2, #12]
-	.loc 2 1132 0
-	cmn	r3, #1
-	.loc 2 1129 0
-	ubfx	r6, r6, #10, #16
-	.loc 2 1132 0
-	bne	.L821
-	mov	r10, #16
-	.loc 2 1136 0
+	add	r2, r3, r10
+	.loc 2 1181 0
+	ldr	r3, [r3, r10]
+	.loc 2 1178 0
+	ldr	r5, [r2, #4]
+	.loc 2 1179 0
+	ldr	r6, [r2, #12]
+	.loc 2 1181 0
+	adds	r3, r3, #1
+	.loc 2 1178 0
+	ubfx	r5, r5, #10, #16
+	.loc 2 1181 0
+	bne	.L842
+	mov	fp, #16
+	.loc 2 1185 0
 	movw	r3, #65535
-.L823:
-	.loc 2 1134 0
+.L844:
+	.loc 2 1183 0
 	ldr	r0, [r4, #3792]
-	str	r3, [fp, #-64]
-	add	r0, r0, r9
+	str	r3, [sp, #4]
+	add	r0, r0, r10
 	ldr	r2, [r0, #4]
-	add	r2, r2, #1
+	adds	r2, r2, #1
 	str	r2, [r0, #4]
-	.loc 2 1135 0
-	mov	r2, #1
+	.loc 2 1184 0
+	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL698:
-	.loc 2 1136 0
-	ldrh	r2, [r7]
-	ldr	r3, [fp, #-64]
+.LVL704:
+	.loc 2 1185 0
+	ldrh	r2, [r6]
+	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L820
-	.loc 2 1137 0
+	bne	.L841
+	.loc 2 1186 0
 	ldr	r3, [r4, #3792]
-	mvn	r2, #0
-	str	r2, [r3, r9]
-	.loc 2 1145 0
+	mov	r2, #-1
+	str	r2, [r3, r10]
+	.loc 2 1194 0
 	ldr	r3, [r4, #3792]
-	ldr	r3, [r3, r9]
+	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L821
-.L822:
-	.loc 2 1287 0
-	mov	r1, #1
-	b	.L893
-.L820:
-	.loc 2 1139 0
+	bne	.L842
+.L843:
+	.loc 2 1336 0
+	movs	r1, #0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL705:
+	b	.L847
+.L841:
+	.loc 2 1188 0
 	ldr	r2, [r4, #3792]
-	ldr	r2, [r2, r9]
-	cmn	r2, #1
-	bne	.L821
-	sub	r10, r10, #1
-	uxth	r10, r10
-	.loc 2 1133 0 discriminator 2
-	cmp	r10, #0
-	bne	.L823
-	b	.L822
-.L821:
-	.loc 2 1147 0
-	ldr	r2, [r5, #2472]
-	ldr	r3, [r7, #4]
-	cmn	r2, #1
-	beq	.L824
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	ldr	r2, [r2, r10]
+	adds	r2, r2, #1
+	bne	.L842
+	add	fp, fp, #-1
+	uxth	fp, fp
+	.loc 2 1182 0 discriminator 2
+	cmp	fp, #0
+	bne	.L844
+	b	.L843
+.L842:
+	.loc 2 1196 0
+	ldr	r2, [r4, #2516]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L845
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L825
-.L824:
-	.loc 2 1149 0 is_stmt 1
-	cmn	r3, #1
-	.loc 2 1152 0
+	bhi	.L846
+.L845:
+	.loc 2 1198 0 is_stmt 1
+	adds	r2, r3, #1
+	.loc 2 1201 0
+	itt	ne
 	addne	r2, r3, #1
-	strne	r2, [r8, #2472]
-.L825:
-	.loc 2 1157 0
-	ldrh	r2, [r7]
+	strne	r2, [r4, #2516]
+.L846:
+	.loc 2 1206 0
+	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L827
-	bhi	.L828
+	beq	.L848
+	bhi	.L849
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L829
-.L826:
-	ldr	r3, [fp, #-56]
-	add	r3, r3, #1
-	b	.L894
-.L828:
+	beq	.L850
+.L847:
+	add	r9, r9, #1
+	b	.L839
+.L849:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L830
+	beq	.L851
 	movw	r3, #65535
 	cmp	r2, r3
-	.loc 2 1280 0
-	moveq	r1, #0
-	.loc 2 1157 0
-	bne	.L826
-.L893:
-	.loc 2 1287 0
-	mov	r0, r6
-	bl	FtlFreeSysBlkQueueIn
-.LVL699:
-	b	.L826
-.L830:
-	.loc 2 1162 0
-	ldr	r3, [fp, #-60]
-	ldrh	r2, [r3]
+	beq	.L843
+	b	.L847
+.L851:
+	.loc 2 1211 0
+	ldrh	r2, [r4, #3904]
 	ldr	r3, [r4, #104]
 	cmp	r2, r3
-	bls	.L832
-	.loc 2 1162 0 is_stmt 0 discriminator 1
-	movw	r2, #1162
-	ldr	r1, .L895+12
-	ldr	r0, .L895+16
+	bls	.L853
+	.loc 2 1211 0 is_stmt 0 discriminator 1
+	movw	r2, #1211
+	ldr	r1, .L914+8
+	ldr	r0, .L914+12
 	bl	printk
-.LVL700:
-.L832:
-	.loc 2 1163 0 is_stmt 1
-	ldr	r0, [r4, #104]
-	ldr	r2, [fp, #-60]
-	.loc 2 1165 0
-	ldr	ip, [r4, #3852]
-	.loc 2 1163 0
-	ldrh	r2, [r2]
-	uxth	r1, r0
-	sub	r3, r1, #1
-	sub	r1, r1, r2
+.LVL706:
+.L853:
+	.loc 2 1212 0 is_stmt 1
+	ldr	r1, [r4, #104]
+	ldrh	r0, [r4, #3904]
+	.loc 2 1214 0
+	ldr	r10, [r4, #3852]
+	.loc 2 1212 0
+	uxth	ip, r1
+	add	r3, ip, #-1
+	sub	ip, ip, r0
+	add	ip, ip, #-1
 	sxth	r3, r3
-	sub	r1, r1, #1
-	sxth	r1, r1
-.L833:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
-	cmp	r3, r1
-	bgt	.L839
-	.loc 2 1186 0 is_stmt 1
+	sxth	ip, ip
+.L854:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
+	cmp	r3, ip
+	bgt	.L860
+	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L871
-	b	.L826
-.L839:
-	.loc 2 1165 0
-	ldr	r10, [r7, #4]
-	lsl	lr, r3, #2
-	ldr	r9, [ip, r3, lsl #2]
-	cmp	r10, r9
-	bls	.L834
-	.loc 2 1167 0
-	ldr	r1, [ip]
-	cmp	r1, #0
-	bne	.L835
-	.loc 2 1167 0 is_stmt 0 discriminator 1
-	cmp	r0, r2
-	.loc 2 1172 0 is_stmt 1 discriminator 1
-	ldrne	r1, .L895+20
-	addne	r2, r2, #1
-	strhne	r2, [r1]	@ movhi
-.L835:
-	.loc 2 1175 0 discriminator 1
+	bge	.L892
+	b	.L847
+.L860:
+	.loc 2 1214 0
+	ldr	r2, [r6, #4]
+	lsl	fp, r3, #2
+	mov	lr, r2
+	ldr	r2, [r10, r3, lsl #2]
+	cmp	lr, r2
+	bls	.L855
+	.loc 2 1216 0
+	ldr	r2, [r10]
+	cbnz	r2, .L856
+	.loc 2 1216 0 is_stmt 0 discriminator 1
+	cmp	r1, r0
+	.loc 2 1221 0 is_stmt 1 discriminator 1
+	itt	ne
+	addne	r0, r0, #1
+	strhne	r0, [r4, #3904]	@ movhi
+.L856:
+	.loc 2 1224 0 discriminator 1
 	uxth	ip, r3
-	mov	r1, #0
-.L836:
-	uxth	r0, r1
-	sxth	r2, r1
+	movs	r2, #0
+.L857:
+	uxth	r0, r2
+	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L837
-	.loc 2 1180 0
-	ldr	r1, [r7, #4]
-	.loc 2 1186 0
+	bhi	.L858
+	.loc 2 1229 0
+	ldr	r2, [r4, #3852]
+	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1180 0
-	ldr	r2, [r5, #3852]
-	str	r1, [r2, lr]
-	.loc 2 1181 0
-	lsl	r2, r3, #1
-	ldr	r1, [r5, #3828]
-	strh	r6, [r1, r2]	@ movhi
-	.loc 2 1186 0
-	blt	.L826
-	.loc 2 1193 0
-	ldr	r2, .L895+20
-	ldr	r1, [r5, #104]
-	ldrh	r2, [r2]
-	sub	r1, r1, r2
-	sub	r1, r1, #1
-	sxth	r1, r1
-	cmp	r3, r1
-	bgt	.L826
-.L871:
-	.loc 2 1195 0
-	ldr	r1, [fp, #-60]
-	add	r2, r2, #1
-	strh	r2, [r1]	@ movhi
-	.loc 2 1196 0
+	.loc 2 1229 0
+	ldr	r1, [r6, #4]
+	str	r1, [r2, fp]
+	.loc 2 1230 0
+	ldr	r2, [r4, #3828]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	.loc 2 1235 0
+	blt	.L847
+	.loc 2 1242 0
+	ldrh	r0, [r4, #3904]
+	ldr	r2, [r4, #104]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L847
+.L892:
+	.loc 2 1245 0
 	ldr	r2, [r4, #3852]
-	ldr	r1, [r7, #4]
+	.loc 2 1244 0
+	adds	r0, r0, #1
+	.loc 2 1245 0
+	ldr	r1, [r6, #4]
+	.loc 2 1244 0
+	strh	r0, [r4, #3904]	@ movhi
+	.loc 2 1245 0
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1197 0
-	lsl	r3, r3, #1
+	.loc 2 1246 0
 	ldr	r2, [r4, #3828]
-.L891:
-	.loc 2 1241 0
-	strh	r6, [r2, r3]	@ movhi
-	b	.L826
-.L837:
-	.loc 2 1177 0 discriminator 3
-	ldr	r0, [r5, #3852]
-	add	r1, r1, #1
-	add	r9, r0, r2, lsl #2
-	ldr	r9, [r9, #4]
-	str	r9, [r0, r2, lsl #2]
-	.loc 2 1178 0 discriminator 3
-	lsl	r2, r2, #1
-	ldr	r0, [r5, #3828]
-	add	r9, r0, r2
-	ldrh	r9, [r9, #2]
-	strh	r9, [r0, r2]	@ movhi
-	b	.L836
-.L834:
-	sub	r3, r3, #1
+.L912:
+	.loc 2 1290 0
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L847
+.L858:
+	.loc 2 1226 0 discriminator 3
+	ldr	r0, [r4, #3852]
+	adds	r2, r2, #1
+	add	lr, r0, r1, lsl #2
+	ldr	lr, [lr, #4]
+	str	lr, [r0, r1, lsl #2]
+	.loc 2 1227 0 discriminator 3
+	ldr	r0, [r4, #3828]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L857
+.L855:
+	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L833
-.L829:
-	.loc 2 1203 0
+	b	.L854
+.L915:
+	.align	2
+.L914:
+	.word	.LANCHOR0
+	.word	.LANCHOR0+36
+	.word	.LANCHOR1+328
+	.word	.LC1
+.L850:
+	.loc 2 1252 0
 	ldrh	r2, [r4, #120]
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bls	.L842
-	.loc 2 1203 0 is_stmt 0 discriminator 1
-	movw	r2, #1203
-	ldr	r1, .L895+12
-	ldr	r0, .L895+16
+	bls	.L863
+	.loc 2 1252 0 is_stmt 0 discriminator 1
+	movw	r2, #1252
+	ldr	r1, .L916
+	ldr	r0, .L916+4
 	bl	printk
-.LVL701:
-.L842:
-	.loc 2 1204 0 is_stmt 1
-	ldrh	r2, [r4, #96]
-	ldrh	r1, [r4, #120]
-	.loc 2 1206 0
-	ldr	ip, [r4, #3840]
-	.loc 2 1204 0
-	sub	r0, r2, #1
-	sxth	r3, r0
-	sub	r0, r0, r1
-.L843:
-	.loc 2 1204 0 is_stmt 0 discriminator 1
-	cmp	r3, r0
-	ble	.L848
-	.loc 2 1206 0 is_stmt 1
-	ldr	r10, [r7, #4]
-	lsl	lr, r3, #2
-	ldr	r9, [ip, r3, lsl #2]
-	cmp	r10, r9
-	bls	.L844
-	.loc 2 1208 0
-	sub	r2, r2, r1
-	ldr	r0, [ip]
-	clz	r2, r2
-	.loc 2 1218 0
+.LVL707:
+.L863:
+	.loc 2 1253 0 is_stmt 1
+	ldrh	lr, [r4, #96]
+	ldrh	r0, [r4, #120]
+	.loc 2 1255 0
+	ldr	r10, [r4, #3840]
+	.loc 2 1253 0
+	add	ip, lr, #-1
+	sxth	r3, ip
+	sub	ip, ip, r0
+.L864:
+	.loc 2 1253 0 is_stmt 0 discriminator 1
+	cmp	r3, ip
+	ble	.L869
+	.loc 2 1255 0 is_stmt 1
+	ldr	r2, [r6, #4]
+	lsl	fp, r3, #2
+	ldr	r1, [r10, r3, lsl #2]
+	cmp	r2, r1
+	bls	.L865
+	.loc 2 1257 0
+	ldr	r2, [r10]
+	cbnz	r2, .L866
+	.loc 2 1257 0 is_stmt 0 discriminator 1
+	cmp	lr, r0
+	.loc 2 1265 0 is_stmt 1 discriminator 1
+	itt	ne
+	addne	r0, r0, #1
+	strhne	r0, [r4, #120]	@ movhi
+.L866:
+	.loc 2 1267 0 discriminator 1
 	uxth	ip, r3
-	.loc 2 1208 0
-	lsr	r2, r2, #5
-	cmp	r0, #0
-	orrne	r2, r2, #1
-	cmp	r2, #0
-	.loc 2 1216 0
-	addeq	r1, r1, #1
-	strheq	r1, [r8, #120]	@ movhi
-	mov	r1, #0
-.L846:
-	.loc 2 1218 0 discriminator 1
-	uxth	r0, r1
-	sxth	r2, r1
+	movs	r2, #0
+.L867:
+	uxth	r0, r2
+	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L847
-	.loc 2 1223 0
-	ldr	r1, [r7, #4]
-	ldr	r2, [r5, #3840]
-	str	r1, [r2, lr]
-	.loc 2 1224 0
-	lsl	r2, r3, #1
-	ldr	r1, [r5, #124]
-	strh	r6, [r1, r2]	@ movhi
-.L848:
-	.loc 2 1229 0
+	bhi	.L868
+	.loc 2 1272 0
+	ldr	r2, [r4, #3840]
+	ldr	r1, [r6, #4]
+	str	r1, [r2, fp]
+	.loc 2 1273 0
+	ldr	r2, [r4, #124]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+.L869:
+	.loc 2 1278 0
 	cmp	r3, #0
-	blt	.L826
-	.loc 2 1237 0
-	ldrh	r2, [r5, #96]
-	ldrh	r1, [r5, #120]
-	sub	r2, r2, #1
-	sub	r2, r2, r1
+	blt	.L847
+	.loc 2 1286 0
+	ldrh	r2, [r4, #96]
+	ldrh	r1, [r4, #120]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L826
-	.loc 2 1239 0
-	add	r1, r1, #1
-	.loc 2 1240 0
-	ldr	r2, [r5, #3840]
-	.loc 2 1239 0
-	strh	r1, [r5, #120]	@ movhi
-	.loc 2 1240 0
-	ldr	r1, [r7, #4]
+	bgt	.L847
+	.loc 2 1288 0
+	adds	r1, r1, #1
+	.loc 2 1289 0
+	ldr	r2, [r4, #3840]
+	.loc 2 1288 0
+	strh	r1, [r4, #120]	@ movhi
+	.loc 2 1289 0
+	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1241 0
-	lsl	r3, r3, #1
-	ldr	r2, [r5, #124]
-	b	.L891
-.L847:
-	.loc 2 1220 0 discriminator 3
-	ldr	r0, [r5, #3840]
-	add	r1, r1, #1
-	add	r9, r0, r2, lsl #2
-	ldr	r9, [r9, #4]
-	str	r9, [r0, r2, lsl #2]
-	.loc 2 1221 0 discriminator 3
-	lsl	r2, r2, #1
-	ldr	r0, [r5, #124]
-	add	r9, r0, r2
-	ldrh	r9, [r9, #2]
-	strh	r9, [r0, r2]	@ movhi
-	b	.L846
-.L844:
-	sub	r3, r3, #1
+	.loc 2 1290 0
+	ldr	r2, [r4, #124]
+	b	.L912
+.L868:
+	.loc 2 1269 0 discriminator 3
+	ldr	r0, [r4, #3840]
+	adds	r2, r2, #1
+	add	lr, r0, r1, lsl #2
+	ldr	lr, [lr, #4]
+	str	lr, [r0, r1, lsl #2]
+	.loc 2 1270 0 discriminator 3
+	ldr	r0, [r4, #124]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L867
+.L865:
+	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L843
-.L827:
-	.loc 2 1248 0
-	ldr	r9, .L895+4
+	b	.L864
+.L848:
+	.loc 2 1297 0
+	ldrh	r1, [r4, #2552]
 	movw	r2, #65535
-	ldrh	r1, [r9]
 	cmp	r1, r2
-	.loc 2 1250 0
-	strheq	r6, [r9]	@ movhi
-	.loc 2 1248 0
-	beq	.L892
-	.loc 2 1255 0
-	ldrh	r0, [r9, #4]
+	bne	.L871
+	.loc 2 1299 0
+	strh	r5, [r4, #2552]	@ movhi
+.L913:
+	.loc 2 1310 0
+	str	r3, [r4, #2560]
+	b	.L847
+.L871:
+	.loc 2 1304 0
+	ldrh	r0, [r4, #2556]
 	cmp	r0, r2
-	beq	.L851
-	.loc 2 1256 0
-	mov	r1, #1
+	beq	.L872
+	.loc 2 1305 0
+	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL702:
-.L851:
-	.loc 2 1257 0
-	ldr	r3, [r7, #4]
-	ldr	r2, [r4, #2564]
+.LVL708:
+.L872:
+	.loc 2 1306 0
+	ldr	r2, [r4, #2560]
+	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	.loc 2 1265 0
-	strhcs	r6, [r9, #4]	@ movhi
-	.loc 2 1257 0
-	bcs	.L826
-	.loc 2 1259 0
-	ldrh	r3, [r9]
-	.loc 2 1260 0
-	strh	r6, [r9]	@ movhi
-	.loc 2 1259 0
-	strh	r3, [r9, #4]	@ movhi
-	.loc 2 1261 0
-	ldr	r3, [r7, #4]
-.L892:
-	str	r3, [r4, #2564]
-	b	.L826
-.LVL703:
-.L855:
-	.loc 2 1292 0
-	ldr	r1, [r5, #3828]
-	ldrh	r3, [r1]
-	cmp	r3, #0
-	beq	.L857
-.L860:
+	bcs	.L873
+	.loc 2 1308 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1309 0
+	strh	r5, [r4, #2552]	@ movhi
+	.loc 2 1308 0
+	strh	r3, [r4, #2556]	@ movhi
 	.loc 2 1310 0
+	ldr	r3, [r6, #4]
+	b	.L913
+.L873:
+	.loc 2 1314 0
+	strh	r5, [r4, #2556]	@ movhi
+	b	.L847
+.L876:
+	.loc 2 1341 0
+	ldr	r1, [r4, #3828]
+	ldrh	r3, [r1]
+	cbz	r3, .L878
+.L881:
+	.loc 2 1359 0
 	ldr	r1, [r4, #124]
 	ldrh	r2, [r1]
-.LVL704:
 	cmp	r2, #0
-	beq	.L858
-.L859:
-	.loc 2 1328 0
-	ldr	r3, [fp, #-60]
-	ldrh	r2, [r3]
+	beq	.L879
+.L880:
+	.loc 2 1377 0
+	ldrh	r2, [r4, #3904]
 	ldr	r3, [r4, #104]
 	cmp	r2, r3
-	bls	.L890
-	.loc 2 1328 0 is_stmt 0 discriminator 1
-	mov	r2, #1328
-	ldr	r1, .L895+12
-	ldr	r0, .L895+16
+	bls	.L911
+	.loc 2 1377 0 is_stmt 0 discriminator 1
+	movw	r2, #1377
+	ldr	r1, .L916
+	ldr	r0, .L916+4
 	bl	printk
-.LVL705:
-.L890:
-	.loc 2 1330 0 is_stmt 1
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI274:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL706:
-.L857:
-.LCFI275:
-	.loc 2 1292 0 discriminator 1
-	ldr	r2, .L895+20
-.LVL707:
-	ldrh	r2, [r2]
+.LVL709:
+.L911:
+	.loc 2 1379 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #20
+.LCFI111:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL710:
+.L878:
+.LCFI112:
+	.loc 2 1341 0 discriminator 1
+	ldrh	r2, [r4, #3904]
 	cmp	r2, #0
-	.loc 2 1294 0 discriminator 1
-	ldrne	r0, [r5, #104]
-	.loc 2 1292 0 discriminator 1
-	beq	.L860
-.L861:
+	beq	.L881
+	.loc 2 1343 0 discriminator 1
+	ldr	r0, [r4, #104]
+.L882:
 	sxth	r2, r3
-	.loc 2 1294 0 discriminator 1
 	cmp	r2, r0
-	bcs	.L860
-	.loc 2 1296 0
-	lsl	ip, r2, #1
-	add	r3, r3, #1
-	ldrh	ip, [r1, ip]
-	cmp	ip, #0
-	beq	.L861
+	bcs	.L881
+	.loc 2 1345 0
+	ldrh	r5, [r1, r2, lsl #1]
+	adds	r3, r3, #1
+	cmp	r5, #0
+	beq	.L882
 	mov	r3, r2
-	.loc 2 1302 0 discriminator 1
-	mov	lr, #0
-.L862:
-	.loc 2 1298 0 discriminator 1
-	ldr	r1, [r8, #104]
+	.loc 2 1351 0 discriminator 1
+	movs	r5, #0
+.L883:
+	.loc 2 1347 0 discriminator 1
+	ldr	r1, [r4, #104]
 	cmp	r3, r1
-	bcs	.L860
-	.loc 2 1300 0 discriminator 3
-	ldr	r0, [r8, #3828]
-	lsl	r1, r3, #1
-	sub	ip, r3, r2
-	lsl	r5, ip, #1
-	ldrh	r6, [r0, r1]
-	strh	r6, [r0, r5]	@ movhi
-	.loc 2 1301 0 discriminator 3
-	ldr	r0, [r8, #3852]
-	ldr	r5, [r0, r3, lsl #2]
-	add	r3, r3, #1
+	bcs	.L881
+	.loc 2 1349 0 discriminator 3
+	ldr	r1, [r4, #3828]
+	subs	r0, r3, r2
+	ldrh	r6, [r1, r3, lsl #1]
+.LVL711:
+	strh	r6, [r1, r0, lsl #1]	@ movhi
+	.loc 2 1350 0 discriminator 3
+	ldr	r1, [r4, #3852]
+	ldr	r6, [r1, r3, lsl #2]
+	str	r6, [r1, r0, lsl #2]
+	.loc 2 1351 0 discriminator 3
+	ldr	r1, [r4, #3828]
+	strh	r5, [r1, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
 	sxth	r3, r3
-	str	r5, [r0, ip, lsl #2]
-	.loc 2 1302 0 discriminator 3
-	ldr	r0, [r8, #3828]
-	strh	lr, [r0, r1]	@ movhi
-	b	.L862
-.L858:
-	.loc 2 1310 0 discriminator 1
+	b	.L883
+.LVL712:
+.L879:
+	.loc 2 1359 0 discriminator 1
 	ldrh	r3, [r4, #120]
 	cmp	r3, #0
-	.loc 2 1312 0 discriminator 1
-	ldrhne	r0, [r4, #96]
-	.loc 2 1310 0 discriminator 1
-	beq	.L859
-.L867:
+	beq	.L880
+	.loc 2 1361 0 discriminator 1
+	ldrh	r0, [r4, #96]
+.L888:
 	sxth	r3, r2
-	.loc 2 1312 0 discriminator 1
 	cmp	r3, r0
-	mov	ip, r3
-	bge	.L859
-	.loc 2 1314 0
-	lsl	lr, r3, #1
-	add	r2, r2, #1
-	ldrh	lr, [r1, lr]
-	cmp	lr, #0
-	beq	.L867
-	.loc 2 1320 0 discriminator 1
-	mov	lr, #0
-.L868:
-	.loc 2 1316 0 discriminator 1
-	ldrh	r2, [r8, #96]
+	mov	r5, r3
+	bge	.L880
+	.loc 2 1363 0
+	ldrh	r6, [r1, r3, lsl #1]
+.LVL713:
+	adds	r2, r2, #1
+	cmp	r6, #0
+	beq	.L888
+	.loc 2 1369 0 discriminator 1
+	movs	r0, #0
+.L889:
+	.loc 2 1365 0 discriminator 1
+	ldrh	r2, [r4, #96]
 	cmp	r3, r2
-	bge	.L859
-	.loc 2 1318 0 discriminator 3
-	ldr	r1, [r8, #124]
-	lsl	r2, r3, #1
-	sub	r0, r3, ip
-	lsl	r5, r0, #1
-	ldrh	r6, [r1, r2]
-	strh	r6, [r1, r5]	@ movhi
-	.loc 2 1319 0 discriminator 3
-	ldr	r1, [r8, #3840]
-	ldr	r5, [r1, r3, lsl #2]
-	add	r3, r3, #1
+	bge	.L880
+	.loc 2 1367 0 discriminator 3
+	ldr	r2, [r4, #124]
+	subs	r1, r3, r5
+	ldrh	r6, [r2, r3, lsl #1]
+	strh	r6, [r2, r1, lsl #1]	@ movhi
+	.loc 2 1368 0 discriminator 3
+	ldr	r2, [r4, #3840]
+	ldr	r6, [r2, r3, lsl #2]
+	str	r6, [r2, r1, lsl #2]
+	.loc 2 1369 0 discriminator 3
+	ldr	r2, [r4, #124]
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
 	sxth	r3, r3
-	str	r5, [r1, r0, lsl #2]
-	.loc 2 1320 0 discriminator 3
-	ldr	r1, [r8, #124]
-	strh	lr, [r1, r2]	@ movhi
-	b	.L868
-.L896:
-	.align	2
-.L895:
-	.word	.LANCHOR0
-	.word	.LANCHOR0+2556
-	.word	.LANCHOR0+36
+	b	.L889
+.L917:
+	.align	2
+.L916:
 	.word	.LANCHOR1+328
 	.word	.LC1
-	.word	.LANCHOR0+3904
-.LFE210:
+.LFE220:
 	.fnend
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.align	2
+	.align	1
 	.global	FtlMapTblRecovery
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 	.fnstart
-.LFB215:
-	.loc 2 1466 0
+.LFB225:
+	.loc 2 1515 0
 	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL708:
-	.movsp ip
-	mov	ip, sp
-.LCFI276:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI277:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI278:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL714:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI113:
 	.pad #28
 	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1466 0
-	.loc 2 1470 0
+.LCFI114:
+	.loc 2 1519 0
 	ldr	r3, [r0, #24]
-.LVL709:
-	.loc 2 1466 0
-	mov	r4, r0
-	.loc 2 1478 0
-	ldr	r6, .L924
-	.loc 2 1477 0
-	mov	r1, #0
-	.loc 2 1471 0
-	ldr	r9, [r0, #12]
-.LVL710:
-	.loc 2 1483 0
-	mov	r7, #0
-	.loc 2 1470 0
-	str	r3, [fp, #-48]
-	.loc 2 1472 0
-	ldr	r3, [r0, #16]
-.LVL711:
-	mov	r5, r6
-	str	r3, [fp, #-60]
-	.loc 2 1473 0
-	ldrh	r3, [r0, #6]
-.LVL712:
-	str	r3, [fp, #-52]
-	.loc 2 1474 0
-	ldrh	r3, [r0, #8]
-.LVL713:
-	.loc 2 1477 0
-	ldr	r0, [fp, #-48]
-.LVL714:
-	.loc 2 1474 0
-	str	r3, [fp, #-56]
-	.loc 2 1477 0
-	ldr	r3, [fp, #-52]
 .LVL715:
-	lsl	r2, r3, #2
-	bl	ftl_memset
+	.loc 2 1515 0
+	mov	r4, r0
+	.loc 2 1526 0
+	movs	r1, #0
+	.loc 2 1522 0
+	ldrh	r10, [r0, #6]
 .LVL716:
-	.loc 2 1478 0
-	ldr	r3, [r6, #2244]
-	.loc 2 1479 0
-	ldr	r8, [r6, #3244]
-	.loc 2 1483 0
-	str	r7, [r4, #32]
-	.loc 2 1478 0
-	str	r3, [r6, #3232]
-	.loc 2 1481 0
-	mvn	r3, #0
-	.loc 2 1479 0
-	str	r8, [r6, #3236]
-	.loc 2 1481 0
-	strh	r3, [r4]	@ movhi
-	.loc 2 1482 0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1485 0
-	mov	r3, #1
-	.loc 2 1484 0
-	str	r7, [r4, #28]
-	.loc 2 1485 0
-	str	r3, [r4, #36]
+	.loc 2 1519 0
+	str	r3, [sp, #4]
+	.loc 2 1521 0
+	ldr	r3, [r0, #16]
 .LVL717:
-.L898:
-	.loc 2 1486 0 discriminator 1
-	ldr	r2, [fp, #-56]
+	.loc 2 1527 0
+	ldr	r5, .L945
+	.loc 2 1520 0
+	ldr	r9, [r0, #12]
 .LVL718:
-	sxth	r3, r7
+	.loc 2 1526 0
+	lsl	r2, r10, #2
+	.loc 2 1521 0
+	str	r3, [sp, #12]
+	.loc 2 1523 0
+	ldrh	r3, [r0, #8]
 .LVL719:
-	cmp	r3, r2
-	bge	.L915
-	.loc 2 1488 0
-	ldr	r2, [fp, #-56]
-	sub	r2, r2, #1
+	.loc 2 1526 0
+	ldr	r0, [sp, #4]
 .LVL720:
-	cmp	r3, r2
-	lsl	r2, r3, #1
-	bne	.L899
-	.loc 2 1490 0
-	ldrh	r0, [r9, r2]
+	.loc 2 1523 0
+	str	r3, [sp, #8]
+	.loc 2 1526 0
+	bl	ftl_memset
 .LVL721:
-	mov	r1, #1
+	.loc 2 1527 0
+	ldr	r3, [r5, #3240]
+	.loc 2 1534 0
+	movs	r2, #1
+	.loc 2 1528 0
+	ldr	r6, [r5, #3244]
+	.loc 2 1534 0
+	str	r2, [r4, #36]
+	.loc 2 1527 0
+	str	r3, [r5, #3228]
+	.loc 2 1530 0
+	movw	r3, #65535
+	.loc 2 1528 0
+	str	r6, [r5, #3232]
+	.loc 2 1530 0
+	strh	r3, [r4]	@ movhi
+	.loc 2 1531 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 1532 0
+	movs	r3, #0
+	str	r3, [r4, #32]
+	.loc 2 1535 0
+	mov	r8, r3
+	.loc 2 1533 0
+	str	r3, [r4, #28]
+	.loc 2 1537 0
+	ldr	r3, [sp, #8]
 .LVL722:
-	add	r10, r9, r2
+	add	fp, r3, #-1
+	.loc 2 1579 0
+	mov	r3, r5
 .LVL723:
-	str	r3, [fp, #-56]
-	bl	FtlGetLastWrittenPage
+.L919:
+	.loc 2 1535 0 discriminator 1
+	ldr	r1, [sp, #8]
 .LVL724:
-	.loc 2 1493 0
-	ldr	r1, [fp, #-60]
+	sxth	r2, r8
 .LVL725:
-	.loc 2 1490 0
-	sxth	r2, r0
+	cmp	r2, r1
+	bge	.L936
+	.loc 2 1537 0
+	cmp	r2, fp
+	lsl	r7, r2, #1
 .LVL726:
-	.loc 2 1493 0
-	ldr	r3, [fp, #-56]
+	bne	.L920
+	.loc 2 1539 0
+	ldrh	r0, [r9, fp, lsl #1]
 .LVL727:
-	.loc 2 1491 0
-	add	r0, r0, #1
-	.loc 2 1492 0
-	strh	r7, [r4]	@ movhi
-	.loc 2 1494 0
-	mov	r9, #0
+	movs	r1, #1
 .LVL728:
-	.loc 2 1491 0
-	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1494 0
-	add	r7, r2, #1
-	.loc 2 1493 0
-	ldr	r3, [r1, r3, lsl #2]
+	bl	FtlGetLastWrittenPage
 .LVL729:
-	str	r3, [r4, #28]
-	.loc 2 1497 0
-	ldr	r3, .L924+4
+	.loc 2 1542 0
+	ldr	r3, [sp, #12]
 .LVL730:
-.L900:
-	.loc 2 1494 0 discriminator 1
-	sxth	r2, r9
+	.loc 2 1539 0
+	add	r7, r7, r9
+	.loc 2 1541 0
+	strh	r8, [r4]	@ movhi
+	.loc 2 1539 0
+	sxth	r9, r0
 .LVL731:
-	cmp	r2, r7
-	blt	.L902
+	.loc 2 1546 0
+	ldr	r8, .L945+4
+	.loc 2 1540 0
+	adds	r0, r0, #1
+	strh	r0, [r4, #2]	@ movhi
+	.loc 2 1543 0
+	add	r9, r9, #1
 .LVL732:
-.L915:
-	.loc 2 1547 0
-	mov	r0, r4
+	.loc 2 1542 0
+	ldr	r3, [r3, fp, lsl #2]
 .LVL733:
-	bl	ftl_free_no_use_map_blk
+	.loc 2 1543 0
+	mov	fp, #0
+	.loc 2 1542 0
+	str	r3, [r4, #28]
 .LVL734:
-	.loc 2 1548 0
+.L921:
+	.loc 2 1543 0 discriminator 1
+	sxth	r2, fp
+	cmp	r2, r9
+	blt	.L923
+.LVL735:
+.L936:
+	.loc 2 1596 0
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+.LVL736:
+	.loc 2 1597 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bne	.L904
-	.loc 2 1550 0
+	bne	.L925
+	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL735:
-.L904:
-	.loc 2 1553 0
+.LVL737:
+.L925:
+	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL736:
-	.loc 2 1555 0
+.LVL738:
+	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL737:
-	.loc 2 1557 0
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI279:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL738:
-.L902:
-.LCFI280:
-	.loc 2 1496 0
-	ldrh	r1, [r10]
 .LVL739:
-	.loc 2 1497 0
-	mov	r0, r3
+	.loc 2 1606 0
+	movs	r0, #0
+	add	sp, sp, #28
+.LCFI115:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL740:
-	str	r3, [fp, #-56]
-	.loc 2 1496 0
+.L923:
+.LCFI116:
+	.loc 2 1545 0
+	ldrh	r1, [r7]
+	.loc 2 1546 0
+	mov	r0, r8
+	.loc 2 1545 0
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #3228]
-	.loc 2 1497 0
-	mov	r2, #1
+	str	r2, [r5, #3224]
+	.loc 2 1546 0
+	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
 .LVL741:
-	.loc 2 1500 0
-	ldr	r2, [r6, #3224]
-	ldr	r3, [fp, #-56]
-	cmn	r2, #1
-	beq	.L901
-	.loc 2 1502 0
-	ldrh	r2, [r8, #8]
-	ldr	r1, [fp, #-52]
-.LVL742:
-	cmp	r1, r2
-	bls	.L901
-	.loc 2 1502 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r8]
+	.loc 2 1549 0
+	ldr	r2, [r5, #3220]
+	adds	r2, r2, #1
+	beq	.L922
+	.loc 2 1551 0
+	ldrh	r2, [r6, #8]
+	cmp	r10, r2
+	bls	.L922
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
-.LVL743:
+	ldrh	r0, [r6]
 	cmp	r0, r1
-	.loc 2 1504 0 is_stmt 1 discriminator 1
-	ldreq	r1, [r6, #3228]
-	ldreq	r0, [fp, #-48]
+	.loc 2 1553 0 is_stmt 1 discriminator 1
+	ittt	eq
+	ldreq	r1, [r5, #3224]
+	ldreq	r3, [sp, #4]
+.LVL742:
+	streq	r1, [r3, r2, lsl #2]
+.L922:
+	add	fp, fp, #1
+	b	.L921
+.LVL743:
+.L920:
+	.loc 2 1559 0
+	ldr	r1, [r5, #3240]
 .LVL744:
-	streq	r1, [r0, r2, lsl #2]
+	str	r3, [sp, #20]
+	.loc 2 1560 0
+	add	r3, r9, r7
+	.loc 2 1561 0
+	ldr	r0, .L945+4
 .LVL745:
-.L901:
-	add	r9, r9, #1
-	b	.L900
+	.loc 2 1559 0
+	str	r1, [r5, #3228]
+	.loc 2 1560 0
+	ldrh	r1, [r9, r2, lsl #1]
+	ldrh	r2, [r5, #80]
 .LVL746:
-.L899:
-	.loc 2 1510 0
-	ldr	r3, [r5, #2244]
+	str	r3, [sp, #16]
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #3224]
+	.loc 2 1561 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
 .LVL747:
-	.loc 2 1512 0
-	ldr	r0, .L924+4
+	.loc 2 1564 0
+	ldr	r2, [r5, #3220]
+	ldr	r3, [sp, #20]
+	adds	r2, r2, #1
+	beq	.L938
+	.loc 2 1564 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r6]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L938
+	.loc 2 1564 0 discriminator 2
+	ldrh	r1, [r6, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	beq	.L927
+.L938:
+	movs	r7, #0
 .LVL748:
-	.loc 2 1510 0
-	str	r3, [r5, #3232]
-	.loc 2 1511 0
-	add	r3, r9, r2
-	str	r3, [fp, #-64]
-	ldrh	r2, [r9, r2]
-	ldrh	r3, [r5, #80]
-	sub	r3, r3, #1
-	orr	r3, r3, r2, lsl #10
-	.loc 2 1512 0
-	mov	r2, #1
-	mov	r1, r2
+.L928:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
+	ldrh	r1, [r3, #80]
+	sxth	r2, r7
+	cmp	r2, r1
+	bge	.L934
+	.loc 2 1581 0
+	ldr	r1, [sp, #16]
+	.loc 2 1582 0
+	ldr	r0, .L945+4
 .LVL749:
-	.loc 2 1511 0
-	str	r3, [r5, #3228]
-	.loc 2 1512 0
+	.loc 2 1581 0
+	str	r3, [sp, #20]
+	ldrh	r1, [r1]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r3, #3224]
+	.loc 2 1582 0
+	movs	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
 .LVL750:
-	.loc 2 1515 0
-	ldr	r3, [r5, #3224]
-	cmn	r3, #1
-	beq	.L917
-	.loc 2 1515 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r8]
-	ldrh	r3, [r4, #4]
-	cmp	r2, r3
-	bne	.L917
-	.loc 2 1515 0 discriminator 2
-	ldrh	r2, [r8, #8]
-	movw	r3, #64245
-	cmp	r2, r3
-	beq	.L906
-.L917:
-	mov	r10, #0
+	.loc 2 1585 0
+	ldr	r3, [sp, #20]
+	ldr	r2, [r3, #3220]
+	adds	r2, r2, #1
+	beq	.L932
+	.loc 2 1587 0
+	ldrh	r2, [r6, #8]
+	cmp	r10, r2
+	bls	.L932
+	.loc 2 1587 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r6]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	.loc 2 1589 0 is_stmt 1 discriminator 1
+	ittt	eq
+	ldreq	r1, [r3, #3224]
+	ldreq	r0, [sp, #4]
 .LVL751:
-.L907:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
-	ldrh	r2, [r5, #80]
+	streq	r1, [r0, r2, lsl #2]
+.L932:
+	adds	r7, r7, #1
+	b	.L928
 .LVL752:
-	sxth	r3, r10
-	cmp	r3, r2
-	bge	.L913
-	.loc 2 1532 0
-	ldr	r2, [fp, #-64]
-	.loc 2 1533 0
-	ldr	r0, .L924+4
-	.loc 2 1532 0
-	ldrh	r2, [r2]
-	orr	r3, r3, r2, lsl #10
-	.loc 2 1533 0
-	mov	r2, #1
-	mov	r1, r2
+.L927:
+	movs	r0, #0
+	.loc 2 1572 0 discriminator 1
+	mov	ip, #4
 .LVL753:
-	.loc 2 1532 0
-	str	r3, [r5, #3228]
-	.loc 2 1533 0
-	bl	FlashReadPages
+.L929:
+	.loc 2 1567 0 discriminator 1
+	ldrh	r1, [r5, #80]
+	sxth	r2, r0
+	subs	r1, r1, #1
+	cmp	r2, r1
+	blt	.L931
+.L934:
+	add	r8, r8, #1
+	b	.L919
+.L931:
+	.loc 2 1569 0
+	ldr	r7, [r5, #3240]
 .LVL754:
-	.loc 2 1536 0
-	ldr	r3, [r5, #3224]
-	cmn	r3, #1
-	beq	.L911
-	.loc 2 1538 0
-	ldrh	r3, [r8, #8]
-	ldr	r2, [fp, #-52]
+	ldr	r1, [r7, r2, lsl #3]
+	.loc 2 1570 0
+	uxth	lr, r1
+	cmp	r10, lr
+	bls	.L930
+	.loc 2 1572 0
+	add	r2, ip, r2, lsl #3
+	ldr	r2, [r7, r2]
+	ldr	r7, [sp, #4]
 .LVL755:
-	cmp	r2, r3
-	bls	.L911
-	.loc 2 1538 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r8]
-	ldrh	r2, [r4, #4]
-.LVL756:
-	cmp	r1, r2
-	.loc 2 1540 0 is_stmt 1 discriminator 1
-	ldreq	r2, [r5, #3228]
-	ldreq	r1, [fp, #-48]
-.LVL757:
-	streq	r2, [r1, r3, lsl #2]
-.LVL758:
-.L911:
-	add	r10, r10, #1
-	b	.L907
-.LVL759:
-.L906:
-	mov	r1, #0
-	.loc 2 1523 0 discriminator 1
-	mov	ip, #4
-.LVL760:
-.L908:
-	.loc 2 1518 0 discriminator 1
-	ldrh	r2, [r5, #80]
-	sxth	r3, r1
-	sub	r2, r2, #1
-	cmp	r3, r2
-	blt	.L910
-.L913:
-	add	r7, r7, #1
-	b	.L898
-.L910:
-	.loc 2 1520 0
-	ldr	r0, [r5, #2244]
-.LVL761:
-	add	r1, r1, #1
-	.loc 2 1521 0
-	ldr	r10, [fp, #-52]
-	.loc 2 1520 0
-	ldr	r2, [r0, r3, lsl #3]
-	.loc 2 1521 0
-	uxth	lr, r2
-	cmp	r10, lr
-	.loc 2 1523 0
-	addhi	r3, ip, r3, lsl #3
-	movhi	r2, lr
-	ldrhi	r3, [r0, r3]
-	ldrhi	r0, [fp, #-48]
-.LVL762:
-	strhi	r3, [r0, r2, lsl #2]
-	b	.L908
-.L925:
+	str	r2, [r7, lr, lsl #2]
+.L930:
+	adds	r0, r0, #1
+	b	.L929
+.L946:
 	.align	2
-.L924:
+.L945:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
-.LFE215:
+	.word	.LANCHOR0+3220
+.LFE225:
 	.fnend
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.align	2
+	.align	1
 	.global	FtlLoadVonderInfo
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	.fnstart
-.LFB216:
-	.loc 2 1560 0
+.LFB226:
+	.loc 2 1609 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI281:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI282:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI283:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1560 0
-	.loc 2 1561 0
-	ldr	r3, .L927
-	ldrh	r2, [r3, #96]
-	add	r0, r3, #3904
-	add	r0, r0, #4
-	strh	r2, [r0, #10]	@ movhi
-	.loc 2 1562 0
-	ldr	r2, .L927+4
-	strh	r2, [r0, #4]	@ movhi
-	.loc 2 1563 0
-	ldrh	r2, [r3, #120]
-	strh	r2, [r0, #8]	@ movhi
-	.loc 2 1564 0
-	ldrh	r2, [r3, #98]
-	strh	r2, [r0, #6]	@ movhi
-	.loc 2 1565 0
-	ldr	r2, [r3, #124]
-	str	r2, [r3, #3920]
-	.loc 2 1566 0
-	ldr	r2, [r3, #3840]
-	str	r2, [r3, #3924]
-	.loc 2 1567 0
-	ldr	r2, [r3, #3836]
-	str	r2, [r3, #3928]
-	.loc 2 1568 0
-	ldr	r2, [r3, #3844]
-	str	r2, [r3, #3932]
-	.loc 2 1570 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 2 1610 0
+	ldr	r0, .L948
+	.loc 2 1609 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI117:
+	.loc 2 1610 0
+	ldrh	r3, [r0, #96]
+	strh	r3, [r0, #3918]	@ movhi
+	.loc 2 1611 0
+	movw	r3, #61574
+	strh	r3, [r0, #3912]	@ movhi
+	.loc 2 1612 0
+	ldrh	r3, [r0, #120]
+	strh	r3, [r0, #3916]	@ movhi
+	.loc 2 1613 0
+	ldrh	r3, [r0, #98]
+	strh	r3, [r0, #3914]	@ movhi
+	.loc 2 1614 0
+	ldr	r3, [r0, #124]
+	.loc 2 1619 0
+	addw	r0, r0, #3908
+	.loc 2 1614 0
+	str	r3, [r0, #12]
+	.loc 2 1615 0
+	ldr	r3, [r0, #-68]
+	str	r3, [r0, #16]
+	.loc 2 1616 0
+	ldr	r3, [r0, #-72]
+	str	r3, [r0, #20]
+	.loc 2 1617 0
+	ldr	r3, [r0, #-64]
+	str	r3, [r0, #24]
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL763:
-	.loc 2 1573 0
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.L928:
+.LVL756:
+	.loc 2 1622 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L949:
 	.align	2
-.L927:
+.L948:
 	.word	.LANCHOR0
-	.word	-3962
-.LFE216:
+.LFE226:
 	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.align	2
+	.align	1
 	.global	FtlL2PDataInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 	.fnstart
-.LFB217:
-	.loc 2 1576 0
+.LFB227:
+	.loc 2 1625 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI284:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI285:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI286:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1576 0
-	.loc 2 1578 0
-	mov	r1, #0
-	.loc 2 1583 0
-	mvn	r5, #0
-	.loc 2 1578 0
-	ldr	r4, .L932
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI118:
+	.loc 2 1627 0
+	movs	r1, #0
+	ldr	r4, .L953
+	.loc 2 1631 0
+	movs	r6, #12
+	.loc 2 1627 0
 	ldr	r2, [r4, #104]
 	ldr	r0, [r4, #3832]
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL764:
-	.loc 2 1579 0
+.LVL757:
+	.loc 2 1628 0
 	ldrh	r3, [r4, #86]
-	mov	r1, #255
+	movs	r1, #255
 	ldrh	r2, [r4, #114]
 	ldr	r0, [r4, #3856]
-	mul	r2, r2, r3
+	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL765:
-	.loc 2 1580 0
-	mov	r2, #0
+.LVL758:
+	.loc 2 1629 0
+	movs	r2, #0
 	mov	r3, r4
-	.loc 2 1582 0
-	mov	lr, #12
-	mov	r4, r2
-.L930:
-	.loc 2 1580 0 discriminator 1
-	ldrh	r0, [r3, #114]
-	uxth	r1, r2
-	add	ip, r2, #1
-	cmp	r0, r1
-	bhi	.L931
-	.loc 2 1586 0
-	ldr	r2, .L932+4
-	mvn	r1, #0
-	.loc 2 1587 0
-	movw	r0, #3864
-	strh	r1, [r3, r0]	@ movhi
-	.loc 2 1586 0
-	strh	r1, [r2, #2]	@ movhi
-	.loc 2 1588 0
-	ldr	r1, [r3, #104]
-	strh	r1, [r2, #10]	@ movhi
-	.loc 2 1589 0
-	ldr	r1, .L932+8
-	strh	r1, [r2, #4]	@ movhi
-	.loc 2 1590 0
-	ldrh	r1, [r2, #40]
-	strh	r1, [r2, #8]	@ movhi
-	.loc 2 1591 0
-	ldrh	r1, [r3, #112]
-	strh	r1, [r2, #6]	@ movhi
-	.loc 2 1592 0
+	movw	r1, #65535
+	.loc 2 1631 0
+	mov	r7, r2
+.L951:
+	.loc 2 1629 0 discriminator 1
+	ldrh	r4, [r3, #114]
+	uxth	r0, r2
+	adds	r5, r2, #1
+	cmp	r4, r0
+	bhi	.L952
+	.loc 2 1637 0
+	ldr	r2, [r3, #104]
+	.loc 2 1635 0
+	strh	r1, [r3, #3866]	@ movhi
+	.loc 2 1636 0
+	strh	r1, [r3, #3864]	@ movhi
+	.loc 2 1637 0
+	strh	r2, [r3, #3874]	@ movhi
+	.loc 2 1638 0
+	movw	r2, #61634
+	strh	r2, [r3, #3868]	@ movhi
+	.loc 2 1639 0
+	ldrh	r2, [r3, #3904]
+	strh	r2, [r3, #3872]	@ movhi
+	.loc 2 1640 0
+	ldrh	r2, [r3, #112]
+	strh	r2, [r3, #3870]	@ movhi
+	.loc 2 1641 0
 	ldr	r2, [r3, #3828]
 	str	r2, [r3, #3876]
-	.loc 2 1593 0
+	.loc 2 1642 0
 	ldr	r2, [r3, #3852]
 	str	r2, [r3, #3880]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	r2, [r3, #3832]
 	str	r2, [r3, #3884]
-	.loc 2 1595 0
+	.loc 2 1644 0
 	ldr	r2, [r3, #3848]
 	str	r2, [r3, #3888]
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L931:
-	.loc 2 1582 0 discriminator 3
+	pop	{r3, r4, r5, r6, r7, pc}
+.L952:
+	.loc 2 1631 0 discriminator 3
 	uxth	r2, r2
-	ldr	r1, [r3, #2424]
-	mul	r0, lr, r2
-	add	r6, r1, r0
-	str	r4, [r6, #4]
-	.loc 2 1583 0 discriminator 3
-	strh	r5, [r1, r0]	@ movhi
-	.loc 2 1584 0 discriminator 3
-	ldr	r1, [r3, #2424]
-	add	r1, r1, r0
-	ldrh	r0, [r3, #86]
-	mul	r2, r2, r0
-	ldr	r0, [r3, #3856]
+	ldr	r0, [r3, #2468]
+	mul	r4, r6, r2
+	add	ip, r0, r4
+	str	r7, [ip, #4]
+	.loc 2 1632 0 discriminator 3
+	strh	r1, [r0, r4]	@ movhi
+	.loc 2 1633 0 discriminator 3
+	ldr	r0, [r3, #2468]
+	add	r0, r0, r4
+	ldrh	r4, [r3, #86]
+	muls	r2, r4, r2
+	ldr	r4, [r3, #3856]
 	bic	r2, r2, #3
-	add	r2, r0, r2
-	str	r2, [r1, #8]
-	mov	r2, ip
-	b	.L930
-.L933:
+	add	r2, r2, r4
+	str	r2, [r0, #8]
+	mov	r2, r5
+	b	.L951
+.L954:
 	.align	2
-.L932:
+.L953:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3864
-	.word	-3902
-.LFE217:
+.LFE227:
 	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.align	2
+	.align	1
 	.global	FtlLoadMapInfo
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 	.fnstart
-.LFB218:
-	.loc 2 1599 0
+.LFB228:
+	.loc 2 1648 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI287:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI288:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI289:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1599 0
-	.loc 2 1600 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI119:
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL766:
-	.loc 2 1602 0
-	ldr	r0, .L935
+.LVL759:
+	.loc 2 1651 0
+	ldr	r0, .L956
 	bl	FtlMapTblRecovery
-.LVL767:
-	.loc 2 1605 0
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.L936:
+.LVL760:
+	.loc 2 1654 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L957:
 	.align	2
-.L935:
+.L956:
 	.word	.LANCHOR0+3864
-.LFE218:
+.LFE228:
 	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.align	2
+	.align	1
 	.global	FtlVariablesInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	.fnstart
-.LFB147:
+.LFB157:
 	.loc 3 493 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI290:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI291:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI292:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 493 0
-	.loc 3 497 0
-	mvn	r3, #0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI120:
 	.loc 3 496 0
-	mov	r5, #0
-	ldr	r4, .L938
+	movs	r5, #0
+	ldr	r4, .L959
+	.loc 3 497 0
+	movw	r3, #65535
 	.loc 3 502 0
 	mov	r1, r5
+	ldrh	r2, [r4, #96]
 	.loc 3 497 0
-	add	r2, r4, #3952
+	strh	r3, [r4, #3952]	@ movhi
+	.loc 3 500 0
+	mov	r3, #-1
 	.loc 3 502 0
 	ldr	r0, [r4, #124]
-	.loc 3 497 0
-	strh	r3, [r2]	@ movhi
-	.loc 3 502 0
-	ldrh	r2, [r4, #96]
 	.loc 3 500 0
 	str	r3, [r4, #3964]
+	.loc 3 502 0
+	lsls	r2, r2, #1
 	.loc 3 496 0
 	str	r5, [r4, #3948]
 	.loc 3 498 0
 	str	r5, [r4, #3956]
-	.loc 3 502 0
-	lsl	r2, r2, #1
 	.loc 3 499 0
 	str	r5, [r4, #3960]
 	.loc 3 501 0
 	strh	r5, [r4, #120]	@ movhi
 	.loc 3 502 0
 	bl	ftl_memset
-.LVL768:
+.LVL761:
 	.loc 3 503 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
-	ldr	r0, [r4, #2248]
-	lsl	r2, r2, #1
+	ldr	r0, [r4, #2304]
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL769:
+.LVL762:
 	.loc 3 504 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
 	ldr	r0, [r4, #3816]
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL770:
-.LBB409:
-.LBB410:
-.LBB411:
+.LVL763:
+.LBB432:
+.LBB433:
+.LBB434:
 	.loc 1 202 0
-	add	r0, r4, #2496
-	mov	r1, #48
-	add	r0, r0, #8
+	addw	r0, r4, #2244
+	movs	r1, #48
 	bl	__memzero
-.LVL771:
-.LBE411:
-.LBE410:
-.LBE409:
-.LBB412:
-.LBB413:
-.LBB414:
-	add	r0, r4, #2608
+.LVL764:
+.LBE434:
+.LBE433:
+.LBE432:
+.LBB435:
+.LBB436:
+.LBB437:
+	addw	r0, r4, #2612
 	mov	r1, #512
-	add	r0, r0, #8
 	bl	__memzero
-.LVL772:
-.LBE414:
-.LBE413:
-.LBE412:
+.LVL765:
+.LBE437:
+.LBE436:
+.LBE435:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL773:
+.LVL766:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL774:
+.LVL767:
 	.loc 3 510 0
 	mov	r0, r5
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L939:
+	pop	{r3, r4, r5, pc}
+.L960:
 	.align	2
-.L938:
+.L959:
 	.word	.LANCHOR0
-.LFE147:
+.LFE157:
 	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
-	.align	2
+	.align	1
 	.global	SupperBlkListInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	.fnstart
-.LFB225:
-	.loc 2 2067 0
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI293:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI294:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI295:
-	.pad #20
-	sub	sp, sp, #20
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2067 0
-	.loc 2 2071 0
-	ldr	r4, .L951
-	mov	r2, #6
-	.loc 2 2072 0
-	mov	r5, #0
-	.loc 2 2071 0
-	mov	r1, #0
-	.loc 2 2077 0
-	mov	r9, r5
-.LVL775:
-	mov	r7, r5
-.LVL776:
-	.loc 2 2071 0
+.LFB235:
+	.loc 2 2116 0
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.pad #12
+.LCFI121:
+	.loc 2 2121 0
+	movs	r6, #0
+	.loc 2 2120 0
+	ldr	r4, .L972
+	movs	r2, #6
+	.loc 2 2126 0
+	mov	r9, r6
+.LVL768:
+	mov	r7, r6
+.LVL769:
+	.loc 2 2120 0
+	movs	r1, #0
 	ldrh	r3, [r4, #18]
-	.loc 2 2082 0
-	add	r10, r4, #36
-	.loc 2 2071 0
-	ldr	r0, [r4, #2252]
-	mul	r2, r2, r3
+	.loc 2 2131 0
+	add	fp, r4, #36
+	.loc 2 2120 0
+	ldr	r0, [r4, #2292]
+	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL777:
-	.loc 2 2075 0
-	movw	r3, #2268
-	.loc 2 2072 0
-	str	r5, [r4, #2272]
-	.loc 2 2075 0
-	strh	r5, [r4, r3]	@ movhi
-	.loc 2 2076 0
-	movw	r3, #2276
-	.loc 2 2073 0
-	str	r5, [r4, #2256]
-	.loc 2 2074 0
-	str	r5, [r4, #2264]
-	.loc 2 2076 0
-	strh	r5, [r4, r3]	@ movhi
-.LVL778:
-.L941:
-	.loc 2 2079 0 discriminator 1
+.LVL770:
+	.loc 2 2121 0
+	str	r6, [r4, #2316]
+	.loc 2 2122 0
+	str	r6, [r4, #2296]
+	.loc 2 2123 0
+	str	r6, [r4, #2308]
+	.loc 2 2124 0
+	strh	r6, [r4, #2312]	@ movhi
+	.loc 2 2125 0
+	strh	r6, [r4, #2320]	@ movhi
+.LVL771:
+.L962:
+	.loc 2 2128 0 discriminator 1
 	ldrh	r3, [r4, #16]
-	uxth	r8, r5
+	uxth	r8, r6
 	cmp	r8, r3
-	bcs	.L947
-	.loc 2 2084 0
-	ldrh	r3, [r4, #78]
-	.loc 2 2081 0
+	bcs	.L968
+	.loc 2 2133 0
+	mov	r10, #0
+	.loc 2 2130 0
 	ldrh	r2, [r4, #8]
-	.loc 2 2084 0
-	str	r3, [fp, #-48]
-	mov	r3, #0
-	mov	r6, r3
-	b	.L948
-.L943:
-	.loc 2 2082 0
+	.loc 2 2133 0
+	ldrh	r3, [r4, #78]
+	mov	r5, r10
+	b	.L969
+.L964:
+	.loc 2 2131 0
 	mov	r1, r8
-	ldrb	r0, [r10, r3]	@ zero_extendqisi2
-	str	r2, [fp, #-56]
-	str	r3, [fp, #-52]
+	ldrb	r0, [fp, r10]	@ zero_extendqisi2
+	stm	sp, {r2, r3}
 	bl	V2P_block
-.LVL779:
-	.loc 2 2083 0
+.LVL772:
+	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL780:
-	cmp	r0, #0
-	ldr	r3, [fp, #-52]
-	.loc 2 2084 0
-	ldreq	r1, [fp, #-48]
-	.loc 2 2083 0
-	ldr	r2, [fp, #-56]
-	add	r3, r3, #1
-	.loc 2 2084 0
-	addeq	r6, r6, r1
-	uxtheq	r6, r6
-.L948:
-	.loc 2 2081 0 discriminator 1
-	uxth	r1, r3
+.LVL773:
+	ldm	sp, {r2, r3}
+	cbnz	r0, .L963
+	.loc 2 2133 0
+	add	r5, r5, r3
+	uxth	r5, r5
+.L963:
+	add	r10, r10, #1
+.L969:
+	.loc 2 2130 0 discriminator 1
+	uxth	r1, r10
 	cmp	r2, r1
-	bhi	.L943
-	.loc 2 2086 0
-	cmp	r6, #0
-	moveq	r0, r6
-	beq	.L944
-	.loc 2 2087 0
-	mov	r1, r6
+	bhi	.L964
+	.loc 2 2135 0
+	cbz	r5, .L971
+	.loc 2 2136 0
+	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL781:
-.L944:
-	.loc 2 2088 0
-	ldr	r1, [r4, #2252]
-	uxth	r3, r5
-	mov	r2, #6
-	mla	r2, r2, r3, r1
-	strh	r0, [r2, #4]	@ movhi
-	.loc 2 2090 0
-	ldr	r2, .L951+4
-	ldrh	r1, [r2]
-	cmp	r1, r8
-	beq	.L945
-	.loc 2 2090 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #48]
-	cmp	r1, r8
-	beq	.L945
-	.loc 2 2091 0 is_stmt 1
-	ldrh	r2, [r2, #96]
-	cmp	r2, r8
-	beq	.L945
-	.loc 2 2094 0
-	ldr	r2, [r4, #2260]
-	lsl	r3, r3, #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	bne	.L946
-	.loc 2 2095 0
+.LVL774:
+.L965:
+	.loc 2 2137 0
+	ldr	r2, [r4, #2292]
+	uxth	r1, r6
+	movs	r3, #6
+	mla	r3, r3, r1, r2
+	strh	r0, [r3, #4]	@ movhi
+	.loc 2 2139 0
+	ldrh	r3, [r4, #2324]
+	cmp	r3, r8
+	beq	.L966
+	.loc 2 2139 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
+	cmp	r3, r8
+	beq	.L966
+	.loc 2 2140 0 is_stmt 1
+	ldrh	r3, [r4, #2420]
+	cmp	r3, r8
+	beq	.L966
+	.loc 2 2143 0
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbnz	r3, .L967
+	.loc 2 2144 0
 	add	r9, r9, #1
-.LVL782:
-	.loc 2 2096 0
+.LVL775:
+	.loc 2 2145 0
 	mov	r0, r8
-	.loc 2 2095 0
+	.loc 2 2144 0
 	uxth	r9, r9
-.LVL783:
-	.loc 2 2096 0
+.LVL776:
+	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL784:
-.L945:
-	add	r5, r5, #1
-	b	.L941
-.L946:
-	.loc 2 2098 0
-	add	r7, r7, #1
-.LVL785:
-	.loc 2 2099 0
+.LVL777:
+.L966:
+	adds	r6, r6, #1
+	b	.L962
+.L971:
+	mov	r0, r5
+	b	.L965
+.L967:
+	.loc 2 2147 0
+	adds	r7, r7, #1
+.LVL778:
+	.loc 2 2148 0
 	mov	r0, r8
-	.loc 2 2098 0
+	.loc 2 2147 0
 	uxth	r7, r7
-.LVL786:
-	.loc 2 2099 0
+.LVL779:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL787:
-	b	.L945
-.L947:
-	.loc 2 2103 0
-	movw	r2, #2268
-	strh	r7, [r4, r2]	@ movhi
-	.loc 2 2105 0
+.LVL780:
+	b	.L966
+.L968:
+	.loc 2 2152 0
+	strh	r7, [r4, #2312]	@ movhi
+	.loc 2 2154 0
 	add	r7, r7, r9
-.LVL788:
+.LVL781:
 	cmp	r7, r3
-	.loc 2 2104 0
-	movw	r2, #2276
-	strh	r9, [r4, r2]	@ movhi
-	.loc 2 2105 0
-	ble	.L949
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	movw	r2, #2105
-	ldr	r1, .L951+8
-	ldr	r0, .L951+12
+	.loc 2 2153 0
+	strh	r9, [r4, #2320]	@ movhi
+	.loc 2 2154 0
+	ble	.L970
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	movw	r2, #2154
+	ldr	r1, .L972+4
+	ldr	r0, .L972+8
 	bl	printk
-.LVL789:
-.L949:
-	.loc 2 2107 0 is_stmt 1
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI296:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL790:
-.L952:
+.LVL782:
+.L970:
+	.loc 2 2156 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #12
+.LCFI122:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL783:
+.L973:
 	.align	2
-.L951:
+.L972:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2280
 	.word	.LANCHOR1+342
 	.word	.LC1
-.LFE225:
+.LFE235:
 	.fnend
 	.size	SupperBlkListInit, .-SupperBlkListInit
-	.align	2
+	.align	1
 	.global	FtlGcPageVarInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	.fnstart
-.LFB249:
+.LFB259:
 	.loc 5 202 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI297:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI298:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI299:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 202 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI123:
 	.loc 5 203 0
-	mov	r3, #0
-	movw	r2, #3172
-	ldr	r4, .L954
+	movs	r3, #0
+	ldr	r4, .L975
 	.loc 5 205 0
-	mov	r1, #255
+	movs	r1, #255
+	ldrh	r2, [r4, #82]
+	ldr	r0, [r4, #3164]
 	.loc 5 203 0
-	strh	r3, [r4, r2]	@ movhi
+	strh	r3, [r4, #3168]	@ movhi
 	.loc 5 204 0
-	movw	r2, #3180
-	strh	r3, [r4, r2]	@ movhi
+	strh	r3, [r4, #3176]	@ movhi
 	.loc 5 205 0
-	ldrh	r2, [r4, #82]
-	ldr	r0, [r4, #3168]
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL791:
+.LVL784:
 	.loc 5 206 0
 	ldrh	r3, [r4, #82]
-	mov	r2, #12
-	mov	r1, #255
-	ldr	r0, [r4, #3176]
-	mul	r2, r2, r3
+	movs	r2, #12
+	ldr	r0, [r4, #3172]
+	movs	r1, #255
+	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL792:
+.LVL785:
+	.loc 5 208 0
+	pop	{r4, lr}
+.LCFI124:
 	.loc 5 207 0
-	bl	FtlGcBufInit
-.LVL793:
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L955:
+	b	FtlGcBufInit
+.LVL786:
+.L976:
 	.align	2
-.L954:
+.L975:
 	.word	.LANCHOR0
-.LFE249:
+.LFE259:
 	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.align	2
+	.align	1
 	.global	FtlGcScanTempBlk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
 	.fnstart
-.LFB250:
+.LFB260:
 	.loc 5 211 0
 	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL794:
-	.movsp ip
-	mov	ip, sp
-.LCFI300:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI301:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI302:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL787:
+	.loc 5 220 0
+	ldr	r3, .L1002
+	.loc 5 211 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI125:
 	.pad #28
 	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 211 0
-	.loc 5 220 0
-	ldr	r3, .L979
+.LCFI126:
 	.loc 5 211 0
-	mov	r6, r0
-	str	r1, [fp, #-48]
+	mov	r7, r0
+	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3, #4]
-.LVL795:
+.LVL788:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L973
+	beq	.L996
 	.loc 5 223 0
-	cmp	r4, #0
-	bne	.L957
-.LVL796:
-.L958:
+	cbnz	r4, .L978
+.LVL789:
+.L979:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL797:
-	b	.L959
-.LVL798:
-.L973:
+.LVL790:
+	b	.L980
+.LVL791:
+.L996:
 	.loc 5 222 0
-	mov	r4, #0
-.L957:
+	movs	r4, #0
+.L978:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L979+4
-	ldr	r2, [fp, #-48]
-.LVL799:
+	ldr	r3, .L1002+4
+	ldr	r2, [sp, #8]
+.LVL792:
 	ldrh	r3, [r3, #78]
 	cmp	r3, r2
-	beq	.L958
-.L959:
-	.loc 5 231 0
-	ldr	r5, .L979+4
+	beq	.L979
+.L980:
 	.loc 5 222 0
-	mov	r8, #0
-.LVL800:
-.L967:
+	mov	fp, #0
+.LVL793:
 	.loc 5 228 0
-	ldrh	r2, [r6]
-.LVL801:
-	movw	r3, #65535
+	movw	r8, #65535
+.LVL794:
+.L990:
+	ldrh	r3, [r7]
 	.loc 5 226 0
-	mov	r0, #0
-	strb	r0, [r6, #8]
+	movs	r0, #0
+	strb	r0, [r7, #8]
 	.loc 5 228 0
-	cmp	r2, r3
-	beq	.L960
-.L970:
+	cmp	r3, r8
+	beq	.L981
 	.loc 5 231 0
-	ldrh	r3, [r5, #8]
-	mov	r2, #0
+	ldr	r5, .L1002+4
+.L993:
 	.loc 5 234 0
-	ldr	r0, [r5, #3792]
-	add	ip, r6, #16
+	ldr	r3, [r5, #3792]
+	.loc 5 231 0
+	movs	r2, #0
+.LVL795:
+	ldrh	ip, [r5, #8]
+	add	lr, r7, #16
 	.loc 5 236 0
-	ldrh	r10, [r5, #88]
+	ldr	r10, [r5, #3152]
 	.loc 5 230 0
-	mov	r7, r2
-	.loc 5 231 0
-	str	r3, [fp, #-52]
-	.loc 5 233 0
-	movw	r9, #65535
+	mov	r6, r2
+	.loc 5 234 0
+	str	r3, [sp, #4]
+	mov	r9, #20
 	.loc 5 235 0
-	ldr	r3, [r5, #3152]
-	str	r3, [fp, #-56]
+	ldr	r3, [r5, #3148]
+	str	r3, [sp, #12]
 	ldrh	r3, [r5, #86]
-	str	r3, [fp, #-60]
+	str	r3, [sp, #16]
 	.loc 5 236 0
-	ldr	r3, [r5, #3156]
-	str	r3, [fp, #-64]
-.LVL802:
-.L961:
+	ldrh	r3, [r5, #88]
+	str	r3, [sp, #20]
+.LVL796:
+.L982:
 	.loc 5 231 0 discriminator 1
-	ldr	r1, [fp, #-52]
 	uxth	r3, r2
-.LVL803:
-	cmp	r1, r3
-	bhi	.L963
+.LVL797:
+	cmp	ip, r3
+	bhi	.L986
 	.loc 5 241 0
 	mov	r9, #0
 	.loc 5 240 0
-	mov	r2, #0
-	mov	r1, r7
+	movs	r2, #0
+	mov	r1, r6
+	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL804:
-.L964:
+.LVL798:
+.L987:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r9
-	cmp	r7, r3
-	bhi	.L968
+	cmp	r6, r3
+	bhi	.L991
 	.loc 5 268 0
-	ldr	r3, [fp, #-48]
-.LVL805:
+	ldr	r3, [sp, #8]
+.LVL799:
 	.loc 5 266 0
-	add	r8, r8, #1
+	add	fp, fp, #1
 	.loc 5 264 0
-	add	r4, r4, #1
-.LVL806:
+	adds	r4, r4, #1
+.LVL800:
 	uxth	r4, r4
-.LVL807:
+.LVL801:
 	.loc 5 268 0
-	cmp	r3, r8
-	bls	.L969
-.L971:
+	cmp	r3, fp
+	bls	.L992
+.L994:
 	.loc 5 274 0
 	ldrh	r3, [r5, #78]
-.LVL808:
+.LVL802:
 	cmp	r3, r4
-	bhi	.L970
+	bhi	.L993
 	.loc 5 265 0
-	mov	r0, #0
-.LVL809:
-	b	.L960
-.LVL810:
-.L963:
+	movs	r0, #0
+.LVL803:
+	b	.L981
+.LVL804:
+.L986:
 	.loc 5 232 0
-	ldrh	r3, [ip], #2
-.LVL811:
+	ldrh	r3, [lr], #2
+.LVL805:
 	.loc 5 233 0
-	cmp	r3, r9
-	beq	.L962
+	cmp	r3, r8
+	beq	.L983
 	.loc 5 234 0
-	mov	r1, #20
+	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL812:
-	mla	r1, r1, r7, r0
+.LVL806:
+	mla	r1, r9, r6, r1
 	str	r3, [r1, #4]
 	.loc 5 235 0
-	ldr	r3, [fp, #-60]
-	mul	r3, r3, r7
-	add	lr, r3, #3
-	cmp	r3, #0
-	movlt	r3, lr
-	ldr	lr, [fp, #-56]
+	ldr	r3, [sp, #16]
+	muls	r3, r6, r3
+	it	mi
+	addmi	r3, r3, #3
 	bic	r3, r3, #3
-	add	r3, lr, r3
-	str	r3, [r1, #8]
+	mov	r0, r3
+	ldr	r3, [sp, #12]
+	add	r0, r0, r3
 	.loc 5 236 0
-	mul	r3, r10, r7
+	ldr	r3, [sp, #20]
+	muls	r3, r6, r3
 	.loc 5 237 0
-	add	r7, r7, #1
-.LVL813:
-	uxth	r7, r7
-.LVL814:
+	add	r6, r6, #1
+.LVL807:
+	.loc 5 236 0
+	it	mi
+	addmi	r3, r3, #3
+	.loc 5 237 0
+	uxth	r6, r6
+.LVL808:
 	.loc 5 236 0
-	add	lr, r3, #3
-	cmp	r3, #0
-	movlt	r3, lr
-	ldr	lr, [fp, #-64]
 	bic	r3, r3, #3
-	add	r3, lr, r3
+	.loc 5 235 0
+	str	r0, [r1, #8]
+	.loc 5 236 0
+	add	r3, r3, r10
 	str	r3, [r1, #12]
-.LVL815:
-.L962:
-	add	r2, r2, #1
-	b	.L961
-.LVL816:
-.L968:
+.LVL809:
+.L983:
+	adds	r2, r2, #1
+	b	.L982
+.LVL810:
+.L991:
 	.loc 5 242 0
-	mov	r3, #20
+	movs	r3, #20
 	ldr	r2, [r5, #3792]
 	mul	r10, r3, r9
-	str	r2, [fp, #-60]
+	str	r2, [sp, #16]
 	add	r3, r2, r10
 	ldr	r1, [r3, #4]
-.LVL817:
-	str	r3, [fp, #-56]
+.LVL811:
+	str	r3, [sp, #12]
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
-	str	r1, [fp, #-52]
+	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL818:
+.LVL812:
 	.loc 5 245 0
-	ldr	r2, [fp, #-60]
+	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cmp	r2, #0
-	bne	.L965
+	cbnz	r2, .L988
 	.loc 5 247 0
-	ldr	r3, [fp, #-56]
-	.loc 5 248 0
-	movw	r2, #65535
+	ldr	r3, [sp, #12]
 	add	r9, r9, #1
-	ldr	r1, [fp, #-52]
-.LVL819:
+	.loc 5 248 0
+	ldr	r1, [sp, #4]
+.LVL813:
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL820:
+.LVL814:
 	.loc 5 248 0
-	ldrh	ip, [r3]
-	cmp	ip, r2
-	bne	.L966
+	ldrh	r2, [r3]
+	cmp	r2, r8
+	bne	.L989
 	.loc 5 249 0
-	mov	r3, #1
-.LVL821:
+	movs	r3, #1
+.LVL815:
 	str	r3, [r5, #3960]
-.LVL822:
-.L960:
+.LVL816:
+.L981:
 	.loc 5 281 0
-	ldr	r3, .L979
-	mvn	r2, #0
+	ldr	r3, .L1002
+	movw	r2, #65535
+.LVL817:
 	.loc 5 283 0
-	strb	r0, [r6, #6]
+	strb	r0, [r7, #6]
 	.loc 5 284 0
 	mov	r1, r4
-.LVL823:
+.LVL818:
 	.loc 5 282 0
-	strh	r4, [r6, #2]	@ movhi
+	strh	r4, [r7, #2]	@ movhi
 	.loc 5 281 0
 	strh	r2, [r3, #4]	@ movhi
 	.loc 5 284 0
 	mov	r2, r0
-	mov	r0, r6
-.LVL824:
+	mov	r0, r7
+.LVL819:
 	bl	ftl_sb_update_avl_pages
-.LVL825:
+.LVL820:
 	.loc 5 285 0
-	b	.L972
-.LVL826:
-.L966:
+	b	.L995
+.LVL821:
+.L989:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL827:
-	b	.L964
-.L965:
+.LVL822:
+	b	.L987
+.L988:
 	.loc 5 256 0
-	ldrh	r3, [r6]
-	mov	r4, #0
-.LVL828:
-	ldr	r2, [r5, #2260]
-	lsl	r3, r3, #1
-	strh	r4, [r2, r3]	@ movhi
+	ldrh	r2, [r7]
+	movs	r4, #0
+.LVL823:
+	ldr	r3, [r5, #2300]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
-	ldrh	r0, [r6]
+	ldrh	r0, [r7]
 	bl	INSERT_FREE_LIST
-.LVL829:
+.LVL824:
 	.loc 5 258 0
-	mvn	r3, #0
-	strh	r3, [r6]	@ movhi
+	strh	r8, [r7]	@ movhi
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL830:
+.LVL825:
 	.loc 5 261 0
-	b	.L967
-.LVL831:
-.L969:
+	b	.L990
+.LVL826:
+.L992:
 	.loc 5 268 0 discriminator 1
-	ldr	r2, .L979
-	movw	r1, #65535
+	ldr	r2, .L1002
 	ldrh	r3, [r2, #4]
-.LVL832:
-	cmp	r3, r1
-	beq	.L971
+.LVL827:
+	cmp	r3, r8
+	beq	.L994
 	.loc 5 269 0
-	add	r3, r3, r8
+	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r5, #78]
 	cmp	r3, r4
-	bls	.L971
-.L972:
+	bls	.L994
+.L995:
 	.loc 5 286 0
-	mvn	r0, #0
-	sub	sp, fp, #40
-.LCFI303:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL833:
-.L980:
+	mov	r0, #-1
+	add	sp, sp, #28
+.LCFI127:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL828:
+.L1003:
 	.align	2
-.L979:
+.L1002:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
-.LFE250:
+.LFE260:
 	.fnend
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.align	2
+	.align	1
 	.global	ftl_memcpy
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
 	.fnstart
-.LFB268:
+.LFB278:
 	.loc 1 206 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL834:
-	.movsp ip
-	mov	ip, sp
-.LCFI304:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI305:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI306:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 206 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL829:
 	.loc 1 207 0
-	bl	memcpy
-.LVL835:
-	.loc 1 208 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE268:
+	b	memcpy
+.LVL830:
+.LFE278:
 	.fnend
 	.size	ftl_memcpy, .-ftl_memcpy
-	.align	2
+	.align	1
 	.global	FtlBbmTblFlush
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
 	.fnstart
-.LFB166:
+.LFB176:
 	.loc 4 80 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI307:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI308:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI309:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 80 0
-	.loc 4 87 0
-	ldr	r4, .L991
+.LCFI128:
 	.loc 4 91 0
-	mov	r5, #0
-.LVL836:
-	.loc 4 92 0
-	ldr	r7, .L991+4
+	movs	r5, #0
+.LVL831:
+	.loc 4 87 0
+	ldr	r4, .L1014
 	.loc 4 89 0
-	mov	r1, #0
+	movs	r1, #0
 	.loc 4 87 0
-	ldr	r0, [r4, #2244]
+	ldr	r0, [r4, #3240]
 	add	r6, r4, #152
 	.loc 4 88 0
 	ldr	r3, [r4, #3244]
 	.loc 4 89 0
 	ldrh	r2, [r4, #86]
 	.loc 4 87 0
-	str	r0, [r4, #3232]
+	str	r0, [r4, #3228]
 	.loc 4 88 0
-	str	r3, [r4, #3236]
+	str	r3, [r4, #3232]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL837:
-.L983:
+.LVL832:
+.L1006:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	blt	.L984
+	blt	.L1007
 	.loc 4 94 0
-	ldr	r6, [r4, #3236]
-.LVL838:
-.LBB420:
-.LBB421:
-.LBB422:
+	ldr	r6, [r4, #3232]
+.LVL833:
+.LBB443:
+.LBB444:
+.LBB445:
 	.loc 1 202 0
-	mov	r2, #16
-	mov	r1, #255
-.LBE422:
-.LBE421:
-.LBE420:
+	movs	r2, #16
+	movs	r1, #255
+.LBE445:
+.LBE444:
+.LBE443:
 	.loc 4 108 0
-	ldr	r9, .L991+8
+	ldr	r9, .L1014+12
 	.loc 4 109 0
-	ldr	r8, .L991+12
+	ldr	r8, .L1014+4
 	.loc 4 84 0
-	mov	r5, #0
-.LVL839:
-.LBB427:
-.LBB425:
-.LBB423:
+	movs	r5, #0
+.LVL834:
+.LBB450:
+.LBB448:
+.LBB446:
 	.loc 1 202 0
 	mov	r0, r6
-.LBE423:
-.LBE425:
-.LBE427:
-	.loc 4 82 0
-	mov	r7, r5
-.LVL840:
-.LBB428:
-.LBB426:
-.LBB424:
+.LBE446:
+.LBE448:
+.LBE450:
+	.loc 4 129 0
+	ldr	r10, .L1014+16
+.LBB451:
+.LBB449:
+.LBB447:
 	.loc 1 202 0
 	bl	memset
-.LVL841:
-.LBE424:
-.LBE426:
-.LBE428:
+.LVL835:
+.LBE447:
+.LBE449:
+.LBE451:
+	.loc 4 97 0
+	movw	r3, #61649
+	.loc 4 82 0
+	mov	r7, r5
+.LVL836:
 	.loc 4 97 0
-	ldr	r3, .L991+16
 	strh	r3, [r6]	@ movhi
 	.loc 4 98 0
 	ldr	r3, [r4, #136]
@@ -11565,47 +10690,47 @@ FtlBbmTblFlush:
 	.loc 4 102 0
 	ldr	r3, [r4, #4]
 	strh	r3, [r6, #12]	@ movhi
-.L985:
+.L1008:
 	.loc 4 104 0
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	.loc 4 106 0
-	mov	r10, #0
+	mov	fp, #0
 	.loc 4 107 0
 	ldrh	r1, [r4, #128]
 	ldrh	r2, [r4, #130]
 	.loc 4 104 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 105 0
 	ldr	r3, [r4, #3244]
 	.loc 4 106 0
-	str	r10, [r4, #3224]
+	str	fp, [r4, #3220]
 	.loc 4 105 0
-	str	r3, [r4, #3236]
+	str	r3, [r4, #3232]
 	.loc 4 107 0
 	orr	r3, r2, r1, lsl #10
 	.loc 4 108 0
 	ldrh	r0, [r6, #10]
 	.loc 4 107 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 108 0
 	ldrh	r3, [r4, #132]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	printk
-.LVL842:
+.LVL837:
 	.loc 4 109 0
-	mov	r3, #1
-	mov	r0, r8
+	movs	r3, #1
+	ldr	r0, .L1014+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL843:
+.LVL838:
 	.loc 4 110 0
 	ldrh	r3, [r4, #80]
 	ldrh	r2, [r4, #130]
-	sub	r3, r3, #1
+	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L986
+	blt	.L1009
 	.loc 4 113 0
 	ldr	r3, [r4, #136]
 	.loc 4 115 0
@@ -11613,9 +10738,9 @@ FtlBbmTblFlush:
 	.loc 4 121 0
 	ldr	r0, [r4, #3760]
 	.loc 4 113 0
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	.loc 4 117 0
-	strh	r10, [r4, #130]	@ movhi
+	strh	fp, [r4, #130]	@ movhi
 	.loc 4 113 0
 	str	r3, [r4, #136]
 	.loc 4 114 0
@@ -11627,2451 +10752,2370 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #132]	@ movhi
 	.loc 4 122 0
-	mov	r2, #1
+	movs	r2, #1
 	.loc 4 116 0
 	strh	r3, [r4, #128]	@ movhi
 	.loc 4 122 0
 	mov	r1, r2
 	.loc 4 119 0
-	lsl	r3, r3, #10
-	str	r3, [r4, #3228]
+	lsls	r3, r3, #10
+	str	r3, [r4, #3224]
 	.loc 4 121 0
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL844:
+.LVL839:
 	.loc 4 123 0
-	mov	r3, #1
+	movs	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL845:
-.L986:
+.LVL840:
+.L1009:
 	.loc 4 126 0
 	ldrh	r3, [r4, #130]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	strh	r3, [r4, #130]	@ movhi
 	.loc 4 127 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	bne	.L987
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	bne	.L1010
 	.loc 4 130 0
-	add	r5, r5, #1
-.LVL846:
+	adds	r5, r5, #1
+.LVL841:
 	.loc 4 129 0
-	ldr	r1, [r4, #3228]
+	ldr	r1, [r4, #3224]
 	.loc 4 130 0
 	uxth	r5, r5
-.LVL847:
+.LVL842:
 	.loc 4 129 0
-	ldr	r0, .L991+20
+	mov	r0, r10
 	bl	printk
-.LVL848:
+.LVL843:
 	.loc 4 131 0
 	cmp	r5, #3
-	bls	.L985
+	bls	.L1008
 	.loc 4 132 0
 	mov	r2, r5
-	ldr	r1, [r4, #3228]
-	ldr	r0, .L991+24
+	ldr	r1, [r4, #3224]
+	ldr	r0, .L1014+8
 	bl	printk
-.LVL849:
-.L989:
-	b	.L989
-.LVL850:
-.L984:
+.LVL844:
+.L1012:
+	b	.L1012
+.LVL845:
+.L1007:
 	.loc 4 92 0 discriminator 3
-	ldrh	r2, [r7]
-	ldr	r3, [r4, #3232]
+	ldrh	r2, [r4, #3860]
+	ldr	r3, [r4, #3228]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
-	lsl	r2, r2, #2
+	lsls	r2, r2, #2
 	.loc 4 91 0 discriminator 3
-	add	r5, r5, #1
+	adds	r5, r5, #1
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL851:
-	b	.L983
-.LVL852:
-.L990:
-	mov	r7, #1
-	b	.L985
-.L987:
+.LVL846:
+	b	.L1006
+.LVL847:
+.L1013:
+	movs	r7, #1
+	b	.L1008
+.L1010:
 	.loc 4 139 0
 	cmp	r7, #0
-	beq	.L990
+	beq	.L1013
 	.loc 4 146 0
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI310:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL853:
-.L992:
+	movs	r0, #0
+	add	sp, sp, #12
+.LCFI129:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL848:
+.L1015:
 	.align	2
-.L991:
+.L1014:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3860
-	.word	.LC90
-	.word	.LANCHOR0+3224
-	.word	-3887
-	.word	.LC91
-	.word	.LC92
-.LFE166:
+	.word	.LANCHOR0+3220
+	.word	.LC95
+	.word	.LC93
+	.word	.LC94
+.LFE176:
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.align	2
+	.align	1
 	.global	allocate_data_superblock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 	.fnstart
-.LFB238:
-	.loc 2 2531 0
+.LFB248:
+	.loc 2 2579 0
 	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL854:
-	.movsp ip
-	mov	ip, sp
-.LCFI311:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI312:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI313:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL849:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI130:
+	mov	r5, r0
+	ldr	r4, .L1051
 	.pad #20
 	sub	sp, sp, #20
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2531 0
-	.loc 2 2537 0
-	ldr	r9, .L1028
-	.loc 2 2531 0
-	mov	r5, r0
-	mov	r4, r9
-.LVL855:
-.L994:
-	.loc 2 2537 0
-	ldr	r7, .L1028+4
-.LVL856:
-	ldrh	r2, [r7, #-8]
-	ldrh	r3, [r7]
+.LCFI131:
+	.loc 2 2585 0
+	ldr	r9, .L1051+20
+.LVL850:
+.L1017:
+	ldr	r3, .L1051
+	ldr	r2, .L1051
+	ldrh	r3, [r3, #2320]
+	ldrh	r2, [r2, #2312]
 	add	r3, r3, r2
-	ldrh	r2, [r9, #16]
+	ldr	r2, .L1051
+	ldrh	r2, [r2, #16]
 	cmp	r3, r2
-	ble	.L995
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	movw	r2, #2537
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	ble	.L1018
+	.loc 2 2585 0 is_stmt 0 discriminator 1
+	movw	r2, #2585
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL857:
-.L995:
-	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1028+16
+.LVL851:
+.L1018:
+	.loc 2 2587 0 is_stmt 1
+	ldr	r3, .L1051+8
 	cmp	r5, r3
-	movne	r1, #0
-.LVL858:
-	bne	.L996
-	.loc 2 2540 0
-	ldrh	r3, [r7]
-	ldr	r1, [r4, #3140]
-.LVL859:
+	bne	.L1043
+	.loc 2 2588 0
+	ldrh	r3, [r4, #2320]
+	ldr	r1, [r4, #3136]
 	mul	r2, r1, r3
-	lsr	r1, r3, #1
-	add	r1, r1, #1
+	lsrs	r1, r3, #1
+	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL860:
-	.loc 2 2544 0
-	cmp	r1, #0
-	.loc 2 2545 0
-	subne	r1, r1, #1
-.LVL861:
-	uxthne	r1, r1
-.LVL862:
-.L996:
-	.loc 2 2546 0
-	ldr	r0, .L1028+20
+.LVL852:
+	.loc 2 2592 0
+	cbz	r1, .L1019
+	.loc 2 2593 0
+	subs	r1, r1, #1
+.LVL853:
+	uxth	r1, r1
+.LVL854:
+.L1019:
+	.loc 2 2594 0
+	ldr	r0, .L1051+12
 	bl	List_pop_index_node
-.LVL863:
-	ldrh	r3, [r7]
+.LVL855:
+	ldrh	r3, [r4, #2320]
 	mov	r6, r0
 	uxth	r8, r0
-	cmp	r3, #0
-	bne	.L997
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	movw	r2, #2546
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	cbnz	r3, .L1020
+	.loc 2 2594 0 is_stmt 0 discriminator 1
+	movw	r2, #2594
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL864:
-.L997:
-	.loc 2 2546 0 discriminator 3
-	ldrh	r3, [r7]
-	.loc 2 2550 0 is_stmt 1 discriminator 3
+.LVL856:
+.L1020:
+	.loc 2 2594 0 discriminator 3
+	ldrh	r3, [r4, #2320]
+	.loc 2 2598 0 is_stmt 1 discriminator 3
 	mov	r0, r5
-	.loc 2 2546 0 discriminator 3
-	sub	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	.loc 2 2549 0 discriminator 3
+	.loc 2 2594 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r4, #2320]	@ movhi
+	.loc 2 2597 0 discriminator 3
 	strh	r8, [r5]	@ movhi
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2598 0 discriminator 3
 	bl	make_superblock
-.LVL865:
-	.loc 2 2551 0 discriminator 3
+.LVL857:
+	.loc 2 2599 0 discriminator 3
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L998
-	.loc 2 2555 0
+	cbnz	r3, .L1021
+	.loc 2 2603 0
+	ldr	r3, [r4, #2300]
 	uxth	r6, r6
-	ldr	r3, [r4, #2260]
-	mvn	r2, #0
-	lsl	r6, r6, #1
-	.loc 2 2556 0
+	movw	r2, #65535
+	.loc 2 2604 0
 	mov	r0, r8
-	.loc 2 2555 0
-	strh	r2, [r3, r6]	@ movhi
-	.loc 2 2556 0
+	.loc 2 2603 0
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	.loc 2 2604 0
 	bl	INSERT_DATA_LIST
-.LVL866:
-	.loc 2 2557 0
-	ldrh	r2, [r7, #-8]
-	ldrh	r3, [r7]
+.LVL858:
+	.loc 2 2605 0
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L994
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	movw	r2, #2557
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	ble	.L1017
+	.loc 2 2605 0 is_stmt 0 discriminator 1
+	movw	r2, #2605
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL867:
-	b	.L994
-.L998:
-	.loc 2 2560 0 is_stmt 1
-	ldrh	r2, [r7, #-8]
-	ldrh	r3, [r7]
+.LVL859:
+	b	.L1017
+.L1043:
+	movs	r1, #0
+.LVL860:
+	b	.L1019
+.LVL861:
+.L1021:
+	.loc 2 2608 0 is_stmt 1
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1000
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	mov	r2, #2560
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	ble	.L1023
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	r2, #2608
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL868:
-.L1000:
-	.loc 2 2564 0 is_stmt 1 discriminator 1
-	ldr	r0, [r4, #3760]
-	mov	r2, #20
-	ldrh	r1, [r4, #8]
-	mov	r7, #0
-.LVL869:
-	add	ip, r5, #16
-	mov	lr, r7
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [fp, #-48]
-.L1001:
-	.loc 2 2563 0 discriminator 1
-	ldr	r1, [fp, #-48]
-	cmp	r1, r3
-	bne	.L1003
-	.loc 2 2571 0
-	cmp	r7, #0
-	bne	.L1004
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	movw	r2, #2571
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+.LVL862:
+.L1023:
+	.loc 2 2612 0 is_stmt 1 discriminator 1
+	ldr	r1, [r4, #3760]
+	mov	r10, #20
+	ldrh	r2, [r4, #8]
+	add	fp, r5, #16
+	movs	r7, #0
+	mov	r0, fp
+	mov	r3, r1
+	mov	ip, r7
+	mla	r2, r10, r2, r1
+	str	r2, [sp, #4]
+.L1024:
+	.loc 2 2611 0 discriminator 1
+	ldr	r2, [sp, #4]
+	cmp	r2, r3
+	bne	.L1026
+	.loc 2 2619 0
+	cbnz	r7, .L1027
+	.loc 2 2619 0 is_stmt 0 discriminator 1
+	movw	r2, #2619
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL870:
-.L1004:
-	.loc 2 2573 0 is_stmt 1
-	ldr	r3, .L1028+24
-	ldrh	r3, [r3]
+.LVL863:
+.L1027:
+	.loc 2 2621 0 is_stmt 1
+	ldrh	r3, [r4, #2564]
 	cmp	r3, r8
-	bne	.L1005
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	movw	r2, #2573
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	bne	.L1028
+	.loc 2 2621 0 is_stmt 0 discriminator 1
+	movw	r2, #2621
+	mov	r1, r9
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL871:
-.L1005:
-	.loc 2 2574 0 is_stmt 1
+.LVL864:
+.L1028:
+	.loc 2 2622 0 is_stmt 1
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
+	.loc 2 2623 0
+	ldr	r2, [r4, #2304]
+	.loc 2 2622 0
 	cmp	r3, #0
-	bne	.L1006
-	.loc 2 2575 0
-	ldr	r1, [r4, #2248]
-	lsl	r2, r6, #1
-	ldrh	r3, [r1, r2]
+	bne	.L1029
+	.loc 2 2623 0
+	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	.loc 2 2576 0
-	ldrhne	r0, [r4, #68]
-	.loc 2 2578 0
-	moveq	r3, #2
-	.loc 2 2576 0
-	addne	r3, r3, r0
-	.loc 2 2580 0
+	beq	.L1030
+	.loc 2 2624 0
+	ldrh	r1, [r4, #68]
+	add	r3, r3, r1
+.L1050:
+	.loc 2 2626 0
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 2 2628 0
+	movs	r1, #0
+	.loc 2 2627 0
+	ldr	r3, [r4, #2524]
+	.loc 2 2628 0
 	mov	r0, r8
-	.loc 2 2578 0
-	strh	r3, [r1, r2]	@ movhi
-	.loc 2 2580 0
-	mov	r1, #0
-	.loc 2 2579 0
-	ldr	r3, [r4, #2480]
-	add	r3, r3, #1
-	str	r3, [r4, #2480]
-	.loc 2 2580 0
+	.loc 2 2627 0
+	adds	r3, r3, #1
+	str	r3, [r4, #2524]
+	.loc 2 2628 0
 	bl	ftl_set_blk_mode
-.LVL872:
-.L1009:
-	.loc 2 2587 0
-	ldr	r3, [r4, #2248]
-	lsl	r6, r6, #1
-	ldr	r2, [r4, #2496]
-	.loc 2 2590 0
-	ldr	r0, [r4, #2480]
-	.loc 2 2587 0
-	ldrh	r3, [r3, r6]
-	.loc 2 2590 0
+.LVL865:
+.L1032:
+	.loc 2 2635 0
+	ldr	r3, [r4, #2304]
+	ldr	r2, [r4, #2540]
+	.loc 2 2638 0
+	ldrh	r0, [r4, #68]
+	.loc 2 2635 0
+	ldrh	r3, [r3, r6, lsl #1]
+	.loc 2 2638 0
 	ldrh	r1, [r4, #16]
-	.loc 2 2587 0
+	.loc 2 2635 0
 	cmp	r3, r2
-	.loc 2 2590 0
-	ldrh	r2, [r4, #68]
-	.loc 2 2588 0
-	strhi	r3, [r4, #2496]
-	.loc 2 2590 0
-	ldr	r3, [r4, #2484]
-	mla	r0, r0, r2, r3
+	.loc 2 2638 0
+	ldr	r2, [r4, #2524]
+	.loc 2 2636 0
+	it	hi
+	strhi	r3, [r4, #2540]
+	.loc 2 2638 0
+	ldr	r3, [r4, #2528]
+	mla	r0, r2, r0, r3
 	bl	__aeabi_uidiv
-.LVL873:
-	.loc 2 2591 0
+.LVL866:
+	.loc 2 2639 0
 	ldr	r2, [r4, #3820]
-	.loc 2 2594 0
+	.loc 2 2642 0
 	ldr	r1, [r4, #3760]
-	.loc 2 2590 0
-	str	r0, [r4, #2488]
-	.loc 2 2591 0
+	.loc 2 2638 0
+	str	r0, [r4, #2532]
+	.loc 2 2639 0
 	ldr	r3, [r2, #16]
-	.loc 2 2594 0
-	ldr	r0, .L1028+28
-	.loc 2 2591 0
-	add	r3, r3, #1
+	.loc 2 2642 0
+	ldr	r0, .L1051+16
+	.loc 2 2639 0
+	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	mov	r2, #20
+	movs	r2, #20
 	mla	r2, r2, r7, r1
-	add	r3, r1, #4
-	add	r2, r2, #24
-.L1011:
-	add	r3, r3, #20
-	.loc 2 2593 0 discriminator 1
+	adds	r3, r1, #4
+	adds	r2, r2, #24
+.L1034:
+	adds	r3, r3, #20
+	.loc 2 2641 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1012
-	.loc 2 2595 0
-	mov	r2, r7
+	bne	.L1035
+	.loc 2 2643 0
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
+	mov	r2, r7
 	ldr	r0, [r4, #3760]
-	.loc 2 2597 0
+	.loc 2 2645 0
 	mov	r10, #0
-	.loc 2 2595 0
+	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL874:
-	.loc 2 2596 0
-	mov	r2, r10
-.LVL875:
-	.loc 2 2598 0
-	mov	r1, #20
-.L1013:
-	.loc 2 2597 0 discriminator 1
-	uxth	r3, r10
-	cmp	r7, r3
-	bhi	.L1015
-	.loc 2 2608 0
-	cmp	r2, #0
-	ble	.L1016
-	.loc 2 2609 0
+.LVL867:
+	.loc 2 2644 0
+	mov	r3, r10
+.LVL868:
+	.loc 2 2646 0
+	movs	r1, #20
+.L1036:
+	.loc 2 2645 0 discriminator 1
+	uxth	r2, r10
+	cmp	r7, r2
+	bhi	.L1038
+	.loc 2 2656 0
+	cmp	r3, #0
+	ble	.L1039
+	.loc 2 2657 0
 	mov	r0, r8
 	bl	update_multiplier_value
-.LVL876:
-	.loc 2 2610 0
+.LVL869:
+	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL877:
-.L1016:
-	.loc 2 2613 0
+.LVL870:
+.L1039:
+	.loc 2 2661 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-.LVL878:
 	cmp	r2, #0
-	bne	.L1017
+	bne	.L1040
+	.loc 2 2663 0
+	ldr	r3, [r4, #2300]
+.LVL871:
+	movw	r2, #65535
+	.loc 2 2664 0
+	mov	r0, r8
+	.loc 2 2663 0
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	.loc 2 2664 0
+	bl	INSERT_DATA_LIST
+.LVL872:
+	.loc 2 2665 0
+	b	.L1017
+.L1026:
+	.loc 2 2612 0
+	str	ip, [r3, #8]
+	.loc 2 2614 0
+	movw	lr, #65535
+	.loc 2 2613 0
+	str	ip, [r3, #12]
+	.loc 2 2614 0
+	ldrh	r2, [r0], #2
+	cmp	r2, lr
+	beq	.L1025
 	.loc 2 2615 0
-	ldr	r3, [r4, #2260]
-	mvn	r2, #0
+	mla	lr, r10, r7, r1
 	.loc 2 2616 0
-	mov	r0, r8
+	adds	r7, r7, #1
+.LVL873:
 	.loc 2 2615 0
-	strh	r2, [r3, r6]	@ movhi
+	lsls	r2, r2, #10
 	.loc 2 2616 0
-	bl	INSERT_DATA_LIST
-.LVL879:
-	.loc 2 2617 0
-	b	.L994
-.L1003:
-	.loc 2 2564 0
-	str	lr, [r3, #8]
-	.loc 2 2566 0
-	movw	r10, #65535
-	.loc 2 2565 0
-	str	lr, [r3, #12]
-	add	r3, r3, #20
-	.loc 2 2566 0
-	ldrh	r1, [ip], #2
-	cmp	r1, r10
-	.loc 2 2567 0
-	mlane	r10, r2, r7, r0
-	lslne	r1, r1, #10
-	.loc 2 2568 0
-	addne	r7, r7, #1
-.LVL880:
-	uxthne	r7, r7
-.LVL881:
-	.loc 2 2567 0
-	strne	r1, [r10, #4]
-	b	.L1001
-.L1006:
-	.loc 2 2582 0
-	ldr	r1, [r4, #2248]
-	lsl	r3, r6, #1
-.LBB429:
-.LBB430:
+	uxth	r7, r7
+.LVL874:
+	.loc 2 2615 0
+	str	r2, [lr, #4]
+.L1025:
+	adds	r3, r3, #20
+	b	.L1024
+.L1030:
+	.loc 2 2626 0
+	movs	r3, #2
+	b	.L1050
+.L1029:
+	.loc 2 2630 0
+	ldrh	r3, [r2, r6, lsl #1]
+.LBB452:
+.LBB453:
 	mov	r0, r8
-.LBE430:
-.LBE429:
-	ldrh	r2, [r1, r3]
-	add	r2, r2, #1
-	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2583 0
-	ldr	r3, [r4, #2484]
-	add	r3, r3, #1
-	str	r3, [r4, #2484]
-.LBB432:
-.LBB431:
+.LBE453:
+.LBE452:
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 2 2631 0
+	ldr	r3, [r4, #2528]
+	adds	r3, r3, #1
+	str	r3, [r4, #2528]
+.LBB455:
+.LBB454:
 	bl	ftl_set_blk_mode.part.6
-.LVL882:
-	b	.L1009
-.L1012:
-.LBE431:
-.LBE432:
-	.loc 2 2594 0 discriminator 3
+.LVL875:
+	b	.L1032
+.L1035:
+.LBE454:
+.LBE455:
+	.loc 2 2642 0 discriminator 3
 	ldr	r1, [r3, #-20]
-	and	r1, r1, r0
+	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1011
-.LVL883:
-.L1015:
-	.loc 2 2598 0
-	mul	r3, r1, r10
+	b	.L1034
+.LVL876:
+.L1038:
+	.loc 2 2646 0
+	mul	r2, r1, r10
 	ldr	r0, [r4, #3760]
-	add	ip, r0, r3
-	ldr	r3, [r0, r3]
-	cmn	r3, #1
-	bne	.L1014
-	.loc 2 2600 0
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1037
+	.loc 2 2648 0
 	ldr	r0, [ip, #4]
-	.loc 2 2599 0
-	add	r2, r2, #1
-	str	r1, [fp, #-56]
-	str	r3, [fp, #-52]
-	.loc 2 2601 0
+	.loc 2 2647 0
+	adds	r3, r3, #1
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
+	.loc 2 2649 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2599 0
-	str	r2, [fp, #-48]
-	.loc 2 2601 0
+	.loc 2 2647 0
+	str	r3, [sp, #4]
+	.loc 2 2649 0
 	bl	FtlBbmMapBadBlock
-.LVL884:
-	.loc 2 2602 0
-	ldr	r3, [fp, #-52]
-	add	r0, r5, r10, lsl #1
-	.loc 2 2603 0
-	ldr	r1, [fp, #-56]
-	ldr	r2, [fp, #-48]
-.LVL885:
-	.loc 2 2602 0
-	strh	r3, [r0, #16]	@ movhi
-	.loc 2 2603 0
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	sub	r3, r3, #1
-	strb	r3, [r5, #7]
-.L1014:
+.LVL877:
+	.loc 2 2650 0
+	ldr	r2, [sp, #8]
+	.loc 2 2651 0
+	ldr	r1, [sp, #12]
+	ldr	r3, [sp, #4]
+.LVL878:
+	.loc 2 2650 0
+	strh	r2, [fp]	@ movhi
+	.loc 2 2651 0
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r5, #7]
+.L1037:
 	add	r10, r10, #1
-	b	.L1013
-.LVL886:
-.L1017:
-	.loc 2 2620 0
+	add	fp, fp, #2
+	b	.L1036
+.L1040:
+	.loc 2 2668 0
 	ldrh	r3, [r4, #78]
-	.loc 2 2621 0
+.LVL879:
+	.loc 2 2669 0
 	strh	r8, [r5]	@ movhi
-	.loc 2 2620 0
+	.loc 2 2668 0
 	smulbb	r3, r3, r2
-	.loc 2 2622 0
-	mov	r2, #0
+	.loc 2 2670 0
+	movs	r2, #0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2623 0
+	.loc 2 2671 0
 	strb	r2, [r5, #6]
-	.loc 2 2624 0
-	ldr	r2, [r4, #2472]
-	.loc 2 2620 0
+	.loc 2 2672 0
+	ldr	r2, [r4, #2516]
+	.loc 2 2668 0
 	uxth	r3, r3
-	.loc 2 2625 0
-	ldr	r1, [r4, #2260]
-	.loc 2 2620 0
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 2624 0
+	.loc 2 2672 0
 	str	r2, [r5, #12]
-	add	r2, r2, #1
-	str	r2, [r4, #2472]
-	.loc 2 2625 0
-	ldrh	r2, [r5]
-	lsl	r2, r2, #1
-	strh	r3, [r1, r2]	@ movhi
-	.loc 2 2626 0
+	adds	r2, r2, #1
+	str	r2, [r4, #2516]
+	.loc 2 2673 0
+	ldr	r2, [r4, #2300]
+	ldrh	r1, [r5]
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2674 0
 	ldrh	r3, [r5, #4]
-	cmp	r3, #0
-	beq	.L1018
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	r3, .L1041
+	.loc 2 2674 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1019
-.L1018:
-	.loc 2 2626 0 discriminator 3
-	movw	r2, #2626
-	ldr	r1, .L1028+8
-	ldr	r0, .L1028+12
+	cbnz	r3, .L1042
+.L1041:
+	.loc 2 2674 0 discriminator 3
+	movw	r2, #2674
+	ldr	r1, .L1051+20
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL887:
-.L1019:
-	.loc 2 2628 0 is_stmt 1
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI314:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL888:
-.L1029:
+.LVL880:
+.L1042:
+	.loc 2 2676 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #20
+.LCFI132:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL881:
+.L1052:
 	.align	2
-.L1028:
+.L1051:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2276
-	.word	.LANCHOR1+360
 	.word	.LC1
-	.word	.LANCHOR0+2376
-	.word	.LANCHOR0+2272
-	.word	.LANCHOR0+2568
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2316
 	.word	-1024
-.LFE238:
+	.word	.LANCHOR1+360
+.LFE248:
 	.fnend
 	.size	allocate_data_superblock, .-allocate_data_superblock
-	.align	2
+	.align	1
 	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
 	.fnstart
-.LFB257:
-	.loc 5 390 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL889:
-	.movsp ip
-	mov	ip, sp
-.LCFI315:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI316:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI317:
-	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
+.LFB267:
 	.loc 5 390 0
-	.loc 5 395 0
-	ldr	r6, .L1042
-	movw	r3, #3186
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL882:
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI133:
 	.loc 5 390 0
-	str	r0, [fp, #-48]
-	.loc 5 395 0
-	ldrh	r3, [r6, r3]
-	cmp	r3, #0
-	movne	r7, #0
-.LBB435:
-.LBB436:
-	.loc 5 398 0
-	ldrne	r10, .L1042+4
-.LBE436:
-.LBE435:
+	mov	r8, r0
 	.loc 5 395 0
-	bne	.L1032
-.LVL890:
-.L1031:
+	ldr	r4, .L1065
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L1054
+	movs	r7, #0
+	add	r10, r4, #3184
+.LVL883:
+.L1055:
+.LBB458:
+.LBB459:
+	.loc 5 396 0
+	ldrh	r2, [r4, #8]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1061
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL884:
+.L1054:
+.LBE459:
+.LBE458:
 	.loc 5 415 0
-	mov	r0, #0
-.LVL891:
-	sub	sp, fp, #40
-.LCFI318:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL892:
-.L1038:
-.LCFI319:
-.LBB438:
-.LBB437:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL885:
+.L1061:
+.LBB461:
+.LBB460:
 	.loc 5 397 0
-	uxtah	r3, r6, r7
-	ldr	r1, [fp, #-48]
-	mov	r8, #0
+	uxtah	r3, r4, r7
+	mov	r1, r8
+	mov	fp, #0
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
-.LVL893:
 	bl	V2P_block
-.LVL894:
+.LVL886:
 	mov	r9, r0
-.L1033:
+.L1056:
 	.loc 5 398 0
-	ldrh	r3, [r10]
-	uxth	r4, r8
-	cmp	r3, r4
-	bhi	.L1037
-	add	r7, r7, #1
-.LVL895:
-.L1032:
-	.loc 5 396 0
-	ldrh	r2, [r6, #8]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L1038
-	.loc 5 412 0
-	bl	FtlGcReFreshBadBlk
-.LVL896:
-	b	.L1031
-.L1037:
+	ldrh	r3, [r4, #3182]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L1060
+	adds	r7, r7, #1
+	b	.L1055
+.L1060:
 	.loc 5 399 0
-	uxth	r3, r8
-	ldr	r5, .L1042+8
-	lsl	r1, r3, #1
-	ldrh	r1, [r5, r1]
-	cmp	r1, r9
-	bne	.L1034
+	uxth	r6, fp
+	add	r3, r4, r6, lsl #1
+	ldrh	r3, [r3, #3184]
+	cmp	r3, r9
+	bne	.L1057
 	.loc 5 401 0
 	mov	r1, r9
-	ldr	r0, .L1042+12
-	str	r3, [fp, #-52]
+	ldr	r0, .L1065+4
 	bl	printk
-.LVL897:
+.LVL887:
 	.loc 5 403 0
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
-.LVL898:
+.LVL888:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL899:
-	ldr	r3, [fp, #-52]
+.LVL889:
 	.loc 5 405 0
-	ldrh	r1, [r10]
-	add	r3, r5, r3, lsl #1
-.L1035:
-	cmp	r4, r1
-	bcc	.L1036
+	ldrh	r1, [r4, #3182]
+	add	r3, r10, r6, lsl #1
+.L1058:
+	cmp	r5, r1
+	bcc	.L1059
 	.loc 5 407 0
-	sub	r1, r1, #1
-	strh	r1, [r10]	@ movhi
-.L1034:
-	add	r8, r8, #1
-	b	.L1033
-.L1036:
+	subs	r1, r1, #1
+	strh	r1, [r4, #3182]	@ movhi
+.L1057:
+	add	fp, fp, #1
+	b	.L1056
+.L1059:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
-	add	r4, r4, #1
-.LVL900:
-	uxth	r4, r4
-.LVL901:
+	adds	r5, r5, #1
+.LVL890:
+	uxth	r5, r5
+.LVL891:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1035
-.L1043:
+	b	.L1058
+.L1066:
 	.align	2
-.L1042:
+.L1065:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3186
-	.word	.LANCHOR0+3188
-	.word	.LC93
-.LBE437:
-.LBE438:
-.LFE257:
+	.word	.LC96
+.LBE460:
+.LBE461:
+.LFE267:
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.align	2
+	.align	1
 	.global	update_vpc_list
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
 	.fnstart
-.LFB241:
-	.loc 2 2687 0
+.LFB251:
+	.loc 2 2735 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL902:
-	.movsp ip
-	mov	ip, sp
-.LCFI320:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI321:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI322:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2687 0
-	.loc 2 2688 0
-	lsl	r3, r0, #1
-	.loc 2 2687 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL892:
+	.loc 2 2736 0
+	ldr	r2, .L1077
+	.loc 2 2735 0
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI134:
+	.loc 2 2735 0
 	mov	r5, r0
-	.loc 2 2688 0
-	ldr	r2, .L1054
-	ldr	r1, [r2, #2260]
 	mov	r4, r2
-	ldrh	r3, [r1, r3]
+	.loc 2 2736 0
+	ldr	r3, [r2, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1045
-	.loc 2 2689 0
-	movw	r1, #2568
-	ldrh	r0, [r2, r1]
-	cmp	r0, r5
-	.loc 2 2691 0
-	mvneq	r3, #0
-	strheq	r3, [r2, r1]	@ movhi
-	.loc 2 2689 0
-	beq	.L1047
-	.loc 2 2692 0
-	movw	r1, #2280
-	ldrh	r1, [r2, r1]
-	cmp	r1, r5
-	beq	.L1044
-	.loc 2 2692 0 is_stmt 0 discriminator 1
-	movw	r1, #2328
-	ldrh	r1, [r2, r1]
-	cmp	r1, r5
-	beq	.L1044
-	.loc 2 2692 0 discriminator 2
-	movw	r1, #2376
-	ldrh	r2, [r2, r1]
-	cmp	r2, r5
-	beq	.L1044
-.L1047:
-.LBB441:
-.LBB442:
-	.loc 2 2696 0 is_stmt 1
+	bne	.L1068
+	.loc 2 2737 0
+	ldrh	r1, [r2, #2564]
+	cmp	r1, r0
+	bne	.L1069
+	.loc 2 2739 0
+	movw	r3, #65535
+	strh	r3, [r2, #2564]	@ movhi
+.L1070:
+.LVL893:
+.LBB464:
+.LBB465:
+	.loc 2 2744 0
 	mov	r1, r5
-	ldr	r0, .L1054+4
+	ldr	r0, .L1077+4
 	bl	List_remove_node
-.LVL903:
-	movw	r3, #2268
-	ldrh	r3, [r4, r3]
-	cmp	r3, #0
-	bne	.L1049
-	movw	r2, #2696
-	ldr	r1, .L1054+8
-	ldr	r0, .L1054+12
+.LVL894:
+	ldrh	r3, [r4, #2312]
+	cbnz	r3, .L1072
+	movw	r2, #2744
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	printk
-.LVL904:
-.L1049:
-	movw	r6, #2268
-	.loc 2 2697 0
+.LVL895:
+.L1072:
+	ldrh	r3, [r4, #2312]
+	.loc 2 2745 0
 	mov	r0, r5
-	.loc 2 2696 0
-	ldrh	r3, [r4, r6]
-	sub	r3, r3, #1
-	strh	r3, [r4, r6]	@ movhi
-	.loc 2 2697 0
+	.loc 2 2744 0
+	subs	r3, r3, #1
+	strh	r3, [r4, #2312]	@ movhi
+	.loc 2 2745 0
 	bl	free_data_superblock
-.LVL905:
-	.loc 2 2698 0
+.LVL896:
+	.loc 2 2746 0
 	mov	r0, r5
 	bl	FtlGcFreeBadSuperBlk
-.LVL906:
-	.loc 2 2699 0
-	movw	r3, #2276
-	ldrh	r2, [r4, r6]
-	ldrh	r3, [r4, r3]
+.LVL897:
+	.loc 2 2747 0
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1053
-	movw	r2, #2699
-	ldr	r1, .L1054+8
-	ldr	r0, .L1054+12
+	ble	.L1076
+	movw	r2, #2747
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	printk
-.LVL907:
-.L1053:
-	mov	r3, #1
-	b	.L1044
-.LVL908:
-.L1045:
-.LBE442:
-.LBE441:
-	.loc 2 2702 0
-	bl	List_update_data_list
-.LVL909:
-	.loc 2 2704 0
-	mov	r3, #0
-.L1044:
-	.loc 2 2705 0
+.LVL898:
+.L1076:
+	movs	r3, #1
+	b	.L1067
+.LVL899:
+.L1069:
+.LBE465:
+.LBE464:
+	.loc 2 2740 0
+	ldrh	r1, [r2, #2324]
+	cmp	r1, r0
+	beq	.L1067
+	.loc 2 2740 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r2, #2372]
+	cmp	r1, r0
+	beq	.L1067
+	.loc 2 2740 0 discriminator 2
+	ldrh	r2, [r2, #2420]
+	cmp	r2, r0
+	bne	.L1070
+.L1067:
+	.loc 2 2753 0 is_stmt 1
 	mov	r0, r3
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1055:
+	pop	{r3, r4, r5, pc}
+.LVL900:
+.L1068:
+	.loc 2 2750 0
+	bl	List_update_data_list
+.LVL901:
+	.loc 2 2752 0
+	movs	r3, #0
+	b	.L1067
+.L1078:
 	.align	2
-.L1054:
+.L1077:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2256
+	.word	.LANCHOR0+2296
 	.word	.LANCHOR1+385
 	.word	.LC1
-.LFE241:
+.LFE251:
 	.fnend
 	.size	update_vpc_list, .-update_vpc_list
-	.align	2
+	.align	1
 	.global	decrement_vpc_count
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 	.fnstart
-.LFB242:
-	.loc 2 2708 0
+.LFB252:
+	.loc 2 2756 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL910:
-	.movsp ip
-	mov	ip, sp
-.LCFI323:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI324:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI325:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2708 0
-	.loc 2 2711 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL902:
+	.loc 2 2759 0
 	movw	r3, #65535
-	.loc 2 2708 0
-	mov	r5, r0
-	.loc 2 2711 0
+	.loc 2 2756 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI135:
+	.loc 2 2759 0
 	cmp	r0, r3
-	ldr	r6, .L1068
-	beq	.L1057
-	.loc 2 2712 0
-	ldr	r3, [r6, #2260]
-	lsl	r4, r0, #1
-	ldrh	r2, [r3, r4]
-	cmp	r2, #0
-	.loc 2 2717 0
-	subne	r2, r2, #1
-	strhne	r2, [r3, r4]	@ movhi
-	.loc 2 2712 0
-	bne	.L1057
-	.loc 2 2713 0
+	.loc 2 2756 0
+	mov	r4, r0
+	ldr	r5, .L1088
+	.loc 2 2759 0
+	beq	.L1080
+	.loc 2 2760 0
+	ldr	r3, [r5, #2300]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1081
+	.loc 2 2761 0
 	mov	r1, r0
-	ldr	r0, .L1068+4
+	ldr	r0, .L1088+4
 	bl	printk
-.LVL911:
-	.loc 2 2714 0
-	ldr	r3, [r6, #2260]
-	ldrh	r4, [r3, r4]
-	cmp	r4, #0
-	beq	.L1059
-.L1066:
-	.loc 2 2723 0
-	mov	r4, #0
-.L1056:
-	.loc 2 2733 0
-	mov	r0, r4
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1059:
-	.loc 2 2714 0 discriminator 1
-	movw	r2, #2714
-.L1067:
-	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1068+8
-	ldr	r0, .L1068+12
+.LVL903:
+	.loc 2 2762 0
+	ldr	r3, [r5, #2300]
+	ldrh	r6, [r3, r4, lsl #1]
+	cbz	r6, .L1082
+.L1086:
+	.loc 2 2771 0
+	movs	r6, #0
+.L1079:
+	.loc 2 2781 0
+	mov	r0, r6
+	pop	{r4, r5, r6, pc}
+.LVL904:
+.L1082:
+	.loc 2 2762 0 discriminator 1
+	movw	r2, #2762
+.L1087:
+	.loc 2 2778 0 discriminator 2
+	ldr	r1, .L1088+8
+	ldr	r0, .L1088+12
 	bl	printk
-.LVL912:
-	b	.L1056
-.L1057:
-	.loc 2 2721 0
-	ldr	r7, .L1068+16
+.LVL905:
+	b	.L1079
+.LVL906:
+.L1081:
+	.loc 2 2765 0
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1080:
+	.loc 2 2769 0
+	ldrh	r0, [r5, #3952]
 	movw	r3, #65535
-	ldrh	r0, [r7]
-.LVL913:
 	cmp	r0, r3
-	.loc 2 2722 0
-	strheq	r5, [r7]	@ movhi
-	beq	.L1066
-.L1061:
-	.loc 2 2724 0
-	cmp	r5, r0
-	beq	.L1066
-	.loc 2 2727 0
+	bne	.L1084
+	.loc 2 2770 0
+	strh	r4, [r5, #3952]	@ movhi
+	b	.L1086
+.L1084:
+	.loc 2 2772 0
+	cmp	r4, r0
+	beq	.L1086
+	.loc 2 2775 0
 	bl	update_vpc_list
-.LVL914:
-	.loc 2 2730 0
-	ldr	r2, [r6, #2252]
-	.loc 2 2727 0
-	adds	r4, r0, #0
-	.loc 2 2730 0
-	ldr	r3, [r6, #2256]
-	.loc 2 2727 0
-	movne	r4, #1
-	.loc 2 2730 0
-	ldr	r1, [r6, #2260]
-	.loc 2 2729 0
-	strh	r5, [r7]	@ movhi
-	.loc 2 2730 0
-	sub	r3, r3, r2
-	asr	r2, r3, #1
-	ldr	r3, .L1068+20
-	mul	r3, r3, r2
-	uxth	r2, r3
-	uxth	r3, r3
-	lsl	r2, r2, #1
-	cmp	r3, r5
-	ldrh	r2, [r1, r2]
-	clz	r2, r2
-	lsr	r2, r2, #5
-	moveq	r2, #0
+.LVL907:
+	.loc 2 2778 0
+	ldr	r2, [r5, #2292]
+	.loc 2 2775 0
+	adds	r6, r0, #0
+	.loc 2 2778 0
+	ldr	r3, [r5, #2296]
+	.loc 2 2775 0
+	it	ne
+	movne	r6, #1
+	.loc 2 2777 0
+	strh	r4, [r5, #3952]	@ movhi
+	.loc 2 2778 0
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1088+16
+	muls	r3, r2, r3
+	ldr	r2, [r5, #2300]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	beq	.L1056
-	.loc 2 2730 0 is_stmt 0 discriminator 2
-	movw	r2, #2730
-	b	.L1067
-.L1069:
+	bne	.L1079
+	.loc 2 2778 0 is_stmt 0 discriminator 1
+	cmp	r4, r1
+	beq	.L1079
+	.loc 2 2778 0 discriminator 2
+	movw	r2, #2778
+	b	.L1087
+.L1089:
 	.align	2
-.L1068:
+.L1088:
 	.word	.LANCHOR0
-	.word	.LC94
+	.word	.LC97
 	.word	.LANCHOR1+401
 	.word	.LC1
-	.word	.LANCHOR0+3952
 	.word	-1431655765
-.LFE242:
+.LFE252:
 	.fnend
 	.size	decrement_vpc_count, .-decrement_vpc_count
-	.align	2
+	.align	1
 	.global	FtlWriteDump_data
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 	.fnstart
-.LFB208:
-	.loc 2 947 0 is_stmt 1
+.LFB218:
+	.loc 2 996 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI326:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI327:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI328:
-	.pad #28
-	sub	sp, sp, #28
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 947 0
-	.loc 2 948 0
-	ldr	r6, .L1088
-	ldr	r4, .L1088+4
-	ldrh	r2, [r6, #4]
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI136:
+	.pad #24
+	sub	sp, sp, #24
+.LCFI137:
+	.loc 2 997 0
+	ldr	r4, .L1108
+	ldrh	r2, [r4, #2328]
 	cmp	r2, #0
-	beq	.L1071
-	.loc 2 948 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #2288]	@ zero_extendqisi2
+	beq	.L1091
+	.loc 2 997 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1071
-	.loc 2 949 0 is_stmt 1
-	ldrb	r1, [r4, #2287]	@ zero_extendqisi2
+	bne	.L1091
+	.loc 2 998 0 is_stmt 1
+	ldrb	r1, [r4, #2331]	@ zero_extendqisi2
 	ldrh	r3, [r4, #78]
-	mul	r3, r3, r1
+	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1071
-.LBB446:
-.LBB447:
-	.loc 2 956 0
-	ldrb	r8, [r4, #2290]	@ zero_extendqisi2
-	cmp	r8, #0
-	bne	.L1070
-	.loc 2 951 0
-	ldr	r7, [r4, #2436]
-	.loc 2 958 0
-	mov	r2, r8
-	sub	r1, fp, #68
-	.loc 2 953 0
-	ldrh	r9, [r4, #8]
-	.loc 2 951 0
-	sub	r7, r7, #1
-.LVL915:
-	.loc 2 958 0
-	mov	r0, r7
+	beq	.L1091
+.LBB469:
+.LBB470:
+	.loc 2 1005 0
+	ldrb	r7, [r4, #2334]	@ zero_extendqisi2
+	cbnz	r7, .L1090
+	.loc 2 1000 0
+	ldr	r6, [r4, #2480]
+	.loc 2 1007 0
+	mov	r2, r7
+	mov	r1, sp
+	.loc 2 1002 0
+	ldrh	r8, [r4, #8]
+	.loc 2 1000 0
+	subs	r6, r6, #1
+.LVL908:
+	.loc 2 1007 0
+	mov	r0, r6
 	bl	log2phys
-.LVL916:
-	.loc 2 961 0
-	ldr	r3, [fp, #-68]
-	.loc 2 964 0
+.LVL909:
+	.loc 2 1010 0
+	ldr	r3, [sp]
+	.loc 2 1013 0
 	ldr	r5, [r4, #3244]
-	.loc 2 963 0
-	ldr	r0, [r4, #2244]
-	.loc 2 967 0
-	cmn	r3, #1
-	.loc 2 961 0
-	str	r3, [fp, #-60]
-	.loc 2 962 0
-	str	r7, [fp, #-48]
-	.loc 2 963 0
-	str	r0, [fp, #-56]
-	.loc 2 964 0
-	str	r5, [fp, #-52]
-	.loc 2 966 0
-	str	r8, [r5, #4]
-	.loc 2 967 0
-	beq	.L1073
-	.loc 2 969 0
-	mov	r2, r8
-	mov	r1, #1
-	sub	r0, fp, #64
+	.loc 2 1012 0
+	ldr	r0, [r4, #3240]
+	.loc 2 1010 0
+	str	r3, [sp, #8]
+	.loc 2 1016 0
+	adds	r3, r3, #1
+	.loc 2 1011 0
+	str	r6, [sp, #20]
+	.loc 2 1012 0
+	str	r0, [sp, #12]
+	.loc 2 1013 0
+	str	r5, [sp, #16]
+	.loc 2 1015 0
+	str	r7, [r5, #4]
+	.loc 2 1016 0
+	beq	.L1093
+	.loc 2 1018 0
+	mov	r2, r7
+	movs	r1, #1
+	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL917:
-.L1074:
-	.loc 2 975 0
-	ldr	r3, .L1088+8
-	mov	r8, #0
-	.loc 2 953 0
-	lsl	r9, r9, #2
-.LVL918:
-	.loc 2 987 0
-	mov	r10, r8
-	.loc 2 975 0
+.LVL910:
+.L1094:
+	.loc 2 1035 0
+	ldr	r9, .L1108+4
+	.loc 2 1024 0
+	movs	r7, #0
+	.loc 2 1002 0
+	lsl	r8, r8, #2
+.LVL911:
+	.loc 2 1036 0
+	mov	r10, r7
+	.loc 2 1024 0
+	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1075:
-	.loc 2 976 0
-	cmp	r9, r8
-	bne	.L1079
-.L1076:
-	.loc 2 992 0
-	mov	r3, #1
-.L1087:
-.LBE447:
-.LBE446:
-	.loc 2 998 0
-	strb	r3, [r4, #2290]
-.L1070:
-	.loc 2 1000 0
-	sub	sp, fp, #40
-.LCFI329:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL919:
-.L1073:
-.LCFI330:
-.LBB449:
-.LBB448:
-	.loc 2 973 0
+.L1095:
+	.loc 2 1025 0
+	cmp	r8, r7
+	bne	.L1099
+.L1096:
+	.loc 2 1041 0
+	movs	r3, #1
+.L1107:
+.LBE470:
+.LBE469:
+	.loc 2 1047 0
+	strb	r3, [r4, #2334]
+.L1090:
+	.loc 2 1049 0
+	add	sp, sp, #24
+.LCFI138:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL912:
+.L1093:
+.LCFI139:
+.LBB472:
+.LBB471:
+	.loc 2 1022 0
 	ldrh	r2, [r4, #86]
-	mov	r1, #255
+	movs	r1, #255
 	bl	ftl_memset
-.LVL920:
-	b	.L1074
-.LVL921:
-.L1079:
-	.loc 2 978 0
-	ldrh	r3, [r6, #4]
+.LVL913:
+	b	.L1094
+.LVL914:
+.L1099:
+	.loc 2 1027 0
+	ldrh	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L1076
-	.loc 2 983 0
-	ldr	r3, [fp, #-60]
-	add	r8, r8, #1
-	.loc 2 982 0
-	str	r7, [r5, #8]
-	.loc 2 986 0
-	ldr	r0, .L1088
-	.loc 2 983 0
+	beq	.L1096
+	.loc 2 1032 0
+	ldr	r3, [sp, #8]
+	.loc 2 1035 0
+	mov	r0, r9
+	.loc 2 1031 0
+	str	r6, [r5, #8]
+	adds	r7, r7, #1
+	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 984 0
-	ldrh	r3, [r6]
+	.loc 2 1033 0
+	ldrh	r3, [r4, #2324]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 986 0
+	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL922:
-	.loc 2 987 0
-	ldr	r3, [r4, #2476]
-	.loc 2 988 0
-	mov	r1, #1
-	.loc 2 986 0
-	str	r0, [fp, #-60]
-	.loc 2 988 0
-	sub	r0, fp, #64
-	.loc 2 987 0
+.LVL915:
+	.loc 2 1036 0
+	ldr	r3, [r4, #2520]
+	.loc 2 1037 0
+	movs	r1, #1
+	.loc 2 1035 0
+	str	r0, [sp, #8]
+	.loc 2 1037 0
+	add	r0, sp, #4
+	.loc 2 1036 0
 	str	r3, [r5, #4]
-	add	r3, r3, #1
-	cmn	r3, #1
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
 	moveq	r3, r10
-	str	r3, [r4, #2476]
-	.loc 2 988 0
-	mov	r3, #0
+	str	r3, [r4, #2520]
+	.loc 2 1037 0
+	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL923:
-	.loc 2 990 0
-	ldrh	r0, [r6]
+.LVL916:
+	.loc 2 1039 0
+	ldrh	r0, [r4, #2324]
 	bl	decrement_vpc_count
-.LVL924:
-	b	.L1075
-.LVL925:
-.L1071:
-.LBE448:
-.LBE449:
-	.loc 2 998 0
-	mov	r3, #0
-	b	.L1087
-.L1089:
+.LVL917:
+	b	.L1095
+.LVL918:
+.L1091:
+.LBE471:
+.LBE472:
+	.loc 2 1047 0
+	movs	r3, #0
+	b	.L1107
+.L1109:
 	.align	2
-.L1088:
-	.word	.LANCHOR0+2280
+.L1108:
 	.word	.LANCHOR0
-	.word	-3947
-.LFE208:
+	.word	.LANCHOR0+2324
+.LFE218:
 	.fnend
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.align	2
+	.align	1
 	.global	l2p_flush
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
 	.fnstart
-.LFB201:
-	.loc 2 740 0
+.LFB211:
+	.loc 2 789 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI331:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI332:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI333:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 740 0
-	.loc 2 746 0
-	mov	r4, #0
-	.loc 2 747 0
-	mov	r6, #12
-	.loc 2 746 0
-	ldr	r5, .L1094
-	.loc 2 744 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI140:
+	.loc 2 795 0
+	movs	r4, #0
+	ldr	r5, .L1114
+	.loc 2 796 0
+	movs	r6, #12
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL926:
-.L1091:
-	.loc 2 746 0 discriminator 1
+.LVL919:
+.L1111:
+	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5, #114]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1093
-	.loc 2 750 0
-	mov	r0, #0
-.LVL927:
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL928:
-.L1093:
-	.loc 2 747 0
-	ldr	r2, [r5, #2424]
+	bhi	.L1113
+	.loc 2 799 0
+	movs	r0, #0
+.LVL920:
+	pop	{r4, r5, r6, pc}
+.LVL921:
+.L1113:
+	.loc 2 796 0
+	ldr	r2, [r5, #2468]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1092
-	.loc 2 748 0
+	bge	.L1112
+	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL929:
-.L1092:
-	add	r4, r4, #1
-	b	.L1091
-.L1095:
+.LVL922:
+.L1112:
+	adds	r4, r4, #1
+	b	.L1111
+.L1115:
 	.align	2
-.L1094:
+.L1114:
 	.word	.LANCHOR0
-.LFE201:
+.LFE211:
 	.fnend
 	.size	l2p_flush, .-l2p_flush
-	.align	2
+	.align	1
 	.global	FtlRecoverySuperblock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 	.fnstart
-.LFB221:
-	.loc 2 1656 0
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL930:
-	.movsp ip
-	mov	ip, sp
-.LCFI334:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI335:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI336:
-	.pad #60
-	sub	sp, sp, #60
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1656 0
-	.loc 2 1670 0
-	ldrh	r3, [r0]
+.LFB231:
+	.loc 2 1705 0
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL923:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI141:
+	.loc 2 1719 0
 	movw	r2, #65535
-	.loc 2 1656 0
-	mov	r4, r0
-	.loc 2 1670 0
+	ldrh	r3, [r0]
+	.loc 2 1705 0
+	.pad #52
+	sub	sp, sp, #52
+.LCFI142:
+	.loc 2 1705 0
+	mov	fp, r0
+	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1217
-	.loc 2 1675 0
+	beq	.L1241
+	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
-.LVL931:
-	.loc 2 1681 0
-	ldr	r6, .L1225
-	.loc 2 1675 0
-	str	r3, [fp, #-68]
-	.loc 2 1676 0
+.LVL924:
+	.loc 2 1730 0
+	ldr	r4, .L1248
+	.loc 2 1724 0
+	str	r3, [sp, #8]
+	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-.LVL932:
-	.loc 2 1681 0
-	ldr	r1, [fp, #-68]
-.LVL933:
-	.loc 2 1676 0
-	str	r3, [fp, #-88]
-	.loc 2 1681 0
-	ldrh	r3, [r6, #78]
-.LVL934:
+.LVL925:
+	.loc 2 1730 0
+	ldr	r1, [sp, #8]
+.LVL926:
+	.loc 2 1725 0
+	str	r3, [sp, #24]
+	.loc 2 1730 0
+	ldrh	r3, [r4, #78]
+.LVL927:
 	cmp	r3, r1
 	mov	r3, #0
-	.loc 2 1682 0
-	strheq	r3, [r0, #4]	@ movhi
-	.loc 2 1689 0
-	ldrhne	r0, [r0, #16]
-.LVL935:
-	.loc 2 1681 0
-	bne	.L1100
+	bne	.L1119
+	.loc 2 1731 0
+	strh	r3, [r0, #4]	@ movhi
+.LVL928:
+.L1246:
+	.loc 2 2038 0
+	strb	r3, [fp, #6]
+.L1241:
+	.loc 2 2059 0
+	movs	r0, #0
+	add	sp, sp, #52
+.LCFI143:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL929:
+.L1119:
+.LCFI144:
+	.loc 2 1738 0
+	ldrh	r0, [r0, #16]
+.LVL930:
+.L1120:
+	.loc 2 1739 0
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L1121
+	.loc 2 1746 0
+	movs	r1, #1
+.LVL931:
+	bl	FtlGetLastWrittenPage
+.LVL932:
+	.loc 2 1754 0
+	adds	r7, r0, #1
+	.loc 2 1746 0
+	mov	r6, r0
+.LVL933:
+	.loc 2 1754 0
+	beq	.L1122
+	.loc 2 1770 0
+	ldr	r3, [r4, #3148]
+	.loc 2 1771 0
+	movs	r2, #0
+	.loc 2 1766 0
+	ldrh	lr, [r4, #8]
+	.loc 2 1768 0
+	movw	r9, #65535
+	.loc 2 1769 0
+	ldr	r0, [r4, #3792]
+	mov	r10, #20
+	.loc 2 1770 0
+	str	r3, [sp, #4]
+	ldrh	r3, [r4, #86]
+	.loc 2 1771 0
+	ldr	r8, [r4, #3152]
+	ldrh	r7, [r4, #88]
+	mov	r4, r2
+	.loc 2 1770 0
+	str	r3, [sp, #12]
+	add	r3, fp, #16
+	.loc 2 1771 0
+	mov	ip, r3
+	str	r3, [sp, #20]
+.L1123:
+	.loc 2 1766 0 discriminator 1
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L1129
+	.loc 2 1777 0
+	ldr	r5, .L1248
+	.loc 2 1776 0
+	movs	r2, #0
+	mov	r1, r4
+	.loc 2 1715 0
+	movw	r9, #65535
+	.loc 2 1776 0
+	bl	FlashReadPages
+.LVL934:
+	.loc 2 1777 0
+	ldr	r3, [r5, #2520]
+	.loc 2 1791 0
+	uxth	r2, r6
+	.loc 2 1779 0
+	ldr	r8, [r5, #3792]
+	.loc 2 1791 0
+	str	r2, [sp, #12]
+	.loc 2 1777 0
+	subs	r3, r3, #1
+.LVL935:
+	str	r3, [sp, #4]
+	mov	r7, r8
+	.loc 2 1778 0
+	movs	r3, #0
 .LVL936:
-.L1223:
-	.loc 2 1989 0
-	strb	r3, [r4, #6]
-.L1217:
-	.loc 2 2010 0
-	mov	r0, #0
-	sub	sp, fp, #40
-.LCFI337:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1130:
+	uxth	r2, r3
 .LVL937:
-.L1101:
-.LCFI338:
-	.loc 2 1692 0
-	uxth	r1, r3
+	.loc 2 1778 0 is_stmt 0 discriminator 1
+	cmp	r4, r2
+	bhi	.L1135
+	.loc 2 1794 0 is_stmt 1
+	bne	.L1133
+	.loc 2 1796 0
+	adds	r3, r6, #1
+	uxth	r3, r3
 .LVL938:
-	add	r1, r4, r1, lsl #1
-	ldrh	r0, [r1, #16]
+	str	r3, [sp, #16]
+.L1242:
+	.loc 2 1802 0
+	ldr	r0, [r8, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
 .LVL939:
-.L1100:
-	.loc 2 1690 0
-	cmp	r0, r2
-	uxth	r7, r3
-	add	r3, r3, #1
-	beq	.L1101
-	.loc 2 1697 0
-	mov	r1, #1
+	.loc 2 1807 0
+	ldrh	r3, [r5, #78]
+	ldr	r2, [sp, #16]
 .LVL940:
-	bl	FtlGetLastWrittenPage
+	.loc 2 1802 0
+	str	r0, [sp, #12]
+	.loc 2 1807 0
+	cmp	r3, r2
+	bne	.L1137
+	.loc 2 1808 0
+	ldrh	r3, [sp, #16]
+	strh	r3, [fp, #2]	@ movhi
+	.loc 2 1809 0
+	movs	r3, #0
+	strb	r3, [fp, #6]
+	.loc 2 1810 0
+	strh	r3, [fp, #4]	@ movhi
+.L1137:
+	.loc 2 1813 0
+	ldr	r3, [sp, #16]
 .LVL941:
-	.loc 2 1705 0
-	cmn	r0, #1
-	.loc 2 1697 0
-	mov	r5, r0
+	ldr	r2, [sp, #8]
 .LVL942:
-	.loc 2 1705 0
-	beq	.L1102
-	.loc 2 1717 0
-	ldrh	r3, [r6, #8]
-	.loc 2 1722 0
-	mov	r2, #0
-	.loc 2 1720 0
-	ldr	r0, [r6, #3792]
-	.loc 2 1719 0
-	movw	r8, #65535
-	.loc 2 1722 0
-	ldr	lr, [r6, #3156]
-	.loc 2 1720 0
-	mov	r9, #20
-	.loc 2 1717 0
-	str	r3, [fp, #-64]
-	.loc 2 1721 0
-	ldr	r3, [r6, #3152]
-	.loc 2 1722 0
-	ldrh	r7, [r6, #88]
-	.loc 2 1721 0
-	str	r3, [fp, #-72]
-	ldrh	r3, [r6, #86]
-	.loc 2 1722 0
-	mov	r6, r2
-	.loc 2 1721 0
-	str	r3, [fp, #-76]
-	add	r3, r4, #16
-	.loc 2 1722 0
-	mov	ip, r3
-	str	r3, [fp, #-84]
-.L1103:
-	.loc 2 1717 0 discriminator 1
-	ldr	r1, [fp, #-64]
-	uxth	r3, r2
-	cmp	r1, r3
-	bhi	.L1107
-	.loc 2 1728 0
-	ldr	r7, .L1225
-	.loc 2 1727 0
-	mov	r2, #0
-	mov	r1, r6
-	.loc 2 1729 0
-	mov	r8, #0
-	.loc 2 1727 0
-	bl	FlashReadPages
+	cmp	r3, r2
+	bne	.L1138
+	.loc 2 1813 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
 .LVL943:
-	.loc 2 1728 0
-	ldr	r3, [r7, #2476]
-	.loc 2 1666 0
-	movw	r2, #65535
-	str	r2, [fp, #-76]
-	.loc 2 1742 0
-	uxth	r2, r5
-	.loc 2 1728 0
-	sub	r3, r3, #1
+	ldr	r2, [sp, #24]
 .LVL944:
-	.loc 2 1742 0
-	str	r2, [fp, #-72]
-	.loc 2 1728 0
-	str	r3, [fp, #-64]
-	.loc 2 1730 0
-	ldr	r3, [r7, #3792]
+	cmp	r3, r2
+	bne	.L1138
+	.loc 2 1814 0 is_stmt 1
+	ldr	r1, [sp, #16]
+	mov	r2, r3
 .LVL945:
-	mov	r10, r3
-.L1108:
-	uxth	r2, r8
+.L1247:
+	.loc 2 2053 0
+	mov	r0, fp
 .LVL946:
-	.loc 2 1729 0 discriminator 1
-	cmp	r6, r2
-	bhi	.L1113
-	.loc 2 1747 0
-	addeq	r2, r5, #1
+	bl	ftl_sb_update_avl_pages
 .LVL947:
-	uxtheq	r9, r2
+	b	.L1241
 .LVL948:
-	.loc 2 1745 0
-	bne	.L1111
-.L1218:
-	.loc 2 1753 0
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
+.L1121:
+	.loc 2 1741 0
+	uxth	r1, r3
 .LVL949:
-	.loc 2 1758 0
-	ldrh	r3, [r7, #78]
-	.loc 2 1753 0
-	str	r0, [fp, #-72]
-	.loc 2 1764 0
-	ldr	r2, [fp, #-72]
+	adds	r1, r1, #8
+	ldrh	r0, [fp, r1, lsl #1]
+	b	.L1120
 .LVL950:
-	.loc 2 1758 0
-	cmp	r3, r9
-	.loc 2 1764 0
-	ldr	r1, [fp, #-88]
+.L1122:
+	.loc 2 1755 0
+	ldr	r3, [sp, #8]
 .LVL951:
-	.loc 2 1760 0
-	moveq	r3, #0
-	.loc 2 1759 0
-	strheq	r9, [r4, #2]	@ movhi
-	.loc 2 1760 0
-	strbeq	r3, [r4, #6]
-	.loc 2 1761 0
-	strheq	r3, [r4, #4]	@ movhi
-	.loc 2 1764 0
-	ldr	r3, [fp, #-68]
+	cbz	r3, .L1124
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	movw	r2, #1755
+	ldr	r1, .L1248+4
+	ldr	r0, .L1248+8
+	bl	printk
 .LVL952:
-	cmp	r9, r3
-	cmpeq	r2, r1
-	bne	.L1116
+.L1124:
+	.loc 2 1756 0 is_stmt 1
+	ldr	r3, [sp, #24]
 .LVL953:
-.L1224:
-	.loc 2 2004 0
-	mov	r1, r9
+	cbz	r3, .L1125
+	.loc 2 1756 0 is_stmt 0 discriminator 1
+	cmp	r5, r3
+	beq	.L1125
+	.loc 2 1756 0 discriminator 2
+	movw	r2, #1756
+	ldr	r1, .L1248+4
+	ldr	r0, .L1248+8
+	bl	printk
 .LVL954:
-	mov	r0, r4
-	bl	ftl_sb_update_avl_pages
+.L1125:
+	.loc 2 1757 0 is_stmt 1
+	movs	r3, #0
 .LVL955:
-	b	.L1217
+	strh	r3, [fp, #2]	@ movhi
+	b	.L1246
+.L1129:
+	.loc 2 1767 0
+	ldrh	r3, [ip], #2
+	.loc 2 1768 0
+	cmp	r3, r9
+	beq	.L1126
+	.loc 2 1769 0
+	mla	r1, r10, r4, r0
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r1, #4]
+	.loc 2 1770 0
+	ldr	r3, [sp, #12]
+	muls	r3, r4, r3
+	it	mi
+	addmi	r3, r3, #3
+	bic	r3, r3, #3
+	mov	r5, r3
+	ldr	r3, [sp, #4]
+	add	r5, r5, r3
+	.loc 2 1771 0
+	mov	r3, r7
+	muls	r3, r4, r3
+	.loc 2 1772 0
+	add	r4, r4, #1
+	.loc 2 1771 0
+	it	mi
+	addmi	r3, r3, #3
+	.loc 2 1772 0
+	uxth	r4, r4
+	.loc 2 1771 0
+	bic	r3, r3, #3
+	.loc 2 1770 0
+	str	r5, [r1, #8]
+	.loc 2 1771 0
+	add	r3, r3, r8
+	str	r3, [r1, #12]
+.L1126:
+	adds	r2, r2, #1
+	b	.L1123
 .LVL956:
-.L1102:
-	.loc 2 1706 0
-	ldr	r3, [fp, #-68]
+.L1135:
+	.loc 2 1779 0
+	ldr	r2, [r7]
 .LVL957:
-	cmp	r3, #0
-	beq	.L1104
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	movw	r2, #1706
-	ldr	r1, .L1225+4
-	ldr	r0, .L1225+8
-	bl	printk
+	cbnz	r2, .L1131
+	.loc 2 1780 0
+	ldr	r10, [r7, #12]
+	.loc 2 1781 0
+	ldr	r2, [r10, #4]
+	adds	r0, r2, #1
+	beq	.L1132
+	.loc 2 1782 0
+	ldr	r1, [r5, #2520]
+	mov	r0, r2
+	bl	ftl_cmp_data_ver
 .LVL958:
-.L1104:
-	.loc 2 1707 0 is_stmt 1
-	ldr	r3, [fp, #-88]
+	cbz	r0, .L1132
+	.loc 2 1784 0
+	adds	r2, r2, #1
+	str	r2, [r5, #2520]
+.L1132:
+	.loc 2 1787 0
+	ldr	r2, [r10]
+	adds	r2, r2, #1
+	bne	.L1134
 .LVL959:
-	cmp	r3, #0
-	cmpne	r7, r3
-	beq	.L1105
-	.loc 2 1707 0 is_stmt 0 discriminator 1
-	movw	r2, #1707
-	ldr	r1, .L1225+4
-	ldr	r0, .L1225+8
-	bl	printk
+.L1133:
+	.loc 2 1801 0
+	uxth	r2, r6
 .LVL960:
-.L1105:
-	.loc 2 1708 0 is_stmt 1
-	mov	r3, #0
+	.loc 2 1802 0
+	uxth	r3, r3
+	.loc 2 1801 0
+	str	r2, [sp, #16]
+	.loc 2 1802 0
+	movs	r2, #20
 .LVL961:
-	strh	r3, [r4, #2]	@ movhi
-	b	.L1223
-.L1107:
-	.loc 2 1718 0
-	ldrh	r3, [ip], #2
-	.loc 2 1719 0
-	cmp	r3, r8
-	beq	.L1106
-	.loc 2 1720 0
-	mla	r1, r9, r6, r0
-	orr	r3, r5, r3, lsl #10
-	str	r3, [r1, #4]
-	.loc 2 1721 0
-	ldr	r3, [fp, #-76]
-	mul	r3, r3, r6
-	add	r10, r3, #3
-	cmp	r3, #0
-	movlt	r3, r10
-	ldr	r10, [fp, #-72]
-	bic	r3, r3, #3
-	add	r3, r10, r3
-	str	r3, [r1, #8]
-	.loc 2 1722 0
-	mul	r3, r7, r6
-	.loc 2 1723 0
-	add	r6, r6, #1
-	uxth	r6, r6
-	.loc 2 1722 0
-	add	r10, r3, #3
-	cmp	r3, #0
-	movlt	r3, r10
-	bic	r3, r3, #3
-	add	r3, lr, r3
-	str	r3, [r1, #12]
-.L1106:
-	add	r2, r2, #1
-	b	.L1103
+	mla	r8, r2, r3, r8
+	b	.L1242
+.L1131:
+	.loc 2 1791 0
+	ldr	r9, [sp, #12]
+.L1134:
+	adds	r3, r3, #1
+	adds	r7, r7, #20
+	b	.L1130
 .LVL962:
-.L1113:
-	.loc 2 1730 0
-	ldr	r2, [r10]
+.L1138:
+	.loc 2 1819 0
+	movw	r3, #65535
 .LVL963:
-	cmp	r2, #0
-	bne	.L1109
-	.loc 2 1731 0
-	ldr	r2, [r10, #12]
-	.loc 2 1732 0
-	ldr	r9, [r2, #4]
-	cmn	r9, #1
-	beq	.L1110
-	str	r3, [fp, #-80]
-	.loc 2 1733 0
-	mov	r0, r9
-	ldr	r3, .L1225
-	str	r2, [fp, #-92]
-	ldr	r1, [r3, #2476]
-	bl	ftl_cmp_data_ver
+	cmp	r9, r3
+	bne	.L1139
+	.loc 2 1819 0 is_stmt 0 discriminator 1
+	ldrb	r3, [fp, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1140
+.L1139:
+.LBB473:
+	.loc 2 1824 0 is_stmt 1
+	ldr	r3, [r5, #3964]
+	.loc 2 1823 0
+	uxth	r8, r6
+	.loc 2 1827 0
+	uxth	r6, r6
 .LVL964:
-	ldr	r3, [fp, #-80]
-	cmp	r0, #0
-	ldr	r2, [fp, #-92]
-	.loc 2 1735 0
-	addne	r9, r9, #1
-	ldrne	r1, .L1225
-	strne	r9, [r1, #2476]
-.L1110:
-	.loc 2 1738 0
-	ldr	r2, [r2]
-	cmn	r2, #1
-	bne	.L1112
+	ldr	r7, .L1248
+	.loc 2 1833 0
+	movw	r9, #65535
+	.loc 2 1824 0
+	adds	r3, r3, #1
+	.loc 2 1825 0
+	itt	eq
+	ldreq	r3, [sp, #4]
 .LVL965:
-.L1111:
-	.loc 2 1753 0
-	uxth	r8, r8
-	mov	r2, #20
-	.loc 2 1752 0
-	uxth	r9, r5
-	.loc 2 1753 0
-	mla	r3, r2, r8, r3
-	b	.L1218
+	streq	r3, [r5, #3964]
+	.loc 2 1827 0
+	ldr	r3, [sp, #8]
 .LVL966:
-.L1109:
-	.loc 2 1742 0
-	ldr	r2, [fp, #-72]
-	str	r2, [fp, #-76]
-.L1112:
-	add	r8, r8, #1
-	add	r10, r10, #20
-	b	.L1108
+	adds	r3, r3, #7
 .LVL967:
-.L1116:
-	.loc 2 1770 0
-	ldr	r2, [fp, #-76]
-.LVL968:
-	movw	r3, #65535
-.LVL969:
-	cmp	r2, r3
-	bne	.L1117
-	.loc 2 1770 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1118
-.L1117:
-.LBB450:
-	.loc 2 1775 0 is_stmt 1
-	ldr	r3, [r7, #3964]
-	.loc 2 1774 0
-	uxth	r8, r5
-	.loc 2 1778 0
-	uxth	r5, r5
-.LVL970:
-	.loc 2 1775 0
-	cmn	r3, #1
-	.loc 2 1776 0
-	ldreq	r3, [fp, #-64]
-.LVL971:
-	streq	r3, [r7, #3964]
-	.loc 2 1778 0
-	ldr	r3, [fp, #-68]
-.LVL972:
-	ldr	r7, .L1225
-	add	r3, r3, #7
-.LVL973:
-	cmp	r5, r3
-	.loc 2 1779 0
-	subgt	r5, r8, #7
-	ldrle	r5, [fp, #-68]
-	uxthgt	r5, r5
-.L1121:
-	.loc 2 1780 0 discriminator 1
-	cmp	r5, r8
-	bhi	.L1128
-	.loc 2 1782 0
-	ldrh	r3, [r7, #8]
-	.loc 2 1784 0
-	movw	lr, #65535
-	.loc 2 1785 0
+	cmp	r6, r3
+	.loc 2 1828 0
+	itet	gt
+	subgt	r4, r8, #7
+	ldrle	r4, [sp, #8]
+	uxthgt	r4, r4
+.L1143:
+	.loc 2 1829 0 discriminator 1
+	cmp	r4, r8
+	bhi	.L1150
+	.loc 2 1834 0
+	movs	r3, #0
+	.loc 2 1831 0
+	ldrh	lr, [r7, #8]
+	.loc 2 1834 0
 	ldr	r0, [r7, #3792]
-	mov	ip, #20
-	ldr	r1, [fp, #-84]
-.LVL974:
-	.loc 2 1782 0
-	str	r3, [fp, #-76]
-	.loc 2 1785 0
-	mov	r3, #0
 	mov	r6, r3
-	b	.L1129
-.L1123:
-	.loc 2 1783 0
+	ldr	r1, [sp, #20]
+	mov	ip, #20
+	b	.L1151
+.LVL968:
+.L1145:
+	.loc 2 1832 0
 	ldrh	r2, [r1], #2
-	add	r3, r3, #1
-	.loc 2 1784 0
-	cmp	r2, lr
-	.loc 2 1785 0
-	mlane	r10, ip, r6, r0
-	.loc 2 1786 0
-	addne	r6, r6, #1
-	.loc 2 1785 0
-	orrne	r2, r5, r2, lsl #10
-	.loc 2 1786 0
-	uxthne	r6, r6
-	.loc 2 1785 0
-	strne	r2, [r10, #4]
-.L1129:
-	.loc 2 1782 0 discriminator 1
-	ldr	r10, [fp, #-76]
+	.loc 2 1833 0
+	cmp	r2, r9
+	beq	.L1144
+	.loc 2 1834 0
+	mla	r10, ip, r6, r0
+	.loc 2 1835 0
+	adds	r6, r6, #1
+	.loc 2 1834 0
+	orr	r2, r4, r2, lsl #10
+	.loc 2 1835 0
+	uxth	r6, r6
+	.loc 2 1834 0
+	str	r2, [r10, #4]
+.L1144:
+	adds	r3, r3, #1
+.LVL969:
+.L1151:
+	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
-	cmp	r10, r2
-	bhi	.L1123
-	.loc 2 1789 0
+.LVL970:
+	cmp	r2, lr
+	bcc	.L1145
+	.loc 2 1838 0
+	movs	r2, #0
 	mov	r1, r6
-	mov	r2, #0
 	bl	FlashReadPages
-.LVL975:
-	.loc 2 1791 0
+.LVL971:
+	.loc 2 1840 0
 	ldr	r3, [r7, #3792]
-	mov	r2, #20
-	.loc 2 1793 0
-	movw	r1, #65535
+	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1124:
-	.loc 2 1790 0 discriminator 1
+.L1146:
+	.loc 2 1839 0 discriminator 1
 	cmp	r6, r3
-	.loc 2 1780 0
-	addeq	r5, r5, #1
-	uxtheq	r5, r5
-	beq	.L1121
-.L1127:
-	.loc 2 1791 0
+	bne	.L1149
+	.loc 2 1829 0
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1143
+.L1149:
+	.loc 2 1840 0
 	ldr	r2, [r3]
-	cmp	r2, #0
-	bne	.L1118
-	.loc 2 1792 0
+	cbnz	r2, .L1140
+	.loc 2 1841 0
 	ldr	r2, [r3, #12]
-	.loc 2 1793 0
-	ldrh	r0, [r2]
-	cmp	r0, r1
-	beq	.L1126
-	.loc 2 1795 0
+	.loc 2 1842 0
+	ldrh	r1, [r2]
+	cmp	r1, r9
+	beq	.L1148
+	.loc 2 1844 0
 	ldr	r2, [r2, #4]
-	cmn	r2, #1
-	.loc 2 1797 0
+	adds	r1, r2, #1
+	.loc 2 1846 0
+	it	ne
 	strne	r2, [r7, #3964]
-.L1126:
-	add	r3, r3, #20
-	b	.L1124
-.LVL976:
-.L1128:
-	.loc 2 1809 0
-	mvn	r3, #0
-	str	r3, [r7, #3964]
-.LVL977:
-.L1118:
-.LBE450:
-	.loc 2 1814 0
-	ldr	r5, .L1225+12
-.LVL978:
-	mov	r3, #1
-	mov	r0, r5
-	.loc 2 1821 0
-	sub	r5, r5, #3968
-	.loc 2 1814 0
-	strh	r3, [r0], #-104	@ movhi
-	.loc 2 1815 0
+.L1148:
+	adds	r3, r3, #20
+	b	.L1146
+.LVL972:
+.L1150:
+	.loc 2 1858 0
+	mov	r3, #-1
+	str	r3, [r7, #3964]
+.LVL973:
+.L1140:
+.LBE473:
+	.loc 2 1863 0
+	movs	r3, #1
+	.loc 2 1864 0
+	ldr	r0, .L1248+12
+	.loc 2 1863 0
+	strh	r3, [r5, #3968]	@ movhi
+	.loc 2 1870 0
+	ldr	r4, .L1248
+	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
+.LVL974:
+	ldr	r5, [sp, #8]
+.LVL975:
+.L1152:
+	.loc 2 1870 0
+	ldrh	r6, [r4, #8]
+.LVL976:
+	movs	r3, #0
+	.loc 2 1873 0
+	ldr	r0, [r4, #3792]
+.LVL977:
+	.loc 2 1869 0
+	mov	r10, r3
+	.loc 2 1870 0
+	ldr	r1, [sp, #20]
+	.loc 2 1872 0
+	movw	r7, #65535
+	.loc 2 1873 0
+	mov	ip, #20
+.L1153:
+	.loc 2 1870 0 discriminator 1
+	uxth	r2, r3
+.LVL978:
+	cmp	r6, r2
+	bhi	.L1155
+	.loc 2 1877 0
+	movs	r2, #0
+	mov	r1, r10
+	bl	FlashReadPages
 .LVL979:
-	ldr	r10, [fp, #-68]
+	.loc 2 1878 0
+	movs	r3, #0
 .LVL980:
-.L1130:
-	.loc 2 1821 0
-	ldrh	ip, [r5, #8]
-	.loc 2 1823 0
-	movw	lr, #65535
-	.loc 2 1824 0
-	ldr	r0, [r5, #3792]
-	mov	r6, #20
+.L1245:
+	str	r3, [sp, #28]
+	.loc 2 1878 0 is_stmt 0 discriminator 2
+	ldrh	r3, [sp, #28]
+	cmp	r10, r3
+	bhi	.L1185
+	.loc 2 2031 0 is_stmt 1
+	adds	r5, r5, #1
+	.loc 2 2032 0
+	ldrh	r3, [r4, #78]
+	.loc 2 2031 0
+	uxth	r5, r5
+	.loc 2 2032 0
+	cmp	r3, r5
+	bne	.L1152
+	.loc 2 2035 0
+	ldrh	r2, [r4, #8]
 .LVL981:
-	.loc 2 1821 0
-	ldr	r1, [fp, #-84]
-	mov	r3, #0
-	.loc 2 1820 0
-	str	r3, [fp, #-76]
-.L1131:
-	.loc 2 1821 0 discriminator 1
-	uxth	r2, r3
-	cmp	ip, r2
-	bhi	.L1133
-	.loc 2 1828 0
-	mov	r2, #0
-	ldr	r1, [fp, #-76]
-	bl	FlashReadPages
-.LVL982:
-	.loc 2 1829 0
-	mov	r3, #0
-.LVL983:
-.L1222:
-	str	r3, [fp, #-80]
-	.loc 2 1829 0 is_stmt 0 discriminator 2
-	ldr	r2, [fp, #-76]
-.LVL984:
-	ldrh	r3, [fp, #-80]
-	cmp	r2, r3
-	bhi	.L1161
-	.loc 2 1982 0 is_stmt 1
-	add	r3, r10, #1
-	uxth	r10, r3
-	.loc 2 1983 0
-	ldrh	r3, [r5, #78]
-	cmp	r3, r10
-	bne	.L1130
-	.loc 2 1986 0
-	ldrh	r2, [r5, #8]
-	.loc 2 1988 0
+	.loc 2 2037 0
 	movw	r0, #65535
-	.loc 2 1985 0
-	mov	r3, #0
-	.loc 2 1984 0
-	strh	r10, [r4, #2]	@ movhi
-	.loc 2 1985 0
-	strh	r3, [r4, #4]	@ movhi
-.L1162:
-	.loc 2 1986 0 discriminator 1
+.LVL982:
+	.loc 2 2034 0
+	movs	r3, #0
+	.loc 2 2033 0
+	strh	r5, [fp, #2]	@ movhi
+	.loc 2 2034 0
+	strh	r3, [fp, #4]	@ movhi
+.L1186:
+	.loc 2 2035 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1217
-	.loc 2 1987 0
-	ldr	r1, [fp, #-84]
-	ldrh	ip, [r1], #2
-	.loc 2 1988 0
-	cmp	ip, r0
-	.loc 2 1987 0
-	str	r1, [fp, #-84]
+	bcs	.L1241
+	.loc 2 2036 0
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	.loc 2 2037 0
+	cmp	r4, r0
+	.loc 2 2036 0
+	str	r1, [sp, #20]
 	add	r1, r3, #1
-	.loc 2 1988 0
-	bne	.L1223
+	.loc 2 2037 0
+	bne	.L1246
 	mov	r3, r1
-	b	.L1162
-.LVL985:
-.L1133:
-	.loc 2 1822 0
+	b	.L1186
+.LVL983:
+.L1155:
+	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-	.loc 2 1823 0
-	cmp	r2, lr
-	beq	.L1132
-	.loc 2 1824 0
-	ldr	r7, [fp, #-76]
+	.loc 2 1872 0
+	cmp	r2, r7
+	beq	.L1154
+	.loc 2 1873 0
+	mla	lr, ip, r10, r0
+	.loc 2 1874 0
+	add	r10, r10, #1
+	.loc 2 1873 0
+	orr	r2, r5, r2, lsl #10
+	.loc 2 1874 0
+	uxth	r10, r10
+	.loc 2 1873 0
+	str	r2, [lr, #4]
+.L1154:
+	adds	r3, r3, #1
+	b	.L1153
+.L1249:
+	.align	2
+.L1248:
+	.word	.LANCHOR0
+	.word	.LANCHOR1+421
+	.word	.LC1
+	.word	.LANCHOR0+3864
+.LVL984:
+.L1185:
+	ldr	r3, [sp, #28]
+	movs	r7, #20
+	.loc 2 1879 0
+	ldr	r9, [r4, #3792]
+.LVL985:
+	muls	r7, r3, r7
+	add	r8, r9, r7
+	ldr	r6, [r8, #4]
 .LVL986:
-	orr	r2, r10, r2, lsl #10
-	mla	r7, r6, r7, r0
-	str	r2, [r7, #4]
-	.loc 2 1825 0
-	ldr	r2, [fp, #-76]
-	add	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [fp, #-76]
+	.loc 2 1880 0
+	ubfx	r0, r6, #10, #16
 .LVL987:
-.L1132:
-	add	r3, r3, #1
-	b	.L1131
+	.loc 2 1879 0
+	str	r6, [sp, #44]
+	.loc 2 1880 0
+	bl	P2V_plane
 .LVL988:
-.L1161:
-	ldr	r3, [fp, #-80]
-	mov	r7, #20
+	.loc 2 1882 0
+	ldr	r3, [sp, #8]
 .LVL989:
-	.loc 2 1830 0
-	ldr	r2, [r5, #3792]
-	mul	r7, r7, r3
-	str	r2, [fp, #-92]
-	add	r8, r2, r7
-	ldr	r6, [r8, #4]
+	cmp	r5, r3
+	bcc	.L1157
+	.loc 2 1882 0 is_stmt 0 discriminator 1
+	bne	.L1158
+	.loc 2 1883 0 is_stmt 1
+	ldr	r3, [sp, #24]
 .LVL990:
-	.loc 2 1831 0
-	ubfx	r0, r6, #10, #16
-	.loc 2 1830 0
-	str	r6, [fp, #-48]
-	.loc 2 1831 0
-	bl	P2V_plane
+	cmp	r3, r0
+	bhi	.L1157
 .LVL991:
-	.loc 2 1833 0
-	ldr	r3, [fp, #-68]
+.L1158:
+	.loc 2 1886 0
+	ldr	r3, [sp, #16]
 .LVL992:
-	cmp	r10, r3
-	bcc	.L1135
-	.loc 2 1833 0 is_stmt 0 discriminator 1
-	ldr	r2, [fp, #-88]
+	cmp	r5, r3
+	bne	.L1159
+	.loc 2 1886 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
 .LVL993:
-	.loc 2 1834 0 is_stmt 1 discriminator 1
-	moveq	r3, #1
+	cmp	r3, r0
+	beq	.L1160
 .LVL994:
-	movne	r3, #0
-	.loc 2 1833 0 discriminator 1
-	cmp	r2, r0
-	movls	r3, #0
-	andhi	r3, r3, #1
-	cmp	r3, #0
-	bne	.L1135
-	.loc 2 1837 0
-	ldr	r3, [fp, #-72]
+.L1159:
+	.loc 2 1890 0 is_stmt 1
+	ldr	r3, [r9, r7]
 .LVL995:
-	cmp	r10, r9
-	cmpeq	r3, r0
-	beq	.L1136
-	.loc 2 1841 0
-	ldr	r2, [fp, #-92]
-.LVL996:
-	ldr	r3, [r2, r7]
-.LVL997:
-	cmn	r3, #1
-	beq	.L1137
-	.loc 2 1842 0
+	adds	r3, r3, #1
+	beq	.L1161
+	.loc 2 1891 0
 	ldr	r8, [r8, #12]
-	.loc 2 1843 0
+	.loc 2 1892 0
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1138
+	beq	.L1162
+.LVL996:
+.L1169:
+.LBB474:
+	.loc 2 1925 0
+	ldrh	r0, [fp]
+.LVL997:
+.L1244:
+.LBE474:
+	.loc 2 2009 0
+	bl	decrement_vpc_count
 .LVL998:
-.L1145:
-.LBB451:
-	.loc 2 1876 0
-	ldrh	r0, [r4]
+.L1157:
+	ldr	r3, [sp, #28]
 .LVL999:
-.L1221:
-.LBE451:
-	.loc 2 1960 0
-	bl	decrement_vpc_count
+	adds	r3, r3, #1
+	b	.L1245
 .LVL1000:
-.L1135:
-	ldr	r3, [fp, #-80]
-.LVL1001:
-	add	r3, r3, #1
-	b	.L1222
-.LVL1002:
-.L1138:
-	.loc 2 1849 0
+.L1162:
+	.loc 2 1898 0
 	ldr	r3, [r8, #4]
-.LVL1003:
-	.loc 2 1850 0
-	cmn	r3, #1
-	.loc 2 1849 0
-	str	r3, [fp, #-64]
-	.loc 2 1850 0
-	beq	.L1139
-	.loc 2 1851 0 discriminator 1
+.LVL1001:
+	.loc 2 1899 0
+	adds	r6, r3, #1
+	.loc 2 1898 0
+	str	r3, [sp, #4]
+	.loc 2 1899 0
+	beq	.L1163
+	.loc 2 1900 0 discriminator 1
+	ldr	r1, [r4, #2520]
 	mov	r0, r3
-	ldr	r1, [r5, #2476]
+.LVL1002:
 	bl	ftl_cmp_data_ver
+.LVL1003:
+	.loc 2 1899 0 discriminator 1
+	cbz	r0, .L1163
+	.loc 2 1902 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
 .LVL1004:
-	.loc 2 1850 0 discriminator 1
-	cmp	r0, #0
-	.loc 2 1853 0 discriminator 1
-	ldrne	r3, [fp, #-64]
+	str	r3, [r4, #2520]
 .LVL1005:
-	addne	r3, r3, #1
-.LVL1006:
-	strne	r3, [r5, #2476]
-.LVL1007:
-.L1139:
-	.loc 2 1856 0
+.L1163:
+	.loc 2 1905 0
 	ldrh	r2, [r8]
 	movw	r3, #61589
-.LVL1008:
+.LVL1006:
 	cmp	r2, r3
-	beq	.L1140
-	.loc 2 1856 0 is_stmt 0 discriminator 1
-	mov	r2, #1856
-	ldr	r1, .L1225+4
-	ldr	r0, .L1225+8
+	beq	.L1164
+	.loc 2 1905 0 is_stmt 0 discriminator 1
+	movw	r2, #1905
+	ldr	r1, .L1250
+	ldr	r0, .L1250+4
+.LVL1007:
 	bl	printk
-.LVL1009:
-.L1140:
-	.loc 2 1857 0 is_stmt 1
+.LVL1008:
+.L1164:
+	.loc 2 1906 0 is_stmt 1
 	ldr	r6, [r8, #8]
-.LVL1010:
-	.loc 2 1859 0
-	sub	r1, fp, #52
-	.loc 2 1858 0
+.LVL1009:
+	.loc 2 1908 0
+	add	r1, sp, #40
+	.loc 2 1907 0
 	ldr	r3, [r8, #12]
-	.loc 2 1859 0
-	mov	r2, #0
+	.loc 2 1908 0
+	movs	r2, #0
 	mov	r0, r6
-	.loc 2 1858 0
-	str	r3, [fp, #-56]
-	.loc 2 1859 0
+.LVL1010:
+	.loc 2 1907 0
+	str	r3, [sp, #36]
+	.loc 2 1908 0
 	bl	log2phys
 .LVL1011:
-	.loc 2 1860 0
-	ldr	r1, [r5, #3964]
-	cmn	r1, #1
-	beq	.L1141
-	.loc 2 1861 0 discriminator 1
-	ldr	r0, [fp, #-64]
+	.loc 2 1909 0
+	ldr	r1, [r4, #3964]
+	adds	r0, r1, #1
+	beq	.L1165
+	.loc 2 1910 0 discriminator 1
+	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 .LVL1012:
-	.loc 2 1860 0 discriminator 1
+	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1141
-.LBB452:
-	.loc 2 1865 0
-	ldr	r3, [fp, #-56]
-	cmn	r3, #1
-	beq	.L1142
-	.loc 2 1866 0
-	ldr	r0, [r5, #3792]
-	.loc 2 1868 0
-	mov	r2, #0
-	mov	r1, #1
-	.loc 2 1866 0
+	beq	.L1165
+.LBB475:
+	.loc 2 1914 0
+	ldr	r3, [sp, #36]
+	adds	r2, r3, #1
+	beq	.L1166
+	.loc 2 1915 0
+	ldr	r0, [r4, #3792]
+	.loc 2 1917 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1915 0
 	add	r0, r0, r7
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1866 0
+	.loc 2 1915 0
 	ldr	r8, [r0, #12]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	bl	FlashReadPages
 .LVL1013:
-	.loc 2 1881 0
-	ldr	r3, [r5, #3792]
-	add	r2, r3, r7
-	str	r2, [fp, #-92]
-	ldr	r2, [r3, r7]
-	cmn	r2, #1
-	bne	.L1143
+	.loc 2 1930 0
+	ldr	r2, [r4, #3792]
+	ldr	r1, [r2, r7]
+	adds	r3, r2, r7
+	adds	r1, r1, #1
+	bne	.L1167
 .LVL1014:
-.L1144:
-	.loc 2 1913 0
-	mvn	r3, #0
-	.loc 2 1914 0
-	ldrh	r0, [r4]
-	.loc 2 1913 0
-	str	r3, [fp, #-56]
-	.loc 2 1914 0
-	bl	decrement_vpc_count
+.L1168:
+	.loc 2 1962 0
+	mov	r3, #-1
 .LVL1015:
-.L1152:
-.LBE452:
-	.loc 2 1954 0
-	ldr	r8, [fp, #-56]
-	cmn	r8, #1
-	beq	.L1135
-.L1165:
-	.loc 2 1956 0
-	ubfx	r0, r8, #10, #16
-	bl	P2V_block_in_plane
+	.loc 2 1963 0
+	ldrh	r0, [fp]
+	.loc 2 1962 0
+	str	r3, [sp, #36]
+	.loc 2 1963 0
+	bl	decrement_vpc_count
 .LVL1016:
-	.loc 2 1957 0
-	ldrh	r3, [r5, #16]
-	.loc 2 1956 0
-	mov	r6, r0
+.L1176:
+.LBE475:
+	.loc 2 2003 0
+	ldr	r0, [sp, #36]
+	adds	r1, r0, #1
+	beq	.L1157
+.L1189:
+	.loc 2 2005 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
 .LVL1017:
-	.loc 2 1957 0
+	.loc 2 2006 0
+	ldrh	r3, [r4, #16]
+	.loc 2 2005 0
+	mov	r6, r0
+.LVL1018:
+	.loc 2 2006 0
 	cmp	r3, r0
-	bhi	.L1157
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	movw	r2, #1957
-	ldr	r1, .L1225+4
-	ldr	r0, .L1225+8
+	bhi	.L1181
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	movw	r2, #2006
+	ldr	r1, .L1250
+	ldr	r0, .L1250+4
 	bl	printk
-.LVL1018:
-.L1157:
-	.loc 2 1958 0 is_stmt 1
-	ldr	r2, [r5, #2260]
-	lsl	r3, r6, #1
-	ldrh	r3, [r2, r3]
+.LVL1019:
+.L1181:
+	.loc 2 2007 0 is_stmt 1
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1158
-	.loc 2 1960 0
+	beq	.L1182
+	.loc 2 2009 0
 	mov	r0, r6
-	b	.L1221
-.LVL1019:
-.L1142:
-.LBB453:
-	.loc 2 1872 0
-	ldr	r3, [fp, #-48]
-	ldr	r2, [fp, #-52]
+	b	.L1244
+.LVL1020:
+.L1166:
+.LBB476:
+	.loc 2 1921 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1145
-	.loc 2 1873 0
-	mov	r2, #1
-	sub	r1, fp, #56
+	bne	.L1169
+	.loc 2 1922 0
+	movs	r2, #1
+	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-.LVL1020:
-	b	.L1145
-.L1143:
-	.loc 2 1881 0 discriminator 1
-	ldr	r2, [r8, #8]
-	cmp	r6, r2
-	bne	.L1144
-	str	r3, [fp, #-100]
-	.loc 2 1869 0 discriminator 2
-	ldr	r3, [r8, #4]
 .LVL1021:
-	.loc 2 1882 0 discriminator 2
-	ldr	r0, [r5, #3964]
-	mov	r1, r3
-	.loc 2 1869 0 discriminator 2
-	str	r3, [fp, #-96]
-	.loc 2 1882 0 discriminator 2
-	bl	ftl_cmp_data_ver
+	b	.L1169
+.L1167:
+	.loc 2 1930 0 discriminator 1
+	ldr	r1, [r8, #8]
+	cmp	r6, r1
+	bne	.L1168
+	.loc 2 1918 0 discriminator 2
+	ldr	r9, [r8, #4]
 .LVL1022:
-	.loc 2 1881 0 discriminator 2
-	cmp	r0, #0
-	beq	.L1144
-	.loc 2 1883 0
-	ldr	r1, [fp, #-48]
-	ldr	r2, [fp, #-52]
-	ldr	r3, [fp, #-100]
-	cmp	r2, r1
-	.loc 2 1885 0
-	ldr	r1, [fp, #-56]
-	.loc 2 1883 0
-	bne	.L1147
+	.loc 2 1931 0 discriminator 2
+	ldr	r0, [r4, #3964]
+	mov	r1, r9
+	bl	ftl_cmp_data_ver
 .LVL1023:
-.L1219:
-	.loc 2 1909 0
+	.loc 2 1930 0 discriminator 2
+	cmp	r0, #0
+	beq	.L1168
+	.loc 2 1932 0
+	ldr	r1, [sp, #40]
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	bne	.L1171
+.LVL1024:
+.L1174:
+	.loc 2 1958 0
+	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-.LVL1024:
-	b	.L1144
 .LVL1025:
-.L1147:
-	.loc 2 1886 0
-	cmp	r2, r1
-	beq	.L1144
-	.loc 2 1887 0
-	cmn	r2, #1
-	.loc 2 1892 0
-	streq	r2, [r3, r7]
-	.loc 2 1887 0
-	beq	.L1149
-	.loc 2 1888 0
-	ldr	r3, [fp, #-92]
-	.loc 2 1890 0
-	mov	r1, #1
-	.loc 2 1889 0
-	str	r2, [r3, #4]
-	.loc 2 1890 0
+	b	.L1168
+.LVL1026:
+.L1171:
+	.loc 2 1935 0
+	ldr	r0, [sp, #36]
+.LVL1027:
+	cmp	r1, r0
+	beq	.L1168
+	.loc 2 1936 0
+	adds	r0, r1, #1
+	beq	.L1172
+	.loc 2 1938 0
+	str	r1, [r3, #4]
+	.loc 2 1939 0
+	movs	r2, #0
+	movs	r1, #1
 	mov	r0, r3
-	mov	r2, #0
-	.loc 2 1888 0
+	.loc 2 1937 0
 	ldr	r8, [r3, #12]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1026:
-.L1149:
-	.loc 2 1895 0
-	ldr	r3, [r5, #3792]
+.LVL1028:
+.L1173:
+	.loc 2 1944 0
+	ldr	r3, [r4, #3792]
 	ldr	r3, [r3, r7]
-	cmn	r3, #1
-	beq	.L1150
-	.loc 2 1896 0
-	ldr	r7, [r8, #4]
-.LVL1027:
-	.loc 2 1897 0
-	ldr	r0, [r5, #3964]
-	mov	r1, r7
+	adds	r3, r3, #1
+	beq	.L1174
+	.loc 2 1945 0
+	ldr	r3, [r8, #4]
+.LVL1029:
+	.loc 2 1946 0
+	ldr	r0, [r4, #3964]
+	mov	r1, r3
 	bl	ftl_cmp_data_ver
-.LVL1028:
+.LVL1030:
 	cmp	r0, #0
-	beq	.L1150
-	.loc 2 1898 0
-	mov	r1, r7
-	ldr	r0, [fp, #-96]
+	beq	.L1174
+	.loc 2 1947 0
+	mov	r1, r3
+	mov	r0, r9
 	bl	ftl_cmp_data_ver
-.LVL1029:
-	cmp	r0, #0
-	beq	.L1144
-.L1150:
-	.loc 2 1909 0
-	ldr	r1, [fp, #-56]
-	b	.L1219
-.LVL1030:
-.L1141:
-.LBE453:
-	.loc 2 1915 0
-	ldr	r3, [fp, #-48]
-	ldr	r2, [fp, #-52]
-	cmp	r2, r3
-	beq	.L1152
-	.loc 2 1917 0
-	mov	r2, #1
-	sub	r1, fp, #48
-	mov	r0, r6
-	bl	log2phys
 .LVL1031:
-	.loc 2 1918 0
-	ldr	r8, [fp, #-52]
-	cmn	r8, #1
-	beq	.L1152
-	.loc 2 1918 0 is_stmt 0 discriminator 1
-	ldr	r3, [fp, #-56]
+	cmp	r0, #0
+	beq	.L1168
+	b	.L1174
+.LVL1032:
+.L1172:
+	.loc 2 1941 0
+	str	r1, [r2, r7]
+	b	.L1173
+.LVL1033:
+.L1165:
+.LBE476:
+	.loc 2 1964 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	beq	.L1176
+	.loc 2 1966 0
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r6
+	bl	log2phys
+.LVL1034:
+	.loc 2 1967 0
+	ldr	r8, [sp, #40]
+	cmp	r8, #-1
+	beq	.L1176
+	.loc 2 1967 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1165
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1179
+	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
-.LVL1032:
-	.loc 2 1921 0
-	ldr	r3, .L1225+16
-	ldrh	r2, [r3]
-	cmp	r2, r0
-	beq	.L1156
-	.loc 2 1921 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r3, #48]
-	cmp	r2, r0
-	beq	.L1156
-	.loc 2 1922 0 is_stmt 1
-	ldrh	r3, [r3, #96]
+.LVL1035:
+	.loc 2 1970 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r0
-	bne	.L1152
-.L1156:
-.LBB454:
-	.loc 2 1927 0
-	ldr	r0, [r5, #3792]
-	.loc 2 1930 0
-	mov	r2, #0
-	mov	r1, #1
-	.loc 2 1929 0
+	beq	.L1180
+	.loc 2 1970 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
+	cmp	r3, r0
+	beq	.L1180
+	.loc 2 1971 0 is_stmt 1
+	ldrh	r3, [r4, #2420]
+	cmp	r3, r0
+	bne	.L1176
+.L1180:
+.LBB477:
+	.loc 2 1976 0
+	ldr	r0, [r4, #3792]
+	.loc 2 1979 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1978 0
 	str	r8, [r0, #4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	r7, [r0, #12]
-	.loc 2 1930 0
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1033:
-	.loc 2 1933 0
-	ldr	r3, [r5, #3792]
+.LVL1036:
+	.loc 2 1982 0
+	ldr	r3, [r4, #3792]
 	ldr	r3, [r3]
-	cmn	r3, #1
-	beq	.L1152
-	.loc 2 1934 0
+	adds	r3, r3, #1
+	beq	.L1176
+	.loc 2 1983 0
 	ldr	r1, [r7, #4]
-	ldr	r0, [fp, #-64]
+	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
-.LVL1034:
+.LVL1037:
 	cmp	r0, #0
-	bne	.L1152
-	.loc 2 1941 0
-	mov	r2, #1
-	sub	r1, fp, #52
+	bne	.L1176
+	.loc 2 1990 0
+	movs	r2, #1
+	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-.LVL1035:
-	b	.L1152
-.LVL1036:
-.L1158:
-.LBE454:
-	.loc 2 1962 0
+.LVL1038:
+	b	.L1176
+.LVL1039:
+.L1182:
+.LBE477:
+	.loc 2 2011 0
 	mov	r1, r6
-	ldr	r0, .L1225+20
+	ldr	r0, .L1250+8
 	bl	printk
-.LVL1037:
-	b	.L1135
-.LVL1038:
-.L1137:
-	.loc 2 1969 0
-	ldr	r3, [r5, #3972]
+.LVL1040:
+	b	.L1157
+.LVL1041:
+.L1161:
+	.loc 2 2018 0
+	ldr	r3, [r4, #3972]
 	cmp	r3, #31
-	.loc 2 1970 0
-	addls	r2, r5, r3, lsl #2
-	.loc 2 1971 0
+	.loc 2 2019 0
+	itttt	ls
+	addls	r2, r4, r3, lsl #2
+	.loc 2 2020 0
 	addls	r3, r3, #1
-	strls	r3, [r5, #3972]
-	.loc 2 1970 0
+	strls	r3, [r4, #3972]
+	.loc 2 2019 0
 	strls	r6, [r2, #3976]
-	.loc 2 1973 0
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-.LVL1039:
-	.loc 2 1975 0
-	ldr	r3, [r5, #3964]
-	cmn	r3, #1
-	.loc 2 1976 0
-	ldreq	r3, [fp, #-64]
-.LVL1040:
-	.loc 2 1975 0
-	beq	.L1220
-	.loc 2 1977 0
-	ldr	r2, [fp, #-64]
-.LVL1041:
-	cmp	r2, r3
-	bcs	.L1135
-	.loc 2 1978 0
-	mov	r3, r2
+	.loc 2 2022 0
+	ldrh	r0, [fp]
 .LVL1042:
-.L1220:
-	str	r3, [r5, #3964]
-	b	.L1135
+	bl	decrement_vpc_count
 .LVL1043:
-.L1136:
-	.loc 2 2002 0
-	ldrb	r3, [fp, #-72]	@ zero_extendqisi2
+	.loc 2 2024 0
+	ldr	r3, [r4, #3964]
+	adds	r2, r3, #1
+	bne	.L1184
+	.loc 2 2025 0
+	ldr	r3, [sp, #4]
 .LVL1044:
-	.loc 2 2003 0
-	strh	r9, [r4, #2]	@ movhi
-	.loc 2 2004 0
-	ldr	r2, [fp, #-72]
+.L1243:
+	.loc 2 2027 0
+	str	r3, [r4, #3964]
+	b	.L1157
 .LVL1045:
-	.loc 2 2002 0
-	strb	r3, [r4, #6]
-	b	.L1224
-.L1226:
+.L1184:
+	.loc 2 2026 0
+	ldr	r2, [sp, #4]
+.LVL1046:
+	cmp	r2, r3
+	bcs	.L1157
+	.loc 2 2027 0
+	mov	r3, r2
+.LVL1047:
+	b	.L1243
+.LVL1048:
+.L1160:
+	.loc 2 2051 0
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+.LVL1049:
+	.loc 2 2053 0
+	mov	r1, r5
+	.loc 2 2052 0
+	strh	r5, [fp, #2]	@ movhi
+	.loc 2 2053 0
+	ldr	r2, [sp, #12]
+	.loc 2 2051 0
+	strb	r3, [fp, #6]
+	b	.L1247
+.LVL1050:
+.L1179:
+	.loc 2 2003 0
+	mov	r0, r8
+	b	.L1189
+.L1251:
 	.align	2
-.L1225:
-	.word	.LANCHOR0
+.L1250:
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LANCHOR0+3968
-	.word	.LANCHOR0+2280
-	.word	.LC95
-.LFE221:
+	.word	.LC98
+.LFE231:
 	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.align	2
+	.align	1
 	.global	FtlSuperblockPowerLostFix
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	.fnstart
-.LFB228:
-	.loc 2 2156 0
+.LFB238:
+	.loc 2 2205 0
 	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1046:
-	.movsp ip
-	mov	ip, sp
-.LCFI339:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI340:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI341:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1051:
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI145:
 	.pad #24
 	sub	sp, sp, #24
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2156 0
-	ldr	r5, .L1238
-	mov	r4, r0
-	.loc 2 2162 0
-	mov	r6, #7
-	.loc 2 2168 0
-	mvn	r7, #0
-.L1228:
-	.loc 2 2162 0
-	subs	r6, r6, #1
-	beq	.L1230
-	.loc 2 2163 0
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1229
-.L1230:
-	.loc 2 2183 0
-	ldrh	r3, [r4]
-	ldr	r1, [r5, #2260]
-	ldrh	r0, [r4, #4]
-	lsl	r3, r3, #1
-	ldrh	r2, [r1, r3]
-	sub	r2, r2, r0
-	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2184 0
-	ldrh	r3, [r5, #78]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2185 0
-	mov	r3, #0
-	strb	r3, [r4, #6]
-	.loc 2 2186 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2188 0
-	sub	sp, fp, #28
-.LCFI342:
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL1047:
-.L1229:
-.LCFI343:
-	.loc 2 2165 0
-	mov	r0, r4
+.LCFI146:
+	.loc 2 2212 0
+	ldr	r4, .L1263
+	.loc 2 2211 0
+	mov	r3, #-1
+	.loc 2 2219 0
+	mov	r8, #0
+	.loc 2 2220 0
+	movw	r1, #61589
+	.loc 2 2211 0
+	str	r3, [sp, #20]
+	.loc 2 2205 0
+	mov	r5, r0
+	.loc 2 2212 0
+	ldr	r2, [r4, #3240]
+	.loc 2 2223 0
+	movs	r7, #7
+	.loc 2 2213 0
+	ldr	r6, [r4, #3244]
+	.loc 2 2212 0
+	str	r2, [sp, #12]
+	.loc 2 2216 0
+	mvn	r2, #2
+	.loc 2 2213 0
+	str	r6, [sp, #16]
+	.loc 2 2216 0
+	str	r2, [r6, #8]
+	.loc 2 2217 0
+	mvn	r2, #1
+	str	r2, [r6, #12]
+	.loc 2 2218 0
+	ldrh	r2, [r0]
+	.loc 2 2219 0
+	strh	r8, [r6]	@ movhi
+	.loc 2 2218 0
+	strh	r2, [r6, #2]	@ movhi
+	.loc 2 2220 0
+	ldr	r2, [r4, #3240]
+	str	r1, [r2]
+	.loc 2 2221 0
+	add	r1, r1, #304087040
+	ldr	r2, [r4, #3240]
+	add	r1, r1, #1269760
+	addw	r1, r1, #1507
+	str	r1, [r2, #4]
+.L1253:
+	.loc 2 2223 0
+	subs	r7, r7, #1
+	beq	.L1255
+.LVL1052:
+	.loc 2 2224 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1254
+.L1255:
+	.loc 2 2234 0
+	ldr	r2, [r4, #2300]
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2235 0
+	ldrh	r3, [r4, #78]
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 2236 0
+	movs	r3, #0
+	strb	r3, [r5, #6]
+	.loc 2 2237 0
+	strh	r3, [r5, #4]	@ movhi
+	.loc 2 2238 0
+	add	sp, sp, #24
+.LCFI147:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1053:
+.L1254:
+.LCFI148:
+	.loc 2 2226 0
+	mov	r0, r5
 	bl	get_new_active_ppa
-.LVL1048:
-	.loc 2 2166 0
-	cmn	r0, #1
-	.loc 2 2165 0
-	str	r0, [fp, #-44]
-	.loc 2 2166 0
-	beq	.L1230
-	.loc 2 2170 0
-	ldr	r1, [r5, #3244]
-	.loc 2 2179 0
-	sub	r0, fp, #48
-	.loc 2 2169 0
-	ldr	r3, [r5, #2244]
-	.loc 2 2168 0
-	str	r7, [fp, #-32]
-	.loc 2 2170 0
-	str	r1, [fp, #-36]
-	.loc 2 2169 0
-	str	r3, [fp, #-40]
-	.loc 2 2174 0
-	str	r7, [r1, #12]
-	.loc 2 2173 0
-	str	r7, [r1, #8]
-	.loc 2 2175 0
-	ldrh	r3, [r4]
-	strh	r3, [r1, #2]	@ movhi
-	.loc 2 2176 0
-	mov	r3, #0
-	strh	r3, [r1]	@ movhi
-	.loc 2 2178 0
-	ldr	r2, [r5, #2476]
-	str	r2, [r1, #4]
-	add	r2, r2, #1
-	cmn	r2, #1
-	.loc 2 2179 0
-	mov	r1, #1
-	.loc 2 2178 0
-	moveq	r2, r3
-	str	r2, [r5, #2476]
-	.loc 2 2179 0
+.LVL1054:
+	str	r0, [sp, #8]
+	.loc 2 2227 0
+	adds	r0, r0, #1
+	beq	.L1255
+	.loc 2 2229 0
+	ldr	r3, [r4, #2520]
+	.loc 2 2230 0
+	movs	r1, #1
+	add	r0, sp, #4
+	.loc 2 2229 0
+	str	r3, [r6, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r8
+	str	r3, [r4, #2520]
+	.loc 2 2230 0
+	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1049:
-	.loc 2 2180 0
-	ldrh	r0, [r4]
+.LVL1055:
+	.loc 2 2231 0
+	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-.LVL1050:
-	b	.L1228
-.L1239:
+.LVL1056:
+	b	.L1253
+.L1264:
 	.align	2
-.L1238:
+.L1263:
 	.word	.LANCHOR0
-.LFE228:
+.LFE238:
 	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.align	2
+	.align	1
 	.global	FtlLoadBbt
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
 	.fnstart
-.LFB169:
+.LFB179:
 	.loc 4 173 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI344:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI345:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI346:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 4 173 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+.LCFI149:
+	.loc 4 196 0
+	movw	r8, #61649
 	.loc 4 180 0
-	ldr	r4, .L1272
+	ldr	r4, .L1294
+	ldr	r3, [r4, #3240]
 	.loc 4 186 0
-	ldr	r7, .L1272+4
-	.loc 4 180 0
-	ldr	r3, [r4, #2244]
+	addw	r7, r4, #3220
 	.loc 4 181 0
 	ldr	r6, [r4, #3244]
 	.loc 4 180 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 181 0
-	str	r6, [r4, #3236]
+	str	r6, [r4, #3232]
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1051:
+.LVL1057:
 	.loc 4 184 0
 	ldrh	r5, [r4, #74]
-	sub	r5, r5, #1
+	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1052:
-.L1241:
+.LVL1058:
+.L1266:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #74]
-	sub	r3, r3, #16
+	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1244
+	ble	.L1269
 	.loc 4 185 0 is_stmt 1
-	lsl	r3, r5, #10
+	lsls	r3, r5, #10
 	.loc 4 186 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 185 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1053:
+.LVL1059:
 	.loc 4 187 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	bne	.L1242
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	bne	.L1267
 	.loc 4 188 0
-	ldr	r3, [r4, #3228]
+	ldr	r3, [r4, #3224]
 	.loc 4 189 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 188 0
-	add	r3, r3, #1
-	str	r3, [r4, #3228]
+	adds	r3, r3, #1
+	str	r3, [r4, #3224]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1054:
-.L1242:
+.LVL1060:
+.L1267:
 	.loc 4 191 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	beq	.L1243
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	beq	.L1268
 	.loc 4 196 0
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1243
+	ldrh	r3, [r6]
+	cmp	r3, r8
+	bne	.L1268
 	.loc 4 199 0
 	ldr	r3, [r6, #4]
 	.loc 4 198 0
@@ -14081,74 +13125,78 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #132]	@ movhi
-.L1244:
+.L1269:
 	.loc 4 216 0
 	ldrh	r3, [r4, #128]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1258
+	beq	.L1283
 	.loc 4 222 0
 	ldrh	r3, [r4, #132]
 	cmp	r3, r2
-	beq	.L1248
+	beq	.L1273
 	.loc 4 224 0
-	lsl	r3, r3, #10
+	lsls	r3, r3, #10
 	.loc 4 225 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1272+4
+	ldr	r0, .L1294+4
 	.loc 4 224 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1055:
+.LVL1061:
 	.loc 4 226 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	beq	.L1248
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	beq	.L1273
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1248
+	bne	.L1273
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #136]
 	cmp	r3, r2
-	.loc 4 231 0 is_stmt 1 discriminator 1
-	ldrhhi	r2, [r4, #132]
-	.loc 4 232 0 discriminator 1
-	strhi	r3, [r4, #136]
-	.loc 4 233 0 discriminator 1
-	ldrhhi	r3, [r6, #8]
-	.loc 4 231 0 discriminator 1
-	strhhi	r2, [r4, #128]	@ movhi
-	.loc 4 233 0 discriminator 1
-	strhhi	r3, [r4, #132]	@ movhi
-.L1248:
+	bls	.L1273
+	.loc 4 231 0 is_stmt 1
+	ldrh	r2, [r4, #132]
+	.loc 4 232 0
+	str	r3, [r4, #136]
+	.loc 4 233 0
+	ldrh	r3, [r6, #8]
+	.loc 4 231 0
+	strh	r2, [r4, #128]	@ movhi
+	.loc 4 233 0
+	strh	r3, [r4, #132]	@ movhi
+.L1273:
 	.loc 4 245 0
-	ldr	r7, .L1272+4
+	ldr	r7, .L1294+4
 	.loc 4 238 0
-	mov	r1, #1
+	movs	r1, #1
 	ldrh	r0, [r4, #128]
+	.loc 4 247 0
+	movw	r8, #61649
+	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1056:
+.LVL1062:
 	sxth	r5, r0
-.LVL1057:
+.LVL1063:
 	.loc 4 239 0
-	add	r0, r0, #1
+	adds	r0, r0, #1
 	strh	r0, [r4, #130]	@ movhi
-.L1250:
+.L1275:
 	.loc 4 241 0
 	cmp	r5, #0
-	bge	.L1253
+	bge	.L1278
 	.loc 4 254 0
-	mov	r2, #254
-	ldr	r1, .L1272+8
-	ldr	r0, .L1272+12
+	movs	r2, #254
+	ldr	r1, .L1294+8
+	ldr	r0, .L1294+12
 	bl	printk
-.LVL1058:
-.L1252:
+.LVL1064:
+.L1277:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -14158,416 +13206,392 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1255
+	beq	.L1280
 	.loc 4 259 0
 	ldr	r2, [r4, #4]
 	cmp	r0, r2
-	beq	.L1255
+	beq	.L1280
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
-	lsr	r3, r3, #2
-	.loc 4 261 0 is_stmt 1 discriminator 1
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1280
+	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	cmpcc	r2, r3
-	bcs	.L1255
+	bcs	.L1280
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1059:
-.L1255:
-	ldr	r6, .L1272+16
+.LVL1065:
+.L1280:
+	ldr	r6, .L1294+16
 	.loc 4 173 0 discriminator 1
-	mov	r5, #0
-.LVL1060:
-	.loc 4 269 0 discriminator 1
-	ldr	r7, .L1272+20
-.L1256:
-	.loc 4 268 0 discriminator 1
+	movs	r5, #0
+.LVL1066:
+.L1281:
+	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	bcc	.L1257
+	bcc	.L1282
 	.loc 4 275 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL1061:
-.L1243:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1067:
+.L1268:
 	.loc 4 184 0 discriminator 2
-	sub	r5, r5, #1
-.LVL1062:
+	subs	r5, r5, #1
+.LVL1068:
 	uxth	r5, r5
-.LVL1063:
-	b	.L1241
-.LVL1064:
-.L1253:
+.LVL1069:
+	b	.L1266
+.LVL1070:
+.L1278:
 	.loc 4 243 0
 	ldrh	r3, [r4, #128]
 	.loc 4 245 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 243 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 244 0
-	ldr	r3, [r4, #2244]
-	str	r3, [r4, #3232]
+	ldr	r3, [r4, #3240]
+	str	r3, [r4, #3228]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1065:
+.LVL1071:
 	.loc 4 247 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	beq	.L1251
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	beq	.L1276
 	.loc 4 247 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L1252
-.L1251:
-	sub	r5, r5, #1
-.LVL1066:
+	ldrh	r3, [r6]
+	cmp	r3, r8
+	beq	.L1277
+.L1276:
+	subs	r5, r5, #1
+.LVL1072:
 	sxth	r5, r5
-.LVL1067:
-	b	.L1250
-.LVL1068:
-.L1257:
+.LVL1073:
+	b	.L1275
+.LVL1074:
+.L1282:
 	.loc 4 269 0 is_stmt 1 discriminator 3
-	ldrh	r2, [r7]
-	ldr	r1, [r4, #3232]
+	ldrh	r2, [r4, #3860]
+	ldr	r1, [r4, #3228]
 	ldr	r0, [r6, #4]!
-	lsl	r2, r2, #2
+	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
-	add	r5, r5, #1
+	adds	r5, r5, #1
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1069:
-	b	.L1256
-.LVL1070:
-.L1258:
+.LVL1075:
+	b	.L1281
+.LVL1076:
+.L1283:
 	.loc 4 218 0
-	mvn	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1273:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1077:
+.L1295:
 	.align	2
-.L1272:
+.L1294:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+443
 	.word	.LC1
 	.word	.LANCHOR0+152
-	.word	.LANCHOR0+3860
-.LFE169:
+.LFE179:
 	.fnend
 	.size	FtlLoadBbt, .-FtlLoadBbt
-	.align	2
+	.align	1
 	.global	FtlMakeBbt
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	.fnstart
-.LFB171:
-	.loc 4 317 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI347:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI348:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI349:
-	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
+.LFB181:
 	.loc 4 317 0
-	ldr	r8, .L1294
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI150:
 	.loc 4 327 0
-	mov	r7, #0
-.LVL1071:
+	mov	r8, #0
+.LVL1078:
+	ldr	r9, .L1315+4
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1072:
-	.loc 4 326 0
-	bl	FtlLoadFactoryBbt
-.LVL1073:
+.LVL1079:
 	.loc 4 327 0
-	sub	r5, r8, #156
-	sub	r9, r8, #18
+	sub	r5, r9, #156
+	sub	r10, r9, #18
 	mov	r4, r5
-.LVL1074:
-.L1275:
-	.loc 4 327 0 is_stmt 0 discriminator 1
+	.loc 4 326 0
+	bl	FtlLoadFactoryBbt
+.LVL1080:
+.L1297:
+	.loc 4 327 0 discriminator 1
 	ldrh	r3, [r5, #30]
-	cmp	r7, r3
-	bcc	.L1281
-	mov	r5, #0
-.L1282:
-	.loc 4 381 0 is_stmt 1 discriminator 1
+	cmp	r8, r3
+	bcc	.L1303
+	movs	r5, #0
+.L1304:
+	.loc 4 381 0 discriminator 1
 	ldrh	r3, [r4, #90]
 	uxth	r0, r5
-	add	r5, r5, #1
+	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1283
+	bhi	.L1305
 	.loc 4 387 0
 	ldrh	r5, [r4, #140]
 	.loc 4 396 0
 	movw	r6, #65535
-.LVL1075:
 	.loc 4 387 0
-	sub	r5, r5, #1
+	subs	r5, r5, #1
 	uxth	r5, r5
-.L1284:
+.L1306:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #140]
-	sub	r3, r3, #48
+	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1288
+	ble	.L1310
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1076:
+.LVL1081:
 	cmp	r0, #1
-	beq	.L1285
+	beq	.L1307
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1077:
+.LVL1082:
 	cmp	r0, #0
-	beq	.L1286
+	beq	.L1308
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1078:
-.L1285:
+.LVL1083:
+.L1307:
 	.loc 4 387 0 discriminator 2
-	sub	r5, r5, #1
+	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1284
-.LVL1079:
-.L1281:
+	b	.L1306
+.L1303:
 	.loc 4 331 0
-	ldrh	r3, [r9, #2]!
+	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
 	.loc 4 328 0
-	ldr	r0, [r5, #2244]
+	ldr	r0, [r5, #3240]
 	.loc 4 329 0
-	ldr	r10, [r5, #3244]
+	ldr	fp, [r5, #3244]
 	.loc 4 331 0
 	cmp	r3, r2
 	.loc 4 328 0
-	str	r0, [r5, #3232]
+	str	r0, [r5, #3228]
 	.loc 4 329 0
-	str	r10, [r5, #3236]
+	str	fp, [r5, #3232]
 	.loc 4 331 0
-	beq	.L1276
+	beq	.L1298
 	.loc 4 333 0
-	ldrh	r6, [r5, #74]
-.LVL1080:
+	ldrh	r7, [r5, #74]
+.LVL1084:
 	.loc 4 335 0
-	mov	r2, #1
+	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1294+4
+	ldr	r0, .L1315
 	.loc 4 333 0
-	mla	r6, r7, r6, r3
-.LVL1081:
+	mla	r7, r8, r7, r3
+.LVL1085:
 	.loc 4 334 0
-	lsl	r3, r6, #10
-	str	r3, [r5, #3228]
+	lsls	r3, r7, #10
+	str	r3, [r5, #3224]
 	.loc 4 335 0
 	bl	FlashReadPages
-.LVL1082:
+.LVL1086:
 	.loc 4 336 0
 	ldrh	r2, [r5, #74]
-	ldr	r1, [r5, #3232]
-	ldr	r0, [r8]
-	add	r2, r2, #7
-	asr	r2, r2, #3
+	ldr	r1, [r5, #3228]
+	ldr	r0, [r9]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1083:
-.L1277:
+.LVL1087:
+.L1299:
 	.loc 4 376 0 discriminator 2
-	uxth	r0, r6
+	uxth	r0, r7
 	.loc 4 327 0 discriminator 2
-	add	r7, r7, #1
-	add	r8, r8, #4
+	add	r8, r8, #1
+	add	r9, r9, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1084:
-	b	.L1275
-.L1276:
+.LVL1088:
+	b	.L1297
+.L1298:
 	.loc 4 340 0
-	mov	r1, r7
+	mov	r1, r8
 	bl	FlashGetBadBlockList
-.LVL1085:
+.LVL1089:
 	.loc 4 341 0
-	ldr	r1, [r8]
-	ldr	r0, [r5, #3232]
+	ldr	r1, [r9]
+	ldr	r0, [r5, #3228]
 	bl	FtlBbt2Bitmap
-.LVL1086:
+.LVL1090:
 	.loc 4 343 0
-	ldrh	r3, [r5, #74]
-.L1293:
+	ldrh	r6, [r5, #74]
+.L1301:
 	.loc 4 347 0
-	sub	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [fp, #-48]
-.L1278:
+	subs	r6, r6, #1
+	uxth	r6, r6
+.L1300:
 	.loc 4 345 0
-	ldr	r3, [fp, #-48]
 	ldrh	r0, [r4, #74]
-	smlabb	r0, r0, r7, r3
+	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1087:
+.LVL1091:
 	cmp	r0, #1
-	beq	.L1279
-	.loc 4 349 0
-	ldrh	r3, [fp, #-48]
-.LBB465:
-.LBB466:
-.LBB467:
+	beq	.L1301
+.LBB488:
+.LBB489:
+.LBB490:
 	.loc 1 202 0
-	mov	r1, #16
+	movs	r1, #16
 	ldr	r0, [r4, #3244]
-.LBE467:
-.LBE466:
-.LBE465:
+.LBE490:
+.LBE489:
+.LBE488:
 	.loc 4 349 0
-	strh	r3, [r9]	@ movhi
-.LBB470:
-.LBB469:
-.LBB468:
+	strh	r6, [r10]	@ movhi
+.LBB493:
+.LBB492:
+.LBB491:
 	.loc 1 202 0
 	bl	__memzero
-.LVL1088:
-.LBE468:
-.LBE469:
-.LBE470:
-.LBB471:
-.LBB472:
-.LBB473:
+.LVL1092:
+.LBE491:
+.LBE492:
+.LBE493:
+.LBB494:
+.LBB495:
+.LBB496:
 	mov	r1, #4096
-	ldr	r0, [r4, #2244]
+	ldr	r0, [r4, #3240]
 	bl	__memzero
-.LVL1089:
-.LBE473:
-.LBE472:
-.LBE471:
+.LVL1093:
+.LBE496:
+.LBE495:
+.LBE494:
 	.loc 4 352 0
-	ldr	r3, .L1294+8
-	strh	r3, [r10]	@ movhi
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
 	.loc 4 353 0
-	mov	r3, #0
-	str	r3, [r10, #4]
+	movs	r3, #0
+	str	r3, [fp, #4]
 	.loc 4 354 0
-	ldrh	r3, [r9]
+	ldrh	r3, [r10]
 	.loc 4 355 0
-	ldrh	r6, [r4, #74]
-.LVL1090:
+	ldrh	r7, [r4, #74]
+.LVL1094:
+	.loc 4 357 0
+	ldrh	r2, [r4, #3860]
 	.loc 4 354 0
-	strh	r3, [r10, #2]	@ movhi
+	strh	r3, [fp, #2]	@ movhi
 	.loc 4 355 0
-	ldrh	r3, [r9]
+	ldrh	r3, [r10]
 	.loc 4 357 0
-	ldr	r1, [r8]
-	ldr	r0, [r4, #3232]
+	ldr	r1, [r9]
+	lsls	r2, r2, #2
+	ldr	r0, [r4, #3228]
 	.loc 4 355 0
-	mla	r6, r7, r6, r3
-.LVL1091:
+	mla	r7, r8, r7, r3
+.LVL1095:
 	.loc 4 356 0
-	lsl	r3, r6, #10
-	str	r3, [r4, #3228]
+	lsls	r3, r7, #10
+	str	r3, [r4, #3224]
 	.loc 4 357 0
-	ldr	r3, .L1294+12
-	ldrh	r2, [r3]
-	lsl	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1092:
+.LVL1096:
 	.loc 4 358 0
-	mov	r2, #1
-	ldr	r0, .L1294+4
+	movs	r2, #1
+	ldr	r0, .L1315
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1093:
+.LVL1097:
 	.loc 4 359 0
-	mov	r3, #1
-	ldr	r0, .L1294+4
+	movs	r3, #1
+	ldr	r0, .L1315
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1094:
+.LVL1098:
 	.loc 4 360 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	bne	.L1277
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	bne	.L1299
 	.loc 4 362 0
-	uxth	r0, r6
+	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-.LVL1095:
+.LVL1099:
 	.loc 4 363 0
-	b	.L1278
-.L1279:
-	.loc 4 347 0
-	ldr	r3, [fp, #-48]
-	b	.L1293
-.L1283:
+	b	.L1300
+.L1305:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1096:
-	b	.L1282
-.LVL1097:
-.L1286:
+.LVL1100:
+	b	.L1304
+.L1308:
 	.loc 4 396 0
 	ldrh	r3, [r4, #128]
 	cmp	r3, r6
+	bne	.L1309
 	.loc 4 398 0
-	strheq	r5, [r4, #128]	@ movhi
-	beq	.L1285
-.L1287:
+	strh	r5, [r4, #128]	@ movhi
+	b	.L1307
+.L1309:
 	.loc 4 402 0
 	strh	r5, [r4, #132]	@ movhi
-.L1288:
+.L1310:
 	.loc 4 414 0
 	ldrh	r3, [r4, #128]
 	.loc 4 411 0
-	mov	r5, #0
+	movs	r5, #0
 	.loc 4 414 0
 	ldr	r0, [r4, #3760]
 	.loc 4 416 0
-	mov	r1, #1
+	movs	r1, #1
 	.loc 4 413 0
 	str	r5, [r4, #136]
 	.loc 4 416 0
-	mov	r2, #2
+	movs	r2, #2
 	.loc 4 411 0
 	strh	r5, [r4, #130]	@ movhi
 	.loc 4 414 0
-	lsl	r3, r3, #10
+	lsls	r3, r3, #10
 	str	r3, [r0, #4]
 	.loc 4 415 0
 	ldrh	r3, [r4, #132]
-	lsl	r3, r3, #10
+	lsls	r3, r3, #10
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1098:
+.LVL1101:
 	.loc 4 418 0
 	ldrh	r0, [r4, #128]
 	bl	FtlBbmMapBadBlock
-.LVL1099:
+.LVL1102:
 	.loc 4 419 0
 	ldrh	r0, [r4, #132]
 	bl	FtlBbmMapBadBlock
-.LVL1100:
+.LVL1103:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1101:
+.LVL1104:
 	.loc 4 422 0
 	ldr	r3, [r4, #136]
 	.loc 4 425 0
@@ -14575,7 +13599,7 @@ FtlMakeBbt:
 	.loc 4 426 0
 	strh	r5, [r4, #130]	@ movhi
 	.loc 4 422 0
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	str	r3, [r4, #136]
 	.loc 4 424 0
 	ldrh	r3, [r4, #128]
@@ -14585,5660 +13609,5260 @@ FtlMakeBbt:
 	strh	r3, [r4, #132]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1102:
+.LVL1105:
 	.loc 4 432 0
 	mov	r0, r5
-	sub	sp, fp, #40
-.LCFI350:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1103:
-.L1295:
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL1106:
+.L1316:
 	.align	2
-.L1294:
+.L1315:
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR0+156
-	.word	.LANCHOR0+3224
-	.word	-3872
-	.word	.LANCHOR0+3860
-.LFE171:
+.LFE181:
 	.fnend
 	.size	FtlMakeBbt, .-FtlMakeBbt
-	.align	2
+	.align	1
 	.global	FtlVendorPartWrite
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 	.fnstart
-.LFB203:
-	.loc 2 786 0
+.LFB213:
+	.loc 2 835 0
 	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1104:
-	.movsp ip
-	mov	ip, sp
-.LCFI351:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI352:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI353:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1107:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI151:
+	mov	r10, r2
+	.loc 2 843 0
+	ldr	r4, .L1329
+	adds	r2, r0, r1
+.LVL1108:
+	.loc 2 835 0
 	.pad #108
 	sub	sp, sp, #108
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 786 0
-	.loc 2 794 0
-	ldr	r4, .L1305
-	.loc 2 786 0
+.LCFI152:
+	.loc 2 835 0
 	mov	r8, r0
-	str	r2, [fp, #-136]
-	.loc 2 794 0
-	add	r2, r0, r1
-.LVL1105:
-	.loc 2 786 0
 	mov	r6, r1
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	r3, [r4, #72]
 	cmp	r2, r3
-	.loc 2 795 0
-	mvnhi	r9, #0
-	.loc 2 794 0
-	bhi	.L1296
-	.loc 2 791 0
+	bhi	.L1325
+	.loc 2 840 0
 	ldrh	r7, [r4, #84]
 	mov	r9, #0
 	lsr	r7, r0, r7
-.LVL1106:
-	lsl	r10, r7, #2
-.LVL1107:
-.L1298:
-	.loc 2 797 0
-	cmp	r6, #0
-	bne	.L1303
-.L1296:
-	.loc 2 820 0
+.LVL1109:
+	lsl	fp, r7, #2
+.LVL1110:
+.L1319:
+	.loc 2 846 0
+	cbnz	r6, .L1324
+.L1317:
+	.loc 2 869 0
 	mov	r0, r9
-	sub	sp, fp, #40
-.LCFI354:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1108:
-.L1303:
-.LCFI355:
-	.loc 2 798 0
+	add	sp, sp, #108
+.LCFI153:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL1111:
+.L1324:
+.LCFI154:
+	.loc 2 847 0
 	ldr	r3, [r4, #3844]
-.LVL1109:
-	.loc 2 799 0
+	.loc 2 848 0
 	mov	r0, r8
-	.loc 2 798 0
-	ldr	r2, [r3, r10]
-.LVL1110:
-	.loc 2 799 0
+	.loc 2 847 0
+	ldr	r2, [r3, fp]
+.LVL1112:
+	.loc 2 848 0
 	ldrh	r3, [r4, #34]
-	.loc 2 798 0
-	str	r2, [fp, #-148]
-	.loc 2 799 0
+	.loc 2 847 0
+	str	r2, [sp, #12]
+	.loc 2 848 0
 	mov	r1, r3
-	str	r3, [fp, #-144]
+	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1111:
-	.loc 2 800 0
-	ldr	r3, [fp, #-144]
-	.loc 2 801 0
-	ldr	r2, [fp, #-148]
-.LVL1112:
-	.loc 2 799 0
-	str	r1, [fp, #-140]
-	.loc 2 800 0
-	sub	r5, r3, r1
 .LVL1113:
-	uxth	r5, r5
+	.loc 2 849 0
+	ldr	r3, [sp, #8]
+	.loc 2 850 0
+	ldr	r2, [sp, #12]
 .LVL1114:
-	.loc 2 801 0
+	.loc 2 848 0
+	str	r1, [sp, #4]
+	.loc 2 849 0
+	subs	r5, r3, r1
+.LVL1115:
+	uxth	r5, r5
+.LVL1116:
+	.loc 2 850 0
 	cmp	r6, r5
-	.loc 2 802 0
+	.loc 2 851 0
+	it	cc
 	uxthcc	r5, r6
-	.loc 2 803 0
-	cmp	r2, #0
-	cmpne	r5, r3
-	movne	r1, #1
-	moveq	r1, #0
-	beq	.L1300
-	.loc 2 805 0
+	.loc 2 852 0
+	cbz	r2, .L1321
+	.loc 2 852 0 is_stmt 0 discriminator 1
+	cmp	r5, r3
+	beq	.L1321
+	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r4, #3808]
-	.loc 2 807 0
-	sub	r0, fp, #128
-	.loc 2 804 0
-	str	r2, [fp, #-124]
-	.loc 2 807 0
-	mov	r2, #1
-.LVL1115:
+	.loc 2 856 0
+	add	r0, sp, #20
+	.loc 2 853 0
+	str	r2, [sp, #24]
+	.loc 2 856 0
+	movs	r2, #1
+.LVL1117:
 	mov	r1, r2
-	.loc 2 805 0
-	str	r3, [fp, #-120]
-	.loc 2 806 0
-	sub	r3, fp, #108
-	str	r3, [fp, #-116]
-	.loc 2 807 0
+	.loc 2 854 0
+	str	r3, [sp, #28]
+	.loc 2 855 0
+	add	r3, sp, #40
+	str	r3, [sp, #32]
+	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1116:
-.L1301:
-	.loc 2 811 0
-	lsl	r3, r5, #9
+.LVL1118:
+.L1322:
+	.loc 2 860 0
+	lsls	r3, r5, #9
 	ldr	r0, [r4, #3808]
-	ldr	r1, [fp, #-136]
-	.loc 2 815 0
-	sub	r6, r6, r5
-	.loc 2 811 0
+	mov	r1, r10
 	mov	r2, r3
-	str	r3, [fp, #-144]
-	ldr	r3, [fp, #-140]
-	.loc 2 816 0
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #4]
+	.loc 2 864 0
+	subs	r6, r6, r5
+	.loc 2 865 0
 	add	r8, r8, r5
-	add	r10, r10, #4
-	.loc 2 811 0
+	add	fp, fp, #4
+	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1117:
-	.loc 2 812 0
-	ldr	r2, [r4, #3808]
+.LVL1119:
+	.loc 2 861 0
 	mov	r1, r7
-	ldr	r0, .L1305+4
-	.loc 2 814 0
-	add	r7, r7, #1
-	.loc 2 812 0
+	ldr	r2, [r4, #3808]
+	ldr	r0, .L1329+4
+	.loc 2 863 0
+	adds	r7, r7, #1
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1118:
-	.loc 2 817 0
-	ldr	r2, [fp, #-136]
-.LVL1119:
-	.loc 2 813 0
-	cmn	r0, #1
-	.loc 2 817 0
-	ldr	r3, [fp, #-144]
-	.loc 2 813 0
-	mvneq	r9, #0
-	.loc 2 817 0
-	add	r3, r2, r3
 .LVL1120:
-	str	r3, [fp, #-136]
-	b	.L1298
+	.loc 2 866 0
+	ldr	r3, [sp, #8]
+	.loc 2 862 0
+	adds	r0, r0, #1
+	it	eq
+	moveq	r9, #-1
+	.loc 2 866 0
+	add	r10, r10, r3
+	b	.L1319
 .LVL1121:
-.L1300:
-	.loc 2 809 0
+.L1321:
+	.loc 2 858 0
 	ldrh	r2, [r4, #86]
 .LVL1122:
+	movs	r1, #0
 	ldr	r0, [r4, #3808]
 	bl	ftl_memset
 .LVL1123:
-	b	.L1301
-.L1306:
+	b	.L1322
+.LVL1124:
+.L1325:
+	.loc 2 844 0
+	mov	r9, #-1
+	b	.L1317
+.L1330:
 	.align	2
-.L1305:
+.L1329:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3908
-.LFE203:
+.LFE213:
 	.fnend
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.align	2
+	.align	1
 	.global	Ftl_save_ext_data
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 	.fnstart
-.LFB226:
-	.loc 2 2110 0
+.LFB236:
+	.loc 2 2159 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI356:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI357:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI358:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2110 0
-	.loc 2 2111 0
-	ldr	r3, .L1309
-	ldr	r2, .L1309+4
-	ldr	r1, [r3, #2616]
-	cmp	r1, r2
-	ldmfdne	sp, {fp, sp, pc}
-.LBB476:
-.LBB477:
-	.loc 2 2112 0
-	ldr	r2, .L1309+8
-	.loc 2 2125 0
-	mov	r1, #1
-	mov	r0, #0
-	.loc 2 2112 0
-	str	r2, [r3, #2620]
-	.loc 2 2113 0
-	ldr	r2, [r3, #2464]
-	str	r2, [r3, #2704]
-	.loc 2 2114 0
-	ldr	r2, [r3, #2468]
-	str	r2, [r3, #2708]
-	.loc 2 2115 0
-	ldr	r2, [r3, #2460]
-	str	r2, [r3, #2624]
-	.loc 2 2116 0
-	ldr	r2, [r3, #2448]
-	str	r2, [r3, #2628]
-	.loc 2 2117 0
-	ldr	r2, [r3, #2440]
-	str	r2, [r3, #2632]
-	.loc 2 2118 0
-	ldr	r2, [r3, #2456]
-	str	r2, [r3, #2636]
-	.loc 2 2119 0
-	ldr	r2, [r3, #2484]
-	str	r2, [r3, #2644]
-	.loc 2 2120 0
-	ldr	r2, [r3, #2492]
-	str	r2, [r3, #2648]
-	.loc 2 2121 0
-	ldr	r2, [r3, #2444]
-	str	r2, [r3, #2652]
-	.loc 2 2122 0
-	ldr	r2, [r3, #2452]
-	str	r2, [r3, #2656]
-	.loc 2 2123 0
-	ldr	r2, [r3, #2496]
-	str	r2, [r3, #2660]
-	.loc 2 2124 0
-	ldr	r2, [r3, #2500]
-	str	r2, [r3, #2664]
-	.loc 2 2125 0
-	ldr	r2, .L1309+12
-	bl	FtlVendorPartWrite
-.LVL1124:
-	ldmfd	sp, {fp, sp, pc}
-.L1310:
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 2160 0
+	ldr	r2, .L1333
+	ldr	r3, .L1333+4
+	ldr	r1, [r2, #2612]
+	cmp	r1, r3
+	bne	.L1331
+.LBB499:
+.LBB500:
+	.loc 2 2161 0
+	ldr	r3, .L1333+8
+	.loc 2 2174 0
+	addw	r2, r2, #2612
+	movs	r1, #1
+	movs	r0, #0
+	.loc 2 2161 0
+	str	r3, [r2, #4]
+	.loc 2 2162 0
+	ldr	r3, [r2, #-104]
+	str	r3, [r2, #88]
+	.loc 2 2163 0
+	ldr	r3, [r2, #-100]
+	str	r3, [r2, #92]
+	.loc 2 2164 0
+	ldr	r3, [r2, #-108]
+	str	r3, [r2, #8]
+	.loc 2 2165 0
+	ldr	r3, [r2, #-120]
+	str	r3, [r2, #12]
+	.loc 2 2166 0
+	ldr	r3, [r2, #-128]
+	str	r3, [r2, #16]
+	.loc 2 2167 0
+	ldr	r3, [r2, #-112]
+	str	r3, [r2, #20]
+	.loc 2 2168 0
+	ldr	r3, [r2, #-84]
+	str	r3, [r2, #28]
+	.loc 2 2169 0
+	ldr	r3, [r2, #-76]
+	str	r3, [r2, #32]
+	.loc 2 2170 0
+	ldr	r3, [r2, #-124]
+	str	r3, [r2, #36]
+	.loc 2 2171 0
+	ldr	r3, [r2, #-116]
+	str	r3, [r2, #40]
+	.loc 2 2172 0
+	ldr	r3, [r2, #-72]
+	str	r3, [r2, #44]
+	.loc 2 2173 0
+	ldr	r3, [r2, #-68]
+	str	r3, [r2, #48]
+	.loc 2 2174 0
+	b	FtlVendorPartWrite
+.LVL1125:
+.L1331:
+	bx	lr
+.L1334:
 	.align	2
-.L1309:
+.L1333:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177344
-	.word	.LANCHOR0+2616
-.LBE477:
-.LBE476:
-.LFE226:
+	.word	1342177348
+.LBE500:
+.LBE499:
+.LFE236:
 	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.align	2
+	.align	1
 	.global	FtlEctTblFlush
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 	.fnstart
-.LFB205:
-	.loc 2 861 0
+.LFB215:
+	.loc 2 910 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1125:
-	.movsp ip
-	mov	ip, sp
-.LCFI359:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI360:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI361:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 861 0
-	.loc 2 864 0
-	ldr	r2, .L1316
-	ldrh	r3, [r2]
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1126:
+	.loc 2 913 0
+	ldr	r2, .L1340
+	.loc 2 910 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI155:
+	.loc 2 913 0
+	ldrh	r3, [r2, #-240]
 	cmp	r3, #31
-	.loc 2 865 0
+	.loc 2 914 0
+	itett	ls
 	addls	r3, r3, #1
-	.loc 2 862 0
+	.loc 2 911 0
 	movhi	r2, #32
-.LVL1126:
-	.loc 2 865 0
-	strhls	r3, [r2]	@ movhi
 .LVL1127:
-	.loc 2 866 0
-	movls	r2, #1
+	.loc 2 914 0
+	strhls	r3, [r2, #-240]	@ movhi
 .LVL1128:
-	.loc 2 868 0
-	cmp	r0, #0
-	ldr	r3, .L1316+4
-	bne	.L1313
-	.loc 2 868 0 is_stmt 0 discriminator 1
+	.loc 2 915 0
+	movls	r2, #1
+.LVL1129:
+	ldr	r3, .L1340+4
+	.loc 2 917 0
+	cbnz	r0, .L1337
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r3, #3820]
 	ldr	r0, [r1, #20]
-.LVL1129:
+.LVL1130:
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
-.LVL1130:
-	cmp	r1, r2
-	bcc	.L1314
 .LVL1131:
-.L1313:
-	.loc 2 870 0 is_stmt 1
-	ldr	r2, [r3, #3820]
+	cmp	r1, r2
+	bcc	.L1338
 .LVL1132:
-	.loc 2 875 0
-	mov	r0, #64
+.L1337:
+	.loc 2 919 0 is_stmt 1
+	ldr	r2, [r3, #3820]
 .LVL1133:
-	.loc 2 870 0
+	.loc 2 924 0
+	movs	r0, #64
+.LVL1134:
+	.loc 2 919 0
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	.loc 2 871 0
-	ldr	r1, .L1316+8
+	.loc 2 920 0
+	ldr	r1, .L1340+8
 	str	r1, [r2]
-	.loc 2 872 0
-	movw	r1, #3812
-	ldrh	r1, [r3, r1]
+	.loc 2 921 0
+	ldrh	r1, [r3, #3812]
 	ldr	r2, [r3, #3820]
-	lsl	r3, r1, #9
+	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	r3, [r2, #8]
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 874 0
-	mov	r3, #0
+	.loc 2 923 0
+	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 875 0
+	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1134:
-	.loc 2 876 0
-	bl	Ftl_save_ext_data
 .LVL1135:
-.L1314:
-	.loc 2 878 0
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.L1317:
+	.loc 2 925 0
+	bl	Ftl_save_ext_data
+.LVL1136:
+.L1338:
+	.loc 2 927 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1341:
 	.align	2
-.L1316:
-	.word	.LANCHOR3-4080
+.L1340:
+	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
-.LFE205:
+.LFE215:
 	.fnend
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.align	2
+	.align	1
 	.global	FtlVendorPartRead
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 	.fnstart
-.LFB204:
-	.loc 2 823 0
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1136:
-	.movsp ip
-	mov	ip, sp
-.LCFI362:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI363:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI364:
-	.pad #108
-	sub	sp, sp, #108
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 823 0
-	.loc 2 832 0
-	ldr	r5, .L1327
-	.loc 2 823 0
-	mov	r9, r2
-	.loc 2 832 0
-	add	r2, r0, r1
+.LFB214:
+	.loc 2 872 0
+	@ args = 0, pretend = 0, frame = 96
+	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL1137:
-	.loc 2 823 0
-	mov	r7, r0
-	mov	r6, r1
-	.loc 2 832 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI156:
+	mov	r10, r2
+	.loc 2 881 0
+	ldr	r5, .L1351
+	adds	r2, r0, r1
+.LVL1138:
+	.loc 2 872 0
+	.pad #100
+	sub	sp, sp, #100
+.LCFI157:
+	.loc 2 872 0
+	mov	r8, r0
+	mov	r7, r1
+	.loc 2 881 0
 	ldrh	r3, [r5, #72]
 	cmp	r2, r3
-	.loc 2 833 0
-	mvnhi	r8, #0
-	.loc 2 832 0
-	bhi	.L1318
-	.loc 2 828 0
-	ldrh	r3, [r5, #84]
-	mov	r8, #0
-	lsr	r3, r0, r3
-.LVL1138:
-	lsl	r3, r3, #2
+	bhi	.L1350
+	.loc 2 877 0
+	ldrh	r6, [r5, #84]
+	mov	r9, #0
+	lsr	r6, r0, r6
 .LVL1139:
-	str	r3, [fp, #-136]
+	lsls	r6, r6, #2
 .LVL1140:
-.L1320:
-	.loc 2 834 0
-	cmp	r6, #0
-	bne	.L1325
-.L1318:
-	.loc 2 857 0
-	mov	r0, r8
-	sub	sp, fp, #40
-.LCFI365:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1344:
+	.loc 2 883 0
+	cbnz	r7, .L1349
+.L1342:
+	.loc 2 906 0
+	mov	r0, r9
+	add	sp, sp, #100
+.LCFI158:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL1141:
-.L1325:
-.LCFI366:
-	.loc 2 836 0
+.L1349:
+.LCFI159:
+	.loc 2 884 0
+	ldr	r3, [r5, #3844]
+	.loc 2 885 0
+	mov	r0, r8
 	ldrh	r4, [r5, #34]
 .LVL1142:
-	mov	r0, r7
-	.loc 2 835 0
-	ldr	r3, [r5, #3844]
-	ldr	r2, [fp, #-136]
-	.loc 2 836 0
+	.loc 2 884 0
+	ldr	r3, [r3, r6]
+.LVL1143:
+	.loc 2 885 0
 	mov	r1, r4
-	.loc 2 835 0
-	ldr	r10, [r3, r2]
-	.loc 2 836 0
+	.loc 2 884 0
+	str	r3, [sp, #4]
+	.loc 2 885 0
 	bl	__aeabi_uidivmod
-.LVL1143:
-	.loc 2 837 0
-	sub	r4, r4, r1
-	str	r1, [fp, #-144]
-	uxth	r4, r4
 .LVL1144:
-	.loc 2 838 0
-	cmp	r6, r4
-	.loc 2 839 0
-	uxthcc	r4, r6
-	.loc 2 840 0
-	cmp	r10, #0
-	lsl	r3, r4, #9
-	str	r3, [fp, #-140]
-	beq	.L1322
-	.loc 2 842 0
-	ldr	r2, [r5, #3808]
-	.loc 2 843 0
-	sub	r3, fp, #108
-	.loc 2 844 0
-	sub	r0, fp, #128
-	.loc 2 843 0
-	str	r3, [fp, #-116]
-	.loc 2 841 0
-	str	r10, [fp, #-124]
-	.loc 2 842 0
-	str	r2, [fp, #-120]
-	.loc 2 844 0
-	mov	r2, #1
+	.loc 2 886 0
+	subs	r4, r4, r1
+	.loc 2 887 0
+	ldr	r3, [sp, #4]
+.LVL1145:
+	.loc 2 886 0
+	uxth	r4, r4
+.LVL1146:
+	.loc 2 885 0
+	str	r1, [sp]
+	.loc 2 887 0
+	cmp	r7, r4
+	.loc 2 888 0
+	it	cc
+	uxthcc	r4, r7
+	lsl	fp, r4, #9
+	.loc 2 889 0
+	cbz	r3, .L1346
+	.loc 2 890 0
+	str	r3, [sp, #16]
+	.loc 2 893 0
+	movs	r2, #1
+	.loc 2 891 0
+	ldr	r3, [r5, #3808]
+.LVL1147:
+	.loc 2 893 0
 	mov	r1, r2
+	add	r0, sp, #12
+	.loc 2 891 0
+	str	r3, [sp, #20]
+	.loc 2 892 0
+	add	r3, sp, #32
+	str	r3, [sp, #24]
+	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1145:
-	.loc 2 847 0
+.LVL1148:
+	.loc 2 894 0
+	ldr	r3, [sp, #12]
+	.loc 2 896 0
+	mov	r2, fp
 	ldr	r1, [r5, #3808]
-	mov	r0, r9
-	ldr	r3, [fp, #-144]
-	.loc 2 845 0
-	ldr	r2, [fp, #-128]
-	.loc 2 847 0
+	mov	r0, r10
+	.loc 2 895 0
+	adds	r3, r3, #1
+	.loc 2 896 0
+	ldr	r3, [sp]
+	.loc 2 895 0
+	it	eq
+	moveq	r9, #-1
+	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
-	.loc 2 846 0
-	cmn	r2, #1
-	.loc 2 847 0
-	lsl	r2, r4, #9
-	.loc 2 846 0
-	mvneq	r8, #0
-	.loc 2 847 0
 	bl	ftl_memcpy
-.LVL1146:
-.L1324:
-	.loc 2 854 0
-	ldr	r3, [fp, #-140]
-	.loc 2 852 0
-	sub	r6, r6, r4
-	.loc 2 853 0
-	add	r7, r7, r4
-	.loc 2 854 0
-	add	r9, r9, r3
-	ldr	r3, [fp, #-136]
-	add	r3, r3, #4
-	str	r3, [fp, #-136]
-	b	.L1320
-.L1322:
-	.loc 2 849 0
-	lsl	r2, r4, #9
-	mov	r1, r10
-	mov	r0, r9
+.LVL1149:
+.L1348:
+	.loc 2 901 0
+	subs	r7, r7, r4
+	.loc 2 902 0
+	add	r8, r8, r4
+	.loc 2 903 0
+	add	r10, r10, fp
+	adds	r6, r6, #4
+	b	.L1344
+.LVL1150:
+.L1346:
+	.loc 2 898 0
+	mov	r2, fp
+	mov	r1, r3
+	mov	r0, r10
 	bl	ftl_memset
-.LVL1147:
-	b	.L1324
-.L1328:
+.LVL1151:
+	b	.L1348
+.LVL1152:
+.L1350:
+	.loc 2 882 0
+	mov	r9, #-1
+	b	.L1342
+.L1352:
 	.align	2
-.L1327:
+.L1351:
 	.word	.LANCHOR0
-.LFE204:
+.LFE214:
 	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.align	2
+	.align	1
 	.global	FtlLoadEctTbl
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 	.fnstart
-.LFB211:
-	.loc 2 1334 0
+.LFB221:
+	.loc 2 1383 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI367:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI368:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI369:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1334 0
-	.loc 2 1335 0
-	movw	r5, #3812
-	mov	r0, #64
-	ldr	r4, .L1331
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI160:
+	.loc 2 1384 0
+	movs	r0, #64
+	ldr	r4, .L1355
 	ldr	r2, [r4, #3820]
-	ldrh	r1, [r4, r5]
+	ldrh	r1, [r4, #3812]
 	bl	FtlVendorPartRead
-.LVL1148:
-	.loc 2 1336 0
+.LVL1153:
+	.loc 2 1385 0
 	ldr	r3, [r4, #3820]
 	ldr	r2, [r3]
-	ldr	r3, .L1331+4
+	ldr	r3, .L1355+4
 	cmp	r2, r3
-	beq	.L1330
-.LBB480:
-.LBB481:
-	.loc 2 1338 0
-	ldr	r1, .L1331+8
-	ldr	r0, .L1331+12
+	beq	.L1354
+.LBB503:
+.LBB504:
+	.loc 2 1387 0
+	ldr	r1, .L1355+8
+	ldr	r0, .L1355+12
 	bl	printk
-.LVL1149:
-	.loc 2 1339 0
-	ldrh	r2, [r4, r5]
-	mov	r1, #0
+.LVL1154:
+	.loc 2 1388 0
+	ldrh	r2, [r4, #3812]
+	movs	r1, #0
 	ldr	r0, [r4, #3820]
-	lsl	r2, r2, #9
+	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1150:
-.L1330:
-.LBE481:
-.LBE480:
-	.loc 2 1344 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1332:
+.LVL1155:
+.L1354:
+.LBE504:
+.LBE503:
+	.loc 2 1393 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1356:
 	.align	2
-.L1331:
+.L1355:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC96
+	.word	.LC99
 	.word	.LC71
-.LFE211:
+.LFE221:
 	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.align	2
+	.align	1
 	.global	Ftl_load_ext_data
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 	.fnstart
-.LFB227:
-	.loc 2 2130 0
+.LFB237:
+	.loc 2 2179 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI370:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI371:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI372:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2130 0
-	.loc 2 2131 0
-	mov	r1, #1
-	mov	r0, #0
-	ldr	r4, .L1336
-	ldr	r2, .L1336+4
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI161:
+	.loc 2 2180 0
+	movs	r1, #1
+	ldr	r4, .L1360
+	movs	r0, #0
+	.loc 2 2181 0
+	ldr	r5, .L1360+4
+	.loc 2 2180 0
+	addw	r2, r4, #2612
 	bl	FtlVendorPartRead
-.LVL1151:
-	.loc 2 2132 0
-	ldr	r5, .L1336+8
-	ldr	r3, [r4, #2616]
+.LVL1156:
+	.loc 2 2181 0
+	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	beq	.L1334
-.LBB487:
-.LBB488:
-.LBB489:
+	beq	.L1358
+.LBB510:
+.LBB511:
+.LBB512:
 	.loc 1 202 0
 	mov	r1, #512
-	ldr	r0, .L1336+4
+	addw	r0, r4, #2612
 	bl	__memzero
-.LVL1152:
-.LBE489:
-.LBE488:
-.LBE487:
-	.loc 2 2134 0
-	str	r5, [r4, #2616]
-.L1334:
-	.loc 2 2137 0
-	ldr	r3, [r4, #2616]
+.LVL1157:
+.LBE512:
+.LBE511:
+.LBE510:
+	.loc 2 2183 0
+	str	r5, [r4, #2612]
+.L1358:
+	.loc 2 2186 0
+	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	bne	.L1335
-	.loc 2 2138 0
+	bne	.L1359
+	.loc 2 2187 0
+	ldr	r3, [r4, #2700]
+	str	r3, [r4, #2508]
+	.loc 2 2188 0
 	ldr	r3, [r4, #2704]
-	str	r3, [r4, #2464]
-	.loc 2 2139 0
-	ldr	r3, [r4, #2708]
-	str	r3, [r4, #2468]
-	.loc 2 2140 0
+	str	r3, [r4, #2512]
+	.loc 2 2189 0
+	ldr	r3, [r4, #2620]
+	str	r3, [r4, #2504]
+	.loc 2 2190 0
 	ldr	r3, [r4, #2624]
-	str	r3, [r4, #2460]
-	.loc 2 2141 0
+	str	r3, [r4, #2492]
+	.loc 2 2191 0
 	ldr	r3, [r4, #2628]
-	str	r3, [r4, #2448]
-	.loc 2 2142 0
+	str	r3, [r4, #2484]
+	.loc 2 2192 0
 	ldr	r3, [r4, #2632]
-	str	r3, [r4, #2440]
-	.loc 2 2143 0
-	ldr	r3, [r4, #2636]
-	str	r3, [r4, #2456]
-	.loc 2 2144 0
+	str	r3, [r4, #2500]
+	.loc 2 2193 0
+	ldr	r3, [r4, #2640]
+	str	r3, [r4, #2528]
+	.loc 2 2194 0
 	ldr	r3, [r4, #2644]
-	str	r3, [r4, #2484]
-	.loc 2 2145 0
+	str	r3, [r4, #2536]
+	.loc 2 2195 0
 	ldr	r3, [r4, #2648]
-	str	r3, [r4, #2492]
-	.loc 2 2146 0
+	str	r3, [r4, #2488]
+	.loc 2 2196 0
 	ldr	r3, [r4, #2652]
-	str	r3, [r4, #2444]
-	.loc 2 2147 0
+	str	r3, [r4, #2496]
+	.loc 2 2197 0
 	ldr	r3, [r4, #2656]
-	str	r3, [r4, #2452]
-	.loc 2 2148 0
+	str	r3, [r4, #2540]
+	.loc 2 2198 0
 	ldr	r3, [r4, #2660]
-	str	r3, [r4, #2496]
-	.loc 2 2149 0
-	ldr	r3, [r4, #2664]
-	str	r3, [r4, #2500]
-.L1335:
-	.loc 2 2152 0
+	str	r3, [r4, #2544]
+.L1359:
+	.loc 2 2201 0
 	ldrh	r2, [r4, #68]
-	ldr	r3, [r4, #2484]
-	ldr	r0, [r4, #2480]
+	ldr	r3, [r4, #2528]
+	ldr	r0, [r4, #2524]
 	ldrh	r1, [r4, #16]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1153:
-	str	r0, [r4, #2488]
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1337:
+.LVL1158:
+	str	r0, [r4, #2532]
+	pop	{r3, r4, r5, pc}
+.L1361:
 	.align	2
-.L1336:
+.L1360:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2616
 	.word	1179929683
-.LFE227:
+.LFE237:
 	.fnend
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.align	2
+	.align	1
 	.global	FtlVpcTblFlush
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	.fnstart
-.LFB209:
-	.loc 2 1004 0
+.LFB219:
+	.loc 2 1053 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI373:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI374:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI375:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1004 0
-	.loc 2 1016 0
-	mov	r6, #0
-	.loc 2 1047 0
-	mov	r1, #255
-	.loc 2 1010 0
-	ldr	r4, .L1350
-	.loc 2 1013 0
-	ldr	r5, .L1350+4
-	.loc 2 1075 0
-	ldr	r10, .L1350+8
-	.loc 2 1010 0
-	ldr	r3, [r4, #2244]
-	.loc 2 1011 0
-	ldr	r7, [r4, #3244]
-	.loc 2 1021 0
-	sub	r8, r5, #52
-	.loc 2 1056 0
-	add	r9, r5, #668
-	.loc 2 1010 0
-	str	r3, [r4, #3232]
-	.loc 2 1013 0
-	movw	r3, #2556
-	ldrh	r3, [r4, r3]
-	.loc 2 1011 0
-	str	r7, [r4, #3236]
-	.loc 2 1017 0
-	str	r6, [r7, #12]
-	.loc 2 1013 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1014 0
-	ldr	r3, .L1350+12
-	strh	r3, [r7]	@ movhi
-	.loc 2 1015 0
-	ldr	r3, [r4, #2564]
-	.loc 2 1016 0
-	str	r6, [r7, #8]
-	.loc 2 1015 0
-	str	r3, [r7, #4]
-	.loc 2 1019 0
-	ldr	r3, .L1350+16
-	str	r3, [r4, #2504]
-	.loc 2 1020 0
-	ldr	r3, .L1350+20
-	str	r3, [r4, #2508]
-	.loc 2 1021 0
-	ldrh	r3, [r5, #6]
-	strh	r3, [r5, #-44]	@ movhi
-	.loc 2 1022 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
+.LCFI162:
+	.loc 2 1065 0
+	movs	r5, #0
+	.loc 2 1059 0
+	ldr	r4, .L1374
+	.loc 2 1096 0
+	movs	r1, #255
+	.loc 2 1054 0
+	movw	r7, #65535
+.LVL1159:
+	.loc 2 1124 0
+	ldr	r9, .L1374+16
+	.loc 2 1059 0
+	ldr	r3, [r4, #3240]
+	.loc 2 1105 0
+	addw	r8, r4, #3220
+	.loc 2 1060 0
+	ldr	r6, [r4, #3244]
+	.loc 2 1124 0
+	ldr	r10, .L1374+20
+	.loc 2 1059 0
+	str	r3, [r4, #3228]
+	.loc 2 1062 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1060 0
+	str	r6, [r4, #3232]
+	.loc 2 1066 0
+	str	r5, [r6, #12]
+	.loc 2 1062 0
+	strh	r3, [r6, #2]	@ movhi
+	.loc 2 1063 0
+	movw	r3, #61604
+	strh	r3, [r6]	@ movhi
+	.loc 2 1064 0
+	ldr	r3, [r4, #2560]
+	.loc 2 1065 0
+	str	r5, [r6, #8]
+	.loc 2 1074 0
+	ldrh	r2, [r4, #2326]
+	.loc 2 1064 0
+	str	r3, [r6, #4]
+	.loc 2 1068 0
+	ldr	r3, .L1374+4
+	str	r3, [r4, #2244]
+	.loc 2 1069 0
+	ldr	r3, .L1374+8
+	str	r3, [r4, #2248]
+	.loc 2 1070 0
+	ldrh	r3, [r4, #2558]
+	strh	r3, [r4, #2252]	@ movhi
+	.loc 2 1071 0
 	ldrh	r3, [r4, #30]
-	strb	r3, [r4, #2514]
-	.loc 2 1024 0
-	movw	r3, #2280
-	ldrh	r3, [r4, r3]
-	strh	r3, [r5, #-38]	@ movhi
-	.loc 2 1025 0
-	sub	r3, r5, #276
-	ldrh	r2, [r3, #2]
-	ldrb	r3, [r4, #2286]	@ zero_extendqisi2
+	strb	r3, [r4, #2254]
+	.loc 2 1073 0
+	ldrh	r3, [r4, #2324]
+	strh	r3, [r4, #2258]	@ movhi
+	.loc 2 1074 0
+	ldrb	r3, [r4, #2330]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1029 0
-	ldrh	r2, [r5, #-226]
-	.loc 2 1025 0
-	strh	r3, [r5, #-36]	@ movhi
-	.loc 2 1026 0
-	ldrb	r3, [r4, #2288]	@ zero_extendqisi2
-	strb	r3, [r4, #2515]
-	.loc 2 1028 0
-	movw	r3, #2328
-	ldrh	r3, [r4, r3]
-	strh	r3, [r5, #-34]	@ movhi
-	.loc 2 1029 0
-	ldrb	r3, [r4, #2334]	@ zero_extendqisi2
+	.loc 2 1078 0
+	ldrh	r2, [r4, #2374]
+	.loc 2 1074 0
+	strh	r3, [r4, #2260]	@ movhi
+	.loc 2 1075 0
+	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
+	strb	r3, [r4, #2255]
+	.loc 2 1077 0
+	ldrh	r3, [r4, #2372]
+	strh	r3, [r4, #2262]	@ movhi
+	.loc 2 1078 0
+	ldrb	r3, [r4, #2378]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	strh	r3, [r5, #-32]	@ movhi
-	.loc 2 1030 0
-	ldrb	r3, [r4, #2336]	@ zero_extendqisi2
-	strb	r3, [r4, #2516]
-	.loc 2 1032 0
-	movw	r3, #2376
-	ldrh	r3, [r4, r3]
-	strh	r3, [r5, #-30]	@ movhi
-	.loc 2 1033 0
-	ldrh	r2, [r5, #-178]
-	ldrb	r3, [r4, #2382]	@ zero_extendqisi2
-	.loc 2 1047 0
-	ldr	r0, [r4, #3232]
-	.loc 2 1033 0
+	strh	r3, [r4, #2264]	@ movhi
+	.loc 2 1079 0
+	ldrb	r3, [r4, #2380]	@ zero_extendqisi2
+	strb	r3, [r4, #2256]
+	.loc 2 1081 0
+	ldrh	r3, [r4, #2420]
+	.loc 2 1082 0
+	ldrh	r2, [r4, #2422]
+	.loc 2 1096 0
+	ldr	r0, [r4, #3228]
+	.loc 2 1081 0
+	strh	r3, [r4, #2266]	@ movhi
+	.loc 2 1082 0
+	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1047 0
+	.loc 2 1096 0
 	ldrh	r2, [r4, #86]
-	.loc 2 1033 0
-	strh	r3, [r5, #-28]	@ movhi
-	.loc 2 1034 0
-	ldrb	r3, [r4, #2384]	@ zero_extendqisi2
-	strb	r3, [r4, #2517]
-	.loc 2 1036 0
-	ldr	r3, [r4, #2480]
-	str	r3, [r4, #2536]
-	.loc 2 1041 0
-	ldr	r3, [r4, #2472]
-	str	r3, [r4, #2544]
-	.loc 2 1042 0
-	ldr	r3, [r4, #2476]
-	str	r3, [r4, #2540]
-	.loc 2 1047 0
+	.loc 2 1082 0
+	strh	r3, [r4, #2268]	@ movhi
+	.loc 2 1083 0
+	ldrb	r3, [r4, #2428]	@ zero_extendqisi2
+	strb	r3, [r4, #2257]
+	.loc 2 1085 0
+	ldr	r3, [r4, #2524]
+	str	r3, [r4, #2276]
+	.loc 2 1090 0
+	ldr	r3, [r4, #2516]
+	str	r3, [r4, #2284]
+	.loc 2 1091 0
+	ldr	r3, [r4, #2520]
+	str	r3, [r4, #2280]
+	.loc 2 1096 0
 	bl	ftl_memset
-.LVL1154:
-	.loc 2 1048 0
-	mov	r1, r8
-	mov	r2, #48
-	ldr	r0, [r4, #3232]
-	.loc 2 1005 0
-	movw	r8, #65535
-.LVL1155:
-	.loc 2 1048 0
+.LVL1160:
+	.loc 2 1097 0
+	movs	r2, #48
+	addw	r1, r4, #2244
+	ldr	r0, [r4, #3228]
 	bl	ftl_memcpy
-.LVL1156:
-	.loc 2 1049 0
+.LVL1161:
+	.loc 2 1098 0
 	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #3232]
-	ldr	r1, [r4, #2260]
-	lsl	r2, r2, #1
-	add	r0, r0, #48
+	ldr	r0, [r4, #3228]
+	ldr	r1, [r4, #2300]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
 	bl	ftl_memcpy
-.LVL1157:
-	.loc 2 1050 0
+.LVL1162:
+	.loc 2 1099 0
 	ldrh	r0, [r4, #16]
-	ldr	r3, [r4, #3232]
+	ldr	r3, [r4, #3228]
 	ldr	r1, [r4]
-	lsr	r2, r0, #3
-	add	r0, r0, #24
-	lsl	r0, r0, #1
-	add	r2, r2, #4
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	adds	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r3, r0
+	add	r0, r0, r3
 	bl	ftl_memcpy
-.LVL1158:
-	.loc 2 1051 0
-	mov	r0, r6
+.LVL1163:
+	.loc 2 1100 0
+	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.LVL1159:
-.L1339:
-	.loc 2 1053 0
-	ldr	r3, [r4, #2244]
-	.loc 2 1056 0
-	mov	r0, r9
-	.loc 2 1055 0
-	ldrh	r2, [r5]
-	.loc 2 1053 0
-	str	r3, [r4, #3232]
-	.loc 2 1054 0
+.LVL1164:
+.L1363:
+	.loc 2 1102 0
+	ldr	r3, [r4, #3240]
+	.loc 2 1105 0
+	mov	r0, r8
+	.loc 2 1104 0
+	ldrh	r2, [r4, #2552]
+	.loc 2 1102 0
+	str	r3, [r4, #3228]
+	.loc 2 1103 0
 	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3236]
-	.loc 2 1055 0
-	ldrh	r3, [r5, #2]
+	str	r3, [r4, #3232]
+	.loc 2 1104 0
+	ldrh	r3, [r4, #2554]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3228]
-	.loc 2 1056 0
-	mov	r3, #1
+	str	r3, [r4, #3224]
+	.loc 2 1105 0
+	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1160:
-	.loc 2 1057 0
+.LVL1165:
+	.loc 2 1106 0
 	ldrh	r3, [r4, #80]
-	ldrh	r2, [r5, #2]
-	sub	r3, r3, #1
+	ldrh	r2, [r4, #2554]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1340
-	.loc 2 1059 0
-	ldrh	r3, [r5]
-	.loc 2 1058 0
-	ldrh	r8, [r5, #4]
-	.loc 2 1059 0
-	strh	r3, [r5, #4]	@ movhi
-	.loc 2 1060 0
-	mov	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1061 0
+	blt	.L1364
+	.loc 2 1108 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1107 0
+	ldrh	r7, [r4, #2556]
+	.loc 2 1108 0
+	strh	r3, [r4, #2556]	@ movhi
+	.loc 2 1109 0
+	movs	r3, #0
+	strh	r3, [r4, #2554]	@ movhi
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1161:
-	.loc 2 1066 0
-	ldr	r3, [r4, #2472]
-	.loc 2 1061 0
-	strh	r0, [r5]	@ movhi
-	.loc 2 1066 0
-	add	r2, r3, #1
-	str	r3, [r4, #2564]
-	str	r2, [r4, #2472]
-	.loc 2 1067 0
-	lsl	r2, r0, #10
-	str	r2, [r4, #3228]
-	.loc 2 1068 0
-	str	r3, [r7, #4]
-	.loc 2 1070 0
-	mov	r3, #1
-	.loc 2 1069 0
-	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1070 0
+.LVL1166:
+	.loc 2 1115 0
+	ldr	r3, [r4, #2516]
+	.loc 2 1110 0
+	strh	r0, [r4, #2552]	@ movhi
+	.loc 2 1115 0
+	adds	r2, r3, #1
+	str	r3, [r4, #2560]
+	str	r2, [r4, #2516]
+	.loc 2 1116 0
+	lsls	r2, r0, #10
+	str	r2, [r4, #3224]
+	.loc 2 1117 0
+	str	r3, [r6, #4]
+	.loc 2 1119 0
+	movs	r3, #1
+	.loc 2 1118 0
+	strh	r0, [r6, #2]	@ movhi
+	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	mov	r0, r9
+	mov	r0, r8
 	bl	FlashProgPages
-.LVL1162:
-.L1340:
-	.loc 2 1072 0
-	ldrh	r3, [r5, #2]
-	.loc 2 1073 0
-	ldr	r2, [r4, #3224]
-	.loc 2 1072 0
-	add	r3, r3, #1
+.LVL1167:
+.L1364:
+	.loc 2 1121 0
+	ldrh	r3, [r4, #2554]
+	.loc 2 1122 0
+	ldr	r2, [r4, #3220]
+	.loc 2 1121 0
+	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1073 0
-	cmn	r2, #1
-	.loc 2 1072 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1073 0
-	bne	.L1341
-	.loc 2 1075 0
+	.loc 2 1122 0
+	adds	r2, r2, #1
+	.loc 2 1121 0
+	strh	r3, [r4, #2554]	@ movhi
+	.loc 2 1122 0
+	bne	.L1365
+	.loc 2 1124 0
 	cmp	r3, #1
-	bne	.L1342
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	movw	r2, #1075
-	mov	r1, r10
-	ldr	r0, .L1350+24
+	bne	.L1366
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	movw	r2, #1124
+	mov	r1, r9
+	mov	r0, r10
 	bl	printk
-.LVL1163:
-.L1342:
-	.loc 2 1076 0 is_stmt 1
-	ldrh	r3, [r5, #2]
-	.loc 2 1078 0
-	add	r6, r6, #1
-.LVL1164:
-	uxth	r6, r6
-.LVL1165:
-	.loc 2 1076 0
+.LVL1168:
+.L1366:
+	.loc 2 1125 0 is_stmt 1
+	ldrh	r3, [r4, #2554]
+	.loc 2 1127 0
+	adds	r5, r5, #1
+.LVL1169:
+	uxth	r5, r5
+.LVL1170:
+	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1077 0
+	.loc 2 1126 0
+	ittt	eq
 	ldrheq	r3, [r4, #80]
-	subeq	r3, r3, #1
-	strheq	r3, [r5, #2]	@ movhi
-	.loc 2 1079 0
-	cmp	r6, #3
-	bls	.L1339
-	.loc 2 1080 0
-	mov	r2, r6
-	ldr	r1, [r4, #3228]
-	ldr	r0, .L1350+28
-	bl	printk
-.LVL1166:
-.L1345:
-	b	.L1345
-.L1341:
-	.loc 2 1086 0
+	addeq	r3, r3, #-1
+	strheq	r3, [r4, #2554]	@ movhi
+	.loc 2 1128 0
+	cmp	r5, #3
+	bls	.L1363
+	.loc 2 1129 0
+	mov	r2, r5
+	ldr	r1, [r4, #3224]
+	ldr	r0, .L1374+12
+	bl	printk
+.LVL1171:
+.L1369:
+	b	.L1369
+.L1365:
+	.loc 2 1135 0
 	cmp	r3, #1
-	beq	.L1339
-	.loc 2 1089 0
+	beq	.L1363
+	.loc 2 1138 0
 	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1346
-	.loc 2 1090 0
-	mov	r1, #1
-	mov	r0, r8
+	cmp	r7, r3
+	beq	.L1370
+	.loc 2 1139 0
+	movs	r1, #1
+	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL1167:
-.L1346:
-	.loc 2 1092 0
-	mov	r0, #0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1351:
+.LVL1172:
+.L1370:
+	.loc 2 1141 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.LVL1173:
+.L1375:
 	.align	2
-.L1350:
+.L1374:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2556
-	.word	.LANCHOR1+454
-	.word	-3932
 	.word	1179929683
-	.word	1342177344
+	.word	1342177348
+	.word	.LC100
+	.word	.LANCHOR1+454
 	.word	.LC1
-	.word	.LC97
-.LFE209:
+.LFE219:
 	.fnend
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.align	2
+	.align	1
 	.global	FtlVpcCheckAndModify
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 	.fnstart
-.LFB229:
-	.loc 2 2192 0
+.LFB239:
+	.loc 2 2242 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI376:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI377:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI378:
-	.pad #8
-	sub	sp, sp, #8
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2192 0
-	.loc 2 2198 0
-	ldr	r4, .L1364
-	.loc 2 2199 0
-	mov	r5, #0
-.LVL1168:
-	.loc 2 2197 0
-	ldr	r1, .L1364+4
-	ldr	r0, .L1364+8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
+	.save {r4, r5, r6, r7, r8, r9, lr}
+	.pad #12
+.LCFI163:
+	.loc 2 2249 0
+	movs	r5, #0
+.LVL1174:
+	.loc 2 2248 0
+	ldr	r4, .L1388
+	.loc 2 2247 0
+	ldr	r1, .L1388+4
+	ldr	r0, .L1388+8
 	bl	printk
-.LVL1169:
-	.loc 2 2198 0
+.LVL1175:
+	.loc 2 2248 0
 	ldrh	r2, [r4, #18]
-	mov	r1, #0
+	movs	r1, #0
 	ldr	r0, [r4, #3824]
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1170:
-.L1353:
-	.loc 2 2199 0 discriminator 1
-	ldr	r3, [r4, #2436]
+.LVL1176:
+.L1377:
+	.loc 2 2249 0 discriminator 1
+	ldr	r3, [r4, #2480]
 	cmp	r5, r3
-	bcc	.L1355
-	.loc 2 2209 0 discriminator 1
-	ldr	r8, .L1364+12
-	mov	r6, #0
-	.loc 2 2210 0 discriminator 1
-	ldr	r9, .L1364+16
-.LVL1171:
-.L1356:
-	.loc 2 2206 0 discriminator 1
+	bcc	.L1379
+	.loc 2 2259 0 discriminator 1
+	ldr	r9, .L1388+12
+	movs	r7, #0
+	.loc 2 2257 0 discriminator 1
+	movw	r8, #65535
+.LVL1177:
+.L1380:
+	.loc 2 2256 0 discriminator 1
 	ldrh	r3, [r4, #16]
-	uxth	r5, r6
-.LVL1172:
+	uxth	r5, r7
+.LVL1178:
 	cmp	r3, r5
-	bhi	.L1360
-	.loc 2 2218 0
-	sub	sp, fp, #36
-.LCFI379:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL1173:
-.L1355:
-.LCFI380:
-	.loc 2 2200 0
-	mov	r2, #0
-	sub	r1, fp, #40
+	bhi	.L1384
+	.loc 2 2268 0
+	add	sp, sp, #12
+.LCFI164:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, pc}
+.LVL1179:
+.L1379:
+.LCFI165:
+	.loc 2 2250 0
+	movs	r2, #0
+	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1174:
-	.loc 2 2201 0
-	ldr	r0, [fp, #-40]
-	cmn	r0, #1
-	beq	.L1354
-	.loc 2 2202 0
+.LVL1180:
+	.loc 2 2251 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1378
+	.loc 2 2252 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1175:
-	.loc 2 2203 0
+.LVL1181:
+	.loc 2 2253 0
 	ldr	r2, [r4, #3824]
-	lsl	r0, r0, #1
-	ldrh	r3, [r2, r0]
-	add	r3, r3, #1
-	strh	r3, [r2, r0]	@ movhi
-.L1354:
-	.loc 2 2199 0 discriminator 2
-	add	r5, r5, #1
-	b	.L1353
-.LVL1176:
-.L1360:
-	.loc 2 2207 0
-	uxth	r1, r6
-	ldr	r3, [r4, #2260]
-	movw	r0, #65535
-	lsl	r7, r1, #1
-	ldrh	r2, [r3, r7]
+	ldrh	r3, [r2, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r0, lsl #1]	@ movhi
+.L1378:
+	.loc 2 2249 0 discriminator 2
+	adds	r5, r5, #1
+	b	.L1377
+.LVL1182:
+.L1384:
+	.loc 2 2257 0
+	ldr	r3, [r4, #2300]
+	uxth	r6, r7
+	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4, #3824]
-	ldrh	r3, [r3, r7]
-	cmp	r2, r0
-	cmpne	r2, r3
-	beq	.L1358
-	.loc 2 2209 0
-	mov	r0, r8
+	ldrh	r3, [r3, r6, lsl #1]
+	cmp	r2, r3
+	beq	.L1382
+	.loc 2 2257 0 is_stmt 0 discriminator 1
+	cmp	r2, r8
+	beq	.L1382
+	.loc 2 2259 0 is_stmt 1
+	mov	r1, r6
+	mov	r0, r9
 	bl	printk
-.LVL1177:
-	.loc 2 2210 0
-	ldrh	r3, [r9]
+.LVL1183:
+	.loc 2 2260 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r5
-	beq	.L1358
-	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1364+20
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L1358
-	.loc 2 2210 0 discriminator 2
-	ldrh	r3, [r3, #-48]
+	beq	.L1382
+	.loc 2 2260 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r5
-	beq	.L1358
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1382
+	.loc 2 2260 0 discriminator 2
+	ldrh	r3, [r4, #2372]
+	cmp	r3, r5
+	beq	.L1382
+	.loc 2 2261 0 is_stmt 1
 	ldr	r3, [r4, #3824]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2211 0
-	ldrh	r2, [r3, r7]
-	ldr	r3, [r4, #2260]
-	strh	r2, [r3, r7]	@ movhi
-	.loc 2 2212 0
+	.loc 2 2261 0
+	ldrh	r2, [r3, r6, lsl #1]
+	ldr	r3, [r4, #2300]
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1178:
-	.loc 2 2213 0
+.LVL1184:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1179:
-	.loc 2 2214 0
+.LVL1185:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1180:
-.L1358:
-	add	r6, r6, #1
-	b	.L1356
-.L1365:
+.LVL1186:
+.L1382:
+	adds	r7, r7, #1
+	b	.L1380
+.L1389:
 	.align	2
-.L1364:
+.L1388:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC87
-	.word	.LC98
-	.word	.LANCHOR0+2280
-	.word	.LANCHOR0+2376
-.LFE229:
+	.word	.LC90
+	.word	.LC101
+.LFE239:
 	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
-	.align	2
+	.align	1
 	.global	allocate_new_data_superblock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 	.fnstart
-.LFB239:
-	.loc 2 2631 0
+.LFB249:
+	.loc 2 2679 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1181:
-	.movsp ip
-	mov	ip, sp
-.LCFI381:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI382:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI383:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2631 0
-	mov	r7, r0
-	.loc 2 2633 0
-	ldr	r5, .L1376
-	.loc 2 2632 0
-	ldrh	r4, [r0]
-.LVL1182:
-	.loc 2 2633 0
-	ldrh	r3, [r5, #16]
-	cmp	r3, r4
-	bcs	.L1367
-	.loc 2 2633 0 is_stmt 0 discriminator 1
-	movw	r2, #2633
-	ldr	r1, .L1376+4
-	ldr	r0, .L1376+8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1187:
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI166:
+	.loc 2 2679 0
+	mov	r6, r0
+	.loc 2 2681 0
+	ldr	r4, .L1400
+	.loc 2 2680 0
+	ldrh	r5, [r0]
+.LVL1188:
+	.loc 2 2681 0
+	ldrh	r3, [r4, #16]
+	cmp	r3, r5
+	bcs	.L1391
+	.loc 2 2681 0 is_stmt 0 discriminator 1
+	movw	r2, #2681
+	ldr	r1, .L1400+4
+	ldr	r0, .L1400+8
 	bl	printk
-.LVL1183:
-.L1367:
-	.loc 2 2635 0 is_stmt 1
+.LVL1189:
+.L1391:
+	.loc 2 2683 0 is_stmt 1
 	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L1368
-	.loc 2 2636 0
-	ldr	r2, [r5, #2260]
-	lsl	r3, r4, #1
-	.loc 2 2637 0
-	mov	r0, r4
-	.loc 2 2636 0
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1369
-	.loc 2 2637 0
+	cmp	r5, r3
+	beq	.L1392
+	.loc 2 2684 0
+	ldr	r3, [r4, #2300]
+	.loc 2 2685 0
+	mov	r0, r5
+	.loc 2 2684 0
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L1393
+	.loc 2 2685 0
 	bl	INSERT_DATA_LIST
-.LVL1184:
-.L1368:
-	.loc 2 2641 0
-	mov	r3, #1
-	.loc 2 2642 0
-	movw	r2, #65535
-	.loc 2 2641 0
-	strb	r3, [r7, #8]
-	.loc 2 2642 0
-	ldr	r3, .L1376+12
-	ldrh	r0, [r3]
-	mov	r6, r3
-	cmp	r0, r2
-	beq	.L1370
-	.loc 2 2643 0
-	cmp	r4, r0
-	bne	.L1371
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r2, [r5, #2260]
-	lsl	r3, r0, #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1372
-.L1371:
-	.loc 2 2644 0 is_stmt 1
+.LVL1190:
+.L1392:
+	.loc 2 2690 0
+	ldrh	r0, [r4, #3952]
+	.loc 2 2689 0
+	movs	r3, #1
+	strb	r3, [r6, #8]
+	.loc 2 2690 0
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1394
+	.loc 2 2691 0
+	cmp	r5, r0
+	bne	.L1395
+	.loc 2 2691 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1396
+.L1395:
+	.loc 2 2692 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1185:
-.L1372:
-	.loc 2 2645 0
-	mvn	r3, #0
-	strh	r3, [r6]	@ movhi
-.L1370:
-	.loc 2 2647 0
-	mov	r0, r7
+.LVL1191:
+.L1396:
+	.loc 2 2693 0
+	movw	r3, #65535
+	strh	r3, [r4, #3952]	@ movhi
+.L1394:
+	.loc 2 2695 0
+	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1186:
-	.loc 2 2648 0
+.LVL1192:
+	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1187:
-	.loc 2 2649 0
-	mov	r0, #0
+.LVL1193:
+	.loc 2 2697 0
+	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1188:
-	.loc 2 2650 0
+.LVL1194:
+	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1189:
-	.loc 2 2652 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1369:
-	.loc 2 2639 0
+.LVL1195:
+	.loc 2 2700 0
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL1196:
+.L1393:
+	.loc 2 2687 0
 	bl	INSERT_FREE_LIST
-.LVL1190:
-	b	.L1368
-.L1377:
+.LVL1197:
+	b	.L1392
+.L1401:
 	.align	2
-.L1376:
+.L1400:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
-	.word	.LANCHOR0+3952
-.LFE239:
+.LFE249:
 	.fnend
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.align	2
+	.align	1
 	.global	FtlProgPages
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
 	.fnstart
-.LFB155:
-	.loc 3 902 0
+.LFB165:
+	.loc 3 904 0
 	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1191:
-	.movsp ip
-	mov	ip, sp
-.LCFI384:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI385:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI386:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1198:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI167:
+	.loc 3 913 0
+	movs	r7, #0
+.LVL1199:
+	ldr	r6, .L1416
+	.loc 3 904 0
 	.pad #20
 	sub	sp, sp, #20
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 902 0
-	ldr	r6, .L1392
-	.loc 3 911 0
-	mov	r7, #0
-.LVL1192:
-	.loc 3 931 0
-	ldr	r10, .L1392+4
-	.loc 3 902 0
+.LCFI168:
+	.loc 3 904 0
 	mov	r4, r3
-	.loc 3 909 0
-	mov	r2, #0
-.LVL1193:
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1194:
-	.loc 3 902 0
+	.loc 3 911 0
+	movs	r2, #0
+.LVL1200:
+	.loc 3 933 0
+	ldr	r10, .L1416+8
+	.loc 3 904 0
 	mov	r5, r0
+	.loc 3 933 0
+	ldr	fp, .L1416+12
+	.loc 3 904 0
 	mov	r9, r1
-	.loc 3 909 0
+	.loc 3 911 0
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+.LVL1201:
 	bl	FlashProgPages
-.LVL1195:
-.L1379:
-	.loc 3 911 0 discriminator 1
+.LVL1202:
+.L1403:
+	.loc 3 913 0 discriminator 1
 	cmp	r7, r9
-	beq	.L1386
-	.loc 3 917 0
+	beq	.L1410
+	.loc 3 919 0
 	mov	r8, #0
-	b	.L1387
-.LVL1196:
-.L1382:
-	.loc 3 913 0
+	b	.L1411
+.LVL1203:
+.L1406:
+	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1197:
-	.loc 3 914 0
+.LVL1204:
+	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1380
-	.loc 3 915 0
-	ldr	r1, [r6, #2260]
-	lsl	r3, r3, #1
+	bne	.L1404
+	.loc 3 917 0
+	ldr	r1, [r6, #2300]
 	ldrh	r0, [r4, #4]
-	ldrh	r2, [r1, r3]
-	sub	r2, r2, r0
-	strh	r2, [r1, r3]	@ movhi
-	.loc 3 916 0
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 3 918 0
 	ldrh	r3, [r6, #78]
-	.loc 3 917 0
+	.loc 3 919 0
 	strb	r8, [r4, #6]
-	.loc 3 918 0
+	.loc 3 920 0
 	strh	r8, [r4, #4]	@ movhi
-	.loc 3 916 0
+	.loc 3 918 0
 	strh	r3, [r4, #2]	@ movhi
-.L1380:
-	.loc 3 920 0
+.L1404:
+	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1381
-	.loc 3 921 0
+	cbnz	r3, .L1405
+	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1198:
-.L1381:
-	.loc 3 924 0
-	ldr	r3, [r6, #2712]
-	add	r3, r3, #1
-	str	r3, [r6, #2712]
-	.loc 3 925 0
+.LVL1205:
+.L1405:
+	.loc 3 926 0
+	ldr	r3, [r6, #2708]
+	adds	r3, r3, #1
+	str	r3, [r6, #2708]
+	.loc 3 927 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1199:
-	.loc 3 926 0
+.LVL1206:
+	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1200:
-	.loc 3 928 0
-	mov	r2, #0
-	.loc 3 927 0
+.LVL1207:
+	.loc 3 930 0
+	movs	r2, #0
+	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 926 0
-	str	r0, [fp, #-48]
 	.loc 3 928 0
-	mov	r1, #1
+	str	r0, [sp, #12]
+	.loc 3 930 0
+	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1201:
-.L1387:
-	.loc 3 912 0
+.LVL1208:
+.L1411:
+	.loc 3 914 0
 	ldr	r3, [r5]
-.LVL1202:
-	cmn	r3, #1
-	beq	.L1382
-	.loc 3 931 0
+.LVL1209:
+	adds	r3, r3, #1
+	beq	.L1406
+	.loc 3 933 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
 	cmp	r2, r3
-	bcc	.L1383
-	.loc 3 931 0 is_stmt 0 discriminator 1
-	movw	r2, #931
+	bcc	.L1407
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	movw	r2, #933
 	mov	r1, r10
-	ldr	r0, .L1392+8
+	mov	r0, fp
 	bl	printk
-.LVL1203:
-.L1383:
-	.loc 3 932 0 is_stmt 1
+.LVL1210:
+.L1407:
+	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
-	sub	r1, fp, #44
-	.loc 3 933 0
-	mov	r2, #1
+	add	r1, sp, #16
+	.loc 3 935 0
+	movs	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 932 0
+	.loc 3 934 0
 	str	r3, [r1, #-4]!
-.LVL1204:
-	.loc 3 933 0
-	bl	log2phys
-.LVL1205:
+.LVL1211:
 	.loc 3 935 0
+	bl	log2phys
+.LVL1212:
+	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
-.LVL1206:
-	.loc 3 937 0
+.LVL1213:
+	.loc 3 939 0
 	ubfx	r0, r3, #10, #16
-	str	r3, [fp, #-56]
+	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
-.LVL1207:
-	.loc 3 938 0
-	ldr	r3, [fp, #-56]
-.LVL1208:
-	.loc 3 937 0
+.LVL1214:
+	.loc 3 940 0
+	ldr	r3, [sp, #4]
+.LVL1215:
+	.loc 3 939 0
 	mov	r8, r0
-	.loc 3 938 0
-	cmn	r3, #1
-	beq	.L1384
 	.loc 3 940 0
-	ldr	r2, [r6, #2260]
-	lsl	r3, r0, #1
-.LVL1209:
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	bne	.L1385
-	.loc 3 941 0
+	adds	r3, r3, #1
+	beq	.L1408
+	.loc 3 942 0
+	ldr	r3, [r6, #2300]
+.LVL1216:
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1409
+	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1392+12
+	ldr	r0, .L1416+4
 	bl	printk
-.LVL1210:
-.L1385:
-	.loc 3 942 0
+.LVL1217:
+.L1409:
+	.loc 3 944 0
 	mov	r0, r8
 	bl	decrement_vpc_count
-.LVL1211:
-.L1384:
-	.loc 3 911 0 discriminator 2
-	add	r7, r7, #1
-	add	r5, r5, #20
-	b	.L1379
-.LVL1212:
-.L1386:
-	.loc 3 946 0
+.LVL1218:
+.L1408:
+	.loc 3 913 0 discriminator 2
+	adds	r7, r7, #1
+	adds	r5, r5, #20
+	b	.L1403
+.LVL1219:
+.L1410:
+	.loc 3 948 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
-.LVL1213:
+.LVL1220:
 	cmp	r2, r3
-	bcc	.L1378
-	.loc 3 946 0 is_stmt 0 discriminator 1
-	movw	r2, #946
-	ldr	r1, .L1392+4
-	ldr	r0, .L1392+8
+	bcc	.L1402
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	mov	r2, #948
+	ldr	r1, .L1416+8
+	ldr	r0, .L1416+12
 	bl	printk
-.LVL1214:
-.L1378:
-	.loc 3 947 0 is_stmt 1
-	sub	sp, fp, #40
-.LCFI387:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1215:
-.L1393:
+.LVL1221:
+.L1402:
+	.loc 3 949 0 is_stmt 1
+	add	sp, sp, #20
+.LCFI169:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL1222:
+.L1417:
 	.align	2
-.L1392:
+.L1416:
 	.word	.LANCHOR0
+	.word	.LC102
 	.word	.LANCHOR1+519
 	.word	.LC1
-	.word	.LC99
-.LFE155:
+.LFE165:
 	.fnend
 	.size	FtlProgPages, .-FtlProgPages
-	.align	2
+	.align	1
 	.global	FtlCacheWriteBack
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
 	.fnstart
-.LFB156:
-	.loc 3 950 0
+.LFB166:
+	.loc 3 952 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI388:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI389:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI390:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 950 0
-	.loc 3 951 0
-	ldr	r4, .L1399
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI170:
+	.loc 3 953 0
+	ldr	r4, .L1423
 	ldr	r0, [r4, #3948]
-	cmp	r0, #0
-	beq	.L1395
-	.loc 3 952 0
-	ldr	r3, .L1399+4
-	mov	r2, #0
-	mov	r1, #1
-	ldr	r3, [r3, #-4076]
+	cbz	r0, .L1419
+	.loc 3 954 0
+	ldr	r3, .L1423+4
+	movs	r2, #0
+	movs	r1, #1
+	ldr	r3, [r3, #-236]
 	bl	FtlProgPages
-.LVL1216:
-	.loc 3 953 0
-	mov	r3, #0
+.LVL1223:
+	.loc 3 955 0
+	movs	r3, #0
 	str	r3, [r4, #3948]
-.L1395:
-	.loc 3 956 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1400:
+.L1419:
+	.loc 3 958 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1424:
 	.align	2
-.L1399:
+.L1423:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE156:
+.LFE166:
 	.fnend
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.align	2
+	.align	1
 	.global	FtlSysFlush
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
 	.fnstart
-.LFB152:
+.LFB162:
 	.loc 3 797 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI391:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI392:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI393:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 797 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI171:
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1217:
+.LVL1224:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1218:
+.LVL1225:
 	.loc 3 800 0
-	mov	r0, #1
+	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1219:
+.LVL1226:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1220:
+.LVL1227:
 	.loc 3 803 0
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.LFE152:
+	movs	r0, #0
+	pop	{r3, pc}
+.LFE162:
 	.fnend
 	.size	FtlSysFlush, .-FtlSysFlush
-	.align	2
+	.align	1
 	.global	sftl_deinit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_deinit, %function
 sftl_deinit:
 	.fnstart
-.LFB153:
+.LFB163:
 	.loc 3 806 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI394:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI395:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI396:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 806 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.save {r3, lr}
+.LCFI172:
 	.loc 3 807 0
-	ldr	r3, .L1404
+	ldr	r3, .L1428
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1403
+	bne	.L1427
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1221:
-.L1403:
+.LVL1228:
+.L1427:
 	.loc 3 810 0
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.L1405:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1429:
 	.align	2
-.L1404:
+.L1428:
 	.word	.LANCHOR2
-.LFE153:
+.LFE163:
 	.fnend
 	.size	sftl_deinit, .-sftl_deinit
-	.align	2
+	.align	1
 	.global	FtlDiscard
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlDiscard, %function
 FtlDiscard:
 	.fnstart
-.LFB158:
-	.loc 3 1154 0
+.LFB168:
+	.loc 3 1157 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1222:
-	.movsp ip
-	mov	ip, sp
-.LCFI397:
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, fp, ip, lr}
-.LCFI398:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI399:
-	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 1154 0
-	.loc 3 1161 0
-	ldr	r6, .L1421
-	add	r2, r0, r1
-	.loc 3 1154 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1229:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	.pad #8
+.LCFI173:
+.LVL1230:
+	.loc 3 1164 0
+	adds	r2, r0, r1
+	ldr	r6, .L1445
+	.loc 3 1157 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1161 0
+	.loc 3 1164 0
 	ldr	r3, [r6, #116]
 	cmp	r2, r3
-	.loc 3 1162 0
-	mvnhi	r0, #0
-.LVL1223:
-	.loc 3 1161 0
-	bhi	.L1406
-	.loc 3 1164 0
-	cmp	r1, #31
-	bhi	.L1408
-.LVL1224:
-.L1413:
-	.loc 3 1165 0
-	mov	r0, #0
-.L1406:
-	.loc 3 1198 0
-	sub	sp, fp, #32
-.LCFI400:
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL1225:
-.L1408:
-.LCFI401:
+	bhi	.L1438
 	.loc 3 1167 0
+	cmp	r1, #31
+	bhi	.L1432
+.LVL1231:
+.L1437:
+	.loc 3 1168 0
+	movs	r0, #0
+.L1430:
+	.loc 3 1201 0
+	add	sp, sp, #8
+.LCFI174:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1232:
+.L1432:
+.LCFI175:
+	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1226:
-	.loc 3 1169 0
+.LVL1233:
+	.loc 3 1172 0
 	ldrh	r4, [r6, #34]
 	mov	r0, r7
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1227:
-	.loc 3 1170 0
+.LVL1234:
+	.loc 3 1173 0
 	smulbb	r3, r0, r4
-	.loc 3 1169 0
-	mov	r8, r0
-.LVL1228:
-	.loc 3 1170 0
-	sub	r7, r7, r3
-.LVL1229:
-	uxth	r7, r7
-.LVL1230:
-	.loc 3 1171 0
-	cmp	r7, #0
-	beq	.L1409
 	.loc 3 1172 0
-	sub	r4, r4, r7
+	mov	r8, r0
+.LVL1235:
 	.loc 3 1173 0
+	subs	r7, r7, r3
+.LVL1236:
+	uxth	r7, r7
+.LVL1237:
+	.loc 3 1174 0
+	cbz	r7, .L1433
+	.loc 3 1175 0
+	subs	r4, r4, r7
+	.loc 3 1176 0
 	add	r8, r0, #1
-	.loc 3 1172 0
+	.loc 3 1175 0
 	cmp	r4, r5
+	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1174 0
-	sub	r5, r5, r4
-.L1409:
-	.loc 3 1181 0
-	ldr	r4, .L1421+4
 	.loc 3 1177 0
-	mvn	r3, #0
-	str	r3, [fp, #-40]
-.LVL1231:
-.L1410:
-	.loc 3 1178 0
+	subs	r5, r5, r4
+.L1433:
+	.loc 3 1184 0
+	ldr	r4, .L1445+4
+	.loc 3 1180 0
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.LVL1238:
+.L1434:
+	.loc 3 1181 0
 	ldrh	r3, [r6, #34]
 	cmp	r5, r3
-	bcs	.L1412
-	.loc 3 1191 0
-	ldr	r3, .L1421+4
-	ldr	r2, [r3, #-4072]
-	cmp	r2, #32
-	bls	.L1413
-	.loc 3 1193 0
-	mov	r4, #0
-	str	r4, [r3, #-4072]
+	bcs	.L1436
 	.loc 3 1194 0
+	ldr	r3, .L1445+4
+	ldr	r2, [r3, #-232]
+	cmp	r2, #32
+	bls	.L1437
+	.loc 3 1196 0
+	movs	r4, #0
+	str	r4, [r3, #-232]
+	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1232:
-	.loc 3 1195 0
+.LVL1239:
+	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1233:
-	b	.L1413
-.L1412:
-	.loc 3 1179 0
-	mov	r2, #0
-	sub	r1, fp, #44
+.LVL1240:
+	b	.L1437
+.L1436:
+	.loc 3 1182 0
+	movs	r2, #0
+	mov	r1, sp
 	mov	r0, r8
 	bl	log2phys
-.LVL1234:
-	.loc 3 1180 0
-	ldr	r3, [fp, #-44]
-	cmn	r3, #1
-	beq	.L1411
-	.loc 3 1181 0
-	ldr	r3, [r4, #-4072]
+.LVL1241:
 	.loc 3 1183 0
-	mov	r2, #1
-	sub	r1, fp, #40
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+.LVL1242:
+	beq	.L1435
+	.loc 3 1184 0
+	ldr	r3, [r4, #-232]
+.LVL1243:
+	.loc 3 1186 0
+	movs	r2, #1
+	add	r1, sp, #4
 	mov	r0, r8
-	.loc 3 1181 0
-	add	r3, r3, #1
-	str	r3, [r4, #-4072]
-	.loc 3 1182 0
-	ldr	r3, [r6, #2444]
-	add	r3, r3, #1
-	str	r3, [r6, #2444]
-	.loc 3 1183 0
-	bl	log2phys
-.LVL1235:
 	.loc 3 1184 0
-	ldr	r0, [fp, #-44]
-.LVL1236:
+	adds	r3, r3, #1
+	str	r3, [r4, #-232]
+	.loc 3 1185 0
+	ldr	r3, [r6, #2488]
+	adds	r3, r3, #1
+	str	r3, [r6, #2488]
+	.loc 3 1186 0
+	bl	log2phys
+.LVL1244:
+	.loc 3 1187 0
+	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
-.LVL1237:
 	bl	P2V_block_in_plane
-.LVL1238:
-	.loc 3 1185 0
-	bl	decrement_vpc_count
-.LVL1239:
-.L1411:
+.LVL1245:
 	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1246:
+.L1435:
+	.loc 3 1191 0
 	ldrh	r3, [r6, #34]
-	.loc 3 1187 0
+.LVL1247:
+	.loc 3 1190 0
 	add	r8, r8, #1
-	.loc 3 1188 0
-	sub	r5, r5, r3
-	b	.L1410
-.L1422:
+	.loc 3 1191 0
+	subs	r5, r5, r3
+	b	.L1434
+.LVL1248:
+.L1438:
+	.loc 3 1165 0
+	mov	r0, #-1
+	b	.L1430
+.L1446:
 	.align	2
-.L1421:
+.L1445:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE158:
+.LFE168:
 	.fnend
 	.size	FtlDiscard, .-FtlDiscard
-	.align	2
+	.align	1
 	.global	FtlGcFreeTempBlock
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
 	.fnstart
-.LFB248:
+.LFB258:
 	.loc 5 112 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1240:
-	.movsp ip
-	mov	ip, sp
-.LCFI402:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI403:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI404:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1249:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	sub	sp, sp, #12
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 112 0
-	.loc 5 115 0
-	ldr	r4, .L1449
+.LCFI176:
+.LVL1250:
 	.loc 5 119 0
-	movw	r3, #2376
 	movw	r2, #65535
-	ldrh	r5, [r4, r3]
+	.loc 5 115 0
+	ldr	r4, .L1473
+	.loc 5 119 0
+	ldrh	r5, [r4, #2420]
 	.loc 5 115 0
 	ldrh	r1, [r4, #78]
-.LVL1241:
+.LVL1251:
 	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1424
-.LVL1242:
-.L1434:
+	bne	.L1448
+.LVL1252:
+.L1458:
+	.loc 5 153 0
+	ldrh	r2, [r4, #2420]
 	.loc 5 152 0
-	mov	r3, #0
+	movs	r3, #0
 	str	r3, [r4, #3960]
 	.loc 5 153 0
-	movw	r3, #2376
-	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1447
-.L1425:
+	bne	.L1471
+.L1449:
 	.loc 5 154 0
-	mov	r0, #0
-.LVL1243:
-.L1423:
+	movs	r0, #0
+.L1447:
 	.loc 5 199 0
-	sub	sp, fp, #40
-.LCFI405:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1244:
-.L1424:
-.LCFI406:
+	add	sp, sp, #12
+.LCFI177:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL1253:
+.L1448:
+.LCFI178:
 	.loc 5 121 0
-	cmp	r0, #0
-	beq	.L1427
+	cbz	r0, .L1451
 	.loc 5 123 0
-	ldr	r3, .L1449+4
+	ldr	r3, .L1473+4
 	ldrh	r0, [r3, #4]
-.LVL1245:
+.LVL1254:
 	cmp	r0, r2
-	beq	.L1428
-.L1429:
+	beq	.L1452
+.L1453:
 	.loc 5 122 0
-	mov	r1, #2
-.LVL1246:
-.L1427:
+	movs	r1, #2
+.LVL1255:
+.L1451:
 	.loc 5 131 0
-	ldr	r0, .L1449+8
-.LVL1247:
+	ldr	r0, .L1473+8
+.LVL1256:
 	bl	FtlGcScanTempBlk
-.LVL1248:
-	.loc 5 132 0
-	cmn	r0, #1
-	.loc 5 131 0
-	str	r0, [fp, #-48]
-.LVL1249:
+.LVL1257:
+	str	r0, [sp, #4]
+.LVL1258:
 	.loc 5 132 0
-	beq	.L1430
+	adds	r0, r0, #1
+	beq	.L1454
 	.loc 5 135 0
-	ldr	r2, [r4, #2248]
-	lsl	r5, r5, #1
-	ldrh	r3, [r2, r5]
+	ldr	r2, [r4, #2304]
+	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1431
+	bls	.L1455
 	.loc 5 136 0
-	sub	r3, r3, #5
+	subs	r3, r3, #5
 	.loc 5 137 0
-	mov	r0, #1
+	movs	r0, #1
 	.loc 5 136 0
-	strh	r3, [r2, r5]	@ movhi
+	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1250:
-.L1431:
+.LVL1259:
+.L1455:
 	.loc 5 139 0
 	ldr	r3, [r4, #3960]
-	cmp	r3, #0
-	bne	.L1432
+	cbnz	r3, .L1456
 	.loc 5 140 0
-	ldr	r3, [r4, #2712]
+	ldr	r3, [r4, #2708]
 	.loc 5 141 0
-	ldr	r0, [fp, #-48]
+	ldr	r0, [sp, #4]
 	.loc 5 140 0
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
 	.loc 5 140 0
-	str	r3, [r4, #2712]
+	str	r3, [r4, #2708]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1251:
+.LVL1260:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1252:
-.L1432:
+.LVL1261:
+.L1456:
 	.loc 5 144 0
-	mov	r3, #0
+	movs	r3, #0
 	str	r3, [r4, #3960]
-.L1443:
+.L1467:
 	.loc 5 149 0
-	mov	r0, #1
-	b	.L1423
-.LVL1253:
-.L1428:
+	movs	r0, #1
+	b	.L1447
+.LVL1262:
+.L1452:
 	.loc 5 124 0
-	mov	r2, #0
+	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	.loc 5 125 0
-	movw	r3, #2276
-	ldrh	r3, [r4, r3]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #17
-	bhi	.L1429
-	b	.L1427
-.LVL1254:
-.L1430:
+	bhi	.L1453
+	b	.L1451
+.LVL1263:
+.L1454:
 	.loc 5 148 0
-	ldr	r3, .L1449+4
+	ldr	r3, .L1473+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1443
-	b	.L1434
-.LVL1255:
-.L1447:
+	bne	.L1467
+	b	.L1458
+.LVL1264:
+.L1471:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1256:
+.LVL1265:
 	.loc 5 162 0
-	movw	r3, #3180
-	ldrb	r1, [r4, #2383]	@ zero_extendqisi2
-	ldrh	r2, [r4, r3]
+	ldrb	r1, [r4, #2427]	@ zero_extendqisi2
 	ldrh	r3, [r4, #78]
-	mul	r3, r3, r1
+	ldrh	r2, [r4, #3176]
+	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1435
+	beq	.L1459
 	.loc 5 162 0 is_stmt 0 discriminator 1
-	mov	r2, #162
-	ldr	r1, .L1449+12
-	ldr	r0, .L1449+16
+	movs	r2, #162
+	ldr	r1, .L1473+12
+	ldr	r0, .L1473+16
 	bl	printk
-.LVL1257:
-.L1435:
+.LVL1266:
+.L1459:
 	.loc 5 163 0 is_stmt 1
-	ldrb	r2, [r4, #2383]	@ zero_extendqisi2
-	movw	r3, #2376
-	ldrh	r0, [r4, #78]
+	ldrb	r3, [r4, #2427]	@ zero_extendqisi2
 	.loc 5 165 0
-	mov	r6, #0
+	movs	r6, #0
 	.loc 5 163 0
-	ldrh	r3, [r4, r3]
-	ldr	r1, [r4, #2260]
-	.loc 5 165 0
-	ldr	r9, .L1449+20
+	ldrh	r0, [r4, #78]
+	.loc 5 166 0
+	mov	r9, #12
+	.loc 5 163 0
+	ldr	r2, [r4, #2300]
+	ldrh	r1, [r4, #2420]
+	.loc 5 168 0
+	ldr	r10, .L1473+12
 	.loc 5 163 0
-	smulbb	r2, r2, r0
+	smulbb	r3, r3, r0
 	.loc 5 168 0
-	ldr	r10, .L1449+12
+	ldr	fp, .L1473+16
 	.loc 5 163 0
-	lsl	r3, r3, #1
-	strh	r2, [r1, r3]	@ movhi
+	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 5 164 0
-	movw	r3, #3180
-	ldr	r2, [r4, #2460]
-	ldrh	r3, [r4, r3]
+	ldr	r2, [r4, #2504]
+	ldrh	r3, [r4, #3176]
 	add	r3, r3, r2
-	str	r3, [r4, #2460]
-.LVL1258:
-.L1436:
+	str	r3, [r4, #2504]
+.LVL1267:
+.L1460:
 	.loc 5 165 0 discriminator 1
-	ldrh	r2, [r9]
+	ldrh	r2, [r4, #3176]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1440
+	bhi	.L1464
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1259:
+.LVL1268:
 	.loc 5 182 0
-	movw	r3, #2376
-	ldr	r1, [r4, #2260]
-	ldrh	r0, [r4, r3]
-	mov	r5, r3
-.LVL1260:
-	lsl	r2, r0, #1
-	ldrh	r2, [r1, r2]
-	cmp	r2, #0
-	beq	.L1441
+	ldrh	r0, [r4, #2420]
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L1465
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1261:
-.L1442:
-	.loc 5 186 0
-	mvn	r6, #0
+.LVL1269:
+.L1466:
 	.loc 5 187 0
-	movw	r3, #3180
+	movs	r5, #0
+.LVL1270:
 	.loc 5 186 0
-	strh	r6, [r4, r5]	@ movhi
+	movw	r6, #65535
+	strh	r6, [r4, #2420]	@ movhi
 	.loc 5 187 0
-	mov	r5, #0
-	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r4, #3176]	@ movhi
 	.loc 5 188 0
-	movw	r3, #3172
-	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r4, #3168]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1262:
+.LVL1271:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1263:
+.LVL1272:
 	.loc 5 191 0
-	movw	r3, #2276
-	ldrh	r2, [r4, r3]
-	movw	r3, #2552
-	ldrh	r3, [r4, r3]
+	ldrh	r3, [r4, #2548]
+	ldrh	r2, [r4, #2320]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	.loc 5 192 0
-	movwgt	r3, #2568
+	ble	.L1449
 	.loc 5 193 0
-	movgt	r2, #20
+	movs	r3, #20
 	.loc 5 192 0
-	strhgt	r6, [r4, r3]	@ movhi
+	strh	r6, [r4, #2564]	@ movhi
 	.loc 5 193 0
-	movwgt	r3, #3128
-	strhgt	r2, [r4, r3]	@ movhi
-	b	.L1425
-.LVL1264:
-.L1440:
+	strh	r3, [r4, #3124]	@ movhi
+	b	.L1449
+.LVL1273:
+.L1464:
 	.loc 5 166 0
-	uxth	r3, r6
-	mov	r7, #12
-	ldr	r8, [r4, #3176]
-	mul	r7, r7, r3
+	uxth	r7, r6
+	ldr	r8, [r4, #3172]
 	.loc 5 168 0
-	ldr	r3, [r4, #2436]
+	ldr	r3, [r4, #2480]
 	.loc 5 166 0
+	mul	r7, r9, r7
 	add	r5, r8, r7
 	.loc 5 168 0
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1437
+	bcc	.L1461
 	.loc 5 168 0 is_stmt 0 discriminator 1
-	mov	r2, #168
+	movs	r2, #168
 	mov	r1, r10
-	ldr	r0, .L1449+16
+	mov	r0, fp
 	bl	printk
-.LVL1265:
-.L1437:
+.LVL1274:
+.L1461:
 	.loc 5 169 0 is_stmt 1
-	mov	r2, #0
-	sub	r1, fp, #48
+	movs	r2, #0
+	add	r1, sp, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1266:
+.LVL1275:
 	.loc 5 170 0
-	ldr	r3, [fp, #-48]
+	ldr	r3, [sp, #4]
 	ldr	r0, [r8, r7]
 	cmp	r0, r3
-	bne	.L1438
+	bne	.L1462
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1267:
+.LVL1276:
 	.loc 5 172 0
-	mov	r2, #1
+	movs	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
 	.loc 5 172 0
-	add	r1, r5, #4
+	adds	r1, r5, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1268:
+.LVL1277:
 	.loc 5 173 0
 	mov	r0, r7
-.L1448:
+.L1472:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1269:
-.L1439:
-	add	r6, r6, #1
-	b	.L1436
-.L1438:
+.LVL1278:
+.L1463:
+	adds	r6, r6, #1
+	b	.L1460
+.L1462:
 	.loc 5 175 0
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1439
+	beq	.L1463
 	.loc 5 177 0
-	ldr	r3, .L1449+8
-	ldrh	r0, [r3]
-	b	.L1448
-.LVL1270:
-.L1441:
+	ldrh	r0, [r4, #2420]
+	b	.L1472
+.L1465:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1271:
-	b	.L1442
-.L1450:
+.LVL1279:
+	b	.L1466
+.L1474:
 	.align	2
-.L1449:
+.L1473:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR0+2376
+	.word	.LANCHOR0+2420
 	.word	.LANCHOR1+532
 	.word	.LC1
-	.word	.LANCHOR0+3180
-.LFE248:
+.LFE258:
 	.fnend
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.align	2
+	.align	1
 	.global	FtlGcPageRecovery
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
 	.fnstart
-.LFB251:
+.LFB261:
 	.loc 5 289 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI407:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI408:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI409:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 289 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.save {r4, lr}
+.LCFI179:
 	.loc 5 290 0
-	ldr	r4, .L1453
-	ldr	r5, .L1453+4
+	ldr	r4, .L1477
 	ldrh	r1, [r4, #78]
-	mov	r0, r5
+	addw	r0, r4, #2420
 	bl	FtlGcScanTempBlk
-.LVL1272:
+.LVL1280:
 	.loc 5 291 0
-	ldrh	r2, [r5, #2]
+	ldrh	r2, [r4, #2422]
 	ldrh	r3, [r4, #78]
 	cmp	r2, r3
-	ldmfdcc	sp, {r4, r5, fp, sp, pc}
-.LBB492:
-.LBB493:
+	bcc	.L1475
+.LBB515:
+.LBB516:
 	.loc 5 293 0
-	add	r0, r5, #1488
+	addw	r0, r4, #3864
 	bl	FtlMapBlkWriteDump_data
-.LVL1273:
+.LVL1281:
 	.loc 5 294 0
-	mov	r0, #0
+	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1274:
+.LVL1282:
 	.loc 5 295 0
-	mov	r3, #0
+	movs	r3, #0
 	str	r3, [r4, #3960]
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1454:
+.L1475:
+	pop	{r4, pc}
+.L1478:
 	.align	2
-.L1453:
+.L1477:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2376
-.LBE493:
-.LBE492:
-.LFE251:
+.LBE516:
+.LBE515:
+.LFE261:
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.align	2
+	.align	1
 	.global	FtlPowerLostRecovery
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	.fnstart
-.LFB223:
-	.loc 2 2032 0
+.LFB233:
+	.loc 2 2081 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI410:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI411:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI412:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2032 0
-	.loc 2 2033 0
-	mov	r6, #0
-	ldr	r4, .L1456
-	.loc 2 2035 0
-	add	r5, r4, #2272
-	.loc 2 2033 0
-	str	r6, [r4, #3972]
-	.loc 2 2035 0
-	add	r5, r5, #8
-	.loc 2 2037 0
-	add	r4, r4, #2320
-	.loc 2 2035 0
-	mov	r0, r5
-	.loc 2 2037 0
-	add	r4, r4, #8
-	.loc 2 2035 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI180:
+	.loc 2 2082 0
+	movs	r5, #0
+	ldr	r4, .L1480
+	.loc 2 2084 0
+	addw	r6, r4, #2324
+	.loc 2 2082 0
+	str	r5, [r4, #3972]
+	.loc 2 2084 0
+	mov	r0, r6
+	.loc 2 2086 0
+	addw	r4, r4, #2372
+	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1275:
-	.loc 2 2036 0
-	mov	r0, r5
+.LVL1283:
+	.loc 2 2085 0
+	mov	r0, r6
 	bl	FtlSlcSuperblockCheck
-.LVL1276:
-	.loc 2 2037 0
+.LVL1284:
+	.loc 2 2086 0
 	mov	r0, r4
 	bl	FtlRecoverySuperblock
-.LVL1277:
-	.loc 2 2038 0
+.LVL1285:
+	.loc 2 2087 0
 	mov	r0, r4
 	bl	FtlSlcSuperblockCheck
-.LVL1278:
-	.loc 2 2039 0
+.LVL1286:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1279:
-	.loc 2 2040 0
+.LVL1287:
+	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1280:
-	.loc 2 2042 0
-	mov	r0, r6
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1457:
+.LVL1288:
+	.loc 2 2091 0
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1481:
 	.align	2
-.L1456:
+.L1480:
 	.word	.LANCHOR0
-.LFE223:
+.LFE233:
 	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.align	2
+	.align	1
 	.global	Ftl_gc_temp_data_write_back
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
 	.fnstart
-.LFB253:
+.LFB263:
 	.loc 5 316 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI413:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, fp, ip, lr}
-.LCFI414:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI415:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 316 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI181:
 	.loc 5 320 0
-	mov	r3, #0
+	movs	r3, #0
+	ldr	r4, .L1489
 	.loc 5 321 0
-	mov	r5, #0
-	.loc 5 320 0
-	ldr	r4, .L1465
+	movs	r5, #0
 	.loc 5 322 0
-	mov	r6, #20
+	movs	r6, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r1, [r4, #3144]
+	ldr	r1, [r4, #3140]
 	ldr	r0, [r4, #3796]
 	bl	FlashProgPages
-.LVL1281:
-.L1459:
+.LVL1289:
+.L1483:
 	.loc 5 321 0 discriminator 1
-	ldr	r1, [r4, #3144]
+	ldr	r1, [r4, #3140]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1462
+	bhi	.L1486
 	.loc 5 335 0
 	ldr	r0, [r4, #3796]
 	bl	FtlGcBufFree
-.LVL1282:
+.LVL1290:
 	.loc 5 337 0
-	ldr	r3, .L1465+4
+	ldrh	r3, [r4, #2424]
 	.loc 5 336 0
-	mov	r0, #0
-	str	r0, [r4, #3144]
+	movs	r0, #0
+	str	r0, [r4, #3140]
 	.loc 5 337 0
-	ldrh	r3, [r3, #4]
-	cmp	r3, r0
-	ldmfdne	sp, {r4, r5, r6, r7, fp, sp, pc}
+	cbnz	r3, .L1482
 	.loc 5 338 0
-	mov	r0, #1
+	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1283:
-	b	.L1464
-.L1462:
+.LVL1291:
+	b	.L1488
+.L1486:
 	.loc 5 322 0
-	mul	r3, r6, r3
+	muls	r3, r6, r3
 	ldr	r2, [r4, #3796]
-	add	r5, r5, #1
-	ldr	r0, [r2, r3]
-	add	r1, r2, r3
-	cmn	r0, #1
-	bne	.L1460
+	adds	r5, r5, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r0, r2, #1
+	bne	.L1484
 	.loc 5 323 0
-	movw	r1, #2376
-	ldr	ip, [r4, #2260]
-	ldrh	r2, [r4, r1]
-	mov	lr, #0
-	lsl	r2, r2, #1
-	strh	lr, [ip, r2]	@ movhi
-	.loc 5 325 0
-	ldr	r2, [r4, #2712]
+	ldrh	r0, [r4, #2420]
+	movs	r5, #0
+	ldr	r1, [r4, #2300]
+	strh	r5, [r1, r0, lsl #1]	@ movhi
 	.loc 5 324 0
-	strh	r0, [r4, r1]	@ movhi
+	strh	r2, [r4, #2420]	@ movhi
 	.loc 5 325 0
-	add	r2, r2, #1
-	str	r2, [r4, #2712]
+	ldr	r2, [r4, #2708]
+	adds	r2, r2, #1
+	str	r2, [r4, #2708]
 	.loc 5 326 0
 	ldr	r2, [r4, #3796]
-	add	r3, r2, r3
+	add	r3, r3, r2
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL1284:
+.LVL1292:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1285:
+.LVL1293:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1286:
-.L1464:
+.LVL1294:
+.L1488:
 	.loc 5 339 0
-	mov	r0, #1
+	movs	r0, #1
+.L1482:
 	.loc 5 342 0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1460:
+	pop	{r4, r5, r6, pc}
+.L1484:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1287:
+.LVL1295:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1288:
-	b	.L1459
-.L1466:
+.LVL1296:
+	b	.L1483
+.L1490:
 	.align	2
-.L1465:
+.L1489:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2376
-.LFE253:
+.LFE263:
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.align	2
+	.align	1
 	.global	Ftl_get_new_temp_ppa
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	.fnstart
-.LFB252:
+.LFB262:
 	.loc 5 300 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI416:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI417:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI418:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 300 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI182:
 	.loc 5 301 0
-	movw	r3, #2376
-	ldr	r4, .L1470
-	ldrh	r2, [r4, r3]
 	movw	r3, #65535
+	ldr	r4, .L1494
+	ldrh	r2, [r4, #2420]
 	cmp	r2, r3
-	beq	.L1468
+	beq	.L1492
 	.loc 5 301 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1470+4
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L1469
-.L1468:
+	ldrh	r3, [r4, #2424]
+	cbnz	r3, .L1493
+.L1492:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1289:
+.LVL1297:
 	.loc 5 303 0
-	mov	r0, #0
+	movs	r0, #0
 	.loc 5 304 0
-	mov	r5, #0
+	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1290:
+.LVL1298:
 	.loc 5 305 0
-	ldr	r0, .L1470+4
+	ldr	r0, .L1494+4
 	.loc 5 304 0
-	strb	r5, [r4, #2384]
+	strb	r5, [r4, #2428]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1291:
+.LVL1299:
 	.loc 5 306 0
-	movw	r3, #3172
-	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r4, #3168]	@ movhi
 	.loc 5 307 0
-	movw	r3, #3180
-	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r4, #3176]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1292:
+.LVL1300:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1293:
+.LVL1301:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1294:
-.L1469:
+.LVL1302:
+.L1493:
 	.loc 5 312 0
-	ldr	r0, .L1470+4
-	bl	get_new_active_ppa
-.LVL1295:
+	ldr	r0, .L1494+4
 	.loc 5 313 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1471:
+	pop	{r3, r4, r5, lr}
+.LCFI183:
+	.loc 5 312 0
+	b	get_new_active_ppa
+.LVL1303:
+.L1495:
 	.align	2
-.L1470:
+.L1494:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2376
-.LFE252:
+	.word	.LANCHOR0+2420
+.LFE262:
 	.fnend
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.align	2
+	.align	1
 	.global	rk_ftl_garbage_collect
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
 	.fnstart
-.LFB259:
-	.loc 5 470 0
-	@ args = 0, pretend = 0, frame = 32
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1296:
-	.movsp ip
-	mov	ip, sp
-.LCFI419:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI420:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI421:
-	.pad #44
-	sub	sp, sp, #44
-	push	{lr}
-	bl	__gnu_mcount_nc
+.LFB269:
 	.loc 5 470 0
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1304:
 	.loc 5 478 0
-	ldr	r3, .L1584
+	ldr	r3, .L1615
 	.loc 5 470 0
-	mov	r5, r0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI184:
+	mov	r7, r0
+	.pad #36
+	sub	sp, sp, #36
+.LCFI185:
+	mov	r4, r3
 	.loc 5 478 0
 	ldr	r0, [r3, #3780]
-.LVL1297:
-	mov	r6, r3
+.LVL1305:
 	cmp	r0, #0
-	.loc 5 479 0
-	movne	r0, #0
-	.loc 5 478 0
-	bne	.L1472
+	bne	.L1571
 	.loc 5 481 0
-	movw	r2, #2268
-	ldrh	r2, [r3, r2]
+	ldrh	r2, [r3, #2312]
 	cmp	r2, #47
-	bls	.L1472
+	bls	.L1496
 	.loc 5 485 0
-	ldr	r2, .L1584+4
+	ldr	r2, .L1615+4
 	ldrh	r1, [r2, #4]
-.LVL1298:
+.LVL1306:
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1474
-.L1477:
-.LBB497:
-.LBB498:
+	bne	.L1498
+.L1501:
+.LBB520:
+.LBB521:
 	.loc 5 489 0
-	ldr	r3, .L1584+8
-	movw	r0, #65535
-	ldrh	r1, [r3]
-	cmp	r1, r0
-	bne	.L1475
-.L1476:
+	ldrh	r2, [r4, #3180]
+	movw	r1, #65535
+	cmp	r2, r1
+	bne	.L1499
+.L1500:
 	.loc 5 496 0
-	ldr	r3, [r6, #3132]
+	ldr	r3, [r4, #3128]
 	.loc 5 497 0
-	movw	r2, #2568
-	ldrh	r2, [r6, r2]
-	movw	r4, #65535
+	movw	r5, #65535
+	ldrh	r1, [r4, #2564]
 	.loc 5 496 0
-	add	r3, r3, #1
-	add	r3, r3, r5, lsl #7
+	adds	r3, r3, #1
+	add	r3, r3, r7, lsl #7
 	.loc 5 497 0
-	cmp	r2, r4
+	cmp	r1, r5
 	.loc 5 496 0
-	str	r3, [r6, #3132]
-	.loc 5 497 0
-	bne	.L1478
-	movw	r1, #2376
-	ldrh	r4, [r6, r1]
-	cmp	r4, r2
-	.loc 5 473 0
-	movne	r4, r2
+	str	r3, [r4, #3128]
 	.loc 5 497 0
-	bne	.L1478
-	movw	r2, #3182
-	ldrh	r7, [r6, r2]
-	cmp	r7, r4
-	bne	.L1478
+	bne	.L1502
+	ldrh	r2, [r4, #2420]
+	cmp	r2, r1
+	bne	.L1503
+	ldrh	r8, [r4, #3178]
+	cmp	r8, r2
+	bne	.L1504
 	.loc 5 498 0
-	movw	r10, #2276
-	ldrh	r2, [r6, r10]
+	ldrh	r2, [r4, #2320]
 	cmp	r2, #24
+	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	.loc 5 473 0
-	movls	r4, r7
-	.loc 5 498 0
-	bls	.L1478
-.LBB499:
+	bls	.L1504
+.LBB522:
 	.loc 5 502 0
-	ldr	r3, .L1584+12
+	ldr	r3, .L1615+8
 	.loc 5 501 0
-	mov	r9, #0
-	str	r9, [r6, #3132]
+	movs	r6, #0
+	str	r6, [r4, #3128]
 	.loc 5 502 0
-	strh	r9, [r3, #-4]	@ movhi
+	strh	r6, [r3, #-228]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1299:
+.LVL1307:
 	.loc 5 504 0
-	cmp	r0, r7
+	cmp	r0, r8
 	.loc 5 503 0
-	mov	r4, r0
+	mov	r5, r0
 	.loc 5 504 0
-	movne	r7, r0
-	bne	.L1480
+	bne	.L1575
 	.loc 5 505 0
-	movw	r8, #3130
-	ldrh	r2, [r6, r10]
-	ldrh	r3, [r6, r8]
+	ldrh	r2, [r4, #2320]
+	ldrh	r3, [r4, #3126]
 	cmp	r2, r3
-	bcs	.L1481
+	bcs	.L1507
 	.loc 5 506 0
-	mov	r0, #64
+	movs	r0, #64
 	bl	List_get_gc_head_node
-.LVL1300:
+.LVL1308:
 	.loc 5 507 0
 	uxth	r3, r0
-	cmp	r3, r4
-	beq	.L1483
+	cmp	r3, r5
+	beq	.L1509
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, [r6, #2260]
-	lsl	r0, r0, #1
-	ldrh	r3, [r3, r0]
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1484
+	bhi	.L1510
 	.loc 5 509 0
-	mov	r0, r9
+	mov	r0, r6
 	bl	List_get_gc_head_node
-.LVL1301:
-	uxth	r7, r0
+.LVL1309:
+	uxth	r6, r0
 	.loc 5 510 0
-	mov	r3, #128
-	strh	r3, [r6, r8]	@ movhi
+	movs	r3, #128
+	strh	r3, [r4, #3126]	@ movhi
 	.loc 5 520 0
-	cmp	r7, r4
-	beq	.L1483
-.L1480:
+	cmp	r6, r5
+	beq	.L1509
+.L1506:
 	.loc 5 521 0
-	movw	r0, #3128
-	ldr	r3, [r6, #2260]
-	ldrh	r0, [r6, r0]
-	lsl	r1, r7, #1
-	movw	r2, #2276
-	ldrh	r3, [r3, r1]
-	mov	r4, r7
-	ldrh	r2, [r6, r2]
-	str	r0, [sp, #4]
-	ldr	r0, [r6, #2248]
-	ldrh	r1, [r0, r1]
-	ldr	r0, .L1584+16
+	ldr	r3, [r4, #2300]
+	mov	r5, r6
+	ldrh	r1, [r4, #3124]
+	ldrh	r2, [r4, #2320]
+	ldrh	r3, [r3, r6, lsl #1]
+	str	r1, [sp, #4]
+	ldr	r1, [r4, #2304]
+	ldr	r0, .L1615+12
+	ldrh	r1, [r1, r6, lsl #1]
 	str	r1, [sp]
-	mov	r1, r7
+	mov	r1, r6
 	bl	printk
-.LVL1302:
-	b	.L1483
-.L1474:
-.LBE499:
-.LBE498:
-.LBE497:
+.LVL1310:
+	b	.L1509
+.L1498:
+.LBE522:
+.LBE521:
+.LBE520:
 	.loc 5 485 0 discriminator 1
-	movw	r1, #2376
-	ldrh	r3, [r3, r1]
+	ldrh	r3, [r3, #2420]
 	cmp	r3, r2
-	beq	.L1477
+	beq	.L1501
 	.loc 5 486 0
-	mov	r0, #1
+	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1303:
+.LVL1311:
 	cmp	r0, #0
-	beq	.L1477
+	beq	.L1501
 	.loc 5 487 0
-	mov	r0, #1
-	b	.L1472
-.L1475:
-.LBB504:
-.LBB502:
+	movs	r0, #1
+	b	.L1496
+.L1499:
+.LBB528:
+.LBB525:
 	.loc 5 489 0
-	movw	r2, #3182
-	ldrh	ip, [r6, r2]
-	cmp	ip, r0
+	ldrh	r3, [r4, #3178]
+	cmp	r3, r1
 	.loc 5 490 0
-	strheq	r1, [r6, r2]	@ movhi
+	itt	eq
+	strheq	r2, [r4, #3178]	@ movhi
 	.loc 5 491 0
-	mvneq	r2, #0
-	strheq	r2, [r3]	@ movhi
-	b	.L1476
-.L1484:
-.LBB500:
+	strheq	r3, [r4, #3180]	@ movhi
+	b	.L1500
+.L1510:
+.LBB523:
 	.loc 5 512 0
-	mov	r3, #64
-.L1577:
+	movs	r3, #64
+.L1608:
 	.loc 5 516 0
-	strh	r3, [r6, r8]	@ movhi
-.L1483:
+	strh	r3, [r4, #3126]	@ movhi
+.L1509:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1304:
-.L1478:
-.LBE500:
+.LVL1312:
+.LBE523:
 	.loc 5 527 0
-	movw	r2, #65535
-	sub	r3, r4, r2
-	clz	r3, r3
-	lsr	r3, r3, #5
-	cmp	r5, #0
-	movne	r5, #0
-	andeq	r5, r3, #1
-.LVL1305:
-	cmp	r5, #0
-	beq	.L1486
+	cmp	r7, #0
+	bne	.L1512
+	movw	r3, #65535
+	cmp	r5, r3
+	bne	.L1512
+.L1569:
 	.loc 5 528 0
-	movw	r3, #2276
-	ldrh	r3, [r6, r3]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #24
-	.loc 5 529 0
-	movhi	r5, #1
-.LVL1306:
-	.loc 5 528 0
-	bhi	.L1487
-	ldrh	r5, [r6, #78]
-.LVL1307:
+	bhi	.L1576
 	.loc 5 530 0
 	cmp	r3, #16
+	ldrh	r6, [r4, #78]
+	bls	.L1514
 	.loc 5 531 0
-	lsrhi	r5, r5, #5
-.LVL1308:
-	.loc 5 530 0
-	bhi	.L1487
-	.loc 5 532 0
-	cmp	r3, #12
-	.loc 5 533 0
-	lsrhi	r5, r5, #4
-.LVL1309:
-	.loc 5 532 0
-	bhi	.L1487
-	.loc 5 534 0
-	cmp	r3, #8
-	.loc 5 535 0
-	lsrhi	r5, r5, #2
-.LVL1310:
-.L1487:
+	lsrs	r6, r6, #5
+.LVL1313:
+.L1513:
 	.loc 5 539 0
-	movw	r2, #3128
-	ldrh	r1, [r6, r2]
-	cmp	r1, r3
-	bcs	.L1491
+	ldrh	r2, [r4, #3124]
+	cmp	r2, r3
+	bcs	.L1517
 	.loc 5 540 0
-	movw	r3, #2376
-	movw	r1, #65535
-	ldrh	r3, [r6, r3]
-	cmp	r3, r1
-	bne	.L1492
-	movw	r1, #3182
-	ldrh	r1, [r6, r1]
-	cmp	r1, r3
-	bne	.L1492
+	ldrh	r3, [r4, #2420]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1518
+	ldrh	r2, [r4, #3178]
+	cmp	r2, r3
+	bne	.L1518
 	.loc 5 542 0
-	ldr	r3, .L1584+12
-	ldrh	r0, [r3, #-4]
-	cmp	r0, #0
-	bne	.L1493
-	ldr	r3, [r6, #2436]
-	ldr	r1, [r6, #2432]
+	ldr	r3, .L1615+8
+	ldrh	r0, [r3, #-228]
+	cbnz	r0, .L1519
+	ldr	r3, [r4, #2480]
+	ldr	r2, [r4, #2476]
 	add	r3, r3, r3, lsl #1
-	cmp	r1, r3, lsr #2
-	.loc 5 545 0
-	movcs	r3, #18
-	.loc 5 542 0
-	bcs	.L1578
-.L1493:
+	cmp	r2, r3, lsr #2
+	bcs	.L1520
+.L1519:
 	.loc 5 543 0
-	movw	r3, #2552
-	movw	r2, #3128
-	ldrh	r3, [r6, r3]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
-	asr	r3, r3, #2
-.L1578:
+	asrs	r3, r3, #2
+.L1609:
 	.loc 5 545 0
-	strh	r3, [r6, r2]	@ movhi
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 5 546 0
-	mov	r3, #0
-	str	r3, [r6, #3140]
-.LVL1311:
-.L1472:
-.LBE502:
-.LBE504:
-	.loc 5 758 0
-	sub	sp, fp, #40
-.LCFI422:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1312:
-.L1481:
-.LCFI423:
-.LBB505:
-.LBB503:
-.LBB501:
+	movs	r3, #0
+	str	r3, [r4, #3136]
+.LVL1314:
+.L1496:
+.LBE525:
+.LBE528:
+	.loc 5 754 0
+	add	sp, sp, #36
+.LCFI186:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.LVL1315:
+.L1507:
+.LCFI187:
+.LBB529:
+.LBB526:
+.LBB524:
 	.loc 5 516 0
-	mov	r3, #80
-	b	.L1577
-.LVL1313:
-.L1492:
-.LBE501:
+	movs	r3, #80
+	b	.L1608
+.L1575:
+	.loc 5 504 0
+	mov	r6, r0
+	b	.L1506
+.L1514:
+.LBE524:
+	.loc 5 532 0
+	cmp	r3, #12
+	bls	.L1515
+	.loc 5 533 0
+	lsrs	r6, r6, #4
+.LVL1316:
+	b	.L1513
+.LVL1317:
+.L1515:
+	.loc 5 534 0
+	cmp	r3, #8
+	bls	.L1513
+	.loc 5 535 0
+	lsrs	r6, r6, #2
+.LVL1318:
+	b	.L1513
+.LVL1319:
+.L1576:
+	.loc 5 529 0
+	movs	r6, #1
+.LVL1320:
+	b	.L1513
+.L1520:
+	.loc 5 545 0
+	movs	r3, #18
+	b	.L1609
+.L1518:
 	.loc 5 549 0
-	movw	r3, #2552
-	movw	r2, #3128
-	ldrh	r3, [r6, r3]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
-	asr	r3, r3, #2
-	strh	r3, [r6, r2]	@ movhi
-.L1491:
+	asrs	r3, r3, #2
+	strh	r3, [r4, #3124]	@ movhi
+.L1517:
 	.loc 5 551 0
-	movw	r3, #3186
-	movw	r4, #65535
-	ldrh	r3, [r6, r3]
-	cmp	r3, #0
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L1577
 	.loc 5 552 0
-	addne	r5, r5, #32
-.LVL1314:
-	uxthne	r5, r5
-.LVL1315:
-.L1497:
+	adds	r6, r6, #32
+.LVL1321:
+	uxth	r6, r6
+.LVL1322:
+.L1577:
+	.loc 5 551 0
+	movw	r5, #65535
+.L1523:
+	.loc 5 595 0
+	ldrh	r3, [r4, #2564]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1532
+	.loc 5 596 0
+	cmp	r5, r3
+	beq	.L1533
 	.loc 5 597 0
-	movw	r3, #2568
-	ldrh	r2, [r6, r3]
-	movw	r1, #65535
-	cmp	r2, r1
-	bne	.L1506
-	.loc 5 598 0
-	cmp	r4, r2
-	.loc 5 599 0
-	strhne	r4, [r6, r3]	@ movhi
-	.loc 5 598 0
-	bne	.L1508
-	.loc 5 600 0
-	movw	r2, #3182
-	ldrh	r3, [r6, r2]
-	cmp	r3, r4
-	beq	.L1508
-	.loc 5 604 0
-	ldr	r1, [r6, #2260]
-	lsl	r3, r3, #1
-	ldrh	r3, [r1, r3]
-	cmp	r3, #0
-	.loc 5 605 0
-	mvneq	r3, #0
-	strheq	r3, [r6, r2]	@ movhi
+	strh	r5, [r4, #2564]	@ movhi
+.L1534:
+	.loc 5 607 0
+	ldrh	r0, [r4, #2564]
+	movw	r7, #65535
+.LVL1323:
 	.loc 5 606 0
-	movw	r3, #3182
-	ldrh	r1, [r6, r3]
-	movw	r2, #2568
-	strh	r1, [r6, r2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #2572]
 	.loc 5 607 0
-	mvn	r2, #0
-	strh	r2, [r6, r3]	@ movhi
-.L1508:
-	.loc 5 611 0
-	movw	r7, #2568
-	.loc 5 610 0
-	mov	r3, #0
-	.loc 5 611 0
-	ldrh	r0, [r6, r7]
-	.loc 5 610 0
-	strb	r3, [r6, #2576]
+	cmp	r0, r7
+	beq	.L1532
+	.loc 5 608 0
+	bl	IsBlkInGcList
+.LVL1324:
+	cbz	r0, .L1537
+	.loc 5 609 0
+	strh	r7, [r4, #2564]	@ movhi
+.L1537:
 	.loc 5 611 0
+	ldrh	r2, [r4, #2564]
 	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1506
+	cmp	r2, r3
+	beq	.L1532
 	.loc 5 612 0
-	bl	IsBlkInGcList
-.LVL1316:
-	cmp	r0, #0
+	ldr	r0, .L1615+16
+	bl	make_superblock
+.LVL1325:
 	.loc 5 615 0
-	ldr	r8, .L1584+20
+	ldr	r2, .L1615+8
 	.loc 5 613 0
-	mvnne	r3, #0
-	strhne	r3, [r6, r7]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 5 614 0
+	strb	r3, [r4, #2570]
 	.loc 5 615 0
-	movw	r7, #2568
-	ldrh	r2, [r6, r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1506
+	strh	r3, [r2, #-226]	@ movhi
 	.loc 5 616 0
-	mov	r0, r8
-	bl	make_superblock
-.LVL1317:
-	.loc 5 619 0
-	ldr	r2, .L1584+12
-	.loc 5 617 0
-	mov	r3, #0
-	strh	r3, [r8, #2]	@ movhi
-	.loc 5 618 0
-	strb	r3, [r6, #2574]
-	.loc 5 619 0
-	strh	r3, [r2, #-2]	@ movhi
-	.loc 5 620 0
-	ldrh	r3, [r6, r7]
-	ldr	r1, [r6, #2260]
-	lsl	r3, r3, #1
-	ldrh	r3, [r1, r3]
-	strh	r3, [r2]	@ movhi
-.L1506:
-	.loc 5 625 0
-	movw	r3, #2568
-	movw	r2, #2280
-	ldrh	r3, [r6, r3]
-	ldrh	r2, [r6, r2]
+	ldrh	r1, [r4, #2564]
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r1, lsl #1]
+	strh	r3, [r2, #-224]	@ movhi
+.LVL1326:
+.L1532:
+	.loc 5 621 0
+	ldrh	r3, [r4, #2564]
+	ldrh	r2, [r4, #2324]
 	cmp	r2, r3
-	beq	.L1512
-	movw	r2, #2328
-	ldrh	r2, [r6, r2]
+	beq	.L1538
+	ldrh	r2, [r4, #2372]
 	cmp	r2, r3
+	beq	.L1538
+	.loc 5 662 0
+	ldr	r7, .L1615+8
+.LVL1327:
+.L1539:
+	.loc 5 627 0
+	ldrh	r9, [r4, #2564]
+	movw	r3, #65535
+	cmp	r9, r3
+	bne	.L1540
+	.loc 5 628 0
+	movs	r3, #0
+	.loc 5 643 0
+	mov	r10, r3
+.LVL1328:
+	.loc 5 628 0
+	str	r3, [r4, #3136]
+.L1541:
 	.loc 5 631 0
-	ldrne	r10, .L1584
-	movne	r6, r10
-	.loc 5 625 0
-	bne	.L1513
-.L1512:
-	.loc 5 626 0
-	mvn	r2, #0
-	movw	r3, #2568
-	strh	r2, [r6, r3]	@ movhi
-.LVL1318:
-.L1583:
-	.loc 5 652 0
-	ldr	r3, .L1584+12
-	ldrh	r0, [r3, #-4]
-	b	.L1472
-.LVL1319:
-.L1486:
-	.loc 5 557 0
-	movw	r1, #2376
-	ldrh	r7, [r6, r1]
-	cmp	r7, r2
-	bne	.L1555
-	movw	r2, #3182
-	ldrh	r2, [r6, r2]
-	cmp	r2, r7
-	movne	r3, #0
-	andeq	r3, r3, #1
-	cmp	r3, #0
-	beq	.L1555
-	movw	r3, #2568
-	ldrh	r3, [r6, r3]
-	cmp	r3, r7
-	beq	.L1498
-.L1503:
-	.loc 5 556 0
-	mov	r4, r7
-.L1555:
-	mov	r5, #1
-.LVL1320:
-	b	.L1497
-.LVL1321:
-.L1498:
+	ldrh	r8, [r4, #3132]
+.LVL1329:
+	mov	r0, r8
+	bl	List_get_gc_head_node
+.LVL1330:
+	uxth	fp, r0
+	.loc 5 632 0
+	cmp	fp, r9
+	.loc 5 631 0
+	strh	fp, [r4, #2564]	@ movhi
+	.loc 5 632 0
+	bne	.L1542
+	.loc 5 633 0
+	movs	r3, #0
+	.loc 5 634 0
+	movs	r0, #8
+	.loc 5 633 0
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1496
+.LVL1331:
+.L1524:
+	.loc 5 558 0
+	movs	r3, #0
 	.loc 5 560 0
-	movw	r3, #2276
-	movw	r2, #3128
-	ldrh	r8, [r6, r3]
-	ldrh	r3, [r6, r2]
+	ldrh	r7, [r4, #2320]
+.LVL1332:
 	.loc 5 558 0
-	str	r5, [r6, #3140]
-	ldr	r4, .L1584+12
+	str	r3, [r4, #3136]
 	.loc 5 560 0
-	cmp	r3, r8
-	bcs	.L1499
+	ldrh	r3, [r4, #3124]
+	ldr	r5, .L1615+8
+	cmp	r3, r7
+	bcs	.L1525
 	.loc 5 561 0
-	ldrh	r3, [r4, #-4]
-	cmp	r3, #0
-	bne	.L1500
-	ldr	r3, [r6, #2436]
-	ldr	r1, [r6, #2432]
+	ldrh	r3, [r5, #-228]
+	cbnz	r3, .L1526
+	ldr	r3, [r4, #2480]
+	ldr	r2, [r4, #2476]
 	add	r3, r3, r3, lsl #1
-	cmp	r1, r3, lsr #2
-	.loc 5 564 0
-	movcs	r3, #18
-	.loc 5 561 0
-	bcs	.L1579
-.L1500:
+	cmp	r2, r3, lsr #2
+	bcs	.L1527
+.L1526:
 	.loc 5 562 0
-	movw	r3, #2552
-	movw	r2, #3128
-	ldrh	r3, [r6, r3]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
-	asr	r3, r3, #2
-.L1579:
+	asrs	r3, r3, #2
+.L1610:
 	.loc 5 564 0
-	strh	r3, [r6, r2]	@ movhi
-.L1582:
+	strh	r3, [r4, #3124]	@ movhi
+.L1612:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1322:
+.LVL1333:
 	.loc 5 579 0
-	ldrh	r0, [r4, #-4]
-	b	.L1472
-.L1499:
+	ldrh	r0, [r5, #-228]
+	b	.L1496
+.L1527:
+	.loc 5 564 0
+	movs	r3, #18
+	b	.L1610
+.L1525:
 	.loc 5 572 0
-	ldrh	r0, [r4, #-4]
+	ldrh	r0, [r5, #-228]
 	cmp	r0, #0
-	bne	.L1503
+	bne	.L1529
 	.loc 5 573 0
-	movw	r3, #2552
-	ldrh	r5, [r6, r3]
-	add	r3, r5, r5, lsl #1
-	asr	r3, r3, #2
-	strh	r3, [r6, r2]	@ movhi
+	ldrh	r6, [r4, #2548]
+	add	r3, r6, r6, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1323:
+.LVL1334:
 	.loc 5 575 0
+	ldr	r3, [r4, #2300]
 	uxth	r0, r0
-	ldr	r3, [r6, #2260]
-	ldrh	r1, [r6, #80]
-	lsl	r0, r0, #1
-	ldrh	r2, [r3, r0]
-	ldrh	r3, [r6, #8]
-	mul	r3, r3, r1
+	ldrh	r1, [r4, #80]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldrh	r3, [r4, #8]
+	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1504
+	ble	.L1530
 	.loc 5 576 0
-	sub	r5, r5, #1
+	subs	r6, r6, #1
 	.loc 5 575 0
-	cmp	r8, r5
-	bge	.L1582
-.L1504:
+	cmp	r7, r6
+	bge	.L1612
+.L1530:
 	.loc 5 584 0
 	cmp	r2, #0
-	bne	.L1503
+	bne	.L1529
 	.loc 5 585 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1324:
+.LVL1335:
 	.loc 5 586 0
-	movw	r3, #2276
-	ldrh	r0, [r6, r3]
-	add	r0, r0, #1
-	b	.L1472
-.LVL1325:
-.L1516:
-	str	r0, [fp, #-60]
-	.loc 5 640 0
-	mov	r0, r2
-	str	r2, [fp, #-56]
-	add	r9, r9, #1
+	ldrh	r0, [r4, #2320]
+	adds	r0, r0, #1
+	b	.L1496
+.LVL1336:
+.L1533:
+	.loc 5 598 0
+	ldrh	r3, [r4, #3178]
+	cmp	r3, r5
+	beq	.L1534
+	.loc 5 600 0
+	ldr	r2, [r4, #2300]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L1535
+	.loc 5 601 0
+	strh	r5, [r4, #3178]	@ movhi
+.L1535:
+	.loc 5 602 0
+	ldrh	r3, [r4, #3178]
+	strh	r3, [r4, #2564]	@ movhi
+	.loc 5 603 0
+	movw	r3, #65535
+	strh	r3, [r4, #3178]	@ movhi
+	b	.L1534
+.L1616:
+	.align	2
+.L1615:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LC103
+	.word	.LANCHOR0+2564
+.L1538:
+	.loc 5 622 0
+	movw	r3, #65535
+	strh	r3, [r4, #2564]	@ movhi
+.LVL1337:
+.L1613:
+	.loc 5 648 0
+	ldr	r3, .L1617
+	ldrh	r0, [r3, #-228]
+	b	.L1496
+.LVL1338:
+.L1542:
+	str	r0, [sp, #8]
+	.loc 5 636 0
+	mov	r0, fp
 	bl	IsBlkInGcList
-.LVL1326:
-	cmp	r0, #0
-	ldr	r2, [fp, #-56]
-	ldr	r3, [fp, #-60]
+.LVL1339:
+	add	r8, r8, #1
+	ldr	r3, [sp, #8]
+	cbz	r0, .L1543
+	.loc 5 637 0
+	strh	r8, [r4, #3132]	@ movhi
+	b	.L1541
+.L1543:
 	.loc 5 641 0
-	strhne	r9, [r8]	@ movhi
+	uxth	r0, r3
+	ldrh	ip, [r4, #8]
+	ldrh	r3, [r4, #78]
 	.loc 5 640 0
-	bne	.L1515
-	.loc 5 645 0
-	uxth	r3, r3
-	ldrh	lr, [r6, #8]
-	ldr	r0, [r6, #2260]
-	.loc 5 644 0
-	uxth	r9, r9
-	.loc 5 645 0
-	lsl	r1, r3, #1
-	ldrh	r3, [r6, #78]
-	.loc 5 644 0
-	strh	r9, [r8]	@ movhi
+	uxth	r8, r8
+	.loc 5 641 0
+	ldr	r2, [r4, #2300]
+	.loc 5 640 0
+	strh	r8, [r4, #3132]	@ movhi
+	.loc 5 641 0
+	mul	r3, ip, r3
+	ldrh	r1, [r2, r0, lsl #1]
+	add	ip, r3, r3, lsr #31
+	cmp	r1, ip, asr #1
+	bgt	.L1545
+	.loc 5 642 0
+	cmp	r8, #48
+	bls	.L1546
+	cmp	r1, #8
+	bls	.L1546
+	ldrh	r1, [r4, #3168]
+	cmp	r1, #35
+	bhi	.L1546
+.L1545:
+	.loc 5 643 0
+	strh	r10, [r4, #3132]	@ movhi
+.L1546:
 	.loc 5 645 0
-	ldrh	ip, [r0, r1]
-	mul	r3, lr, r3
-	add	lr, r3, r3, lsr #31
-	cmp	ip, lr, asr #1
-	bgt	.L1519
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r3, r2
+	bgt	.L1547
+	cmp	r5, r9
+	bne	.L1547
+	.loc 5 647 0
+	movs	r3, #0
 	.loc 5 646 0
-	cmp	ip, #8
-	cmphi	r9, #48
-	bls	.L1520
-	ldr	ip, .L1584+24
-	ldrh	ip, [ip]
-	cmp	ip, #35
-	bhi	.L1520
-.L1519:
+	strh	r5, [r4, #2564]	@ movhi
 	.loc 5 647 0
-	ldr	lr, .L1584+28
-	mov	ip, #0
-	strh	ip, [lr]	@ movhi
-.L1520:
-	.loc 5 649 0
-	ldrh	r1, [r0, r1]
-	movw	r0, #65535
-	cmp	r3, r1
-	cmple	r4, r0
-	moveq	r3, #1
-	movne	r3, #0
-	bne	.L1521
-	.loc 5 650 0
-	mvn	r2, #0
-	movw	r3, #2568
-	strh	r2, [r6, r3]	@ movhi
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1613
+.L1547:
 	.loc 5 651 0
-	mov	r3, #0
-	ldr	r2, .L1584+28
-	strh	r3, [r2]	@ movhi
-	b	.L1583
-.L1521:
-	.loc 5 655 0
-	cmp	r1, #0
-	bne	.L1522
-	.loc 5 656 0
+	cbnz	r2, .L1548
+	.loc 5 652 0
+	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1327:
-	.loc 5 657 0
-	ldr	r3, .L1584+28
-	ldr	r2, .L1584+28
-	ldrh	r3, [r3]
-	add	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	b	.L1515
-.L1522:
-	.loc 5 660 0
-	strb	r3, [r6, #2576]
-	.loc 5 662 0
-	ldr	r3, .L1584+32
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bne	.L1523
-	movw	r2, #662
-	ldr	r1, .L1584+36
-	ldr	r0, .L1584+40
+.LVL1340:
+	.loc 5 653 0
+	ldrh	r3, [r4, #3132]
+	adds	r3, r3, #1
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1541
+.L1548:
+	.loc 5 656 0
+	movs	r3, #0
+	strb	r3, [r4, #2572]
+	.loc 5 658 0
+	ldrh	r3, [r4, #2324]
+	cmp	r3, fp
+	bne	.L1549
+	movw	r2, #658
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1328:
-.L1523:
-	.loc 5 663 0
-	ldr	r3, .L1584+44
-	ldrh	r2, [r7]
-	ldrh	r3, [r3]
+.LVL1341:
+.L1549:
+	.loc 5 659 0
+	ldrh	r2, [r4, #2564]
+	ldrh	r3, [r4, #2372]
 	cmp	r2, r3
-	bne	.L1524
-	movw	r2, #663
-	ldr	r1, .L1584+36
-	ldr	r0, .L1584+40
+	bne	.L1550
+	movw	r2, #659
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1329:
-.L1524:
-	.loc 5 664 0
-	ldr	r3, .L1584+48
-	ldrh	r2, [r7]
-	ldrh	r3, [r3]
+.LVL1342:
+.L1550:
+	.loc 5 660 0
+	ldrh	r2, [r4, #2564]
+	ldrh	r3, [r4, #2420]
 	cmp	r2, r3
-	bne	.L1525
-	mov	r2, #664
-	ldr	r1, .L1584+36
-	ldr	r0, .L1584+40
+	bne	.L1551
+	mov	r2, #660
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1330:
-.L1525:
-	.loc 5 665 0
-	ldr	r0, .L1584+20
-	bl	make_superblock
-.LVL1331:
-	.loc 5 667 0
-	ldrh	r2, [r7]
-	.loc 5 666 0
-	mov	r3, #0
-	ldr	r1, .L1584+12
-	.loc 5 667 0
-	ldr	r0, [r6, #2260]
-	lsl	r2, r2, #1
-	.loc 5 666 0
-	strh	r3, [r1, #-2]	@ movhi
-	.loc 5 667 0
-	ldrh	r2, [r0, r2]
-	.loc 5 668 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 5 669 0
-	strb	r3, [r6, #2574]
-	.loc 5 667 0
-	strh	r2, [r1]	@ movhi
-.LVL1332:
-.L1514:
-	.loc 5 675 0
-	bl	FtlReadRefresh
-.LVL1333:
-	.loc 5 678 0
-	mov	r3, #1
-	str	r3, [r6, #3780]
-	.loc 5 679 0
-	ldrh	r3, [r6, #78]
-.LVL1334:
-	str	r3, [fp, #-68]
-	.loc 5 680 0
-	ldrh	r3, [r7, #2]
-.LVL1335:
-	ldr	r1, [fp, #-68]
-.LVL1336:
-	add	r2, r3, r5
-	cmp	r2, r1
-	.loc 5 681 0
-	movgt	r2, r1
-	subgt	r5, r2, r3
-.LVL1337:
-	.loc 5 693 0
-	mov	r3, #0
-	.loc 5 681 0
-	uxthgt	r5, r5
-.LVL1338:
-.L1581:
-	str	r3, [fp, #-64]
-	.loc 5 683 0
-	ldrh	r3, [fp, #-64]
-	ldr	r8, .L1584+20
-.LVL1339:
-	cmp	r5, r3
-	bls	.L1535
-	.loc 5 688 0
-	ldrh	r7, [r8, #2]
-	mov	r2, #0
-.LVL1340:
-	ldr	r3, [fp, #-64]
-	mov	r9, #20
-.LVL1341:
-	.loc 5 685 0
-	ldrh	ip, [r10, #8]
-	.loc 5 688 0
-	ldr	r0, [r10, #3160]
-	add	r7, r7, r3
-	str	r2, [fp, #-56]
-	add	r3, r8, #14
-	.loc 5 687 0
-	movw	r8, #65535
-	b	.L1536
-.LVL1342:
-.L1529:
-	.loc 5 686 0
-	ldrh	r1, [r3, #2]!
 .LVL1343:
-	.loc 5 687 0
-	cmp	r1, r8
-	beq	.L1528
-	.loc 5 688 0
-	ldr	lr, [fp, #-56]
+.L1551:
+	.loc 5 661 0
+	ldr	r0, .L1617+12
+	bl	make_superblock
 .LVL1344:
-	orr	r1, r7, r1, lsl #10
+	.loc 5 663 0
+	ldrh	r1, [r4, #2564]
+	.loc 5 662 0
+	movs	r3, #0
+	.loc 5 663 0
+	ldr	r2, [r4, #2300]
+	.loc 5 662 0
+	strh	r3, [r7, #-226]	@ movhi
+	.loc 5 663 0
+	ldrh	r2, [r2, r1, lsl #1]
+	.loc 5 664 0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 5 665 0
+	strb	r3, [r4, #2570]
+	.loc 5 663 0
+	strh	r2, [r7, #-224]	@ movhi
 .LVL1345:
-	mla	lr, r9, lr, r0
+.L1540:
+	.loc 5 671 0
+	bl	FtlReadRefresh
 .LVL1346:
-	str	r1, [lr, #4]
-	.loc 5 689 0
-	ldr	r1, [fp, #-56]
+	.loc 5 674 0
+	movs	r3, #1
+	str	r3, [r4, #3780]
+	.loc 5 675 0
+	ldrh	r3, [r4, #78]
 .LVL1347:
-	add	r1, r1, #1
+	str	r3, [sp, #12]
+	.loc 5 676 0
+	ldrh	r3, [r4, #2566]
 .LVL1348:
-	uxth	r1, r1
+	ldr	r1, [sp, #12]
 .LVL1349:
-	str	r1, [fp, #-56]
+	adds	r2, r3, r6
+	cmp	r2, r1
+	.loc 5 677 0
+	itt	gt
+	movgt	r2, r1
+	subgt	r6, r2, r3
 .LVL1350:
-.L1528:
-	add	r2, r2, #1
+	.loc 5 689 0
+	mov	r3, #0
+	.loc 5 677 0
+	it	gt
+	uxthgt	r6, r6
 .LVL1351:
-.L1536:
-	.loc 5 685 0
-	uxth	r1, r2
+.L1611:
+	str	r3, [sp, #8]
+	.loc 5 679 0
+	ldrh	r3, [sp, #8]
+	cmp	r6, r3
+	bls	.L1561
+	.loc 5 684 0
+	ldr	r3, [sp, #8]
+	.loc 5 683 0
+	movw	r10, #65535
 .LVL1352:
-	cmp	ip, r1
-	bhi	.L1529
-	.loc 5 693 0
-	ldrb	r2, [r10, #2576]	@ zero_extendqisi2
-	ldr	r1, [fp, #-56]
-	bl	FlashReadPages
+	.loc 5 684 0
+	ldrh	r1, [r4, #2566]
+	mov	fp, #20
+	.loc 5 681 0
+	ldrh	lr, [r4, #8]
+	.loc 5 684 0
+	ldr	r0, [r4, #3156]
+	add	r1, r1, r3
+	movs	r3, #0
+	ldr	ip, .L1617+16
+	mov	r8, r3
+	b	.L1562
 .LVL1353:
-	mov	r3, #0
+.L1555:
+	.loc 5 682 0
+	ldrh	r2, [ip, #2]!
 .LVL1354:
-.L1580:
-	str	r3, [fp, #-60]
-	.loc 5 695 0
-	ldr	r2, [fp, #-56]
+	.loc 5 683 0
+	cmp	r2, r10
+	beq	.L1554
+	.loc 5 684 0
+	mla	r9, fp, r8, r0
+	.loc 5 685 0
+	add	r8, r8, #1
 .LVL1355:
-	ldrh	r3, [fp, #-60]
-	cmp	r3, r2
-	ldrcs	r3, [fp, #-64]
-	addcs	r3, r3, #1
-	bcs	.L1581
-.L1534:
-	ldr	r3, [fp, #-60]
-	mov	r7, #20
-	mul	r7, r7, r3
-	.loc 5 696 0
-	ldr	r3, [r10, #3160]
-	add	r2, r3, r7
+	.loc 5 684 0
+	orr	r2, r1, r2, lsl #10
 .LVL1356:
-	.loc 5 697 0
-	ldr	r3, [r3, r7]
-	cmn	r3, #1
-	beq	.L1531
-	.loc 5 696 0
-	ldr	r9, [r2, #12]
-	.loc 5 697 0
-	movw	r3, #61589
-	ldrh	r2, [r9]
-	cmp	r2, r3
-	bne	.L1531
-	.loc 5 699 0
-	ldr	r8, [r9, #8]
-	.loc 5 700 0
-	cmn	r8, #1
-	bne	.L1532
-	mov	r2, #700
-	ldr	r1, .L1584+36
-	ldr	r0, .L1584+40
-	bl	printk
+	.loc 5 685 0
+	uxth	r8, r8
 .LVL1357:
-.L1532:
-	.loc 5 701 0
-	mov	r2, #0
-	sub	r1, fp, #48
-	mov	r0, r8
-	bl	log2phys
+	.loc 5 684 0
+	str	r2, [r9, #4]
 .LVL1358:
-	.loc 5 702 0
-	ldr	r1, [r6, #3160]
-	ldr	r3, [fp, #-48]
-	add	r1, r1, r7
-	ldr	r2, [r1, #4]
-	cmp	r2, r3
-	bne	.L1531
-	.loc 5 704 0
-	ldr	r8, .L1584+52
+.L1554:
+	adds	r3, r3, #1
 .LVL1359:
-	.loc 5 705 0
-	mov	r2, #20
-	ldr	r0, [r6, #3144]
-	ldr	r1, [r1, #16]
-	.loc 5 704 0
-	ldrh	r3, [r8]
-	.loc 5 705 0
-	str	r2, [fp, #-76]
-	.loc 5 704 0
-	add	r3, r3, #1
-	strh	r3, [r8], #2	@ movhi
-	.loc 5 705 0
-	ldr	r3, [r6, #3796]
-	mla	r3, r2, r0, r3
-	str	r1, [r3, #16]
-	str	r3, [fp, #-72]
-	.loc 5 706 0
-	bl	Ftl_get_new_temp_ppa
+.L1562:
+	.loc 5 681 0
+	uxth	r2, r3
 .LVL1360:
-	ldr	r3, [fp, #-72]
-	.loc 5 707 0
-	ldr	r1, [r6, #3144]
-	ldr	r2, [fp, #-76]
-	.loc 5 706 0
-	str	r0, [r3, #4]
-	.loc 5 707 0
-	ldr	r3, [r6, #3796]
-	mla	r2, r2, r1, r3
-	ldr	r3, [r6, #3160]
-	add	r3, r3, r7
-	ldr	r1, [r3, #8]
-	str	r1, [r2, #8]
-	.loc 5 716 0
-	mov	r1, #1
-	.loc 5 708 0
-	ldr	r3, [r3, #12]
-	str	r3, [r2, #12]
-	.loc 5 709 0
-	ldr	r3, [fp, #-48]
+	cmp	lr, r2
+	bhi	.L1555
+	.loc 5 689 0
+	mov	fp, #0
+	ldrb	r2, [r4, #2572]	@ zero_extendqisi2
+	mov	r1, r8
+	bl	FlashReadPages
 .LVL1361:
-	str	r3, [r9, #12]
-	.loc 5 710 0
-	ldr	r3, .L1584+48
+.L1556:
+	.loc 5 691 0
+	uxth	r3, fp
+	cmp	r8, r3
+	bhi	.L1560
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L1611
+.L1560:
+	mov	r9, #20
+	.loc 5 692 0
+	ldr	r3, [r4, #3156]
+	mul	r9, r9, fp
+	add	r2, r3, r9
+	.loc 5 693 0
+	ldr	r3, [r3, r9]
+	adds	r3, r3, #1
+	beq	.L1557
+	.loc 5 692 0
+	ldr	r10, [r2, #12]
+	.loc 5 693 0
+	movw	r3, #61589
+	ldrh	r2, [r10]
+	cmp	r2, r3
+	bne	.L1557
+	.loc 5 695 0
+	ldr	r3, [r10, #8]
 .LVL1362:
-	ldrh	r2, [r3]
-	str	r3, [fp, #-72]
-	strh	r2, [r9, #2]	@ movhi
-	.loc 5 713 0
-	ldr	r2, [r6, #2476]
-	.loc 5 716 0
-	ldr	r0, [r6, #3160]
-	.loc 5 713 0
-	str	r2, [r9, #4]
-	.loc 5 715 0
-	ldr	r2, [r6, #3144]
-	.loc 5 716 0
-	add	r0, r0, r7
-	.loc 5 715 0
-	add	r2, r2, #1
-	str	r2, [r6, #3144]
-	.loc 5 716 0
-	bl	FtlGcBufAlloc
+	.loc 5 696 0
+	adds	r2, r3, #1
+	bne	.L1558
+	mov	r2, #696
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
+	str	r3, [sp, #16]
+	bl	printk
 .LVL1363:
-	.loc 5 717 0
-	ldrb	r1, [r6, #2383]	@ zero_extendqisi2
-	ldr	r2, [r6, #3144]
-	cmp	r1, r2
-	beq	.L1533
-	ldr	r3, [fp, #-72]
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L1531
-.L1533:
-	.loc 5 718 0
-	bl	Ftl_gc_temp_data_write_back
+	ldr	r3, [sp, #16]
 .LVL1364:
-	cmp	r0, #0
-	.loc 5 719 0
-	ldrne	r3, .L1584
-	movne	r2, #0
-	.loc 5 720 0
-	ldrhne	r0, [r8, #-4]
-	.loc 5 719 0
-	strne	r2, [r3, #3780]
-	bne	.L1472
+.L1558:
+	.loc 5 697 0
+	movs	r2, #0
+	mov	r0, r3
+	add	r1, sp, #28
+	bl	log2phys
 .LVL1365:
-.L1531:
-	ldr	r3, [fp, #-60]
-	add	r3, r3, #1
-	b	.L1580
+	.loc 5 698 0
+	ldr	r0, [r4, #3156]
+	ldr	r3, [sp, #28]
+	add	r0, r0, r9
+	ldr	r2, [r0, #4]
+	cmp	r2, r3
+	bne	.L1557
+	.loc 5 700 0
+	ldrh	r3, [r7, #-226]
+	.loc 5 701 0
+	movs	r2, #20
+	ldr	r1, [r4, #3140]
+	str	r2, [sp, #20]
+	.loc 5 700 0
+	adds	r3, r3, #1
+	strh	r3, [r7, #-226]	@ movhi
+	.loc 5 701 0
+	ldr	r3, [r4, #3796]
+	mla	r3, r2, r1, r3
+	ldr	r1, [r0, #16]
+	str	r1, [r3, #16]
+	str	r3, [sp, #16]
+	.loc 5 702 0
+	bl	Ftl_get_new_temp_ppa
 .LVL1366:
-.L1535:
-	.loc 5 727 0
-	ldrh	r3, [r8, #2]
-	add	r5, r5, r3
+	ldr	r3, [sp, #16]
+	.loc 5 703 0
+	ldr	r1, [r4, #3796]
+	ldr	r2, [sp, #20]
+	.loc 5 702 0
+	str	r0, [r3, #4]
+	.loc 5 703 0
+	ldr	r3, [r4, #3140]
+	mla	r3, r2, r3, r1
+	ldr	r2, [r4, #3156]
+	add	r2, r2, r9
+	ldr	r1, [r2, #8]
+	str	r1, [r3, #8]
+	.loc 5 712 0
+	movs	r1, #1
+	.loc 5 704 0
+	ldr	r2, [r2, #12]
+	str	r2, [r3, #12]
+	.loc 5 705 0
+	ldr	r3, [sp, #28]
 .LVL1367:
-	.loc 5 729 0
-	ldr	r3, [fp, #-68]
+	str	r3, [r10, #12]
+	.loc 5 706 0
+	ldrh	r3, [r4, #2420]
 .LVL1368:
-	.loc 5 727 0
-	uxth	r5, r5
-	.loc 5 729 0
-	cmp	r3, r5
-	.loc 5 727 0
-	strh	r5, [r8, #2]	@ movhi
-	ldr	r5, .L1584+12
-	.loc 5 729 0
-	bls	.L1537
-	ldrh	r2, [r5, #-2]
+	strh	r3, [r10, #2]	@ movhi
+	.loc 5 709 0
+	ldr	r3, [r4, #2520]
+	.loc 5 712 0
+	ldr	r0, [r4, #3156]
+	.loc 5 709 0
+	str	r3, [r10, #4]
+	.loc 5 711 0
+	ldr	r3, [r4, #3140]
+	.loc 5 712 0
+	add	r0, r0, r9
+	.loc 5 711 0
+	adds	r3, r3, #1
+	str	r3, [r4, #3140]
+	.loc 5 712 0
+	bl	FtlGcBufAlloc
 .LVL1369:
-	ldrh	r3, [r5]
-.LVL1370:
+	.loc 5 713 0
+	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
+	ldr	r3, [r4, #3140]
 	cmp	r2, r3
-	bne	.L1538
+	beq	.L1559
+	ldrh	r3, [r4, #2424]
+	cbnz	r3, .L1557
+.L1559:
+	.loc 5 714 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1370:
+	cbz	r0, .L1557
+.L1614:
+	.loc 5 729 0
+	movs	r3, #0
+	.loc 5 730 0
+	ldrh	r0, [r7, #-228]
+	.loc 5 729 0
+	str	r3, [r4, #3780]
+	b	.L1496
+.L1557:
+	add	fp, fp, #1
+	b	.L1556
 .LVL1371:
-.L1537:
-	.loc 5 731 0
-	ldr	r3, [r10, #3144]
+.L1561:
+	.loc 5 723 0
+	ldrh	r3, [r4, #2566]
+	add	r6, r6, r3
 .LVL1372:
-	cmp	r3, #0
-	beq	.L1539
-	.loc 5 732 0
-	bl	Ftl_gc_temp_data_write_back
-.LVL1373:
-	cmp	r0, #0
-	.loc 5 733 0
-	movne	r3, #0
-	.loc 5 734 0
-	ldrhne	r0, [r5, #-4]
-	.loc 5 733 0
-	strne	r3, [r10, #3780]
-	bne	.L1472
+	.loc 5 725 0
+	ldr	r3, [sp, #12]
+.LVL1373:
+	.loc 5 723 0
+	uxth	r6, r6
+	.loc 5 725 0
+	cmp	r3, r6
+	.loc 5 723 0
+	strh	r6, [r4, #2566]	@ movhi
+	.loc 5 725 0
+	bls	.L1563
+	ldrh	r2, [r7, #-226]
+	ldrh	r3, [r7, #-224]
 .LVL1374:
-.L1539:
-	.loc 5 737 0
-	ldrh	r1, [r5, #-2]
-	cmp	r1, #0
-	bne	.L1540
-	ldrh	r3, [r8]
-	ldr	r2, [r10, #2260]
+	cmp	r2, r3
+	bne	.L1564
 .LVL1375:
-	lsl	r3, r3, #1
-	ldrh	r0, [r2, r3]
-	cmp	r0, #0
-	beq	.L1540
-	.loc 5 739 0
-	strh	r1, [r2, r3]	@ movhi
-	.loc 5 740 0
-	ldrh	r0, [r8]
-	bl	update_vpc_list
+.L1563:
+	.loc 5 727 0
+	ldr	r3, [r4, #3140]
 .LVL1376:
-	.loc 5 741 0
-	bl	FtlCacheWriteBack
+	cbz	r3, .L1565
+	.loc 5 728 0
+	bl	Ftl_gc_temp_data_write_back
 .LVL1377:
-	.loc 5 742 0
-	bl	l2p_flush
+	cmp	r0, #0
+	bne	.L1614
+.L1565:
+	.loc 5 733 0
+	ldrh	r1, [r7, #-226]
+	cbnz	r1, .L1566
+	ldrh	r2, [r4, #2564]
+	ldr	r3, [r4, #2300]
+	ldrh	r0, [r3, r2, lsl #1]
+	cbz	r0, .L1566
+	.loc 5 735 0
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 5 736 0
+	ldrh	r0, [r4, #2564]
+	bl	update_vpc_list
 .LVL1378:
-	.loc 5 743 0
-	bl	FtlVpcTblFlush
+	.loc 5 737 0
+	bl	FtlCacheWriteBack
 .LVL1379:
-.L1540:
-	.loc 5 745 0
-	mvn	r3, #0
-	strh	r3, [r8]	@ movhi
-.L1538:
-	.loc 5 747 0
-	ldr	r3, .L1584+56
-	ldrh	r3, [r3]
-	cmp	r3, #2
-	bhi	.L1541
-	.loc 5 749 0
-	ldrh	r5, [r10, #78]
+	.loc 5 738 0
+	bl	l2p_flush
 .LVL1380:
-.L1513:
-	.loc 5 631 0
-	ldr	r7, .L1584+20
-	movw	r3, #65535
-	ldrh	r2, [r7]
+	.loc 5 739 0
+	bl	FtlVpcTblFlush
 .LVL1381:
-	cmp	r2, r3
-	bne	.L1514
-	.loc 5 635 0
-	add	r8, r7, #568
-	.loc 5 632 0
-	mov	r3, #0
-	str	r3, [r10, #3140]
-.L1515:
-	.loc 5 635 0
-	ldrh	r9, [r8]
+.L1566:
+	.loc 5 741 0
+	movw	r3, #65535
+	strh	r3, [r4, #2564]	@ movhi
+.L1564:
+	.loc 5 743 0
+	ldrh	r3, [r4, #2320]
+	cmp	r3, #2
+	bhi	.L1567
+	.loc 5 745 0
+	ldrh	r6, [r4, #78]
 .LVL1382:
-	mov	r0, r9
-	bl	List_get_gc_head_node
+	b	.L1539
 .LVL1383:
-	ldr	r1, .L1584+20
-	uxth	r2, r0
-	strh	r2, [r1]	@ movhi
-	.loc 5 636 0
-	movw	r1, #65535
-	cmp	r2, r1
-	bne	.L1516
-	.loc 5 637 0
-	mov	r3, #0
-	.loc 5 638 0
-	mov	r0, #8
-	.loc 5 637 0
-	strh	r3, [r8]	@ movhi
-	b	.L1472
+.L1567:
+	.loc 5 750 0
+	ldrh	r0, [r7, #-228]
+	.loc 5 748 0
+	movs	r2, #0
+	str	r2, [r4, #3780]
+	.loc 5 750 0
+	cmp	r0, #0
+	bne	.L1496
+	.loc 5 753 0
+	adds	r0, r3, #1
+	b	.L1496
 .LVL1384:
-.L1541:
-	.loc 5 754 0
-	ldrh	r0, [r5, #-4]
-	.loc 5 752 0
-	mov	r2, #0
-.LVL1385:
-	str	r2, [r10, #3780]
-	.loc 5 754 0
-	cmp	r0, r2
-	.loc 5 757 0
-	addeq	r0, r3, #1
-	b	.L1472
-.L1585:
+.L1571:
+.LBE526:
+.LBE529:
+	.loc 5 479 0
+	movs	r0, #0
+	b	.L1496
+.L1618:
 	.align	2
-.L1584:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LANCHOR0+3184
-	.word	.LANCHOR3-4064
-	.word	.LC100
-	.word	.LANCHOR0+2568
-	.word	.LANCHOR0+3172
-	.word	.LANCHOR0+3136
-	.word	.LANCHOR0+2280
+.L1617:
+	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
-	.word	.LANCHOR0+2328
-	.word	.LANCHOR0+2376
-	.word	.LANCHOR3-4066
-	.word	.LANCHOR0+2276
-.LBE503:
-.LBE505:
-.LFE259:
+	.word	.LANCHOR0+2564
+	.word	.LANCHOR0+2578
+.LVL1385:
+.L1502:
+.LBB530:
+.LBB527:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1569
+.L1512:
+	.loc 5 557 0
+	ldrh	r2, [r4, #2420]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1580
+.L1570:
+	ldrh	r3, [r4, #3178]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1580
+	cmp	r5, r3
+	bne	.L1580
+	ldrh	r3, [r4, #2564]
+	cmp	r3, r5
+	beq	.L1524
+.L1529:
+	.loc 5 556 0
+	movw	r5, #65535
+.L1580:
+	movs	r6, #1
+.LVL1386:
+	b	.L1523
+.LVL1387:
+.L1504:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1569
+	movw	r5, #65535
+	b	.L1570
+.L1503:
+	cmp	r7, #0
+	bne	.L1529
+	b	.L1569
+.LBE527:
+.LBE530:
+.LFE269:
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.align	2
+	.align	1
 	.global	sftl_gc
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_gc, %function
 sftl_gc:
 	.fnstart
-.LFB260:
-	.loc 5 761 0
+.LFB270:
+	.loc 5 757 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI424:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI425:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI426:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 5 761 0
-	.loc 5 762 0
-	mov	r1, #1
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 5 758 0
+	movs	r1, #1
 	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-.LVL1386:
-	.loc 5 763 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE260:
+	b	rk_ftl_garbage_collect
+.LVL1388:
+.LFE270:
 	.fnend
 	.size	sftl_gc, .-sftl_gc
-	.align	2
+	.align	1
 	.global	FtlRead
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlRead, %function
 FtlRead:
 	.fnstart
-.LFB154:
-	.loc 3 813 0
+.LFB164:
+	.loc 3 814 0
 	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1387:
-	.movsp ip
-	mov	ip, sp
-.LCFI427:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI428:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI429:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1389:
+	.loc 3 824 0
+	cmp	r0, #16
+	.loc 3 814 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI188:
 	.pad #60
 	sub	sp, sp, #60
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 813 0
-	.loc 3 823 0
-	cmp	r0, #16
-	.loc 3 813 0
+.LCFI189:
+	.loc 3 814 0
 	mov	r7, r1
-	str	r2, [fp, #-76]
-	mov	r9, r3
-	.loc 3 823 0
-	bne	.L1588
+	mov	r10, r3
+	str	r2, [sp, #28]
 	.loc 3 824 0
+	bne	.L1621
+	.loc 3 825 0
 	mov	r2, r3
-.LVL1388:
-	ldr	r1, [fp, #-76]
-	add	r0, r7, #256
-.LVL1389:
-	bl	FtlVendorPartRead
 .LVL1390:
-	str	r0, [fp, #-56]
+	ldr	r1, [sp, #28]
+	add	r0, r7, #256
 .LVL1391:
-.L1587:
-	.loc 3 900 0
-	ldr	r0, [fp, #-56]
+	bl	FtlVendorPartRead
 .LVL1392:
-	sub	sp, fp, #40
-.LCFI430:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+	mov	r8, r0
 .LVL1393:
-.L1588:
-.LCFI431:
-	.loc 3 829 0
-	ldr	r3, [fp, #-76]
+.L1620:
+	.loc 3 901 0
+	mov	r0, r8
 .LVL1394:
-	ldr	r4, .L1621
-	add	r3, r1, r3
+	add	sp, sp, #60
+.LCFI190:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL1395:
-	str	r3, [fp, #-64]
-	ldr	r2, [fp, #-64]
+.L1621:
+.LCFI191:
+	.loc 3 830 0
+	ldr	r3, [sp, #28]
+.LVL1396:
+	ldr	r4, .L1652
+	adds	r3, r1, r3
+.LVL1397:
+	str	r3, [sp, #8]
+	ldr	r2, [sp, #8]
 	ldr	r3, [r4, #116]
 	cmp	r2, r3
-	bhi	.L1608
-	.loc 3 829 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1621+4
+	bhi	.L1641
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1652+4
 	ldr	r3, [r3]
-	cmn	r3, #1
-	beq	.L1609
-	.loc 3 832 0 is_stmt 1
+	adds	r5, r3, #1
+	beq	.L1642
+	.loc 3 833 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1396:
-	.loc 3 834 0
+.LVL1398:
+	.loc 3 835 0
 	ldrh	r5, [r4, #34]
 	mov	r0, r7
-	.loc 3 827 0
-	mov	r8, #0
-.LVL1397:
-	.loc 3 839 0
-	mov	r6, r8
-.LVL1398:
-	.loc 3 834 0
-	mov	r1, r5
-	bl	__aeabi_uidiv
+	.loc 3 828 0
+	mov	r9, #0
 .LVL1399:
+	.loc 3 840 0
+	mov	r6, r9
+.LVL1400:
+	.loc 3 815 0
+	mov	r8, r9
 	.loc 3 835 0
-	ldr	r3, [fp, #-64]
 	mov	r1, r5
-	.loc 3 834 0
-	str	r0, [fp, #-68]
-	.loc 3 835 0
-	sub	r0, r3, #1
 	bl	__aeabi_uidiv
-.LVL1400:
-	.loc 3 836 0
-	ldr	r3, [fp, #-68]
 .LVL1401:
-	.loc 3 834 0
-	ldr	r5, [fp, #-68]
-.LVL1402:
+	.loc 3 836 0
+	ldr	r3, [sp, #8]
+	mov	r1, r5
 	.loc 3 835 0
-	str	r0, [fp, #-72]
+	str	r0, [sp, #12]
 	.loc 3 836 0
-	rsb	r3, r3, #1
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+.LVL1402:
+	.loc 3 837 0
+	ldr	r3, [sp, #12]
 .LVL1403:
-	.loc 3 827 0
-	str	r8, [fp, #-84]
+	.loc 3 835 0
+	ldr	r5, [sp, #12]
 .LVL1404:
 	.loc 3 836 0
-	add	r3, r3, r0
+	str	r0, [sp, #16]
+	.loc 3 837 0
+	rsb	r3, r3, #1
 .LVL1405:
-	.loc 3 819 0
-	str	r8, [fp, #-80]
-	.loc 3 836 0
-	str	r3, [fp, #-60]
-	.loc 3 840 0
-	ldr	r2, [fp, #-60]
+	.loc 3 828 0
+	str	r9, [sp, #24]
 .LVL1406:
-	ldr	r3, [r4, #2440]
-	.loc 3 814 0
-	str	r8, [fp, #-56]
-	.loc 3 840 0
-	add	r3, r3, r2
-	str	r3, [r4, #2440]
+	.loc 3 837 0
+	add	r3, r3, r0
 .LVL1407:
-.L1590:
+	.loc 3 820 0
+	str	r9, [sp, #20]
+	.loc 3 837 0
+	str	r3, [sp, #4]
 	.loc 3 841 0
-	ldr	r3, [fp, #-60]
+	ldr	r2, [sp, #4]
 .LVL1408:
-	cmp	r3, #0
-	bne	.L1606
-	.loc 3 897 0
-	ldr	r3, .L1621
+	ldr	r3, [r4, #2484]
+	add	r3, r3, r2
+	str	r3, [r4, #2484]
 .LVL1409:
-	movw	r2, #3186
-	ldrh	r2, [r3, r2]
-	cmp	r2, #0
-	bne	.L1607
-	.loc 3 897 0 is_stmt 0 discriminator 1
-	movw	r2, #2276
-	ldrh	r3, [r3, r2]
-	cmp	r3, #31
-	bhi	.L1587
-.L1607:
-	.loc 3 898 0 is_stmt 1
-	mov	r1, #1
-	mov	r0, #0
+.L1623:
+	.loc 3 842 0
+	ldr	r3, [sp, #4]
 .LVL1410:
-	bl	rk_ftl_garbage_collect
+	cbnz	r3, .L1639
+	.loc 3 898 0
+	ldr	r3, .L1652
 .LVL1411:
-	b	.L1587
+	ldrh	r2, [r3, #3182]
+	cbnz	r2, .L1640
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3, #2320]
+	cmp	r3, #31
+	bhi	.L1620
+.L1640:
+	.loc 3 899 0 is_stmt 1
+	movs	r1, #1
+	movs	r0, #0
 .LVL1412:
-.L1606:
-	.loc 3 842 0
-	mov	r2, #0
-	sub	r1, fp, #48
-	mov	r0, r5
+	bl	rk_ftl_garbage_collect
 .LVL1413:
-	bl	log2phys
+	b	.L1620
 .LVL1414:
+.L1639:
 	.loc 3 843 0
-	ldr	r2, [fp, #-48]
-	cmn	r2, #1
-	moveq	r10, #0
+	movs	r2, #0
+	add	r1, sp, #52
+	mov	r0, r5
 .LVL1415:
-	beq	.L1592
-	.loc 3 850 0
-	ldr	r3, [r4, #3792]
-	mov	r1, #20
-	ldrh	r10, [r4, #34]
+	bl	log2phys
 .LVL1416:
-	mla	r3, r1, r6, r3
-	str	r2, [r3, #4]
-	.loc 3 851 0
-	ldr	r2, [fp, #-68]
+	.loc 3 844 0
+	ldr	r2, [sp, #52]
+	adds	r0, r2, #1
+	bne	.L1624
+	mov	fp, #0
 .LVL1417:
-	cmp	r5, r2
-	bne	.L1596
-	.loc 3 852 0
-	ldr	r2, [r4, #3776]
+.L1625:
+	.loc 3 845 0 discriminator 1
+	ldrh	r0, [r4, #34]
 .LVL1418:
-	.loc 3 853 0
-	mov	r1, r10
-	mov	r0, r7
-	.loc 3 852 0
-	str	r3, [fp, #-88]
-	str	r2, [r3, #8]
-	.loc 3 853 0
-	bl	__aeabi_uidivmod
+	cmp	fp, r0
+	bcc	.L1627
+.L1628:
+	.loc 3 874 0
+	ldr	r3, [sp, #4]
 .LVL1419:
-	ldr	r3, [fp, #-76]
-.LVL1420:
-	.loc 3 854 0
-	sub	r2, r10, r1
-	.loc 3 853 0
-	str	r1, [fp, #-80]
-.LVL1421:
-	cmp	r3, r2
-	movcs	r3, r2
-.LVL1422:
-	.loc 3 856 0
-	cmp	r3, r10
-	str	r3, [fp, #-84]
-	ldr	r3, [fp, #-88]
-	.loc 3 857 0
-	streq	r9, [r3, #8]
-.LVL1423:
-.L1597:
-	.loc 3 866 0
-	ldrh	r2, [r4, #88]
-.LVL1424:
-	ldr	r1, [r4, #3772]
-	.loc 3 867 0
-	str	r5, [r3, #16]
-	.loc 3 866 0
-	mul	r2, r6, r2
-	.loc 3 868 0
-	add	r6, r6, #1
-	.loc 3 866 0
-	bic	r2, r2, #3
-	add	r2, r1, r2
-	str	r2, [r3, #12]
-	b	.L1595
-.LVL1425:
-.L1594:
-	.loc 3 845 0
-	mla	r0, r0, r5, r10
-.LVL1426:
-	.loc 3 846 0
-	ldr	r3, [fp, #-64]
-	cmp	r3, r0
-	movhi	r3, #1
-	movls	r3, #0
-	cmp	r7, r0
-	movhi	r3, #0
-	cmp	r3, #0
-	beq	.L1593
-	.loc 3 847 0
-	sub	r0, r0, r7
-.LVL1427:
-.LBB512:
-.LBB513:
-.LBB514:
-	.loc 1 202 0
-	mov	r1, #512
-	add	r0, r9, r0, lsl #9
-	bl	__memzero
-.LVL1428:
-.L1593:
-.LBE514:
-.LBE513:
-.LBE512:
-	.loc 3 844 0 discriminator 2
-	add	r10, r10, #1
-.L1592:
-	.loc 3 844 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r4, #34]
-.LVL1429:
-	cmp	r10, r0
-	bcc	.L1594
-.L1595:
-	.loc 3 873 0 is_stmt 1
-	ldr	r3, [fp, #-60]
-.LVL1430:
-	.loc 3 871 0
-	add	r5, r5, #1
-	.loc 3 873 0
+	.loc 3 872 0
+	adds	r5, r5, #1
+	.loc 3 874 0
 	subs	r3, r3, #1
-	str	r3, [fp, #-60]
-	beq	.L1599
-	.loc 3 873 0 is_stmt 0 discriminator 1
+	str	r3, [sp, #4]
+	beq	.L1632
+	.loc 3 874 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #8]
-.LVL1431:
+.LVL1420:
 	cmp	r6, r3, lsl #2
-	bne	.L1590
-.LVL1432:
-.L1599:
-	.loc 3 874 0 is_stmt 1
+	bne	.L1623
+.LVL1421:
+.L1632:
+	.loc 3 875 0 is_stmt 1
 	cmp	r6, #0
-	beq	.L1590
-	.loc 3 875 0
-	mov	r2, #0
+	beq	.L1623
+	.loc 3 876 0
+	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [r4, #3792]
+	.loc 3 877 0
+	mov	fp, #0
+.LVL1422:
 	.loc 3 876 0
-	mov	r10, #0
-.LVL1433:
-	.loc 3 875 0
 	bl	FlashReadPages
-.LVL1434:
-	.loc 3 882 0
-	lsl	r3, r8, #9
-	str	r3, [fp, #-96]
-	.loc 3 879 0
-	ldr	r3, [fp, #-80]
-.LVL1435:
-	lsl	r3, r3, #9
-.LVL1436:
-	str	r3, [fp, #-88]
-	ldr	r3, [fp, #-84]
-	lsl	r3, r3, #9
-	str	r3, [fp, #-92]
-.L1605:
-	mov	r3, #20
-	.loc 3 877 0
+.LVL1423:
+	.loc 3 883 0
+	lsl	r3, r9, #9
+	str	r3, [sp, #40]
+	.loc 3 880 0
+	ldr	r3, [sp, #20]
+.LVL1424:
+	lsls	r3, r3, #9
+.LVL1425:
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #36]
+.L1638:
+	movs	r3, #20
+	.loc 3 878 0
 	ldr	r2, [r4, #3792]
-	mul	r3, r3, r10
-	ldr	r0, [fp, #-68]
-.LVL1437:
+	mul	r3, r3, fp
+	ldr	r0, [sp, #12]
+.LVL1426:
 	add	r2, r2, r3
 	ldr	r1, [r2, #16]
 	cmp	r0, r1
-	bne	.L1601
-	.loc 3 878 0
+	bne	.L1634
+	.loc 3 879 0
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3776]
 	cmp	r1, r2
-	bne	.L1602
-	str	r3, [fp, #-100]
-	.loc 3 879 0
-	mov	r0, r9
-.LVL1438:
-	ldr	r3, [fp, #-88]
-	ldr	r2, [fp, #-92]
+	bne	.L1635
+	str	r3, [sp, #44]
+	.loc 3 880 0
+	mov	r0, r10
+.LVL1427:
+	ldr	r3, [sp, #32]
+	ldr	r2, [sp, #36]
 	add	r1, r1, r3
-.LVL1439:
-.L1620:
-	.loc 3 882 0
+.LVL1428:
+.L1651:
+	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1440:
-	ldr	r3, [fp, #-100]
-.LVL1441:
-.L1602:
-	.loc 3 884 0
+.LVL1429:
+	ldr	r3, [sp, #44]
+.LVL1430:
+.L1635:
+	.loc 3 885 0
 	ldr	r2, [r4, #3792]
 	ldr	r0, [r2, r3]
-.LVL1442:
+.LVL1431:
 	add	ip, r2, r3
-	cmn	r0, #1
-	.loc 3 885 0
-	ldreq	r1, [r4, #2688]
+	adds	r1, r0, #1
+	.loc 3 886 0
+	itttt	eq
+	ldreq	r1, [r4, #2684]
+	.loc 3 887 0
+	moveq	r8, r0
 	.loc 3 886 0
-	streq	r0, [fp, #-56]
-	.loc 3 885 0
 	addeq	r1, r1, #1
-	streq	r1, [r4, #2688]
-	.loc 3 888 0
+	streq	r1, [r4, #2684]
+	.loc 3 889 0
 	ldr	r3, [r2, r3]
 	cmp	r3, #256
-	bne	.L1604
-.LBB515:
-	.loc 3 889 0
+	bne	.L1637
+.LBB537:
+	.loc 3 890 0
 	ldr	r0, [ip, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1443:
-	.loc 3 890 0
+.LVL1432:
+	.loc 3 891 0
 	bl	FtlGcRefreshBlock
+.LVL1433:
+.L1637:
+.LBE537:
+	.loc 3 877 0 discriminator 2
+	add	fp, fp, #1
+	cmp	r6, fp
+	bne	.L1638
+	.loc 3 894 0
+	movs	r6, #0
+	b	.L1623
+.LVL1434:
+.L1627:
+	.loc 3 846 0
+	mla	r0, r0, r5, fp
+.LVL1435:
+	.loc 3 847 0
+	cmp	r7, r0
+	bhi	.L1626
+	.loc 3 847 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #8]
+	cmp	r3, r0
+	bls	.L1626
+	.loc 3 848 0 is_stmt 1
+	subs	r0, r0, r7
+.LVL1436:
+.LBB538:
+.LBB539:
+.LBB540:
+	.loc 1 202 0
+	mov	r1, #512
+	add	r0, r10, r0, lsl #9
+	bl	__memzero
+.LVL1437:
+.L1626:
+.LBE540:
+.LBE539:
+.LBE538:
+	.loc 3 845 0 discriminator 2
+	add	fp, fp, #1
+	b	.L1625
+.LVL1438:
+.L1624:
+	.loc 3 851 0
+	ldr	r3, [r4, #3792]
+	movs	r1, #20
+	ldrh	fp, [r4, #34]
+.LVL1439:
+	mla	r3, r1, r6, r3
+	str	r2, [r3, #4]
+	.loc 3 852 0
+	ldr	r2, [sp, #12]
+.LVL1440:
+	cmp	r5, r2
+	bne	.L1629
+	.loc 3 853 0
+	ldr	r2, [r4, #3776]
+.LVL1441:
+	.loc 3 854 0
+	mov	r1, fp
+	mov	r0, r7
+	.loc 3 853 0
+	str	r3, [sp, #32]
+	str	r2, [r3, #8]
+	.loc 3 854 0
+	bl	__aeabi_uidivmod
+.LVL1442:
+	.loc 3 855 0
+	sub	r2, fp, r1
+	.loc 3 854 0
+	str	r1, [sp, #20]
+.LVL1443:
+	ldr	r1, [sp, #28]
 .LVL1444:
-.L1604:
-.LBE515:
-	.loc 3 876 0 discriminator 2
-	add	r10, r10, #1
-	cmp	r6, r10
-	bne	.L1605
-	.loc 3 893 0
-	mov	r6, #0
-	b	.L1590
-.LVL1445:
-.L1596:
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	.loc 3 857 0
+	cmp	r3, fp
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #32]
+	bne	.L1630
 	.loc 3 858 0
-	ldr	r2, [fp, #-72]
+	str	r10, [r3, #8]
+.L1630:
+	.loc 3 867 0
+	ldrh	r2, [r4, #88]
+	ldr	r1, [r4, #3772]
+.LVL1445:
+	.loc 3 868 0
+	str	r5, [r3, #16]
+	.loc 3 867 0
+	muls	r2, r6, r2
+	.loc 3 869 0
+	adds	r6, r6, #1
+	.loc 3 867 0
+	bic	r2, r2, #3
+	add	r2, r2, r1
+	str	r2, [r3, #12]
+	b	.L1628
 .LVL1446:
-	cmp	r5, r2
-	bne	.L1598
+.L1629:
 	.loc 3 859 0
-	ldr	r2, [r4, #3768]
+	ldr	r2, [sp, #16]
 .LVL1447:
+	cmp	r5, r2
+	bne	.L1631
 	.loc 3 860 0
-	ldr	r1, [fp, #-64]
-	.loc 3 859 0
-	str	r2, [r3, #8]
+	ldr	r2, [r4, #3768]
+.LVL1448:
+	.loc 3 861 0
+	ldr	r1, [sp, #8]
 	.loc 3 860 0
-	mul	r2, r10, r5
-	sub	r8, r1, r2
+	str	r2, [r3, #8]
 	.loc 3 861 0
-	cmp	r10, r8
+	mul	r2, fp, r5
+	sub	r9, r1, r2
 	.loc 3 862 0
-	subeq	r2, r2, r7
-	addeq	r2, r9, r2, lsl #9
-	streq	r2, [r3, #8]
-	b	.L1597
-.LVL1448:
-.L1598:
-	.loc 3 864 0
-	mul	r10, r5, r10
-	sub	r10, r10, r7
-	add	r10, r9, r10, lsl #9
-	str	r10, [r3, #8]
-	b	.L1597
+	cmp	fp, r9
+	bne	.L1630
+.L1650:
+	.loc 3 865 0
+	subs	r2, r2, r7
+	add	r2, r10, r2, lsl #9
+	str	r2, [r3, #8]
+	b	.L1630
 .LVL1449:
-.L1601:
-	.loc 3 880 0
-	ldr	r0, [fp, #-72]
+.L1631:
+	mul	r2, r5, fp
 .LVL1450:
-	cmp	r0, r1
-	bne	.L1602
+	b	.L1650
+.LVL1451:
+.L1634:
 	.loc 3 881 0
+	ldr	r0, [sp, #16]
+.LVL1452:
+	cmp	r0, r1
+	bne	.L1635
+	.loc 3 882 0
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3768]
 	cmp	r1, r2
-	bne	.L1602
-	str	r3, [fp, #-100]
-	.loc 3 882 0
+	bne	.L1635
+	str	r3, [sp, #44]
+	.loc 3 883 0
 	ldrh	r0, [r4, #34]
-.LVL1451:
-	ldr	r3, [fp, #-72]
-.LVL1452:
-	ldr	r2, [fp, #-96]
-	mul	r0, r3, r0
-	sub	r0, r0, r7
-	add	r0, r9, r0, lsl #9
-	b	.L1620
 .LVL1453:
-.L1608:
-	.loc 3 830 0
-	mvn	r3, #0
-.L1609:
-	str	r3, [fp, #-56]
-	b	.L1587
-.L1622:
+	ldr	r3, [sp, #16]
+.LVL1454:
+	ldr	r2, [sp, #40]
+	muls	r0, r3, r0
+	subs	r0, r0, r7
+	add	r0, r10, r0, lsl #9
+	b	.L1651
+.LVL1455:
+.L1641:
+	.loc 3 831 0
+	mov	r8, #-1
+	b	.L1620
+.L1642:
+	mov	r8, r3
+	b	.L1620
+.L1653:
 	.align	2
-.L1621:
+.L1652:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-.LFE154:
+.LFE164:
 	.fnend
 	.size	FtlRead, .-FtlRead
-	.align	2
+	.align	1
 	.global	sftl_read
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_read, %function
 sftl_read:
 	.fnstart
-.LFB159:
-	.loc 3 1201 0
+.LFB169:
+	.loc 3 1204 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1454:
-	.movsp ip
-	mov	ip, sp
-.LCFI432:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI433:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI434:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 1201 0
-	.loc 3 1202 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1456:
+	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1455:
-	mov	r1, r0
-.LVL1456:
-	mov	r0, #0
 .LVL1457:
-	bl	FtlRead
+	mov	r1, r0
 .LVL1458:
-	.loc 3 1204 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE159:
+	movs	r0, #0
+.LVL1459:
+	b	FtlRead
+.LVL1460:
+.LFE169:
 	.fnend
 	.size	sftl_read, .-sftl_read
-	.align	2
+	.align	1
 	.global	FtlWrite
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
 	.fnstart
-.LFB157:
-	.loc 3 959 0
+.LFB167:
+	.loc 3 962 0
 	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1459:
-	.movsp ip
-	mov	ip, sp
-.LCFI435:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI436:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI437:
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1461:
+	.loc 3 970 0
+	cmp	r0, #16
+	.loc 3 962 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI192:
 	.pad #68
 	sub	sp, sp, #68
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 959 0
-	.loc 3 967 0
-	cmp	r0, #16
-	.loc 3 959 0
-	mov	r9, r1
-	str	r2, [fp, #-80]
-	str	r3, [fp, #-84]
-	.loc 3 967 0
-	bne	.L1625
-	.loc 3 968 0
+.LCFI193:
+	.loc 3 962 0
+	mov	r8, r1
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	.loc 3 970 0
+	bne	.L1656
+	.loc 3 971 0
 	mov	r2, r3
-.LVL1460:
-	ldr	r1, [fp, #-80]
-	add	r0, r9, #256
-.LVL1461:
-	bl	FtlVendorPartWrite
 .LVL1462:
-.L1624:
-	.loc 3 1150 0
-	sub	sp, fp, #40
-.LCFI438:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+	ldr	r1, [sp, #12]
+	add	r0, r8, #256
 .LVL1463:
-.L1625:
-.LCFI439:
-	.loc 3 971 0
-	ldr	r3, [fp, #-80]
+	bl	FtlVendorPartWrite
 .LVL1464:
-	ldr	r10, .L1690
-	add	r6, r1, r3
-	ldr	r3, [r10, #116]
+.L1655:
+	.loc 3 1153 0
+	add	sp, sp, #68
+.LCFI194:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL1465:
-	cmp	r6, r3
-	.loc 3 972 0
-	mvnhi	r0, #0
-.LVL1466:
-	.loc 3 971 0
-	bhi	.L1624
-	.loc 3 971 0 is_stmt 0 discriminator 1
-	ldr	r5, .L1690+4
-	ldr	r0, [r5]
-	cmn	r0, #1
-	beq	.L1624
-	.loc 3 974 0 is_stmt 1
-	ldr	r3, .L1690+8
-	mov	r2, #2048
-	.loc 3 975 0
-	ldrh	r4, [r10, #34]
-	mov	r0, r9
+.L1656:
+.LCFI195:
 	.loc 3 974 0
-	str	r2, [r3, #-4060]
-	.loc 3 975 0
-	mov	r1, r4
-	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+.LVL1466:
+	ldr	r4, .L1722
+	adds	r7, r1, r3
+	ldr	r3, [r4, #116]
 .LVL1467:
-	.loc 3 976 0
-	mov	r1, r4
-	.loc 3 975 0
-	mov	r8, r0
+	cmp	r7, r3
+	bhi	.L1698
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	ldr	r6, .L1722+4
+	ldr	r0, [r6]
 .LVL1468:
-	.loc 3 976 0
-	sub	r0, r6, #1
+	adds	r5, r0, #1
+	beq	.L1655
+	.loc 3 977 0 is_stmt 1
+	ldr	r3, .L1722+8
+	mov	r2, #2048
+	.loc 3 978 0
+	ldrh	r5, [r4, #34]
+	mov	r0, r8
+	.loc 3 977 0
+	str	r2, [r3, #-220]
+	.loc 3 978 0
+	mov	r1, r5
 	bl	__aeabi_uidiv
 .LVL1469:
-	.loc 3 977 0
-	sub	r6, r0, r8
-	.loc 3 980 0
-	ldr	r7, [r10, #3948]
-	.loc 3 977 0
-	add	r3, r6, #1
+	.loc 3 979 0
+	mov	r1, r5
+	.loc 3 978 0
+	mov	r10, r0
 .LVL1470:
 	.loc 3 979 0
-	add	r2, r6, #1
+	subs	r0, r7, #1
+	bl	__aeabi_uidiv
 .LVL1471:
-	.loc 3 977 0
-	str	r3, [fp, #-76]
-	.loc 3 979 0
-	ldr	r3, [r10, #2448]
 	.loc 3 980 0
-	cmp	r7, #0
-	.loc 3 976 0
-	str	r0, [fp, #-92]
-.LVL1472:
-	.loc 3 979 0
-	add	r3, r3, r2
-	str	r3, [r10, #2448]
+	sub	r7, r0, r10
+	.loc 3 983 0
+	ldr	fp, [r4, #3948]
 	.loc 3 980 0
-	beq	.L1627
-	.loc 3 981 0
-	ldr	r3, [r7, #16]
-	cmp	r8, r3
-	beq	.L1628
+	adds	r3, r7, #1
+.LVL1472:
 	.loc 3 982 0
-	bl	FtlCacheWriteBack
+	adds	r2, r7, #1
 .LVL1473:
-.L1627:
-	.loc 3 1005 0
-	ldr	r3, [r5, #8]
-	ldr	r5, .L1690+12
+	.loc 3 980 0
+	str	r3, [sp, #8]
+	.loc 3 982 0
+	ldr	r3, [r4, #2492]
+	.loc 3 979 0
+	str	r0, [sp, #20]
 .LVL1474:
-	cmp	r3, #0
-	beq	.L1630
-	.loc 3 1005 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r5, #4]
-	.loc 3 1006 0 is_stmt 1 discriminator 1
-	add	r0, r5, #48
-	cmp	r3, #0
-	moveq	r5, r0
-.L1630:
-	.loc 3 1009 0
-	ldr	r4, .L1690
-	.loc 3 1065 0
-	mov	r6, r8
+	.loc 3 982 0
+	add	r3, r3, r2
+	str	r3, [r4, #2492]
+	.loc 3 983 0
+	cmp	fp, #0
+	beq	.L1658
+	.loc 3 984 0
+	ldr	r3, [fp, #16]
+	cmp	r10, r3
+	beq	.L1659
+	.loc 3 985 0
+	bl	FtlCacheWriteBack
 .LVL1475:
-.L1631:
+.L1658:
 	.loc 3 1008 0
-	ldr	r3, [fp, #-76]
+	ldr	r3, [r6, #8]
+	cmp	r3, #0
+	beq	.L1700
+	.loc 3 1009 0 discriminator 1
+	ldr	r5, .L1722+12
+	.loc 3 1008 0 discriminator 1
+	ldrh	r2, [r4, #2328]
 .LVL1476:
+	.loc 3 1009 0 discriminator 1
+	add	r3, r5, #48
+	cmp	r2, #0
+	it	eq
+	moveq	r5, r3
+.LVL1477:
+.L1661:
+	.loc 3 1012 0
+	ldr	r4, .L1722
+	.loc 3 1068 0
+	mov	r6, r10
+.LVL1478:
+.L1662:
+	.loc 3 1011 0
+	ldr	r3, [sp, #8]
+.LVL1479:
 	cmp	r3, #0
-	beq	.L1665
-	.loc 3 1009 0
+	beq	.L1696
+	.loc 3 1012 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-.LVL1477:
 	ldrh	r3, [r4, #8]
-.LVL1478:
+.LVL1480:
 	cmp	r2, r3
-	bcc	.L1632
-	.loc 3 1009 0 is_stmt 0 discriminator 1
-	movw	r2, #1009
-	ldr	r1, .L1690+16
-	ldr	r0, .L1690+20
+	bcc	.L1663
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1722+16
+	ldr	r0, .L1722+20
 	bl	printk
-.LVL1479:
-.L1632:
-	.loc 3 1010 0 is_stmt 1
-	ldrh	r10, [r5, #4]
-	cmp	r10, #0
-	bne	.L1633
-	.loc 3 1011 0
-	bl	FtlCacheWriteBack
-.LVL1480:
-	.loc 3 1013 0
-	ldr	r3, .L1690+12
-	ldr	r7, .L1690+4
-	cmp	r5, r3
-	bne	.L1634
-	.loc 3 1014 0
-	add	r0, r5, #48
-	ldrh	r10, [r0, #4]
-	cmp	r10, #0
-	bne	.L1635
-	.loc 3 1015 0
-	bl	allocate_new_data_superblock
 .LVL1481:
-	.loc 3 1016 0
-	str	r10, [r7, #8]
-.L1635:
-	.loc 3 1018 0
-	ldr	r0, .L1690+12
-	bl	allocate_new_data_superblock
+.L1663:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	r9, [r5, #4]
 .LVL1482:
-	.loc 3 1020 0
-	ldr	r5, .L1690+12
+	cmp	r9, #0
+	bne	.L1664
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
 .LVL1483:
-	.loc 3 1019 0
-	ldr	r3, [r7, #8]
-	.loc 3 1020 0
+	.loc 3 1016 0
+	ldr	r3, .L1722+12
+	ldr	r7, .L1722+4
+	cmp	r5, r3
+	bne	.L1665
+	.loc 3 1017 0
+	ldrh	r9, [r4, #2376]
+	cmp	r9, #0
+	bne	.L1666
+	.loc 3 1018 0
 	add	r0, r5, #48
-	cmp	r3, #0
-	movne	r5, r0
+	bl	allocate_new_data_superblock
 .LVL1484:
-.L1636:
-	.loc 3 1030 0
+	.loc 3 1019 0
+	str	r9, [r7, #8]
+.L1666:
+	.loc 3 1023 0
+	ldr	r5, .L1722+12
+.LVL1485:
+	.loc 3 1021 0
+	ldr	r0, .L1722+12
+	bl	allocate_new_data_superblock
+.LVL1486:
+	.loc 3 1022 0
+	ldr	r2, [r7, #8]
+	.loc 3 1023 0
+	add	r3, r5, #48
+	cmp	r2, #0
+	it	ne
+	movne	r5, r3
+.LVL1487:
+.L1667:
+	.loc 3 1033 0
 	ldrh	r3, [r5, #4]
-	cmp	r3, #0
-	bne	.L1633
-	.loc 3 1031 0
+	cbnz	r3, .L1664
+	.loc 3 1034 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1485:
-.L1633:
-	.loc 3 1040 0
-	ldrh	r3, [r5, #4]
-	ldr	r2, [fp, #-76]
-.LVL1486:
-	cmp	r3, r2
-	movcs	r3, r2
-	.loc 3 1038 0
+.LVL1488:
+.L1664:
+	.loc 3 1041 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-.LVL1487:
-	lsl	r2, r2, #2
-	cmp	r3, r2
-	movcs	r3, r2
-	.loc 3 1042 0
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	str	r3, [fp, #-108]
+	.loc 3 1043 0
+	ldrh	r3, [r5, #4]
+	ldr	r1, [sp, #8]
+.LVL1489:
+	.loc 3 1041 0
+	lsls	r2, r2, #2
+	cmp	r3, r1
+	it	cs
+	movcs	r3, r1
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	.loc 3 1045 0
 	ldrh	r3, [r4, #8]
+	str	r2, [sp, #36]
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1637
-	.loc 3 1042 0 is_stmt 0 discriminator 1
-	movw	r2, #1042
-	ldr	r1, .L1690+16
-	ldr	r0, .L1690+20
-	bl	printk
-.LVL1488:
-.L1637:
-	.loc 3 1065 0 is_stmt 1 discriminator 1
-	mov	r3, #0
-.LVL1489:
-.L1689:
-	.loc 3 1043 0 discriminator 2
-	str	r3, [fp, #-72]
-	ldr	r3, [fp, #-72]
-	ldr	r2, [fp, #-108]
-	cmp	r3, r2
-	bne	.L1659
-.L1639:
-	.loc 3 1124 0
-	ldr	r3, [r4, #3948]
+	bcc	.L1668
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1722+16
 .LVL1490:
-	cmp	r3, #0
-	beq	.L1660
-	.loc 3 1126 0
-	ldr	r3, [fp, #-76]
+	ldr	r0, .L1722+20
+	bl	printk
 .LVL1491:
-	sub	r3, r3, #1
-	str	r3, [fp, #-76]
-	.loc 3 1127 0
-	ldr	r3, [fp, #-72]
+.L1668:
+	.loc 3 1068 0 is_stmt 1 discriminator 1
+	mov	r9, #0
 .LVL1492:
-	subs	r3, r3, #1
-	str	r3, [fp, #-72]
-	bne	.L1660
+.L1669:
+	.loc 3 1046 0 discriminator 1
+	ldr	r3, [sp, #36]
+	cmp	r9, r3
+	bne	.L1690
+.L1670:
+	.loc 3 1127 0
+	ldr	r3, [r4, #3948]
+	cmp	r3, #0
+	beq	.L1691
+	.loc 3 1129 0
+	ldr	r3, [sp, #8]
 .LVL1493:
-.L1665:
-	.loc 3 1134 0
-	ldr	r3, [fp, #-92]
+	.loc 3 1130 0
+	subs	r9, r9, #1
+	.loc 3 1129 0
+	add	r3, r3, #-1
+	str	r3, [sp, #8]
+	.loc 3 1130 0
+	bne	.L1691
+.L1696:
+	.loc 3 1137 0
+	ldr	r3, [sp, #20]
 .LVL1494:
-	mov	r0, #0
-	sub	r1, r3, r8
+	movs	r0, #0
+	.loc 3 1139 0
+	ldr	r4, .L1722
+	.loc 3 1137 0
+	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
 .LVL1495:
-	.loc 3 1136 0
-	ldr	r2, .L1690
-	movw	r3, #2276
-	ldrh	r3, [r2, r3]
+	.loc 3 1139 0
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #15
-	bhi	.L1662
-	.loc 3 1138 0
-	ldr	r4, .L1690+24
-	ldr	r5, .L1690+28
+	bhi	.L1693
+	.loc 3 1141 0
+	movw	r5, #65535
 .LVL1496:
-.L1685:
-	ldrh	r3, [r4]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1666
-	.loc 3 1138 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L1666
-	.loc 3 1139 0 is_stmt 1
-	mov	r0, #0
+.L1717:
+	ldrh	r3, [r4, #2564]
+	cmp	r3, r5
+	bne	.L1697
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #3178]
+	cmp	r3, r5
+	bne	.L1697
+	.loc 3 1142 0 is_stmt 1
+	movs	r0, #0
 	bl	List_get_gc_head_node
 .LVL1497:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
 .LVL1498:
-.L1666:
-	.loc 3 1140 0
-	ldr	r3, .L1690+32
-	.loc 3 1142 0
-	mov	r1, #1
-	.loc 3 1140 0
-	mov	r2, #128
-	.loc 3 1142 0
+.L1697:
+	.loc 3 1145 0
+	movs	r1, #1
+	.loc 3 1143 0
+	movs	r3, #128
+	.loc 3 1145 0
 	mov	r0, r1
-	.loc 3 1140 0
-	strh	r2, [r3]	@ movhi
-	.loc 3 1141 0
-	strh	r2, [r3, #-2]	@ movhi
-	.loc 3 1142 0
+	.loc 3 1143 0
+	strh	r3, [r4, #3126]	@ movhi
+	.loc 3 1144 0
+	strh	r3, [r4, #3124]	@ movhi
+	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
 .LVL1499:
-	.loc 3 1143 0
-	mov	r1, #1
-	mov	r0, #0
+	.loc 3 1146 0
+	movs	r1, #1
+	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 .LVL1500:
-	.loc 3 1144 0
-	ldr	r3, .L1690+36
-	ldrh	r3, [r3]
+	.loc 3 1147 0
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #8
-	bls	.L1685
-	b	.L1662
+	bls	.L1717
+	b	.L1693
 .LVL1501:
-.L1628:
-	.loc 3 984 0
-	ldr	r3, [r10, #2452]
-	.loc 3 985 0
-	mov	r1, r4
-	mov	r0, r9
-	.loc 3 984 0
-	add	r3, r3, #1
-	str	r3, [r10, #2452]
-	.loc 3 985 0
+.L1659:
+	.loc 3 987 0
+	ldr	r3, [r4, #2496]
+	.loc 3 988 0
+	mov	r1, r5
+	mov	r0, r8
+	.loc 3 987 0
+	adds	r3, r3, #1
+	str	r3, [r4, #2496]
+	.loc 3 988 0
 	bl	__aeabi_uidivmod
 .LVL1502:
-	ldr	r2, [fp, #-80]
+	ldr	r2, [sp, #12]
 .LVL1503:
-	.loc 3 986 0
-	sub	r4, r4, r1
 	.loc 3 989 0
-	ldr	r0, [r7, #8]
-	.loc 3 985 0
+	subs	r5, r5, r1
+	.loc 3 992 0
+	ldr	r0, [fp, #8]
+	.loc 3 988 0
 	mov	r3, r1
-	.loc 3 989 0
-	ldr	r1, [fp, #-84]
-	cmp	r2, r4
-	movcc	r4, r2
-	lsl	r10, r4, #9
+	.loc 3 992 0
+	ldr	r1, [sp, #4]
+	cmp	r5, r2
+	it	cs
+	movcs	r5, r2
+	lsl	r9, r5, #9
 	add	r0, r0, r3, lsl #9
-	mov	r2, r10
+	mov	r2, r9
 .LVL1504:
 	bl	ftl_memcpy
 .LVL1505:
-	.loc 3 991 0
-	cmp	r6, #0
-	bne	.L1629
+	.loc 3 994 0
+	cbnz	r7, .L1660
 .LVL1506:
-.L1662:
-	.loc 3 992 0
-	mov	r0, #0
-	b	.L1624
+.L1693:
+	.loc 3 995 0
+	movs	r0, #0
+	b	.L1655
 .LVL1507:
-.L1629:
-	.loc 3 993 0
-	ldr	r3, [fp, #-80]
+.L1660:
+	.loc 3 996 0
+	ldr	r3, [sp, #12]
 .LVL1508:
-	.loc 3 994 0
-	add	r9, r9, r4
+	.loc 3 997 0
+	add	r8, r8, r5
+	.loc 3 999 0
+	add	r10, r10, #1
 	.loc 3 996 0
-	add	r8, r8, #1
-	.loc 3 993 0
-	sub	r3, r3, r4
-	str	r3, [fp, #-80]
-	.loc 3 995 0
-	ldr	r3, [fp, #-84]
+	subs	r3, r3, r5
+	str	r3, [sp, #12]
+	.loc 3 998 0
+	ldr	r3, [sp, #4]
 .LVL1509:
-	add	r3, r3, r10
-	str	r3, [fp, #-84]
-	.loc 3 997 0
+	add	r3, r3, r9
+	str	r3, [sp, #4]
+	.loc 3 1000 0
 	bl	FtlCacheWriteBack
 .LVL1510:
-	str	r6, [fp, #-76]
-	b	.L1627
+	str	r7, [sp, #8]
+	b	.L1658
 .LVL1511:
-.L1634:
-	.loc 3 1025 0
-	ldrh	r2, [r3, #4]
-	.loc 3 1024 0
-	str	r10, [r7, #8]
-	.loc 3 1025 0
-	cmp	r2, #0
-	movne	r5, r3
-	bne	.L1633
-	.loc 3 1026 0
-	mov	r0, r5
-	bl	allocate_new_data_superblock
+.L1700:
+	.loc 3 1006 0
+	ldr	r5, .L1722+12
 .LVL1512:
-	b	.L1636
+	b	.L1661
 .LVL1513:
-.L1659:
-	.loc 3 1044 0
-	ldrh	r3, [r5, #4]
+.L1665:
+	.loc 3 1028 0
+	ldrh	r2, [r4, #2328]
+	.loc 3 1027 0
+	str	r9, [r7, #8]
+	.loc 3 1028 0
+	cbnz	r2, .L1703
+	.loc 3 1029 0
+	mov	r0, r5
+	bl	allocate_new_data_superblock
 .LVL1514:
+	b	.L1667
+.L1703:
+	mov	r5, r3
+	b	.L1664
+.LVL1515:
+.L1690:
+	.loc 3 1047 0
+	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1639
-	.loc 3 1048 0
-	mov	r2, #0
-	sub	r1, fp, #68
+	beq	.L1670
+	.loc 3 1051 0
+	movs	r2, #0
+	add	r1, sp, #40
+.LVL1516:
 	mov	r0, r6
-	mov	r7, #20
+	movs	r7, #20
 	bl	log2phys
-.LVL1515:
-	.loc 3 1049 0
+.LVL1517:
+	.loc 3 1052 0
 	mov	r0, r5
+	mul	r7, r7, r9
 	bl	get_new_active_ppa
-.LVL1516:
-	.loc 3 1052 0
-	ldrh	r2, [r4, #88]
-	ldr	r1, [fp, #-72]
-.LVL1517:
-	ldr	r3, [fp, #-72]
 .LVL1518:
-	mul	r1, r2, r1
-	mul	r7, r7, r3
-	.loc 3 1051 0
+	.loc 3 1055 0
+	ldrh	r2, [r4, #88]
+	.loc 3 1054 0
 	ldr	r3, [r4, #3800]
-.LVL1519:
-	.loc 3 1052 0
-	bic	r1, r1, #3
-	str	r1, [fp, #-100]
-	.loc 3 1051 0
+	.loc 3 1055 0
+	mul	r1, r2, r9
+	.loc 3 1054 0
 	add	r3, r3, r7
-	.loc 3 1052 0
-	ldr	r1, [r4, #3772]
-	.loc 3 1051 0
 	str	r0, [r3, #4]
-	.loc 3 1052 0
-	ldr	r0, [fp, #-100]
-	str	r1, [fp, #-104]
-	.loc 3 1053 0
-	str	r6, [r3, #16]
-	.loc 3 1052 0
-	add	r10, r1, r0
-	.loc 3 1056 0
-	mov	r1, #0
-	.loc 3 1052 0
-	str	r10, [r3, #12]
 	.loc 3 1056 0
-	mov	r0, r10
+	str	r6, [r3, #16]
+	.loc 3 1055 0
+	bic	r1, r1, #3
+	str	r1, [sp, #28]
+	ldr	r0, [sp, #28]
+	ldr	r1, [r4, #3772]
+	add	fp, r1, r0
+	str	r1, [sp, #32]
+	str	fp, [r3, #12]
+	.loc 3 1059 0
+	movs	r1, #0
+	mov	r0, fp
 	bl	ftl_memset
+.LVL1519:
+	.loc 3 1061 0
+	cmp	r6, r10
+	beq	.L1671
+	.loc 3 1061 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #20]
 .LVL1520:
-	.loc 3 1058 0
-	ldr	r3, [fp, #-92]
-.LVL1521:
 	cmp	r6, r3
-	cmpne	r6, r8
+	bne	.L1716
+	.loc 3 1069 0 is_stmt 1
+	ldr	r3, [sp, #12]
+.LVL1521:
+	add	r2, r8, r3
 	ldrh	r3, [r4, #34]
 .LVL1522:
-	bne	.L1640
-	.loc 3 1059 0
-	cmp	r6, r8
-	bne	.L1641
-	.loc 3 1060 0
-	mov	r1, r3
-	mov	r0, r9
-	str	r3, [fp, #-88]
+	smulbb	r3, r3, r6
+	subs	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [sp, #16]
+	.loc 3 1068 0
+	movs	r3, #0
+	str	r3, [sp, #24]
+	b	.L1674
+.L1671:
+	.loc 3 1063 0
+	ldrh	r2, [r4, #34]
+	mov	r0, r8
+	mov	r1, r2
+	str	r2, [sp, #16]
 	bl	__aeabi_uidivmod
 .LVL1523:
-	.loc 3 1061 0
-	ldr	r3, [fp, #-88]
-	ldr	r2, [fp, #-80]
+	.loc 3 1064 0
+	ldr	r2, [sp, #16]
+	.loc 3 1063 0
+	str	r1, [sp, #24]
+	.loc 3 1064 0
+	subs	r2, r2, r1
+	ldr	r1, [sp, #12]
 .LVL1524:
-	.loc 3 1060 0
-	str	r1, [fp, #-96]
-	.loc 3 1061 0
-	sub	r3, r3, r1
-	cmp	r3, r2
-	movcs	r3, r2
-	str	r3, [fp, #-88]
-.L1642:
-	.loc 3 1069 0
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	str	r3, [sp, #16]
+.L1674:
+	.loc 3 1072 0
 	ldrh	r3, [r4, #34]
-	ldr	r2, [fp, #-88]
-.LVL1525:
+	ldr	r2, [sp, #16]
 	cmp	r2, r3
-	.loc 3 1071 0
+	.loc 3 1074 0
 	ldr	r3, [r4, #3800]
-	.loc 3 1069 0
-	bne	.L1643
-	.loc 3 1070 0
-	cmp	r6, r8
-	.loc 3 1071 0
-	add	r7, r3, r7
-	ldreq	r3, [fp, #-84]
-.LVL1526:
-	.loc 3 1070 0
-	beq	.L1687
+	.loc 3 1072 0
+	bne	.L1675
 	.loc 3 1073 0
-	ldr	r3, [fp, #-88]
+	cmp	r6, r10
+	.loc 3 1074 0
+	add	r7, r7, r3
+	.loc 3 1073 0
+	bne	.L1676
+	.loc 3 1074 0
+	ldr	r3, [sp, #4]
+.LVL1525:
+.L1720:
+	.loc 3 1117 0
+	str	r3, [r7, #8]
+.LVL1526:
+	b	.L1677
 .LVL1527:
-	mul	r2, r3, r6
-	ldr	r3, [fp, #-84]
+.L1676:
+	.loc 3 1076 0
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #4]
 .LVL1528:
-	sub	r2, r2, r9
+	muls	r2, r6, r2
+	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
 .LVL1529:
-.L1645:
-	.loc 3 1116 0
+.L1677:
+	.loc 3 1119 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #8]
 .LVL1530:
 	cmp	r2, r3
-	bcc	.L1656
-	.loc 3 1116 0 is_stmt 0 discriminator 1
-	movw	r2, #1116
-	ldr	r1, .L1690+16
-	ldr	r0, .L1690+20
-	bl	printk
+	bcc	.L1687
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	movw	r2, #1119
+	ldr	r1, .L1722+16
 .LVL1531:
-.L1656:
-	.loc 3 1117 0 is_stmt 1
-	ldr	r3, .L1690+40
-	ldr	r2, [fp, #-104]
-	ldr	r1, [fp, #-100]
+	ldr	r0, .L1722+20
+	bl	printk
+.LVL1532:
+.L1687:
+	.loc 3 1120 0 is_stmt 1
+	ldr	r2, [sp, #32]
+	movw	r3, #61589
+	ldr	r1, [sp, #28]
+.LVL1533:
+	.loc 3 1046 0
+	add	r9, r9, #1
+	.loc 3 1120 0
 	strh	r3, [r2, r1]	@ movhi
-	.loc 3 1118 0
-	ldr	r3, [r4, #2476]
-	.loc 3 1119 0
-	str	r6, [r10, #8]
+	.loc 3 1121 0
+	ldr	r3, [r4, #2520]
 	.loc 3 1122 0
-	add	r6, r6, #1
-	.loc 3 1118 0
-	str	r3, [r10, #4]
-	add	r3, r3, #1
-	cmn	r3, #1
-	moveq	r3, #0
-	str	r3, [r4, #2476]
-	.loc 3 1120 0
-	ldr	r3, [fp, #-68]
-.LVL1532:
-	str	r3, [r10, #12]
+	str	r6, [fp, #8]
+	.loc 3 1125 0
+	adds	r6, r6, #1
 	.loc 3 1121 0
-	ldrh	r3, [r5]
-.LVL1533:
-	strh	r3, [r10, #2]	@ movhi
-	.loc 3 1043 0
-	ldr	r3, [fp, #-72]
+	str	r3, [fp, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r4, #2520]
+	.loc 3 1123 0
+	ldr	r3, [sp, #40]
 .LVL1534:
-	add	r3, r3, #1
-	b	.L1689
+	str	r3, [fp, #12]
+	.loc 3 1124 0
+	ldrh	r3, [r5]
 .LVL1535:
-.L1641:
-	.loc 3 1066 0
-	ldr	r2, [fp, #-80]
+	strh	r3, [fp, #2]	@ movhi
+	b	.L1669
+.L1723:
+	.align	2
+.L1722:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR1+574
+	.word	.LC1
 .LVL1536:
-	smulbb	r3, r3, r6
-	add	r2, r9, r2
-.LVL1537:
-	sub	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [fp, #-88]
-	.loc 3 1065 0
-	mov	r3, #0
-	str	r3, [fp, #-96]
-	b	.L1642
-.L1643:
-	.loc 3 1076 0
-	cmp	r6, r8
-	.loc 3 1077 0
+.L1675:
+	.loc 3 1079 0
+	cmp	r6, r10
+	.loc 3 1080 0
 	add	r3, r3, r7
+	ite	eq
 	ldreq	r2, [r4, #3776]
-	.loc 3 1079 0
+	.loc 3 1082 0
 	ldrne	r2, [r4, #3768]
 	str	r2, [r3, #8]
-	.loc 3 1081 0
-	ldr	r3, [fp, #-68]
-	cmn	r3, #1
-	beq	.L1648
-.LBB516:
-	.loc 3 1083 0
-	str	r3, [fp, #-60]
-	.loc 3 1087 0
-	mov	r1, #1
-	.loc 3 1085 0
-	ldr	r3, [r4, #3800]
-	.loc 3 1087 0
-	sub	r0, fp, #64
 	.loc 3 1084 0
-	str	r6, [fp, #-48]
-	.loc 3 1085 0
-	add	r3, r3, r7
-	ldr	r2, [r3, #8]
-	.loc 3 1086 0
-	ldr	r3, [r3, #12]
-	.loc 3 1085 0
-	str	r2, [fp, #-56]
-	.loc 3 1087 0
-	mov	r2, #0
+	ldr	r3, [sp, #40]
+	adds	r1, r3, #1
+.LVL1537:
+	beq	.L1680
+.LBB541:
 	.loc 3 1086 0
-	str	r3, [fp, #-52]
+	str	r3, [sp, #48]
+	.loc 3 1090 0
+	movs	r1, #1
+	.loc 3 1088 0
+	ldr	r3, [r4, #3800]
+	.loc 3 1090 0
+	add	r0, sp, #44
 	.loc 3 1087 0
-	bl	FlashReadPages
-.LVL1538:
+	str	r6, [sp, #60]
 	.loc 3 1088 0
-	ldr	r3, [fp, #-64]
-	cmn	r3, #1
+	add	r3, r3, r7
+	ldr	r2, [r3, #8]
 	.loc 3 1089 0
-	ldreq	r3, [r4, #2688]
-	addeq	r3, r3, #1
-	streq	r3, [r4, #2688]
+	ldr	r3, [r3, #12]
 	.loc 3 1088 0
-	beq	.L1652
+	str	r2, [sp, #52]
+	.loc 3 1090 0
+	movs	r2, #0
+	.loc 3 1089 0
+	str	r3, [sp, #56]
+	.loc 3 1090 0
+	bl	FlashReadPages
+.LVL1538:
 	.loc 3 1091 0
-	ldr	r3, [r10, #8]
-	cmp	r6, r3
-	beq	.L1651
-	.loc 3 1092 0
-	ldr	r3, [r4, #2688]
-	.loc 3 1093 0
-	mov	r2, r6
-	ldr	r0, .L1690+44
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L1681
 	.loc 3 1092 0
-	add	r3, r3, #1
-	str	r3, [r4, #2688]
-	.loc 3 1093 0
-	ldr	r1, [r10, #8]
-	bl	printk
-.LVL1539:
-.L1651:
-	.loc 3 1095 0
-	ldr	r3, [r10, #8]
-	cmp	r6, r3
-	beq	.L1652
-	.loc 3 1095 0 is_stmt 0 discriminator 1
-	movw	r2, #1095
-	ldr	r1, .L1690+16
-	ldr	r0, .L1690+20
-	bl	printk
-.LVL1540:
-.L1652:
-	ldr	r3, [fp, #-88]
-.LBE516:
-	.loc 3 1101 0 is_stmt 1
-	cmp	r6, r8
+	ldr	r3, [r4, #2684]
+	adds	r3, r3, #1
+	str	r3, [r4, #2684]
+.L1684:
+	ldr	r3, [sp, #16]
+.LBE541:
+	.loc 3 1104 0
+	cmp	r6, r10
 	lsl	r2, r3, #9
-	bne	.L1653
-	.loc 3 1102 0
+	bne	.L1685
+	.loc 3 1105 0
 	ldr	r3, [r4, #3800]
-	ldr	r1, [fp, #-84]
+	ldr	r1, [sp, #4]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, [fp, #-96]
+	ldr	r3, [sp, #24]
 	add	r0, r0, r3, lsl #9
+.L1719:
+	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1541:
-	.loc 3 1106 0
-	ldr	r3, [fp, #-92]
-.LVL1542:
+.LVL1539:
+	.loc 3 1109 0
+	ldr	r3, [sp, #20]
+.LVL1540:
 	cmp	r6, r3
-	bne	.L1645
-.L1654:
-	.loc 3 1107 0
+	bne	.L1677
+	.loc 3 1110 0
 	ldrh	r3, [r5, #4]
-.LVL1543:
+.LVL1541:
 	cmp	r3, #0
-	.loc 3 1108 0
-	ldrne	r3, [r4, #3800]
-	addne	r7, r3, r7
-	.loc 3 1109 0
-	ldrne	r3, .L1690+8
-	.loc 3 1108 0
-	strne	r7, [r4, #3948]
-	.loc 3 1109 0
-	strne	r5, [r3, #-4076]
-	b	.L1645
-.L1648:
+	beq	.L1677
+	.loc 3 1111 0
+	ldr	r3, [r4, #3800]
+	add	r7, r7, r3
+	.loc 3 1112 0
+	ldr	r3, .L1724
+	.loc 3 1111 0
+	str	r7, [r4, #3948]
+	.loc 3 1112 0
+	str	r5, [r3, #-236]
+	b	.L1677
+.L1681:
+.LBB542:
+	.loc 3 1094 0
+	ldr	r3, [fp, #8]
+	cmp	r6, r3
+	beq	.L1683
+	.loc 3 1095 0
+	ldr	r3, [r4, #2684]
+	.loc 3 1096 0
+	mov	r2, r6
+	ldr	r0, .L1724+4
+	.loc 3 1095 0
+	adds	r3, r3, #1
+	str	r3, [r4, #2684]
+	.loc 3 1096 0
+	ldr	r1, [fp, #8]
+	bl	printk
+.LVL1542:
+.L1683:
 	.loc 3 1098 0
+	ldr	r3, [fp, #8]
+	cmp	r6, r3
+	beq	.L1684
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1724+8
+	ldr	r0, .L1724+12
+	bl	printk
+.LVL1543:
+	b	.L1684
+.L1680:
+.LBE542:
+	.loc 3 1101 0 is_stmt 1
 	ldr	r3, [r4, #3800]
-	mov	r1, #0
+	movs	r1, #0
 	ldrh	r2, [r4, #86]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
 .LVL1544:
-	b	.L1652
-.L1653:
-	.loc 3 1104 0
+	b	.L1684
+.L1685:
+	.loc 3 1107 0
 	ldrh	r1, [r4, #34]
-	ldr	r0, [fp, #-84]
+	ldr	r0, [sp, #4]
 .LVL1545:
 	ldr	r3, [r4, #3800]
-	mul	r1, r6, r1
+	muls	r1, r6, r1
 	add	r3, r3, r7
-	sub	r1, r1, r9
+	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
 .LVL1546:
-	bl	ftl_memcpy
+	b	.L1719
 .LVL1547:
-	b	.L1654
-.L1640:
-	.loc 3 1114 0
-	ldr	r2, [r4, #3800]
-	mul	r3, r6, r3
-	add	r7, r2, r7
-	ldr	r2, [fp, #-84]
+.L1716:
+	.loc 3 1117 0
+	ldr	r3, [r4, #3800]
 .LVL1548:
-	sub	r3, r3, r9
-	add	r3, r2, r3, lsl #9
-.L1687:
-	str	r3, [r7, #8]
-	b	.L1645
+	ldr	r2, [sp, #4]
 .LVL1549:
-.L1660:
-	.loc 3 1130 0
-	mov	r3, r5
+	add	r7, r7, r3
+	ldrh	r3, [r4, #34]
+	muls	r3, r6, r3
+	sub	r3, r3, r8
+	add	r3, r2, r3, lsl #9
+	b	.L1720
 .LVL1550:
-	mov	r2, #0
-	ldr	r1, [fp, #-72]
+.L1691:
+	.loc 3 1133 0
+	mov	r3, r5
+	movs	r2, #0
+	mov	r1, r9
+.LVL1551:
 	ldr	r0, [r4, #3800]
 	bl	FtlProgPages
-.LVL1551:
-	.loc 3 1131 0
-	ldr	r3, [fp, #-76]
 .LVL1552:
-	ldr	r2, [fp, #-72]
+	.loc 3 1134 0
+	ldr	r3, [sp, #8]
 .LVL1553:
-	cmp	r3, r2
-	bcs	.L1663
-	.loc 3 1131 0 is_stmt 0 discriminator 1
-	movw	r2, #1131
-.LVL1554:
-	ldr	r1, .L1690+16
-	ldr	r0, .L1690+20
+	cmp	r3, r9
+	bcs	.L1694
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1724+8
+	ldr	r0, .L1724+12
 	bl	printk
+.LVL1554:
+.L1694:
+	.loc 3 1135 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	sub	r3, r3, r9
+	str	r3, [sp, #8]
+	b	.L1662
 .LVL1555:
-.L1663:
-	.loc 3 1132 0 is_stmt 1
-	ldr	r3, [fp, #-76]
-	ldr	r2, [fp, #-72]
-	sub	r3, r3, r2
-	str	r3, [fp, #-76]
-	b	.L1631
-.L1691:
+.L1698:
+	.loc 3 975 0
+	mov	r0, #-1
+.LVL1556:
+	b	.L1655
+.L1725:
 	.align	2
-.L1690:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
+.L1724:
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2280
+	.word	.LC104
 	.word	.LANCHOR1+574
 	.word	.LC1
-	.word	.LANCHOR0+2568
-	.word	.LANCHOR0+3182
-	.word	.LANCHOR0+3130
-	.word	.LANCHOR0+2276
-	.word	-3947
-	.word	.LC101
-.LFE157:
+.LFE167:
 	.fnend
 	.size	FtlWrite, .-FtlWrite
-	.align	2
+	.align	1
 	.global	sftl_write
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
 	.fnstart
-.LFB160:
-	.loc 3 1207 0
+.LFB170:
+	.loc 3 1209 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1556:
-	.movsp ip
-	mov	ip, sp
-.LCFI440:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI441:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI442:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 1207 0
-	.loc 3 1208 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1557:
+	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1557:
-	mov	r1, r0
 .LVL1558:
-	mov	r0, #0
+	mov	r1, r0
 .LVL1559:
-	bl	FtlWrite
+	movs	r0, #0
 .LVL1560:
-	.loc 3 1209 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE160:
+	b	FtlWrite
+.LVL1561:
+.LFE170:
 	.fnend
 	.size	sftl_write, .-sftl_write
-	.align	2
+	.align	1
 	.global	FtlLoadSysInfo
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 	.fnstart
-.LFB214:
-	.loc 2 1360 0
+.LFB224:
+	.loc 2 1409 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI443:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI444:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI445:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 1360 0
-	.loc 2 1368 0
-	mov	r1, #0
-	.loc 2 1365 0
-	ldr	r4, .L1714
-	ldr	r6, .L1714+4
-	ldr	r3, [r4, #2244]
-	.loc 2 1368 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI196:
+	.loc 2 1417 0
+	movs	r1, #0
+	.loc 2 1414 0
+	ldr	r4, .L1748
+	ldr	r3, [r4, #3240]
+	.loc 2 1417 0
 	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #2260]
-	.loc 2 1365 0
-	str	r3, [r4, #3232]
-	.loc 2 1366 0
+	ldr	r0, [r4, #2300]
+	.loc 2 1414 0
+	str	r3, [r4, #3228]
+	.loc 2 1415 0
 	ldr	r3, [r4, #3244]
-	.loc 2 1368 0
-	lsl	r2, r2, #1
-	.loc 2 1366 0
-	str	r3, [r4, #3236]
-	.loc 2 1368 0
+	.loc 2 1417 0
+	lsls	r2, r2, #1
+	.loc 2 1415 0
+	str	r3, [r4, #3232]
+	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1561:
-	.loc 2 1369 0
-	movw	r3, #2556
-	ldrh	r0, [r4, r3]
+.LVL1562:
+	.loc 2 1418 0
+	ldrh	r0, [r4, #2552]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1694
-.L1702:
-	.loc 2 1370 0
-	mvn	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L1694:
-	.loc 2 1378 0
-	ldr	r7, .L1714+8
-	.loc 2 1372 0
-	mov	r1, #1
-	.loc 2 1381 0
-	ldr	r8, .L1714+12
-	.loc 2 1372 0
+	bne	.L1728
+.LVL1563:
+.L1736:
+	.loc 2 1419 0
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL1564:
+.L1728:
+	.loc 2 1430 0
+	ldr	r7, .L1748+4
+	.loc 2 1421 0
+	movs	r1, #1
+	.loc 2 1427 0
+	addw	r6, r4, #3220
+	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1562:
+.LVL1565:
 	sxth	r5, r0
-.LVL1563:
-	.loc 2 1373 0
-	add	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L1696:
-	.loc 2 1375 0
+.LVL1566:
+	.loc 2 1422 0
+	adds	r0, r0, #1
+	strh	r0, [r4, #2554]	@ movhi
+.L1730:
+	.loc 2 1424 0
 	cmp	r5, #0
-	bge	.L1699
-	.loc 2 1388 0
-	movw	r2, #1388
-	ldr	r1, .L1714+16
-	ldr	r0, .L1714+20
+	bge	.L1733
+	.loc 2 1437 0
+	movw	r2, #1437
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1564:
-.L1698:
-	.loc 2 1390 0
+.LVL1567:
+.L1732:
+	.loc 2 1439 0
 	ldrh	r3, [r4, #16]
 	ldrh	r2, [r4, #86]
-	add	r3, r3, #24
+	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1701
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	movw	r2, #1390
-	ldr	r1, .L1714+16
-	ldr	r0, .L1714+20
+	bcs	.L1735
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	movw	r2, #1439
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1565:
-.L1701:
-	.loc 2 1392 0 is_stmt 1
-	ldr	r5, .L1714+24
-.LVL1566:
-	mov	r2, #48
-	ldr	r1, [r4, #3232]
-	mov	r0, r5
+.LVL1568:
+.L1735:
+	.loc 2 1441 0 is_stmt 1
+	movs	r2, #48
+	ldr	r1, [r4, #3228]
+	ldr	r0, .L1748+16
 	bl	ftl_memcpy
-.LVL1567:
-	.loc 2 1393 0
+.LVL1569:
+	.loc 2 1442 0
 	ldrh	r2, [r4, #16]
-	ldr	r1, [r4, #3232]
-	ldr	r0, [r4, #2260]
-	lsl	r2, r2, #1
-	add	r1, r1, #48
+	ldr	r1, [r4, #3228]
+	ldr	r0, [r4, #2300]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
 	bl	ftl_memcpy
-.LVL1568:
-	.loc 2 1394 0
+.LVL1570:
+	.loc 2 1443 0
 	ldrh	r1, [r4, #16]
-	ldr	r3, [r4, #3232]
+	ldr	r3, [r4, #3228]
 	ldr	r0, [r4]
-	lsr	r2, r1, #3
-	add	r1, r1, #24
-	lsl	r1, r1, #1
-	add	r2, r2, #4
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
 	bic	r1, r1, #3
-	add	r1, r3, r1
+	add	r1, r1, r3
 	bl	ftl_memcpy
-.LVL1569:
-	.loc 2 1396 0
-	ldr	r2, [r4, #2504]
-	ldr	r3, .L1714+12
+.LVL1571:
+	.loc 2 1445 0
+	ldr	r2, [r4, #2244]
+	ldr	r3, .L1748+4
 	cmp	r2, r3
-	bne	.L1702
-	.loc 2 1400 0
-	ldrb	r2, [r4, #2514]	@ zero_extendqisi2
+	bne	.L1736
+	.loc 2 1449 0
+	ldrb	r2, [r4, #2254]	@ zero_extendqisi2
 	ldrh	r3, [r4, #30]
-	.loc 2 1399 0
-	ldrh	r7, [r5, #8]
-	.loc 2 1400 0
+	.loc 2 1448 0
+	ldrh	r5, [r4, #2252]
+.LVL1572:
+	.loc 2 1449 0
 	cmp	r2, r3
-	.loc 2 1399 0
-	strh	r7, [r6, #6]	@ movhi
-	.loc 2 1400 0
-	bne	.L1702
-	.loc 2 1403 0
-	ldr	r3, .L1714+28
-	.loc 2 1405 0
+	.loc 2 1448 0
+	strh	r5, [r4, #2558]	@ movhi
+	.loc 2 1449 0
+	bne	.L1736
+	.loc 2 1452 0
+	ldr	r3, .L1748+20
+	.loc 2 1454 0
 	ldrh	r2, [r4, #34]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldr	r6, [r4, #20]
-	.loc 2 1403 0
-	str	r7, [r3, #-4056]
-	.loc 2 1404 0
+	.loc 2 1452 0
+	str	r5, [r3, #-216]
+	.loc 2 1453 0
 	ldrh	r3, [r4, #78]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	r0, [r4, #134]
 	ldrh	r1, [r4, #8]
-	.loc 2 1404 0
-	mul	r3, r7, r3
-	.loc 2 1406 0
-	sub	r0, r6, r0
-	sub	r0, r0, r7
-	.loc 2 1404 0
-	str	r3, [r4, #2436]
-	.loc 2 1405 0
-	mul	r3, r3, r2
+	.loc 2 1453 0
+	muls	r3, r5, r3
+	.loc 2 1455 0
+	subs	r0, r6, r0
+	subs	r0, r0, r5
+	.loc 2 1453 0
+	str	r3, [r4, #2480]
+	.loc 2 1454 0
+	muls	r3, r2, r3
 	str	r3, [r4, #116]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	bl	__aeabi_uidiv
-.LVL1570:
-	.loc 2 1412 0
-	cmp	r7, r6
-	.loc 2 1406 0
-	movw	r3, #2552
-	strh	r0, [r4, r3]	@ movhi
-	.loc 2 1412 0
-	bls	.L1703
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	movw	r2, #1412
-	ldr	r1, .L1714+16
-	ldr	r0, .L1714+20
+.LVL1573:
+	.loc 2 1461 0
+	cmp	r5, r6
+	.loc 2 1455 0
+	strh	r0, [r4, #2548]	@ movhi
+	.loc 2 1461 0
+	bls	.L1737
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	movw	r2, #1461
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1571:
-.L1703:
-	.loc 2 1414 0 is_stmt 1
-	ldrh	r0, [r5, #14]
-	movw	r3, #2280
-	ldr	r1, .L1714+32
-	.loc 2 1419 0
-	mvn	ip, #0
-	.loc 2 1414 0
-	strh	r0, [r4, r3]	@ movhi
-	.loc 2 1415 0
-	ldrh	r3, [r5, #16]
-	lsr	r2, r3, #6
-	.loc 2 1416 0
+.LVL1574:
+.L1737:
+	.loc 2 1464 0 is_stmt 1
+	ldrh	r3, [r4, #2260]
+	.loc 2 1463 0
+	ldrh	r1, [r4, #2258]
+	.loc 2 1464 0
+	lsrs	r2, r3, #6
+	.loc 2 1465 0
 	and	r3, r3, #63
-	strb	r3, [r4, #2286]
-	.loc 2 1417 0
-	ldrb	r3, [r4, #2515]	@ zero_extendqisi2
-	.loc 2 1415 0
-	strh	r2, [r1, #2]	@ movhi
-	.loc 2 1419 0
-	add	r2, r1, #288
-	.loc 2 1417 0
-	strb	r3, [r4, #2288]
-	.loc 2 1419 0
-	movw	r3, #2568
-	strh	ip, [r4, r3]	@ movhi
-	.loc 2 1420 0
-	mov	r3, #0
-	.loc 2 1424 0
-	ldrh	ip, [r5, #18]
-	.loc 2 1420 0
-	strh	r3, [r2, #2]	@ movhi
-	.loc 2 1424 0
-	movw	r2, #2328
-	.loc 2 1421 0
-	strb	r3, [r4, #2574]
-	.loc 2 1424 0
-	strh	ip, [r4, r2]	@ movhi
-	.loc 2 1425 0
-	ldrh	r2, [r5, #20]
-	.loc 2 1422 0
-	strb	r3, [r4, #2576]
-	.loc 2 1434 0
-	str	r3, [r4, #2460]
-	.loc 2 1435 0
-	str	r3, [r4, #2448]
-	.loc 2 1425 0
-	lsr	ip, r2, #6
-	.loc 2 1426 0
+	strb	r3, [r4, #2330]
+	.loc 2 1464 0
+	strh	r2, [r4, #2326]	@ movhi
+	.loc 2 1473 0
+	ldrh	r2, [r4, #2262]
+	.loc 2 1466 0
+	ldrb	r3, [r4, #2255]	@ zero_extendqisi2
+	.loc 2 1463 0
+	strh	r1, [r4, #2324]	@ movhi
+	.loc 2 1473 0
+	strh	r2, [r4, #2372]	@ movhi
+	.loc 2 1474 0
+	ldrh	r2, [r4, #2264]
+	.loc 2 1466 0
+	strb	r3, [r4, #2332]
+	.loc 2 1468 0
+	movw	r3, #65535
+	strh	r3, [r4, #2564]	@ movhi
+	.loc 2 1469 0
+	movs	r3, #0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 2 1474 0
+	lsrs	r0, r2, #6
+	.loc 2 1475 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2334]
-	.loc 2 1427 0
-	ldrb	r2, [r4, #2516]	@ zero_extendqisi2
-	.loc 2 1425 0
-	strh	ip, [r1, #50]	@ movhi
-	.loc 2 1429 0
-	ldrh	ip, [r5, #22]
-	.loc 2 1427 0
-	strb	r2, [r4, #2336]
-	.loc 2 1429 0
-	movw	r2, #2376
-	.loc 2 1436 0
-	str	r3, [r4, #2440]
-	.loc 2 1429 0
-	strh	ip, [r4, r2]	@ movhi
-	.loc 2 1430 0
-	ldrh	r2, [r5, #24]
-	.loc 2 1437 0
-	str	r3, [r4, #2456]
-	.loc 2 1440 0
+	strb	r2, [r4, #2378]
+	.loc 2 1476 0
+	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
+	.loc 2 1474 0
+	strh	r0, [r4, #2374]	@ movhi
+	.loc 2 1470 0
+	strb	r3, [r4, #2570]
+	.loc 2 1476 0
+	strb	r2, [r4, #2380]
+	.loc 2 1478 0
+	ldrh	r2, [r4, #2266]
+	.loc 2 1471 0
+	strb	r3, [r4, #2572]
+	.loc 2 1483 0
+	str	r3, [r4, #2504]
+	.loc 2 1478 0
+	strh	r2, [r4, #2420]	@ movhi
+	.loc 2 1479 0
+	ldrh	r2, [r4, #2268]
+	.loc 2 1484 0
+	str	r3, [r4, #2492]
+	.loc 2 1485 0
 	str	r3, [r4, #2484]
-	.loc 2 1430 0
-	lsr	ip, r2, #6
-	.loc 2 1431 0
+	.loc 2 1486 0
+	str	r3, [r4, #2500]
+	.loc 2 1479 0
+	lsrs	r0, r2, #6
+	.loc 2 1480 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2382]
-	.loc 2 1432 0
-	ldrb	r2, [r4, #2517]	@ zero_extendqisi2
-	.loc 2 1430 0
-	strh	ip, [r1, #98]	@ movhi
-	.loc 2 1432 0
-	strb	r2, [r4, #2384]
-	.loc 2 1439 0
-	ldr	r2, [r4, #2536]
-	str	r2, [r4, #2480]
-	.loc 2 1441 0
+	strb	r2, [r4, #2426]
+	.loc 2 1481 0
+	ldrb	r2, [r4, #2257]	@ zero_extendqisi2
+	.loc 2 1489 0
+	str	r3, [r4, #2528]
+	.loc 2 1479 0
+	strh	r0, [r4, #2422]	@ movhi
+	.loc 2 1481 0
+	strb	r2, [r4, #2428]
+	.loc 2 1488 0
+	ldr	r2, [r4, #2276]
+	str	r2, [r4, #2524]
+	.loc 2 1490 0
+	str	r3, [r4, #2540]
+	.loc 2 1493 0
+	ldr	r2, [r4, #2516]
+	.loc 2 1491 0
 	str	r3, [r4, #2496]
-	.loc 2 1444 0
-	ldr	r2, [r4, #2472]
-	.loc 2 1442 0
-	str	r3, [r4, #2452]
-	.loc 2 1444 0
-	ldr	r3, [r4, #2544]
+	.loc 2 1493 0
+	ldr	r3, [r4, #2284]
 	cmp	r3, r2
-	.loc 2 1447 0
-	ldr	r2, [r4, #2476]
-	.loc 2 1445 0
-	strhi	r3, [r4, #2472]
-	.loc 2 1447 0
-	ldr	r3, [r4, #2540]
+	.loc 2 1496 0
+	ldr	r2, [r4, #2520]
+	.loc 2 1494 0
+	it	hi
+	strhi	r3, [r4, #2516]
+	.loc 2 1496 0
+	ldr	r3, [r4, #2280]
 	cmp	r3, r2
-	.loc 2 1448 0
-	strhi	r3, [r4, #2476]
-	.loc 2 1450 0
+	.loc 2 1497 0
+	it	hi
+	strhi	r3, [r4, #2520]
+	.loc 2 1499 0
 	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1706
-	.loc 2 1451 0
-	ldr	r0, .L1714+32
+	cmp	r1, r3
+	beq	.L1740
+	.loc 2 1500 0
+	ldr	r0, .L1748+24
 	bl	make_superblock
-.LVL1572:
-.L1706:
-	.loc 2 1453 0
-	movw	r3, #2328
-	ldrh	r2, [r4, r3]
+.LVL1575:
+.L1740:
+	.loc 2 1502 0
+	ldrh	r2, [r4, #2372]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1707
-	.loc 2 1454 0
-	ldr	r0, .L1714+36
+	beq	.L1741
+	.loc 2 1503 0
+	ldr	r0, .L1748+28
 	bl	make_superblock
-.LVL1573:
-.L1707:
-	.loc 2 1456 0
-	movw	r3, #2376
-	ldrh	r2, [r4, r3]
+.LVL1576:
+.L1741:
+	.loc 2 1505 0
+	ldrh	r2, [r4, #2420]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1708
-	.loc 2 1457 0
-	ldr	r0, .L1714+40
+	beq	.L1742
+	.loc 2 1506 0
+	ldr	r0, .L1748+32
 	bl	make_superblock
-.LVL1574:
-.L1708:
-	.loc 2 1459 0
-	movw	r3, #2568
-	ldrh	r2, [r4, r3]
+.LVL1577:
+.L1742:
+	.loc 2 1508 0
+	ldrh	r2, [r4, #2564]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1709
-	.loc 2 1460 0
-	ldr	r0, .L1714+44
+	beq	.L1743
+	.loc 2 1509 0
+	ldr	r0, .L1748+36
 	bl	make_superblock
-.LVL1575:
-.L1709:
-	.loc 2 1462 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL1576:
-.L1699:
-	.loc 2 1376 0
-	ldrh	r3, [r6]
-	.loc 2 1378 0
-	mov	r2, #1
+.LVL1578:
+.L1743:
+	.loc 2 1511 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL1579:
+.L1733:
+	.loc 2 1425 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1427 0
+	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r7
-	.loc 2 1376 0
+	mov	r0, r6
+	.loc 2 1425 0
 	orr	r3, r5, r3, lsl #10
+	str	r3, [r4, #3224]
+	.loc 2 1426 0
+	ldr	r3, [r4, #3240]
 	str	r3, [r4, #3228]
-	.loc 2 1377 0
-	ldr	r3, [r4, #2244]
-	str	r3, [r4, #3232]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	bl	FlashReadPages
-.LVL1577:
-	.loc 2 1381 0
-	ldr	r3, [r4, #3224]
-	cmn	r3, #1
-	beq	.L1697
-	.loc 2 1382 0 discriminator 1
-	ldr	r3, [r4, #2244]
-	.loc 2 1381 0 discriminator 1
+.LVL1580:
+	.loc 2 1430 0
+	ldr	r3, [r4, #3220]
+	adds	r3, r3, #1
+	beq	.L1731
+	.loc 2 1431 0 discriminator 1
+	ldr	r3, [r4, #3240]
+	.loc 2 1430 0 discriminator 1
 	ldr	r3, [r3]
-	cmp	r3, r8
-	bne	.L1697
-	.loc 2 1383 0
+	cmp	r3, r7
+	bne	.L1731
+	.loc 2 1432 0
 	ldr	r3, [r4, #3244]
 	ldrh	r2, [r3]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1698
-.L1697:
-	sub	r5, r5, #1
-.LVL1578:
+	beq	.L1732
+.L1731:
+	subs	r5, r5, #1
+.LVL1581:
 	sxth	r5, r5
-.LVL1579:
-	b	.L1696
-.L1715:
+.LVL1582:
+	b	.L1730
+.L1749:
 	.align	2
-.L1714:
+.L1748:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2556
-	.word	.LANCHOR0+3224
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
-	.word	.LANCHOR0+2504
+	.word	.LANCHOR0+2244
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2280
-	.word	.LANCHOR0+2328
-	.word	.LANCHOR0+2376
-	.word	.LANCHOR0+2568
-.LFE214:
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2564
+.LFE224:
 	.fnend
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.align	2
+	.align	1
 	.global	FtlSysBlkInit
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	.fnstart
-.LFB232:
-	.loc 2 2306 0
+.LFB242:
+	.loc 2 2356 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI446:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, r6, r7, r8, r9, fp, ip, lr}
-.LCFI447:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI448:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 2 2306 0
-	.loc 2 2310 0
-	mov	r3, #0
-	ldr	r4, .L1732
-	add	r6, r4, #3968
-	.loc 2 2312 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+.LCFI197:
+	.loc 2 2360 0
+	movs	r3, #0
+	ldr	r4, .L1766
+	.loc 2 2362 0
 	ldrh	r0, [r4, #12]
-	.loc 2 2310 0
-	strh	r3, [r6]	@ movhi
-	.loc 2 2312 0
+	.loc 2 2360 0
+	strh	r3, [r4, #3968]	@ movhi
+	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1580:
-	.loc 2 2313 0
+.LVL1583:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1581:
-	.loc 2 2314 0
-	movw	r3, #2556
-	ldrh	r2, [r4, r3]
+.LVL1584:
+	.loc 2 2364 0
+	ldrh	r2, [r4, #2552]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1717
-.L1719:
-	.loc 2 2315 0
-	mvn	r8, #0
-.L1716:
-	.loc 2 2398 0
-	mov	r0, r8
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L1717:
-	.loc 2 2317 0
+	bne	.L1751
+.L1753:
+	.loc 2 2365 0
+	mov	r5, #-1
+.L1750:
+	.loc 2 2448 0
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1751:
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1582:
-	subs	r8, r0, #0
-	bne	.L1719
-	.loc 2 2320 0
+.LVL1585:
+	mov	r5, r0
+	cmp	r0, #0
+	bne	.L1753
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1583:
-	.loc 2 2321 0
+.LVL1586:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1584:
-	.loc 2 2322 0
+.LVL1587:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1585:
-	.loc 2 2324 0
+.LVL1588:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1586:
-	.loc 2 2325 0
+.LVL1589:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1587:
-	.loc 2 2327 0
+.LVL1590:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1588:
-	.loc 2 2328 0
+.LVL1591:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1589:
-	.loc 2 2330 0
-	mov	r0, #1
+.LVL1592:
+	.loc 2 2380 0
+	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1590:
-.LBB520:
-.LBB521:
-	.loc 2 2332 0
+.LVL1593:
+.LBB546:
+.LBB547:
+	.loc 2 2382 0
 	ldrh	r1, [r4, #114]
-	mov	r3, r8
-.LVL1591:
-	.loc 2 2333 0
-	ldr	r2, [r4, #2424]
-	mov	r0, #12
-.L1720:
-	.loc 2 2332 0
+	mov	r3, r5
+.LVL1594:
+	.loc 2 2383 0
+	ldr	r2, [r4, #2468]
+	movs	r0, #12
+.L1754:
+	.loc 2 2382 0
 	cmp	r3, r1
-	bge	.L1725
-	.loc 2 2333 0
-	mla	ip, r0, r3, r2
-	ldr	ip, [ip, #4]
-	cmp	ip, #0
-	bge	.L1721
-.L1725:
-	.loc 2 2336 0
-	ldr	r5, .L1732+4
-	.loc 2 2338 0
+	bge	.L1759
+	.loc 2 2383 0
+	mla	r6, r0, r3, r2
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	bge	.L1755
+.L1759:
+	.loc 2 2386 0
+	ldrh	r2, [r4, #2272]
+	.loc 2 2388 0
 	cmp	r3, r1
-	.loc 2 2336 0
-	ldrh	r2, [r5, #28]
-	sub	r7, r5, #224
+	.loc 2 2386 0
 	add	r2, r2, #1
-	strh	r2, [r5, #28]	@ movhi
-	.loc 2 2338 0
-	bge	.L1731
-.L1722:
-	.loc 2 2340 0
-	ldr	r6, .L1732+8
-	.loc 2 2339 0
-	ldr	r0, .L1732+12
+	strh	r2, [r4, #2272]	@ movhi
+	.loc 2 2388 0
+	bge	.L1765
+.L1756:
+	.loc 2 2389 0
+	ldr	r0, .L1766+4
 	bl	FtlSuperblockPowerLostFix
-.LVL1592:
-	.loc 2 2340 0
-	mov	r0, r6
+.LVL1595:
+	.loc 2 2390 0
+	ldr	r0, .L1766+8
 	bl	FtlSuperblockPowerLostFix
-.LVL1593:
-.LBB522:
-	.loc 2 2346 0
-	movw	r3, #2280
-	ldr	r1, [r4, #2260]
-	ldrh	r3, [r4, r3]
-	ldrh	r0, [r7, #4]
-	lsl	r3, r3, #1
-	ldrh	r2, [r1, r3]
-	sub	r2, r2, r0
-	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2352 0
-	movw	r2, #2328
-	ldrh	r2, [r4, r2]
-	.loc 2 2347 0
+.LVL1596:
+.LBB548:
+	.loc 2 2396 0
+	ldrh	r1, [r4, #2324]
+	ldr	r2, [r4, #2300]
+	ldrh	r0, [r4, #2328]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2397 0
 	ldrh	r3, [r4, #78]
-	.loc 2 2352 0
-	ldr	r0, [r4, #2260]
-	ldrh	ip, [r6, #4]
-	lsl	r2, r2, #1
-	.loc 2 2347 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 2 2348 0
-	mov	r3, #0
-	strb	r3, [r4, #2286]
-	.loc 2 2349 0
-	strh	r3, [r7, #4]	@ movhi
-	.loc 2 2352 0
-	ldrh	r1, [r0, r2]
-	sub	r1, r1, ip
-	strh	r1, [r0, r2]	@ movhi
-.LBE522:
-	.loc 2 2359 0
-	add	r0, r6, #1536
-.LBB523:
-	.loc 2 2353 0
+	.loc 2 2402 0
+	ldr	r1, [r4, #2300]
+	ldrh	r0, [r4, #2372]
+	.loc 2 2397 0
+	strh	r3, [r4, #2326]	@ movhi
+	.loc 2 2398 0
+	movs	r3, #0
+	strb	r3, [r4, #2330]
+	.loc 2 2399 0
+	strh	r3, [r4, #2328]	@ movhi
+	.loc 2 2402 0
+	ldrh	r6, [r4, #2376]
+	ldrh	r2, [r1, r0, lsl #1]
+	subs	r2, r2, r6
+	strh	r2, [r1, r0, lsl #1]	@ movhi
+	.loc 2 2403 0
 	ldrh	r2, [r4, #78]
-	.loc 2 2354 0
-	strb	r3, [r4, #2334]
-	.loc 2 2355 0
-	strh	r3, [r6, #4]	@ movhi
-	.loc 2 2353 0
-	strh	r2, [r6, #2]	@ movhi
-.LBE523:
-	.loc 2 2359 0
-	bl	FtlMapBlkWriteDump_data
-.LVL1594:
-	.loc 2 2360 0
-	ldr	r0, .L1732+16
+.LBE548:
+	.loc 2 2409 0
+	ldr	r0, .L1766+12
+.LBB549:
+	.loc 2 2404 0
+	strb	r3, [r4, #2378]
+	.loc 2 2403 0
+	strh	r2, [r4, #2374]	@ movhi
+	.loc 2 2405 0
+	strh	r3, [r4, #2376]	@ movhi
+.LBE549:
+	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1595:
-	.loc 2 2372 0
-	ldrh	r3, [r5, #30]
-	add	r3, r3, #1
-	strh	r3, [r5, #30]	@ movhi
-	.loc 2 2373 0
-	bl	l2p_flush
-.LVL1596:
-	.loc 2 2374 0
-	bl	FtlVpcTblFlush
 .LVL1597:
-	.loc 2 2375 0
-	bl	FtlVpcTblFlush
+	.loc 2 2410 0
+	ldr	r0, .L1766+16
+	bl	FtlMapBlkWriteDump_data
 .LVL1598:
-	b	.L1726
+	.loc 2 2422 0
+	ldrh	r3, [r4, #2274]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2274]	@ movhi
+	.loc 2 2423 0
+	bl	l2p_flush
 .LVL1599:
-.L1721:
-	.loc 2 2332 0
-	add	r3, r3, #1
-	b	.L1720
-.L1731:
-	.loc 2 2338 0
-	ldrh	r3, [r6]
+	.loc 2 2424 0
+	bl	FtlVpcTblFlush
 .LVL1600:
+	.loc 2 2425 0
+	bl	FtlVpcTblFlush
+.LVL1601:
+	b	.L1760
+.LVL1602:
+.L1755:
+	.loc 2 2382 0
+	adds	r3, r3, #1
+	b	.L1754
+.L1765:
+	.loc 2 2388 0
+	ldrh	r3, [r4, #3968]
+.LVL1603:
 	cmp	r3, #0
-	bne	.L1722
-.L1726:
-	.loc 2 2379 0
-	movw	r3, #2280
-	ldrh	r0, [r4, r3]
+	bne	.L1756
+.L1760:
+	.loc 2 2429 0
+	ldrh	r0, [r4, #2324]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1727
-	ldrh	r3, [r7, #4]
-	cmp	r3, #0
-	bne	.L1727
-	.loc 2 2381 0
-	ldr	r6, .L1732+8
-	.loc 2 2380 0
-	ldrh	r3, [r6, #4]
-	cmp	r3, #0
-	bne	.L1727
-	.loc 2 2382 0
+	beq	.L1761
+	ldrh	r3, [r4, #2328]
+	cbnz	r3, .L1761
+	.loc 2 2430 0
+	ldrh	r3, [r4, #2376]
+	cbnz	r3, .L1761
+	.loc 2 2432 0
 	bl	FtlGcRefreshBlock
-.LVL1601:
-	.loc 2 2383 0
-	movw	r3, #2328
-	ldrh	r0, [r4, r3]
+.LVL1604:
+	.loc 2 2433 0
+	ldrh	r0, [r4, #2372]
 	bl	FtlGcRefreshBlock
-.LVL1602:
-	.loc 2 2384 0
-	sub	r0, r6, #48
+.LVL1605:
+	.loc 2 2434 0
+	ldr	r0, .L1766+4
 	bl	allocate_new_data_superblock
-.LVL1603:
-	.loc 2 2385 0
-	mov	r0, r6
+.LVL1606:
+	.loc 2 2435 0
+	ldr	r0, .L1766+8
 	bl	allocate_new_data_superblock
-.LVL1604:
-.L1727:
-	.loc 2 2390 0
-	ldrh	r3, [r5, #28]
-	tst	r3, #31
-	bne	.L1716
-	.loc 2 2391 0
+.LVL1607:
+.L1761:
+	.loc 2 2440 0
+	ldrh	r3, [r4, #2272]
+	lsls	r3, r3, #27
+	bne	.L1750
+	.loc 2 2441 0
 	bl	FtlVpcCheckAndModify
-.LVL1605:
-	b	.L1716
-.L1733:
+.LVL1608:
+	b	.L1750
+.L1767:
 	.align	2
-.L1732:
+.L1766:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2504
-	.word	.LANCHOR0+2328
-	.word	.LANCHOR0+2280
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+3864
 	.word	.LANCHOR0+3908
-.LBE521:
-.LBE520:
-.LFE232:
+.LBE547:
+.LBE546:
+.LFE242:
 	.fnend
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.align	2
+	.align	1
 	.global	ftl_low_format
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_low_format, %function
 ftl_low_format:
 	.fnstart
-.LFB150:
+.LFB160:
 	.loc 3 623 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI449:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-	.pad #4
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, ip, lr}
-.LCFI450:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI451:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 623 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
+.LCFI198:
 	.loc 3 629 0
-	mov	r3, #0
-	ldr	r4, .L1758
+	movs	r3, #0
+	ldr	r4, .L1792
 	.loc 3 631 0
 	ldrh	r0, [r4, #12]
 	.loc 3 629 0
-	str	r3, [r4, #2472]
+	str	r3, [r4, #2516]
 	.loc 3 630 0
-	str	r3, [r4, #2476]
+	str	r3, [r4, #2520]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1606:
+.LVL1609:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1607:
-	cmp	r0, #0
-	beq	.L1735
+.LVL1610:
+	cbz	r0, .L1769
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL1608:
-.L1735:
+.LVL1611:
+.L1769:
 	.loc 3 637 0 discriminator 1
-	ldr	r0, .L1758+4
+	ldr	r0, .L1792+4
 	.loc 3 623 0 discriminator 1
-	mov	r2, #0
-.L1736:
+	movs	r2, #0
+.L1770:
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r4, #34]
 	uxth	r3, r2
-	add	r2, r2, #1
+	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1737
+	blt	.L1771
 	.loc 3 642 0
 	ldrh	r6, [r4, #16]
 	.loc 3 641 0
-	mov	r5, #0
-.LVL1609:
-.L1738:
+	movs	r5, #0
+.LVL1612:
+.L1772:
 	.loc 3 642 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r6
-	bhi	.L1739
+	bhi	.L1773
 	.loc 3 645 0
 	ldrh	r1, [r4, #8]
-	sub	r3, r5, #3
+	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1740
-.L1744:
+	bge	.L1774
+.L1778:
 	.loc 3 641 0
-	mov	r5, #0
-.LVL1610:
+	movs	r5, #0
+.LVL1613:
 	mov	r6, r5
-.LVL1611:
-.L1741:
+.LVL1614:
+.L1775:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r4, #16]
 	uxth	r0, r5
-	add	r5, r5, #1
+	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1745
+	bhi	.L1779
 	.loc 3 658 0
 	ldrh	r3, [r4, #18]
-	.loc 3 662 0
-	movw	r9, #2552
 	.loc 3 661 0
 	ldrh	r5, [r4, #8]
-	ldr	r10, [r4, #20]
+	ldr	r9, [r4, #20]
 	.loc 3 658 0
 	str	r3, [r4, #3764]
 	.loc 3 661 0
 	mov	r1, r5
-	mov	r0, r10
+	mov	r0, r9
 	bl	__aeabi_uidiv
-.LVL1612:
+.LVL1615:
 	.loc 3 662 0
 	ubfx	r7, r0, #5, #16
 	.loc 3 661 0
@@ -20246,462 +18870,417 @@ ftl_low_format:
 	.loc 3 662 0
 	add	r3, r7, #36
 	.loc 3 661 0
-	str	r0, [r4, #2436]
+	str	r0, [r4, #2480]
 	.loc 3 662 0
-	strh	r3, [r4, r9]	@ movhi
+	strh	r3, [r4, #2548]	@ movhi
 	.loc 3 663 0
-	mov	r3, #24
-	mul	r3, r3, r5
+	movs	r3, #24
+	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1746
+	ble	.L1780
 	.loc 3 664 0
 	mov	r1, r5
-	sub	r0, r10, r6
+	sub	r0, r9, r6
 	bl	__aeabi_uidiv
-.LVL1613:
-	str	r0, [r4, #2436]
+.LVL1616:
+	str	r0, [r4, #2480]
 	.loc 3 665 0
-	lsr	r0, r0, #5
-	add	r0, r0, #24
-	strh	r0, [r4, r9]	@ movhi
-.L1746:
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r4, #2548]	@ movhi
+.L1780:
 	.loc 3 668 0
 	ldrh	r3, [r4, #70]
-	cmp	r3, #0
-	beq	.L1748
+	cbz	r3, .L1782
 	.loc 3 669 0
-	movw	r2, #2552
-	ldrh	r1, [r4, r2]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r4, r2]	@ movhi
+	ldrh	r2, [r4, #2548]
+	add	r2, r2, r3, lsr #1
+	strh	r2, [r4, #2548]	@ movhi
 	.loc 3 670 0
-	mul	r1, r5, r3
-	cmp	r6, r1
+	mul	r2, r5, r3
+	cmp	r6, r2
 	.loc 3 672 0
+	itttt	lt
 	addlt	r3, r3, #32
 	.loc 3 671 0
-	strlt	r8, [r4, #2436]
+	strlt	r8, [r4, #2480]
 	.loc 3 672 0
-	addlt	r3, r7, r3
-	strhlt	r3, [r4, r2]	@ movhi
-.L1748:
+	addlt	r3, r3, r7
+	strhlt	r3, [r4, #2548]	@ movhi
+.L1782:
 	.loc 3 677 0
-	movw	r3, #2552
-	ldr	r6, .L1758+8
-.LVL1614:
-	ldrh	r2, [r4, r3]
+	ldrh	r2, [r4, #2548]
 	.loc 3 689 0
-	mvn	r7, #0
+	movw	r6, #65535
+.LVL1617:
 	.loc 3 677 0
-	ldr	r3, [r4, #2436]
-	sub	r3, r3, r2
-	mul	r5, r5, r3
+	ldr	r3, [r4, #2480]
+	ldr	r7, .L1792+8
+	subs	r3, r3, r2
+	muls	r5, r3, r5
 	.loc 3 678 0
 	ldrh	r3, [r4, #78]
 	.loc 3 677 0
-	str	r5, [r6, #-4056]
+	str	r5, [r7, #-216]
 	.loc 3 678 0
-	mul	r5, r5, r3
+	muls	r5, r3, r5
 	.loc 3 679 0
 	ldrh	r3, [r4, #34]
 	.loc 3 678 0
-	str	r5, [r4, #2436]
+	str	r5, [r4, #2480]
 	.loc 3 679 0
-	mul	r5, r5, r3
+	muls	r5, r3, r5
 	str	r5, [r4, #116]
+	mov	r5, r7
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL1615:
+.LVL1618:
 	.loc 3 687 0
 	ldrh	r2, [r4, #18]
-	mov	r1, #0
-	ldr	r0, [r4, #2260]
-	.loc 3 689 0
-	ldr	r5, .L1758+12
+	movs	r1, #0
+	ldr	r0, [r4, #2300]
+	.loc 3 701 0
+	ldr	r7, .L1792+12
 	.loc 3 687 0
-	lsl	r2, r2, #1
+	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1616:
-	.loc 3 689 0
-	movw	r2, #2568
-	.loc 3 688 0
-	mov	r3, #0
-	.loc 3 689 0
-	strh	r7, [r4, r2]	@ movhi
-	.loc 3 696 0
-	movw	r2, #2280
-	strh	r3, [r4, r2]	@ movhi
+.LVL1619:
 	.loc 3 698 0
-	mov	r1, #255
 	ldrh	r2, [r4, #16]
-	.loc 3 690 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 3 694 0
-	sub	r5, r5, #288
-	.loc 3 701 0
-	mov	r8, r5
 	.loc 3 688 0
-	str	r3, [r4, #2432]
+	movs	r3, #0
+	str	r3, [r4, #2476]
+	.loc 3 698 0
+	movs	r1, #255
+	.loc 3 690 0
+	strh	r3, [r4, #2566]	@ movhi
 	.loc 3 691 0
-	strb	r3, [r4, #2574]
+	strb	r3, [r4, #2570]
 	.loc 3 692 0
-	strb	r3, [r4, #2576]
+	strb	r3, [r4, #2572]
 	.loc 3 698 0
-	lsr	r2, r2, #3
+	lsrs	r2, r2, #3
 	.loc 3 694 0
-	strh	r3, [r5, #2]	@ movhi
+	strh	r3, [r4, #2326]	@ movhi
 	.loc 3 695 0
-	strb	r3, [r4, #2286]
+	strb	r3, [r4, #2330]
+	.loc 3 696 0
+	strh	r3, [r4, #2324]	@ movhi
 	.loc 3 697 0
-	mov	r3, #1
+	movs	r3, #1
 	.loc 3 698 0
 	ldr	r0, [r4]
+	.loc 3 689 0
+	strh	r6, [r4, #2564]	@ movhi
 	.loc 3 697 0
-	strb	r3, [r4, #2288]
+	strb	r3, [r4, #2332]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL1617:
-.L1750:
+.LVL1620:
+.L1784:
 	.loc 3 701 0
-	mov	r0, r8
+	mov	r0, r7
 	bl	make_superblock
-.LVL1618:
+.LVL1621:
 	.loc 3 702 0
-	ldrb	r3, [r4, #2287]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2331]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2324]
 	cmp	r3, #0
-	ldrh	r3, [r5]
-	bne	.L1751
+	bne	.L1785
 	.loc 3 705 0
-	ldr	r2, [r4, #2260]
-	lsl	r3, r3, #1
-	strh	r7, [r2, r3]	@ movhi
+	ldr	r3, [r4, #2300]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
 	.loc 3 706 0
-	ldrh	r3, [r5]
-	add	r3, r3, #1
-	strh	r3, [r5]	@ movhi
+	ldrh	r3, [r4, #2324]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2324]	@ movhi
 	.loc 3 707 0
-	b	.L1750
-.L1737:
+	b	.L1784
+.L1771:
 	.loc 3 636 0 discriminator 3
-	ldr	ip, [r4, #3776]
-	mvn	r1, r3
+	ldr	r5, [r4, #3776]
+	mvns	r1, r3
 	orr	r1, r3, r1, lsl #16
-	str	r1, [ip, r3, lsl #2]
+	str	r1, [r5, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	ldr	r1, [r4, #3768]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1736
-.LVL1619:
-.L1739:
+	b	.L1770
+.LVL1622:
+.L1773:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r6
-	mov	r1, #1
+	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL1620:
+.LVL1623:
 	.loc 3 642 0 discriminator 3
-	add	r6, r6, #1
+	adds	r6, r6, #1
 	.loc 3 643 0 discriminator 3
 	add	r5, r5, r0
-.LVL1621:
+.LVL1624:
 	uxth	r5, r5
-.LVL1622:
+.LVL1625:
 	.loc 3 642 0 discriminator 3
 	uxth	r6, r6
-	b	.L1738
-.L1740:
+	b	.L1772
+.L1774:
 	.loc 3 647 0
 	mov	r0, r5
 	bl	__aeabi_uidiv
-.LVL1623:
+.LVL1626:
 	ldr	r3, [r4, #108]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL1624:
+.LVL1627:
 	.loc 3 648 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1625:
+.LVL1628:
 	.loc 3 650 0
 	ldrh	r5, [r4, #16]
-.LVL1626:
-.L1742:
+.LVL1629:
+.L1776:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r5
-	bls	.L1744
+	bls	.L1778
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r5
-	mov	r1, #1
+	movs	r1, #1
 	.loc 3 650 0 discriminator 3
-	add	r5, r5, #1
+	adds	r5, r5, #1
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1627:
+.LVL1630:
 	.loc 3 650 0 discriminator 3
 	uxth	r5, r5
-	b	.L1742
-.LVL1628:
-.L1745:
+	b	.L1776
+.LVL1631:
+.L1779:
 	.loc 3 657 0 discriminator 3
-	mov	r1, #0
+	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL1629:
+.LVL1632:
 	add	r6, r6, r0
-.LVL1630:
+.LVL1633:
 	uxth	r6, r6
-.LVL1631:
-	b	.L1741
-.LVL1632:
-.L1751:
+.LVL1634:
+	b	.L1775
+.LVL1635:
+.L1785:
 	.loc 3 709 0
-	ldr	r2, [r4, #2472]
-	.loc 3 710 0
-	lsl	r3, r3, #1
-	ldrh	r1, [r5, #4]
+	ldr	r3, [r4, #2516]
 	.loc 3 721 0
-	mvn	r7, #0
+	movw	r6, #65535
+	.loc 3 710 0
+	ldrh	r1, [r4, #2328]
+	.loc 3 717 0
+	ldr	r7, .L1792+16
 	.loc 3 709 0
-	str	r2, [r4, #2292]
-	add	r2, r2, #1
-	str	r2, [r4, #2472]
+	str	r3, [r4, #2336]
+	adds	r3, r3, #1
+	str	r3, [r4, #2516]
 	.loc 3 710 0
-	ldr	r2, [r4, #2260]
-	strh	r1, [r2, r3]	@ movhi
+	ldr	r3, [r4, #2300]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 712 0
-	mov	r3, #0
-	ldr	r2, .L1758+16
-	.loc 3 714 0
-	movw	r1, #2328
+	movs	r3, #0
+	strh	r3, [r4, #2374]	@ movhi
 	.loc 3 713 0
-	strb	r3, [r4, #2334]
-	.loc 3 712 0
-	strh	r3, [r2, #2]	@ movhi
-	.loc 3 717 0
-	mov	r8, r2
+	strb	r3, [r4, #2378]
 	.loc 3 714 0
-	ldrh	r3, [r5]
-	mov	r5, r2
-	add	r3, r3, #1
-	strh	r3, [r4, r1]	@ movhi
+	ldrh	r3, [r4, #2324]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2372]	@ movhi
 	.loc 3 715 0
-	mov	r3, #1
-	strb	r3, [r4, #2336]
-.L1752:
+	movs	r3, #1
+	strb	r3, [r4, #2380]
+.L1786:
 	.loc 3 717 0
-	mov	r0, r8
+	mov	r0, r7
 	bl	make_superblock
-.LVL1633:
+.LVL1636:
 	.loc 3 718 0
-	ldrb	r3, [r4, #2335]	@ zero_extendqisi2
-	cmp	r3, #0
-	ldrh	r3, [r5]
-	bne	.L1753
+	ldrb	r3, [r4, #2379]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2372]
+	cbnz	r3, .L1787
 	.loc 3 721 0
-	ldr	r2, [r4, #2260]
-	lsl	r3, r3, #1
-	strh	r7, [r2, r3]	@ movhi
+	ldr	r3, [r4, #2300]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
 	.loc 3 722 0
-	ldrh	r3, [r5]
-	add	r3, r3, #1
-	strh	r3, [r5]	@ movhi
+	ldrh	r3, [r4, #2372]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2372]	@ movhi
 	.loc 3 723 0
-	b	.L1752
-.L1753:
+	b	.L1786
+.L1787:
 	.loc 3 725 0
-	ldr	r2, [r4, #2472]
-	.loc 3 726 0
-	lsl	r3, r3, #1
-	ldrh	r1, [r5, #4]
+	ldr	r3, [r4, #2516]
 	.loc 3 727 0
-	mvn	r5, #0
+	movw	r6, #65535
+	.loc 3 726 0
+	ldrh	r1, [r4, #2376]
 	.loc 3 725 0
-	str	r2, [r4, #2340]
-	add	r2, r2, #1
-	str	r2, [r4, #2472]
+	str	r3, [r4, #2384]
+	adds	r3, r3, #1
+	str	r3, [r4, #2516]
 	.loc 3 726 0
-	ldr	r2, [r4, #2260]
-	strh	r1, [r2, r3]	@ movhi
+	ldr	r3, [r4, #2300]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	movw	r3, #2376
-	strh	r5, [r4, r3]	@ movhi
+	strh	r6, [r4, #2420]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1634:
-	ldr	r3, .L1758+20
-	movw	r2, #2556
-	strh	r0, [r4, r2]	@ movhi
+.LVL1637:
 	.loc 3 731 0
-	mov	r2, #0
-	strh	r2, [r3, #2]	@ movhi
+	movs	r3, #0
+	.loc 3 730 0
+	strh	r0, [r4, #2552]	@ movhi
+	.loc 3 731 0
+	strh	r3, [r4, #2554]	@ movhi
 	.loc 3 733 0
-	ldr	r2, [r6, #-4056]
+	ldr	r3, [r5, #-216]
 	.loc 3 732 0
-	strh	r5, [r3, #4]	@ movhi
+	strh	r6, [r4, #2556]	@ movhi
 	.loc 3 733 0
-	strh	r2, [r3, #6]	@ movhi
+	strh	r3, [r4, #2558]	@ movhi
 	.loc 3 734 0
-	ldr	r3, [r4, #2472]
-	str	r3, [r4, #2564]
-	add	r3, r3, #1
-	str	r3, [r4, #2472]
+	ldr	r3, [r4, #2516]
+	str	r3, [r4, #2560]
+	adds	r3, r3, #1
+	str	r3, [r4, #2516]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL1635:
+.LVL1638:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL1636:
-	cmp	r0, #0
-	.loc 3 739 0
-	mov	r0, #0
+.LVL1639:
+	cbnz	r0, .L1788
 	.loc 3 737 0
-	ldreq	r3, .L1758+24
-	moveq	r2, #1
-	streq	r2, [r3]
+	ldr	r3, .L1792+20
+	movs	r2, #1
+	str	r2, [r3]
+.L1788:
 	.loc 3 739 0
-	ldmfd	sp, {r3, r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1759:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+.L1793:
 	.align	2
-.L1758:
+.L1792:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2568
-	.word	.LANCHOR0+2328
-	.word	.LANCHOR0+2556
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
 	.word	.LANCHOR2
-.LFE150:
+.LFE160:
 	.fnend
 	.size	ftl_low_format, .-ftl_low_format
-	.align	2
+	.align	1
 	.global	sftl_init
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	sftl_init, %function
 sftl_init:
 	.fnstart
-.LFB151:
+.LFB161:
 	.loc 3 743 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	.movsp ip
-	mov	ip, sp
-.LCFI452:
-	push	{r4, r5, fp, ip, lr, pc}
-	.pad #4
-	.save {r4, r5, fp, ip, lr}
-.LCFI453:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI454:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 3 743 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.save {r3, r4, r5, lr}
+.LCFI199:
 	.loc 3 746 0
-	mvn	r3, #0
-	ldr	r5, .L1766
+	mov	r3, #-1
+	ldr	r5, .L1800
 	.loc 3 753 0
-	ldr	r4, .L1766+4
+	ldr	r4, .L1800+4
 	.loc 3 749 0
-	ldr	r1, .L1766+8
-	ldr	r0, .L1766+12
+	ldr	r1, .L1800+8
+	ldr	r0, .L1800+12
 	.loc 3 746 0
 	str	r3, [r5]
 	.loc 3 749 0
 	bl	printk
-.LVL1637:
+.LVL1640:
 	.loc 3 750 0
-	ldr	r0, .L1766+16
+	ldr	r0, .L1800+16
 	bl	FtlConstantsInit
-.LVL1638:
+.LVL1641:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL1639:
+.LVL1642:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL1640:
+.LVL1643:
 	.loc 3 753 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1641:
+.LVL1644:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL1642:
-	cmp	r0, #0
-	bne	.L1764
+.LVL1645:
+	cbnz	r0, .L1798
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL1643:
-	cmp	r0, #0
-	bne	.L1764
+.LVL1646:
+	cbnz	r0, .L1798
 	.loc 3 779 0
-	mov	r3, #1
+	movs	r3, #1
 	str	r3, [r5]
 	.loc 3 783 0
-	movw	r3, #2276
-	ldrh	r3, [r4, r3]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #15
-	bhi	.L1764
+	bhi	.L1798
 	movw	r4, #8129
-.L1763:
-.LBB524:
+.L1797:
+.LBB550:
 	.loc 3 786 0 discriminator 3
-	mov	r1, #1
-	mov	r0, #0
+	movs	r1, #1
+	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1644:
+.LVL1647:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-	bne	.L1763
-.L1764:
-.LBE524:
+	bne	.L1797
+.L1798:
+.LBE550:
 	.loc 3 794 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1767:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1801:
 	.align	2
-.L1766:
+.L1800:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LC70
 	.word	.LC71
 	.word	g_nand_phy_info
-.LFE151:
+.LFE161:
 	.fnend
 	.size	sftl_init, .-sftl_init
-	.align	2
+	.align	1
 	.global	ftl_memcmp
 	.syntax unified
-	.arm
+	.thumb
+	.thumb_func
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
 	.fnstart
-.LFB269:
+.LFB279:
 	.loc 1 211 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1645:
-	.movsp ip
-	mov	ip, sp
-.LCFI455:
-	push	{fp, ip, lr, pc}
-	.pad #4
-	.save {fp, ip, lr}
-.LCFI456:
-	.setfp fp, ip, #-4
-	sub	fp, ip, #4
-.LCFI457:
-	push	{lr}
-	bl	__gnu_mcount_nc
-	.loc 1 211 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1648:
 	.loc 1 212 0
-	bl	memcmp
-.LVL1646:
-	.loc 1 213 0
-	ldmfd	sp, {fp, sp, pc}
-.LFE269:
+	b	memcmp
+.LVL1649:
+.LFE279:
 	.fnend
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
@@ -20852,141 +19431,141 @@ ftl_memcmp:
 	.global	c_ftl_nand_type
 	.section	.rodata
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6704, %object
-	.size	__func__.6704, 17
-__func__.6704:
+	.type	__func__.6616, %object
+	.size	__func__.6616, 17
+__func__.6616:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6699, %object
-	.size	__func__.6699, 17
-__func__.6699:
+	.type	__func__.6611, %object
+	.size	__func__.6611, 17
+__func__.6611:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6734, %object
-	.size	__func__.6734, 17
-__func__.6734:
+	.type	__func__.6647, %object
+	.size	__func__.6647, 17
+__func__.6647:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6766, %object
-	.size	__func__.6766, 22
-__func__.6766:
+	.type	__func__.6679, %object
+	.size	__func__.6679, 22
+__func__.6679:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6807, %object
-	.size	__func__.6807, 26
-__func__.6807:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6871, %object
-	.size	__func__.6871, 22
-__func__.6871:
+	.type	__func__.6785, %object
+	.size	__func__.6785, 22
+__func__.6785:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7194, %object
-	.size	__func__.7194, 16
-__func__.7194:
+	.type	__func__.7108, %object
+	.size	__func__.7108, 16
+__func__.7108:
 	.ascii	"make_superblock\000"
-	.type	__func__.7368, %object
-	.size	__func__.7368, 19
-__func__.7368:
+	.type	__func__.7283, %object
+	.size	__func__.7283, 19
+__func__.7283:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.7608, %object
-	.size	__func__.7608, 15
-__func__.7608:
+	.type	__func__.7523, %object
+	.size	__func__.7523, 15
+__func__.7523:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.7625, %object
-	.size	__func__.7625, 15
-__func__.7625:
+	.type	__func__.7540, %object
+	.size	__func__.7540, 15
+__func__.7540:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6317, %object
-	.size	__func__.6317, 11
-__func__.6317:
+	.type	__func__.6721, %object
+	.size	__func__.6721, 26
+__func__.6721:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.type	__func__.6235, %object
+	.size	__func__.6235, 11
+__func__.6235:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6533, %object
-	.size	__func__.6533, 14
-__func__.6533:
+	.type	__func__.6451, %object
+	.size	__func__.6451, 14
+__func__.6451:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6775, %object
-	.size	__func__.6775, 16
-__func__.6775:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 16
+__func__.6688:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6832, %object
-	.size	__func__.6832, 31
-__func__.6832:
+	.type	__func__.6746, %object
+	.size	__func__.6746, 31
+__func__.6746:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6846, %object
-	.size	__func__.6846, 16
-__func__.6846:
+	.type	__func__.6760, %object
+	.size	__func__.6760, 16
+__func__.6760:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6818, %object
-	.size	__func__.6818, 15
-__func__.6818:
+	.type	__func__.6732, %object
+	.size	__func__.6732, 15
+__func__.6732:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6888, %object
-	.size	__func__.6888, 9
-__func__.6888:
+	.type	__func__.6802, %object
+	.size	__func__.6802, 9
+__func__.6802:
 	.ascii	"log2phys\000"
-	.type	__func__.7103, %object
-	.size	__func__.7103, 16
-__func__.7103:
+	.type	__func__.7017, %object
+	.size	__func__.7017, 16
+__func__.7017:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7256, %object
-	.size	__func__.7256, 14
-__func__.7256:
+	.type	__func__.7170, %object
+	.size	__func__.7170, 14
+__func__.7170:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6983, %object
-	.size	__func__.6983, 14
-__func__.6983:
+	.type	__func__.6897, %object
+	.size	__func__.6897, 14
+__func__.6897:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7215, %object
-	.size	__func__.7215, 18
-__func__.7215:
+	.type	__func__.7129, %object
+	.size	__func__.7129, 18
+__func__.7129:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7340, %object
-	.size	__func__.7340, 25
-__func__.7340:
+	.type	__func__.7255, %object
+	.size	__func__.7255, 25
+__func__.7255:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7381, %object
-	.size	__func__.7381, 16
-__func__.7381:
+	.type	__func__.7296, %object
+	.size	__func__.7296, 16
+__func__.7296:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7388, %object
-	.size	__func__.7388, 20
-__func__.7388:
+	.type	__func__.7303, %object
+	.size	__func__.7303, 20
+__func__.7303:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7137, %object
-	.size	__func__.7137, 22
-__func__.7137:
+	.type	__func__.7051, %object
+	.size	__func__.7051, 22
+__func__.7051:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6576, %object
-	.size	__func__.6576, 11
-__func__.6576:
+	.type	__func__.6494, %object
+	.size	__func__.6494, 11
+__func__.6494:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6961, %object
-	.size	__func__.6961, 15
-__func__.6961:
+	.type	__func__.6875, %object
+	.size	__func__.6875, 15
+__func__.6875:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7240, %object
-	.size	__func__.7240, 21
-__func__.7240:
+	.type	__func__.7154, %object
+	.size	__func__.7154, 21
+__func__.7154:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7361, %object
-	.size	__func__.7361, 29
-__func__.7361:
+	.type	__func__.7276, %object
+	.size	__func__.7276, 29
+__func__.7276:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6441, %object
-	.size	__func__.6441, 13
-__func__.6441:
+	.type	__func__.6359, %object
+	.size	__func__.6359, 13
+__func__.6359:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7458, %object
-	.size	__func__.7458, 19
-__func__.7458:
+	.type	__func__.7373, %object
+	.size	__func__.7373, 19
+__func__.7373:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7564, %object
-	.size	__func__.7564, 23
-__func__.7564:
+	.type	__func__.7479, %object
+	.size	__func__.7479, 23
+__func__.7479:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6469, %object
-	.size	__func__.6469, 9
-__func__.6469:
+	.type	__func__.6387, %object
+	.size	__func__.6387, 9
+__func__.6387:
 	.ascii	"FtlWrite\000"
-	.type	__func__.7040, %object
-	.size	__func__.7040, 15
-__func__.7040:
+	.type	__func__.6954, %object
+	.size	__func__.6954, 15
+__func__.6954:
 	.ascii	"FtlLoadSysInfo\000"
 	.data
 	.align	2
@@ -21007,7 +19586,7 @@ power_up_flag:
 	.bss
 	.align	2
 	.set	.LANCHOR0,. + 0
-	.set	.LANCHOR3,. + 8184
+	.set	.LANCHOR3,. + 4344
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -21163,14 +19742,10 @@ gBbtInfo:
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.space	2056
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
-	.space	4
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
-	.space	4
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
@@ -21182,6 +19757,10 @@ p_data_block_list_head:
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
+	.space	4
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
 	.space	4
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
@@ -21297,10 +19876,6 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -21404,6 +19979,10 @@ g_gc_bad_block_gc_index:
 	.size	req_sys, 20
 req_sys:
 	.space	20
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -21754,7 +20333,7 @@ check_vpc_table:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 .LC70:
-	.ascii	"SFTL version: 5.0.43 20180116\000"
+	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
 .LC72:
@@ -21771,53 +20350,60 @@ check_vpc_table:
 .LC77:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 .LC78:
-	.ascii	"%s error allocating memory. return -1\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
 .LC79:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 .LC80:
-	.ascii	"spare:\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC81:
-	.ascii	"map_ppn:\000"
+	.ascii	"%s error allocating memory. return -1\012\000"
 .LC82:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC83:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"spare:\000"
 .LC84:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"map_ppn:\000"
 .LC85:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC86:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+.LC87:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC88:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC89:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC87:
+.LC90:
 	.ascii	"...%s enter...\012\000"
-.LC88:
+.LC91:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC89:
+.LC92:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC90:
+.LC93:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC91:
+.LC94:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC92:
+.LC95:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC93:
+.LC96:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC94:
+.LC97:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC95:
+.LC98:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC96:
+.LC99:
 	.ascii	"no ect\000"
-.LC97:
+.LC100:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC98:
+.LC101:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC99:
+.LC102:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC100:
+.LC103:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC101:
+.LC104:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.debug_frame,"",%progbits
 .Lframe0:
@@ -21838,711 +20424,395 @@ check_vpc_table:
 	.4byte	.LEFDE0-.LASFDE0
 .LASFDE0:
 	.4byte	.Lframe0
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
 	.byte	0x4
-	.4byte	.LCFI0-.LFB261
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI1-.LCFI0
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
+	.4byte	.LCFI0-.LFB271
+	.byte	0xe
+	.uleb128 0x20
+	.byte	0x83
 	.uleb128 0x8
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x7
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI2-.LCFI1
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE0:
 .LSFDE2:
 	.4byte	.LEFDE2-.LASFDE2
 .LASFDE2:
 	.4byte	.Lframe0
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.byte	0x4
-	.4byte	.LCFI3-.LFB276
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI4-.LCFI3
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI5-.LCFI4
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB286
+	.4byte	.LFE286-.LFB286
 	.align	2
 .LEFDE2:
 .LSFDE4:
 	.4byte	.LEFDE4-.LASFDE4
 .LASFDE4:
 	.4byte	.Lframe0
-	.4byte	.LFB142
-	.4byte	.LFE142-.LFB142
-	.byte	0x4
-	.4byte	.LCFI6-.LFB142
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI7-.LCFI6
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI8-.LCFI7
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB152
+	.4byte	.LFE152-.LFB152
 	.align	2
 .LEFDE4:
 .LSFDE6:
 	.4byte	.LEFDE6-.LASFDE6
 .LASFDE6:
 	.4byte	.Lframe0
-	.4byte	.LFB143
-	.4byte	.LFE143-.LFB143
-	.byte	0x4
-	.4byte	.LCFI9-.LFB143
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI10-.LCFI9
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI11-.LCFI10
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB153
+	.4byte	.LFE153-.LFB153
 	.align	2
 .LEFDE6:
 .LSFDE8:
 	.4byte	.LEFDE8-.LASFDE8
 .LASFDE8:
 	.4byte	.Lframe0
-	.4byte	.LFB144
-	.4byte	.LFE144-.LFB144
-	.byte	0x4
-	.4byte	.LCFI12-.LFB144
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI13-.LCFI12
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI14-.LCFI13
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB154
+	.4byte	.LFE154-.LFB154
 	.align	2
 .LEFDE8:
 .LSFDE10:
 	.4byte	.LEFDE10-.LASFDE10
 .LASFDE10:
 	.4byte	.Lframe0
-	.4byte	.LFB145
-	.4byte	.LFE145-.LFB145
-	.byte	0x4
-	.4byte	.LCFI15-.LFB145
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB155
+	.4byte	.LFE155-.LFB155
 	.byte	0x4
-	.4byte	.LCFI16-.LCFI15
+	.4byte	.LCFI1-.LFB155
+	.byte	0xe
+	.uleb128 0x28
 	.byte	0x83
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
 	.uleb128 0xa
-	.byte	0x86
+	.byte	0x84
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI17-.LCFI16
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE10:
 .LSFDE12:
 	.4byte	.LEFDE12-.LASFDE12
 .LASFDE12:
 	.4byte	.Lframe0
-	.4byte	.LFB148
-	.4byte	.LFE148-.LFB148
-	.byte	0x4
-	.4byte	.LCFI18-.LFB148
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI19-.LCFI18
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI20-.LCFI19
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB158
+	.4byte	.LFE158-.LFB158
 	.align	2
 .LEFDE12:
 .LSFDE14:
 	.4byte	.LEFDE14-.LASFDE14
 .LASFDE14:
 	.4byte	.Lframe0
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
-	.byte	0x4
-	.4byte	.LCFI21-.LFB161
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI22-.LCFI21
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI23-.LCFI22
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB171
+	.4byte	.LFE171-.LFB171
 	.align	2
 .LEFDE14:
 .LSFDE16:
 	.4byte	.LEFDE16-.LASFDE16
 .LASFDE16:
 	.4byte	.Lframe0
-	.4byte	.LFB162
-	.4byte	.LFE162-.LFB162
-	.byte	0x4
-	.4byte	.LCFI24-.LFB162
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB172
+	.4byte	.LFE172-.LFB172
 	.byte	0x4
-	.4byte	.LCFI25-.LCFI24
+	.4byte	.LCFI2-.LFB172
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI26-.LCFI25
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI27-.LCFI26
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x20
+	.4byte	.LCFI3-.LCFI2
+	.byte	0xe
+	.uleb128 0x14
 	.align	2
 .LEFDE16:
 .LSFDE18:
 	.4byte	.LEFDE18-.LASFDE18
 .LASFDE18:
 	.4byte	.Lframe0
-	.4byte	.LFB163
-	.4byte	.LFE163-.LFB163
-	.byte	0x4
-	.4byte	.LCFI28-.LFB163
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB173
+	.4byte	.LFE173-.LFB173
 	.byte	0x4
-	.4byte	.LCFI29-.LCFI28
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI4-.LFB173
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI30-.LCFI29
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE18:
 .LSFDE20:
 	.4byte	.LEFDE20-.LASFDE20
 .LASFDE20:
 	.4byte	.Lframe0
-	.4byte	.LFB164
-	.4byte	.LFE164-.LFB164
-	.byte	0x4
-	.4byte	.LCFI31-.LFB164
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI32-.LCFI31
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI33-.LCFI32
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB174
+	.4byte	.LFE174-.LFB174
 	.align	2
 .LEFDE20:
 .LSFDE22:
 	.4byte	.LEFDE22-.LASFDE22
 .LASFDE22:
 	.4byte	.Lframe0
-	.4byte	.LFB167
-	.4byte	.LFE167-.LFB167
-	.byte	0x4
-	.4byte	.LCFI34-.LFB167
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI35-.LCFI34
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI36-.LCFI35
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB177
+	.4byte	.LFE177-.LFB177
 	.align	2
 .LEFDE22:
 .LSFDE24:
-	.4byte	.LEFDE24-.LASFDE24
-.LASFDE24:
-	.4byte	.Lframe0
-	.4byte	.LFB168
-	.4byte	.LFE168-.LFB168
-	.byte	0x4
-	.4byte	.LCFI37-.LFB168
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LEFDE24-.LASFDE24
+.LASFDE24:
+	.4byte	.Lframe0
+	.4byte	.LFB178
+	.4byte	.LFE178-.LFB178
 	.byte	0x4
-	.4byte	.LCFI38-.LCFI37
+	.4byte	.LCFI5-.LFB178
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI39-.LCFI38
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE24:
 .LSFDE26:
 	.4byte	.LEFDE26-.LASFDE26
 .LASFDE26:
 	.4byte	.Lframe0
-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
-	.byte	0x4
-	.4byte	.LCFI40-.LFB172
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB182
+	.4byte	.LFE182-.LFB182
 	.byte	0x4
-	.4byte	.LCFI41-.LCFI40
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI6-.LFB182
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI42-.LCFI41
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE26:
 .LSFDE28:
 	.4byte	.LEFDE28-.LASFDE28
 .LASFDE28:
 	.4byte	.Lframe0
-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
-	.byte	0x4
-	.4byte	.LCFI43-.LFB173
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB183
+	.4byte	.LFE183-.LFB183
 	.byte	0x4
-	.4byte	.LCFI44-.LCFI43
+	.4byte	.LCFI7-.LFB183
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI45-.LCFI44
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE28:
 .LSFDE30:
 	.4byte	.LEFDE30-.LASFDE30
 .LASFDE30:
 	.4byte	.Lframe0
-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
-	.byte	0x4
-	.4byte	.LCFI46-.LFB174
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB184
+	.4byte	.LFE184-.LFB184
 	.byte	0x4
-	.4byte	.LCFI47-.LCFI46
+	.4byte	.LCFI8-.LFB184
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI48-.LCFI47
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE30:
 .LSFDE32:
 	.4byte	.LEFDE32-.LASFDE32
 .LASFDE32:
 	.4byte	.Lframe0
-	.4byte	.LFB175
-	.4byte	.LFE175-.LFB175
-	.byte	0x4
-	.4byte	.LCFI49-.LFB175
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI50-.LCFI49
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI51-.LCFI50
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB185
+	.4byte	.LFE185-.LFB185
 	.align	2
 .LEFDE32:
 .LSFDE34:
 	.4byte	.LEFDE34-.LASFDE34
 .LASFDE34:
 	.4byte	.Lframe0
-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
-	.byte	0x4
-	.4byte	.LCFI52-.LFB177
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB187
+	.4byte	.LFE187-.LFB187
 	.byte	0x4
-	.4byte	.LCFI53-.LCFI52
+	.4byte	.LCFI9-.LFB187
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI54-.LCFI53
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE34:
 .LSFDE36:
 	.4byte	.LEFDE36-.LASFDE36
 .LASFDE36:
 	.4byte	.Lframe0
-	.4byte	.LFB178
-	.4byte	.LFE178-.LFB178
-	.byte	0x4
-	.4byte	.LCFI55-.LFB178
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI56-.LCFI55
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI57-.LCFI56
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB188
+	.4byte	.LFE188-.LFB188
 	.align	2
 .LEFDE36:
 .LSFDE38:
 	.4byte	.LEFDE38-.LASFDE38
 .LASFDE38:
 	.4byte	.Lframe0
-	.4byte	.LFB179
-	.4byte	.LFE179-.LFB179
-	.byte	0x4
-	.4byte	.LCFI58-.LFB179
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI59-.LCFI58
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI60-.LCFI59
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB189
+	.4byte	.LFE189-.LFB189
 	.align	2
 .LEFDE38:
 .LSFDE40:
 	.4byte	.LEFDE40-.LASFDE40
 .LASFDE40:
 	.4byte	.Lframe0
-	.4byte	.LFB181
-	.4byte	.LFE181-.LFB181
-	.byte	0x4
-	.4byte	.LCFI61-.LFB181
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB191
+	.4byte	.LFE191-.LFB191
 	.byte	0x4
-	.4byte	.LCFI62-.LCFI61
+	.4byte	.LCFI10-.LFB191
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI63-.LCFI62
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE40:
 .LSFDE42:
 	.4byte	.LEFDE42-.LASFDE42
 .LASFDE42:
 	.4byte	.Lframe0
-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
+	.4byte	.LFB192
+	.4byte	.LFE192-.LFB192
 	.byte	0x4
-	.4byte	.LCFI64-.LFB182
-	.byte	0xd
+	.4byte	.LCFI11-.LFB192
+	.byte	0xe
 	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI65-.LCFI64
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI66-.LCFI65
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE42:
 .LSFDE44:
 	.4byte	.LEFDE44-.LASFDE44
 .LASFDE44:
 	.4byte	.Lframe0
-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
-	.byte	0x4
-	.4byte	.LCFI67-.LFB183
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB196
+	.4byte	.LFE196-.LFB196
 	.byte	0x4
-	.4byte	.LCFI68-.LCFI67
-	.byte	0x8b
+	.4byte	.LCFI12-.LFB196
+	.byte	0xe
+	.uleb128 0x30
+	.byte	0x84
+	.uleb128 0x9
+	.byte	0x85
+	.uleb128 0x8
+	.byte	0x86
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI69-.LCFI68
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI13-.LCFI12
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	.LCFI14-.LCFI13
+	.byte	0xb
 	.align	2
 .LEFDE44:
 .LSFDE46:
 	.4byte	.LEFDE46-.LASFDE46
 .LASFDE46:
 	.4byte	.Lframe0
-	.4byte	.LFB186
-	.4byte	.LFE186-.LFB186
-	.byte	0x4
-	.4byte	.LCFI70-.LFB186
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB195
+	.4byte	.LFE195-.LFB195
 	.byte	0x4
-	.4byte	.LCFI71-.LCFI70
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
+	.4byte	.LCFI15-.LFB195
+	.byte	0xe
 	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x83
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI72-.LCFI71
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI73-.LCFI72
+	.4byte	.LCFI16-.LCFI15
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xce
+	.byte	0xc3
+	.byte	0xe
+	.uleb128 0
 	.byte	0x4
-	.4byte	.LCFI74-.LCFI73
+	.4byte	.LCFI17-.LCFI16
 	.byte	0xb
 	.align	2
 .LEFDE46:
@@ -22550,625 +20820,441 @@ check_vpc_table:
 	.4byte	.LEFDE48-.LASFDE48
 .LASFDE48:
 	.4byte	.Lframe0
-	.4byte	.LFB185
-	.4byte	.LFE185-.LFB185
-	.byte	0x4
-	.4byte	.LCFI75-.LFB185
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB197
+	.4byte	.LFE197-.LFB197
 	.byte	0x4
-	.4byte	.LCFI76-.LCFI75
-	.byte	0x8b
+	.4byte	.LCFI18-.LFB197
+	.byte	0xe
+	.uleb128 0x20
+	.byte	0x84
+	.uleb128 0x8
+	.byte	0x85
+	.uleb128 0x7
+	.byte	0x86
+	.uleb128 0x6
+	.byte	0x87
+	.uleb128 0x5
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI77-.LCFI76
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE48:
 .LSFDE50:
 	.4byte	.LEFDE50-.LASFDE50
 .LASFDE50:
 	.4byte	.Lframe0
-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
-	.byte	0x4
-	.4byte	.LCFI78-.LFB187
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB194
+	.4byte	.LFE194-.LFB194
 	.byte	0x4
-	.4byte	.LCFI79-.LCFI78
-	.byte	0x83
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
+	.4byte	.LCFI19-.LFB194
+	.byte	0xe
 	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x83
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI80-.LCFI79
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI20-.LCFI19
+	.byte	0xa
+	.byte	0xce
+	.byte	0xc3
+	.byte	0xe
+	.uleb128 0
+	.byte	0x4
+	.4byte	.LCFI21-.LCFI20
+	.byte	0xb
 	.align	2
 .LEFDE50:
 .LSFDE52:
 	.4byte	.LEFDE52-.LASFDE52
 .LASFDE52:
 	.4byte	.Lframe0
-	.4byte	.LFB184
-	.4byte	.LFE184-.LFB184
-	.byte	0x4
-	.4byte	.LCFI81-.LFB184
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB198
+	.4byte	.LFE198-.LFB198
 	.byte	0x4
-	.4byte	.LCFI82-.LCFI81
-	.byte	0x8b
+	.4byte	.LCFI22-.LFB198
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x84
+	.uleb128 0x6
+	.byte	0x85
+	.uleb128 0x5
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI83-.LCFI82
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE52:
 .LSFDE54:
 	.4byte	.LEFDE54-.LASFDE54
 .LASFDE54:
 	.4byte	.Lframe0
-	.4byte	.LFB188
-	.4byte	.LFE188-.LFB188
-	.byte	0x4
-	.4byte	.LCFI84-.LFB188
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB199
+	.4byte	.LFE199-.LFB199
 	.byte	0x4
-	.4byte	.LCFI85-.LCFI84
+	.4byte	.LCFI23-.LFB199
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI86-.LCFI85
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE54:
 .LSFDE56:
 	.4byte	.LEFDE56-.LASFDE56
 .LASFDE56:
 	.4byte	.Lframe0
-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
-	.byte	0x4
-	.4byte	.LCFI87-.LFB189
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI88-.LCFI87
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI89-.LCFI88
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB200
+	.4byte	.LFE200-.LFB200
 	.align	2
 .LEFDE56:
 .LSFDE58:
 	.4byte	.LEFDE58-.LASFDE58
 .LASFDE58:
 	.4byte	.Lframe0
-	.4byte	.LFB190
-	.4byte	.LFE190-.LFB190
-	.byte	0x4
-	.4byte	.LCFI90-.LFB190
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB201
+	.4byte	.LFE201-.LFB201
 	.byte	0x4
-	.4byte	.LCFI91-.LCFI90
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI24-.LFB201
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x84
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI92-.LCFI91
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE58:
 .LSFDE60:
 	.4byte	.LEFDE60-.LASFDE60
 .LASFDE60:
 	.4byte	.Lframe0
-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
-	.byte	0x4
-	.4byte	.LCFI93-.LFB191
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB202
+	.4byte	.LFE202-.LFB202
 	.byte	0x4
-	.4byte	.LCFI94-.LCFI93
-	.byte	0x8b
+	.4byte	.LCFI25-.LFB202
+	.byte	0xe
+	.uleb128 0x20
+	.byte	0x83
+	.uleb128 0x8
+	.byte	0x84
+	.uleb128 0x7
+	.byte	0x85
+	.uleb128 0x6
+	.byte	0x86
+	.uleb128 0x5
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI95-.LCFI94
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE60:
 .LSFDE62:
 	.4byte	.LEFDE62-.LASFDE62
 .LASFDE62:
 	.4byte	.Lframe0
-	.4byte	.LFB192
-	.4byte	.LFE192-.LFB192
-	.byte	0x4
-	.4byte	.LCFI96-.LFB192
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
 	.byte	0x4
-	.4byte	.LCFI97-.LCFI96
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI26-.LFB210
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI98-.LCFI97
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE62:
 .LSFDE64:
 	.4byte	.LEFDE64-.LASFDE64
 .LASFDE64:
 	.4byte	.Lframe0
-	.4byte	.LFB195
-	.4byte	.LFE195-.LFB195
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
 	.byte	0x4
-	.4byte	.LCFI99-.LFB195
-	.byte	0xd
+	.4byte	.LCFI27-.LFB216
+	.byte	0xe
 	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI100-.LCFI99
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI101-.LCFI100
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE64:
 .LSFDE66:
 	.4byte	.LEFDE66-.LASFDE66
 .LASFDE66:
 	.4byte	.Lframe0
-	.4byte	.LFB200
-	.4byte	.LFE200-.LFB200
-	.byte	0x4
-	.4byte	.LCFI102-.LFB200
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI103-.LCFI102
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI104-.LCFI103
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
 	.align	2
 .LEFDE66:
 .LSFDE68:
 	.4byte	.LEFDE68-.LASFDE68
 .LASFDE68:
 	.4byte	.Lframe0
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.byte	0x4
-	.4byte	.LCFI105-.LFB206
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI106-.LCFI105
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI107-.LCFI106
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
 	.align	2
 .LEFDE68:
 .LSFDE70:
 	.4byte	.LEFDE70-.LASFDE70
 .LASFDE70:
 	.4byte	.Lframe0
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.byte	0x4
-	.4byte	.LCFI108-.LFB212
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
 	.byte	0x4
-	.4byte	.LCFI109-.LCFI108
-	.byte	0x8b
+	.4byte	.LCFI28-.LFB229
+	.byte	0xe
+	.uleb128 0x14
+	.byte	0x84
+	.uleb128 0x5
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI110-.LCFI109
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE70:
 .LSFDE72:
 	.4byte	.LEFDE72-.LASFDE72
 .LASFDE72:
 	.4byte	.Lframe0
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
+	.4byte	.LFB232
+	.4byte	.LFE232-.LFB232
 	.byte	0x4
-	.4byte	.LCFI111-.LFB213
-	.byte	0xd
+	.4byte	.LCFI29-.LFB232
+	.byte	0xe
 	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI112-.LCFI111
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI113-.LCFI112
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE72:
 .LSFDE74:
 	.4byte	.LEFDE74-.LASFDE74
 .LASFDE74:
 	.4byte	.Lframe0
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.byte	0x4
-	.4byte	.LCFI114-.LFB219
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB234
+	.4byte	.LFE234-.LFB234
 	.byte	0x4
-	.4byte	.LCFI115-.LCFI114
+	.4byte	.LCFI30-.LFB234
+	.byte	0xe
+	.uleb128 0x28
+	.byte	0x83
+	.uleb128 0xa
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
+	.uleb128 0x8
+	.byte	0x86
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI116-.LCFI115
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE74:
 .LSFDE76:
 	.4byte	.LEFDE76-.LASFDE76
 .LASFDE76:
 	.4byte	.Lframe0
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.byte	0x4
-	.4byte	.LCFI117-.LFB222
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI118-.LCFI117
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI119-.LCFI118
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE76:
-.LSFDE78:
-	.4byte	.LEFDE78-.LASFDE78
-.LASFDE78:
-	.4byte	.Lframe0
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.byte	0x4
-	.4byte	.LCFI120-.LFB224
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
 	.byte	0x4
-	.4byte	.LCFI121-.LCFI120
+	.4byte	.LCFI31-.LFB243
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI122-.LCFI121
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI123-.LCFI122
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI124-.LCFI123
-	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE76:
+.LSFDE78:
+	.4byte	.LEFDE78-.LASFDE78
+.LASFDE78:
+	.4byte	.Lframe0
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
 	.align	2
 .LEFDE78:
 .LSFDE80:
 	.4byte	.LEFDE80-.LASFDE80
 .LASFDE80:
 	.4byte	.Lframe0
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.byte	0x4
-	.4byte	.LCFI125-.LFB233
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
 	.byte	0x4
-	.4byte	.LCFI126-.LCFI125
-	.byte	0x83
-	.uleb128 0xc
+	.4byte	.LCFI32-.LFB245
+	.byte	0xe
+	.uleb128 0x14
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI127-.LCFI126
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE80:
 .LSFDE82:
 	.4byte	.LEFDE82-.LASFDE82
 .LASFDE82:
 	.4byte	.Lframe0
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.byte	0x4
-	.4byte	.LCFI128-.LFB234
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB150
+	.4byte	.LFE150-.LFB150
 	.byte	0x4
-	.4byte	.LCFI129-.LCFI128
-	.byte	0x8b
+	.4byte	.LCFI33-.LFB150
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x84
+	.uleb128 0x9
+	.byte	0x85
+	.uleb128 0x8
+	.byte	0x86
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI130-.LCFI129
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI34-.LCFI33
+	.byte	0xe
+	.uleb128 0x38
+	.byte	0x4
+	.4byte	.LCFI35-.LCFI34
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	.LCFI36-.LCFI35
+	.byte	0xb
 	.align	2
 .LEFDE82:
 .LSFDE84:
 	.4byte	.LEFDE84-.LASFDE84
 .LASFDE84:
 	.4byte	.Lframe0
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.byte	0x4
-	.4byte	.LCFI131-.LFB235
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB151
+	.4byte	.LFE151-.LFB151
 	.byte	0x4
-	.4byte	.LCFI132-.LCFI131
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI37-.LFB151
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI133-.LCFI132
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE84:
 .LSFDE86:
 	.4byte	.LEFDE86-.LASFDE86
 .LASFDE86:
 	.4byte	.Lframe0
-	.4byte	.LFB140
-	.4byte	.LFE140-.LFB140
-	.byte	0x4
-	.4byte	.LCFI134-.LFB140
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
 	.byte	0x4
-	.4byte	.LCFI135-.LCFI134
+	.4byte	.LCFI38-.LFB246
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI136-.LCFI135
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI39-.LCFI38
+	.byte	0xe
+	.uleb128 0x40
 	.byte	0x4
-	.4byte	.LCFI137-.LCFI136
+	.4byte	.LCFI40-.LCFI39
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI138-.LCFI137
+	.4byte	.LCFI41-.LCFI40
 	.byte	0xb
 	.align	2
 .LEFDE86:
@@ -23176,116 +21262,78 @@ check_vpc_table:
 	.4byte	.LEFDE88-.LASFDE88
 .LASFDE88:
 	.4byte	.Lframe0
-	.4byte	.LFB141
-	.4byte	.LFE141-.LFB141
-	.byte	0x4
-	.4byte	.LCFI139-.LFB141
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB247
+	.4byte	.LFE247-.LFB247
 	.byte	0x4
-	.4byte	.LCFI140-.LCFI139
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI42-.LFB247
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI141-.LCFI140
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE88:
 .LSFDE90:
 	.4byte	.LEFDE90-.LASFDE90
 .LASFDE90:
 	.4byte	.Lframe0
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.byte	0x4
-	.4byte	.LCFI142-.LFB236
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
 	.byte	0x4
-	.4byte	.LCFI143-.LCFI142
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
+	.4byte	.LCFI43-.LFB250
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI144-.LCFI143
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI145-.LCFI144
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI146-.LCFI145
-	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE90:
 .LSFDE92:
 	.4byte	.LEFDE92-.LASFDE92
 .LASFDE92:
 	.4byte	.Lframe0
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.byte	0x4
-	.4byte	.LCFI147-.LFB237
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
 	.byte	0x4
-	.4byte	.LCFI148-.LCFI147
-	.byte	0x8b
+	.4byte	.LCFI44-.LFB253
+	.byte	0xe
+	.uleb128 0x1c
+	.byte	0x84
+	.uleb128 0x7
+	.byte	0x85
+	.uleb128 0x6
+	.byte	0x86
+	.uleb128 0x5
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI149-.LCFI148
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE92:
 .LSFDE94:
-	.4byte	.LEFDE94-.LASFDE94
-.LASFDE94:
-	.4byte	.Lframe0
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.byte	0x4
-	.4byte	.LCFI150-.LFB240
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LEFDE94-.LASFDE94
+.LASFDE94:
+	.4byte	.Lframe0
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
 	.byte	0x4
-	.4byte	.LCFI151-.LCFI150
+	.4byte	.LCFI45-.LFB254
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
 	.uleb128 0x8
 	.byte	0x85
@@ -23294,328 +21342,229 @@ check_vpc_table:
 	.uleb128 0x6
 	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI152-.LCFI151
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE94:
 .LSFDE96:
 	.4byte	.LEFDE96-.LASFDE96
 .LASFDE96:
 	.4byte	.Lframe0
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.byte	0x4
-	.4byte	.LCFI153-.LFB243
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
 	.byte	0x4
-	.4byte	.LCFI154-.LCFI153
+	.4byte	.LCFI46-.LFB255
+	.byte	0xe
+	.uleb128 0x1c
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
 	.uleb128 0x7
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI155-.LCFI154
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE96:
 .LSFDE98:
 	.4byte	.LEFDE98-.LASFDE98
 .LASFDE98:
 	.4byte	.Lframe0
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.byte	0x4
-	.4byte	.LCFI156-.LFB244
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI157-.LCFI156
-	.byte	0x83
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI158-.LCFI157
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
 	.align	2
 .LEFDE98:
 .LSFDE100:
 	.4byte	.LEFDE100-.LASFDE100
 .LASFDE100:
 	.4byte	.Lframe0
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.byte	0x4
-	.4byte	.LCFI159-.LFB245
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
 	.byte	0x4
-	.4byte	.LCFI160-.LCFI159
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
+	.4byte	.LCFI47-.LFB257
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI161-.LCFI160
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE100:
 .LSFDE102:
 	.4byte	.LEFDE102-.LASFDE102
 .LASFDE102:
 	.4byte	.Lframe0
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.byte	0x4
-	.4byte	.LCFI162-.LFB246
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
 	.byte	0x4
-	.4byte	.LCFI163-.LCFI162
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI48-.LFB264
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x84
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI164-.LCFI163
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE102:
 .LSFDE104:
 	.4byte	.LEFDE104-.LASFDE104
 .LASFDE104:
 	.4byte	.Lframe0
-	.4byte	.LFB247
-	.4byte	.LFE247-.LFB247
-	.byte	0x4
-	.4byte	.LCFI165-.LFB247
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
 	.byte	0x4
-	.4byte	.LCFI166-.LCFI165
+	.4byte	.LCFI49-.LFB265
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI167-.LCFI166
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE104:
 .LSFDE106:
 	.4byte	.LEFDE106-.LASFDE106
 .LASFDE106:
 	.4byte	.Lframe0
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.byte	0x4
-	.4byte	.LCFI168-.LFB254
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.byte	0x4
-	.4byte	.LCFI169-.LCFI168
+	.4byte	.LCFI50-.LFB266
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI170-.LCFI169
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE106:
 .LSFDE108:
 	.4byte	.LEFDE108-.LASFDE108
 .LASFDE108:
 	.4byte	.Lframe0
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.byte	0x4
-	.4byte	.LCFI171-.LFB255
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI172-.LCFI171
+	.4byte	.LCFI51-.LFB272
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x7
 	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI173-.LCFI172
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI52-.LCFI51
+	.byte	0xe
+	.uleb128 0x38
+	.byte	0x4
+	.4byte	.LCFI53-.LCFI52
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	.LCFI54-.LCFI53
+	.byte	0xb
 	.align	2
 .LEFDE108:
 .LSFDE110:
 	.4byte	.LEFDE110-.LASFDE110
 .LASFDE110:
 	.4byte	.Lframe0
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.byte	0x4
-	.4byte	.LCFI174-.LFB256
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB180
+	.4byte	.LFE180-.LFB180
 	.byte	0x4
-	.4byte	.LCFI175-.LCFI174
+	.4byte	.LCFI55-.LFB180
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x85
+	.uleb128 0x7
+	.byte	0x86
+	.uleb128 0x6
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI176-.LCFI175
-	.byte	0xc
-	.uleb128 0xb
+	.byte	0x88
 	.uleb128 0x4
+	.byte	0x89
+	.uleb128 0x3
+	.byte	0x8a
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE110:
 .LSFDE112:
 	.4byte	.LEFDE112-.LASFDE112
 .LASFDE112:
 	.4byte	.Lframe0
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.byte	0x4
-	.4byte	.LCFI177-.LFB262
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB186
+	.4byte	.LFE186-.LFB186
 	.byte	0x4
-	.4byte	.LCFI178-.LCFI177
+	.4byte	.LCFI56-.LFB186
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI179-.LCFI178
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI57-.LCFI56
+	.byte	0xe
+	.uleb128 0x70
 	.byte	0x4
-	.4byte	.LCFI180-.LCFI179
+	.4byte	.LCFI58-.LCFI57
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI181-.LCFI180
+	.4byte	.LCFI59-.LCFI58
 	.byte	0xb
 	.align	2
 .LEFDE112:
@@ -23623,84 +21572,75 @@ check_vpc_table:
 	.4byte	.LEFDE114-.LASFDE114
 .LASFDE114:
 	.4byte	.Lframe0
-	.4byte	.LFB170
-	.4byte	.LFE170-.LFB170
-	.byte	0x4
-	.4byte	.LCFI182-.LFB170
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.byte	0x4
-	.4byte	.LCFI183-.LCFI182
-	.byte	0x83
-	.uleb128 0xc
+	.4byte	.LCFI60-.LFB273
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI184-.LCFI183
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI61-.LCFI60
+	.byte	0xe
+	.uleb128 0x50
+	.byte	0x4
+	.4byte	.LCFI62-.LCFI61
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	.LCFI63-.LCFI62
+	.byte	0xb
 	.align	2
 .LEFDE114:
 .LSFDE116:
 	.4byte	.LEFDE116-.LASFDE116
 .LASFDE116:
 	.4byte	.Lframe0
-	.4byte	.LFB176
-	.4byte	.LFE176-.LFB176
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
 	.byte	0x4
-	.4byte	.LCFI185-.LFB176
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI186-.LCFI185
+	.4byte	.LCFI64-.LFB274
+	.byte	0xe
+	.uleb128 0x28
 	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
 	.uleb128 0x7
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x6
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI187-.LCFI186
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI188-.LCFI187
+	.4byte	.LCFI65-.LCFI64
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
+	.byte	0xe
+	.uleb128 0x1c
 	.byte	0x4
-	.4byte	.LCFI189-.LCFI188
+	.4byte	.LCFI66-.LCFI65
 	.byte	0xb
 	.align	2
 .LEFDE116:
@@ -23708,93 +21648,61 @@ check_vpc_table:
 	.4byte	.LEFDE118-.LASFDE118
 .LASFDE118:
 	.4byte	.Lframe0
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.byte	0x4
-	.4byte	.LCFI190-.LFB263
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB190
+	.4byte	.LFE190-.LFB190
 	.byte	0x4
-	.4byte	.LCFI191-.LCFI190
+	.4byte	.LCFI67-.LFB190
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI192-.LCFI191
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI193-.LCFI192
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI194-.LCFI193
-	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE118:
 .LSFDE120:
 	.4byte	.LEFDE120-.LASFDE120
 .LASFDE120:
 	.4byte	.Lframe0
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.byte	0x4
-	.4byte	.LCFI195-.LFB264
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB159
+	.4byte	.LFE159-.LFB159
 	.byte	0x4
-	.4byte	.LCFI196-.LCFI195
+	.4byte	.LCFI68-.LFB159
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
 	.uleb128 0x9
-	.byte	0x86
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x87
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x88
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI197-.LCFI196
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI69-.LCFI68
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI198-.LCFI197
+	.4byte	.LCFI70-.LCFI69
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x28
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI199-.LCFI198
+	.4byte	.LCFI71-.LCFI70
 	.byte	0xb
 	.align	2
 .LEFDE120:
@@ -23802,331 +21710,227 @@ check_vpc_table:
 	.4byte	.LEFDE122-.LASFDE122
 .LASFDE122:
 	.4byte	.Lframe0
-	.4byte	.LFB180
-	.4byte	.LFE180-.LFB180
-	.byte	0x4
-	.4byte	.LCFI200-.LFB180
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB193
+	.4byte	.LFE193-.LFB193
 	.byte	0x4
-	.4byte	.LCFI201-.LCFI200
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI72-.LFB193
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI202-.LCFI201
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE122:
 .LSFDE124:
-	.4byte	.LEFDE124-.LASFDE124
-.LASFDE124:
-	.4byte	.Lframe0
-	.4byte	.LFB149
-	.4byte	.LFE149-.LFB149
-	.byte	0x4
-	.4byte	.LCFI203-.LFB149
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI204-.LCFI203
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
+	.4byte	.LEFDE124-.LASFDE124
+.LASFDE124:
+	.4byte	.Lframe0
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.byte	0x4
+	.4byte	.LCFI73-.LFB205
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI205-.LCFI204
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI206-.LCFI205
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI207-.LCFI206
-	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE124:
 .LSFDE126:
 	.4byte	.LEFDE126-.LASFDE126
 .LASFDE126:
 	.4byte	.Lframe0
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
+	.4byte	.LFB275
+	.4byte	.LFE275-.LFB275
 	.byte	0x4
-	.4byte	.LCFI208-.LFB265
-	.byte	0xd
+	.4byte	.LCFI74-.LFB275
+	.byte	0xe
 	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI209-.LCFI208
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI210-.LCFI209
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI75-.LCFI74
+	.byte	0xe
+	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI211-.LCFI210
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x18
+	.4byte	.LCFI76-.LCFI75
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI77-.LCFI76
+	.byte	0xb
 	.align	2
 .LEFDE126:
 .LSFDE128:
 	.4byte	.LEFDE128-.LASFDE128
 .LASFDE128:
 	.4byte	.Lframe0
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.byte	0x4
-	.4byte	.LCFI212-.LFB266
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
 	.byte	0x4
-	.4byte	.LCFI213-.LCFI212
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI78-.LFB276
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI214-.LCFI213
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE128:
 .LSFDE130:
 	.4byte	.LEFDE130-.LASFDE130
 .LASFDE130:
 	.4byte	.Lframe0
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.byte	0x4
-	.4byte	.LCFI215-.LFB267
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
 	.byte	0x4
-	.4byte	.LCFI216-.LCFI215
+	.4byte	.LCFI79-.LFB277
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI217-.LCFI216
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE130:
 .LSFDE132:
 	.4byte	.LEFDE132-.LASFDE132
 .LASFDE132:
 	.4byte	.Lframe0
-	.4byte	.LFB146
-	.4byte	.LFE146-.LFB146
-	.byte	0x4
-	.4byte	.LCFI218-.LFB146
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB156
+	.4byte	.LFE156-.LFB156
 	.byte	0x4
-	.4byte	.LCFI219-.LCFI218
+	.4byte	.LCFI80-.LFB156
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI220-.LCFI219
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE132:
 .LSFDE134:
 	.4byte	.LEFDE134-.LASFDE134
 .LASFDE134:
 	.4byte	.Lframe0
-	.4byte	.LFB165
-	.4byte	.LFE165-.LFB165
-	.byte	0x4
-	.4byte	.LCFI221-.LFB165
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB175
+	.4byte	.LFE175-.LFB175
 	.byte	0x4
-	.4byte	.LCFI222-.LCFI221
+	.4byte	.LCFI81-.LFB175
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
 	.uleb128 0x8
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x7
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI223-.LCFI222
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE134:
 .LSFDE136:
 	.4byte	.LEFDE136-.LASFDE136
 .LASFDE136:
 	.4byte	.Lframe0
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
-	.byte	0x4
-	.4byte	.LCFI224-.LFB193
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
 	.byte	0x4
-	.4byte	.LCFI225-.LCFI224
+	.4byte	.LCFI82-.LFB203
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI226-.LCFI225
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE136:
 .LSFDE138:
 	.4byte	.LEFDE138-.LASFDE138
 .LASFDE138:
 	.4byte	.Lframe0
-	.4byte	.LFB194
-	.4byte	.LFE194-.LFB194
-	.byte	0x4
-	.4byte	.LCFI227-.LFB194
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
 	.byte	0x4
-	.4byte	.LCFI228-.LCFI227
+	.4byte	.LCFI83-.LFB204
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI229-.LCFI228
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI230-.LCFI229
+	.4byte	.LCFI84-.LCFI83
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI231-.LCFI230
+	.4byte	.LCFI85-.LCFI84
 	.byte	0xb
 	.align	2
 .LEFDE138:
@@ -24134,121 +21938,93 @@ check_vpc_table:
 	.4byte	.LEFDE140-.LASFDE140
 .LASFDE140:
 	.4byte	.Lframe0
-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
-	.byte	0x4
-	.4byte	.LCFI232-.LFB197
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
 	.byte	0x4
-	.4byte	.LCFI233-.LCFI232
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI86-.LFB207
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI234-.LCFI233
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE140:
 .LSFDE142:
 	.4byte	.LEFDE142-.LASFDE142
 .LASFDE142:
 	.4byte	.Lframe0
-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
-	.byte	0x4
-	.4byte	.LCFI235-.LFB198
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
 	.byte	0x4
-	.4byte	.LCFI236-.LCFI235
+	.4byte	.LCFI87-.LFB208
+	.byte	0xe
+	.uleb128 0x28
 	.byte	0x83
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
 	.uleb128 0xa
-	.byte	0x86
+	.byte	0x84
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI237-.LCFI236
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE142:
 .LSFDE144:
 	.4byte	.LEFDE144-.LASFDE144
 .LASFDE144:
 	.4byte	.Lframe0
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.byte	0x4
-	.4byte	.LCFI238-.LFB196
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
 	.byte	0x4
-	.4byte	.LCFI239-.LCFI238
+	.4byte	.LCFI88-.LFB206
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI240-.LCFI239
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI241-.LCFI240
+	.4byte	.LCFI89-.LCFI88
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI242-.LCFI241
+	.4byte	.LCFI90-.LCFI89
 	.byte	0xb
 	.align	2
 .LEFDE144:
@@ -24256,151 +22032,109 @@ check_vpc_table:
 	.4byte	.LEFDE146-.LASFDE146
 .LASFDE146:
 	.4byte	.Lframe0
-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
-	.byte	0x4
-	.4byte	.LCFI243-.LFB199
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
 	.byte	0x4
-	.4byte	.LCFI244-.LCFI243
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI91-.LFB209
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI245-.LCFI244
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE146:
 .LSFDE148:
 	.4byte	.LEFDE148-.LASFDE148
 .LASFDE148:
 	.4byte	.Lframe0
-	.4byte	.LFB202
-	.4byte	.LFE202-.LFB202
-	.byte	0x4
-	.4byte	.LCFI246-.LFB202
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
 	.byte	0x4
-	.4byte	.LCFI247-.LCFI246
-	.byte	0x83
-	.uleb128 0xc
+	.4byte	.LCFI92-.LFB212
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI248-.LCFI247
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE148:
 .LSFDE150:
 	.4byte	.LEFDE150-.LASFDE150
 .LASFDE150:
 	.4byte	.Lframe0
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.byte	0x4
-	.4byte	.LCFI249-.LFB220
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
 	.byte	0x4
-	.4byte	.LCFI250-.LCFI249
+	.4byte	.LCFI93-.LFB230
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI251-.LCFI250
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI252-.LCFI251
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
+	.4byte	.LCFI94-.LCFI93
+	.byte	0xe
+	.uleb128 0x14
 	.align	2
 .LEFDE150:
 .LSFDE152:
 	.4byte	.LEFDE152-.LASFDE152
 .LASFDE152:
 	.4byte	.Lframe0
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.byte	0x4
-	.4byte	.LCFI253-.LFB231
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB241
+	.4byte	.LFE241-.LFB241
 	.byte	0x4
-	.4byte	.LCFI254-.LCFI253
+	.4byte	.LCFI95-.LFB241
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI255-.LCFI254
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI96-.LCFI95
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI256-.LCFI255
+	.4byte	.LCFI97-.LCFI96
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x20
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI257-.LCFI256
+	.4byte	.LCFI98-.LCFI97
 	.byte	0xb
 	.align	2
 .LEFDE152:
@@ -24408,37 +22142,31 @@ check_vpc_table:
 	.4byte	.LEFDE154-.LASFDE154
 .LASFDE154:
 	.4byte	.Lframe0
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.byte	0x4
-	.4byte	.LCFI258-.LFB258
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.byte	0x4
-	.4byte	.LCFI259-.LCFI258
+	.4byte	.LCFI99-.LFB268
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI260-.LCFI259
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI100-.LCFI99
+	.byte	0xe
+	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI261-.LCFI260
+	.4byte	.LCFI101-.LCFI100
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x18
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x4
-	.4byte	.LCFI262-.LCFI261
+	.4byte	.LCFI102-.LCFI101
 	.byte	0xb
 	.align	2
 .LEFDE154:
@@ -24446,47 +22174,37 @@ check_vpc_table:
 	.4byte	.LEFDE156-.LASFDE156
 .LASFDE156:
 	.4byte	.Lframe0
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.byte	0x4
-	.4byte	.LCFI263-.LFB230
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
 	.byte	0x4
-	.4byte	.LCFI264-.LCFI263
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
+	.4byte	.LCFI103-.LFB240
+	.byte	0xe
+	.uleb128 0x30
+	.byte	0x84
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI265-.LCFI264
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI266-.LCFI265
+	.4byte	.LCFI104-.LCFI103
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI267-.LCFI266
+	.4byte	.LCFI105-.LCFI104
 	.byte	0xb
 	.align	2
 .LEFDE156:
@@ -24494,80 +22212,73 @@ check_vpc_table:
 	.4byte	.LEFDE158-.LASFDE158
 .LASFDE158:
 	.4byte	.Lframe0
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.byte	0x4
-	.4byte	.LCFI268-.LFB207
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.byte	0x4
-	.4byte	.LCFI269-.LCFI268
+	.4byte	.LCFI106-.LFB217
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI270-.LCFI269
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI107-.LCFI106
+	.byte	0xa
+	.byte	0xce
+	.byte	0xc6
+	.byte	0xc5
+	.byte	0xc4
+	.byte	0xe
+	.uleb128 0
+	.byte	0x4
+	.4byte	.LCFI108-.LCFI107
+	.byte	0xb
 	.align	2
 .LEFDE158:
 .LSFDE160:
 	.4byte	.LEFDE160-.LASFDE160
 .LASFDE160:
 	.4byte	.Lframe0
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.byte	0x4
-	.4byte	.LCFI271-.LFB210
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.byte	0x4
-	.4byte	.LCFI272-.LCFI271
+	.4byte	.LCFI109-.LFB220
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI273-.LCFI272
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI110-.LCFI109
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI274-.LCFI273
+	.4byte	.LCFI111-.LCFI110
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI275-.LCFI274
+	.4byte	.LCFI112-.LCFI111
 	.byte	0xb
 	.align	2
 .LEFDE160:
@@ -24575,47 +22286,41 @@ check_vpc_table:
 	.4byte	.LEFDE162-.LASFDE162
 .LASFDE162:
 	.4byte	.Lframe0
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.byte	0x4
-	.4byte	.LCFI276-.LFB215
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
 	.byte	0x4
-	.4byte	.LCFI277-.LCFI276
+	.4byte	.LCFI113-.LFB225
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI278-.LCFI277
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI114-.LCFI113
+	.byte	0xe
+	.uleb128 0x40
 	.byte	0x4
-	.4byte	.LCFI279-.LCFI278
+	.4byte	.LCFI115-.LCFI114
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI280-.LCFI279
+	.4byte	.LCFI116-.LCFI115
 	.byte	0xb
 	.align	2
 .LEFDE162:
@@ -24623,503 +22328,361 @@ check_vpc_table:
 	.4byte	.LEFDE164-.LASFDE164
 .LASFDE164:
 	.4byte	.Lframe0
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.byte	0x4
-	.4byte	.LCFI281-.LFB216
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
 	.byte	0x4
-	.4byte	.LCFI282-.LCFI281
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI117-.LFB226
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI283-.LCFI282
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE164:
 .LSFDE166:
 	.4byte	.LEFDE166-.LASFDE166
 .LASFDE166:
 	.4byte	.Lframe0
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.byte	0x4
-	.4byte	.LCFI284-.LFB217
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
 	.byte	0x4
-	.4byte	.LCFI285-.LCFI284
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
+	.4byte	.LCFI118-.LFB227
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI286-.LCFI285
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE166:
 .LSFDE168:
 	.4byte	.LEFDE168-.LASFDE168
 .LASFDE168:
 	.4byte	.Lframe0
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.byte	0x4
-	.4byte	.LCFI287-.LFB218
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
 	.byte	0x4
-	.4byte	.LCFI288-.LCFI287
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI119-.LFB228
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI289-.LCFI288
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE168:
 .LSFDE170:
 	.4byte	.LEFDE170-.LASFDE170
 .LASFDE170:
 	.4byte	.Lframe0
-	.4byte	.LFB147
-	.4byte	.LFE147-.LFB147
-	.byte	0x4
-	.4byte	.LCFI290-.LFB147
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB157
+	.4byte	.LFE157-.LFB157
 	.byte	0x4
-	.4byte	.LCFI291-.LCFI290
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI120-.LFB157
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI292-.LCFI291
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE170:
 .LSFDE172:
 	.4byte	.LEFDE172-.LASFDE172
 .LASFDE172:
 	.4byte	.Lframe0
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.byte	0x4
-	.4byte	.LCFI293-.LFB225
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
 	.byte	0x4
-	.4byte	.LCFI294-.LCFI293
+	.4byte	.LCFI121-.LFB235
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI295-.LCFI294
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI296-.LCFI295
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.4byte	.LCFI122-.LCFI121
+	.byte	0xe
+	.uleb128 0x24
 	.align	2
 .LEFDE172:
 .LSFDE174:
 	.4byte	.LEFDE174-.LASFDE174
 .LASFDE174:
 	.4byte	.Lframe0
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.byte	0x4
-	.4byte	.LCFI297-.LFB249
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
 	.byte	0x4
-	.4byte	.LCFI298-.LCFI297
+	.4byte	.LCFI123-.LFB259
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI299-.LCFI298
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI124-.LCFI123
+	.byte	0xce
+	.byte	0xc4
+	.byte	0xe
+	.uleb128 0
 	.align	2
 .LEFDE174:
 .LSFDE176:
 	.4byte	.LEFDE176-.LASFDE176
 .LASFDE176:
 	.4byte	.Lframe0
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.byte	0x4
-	.4byte	.LCFI300-.LFB250
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
 	.byte	0x4
-	.4byte	.LCFI301-.LCFI300
+	.4byte	.LCFI125-.LFB260
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI302-.LCFI301
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI126-.LCFI125
+	.byte	0xe
+	.uleb128 0x40
 	.byte	0x4
-	.4byte	.LCFI303-.LCFI302
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.4byte	.LCFI127-.LCFI126
+	.byte	0xe
+	.uleb128 0x24
 	.align	2
 .LEFDE176:
 .LSFDE178:
 	.4byte	.LEFDE178-.LASFDE178
 .LASFDE178:
 	.4byte	.Lframe0
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.byte	0x4
-	.4byte	.LCFI304-.LFB268
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI305-.LCFI304
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI306-.LCFI305
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB278
+	.4byte	.LFE278-.LFB278
 	.align	2
 .LEFDE178:
 .LSFDE180:
 	.4byte	.LEFDE180-.LASFDE180
 .LASFDE180:
 	.4byte	.Lframe0
-	.4byte	.LFB166
-	.4byte	.LFE166-.LFB166
-	.byte	0x4
-	.4byte	.LCFI307-.LFB166
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB176
+	.4byte	.LFE176-.LFB176
 	.byte	0x4
-	.4byte	.LCFI308-.LCFI307
+	.4byte	.LCFI128-.LFB176
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI309-.LCFI308
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI310-.LCFI309
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.4byte	.LCFI129-.LCFI128
+	.byte	0xe
+	.uleb128 0x24
 	.align	2
 .LEFDE180:
 .LSFDE182:
 	.4byte	.LEFDE182-.LASFDE182
 .LASFDE182:
 	.4byte	.Lframe0
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.byte	0x4
-	.4byte	.LCFI311-.LFB238
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB248
+	.4byte	.LFE248-.LFB248
 	.byte	0x4
-	.4byte	.LCFI312-.LCFI311
+	.4byte	.LCFI130-.LFB248
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI313-.LCFI312
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI131-.LCFI130
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI314-.LCFI313
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.4byte	.LCFI132-.LCFI131
+	.byte	0xe
+	.uleb128 0x24
 	.align	2
 .LEFDE182:
 .LSFDE184:
 	.4byte	.LEFDE184-.LASFDE184
 .LASFDE184:
 	.4byte	.Lframe0
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.byte	0x4
-	.4byte	.LCFI315-.LFB257
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
 	.byte	0x4
-	.4byte	.LCFI316-.LCFI315
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
+	.4byte	.LCFI133-.LFB267
+	.byte	0xe
+	.uleb128 0x28
+	.byte	0x83
 	.uleb128 0xa
-	.byte	0x86
+	.byte	0x84
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI317-.LCFI316
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI318-.LCFI317
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI319-.LCFI318
-	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE184:
 .LSFDE186:
 	.4byte	.LEFDE186-.LASFDE186
 .LASFDE186:
 	.4byte	.Lframe0
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.byte	0x4
-	.4byte	.LCFI320-.LFB241
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
 	.byte	0x4
-	.4byte	.LCFI321-.LCFI320
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI134-.LFB251
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI322-.LCFI321
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x85
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE186:
 .LSFDE188:
 	.4byte	.LEFDE188-.LASFDE188
 .LASFDE188:
 	.4byte	.Lframe0
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.byte	0x4
-	.4byte	.LCFI323-.LFB242
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
 	.byte	0x4
-	.4byte	.LCFI324-.LCFI323
+	.4byte	.LCFI135-.LFB252
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI325-.LCFI324
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE188:
 .LSFDE190:
 	.4byte	.LEFDE190-.LASFDE190
 .LASFDE190:
 	.4byte	.Lframe0
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.byte	0x4
-	.4byte	.LCFI326-.LFB208
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.byte	0x4
-	.4byte	.LCFI327-.LCFI326
+	.4byte	.LCFI136-.LFB218
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI328-.LCFI327
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI137-.LCFI136
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI329-.LCFI328
+	.4byte	.LCFI138-.LCFI137
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x4
-	.4byte	.LCFI330-.LCFI329
+	.4byte	.LCFI139-.LCFI138
 	.byte	0xb
 	.align	2
 .LEFDE190:
@@ -25127,80 +22690,61 @@ check_vpc_table:
 	.4byte	.LEFDE192-.LASFDE192
 .LASFDE192:
 	.4byte	.Lframe0
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
-	.byte	0x4
-	.4byte	.LCFI331-.LFB201
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.byte	0x4
-	.4byte	.LCFI332-.LCFI331
+	.4byte	.LCFI140-.LFB211
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI333-.LCFI332
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE192:
 .LSFDE194:
 	.4byte	.LEFDE194-.LASFDE194
 .LASFDE194:
 	.4byte	.Lframe0
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.byte	0x4
-	.4byte	.LCFI334-.LFB221
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
 	.byte	0x4
-	.4byte	.LCFI335-.LCFI334
+	.4byte	.LCFI141-.LFB231
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI336-.LCFI335
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI142-.LCFI141
+	.byte	0xe
+	.uleb128 0x58
 	.byte	0x4
-	.4byte	.LCFI337-.LCFI336
+	.4byte	.LCFI143-.LCFI142
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI338-.LCFI337
+	.4byte	.LCFI144-.LCFI143
 	.byte	0xb
 	.align	2
 .LEFDE194:
@@ -25208,41 +22752,35 @@ check_vpc_table:
 	.4byte	.LEFDE196-.LASFDE196
 .LASFDE196:
 	.4byte	.Lframe0
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.byte	0x4
-	.4byte	.LCFI339-.LFB228
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
 	.byte	0x4
-	.4byte	.LCFI340-.LCFI339
+	.4byte	.LCFI145-.LFB238
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI341-.LCFI340
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI146-.LCFI145
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x4
-	.4byte	.LCFI342-.LCFI341
+	.4byte	.LCFI147-.LCFI146
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x20
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI343-.LCFI342
+	.4byte	.LCFI148-.LCFI147
 	.byte	0xb
 	.align	2
 .LEFDE196:
@@ -25250,124 +22788,97 @@ check_vpc_table:
 	.4byte	.LEFDE198-.LASFDE198
 .LASFDE198:
 	.4byte	.Lframe0
-	.4byte	.LFB169
-	.4byte	.LFE169-.LFB169
-	.byte	0x4
-	.4byte	.LCFI344-.LFB169
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB179
+	.4byte	.LFE179-.LFB179
 	.byte	0x4
-	.4byte	.LCFI345-.LCFI344
+	.4byte	.LCFI149-.LFB179
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
 	.uleb128 0x6
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI346-.LCFI345
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE198:
 .LSFDE200:
 	.4byte	.LEFDE200-.LASFDE200
 .LASFDE200:
 	.4byte	.Lframe0
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
-	.byte	0x4
-	.4byte	.LCFI347-.LFB171
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB181
+	.4byte	.LFE181-.LFB181
 	.byte	0x4
-	.4byte	.LCFI348-.LCFI347
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
+	.4byte	.LCFI150-.LFB181
+	.byte	0xe
+	.uleb128 0x28
+	.byte	0x83
 	.uleb128 0xa
-	.byte	0x86
+	.byte	0x84
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI349-.LCFI348
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI350-.LCFI349
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE200:
 .LSFDE202:
 	.4byte	.LEFDE202-.LASFDE202
 .LASFDE202:
 	.4byte	.Lframe0
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.byte	0x4
-	.4byte	.LCFI351-.LFB203
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.byte	0x4
-	.4byte	.LCFI352-.LCFI351
+	.4byte	.LCFI151-.LFB213
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI353-.LCFI352
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI152-.LCFI151
+	.byte	0xe
+	.uleb128 0x90
 	.byte	0x4
-	.4byte	.LCFI354-.LCFI353
+	.4byte	.LCFI153-.LCFI152
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI355-.LCFI354
+	.4byte	.LCFI154-.LCFI153
 	.byte	0xb
 	.align	2
 .LEFDE202:
@@ -25375,97 +22886,65 @@ check_vpc_table:
 	.4byte	.LEFDE204-.LASFDE204
 .LASFDE204:
 	.4byte	.Lframe0
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.byte	0x4
-	.4byte	.LCFI356-.LFB226
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI357-.LCFI356
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI358-.LCFI357
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
 	.align	2
 .LEFDE204:
 .LSFDE206:
 	.4byte	.LEFDE206-.LASFDE206
 .LASFDE206:
 	.4byte	.Lframe0
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.byte	0x4
-	.4byte	.LCFI359-.LFB205
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
 	.byte	0x4
-	.4byte	.LCFI360-.LCFI359
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI155-.LFB215
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI361-.LCFI360
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE206:
 .LSFDE208:
 	.4byte	.LEFDE208-.LASFDE208
 .LASFDE208:
 	.4byte	.Lframe0
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.byte	0x4
-	.4byte	.LCFI362-.LFB204
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
 	.byte	0x4
-	.4byte	.LCFI363-.LCFI362
+	.4byte	.LCFI156-.LFB214
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI364-.LCFI363
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI157-.LCFI156
+	.byte	0xe
+	.uleb128 0x88
 	.byte	0x4
-	.4byte	.LCFI365-.LCFI364
+	.4byte	.LCFI158-.LCFI157
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI366-.LCFI365
+	.4byte	.LCFI159-.LCFI158
 	.byte	0xb
 	.align	2
 .LEFDE208:
@@ -25473,144 +22952,97 @@ check_vpc_table:
 	.4byte	.LEFDE210-.LASFDE210
 .LASFDE210:
 	.4byte	.Lframe0
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.byte	0x4
-	.4byte	.LCFI367-.LFB211
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
 	.byte	0x4
-	.4byte	.LCFI368-.LCFI367
+	.4byte	.LCFI160-.LFB221
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI369-.LCFI368
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE210:
 .LSFDE212:
 	.4byte	.LEFDE212-.LASFDE212
 .LASFDE212:
 	.4byte	.Lframe0
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.byte	0x4
-	.4byte	.LCFI370-.LFB227
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
 	.byte	0x4
-	.4byte	.LCFI371-.LCFI370
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI161-.LFB237
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI372-.LCFI371
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE212:
 .LSFDE214:
 	.4byte	.LEFDE214-.LASFDE214
 .LASFDE214:
 	.4byte	.Lframe0
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.byte	0x4
-	.4byte	.LCFI373-.LFB209
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.byte	0x4
-	.4byte	.LCFI374-.LCFI373
-	.byte	0x83
-	.uleb128 0xc
+	.4byte	.LCFI162-.LFB219
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x88
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x89
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8a
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI375-.LCFI374
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE214:
 .LSFDE216:
 	.4byte	.LEFDE216-.LASFDE216
 .LASFDE216:
 	.4byte	.Lframe0
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.byte	0x4
-	.4byte	.LCFI376-.LFB229
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
 	.byte	0x4
-	.4byte	.LCFI377-.LCFI376
+	.4byte	.LCFI163-.LFB239
+	.byte	0xe
+	.uleb128 0x28
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
 	.uleb128 0x7
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI378-.LCFI377
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI379-.LCFI378
+	.4byte	.LCFI164-.LCFI163
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x28
+	.byte	0xe
+	.uleb128 0x1c
 	.byte	0x4
-	.4byte	.LCFI380-.LCFI379
+	.4byte	.LCFI165-.LCFI164
 	.byte	0xb
 	.align	2
 .LEFDE216:
@@ -25618,199 +23050,137 @@ check_vpc_table:
 	.4byte	.LEFDE218-.LASFDE218
 .LASFDE218:
 	.4byte	.Lframe0
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.byte	0x4
-	.4byte	.LCFI381-.LFB239
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
 	.byte	0x4
-	.4byte	.LCFI382-.LCFI381
+	.4byte	.LCFI166-.LFB249
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI383-.LCFI382
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE218:
 .LSFDE220:
 	.4byte	.LEFDE220-.LASFDE220
 .LASFDE220:
 	.4byte	.Lframe0
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
-	.byte	0x4
-	.4byte	.LCFI384-.LFB155
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB165
+	.4byte	.LFE165-.LFB165
 	.byte	0x4
-	.4byte	.LCFI385-.LCFI384
+	.4byte	.LCFI167-.LFB165
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI386-.LCFI385
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI168-.LCFI167
+	.byte	0xe
+	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI387-.LCFI386
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.4byte	.LCFI169-.LCFI168
+	.byte	0xe
+	.uleb128 0x24
 	.align	2
 .LEFDE220:
 .LSFDE222:
 	.4byte	.LEFDE222-.LASFDE222
 .LASFDE222:
 	.4byte	.Lframe0
-	.4byte	.LFB156
-	.4byte	.LFE156-.LFB156
-	.byte	0x4
-	.4byte	.LCFI388-.LFB156
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB166
+	.4byte	.LFE166-.LFB166
 	.byte	0x4
-	.4byte	.LCFI389-.LCFI388
+	.4byte	.LCFI170-.LFB166
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI390-.LCFI389
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE222:
 .LSFDE224:
 	.4byte	.LEFDE224-.LASFDE224
 .LASFDE224:
 	.4byte	.Lframe0
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
-	.byte	0x4
-	.4byte	.LCFI391-.LFB152
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB162
+	.4byte	.LFE162-.LFB162
 	.byte	0x4
-	.4byte	.LCFI392-.LCFI391
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI171-.LFB162
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI393-.LCFI392
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE224:
 .LSFDE226:
 	.4byte	.LEFDE226-.LASFDE226
 .LASFDE226:
 	.4byte	.Lframe0
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
-	.byte	0x4
-	.4byte	.LCFI394-.LFB153
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB163
+	.4byte	.LFE163-.LFB163
 	.byte	0x4
-	.4byte	.LCFI395-.LCFI394
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
+	.4byte	.LCFI172-.LFB163
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI396-.LCFI395
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE226:
 .LSFDE228:
 	.4byte	.LEFDE228-.LASFDE228
 .LASFDE228:
 	.4byte	.Lframe0
-	.4byte	.LFB158
-	.4byte	.LFE158-.LFB158
-	.byte	0x4
-	.4byte	.LCFI397-.LFB158
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB168
+	.4byte	.LFE168-.LFB168
 	.byte	0x4
-	.4byte	.LCFI398-.LCFI397
+	.4byte	.LCFI173-.LFB168
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
 	.uleb128 0x6
-	.byte	0x88
+	.byte	0x85
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x86
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x87
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x88
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI399-.LCFI398
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI400-.LCFI399
+	.4byte	.LCFI174-.LCFI173
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
+	.byte	0xe
+	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI401-.LCFI400
+	.4byte	.LCFI175-.LCFI174
 	.byte	0xb
 	.align	2
 .LEFDE228:
@@ -25818,47 +23188,37 @@ check_vpc_table:
 	.4byte	.LEFDE230-.LASFDE230
 .LASFDE230:
 	.4byte	.Lframe0
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.byte	0x4
-	.4byte	.LCFI402-.LFB248
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
 	.byte	0x4
-	.4byte	.LCFI403-.LCFI402
+	.4byte	.LCFI176-.LFB258
+	.byte	0xe
+	.uleb128 0x30
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI404-.LCFI403
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI405-.LCFI404
+	.4byte	.LCFI177-.LCFI176
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI406-.LCFI405
+	.4byte	.LCFI178-.LCFI177
 	.byte	0xb
 	.align	2
 .LEFDE230:
@@ -25866,171 +23226,125 @@ check_vpc_table:
 	.4byte	.LEFDE232-.LASFDE232
 .LASFDE232:
 	.4byte	.Lframe0
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.byte	0x4
-	.4byte	.LCFI407-.LFB251
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
 	.byte	0x4
-	.4byte	.LCFI408-.LCFI407
+	.4byte	.LCFI179-.LFB261
+	.byte	0xe
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI409-.LCFI408
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE232:
 .LSFDE234:
 	.4byte	.LEFDE234-.LASFDE234
 .LASFDE234:
 	.4byte	.Lframe0
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.byte	0x4
-	.4byte	.LCFI410-.LFB223
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
 	.byte	0x4
-	.4byte	.LCFI411-.LCFI410
+	.4byte	.LCFI180-.LFB233
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI412-.LCFI411
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE234:
 .LSFDE236:
 	.4byte	.LEFDE236-.LASFDE236
 .LASFDE236:
 	.4byte	.Lframe0
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.byte	0x4
-	.4byte	.LCFI413-.LFB253
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
 	.byte	0x4
-	.4byte	.LCFI414-.LCFI413
+	.4byte	.LCFI181-.LFB263
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI415-.LCFI414
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE236:
 .LSFDE238:
 	.4byte	.LEFDE238-.LASFDE238
 .LASFDE238:
 	.4byte	.Lframe0
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.byte	0x4
-	.4byte	.LCFI416-.LFB252
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
 	.byte	0x4
-	.4byte	.LCFI417-.LCFI416
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI182-.LFB262
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI418-.LCFI417
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI183-.LCFI182
+	.byte	0xce
+	.byte	0xc5
+	.byte	0xc4
+	.byte	0xc3
+	.byte	0xe
+	.uleb128 0
 	.align	2
 .LEFDE238:
 .LSFDE240:
 	.4byte	.LEFDE240-.LASFDE240
 .LASFDE240:
 	.4byte	.Lframe0
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.byte	0x4
-	.4byte	.LCFI419-.LFB259
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
 	.byte	0x4
-	.4byte	.LCFI420-.LCFI419
+	.4byte	.LCFI184-.LFB269
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI421-.LCFI420
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI185-.LCFI184
+	.byte	0xe
+	.uleb128 0x48
 	.byte	0x4
-	.4byte	.LCFI422-.LCFI421
+	.4byte	.LCFI186-.LCFI185
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI423-.LCFI422
+	.4byte	.LCFI187-.LCFI186
 	.byte	0xb
 	.align	2
 .LEFDE240:
@@ -26038,72 +23352,49 @@ check_vpc_table:
 	.4byte	.LEFDE242-.LASFDE242
 .LASFDE242:
 	.4byte	.Lframe0
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.byte	0x4
-	.4byte	.LCFI424-.LFB260
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI425-.LCFI424
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI426-.LCFI425
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.align	2
 .LEFDE242:
 .LSFDE244:
 	.4byte	.LEFDE244-.LASFDE244
 .LASFDE244:
 	.4byte	.Lframe0
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
-	.byte	0x4
-	.4byte	.LCFI427-.LFB154
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB164
+	.4byte	.LFE164-.LFB164
 	.byte	0x4
-	.4byte	.LCFI428-.LCFI427
+	.4byte	.LCFI188-.LFB164
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI429-.LCFI428
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI189-.LCFI188
+	.byte	0xe
+	.uleb128 0x60
 	.byte	0x4
-	.4byte	.LCFI430-.LCFI429
+	.4byte	.LCFI190-.LCFI189
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI431-.LCFI430
+	.4byte	.LCFI191-.LCFI190
 	.byte	0xb
 	.align	2
 .LEFDE244:
@@ -26111,72 +23402,49 @@ check_vpc_table:
 	.4byte	.LEFDE246-.LASFDE246
 .LASFDE246:
 	.4byte	.Lframe0
-	.4byte	.LFB159
-	.4byte	.LFE159-.LFB159
-	.byte	0x4
-	.4byte	.LCFI432-.LFB159
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI433-.LCFI432
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI434-.LCFI433
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB169
+	.4byte	.LFE169-.LFB169
 	.align	2
 .LEFDE246:
 .LSFDE248:
 	.4byte	.LEFDE248-.LASFDE248
 .LASFDE248:
 	.4byte	.Lframe0
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
-	.byte	0x4
-	.4byte	.LCFI435-.LFB157
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB167
+	.4byte	.LFE167-.LFB167
 	.byte	0x4
-	.4byte	.LCFI436-.LCFI435
+	.4byte	.LCFI192-.LFB167
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
 	.uleb128 0x9
-	.byte	0x87
+	.byte	0x85
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x86
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x87
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x88
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x89
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x8a
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x8b
 	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI437-.LCFI436
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LCFI193-.LCFI192
+	.byte	0xe
+	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI438-.LCFI437
+	.4byte	.LCFI194-.LCFI193
 	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
+	.byte	0xe
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI439-.LCFI438
+	.4byte	.LCFI195-.LCFI194
 	.byte	0xb
 	.align	2
 .LEFDE248:
@@ -26184,194 +23452,108 @@ check_vpc_table:
 	.4byte	.LEFDE250-.LASFDE250
 .LASFDE250:
 	.4byte	.Lframe0
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
-	.byte	0x4
-	.4byte	.LCFI440-.LFB160
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI441-.LCFI440
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI442-.LCFI441
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB170
+	.4byte	.LFE170-.LFB170
 	.align	2
 .LEFDE250:
 .LSFDE252:
 	.4byte	.LEFDE252-.LASFDE252
 .LASFDE252:
 	.4byte	.Lframe0
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.byte	0x4
-	.4byte	.LCFI443-.LFB214
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
 	.byte	0x4
-	.4byte	.LCFI444-.LCFI443
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
+	.4byte	.LCFI196-.LFB224
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
 	.uleb128 0x6
-	.byte	0x89
+	.byte	0x84
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x85
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x86
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x87
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI445-.LCFI444
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE252:
 .LSFDE254:
 	.4byte	.LEFDE254-.LASFDE254
 .LASFDE254:
 	.4byte	.Lframe0
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.byte	0x4
-	.4byte	.LCFI446-.LFB232
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB242
+	.4byte	.LFE242-.LFB242
 	.byte	0x4
-	.4byte	.LCFI447-.LCFI446
+	.4byte	.LCFI197-.LFB242
+	.byte	0xe
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x86
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI448-.LCFI447
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE254:
 .LSFDE256:
 	.4byte	.LEFDE256-.LASFDE256
 .LASFDE256:
 	.4byte	.Lframe0
-	.4byte	.LFB150
-	.4byte	.LFE150-.LFB150
-	.byte	0x4
-	.4byte	.LCFI449-.LFB150
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB160
+	.4byte	.LFE160-.LFB160
 	.byte	0x4
-	.4byte	.LCFI450-.LCFI449
+	.4byte	.LCFI198-.LFB160
+	.byte	0xe
+	.uleb128 0x20
 	.byte	0x83
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x84
 	.uleb128 0x7
-	.byte	0x89
+	.byte	0x85
 	.uleb128 0x6
-	.byte	0x8a
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x8b
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x89
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI451-.LCFI450
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE256:
 .LSFDE258:
 	.4byte	.LEFDE258-.LASFDE258
 .LASFDE258:
 	.4byte	.Lframe0
-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
-	.byte	0x4
-	.4byte	.LCFI452-.LFB151
-	.byte	0xd
-	.uleb128 0xc
+	.4byte	.LFB161
+	.4byte	.LFE161-.LFB161
 	.byte	0x4
-	.4byte	.LCFI453-.LCFI452
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
+	.4byte	.LCFI199-.LFB161
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
 	.uleb128 0x4
-	.byte	0x8d
+	.byte	0x84
 	.uleb128 0x3
-	.byte	0x8e
+	.byte	0x85
 	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI454-.LCFI453
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.byte	0x8e
+	.uleb128 0x1
 	.align	2
 .LEFDE258:
 .LSFDE260:
 	.4byte	.LEFDE260-.LASFDE260
 .LASFDE260:
 	.4byte	.Lframe0
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.byte	0x4
-	.4byte	.LCFI455-.LFB269
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI456-.LCFI455
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI457-.LCFI456
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
+	.4byte	.LFB279
+	.4byte	.LFE279-.LFB279
 	.align	2
 .LEFDE260:
 	.text
@@ -26380,29 +23562,28 @@ check_vpc_table:
 	.file 7 "./include/uapi/asm-generic/posix_types.h"
 	.file 8 "include/linux/types.h"
 	.file 9 "./arch/arm/include/asm/hwcap.h"
-	.file 10 "./arch/arm/include/asm/barrier.h"
-	.file 11 "include/linux/init.h"
-	.file 12 "include/linux/printk.h"
-	.file 13 "include/linux/kernel.h"
-	.file 14 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 15 "drivers/rkflash/rksftl/flash_com.h"
-	.file 16 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 17 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 18 "include/linux/string.h"
-	.file 19 "./arch/arm/include/asm/string.h"
-	.file 20 "drivers/rkflash/rksftl/typedef.h"
-	.file 21 "<built-in>"
+	.file 10 "include/linux/init.h"
+	.file 11 "include/linux/printk.h"
+	.file 12 "include/linux/kernel.h"
+	.file 13 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 14 "drivers/rkflash/rksftl/flash_com.h"
+	.file 15 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 16 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 17 "include/linux/string.h"
+	.file 18 "./arch/arm/include/asm/string.h"
+	.file 19 "drivers/rkflash/rksftl/typedef.h"
+	.file 20 "<built-in>"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x676b
+	.4byte	0x6836
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF665
+	.4byte	.LASF663
 	.byte	0x1
-	.4byte	.LASF666
-	.4byte	.LASF667
+	.4byte	.LASF664
+	.4byte	.LASF665
 	.4byte	.Ltext0
 	.4byte	.Letext0-.Ltext0
 	.4byte	.Ldebug_line0
@@ -26510,298 +23691,293 @@ check_vpc_table:
 	.byte	0x9
 	.byte	0xd
 	.4byte	0x41
-	.uleb128 0xa
-	.uleb128 0x9
+	.uleb128 0x7
 	.4byte	.LASF17
 	.byte	0xa
-	.byte	0x28
-	.4byte	0xfb
+	.byte	0x83
+	.4byte	0xfa
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xef
-	.uleb128 0x7
-	.4byte	.LASF18
-	.byte	0xb
-	.byte	0x83
-	.4byte	0x10c
+	.4byte	0x100
+	.uleb128 0xa
+	.4byte	0x64
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x112
+	.4byte	0x10b
 	.uleb128 0xb
-	.4byte	0x64
 	.uleb128 0xc
-	.4byte	0x101
-	.4byte	0x122
+	.4byte	0xef
+	.4byte	0x117
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x9
-	.4byte	.LASF19
-	.byte	0xb
+	.4byte	.LASF18
+	.byte	0xa
 	.byte	0x86
-	.4byte	0x117
+	.4byte	0x10c
 	.uleb128 0x9
-	.4byte	.LASF20
-	.byte	0xb
+	.4byte	.LASF19
+	.byte	0xa
 	.byte	0x86
-	.4byte	0x117
+	.4byte	0x10c
 	.uleb128 0x9
-	.4byte	.LASF21
-	.byte	0xb
+	.4byte	.LASF20
+	.byte	0xa
 	.byte	0x87
-	.4byte	0x117
+	.4byte	0x10c
 	.uleb128 0x9
-	.4byte	.LASF22
-	.byte	0xb
+	.4byte	.LASF21
+	.byte	0xa
 	.byte	0x87
-	.4byte	0x117
+	.4byte	0x10c
 	.uleb128 0xc
 	.4byte	0x35
-	.4byte	0x159
+	.4byte	0x14e
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x9
-	.4byte	.LASF23
-	.byte	0xb
+	.4byte	.LASF22
+	.byte	0xa
 	.byte	0x8e
-	.4byte	0x14e
+	.4byte	0x143
 	.uleb128 0x9
-	.4byte	.LASF24
-	.byte	0xb
+	.4byte	.LASF23
+	.byte	0xa
 	.byte	0x8f
 	.4byte	0xb6
 	.uleb128 0x9
-	.4byte	.LASF25
-	.byte	0xb
+	.4byte	.LASF24
+	.byte	0xa
 	.byte	0x90
 	.4byte	0x41
 	.uleb128 0x9
-	.4byte	.LASF26
-	.byte	0xb
+	.4byte	.LASF25
+	.byte	0xa
 	.byte	0x9c
-	.4byte	0xfb
+	.4byte	0x105
 	.uleb128 0x9
-	.4byte	.LASF27
-	.byte	0xb
+	.4byte	.LASF26
+	.byte	0xa
 	.byte	0x9e
 	.4byte	0xbc
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x19b
+	.4byte	0x190
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x190
+	.4byte	0x185
 	.uleb128 0x9
-	.4byte	.LASF28
-	.byte	0xc
+	.4byte	.LASF27
+	.byte	0xb
 	.byte	0xa
-	.4byte	0x19b
+	.4byte	0x190
 	.uleb128 0x9
-	.4byte	.LASF29
-	.byte	0xc
+	.4byte	.LASF28
+	.byte	0xb
 	.byte	0xb
-	.4byte	0x19b
+	.4byte	0x190
 	.uleb128 0xc
 	.4byte	0x64
-	.4byte	0x1c1
+	.4byte	0x1b6
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x9
-	.4byte	.LASF30
-	.byte	0xc
+	.4byte	.LASF29
+	.byte	0xb
 	.byte	0x2e
-	.4byte	0x1b6
+	.4byte	0x1ab
 	.uleb128 0x9
-	.4byte	.LASF31
-	.byte	0xc
+	.4byte	.LASF30
+	.byte	0xb
 	.byte	0x9f
 	.4byte	0x64
 	.uleb128 0x9
-	.4byte	.LASF32
-	.byte	0xc
+	.4byte	.LASF31
+	.byte	0xb
 	.byte	0xa0
 	.4byte	0x64
 	.uleb128 0x9
-	.4byte	.LASF33
-	.byte	0xc
+	.4byte	.LASF32
+	.byte	0xb
 	.byte	0xa1
 	.4byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF35
+	.4byte	.LASF34
 	.uleb128 0x4
-	.4byte	0x1ed
+	.4byte	0x1e2
 	.uleb128 0xf
-	.4byte	.LASF34
-	.byte	0xc
+	.4byte	.LASF33
+	.byte	0xb
 	.2byte	0x1a4
-	.4byte	0x1f2
+	.4byte	0x1e7
 	.uleb128 0xe
-	.4byte	.LASF36
+	.4byte	.LASF35
 	.uleb128 0xf
-	.4byte	.LASF37
-	.byte	0xd
+	.4byte	.LASF36
+	.byte	0xc
 	.2byte	0x104
-	.4byte	0x203
+	.4byte	0x1f8
 	.uleb128 0x10
 	.4byte	0xa4
-	.4byte	0x223
+	.4byte	0x218
 	.uleb128 0x11
 	.4byte	0x64
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF38
-	.byte	0xd
+	.4byte	.LASF37
+	.byte	0xc
 	.2byte	0x105
-	.4byte	0x22f
+	.4byte	0x224
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x214
+	.4byte	0x209
 	.uleb128 0xf
-	.4byte	.LASF39
-	.byte	0xd
+	.4byte	.LASF38
+	.byte	0xc
 	.2byte	0x1bf
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF40
-	.byte	0xd
+	.4byte	.LASF39
+	.byte	0xc
 	.2byte	0x1c0
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF41
-	.byte	0xd
+	.4byte	.LASF40
+	.byte	0xc
 	.2byte	0x1c1
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF42
-	.byte	0xd
+	.4byte	.LASF41
+	.byte	0xc
 	.2byte	0x1c2
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF43
-	.byte	0xd
+	.4byte	.LASF42
+	.byte	0xc
 	.2byte	0x1c3
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF44
-	.byte	0xd
+	.4byte	.LASF43
+	.byte	0xc
 	.2byte	0x1c4
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF45
-	.byte	0xd
+	.4byte	.LASF44
+	.byte	0xc
 	.2byte	0x1c5
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF46
-	.byte	0xd
+	.4byte	.LASF45
+	.byte	0xc
 	.2byte	0x1c7
 	.4byte	0xbc
 	.uleb128 0xf
-	.4byte	.LASF47
-	.byte	0xd
+	.4byte	.LASF46
+	.byte	0xc
 	.2byte	0x1da
 	.4byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF48
-	.byte	0xd
+	.4byte	.LASF47
+	.byte	0xc
 	.2byte	0x1dc
 	.4byte	0xbc
 	.uleb128 0x12
-	.4byte	.LASF668
+	.4byte	.LASF666
 	.byte	0x4
 	.4byte	0x41
-	.byte	0xd
+	.byte	0xc
 	.2byte	0x1df
-	.4byte	0x2dd
+	.4byte	0x2d2
 	.uleb128 0x13
-	.4byte	.LASF49
+	.4byte	.LASF48
 	.byte	0
 	.uleb128 0x13
-	.4byte	.LASF50
+	.4byte	.LASF49
 	.byte	0x1
 	.uleb128 0x13
-	.4byte	.LASF51
+	.4byte	.LASF50
 	.byte	0x2
 	.uleb128 0x13
-	.4byte	.LASF52
+	.4byte	.LASF51
 	.byte	0x3
 	.uleb128 0x13
-	.4byte	.LASF53
+	.4byte	.LASF52
 	.byte	0x4
 	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF54
-	.byte	0xd
+	.uleb128 0xf
+	.4byte	.LASF53
+	.byte	0xc
 	.2byte	0x1e5
-	.4byte	0x2ad
+	.4byte	0x2a2
 	.uleb128 0xf
-	.4byte	.LASF55
-	.byte	0xd
+	.4byte	.LASF54
+	.byte	0xc
 	.2byte	0x1f8
-	.4byte	0x19b
+	.4byte	0x190
 	.uleb128 0xf
-	.4byte	.LASF56
-	.byte	0xd
+	.4byte	.LASF55
+	.byte	0xc
 	.2byte	0x203
-	.4byte	0x19b
+	.4byte	0x190
 	.uleb128 0x7
-	.4byte	.LASF57
-	.byte	0xe
+	.4byte	.LASF56
+	.byte	0xd
 	.byte	0x9
 	.4byte	0x4f
 	.uleb128 0x7
-	.4byte	.LASF58
-	.byte	0xe
+	.4byte	.LASF57
+	.byte	0xd
 	.byte	0xa
 	.4byte	0x5d
 	.uleb128 0x7
-	.4byte	.LASF59
-	.byte	0xe
+	.4byte	.LASF58
+	.byte	0xd
 	.byte	0xb
 	.4byte	0x41
 	.uleb128 0x7
-	.4byte	.LASF60
-	.byte	0xe
+	.4byte	.LASF59
+	.byte	0xd
 	.byte	0xc
 	.4byte	0x64
 	.uleb128 0x7
-	.4byte	.LASF61
-	.byte	0xe
+	.4byte	.LASF60
+	.byte	0xd
 	.byte	0xd
 	.4byte	0x56
 	.uleb128 0x14
-	.4byte	.LASF66
+	.4byte	.LASF65
 	.byte	0x14
-	.byte	0xf
+	.byte	0xe
 	.byte	0x22
-	.4byte	0x381
+	.4byte	0x376
 	.uleb128 0x15
-	.4byte	.LASF62
-	.byte	0xf
+	.4byte	.LASF61
+	.byte	0xe
 	.byte	0x23
 	.4byte	0x99
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF63
-	.byte	0xf
+	.4byte	.LASF62
+	.byte	0xe
 	.byte	0x24
 	.4byte	0x99
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF64
-	.byte	0xf
+	.4byte	.LASF63
+	.byte	0xe
 	.byte	0x25
-	.4byte	0x381
+	.4byte	0x376
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF65
-	.byte	0xf
+	.4byte	.LASF64
+	.byte	0xe
 	.byte	0x26
-	.4byte	0x381
+	.4byte	0x376
 	.byte	0xc
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0xf
+	.byte	0xe
 	.byte	0x27
 	.4byte	0x99
 	.byte	0x10
@@ -26810,122 +23986,122 @@ check_vpc_table:
 	.byte	0x4
 	.4byte	0x99
 	.uleb128 0x14
-	.4byte	.LASF67
+	.4byte	.LASF66
 	.byte	0x18
-	.byte	0xf
+	.byte	0xe
 	.byte	0x2a
-	.4byte	0x424
+	.4byte	0x419
 	.uleb128 0x15
-	.4byte	.LASF68
-	.byte	0xf
+	.4byte	.LASF67
+	.byte	0xe
 	.byte	0x2b
 	.4byte	0x83
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF69
-	.byte	0xf
+	.4byte	.LASF68
+	.byte	0xe
 	.byte	0x2c
 	.4byte	0x83
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF70
-	.byte	0xf
+	.4byte	.LASF69
+	.byte	0xe
 	.byte	0x2d
 	.4byte	0x83
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF71
-	.byte	0xf
+	.4byte	.LASF70
+	.byte	0xe
 	.byte	0x2e
 	.4byte	0x83
 	.byte	0x6
 	.uleb128 0x15
-	.4byte	.LASF72
-	.byte	0xf
+	.4byte	.LASF71
+	.byte	0xe
 	.byte	0x2f
 	.4byte	0x83
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF73
-	.byte	0xf
+	.4byte	.LASF72
+	.byte	0xe
 	.byte	0x30
 	.4byte	0x83
 	.byte	0xa
 	.uleb128 0x15
-	.4byte	.LASF74
-	.byte	0xf
+	.4byte	.LASF73
+	.byte	0xe
 	.byte	0x31
 	.4byte	0x83
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF75
-	.byte	0xf
+	.4byte	.LASF74
+	.byte	0xe
 	.byte	0x32
 	.4byte	0x83
 	.byte	0xe
 	.uleb128 0x15
-	.4byte	.LASF76
-	.byte	0xf
+	.4byte	.LASF75
+	.byte	0xe
 	.byte	0x33
 	.4byte	0x83
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF77
-	.byte	0xf
+	.4byte	.LASF76
+	.byte	0xe
 	.byte	0x34
 	.4byte	0x83
 	.byte	0x12
 	.uleb128 0x15
-	.4byte	.LASF78
-	.byte	0xf
+	.4byte	.LASF77
+	.byte	0xe
 	.byte	0x35
 	.4byte	0x83
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF79
-	.byte	0xf
+	.4byte	.LASF78
+	.byte	0xe
 	.byte	0x36
 	.4byte	0x79
 	.byte	0x16
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x387
+	.4byte	0x37c
 	.uleb128 0x14
-	.4byte	.LASF80
+	.4byte	.LASF79
 	.byte	0x10
-	.byte	0xf
+	.byte	0xe
 	.byte	0x39
-	.4byte	0x466
+	.4byte	0x45b
 	.uleb128 0x15
-	.4byte	.LASF81
-	.byte	0xf
+	.4byte	.LASF80
+	.byte	0xe
 	.byte	0x3a
-	.4byte	0x480
+	.4byte	0x475
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF82
-	.byte	0xf
+	.4byte	.LASF81
+	.byte	0xe
 	.byte	0x3b
-	.4byte	0x49a
+	.4byte	0x48f
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF83
-	.byte	0xf
+	.4byte	.LASF82
+	.byte	0xe
 	.byte	0x3c
-	.4byte	0x4be
+	.4byte	0x4b3
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF84
-	.byte	0xf
+	.4byte	.LASF83
+	.byte	0xe
 	.byte	0x3d
-	.4byte	0x4be
+	.4byte	0x4b3
 	.byte	0xc
 	.byte	0
 	.uleb128 0x10
 	.4byte	0x8e
-	.4byte	0x47a
+	.4byte	0x46f
 	.uleb128 0x11
-	.4byte	0x47a
+	.4byte	0x46f
 	.uleb128 0x11
 	.4byte	0x99
 	.byte	0
@@ -26934,10 +24110,10 @@ check_vpc_table:
 	.4byte	0x83
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x466
+	.4byte	0x45b
 	.uleb128 0x10
 	.4byte	0x99
-	.4byte	0x49a
+	.4byte	0x48f
 	.uleb128 0x11
 	.4byte	0x79
 	.uleb128 0x11
@@ -26945,2265 +24121,2265 @@ check_vpc_table:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x486
+	.4byte	0x47b
 	.uleb128 0x10
 	.4byte	0x99
-	.4byte	0x4be
+	.4byte	0x4b3
 	.uleb128 0x11
 	.4byte	0x79
 	.uleb128 0x11
 	.4byte	0x99
 	.uleb128 0x11
-	.4byte	0x381
+	.4byte	0x376
 	.uleb128 0x11
-	.4byte	0x381
+	.4byte	0x376
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x4a0
+	.4byte	0x495
 	.uleb128 0x14
-	.4byte	.LASF85
+	.4byte	.LASF84
 	.byte	0x3c
-	.byte	0x10
+	.byte	0xf
 	.byte	0x2b
-	.4byte	0x524
+	.4byte	0x519
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x2d
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF86
-	.byte	0x10
+	.4byte	.LASF85
+	.byte	0xf
 	.byte	0x2e
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF87
-	.byte	0x10
+	.4byte	.LASF86
+	.byte	0xf
 	.byte	0x2f
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"cnt\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x30
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x6
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x31
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF89
-	.byte	0x10
+	.4byte	.LASF88
+	.byte	0xf
 	.byte	0x32
-	.4byte	0x524
+	.4byte	0x519
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF90
-	.byte	0x10
+	.4byte	.LASF89
+	.byte	0xf
 	.byte	0x33
-	.4byte	0x534
+	.4byte	0x529
 	.byte	0x1c
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x534
+	.4byte	0x301
+	.4byte	0x529
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x7
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x544
-	.4byte	0x544
+	.4byte	0x539
+	.4byte	0x539
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x7
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x14
-	.4byte	.LASF91
+	.4byte	.LASF90
 	.byte	0xc
-	.byte	0x10
+	.byte	0xf
 	.byte	0x3f
-	.4byte	0x592
+	.4byte	0x587
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x41
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF86
-	.byte	0x10
+	.4byte	.LASF85
+	.byte	0xf
 	.byte	0x42
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF87
-	.byte	0x10
+	.4byte	.LASF86
+	.byte	0xf
 	.byte	0x43
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF92
-	.byte	0x10
+	.4byte	.LASF91
+	.byte	0xf
 	.byte	0x44
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x6
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x45
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x8
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF93
+	.4byte	.LASF92
 	.byte	0x28
-	.byte	0x10
+	.byte	0xf
 	.byte	0x48
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x15
-	.4byte	.LASF94
-	.byte	0x10
+	.4byte	.LASF93
+	.byte	0xf
 	.byte	0x4a
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF86
-	.byte	0x10
+	.4byte	.LASF85
+	.byte	0xf
 	.byte	0x4b
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x4d
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF96
-	.byte	0x10
+	.4byte	.LASF95
+	.byte	0xf
 	.byte	0x4e
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x6
 	.uleb128 0x15
-	.4byte	.LASF97
-	.byte	0x10
+	.4byte	.LASF96
+	.byte	0xf
 	.byte	0x50
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF98
-	.byte	0x10
+	.4byte	.LASF97
+	.byte	0xf
 	.byte	0x51
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0xa
 	.uleb128 0x15
-	.4byte	.LASF99
-	.byte	0x10
+	.4byte	.LASF98
+	.byte	0xf
 	.byte	0x53
-	.4byte	0x63b
+	.4byte	0x630
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF100
-	.byte	0x10
+	.4byte	.LASF99
+	.byte	0xf
 	.byte	0x54
-	.4byte	0x544
+	.4byte	0x539
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF101
-	.byte	0x10
+	.4byte	.LASF100
+	.byte	0xf
 	.byte	0x55
-	.4byte	0x63b
+	.4byte	0x630
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF102
-	.byte	0x10
+	.4byte	.LASF101
+	.byte	0xf
 	.byte	0x56
-	.4byte	0x544
+	.4byte	0x539
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x58
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF103
-	.byte	0x10
+	.4byte	.LASF102
+	.byte	0xf
 	.byte	0x59
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF104
-	.byte	0x10
+	.4byte	.LASF103
+	.byte	0xf
 	.byte	0x5a
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x24
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x14
-	.4byte	.LASF105
+	.4byte	.LASF104
 	.byte	0xc
-	.byte	0x10
+	.byte	0xf
 	.byte	0x5d
-	.4byte	0x67e
+	.4byte	0x673
 	.uleb128 0x15
-	.4byte	.LASF106
-	.byte	0x10
+	.4byte	.LASF105
+	.byte	0xf
 	.byte	0x5f
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF107
-	.byte	0x10
+	.4byte	.LASF106
+	.byte	0xf
 	.byte	0x60
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x16
 	.ascii	"hit\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x61
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF108
-	.byte	0x10
+	.4byte	.LASF107
+	.byte	0xf
 	.byte	0x62
-	.4byte	0x544
+	.4byte	0x539
 	.byte	0x8
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF109
+	.4byte	.LASF108
 	.byte	0x24
-	.byte	0x10
+	.byte	0xf
 	.byte	0x65
-	.4byte	0x6eb
+	.4byte	0x6e0
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x67
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF110
-	.byte	0x10
+	.4byte	.LASF109
+	.byte	0xf
 	.byte	0x68
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x69
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x8
 	.uleb128 0x16
 	.ascii	"len\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x6a
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF111
-	.byte	0x10
+	.4byte	.LASF110
+	.byte	0xf
 	.byte	0x6b
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF112
-	.byte	0x10
+	.4byte	.LASF111
+	.byte	0xf
 	.byte	0x6c
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF113
-	.byte	0x10
+	.4byte	.LASF112
+	.byte	0xf
 	.byte	0x6d
-	.4byte	0x6eb
+	.4byte	0x6e0
 	.byte	0x18
 	.uleb128 0x16
 	.ascii	"tbl\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x6e
-	.4byte	0x6fb
+	.4byte	0x6f0
 	.byte	0x20
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x317
-	.4byte	0x6fb
+	.4byte	0x30c
+	.4byte	0x6f0
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x70b
+	.4byte	0x301
+	.4byte	0x700
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF114
-	.byte	0x10
+	.4byte	.LASF113
 	.byte	0x10
+	.byte	0xf
 	.byte	0x72
-	.4byte	0x76b
+	.4byte	0x760
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x74
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x75
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x76
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF87
-	.byte	0x10
+	.4byte	.LASF86
+	.byte	0xf
 	.byte	0x77
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF115
-	.byte	0x10
+	.4byte	.LASF114
+	.byte	0xf
 	.byte	0x78
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0xa
 	.uleb128 0x15
-	.4byte	.LASF116
-	.byte	0x10
+	.4byte	.LASF115
+	.byte	0xf
 	.byte	0x79
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF113
-	.byte	0x10
+	.4byte	.LASF112
+	.byte	0xf
 	.byte	0x7a
-	.4byte	0x76b
+	.4byte	0x760
 	.byte	0xe
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x77b
+	.4byte	0x2f6
+	.4byte	0x770
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF117
-	.byte	0x10
+	.4byte	.LASF116
 	.byte	0x10
+	.byte	0xf
 	.byte	0x7d
-	.4byte	0x7c3
+	.4byte	0x7b8
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x7f
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x80
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x81
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x82
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF118
-	.byte	0x10
+	.4byte	.LASF117
+	.byte	0xf
 	.byte	0x83
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0xc
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF119
-	.byte	0x10
+	.4byte	.LASF118
 	.byte	0x10
+	.byte	0xf
 	.byte	0x8f
-	.4byte	0x80b
+	.4byte	0x800
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x91
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x92
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x93
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF120
-	.byte	0x10
+	.4byte	.LASF119
+	.byte	0xf
 	.byte	0x94
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF113
-	.byte	0x10
+	.4byte	.LASF112
+	.byte	0xf
 	.byte	0x95
-	.4byte	0x80b
+	.4byte	0x800
 	.byte	0xa
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x81b
+	.4byte	0x2f6
+	.4byte	0x810
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x5
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF121
-	.byte	0x10
+	.4byte	.LASF120
 	.byte	0x10
+	.byte	0xf
 	.byte	0x98
-	.4byte	0x863
+	.4byte	0x858
 	.uleb128 0x15
-	.4byte	.LASF95
-	.byte	0x10
+	.4byte	.LASF94
+	.byte	0xf
 	.byte	0x9a
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0x9b
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF88
-	.byte	0x10
+	.4byte	.LASF87
+	.byte	0xf
 	.byte	0x9c
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
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-	.4byte	.LASF122
-	.byte	0x10
+	.4byte	.LASF121
+	.byte	0xf
 	.byte	0x9d
-	.4byte	0x317
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 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF123
-	.byte	0x10
+	.4byte	.LASF122
+	.byte	0xf
 	.byte	0x9e
-	.4byte	0x317
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 	.byte	0xc
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF124
+	.4byte	.LASF123
 	.byte	0x30
-	.byte	0x10
+	.byte	0xf
 	.byte	0xa1
-	.4byte	0x960
+	.4byte	0x955
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0xa3
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0xa4
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF92
-	.byte	0x10
+	.4byte	.LASF91
+	.byte	0xf
 	.byte	0xa6
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF125
-	.byte	0x10
+	.4byte	.LASF124
+	.byte	0xf
 	.byte	0xa7
-	.4byte	0x301
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 	.byte	0xa
 	.uleb128 0x15
-	.4byte	.LASF126
-	.byte	0x10
+	.4byte	.LASF125
+	.byte	0xf
 	.byte	0xa8
-	.4byte	0x301
+	.4byte	0x2f6
 	.byte	0xb
 	.uleb128 0x15
-	.4byte	.LASF127
-	.byte	0x10
+	.4byte	.LASF126
+	.byte	0xf
 	.byte	0xa9
-	.4byte	0x301
+	.4byte	0x2f6
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF128
-	.byte	0x10
+	.4byte	.LASF127
+	.byte	0xf
 	.byte	0xaa
-	.4byte	0x301
+	.4byte	0x2f6
 	.byte	0xd
 	.uleb128 0x15
-	.4byte	.LASF129
-	.byte	0x10
+	.4byte	.LASF128
+	.byte	0xf
 	.byte	0xab
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0xe
 	.uleb128 0x15
-	.4byte	.LASF130
-	.byte	0x10
+	.4byte	.LASF129
+	.byte	0xf
 	.byte	0xad
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF131
-	.byte	0x10
+	.4byte	.LASF130
+	.byte	0xf
 	.byte	0xae
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x12
 	.uleb128 0x15
-	.4byte	.LASF132
-	.byte	0x10
+	.4byte	.LASF131
+	.byte	0xf
 	.byte	0xaf
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF133
-	.byte	0x10
+	.4byte	.LASF132
+	.byte	0xf
 	.byte	0xb0
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x16
 	.uleb128 0x15
-	.4byte	.LASF134
-	.byte	0x10
+	.4byte	.LASF133
+	.byte	0xf
 	.byte	0xb2
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF135
-	.byte	0x10
+	.4byte	.LASF134
+	.byte	0xf
 	.byte	0xb3
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x1a
 	.uleb128 0x15
-	.4byte	.LASF136
-	.byte	0x10
+	.4byte	.LASF135
+	.byte	0xf
 	.byte	0xb4
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF137
-	.byte	0x10
+	.4byte	.LASF136
+	.byte	0xf
 	.byte	0xb5
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x1e
 	.uleb128 0x15
-	.4byte	.LASF138
-	.byte	0x10
+	.4byte	.LASF137
+	.byte	0xf
 	.byte	0xb7
-	.4byte	0x317
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 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF139
-	.byte	0x10
+	.4byte	.LASF138
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 	.byte	0xb8
-	.4byte	0x317
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 	.byte	0x24
 	.uleb128 0x15
-	.4byte	.LASF140
-	.byte	0x10
+	.4byte	.LASF139
+	.byte	0xf
 	.byte	0xb9
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x28
 	.uleb128 0x15
-	.4byte	.LASF113
-	.byte	0x10
+	.4byte	.LASF112
+	.byte	0xf
 	.byte	0xba
-	.4byte	0x6fb
+	.4byte	0x6f0
 	.byte	0x2c
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF141
+	.4byte	.LASF140
 	.2byte	0x200
-	.byte	0x10
+	.byte	0xf
 	.byte	0xbe
-	.4byte	0xaa6
+	.4byte	0xa9b
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0xc0
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0xc1
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF142
-	.byte	0x10
+	.4byte	.LASF141
+	.byte	0xf
 	.byte	0xc3
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF143
-	.byte	0x10
+	.4byte	.LASF142
+	.byte	0xf
 	.byte	0xc4
-	.4byte	0x317
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 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF144
-	.byte	0x10
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+	.byte	0xf
 	.byte	0xc5
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 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF145
-	.byte	0x10
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 	.byte	0xc6
-	.4byte	0x317
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 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF138
-	.byte	0x10
+	.4byte	.LASF137
+	.byte	0xf
 	.byte	0xc8
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 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF146
-	.byte	0x10
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 	.byte	0xc9
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 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF147
-	.byte	0x10
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 	.byte	0xca
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 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF148
-	.byte	0x10
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 	.byte	0xcb
-	.4byte	0x317
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 	.byte	0x24
 	.uleb128 0x15
-	.4byte	.LASF135
-	.byte	0x10
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 	.byte	0xcd
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 	.byte	0x28
 	.uleb128 0x15
-	.4byte	.LASF149
-	.byte	0x10
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 	.byte	0xce
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 	.byte	0x2c
 	.uleb128 0x15
-	.4byte	.LASF150
-	.byte	0x10
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 	.byte	0xcf
-	.4byte	0x317
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 	.byte	0x30
 	.uleb128 0x15
-	.4byte	.LASF151
-	.byte	0x10
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 	.byte	0xd0
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 	.byte	0x34
 	.uleb128 0x15
-	.4byte	.LASF152
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 	.byte	0xd2
-	.4byte	0x317
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 	.byte	0x38
 	.uleb128 0x15
-	.4byte	.LASF153
-	.byte	0x10
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 	.byte	0xd3
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 	.byte	0x3c
 	.uleb128 0x15
-	.4byte	.LASF154
-	.byte	0x10
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 	.byte	0xd4
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 	.byte	0x40
 	.uleb128 0x15
-	.4byte	.LASF155
-	.byte	0x10
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 	.byte	0xd5
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 	.byte	0x44
 	.uleb128 0x15
-	.4byte	.LASF156
-	.byte	0x10
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 	.byte	0xd7
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 	.byte	0x48
 	.uleb128 0x15
-	.4byte	.LASF157
-	.byte	0x10
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 	.byte	0xd8
-	.4byte	0x317
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 	.byte	0x4c
 	.uleb128 0x15
-	.4byte	.LASF158
-	.byte	0x10
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 	.byte	0xd9
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 	.byte	0x50
 	.uleb128 0x15
-	.4byte	.LASF159
-	.byte	0x10
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 	.byte	0xda
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 	.byte	0x54
 	.uleb128 0x15
-	.4byte	.LASF160
-	.byte	0x10
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 	.byte	0x58
 	.uleb128 0x15
-	.4byte	.LASF161
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 	.byte	0xdd
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 	.byte	0x5c
 	.uleb128 0x15
-	.4byte	.LASF162
-	.byte	0x10
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 	.byte	0x60
 	.uleb128 0x15
-	.4byte	.LASF113
-	.byte	0x10
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+	.byte	0xf
 	.byte	0xe0
-	.4byte	0xaa6
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 	.byte	0x64
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x317
-	.4byte	0xab6
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+	.4byte	0xaab
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x66
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF163
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 	.byte	0x6
-	.byte	0x10
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 	.byte	0xe4
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 	.uleb128 0x15
-	.4byte	.LASF164
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 	.byte	0xe6
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 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF165
-	.byte	0x10
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 	.byte	0xe7
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 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF166
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 	.byte	0xe8
-	.4byte	0x30c
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 	.byte	0x4
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF167
+	.4byte	.LASF166
 	.2byte	0x808
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+	.byte	0xf
 	.byte	0xeb
-	.4byte	0xb31
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 	.uleb128 0x16
 	.ascii	"max\000"
-	.byte	0x10
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 	.byte	0xed
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+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF168
-	.byte	0x10
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 	.byte	0x2
 	.uleb128 0x15
-	.4byte	.LASF169
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 	.byte	0xef
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 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF115
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 	.byte	0xf0
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x6
 	.uleb128 0x16
 	.ascii	"arr\000"
-	.byte	0x10
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 	.byte	0xf1
-	.4byte	0xb31
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 	.byte	0x8
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0xb42
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+	.4byte	0xb37
 	.uleb128 0x19
 	.4byte	0x2e
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF170
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 	.byte	0x30
-	.byte	0x10
+	.byte	0xf
 	.byte	0xf5
-	.4byte	0xbd4
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 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x10
+	.byte	0xf
 	.byte	0xf7
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF171
-	.byte	0x10
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 	.byte	0x2
 	.uleb128 0x15
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 	.byte	0x4
 	.uleb128 0x15
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 	.byte	0xfa
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 	.byte	0x6
 	.uleb128 0x15
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 	.byte	0x7
 	.uleb128 0x15
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 	.byte	0x8
 	.uleb128 0x15
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 	.uleb128 0x15
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 	.uleb128 0x1a
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 	.byte	0xc
 	.uleb128 0x1a
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 	.uleb128 0xc
-	.4byte	0x30c
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+	.4byte	0xbd9
 	.uleb128 0x17
 	.4byte	0x2e
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 	.uleb128 0x1b
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 	.uleb128 0x1a
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 	.uleb128 0x1a
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 	.byte	0x4
 	.uleb128 0x1c
 	.ascii	"lpa\000"
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 	.byte	0x8
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 	.uleb128 0x1b
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-	.4byte	0xc4e
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 	.uleb128 0x1a
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 	.uleb128 0x1a
-	.4byte	.LASF65
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 	.2byte	0x10f
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 	.byte	0x4
 	.uleb128 0x1a
-	.4byte	.LASF184
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 	.byte	0x8
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 	.uleb128 0x1d
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 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_type
 	.uleb128 0x1d
-	.4byte	.LASF186
-	.byte	0x11
+	.4byte	.LASF185
+	.byte	0x10
 	.byte	0x13
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
 	.uleb128 0x1d
-	.4byte	.LASF187
-	.byte	0x11
+	.4byte	.LASF186
+	.byte	0x10
 	.byte	0x14
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_per_die
 	.uleb128 0x1d
-	.4byte	.LASF188
-	.byte	0x11
+	.4byte	.LASF187
+	.byte	0x10
 	.byte	0x15
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
 	.uleb128 0x1d
-	.4byte	.LASF189
-	.byte	0x11
+	.4byte	.LASF188
+	.byte	0x10
 	.byte	0x16
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die_shift
 	.uleb128 0x1d
-	.4byte	.LASF190
-	.byte	0x11
+	.4byte	.LASF189
+	.byte	0x10
 	.byte	0x17
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
 	.uleb128 0x1d
-	.4byte	.LASF191
-	.byte	0x11
+	.4byte	.LASF190
+	.byte	0x10
 	.byte	0x18
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
 	.uleb128 0x1d
-	.4byte	.LASF192
-	.byte	0x11
+	.4byte	.LASF191
+	.byte	0x10
 	.byte	0x19
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_ext_blk_pre_plane
 	.uleb128 0x1d
-	.4byte	.LASF193
-	.byte	0x11
+	.4byte	.LASF192
+	.byte	0x10
 	.byte	0x1a
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_bbm_buf_size
 	.uleb128 0x1d
-	.4byte	.LASF194
-	.byte	0x11
+	.4byte	.LASF193
+	.byte	0x10
 	.byte	0x1c
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_blk
 	.uleb128 0x1d
-	.4byte	.LASF195
-	.byte	0x11
+	.4byte	.LASF194
+	.byte	0x10
 	.byte	0x1d
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_slc_blk
 	.uleb128 0x1d
-	.4byte	.LASF196
-	.byte	0x11
+	.4byte	.LASF195
+	.byte	0x10
 	.byte	0x1e
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_super_blk
 	.uleb128 0x1d
-	.4byte	.LASF197
-	.byte	0x11
+	.4byte	.LASF196
+	.byte	0x10
 	.byte	0x1f
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
 	.uleb128 0x1d
-	.4byte	.LASF198
-	.byte	0x11
+	.4byte	.LASF197
+	.byte	0x10
 	.byte	0x20
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page_shift
 	.uleb128 0x1d
-	.4byte	.LASF199
-	.byte	0x11
+	.4byte	.LASF198
+	.byte	0x10
 	.byte	0x24
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_byte_pre_page
 	.uleb128 0x1d
-	.4byte	.LASF200
-	.byte	0x11
+	.4byte	.LASF199
+	.byte	0x10
 	.byte	0x25
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_byte_pre_oob
 	.uleb128 0x1d
-	.4byte	.LASF201
-	.byte	0x11
+	.4byte	.LASF200
+	.byte	0x10
 	.byte	0x26
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_reserved_blks
 	.uleb128 0x1d
-	.4byte	.LASF202
-	.byte	0x11
+	.4byte	.LASF201
+	.byte	0x10
 	.byte	0x27
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_totle_phy_blks
 	.uleb128 0x1d
-	.4byte	.LASF203
-	.byte	0x11
+	.4byte	.LASF202
+	.byte	0x10
 	.byte	0x29
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x1d
-	.4byte	.LASF204
-	.byte	0x11
+	.uleb128 0x1d
+	.4byte	.LASF203
+	.byte	0x10
 	.byte	0x2a
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
 	.uleb128 0x1d
-	.4byte	.LASF205
-	.byte	0x11
+	.4byte	.LASF204
+	.byte	0x10
 	.byte	0x2c
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_vendor_region_num
 	.uleb128 0x1d
-	.4byte	.LASF206
-	.byte	0x11
+	.4byte	.LASF205
+	.byte	0x10
 	.byte	0x2e
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_map_blks_per_plane
 	.uleb128 0x1d
-	.4byte	.LASF207
-	.byte	0x11
+	.4byte	.LASF206
+	.byte	0x10
 	.byte	0x2f
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
 	.uleb128 0x1d
-	.4byte	.LASF208
-	.byte	0x11
+	.4byte	.LASF207
+	.byte	0x10
 	.byte	0x30
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_vendor_blks
 	.uleb128 0x1d
-	.4byte	.LASF209
-	.byte	0x11
+	.4byte	.LASF208
+	.byte	0x10
 	.byte	0x31
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_vendor_part_size
 	.uleb128 0x1d
-	.4byte	.LASF210
-	.byte	0x11
+	.4byte	.LASF209
+	.byte	0x10
 	.byte	0x32
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sys_blks_per_plane
 	.uleb128 0x1d
-	.4byte	.LASF211
-	.byte	0x11
+	.4byte	.LASF210
+	.byte	0x10
 	.byte	0x33
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_init_sys_blks_per_plane
 	.uleb128 0x1d
-	.4byte	.LASF212
-	.byte	0x11
+	.4byte	.LASF211
+	.byte	0x10
 	.byte	0x34
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_sys_blks
 	.uleb128 0x1d
-	.4byte	.LASF213
-	.byte	0x11
+	.4byte	.LASF212
+	.byte	0x10
 	.byte	0x35
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_data_blks_per_plane
 	.uleb128 0x1d
-	.4byte	.LASF214
-	.byte	0x11
+	.4byte	.LASF213
+	.byte	0x10
 	.byte	0x36
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_data_op_blks_per_plane
 	.uleb128 0x1d
-	.4byte	.LASF215
-	.byte	0x11
+	.4byte	.LASF214
+	.byte	0x10
 	.byte	0x37
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_data_blks
 	.uleb128 0x1d
-	.4byte	.LASF216
-	.byte	0x11
+	.4byte	.LASF215
+	.byte	0x10
 	.byte	0x38
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	ftl_gc_temp_power_lost_recovery_flag
 	.uleb128 0x1d
-	.4byte	.LASF217
-	.byte	0x11
+	.4byte	.LASF216
+	.byte	0x10
 	.byte	0x3a
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_GlobalSysVersion
 	.uleb128 0x1d
-	.4byte	.LASF218
-	.byte	0x11
+	.4byte	.LASF217
+	.byte	0x10
 	.byte	0x3b
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_GlobalDataVersion
 	.uleb128 0x1d
-	.4byte	.LASF219
-	.byte	0x11
+	.4byte	.LASF218
+	.byte	0x10
 	.byte	0x3c
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLbaSector
 	.uleb128 0x1d
-	.4byte	.LASF220
-	.byte	0x11
+	.4byte	.LASF219
+	.byte	0x10
 	.byte	0x3d
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLpn
 	.uleb128 0x1d
-	.4byte	.LASF221
-	.byte	0x11
+	.4byte	.LASF220
+	.byte	0x10
 	.byte	0x3e
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_VaildLpn
 	.uleb128 0x1d
-	.4byte	.LASF222
-	.byte	0x11
+	.4byte	.LASF221
+	.byte	0x10
 	.byte	0x3f
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLbn
 	.uleb128 0x1d
-	.4byte	.LASF223
-	.byte	0x11
+	.4byte	.LASF222
+	.byte	0x10
 	.byte	0x41
-	.4byte	0x4c4
+	.4byte	0x4b9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gBbtInfo
 	.uleb128 0x1d
-	.4byte	.LASF224
-	.byte	0x11
+	.4byte	.LASF223
+	.byte	0x10
 	.byte	0x42
-	.4byte	0x54a
+	.4byte	0x53f
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gSysInfo
 	.uleb128 0x1d
-	.4byte	.LASF225
-	.byte	0x11
+	.4byte	.LASF224
+	.byte	0x10
 	.byte	0x43
-	.4byte	0xae7
+	.4byte	0xadc
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.uleb128 0x1d
-	.4byte	.LASF226
-	.byte	0x11
+	.4byte	.LASF225
+	.byte	0x10
 	.byte	0x44
-	.4byte	0x592
+	.4byte	0x587
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gL2pMapInfo
 	.uleb128 0x1d
-	.4byte	.LASF227
-	.byte	0x11
+	.4byte	.LASF226
+	.byte	0x10
 	.byte	0x45
-	.4byte	0x592
+	.4byte	0x587
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gVendorBlkInfo
 	.uleb128 0x1d
-	.4byte	.LASF228
-	.byte	0x11
+	.4byte	.LASF227
+	.byte	0x10
 	.byte	0x46
-	.4byte	0x338
+	.4byte	0x32d
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_sys
 	.uleb128 0x1d
-	.4byte	.LASF229
-	.byte	0x11
+	.4byte	.LASF228
+	.byte	0x10
 	.byte	0x47
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_read
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x338
+	.4byte	0x32d
 	.uleb128 0x1d
-	.4byte	.LASF230
-	.byte	0x11
+	.4byte	.LASF229
+	.byte	0x10
 	.byte	0x48
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_prgm
 	.uleb128 0x1d
-	.4byte	.LASF231
-	.byte	0x11
+	.4byte	.LASF230
+	.byte	0x10
 	.byte	0x49
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_erase
 	.uleb128 0x1d
-	.4byte	.LASF232
-	.byte	0x11
+	.4byte	.LASF231
+	.byte	0x10
 	.byte	0x4a
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc
 	.uleb128 0x1d
-	.4byte	.LASF233
-	.byte	0x11
+	.4byte	.LASF232
+	.byte	0x10
 	.byte	0x4b
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc_dst
 	.uleb128 0x1d
-	.4byte	.LASF234
-	.byte	0x11
+	.4byte	.LASF233
+	.byte	0x10
 	.byte	0x4d
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_req_cache
 	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0xfb6
+	.4byte	0x2f6
+	.4byte	0xfab
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x1d
-	.4byte	.LASF235
-	.byte	0x11
+	.4byte	.LASF234
+	.byte	0x10
 	.byte	0x4f
-	.4byte	0xfa6
+	.4byte	0xf9b
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_plane_order_table
 	.uleb128 0x1d
-	.4byte	.LASF236
-	.byte	0x11
+	.4byte	.LASF235
+	.byte	0x10
 	.byte	0x51
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf
 	.uleb128 0x1d
-	.4byte	.LASF237
-	.byte	0x11
+	.4byte	.LASF236
+	.byte	0x10
 	.byte	0x52
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf_1
 	.uleb128 0x1d
-	.4byte	.LASF238
-	.byte	0x11
+	.4byte	.LASF237
+	.byte	0x10
 	.byte	0x53
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_data_buf
 	.uleb128 0x1d
-	.4byte	.LASF239
-	.byte	0x11
+	.4byte	.LASF238
+	.byte	0x10
 	.byte	0x54
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.uleb128 0x1d
-	.4byte	.LASF240
-	.byte	0x11
+	.4byte	.LASF239
+	.byte	0x10
 	.byte	0x55
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_0
 	.uleb128 0x1d
-	.4byte	.LASF241
-	.byte	0x11
+	.4byte	.LASF240
+	.byte	0x10
 	.byte	0x56
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_1
 	.uleb128 0x1d
-	.4byte	.LASF242
-	.byte	0x11
+	.4byte	.LASF241
+	.byte	0x10
 	.byte	0x57
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_spare_buf
 	.uleb128 0x1d
-	.4byte	.LASF243
-	.byte	0x11
+	.4byte	.LASF242
+	.byte	0x10
 	.byte	0x58
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_spare_buf
 	.uleb128 0x1d
-	.4byte	.LASF244
-	.byte	0x11
+	.4byte	.LASF243
+	.byte	0x10
 	.byte	0x59
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_data_buf
 	.uleb128 0x1d
-	.4byte	.LASF245
-	.byte	0x11
+	.4byte	.LASF244
+	.byte	0x10
 	.byte	0x5a
-	.4byte	0x1071
+	.4byte	0x1066
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_gc_page_buf_info
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xc19
+	.4byte	0xc0e
 	.uleb128 0x1d
-	.4byte	.LASF246
-	.byte	0x11
+	.4byte	.LASF245
+	.byte	0x10
 	.byte	0x5b
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_gc_page_buf_num
 	.uleb128 0x1d
-	.4byte	.LASF247
-	.byte	0x11
+	.4byte	.LASF246
+	.byte	0x10
 	.byte	0x5c
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_num_req
 	.uleb128 0x1d
-	.4byte	.LASF248
-	.byte	0x11
+	.4byte	.LASF247
+	.byte	0x10
 	.byte	0x5d
-	.4byte	0x10aa
+	.4byte	0x109f
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_ect_tbl_info
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x67e
+	.4byte	0x673
 	.uleb128 0x1d
-	.4byte	.LASF249
-	.byte	0x11
+	.4byte	.LASF248
+	.byte	0x10
 	.byte	0x5e
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_info_size
 	.uleb128 0x1d
-	.4byte	.LASF250
-	.byte	0x11
+	.4byte	.LASF249
+	.byte	0x10
 	.byte	0x5f
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_erase_count_table
 	.uleb128 0x1d
-	.4byte	.LASF251
-	.byte	0x11
+	.4byte	.LASF250
+	.byte	0x10
 	.byte	0x61
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_swl_mul_table
 	.uleb128 0x1d
-	.4byte	.LASF252
-	.byte	0x11
+	.4byte	.LASF251
+	.byte	0x10
 	.byte	0x62
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_swl_count
 	.uleb128 0x1d
-	.4byte	.LASF253
-	.byte	0x11
+	.4byte	.LASF252
+	.byte	0x10
 	.byte	0x63
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_table
 	.uleb128 0x1d
-	.4byte	.LASF254
-	.byte	0x11
+	.4byte	.LASF253
+	.byte	0x10
 	.byte	0x64
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_check_table
 	.uleb128 0x1d
-	.4byte	.LASF255
-	.byte	0x11
+	.4byte	.LASF254
+	.byte	0x10
 	.byte	0x65
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_blk_mode_table
 	.uleb128 0x1d
-	.4byte	.LASF256
-	.byte	0x11
+	.4byte	.LASF255
+	.byte	0x10
 	.byte	0x67
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_table
 	.uleb128 0x1d
-	.4byte	.LASF257
-	.byte	0x11
+	.4byte	.LASF256
+	.byte	0x10
 	.byte	0x68
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_valid_page_count
 	.uleb128 0x1d
-	.4byte	.LASF258
-	.byte	0x11
+	.4byte	.LASF257
+	.byte	0x10
 	.byte	0x69
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_ver_table
 	.uleb128 0x1d
-	.4byte	.LASF259
-	.byte	0x11
+	.4byte	.LASF258
+	.byte	0x10
 	.byte	0x6a
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_region_ppn_table
 	.uleb128 0x1d
-	.4byte	.LASF260
-	.byte	0x11
+	.4byte	.LASF259
+	.byte	0x10
 	.byte	0x6b
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_map_block
 	.uleb128 0x1d
-	.4byte	.LASF261
-	.byte	0x11
+	.4byte	.LASF260
+	.byte	0x10
 	.byte	0x6d
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_table
 	.uleb128 0x1d
-	.4byte	.LASF262
-	.byte	0x11
+	.4byte	.LASF261
+	.byte	0x10
 	.byte	0x6e
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_valid_page_count
 	.uleb128 0x1d
-	.4byte	.LASF263
-	.byte	0x11
+	.4byte	.LASF262
+	.byte	0x10
 	.byte	0x6f
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_ver_table
 	.uleb128 0x1d
-	.4byte	.LASF264
-	.byte	0x11
+	.4byte	.LASF263
+	.byte	0x10
 	.byte	0x70
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_region_ppn_table
 	.uleb128 0x1d
-	.4byte	.LASF265
-	.byte	0x11
+	.4byte	.LASF264
+	.byte	0x10
 	.byte	0x71
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_vendor_block
 	.uleb128 0x1d
-	.4byte	.LASF266
-	.byte	0x11
+	.4byte	.LASF265
+	.byte	0x10
 	.byte	0x73
-	.4byte	0x11e2
+	.4byte	0x11d7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_ram_map
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x641
+	.4byte	0x636
 	.uleb128 0x1d
-	.4byte	.LASF267
-	.byte	0x11
+	.4byte	.LASF266
+	.byte	0x10
 	.byte	0x74
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_map_buf
 	.uleb128 0x1d
-	.4byte	.LASF268
-	.byte	0x11
+	.4byte	.LASF267
+	.byte	0x10
 	.byte	0x75
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_l2p_last_update_region_id
 	.uleb128 0x1d
-	.4byte	.LASF269
-	.byte	0x11
+	.4byte	.LASF268
+	.byte	0x10
 	.byte	0x7c
-	.4byte	0x121b
+	.4byte	0x1210
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_table
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xab6
+	.4byte	0xaab
 	.uleb128 0x1d
-	.4byte	.LASF270
-	.byte	0x11
+	.4byte	.LASF269
+	.byte	0x10
 	.byte	0x7d
-	.4byte	0x121b
+	.4byte	0x1210
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_free_data_block_list_head
 	.uleb128 0x1d
-	.4byte	.LASF271
-	.byte	0x11
+	.4byte	.LASF270
+	.byte	0x10
 	.byte	0x7f
-	.4byte	0x121b
+	.4byte	0x1210
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_head
 	.uleb128 0x1d
-	.4byte	.LASF272
-	.byte	0x11
+	.4byte	.LASF271
+	.byte	0x10
 	.byte	0x80
-	.4byte	0x121b
+	.4byte	0x1210
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_tail
 	.uleb128 0x1d
-	.4byte	.LASF273
-	.byte	0x11
+	.4byte	.LASF272
+	.byte	0x10
 	.byte	0x81
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
 	.uleb128 0x1d
-	.4byte	.LASF274
-	.byte	0x11
+	.4byte	.LASF273
+	.byte	0x10
 	.byte	0x82
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.uleb128 0x1d
-	.4byte	.LASF275
-	.byte	0x11
+	.4byte	.LASF274
+	.byte	0x10
 	.byte	0x83
-	.4byte	0xb42
+	.4byte	0xb37
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_active_superblock
 	.uleb128 0x1d
-	.4byte	.LASF276
-	.byte	0x11
+	.4byte	.LASF275
+	.byte	0x10
 	.byte	0x84
-	.4byte	0xb42
+	.4byte	0xb37
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_buffer_superblock
 	.uleb128 0x1d
-	.4byte	.LASF277
-	.byte	0x11
+	.4byte	.LASF276
+	.byte	0x10
 	.byte	0x85
-	.4byte	0xb42
+	.4byte	0xb37
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
 	.uleb128 0x1d
-	.4byte	.LASF278
-	.byte	0x11
+	.4byte	.LASF277
+	.byte	0x10
 	.byte	0x86
-	.4byte	0xb42
+	.4byte	0xb37
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_superblock
 	.uleb128 0x1d
-	.4byte	.LASF279
-	.byte	0x11
+	.4byte	.LASF278
+	.byte	0x10
 	.byte	0x87
-	.4byte	0x12cb
+	.4byte	0x12c0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_last_act_superblock
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xb42
+	.4byte	0xb37
 	.uleb128 0x1d
-	.4byte	.LASF280
-	.byte	0x11
+	.4byte	.LASF279
+	.byte	0x10
 	.byte	0x88
-	.4byte	0x863
+	.4byte	0x858
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_save_data
 	.uleb128 0x1d
-	.4byte	.LASF281
-	.byte	0x11
+	.4byte	.LASF280
+	.byte	0x10
 	.byte	0x89
-	.4byte	0x960
+	.4byte	0x955
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_ext_data
 	.uleb128 0x1d
-	.4byte	.LASF282
-	.byte	0x11
+	.4byte	.LASF281
+	.byte	0x10
 	.byte	0x8b
-	.4byte	0x1304
+	.4byte	0x12f9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_page_info
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xbe4
+	.4byte	0xbd9
 	.uleb128 0x1d
-	.4byte	.LASF283
-	.byte	0x11
+	.4byte	.LASF282
+	.byte	0x10
 	.byte	0x8c
-	.4byte	0x63b
+	.4byte	0x630
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_blk_tbl
 	.uleb128 0x1d
-	.4byte	.LASF284
-	.byte	0x11
+	.4byte	.LASF283
+	.byte	0x10
 	.byte	0x8d
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_num
 	.uleb128 0x1d
-	.4byte	.LASF285
-	.byte	0x11
+	.4byte	.LASF284
+	.byte	0x10
 	.byte	0x8e
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_page_offset
 	.uleb128 0x1d
-	.4byte	.LASF286
-	.byte	0x11
+	.4byte	.LASF285
+	.byte	0x10
 	.byte	0x8f
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x1d
-	.4byte	.LASF287
-	.byte	0x11
+	.4byte	.LASF286
+	.byte	0x10
 	.byte	0x90
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x1d
-	.4byte	.LASF288
-	.byte	0x11
+	.4byte	.LASF287
+	.byte	0x10
 	.byte	0x91
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk
 	.uleb128 0x1d
-	.4byte	.LASF289
-	.byte	0x11
+	.4byte	.LASF288
+	.byte	0x10
 	.byte	0x92
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk_1
 	.uleb128 0x1d
-	.4byte	.LASF290
-	.byte	0x11
+	.4byte	.LASF289
+	.byte	0x10
 	.byte	0x93
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_num
 	.uleb128 0x1d
-	.4byte	.LASF291
-	.byte	0x11
+	.4byte	.LASF290
+	.byte	0x10
 	.byte	0x94
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_gc_index
 	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x13b3
+	.4byte	0x301
+	.4byte	0x13a8
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x10
 	.byte	0
 	.uleb128 0x1d
-	.4byte	.LASF292
-	.byte	0x11
+	.4byte	.LASF291
+	.byte	0x10
 	.byte	0x95
-	.4byte	0x13a3
+	.4byte	0x1398
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x1d
-	.4byte	.LASF293
-	.byte	0x11
+	.4byte	.LASF292
+	.byte	0x10
 	.byte	0x97
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_free_blk_threshold
 	.uleb128 0x1d
-	.4byte	.LASF294
-	.byte	0x11
+	.4byte	.LASF293
+	.byte	0x10
 	.byte	0x98
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x1d
-	.4byte	.LASF295
-	.byte	0x11
+	.4byte	.LASF294
+	.byte	0x10
 	.byte	0x99
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_index
 	.uleb128 0x1d
-	.4byte	.LASF296
-	.byte	0x11
+	.4byte	.LASF295
+	.byte	0x10
 	.byte	0x9b
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_gc_page_count
 	.uleb128 0x1d
-	.4byte	.LASF297
-	.byte	0x11
+	.4byte	.LASF296
+	.byte	0x10
 	.byte	0x9c
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_page_count
 	.uleb128 0x1d
-	.4byte	.LASF298
-	.byte	0x11
+	.4byte	.LASF297
+	.byte	0x10
 	.byte	0x9d
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_sector
 	.uleb128 0x1d
-	.4byte	.LASF299
-	.byte	0x11
+	.4byte	.LASF298
+	.byte	0x10
 	.byte	0x9e
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_sector
 	.uleb128 0x1d
-	.4byte	.LASF300
-	.byte	0x11
+	.4byte	.LASF299
+	.byte	0x10
 	.byte	0xa0
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_discard_page_count
 	.uleb128 0x1d
-	.4byte	.LASF301
-	.byte	0x11
+	.4byte	.LASF300
+	.byte	0x10
 	.byte	0xa1
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_page_count
 	.uleb128 0x1d
-	.4byte	.LASF302
-	.byte	0x11
+	.4byte	.LASF301
+	.byte	0x10
 	.byte	0xa2
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_tmp_data_superblock_id
 	.uleb128 0x1d
-	.4byte	.LASF303
-	.byte	0x11
+	.4byte	.LASF302
+	.byte	0x10
 	.byte	0xa3
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_cache_write_count
 	.uleb128 0x1d
-	.4byte	.LASF304
-	.byte	0x11
+	.4byte	.LASF303
+	.byte	0x10
 	.byte	0xa4
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_l2p_write_count
 	.uleb128 0x1d
-	.4byte	.LASF305
-	.byte	0x11
+	.4byte	.LASF304
+	.byte	0x10
 	.byte	0xa6
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_mlc_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF306
-	.byte	0x11
+	.4byte	.LASF305
+	.byte	0x10
 	.byte	0xa7
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_avg_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF307
-	.byte	0x11
+	.4byte	.LASF306
+	.byte	0x10
 	.byte	0xa8
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_min_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF308
-	.byte	0x11
+	.4byte	.LASF307
+	.byte	0x10
 	.byte	0xa9
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_slc_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF309
-	.byte	0x11
+	.4byte	.LASF308
+	.byte	0x10
 	.byte	0xaa
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_sys_slc_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF310
-	.byte	0x11
+	.4byte	.LASF309
+	.byte	0x10
 	.byte	0xab
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_max_erase_count
 	.uleb128 0x1d
-	.4byte	.LASF311
-	.byte	0x11
+	.4byte	.LASF310
+	.byte	0x10
 	.byte	0xac
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_gc_progress
 	.uleb128 0x1d
-	.4byte	.LASF312
-	.byte	0x11
+	.4byte	.LASF311
+	.byte	0x10
 	.byte	0xad
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_swl_replace
 	.uleb128 0x1d
-	.4byte	.LASF313
-	.byte	0x11
+	.4byte	.LASF312
+	.byte	0x10
 	.byte	0xae
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ftl_nand_free_count
 	.uleb128 0x1d
-	.4byte	.LASF314
-	.byte	0x11
+	.4byte	.LASF313
+	.byte	0x10
 	.byte	0xaf
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block
 	.uleb128 0x1d
-	.4byte	.LASF315
-	.byte	0x11
+	.4byte	.LASF314
+	.byte	0x10
 	.byte	0xb0
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block_count
 	.uleb128 0x1d
-	.4byte	.LASF316
-	.byte	0x11
+	.4byte	.LASF315
+	.byte	0x10
 	.byte	0xb1
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_skip_write_count
 	.uleb128 0x1d
-	.4byte	.LASF317
-	.byte	0x11
+	.4byte	.LASF316
+	.byte	0x10
 	.byte	0xb2
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_cur_erase_blk
 	.uleb128 0x1d
-	.4byte	.LASF318
-	.byte	0x11
+	.4byte	.LASF317
+	.byte	0x10
 	.byte	0xb4
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_num
 	.uleb128 0x1d
-	.4byte	.LASF319
-	.byte	0x11
+	.4byte	.LASF318
+	.byte	0x10
 	.byte	0xb5
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_min_ver
 	.uleb128 0xc
-	.4byte	0x317
-	.4byte	0x159f
+	.4byte	0x30c
+	.4byte	0x1594
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x1d
-	.4byte	.LASF320
-	.byte	0x11
+	.4byte	.LASF319
+	.byte	0x10
 	.byte	0xb6
-	.4byte	0x158f
+	.4byte	0x1584
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_ppa_tbl
 	.uleb128 0x1d
-	.4byte	.LASF321
-	.byte	0x11
+	.4byte	.LASF320
+	.byte	0x10
 	.byte	0xb7
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_mlc_erase_count_value
 	.uleb128 0x1d
-	.4byte	.LASF322
-	.byte	0x11
+	.4byte	.LASF321
+	.byte	0x10
 	.byte	0xb8
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_power_lost_recovery_flag
 	.uleb128 0x9
-	.4byte	.LASF323
-	.byte	0xe
+	.4byte	.LASF322
+	.byte	0xd
 	.byte	0x14
-	.4byte	0x387
+	.4byte	0x37c
 	.uleb128 0x9
-	.4byte	.LASF324
-	.byte	0xe
+	.4byte	.LASF323
+	.byte	0xd
 	.byte	0x15
-	.4byte	0x387
+	.4byte	0x37c
 	.uleb128 0x9
-	.4byte	.LASF325
-	.byte	0xe
+	.4byte	.LASF324
+	.byte	0xd
 	.byte	0x16
-	.4byte	0x429
+	.4byte	0x41e
 	.uleb128 0xc
 	.4byte	0x99
-	.4byte	0x1604
+	.4byte	0x15f9
 	.uleb128 0x19
 	.4byte	0x2e
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x9
-	.4byte	.LASF326
-	.byte	0xe
+	.4byte	.LASF325
+	.byte	0xd
 	.byte	0x17
-	.4byte	0x15f3
+	.4byte	0x15e8
 	.uleb128 0x1d
-	.4byte	.LASF327
+	.4byte	.LASF326
 	.byte	0x3
 	.byte	0x5
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	DeviceCapacity
 	.uleb128 0x1d
-	.4byte	.LASF328
+	.4byte	.LASF327
 	.byte	0x3
 	.byte	0x6
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gFtlInitStatus
 	.uleb128 0x9
+	.4byte	.LASF328
+	.byte	0x3
+	.byte	0x6c
+	.4byte	0x30c
+	.uleb128 0x9
 	.4byte	.LASF329
 	.byte	0x3
 	.byte	0x6d
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x9
 	.4byte	.LASF330
 	.byte	0x3
 	.byte	0x6e
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x9
 	.4byte	.LASF331
 	.byte	0x3
 	.byte	0x6f
-	.4byte	0x317
-	.uleb128 0x9
-	.4byte	.LASF332
-	.byte	0x3
-	.byte	0x70
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1e
-	.4byte	.LASF333
+	.4byte	.LASF332
 	.byte	0x3
-	.2byte	0x3bd
+	.2byte	0x3c0
 	.4byte	0x64
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	power_up_flag
 	.uleb128 0x1f
-	.4byte	.LASF337
+	.4byte	.LASF336
 	.byte	0x3
-	.2byte	0x480
-	.4byte	0x317
+	.2byte	0x483
+	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_discard_updated
 	.uleb128 0x1e
-	.4byte	.LASF334
+	.4byte	.LASF333
 	.byte	0x2
-	.2byte	0x35b
-	.4byte	0x30c
+	.2byte	0x38c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_power_up_flush
 	.uleb128 0x1e
-	.4byte	.LASF335
+	.4byte	.LASF334
 	.byte	0x2
-	.2byte	0x370
-	.4byte	0x30c
+	.2byte	0x3a1
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	FtlUpdateVaildLpnCount
 	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x16b6
+	.4byte	0x301
+	.4byte	0x16ab
 	.uleb128 0x19
 	.4byte	0x2e
 	.2byte	0x1fff
 	.byte	0
 	.uleb128 0x1e
-	.4byte	.LASF336
+	.4byte	.LASF335
 	.byte	0x2
-	.2byte	0x8ad
-	.4byte	0x16a5
+	.2byte	0x8df
+	.4byte	0x169a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_vpc_table
 	.uleb128 0x20
-	.4byte	.LASF338
+	.4byte	.LASF337
 	.byte	0x5
 	.byte	0x6d
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	ftl_gc_temp_block_bops_scan_page_addr
 	.uleb128 0x1e
-	.4byte	.LASF339
+	.4byte	.LASF338
 	.byte	0x5
 	.2byte	0x1d4
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_ink_free_return_value
 	.uleb128 0x20
-	.4byte	.LASF340
+	.4byte	.LASF339
 	.byte	0x1
 	.byte	0xe
-	.4byte	0x15f3
+	.4byte	0x15e8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_buf
 	.uleb128 0x21
-	.4byte	0x1604
+	.4byte	0x15f9
 	.byte	0x1
 	.byte	0xf
 	.uleb128 0x5
@@ -29211,94 +26387,94 @@ check_vpc_table:
 	.4byte	ftl_temp_buf
 	.uleb128 0xc
 	.4byte	0x99
-	.4byte	0x1719
+	.4byte	0x170e
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x7f
 	.byte	0
 	.uleb128 0x20
-	.4byte	.LASF341
+	.4byte	.LASF340
 	.byte	0x1
 	.byte	0x10
-	.4byte	0x1709
+	.4byte	0x16fe
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_spare_buf
 	.uleb128 0x22
-	.4byte	.LASF344
+	.4byte	.LASF343
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x64
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
+	.4byte	.LFB279
+	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x177a
+	.4byte	0x176f
 	.uleb128 0x23
-	.4byte	.LASF342
+	.4byte	.LASF341
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x25
-	.4byte	.LLST290
+	.4byte	.LLST301
 	.uleb128 0x23
-	.4byte	.LASF343
+	.4byte	.LASF342
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x25
-	.4byte	.LLST291
+	.4byte	.LLST302
 	.uleb128 0x23
-	.4byte	.LASF115
+	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x41
-	.4byte	.LLST292
+	.4byte	.LLST303
 	.uleb128 0x24
-	.4byte	.LVL1646
-	.4byte	0x6708
+	.4byte	.LVL1649
+	.4byte	0x67d3
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF345
+	.4byte	.LASF344
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x25
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
+	.4byte	.LFB278
+	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17ca
+	.4byte	0x17bf
 	.uleb128 0x23
-	.4byte	.LASF346
+	.4byte	.LASF345
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x25
-	.4byte	.LLST170
+	.4byte	.LLST177
 	.uleb128 0x23
-	.4byte	.LASF347
+	.4byte	.LASF346
 	.byte	0x1
 	.byte	0xcd
-	.4byte	0x17ca
-	.4byte	.LLST171
+	.4byte	0x17bf
+	.4byte	.LLST178
 	.uleb128 0x23
-	.4byte	.LASF348
+	.4byte	.LASF347
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x41
-	.4byte	.LLST172
+	.4byte	.LLST179
 	.uleb128 0x24
-	.4byte	.LVL835
-	.4byte	0x6713
+	.4byte	.LVL830
+	.4byte	0x67de
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x17d0
+	.4byte	0x17c5
 	.uleb128 0x25
 	.uleb128 0x26
-	.4byte	.LASF351
+	.4byte	.LASF350
 	.byte	0x1
 	.byte	0xc8
 	.4byte	0x25
 	.byte	0x1
-	.4byte	0x1815
+	.4byte	0x180a
 	.uleb128 0x27
 	.ascii	"s\000"
 	.byte	0x1
@@ -29328,174 +26504,174 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF349
+	.4byte	.LASF348
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x8e
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x190b
+	.4byte	0x1900
 	.uleb128 0x23
-	.4byte	.LASF350
+	.4byte	.LASF349
 	.byte	0x1
 	.byte	0xb6
-	.4byte	0x47a
-	.4byte	.LLST104
+	.4byte	0x46f
+	.4byte	.LLST109
 	.uleb128 0x2b
 	.ascii	"die\000"
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x99
-	.4byte	.LLST105
+	.4byte	.LLST110
 	.uleb128 0x2c
-	.4byte	.LASF115
+	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x83
-	.4byte	.LLST106
+	.4byte	.LLST111
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x83
 	.uleb128 0x2d
-	.4byte	0x17d1
-	.4byte	.LBB337
-	.4byte	.Ldebug_ranges0+0xd8
+	.4byte	0x17c6
+	.4byte	.LBB361
+	.4byte	.Ldebug_ranges0+0x160
 	.byte	0x1
 	.byte	0xba
-	.4byte	0x18b5
+	.4byte	0x18aa
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xd8
+	.4byte	.Ldebug_ranges0+0x160
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xd8
+	.4byte	.Ldebug_ranges0+0x160
 	.uleb128 0x30
-	.4byte	0x17fd
+	.4byte	0x17f2
 	.uleb128 0x30
-	.4byte	0x1808
-	.uleb128 0x24
-	.4byte	.LVL468
-	.4byte	0x671c
+	.4byte	0x17fd
+	.uleb128 0x31
+	.4byte	.LVL485
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	0x17d1
-	.4byte	.LBB346
-	.4byte	.LBE346-.LBB346
+	.uleb128 0x32
+	.4byte	0x17c6
+	.4byte	.LBB370
+	.4byte	.LBE370-.LBB370
 	.byte	0x1
 	.byte	0xbd
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB347
-	.4byte	.LBE347-.LBB347
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB371
+	.4byte	.LBE371-.LBB371
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB348
-	.4byte	.LBE348-.LBB348
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB372
+	.4byte	.LBE372-.LBB372
 	.uleb128 0x30
-	.4byte	0x17fd
+	.4byte	0x17f2
 	.uleb128 0x30
-	.4byte	0x1808
-	.uleb128 0x24
-	.4byte	.LVL472
-	.4byte	0x671c
+	.4byte	0x17fd
+	.uleb128 0x31
+	.4byte	.LVL489
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF352
+	.4byte	.LASF351
 	.byte	0x1
 	.byte	0x9b
-	.4byte	0x322
+	.4byte	0x317
 	.byte	0x1
-	.4byte	0x194f
-	.uleb128 0x33
-	.4byte	.LASF353
+	.4byte	0x1944
+	.uleb128 0x34
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x9b
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x29
 	.ascii	"sts\000"
 	.byte	0x1
 	.byte	0x9d
-	.4byte	0x322
-	.uleb128 0x34
-	.4byte	.LASF354
+	.4byte	0x317
+	.uleb128 0x35
+	.4byte	.LASF353
 	.byte	0x1
 	.byte	0x9e
-	.4byte	0x194f
+	.4byte	0x1944
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x9f
-	.4byte	0x338
-	.uleb128 0x35
+	.4byte	0x32d
+	.uleb128 0x36
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0xb1
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x317
-	.4byte	0x195f
+	.4byte	0x30c
+	.4byte	0x1954
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xf
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF355
+	.4byte	.LASF354
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x8e
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x19f5
+	.4byte	0x19ea
 	.uleb128 0x23
-	.4byte	.LASF356
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x25
-	.4byte	.LLST91
+	.4byte	.LLST94
 	.uleb128 0x23
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x99
-	.4byte	.LLST92
+	.4byte	.LLST95
 	.uleb128 0x23
-	.4byte	.LASF358
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x99
-	.4byte	.LLST93
-	.uleb128 0x36
+	.4byte	.LLST96
+	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x87
@@ -29507,69 +26683,69 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x87
 	.4byte	0x99
-	.uleb128 0x34
-	.4byte	.LASF62
+	.uleb128 0x35
+	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x87
 	.4byte	0x99
 	.uleb128 0x20
-	.4byte	.LASF359
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x87
 	.4byte	0x99
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -44
+	.sleb128 -36
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x88
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x20
-	.4byte	.LASF360
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x89
 	.4byte	0x99
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x24
-	.4byte	.LVL403
-	.4byte	0x1bb3
+	.uleb128 0x31
+	.4byte	.LVL413
+	.4byte	0x1ba6
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF361
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x8e
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1af0
+	.4byte	0x1ae3
 	.uleb128 0x23
-	.4byte	.LASF356
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x25
-	.4byte	.LLST86
+	.4byte	.LLST89
 	.uleb128 0x23
-	.4byte	.LASF358
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST87
+	.4byte	.LLST90
 	.uleb128 0x23
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST88
+	.4byte	.LLST91
 	.uleb128 0x23
-	.4byte	.LASF362
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST89
+	.4byte	.LLST92
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
@@ -29580,6420 +26756,6399 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x99
-	.uleb128 0x34
-	.4byte	.LASF62
+	.uleb128 0x35
+	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x99
 	.uleb128 0x20
-	.4byte	.LASF359
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x99
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -64
 	.uleb128 0x2c
-	.4byte	.LASF360
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x4c
 	.4byte	0x99
-	.4byte	.LLST90
+	.4byte	.LLST93
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x4d
-	.4byte	0xf4b
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.4byte	0xf40
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7625
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x88
-	.4byte	0x1add
+	.4byte	__func__.7540
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0xe0
+	.4byte	0x1ad0
 	.uleb128 0x20
-	.4byte	.LASF364
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0x68
-	.4byte	0x338
-	.uleb128 0x3
+	.4byte	0x32d
+	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x24
-	.4byte	.LVL388
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL389
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL390
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL391
-	.4byte	0x6727
+	.sleb128 -60
+	.uleb128 0x31
+	.4byte	.LVL397
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL399
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL400
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL401
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL377
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL379
-	.4byte	0x1bb3
+	.uleb128 0x31
+	.4byte	.LVL391
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL392
+	.4byte	0x1ba6
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x1b00
+	.4byte	0x1af3
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x1af0
+	.4byte	0x1ae3
 	.uleb128 0x2a
-	.4byte	.LASF365
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x8e
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1bb3
+	.4byte	0x1ba6
 	.uleb128 0x23
-	.4byte	.LASF356
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x25
-	.4byte	.LLST79
+	.4byte	.LLST82
 	.uleb128 0x23
-	.4byte	.LASF358
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x99
-	.4byte	.LLST80
+	.4byte	.LLST83
 	.uleb128 0x23
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x99
-	.4byte	.LLST81
-	.uleb128 0x36
+	.4byte	.LLST84
+	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x99
 	.uleb128 0x1
-	.byte	0x55
+	.byte	0x56
 	.uleb128 0x29
 	.ascii	"cs\000"
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x99
-	.uleb128 0x34
-	.4byte	.LASF62
+	.uleb128 0x35
+	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x99
 	.uleb128 0x20
-	.4byte	.LASF359
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x99
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -52
+	.sleb128 -44
 	.uleb128 0x20
-	.4byte	.LASF360
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x2e
 	.4byte	0x99
 	.uleb128 0x1
-	.byte	0x5a
+	.byte	0x57
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x2f
-	.4byte	0xf4b
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.4byte	0xf40
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7608
-	.uleb128 0x24
-	.4byte	.LVL348
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL351
-	.4byte	0x1bb3
+	.4byte	__func__.7523
+	.uleb128 0x31
+	.4byte	.LVL361
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL364
+	.4byte	0x1ba6
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF669
+	.uleb128 0x3a
+	.4byte	.LASF667
 	.byte	0x1
 	.byte	0x11
 	.4byte	0x99
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c5b
+	.4byte	0x1c4e
 	.uleb128 0x2b
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x11
-	.4byte	0xf4b
+	.4byte	0xf40
 	.4byte	.LLST0
 	.uleb128 0x23
-	.4byte	.LASF359
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x11
-	.4byte	0x381
+	.4byte	0x376
 	.4byte	.LLST1
 	.uleb128 0x23
-	.4byte	.LASF366
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0x11
-	.4byte	0x381
+	.4byte	0x376
 	.4byte	.LLST2
-	.uleb128 0x34
-	.4byte	.LASF367
+	.uleb128 0x35
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x83
-	.uleb128 0x34
-	.4byte	.LASF368
+	.uleb128 0x35
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x83
 	.uleb128 0x2c
-	.4byte	.LASF72
+	.4byte	.LASF71
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x83
 	.4byte	.LLST3
 	.uleb128 0x2c
-	.4byte	.LASF73
+	.4byte	.LASF72
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x83
 	.4byte	.LLST4
 	.uleb128 0x2c
-	.4byte	.LASF369
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x99
 	.4byte	.LLST5
 	.uleb128 0x2c
-	.4byte	.LASF63
+	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x99
 	.4byte	.LLST6
 	.uleb128 0x2c
-	.4byte	.LASF370
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x99
 	.4byte	.LLST7
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF371
+	.uleb128 0x3b
+	.4byte	.LASF370
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0x99
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c7f
+	.4byte	0x1c72
 	.uleb128 0x24
-	.4byte	.LVL1386
-	.4byte	0x1c7f
+	.4byte	.LVL1388
+	.4byte	0x1c72
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF372
+	.uleb128 0x3c
+	.4byte	.LASF371
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x1d4c
-	.uleb128 0x3c
-	.4byte	.LASF373
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x317
-	.uleb128 0x3c
-	.4byte	.LASF374
+	.4byte	0x1d3f
+	.uleb128 0x3d
+	.4byte	.LASF372
 	.byte	0x5
 	.2byte	0x1d5
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x3d
-	.4byte	.LASF375
+	.4byte	.LASF373
 	.byte	0x5
-	.2byte	0x1d7
+	.2byte	0x1d5
 	.4byte	0x30c
 	.uleb128 0x3e
+	.4byte	.LASF374
+	.byte	0x5
+	.2byte	0x1d7
+	.4byte	0x301
+	.uleb128 0x3f
 	.ascii	"lpa\000"
 	.byte	0x5
 	.2byte	0x1d8
-	.4byte	0x317
-	.uleb128 0x3e
+	.4byte	0x30c
+	.uleb128 0x3f
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1d8
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF376
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF375
 	.byte	0x5
 	.2byte	0x1d9
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF86
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF85
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x30c
-	.uleb128 0x3d
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF376
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF377
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x30c
-	.uleb128 0x3d
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x30c
-	.uleb128 0x3d
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF379
 	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x30c
-	.uleb128 0x3d
+	.2byte	0x1db
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x5
-	.2byte	0x1db
-	.4byte	0x30c
-	.uleb128 0x3d
+	.2byte	0x1dc
+	.4byte	0x1d3f
+	.uleb128 0x40
 	.4byte	.LASF381
 	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x1d4c
-	.uleb128 0x3f
+	.2byte	0x272
+	.uleb128 0x40
 	.4byte	.LASF382
 	.byte	0x5
-	.2byte	0x276
-	.uleb128 0x3f
-	.4byte	.LASF383
-	.byte	0x5
-	.2byte	0x279
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x1d62
-	.4byte	.LASF372
+	.2byte	0x275
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x1d55
+	.4byte	.LASF371
 	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF384
+	.uleb128 0x3e
+	.4byte	.LASF383
 	.byte	0x5
 	.2byte	0x1f3
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x77b
+	.4byte	0x770
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x1d62
+	.4byte	0x1d55
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x16
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x1d52
-	.uleb128 0x3b
-	.4byte	.LASF385
+	.4byte	0x1d45
+	.uleb128 0x3c
+	.4byte	.LASF384
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x1dc7
-	.uleb128 0x3e
+	.4byte	0x1dba
+	.uleb128 0x3f
 	.ascii	"ret\000"
 	.byte	0x5
 	.2byte	0x1a4
 	.4byte	0x64
-	.uleb128 0x3e
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x1a5
 	.4byte	0x64
-	.uleb128 0x3e
+	.uleb128 0x3f
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1a6
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF354
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF353
 	.byte	0x5
 	.2byte	0x1a7
-	.4byte	0x194f
-	.uleb128 0x41
-	.4byte	0x1db8
-	.uleb128 0x3d
-	.4byte	.LASF386
+	.4byte	0x1944
+	.uleb128 0x42
+	.4byte	0x1dab
+	.uleb128 0x3e
+	.4byte	.LASF385
 	.byte	0x5
 	.2byte	0x1b1
-	.4byte	0x338
+	.4byte	0x32d
 	.byte	0
 	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF387
+	.uleb128 0x3e
+	.4byte	.LASF386
 	.byte	0x5
 	.2byte	0x1c6
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF388
+	.uleb128 0x3c
+	.4byte	.LASF387
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x1e11
-	.uleb128 0x3c
-	.4byte	.LASF389
+	.4byte	0x1e04
+	.uleb128 0x3d
+	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x185
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x5
 	.2byte	0x187
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x301
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x188
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x301
+	.uleb128 0x3f
 	.ascii	"j\000"
 	.byte	0x5
 	.2byte	0x188
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF179
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF178
 	.byte	0x5
 	.2byte	0x189
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF498
+	.uleb128 0x43
+	.4byte	.LASF497
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x64
 	.byte	0x1
-	.uleb128 0x3a
-	.4byte	.LASF390
+	.uleb128 0x3b
+	.4byte	.LASF389
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x64
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1e7a
-	.uleb128 0x43
-	.4byte	.LASF179
+	.4byte	0x1e6d
+	.uleb128 0x44
+	.4byte	.LASF178
 	.byte	0x5
 	.2byte	0x166
-	.4byte	0x30c
-	.4byte	.LLST78
-	.uleb128 0x3e
+	.4byte	0x301
+	.4byte	.LLST81
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF391
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF390
 	.byte	0x5
 	.2byte	0x169
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL335
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL336
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL337
-	.4byte	0x1e7a
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL347
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL348
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL349
+	.4byte	0x1e6d
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF392
+	.uleb128 0x3b
+	.4byte	.LASF391
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x64
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1eae
-	.uleb128 0x43
-	.4byte	.LASF393
+	.4byte	0x1ea1
+	.uleb128 0x44
+	.4byte	.LASF392
 	.byte	0x5
 	.2byte	0x158
-	.4byte	0x30c
-	.4byte	.LLST77
-	.uleb128 0x24
-	.4byte	.LVL333
-	.4byte	0x6727
+	.4byte	0x301
+	.4byte	.LLST80
+	.uleb128 0x31
+	.4byte	.LVL344
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF394
+	.uleb128 0x3b
+	.4byte	.LASF393
 	.byte	0x5
 	.2byte	0x13b
-	.4byte	0x317
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
+	.4byte	0x30c
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f22
-	.uleb128 0x3e
+	.4byte	0x1f15
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF381
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF380
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x1d4c
-	.4byte	.LLST244
-	.uleb128 0x24
-	.4byte	.LVL1281
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL1282
-	.4byte	0x22d8
-	.uleb128 0x24
-	.4byte	.LVL1283
-	.4byte	0x20d1
-	.uleb128 0x24
-	.4byte	.LVL1284
-	.4byte	0x4b52
-	.uleb128 0x24
-	.4byte	.LVL1285
-	.4byte	0x4994
-	.uleb128 0x24
-	.4byte	.LVL1286
-	.4byte	0x20a0
-	.uleb128 0x24
-	.4byte	.LVL1288
-	.4byte	0x21fa
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF395
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0x317
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1f7c
-	.uleb128 0x24
+	.4byte	0x1d3f
+	.4byte	.LLST255
+	.uleb128 0x31
 	.4byte	.LVL1289
-	.4byte	0x4f6d
-	.uleb128 0x24
+	.4byte	0x19ea
+	.uleb128 0x31
 	.4byte	.LVL1290
-	.4byte	0x20d1
-	.uleb128 0x24
+	.4byte	0x22cb
+	.uleb128 0x31
 	.4byte	.LVL1291
-	.4byte	0x2512
-	.uleb128 0x24
+	.4byte	0x20c4
+	.uleb128 0x31
 	.4byte	.LVL1292
-	.4byte	0x39f7
-	.uleb128 0x24
+	.4byte	0x4b12
+	.uleb128 0x31
 	.4byte	.LVL1293
-	.4byte	0x3734
-	.uleb128 0x24
+	.4byte	0x4954
+	.uleb128 0x31
 	.4byte	.LVL1294
-	.4byte	0x3593
+	.4byte	0x2093
+	.uleb128 0x31
+	.4byte	.LVL1296
+	.4byte	0x21ed
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF394
+	.byte	0x5
+	.2byte	0x12b
+	.4byte	0x30c
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1f6f
+	.uleb128 0x31
+	.4byte	.LVL1297
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1298
+	.4byte	0x20c4
+	.uleb128 0x31
+	.4byte	.LVL1299
+	.4byte	0x2505
+	.uleb128 0x31
+	.4byte	.LVL1300
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1301
+	.4byte	0x373d
+	.uleb128 0x31
+	.4byte	.LVL1302
+	.4byte	0x3598
 	.uleb128 0x24
-	.4byte	.LVL1295
-	.4byte	0x23f1
+	.4byte	.LVL1303
+	.4byte	0x23e4
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF454
+	.uleb128 0x46
+	.4byte	.LASF453
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF396
+	.4byte	.LASF395
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x317
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
+	.4byte	0x30c
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x20a0
+	.4byte	0x2093
 	.uleb128 0x23
-	.4byte	.LASF397
+	.4byte	.LASF396
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x12cb
-	.4byte	.LLST161
+	.4byte	0x12c0
+	.4byte	.LLST168
 	.uleb128 0x23
-	.4byte	.LASF398
+	.4byte	.LASF397
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x317
-	.4byte	.LLST162
+	.4byte	0x30c
+	.4byte	.LLST169
 	.uleb128 0x2c
-	.4byte	.LASF379
+	.4byte	.LASF378
 	.byte	0x5
 	.byte	0xd4
-	.4byte	0x30c
-	.4byte	.LLST163
+	.4byte	0x301
+	.4byte	.LLST170
 	.uleb128 0x2c
-	.4byte	.LASF358
+	.4byte	.LASF357
 	.byte	0x5
 	.byte	0xd5
-	.4byte	0x30c
-	.4byte	.LLST164
+	.4byte	0x301
+	.4byte	.LLST171
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0xd5
-	.4byte	0x30c
-	.uleb128 0x34
-	.4byte	.LASF377
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF376
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x2c
-	.4byte	.LASF173
+	.4byte	.LASF172
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x30c
-	.4byte	.LLST165
+	.4byte	0x301
+	.4byte	.LLST172
 	.uleb128 0x2c
-	.4byte	.LASF171
+	.4byte	.LASF170
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x30c
-	.4byte	.LLST166
+	.4byte	0x301
+	.4byte	.LLST173
 	.uleb128 0x2c
-	.4byte	.LASF399
+	.4byte	.LASF398
 	.byte	0x5
 	.byte	0xd7
-	.4byte	0x317
-	.4byte	.LLST167
+	.4byte	0x30c
+	.4byte	.LLST174
 	.uleb128 0x2c
-	.4byte	.LASF400
+	.4byte	.LASF399
 	.byte	0x5
 	.byte	0xd8
-	.4byte	0x317
-	.4byte	.LLST168
-	.uleb128 0x34
-	.4byte	.LASF401
+	.4byte	0x30c
+	.4byte	.LLST175
+	.uleb128 0x35
+	.4byte	.LASF400
 	.byte	0x5
 	.byte	0xd9
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x2c
-	.4byte	.LASF381
+	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x1d4c
-	.4byte	.LLST169
-	.uleb128 0x46
-	.4byte	.LASF402
+	.4byte	0x1d3f
+	.4byte	.LLST176
+	.uleb128 0x47
+	.4byte	.LASF401
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x46
-	.4byte	.LASF403
+	.uleb128 0x47
+	.4byte	.LASF402
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x47
-	.4byte	.LASF472
+	.uleb128 0x48
+	.4byte	.LASF471
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L960
-	.uleb128 0x24
-	.4byte	.LVL797
-	.4byte	0x20a0
-	.uleb128 0x24
-	.4byte	.LVL804
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL818
-	.4byte	0x458e
-	.uleb128 0x24
+	.4byte	.L981
+	.uleb128 0x31
+	.4byte	.LVL790
+	.4byte	0x2093
+	.uleb128 0x31
+	.4byte	.LVL798
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL812
+	.4byte	0x454e
+	.uleb128 0x31
+	.4byte	.LVL820
+	.4byte	0x314e
+	.uleb128 0x31
+	.4byte	.LVL822
+	.4byte	0x21ed
+	.uleb128 0x31
+	.4byte	.LVL824
+	.4byte	0x4222
+	.uleb128 0x31
 	.4byte	.LVL825
-	.4byte	0x3147
-	.uleb128 0x24
-	.4byte	.LVL827
-	.4byte	0x21fa
-	.uleb128 0x24
-	.4byte	.LVL829
-	.4byte	0x4228
-	.uleb128 0x24
-	.4byte	.LVL830
-	.4byte	0x20a0
+	.4byte	0x2093
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF410
+	.uleb128 0x49
+	.4byte	.LASF409
 	.byte	0x5
 	.byte	0xc9
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x20d1
-	.uleb128 0x24
-	.4byte	.LVL791
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL792
-	.4byte	0x17d1
+	.4byte	0x20c4
+	.uleb128 0x31
+	.4byte	.LVL784
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL785
+	.4byte	0x17c6
 	.uleb128 0x24
-	.4byte	.LVL793
-	.4byte	0x231c
+	.4byte	.LVL786
+	.4byte	0x230f
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF404
+	.4byte	.LASF403
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x64
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x21e5
+	.4byte	0x21d8
 	.uleb128 0x23
-	.4byte	.LASF405
+	.4byte	.LASF404
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x64
-	.4byte	.LLST240
+	.4byte	.LLST251
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
-	.4byte	0x30c
-	.uleb128 0x34
-	.4byte	.LASF406
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF405
 	.byte	0x5
 	.byte	0x71
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x2c
-	.4byte	.LASF407
+	.4byte	.LASF406
 	.byte	0x5
 	.byte	0x72
-	.4byte	0x317
-	.4byte	.LLST241
+	.4byte	0x30c
+	.4byte	.LLST252
 	.uleb128 0x2c
-	.4byte	.LASF408
+	.4byte	.LASF407
 	.byte	0x5
 	.byte	0x73
-	.4byte	0x317
-	.4byte	.LLST242
-	.uleb128 0x34
-	.4byte	.LASF397
+	.4byte	0x30c
+	.4byte	.LLST253
+	.uleb128 0x35
+	.4byte	.LASF396
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x12cb
+	.4byte	0x12c0
 	.uleb128 0x2c
-	.4byte	.LASF409
+	.4byte	.LASF408
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x1304
-	.4byte	.LLST243
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x21f5
+	.4byte	0x12f9
+	.4byte	.LLST254
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x21e8
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7458
-	.uleb128 0x24
-	.4byte	.LVL1248
-	.4byte	0x1f85
-	.uleb128 0x24
-	.4byte	.LVL1250
-	.4byte	0x3734
-	.uleb128 0x24
-	.4byte	.LVL1251
-	.4byte	0x4b52
-	.uleb128 0x24
-	.4byte	.LVL1252
-	.4byte	0x4994
-	.uleb128 0x24
-	.4byte	.LVL1256
-	.4byte	0x4f6d
-	.uleb128 0x24
+	.4byte	__func__.7373
+	.uleb128 0x31
 	.4byte	.LVL1257
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x1f78
+	.uleb128 0x31
 	.4byte	.LVL1259
-	.4byte	0x233b
-	.uleb128 0x24
+	.4byte	0x373d
+	.uleb128 0x31
+	.4byte	.LVL1260
+	.4byte	0x4b12
+	.uleb128 0x31
 	.4byte	.LVL1261
-	.4byte	0x4203
-	.uleb128 0x24
-	.4byte	.LVL1262
-	.4byte	0x39f7
-	.uleb128 0x24
-	.4byte	.LVL1263
-	.4byte	0x3593
-	.uleb128 0x24
+	.4byte	0x4954
+	.uleb128 0x31
 	.4byte	.LVL1265
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x4f1f
+	.uleb128 0x31
 	.4byte	.LVL1266
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1267
-	.4byte	0x455a
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1268
-	.4byte	0x392c
-	.uleb128 0x24
+	.4byte	0x232e
+	.uleb128 0x31
 	.4byte	.LVL1269
-	.4byte	0x233b
-	.uleb128 0x24
+	.4byte	0x41fd
+	.uleb128 0x31
 	.4byte	.LVL1271
-	.4byte	0x4228
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1272
+	.4byte	0x3598
+	.uleb128 0x31
+	.4byte	.LVL1274
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1275
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1276
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1277
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1278
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1279
+	.4byte	0x4222
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x21f5
+	.4byte	0x21e8
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x12
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x21e5
-	.uleb128 0x48
-	.4byte	.LASF411
+	.4byte	0x21d8
+	.uleb128 0x49
+	.4byte	.LASF410
 	.byte	0x5
 	.byte	0x54
-	.4byte	.LFB247
-	.4byte	.LFE247-.LFB247
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2262
+	.4byte	0x2255
 	.uleb128 0x23
-	.4byte	.LASF412
+	.4byte	.LASF411
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x317
-	.4byte	.LLST72
+	.4byte	0x30c
+	.4byte	.LLST75
 	.uleb128 0x23
-	.4byte	.LASF182
+	.4byte	.LASF181
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x317
-	.4byte	.LLST73
+	.4byte	0x30c
+	.4byte	.LLST76
 	.uleb128 0x2b
 	.ascii	"lpa\000"
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x317
-	.4byte	.LLST74
+	.4byte	0x30c
+	.4byte	.LLST77
 	.uleb128 0x2c
-	.4byte	.LASF413
+	.4byte	.LASF412
 	.byte	0x5
 	.byte	0x56
-	.4byte	0x30c
-	.4byte	.LLST75
-	.uleb128 0x49
+	.4byte	0x301
+	.4byte	.LLST78
+	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x57
-	.4byte	0x30c
-	.4byte	.LLST76
-	.uleb128 0x24
-	.4byte	.LVL322
-	.4byte	0x455a
+	.4byte	0x301
+	.4byte	.LLST79
+	.uleb128 0x31
+	.4byte	.LVL332
+	.4byte	0x451a
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF414
+	.4byte	.LASF413
 	.byte	0x5
 	.byte	0x49
-	.4byte	0x317
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
+	.4byte	0x30c
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2294
+	.4byte	0x2287
 	.uleb128 0x2b
 	.ascii	"blk\000"
 	.byte	0x5
 	.byte	0x49
-	.4byte	0x30c
-	.4byte	.LLST71
+	.4byte	0x301
+	.4byte	.LLST74
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x4b
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF415
+	.uleb128 0x49
+	.4byte	.LASF414
 	.byte	0x5
 	.byte	0x38
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x22d8
-	.uleb128 0x4a
+	.4byte	0x22cb
+	.uleb128 0x4b
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x38
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4b
-	.4byte	.LASF416
+	.uleb128 0x4c
+	.4byte	.LASF415
 	.byte	0x5
 	.byte	0x38
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x3a
-	.4byte	0x30c
-	.uleb128 0x34
-	.4byte	.LASF417
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF416
 	.byte	0x5
 	.byte	0x3b
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF418
+	.uleb128 0x49
+	.4byte	.LASF417
 	.byte	0x5
 	.byte	0x29
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x231c
-	.uleb128 0x4a
+	.4byte	0x230f
+	.uleb128 0x4b
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x29
-	.4byte	0xf4b
+	.4byte	0xf40
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4b
-	.4byte	.LASF416
+	.uleb128 0x4c
+	.4byte	.LASF415
 	.byte	0x5
 	.byte	0x29
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x2b
-	.4byte	0x30c
-	.uleb128 0x34
-	.4byte	.LASF417
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF416
 	.byte	0x5
 	.byte	0x2c
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF419
+	.uleb128 0x49
+	.4byte	.LASF418
 	.byte	0x5
 	.byte	0x15
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x233b
+	.4byte	0x232e
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x17
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF420
+	.uleb128 0x3b
+	.4byte	.LASF419
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac3
 	.4byte	0x64
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x239c
-	.uleb128 0x43
-	.4byte	.LASF406
+	.4byte	0x238f
+	.uleb128 0x44
+	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa93
-	.4byte	0x30c
-	.4byte	.LLST185
-	.uleb128 0x3e
+	.2byte	0xac3
+	.4byte	0x301
+	.4byte	.LLST192
+	.uleb128 0x3f
 	.ascii	"ret\000"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac5
 	.4byte	0x64
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x23ac
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x239f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7388
-	.uleb128 0x24
-	.4byte	.LVL911
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL912
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL914
-	.4byte	0x23b1
+	.4byte	__func__.7303
+	.uleb128 0x31
+	.4byte	.LVL903
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL905
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL907
+	.4byte	0x23a4
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x23ac
+	.4byte	0x239f
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x13
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x239c
-	.uleb128 0x3b
-	.4byte	.LASF421
+	.4byte	0x238f
+	.uleb128 0x3c
+	.4byte	.LASF420
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xaae
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x23dc
-	.uleb128 0x3c
-	.4byte	.LASF406
+	.4byte	0x23cf
+	.uleb128 0x3d
+	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa7e
-	.4byte	0x30c
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x23ec
-	.4byte	.LASF421
+	.2byte	0xaae
+	.4byte	0x301
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x23df
+	.4byte	.LASF420
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x23ec
+	.4byte	0x23df
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xf
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x23dc
-	.uleb128 0x3a
-	.4byte	.LASF422
+	.4byte	0x23cf
+	.uleb128 0x3b
+	.4byte	.LASF421
 	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x317
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
+	.2byte	0xa8e
+	.4byte	0x30c
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x246d
-	.uleb128 0x43
-	.4byte	.LASF423
-	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x12cb
-	.4byte	.LLST69
+	.4byte	0x2460
 	.uleb128 0x44
-	.4byte	.LASF379
+	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0xa60
-	.4byte	0x30c
-	.4byte	.LLST70
+	.2byte	0xa8e
+	.4byte	0x12c0
+	.4byte	.LLST72
+	.uleb128 0x45
+	.4byte	.LASF378
+	.byte	0x2
+	.2byte	0xa90
+	.4byte	0x301
+	.4byte	.LLST73
 	.uleb128 0x1f
-	.4byte	.LASF424
+	.4byte	.LASF423
 	.byte	0x2
-	.2byte	0xa61
-	.4byte	0x317
+	.2byte	0xa91
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x21f5
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x21e8
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7368
-	.uleb128 0x24
-	.4byte	.LVL307
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL308
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL309
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL312
-	.4byte	0x6727
+	.4byte	__func__.7283
+	.uleb128 0x31
+	.4byte	.LVL317
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL318
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL319
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL322
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF425
+	.uleb128 0x3b
+	.4byte	.LASF424
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa76
 	.4byte	0x64
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24fd
-	.uleb128 0x43
-	.4byte	.LASF423
+	.4byte	0x24f0
+	.uleb128 0x44
+	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0xa46
-	.4byte	0x12cb
-	.4byte	.LLST226
+	.2byte	0xa76
+	.4byte	0x12c0
+	.4byte	.LLST237
 	.uleb128 0x1f
-	.4byte	.LASF406
+	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa48
-	.4byte	0x30c
+	.2byte	0xa78
+	.4byte	0x301
 	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x250d
+	.byte	0x55
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x2500
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7361
-	.uleb128 0x24
-	.4byte	.LVL1183
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1184
-	.4byte	0x4203
-	.uleb128 0x24
-	.4byte	.LVL1185
-	.4byte	0x23b1
-	.uleb128 0x24
-	.4byte	.LVL1186
-	.4byte	0x2512
-	.uleb128 0x24
-	.4byte	.LVL1187
-	.4byte	0x39f7
-	.uleb128 0x24
-	.4byte	.LVL1188
-	.4byte	0x3734
-	.uleb128 0x24
+	.4byte	__func__.7276
+	.uleb128 0x31
 	.4byte	.LVL1189
-	.4byte	0x3593
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1190
-	.4byte	0x4228
+	.4byte	0x41fd
+	.uleb128 0x31
+	.4byte	.LVL1191
+	.4byte	0x23a4
+	.uleb128 0x31
+	.4byte	.LVL1192
+	.4byte	0x2505
+	.uleb128 0x31
+	.4byte	.LVL1193
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1194
+	.4byte	0x373d
+	.uleb128 0x31
+	.4byte	.LVL1195
+	.4byte	0x3598
+	.uleb128 0x31
+	.4byte	.LVL1197
+	.4byte	0x4222
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x250d
+	.4byte	0x2500
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x24fd
-	.uleb128 0x4c
-	.4byte	.LASF426
+	.4byte	0x24f0
+	.uleb128 0x4d
+	.4byte	.LASF425
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa12
 	.4byte	0x64
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
+	.4byte	.LFB248
+	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x266c
-	.uleb128 0x4d
+	.4byte	0x265f
+	.uleb128 0x4e
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x9e2
-	.4byte	0x12cb
-	.4byte	.LLST177
-	.uleb128 0x44
-	.4byte	.LASF427
+	.2byte	0xa12
+	.4byte	0x12c0
+	.4byte	.LLST184
+	.uleb128 0x45
+	.4byte	.LASF426
 	.byte	0x2
-	.2byte	0x9e4
-	.4byte	0x30c
-	.4byte	.LLST178
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0xa14
+	.4byte	0x301
+	.4byte	.LLST185
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x9e5
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF358
+	.2byte	0xa15
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x9e5
-	.4byte	0x30c
-	.4byte	.LLST179
-	.uleb128 0x3e
+	.2byte	0xa15
+	.4byte	0x301
+	.4byte	.LLST186
+	.uleb128 0x3f
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x9e5
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF379
+	.2byte	0xa15
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x9e5
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF428
+	.2byte	0xa15
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF427
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa16
 	.4byte	0x64
-	.4byte	.LLST180
-	.uleb128 0x44
-	.4byte	.LASF429
+	.4byte	.LLST187
+	.uleb128 0x45
+	.4byte	.LASF428
 	.byte	0x2
-	.2byte	0x9e7
-	.4byte	0x30c
-	.4byte	.LLST181
-	.uleb128 0x3f
-	.4byte	.LASF430
+	.2byte	0xa17
+	.4byte	0x301
+	.4byte	.LLST188
+	.uleb128 0x40
+	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x9e8
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x267c
+	.2byte	0xa18
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x266f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7340
-	.uleb128 0x4e
-	.4byte	0x3414
-	.4byte	.LBB429
-	.4byte	.Ldebug_ranges0+0x178
+	.4byte	__func__.7255
+	.uleb128 0x4f
+	.4byte	0x3419
+	.4byte	.LBB452
+	.4byte	.Ldebug_ranges0+0x1e8
 	.byte	0x2
-	.2byte	0xa18
-	.4byte	0x25db
+	.2byte	0xa48
+	.4byte	0x25ce
 	.uleb128 0x2e
-	.4byte	0x342d
+	.4byte	0x3432
 	.uleb128 0x2e
-	.4byte	0x3421
-	.uleb128 0x24
-	.4byte	.LVL882
-	.4byte	0x5c7a
+	.4byte	0x3426
+	.uleb128 0x31
+	.4byte	.LVL875
+	.4byte	0x5c2e
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL851
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL855
+	.4byte	0x4037
+	.uleb128 0x31
+	.4byte	.LVL856
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL857
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL858
+	.4byte	0x41fd
+	.uleb128 0x31
+	.4byte	.LVL859
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL862
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL863
-	.4byte	0x4026
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL864
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL865
-	.4byte	0x2c52
-	.uleb128 0x24
-	.4byte	.LVL866
-	.4byte	0x4203
-	.uleb128 0x24
+	.4byte	0x3419
+	.uleb128 0x31
 	.4byte	.LVL867
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL868
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x1954
+	.uleb128 0x31
+	.4byte	.LVL869
+	.4byte	0x27b4
+	.uleb128 0x31
 	.4byte	.LVL870
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL871
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x4954
+	.uleb128 0x31
 	.4byte	.LVL872
-	.4byte	0x3414
-	.uleb128 0x24
-	.4byte	.LVL874
-	.4byte	0x195f
-	.uleb128 0x24
-	.4byte	.LVL876
-	.4byte	0x27b1
-	.uleb128 0x24
+	.4byte	0x41fd
+	.uleb128 0x31
 	.4byte	.LVL877
-	.4byte	0x4994
-	.uleb128 0x24
-	.4byte	.LVL879
-	.4byte	0x4203
-	.uleb128 0x24
-	.4byte	.LVL884
-	.4byte	0x4b52
-	.uleb128 0x24
-	.4byte	.LVL887
-	.4byte	0x6727
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL880
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x267c
+	.4byte	0x266f
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x18
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x266c
-	.uleb128 0x3b
-	.4byte	.LASF431
+	.4byte	0x265f
+	.uleb128 0x3c
+	.4byte	.LASF430
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa09
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x269f
-	.uleb128 0x3c
-	.4byte	.LASF406
+	.4byte	0x2692
+	.uleb128 0x3d
+	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x9d9
-	.4byte	0x30c
+	.2byte	0xa09
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF432
+	.uleb128 0x4d
+	.4byte	.LASF431
 	.byte	0x2
-	.2byte	0x98e
-	.4byte	0x30c
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
+	.2byte	0x9c0
+	.4byte	0x301
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2739
+	.4byte	0x273c
 	.uleb128 0x1f
-	.4byte	.LASF433
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x990
-	.4byte	0x30c
+	.2byte	0x9c2
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x3d
+	.uleb128 0x3e
+	.4byte	.LASF433
+	.byte	0x2
+	.2byte	0x9c3
+	.4byte	0x301
+	.uleb128 0x45
 	.4byte	.LASF434
 	.byte	0x2
-	.2byte	0x991
-	.4byte	0x30c
-	.uleb128 0x44
+	.2byte	0x9c4
+	.4byte	0x301
+	.4byte	.LLST66
+	.uleb128 0x45
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x992
-	.4byte	0x30c
-	.4byte	.LLST64
-	.uleb128 0x44
+	.2byte	0x9c5
+	.4byte	0x1210
+	.4byte	.LLST67
+	.uleb128 0x45
 	.4byte	.LASF436
 	.byte	0x2
-	.2byte	0x993
-	.4byte	0x121b
-	.4byte	.LLST65
-	.uleb128 0x44
+	.2byte	0x9c6
+	.4byte	0x301
+	.4byte	.LLST68
+	.uleb128 0x45
 	.4byte	.LASF437
 	.byte	0x2
-	.2byte	0x994
-	.4byte	0x30c
-	.4byte	.LLST66
-	.uleb128 0x44
-	.4byte	.LASF438
+	.2byte	0x9c7
+	.4byte	0x301
+	.4byte	.LLST69
+	.uleb128 0x3f
+	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9c8
 	.4byte	0x30c
-	.4byte	.LLST67
-	.uleb128 0x3e
-	.ascii	"i\000"
+	.uleb128 0x45
+	.4byte	.LASF114
 	.byte	0x2
-	.2byte	0x996
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL288
-	.4byte	0x2739
-	.uleb128 0x24
+	.2byte	0x9c9
+	.4byte	0x301
+	.4byte	.LLST70
+	.uleb128 0x31
 	.4byte	.LVL294
-	.4byte	0x2788
-	.uleb128 0x24
-	.4byte	.LVL299
-	.4byte	0x6727
+	.4byte	0x273c
+	.uleb128 0x31
+	.4byte	.LVL301
+	.4byte	0x278b
+	.uleb128 0x31
+	.4byte	.LVL307
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF439
+	.uleb128 0x3b
+	.4byte	.LASF438
 	.byte	0x2
-	.2byte	0x979
-	.4byte	0x30c
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
+	.2byte	0x9ab
+	.4byte	0x301
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2788
-	.uleb128 0x43
-	.4byte	.LASF94
+	.4byte	0x278b
+	.uleb128 0x44
+	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x979
-	.4byte	0x30c
-	.4byte	.LLST59
+	.2byte	0x9ab
+	.4byte	0x301
+	.4byte	.LLST61
 	.uleb128 0x1f
-	.4byte	.LASF440
+	.4byte	.LASF439
 	.byte	0x2
-	.2byte	0x97b
-	.4byte	0x30c
+	.2byte	0x9ad
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x3d
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x97c
-	.4byte	0x30c
 	.uleb128 0x3e
+	.4byte	.LASF392
+	.byte	0x2
+	.2byte	0x9ae
+	.4byte	0x301
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x97d
-	.4byte	0x30c
+	.2byte	0x9af
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF441
+	.uleb128 0x3b
+	.4byte	.LASF440
 	.byte	0x2
-	.2byte	0x970
-	.4byte	0x30c
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
+	.2byte	0x9a2
+	.4byte	0x301
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27b1
+	.4byte	0x27b4
 	.uleb128 0x1f
-	.4byte	.LASF435
+	.4byte	.LASF434
 	.byte	0x2
-	.2byte	0x972
-	.4byte	0x30c
+	.2byte	0x9a4
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF442
+	.uleb128 0x4d
+	.4byte	.LASF441
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x992
 	.4byte	0x64
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2812
-	.uleb128 0x43
-	.4byte	.LASF406
+	.4byte	0x2815
+	.uleb128 0x44
+	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x960
-	.4byte	0x30c
-	.4byte	.LLST58
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0x992
+	.4byte	0x301
+	.4byte	.LLST60
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x962
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF379
+	.2byte	0x994
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x962
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF166
+	.2byte	0x994
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF165
 	.byte	0x2
-	.2byte	0x963
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL196
-	.4byte	0x45c2
-	.uleb128 0x24
-	.4byte	.LVL197
-	.4byte	0x4af7
+	.2byte	0x995
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL200
+	.4byte	0x4582
+	.uleb128 0x31
+	.4byte	.LVL201
+	.4byte	0x4ab7
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF443
+	.uleb128 0x3c
+	.4byte	.LASF442
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x283c
-	.uleb128 0x3e
+	.4byte	0x283f
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x64
 	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF397
+	.uleb128 0x3e
+	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x928
-	.4byte	0x12cb
+	.2byte	0x95a
+	.4byte	0x12c0
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF444
+	.uleb128 0x50
+	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x8e2
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
+	.2byte	0x914
+	.4byte	.LFB241
+	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x28a7
-	.uleb128 0x50
+	.4byte	0x28aa
+	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x64
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x50
+	.uleb128 0x51
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0x317
+	.2byte	0x917
+	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3d
-	.4byte	.LASF445
+	.sleb128 -28
+	.uleb128 0x3e
+	.4byte	.LASF444
 	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x1d4c
-	.uleb128 0x24
-	.4byte	.LVL633
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL636
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL637
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL638
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL639
-	.4byte	0x6727
+	.2byte	0x918
+	.4byte	0x1d3f
+	.uleb128 0x31
+	.4byte	.LVL651
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL653
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL654
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL655
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL656
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF446
+	.uleb128 0x50
+	.4byte	.LASF445
 	.byte	0x2
-	.2byte	0x8ae
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
+	.2byte	0x8e0
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29c0
-	.uleb128 0x3e
+	.4byte	0x29c3
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8b0
-	.4byte	0x30c
-	.uleb128 0x51
+	.2byte	0x8e2
+	.4byte	0x301
+	.uleb128 0x52
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x8b1
-	.4byte	0x317
-	.4byte	.LLST142
+	.2byte	0x8e3
+	.4byte	0x30c
+	.4byte	.LLST149
 	.uleb128 0x1f
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x8b2
-	.4byte	0x317
+	.2byte	0x8e4
+	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x3e
+	.sleb128 -44
+	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x8b3
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF448
+	.2byte	0x8e5
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF447
 	.byte	0x2
-	.2byte	0x8b4
-	.4byte	0x30c
-	.4byte	.LLST143
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x29d0
+	.2byte	0x8e6
+	.4byte	0x301
+	.4byte	.LLST150
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7256
-	.uleb128 0x52
-	.4byte	.LBB390
-	.4byte	.LBE390-.LBB390
-	.4byte	0x2938
-	.uleb128 0x44
-	.4byte	.LASF94
+	.4byte	__func__.7170
+	.uleb128 0x53
+	.4byte	.LBB413
+	.4byte	.LBE413-.LBB413
+	.4byte	0x293b
+	.uleb128 0x45
+	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x8d1
-	.4byte	0x30c
-	.4byte	.LLST144
-	.uleb128 0x24
-	.4byte	.LVL652
-	.4byte	0x6727
+	.2byte	0x903
+	.4byte	0x301
+	.4byte	.LLST151
+	.uleb128 0x31
+	.4byte	.LVL671
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB387
-	.4byte	.LBE387-.LBB387
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB410
+	.4byte	.LBE410-.LBB410
 	.byte	0x2
-	.2byte	0x8b7
-	.4byte	0x2992
+	.2byte	0x8e9
+	.4byte	0x2995
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB388
-	.4byte	.LBE388-.LBB388
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB411
+	.4byte	.LBE411-.LBB411
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB389
-	.4byte	.LBE389-.LBB389
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB412
+	.4byte	.LBE412-.LBB412
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL648
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL667
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL647
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL653
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL655
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL656
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL658
-	.4byte	0x6727
+	.uleb128 0x31
+	.4byte	.LVL666
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL672
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL674
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL675
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL677
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x29d0
+	.4byte	0x29d3
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xd
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x29c0
-	.uleb128 0x4f
-	.4byte	.LASF449
+	.4byte	0x29c3
+	.uleb128 0x50
+	.4byte	.LASF448
 	.byte	0x2
-	.2byte	0x88f
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
+	.2byte	0x8c1
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2a7c
-	.uleb128 0x51
+	.4byte	0x2a7f
+	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x891
-	.4byte	0x30c
-	.4byte	.LLST224
-	.uleb128 0x51
+	.2byte	0x8c3
+	.4byte	0x301
+	.4byte	.LLST235
+	.uleb128 0x52
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x892
-	.4byte	0x317
-	.4byte	.LLST225
+	.2byte	0x8c4
+	.4byte	0x30c
+	.4byte	.LLST236
 	.uleb128 0x1f
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x893
-	.4byte	0x317
+	.2byte	0x8c5
+	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3e
+	.sleb128 -36
+	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x894
-	.4byte	0x30c
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x2a8c
+	.2byte	0x8c6
+	.4byte	0x301
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x2a8f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7240
-	.uleb128 0x24
-	.4byte	.LVL1169
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1170
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL1174
-	.4byte	0x392c
-	.uleb128 0x24
+	.4byte	__func__.7154
+	.uleb128 0x31
 	.4byte	.LVL1175
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL1177
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1178
-	.4byte	0x23b1
-	.uleb128 0x24
-	.4byte	.LVL1179
-	.4byte	0x39f7
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1176
+	.4byte	0x17c6
+	.uleb128 0x31
 	.4byte	.LVL1180
-	.4byte	0x3593
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1181
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1183
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1184
+	.4byte	0x23a4
+	.uleb128 0x31
+	.4byte	.LVL1185
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1186
+	.4byte	0x3598
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x2a8c
+	.4byte	0x2a8f
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x14
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x2a7c
-	.uleb128 0x4f
-	.4byte	.LASF450
+	.4byte	0x2a7f
+	.uleb128 0x50
+	.4byte	.LASF449
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
+	.2byte	0x89c
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b06
-	.uleb128 0x43
-	.4byte	.LASF397
+	.4byte	0x2b09
+	.uleb128 0x44
+	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	0x12cb
-	.4byte	.LLST205
+	.2byte	0x89c
+	.4byte	0x12c0
+	.4byte	.LLST213
 	.uleb128 0x1f
-	.4byte	.LASF451
+	.4byte	.LASF450
 	.byte	0x2
-	.2byte	0x86d
-	.4byte	0x338
+	.2byte	0x89e
+	.4byte	0x32d
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x3d
-	.4byte	.LASF381
+	.sleb128 -44
+	.uleb128 0x3e
+	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x86e
-	.4byte	0x1d4c
-	.uleb128 0x3d
-	.4byte	.LASF452
+	.2byte	0x89f
+	.4byte	0x1d3f
+	.uleb128 0x3e
+	.4byte	.LASF451
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x64
-	.uleb128 0x3d
-	.4byte	.LASF175
+	.uleb128 0x3e
+	.4byte	.LASF174
 	.byte	0x2
-	.2byte	0x870
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL1048
-	.4byte	0x23f1
-	.uleb128 0x24
-	.4byte	.LVL1049
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL1050
-	.4byte	0x233b
+	.2byte	0x8a1
+	.4byte	0x30c
+	.uleb128 0x31
+	.4byte	.LVL1054
+	.4byte	0x23e4
+	.uleb128 0x31
+	.4byte	.LVL1055
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL1056
+	.4byte	0x232e
 	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF453
+	.uleb128 0x55
+	.4byte	.LASF452
 	.byte	0x2
-	.2byte	0x851
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
+	.2byte	0x882
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b80
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB487
-	.4byte	.LBE487-.LBB487
+	.4byte	0x2b83
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB510
+	.4byte	.LBE510-.LBB510
 	.byte	0x2
-	.2byte	0x855
-	.4byte	0x2b76
+	.2byte	0x886
+	.4byte	0x2b79
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB488
-	.4byte	.LBE488-.LBB488
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB511
+	.4byte	.LBE511-.LBB511
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB489
-	.4byte	.LBE489-.LBB489
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB512
+	.4byte	.LBE512-.LBB512
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL1152
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL1157
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1151
-	.4byte	0x3781
+	.uleb128 0x31
+	.4byte	.LVL1156
+	.4byte	0x378a
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF455
+	.uleb128 0x46
+	.4byte	.LASF454
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
-	.uleb128 0x4c
-	.4byte	.LASF456
+	.uleb128 0x4d
+	.4byte	.LASF455
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x64
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c3d
-	.uleb128 0x44
-	.4byte	.LASF433
+	.4byte	0x2c40
+	.uleb128 0x45
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x814
-	.4byte	0x30c
-	.4byte	.LLST158
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0x845
+	.4byte	0x301
+	.4byte	.LLST165
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x814
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF379
+	.2byte	0x845
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x814
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF166
+	.2byte	0x845
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF165
 	.byte	0x2
-	.2byte	0x814
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF457
+	.2byte	0x845
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF456
 	.byte	0x2
-	.2byte	0x815
-	.4byte	0x30c
-	.4byte	.LLST159
-	.uleb128 0x44
-	.4byte	.LASF458
+	.2byte	0x846
+	.4byte	0x301
+	.4byte	.LLST166
+	.uleb128 0x45
+	.4byte	.LASF457
 	.byte	0x2
-	.2byte	0x815
-	.4byte	0x30c
-	.4byte	.LLST160
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x2c4d
+	.2byte	0x846
+	.4byte	0x301
+	.4byte	.LLST167
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x2c50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7215
-	.uleb128 0x24
+	.4byte	__func__.7129
+	.uleb128 0x31
+	.4byte	.LVL770
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL772
+	.4byte	0x4582
+	.uleb128 0x31
+	.4byte	.LVL773
+	.4byte	0x4ab7
+	.uleb128 0x31
 	.4byte	.LVL777
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL779
-	.4byte	0x45c2
-	.uleb128 0x24
+	.4byte	0x4222
+	.uleb128 0x31
 	.4byte	.LVL780
-	.4byte	0x4af7
-	.uleb128 0x24
-	.4byte	.LVL784
-	.4byte	0x4228
-	.uleb128 0x24
-	.4byte	.LVL787
-	.4byte	0x4203
-	.uleb128 0x24
-	.4byte	.LVL789
-	.4byte	0x6727
+	.4byte	0x41fd
+	.uleb128 0x31
+	.4byte	.LVL782
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x2c4d
+	.4byte	0x2c50
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x11
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x2c3d
-	.uleb128 0x3a
-	.4byte	.LASF459
+	.4byte	0x2c40
+	.uleb128 0x3b
+	.4byte	.LASF458
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x64
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
+	.4byte	.LFB234
+	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cbd
-	.uleb128 0x4d
+	.4byte	0x2cc0
+	.uleb128 0x4e
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x7fc
-	.4byte	0x12cb
-	.4byte	.LLST57
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0x82d
+	.4byte	0x12c0
+	.4byte	.LLST59
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x7fe
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF379
+	.2byte	0x82f
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x7fe
-	.4byte	0x30c
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x23ec
+	.2byte	0x82f
+	.4byte	0x301
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7194
-	.uleb128 0x24
-	.4byte	.LVL189
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL191
-	.4byte	0x45c2
-	.uleb128 0x24
-	.4byte	.LVL192
-	.4byte	0x4af7
+	.4byte	__func__.7108
+	.uleb128 0x31
+	.4byte	.LVL193
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL195
+	.4byte	0x4582
+	.uleb128 0x31
+	.4byte	.LVL196
+	.4byte	0x4ab7
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF460
+	.uleb128 0x3b
+	.4byte	.LASF459
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x64
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d0e
-	.uleb128 0x24
-	.4byte	.LVL1275
-	.4byte	0x2d34
-	.uleb128 0x24
-	.4byte	.LVL1276
-	.4byte	0x2d0e
-	.uleb128 0x24
-	.4byte	.LVL1277
-	.4byte	0x2d34
-	.uleb128 0x24
-	.4byte	.LVL1278
-	.4byte	0x2d0e
-	.uleb128 0x24
-	.4byte	.LVL1279
-	.4byte	0x1f7c
-	.uleb128 0x24
-	.4byte	.LVL1280
-	.4byte	0x233b
+	.4byte	0x2d11
+	.uleb128 0x31
+	.4byte	.LVL1283
+	.4byte	0x2d37
+	.uleb128 0x31
+	.4byte	.LVL1284
+	.4byte	0x2d11
+	.uleb128 0x31
+	.4byte	.LVL1285
+	.4byte	0x2d37
+	.uleb128 0x31
+	.4byte	.LVL1286
+	.4byte	0x2d11
+	.uleb128 0x31
+	.4byte	.LVL1287
+	.4byte	0x1f6f
+	.uleb128 0x31
+	.4byte	.LVL1288
+	.4byte	0x232e
 	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF496
+	.uleb128 0x56
+	.4byte	.LASF495
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x2d34
-	.uleb128 0x3c
-	.4byte	.LASF423
-	.byte	0x2
-	.2byte	0x7dc
-	.4byte	0x12cb
+	.4byte	0x2d37
 	.uleb128 0x3d
-	.4byte	.LASF379
+	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0x7de
-	.4byte	0x30c
+	.2byte	0x80d
+	.4byte	0x12c0
+	.uleb128 0x3e
+	.4byte	.LASF378
+	.byte	0x2
+	.2byte	0x80f
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF461
+	.uleb128 0x3b
+	.4byte	.LASF460
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x64
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x307b
-	.uleb128 0x43
-	.4byte	.LASF397
-	.byte	0x2
-	.2byte	0x677
-	.4byte	0x12cb
-	.4byte	.LLST190
+	.4byte	0x3082
 	.uleb128 0x44
+	.4byte	.LASF396
+	.byte	0x2
+	.2byte	0x6a8
+	.4byte	0x12c0
+	.4byte	.LLST197
+	.uleb128 0x45
+	.4byte	.LASF461
+	.byte	0x2
+	.2byte	0x6aa
+	.4byte	0x301
+	.4byte	.LLST198
+	.uleb128 0x45
 	.4byte	.LASF462
 	.byte	0x2
-	.2byte	0x679
-	.4byte	0x30c
-	.4byte	.LLST191
-	.uleb128 0x44
-	.4byte	.LASF463
+	.2byte	0x6aa
+	.4byte	0x301
+	.4byte	.LLST199
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x679
-	.4byte	0x30c
-	.4byte	.LLST192
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0x6ab
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF172
 	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF173
+	.2byte	0x6ab
+	.4byte	0x301
+	.4byte	.LLST200
+	.uleb128 0x3e
+	.4byte	.LASF170
 	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF171
+	.2byte	0x6ab
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF463
 	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x30c
-	.uleb128 0x44
+	.2byte	0x6ac
+	.4byte	0x301
+	.4byte	.LLST201
+	.uleb128 0x45
 	.4byte	.LASF464
 	.byte	0x2
-	.2byte	0x67b
-	.4byte	0x30c
-	.4byte	.LLST193
-	.uleb128 0x44
-	.4byte	.LASF465
-	.byte	0x2
-	.2byte	0x67b
-	.4byte	0x30c
-	.4byte	.LLST194
-	.uleb128 0x3d
-	.4byte	.LASF379
+	.2byte	0x6ac
+	.4byte	0x301
+	.4byte	.LLST202
+	.uleb128 0x3e
+	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x67c
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF466
+	.2byte	0x6ad
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF465
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x64
-	.4byte	.LLST195
-	.uleb128 0x3d
-	.4byte	.LASF467
+	.4byte	.LLST203
+	.uleb128 0x3e
+	.4byte	.LASF466
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x64
-	.uleb128 0x3d
-	.4byte	.LASF358
+	.uleb128 0x3e
+	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x67e
-	.4byte	0x30c
-	.uleb128 0x51
+	.2byte	0x6af
+	.4byte	0x301
+	.uleb128 0x52
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x67e
-	.4byte	0x30c
-	.4byte	.LLST196
-	.uleb128 0x3e
+	.2byte	0x6af
+	.4byte	0x301
+	.4byte	.LLST204
+	.uleb128 0x3f
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x67e
-	.4byte	0x30c
-	.uleb128 0x51
+	.2byte	0x6af
+	.4byte	0x301
+	.uleb128 0x52
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x67f
-	.4byte	0x317
-	.4byte	.LLST197
-	.uleb128 0x44
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x67f
-	.4byte	0x317
-	.4byte	.LLST198
-	.uleb128 0x44
-	.4byte	.LASF407
+	.2byte	0x6b0
+	.4byte	0x30c
+	.4byte	.LLST205
+	.uleb128 0x45
+	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x67f
-	.4byte	0x317
-	.4byte	.LLST199
-	.uleb128 0x44
-	.4byte	.LASF399
+	.2byte	0x6b0
+	.4byte	0x30c
+	.4byte	.LLST206
+	.uleb128 0x45
+	.4byte	.LASF406
 	.byte	0x2
-	.2byte	0x67f
-	.4byte	0x317
-	.4byte	.LLST200
-	.uleb128 0x44
-	.4byte	.LASF413
+	.2byte	0x6b0
+	.4byte	0x30c
+	.4byte	.LLST207
+	.uleb128 0x45
+	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b0
 	.4byte	0x30c
-	.4byte	.LLST201
-	.uleb128 0x3d
+	.4byte	.LLST208
+	.uleb128 0x45
+	.4byte	.LASF412
+	.byte	0x2
+	.2byte	0x6b1
+	.4byte	0x301
+	.4byte	.LLST209
+	.uleb128 0x3e
+	.4byte	.LASF467
+	.byte	0x2
+	.2byte	0x6b1
+	.4byte	0x301
+	.uleb128 0x45
 	.4byte	.LASF468
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b2
 	.4byte	0x30c
-	.uleb128 0x44
+	.4byte	.LLST210
+	.uleb128 0x3e
 	.4byte	.LASF469
 	.byte	0x2
-	.2byte	0x681
-	.4byte	0x317
-	.4byte	.LLST202
-	.uleb128 0x3d
+	.2byte	0x6b3
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x6b4
+	.4byte	0x1d3f
+	.uleb128 0x3e
 	.4byte	.LASF470
 	.byte	0x2
-	.2byte	0x682
+	.2byte	0x6b5
 	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF381
-	.byte	0x2
-	.2byte	0x683
-	.4byte	0x1d4c
-	.uleb128 0x3d
-	.4byte	.LASF471
-	.byte	0x2
-	.2byte	0x684
-	.4byte	0x317
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x308b
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x3092
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7137
-	.uleb128 0x47
-	.4byte	.LASF473
+	.4byte	__func__.7051
+	.uleb128 0x48
+	.4byte	.LASF472
 	.byte	0x2
-	.2byte	0x713
-	.4byte	.L1118
-	.uleb128 0x47
-	.4byte	.LASF403
+	.2byte	0x744
+	.4byte	.L1140
+	.uleb128 0x48
+	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0x71b
-	.4byte	.L1130
-	.uleb128 0x47
+	.2byte	0x74c
+	.4byte	.L1152
+	.uleb128 0x48
+	.4byte	.LASF473
+	.byte	0x2
+	.2byte	0x7ff
+	.4byte	.L1160
+	.uleb128 0x40
 	.4byte	.LASF474
 	.byte	0x2
-	.2byte	0x7ce
-	.4byte	.L1136
-	.uleb128 0x3f
+	.2byte	0x809
+	.uleb128 0x53
+	.4byte	.LBB473
+	.4byte	.LBE473-.LBB473
+	.4byte	0x2f11
+	.uleb128 0x3e
 	.4byte	.LASF475
 	.byte	0x2
-	.2byte	0x7d8
-	.uleb128 0x52
-	.4byte	.LBB450
-	.4byte	.LBE450-.LBB450
-	.4byte	0x2f0a
-	.uleb128 0x3d
+	.2byte	0x71c
+	.4byte	0x30c
+	.uleb128 0x3e
 	.4byte	.LASF476
 	.byte	0x2
-	.2byte	0x6eb
-	.4byte	0x317
-	.uleb128 0x3d
+	.2byte	0x71d
+	.4byte	0x30c
+	.uleb128 0x31
+	.4byte	.LVL971
+	.4byte	0x1af8
+	.byte	0
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x230
+	.4byte	0x2f83
+	.uleb128 0x45
 	.4byte	.LASF477
 	.byte	0x2
-	.2byte	0x6ec
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL975
-	.4byte	0x1b05
-	.byte	0
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x1c0
-	.4byte	0x2f7c
-	.uleb128 0x44
+	.2byte	0x777
+	.4byte	0x30c
+	.4byte	.LLST211
+	.uleb128 0x45
 	.4byte	.LASF478
 	.byte	0x2
-	.2byte	0x746
-	.4byte	0x317
-	.4byte	.LLST203
-	.uleb128 0x44
-	.4byte	.LASF479
-	.byte	0x2
-	.2byte	0x747
-	.4byte	0x317
-	.4byte	.LLST204
-	.uleb128 0x24
+	.2byte	0x778
+	.4byte	0x30c
+	.4byte	.LLST212
+	.uleb128 0x31
 	.4byte	.LVL1013
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1015
-	.4byte	0x233b
-	.uleb128 0x24
-	.4byte	.LVL1020
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1022
-	.4byte	0x4517
-	.uleb128 0x24
-	.4byte	.LVL1024
-	.4byte	0x3090
-	.uleb128 0x24
-	.4byte	.LVL1026
-	.4byte	0x1b05
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1016
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1021
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1023
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL1025
+	.4byte	0x3097
+	.uleb128 0x31
 	.4byte	.LVL1028
-	.4byte	0x4517
-	.uleb128 0x24
-	.4byte	.LVL1029
-	.4byte	0x4517
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1030
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL1031
+	.4byte	0x44d7
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LBB454
-	.4byte	.LBE454-.LBB454
-	.4byte	0x2fbd
-	.uleb128 0x3d
-	.4byte	.LASF480
-	.byte	0x2
-	.2byte	0x785
-	.4byte	0x317
-	.uleb128 0x3d
+	.uleb128 0x53
+	.4byte	.LBB477
+	.4byte	.LBE477-.LBB477
+	.4byte	0x2fc4
+	.uleb128 0x3e
 	.4byte	.LASF479
 	.byte	0x2
-	.2byte	0x786
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL1033
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1034
-	.4byte	0x4517
-	.uleb128 0x24
-	.4byte	.LVL1035
-	.4byte	0x392c
+	.2byte	0x7b6
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF478
+	.byte	0x2
+	.2byte	0x7b7
+	.4byte	0x30c
+	.uleb128 0x31
+	.4byte	.LVL1036
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1037
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL1038
+	.4byte	0x3939
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL941
-	.4byte	0x447f
-	.uleb128 0x24
-	.4byte	.LVL943
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL949
-	.4byte	0x458e
-	.uleb128 0x24
-	.4byte	.LVL955
-	.4byte	0x3147
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL932
+	.4byte	0x443f
+	.uleb128 0x31
+	.4byte	.LVL934
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL939
+	.4byte	0x454e
+	.uleb128 0x31
+	.4byte	.LVL947
+	.4byte	0x314e
+	.uleb128 0x31
+	.4byte	.LVL952
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL954
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL958
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL960
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL964
-	.4byte	0x4517
-	.uleb128 0x24
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL974
+	.4byte	0x36ab
+	.uleb128 0x31
 	.4byte	.LVL979
-	.4byte	0x36a4
-	.uleb128 0x24
-	.4byte	.LVL982
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL991
-	.4byte	0x458e
-	.uleb128 0x24
-	.4byte	.LVL1000
-	.4byte	0x233b
-	.uleb128 0x24
-	.4byte	.LVL1004
-	.4byte	0x4517
-	.uleb128 0x24
-	.4byte	.LVL1009
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL988
+	.4byte	0x454e
+	.uleb128 0x31
+	.4byte	.LVL998
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1003
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL1008
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1011
-	.4byte	0x392c
-	.uleb128 0x24
+	.4byte	0x3939
+	.uleb128 0x31
 	.4byte	.LVL1012
-	.4byte	0x4517
-	.uleb128 0x24
-	.4byte	.LVL1016
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL1018
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1031
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1032
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL1037
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1039
-	.4byte	0x233b
+	.4byte	0x44d7
+	.uleb128 0x31
+	.4byte	.LVL1017
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1019
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1034
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1035
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1040
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1043
+	.4byte	0x232e
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x308b
+	.4byte	0x3092
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x15
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x307b
-	.uleb128 0x4f
-	.4byte	.LASF481
+	.4byte	0x3082
+	.uleb128 0x50
+	.4byte	.LASF480
 	.byte	0x2
-	.2byte	0x65b
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
+	.2byte	0x68c
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3147
-	.uleb128 0x4d
+	.4byte	0x314e
+	.uleb128 0x4e
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x65b
-	.4byte	0x317
-	.4byte	.LLST136
-	.uleb128 0x43
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x65b
-	.4byte	0x317
-	.4byte	.LLST137
+	.2byte	0x68c
+	.4byte	0x30c
+	.4byte	.LLST142
 	.uleb128 0x44
-	.4byte	.LASF413
+	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68c
 	.4byte	0x30c
-	.4byte	.LLST138
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x23ec
+	.4byte	.LLST143
+	.uleb128 0x45
+	.4byte	.LASF412
+	.byte	0x2
+	.2byte	0x68e
+	.4byte	0x301
+	.4byte	.LLST144
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7103
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x128
-	.4byte	0x3134
-	.uleb128 0x3e
+	.4byte	__func__.7017
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x198
+	.4byte	0x313b
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x661
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF393
+	.2byte	0x692
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF392
 	.byte	0x2
-	.2byte	0x662
-	.4byte	0x30c
-	.4byte	.LLST139
-	.uleb128 0x44
-	.4byte	.LASF94
+	.2byte	0x693
+	.4byte	0x301
+	.4byte	.LLST145
+	.uleb128 0x45
+	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x663
-	.4byte	0x30c
-	.4byte	.LLST140
-	.uleb128 0x24
-	.4byte	.LVL621
-	.4byte	0x4086
-	.uleb128 0x24
-	.4byte	.LVL622
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL623
-	.4byte	0x4203
+	.2byte	0x694
+	.4byte	0x301
+	.4byte	.LLST146
+	.uleb128 0x31
+	.4byte	.LVL641
+	.4byte	0x4097
+	.uleb128 0x31
+	.4byte	.LVL642
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL643
+	.4byte	0x41fd
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL615
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL630
-	.4byte	0x392c
+	.uleb128 0x31
+	.4byte	.LVL636
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL648
+	.4byte	0x3939
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF482
+	.uleb128 0x50
+	.4byte	.LASF481
 	.byte	0x2
-	.2byte	0x647
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
+	.2byte	0x678
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3198
-	.uleb128 0x56
-	.4byte	.LASF397
+	.4byte	0x319f
+	.uleb128 0x57
+	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x12cb
+	.2byte	0x678
+	.4byte	0x12c0
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF171
+	.uleb128 0x44
+	.4byte	.LASF170
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x30c
-	.4byte	.LLST55
-	.uleb128 0x43
-	.4byte	.LASF173
+	.2byte	0x678
+	.4byte	0x301
+	.4byte	.LLST57
+	.uleb128 0x44
+	.4byte	.LASF172
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x30c
-	.4byte	.LLST56
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.2byte	0x678
+	.4byte	0x301
+	.4byte	.LLST58
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x649
-	.4byte	0x30c
+	.2byte	0x67a
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF483
+	.uleb128 0x3b
+	.4byte	.LASF482
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x64
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31c5
-	.uleb128 0x24
-	.4byte	.LVL766
-	.4byte	0x31c5
-	.uleb128 0x24
-	.4byte	.LVL767
-	.4byte	0x321e
+	.4byte	0x31cc
+	.uleb128 0x31
+	.4byte	.LVL759
+	.4byte	0x31cc
+	.uleb128 0x31
+	.4byte	.LVL760
+	.4byte	0x3225
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF484
+	.uleb128 0x50
+	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x627
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
+	.2byte	0x658
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31fa
-	.uleb128 0x3d
-	.4byte	.LASF120
+	.4byte	0x3201
+	.uleb128 0x3e
+	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x629
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL764
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL765
-	.4byte	0x17d1
+	.2byte	0x65a
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL757
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL758
+	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF485
+	.uleb128 0x3b
+	.4byte	.LASF484
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x64
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x321e
-	.uleb128 0x24
-	.4byte	.LVL763
-	.4byte	0x321e
+	.4byte	0x3225
+	.uleb128 0x31
+	.4byte	.LVL756
+	.4byte	0x3225
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF486
+	.uleb128 0x3b
+	.4byte	.LASF485
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x64
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x332e
-	.uleb128 0x43
+	.4byte	0x3333
+	.uleb128 0x44
+	.4byte	.LASF486
+	.byte	0x2
+	.2byte	0x5ea
+	.4byte	0x3333
+	.4byte	.LLST158
+	.uleb128 0x45
 	.4byte	.LASF487
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x332e
-	.4byte	.LLST150
-	.uleb128 0x44
+	.2byte	0x5ec
+	.4byte	0x322
+	.4byte	.LLST159
+	.uleb128 0x3e
+	.4byte	.LASF85
+	.byte	0x2
+	.2byte	0x5ec
+	.4byte	0x322
+	.uleb128 0x45
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x5bb
-	.4byte	0x32d
-	.4byte	.LLST151
-	.uleb128 0x3d
-	.4byte	.LASF86
+	.2byte	0x5ed
+	.4byte	0x322
+	.4byte	.LLST160
+	.uleb128 0x3e
+	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x5bb
-	.4byte	0x32d
-	.uleb128 0x44
+	.2byte	0x5ee
+	.4byte	0x301
+	.uleb128 0x45
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x5bc
-	.4byte	0x32d
-	.4byte	.LLST152
-	.uleb128 0x3d
-	.4byte	.LASF120
-	.byte	0x2
-	.2byte	0x5bd
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF490
+	.2byte	0x5ef
+	.4byte	0x539
+	.4byte	.LLST161
+	.uleb128 0x45
+	.4byte	.LASF98
 	.byte	0x2
-	.2byte	0x5be
-	.4byte	0x544
-	.4byte	.LLST153
-	.uleb128 0x44
+	.2byte	0x5f0
+	.4byte	0x630
+	.4byte	.LLST162
+	.uleb128 0x45
 	.4byte	.LASF99
 	.byte	0x2
-	.2byte	0x5bf
-	.4byte	0x63b
-	.4byte	.LLST154
-	.uleb128 0x44
-	.4byte	.LASF100
+	.2byte	0x5f1
+	.4byte	0x539
+	.4byte	.LLST163
+	.uleb128 0x1f
+	.4byte	.LASF95
 	.byte	0x2
-	.2byte	0x5c0
-	.4byte	0x544
-	.4byte	.LLST155
-	.uleb128 0x44
-	.4byte	.LASF96
+	.2byte	0x5f2
+	.4byte	0x301
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x45
+	.4byte	.LASF490
 	.byte	0x2
-	.2byte	0x5c1
-	.4byte	0x30c
-	.4byte	.LLST156
-	.uleb128 0x44
+	.2byte	0x5f3
+	.4byte	0x301
+	.4byte	.LLST164
+	.uleb128 0x3e
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x5c2
-	.4byte	0x30c
-	.4byte	.LLST157
-	.uleb128 0x3d
-	.4byte	.LASF492
-	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x3334
-	.uleb128 0x24
-	.4byte	.LVL716
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL724
-	.4byte	0x447f
-	.uleb128 0x24
-	.4byte	.LVL734
-	.4byte	0x3dce
-	.uleb128 0x24
-	.4byte	.LVL735
-	.4byte	0x3d76
-	.uleb128 0x24
+	.2byte	0x5f4
+	.4byte	0x3339
+	.uleb128 0x31
+	.4byte	.LVL721
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL729
+	.4byte	0x443f
+	.uleb128 0x31
 	.4byte	.LVL736
-	.4byte	0x3cab
-	.uleb128 0x24
+	.4byte	0x3ddf
+	.uleb128 0x31
 	.4byte	.LVL737
-	.4byte	0x3cab
-	.uleb128 0x24
+	.4byte	0x3d87
+	.uleb128 0x31
+	.4byte	.LVL738
+	.4byte	0x3cbc
+	.uleb128 0x31
+	.4byte	.LVL739
+	.4byte	0x3cbc
+	.uleb128 0x31
 	.4byte	.LVL741
-	.4byte	0x1b05
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL747
+	.4byte	0x1af8
+	.uleb128 0x31
 	.4byte	.LVL750
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL754
-	.4byte	0x1b05
+	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x592
+	.4byte	0x587
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x7c3
-	.uleb128 0x4c
-	.4byte	.LASF493
+	.4byte	0x7b8
+	.uleb128 0x4d
+	.4byte	.LASF492
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x64
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x33e9
-	.uleb128 0x44
-	.4byte	.LASF489
+	.4byte	0x33ee
+	.uleb128 0x45
+	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x551
-	.4byte	0x32d
-	.4byte	.LLST286
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.2byte	0x582
+	.4byte	0x322
+	.4byte	.LLST297
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7040
-	.uleb128 0x24
-	.4byte	.LVL1561
-	.4byte	0x17d1
-	.uleb128 0x24
+	.4byte	__func__.6954
+	.uleb128 0x31
 	.4byte	.LVL1562
-	.4byte	0x447f
-	.uleb128 0x24
-	.4byte	.LVL1564
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x17c6
+	.uleb128 0x31
 	.4byte	.LVL1565
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x443f
+	.uleb128 0x31
 	.4byte	.LVL1567
-	.4byte	0x177a
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1568
-	.4byte	0x177a
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1569
-	.4byte	0x177a
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1570
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1571
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1572
-	.4byte	0x2c52
-	.uleb128 0x24
-	.4byte	.LVL1573
-	.4byte	0x2c52
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1574
-	.4byte	0x2c52
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1575
-	.4byte	0x2c52
-	.uleb128 0x24
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1576
+	.4byte	0x2c55
+	.uleb128 0x31
 	.4byte	.LVL1577
-	.4byte	0x1b05
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1578
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1580
+	.4byte	0x1af8
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF494
+	.uleb128 0x3b
+	.4byte	.LASF493
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x64
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3414
-	.uleb128 0x43
-	.4byte	.LASF495
+	.4byte	0x3419
+	.uleb128 0x44
+	.4byte	.LASF494
 	.byte	0x2
-	.2byte	0x54a
-	.4byte	0x30c
-	.4byte	.LLST54
+	.2byte	0x57b
+	.4byte	0x301
+	.4byte	.LLST56
 	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF497
+	.uleb128 0x56
+	.4byte	.LASF496
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x343a
-	.uleb128 0x3c
-	.4byte	.LASF495
+	.4byte	0x343f
+	.uleb128 0x3d
+	.4byte	.LASF494
 	.byte	0x2
-	.2byte	0x542
-	.4byte	0x30c
-	.uleb128 0x3c
-	.4byte	.LASF373
+	.2byte	0x573
+	.4byte	0x301
+	.uleb128 0x3d
+	.4byte	.LASF372
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x64
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF499
+	.uleb128 0x43
+	.4byte	.LASF498
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x64
 	.byte	0x1
-	.uleb128 0x3a
-	.4byte	.LASF500
+	.uleb128 0x3b
+	.4byte	.LASF499
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x64
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3593
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.4byte	0x3598
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x448
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF501
+	.2byte	0x479
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF500
 	.byte	0x2
-	.2byte	0x448
-	.4byte	0x30c
-	.4byte	.LLST147
-	.uleb128 0x3d
-	.4byte	.LASF179
+	.2byte	0x479
+	.4byte	0x301
+	.4byte	.LLST155
+	.uleb128 0x3e
+	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x449
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF358
+	.2byte	0x47a
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x449
-	.4byte	0x30c
-	.4byte	.LLST148
-	.uleb128 0x3e
+	.2byte	0x47a
+	.4byte	0x301
+	.4byte	.LLST156
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x44a
-	.4byte	0x32d
-	.uleb128 0x3e
+	.2byte	0x47b
+	.4byte	0x322
+	.uleb128 0x3f
 	.ascii	"j\000"
 	.byte	0x2
-	.2byte	0x44a
-	.4byte	0x32d
-	.uleb128 0x44
-	.4byte	.LASF502
+	.2byte	0x47b
+	.4byte	0x322
+	.uleb128 0x45
+	.4byte	.LASF501
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x3334
-	.4byte	.LLST149
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x29d0
+	.2byte	0x47c
+	.4byte	0x3339
+	.4byte	.LLST157
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6983
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB396
-	.4byte	.LBE396-.LBB396
+	.4byte	__func__.6897
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB419
+	.4byte	.LBE419-.LBB419
 	.byte	0x2
-	.2byte	0x453
-	.4byte	0x351d
+	.2byte	0x484
+	.4byte	0x3522
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB397
-	.4byte	.LBE397-.LBB397
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB420
+	.4byte	.LBE420-.LBB420
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB398
-	.4byte	.LBE398-.LBB398
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB421
+	.4byte	.LBE421-.LBB421
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
+	.4byte	0x6201
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL668
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL669
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL670
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL671
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL678
-	.4byte	0x45c2
-	.uleb128 0x24
-	.4byte	.LVL679
-	.4byte	0x4af7
-	.uleb128 0x24
-	.4byte	.LVL694
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL698
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL699
-	.4byte	0x4367
-	.uleb128 0x24
-	.4byte	.LVL700
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL701
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL702
-	.4byte	0x4367
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL688
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL689
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL690
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL691
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL695
+	.4byte	0x4582
+	.uleb128 0x31
+	.4byte	.LVL696
+	.4byte	0x4ab7
+	.uleb128 0x31
+	.4byte	.LVL703
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL704
+	.4byte	0x1af8
+	.uleb128 0x31
 	.4byte	.LVL705
-	.4byte	0x6727
+	.4byte	0x436d
+	.uleb128 0x31
+	.4byte	.LVL706
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL707
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL708
+	.4byte	0x436d
+	.uleb128 0x31
+	.4byte	.LVL709
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF503
+	.uleb128 0x3b
+	.4byte	.LASF502
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x64
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3652
-	.uleb128 0x1f
-	.4byte	.LASF87
+	.4byte	0x3659
+	.uleb128 0x45
+	.4byte	.LASF86
 	.byte	0x2
-	.2byte	0x3ed
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3d
+	.2byte	0x41e
+	.4byte	0x301
+	.4byte	.LLST233
+	.uleb128 0x3e
+	.4byte	.LASF503
+	.byte	0x2
+	.2byte	0x41f
+	.4byte	0x3659
+	.uleb128 0x45
 	.4byte	.LASF504
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x3652
-	.uleb128 0x44
+	.2byte	0x420
+	.4byte	0x301
+	.4byte	.LLST234
+	.uleb128 0x40
 	.4byte	.LASF505
 	.byte	0x2
-	.2byte	0x3ef
-	.4byte	0x30c
-	.4byte	.LLST223
-	.uleb128 0x3f
-	.4byte	.LASF506
-	.byte	0x2
-	.2byte	0x41c
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.2byte	0x44d
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6961
-	.uleb128 0x24
-	.4byte	.LVL1154
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL1156
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1157
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1158
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1159
-	.4byte	0x3710
-	.uleb128 0x24
+	.4byte	__func__.6875
+	.uleb128 0x31
 	.4byte	.LVL1160
-	.4byte	0x19f5
-	.uleb128 0x24
+	.4byte	0x17c6
+	.uleb128 0x31
 	.4byte	.LVL1161
-	.4byte	0x424d
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1162
-	.4byte	0x19f5
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1163
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1164
+	.4byte	0x3719
+	.uleb128 0x31
+	.4byte	.LVL1165
+	.4byte	0x19ea
+	.uleb128 0x31
 	.4byte	.LVL1166
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x4247
+	.uleb128 0x31
 	.4byte	.LVL1167
-	.4byte	0x4367
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL1168
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1171
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1172
+	.4byte	0x436d
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x81b
-	.uleb128 0x55
-	.4byte	.LASF507
+	.4byte	0x810
+	.uleb128 0x56
+	.4byte	.LASF506
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x36a4
+	.4byte	0x36ab
 	.uleb128 0x28
-	.uleb128 0x3e
+	.uleb128 0x3f
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x3b7
-	.4byte	0x317
-	.uleb128 0x3e
+	.2byte	0x3e8
+	.4byte	0x30c
+	.uleb128 0x3f
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x3b8
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF508
+	.2byte	0x3e9
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF507
 	.byte	0x2
-	.2byte	0x3b9
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF451
+	.2byte	0x3ea
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF450
 	.byte	0x2
-	.2byte	0x3ba
-	.4byte	0x338
-	.uleb128 0x3d
-	.4byte	.LASF381
+	.2byte	0x3eb
+	.4byte	0x32d
+	.uleb128 0x3e
+	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x3bb
-	.4byte	0x1d4c
+	.2byte	0x3ec
+	.4byte	0x1d3f
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF509
+	.uleb128 0x50
+	.4byte	.LASF508
 	.byte	0x2
-	.2byte	0x380
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
+	.2byte	0x3b1
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3710
-	.uleb128 0x56
-	.4byte	.LASF487
+	.4byte	0x3719
+	.uleb128 0x44
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x332e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x51
+	.2byte	0x3b1
+	.4byte	0x3333
+	.4byte	.LLST152
+	.uleb128 0x52
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x382
-	.4byte	0x317
-	.4byte	.LLST145
-	.uleb128 0x3d
-	.4byte	.LASF106
-	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b3
 	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF490
+	.4byte	.LLST153
+	.uleb128 0x3e
+	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x384
-	.4byte	0x544
-	.4byte	.LLST146
-	.uleb128 0x24
-	.4byte	.LVL663
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL664
-	.4byte	0x3ac7
+	.2byte	0x3b4
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF489
+	.byte	0x2
+	.2byte	0x3b5
+	.4byte	0x539
+	.4byte	.LLST154
+	.uleb128 0x31
+	.4byte	.LVL682
+	.4byte	0x1af8
 	.uleb128 0x24
-	.4byte	.LVL667
-	.4byte	0x17d1
+	.4byte	.LVL684
+	.4byte	0x3ad6
+	.uleb128 0x31
+	.4byte	.LVL686
+	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF510
+	.uleb128 0x56
+	.4byte	.LASF509
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x3734
-	.uleb128 0x3c
-	.4byte	.LASF184
+	.4byte	0x373d
+	.uleb128 0x3d
+	.4byte	.LASF183
 	.byte	0x2
-	.2byte	0x371
-	.4byte	0x317
-	.uleb128 0x3e
+	.2byte	0x3a2
+	.4byte	0x30c
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x373
-	.4byte	0x30c
+	.2byte	0x3a4
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF511
+	.uleb128 0x3b
+	.4byte	.LASF510
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x64
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3781
-	.uleb128 0x43
-	.4byte	.LASF512
-	.byte	0x2
-	.2byte	0x35c
-	.4byte	0x317
-	.4byte	.LLST216
+	.4byte	0x378a
 	.uleb128 0x44
-	.4byte	.LASF513
+	.4byte	.LASF511
 	.byte	0x2
-	.2byte	0x35e
-	.4byte	0x317
-	.4byte	.LLST217
-	.uleb128 0x24
-	.4byte	.LVL1134
-	.4byte	0x3855
-	.uleb128 0x24
+	.2byte	0x38d
+	.4byte	0x30c
+	.4byte	.LLST225
+	.uleb128 0x45
+	.4byte	.LASF512
+	.byte	0x2
+	.2byte	0x38f
+	.4byte	0x30c
+	.4byte	.LLST226
+	.uleb128 0x31
 	.4byte	.LVL1135
-	.4byte	0x2b80
+	.4byte	0x3860
+	.uleb128 0x31
+	.4byte	.LVL1136
+	.4byte	0x2b83
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF514
+	.uleb128 0x4d
+	.4byte	.LASF513
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0x317
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
+	.2byte	0x367
+	.4byte	0x30c
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x384f
-	.uleb128 0x43
+	.4byte	0x385a
+	.uleb128 0x44
+	.4byte	.LASF514
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0x30c
+	.4byte	.LLST227
+	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0x317
-	.4byte	.LLST218
-	.uleb128 0x43
+	.2byte	0x367
+	.4byte	0x30c
+	.4byte	.LLST228
+	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0x317
-	.4byte	.LLST219
-	.uleb128 0x43
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x336
-	.4byte	0x384f
-	.4byte	.LLST220
-	.uleb128 0x51
+	.2byte	0x367
+	.4byte	0x385a
+	.4byte	.LLST229
+	.uleb128 0x52
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x338
-	.4byte	0x30c
-	.4byte	.LLST221
-	.uleb128 0x3d
-	.4byte	.LASF518
+	.2byte	0x369
+	.4byte	0x301
+	.4byte	.LLST230
+	.uleb128 0x3e
+	.4byte	.LASF517
 	.byte	0x2
-	.2byte	0x338
-	.4byte	0x30c
-	.uleb128 0x50
+	.2byte	0x369
+	.4byte	0x301
+	.uleb128 0x52
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x339
-	.4byte	0x317
-	.uleb128 0x1
-	.byte	0x5a
+	.2byte	0x36a
+	.4byte	0x30c
+	.4byte	.LLST231
 	.uleb128 0x1f
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x2
-	.2byte	0x33a
-	.4byte	0x317
+	.2byte	0x36b
+	.4byte	0x30c
 	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x50
+	.byte	0x59
+	.uleb128 0x51
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x33b
-	.4byte	0x338
+	.2byte	0x36c
+	.4byte	0x32d
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -132
-	.uleb128 0x44
-	.4byte	.LASF520
+	.sleb128 -124
+	.uleb128 0x45
+	.4byte	.LASF519
 	.byte	0x2
-	.2byte	0x33c
-	.4byte	0x317
-	.4byte	.LLST222
+	.2byte	0x36d
+	.4byte	0x30c
+	.4byte	.LLST232
 	.uleb128 0x1f
-	.4byte	.LASF354
+	.4byte	.LASF353
 	.byte	0x2
-	.2byte	0x33d
-	.4byte	0x194f
+	.2byte	0x36e
+	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -112
-	.uleb128 0x24
-	.4byte	.LVL1145
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1146
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1147
-	.4byte	0x17d1
+	.sleb128 -104
+	.uleb128 0x31
+	.4byte	.LVL1148
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1149
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1151
+	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x301
-	.uleb128 0x4c
-	.4byte	.LASF521
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x317
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
+	.4byte	0x2f6
+	.uleb128 0x4d
+	.4byte	.LASF520
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0x30c
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x392c
-	.uleb128 0x43
+	.4byte	0x3939
+	.uleb128 0x44
+	.4byte	.LASF514
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0x30c
+	.4byte	.LLST219
+	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0x317
-	.4byte	.LLST211
-	.uleb128 0x43
+	.2byte	0x342
+	.4byte	0x30c
+	.4byte	.LLST220
+	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0x317
-	.4byte	.LLST212
-	.uleb128 0x43
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x384f
-	.4byte	.LLST213
-	.uleb128 0x51
+	.2byte	0x342
+	.4byte	0x385a
+	.4byte	.LLST221
+	.uleb128 0x52
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x313
-	.4byte	0x30c
-	.4byte	.LLST214
-	.uleb128 0x3d
-	.4byte	.LASF518
+	.2byte	0x344
+	.4byte	0x301
+	.4byte	.LLST222
+	.uleb128 0x3e
+	.4byte	.LASF517
 	.byte	0x2
-	.2byte	0x313
-	.4byte	0x30c
-	.uleb128 0x51
+	.2byte	0x344
+	.4byte	0x301
+	.uleb128 0x52
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x314
-	.4byte	0x317
-	.4byte	.LLST215
+	.2byte	0x345
+	.4byte	0x30c
+	.4byte	.LLST223
 	.uleb128 0x1f
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x2
-	.2byte	0x315
-	.4byte	0x317
+	.2byte	0x346
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x50
+	.uleb128 0x51
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x316
-	.4byte	0x338
+	.2byte	0x347
+	.4byte	0x32d
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -132
-	.uleb128 0x1f
-	.4byte	.LASF520
+	.sleb128 -124
+	.uleb128 0x45
+	.4byte	.LASF519
 	.byte	0x2
-	.2byte	0x317
-	.4byte	0x317
-	.uleb128 0x1
-	.byte	0x57
+	.2byte	0x348
+	.4byte	0x30c
+	.4byte	.LLST224
 	.uleb128 0x1f
-	.4byte	.LASF354
+	.4byte	.LASF353
 	.byte	0x2
-	.2byte	0x318
-	.4byte	0x194f
+	.2byte	0x349
+	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -112
-	.uleb128 0x24
-	.4byte	.LVL1116
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1117
-	.4byte	0x177a
-	.uleb128 0x24
+	.sleb128 -104
+	.uleb128 0x31
 	.4byte	.LVL1118
-	.4byte	0x3ac7
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1119
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1120
+	.4byte	0x3ad6
+	.uleb128 0x31
 	.4byte	.LVL1123
-	.4byte	0x17d1
+	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF522
+	.uleb128 0x3b
+	.4byte	.LASF521
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x64
-	.4byte	.LFB202
-	.4byte	.LFE202-.LFB202
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39e2
-	.uleb128 0x4d
+	.4byte	0x39ef
+	.uleb128 0x4e
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0x317
-	.4byte	.LLST132
-	.uleb128 0x4d
+	.2byte	0x321
+	.4byte	0x30c
+	.4byte	.LLST138
+	.uleb128 0x4e
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0x544
-	.4byte	.LLST133
-	.uleb128 0x43
-	.4byte	.LASF523
+	.2byte	0x321
+	.4byte	0x539
+	.4byte	.LLST139
+	.uleb128 0x44
+	.4byte	.LASF522
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x64
-	.4byte	.LLST134
-	.uleb128 0x44
-	.4byte	.LASF524
+	.4byte	.LLST140
+	.uleb128 0x45
+	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x2f2
-	.4byte	0x30c
-	.4byte	.LLST135
+	.2byte	0x323
+	.4byte	0x301
+	.4byte	.LLST141
 	.uleb128 0x1f
-	.4byte	.LASF525
+	.4byte	.LASF524
 	.byte	0x2
-	.2byte	0x2f2
-	.4byte	0x30c
+	.2byte	0x323
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x1f
-	.4byte	.LASF526
+	.4byte	.LASF525
 	.byte	0x2
-	.2byte	0x2f2
-	.4byte	0x30c
+	.2byte	0x323
+	.4byte	0x301
 	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x39f2
+	.byte	0x55
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x39ff
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6888
-	.uleb128 0x47
-	.4byte	.LASF527
+	.4byte	__func__.6802
+	.uleb128 0x48
+	.4byte	.LASF526
 	.byte	0x2
-	.2byte	0x2fb
-	.4byte	.L728
-	.uleb128 0x24
-	.4byte	.LVL604
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL606
-	.4byte	0x3a32
-	.uleb128 0x24
-	.4byte	.LVL607
-	.4byte	0x3a87
-	.uleb128 0x24
-	.4byte	.LVL608
-	.4byte	0x3e7f
+	.2byte	0x32c
+	.4byte	.L745
+	.uleb128 0x31
+	.4byte	.LVL623
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL625
+	.4byte	0x3a3f
+	.uleb128 0x31
+	.4byte	.LVL626
+	.4byte	0x3a96
+	.uleb128 0x31
+	.4byte	.LVL627
+	.4byte	0x3e90
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x39f2
+	.4byte	0x39ff
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x8
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x39e2
-	.uleb128 0x3a
-	.4byte	.LASF528
+	.4byte	0x39ef
+	.uleb128 0x3b
+	.4byte	.LASF527
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x64
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a32
-	.uleb128 0x51
+	.4byte	0x3a3f
+	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2e5
-	.4byte	0x30c
-	.4byte	.LLST189
-	.uleb128 0x24
-	.4byte	.LVL926
-	.4byte	0x3658
-	.uleb128 0x24
-	.4byte	.LVL929
-	.4byte	0x3a87
+	.2byte	0x316
+	.4byte	0x301
+	.4byte	.LLST196
+	.uleb128 0x31
+	.4byte	.LVL919
+	.4byte	0x365f
+	.uleb128 0x31
+	.4byte	.LVL922
+	.4byte	0x3a96
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF529
+	.uleb128 0x3b
+	.4byte	.LASF528
 	.byte	0x2
-	.2byte	0x2bb
-	.4byte	0x30c
-	.4byte	.LFB200
-	.4byte	.LFE200-.LFB200
+	.2byte	0x2ec
+	.4byte	0x301
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a87
-	.uleb128 0x3e
+	.4byte	0x3a96
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2bd
-	.4byte	0x30c
-	.uleb128 0x3d
+	.2byte	0x2ee
+	.4byte	0x301
+	.uleb128 0x1f
+	.4byte	.LASF529
+	.byte	0x2
+	.2byte	0x2ef
+	.4byte	0x301
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x3e
 	.4byte	.LASF530
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2f0
 	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF531
-	.byte	0x2
-	.2byte	0x2bf
-	.4byte	0x317
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x308b
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x3092
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6871
-	.uleb128 0x24
-	.4byte	.LVL169
-	.4byte	0x6727
+	.4byte	__func__.6785
+	.uleb128 0x31
+	.4byte	.LVL174
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF532
+	.uleb128 0x3b
+	.4byte	.LASF531
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x64
-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ac7
-	.uleb128 0x43
-	.4byte	.LASF524
+	.4byte	0x3ad6
+	.uleb128 0x44
+	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x2b1
-	.4byte	0x30c
-	.4byte	.LLST131
-	.uleb128 0x3d
-	.4byte	.LASF106
+	.2byte	0x2e2
+	.4byte	0x301
+	.4byte	.LLST137
+	.uleb128 0x3e
+	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x2b3
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL599
-	.4byte	0x3ac7
+	.2byte	0x2e4
+	.4byte	0x30c
+	.uleb128 0x31
+	.4byte	.LVL618
+	.4byte	0x3ad6
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF533
+	.uleb128 0x3b
+	.4byte	.LASF532
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x64
-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3bdb
-	.uleb128 0x43
-	.4byte	.LASF487
-	.byte	0x2
-	.2byte	0x276
-	.4byte	0x332e
-	.4byte	.LLST125
-	.uleb128 0x43
-	.4byte	.LASF106
-	.byte	0x2
-	.2byte	0x276
-	.4byte	0x317
-	.4byte	.LLST126
-	.uleb128 0x56
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x276
-	.4byte	0x544
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3d
-	.4byte	.LASF179
+	.4byte	0x3bec
+	.uleb128 0x44
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x278
-	.4byte	0x317
+	.2byte	0x2a7
+	.4byte	0x3333
+	.4byte	.LLST130
 	.uleb128 0x44
-	.4byte	.LASF492
+	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x3334
-	.4byte	.LLST127
+	.2byte	0x2a7
+	.4byte	0x30c
+	.4byte	.LLST131
 	.uleb128 0x44
-	.4byte	.LASF505
+	.4byte	.LASF516
+	.byte	0x2
+	.2byte	0x2a7
+	.4byte	0x539
+	.4byte	.LLST132
+	.uleb128 0x3e
+	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2a9
 	.4byte	0x30c
-	.4byte	.LLST128
-	.uleb128 0x3f
-	.4byte	.LASF534
+	.uleb128 0x45
+	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x27c
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x23ec
+	.2byte	0x2aa
+	.4byte	0x3339
+	.4byte	.LLST133
+	.uleb128 0x45
+	.4byte	.LASF504
+	.byte	0x2
+	.2byte	0x2ab
+	.4byte	0x301
+	.4byte	.LLST134
+	.uleb128 0x40
+	.4byte	.LASF533
+	.byte	0x2
+	.2byte	0x2ad
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6846
-	.uleb128 0x4e
-	.4byte	0x17d1
-	.4byte	.LBB362
-	.4byte	.Ldebug_ranges0+0x110
+	.4byte	__func__.6760
+	.uleb128 0x4f
+	.4byte	0x17c6
+	.4byte	.LBB385
+	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x2
-	.2byte	0x292
-	.4byte	0x3ba4
+	.2byte	0x2c3
+	.4byte	0x3bb5
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x110
+	.4byte	.Ldebug_ranges0+0x180
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x110
+	.4byte	.Ldebug_ranges0+0x180
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL575
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL592
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL572
-	.4byte	0x3bdb
-	.uleb128 0x24
-	.4byte	.LVL573
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL574
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL578
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL581
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL582
-	.4byte	0x6727
+	.uleb128 0x31
+	.4byte	.LVL589
+	.4byte	0x3bec
+	.uleb128 0x31
+	.4byte	.LVL590
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL591
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL595
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL598
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL599
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF535
+	.uleb128 0x3b
+	.4byte	.LASF534
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x64
-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3c96
-	.uleb128 0x43
-	.4byte	.LASF487
+	.4byte	0x3ca7
+	.uleb128 0x44
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x332e
-	.4byte	.LLST121
-	.uleb128 0x3d
-	.4byte	.LASF179
+	.2byte	0x277
+	.4byte	0x3333
+	.4byte	.LLST126
+	.uleb128 0x3e
+	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x248
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF120
+	.2byte	0x279
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x248
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF536
+	.2byte	0x279
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF535
 	.byte	0x2
-	.2byte	0x249
-	.4byte	0x30c
-	.4byte	.LLST122
-	.uleb128 0x44
-	.4byte	.LASF537
+	.2byte	0x27a
+	.4byte	0x301
+	.4byte	.LLST127
+	.uleb128 0x45
+	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x24a
-	.4byte	0x63b
-	.4byte	.LLST123
-	.uleb128 0x44
-	.4byte	.LASF490
+	.2byte	0x27b
+	.4byte	0x630
+	.4byte	.LLST128
+	.uleb128 0x45
+	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x24b
-	.4byte	0x544
-	.4byte	.LLST124
-	.uleb128 0x3d
-	.4byte	.LASF492
+	.2byte	0x27c
+	.4byte	0x539
+	.4byte	.LLST129
+	.uleb128 0x3e
+	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x3334
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x3ca6
+	.2byte	0x27d
+	.4byte	0x3339
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x3cb7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6832
-	.uleb128 0x24
-	.4byte	.LVL555
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL556
-	.4byte	0x424d
-	.uleb128 0x24
-	.4byte	.LVL562
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL565
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL566
-	.4byte	0x3cab
+	.4byte	__func__.6746
+	.uleb128 0x31
+	.4byte	.LVL572
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL573
+	.4byte	0x4247
+	.uleb128 0x31
+	.4byte	.LVL579
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL582
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL583
+	.4byte	0x3cbc
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x3ca6
+	.4byte	0x3cb7
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x3c96
-	.uleb128 0x3a
-	.4byte	.LASF538
+	.4byte	0x3ca7
+	.uleb128 0x3b
+	.4byte	.LASF537
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x64
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d76
-	.uleb128 0x43
-	.4byte	.LASF487
+	.4byte	0x3d87
+	.uleb128 0x44
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x332e
-	.4byte	.LLST129
+	.2byte	0x249
+	.4byte	0x3333
+	.4byte	.LLST135
 	.uleb128 0x1f
-	.4byte	.LASF539
+	.4byte	.LASF538
 	.byte	0x2
-	.2byte	0x21a
-	.4byte	0x30c
+	.2byte	0x24b
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x3d
-	.4byte	.LASF540
+	.uleb128 0x3e
+	.4byte	.LASF539
 	.byte	0x2
-	.2byte	0x21b
-	.4byte	0x30c
+	.2byte	0x24c
+	.4byte	0x301
 	.uleb128 0x1f
-	.4byte	.LASF120
+	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x21c
-	.4byte	0x30c
+	.2byte	0x24d
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x44
-	.4byte	.LASF537
+	.uleb128 0x45
+	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x21d
-	.4byte	0x63b
-	.4byte	.LLST130
+	.2byte	0x24e
+	.4byte	0x630
+	.4byte	.LLST136
 	.uleb128 0x1f
-	.4byte	.LASF490
+	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x21e
-	.4byte	0x544
+	.2byte	0x24f
+	.4byte	0x539
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x3d
-	.4byte	.LASF492
+	.uleb128 0x3e
+	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x3334
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.2byte	0x250
+	.4byte	0x3339
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6818
-	.uleb128 0x24
-	.4byte	.LVL586
-	.4byte	0x3dce
-	.uleb128 0x24
-	.4byte	.LVL588
-	.4byte	0x3d76
-	.uleb128 0x24
-	.4byte	.LVL590
-	.4byte	0x4367
-	.uleb128 0x24
-	.4byte	.LVL592
-	.4byte	0x3d76
-	.uleb128 0x24
-	.4byte	.LVL594
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL595
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL596
-	.4byte	0x3ac7
+	.4byte	__func__.6732
+	.uleb128 0x31
+	.4byte	.LVL605
+	.4byte	0x3ddf
+	.uleb128 0x31
+	.4byte	.LVL607
+	.4byte	0x3d87
+	.uleb128 0x31
+	.4byte	.LVL609
+	.4byte	0x436d
+	.uleb128 0x31
+	.4byte	.LVL611
+	.4byte	0x3d87
+	.uleb128 0x31
+	.4byte	.LVL613
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL614
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL615
+	.4byte	0x3ad6
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF541
+	.uleb128 0x3c
+	.4byte	.LASF540
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x3db9
-	.uleb128 0x3c
-	.4byte	.LASF487
-	.byte	0x2
-	.2byte	0x203
-	.4byte	0x332e
-	.uleb128 0x3d
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x30c
+	.4byte	0x3dca
 	.uleb128 0x3d
-	.4byte	.LASF537
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x206
-	.4byte	0x63b
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x3dc9
+	.2byte	0x231
+	.4byte	0x3333
+	.uleb128 0x3e
 	.4byte	.LASF541
+	.byte	0x2
+	.2byte	0x233
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF536
+	.byte	0x2
+	.2byte	0x234
+	.4byte	0x630
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x3dda
+	.4byte	.LASF540
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x3dc9
+	.4byte	0x3dda
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x19
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x3db9
-	.uleb128 0x3a
-	.4byte	.LASF543
+	.4byte	0x3dca
+	.uleb128 0x3b
+	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x64
-	.4byte	.LFB194
-	.4byte	.LFE194-.LFB194
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e7f
-	.uleb128 0x43
-	.4byte	.LASF487
+	.4byte	0x3e90
+	.uleb128 0x44
+	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x332e
-	.4byte	.LLST116
+	.2byte	0x209
+	.4byte	0x3333
+	.4byte	.LLST121
 	.uleb128 0x1f
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x1dd
-	.4byte	0x63b
+	.2byte	0x20b
+	.4byte	0x630
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x44
-	.4byte	.LASF490
+	.uleb128 0x45
+	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x1de
-	.4byte	0x544
-	.4byte	.LLST117
+	.2byte	0x20c
+	.4byte	0x539
+	.4byte	.LLST122
 	.uleb128 0x1f
-	.4byte	.LASF544
+	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x63b
+	.2byte	0x20d
+	.4byte	0x630
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x44
-	.4byte	.LASF179
-	.byte	0x2
-	.2byte	0x1e0
-	.4byte	0x30c
-	.4byte	.LLST118
-	.uleb128 0x3d
-	.4byte	.LASF120
+	.uleb128 0x45
+	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x1e0
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF542
+	.2byte	0x20e
+	.4byte	0x301
+	.4byte	.LLST123
+	.uleb128 0x3e
+	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x1e1
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF545
+	.2byte	0x20e
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF541
 	.byte	0x2
-	.2byte	0x1e2
-	.4byte	0x30c
-	.4byte	.LLST119
-	.uleb128 0x44
-	.4byte	.LASF540
+	.2byte	0x20f
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x1e3
-	.4byte	0x30c
-	.4byte	.LLST120
-	.uleb128 0x24
-	.4byte	.LVL541
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL551
-	.4byte	0x4367
+	.2byte	0x210
+	.4byte	0x301
+	.4byte	.LLST124
+	.uleb128 0x45
+	.4byte	.LASF539
+	.byte	0x2
+	.2byte	0x211
+	.4byte	0x301
+	.4byte	.LLST125
+	.uleb128 0x31
+	.4byte	.LVL560
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL569
+	.4byte	0x436d
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF546
+	.uleb128 0x3b
+	.4byte	.LASF545
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x64
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f26
-	.uleb128 0x43
-	.4byte	.LASF106
-	.byte	0x2
-	.2byte	0x1b9
-	.4byte	0x30c
-	.4byte	.LLST113
-	.uleb128 0x43
-	.4byte	.LASF524
+	.4byte	0x3f37
+	.uleb128 0x44
+	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x1b9
-	.4byte	0x30c
-	.4byte	.LLST114
+	.2byte	0x1e7
+	.4byte	0x301
+	.4byte	.LLST118
 	.uleb128 0x44
-	.4byte	.LASF492
+	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x3334
-	.4byte	.LLST115
+	.2byte	0x1e7
+	.4byte	0x301
+	.4byte	.LLST119
+	.uleb128 0x45
+	.4byte	.LASF491
+	.byte	0x2
+	.2byte	0x1e9
+	.4byte	0x3339
+	.4byte	.LLST120
 	.uleb128 0x1f
-	.4byte	.LASF547
+	.4byte	.LASF546
 	.byte	0x2
-	.2byte	0x1bc
-	.4byte	0x317
+	.2byte	0x1ea
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x57
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x23ec
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6775
-	.uleb128 0x24
-	.4byte	.LVL525
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL527
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL530
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL532
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL533
-	.4byte	0x673d
-	.uleb128 0x24
-	.4byte	.LVL534
-	.4byte	0x673d
-	.uleb128 0x24
-	.4byte	.LVL535
-	.4byte	0x6727
+	.4byte	__func__.6688
+	.uleb128 0x31
+	.4byte	.LVL543
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL545
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL548
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL550
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL551
+	.4byte	0x6808
+	.uleb128 0x31
+	.4byte	.LVL552
+	.4byte	0x6808
+	.uleb128 0x31
+	.4byte	.LVL553
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF548
+	.uleb128 0x3c
+	.4byte	.LASF547
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x3fa5
-	.uleb128 0x3c
-	.4byte	.LASF433
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x30c
+	.4byte	0x3fb6
 	.uleb128 0x3d
+	.4byte	.LASF432
+	.byte	0x2
+	.2byte	0x1bf
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF548
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF549
 	.byte	0x2
-	.2byte	0x195
-	.4byte	0x30c
-	.uleb128 0x3d
+	.2byte	0x1c2
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF550
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c3
 	.4byte	0x30c
-	.uleb128 0x3d
+	.uleb128 0x3e
 	.4byte	.LASF551
 	.byte	0x2
-	.2byte	0x197
-	.4byte	0x317
-	.uleb128 0x3d
+	.2byte	0x1c5
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF552
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c6
 	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x19a
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF436
+	.uleb128 0x3e
+	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x121b
-	.uleb128 0x3d
-	.4byte	.LASF554
+	.2byte	0x1c7
+	.4byte	0x1210
+	.uleb128 0x3e
+	.4byte	.LASF553
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x121b
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x308b
-	.4byte	.LASF548
+	.2byte	0x1c7
+	.4byte	0x1210
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x3092
+	.4byte	.LASF547
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF555
+	.uleb128 0x3b
+	.4byte	.LASF554
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x64
-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
+	.4byte	.LFB201
+	.4byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fec
-	.uleb128 0x43
-	.4byte	.LASF94
+	.4byte	0x3ffd
+	.uleb128 0x44
+	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x17f
-	.4byte	0x30c
+	.2byte	0x1ab
+	.4byte	0x301
 	.4byte	.LLST46
-	.uleb128 0x3d
-	.4byte	.LASF433
+	.uleb128 0x3e
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x181
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF436
+	.2byte	0x1ad
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x182
-	.4byte	0x121b
+	.2byte	0x1ae
+	.4byte	0x1210
 	.4byte	.LLST47
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF556
+	.uleb128 0x3b
+	.4byte	.LASF555
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x64
-	.4byte	.LFB190
-	.4byte	.LFE190-.LFB190
+	.4byte	.LFB200
+	.4byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4020
-	.uleb128 0x43
-	.4byte	.LASF557
+	.4byte	0x4031
+	.uleb128 0x44
+	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x4020
+	.2byte	0x1a6
+	.4byte	0x4031
 	.4byte	.LLST45
 	.uleb128 0x24
 	.4byte	.LVL145
-	.4byte	0x4026
+	.4byte	0x4037
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x121b
-	.uleb128 0x3a
-	.4byte	.LASF558
+	.4byte	0x1210
+	.uleb128 0x3b
+	.4byte	.LASF557
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x64
-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
+	.4byte	.LFB199
+	.4byte	.LFE199-.LFB199
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4086
-	.uleb128 0x43
-	.4byte	.LASF557
+	.4byte	0x4097
+	.uleb128 0x44
+	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x4020
+	.2byte	0x193
+	.4byte	0x4031
 	.4byte	.LLST42
-	.uleb128 0x43
-	.4byte	.LASF94
+	.uleb128 0x44
+	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x30c
+	.2byte	0x193
+	.4byte	0x301
 	.4byte	.LLST43
-	.uleb128 0x3d
-	.4byte	.LASF433
+	.uleb128 0x3e
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x169
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF436
+	.2byte	0x195
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x16a
-	.4byte	0x121b
+	.2byte	0x196
+	.4byte	0x1210
 	.4byte	.LLST44
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL139
-	.4byte	0x4086
+	.4byte	0x4097
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF559
+	.uleb128 0x3b
+	.4byte	.LASF558
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x64
-	.4byte	.LFB188
-	.4byte	.LFE188-.LFB188
+	.4byte	.LFB198
+	.4byte	.LFE198-.LFB198
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40f3
-	.uleb128 0x43
-	.4byte	.LASF557
+	.4byte	0x4104
+	.uleb128 0x44
+	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x4020
+	.2byte	0x176
+	.4byte	0x4031
 	.4byte	.LLST40
-	.uleb128 0x43
-	.4byte	.LASF433
+	.uleb128 0x44
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x30c
+	.2byte	0x176
+	.4byte	0x301
 	.4byte	.LLST41
 	.uleb128 0x1f
-	.4byte	.LASF436
+	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x121b
+	.2byte	0x178
+	.4byte	0x1210
 	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3d
-	.4byte	.LASF560
+	.byte	0x55
+	.uleb128 0x3e
+	.4byte	.LASF559
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x121b
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x4103
+	.2byte	0x178
+	.4byte	0x1210
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x4114
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6734
-	.uleb128 0x24
-	.4byte	.LVL131
-	.4byte	0x6727
+	.4byte	__func__.6647
+	.uleb128 0x31
+	.4byte	.LVL132
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x4103
+	.4byte	0x4114
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x10
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x40f3
-	.uleb128 0x3a
-	.4byte	.LASF561
+	.4byte	0x4104
+	.uleb128 0x3b
+	.4byte	.LASF560
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x64
-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
+	.4byte	.LFB197
+	.4byte	.LFE197-.LFB197
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4177
-	.uleb128 0x43
-	.4byte	.LASF433
+	.4byte	0x4188
+	.uleb128 0x44
+	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x11b
-	.4byte	0x30c
+	.2byte	0x145
+	.4byte	0x301
 	.4byte	.LLST37
-	.uleb128 0x44
-	.4byte	.LASF436
+	.uleb128 0x1f
+	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x121b
-	.4byte	.LLST38
+	.2byte	0x147
+	.4byte	0x1210
+	.uleb128 0x1
+	.byte	0x56
 	.uleb128 0x1f
-	.4byte	.LASF560
+	.4byte	.LASF559
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x121b
+	.2byte	0x147
+	.4byte	0x1210
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x1f
+	.uleb128 0x45
+	.4byte	.LASF561
+	.byte	0x2
+	.2byte	0x148
+	.4byte	0x301
+	.4byte	.LLST38
+	.uleb128 0x3e
 	.4byte	.LASF562
 	.byte	0x2
-	.2byte	0x11e
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x3d
+	.2byte	0x149
+	.4byte	0x301
+	.uleb128 0x3e
 	.4byte	.LASF563
 	.byte	0x2
-	.2byte	0x11f
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x120
-	.4byte	0x30c
+	.2byte	0x14a
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF565
+	.uleb128 0x26
+	.4byte	.LASF564
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x64
-	.4byte	.LFB186
-	.4byte	.LFE186-.LFB186
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4203
-	.uleb128 0x23
-	.4byte	.LASF433
+	.byte	0x1
+	.4byte	0x41fd
+	.uleb128 0x34
+	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xd8
-	.4byte	0x30c
-	.4byte	.LLST30
-	.uleb128 0x2c
-	.4byte	.LASF436
+	.byte	0xf8
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF435
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x121b
-	.4byte	.LLST31
-	.uleb128 0x2c
-	.4byte	.LASF560
+	.byte	0xfa
+	.4byte	0x1210
+	.uleb128 0x35
+	.4byte	.LASF559
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x121b
-	.4byte	.LLST32
-	.uleb128 0x2c
+	.byte	0xfa
+	.4byte	0x1210
+	.uleb128 0x35
+	.4byte	.LASF565
+	.byte	0x2
+	.byte	0xfb
+	.4byte	0x301
+	.uleb128 0x35
 	.4byte	.LASF566
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfc
+	.4byte	0x301
+	.uleb128 0x35
+	.4byte	.LASF550
+	.byte	0x2
+	.byte	0xfd
 	.4byte	0x30c
-	.4byte	.LLST33
-	.uleb128 0x20
+	.uleb128 0x35
 	.4byte	.LASF567
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfe
 	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x2c
-	.4byte	.LASF551
+	.uleb128 0x35
+	.4byte	.LASF563
 	.byte	0x2
-	.byte	0xdd
-	.4byte	0x317
-	.4byte	.LLST34
-	.uleb128 0x2c
+	.byte	0xff
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF114
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0x301
+	.byte	0
+	.uleb128 0x58
 	.4byte	.LASF568
 	.byte	0x2
-	.byte	0xde
-	.4byte	0x317
-	.4byte	.LLST35
+	.byte	0xd9
+	.byte	0x1
+	.4byte	0x4222
 	.uleb128 0x34
-	.4byte	.LASF564
+	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xdf
-	.4byte	0x30c
+	.byte	0xd9
+	.4byte	0x301
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x4114
+	.4byte	.LASF568
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x58
 	.4byte	.LASF569
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x4228
-	.uleb128 0x33
-	.4byte	.LASF433
+	.4byte	0x4247
+	.uleb128 0x34
+	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xb9
-	.4byte	0x30c
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x4103
+	.byte	0xd2
+	.4byte	0x301
+	.uleb128 0x41
+	.4byte	.LASF362
+	.4byte	0x4114
 	.4byte	.LASF569
 	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF570
-	.byte	0x2
-	.byte	0xb2
-	.byte	0x1
-	.4byte	0x424d
-	.uleb128 0x33
-	.4byte	.LASF433
-	.byte	0x2
-	.byte	0xb2
-	.4byte	0x30c
-	.uleb128 0x40
-	.4byte	.LASF363
-	.4byte	0x4103
-	.4byte	.LASF570
-	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x2
-	.byte	0xa4
-	.4byte	0x30c
-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
+	.byte	0xb4
+	.4byte	0x301
+	.4byte	.LFB193
+	.4byte	.LFE193-.LFB193
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4296
-	.uleb128 0x36
+	.4byte	0x42ca
+	.uleb128 0x37
 	.ascii	"tmp\000"
 	.byte	0x2
-	.byte	0xa6
-	.4byte	0x30c
+	.byte	0xb6
+	.4byte	0x301
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x58
-	.4byte	0x4286
+	.byte	0x55
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x4296
+	.byte	0xb7
+	.4byte	0x42ca
+	.uleb128 0x59
+	.4byte	.LASF571
+	.byte	0x2
+	.byte	0xb9
+	.4byte	.L518
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x118
+	.4byte	0x42a8
+	.uleb128 0x35
+	.4byte	.LASF572
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL463
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL464
+	.4byte	0x1954
 	.byte	0
-	.uleb128 0x58
-	.4byte	0x43f4
-	.4byte	.LBB252
-	.4byte	.LBE252-.LBB252
+	.uleb128 0x5a
+	.4byte	0x43b4
+	.4byte	.LBB315
+	.4byte	.Ldebug_ranges0+0x100
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xba
+	.uleb128 0x31
+	.4byte	.LVL465
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL466
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xae7
+	.4byte	0xadc
 	.uleb128 0x22
-	.4byte	.LASF572
+	.4byte	.LASF573
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x64
-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
+	.4byte	.LFB192
+	.4byte	.LFE192-.LFB192
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x42f5
+	.4byte	0x4329
 	.uleb128 0x2b
 	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x92
-	.4byte	0x30c
-	.4byte	.LLST29
-	.uleb128 0x36
+	.byte	0xa2
+	.4byte	0x301
+	.4byte	.LLST27
+	.uleb128 0x37
 	.ascii	"ret\000"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x64
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x36
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0x95
-	.4byte	0x317
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x96
-	.4byte	0x4296
-	.uleb128 0x58
-	.4byte	0x43e8
-	.4byte	.LBB250
-	.4byte	.LBE250-.LBB250
-	.byte	0x2
-	.byte	0x98
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF573
-	.byte	0x2
-	.byte	0x73
-	.4byte	.LFB181
-	.4byte	.LFE181-.LFB181
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4367
-	.uleb128 0x29
+	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x75
-	.4byte	0x30c
-	.uleb128 0x49
-	.ascii	"tmp\000"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x30c
-	.4byte	.LLST26
-	.uleb128 0x29
-	.ascii	"j\000"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x30c
-	.uleb128 0x2c
-	.4byte	.LASF384
-	.byte	0x2
-	.byte	0x76
+	.byte	0xa5
 	.4byte	0x30c
-	.4byte	.LLST27
-	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x29
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0xa6
+	.4byte	0x42ca
+	.uleb128 0x5a
+	.4byte	0x43a8
+	.4byte	.LBB251
+	.4byte	.Ldebug_ranges0+0x50
+	.byte	0x2
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x49
 	.4byte	.LASF574
 	.byte	0x2
+	.byte	0x75
+	.4byte	.LFB191
+	.4byte	.LFE191-.LFB191
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x436d
+	.uleb128 0x20
+	.4byte	.LASF114
+	.byte	0x2
 	.byte	0x77
-	.4byte	0x30c
-	.uleb128 0x2c
-	.4byte	.LASF575
+	.4byte	0x317
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x29
+	.ascii	"i\000"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0x317
-	.4byte	.LLST28
+	.4byte	0x301
+	.uleb128 0x4a
+	.ascii	"blk\000"
+	.byte	0x2
+	.byte	0x78
+	.4byte	0x301
+	.4byte	.LLST26
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x4296
-	.uleb128 0x24
-	.4byte	.LVL76
-	.4byte	0x455a
+	.4byte	0x42ca
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF576
+	.uleb128 0x58
+	.4byte	.LASF575
 	.byte	0x2
 	.byte	0x61
-	.4byte	.LFB180
-	.4byte	.LFE180-.LFB180
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x43e8
-	.uleb128 0x2b
+	.byte	0x1
+	.4byte	0x43a8
+	.uleb128 0x27
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
-	.4byte	0x30c
-	.4byte	.LLST94
-	.uleb128 0x23
-	.4byte	.LASF577
+	.4byte	0x301
+	.uleb128 0x34
+	.4byte	.LASF576
 	.byte	0x2
 	.byte	0x61
-	.4byte	0x30c
-	.4byte	.LLST95
-	.uleb128 0x52
-	.4byte	.LBB299
-	.4byte	.LBE299-.LBB299
-	.4byte	0x43d8
+	.4byte	0x301
+	.uleb128 0x28
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x4296
-	.uleb128 0x32
-	.4byte	.LBB300
-	.4byte	.LBE300-.LBB300
-	.uleb128 0x34
-	.4byte	.LASF578
-	.byte	0x2
 	.byte	0x66
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL407
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL408
-	.4byte	0x195f
+	.4byte	0x42ca
+	.uleb128 0x28
+	.uleb128 0x35
+	.4byte	.LASF572
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x301
 	.byte	0
 	.byte	0
-	.uleb128 0x58
-	.4byte	0x43e8
-	.4byte	.LBB297
-	.4byte	.LBE297-.LBB297
-	.byte	0x2
-	.byte	0x63
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF579
+	.uleb128 0x5b
+	.4byte	.LASF577
 	.byte	0x2
 	.byte	0x5c
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x1
-	.uleb128 0x59
-	.4byte	.LASF580
+	.uleb128 0x5b
+	.4byte	.LASF578
 	.byte	0x2
 	.byte	0x57
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF581
+	.4byte	.LASF579
 	.byte	0x2
 	.byte	0x4b
-	.4byte	0x30c
-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
+	.4byte	0x301
+	.4byte	.LFB187
+	.4byte	.LFE187-.LFB187
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x447f
+	.4byte	0x443f
 	.uleb128 0x2b
 	.ascii	"max\000"
 	.byte	0x2
 	.byte	0x4b
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST25
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x4296
-	.uleb128 0x5a
-	.4byte	0x17d1
-	.4byte	.LBB241
-	.4byte	.Ldebug_ranges0+0x38
+	.4byte	0x42ca
+	.uleb128 0x5c
+	.4byte	0x17c6
+	.4byte	.LBB242
+	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
 	.byte	0x53
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x38
+	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x38
+	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x30
-	.4byte	0x17fd
+	.4byte	0x17f2
 	.uleb128 0x30
-	.4byte	0x1808
-	.uleb128 0x24
-	.4byte	.LVL71
-	.4byte	0x6732
+	.4byte	0x17fd
+	.uleb128 0x31
+	.4byte	.LVL76
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF582
+	.4byte	.LASF580
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x64
-	.4byte	.LFB176
-	.4byte	.LFE176-.LFB176
+	.4byte	.LFB186
+	.4byte	.LFE186-.LFB186
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4517
+	.4byte	0x44d7
 	.uleb128 0x23
-	.4byte	.LASF179
+	.4byte	.LASF178
 	.byte	0x2
 	.byte	0x2e
-	.4byte	0x317
-	.4byte	.LLST84
+	.4byte	0x30c
+	.4byte	.LLST87
 	.uleb128 0x23
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x64
-	.4byte	.LLST85
-	.uleb128 0x36
+	.4byte	.LLST88
+	.uleb128 0x37
 	.ascii	"req\000"
 	.byte	0x2
 	.byte	0x30
-	.4byte	0x338
+	.4byte	0x32d
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x36
+	.sleb128 -108
+	.uleb128 0x37
 	.ascii	"low\000"
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x32d
+	.4byte	0x322
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x20
-	.4byte	.LASF583
+	.4byte	.LASF581
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x32d
+	.4byte	0x322
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x29
 	.ascii	"mid\000"
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x32d
+	.4byte	0x322
 	.uleb128 0x20
-	.4byte	.LASF584
+	.4byte	.LASF582
 	.byte	0x2
 	.byte	0x32
-	.4byte	0x194f
+	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -104
-	.uleb128 0x34
-	.4byte	.LASF585
+	.sleb128 -88
+	.uleb128 0x35
+	.4byte	.LASF583
 	.byte	0x2
 	.byte	0x33
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL366
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL369
-	.4byte	0x1b05
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL380
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL383
+	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF586
+	.4byte	.LASF584
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x317
-	.4byte	.LFB175
-	.4byte	.LFE175-.LFB175
+	.4byte	0x30c
+	.4byte	.LFB185
+	.4byte	.LFE185-.LFB185
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x455a
+	.4byte	0x451a
 	.uleb128 0x23
-	.4byte	.LASF587
+	.4byte	.LASF585
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x317
+	.4byte	0x30c
 	.4byte	.LLST24
-	.uleb128 0x4b
-	.4byte	.LASF588
+	.uleb128 0x4c
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x36
+	.uleb128 0x37
 	.ascii	"ret\000"
 	.byte	0x2
 	.byte	0x20
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF589
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x14
-	.4byte	0x30c
-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
+	.4byte	0x301
+	.4byte	.LFB184
+	.4byte	.LFE184-.LFB184
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x458e
+	.4byte	0x454e
 	.uleb128 0x23
-	.4byte	.LASF379
+	.4byte	.LASF378
 	.byte	0x2
 	.byte	0x14
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST23
-	.uleb128 0x34
-	.4byte	.LASF501
+	.uleb128 0x35
+	.4byte	.LASF500
 	.byte	0x2
 	.byte	0x16
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF590
+	.4byte	.LASF588
 	.byte	0x2
 	.byte	0xc
-	.4byte	0x30c
-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
+	.4byte	0x301
+	.4byte	.LFB183
+	.4byte	.LFE183-.LFB183
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45c2
+	.4byte	0x4582
 	.uleb128 0x23
-	.4byte	.LASF379
+	.4byte	.LASF378
 	.byte	0x2
 	.byte	0xc
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST22
-	.uleb128 0x34
-	.4byte	.LASF377
+	.uleb128 0x35
+	.4byte	.LASF376
 	.byte	0x2
 	.byte	0xe
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF591
+	.4byte	.LASF589
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x30c
-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
+	.4byte	0x301
+	.4byte	.LFB182
+	.4byte	.LFE182-.LFB182
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4605
+	.4byte	0x45c5
 	.uleb128 0x23
-	.4byte	.LASF377
+	.4byte	.LASF376
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST20
 	.uleb128 0x23
-	.4byte	.LASF501
+	.4byte	.LASF500
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST21
-	.uleb128 0x34
-	.4byte	.LASF393
+	.uleb128 0x35
+	.4byte	.LASF392
 	.byte	0x2
 	.byte	0x6
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF592
+	.uleb128 0x3b
+	.4byte	.LASF590
 	.byte	0x4
 	.2byte	0x13c
-	.4byte	0x322
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
+	.4byte	0x317
+	.4byte	.LFB181
+	.4byte	.LFE181-.LFB181
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47c9
-	.uleb128 0x51
+	.4byte	0x4789
+	.uleb128 0x52
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
-	.4byte	0x317
-	.4byte	.LLST209
-	.uleb128 0x3e
+	.4byte	0x30c
+	.4byte	.LLST217
+	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF353
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF352
 	.byte	0x4
 	.2byte	0x140
-	.4byte	0x317
-	.4byte	.LLST210
-	.uleb128 0x3d
-	.4byte	.LASF593
+	.4byte	0x30c
+	.4byte	.LLST218
+	.uleb128 0x3e
+	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x47c9
-	.uleb128 0x3f
-	.4byte	.LASF594
+	.4byte	0x4789
+	.uleb128 0x40
+	.4byte	.LASF592
 	.byte	0x4
 	.2byte	0x158
-	.uleb128 0x4e
-	.4byte	0x17d1
-	.4byte	.LBB465
-	.4byte	.Ldebug_ranges0+0x1e0
+	.uleb128 0x4f
+	.4byte	0x17c6
+	.4byte	.LBB488
+	.4byte	.Ldebug_ranges0+0x250
 	.byte	0x4
 	.2byte	0x15e
-	.4byte	0x46b1
+	.4byte	0x4671
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1e0
+	.4byte	.Ldebug_ranges0+0x250
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1e0
+	.4byte	.Ldebug_ranges0+0x250
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL1088
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL1092
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB471
-	.4byte	.LBE471-.LBB471
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB494
+	.4byte	.LBE494-.LBB494
 	.byte	0x4
 	.2byte	0x15f
-	.4byte	0x470b
+	.4byte	0x46cb
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB472
-	.4byte	.LBE472-.LBB472
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB495
+	.4byte	.LBE495-.LBB495
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB473
-	.4byte	.LBE473-.LBB473
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB496
+	.4byte	.LBE496-.LBB496
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL1089
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL1093
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1072
-	.4byte	0x4931
-	.uleb128 0x24
-	.4byte	.LVL1073
-	.4byte	0x47cf
-	.uleb128 0x24
-	.4byte	.LVL1076
-	.4byte	0x4af7
-	.uleb128 0x24
-	.4byte	.LVL1077
-	.4byte	0x190b
-	.uleb128 0x24
-	.4byte	.LVL1078
-	.4byte	0x4b52
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL1079
+	.4byte	0x48f1
+	.uleb128 0x31
+	.4byte	.LVL1080
+	.4byte	0x478f
+	.uleb128 0x31
+	.4byte	.LVL1081
+	.4byte	0x4ab7
+	.uleb128 0x31
 	.4byte	.LVL1082
-	.4byte	0x1b05
-	.uleb128 0x24
+	.4byte	0x1900
+	.uleb128 0x31
 	.4byte	.LVL1083
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1084
-	.4byte	0x4b52
-	.uleb128 0x24
-	.4byte	.LVL1085
-	.4byte	0x1815
-	.uleb128 0x24
+	.4byte	0x4b12
+	.uleb128 0x31
 	.4byte	.LVL1086
-	.4byte	0x4a91
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
 	.4byte	.LVL1087
-	.4byte	0x4af7
-	.uleb128 0x24
-	.4byte	.LVL1092
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1093
-	.4byte	0x195f
-	.uleb128 0x24
-	.4byte	.LVL1094
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL1095
-	.4byte	0x4b52
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1088
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL1089
+	.4byte	0x180a
+	.uleb128 0x31
+	.4byte	.LVL1090
+	.4byte	0x4a51
+	.uleb128 0x31
+	.4byte	.LVL1091
+	.4byte	0x4ab7
+	.uleb128 0x31
 	.4byte	.LVL1096
-	.4byte	0x4b52
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
+	.4byte	.LVL1097
+	.4byte	0x1954
+	.uleb128 0x31
 	.4byte	.LVL1098
-	.4byte	0x195f
-	.uleb128 0x24
+	.4byte	0x19ea
+	.uleb128 0x31
 	.4byte	.LVL1099
-	.4byte	0x4b52
-	.uleb128 0x24
+	.4byte	0x4b12
+	.uleb128 0x31
 	.4byte	.LVL1100
-	.4byte	0x4b52
-	.uleb128 0x24
+	.4byte	0x4b12
+	.uleb128 0x31
 	.4byte	.LVL1101
-	.4byte	0x4994
-	.uleb128 0x24
+	.4byte	0x1954
+	.uleb128 0x31
 	.4byte	.LVL1102
-	.4byte	0x4994
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL1103
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL1104
+	.4byte	0x4954
+	.uleb128 0x31
+	.4byte	.LVL1105
+	.4byte	0x4954
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x70b
-	.uleb128 0x3a
-	.4byte	.LASF595
+	.4byte	0x700
+	.uleb128 0x3b
+	.4byte	.LASF593
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x64
-	.4byte	.LFB170
-	.4byte	.LFE170-.LFB170
+	.4byte	.LFB180
+	.4byte	.LFE180-.LFB180
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x482d
-	.uleb128 0x50
+	.4byte	0x47ed
+	.uleb128 0x51
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x118
-	.4byte	0x317
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x51
+	.uleb128 0x52
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x119
-	.4byte	0x30c
-	.4byte	.LLST82
-	.uleb128 0x44
-	.4byte	.LASF596
+	.4byte	0x301
+	.4byte	.LLST85
+	.uleb128 0x45
+	.4byte	.LASF594
 	.byte	0x4
 	.2byte	0x11a
-	.4byte	0x317
-	.4byte	.LLST83
-	.uleb128 0x3d
-	.4byte	.LASF593
+	.4byte	0x30c
+	.4byte	.LLST86
+	.uleb128 0x3e
+	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x47c9
-	.uleb128 0x24
-	.4byte	.LVL361
-	.4byte	0x1b05
+	.4byte	0x4789
+	.uleb128 0x31
+	.4byte	.LVL375
+	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF597
+	.4byte	.LASF595
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x64
-	.4byte	.LFB169
-	.4byte	.LFE169-.LFB169
+	.4byte	.LFB179
+	.4byte	.LFE179-.LFB179
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x48dd
-	.uleb128 0x49
+	.4byte	0x489d
+	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
-	.4byte	0x317
-	.4byte	.LLST206
-	.uleb128 0x49
+	.4byte	0x30c
+	.4byte	.LLST214
+	.uleb128 0x4a
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
-	.4byte	0x30c
-	.4byte	.LLST207
+	.4byte	0x301
+	.4byte	.LLST215
 	.uleb128 0x2c
-	.4byte	.LASF489
+	.4byte	.LASF488
 	.byte	0x4
 	.byte	0xb0
-	.4byte	0x32d
-	.4byte	.LLST208
-	.uleb128 0x34
-	.4byte	.LASF593
+	.4byte	0x322
+	.4byte	.LLST216
+	.uleb128 0x35
+	.4byte	.LASF591
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x47c9
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x48ed
+	.4byte	0x4789
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x48ad
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6576
-	.uleb128 0x24
-	.4byte	.LVL1051
-	.4byte	0x4931
-	.uleb128 0x24
-	.4byte	.LVL1053
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1054
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1055
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1056
-	.4byte	0x447f
-	.uleb128 0x24
-	.4byte	.LVL1058
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	__func__.6494
+	.uleb128 0x31
+	.4byte	.LVL1057
+	.4byte	0x48f1
+	.uleb128 0x31
 	.4byte	.LVL1059
-	.4byte	0x58be
-	.uleb128 0x24
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1060
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1061
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1062
+	.4byte	0x443f
+	.uleb128 0x31
+	.4byte	.LVL1064
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1065
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1069
-	.4byte	0x177a
+	.4byte	0x5872
+	.uleb128 0x31
+	.4byte	.LVL1071
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1075
+	.4byte	0x176f
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x48ed
+	.4byte	0x48ad
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xa
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x48dd
+	.4byte	0x489d
 	.uleb128 0x22
-	.4byte	.LASF598
+	.4byte	.LASF596
 	.byte	0x4
 	.byte	0x9c
-	.4byte	0x30c
-	.4byte	.LFB168
-	.4byte	.LFE168-.LFB168
+	.4byte	0x301
+	.4byte	.LFB178
+	.4byte	.LFE178-.LFB178
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4931
-	.uleb128 0x49
+	.4byte	0x48f1
+	.uleb128 0x4a
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0x9e
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST19
 	.uleb128 0x20
-	.4byte	.LASF599
+	.4byte	.LASF597
 	.byte	0x4
 	.byte	0x9f
-	.4byte	0x30c
+	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x24
-	.4byte	.LVL53
-	.4byte	0x4af7
+	.uleb128 0x31
+	.4byte	.LVL56
+	.4byte	0x4ab7
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF600
+	.uleb128 0x49
+	.4byte	.LASF598
 	.byte	0x4
 	.byte	0x94
-	.4byte	.LFB167
-	.4byte	.LFE167-.LFB167
+	.4byte	.LFB177
+	.4byte	.LFE177-.LFB177
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4994
-	.uleb128 0x5a
-	.4byte	0x17d1
-	.4byte	.LBB227
+	.4byte	0x4954
+	.uleb128 0x5c
+	.4byte	0x17c6
+	.4byte	.LBB231
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x4
 	.byte	0x98
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0x18
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0x18
 	.uleb128 0x30
-	.4byte	0x17fd
+	.4byte	0x17f2
 	.uleb128 0x30
-	.4byte	0x1808
+	.4byte	0x17fd
 	.uleb128 0x24
-	.4byte	.LVL50
-	.4byte	0x671c
+	.4byte	.LVL53
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF601
+	.4byte	.LASF599
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x64
-	.4byte	.LFB166
-	.4byte	.LFE166-.LFB166
+	.4byte	.LFB176
+	.4byte	.LFE176-.LFB176
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4a91
-	.uleb128 0x49
+	.4byte	0x4a51
+	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x64
-	.4byte	.LLST173
+	.4byte	.LLST180
 	.uleb128 0x2c
-	.4byte	.LASF602
+	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x64
-	.4byte	.LLST174
+	.4byte	.LLST181
 	.uleb128 0x2c
-	.4byte	.LASF593
+	.4byte	.LASF591
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x47c9
-	.4byte	.LLST175
+	.4byte	0x4789
+	.4byte	.LLST182
 	.uleb128 0x2c
-	.4byte	.LASF505
+	.4byte	.LASF504
 	.byte	0x4
 	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST176
-	.uleb128 0x46
-	.4byte	.LASF603
+	.4byte	0x301
+	.4byte	.LLST183
+	.uleb128 0x47
+	.4byte	.LASF601
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x5b
-	.4byte	.LASF363
-	.4byte	0x1b00
+	.uleb128 0x5d
+	.4byte	.LASF362
+	.4byte	0x1af3
 	.uleb128 0x2d
-	.4byte	0x17d1
-	.4byte	.LBB420
-	.4byte	.Ldebug_ranges0+0x158
+	.4byte	0x17c6
+	.4byte	.LBB443
+	.4byte	.Ldebug_ranges0+0x1c8
 	.byte	0x4
 	.byte	0x5f
-	.4byte	0x4a48
+	.4byte	0x4a08
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x158
+	.4byte	.Ldebug_ranges0+0x1c8
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
+	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x158
+	.4byte	.Ldebug_ranges0+0x1c8
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL841
-	.4byte	0x671c
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL835
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL832
+	.4byte	0x17c6
+	.uleb128 0x31
 	.4byte	.LVL837
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL842
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL838
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL839
+	.4byte	0x1954
+	.uleb128 0x31
+	.4byte	.LVL840
+	.4byte	0x19ea
+	.uleb128 0x31
 	.4byte	.LVL843
-	.4byte	0x19f5
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL844
-	.4byte	0x195f
-	.uleb128 0x24
-	.4byte	.LVL845
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL848
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL849
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL851
-	.4byte	0x177a
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL846
+	.4byte	0x176f
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF604
+	.uleb128 0x49
+	.4byte	.LASF602
 	.byte	0x4
 	.byte	0x41
-	.4byte	.LFB165
-	.4byte	.LFE165-.LFB165
+	.4byte	.LFB175
+	.4byte	.LFE175-.LFB175
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4aef
+	.4byte	0x4aaf
 	.uleb128 0x23
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x4
 	.byte	0x41
-	.4byte	0x63b
-	.4byte	.LLST111
+	.4byte	0x630
+	.4byte	.LLST116
 	.uleb128 0x23
-	.4byte	.LASF605
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x41
-	.4byte	0x544
-	.4byte	.LLST112
+	.4byte	0x539
+	.4byte	.LLST117
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x43
-	.4byte	0x317
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x29d0
+	.4byte	0x30c
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6533
-	.uleb128 0x24
-	.4byte	.LVL522
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL523
-	.4byte	0x6727
+	.4byte	__func__.6451
+	.uleb128 0x31
+	.4byte	.LVL539
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL540
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF606
+	.uleb128 0x5e
+	.4byte	.LASF604
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2a
-	.4byte	.LASF607
+	.4byte	.LASF605
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x64
-	.4byte	.LFB163
-	.4byte	.LFE163-.LFB163
+	.4byte	.LFB173
+	.4byte	.LFE173-.LFB173
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b52
+	.4byte	0x4b12
 	.uleb128 0x23
-	.4byte	.LASF179
+	.4byte	.LASF178
 	.byte	0x4
 	.byte	0x17
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST16
-	.uleb128 0x49
+	.uleb128 0x4a
 	.ascii	"die\000"
 	.byte	0x4
 	.byte	0x19
-	.4byte	0x317
+	.4byte	0x30c
 	.4byte	.LLST17
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x1a
-	.4byte	0x317
-	.uleb128 0x34
-	.4byte	.LASF605
+	.4byte	0x30c
+	.uleb128 0x35
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x1b
-	.4byte	0x544
+	.4byte	0x539
 	.uleb128 0x2c
-	.4byte	.LASF370
+	.4byte	.LASF369
 	.byte	0x4
 	.byte	0x1c
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST18
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF608
+	.4byte	.LASF606
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x64
-	.4byte	.LFB162
-	.4byte	.LFE162-.LFB162
+	.4byte	.LFB172
+	.4byte	.LFE172-.LFB172
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ba9
+	.4byte	0x4b69
 	.uleb128 0x23
-	.4byte	.LASF179
+	.4byte	.LASF178
 	.byte	0x4
 	.byte	0x4
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST14
-	.uleb128 0x49
+	.uleb128 0x4a
 	.ascii	"die\000"
 	.byte	0x4
 	.byte	0x6
-	.4byte	0x317
+	.4byte	0x30c
 	.4byte	.LLST15
-	.uleb128 0x34
-	.4byte	.LASF605
+	.uleb128 0x35
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x7
-	.4byte	0x544
-	.uleb128 0x34
-	.4byte	.LASF370
+	.4byte	0x539
+	.uleb128 0x35
+	.4byte	.LASF369
 	.byte	0x4
 	.byte	0x8
-	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL41
-	.4byte	0x6727
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL43
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF670
+	.uleb128 0x5f
+	.4byte	.LASF668
 	.byte	0x3
-	.2byte	0x4bb
-	.4byte	0x317
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
+	.2byte	0x4bd
+	.4byte	0x30c
+	.4byte	.LFB171
+	.4byte	.LFE171-.LFB171
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x3a
-	.4byte	.LASF609
+	.uleb128 0x3b
+	.4byte	.LASF607
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x64
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
+	.4byte	.LFB170
+	.4byte	.LFE170-.LFB170
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c13
-	.uleb128 0x43
-	.4byte	.LASF94
+	.4byte	0x4bd3
+	.uleb128 0x44
+	.4byte	.LASF93
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x99
-	.4byte	.LLST283
-	.uleb128 0x43
-	.4byte	.LASF115
+	.4byte	.LLST294
+	.uleb128 0x44
+	.4byte	.LASF114
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x99
-	.4byte	.LLST284
-	.uleb128 0x4d
+	.4byte	.LLST295
+	.uleb128 0x4e
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b6
-	.4byte	0x4c13
-	.4byte	.LLST285
+	.2byte	0x4b8
+	.4byte	0x4bd3
+	.4byte	.LLST296
 	.uleb128 0x24
-	.4byte	.LVL1560
-	.4byte	0x4d3f
+	.4byte	.LVL1561
+	.4byte	0x4cff
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x79
-	.uleb128 0x3a
-	.4byte	.LASF610
+	.uleb128 0x3b
+	.4byte	.LASF608
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x64
-	.4byte	.LFB159
-	.4byte	.LFE159-.LFB159
+	.4byte	.LFB169
+	.4byte	.LFE169-.LFB169
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c6d
-	.uleb128 0x43
-	.4byte	.LASF94
+	.4byte	0x4c2d
+	.uleb128 0x44
+	.4byte	.LASF93
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x99
-	.4byte	.LLST269
-	.uleb128 0x43
-	.4byte	.LASF115
+	.4byte	.LLST280
+	.uleb128 0x44
+	.4byte	.LASF114
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x99
-	.4byte	.LLST270
-	.uleb128 0x4d
+	.4byte	.LLST281
+	.uleb128 0x4e
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b0
-	.4byte	0x4c13
-	.4byte	.LLST271
+	.2byte	0x4b3
+	.4byte	0x4bd3
+	.4byte	.LLST282
 	.uleb128 0x24
-	.4byte	.LVL1458
-	.4byte	0x50ca
+	.4byte	.LVL1460
+	.4byte	0x507c
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF611
+	.uleb128 0x4d
+	.4byte	.LASF609
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x64
-	.4byte	.LFB158
-	.4byte	.LFE158-.LFB158
+	.4byte	.LFB168
+	.4byte	.LFE168-.LFB168
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d3f
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x481
-	.4byte	0x317
-	.4byte	.LLST234
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x481
-	.4byte	0x317
-	.4byte	.LLST235
+	.4byte	0x4cff
 	.uleb128 0x44
-	.4byte	.LASF518
-	.byte	0x3
-	.2byte	0x483
-	.4byte	0x30c
-	.4byte	.LLST236
-	.uleb128 0x3e
-	.ascii	"tmp\000"
+	.4byte	.LASF514
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0x30c
-	.uleb128 0x51
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x485
-	.4byte	0x317
-	.4byte	.LLST237
+	.4byte	.LLST245
 	.uleb128 0x44
-	.4byte	.LASF447
+	.4byte	.LASF515
 	.byte	0x3
-	.2byte	0x486
-	.4byte	0x317
-	.4byte	.LLST238
-	.uleb128 0x44
-	.4byte	.LASF424
+	.2byte	0x484
+	.4byte	0x30c
+	.4byte	.LLST246
+	.uleb128 0x45
+	.4byte	.LASF517
 	.byte	0x3
 	.2byte	0x486
-	.4byte	0x317
-	.4byte	.LLST239
-	.uleb128 0x3d
-	.4byte	.LASF413
+	.4byte	0x301
+	.4byte	.LLST247
+	.uleb128 0x3f
+	.ascii	"tmp\000"
 	.byte	0x3
 	.2byte	0x487
+	.4byte	0x301
+	.uleb128 0x52
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x488
 	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL1226
-	.4byte	0x4f6d
-	.uleb128 0x24
-	.4byte	.LVL1232
-	.4byte	0x39f7
-	.uleb128 0x24
+	.4byte	.LLST248
+	.uleb128 0x45
+	.4byte	.LASF446
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0x30c
+	.4byte	.LLST249
+	.uleb128 0x45
+	.4byte	.LASF423
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0x30c
+	.4byte	.LLST250
+	.uleb128 0x3e
+	.4byte	.LASF412
+	.byte	0x3
+	.2byte	0x48a
+	.4byte	0x301
+	.uleb128 0x31
 	.4byte	.LVL1233
-	.4byte	0x3593
-	.uleb128 0x24
-	.4byte	.LVL1234
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1235
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1238
-	.4byte	0x455a
-	.uleb128 0x24
+	.4byte	0x4f1f
+	.uleb128 0x31
 	.4byte	.LVL1239
-	.4byte	0x233b
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1240
+	.4byte	0x3598
+	.uleb128 0x31
+	.4byte	.LVL1241
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1244
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1245
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1246
+	.4byte	0x232e
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF612
+	.uleb128 0x4d
+	.4byte	.LASF610
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x64
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
+	.4byte	.LFB167
+	.4byte	.LFE167-.LFB167
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f6d
-	.uleb128 0x4d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x301
-	.4byte	.LLST272
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x317
-	.4byte	.LLST273
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x317
-	.4byte	.LLST274
-	.uleb128 0x43
-	.4byte	.LASF517
-	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x384f
-	.4byte	.LLST275
-	.uleb128 0x3d
-	.4byte	.LASF381
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0x1d4c
-	.uleb128 0x51
-	.ascii	"lpa\000"
+	.byte	0x9c
+	.4byte	0x4f1f
+	.uleb128 0x4e
+	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x317
-	.4byte	.LLST276
+	.4byte	0x2f6
+	.4byte	.LLST283
 	.uleb128 0x44
-	.4byte	.LASF613
+	.4byte	.LASF514
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x317
-	.4byte	.LLST277
+	.4byte	0x30c
+	.4byte	.LLST284
 	.uleb128 0x44
-	.4byte	.LASF614
+	.4byte	.LASF515
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x317
-	.4byte	.LLST278
+	.4byte	0x30c
+	.4byte	.LLST285
 	.uleb128 0x44
-	.4byte	.LASF447
+	.4byte	.LASF516
 	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0x317
-	.4byte	.LLST279
+	.2byte	0x3c1
+	.4byte	0x385a
+	.4byte	.LLST286
 	.uleb128 0x3e
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0x317
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x317
-	.4byte	.LLST280
-	.uleb128 0x44
-	.4byte	.LASF615
+	.4byte	.LASF380
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x317
-	.4byte	.LLST281
-	.uleb128 0x3d
-	.4byte	.LASF378
+	.4byte	0x1d3f
+	.uleb128 0x52
+	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF616
+	.2byte	0x3c4
+	.4byte	0x30c
+	.4byte	.LLST287
+	.uleb128 0x45
+	.4byte	.LASF611
 	.byte	0x3
 	.2byte	0x3c4
-	.4byte	0x317
-	.uleb128 0x3d
-	.4byte	.LASF617
+	.4byte	0x30c
+	.4byte	.LLST288
+	.uleb128 0x45
+	.4byte	.LASF612
 	.byte	0x3
 	.2byte	0x3c4
-	.4byte	0x317
-	.uleb128 0x44
-	.4byte	.LASF423
+	.4byte	0x30c
+	.4byte	.LLST289
+	.uleb128 0x45
+	.4byte	.LASF446
 	.byte	0x3
 	.2byte	0x3c5
-	.4byte	0x12cb
-	.4byte	.LLST282
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x39f2
-	.uleb128 0x5
+	.4byte	0x30c
+	.4byte	.LLST290
+	.uleb128 0x3f
+	.ascii	"ppa\000"
 	.byte	0x3
-	.4byte	__func__.6469
+	.2byte	0x3c5
+	.4byte	0x30c
 	.uleb128 0x52
-	.4byte	.LBB516
-	.4byte	.LBE516-.LBB516
-	.4byte	0x4e8b
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0x30c
+	.4byte	.LLST291
+	.uleb128 0x45
+	.4byte	.LASF613
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0x30c
+	.4byte	.LLST292
+	.uleb128 0x3e
+	.4byte	.LASF377
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF614
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0x30c
+	.uleb128 0x3e
+	.4byte	.LASF615
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0x30c
+	.uleb128 0x45
+	.4byte	.LASF422
+	.byte	0x3
+	.2byte	0x3c8
+	.4byte	0x12c0
+	.4byte	.LLST293
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x39ff
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.6387
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x2b0
+	.4byte	0x4e46
 	.uleb128 0x1f
-	.4byte	.LASF386
+	.4byte	.LASF385
 	.byte	0x3
-	.2byte	0x43a
-	.4byte	0x338
-	.uleb128 0x3
+	.2byte	0x43d
+	.4byte	0x32d
+	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x24
+	.sleb128 -60
+	.uleb128 0x31
 	.4byte	.LVL1538
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1539
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1540
-	.4byte	0x6727
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1542
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1543
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1462
-	.4byte	0x3855
-	.uleb128 0x24
-	.4byte	.LVL1473
-	.4byte	0x4f6d
-	.uleb128 0x24
-	.4byte	.LVL1479
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1480
-	.4byte	0x4f6d
-	.uleb128 0x24
+	.uleb128 0x31
+	.4byte	.LVL1464
+	.4byte	0x3860
+	.uleb128 0x31
+	.4byte	.LVL1475
+	.4byte	0x4f1f
+	.uleb128 0x31
 	.4byte	.LVL1481
-	.4byte	0x246d
-	.uleb128 0x24
-	.4byte	.LVL1482
-	.4byte	0x246d
-	.uleb128 0x24
-	.4byte	.LVL1485
-	.4byte	0x246d
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1483
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1484
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1486
+	.4byte	0x2460
+	.uleb128 0x31
 	.4byte	.LVL1488
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1491
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1495
-	.4byte	0x1c7f
-	.uleb128 0x24
+	.4byte	0x1c72
+	.uleb128 0x31
 	.4byte	.LVL1497
-	.4byte	0x3fa5
-	.uleb128 0x24
+	.4byte	0x3fb6
+	.uleb128 0x31
 	.4byte	.LVL1498
-	.4byte	0x1e7a
-	.uleb128 0x24
+	.4byte	0x1e6d
+	.uleb128 0x31
 	.4byte	.LVL1499
-	.4byte	0x1c7f
-	.uleb128 0x24
+	.4byte	0x1c72
+	.uleb128 0x31
 	.4byte	.LVL1500
-	.4byte	0x1c7f
-	.uleb128 0x24
+	.4byte	0x1c72
+	.uleb128 0x31
 	.4byte	.LVL1505
-	.4byte	0x177a
-	.uleb128 0x24
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1510
-	.4byte	0x4f6d
-	.uleb128 0x24
-	.4byte	.LVL1512
-	.4byte	0x246d
-	.uleb128 0x24
-	.4byte	.LVL1515
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1516
-	.4byte	0x23f1
-	.uleb128 0x24
-	.4byte	.LVL1520
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL1531
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1541
-	.4byte	0x177a
-	.uleb128 0x24
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1514
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1517
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1518
+	.4byte	0x23e4
+	.uleb128 0x31
+	.4byte	.LVL1519
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL1532
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1539
+	.4byte	0x176f
+	.uleb128 0x31
 	.4byte	.LVL1544
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL1547
-	.4byte	0x177a
-	.uleb128 0x24
-	.4byte	.LVL1551
-	.4byte	0x4f91
-	.uleb128 0x24
-	.4byte	.LVL1555
-	.4byte	0x6727
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL1552
+	.4byte	0x4f43
+	.uleb128 0x31
+	.4byte	.LVL1554
+	.4byte	0x67f2
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF618
+	.uleb128 0x3b
+	.4byte	.LASF616
 	.byte	0x3
-	.2byte	0x3b5
+	.2byte	0x3b7
 	.4byte	0x64
-	.4byte	.LFB156
-	.4byte	.LFE156-.LFB156
+	.4byte	.LFB166
+	.4byte	.LFE166-.LFB166
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f91
-	.uleb128 0x24
-	.4byte	.LVL1216
-	.4byte	0x4f91
+	.4byte	0x4f43
+	.uleb128 0x31
+	.4byte	.LVL1223
+	.4byte	0x4f43
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF619
+	.uleb128 0x50
+	.4byte	.LASF617
 	.byte	0x3
-	.2byte	0x385
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
+	.2byte	0x387
+	.4byte	.LFB165
+	.4byte	.LFE165-.LFB165
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x50b5
-	.uleb128 0x4d
+	.4byte	0x5067
+	.uleb128 0x4e
 	.ascii	"req\000"
 	.byte	0x3
-	.2byte	0x385
-	.4byte	0xf4b
-	.4byte	.LLST227
-	.uleb128 0x43
-	.4byte	.LASF378
-	.byte	0x3
-	.2byte	0x385
-	.4byte	0x317
-	.4byte	.LLST228
-	.uleb128 0x43
-	.4byte	.LASF620
-	.byte	0x3
-	.2byte	0x385
-	.4byte	0x317
-	.4byte	.LLST229
-	.uleb128 0x43
-	.4byte	.LASF423
-	.byte	0x3
-	.2byte	0x385
-	.4byte	0x12cb
-	.4byte	.LLST230
-	.uleb128 0x51
-	.ascii	"i\000"
+	.2byte	0x387
+	.4byte	0xf40
+	.4byte	.LLST238
+	.uleb128 0x44
+	.4byte	.LASF377
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x317
-	.4byte	.LLST231
-	.uleb128 0x51
-	.ascii	"ppa\000"
+	.4byte	0x30c
+	.4byte	.LLST239
+	.uleb128 0x44
+	.4byte	.LASF618
 	.byte	0x3
-	.2byte	0x388
-	.4byte	0x317
-	.4byte	.LLST232
+	.2byte	0x387
+	.4byte	0x30c
+	.4byte	.LLST240
 	.uleb128 0x44
-	.4byte	.LASF447
+	.4byte	.LASF422
 	.byte	0x3
-	.2byte	0x388
-	.4byte	0x317
-	.4byte	.LLST233
-	.uleb128 0x3d
-	.4byte	.LASF406
+	.2byte	0x387
+	.4byte	0x12c0
+	.4byte	.LLST241
+	.uleb128 0x52
+	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF381
+	.4byte	.LLST242
+	.uleb128 0x52
+	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x38a
-	.4byte	0x1d4c
-	.uleb128 0x3d
-	.4byte	.LASF471
+	.4byte	0x30c
+	.4byte	.LLST243
+	.uleb128 0x45
+	.4byte	.LASF446
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0x30c
+	.4byte	.LLST244
+	.uleb128 0x3e
+	.4byte	.LASF405
+	.byte	0x3
+	.2byte	0x38b
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF380
 	.byte	0x3
-	.2byte	0x38b
-	.4byte	0x317
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x50c5
+	.2byte	0x38c
+	.4byte	0x1d3f
+	.uleb128 0x3e
+	.4byte	.LASF470
+	.byte	0x3
+	.2byte	0x38d
+	.4byte	0x30c
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x5077
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6441
-	.uleb128 0x24
-	.4byte	.LVL1195
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL1197
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL1198
-	.4byte	0x246d
-	.uleb128 0x24
-	.4byte	.LVL1199
-	.4byte	0x1e1e
-	.uleb128 0x24
-	.4byte	.LVL1200
-	.4byte	0x23f1
-	.uleb128 0x24
-	.4byte	.LVL1201
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL1203
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	__func__.6359
+	.uleb128 0x31
+	.4byte	.LVL1202
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL1204
+	.4byte	0x451a
+	.uleb128 0x31
 	.4byte	.LVL1205
-	.4byte	0x392c
-	.uleb128 0x24
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1206
+	.4byte	0x1e11
+	.uleb128 0x31
 	.4byte	.LVL1207
-	.4byte	0x455a
-	.uleb128 0x24
+	.4byte	0x23e4
+	.uleb128 0x31
+	.4byte	.LVL1208
+	.4byte	0x19ea
+	.uleb128 0x31
 	.4byte	.LVL1210
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1211
-	.4byte	0x233b
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1212
+	.4byte	0x3939
+	.uleb128 0x31
 	.4byte	.LVL1214
-	.4byte	0x6727
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1217
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1218
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1221
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x50c5
+	.4byte	0x5077
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xc
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x50b5
-	.uleb128 0x4c
-	.4byte	.LASF621
+	.4byte	0x5067
+	.uleb128 0x4d
+	.4byte	.LASF619
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x64
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
+	.4byte	.LFB164
+	.4byte	.LFE164-.LFB164
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52a7
-	.uleb128 0x4d
+	.4byte	0x525b
+	.uleb128 0x4e
 	.ascii	"LUN\000"
 	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x301
-	.4byte	.LLST254
-	.uleb128 0x43
+	.2byte	0x32d
+	.4byte	0x2f6
+	.4byte	.LLST265
+	.uleb128 0x44
+	.4byte	.LASF514
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x30c
+	.4byte	.LLST266
+	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x317
-	.4byte	.LLST255
-	.uleb128 0x43
+	.2byte	0x32d
+	.4byte	0x30c
+	.4byte	.LLST267
+	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x317
-	.4byte	.LLST256
-	.uleb128 0x43
-	.4byte	.LASF517
-	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x384f
-	.4byte	.LLST257
-	.uleb128 0x3e
+	.2byte	0x32d
+	.4byte	0x385a
+	.4byte	.LLST268
+	.uleb128 0x51
 	.ascii	"ret\000"
 	.byte	0x3
-	.2byte	0x32e
+	.2byte	0x32f
 	.4byte	0x64
-	.uleb128 0x44
-	.4byte	.LASF613
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x45
+	.4byte	.LASF611
 	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x317
-	.4byte	.LLST258
-	.uleb128 0x44
-	.4byte	.LASF614
+	.2byte	0x330
+	.4byte	0x30c
+	.4byte	.LLST269
+	.uleb128 0x45
+	.4byte	.LASF612
 	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x317
-	.4byte	.LLST259
-	.uleb128 0x44
-	.4byte	.LASF622
+	.2byte	0x330
+	.4byte	0x30c
+	.4byte	.LLST270
+	.uleb128 0x45
+	.4byte	.LASF620
 	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x317
-	.4byte	.LLST260
-	.uleb128 0x51
+	.2byte	0x330
+	.4byte	0x30c
+	.4byte	.LLST271
+	.uleb128 0x52
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x330
-	.4byte	0x317
-	.4byte	.LLST261
-	.uleb128 0x51
+	.2byte	0x331
+	.4byte	0x30c
+	.4byte	.LLST272
+	.uleb128 0x52
 	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x330
-	.4byte	0x317
-	.4byte	.LLST262
-	.uleb128 0x51
+	.2byte	0x331
+	.4byte	0x30c
+	.4byte	.LLST273
+	.uleb128 0x52
 	.ascii	"n\000"
 	.byte	0x3
-	.2byte	0x332
-	.4byte	0x317
-	.4byte	.LLST263
-	.uleb128 0x44
-	.4byte	.LASF378
-	.byte	0x3
-	.2byte	0x332
-	.4byte	0x317
-	.4byte	.LLST264
-	.uleb128 0x44
-	.4byte	.LASF615
-	.byte	0x3
-	.2byte	0x332
-	.4byte	0x317
-	.4byte	.LLST265
-	.uleb128 0x44
-	.4byte	.LASF623
+	.2byte	0x333
+	.4byte	0x30c
+	.4byte	.LLST274
+	.uleb128 0x45
+	.4byte	.LASF377
 	.byte	0x3
 	.2byte	0x333
-	.4byte	0x317
-	.4byte	.LLST266
-	.uleb128 0x3d
-	.4byte	.LASF624
+	.4byte	0x30c
+	.4byte	.LLST275
+	.uleb128 0x45
+	.4byte	.LASF613
 	.byte	0x3
 	.2byte	0x333
-	.4byte	0x317
-	.uleb128 0x44
-	.4byte	.LASF625
+	.4byte	0x30c
+	.4byte	.LLST276
+	.uleb128 0x45
+	.4byte	.LASF621
 	.byte	0x3
 	.2byte	0x334
-	.4byte	0x317
-	.4byte	.LLST267
-	.uleb128 0x44
-	.4byte	.LASF626
+	.4byte	0x30c
+	.4byte	.LLST277
+	.uleb128 0x3e
+	.4byte	.LASF622
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0x30c
+	.uleb128 0x45
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x335
-	.4byte	0x317
-	.4byte	.LLST268
-	.uleb128 0x52
-	.4byte	.LBB515
-	.4byte	.LBE515-.LBB515
-	.4byte	0x5216
-	.uleb128 0x3d
-	.4byte	.LASF393
+	.4byte	0x30c
+	.4byte	.LLST278
+	.uleb128 0x45
+	.4byte	.LASF624
 	.byte	0x3
-	.2byte	0x379
+	.2byte	0x336
 	.4byte	0x30c
-	.uleb128 0x24
-	.4byte	.LVL1443
-	.4byte	0x455a
-	.uleb128 0x24
-	.4byte	.LVL1444
-	.4byte	0x1e7a
-	.byte	0
+	.4byte	.LLST279
 	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB512
-	.4byte	.LBE512-.LBB512
+	.4byte	.LBB537
+	.4byte	.LBE537-.LBB537
+	.4byte	0x51ca
+	.uleb128 0x3e
+	.4byte	.LASF392
+	.byte	0x3
+	.2byte	0x37a
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL1432
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL1433
+	.4byte	0x1e6d
+	.byte	0
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB538
+	.4byte	.LBE538-.LBB538
 	.byte	0x3
-	.2byte	0x34f
-	.4byte	0x5270
+	.2byte	0x350
+	.4byte	0x5224
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB513
-	.4byte	.LBE513-.LBB513
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB539
+	.4byte	.LBE539-.LBB539
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB514
-	.4byte	.LBE514-.LBB514
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB540
+	.4byte	.LBE540-.LBB540
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL1428
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL1437
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1390
-	.4byte	0x3781
-	.uleb128 0x24
-	.4byte	.LVL1396
-	.4byte	0x4f6d
-	.uleb128 0x24
-	.4byte	.LVL1411
-	.4byte	0x1c7f
-	.uleb128 0x24
-	.4byte	.LVL1414
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1434
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1440
-	.4byte	0x177a
+	.uleb128 0x31
+	.4byte	.LVL1392
+	.4byte	0x378a
+	.uleb128 0x31
+	.4byte	.LVL1398
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1413
+	.4byte	0x1c72
+	.uleb128 0x31
+	.4byte	.LVL1416
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1423
+	.4byte	0x1af8
+	.uleb128 0x31
+	.4byte	.LVL1429
+	.4byte	0x176f
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF627
+	.uleb128 0x3b
+	.4byte	.LASF625
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x64
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
+	.4byte	.LFB163
+	.4byte	.LFE163-.LFB163
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52cb
-	.uleb128 0x24
-	.4byte	.LVL1221
-	.4byte	0x52cb
+	.4byte	0x527f
+	.uleb128 0x31
+	.4byte	.LVL1228
+	.4byte	0x527f
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF628
+	.uleb128 0x3b
+	.4byte	.LASF626
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x64
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
+	.4byte	.LFB162
+	.4byte	.LFE162-.LFB162
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x530a
-	.uleb128 0x24
-	.4byte	.LVL1217
-	.4byte	0x4f6d
-	.uleb128 0x24
-	.4byte	.LVL1218
-	.4byte	0x39f7
-	.uleb128 0x24
-	.4byte	.LVL1219
-	.4byte	0x3734
-	.uleb128 0x24
-	.4byte	.LVL1220
-	.4byte	0x3593
+	.4byte	0x52be
+	.uleb128 0x31
+	.4byte	.LVL1224
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1225
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1226
+	.4byte	0x373d
+	.uleb128 0x31
+	.4byte	.LVL1227
+	.4byte	0x3598
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF629
+	.uleb128 0x3b
+	.4byte	.LASF627
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x64
-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
+	.4byte	.LFB161
+	.4byte	.LFE161-.LFB161
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5399
-	.uleb128 0x3d
-	.4byte	.LASF630
+	.4byte	0x534d
+	.uleb128 0x3e
+	.4byte	.LASF628
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x5399
-	.uleb128 0x3f
-	.4byte	.LASF631
+	.4byte	0x534d
+	.uleb128 0x40
+	.4byte	.LASF629
 	.byte	0x3
 	.2byte	0x2f3
-	.uleb128 0x52
-	.4byte	.LBB524
-	.4byte	.LBE524-.LBB524
-	.4byte	0x5359
-	.uleb128 0x3e
+	.uleb128 0x53
+	.4byte	.LBB550
+	.4byte	.LBE550-.LBB550
+	.4byte	0x530d
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
-	.4byte	0x317
-	.uleb128 0x24
-	.4byte	.LVL1644
-	.4byte	0x1c7f
+	.4byte	0x30c
+	.uleb128 0x31
+	.4byte	.LVL1647
+	.4byte	0x1c72
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1637
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1638
-	.4byte	0x586d
-	.uleb128 0x24
-	.4byte	.LVL1639
-	.4byte	0x56e5
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL1640
-	.4byte	0x55e9
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
 	.4byte	.LVL1641
-	.4byte	0x4400
-	.uleb128 0x24
+	.4byte	0x5821
+	.uleb128 0x31
 	.4byte	.LVL1642
-	.4byte	0x482d
-	.uleb128 0x24
+	.4byte	0x5699
+	.uleb128 0x31
 	.4byte	.LVL1643
-	.4byte	0x2812
+	.4byte	0x559d
+	.uleb128 0x31
+	.4byte	.LVL1644
+	.4byte	0x43c0
+	.uleb128 0x31
+	.4byte	.LVL1645
+	.4byte	0x47ed
+	.uleb128 0x31
+	.4byte	.LVL1646
+	.4byte	0x2815
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x424
-	.uleb128 0x4c
-	.4byte	.LASF632
+	.4byte	0x419
+	.uleb128 0x4d
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x64
-	.4byte	.LFB150
-	.4byte	.LFE150-.LFB150
+	.4byte	.LFB160
+	.4byte	.LFE160-.LFB160
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5498
-	.uleb128 0x3d
-	.4byte	.LASF501
+	.4byte	0x544c
+	.uleb128 0x3e
+	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x270
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF633
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x270
-	.4byte	0x30c
-	.4byte	.LLST288
-	.uleb128 0x44
-	.4byte	.LASF634
+	.4byte	0x301
+	.4byte	.LLST299
+	.uleb128 0x45
+	.4byte	.LASF632
 	.byte	0x3
 	.2byte	0x271
-	.4byte	0x30c
-	.4byte	.LLST289
-	.uleb128 0x3e
+	.4byte	0x301
+	.4byte	.LLST300
+	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
-	.4byte	0x30c
-	.uleb128 0x47
-	.4byte	.LASF635
+	.4byte	0x301
+	.uleb128 0x48
+	.4byte	.LASF633
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1750
-	.uleb128 0x47
-	.4byte	.LASF636
+	.4byte	.L1784
+	.uleb128 0x48
+	.4byte	.LASF634
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1752
-	.uleb128 0x24
-	.4byte	.LVL1606
-	.4byte	0x4400
-	.uleb128 0x24
-	.4byte	.LVL1607
-	.4byte	0x482d
-	.uleb128 0x24
-	.4byte	.LVL1608
-	.4byte	0x4605
-	.uleb128 0x24
-	.4byte	.LVL1615
-	.4byte	0x4994
-	.uleb128 0x24
-	.4byte	.LVL1616
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL1617
-	.4byte	0x17d1
-	.uleb128 0x24
+	.4byte	.L1786
+	.uleb128 0x31
+	.4byte	.LVL1609
+	.4byte	0x43c0
+	.uleb128 0x31
+	.4byte	.LVL1610
+	.4byte	0x47ed
+	.uleb128 0x31
+	.4byte	.LVL1611
+	.4byte	0x45c5
+	.uleb128 0x31
 	.4byte	.LVL1618
-	.4byte	0x2c52
-	.uleb128 0x24
+	.4byte	0x4954
+	.uleb128 0x31
+	.4byte	.LVL1619
+	.4byte	0x17c6
+	.uleb128 0x31
 	.4byte	.LVL1620
-	.4byte	0x5498
-	.uleb128 0x24
-	.4byte	.LVL1624
-	.4byte	0x58be
-	.uleb128 0x24
-	.4byte	.LVL1625
-	.4byte	0x4400
-	.uleb128 0x24
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL1621
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1623
+	.4byte	0x544c
+	.uleb128 0x31
 	.4byte	.LVL1627
-	.4byte	0x5498
-	.uleb128 0x24
-	.4byte	.LVL1629
-	.4byte	0x5498
-	.uleb128 0x24
-	.4byte	.LVL1633
-	.4byte	0x2c52
-	.uleb128 0x24
-	.4byte	.LVL1634
-	.4byte	0x424d
-	.uleb128 0x24
-	.4byte	.LVL1635
-	.4byte	0x3593
-	.uleb128 0x24
+	.4byte	0x5872
+	.uleb128 0x31
+	.4byte	.LVL1628
+	.4byte	0x43c0
+	.uleb128 0x31
+	.4byte	.LVL1630
+	.4byte	0x544c
+	.uleb128 0x31
+	.4byte	.LVL1632
+	.4byte	0x544c
+	.uleb128 0x31
 	.4byte	.LVL1636
-	.4byte	0x2812
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1637
+	.4byte	0x4247
+	.uleb128 0x31
+	.4byte	.LVL1638
+	.4byte	0x3598
+	.uleb128 0x31
+	.4byte	.LVL1639
+	.4byte	0x2815
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF637
+	.uleb128 0x3b
+	.4byte	.LASF635
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x64
-	.4byte	.LFB149
-	.4byte	.LFE149-.LFB149
+	.4byte	.LFB159
+	.4byte	.LFE159-.LFB159
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x55bf
-	.uleb128 0x43
-	.4byte	.LASF501
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x30c
-	.4byte	.LLST96
-	.uleb128 0x43
-	.4byte	.LASF638
+	.4byte	0x5573
+	.uleb128 0x44
+	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x301
-	.4byte	.LLST97
+	.4byte	.LLST99
 	.uleb128 0x44
-	.4byte	.LASF633
+	.4byte	.LASF636
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0x2f6
+	.4byte	.LLST100
+	.uleb128 0x45
+	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x211
-	.4byte	0x30c
-	.4byte	.LLST98
-	.uleb128 0x3d
-	.4byte	.LASF358
+	.4byte	0x301
+	.4byte	.LLST101
+	.uleb128 0x3e
+	.4byte	.LASF357
 	.byte	0x3
 	.2byte	0x211
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF377
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF376
 	.byte	0x3
 	.2byte	0x212
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF179
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF178
 	.byte	0x3
 	.2byte	0x212
-	.4byte	0x30c
-	.uleb128 0x44
-	.4byte	.LASF639
+	.4byte	0x301
+	.uleb128 0x45
+	.4byte	.LASF637
 	.byte	0x3
 	.2byte	0x213
-	.4byte	0x30c
-	.4byte	.LLST99
-	.uleb128 0x44
-	.4byte	.LASF640
+	.4byte	0x301
+	.4byte	.LLST102
+	.uleb128 0x45
+	.4byte	.LASF638
 	.byte	0x3
 	.2byte	0x214
-	.4byte	0x30c
-	.4byte	.LLST100
-	.uleb128 0x44
-	.4byte	.LASF641
+	.4byte	0x301
+	.4byte	.LLST103
+	.uleb128 0x45
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x215
-	.4byte	0x30c
-	.4byte	.LLST101
-	.uleb128 0x44
-	.4byte	.LASF642
+	.4byte	0x301
+	.4byte	.LLST104
+	.uleb128 0x45
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x216
-	.4byte	0x30c
-	.4byte	.LLST102
-	.uleb128 0x47
-	.4byte	.LASF643
+	.4byte	0x301
+	.4byte	.LLST105
+	.uleb128 0x48
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L488
-	.uleb128 0x24
-	.4byte	.LVL413
-	.4byte	0x195f
-	.uleb128 0x24
-	.4byte	.LVL423
-	.4byte	0x19f5
-	.uleb128 0x24
-	.4byte	.LVL434
-	.4byte	0x195f
-	.uleb128 0x24
-	.4byte	.LVL436
-	.4byte	0x45c2
-	.uleb128 0x24
-	.4byte	.LVL437
-	.4byte	0x55bf
-	.uleb128 0x24
-	.4byte	.LVL438
-	.4byte	0x4af7
-	.uleb128 0x24
+	.4byte	.L482
+	.uleb128 0x31
+	.4byte	.LVL424
+	.4byte	0x1954
+	.uleb128 0x31
+	.4byte	.LVL431
+	.4byte	0x19ea
+	.uleb128 0x31
+	.4byte	.LVL439
+	.4byte	0x1954
+	.uleb128 0x31
 	.4byte	.LVL443
-	.4byte	0x4b52
-	.uleb128 0x24
-	.4byte	.LVL446
-	.4byte	0x45c2
-	.uleb128 0x24
-	.4byte	.LVL447
-	.4byte	0x55bf
-	.uleb128 0x24
-	.4byte	.LVL448
-	.4byte	0x4af7
-	.uleb128 0x24
-	.4byte	.LVL453
-	.4byte	0x4b52
-	.uleb128 0x24
+	.4byte	0x4582
+	.uleb128 0x31
+	.4byte	.LVL444
+	.4byte	0x5573
+	.uleb128 0x31
+	.4byte	.LVL445
+	.4byte	0x4ab7
+	.uleb128 0x31
+	.4byte	.LVL450
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL455
+	.4byte	0x4582
+	.uleb128 0x31
 	.4byte	.LVL456
-	.4byte	0x4367
+	.4byte	0x5573
+	.uleb128 0x31
+	.4byte	.LVL457
+	.4byte	0x4ab7
+	.uleb128 0x31
+	.4byte	.LVL460
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL462
+	.4byte	0x436d
 	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF644
+	.uleb128 0x3c
+	.4byte	.LASF642
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x55e9
-	.uleb128 0x3c
-	.4byte	.LASF179
+	.4byte	0x559d
+	.uleb128 0x3d
+	.4byte	.LASF178
 	.byte	0x3
 	.2byte	0x201
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF645
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF643
 	.byte	0x3
 	.2byte	0x203
-	.4byte	0x30c
+	.4byte	0x301
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF646
+	.uleb128 0x3b
+	.4byte	.LASF644
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x64
-	.4byte	.LFB147
-	.4byte	.LFE147-.LFB147
+	.4byte	.LFB157
+	.4byte	.LFE157-.LFB157
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x56e5
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB409
-	.4byte	.LBE409-.LBB409
+	.4byte	0x5699
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB432
+	.4byte	.LBE432-.LBB432
 	.byte	0x3
 	.2byte	0x1f9
-	.4byte	0x565d
+	.4byte	0x5611
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB410
-	.4byte	.LBE410-.LBB410
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB433
+	.4byte	.LBE433-.LBB433
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB434
+	.4byte	.LBE434-.LBB434
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL771
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL764
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	0x17d1
-	.4byte	.LBB412
-	.4byte	.LBE412-.LBB412
+	.uleb128 0x54
+	.4byte	0x17c6
+	.4byte	.LBB435
+	.4byte	.LBE435-.LBB435
 	.byte	0x3
 	.2byte	0x1fa
-	.4byte	0x56b7
+	.4byte	0x566b
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB413
-	.4byte	.LBE413-.LBB413
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB436
+	.4byte	.LBE436-.LBB436
 	.uleb128 0x2e
-	.4byte	0x17f3
+	.4byte	0x17e8
 	.uleb128 0x2e
-	.4byte	0x17ea
+	.4byte	0x17df
 	.uleb128 0x2e
-	.4byte	0x17e1
-	.uleb128 0x32
-	.4byte	.LBB414
-	.4byte	.LBE414-.LBB414
+	.4byte	0x17d6
+	.uleb128 0x33
+	.4byte	.LBB437
+	.4byte	.LBE437-.LBB437
 	.uleb128 0x30
-	.4byte	0x6134
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x6139
-	.uleb128 0x24
-	.4byte	.LVL772
-	.4byte	0x6732
+	.4byte	0x6201
+	.uleb128 0x31
+	.4byte	.LVL765
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL768
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL769
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL770
-	.4byte	0x17d1
-	.uleb128 0x24
-	.4byte	.LVL773
-	.4byte	0x231c
-	.uleb128 0x24
-	.4byte	.LVL774
-	.4byte	0x31c5
+	.uleb128 0x31
+	.4byte	.LVL761
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL762
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL763
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL766
+	.4byte	0x230f
+	.uleb128 0x31
+	.4byte	.LVL767
+	.4byte	0x31cc
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF647
+	.uleb128 0x3b
+	.4byte	.LASF645
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x64
-	.4byte	.LFB146
-	.4byte	.LFE146-.LFB146
+	.4byte	.LFB156
+	.4byte	.LFE156-.LFB156
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x586d
-	.uleb128 0x51
+	.4byte	0x5821
+	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x118
-	.4byte	0x317
-	.4byte	.LLST110
-	.uleb128 0x3d
-	.4byte	.LASF648
+	.4byte	0x30c
+	.4byte	.LLST115
+	.uleb128 0x3e
+	.4byte	.LASF646
 	.byte	0x3
 	.2byte	0x119
-	.4byte	0x317
-	.uleb128 0x37
-	.4byte	.LASF363
-	.4byte	0x48ed
+	.4byte	0x30c
+	.uleb128 0x38
+	.4byte	.LASF362
+	.4byte	0x48ad
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6317
-	.uleb128 0x24
-	.4byte	.LVL479
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL480
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL481
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL482
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL483
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL484
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL485
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL486
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL487
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL488
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL489
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL490
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL491
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL492
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL493
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL494
-	.4byte	0x6748
-	.uleb128 0x24
-	.4byte	.LVL495
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	__func__.6235
+	.uleb128 0x31
 	.4byte	.LVL496
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL497
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL498
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL499
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL500
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL501
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL502
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL503
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL504
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL505
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL506
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL507
-	.4byte	0x17d1
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL508
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL509
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL510
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL511
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL512
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL513
-	.4byte	0x6748
-	.uleb128 0x24
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL514
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL515
+	.4byte	0x6813
+	.uleb128 0x31
 	.4byte	.LVL516
-	.4byte	0x6727
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL517
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL518
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL519
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL520
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL521
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL522
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL523
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL524
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL525
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL526
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL527
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL528
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL529
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL530
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL533
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF649
+	.4byte	.LASF647
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x64
-	.4byte	.LFB145
-	.4byte	.LFE145-.LFB145
+	.4byte	.LFB155
+	.4byte	.LFE155-.LFB155
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58be
+	.4byte	0x5872
 	.uleb128 0x23
-	.4byte	.LASF630
+	.4byte	.LASF628
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x5399
+	.4byte	0x534d
 	.4byte	.LLST11
-	.uleb128 0x49
+	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0xb8
-	.4byte	0x317
+	.4byte	0x30c
 	.4byte	.LLST12
-	.uleb128 0x24
-	.4byte	.LVL27
-	.4byte	0x58ff
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL28
-	.4byte	0x58ff
-	.uleb128 0x24
+	.4byte	0x58b3
+	.uleb128 0x31
+	.4byte	.LVL29
+	.4byte	0x58b3
+	.uleb128 0x31
 	.4byte	.LVL32
-	.4byte	0x58be
+	.4byte	0x5872
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF650
+	.4byte	.LASF648
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x64
-	.4byte	.LFB144
-	.4byte	.LFE144-.LFB144
+	.4byte	.LFB154
+	.4byte	.LFE154-.LFB154
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58e7
+	.4byte	0x589b
 	.uleb128 0x23
-	.4byte	.LASF651
+	.4byte	.LASF649
 	.byte	0x3
 	.byte	0xa4
-	.4byte	0x30c
+	.4byte	0x301
 	.4byte	.LLST10
 	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF652
+	.uleb128 0x58
+	.4byte	.LASF650
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x58ff
-	.uleb128 0x33
-	.4byte	.LASF653
+	.4byte	0x58b3
+	.uleb128 0x34
+	.4byte	.LASF651
 	.byte	0x3
 	.byte	0x9e
-	.4byte	0x317
+	.4byte	0x30c
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF654
+	.4byte	.LASF652
 	.byte	0x3
-	.byte	0x7f
-	.4byte	0x30c
-	.4byte	.LFB142
-	.4byte	.LFE142-.LFB142
+	.byte	0x7e
+	.4byte	0x301
+	.4byte	.LFB152
+	.4byte	.LFE152-.LFB152
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x593e
+	.4byte	0x58f2
 	.uleb128 0x2b
 	.ascii	"num\000"
 	.byte	0x3
-	.byte	0x7f
-	.4byte	0x317
+	.byte	0x7e
+	.4byte	0x30c
 	.4byte	.LLST9
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
-	.byte	0x81
-	.4byte	0x30c
+	.byte	0x80
+	.4byte	0x301
 	.uleb128 0x20
-	.4byte	.LASF655
+	.4byte	.LASF653
 	.byte	0x3
-	.byte	0x82
-	.4byte	0x317
+	.byte	0x81
+	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF656
+	.4byte	.LASF654
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0x64
-	.4byte	.LFB141
-	.4byte	.LFE141-.LFB141
+	.4byte	.LFB151
+	.4byte	.LFE151-.LFB151
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5984
+	.4byte	0x5938
 	.uleb128 0x23
-	.4byte	.LASF86
+	.4byte	.LASF85
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0xb6
-	.4byte	.LLST63
+	.4byte	.LLST65
 	.uleb128 0x29
 	.ascii	"buf\000"
 	.byte	0x3
-	.byte	0x73
+	.byte	0x72
 	.4byte	0xb6
-	.uleb128 0x24
-	.4byte	.LVL282
-	.4byte	0x6753
-	.uleb128 0x24
-	.4byte	.LVL283
-	.4byte	0x5984
+	.uleb128 0x31
+	.4byte	.LVL286
+	.4byte	0x681e
+	.uleb128 0x31
+	.4byte	.LVL287
+	.4byte	0x5938
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF657
+	.4byte	.LASF655
 	.byte	0x3
 	.byte	0xa
 	.4byte	0x64
-	.4byte	.LFB140
-	.4byte	.LFE140-.LFB140
+	.4byte	.LFB150
+	.4byte	.LFE150-.LFB150
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c7a
+	.4byte	0x5c2e
 	.uleb128 0x23
-	.4byte	.LASF86
+	.4byte	.LASF85
 	.byte	0x3
 	.byte	0xa
 	.4byte	0xb6
-	.4byte	.LLST60
+	.4byte	.LLST62
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
@@ -36004,1309 +33159,1412 @@ check_vpc_table:
 	.byte	0x3
 	.byte	0xd
 	.4byte	0xb6
-	.uleb128 0x52
-	.4byte	.LBB282
-	.4byte	.LBE282-.LBB282
-	.4byte	0x59ef
+	.uleb128 0x53
+	.4byte	.LBB289
+	.4byte	.LBE289-.LBB289
+	.4byte	0x59a3
 	.uleb128 0x2c
-	.4byte	.LASF393
+	.4byte	.LASF392
 	.byte	0x3
-	.byte	0x57
-	.4byte	0x30c
-	.4byte	.LLST61
-	.uleb128 0x24
-	.4byte	.LVL273
-	.4byte	0x3fa5
-	.uleb128 0x24
-	.4byte	.LVL275
-	.4byte	0x6753
+	.byte	0x56
+	.4byte	0x301
+	.4byte	.LLST63
+	.uleb128 0x31
+	.4byte	.LVL277
+	.4byte	0x3fb6
+	.uleb128 0x31
+	.4byte	.LVL279
+	.4byte	0x681e
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LBB283
-	.4byte	.LBE283-.LBB283
-	.4byte	0x5a15
+	.uleb128 0x53
+	.4byte	.LBB290
+	.4byte	.LBE290-.LBB290
+	.4byte	0x59c9
 	.uleb128 0x2c
-	.4byte	.LASF393
+	.4byte	.LASF392
 	.byte	0x3
-	.byte	0x60
-	.4byte	0x30c
-	.4byte	.LLST62
-	.uleb128 0x24
-	.4byte	.LVL279
-	.4byte	0x6753
+	.byte	0x5f
+	.4byte	0x301
+	.4byte	.LLST64
+	.uleb128 0x31
+	.4byte	.LVL283
+	.4byte	0x681e
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL203
-	.4byte	0x675f
-	.uleb128 0x24
-	.4byte	.LVL204
-	.4byte	0x6753
-	.uleb128 0x24
-	.4byte	.LVL205
-	.4byte	0x675f
-	.uleb128 0x24
-	.4byte	.LVL206
-	.4byte	0x6753
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL207
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x682a
+	.uleb128 0x31
 	.4byte	.LVL208
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL209
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x682a
+	.uleb128 0x31
 	.4byte	.LVL210
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL211
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL212
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL213
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL214
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL215
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL216
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL217
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL218
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL219
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL220
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL221
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL222
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL223
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL224
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL225
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL226
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL227
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL228
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL229
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL230
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL231
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL232
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL233
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL234
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL235
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL236
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL237
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL238
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL239
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL240
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL241
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL242
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL243
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL244
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL245
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL246
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL247
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL248
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL249
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL250
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL251
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL252
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL253
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL254
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL255
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL256
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL257
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL258
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL259
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL260
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL261
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL262
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL263
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL264
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL265
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL266
-	.4byte	0x2788
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL267
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL268
-	.4byte	0x2739
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL269
-	.4byte	0x6753
-	.uleb128 0x24
+	.4byte	0x681e
+	.uleb128 0x31
+	.4byte	.LVL270
+	.4byte	0x278b
+	.uleb128 0x31
+	.4byte	.LVL271
+	.4byte	0x681e
+	.uleb128 0x31
 	.4byte	.LVL272
-	.4byte	0x6753
+	.4byte	0x273c
+	.uleb128 0x31
+	.4byte	.LVL273
+	.4byte	0x681e
+	.uleb128 0x31
+	.4byte	.LVL276
+	.4byte	0x681e
 	.byte	0
-	.uleb128 0x5e
-	.4byte	0x3414
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
+	.uleb128 0x60
+	.4byte	0x3419
+	.4byte	.LFB286
+	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c9c
-	.uleb128 0x5f
-	.4byte	0x3421
+	.4byte	0x5c50
+	.uleb128 0x61
+	.4byte	0x3426
 	.4byte	.LLST8
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-	.uleb128 0x5e
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-	.uleb128 0x5f
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 	.uleb128 0x30
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-	.4byte	.LVL127
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+	.4byte	.LVL1155
+	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x5e
-	.4byte	0x1f7c
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
+	.uleb128 0x60
+	.4byte	0x1f6f
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6409
-	.uleb128 0x24
-	.4byte	.LVL1272
-	.4byte	0x1f85
-	.uleb128 0x24
-	.4byte	.LVL1273
-	.4byte	0x36a4
-	.uleb128 0x24
-	.4byte	.LVL1274
-	.4byte	0x20d1
+	.4byte	0x64d4
+	.uleb128 0x31
+	.4byte	.LVL1280
+	.4byte	0x1f78
+	.uleb128 0x31
+	.4byte	.LVL1281
+	.4byte	0x36ab
+	.uleb128 0x31
+	.4byte	.LVL1282
+	.4byte	0x20c4
 	.byte	0
-	.uleb128 0x5e
-	.4byte	0x1c7f
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
+	.uleb128 0x60
+	.4byte	0x1c72
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65fa
-	.uleb128 0x5f
-	.4byte	0x1c90
-	.4byte	.LLST245
-	.uleb128 0x5f
-	.4byte	0x1c9c
-	.4byte	.LLST246
+	.4byte	0x66c5
+	.uleb128 0x61
+	.4byte	0x1c83
+	.4byte	.LLST256
+	.uleb128 0x61
+	.4byte	0x1c8f
+	.4byte	.LLST257
 	.uleb128 0x30
-	.4byte	0x1ca8
+	.4byte	0x1c9b
 	.uleb128 0x30
-	.4byte	0x1cb4
+	.4byte	0x1ca7
 	.uleb128 0x30
-	.4byte	0x1cc0
+	.4byte	0x1cb3
 	.uleb128 0x30
-	.4byte	0x1ccc
+	.4byte	0x1cbf
 	.uleb128 0x30
-	.4byte	0x1cd8
+	.4byte	0x1ccb
 	.uleb128 0x30
-	.4byte	0x1ce4
+	.4byte	0x1cd7
 	.uleb128 0x30
-	.4byte	0x1cf0
+	.4byte	0x1ce3
 	.uleb128 0x30
-	.4byte	0x1cfc
+	.4byte	0x1cef
 	.uleb128 0x30
-	.4byte	0x1d08
+	.4byte	0x1cfb
 	.uleb128 0x30
-	.4byte	0x1d14
+	.4byte	0x1d07
 	.uleb128 0x30
-	.4byte	0x1d30
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x1f8
-	.4byte	0x65f0
+	.4byte	0x1d23
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x268
+	.4byte	0x66bb
 	.uleb128 0x2e
-	.4byte	0x1c9c
+	.4byte	0x1c8f
 	.uleb128 0x2e
-	.4byte	0x1c90
+	.4byte	0x1c83
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1f8
-	.uleb128 0x63
-	.4byte	0x642e
-	.4byte	.LLST247
-	.uleb128 0x63
-	.4byte	0x6433
-	.4byte	.LLST248
-	.uleb128 0x63
-	.4byte	0x6438
-	.4byte	.LLST249
+	.4byte	.Ldebug_ranges0+0x268
+	.uleb128 0x64
+	.4byte	0x64f9
+	.4byte	.LLST258
+	.uleb128 0x64
+	.4byte	0x64fe
+	.4byte	.LLST259
+	.uleb128 0x64
+	.4byte	0x6503
+	.4byte	.LLST260
 	.uleb128 0x30
-	.4byte	0x643d
+	.4byte	0x6508
 	.uleb128 0x30
-	.4byte	0x6442
+	.4byte	0x650d
 	.uleb128 0x30
-	.4byte	0x6447
-	.uleb128 0x63
-	.4byte	0x644c
-	.4byte	.LLST250
-	.uleb128 0x63
-	.4byte	0x6451
-	.4byte	.LLST251
-	.uleb128 0x63
-	.4byte	0x6456
-	.4byte	.LLST252
-	.uleb128 0x63
-	.4byte	0x645b
-	.4byte	.LLST253
+	.4byte	0x6512
+	.uleb128 0x64
+	.4byte	0x6517
+	.4byte	.LLST261
 	.uleb128 0x64
-	.4byte	0x1d20
+	.4byte	0x651c
+	.4byte	.LLST262
+	.uleb128 0x64
+	.4byte	0x6521
+	.4byte	.LLST263
 	.uleb128 0x64
-	.4byte	0x1d28
+	.4byte	0x6526
+	.4byte	.LLST264
+	.uleb128 0x67
+	.4byte	0x1d13
+	.uleb128 0x67
+	.4byte	0x1d1b
 	.uleb128 0x30
-	.4byte	0x6460
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x218
-	.4byte	0x6516
+	.4byte	0x652b
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x290
+	.4byte	0x65e1
 	.uleb128 0x30
-	.4byte	0x1d3e
-	.uleb128 0x24
-	.4byte	.LVL1299
-	.4byte	0x269f
-	.uleb128 0x24
-	.4byte	.LVL1300
-	.4byte	0x3fa5
-	.uleb128 0x24
-	.4byte	.LVL1301
-	.4byte	0x3fa5
-	.uleb128 0x24
-	.4byte	.LVL1302
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1304
-	.4byte	0x1e11
+	.4byte	0x1d31
+	.uleb128 0x31
+	.4byte	.LVL1307
+	.4byte	0x2692
+	.uleb128 0x31
+	.4byte	.LVL1308
+	.4byte	0x3fb6
+	.uleb128 0x31
+	.4byte	.LVL1309
+	.4byte	0x3fb6
+	.uleb128 0x31
+	.4byte	.LVL1310
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1312
+	.4byte	0x1e04
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1316
-	.4byte	0x2262
-	.uleb128 0x24
-	.4byte	.LVL1317
-	.4byte	0x2c52
-	.uleb128 0x24
-	.4byte	.LVL1322
-	.4byte	0x1d67
-	.uleb128 0x24
-	.4byte	.LVL1323
-	.4byte	0x3fa5
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL1324
-	.4byte	0x233b
-	.uleb128 0x24
-	.4byte	.LVL1326
-	.4byte	0x2262
-	.uleb128 0x24
-	.4byte	.LVL1327
-	.4byte	0x233b
-	.uleb128 0x24
-	.4byte	.LVL1328
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1329
-	.4byte	0x6727
-	.uleb128 0x24
+	.4byte	0x2255
+	.uleb128 0x31
+	.4byte	.LVL1325
+	.4byte	0x2c55
+	.uleb128 0x31
 	.4byte	.LVL1330
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1331
-	.4byte	0x2c52
-	.uleb128 0x24
+	.4byte	0x3fb6
+	.uleb128 0x31
 	.4byte	.LVL1333
-	.4byte	0x1d67
-	.uleb128 0x24
-	.4byte	.LVL1353
-	.4byte	0x1b05
-	.uleb128 0x24
-	.4byte	.LVL1357
-	.4byte	0x6727
-	.uleb128 0x24
-	.4byte	.LVL1358
-	.4byte	0x392c
-	.uleb128 0x24
-	.4byte	.LVL1360
-	.4byte	0x1f22
-	.uleb128 0x24
+	.4byte	0x1d5a
+	.uleb128 0x31
+	.4byte	.LVL1334
+	.4byte	0x3fb6
+	.uleb128 0x31
+	.4byte	.LVL1335
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1339
+	.4byte	0x2255
+	.uleb128 0x31
+	.4byte	.LVL1340
+	.4byte	0x232e
+	.uleb128 0x31
+	.4byte	.LVL1341
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1342
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1343
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1344
+	.4byte	0x2c55
+	.uleb128 0x31
+	.4byte	.LVL1346
+	.4byte	0x1d5a
+	.uleb128 0x31
+	.4byte	.LVL1361
+	.4byte	0x1af8
+	.uleb128 0x31
 	.4byte	.LVL1363
-	.4byte	0x2294
-	.uleb128 0x24
-	.4byte	.LVL1364
-	.4byte	0x1eae
-	.uleb128 0x24
-	.4byte	.LVL1373
-	.4byte	0x1eae
-	.uleb128 0x24
-	.4byte	.LVL1376
-	.4byte	0x23b1
-	.uleb128 0x24
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL1365
+	.4byte	0x3939
+	.uleb128 0x31
+	.4byte	.LVL1366
+	.4byte	0x1f15
+	.uleb128 0x31
+	.4byte	.LVL1369
+	.4byte	0x2287
+	.uleb128 0x31
+	.4byte	.LVL1370
+	.4byte	0x1ea1
+	.uleb128 0x31
 	.4byte	.LVL1377
-	.4byte	0x4f6d
-	.uleb128 0x24
+	.4byte	0x1ea1
+	.uleb128 0x31
 	.4byte	.LVL1378
-	.4byte	0x39f7
-	.uleb128 0x24
+	.4byte	0x23a4
+	.uleb128 0x31
 	.4byte	.LVL1379
-	.4byte	0x3593
-	.uleb128 0x24
-	.4byte	.LVL1383
-	.4byte	0x3fa5
+	.4byte	0x4f1f
+	.uleb128 0x31
+	.4byte	.LVL1380
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1381
+	.4byte	0x3598
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1303
-	.4byte	0x20d1
+	.uleb128 0x31
+	.4byte	.LVL1311
+	.4byte	0x20c4
 	.byte	0
-	.uleb128 0x5e
-	.4byte	0x2812
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
+	.uleb128 0x60
+	.4byte	0x2815
+	.4byte	.LFB242
+	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6708
+	.4byte	0x67d3
 	.uleb128 0x30
-	.4byte	0x2823
-	.uleb128 0x52
-	.4byte	.LBB521
-	.4byte	.LBE521-.LBB521
-	.4byte	0x66a4
-	.uleb128 0x63
-	.4byte	0x660d
-	.4byte	.LLST287
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x238
-	.4byte	0x6637
+	.4byte	0x2826
+	.uleb128 0x53
+	.4byte	.LBB547
+	.4byte	.LBE547-.LBB547
+	.4byte	0x676f
+	.uleb128 0x64
+	.4byte	0x66d8
+	.4byte	.LLST298
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x2c8
+	.4byte	0x6702
 	.uleb128 0x30
-	.4byte	0x282e
+	.4byte	0x2831
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1592
-	.4byte	0x2a91
-	.uleb128 0x24
-	.4byte	.LVL1593
-	.4byte	0x2a91
-	.uleb128 0x24
-	.4byte	.LVL1594
-	.4byte	0x36a4
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL1595
-	.4byte	0x36a4
-	.uleb128 0x24
+	.4byte	0x2a94
+	.uleb128 0x31
 	.4byte	.LVL1596
-	.4byte	0x39f7
-	.uleb128 0x24
+	.4byte	0x2a94
+	.uleb128 0x31
 	.4byte	.LVL1597
-	.4byte	0x3593
-	.uleb128 0x24
+	.4byte	0x36ab
+	.uleb128 0x31
 	.4byte	.LVL1598
-	.4byte	0x3593
-	.uleb128 0x24
+	.4byte	0x36ab
+	.uleb128 0x31
+	.4byte	.LVL1599
+	.4byte	0x3a04
+	.uleb128 0x31
+	.4byte	.LVL1600
+	.4byte	0x3598
+	.uleb128 0x31
 	.4byte	.LVL1601
-	.4byte	0x1e7a
-	.uleb128 0x24
-	.4byte	.LVL1602
-	.4byte	0x1e7a
-	.uleb128 0x24
-	.4byte	.LVL1603
-	.4byte	0x246d
-	.uleb128 0x24
+	.4byte	0x3598
+	.uleb128 0x31
 	.4byte	.LVL1604
-	.4byte	0x246d
-	.uleb128 0x24
+	.4byte	0x1e6d
+	.uleb128 0x31
 	.4byte	.LVL1605
-	.4byte	0x29d5
+	.4byte	0x1e6d
+	.uleb128 0x31
+	.4byte	.LVL1606
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1607
+	.4byte	0x2460
+	.uleb128 0x31
+	.4byte	.LVL1608
+	.4byte	0x29d8
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LVL1580
-	.4byte	0x4400
-	.uleb128 0x24
-	.4byte	.LVL1581
-	.4byte	0x3447
-	.uleb128 0x24
-	.4byte	.LVL1582
-	.4byte	0x333a
-	.uleb128 0x24
+	.uleb128 0x31
 	.4byte	.LVL1583
-	.4byte	0x3198
-	.uleb128 0x24
+	.4byte	0x43c0
+	.uleb128 0x31
 	.4byte	.LVL1584
-	.4byte	0x31fa
-	.uleb128 0x24
+	.4byte	0x344c
+	.uleb128 0x31
 	.4byte	.LVL1585
-	.4byte	0x2b06
-	.uleb128 0x24
+	.4byte	0x333f
+	.uleb128 0x31
 	.4byte	.LVL1586
-	.4byte	0x343a
-	.uleb128 0x24
+	.4byte	0x319f
+	.uleb128 0x31
 	.4byte	.LVL1587
-	.4byte	0x42f5
-	.uleb128 0x24
+	.4byte	0x3201
+	.uleb128 0x31
 	.4byte	.LVL1588
-	.4byte	0x2b89
-	.uleb128 0x24
+	.4byte	0x2b09
+	.uleb128 0x31
 	.4byte	.LVL1589
-	.4byte	0x2cbd
-	.uleb128 0x24
+	.4byte	0x343f
+	.uleb128 0x31
 	.4byte	.LVL1590
-	.4byte	0x3710
+	.4byte	0x4329
+	.uleb128 0x31
+	.4byte	.LVL1591
+	.4byte	0x2b8c
+	.uleb128 0x31
+	.4byte	.LVL1592
+	.4byte	0x2cc0
+	.uleb128 0x31
+	.4byte	.LVL1593
+	.4byte	0x3719
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x68
+	.4byte	.LASF656
+	.4byte	.LASF656
+	.byte	0x11
+	.byte	0x6f
+	.uleb128 0x69
+	.4byte	.LASF669
+	.4byte	.LASF669
+	.uleb128 0x68
+	.4byte	.LASF657
+	.4byte	.LASF657
+	.byte	0x12
+	.byte	0x19
+	.uleb128 0x68
 	.4byte	.LASF658
 	.4byte	.LASF658
-	.byte	0x12
-	.byte	0x6f
-	.uleb128 0x66
-	.4byte	.LASF671
-	.4byte	.LASF671
-	.uleb128 0x65
+	.byte	0xb
+	.byte	0x8e
+	.uleb128 0x68
 	.4byte	.LASF659
 	.4byte	.LASF659
-	.byte	0x13
-	.byte	0x19
-	.uleb128 0x65
+	.byte	0x12
+	.byte	0x1b
+	.uleb128 0x68
 	.4byte	.LASF660
 	.4byte	.LASF660
-	.byte	0xc
-	.byte	0x8e
-	.uleb128 0x65
+	.byte	0x13
+	.byte	0x27
+	.uleb128 0x68
 	.4byte	.LASF661
 	.4byte	.LASF661
-	.byte	0x13
-	.byte	0x1b
-	.uleb128 0x65
+	.byte	0xd
+	.byte	0x18
+	.uleb128 0x6a
 	.4byte	.LASF662
 	.4byte	.LASF662
-	.byte	0x14
-	.byte	0x2c
-	.uleb128 0x65
-	.4byte	.LASF663
-	.4byte	.LASF663
-	.byte	0xe
-	.byte	0x18
-	.uleb128 0x67
-	.4byte	.LASF664
-	.4byte	.LASF664
-	.byte	0xd
+	.byte	0xc
 	.2byte	0x19b
-	.uleb128 0x68
-	.4byte	.LASF672
-	.4byte	.LASF673
-	.byte	0x15
+	.uleb128 0x6b
+	.4byte	.LASF670
+	.4byte	.LASF671
+	.byte	0x14
 	.byte	0
-	.4byte	.LASF672
+	.4byte	.LASF670
 	.byte	0
 	.section	.debug_abbrev,"",%progbits
 .Ldebug_abbrev0:
@@ -37422,6 +34680,8 @@ check_vpc_table:
 	.byte	0
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0xb
@@ -37429,8 +34689,6 @@ check_vpc_table:
 	.byte	0
 	.uleb128 0x27
 	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0xc
@@ -37764,6 +35022,8 @@ check_vpc_table:
 	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
@@ -37921,6 +35181,15 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x31
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x32
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -37935,7 +35204,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -37944,7 +35213,7 @@ check_vpc_table:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -37957,7 +35226,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x35
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -37970,7 +35239,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x36
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -37981,7 +35250,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -37996,7 +35265,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x38
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38009,7 +35278,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x39
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -38018,7 +35287,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -38043,7 +35312,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3b
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38070,7 +35339,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38091,7 +35360,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38104,7 +35373,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38117,7 +35386,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38130,7 +35399,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x40
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -38141,7 +35410,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38154,14 +35423,14 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x43
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38180,7 +35449,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x44
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38195,7 +35464,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38210,7 +35479,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38227,7 +35496,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x47
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -38238,7 +35507,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x48
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -38251,7 +35520,7 @@ check_vpc_table:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38276,7 +35545,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38291,7 +35560,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38306,7 +35575,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38321,7 +35590,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38348,7 +35617,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38363,7 +35632,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4f
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -38380,7 +35649,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x50
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38405,7 +35674,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x51
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38420,7 +35689,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x52
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38435,7 +35704,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x53
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -38446,7 +35715,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x54
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -38463,7 +35732,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38488,7 +35757,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x56
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38507,7 +35776,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x57
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -38522,7 +35791,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x58
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -38541,22 +35810,35 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x59
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x11
+	.uleb128 0x52
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
+	.uleb128 0x55
+	.uleb128 0x17
 	.uleb128 0x58
 	.uleb128 0xb
 	.uleb128 0x59
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38575,7 +35857,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5c
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -38590,7 +35872,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -38601,7 +35883,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5e
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38618,7 +35900,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38643,7 +35925,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -38660,7 +35942,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -38669,7 +35951,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -38678,7 +35960,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -38693,32 +35975,47 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x67
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x68
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38735,7 +36032,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38748,7 +36045,7 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38765,7 +36062,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -38787,222 +36084,218 @@ check_vpc_table:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST290:
-	.4byte	.LVL1645-.Ltext0
-	.4byte	.LVL1646-1-.Ltext0
+.LLST301:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST291:
-	.4byte	.LVL1645-.Ltext0
-	.4byte	.LVL1646-1-.Ltext0
+.LLST302:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST292:
-	.4byte	.LVL1645-.Ltext0
-	.4byte	.LVL1646-1-.Ltext0
+.LLST303:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL834-.Ltext0
-	.4byte	.LVL835-1-.Ltext0
+.LLST177:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL834-.Ltext0
-	.4byte	.LVL835-1-.Ltext0
+.LLST178:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL834-.Ltext0
-	.4byte	.LVL835-1-.Ltext0
+.LLST179:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST104:
-	.4byte	.LVL466-.Ltext0
-	.4byte	.LVL468-1-.Ltext0
+.LLST109:
+	.4byte	.LVL483-.Ltext0
+	.4byte	.LVL485-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL468-1-.Ltext0
-	.4byte	.LFE266-.Ltext0
+	.4byte	.LVL485-1-.Ltext0
+	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST105:
-	.4byte	.LVL466-.Ltext0
-	.4byte	.LVL467-.Ltext0
+.LLST110:
+	.4byte	.LVL483-.Ltext0
+	.4byte	.LVL484-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL467-.Ltext0
-	.4byte	.LFE266-.Ltext0
+	.4byte	.LVL484-.Ltext0
+	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST106:
-	.4byte	.LVL470-.Ltext0
-	.4byte	.LVL471-.Ltext0
+.LLST111:
+	.4byte	.LVL487-.Ltext0
+	.4byte	.LVL488-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL473-.Ltext0
-	.4byte	.LVL474-.Ltext0
+	.4byte	.LVL490-.Ltext0
+	.4byte	.LVL492-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL475-.Ltext0
-	.4byte	.LVL476-.Ltext0
+	.4byte	.LVL493-.Ltext0
+	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST91:
-	.4byte	.LVL395-.Ltext0
-	.4byte	.LVL399-.Ltext0
+.LLST94:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL400-.Ltext0
-	.4byte	.LVL402-.Ltext0
+	.4byte	.LVL407-.Ltext0
+	.4byte	.LVL410-.Ltext0
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL411-.Ltext0
+	.4byte	.LVL412-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST92:
-	.4byte	.LVL395-.Ltext0
-	.4byte	.LVL401-.Ltext0
+.LLST95:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST93:
-	.4byte	.LVL395-.Ltext0
-	.4byte	.LVL400-.Ltext0
+.LLST96:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL400-.Ltext0
-	.4byte	.LFE264-.Ltext0
+	.4byte	.LVL406-.Ltext0
+	.4byte	.LVL411-.Ltext0
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL411-.Ltext0
+	.4byte	.LFE274-.Ltext0
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST86:
-	.4byte	.LVL370-.Ltext0
-	.4byte	.LVL372-.Ltext0
+.LLST89:
+	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL386-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST87:
-	.4byte	.LVL370-.Ltext0
-	.4byte	.LVL375-.Ltext0
+.LLST90:
+	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL390-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL375-.Ltext0
-	.4byte	.LVL385-.Ltext0
-	.2byte	0x1
-	.byte	0x59
-	.4byte	.LVL385-.Ltext0
-	.4byte	.LVL387-.Ltext0
+	.4byte	.LVL390-.Ltext0
+	.4byte	.LVL398-.Ltext0
 	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL392-.Ltext0
-	.4byte	.LFE263-.Ltext0
+	.byte	0x5b
+	.4byte	.LVL402-.Ltext0
+	.4byte	.LFE273-.Ltext0
 	.2byte	0x1
-	.byte	0x59
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST88:
-	.4byte	.LVL370-.Ltext0
-	.4byte	.LVL373-.Ltext0
+.LLST91:
+	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL390-.Ltext0
 	.2byte	0x1
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+	.4byte	.LVL1246-.Ltext0
+	.4byte	.LVL1247-.Ltext0
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1247-.Ltext0
+	.4byte	.LVL1248-.Ltext0
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -32
 	.4byte	0
 	.4byte	0
-.LLST239:
-	.4byte	.LVL1224-.Ltext0
-	.4byte	.LVL1225-.Ltext0
+.LLST250:
+	.4byte	.LVL1231-.Ltext0
+	.4byte	.LVL1232-.Ltext0
 	.2byte	0x2
 	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1231-.Ltext0
-	.4byte	.LFE158-.Ltext0
+	.sleb128 -28
+	.4byte	.LVL1238-.Ltext0
+	.4byte	.LVL1248-.Ltext0
 	.2byte	0x2
 	.byte	0x91
-	.sleb128 -44
+	.sleb128 -28
 	.4byte	0
 	.4byte	0
-.LLST272:
-	.4byte	.LVL1459-.Ltext0
+.LLST283:
 	.4byte	.LVL1461-.Ltext0
+	.4byte	.LVL1463-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1463-.Ltext0
-	.4byte	.LVL1466-.Ltext0
+	.4byte	.LVL1465-.Ltext0
+	.4byte	.LVL1468-.Ltext0
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1555-.Ltext0
+	.4byte	.LVL1556-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST273:
-	.4byte	.LVL1459-.Ltext0
-	.4byte	.LVL1462-.Ltext0
+.LLST284:
+	.4byte	.LVL1461-.Ltext0
+	.4byte	.LVL1464-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1462-.Ltext0
-	.4byte	.LFE157-.Ltext0
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1555-.Ltext0
 	.2byte	0x1
-	.byte	0x59
+	.byte	0x58
+	.4byte	.LVL1555-.Ltext0
+	.4byte	.LFE167-.Ltext0
+	.2byte	0x1
+	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST274:
-	.4byte	.LVL1459-.Ltext0
-	.4byte	.LVL1460-.Ltext0
+.LLST285:
+	.4byte	.LVL1461-.Ltext0
+	.4byte	.LVL1462-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1463-.Ltext0
-	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
+	.4byte	.LVL1466-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1464-.Ltext0
-	.4byte	.LVL1465-.Ltext0
+	.4byte	.LVL1466-.Ltext0
+	.4byte	.LVL1467-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL1503-.Ltext0
@@ -41558,33 +38825,45 @@ check_vpc_table:
 	.4byte	.LVL1509-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1521-.Ltext0
+	.4byte	.LVL1522-.Ltext0
+	.2byte	0x1
+	.byte	0x53
 	.4byte	.LVL1524-.Ltext0
-	.4byte	.LVL1525-.Ltext0
+	.4byte	.LVL1531-.Ltext0
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
+	.4byte	.LVL1532-.Ltext0
+	.4byte	.LVL1533-.Ltext0
+	.2byte	0x1
+	.byte	0x51
 	.4byte	.LVL1536-.Ltext0
 	.4byte	.LVL1537-.Ltext0
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST275:
-	.4byte	.LVL1459-.Ltext0
-	.4byte	.LVL1462-1-.Ltext0
+.LLST286:
+	.4byte	.LVL1461-.Ltext0
+	.4byte	.LVL1464-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1463-.Ltext0
-	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
+	.4byte	.LVL1466-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL1509-.Ltext0
 	.4byte	.LVL1510-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1525-.Ltext0
 	.4byte	.LVL1526-.Ltext0
-	.4byte	.LVL1527-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1526-.Ltext0
+	.4byte	.LVL1527-.Ltext0
+	.2byte	0x1
+	.byte	0x52
 	.4byte	.LVL1528-.Ltext0
 	.4byte	.LVL1530-.Ltext0
 	.2byte	0x1
@@ -41593,18 +38872,18 @@ check_vpc_table:
 	.4byte	.LVL1546-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1548-.Ltext0
 	.4byte	.LVL1549-.Ltext0
+	.4byte	.LVL1550-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST276:
-	.4byte	.LVL1462-.Ltext0
-	.4byte	.LVL1463-.Ltext0
+.LLST287:
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1475-.Ltext0
+	.4byte	.LVL1478-.Ltext0
 	.4byte	.LVL1501-.Ltext0
 	.2byte	0x1
 	.byte	0x56
@@ -41612,150 +38891,134 @@ check_vpc_table:
 	.4byte	.LVL1507-.Ltext0
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1511-.Ltext0
-	.4byte	.LFE157-.Ltext0
+	.4byte	.LVL1513-.Ltext0
+	.4byte	.LVL1555-.Ltext0
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST277:
-	.4byte	.LVL1462-.Ltext0
-	.4byte	.LVL1463-.Ltext0
+.LLST288:
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1468-.Ltext0
-	.4byte	.LFE157-.Ltext0
+	.byte	0x5a
+	.4byte	.LVL1470-.Ltext0
+	.4byte	.LVL1555-.Ltext0
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST278:
-	.4byte	.LVL1469-.Ltext0
-	.4byte	.LVL1472-.Ltext0
+.LLST289:
+	.4byte	.LVL1471-.Ltext0
+	.4byte	.LVL1474-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1494-.Ltext0
 	.4byte	.LVL1495-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1520-.Ltext0
 	.4byte	.LVL1521-.Ltext0
-	.4byte	.LVL1522-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL1529-.Ltext0
 	.4byte	.LVL1530-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1542-.Ltext0
-	.4byte	.LVL1543-.Ltext0
+	.4byte	.LVL1540-.Ltext0
+	.4byte	.LVL1541-.Ltext0
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1547-.Ltext0
+	.4byte	.LVL1548-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST279:
-	.4byte	.LVL1462-.Ltext0
-	.4byte	.LVL1463-.Ltext0
-	.2byte	0x3
+.LLST290:
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1475-.Ltext0
+	.sleb128 -64
+	.4byte	.LVL1478-.Ltext0
 	.4byte	.LVL1501-.Ltext0
-	.2byte	0x3
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -64
 	.4byte	.LVL1506-.Ltext0
 	.4byte	.LVL1507-.Ltext0
-	.2byte	0x3
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1511-.Ltext0
-	.4byte	.LVL1532-.Ltext0
-	.2byte	0x3
+	.sleb128 -64
+	.4byte	.LVL1513-.Ltext0
+	.4byte	.LVL1534-.Ltext0
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1532-.Ltext0
-	.4byte	.LVL1533-.Ltext0
+	.sleb128 -64
+	.4byte	.LVL1534-.Ltext0
+	.4byte	.LVL1535-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1533-.Ltext0
-	.4byte	.LFE157-.Ltext0
-	.2byte	0x3
+	.4byte	.LVL1535-.Ltext0
+	.4byte	.LVL1555-.Ltext0
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -64
 	.4byte	0
 	.4byte	0
-.LLST280:
-	.4byte	.LVL1475-.Ltext0
-	.4byte	.LVL1477-.Ltext0
+.LLST291:
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1489-.Ltext0
-	.4byte	.LVL1490-.Ltext0
+	.byte	0x59
+	.4byte	.LVL1478-.Ltext0
+	.4byte	.LVL1482-.Ltext0
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x59
 	.4byte	.LVL1492-.Ltext0
-	.4byte	.LVL1494-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1494-.Ltext0
-	.4byte	.LVL1495-1-.Ltext0
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1513-.Ltext0
-	.4byte	.LVL1514-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1517-.Ltext0
-	.4byte	.LVL1518-.Ltext0
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1518-.Ltext0
-	.4byte	.LVL1519-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1534-.Ltext0
-	.4byte	.LVL1535-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1549-.Ltext0
-	.4byte	.LVL1550-.Ltext0
+	.4byte	.LVL1501-.Ltext0
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1553-.Ltext0
-	.4byte	.LVL1554-.Ltext0
+	.byte	0x59
+	.4byte	.LVL1506-.Ltext0
+	.4byte	.LVL1507-.Ltext0
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x59
+	.4byte	.LVL1515-.Ltext0
 	.4byte	.LVL1555-.Ltext0
-	.4byte	.LFE157-.Ltext0
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x59
 	.4byte	0
 	.4byte	0
-.LLST281:
-	.4byte	.LVL1470-.Ltext0
-	.4byte	.LVL1471-.Ltext0
+.LLST292:
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+	.4byte	.LVL1473-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1471-.Ltext0
-	.4byte	.LVL1473-1-.Ltext0
+	.4byte	.LVL1473-.Ltext0
+	.4byte	.LVL1475-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1473-.Ltext0
+	.4byte	.LVL1475-.Ltext0
 	.4byte	.LVL1476-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1476-.Ltext0
-	.4byte	.LVL1478-.Ltext0
+	.4byte	.LVL1477-.Ltext0
+	.4byte	.LVL1479-.Ltext0
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1479-.Ltext0
+	.4byte	.LVL1480-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1486-.Ltext0
-	.4byte	.LVL1487-.Ltext0
+	.4byte	.LVL1489-.Ltext0
+	.4byte	.LVL1490-.Ltext0
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.4byte	.LVL1491-.Ltext0
-	.4byte	.LVL1492-.Ltext0
+	.4byte	.LVL1493-.Ltext0
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x51
 	.4byte	.LVL1493-.Ltext0
 	.4byte	.LVL1494-.Ltext0
 	.2byte	0x1
@@ -41764,26 +39027,38 @@ check_vpc_table:
 	.4byte	.LVL1502-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1552-.Ltext0
-	.4byte	.LVL1555-1-.Ltext0
+	.4byte	.LVL1511-.Ltext0
+	.4byte	.LVL1513-.Ltext0
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1515-.Ltext0
+	.4byte	.LVL1516-.Ltext0
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1550-.Ltext0
+	.4byte	.LVL1551-.Ltext0
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1553-.Ltext0
+	.4byte	.LVL1554-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1554-.Ltext0
 	.4byte	.LVL1555-.Ltext0
-	.4byte	.LFE157-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST282:
-	.4byte	.LVL1462-.Ltext0
-	.4byte	.LVL1463-.Ltext0
+.LLST293:
+	.4byte	.LVL1464-.Ltext0
+	.4byte	.LVL1465-.Ltext0
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1474-.Ltext0
-	.4byte	.LVL1483-.Ltext0
+	.4byte	.LVL1477-.Ltext0
+	.4byte	.LVL1485-.Ltext0
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1484-.Ltext0
+	.4byte	.LVL1487-.Ltext0
 	.4byte	.LVL1496-.Ltext0
 	.2byte	0x1
 	.byte	0x55
@@ -41791,1059 +39066,1264 @@ check_vpc_table:
 	.4byte	.LVL1507-.Ltext0
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1511-.Ltext0
-	.4byte	.LFE157-.Ltext0
+	.4byte	.LVL1512-.Ltext0
+	.4byte	.LVL1555-.Ltext0
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST227:
-	.4byte	.LVL1191-.Ltext0
-	.4byte	.LVL1195-1-.Ltext0
+.LLST238:
+	.4byte	.LVL1198-.Ltext0
+	.4byte	.LVL1202-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1195-1-.Ltext0
-	.4byte	.LVL1196-.Ltext0
+	.4byte	.LVL1202-1-.Ltext0
+	.4byte	.LVL1203-.Ltext0
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1201-.Ltext0
-	.4byte	.LVL1202-.Ltext0
+	.4byte	.LVL1208-.Ltext0
+	.4byte	.LVL1209-.Ltext0
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1212-.Ltext0
-	.4byte	.LVL1215-.Ltext0
+	.4byte	.LVL1219-.Ltext0
+	.4byte	.LVL1222-.Ltext0
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST228:
-	.4byte	.LVL1191-.Ltext0
-	.4byte	.LVL1195-1-.Ltext0
+.LLST239:
+	.4byte	.LVL1198-.Ltext0
+	.4byte	.LVL1202-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1195-1-.Ltext0
-	.4byte	.LVL1215-.Ltext0
+	.4byte	.LVL1202-1-.Ltext0
+	.4byte	.LVL1222-.Ltext0
 	.2byte	0x1
 	.byte	0x59
 	.4byte	0
 	.4byte	0
-.LLST229:
-	.4byte	.LVL1191-.Ltext0
-	.4byte	.LVL1193-.Ltext0
+.LLST240:
+	.4byte	.LVL1198-.Ltext0
+	.4byte	.LVL1200-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST230:
-	.4byte	.LVL1191-.Ltext0
-	.4byte	.LVL1194-.Ltext0
+.LLST241:
+	.4byte	.LVL1198-.Ltext0
+	.4byte	.LVL1201-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1194-.Ltext0
-	.4byte	.LVL1215-.Ltext0
+	.4byte	.LVL1201-.Ltext0
+	.4byte	.LVL1222-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST231:
-	.4byte	.LVL1192-.Ltext0
-	.4byte	.LVL1215-.Ltext0
+.LLST242:
+	.4byte	.LVL1199-.Ltext0
+	.4byte	.LVL1222-.Ltext0
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST232:
-	.4byte	.LVL1195-.Ltext0
-	.4byte	.LVL1196-.Ltext0
+.LLST243:
+	.4byte	.LVL1202-.Ltext0
+	.4byte	.LVL1203-.Ltext0
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -4
-	.4byte	.LVL1196-.Ltext0
-	.4byte	.LVL1204-.Ltext0
+	.4byte	.LVL1203-.Ltext0
+	.4byte	.LVL1211-.Ltext0
 	.2byte	0x2
 	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1204-.Ltext0
-	.4byte	.LFE155-.Ltext0
+	.sleb128 -44
+	.4byte	.LVL1211-.Ltext0
+	.4byte	.LFE165-.Ltext0
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -4
 	.4byte	0
 	.4byte	0
-.LLST233:
-	.4byte	.LVL1195-.Ltext0
-	.4byte	.LVL1196-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1201-.Ltext0
+.LLST244:
 	.4byte	.LVL1202-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1206-.Ltext0
-	.4byte	.LVL1207-1-.Ltext0
+	.4byte	.LVL1203-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL1208-.Ltext0
 	.4byte	.LVL1209-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1211-.Ltext0
 	.4byte	.LVL1213-.Ltext0
+	.4byte	.LVL1214-1-.Ltext0
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1215-.Ltext0
+	.4byte	.LVL1216-.Ltext0
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1218-.Ltext0
+	.4byte	.LVL1220-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST254:
-	.4byte	.LVL1387-.Ltext0
+.LLST265:
 	.4byte	.LVL1389-.Ltext0
-	.2byte	0x1
-	.byte	0x50
 	.4byte	.LVL1391-.Ltext0
-	.4byte	.LVL1392-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1393-.Ltext0
-	.4byte	.LVL1396-1-.Ltext0
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-.LASF182:
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 	.ascii	"des_ppa\000"
-.LASF256:
+.LASF255:
 	.ascii	"p_map_block_table\000"
-.LASF17:
-	.ascii	"soc_mb\000"
-.LASF549:
+.LASF548:
 	.ascii	"prev_node_id\000"
-.LASF244:
+.LASF243:
 	.ascii	"p_gc_data_buf\000"
-.LASF533:
+.LASF532:
 	.ascii	"FtlMapWritePage\000"
 .LASF16:
 	.ascii	"elf_hwcap2\000"
-.LASF255:
+.LASF254:
 	.ascii	"p_blk_mode_table\000"
-.LASF286:
+.LASF285:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
-.LASF580:
+.LASF578:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
-.LASF195:
+.LASF194:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
-.LASF516:
+.LASF515:
 	.ascii	"nSec\000"
-.LASF598:
+.LASF596:
 	.ascii	"FtlBbtCalcTotleCnt\000"
-.LASF197:
+.LASF196:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF496:
+.LASF495:
 	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF587:
+.LASF585:
 	.ascii	"ver1\000"
-.LASF154:
+.LASF153:
 	.ascii	"SlcPartLbaEndSector\000"
-.LASF207:
+.LASF206:
 	.ascii	"c_ftl_nand_max_map_blks\000"
-.LASF498:
+.LASF497:
 	.ascii	"FtlGcReFreshBadBlk\000"
-.LASF477:
+.LASF476:
 	.ascii	"last_mlc_page_version\000"
-.LASF509:
+.LASF508:
 	.ascii	"FtlMapBlkWriteDump_data\000"
-.LASF249:
+.LASF248:
 	.ascii	"g_ect_tbl_info_size\000"
-.LASF111:
+.LASF110:
 	.ascii	"totleEc\000"
-.LASF441:
+.LASF440:
 	.ascii	"GetFreeBlockMinEraseCount\000"
-.LASF438:
+.LASF437:
 	.ascii	"minDataBlockEraseCount\000"
-.LASF52:
+.LASF51:
 	.ascii	"SYSTEM_POWER_OFF\000"
-.LASF219:
+.LASF218:
 	.ascii	"g_MaxLbaSector\000"
-.LASF88:
+.LASF87:
 	.ascii	"version\000"
-.LASF32:
+.LASF31:
 	.ascii	"dmesg_restrict\000"
-.LASF465:
+.LASF464:
 	.ascii	"next_free_active_page\000"
-.LASF133:
+.LASF132:
 	.ascii	"gcTempSuperblockId\000"
-.LASF624:
+.LASF622:
 	.ascii	"first_lpa_nscts\000"
-.LASF303:
+.LASF302:
 	.ascii	"g_totle_cache_write_count\000"
-.LASF497:
+.LASF496:
 	.ascii	"ftl_set_blk_mode\000"
-.LASF453:
+.LASF452:
 	.ascii	"Ftl_load_ext_data\000"
-.LASF507:
+.LASF506:
 	.ascii	"FtlWriteDump_data\000"
-.LASF639:
+.LASF637:
 	.ascii	"max_test_page_num\000"
-.LASF394:
+.LASF393:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
-.LASF370:
+.LASF369:
 	.ascii	"block_in_die\000"
-.LASF419:
+.LASF418:
 	.ascii	"FtlGcBufInit\000"
-.LASF235:
+.LASF234:
 	.ascii	"p_plane_order_table\000"
-.LASF102:
+.LASF101:
 	.ascii	"pMapPpnTbl\000"
-.LASF431:
+.LASF430:
 	.ascii	"free_data_superblock\000"
-.LASF147:
+.LASF146:
 	.ascii	"sys_slc_erase_count\000"
-.LASF208:
+.LASF207:
 	.ascii	"c_ftl_nand_max_vendor_blks\000"
-.LASF379:
+.LASF378:
 	.ascii	"physical_block\000"
-.LASF449:
+.LASF448:
 	.ascii	"FtlVpcCheckAndModify\000"
-.LASF280:
+.LASF279:
 	.ascii	"g_sys_save_data\000"
-.LASF85:
+.LASF84:
 	.ascii	"ftl_bbt_info\000"
-.LASF429:
+.LASF428:
 	.ascii	"free_blk_index\000"
-.LASF254:
+.LASF253:
 	.ascii	"p_valid_page_count_check_table\000"
-.LASF213:
+.LASF212:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
-.LASF372:
+.LASF371:
 	.ascii	"rk_ftl_garbage_collect\000"
-.LASF658:
+.LASF656:
 	.ascii	"memcmp\000"
-.LASF374:
+.LASF373:
 	.ascii	"numPages\000"
-.LASF315:
+.LASF314:
 	.ascii	"g_gc_head_data_block_count\000"
-.LASF259:
+.LASF258:
 	.ascii	"p_map_region_ppn_table\000"
-.LASF528:
+.LASF527:
 	.ascii	"l2p_flush\000"
-.LASF459:
+.LASF458:
 	.ascii	"make_superblock\000"
-.LASF20:
+.LASF19:
 	.ascii	"__con_initcall_end\000"
-.LASF633:
+.LASF631:
 	.ascii	"bad_block_cnt\000"
-.LASF551:
+.LASF550:
 	.ascii	"node_multiplier_value\000"
-.LASF334:
+.LASF333:
 	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF320:
+.LASF319:
 	.ascii	"g_recovery_ppa_tbl\000"
-.LASF527:
+.LASF526:
 	.ascii	"found_lpa\000"
-.LASF281:
+.LASF280:
 	.ascii	"g_sys_ext_data\000"
-.LASF357:
+.LASF356:
 	.ascii	"flash_type\000"
-.LASF417:
+.LASF416:
 	.ascii	"req_num\000"
-.LASF512:
+.LASF571:
+	.ascii	"remalloc\000"
+.LASF511:
 	.ascii	"forceFlush\000"
-.LASF57:
+.LASF56:
 	.ascii	"uint8\000"
-.LASF333:
+.LASF332:
 	.ascii	"power_up_flag\000"
-.LASF283:
+.LASF282:
 	.ascii	"p_gc_blk_tbl\000"
-.LASF415:
+.LASF414:
 	.ascii	"FtlGcBufAlloc\000"
-.LASF192:
+.LASF191:
 	.ascii	"c_ftl_nand_ext_blk_pre_plane\000"
-.LASF380:
+.LASF379:
 	.ascii	"max_gc_page_num\000"
-.LASF199:
+.LASF198:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
-.LASF442:
+.LASF441:
 	.ascii	"update_multiplier_value\000"
-.LASF620:
+.LASF618:
 	.ascii	"flashType\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF243:
+.LASF242:
 	.ascii	"p_gc_spare_buf\000"
-.LASF495:
+.LASF494:
 	.ascii	"sblk\000"
-.LASF373:
+.LASF372:
 	.ascii	"mode\000"
-.LASF427:
+.LASF426:
 	.ascii	"new_id\000"
-.LASF630:
+.LASF628:
 	.ascii	"pNand\000"
-.LASF50:
+.LASF49:
 	.ascii	"SYSTEM_RUNNING\000"
-.LASF517:
+.LASF516:
 	.ascii	"pBuf\000"
-.LASF143:
+.LASF142:
 	.ascii	"write_page_count\000"
-.LASF605:
+.LASF603:
 	.ascii	"bitmap\000"
-.LASF201:
+.LASF200:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF670:
+.LASF668:
 	.ascii	"sftl_get_density\000"
-.LASF641:
+.LASF639:
 	.ascii	"test_page_step\000"
-.LASF596:
+.LASF594:
 	.ascii	"blkAddr\000"
-.LASF287:
+.LASF286:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
-.LASF289:
+.LASF288:
 	.ascii	"g_gc_next_blk_1\000"
-.LASF530:
+.LASF529:
 	.ascii	"target_region\000"
-.LASF614:
+.LASF612:
 	.ascii	"end_lpa\000"
-.LASF474:
+.LASF473:
 	.ascii	"scan_completed\000"
-.LASF657:
+.LASF655:
 	.ascii	"FtlPrintInfo2buf\000"
-.LASF366:
+.LASF365:
 	.ascii	"p_die\000"
-.LASF240:
+.LASF239:
 	.ascii	"p_io_data_buf_0\000"
-.LASF241:
+.LASF240:
 	.ascii	"p_io_data_buf_1\000"
-.LASF138:
+.LASF137:
 	.ascii	"mlc_erase_count\000"
-.LASF179:
+.LASF178:
 	.ascii	"phyBlk\000"
-.LASF627:
+.LASF625:
 	.ascii	"sftl_deinit\000"
-.LASF487:
+.LASF486:
 	.ascii	"pMapBlockInfo\000"
-.LASF152:
+.LASF151:
 	.ascii	"last_refresh_data_times\000"
-.LASF668:
+.LASF666:
 	.ascii	"system_states\000"
-.LASF160:
+.LASF159:
 	.ascii	"totle_write_sector\000"
-.LASF230:
+.LASF229:
 	.ascii	"req_prgm\000"
-.LASF592:
+.LASF590:
 	.ascii	"FtlMakeBbt\000"
-.LASF103:
+.LASF102:
 	.ascii	"in_gc_mode\000"
-.LASF435:
+.LASF434:
 	.ascii	"min_ec\000"
-.LASF61:
+.LASF60:
 	.ascii	"int16\000"
-.LASF282:
+.LASF281:
 	.ascii	"p_gc_page_info\000"
-.LASF212:
+.LASF211:
 	.ascii	"c_ftl_nand_max_sys_blks\000"
-.LASF440:
+.LASF439:
 	.ascii	"max_ec\000"
-.LASF239:
+.LASF238:
 	.ascii	"p_sys_spare_buf\000"
-.LASF671:
+.LASF669:
 	.ascii	"memcpy\000"
-.LASF505:
+.LASF504:
 	.ascii	"prog_error_count\000"
-.LASF337:
+.LASF336:
 	.ascii	"gc_discard_updated\000"
-.LASF413:
+.LASF412:
 	.ascii	"prev_superblock_id\000"
-.LASF640:
+.LASF638:
 	.ascii	"test_page_num\000"
-.LASF157:
+.LASF156:
 	.ascii	"last_refresh_read_count\000"
-.LASF479:
+.LASF478:
 	.ascii	"lookup_ppa_ver\000"
-.LASF491:
+.LASF490:
 	.ascii	"totleBlkNum\000"
-.LASF610:
+.LASF608:
 	.ascii	"sftl_read\000"
-.LASF579:
+.LASF577:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
-.LASF410:
+.LASF409:
 	.ascii	"FtlGcPageVarInit\000"
-.LASF113:
+.LASF112:
 	.ascii	"padding\000"
-.LASF175:
+.LASF174:
 	.ascii	"flash_mode\000"
-.LASF469:
+.LASF468:
 	.ascii	"recovery_cur_page_ver\000"
-.LASF538:
+.LASF537:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF609:
+.LASF607:
 	.ascii	"sftl_write\000"
-.LASF119:
+.LASF118:
 	.ascii	"ftl_map_blk_header\000"
-.LASF581:
+.LASF579:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF26:
+.LASF25:
 	.ascii	"late_time_init\000"
-.LASF648:
+.LASF646:
 	.ascii	"mem_size\000"
-.LASF486:
+.LASF485:
 	.ascii	"FtlMapTblRecovery\000"
-.LASF424:
+.LASF423:
 	.ascii	"new_ppa\000"
-.LASF428:
+.LASF427:
 	.ascii	"num_bad_block\000"
-.LASF526:
+.LASF525:
 	.ascii	"lpn_index\000"
-.LASF204:
+.LASF203:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF626:
+.LASF624:
 	.ascii	"sector\000"
-.LASF508:
+.LASF507:
 	.ascii	"num_page\000"
-.LASF619:
+.LASF617:
 	.ascii	"FtlProgPages\000"
-.LASF418:
+.LASF417:
 	.ascii	"FtlGcBufFree\000"
-.LASF272:
+.LASF271:
 	.ascii	"p_data_block_list_tail\000"
-.LASF399:
+.LASF398:
 	.ascii	"current_ppa\000"
-.LASF65:
+.LASF64:
 	.ascii	"p_spare\000"
-.LASF384:
+.LASF383:
 	.ascii	"tmp_blk\000"
-.LASF295:
+.LASF294:
 	.ascii	"g_gc_blk_index\000"
-.LASF501:
+.LASF500:
 	.ascii	"block_in_plane\000"
-.LASF112:
+.LASF111:
 	.ascii	"lastEc\000"
-.LASF353:
+.LASF352:
 	.ascii	"PhyBlk\000"
-.LASF107:
+.LASF106:
 	.ascii	"reserved\000"
-.LASF318:
+.LASF317:
 	.ascii	"g_recovery_page_num\000"
-.LASF550:
+.LASF549:
 	.ascii	"node_valid_page_count\000"
-.LASF180:
+.LASF179:
 	.ascii	"ftl_gc_page_item\000"
-.LASF144:
+.LASF143:
 	.ascii	"read_page_count\000"
-.LASF420:
+.LASF419:
 	.ascii	"decrement_vpc_count\000"
 .LASF7:
 	.ascii	"short unsigned int\000"
-.LASF540:
+.LASF539:
 	.ascii	"minValidPageIndex\000"
-.LASF332:
+.LASF331:
 	.ascii	"TotleReadBufferMatchCount\000"
-.LASF341:
+.LASF340:
 	.ascii	"check_spare_buf\000"
-.LASF575:
-	.ascii	"tmp_ec\000"
-.LASF316:
+.LASF315:
 	.ascii	"g_gc_skip_write_count\000"
-.LASF60:
+.LASF59:
 	.ascii	"int32\000"
-.LASF74:
+.LASF73:
 	.ascii	"page_per_slc_blk\000"
-.LASF319:
+.LASF318:
 	.ascii	"g_recovery_page_min_ver\000"
-.LASF228:
+.LASF227:
 	.ascii	"req_sys\000"
-.LASF163:
+.LASF162:
 	.ascii	"List_Node\000"
-.LASF654:
+.LASF652:
 	.ascii	"Ftl_log2\000"
-.LASF153:
+.LASF152:
 	.ascii	"all_blk_used_slc_mode\000"
-.LASF397:
+.LASF396:
 	.ascii	"pSuperblock\000"
-.LASF475:
+.LASF474:
 	.ascii	"function_exit\000"
-.LASF206:
+.LASF205:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF18:
+.LASF17:
 	.ascii	"initcall_t\000"
-.LASF591:
+.LASF589:
 	.ascii	"V2P_block\000"
-.LASF116:
+.LASF115:
 	.ascii	"sysBlksPerPlane\000"
-.LASF455:
+.LASF454:
 	.ascii	"Ftl_save_ext_data\000"
-.LASF618:
+.LASF616:
 	.ascii	"FtlCacheWriteBack\000"
-.LASF80:
+.LASF79:
 	.ascii	"nand_ops\000"
-.LASF631:
+.LASF629:
 	.ascii	"load_bbt\000"
-.LASF651:
+.LASF649:
 	.ascii	"blkNum\000"
-.LASF368:
+.LASF367:
 	.ascii	"page_index\000"
-.LASF503:
+.LASF502:
 	.ascii	"FtlVpcTblFlush\000"
-.LASF110:
+.LASF109:
 	.ascii	"hash\000"
-.LASF572:
+.LASF573:
 	.ascii	"IsInFreeQueue\000"
-.LASF472:
+.LASF471:
 	.ascii	"read_super_page_end\000"
-.LASF358:
+.LASF357:
 	.ascii	"num_req\000"
-.LASF321:
+.LASF320:
 	.ascii	"c_mlc_erase_count_value\000"
-.LASF554:
+.LASF553:
 	.ascii	"pPrev\000"
-.LASF139:
+.LASF138:
 	.ascii	"GlobalDataVersion\000"
-.LASF42:
+.LASF41:
 	.ascii	"panic_on_unrecovered_nmi\000"
-.LASF164:
+.LASF163:
 	.ascii	"next\000"
-.LASF129:
+.LASF128:
 	.ascii	"activeSuperblockId\000"
-.LASF377:
+.LASF376:
 	.ascii	"plane\000"
-.LASF44:
+.LASF43:
 	.ascii	"panic_on_warn\000"
-.LASF93:
+.LASF92:
 	.ascii	"ftl_l2p_map_info\000"
-.LASF165:
+.LASF164:
 	.ascii	"prev\000"
-.LASF58:
+.LASF57:
 	.ascii	"uint16\000"
-.LASF351:
+.LASF350:
 	.ascii	"ftl_memset\000"
-.LASF535:
+.LASF534:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-.LASF46:
+.LASF45:
 	.ascii	"crash_kexec_post_notifiers\000"
-.LASF290:
+.LASF289:
 	.ascii	"g_gc_bad_block_temp_num\000"
-.LASF124:
+.LASF123:
 	.ascii	"ftl_sys_save_info\000"
-.LASF279:
+.LASF278:
 	.ascii	"gp_last_act_superblock\000"
-.LASF577:
+.LASF576:
 	.ascii	"erase_flag\000"
-.LASF488:
+.LASF487:
 	.ascii	"blk_id\000"
-.LASF338:
+.LASF337:
 	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v7_thumb.S b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
index e5169e3470196..6897c7ecd7062 100644
--- a/drivers/rkflash/rk_sftl_arm_v7_thumb.S
+++ b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-06-13
+ * date: 2018-07-13
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -113,12 +113,12 @@ ftl_set_blk_mode.part.6:
 	.fnstart
 .LFB286:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL15:
-	.loc 2 1349 0
+	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
@@ -148,31 +148,31 @@ Ftl_log2:
 	.fnstart
 .LFB152:
 	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
+	.loc 3 127 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL17:
-	.loc 3 132 0
+	.loc 3 131 0
 	movs	r1, #0
-	.loc 3 130 0
+	.loc 3 129 0
 	movs	r2, #1
 .LVL18:
 .L9:
-	.loc 3 132 0 discriminator 1
+	.loc 3 131 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
 	bls	.L10
-	.loc 3 134 0
+	.loc 3 133 0
 	subs	r0, r3, #1
 .LVL19:
-	.loc 3 136 0
+	.loc 3 135 0
 	uxth	r0, r0
 	bx	lr
 .LVL20:
 .L10:
-	.loc 3 133 0 discriminator 3
+	.loc 3 132 0 discriminator 3
 	lsls	r2, r2, #1
 	b	.L9
 .LFE152:
@@ -499,8 +499,8 @@ IsBlkInVendorPart:
 	ldr	r2, .L34
 	ldrh	r3, [r2, #120]
 	cbz	r3, .L33
-.LBB218:
-.LBB219:
+.LBB222:
+.LBB223:
 	.loc 3 519 0
 	ldr	r3, [r2, #124]
 	ldrh	r2, [r2, #96]
@@ -510,16 +510,16 @@ IsBlkInVendorPart:
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE219:
-.LBE218:
+.LBE223:
+.LBE222:
 	.loc 3 524 0
 	movs	r0, #0
 .LVL35:
 	bx	lr
 .LVL36:
 .L30:
-.LBB221:
-.LBB220:
+.LBB225:
+.LBB224:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
@@ -527,8 +527,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	movs	r0, #1
 .LVL37:
-.LBE220:
-.LBE221:
+.LBE224:
+.LBE225:
 	.loc 3 525 0
 	bx	lr
 .L35:
@@ -548,11 +548,11 @@ IsBlkInVendorPart:
 sftl_get_density:
 	.fnstart
 .LFB171:
-	.loc 3 1212 0
+	.loc 3 1214 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1214 0
+	.loc 3 1216 0
 	ldr	r3, .L37
 	ldr	r0, [r3, #116]
 	bx	lr
@@ -732,23 +732,23 @@ FtlBbtMemInit:
 	.loc 4 150 0
 	ldr	r0, .L47
 	movw	r3, #65535
-.LBB227:
-.LBB228:
-.LBB229:
+.LBB231:
+.LBB232:
+.LBB233:
 	.loc 1 202 0
 	movs	r2, #16
 	movs	r1, #255
-.LBE229:
-.LBE228:
-.LBE227:
+.LBE233:
+.LBE232:
+.LBE231:
 	.loc 4 150 0
 	strh	r3, [r0, #128]	@ movhi
 	.loc 4 151 0
 	movs	r3, #0
 	strh	r3, [r0, #134]	@ movhi
-.LBB232:
-.LBB231:
-.LBB230:
+.LBB236:
+.LBB235:
+.LBB234:
 	.loc 1 202 0
 	adds	r0, r0, #140
 	b	memset
@@ -757,9 +757,9 @@ FtlBbtMemInit:
 	.align	2
 .L47:
 	.word	.LANCHOR0
-.LBE230:
-.LBE231:
-.LBE232:
+.LBE234:
+.LBE235:
+.LBE236:
 .LFE177:
 	.fnend
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -1005,14 +1005,14 @@ FtlFreeSysBlkQueueInit:
 .LVL74:
 	.loc 2 79 0
 	ldr	r3, .L71
-.LBB238:
-.LBB239:
-.LBB240:
+.LBB242:
+.LBB243:
+.LBB244:
 	.loc 1 202 0
 	mov	r1, #2048
-.LBE240:
-.LBE239:
-.LBE238:
+.LBE244:
+.LBE243:
+.LBE242:
 	.loc 2 76 0
 	push	{r4, lr}
 	.save {r4, lr}
@@ -1021,30 +1021,30 @@ FtlFreeSysBlkQueueInit:
 	movs	r4, #0
 	.loc 2 82 0
 	strh	r0, [r3, #188]	@ movhi
+.LBB249:
+.LBB247:
 .LBB245:
-.LBB243:
-.LBB241:
 	.loc 1 202 0
 	add	r0, r3, #196
 .LVL75:
-.LBE241:
-.LBE243:
 .LBE245:
+.LBE247:
+.LBE249:
 	.loc 2 79 0
 	strh	r4, [r3, #190]	@ movhi
 	.loc 2 80 0
 	strh	r4, [r3, #192]	@ movhi
 	.loc 2 81 0
 	strh	r4, [r3, #194]	@ movhi
+.LBB250:
+.LBB248:
 .LBB246:
-.LBB244:
-.LBB242:
 	.loc 1 202 0
 	bl	__memzero
 .LVL76:
-.LBE242:
-.LBE244:
 .LBE246:
+.LBE248:
+.LBE250:
 	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
@@ -1122,119 +1122,56 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	.fnstart
 .LFB191:
-	.loc 2 116 0
+	.loc 2 118 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
+	.loc 2 123 0
+	ldr	r3, .L88
+	.loc 2 118 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 .LCFI10:
 	.loc 2 123 0
-	movs	r3, #0
-	ldr	r6, .L88
-	mov	r4, r6
-.L80:
-	.loc 2 123 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6, #194]
-	uxth	r2, r3
-	adds	r7, r3, #1
-	cmp	r1, r2
-	bhi	.L81
-	movs	r1, #0
+	ldrh	r2, [r3, #194]
+	cbz	r2, .L79
+	.loc 2 119 0
+	ldrh	r5, [r3, #2272]
+	movs	r0, #0
+	ldrh	r1, [r3, #190]
+	mov	r6, r0
+	ldrh	r2, [r3, #192]
+	and	r5, r5, #31
 .LVL77:
-.L82:
-	.loc 2 128 0 is_stmt 1 discriminator 1
-	ldrh	ip, [r4, #194]
-	add	r3, ip, #-1
+.L81:
+	.loc 2 124 0 discriminator 1
+	uxth	r4, r0
+	adds	r0, r0, #1
+	cmp	r5, r4
+	bgt	.L82
+	cbz	r6, .L79
+	strh	r1, [r3, #190]	@ movhi
+	strh	r2, [r3, #192]	@ movhi
+.L79:
+	pop	{r4, r5, r6, pc}
 .LVL78:
-	cmp	r1, r3
-	blt	.L87
-	.loc 2 144 0
-	pop	{r3, r4, r5, r6, r7, pc}
+.L82:
+	.loc 2 125 0 discriminator 3
+	add	r4, r3, r1, lsl #1
+	.loc 2 126 0 discriminator 3
+	adds	r1, r1, #1
+	ubfx	r1, r1, #0, #10
+	.loc 2 125 0 discriminator 3
+	ldrh	r6, [r4, #196]
 .LVL79:
-.L81:
-	.loc 2 124 0 discriminator 3
-	ldrh	r2, [r6, #190]
-	uxth	r5, r3
-	adds	r3, r2, r5
-	add	r3, r6, r3, lsl #1
-	ldrh	r0, [r3, #196]
-	bl	P2V_block_in_plane
+	.loc 2 127 0 discriminator 3
+	add	r4, r3, r2, lsl #1
+	strh	r6, [r4, #196]	@ movhi
+	movs	r6, #1
 .LVL80:
-	.loc 2 125 0 discriminator 3
-	ldr	r2, [r6, #2248]
-	ldr	r3, [r6, #2244]
-	ldrh	r2, [r2, r0, lsl #1]
-	str	r2, [r3, r5, lsl #2]
-	mov	r3, r7
-	b	.L80
-.LVL81:
-.L87:
-	.loc 2 130 0
-	adds	r5, r1, #1
-	.loc 2 131 0
-	ldr	r0, [r4, #2244]
-.LVL82:
-	.loc 2 130 0
-	uxth	r5, r5
-	mov	r3, r1
-.LVL83:
-	mov	r2, r5
-.L83:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	r2, ip
-	bcc	.L85
-	.loc 2 134 0 is_stmt 1
-	cmp	r1, r3
-	beq	.L86
-	.loc 2 136 0
-	ldr	r2, [r0, r1, lsl #2]
-	.loc 2 135 0
-	ldr	r6, [r0, r3, lsl #2]
-	.loc 2 136 0
-	str	r2, [r0, r3, lsl #2]
-	.loc 2 137 0
-	ldr	r2, [r4, #2244]
-	str	r6, [r2, r1, lsl #2]
-	.loc 2 139 0
-	ldrh	r2, [r4, #190]
-	add	r3, r3, r2
-.LVL84:
-	.loc 2 140 0
-	add	r2, r2, r1
-	.loc 2 139 0
-	adds	r3, r3, #4
-	.loc 2 140 0
-	adds	r2, r2, #4
-	.loc 2 139 0
-	add	r3, r4, r3, lsl #1
-	.loc 2 140 0
-	add	r2, r4, r2, lsl #1
-	.loc 2 139 0
-	ldrh	r0, [r3, #188]
-.LVL85:
-	.loc 2 140 0
-	ldrh	r1, [r2, #188]
-	strh	r1, [r3, #188]	@ movhi
-	.loc 2 141 0
-	strh	r0, [r2, #188]	@ movhi
-.LVL86:
-.L86:
-	.loc 2 130 0 discriminator 1
-	mov	r1, r5
-	b	.L82
-.LVL87:
-.L85:
-	.loc 2 131 0
-	ldr	r6, [r0, r2, lsl #2]
-.LVL88:
-	ldr	r7, [r0, r3, lsl #2]
-	cmp	r7, r6
-	it	hi
-	movhi	r3, r2
-	.loc 2 130 0
-	adds	r2, r2, #1
-	uxth	r2, r2
-	b	.L83
+	.loc 2 128 0 discriminator 3
+	add	r2, r2, r6
+	ubfx	r2, r2, #0, #10
+	b	.L81
 .L89:
 	.align	2
 .L88:
@@ -1252,59 +1189,59 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	.fnstart
 .LFB192:
-	.loc 2 147 0
+	.loc 2 163 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL89:
-.LBB247:
-.LBB248:
+.LVL81:
+.LBB251:
+.LBB252:
 	.loc 2 94 0
 	ldr	r3, .L96
-.LBE248:
-.LBE247:
-	.loc 2 147 0
+.LBE252:
+.LBE251:
+	.loc 2 163 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
 .LCFI11:
-.LBB250:
-.LBB249:
+.LBB254:
+.LBB253:
 	.loc 2 94 0
 	ldrh	r4, [r3, #194]
-.LBE249:
-.LBE250:
-	.loc 2 152 0
+.LBE253:
+.LBE254:
+	.loc 2 168 0
 	cmp	r4, #1024
 	beq	.L94
-	.loc 2 155 0
+	.loc 2 171 0
 	ldrh	r5, [r3, #190]
 	movs	r1, #0
-.LVL90:
+.LVL82:
 .L92:
-	.loc 2 154 0 discriminator 1
+	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
 	bcc	.L93
 .L94:
-	.loc 2 148 0
+	.loc 2 164 0
 	movs	r0, #0
-.LVL91:
+.LVL83:
 	pop	{r4, r5, pc}
-.LVL92:
+.LVL84:
 .L93:
-	.loc 2 155 0
+	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
 	ldrh	r2, [r2, #196]
 	cmp	r2, r0
 	beq	.L95
-	.loc 2 154 0 discriminator 2
+	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
 	b	.L92
 .L95:
-	.loc 2 156 0
+	.loc 2 172 0
 	movs	r0, #1
-.LVL93:
-	.loc 2 162 0
+.LVL85:
+	.loc 2 178 0
 	pop	{r4, r5, pc}
 .L97:
 	.align	2
@@ -1314,58 +1251,6 @@ IsInFreeQueue:
 	.fnend
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	.fnstart
-.LFB193:
-	.loc 2 165 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LBB251:
-.LBB252:
-	.loc 2 89 0
-	ldr	r2, .L101
-	ldrh	r1, [r2, #194]
-.LBE252:
-.LBE251:
-	.loc 2 168 0
-	cbz	r1, .L100
-.LBB253:
-	.loc 2 170 0
-	ldrh	r3, [r2, #190]
-	.loc 2 171 0
-	subs	r1, r1, #1
-	strh	r1, [r2, #194]	@ movhi
-	.loc 2 170 0
-	add	r0, r2, r3, lsl #1
-	.loc 2 172 0
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	.loc 2 170 0
-	ldrh	r0, [r0, #196]
-	.loc 2 172 0
-	strh	r3, [r2, #190]	@ movhi
-	bx	lr
-.L100:
-.LBE253:
-	.loc 2 166 0
-	movw	r0, #65535
-	.loc 2 176 0
-	bx	lr
-.L102:
-	.align	2
-.L101:
-	.word	.LANCHOR0
-.LFE193:
-	.fnend
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.align	1
 	.global	insert_data_list
 	.syntax unified
 	.thumb
@@ -1375,176 +1260,210 @@ FtlFreeSysBlkQueueOut:
 insert_data_list:
 	.fnstart
 .LFB196:
-	.loc 2 217 0
+	.loc 2 249 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL94:
-	.loc 2 225 0
-	movw	r3, #65535
-	.loc 2 217 0
+.LVL86:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 .LCFI12:
-.LVL95:
-	.loc 2 225 0
-	cmp	r0, r3
-	beq	.L104
-	.loc 2 230 0
-	ldr	r2, .L116
-	movs	r5, #6
-	muls	r5, r0, r5
-	ldr	ip, [r2, #2252]
-	mov	r1, r2
-	add	r4, ip, r5
-.LVL96:
-	.loc 2 231 0
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [ip, r5]	@ movhi
-	.loc 2 233 0
-	ldr	r3, [r2, #2256]
-.LVL97:
-	cbnz	r3, .L105
-	.loc 2 234 0
-	str	r4, [r2, #2256]
-.LVL98:
-.L104:
-	.loc 2 281 0
+.LVL87:
+	.loc 2 260 0
+	ldr	r2, .L113
+	ldrh	r3, [r2, #16]
+	mov	r5, r2
+.LVL88:
+	cmp	r3, r0
+	bls	.L100
+.LBB257:
+.LBB258:
+	.loc 2 265 0
+	movs	r4, #6
+	ldr	ip, [r2, #2292]
+	muls	r4, r0, r4
+	.loc 2 266 0
+	movw	r3, #65535
+	.loc 2 265 0
+	add	r1, ip, r4
+.LVL89:
+	.loc 2 266 0
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [ip, r4]	@ movhi
+	.loc 2 268 0
+	ldr	r3, [r2, #2296]
+.LVL90:
+	cbnz	r3, .L101
+	.loc 2 269 0
+	str	r1, [r2, #2296]
+.LVL91:
+.L100:
+.LBE258:
+.LBE257:
+	.loc 2 323 0
 	movs	r0, #0
-.LVL99:
+.LVL92:
 	add	sp, sp, #12
 .LCFI13:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL100:
-.L105:
+.LVL93:
+.L101:
 .LCFI14:
-	.loc 2 239 0
-	ldrh	r6, [r4, #4]
-	.loc 2 238 0
-	lsls	r7, r0, #1
-	ldr	r8, [r2, #2260]
+.LBB260:
+.LBB259:
+	.loc 2 274 0
+	ldrh	r6, [r1, #4]
+	.loc 2 273 0
+	lsl	r10, r0, #1
+	ldr	r8, [r2, #2300]
 	ldrh	r2, [r8, r0, lsl #1]
-.LVL101:
-	.loc 2 240 0
+.LVL94:
+	.loc 2 275 0
 	cmp	r6, #0
-	beq	.L114
-	.loc 2 239 0
+	beq	.L111
+	.loc 2 274 0
 	muls	r6, r2, r6
-.LVL102:
-.L106:
-	.loc 2 244 0
-	ldr	lr, [r1, #2252]
+.LVL95:
+.L102:
+	.loc 2 279 0
+	ldr	lr, [r5, #2292]
+	.loc 2 282 0
+	ldrh	r7, [r5, #16]
+	.loc 2 279 0
 	sub	r2, r3, lr
-.LVL103:
+.LVL96:
 	asr	r9, r2, #1
-	ldr	r2, .L116+4
+	ldr	r2, .L113+4
+	.loc 2 282 0
+	str	r7, [sp]
+	.loc 2 279 0
 	mul	r2, r2, r9
-	.loc 2 252 0
-	ldr	r9, [r1, #2248]
-	add	r7, r9, r7
-	.loc 2 244 0
+	.loc 2 294 0
+	ldr	r9, [r5, #2304]
+	add	r5, r9, r10
+	.loc 2 279 0
 	uxth	r2, r2
-	.loc 2 252 0
-	str	r7, [sp, #4]
-.LVL104:
-.L112:
-	.loc 2 247 0
+	.loc 2 294 0
+	str	r5, [sp, #4]
+	.loc 2 256 0
+	movs	r5, #0
+.LVL97:
+.L109:
+	.loc 2 281 0
+	adds	r5, r5, #1
+.LVL98:
+	.loc 2 282 0
+	ldr	r7, [sp]
+	.loc 2 281 0
+	uxth	r5, r5
+.LVL99:
+	.loc 2 282 0
+	cmp	r5, r7
+	bhi	.L100
+	.loc 2 285 0
+	cmp	r0, r2
+	beq	.L100
+	.loc 2 289 0
 	ldrh	r7, [r3, #4]
-	.loc 2 246 0
+	.loc 2 288 0
 	lsl	r10, r2, #1
 	ldrh	fp, [r8, r2, lsl #1]
-	.loc 2 248 0
-	cbz	r7, .L115
-	.loc 2 247 0
+	.loc 2 290 0
+	cbz	r7, .L112
+	.loc 2 289 0
 	mul	r7, r7, fp
-.LVL105:
-.L107:
-	.loc 2 251 0
+.LVL100:
+.L104:
+	.loc 2 293 0
 	cmp	r6, r7
-	bne	.L108
-	.loc 2 252 0
+	bne	.L105
+	.loc 2 294 0
 	ldr	r7, [sp, #4]
-.LVL106:
+.LVL101:
 	ldrh	r10, [r9, r10]
 	ldrh	r7, [r7]
 	cmp	r10, r7
-	bcc	.L110
-.LVL107:
-.L109:
-	.loc 2 270 0
-	strh	r2, [ip, r5]	@ movhi
-	.loc 2 271 0
+	bcc	.L107
+.LVL102:
+.L106:
+	.loc 2 312 0
+	strh	r2, [ip, r4]	@ movhi
+	.loc 2 315 0
+	ldr	r4, .L113
+	.loc 2 313 0
 	ldrh	r2, [r3, #2]
-	strh	r2, [r4, #2]	@ movhi
-	.loc 2 273 0
-	ldr	r2, [r1, #2256]
+	strh	r2, [r1, #2]	@ movhi
+	.loc 2 315 0
+	ldr	r2, [r4, #2296]
 	cmp	r3, r2
-	.loc 2 277 0
+	.loc 2 319 0
 	ittte	ne
-	ldrhne	r4, [r3, #2]
-.LVL108:
+	ldrhne	r5, [r3, #2]
+.LVL103:
 	movne	r2, #6
-	ldrne	r1, [r1, #2252]
-	.loc 2 274 0
+	ldrne	r1, [r4, #2292]
+.LVL104:
+	.loc 2 316 0
 	strheq	r0, [r3, #2]	@ movhi
-.LVL109:
-	.loc 2 275 0
+.LVL105:
+	.loc 2 317 0
 	iteee	eq
-	streq	r4, [r1, #2256]
-	.loc 2 277 0
-	mulne	r2, r2, r4
-.LVL110:
+	streq	r1, [r4, #2296]
+	.loc 2 319 0
+	mulne	r2, r2, r5
 	strhne	r0, [r1, r2]	@ movhi
-	.loc 2 278 0
+.LVL106:
+	.loc 2 320 0
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L104
-.LVL111:
-.L114:
-	.loc 2 241 0
+	b	.L100
+.LVL107:
+.L111:
+	.loc 2 276 0
 	mov	r6, #-1
-.LVL112:
-	b	.L106
-.LVL113:
-.L115:
-	.loc 2 249 0
+.LVL108:
+	b	.L102
+.LVL109:
+.L112:
+	.loc 2 291 0
 	mov	r7, #-1
-.LVL114:
-	b	.L107
-.L108:
-	.loc 2 256 0
-	bcc	.L109
-.L110:
-	.loc 2 259 0
+.LVL110:
+	b	.L104
+.L105:
+	.loc 2 298 0
+	bcc	.L106
+.L107:
+	.loc 2 301 0
 	ldrh	r7, [r3]
-.LVL115:
+.LVL111:
 	movw	r10, #65535
 	cmp	r7, r10
-	bne	.L111
-	.loc 2 260 0
-	strh	r2, [r4, #2]	@ movhi
-	.loc 2 261 0
+	bne	.L108
+	.loc 2 302 0
+	strh	r2, [r1, #2]	@ movhi
+	.loc 2 303 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 262 0
-	str	r4, [r1, #2264]
-	.loc 2 263 0
-	b	.L104
-.L111:
-	.loc 2 267 0
+	.loc 2 304 0
+	ldr	r3, .L113
+.LVL112:
+	str	r1, [r3, #2308]
+	b	.L100
+.LVL113:
+.L108:
+	.loc 2 309 0
 	movs	r3, #6
-.LVL116:
-	.loc 2 246 0
+.LVL114:
 	mov	r2, r7
-	.loc 2 267 0
 	mla	r3, r3, r7, lr
-.LVL117:
-	.loc 2 246 0
-	b	.L112
-.L117:
+.LVL115:
+	b	.L109
+.L114:
 	.align	2
-.L116:
+.L113:
 	.word	.LANCHOR0
 	.word	-1431655765
+.LBE259:
+.LBE260:
 .LFE196:
 	.fnend
 	.size	insert_data_list, .-insert_data_list
@@ -1558,52 +1477,52 @@ insert_data_list:
 INSERT_DATA_LIST:
 	.fnstart
 .LFB195:
-	.loc 2 186 0
+	.loc 2 218 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL118:
+.LVL116:
 	push	{r3, lr}
 	.save {r3, lr}
 .LCFI15:
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL119:
-	.loc 2 188 0
-	ldr	r2, .L120
-	ldrh	r3, [r2, #2268]
+.LVL117:
+	.loc 2 220 0
+	ldr	r2, .L117
+	ldrh	r3, [r2, #2312]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #2268]	@ movhi
-	.loc 2 189 0
+	strh	r3, [r2, #2312]	@ movhi
+	.loc 2 221 0
 	ldrh	r2, [r2, #16]
 	cmp	r2, r3
-	bcs	.L118
-.LBB256:
-.LBB257:
-	movs	r2, #189
-	ldr	r1, .L120+4
-	ldr	r0, .L120+8
-.LBE257:
-.LBE256:
-	.loc 2 190 0
+	bcs	.L115
+.LBB263:
+.LBB264:
+	movs	r2, #221
+	ldr	r1, .L117+4
+	ldr	r0, .L117+8
+.LBE264:
+.LBE263:
+	.loc 2 222 0
 	pop	{r3, lr}
 .LCFI16:
-.LBB259:
-.LBB258:
-	.loc 2 189 0
+.LBB266:
+.LBB265:
+	.loc 2 221 0
 	b	printk
-.LVL120:
-.L118:
+.LVL118:
+.L115:
 .LCFI17:
 	pop	{r3, pc}
-.L121:
+.L118:
 	.align	2
-.L120:
+.L117:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
-.LBE258:
-.LBE259:
+.LBE265:
+.LBE266:
 .LFE195:
 	.fnend
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -1617,108 +1536,108 @@ INSERT_DATA_LIST:
 insert_free_list:
 	.fnstart
 .LFB197:
-	.loc 2 284 0
+	.loc 2 326 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL121:
+.LVL119:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 .LCFI18:
-	.loc 2 290 0
+	.loc 2 332 0
 	movw	r4, #65535
 	cmp	r0, r4
-	beq	.L123
-	.loc 2 293 0
-	ldr	r2, .L129
+	beq	.L120
+	.loc 2 335 0
+	ldr	r2, .L126
 	movs	r1, #6
 	mul	r7, r1, r0
-	ldr	ip, [r2, #2252]
+	ldr	ip, [r2, #2292]
 	mov	r5, r2
 	add	r6, ip, r7
-.LVL122:
-	.loc 2 294 0
+.LVL120:
+	.loc 2 336 0
 	strh	r4, [r6, #2]	@ movhi
 	strh	r4, [ip, r7]	@ movhi
-	.loc 2 296 0
-	ldr	r3, [r2, #2272]
-.LVL123:
-	cbnz	r3, .L124
-	.loc 2 297 0
-	str	r6, [r2, #2272]
-.LVL124:
-.L123:
-	.loc 2 330 0
+	.loc 2 338 0
+	ldr	r3, [r2, #2316]
+.LVL121:
+	cbnz	r3, .L121
+	.loc 2 339 0
+	str	r6, [r2, #2316]
+.LVL122:
+.L120:
+	.loc 2 372 0
 	movs	r0, #0
-.LVL125:
+.LVL123:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL126:
-.L124:
-	.loc 2 303 0
-	ldr	lr, [r2, #2252]
-	.loc 2 301 0
-	ldr	r8, [r2, #2248]
-	.loc 2 303 0
+.LVL124:
+.L121:
+	.loc 2 345 0
+	ldr	lr, [r2, #2292]
+	.loc 2 343 0
+	ldr	r8, [r2, #2304]
+	.loc 2 345 0
 	sub	r2, r3, lr
 	asr	r10, r2, #1
-	ldr	r2, .L129+4
-	.loc 2 301 0
+	ldr	r2, .L126+4
+	.loc 2 343 0
 	ldrh	r9, [r8, r0, lsl #1]
-.LVL127:
-	.loc 2 303 0
+.LVL125:
+	.loc 2 345 0
 	mul	r2, r2, r10
-	.loc 2 310 0
+	.loc 2 352 0
 	mov	r10, r4
-	.loc 2 303 0
+	.loc 2 345 0
 	uxth	r2, r2
-.L127:
-	.loc 2 307 0
+.L124:
+	.loc 2 349 0
 	ldrh	r4, [r8, r2, lsl #1]
 	cmp	r4, r9
-	bcs	.L125
-	.loc 2 310 0
+	bcs	.L122
+	.loc 2 352 0
 	ldrh	r4, [r3]
 	cmp	r4, r10
-	bne	.L126
-	.loc 2 311 0
+	bne	.L123
+	.loc 2 353 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 312 0
+	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 313 0
-	b	.L123
-.L126:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L120
+.L123:
+	.loc 2 358 0
 	mla	r3, r1, r4, lr
-	.loc 2 306 0
+	.loc 2 348 0
 	mov	r2, r4
-	b	.L127
-.L125:
-	.loc 2 319 0
+	b	.L124
+.L122:
+	.loc 2 361 0
 	ldrh	r1, [r3, #2]
 	strh	r1, [r6, #2]	@ movhi
-	.loc 2 320 0
+	.loc 2 362 0
 	strh	r2, [ip, r7]	@ movhi
-	.loc 2 322 0
-	ldr	r2, [r5, #2272]
+	.loc 2 364 0
+	ldr	r2, [r5, #2316]
 	cmp	r3, r2
-	.loc 2 326 0
+	.loc 2 368 0
 	ittte	ne
 	ldrhne	r4, [r3, #2]
 	movne	r2, #6
-	ldrne	r1, [r5, #2252]
-	.loc 2 323 0
+	ldrne	r1, [r5, #2292]
+	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 324 0
+	.loc 2 366 0
 	iteee	eq
-	streq	r6, [r5, #2272]
-	.loc 2 326 0
+	streq	r6, [r5, #2316]
+	.loc 2 368 0
 	mulne	r2, r2, r4
 	strhne	r0, [r1, r2]	@ movhi
-	.loc 2 327 0
+	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L123
-.L130:
+	b	.L120
+.L127:
 	.align	2
-.L129:
+.L126:
 	.word	.LANCHOR0
 	.word	-1431655765
 .LFE197:
@@ -1734,52 +1653,52 @@ insert_free_list:
 INSERT_FREE_LIST:
 	.fnstart
 .LFB194:
-	.loc 2 179 0
+	.loc 2 211 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL128:
+.LVL126:
 	push	{r3, lr}
 	.save {r3, lr}
 .LCFI19:
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL129:
-	.loc 2 181 0
-	ldr	r2, .L133
-	ldrh	r3, [r2, #2276]
+.LVL127:
+	.loc 2 213 0
+	ldr	r2, .L130
+	ldrh	r3, [r2, #2320]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #2276]	@ movhi
-	.loc 2 182 0
+	strh	r3, [r2, #2320]	@ movhi
+	.loc 2 214 0
 	ldrh	r2, [r2, #16]
 	cmp	r2, r3
-	bcs	.L131
-.LBB262:
-.LBB263:
-	movs	r2, #182
-	ldr	r1, .L133+4
-	ldr	r0, .L133+8
-.LBE263:
-.LBE262:
-	.loc 2 183 0
+	bcs	.L128
+.LBB269:
+.LBB270:
+	movs	r2, #214
+	ldr	r1, .L130+4
+	ldr	r0, .L130+8
+.LBE270:
+.LBE269:
+	.loc 2 215 0
 	pop	{r3, lr}
 .LCFI20:
-.LBB265:
-.LBB264:
-	.loc 2 182 0
+.LBB272:
+.LBB271:
+	.loc 2 214 0
 	b	printk
-.LVL130:
-.L131:
+.LVL128:
+.L128:
 .LCFI21:
 	pop	{r3, pc}
-.L134:
+.L131:
 	.align	2
-.L133:
+.L130:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
-.LBE264:
-.LBE265:
+.LBE271:
+.LBE272:
 .LFE194:
 	.fnend
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -1793,103 +1712,105 @@ INSERT_FREE_LIST:
 List_remove_node:
 	.fnstart
 .LFB198:
-	.loc 2 333 0
+	.loc 2 375 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL131:
+.LVL129:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 .LCFI22:
-	.loc 2 336 0
-	movs	r5, #6
-	ldr	r7, .L141
-	muls	r5, r1, r5
-	.loc 2 337 0
+	.loc 2 378 0
+	movs	r6, #6
+	ldr	r4, .L138
+	muls	r6, r1, r6
+	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 333 0
+	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 336 0
-	ldr	r6, [r7, #2252]
-	adds	r4, r6, r5
-.LVL132:
-	.loc 2 337 0
-	ldrh	r2, [r4, #2]
+	.loc 2 378 0
+	ldr	r7, [r4, #2292]
+	adds	r5, r7, r6
+.LVL130:
+	.loc 2 379 0
+	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L136
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L133
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
-	cmp	r4, r3
-	beq	.L136
-	.loc 2 337 0 discriminator 2
-	movw	r2, #337
-	ldr	r1, .L141+4
-.LVL133:
-	ldr	r0, .L141+8
+	cmp	r5, r3
+	beq	.L133
+	.loc 2 379 0 discriminator 2
+	movw	r2, #379
+	ldr	r1, .L138+4
+.LVL131:
+	ldr	r0, .L138+8
 	bl	printk
-.LVL134:
-.L136:
-	.loc 2 339 0 is_stmt 1
+.LVL132:
+.L133:
+	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
-	movw	r2, #65535
-	cmp	r4, r3
-	ldrh	r3, [r6, r5]
-	bne	.L137
-	.loc 2 340 0
-	cmp	r3, r2
-	.loc 2 343 0
+	movw	r1, #65535
+.LVL133:
+	cmp	r5, r3
+	ldrh	r3, [r7, r6]
+	bne	.L134
+	.loc 2 382 0
+	cmp	r3, r1
+	.loc 2 385 0
 	ittee	ne
-	ldrne	r1, [r7, #2252]
-.LVL135:
-	movne	r0, #6
-	.loc 2 341 0
+	ldrne	r0, [r4, #2292]
+	movne	r2, #6
+	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 343 0
+	.loc 2 385 0
 	ittt	ne
-	mlane	r3, r0, r3, r1
+	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 2 344 0
-	strhne	r2, [r3, #2]	@ movhi
-.L139:
-	.loc 2 355 0
+	.loc 2 386 0
+	strhne	r1, [r3, #2]	@ movhi
+.L136:
+	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 357 0
+	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 355 0
-	strh	r3, [r6, r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 357 0
+	.loc 2 399 0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL136:
+.LVL134:
+.L134:
+	.loc 2 388 0
+	cmp	r3, r1
+	ldrh	r1, [r5, #2]
+	bne	.L137
+	.loc 2 389 0
+	cmp	r1, r3
+	beq	.L136
+	.loc 2 391 0
+	movs	r2, #6
+	ldr	r0, [r4, #2292]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L136
 .L137:
-	.loc 2 346 0
-	cmp	r3, r2
-	ldrh	r1, [r4, #2]
-.LVL137:
-	mov	r2, #6
-	.loc 2 348 0
-	ldr	r0, [r7, #2252]
-	.loc 2 346 0
-	bne	.L140
-	.loc 2 348 0
-	muls	r2, r1, r2
-	strh	r3, [r0, r2]	@ movhi
-	b	.L139
-.L140:
-	.loc 2 351 0
+	.loc 2 395 0
+	ldr	r0, [r4, #2292]
+	movs	r2, #6
 	mla	r3, r2, r3, r0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 352 0
-	ldrh	r0, [r4, #2]
-	.loc 2 353 0
-	ldrh	r1, [r6, r5]
-	ldr	r3, [r7, #2252]
+	.loc 2 396 0
+	ldrh	r0, [r5, #2]
+	.loc 2 397 0
+	ldrh	r1, [r7, r6]
+	ldr	r3, [r4, #2292]
 	muls	r2, r0, r2
 	strh	r1, [r3, r2]	@ movhi
-	b	.L139
-.L142:
+	b	.L136
+.L139:
 	.align	2
-.L141:
+.L138:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
@@ -1906,66 +1827,66 @@ List_remove_node:
 List_pop_index_node:
 	.fnstart
 .LFB199:
-	.loc 2 360 0
+	.loc 2 404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL138:
+.LVL135:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 .LCFI23:
-	.loc 2 364 0
+	.loc 2 408 0
 	ldr	r3, [r0]
-.LVL139:
-	cbz	r3, .L149
-	.loc 2 369 0
-	ldr	r2, .L150
-	.loc 2 368 0
+.LVL136:
+	cbz	r3, .L146
+	.loc 2 413 0
+	ldr	r2, .L147
+	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 369 0
+	.loc 2 413 0
 	movs	r6, #6
-	ldr	r2, [r2, #2252]
+	ldr	r2, [r2, #2292]
+.L142:
+	.loc 2 412 0
+	cbnz	r1, .L143
 .L145:
-	.loc 2 368 0
-	cbnz	r1, .L146
-.L148:
-	.loc 2 372 0
-	ldr	r4, .L150+4
+	.loc 2 416 0
+	ldr	r4, .L147+4
 	subs	r3, r3, r2
-.LVL140:
+.LVL137:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-	.loc 2 373 0
+	.loc 2 417 0
 	uxth	r1, r4
-.LVL141:
+.LVL138:
 	bl	List_remove_node
-.LVL142:
+.LVL139:
 	uxth	r0, r4
-	.loc 2 375 0
+	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL143:
-.L146:
-	.loc 2 368 0 discriminator 1
+.LVL140:
+.L143:
+	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L148
-	.loc 2 370 0
+	beq	.L145
+	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL144:
-	.loc 2 369 0
+.LVL141:
+	.loc 2 413 0
 	mla	r3, r6, r4, r2
-	.loc 2 370 0
+	.loc 2 414 0
 	uxth	r1, r1
-.LVL145:
-	b	.L145
-.L149:
-	.loc 2 365 0
+.LVL142:
+	b	.L142
+.L146:
+	.loc 2 409 0
 	movw	r0, #65535
-.LVL146:
-	.loc 2 376 0
+.LVL143:
+	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
-.L151:
+.L148:
 	.align	2
-.L150:
+.L147:
 	.word	.LANCHOR0
 	.word	-1431655765
 .LFE199:
@@ -1981,15 +1902,15 @@ List_pop_index_node:
 List_pop_head_node:
 	.fnstart
 .LFB200:
-	.loc 2 379 0
+	.loc 2 423 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL147:
-	.loc 2 380 0
+.LVL144:
+	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL148:
+.LVL145:
 .LFE200:
 	.fnend
 	.size	List_pop_head_node, .-List_pop_head_node
@@ -2003,64 +1924,64 @@ List_pop_head_node:
 List_get_gc_head_node:
 	.fnstart
 .LFB201:
-	.loc 2 384 0
+	.loc 2 428 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL149:
-	.loc 2 388 0
-	ldr	r2, .L159
-	.loc 2 384 0
+.LVL146:
+	.loc 2 432 0
+	ldr	r2, .L156
+	.loc 2 428 0
 	push	{r4, lr}
 	.save {r4, lr}
 .LCFI24:
-	.loc 2 388 0
-	ldr	r3, [r2, #2256]
-.LVL150:
-	cbz	r3, .L158
-	.loc 2 393 0
-	ldr	r1, [r2, #2252]
+	.loc 2 432 0
+	ldr	r3, [r2, #2296]
+.LVL147:
+	cbz	r3, .L155
+	.loc 2 437 0
+	ldr	r1, [r2, #2292]
 	movs	r4, #6
-	.loc 2 392 0
+	.loc 2 436 0
 	movw	r2, #65535
-.L155:
-	cbz	r0, .L156
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.L152:
+	cbz	r0, .L153
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL151:
+.LVL148:
 	cmp	r3, r2
-	bne	.L157
-.LVL152:
-.L158:
-	.loc 2 389 0 is_stmt 1
+	bne	.L154
+.LVL149:
+.L155:
+	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL153:
+.LVL150:
 	pop	{r4, pc}
-.LVL154:
-.L157:
-	.loc 2 394 0
+.LVL151:
+.L154:
+	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL155:
-	.loc 2 393 0
+.LVL152:
+	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL156:
-	.loc 2 394 0
+.LVL153:
+	.loc 2 438 0
 	uxth	r0, r0
-.LVL157:
-	b	.L155
-.L156:
-	.loc 2 398 0
-	ldr	r0, .L159+4
-.LVL158:
+.LVL154:
+	b	.L152
+.L153:
+	.loc 2 442 0
+	ldr	r0, .L156+4
+.LVL155:
 	subs	r3, r3, r1
-.LVL159:
+.LVL156:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 401 0
+	.loc 2 445 0
 	pop	{r4, pc}
-.L160:
+.L157:
 	.align	2
-.L159:
+.L156:
 	.word	.LANCHOR0
 	.word	-1431655765
 .LFE201:
@@ -2076,120 +1997,147 @@ List_get_gc_head_node:
 List_update_data_list:
 	.fnstart
 .LFB202:
-	.loc 2 404 0
+	.loc 2 448 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL160:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
+.LVL157:
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 .LCFI25:
-	.loc 2 404 0
+	.loc 2 448 0
 	mov	r5, r0
-	.loc 2 413 0
+	.loc 2 457 0
 	ldr	r4, .L169
-	ldrh	r3, [r4, #2280]
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r0
-	beq	.L163
-	.loc 2 413 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2328]
+	beq	.L160
+	.loc 2 457 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
 	cmp	r3, r0
-	beq	.L163
-	.loc 2 413 0 discriminator 2
-	ldrh	r3, [r4, #2376]
+	beq	.L160
+	.loc 2 457 0 discriminator 2
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r0
-	beq	.L163
-.LBB268:
-.LBB269:
-	.loc 2 416 0 is_stmt 1
-	movs	r3, #6
-	ldr	r1, [r4, #2252]
-	muls	r3, r0, r3
-	.loc 2 418 0
-	ldr	r2, [r4, #2256]
-	.loc 2 416 0
-	adds	r7, r1, r3
+	beq	.L160
+.LBB275:
+.LBB276:
+	.loc 2 460 0 is_stmt 1
+	movs	r7, #6
+	ldr	r9, [r4, #2292]
+	muls	r7, r0, r7
+	.loc 2 462 0
+	ldr	r3, [r4, #2296]
+	.loc 2 460 0
+	add	r8, r9, r7
+.LVL158:
+	.loc 2 462 0
+	cmp	r8, r3
+	beq	.L160
+	.loc 2 466 0
+	ldrh	r6, [r8, #4]
+	.loc 2 465 0
+	ldr	r3, [r4, #2300]
+	ldrh	r3, [r3, r0, lsl #1]
+.LVL159:
+	.loc 2 467 0
+	cmp	r6, #0
+	beq	.L167
+	.loc 2 466 0
+	muls	r6, r3, r6
+.LVL160:
+.L162:
+	.loc 2 470 0
+	ldrh	r3, [r8, #2]
 .LVL161:
-	.loc 2 418 0
-	cmp	r7, r2
-	beq	.L163
-	.loc 2 421 0
-	ldr	r2, [r4, #2260]
-	.loc 2 422 0
-	ldrh	r6, [r7, #4]
-	ldrh	r2, [r2, r0, lsl #1]
-	.loc 2 424 0
-	muls	r6, r2, r6
-.LVL162:
-	.loc 2 426 0
-	ldrh	r2, [r7, #2]
-	movw	r0, #65535
-	.loc 2 424 0
-	it	eq
-	moveq	r6, #-1
-	.loc 2 426 0
-	cmp	r2, r0
-	bne	.L166
-	ldrh	r3, [r1, r3]
+	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L166
-	mov	r2, #426
+	bne	.L163
+	ldrh	r2, [r9, r7]
+	cmp	r2, r3
+	bne	.L163
+	mov	r2, #470
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
 	bl	printk
-.LVL163:
-.L166:
-	.loc 2 427 0
-	ldrh	r3, [r7, #2]
+.LVL162:
+.L163:
+	.loc 2 471 0
+	ldrh	r3, [r8, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L164
+	ldrh	r2, [r9, r7]
+	cmp	r2, r3
+	beq	.L160
+.L164:
+	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-	.loc 2 428 0
+	.loc 2 474 0
 	ldr	r3, .L169+12
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 429 0
-	ldr	r1, [r4, #2260]
-	.loc 2 430 0
+	.loc 2 475 0
+	ldr	r1, [r4, #2300]
 	ldrh	r0, [r1, r3, lsl #1]
-	ldr	r1, [r4, #2252]
+.LVL163:
+	.loc 2 476 0
+	ldr	r1, [r4, #2292]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	.loc 2 432 0
+	.loc 2 477 0
+	cbz	r3, .L168
+	.loc 2 476 0
 	muls	r3, r0, r3
 .LVL164:
-	it	eq
-	moveq	r3, #-1
-	.loc 2 434 0
+.L165:
+	.loc 2 480 0
 	cmp	r6, r3
-	bcs	.L163
-	.loc 2 435 0
+	bcs	.L160
+	.loc 2 481 0
 	mov	r1, r5
 	ldr	r0, .L169+16
-	bl	List_remove_node
 .LVL165:
-	ldrh	r3, [r4, #2268]
-	cbnz	r3, .L168
-	movw	r2, #435
+	bl	List_remove_node
+.LVL166:
+	ldrh	r3, [r4, #2312]
+	cbnz	r3, .L166
+	movw	r2, #481
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
 	bl	printk
-.LVL166:
-.L168:
-	ldrh	r3, [r4, #2268]
-	.loc 2 436 0
+.LVL167:
+.L166:
+	ldrh	r3, [r4, #2312]
+	.loc 2 482 0
 	mov	r0, r5
-	.loc 2 435 0
+	.loc 2 481 0
 	subs	r3, r3, #1
-	strh	r3, [r4, #2268]	@ movhi
-	.loc 2 436 0
+	strh	r3, [r4, #2312]	@ movhi
+	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL167:
-.L163:
-.LBE269:
-.LBE268:
-	.loc 2 439 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
 .LVL168:
+.L160:
+.LBE276:
+.LBE275:
+	.loc 2 485 0
+	movs	r0, #0
+.LVL169:
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+.LVL170:
+.L167:
+.LBB278:
+.LBB277:
+	.loc 2 468 0
+	mov	r6, #-1
+.LVL171:
+	b	.L162
+.LVL172:
+.L168:
+	.loc 2 478 0
+	mov	r3, #-1
+.LVL173:
+	b	.L165
 .L170:
 	.align	2
 .L169:
@@ -2197,97 +2145,13 @@ List_update_data_list:
 	.word	.LANCHOR1+51
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR0+2256
+	.word	.LANCHOR0+2296
+.LBE277:
+.LBE278:
 .LFE202:
 	.fnend
 	.size	List_update_data_list, .-List_update_data_list
 	.align	1
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-	.fnstart
-.LFB205:
-	.loc 2 516 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL169:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI26:
-	.loc 2 516 0
-	mov	r4, r0
-	.loc 2 520 0
-	ldrh	r1, [r0, #10]
-	movs	r3, #0
-	ldr	r2, [r0, #12]
-.LVL170:
-.L172:
-	uxth	r5, r3
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	r5, r1
-	bcc	.L174
-.L175:
-.LBB272:
-.LBB273:
-	.loc 2 532 0 is_stmt 1
-	mov	r2, #532
-	ldr	r1, .L181
-	ldr	r0, .L181+4
-	bl	printk
-.LVL171:
-	b	.L176
-.L174:
-.LBE273:
-.LBE272:
-	.loc 2 521 0
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L172
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL172:
-	strh	r0, [r7]	@ movhi
-	.loc 2 523 0
-	cbz	r0, .L173
-	.loc 2 526 0
-	ldr	r3, [r4, #28]
-	.loc 2 524 0
-	strh	r6, [r4, #2]	@ movhi
-	.loc 2 525 0
-	strh	r5, [r4]	@ movhi
-	.loc 2 526 0
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	.loc 2 527 0
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L173:
-	.loc 2 532 0
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bls	.L175
-.L176:
-	.loc 2 534 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL173:
-.L182:
-	.align	2
-.L181:
-	.word	.LANCHOR1+73
-	.word	.LC1
-.LFE205:
-	.fnend
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.align	1
 	.global	select_l2p_ram_region
 	.syntax unified
 	.thumb
@@ -2297,105 +2161,105 @@ ftl_map_blk_alloc_new_blk:
 select_l2p_ram_region:
 	.fnstart
 .LFB210:
-	.loc 2 700 0
+	.loc 2 749 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI27:
-	.loc 2 705 0
+.LCFI26:
+	.loc 2 754 0
 	movs	r1, #0
-	ldr	r5, .L193
-	.loc 2 706 0
+	ldr	r5, .L181
+	.loc 2 755 0
 	movs	r0, #12
 	movw	r6, #65535
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	r2, [r5, #114]
-	.loc 2 706 0
-	ldr	r3, [r5, #2424]
-.L184:
+	.loc 2 755 0
+	ldr	r3, [r5, #2468]
+.L172:
 	uxth	r4, r1
-	.loc 2 705 0 discriminator 1
+	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L186
+	bcc	.L174
 	mov	r4, r2
 	movs	r1, #0
 	mov	r7, #-2147483648
-	.loc 2 716 0
+	.loc 2 765 0
 	mov	ip, #12
-.L187:
+.L175:
 	uxth	r6, r1
-	.loc 2 715 0 discriminator 1
+	.loc 2 764 0 discriminator 1
 	cmp	r6, r2
-	bcc	.L189
-	.loc 2 724 0
+	bcc	.L177
+	.loc 2 773 0
 	cmp	r4, r2
-	bcc	.L185
-	.loc 2 730 0
-	ldrh	r7, [r5, #2428]
+	bcc	.L173
+	.loc 2 779 0
+	ldrh	r7, [r5, #2472]
 	mov	r4, r2
 	movs	r1, #0
 	mov	r0, #-1
-.L190:
+.L178:
 	uxth	r5, r1
-	.loc 2 729 0 discriminator 1
+	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L192
-	.loc 2 735 0
+	bcc	.L180
+	.loc 2 784 0
 	cmp	r4, r2
-	bcc	.L185
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	movw	r2, #735
-	ldr	r1, .L193+4
-	ldr	r0, .L193+8
+	bcc	.L173
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	r2, #784
+	ldr	r1, .L181+4
+	ldr	r0, .L181+8
 	bl	printk
 .LVL174:
-	b	.L185
-.L186:
+	b	.L173
+.L174:
 	adds	r1, r1, #1
-	.loc 2 706 0 is_stmt 1
+	.loc 2 755 0 is_stmt 1
 	mla	r7, r0, r1, r3
 	ldrh	r7, [r7, #-12]
 	cmp	r7, r6
-	bne	.L184
-.L185:
-	.loc 2 737 0
+	bne	.L172
+.L173:
+	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L189:
-	.loc 2 716 0
+.L177:
+	.loc 2 765 0
 	mla	r0, ip, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L188
-	.loc 2 717 0
+	blt	.L176
+	.loc 2 766 0
 	cmp	r7, r0
 	itt	hi
 	movhi	r7, r0
 	movhi	r4, r6
-.L188:
+.L176:
 	adds	r1, r1, #1
-	b	.L187
-.L192:
-	.loc 2 730 0
+	b	.L175
+.L180:
+	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L191
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L179
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L191:
+.L179:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L190
-.L194:
+	b	.L178
+.L182:
 	.align	2
-.L193:
+.L181:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+99
+	.word	.LANCHOR1+73
 	.word	.LC1
 .LFE210:
 	.fnend
@@ -2410,68 +2274,68 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	.fnstart
 .LFB216:
-	.loc 2 882 0 is_stmt 1
+	.loc 2 931 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL175:
-	.loc 2 885 0
-	ldr	r1, .L201
-	.loc 2 882 0
+	.loc 2 934 0
+	ldr	r1, .L189
+	.loc 2 931 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI28:
+.LCFI27:
 	mov	r3, r1
-	.loc 2 885 0
-	ldrh	r2, [r1, #2430]
+	.loc 2 934 0
+	ldrh	r2, [r1, #2474]
 	cmp	r2, #4
-	bhi	.L196
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L196
-	.loc 2 885 0
+	bhi	.L184
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L184
+	.loc 2 934 0
 	adds	r2, r2, #1
-	strh	r2, [r1, #2430]	@ movhi
-	.loc 2 894 0 is_stmt 1
+	strh	r2, [r1, #2474]	@ movhi
+	.loc 2 943 0 is_stmt 1
 	pop	{r4, r5, pc}
-.L196:
-	.loc 2 886 0
+.L184:
+	.loc 2 935 0
 	movs	r2, #0
 	ldrh	r1, [r3, #16]
-	strh	r2, [r3, #2430]	@ movhi
-.LBB276:
-.LBB277:
-	.loc 2 890 0
+	strh	r2, [r3, #2474]	@ movhi
+.LBB281:
+.LBB282:
+	.loc 2 939 0
 	movw	r5, #65535
-.LBE277:
-.LBE276:
-	.loc 2 887 0
-	str	r2, [r3, #2432]
-.LBB279:
-.LBB278:
-	.loc 2 890 0
-	ldr	r2, [r3, #2260]
+.LBE282:
+.LBE281:
+	.loc 2 936 0
+	str	r2, [r3, #2476]
+.LBB284:
+.LBB283:
+	.loc 2 939 0
+	ldr	r2, [r3, #2300]
 	add	r1, r2, r1, lsl #1
-.L197:
-	.loc 2 888 0
+.L185:
+	.loc 2 937 0
 	cmp	r2, r1
-	bne	.L199
+	bne	.L187
 	pop	{r4, r5, pc}
-.L199:
-	.loc 2 890 0
+.L187:
+	.loc 2 939 0
 	ldrh	r4, [r2], #2
 	cmp	r4, r5
-	.loc 2 891 0
+	.loc 2 940 0
 	ittt	ne
-	ldrne	r0, [r3, #2432]
+	ldrne	r0, [r3, #2476]
 .LVL176:
 	addne	r0, r0, r4
-	strne	r0, [r3, #2432]
-	b	.L197
-.L202:
+	strne	r0, [r3, #2476]
+	b	.L185
+.L190:
 	.align	2
-.L201:
+.L189:
 	.word	.LANCHOR0
-.LBE278:
-.LBE279:
+.LBE283:
+.LBE284:
 .LFE216:
 	.fnend
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2485,20 +2349,20 @@ FtlUpdateVaildLpn:
 ftl_set_blk_mode:
 	.fnstart
 .LFB222:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL177:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1348 0
-	cbz	r1, .L204
+	.loc 2 1397 0
+	cbz	r1, .L192
 	b	ftl_set_blk_mode.part.6
 .LVL178:
-.L204:
-	.loc 2 1351 0
-	ldr	r2, .L205
+.L192:
+	.loc 2 1400 0
+	ldr	r2, .L193
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 .LVL179:
@@ -2510,9 +2374,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L206:
+.L194:
 	.align	2
-.L205:
+.L193:
 	.word	.LANCHOR0
 .LFE222:
 	.fnend
@@ -2527,25 +2391,25 @@ ftl_set_blk_mode:
 ftl_get_blk_mode:
 	.fnstart
 .LFB223:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL181:
-	.loc 2 1356 0
-	ldr	r3, .L208
+	.loc 2 1405 0
+	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 .LVL182:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
-.L209:
+.L197:
 	.align	2
-.L208:
+.L196:
 	.word	.LANCHOR0
 .LFE223:
 	.fnend
@@ -2560,79 +2424,79 @@ ftl_get_blk_mode:
 ftl_sb_update_avl_pages:
 	.fnstart
 .LFB229:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL183:
-	.loc 2 1610 0
+	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1608 0
+	.loc 2 1657 0
 	push	{r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
-.LCFI29:
-	.loc 2 1610 0
+.LCFI28:
+	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
 	add	r4, r0, r2, lsl #1
-	.loc 2 1613 0
+	.loc 2 1662 0
 	movw	r7, #65535
-	.loc 2 1611 0
-	ldr	r3, .L217
+	.loc 2 1660 0
+	ldr	r3, .L205
 	adds	r4, r4, #14
 	ldrh	r5, [r3, #8]
-.L211:
-	.loc 2 1611 0 is_stmt 0 discriminator 1
+.L199:
+	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r5
-	bcc	.L213
+	bcc	.L201
 	ldrh	r3, [r3, #78]
 	add	r4, r0, #16
-	.loc 2 1620 0 is_stmt 1
+	.loc 2 1669 0 is_stmt 1
 	movw	r6, #65535
 	subs	r3, r3, #1
 	subs	r1, r3, r1
 .LVL184:
-	.loc 2 1622 0
+	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
-.L214:
-	.loc 2 1618 0 discriminator 1
+.L202:
+	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
 .LVL185:
 	cmp	r5, r2
-	bhi	.L216
-	.loc 2 1625 0
+	bhi	.L204
+	.loc 2 1674 0
 	pop	{r4, r5, r6, r7, pc}
 .LVL186:
-.L213:
-	.loc 2 1613 0
+.L201:
+	.loc 2 1662 0
 	ldrh	r6, [r4, #2]!
-	.loc 2 1611 0
+	.loc 2 1660 0
 	adds	r2, r2, #1
 .LVL187:
 	uxth	r2, r2
 .LVL188:
-	.loc 2 1613 0
+	.loc 2 1662 0
 	cmp	r6, r7
-	.loc 2 1615 0
+	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r6, [r0, #4]
 	addne	r6, r6, #1
 	strhne	r6, [r0, #4]	@ movhi
-	b	.L211
+	b	.L199
 .LVL189:
-.L216:
-	.loc 2 1620 0
+.L204:
+	.loc 2 1669 0
 	ldrh	r2, [r4], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
-	.loc 2 1622 0
+	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L214
-.L218:
+	b	.L202
+.L206:
 	.align	2
-.L217:
+.L205:
 	.word	.LANCHOR0
 .LFE229:
 	.fnend
@@ -2647,71 +2511,71 @@ ftl_sb_update_avl_pages:
 FtlSlcSuperblockCheck:
 	.fnstart
 .LFB232:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL190:
-	.loc 2 2016 0
+	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2013 0
+	.loc 2 2062 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI30:
-	.loc 2 2016 0
-	cbz	r3, .L219
-	.loc 2 2018 0
+.LCFI29:
+	.loc 2 2065 0
+	cbz	r3, .L207
+	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L219
-.LBB282:
-.LBB283:
-	.loc 2 2020 0
+	beq	.L207
+.LBB287:
+.LBB288:
+	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2025 0
+	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2020 0
+	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
 .LVL191:
-	.loc 2 2023 0
-	ldr	r2, .L225
+	.loc 2 2072 0
+	ldr	r2, .L213
 	ldrh	r4, [r2, #8]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	r2, r3
-.L222:
+.L210:
 	cmp	r1, r2
-	beq	.L224
-.L219:
+	beq	.L212
+.L207:
 	pop	{r4, r5, pc}
-.L224:
-	.loc 2 2022 0
+.L212:
+	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2022 0
+	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2027 0
+	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L222
-.L226:
+	b	.L210
+.L214:
 	.align	2
-.L225:
+.L213:
 	.word	.LANCHOR0
-.LBE283:
-.LBE282:
+.LBE288:
+.LBE287:
 .LFE232:
 	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2725,88 +2589,88 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	.fnstart
 .LFB234:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL192:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI31:
-	.loc 2 2045 0
+.LCFI30:
+	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2048 0
-	ldr	r6, .L232
+	.loc 2 2097 0
+	ldr	r6, .L220
 	ldrh	r2, [r0]
 	ldrh	r3, [r6, #16]
 	cmp	r2, r3
-	bcc	.L228
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	mov	r2, #2048
-	ldr	r1, .L232+4
-	ldr	r0, .L232+8
+	bcc	.L216
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	movw	r2, #2097
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
 	bl	printk
 .LVL193:
-.L228:
-	.loc 2 2051 0 is_stmt 1
+.L216:
+	.loc 2 2100 0 is_stmt 1
 	ldrh	r9, [r6, #8]
 	add	r7, r4, #16
-	.loc 2 2052 0
-	ldr	r10, .L232+12
-	.loc 2 2053 0
+	.loc 2 2101 0
+	ldr	r10, .L220+12
+	.loc 2 2102 0
 	movw	r8, #65535
-	.loc 2 2049 0
+	.loc 2 2098 0
 	movs	r5, #0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.L229:
-	.loc 2 2051 0 discriminator 1
+.L217:
+	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r9, r3
-	bhi	.L231
-	.loc 2 2061 0
+	bhi	.L219
+	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	.loc 2 2064 0
+	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2061 0
+	.loc 2 2110 0
 	ldrh	r2, [r6, #78]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2062 0
+	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL194:
-.L231:
-	.loc 2 2052 0
+.L219:
+	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 .LVL195:
-	.loc 2 2053 0
+	.loc 2 2102 0
 	strh	r8, [r7]	@ movhi
-	.loc 2 2052 0
+	.loc 2 2101 0
 	mov	fp, r0
-	.loc 2 2054 0
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
 .LVL196:
-	cbnz	r0, .L230
-	.loc 2 2055 0
+	cbnz	r0, .L218
+	.loc 2 2104 0
 	strh	fp, [r7]	@ movhi
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L230:
+.L218:
 	adds	r5, r5, #1
 	adds	r7, r7, #2
-	b	.L229
-.L233:
+	b	.L217
+.L221:
 	.align	2
-.L232:
+.L220:
 	.word	.LANCHOR0
-	.word	.LANCHOR1+121
+	.word	.LANCHOR1+95
 	.word	.LC1
 	.word	.LANCHOR0+36
 .LFE234:
@@ -2822,70 +2686,70 @@ make_superblock:
 update_multiplier_value:
 	.fnstart
 .LFB243:
-	.loc 2 2401 0
+	.loc 2 2451 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL197:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI32:
-	.loc 2 2405 0
+.LCFI31:
+	.loc 2 2455 0
 	movs	r5, #0
-	ldr	r6, .L240
-	.loc 2 2401 0
+	ldr	r6, .L228
+	.loc 2 2451 0
 	mov	r7, r0
-	.loc 2 2403 0
+	.loc 2 2453 0
 	mov	r4, r5
-	.loc 2 2405 0
+	.loc 2 2455 0
 	ldrh	r8, [r6, #8]
-	.loc 2 2406 0
+	.loc 2 2456 0
 	add	r10, r6, #36
-	.loc 2 2408 0
+	.loc 2 2458 0
 	ldrh	r9, [r6, #78]
-.L235:
-	.loc 2 2405 0 discriminator 1
+.L223:
+	.loc 2 2455 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L237
-	.loc 2 2410 0
-	cbz	r4, .L239
-	.loc 2 2411 0
+	bhi	.L225
+	.loc 2 2460 0
+	cbz	r4, .L227
+	.loc 2 2461 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
 .LVL198:
-.L238:
-	.loc 2 2412 0
-	ldr	r1, [r6, #2252]
+.L226:
+	.loc 2 2462 0
+	ldr	r1, [r6, #2292]
 	movs	r3, #6
 	mla	r1, r3, r7, r1
 	strh	r0, [r1, #4]	@ movhi
-	.loc 2 2414 0
+	.loc 2 2464 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
 .LVL199:
-.L237:
-	.loc 2 2406 0
+.L225:
+	.loc 2 2456 0
 	mov	r1, r7
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 .LVL200:
-	.loc 2 2407 0
+	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
 .LVL201:
-	cbnz	r0, .L236
-	.loc 2 2408 0
+	cbnz	r0, .L224
+	.loc 2 2458 0
 	add	r4, r4, r9
 	uxth	r4, r4
-.L236:
+.L224:
 	adds	r5, r5, #1
-	b	.L235
-.L239:
+	b	.L223
+.L227:
 	mov	r0, r4
-	b	.L238
-.L241:
+	b	.L226
+.L229:
 	.align	2
-.L240:
+.L228:
 	.word	.LANCHOR0
 .LFE243:
 	.fnend
@@ -2900,29 +2764,29 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	.fnstart
 .LFB244:
-	.loc 2 2417 0
+	.loc 2 2467 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2420 0
-	ldr	r2, .L245
-	ldr	r0, [r2, #2272]
-	cbz	r0, .L243
-	.loc 2 2421 0
-	ldr	r3, [r2, #2252]
+	.loc 2 2470 0
+	ldr	r2, .L233
+	ldr	r0, [r2, #2316]
+	cbz	r0, .L231
+	.loc 2 2471 0
+	ldr	r3, [r2, #2292]
 	subs	r0, r0, r3
-	ldr	r3, .L245+4
+	ldr	r3, .L233+4
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, [r2, #2248]
+	ldr	r3, [r2, #2304]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L243:
-	.loc 2 2423 0
+.L231:
+	.loc 2 2473 0
 	bx	lr
-.L246:
+.L234:
 	.align	2
-.L245:
+.L233:
 	.word	.LANCHOR0
 	.word	-1431655765
 .LFE244:
@@ -2938,75 +2802,75 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	.fnstart
 .LFB245:
-	.loc 2 2426 0
+	.loc 2 2476 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL202:
-	.loc 2 2431 0
-	ldr	r1, .L255
-	.loc 2 2426 0
+	.loc 2 2481 0
+	ldr	r1, .L243
+	.loc 2 2476 0
 	push	{r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
-.LCFI33:
-	.loc 2 2431 0
-	ldr	r3, [r1, #2272]
-	cbz	r3, .L253
-	.loc 2 2432 0
-	ldrh	r2, [r1, #2276]
-	.loc 2 2436 0
+.LCFI32:
+	.loc 2 2481 0
+	ldr	r3, [r1, #2316]
+	cbz	r3, .L241
+	.loc 2 2482 0
+	ldrh	r2, [r1, #2320]
+	.loc 2 2486 0
 	movs	r6, #6
-	.loc 2 2434 0
-	ldr	r4, [r1, #2252]
-	.loc 2 2436 0
+	.loc 2 2484 0
+	ldr	r4, [r1, #2292]
+	.loc 2 2486 0
 	movw	r7, #65535
-	.loc 2 2432 0
+	.loc 2 2482 0
 	rsb	r2, r2, r2, lsl #3
-	.loc 2 2434 0
+	.loc 2 2484 0
 	subs	r3, r3, r4
 	asrs	r3, r3, #1
-	.loc 2 2432 0
+	.loc 2 2482 0
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2433 0
+	.loc 2 2483 0
 	it	gt
 	uxthgt	r0, r2
-	.loc 2 2434 0
-	ldr	r2, .L255+4
+	.loc 2 2484 0
+	ldr	r2, .L243+4
 	muls	r3, r2, r3
-	.loc 2 2435 0
+	.loc 2 2485 0
 	movs	r2, #0
-	.loc 2 2434 0
+	.loc 2 2484 0
 	uxth	r3, r3
-.L250:
-	.loc 2 2435 0 discriminator 1
+.L238:
+	.loc 2 2485 0 discriminator 1
 	uxth	r5, r2
 	cmp	r0, r5
-	bls	.L252
-	.loc 2 2436 0
+	bls	.L240
+	.loc 2 2486 0
 	mul	r5, r6, r3
 	adds	r2, r2, #1
 	ldrh	r5, [r4, r5]
 	cmp	r5, r7
-	bne	.L254
-.L252:
-	.loc 2 2440 0
-	ldr	r2, [r1, #2248]
+	bne	.L242
+.L240:
+	.loc 2 2490 0
+	ldr	r2, [r1, #2304]
 	ldrh	r0, [r2, r3, lsl #1]
 .LVL203:
 	pop	{r4, r5, r6, r7, pc}
 .LVL204:
-.L254:
+.L242:
 	mov	r3, r5
-	b	.L250
-.L253:
-	.loc 2 2427 0
+	b	.L238
+.L241:
+	.loc 2 2477 0
 	mov	r0, r3
 .LVL205:
-	.loc 2 2443 0
+	.loc 2 2493 0
 	pop	{r4, r5, r6, r7, pc}
-.L256:
+.L244:
 	.align	2
-.L255:
+.L243:
 	.word	.LANCHOR0
 	.word	-1431655765
 .LFE245:
@@ -3028,463 +2892,463 @@ FtlPrintInfo2buf:
 .LVL206:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI34:
+.LCFI33:
 	mov	r7, r0
-	.loc 3 17 0
-	ldr	r6, .L269
+	.loc 3 16 0
+	ldr	r6, .L257
 	.loc 3 11 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI35:
+.LCFI34:
 	.loc 3 15 0
 	add	r5, r7, #12
-	ldr	r1, .L269+4
+	ldr	r1, .L257+4
 	bl	strcpy
 .LVL207:
-	.loc 3 17 0
+	.loc 3 16 0
 	ldr	r2, [r6, #92]
 	mov	r0, r5
-	ldr	r1, .L269+8
+	ldr	r1, .L257+8
 	bl	sprintf
 .LVL208:
 	add	r5, r5, r0
-	.loc 3 18 0
-	ldr	r1, .L269+12
+	.loc 3 17 0
+	ldr	r1, .L257+12
 	mov	r0, r5
 	adds	r5, r5, #10
 	bl	strcpy
 .LVL209:
-	.loc 3 19 0
-	ldr	r2, [r6, #2436]
+	.loc 3 18 0
+	ldr	r2, [r6, #2480]
 	mov	r0, r5
-	ldr	r1, .L269+16
+	ldr	r1, .L257+16
 	bl	sprintf
 .LVL210:
 	add	r5, r5, r0
-	.loc 3 20 0
-	ldr	r2, [r6, #2432]
-	ldr	r1, .L269+20
+	.loc 3 19 0
+	ldr	r2, [r6, #2476]
+	ldr	r1, .L257+20
 	mov	r0, r5
 	bl	sprintf
 .LVL211:
 	add	r5, r5, r0
-	.loc 3 21 0
-	ldr	r2, [r6, #2440]
-	ldr	r1, .L269+24
+	.loc 3 20 0
+	ldr	r2, [r6, #2484]
+	ldr	r1, .L257+24
 	mov	r0, r5
 	bl	sprintf
 .LVL212:
 	add	r5, r5, r0
-	.loc 3 22 0
-	ldr	r2, [r6, #2444]
-	ldr	r1, .L269+28
+	.loc 3 21 0
+	ldr	r2, [r6, #2488]
+	ldr	r1, .L257+28
 	mov	r0, r5
 	bl	sprintf
 .LVL213:
 	add	r5, r5, r0
-	.loc 3 23 0
-	ldr	r2, [r6, #2448]
-	ldr	r1, .L269+32
+	.loc 3 22 0
+	ldr	r2, [r6, #2492]
+	ldr	r1, .L257+32
 	mov	r0, r5
 	bl	sprintf
 .LVL214:
 	add	r5, r5, r0
-	.loc 3 24 0
-	ldr	r2, [r6, #2452]
-	ldr	r1, .L269+36
+	.loc 3 23 0
+	ldr	r2, [r6, #2496]
+	ldr	r1, .L257+36
 	mov	r0, r5
 	bl	sprintf
 .LVL215:
 	add	r5, r5, r0
-	.loc 3 25 0
-	ldr	r2, [r6, #2456]
-	ldr	r1, .L269+40
+	.loc 3 24 0
+	ldr	r2, [r6, #2500]
+	ldr	r1, .L257+40
 	mov	r0, r5
 	bl	sprintf
 .LVL216:
 	add	r5, r5, r0
-	.loc 3 26 0
-	ldr	r2, [r6, #2460]
-	ldr	r1, .L269+44
+	.loc 3 25 0
+	ldr	r2, [r6, #2504]
+	ldr	r1, .L257+44
 	mov	r0, r5
 	bl	sprintf
 .LVL217:
-	.loc 3 27 0
-	ldr	r2, [r6, #2464]
 	.loc 3 26 0
+	ldr	r2, [r6, #2508]
+	.loc 3 25 0
 	add	r5, r5, r0
-	.loc 3 27 0
-	ldr	r1, .L269+48
+	.loc 3 26 0
+	ldr	r1, .L257+48
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
 .LVL218:
-	.loc 3 28 0
-	ldr	r2, [r6, #2468]
 	.loc 3 27 0
+	ldr	r2, [r6, #2512]
+	.loc 3 26 0
 	add	r5, r5, r0
-	.loc 3 28 0
-	ldr	r1, .L269+52
+	.loc 3 27 0
+	ldr	r1, .L257+52
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
 .LVL219:
 	add	r5, r5, r0
-	.loc 3 29 0
-	ldr	r2, [r6, #2472]
-	ldr	r1, .L269+56
+	.loc 3 28 0
+	ldr	r2, [r6, #2516]
+	ldr	r1, .L257+56
 	mov	r0, r5
 	bl	sprintf
 .LVL220:
 	add	r5, r5, r0
-	.loc 3 30 0
-	ldr	r2, [r6, #2476]
-	ldr	r1, .L269+60
+	.loc 3 29 0
+	ldr	r2, [r6, #2520]
+	ldr	r1, .L257+60
 	mov	r0, r5
 	bl	sprintf
 .LVL221:
 	add	r5, r5, r0
-	.loc 3 31 0
+	.loc 3 30 0
 	ldrh	r2, [r6, #134]
-	ldr	r1, .L269+64
+	ldr	r1, .L257+64
 	mov	r0, r5
 	bl	sprintf
 .LVL222:
 	add	r5, r5, r0
-	.loc 3 32 0
-	ldrh	r2, [r6, #2276]
-	ldr	r1, .L269+68
+	.loc 3 31 0
+	ldrh	r2, [r6, #2320]
+	ldr	r1, .L257+68
 	mov	r0, r5
 	bl	sprintf
 .LVL223:
 	add	r5, r5, r0
-	.loc 3 33 0
-	ldr	r2, [r6, #2480]
-	ldr	r1, .L269+72
+	.loc 3 32 0
+	ldr	r2, [r6, #2524]
+	ldr	r1, .L257+72
 	mov	r0, r5
 	bl	sprintf
 .LVL224:
 	add	r5, r5, r0
-	.loc 3 34 0
-	ldr	r2, [r6, #2484]
-	ldr	r1, .L269+76
+	.loc 3 33 0
+	ldr	r2, [r6, #2528]
+	ldr	r1, .L257+76
 	mov	r0, r5
 	bl	sprintf
 .LVL225:
 	add	r5, r5, r0
-	.loc 3 35 0
-	ldr	r2, [r6, #2488]
-	ldr	r1, .L269+80
+	.loc 3 34 0
+	ldr	r2, [r6, #2532]
+	ldr	r1, .L257+80
 	mov	r0, r5
 	bl	sprintf
 .LVL226:
 	add	r5, r5, r0
-	.loc 3 36 0
-	ldr	r2, [r6, #2492]
-	ldr	r1, .L269+84
+	.loc 3 35 0
+	ldr	r2, [r6, #2536]
+	ldr	r1, .L257+84
 	mov	r0, r5
 	bl	sprintf
 .LVL227:
 	add	r5, r5, r0
-	.loc 3 37 0
-	ldr	r2, [r6, #2496]
-	ldr	r1, .L269+88
+	.loc 3 36 0
+	ldr	r2, [r6, #2540]
+	ldr	r1, .L257+88
 	mov	r0, r5
 	bl	sprintf
 .LVL228:
 	add	r5, r5, r0
-	.loc 3 38 0
-	ldr	r2, [r6, #2500]
-	ldr	r1, .L269+92
+	.loc 3 37 0
+	ldr	r2, [r6, #2544]
+	ldr	r1, .L257+92
 	mov	r0, r5
 	bl	sprintf
 .LVL229:
 	add	r5, r5, r0
-	.loc 3 39 0
-	ldrh	r2, [r6, #2534]
-	ldr	r1, .L269+96
+	.loc 3 38 0
+	ldrh	r2, [r6, #2274]
+	ldr	r1, .L257+96
 	mov	r0, r5
 	bl	sprintf
 .LVL230:
 	add	r5, r5, r0
-	.loc 3 40 0
-	ldrh	r2, [r6, #2532]
-	ldr	r1, .L269+100
+	.loc 3 39 0
+	ldrh	r2, [r6, #2272]
+	ldr	r1, .L257+100
 	mov	r0, r5
 	bl	sprintf
 .LVL231:
 	add	r5, r5, r0
-	.loc 3 41 0
+	.loc 3 40 0
 	ldr	r2, [r6, #116]
-	ldr	r1, .L269+104
+	ldr	r1, .L257+104
 	mov	r0, r5
 	bl	sprintf
 .LVL232:
 	add	r5, r5, r0
-	.loc 3 42 0
+	.loc 3 41 0
 	ldr	r2, [r6, #108]
-	ldr	r1, .L269+108
+	ldr	r1, .L257+108
 	mov	r0, r5
 	bl	sprintf
 .LVL233:
 	add	r5, r5, r0
-	.loc 3 43 0
+	.loc 3 42 0
 	ldr	r2, [r6, #4]
-	ldr	r1, .L269+112
+	ldr	r1, .L257+112
 	mov	r0, r5
 	bl	sprintf
 .LVL234:
 	add	r5, r5, r0
-	.loc 3 44 0
+	.loc 3 43 0
 	ldrh	r2, [r6, #194]
-	ldr	r1, .L269+116
+	ldr	r1, .L257+116
 	mov	r0, r5
 	bl	sprintf
 .LVL235:
 	add	r5, r5, r0
-	.loc 3 45 0
+	.loc 3 44 0
 	ldrh	r2, [r6, #16]
-	ldr	r1, .L269+120
+	ldr	r1, .L257+120
 	mov	r0, r5
 	bl	sprintf
 .LVL236:
 	add	r5, r5, r0
-	.loc 3 46 0
-	ldrh	r2, [r6, #2552]
-	ldr	r1, .L269+124
+	.loc 3 45 0
+	ldrh	r2, [r6, #2548]
+	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
 .LVL237:
 	add	r5, r5, r0
-	.loc 3 47 0
+	.loc 3 46 0
 	ldr	r2, [r6, #20]
-	ldr	r1, .L269+128
+	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
 .LVL238:
 	add	r5, r5, r0
-	.loc 3 48 0
-	ldrh	r2, [r6, #2556]
-	ldr	r1, .L269+132
+	.loc 3 47 0
+	ldrh	r2, [r6, #2552]
+	ldr	r1, .L257+132
 	mov	r0, r5
 	bl	sprintf
 .LVL239:
 	add	r5, r5, r0
-	.loc 3 49 0
+	.loc 3 48 0
 	ldrh	r2, [r6, #128]
-	ldr	r1, .L269+136
+	ldr	r1, .L257+136
 	mov	r0, r5
 	bl	sprintf
 .LVL240:
 	add	r5, r5, r0
-	.loc 3 50 0
-	ldrh	r2, [r6, #2282]
-	ldr	r1, .L269+140
+	.loc 3 49 0
+	ldrh	r2, [r6, #2326]
+	ldr	r1, .L257+140
 	mov	r0, r5
 	bl	sprintf
 .LVL241:
 	add	r5, r5, r0
-	.loc 3 51 0
-	ldrb	r2, [r6, #2286]	@ zero_extendqisi2
-	ldr	r1, .L269+144
+	.loc 3 50 0
+	ldrb	r2, [r6, #2330]	@ zero_extendqisi2
+	ldr	r1, .L257+144
 	mov	r0, r5
 	bl	sprintf
 .LVL242:
 	add	r5, r5, r0
-	.loc 3 52 0
-	ldrh	r2, [r6, #2280]
-	ldr	r1, .L269+148
+	.loc 3 51 0
+	ldrh	r2, [r6, #2324]
+	ldr	r1, .L257+148
 	mov	r0, r5
 	bl	sprintf
 .LVL243:
 	add	r5, r5, r0
-	.loc 3 53 0
-	ldrb	r2, [r6, #2288]	@ zero_extendqisi2
-	ldr	r1, .L269+152
+	.loc 3 52 0
+	ldrb	r2, [r6, #2332]	@ zero_extendqisi2
+	ldr	r1, .L257+152
 	mov	r0, r5
 	bl	sprintf
 .LVL244:
 	add	r5, r5, r0
-	.loc 3 54 0
-	ldrh	r2, [r6, #2284]
-	ldr	r1, .L269+156
+	.loc 3 53 0
+	ldrh	r2, [r6, #2328]
+	ldr	r1, .L257+156
 	mov	r0, r5
 	bl	sprintf
 .LVL245:
-	.loc 3 55 0
-	ldr	r3, [r6, #2260]
 	.loc 3 54 0
+	ldr	r3, [r6, #2300]
+	.loc 3 53 0
 	add	r5, r5, r0
-	.loc 3 55 0
-	ldrh	r2, [r6, #2280]
+	.loc 3 54 0
+	ldrh	r2, [r6, #2324]
 	mov	r0, r5
-	ldr	r1, .L269+160
+	ldr	r1, .L257+160
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
 .LVL246:
 	add	r5, r5, r0
-	.loc 3 56 0
-	ldrh	r2, [r6, #2330]
-	ldr	r1, .L269+164
+	.loc 3 55 0
+	ldrh	r2, [r6, #2374]
+	ldr	r1, .L257+164
 	mov	r0, r5
 	bl	sprintf
 .LVL247:
 	add	r5, r5, r0
-	.loc 3 57 0
-	ldrb	r2, [r6, #2334]	@ zero_extendqisi2
-	ldr	r1, .L269+168
+	.loc 3 56 0
+	ldrb	r2, [r6, #2378]	@ zero_extendqisi2
+	ldr	r1, .L257+168
 	mov	r0, r5
 	bl	sprintf
 .LVL248:
 	add	r5, r5, r0
-	.loc 3 58 0
-	ldrh	r2, [r6, #2328]
-	ldr	r1, .L269+172
+	.loc 3 57 0
+	ldrh	r2, [r6, #2372]
+	ldr	r1, .L257+172
 	mov	r0, r5
 	bl	sprintf
 .LVL249:
 	add	r5, r5, r0
-	.loc 3 59 0
-	ldrb	r2, [r6, #2336]	@ zero_extendqisi2
-	ldr	r1, .L269+176
+	.loc 3 58 0
+	ldrb	r2, [r6, #2380]	@ zero_extendqisi2
+	ldr	r1, .L257+176
 	mov	r0, r5
 	bl	sprintf
 .LVL250:
 	add	r5, r5, r0
-	.loc 3 60 0
-	ldrh	r2, [r6, #2332]
-	ldr	r1, .L269+180
+	.loc 3 59 0
+	ldrh	r2, [r6, #2376]
+	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
 .LVL251:
-	.loc 3 61 0
-	ldr	r3, [r6, #2260]
 	.loc 3 60 0
+	ldr	r3, [r6, #2300]
+	.loc 3 59 0
 	add	r5, r5, r0
-	.loc 3 61 0
-	ldrh	r2, [r6, #2328]
+	.loc 3 60 0
+	ldrh	r2, [r6, #2372]
 	mov	r0, r5
-	ldr	r1, .L269+184
+	ldr	r1, .L257+184
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
 .LVL252:
 	add	r5, r5, r0
-	.loc 3 62 0
-	ldrh	r2, [r6, #2378]
-	ldr	r1, .L269+188
+	.loc 3 61 0
+	ldrh	r2, [r6, #2422]
+	ldr	r1, .L257+188
 	mov	r0, r5
 	bl	sprintf
 .LVL253:
 	add	r5, r5, r0
-	.loc 3 63 0
-	ldrb	r2, [r6, #2382]	@ zero_extendqisi2
-	ldr	r1, .L269+192
+	.loc 3 62 0
+	ldrb	r2, [r6, #2426]	@ zero_extendqisi2
+	ldr	r1, .L257+192
 	mov	r0, r5
 	bl	sprintf
 .LVL254:
 	add	r5, r5, r0
-	.loc 3 64 0
-	ldrh	r2, [r6, #2376]
-	ldr	r1, .L269+196
+	.loc 3 63 0
+	ldrh	r2, [r6, #2420]
+	ldr	r1, .L257+196
 	mov	r0, r5
 	bl	sprintf
 .LVL255:
 	add	r5, r5, r0
-	.loc 3 65 0
-	ldrb	r2, [r6, #2384]	@ zero_extendqisi2
-	ldr	r1, .L269+200
+	.loc 3 64 0
+	ldrb	r2, [r6, #2428]	@ zero_extendqisi2
+	ldr	r1, .L257+200
 	mov	r0, r5
 	bl	sprintf
 .LVL256:
 	add	r5, r5, r0
-	.loc 3 66 0
-	ldrh	r2, [r6, #2380]
-	ldr	r1, .L269+204
+	.loc 3 65 0
+	ldrh	r2, [r6, #2424]
+	ldr	r1, .L257+204
 	mov	r0, r5
 	bl	sprintf
 .LVL257:
 	add	r5, r5, r0
-	.loc 3 67 0
-	ldrh	r2, [r6, #2570]
-	ldr	r1, .L269+208
+	.loc 3 66 0
+	ldrh	r2, [r6, #2566]
+	ldr	r1, .L257+208
 	mov	r0, r5
 	bl	sprintf
 .LVL258:
 	add	r5, r5, r0
-	.loc 3 68 0
-	ldrb	r2, [r6, #2574]	@ zero_extendqisi2
-	ldr	r1, .L269+212
+	.loc 3 67 0
+	ldrb	r2, [r6, #2570]	@ zero_extendqisi2
+	ldr	r1, .L257+212
 	mov	r0, r5
 	bl	sprintf
 .LVL259:
 	add	r5, r5, r0
-	.loc 3 69 0
-	ldrh	r2, [r6, #2568]
-	ldr	r1, .L269+216
+	.loc 3 68 0
+	ldrh	r2, [r6, #2564]
+	ldr	r1, .L257+216
 	mov	r0, r5
 	bl	sprintf
 .LVL260:
 	add	r5, r5, r0
-	.loc 3 70 0
-	ldrb	r2, [r6, #2576]	@ zero_extendqisi2
-	ldr	r1, .L269+220
+	.loc 3 69 0
+	ldrb	r2, [r6, #2572]	@ zero_extendqisi2
+	ldr	r1, .L257+220
 	mov	r0, r5
 	bl	sprintf
 .LVL261:
 	add	r5, r5, r0
-	.loc 3 71 0
-	ldrh	r2, [r6, #2572]
-	ldr	r1, .L269+224
+	.loc 3 70 0
+	ldrh	r2, [r6, #2568]
+	ldr	r1, .L257+224
 	mov	r0, r5
 	bl	sprintf
 .LVL262:
-	.loc 3 72 0
-	ldr	r3, [r6, #2692]
 	.loc 3 71 0
+	ldr	r3, [r6, #2688]
+	.loc 3 70 0
 	add	r5, r5, r0
-	.loc 3 72 0
-	ldr	r2, [r6, #2696]
+	.loc 3 71 0
+	ldr	r2, [r6, #2692]
 	mov	r0, r5
-	ldr	r1, .L269+228
+	ldr	r1, .L257+228
 	str	r3, [sp]
-	ldr	r3, [r6, #2700]
+	ldr	r3, [r6, #2696]
 	bl	sprintf
 .LVL263:
 	adds	r4, r5, r0
-	.loc 3 73 0
-	ldr	r2, [r6, #2688]
-	ldr	r1, .L269+232
+	.loc 3 72 0
+	ldr	r2, [r6, #2684]
+	ldr	r1, .L257+232
 	mov	r0, r4
 	bl	sprintf
 .LVL264:
 	add	r4, r4, r0
-	.loc 3 74 0
-	ldr	r2, [r6, #2712]
-	ldr	r1, .L269+236
+	.loc 3 73 0
+	ldr	r2, [r6, #2708]
+	ldr	r1, .L257+236
 	mov	r0, r4
 	bl	sprintf
 .LVL265:
 	add	r4, r4, r0
-	.loc 3 75 0
-	ldrh	r2, [r6, #3128]
-	ldr	r1, .L269+240
+	.loc 3 74 0
+	ldrh	r2, [r6, #3124]
+	ldr	r1, .L257+240
 	mov	r0, r4
 	bl	sprintf
 .LVL266:
 	add	r4, r4, r0
-	.loc 3 76 0
-	ldrh	r2, [r6, #3130]
-	ldr	r1, .L269+244
+	.loc 3 75 0
+	ldrh	r2, [r6, #3126]
+	ldr	r1, .L257+244
 	mov	r0, r4
 	bl	sprintf
 .LVL267:
 	add	r4, r4, r0
-	.loc 3 77 0
-	ldr	r2, [r6, #3132]
-	b	.L270
-.L271:
+	.loc 3 76 0
+	ldr	r2, [r6, #3128]
+	b	.L258
+.L259:
 	.align	2
-.L269:
+.L257:
 	.word	.LANCHOR0
 	.word	.LC2
 	.word	.LC3
@@ -3547,178 +3411,178 @@ FtlPrintInfo2buf:
 	.word	.LC60
 	.word	.LC61
 	.word	.LC62
-.L270:
-	ldr	r1, .L272
+.L258:
+	ldr	r1, .L260
 	mov	r0, r4
 	bl	sprintf
 .LVL268:
 	add	r4, r4, r0
-	.loc 3 78 0
-	ldrh	r2, [r6, #3136]
-	ldr	r1, .L272+4
+	.loc 3 77 0
+	ldrh	r2, [r6, #3132]
+	ldr	r1, .L260+4
 	mov	r0, r4
 	bl	sprintf
 .LVL269:
 	add	r4, r4, r0
-	.loc 3 79 0
+	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
 .LVL270:
-	ldr	r1, .L272+8
+	ldr	r1, .L260+8
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
 .LVL271:
 	add	r4, r4, r0
-	.loc 3 80 0
-	ldrh	r0, [r6, #2276]
+	.loc 3 79 0
+	ldrh	r0, [r6, #2320]
 	bl	GetFreeBlockMaxEraseCount
 .LVL272:
-	ldr	r1, .L272+12
+	ldr	r1, .L260+12
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
 .LVL273:
-	.loc 3 81 0
-	ldr	r3, .L272+16
 	.loc 3 80 0
+	ldr	r3, .L260+16
+	.loc 3 79 0
 	add	r4, r4, r0
-	.loc 3 81 0
+	.loc 3 80 0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L258
+	beq	.L246
 .LVL274:
-.L263:
-	.loc 3 104 0
+.L251:
+	.loc 3 103 0
 	subs	r0, r4, r7
-	.loc 3 105 0
+	.loc 3 104 0
 	add	sp, sp, #20
-.LCFI36:
+.LCFI35:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .LVL275:
-.L258:
-.LCFI37:
-	.loc 3 84 0
-	ldrh	r3, [r6, #2568]
+.L246:
+.LCFI36:
+	.loc 3 83 0
+	ldrh	r3, [r6, #2564]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L260
-	.loc 3 85 0
-	ldr	r2, [r6, #2260]
+	beq	.L248
+	.loc 3 84 0
+	ldr	r2, [r6, #2300]
 	mov	r0, r4
-	ldr	r1, .L272+20
+	ldr	r1, .L260+20
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
 .LVL276:
 	add	r4, r4, r0
-.L260:
-.LBB284:
-	.loc 3 87 0
+.L248:
+.LBB289:
+	.loc 3 86 0
 	movs	r0, #0
-	.loc 3 91 0
-	ldr	r9, .L272+28
-	.loc 3 87 0
+	.loc 3 90 0
+	ldr	r9, .L260+28
+	.loc 3 86 0
 	bl	List_get_gc_head_node
 .LVL277:
 	uxth	r3, r0
 .LVL278:
-	.loc 3 88 0
+	.loc 3 87 0
 	movs	r5, #0
-	.loc 3 89 0
+	.loc 3 88 0
 	movw	fp, #65535
-	.loc 3 91 0
+	.loc 3 90 0
 	mov	r10, #6
-.L262:
-	.loc 3 89 0
+.L250:
+	.loc 3 88 0
 	cmp	r3, fp
-	beq	.L261
-	.loc 3 91 0 discriminator 2
-	ldr	r2, [r6, #2248]
+	beq	.L249
+	.loc 3 90 0 discriminator 2
+	ldr	r2, [r6, #2304]
 	mul	r8, r10, r3
 	mov	r0, r4
 	mov	r1, r9
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #8]
-	ldr	r2, [r6, #2252]
+	ldr	r2, [r6, #2292]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2260]
+	ldr	r2, [r6, #2300]
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp]
 	mov	r2, r5
 	bl	sprintf
 .LVL279:
-	.loc 3 88 0 discriminator 2
+	.loc 3 87 0 discriminator 2
 	adds	r5, r5, #1
-	.loc 3 92 0 discriminator 2
-	ldr	r3, [r6, #2252]
-	.loc 3 88 0 discriminator 2
-	cmp	r5, #16
 	.loc 3 91 0 discriminator 2
+	ldr	r3, [r6, #2292]
+	.loc 3 87 0 discriminator 2
+	cmp	r5, #16
+	.loc 3 90 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 92 0 discriminator 2
+	.loc 3 91 0 discriminator 2
 	ldrh	r3, [r3, r8]
 .LVL280:
-	.loc 3 88 0 discriminator 2
-	bne	.L262
-.L261:
-.LBE284:
-.LBB285:
+	.loc 3 87 0 discriminator 2
+	bne	.L250
+.L249:
+.LBE289:
+.LBB290:
+	.loc 3 95 0
+	ldr	r2, [r6, #2292]
 	.loc 3 96 0
-	ldr	r2, [r6, #2252]
-	.loc 3 97 0
 	movs	r5, #0
-	.loc 3 96 0
-	ldr	r3, [r6, #2272]
+	.loc 3 95 0
+	ldr	r3, [r6, #2316]
 .LVL281:
-	.loc 3 98 0
+	.loc 3 97 0
 	movw	r9, #65535
-	.loc 3 100 0
-	ldr	fp, .L272+32
+	.loc 3 99 0
+	ldr	fp, .L260+32
 	mov	r10, #6
-	.loc 3 96 0
+	.loc 3 95 0
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L272+24
+	ldr	r3, .L260+24
 	muls	r3, r2, r3
 	uxth	r3, r3
 .LVL282:
-.L264:
-	.loc 3 98 0
+.L252:
+	.loc 3 97 0
 	cmp	r3, r9
-	beq	.L263
-	.loc 3 100 0 discriminator 2
-	ldr	r2, [r6, #2248]
+	beq	.L251
+	.loc 3 99 0 discriminator 2
+	ldr	r2, [r6, #2304]
 	mul	r8, r10, r3
 	mov	r0, r4
 	mov	r1, fp
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2252]
+	ldr	r2, [r6, #2292]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp]
 	mov	r2, r5
-	.loc 3 97 0 discriminator 2
+	.loc 3 96 0 discriminator 2
 	adds	r5, r5, #1
-	.loc 3 100 0 discriminator 2
+	.loc 3 99 0 discriminator 2
 	bl	sprintf
 .LVL283:
-	.loc 3 97 0 discriminator 2
+	.loc 3 96 0 discriminator 2
 	cmp	r5, #4
-	.loc 3 100 0 discriminator 2
+	.loc 3 99 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 97 0 discriminator 2
-	beq	.L263
-	.loc 3 101 0
-	ldr	r3, [r6, #2252]
+	.loc 3 96 0 discriminator 2
+	beq	.L251
+	.loc 3 100 0
+	ldr	r3, [r6, #2292]
 	ldrh	r3, [r3, r8]
 .LVL284:
-	b	.L264
-.L273:
+	b	.L252
+.L261:
 	.align	2
-.L272:
+.L260:
 	.word	.LC63
 	.word	.LC64
 	.word	.LC65
@@ -3728,7 +3592,7 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LC68
 	.word	.LC69
-.LBE285:
+.LBE290:
 .LFE150:
 	.fnend
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -3742,33 +3606,33 @@ FtlPrintInfo2buf:
 rknand_proc_ftlread:
 	.fnstart
 .LFB151:
-	.loc 3 114 0
+	.loc 3 113 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL285:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI38:
-	.loc 3 114 0
+.LCFI37:
+	.loc 3 113 0
 	mov	r5, r0
-	.loc 3 120 0
-	ldr	r2, .L275
-	ldr	r1, .L275+4
+	.loc 3 119 0
+	ldr	r2, .L263
+	ldr	r1, .L263+4
 	bl	sprintf
 .LVL286:
 	adds	r4, r5, r0
-	.loc 3 122 0
+	.loc 3 121 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
 .LVL287:
 	add	r0, r0, r4
-	.loc 3 124 0
+	.loc 3 123 0
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
 .LVL288:
-.L276:
+.L264:
 	.align	2
-.L275:
+.L263:
 	.word	.LC70
 	.word	.LC71
 .LFE151:
@@ -3784,235 +3648,252 @@ rknand_proc_ftlread:
 GetSwlReplaceBlock:
 	.fnstart
 .LFB246:
-	.loc 2 2447 0
-	@ args = 0, pretend = 0, frame = 0
+	.loc 2 2497 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+.LCFI38:
+	.pad #28
+	sub	sp, sp, #28
 .LCFI39:
-	.pad #20
-	sub	sp, sp, #20
-.LCFI40:
-	.loc 2 2456 0
-	ldr	r4, .L302
-	ldr	r2, [r4, #2488]
-	ldr	r3, [r4, #2500]
+	.loc 2 2507 0
+	ldr	r4, .L289
+	ldr	r2, [r4, #2532]
+	ldr	r3, [r4, #2544]
 	cmp	r2, r3
-	bcs	.L278
-	.loc 2 2459 0
+	bcs	.L266
+	.loc 2 2510 0
 	ldrh	r1, [r4, #16]
-	.loc 2 2458 0
+	.loc 2 2509 0
 	movs	r3, #0
-	.loc 2 2460 0
-	ldr	r0, [r4, #2248]
-	.loc 2 2458 0
-	str	r3, [r4, #2480]
-.L279:
-	.loc 2 2459 0 discriminator 1
+	.loc 2 2511 0
+	ldr	r0, [r4, #2304]
+	.loc 2 2509 0
+	str	r3, [r4, #2524]
+.L267:
+	.loc 2 2510 0 discriminator 1
 	cmp	r3, r1
-	bcc	.L280
-	.loc 2 2461 0
-	ldr	r5, [r4, #2480]
+	bcc	.L268
+	.loc 2 2512 0
+	ldr	r5, [r4, #2524]
 	mov	r0, r5
 	bl	__aeabi_uidiv
 .LVL289:
-	str	r0, [r4, #2488]
-	.loc 2 2462 0
-	ldr	r0, [r4, #2484]
+	str	r0, [r4, #2532]
+	.loc 2 2513 0
+	ldr	r0, [r4, #2528]
 	ldrh	r1, [r4, #68]
 	subs	r0, r5, r0
 	bl	__aeabi_uidiv
 .LVL290:
-	str	r0, [r4, #2480]
-.L281:
-	.loc 2 2468 0
-	ldr	r6, [r4, #2500]
-	ldr	r7, [r4, #2488]
+	str	r0, [r4, #2524]
+.L269:
+	.loc 2 2519 0
+	ldr	r6, [r4, #2544]
+	ldr	r7, [r4, #2532]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L286
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	ldr	r2, [r4, #2496]
+	bls	.L274
+	.loc 2 2519 0 is_stmt 0 discriminator 1
+	ldr	r2, [r4, #2540]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L286
+	bls	.L274
 .LVL291:
-.L289:
-	.loc 2 2469 0 is_stmt 1
+.L276:
+	.loc 2 2520 0 is_stmt 1
 	movw	r5, #65535
-.L287:
-	.loc 2 2518 0
+.L275:
+	.loc 2 2566 0
 	mov	r0, r5
-	add	sp, sp, #20
-.LCFI41:
+.LVL292:
+	add	sp, sp, #28
+.LCFI40:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL292:
-.L280:
-.LCFI42:
-	.loc 2 2460 0 discriminator 3
+.LVL293:
+.L268:
+.LCFI41:
+	.loc 2 2511 0 discriminator 3
 	ldrh	r2, [r0, r3, lsl #1]
-	.loc 2 2459 0 discriminator 3
+	.loc 2 2510 0 discriminator 3
 	adds	r3, r3, #1
-	.loc 2 2460 0 discriminator 3
-	ldr	r5, [r4, #2480]
+	.loc 2 2511 0 discriminator 3
+	ldr	r5, [r4, #2524]
 	add	r2, r2, r5
-	str	r2, [r4, #2480]
-	b	.L279
-.L278:
-	.loc 2 2463 0
-	ldr	r3, [r4, #2496]
+	str	r2, [r4, #2524]
+	b	.L267
+.L266:
+	.loc 2 2514 0
+	ldr	r3, [r4, #2540]
 	cmp	r2, r3
-	bls	.L281
-	.loc 2 2464 0
+	bls	.L269
+	.loc 2 2515 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2496]
-	.loc 2 2465 0
+	str	r3, [r4, #2540]
+	.loc 2 2516 0
 	movs	r3, #0
-.L283:
-	.loc 2 2465 0 is_stmt 0 discriminator 1
+.L271:
+	.loc 2 2516 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	bcs	.L281
-	.loc 2 2466 0 is_stmt 1 discriminator 3
-	ldr	r1, [r4, #2248]
+	bcs	.L269
+	.loc 2 2517 0 is_stmt 1 discriminator 3
+	ldr	r1, [r4, #2304]
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2516 0 discriminator 3
 	adds	r3, r3, #1
-	b	.L283
-.L286:
-	.loc 2 2471 0
-	ldrh	r0, [r4, #2276]
+	b	.L271
+.L274:
+	.loc 2 2522 0
+	ldrh	r0, [r4, #2320]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL293:
-	.loc 2 2472 0
+.LVL294:
+	.loc 2 2523 0
 	add	r3, r6, #64
-	.loc 2 2471 0
+	.loc 2 2522 0
 	mov	r9, r0
-.LVL294:
-	.loc 2 2472 0
-	cmp	r0, r3
-	bcs	.L288
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	r6, #30
-	bhi	.L289
-.L288:
-	.loc 2 2476 0 is_stmt 1
-	ldr	r3, [r4, #2256]
 .LVL295:
+	.loc 2 2523 0
+	cmp	r0, r3
+	bcc	.L276
+	.loc 2 2526 0
+	ldr	r3, [r4, #2296]
+.LVL296:
 	cmp	r3, #0
-	beq	.L289
-	.loc 2 2483 0
-	ldr	ip, [r4, #2252]
-	.loc 2 2484 0
+	beq	.L276
+	.loc 2 2530 0
+	ldrh	r2, [r4, #16]
+	.loc 2 2534 0
 	movw	r1, #65535
-.LVL296:
-	ldr	r8, [r4, #2248]
-	mov	r2, r1
-	.loc 2 2483 0
-	ldr	r10, .L302+8
-	.loc 2 2479 0
-	mov	lr, r1
-	.loc 2 2495 0
+.LVL297:
+	.loc 2 2533 0
+	ldr	lr, [r4, #2292]
+	.loc 2 2534 0
+	movs	r0, #0
+.LVL298:
+	ldr	r8, [r4, #2304]
+	.loc 2 2528 0
+	mov	r10, r1
+	.loc 2 2530 0
+	str	r2, [sp, #20]
+	.loc 2 2543 0
 	mov	fp, #6
-.L290:
-	.loc 2 2479 0
-	ldrh	r0, [r3]
-	cmp	r0, lr
-	bne	.L293
+	.loc 2 2534 0
+	mov	r2, r1
+.L277:
+	.loc 2 2528 0
+	ldrh	ip, [r3]
+	cmp	ip, r10
+	bne	.L280
 	mov	r5, r2
-.L292:
-	.loc 2 2498 0
+.L279:
+	.loc 2 2546 0
 	movw	r3, #65535
-.LVL297:
+.LVL299:
 	cmp	r5, r3
-	beq	.L289
-	.loc 2 2500 0
+	beq	.L276
+	.loc 2 2548 0
 	ldrh	r10, [r8, r5, lsl #1]
-.LVL298:
+.LVL300:
 	lsl	fp, r5, #1
-	.loc 2 2501 0
+	.loc 2 2549 0
 	cmp	r6, r10
-	bcs	.L294
-	.loc 2 2503 0
+	bcs	.L281
+	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL299:
+.LVL301:
 	cmp	r6, r0
-	.loc 2 2504 0
+	.loc 2 2552 0
 	it	cc
-	strcc	r1, [r4, #2500]
-.L294:
-	.loc 2 2506 0
+	strcc	r1, [r4, #2544]
+.LVL302:
+.L281:
+	.loc 2 2554 0
 	cmp	r7, r10
-	bls	.L289
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	bls	.L276
+	.loc 2 2554 0 is_stmt 0 discriminator 1
 	add	r3, r10, #128
 	cmp	r9, r3
-	ble	.L289
-	.loc 2 2508 0 is_stmt 1
+	ble	.L276
+	.loc 2 2556 0 is_stmt 1
 	add	r3, r10, #256
 	cmp	r7, r3
-	bhi	.L295
-	.loc 2 2508 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2496]
+	bhi	.L282
+	.loc 2 2556 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #2540]
 	add	r10, r10, #768
-.LVL300:
+.LVL303:
 	cmp	r10, r3
-	bcs	.L289
-.LVL301:
-.L295:
-	.loc 2 2510 0 is_stmt 1
+	bcs	.L276
+.LVL304:
+.L282:
+	.loc 2 2558 0 is_stmt 1
 	str	r9, [sp, #8]
 	mov	r2, r7
 	ldrh	r3, [r8, fp]
 	mov	r1, r5
-.LVL302:
-	ldr	r0, .L302+4
+.LVL305:
+	ldr	r0, .L289+4
+.LVL306:
 	str	r3, [sp, #4]
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, fp]
 	str	r3, [sp]
-	ldr	r3, [r4, #2496]
+	ldr	r3, [r4, #2540]
 	bl	printk
-.LVL303:
-	.loc 2 2511 0
+.LVL307:
+	.loc 2 2559 0
 	movs	r3, #1
-	str	r3, [r4, #3140]
-	.loc 2 2512 0
-	b	.L287
-.LVL304:
-.L293:
-	.loc 2 2481 0
+	str	r3, [r4, #3136]
+	.loc 2 2560 0
+	b	.L275
+.LVL308:
+.L280:
+	.loc 2 2529 0
+	adds	r0, r0, #1
+.LVL309:
+	.loc 2 2530 0
+	ldr	r5, [sp, #20]
+	.loc 2 2529 0
+	uxth	r0, r0
+.LVL310:
+	.loc 2 2530 0
+	cmp	r0, r5
+	bhi	.L276
+	.loc 2 2532 0
 	ldrh	r5, [r3, #4]
-	cbz	r5, .L291
-	.loc 2 2483 0
-	sub	r3, r3, ip
-.LVL305:
+	cbz	r5, .L278
+	.loc 2 2533 0
+	ldr	r5, .L289+8
+	sub	r3, r3, lr
+.LVL311:
 	asrs	r3, r3, #1
-	mul	r3, r10, r3
+	muls	r3, r5, r3
 	uxth	r5, r3
-	.loc 2 2484 0
+	.loc 2 2534 0
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r6, r3
-	bcs	.L292
-	.loc 2 2489 0
+	bcs	.L279
+	.loc 2 2538 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-	.loc 2 2483 0
+	.loc 2 2533 0
 	movhi	r2, r5
-.LVL306:
-.L291:
-	.loc 2 2495 0
-	mla	r3, fp, r0, ip
-	b	.L290
-.L303:
+.LVL312:
+.L278:
+	.loc 2 2543 0
+	mla	r3, fp, ip, lr
+	b	.L277
+.L290:
 	.align	2
-.L302:
+.L289:
 	.word	.LANCHOR0
 	.word	.LC72
 	.word	-1431655765
@@ -4029,39 +3910,39 @@ GetSwlReplaceBlock:
 free_data_superblock:
 	.fnstart
 .LFB247:
-	.loc 2 2522 0
+	.loc 2 2570 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL307:
-	.loc 2 2523 0
+.LVL313:
+	.loc 2 2571 0
 	movw	r2, #65535
-	.loc 2 2522 0
+	.loc 2 2570 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI43:
-	.loc 2 2523 0
+.LCFI42:
+	.loc 2 2571 0
 	cmp	r0, r2
-	beq	.L305
-.LBB288:
-.LBB289:
-	.loc 2 2525 0
-	ldr	r2, .L306
+	beq	.L292
+.LBB293:
+.LBB294:
+	.loc 2 2573 0
+	ldr	r2, .L293
 	movs	r1, #0
-	ldr	r2, [r2, #2260]
+	ldr	r2, [r2, #2300]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2526 0
+	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL308:
-.L305:
-.LBE289:
-.LBE288:
-	.loc 2 2528 0
+.LVL314:
+.L292:
+.LBE294:
+.LBE293:
+	.loc 2 2576 0
 	movs	r0, #0
-.LVL309:
+.LVL315:
 	pop	{r3, pc}
-.L307:
+.L294:
 	.align	2
-.L306:
+.L293:
 	.word	.LANCHOR0
 .LFE247:
 	.fnend
@@ -4076,148 +3957,148 @@ free_data_superblock:
 get_new_active_ppa:
 	.fnstart
 .LFB250:
-	.loc 2 2655 0
+	.loc 2 2703 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL310:
+.LVL316:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI44:
-	.loc 2 2659 0
+.LCFI43:
+	.loc 2 2707 0
 	movw	r3, #65535
 	ldrh	r2, [r0]
-	.loc 2 2655 0
+	.loc 2 2703 0
 	mov	r4, r0
-	.loc 2 2659 0
+	.loc 2 2707 0
 	cmp	r2, r3
-	bne	.L309
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	movw	r2, #2659
-	ldr	r1, .L322
-	ldr	r0, .L322+4
+	bne	.L296
+	.loc 2 2707 0 is_stmt 0 discriminator 1
+	movw	r2, #2707
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL311:
-.L309:
-	.loc 2 2660 0 is_stmt 1
-	ldr	r5, .L322+8
+.LVL317:
+.L296:
+	.loc 2 2708 0 is_stmt 1
+	ldr	r5, .L309+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #78]
 	cmp	r2, r3
-	bne	.L310
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	movw	r2, #2660
-	ldr	r1, .L322
-	ldr	r0, .L322+4
+	bne	.L297
+	.loc 2 2708 0 is_stmt 0 discriminator 1
+	movw	r2, #2708
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL312:
-.L310:
-	.loc 2 2661 0 is_stmt 1
+.LVL318:
+.L297:
+	.loc 2 2709 0 is_stmt 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L311
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	movw	r2, #2661
-	ldr	r1, .L322
-	ldr	r0, .L322+4
+	cbnz	r3, .L298
+	.loc 2 2709 0 is_stmt 0 discriminator 1
+	movw	r2, #2709
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL313:
-.L311:
-	.loc 2 2663 0 is_stmt 1
+.LVL319:
+.L298:
+	.loc 2 2711 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2662 0
+	.loc 2 2710 0
 	movs	r3, #0
-	.loc 2 2666 0
+	.loc 2 2714 0
 	ldrh	r1, [r5, #8]
-	.loc 2 2664 0
+	.loc 2 2712 0
 	movw	r6, #65535
-	.loc 2 2662 0
+	.loc 2 2710 0
 	strb	r3, [r4, #10]
-	.loc 2 2663 0
+	.loc 2 2711 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL314:
-	.loc 2 2668 0
+.LVL320:
+	.loc 2 2716 0
 	mov	r2, r3
-.L312:
-	.loc 2 2664 0
+.L299:
+	.loc 2 2712 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L314
-	.loc 2 2673 0
+	beq	.L301
+	.loc 2 2721 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2672 0
+	.loc 2 2720 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2673 0
+	.loc 2 2721 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2672 0
+	.loc 2 2720 0
 	orr	r6, r6, r0, lsl #10
-	.loc 2 2680 0
+	.loc 2 2728 0
 	movw	r0, #65535
-.LVL315:
-	.loc 2 2673 0
+.LVL321:
+	.loc 2 2721 0
 	strh	r2, [r4, #4]	@ movhi
-.L316:
-	.loc 2 2675 0
+.L303:
+	.loc 2 2723 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2676 0
+	.loc 2 2724 0
 	cmp	r1, r3
-	.loc 2 2677 0
+	.loc 2 2725 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2678 0
+	.loc 2 2726 0
 	moveq	r3, #0
-	.loc 2 2680 0
+	.loc 2 2728 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L316
+	beq	.L303
 	strb	r3, [r4, #6]
-	.loc 2 2682 0
+	.loc 2 2730 0
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5, #78]
 	cmp	r1, r3
-	bne	.L308
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	r2, .L308
-	.loc 2 2682 0 discriminator 2
-	movw	r2, #2682
-	ldr	r1, .L322
-	ldr	r0, .L322+4
+	bne	.L295
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbz	r2, .L295
+	.loc 2 2730 0 discriminator 2
+	movw	r2, #2730
+	ldr	r1, .L309
+	ldr	r0, .L309+4
 	bl	printk
-.LVL316:
-.L308:
-	.loc 2 2684 0 is_stmt 1
+.LVL322:
+.L295:
+	.loc 2 2732 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL317:
-.L314:
-	.loc 2 2665 0
+.LVL323:
+.L301:
+	.loc 2 2713 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2666 0
+	.loc 2 2714 0
 	cmp	r3, r1
-	.loc 2 2665 0
+	.loc 2 2713 0
 	strb	r3, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2715 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2668 0
+	.loc 2 2716 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2715 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2670 0
+	.loc 2 2718 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L312
-.L323:
+	b	.L299
+.L310:
 	.align	2
-.L322:
-	.word	.LANCHOR1+137
+.L309:
+	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
 .LFE250:
@@ -4238,13 +4119,13 @@ FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 25 0
-	ldr	r3, .L333
+	ldr	r3, .L320
 	.loc 5 30 0
 	mov	ip, #20
 	.loc 5 22 0
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI45:
+.LCFI44:
 	.loc 5 27 0
 	mov	r9, #12
 	movs	r6, #1
@@ -4253,30 +4134,30 @@ FtlGcBufInit:
 	.loc 5 29 0
 	mov	r7, r3
 	.loc 5 25 0
-	str	r2, [r3, #3144]
-.L325:
+	str	r2, [r3, #3140]
+.L312:
 	.loc 5 26 0 discriminator 1
 	ldrh	r1, [r3, #8]
 	uxth	r0, r2
 	adds	r4, r2, #1
 	cmp	r0, r1
-	bcc	.L328
+	bcc	.L315
 	.loc 5 37 0 discriminator 1
-	ldr	r7, .L333
+	ldr	r7, .L320
 	.loc 5 35 0 discriminator 1
 	mov	ip, #12
 	movs	r6, #0
-.L329:
+.L316:
 	.loc 5 34 0 discriminator 1
-	ldr	r2, [r3, #3164]
+	ldr	r2, [r3, #3160]
 	cmp	r1, r2
-	bcc	.L332
+	bcc	.L319
 	.loc 5 39 0
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L328:
+.L315:
 	uxth	r2, r2
 	.loc 5 27 0 discriminator 3
-	ldr	r8, [r3, #3148]
+	ldr	r8, [r3, #3144]
 	mul	lr, r9, r2
 	add	r1, r8, lr
 	str	r6, [r1, #8]
@@ -4286,12 +4167,12 @@ FtlGcBufInit:
 	it	mi
 	addmi	r1, r1, #3
 	bic	r0, r1, #3
-	ldr	r1, [r3, #3152]
+	ldr	r1, [r3, #3148]
 	add	r1, r1, r0
 	str	r1, [r8, lr]
 	.loc 5 29 0 discriminator 3
-	ldr	r5, [r7, #3156]
-	ldr	r0, [r3, #3148]
+	ldr	r5, [r7, #3152]
+	ldr	r0, [r3, #3144]
 	ldrh	r1, [r3, #88]
 	muls	r1, r2, r1
 	it	mi
@@ -4301,7 +4182,7 @@ FtlGcBufInit:
 	add	r1, r1, r5
 	str	r1, [r8, #4]
 	.loc 5 30 0 discriminator 3
-	ldr	r1, [r3, #3160]
+	ldr	r1, [r3, #3156]
 	mla	r2, ip, r2, r1
 	ldr	r1, [r0, lr]
 	str	r1, [r2, #8]
@@ -4309,13 +4190,13 @@ FtlGcBufInit:
 	ldr	r1, [r8, #4]
 	str	r1, [r2, #12]
 	mov	r2, r4
-	b	.L325
-.L332:
+	b	.L312
+.L319:
 	.loc 5 35 0 discriminator 3
 	mul	r0, ip, r1
-	ldr	r4, [r3, #3148]
+	ldr	r4, [r3, #3144]
 	.loc 5 36 0 discriminator 3
-	ldr	r5, [r3, #3152]
+	ldr	r5, [r3, #3148]
 	.loc 5 35 0 discriminator 3
 	adds	r2, r4, r0
 	str	r6, [r2, #8]
@@ -4328,8 +4209,8 @@ FtlGcBufInit:
 	add	r2, r2, r5
 	str	r2, [r4, r0]
 	.loc 5 37 0 discriminator 3
-	ldr	r2, [r3, #3148]
-	ldr	r4, [r7, #3156]
+	ldr	r2, [r3, #3144]
+	ldr	r4, [r7, #3152]
 	add	r0, r0, r2
 	ldrh	r2, [r3, #88]
 	muls	r2, r1, r2
@@ -4344,10 +4225,10 @@ FtlGcBufInit:
 	uxth	r1, r1
 	.loc 5 37 0 discriminator 3
 	str	r2, [r0, #4]
-	b	.L329
-.L334:
+	b	.L316
+.L321:
 	.align	2
-.L333:
+.L320:
 	.word	.LANCHOR0
 .LFE253:
 	.fnend
@@ -4365,13 +4246,13 @@ FtlGcBufFree:
 	.loc 5 42 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL318:
+.LVL324:
 	.loc 5 47 0
-	ldr	r3, .L342
+	ldr	r3, .L329
 	.loc 5 42 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI46:
+.LCFI45:
 	.loc 5 46 0
 	movs	r5, #0
 	.loc 5 48 0
@@ -4380,22 +4261,22 @@ FtlGcBufFree:
 	.loc 5 49 0
 	mov	r8, r5
 	.loc 5 47 0
-	ldr	ip, [r3, #3164]
+	ldr	ip, [r3, #3160]
 	.loc 5 48 0
-	ldr	r6, [r3, #3148]
-.L336:
+	ldr	r6, [r3, #3144]
+.L323:
 	uxth	r3, r5
 	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
-	bls	.L335
+	bls	.L322
 	.loc 5 48 0
 	mla	r4, r10, r3, r0
 	movs	r2, #0
-.L337:
+.L324:
 	uxth	r3, r2
 	.loc 5 47 0 discriminator 1
 	cmp	ip, r3
-	bls	.L338
+	bls	.L325
 	.loc 5 48 0
 	mul	r3, lr, r3
 	ldr	r7, [r4, #8]
@@ -4403,17 +4284,17 @@ FtlGcBufFree:
 	add	r9, r6, r3
 	ldr	r3, [r6, r3]
 	cmp	r3, r7
-	bne	.L337
+	bne	.L324
 	.loc 5 49 0
 	str	r8, [r9, #8]
-.L338:
+.L325:
 	adds	r5, r5, #1
-	b	.L336
-.L335:
+	b	.L323
+.L322:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L343:
+.L330:
 	.align	2
-.L342:
+.L329:
 	.word	.LANCHOR0
 .LFE254:
 	.fnend
@@ -4431,15 +4312,15 @@ FtlGcBufAlloc:
 	.loc 5 57 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL319:
+.LVL325:
 	.loc 5 62 0
-	ldr	r3, .L351
+	ldr	r3, .L338
 	.loc 5 63 0
 	mov	ip, #12
 	.loc 5 57 0
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI47:
+.LCFI46:
 	.loc 5 61 0
 	movs	r4, #0
 	.loc 5 64 0
@@ -4447,29 +4328,29 @@ FtlGcBufAlloc:
 	.loc 5 65 0
 	mov	r8, #20
 	.loc 5 62 0
-	ldr	r5, [r3, #3164]
+	ldr	r5, [r3, #3160]
 	.loc 5 63 0
-	ldr	r6, [r3, #3148]
-.L345:
+	ldr	r6, [r3, #3144]
+.L332:
 	uxth	r2, r4
 	.loc 5 61 0 discriminator 1
 	cmp	r1, r2
-	bhi	.L349
+	bhi	.L336
 	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L349:
+.L336:
 	mov	r9, #0
-.L346:
+.L333:
 	uxth	r3, r9
 	.loc 5 62 0 discriminator 1
 	cmp	r5, r3
-	bls	.L347
+	bls	.L334
 	.loc 5 63 0
 	mla	r3, ip, r3, r6
 	add	r9, r9, #1
 	ldr	r7, [r3, #8]
 	cmp	r7, #0
-	bne	.L346
+	bne	.L333
 	.loc 5 65 0
 	mla	r2, r8, r2, r0
 	ldr	r7, [r3]
@@ -4480,12 +4361,12 @@ FtlGcBufAlloc:
 	.loc 5 66 0
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L347:
+.L334:
 	adds	r4, r4, #1
-	b	.L345
-.L352:
+	b	.L332
+.L339:
 	.align	2
-.L351:
+.L338:
 	.word	.LANCHOR0
 .LFE255:
 	.fnend
@@ -4504,34 +4385,34 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL320:
+.LVL326:
 	.loc 5 78 0
-	ldr	r2, .L358
-	ldr	r3, [r2, #3168]
-	ldrh	r2, [r2, #3172]
+	ldr	r2, .L345
+	ldr	r3, [r2, #3164]
+	ldrh	r2, [r2, #3168]
 	add	r2, r3, r2, lsl #1
-.L354:
+.L341:
 	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
-	bne	.L356
+	bne	.L343
 	.loc 5 81 0
 	movs	r0, #0
-.LVL321:
+.LVL327:
 	bx	lr
-.LVL322:
-.L356:
+.LVL328:
+.L343:
 	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L354
+	bne	.L341
 	.loc 5 79 0
 	movs	r0, #1
-.LVL323:
+.LVL329:
 	.loc 5 82 0
 	bx	lr
-.L359:
+.L346:
 	.align	2
-.L358:
+.L345:
 	.word	.LANCHOR0
 .LFE256:
 	.fnend
@@ -4549,15 +4430,15 @@ FtlGcUpdatePage:
 	.loc 5 85 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL324:
+.LVL330:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI48:
+.LCFI47:
 	.loc 5 85 0
 	mov	r5, r0
 	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL325:
+.LVL331:
 	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
@@ -4565,47 +4446,47 @@ FtlGcUpdatePage:
 	movs	r4, #0
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL326:
+.LVL332:
 	.loc 5 91 0
-	ldr	r3, .L364
-	ldrh	r1, [r3, #3172]
+	ldr	r3, .L351
+	ldrh	r1, [r3, #3168]
 	.loc 5 92 0
-	ldr	r2, [r3, #3168]
-.LVL327:
-.L361:
+	ldr	r2, [r3, #3164]
+.LVL333:
+.L348:
 	uxth	ip, r4
-.LVL328:
+.LVL334:
 	.loc 5 91 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L363
+	bcc	.L350
 	.loc 5 96 0
-	bne	.L362
+	bne	.L349
 	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-.LVL329:
+.LVL335:
 	.loc 5 98 0
-	ldrh	r0, [r3, #3172]
-.LVL330:
+	ldrh	r0, [r3, #3168]
+.LVL336:
 	adds	r0, r0, #1
-	strh	r0, [r3, #3172]	@ movhi
-	b	.L362
-.LVL331:
-.L363:
+	strh	r0, [r3, #3168]	@ movhi
+	b	.L349
+.LVL337:
+.L350:
 	adds	r4, r4, #1
 	.loc 5 92 0
 	add	ip, r2, r4, lsl #1
-.LVL332:
+.LVL338:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L361
-.LVL333:
-.L362:
+	bne	.L348
+.LVL339:
+.L349:
 	.loc 5 101 0
-	ldrh	r2, [r3, #3180]
+	ldrh	r2, [r3, #3176]
 	movs	r0, #12
-.LVL334:
+.LVL340:
 	muls	r0, r2, r0
-	ldr	r2, [r3, #3176]
+	ldr	r2, [r3, #3172]
 	adds	r1, r2, r0
 	str	r6, [r1, #4]
 	.loc 5 102 0
@@ -4613,14 +4494,14 @@ FtlGcUpdatePage:
 	.loc 5 103 0
 	str	r5, [r2, r0]
 	.loc 5 107 0
-	ldrh	r2, [r3, #3180]
+	ldrh	r2, [r3, #3176]
 	adds	r2, r2, #1
-	strh	r2, [r3, #3180]	@ movhi
+	strh	r2, [r3, #3176]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL335:
-.L365:
+.LVL341:
+.L352:
 	.align	2
-.L364:
+.L351:
 	.word	.LANCHOR0
 .LFE257:
 	.fnend
@@ -4638,49 +4519,49 @@ FtlGcRefreshBlock:
 	.loc 5 345 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL336:
+.LVL342:
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI49:
+.LCFI48:
 	.loc 5 347 0
 	mov	r1, r0
 	.loc 5 345 0
 	mov	r4, r0
 	.loc 5 347 0
-	ldr	r0, .L369
-.LVL337:
+	ldr	r0, .L356
+.LVL343:
 	bl	printk
-.LVL338:
+.LVL344:
 	.loc 5 349 0
-	ldr	r3, .L369+4
-	ldrh	r0, [r3, #3182]
+	ldr	r3, .L356+4
+	ldrh	r0, [r3, #3178]
 	cmp	r4, r0
-	beq	.L367
+	beq	.L354
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r3, #3184]
+	ldrh	r1, [r3, #3180]
 	cmp	r4, r1
-	beq	.L367
+	beq	.L354
 	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r0, r2
-	bne	.L368
+	bne	.L355
 	.loc 5 352 0
-	strh	r4, [r3, #3182]	@ movhi
-.L367:
+	strh	r4, [r3, #3178]	@ movhi
+.L354:
 	.loc 5 356 0
 	movs	r0, #0
 	pop	{r4, pc}
-.LVL339:
-.L368:
+.LVL345:
+.L355:
 	.loc 5 353 0
 	cmp	r1, r2
 	.loc 5 354 0
 	it	eq
-	strheq	r4, [r3, #3184]	@ movhi
-	b	.L367
-.L370:
+	strheq	r4, [r3, #3180]	@ movhi
+	b	.L354
+.L357:
 	.align	2
-.L369:
+.L356:
 	.word	.LC73
 	.word	.LANCHOR0
 .LFE264:
@@ -4699,64 +4580,64 @@ FtlGcMarkBadPhyBlk:
 	.loc 5 359 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL340:
+.LVL346:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI50:
+.LCFI49:
 	.loc 5 359 0
 	mov	r5, r0
 	.loc 5 364 0
-	ldr	r4, .L375
+	ldr	r4, .L362
 	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL341:
+.LVL347:
 	.loc 5 364 0
 	mov	r2, r5
 	.loc 5 361 0
 	mov	r6, r0
 	.loc 5 364 0
-	ldrh	r1, [r4, #3186]
-	ldr	r0, .L375+4
+	ldrh	r1, [r4, #3182]
+	ldr	r0, .L362+4
 	bl	printk
-.LVL342:
+.LVL348:
 	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL343:
+.LVL349:
 	.loc 5 368 0
-	ldrh	r3, [r4, #3186]
+	ldrh	r3, [r4, #3182]
 	movs	r2, #0
 	.loc 5 369 0
-	addw	r0, r4, #3188
-.L372:
+	add	r0, r4, #3184
+.L359:
 	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L374
+	bhi	.L361
 	.loc 5 372 0
 	cmp	r3, #15
 	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-	strhls	r2, [r4, #3186]	@ movhi
+	strhls	r2, [r4, #3182]	@ movhi
 	addls	r4, r4, r3, lsl #1
-	strhls	r5, [r4, #3188]	@ movhi
-	b	.L373
-.L374:
+	strhls	r5, [r4, #3184]	@ movhi
+	b	.L360
+.L361:
 	adds	r2, r2, #1
 	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L372
-.L373:
+	bne	.L359
+.L360:
 	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL344:
-.L376:
+.LVL350:
+.L363:
 	.align	2
-.L375:
+.L362:
 	.word	.LANCHOR0
 	.word	.LC74
 .LFE265:
@@ -4777,46 +4658,46 @@ FtlGcReFreshBadBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI51:
+.LCFI50:
 	.loc 5 380 0
-	ldr	r4, .L383
-	ldrh	r3, [r4, #3186]
-	cbz	r3, .L378
+	ldr	r4, .L370
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L365
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r4, #3182]
+	ldrh	r1, [r4, #3178]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L378
+	bne	.L365
 	.loc 5 381 0 is_stmt 1
-	ldrh	r2, [r4, #3222]
+	ldrh	r2, [r4, #3218]
 	cmp	r2, r3
 	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
-	strhcs	r3, [r4, #3222]	@ movhi
-.LBB292:
-.LBB293:
+	strhcs	r3, [r4, #3218]	@ movhi
+.LBB297:
+.LBB298:
 	.loc 5 383 0
-	ldrh	r3, [r4, #3222]
+	ldrh	r3, [r4, #3218]
 	add	r3, r4, r3, lsl #1
-	ldrh	r0, [r3, #3188]
+	ldrh	r0, [r3, #3184]
 	bl	P2V_block_in_plane
-.LVL345:
+.LVL351:
 	bl	FtlGcRefreshBlock
-.LVL346:
+.LVL352:
 	.loc 5 384 0
-	ldrh	r3, [r4, #3222]
+	ldrh	r3, [r4, #3218]
 	adds	r3, r3, #1
-	strh	r3, [r4, #3222]	@ movhi
-.L378:
-.LBE293:
-.LBE292:
+	strh	r3, [r4, #3218]	@ movhi
+.L365:
+.LBE298:
+.LBE297:
 	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L384:
+.L371:
 	.align	2
-.L383:
+.L370:
 	.word	.LANCHOR0
 .LFE266:
 	.fnend
@@ -4834,70 +4715,70 @@ FlashReadPages:
 	.loc 1 44 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL347:
+.LVL353:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI52:
+.LCFI51:
 	mov	r9, r1
 	.loc 1 46 0
-	ldr	r5, .L403
+	ldr	r5, .L390
 	mov	r4, r0
 	.loc 1 50 0
 	movs	r6, #0
-.LVL348:
+.LVL354:
 	.loc 1 44 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI53:
+.LCFI52:
 	.loc 1 51 0
-	ldr	r10, .L403+4
+	ldr	r10, .L390+4
 	.loc 1 46 0
 	ldrh	r7, [r5, #12]
-.LVL349:
+.LVL355:
 	.loc 1 51 0
-	ldr	fp, .L403+8
+	ldr	fp, .L390+8
 	.loc 1 53 0
-	ldr	r8, .L403+12
+	ldr	r8, .L390+12
 	str	r5, [sp, #4]
-.LVL350:
-.L386:
+.LVL356:
+.L373:
 	.loc 1 50 0 discriminator 1
 	cmp	r6, r9
-	bne	.L393
+	bne	.L380
 	.loc 1 71 0
 	movs	r0, #0
-.LVL351:
+.LVL357:
 	add	sp, sp, #20
-.LCFI54:
+.LCFI53:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL352:
-.L393:
-.LCFI55:
+.LVL358:
+.L380:
+.LCFI54:
 	.loc 1 51 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L387
+	cbz	r3, .L374
 	.loc 1 51 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L388
-.L387:
+	cbnz	r3, .L375
+.L374:
 	.loc 1 51 0 discriminator 3
 	movs	r2, #51
-.LVL353:
+.LVL359:
 	mov	r1, r10
 	mov	r0, fp
-.LVL354:
+.LVL360:
 	bl	printk
-.LVL355:
-.L388:
+.LVL361:
+.L375:
 	.loc 1 52 0 is_stmt 1
 	add	r2, sp, #8
-.LVL356:
+.LVL362:
 	add	r1, sp, #12
 	mov	r0, r4
-.LVL357:
+.LVL363:
 	bl	l2p_addr_tran
-.LVL358:
+.LVL364:
 	.loc 1 53 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
@@ -4905,7 +4786,7 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r5, [r8, #12]
 	blx	r5
-.LVL359:
+.LVL365:
 	.loc 1 58 0
 	ldr	r3, [sp, #4]
 	.loc 1 57 0
@@ -4913,7 +4794,7 @@ FlashReadPages:
 	.loc 1 58 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L390
+	bne	.L377
 	.loc 1 59 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
@@ -4924,38 +4805,38 @@ FlashReadPages:
 	ldr	r5, [r8, #12]
 	add	r1, r1, r7
 	blx	r5
-.LVL360:
+.LVL366:
 	.loc 1 63 0
 	adds	r0, r0, #1
-	beq	.L391
+	beq	.L378
 	.loc 1 64 0 discriminator 1
 	ldr	r3, [r4, #12]
 	.loc 1 63 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L390
+	bne	.L377
 	.loc 1 64 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L390
+	bne	.L377
 	.loc 1 65 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L390
-.L391:
+	beq	.L377
+.L378:
 	.loc 1 67 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L390:
+.L377:
 	.loc 1 50 0 discriminator 2
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L386
-.L404:
+	b	.L373
+.L391:
 	.align	2
-.L403:
+.L390:
 	.word	g_nand_phy_info
-	.word	.LANCHOR1+156
+	.word	.LANCHOR1+130
 	.word	.LC1
 	.word	g_nand_ops
 .LFE272:
@@ -4976,53 +4857,53 @@ FtlLoadFactoryBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI56:
+.LCFI55:
 	.loc 4 289 0
 	movs	r6, #0
-.LVL361:
+.LVL367:
 	.loc 4 286 0
-	ldr	r4, .L415
+	ldr	r4, .L402
 	.loc 4 301 0
 	movw	r10, #61664
 	.loc 4 286 0
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	add	r7, r4, #138
 	.loc 4 287 0
 	ldr	r8, [r4, #3244]
 	.loc 4 294 0
-	addw	r9, r4, #3224
+	addw	r9, r4, #3220
 	.loc 4 286 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 287 0
-	str	r8, [r4, #3236]
-.LVL362:
-.L406:
+	str	r8, [r4, #3232]
+.LVL368:
+.L393:
 	.loc 4 289 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r6, r3
-	bcc	.L411
+	bcc	.L398
 	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL363:
-.L411:
+.LVL369:
+.L398:
 	.loc 4 291 0
 	ldrh	r5, [r4, #74]
-.LVL364:
+.LVL370:
 	.loc 4 290 0
 	movw	r3, #65535
 	strh	r3, [r7, #2]!	@ movhi
-.LVL365:
-.L408:
+.LVL371:
+.L395:
 	.loc 4 291 0 discriminator 2
 	ldrh	r3, [r4, #74]
 	subs	r5, r5, #1
-.LVL366:
+.LVL372:
 	uxth	r5, r5
-.LVL367:
+.LVL373:
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L409
+	ble	.L396
 	.loc 4 292 0
 	mla	r3, r6, r3, r5
 	.loc 4 294 0
@@ -5031,29 +4912,29 @@ FtlLoadFactoryBbt:
 	mov	r0, r9
 	.loc 4 292 0
 	lsls	r3, r3, #10
-.LVL368:
+.LVL374:
 	.loc 4 293 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL369:
+.LVL375:
 	.loc 4 295 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	beq	.L408
+	beq	.L395
 	.loc 4 301 0
 	ldrh	r3, [r8]
 	cmp	r3, r10
-	bne	.L408
+	bne	.L395
 	.loc 4 303 0
 	strh	r5, [r7]	@ movhi
-.L409:
+.L396:
 	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-	b	.L406
-.L416:
+	b	.L393
+.L403:
 	.align	2
-.L415:
+.L402:
 	.word	.LANCHOR0
 .LFE180:
 	.fnend
@@ -5071,20 +4952,20 @@ FtlGetLastWrittenPage:
 	.loc 2 47 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL370:
-	ldr	r3, .L425
+.LVL376:
+	ldr	r3, .L412
 	.loc 2 51 0
 	cmp	r1, #1
 	.loc 2 47 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI57:
+.LCFI56:
 	.loc 2 57 0
 	lsl	r7, r0, #10
 	.loc 2 47 0
 	.pad #88
 	sub	sp, sp, #88
-.LCFI58:
+.LCFI57:
 	.loc 2 58 0
 	mov	r2, r1
 	.loc 2 47 0
@@ -5094,19 +4975,19 @@ FtlGetLastWrittenPage:
 	ldrheq	r4, [r3, #80]
 	.loc 2 58 0
 	mov	r1, #1
-.LVL371:
+.LVL377:
 	.loc 2 51 0
 	it	ne
 	ldrhne	r4, [r3, #78]
 	.loc 2 58 0
 	add	r0, sp, #4
-.LVL372:
+.LVL378:
 	.loc 2 53 0
-	ldr	r3, .L425+4
+	ldr	r3, .L412+4
 	.loc 2 56 0
 	subs	r4, r4, #1
 	sxth	r5, r4
-.LVL373:
+.LVL379:
 	.loc 2 53 0
 	str	r3, [sp, #12]
 	.loc 2 54 0
@@ -5117,27 +4998,27 @@ FtlGetLastWrittenPage:
 	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL374:
+.LVL380:
 	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L420
+	bne	.L407
 	mov	r8, #0
-.LVL375:
-.L421:
+.LVL381:
+.L408:
 	.loc 2 60 0
 	cmp	r8, r5
-	ble	.L424
-.L420:
+	ble	.L411
+.L407:
 	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
-.LCFI59:
+.LCFI58:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL376:
-.L424:
-.LCFI60:
+.LVL382:
+.L411:
+.LCFI59:
 	.loc 2 61 0
 	add	r4, r8, r5
 	.loc 2 63 0
@@ -5155,27 +5036,27 @@ FtlGetLastWrittenPage:
 	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL377:
+.LVL383:
 	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L422
+	bne	.L409
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L422
+	bne	.L409
 	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L421
-.L422:
+	b	.L408
+.L409:
 	.loc 2 68 0
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L421
-.L426:
+	b	.L408
+.L413:
 	.align	2
-.L425:
+.L412:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 .LFE186:
@@ -5194,72 +5075,72 @@ FlashProgPages:
 	.loc 1 74 0
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL378:
+.LVL384:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI61:
+.LCFI60:
 	.pad #44
 	sub	sp, sp, #44
-.LCFI62:
+.LCFI61:
 	.loc 1 74 0
 	str	r3, [sp]
 	mov	fp, r1
 	mov	r9, r2
 	mov	r4, r0
 	.loc 1 76 0
-	ldr	r3, .L457
-.LVL379:
+	ldr	r3, .L444
+.LVL385:
 	.loc 1 80 0
 	mov	r5, r0
-.LVL380:
+.LVL386:
 	.loc 1 83 0
-	ldr	r8, .L457+28
+	ldr	r8, .L444+28
 	.loc 1 80 0
 	movs	r6, #0
 	.loc 1 76 0
 	ldrh	r10, [r3, #12]
-.LVL381:
+.LVL387:
 	str	r3, [sp, #4]
-.LVL382:
-.L428:
+.LVL388:
+.L415:
 	.loc 1 80 0 discriminator 1
 	cmp	r6, fp
-	bne	.L436
+	bne	.L423
 	.loc 1 101 0
 	ldr	r3, [sp]
-.LVL383:
+.LVL389:
 	cmp	r3, #0
-	bne	.L443
-.L456:
+	bne	.L430
+.L443:
 	.loc 1 131 0
 	movs	r0, #0
 	add	sp, sp, #44
-.LCFI63:
+.LCFI62:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL384:
-.L436:
-.LCFI64:
+.LVL390:
+.L423:
+.LCFI63:
 	.loc 1 81 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L429
+	cbz	r3, .L416
 	.loc 1 81 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L430
-.L429:
+	cbnz	r3, .L417
+.L416:
 	.loc 1 81 0 discriminator 3
 	movs	r2, #81
-	ldr	r1, .L457+4
-	ldr	r0, .L457+8
+	ldr	r1, .L444+4
+	ldr	r0, .L444+8
 	bl	printk
-.LVL385:
-.L430:
+.LVL391:
+.L417:
 	.loc 1 82 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL386:
+.LVL392:
 	.loc 1 83 0
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -5267,17 +5148,17 @@ FlashProgPages:
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r7, [r8, #8]
 	blx	r7
-.LVL387:
+.LVL393:
 	.loc 1 88 0
-	cbnz	r0, .L431
+	cbnz	r0, .L418
 	.loc 1 87 0
 	str	r0, [r5]
-.L432:
+.L419:
 	.loc 1 91 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L434
+	bne	.L421
 	.loc 1 92 0
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -5288,28 +5169,28 @@ FlashProgPages:
 	ldr	r7, [r8, #8]
 	add	r1, r1, r10
 	blx	r7
-.LVL388:
+.LVL394:
 	.loc 1 96 0
-	cbz	r0, .L434
+	cbz	r0, .L421
 	.loc 1 97 0
 	mov	r3, #-1
 	str	r3, [r5]
-.L434:
+.L421:
 	.loc 1 80 0 discriminator 2
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L428
-.L431:
+	b	.L415
+.L418:
 	.loc 1 89 0
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L432
-.LVL389:
-.L441:
-.LBB294:
+	b	.L419
+.LVL395:
+.L428:
+.LBB299:
 	.loc 1 106 0
 	movs	r3, #0
-.LVL390:
+.LVL396:
 	.loc 1 112 0
 	mov	r2, r9
 	.loc 1 106 0
@@ -5330,83 +5211,83 @@ FlashProgPages:
 	str	r3, [sp, #24]
 	.loc 1 112 0
 	bl	FlashReadPages
-.LVL391:
+.LVL397:
 	.loc 1 113 0
 	ldr	fp, [sp, #20]
-.LVL392:
+.LVL398:
 	cmp	fp, #-1
-	bne	.L438
+	bne	.L425
 	.loc 1 114 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L457+12
+	ldr	r0, .L444+12
 	bl	printk
-.LVL393:
+.LVL399:
 	.loc 1 115 0
 	str	fp, [r4]
-.L438:
+.L425:
 	.loc 1 117 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L439
+	cbz	r3, .L426
 	.loc 1 118 0
 	ldr	r2, [r3]
 	ldr	r3, [r8, #3248]
 	cmp	r2, r3
-	beq	.L439
+	beq	.L426
 	.loc 1 119 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L457+16
+	ldr	r0, .L444+16
 	bl	printk
-.LVL394:
+.LVL400:
 	.loc 1 120 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L439:
+.L426:
 	.loc 1 123 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L440
+	cbz	r3, .L427
 	.loc 1 124 0
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L440
+	beq	.L427
 	.loc 1 125 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L457+20
+	ldr	r0, .L444+20
 	bl	printk
-.LVL395:
+.LVL401:
 	.loc 1 126 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L440:
-.LBE294:
+.L427:
+.LBE299:
 	.loc 1 103 0 discriminator 2
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-.LVL396:
-.L437:
+.LVL402:
+.L424:
 	.loc 1 103 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
-	bne	.L441
-	b	.L456
-.LVL397:
-.L443:
-.LBB295:
+	bne	.L428
+	b	.L443
+.LVL403:
+.L430:
+.LBB300:
 	.loc 1 107 0 is_stmt 1
-	ldr	r8, .L457+32
-.LBE295:
+	ldr	r8, .L444+32
+.LBE300:
 	movs	r5, #0
-.LBB296:
+.LBB301:
 	.loc 1 106 0
-	ldr	r7, .L457+24
+	ldr	r7, .L444+24
 	.loc 1 110 0
 	add	r10, r8, #3248
-.LVL398:
-	b	.L437
-.L458:
+.LVL404:
+	b	.L424
+.L445:
 	.align	2
-.L457:
+.L444:
 	.word	g_nand_phy_info
-	.word	.LANCHOR1+171
+	.word	.LANCHOR1+145
 	.word	.LC1
 	.word	.LC75
 	.word	.LC76
@@ -5414,7 +5295,7 @@ FlashProgPages:
 	.word	check_buf
 	.word	g_nand_ops
 	.word	.LANCHOR0
-.LBE296:
+.LBE301:
 .LFE273:
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
@@ -5431,87 +5312,87 @@ FlashEraseBlocks:
 	.loc 1 134 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL399:
+.LVL405:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
-.LCFI65:
-.LVL400:
+.LCFI64:
+.LVL406:
 	.loc 1 134 0
 	mov	r8, r2
 	.loc 1 137 0
-	ldr	r5, .L470
-.LVL401:
+	ldr	r5, .L457
+.LVL407:
 	mov	r4, r0
 	.loc 1 140 0
 	movs	r6, #0
-.LVL402:
+.LVL408:
 	.loc 1 142 0
-	ldr	r7, .L470+4
+	ldr	r7, .L457+4
 	.loc 1 137 0
 	ldrh	r9, [r5, #12]
-.LVL403:
-.L460:
+.LVL409:
+.L447:
 	.loc 1 140 0 discriminator 1
 	cmp	r6, r8
-	bne	.L466
+	bne	.L453
 	.loc 1 153 0
 	movs	r0, #0
-.LVL404:
+.LVL410:
 	add	sp, sp, #12
-.LCFI66:
+.LCFI65:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL405:
-.L466:
-.LCFI67:
+.LVL411:
+.L453:
+.LCFI66:
 	.loc 1 141 0
 	add	r1, sp, #4
 	mov	r2, sp
 	mov	r0, r4
-.LVL406:
+.LVL412:
 	bl	l2p_addr_tran
-.LVL407:
+.LVL413:
 	.loc 1 142 0
 	ldr	r3, [r7, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL408:
+.LVL414:
 	.loc 1 144 0
-	cbnz	r0, .L461
+	cbnz	r0, .L448
 	.loc 1 143 0
 	str	r0, [r4]
-.L462:
+.L449:
 	.loc 1 146 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L464
+	bne	.L451
 	.loc 1 147 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r7, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r1, r1, r9
 	blx	r3
-.LVL409:
+.LVL415:
 	.loc 1 148 0
-	cbz	r0, .L464
+	cbz	r0, .L451
 	.loc 1 149 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L464:
+.L451:
 	.loc 1 140 0 discriminator 2
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L460
-.L461:
+	b	.L447
+.L448:
 	.loc 1 145 0
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L462
-.L471:
+	b	.L449
+.L458:
 	.align	2
-.L470:
+.L457:
 	.word	g_nand_phy_info
 	.word	g_nand_ops
 .LFE274:
@@ -5530,75 +5411,85 @@ FtlFreeSysBlkQueueIn:
 	.loc 2 98 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL410:
+.LVL416:
+	.loc 2 99 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 98 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI68:
+.LCFI67:
 	.loc 2 98 0
 	mov	r5, r0
-.LBB297:
-.LBB298:
-	.loc 2 94 0
-	ldr	r4, .L481
-.LBE298:
-.LBE297:
 	.loc 2 99 0
+	cmp	r3, r2
+	bhi	.L459
+.LBB310:
+.LBB311:
+	.loc 2 94 0
+	ldr	r4, .L468
+.LBE311:
+.LBE310:
+	.loc 2 101 0
 	ldrh	r3, [r4, #194]
 	cmp	r3, #1024
-	beq	.L472
-.LBB299:
-	.loc 2 101 0
-	cbz	r1, .L474
-.LBB300:
-	.loc 2 102 0
+	beq	.L459
+.LBB312:
+.LBB313:
+	.loc 2 103 0
+	cbz	r1, .L461
+.LBB314:
+	.loc 2 104 0
 	bl	P2V_block_in_plane
-.LVL411:
+.LVL417:
 	mov	r6, r0
-	.loc 2 103 0
+	.loc 2 105 0
 	ldr	r0, [r4, #3760]
 	lsls	r3, r5, #10
-	.loc 2 104 0
+	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 103 0
+	.loc 2 105 0
 	str	r3, [r0, #4]
-	.loc 2 104 0
+	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL412:
-	.loc 2 105 0
-	ldr	r2, [r4, #2248]
+.LVL418:
+	.loc 2 107 0
+	ldr	r2, [r4, #2304]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 106 0
-	ldr	r3, [r4, #2492]
-	adds	r3, r3, #1
-	str	r3, [r4, #2492]
-.LVL413:
-.L474:
-.LBE300:
 	.loc 2 108 0
+	ldr	r3, [r4, #2536]
+	adds	r3, r3, #1
+	str	r3, [r4, #2536]
+.LVL419:
+.L461:
+.LBE314:
+	.loc 2 110 0
 	ldrh	r3, [r4, #194]
 	adds	r3, r3, #1
 	strh	r3, [r4, #194]	@ movhi
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	r3, [r4, #192]
 	add	r2, r4, r3, lsl #1
-	.loc 2 110 0
+	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 109 0
+	.loc 2 111 0
 	strh	r5, [r2, #196]	@ movhi
-	.loc 2 110 0
+	.loc 2 112 0
 	strh	r3, [r4, #192]	@ movhi
-.L472:
+.L459:
 	pop	{r4, r5, r6, pc}
-.LVL414:
-.L482:
+.LVL420:
+.L469:
 	.align	2
-.L481:
+.L468:
 	.word	.LANCHOR0
-.LBE299:
+.LBE313:
+.LBE312:
 .LFE190:
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -5615,42 +5506,42 @@ FtlLowFormatEraseBlock:
 	.loc 3 528 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL415:
+.LVL421:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI69:
+.LCFI68:
 	.loc 3 539 0
 	mov	r10, #0
 	.loc 3 538 0
-	ldr	r4, .L528
+	ldr	r4, .L515
 	.loc 3 528 0
 	mov	r7, r1
 	.loc 3 536 0
 	mov	r6, r10
 	.loc 3 537 0
 	mov	r5, r10
-.LVL416:
+.LVL422:
 	.loc 3 540 0
 	mov	r9, #20
 	.loc 3 528 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI70:
+.LCFI69:
 	.loc 3 551 0
 	mov	fp, r4
 	.loc 3 528 0
 	str	r0, [sp]
 	.loc 3 538 0
 	str	r0, [r4, #3764]
-.L484:
+.L471:
 	.loc 3 539 0 discriminator 1
 	ldrh	r1, [r4, #8]
 	uxth	r3, r10
 	cmp	r1, r3
-	bhi	.L489
+	bhi	.L476
 	.loc 3 559 0
 	cmp	r6, #0
-	beq	.L483
+	beq	.L470
 	.loc 3 563 0
 	mov	r8, #0
 	.loc 3 564 0
@@ -5659,49 +5550,49 @@ FtlLowFormatEraseBlock:
 	mov	r2, r6
 	movs	r1, #0
 	ldr	r0, [r4, #3760]
-.LVL417:
+.LVL423:
 	bl	FlashEraseBlocks
-.LVL418:
-.L492:
+.LVL424:
+.L479:
 	.loc 3 563 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L494
+	bhi	.L481
 	.loc 3 571 0
 	cmp	r7, #0
-	beq	.L511
+	beq	.L498
 	.loc 3 573 0
 	ldrh	r3, [r4, #80]
-.LVL419:
+.LVL425:
 	.loc 3 572 0
 	mov	r10, #1
-.LVL420:
+.LVL426:
 	.loc 3 573 0
 	str	r3, [sp, #4]
 	.loc 3 574 0
 	lsrs	r3, r3, #2
-.LVL421:
+.LVL427:
 	str	r3, [sp, #8]
-.LVL422:
-.L495:
+.LVL428:
+.L482:
 	mov	r8, #0
-.LVL423:
+.LVL429:
 	.loc 3 579 0
 	mov	fp, #20
-.L505:
+.L492:
 	.loc 3 578 0
 	mov	r9, #0
 	.loc 3 577 0
 	mov	r6, r9
-.L496:
+.L483:
 	.loc 3 578 0 discriminator 1
 	ldrh	r1, [r4, #8]
 	uxth	r3, r9
-.LVL424:
+.LVL430:
 	cmp	r1, r3
-	bhi	.L500
+	bhi	.L487
 	.loc 3 593 0
-	cbz	r6, .L483
+	cbz	r6, .L470
 	.loc 3 597 0
 	mov	r9, #0
 	.loc 3 596 0
@@ -5710,65 +5601,65 @@ FtlLowFormatEraseBlock:
 	mov	r1, r6
 	ldr	r0, [r4, #3760]
 	bl	FlashProgPages
-.LVL425:
-.L502:
+.LVL431:
+.L489:
 	.loc 3 597 0 discriminator 1
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L504
+	bhi	.L491
 	.loc 3 604 0
 	ldr	r3, [sp, #8]
-.LVL426:
+.LVL432:
 	add	r8, r8, r3
-.LVL427:
+.LVL433:
 	.loc 3 605 0
 	ldr	r3, [sp, #4]
-.LVL428:
+.LVL434:
 	.loc 3 604 0
 	uxth	r8, r8
-.LVL429:
+.LVL435:
 	.loc 3 605 0
 	cmp	r3, r8
-	bhi	.L505
+	bhi	.L492
 	mov	r8, #0
-.LVL430:
+.LVL436:
 	.loc 3 611 0 discriminator 1
 	mov	r9, #20
-.L506:
+.L493:
 	.loc 3 610 0 discriminator 1
 	uxth	r3, r8
-.LVL431:
+.LVL437:
 	cmp	r6, r3
-	bhi	.L508
+	bhi	.L495
 	.loc 3 615 0
 	ldr	r3, [sp]
-.LVL432:
+.LVL438:
 	cmp	r3, #63
-	bls	.L509
+	bls	.L496
 	.loc 3 615 0 is_stmt 0 discriminator 1
-	cbz	r7, .L483
-.L509:
+	cbz	r7, .L470
+.L496:
 	.loc 3 616 0 is_stmt 1
 	mov	r2, r6
 	mov	r1, r10
 	ldr	r0, [r4, #3760]
 	bl	FlashEraseBlocks
-.LVL433:
-.L483:
+.LVL439:
+.L470:
 	.loc 3 619 0
 	mov	r0, r5
-.LVL434:
+.LVL440:
 	add	sp, sp, #20
-.LCFI71:
+.LCFI70:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL435:
-.L489:
-.LCFI72:
+.LVL441:
+.L476:
+.LCFI71:
 	.loc 3 540 0
 	uxth	r3, r10
 	ldr	r0, [r4, #3760]
-.LVL436:
+.LVL442:
 	movs	r2, #0
 	mul	r1, r9, r3
 	.loc 3 541 0
@@ -5779,20 +5670,20 @@ FtlLowFormatEraseBlock:
 	ldr	r1, [sp]
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL437:
+.LVL443:
 	mov	r8, r0
 	.loc 3 543 0
-	cbz	r7, .L485
+	cbz	r7, .L472
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL438:
-	cbnz	r0, .L486
-.L485:
+.LVL444:
+	cbnz	r0, .L473
+.L472:
 	.loc 3 548 0
 	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-.LVL439:
-	cbnz	r0, .L487
+.LVL445:
+	cbnz	r0, .L474
 	.loc 3 549 0
 	ldr	r1, [r4, #3760]
 	lsl	r3, r8, #10
@@ -5818,54 +5709,54 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L486:
+.L473:
 	add	r10, r10, #1
-	b	.L484
-.L487:
+	b	.L471
+.L474:
 	.loc 3 554 0
 	adds	r5, r5, #1
-.LVL440:
+.LVL446:
 	uxth	r5, r5
-.LVL441:
-	b	.L486
-.L494:
+.LVL447:
+	b	.L473
+.L481:
 	.loc 3 564 0
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3760]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L493
+	bne	.L480
 	.loc 3 566 0
 	ldr	r0, [r1, #4]
 	.loc 3 565 0
 	adds	r5, r5, #1
-.LVL442:
+.LVL448:
 	uxth	r5, r5
-.LVL443:
+.LVL449:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL444:
-.L493:
+.LVL450:
+.L480:
 	add	r8, r8, #1
-	b	.L492
-.L511:
+	b	.L479
+.L498:
 	.loc 3 533 0
 	movs	r3, #6
-.LVL445:
+.LVL451:
 	.loc 3 534 0
 	mov	r10, r7
-.LVL446:
+.LVL452:
 	.loc 3 533 0
 	str	r3, [sp, #8]
 	.loc 3 531 0
 	movs	r3, #1
-.LVL447:
+.LVL453:
 	str	r3, [sp, #4]
-	b	.L495
-.LVL448:
-.L500:
+	b	.L482
+.LVL454:
+.L487:
 	.loc 3 579 0
 	uxth	r3, r9
 	ldr	r0, [r4, #3760]
@@ -5879,25 +5770,25 @@ FtlLowFormatEraseBlock:
 	ldr	r1, [sp]
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL449:
+.LVL455:
 	str	r0, [sp, #12]
 	.loc 3 581 0
-	cbz	r7, .L497
+	cbz	r7, .L484
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL450:
-	cbnz	r0, .L498
-.L497:
+.LVL456:
+	cbnz	r0, .L485
+.L484:
 	.loc 3 585 0
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-.LVL451:
-	cbnz	r0, .L498
+.LVL457:
+	cbnz	r0, .L485
 	.loc 3 586 0
 	ldr	r1, [r4, #3760]
 	ldr	r3, [sp, #12]
 	.loc 3 588 0
-	ldr	r2, .L528
+	ldr	r2, .L515
 	.loc 3 586 0
 	mla	r1, fp, r6, r1
 	.loc 3 588 0
@@ -5922,57 +5813,269 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L498:
+.L485:
 	add	r9, r9, #1
-	b	.L496
-.L504:
+	b	.L483
+.L491:
 	.loc 3 598 0
 	mul	r3, fp, r9
 	ldr	r2, [r4, #3760]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L503
+	cbz	r3, .L490
 	.loc 3 600 0
 	ldr	r0, [r1, #4]
 	.loc 3 599 0
 	adds	r5, r5, #1
-.LVL452:
+.LVL458:
 	uxth	r5, r5
-.LVL453:
+.LVL459:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL454:
-.L503:
+.LVL460:
+.L490:
 	add	r9, r9, #1
-	b	.L502
-.LVL455:
-.L508:
+	b	.L489
+.LVL461:
+.L495:
 	.loc 3 611 0
-	cbz	r7, .L507
+	cbz	r7, .L494
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3760]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L507
+	cbnz	r3, .L494
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL456:
-.L507:
+.LVL462:
+.L494:
 	add	r8, r8, #1
-	b	.L506
-.L529:
+	b	.L493
+.L516:
 	.align	2
-.L528:
+.L515:
 	.word	.LANCHOR0
 .LFE159:
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	1
+	.global	FtlFreeSysBlkQueueOut
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	.fnstart
+.LFB193:
+	.loc 2 181 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI72:
+.LBB315:
+.LBB316:
+	.loc 2 89 0
+	ldr	r4, .L524
+.LBE316:
+.LBE315:
+	.loc 2 203 0
+	ldr	r6, .L524+4
+.L518:
+.LBB318:
+.LBB317:
+	.loc 2 89 0
+	ldrh	r1, [r4, #194]
+.LBE317:
+.LBE318:
+	.loc 2 186 0
+	cbz	r1, .L519
+	.loc 2 187 0
+	ldrh	r3, [r4, #190]
+	.loc 2 188 0
+	subs	r1, r1, #1
+	strh	r1, [r4, #194]	@ movhi
+	.loc 2 187 0
+	add	r2, r4, r3, lsl #1
+	.loc 2 189 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 187 0
+	ldrh	r5, [r2, #196]
+	.loc 2 189 0
+	strh	r3, [r4, #190]	@ movhi
+.LBB319:
+	.loc 2 191 0
+	mov	r0, r5
+	bl	P2V_block_in_plane
+.LVL463:
+	mov	r7, r0
+	.loc 2 192 0
+	ldr	r0, [r4, #3760]
+	lsls	r3, r5, #10
+	.loc 2 193 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 192 0
+	str	r3, [r0, #4]
+	.loc 2 193 0
+	bl	FlashEraseBlocks
+.LVL464:
+	.loc 2 194 0
+	ldr	r2, [r4, #2304]
+	ldrh	r3, [r2, r7, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.LBE319:
+	.loc 2 202 0
+	movw	r2, #65533
+.LBB320:
+	.loc 2 195 0
+	ldr	r3, [r4, #2536]
+	adds	r3, r3, #1
+	str	r3, [r4, #2536]
+.LBE320:
+	.loc 2 202 0
+	subs	r3, r5, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L523
+	.loc 2 203 0
+	ldrh	r2, [r4, #194]
+	mov	r1, r5
+	mov	r0, r6
+	bl	printk
+.LVL465:
+	.loc 2 205 0
+	b	.L518
+.L519:
+	.loc 2 199 0
+	ldr	r0, .L524+8
+	bl	printk
+.LVL466:
+.L522:
+	b	.L522
+.L523:
+	.loc 2 208 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, pc}
+.L525:
+	.align	2
+.L524:
+	.word	.LANCHOR0
+	.word	.LC79
+	.word	.LC78
+.LFE193:
+	.fnend
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	.fnstart
+.LFB205:
+	.loc 2 562 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL467:
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+.LCFI73:
+	.loc 2 562 0
+	mov	r4, r0
+	.loc 2 566 0
+	ldrh	r1, [r0, #10]
+	movs	r3, #0
+	ldr	r2, [r0, #12]
+.LVL468:
+.L527:
+	uxth	r5, r3
+	.loc 2 566 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcs	.L530
+	.loc 2 567 0 is_stmt 1
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L527
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL469:
+	.loc 2 569 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 568 0
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	.loc 2 569 0
+	cmp	r3, r2
+	bls	.L528
+	.loc 2 570 0
+	ldr	r3, .L534
+	ldr	r0, .L534+4
+	ldrh	r2, [r3, #194]
+	bl	printk
+.LVL470:
+.L529:
+	b	.L529
+.L528:
+	.loc 2 576 0
+	ldr	r3, [r4, #28]
+	.loc 2 574 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 575 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 576 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 577 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.LVL471:
+.L530:
+	.loc 2 581 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L532
+.LBB323:
+.LBB324:
+	movw	r2, #581
+	ldr	r1, .L534+8
+	ldr	r0, .L534+12
+	bl	printk
+.LVL472:
+.L532:
+.LBE324:
+.LBE323:
+	.loc 2 583 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL473:
+.L535:
+	.align	2
+.L534:
+	.word	.LANCHOR0
+	.word	.LC80
+	.word	.LANCHOR1+160
+	.word	.LC1
+.LFE205:
+	.fnend
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.align	1
 	.global	FlashTestBlk
 	.syntax unified
 	.thumb
@@ -5985,84 +6088,84 @@ FlashTestBlk:
 	.loc 1 156 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL457:
+.LVL474:
 	.loc 1 161 0
 	cmp	r0, #11
 	.loc 1 156 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI73:
+.LCFI74:
 	mov	r4, r0
 	.pad #92
 	sub	sp, sp, #92
-.LCFI74:
+.LCFI75:
 	.loc 1 161 0
-	bls	.L532
-.LBB313:
-.LBB314:
+	bls	.L538
+.LBB337:
+.LBB338:
 	.loc 1 165 0
-	ldr	r5, .L533
+	ldr	r5, .L539
 	.loc 1 166 0
 	add	r0, sp, #24
-.LBB315:
-.LBB316:
-.LBB317:
+.LBB339:
+.LBB340:
+.LBB341:
 	.loc 1 202 0
 	movs	r2, #32
 	movs	r1, #165
-.LBE317:
-.LBE316:
-.LBE315:
+.LBE341:
+.LBE340:
+.LBE339:
 	.loc 1 169 0
 	lsls	r4, r4, #10
-.LVL458:
+.LVL475:
 	.loc 1 166 0
 	str	r0, [sp, #16]
 	.loc 1 165 0
 	str	r5, [sp, #12]
-.LBB320:
-.LBB319:
-.LBB318:
+.LBB344:
+.LBB343:
+.LBB342:
 	.loc 1 202 0
 	bl	memset
-.LVL459:
-.LBE318:
-.LBE319:
-.LBE320:
+.LVL476:
+.LBE342:
+.LBE343:
+.LBE344:
 	.loc 1 170 0
 	movs	r2, #1
-.LBB321:
-.LBB322:
-.LBB323:
+.LBB345:
+.LBB346:
+.LBB347:
 	.loc 1 202 0
 	mov	r3, #1515870810
-.LBE323:
-.LBE322:
-.LBE321:
+.LBE347:
+.LBE346:
+.LBE345:
 	.loc 1 170 0
 	mov	r1, r2
 	add	r0, sp, #4
-.LBB326:
-.LBB325:
-.LBB324:
+.LBB350:
+.LBB349:
+.LBB348:
 	.loc 1 202 0
 	str	r3, [r5]
 	str	r3, [r5, #4]
-.LBE324:
-.LBE325:
-.LBE326:
+.LBE348:
+.LBE349:
+.LBE350:
 	.loc 1 169 0
 	str	r4, [sp, #8]
 	.loc 1 170 0
 	bl	FlashEraseBlocks
-.LVL460:
+.LVL477:
 	.loc 1 171 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL461:
+.LVL478:
 	.loc 1 172 0
 	ldr	r4, [sp, #4]
 	.loc 1 178 0
@@ -6076,27 +6179,27 @@ FlashTestBlk:
 	negs	r4, r4
 	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL462:
-.L530:
-.LBE314:
-.LBE313:
+.LVL479:
+.L536:
+.LBE338:
+.LBE337:
 	.loc 1 180 0
 	mov	r0, r4
-.LVL463:
+.LVL480:
 	add	sp, sp, #92
-.LCFI75:
+.LCFI76:
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL464:
-.L532:
-.LCFI76:
+.LVL481:
+.L538:
+.LCFI77:
 	.loc 1 162 0
 	movs	r4, #0
-.LVL465:
-	b	.L530
-.L534:
+.LVL482:
+	b	.L536
+.L540:
 	.align	2
-.L533:
+.L539:
 	.word	ftl_temp_buf
 .LFE275:
 	.fnend
@@ -6114,95 +6217,95 @@ FlashGetBadBlockList:
 	.loc 1 183 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL466:
+.LVL483:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI77:
-.LBB337:
-.LBB338:
-.LBB339:
+.LCFI78:
+.LBB361:
+.LBB362:
+.LBB363:
 	.loc 1 202 0
 	mov	r2, #256
-.LBE339:
-.LBE338:
-.LBE337:
+.LBE363:
+.LBE362:
+.LBE361:
 	.loc 1 183 0
 	mov	r5, r1
-.LBB344:
-.LBB342:
-.LBB340:
+.LBB368:
+.LBB366:
+.LBB364:
 	.loc 1 202 0
 	movs	r1, #255
-.LVL467:
-.LBE340:
-.LBE342:
-.LBE344:
+.LVL484:
+.LBE364:
+.LBE366:
+.LBE368:
 	.loc 1 183 0
 	mov	r4, r0
-.LBB345:
-.LBB343:
-.LBB341:
+.LBB369:
+.LBB367:
+.LBB365:
 	.loc 1 202 0
 	bl	memset
-.LVL468:
-.LBE341:
-.LBE343:
-.LBE345:
+.LVL485:
+.LBE365:
+.LBE367:
+.LBE369:
 	.loc 1 187 0
-	ldr	r3, .L542
+	ldr	r3, .L548
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL469:
+.LVL486:
 	uxth	r0, r0
-.LVL470:
+.LVL487:
 	.loc 1 188 0
 	cmp	r0, #50
-	bls	.L536
-.LBB346:
-.LBB347:
-.LBB348:
+	bls	.L542
+.LBB370:
+.LBB371:
+.LBB372:
 	.loc 1 202 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL471:
+.LVL488:
 	bl	memset
-.LVL472:
-.LBE348:
-.LBE347:
-.LBE346:
+.LVL489:
+.LBE372:
+.LBE371:
+.LBE370:
 	.loc 1 190 0
 	movs	r0, #0
-.LVL473:
-.L536:
+.LVL490:
+.L542:
 	.loc 1 192 0
-	ldr	r3, .L542+4
+	ldr	r3, .L548+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L541
+	bne	.L547
 	add	r1, r4, r0, lsl #1
-.LVL474:
+.LVL491:
 	mov	r3, r4
-.L538:
+.L544:
 	.loc 1 193 0 discriminator 1
 	cmp	r3, r1
-	bne	.L539
-.L541:
-.LVL475:
+	bne	.L545
+.L547:
+.LVL492:
 	.loc 1 198 0
 	pop	{r3, r4, r5, pc}
-.LVL476:
-.L539:
+.LVL493:
+.L545:
 	.loc 1 194 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L538
-.L543:
+	b	.L544
+.L549:
 	.align	2
-.L542:
+.L548:
 	.word	g_nand_ops
 	.word	g_nand_phy_info
 .LFE276:
@@ -6221,23 +6324,23 @@ ftl_memset:
 	.loc 1 201 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL477:
+.LVL494:
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI78:
+.LCFI79:
 	.loc 1 201 0
 	mov	r4, r0
-.LBB353:
+.LBB377:
 	.loc 1 202 0
-	cbz	r2, .L545
-.LBE353:
-.LBB354:
-.LBB355:
+	cbz	r2, .L551
+.LBE377:
+.LBB378:
+.LBB379:
 	bl	memset
-.LVL478:
-.L545:
-.LBE355:
-.LBE354:
+.LVL495:
+.L551:
+.LBE379:
+.LBE378:
 	.loc 1 203 0 discriminator 8
 	mov	r0, r4
 	pop	{r4, pc}
@@ -6259,11 +6362,11 @@ FtlMemInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI79:
+.LCFI80:
 	.loc 3 297 0
 	movw	r3, #65535
 	.loc 3 282 0
-	ldr	r4, .L650
+	ldr	r4, .L656
 	movs	r5, #0
 	.loc 3 311 0
 	movs	r6, #12
@@ -6274,174 +6377,174 @@ FtlMemInit:
 	.loc 3 297 0
 	str	r3, [r4, #3784]
 	.loc 3 301 0
-	strh	r3, [r4, #3182]	@ movhi
+	strh	r3, [r4, #3178]	@ movhi
 	.loc 3 302 0
-	strh	r3, [r4, #3184]	@ movhi
+	strh	r3, [r4, #3180]	@ movhi
 	.loc 3 303 0
 	movs	r3, #32
-	strh	r3, [r4, #3128]	@ movhi
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 3 310 0
 	lsls	r0, r0, #1
 	.loc 3 304 0
 	movs	r3, #128
 	.loc 3 282 0
-	str	r5, [r4, #2472]
+	str	r5, [r4, #2516]
 	.loc 3 304 0
-	strh	r3, [r4, #3130]	@ movhi
+	strh	r3, [r4, #3126]	@ movhi
 	.loc 3 283 0
-	str	r5, [r4, #2476]
+	str	r5, [r4, #2520]
 	.loc 3 284 0
-	str	r5, [r4, #2460]
+	str	r5, [r4, #2504]
 	.loc 3 285 0
-	str	r5, [r4, #2448]
+	str	r5, [r4, #2492]
 	.loc 3 286 0
-	str	r5, [r4, #2444]
+	str	r5, [r4, #2488]
 	.loc 3 287 0
-	str	r5, [r4, #2452]
+	str	r5, [r4, #2496]
 	.loc 3 288 0
-	str	r5, [r4, #2456]
+	str	r5, [r4, #2500]
 	.loc 3 289 0
-	str	r5, [r4, #2440]
+	str	r5, [r4, #2484]
 	.loc 3 290 0
-	str	r5, [r4, #2480]
+	str	r5, [r4, #2524]
 	.loc 3 291 0
-	str	r5, [r4, #2484]
+	str	r5, [r4, #2528]
 	.loc 3 292 0
-	str	r5, [r4, #2492]
+	str	r5, [r4, #2536]
 	.loc 3 293 0
-	str	r5, [r4, #2496]
+	str	r5, [r4, #2540]
 	.loc 3 294 0
-	str	r5, [r4, #2500]
+	str	r5, [r4, #2544]
 	.loc 3 295 0
 	str	r5, [r4, #3780]
 	.loc 3 296 0
-	str	r5, [r4, #3140]
+	str	r5, [r4, #3136]
 	.loc 3 298 0
 	str	r5, [r4, #3788]
 	.loc 3 299 0
-	str	r5, [r4, #3132]
+	str	r5, [r4, #3128]
 	.loc 3 300 0
 	str	r5, [r4, #3764]
 	.loc 3 305 0
-	strh	r5, [r4, #3136]	@ movhi
+	strh	r5, [r4, #3132]	@ movhi
 	.loc 3 306 0
-	strh	r5, [r4, #3186]	@ movhi
+	strh	r5, [r4, #3182]	@ movhi
 	.loc 3 307 0
-	strh	r5, [r4, #3222]	@ movhi
+	strh	r5, [r4, #3218]	@ movhi
 	.loc 3 310 0
 	bl	ftl_malloc
-.LVL479:
-	str	r0, [r4, #3168]
+.LVL496:
+	str	r0, [r4, #3164]
 	.loc 3 311 0
 	ldrh	r0, [r4, #82]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL480:
+.LVL497:
 	.loc 3 312 0
 	ldrh	r3, [r4, #8]
 	.loc 3 311 0
-	str	r0, [r4, #3176]
+	str	r0, [r4, #3172]
 	.loc 3 312 0
 	muls	r7, r3, r7
 	.loc 3 313 0
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL481:
+.LVL498:
 	str	r0, [r4, #3792]
 	.loc 3 314 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL482:
+.LVL499:
 	str	r0, [r4, #3796]
 	.loc 3 315 0
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL483:
+.LVL500:
 	str	r0, [r4, #3800]
 	.loc 3 316 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL484:
+.LVL501:
 	str	r0, [r4, #3760]
 	.loc 3 317 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL485:
+.LVL502:
 	.loc 3 320 0
 	ldrh	r3, [r4, #8]
 	.loc 3 319 0
 	ldrh	r7, [r4, #86]
 	.loc 3 317 0
-	str	r0, [r4, #3160]
+	str	r0, [r4, #3156]
 	.loc 3 320 0
 	lsls	r3, r3, #1
 	.loc 3 321 0
 	mov	r0, r7
 	.loc 3 320 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3164]
+	str	r3, [r4, #3160]
 	.loc 3 321 0
 	bl	ftl_malloc
-.LVL486:
-	str	r0, [r4, #2244]
+.LVL503:
+	str	r0, [r4, #3240]
 	.loc 3 322 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL487:
+.LVL504:
 	str	r0, [r4, #3804]
 	.loc 3 323 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL488:
+.LVL505:
 	str	r0, [r4, #3808]
 	.loc 3 324 0
-	ldr	r0, [r4, #3164]
+	ldr	r0, [r4, #3160]
 	muls	r0, r7, r0
 	bl	ftl_malloc
-.LVL489:
-	str	r0, [r4, #3152]
+.LVL506:
+	str	r0, [r4, #3148]
 	.loc 3 325 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL490:
+.LVL507:
 	str	r0, [r4, #3776]
 	.loc 3 326 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL491:
+.LVL508:
 	str	r0, [r4, #3768]
 	.loc 3 327 0
-	ldr	r0, [r4, #3164]
+	ldr	r0, [r4, #3160]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL492:
+.LVL509:
 	.loc 3 329 0
 	ldrh	r3, [r4, #88]
 	ldrh	r7, [r4, #8]
 	.loc 3 327 0
-	str	r0, [r4, #3148]
+	str	r0, [r4, #3144]
 	.loc 3 329 0
 	muls	r7, r3, r7
 	.loc 3 330 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL493:
+.LVL510:
 	str	r0, [r4, #3244]
 	.loc 3 331 0
 	lsls	r0, r7, #2
 	bl	ftl_malloc
-.LVL494:
+.LVL511:
 	.loc 3 332 0
 	ldrh	r3, [r4, #88]
 	.loc 3 331 0
 	str	r0, [r4, #3772]
 	.loc 3 332 0
-	ldr	r0, [r4, #3164]
+	ldr	r0, [r4, #3160]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL495:
-	str	r0, [r4, #3156]
+.LVL512:
+	str	r0, [r4, #3152]
 	.loc 3 335 0
 	ldrh	r0, [r4, #18]
 	lsls	r0, r0, #1
@@ -6449,13 +6552,13 @@ FtlMemInit:
 	strh	r0, [r4, #3812]	@ movhi
 	.loc 3 336 0
 	bl	ftl_malloc
-.LVL496:
+.LVL513:
 	.loc 3 337 0
 	ldrh	r3, [r4, #3812]
 	.loc 3 336 0
 	str	r0, [r4, #3816]
 	.loc 3 338 0
-	ldr	r0, .L650+4
+	ldr	r0, .L656+4
 	.loc 3 337 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
@@ -6465,71 +6568,71 @@ FtlMemInit:
 	strh	r3, [r4, #3812]	@ movhi
 	.loc 3 338 0
 	bl	ftl_malloc
-.LVL497:
+.LVL514:
 	.loc 3 345 0
 	ldrh	r7, [r4, #18]
 	.loc 3 338 0
 	str	r0, [r4, #3820]
 	.loc 3 339 0
 	adds	r0, r0, #32
-	str	r0, [r4, #2248]
+	str	r0, [r4, #2304]
 	.loc 3 345 0
 	lsls	r7, r7, #1
 	.loc 3 347 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL498:
+.LVL515:
 	str	r0, [r4, #3824]
 	.loc 3 349 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL499:
+.LVL516:
 	.loc 3 350 0
 	ldr	r7, [r4, #104]
 	.loc 3 349 0
-	str	r0, [r4, #2260]
+	str	r0, [r4, #2300]
 	.loc 3 350 0
 	lsls	r7, r7, #1
 	.loc 3 351 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL500:
+.LVL517:
 	str	r0, [r4, #3828]
 	.loc 3 352 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL501:
+.LVL518:
 	str	r0, [r4, #3832]
 	.loc 3 353 0
 	ldrh	r0, [r4, #18]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL502:
+.LVL519:
 	str	r0, [r4]
 	.loc 3 354 0
 	ldrh	r0, [r4, #96]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL503:
+.LVL520:
 	str	r0, [r4, #124]
 	.loc 3 355 0
 	ldrh	r0, [r4, #96]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL504:
+.LVL521:
 	str	r0, [r4, #3836]
 	.loc 3 356 0
 	ldrh	r0, [r4, #96]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL505:
+.LVL522:
 	str	r0, [r4, #3840]
 	.loc 3 357 0
 	ldrh	r0, [r4, #98]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL506:
+.LVL523:
 	.loc 3 358 0
 	ldrh	r2, [r4, #98]
 	mov	r1, r5
@@ -6539,37 +6642,37 @@ FtlMemInit:
 	.loc 3 358 0
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL507:
+.LVL524:
 	.loc 3 360 0
 	ldrh	r0, [r4, #112]
 	.loc 3 361 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL508:
+.LVL525:
 	str	r0, [r4, #3848]
 	.loc 3 362 0
 	ldr	r0, [r4, #104]
 	.loc 3 363 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL509:
+.LVL526:
 	str	r0, [r4, #3852]
 	.loc 3 364 0
 	ldrh	r0, [r4, #114]
 	.loc 3 365 0
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL510:
+.LVL527:
 	.loc 3 366 0
 	ldrh	r3, [r4, #114]
 	.loc 3 365 0
-	str	r0, [r4, #2424]
+	str	r0, [r4, #2468]
 	.loc 3 366 0
 	ldrh	r0, [r4, #86]
 	.loc 3 367 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL511:
+.LVL528:
 	.loc 3 368 0
 	ldrh	r3, [r4, #18]
 	.loc 3 367 0
@@ -6578,8 +6681,8 @@ FtlMemInit:
 	movs	r0, #6
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL512:
-	str	r0, [r4, #2252]
+.LVL529:
+	str	r0, [r4, #2292]
 	.loc 3 370 0
 	ldrh	r0, [r4, #74]
 	.loc 3 371 0
@@ -6593,47 +6696,47 @@ FtlMemInit:
 	.loc 3 372 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL513:
+.LVL530:
 	.loc 3 374 0
 	ldrh	r2, [r4, #3860]
 	.loc 3 373 0
 	movs	r3, #1
-.LVL514:
+.LVL531:
 	ldrh	r6, [r4, #30]
 	.loc 3 372 0
 	str	r0, [r4, #156]
 	lsls	r2, r2, #2
 	.loc 3 373 0
 	mov	r1, r2
-.L550:
+.L556:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	cmp	r3, r6
-	bcc	.L551
-	ldr	r2, .L650+8
+	bcc	.L557
+	ldr	r2, .L656+8
 	.loc 3 379 0 is_stmt 1
 	movs	r1, #0
 	add	r3, r2, r3, lsl #2
-.LVL515:
+.LVL532:
 	adds	r2, r2, #56
 	adds	r3, r3, #24
-.L552:
+.L558:
 	.loc 3 377 0 discriminator 1
 	cmp	r2, r3
-	bne	.L553
+	bne	.L559
 	.loc 3 383 0
 	ldr	r3, [r4, #3828]
-	cbnz	r3, .L554
-.L556:
+	cbnz	r3, .L560
+.L562:
 	.loc 3 385 0
-	ldr	r1, .L650+12
-	ldr	r0, .L650+16
+	ldr	r1, .L656+12
+	ldr	r0, .L656+16
 	bl	printk
-.LVL516:
+.LVL533:
 	.loc 3 386 0
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL517:
-.L551:
+.LVL534:
+.L557:
 	.loc 3 374 0 discriminator 3
 	ldr	r0, [r4, #156]
 	.loc 3 373 0 discriminator 3
@@ -6642,153 +6745,153 @@ FtlMemInit:
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [r5, #4]!
-	b	.L550
-.LVL518:
-.L553:
+	b	.L556
+.LVL535:
+.L559:
 	.loc 3 379 0 discriminator 2
 	str	r1, [r3, #4]!
-	b	.L552
-.L651:
+	b	.L558
+.L657:
 	.align	2
-.L650:
+.L656:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+128
 	.word	.LANCHOR1+186
-	.word	.LC78
-.L554:
+	.word	.LC81
+.L560:
 	.loc 3 388 0
 	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 393 0
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 398 0
 	ldr	r3, [r4, #3852]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 404 0
-	ldr	r3, [r4, #2424]
+	ldr	r3, [r4, #2468]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 409 0
 	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 414 0
-	ldr	r3, [r4, #2252]
+	ldr	r3, [r4, #2292]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 419 0
 	ldr	r3, [r4, #156]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 425 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 430 0
-	ldr	r3, [r4, #3168]
+	ldr	r3, [r4, #3164]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3176]
+	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 435 0 is_stmt 1
 	ldr	r3, [r4, #3792]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 435 0 discriminator 2
 	ldr	r3, [r4, #3760]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 435 0 discriminator 3
-	ldr	r3, [r4, #3160]
+	ldr	r3, [r4, #3156]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 435 0 discriminator 4
 	ldr	r3, [r4, #3796]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 440 0 is_stmt 1
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 440 0 discriminator 2
 	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 440 0 discriminator 3
-	ldr	r3, [r4, #3152]
+	ldr	r3, [r4, #3148]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 441 0 is_stmt 1
 	ldr	r3, [r4, #3776]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3768]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 441 0 discriminator 2
-	ldr	r3, [r4, #3148]
+	ldr	r3, [r4, #3144]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 446 0 is_stmt 1
 	ldr	r3, [r4, #3244]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 446 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3772]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 446 0 discriminator 2
-	ldr	r3, [r4, #3156]
+	ldr	r3, [r4, #3152]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 452 0 is_stmt 1
-	ldr	r3, [r4, #2248]
+	ldr	r3, [r4, #2304]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 452 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 458 0 is_stmt 1
 	ldr	r3, [r4, #124]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 464 0
-	ldr	r3, .L652
+	ldr	r3, .L658
 	ldr	r2, [r3, #3836]
 	cmp	r2, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 470 0
 	ldr	r2, [r3, #3840]
 	cmp	r2, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 476 0
 	ldr	r3, [r3, #3844]
 	cmp	r3, #0
-	beq	.L556
+	beq	.L562
 	.loc 3 483 0
 	movs	r0, #0
 	.loc 3 484 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L653:
+.L659:
 	.align	2
-.L652:
+.L658:
 	.word	.LANCHOR0
 .LFE156:
 	.fnend
@@ -6806,50 +6909,50 @@ FtlBbt2Bitmap:
 	.loc 4 66 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL519:
+.LVL536:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI80:
+.LCFI81:
 	.loc 4 66 0
 	mov	r5, r0
 	.loc 4 69 0
-	ldr	r6, .L660
+	ldr	r6, .L666
 	.loc 4 66 0
 	mov	r7, r1
 	subs	r4, r5, #2
 	.loc 4 72 0
 	movw	r8, #65535
 	.loc 4 74 0
-	ldr	r9, .L660+4
+	ldr	r9, .L666+4
 	addw	r5, r5, #1022
 	.loc 4 69 0
 	ldrh	r2, [r6, #3860]
 	movs	r1, #0
-.LVL520:
+.LVL537:
 	.loc 4 74 0
-	ldr	r10, .L660+8
+	ldr	r10, .L666+8
 	.loc 4 69 0
 	mov	r0, r7
-.LVL521:
+.LVL538:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL522:
-.L657:
+.LVL539:
+.L663:
 	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, r8
-	beq	.L654
+	beq	.L660
 	.loc 4 74 0
 	ldrh	r2, [r6, #74]
 	cmp	r2, r3
-	bhi	.L656
+	bhi	.L662
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r9
 	mov	r0, r10
 	bl	printk
-.LVL523:
-.L656:
+.LVL540:
+.L662:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
@@ -6863,13 +6966,13 @@ FtlBbt2Bitmap:
 	orr	r2, r2, r3
 	str	r2, [r7, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L657
-.L654:
+	bne	.L663
+.L660:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL524:
-.L661:
+.LVL541:
+.L667:
 	.align	2
-.L660:
+.L666:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
@@ -6886,137 +6989,137 @@ FtlBbt2Bitmap:
 load_l2p_region:
 	.fnstart
 .LFB203:
-	.loc 2 442 0
+	.loc 2 488 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL525:
+.LVL542:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI81:
-	.loc 2 442 0
+.LCFI82:
+	.loc 2 488 0
 	mov	r6, r0
-	.loc 2 446 0
-	ldr	r4, .L668
-	.loc 2 442 0
+	.loc 2 492 0
+	ldr	r4, .L674
+	.loc 2 488 0
 	mov	r8, r1
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	r3, [r4, #112]
 	cmp	r3, r0
-	bcs	.L663
-	.loc 2 446 0 is_stmt 0 discriminator 1
-	mov	r2, #446
-	ldr	r1, .L668+4
-	ldr	r0, .L668+8
+	bcs	.L669
+	.loc 2 492 0 is_stmt 0 discriminator 1
+	mov	r2, #492
+	ldr	r1, .L674+4
+	ldr	r0, .L674+8
 	bl	printk
-.LVL526:
-.L663:
-	.loc 2 447 0 is_stmt 1
+.LVL543:
+.L669:
+	.loc 2 493 0 is_stmt 1
 	ldr	r3, [r4, #3848]
 	movs	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-.LVL527:
-	.loc 2 449 0
-	cbnz	r7, .L664
-	.loc 2 450 0
+.LVL544:
+	.loc 2 495 0
+	cbnz	r7, .L670
+	.loc 2 496 0
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2424]
+	ldr	r3, [r4, #2468]
 	ldrh	r2, [r4, #86]
 	movs	r1, #255
 	add	r3, r3, r5
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL528:
-	.loc 2 451 0
-	ldr	r3, [r4, #2424]
+.LVL545:
+	.loc 2 497 0
+	ldr	r3, [r4, #2468]
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 452 0
-	ldr	r3, [r4, #2424]
+	.loc 2 498 0
+	ldr	r3, [r4, #2468]
 	add	r5, r5, r3
 	str	r7, [r5, #4]
-.LVL529:
-.L665:
-	.loc 2 473 0
+.LVL546:
+.L671:
+	.loc 2 519 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL530:
-.L664:
-	.loc 2 456 0
+.LVL547:
+.L670:
+	.loc 2 502 0
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2424]
-	.loc 2 458 0
+	ldr	r3, [r4, #2468]
+	.loc 2 504 0
 	movs	r2, #1
-	ldr	r0, .L668+12
+	ldr	r0, .L674+12
 	mov	r1, r2
-	.loc 2 455 0
-	str	r7, [r4, #3228]
-	.loc 2 456 0
+	.loc 2 501 0
+	str	r7, [r4, #3224]
+	.loc 2 502 0
 	add	r3, r3, r5
 	ldr	r3, [r3, #8]
-	str	r3, [r4, #3232]
-	.loc 2 457 0
+	str	r3, [r4, #3228]
+	.loc 2 503 0
 	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3236]
-	.loc 2 458 0
+	str	r3, [r4, #3232]
+	.loc 2 504 0
 	bl	FlashReadPages
-.LVL531:
-	.loc 2 459 0
-	ldr	r8, [r4, #3236]
-.LVL532:
-	.loc 2 461 0
+.LVL548:
+	.loc 2 505 0
+	ldr	r8, [r4, #3232]
+.LVL549:
+	.loc 2 507 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L666
-	.loc 2 462 0
+	beq	.L672
+	.loc 2 508 0
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L668+16
+	ldr	r0, .L674+16
 	bl	printk
-.LVL533:
-	.loc 2 463 0
+.LVL550:
+	.loc 2 509 0
 	movs	r3, #4
-	ldr	r1, [r4, #3236]
+	ldr	r1, [r4, #3232]
 	mov	r2, r3
-	ldr	r0, .L668+20
+	ldr	r0, .L674+20
 	bl	rknand_print_hex
-.LVL534:
-	.loc 2 464 0
+.LVL551:
+	.loc 2 510 0
 	ldrh	r3, [r4, #112]
 	movs	r2, #4
 	ldr	r1, [r4, #3848]
-	ldr	r0, .L668+24
+	ldr	r0, .L674+24
 	bl	rknand_print_hex
-.LVL535:
-.L666:
-	.loc 2 467 0
+.LVL552:
+.L672:
+	.loc 2 513 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L667
-	.loc 2 467 0 is_stmt 0 discriminator 1
-	movw	r2, #467
-	ldr	r1, .L668+4
-	ldr	r0, .L668+8
+	beq	.L673
+	.loc 2 513 0 is_stmt 0 discriminator 1
+	movw	r2, #513
+	ldr	r1, .L674+4
+	ldr	r0, .L674+8
 	bl	printk
-.LVL536:
-.L667:
-	.loc 2 470 0 is_stmt 1
-	ldr	r3, [r4, #2424]
+.LVL553:
+.L673:
+	.loc 2 516 0 is_stmt 1
+	ldr	r3, [r4, #2468]
 	movs	r1, #0
 	adds	r2, r3, r5
 	str	r1, [r2, #4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 472 0
-	b	.L665
-.L669:
+	.loc 2 518 0
+	b	.L671
+.L675:
 	.align	2
-.L668:
+.L674:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
-	.word	.LANCHOR0+3224
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
+	.word	.LANCHOR0+3220
+	.word	.LC82
+	.word	.LC83
+	.word	.LC84
 .LFE203:
 	.fnend
 	.size	load_l2p_region, .-load_l2p_region
@@ -7030,144 +7133,144 @@ load_l2p_region:
 ftl_free_no_use_map_blk:
 	.fnstart
 .LFB204:
-	.loc 2 476 0
+	.loc 2 522 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL537:
+.LVL554:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI82:
-.LVL538:
-	.loc 2 476 0
+.LCFI83:
+.LVL555:
+	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 485 0
+	.loc 2 531 0
 	ldrh	r2, [r0, #10]
 	movs	r1, #0
-	.loc 2 479 0
+	.loc 2 525 0
 	ldr	r5, [r0, #20]
-.LVL539:
-	.loc 2 477 0
+.LVL556:
+	.loc 2 523 0
 	ldr	r9, [r0, #12]
-.LVL540:
-	.loc 2 478 0
+.LVL557:
+	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL541:
-	.loc 2 485 0
+.LVL558:
+	.loc 2 531 0
 	lsls	r2, r2, #1
 	mov	r0, r5
-.LVL542:
+.LVL559:
 	bl	ftl_memset
-.LVL543:
-	.loc 2 486 0
+.LVL560:
+	.loc 2 532 0
 	movs	r3, #0
-.LVL544:
-.L671:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL561:
+.L677:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
-.LVL545:
+.LVL562:
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L675
-	.loc 2 494 0 is_stmt 1
+	bhi	.L681
+	.loc 2 540 0 is_stmt 1
 	ldrh	fp, [r5]
-.LVL546:
-	.loc 2 497 0
+.LVL563:
+	.loc 2 543 0
 	movs	r6, #0
-.LVL547:
-	.loc 2 498 0
-	ldr	r2, .L684
-	.loc 2 495 0
+.LVL564:
+	.loc 2 544 0
+	ldr	r2, .L690
+	.loc 2 541 0
 	mov	r10, r6
-.LVL548:
-.L676:
-	.loc 2 497 0 discriminator 1
+.LVL565:
+.L682:
+	.loc 2 543 0 discriminator 1
 	ldrh	r1, [r4, #10]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L680
-	.loc 2 513 0
+	bhi	.L686
+	.loc 2 559 0
 	mov	r0, r10
 	add	sp, sp, #12
-.LCFI83:
+.LCFI84:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL549:
-.L675:
-.LCFI84:
-	.loc 2 487 0
+.LVL566:
+.L681:
+.LCFI85:
+	.loc 2 533 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 488 0
+	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL550:
-.L672:
-	.loc 2 488 0 discriminator 1
+.LVL567:
+.L678:
+	.loc 2 534 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L674
+	bhi	.L680
 	adds	r3, r3, #1
-	b	.L671
-.L674:
-	.loc 2 489 0
+	b	.L677
+.L680:
+	.loc 2 535 0
 	uxth	r0, r2
 	adds	r2, r2, #1
 	ldrh	r7, [r9, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 490 0
+	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L672
-.LVL551:
-.L680:
-	.loc 2 498 0
+	b	.L678
+.LVL568:
+.L686:
+	.loc 2 544 0
 	ldrh	r1, [r4]
 	uxth	r7, r6
 	cmp	r1, r3
-	bne	.L677
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L683
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r2, #80]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
-	.loc 2 499 0 is_stmt 1 discriminator 1
+	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L677:
-	.loc 2 500 0
+.L683:
+	.loc 2 546 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	fp, r8
 	itt	hi
 	movhi	r10, r3
 	movhi	fp, r8
-	.loc 2 504 0
+	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L679
-	.loc 2 504 0 is_stmt 0 discriminator 1
+	bne	.L685
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L679
-	.loc 2 506 0 is_stmt 1
+	cbz	r0, .L685
+	.loc 2 552 0 is_stmt 1
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
-.LVL552:
-	.loc 2 507 0
+.LVL569:
+	.loc 2 553 0
 	strh	r8, [r9, r7, lsl #1]	@ movhi
-	.loc 2 508 0
+	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L679:
-	adds	r6, r6, #1
-	b	.L676
 .L685:
+	adds	r6, r6, #1
+	b	.L682
+.L691:
 	.align	2
-.L684:
+.L690:
 	.word	.LANCHOR0
 .LFE204:
 	.fnend
@@ -7182,162 +7285,162 @@ ftl_free_no_use_map_blk:
 Ftl_write_map_blk_to_last_page:
 	.fnstart
 .LFB207:
-	.loc 2 583 0
+	.loc 2 632 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL553:
+.LVL570:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI85:
-	.loc 2 591 0
+.LCFI86:
+	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 583 0
+	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL554:
-	.loc 2 591 0
+.LVL571:
+	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L687
-	.loc 2 592 0
+	bne	.L693
+	.loc 2 641 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L688
-	.loc 2 592 0 is_stmt 0 discriminator 1
-	mov	r2, #592
-	ldr	r1, .L696
-	ldr	r0, .L696+4
+	cbz	r3, .L694
+	.loc 2 641 0 is_stmt 0 discriminator 1
+	movw	r2, #641
+	ldr	r1, .L702
+	ldr	r0, .L702+4
 	bl	printk
-.LVL555:
-.L688:
-	.loc 2 593 0 is_stmt 1
+.LVL572:
+.L694:
+	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL556:
-	.loc 2 595 0
+.LVL573:
+	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 594 0
+	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL557:
-.L689:
-	.loc 2 628 0
+.LVL574:
+.L695:
+	.loc 2 677 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL558:
-.L687:
-	.loc 2 601 0
+.LVL575:
+.L693:
+	.loc 2 650 0
 	ldrh	r6, [r5, r3, lsl #1]
-	.loc 2 612 0
+	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 602 0
+	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L696+8
-.LVL559:
-	.loc 2 607 0
+	ldr	r5, .L702+8
+.LVL576:
+	.loc 2 656 0
 	ldr	r2, [r0, #28]
-	.loc 2 587 0
+	.loc 2 636 0
 	ldr	r7, [r0, #24]
-.LVL560:
-	.loc 2 602 0
+.LVL577:
+	.loc 2 651 0
 	orr	r3, r3, r6, lsl #10
+	str	r3, [r5, #3224]
+	.loc 2 652 0
+	ldr	r3, [r5, #3240]
 	str	r3, [r5, #3228]
-	.loc 2 603 0
-	ldr	r3, [r5, #2244]
-	str	r3, [r5, #3232]
-	.loc 2 604 0
+	.loc 2 653 0
 	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3236]
-	.loc 2 607 0
+	str	r3, [r5, #3232]
+	.loc 2 656 0
 	str	r2, [r3, #4]
-	.loc 2 608 0
+	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	r2, [r0, #4]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	r6, [r3, #2]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 612 0
+	.loc 2 661 0
 	ldrh	r2, [r5, #80]
-	ldr	r0, [r5, #2244]
-.LVL561:
+	ldr	r0, [r5, #3240]
+.LVL578:
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL562:
-	.loc 2 614 0
+.LVL579:
+	.loc 2 663 0
 	movs	r2, #0
-	.loc 2 613 0
+	.loc 2 662 0
 	mov	r3, r2
-.LVL563:
-.L690:
-	.loc 2 614 0 discriminator 1
+.LVL580:
+.L696:
+	.loc 2 663 0 discriminator 1
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L692
-	.loc 2 621 0
+	bhi	.L698
+	.loc 2 670 0
 	movs	r2, #1
 	movs	r3, #0
-.LVL564:
+.LVL581:
 	mov	r1, r2
-	ldr	r0, .L696+12
+	ldr	r0, .L702+12
 	bl	FlashProgPages
-.LVL565:
-	.loc 2 622 0
+.LVL582:
+	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 622 0
+	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 626 0
+	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL566:
-	.loc 2 627 0
-	b	.L689
-.LVL567:
-.L692:
+.LVL583:
+	.loc 2 676 0
+	b	.L695
+.LVL584:
+.L698:
 	uxth	r1, r2
-	.loc 2 615 0
+	.loc 2 664 0
 	ldr	r0, [r7, r1, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L691
-	.loc 2 617 0
-	ldr	r0, [r5, #2244]
-	.loc 2 616 0
+	bne	.L697
+	.loc 2 666 0
+	ldr	r0, [r5, #3240]
+	.loc 2 665 0
 	adds	r3, r3, #1
-.LVL568:
+.LVL585:
 	uxth	r3, r3
-.LVL569:
-	.loc 2 617 0
+.LVL586:
+	.loc 2 666 0
 	str	r1, [r0, r3, lsl #3]
-	.loc 2 618 0
+	.loc 2 667 0
 	ldr	r0, [r7, r1, lsl #2]
-	ldr	r1, [r5, #2244]
+	ldr	r1, [r5, #3240]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L691:
-	adds	r2, r2, #1
-	b	.L690
 .L697:
+	adds	r2, r2, #1
+	b	.L696
+.L703:
 	.align	2
-.L696:
+.L702:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 .LFE207:
 	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7351,200 +7454,200 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	.fnstart
 .LFB208:
-	.loc 2 631 0
+	.loc 2 680 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL570:
+.LVL587:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI86:
-	.loc 2 631 0
+.LCFI87:
+	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 637 0
-	ldr	r7, .L717
-	.loc 2 631 0
+	.loc 2 686 0
+	ldr	r7, .L723
+	.loc 2 680 0
 	mov	r8, r1
 	mov	r10, r2
-	.loc 2 634 0
+	.loc 2 683 0
 	movs	r6, #0
-.LVL571:
-	.loc 2 650 0
-	ldr	r9, .L717+20
+.LVL588:
+	.loc 2 699 0
+	ldr	r9, .L723+20
 	mov	r5, r7
-.L699:
-	.loc 2 637 0
-	ldr	r3, [r7, #2456]
+.L705:
+	.loc 2 686 0
+	ldr	r3, [r7, #2500]
 	adds	r3, r3, #1
-	str	r3, [r7, #2456]
-	.loc 2 638 0
+	str	r3, [r7, #2500]
+	.loc 2 687 0
 	ldrh	r3, [r7, #80]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L700
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L706
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L701
-.L700:
-	.loc 2 639 0 is_stmt 1
+	bne	.L707
+.L706:
+	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL572:
-.L701:
-	.loc 2 650 0
+.LVL589:
+.L707:
+	.loc 2 699 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L702
-	.loc 2 650 0 is_stmt 0 discriminator 1
-	movw	r2, #650
+	cbnz	r3, .L708
+	.loc 2 699 0 is_stmt 0 discriminator 1
+	movw	r2, #699
 	mov	r1, r9
-	ldr	r0, .L717+4
+	ldr	r0, .L723+4
 	bl	printk
-.LVL573:
-.L702:
-	.loc 2 651 0 is_stmt 1
+.LVL590:
+.L708:
+	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L703
-	.loc 2 651 0 is_stmt 0 discriminator 1
-	movw	r2, #651
+	bcc	.L709
+	.loc 2 700 0 is_stmt 0 discriminator 1
+	mov	r2, #700
 	mov	r1, r9
-	ldr	r0, .L717+4
+	ldr	r0, .L723+4
 	bl	printk
-.LVL574:
-.L703:
-	.loc 2 652 0 is_stmt 1
+.LVL591:
+.L709:
+	.loc 2 701 0 is_stmt 1
 	ldrh	r2, [r4]
-.LBB361:
-.LBB362:
-.LBB363:
+.LBB385:
+.LBB386:
+.LBB387:
 	.loc 1 202 0
 	movs	r1, #16
-.LBE363:
-.LBE362:
-.LBE361:
-	.loc 2 652 0
+.LBE387:
+.LBE386:
+.LBE385:
+	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 656 0
+	.loc 2 705 0
 	ldr	r0, [r5, #3244]
-	.loc 2 652 0
+	.loc 2 701 0
 	ldrh	fp, [r3, r2, lsl #1]
-	.loc 2 654 0
+	.loc 2 703 0
 	ldrh	r3, [r4, #2]
-	.loc 2 656 0
-	str	r0, [r5, #3236]
-	.loc 2 655 0
-	str	r10, [r5, #3232]
-	.loc 2 654 0
+	.loc 2 705 0
+	str	r0, [r5, #3232]
+	.loc 2 704 0
+	str	r10, [r5, #3228]
+	.loc 2 703 0
 	orr	r3, r3, fp, lsl #10
-	str	r3, [r5, #3228]
-.LBB366:
-.LBB365:
-.LBB364:
+	str	r3, [r5, #3224]
+.LBB390:
+.LBB389:
+.LBB388:
 	.loc 1 202 0
 	bl	__memzero
-.LVL575:
-.LBE364:
-.LBE365:
-.LBE366:
-	.loc 2 659 0
-	ldr	r3, [r5, #3236]
-.LVL576:
-	.loc 2 660 0
+.LVL592:
+.LBE388:
+.LBE389:
+.LBE390:
+	.loc 2 708 0
+	ldr	r3, [r5, #3232]
+.LVL593:
+	.loc 2 709 0
 	ldr	r2, [r4, #28]
-	.loc 2 664 0
-	ldr	r0, .L717+8
-	.loc 2 661 0
+	.loc 2 713 0
+	ldr	r0, .L723+8
+	.loc 2 710 0
 	strh	r8, [r3, #8]	@ movhi
-	.loc 2 660 0
+	.loc 2 709 0
 	str	r2, [r3, #4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	r2, [r4, #4]
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	fp, [r3, #2]	@ movhi
-	.loc 2 662 0
+	.loc 2 711 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 664 0
+	.loc 2 713 0
 	movs	r3, #1
-.LVL577:
+.LVL594:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL578:
-	.loc 2 665 0
+.LVL595:
+	.loc 2 714 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 667 0
-	ldr	r2, [r5, #3224]
+	.loc 2 716 0
+	ldr	r2, [r5, #3220]
 	adds	r2, r2, #1
-	bne	.L704
-	.loc 2 668 0
-	ldr	r1, [r5, #3228]
-	.loc 2 669 0
+	bne	.L710
+	.loc 2 717 0
+	ldr	r1, [r5, #3224]
+	.loc 2 718 0
 	adds	r6, r6, #1
-.LVL579:
-	.loc 2 668 0
-	ldr	r0, .L717+12
-	.loc 2 669 0
+.LVL596:
+	.loc 2 717 0
+	ldr	r0, .L723+12
+	.loc 2 718 0
 	uxth	r6, r6
-.LVL580:
-	.loc 2 668 0
+.LVL597:
+	.loc 2 717 0
 	bl	printk
-.LVL581:
-	.loc 2 670 0
+.LVL598:
+	.loc 2 719 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
-	.loc 2 671 0
+	.loc 2 720 0
 	ittt	ls
 	ldrhls	r3, [r5, #80]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
-	.loc 2 673 0
+	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L706
-	.loc 2 674 0
+	bls	.L712
+	.loc 2 723 0
 	mov	r2, r6
-	ldr	r1, [r5, #3228]
-	ldr	r0, .L717+16
+	ldr	r1, [r5, #3224]
+	ldr	r0, .L723+16
 	bl	printk
-.LVL582:
-.L707:
-	b	.L707
-.L706:
-	.loc 2 678 0
+.LVL599:
+.L713:
+	b	.L713
+.L712:
+	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L699
-.L716:
-	b	.L716
-.L704:
-	.loc 2 682 0
+	beq	.L705
+.L722:
+	b	.L722
+.L710:
+	.loc 2 731 0
 	cmp	r3, #1
-	beq	.L699
-	.loc 2 685 0
-	ldr	r2, [r5, #3228]
-	.loc 2 687 0
+	beq	.L705
+	.loc 2 734 0
+	ldr	r2, [r5, #3224]
+	.loc 2 736 0
 	movs	r0, #0
-	.loc 2 685 0
+	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	.loc 2 687 0
+	.loc 2 736 0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL583:
-.L718:
+.LVL600:
+.L724:
 	.align	2
-.L717:
+.L723:
 	.word	.LANCHOR0
 	.word	.LC1
-	.word	.LANCHOR0+3224
-	.word	.LC82
-	.word	.LC83
+	.word	.LANCHOR0+3220
+	.word	.LC85
+	.word	.LC86
 	.word	.LANCHOR1+258
 .LFE208:
 	.fnend
@@ -7559,164 +7662,164 @@ FtlMapWritePage:
 ftl_map_blk_gc:
 	.fnstart
 .LFB206:
-	.loc 2 537 0
+	.loc 2 586 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL584:
+.LVL601:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI87:
-.LVL585:
-	.loc 2 537 0
+.LCFI88:
+.LVL602:
+	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	r6, [r0, #12]
-.LVL586:
-	.loc 2 542 0
+.LVL603:
+	.loc 2 591 0
 	ldr	r9, [r0, #24]
-.LVL587:
-	.loc 2 545 0
+.LVL604:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL588:
-	.loc 2 547 0
+.LVL605:
+	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L731
+	ldr	r5, .L737
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L720
-	.loc 2 548 0
+	blt	.L726
+	.loc 2 597 0
 	uxth	r0, r0
 	ldrh	r8, [r6, r0, lsl #1]
-.LVL589:
-	.loc 2 549 0
+.LVL606:
+	.loc 2 598 0
 	cmp	r8, #0
-	beq	.L720
-	.loc 2 549 0 is_stmt 0 discriminator 1
+	beq	.L726
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L720
-	.loc 2 550 0 is_stmt 1
+	cbnz	r3, .L726
+	.loc 2 599 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	r3, [r6, r0, lsl #1]	@ movhi
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 552 0
+	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L721
-	.loc 2 554 0
+	bcc	.L727
+	.loc 2 603 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL590:
-.L721:
-	.loc 2 564 0 discriminator 1
-	ldr	fp, .L731+12
-	.loc 2 537 0 discriminator 1
+.LVL607:
+.L727:
+	.loc 2 613 0 discriminator 1
+	ldr	fp, .L737+12
+	.loc 2 586 0 discriminator 1
 	movs	r6, #0
-.LVL591:
-.L722:
-	.loc 2 556 0 discriminator 1
+.LVL608:
+.L728:
+	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L726
-	.loc 2 572 0
+	bhi	.L732
+	.loc 2 621 0
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL592:
-	.loc 2 573 0
+.LVL609:
+	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL593:
-.L720:
-	.loc 2 577 0
+.LVL610:
+.L726:
+	.loc 2 626 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L727
-	.loc 2 578 0
+	bcc	.L733
+	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL594:
-.L727:
-	.loc 2 580 0
+.LVL611:
+.L733:
+	.loc 2 629 0
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI88:
+.LCFI89:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL595:
-.L726:
-.LCFI89:
+.LVL612:
+.L732:
+.LCFI90:
 	uxth	r7, r6
-	.loc 2 557 0
+	.loc 2 606 0
 	ldr	r3, [r9, r7, lsl #2]
 	cmp	r8, r3, lsr #10
-	bne	.L723
-	.loc 2 558 0
+	bne	.L729
+	.loc 2 607 0
 	ldr	r3, [r5, #3804]
-	.loc 2 562 0
-	ldr	r0, .L731+4
-	.loc 2 558 0
-	str	r3, [r5, #3232]
-	.loc 2 559 0
+	.loc 2 611 0
+	ldr	r0, .L737+4
+	.loc 2 607 0
+	str	r3, [r5, #3228]
+	.loc 2 608 0
 	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3236]
-	.loc 2 560 0
+	str	r3, [r5, #3232]
+	.loc 2 609 0
 	ldr	r2, [r9, r7, lsl #2]
-	.loc 2 559 0
+	.loc 2 608 0
 	str	r3, [sp, #4]
-	.loc 2 560 0
-	str	r2, [r5, #3228]
-	.loc 2 562 0
+	.loc 2 609 0
+	str	r2, [r5, #3224]
+	.loc 2 611 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL596:
-	.loc 2 564 0
+.LVL613:
+	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L724
-	.loc 2 564 0 is_stmt 0 discriminator 1
-	mov	r2, #564
-	ldr	r1, .L731+8
+	beq	.L730
+	.loc 2 613 0 is_stmt 0 discriminator 1
+	movw	r2, #613
+	ldr	r1, .L737+8
 	mov	r0, fp
 	bl	printk
-.LVL597:
-.L724:
-	.loc 2 565 0 is_stmt 1
-	ldr	r3, [r5, #3224]
+.LVL614:
+.L730:
+	.loc 2 614 0 is_stmt 1
+	ldr	r3, [r5, #3220]
 	adds	r3, r3, #1
-	bne	.L725
-	.loc 2 566 0
+	bne	.L731
+	.loc 2 615 0
 	movs	r3, #0
 	str	r3, [r9, r7, lsl #2]
-.L723:
+.L729:
 	adds	r6, r6, #1
-	b	.L722
-.L725:
-	.loc 2 568 0
-	ldr	r2, [r5, #3232]
+	b	.L728
+.L731:
+	.loc 2 617 0
+	ldr	r2, [r5, #3228]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL598:
-	b	.L723
-.L732:
+.LVL615:
+	b	.L729
+.L738:
 	.align	2
-.L731:
+.L737:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+274
 	.word	.LC1
 .LFE206:
@@ -7732,42 +7835,42 @@ ftl_map_blk_gc:
 flush_l2p_region:
 	.fnstart
 .LFB209:
-	.loc 2 690 0
+	.loc 2 739 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL599:
+.LVL616:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI90:
-	.loc 2 693 0
+.LCFI91:
+	.loc 2 742 0
 	movs	r4, #12
-	ldr	r5, .L734
+	ldr	r5, .L740
 	muls	r4, r0, r4
-	ldr	r3, [r5, #2424]
-	.loc 2 694 0
+	ldr	r3, [r5, #2468]
+	.loc 2 743 0
 	addw	r0, r5, #3864
-.LVL600:
-	.loc 2 693 0
+.LVL617:
+	.loc 2 742 0
 	adds	r2, r3, r4
-	.loc 2 694 0
+	.loc 2 743 0
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL601:
-	.loc 2 695 0
-	ldr	r3, [r5, #2424]
-	.loc 2 697 0
+.LVL618:
+	.loc 2 744 0
+	ldr	r3, [r5, #2468]
+	.loc 2 746 0
 	movs	r0, #0
-	.loc 2 695 0
+	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 697 0
+	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
-.L735:
+.L741:
 	.align	2
-.L734:
+.L740:
 	.word	.LANCHOR0
 .LFE209:
 	.fnend
@@ -7782,151 +7885,151 @@ flush_l2p_region:
 log2phys:
 	.fnstart
 .LFB212:
-	.loc 2 753 0
+	.loc 2 802 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL602:
+.LVL619:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI91:
-	.loc 2 753 0
+.LCFI92:
+	.loc 2 802 0
 	mov	r7, r1
-	.loc 2 756 0
-	ldr	r4, .L750
-	.loc 2 753 0
+	.loc 2 805 0
+	ldr	r4, .L756
+	.loc 2 802 0
 	mov	r9, r2
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	r5, [r4, #84]
 	adds	r3, r5, #7
-	.loc 2 757 0
+	.loc 2 806 0
 	movs	r5, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 757 0
+	.loc 2 806 0
 	lsls	r5, r5, r3
-	.loc 2 759 0
-	ldr	r3, [r4, #2436]
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	r3, [r4, #2480]
+	.loc 2 806 0
 	subs	r5, r5, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	uxth	r8, r8
-.LVL603:
-	.loc 2 757 0
+.LVL620:
+	.loc 2 806 0
 	ands	r5, r5, r0
-	.loc 2 759 0
+	.loc 2 808 0
 	cmp	r0, r3
-	.loc 2 757 0
+	.loc 2 806 0
 	uxth	r5, r5
-.LVL604:
-	.loc 2 759 0
-	bcc	.L737
-	.loc 2 759 0 is_stmt 0 discriminator 1
-	movw	r2, #759
-	ldr	r1, .L750+4
-	ldr	r0, .L750+8
-.LVL605:
+.LVL621:
+	.loc 2 808 0
+	bcc	.L743
+	.loc 2 808 0 is_stmt 0 discriminator 1
+	mov	r2, #808
+	ldr	r1, .L756+4
+	ldr	r0, .L756+8
+.LVL622:
 	bl	printk
-.LVL606:
-.L737:
-	.loc 2 761 0 is_stmt 1
+.LVL623:
+.L743:
+	.loc 2 810 0 is_stmt 1
 	ldrh	r2, [r4, #114]
 	movs	r3, #0
-	.loc 2 762 0
-	ldr	r1, [r4, #2424]
+	.loc 2 811 0
+	ldr	r1, [r4, #2468]
 	mov	r10, #12
-.LVL607:
-.L738:
+.LVL624:
+.L744:
 	uxth	r6, r3
-	.loc 2 761 0 discriminator 1
+	.loc 2 810 0 discriminator 1
 	cmp	r6, r2
-	bcc	.L743
-	.loc 2 776 0
+	bcc	.L749
+	.loc 2 825 0
 	bl	select_l2p_ram_region
-.LVL608:
-	.loc 2 777 0
+.LVL625:
+	.loc 2 826 0
 	mul	r10, r10, r0
-	ldr	r3, [r4, #2424]
-	.loc 2 776 0
+	ldr	r3, [r4, #2468]
+	.loc 2 825 0
 	mov	r6, r0
-	.loc 2 777 0
+	.loc 2 826 0
 	ldrh	r1, [r3, r10]
 	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L744
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L750
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L744
-	.loc 2 778 0 is_stmt 1
+	bge	.L750
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL609:
-.L744:
-	.loc 2 781 0
+.LVL626:
+.L750:
+	.loc 2 830 0
 	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL610:
-	.loc 2 782 0
-	b	.L739
-.LVL611:
-.L743:
+.LVL627:
+	.loc 2 831 0
+	b	.L745
+.LVL628:
+.L749:
 	adds	r3, r3, #1
-	.loc 2 762 0
+	.loc 2 811 0
 	mla	r0, r10, r3, r1
-.LVL612:
+.LVL629:
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L738
-.L739:
+	bne	.L744
+.L745:
 	movs	r3, #12
-	.loc 2 764 0
+	.loc 2 813 0
 	cmp	r9, #0
-	bne	.L740
-	.loc 2 765 0
-	ldr	r2, [r4, #2424]
+	bne	.L746
+	.loc 2 814 0
+	ldr	r2, [r4, #2468]
 	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L741:
-	.loc 2 771 0
-	ldr	r2, [r4, #2424]
+.L747:
+	.loc 2 820 0
+	ldr	r2, [r4, #2468]
 	movs	r3, #12
 	mla	r6, r3, r6, r2
-.LVL613:
+.LVL630:
 	ldr	r3, [r6, #4]
 	adds	r2, r3, #1
-	beq	.L747
-	.loc 2 772 0
+	beq	.L753
+	.loc 2 821 0
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
-.L747:
-	.loc 2 783 0
+.L753:
+	.loc 2 832 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL614:
-.L740:
-	.loc 2 767 0
+.LVL631:
+.L746:
+	.loc 2 816 0
 	muls	r3, r6, r3
-	ldr	r2, [r4, #2424]
+	ldr	r2, [r4, #2468]
 	ldr	r1, [r7]
 	add	r2, r2, r3
 	ldr	r2, [r2, #8]
 	str	r1, [r2, r5, lsl #2]
-	.loc 2 768 0
-	ldr	r2, [r4, #2424]
-	.loc 2 769 0
-	strh	r8, [r4, #2428]	@ movhi
-	.loc 2 768 0
+	.loc 2 817 0
+	ldr	r2, [r4, #2468]
+	.loc 2 818 0
+	strh	r8, [r4, #2472]	@ movhi
+	.loc 2 817 0
 	add	r3, r3, r2
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L741
-.L751:
+	b	.L747
+.L757:
 	.align	2
-.L750:
+.L756:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -7943,131 +8046,131 @@ log2phys:
 FtlReUsePrevPpa:
 	.fnstart
 .LFB230:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL615:
+.LVL632:
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
-.LCFI92:
-.LVL616:
-	.loc 2 1628 0
+.LCFI93:
+.LVL633:
+	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1631 0
-	ldr	r5, .L762
-.LVL617:
-	.loc 2 1629 0
+	.loc 2 1680 0
+	ldr	r5, .L768
+.LVL634:
+	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL618:
-	.loc 2 1628 0
+.LVL635:
+	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL619:
-	.loc 2 1631 0
-	ldr	r2, [r5, #2260]
-	.loc 2 1629 0
+.LVL636:
+	.loc 2 1680 0
+	ldr	r2, [r5, #2300]
+	.loc 2 1678 0
 	mov	r7, r0
-.LVL620:
-	.loc 2 1631 0
+.LVL637:
+	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L753
-	.loc 2 1632 0
-	ldr	r4, [r5, #2272]
-	cbz	r4, .L754
-.LBB367:
-	.loc 2 1636 0
-	ldr	r1, [r5, #2252]
-	.loc 2 1644 0
+	cbnz	r3, .L759
+	.loc 2 1681 0
+	ldr	r4, [r5, #2316]
+	cbz	r4, .L760
+.LBB391:
+	.loc 2 1685 0
+	ldr	r1, [r5, #2292]
+	.loc 2 1693 0
 	mov	ip, #6
-	.loc 2 1636 0
-	ldr	r2, .L762+4
-	.loc 2 1644 0
+	.loc 2 1685 0
+	ldr	r2, .L768+4
+	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1635 0
-	ldrh	r0, [r5, #2276]
-.LVL621:
-	.loc 2 1636 0
+	.loc 2 1684 0
+	ldrh	r0, [r5, #2320]
+.LVL638:
+	.loc 2 1685 0
 	subs	r4, r4, r1
 	asrs	r4, r4, #1
 	muls	r4, r2, r4
 	uxth	r4, r4
-.LVL622:
-.L755:
-	.loc 2 1637 0 discriminator 1
+.LVL639:
+.L761:
+	.loc 2 1686 0 discriminator 1
 	uxth	r2, r3
 	cmp	r0, r2
-	bls	.L754
-	.loc 2 1638 0
+	bls	.L760
+	.loc 2 1687 0
 	cmp	r4, r7
-	bne	.L756
-	.loc 2 1639 0
+	bne	.L762
+	.loc 2 1688 0
 	mov	r1, r4
-	ldr	r0, .L762+8
-.LVL623:
+	ldr	r0, .L768+8
+.LVL640:
 	bl	List_remove_node
-.LVL624:
-	ldrh	r3, [r5, #2276]
-	cbnz	r3, .L757
-	.loc 2 1639 0 is_stmt 0 discriminator 1
-	movw	r2, #1639
-	ldr	r1, .L762+12
-	ldr	r0, .L762+16
+.LVL641:
+	ldrh	r3, [r5, #2320]
+	cbnz	r3, .L763
+	.loc 2 1688 0 is_stmt 0 discriminator 1
+	mov	r2, #1688
+	ldr	r1, .L768+12
+	ldr	r0, .L768+16
 	bl	printk
-.LVL625:
-.L757:
-	.loc 2 1639 0 discriminator 3
-	ldrh	r3, [r5, #2276]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+.LVL642:
+.L763:
+	.loc 2 1688 0 discriminator 3
+	ldrh	r3, [r5, #2320]
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1639 0 discriminator 3
+	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
-	strh	r3, [r5, #2276]	@ movhi
-	.loc 2 1640 0 discriminator 3
+	strh	r3, [r5, #2320]	@ movhi
+	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL626:
-	.loc 2 1641 0 discriminator 3
-	ldr	r2, [r5, #2260]
+.LVL643:
+	.loc 2 1690 0 discriminator 3
+	ldr	r2, [r5, #2300]
 	ldrh	r3, [r2, r7, lsl #1]
-.L753:
-.LBE367:
-	.loc 2 1650 0
+.L759:
+.LBE391:
+	.loc 2 1699 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L754
-.LVL627:
-.L756:
-.LBB368:
-	.loc 2 1644 0
+	b	.L760
+.LVL644:
+.L762:
+.LBB392:
+	.loc 2 1693 0
 	mul	r4, ip, r4
-.LVL628:
+.LVL645:
 	adds	r3, r3, #1
 	ldrh	r4, [r1, r4]
-.LVL629:
+.LVL646:
 	cmp	r4, lr
-	bne	.L755
-.L754:
-.LBE368:
-	.loc 2 1652 0
+	bne	.L761
+.L760:
+.LBE392:
+	.loc 2 1701 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
-.LVL630:
+.LVL647:
 	bl	log2phys
-.LVL631:
-	.loc 2 1653 0
+.LVL648:
+	.loc 2 1702 0
 	add	sp, sp, #12
-.LCFI93:
+.LCFI94:
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL632:
-.L763:
+.LVL649:
+.L769:
 	.align	2
-.L762:
+.L768:
 	.word	.LANCHOR0
 	.word	-1431655765
-	.word	.LANCHOR0+2272
+	.word	.LANCHOR0+2316
 	.word	.LANCHOR1+298
 	.word	.LC1
 .LFE230:
@@ -8083,101 +8186,101 @@ FtlReUsePrevPpa:
 ftl_scan_all_data:
 	.fnstart
 .LFB241:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI94:
-	.loc 2 2281 0
+.LCFI95:
+	.loc 2 2331 0
 	movs	r5, #0
-.LVL633:
-	ldr	r6, .L778
-	.loc 2 2275 0
+.LVL650:
+	ldr	r6, .L784
+	.loc 2 2325 0
 	.pad #32
 	sub	sp, sp, #32
-.LCFI95:
-	.loc 2 2280 0
+.LCFI96:
+	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2284 0
-	ldr	r8, .L778+16
+	.loc 2 2334 0
+	ldr	r8, .L784+16
 	mov	r4, r6
-	.loc 2 2280 0
-	ldr	r0, .L778+4
+	.loc 2 2330 0
+	ldr	r0, .L784+4
 	bl	printk
-.LVL634:
-.L765:
-	.loc 2 2281 0 discriminator 1
-	ldr	r3, [r6, #2436]
+.LVL651:
+.L771:
+	.loc 2 2331 0 discriminator 1
+	ldr	r3, [r6, #2480]
 	cmp	r5, r3
-	bcc	.L771
-	.loc 2 2303 0
+	bcc	.L777
+	.loc 2 2353 0
 	add	sp, sp, #32
-.LCFI96:
+.LCFI97:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL635:
-.L771:
-.LCFI97:
-	.loc 2 2282 0
+.LVL652:
+.L777:
+.LCFI98:
+	.loc 2 2332 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL636:
-	.loc 2 2283 0
+.LVL653:
+	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L766
-	.loc 2 2284 0
+	cbnz	r3, .L772
+	.loc 2 2334 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printk
-.LVL637:
-.L766:
-	.loc 2 2285 0
+.LVL654:
+.L772:
+	.loc 2 2335 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L768
-	.loc 2 2286 0
-	str	r3, [r4, #3228]
-	.loc 2 2290 0
+	beq	.L774
+	.loc 2 2336 0
+	str	r3, [r4, #3224]
+	.loc 2 2340 0
 	movs	r2, #0
-	.loc 2 2288 0
-	ldr	r3, [r4, #2244]
-	.loc 2 2292 0
+	.loc 2 2338 0
+	ldr	r3, [r4, #3240]
+	.loc 2 2342 0
 	movs	r1, #1
-	.loc 2 2289 0
+	.loc 2 2339 0
 	ldr	r7, [r4, #3244]
-	.loc 2 2292 0
-	ldr	r0, .L778+8
-	.loc 2 2288 0
-	str	r3, [r4, #3232]
-	.loc 2 2287 0
-	str	r5, [r4, #3240]
-	.loc 2 2289 0
-	str	r7, [r4, #3236]
-	.loc 2 2290 0
-	str	r2, [r4, #3224]
-	.loc 2 2292 0
+	.loc 2 2342 0
+	ldr	r0, .L784+8
+	.loc 2 2338 0
+	str	r3, [r4, #3228]
+	.loc 2 2337 0
+	str	r5, [r4, #3236]
+	.loc 2 2339 0
+	str	r7, [r4, #3232]
+	.loc 2 2340 0
+	str	r2, [r4, #3220]
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL638:
-	.loc 2 2293 0
-	ldr	r3, [r4, #3224]
+.LVL655:
+	.loc 2 2343 0
+	ldr	r3, [r4, #3220]
 	cmp	r3, #256
-	beq	.L769
-	.loc 2 2293 0 is_stmt 0 discriminator 1
+	beq	.L775
+	.loc 2 2343 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
-	beq	.L769
-	.loc 2 2294 0 is_stmt 1
+	beq	.L775
+	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L768
-.L769:
-	.loc 2 2297 0
-	ldr	r2, [r4, #3232]
-	ldr	r3, [r4, #3236]
-	ldr	r0, .L778+12
+	beq	.L774
+.L775:
+	.loc 2 2347 0
+	ldr	r2, [r4, #3228]
+	ldr	r3, [r4, #3232]
+	ldr	r0, .L784+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8190,21 +8293,21 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3228]
+	ldr	r2, [r4, #3224]
 	bl	printk
-.LVL639:
-.L768:
-	.loc 2 2281 0 discriminator 2
+.LVL656:
+.L774:
+	.loc 2 2331 0 discriminator 2
 	adds	r5, r5, #1
-	b	.L765
-.L779:
+	b	.L771
+.L785:
 	.align	2
-.L778:
+.L784:
 	.word	.LANCHOR0
-	.word	.LC84
-	.word	.LANCHOR0+3224
-	.word	.LC86
-	.word	.LC85
+	.word	.LC87
+	.word	.LANCHOR0+3220
+	.word	.LC89
+	.word	.LC88
 .LFE241:
 	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8222,57 +8325,57 @@ FtlReadRefresh:
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 425 0
-	ldr	r3, .L793
+	ldr	r3, .L799
 	.loc 5 419 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI98:
+.LCFI99:
 	.pad #88
 	sub	sp, sp, #88
-.LCFI99:
+.LCFI100:
 	mov	r4, r3
 	.loc 5 425 0
-	ldr	r0, [r3, #2696]
+	ldr	r0, [r3, #2692]
 	cmp	r0, #0
-	beq	.L781
+	beq	.L787
 	.loc 5 426 0
-	ldr	r1, [r3, #2700]
-	ldr	r2, [r3, #2436]
+	ldr	r1, [r3, #2696]
+	ldr	r2, [r3, #2480]
 	cmp	r1, r2
-	bcs	.L782
+	bcs	.L788
 	mov	r5, #2048
-.LVL640:
-.L787:
-.LBB374:
-.LBB375:
+.LVL657:
+.L793:
+.LBB398:
+.LBB399:
 	.loc 5 428 0
-	ldr	r0, [r4, #2700]
-	ldr	r3, [r4, #2436]
+	ldr	r0, [r4, #2696]
+	ldr	r3, [r4, #2480]
 	cmp	r0, r3
-	bcs	.L784
+	bcs	.L790
 	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL641:
+.LVL658:
 	.loc 5 432 0
 	ldr	r2, [sp]
 	.loc 5 431 0
-	ldr	r3, [r4, #2700]
+	ldr	r3, [r4, #2696]
 	.loc 5 432 0
 	adds	r1, r2, #1
 	.loc 5 431 0
 	add	r3, r3, #1
-	str	r3, [r4, #2700]
+	str	r3, [r4, #2696]
 	.loc 5 432 0
-	beq	.L785
-.LBB376:
+	beq	.L791
+.LBB400:
 	.loc 5 435 0
 	str	r3, [sp, #20]
 	.loc 5 438 0
 	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L793+4
+	ldr	r3, .L799+4
 	.loc 5 439 0
 	movs	r1, #1
 	.loc 5 434 0
@@ -8287,92 +8390,92 @@ FtlReadRefresh:
 	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL642:
+.LVL659:
 	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L784
+	bne	.L790
 	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL643:
+.LVL660:
 	bl	FtlGcRefreshBlock
-.LVL644:
-.L784:
-.LBE376:
+.LVL661:
+.L790:
+.LBE400:
 	mov	r0, #-1
-.L780:
-.LBE375:
-.LBE374:
+.L786:
+.LBE399:
+.LBE398:
 	.loc 5 466 0
 	add	sp, sp, #88
-.LCFI100:
+.LCFI101:
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L785:
-.LCFI101:
-.LBB378:
-.LBB377:
+.L791:
+.LCFI102:
+.LBB402:
+.LBB401:
 	.loc 5 427 0
 	subs	r5, r5, #1
-	bne	.L787
-	b	.L784
-.LVL645:
-.L782:
-.LBE377:
-.LBE378:
+	bne	.L793
+	b	.L790
+.LVL662:
+.L788:
+.LBE401:
+.LBE402:
 	.loc 5 451 0
-	ldr	r2, [r3, #2440]
+	ldr	r2, [r3, #2484]
 	.loc 5 449 0
 	movs	r0, #0
-	str	r0, [r3, #2696]
+	str	r0, [r3, #2692]
 	.loc 5 450 0
-	str	r0, [r3, #2700]
+	str	r0, [r3, #2696]
 	.loc 5 451 0
-	str	r2, [r3, #2692]
-	b	.L780
-.L781:
-.LBB379:
+	str	r2, [r3, #2688]
+	b	.L786
+.L787:
+.LBB403:
 	.loc 5 456 0
-	ldr	r1, [r3, #2440]
-	ldr	r6, [r3, #2692]
+	ldr	r1, [r3, #2484]
+	ldr	r6, [r3, #2688]
 	add	r2, r1, #1048576
 	cmp	r6, r2
-	bhi	.L790
+	bhi	.L796
 	.loc 5 454 0
-	ldr	r2, [r3, #2496]
+	ldr	r2, [r3, #2540]
 	lsrs	r5, r2, #10
 	mov	r2, #33554432
 	asrs	r2, r2, r5
-.LVL646:
+.LVL663:
 	.loc 5 457 0
 	add	r2, r2, r6
-.LVL647:
+.LVL664:
 	cmp	r1, r2
-	bhi	.L790
+	bhi	.L796
 	.loc 5 458 0
-	ldrb	r3, [r3, #2532]	@ zero_extendqisi2
+	ldrb	r3, [r3, #2272]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L780
-.L790:
+	bne	.L786
+.L796:
 	.loc 5 460 0
 	movs	r3, #1
 	.loc 5 461 0
 	movs	r0, #0
 	.loc 5 460 0
-	str	r3, [r4, #2696]
+	str	r3, [r4, #2692]
 	.loc 5 461 0
-	str	r0, [r4, #2700]
+	str	r0, [r4, #2696]
 	.loc 5 462 0
-	str	r1, [r4, #2692]
-	b	.L780
-.L794:
+	str	r1, [r4, #2688]
+	b	.L786
+.L800:
 	.align	2
-.L793:
+.L799:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LBE379:
+.LBE403:
 .LFE268:
 	.fnend
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -8386,187 +8489,187 @@ FtlReadRefresh:
 ftl_check_vpc:
 	.fnstart
 .LFB240:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI102:
-	.loc 2 2232 0
+.LCFI103:
+	.loc 2 2282 0
 	movs	r4, #0
-.LVL648:
-	ldr	r6, .L819
-	.loc 2 2238 0
-	ldr	r7, .L819+4
-	.loc 2 2229 0
-	ldr	r1, .L819+8
+.LVL665:
+	ldr	r6, .L825
+	.loc 2 2288 0
+	ldr	r7, .L825+4
+	.loc 2 2279 0
+	ldr	r1, .L825+8
 	mov	r5, r6
-	ldr	r0, .L819+12
+	ldr	r0, .L825+12
 	bl	printk
-.LVL649:
-.LBB386:
-.LBB387:
-.LBB388:
+.LVL666:
+.LBB410:
+.LBB411:
+.LBB412:
 	.loc 1 202 0
 	mov	r1, #8192
-	ldr	r0, .L819+4
+	ldr	r0, .L825+4
 	bl	__memzero
-.LVL650:
-.L796:
-.LBE388:
-.LBE387:
-.LBE386:
-	.loc 2 2232 0 discriminator 1
-	ldr	r3, [r6, #2436]
+.LVL667:
+.L802:
+.LBE412:
+.LBE411:
+.LBE410:
+	.loc 2 2282 0 discriminator 1
+	ldr	r3, [r6, #2480]
 	cmp	r4, r3
-	bcc	.L798
-	.loc 2 2245 0 discriminator 1
-	ldr	r8, .L819+4
+	bcc	.L804
+	.loc 2 2295 0 discriminator 1
+	ldr	r8, .L825+4
 	movs	r4, #0
-.LVL651:
-	.loc 2 2247 0 discriminator 1
-	ldr	r10, .L819+24
+.LVL668:
+	.loc 2 2297 0 discriminator 1
+	ldr	r10, .L825+24
 	mov	r7, r4
-.LVL652:
-	.loc 2 2245 0 discriminator 1
+.LVL669:
+	.loc 2 2295 0 discriminator 1
 	movw	r9, #65535
-.L799:
-	.loc 2 2243 0 discriminator 1
+.L805:
+	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r5, #16]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L801
-	.loc 2 2255 0
-	ldr	r4, [r5, #2272]
-	cbz	r4, .L802
-.LBB389:
-	.loc 2 2258 0
-	ldr	r3, [r5, #2252]
-	.loc 2 2259 0
+	bhi	.L807
+	.loc 2 2305 0
+	ldr	r4, [r5, #2316]
+	cbz	r4, .L808
+.LBB413:
+	.loc 2 2308 0
+	ldr	r3, [r5, #2292]
+	.loc 2 2309 0
 	movs	r6, #0
-	.loc 2 2257 0
-	ldrh	r8, [r5, #2276]
-.LVL653:
-	.loc 2 2266 0
+	.loc 2 2307 0
+	ldrh	r8, [r5, #2320]
+.LVL670:
+	.loc 2 2316 0
 	mov	fp, #6
-	.loc 2 2263 0
-	ldr	r9, .L819+4
-	.loc 2 2258 0
+	.loc 2 2313 0
+	ldr	r9, .L825+4
+	.loc 2 2308 0
 	subs	r4, r4, r3
-	ldr	r3, .L819+16
+	ldr	r3, .L825+16
 	asrs	r4, r4, #1
-	.loc 2 2263 0
-	ldr	r10, .L819+28
-	.loc 2 2258 0
+	.loc 2 2313 0
+	ldr	r10, .L825+28
+	.loc 2 2308 0
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L803:
-	.loc 2 2259 0 discriminator 1
+.L809:
+	.loc 2 2309 0 discriminator 1
 	uxth	r3, r6
 	cmp	r8, r3
-	bls	.L802
-	.loc 2 2261 0
-	ldr	r3, [r5, #2260]
+	bls	.L808
+	.loc 2 2311 0
+	ldr	r3, [r5, #2300]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L804
-	.loc 2 2264 0
+	cbz	r2, .L810
+	.loc 2 2314 0
 	movs	r7, #1
-	.loc 2 2263 0
+	.loc 2 2313 0
 	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
 	bl	printk
-.LVL654:
-.L804:
-	.loc 2 2266 0
+.LVL671:
+.L810:
+	.loc 2 2316 0
 	mul	r4, fp, r4
-	ldr	r3, [r5, #2252]
+	ldr	r3, [r5, #2292]
 	adds	r6, r6, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L803
-.L802:
-.LBE389:
-	.loc 2 2271 0
-	cbz	r7, .L795
-	.loc 2 2271 0 is_stmt 0 discriminator 1
-	movw	r2, #2271
-	ldr	r1, .L819+8
-	ldr	r0, .L819+20
+	bne	.L809
+.L808:
+.LBE413:
+	.loc 2 2321 0
+	cbz	r7, .L801
+	.loc 2 2321 0 is_stmt 0 discriminator 1
+	movw	r2, #2321
+	ldr	r1, .L825+8
+	ldr	r0, .L825+20
 	bl	printk
-.LVL655:
-.L795:
-	.loc 2 2272 0 is_stmt 1
+.LVL672:
+.L801:
+	.loc 2 2322 0 is_stmt 1
 	add	sp, sp, #12
-.LCFI103:
+.LCFI104:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL656:
-.L798:
-.LCFI104:
-	.loc 2 2234 0
+.LVL673:
+.L804:
+.LCFI105:
+	.loc 2 2284 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL657:
-	.loc 2 2235 0
+.LVL674:
+	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L797
-	.loc 2 2237 0
+	beq	.L803
+	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL658:
-	.loc 2 2238 0
+.LVL675:
+	.loc 2 2288 0
 	ldrh	r3, [r7, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L797:
-	.loc 2 2232 0 discriminator 2
+.L803:
+	.loc 2 2282 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L796
-.LVL659:
-.L801:
-	.loc 2 2245 0
-	ldr	r3, [r5, #2260]
+	b	.L802
+.LVL676:
+.L807:
+	.loc 2 2295 0
+	ldr	r3, [r5, #2300]
 	uxth	r6, r4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L800
-	.loc 2 2247 0
+	beq	.L806
+	.loc 2 2297 0
 	mov	r1, r6
 	mov	r0, r10
 	bl	printk
-.LVL660:
-	.loc 2 2248 0
-	ldr	r3, [r5, #2260]
+.LVL677:
+	.loc 2 2298 0
+	ldr	r3, [r5, #2300]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r9
-	beq	.L800
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L806
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r6, lsl #1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r7, #1
-.L800:
+.L806:
 	adds	r4, r4, #1
-	b	.L799
-.L820:
+	b	.L805
+.L826:
 	.align	2
-.L819:
+.L825:
 	.word	.LANCHOR0
 	.word	check_vpc_table
 	.word	.LANCHOR1+314
-	.word	.LC87
+	.word	.LC90
 	.word	-1431655765
 	.word	.LC1
-	.word	.LC88
-	.word	.LC89
+	.word	.LC91
+	.word	.LC92
 .LFE240:
 	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -8580,82 +8683,82 @@ ftl_check_vpc:
 FtlMapBlkWriteDump_data:
 	.fnstart
 .LFB217:
-	.loc 2 897 0
+	.loc 2 946 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL661:
+.LVL678:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI105:
-	.loc 2 897 0
+.LCFI106:
+	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 903 0
+	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	cbz	r3, .L821
-	.loc 2 899 0
+	cbz	r3, .L827
+	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 905 0
+	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 907 0
-	ldr	r4, .L825
-	.loc 2 900 0
+	.loc 2 956 0
+	ldr	r4, .L831
+	.loc 2 949 0
 	ldr	r2, [r0, #24]
-.LVL662:
-	.loc 2 905 0
+.LVL679:
+	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 899 0
+	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 907 0
+	.loc 2 956 0
 	ldr	r0, [r4, #3804]
-	.loc 2 930 0
+	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 908 0
+	.loc 2 957 0
 	ldr	r1, [r4, #3244]
-	.loc 2 907 0
-	str	r0, [r4, #3232]
-	.loc 2 908 0
-	str	r1, [r4, #3236]
-	.loc 2 930 0
+	.loc 2 956 0
+	str	r0, [r4, #3228]
+	.loc 2 957 0
+	str	r1, [r4, #3232]
+	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL663:
-	.loc 2 931 0
-	str	r2, [r4, #3228]
-	.loc 2 932 0
-	cbz	r2, .L823
-	.loc 2 934 0
+.LVL680:
+	.loc 2 980 0
+	str	r2, [r4, #3224]
+	.loc 2 981 0
+	cbz	r2, .L829
+	.loc 2 983 0
 	movs	r2, #1
-.LVL664:
-	addw	r0, r4, #3224
+.LVL681:
+	addw	r0, r4, #3220
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL665:
-.L824:
-	.loc 2 941 0
-	ldr	r2, [r4, #3232]
+.LVL682:
+.L830:
+	.loc 2 990 0
+	ldr	r2, [r4, #3228]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 943 0
+	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
-.LCFI106:
-.LVL666:
-	.loc 2 941 0
-	b	FtlMapWritePage
-.LVL667:
-.L823:
 .LCFI107:
-	.loc 2 938 0
+.LVL683:
+	.loc 2 990 0
+	b	FtlMapWritePage
+.LVL684:
+.L829:
+.LCFI108:
+	.loc 2 987 0
 	ldrh	r2, [r4, #86]
-.LVL668:
+.LVL685:
 	movs	r1, #255
 	bl	ftl_memset
-.LVL669:
-	b	.L824
-.LVL670:
-.L821:
+.LVL686:
+	b	.L830
+.LVL687:
+.L827:
 	pop	{r4, r5, r6, pc}
-.L826:
+.L832:
 	.align	2
-.L825:
+.L831:
 	.word	.LANCHOR0
 .LFE217:
 	.fnend
@@ -8670,643 +8773,639 @@ FtlMapBlkWriteDump_data:
 FtlScanSysBlk:
 	.fnstart
 .LFB220:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI108:
-	.loc 2 1101 0
+.LCFI109:
+	.loc 2 1150 0
 	movs	r5, #0
-	ldr	r4, .L909
-	.loc 2 1095 0
+	ldr	r4, .L914
+	.loc 2 1144 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI109:
-	.loc 2 1103 0
+.LCFI110:
+	.loc 2 1152 0
 	mov	r1, r5
 	ldr	r2, [r4, #104]
 	ldr	r0, [r4, #3852]
-	.loc 2 1101 0
+	.loc 2 1150 0
 	strh	r5, [r4, #3904]	@ movhi
-	.loc 2 1102 0
+	.loc 2 1151 0
 	strh	r5, [r4, #120]	@ movhi
-	.loc 2 1103 0
+	.loc 2 1152 0
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL671:
-	.loc 2 1104 0
+.LVL688:
+	.loc 2 1153 0
 	ldr	r2, [r4, #104]
 	mov	r1, r5
 	ldr	r0, [r4, #3828]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL672:
-	.loc 2 1105 0
+.LVL689:
+	.loc 2 1154 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #3840]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL673:
-	.loc 2 1106 0
+.LVL690:
+	.loc 2 1155 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #124]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL674:
-	.loc 2 1109 0
+.LVL691:
+	.loc 2 1158 0
 	ldrh	r8, [r4, #16]
-.LVL675:
-.LBB395:
-.LBB396:
-.LBB397:
+.LVL692:
+.LBB419:
+.LBB420:
+.LBB421:
 	.loc 1 202 0
 	mov	r3, #-1
+	str	r3, [r4, #2552]
 	str	r3, [r4, #2556]
 	str	r3, [r4, #2560]
-	str	r3, [r4, #2564]
-.LVL676:
-.L828:
-.LBE397:
-.LBE396:
-.LBE395:
-	.loc 2 1109 0 discriminator 1
+.LVL693:
+.L834:
+.LBE421:
+.LBE420:
+.LBE419:
+	.loc 2 1158 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r8
-	bls	.L870
-	.loc 2 1120 0 discriminator 1
+	bls	.L876
+	.loc 2 1169 0 discriminator 1
 	movs	r5, #0
-	.loc 2 1113 0 discriminator 1
+	.loc 2 1162 0 discriminator 1
 	ldrh	fp, [r4, #8]
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
 	ldr	r9, [r4, #3792]
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	r7, r5
-	.loc 2 1119 0 discriminator 1
-	ldr	r3, [r4, #3152]
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	ldr	r3, [r4, #3148]
+	.loc 2 1167 0 discriminator 1
 	mov	r10, #20
-	.loc 2 1120 0 discriminator 1
-	ldr	r2, [r4, #3156]
+	.loc 2 1169 0 discriminator 1
+	ldr	r2, [r4, #3152]
 	ldrh	r6, [r4, #88]
-.LVL677:
-	b	.L871
-.L831:
+.LVL694:
+	b	.L877
+.L837:
 	str	r3, [sp, #8]
-	.loc 2 1115 0
+	.loc 2 1164 0
 	mov	r1, r8
-	ldr	r3, .L909+4
+	ldr	r3, .L914+4
 	str	r2, [sp, #12]
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL678:
+.LVL695:
 	str	r0, [sp, #4]
-	.loc 2 1116 0
+	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL679:
+.LVL696:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L829
-	.loc 2 1118 0
+	cbnz	r0, .L835
+	.loc 2 1167 0
 	ldr	r1, [sp, #4]
 	mla	r0, r10, r7, r9
 	lsls	r1, r1, #10
-	.loc 2 1119 0
+	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1118 0
+	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mov	r1, r6
 	muls	r1, r7, r1
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	r7, r7, #1
-.LVL680:
-	.loc 2 1120 0
+.LVL697:
+	.loc 2 1169 0
 	it	mi
 	addmi	r1, r1, #3
-	.loc 2 1121 0
+	.loc 2 1170 0
 	uxth	r7, r7
-.LVL681:
-	.loc 2 1120 0
+.LVL698:
+	.loc 2 1169 0
 	bic	r1, r1, #3
 	add	r1, r1, r2
 	str	r1, [r0, #12]
-.L829:
+.L835:
 	adds	r5, r5, #1
-.L871:
-	.loc 2 1113 0 discriminator 1
+.L877:
+	.loc 2 1162 0 discriminator 1
 	uxth	r1, r5
 	cmp	fp, r1
-	bhi	.L831
-	.loc 2 1124 0
-	cbnz	r7, .L832
-.LVL682:
-.L869:
-	.loc 2 1109 0
+	bhi	.L837
+	.loc 2 1173 0
+	cbnz	r7, .L838
+.LVL699:
+.L875:
+	.loc 2 1158 0
 	add	r8, r8, #1
-.LVL683:
+.LVL700:
 	uxth	r8, r8
-.LVL684:
-	b	.L828
-.LVL685:
-.L832:
-	.loc 2 1127 0
+.LVL701:
+	b	.L834
+.LVL702:
+.L838:
+	.loc 2 1176 0
 	mov	r0, r9
-	.loc 2 1128 0
+	.loc 2 1177 0
 	mov	r9, #0
-	.loc 2 1127 0
+	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, r7
 	bl	FlashReadPages
-.LVL686:
-.L833:
-	.loc 2 1128 0 discriminator 1
+.LVL703:
+.L839:
+	.loc 2 1177 0 discriminator 1
 	uxth	r3, r9
 	cmp	r7, r3
-	bls	.L869
+	bls	.L875
 	movs	r3, #20
 	mul	r10, r3, r9
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	r3, [r4, #3792]
 	add	r2, r3, r10
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	r3, [r3, r10]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-	.loc 2 1132 0
-	bne	.L836
+	.loc 2 1181 0
+	bne	.L842
 	mov	fp, #16
-	.loc 2 1136 0
+	.loc 2 1185 0
 	movw	r3, #65535
-.L838:
-	.loc 2 1134 0
+.L844:
+	.loc 2 1183 0
 	ldr	r0, [r4, #3792]
 	str	r3, [sp, #4]
 	add	r0, r0, r10
 	ldr	r2, [r0, #4]
 	adds	r2, r2, #1
 	str	r2, [r0, #4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL687:
-	.loc 2 1136 0
+.LVL704:
+	.loc 2 1185 0
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L835
-	.loc 2 1137 0
+	bne	.L841
+	.loc 2 1186 0
 	ldr	r3, [r4, #3792]
 	mov	r2, #-1
 	str	r2, [r3, r10]
-	.loc 2 1145 0
+	.loc 2 1194 0
 	ldr	r3, [r4, #3792]
 	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L836
-.L837:
-	.loc 2 1287 0
-	movs	r1, #1
-	b	.L908
-.L835:
-	.loc 2 1139 0
+	bne	.L842
+.L843:
+	.loc 2 1336 0
+	movs	r1, #0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL705:
+	b	.L847
+.L841:
+	.loc 2 1188 0
 	ldr	r2, [r4, #3792]
 	ldr	r2, [r2, r10]
 	adds	r2, r2, #1
-	bne	.L836
+	bne	.L842
 	add	fp, fp, #-1
 	uxth	fp, fp
-	.loc 2 1133 0 discriminator 2
+	.loc 2 1182 0 discriminator 2
 	cmp	fp, #0
-	bne	.L838
-	b	.L837
-.L836:
-	.loc 2 1147 0
-	ldr	r2, [r4, #2472]
+	bne	.L844
+	b	.L843
+.L842:
+	.loc 2 1196 0
+	ldr	r2, [r4, #2516]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L839
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L845
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L840
-.L839:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L846
+.L845:
+	.loc 2 1198 0 is_stmt 1
 	adds	r2, r3, #1
-	.loc 2 1152 0
+	.loc 2 1201 0
 	itt	ne
 	addne	r2, r3, #1
-	strne	r2, [r4, #2472]
-.L840:
-	.loc 2 1157 0
+	strne	r2, [r4, #2516]
+.L846:
+	.loc 2 1206 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L842
-	bhi	.L843
+	beq	.L848
+	bhi	.L849
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L844
-.L841:
+	beq	.L850
+.L847:
 	add	r9, r9, #1
-	b	.L833
-.L843:
+	b	.L839
+.L849:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L845
+	beq	.L851
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L841
-	.loc 2 1280 0
-	movs	r1, #0
-.L908:
-	.loc 2 1287 0
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-.LVL688:
-	b	.L841
-.L845:
-	.loc 2 1162 0
+	beq	.L843
+	b	.L847
+.L851:
+	.loc 2 1211 0
 	ldrh	r2, [r4, #3904]
 	ldr	r3, [r4, #104]
 	cmp	r2, r3
-	bls	.L847
-	.loc 2 1162 0 is_stmt 0 discriminator 1
-	movw	r2, #1162
-	ldr	r1, .L909+8
-	ldr	r0, .L909+12
+	bls	.L853
+	.loc 2 1211 0 is_stmt 0 discriminator 1
+	movw	r2, #1211
+	ldr	r1, .L914+8
+	ldr	r0, .L914+12
 	bl	printk
-.LVL689:
-.L847:
-	.loc 2 1163 0 is_stmt 1
+.LVL706:
+.L853:
+	.loc 2 1212 0 is_stmt 1
 	ldr	r1, [r4, #104]
 	ldrh	r0, [r4, #3904]
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	r10, [r4, #3852]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	uxth	ip, r1
 	add	r3, ip, #-1
 	sub	ip, ip, r0
 	add	ip, ip, #-1
 	sxth	r3, r3
 	sxth	ip, ip
-.L848:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L854:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	r3, ip
-	bgt	.L854
-	.loc 2 1186 0 is_stmt 1
+	bgt	.L860
+	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L886
-	b	.L841
-.L854:
-	.loc 2 1165 0
+	bge	.L892
+	b	.L847
+.L860:
+	.loc 2 1214 0
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	mov	lr, r2
 	ldr	r2, [r10, r3, lsl #2]
 	cmp	lr, r2
-	bls	.L849
-	.loc 2 1167 0
+	bls	.L855
+	.loc 2 1216 0
 	ldr	r2, [r10]
-	cbnz	r2, .L850
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L856
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	.loc 2 1172 0 is_stmt 1 discriminator 1
+	.loc 2 1221 0 is_stmt 1 discriminator 1
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #3904]	@ movhi
-.L850:
-	.loc 2 1175 0 discriminator 1
+.L856:
+	.loc 2 1224 0 discriminator 1
 	uxth	ip, r3
 	movs	r2, #0
-.L851:
+.L857:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L852
-	.loc 2 1180 0
+	bhi	.L858
+	.loc 2 1229 0
 	ldr	r2, [r4, #3852]
-	.loc 2 1186 0
+	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1180 0
+	.loc 2 1229 0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
-	.loc 2 1181 0
+	.loc 2 1230 0
 	ldr	r2, [r4, #3828]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	.loc 2 1186 0
-	blt	.L841
-	.loc 2 1193 0
+	.loc 2 1235 0
+	blt	.L847
+	.loc 2 1242 0
 	ldrh	r0, [r4, #3904]
 	ldr	r2, [r4, #104]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L841
-.L886:
-	.loc 2 1196 0
+	bgt	.L847
+.L892:
+	.loc 2 1245 0
 	ldr	r2, [r4, #3852]
-	.loc 2 1195 0
+	.loc 2 1244 0
 	adds	r0, r0, #1
-	.loc 2 1196 0
+	.loc 2 1245 0
 	ldr	r1, [r6, #4]
-	.loc 2 1195 0
+	.loc 2 1244 0
 	strh	r0, [r4, #3904]	@ movhi
-	.loc 2 1196 0
+	.loc 2 1245 0
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1197 0
+	.loc 2 1246 0
 	ldr	r2, [r4, #3828]
-.L906:
-	.loc 2 1241 0
+.L912:
+	.loc 2 1290 0
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L841
-.L852:
-	.loc 2 1177 0 discriminator 3
+	b	.L847
+.L858:
+	.loc 2 1226 0 discriminator 3
 	ldr	r0, [r4, #3852]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r1, lsl #2]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	ldr	r0, [r4, #3828]
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L851
-.L849:
+	b	.L857
+.L855:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L848
-.L910:
+	b	.L854
+.L915:
 	.align	2
-.L909:
+.L914:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+36
 	.word	.LANCHOR1+328
 	.word	.LC1
-.L844:
-	.loc 2 1203 0
+.L850:
+	.loc 2 1252 0
 	ldrh	r2, [r4, #120]
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bls	.L857
-	.loc 2 1203 0 is_stmt 0 discriminator 1
-	movw	r2, #1203
-	ldr	r1, .L911
-	ldr	r0, .L911+4
+	bls	.L863
+	.loc 2 1252 0 is_stmt 0 discriminator 1
+	movw	r2, #1252
+	ldr	r1, .L916
+	ldr	r0, .L916+4
 	bl	printk
-.LVL690:
-.L857:
-	.loc 2 1204 0 is_stmt 1
+.LVL707:
+.L863:
+	.loc 2 1253 0 is_stmt 1
 	ldrh	lr, [r4, #96]
 	ldrh	r0, [r4, #120]
-	.loc 2 1206 0
+	.loc 2 1255 0
 	ldr	r10, [r4, #3840]
-	.loc 2 1204 0
+	.loc 2 1253 0
 	add	ip, lr, #-1
 	sxth	r3, ip
 	sub	ip, ip, r0
-.L858:
-	.loc 2 1204 0 is_stmt 0 discriminator 1
+.L864:
+	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	r3, ip
-	ble	.L863
-	.loc 2 1206 0 is_stmt 1
+	ble	.L869
+	.loc 2 1255 0 is_stmt 1
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	ldr	r1, [r10, r3, lsl #2]
 	cmp	r2, r1
-	bls	.L859
-	.loc 2 1208 0
+	bls	.L865
+	.loc 2 1257 0
 	ldr	r2, [r10]
-	cbnz	r2, .L860
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L866
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	lr, r0
-	.loc 2 1216 0 is_stmt 1 discriminator 1
+	.loc 2 1265 0 is_stmt 1 discriminator 1
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #120]	@ movhi
-.L860:
-	.loc 2 1218 0 discriminator 1
+.L866:
+	.loc 2 1267 0 discriminator 1
 	uxth	ip, r3
 	movs	r2, #0
-.L861:
+.L867:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L862
-	.loc 2 1223 0
+	bhi	.L868
+	.loc 2 1272 0
 	ldr	r2, [r4, #3840]
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	ldr	r2, [r4, #124]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L863:
-	.loc 2 1229 0
+.L869:
+	.loc 2 1278 0
 	cmp	r3, #0
-	blt	.L841
-	.loc 2 1237 0
+	blt	.L847
+	.loc 2 1286 0
 	ldrh	r2, [r4, #96]
 	ldrh	r1, [r4, #120]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L841
-	.loc 2 1239 0
+	bgt	.L847
+	.loc 2 1288 0
 	adds	r1, r1, #1
-	.loc 2 1240 0
+	.loc 2 1289 0
 	ldr	r2, [r4, #3840]
-	.loc 2 1239 0
+	.loc 2 1288 0
 	strh	r1, [r4, #120]	@ movhi
-	.loc 2 1240 0
+	.loc 2 1289 0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1241 0
+	.loc 2 1290 0
 	ldr	r2, [r4, #124]
-	b	.L906
-.L862:
-	.loc 2 1220 0 discriminator 3
+	b	.L912
+.L868:
+	.loc 2 1269 0 discriminator 3
 	ldr	r0, [r4, #3840]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r1, lsl #2]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	ldr	r0, [r4, #124]
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L861
-.L859:
+	b	.L867
+.L865:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L858
-.L842:
-	.loc 2 1248 0
-	ldrh	r1, [r4, #2556]
+	b	.L864
+.L848:
+	.loc 2 1297 0
+	ldrh	r1, [r4, #2552]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L865
-	.loc 2 1250 0
-	strh	r5, [r4, #2556]	@ movhi
-.L907:
-	.loc 2 1261 0
-	str	r3, [r4, #2564]
-	b	.L841
-.L865:
-	.loc 2 1255 0
-	ldrh	r0, [r4, #2560]
+	bne	.L871
+	.loc 2 1299 0
+	strh	r5, [r4, #2552]	@ movhi
+.L913:
+	.loc 2 1310 0
+	str	r3, [r4, #2560]
+	b	.L847
+.L871:
+	.loc 2 1304 0
+	ldrh	r0, [r4, #2556]
 	cmp	r0, r2
-	beq	.L866
-	.loc 2 1256 0
+	beq	.L872
+	.loc 2 1305 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL691:
-.L866:
-	.loc 2 1257 0
-	ldr	r2, [r4, #2564]
+.LVL708:
+.L872:
+	.loc 2 1306 0
+	ldr	r2, [r4, #2560]
 	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L867
-	.loc 2 1259 0
-	ldrh	r3, [r4, #2556]
-	.loc 2 1260 0
-	strh	r5, [r4, #2556]	@ movhi
-	.loc 2 1259 0
-	strh	r3, [r4, #2560]	@ movhi
-	.loc 2 1261 0
+	bcs	.L873
+	.loc 2 1308 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1309 0
+	strh	r5, [r4, #2552]	@ movhi
+	.loc 2 1308 0
+	strh	r3, [r4, #2556]	@ movhi
+	.loc 2 1310 0
 	ldr	r3, [r6, #4]
-	b	.L907
-.L867:
-	.loc 2 1265 0
-	strh	r5, [r4, #2560]	@ movhi
-	b	.L841
-.L870:
-	.loc 2 1292 0
+	b	.L913
+.L873:
+	.loc 2 1314 0
+	strh	r5, [r4, #2556]	@ movhi
+	b	.L847
+.L876:
+	.loc 2 1341 0
 	ldr	r1, [r4, #3828]
 	ldrh	r3, [r1]
-	cbz	r3, .L872
-.L875:
-	.loc 2 1310 0
+	cbz	r3, .L878
+.L881:
+	.loc 2 1359 0
 	ldr	r1, [r4, #124]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L873
-.L874:
-	.loc 2 1328 0
+	beq	.L879
+.L880:
+	.loc 2 1377 0
 	ldrh	r2, [r4, #3904]
 	ldr	r3, [r4, #104]
 	cmp	r2, r3
-	bls	.L905
-	.loc 2 1328 0 is_stmt 0 discriminator 1
-	mov	r2, #1328
-	ldr	r1, .L911
-	ldr	r0, .L911+4
+	bls	.L911
+	.loc 2 1377 0 is_stmt 0 discriminator 1
+	movw	r2, #1377
+	ldr	r1, .L916
+	ldr	r0, .L916+4
 	bl	printk
-.LVL692:
-.L905:
-	.loc 2 1330 0 is_stmt 1
+.LVL709:
+.L911:
+	.loc 2 1379 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #20
-.LCFI110:
+.LCFI111:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL693:
-.L872:
-.LCFI111:
-	.loc 2 1292 0 discriminator 1
+.LVL710:
+.L878:
+.LCFI112:
+	.loc 2 1341 0 discriminator 1
 	ldrh	r2, [r4, #3904]
 	cmp	r2, #0
-	beq	.L875
-	.loc 2 1294 0 discriminator 1
+	beq	.L881
+	.loc 2 1343 0 discriminator 1
 	ldr	r0, [r4, #104]
-.L876:
+.L882:
 	sxth	r2, r3
 	cmp	r2, r0
-	bcs	.L875
-	.loc 2 1296 0
+	bcs	.L881
+	.loc 2 1345 0
 	ldrh	r5, [r1, r2, lsl #1]
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L876
+	beq	.L882
 	mov	r3, r2
-	.loc 2 1302 0 discriminator 1
+	.loc 2 1351 0 discriminator 1
 	movs	r5, #0
-.L877:
-	.loc 2 1298 0 discriminator 1
+.L883:
+	.loc 2 1347 0 discriminator 1
 	ldr	r1, [r4, #104]
 	cmp	r3, r1
-	bcs	.L875
-	.loc 2 1300 0 discriminator 3
+	bcs	.L881
+	.loc 2 1349 0 discriminator 3
 	ldr	r1, [r4, #3828]
 	subs	r0, r3, r2
 	ldrh	r6, [r1, r3, lsl #1]
-.LVL694:
+.LVL711:
 	strh	r6, [r1, r0, lsl #1]	@ movhi
-	.loc 2 1301 0 discriminator 3
+	.loc 2 1350 0 discriminator 3
 	ldr	r1, [r4, #3852]
 	ldr	r6, [r1, r3, lsl #2]
 	str	r6, [r1, r0, lsl #2]
-	.loc 2 1302 0 discriminator 3
+	.loc 2 1351 0 discriminator 3
 	ldr	r1, [r4, #3828]
 	strh	r5, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L877
-.LVL695:
-.L873:
-	.loc 2 1310 0 discriminator 1
+	b	.L883
+.LVL712:
+.L879:
+	.loc 2 1359 0 discriminator 1
 	ldrh	r3, [r4, #120]
 	cmp	r3, #0
-	beq	.L874
-	.loc 2 1312 0 discriminator 1
+	beq	.L880
+	.loc 2 1361 0 discriminator 1
 	ldrh	r0, [r4, #96]
-.L882:
+.L888:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	r5, r3
-	bge	.L874
-	.loc 2 1314 0
+	bge	.L880
+	.loc 2 1363 0
 	ldrh	r6, [r1, r3, lsl #1]
-.LVL696:
+.LVL713:
 	adds	r2, r2, #1
 	cmp	r6, #0
-	beq	.L882
-	.loc 2 1320 0 discriminator 1
+	beq	.L888
+	.loc 2 1369 0 discriminator 1
 	movs	r0, #0
-.L883:
-	.loc 2 1316 0 discriminator 1
+.L889:
+	.loc 2 1365 0 discriminator 1
 	ldrh	r2, [r4, #96]
 	cmp	r3, r2
-	bge	.L874
-	.loc 2 1318 0 discriminator 3
+	bge	.L880
+	.loc 2 1367 0 discriminator 3
 	ldr	r2, [r4, #124]
 	subs	r1, r3, r5
 	ldrh	r6, [r2, r3, lsl #1]
 	strh	r6, [r2, r1, lsl #1]	@ movhi
-	.loc 2 1319 0 discriminator 3
+	.loc 2 1368 0 discriminator 3
 	ldr	r2, [r4, #3840]
 	ldr	r6, [r2, r3, lsl #2]
 	str	r6, [r2, r1, lsl #2]
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	ldr	r2, [r4, #124]
 	strh	r0, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L883
-.L912:
+	b	.L889
+.L917:
 	.align	2
-.L911:
+.L916:
 	.word	.LANCHOR1+328
 	.word	.LC1
 .LFE220:
@@ -9322,326 +9421,326 @@ FtlScanSysBlk:
 FtlMapTblRecovery:
 	.fnstart
 .LFB225:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL697:
+.LVL714:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI112:
+.LCFI113:
 	.pad #28
 	sub	sp, sp, #28
-.LCFI113:
-	.loc 2 1470 0
+.LCFI114:
+	.loc 2 1519 0
 	ldr	r3, [r0, #24]
-.LVL698:
-	.loc 2 1466 0
+.LVL715:
+	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1477 0
+	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	r10, [r0, #6]
-.LVL699:
-	.loc 2 1470 0
+.LVL716:
+	.loc 2 1519 0
 	str	r3, [sp, #4]
-	.loc 2 1472 0
+	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-.LVL700:
-	.loc 2 1478 0
-	ldr	r5, .L940
-	.loc 2 1471 0
+.LVL717:
+	.loc 2 1527 0
+	ldr	r5, .L945
+	.loc 2 1520 0
 	ldr	r9, [r0, #12]
-.LVL701:
-	.loc 2 1477 0
+.LVL718:
+	.loc 2 1526 0
 	lsl	r2, r10, #2
-	.loc 2 1472 0
+	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1474 0
+	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-.LVL702:
-	.loc 2 1477 0
+.LVL719:
+	.loc 2 1526 0
 	ldr	r0, [sp, #4]
-.LVL703:
-	.loc 2 1474 0
+.LVL720:
+	.loc 2 1523 0
 	str	r3, [sp, #8]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	bl	ftl_memset
-.LVL704:
-	.loc 2 1478 0
-	ldr	r3, [r5, #2244]
-	.loc 2 1485 0
+.LVL721:
+	.loc 2 1527 0
+	ldr	r3, [r5, #3240]
+	.loc 2 1534 0
 	movs	r2, #1
-	.loc 2 1479 0
+	.loc 2 1528 0
 	ldr	r6, [r5, #3244]
-	.loc 2 1485 0
+	.loc 2 1534 0
 	str	r2, [r4, #36]
-	.loc 2 1478 0
-	str	r3, [r5, #3232]
-	.loc 2 1481 0
+	.loc 2 1527 0
+	str	r3, [r5, #3228]
+	.loc 2 1530 0
 	movw	r3, #65535
-	.loc 2 1479 0
-	str	r6, [r5, #3236]
-	.loc 2 1481 0
+	.loc 2 1528 0
+	str	r6, [r5, #3232]
+	.loc 2 1530 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1483 0
+	.loc 2 1532 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-	.loc 2 1486 0
+	.loc 2 1535 0
 	mov	r8, r3
-	.loc 2 1484 0
+	.loc 2 1533 0
 	str	r3, [r4, #28]
-	.loc 2 1488 0
+	.loc 2 1537 0
 	ldr	r3, [sp, #8]
-.LVL705:
+.LVL722:
 	add	fp, r3, #-1
-	.loc 2 1530 0
+	.loc 2 1579 0
 	mov	r3, r5
-.LVL706:
-.L914:
-	.loc 2 1486 0 discriminator 1
+.LVL723:
+.L919:
+	.loc 2 1535 0 discriminator 1
 	ldr	r1, [sp, #8]
-.LVL707:
+.LVL724:
 	sxth	r2, r8
-.LVL708:
+.LVL725:
 	cmp	r2, r1
-	bge	.L931
-	.loc 2 1488 0
+	bge	.L936
+	.loc 2 1537 0
 	cmp	r2, fp
 	lsl	r7, r2, #1
-.LVL709:
-	bne	.L915
-	.loc 2 1490 0
+.LVL726:
+	bne	.L920
+	.loc 2 1539 0
 	ldrh	r0, [r9, fp, lsl #1]
-.LVL710:
+.LVL727:
 	movs	r1, #1
-.LVL711:
+.LVL728:
 	bl	FtlGetLastWrittenPage
-.LVL712:
-	.loc 2 1493 0
+.LVL729:
+	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-.LVL713:
-	.loc 2 1490 0
+.LVL730:
+	.loc 2 1539 0
 	add	r7, r7, r9
-	.loc 2 1492 0
+	.loc 2 1541 0
 	strh	r8, [r4]	@ movhi
-	.loc 2 1490 0
+	.loc 2 1539 0
 	sxth	r9, r0
-.LVL714:
-	.loc 2 1497 0
-	ldr	r8, .L940+4
-	.loc 2 1491 0
+.LVL731:
+	.loc 2 1546 0
+	ldr	r8, .L945+4
+	.loc 2 1540 0
 	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1494 0
+	.loc 2 1543 0
 	add	r9, r9, #1
-.LVL715:
-	.loc 2 1493 0
+.LVL732:
+	.loc 2 1542 0
 	ldr	r3, [r3, fp, lsl #2]
-.LVL716:
-	.loc 2 1494 0
+.LVL733:
+	.loc 2 1543 0
 	mov	fp, #0
-	.loc 2 1493 0
+	.loc 2 1542 0
 	str	r3, [r4, #28]
-.LVL717:
-.L916:
-	.loc 2 1494 0 discriminator 1
+.LVL734:
+.L921:
+	.loc 2 1543 0 discriminator 1
 	sxth	r2, fp
 	cmp	r2, r9
-	blt	.L918
-.LVL718:
-.L931:
-	.loc 2 1547 0
+	blt	.L923
+.LVL735:
+.L936:
+	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL719:
-	.loc 2 1548 0
+.LVL736:
+	.loc 2 1597 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bne	.L920
-	.loc 2 1550 0
+	bne	.L925
+	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL720:
-.L920:
-	.loc 2 1553 0
+.LVL737:
+.L925:
+	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL721:
-	.loc 2 1555 0
+.LVL738:
+	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL722:
-	.loc 2 1557 0
+.LVL739:
+	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #28
-.LCFI114:
+.LCFI115:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL723:
-.L918:
-.LCFI115:
-	.loc 2 1496 0
+.LVL740:
+.L923:
+.LCFI116:
+	.loc 2 1545 0
 	ldrh	r1, [r7]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	r0, r8
-	.loc 2 1496 0
+	.loc 2 1545 0
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3228]
-	.loc 2 1497 0
+	str	r2, [r5, #3224]
+	.loc 2 1546 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL724:
-	.loc 2 1500 0
-	ldr	r2, [r5, #3224]
+.LVL741:
+	.loc 2 1549 0
+	ldr	r2, [r5, #3220]
 	adds	r2, r2, #1
-	beq	.L917
-	.loc 2 1502 0
+	beq	.L922
+	.loc 2 1551 0
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L917
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L922
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r6]
 	cmp	r0, r1
-	.loc 2 1504 0 is_stmt 1 discriminator 1
+	.loc 2 1553 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r5, #3228]
+	ldreq	r1, [r5, #3224]
 	ldreq	r3, [sp, #4]
-.LVL725:
+.LVL742:
 	streq	r1, [r3, r2, lsl #2]
-.L917:
+.L922:
 	add	fp, fp, #1
-	b	.L916
-.LVL726:
-.L915:
-	.loc 2 1510 0
-	ldr	r1, [r5, #2244]
-.LVL727:
+	b	.L921
+.LVL743:
+.L920:
+	.loc 2 1559 0
+	ldr	r1, [r5, #3240]
+.LVL744:
 	str	r3, [sp, #20]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	add	r3, r9, r7
-	.loc 2 1512 0
-	ldr	r0, .L940+4
-.LVL728:
-	.loc 2 1510 0
-	str	r1, [r5, #3232]
-	.loc 2 1511 0
+	.loc 2 1561 0
+	ldr	r0, .L945+4
+.LVL745:
+	.loc 2 1559 0
+	str	r1, [r5, #3228]
+	.loc 2 1560 0
 	ldrh	r1, [r9, r2, lsl #1]
 	ldrh	r2, [r5, #80]
-.LVL729:
+.LVL746:
 	str	r3, [sp, #16]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3228]
-	.loc 2 1512 0
+	str	r2, [r5, #3224]
+	.loc 2 1561 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL730:
-	.loc 2 1515 0
-	ldr	r2, [r5, #3224]
+.LVL747:
+	.loc 2 1564 0
+	ldr	r2, [r5, #3220]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L933
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L938
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r6]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L933
-	.loc 2 1515 0 discriminator 2
+	bne	.L938
+	.loc 2 1564 0 discriminator 2
 	ldrh	r1, [r6, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L922
-.L933:
+	beq	.L927
+.L938:
 	movs	r7, #0
-.LVL731:
-.L923:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
+.LVL748:
+.L928:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldrh	r1, [r3, #80]
 	sxth	r2, r7
 	cmp	r2, r1
-	bge	.L929
-	.loc 2 1532 0
+	bge	.L934
+	.loc 2 1581 0
 	ldr	r1, [sp, #16]
-	.loc 2 1533 0
-	ldr	r0, .L940+4
-.LVL732:
-	.loc 2 1532 0
+	.loc 2 1582 0
+	ldr	r0, .L945+4
+.LVL749:
+	.loc 2 1581 0
 	str	r3, [sp, #20]
 	ldrh	r1, [r1]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #3228]
-	.loc 2 1533 0
+	str	r2, [r3, #3224]
+	.loc 2 1582 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL733:
-	.loc 2 1536 0
+.LVL750:
+	.loc 2 1585 0
 	ldr	r3, [sp, #20]
-	ldr	r2, [r3, #3224]
+	ldr	r2, [r3, #3220]
 	adds	r2, r2, #1
-	beq	.L927
-	.loc 2 1538 0
+	beq	.L932
+	.loc 2 1587 0
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L927
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L932
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	.loc 2 1540 0 is_stmt 1 discriminator 1
+	.loc 2 1589 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r3, #3228]
+	ldreq	r1, [r3, #3224]
 	ldreq	r0, [sp, #4]
-.LVL734:
+.LVL751:
 	streq	r1, [r0, r2, lsl #2]
-.L927:
+.L932:
 	adds	r7, r7, #1
-	b	.L923
-.LVL735:
-.L922:
+	b	.L928
+.LVL752:
+.L927:
 	movs	r0, #0
-	.loc 2 1523 0 discriminator 1
+	.loc 2 1572 0 discriminator 1
 	mov	ip, #4
-.LVL736:
-.L924:
-	.loc 2 1518 0 discriminator 1
+.LVL753:
+.L929:
+	.loc 2 1567 0 discriminator 1
 	ldrh	r1, [r5, #80]
 	sxth	r2, r0
 	subs	r1, r1, #1
 	cmp	r2, r1
-	blt	.L926
-.L929:
+	blt	.L931
+.L934:
 	add	r8, r8, #1
-	b	.L914
-.L926:
-	.loc 2 1520 0
-	ldr	r7, [r5, #2244]
-.LVL737:
+	b	.L919
+.L931:
+	.loc 2 1569 0
+	ldr	r7, [r5, #3240]
+.LVL754:
 	ldr	r1, [r7, r2, lsl #3]
-	.loc 2 1521 0
+	.loc 2 1570 0
 	uxth	lr, r1
 	cmp	r10, lr
-	bls	.L925
-	.loc 2 1523 0
+	bls	.L930
+	.loc 2 1572 0
 	add	r2, ip, r2, lsl #3
 	ldr	r2, [r7, r2]
 	ldr	r7, [sp, #4]
-.LVL738:
+.LVL755:
 	str	r2, [r7, lr, lsl #2]
-.L925:
+.L930:
 	adds	r0, r0, #1
-	b	.L924
-.L941:
+	b	.L929
+.L946:
 	.align	2
-.L940:
+.L945:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 .LFE225:
 	.fnend
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -9655,51 +9754,51 @@ FtlMapTblRecovery:
 FtlLoadVonderInfo:
 	.fnstart
 .LFB226:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 2 1561 0
-	ldr	r0, .L943
-	.loc 2 1560 0
+	.loc 2 1610 0
+	ldr	r0, .L948
+	.loc 2 1609 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI116:
-	.loc 2 1561 0
+.LCFI117:
+	.loc 2 1610 0
 	ldrh	r3, [r0, #96]
 	strh	r3, [r0, #3918]	@ movhi
-	.loc 2 1562 0
+	.loc 2 1611 0
 	movw	r3, #61574
 	strh	r3, [r0, #3912]	@ movhi
-	.loc 2 1563 0
+	.loc 2 1612 0
 	ldrh	r3, [r0, #120]
 	strh	r3, [r0, #3916]	@ movhi
-	.loc 2 1564 0
+	.loc 2 1613 0
 	ldrh	r3, [r0, #98]
 	strh	r3, [r0, #3914]	@ movhi
-	.loc 2 1565 0
+	.loc 2 1614 0
 	ldr	r3, [r0, #124]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	addw	r0, r0, #3908
-	.loc 2 1565 0
+	.loc 2 1614 0
 	str	r3, [r0, #12]
-	.loc 2 1566 0
+	.loc 2 1615 0
 	ldr	r3, [r0, #-68]
 	str	r3, [r0, #16]
-	.loc 2 1567 0
+	.loc 2 1616 0
 	ldr	r3, [r0, #-72]
 	str	r3, [r0, #20]
-	.loc 2 1568 0
+	.loc 2 1617 0
 	ldr	r3, [r0, #-64]
 	str	r3, [r0, #24]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL739:
-	.loc 2 1573 0
+.LVL756:
+	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L944:
+.L949:
 	.align	2
-.L943:
+.L948:
 	.word	.LANCHOR0
 .LFE226:
 	.fnend
@@ -9714,85 +9813,85 @@ FtlLoadVonderInfo:
 FtlL2PDataInit:
 	.fnstart
 .LFB227:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI117:
-	.loc 2 1578 0
+.LCFI118:
+	.loc 2 1627 0
 	movs	r1, #0
-	ldr	r4, .L948
-	.loc 2 1582 0
+	ldr	r4, .L953
+	.loc 2 1631 0
 	movs	r6, #12
-	.loc 2 1578 0
+	.loc 2 1627 0
 	ldr	r2, [r4, #104]
 	ldr	r0, [r4, #3832]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL740:
-	.loc 2 1579 0
+.LVL757:
+	.loc 2 1628 0
 	ldrh	r3, [r4, #86]
 	movs	r1, #255
 	ldrh	r2, [r4, #114]
 	ldr	r0, [r4, #3856]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL741:
-	.loc 2 1580 0
+.LVL758:
+	.loc 2 1629 0
 	movs	r2, #0
 	mov	r3, r4
 	movw	r1, #65535
-	.loc 2 1582 0
+	.loc 2 1631 0
 	mov	r7, r2
-.L946:
-	.loc 2 1580 0 discriminator 1
+.L951:
+	.loc 2 1629 0 discriminator 1
 	ldrh	r4, [r3, #114]
 	uxth	r0, r2
 	adds	r5, r2, #1
 	cmp	r4, r0
-	bhi	.L947
-	.loc 2 1588 0
+	bhi	.L952
+	.loc 2 1637 0
 	ldr	r2, [r3, #104]
-	.loc 2 1586 0
+	.loc 2 1635 0
 	strh	r1, [r3, #3866]	@ movhi
-	.loc 2 1587 0
+	.loc 2 1636 0
 	strh	r1, [r3, #3864]	@ movhi
-	.loc 2 1588 0
+	.loc 2 1637 0
 	strh	r2, [r3, #3874]	@ movhi
-	.loc 2 1589 0
+	.loc 2 1638 0
 	movw	r2, #61634
 	strh	r2, [r3, #3868]	@ movhi
-	.loc 2 1590 0
+	.loc 2 1639 0
 	ldrh	r2, [r3, #3904]
 	strh	r2, [r3, #3872]	@ movhi
-	.loc 2 1591 0
+	.loc 2 1640 0
 	ldrh	r2, [r3, #112]
 	strh	r2, [r3, #3870]	@ movhi
-	.loc 2 1592 0
+	.loc 2 1641 0
 	ldr	r2, [r3, #3828]
 	str	r2, [r3, #3876]
-	.loc 2 1593 0
+	.loc 2 1642 0
 	ldr	r2, [r3, #3852]
 	str	r2, [r3, #3880]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	r2, [r3, #3832]
 	str	r2, [r3, #3884]
-	.loc 2 1595 0
+	.loc 2 1644 0
 	ldr	r2, [r3, #3848]
 	str	r2, [r3, #3888]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L947:
-	.loc 2 1582 0 discriminator 3
+.L952:
+	.loc 2 1631 0 discriminator 3
 	uxth	r2, r2
-	ldr	r0, [r3, #2424]
+	ldr	r0, [r3, #2468]
 	mul	r4, r6, r2
 	add	ip, r0, r4
 	str	r7, [ip, #4]
-	.loc 2 1583 0 discriminator 3
+	.loc 2 1632 0 discriminator 3
 	strh	r1, [r0, r4]	@ movhi
-	.loc 2 1584 0 discriminator 3
-	ldr	r0, [r3, #2424]
+	.loc 2 1633 0 discriminator 3
+	ldr	r0, [r3, #2468]
 	add	r0, r0, r4
 	ldrh	r4, [r3, #86]
 	muls	r2, r4, r2
@@ -9801,10 +9900,10 @@ FtlL2PDataInit:
 	add	r2, r2, r4
 	str	r2, [r0, #8]
 	mov	r2, r5
-	b	.L946
-.L949:
+	b	.L951
+.L954:
 	.align	2
-.L948:
+.L953:
 	.word	.LANCHOR0
 .LFE227:
 	.fnend
@@ -9819,25 +9918,25 @@ FtlL2PDataInit:
 FtlLoadMapInfo:
 	.fnstart
 .LFB228:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI118:
-	.loc 2 1600 0
+.LCFI119:
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL742:
-	.loc 2 1602 0
-	ldr	r0, .L951
+.LVL759:
+	.loc 2 1651 0
+	ldr	r0, .L956
 	bl	FtlMapTblRecovery
-.LVL743:
-	.loc 2 1605 0
+.LVL760:
+	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L952:
+.L957:
 	.align	2
-.L951:
+.L956:
 	.word	.LANCHOR0+3864
 .LFE228:
 	.fnend
@@ -9857,10 +9956,10 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI119:
+.LCFI120:
 	.loc 3 496 0
 	movs	r5, #0
-	ldr	r4, .L954
+	ldr	r4, .L959
 	.loc 3 497 0
 	movw	r3, #65535
 	.loc 3 502 0
@@ -9886,54 +9985,54 @@ FtlVariablesInit:
 	strh	r5, [r4, #120]	@ movhi
 	.loc 3 502 0
 	bl	ftl_memset
-.LVL744:
+.LVL761:
 	.loc 3 503 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
-	ldr	r0, [r4, #2248]
+	ldr	r0, [r4, #2304]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL745:
+.LVL762:
 	.loc 3 504 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
 	ldr	r0, [r4, #3816]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL746:
-.LBB408:
-.LBB409:
-.LBB410:
+.LVL763:
+.LBB432:
+.LBB433:
+.LBB434:
 	.loc 1 202 0
-	addw	r0, r4, #2504
+	addw	r0, r4, #2244
 	movs	r1, #48
 	bl	__memzero
-.LVL747:
-.LBE410:
-.LBE409:
-.LBE408:
-.LBB411:
-.LBB412:
-.LBB413:
-	addw	r0, r4, #2616
+.LVL764:
+.LBE434:
+.LBE433:
+.LBE432:
+.LBB435:
+.LBB436:
+.LBB437:
+	addw	r0, r4, #2612
 	mov	r1, #512
 	bl	__memzero
-.LVL748:
-.LBE413:
-.LBE412:
-.LBE411:
+.LVL765:
+.LBE437:
+.LBE436:
+.LBE435:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL749:
+.LVL766:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL750:
+.LVL767:
 	.loc 3 510 0
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L955:
+.L960:
 	.align	2
-.L954:
+.L959:
 	.word	.LANCHOR0
 .LFE157:
 	.fnend
@@ -9948,168 +10047,168 @@ FtlVariablesInit:
 SupperBlkListInit:
 	.fnstart
 .LFB235:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI120:
-	.loc 2 2072 0
+.LCFI121:
+	.loc 2 2121 0
 	movs	r6, #0
-	.loc 2 2071 0
-	ldr	r4, .L967
+	.loc 2 2120 0
+	ldr	r4, .L972
 	movs	r2, #6
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	r9, r6
-.LVL751:
+.LVL768:
 	mov	r7, r6
-.LVL752:
-	.loc 2 2071 0
+.LVL769:
+	.loc 2 2120 0
 	movs	r1, #0
 	ldrh	r3, [r4, #18]
-	.loc 2 2082 0
+	.loc 2 2131 0
 	add	fp, r4, #36
-	.loc 2 2071 0
-	ldr	r0, [r4, #2252]
+	.loc 2 2120 0
+	ldr	r0, [r4, #2292]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL753:
-	.loc 2 2072 0
-	str	r6, [r4, #2272]
-	.loc 2 2073 0
-	str	r6, [r4, #2256]
-	.loc 2 2074 0
-	str	r6, [r4, #2264]
-	.loc 2 2075 0
-	strh	r6, [r4, #2268]	@ movhi
-	.loc 2 2076 0
-	strh	r6, [r4, #2276]	@ movhi
-.LVL754:
-.L957:
-	.loc 2 2079 0 discriminator 1
+.LVL770:
+	.loc 2 2121 0
+	str	r6, [r4, #2316]
+	.loc 2 2122 0
+	str	r6, [r4, #2296]
+	.loc 2 2123 0
+	str	r6, [r4, #2308]
+	.loc 2 2124 0
+	strh	r6, [r4, #2312]	@ movhi
+	.loc 2 2125 0
+	strh	r6, [r4, #2320]	@ movhi
+.LVL771:
+.L962:
+	.loc 2 2128 0 discriminator 1
 	ldrh	r3, [r4, #16]
 	uxth	r8, r6
 	cmp	r8, r3
-	bcs	.L963
-	.loc 2 2084 0
+	bcs	.L968
+	.loc 2 2133 0
 	mov	r10, #0
-	.loc 2 2081 0
+	.loc 2 2130 0
 	ldrh	r2, [r4, #8]
-	.loc 2 2084 0
+	.loc 2 2133 0
 	ldrh	r3, [r4, #78]
 	mov	r5, r10
-	b	.L964
-.L959:
-	.loc 2 2082 0
+	b	.L969
+.L964:
+	.loc 2 2131 0
 	mov	r1, r8
 	ldrb	r0, [fp, r10]	@ zero_extendqisi2
 	stm	sp, {r2, r3}
 	bl	V2P_block
-.LVL755:
-	.loc 2 2083 0
+.LVL772:
+	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL756:
+.LVL773:
 	ldm	sp, {r2, r3}
-	cbnz	r0, .L958
-	.loc 2 2084 0
+	cbnz	r0, .L963
+	.loc 2 2133 0
 	add	r5, r5, r3
 	uxth	r5, r5
-.L958:
+.L963:
 	add	r10, r10, #1
-.L964:
-	.loc 2 2081 0 discriminator 1
+.L969:
+	.loc 2 2130 0 discriminator 1
 	uxth	r1, r10
 	cmp	r2, r1
-	bhi	.L959
-	.loc 2 2086 0
-	cbz	r5, .L966
-	.loc 2 2087 0
+	bhi	.L964
+	.loc 2 2135 0
+	cbz	r5, .L971
+	.loc 2 2136 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL757:
-.L960:
-	.loc 2 2088 0
-	ldr	r2, [r4, #2252]
+.LVL774:
+.L965:
+	.loc 2 2137 0
+	ldr	r2, [r4, #2292]
 	uxth	r1, r6
 	movs	r3, #6
 	mla	r3, r3, r1, r2
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2090 0
-	ldrh	r3, [r4, #2280]
+	.loc 2 2139 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r8
-	beq	.L961
-	.loc 2 2090 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2328]
+	beq	.L966
+	.loc 2 2139 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
 	cmp	r3, r8
-	beq	.L961
-	.loc 2 2091 0 is_stmt 1
-	ldrh	r3, [r4, #2376]
+	beq	.L966
+	.loc 2 2140 0 is_stmt 1
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r8
-	beq	.L961
-	.loc 2 2094 0
-	ldr	r3, [r4, #2260]
+	beq	.L966
+	.loc 2 2143 0
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbnz	r3, .L962
-	.loc 2 2095 0
+	cbnz	r3, .L967
+	.loc 2 2144 0
 	add	r9, r9, #1
-.LVL758:
-	.loc 2 2096 0
+.LVL775:
+	.loc 2 2145 0
 	mov	r0, r8
-	.loc 2 2095 0
+	.loc 2 2144 0
 	uxth	r9, r9
-.LVL759:
-	.loc 2 2096 0
+.LVL776:
+	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL760:
-.L961:
-	adds	r6, r6, #1
-	b	.L957
+.LVL777:
 .L966:
+	adds	r6, r6, #1
+	b	.L962
+.L971:
 	mov	r0, r5
-	b	.L960
-.L962:
-	.loc 2 2098 0
+	b	.L965
+.L967:
+	.loc 2 2147 0
 	adds	r7, r7, #1
-.LVL761:
-	.loc 2 2099 0
+.LVL778:
+	.loc 2 2148 0
 	mov	r0, r8
-	.loc 2 2098 0
+	.loc 2 2147 0
 	uxth	r7, r7
-.LVL762:
-	.loc 2 2099 0
+.LVL779:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL763:
-	b	.L961
-.L963:
-	.loc 2 2103 0
-	strh	r7, [r4, #2268]	@ movhi
-	.loc 2 2105 0
+.LVL780:
+	b	.L966
+.L968:
+	.loc 2 2152 0
+	strh	r7, [r4, #2312]	@ movhi
+	.loc 2 2154 0
 	add	r7, r7, r9
-.LVL764:
+.LVL781:
 	cmp	r7, r3
-	.loc 2 2104 0
-	strh	r9, [r4, #2276]	@ movhi
-	.loc 2 2105 0
-	ble	.L965
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	movw	r2, #2105
-	ldr	r1, .L967+4
-	ldr	r0, .L967+8
+	.loc 2 2153 0
+	strh	r9, [r4, #2320]	@ movhi
+	.loc 2 2154 0
+	ble	.L970
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	movw	r2, #2154
+	ldr	r1, .L972+4
+	ldr	r0, .L972+8
 	bl	printk
-.LVL765:
-.L965:
-	.loc 2 2107 0 is_stmt 1
+.LVL782:
+.L970:
+	.loc 2 2156 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI121:
+.LCFI122:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL766:
-.L968:
+.LVL783:
+.L973:
 	.align	2
-.L967:
+.L972:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+342
 	.word	.LC1
@@ -10131,39 +10230,39 @@ FtlGcPageVarInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI122:
+.LCFI123:
 	.loc 5 203 0
 	movs	r3, #0
-	ldr	r4, .L970
+	ldr	r4, .L975
 	.loc 5 205 0
 	movs	r1, #255
 	ldrh	r2, [r4, #82]
-	ldr	r0, [r4, #3168]
+	ldr	r0, [r4, #3164]
 	.loc 5 203 0
-	strh	r3, [r4, #3172]	@ movhi
+	strh	r3, [r4, #3168]	@ movhi
 	.loc 5 204 0
-	strh	r3, [r4, #3180]	@ movhi
+	strh	r3, [r4, #3176]	@ movhi
 	.loc 5 205 0
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL767:
+.LVL784:
 	.loc 5 206 0
 	ldrh	r3, [r4, #82]
 	movs	r2, #12
-	ldr	r0, [r4, #3176]
+	ldr	r0, [r4, #3172]
 	movs	r1, #255
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL768:
+.LVL785:
 	.loc 5 208 0
 	pop	{r4, lr}
-.LCFI123:
+.LCFI124:
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL769:
-.L971:
+.LVL786:
+.L976:
 	.align	2
-.L970:
+.L975:
 	.word	.LANCHOR0
 .LFE259:
 	.fnend
@@ -10181,93 +10280,93 @@ FtlGcScanTempBlk:
 	.loc 5 211 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL770:
+.LVL787:
 	.loc 5 220 0
-	ldr	r3, .L997
+	ldr	r3, .L1002
 	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI124:
+.LCFI125:
 	.pad #28
 	sub	sp, sp, #28
-.LCFI125:
+.LCFI126:
 	.loc 5 211 0
 	mov	r7, r0
 	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3, #4]
-.LVL771:
+.LVL788:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L991
+	beq	.L996
 	.loc 5 223 0
-	cbnz	r4, .L973
-.LVL772:
-.L974:
+	cbnz	r4, .L978
+.LVL789:
+.L979:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL773:
-	b	.L975
-.LVL774:
-.L991:
+.LVL790:
+	b	.L980
+.LVL791:
+.L996:
 	.loc 5 222 0
 	movs	r4, #0
-.L973:
+.L978:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L997+4
+	ldr	r3, .L1002+4
 	ldr	r2, [sp, #8]
-.LVL775:
+.LVL792:
 	ldrh	r3, [r3, #78]
 	cmp	r3, r2
-	beq	.L974
-.L975:
+	beq	.L979
+.L980:
 	.loc 5 222 0
 	mov	fp, #0
-.LVL776:
+.LVL793:
 	.loc 5 228 0
 	movw	r8, #65535
-.LVL777:
-.L985:
+.LVL794:
+.L990:
 	ldrh	r3, [r7]
 	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r7, #8]
 	.loc 5 228 0
 	cmp	r3, r8
-	beq	.L976
+	beq	.L981
 	.loc 5 231 0
-	ldr	r5, .L997+4
-.L988:
+	ldr	r5, .L1002+4
+.L993:
 	.loc 5 234 0
 	ldr	r3, [r5, #3792]
 	.loc 5 231 0
 	movs	r2, #0
-.LVL778:
+.LVL795:
 	ldrh	ip, [r5, #8]
 	add	lr, r7, #16
 	.loc 5 236 0
-	ldr	r10, [r5, #3156]
+	ldr	r10, [r5, #3152]
 	.loc 5 230 0
 	mov	r6, r2
 	.loc 5 234 0
 	str	r3, [sp, #4]
 	mov	r9, #20
 	.loc 5 235 0
-	ldr	r3, [r5, #3152]
+	ldr	r3, [r5, #3148]
 	str	r3, [sp, #12]
 	ldrh	r3, [r5, #86]
 	str	r3, [sp, #16]
 	.loc 5 236 0
 	ldrh	r3, [r5, #88]
 	str	r3, [sp, #20]
-.LVL779:
-.L977:
+.LVL796:
+.L982:
 	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
-.LVL780:
+.LVL797:
 	cmp	ip, r3
-	bhi	.L981
+	bhi	.L986
 	.loc 5 241 0
 	mov	r9, #0
 	.loc 5 240 0
@@ -10275,47 +10374,47 @@ FtlGcScanTempBlk:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL781:
-.L982:
+.LVL798:
+.L987:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L986
+	bhi	.L991
 	.loc 5 268 0
 	ldr	r3, [sp, #8]
-.LVL782:
+.LVL799:
 	.loc 5 266 0
 	add	fp, fp, #1
 	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL783:
+.LVL800:
 	uxth	r4, r4
-.LVL784:
+.LVL801:
 	.loc 5 268 0
 	cmp	r3, fp
-	bls	.L987
-.L989:
+	bls	.L992
+.L994:
 	.loc 5 274 0
 	ldrh	r3, [r5, #78]
-.LVL785:
+.LVL802:
 	cmp	r3, r4
-	bhi	.L988
+	bhi	.L993
 	.loc 5 265 0
 	movs	r0, #0
-.LVL786:
-	b	.L976
-.LVL787:
-.L981:
+.LVL803:
+	b	.L981
+.LVL804:
+.L986:
 	.loc 5 232 0
 	ldrh	r3, [lr], #2
-.LVL788:
+.LVL805:
 	.loc 5 233 0
 	cmp	r3, r8
-	beq	.L978
+	beq	.L983
 	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL789:
+.LVL806:
 	mla	r1, r9, r6, r1
 	str	r3, [r1, #4]
 	.loc 5 235 0
@@ -10332,13 +10431,13 @@ FtlGcScanTempBlk:
 	muls	r3, r6, r3
 	.loc 5 237 0
 	add	r6, r6, #1
-.LVL790:
+.LVL807:
 	.loc 5 236 0
 	it	mi
 	addmi	r3, r3, #3
 	.loc 5 237 0
 	uxth	r6, r6
-.LVL791:
+.LVL808:
 	.loc 5 236 0
 	bic	r3, r3, #3
 	.loc 5 235 0
@@ -10346,12 +10445,12 @@ FtlGcScanTempBlk:
 	.loc 5 236 0
 	add	r3, r3, r10
 	str	r3, [r1, #12]
-.LVL792:
-.L978:
+.LVL809:
+.L983:
 	adds	r2, r2, #1
-	b	.L977
-.LVL793:
-.L986:
+	b	.L982
+.LVL810:
+.L991:
 	.loc 5 242 0
 	movs	r3, #20
 	ldr	r2, [r5, #3792]
@@ -10359,45 +10458,45 @@ FtlGcScanTempBlk:
 	str	r2, [sp, #16]
 	add	r3, r2, r10
 	ldr	r1, [r3, #4]
-.LVL794:
+.LVL811:
 	str	r3, [sp, #12]
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL795:
+.LVL812:
 	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L983
+	cbnz	r2, .L988
 	.loc 5 247 0
 	ldr	r3, [sp, #12]
 	add	r9, r9, #1
 	.loc 5 248 0
 	ldr	r1, [sp, #4]
-.LVL796:
+.LVL813:
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL797:
+.LVL814:
 	.loc 5 248 0
 	ldrh	r2, [r3]
 	cmp	r2, r8
-	bne	.L984
+	bne	.L989
 	.loc 5 249 0
 	movs	r3, #1
-.LVL798:
+.LVL815:
 	str	r3, [r5, #3960]
-.LVL799:
-.L976:
+.LVL816:
+.L981:
 	.loc 5 281 0
-	ldr	r3, .L997
+	ldr	r3, .L1002
 	movw	r2, #65535
-.LVL800:
+.LVL817:
 	.loc 5 283 0
 	strb	r0, [r7, #6]
 	.loc 5 284 0
 	mov	r1, r4
-.LVL801:
+.LVL818:
 	.loc 5 282 0
 	strh	r4, [r7, #2]	@ movhi
 	.loc 5 281 0
@@ -10405,63 +10504,63 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r7
-.LVL802:
+.LVL819:
 	bl	ftl_sb_update_avl_pages
-.LVL803:
+.LVL820:
 	.loc 5 285 0
-	b	.L990
-.LVL804:
-.L984:
+	b	.L995
+.LVL821:
+.L989:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL805:
-	b	.L982
-.L983:
+.LVL822:
+	b	.L987
+.L988:
 	.loc 5 256 0
 	ldrh	r2, [r7]
 	movs	r4, #0
-.LVL806:
-	ldr	r3, [r5, #2260]
+.LVL823:
+	ldr	r3, [r5, #2300]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
 	ldrh	r0, [r7]
 	bl	INSERT_FREE_LIST
-.LVL807:
+.LVL824:
 	.loc 5 258 0
 	strh	r8, [r7]	@ movhi
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL808:
+.LVL825:
 	.loc 5 261 0
-	b	.L985
-.LVL809:
-.L987:
+	b	.L990
+.LVL826:
+.L992:
 	.loc 5 268 0 discriminator 1
-	ldr	r2, .L997
+	ldr	r2, .L1002
 	ldrh	r3, [r2, #4]
-.LVL810:
+.LVL827:
 	cmp	r3, r8
-	beq	.L989
+	beq	.L994
 	.loc 5 269 0
 	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r5, #78]
 	cmp	r3, r4
-	bls	.L989
-.L990:
+	bls	.L994
+.L995:
 	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #28
-.LCFI126:
+.LCFI127:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL811:
-.L998:
+.LVL828:
+.L1003:
 	.align	2
-.L997:
+.L1002:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 .LFE260:
@@ -10481,10 +10580,10 @@ ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL812:
+.LVL829:
 	.loc 1 207 0
 	b	memcpy
-.LVL813:
+.LVL830:
 .LFE278:
 	.fnend
 	.size	ftl_memcpy, .-ftl_memcpy
@@ -10504,76 +10603,76 @@ FtlBbmTblFlush:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI127:
+.LCFI128:
 	.loc 4 91 0
 	movs	r5, #0
-.LVL814:
+.LVL831:
 	.loc 4 87 0
-	ldr	r4, .L1009
+	ldr	r4, .L1014
 	.loc 4 89 0
 	movs	r1, #0
 	.loc 4 87 0
-	ldr	r0, [r4, #2244]
+	ldr	r0, [r4, #3240]
 	add	r6, r4, #152
 	.loc 4 88 0
 	ldr	r3, [r4, #3244]
 	.loc 4 89 0
 	ldrh	r2, [r4, #86]
 	.loc 4 87 0
-	str	r0, [r4, #3232]
+	str	r0, [r4, #3228]
 	.loc 4 88 0
-	str	r3, [r4, #3236]
+	str	r3, [r4, #3232]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL815:
-.L1001:
+.LVL832:
+.L1006:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	blt	.L1002
+	blt	.L1007
 	.loc 4 94 0
-	ldr	r6, [r4, #3236]
-.LVL816:
-.LBB419:
-.LBB420:
-.LBB421:
+	ldr	r6, [r4, #3232]
+.LVL833:
+.LBB443:
+.LBB444:
+.LBB445:
 	.loc 1 202 0
 	movs	r2, #16
 	movs	r1, #255
-.LBE421:
-.LBE420:
-.LBE419:
+.LBE445:
+.LBE444:
+.LBE443:
 	.loc 4 108 0
-	ldr	r9, .L1009+12
+	ldr	r9, .L1014+12
 	.loc 4 109 0
-	ldr	r8, .L1009+4
+	ldr	r8, .L1014+4
 	.loc 4 84 0
 	movs	r5, #0
-.LVL817:
-.LBB426:
-.LBB424:
-.LBB422:
+.LVL834:
+.LBB450:
+.LBB448:
+.LBB446:
 	.loc 1 202 0
 	mov	r0, r6
-.LBE422:
-.LBE424:
-.LBE426:
+.LBE446:
+.LBE448:
+.LBE450:
 	.loc 4 129 0
-	ldr	r10, .L1009+16
-.LBB427:
-.LBB425:
-.LBB423:
+	ldr	r10, .L1014+16
+.LBB451:
+.LBB449:
+.LBB447:
 	.loc 1 202 0
 	bl	memset
-.LVL818:
-.LBE423:
-.LBE425:
-.LBE427:
+.LVL835:
+.LBE447:
+.LBE449:
+.LBE451:
 	.loc 4 97 0
 	movw	r3, #61649
 	.loc 4 82 0
 	mov	r7, r5
-.LVL819:
+.LVL836:
 	.loc 4 97 0
 	strh	r3, [r6]	@ movhi
 	.loc 4 98 0
@@ -10591,47 +10690,47 @@ FtlBbmTblFlush:
 	.loc 4 102 0
 	ldr	r3, [r4, #4]
 	strh	r3, [r6, #12]	@ movhi
-.L1003:
+.L1008:
 	.loc 4 104 0
-	ldr	r3, [r4, #2244]
+	ldr	r3, [r4, #3240]
 	.loc 4 106 0
 	mov	fp, #0
 	.loc 4 107 0
 	ldrh	r1, [r4, #128]
 	ldrh	r2, [r4, #130]
 	.loc 4 104 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 105 0
 	ldr	r3, [r4, #3244]
 	.loc 4 106 0
-	str	fp, [r4, #3224]
+	str	fp, [r4, #3220]
 	.loc 4 105 0
-	str	r3, [r4, #3236]
+	str	r3, [r4, #3232]
 	.loc 4 107 0
 	orr	r3, r2, r1, lsl #10
 	.loc 4 108 0
 	ldrh	r0, [r6, #10]
 	.loc 4 107 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 108 0
 	ldrh	r3, [r4, #132]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	printk
-.LVL820:
+.LVL837:
 	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1009+4
+	ldr	r0, .L1014+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL821:
+.LVL838:
 	.loc 4 110 0
 	ldrh	r3, [r4, #80]
 	ldrh	r2, [r4, #130]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1004
+	blt	.L1009
 	.loc 4 113 0
 	ldr	r3, [r4, #136]
 	.loc 4 115 0
@@ -10660,56 +10759,56 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	.loc 4 119 0
 	lsls	r3, r3, #10
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 121 0
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL822:
+.LVL839:
 	.loc 4 123 0
 	movs	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL823:
-.L1004:
+.LVL840:
+.L1009:
 	.loc 4 126 0
 	ldrh	r3, [r4, #130]
 	adds	r3, r3, #1
 	strh	r3, [r4, #130]	@ movhi
 	.loc 4 127 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	bne	.L1005
+	bne	.L1010
 	.loc 4 130 0
 	adds	r5, r5, #1
-.LVL824:
+.LVL841:
 	.loc 4 129 0
-	ldr	r1, [r4, #3228]
+	ldr	r1, [r4, #3224]
 	.loc 4 130 0
 	uxth	r5, r5
-.LVL825:
+.LVL842:
 	.loc 4 129 0
 	mov	r0, r10
 	bl	printk
-.LVL826:
+.LVL843:
 	.loc 4 131 0
 	cmp	r5, #3
-	bls	.L1003
+	bls	.L1008
 	.loc 4 132 0
 	mov	r2, r5
-	ldr	r1, [r4, #3228]
-	ldr	r0, .L1009+8
+	ldr	r1, [r4, #3224]
+	ldr	r0, .L1014+8
 	bl	printk
-.LVL827:
+.LVL844:
+.L1012:
+	b	.L1012
+.LVL845:
 .L1007:
-	b	.L1007
-.LVL828:
-.L1002:
 	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r4, #3860]
-	ldr	r3, [r4, #3232]
+	ldr	r3, [r4, #3228]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
 	lsls	r2, r2, #2
@@ -10718,31 +10817,31 @@ FtlBbmTblFlush:
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL829:
-	b	.L1001
-.LVL830:
-.L1008:
+.LVL846:
+	b	.L1006
+.LVL847:
+.L1013:
 	movs	r7, #1
-	b	.L1003
-.L1005:
+	b	.L1008
+.L1010:
 	.loc 4 139 0
 	cmp	r7, #0
-	beq	.L1008
+	beq	.L1013
 	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI128:
+.LCFI129:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL831:
-.L1010:
+.LVL848:
+.L1015:
 	.align	2
-.L1009:
+.L1014:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
-	.word	.LC92
-	.word	.LC90
-	.word	.LC91
+	.word	.LANCHOR0+3220
+	.word	.LC95
+	.word	.LC93
+	.word	.LC94
 .LFE176:
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
@@ -10756,135 +10855,135 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	.fnstart
 .LFB248:
-	.loc 2 2531 0
+	.loc 2 2579 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL832:
+.LVL849:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI129:
+.LCFI130:
 	mov	r5, r0
-	ldr	r4, .L1046
+	ldr	r4, .L1051
 	.pad #20
 	sub	sp, sp, #20
-.LCFI130:
-	.loc 2 2537 0
-	ldr	r9, .L1046+20
-.LVL833:
-.L1012:
-	ldr	r3, .L1046
-	ldr	r2, .L1046
-	ldrh	r3, [r3, #2276]
-	ldrh	r2, [r2, #2268]
+.LCFI131:
+	.loc 2 2585 0
+	ldr	r9, .L1051+20
+.LVL850:
+.L1017:
+	ldr	r3, .L1051
+	ldr	r2, .L1051
+	ldrh	r3, [r3, #2320]
+	ldrh	r2, [r2, #2312]
 	add	r3, r3, r2
-	ldr	r2, .L1046
+	ldr	r2, .L1051
 	ldrh	r2, [r2, #16]
 	cmp	r3, r2
-	ble	.L1013
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	movw	r2, #2537
+	ble	.L1018
+	.loc 2 2585 0 is_stmt 0 discriminator 1
+	movw	r2, #2585
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL834:
-.L1013:
-	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1046+8
+.LVL851:
+.L1018:
+	.loc 2 2587 0 is_stmt 1
+	ldr	r3, .L1051+8
 	cmp	r5, r3
-	bne	.L1038
-	.loc 2 2540 0
-	ldrh	r3, [r4, #2276]
-	ldr	r1, [r4, #3140]
+	bne	.L1043
+	.loc 2 2588 0
+	ldrh	r3, [r4, #2320]
+	ldr	r1, [r4, #3136]
 	mul	r2, r1, r3
 	lsrs	r1, r3, #1
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL835:
-	.loc 2 2544 0
-	cbz	r1, .L1014
-	.loc 2 2545 0
+.LVL852:
+	.loc 2 2592 0
+	cbz	r1, .L1019
+	.loc 2 2593 0
 	subs	r1, r1, #1
-.LVL836:
+.LVL853:
 	uxth	r1, r1
-.LVL837:
-.L1014:
-	.loc 2 2546 0
-	ldr	r0, .L1046+12
+.LVL854:
+.L1019:
+	.loc 2 2594 0
+	ldr	r0, .L1051+12
 	bl	List_pop_index_node
-.LVL838:
-	ldrh	r3, [r4, #2276]
+.LVL855:
+	ldrh	r3, [r4, #2320]
 	mov	r6, r0
 	uxth	r8, r0
-	cbnz	r3, .L1015
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	movw	r2, #2546
+	cbnz	r3, .L1020
+	.loc 2 2594 0 is_stmt 0 discriminator 1
+	movw	r2, #2594
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL839:
-.L1015:
-	.loc 2 2546 0 discriminator 3
-	ldrh	r3, [r4, #2276]
-	.loc 2 2550 0 is_stmt 1 discriminator 3
+.LVL856:
+.L1020:
+	.loc 2 2594 0 discriminator 3
+	ldrh	r3, [r4, #2320]
+	.loc 2 2598 0 is_stmt 1 discriminator 3
 	mov	r0, r5
-	.loc 2 2546 0 discriminator 3
+	.loc 2 2594 0 discriminator 3
 	subs	r3, r3, #1
-	strh	r3, [r4, #2276]	@ movhi
-	.loc 2 2549 0 discriminator 3
+	strh	r3, [r4, #2320]	@ movhi
+	.loc 2 2597 0 discriminator 3
 	strh	r8, [r5]	@ movhi
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2598 0 discriminator 3
 	bl	make_superblock
-.LVL840:
-	.loc 2 2551 0 discriminator 3
+.LVL857:
+	.loc 2 2599 0 discriminator 3
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1016
-	.loc 2 2555 0
-	ldr	r3, [r4, #2260]
+	cbnz	r3, .L1021
+	.loc 2 2603 0
+	ldr	r3, [r4, #2300]
 	uxth	r6, r6
 	movw	r2, #65535
-	.loc 2 2556 0
+	.loc 2 2604 0
 	mov	r0, r8
-	.loc 2 2555 0
+	.loc 2 2603 0
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2556 0
+	.loc 2 2604 0
 	bl	INSERT_DATA_LIST
-.LVL841:
-	.loc 2 2557 0
-	ldrh	r2, [r4, #2268]
-	ldrh	r3, [r4, #2276]
+.LVL858:
+	.loc 2 2605 0
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1012
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	movw	r2, #2557
+	ble	.L1017
+	.loc 2 2605 0 is_stmt 0 discriminator 1
+	movw	r2, #2605
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL842:
-	b	.L1012
-.L1038:
+.LVL859:
+	b	.L1017
+.L1043:
 	movs	r1, #0
-.LVL843:
-	b	.L1014
-.LVL844:
-.L1016:
-	.loc 2 2560 0 is_stmt 1
-	ldrh	r2, [r4, #2268]
-	ldrh	r3, [r4, #2276]
+.LVL860:
+	b	.L1019
+.LVL861:
+.L1021:
+	.loc 2 2608 0 is_stmt 1
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1018
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	mov	r2, #2560
+	ble	.L1023
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	r2, #2608
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL845:
-.L1018:
-	.loc 2 2564 0 is_stmt 1 discriminator 1
+.LVL862:
+.L1023:
+	.loc 2 2612 0 is_stmt 1 discriminator 1
 	ldr	r1, [r4, #3760]
 	mov	r10, #20
 	ldrh	r2, [r4, #8]
@@ -10895,301 +10994,301 @@ allocate_data_superblock:
 	mov	ip, r7
 	mla	r2, r10, r2, r1
 	str	r2, [sp, #4]
-.L1019:
-	.loc 2 2563 0 discriminator 1
+.L1024:
+	.loc 2 2611 0 discriminator 1
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bne	.L1021
-	.loc 2 2571 0
-	cbnz	r7, .L1022
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	movw	r2, #2571
+	bne	.L1026
+	.loc 2 2619 0
+	cbnz	r7, .L1027
+	.loc 2 2619 0 is_stmt 0 discriminator 1
+	movw	r2, #2619
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL846:
-.L1022:
-	.loc 2 2573 0 is_stmt 1
-	ldrh	r3, [r4, #2568]
+.LVL863:
+.L1027:
+	.loc 2 2621 0 is_stmt 1
+	ldrh	r3, [r4, #2564]
 	cmp	r3, r8
-	bne	.L1023
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	movw	r2, #2573
+	bne	.L1028
+	.loc 2 2621 0 is_stmt 0 discriminator 1
+	movw	r2, #2621
 	mov	r1, r9
-	ldr	r0, .L1046+4
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL847:
-.L1023:
-	.loc 2 2574 0 is_stmt 1
+.LVL864:
+.L1028:
+	.loc 2 2622 0 is_stmt 1
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
-	.loc 2 2575 0
-	ldr	r2, [r4, #2248]
-	.loc 2 2574 0
+	.loc 2 2623 0
+	ldr	r2, [r4, #2304]
+	.loc 2 2622 0
 	cmp	r3, #0
-	bne	.L1024
-	.loc 2 2575 0
+	bne	.L1029
+	.loc 2 2623 0
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1025
-	.loc 2 2576 0
+	beq	.L1030
+	.loc 2 2624 0
 	ldrh	r1, [r4, #68]
 	add	r3, r3, r1
-.L1045:
-	.loc 2 2578 0
+.L1050:
+	.loc 2 2626 0
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 2580 0
+	.loc 2 2628 0
 	movs	r1, #0
-	.loc 2 2579 0
-	ldr	r3, [r4, #2480]
-	.loc 2 2580 0
+	.loc 2 2627 0
+	ldr	r3, [r4, #2524]
+	.loc 2 2628 0
 	mov	r0, r8
-	.loc 2 2579 0
+	.loc 2 2627 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2480]
-	.loc 2 2580 0
+	str	r3, [r4, #2524]
+	.loc 2 2628 0
 	bl	ftl_set_blk_mode
-.LVL848:
-.L1027:
-	.loc 2 2587 0
-	ldr	r3, [r4, #2248]
-	ldr	r2, [r4, #2496]
-	.loc 2 2590 0
+.LVL865:
+.L1032:
+	.loc 2 2635 0
+	ldr	r3, [r4, #2304]
+	ldr	r2, [r4, #2540]
+	.loc 2 2638 0
 	ldrh	r0, [r4, #68]
-	.loc 2 2587 0
+	.loc 2 2635 0
 	ldrh	r3, [r3, r6, lsl #1]
-	.loc 2 2590 0
+	.loc 2 2638 0
 	ldrh	r1, [r4, #16]
-	.loc 2 2587 0
+	.loc 2 2635 0
 	cmp	r3, r2
-	.loc 2 2590 0
-	ldr	r2, [r4, #2480]
-	.loc 2 2588 0
+	.loc 2 2638 0
+	ldr	r2, [r4, #2524]
+	.loc 2 2636 0
 	it	hi
-	strhi	r3, [r4, #2496]
-	.loc 2 2590 0
-	ldr	r3, [r4, #2484]
+	strhi	r3, [r4, #2540]
+	.loc 2 2638 0
+	ldr	r3, [r4, #2528]
 	mla	r0, r2, r0, r3
 	bl	__aeabi_uidiv
-.LVL849:
-	.loc 2 2591 0
+.LVL866:
+	.loc 2 2639 0
 	ldr	r2, [r4, #3820]
-	.loc 2 2594 0
+	.loc 2 2642 0
 	ldr	r1, [r4, #3760]
-	.loc 2 2590 0
-	str	r0, [r4, #2488]
-	.loc 2 2591 0
+	.loc 2 2638 0
+	str	r0, [r4, #2532]
+	.loc 2 2639 0
 	ldr	r3, [r2, #16]
-	.loc 2 2594 0
-	ldr	r0, .L1046+16
-	.loc 2 2591 0
+	.loc 2 2642 0
+	ldr	r0, .L1051+16
+	.loc 2 2639 0
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
 	mla	r2, r2, r7, r1
 	adds	r3, r1, #4
 	adds	r2, r2, #24
-.L1029:
+.L1034:
 	adds	r3, r3, #20
-	.loc 2 2593 0 discriminator 1
+	.loc 2 2641 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1030
-	.loc 2 2595 0
+	bne	.L1035
+	.loc 2 2643 0
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3760]
-	.loc 2 2597 0
+	.loc 2 2645 0
 	mov	r10, #0
-	.loc 2 2595 0
+	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL850:
-	.loc 2 2596 0
+.LVL867:
+	.loc 2 2644 0
 	mov	r3, r10
-.LVL851:
-	.loc 2 2598 0
+.LVL868:
+	.loc 2 2646 0
 	movs	r1, #20
-.L1031:
-	.loc 2 2597 0 discriminator 1
+.L1036:
+	.loc 2 2645 0 discriminator 1
 	uxth	r2, r10
 	cmp	r7, r2
-	bhi	.L1033
-	.loc 2 2608 0
+	bhi	.L1038
+	.loc 2 2656 0
 	cmp	r3, #0
-	ble	.L1034
-	.loc 2 2609 0
+	ble	.L1039
+	.loc 2 2657 0
 	mov	r0, r8
 	bl	update_multiplier_value
-.LVL852:
-	.loc 2 2610 0
+.LVL869:
+	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL853:
-.L1034:
-	.loc 2 2613 0
+.LVL870:
+.L1039:
+	.loc 2 2661 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1035
-	.loc 2 2615 0
-	ldr	r3, [r4, #2260]
-.LVL854:
+	bne	.L1040
+	.loc 2 2663 0
+	ldr	r3, [r4, #2300]
+.LVL871:
 	movw	r2, #65535
-	.loc 2 2616 0
+	.loc 2 2664 0
 	mov	r0, r8
-	.loc 2 2615 0
+	.loc 2 2663 0
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2616 0
+	.loc 2 2664 0
 	bl	INSERT_DATA_LIST
-.LVL855:
-	.loc 2 2617 0
-	b	.L1012
-.L1021:
-	.loc 2 2564 0
+.LVL872:
+	.loc 2 2665 0
+	b	.L1017
+.L1026:
+	.loc 2 2612 0
 	str	ip, [r3, #8]
-	.loc 2 2566 0
+	.loc 2 2614 0
 	movw	lr, #65535
-	.loc 2 2565 0
+	.loc 2 2613 0
 	str	ip, [r3, #12]
-	.loc 2 2566 0
+	.loc 2 2614 0
 	ldrh	r2, [r0], #2
 	cmp	r2, lr
-	beq	.L1020
-	.loc 2 2567 0
+	beq	.L1025
+	.loc 2 2615 0
 	mla	lr, r10, r7, r1
-	.loc 2 2568 0
+	.loc 2 2616 0
 	adds	r7, r7, #1
-.LVL856:
-	.loc 2 2567 0
+.LVL873:
+	.loc 2 2615 0
 	lsls	r2, r2, #10
-	.loc 2 2568 0
+	.loc 2 2616 0
 	uxth	r7, r7
-.LVL857:
-	.loc 2 2567 0
+.LVL874:
+	.loc 2 2615 0
 	str	r2, [lr, #4]
-.L1020:
-	adds	r3, r3, #20
-	b	.L1019
 .L1025:
-	.loc 2 2578 0
+	adds	r3, r3, #20
+	b	.L1024
+.L1030:
+	.loc 2 2626 0
 	movs	r3, #2
-	b	.L1045
-.L1024:
-	.loc 2 2582 0
+	b	.L1050
+.L1029:
+	.loc 2 2630 0
 	ldrh	r3, [r2, r6, lsl #1]
-.LBB428:
-.LBB429:
+.LBB452:
+.LBB453:
 	mov	r0, r8
-.LBE429:
-.LBE428:
+.LBE453:
+.LBE452:
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 2583 0
-	ldr	r3, [r4, #2484]
+	.loc 2 2631 0
+	ldr	r3, [r4, #2528]
 	adds	r3, r3, #1
-	str	r3, [r4, #2484]
-.LBB431:
-.LBB430:
+	str	r3, [r4, #2528]
+.LBB455:
+.LBB454:
 	bl	ftl_set_blk_mode.part.6
-.LVL858:
-	b	.L1027
-.L1030:
-.LBE430:
-.LBE431:
-	.loc 2 2594 0 discriminator 3
+.LVL875:
+	b	.L1032
+.L1035:
+.LBE454:
+.LBE455:
+	.loc 2 2642 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1029
-.LVL859:
-.L1033:
-	.loc 2 2598 0
+	b	.L1034
+.LVL876:
+.L1038:
+	.loc 2 2646 0
 	mul	r2, r1, r10
 	ldr	r0, [r4, #3760]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1032
-	.loc 2 2600 0
+	bne	.L1037
+	.loc 2 2648 0
 	ldr	r0, [ip, #4]
-	.loc 2 2599 0
+	.loc 2 2647 0
 	adds	r3, r3, #1
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2601 0
+	.loc 2 2649 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2599 0
+	.loc 2 2647 0
 	str	r3, [sp, #4]
-	.loc 2 2601 0
+	.loc 2 2649 0
 	bl	FtlBbmMapBadBlock
-.LVL860:
-	.loc 2 2602 0
+.LVL877:
+	.loc 2 2650 0
 	ldr	r2, [sp, #8]
-	.loc 2 2603 0
+	.loc 2 2651 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-.LVL861:
-	.loc 2 2602 0
+.LVL878:
+	.loc 2 2650 0
 	strh	r2, [fp]	@ movhi
-	.loc 2 2603 0
+	.loc 2 2651 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1032:
+.L1037:
 	add	r10, r10, #1
 	add	fp, fp, #2
-	b	.L1031
-.L1035:
-	.loc 2 2620 0
+	b	.L1036
+.L1040:
+	.loc 2 2668 0
 	ldrh	r3, [r4, #78]
-.LVL862:
-	.loc 2 2621 0
+.LVL879:
+	.loc 2 2669 0
 	strh	r8, [r5]	@ movhi
-	.loc 2 2620 0
+	.loc 2 2668 0
 	smulbb	r3, r3, r2
-	.loc 2 2622 0
+	.loc 2 2670 0
 	movs	r2, #0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2623 0
+	.loc 2 2671 0
 	strb	r2, [r5, #6]
-	.loc 2 2624 0
-	ldr	r2, [r4, #2472]
-	.loc 2 2620 0
+	.loc 2 2672 0
+	ldr	r2, [r4, #2516]
+	.loc 2 2668 0
 	uxth	r3, r3
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 2624 0
+	.loc 2 2672 0
 	str	r2, [r5, #12]
 	adds	r2, r2, #1
-	str	r2, [r4, #2472]
-	.loc 2 2625 0
-	ldr	r2, [r4, #2260]
+	str	r2, [r4, #2516]
+	.loc 2 2673 0
+	ldr	r2, [r4, #2300]
 	ldrh	r1, [r5]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2626 0
+	.loc 2 2674 0
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1036
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	r3, .L1041
+	.loc 2 2674 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1037
-.L1036:
-	.loc 2 2626 0 discriminator 3
-	movw	r2, #2626
-	ldr	r1, .L1046+20
-	ldr	r0, .L1046+4
+	cbnz	r3, .L1042
+.L1041:
+	.loc 2 2674 0 discriminator 3
+	movw	r2, #2674
+	ldr	r1, .L1051+20
+	ldr	r0, .L1051+4
 	bl	printk
-.LVL863:
-.L1037:
-	.loc 2 2628 0 is_stmt 1
+.LVL880:
+.L1042:
+	.loc 2 2676 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #20
-.LCFI131:
+.LCFI132:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL864:
-.L1047:
+.LVL881:
+.L1052:
 	.align	2
-.L1046:
+.L1051:
 	.word	.LANCHOR0
 	.word	.LC1
-	.word	.LANCHOR0+2376
-	.word	.LANCHOR0+2272
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2316
 	.word	-1024
 	.word	.LANCHOR1+360
 .LFE248:
@@ -11208,105 +11307,105 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 390 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL865:
+.LVL882:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI132:
+.LCFI133:
 	.loc 5 390 0
 	mov	r8, r0
 	.loc 5 395 0
-	ldr	r4, .L1060
-	ldrh	r3, [r4, #3186]
-	cbz	r3, .L1049
+	ldr	r4, .L1065
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L1054
 	movs	r7, #0
-	addw	r10, r4, #3188
-.LVL866:
-.L1050:
-.LBB434:
-.LBB435:
+	add	r10, r4, #3184
+.LVL883:
+.L1055:
+.LBB458:
+.LBB459:
 	.loc 5 396 0
 	ldrh	r2, [r4, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1056
+	bhi	.L1061
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL867:
-.L1049:
-.LBE435:
-.LBE434:
+.LVL884:
+.L1054:
+.LBE459:
+.LBE458:
 	.loc 5 415 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL868:
-.L1056:
-.LBB437:
-.LBB436:
+.LVL885:
+.L1061:
+.LBB461:
+.LBB460:
 	.loc 5 397 0
 	uxtah	r3, r4, r7
 	mov	r1, r8
 	mov	fp, #0
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL869:
+.LVL886:
 	mov	r9, r0
-.L1051:
+.L1056:
 	.loc 5 398 0
-	ldrh	r3, [r4, #3186]
+	ldrh	r3, [r4, #3182]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1055
+	bhi	.L1060
 	adds	r7, r7, #1
-	b	.L1050
-.L1055:
+	b	.L1055
+.L1060:
 	.loc 5 399 0
 	uxth	r6, fp
 	add	r3, r4, r6, lsl #1
-	ldrh	r3, [r3, #3188]
+	ldrh	r3, [r3, #3184]
 	cmp	r3, r9
-	bne	.L1052
+	bne	.L1057
 	.loc 5 401 0
 	mov	r1, r9
-	ldr	r0, .L1060+4
+	ldr	r0, .L1065+4
 	bl	printk
-.LVL870:
+.LVL887:
 	.loc 5 403 0
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
-.LVL871:
+.LVL888:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL872:
+.LVL889:
 	.loc 5 405 0
-	ldrh	r1, [r4, #3186]
+	ldrh	r1, [r4, #3182]
 	add	r3, r10, r6, lsl #1
-.L1053:
+.L1058:
 	cmp	r5, r1
-	bcc	.L1054
+	bcc	.L1059
 	.loc 5 407 0
 	subs	r1, r1, #1
-	strh	r1, [r4, #3186]	@ movhi
-.L1052:
+	strh	r1, [r4, #3182]	@ movhi
+.L1057:
 	add	fp, fp, #1
-	b	.L1051
-.L1054:
+	b	.L1056
+.L1059:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL873:
+.LVL890:
 	uxth	r5, r5
-.LVL874:
+.LVL891:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1053
-.L1061:
+	b	.L1058
+.L1066:
 	.align	2
-.L1060:
+.L1065:
 	.word	.LANCHOR0
-	.word	.LC93
-.LBE436:
-.LBE437:
+	.word	.LC96
+.LBE460:
+.LBE461:
 .LFE267:
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -11320,109 +11419,109 @@ FtlGcFreeBadSuperBlk:
 update_vpc_list:
 	.fnstart
 .LFB251:
-	.loc 2 2687 0
+	.loc 2 2735 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL875:
-	.loc 2 2688 0
-	ldr	r2, .L1072
-	.loc 2 2687 0
+.LVL892:
+	.loc 2 2736 0
+	ldr	r2, .L1077
+	.loc 2 2735 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI133:
-	.loc 2 2687 0
+.LCFI134:
+	.loc 2 2735 0
 	mov	r5, r0
 	mov	r4, r2
-	.loc 2 2688 0
-	ldr	r3, [r2, #2260]
+	.loc 2 2736 0
+	ldr	r3, [r2, #2300]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1063
-	.loc 2 2689 0
-	ldrh	r1, [r2, #2568]
+	bne	.L1068
+	.loc 2 2737 0
+	ldrh	r1, [r2, #2564]
 	cmp	r1, r0
-	bne	.L1064
-	.loc 2 2691 0
+	bne	.L1069
+	.loc 2 2739 0
 	movw	r3, #65535
-	strh	r3, [r2, #2568]	@ movhi
-.L1065:
-.LVL876:
-.LBB440:
-.LBB441:
-	.loc 2 2696 0
+	strh	r3, [r2, #2564]	@ movhi
+.L1070:
+.LVL893:
+.LBB464:
+.LBB465:
+	.loc 2 2744 0
 	mov	r1, r5
-	ldr	r0, .L1072+4
+	ldr	r0, .L1077+4
 	bl	List_remove_node
-.LVL877:
-	ldrh	r3, [r4, #2268]
-	cbnz	r3, .L1067
-	movw	r2, #2696
-	ldr	r1, .L1072+8
-	ldr	r0, .L1072+12
+.LVL894:
+	ldrh	r3, [r4, #2312]
+	cbnz	r3, .L1072
+	movw	r2, #2744
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	printk
-.LVL878:
-.L1067:
-	ldrh	r3, [r4, #2268]
-	.loc 2 2697 0
+.LVL895:
+.L1072:
+	ldrh	r3, [r4, #2312]
+	.loc 2 2745 0
 	mov	r0, r5
-	.loc 2 2696 0
+	.loc 2 2744 0
 	subs	r3, r3, #1
-	strh	r3, [r4, #2268]	@ movhi
-	.loc 2 2697 0
+	strh	r3, [r4, #2312]	@ movhi
+	.loc 2 2745 0
 	bl	free_data_superblock
-.LVL879:
-	.loc 2 2698 0
+.LVL896:
+	.loc 2 2746 0
 	mov	r0, r5
 	bl	FtlGcFreeBadSuperBlk
-.LVL880:
-	.loc 2 2699 0
-	ldrh	r2, [r4, #2268]
-	ldrh	r3, [r4, #2276]
+.LVL897:
+	.loc 2 2747 0
+	ldrh	r2, [r4, #2312]
+	ldrh	r3, [r4, #2320]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1071
-	movw	r2, #2699
-	ldr	r1, .L1072+8
-	ldr	r0, .L1072+12
+	ble	.L1076
+	movw	r2, #2747
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	printk
-.LVL881:
-.L1071:
+.LVL898:
+.L1076:
 	movs	r3, #1
-	b	.L1062
-.LVL882:
-.L1064:
-.LBE441:
-.LBE440:
-	.loc 2 2692 0
-	ldrh	r1, [r2, #2280]
+	b	.L1067
+.LVL899:
+.L1069:
+.LBE465:
+.LBE464:
+	.loc 2 2740 0
+	ldrh	r1, [r2, #2324]
 	cmp	r1, r0
-	beq	.L1062
-	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #2328]
+	beq	.L1067
+	.loc 2 2740 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r2, #2372]
 	cmp	r1, r0
-	beq	.L1062
-	.loc 2 2692 0 discriminator 2
-	ldrh	r2, [r2, #2376]
+	beq	.L1067
+	.loc 2 2740 0 discriminator 2
+	ldrh	r2, [r2, #2420]
 	cmp	r2, r0
-	bne	.L1065
-.L1062:
-	.loc 2 2705 0 is_stmt 1
+	bne	.L1070
+.L1067:
+	.loc 2 2753 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL883:
-.L1063:
-	.loc 2 2702 0
+.LVL900:
+.L1068:
+	.loc 2 2750 0
 	bl	List_update_data_list
-.LVL884:
-	.loc 2 2704 0
+.LVL901:
+	.loc 2 2752 0
 	movs	r3, #0
-	b	.L1062
-.L1073:
+	b	.L1067
+.L1078:
 	.align	2
-.L1072:
+.L1077:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2256
+	.word	.LANCHOR0+2296
 	.word	.LANCHOR1+385
 	.word	.LC1
 .LFE251:
@@ -11438,107 +11537,107 @@ update_vpc_list:
 decrement_vpc_count:
 	.fnstart
 .LFB252:
-	.loc 2 2708 0
+	.loc 2 2756 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL885:
-	.loc 2 2711 0
+.LVL902:
+	.loc 2 2759 0
 	movw	r3, #65535
-	.loc 2 2708 0
+	.loc 2 2756 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI134:
-	.loc 2 2711 0
+.LCFI135:
+	.loc 2 2759 0
 	cmp	r0, r3
-	.loc 2 2708 0
+	.loc 2 2756 0
 	mov	r4, r0
-	ldr	r5, .L1083
-	.loc 2 2711 0
-	beq	.L1075
-	.loc 2 2712 0
-	ldr	r3, [r5, #2260]
+	ldr	r5, .L1088
+	.loc 2 2759 0
+	beq	.L1080
+	.loc 2 2760 0
+	ldr	r3, [r5, #2300]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1076
-	.loc 2 2713 0
+	cbnz	r2, .L1081
+	.loc 2 2761 0
 	mov	r1, r0
-	ldr	r0, .L1083+4
+	ldr	r0, .L1088+4
 	bl	printk
-.LVL886:
-	.loc 2 2714 0
-	ldr	r3, [r5, #2260]
+.LVL903:
+	.loc 2 2762 0
+	ldr	r3, [r5, #2300]
 	ldrh	r6, [r3, r4, lsl #1]
-	cbz	r6, .L1077
-.L1081:
-	.loc 2 2723 0
+	cbz	r6, .L1082
+.L1086:
+	.loc 2 2771 0
 	movs	r6, #0
-.L1074:
-	.loc 2 2733 0
+.L1079:
+	.loc 2 2781 0
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.LVL887:
-.L1077:
-	.loc 2 2714 0 discriminator 1
-	movw	r2, #2714
+.LVL904:
 .L1082:
-	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1083+8
-	ldr	r0, .L1083+12
+	.loc 2 2762 0 discriminator 1
+	movw	r2, #2762
+.L1087:
+	.loc 2 2778 0 discriminator 2
+	ldr	r1, .L1088+8
+	ldr	r0, .L1088+12
 	bl	printk
-.LVL888:
-	b	.L1074
-.LVL889:
-.L1076:
-	.loc 2 2717 0
+.LVL905:
+	b	.L1079
+.LVL906:
+.L1081:
+	.loc 2 2765 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1075:
-	.loc 2 2721 0
+.L1080:
+	.loc 2 2769 0
 	ldrh	r0, [r5, #3952]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1079
-	.loc 2 2722 0
+	bne	.L1084
+	.loc 2 2770 0
 	strh	r4, [r5, #3952]	@ movhi
-	b	.L1081
-.L1079:
-	.loc 2 2724 0
+	b	.L1086
+.L1084:
+	.loc 2 2772 0
 	cmp	r4, r0
-	beq	.L1081
-	.loc 2 2727 0
+	beq	.L1086
+	.loc 2 2775 0
 	bl	update_vpc_list
-.LVL890:
-	.loc 2 2730 0
-	ldr	r2, [r5, #2252]
-	.loc 2 2727 0
+.LVL907:
+	.loc 2 2778 0
+	ldr	r2, [r5, #2292]
+	.loc 2 2775 0
 	adds	r6, r0, #0
-	.loc 2 2730 0
-	ldr	r3, [r5, #2256]
-	.loc 2 2727 0
+	.loc 2 2778 0
+	ldr	r3, [r5, #2296]
+	.loc 2 2775 0
 	it	ne
 	movne	r6, #1
-	.loc 2 2729 0
+	.loc 2 2777 0
 	strh	r4, [r5, #3952]	@ movhi
-	.loc 2 2730 0
+	.loc 2 2778 0
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1083+16
+	ldr	r3, .L1088+16
 	muls	r3, r2, r3
-	ldr	r2, [r5, #2260]
+	ldr	r2, [r5, #2300]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1074
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	bne	.L1079
+	.loc 2 2778 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
-	beq	.L1074
-	.loc 2 2730 0 discriminator 2
-	movw	r2, #2730
-	b	.L1082
-.L1084:
+	beq	.L1079
+	.loc 2 2778 0 discriminator 2
+	movw	r2, #2778
+	b	.L1087
+.L1089:
 	.align	2
-.L1083:
+.L1088:
 	.word	.LANCHOR0
-	.word	.LC94
+	.word	.LC97
 	.word	.LANCHOR1+401
 	.word	.LC1
 	.word	-1431655765
@@ -11555,175 +11654,175 @@ decrement_vpc_count:
 FtlWriteDump_data:
 	.fnstart
 .LFB218:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI135:
+.LCFI136:
 	.pad #24
 	sub	sp, sp, #24
-.LCFI136:
-	.loc 2 948 0
-	ldr	r4, .L1103
-	ldrh	r2, [r4, #2284]
+.LCFI137:
+	.loc 2 997 0
+	ldr	r4, .L1108
+	ldrh	r2, [r4, #2328]
 	cmp	r2, #0
-	beq	.L1086
-	.loc 2 948 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #2288]	@ zero_extendqisi2
+	beq	.L1091
+	.loc 2 997 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1086
-	.loc 2 949 0 is_stmt 1
-	ldrb	r1, [r4, #2287]	@ zero_extendqisi2
+	bne	.L1091
+	.loc 2 998 0 is_stmt 1
+	ldrb	r1, [r4, #2331]	@ zero_extendqisi2
 	ldrh	r3, [r4, #78]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1086
-.LBB445:
-.LBB446:
-	.loc 2 956 0
-	ldrb	r7, [r4, #2290]	@ zero_extendqisi2
-	cbnz	r7, .L1085
-	.loc 2 951 0
-	ldr	r6, [r4, #2436]
-	.loc 2 958 0
+	beq	.L1091
+.LBB469:
+.LBB470:
+	.loc 2 1005 0
+	ldrb	r7, [r4, #2334]	@ zero_extendqisi2
+	cbnz	r7, .L1090
+	.loc 2 1000 0
+	ldr	r6, [r4, #2480]
+	.loc 2 1007 0
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	r8, [r4, #8]
-	.loc 2 951 0
+	.loc 2 1000 0
 	subs	r6, r6, #1
-.LVL891:
-	.loc 2 958 0
+.LVL908:
+	.loc 2 1007 0
 	mov	r0, r6
 	bl	log2phys
-.LVL892:
-	.loc 2 961 0
+.LVL909:
+	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 964 0
+	.loc 2 1013 0
 	ldr	r5, [r4, #3244]
-	.loc 2 963 0
-	ldr	r0, [r4, #2244]
-	.loc 2 961 0
+	.loc 2 1012 0
+	ldr	r0, [r4, #3240]
+	.loc 2 1010 0
 	str	r3, [sp, #8]
-	.loc 2 967 0
+	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 962 0
+	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 963 0
+	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 964 0
+	.loc 2 1013 0
 	str	r5, [sp, #16]
-	.loc 2 966 0
+	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 967 0
-	beq	.L1088
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L1093
+	.loc 2 1018 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL893:
-.L1089:
-	.loc 2 986 0
-	ldr	r9, .L1103+4
-	.loc 2 975 0
+.LVL910:
+.L1094:
+	.loc 2 1035 0
+	ldr	r9, .L1108+4
+	.loc 2 1024 0
 	movs	r7, #0
-	.loc 2 953 0
+	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL894:
-	.loc 2 987 0
+.LVL911:
+	.loc 2 1036 0
 	mov	r10, r7
-	.loc 2 975 0
+	.loc 2 1024 0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1090:
-	.loc 2 976 0
+.L1095:
+	.loc 2 1025 0
 	cmp	r8, r7
-	bne	.L1094
-.L1091:
-	.loc 2 992 0
+	bne	.L1099
+.L1096:
+	.loc 2 1041 0
 	movs	r3, #1
-.L1102:
-.LBE446:
-.LBE445:
-	.loc 2 998 0
-	strb	r3, [r4, #2290]
-.L1085:
-	.loc 2 1000 0
+.L1107:
+.LBE470:
+.LBE469:
+	.loc 2 1047 0
+	strb	r3, [r4, #2334]
+.L1090:
+	.loc 2 1049 0
 	add	sp, sp, #24
-.LCFI137:
+.LCFI138:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL895:
-.L1088:
-.LCFI138:
-.LBB448:
-.LBB447:
-	.loc 2 973 0
+.LVL912:
+.L1093:
+.LCFI139:
+.LBB472:
+.LBB471:
+	.loc 2 1022 0
 	ldrh	r2, [r4, #86]
 	movs	r1, #255
 	bl	ftl_memset
-.LVL896:
-	b	.L1089
-.LVL897:
-.L1094:
-	.loc 2 978 0
-	ldrh	r3, [r4, #2284]
+.LVL913:
+	b	.L1094
+.LVL914:
+.L1099:
+	.loc 2 1027 0
+	ldrh	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L1091
-	.loc 2 983 0
+	beq	.L1096
+	.loc 2 1032 0
 	ldr	r3, [sp, #8]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	r0, r9
-	.loc 2 982 0
+	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 983 0
+	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 984 0
-	ldrh	r3, [r4, #2280]
+	.loc 2 1033 0
+	ldrh	r3, [r4, #2324]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 986 0
+	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL898:
-	.loc 2 987 0
-	ldr	r3, [r4, #2476]
-	.loc 2 988 0
+.LVL915:
+	.loc 2 1036 0
+	ldr	r3, [r4, #2520]
+	.loc 2 1037 0
 	movs	r1, #1
-	.loc 2 986 0
+	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 988 0
+	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r10
-	str	r3, [r4, #2476]
-	.loc 2 988 0
+	str	r3, [r4, #2520]
+	.loc 2 1037 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL899:
-	.loc 2 990 0
-	ldrh	r0, [r4, #2280]
+.LVL916:
+	.loc 2 1039 0
+	ldrh	r0, [r4, #2324]
 	bl	decrement_vpc_count
-.LVL900:
-	b	.L1090
-.LVL901:
-.L1086:
-.LBE447:
-.LBE448:
-	.loc 2 998 0
+.LVL917:
+	b	.L1095
+.LVL918:
+.L1091:
+.LBE471:
+.LBE472:
+	.loc 2 1047 0
 	movs	r3, #0
-	b	.L1102
-.L1104:
+	b	.L1107
+.L1109:
 	.align	2
-.L1103:
+.L1108:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2280
+	.word	.LANCHOR0+2324
 .LFE218:
 	.fnend
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -11737,48 +11836,48 @@ FtlWriteDump_data:
 l2p_flush:
 	.fnstart
 .LFB211:
-	.loc 2 740 0
+	.loc 2 789 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI139:
-	.loc 2 746 0
+.LCFI140:
+	.loc 2 795 0
 	movs	r4, #0
-	ldr	r5, .L1109
-	.loc 2 747 0
+	ldr	r5, .L1114
+	.loc 2 796 0
 	movs	r6, #12
-	.loc 2 744 0
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL902:
-.L1106:
-	.loc 2 746 0 discriminator 1
+.LVL919:
+.L1111:
+	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5, #114]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1108
-	.loc 2 750 0
+	bhi	.L1113
+	.loc 2 799 0
 	movs	r0, #0
-.LVL903:
+.LVL920:
 	pop	{r4, r5, r6, pc}
-.LVL904:
-.L1108:
-	.loc 2 747 0
-	ldr	r2, [r5, #2424]
+.LVL921:
+.L1113:
+	.loc 2 796 0
+	ldr	r2, [r5, #2468]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1107
-	.loc 2 748 0
+	bge	.L1112
+	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL905:
-.L1107:
+.LVL922:
+.L1112:
 	adds	r4, r4, #1
-	b	.L1106
-.L1110:
+	b	.L1111
+.L1115:
 	.align	2
-.L1109:
+.L1114:
 	.word	.LANCHOR0
 .LFE211:
 	.fnend
@@ -11793,251 +11892,251 @@ l2p_flush:
 FtlRecoverySuperblock:
 	.fnstart
 .LFB231:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL906:
+.LVL923:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI140:
-	.loc 2 1670 0
+.LCFI141:
+	.loc 2 1719 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.pad #52
 	sub	sp, sp, #52
-.LCFI141:
-	.loc 2 1656 0
+.LCFI142:
+	.loc 2 1705 0
 	mov	fp, r0
-	.loc 2 1670 0
+	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1236
-	.loc 2 1675 0
+	beq	.L1241
+	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
-.LVL907:
-	.loc 2 1681 0
-	ldr	r4, .L1243
-	.loc 2 1675 0
+.LVL924:
+	.loc 2 1730 0
+	ldr	r4, .L1248
+	.loc 2 1724 0
 	str	r3, [sp, #8]
-	.loc 2 1676 0
+	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-.LVL908:
-	.loc 2 1681 0
+.LVL925:
+	.loc 2 1730 0
 	ldr	r1, [sp, #8]
-.LVL909:
-	.loc 2 1676 0
+.LVL926:
+	.loc 2 1725 0
 	str	r3, [sp, #24]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	ldrh	r3, [r4, #78]
-.LVL910:
+.LVL927:
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1114
-	.loc 2 1682 0
+	bne	.L1119
+	.loc 2 1731 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL911:
-.L1241:
-	.loc 2 1989 0
+.LVL928:
+.L1246:
+	.loc 2 2038 0
 	strb	r3, [fp, #6]
-.L1236:
-	.loc 2 2010 0
+.L1241:
+	.loc 2 2059 0
 	movs	r0, #0
 	add	sp, sp, #52
-.LCFI142:
+.LCFI143:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL912:
-.L1114:
-.LCFI143:
-	.loc 2 1689 0
+.LVL929:
+.L1119:
+.LCFI144:
+	.loc 2 1738 0
 	ldrh	r0, [r0, #16]
-.LVL913:
-.L1115:
-	.loc 2 1690 0
+.LVL930:
+.L1120:
+	.loc 2 1739 0
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1116
-	.loc 2 1697 0
+	beq	.L1121
+	.loc 2 1746 0
 	movs	r1, #1
-.LVL914:
+.LVL931:
 	bl	FtlGetLastWrittenPage
-.LVL915:
-	.loc 2 1705 0
+.LVL932:
+	.loc 2 1754 0
 	adds	r7, r0, #1
-	.loc 2 1697 0
+	.loc 2 1746 0
 	mov	r6, r0
-.LVL916:
-	.loc 2 1705 0
-	beq	.L1117
-	.loc 2 1721 0
-	ldr	r3, [r4, #3152]
-	.loc 2 1722 0
+.LVL933:
+	.loc 2 1754 0
+	beq	.L1122
+	.loc 2 1770 0
+	ldr	r3, [r4, #3148]
+	.loc 2 1771 0
 	movs	r2, #0
-	.loc 2 1717 0
+	.loc 2 1766 0
 	ldrh	lr, [r4, #8]
-	.loc 2 1719 0
+	.loc 2 1768 0
 	movw	r9, #65535
-	.loc 2 1720 0
+	.loc 2 1769 0
 	ldr	r0, [r4, #3792]
 	mov	r10, #20
-	.loc 2 1721 0
+	.loc 2 1770 0
 	str	r3, [sp, #4]
 	ldrh	r3, [r4, #86]
-	.loc 2 1722 0
-	ldr	r8, [r4, #3156]
+	.loc 2 1771 0
+	ldr	r8, [r4, #3152]
 	ldrh	r7, [r4, #88]
 	mov	r4, r2
-	.loc 2 1721 0
+	.loc 2 1770 0
 	str	r3, [sp, #12]
 	add	r3, fp, #16
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mov	ip, r3
 	str	r3, [sp, #20]
-.L1118:
-	.loc 2 1717 0 discriminator 1
+.L1123:
+	.loc 2 1766 0 discriminator 1
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L1124
-	.loc 2 1728 0
-	ldr	r5, .L1243
-	.loc 2 1727 0
+	bhi	.L1129
+	.loc 2 1777 0
+	ldr	r5, .L1248
+	.loc 2 1776 0
 	movs	r2, #0
 	mov	r1, r4
-	.loc 2 1666 0
+	.loc 2 1715 0
 	movw	r9, #65535
-	.loc 2 1727 0
+	.loc 2 1776 0
 	bl	FlashReadPages
-.LVL917:
-	.loc 2 1728 0
-	ldr	r3, [r5, #2476]
-	.loc 2 1742 0
+.LVL934:
+	.loc 2 1777 0
+	ldr	r3, [r5, #2520]
+	.loc 2 1791 0
 	uxth	r2, r6
-	.loc 2 1730 0
+	.loc 2 1779 0
 	ldr	r8, [r5, #3792]
-	.loc 2 1742 0
+	.loc 2 1791 0
 	str	r2, [sp, #12]
-	.loc 2 1728 0
+	.loc 2 1777 0
 	subs	r3, r3, #1
-.LVL918:
+.LVL935:
 	str	r3, [sp, #4]
 	mov	r7, r8
-	.loc 2 1729 0
+	.loc 2 1778 0
 	movs	r3, #0
-.LVL919:
-.L1125:
+.LVL936:
+.L1130:
 	uxth	r2, r3
-.LVL920:
-	.loc 2 1729 0 is_stmt 0 discriminator 1
+.LVL937:
+	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r4, r2
-	bhi	.L1130
-	.loc 2 1745 0 is_stmt 1
-	bne	.L1128
-	.loc 2 1747 0
+	bhi	.L1135
+	.loc 2 1794 0 is_stmt 1
+	bne	.L1133
+	.loc 2 1796 0
 	adds	r3, r6, #1
 	uxth	r3, r3
-.LVL921:
+.LVL938:
 	str	r3, [sp, #16]
-.L1237:
-	.loc 2 1753 0
+.L1242:
+	.loc 2 1802 0
 	ldr	r0, [r8, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL922:
-	.loc 2 1758 0
+.LVL939:
+	.loc 2 1807 0
 	ldrh	r3, [r5, #78]
 	ldr	r2, [sp, #16]
-.LVL923:
-	.loc 2 1753 0
+.LVL940:
+	.loc 2 1802 0
 	str	r0, [sp, #12]
-	.loc 2 1758 0
+	.loc 2 1807 0
 	cmp	r3, r2
-	bne	.L1132
-	.loc 2 1759 0
+	bne	.L1137
+	.loc 2 1808 0
 	ldrh	r3, [sp, #16]
 	strh	r3, [fp, #2]	@ movhi
-	.loc 2 1760 0
+	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [fp, #6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	r3, [fp, #4]	@ movhi
-.L1132:
-	.loc 2 1764 0
+.L1137:
+	.loc 2 1813 0
 	ldr	r3, [sp, #16]
-.LVL924:
+.LVL941:
 	ldr	r2, [sp, #8]
-.LVL925:
+.LVL942:
 	cmp	r3, r2
-	bne	.L1133
-	.loc 2 1764 0 is_stmt 0 discriminator 1
+	bne	.L1138
+	.loc 2 1813 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
-.LVL926:
+.LVL943:
 	ldr	r2, [sp, #24]
-.LVL927:
+.LVL944:
 	cmp	r3, r2
-	bne	.L1133
-	.loc 2 1765 0 is_stmt 1
+	bne	.L1138
+	.loc 2 1814 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	mov	r2, r3
-.LVL928:
-.L1242:
-	.loc 2 2004 0
+.LVL945:
+.L1247:
+	.loc 2 2053 0
 	mov	r0, fp
-.LVL929:
+.LVL946:
 	bl	ftl_sb_update_avl_pages
-.LVL930:
-	b	.L1236
-.LVL931:
-.L1116:
-	.loc 2 1692 0
+.LVL947:
+	b	.L1241
+.LVL948:
+.L1121:
+	.loc 2 1741 0
 	uxth	r1, r3
-.LVL932:
+.LVL949:
 	adds	r1, r1, #8
 	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1115
-.LVL933:
-.L1117:
-	.loc 2 1706 0
+	b	.L1120
+.LVL950:
+.L1122:
+	.loc 2 1755 0
 	ldr	r3, [sp, #8]
-.LVL934:
-	cbz	r3, .L1119
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	movw	r2, #1706
-	ldr	r1, .L1243+4
-	ldr	r0, .L1243+8
+.LVL951:
+	cbz	r3, .L1124
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	movw	r2, #1755
+	ldr	r1, .L1248+4
+	ldr	r0, .L1248+8
 	bl	printk
-.LVL935:
-.L1119:
-	.loc 2 1707 0 is_stmt 1
+.LVL952:
+.L1124:
+	.loc 2 1756 0 is_stmt 1
 	ldr	r3, [sp, #24]
-.LVL936:
-	cbz	r3, .L1120
-	.loc 2 1707 0 is_stmt 0 discriminator 1
+.LVL953:
+	cbz	r3, .L1125
+	.loc 2 1756 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1120
-	.loc 2 1707 0 discriminator 2
-	movw	r2, #1707
-	ldr	r1, .L1243+4
-	ldr	r0, .L1243+8
+	beq	.L1125
+	.loc 2 1756 0 discriminator 2
+	movw	r2, #1756
+	ldr	r1, .L1248+4
+	ldr	r0, .L1248+8
 	bl	printk
-.LVL937:
-.L1120:
-	.loc 2 1708 0 is_stmt 1
+.LVL954:
+.L1125:
+	.loc 2 1757 0 is_stmt 1
 	movs	r3, #0
-.LVL938:
+.LVL955:
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1241
-.L1124:
-	.loc 2 1718 0
+	b	.L1246
+.L1129:
+	.loc 2 1767 0
 	ldrh	r3, [ip], #2
-	.loc 2 1719 0
+	.loc 2 1768 0
 	cmp	r3, r9
-	beq	.L1121
-	.loc 2 1720 0
+	beq	.L1126
+	.loc 2 1769 0
 	mla	r1, r10, r4, r0
 	orr	r3, r6, r3, lsl #10
 	str	r3, [r1, #4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	ldr	r3, [sp, #12]
 	muls	r3, r4, r3
 	it	mi
@@ -12046,762 +12145,762 @@ FtlRecoverySuperblock:
 	mov	r5, r3
 	ldr	r3, [sp, #4]
 	add	r5, r5, r3
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mov	r3, r7
 	muls	r3, r4, r3
-	.loc 2 1723 0
+	.loc 2 1772 0
 	add	r4, r4, #1
-	.loc 2 1722 0
+	.loc 2 1771 0
 	it	mi
 	addmi	r3, r3, #3
-	.loc 2 1723 0
+	.loc 2 1772 0
 	uxth	r4, r4
-	.loc 2 1722 0
+	.loc 2 1771 0
 	bic	r3, r3, #3
-	.loc 2 1721 0
+	.loc 2 1770 0
 	str	r5, [r1, #8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	add	r3, r3, r8
 	str	r3, [r1, #12]
-.L1121:
+.L1126:
 	adds	r2, r2, #1
-	b	.L1118
-.LVL939:
-.L1130:
-	.loc 2 1730 0
+	b	.L1123
+.LVL956:
+.L1135:
+	.loc 2 1779 0
 	ldr	r2, [r7]
-.LVL940:
-	cbnz	r2, .L1126
-	.loc 2 1731 0
+.LVL957:
+	cbnz	r2, .L1131
+	.loc 2 1780 0
 	ldr	r10, [r7, #12]
-	.loc 2 1732 0
+	.loc 2 1781 0
 	ldr	r2, [r10, #4]
 	adds	r0, r2, #1
-	beq	.L1127
-	.loc 2 1733 0
-	ldr	r1, [r5, #2476]
+	beq	.L1132
+	.loc 2 1782 0
+	ldr	r1, [r5, #2520]
 	mov	r0, r2
 	bl	ftl_cmp_data_ver
-.LVL941:
-	cbz	r0, .L1127
-	.loc 2 1735 0
+.LVL958:
+	cbz	r0, .L1132
+	.loc 2 1784 0
 	adds	r2, r2, #1
-	str	r2, [r5, #2476]
-.L1127:
-	.loc 2 1738 0
+	str	r2, [r5, #2520]
+.L1132:
+	.loc 2 1787 0
 	ldr	r2, [r10]
 	adds	r2, r2, #1
-	bne	.L1129
-.LVL942:
-.L1128:
-	.loc 2 1752 0
+	bne	.L1134
+.LVL959:
+.L1133:
+	.loc 2 1801 0
 	uxth	r2, r6
-.LVL943:
-	.loc 2 1753 0
+.LVL960:
+	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1752 0
+	.loc 2 1801 0
 	str	r2, [sp, #16]
-	.loc 2 1753 0
+	.loc 2 1802 0
 	movs	r2, #20
-.LVL944:
+.LVL961:
 	mla	r8, r2, r3, r8
-	b	.L1237
-.L1126:
-	.loc 2 1742 0
+	b	.L1242
+.L1131:
+	.loc 2 1791 0
 	ldr	r9, [sp, #12]
-.L1129:
+.L1134:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1125
-.LVL945:
-.L1133:
-	.loc 2 1770 0
+	b	.L1130
+.LVL962:
+.L1138:
+	.loc 2 1819 0
 	movw	r3, #65535
-.LVL946:
+.LVL963:
 	cmp	r9, r3
-	bne	.L1134
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1139
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	r3, [fp, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1135
-.L1134:
-.LBB449:
-	.loc 2 1775 0 is_stmt 1
+	bne	.L1140
+.L1139:
+.LBB473:
+	.loc 2 1824 0 is_stmt 1
 	ldr	r3, [r5, #3964]
-	.loc 2 1774 0
+	.loc 2 1823 0
 	uxth	r8, r6
-	.loc 2 1778 0
+	.loc 2 1827 0
 	uxth	r6, r6
-.LVL947:
-	ldr	r7, .L1243
-	.loc 2 1784 0
+.LVL964:
+	ldr	r7, .L1248
+	.loc 2 1833 0
 	movw	r9, #65535
-	.loc 2 1775 0
+	.loc 2 1824 0
 	adds	r3, r3, #1
-	.loc 2 1776 0
+	.loc 2 1825 0
 	itt	eq
 	ldreq	r3, [sp, #4]
-.LVL948:
+.LVL965:
 	streq	r3, [r5, #3964]
-	.loc 2 1778 0
+	.loc 2 1827 0
 	ldr	r3, [sp, #8]
-.LVL949:
+.LVL966:
 	adds	r3, r3, #7
-.LVL950:
+.LVL967:
 	cmp	r6, r3
-	.loc 2 1779 0
+	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r8, #7
 	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L1138:
-	.loc 2 1780 0 discriminator 1
+.L1143:
+	.loc 2 1829 0 discriminator 1
 	cmp	r4, r8
-	bhi	.L1145
-	.loc 2 1785 0
+	bhi	.L1150
+	.loc 2 1834 0
 	movs	r3, #0
-	.loc 2 1782 0
+	.loc 2 1831 0
 	ldrh	lr, [r7, #8]
-	.loc 2 1785 0
+	.loc 2 1834 0
 	ldr	r0, [r7, #3792]
 	mov	r6, r3
 	ldr	r1, [sp, #20]
 	mov	ip, #20
-	b	.L1146
-.LVL951:
-.L1140:
-	.loc 2 1783 0
+	b	.L1151
+.LVL968:
+.L1145:
+	.loc 2 1832 0
 	ldrh	r2, [r1], #2
-	.loc 2 1784 0
+	.loc 2 1833 0
 	cmp	r2, r9
-	beq	.L1139
-	.loc 2 1785 0
+	beq	.L1144
+	.loc 2 1834 0
 	mla	r10, ip, r6, r0
-	.loc 2 1786 0
+	.loc 2 1835 0
 	adds	r6, r6, #1
-	.loc 2 1785 0
+	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-	.loc 2 1786 0
+	.loc 2 1835 0
 	uxth	r6, r6
-	.loc 2 1785 0
+	.loc 2 1834 0
 	str	r2, [r10, #4]
-.L1139:
+.L1144:
 	adds	r3, r3, #1
-.LVL952:
-.L1146:
-	.loc 2 1782 0 discriminator 1
+.LVL969:
+.L1151:
+	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
-.LVL953:
+.LVL970:
 	cmp	r2, lr
-	bcc	.L1140
-	.loc 2 1789 0
+	bcc	.L1145
+	.loc 2 1838 0
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.LVL954:
-	.loc 2 1791 0
+.LVL971:
+	.loc 2 1840 0
 	ldr	r3, [r7, #3792]
 	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1141:
-	.loc 2 1790 0 discriminator 1
+.L1146:
+	.loc 2 1839 0 discriminator 1
 	cmp	r6, r3
-	bne	.L1144
-	.loc 2 1780 0
+	bne	.L1149
+	.loc 2 1829 0
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1138
-.L1144:
-	.loc 2 1791 0
+	b	.L1143
+.L1149:
+	.loc 2 1840 0
 	ldr	r2, [r3]
-	cbnz	r2, .L1135
-	.loc 2 1792 0
+	cbnz	r2, .L1140
+	.loc 2 1841 0
 	ldr	r2, [r3, #12]
-	.loc 2 1793 0
+	.loc 2 1842 0
 	ldrh	r1, [r2]
 	cmp	r1, r9
-	beq	.L1143
-	.loc 2 1795 0
+	beq	.L1148
+	.loc 2 1844 0
 	ldr	r2, [r2, #4]
 	adds	r1, r2, #1
-	.loc 2 1797 0
+	.loc 2 1846 0
 	it	ne
 	strne	r2, [r7, #3964]
-.L1143:
+.L1148:
 	adds	r3, r3, #20
-	b	.L1141
-.LVL955:
-.L1145:
-	.loc 2 1809 0
+	b	.L1146
+.LVL972:
+.L1150:
+	.loc 2 1858 0
 	mov	r3, #-1
 	str	r3, [r7, #3964]
-.LVL956:
-.L1135:
-.LBE449:
-	.loc 2 1814 0
+.LVL973:
+.L1140:
+.LBE473:
+	.loc 2 1863 0
 	movs	r3, #1
-	.loc 2 1815 0
-	ldr	r0, .L1243+12
-	.loc 2 1814 0
+	.loc 2 1864 0
+	ldr	r0, .L1248+12
+	.loc 2 1863 0
 	strh	r3, [r5, #3968]	@ movhi
-	.loc 2 1821 0
-	ldr	r4, .L1243
-	.loc 2 1815 0
+	.loc 2 1870 0
+	ldr	r4, .L1248
+	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL957:
+.LVL974:
 	ldr	r5, [sp, #8]
-.LVL958:
-.L1147:
-	.loc 2 1821 0
+.LVL975:
+.L1152:
+	.loc 2 1870 0
 	ldrh	r6, [r4, #8]
-.LVL959:
+.LVL976:
 	movs	r3, #0
-	.loc 2 1824 0
+	.loc 2 1873 0
 	ldr	r0, [r4, #3792]
-.LVL960:
-	.loc 2 1820 0
+.LVL977:
+	.loc 2 1869 0
 	mov	r10, r3
-	.loc 2 1821 0
+	.loc 2 1870 0
 	ldr	r1, [sp, #20]
-	.loc 2 1823 0
+	.loc 2 1872 0
 	movw	r7, #65535
-	.loc 2 1824 0
+	.loc 2 1873 0
 	mov	ip, #20
-.L1148:
-	.loc 2 1821 0 discriminator 1
+.L1153:
+	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
-.LVL961:
+.LVL978:
 	cmp	r6, r2
-	bhi	.L1150
-	.loc 2 1828 0
+	bhi	.L1155
+	.loc 2 1877 0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.LVL962:
-	.loc 2 1829 0
+.LVL979:
+	.loc 2 1878 0
 	movs	r3, #0
-.LVL963:
-.L1240:
+.LVL980:
+.L1245:
 	str	r3, [sp, #28]
-	.loc 2 1829 0 is_stmt 0 discriminator 2
+	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldrh	r3, [sp, #28]
 	cmp	r10, r3
-	bhi	.L1180
-	.loc 2 1982 0 is_stmt 1
+	bhi	.L1185
+	.loc 2 2031 0 is_stmt 1
 	adds	r5, r5, #1
-	.loc 2 1983 0
+	.loc 2 2032 0
 	ldrh	r3, [r4, #78]
-	.loc 2 1982 0
+	.loc 2 2031 0
 	uxth	r5, r5
-	.loc 2 1983 0
+	.loc 2 2032 0
 	cmp	r3, r5
-	bne	.L1147
-	.loc 2 1986 0
+	bne	.L1152
+	.loc 2 2035 0
 	ldrh	r2, [r4, #8]
-.LVL964:
-	.loc 2 1988 0
+.LVL981:
+	.loc 2 2037 0
 	movw	r0, #65535
-.LVL965:
-	.loc 2 1985 0
+.LVL982:
+	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	r5, [fp, #2]	@ movhi
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	r3, [fp, #4]	@ movhi
-.L1181:
-	.loc 2 1986 0 discriminator 1
+.L1186:
+	.loc 2 2035 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1236
-	.loc 2 1987 0
+	bcs	.L1241
+	.loc 2 2036 0
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
-	.loc 2 1988 0
+	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 1987 0
+	.loc 2 2036 0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	.loc 2 1988 0
-	bne	.L1241
+	.loc 2 2037 0
+	bne	.L1246
 	mov	r3, r1
-	b	.L1181
-.LVL966:
-.L1150:
-	.loc 2 1822 0
+	b	.L1186
+.LVL983:
+.L1155:
+	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-	.loc 2 1823 0
+	.loc 2 1872 0
 	cmp	r2, r7
-	beq	.L1149
-	.loc 2 1824 0
+	beq	.L1154
+	.loc 2 1873 0
 	mla	lr, ip, r10, r0
-	.loc 2 1825 0
+	.loc 2 1874 0
 	add	r10, r10, #1
-	.loc 2 1824 0
+	.loc 2 1873 0
 	orr	r2, r5, r2, lsl #10
-	.loc 2 1825 0
+	.loc 2 1874 0
 	uxth	r10, r10
-	.loc 2 1824 0
+	.loc 2 1873 0
 	str	r2, [lr, #4]
-.L1149:
+.L1154:
 	adds	r3, r3, #1
-	b	.L1148
-.L1244:
+	b	.L1153
+.L1249:
 	.align	2
-.L1243:
+.L1248:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
 	.word	.LANCHOR0+3864
-.LVL967:
-.L1180:
+.LVL984:
+.L1185:
 	ldr	r3, [sp, #28]
 	movs	r7, #20
-	.loc 2 1830 0
+	.loc 2 1879 0
 	ldr	r9, [r4, #3792]
-.LVL968:
+.LVL985:
 	muls	r7, r3, r7
 	add	r8, r9, r7
 	ldr	r6, [r8, #4]
-.LVL969:
-	.loc 2 1831 0
+.LVL986:
+	.loc 2 1880 0
 	ubfx	r0, r6, #10, #16
-.LVL970:
-	.loc 2 1830 0
+.LVL987:
+	.loc 2 1879 0
 	str	r6, [sp, #44]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	bl	P2V_plane
-.LVL971:
-	.loc 2 1833 0
+.LVL988:
+	.loc 2 1882 0
 	ldr	r3, [sp, #8]
-.LVL972:
+.LVL989:
 	cmp	r5, r3
-	bcc	.L1152
-	.loc 2 1833 0 is_stmt 0 discriminator 1
-	bne	.L1153
-	.loc 2 1834 0 is_stmt 1
+	bcc	.L1157
+	.loc 2 1882 0 is_stmt 0 discriminator 1
+	bne	.L1158
+	.loc 2 1883 0 is_stmt 1
 	ldr	r3, [sp, #24]
-.LVL973:
+.LVL990:
 	cmp	r3, r0
-	bhi	.L1152
-.LVL974:
-.L1153:
-	.loc 2 1837 0
+	bhi	.L1157
+.LVL991:
+.L1158:
+	.loc 2 1886 0
 	ldr	r3, [sp, #16]
-.LVL975:
+.LVL992:
 	cmp	r5, r3
-	bne	.L1154
-	.loc 2 1837 0 is_stmt 0 discriminator 1
+	bne	.L1159
+	.loc 2 1886 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
-.LVL976:
+.LVL993:
 	cmp	r3, r0
-	beq	.L1155
-.LVL977:
-.L1154:
-	.loc 2 1841 0 is_stmt 1
+	beq	.L1160
+.LVL994:
+.L1159:
+	.loc 2 1890 0 is_stmt 1
 	ldr	r3, [r9, r7]
-.LVL978:
+.LVL995:
 	adds	r3, r3, #1
-	beq	.L1156
-	.loc 2 1842 0
+	beq	.L1161
+	.loc 2 1891 0
 	ldr	r8, [r8, #12]
-	.loc 2 1843 0
+	.loc 2 1892 0
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1157
-.LVL979:
-.L1164:
-.LBB450:
-	.loc 2 1876 0
+	beq	.L1162
+.LVL996:
+.L1169:
+.LBB474:
+	.loc 2 1925 0
 	ldrh	r0, [fp]
-.LVL980:
-.L1239:
-.LBE450:
-	.loc 2 1960 0
+.LVL997:
+.L1244:
+.LBE474:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL981:
-.L1152:
+.LVL998:
+.L1157:
 	ldr	r3, [sp, #28]
-.LVL982:
+.LVL999:
 	adds	r3, r3, #1
-	b	.L1240
-.LVL983:
-.L1157:
-	.loc 2 1849 0
+	b	.L1245
+.LVL1000:
+.L1162:
+	.loc 2 1898 0
 	ldr	r3, [r8, #4]
-.LVL984:
-	.loc 2 1850 0
+.LVL1001:
+	.loc 2 1899 0
 	adds	r6, r3, #1
-	.loc 2 1849 0
+	.loc 2 1898 0
 	str	r3, [sp, #4]
-	.loc 2 1850 0
-	beq	.L1158
-	.loc 2 1851 0 discriminator 1
-	ldr	r1, [r4, #2476]
+	.loc 2 1899 0
+	beq	.L1163
+	.loc 2 1900 0 discriminator 1
+	ldr	r1, [r4, #2520]
 	mov	r0, r3
-.LVL985:
+.LVL1002:
 	bl	ftl_cmp_data_ver
-.LVL986:
-	.loc 2 1850 0 discriminator 1
-	cbz	r0, .L1158
-	.loc 2 1853 0
+.LVL1003:
+	.loc 2 1899 0 discriminator 1
+	cbz	r0, .L1163
+	.loc 2 1902 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-.LVL987:
-	str	r3, [r4, #2476]
-.LVL988:
-.L1158:
-	.loc 2 1856 0
+.LVL1004:
+	str	r3, [r4, #2520]
+.LVL1005:
+.L1163:
+	.loc 2 1905 0
 	ldrh	r2, [r8]
 	movw	r3, #61589
-.LVL989:
+.LVL1006:
 	cmp	r2, r3
-	beq	.L1159
-	.loc 2 1856 0 is_stmt 0 discriminator 1
-	mov	r2, #1856
-	ldr	r1, .L1245
-	ldr	r0, .L1245+4
-.LVL990:
+	beq	.L1164
+	.loc 2 1905 0 is_stmt 0 discriminator 1
+	movw	r2, #1905
+	ldr	r1, .L1250
+	ldr	r0, .L1250+4
+.LVL1007:
 	bl	printk
-.LVL991:
-.L1159:
-	.loc 2 1857 0 is_stmt 1
+.LVL1008:
+.L1164:
+	.loc 2 1906 0 is_stmt 1
 	ldr	r6, [r8, #8]
-.LVL992:
-	.loc 2 1859 0
+.LVL1009:
+	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1858 0
+	.loc 2 1907 0
 	ldr	r3, [r8, #12]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r6
-.LVL993:
-	.loc 2 1858 0
+.LVL1010:
+	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	bl	log2phys
-.LVL994:
-	.loc 2 1860 0
+.LVL1011:
+	.loc 2 1909 0
 	ldr	r1, [r4, #3964]
 	adds	r0, r1, #1
-	beq	.L1160
-	.loc 2 1861 0 discriminator 1
+	beq	.L1165
+	.loc 2 1910 0 discriminator 1
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
-.LVL995:
-	.loc 2 1860 0 discriminator 1
+.LVL1012:
+	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1160
-.LBB451:
-	.loc 2 1865 0
+	beq	.L1165
+.LBB475:
+	.loc 2 1914 0
 	ldr	r3, [sp, #36]
 	adds	r2, r3, #1
-	beq	.L1161
-	.loc 2 1866 0
+	beq	.L1166
+	.loc 2 1915 0
 	ldr	r0, [r4, #3792]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	r0, r0, r7
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1866 0
+	.loc 2 1915 0
 	ldr	r8, [r0, #12]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL996:
-	.loc 2 1881 0
+.LVL1013:
+	.loc 2 1930 0
 	ldr	r2, [r4, #3792]
 	ldr	r1, [r2, r7]
 	adds	r3, r2, r7
 	adds	r1, r1, #1
-	bne	.L1162
-.LVL997:
-.L1163:
-	.loc 2 1913 0
+	bne	.L1167
+.LVL1014:
+.L1168:
+	.loc 2 1962 0
 	mov	r3, #-1
-.LVL998:
-	.loc 2 1914 0
+.LVL1015:
+	.loc 2 1963 0
 	ldrh	r0, [fp]
-	.loc 2 1913 0
+	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL999:
-.L1171:
-.LBE451:
-	.loc 2 1954 0
+.LVL1016:
+.L1176:
+.LBE475:
+	.loc 2 2003 0
 	ldr	r0, [sp, #36]
 	adds	r1, r0, #1
-	beq	.L1152
-.L1184:
-	.loc 2 1956 0
+	beq	.L1157
+.L1189:
+	.loc 2 2005 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1000:
-	.loc 2 1957 0
+.LVL1017:
+	.loc 2 2006 0
 	ldrh	r3, [r4, #16]
-	.loc 2 1956 0
+	.loc 2 2005 0
 	mov	r6, r0
-.LVL1001:
-	.loc 2 1957 0
+.LVL1018:
+	.loc 2 2006 0
 	cmp	r3, r0
-	bhi	.L1176
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	movw	r2, #1957
-	ldr	r1, .L1245
-	ldr	r0, .L1245+4
+	bhi	.L1181
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	movw	r2, #2006
+	ldr	r1, .L1250
+	ldr	r0, .L1250+4
 	bl	printk
-.LVL1002:
-.L1176:
-	.loc 2 1958 0 is_stmt 1
-	ldr	r3, [r4, #2260]
+.LVL1019:
+.L1181:
+	.loc 2 2007 0 is_stmt 1
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1177
-	.loc 2 1960 0
+	beq	.L1182
+	.loc 2 2009 0
 	mov	r0, r6
-	b	.L1239
-.LVL1003:
-.L1161:
-.LBB452:
-	.loc 2 1872 0
+	b	.L1244
+.LVL1020:
+.L1166:
+.LBB476:
+	.loc 2 1921 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1164
-	.loc 2 1873 0
+	bne	.L1169
+	.loc 2 1922 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-.LVL1004:
-	b	.L1164
-.L1162:
-	.loc 2 1881 0 discriminator 1
+.LVL1021:
+	b	.L1169
+.L1167:
+	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1163
-	.loc 2 1869 0 discriminator 2
+	bne	.L1168
+	.loc 2 1918 0 discriminator 2
 	ldr	r9, [r8, #4]
-.LVL1005:
-	.loc 2 1882 0 discriminator 2
+.LVL1022:
+	.loc 2 1931 0 discriminator 2
 	ldr	r0, [r4, #3964]
 	mov	r1, r9
 	bl	ftl_cmp_data_ver
-.LVL1006:
-	.loc 2 1881 0 discriminator 2
+.LVL1023:
+	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1163
-	.loc 2 1883 0
+	beq	.L1168
+	.loc 2 1932 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1166
-.LVL1007:
-.L1169:
-	.loc 2 1909 0
+	bne	.L1171
+.LVL1024:
+.L1174:
+	.loc 2 1958 0
 	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-.LVL1008:
-	b	.L1163
-.LVL1009:
-.L1166:
-	.loc 2 1886 0
+.LVL1025:
+	b	.L1168
+.LVL1026:
+.L1171:
+	.loc 2 1935 0
 	ldr	r0, [sp, #36]
-.LVL1010:
+.LVL1027:
 	cmp	r1, r0
-	beq	.L1163
-	.loc 2 1887 0
+	beq	.L1168
+	.loc 2 1936 0
 	adds	r0, r1, #1
-	beq	.L1167
-	.loc 2 1889 0
+	beq	.L1172
+	.loc 2 1938 0
 	str	r1, [r3, #4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1888 0
+	.loc 2 1937 0
 	ldr	r8, [r3, #12]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1011:
-.L1168:
-	.loc 2 1895 0
+.LVL1028:
+.L1173:
+	.loc 2 1944 0
 	ldr	r3, [r4, #3792]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1169
-	.loc 2 1896 0
+	beq	.L1174
+	.loc 2 1945 0
 	ldr	r3, [r8, #4]
-.LVL1012:
-	.loc 2 1897 0
+.LVL1029:
+	.loc 2 1946 0
 	ldr	r0, [r4, #3964]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
-.LVL1013:
+.LVL1030:
 	cmp	r0, #0
-	beq	.L1169
-	.loc 2 1898 0
+	beq	.L1174
+	.loc 2 1947 0
 	mov	r1, r3
 	mov	r0, r9
 	bl	ftl_cmp_data_ver
-.LVL1014:
+.LVL1031:
 	cmp	r0, #0
-	beq	.L1163
-	b	.L1169
-.LVL1015:
-.L1167:
-	.loc 2 1892 0
+	beq	.L1168
+	b	.L1174
+.LVL1032:
+.L1172:
+	.loc 2 1941 0
 	str	r1, [r2, r7]
-	b	.L1168
-.LVL1016:
-.L1160:
-.LBE452:
-	.loc 2 1915 0
+	b	.L1173
+.LVL1033:
+.L1165:
+.LBE476:
+	.loc 2 1964 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1171
-	.loc 2 1917 0
+	beq	.L1176
+	.loc 2 1966 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r6
 	bl	log2phys
-.LVL1017:
-	.loc 2 1918 0
+.LVL1034:
+	.loc 2 1967 0
 	ldr	r8, [sp, #40]
 	cmp	r8, #-1
-	beq	.L1171
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1176
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1174
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1179
+	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
-.LVL1018:
-	.loc 2 1921 0
-	ldrh	r3, [r4, #2280]
+.LVL1035:
+	.loc 2 1970 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r0
-	beq	.L1175
-	.loc 2 1921 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2328]
+	beq	.L1180
+	.loc 2 1970 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2372]
 	cmp	r3, r0
-	beq	.L1175
-	.loc 2 1922 0 is_stmt 1
-	ldrh	r3, [r4, #2376]
+	beq	.L1180
+	.loc 2 1971 0 is_stmt 1
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r0
-	bne	.L1171
-.L1175:
-.LBB453:
-	.loc 2 1927 0
+	bne	.L1176
+.L1180:
+.LBB477:
+	.loc 2 1976 0
 	ldr	r0, [r4, #3792]
-	.loc 2 1930 0
+	.loc 2 1979 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	r8, [r0, #4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	r7, [r0, #12]
-	.loc 2 1930 0
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1019:
-	.loc 2 1933 0
+.LVL1036:
+	.loc 2 1982 0
 	ldr	r3, [r4, #3792]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1171
-	.loc 2 1934 0
+	beq	.L1176
+	.loc 2 1983 0
 	ldr	r1, [r7, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
-.LVL1020:
+.LVL1037:
 	cmp	r0, #0
-	bne	.L1171
-	.loc 2 1941 0
+	bne	.L1176
+	.loc 2 1990 0
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-.LVL1021:
-	b	.L1171
-.LVL1022:
-.L1177:
-.LBE453:
-	.loc 2 1962 0
+.LVL1038:
+	b	.L1176
+.LVL1039:
+.L1182:
+.LBE477:
+	.loc 2 2011 0
 	mov	r1, r6
-	ldr	r0, .L1245+8
+	ldr	r0, .L1250+8
 	bl	printk
-.LVL1023:
-	b	.L1152
-.LVL1024:
-.L1156:
-	.loc 2 1969 0
+.LVL1040:
+	b	.L1157
+.LVL1041:
+.L1161:
+	.loc 2 2018 0
 	ldr	r3, [r4, #3972]
 	cmp	r3, #31
-	.loc 2 1970 0
+	.loc 2 2019 0
 	itttt	ls
 	addls	r2, r4, r3, lsl #2
-	.loc 2 1971 0
+	.loc 2 2020 0
 	addls	r3, r3, #1
 	strls	r3, [r4, #3972]
-	.loc 2 1970 0
+	.loc 2 2019 0
 	strls	r6, [r2, #3976]
-	.loc 2 1973 0
+	.loc 2 2022 0
 	ldrh	r0, [fp]
-.LVL1025:
+.LVL1042:
 	bl	decrement_vpc_count
-.LVL1026:
-	.loc 2 1975 0
+.LVL1043:
+	.loc 2 2024 0
 	ldr	r3, [r4, #3964]
 	adds	r2, r3, #1
-	bne	.L1179
-	.loc 2 1976 0
+	bne	.L1184
+	.loc 2 2025 0
 	ldr	r3, [sp, #4]
-.LVL1027:
-.L1238:
-	.loc 2 1978 0
+.LVL1044:
+.L1243:
+	.loc 2 2027 0
 	str	r3, [r4, #3964]
-	b	.L1152
-.LVL1028:
-.L1179:
-	.loc 2 1977 0
+	b	.L1157
+.LVL1045:
+.L1184:
+	.loc 2 2026 0
 	ldr	r2, [sp, #4]
-.LVL1029:
+.LVL1046:
 	cmp	r2, r3
-	bcs	.L1152
-	.loc 2 1978 0
+	bcs	.L1157
+	.loc 2 2027 0
 	mov	r3, r2
-.LVL1030:
-	b	.L1238
-.LVL1031:
-.L1155:
-	.loc 2 2002 0
+.LVL1047:
+	b	.L1243
+.LVL1048:
+.L1160:
+	.loc 2 2051 0
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-.LVL1032:
-	.loc 2 2004 0
+.LVL1049:
+	.loc 2 2053 0
 	mov	r1, r5
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	r5, [fp, #2]	@ movhi
-	.loc 2 2004 0
+	.loc 2 2053 0
 	ldr	r2, [sp, #12]
-	.loc 2 2002 0
+	.loc 2 2051 0
 	strb	r3, [fp, #6]
-	b	.L1242
-.LVL1033:
-.L1174:
-	.loc 2 1954 0
+	b	.L1247
+.LVL1050:
+.L1179:
+	.loc 2 2003 0
 	mov	r0, r8
-	b	.L1184
-.L1246:
+	b	.L1189
+.L1251:
 	.align	2
-.L1245:
+.L1250:
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LC95
+	.word	.LC98
 .LFE231:
 	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -12815,108 +12914,125 @@ FtlRecoverySuperblock:
 FtlSuperblockPowerLostFix:
 	.fnstart
 .LFB238:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1034:
+.LVL1051:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI144:
-	mov	r4, r0
-	ldr	r5, .L1258
+.LCFI145:
 	.pad #24
 	sub	sp, sp, #24
-.LCFI145:
-	.loc 2 2162 0
-	movs	r6, #7
-	.loc 2 2168 0
-	mov	r7, #-1
-	.loc 2 2176 0
+.LCFI146:
+	.loc 2 2212 0
+	ldr	r4, .L1263
+	.loc 2 2211 0
+	mov	r3, #-1
+	.loc 2 2219 0
 	mov	r8, #0
-.L1248:
-	.loc 2 2162 0
-	subs	r6, r6, #1
-	beq	.L1250
-	.loc 2 2163 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1249
-.L1250:
-	.loc 2 2183 0
-	ldr	r2, [r5, #2260]
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
+	.loc 2 2220 0
+	movw	r1, #61589
+	.loc 2 2211 0
+	str	r3, [sp, #20]
+	.loc 2 2205 0
+	mov	r5, r0
+	.loc 2 2212 0
+	ldr	r2, [r4, #3240]
+	.loc 2 2223 0
+	movs	r7, #7
+	.loc 2 2213 0
+	ldr	r6, [r4, #3244]
+	.loc 2 2212 0
+	str	r2, [sp, #12]
+	.loc 2 2216 0
+	mvn	r2, #2
+	.loc 2 2213 0
+	str	r6, [sp, #16]
+	.loc 2 2216 0
+	str	r2, [r6, #8]
+	.loc 2 2217 0
+	mvn	r2, #1
+	str	r2, [r6, #12]
+	.loc 2 2218 0
+	ldrh	r2, [r0]
+	.loc 2 2219 0
+	strh	r8, [r6]	@ movhi
+	.loc 2 2218 0
+	strh	r2, [r6, #2]	@ movhi
+	.loc 2 2220 0
+	ldr	r2, [r4, #3240]
+	str	r1, [r2]
+	.loc 2 2221 0
+	add	r1, r1, #304087040
+	ldr	r2, [r4, #3240]
+	add	r1, r1, #1269760
+	addw	r1, r1, #1507
+	str	r1, [r2, #4]
+.L1253:
+	.loc 2 2223 0
+	subs	r7, r7, #1
+	beq	.L1255
+.LVL1052:
+	.loc 2 2224 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1254
+.L1255:
+	.loc 2 2234 0
+	ldr	r2, [r4, #2300]
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2184 0
-	ldrh	r3, [r5, #78]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2185 0
+	.loc 2 2235 0
+	ldrh	r3, [r4, #78]
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 2236 0
 	movs	r3, #0
-	strb	r3, [r4, #6]
-	.loc 2 2186 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2188 0
+	strb	r3, [r5, #6]
+	.loc 2 2237 0
+	strh	r3, [r5, #4]	@ movhi
+	.loc 2 2238 0
 	add	sp, sp, #24
-.LCFI146:
+.LCFI147:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1035:
-.L1249:
-.LCFI147:
-	.loc 2 2165 0
-	mov	r0, r4
+.LVL1053:
+.L1254:
+.LCFI148:
+	.loc 2 2226 0
+	mov	r0, r5
 	bl	get_new_active_ppa
-.LVL1036:
+.LVL1054:
 	str	r0, [sp, #8]
-	.loc 2 2166 0
+	.loc 2 2227 0
 	adds	r0, r0, #1
-	beq	.L1250
-	.loc 2 2170 0
-	ldr	r2, [r5, #3244]
-	.loc 2 2179 0
+	beq	.L1255
+	.loc 2 2229 0
+	ldr	r3, [r4, #2520]
+	.loc 2 2230 0
 	movs	r1, #1
-	.loc 2 2169 0
-	ldr	r3, [r5, #2244]
-	.loc 2 2179 0
 	add	r0, sp, #4
-	.loc 2 2168 0
-	str	r7, [sp, #20]
-	.loc 2 2170 0
-	str	r2, [sp, #16]
-	.loc 2 2169 0
-	str	r3, [sp, #12]
-	.loc 2 2174 0
-	str	r7, [r2, #12]
-	.loc 2 2173 0
-	str	r7, [r2, #8]
-	.loc 2 2175 0
-	ldrh	r3, [r4]
-	.loc 2 2176 0
-	strh	r8, [r2]	@ movhi
-	.loc 2 2175 0
-	strh	r3, [r2, #2]	@ movhi
-	.loc 2 2178 0
-	ldr	r3, [r5, #2476]
-	str	r3, [r2, #4]
+	.loc 2 2229 0
+	str	r3, [r6, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r8
-	str	r3, [r5, #2476]
-	.loc 2 2179 0
+	str	r3, [r4, #2520]
+	.loc 2 2230 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1037:
-	.loc 2 2180 0
-	ldrh	r0, [r4]
+.LVL1055:
+	.loc 2 2231 0
+	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-.LVL1038:
-	b	.L1248
-.L1259:
+.LVL1056:
+	b	.L1253
+.L1264:
 	.align	2
-.L1258:
+.L1263:
 	.word	.LANCHOR0
 .LFE238:
 	.fnend
@@ -12936,34 +13052,34 @@ FtlLoadBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI148:
+.LCFI149:
 	.loc 4 196 0
 	movw	r8, #61649
 	.loc 4 180 0
-	ldr	r4, .L1289
-	ldr	r3, [r4, #2244]
+	ldr	r4, .L1294
+	ldr	r3, [r4, #3240]
 	.loc 4 186 0
-	addw	r7, r4, #3224
+	addw	r7, r4, #3220
 	.loc 4 181 0
 	ldr	r6, [r4, #3244]
 	.loc 4 180 0
-	str	r3, [r4, #3232]
+	str	r3, [r4, #3228]
 	.loc 4 181 0
-	str	r6, [r4, #3236]
+	str	r6, [r4, #3232]
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1039:
+.LVL1057:
 	.loc 4 184 0
 	ldrh	r5, [r4, #74]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1040:
-.L1261:
+.LVL1058:
+.L1266:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #74]
 	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1264
+	ble	.L1269
 	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
 	.loc 4 186 0
@@ -12971,35 +13087,35 @@ FtlLoadBbt:
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 185 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1041:
+.LVL1059:
 	.loc 4 187 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	bne	.L1262
+	bne	.L1267
 	.loc 4 188 0
-	ldr	r3, [r4, #3228]
+	ldr	r3, [r4, #3224]
 	.loc 4 189 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 188 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1042:
-.L1262:
+.LVL1060:
+.L1267:
 	.loc 4 191 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	beq	.L1263
+	beq	.L1268
 	.loc 4 196 0
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	bne	.L1263
+	bne	.L1268
 	.loc 4 199 0
 	ldr	r3, [r6, #4]
 	.loc 4 198 0
@@ -13009,41 +13125,41 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #132]	@ movhi
-.L1264:
+.L1269:
 	.loc 4 216 0
 	ldrh	r3, [r4, #128]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1278
+	beq	.L1283
 	.loc 4 222 0
 	ldrh	r3, [r4, #132]
 	cmp	r3, r2
-	beq	.L1268
+	beq	.L1273
 	.loc 4 224 0
 	lsls	r3, r3, #10
 	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1289+4
+	ldr	r0, .L1294+4
 	.loc 4 224 0
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1043:
+.LVL1061:
 	.loc 4 226 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	beq	.L1268
+	beq	.L1273
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1268
+	bne	.L1273
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #136]
 	cmp	r3, r2
-	bls	.L1268
+	bls	.L1273
 	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r4, #132]
 	.loc 4 232 0
@@ -13054,9 +13170,9 @@ FtlLoadBbt:
 	strh	r2, [r4, #128]	@ movhi
 	.loc 4 233 0
 	strh	r3, [r4, #132]	@ movhi
-.L1268:
+.L1273:
 	.loc 4 245 0
-	ldr	r7, .L1289+4
+	ldr	r7, .L1294+4
 	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r4, #128]
@@ -13064,23 +13180,23 @@ FtlLoadBbt:
 	movw	r8, #61649
 	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1044:
+.LVL1062:
 	sxth	r5, r0
-.LVL1045:
+.LVL1063:
 	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r4, #130]	@ movhi
-.L1270:
+.L1275:
 	.loc 4 241 0
 	cmp	r5, #0
-	bge	.L1273
+	bge	.L1278
 	.loc 4 254 0
 	movs	r2, #254
-	ldr	r1, .L1289+8
-	ldr	r0, .L1289+12
+	ldr	r1, .L1294+8
+	ldr	r0, .L1294+12
 	bl	printk
-.LVL1046:
-.L1272:
+.LVL1064:
+.L1277:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -13090,45 +13206,45 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1275
+	beq	.L1280
 	.loc 4 259 0
 	ldr	r2, [r4, #4]
 	cmp	r0, r2
-	beq	.L1275
+	beq	.L1280
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1275
+	bcs	.L1280
 	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	bcs	.L1275
+	bcs	.L1280
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1047:
-.L1275:
-	ldr	r6, .L1289+16
+.LVL1065:
+.L1280:
+	ldr	r6, .L1294+16
 	.loc 4 173 0 discriminator 1
 	movs	r5, #0
-.LVL1048:
-.L1276:
+.LVL1066:
+.L1281:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	bcc	.L1277
+	bcc	.L1282
 	.loc 4 275 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1049:
-.L1263:
+.LVL1067:
+.L1268:
 	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1050:
+.LVL1068:
 	uxth	r5, r5
-.LVL1051:
-	b	.L1261
-.LVL1052:
-.L1273:
+.LVL1069:
+	b	.L1266
+.LVL1070:
+.L1278:
 	.loc 4 243 0
 	ldrh	r3, [r4, #128]
 	.loc 4 245 0
@@ -13137,32 +13253,32 @@ FtlLoadBbt:
 	mov	r0, r7
 	.loc 4 243 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 244 0
-	ldr	r3, [r4, #2244]
-	str	r3, [r4, #3232]
+	ldr	r3, [r4, #3240]
+	str	r3, [r4, #3228]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1053:
+.LVL1071:
 	.loc 4 247 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	beq	.L1271
+	beq	.L1276
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	beq	.L1272
-.L1271:
+	beq	.L1277
+.L1276:
 	subs	r5, r5, #1
-.LVL1054:
+.LVL1072:
 	sxth	r5, r5
-.LVL1055:
-	b	.L1270
-.LVL1056:
-.L1277:
+.LVL1073:
+	b	.L1275
+.LVL1074:
+.L1282:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r4, #3860]
-	ldr	r1, [r4, #3232]
+	ldr	r1, [r4, #3228]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
@@ -13170,19 +13286,19 @@ FtlLoadBbt:
 	adds	r5, r5, #1
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1057:
-	b	.L1276
-.LVL1058:
-.L1278:
+.LVL1075:
+	b	.L1281
+.LVL1076:
+.L1283:
 	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1059:
-.L1290:
+.LVL1077:
+.L1295:
 	.align	2
-.L1289:
+.L1294:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3224
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+443
 	.word	.LC1
 	.word	.LANCHOR0+152
@@ -13204,34 +13320,34 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI149:
+.LCFI150:
 	.loc 4 327 0
 	mov	r8, #0
-.LVL1060:
-	ldr	r9, .L1310+4
+.LVL1078:
+	ldr	r9, .L1315+4
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1061:
+.LVL1079:
 	.loc 4 327 0
 	sub	r5, r9, #156
 	sub	r10, r9, #18
 	mov	r4, r5
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1062:
-.L1292:
+.LVL1080:
+.L1297:
 	.loc 4 327 0 discriminator 1
 	ldrh	r3, [r5, #30]
 	cmp	r8, r3
-	bcc	.L1298
+	bcc	.L1303
 	movs	r5, #0
-.L1299:
+.L1304:
 	.loc 4 381 0 discriminator 1
 	ldrh	r3, [r4, #90]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1300
+	bhi	.L1305
 	.loc 4 387 0
 	ldrh	r5, [r4, #140]
 	.loc 4 396 0
@@ -13239,74 +13355,74 @@ FtlMakeBbt:
 	.loc 4 387 0
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1301:
+.L1306:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #140]
 	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1305
+	ble	.L1310
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1063:
+.LVL1081:
 	cmp	r0, #1
-	beq	.L1302
+	beq	.L1307
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1064:
+.LVL1082:
 	cmp	r0, #0
-	beq	.L1303
+	beq	.L1308
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1065:
-.L1302:
+.LVL1083:
+.L1307:
 	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1301
-.L1298:
+	b	.L1306
+.L1303:
 	.loc 4 331 0
 	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
 	.loc 4 328 0
-	ldr	r0, [r5, #2244]
+	ldr	r0, [r5, #3240]
 	.loc 4 329 0
 	ldr	fp, [r5, #3244]
 	.loc 4 331 0
 	cmp	r3, r2
 	.loc 4 328 0
-	str	r0, [r5, #3232]
+	str	r0, [r5, #3228]
 	.loc 4 329 0
-	str	fp, [r5, #3236]
+	str	fp, [r5, #3232]
 	.loc 4 331 0
-	beq	.L1293
+	beq	.L1298
 	.loc 4 333 0
 	ldrh	r7, [r5, #74]
-.LVL1066:
+.LVL1084:
 	.loc 4 335 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1310
+	ldr	r0, .L1315
 	.loc 4 333 0
 	mla	r7, r8, r7, r3
-.LVL1067:
+.LVL1085:
 	.loc 4 334 0
 	lsls	r3, r7, #10
-	str	r3, [r5, #3228]
+	str	r3, [r5, #3224]
 	.loc 4 335 0
 	bl	FlashReadPages
-.LVL1068:
+.LVL1086:
 	.loc 4 336 0
 	ldrh	r2, [r5, #74]
-	ldr	r1, [r5, #3232]
+	ldr	r1, [r5, #3228]
 	ldr	r0, [r9]
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1069:
-.L1294:
+.LVL1087:
+.L1299:
 	.loc 4 376 0 discriminator 2
 	uxth	r0, r7
 	.loc 4 327 0 discriminator 2
@@ -13314,63 +13430,63 @@ FtlMakeBbt:
 	add	r9, r9, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1070:
-	b	.L1292
-.L1293:
+.LVL1088:
+	b	.L1297
+.L1298:
 	.loc 4 340 0
 	mov	r1, r8
 	bl	FlashGetBadBlockList
-.LVL1071:
+.LVL1089:
 	.loc 4 341 0
 	ldr	r1, [r9]
-	ldr	r0, [r5, #3232]
+	ldr	r0, [r5, #3228]
 	bl	FtlBbt2Bitmap
-.LVL1072:
+.LVL1090:
 	.loc 4 343 0
 	ldrh	r6, [r5, #74]
-.L1296:
+.L1301:
 	.loc 4 347 0
 	subs	r6, r6, #1
 	uxth	r6, r6
-.L1295:
+.L1300:
 	.loc 4 345 0
 	ldrh	r0, [r4, #74]
 	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1073:
+.LVL1091:
 	cmp	r0, #1
-	beq	.L1296
-.LBB464:
-.LBB465:
-.LBB466:
+	beq	.L1301
+.LBB488:
+.LBB489:
+.LBB490:
 	.loc 1 202 0
 	movs	r1, #16
 	ldr	r0, [r4, #3244]
-.LBE466:
-.LBE465:
-.LBE464:
+.LBE490:
+.LBE489:
+.LBE488:
 	.loc 4 349 0
 	strh	r6, [r10]	@ movhi
-.LBB469:
-.LBB468:
-.LBB467:
+.LBB493:
+.LBB492:
+.LBB491:
 	.loc 1 202 0
 	bl	__memzero
-.LVL1074:
-.LBE467:
-.LBE468:
-.LBE469:
-.LBB470:
-.LBB471:
-.LBB472:
+.LVL1092:
+.LBE491:
+.LBE492:
+.LBE493:
+.LBB494:
+.LBB495:
+.LBB496:
 	mov	r1, #4096
-	ldr	r0, [r4, #2244]
+	ldr	r0, [r4, #3240]
 	bl	__memzero
-.LVL1075:
-.LBE472:
-.LBE471:
-.LBE470:
+.LVL1093:
+.LBE496:
+.LBE495:
+.LBE494:
 	.loc 4 352 0
 	movw	r3, #61664
 	strh	r3, [fp]	@ movhi
@@ -13381,7 +13497,7 @@ FtlMakeBbt:
 	ldrh	r3, [r10]
 	.loc 4 355 0
 	ldrh	r7, [r4, #74]
-.LVL1076:
+.LVL1094:
 	.loc 4 357 0
 	ldrh	r2, [r4, #3860]
 	.loc 4 354 0
@@ -13391,56 +13507,56 @@ FtlMakeBbt:
 	.loc 4 357 0
 	ldr	r1, [r9]
 	lsls	r2, r2, #2
-	ldr	r0, [r4, #3232]
+	ldr	r0, [r4, #3228]
 	.loc 4 355 0
 	mla	r7, r8, r7, r3
-.LVL1077:
+.LVL1095:
 	.loc 4 356 0
 	lsls	r3, r7, #10
-	str	r3, [r4, #3228]
+	str	r3, [r4, #3224]
 	.loc 4 357 0
 	bl	ftl_memcpy
-.LVL1078:
+.LVL1096:
 	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1310
+	ldr	r0, .L1315
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1079:
+.LVL1097:
 	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1310
+	ldr	r0, .L1315
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1080:
+.LVL1098:
 	.loc 4 360 0
-	ldr	r3, [r4, #3224]
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	bne	.L1294
+	bne	.L1299
 	.loc 4 362 0
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-.LVL1081:
+.LVL1099:
 	.loc 4 363 0
-	b	.L1295
-.L1300:
+	b	.L1300
+.L1305:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1082:
-	b	.L1299
-.L1303:
+.LVL1100:
+	b	.L1304
+.L1308:
 	.loc 4 396 0
 	ldrh	r3, [r4, #128]
 	cmp	r3, r6
-	bne	.L1304
+	bne	.L1309
 	.loc 4 398 0
 	strh	r5, [r4, #128]	@ movhi
-	b	.L1302
-.L1304:
+	b	.L1307
+.L1309:
 	.loc 4 402 0
 	strh	r5, [r4, #132]	@ movhi
-.L1305:
+.L1310:
 	.loc 4 414 0
 	ldrh	r3, [r4, #128]
 	.loc 4 411 0
@@ -13464,18 +13580,18 @@ FtlMakeBbt:
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1083:
+.LVL1101:
 	.loc 4 418 0
 	ldrh	r0, [r4, #128]
 	bl	FtlBbmMapBadBlock
-.LVL1084:
+.LVL1102:
 	.loc 4 419 0
 	ldrh	r0, [r4, #132]
 	bl	FtlBbmMapBadBlock
-.LVL1085:
+.LVL1103:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1086:
+.LVL1104:
 	.loc 4 422 0
 	ldr	r3, [r4, #136]
 	.loc 4 425 0
@@ -13493,15 +13609,15 @@ FtlMakeBbt:
 	strh	r3, [r4, #132]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1087:
+.LVL1105:
 	.loc 4 432 0
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1088:
-.L1311:
+.LVL1106:
+.L1316:
 	.align	2
-.L1310:
-	.word	.LANCHOR0+3224
+.L1315:
+	.word	.LANCHOR0+3220
 	.word	.LANCHOR0+156
 .LFE181:
 	.fnend
@@ -13516,158 +13632,158 @@ FtlMakeBbt:
 FtlVendorPartWrite:
 	.fnstart
 .LFB213:
-	.loc 2 786 0
+	.loc 2 835 0
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1089:
+.LVL1107:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI150:
+.LCFI151:
 	mov	r10, r2
-	.loc 2 794 0
-	ldr	r4, .L1324
+	.loc 2 843 0
+	ldr	r4, .L1329
 	adds	r2, r0, r1
-.LVL1090:
-	.loc 2 786 0
+.LVL1108:
+	.loc 2 835 0
 	.pad #108
 	sub	sp, sp, #108
-.LCFI151:
-	.loc 2 786 0
+.LCFI152:
+	.loc 2 835 0
 	mov	r8, r0
 	mov	r6, r1
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	r3, [r4, #72]
 	cmp	r2, r3
-	bhi	.L1320
-	.loc 2 791 0
+	bhi	.L1325
+	.loc 2 840 0
 	ldrh	r7, [r4, #84]
 	mov	r9, #0
 	lsr	r7, r0, r7
-.LVL1091:
+.LVL1109:
 	lsl	fp, r7, #2
-.LVL1092:
-.L1314:
-	.loc 2 797 0
-	cbnz	r6, .L1319
-.L1312:
-	.loc 2 820 0
+.LVL1110:
+.L1319:
+	.loc 2 846 0
+	cbnz	r6, .L1324
+.L1317:
+	.loc 2 869 0
 	mov	r0, r9
 	add	sp, sp, #108
-.LCFI152:
+.LCFI153:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1093:
-.L1319:
-.LCFI153:
-	.loc 2 798 0
+.LVL1111:
+.L1324:
+.LCFI154:
+	.loc 2 847 0
 	ldr	r3, [r4, #3844]
-	.loc 2 799 0
+	.loc 2 848 0
 	mov	r0, r8
-	.loc 2 798 0
+	.loc 2 847 0
 	ldr	r2, [r3, fp]
-.LVL1094:
-	.loc 2 799 0
+.LVL1112:
+	.loc 2 848 0
 	ldrh	r3, [r4, #34]
-	.loc 2 798 0
+	.loc 2 847 0
 	str	r2, [sp, #12]
-	.loc 2 799 0
+	.loc 2 848 0
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1095:
-	.loc 2 800 0
+.LVL1113:
+	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 801 0
+	.loc 2 850 0
 	ldr	r2, [sp, #12]
-.LVL1096:
-	.loc 2 799 0
+.LVL1114:
+	.loc 2 848 0
 	str	r1, [sp, #4]
-	.loc 2 800 0
+	.loc 2 849 0
 	subs	r5, r3, r1
-.LVL1097:
+.LVL1115:
 	uxth	r5, r5
-.LVL1098:
-	.loc 2 801 0
+.LVL1116:
+	.loc 2 850 0
 	cmp	r6, r5
-	.loc 2 802 0
+	.loc 2 851 0
 	it	cc
 	uxthcc	r5, r6
-	.loc 2 803 0
-	cbz	r2, .L1316
-	.loc 2 803 0 is_stmt 0 discriminator 1
+	.loc 2 852 0
+	cbz	r2, .L1321
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1316
-	.loc 2 805 0 is_stmt 1
+	beq	.L1321
+	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r4, #3808]
-	.loc 2 807 0
+	.loc 2 856 0
 	add	r0, sp, #20
-	.loc 2 804 0
+	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 807 0
+	.loc 2 856 0
 	movs	r2, #1
-.LVL1099:
+.LVL1117:
 	mov	r1, r2
-	.loc 2 805 0
+	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 806 0
+	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 807 0
+	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1100:
-.L1317:
-	.loc 2 811 0
+.LVL1118:
+.L1322:
+	.loc 2 860 0
 	lsls	r3, r5, #9
 	ldr	r0, [r4, #3808]
 	mov	r1, r10
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #4]
-	.loc 2 815 0
+	.loc 2 864 0
 	subs	r6, r6, r5
-	.loc 2 816 0
+	.loc 2 865 0
 	add	r8, r8, r5
 	add	fp, fp, #4
-	.loc 2 811 0
+	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1101:
-	.loc 2 812 0
+.LVL1119:
+	.loc 2 861 0
 	mov	r1, r7
 	ldr	r2, [r4, #3808]
-	ldr	r0, .L1324+4
-	.loc 2 814 0
+	ldr	r0, .L1329+4
+	.loc 2 863 0
 	adds	r7, r7, #1
-	.loc 2 812 0
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1102:
-	.loc 2 817 0
+.LVL1120:
+	.loc 2 866 0
 	ldr	r3, [sp, #8]
-	.loc 2 813 0
+	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r9, #-1
-	.loc 2 817 0
+	.loc 2 866 0
 	add	r10, r10, r3
-	b	.L1314
-.LVL1103:
-.L1316:
-	.loc 2 809 0
+	b	.L1319
+.LVL1121:
+.L1321:
+	.loc 2 858 0
 	ldrh	r2, [r4, #86]
-.LVL1104:
+.LVL1122:
 	movs	r1, #0
 	ldr	r0, [r4, #3808]
 	bl	ftl_memset
-.LVL1105:
-	b	.L1317
-.LVL1106:
-.L1320:
-	.loc 2 795 0
-	mov	r9, #-1
-	b	.L1312
+.LVL1123:
+	b	.L1322
+.LVL1124:
 .L1325:
+	.loc 2 844 0
+	mov	r9, #-1
+	b	.L1317
+.L1330:
 	.align	2
-.L1324:
+.L1329:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3908
 .LFE213:
@@ -13683,75 +13799,75 @@ FtlVendorPartWrite:
 Ftl_save_ext_data:
 	.fnstart
 .LFB236:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2111 0
-	ldr	r2, .L1328
-	ldr	r3, .L1328+4
-	ldr	r1, [r2, #2616]
+	.loc 2 2160 0
+	ldr	r2, .L1333
+	ldr	r3, .L1333+4
+	ldr	r1, [r2, #2612]
 	cmp	r1, r3
-	bne	.L1326
-.LBB475:
-.LBB476:
-	.loc 2 2112 0
-	ldr	r3, .L1328+8
-	.loc 2 2125 0
-	addw	r2, r2, #2616
+	bne	.L1331
+.LBB499:
+.LBB500:
+	.loc 2 2161 0
+	ldr	r3, .L1333+8
+	.loc 2 2174 0
+	addw	r2, r2, #2612
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2112 0
+	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2113 0
-	ldr	r3, [r2, #-152]
+	.loc 2 2162 0
+	ldr	r3, [r2, #-104]
 	str	r3, [r2, #88]
-	.loc 2 2114 0
-	ldr	r3, [r2, #-148]
+	.loc 2 2163 0
+	ldr	r3, [r2, #-100]
 	str	r3, [r2, #92]
-	.loc 2 2115 0
-	ldr	r3, [r2, #-156]
+	.loc 2 2164 0
+	ldr	r3, [r2, #-108]
 	str	r3, [r2, #8]
-	.loc 2 2116 0
-	ldr	r3, [r2, #-168]
+	.loc 2 2165 0
+	ldr	r3, [r2, #-120]
 	str	r3, [r2, #12]
-	.loc 2 2117 0
-	ldr	r3, [r2, #-176]
+	.loc 2 2166 0
+	ldr	r3, [r2, #-128]
 	str	r3, [r2, #16]
-	.loc 2 2118 0
-	ldr	r3, [r2, #-160]
+	.loc 2 2167 0
+	ldr	r3, [r2, #-112]
 	str	r3, [r2, #20]
-	.loc 2 2119 0
-	ldr	r3, [r2, #-132]
+	.loc 2 2168 0
+	ldr	r3, [r2, #-84]
 	str	r3, [r2, #28]
-	.loc 2 2120 0
-	ldr	r3, [r2, #-124]
+	.loc 2 2169 0
+	ldr	r3, [r2, #-76]
 	str	r3, [r2, #32]
-	.loc 2 2121 0
-	ldr	r3, [r2, #-172]
+	.loc 2 2170 0
+	ldr	r3, [r2, #-124]
 	str	r3, [r2, #36]
-	.loc 2 2122 0
-	ldr	r3, [r2, #-164]
+	.loc 2 2171 0
+	ldr	r3, [r2, #-116]
 	str	r3, [r2, #40]
-	.loc 2 2123 0
-	ldr	r3, [r2, #-120]
+	.loc 2 2172 0
+	ldr	r3, [r2, #-72]
 	str	r3, [r2, #44]
-	.loc 2 2124 0
-	ldr	r3, [r2, #-116]
+	.loc 2 2173 0
+	ldr	r3, [r2, #-68]
 	str	r3, [r2, #48]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1107:
-.L1326:
+.LVL1125:
+.L1331:
 	bx	lr
-.L1329:
+.L1334:
 	.align	2
-.L1328:
+.L1333:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177344
-.LBE476:
-.LBE475:
+	.word	1342177348
+.LBE500:
+.LBE499:
 .LFE236:
 	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -13765,82 +13881,82 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	.fnstart
 .LFB215:
-	.loc 2 861 0
+	.loc 2 910 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1108:
-	.loc 2 864 0
-	ldr	r2, .L1335
-	.loc 2 861 0
+.LVL1126:
+	.loc 2 913 0
+	ldr	r2, .L1340
+	.loc 2 910 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI154:
-	.loc 2 864 0
+.LCFI155:
+	.loc 2 913 0
 	ldrh	r3, [r2, #-240]
 	cmp	r3, #31
-	.loc 2 865 0
+	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 862 0
+	.loc 2 911 0
 	movhi	r2, #32
-.LVL1109:
-	.loc 2 865 0
+.LVL1127:
+	.loc 2 914 0
 	strhls	r3, [r2, #-240]	@ movhi
-.LVL1110:
-	.loc 2 866 0
+.LVL1128:
+	.loc 2 915 0
 	movls	r2, #1
-.LVL1111:
-	ldr	r3, .L1335+4
-	.loc 2 868 0
-	cbnz	r0, .L1332
-	.loc 2 868 0 is_stmt 0 discriminator 1
+.LVL1129:
+	ldr	r3, .L1340+4
+	.loc 2 917 0
+	cbnz	r0, .L1337
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r3, #3820]
 	ldr	r0, [r1, #20]
-.LVL1112:
+.LVL1130:
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
-.LVL1113:
+.LVL1131:
 	cmp	r1, r2
-	bcc	.L1333
-.LVL1114:
-.L1332:
-	.loc 2 870 0 is_stmt 1
+	bcc	.L1338
+.LVL1132:
+.L1337:
+	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r3, #3820]
-.LVL1115:
-	.loc 2 875 0
+.LVL1133:
+	.loc 2 924 0
 	movs	r0, #64
-.LVL1116:
-	.loc 2 870 0
+.LVL1134:
+	.loc 2 919 0
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	.loc 2 871 0
-	ldr	r1, .L1335+8
+	.loc 2 920 0
+	ldr	r1, .L1340+8
 	str	r1, [r2]
-	.loc 2 872 0
+	.loc 2 921 0
 	ldrh	r1, [r3, #3812]
 	ldr	r2, [r3, #3820]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 874 0
+	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 875 0
+	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1117:
-	.loc 2 876 0
+.LVL1135:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1118:
-.L1333:
-	.loc 2 878 0
+.LVL1136:
+.L1338:
+	.loc 2 927 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1336:
+.L1341:
 	.align	2
-.L1335:
+.L1340:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
@@ -13857,144 +13973,144 @@ FtlEctTblFlush:
 FtlVendorPartRead:
 	.fnstart
 .LFB214:
-	.loc 2 823 0
+	.loc 2 872 0
 	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1119:
+.LVL1137:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI155:
+.LCFI156:
 	mov	r10, r2
-	.loc 2 832 0
-	ldr	r5, .L1346
+	.loc 2 881 0
+	ldr	r5, .L1351
 	adds	r2, r0, r1
-.LVL1120:
-	.loc 2 823 0
+.LVL1138:
+	.loc 2 872 0
 	.pad #100
 	sub	sp, sp, #100
-.LCFI156:
-	.loc 2 823 0
+.LCFI157:
+	.loc 2 872 0
 	mov	r8, r0
 	mov	r7, r1
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	r3, [r5, #72]
 	cmp	r2, r3
-	bhi	.L1345
-	.loc 2 828 0
+	bhi	.L1350
+	.loc 2 877 0
 	ldrh	r6, [r5, #84]
 	mov	r9, #0
 	lsr	r6, r0, r6
-.LVL1121:
+.LVL1139:
 	lsls	r6, r6, #2
-.LVL1122:
-.L1339:
-	.loc 2 834 0
-	cbnz	r7, .L1344
-.L1337:
-	.loc 2 857 0
+.LVL1140:
+.L1344:
+	.loc 2 883 0
+	cbnz	r7, .L1349
+.L1342:
+	.loc 2 906 0
 	mov	r0, r9
 	add	sp, sp, #100
-.LCFI157:
+.LCFI158:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1123:
-.L1344:
-.LCFI158:
-	.loc 2 835 0
+.LVL1141:
+.L1349:
+.LCFI159:
+	.loc 2 884 0
 	ldr	r3, [r5, #3844]
-	.loc 2 836 0
+	.loc 2 885 0
 	mov	r0, r8
 	ldrh	r4, [r5, #34]
-.LVL1124:
-	.loc 2 835 0
+.LVL1142:
+	.loc 2 884 0
 	ldr	r3, [r3, r6]
-.LVL1125:
-	.loc 2 836 0
+.LVL1143:
+	.loc 2 885 0
 	mov	r1, r4
-	.loc 2 835 0
+	.loc 2 884 0
 	str	r3, [sp, #4]
-	.loc 2 836 0
+	.loc 2 885 0
 	bl	__aeabi_uidivmod
-.LVL1126:
-	.loc 2 837 0
+.LVL1144:
+	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 838 0
+	.loc 2 887 0
 	ldr	r3, [sp, #4]
-.LVL1127:
-	.loc 2 837 0
+.LVL1145:
+	.loc 2 886 0
 	uxth	r4, r4
-.LVL1128:
-	.loc 2 836 0
+.LVL1146:
+	.loc 2 885 0
 	str	r1, [sp]
-	.loc 2 838 0
+	.loc 2 887 0
 	cmp	r7, r4
-	.loc 2 839 0
+	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r7
 	lsl	fp, r4, #9
-	.loc 2 840 0
-	cbz	r3, .L1341
-	.loc 2 841 0
+	.loc 2 889 0
+	cbz	r3, .L1346
+	.loc 2 890 0
 	str	r3, [sp, #16]
-	.loc 2 844 0
+	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 842 0
+	.loc 2 891 0
 	ldr	r3, [r5, #3808]
-.LVL1129:
-	.loc 2 844 0
+.LVL1147:
+	.loc 2 893 0
 	mov	r1, r2
 	add	r0, sp, #12
-	.loc 2 842 0
+	.loc 2 891 0
 	str	r3, [sp, #20]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	r3, sp, #32
 	str	r3, [sp, #24]
-	.loc 2 844 0
+	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1130:
-	.loc 2 845 0
+.LVL1148:
+	.loc 2 894 0
 	ldr	r3, [sp, #12]
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	r2, fp
 	ldr	r1, [r5, #3808]
 	mov	r0, r10
-	.loc 2 846 0
+	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	ldr	r3, [sp]
-	.loc 2 846 0
+	.loc 2 895 0
 	it	eq
 	moveq	r9, #-1
-	.loc 2 847 0
+	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1131:
-.L1343:
-	.loc 2 852 0
+.LVL1149:
+.L1348:
+	.loc 2 901 0
 	subs	r7, r7, r4
-	.loc 2 853 0
+	.loc 2 902 0
 	add	r8, r8, r4
-	.loc 2 854 0
+	.loc 2 903 0
 	add	r10, r10, fp
 	adds	r6, r6, #4
-	b	.L1339
-.LVL1132:
-.L1341:
-	.loc 2 849 0
+	b	.L1344
+.LVL1150:
+.L1346:
+	.loc 2 898 0
 	mov	r2, fp
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-.LVL1133:
-	b	.L1343
-.LVL1134:
-.L1345:
-	.loc 2 833 0
+.LVL1151:
+	b	.L1348
+.LVL1152:
+.L1350:
+	.loc 2 882 0
 	mov	r9, #-1
-	b	.L1337
-.L1347:
+	b	.L1342
+.L1352:
 	.align	2
-.L1346:
+.L1351:
 	.word	.LANCHOR0
 .LFE214:
 	.fnend
@@ -14009,51 +14125,51 @@ FtlVendorPartRead:
 FtlLoadEctTbl:
 	.fnstart
 .LFB221:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI159:
-	.loc 2 1335 0
+.LCFI160:
+	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1350
+	ldr	r4, .L1355
 	ldr	r2, [r4, #3820]
 	ldrh	r1, [r4, #3812]
 	bl	FtlVendorPartRead
-.LVL1135:
-	.loc 2 1336 0
+.LVL1153:
+	.loc 2 1385 0
 	ldr	r3, [r4, #3820]
 	ldr	r2, [r3]
-	ldr	r3, .L1350+4
+	ldr	r3, .L1355+4
 	cmp	r2, r3
-	beq	.L1349
-.LBB479:
-.LBB480:
-	.loc 2 1338 0
-	ldr	r1, .L1350+8
-	ldr	r0, .L1350+12
+	beq	.L1354
+.LBB503:
+.LBB504:
+	.loc 2 1387 0
+	ldr	r1, .L1355+8
+	ldr	r0, .L1355+12
 	bl	printk
-.LVL1136:
-	.loc 2 1339 0
+.LVL1154:
+	.loc 2 1388 0
 	ldrh	r2, [r4, #3812]
 	movs	r1, #0
 	ldr	r0, [r4, #3820]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1137:
-.L1349:
-.LBE480:
-.LBE479:
-	.loc 2 1344 0
+.LVL1155:
+.L1354:
+.LBE504:
+.LBE503:
+	.loc 2 1393 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1351:
+.L1356:
 	.align	2
-.L1350:
+.L1355:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC96
+	.word	.LC99
 	.word	.LC71
 .LFE221:
 	.fnend
@@ -14068,94 +14184,94 @@ FtlLoadEctTbl:
 Ftl_load_ext_data:
 	.fnstart
 .LFB237:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI160:
-	.loc 2 2131 0
+.LCFI161:
+	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1355
+	ldr	r4, .L1360
 	movs	r0, #0
-	.loc 2 2132 0
-	ldr	r5, .L1355+4
-	.loc 2 2131 0
-	addw	r2, r4, #2616
+	.loc 2 2181 0
+	ldr	r5, .L1360+4
+	.loc 2 2180 0
+	addw	r2, r4, #2612
 	bl	FtlVendorPartRead
-.LVL1138:
-	.loc 2 2132 0
-	ldr	r3, [r4, #2616]
+.LVL1156:
+	.loc 2 2181 0
+	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	beq	.L1353
-.LBB486:
-.LBB487:
-.LBB488:
+	beq	.L1358
+.LBB510:
+.LBB511:
+.LBB512:
 	.loc 1 202 0
 	mov	r1, #512
-	addw	r0, r4, #2616
+	addw	r0, r4, #2612
 	bl	__memzero
-.LVL1139:
-.LBE488:
-.LBE487:
-.LBE486:
-	.loc 2 2134 0
-	str	r5, [r4, #2616]
-.L1353:
-	.loc 2 2137 0
-	ldr	r3, [r4, #2616]
+.LVL1157:
+.LBE512:
+.LBE511:
+.LBE510:
+	.loc 2 2183 0
+	str	r5, [r4, #2612]
+.L1358:
+	.loc 2 2186 0
+	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	bne	.L1354
-	.loc 2 2138 0
+	bne	.L1359
+	.loc 2 2187 0
+	ldr	r3, [r4, #2700]
+	str	r3, [r4, #2508]
+	.loc 2 2188 0
 	ldr	r3, [r4, #2704]
-	str	r3, [r4, #2464]
-	.loc 2 2139 0
-	ldr	r3, [r4, #2708]
-	str	r3, [r4, #2468]
-	.loc 2 2140 0
+	str	r3, [r4, #2512]
+	.loc 2 2189 0
+	ldr	r3, [r4, #2620]
+	str	r3, [r4, #2504]
+	.loc 2 2190 0
 	ldr	r3, [r4, #2624]
-	str	r3, [r4, #2460]
-	.loc 2 2141 0
+	str	r3, [r4, #2492]
+	.loc 2 2191 0
 	ldr	r3, [r4, #2628]
-	str	r3, [r4, #2448]
-	.loc 2 2142 0
+	str	r3, [r4, #2484]
+	.loc 2 2192 0
 	ldr	r3, [r4, #2632]
-	str	r3, [r4, #2440]
-	.loc 2 2143 0
-	ldr	r3, [r4, #2636]
-	str	r3, [r4, #2456]
-	.loc 2 2144 0
+	str	r3, [r4, #2500]
+	.loc 2 2193 0
+	ldr	r3, [r4, #2640]
+	str	r3, [r4, #2528]
+	.loc 2 2194 0
 	ldr	r3, [r4, #2644]
-	str	r3, [r4, #2484]
-	.loc 2 2145 0
+	str	r3, [r4, #2536]
+	.loc 2 2195 0
 	ldr	r3, [r4, #2648]
-	str	r3, [r4, #2492]
-	.loc 2 2146 0
+	str	r3, [r4, #2488]
+	.loc 2 2196 0
 	ldr	r3, [r4, #2652]
-	str	r3, [r4, #2444]
-	.loc 2 2147 0
+	str	r3, [r4, #2496]
+	.loc 2 2197 0
 	ldr	r3, [r4, #2656]
-	str	r3, [r4, #2452]
-	.loc 2 2148 0
+	str	r3, [r4, #2540]
+	.loc 2 2198 0
 	ldr	r3, [r4, #2660]
-	str	r3, [r4, #2496]
-	.loc 2 2149 0
-	ldr	r3, [r4, #2664]
-	str	r3, [r4, #2500]
-.L1354:
-	.loc 2 2152 0
+	str	r3, [r4, #2544]
+.L1359:
+	.loc 2 2201 0
 	ldrh	r2, [r4, #68]
-	ldr	r3, [r4, #2484]
-	ldr	r0, [r4, #2480]
+	ldr	r3, [r4, #2528]
+	ldr	r0, [r4, #2524]
 	ldrh	r1, [r4, #16]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1140:
-	str	r0, [r4, #2488]
+.LVL1158:
+	str	r0, [r4, #2532]
 	pop	{r3, r4, r5, pc}
-.L1356:
+.L1361:
 	.align	2
-.L1355:
+.L1360:
 	.word	.LANCHOR0
 	.word	1179929683
 .LFE237:
@@ -14171,134 +14287,134 @@ Ftl_load_ext_data:
 FtlVpcTblFlush:
 	.fnstart
 .LFB219:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI161:
-	.loc 2 1016 0
+.LCFI162:
+	.loc 2 1065 0
 	movs	r5, #0
-	.loc 2 1010 0
-	ldr	r4, .L1369
-	.loc 2 1047 0
+	.loc 2 1059 0
+	ldr	r4, .L1374
+	.loc 2 1096 0
 	movs	r1, #255
-	.loc 2 1005 0
+	.loc 2 1054 0
 	movw	r7, #65535
-.LVL1141:
-	.loc 2 1075 0
-	ldr	r9, .L1369+16
-	.loc 2 1010 0
-	ldr	r3, [r4, #2244]
-	.loc 2 1056 0
-	addw	r8, r4, #3224
-	.loc 2 1011 0
+.LVL1159:
+	.loc 2 1124 0
+	ldr	r9, .L1374+16
+	.loc 2 1059 0
+	ldr	r3, [r4, #3240]
+	.loc 2 1105 0
+	addw	r8, r4, #3220
+	.loc 2 1060 0
 	ldr	r6, [r4, #3244]
-	.loc 2 1075 0
-	ldr	r10, .L1369+20
-	.loc 2 1010 0
-	str	r3, [r4, #3232]
-	.loc 2 1013 0
-	ldrh	r3, [r4, #2556]
-	.loc 2 1011 0
-	str	r6, [r4, #3236]
-	.loc 2 1017 0
+	.loc 2 1124 0
+	ldr	r10, .L1374+20
+	.loc 2 1059 0
+	str	r3, [r4, #3228]
+	.loc 2 1062 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1060 0
+	str	r6, [r4, #3232]
+	.loc 2 1066 0
 	str	r5, [r6, #12]
-	.loc 2 1013 0
+	.loc 2 1062 0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 2 1014 0
+	.loc 2 1063 0
 	movw	r3, #61604
 	strh	r3, [r6]	@ movhi
-	.loc 2 1015 0
-	ldr	r3, [r4, #2564]
-	.loc 2 1016 0
+	.loc 2 1064 0
+	ldr	r3, [r4, #2560]
+	.loc 2 1065 0
 	str	r5, [r6, #8]
-	.loc 2 1025 0
-	ldrh	r2, [r4, #2282]
-	.loc 2 1015 0
+	.loc 2 1074 0
+	ldrh	r2, [r4, #2326]
+	.loc 2 1064 0
 	str	r3, [r6, #4]
-	.loc 2 1019 0
-	ldr	r3, .L1369+4
-	str	r3, [r4, #2504]
-	.loc 2 1020 0
-	ldr	r3, .L1369+8
-	str	r3, [r4, #2508]
-	.loc 2 1021 0
-	ldrh	r3, [r4, #2562]
-	strh	r3, [r4, #2512]	@ movhi
-	.loc 2 1022 0
+	.loc 2 1068 0
+	ldr	r3, .L1374+4
+	str	r3, [r4, #2244]
+	.loc 2 1069 0
+	ldr	r3, .L1374+8
+	str	r3, [r4, #2248]
+	.loc 2 1070 0
+	ldrh	r3, [r4, #2558]
+	strh	r3, [r4, #2252]	@ movhi
+	.loc 2 1071 0
 	ldrh	r3, [r4, #30]
-	strb	r3, [r4, #2514]
-	.loc 2 1024 0
-	ldrh	r3, [r4, #2280]
-	strh	r3, [r4, #2518]	@ movhi
-	.loc 2 1025 0
-	ldrb	r3, [r4, #2286]	@ zero_extendqisi2
+	strb	r3, [r4, #2254]
+	.loc 2 1073 0
+	ldrh	r3, [r4, #2324]
+	strh	r3, [r4, #2258]	@ movhi
+	.loc 2 1074 0
+	ldrb	r3, [r4, #2330]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1029 0
-	ldrh	r2, [r4, #2330]
-	.loc 2 1025 0
-	strh	r3, [r4, #2520]	@ movhi
-	.loc 2 1026 0
-	ldrb	r3, [r4, #2288]	@ zero_extendqisi2
-	strb	r3, [r4, #2515]
-	.loc 2 1028 0
-	ldrh	r3, [r4, #2328]
-	strh	r3, [r4, #2522]	@ movhi
-	.loc 2 1029 0
-	ldrb	r3, [r4, #2334]	@ zero_extendqisi2
+	.loc 2 1078 0
+	ldrh	r2, [r4, #2374]
+	.loc 2 1074 0
+	strh	r3, [r4, #2260]	@ movhi
+	.loc 2 1075 0
+	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
+	strb	r3, [r4, #2255]
+	.loc 2 1077 0
+	ldrh	r3, [r4, #2372]
+	strh	r3, [r4, #2262]	@ movhi
+	.loc 2 1078 0
+	ldrb	r3, [r4, #2378]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	strh	r3, [r4, #2524]	@ movhi
-	.loc 2 1030 0
-	ldrb	r3, [r4, #2336]	@ zero_extendqisi2
-	strb	r3, [r4, #2516]
-	.loc 2 1032 0
-	ldrh	r3, [r4, #2376]
-	.loc 2 1033 0
-	ldrh	r2, [r4, #2378]
-	.loc 2 1047 0
-	ldr	r0, [r4, #3232]
-	.loc 2 1032 0
-	strh	r3, [r4, #2526]	@ movhi
-	.loc 2 1033 0
-	ldrb	r3, [r4, #2382]	@ zero_extendqisi2
+	strh	r3, [r4, #2264]	@ movhi
+	.loc 2 1079 0
+	ldrb	r3, [r4, #2380]	@ zero_extendqisi2
+	strb	r3, [r4, #2256]
+	.loc 2 1081 0
+	ldrh	r3, [r4, #2420]
+	.loc 2 1082 0
+	ldrh	r2, [r4, #2422]
+	.loc 2 1096 0
+	ldr	r0, [r4, #3228]
+	.loc 2 1081 0
+	strh	r3, [r4, #2266]	@ movhi
+	.loc 2 1082 0
+	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1047 0
+	.loc 2 1096 0
 	ldrh	r2, [r4, #86]
-	.loc 2 1033 0
-	strh	r3, [r4, #2528]	@ movhi
-	.loc 2 1034 0
-	ldrb	r3, [r4, #2384]	@ zero_extendqisi2
-	strb	r3, [r4, #2517]
-	.loc 2 1036 0
-	ldr	r3, [r4, #2480]
-	str	r3, [r4, #2536]
-	.loc 2 1041 0
-	ldr	r3, [r4, #2472]
-	str	r3, [r4, #2544]
-	.loc 2 1042 0
-	ldr	r3, [r4, #2476]
-	str	r3, [r4, #2540]
-	.loc 2 1047 0
+	.loc 2 1082 0
+	strh	r3, [r4, #2268]	@ movhi
+	.loc 2 1083 0
+	ldrb	r3, [r4, #2428]	@ zero_extendqisi2
+	strb	r3, [r4, #2257]
+	.loc 2 1085 0
+	ldr	r3, [r4, #2524]
+	str	r3, [r4, #2276]
+	.loc 2 1090 0
+	ldr	r3, [r4, #2516]
+	str	r3, [r4, #2284]
+	.loc 2 1091 0
+	ldr	r3, [r4, #2520]
+	str	r3, [r4, #2280]
+	.loc 2 1096 0
 	bl	ftl_memset
-.LVL1142:
-	.loc 2 1048 0
+.LVL1160:
+	.loc 2 1097 0
 	movs	r2, #48
-	addw	r1, r4, #2504
-	ldr	r0, [r4, #3232]
+	addw	r1, r4, #2244
+	ldr	r0, [r4, #3228]
 	bl	ftl_memcpy
-.LVL1143:
-	.loc 2 1049 0
+.LVL1161:
+	.loc 2 1098 0
 	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #3232]
-	ldr	r1, [r4, #2260]
+	ldr	r0, [r4, #3228]
+	ldr	r1, [r4, #2300]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
-.LVL1144:
-	.loc 2 1050 0
+.LVL1162:
+	.loc 2 1099 0
 	ldrh	r0, [r4, #16]
-	ldr	r3, [r4, #3232]
+	ldr	r3, [r4, #3228]
 	ldr	r1, [r4]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -14307,148 +14423,148 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-.LVL1145:
-	.loc 2 1051 0
+.LVL1163:
+	.loc 2 1100 0
 	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.LVL1146:
-.L1358:
-	.loc 2 1053 0
-	ldr	r3, [r4, #2244]
-	.loc 2 1056 0
-	mov	r0, r8
-	.loc 2 1055 0
-	ldrh	r2, [r4, #2556]
-	.loc 2 1053 0
-	str	r3, [r4, #3232]
-	.loc 2 1054 0
+.LVL1164:
+.L1363:
+	.loc 2 1102 0
+	ldr	r3, [r4, #3240]
+	.loc 2 1105 0
+	mov	r0, r8
+	.loc 2 1104 0
+	ldrh	r2, [r4, #2552]
+	.loc 2 1102 0
+	str	r3, [r4, #3228]
+	.loc 2 1103 0
 	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3236]
-	.loc 2 1055 0
-	ldrh	r3, [r4, #2558]
+	str	r3, [r4, #3232]
+	.loc 2 1104 0
+	ldrh	r3, [r4, #2554]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3228]
-	.loc 2 1056 0
+	str	r3, [r4, #3224]
+	.loc 2 1105 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1147:
-	.loc 2 1057 0
+.LVL1165:
+	.loc 2 1106 0
 	ldrh	r3, [r4, #80]
-	ldrh	r2, [r4, #2558]
+	ldrh	r2, [r4, #2554]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1359
-	.loc 2 1059 0
-	ldrh	r3, [r4, #2556]
-	.loc 2 1058 0
-	ldrh	r7, [r4, #2560]
-	.loc 2 1059 0
-	strh	r3, [r4, #2560]	@ movhi
-	.loc 2 1060 0
+	blt	.L1364
+	.loc 2 1108 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1107 0
+	ldrh	r7, [r4, #2556]
+	.loc 2 1108 0
+	strh	r3, [r4, #2556]	@ movhi
+	.loc 2 1109 0
 	movs	r3, #0
-	strh	r3, [r4, #2558]	@ movhi
-	.loc 2 1061 0
+	strh	r3, [r4, #2554]	@ movhi
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1148:
-	.loc 2 1066 0
-	ldr	r3, [r4, #2472]
-	.loc 2 1061 0
-	strh	r0, [r4, #2556]	@ movhi
-	.loc 2 1066 0
+.LVL1166:
+	.loc 2 1115 0
+	ldr	r3, [r4, #2516]
+	.loc 2 1110 0
+	strh	r0, [r4, #2552]	@ movhi
+	.loc 2 1115 0
 	adds	r2, r3, #1
-	str	r3, [r4, #2564]
-	str	r2, [r4, #2472]
-	.loc 2 1067 0
+	str	r3, [r4, #2560]
+	str	r2, [r4, #2516]
+	.loc 2 1116 0
 	lsls	r2, r0, #10
-	str	r2, [r4, #3228]
-	.loc 2 1068 0
+	str	r2, [r4, #3224]
+	.loc 2 1117 0
 	str	r3, [r6, #4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	r0, [r6, #2]	@ movhi
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
 	mov	r0, r8
 	bl	FlashProgPages
-.LVL1149:
-.L1359:
-	.loc 2 1072 0
-	ldrh	r3, [r4, #2558]
-	.loc 2 1073 0
-	ldr	r2, [r4, #3224]
-	.loc 2 1072 0
+.LVL1167:
+.L1364:
+	.loc 2 1121 0
+	ldrh	r3, [r4, #2554]
+	.loc 2 1122 0
+	ldr	r2, [r4, #3220]
+	.loc 2 1121 0
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1073 0
+	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1072 0
-	strh	r3, [r4, #2558]	@ movhi
-	.loc 2 1073 0
-	bne	.L1360
-	.loc 2 1075 0
+	.loc 2 1121 0
+	strh	r3, [r4, #2554]	@ movhi
+	.loc 2 1122 0
+	bne	.L1365
+	.loc 2 1124 0
 	cmp	r3, #1
-	bne	.L1361
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	movw	r2, #1075
+	bne	.L1366
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	movw	r2, #1124
 	mov	r1, r9
 	mov	r0, r10
 	bl	printk
-.LVL1150:
-.L1361:
-	.loc 2 1076 0 is_stmt 1
-	ldrh	r3, [r4, #2558]
-	.loc 2 1078 0
+.LVL1168:
+.L1366:
+	.loc 2 1125 0 is_stmt 1
+	ldrh	r3, [r4, #2554]
+	.loc 2 1127 0
 	adds	r5, r5, #1
-.LVL1151:
+.LVL1169:
 	uxth	r5, r5
-.LVL1152:
-	.loc 2 1076 0
+.LVL1170:
+	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1077 0
+	.loc 2 1126 0
 	ittt	eq
 	ldrheq	r3, [r4, #80]
 	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2558]	@ movhi
-	.loc 2 1079 0
+	strheq	r3, [r4, #2554]	@ movhi
+	.loc 2 1128 0
 	cmp	r5, #3
-	bls	.L1358
-	.loc 2 1080 0
+	bls	.L1363
+	.loc 2 1129 0
 	mov	r2, r5
-	ldr	r1, [r4, #3228]
-	ldr	r0, .L1369+12
+	ldr	r1, [r4, #3224]
+	ldr	r0, .L1374+12
 	bl	printk
-.LVL1153:
-.L1364:
-	b	.L1364
-.L1360:
-	.loc 2 1086 0
+.LVL1171:
+.L1369:
+	b	.L1369
+.L1365:
+	.loc 2 1135 0
 	cmp	r3, #1
-	beq	.L1358
-	.loc 2 1089 0
+	beq	.L1363
+	.loc 2 1138 0
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1365
-	.loc 2 1090 0
+	beq	.L1370
+	.loc 2 1139 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL1154:
-.L1365:
-	.loc 2 1092 0
+.LVL1172:
+.L1370:
+	.loc 2 1141 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL1155:
-.L1370:
+.LVL1173:
+.L1375:
 	.align	2
-.L1369:
+.L1374:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177344
-	.word	.LC97
+	.word	1342177348
+	.word	.LC100
 	.word	.LANCHOR1+454
 	.word	.LC1
 .LFE219:
@@ -14464,136 +14580,136 @@ FtlVpcTblFlush:
 FtlVpcCheckAndModify:
 	.fnstart
 .LFB239:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
-.LCFI162:
-	.loc 2 2199 0
+.LCFI163:
+	.loc 2 2249 0
 	movs	r5, #0
-.LVL1156:
-	.loc 2 2198 0
-	ldr	r4, .L1383
-	.loc 2 2197 0
-	ldr	r1, .L1383+4
-	ldr	r0, .L1383+8
+.LVL1174:
+	.loc 2 2248 0
+	ldr	r4, .L1388
+	.loc 2 2247 0
+	ldr	r1, .L1388+4
+	ldr	r0, .L1388+8
 	bl	printk
-.LVL1157:
-	.loc 2 2198 0
+.LVL1175:
+	.loc 2 2248 0
 	ldrh	r2, [r4, #18]
 	movs	r1, #0
 	ldr	r0, [r4, #3824]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1158:
-.L1372:
-	.loc 2 2199 0 discriminator 1
-	ldr	r3, [r4, #2436]
+.LVL1176:
+.L1377:
+	.loc 2 2249 0 discriminator 1
+	ldr	r3, [r4, #2480]
 	cmp	r5, r3
-	bcc	.L1374
-	.loc 2 2209 0 discriminator 1
-	ldr	r9, .L1383+12
+	bcc	.L1379
+	.loc 2 2259 0 discriminator 1
+	ldr	r9, .L1388+12
 	movs	r7, #0
-	.loc 2 2207 0 discriminator 1
+	.loc 2 2257 0 discriminator 1
 	movw	r8, #65535
-.LVL1159:
-.L1375:
-	.loc 2 2206 0 discriminator 1
+.LVL1177:
+.L1380:
+	.loc 2 2256 0 discriminator 1
 	ldrh	r3, [r4, #16]
 	uxth	r5, r7
-.LVL1160:
+.LVL1178:
 	cmp	r3, r5
-	bhi	.L1379
-	.loc 2 2218 0
+	bhi	.L1384
+	.loc 2 2268 0
 	add	sp, sp, #12
-.LCFI163:
+.LCFI164:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL1161:
-.L1374:
-.LCFI164:
-	.loc 2 2200 0
+.LVL1179:
+.L1379:
+.LCFI165:
+	.loc 2 2250 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1162:
-	.loc 2 2201 0
+.LVL1180:
+	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1373
-	.loc 2 2202 0
+	beq	.L1378
+	.loc 2 2252 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1163:
-	.loc 2 2203 0
+.LVL1181:
+	.loc 2 2253 0
 	ldr	r2, [r4, #3824]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1373:
-	.loc 2 2199 0 discriminator 2
+.L1378:
+	.loc 2 2249 0 discriminator 2
 	adds	r5, r5, #1
-	b	.L1372
-.LVL1164:
-.L1379:
-	.loc 2 2207 0
-	ldr	r3, [r4, #2260]
+	b	.L1377
+.LVL1182:
+.L1384:
+	.loc 2 2257 0
+	ldr	r3, [r4, #2300]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4, #3824]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1377
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1382
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	cmp	r2, r8
-	beq	.L1377
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1382
+	.loc 2 2259 0 is_stmt 1
 	mov	r1, r6
 	mov	r0, r9
 	bl	printk
-.LVL1165:
-	.loc 2 2210 0
-	ldrh	r3, [r4, #2280]
+.LVL1183:
+	.loc 2 2260 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, r5
-	beq	.L1377
-	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2376]
+	beq	.L1382
+	.loc 2 2260 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #2420]
 	cmp	r3, r5
-	beq	.L1377
-	.loc 2 2210 0 discriminator 2
-	ldrh	r3, [r4, #2328]
+	beq	.L1382
+	.loc 2 2260 0 discriminator 2
+	ldrh	r3, [r4, #2372]
 	cmp	r3, r5
-	beq	.L1377
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1382
+	.loc 2 2261 0 is_stmt 1
 	ldr	r3, [r4, #3824]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2211 0
+	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2212 0
+	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1166:
-	.loc 2 2213 0
+.LVL1184:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1167:
-	.loc 2 2214 0
+.LVL1185:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1168:
-.L1377:
+.LVL1186:
+.L1382:
 	adds	r7, r7, #1
-	b	.L1375
-.L1384:
+	b	.L1380
+.L1389:
 	.align	2
-.L1383:
+.L1388:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC87
-	.word	.LC98
+	.word	.LC90
+	.word	.LC101
 .LFE239:
 	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -14607,97 +14723,97 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	.fnstart
 .LFB249:
-	.loc 2 2631 0
+	.loc 2 2679 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1169:
+.LVL1187:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI165:
-	.loc 2 2631 0
+.LCFI166:
+	.loc 2 2679 0
 	mov	r6, r0
-	.loc 2 2633 0
-	ldr	r4, .L1395
-	.loc 2 2632 0
+	.loc 2 2681 0
+	ldr	r4, .L1400
+	.loc 2 2680 0
 	ldrh	r5, [r0]
-.LVL1170:
-	.loc 2 2633 0
+.LVL1188:
+	.loc 2 2681 0
 	ldrh	r3, [r4, #16]
 	cmp	r3, r5
-	bcs	.L1386
-	.loc 2 2633 0 is_stmt 0 discriminator 1
-	movw	r2, #2633
-	ldr	r1, .L1395+4
-	ldr	r0, .L1395+8
+	bcs	.L1391
+	.loc 2 2681 0 is_stmt 0 discriminator 1
+	movw	r2, #2681
+	ldr	r1, .L1400+4
+	ldr	r0, .L1400+8
 	bl	printk
-.LVL1171:
-.L1386:
-	.loc 2 2635 0 is_stmt 1
+.LVL1189:
+.L1391:
+	.loc 2 2683 0 is_stmt 1
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1387
-	.loc 2 2636 0
-	ldr	r3, [r4, #2260]
-	.loc 2 2637 0
+	beq	.L1392
+	.loc 2 2684 0
+	ldr	r3, [r4, #2300]
+	.loc 2 2685 0
 	mov	r0, r5
-	.loc 2 2636 0
+	.loc 2 2684 0
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1388
-	.loc 2 2637 0
+	cbz	r3, .L1393
+	.loc 2 2685 0
 	bl	INSERT_DATA_LIST
-.LVL1172:
-.L1387:
-	.loc 2 2642 0
+.LVL1190:
+.L1392:
+	.loc 2 2690 0
 	ldrh	r0, [r4, #3952]
-	.loc 2 2641 0
+	.loc 2 2689 0
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2642 0
+	.loc 2 2690 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1389
-	.loc 2 2643 0
+	beq	.L1394
+	.loc 2 2691 0
 	cmp	r5, r0
-	bne	.L1390
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2260]
+	bne	.L1395
+	.loc 2 2691 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1391
-.L1390:
-	.loc 2 2644 0 is_stmt 1
+	cbz	r3, .L1396
+.L1395:
+	.loc 2 2692 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1173:
-.L1391:
-	.loc 2 2645 0
+.LVL1191:
+.L1396:
+	.loc 2 2693 0
 	movw	r3, #65535
 	strh	r3, [r4, #3952]	@ movhi
-.L1389:
-	.loc 2 2647 0
+.L1394:
+	.loc 2 2695 0
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1174:
-	.loc 2 2648 0
+.LVL1192:
+	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1175:
-	.loc 2 2649 0
+.LVL1193:
+	.loc 2 2697 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1176:
-	.loc 2 2650 0
+.LVL1194:
+	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1177:
-	.loc 2 2652 0
+.LVL1195:
+	.loc 2 2700 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1178:
-.L1388:
-	.loc 2 2639 0
+.LVL1196:
+.L1393:
+	.loc 2 2687 0
 	bl	INSERT_FREE_LIST
-.LVL1179:
-	b	.L1387
-.L1396:
+.LVL1197:
+	b	.L1392
+.L1401:
 	.align	2
-.L1395:
+.L1400:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -14714,198 +14830,198 @@ allocate_new_data_superblock:
 FtlProgPages:
 	.fnstart
 .LFB165:
-	.loc 3 902 0
+	.loc 3 904 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1180:
+.LVL1198:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI166:
-	.loc 3 911 0
+.LCFI167:
+	.loc 3 913 0
 	movs	r7, #0
-.LVL1181:
-	ldr	r6, .L1411
-	.loc 3 902 0
+.LVL1199:
+	ldr	r6, .L1416
+	.loc 3 904 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI167:
-	.loc 3 902 0
+.LCFI168:
+	.loc 3 904 0
 	mov	r4, r3
-	.loc 3 909 0
+	.loc 3 911 0
 	movs	r2, #0
-.LVL1182:
-	.loc 3 931 0
-	ldr	r10, .L1411+8
-	.loc 3 902 0
+.LVL1200:
+	.loc 3 933 0
+	ldr	r10, .L1416+8
+	.loc 3 904 0
 	mov	r5, r0
-	.loc 3 931 0
-	ldr	fp, .L1411+12
-	.loc 3 902 0
+	.loc 3 933 0
+	ldr	fp, .L1416+12
+	.loc 3 904 0
 	mov	r9, r1
-	.loc 3 909 0
+	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1183:
+.LVL1201:
 	bl	FlashProgPages
-.LVL1184:
-.L1398:
-	.loc 3 911 0 discriminator 1
+.LVL1202:
+.L1403:
+	.loc 3 913 0 discriminator 1
 	cmp	r7, r9
-	beq	.L1405
-	.loc 3 917 0
+	beq	.L1410
+	.loc 3 919 0
 	mov	r8, #0
-	b	.L1406
-.LVL1185:
-.L1401:
-	.loc 3 913 0
+	b	.L1411
+.LVL1203:
+.L1406:
+	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1186:
-	.loc 3 914 0
+.LVL1204:
+	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1399
-	.loc 3 915 0
-	ldr	r1, [r6, #2260]
+	bne	.L1404
+	.loc 3 917 0
+	ldr	r1, [r6, #2300]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 3 916 0
+	.loc 3 918 0
 	ldrh	r3, [r6, #78]
-	.loc 3 917 0
+	.loc 3 919 0
 	strb	r8, [r4, #6]
-	.loc 3 918 0
+	.loc 3 920 0
 	strh	r8, [r4, #4]	@ movhi
-	.loc 3 916 0
+	.loc 3 918 0
 	strh	r3, [r4, #2]	@ movhi
-.L1399:
-	.loc 3 920 0
+.L1404:
+	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1400
-	.loc 3 921 0
+	cbnz	r3, .L1405
+	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1187:
-.L1400:
-	.loc 3 924 0
-	ldr	r3, [r6, #2712]
+.LVL1205:
+.L1405:
+	.loc 3 926 0
+	ldr	r3, [r6, #2708]
 	adds	r3, r3, #1
-	str	r3, [r6, #2712]
-	.loc 3 925 0
+	str	r3, [r6, #2708]
+	.loc 3 927 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1188:
-	.loc 3 926 0
+.LVL1206:
+	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1189:
-	.loc 3 928 0
+.LVL1207:
+	.loc 3 930 0
 	movs	r2, #0
-	.loc 3 927 0
+	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 926 0
-	str	r0, [sp, #12]
 	.loc 3 928 0
+	str	r0, [sp, #12]
+	.loc 3 930 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1190:
-.L1406:
-	.loc 3 912 0
+.LVL1208:
+.L1411:
+	.loc 3 914 0
 	ldr	r3, [r5]
-.LVL1191:
+.LVL1209:
 	adds	r3, r3, #1
-	beq	.L1401
-	.loc 3 931 0
+	beq	.L1406
+	.loc 3 933 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
 	cmp	r2, r3
-	bcc	.L1402
-	.loc 3 931 0 is_stmt 0 discriminator 1
-	movw	r2, #931
+	bcc	.L1407
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	movw	r2, #933
 	mov	r1, r10
 	mov	r0, fp
 	bl	printk
-.LVL1192:
-.L1402:
-	.loc 3 932 0 is_stmt 1
+.LVL1210:
+.L1407:
+	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
 	add	r1, sp, #16
-	.loc 3 933 0
+	.loc 3 935 0
 	movs	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 932 0
+	.loc 3 934 0
 	str	r3, [r1, #-4]!
-.LVL1193:
-	.loc 3 933 0
-	bl	log2phys
-.LVL1194:
+.LVL1211:
 	.loc 3 935 0
+	bl	log2phys
+.LVL1212:
+	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
-.LVL1195:
-	.loc 3 937 0
+.LVL1213:
+	.loc 3 939 0
 	ubfx	r0, r3, #10, #16
 	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
-.LVL1196:
-	.loc 3 938 0
+.LVL1214:
+	.loc 3 940 0
 	ldr	r3, [sp, #4]
-.LVL1197:
-	.loc 3 937 0
+.LVL1215:
+	.loc 3 939 0
 	mov	r8, r0
-	.loc 3 938 0
-	adds	r3, r3, #1
-	beq	.L1403
 	.loc 3 940 0
-	ldr	r3, [r6, #2260]
-.LVL1198:
+	adds	r3, r3, #1
+	beq	.L1408
+	.loc 3 942 0
+	ldr	r3, [r6, #2300]
+.LVL1216:
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1404
-	.loc 3 941 0
+	cbnz	r2, .L1409
+	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1411+4
+	ldr	r0, .L1416+4
 	bl	printk
-.LVL1199:
-.L1404:
-	.loc 3 942 0
+.LVL1217:
+.L1409:
+	.loc 3 944 0
 	mov	r0, r8
 	bl	decrement_vpc_count
-.LVL1200:
-.L1403:
-	.loc 3 911 0 discriminator 2
+.LVL1218:
+.L1408:
+	.loc 3 913 0 discriminator 2
 	adds	r7, r7, #1
 	adds	r5, r5, #20
-	b	.L1398
-.LVL1201:
-.L1405:
-	.loc 3 946 0
+	b	.L1403
+.LVL1219:
+.L1410:
+	.loc 3 948 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
-.LVL1202:
+.LVL1220:
 	cmp	r2, r3
-	bcc	.L1397
-	.loc 3 946 0 is_stmt 0 discriminator 1
-	movw	r2, #946
-	ldr	r1, .L1411+8
-	ldr	r0, .L1411+12
+	bcc	.L1402
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	mov	r2, #948
+	ldr	r1, .L1416+8
+	ldr	r0, .L1416+12
 	bl	printk
-.LVL1203:
-.L1397:
-	.loc 3 947 0 is_stmt 1
+.LVL1221:
+.L1402:
+	.loc 3 949 0 is_stmt 1
 	add	sp, sp, #20
-.LCFI168:
+.LCFI169:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1204:
-.L1412:
+.LVL1222:
+.L1417:
 	.align	2
-.L1411:
+.L1416:
 	.word	.LANCHOR0
-	.word	.LC99
+	.word	.LC102
 	.word	.LANCHOR1+519
 	.word	.LC1
 .LFE165:
@@ -14921,33 +15037,33 @@ FtlProgPages:
 FtlCacheWriteBack:
 	.fnstart
 .LFB166:
-	.loc 3 950 0
+	.loc 3 952 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI169:
-	.loc 3 951 0
-	ldr	r4, .L1418
+.LCFI170:
+	.loc 3 953 0
+	ldr	r4, .L1423
 	ldr	r0, [r4, #3948]
-	cbz	r0, .L1414
-	.loc 3 952 0
-	ldr	r3, .L1418+4
+	cbz	r0, .L1419
+	.loc 3 954 0
+	ldr	r3, .L1423+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3, #-236]
 	bl	FtlProgPages
-.LVL1205:
-	.loc 3 953 0
+.LVL1223:
+	.loc 3 955 0
 	movs	r3, #0
 	str	r3, [r4, #3948]
-.L1414:
-	.loc 3 956 0
+.L1419:
+	.loc 3 958 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1419:
+.L1424:
 	.align	2
-.L1418:
+.L1423:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 .LFE166:
@@ -14968,20 +15084,20 @@ FtlSysFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI170:
+.LCFI171:
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1206:
+.LVL1224:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1207:
+.LVL1225:
 	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1208:
+.LVL1226:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1209:
+.LVL1227:
 	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
@@ -15003,22 +15119,22 @@ sftl_deinit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI171:
+.LCFI172:
 	.loc 3 807 0
-	ldr	r3, .L1423
+	ldr	r3, .L1428
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1422
+	bne	.L1427
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1210:
-.L1422:
+.LVL1228:
+.L1427:
 	.loc 3 810 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1424:
+.L1429:
 	.align	2
-.L1423:
+.L1428:
 	.word	.LANCHOR2
 .LFE163:
 	.fnend
@@ -15033,154 +15149,154 @@ sftl_deinit:
 FtlDiscard:
 	.fnstart
 .LFB168:
-	.loc 3 1154 0
+	.loc 3 1157 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1211:
+.LVL1229:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #8
-.LCFI172:
-.LVL1212:
-	.loc 3 1161 0
+.LCFI173:
+.LVL1230:
+	.loc 3 1164 0
 	adds	r2, r0, r1
-	ldr	r6, .L1440
-	.loc 3 1154 0
+	ldr	r6, .L1445
+	.loc 3 1157 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1161 0
+	.loc 3 1164 0
 	ldr	r3, [r6, #116]
 	cmp	r2, r3
-	bhi	.L1433
-	.loc 3 1164 0
+	bhi	.L1438
+	.loc 3 1167 0
 	cmp	r1, #31
-	bhi	.L1427
-.LVL1213:
-.L1432:
-	.loc 3 1165 0
+	bhi	.L1432
+.LVL1231:
+.L1437:
+	.loc 3 1168 0
 	movs	r0, #0
-.L1425:
-	.loc 3 1198 0
+.L1430:
+	.loc 3 1201 0
 	add	sp, sp, #8
-.LCFI173:
+.LCFI174:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1214:
-.L1427:
-.LCFI174:
-	.loc 3 1167 0
+.LVL1232:
+.L1432:
+.LCFI175:
+	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1215:
-	.loc 3 1169 0
+.LVL1233:
+	.loc 3 1172 0
 	ldrh	r4, [r6, #34]
 	mov	r0, r7
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1216:
-	.loc 3 1170 0
+.LVL1234:
+	.loc 3 1173 0
 	smulbb	r3, r0, r4
-	.loc 3 1169 0
+	.loc 3 1172 0
 	mov	r8, r0
-.LVL1217:
-	.loc 3 1170 0
+.LVL1235:
+	.loc 3 1173 0
 	subs	r7, r7, r3
-.LVL1218:
+.LVL1236:
 	uxth	r7, r7
-.LVL1219:
-	.loc 3 1171 0
-	cbz	r7, .L1428
-	.loc 3 1172 0
+.LVL1237:
+	.loc 3 1174 0
+	cbz	r7, .L1433
+	.loc 3 1175 0
 	subs	r4, r4, r7
-	.loc 3 1173 0
+	.loc 3 1176 0
 	add	r8, r0, #1
-	.loc 3 1172 0
+	.loc 3 1175 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1174 0
-	subs	r5, r5, r4
-.L1428:
-	.loc 3 1181 0
-	ldr	r4, .L1440+4
 	.loc 3 1177 0
+	subs	r5, r5, r4
+.L1433:
+	.loc 3 1184 0
+	ldr	r4, .L1445+4
+	.loc 3 1180 0
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.LVL1220:
-.L1429:
-	.loc 3 1178 0
+.LVL1238:
+.L1434:
+	.loc 3 1181 0
 	ldrh	r3, [r6, #34]
 	cmp	r5, r3
-	bcs	.L1431
-	.loc 3 1191 0
-	ldr	r3, .L1440+4
+	bcs	.L1436
+	.loc 3 1194 0
+	ldr	r3, .L1445+4
 	ldr	r2, [r3, #-232]
 	cmp	r2, #32
-	bls	.L1432
-	.loc 3 1193 0
+	bls	.L1437
+	.loc 3 1196 0
 	movs	r4, #0
 	str	r4, [r3, #-232]
-	.loc 3 1194 0
+	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1221:
-	.loc 3 1195 0
+.LVL1239:
+	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1222:
-	b	.L1432
-.L1431:
-	.loc 3 1179 0
+.LVL1240:
+	b	.L1437
+.L1436:
+	.loc 3 1182 0
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r8
 	bl	log2phys
-.LVL1223:
-	.loc 3 1180 0
+.LVL1241:
+	.loc 3 1183 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-.LVL1224:
-	beq	.L1430
-	.loc 3 1181 0
+.LVL1242:
+	beq	.L1435
+	.loc 3 1184 0
 	ldr	r3, [r4, #-232]
-.LVL1225:
-	.loc 3 1183 0
+.LVL1243:
+	.loc 3 1186 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r8
-	.loc 3 1181 0
+	.loc 3 1184 0
 	adds	r3, r3, #1
 	str	r3, [r4, #-232]
-	.loc 3 1182 0
-	ldr	r3, [r6, #2444]
+	.loc 3 1185 0
+	ldr	r3, [r6, #2488]
 	adds	r3, r3, #1
-	str	r3, [r6, #2444]
-	.loc 3 1183 0
+	str	r3, [r6, #2488]
+	.loc 3 1186 0
 	bl	log2phys
-.LVL1226:
-	.loc 3 1184 0
+.LVL1244:
+	.loc 3 1187 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1227:
-	.loc 3 1185 0
-	bl	decrement_vpc_count
-.LVL1228:
-.L1430:
+.LVL1245:
 	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1246:
+.L1435:
+	.loc 3 1191 0
 	ldrh	r3, [r6, #34]
-.LVL1229:
-	.loc 3 1187 0
+.LVL1247:
+	.loc 3 1190 0
 	add	r8, r8, #1
-	.loc 3 1188 0
+	.loc 3 1191 0
 	subs	r5, r5, r3
-	b	.L1429
-.LVL1230:
-.L1433:
-	.loc 3 1162 0
+	b	.L1434
+.LVL1248:
+.L1438:
+	.loc 3 1165 0
 	mov	r0, #-1
-	b	.L1425
-.L1441:
+	b	.L1430
+.L1446:
 	.align	2
-.L1440:
+.L1445:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 .LFE168:
@@ -15199,75 +15315,75 @@ FtlGcFreeTempBlock:
 	.loc 5 112 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1231:
+.LVL1249:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI175:
-.LVL1232:
+.LCFI176:
+.LVL1250:
 	.loc 5 119 0
 	movw	r2, #65535
 	.loc 5 115 0
-	ldr	r4, .L1468
+	ldr	r4, .L1473
 	.loc 5 119 0
-	ldrh	r5, [r4, #2376]
+	ldrh	r5, [r4, #2420]
 	.loc 5 115 0
 	ldrh	r1, [r4, #78]
-.LVL1233:
+.LVL1251:
 	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1443
-.LVL1234:
-.L1453:
+	bne	.L1448
+.LVL1252:
+.L1458:
 	.loc 5 153 0
-	ldrh	r2, [r4, #2376]
+	ldrh	r2, [r4, #2420]
 	.loc 5 152 0
 	movs	r3, #0
 	str	r3, [r4, #3960]
 	.loc 5 153 0
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1466
-.L1444:
+	bne	.L1471
+.L1449:
 	.loc 5 154 0
 	movs	r0, #0
-.L1442:
+.L1447:
 	.loc 5 199 0
 	add	sp, sp, #12
-.LCFI176:
+.LCFI177:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1235:
-.L1443:
-.LCFI177:
+.LVL1253:
+.L1448:
+.LCFI178:
 	.loc 5 121 0
-	cbz	r0, .L1446
+	cbz	r0, .L1451
 	.loc 5 123 0
-	ldr	r3, .L1468+4
+	ldr	r3, .L1473+4
 	ldrh	r0, [r3, #4]
-.LVL1236:
+.LVL1254:
 	cmp	r0, r2
-	beq	.L1447
-.L1448:
+	beq	.L1452
+.L1453:
 	.loc 5 122 0
 	movs	r1, #2
-.LVL1237:
-.L1446:
+.LVL1255:
+.L1451:
 	.loc 5 131 0
-	ldr	r0, .L1468+8
-.LVL1238:
+	ldr	r0, .L1473+8
+.LVL1256:
 	bl	FtlGcScanTempBlk
-.LVL1239:
+.LVL1257:
 	str	r0, [sp, #4]
-.LVL1240:
+.LVL1258:
 	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1449
+	beq	.L1454
 	.loc 5 135 0
-	ldr	r2, [r4, #2248]
+	ldr	r2, [r4, #2304]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1450
+	bls	.L1455
 	.loc 5 136 0
 	subs	r3, r3, #5
 	.loc 5 137 0
@@ -15276,13 +15392,13 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1241:
-.L1450:
+.LVL1259:
+.L1455:
 	.loc 5 139 0
 	ldr	r3, [r4, #3960]
-	cbnz	r3, .L1451
+	cbnz	r3, .L1456
 	.loc 5 140 0
-	ldr	r3, [r4, #2712]
+	ldr	r3, [r4, #2708]
 	.loc 5 141 0
 	ldr	r0, [sp, #4]
 	.loc 5 140 0
@@ -15290,61 +15406,61 @@ FtlGcFreeTempBlock:
 	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
 	.loc 5 140 0
-	str	r3, [r4, #2712]
+	str	r3, [r4, #2708]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1242:
+.LVL1260:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1243:
-.L1451:
+.LVL1261:
+.L1456:
 	.loc 5 144 0
 	movs	r3, #0
 	str	r3, [r4, #3960]
-.L1462:
+.L1467:
 	.loc 5 149 0
 	movs	r0, #1
-	b	.L1442
-.LVL1244:
-.L1447:
+	b	.L1447
+.LVL1262:
+.L1452:
 	.loc 5 124 0
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	.loc 5 125 0
-	ldrh	r3, [r4, #2276]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #17
-	bhi	.L1448
-	b	.L1446
-.LVL1245:
-.L1449:
+	bhi	.L1453
+	b	.L1451
+.LVL1263:
+.L1454:
 	.loc 5 148 0
-	ldr	r3, .L1468+4
+	ldr	r3, .L1473+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1462
-	b	.L1453
-.LVL1246:
-.L1466:
+	bne	.L1467
+	b	.L1458
+.LVL1264:
+.L1471:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1247:
+.LVL1265:
 	.loc 5 162 0
-	ldrb	r1, [r4, #2383]	@ zero_extendqisi2
+	ldrb	r1, [r4, #2427]	@ zero_extendqisi2
 	ldrh	r3, [r4, #78]
-	ldrh	r2, [r4, #3180]
+	ldrh	r2, [r4, #3176]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1454
+	beq	.L1459
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	movs	r2, #162
-	ldr	r1, .L1468+12
-	ldr	r0, .L1468+16
+	ldr	r1, .L1473+12
+	ldr	r0, .L1473+16
 	bl	printk
-.LVL1248:
-.L1454:
+.LVL1266:
+.L1459:
 	.loc 5 163 0 is_stmt 1
-	ldrb	r3, [r4, #2383]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2427]	@ zero_extendqisi2
 	.loc 5 165 0
 	movs	r6, #0
 	.loc 5 163 0
@@ -15352,107 +15468,107 @@ FtlGcFreeTempBlock:
 	.loc 5 166 0
 	mov	r9, #12
 	.loc 5 163 0
-	ldr	r2, [r4, #2260]
-	ldrh	r1, [r4, #2376]
+	ldr	r2, [r4, #2300]
+	ldrh	r1, [r4, #2420]
 	.loc 5 168 0
-	ldr	r10, .L1468+12
+	ldr	r10, .L1473+12
 	.loc 5 163 0
 	smulbb	r3, r3, r0
 	.loc 5 168 0
-	ldr	fp, .L1468+16
+	ldr	fp, .L1473+16
 	.loc 5 163 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 5 164 0
-	ldr	r2, [r4, #2460]
-	ldrh	r3, [r4, #3180]
+	ldr	r2, [r4, #2504]
+	ldrh	r3, [r4, #3176]
 	add	r3, r3, r2
-	str	r3, [r4, #2460]
-.LVL1249:
-.L1455:
+	str	r3, [r4, #2504]
+.LVL1267:
+.L1460:
 	.loc 5 165 0 discriminator 1
-	ldrh	r2, [r4, #3180]
+	ldrh	r2, [r4, #3176]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1459
+	bhi	.L1464
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1250:
+.LVL1268:
 	.loc 5 182 0
-	ldrh	r0, [r4, #2376]
-	ldr	r3, [r4, #2260]
+	ldrh	r0, [r4, #2420]
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1460
+	beq	.L1465
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1251:
-.L1461:
+.LVL1269:
+.L1466:
 	.loc 5 187 0
 	movs	r5, #0
-.LVL1252:
+.LVL1270:
 	.loc 5 186 0
 	movw	r6, #65535
-	strh	r6, [r4, #2376]	@ movhi
+	strh	r6, [r4, #2420]	@ movhi
 	.loc 5 187 0
-	strh	r5, [r4, #3180]	@ movhi
+	strh	r5, [r4, #3176]	@ movhi
 	.loc 5 188 0
-	strh	r5, [r4, #3172]	@ movhi
+	strh	r5, [r4, #3168]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1253:
+.LVL1271:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1254:
+.LVL1272:
 	.loc 5 191 0
-	ldrh	r3, [r4, #2552]
-	ldrh	r2, [r4, #2276]
+	ldrh	r3, [r4, #2548]
+	ldrh	r2, [r4, #2320]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1444
+	ble	.L1449
 	.loc 5 193 0
 	movs	r3, #20
 	.loc 5 192 0
-	strh	r6, [r4, #2568]	@ movhi
+	strh	r6, [r4, #2564]	@ movhi
 	.loc 5 193 0
-	strh	r3, [r4, #3128]	@ movhi
-	b	.L1444
-.LVL1255:
-.L1459:
+	strh	r3, [r4, #3124]	@ movhi
+	b	.L1449
+.LVL1273:
+.L1464:
 	.loc 5 166 0
 	uxth	r7, r6
-	ldr	r8, [r4, #3176]
+	ldr	r8, [r4, #3172]
 	.loc 5 168 0
-	ldr	r3, [r4, #2436]
+	ldr	r3, [r4, #2480]
 	.loc 5 166 0
 	mul	r7, r9, r7
 	add	r5, r8, r7
 	.loc 5 168 0
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1456
+	bcc	.L1461
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	movs	r2, #168
 	mov	r1, r10
 	mov	r0, fp
 	bl	printk
-.LVL1256:
-.L1456:
+.LVL1274:
+.L1461:
 	.loc 5 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1257:
+.LVL1275:
 	.loc 5 170 0
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8, r7]
 	cmp	r0, r3
-	bne	.L1457
+	bne	.L1462
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1258:
+.LVL1276:
 	.loc 5 172 0
 	movs	r2, #1
 	.loc 5 171 0
@@ -15461,35 +15577,35 @@ FtlGcFreeTempBlock:
 	adds	r1, r5, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1259:
+.LVL1277:
 	.loc 5 173 0
 	mov	r0, r7
-.L1467:
+.L1472:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1260:
-.L1458:
+.LVL1278:
+.L1463:
 	adds	r6, r6, #1
-	b	.L1455
-.L1457:
+	b	.L1460
+.L1462:
 	.loc 5 175 0
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1458
+	beq	.L1463
 	.loc 5 177 0
-	ldrh	r0, [r4, #2376]
-	b	.L1467
-.L1460:
+	ldrh	r0, [r4, #2420]
+	b	.L1472
+.L1465:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1261:
-	b	.L1461
-.L1469:
+.LVL1279:
+	b	.L1466
+.L1474:
 	.align	2
-.L1468:
+.L1473:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR0+2376
+	.word	.LANCHOR0+2420
 	.word	.LANCHOR1+532
 	.word	.LC1
 .LFE258:
@@ -15510,39 +15626,39 @@ FtlGcPageRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI178:
+.LCFI179:
 	.loc 5 290 0
-	ldr	r4, .L1472
+	ldr	r4, .L1477
 	ldrh	r1, [r4, #78]
-	addw	r0, r4, #2376
+	addw	r0, r4, #2420
 	bl	FtlGcScanTempBlk
-.LVL1262:
+.LVL1280:
 	.loc 5 291 0
-	ldrh	r2, [r4, #2378]
+	ldrh	r2, [r4, #2422]
 	ldrh	r3, [r4, #78]
 	cmp	r2, r3
-	bcc	.L1470
-.LBB491:
-.LBB492:
+	bcc	.L1475
+.LBB515:
+.LBB516:
 	.loc 5 293 0
 	addw	r0, r4, #3864
 	bl	FtlMapBlkWriteDump_data
-.LVL1263:
+.LVL1281:
 	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1264:
+.LVL1282:
 	.loc 5 295 0
 	movs	r3, #0
 	str	r3, [r4, #3960]
-.L1470:
+.L1475:
 	pop	{r4, pc}
-.L1473:
+.L1478:
 	.align	2
-.L1472:
+.L1477:
 	.word	.LANCHOR0
-.LBE492:
-.LBE491:
+.LBE516:
+.LBE515:
 .LFE261:
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -15556,51 +15672,51 @@ FtlGcPageRecovery:
 FtlPowerLostRecovery:
 	.fnstart
 .LFB233:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI179:
-	.loc 2 2033 0
+.LCFI180:
+	.loc 2 2082 0
 	movs	r5, #0
-	ldr	r4, .L1475
-	.loc 2 2035 0
-	addw	r6, r4, #2280
-	.loc 2 2033 0
+	ldr	r4, .L1480
+	.loc 2 2084 0
+	addw	r6, r4, #2324
+	.loc 2 2082 0
 	str	r5, [r4, #3972]
-	.loc 2 2035 0
+	.loc 2 2084 0
 	mov	r0, r6
-	.loc 2 2037 0
-	addw	r4, r4, #2328
-	.loc 2 2035 0
+	.loc 2 2086 0
+	addw	r4, r4, #2372
+	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1265:
-	.loc 2 2036 0
+.LVL1283:
+	.loc 2 2085 0
 	mov	r0, r6
 	bl	FtlSlcSuperblockCheck
-.LVL1266:
-	.loc 2 2037 0
+.LVL1284:
+	.loc 2 2086 0
 	mov	r0, r4
 	bl	FtlRecoverySuperblock
-.LVL1267:
-	.loc 2 2038 0
+.LVL1285:
+	.loc 2 2087 0
 	mov	r0, r4
 	bl	FtlSlcSuperblockCheck
-.LVL1268:
-	.loc 2 2039 0
+.LVL1286:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1269:
-	.loc 2 2040 0
+.LVL1287:
+	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1270:
-	.loc 2 2042 0
+.LVL1288:
+	.loc 2 2091 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1476:
+.L1481:
 	.align	2
-.L1475:
+.L1480:
 	.word	.LANCHOR0
 .LFE233:
 	.fnend
@@ -15620,43 +15736,43 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI180:
+.LCFI181:
 	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1484
+	ldr	r4, .L1489
 	.loc 5 321 0
 	movs	r5, #0
 	.loc 5 322 0
 	movs	r6, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r1, [r4, #3144]
+	ldr	r1, [r4, #3140]
 	ldr	r0, [r4, #3796]
 	bl	FlashProgPages
-.LVL1271:
-.L1478:
+.LVL1289:
+.L1483:
 	.loc 5 321 0 discriminator 1
-	ldr	r1, [r4, #3144]
+	ldr	r1, [r4, #3140]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1481
+	bhi	.L1486
 	.loc 5 335 0
 	ldr	r0, [r4, #3796]
 	bl	FtlGcBufFree
-.LVL1272:
+.LVL1290:
 	.loc 5 337 0
-	ldrh	r3, [r4, #2380]
+	ldrh	r3, [r4, #2424]
 	.loc 5 336 0
 	movs	r0, #0
-	str	r0, [r4, #3144]
+	str	r0, [r4, #3140]
 	.loc 5 337 0
-	cbnz	r3, .L1477
+	cbnz	r3, .L1482
 	.loc 5 338 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1273:
-	b	.L1483
-.L1481:
+.LVL1291:
+	b	.L1488
+.L1486:
 	.loc 5 322 0
 	muls	r3, r6, r3
 	ldr	r2, [r4, #3796]
@@ -15664,51 +15780,51 @@ Ftl_gc_temp_data_write_back:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r0, r2, #1
-	bne	.L1479
+	bne	.L1484
 	.loc 5 323 0
-	ldrh	r0, [r4, #2376]
+	ldrh	r0, [r4, #2420]
 	movs	r5, #0
-	ldr	r1, [r4, #2260]
+	ldr	r1, [r4, #2300]
 	strh	r5, [r1, r0, lsl #1]	@ movhi
 	.loc 5 324 0
-	strh	r2, [r4, #2376]	@ movhi
+	strh	r2, [r4, #2420]	@ movhi
 	.loc 5 325 0
-	ldr	r2, [r4, #2712]
+	ldr	r2, [r4, #2708]
 	adds	r2, r2, #1
-	str	r2, [r4, #2712]
+	str	r2, [r4, #2708]
 	.loc 5 326 0
 	ldr	r2, [r4, #3796]
 	add	r3, r3, r2
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL1274:
+.LVL1292:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1275:
+.LVL1293:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1276:
-.L1483:
+.LVL1294:
+.L1488:
 	.loc 5 339 0
 	movs	r0, #1
-.L1477:
+.L1482:
 	.loc 5 342 0
 	pop	{r4, r5, r6, pc}
-.L1479:
+.L1484:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1277:
+.LVL1295:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1278:
-	b	.L1478
-.L1485:
+.LVL1296:
+	b	.L1483
+.L1490:
 	.align	2
-.L1484:
+.L1489:
 	.word	.LANCHOR0
 .LFE263:
 	.fnend
@@ -15728,62 +15844,62 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI181:
+.LCFI182:
 	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1489
-	ldrh	r2, [r4, #2376]
+	ldr	r4, .L1494
+	ldrh	r2, [r4, #2420]
 	cmp	r2, r3
-	beq	.L1487
+	beq	.L1492
 	.loc 5 301 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2380]
-	cbnz	r3, .L1488
-.L1487:
+	ldrh	r3, [r4, #2424]
+	cbnz	r3, .L1493
+.L1492:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1279:
+.LVL1297:
 	.loc 5 303 0
 	movs	r0, #0
 	.loc 5 304 0
 	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1280:
+.LVL1298:
 	.loc 5 305 0
-	ldr	r0, .L1489+4
+	ldr	r0, .L1494+4
 	.loc 5 304 0
-	strb	r5, [r4, #2384]
+	strb	r5, [r4, #2428]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1281:
+.LVL1299:
 	.loc 5 306 0
-	strh	r5, [r4, #3172]	@ movhi
+	strh	r5, [r4, #3168]	@ movhi
 	.loc 5 307 0
-	strh	r5, [r4, #3180]	@ movhi
+	strh	r5, [r4, #3176]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1282:
+.LVL1300:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1283:
+.LVL1301:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1284:
-.L1488:
+.LVL1302:
+.L1493:
 	.loc 5 312 0
-	ldr	r0, .L1489+4
+	ldr	r0, .L1494+4
 	.loc 5 313 0
 	pop	{r3, r4, r5, lr}
-.LCFI182:
+.LCFI183:
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1285:
-.L1490:
+.LVL1303:
+.L1495:
 	.align	2
-.L1489:
+.L1494:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2376
+	.word	.LANCHOR0+2420
 .LFE262:
 	.fnend
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -15800,449 +15916,449 @@ rk_ftl_garbage_collect:
 	.loc 5 470 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1286:
+.LVL1304:
 	.loc 5 478 0
-	ldr	r3, .L1610
+	ldr	r3, .L1615
 	.loc 5 470 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI183:
+.LCFI184:
 	mov	r7, r0
 	.pad #36
 	sub	sp, sp, #36
-.LCFI184:
+.LCFI185:
 	mov	r4, r3
 	.loc 5 478 0
 	ldr	r0, [r3, #3780]
-.LVL1287:
+.LVL1305:
 	cmp	r0, #0
-	bne	.L1566
+	bne	.L1571
 	.loc 5 481 0
-	ldrh	r2, [r3, #2268]
+	ldrh	r2, [r3, #2312]
 	cmp	r2, #47
-	bls	.L1491
+	bls	.L1496
 	.loc 5 485 0
-	ldr	r2, .L1610+4
+	ldr	r2, .L1615+4
 	ldrh	r1, [r2, #4]
-.LVL1288:
+.LVL1306:
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1493
-.L1496:
-.LBB496:
-.LBB497:
+	bne	.L1498
+.L1501:
+.LBB520:
+.LBB521:
 	.loc 5 489 0
-	ldrh	r2, [r4, #3184]
+	ldrh	r2, [r4, #3180]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1494
-.L1495:
+	bne	.L1499
+.L1500:
 	.loc 5 496 0
-	ldr	r3, [r4, #3132]
+	ldr	r3, [r4, #3128]
 	.loc 5 497 0
 	movw	r5, #65535
-	ldrh	r1, [r4, #2568]
+	ldrh	r1, [r4, #2564]
 	.loc 5 496 0
 	adds	r3, r3, #1
 	add	r3, r3, r7, lsl #7
 	.loc 5 497 0
 	cmp	r1, r5
 	.loc 5 496 0
-	str	r3, [r4, #3132]
+	str	r3, [r4, #3128]
 	.loc 5 497 0
-	bne	.L1497
-	ldrh	r2, [r4, #2376]
+	bne	.L1502
+	ldrh	r2, [r4, #2420]
 	cmp	r2, r1
-	bne	.L1498
-	ldrh	r8, [r4, #3182]
+	bne	.L1503
+	ldrh	r8, [r4, #3178]
 	cmp	r8, r2
-	bne	.L1499
+	bne	.L1504
 	.loc 5 498 0
-	ldrh	r2, [r4, #2276]
+	ldrh	r2, [r4, #2320]
 	cmp	r2, #24
 	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1499
-.LBB498:
+	bls	.L1504
+.LBB522:
 	.loc 5 502 0
-	ldr	r3, .L1610+8
+	ldr	r3, .L1615+8
 	.loc 5 501 0
 	movs	r6, #0
-	str	r6, [r4, #3132]
+	str	r6, [r4, #3128]
 	.loc 5 502 0
 	strh	r6, [r3, #-228]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1289:
+.LVL1307:
 	.loc 5 504 0
 	cmp	r0, r8
 	.loc 5 503 0
 	mov	r5, r0
 	.loc 5 504 0
-	bne	.L1570
+	bne	.L1575
 	.loc 5 505 0
-	ldrh	r2, [r4, #2276]
-	ldrh	r3, [r4, #3130]
+	ldrh	r2, [r4, #2320]
+	ldrh	r3, [r4, #3126]
 	cmp	r2, r3
-	bcs	.L1502
+	bcs	.L1507
 	.loc 5 506 0
 	movs	r0, #64
 	bl	List_get_gc_head_node
-.LVL1290:
+.LVL1308:
 	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1504
+	beq	.L1509
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1505
+	bhi	.L1510
 	.loc 5 509 0
 	mov	r0, r6
 	bl	List_get_gc_head_node
-.LVL1291:
+.LVL1309:
 	uxth	r6, r0
 	.loc 5 510 0
 	movs	r3, #128
-	strh	r3, [r4, #3130]	@ movhi
+	strh	r3, [r4, #3126]	@ movhi
 	.loc 5 520 0
 	cmp	r6, r5
-	beq	.L1504
-.L1501:
+	beq	.L1509
+.L1506:
 	.loc 5 521 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	mov	r5, r6
-	ldrh	r1, [r4, #3128]
-	ldrh	r2, [r4, #2276]
+	ldrh	r1, [r4, #3124]
+	ldrh	r2, [r4, #2320]
 	ldrh	r3, [r3, r6, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, [r4, #2248]
-	ldr	r0, .L1610+12
+	ldr	r1, [r4, #2304]
+	ldr	r0, .L1615+12
 	ldrh	r1, [r1, r6, lsl #1]
 	str	r1, [sp]
 	mov	r1, r6
 	bl	printk
-.LVL1292:
-	b	.L1504
-.L1493:
-.LBE498:
-.LBE497:
-.LBE496:
+.LVL1310:
+	b	.L1509
+.L1498:
+.LBE522:
+.LBE521:
+.LBE520:
 	.loc 5 485 0 discriminator 1
-	ldrh	r3, [r3, #2376]
+	ldrh	r3, [r3, #2420]
 	cmp	r3, r2
-	beq	.L1496
+	beq	.L1501
 	.loc 5 486 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1293:
+.LVL1311:
 	cmp	r0, #0
-	beq	.L1496
+	beq	.L1501
 	.loc 5 487 0
 	movs	r0, #1
-	b	.L1491
-.L1494:
-.LBB504:
-.LBB501:
+	b	.L1496
+.L1499:
+.LBB528:
+.LBB525:
 	.loc 5 489 0
-	ldrh	r3, [r4, #3182]
+	ldrh	r3, [r4, #3178]
 	cmp	r3, r1
 	.loc 5 490 0
 	itt	eq
-	strheq	r2, [r4, #3182]	@ movhi
+	strheq	r2, [r4, #3178]	@ movhi
 	.loc 5 491 0
-	strheq	r3, [r4, #3184]	@ movhi
-	b	.L1495
-.L1505:
-.LBB499:
+	strheq	r3, [r4, #3180]	@ movhi
+	b	.L1500
+.L1510:
+.LBB523:
 	.loc 5 512 0
 	movs	r3, #64
-.L1603:
+.L1608:
 	.loc 5 516 0
-	strh	r3, [r4, #3130]	@ movhi
-.L1504:
+	strh	r3, [r4, #3126]	@ movhi
+.L1509:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1294:
-.LBE499:
+.LVL1312:
+.LBE523:
 	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1507
+	bne	.L1512
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1507
-.L1564:
+	bne	.L1512
+.L1569:
 	.loc 5 528 0
-	ldrh	r3, [r4, #2276]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #24
-	bhi	.L1571
+	bhi	.L1576
 	.loc 5 530 0
 	cmp	r3, #16
 	ldrh	r6, [r4, #78]
-	bls	.L1509
+	bls	.L1514
 	.loc 5 531 0
 	lsrs	r6, r6, #5
-.LVL1295:
-.L1508:
+.LVL1313:
+.L1513:
 	.loc 5 539 0
-	ldrh	r2, [r4, #3128]
+	ldrh	r2, [r4, #3124]
 	cmp	r2, r3
-	bcs	.L1512
+	bcs	.L1517
 	.loc 5 540 0
-	ldrh	r3, [r4, #2376]
+	ldrh	r3, [r4, #2420]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1513
-	ldrh	r2, [r4, #3182]
+	bne	.L1518
+	ldrh	r2, [r4, #3178]
 	cmp	r2, r3
-	bne	.L1513
+	bne	.L1518
 	.loc 5 542 0
-	ldr	r3, .L1610+8
+	ldr	r3, .L1615+8
 	ldrh	r0, [r3, #-228]
-	cbnz	r0, .L1514
-	ldr	r3, [r4, #2436]
-	ldr	r2, [r4, #2432]
+	cbnz	r0, .L1519
+	ldr	r3, [r4, #2480]
+	ldr	r2, [r4, #2476]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1515
-.L1514:
+	bcs	.L1520
+.L1519:
 	.loc 5 543 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1604:
+.L1609:
 	.loc 5 545 0
-	strh	r3, [r4, #3128]	@ movhi
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 5 546 0
 	movs	r3, #0
-	str	r3, [r4, #3140]
-.LVL1296:
-.L1491:
-.LBE501:
-.LBE504:
-	.loc 5 758 0
+	str	r3, [r4, #3136]
+.LVL1314:
+.L1496:
+.LBE525:
+.LBE528:
+	.loc 5 754 0
 	add	sp, sp, #36
-.LCFI185:
+.LCFI186:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1297:
-.L1502:
-.LCFI186:
-.LBB505:
-.LBB502:
-.LBB500:
+.LVL1315:
+.L1507:
+.LCFI187:
+.LBB529:
+.LBB526:
+.LBB524:
 	.loc 5 516 0
 	movs	r3, #80
-	b	.L1603
-.L1570:
+	b	.L1608
+.L1575:
 	.loc 5 504 0
 	mov	r6, r0
-	b	.L1501
-.L1509:
-.LBE500:
+	b	.L1506
+.L1514:
+.LBE524:
 	.loc 5 532 0
 	cmp	r3, #12
-	bls	.L1510
+	bls	.L1515
 	.loc 5 533 0
 	lsrs	r6, r6, #4
-.LVL1298:
-	b	.L1508
-.LVL1299:
-.L1510:
+.LVL1316:
+	b	.L1513
+.LVL1317:
+.L1515:
 	.loc 5 534 0
 	cmp	r3, #8
-	bls	.L1508
+	bls	.L1513
 	.loc 5 535 0
 	lsrs	r6, r6, #2
-.LVL1300:
-	b	.L1508
-.LVL1301:
-.L1571:
+.LVL1318:
+	b	.L1513
+.LVL1319:
+.L1576:
 	.loc 5 529 0
 	movs	r6, #1
-.LVL1302:
-	b	.L1508
-.L1515:
+.LVL1320:
+	b	.L1513
+.L1520:
 	.loc 5 545 0
 	movs	r3, #18
-	b	.L1604
-.L1513:
+	b	.L1609
+.L1518:
 	.loc 5 549 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r4, #3128]	@ movhi
-.L1512:
+	strh	r3, [r4, #3124]	@ movhi
+.L1517:
 	.loc 5 551 0
-	ldrh	r3, [r4, #3186]
-	cbz	r3, .L1572
+	ldrh	r3, [r4, #3182]
+	cbz	r3, .L1577
 	.loc 5 552 0
 	adds	r6, r6, #32
-.LVL1303:
+.LVL1321:
 	uxth	r6, r6
-.LVL1304:
-.L1572:
+.LVL1322:
+.L1577:
 	.loc 5 551 0
 	movw	r5, #65535
-.L1518:
-	.loc 5 597 0
-	ldrh	r3, [r4, #2568]
+.L1523:
+	.loc 5 595 0
+	ldrh	r3, [r4, #2564]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1527
-	.loc 5 598 0
+	bne	.L1532
+	.loc 5 596 0
 	cmp	r5, r3
-	beq	.L1528
-	.loc 5 599 0
-	strh	r5, [r4, #2568]	@ movhi
-.L1529:
-	.loc 5 611 0
-	ldrh	r0, [r4, #2568]
+	beq	.L1533
+	.loc 5 597 0
+	strh	r5, [r4, #2564]	@ movhi
+.L1534:
+	.loc 5 607 0
+	ldrh	r0, [r4, #2564]
 	movw	r7, #65535
-.LVL1305:
-	.loc 5 610 0
+.LVL1323:
+	.loc 5 606 0
 	movs	r3, #0
-	strb	r3, [r4, #2576]
-	.loc 5 611 0
+	strb	r3, [r4, #2572]
+	.loc 5 607 0
 	cmp	r0, r7
-	beq	.L1527
-	.loc 5 612 0
+	beq	.L1532
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1306:
-	cbz	r0, .L1532
-	.loc 5 613 0
-	strh	r7, [r4, #2568]	@ movhi
-.L1532:
-	.loc 5 615 0
-	ldrh	r2, [r4, #2568]
+.LVL1324:
+	cbz	r0, .L1537
+	.loc 5 609 0
+	strh	r7, [r4, #2564]	@ movhi
+.L1537:
+	.loc 5 611 0
+	ldrh	r2, [r4, #2564]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1527
-	.loc 5 616 0
-	ldr	r0, .L1610+16
+	beq	.L1532
+	.loc 5 612 0
+	ldr	r0, .L1615+16
 	bl	make_superblock
-.LVL1307:
-	.loc 5 619 0
-	ldr	r2, .L1610+8
-	.loc 5 617 0
+.LVL1325:
+	.loc 5 615 0
+	ldr	r2, .L1615+8
+	.loc 5 613 0
 	movs	r3, #0
-	strh	r3, [r4, #2570]	@ movhi
-	.loc 5 618 0
-	strb	r3, [r4, #2574]
-	.loc 5 619 0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 5 614 0
+	strb	r3, [r4, #2570]
+	.loc 5 615 0
 	strh	r3, [r2, #-226]	@ movhi
-	.loc 5 620 0
-	ldrh	r1, [r4, #2568]
-	ldr	r3, [r4, #2260]
+	.loc 5 616 0
+	ldrh	r1, [r4, #2564]
+	ldr	r3, [r4, #2300]
 	ldrh	r3, [r3, r1, lsl #1]
 	strh	r3, [r2, #-224]	@ movhi
-.LVL1308:
-.L1527:
-	.loc 5 625 0
-	ldrh	r3, [r4, #2568]
-	ldrh	r2, [r4, #2280]
+.LVL1326:
+.L1532:
+	.loc 5 621 0
+	ldrh	r3, [r4, #2564]
+	ldrh	r2, [r4, #2324]
 	cmp	r2, r3
-	beq	.L1533
-	ldrh	r2, [r4, #2328]
+	beq	.L1538
+	ldrh	r2, [r4, #2372]
 	cmp	r2, r3
-	beq	.L1533
-	.loc 5 666 0
-	ldr	r7, .L1610+8
-.LVL1309:
-.L1534:
-	.loc 5 631 0
-	ldrh	r9, [r4, #2568]
+	beq	.L1538
+	.loc 5 662 0
+	ldr	r7, .L1615+8
+.LVL1327:
+.L1539:
+	.loc 5 627 0
+	ldrh	r9, [r4, #2564]
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1535
-	.loc 5 632 0
+	bne	.L1540
+	.loc 5 628 0
 	movs	r3, #0
-	.loc 5 647 0
+	.loc 5 643 0
 	mov	r10, r3
-.LVL1310:
-	.loc 5 632 0
-	str	r3, [r4, #3140]
-.L1536:
-	.loc 5 635 0
-	ldrh	r8, [r4, #3136]
-.LVL1311:
+.LVL1328:
+	.loc 5 628 0
+	str	r3, [r4, #3136]
+.L1541:
+	.loc 5 631 0
+	ldrh	r8, [r4, #3132]
+.LVL1329:
 	mov	r0, r8
 	bl	List_get_gc_head_node
-.LVL1312:
+.LVL1330:
 	uxth	fp, r0
-	.loc 5 636 0
+	.loc 5 632 0
 	cmp	fp, r9
-	.loc 5 635 0
-	strh	fp, [r4, #2568]	@ movhi
-	.loc 5 636 0
-	bne	.L1537
-	.loc 5 637 0
+	.loc 5 631 0
+	strh	fp, [r4, #2564]	@ movhi
+	.loc 5 632 0
+	bne	.L1542
+	.loc 5 633 0
 	movs	r3, #0
-	.loc 5 638 0
+	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 637 0
-	strh	r3, [r4, #3136]	@ movhi
-	b	.L1491
-.LVL1313:
-.L1519:
+	.loc 5 633 0
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1496
+.LVL1331:
+.L1524:
 	.loc 5 558 0
 	movs	r3, #0
 	.loc 5 560 0
-	ldrh	r7, [r4, #2276]
-.LVL1314:
+	ldrh	r7, [r4, #2320]
+.LVL1332:
 	.loc 5 558 0
-	str	r3, [r4, #3140]
+	str	r3, [r4, #3136]
 	.loc 5 560 0
-	ldrh	r3, [r4, #3128]
-	ldr	r5, .L1610+8
+	ldrh	r3, [r4, #3124]
+	ldr	r5, .L1615+8
 	cmp	r3, r7
-	bcs	.L1520
+	bcs	.L1525
 	.loc 5 561 0
 	ldrh	r3, [r5, #-228]
-	cbnz	r3, .L1521
-	ldr	r3, [r4, #2436]
-	ldr	r2, [r4, #2432]
+	cbnz	r3, .L1526
+	ldr	r3, [r4, #2480]
+	ldr	r2, [r4, #2476]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1522
-.L1521:
+	bcs	.L1527
+.L1526:
 	.loc 5 562 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r4, #2548]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1605:
+.L1610:
 	.loc 5 564 0
-	strh	r3, [r4, #3128]	@ movhi
-.L1607:
+	strh	r3, [r4, #3124]	@ movhi
+.L1612:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1315:
+.LVL1333:
 	.loc 5 579 0
 	ldrh	r0, [r5, #-228]
-	b	.L1491
-.L1522:
+	b	.L1496
+.L1527:
 	.loc 5 564 0
 	movs	r3, #18
-	b	.L1605
-.L1520:
+	b	.L1610
+.L1525:
 	.loc 5 572 0
 	ldrh	r0, [r5, #-228]
 	cmp	r0, #0
-	bne	.L1524
+	bne	.L1529
 	.loc 5 573 0
-	ldrh	r6, [r4, #2552]
+	ldrh	r6, [r4, #2548]
 	add	r3, r6, r6, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r4, #3128]	@ movhi
+	strh	r3, [r4, #3124]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1316:
+.LVL1334:
 	.loc 5 575 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	uxth	r0, r0
 	ldrh	r1, [r4, #80]
 	ldrh	r2, [r3, r0, lsl #1]
@@ -16250,551 +16366,551 @@ rk_ftl_garbage_collect:
 	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1525
+	ble	.L1530
 	.loc 5 576 0
 	subs	r6, r6, #1
 	.loc 5 575 0
 	cmp	r7, r6
-	bge	.L1607
-.L1525:
+	bge	.L1612
+.L1530:
 	.loc 5 584 0
 	cmp	r2, #0
-	bne	.L1524
+	bne	.L1529
 	.loc 5 585 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1317:
+.LVL1335:
 	.loc 5 586 0
-	ldrh	r0, [r4, #2276]
+	ldrh	r0, [r4, #2320]
 	adds	r0, r0, #1
-	b	.L1491
-.LVL1318:
-.L1528:
-	.loc 5 600 0
-	ldrh	r3, [r4, #3182]
+	b	.L1496
+.LVL1336:
+.L1533:
+	.loc 5 598 0
+	ldrh	r3, [r4, #3178]
 	cmp	r3, r5
-	beq	.L1529
-	.loc 5 604 0
-	ldr	r2, [r4, #2260]
+	beq	.L1534
+	.loc 5 600 0
+	ldr	r2, [r4, #2300]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1530
-	.loc 5 605 0
-	strh	r5, [r4, #3182]	@ movhi
-.L1530:
-	.loc 5 606 0
-	ldrh	r3, [r4, #3182]
-	strh	r3, [r4, #2568]	@ movhi
-	.loc 5 607 0
+	cbnz	r3, .L1535
+	.loc 5 601 0
+	strh	r5, [r4, #3178]	@ movhi
+.L1535:
+	.loc 5 602 0
+	ldrh	r3, [r4, #3178]
+	strh	r3, [r4, #2564]	@ movhi
+	.loc 5 603 0
 	movw	r3, #65535
-	strh	r3, [r4, #3182]	@ movhi
-	b	.L1529
-.L1611:
+	strh	r3, [r4, #3178]	@ movhi
+	b	.L1534
+.L1616:
 	.align	2
-.L1610:
+.L1615:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LC100
-	.word	.LANCHOR0+2568
-.L1533:
-	.loc 5 626 0
+	.word	.LC103
+	.word	.LANCHOR0+2564
+.L1538:
+	.loc 5 622 0
 	movw	r3, #65535
-	strh	r3, [r4, #2568]	@ movhi
-.LVL1319:
-.L1608:
-	.loc 5 652 0
-	ldr	r3, .L1612
+	strh	r3, [r4, #2564]	@ movhi
+.LVL1337:
+.L1613:
+	.loc 5 648 0
+	ldr	r3, .L1617
 	ldrh	r0, [r3, #-228]
-	b	.L1491
-.LVL1320:
-.L1537:
+	b	.L1496
+.LVL1338:
+.L1542:
 	str	r0, [sp, #8]
-	.loc 5 640 0
+	.loc 5 636 0
 	mov	r0, fp
 	bl	IsBlkInGcList
-.LVL1321:
+.LVL1339:
 	add	r8, r8, #1
 	ldr	r3, [sp, #8]
-	cbz	r0, .L1538
+	cbz	r0, .L1543
+	.loc 5 637 0
+	strh	r8, [r4, #3132]	@ movhi
+	b	.L1541
+.L1543:
 	.loc 5 641 0
-	strh	r8, [r4, #3136]	@ movhi
-	b	.L1536
-.L1538:
-	.loc 5 645 0
 	uxth	r0, r3
 	ldrh	ip, [r4, #8]
 	ldrh	r3, [r4, #78]
-	.loc 5 644 0
+	.loc 5 640 0
 	uxth	r8, r8
-	.loc 5 645 0
-	ldr	r2, [r4, #2260]
-	.loc 5 644 0
-	strh	r8, [r4, #3136]	@ movhi
-	.loc 5 645 0
+	.loc 5 641 0
+	ldr	r2, [r4, #2300]
+	.loc 5 640 0
+	strh	r8, [r4, #3132]	@ movhi
+	.loc 5 641 0
 	mul	r3, ip, r3
 	ldrh	r1, [r2, r0, lsl #1]
 	add	ip, r3, r3, lsr #31
 	cmp	r1, ip, asr #1
-	bgt	.L1540
-	.loc 5 646 0
+	bgt	.L1545
+	.loc 5 642 0
 	cmp	r8, #48
-	bls	.L1541
+	bls	.L1546
 	cmp	r1, #8
-	bls	.L1541
-	ldrh	r1, [r4, #3172]
+	bls	.L1546
+	ldrh	r1, [r4, #3168]
 	cmp	r1, #35
-	bhi	.L1541
-.L1540:
-	.loc 5 647 0
-	strh	r10, [r4, #3136]	@ movhi
-.L1541:
-	.loc 5 649 0
+	bhi	.L1546
+.L1545:
+	.loc 5 643 0
+	strh	r10, [r4, #3132]	@ movhi
+.L1546:
+	.loc 5 645 0
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r3, r2
-	bgt	.L1542
+	bgt	.L1547
 	cmp	r5, r9
-	bne	.L1542
-	.loc 5 651 0
+	bne	.L1547
+	.loc 5 647 0
 	movs	r3, #0
-	.loc 5 650 0
-	strh	r5, [r4, #2568]	@ movhi
+	.loc 5 646 0
+	strh	r5, [r4, #2564]	@ movhi
+	.loc 5 647 0
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1613
+.L1547:
 	.loc 5 651 0
-	strh	r3, [r4, #3136]	@ movhi
-	b	.L1608
-.L1542:
-	.loc 5 655 0
-	cbnz	r2, .L1543
-	.loc 5 656 0
+	cbnz	r2, .L1548
+	.loc 5 652 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1322:
-	.loc 5 657 0
-	ldrh	r3, [r4, #3136]
+.LVL1340:
+	.loc 5 653 0
+	ldrh	r3, [r4, #3132]
 	adds	r3, r3, #1
-	strh	r3, [r4, #3136]	@ movhi
-	b	.L1536
-.L1543:
-	.loc 5 660 0
+	strh	r3, [r4, #3132]	@ movhi
+	b	.L1541
+.L1548:
+	.loc 5 656 0
 	movs	r3, #0
-	strb	r3, [r4, #2576]
-	.loc 5 662 0
-	ldrh	r3, [r4, #2280]
+	strb	r3, [r4, #2572]
+	.loc 5 658 0
+	ldrh	r3, [r4, #2324]
 	cmp	r3, fp
-	bne	.L1544
-	movw	r2, #662
-	ldr	r1, .L1612+4
-	ldr	r0, .L1612+8
+	bne	.L1549
+	movw	r2, #658
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1323:
-.L1544:
-	.loc 5 663 0
-	ldrh	r2, [r4, #2568]
-	ldrh	r3, [r4, #2328]
+.LVL1341:
+.L1549:
+	.loc 5 659 0
+	ldrh	r2, [r4, #2564]
+	ldrh	r3, [r4, #2372]
 	cmp	r2, r3
-	bne	.L1545
-	movw	r2, #663
-	ldr	r1, .L1612+4
-	ldr	r0, .L1612+8
+	bne	.L1550
+	movw	r2, #659
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1324:
-.L1545:
-	.loc 5 664 0
-	ldrh	r2, [r4, #2568]
-	ldrh	r3, [r4, #2376]
+.LVL1342:
+.L1550:
+	.loc 5 660 0
+	ldrh	r2, [r4, #2564]
+	ldrh	r3, [r4, #2420]
 	cmp	r2, r3
-	bne	.L1546
-	mov	r2, #664
-	ldr	r1, .L1612+4
-	ldr	r0, .L1612+8
+	bne	.L1551
+	mov	r2, #660
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	bl	printk
-.LVL1325:
-.L1546:
-	.loc 5 665 0
-	ldr	r0, .L1612+12
+.LVL1343:
+.L1551:
+	.loc 5 661 0
+	ldr	r0, .L1617+12
 	bl	make_superblock
-.LVL1326:
-	.loc 5 667 0
-	ldrh	r1, [r4, #2568]
-	.loc 5 666 0
+.LVL1344:
+	.loc 5 663 0
+	ldrh	r1, [r4, #2564]
+	.loc 5 662 0
 	movs	r3, #0
-	.loc 5 667 0
-	ldr	r2, [r4, #2260]
-	.loc 5 666 0
+	.loc 5 663 0
+	ldr	r2, [r4, #2300]
+	.loc 5 662 0
 	strh	r3, [r7, #-226]	@ movhi
-	.loc 5 667 0
+	.loc 5 663 0
 	ldrh	r2, [r2, r1, lsl #1]
-	.loc 5 668 0
-	strh	r3, [r4, #2570]	@ movhi
-	.loc 5 669 0
-	strb	r3, [r4, #2574]
-	.loc 5 667 0
+	.loc 5 664 0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 5 665 0
+	strb	r3, [r4, #2570]
+	.loc 5 663 0
 	strh	r2, [r7, #-224]	@ movhi
-.LVL1327:
-.L1535:
-	.loc 5 675 0
+.LVL1345:
+.L1540:
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1328:
-	.loc 5 678 0
+.LVL1346:
+	.loc 5 674 0
 	movs	r3, #1
 	str	r3, [r4, #3780]
-	.loc 5 679 0
+	.loc 5 675 0
 	ldrh	r3, [r4, #78]
-.LVL1329:
+.LVL1347:
 	str	r3, [sp, #12]
-	.loc 5 680 0
-	ldrh	r3, [r4, #2570]
-.LVL1330:
+	.loc 5 676 0
+	ldrh	r3, [r4, #2566]
+.LVL1348:
 	ldr	r1, [sp, #12]
-.LVL1331:
+.LVL1349:
 	adds	r2, r3, r6
 	cmp	r2, r1
-	.loc 5 681 0
+	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r6, r2, r3
-.LVL1332:
-	.loc 5 693 0
+.LVL1350:
+	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 681 0
+	.loc 5 677 0
 	it	gt
 	uxthgt	r6, r6
-.LVL1333:
-.L1606:
+.LVL1351:
+.L1611:
 	str	r3, [sp, #8]
-	.loc 5 683 0
+	.loc 5 679 0
 	ldrh	r3, [sp, #8]
 	cmp	r6, r3
-	bls	.L1556
-	.loc 5 688 0
+	bls	.L1561
+	.loc 5 684 0
 	ldr	r3, [sp, #8]
-	.loc 5 687 0
+	.loc 5 683 0
 	movw	r10, #65535
-.LVL1334:
-	.loc 5 688 0
-	ldrh	r1, [r4, #2570]
+.LVL1352:
+	.loc 5 684 0
+	ldrh	r1, [r4, #2566]
 	mov	fp, #20
-	.loc 5 685 0
+	.loc 5 681 0
 	ldrh	lr, [r4, #8]
-	.loc 5 688 0
-	ldr	r0, [r4, #3160]
+	.loc 5 684 0
+	ldr	r0, [r4, #3156]
 	add	r1, r1, r3
 	movs	r3, #0
-	ldr	ip, .L1612+16
+	ldr	ip, .L1617+16
 	mov	r8, r3
-	b	.L1557
-.LVL1335:
-.L1550:
-	.loc 5 686 0
+	b	.L1562
+.LVL1353:
+.L1555:
+	.loc 5 682 0
 	ldrh	r2, [ip, #2]!
-.LVL1336:
-	.loc 5 687 0
+.LVL1354:
+	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1549
-	.loc 5 688 0
+	beq	.L1554
+	.loc 5 684 0
 	mla	r9, fp, r8, r0
-	.loc 5 689 0
+	.loc 5 685 0
 	add	r8, r8, #1
-.LVL1337:
-	.loc 5 688 0
+.LVL1355:
+	.loc 5 684 0
 	orr	r2, r1, r2, lsl #10
-.LVL1338:
-	.loc 5 689 0
+.LVL1356:
+	.loc 5 685 0
 	uxth	r8, r8
-.LVL1339:
-	.loc 5 688 0
+.LVL1357:
+	.loc 5 684 0
 	str	r2, [r9, #4]
-.LVL1340:
-.L1549:
+.LVL1358:
+.L1554:
 	adds	r3, r3, #1
-.LVL1341:
-.L1557:
-	.loc 5 685 0
+.LVL1359:
+.L1562:
+	.loc 5 681 0
 	uxth	r2, r3
-.LVL1342:
+.LVL1360:
 	cmp	lr, r2
-	bhi	.L1550
-	.loc 5 693 0
+	bhi	.L1555
+	.loc 5 689 0
 	mov	fp, #0
-	ldrb	r2, [r4, #2576]	@ zero_extendqisi2
+	ldrb	r2, [r4, #2572]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.LVL1343:
-.L1551:
-	.loc 5 695 0
+.LVL1361:
+.L1556:
+	.loc 5 691 0
 	uxth	r3, fp
 	cmp	r8, r3
-	bhi	.L1555
+	bhi	.L1560
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1606
-.L1555:
+	b	.L1611
+.L1560:
 	mov	r9, #20
-	.loc 5 696 0
-	ldr	r3, [r4, #3160]
+	.loc 5 692 0
+	ldr	r3, [r4, #3156]
 	mul	r9, r9, fp
 	add	r2, r3, r9
-	.loc 5 697 0
+	.loc 5 693 0
 	ldr	r3, [r3, r9]
 	adds	r3, r3, #1
-	beq	.L1552
-	.loc 5 696 0
+	beq	.L1557
+	.loc 5 692 0
 	ldr	r10, [r2, #12]
-	.loc 5 697 0
+	.loc 5 693 0
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1552
-	.loc 5 699 0
+	bne	.L1557
+	.loc 5 695 0
 	ldr	r3, [r10, #8]
-.LVL1344:
-	.loc 5 700 0
+.LVL1362:
+	.loc 5 696 0
 	adds	r2, r3, #1
-	bne	.L1553
-	mov	r2, #700
-	ldr	r1, .L1612+4
-	ldr	r0, .L1612+8
+	bne	.L1558
+	mov	r2, #696
+	ldr	r1, .L1617+4
+	ldr	r0, .L1617+8
 	str	r3, [sp, #16]
 	bl	printk
-.LVL1345:
+.LVL1363:
 	ldr	r3, [sp, #16]
-.LVL1346:
-.L1553:
-	.loc 5 701 0
+.LVL1364:
+.L1558:
+	.loc 5 697 0
 	movs	r2, #0
 	mov	r0, r3
 	add	r1, sp, #28
 	bl	log2phys
-.LVL1347:
-	.loc 5 702 0
-	ldr	r0, [r4, #3160]
+.LVL1365:
+	.loc 5 698 0
+	ldr	r0, [r4, #3156]
 	ldr	r3, [sp, #28]
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1552
-	.loc 5 704 0
+	bne	.L1557
+	.loc 5 700 0
 	ldrh	r3, [r7, #-226]
-	.loc 5 705 0
+	.loc 5 701 0
 	movs	r2, #20
-	ldr	r1, [r4, #3144]
+	ldr	r1, [r4, #3140]
 	str	r2, [sp, #20]
-	.loc 5 704 0
+	.loc 5 700 0
 	adds	r3, r3, #1
 	strh	r3, [r7, #-226]	@ movhi
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	r3, [r4, #3796]
 	mla	r3, r2, r1, r3
 	ldr	r1, [r0, #16]
 	str	r1, [r3, #16]
 	str	r3, [sp, #16]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1348:
+.LVL1366:
 	ldr	r3, [sp, #16]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r1, [r4, #3796]
 	ldr	r2, [sp, #20]
-	.loc 5 706 0
+	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 707 0
-	ldr	r3, [r4, #3144]
+	.loc 5 703 0
+	ldr	r3, [r4, #3140]
 	mla	r3, r2, r3, r1
-	ldr	r2, [r4, #3160]
+	ldr	r2, [r4, #3156]
 	add	r2, r2, r9
 	ldr	r1, [r2, #8]
 	str	r1, [r3, #8]
-	.loc 5 716 0
+	.loc 5 712 0
 	movs	r1, #1
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	r2, [r2, #12]
 	str	r2, [r3, #12]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	r3, [sp, #28]
-.LVL1349:
+.LVL1367:
 	str	r3, [r10, #12]
-	.loc 5 710 0
-	ldrh	r3, [r4, #2376]
-.LVL1350:
+	.loc 5 706 0
+	ldrh	r3, [r4, #2420]
+.LVL1368:
 	strh	r3, [r10, #2]	@ movhi
-	.loc 5 713 0
-	ldr	r3, [r4, #2476]
-	.loc 5 716 0
-	ldr	r0, [r4, #3160]
-	.loc 5 713 0
+	.loc 5 709 0
+	ldr	r3, [r4, #2520]
+	.loc 5 712 0
+	ldr	r0, [r4, #3156]
+	.loc 5 709 0
 	str	r3, [r10, #4]
-	.loc 5 715 0
-	ldr	r3, [r4, #3144]
-	.loc 5 716 0
+	.loc 5 711 0
+	ldr	r3, [r4, #3140]
+	.loc 5 712 0
 	add	r0, r0, r9
-	.loc 5 715 0
+	.loc 5 711 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3144]
-	.loc 5 716 0
+	str	r3, [r4, #3140]
+	.loc 5 712 0
 	bl	FtlGcBufAlloc
-.LVL1351:
-	.loc 5 717 0
-	ldrb	r2, [r4, #2383]	@ zero_extendqisi2
-	ldr	r3, [r4, #3144]
+.LVL1369:
+	.loc 5 713 0
+	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
+	ldr	r3, [r4, #3140]
 	cmp	r2, r3
-	beq	.L1554
-	ldrh	r3, [r4, #2380]
-	cbnz	r3, .L1552
-.L1554:
-	.loc 5 718 0
+	beq	.L1559
+	ldrh	r3, [r4, #2424]
+	cbnz	r3, .L1557
+.L1559:
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1352:
-	cbz	r0, .L1552
-.L1609:
-	.loc 5 733 0
+.LVL1370:
+	cbz	r0, .L1557
+.L1614:
+	.loc 5 729 0
 	movs	r3, #0
-	.loc 5 734 0
+	.loc 5 730 0
 	ldrh	r0, [r7, #-228]
-	.loc 5 733 0
+	.loc 5 729 0
 	str	r3, [r4, #3780]
-	b	.L1491
-.L1552:
+	b	.L1496
+.L1557:
 	add	fp, fp, #1
-	b	.L1551
-.LVL1353:
-.L1556:
-	.loc 5 727 0
-	ldrh	r3, [r4, #2570]
+	b	.L1556
+.LVL1371:
+.L1561:
+	.loc 5 723 0
+	ldrh	r3, [r4, #2566]
 	add	r6, r6, r3
-.LVL1354:
-	.loc 5 729 0
+.LVL1372:
+	.loc 5 725 0
 	ldr	r3, [sp, #12]
-.LVL1355:
-	.loc 5 727 0
+.LVL1373:
+	.loc 5 723 0
 	uxth	r6, r6
-	.loc 5 729 0
+	.loc 5 725 0
 	cmp	r3, r6
-	.loc 5 727 0
-	strh	r6, [r4, #2570]	@ movhi
-	.loc 5 729 0
-	bls	.L1558
+	.loc 5 723 0
+	strh	r6, [r4, #2566]	@ movhi
+	.loc 5 725 0
+	bls	.L1563
 	ldrh	r2, [r7, #-226]
 	ldrh	r3, [r7, #-224]
-.LVL1356:
+.LVL1374:
 	cmp	r2, r3
-	bne	.L1559
-.LVL1357:
-.L1558:
-	.loc 5 731 0
-	ldr	r3, [r4, #3144]
-.LVL1358:
-	cbz	r3, .L1560
-	.loc 5 732 0
+	bne	.L1564
+.LVL1375:
+.L1563:
+	.loc 5 727 0
+	ldr	r3, [r4, #3140]
+.LVL1376:
+	cbz	r3, .L1565
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1359:
+.LVL1377:
 	cmp	r0, #0
-	bne	.L1609
-.L1560:
-	.loc 5 737 0
+	bne	.L1614
+.L1565:
+	.loc 5 733 0
 	ldrh	r1, [r7, #-226]
-	cbnz	r1, .L1561
-	ldrh	r2, [r4, #2568]
-	ldr	r3, [r4, #2260]
+	cbnz	r1, .L1566
+	ldrh	r2, [r4, #2564]
+	ldr	r3, [r4, #2300]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1561
-	.loc 5 739 0
+	cbz	r0, .L1566
+	.loc 5 735 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 740 0
-	ldrh	r0, [r4, #2568]
+	.loc 5 736 0
+	ldrh	r0, [r4, #2564]
 	bl	update_vpc_list
-.LVL1360:
-	.loc 5 741 0
+.LVL1378:
+	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1361:
-	.loc 5 742 0
+.LVL1379:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1362:
-	.loc 5 743 0
+.LVL1380:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1363:
-.L1561:
-	.loc 5 745 0
+.LVL1381:
+.L1566:
+	.loc 5 741 0
 	movw	r3, #65535
-	strh	r3, [r4, #2568]	@ movhi
-.L1559:
-	.loc 5 747 0
-	ldrh	r3, [r4, #2276]
+	strh	r3, [r4, #2564]	@ movhi
+.L1564:
+	.loc 5 743 0
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #2
-	bhi	.L1562
-	.loc 5 749 0
+	bhi	.L1567
+	.loc 5 745 0
 	ldrh	r6, [r4, #78]
-.LVL1364:
-	b	.L1534
-.LVL1365:
-.L1562:
-	.loc 5 754 0
+.LVL1382:
+	b	.L1539
+.LVL1383:
+.L1567:
+	.loc 5 750 0
 	ldrh	r0, [r7, #-228]
-	.loc 5 752 0
+	.loc 5 748 0
 	movs	r2, #0
 	str	r2, [r4, #3780]
-	.loc 5 754 0
+	.loc 5 750 0
 	cmp	r0, #0
-	bne	.L1491
-	.loc 5 757 0
+	bne	.L1496
+	.loc 5 753 0
 	adds	r0, r3, #1
-	b	.L1491
-.LVL1366:
-.L1566:
-.LBE502:
-.LBE505:
+	b	.L1496
+.LVL1384:
+.L1571:
+.LBE526:
+.LBE529:
 	.loc 5 479 0
 	movs	r0, #0
-	b	.L1491
-.L1613:
+	b	.L1496
+.L1618:
 	.align	2
-.L1612:
+.L1617:
 	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
-	.word	.LANCHOR0+2568
-	.word	.LANCHOR0+2582
-.LVL1367:
-.L1497:
-.LBB506:
-.LBB503:
+	.word	.LANCHOR0+2564
+	.word	.LANCHOR0+2578
+.LVL1385:
+.L1502:
+.LBB530:
+.LBB527:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1564
-.L1507:
+	beq	.L1569
+.L1512:
 	.loc 5 557 0
-	ldrh	r2, [r4, #2376]
+	ldrh	r2, [r4, #2420]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1575
-.L1565:
-	ldrh	r3, [r4, #3182]
+	bne	.L1580
+.L1570:
+	ldrh	r3, [r4, #3178]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1575
+	bne	.L1580
 	cmp	r5, r3
-	bne	.L1575
-	ldrh	r3, [r4, #2568]
+	bne	.L1580
+	ldrh	r3, [r4, #2564]
 	cmp	r3, r5
-	beq	.L1519
-.L1524:
+	beq	.L1524
+.L1529:
 	.loc 5 556 0
 	movw	r5, #65535
-.L1575:
+.L1580:
 	movs	r6, #1
-.LVL1368:
-	b	.L1518
-.LVL1369:
-.L1499:
+.LVL1386:
+	b	.L1523
+.LVL1387:
+.L1504:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1564
+	beq	.L1569
 	movw	r5, #65535
-	b	.L1565
-.L1498:
+	b	.L1570
+.L1503:
 	cmp	r7, #0
-	bne	.L1524
-	b	.L1564
-.LBE503:
-.LBE506:
+	bne	.L1529
+	b	.L1569
+.LBE527:
+.LBE530:
 .LFE269:
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -16808,15 +16924,15 @@ rk_ftl_garbage_collect:
 sftl_gc:
 	.fnstart
 .LFB270:
-	.loc 5 761 0
+	.loc 5 757 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 762 0
+	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1370:
+.LVL1388:
 .LFE270:
 	.fnend
 	.size	sftl_gc, .-sftl_gc
@@ -16830,424 +16946,424 @@ sftl_gc:
 FtlRead:
 	.fnstart
 .LFB164:
-	.loc 3 813 0
+	.loc 3 814 0
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1371:
-	.loc 3 823 0
+.LVL1389:
+	.loc 3 824 0
 	cmp	r0, #16
-	.loc 3 813 0
+	.loc 3 814 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI187:
+.LCFI188:
 	.pad #60
 	sub	sp, sp, #60
-.LCFI188:
-	.loc 3 813 0
+.LCFI189:
+	.loc 3 814 0
 	mov	r7, r1
 	mov	r10, r3
 	str	r2, [sp, #28]
-	.loc 3 823 0
-	bne	.L1616
 	.loc 3 824 0
+	bne	.L1621
+	.loc 3 825 0
 	mov	r2, r3
-.LVL1372:
+.LVL1390:
 	ldr	r1, [sp, #28]
 	add	r0, r7, #256
-.LVL1373:
+.LVL1391:
 	bl	FtlVendorPartRead
-.LVL1374:
+.LVL1392:
 	mov	r8, r0
-.LVL1375:
-.L1615:
-	.loc 3 900 0
+.LVL1393:
+.L1620:
+	.loc 3 901 0
 	mov	r0, r8
-.LVL1376:
+.LVL1394:
 	add	sp, sp, #60
-.LCFI189:
+.LCFI190:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1377:
-.L1616:
-.LCFI190:
-	.loc 3 829 0
+.LVL1395:
+.L1621:
+.LCFI191:
+	.loc 3 830 0
 	ldr	r3, [sp, #28]
-.LVL1378:
-	ldr	r4, .L1647
+.LVL1396:
+	ldr	r4, .L1652
 	adds	r3, r1, r3
-.LVL1379:
+.LVL1397:
 	str	r3, [sp, #8]
 	ldr	r2, [sp, #8]
 	ldr	r3, [r4, #116]
 	cmp	r2, r3
-	bhi	.L1636
-	.loc 3 829 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1647+4
+	bhi	.L1641
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1652+4
 	ldr	r3, [r3]
 	adds	r5, r3, #1
-	beq	.L1637
-	.loc 3 832 0 is_stmt 1
+	beq	.L1642
+	.loc 3 833 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1380:
-	.loc 3 834 0
+.LVL1398:
+	.loc 3 835 0
 	ldrh	r5, [r4, #34]
 	mov	r0, r7
-	.loc 3 827 0
+	.loc 3 828 0
 	mov	r9, #0
-.LVL1381:
-	.loc 3 839 0
+.LVL1399:
+	.loc 3 840 0
 	mov	r6, r9
-.LVL1382:
-	.loc 3 814 0
+.LVL1400:
+	.loc 3 815 0
 	mov	r8, r9
-	.loc 3 834 0
+	.loc 3 835 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL1383:
-	.loc 3 835 0
+.LVL1401:
+	.loc 3 836 0
 	ldr	r3, [sp, #8]
 	mov	r1, r5
-	.loc 3 834 0
-	str	r0, [sp, #12]
 	.loc 3 835 0
+	str	r0, [sp, #12]
+	.loc 3 836 0
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
-.LVL1384:
-	.loc 3 836 0
+.LVL1402:
+	.loc 3 837 0
 	ldr	r3, [sp, #12]
-.LVL1385:
-	.loc 3 834 0
-	ldr	r5, [sp, #12]
-.LVL1386:
+.LVL1403:
 	.loc 3 835 0
-	str	r0, [sp, #16]
+	ldr	r5, [sp, #12]
+.LVL1404:
 	.loc 3 836 0
+	str	r0, [sp, #16]
+	.loc 3 837 0
 	rsb	r3, r3, #1
-.LVL1387:
-	.loc 3 827 0
+.LVL1405:
+	.loc 3 828 0
 	str	r9, [sp, #24]
-.LVL1388:
-	.loc 3 836 0
+.LVL1406:
+	.loc 3 837 0
 	add	r3, r3, r0
-.LVL1389:
-	.loc 3 819 0
+.LVL1407:
+	.loc 3 820 0
 	str	r9, [sp, #20]
-	.loc 3 836 0
+	.loc 3 837 0
 	str	r3, [sp, #4]
-	.loc 3 840 0
+	.loc 3 841 0
 	ldr	r2, [sp, #4]
-.LVL1390:
-	ldr	r3, [r4, #2440]
+.LVL1408:
+	ldr	r3, [r4, #2484]
 	add	r3, r3, r2
-	str	r3, [r4, #2440]
-.LVL1391:
-.L1618:
-	.loc 3 841 0
+	str	r3, [r4, #2484]
+.LVL1409:
+.L1623:
+	.loc 3 842 0
 	ldr	r3, [sp, #4]
-.LVL1392:
-	cbnz	r3, .L1634
-	.loc 3 897 0
-	ldr	r3, .L1647
-.LVL1393:
-	ldrh	r2, [r3, #3186]
-	cbnz	r2, .L1635
-	.loc 3 897 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r3, #2276]
+.LVL1410:
+	cbnz	r3, .L1639
+	.loc 3 898 0
+	ldr	r3, .L1652
+.LVL1411:
+	ldrh	r2, [r3, #3182]
+	cbnz	r2, .L1640
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3, #2320]
 	cmp	r3, #31
-	bhi	.L1615
-.L1635:
-	.loc 3 898 0 is_stmt 1
+	bhi	.L1620
+.L1640:
+	.loc 3 899 0 is_stmt 1
 	movs	r1, #1
 	movs	r0, #0
-.LVL1394:
+.LVL1412:
 	bl	rk_ftl_garbage_collect
-.LVL1395:
-	b	.L1615
-.LVL1396:
-.L1634:
-	.loc 3 842 0
+.LVL1413:
+	b	.L1620
+.LVL1414:
+.L1639:
+	.loc 3 843 0
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r5
-.LVL1397:
+.LVL1415:
 	bl	log2phys
-.LVL1398:
-	.loc 3 843 0
+.LVL1416:
+	.loc 3 844 0
 	ldr	r2, [sp, #52]
 	adds	r0, r2, #1
-	bne	.L1619
+	bne	.L1624
 	mov	fp, #0
-.LVL1399:
-.L1620:
-	.loc 3 844 0 discriminator 1
+.LVL1417:
+.L1625:
+	.loc 3 845 0 discriminator 1
 	ldrh	r0, [r4, #34]
-.LVL1400:
+.LVL1418:
 	cmp	fp, r0
-	bcc	.L1622
-.L1623:
-	.loc 3 873 0
+	bcc	.L1627
+.L1628:
+	.loc 3 874 0
 	ldr	r3, [sp, #4]
-.LVL1401:
-	.loc 3 871 0
+.LVL1419:
+	.loc 3 872 0
 	adds	r5, r5, #1
-	.loc 3 873 0
+	.loc 3 874 0
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1627
-	.loc 3 873 0 is_stmt 0 discriminator 1
+	beq	.L1632
+	.loc 3 874 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #8]
-.LVL1402:
+.LVL1420:
 	cmp	r6, r3, lsl #2
-	bne	.L1618
-.LVL1403:
-.L1627:
-	.loc 3 874 0 is_stmt 1
+	bne	.L1623
+.LVL1421:
+.L1632:
+	.loc 3 875 0 is_stmt 1
 	cmp	r6, #0
-	beq	.L1618
-	.loc 3 875 0
+	beq	.L1623
+	.loc 3 876 0
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [r4, #3792]
-	.loc 3 876 0
+	.loc 3 877 0
 	mov	fp, #0
-.LVL1404:
-	.loc 3 875 0
+.LVL1422:
+	.loc 3 876 0
 	bl	FlashReadPages
-.LVL1405:
-	.loc 3 882 0
+.LVL1423:
+	.loc 3 883 0
 	lsl	r3, r9, #9
 	str	r3, [sp, #40]
-	.loc 3 879 0
+	.loc 3 880 0
 	ldr	r3, [sp, #20]
-.LVL1406:
+.LVL1424:
 	lsls	r3, r3, #9
-.LVL1407:
+.LVL1425:
 	str	r3, [sp, #32]
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-.L1633:
+.L1638:
 	movs	r3, #20
-	.loc 3 877 0
+	.loc 3 878 0
 	ldr	r2, [r4, #3792]
 	mul	r3, r3, fp
 	ldr	r0, [sp, #12]
-.LVL1408:
+.LVL1426:
 	add	r2, r2, r3
 	ldr	r1, [r2, #16]
 	cmp	r0, r1
-	bne	.L1629
-	.loc 3 878 0
+	bne	.L1634
+	.loc 3 879 0
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3776]
 	cmp	r1, r2
-	bne	.L1630
+	bne	.L1635
 	str	r3, [sp, #44]
-	.loc 3 879 0
+	.loc 3 880 0
 	mov	r0, r10
-.LVL1409:
+.LVL1427:
 	ldr	r3, [sp, #32]
 	ldr	r2, [sp, #36]
 	add	r1, r1, r3
-.LVL1410:
-.L1646:
-	.loc 3 882 0
+.LVL1428:
+.L1651:
+	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1411:
+.LVL1429:
 	ldr	r3, [sp, #44]
-.LVL1412:
-.L1630:
-	.loc 3 884 0
+.LVL1430:
+.L1635:
+	.loc 3 885 0
 	ldr	r2, [r4, #3792]
 	ldr	r0, [r2, r3]
-.LVL1413:
+.LVL1431:
 	add	ip, r2, r3
 	adds	r1, r0, #1
-	.loc 3 885 0
-	itttt	eq
-	ldreq	r1, [r4, #2688]
 	.loc 3 886 0
+	itttt	eq
+	ldreq	r1, [r4, #2684]
+	.loc 3 887 0
 	moveq	r8, r0
-	.loc 3 885 0
+	.loc 3 886 0
 	addeq	r1, r1, #1
-	streq	r1, [r4, #2688]
-	.loc 3 888 0
+	streq	r1, [r4, #2684]
+	.loc 3 889 0
 	ldr	r3, [r2, r3]
 	cmp	r3, #256
-	bne	.L1632
-.LBB513:
-	.loc 3 889 0
+	bne	.L1637
+.LBB537:
+	.loc 3 890 0
 	ldr	r0, [ip, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1414:
-	.loc 3 890 0
+.LVL1432:
+	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1415:
-.L1632:
-.LBE513:
-	.loc 3 876 0 discriminator 2
+.LVL1433:
+.L1637:
+.LBE537:
+	.loc 3 877 0 discriminator 2
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L1633
-	.loc 3 893 0
+	bne	.L1638
+	.loc 3 894 0
 	movs	r6, #0
-	b	.L1618
-.LVL1416:
-.L1622:
-	.loc 3 845 0
-	mla	r0, r0, r5, fp
-.LVL1417:
+	b	.L1623
+.LVL1434:
+.L1627:
 	.loc 3 846 0
+	mla	r0, r0, r5, fp
+.LVL1435:
+	.loc 3 847 0
 	cmp	r7, r0
-	bhi	.L1621
-	.loc 3 846 0 is_stmt 0 discriminator 1
+	bhi	.L1626
+	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #8]
 	cmp	r3, r0
-	bls	.L1621
-	.loc 3 847 0 is_stmt 1
+	bls	.L1626
+	.loc 3 848 0 is_stmt 1
 	subs	r0, r0, r7
-.LVL1418:
-.LBB514:
-.LBB515:
-.LBB516:
+.LVL1436:
+.LBB538:
+.LBB539:
+.LBB540:
 	.loc 1 202 0
 	mov	r1, #512
 	add	r0, r10, r0, lsl #9
 	bl	__memzero
-.LVL1419:
-.L1621:
-.LBE516:
-.LBE515:
-.LBE514:
-	.loc 3 844 0 discriminator 2
+.LVL1437:
+.L1626:
+.LBE540:
+.LBE539:
+.LBE538:
+	.loc 3 845 0 discriminator 2
 	add	fp, fp, #1
-	b	.L1620
-.LVL1420:
-.L1619:
-	.loc 3 850 0
+	b	.L1625
+.LVL1438:
+.L1624:
+	.loc 3 851 0
 	ldr	r3, [r4, #3792]
 	movs	r1, #20
 	ldrh	fp, [r4, #34]
-.LVL1421:
+.LVL1439:
 	mla	r3, r1, r6, r3
 	str	r2, [r3, #4]
-	.loc 3 851 0
+	.loc 3 852 0
 	ldr	r2, [sp, #12]
-.LVL1422:
+.LVL1440:
 	cmp	r5, r2
-	bne	.L1624
-	.loc 3 852 0
-	ldr	r2, [r4, #3776]
-.LVL1423:
+	bne	.L1629
 	.loc 3 853 0
+	ldr	r2, [r4, #3776]
+.LVL1441:
+	.loc 3 854 0
 	mov	r1, fp
 	mov	r0, r7
-	.loc 3 852 0
+	.loc 3 853 0
 	str	r3, [sp, #32]
 	str	r2, [r3, #8]
-	.loc 3 853 0
-	bl	__aeabi_uidivmod
-.LVL1424:
 	.loc 3 854 0
+	bl	__aeabi_uidivmod
+.LVL1442:
+	.loc 3 855 0
 	sub	r2, fp, r1
-	.loc 3 853 0
+	.loc 3 854 0
 	str	r1, [sp, #20]
-.LVL1425:
+.LVL1443:
 	ldr	r1, [sp, #28]
-.LVL1426:
+.LVL1444:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
-	.loc 3 856 0
+	.loc 3 857 0
 	cmp	r3, fp
 	str	r3, [sp, #24]
 	ldr	r3, [sp, #32]
-	bne	.L1625
-	.loc 3 857 0
+	bne	.L1630
+	.loc 3 858 0
 	str	r10, [r3, #8]
-.L1625:
-	.loc 3 866 0
+.L1630:
+	.loc 3 867 0
 	ldrh	r2, [r4, #88]
 	ldr	r1, [r4, #3772]
-.LVL1427:
-	.loc 3 867 0
+.LVL1445:
+	.loc 3 868 0
 	str	r5, [r3, #16]
-	.loc 3 866 0
+	.loc 3 867 0
 	muls	r2, r6, r2
-	.loc 3 868 0
+	.loc 3 869 0
 	adds	r6, r6, #1
-	.loc 3 866 0
+	.loc 3 867 0
 	bic	r2, r2, #3
 	add	r2, r2, r1
 	str	r2, [r3, #12]
-	b	.L1623
-.LVL1428:
-.L1624:
-	.loc 3 858 0
+	b	.L1628
+.LVL1446:
+.L1629:
+	.loc 3 859 0
 	ldr	r2, [sp, #16]
-.LVL1429:
+.LVL1447:
 	cmp	r5, r2
-	bne	.L1626
-	.loc 3 859 0
-	ldr	r2, [r4, #3768]
-.LVL1430:
+	bne	.L1631
 	.loc 3 860 0
+	ldr	r2, [r4, #3768]
+.LVL1448:
+	.loc 3 861 0
 	ldr	r1, [sp, #8]
-	.loc 3 859 0
-	str	r2, [r3, #8]
 	.loc 3 860 0
+	str	r2, [r3, #8]
+	.loc 3 861 0
 	mul	r2, fp, r5
 	sub	r9, r1, r2
-	.loc 3 861 0
+	.loc 3 862 0
 	cmp	fp, r9
-	bne	.L1625
-.L1645:
-	.loc 3 864 0
+	bne	.L1630
+.L1650:
+	.loc 3 865 0
 	subs	r2, r2, r7
 	add	r2, r10, r2, lsl #9
 	str	r2, [r3, #8]
-	b	.L1625
-.LVL1431:
-.L1626:
+	b	.L1630
+.LVL1449:
+.L1631:
 	mul	r2, r5, fp
-.LVL1432:
-	b	.L1645
-.LVL1433:
-.L1629:
-	.loc 3 880 0
+.LVL1450:
+	b	.L1650
+.LVL1451:
+.L1634:
+	.loc 3 881 0
 	ldr	r0, [sp, #16]
-.LVL1434:
+.LVL1452:
 	cmp	r0, r1
-	bne	.L1630
-	.loc 3 881 0
+	bne	.L1635
+	.loc 3 882 0
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3768]
 	cmp	r1, r2
-	bne	.L1630
+	bne	.L1635
 	str	r3, [sp, #44]
-	.loc 3 882 0
+	.loc 3 883 0
 	ldrh	r0, [r4, #34]
-.LVL1435:
+.LVL1453:
 	ldr	r3, [sp, #16]
-.LVL1436:
+.LVL1454:
 	ldr	r2, [sp, #40]
 	muls	r0, r3, r0
 	subs	r0, r0, r7
 	add	r0, r10, r0, lsl #9
-	b	.L1646
-.LVL1437:
-.L1636:
-	.loc 3 830 0
+	b	.L1651
+.LVL1455:
+.L1641:
+	.loc 3 831 0
 	mov	r8, #-1
-	b	.L1615
-.L1637:
+	b	.L1620
+.L1642:
 	mov	r8, r3
-	b	.L1615
-.L1648:
+	b	.L1620
+.L1653:
 	.align	2
-.L1647:
+.L1652:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 .LFE164:
@@ -17263,21 +17379,21 @@ FtlRead:
 sftl_read:
 	.fnstart
 .LFB169:
-	.loc 3 1201 0
+	.loc 3 1204 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1438:
-	.loc 3 1202 0
+.LVL1456:
+	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1439:
+.LVL1457:
 	mov	r1, r0
-.LVL1440:
+.LVL1458:
 	movs	r0, #0
-.LVL1441:
+.LVL1459:
 	b	FtlRead
-.LVL1442:
+.LVL1460:
 .LFE169:
 	.fnend
 	.size	sftl_read, .-sftl_read
@@ -17291,204 +17407,204 @@ sftl_read:
 FtlWrite:
 	.fnstart
 .LFB167:
-	.loc 3 959 0
+	.loc 3 962 0
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1443:
-	.loc 3 967 0
+.LVL1461:
+	.loc 3 970 0
 	cmp	r0, #16
-	.loc 3 959 0
+	.loc 3 962 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI191:
+.LCFI192:
 	.pad #68
 	sub	sp, sp, #68
-.LCFI192:
-	.loc 3 959 0
+.LCFI193:
+	.loc 3 962 0
 	mov	r8, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	.loc 3 967 0
-	bne	.L1651
-	.loc 3 968 0
+	.loc 3 970 0
+	bne	.L1656
+	.loc 3 971 0
 	mov	r2, r3
-.LVL1444:
+.LVL1462:
 	ldr	r1, [sp, #12]
 	add	r0, r8, #256
-.LVL1445:
+.LVL1463:
 	bl	FtlVendorPartWrite
-.LVL1446:
-.L1650:
-	.loc 3 1150 0
+.LVL1464:
+.L1655:
+	.loc 3 1153 0
 	add	sp, sp, #68
-.LCFI193:
+.LCFI194:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1447:
-.L1651:
-.LCFI194:
-	.loc 3 971 0
+.LVL1465:
+.L1656:
+.LCFI195:
+	.loc 3 974 0
 	ldr	r3, [sp, #12]
-.LVL1448:
-	ldr	r4, .L1717
+.LVL1466:
+	ldr	r4, .L1722
 	adds	r7, r1, r3
 	ldr	r3, [r4, #116]
-.LVL1449:
+.LVL1467:
 	cmp	r7, r3
-	bhi	.L1693
-	.loc 3 971 0 is_stmt 0 discriminator 1
-	ldr	r6, .L1717+4
+	bhi	.L1698
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	ldr	r6, .L1722+4
 	ldr	r0, [r6]
-.LVL1450:
+.LVL1468:
 	adds	r5, r0, #1
-	beq	.L1650
-	.loc 3 974 0 is_stmt 1
-	ldr	r3, .L1717+8
+	beq	.L1655
+	.loc 3 977 0 is_stmt 1
+	ldr	r3, .L1722+8
 	mov	r2, #2048
-	.loc 3 975 0
+	.loc 3 978 0
 	ldrh	r5, [r4, #34]
 	mov	r0, r8
-	.loc 3 974 0
+	.loc 3 977 0
 	str	r2, [r3, #-220]
-	.loc 3 975 0
+	.loc 3 978 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL1451:
-	.loc 3 976 0
+.LVL1469:
+	.loc 3 979 0
 	mov	r1, r5
-	.loc 3 975 0
+	.loc 3 978 0
 	mov	r10, r0
-.LVL1452:
-	.loc 3 976 0
+.LVL1470:
+	.loc 3 979 0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-.LVL1453:
-	.loc 3 977 0
-	sub	r7, r0, r10
+.LVL1471:
 	.loc 3 980 0
+	sub	r7, r0, r10
+	.loc 3 983 0
 	ldr	fp, [r4, #3948]
-	.loc 3 977 0
+	.loc 3 980 0
 	adds	r3, r7, #1
-.LVL1454:
-	.loc 3 979 0
+.LVL1472:
+	.loc 3 982 0
 	adds	r2, r7, #1
-.LVL1455:
-	.loc 3 977 0
+.LVL1473:
+	.loc 3 980 0
 	str	r3, [sp, #8]
+	.loc 3 982 0
+	ldr	r3, [r4, #2492]
 	.loc 3 979 0
-	ldr	r3, [r4, #2448]
-	.loc 3 976 0
 	str	r0, [sp, #20]
-.LVL1456:
-	.loc 3 979 0
+.LVL1474:
+	.loc 3 982 0
 	add	r3, r3, r2
-	str	r3, [r4, #2448]
-	.loc 3 980 0
+	str	r3, [r4, #2492]
+	.loc 3 983 0
 	cmp	fp, #0
-	beq	.L1653
-	.loc 3 981 0
+	beq	.L1658
+	.loc 3 984 0
 	ldr	r3, [fp, #16]
 	cmp	r10, r3
-	beq	.L1654
-	.loc 3 982 0
+	beq	.L1659
+	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1457:
-.L1653:
-	.loc 3 1005 0
+.LVL1475:
+.L1658:
+	.loc 3 1008 0
 	ldr	r3, [r6, #8]
 	cmp	r3, #0
-	beq	.L1695
-	.loc 3 1006 0 discriminator 1
-	ldr	r5, .L1717+12
-	.loc 3 1005 0 discriminator 1
-	ldrh	r2, [r4, #2284]
-.LVL1458:
-	.loc 3 1006 0 discriminator 1
+	beq	.L1700
+	.loc 3 1009 0 discriminator 1
+	ldr	r5, .L1722+12
+	.loc 3 1008 0 discriminator 1
+	ldrh	r2, [r4, #2328]
+.LVL1476:
+	.loc 3 1009 0 discriminator 1
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.LVL1459:
-.L1656:
-	.loc 3 1009 0
-	ldr	r4, .L1717
-	.loc 3 1065 0
+.LVL1477:
+.L1661:
+	.loc 3 1012 0
+	ldr	r4, .L1722
+	.loc 3 1068 0
 	mov	r6, r10
-.LVL1460:
-.L1657:
-	.loc 3 1008 0
+.LVL1478:
+.L1662:
+	.loc 3 1011 0
 	ldr	r3, [sp, #8]
-.LVL1461:
+.LVL1479:
 	cmp	r3, #0
-	beq	.L1691
-	.loc 3 1009 0
+	beq	.L1696
+	.loc 3 1012 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #8]
-.LVL1462:
+.LVL1480:
 	cmp	r2, r3
-	bcc	.L1658
-	.loc 3 1009 0 is_stmt 0 discriminator 1
-	movw	r2, #1009
-	ldr	r1, .L1717+16
-	ldr	r0, .L1717+20
+	bcc	.L1663
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1722+16
+	ldr	r0, .L1722+20
 	bl	printk
-.LVL1463:
-.L1658:
-	.loc 3 1010 0 is_stmt 1
+.LVL1481:
+.L1663:
+	.loc 3 1013 0 is_stmt 1
 	ldrh	r9, [r5, #4]
-.LVL1464:
+.LVL1482:
 	cmp	r9, #0
-	bne	.L1659
-	.loc 3 1011 0
+	bne	.L1664
+	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL1465:
-	.loc 3 1013 0
-	ldr	r3, .L1717+12
-	ldr	r7, .L1717+4
+.LVL1483:
+	.loc 3 1016 0
+	ldr	r3, .L1722+12
+	ldr	r7, .L1722+4
 	cmp	r5, r3
-	bne	.L1660
-	.loc 3 1014 0
-	ldrh	r9, [r4, #2332]
+	bne	.L1665
+	.loc 3 1017 0
+	ldrh	r9, [r4, #2376]
 	cmp	r9, #0
-	bne	.L1661
-	.loc 3 1015 0
+	bne	.L1666
+	.loc 3 1018 0
 	add	r0, r5, #48
 	bl	allocate_new_data_superblock
-.LVL1466:
-	.loc 3 1016 0
+.LVL1484:
+	.loc 3 1019 0
 	str	r9, [r7, #8]
-.L1661:
-	.loc 3 1020 0
-	ldr	r5, .L1717+12
-.LVL1467:
-	.loc 3 1018 0
-	ldr	r0, .L1717+12
+.L1666:
+	.loc 3 1023 0
+	ldr	r5, .L1722+12
+.LVL1485:
+	.loc 3 1021 0
+	ldr	r0, .L1722+12
 	bl	allocate_new_data_superblock
-.LVL1468:
-	.loc 3 1019 0
+.LVL1486:
+	.loc 3 1022 0
 	ldr	r2, [r7, #8]
-	.loc 3 1020 0
+	.loc 3 1023 0
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.LVL1469:
-.L1662:
-	.loc 3 1030 0
+.LVL1487:
+.L1667:
+	.loc 3 1033 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1659
-	.loc 3 1031 0
+	cbnz	r3, .L1664
+	.loc 3 1034 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1470:
-.L1659:
-	.loc 3 1038 0
+.LVL1488:
+.L1664:
+	.loc 3 1041 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	.loc 3 1040 0
+	.loc 3 1043 0
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp, #8]
-.LVL1471:
-	.loc 3 1038 0
+.LVL1489:
+	.loc 3 1041 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -17496,122 +17612,122 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1042 0
+	.loc 3 1045 0
 	ldrh	r3, [r4, #8]
 	str	r2, [sp, #36]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1663
-	.loc 3 1042 0 is_stmt 0 discriminator 1
-	movw	r2, #1042
-	ldr	r1, .L1717+16
-.LVL1472:
-	ldr	r0, .L1717+20
+	bcc	.L1668
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1722+16
+.LVL1490:
+	ldr	r0, .L1722+20
 	bl	printk
-.LVL1473:
-.L1663:
-	.loc 3 1065 0 is_stmt 1 discriminator 1
+.LVL1491:
+.L1668:
+	.loc 3 1068 0 is_stmt 1 discriminator 1
 	mov	r9, #0
-.LVL1474:
-.L1664:
-	.loc 3 1043 0 discriminator 1
+.LVL1492:
+.L1669:
+	.loc 3 1046 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r9, r3
-	bne	.L1685
-.L1665:
-	.loc 3 1124 0
+	bne	.L1690
+.L1670:
+	.loc 3 1127 0
 	ldr	r3, [r4, #3948]
 	cmp	r3, #0
-	beq	.L1686
-	.loc 3 1126 0
+	beq	.L1691
+	.loc 3 1129 0
 	ldr	r3, [sp, #8]
-.LVL1475:
-	.loc 3 1127 0
+.LVL1493:
+	.loc 3 1130 0
 	subs	r9, r9, #1
-	.loc 3 1126 0
+	.loc 3 1129 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-	.loc 3 1127 0
-	bne	.L1686
-.L1691:
-	.loc 3 1134 0
+	.loc 3 1130 0
+	bne	.L1691
+.L1696:
+	.loc 3 1137 0
 	ldr	r3, [sp, #20]
-.LVL1476:
+.LVL1494:
 	movs	r0, #0
-	.loc 3 1136 0
-	ldr	r4, .L1717
-	.loc 3 1134 0
+	.loc 3 1139 0
+	ldr	r4, .L1722
+	.loc 3 1137 0
 	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
-.LVL1477:
-	.loc 3 1136 0
-	ldrh	r3, [r4, #2276]
+.LVL1495:
+	.loc 3 1139 0
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #15
-	bhi	.L1688
-	.loc 3 1138 0
+	bhi	.L1693
+	.loc 3 1141 0
 	movw	r5, #65535
-.LVL1478:
-.L1712:
-	ldrh	r3, [r4, #2568]
+.LVL1496:
+.L1717:
+	ldrh	r3, [r4, #2564]
 	cmp	r3, r5
-	bne	.L1692
-	.loc 3 1138 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #3182]
+	bne	.L1697
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #3178]
 	cmp	r3, r5
-	bne	.L1692
-	.loc 3 1139 0 is_stmt 1
+	bne	.L1697
+	.loc 3 1142 0 is_stmt 1
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1479:
+.LVL1497:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1480:
-.L1692:
-	.loc 3 1142 0
+.LVL1498:
+.L1697:
+	.loc 3 1145 0
 	movs	r1, #1
-	.loc 3 1140 0
+	.loc 3 1143 0
 	movs	r3, #128
-	.loc 3 1142 0
+	.loc 3 1145 0
 	mov	r0, r1
-	.loc 3 1140 0
-	strh	r3, [r4, #3130]	@ movhi
-	.loc 3 1141 0
-	strh	r3, [r4, #3128]	@ movhi
-	.loc 3 1142 0
-	bl	rk_ftl_garbage_collect
-.LVL1481:
 	.loc 3 1143 0
+	strh	r3, [r4, #3126]	@ movhi
+	.loc 3 1144 0
+	strh	r3, [r4, #3124]	@ movhi
+	.loc 3 1145 0
+	bl	rk_ftl_garbage_collect
+.LVL1499:
+	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1482:
-	.loc 3 1144 0
-	ldrh	r3, [r4, #2276]
+.LVL1500:
+	.loc 3 1147 0
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #8
-	bls	.L1712
-	b	.L1688
-.LVL1483:
-.L1654:
-	.loc 3 984 0
-	ldr	r3, [r4, #2452]
-	.loc 3 985 0
+	bls	.L1717
+	b	.L1693
+.LVL1501:
+.L1659:
+	.loc 3 987 0
+	ldr	r3, [r4, #2496]
+	.loc 3 988 0
 	mov	r1, r5
 	mov	r0, r8
-	.loc 3 984 0
+	.loc 3 987 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2452]
-	.loc 3 985 0
+	str	r3, [r4, #2496]
+	.loc 3 988 0
 	bl	__aeabi_uidivmod
-.LVL1484:
+.LVL1502:
 	ldr	r2, [sp, #12]
-.LVL1485:
-	.loc 3 986 0
-	subs	r5, r5, r1
+.LVL1503:
 	.loc 3 989 0
+	subs	r5, r5, r1
+	.loc 3 992 0
 	ldr	r0, [fp, #8]
-	.loc 3 985 0
+	.loc 3 988 0
 	mov	r3, r1
-	.loc 3 989 0
+	.loc 3 992 0
 	ldr	r1, [sp, #4]
 	cmp	r5, r2
 	it	cs
@@ -17619,91 +17735,91 @@ FtlWrite:
 	lsl	r9, r5, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r9
-.LVL1486:
+.LVL1504:
 	bl	ftl_memcpy
-.LVL1487:
-	.loc 3 991 0
-	cbnz	r7, .L1655
-.LVL1488:
-.L1688:
-	.loc 3 992 0
+.LVL1505:
+	.loc 3 994 0
+	cbnz	r7, .L1660
+.LVL1506:
+.L1693:
+	.loc 3 995 0
 	movs	r0, #0
-	b	.L1650
-.LVL1489:
-.L1655:
-	.loc 3 993 0
+	b	.L1655
+.LVL1507:
+.L1660:
+	.loc 3 996 0
 	ldr	r3, [sp, #12]
-.LVL1490:
-	.loc 3 994 0
+.LVL1508:
+	.loc 3 997 0
 	add	r8, r8, r5
-	.loc 3 996 0
+	.loc 3 999 0
 	add	r10, r10, #1
-	.loc 3 993 0
+	.loc 3 996 0
 	subs	r3, r3, r5
 	str	r3, [sp, #12]
-	.loc 3 995 0
+	.loc 3 998 0
 	ldr	r3, [sp, #4]
-.LVL1491:
+.LVL1509:
 	add	r3, r3, r9
 	str	r3, [sp, #4]
-	.loc 3 997 0
+	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1492:
+.LVL1510:
 	str	r7, [sp, #8]
-	b	.L1653
-.LVL1493:
-.L1695:
-	.loc 3 1003 0
-	ldr	r5, .L1717+12
-.LVL1494:
-	b	.L1656
-.LVL1495:
-.L1660:
-	.loc 3 1025 0
-	ldrh	r2, [r4, #2284]
-	.loc 3 1024 0
+	b	.L1658
+.LVL1511:
+.L1700:
+	.loc 3 1006 0
+	ldr	r5, .L1722+12
+.LVL1512:
+	b	.L1661
+.LVL1513:
+.L1665:
+	.loc 3 1028 0
+	ldrh	r2, [r4, #2328]
+	.loc 3 1027 0
 	str	r9, [r7, #8]
-	.loc 3 1025 0
-	cbnz	r2, .L1698
-	.loc 3 1026 0
+	.loc 3 1028 0
+	cbnz	r2, .L1703
+	.loc 3 1029 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1496:
-	b	.L1662
-.L1698:
+.LVL1514:
+	b	.L1667
+.L1703:
 	mov	r5, r3
-	b	.L1659
-.LVL1497:
-.L1685:
-	.loc 3 1044 0
+	b	.L1664
+.LVL1515:
+.L1690:
+	.loc 3 1047 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1665
-	.loc 3 1048 0
+	beq	.L1670
+	.loc 3 1051 0
 	movs	r2, #0
 	add	r1, sp, #40
-.LVL1498:
+.LVL1516:
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1499:
-	.loc 3 1049 0
+.LVL1517:
+	.loc 3 1052 0
 	mov	r0, r5
 	mul	r7, r7, r9
 	bl	get_new_active_ppa
-.LVL1500:
-	.loc 3 1052 0
+.LVL1518:
+	.loc 3 1055 0
 	ldrh	r2, [r4, #88]
-	.loc 3 1051 0
+	.loc 3 1054 0
 	ldr	r3, [r4, #3800]
-	.loc 3 1052 0
+	.loc 3 1055 0
 	mul	r1, r2, r9
-	.loc 3 1051 0
+	.loc 3 1054 0
 	add	r3, r3, r7
 	str	r0, [r3, #4]
-	.loc 3 1053 0
+	.loc 3 1056 0
 	str	r6, [r3, #16]
-	.loc 3 1052 0
+	.loc 3 1055 0
 	bic	r1, r1, #3
 	str	r1, [sp, #28]
 	ldr	r0, [sp, #28]
@@ -17711,335 +17827,335 @@ FtlWrite:
 	add	fp, r1, r0
 	str	r1, [sp, #32]
 	str	fp, [r3, #12]
-	.loc 3 1056 0
+	.loc 3 1059 0
 	movs	r1, #0
 	mov	r0, fp
 	bl	ftl_memset
-.LVL1501:
-	.loc 3 1058 0
+.LVL1519:
+	.loc 3 1061 0
 	cmp	r6, r10
-	beq	.L1666
-	.loc 3 1058 0 is_stmt 0 discriminator 1
+	beq	.L1671
+	.loc 3 1061 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
-.LVL1502:
+.LVL1520:
 	cmp	r6, r3
-	bne	.L1711
-	.loc 3 1066 0 is_stmt 1
+	bne	.L1716
+	.loc 3 1069 0 is_stmt 1
 	ldr	r3, [sp, #12]
-.LVL1503:
+.LVL1521:
 	add	r2, r8, r3
 	ldrh	r3, [r4, #34]
-.LVL1504:
+.LVL1522:
 	smulbb	r3, r3, r6
 	subs	r2, r2, r3
 	uxth	r3, r2
 	str	r3, [sp, #16]
-	.loc 3 1065 0
+	.loc 3 1068 0
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L1669
-.L1666:
-	.loc 3 1060 0
+	b	.L1674
+.L1671:
+	.loc 3 1063 0
 	ldrh	r2, [r4, #34]
 	mov	r0, r8
 	mov	r1, r2
 	str	r2, [sp, #16]
 	bl	__aeabi_uidivmod
-.LVL1505:
-	.loc 3 1061 0
+.LVL1523:
+	.loc 3 1064 0
 	ldr	r2, [sp, #16]
-	.loc 3 1060 0
+	.loc 3 1063 0
 	str	r1, [sp, #24]
-	.loc 3 1061 0
+	.loc 3 1064 0
 	subs	r2, r2, r1
 	ldr	r1, [sp, #12]
-.LVL1506:
+.LVL1524:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #16]
-.L1669:
-	.loc 3 1069 0
+.L1674:
+	.loc 3 1072 0
 	ldrh	r3, [r4, #34]
 	ldr	r2, [sp, #16]
 	cmp	r2, r3
-	.loc 3 1071 0
+	.loc 3 1074 0
 	ldr	r3, [r4, #3800]
-	.loc 3 1069 0
-	bne	.L1670
-	.loc 3 1070 0
+	.loc 3 1072 0
+	bne	.L1675
+	.loc 3 1073 0
 	cmp	r6, r10
-	.loc 3 1071 0
+	.loc 3 1074 0
 	add	r7, r7, r3
-	.loc 3 1070 0
-	bne	.L1671
-	.loc 3 1071 0
+	.loc 3 1073 0
+	bne	.L1676
+	.loc 3 1074 0
 	ldr	r3, [sp, #4]
-.LVL1507:
-.L1715:
-	.loc 3 1114 0
+.LVL1525:
+.L1720:
+	.loc 3 1117 0
 	str	r3, [r7, #8]
-.LVL1508:
-	b	.L1672
-.LVL1509:
-.L1671:
-	.loc 3 1073 0
+.LVL1526:
+	b	.L1677
+.LVL1527:
+.L1676:
+	.loc 3 1076 0
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #4]
-.LVL1510:
+.LVL1528:
 	muls	r2, r6, r2
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-.LVL1511:
-.L1672:
-	.loc 3 1116 0
+.LVL1529:
+.L1677:
+	.loc 3 1119 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #8]
-.LVL1512:
+.LVL1530:
 	cmp	r2, r3
-	bcc	.L1682
-	.loc 3 1116 0 is_stmt 0 discriminator 1
-	movw	r2, #1116
-	ldr	r1, .L1717+16
-.LVL1513:
-	ldr	r0, .L1717+20
+	bcc	.L1687
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	movw	r2, #1119
+	ldr	r1, .L1722+16
+.LVL1531:
+	ldr	r0, .L1722+20
 	bl	printk
-.LVL1514:
-.L1682:
-	.loc 3 1117 0 is_stmt 1
+.LVL1532:
+.L1687:
+	.loc 3 1120 0 is_stmt 1
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
-.LVL1515:
-	.loc 3 1043 0
+.LVL1533:
+	.loc 3 1046 0
 	add	r9, r9, #1
-	.loc 3 1117 0
+	.loc 3 1120 0
 	strh	r3, [r2, r1]	@ movhi
-	.loc 3 1118 0
-	ldr	r3, [r4, #2476]
-	.loc 3 1119 0
-	str	r6, [fp, #8]
+	.loc 3 1121 0
+	ldr	r3, [r4, #2520]
 	.loc 3 1122 0
+	str	r6, [fp, #8]
+	.loc 3 1125 0
 	adds	r6, r6, #1
-	.loc 3 1118 0
+	.loc 3 1121 0
 	str	r3, [fp, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
-	str	r3, [r4, #2476]
-	.loc 3 1120 0
+	str	r3, [r4, #2520]
+	.loc 3 1123 0
 	ldr	r3, [sp, #40]
-.LVL1516:
+.LVL1534:
 	str	r3, [fp, #12]
-	.loc 3 1121 0
+	.loc 3 1124 0
 	ldrh	r3, [r5]
-.LVL1517:
+.LVL1535:
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1664
-.L1718:
+	b	.L1669
+.L1723:
 	.align	2
-.L1717:
+.L1722:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2280
+	.word	.LANCHOR0+2324
 	.word	.LANCHOR1+574
 	.word	.LC1
-.LVL1518:
-.L1670:
-	.loc 3 1076 0
+.LVL1536:
+.L1675:
+	.loc 3 1079 0
 	cmp	r6, r10
-	.loc 3 1077 0
+	.loc 3 1080 0
 	add	r3, r3, r7
 	ite	eq
 	ldreq	r2, [r4, #3776]
-	.loc 3 1079 0
+	.loc 3 1082 0
 	ldrne	r2, [r4, #3768]
 	str	r2, [r3, #8]
-	.loc 3 1081 0
+	.loc 3 1084 0
 	ldr	r3, [sp, #40]
 	adds	r1, r3, #1
-.LVL1519:
-	beq	.L1675
-.LBB517:
-	.loc 3 1083 0
+.LVL1537:
+	beq	.L1680
+.LBB541:
+	.loc 3 1086 0
 	str	r3, [sp, #48]
-	.loc 3 1087 0
+	.loc 3 1090 0
 	movs	r1, #1
-	.loc 3 1085 0
+	.loc 3 1088 0
 	ldr	r3, [r4, #3800]
-	.loc 3 1087 0
+	.loc 3 1090 0
 	add	r0, sp, #44
-	.loc 3 1084 0
+	.loc 3 1087 0
 	str	r6, [sp, #60]
-	.loc 3 1085 0
+	.loc 3 1088 0
 	add	r3, r3, r7
 	ldr	r2, [r3, #8]
-	.loc 3 1086 0
+	.loc 3 1089 0
 	ldr	r3, [r3, #12]
-	.loc 3 1085 0
+	.loc 3 1088 0
 	str	r2, [sp, #52]
-	.loc 3 1087 0
+	.loc 3 1090 0
 	movs	r2, #0
-	.loc 3 1086 0
+	.loc 3 1089 0
 	str	r3, [sp, #56]
-	.loc 3 1087 0
+	.loc 3 1090 0
 	bl	FlashReadPages
-.LVL1520:
-	.loc 3 1088 0
+.LVL1538:
+	.loc 3 1091 0
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1676
-	.loc 3 1089 0
-	ldr	r3, [r4, #2688]
+	bne	.L1681
+	.loc 3 1092 0
+	ldr	r3, [r4, #2684]
 	adds	r3, r3, #1
-	str	r3, [r4, #2688]
-.L1679:
+	str	r3, [r4, #2684]
+.L1684:
 	ldr	r3, [sp, #16]
-.LBE517:
-	.loc 3 1101 0
+.LBE541:
+	.loc 3 1104 0
 	cmp	r6, r10
 	lsl	r2, r3, #9
-	bne	.L1680
-	.loc 3 1102 0
+	bne	.L1685
+	.loc 3 1105 0
 	ldr	r3, [r4, #3800]
 	ldr	r1, [sp, #4]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #24]
 	add	r0, r0, r3, lsl #9
-.L1714:
-	.loc 3 1104 0
+.L1719:
+	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1521:
-	.loc 3 1106 0
+.LVL1539:
+	.loc 3 1109 0
 	ldr	r3, [sp, #20]
-.LVL1522:
+.LVL1540:
 	cmp	r6, r3
-	bne	.L1672
-	.loc 3 1107 0
+	bne	.L1677
+	.loc 3 1110 0
 	ldrh	r3, [r5, #4]
-.LVL1523:
+.LVL1541:
 	cmp	r3, #0
-	beq	.L1672
-	.loc 3 1108 0
+	beq	.L1677
+	.loc 3 1111 0
 	ldr	r3, [r4, #3800]
 	add	r7, r7, r3
-	.loc 3 1109 0
-	ldr	r3, .L1719
-	.loc 3 1108 0
+	.loc 3 1112 0
+	ldr	r3, .L1724
+	.loc 3 1111 0
 	str	r7, [r4, #3948]
-	.loc 3 1109 0
+	.loc 3 1112 0
 	str	r5, [r3, #-236]
-	b	.L1672
-.L1676:
-.LBB518:
-	.loc 3 1091 0
+	b	.L1677
+.L1681:
+.LBB542:
+	.loc 3 1094 0
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1678
-	.loc 3 1092 0
-	ldr	r3, [r4, #2688]
-	.loc 3 1093 0
+	beq	.L1683
+	.loc 3 1095 0
+	ldr	r3, [r4, #2684]
+	.loc 3 1096 0
 	mov	r2, r6
-	ldr	r0, .L1719+4
-	.loc 3 1092 0
+	ldr	r0, .L1724+4
+	.loc 3 1095 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2688]
-	.loc 3 1093 0
+	str	r3, [r4, #2684]
+	.loc 3 1096 0
 	ldr	r1, [fp, #8]
 	bl	printk
-.LVL1524:
-.L1678:
-	.loc 3 1095 0
+.LVL1542:
+.L1683:
+	.loc 3 1098 0
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1679
-	.loc 3 1095 0 is_stmt 0 discriminator 1
-	movw	r2, #1095
-	ldr	r1, .L1719+8
-	ldr	r0, .L1719+12
+	beq	.L1684
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1724+8
+	ldr	r0, .L1724+12
 	bl	printk
-.LVL1525:
-	b	.L1679
-.L1675:
-.LBE518:
-	.loc 3 1098 0 is_stmt 1
+.LVL1543:
+	b	.L1684
+.L1680:
+.LBE542:
+	.loc 3 1101 0 is_stmt 1
 	ldr	r3, [r4, #3800]
 	movs	r1, #0
 	ldrh	r2, [r4, #86]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL1526:
-	b	.L1679
-.L1680:
-	.loc 3 1104 0
+.LVL1544:
+	b	.L1684
+.L1685:
+	.loc 3 1107 0
 	ldrh	r1, [r4, #34]
 	ldr	r0, [sp, #4]
-.LVL1527:
+.LVL1545:
 	ldr	r3, [r4, #3800]
 	muls	r1, r6, r1
 	add	r3, r3, r7
 	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-.LVL1528:
-	b	.L1714
-.LVL1529:
-.L1711:
-	.loc 3 1114 0
+.LVL1546:
+	b	.L1719
+.LVL1547:
+.L1716:
+	.loc 3 1117 0
 	ldr	r3, [r4, #3800]
-.LVL1530:
+.LVL1548:
 	ldr	r2, [sp, #4]
-.LVL1531:
+.LVL1549:
 	add	r7, r7, r3
 	ldrh	r3, [r4, #34]
 	muls	r3, r6, r3
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-	b	.L1715
-.LVL1532:
-.L1686:
-	.loc 3 1130 0
+	b	.L1720
+.LVL1550:
+.L1691:
+	.loc 3 1133 0
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, r9
-.LVL1533:
+.LVL1551:
 	ldr	r0, [r4, #3800]
 	bl	FtlProgPages
-.LVL1534:
-	.loc 3 1131 0
+.LVL1552:
+	.loc 3 1134 0
 	ldr	r3, [sp, #8]
-.LVL1535:
+.LVL1553:
 	cmp	r3, r9
-	bcs	.L1689
-	.loc 3 1131 0 is_stmt 0 discriminator 1
-	movw	r2, #1131
-	ldr	r1, .L1719+8
-	ldr	r0, .L1719+12
+	bcs	.L1694
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1724+8
+	ldr	r0, .L1724+12
 	bl	printk
-.LVL1536:
-.L1689:
-	.loc 3 1132 0 is_stmt 1
+.LVL1554:
+.L1694:
+	.loc 3 1135 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	sub	r3, r3, r9
 	str	r3, [sp, #8]
-	b	.L1657
-.LVL1537:
-.L1693:
-	.loc 3 972 0
+	b	.L1662
+.LVL1555:
+.L1698:
+	.loc 3 975 0
 	mov	r0, #-1
-.LVL1538:
-	b	.L1650
-.L1720:
+.LVL1556:
+	b	.L1655
+.L1725:
 	.align	2
-.L1719:
+.L1724:
 	.word	.LANCHOR3
-	.word	.LC101
+	.word	.LC104
 	.word	.LANCHOR1+574
 	.word	.LC1
 .LFE167:
@@ -18055,21 +18171,21 @@ FtlWrite:
 sftl_write:
 	.fnstart
 .LFB170:
-	.loc 3 1207 0
+	.loc 3 1209 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1539:
-	.loc 3 1208 0
+.LVL1557:
+	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1540:
+.LVL1558:
 	mov	r1, r0
-.LVL1541:
+.LVL1559:
 	movs	r0, #0
-.LVL1542:
+.LVL1560:
 	b	FtlWrite
-.LVL1543:
+.LVL1561:
 .LFE170:
 	.fnend
 	.size	sftl_write, .-sftl_write
@@ -18083,98 +18199,98 @@ sftl_write:
 FtlLoadSysInfo:
 	.fnstart
 .LFB224:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI195:
-	.loc 2 1368 0
+.LCFI196:
+	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1365 0
-	ldr	r4, .L1743
-	ldr	r3, [r4, #2244]
-	.loc 2 1368 0
+	.loc 2 1414 0
+	ldr	r4, .L1748
+	ldr	r3, [r4, #3240]
+	.loc 2 1417 0
 	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #2260]
-	.loc 2 1365 0
-	str	r3, [r4, #3232]
-	.loc 2 1366 0
+	ldr	r0, [r4, #2300]
+	.loc 2 1414 0
+	str	r3, [r4, #3228]
+	.loc 2 1415 0
 	ldr	r3, [r4, #3244]
-	.loc 2 1368 0
+	.loc 2 1417 0
 	lsls	r2, r2, #1
-	.loc 2 1366 0
-	str	r3, [r4, #3236]
-	.loc 2 1368 0
+	.loc 2 1415 0
+	str	r3, [r4, #3232]
+	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1544:
-	.loc 2 1369 0
-	ldrh	r0, [r4, #2556]
+.LVL1562:
+	.loc 2 1418 0
+	ldrh	r0, [r4, #2552]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1723
-.LVL1545:
-.L1731:
-	.loc 2 1370 0
+	bne	.L1728
+.LVL1563:
+.L1736:
+	.loc 2 1419 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1546:
-.L1723:
-	.loc 2 1381 0
-	ldr	r7, .L1743+4
-	.loc 2 1372 0
+.LVL1564:
+.L1728:
+	.loc 2 1430 0
+	ldr	r7, .L1748+4
+	.loc 2 1421 0
 	movs	r1, #1
-	.loc 2 1378 0
-	addw	r6, r4, #3224
-	.loc 2 1372 0
+	.loc 2 1427 0
+	addw	r6, r4, #3220
+	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1547:
+.LVL1565:
 	sxth	r5, r0
-.LVL1548:
-	.loc 2 1373 0
+.LVL1566:
+	.loc 2 1422 0
 	adds	r0, r0, #1
-	strh	r0, [r4, #2558]	@ movhi
-.L1725:
-	.loc 2 1375 0
+	strh	r0, [r4, #2554]	@ movhi
+.L1730:
+	.loc 2 1424 0
 	cmp	r5, #0
-	bge	.L1728
-	.loc 2 1388 0
-	movw	r2, #1388
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	bge	.L1733
+	.loc 2 1437 0
+	movw	r2, #1437
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1549:
-.L1727:
-	.loc 2 1390 0
+.LVL1567:
+.L1732:
+	.loc 2 1439 0
 	ldrh	r3, [r4, #16]
 	ldrh	r2, [r4, #86]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1730
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	movw	r2, #1390
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	bcs	.L1735
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	movw	r2, #1439
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1550:
-.L1730:
-	.loc 2 1392 0 is_stmt 1
+.LVL1568:
+.L1735:
+	.loc 2 1441 0 is_stmt 1
 	movs	r2, #48
-	ldr	r1, [r4, #3232]
-	ldr	r0, .L1743+16
+	ldr	r1, [r4, #3228]
+	ldr	r0, .L1748+16
 	bl	ftl_memcpy
-.LVL1551:
-	.loc 2 1393 0
+.LVL1569:
+	.loc 2 1442 0
 	ldrh	r2, [r4, #16]
-	ldr	r1, [r4, #3232]
-	ldr	r0, [r4, #2260]
+	ldr	r1, [r4, #3228]
+	ldr	r0, [r4, #2300]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	bl	ftl_memcpy
-.LVL1552:
-	.loc 2 1394 0
+.LVL1570:
+	.loc 2 1443 0
 	ldrh	r1, [r4, #16]
-	ldr	r3, [r4, #3232]
+	ldr	r3, [r4, #3228]
 	ldr	r0, [r4]
 	lsrs	r2, r1, #3
 	adds	r1, r1, #24
@@ -18183,252 +18299,252 @@ FtlLoadSysInfo:
 	bic	r1, r1, #3
 	add	r1, r1, r3
 	bl	ftl_memcpy
-.LVL1553:
-	.loc 2 1396 0
-	ldr	r2, [r4, #2504]
-	ldr	r3, .L1743+4
+.LVL1571:
+	.loc 2 1445 0
+	ldr	r2, [r4, #2244]
+	ldr	r3, .L1748+4
 	cmp	r2, r3
-	bne	.L1731
-	.loc 2 1400 0
-	ldrb	r2, [r4, #2514]	@ zero_extendqisi2
+	bne	.L1736
+	.loc 2 1449 0
+	ldrb	r2, [r4, #2254]	@ zero_extendqisi2
 	ldrh	r3, [r4, #30]
-	.loc 2 1399 0
-	ldrh	r5, [r4, #2512]
-.LVL1554:
-	.loc 2 1400 0
+	.loc 2 1448 0
+	ldrh	r5, [r4, #2252]
+.LVL1572:
+	.loc 2 1449 0
 	cmp	r2, r3
-	.loc 2 1399 0
-	strh	r5, [r4, #2562]	@ movhi
-	.loc 2 1400 0
-	bne	.L1731
-	.loc 2 1403 0
-	ldr	r3, .L1743+20
-	.loc 2 1405 0
+	.loc 2 1448 0
+	strh	r5, [r4, #2558]	@ movhi
+	.loc 2 1449 0
+	bne	.L1736
+	.loc 2 1452 0
+	ldr	r3, .L1748+20
+	.loc 2 1454 0
 	ldrh	r2, [r4, #34]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldr	r6, [r4, #20]
-	.loc 2 1403 0
+	.loc 2 1452 0
 	str	r5, [r3, #-216]
-	.loc 2 1404 0
+	.loc 2 1453 0
 	ldrh	r3, [r4, #78]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	r0, [r4, #134]
 	ldrh	r1, [r4, #8]
-	.loc 2 1404 0
+	.loc 2 1453 0
 	muls	r3, r5, r3
-	.loc 2 1406 0
+	.loc 2 1455 0
 	subs	r0, r6, r0
 	subs	r0, r0, r5
-	.loc 2 1404 0
-	str	r3, [r4, #2436]
-	.loc 2 1405 0
+	.loc 2 1453 0
+	str	r3, [r4, #2480]
+	.loc 2 1454 0
 	muls	r3, r2, r3
 	str	r3, [r4, #116]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	bl	__aeabi_uidiv
-.LVL1555:
-	.loc 2 1412 0
+.LVL1573:
+	.loc 2 1461 0
 	cmp	r5, r6
-	.loc 2 1406 0
-	strh	r0, [r4, #2552]	@ movhi
-	.loc 2 1412 0
-	bls	.L1732
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	movw	r2, #1412
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	.loc 2 1455 0
+	strh	r0, [r4, #2548]	@ movhi
+	.loc 2 1461 0
+	bls	.L1737
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	movw	r2, #1461
+	ldr	r1, .L1748+8
+	ldr	r0, .L1748+12
 	bl	printk
-.LVL1556:
-.L1732:
-	.loc 2 1415 0 is_stmt 1
-	ldrh	r3, [r4, #2520]
-	.loc 2 1414 0
-	ldrh	r1, [r4, #2518]
-	.loc 2 1415 0
+.LVL1574:
+.L1737:
+	.loc 2 1464 0 is_stmt 1
+	ldrh	r3, [r4, #2260]
+	.loc 2 1463 0
+	ldrh	r1, [r4, #2258]
+	.loc 2 1464 0
 	lsrs	r2, r3, #6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	r3, r3, #63
-	strb	r3, [r4, #2286]
-	.loc 2 1415 0
-	strh	r2, [r4, #2282]	@ movhi
-	.loc 2 1424 0
-	ldrh	r2, [r4, #2522]
-	.loc 2 1417 0
-	ldrb	r3, [r4, #2515]	@ zero_extendqisi2
-	.loc 2 1414 0
-	strh	r1, [r4, #2280]	@ movhi
-	.loc 2 1424 0
-	strh	r2, [r4, #2328]	@ movhi
-	.loc 2 1425 0
-	ldrh	r2, [r4, #2524]
-	.loc 2 1417 0
-	strb	r3, [r4, #2288]
-	.loc 2 1419 0
+	strb	r3, [r4, #2330]
+	.loc 2 1464 0
+	strh	r2, [r4, #2326]	@ movhi
+	.loc 2 1473 0
+	ldrh	r2, [r4, #2262]
+	.loc 2 1466 0
+	ldrb	r3, [r4, #2255]	@ zero_extendqisi2
+	.loc 2 1463 0
+	strh	r1, [r4, #2324]	@ movhi
+	.loc 2 1473 0
+	strh	r2, [r4, #2372]	@ movhi
+	.loc 2 1474 0
+	ldrh	r2, [r4, #2264]
+	.loc 2 1466 0
+	strb	r3, [r4, #2332]
+	.loc 2 1468 0
 	movw	r3, #65535
-	strh	r3, [r4, #2568]	@ movhi
-	.loc 2 1420 0
+	strh	r3, [r4, #2564]	@ movhi
+	.loc 2 1469 0
 	movs	r3, #0
-	strh	r3, [r4, #2570]	@ movhi
-	.loc 2 1425 0
+	strh	r3, [r4, #2566]	@ movhi
+	.loc 2 1474 0
 	lsrs	r0, r2, #6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2334]
-	.loc 2 1427 0
-	ldrb	r2, [r4, #2516]	@ zero_extendqisi2
-	.loc 2 1425 0
-	strh	r0, [r4, #2330]	@ movhi
-	.loc 2 1421 0
-	strb	r3, [r4, #2574]
-	.loc 2 1427 0
-	strb	r2, [r4, #2336]
-	.loc 2 1429 0
-	ldrh	r2, [r4, #2526]
-	.loc 2 1422 0
-	strb	r3, [r4, #2576]
-	.loc 2 1434 0
-	str	r3, [r4, #2460]
-	.loc 2 1429 0
-	strh	r2, [r4, #2376]	@ movhi
-	.loc 2 1430 0
-	ldrh	r2, [r4, #2528]
-	.loc 2 1435 0
-	str	r3, [r4, #2448]
-	.loc 2 1436 0
-	str	r3, [r4, #2440]
-	.loc 2 1437 0
-	str	r3, [r4, #2456]
-	.loc 2 1430 0
+	strb	r2, [r4, #2378]
+	.loc 2 1476 0
+	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
+	.loc 2 1474 0
+	strh	r0, [r4, #2374]	@ movhi
+	.loc 2 1470 0
+	strb	r3, [r4, #2570]
+	.loc 2 1476 0
+	strb	r2, [r4, #2380]
+	.loc 2 1478 0
+	ldrh	r2, [r4, #2266]
+	.loc 2 1471 0
+	strb	r3, [r4, #2572]
+	.loc 2 1483 0
+	str	r3, [r4, #2504]
+	.loc 2 1478 0
+	strh	r2, [r4, #2420]	@ movhi
+	.loc 2 1479 0
+	ldrh	r2, [r4, #2268]
+	.loc 2 1484 0
+	str	r3, [r4, #2492]
+	.loc 2 1485 0
+	str	r3, [r4, #2484]
+	.loc 2 1486 0
+	str	r3, [r4, #2500]
+	.loc 2 1479 0
 	lsrs	r0, r2, #6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2382]
-	.loc 2 1432 0
-	ldrb	r2, [r4, #2517]	@ zero_extendqisi2
-	.loc 2 1440 0
-	str	r3, [r4, #2484]
-	.loc 2 1430 0
-	strh	r0, [r4, #2378]	@ movhi
-	.loc 2 1432 0
-	strb	r2, [r4, #2384]
-	.loc 2 1439 0
-	ldr	r2, [r4, #2536]
-	str	r2, [r4, #2480]
-	.loc 2 1441 0
+	strb	r2, [r4, #2426]
+	.loc 2 1481 0
+	ldrb	r2, [r4, #2257]	@ zero_extendqisi2
+	.loc 2 1489 0
+	str	r3, [r4, #2528]
+	.loc 2 1479 0
+	strh	r0, [r4, #2422]	@ movhi
+	.loc 2 1481 0
+	strb	r2, [r4, #2428]
+	.loc 2 1488 0
+	ldr	r2, [r4, #2276]
+	str	r2, [r4, #2524]
+	.loc 2 1490 0
+	str	r3, [r4, #2540]
+	.loc 2 1493 0
+	ldr	r2, [r4, #2516]
+	.loc 2 1491 0
 	str	r3, [r4, #2496]
-	.loc 2 1444 0
-	ldr	r2, [r4, #2472]
-	.loc 2 1442 0
-	str	r3, [r4, #2452]
-	.loc 2 1444 0
-	ldr	r3, [r4, #2544]
+	.loc 2 1493 0
+	ldr	r3, [r4, #2284]
 	cmp	r3, r2
-	.loc 2 1447 0
-	ldr	r2, [r4, #2476]
-	.loc 2 1445 0
+	.loc 2 1496 0
+	ldr	r2, [r4, #2520]
+	.loc 2 1494 0
 	it	hi
-	strhi	r3, [r4, #2472]
-	.loc 2 1447 0
-	ldr	r3, [r4, #2540]
+	strhi	r3, [r4, #2516]
+	.loc 2 1496 0
+	ldr	r3, [r4, #2280]
 	cmp	r3, r2
-	.loc 2 1448 0
+	.loc 2 1497 0
 	it	hi
-	strhi	r3, [r4, #2476]
-	.loc 2 1450 0
+	strhi	r3, [r4, #2520]
+	.loc 2 1499 0
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L1735
-	.loc 2 1451 0
-	ldr	r0, .L1743+24
+	beq	.L1740
+	.loc 2 1500 0
+	ldr	r0, .L1748+24
 	bl	make_superblock
-.LVL1557:
-.L1735:
-	.loc 2 1453 0
-	ldrh	r2, [r4, #2328]
+.LVL1575:
+.L1740:
+	.loc 2 1502 0
+	ldrh	r2, [r4, #2372]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1736
-	.loc 2 1454 0
-	ldr	r0, .L1743+28
+	beq	.L1741
+	.loc 2 1503 0
+	ldr	r0, .L1748+28
 	bl	make_superblock
-.LVL1558:
-.L1736:
-	.loc 2 1456 0
-	ldrh	r2, [r4, #2376]
+.LVL1576:
+.L1741:
+	.loc 2 1505 0
+	ldrh	r2, [r4, #2420]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1737
-	.loc 2 1457 0
-	ldr	r0, .L1743+32
+	beq	.L1742
+	.loc 2 1506 0
+	ldr	r0, .L1748+32
 	bl	make_superblock
-.LVL1559:
-.L1737:
-	.loc 2 1459 0
-	ldrh	r2, [r4, #2568]
+.LVL1577:
+.L1742:
+	.loc 2 1508 0
+	ldrh	r2, [r4, #2564]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1738
-	.loc 2 1460 0
-	ldr	r0, .L1743+36
+	beq	.L1743
+	.loc 2 1509 0
+	ldr	r0, .L1748+36
 	bl	make_superblock
-.LVL1560:
-.L1738:
-	.loc 2 1462 0
+.LVL1578:
+.L1743:
+	.loc 2 1511 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1561:
-.L1728:
-	.loc 2 1376 0
-	ldrh	r3, [r4, #2556]
-	.loc 2 1378 0
+.LVL1579:
+.L1733:
+	.loc 2 1425 0
+	ldrh	r3, [r4, #2552]
+	.loc 2 1427 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r6
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	r3, r5, r3, lsl #10
+	str	r3, [r4, #3224]
+	.loc 2 1426 0
+	ldr	r3, [r4, #3240]
 	str	r3, [r4, #3228]
-	.loc 2 1377 0
-	ldr	r3, [r4, #2244]
-	str	r3, [r4, #3232]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	bl	FlashReadPages
-.LVL1562:
-	.loc 2 1381 0
-	ldr	r3, [r4, #3224]
+.LVL1580:
+	.loc 2 1430 0
+	ldr	r3, [r4, #3220]
 	adds	r3, r3, #1
-	beq	.L1726
-	.loc 2 1382 0 discriminator 1
-	ldr	r3, [r4, #2244]
-	.loc 2 1381 0 discriminator 1
+	beq	.L1731
+	.loc 2 1431 0 discriminator 1
+	ldr	r3, [r4, #3240]
+	.loc 2 1430 0 discriminator 1
 	ldr	r3, [r3]
 	cmp	r3, r7
-	bne	.L1726
-	.loc 2 1383 0
+	bne	.L1731
+	.loc 2 1432 0
 	ldr	r3, [r4, #3244]
 	ldrh	r2, [r3]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1727
-.L1726:
+	beq	.L1732
+.L1731:
 	subs	r5, r5, #1
-.LVL1563:
+.LVL1581:
 	sxth	r5, r5
-.LVL1564:
-	b	.L1725
-.L1744:
+.LVL1582:
+	b	.L1730
+.L1749:
 	.align	2
-.L1743:
+.L1748:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
-	.word	.LANCHOR0+2504
+	.word	.LANCHOR0+2244
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2280
-	.word	.LANCHOR0+2328
-	.word	.LANCHOR0+2376
-	.word	.LANCHOR0+2568
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2564
 .LFE224:
 	.fnend
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -18442,221 +18558,221 @@ FtlLoadSysInfo:
 FtlSysBlkInit:
 	.fnstart
 .LFB242:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI196:
-	.loc 2 2310 0
+.LCFI197:
+	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r4, .L1761
-	.loc 2 2312 0
+	ldr	r4, .L1766
+	.loc 2 2362 0
 	ldrh	r0, [r4, #12]
-	.loc 2 2310 0
+	.loc 2 2360 0
 	strh	r3, [r4, #3968]	@ movhi
-	.loc 2 2312 0
+	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1565:
-	.loc 2 2313 0
+.LVL1583:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1566:
-	.loc 2 2314 0
-	ldrh	r2, [r4, #2556]
+.LVL1584:
+	.loc 2 2364 0
+	ldrh	r2, [r4, #2552]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1746
-.L1748:
-	.loc 2 2315 0
+	bne	.L1751
+.L1753:
+	.loc 2 2365 0
 	mov	r5, #-1
-.L1745:
-	.loc 2 2398 0
+.L1750:
+	.loc 2 2448 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1746:
-	.loc 2 2317 0
+.L1751:
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1567:
+.LVL1585:
 	mov	r5, r0
 	cmp	r0, #0
-	bne	.L1748
-	.loc 2 2320 0
+	bne	.L1753
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1568:
-	.loc 2 2321 0
+.LVL1586:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1569:
-	.loc 2 2322 0
+.LVL1587:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1570:
-	.loc 2 2324 0
+.LVL1588:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1571:
-	.loc 2 2325 0
+.LVL1589:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1572:
-	.loc 2 2327 0
+.LVL1590:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1573:
-	.loc 2 2328 0
+.LVL1591:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1574:
-	.loc 2 2330 0
+.LVL1592:
+	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1575:
-.LBB522:
-.LBB523:
-	.loc 2 2332 0
+.LVL1593:
+.LBB546:
+.LBB547:
+	.loc 2 2382 0
 	ldrh	r1, [r4, #114]
 	mov	r3, r5
-.LVL1576:
-	.loc 2 2333 0
-	ldr	r2, [r4, #2424]
+.LVL1594:
+	.loc 2 2383 0
+	ldr	r2, [r4, #2468]
 	movs	r0, #12
-.L1749:
-	.loc 2 2332 0
+.L1754:
+	.loc 2 2382 0
 	cmp	r3, r1
-	bge	.L1754
-	.loc 2 2333 0
+	bge	.L1759
+	.loc 2 2383 0
 	mla	r6, r0, r3, r2
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	bge	.L1750
-.L1754:
-	.loc 2 2336 0
-	ldrh	r2, [r4, #2532]
-	.loc 2 2338 0
+	bge	.L1755
+.L1759:
+	.loc 2 2386 0
+	ldrh	r2, [r4, #2272]
+	.loc 2 2388 0
 	cmp	r3, r1
-	.loc 2 2336 0
+	.loc 2 2386 0
 	add	r2, r2, #1
-	strh	r2, [r4, #2532]	@ movhi
-	.loc 2 2338 0
-	bge	.L1760
-.L1751:
-	.loc 2 2339 0
-	ldr	r0, .L1761+4
+	strh	r2, [r4, #2272]	@ movhi
+	.loc 2 2388 0
+	bge	.L1765
+.L1756:
+	.loc 2 2389 0
+	ldr	r0, .L1766+4
 	bl	FtlSuperblockPowerLostFix
-.LVL1577:
-	.loc 2 2340 0
-	ldr	r0, .L1761+8
+.LVL1595:
+	.loc 2 2390 0
+	ldr	r0, .L1766+8
 	bl	FtlSuperblockPowerLostFix
-.LVL1578:
-.LBB524:
-	.loc 2 2346 0
-	ldrh	r1, [r4, #2280]
-	ldr	r2, [r4, #2260]
-	ldrh	r0, [r4, #2284]
+.LVL1596:
+.LBB548:
+	.loc 2 2396 0
+	ldrh	r1, [r4, #2324]
+	ldr	r2, [r4, #2300]
+	ldrh	r0, [r4, #2328]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2347 0
+	.loc 2 2397 0
 	ldrh	r3, [r4, #78]
-	.loc 2 2352 0
-	ldr	r1, [r4, #2260]
-	ldrh	r0, [r4, #2328]
-	.loc 2 2347 0
-	strh	r3, [r4, #2282]	@ movhi
-	.loc 2 2348 0
+	.loc 2 2402 0
+	ldr	r1, [r4, #2300]
+	ldrh	r0, [r4, #2372]
+	.loc 2 2397 0
+	strh	r3, [r4, #2326]	@ movhi
+	.loc 2 2398 0
 	movs	r3, #0
-	strb	r3, [r4, #2286]
-	.loc 2 2349 0
-	strh	r3, [r4, #2284]	@ movhi
-	.loc 2 2352 0
-	ldrh	r6, [r4, #2332]
+	strb	r3, [r4, #2330]
+	.loc 2 2399 0
+	strh	r3, [r4, #2328]	@ movhi
+	.loc 2 2402 0
+	ldrh	r6, [r4, #2376]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r6
 	strh	r2, [r1, r0, lsl #1]	@ movhi
-	.loc 2 2353 0
+	.loc 2 2403 0
 	ldrh	r2, [r4, #78]
-.LBE524:
-	.loc 2 2359 0
-	ldr	r0, .L1761+12
-.LBB525:
-	.loc 2 2354 0
-	strb	r3, [r4, #2334]
-	.loc 2 2353 0
-	strh	r2, [r4, #2330]	@ movhi
-	.loc 2 2355 0
-	strh	r3, [r4, #2332]	@ movhi
-.LBE525:
-	.loc 2 2359 0
+.LBE548:
+	.loc 2 2409 0
+	ldr	r0, .L1766+12
+.LBB549:
+	.loc 2 2404 0
+	strb	r3, [r4, #2378]
+	.loc 2 2403 0
+	strh	r2, [r4, #2374]	@ movhi
+	.loc 2 2405 0
+	strh	r3, [r4, #2376]	@ movhi
+.LBE549:
+	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1579:
-	.loc 2 2360 0
-	ldr	r0, .L1761+16
+.LVL1597:
+	.loc 2 2410 0
+	ldr	r0, .L1766+16
 	bl	FtlMapBlkWriteDump_data
-.LVL1580:
-	.loc 2 2372 0
-	ldrh	r3, [r4, #2534]
+.LVL1598:
+	.loc 2 2422 0
+	ldrh	r3, [r4, #2274]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2534]	@ movhi
-	.loc 2 2373 0
+	strh	r3, [r4, #2274]	@ movhi
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1581:
-	.loc 2 2374 0
+.LVL1599:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1582:
-	.loc 2 2375 0
+.LVL1600:
+	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1583:
-	b	.L1755
-.LVL1584:
-.L1750:
-	.loc 2 2332 0
+.LVL1601:
+	b	.L1760
+.LVL1602:
+.L1755:
+	.loc 2 2382 0
 	adds	r3, r3, #1
-	b	.L1749
-.L1760:
-	.loc 2 2338 0
+	b	.L1754
+.L1765:
+	.loc 2 2388 0
 	ldrh	r3, [r4, #3968]
-.LVL1585:
+.LVL1603:
 	cmp	r3, #0
-	bne	.L1751
-.L1755:
-	.loc 2 2379 0
-	ldrh	r0, [r4, #2280]
+	bne	.L1756
+.L1760:
+	.loc 2 2429 0
+	ldrh	r0, [r4, #2324]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1756
-	ldrh	r3, [r4, #2284]
-	cbnz	r3, .L1756
-	.loc 2 2380 0
-	ldrh	r3, [r4, #2332]
-	cbnz	r3, .L1756
-	.loc 2 2382 0
+	beq	.L1761
+	ldrh	r3, [r4, #2328]
+	cbnz	r3, .L1761
+	.loc 2 2430 0
+	ldrh	r3, [r4, #2376]
+	cbnz	r3, .L1761
+	.loc 2 2432 0
 	bl	FtlGcRefreshBlock
-.LVL1586:
-	.loc 2 2383 0
-	ldrh	r0, [r4, #2328]
+.LVL1604:
+	.loc 2 2433 0
+	ldrh	r0, [r4, #2372]
 	bl	FtlGcRefreshBlock
-.LVL1587:
-	.loc 2 2384 0
-	ldr	r0, .L1761+4
+.LVL1605:
+	.loc 2 2434 0
+	ldr	r0, .L1766+4
 	bl	allocate_new_data_superblock
-.LVL1588:
-	.loc 2 2385 0
-	ldr	r0, .L1761+8
+.LVL1606:
+	.loc 2 2435 0
+	ldr	r0, .L1766+8
 	bl	allocate_new_data_superblock
-.LVL1589:
-.L1756:
-	.loc 2 2390 0
-	ldrh	r3, [r4, #2532]
+.LVL1607:
+.L1761:
+	.loc 2 2440 0
+	ldrh	r3, [r4, #2272]
 	lsls	r3, r3, #27
-	bne	.L1745
-	.loc 2 2391 0
+	bne	.L1750
+	.loc 2 2441 0
 	bl	FtlVpcCheckAndModify
-.LVL1590:
-	b	.L1745
-.L1762:
+.LVL1608:
+	b	.L1750
+.L1767:
 	.align	2
-.L1761:
+.L1766:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2280
-	.word	.LANCHOR0+2328
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
 	.word	.LANCHOR0+3864
 	.word	.LANCHOR0+3908
-.LBE523:
-.LBE522:
+.LBE547:
+.LBE546:
 .LFE242:
 	.fnend
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -18675,66 +18791,66 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI197:
+.LCFI198:
 	.loc 3 629 0
 	movs	r3, #0
-	ldr	r4, .L1787
+	ldr	r4, .L1792
 	.loc 3 631 0
 	ldrh	r0, [r4, #12]
 	.loc 3 629 0
-	str	r3, [r4, #2472]
+	str	r3, [r4, #2516]
 	.loc 3 630 0
-	str	r3, [r4, #2476]
+	str	r3, [r4, #2520]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1591:
+.LVL1609:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1592:
-	cbz	r0, .L1764
+.LVL1610:
+	cbz	r0, .L1769
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL1593:
-.L1764:
+.LVL1611:
+.L1769:
 	.loc 3 637 0 discriminator 1
-	ldr	r0, .L1787+4
+	ldr	r0, .L1792+4
 	.loc 3 623 0 discriminator 1
 	movs	r2, #0
-.L1765:
+.L1770:
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r4, #34]
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1766
+	blt	.L1771
 	.loc 3 642 0
 	ldrh	r6, [r4, #16]
 	.loc 3 641 0
 	movs	r5, #0
-.LVL1594:
-.L1767:
+.LVL1612:
+.L1772:
 	.loc 3 642 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r6
-	bhi	.L1768
+	bhi	.L1773
 	.loc 3 645 0
 	ldrh	r1, [r4, #8]
 	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1769
-.L1773:
+	bge	.L1774
+.L1778:
 	.loc 3 641 0
 	movs	r5, #0
-.LVL1595:
+.LVL1613:
 	mov	r6, r5
-.LVL1596:
-.L1770:
+.LVL1614:
+.L1775:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r4, #16]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1774
+	bhi	.L1779
 	.loc 3 658 0
 	ldrh	r3, [r4, #18]
 	.loc 3 661 0
@@ -18746,7 +18862,7 @@ ftl_low_format:
 	mov	r1, r5
 	mov	r0, r9
 	bl	__aeabi_uidiv
-.LVL1597:
+.LVL1615:
 	.loc 3 662 0
 	ubfx	r7, r0, #5, #16
 	.loc 3 661 0
@@ -18754,32 +18870,32 @@ ftl_low_format:
 	.loc 3 662 0
 	add	r3, r7, #36
 	.loc 3 661 0
-	str	r0, [r4, #2436]
+	str	r0, [r4, #2480]
 	.loc 3 662 0
-	strh	r3, [r4, #2552]	@ movhi
+	strh	r3, [r4, #2548]	@ movhi
 	.loc 3 663 0
 	movs	r3, #24
 	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1775
+	ble	.L1780
 	.loc 3 664 0
 	mov	r1, r5
 	sub	r0, r9, r6
 	bl	__aeabi_uidiv
-.LVL1598:
-	str	r0, [r4, #2436]
+.LVL1616:
+	str	r0, [r4, #2480]
 	.loc 3 665 0
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
-	strh	r0, [r4, #2552]	@ movhi
-.L1775:
+	strh	r0, [r4, #2548]	@ movhi
+.L1780:
 	.loc 3 668 0
 	ldrh	r3, [r4, #70]
-	cbz	r3, .L1777
+	cbz	r3, .L1782
 	.loc 3 669 0
-	ldrh	r2, [r4, #2552]
+	ldrh	r2, [r4, #2548]
 	add	r2, r2, r3, lsr #1
-	strh	r2, [r4, #2552]	@ movhi
+	strh	r2, [r4, #2548]	@ movhi
 	.loc 3 670 0
 	mul	r2, r5, r3
 	cmp	r6, r2
@@ -18787,19 +18903,19 @@ ftl_low_format:
 	itttt	lt
 	addlt	r3, r3, #32
 	.loc 3 671 0
-	strlt	r8, [r4, #2436]
+	strlt	r8, [r4, #2480]
 	.loc 3 672 0
 	addlt	r3, r3, r7
-	strhlt	r3, [r4, #2552]	@ movhi
-.L1777:
+	strhlt	r3, [r4, #2548]	@ movhi
+.L1782:
 	.loc 3 677 0
-	ldrh	r2, [r4, #2552]
+	ldrh	r2, [r4, #2548]
 	.loc 3 689 0
 	movw	r6, #65535
-.LVL1599:
+.LVL1617:
 	.loc 3 677 0
-	ldr	r3, [r4, #2436]
-	ldr	r7, .L1787+8
+	ldr	r3, [r4, #2480]
+	ldr	r7, .L1792+8
 	subs	r3, r3, r2
 	muls	r5, r3, r5
 	.loc 3 678 0
@@ -18811,76 +18927,76 @@ ftl_low_format:
 	.loc 3 679 0
 	ldrh	r3, [r4, #34]
 	.loc 3 678 0
-	str	r5, [r4, #2436]
+	str	r5, [r4, #2480]
 	.loc 3 679 0
 	muls	r5, r3, r5
 	str	r5, [r4, #116]
 	mov	r5, r7
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL1600:
+.LVL1618:
 	.loc 3 687 0
 	ldrh	r2, [r4, #18]
 	movs	r1, #0
-	ldr	r0, [r4, #2260]
+	ldr	r0, [r4, #2300]
 	.loc 3 701 0
-	ldr	r7, .L1787+12
+	ldr	r7, .L1792+12
 	.loc 3 687 0
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1601:
+.LVL1619:
 	.loc 3 698 0
 	ldrh	r2, [r4, #16]
 	.loc 3 688 0
 	movs	r3, #0
-	str	r3, [r4, #2432]
+	str	r3, [r4, #2476]
 	.loc 3 698 0
 	movs	r1, #255
 	.loc 3 690 0
-	strh	r3, [r4, #2570]	@ movhi
+	strh	r3, [r4, #2566]	@ movhi
 	.loc 3 691 0
-	strb	r3, [r4, #2574]
+	strb	r3, [r4, #2570]
 	.loc 3 692 0
-	strb	r3, [r4, #2576]
+	strb	r3, [r4, #2572]
 	.loc 3 698 0
 	lsrs	r2, r2, #3
 	.loc 3 694 0
-	strh	r3, [r4, #2282]	@ movhi
+	strh	r3, [r4, #2326]	@ movhi
 	.loc 3 695 0
-	strb	r3, [r4, #2286]
+	strb	r3, [r4, #2330]
 	.loc 3 696 0
-	strh	r3, [r4, #2280]	@ movhi
+	strh	r3, [r4, #2324]	@ movhi
 	.loc 3 697 0
 	movs	r3, #1
 	.loc 3 698 0
 	ldr	r0, [r4]
 	.loc 3 689 0
-	strh	r6, [r4, #2568]	@ movhi
+	strh	r6, [r4, #2564]	@ movhi
 	.loc 3 697 0
-	strb	r3, [r4, #2288]
+	strb	r3, [r4, #2332]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL1602:
-.L1779:
+.LVL1620:
+.L1784:
 	.loc 3 701 0
 	mov	r0, r7
 	bl	make_superblock
-.LVL1603:
+.LVL1621:
 	.loc 3 702 0
-	ldrb	r3, [r4, #2287]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2280]
+	ldrb	r3, [r4, #2331]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2324]
 	cmp	r3, #0
-	bne	.L1780
+	bne	.L1785
 	.loc 3 705 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	.loc 3 706 0
-	ldrh	r3, [r4, #2280]
+	ldrh	r3, [r4, #2324]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2280]	@ movhi
+	strh	r3, [r4, #2324]	@ movhi
 	.loc 3 707 0
-	b	.L1779
-.L1766:
+	b	.L1784
+.L1771:
 	.loc 3 636 0 discriminator 3
 	ldr	r5, [r4, #3776]
 	mvns	r1, r3
@@ -18889,46 +19005,46 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 3
 	ldr	r1, [r4, #3768]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1765
-.LVL1604:
-.L1768:
+	b	.L1770
+.LVL1622:
+.L1773:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL1605:
+.LVL1623:
 	.loc 3 642 0 discriminator 3
 	adds	r6, r6, #1
 	.loc 3 643 0 discriminator 3
 	add	r5, r5, r0
-.LVL1606:
+.LVL1624:
 	uxth	r5, r5
-.LVL1607:
+.LVL1625:
 	.loc 3 642 0 discriminator 3
 	uxth	r6, r6
-	b	.L1767
-.L1769:
+	b	.L1772
+.L1774:
 	.loc 3 647 0
 	mov	r0, r5
 	bl	__aeabi_uidiv
-.LVL1608:
+.LVL1626:
 	ldr	r3, [r4, #108]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL1609:
+.LVL1627:
 	.loc 3 648 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1610:
+.LVL1628:
 	.loc 3 650 0
 	ldrh	r5, [r4, #16]
-.LVL1611:
-.L1771:
+.LVL1629:
+.L1776:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r5
-	bls	.L1773
+	bls	.L1778
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r5
 	movs	r1, #1
@@ -18936,127 +19052,127 @@ ftl_low_format:
 	adds	r5, r5, #1
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1612:
+.LVL1630:
 	.loc 3 650 0 discriminator 3
 	uxth	r5, r5
-	b	.L1771
-.LVL1613:
-.L1774:
+	b	.L1776
+.LVL1631:
+.L1779:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL1614:
+.LVL1632:
 	add	r6, r6, r0
-.LVL1615:
+.LVL1633:
 	uxth	r6, r6
-.LVL1616:
-	b	.L1770
-.LVL1617:
-.L1780:
+.LVL1634:
+	b	.L1775
+.LVL1635:
+.L1785:
 	.loc 3 709 0
-	ldr	r3, [r4, #2472]
+	ldr	r3, [r4, #2516]
 	.loc 3 721 0
 	movw	r6, #65535
 	.loc 3 710 0
-	ldrh	r1, [r4, #2284]
+	ldrh	r1, [r4, #2328]
 	.loc 3 717 0
-	ldr	r7, .L1787+16
+	ldr	r7, .L1792+16
 	.loc 3 709 0
-	str	r3, [r4, #2292]
+	str	r3, [r4, #2336]
 	adds	r3, r3, #1
-	str	r3, [r4, #2472]
+	str	r3, [r4, #2516]
 	.loc 3 710 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 712 0
 	movs	r3, #0
-	strh	r3, [r4, #2330]	@ movhi
+	strh	r3, [r4, #2374]	@ movhi
 	.loc 3 713 0
-	strb	r3, [r4, #2334]
+	strb	r3, [r4, #2378]
 	.loc 3 714 0
-	ldrh	r3, [r4, #2280]
+	ldrh	r3, [r4, #2324]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2328]	@ movhi
+	strh	r3, [r4, #2372]	@ movhi
 	.loc 3 715 0
 	movs	r3, #1
-	strb	r3, [r4, #2336]
-.L1781:
+	strb	r3, [r4, #2380]
+.L1786:
 	.loc 3 717 0
 	mov	r0, r7
 	bl	make_superblock
-.LVL1618:
+.LVL1636:
 	.loc 3 718 0
-	ldrb	r3, [r4, #2335]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2328]
-	cbnz	r3, .L1782
+	ldrb	r3, [r4, #2379]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2372]
+	cbnz	r3, .L1787
 	.loc 3 721 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	.loc 3 722 0
-	ldrh	r3, [r4, #2328]
+	ldrh	r3, [r4, #2372]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2328]	@ movhi
+	strh	r3, [r4, #2372]	@ movhi
 	.loc 3 723 0
-	b	.L1781
-.L1782:
+	b	.L1786
+.L1787:
 	.loc 3 725 0
-	ldr	r3, [r4, #2472]
+	ldr	r3, [r4, #2516]
 	.loc 3 727 0
 	movw	r6, #65535
 	.loc 3 726 0
-	ldrh	r1, [r4, #2332]
+	ldrh	r1, [r4, #2376]
 	.loc 3 725 0
-	str	r3, [r4, #2340]
+	str	r3, [r4, #2384]
 	adds	r3, r3, #1
-	str	r3, [r4, #2472]
+	str	r3, [r4, #2516]
 	.loc 3 726 0
-	ldr	r3, [r4, #2260]
+	ldr	r3, [r4, #2300]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	strh	r6, [r4, #2376]	@ movhi
+	strh	r6, [r4, #2420]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1619:
+.LVL1637:
 	.loc 3 731 0
 	movs	r3, #0
 	.loc 3 730 0
-	strh	r0, [r4, #2556]	@ movhi
+	strh	r0, [r4, #2552]	@ movhi
 	.loc 3 731 0
-	strh	r3, [r4, #2558]	@ movhi
+	strh	r3, [r4, #2554]	@ movhi
 	.loc 3 733 0
 	ldr	r3, [r5, #-216]
 	.loc 3 732 0
-	strh	r6, [r4, #2560]	@ movhi
+	strh	r6, [r4, #2556]	@ movhi
 	.loc 3 733 0
-	strh	r3, [r4, #2562]	@ movhi
+	strh	r3, [r4, #2558]	@ movhi
 	.loc 3 734 0
-	ldr	r3, [r4, #2472]
-	str	r3, [r4, #2564]
+	ldr	r3, [r4, #2516]
+	str	r3, [r4, #2560]
 	adds	r3, r3, #1
-	str	r3, [r4, #2472]
+	str	r3, [r4, #2516]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL1620:
+.LVL1638:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL1621:
-	cbnz	r0, .L1783
+.LVL1639:
+	cbnz	r0, .L1788
 	.loc 3 737 0
-	ldr	r3, .L1787+20
+	ldr	r3, .L1792+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1783:
+.L1788:
 	.loc 3 739 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1788:
+.L1793:
 	.align	2
-.L1787:
+.L1792:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2280
-	.word	.LANCHOR0+2328
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2372
 	.word	.LANCHOR2
 .LFE160:
 	.fnend
@@ -19076,68 +19192,68 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI198:
+.LCFI199:
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r5, .L1795
+	ldr	r5, .L1800
 	.loc 3 753 0
-	ldr	r4, .L1795+4
+	ldr	r4, .L1800+4
 	.loc 3 749 0
-	ldr	r1, .L1795+8
-	ldr	r0, .L1795+12
+	ldr	r1, .L1800+8
+	ldr	r0, .L1800+12
 	.loc 3 746 0
 	str	r3, [r5]
 	.loc 3 749 0
 	bl	printk
-.LVL1622:
+.LVL1640:
 	.loc 3 750 0
-	ldr	r0, .L1795+16
+	ldr	r0, .L1800+16
 	bl	FtlConstantsInit
-.LVL1623:
+.LVL1641:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL1624:
+.LVL1642:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL1625:
+.LVL1643:
 	.loc 3 753 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1626:
+.LVL1644:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL1627:
-	cbnz	r0, .L1793
+.LVL1645:
+	cbnz	r0, .L1798
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL1628:
-	cbnz	r0, .L1793
+.LVL1646:
+	cbnz	r0, .L1798
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r5]
 	.loc 3 783 0
-	ldrh	r3, [r4, #2276]
+	ldrh	r3, [r4, #2320]
 	cmp	r3, #15
-	bhi	.L1793
+	bhi	.L1798
 	movw	r4, #8129
-.L1792:
-.LBB526:
+.L1797:
+.LBB550:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1629:
+.LVL1647:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-	bne	.L1792
-.L1793:
-.LBE526:
+	bne	.L1797
+.L1798:
+.LBE550:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1796:
+.L1801:
 	.align	2
-.L1795:
+.L1800:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LC70
@@ -19160,10 +19276,10 @@ ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1630:
+.LVL1648:
 	.loc 1 212 0
 	b	memcmp
-.LVL1631:
+.LVL1649:
 .LFE279:
 	.fnend
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -19315,141 +19431,141 @@ ftl_memcmp:
 	.global	c_ftl_nand_type
 	.section	.rodata
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6674, %object
-	.size	__func__.6674, 17
-__func__.6674:
+	.type	__func__.6616, %object
+	.size	__func__.6616, 17
+__func__.6616:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6669, %object
-	.size	__func__.6669, 17
-__func__.6669:
+	.type	__func__.6611, %object
+	.size	__func__.6611, 17
+__func__.6611:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6704, %object
-	.size	__func__.6704, 17
-__func__.6704:
+	.type	__func__.6647, %object
+	.size	__func__.6647, 17
+__func__.6647:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6736, %object
-	.size	__func__.6736, 22
-__func__.6736:
+	.type	__func__.6679, %object
+	.size	__func__.6679, 22
+__func__.6679:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6777, %object
-	.size	__func__.6777, 26
-__func__.6777:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6841, %object
-	.size	__func__.6841, 22
-__func__.6841:
+	.type	__func__.6785, %object
+	.size	__func__.6785, 22
+__func__.6785:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7164, %object
-	.size	__func__.7164, 16
-__func__.7164:
+	.type	__func__.7108, %object
+	.size	__func__.7108, 16
+__func__.7108:
 	.ascii	"make_superblock\000"
-	.type	__func__.7338, %object
-	.size	__func__.7338, 19
-__func__.7338:
+	.type	__func__.7283, %object
+	.size	__func__.7283, 19
+__func__.7283:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.7578, %object
-	.size	__func__.7578, 15
-__func__.7578:
+	.type	__func__.7523, %object
+	.size	__func__.7523, 15
+__func__.7523:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.7595, %object
-	.size	__func__.7595, 15
-__func__.7595:
+	.type	__func__.7540, %object
+	.size	__func__.7540, 15
+__func__.7540:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6287, %object
-	.size	__func__.6287, 11
-__func__.6287:
+	.type	__func__.6721, %object
+	.size	__func__.6721, 26
+__func__.6721:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.type	__func__.6235, %object
+	.size	__func__.6235, 11
+__func__.6235:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6503, %object
-	.size	__func__.6503, 14
-__func__.6503:
+	.type	__func__.6451, %object
+	.size	__func__.6451, 14
+__func__.6451:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6745, %object
-	.size	__func__.6745, 16
-__func__.6745:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 16
+__func__.6688:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6802, %object
-	.size	__func__.6802, 31
-__func__.6802:
+	.type	__func__.6746, %object
+	.size	__func__.6746, 31
+__func__.6746:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6816, %object
-	.size	__func__.6816, 16
-__func__.6816:
+	.type	__func__.6760, %object
+	.size	__func__.6760, 16
+__func__.6760:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6788, %object
-	.size	__func__.6788, 15
-__func__.6788:
+	.type	__func__.6732, %object
+	.size	__func__.6732, 15
+__func__.6732:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6858, %object
-	.size	__func__.6858, 9
-__func__.6858:
+	.type	__func__.6802, %object
+	.size	__func__.6802, 9
+__func__.6802:
 	.ascii	"log2phys\000"
-	.type	__func__.7073, %object
-	.size	__func__.7073, 16
-__func__.7073:
+	.type	__func__.7017, %object
+	.size	__func__.7017, 16
+__func__.7017:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7226, %object
-	.size	__func__.7226, 14
-__func__.7226:
+	.type	__func__.7170, %object
+	.size	__func__.7170, 14
+__func__.7170:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6953, %object
-	.size	__func__.6953, 14
-__func__.6953:
+	.type	__func__.6897, %object
+	.size	__func__.6897, 14
+__func__.6897:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7185, %object
-	.size	__func__.7185, 18
-__func__.7185:
+	.type	__func__.7129, %object
+	.size	__func__.7129, 18
+__func__.7129:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7310, %object
-	.size	__func__.7310, 25
-__func__.7310:
+	.type	__func__.7255, %object
+	.size	__func__.7255, 25
+__func__.7255:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7351, %object
-	.size	__func__.7351, 16
-__func__.7351:
+	.type	__func__.7296, %object
+	.size	__func__.7296, 16
+__func__.7296:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7358, %object
-	.size	__func__.7358, 20
-__func__.7358:
+	.type	__func__.7303, %object
+	.size	__func__.7303, 20
+__func__.7303:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7107, %object
-	.size	__func__.7107, 22
-__func__.7107:
+	.type	__func__.7051, %object
+	.size	__func__.7051, 22
+__func__.7051:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6546, %object
-	.size	__func__.6546, 11
-__func__.6546:
+	.type	__func__.6494, %object
+	.size	__func__.6494, 11
+__func__.6494:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6931, %object
-	.size	__func__.6931, 15
-__func__.6931:
+	.type	__func__.6875, %object
+	.size	__func__.6875, 15
+__func__.6875:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7210, %object
-	.size	__func__.7210, 21
-__func__.7210:
+	.type	__func__.7154, %object
+	.size	__func__.7154, 21
+__func__.7154:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7331, %object
-	.size	__func__.7331, 29
-__func__.7331:
+	.type	__func__.7276, %object
+	.size	__func__.7276, 29
+__func__.7276:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6411, %object
-	.size	__func__.6411, 13
-__func__.6411:
+	.type	__func__.6359, %object
+	.size	__func__.6359, 13
+__func__.6359:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7428, %object
-	.size	__func__.7428, 19
-__func__.7428:
+	.type	__func__.7373, %object
+	.size	__func__.7373, 19
+__func__.7373:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7534, %object
-	.size	__func__.7534, 23
-__func__.7534:
+	.type	__func__.7479, %object
+	.size	__func__.7479, 23
+__func__.7479:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6439, %object
-	.size	__func__.6439, 9
-__func__.6439:
+	.type	__func__.6387, %object
+	.size	__func__.6387, 9
+__func__.6387:
 	.ascii	"FtlWrite\000"
-	.type	__func__.7010, %object
-	.size	__func__.7010, 15
-__func__.7010:
+	.type	__func__.6954, %object
+	.size	__func__.6954, 15
+__func__.6954:
 	.ascii	"FtlLoadSysInfo\000"
 	.data
 	.align	2
@@ -19626,14 +19742,10 @@ gBbtInfo:
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.space	2056
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
-	.space	4
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
-	.space	4
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
@@ -19645,6 +19757,10 @@ p_data_block_list_head:
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
+	.space	4
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
 	.space	4
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
@@ -19760,10 +19876,6 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -19867,6 +19979,10 @@ g_gc_bad_block_gc_index:
 	.size	req_sys, 20
 req_sys:
 	.space	20
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -20217,7 +20333,7 @@ check_vpc_table:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 .LC70:
-	.ascii	"SFTL version: 5.0.43 20180116\000"
+	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
 .LC72:
@@ -20234,53 +20350,60 @@ check_vpc_table:
 .LC77:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 .LC78:
-	.ascii	"%s error allocating memory. return -1\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
 .LC79:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 .LC80:
-	.ascii	"spare:\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC81:
-	.ascii	"map_ppn:\000"
+	.ascii	"%s error allocating memory. return -1\012\000"
 .LC82:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC83:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"spare:\000"
 .LC84:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"map_ppn:\000"
 .LC85:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC86:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+.LC87:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC88:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC89:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC87:
+.LC90:
 	.ascii	"...%s enter...\012\000"
-.LC88:
+.LC91:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC89:
+.LC92:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC90:
+.LC93:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC91:
+.LC94:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC92:
+.LC95:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC93:
+.LC96:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC94:
+.LC97:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC95:
+.LC98:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC96:
+.LC99:
 	.ascii	"no ect\000"
-.LC97:
+.LC100:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC98:
+.LC101:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC99:
+.LC102:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC100:
+.LC103:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC101:
+.LC104:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.debug_frame,"",%progbits
 .Lframe0:
@@ -20600,16 +20723,12 @@ check_vpc_table:
 	.byte	0x4
 	.4byte	.LCFI10-.LFB191
 	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.uleb128 0x10
 	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
 	.uleb128 0x4
-	.byte	0x86
+	.byte	0x85
 	.uleb128 0x3
-	.byte	0x87
+	.byte	0x86
 	.uleb128 0x2
 	.byte	0x8e
 	.uleb128 0x1
@@ -20636,14 +20755,6 @@ check_vpc_table:
 .LSFDE44:
 	.4byte	.LEFDE44-.LASFDE44
 .LASFDE44:
-	.4byte	.Lframe0
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
-	.align	2
-.LEFDE44:
-.LSFDE46:
-	.4byte	.LEFDE46-.LASFDE46
-.LASFDE46:
 	.4byte	.Lframe0
 	.4byte	.LFB196
 	.4byte	.LFE196-.LFB196
@@ -20678,10 +20789,10 @@ check_vpc_table:
 	.4byte	.LCFI14-.LCFI13
 	.byte	0xb
 	.align	2
-.LEFDE46:
-.LSFDE48:
-	.4byte	.LEFDE48-.LASFDE48
-.LASFDE48:
+.LEFDE44:
+.LSFDE46:
+	.4byte	.LEFDE46-.LASFDE46
+.LASFDE46:
 	.4byte	.Lframe0
 	.4byte	.LFB195
 	.4byte	.LFE195-.LFB195
@@ -20704,10 +20815,10 @@ check_vpc_table:
 	.4byte	.LCFI17-.LCFI16
 	.byte	0xb
 	.align	2
-.LEFDE48:
-.LSFDE50:
-	.4byte	.LEFDE50-.LASFDE50
-.LASFDE50:
+.LEFDE46:
+.LSFDE48:
+	.4byte	.LEFDE48-.LASFDE48
+.LASFDE48:
 	.4byte	.Lframe0
 	.4byte	.LFB197
 	.4byte	.LFE197-.LFB197
@@ -20732,10 +20843,10 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE50:
-.LSFDE52:
-	.4byte	.LEFDE52-.LASFDE52
-.LASFDE52:
+.LEFDE48:
+.LSFDE50:
+	.4byte	.LEFDE50-.LASFDE50
+.LASFDE50:
 	.4byte	.Lframe0
 	.4byte	.LFB194
 	.4byte	.LFE194-.LFB194
@@ -20758,10 +20869,10 @@ check_vpc_table:
 	.4byte	.LCFI21-.LCFI20
 	.byte	0xb
 	.align	2
-.LEFDE52:
-.LSFDE54:
-	.4byte	.LEFDE54-.LASFDE54
-.LASFDE54:
+.LEFDE50:
+.LSFDE52:
+	.4byte	.LEFDE52-.LASFDE52
+.LASFDE52:
 	.4byte	.Lframe0
 	.4byte	.LFB198
 	.4byte	.LFE198-.LFB198
@@ -20782,10 +20893,10 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE54:
-.LSFDE56:
-	.4byte	.LEFDE56-.LASFDE56
-.LASFDE56:
+.LEFDE52:
+.LSFDE54:
+	.4byte	.LEFDE54-.LASFDE54
+.LASFDE54:
 	.4byte	.Lframe0
 	.4byte	.LFB199
 	.4byte	.LFE199-.LFB199
@@ -20802,18 +20913,18 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE56:
-.LSFDE58:
-	.4byte	.LEFDE58-.LASFDE58
-.LASFDE58:
+.LEFDE54:
+.LSFDE56:
+	.4byte	.LEFDE56-.LASFDE56
+.LASFDE56:
 	.4byte	.Lframe0
 	.4byte	.LFB200
 	.4byte	.LFE200-.LFB200
 	.align	2
-.LEFDE58:
-.LSFDE60:
-	.4byte	.LEFDE60-.LASFDE60
-.LASFDE60:
+.LEFDE56:
+.LSFDE58:
+	.4byte	.LEFDE58-.LASFDE58
+.LASFDE58:
 	.4byte	.Lframe0
 	.4byte	.LFB201
 	.4byte	.LFE201-.LFB201
@@ -20826,63 +20937,43 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE60:
-.LSFDE62:
-	.4byte	.LEFDE62-.LASFDE62
-.LASFDE62:
+.LEFDE58:
+.LSFDE60:
+	.4byte	.LEFDE60-.LASFDE60
+.LASFDE60:
 	.4byte	.Lframe0
 	.4byte	.LFB202
 	.4byte	.LFE202-.LFB202
 	.byte	0x4
 	.4byte	.LCFI25-.LFB202
 	.byte	0xe
-	.uleb128 0x18
+	.uleb128 0x20
 	.byte	0x83
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE62:
-.LSFDE64:
-	.4byte	.LEFDE64-.LASFDE64
-.LASFDE64:
-	.4byte	.Lframe0
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.byte	0x4
-	.4byte	.LCFI26-.LFB205
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
 	.uleb128 0x6
-	.byte	0x84
+	.byte	0x86
 	.uleb128 0x5
-	.byte	0x85
+	.byte	0x87
 	.uleb128 0x4
-	.byte	0x86
+	.byte	0x88
 	.uleb128 0x3
-	.byte	0x87
+	.byte	0x89
 	.uleb128 0x2
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE64:
-.LSFDE66:
-	.4byte	.LEFDE66-.LASFDE66
-.LASFDE66:
+.LEFDE60:
+.LSFDE62:
+	.4byte	.LEFDE62-.LASFDE62
+.LASFDE62:
 	.4byte	.Lframe0
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.byte	0x4
-	.4byte	.LCFI27-.LFB210
+	.4byte	.LCFI26-.LFB210
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x83
@@ -20898,15 +20989,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE66:
-.LSFDE68:
-	.4byte	.LEFDE68-.LASFDE68
-.LASFDE68:
+.LEFDE62:
+.LSFDE64:
+	.4byte	.LEFDE64-.LASFDE64
+.LASFDE64:
 	.4byte	.Lframe0
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
 	.byte	0x4
-	.4byte	.LCFI28-.LFB216
+	.4byte	.LCFI27-.LFB216
 	.byte	0xe
 	.uleb128 0xc
 	.byte	0x84
@@ -20916,31 +21007,31 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE68:
-.LSFDE70:
-	.4byte	.LEFDE70-.LASFDE70
-.LASFDE70:
+.LEFDE64:
+.LSFDE66:
+	.4byte	.LEFDE66-.LASFDE66
+.LASFDE66:
 	.4byte	.Lframe0
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
 	.align	2
-.LEFDE70:
-.LSFDE72:
-	.4byte	.LEFDE72-.LASFDE72
-.LASFDE72:
+.LEFDE66:
+.LSFDE68:
+	.4byte	.LEFDE68-.LASFDE68
+.LASFDE68:
 	.4byte	.Lframe0
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.align	2
-.LEFDE72:
-.LSFDE74:
-	.4byte	.LEFDE74-.LASFDE74
-.LASFDE74:
+.LEFDE68:
+.LSFDE70:
+	.4byte	.LEFDE70-.LASFDE70
+.LASFDE70:
 	.4byte	.Lframe0
 	.4byte	.LFB229
 	.4byte	.LFE229-.LFB229
 	.byte	0x4
-	.4byte	.LCFI29-.LFB229
+	.4byte	.LCFI28-.LFB229
 	.byte	0xe
 	.uleb128 0x14
 	.byte	0x84
@@ -20954,15 +21045,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE74:
-.LSFDE76:
-	.4byte	.LEFDE76-.LASFDE76
-.LASFDE76:
+.LEFDE70:
+.LSFDE72:
+	.4byte	.LEFDE72-.LASFDE72
+.LASFDE72:
 	.4byte	.Lframe0
 	.4byte	.LFB232
 	.4byte	.LFE232-.LFB232
 	.byte	0x4
-	.4byte	.LCFI30-.LFB232
+	.4byte	.LCFI29-.LFB232
 	.byte	0xe
 	.uleb128 0xc
 	.byte	0x84
@@ -20972,15 +21063,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE76:
-.LSFDE78:
-	.4byte	.LEFDE78-.LASFDE78
-.LASFDE78:
+.LEFDE72:
+.LSFDE74:
+	.4byte	.LEFDE74-.LASFDE74
+.LASFDE74:
 	.4byte	.Lframe0
 	.4byte	.LFB234
 	.4byte	.LFE234-.LFB234
 	.byte	0x4
-	.4byte	.LCFI31-.LFB234
+	.4byte	.LCFI30-.LFB234
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x83
@@ -21004,15 +21095,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE78:
-.LSFDE80:
-	.4byte	.LEFDE80-.LASFDE80
-.LASFDE80:
+.LEFDE74:
+.LSFDE76:
+	.4byte	.LEFDE76-.LASFDE76
+.LASFDE76:
 	.4byte	.Lframe0
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.byte	0x4
-	.4byte	.LCFI32-.LFB243
+	.4byte	.LCFI31-.LFB243
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21032,23 +21123,23 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE80:
-.LSFDE82:
-	.4byte	.LEFDE82-.LASFDE82
-.LASFDE82:
+.LEFDE76:
+.LSFDE78:
+	.4byte	.LEFDE78-.LASFDE78
+.LASFDE78:
 	.4byte	.Lframe0
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.align	2
-.LEFDE82:
-.LSFDE84:
-	.4byte	.LEFDE84-.LASFDE84
-.LASFDE84:
+.LEFDE78:
+.LSFDE80:
+	.4byte	.LEFDE80-.LASFDE80
+.LASFDE80:
 	.4byte	.Lframe0
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.byte	0x4
-	.4byte	.LCFI33-.LFB245
+	.4byte	.LCFI32-.LFB245
 	.byte	0xe
 	.uleb128 0x14
 	.byte	0x84
@@ -21062,15 +21153,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE84:
-.LSFDE86:
-	.4byte	.LEFDE86-.LASFDE86
-.LASFDE86:
+.LEFDE80:
+.LSFDE82:
+	.4byte	.LEFDE82-.LASFDE82
+.LASFDE82:
 	.4byte	.Lframe0
 	.4byte	.LFB150
 	.4byte	.LFE150-.LFB150
 	.byte	0x4
-	.4byte	.LCFI34-.LFB150
+	.4byte	.LCFI33-.LFB150
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -21092,27 +21183,27 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI35-.LCFI34
+	.4byte	.LCFI34-.LCFI33
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI36-.LCFI35
+	.4byte	.LCFI35-.LCFI34
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI37-.LCFI36
+	.4byte	.LCFI36-.LCFI35
 	.byte	0xb
 	.align	2
-.LEFDE86:
-.LSFDE88:
-	.4byte	.LEFDE88-.LASFDE88
-.LASFDE88:
+.LEFDE82:
+.LSFDE84:
+	.4byte	.LEFDE84-.LASFDE84
+.LASFDE84:
 	.4byte	.Lframe0
 	.4byte	.LFB151
 	.4byte	.LFE151-.LFB151
 	.byte	0x4
-	.4byte	.LCFI38-.LFB151
+	.4byte	.LCFI37-.LFB151
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -21124,15 +21215,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE88:
-.LSFDE90:
-	.4byte	.LEFDE90-.LASFDE90
-.LASFDE90:
+.LEFDE84:
+.LSFDE86:
+	.4byte	.LEFDE86-.LASFDE86
+.LASFDE86:
 	.4byte	.Lframe0
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.byte	0x4
-	.4byte	.LCFI39-.LFB246
+	.4byte	.LCFI38-.LFB246
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -21154,27 +21245,27 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI40-.LCFI39
+	.4byte	.LCFI39-.LCFI38
 	.byte	0xe
-	.uleb128 0x38
+	.uleb128 0x40
 	.byte	0x4
-	.4byte	.LCFI41-.LCFI40
+	.4byte	.LCFI40-.LCFI39
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI42-.LCFI41
+	.4byte	.LCFI41-.LCFI40
 	.byte	0xb
 	.align	2
-.LEFDE90:
-.LSFDE92:
-	.4byte	.LEFDE92-.LASFDE92
-.LASFDE92:
+.LEFDE86:
+.LSFDE88:
+	.4byte	.LEFDE88-.LASFDE88
+.LASFDE88:
 	.4byte	.Lframe0
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.byte	0x4
-	.4byte	.LCFI43-.LFB247
+	.4byte	.LCFI42-.LFB247
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x83
@@ -21182,15 +21273,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE92:
-.LSFDE94:
-	.4byte	.LEFDE94-.LASFDE94
-.LASFDE94:
+.LEFDE88:
+.LSFDE90:
+	.4byte	.LEFDE90-.LASFDE90
+.LASFDE90:
 	.4byte	.Lframe0
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
 	.byte	0x4
-	.4byte	.LCFI44-.LFB250
+	.4byte	.LCFI43-.LFB250
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x83
@@ -21206,15 +21297,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE94:
-.LSFDE96:
-	.4byte	.LEFDE96-.LASFDE96
-.LASFDE96:
+.LEFDE90:
+.LSFDE92:
+	.4byte	.LEFDE92-.LASFDE92
+.LASFDE92:
 	.4byte	.Lframe0
 	.4byte	.LFB253
 	.4byte	.LFE253-.LFB253
 	.byte	0x4
-	.4byte	.LCFI45-.LFB253
+	.4byte	.LCFI44-.LFB253
 	.byte	0xe
 	.uleb128 0x1c
 	.byte	0x84
@@ -21232,15 +21323,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE96:
-.LSFDE98:
-	.4byte	.LEFDE98-.LASFDE98
-.LASFDE98:
+.LEFDE92:
+.LSFDE94:
+	.4byte	.LEFDE94-.LASFDE94
+.LASFDE94:
 	.4byte	.Lframe0
 	.4byte	.LFB254
 	.4byte	.LFE254-.LFB254
 	.byte	0x4
-	.4byte	.LCFI46-.LFB254
+	.4byte	.LCFI45-.LFB254
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21260,15 +21351,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE98:
-.LSFDE100:
-	.4byte	.LEFDE100-.LASFDE100
-.LASFDE100:
+.LEFDE94:
+.LSFDE96:
+	.4byte	.LEFDE96-.LASFDE96
+.LASFDE96:
 	.4byte	.Lframe0
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.byte	0x4
-	.4byte	.LCFI47-.LFB255
+	.4byte	.LCFI46-.LFB255
 	.byte	0xe
 	.uleb128 0x1c
 	.byte	0x84
@@ -21286,23 +21377,23 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE100:
-.LSFDE102:
-	.4byte	.LEFDE102-.LASFDE102
-.LASFDE102:
+.LEFDE96:
+.LSFDE98:
+	.4byte	.LEFDE98-.LASFDE98
+.LASFDE98:
 	.4byte	.Lframe0
 	.4byte	.LFB256
 	.4byte	.LFE256-.LFB256
 	.align	2
-.LEFDE102:
-.LSFDE104:
-	.4byte	.LEFDE104-.LASFDE104
-.LASFDE104:
+.LEFDE98:
+.LSFDE100:
+	.4byte	.LEFDE100-.LASFDE100
+.LASFDE100:
 	.4byte	.Lframe0
 	.4byte	.LFB257
 	.4byte	.LFE257-.LFB257
 	.byte	0x4
-	.4byte	.LCFI48-.LFB257
+	.4byte	.LCFI47-.LFB257
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x83
@@ -21318,15 +21409,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE104:
-.LSFDE106:
-	.4byte	.LEFDE106-.LASFDE106
-.LASFDE106:
+.LEFDE100:
+.LSFDE102:
+	.4byte	.LEFDE102-.LASFDE102
+.LASFDE102:
 	.4byte	.Lframe0
 	.4byte	.LFB264
 	.4byte	.LFE264-.LFB264
 	.byte	0x4
-	.4byte	.LCFI49-.LFB264
+	.4byte	.LCFI48-.LFB264
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -21334,15 +21425,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE106:
-.LSFDE108:
-	.4byte	.LEFDE108-.LASFDE108
-.LASFDE108:
+.LEFDE102:
+.LSFDE104:
+	.4byte	.LEFDE104-.LASFDE104
+.LASFDE104:
 	.4byte	.Lframe0
 	.4byte	.LFB265
 	.4byte	.LFE265-.LFB265
 	.byte	0x4
-	.4byte	.LCFI50-.LFB265
+	.4byte	.LCFI49-.LFB265
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -21354,15 +21445,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE108:
-.LSFDE110:
-	.4byte	.LEFDE110-.LASFDE110
-.LASFDE110:
+.LEFDE104:
+.LSFDE106:
+	.4byte	.LEFDE106-.LASFDE106
+.LASFDE106:
 	.4byte	.Lframe0
 	.4byte	.LFB266
 	.4byte	.LFE266-.LFB266
 	.byte	0x4
-	.4byte	.LCFI51-.LFB266
+	.4byte	.LCFI50-.LFB266
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -21370,15 +21461,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE110:
-.LSFDE112:
-	.4byte	.LEFDE112-.LASFDE112
-.LASFDE112:
+.LEFDE106:
+.LSFDE108:
+	.4byte	.LEFDE108-.LASFDE108
+.LASFDE108:
 	.4byte	.Lframe0
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
 	.byte	0x4
-	.4byte	.LCFI52-.LFB272
+	.4byte	.LCFI51-.LFB272
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -21400,27 +21491,27 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI53-.LCFI52
+	.4byte	.LCFI52-.LCFI51
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI54-.LCFI53
+	.4byte	.LCFI53-.LCFI52
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI55-.LCFI54
+	.4byte	.LCFI54-.LCFI53
 	.byte	0xb
 	.align	2
-.LEFDE112:
-.LSFDE114:
-	.4byte	.LEFDE114-.LASFDE114
-.LASFDE114:
+.LEFDE108:
+.LSFDE110:
+	.4byte	.LEFDE110-.LASFDE110
+.LASFDE110:
 	.4byte	.Lframe0
 	.4byte	.LFB180
 	.4byte	.LFE180-.LFB180
 	.byte	0x4
-	.4byte	.LCFI56-.LFB180
+	.4byte	.LCFI55-.LFB180
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21440,15 +21531,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE114:
-.LSFDE116:
-	.4byte	.LEFDE116-.LASFDE116
-.LASFDE116:
+.LEFDE110:
+.LSFDE112:
+	.4byte	.LEFDE112-.LASFDE112
+.LASFDE112:
 	.4byte	.Lframe0
 	.4byte	.LFB186
 	.4byte	.LFE186-.LFB186
 	.byte	0x4
-	.4byte	.LCFI57-.LFB186
+	.4byte	.LCFI56-.LFB186
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -21464,27 +21555,27 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI58-.LCFI57
+	.4byte	.LCFI57-.LCFI56
 	.byte	0xe
 	.uleb128 0x70
 	.byte	0x4
-	.4byte	.LCFI59-.LCFI58
+	.4byte	.LCFI58-.LCFI57
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI60-.LCFI59
+	.4byte	.LCFI59-.LCFI58
 	.byte	0xb
 	.align	2
-.LEFDE116:
-.LSFDE118:
-	.4byte	.LEFDE118-.LASFDE118
-.LASFDE118:
+.LEFDE112:
+.LSFDE114:
+	.4byte	.LEFDE114-.LASFDE114
+.LASFDE114:
 	.4byte	.Lframe0
 	.4byte	.LFB273
 	.4byte	.LFE273-.LFB273
 	.byte	0x4
-	.4byte	.LCFI61-.LFB273
+	.4byte	.LCFI60-.LFB273
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -21506,27 +21597,27 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI62-.LCFI61
+	.4byte	.LCFI61-.LCFI60
 	.byte	0xe
 	.uleb128 0x50
 	.byte	0x4
-	.4byte	.LCFI63-.LCFI62
+	.4byte	.LCFI62-.LCFI61
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI64-.LCFI63
+	.4byte	.LCFI63-.LCFI62
 	.byte	0xb
 	.align	2
-.LEFDE118:
-.LSFDE120:
-	.4byte	.LEFDE120-.LASFDE120
-.LASFDE120:
+.LEFDE114:
+.LSFDE116:
+	.4byte	.LEFDE116-.LASFDE116
+.LASFDE116:
 	.4byte	.Lframe0
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.byte	0x4
-	.4byte	.LCFI65-.LFB274
+	.4byte	.LCFI64-.LFB274
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x84
@@ -21544,23 +21635,23 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI66-.LCFI65
+	.4byte	.LCFI65-.LCFI64
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x1c
 	.byte	0x4
-	.4byte	.LCFI67-.LCFI66
+	.4byte	.LCFI66-.LCFI65
 	.byte	0xb
 	.align	2
-.LEFDE120:
-.LSFDE122:
-	.4byte	.LEFDE122-.LASFDE122
-.LASFDE122:
+.LEFDE116:
+.LSFDE118:
+	.4byte	.LEFDE118-.LASFDE118
+.LASFDE118:
 	.4byte	.Lframe0
 	.4byte	.LFB190
 	.4byte	.LFE190-.LFB190
 	.byte	0x4
-	.4byte	.LCFI68-.LFB190
+	.4byte	.LCFI67-.LFB190
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -21572,15 +21663,15 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.align	2
-.LEFDE122:
-.LSFDE124:
-	.4byte	.LEFDE124-.LASFDE124
-.LASFDE124:
+.LEFDE118:
+.LSFDE120:
+	.4byte	.LEFDE120-.LASFDE120
+.LASFDE120:
 	.4byte	.Lframe0
 	.4byte	.LFB159
 	.4byte	.LFE159-.LFB159
 	.byte	0x4
-	.4byte	.LCFI69-.LFB159
+	.4byte	.LCFI68-.LFB159
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -21602,18 +21693,66 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI70-.LCFI69
+	.4byte	.LCFI69-.LCFI68
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI71-.LCFI70
+	.4byte	.LCFI70-.LCFI69
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI72-.LCFI71
+	.4byte	.LCFI71-.LCFI70
 	.byte	0xb
 	.align	2
+.LEFDE120:
+.LSFDE122:
+	.4byte	.LEFDE122-.LASFDE122
+.LASFDE122:
+	.4byte	.Lframe0
+	.4byte	.LFB193
+	.4byte	.LFE193-.LFB193
+	.byte	0x4
+	.4byte	.LCFI72-.LFB193
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
+	.uleb128 0x6
+	.byte	0x84
+	.uleb128 0x5
+	.byte	0x85
+	.uleb128 0x4
+	.byte	0x86
+	.uleb128 0x3
+	.byte	0x87
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE122:
+.LSFDE124:
+	.4byte	.LEFDE124-.LASFDE124
+.LASFDE124:
+	.4byte	.Lframe0
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.byte	0x4
+	.4byte	.LCFI73-.LFB205
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
+	.uleb128 0x6
+	.byte	0x84
+	.uleb128 0x5
+	.byte	0x85
+	.uleb128 0x4
+	.byte	0x86
+	.uleb128 0x3
+	.byte	0x87
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
 .LEFDE124:
 .LSFDE126:
 	.4byte	.LEFDE126-.LASFDE126
@@ -21622,7 +21761,7 @@ check_vpc_table:
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.byte	0x4
-	.4byte	.LCFI73-.LFB275
+	.4byte	.LCFI74-.LFB275
 	.byte	0xe
 	.uleb128 0xc
 	.byte	0x84
@@ -21632,16 +21771,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI74-.LCFI73
+	.4byte	.LCFI75-.LCFI74
 	.byte	0xe
 	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI75-.LCFI74
+	.4byte	.LCFI76-.LCFI75
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0xc
 	.byte	0x4
-	.4byte	.LCFI76-.LCFI75
+	.4byte	.LCFI77-.LCFI76
 	.byte	0xb
 	.align	2
 .LEFDE126:
@@ -21652,7 +21791,7 @@ check_vpc_table:
 	.4byte	.LFB276
 	.4byte	.LFE276-.LFB276
 	.byte	0x4
-	.4byte	.LCFI77-.LFB276
+	.4byte	.LCFI78-.LFB276
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -21672,7 +21811,7 @@ check_vpc_table:
 	.4byte	.LFB277
 	.4byte	.LFE277-.LFB277
 	.byte	0x4
-	.4byte	.LCFI78-.LFB277
+	.4byte	.LCFI79-.LFB277
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -21688,7 +21827,7 @@ check_vpc_table:
 	.4byte	.LFB156
 	.4byte	.LFE156-.LFB156
 	.byte	0x4
-	.4byte	.LCFI79-.LFB156
+	.4byte	.LCFI80-.LFB156
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -21712,7 +21851,7 @@ check_vpc_table:
 	.4byte	.LFB175
 	.4byte	.LFE175-.LFB175
 	.byte	0x4
-	.4byte	.LCFI80-.LFB175
+	.4byte	.LCFI81-.LFB175
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21740,7 +21879,7 @@ check_vpc_table:
 	.4byte	.LFB203
 	.4byte	.LFE203-.LFB203
 	.byte	0x4
-	.4byte	.LCFI81-.LFB203
+	.4byte	.LCFI82-.LFB203
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -21764,7 +21903,7 @@ check_vpc_table:
 	.4byte	.LFB204
 	.4byte	.LFE204-.LFB204
 	.byte	0x4
-	.4byte	.LCFI82-.LFB204
+	.4byte	.LCFI83-.LFB204
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x84
@@ -21786,12 +21925,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI83-.LCFI82
+	.4byte	.LCFI84-.LCFI83
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI84-.LCFI83
+	.4byte	.LCFI85-.LCFI84
 	.byte	0xb
 	.align	2
 .LEFDE138:
@@ -21802,7 +21941,7 @@ check_vpc_table:
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.byte	0x4
-	.4byte	.LCFI85-.LFB207
+	.4byte	.LCFI86-.LFB207
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x83
@@ -21826,7 +21965,7 @@ check_vpc_table:
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.byte	0x4
-	.4byte	.LCFI86-.LFB208
+	.4byte	.LCFI87-.LFB208
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x83
@@ -21858,7 +21997,7 @@ check_vpc_table:
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.byte	0x4
-	.4byte	.LCFI87-.LFB206
+	.4byte	.LCFI88-.LFB206
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x84
@@ -21880,12 +22019,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI88-.LCFI87
+	.4byte	.LCFI89-.LCFI88
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI89-.LCFI88
+	.4byte	.LCFI90-.LCFI89
 	.byte	0xb
 	.align	2
 .LEFDE144:
@@ -21896,7 +22035,7 @@ check_vpc_table:
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.byte	0x4
-	.4byte	.LCFI90-.LFB209
+	.4byte	.LCFI91-.LFB209
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -21916,7 +22055,7 @@ check_vpc_table:
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
 	.byte	0x4
-	.4byte	.LCFI91-.LFB212
+	.4byte	.LCFI92-.LFB212
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21944,7 +22083,7 @@ check_vpc_table:
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.byte	0x4
-	.4byte	.LCFI92-.LFB230
+	.4byte	.LCFI93-.LFB230
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -21958,7 +22097,7 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI93-.LCFI92
+	.4byte	.LCFI94-.LCFI93
 	.byte	0xe
 	.uleb128 0x14
 	.align	2
@@ -21970,7 +22109,7 @@ check_vpc_table:
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.byte	0x4
-	.4byte	.LCFI94-.LFB241
+	.4byte	.LCFI95-.LFB241
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -21986,16 +22125,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI95-.LCFI94
+	.4byte	.LCFI96-.LCFI95
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI96-.LCFI95
+	.4byte	.LCFI97-.LCFI96
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI97-.LCFI96
+	.4byte	.LCFI98-.LCFI97
 	.byte	0xb
 	.align	2
 .LEFDE152:
@@ -22006,7 +22145,7 @@ check_vpc_table:
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
 	.byte	0x4
-	.4byte	.LCFI98-.LFB268
+	.4byte	.LCFI99-.LFB268
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -22018,16 +22157,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI99-.LCFI98
+	.4byte	.LCFI100-.LCFI99
 	.byte	0xe
 	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI100-.LCFI99
+	.4byte	.LCFI101-.LCFI100
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x4
-	.4byte	.LCFI101-.LCFI100
+	.4byte	.LCFI102-.LCFI101
 	.byte	0xb
 	.align	2
 .LEFDE154:
@@ -22038,7 +22177,7 @@ check_vpc_table:
 	.4byte	.LFB240
 	.4byte	.LFE240-.LFB240
 	.byte	0x4
-	.4byte	.LCFI102-.LFB240
+	.4byte	.LCFI103-.LFB240
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x84
@@ -22060,12 +22199,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI103-.LCFI102
+	.4byte	.LCFI104-.LCFI103
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI104-.LCFI103
+	.4byte	.LCFI105-.LCFI104
 	.byte	0xb
 	.align	2
 .LEFDE156:
@@ -22076,7 +22215,7 @@ check_vpc_table:
 	.4byte	.LFB217
 	.4byte	.LFE217-.LFB217
 	.byte	0x4
-	.4byte	.LCFI105-.LFB217
+	.4byte	.LCFI106-.LFB217
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -22088,7 +22227,7 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI106-.LCFI105
+	.4byte	.LCFI107-.LCFI106
 	.byte	0xa
 	.byte	0xce
 	.byte	0xc6
@@ -22097,7 +22236,7 @@ check_vpc_table:
 	.byte	0xe
 	.uleb128 0
 	.byte	0x4
-	.4byte	.LCFI107-.LCFI106
+	.4byte	.LCFI108-.LCFI107
 	.byte	0xb
 	.align	2
 .LEFDE158:
@@ -22108,7 +22247,7 @@ check_vpc_table:
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.byte	0x4
-	.4byte	.LCFI108-.LFB220
+	.4byte	.LCFI109-.LFB220
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22130,16 +22269,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI109-.LCFI108
+	.4byte	.LCFI110-.LCFI109
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI110-.LCFI109
+	.4byte	.LCFI111-.LCFI110
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI111-.LCFI110
+	.4byte	.LCFI112-.LCFI111
 	.byte	0xb
 	.align	2
 .LEFDE160:
@@ -22150,181 +22289,7 @@ check_vpc_table:
 	.4byte	.LFB225
 	.4byte	.LFE225-.LFB225
 	.byte	0x4
-	.4byte	.LCFI112-.LFB225
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI113-.LCFI112
-	.byte	0xe
-	.uleb128 0x40
-	.byte	0x4
-	.4byte	.LCFI114-.LCFI113
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI115-.LCFI114
-	.byte	0xb
-	.align	2
-.LEFDE162:
-.LSFDE164:
-	.4byte	.LEFDE164-.LASFDE164
-.LASFDE164:
-	.4byte	.Lframe0
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.byte	0x4
-	.4byte	.LCFI116-.LFB226
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE164:
-.LSFDE166:
-	.4byte	.LEFDE166-.LASFDE166
-.LASFDE166:
-	.4byte	.Lframe0
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.byte	0x4
-	.4byte	.LCFI117-.LFB227
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE166:
-.LSFDE168:
-	.4byte	.LEFDE168-.LASFDE168
-.LASFDE168:
-	.4byte	.Lframe0
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.byte	0x4
-	.4byte	.LCFI118-.LFB228
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE168:
-.LSFDE170:
-	.4byte	.LEFDE170-.LASFDE170
-.LASFDE170:
-	.4byte	.Lframe0
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
-	.byte	0x4
-	.4byte	.LCFI119-.LFB157
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE170:
-.LSFDE172:
-	.4byte	.LEFDE172-.LASFDE172
-.LASFDE172:
-	.4byte	.Lframe0
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.byte	0x4
-	.4byte	.LCFI120-.LFB235
-	.byte	0xe
-	.uleb128 0x30
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI121-.LCFI120
-	.byte	0xe
-	.uleb128 0x24
-	.align	2
-.LEFDE172:
-.LSFDE174:
-	.4byte	.LEFDE174-.LASFDE174
-.LASFDE174:
-	.4byte	.Lframe0
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.byte	0x4
-	.4byte	.LCFI122-.LFB259
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI123-.LCFI122
-	.byte	0xce
-	.byte	0xc4
-	.byte	0xe
-	.uleb128 0
-	.align	2
-.LEFDE174:
-.LSFDE176:
-	.4byte	.LEFDE176-.LASFDE176
-.LASFDE176:
-	.4byte	.Lframe0
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.byte	0x4
-	.4byte	.LCFI124-.LFB260
+	.4byte	.LCFI113-.LFB225
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22346,12 +22311,186 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI125-.LCFI124
+	.4byte	.LCFI114-.LCFI113
 	.byte	0xe
 	.uleb128 0x40
 	.byte	0x4
+	.4byte	.LCFI115-.LCFI114
+	.byte	0xa
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	.LCFI116-.LCFI115
+	.byte	0xb
+	.align	2
+.LEFDE162:
+.LSFDE164:
+	.4byte	.LEFDE164-.LASFDE164
+.LASFDE164:
+	.4byte	.Lframe0
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.byte	0x4
+	.4byte	.LCFI117-.LFB226
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE164:
+.LSFDE166:
+	.4byte	.LEFDE166-.LASFDE166
+.LASFDE166:
+	.4byte	.Lframe0
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
+	.byte	0x4
+	.4byte	.LCFI118-.LFB227
+	.byte	0xe
+	.uleb128 0x18
+	.byte	0x83
+	.uleb128 0x6
+	.byte	0x84
+	.uleb128 0x5
+	.byte	0x85
+	.uleb128 0x4
+	.byte	0x86
+	.uleb128 0x3
+	.byte	0x87
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE166:
+.LSFDE168:
+	.4byte	.LEFDE168-.LASFDE168
+.LASFDE168:
+	.4byte	.Lframe0
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
+	.byte	0x4
+	.4byte	.LCFI119-.LFB228
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x83
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE168:
+.LSFDE170:
+	.4byte	.LEFDE170-.LASFDE170
+.LASFDE170:
+	.4byte	.Lframe0
+	.4byte	.LFB157
+	.4byte	.LFE157-.LFB157
+	.byte	0x4
+	.4byte	.LCFI120-.LFB157
+	.byte	0xe
+	.uleb128 0x10
+	.byte	0x83
+	.uleb128 0x4
+	.byte	0x84
+	.uleb128 0x3
+	.byte	0x85
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.align	2
+.LEFDE170:
+.LSFDE172:
+	.4byte	.LEFDE172-.LASFDE172
+.LASFDE172:
+	.4byte	.Lframe0
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.byte	0x4
+	.4byte	.LCFI121-.LFB235
+	.byte	0xe
+	.uleb128 0x30
+	.byte	0x84
+	.uleb128 0x9
+	.byte	0x85
+	.uleb128 0x8
+	.byte	0x86
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x89
+	.uleb128 0x4
+	.byte	0x8a
+	.uleb128 0x3
+	.byte	0x8b
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.byte	0x4
+	.4byte	.LCFI122-.LCFI121
+	.byte	0xe
+	.uleb128 0x24
+	.align	2
+.LEFDE172:
+.LSFDE174:
+	.4byte	.LEFDE174-.LASFDE174
+.LASFDE174:
+	.4byte	.Lframe0
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
+	.byte	0x4
+	.4byte	.LCFI123-.LFB259
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x84
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.byte	0x4
+	.4byte	.LCFI124-.LCFI123
+	.byte	0xce
+	.byte	0xc4
+	.byte	0xe
+	.uleb128 0
+	.align	2
+.LEFDE174:
+.LSFDE176:
+	.4byte	.LEFDE176-.LASFDE176
+.LASFDE176:
+	.4byte	.Lframe0
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
+	.byte	0x4
+	.4byte	.LCFI125-.LFB260
+	.byte	0xe
+	.uleb128 0x24
+	.byte	0x84
+	.uleb128 0x9
+	.byte	0x85
+	.uleb128 0x8
+	.byte	0x86
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x89
+	.uleb128 0x4
+	.byte	0x8a
+	.uleb128 0x3
+	.byte	0x8b
+	.uleb128 0x2
+	.byte	0x8e
+	.uleb128 0x1
+	.byte	0x4
 	.4byte	.LCFI126-.LCFI125
 	.byte	0xe
+	.uleb128 0x40
+	.byte	0x4
+	.4byte	.LCFI127-.LCFI126
+	.byte	0xe
 	.uleb128 0x24
 	.align	2
 .LEFDE176:
@@ -22370,7 +22509,7 @@ check_vpc_table:
 	.4byte	.LFB176
 	.4byte	.LFE176-.LFB176
 	.byte	0x4
-	.4byte	.LCFI127-.LFB176
+	.4byte	.LCFI128-.LFB176
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x84
@@ -22392,7 +22531,7 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI128-.LCFI127
+	.4byte	.LCFI129-.LCFI128
 	.byte	0xe
 	.uleb128 0x24
 	.align	2
@@ -22404,7 +22543,7 @@ check_vpc_table:
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.byte	0x4
-	.4byte	.LCFI129-.LFB248
+	.4byte	.LCFI130-.LFB248
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22426,11 +22565,11 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI130-.LCFI129
+	.4byte	.LCFI131-.LCFI130
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI131-.LCFI130
+	.4byte	.LCFI132-.LCFI131
 	.byte	0xe
 	.uleb128 0x24
 	.align	2
@@ -22442,7 +22581,7 @@ check_vpc_table:
 	.4byte	.LFB267
 	.4byte	.LFE267-.LFB267
 	.byte	0x4
-	.4byte	.LCFI132-.LFB267
+	.4byte	.LCFI133-.LFB267
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x83
@@ -22474,7 +22613,7 @@ check_vpc_table:
 	.4byte	.LFB251
 	.4byte	.LFE251-.LFB251
 	.byte	0x4
-	.4byte	.LCFI133-.LFB251
+	.4byte	.LCFI134-.LFB251
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -22494,7 +22633,7 @@ check_vpc_table:
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
 	.byte	0x4
-	.4byte	.LCFI134-.LFB252
+	.4byte	.LCFI135-.LFB252
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -22514,7 +22653,7 @@ check_vpc_table:
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.byte	0x4
-	.4byte	.LCFI135-.LFB218
+	.4byte	.LCFI136-.LFB218
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -22534,16 +22673,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI136-.LCFI135
+	.4byte	.LCFI137-.LCFI136
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI137-.LCFI136
+	.4byte	.LCFI138-.LCFI137
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x4
-	.4byte	.LCFI138-.LCFI137
+	.4byte	.LCFI139-.LCFI138
 	.byte	0xb
 	.align	2
 .LEFDE190:
@@ -22554,7 +22693,7 @@ check_vpc_table:
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.byte	0x4
-	.4byte	.LCFI139-.LFB211
+	.4byte	.LCFI140-.LFB211
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -22574,7 +22713,7 @@ check_vpc_table:
 	.4byte	.LFB231
 	.4byte	.LFE231-.LFB231
 	.byte	0x4
-	.4byte	.LCFI140-.LFB231
+	.4byte	.LCFI141-.LFB231
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22596,16 +22735,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI141-.LCFI140
+	.4byte	.LCFI142-.LCFI141
 	.byte	0xe
 	.uleb128 0x58
 	.byte	0x4
-	.4byte	.LCFI142-.LCFI141
+	.4byte	.LCFI143-.LCFI142
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI143-.LCFI142
+	.4byte	.LCFI144-.LCFI143
 	.byte	0xb
 	.align	2
 .LEFDE194:
@@ -22616,7 +22755,7 @@ check_vpc_table:
 	.4byte	.LFB238
 	.4byte	.LFE238-.LFB238
 	.byte	0x4
-	.4byte	.LCFI144-.LFB238
+	.4byte	.LCFI145-.LFB238
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -22632,16 +22771,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI145-.LCFI144
+	.4byte	.LCFI146-.LCFI145
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x4
-	.4byte	.LCFI146-.LCFI145
+	.4byte	.LCFI147-.LCFI146
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI147-.LCFI146
+	.4byte	.LCFI148-.LCFI147
 	.byte	0xb
 	.align	2
 .LEFDE196:
@@ -22652,7 +22791,7 @@ check_vpc_table:
 	.4byte	.LFB179
 	.4byte	.LFE179-.LFB179
 	.byte	0x4
-	.4byte	.LCFI148-.LFB179
+	.4byte	.LCFI149-.LFB179
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x84
@@ -22676,7 +22815,7 @@ check_vpc_table:
 	.4byte	.LFB181
 	.4byte	.LFE181-.LFB181
 	.byte	0x4
-	.4byte	.LCFI149-.LFB181
+	.4byte	.LCFI150-.LFB181
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x83
@@ -22708,7 +22847,7 @@ check_vpc_table:
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
 	.byte	0x4
-	.4byte	.LCFI150-.LFB213
+	.4byte	.LCFI151-.LFB213
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22730,16 +22869,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI151-.LCFI150
+	.4byte	.LCFI152-.LCFI151
 	.byte	0xe
 	.uleb128 0x90
 	.byte	0x4
-	.4byte	.LCFI152-.LCFI151
+	.4byte	.LCFI153-.LCFI152
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI153-.LCFI152
+	.4byte	.LCFI154-.LCFI153
 	.byte	0xb
 	.align	2
 .LEFDE202:
@@ -22758,7 +22897,7 @@ check_vpc_table:
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.byte	0x4
-	.4byte	.LCFI154-.LFB215
+	.4byte	.LCFI155-.LFB215
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x83
@@ -22774,7 +22913,7 @@ check_vpc_table:
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
 	.byte	0x4
-	.4byte	.LCFI155-.LFB214
+	.4byte	.LCFI156-.LFB214
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22796,16 +22935,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI156-.LCFI155
+	.4byte	.LCFI157-.LCFI156
 	.byte	0xe
 	.uleb128 0x88
 	.byte	0x4
-	.4byte	.LCFI157-.LCFI156
+	.4byte	.LCFI158-.LCFI157
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI158-.LCFI157
+	.4byte	.LCFI159-.LCFI158
 	.byte	0xb
 	.align	2
 .LEFDE208:
@@ -22816,7 +22955,7 @@ check_vpc_table:
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.byte	0x4
-	.4byte	.LCFI159-.LFB221
+	.4byte	.LCFI160-.LFB221
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -22832,7 +22971,7 @@ check_vpc_table:
 	.4byte	.LFB237
 	.4byte	.LFE237-.LFB237
 	.byte	0x4
-	.4byte	.LCFI160-.LFB237
+	.4byte	.LCFI161-.LFB237
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -22852,7 +22991,7 @@ check_vpc_table:
 	.4byte	.LFB219
 	.4byte	.LFE219-.LFB219
 	.byte	0x4
-	.4byte	.LCFI161-.LFB219
+	.4byte	.LCFI162-.LFB219
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -22880,7 +23019,7 @@ check_vpc_table:
 	.4byte	.LFB239
 	.4byte	.LFE239-.LFB239
 	.byte	0x4
-	.4byte	.LCFI162-.LFB239
+	.4byte	.LCFI163-.LFB239
 	.byte	0xe
 	.uleb128 0x28
 	.byte	0x84
@@ -22898,12 +23037,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI163-.LCFI162
+	.4byte	.LCFI164-.LCFI163
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x1c
 	.byte	0x4
-	.4byte	.LCFI164-.LCFI163
+	.4byte	.LCFI165-.LCFI164
 	.byte	0xb
 	.align	2
 .LEFDE216:
@@ -22914,7 +23053,7 @@ check_vpc_table:
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.byte	0x4
-	.4byte	.LCFI165-.LFB249
+	.4byte	.LCFI166-.LFB249
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -22934,7 +23073,7 @@ check_vpc_table:
 	.4byte	.LFB165
 	.4byte	.LFE165-.LFB165
 	.byte	0x4
-	.4byte	.LCFI166-.LFB165
+	.4byte	.LCFI167-.LFB165
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -22956,11 +23095,11 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI167-.LCFI166
+	.4byte	.LCFI168-.LCFI167
 	.byte	0xe
 	.uleb128 0x38
 	.byte	0x4
-	.4byte	.LCFI168-.LCFI167
+	.4byte	.LCFI169-.LCFI168
 	.byte	0xe
 	.uleb128 0x24
 	.align	2
@@ -22972,7 +23111,7 @@ check_vpc_table:
 	.4byte	.LFB166
 	.4byte	.LFE166-.LFB166
 	.byte	0x4
-	.4byte	.LCFI169-.LFB166
+	.4byte	.LCFI170-.LFB166
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -22988,7 +23127,7 @@ check_vpc_table:
 	.4byte	.LFB162
 	.4byte	.LFE162-.LFB162
 	.byte	0x4
-	.4byte	.LCFI170-.LFB162
+	.4byte	.LCFI171-.LFB162
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x83
@@ -23004,7 +23143,7 @@ check_vpc_table:
 	.4byte	.LFB163
 	.4byte	.LFE163-.LFB163
 	.byte	0x4
-	.4byte	.LCFI171-.LFB163
+	.4byte	.LCFI172-.LFB163
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x83
@@ -23020,7 +23159,7 @@ check_vpc_table:
 	.4byte	.LFB168
 	.4byte	.LFE168-.LFB168
 	.byte	0x4
-	.4byte	.LCFI172-.LFB168
+	.4byte	.LCFI173-.LFB168
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x84
@@ -23036,12 +23175,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI173-.LCFI172
+	.4byte	.LCFI174-.LCFI173
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI174-.LCFI173
+	.4byte	.LCFI175-.LCFI174
 	.byte	0xb
 	.align	2
 .LEFDE228:
@@ -23052,7 +23191,7 @@ check_vpc_table:
 	.4byte	.LFB258
 	.4byte	.LFE258-.LFB258
 	.byte	0x4
-	.4byte	.LCFI175-.LFB258
+	.4byte	.LCFI176-.LFB258
 	.byte	0xe
 	.uleb128 0x30
 	.byte	0x84
@@ -23074,12 +23213,12 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI176-.LCFI175
+	.4byte	.LCFI177-.LCFI176
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI177-.LCFI176
+	.4byte	.LCFI178-.LCFI177
 	.byte	0xb
 	.align	2
 .LEFDE230:
@@ -23090,7 +23229,7 @@ check_vpc_table:
 	.4byte	.LFB261
 	.4byte	.LFE261-.LFB261
 	.byte	0x4
-	.4byte	.LCFI178-.LFB261
+	.4byte	.LCFI179-.LFB261
 	.byte	0xe
 	.uleb128 0x8
 	.byte	0x84
@@ -23106,7 +23245,7 @@ check_vpc_table:
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.byte	0x4
-	.4byte	.LCFI179-.LFB233
+	.4byte	.LCFI180-.LFB233
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -23126,7 +23265,7 @@ check_vpc_table:
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.byte	0x4
-	.4byte	.LCFI180-.LFB263
+	.4byte	.LCFI181-.LFB263
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -23146,7 +23285,7 @@ check_vpc_table:
 	.4byte	.LFB262
 	.4byte	.LFE262-.LFB262
 	.byte	0x4
-	.4byte	.LCFI181-.LFB262
+	.4byte	.LCFI182-.LFB262
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -23158,7 +23297,7 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI182-.LCFI181
+	.4byte	.LCFI183-.LCFI182
 	.byte	0xce
 	.byte	0xc5
 	.byte	0xc4
@@ -23174,7 +23313,7 @@ check_vpc_table:
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.byte	0x4
-	.4byte	.LCFI183-.LFB269
+	.4byte	.LCFI184-.LFB269
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -23196,16 +23335,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI184-.LCFI183
+	.4byte	.LCFI185-.LCFI184
 	.byte	0xe
 	.uleb128 0x48
 	.byte	0x4
-	.4byte	.LCFI185-.LCFI184
+	.4byte	.LCFI186-.LCFI185
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI186-.LCFI185
+	.4byte	.LCFI187-.LCFI186
 	.byte	0xb
 	.align	2
 .LEFDE240:
@@ -23224,7 +23363,7 @@ check_vpc_table:
 	.4byte	.LFB164
 	.4byte	.LFE164-.LFB164
 	.byte	0x4
-	.4byte	.LCFI187-.LFB164
+	.4byte	.LCFI188-.LFB164
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -23246,16 +23385,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI188-.LCFI187
+	.4byte	.LCFI189-.LCFI188
 	.byte	0xe
 	.uleb128 0x60
 	.byte	0x4
-	.4byte	.LCFI189-.LCFI188
+	.4byte	.LCFI190-.LCFI189
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI190-.LCFI189
+	.4byte	.LCFI191-.LCFI190
 	.byte	0xb
 	.align	2
 .LEFDE244:
@@ -23274,7 +23413,7 @@ check_vpc_table:
 	.4byte	.LFB167
 	.4byte	.LFE167-.LFB167
 	.byte	0x4
-	.4byte	.LCFI191-.LFB167
+	.4byte	.LCFI192-.LFB167
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x84
@@ -23296,16 +23435,16 @@ check_vpc_table:
 	.byte	0x8e
 	.uleb128 0x1
 	.byte	0x4
-	.4byte	.LCFI192-.LCFI191
+	.4byte	.LCFI193-.LCFI192
 	.byte	0xe
 	.uleb128 0x68
 	.byte	0x4
-	.4byte	.LCFI193-.LCFI192
+	.4byte	.LCFI194-.LCFI193
 	.byte	0xa
 	.byte	0xe
 	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI194-.LCFI193
+	.4byte	.LCFI195-.LCFI194
 	.byte	0xb
 	.align	2
 .LEFDE248:
@@ -23324,7 +23463,7 @@ check_vpc_table:
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.byte	0x4
-	.4byte	.LCFI195-.LFB224
+	.4byte	.LCFI196-.LFB224
 	.byte	0xe
 	.uleb128 0x18
 	.byte	0x83
@@ -23348,7 +23487,7 @@ check_vpc_table:
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.byte	0x4
-	.4byte	.LCFI196-.LFB242
+	.4byte	.LCFI197-.LFB242
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x84
@@ -23368,7 +23507,7 @@ check_vpc_table:
 	.4byte	.LFB160
 	.4byte	.LFE160-.LFB160
 	.byte	0x4
-	.4byte	.LCFI197-.LFB160
+	.4byte	.LCFI198-.LFB160
 	.byte	0xe
 	.uleb128 0x20
 	.byte	0x83
@@ -23396,7 +23535,7 @@ check_vpc_table:
 	.4byte	.LFB161
 	.4byte	.LFE161-.LFB161
 	.byte	0x4
-	.4byte	.LCFI198-.LFB161
+	.4byte	.LCFI199-.LFB161
 	.byte	0xe
 	.uleb128 0x10
 	.byte	0x83
@@ -23436,15 +23575,15 @@ check_vpc_table:
 	.file 20 "<built-in>"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x6763
+	.4byte	0x6836
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x1
+	.4byte	.LASF664
 	.4byte	.LASF665
-	.4byte	.LASF666
 	.4byte	.Ltext0
 	.4byte	.Letext0-.Ltext0
 	.4byte	.Ldebug_line0
@@ -23744,7 +23883,7 @@ check_vpc_table:
 	.2byte	0x1dc
 	.4byte	0xbc
 	.uleb128 0x12
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0x4
 	.4byte	0x41
 	.byte	0xc
@@ -26151,27 +26290,27 @@ check_vpc_table:
 	.uleb128 0x9
 	.4byte	.LASF328
 	.byte	0x3
-	.byte	0x6d
+	.byte	0x6c
 	.4byte	0x30c
 	.uleb128 0x9
 	.4byte	.LASF329
 	.byte	0x3
-	.byte	0x6e
+	.byte	0x6d
 	.4byte	0x30c
 	.uleb128 0x9
 	.4byte	.LASF330
 	.byte	0x3
-	.byte	0x6f
+	.byte	0x6e
 	.4byte	0x30c
 	.uleb128 0x9
 	.4byte	.LASF331
 	.byte	0x3
-	.byte	0x70
+	.byte	0x6f
 	.4byte	0x30c
 	.uleb128 0x1e
 	.4byte	.LASF332
 	.byte	0x3
-	.2byte	0x3bd
+	.2byte	0x3c0
 	.4byte	0x64
 	.uleb128 0x5
 	.byte	0x3
@@ -26179,7 +26318,7 @@ check_vpc_table:
 	.uleb128 0x1f
 	.4byte	.LASF336
 	.byte	0x3
-	.2byte	0x480
+	.2byte	0x483
 	.4byte	0x30c
 	.uleb128 0x5
 	.byte	0x3
@@ -26187,7 +26326,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF333
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
@@ -26195,7 +26334,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF334
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0x301
 	.uleb128 0x5
 	.byte	0x3
@@ -26210,7 +26349,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF335
 	.byte	0x2
-	.2byte	0x8ad
+	.2byte	0x8df
 	.4byte	0x169a
 	.uleb128 0x5
 	.byte	0x3
@@ -26276,22 +26415,22 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x25
-	.4byte	.LLST300
+	.4byte	.LLST301
 	.uleb128 0x23
 	.4byte	.LASF342
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x25
-	.4byte	.LLST301
+	.4byte	.LLST302
 	.uleb128 0x23
 	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x41
-	.4byte	.LLST302
+	.4byte	.LLST303
 	.uleb128 0x24
-	.4byte	.LVL1631
-	.4byte	0x6700
+	.4byte	.LVL1649
+	.4byte	0x67d3
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF344
@@ -26308,22 +26447,22 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x25
-	.4byte	.LLST176
+	.4byte	.LLST177
 	.uleb128 0x23
 	.4byte	.LASF346
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x17bf
-	.4byte	.LLST177
+	.4byte	.LLST178
 	.uleb128 0x23
 	.4byte	.LASF347
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x41
-	.4byte	.LLST178
+	.4byte	.LLST179
 	.uleb128 0x24
-	.4byte	.LVL813
-	.4byte	0x670b
+	.4byte	.LVL830
+	.4byte	0x67de
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
@@ -26379,19 +26518,19 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x46f
-	.4byte	.LLST108
+	.4byte	.LLST109
 	.uleb128 0x2b
 	.ascii	"die\000"
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x99
-	.4byte	.LLST109
+	.4byte	.LLST110
 	.uleb128 0x2c
 	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x83
-	.4byte	.LLST110
+	.4byte	.LLST111
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
@@ -26399,8 +26538,8 @@ check_vpc_table:
 	.4byte	0x83
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB337
-	.4byte	.Ldebug_ranges0+0x100
+	.4byte	.LBB361
+	.4byte	.Ldebug_ranges0+0x160
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x18aa
@@ -26411,7 +26550,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x100
+	.4byte	.Ldebug_ranges0+0x160
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -26419,21 +26558,21 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x100
+	.4byte	.Ldebug_ranges0+0x160
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
 	.uleb128 0x31
-	.4byte	.LVL468
-	.4byte	0x6714
+	.4byte	.LVL485
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x32
 	.4byte	0x17c6
-	.4byte	.LBB346
-	.4byte	.LBE346-.LBB346
+	.4byte	.LBB370
+	.4byte	.LBE370-.LBB370
 	.byte	0x1
 	.byte	0xbd
 	.uleb128 0x2e
@@ -26443,8 +26582,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB347
-	.4byte	.LBE347-.LBB347
+	.4byte	.LBB371
+	.4byte	.LBE371-.LBB371
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -26452,15 +26591,15 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB348
-	.4byte	.LBE348-.LBB348
+	.4byte	.LBB372
+	.4byte	.LBE372-.LBB372
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
 	.uleb128 0x31
-	.4byte	.LVL472
-	.4byte	0x6714
+	.4byte	.LVL489
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
@@ -26519,19 +26658,19 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x25
-	.4byte	.LLST95
+	.4byte	.LLST94
 	.uleb128 0x23
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x99
-	.4byte	.LLST96
+	.4byte	.LLST95
 	.uleb128 0x23
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x99
-	.4byte	.LLST97
+	.4byte	.LLST96
 	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x1
@@ -26570,7 +26709,7 @@ check_vpc_table:
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x31
-	.4byte	.LVL407
+	.4byte	.LVL413
 	.4byte	0x1ba6
 	.byte	0
 	.uleb128 0x2a
@@ -26588,25 +26727,25 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x25
-	.4byte	.LLST90
+	.4byte	.LLST89
 	.uleb128 0x23
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST91
+	.4byte	.LLST90
 	.uleb128 0x23
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST92
+	.4byte	.LLST91
 	.uleb128 0x23
 	.4byte	.LASF361
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x99
-	.4byte	.LLST93
+	.4byte	.LLST92
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
@@ -26635,7 +26774,7 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x4c
 	.4byte	0x99
-	.4byte	.LLST94
+	.4byte	.LLST93
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
@@ -26646,9 +26785,9 @@ check_vpc_table:
 	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7595
+	.4byte	__func__.7540
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	.Ldebug_ranges0+0xe0
 	.4byte	0x1ad0
 	.uleb128 0x20
 	.4byte	.LASF363
@@ -26659,23 +26798,23 @@ check_vpc_table:
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x31
-	.4byte	.LVL391
+	.4byte	.LVL397
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL393
-	.4byte	0x671f
+	.4byte	.LVL399
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL394
-	.4byte	0x671f
+	.4byte	.LVL400
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL395
-	.4byte	0x671f
+	.4byte	.LVL401
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL385
-	.4byte	0x671f
+	.4byte	.LVL391
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL386
+	.4byte	.LVL392
 	.4byte	0x1ba6
 	.byte	0
 	.uleb128 0xc
@@ -26702,19 +26841,19 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x25
-	.4byte	.LLST83
+	.4byte	.LLST82
 	.uleb128 0x23
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x99
-	.4byte	.LLST84
+	.4byte	.LLST83
 	.uleb128 0x23
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x99
-	.4byte	.LLST85
+	.4byte	.LLST84
 	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x1
@@ -26757,16 +26896,16 @@ check_vpc_table:
 	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7578
+	.4byte	__func__.7523
 	.uleb128 0x31
-	.4byte	.LVL355
-	.4byte	0x671f
+	.4byte	.LVL361
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL358
+	.4byte	.LVL364
 	.4byte	0x1ba6
 	.byte	0
 	.uleb128 0x3a
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x1
 	.byte	0x11
 	.4byte	0x99
@@ -26837,7 +26976,7 @@ check_vpc_table:
 	.uleb128 0x3b
 	.4byte	.LASF370
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0x99
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
@@ -26845,7 +26984,7 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x1c72
 	.uleb128 0x24
-	.4byte	.LVL1370
+	.4byte	.LVL1388
 	.4byte	0x1c72
 	.byte	0
 	.uleb128 0x3c
@@ -26918,11 +27057,11 @@ check_vpc_table:
 	.uleb128 0x40
 	.4byte	.LASF381
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x40
 	.4byte	.LASF382
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x41
 	.4byte	.LASF362
 	.4byte	0x1d55
@@ -27044,7 +27183,7 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x301
-	.4byte	.LLST82
+	.4byte	.LLST81
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x5
@@ -27056,13 +27195,13 @@ check_vpc_table:
 	.2byte	0x169
 	.4byte	0x301
 	.uleb128 0x31
-	.4byte	.LVL341
-	.4byte	0x4561
+	.4byte	.LVL347
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL342
-	.4byte	0x671f
+	.4byte	.LVL348
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL343
+	.4byte	.LVL349
 	.4byte	0x1e6d
 	.byte	0
 	.uleb128 0x3b
@@ -27080,10 +27219,10 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x301
-	.4byte	.LLST81
+	.4byte	.LLST80
 	.uleb128 0x31
-	.4byte	.LVL338
-	.4byte	0x671f
+	.4byte	.LVL344
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF393
@@ -27105,27 +27244,27 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x13e
 	.4byte	0x1d3f
-	.4byte	.LLST254
+	.4byte	.LLST255
 	.uleb128 0x31
-	.4byte	.LVL1271
+	.4byte	.LVL1289
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1272
+	.4byte	.LVL1290
 	.4byte	0x22cb
 	.uleb128 0x31
-	.4byte	.LVL1273
+	.4byte	.LVL1291
 	.4byte	0x20c4
 	.uleb128 0x31
-	.4byte	.LVL1274
-	.4byte	0x4b59
+	.4byte	.LVL1292
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1275
-	.4byte	0x499b
+	.4byte	.LVL1293
+	.4byte	0x4954
 	.uleb128 0x31
-	.4byte	.LVL1276
+	.4byte	.LVL1294
 	.4byte	0x2093
 	.uleb128 0x31
-	.4byte	.LVL1278
+	.4byte	.LVL1296
 	.4byte	0x21ed
 	.byte	0
 	.uleb128 0x3b
@@ -27139,25 +27278,25 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x1f6f
 	.uleb128 0x31
-	.4byte	.LVL1279
-	.4byte	0x4f66
+	.4byte	.LVL1297
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1280
+	.4byte	.LVL1298
 	.4byte	0x20c4
 	.uleb128 0x31
-	.4byte	.LVL1281
+	.4byte	.LVL1299
 	.4byte	0x2505
 	.uleb128 0x31
-	.4byte	.LVL1282
-	.4byte	0x39f4
+	.4byte	.LVL1300
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1283
-	.4byte	0x372d
+	.4byte	.LVL1301
+	.4byte	0x373d
 	.uleb128 0x31
-	.4byte	.LVL1284
-	.4byte	0x3588
+	.4byte	.LVL1302
+	.4byte	0x3598
 	.uleb128 0x24
-	.4byte	.LVL1285
+	.4byte	.LVL1303
 	.4byte	0x23e4
 	.byte	0
 	.uleb128 0x46
@@ -27180,25 +27319,25 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x12c0
-	.4byte	.LLST167
+	.4byte	.LLST168
 	.uleb128 0x23
 	.4byte	.LASF397
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x30c
-	.4byte	.LLST168
+	.4byte	.LLST169
 	.uleb128 0x2c
 	.4byte	.LASF378
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0x301
-	.4byte	.LLST169
+	.4byte	.LLST170
 	.uleb128 0x2c
 	.4byte	.LASF357
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0x301
-	.4byte	.LLST170
+	.4byte	.LLST171
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x5
@@ -27214,25 +27353,25 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0x301
-	.4byte	.LLST171
+	.4byte	.LLST172
 	.uleb128 0x2c
 	.4byte	.LASF170
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0x301
-	.4byte	.LLST172
+	.4byte	.LLST173
 	.uleb128 0x2c
 	.4byte	.LASF398
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0x30c
-	.4byte	.LLST173
+	.4byte	.LLST174
 	.uleb128 0x2c
 	.4byte	.LASF399
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0x30c
-	.4byte	.LLST174
+	.4byte	.LLST175
 	.uleb128 0x35
 	.4byte	.LASF400
 	.byte	0x5
@@ -27243,7 +27382,7 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xda
 	.4byte	0x1d3f
-	.4byte	.LLST175
+	.4byte	.LLST176
 	.uleb128 0x47
 	.4byte	.LASF401
 	.byte	0x5
@@ -27256,27 +27395,27 @@ check_vpc_table:
 	.4byte	.LASF471
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L976
+	.4byte	.L981
 	.uleb128 0x31
-	.4byte	.LVL773
+	.4byte	.LVL790
 	.4byte	0x2093
 	.uleb128 0x31
-	.4byte	.LVL781
+	.4byte	.LVL798
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL795
-	.4byte	0x4595
+	.4byte	.LVL812
+	.4byte	0x454e
 	.uleb128 0x31
-	.4byte	.LVL803
-	.4byte	0x313e
+	.4byte	.LVL820
+	.4byte	0x314e
 	.uleb128 0x31
-	.4byte	.LVL805
+	.4byte	.LVL822
 	.4byte	0x21ed
 	.uleb128 0x31
-	.4byte	.LVL807
-	.4byte	0x422b
+	.4byte	.LVL824
+	.4byte	0x4222
 	.uleb128 0x31
-	.4byte	.LVL808
+	.4byte	.LVL825
 	.4byte	0x2093
 	.byte	0
 	.uleb128 0x49
@@ -27289,13 +27428,13 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x20c4
 	.uleb128 0x31
-	.4byte	.LVL767
+	.4byte	.LVL784
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL768
+	.4byte	.LVL785
 	.4byte	0x17c6
 	.uleb128 0x24
-	.4byte	.LVL769
+	.4byte	.LVL786
 	.4byte	0x230f
 	.byte	0
 	.uleb128 0x22
@@ -27313,7 +27452,7 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x64
-	.4byte	.LLST250
+	.4byte	.LLST251
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
@@ -27329,13 +27468,13 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x72
 	.4byte	0x30c
-	.4byte	.LLST251
+	.4byte	.LLST252
 	.uleb128 0x2c
 	.4byte	.LASF407
 	.byte	0x5
 	.byte	0x73
 	.4byte	0x30c
-	.4byte	.LLST252
+	.4byte	.LLST253
 	.uleb128 0x35
 	.4byte	.LASF396
 	.byte	0x5
@@ -27346,61 +27485,61 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x12f9
-	.4byte	.LLST253
+	.4byte	.LLST254
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x21e8
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7428
+	.4byte	__func__.7373
 	.uleb128 0x31
-	.4byte	.LVL1239
+	.4byte	.LVL1257
 	.4byte	0x1f78
 	.uleb128 0x31
-	.4byte	.LVL1241
-	.4byte	0x372d
+	.4byte	.LVL1259
+	.4byte	0x373d
 	.uleb128 0x31
-	.4byte	.LVL1242
-	.4byte	0x4b59
+	.4byte	.LVL1260
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1243
-	.4byte	0x499b
+	.4byte	.LVL1261
+	.4byte	0x4954
 	.uleb128 0x31
-	.4byte	.LVL1247
-	.4byte	0x4f66
+	.4byte	.LVL1265
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1248
-	.4byte	0x671f
+	.4byte	.LVL1266
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1250
+	.4byte	.LVL1268
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1251
-	.4byte	0x4206
+	.4byte	.LVL1269
+	.4byte	0x41fd
 	.uleb128 0x31
-	.4byte	.LVL1253
-	.4byte	0x39f4
+	.4byte	.LVL1271
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1254
-	.4byte	0x3588
+	.4byte	.LVL1272
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1256
-	.4byte	0x671f
+	.4byte	.LVL1274
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1257
-	.4byte	0x3929
+	.4byte	.LVL1275
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1258
-	.4byte	0x4561
+	.4byte	.LVL1276
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1259
-	.4byte	0x3929
+	.4byte	.LVL1277
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1260
+	.4byte	.LVL1278
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1261
-	.4byte	0x422b
+	.4byte	.LVL1279
+	.4byte	0x4222
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
@@ -27425,34 +27564,34 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x30c
-	.4byte	.LLST76
+	.4byte	.LLST75
 	.uleb128 0x23
 	.4byte	.LASF181
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x30c
-	.4byte	.LLST77
+	.4byte	.LLST76
 	.uleb128 0x2b
 	.ascii	"lpa\000"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x30c
-	.4byte	.LLST78
+	.4byte	.LLST77
 	.uleb128 0x2c
 	.4byte	.LASF412
 	.byte	0x5
 	.byte	0x56
 	.4byte	0x301
-	.4byte	.LLST79
+	.4byte	.LLST78
 	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x57
 	.4byte	0x301
-	.4byte	.LLST80
+	.4byte	.LLST79
 	.uleb128 0x31
-	.4byte	.LVL326
-	.4byte	0x4561
+	.4byte	.LVL332
+	.4byte	0x451a
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF413
@@ -27469,7 +27608,7 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x49
 	.4byte	0x301
-	.4byte	.LLST75
+	.4byte	.LLST74
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
@@ -27562,7 +27701,7 @@ check_vpc_table:
 	.uleb128 0x3b
 	.4byte	.LASF419
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac3
 	.4byte	0x64
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
@@ -27572,28 +27711,28 @@ check_vpc_table:
 	.uleb128 0x44
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac3
 	.4byte	0x301
-	.4byte	.LLST191
+	.4byte	.LLST192
 	.uleb128 0x3f
 	.ascii	"ret\000"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac5
 	.4byte	0x64
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x239f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7358
+	.4byte	__func__.7303
 	.uleb128 0x31
-	.4byte	.LVL886
-	.4byte	0x671f
+	.4byte	.LVL903
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL888
-	.4byte	0x671f
+	.4byte	.LVL905
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL890
+	.4byte	.LVL907
 	.4byte	0x23a4
 	.byte	0
 	.uleb128 0xc
@@ -27608,14 +27747,14 @@ check_vpc_table:
 	.uleb128 0x3c
 	.4byte	.LASF420
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xaae
 	.4byte	0x64
 	.byte	0x1
 	.4byte	0x23cf
 	.uleb128 0x3d
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xaae
 	.4byte	0x301
 	.uleb128 0x41
 	.4byte	.LASF362
@@ -27634,7 +27773,7 @@ check_vpc_table:
 	.uleb128 0x3b
 	.4byte	.LASF421
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa8e
 	.4byte	0x30c
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
@@ -27644,19 +27783,19 @@ check_vpc_table:
 	.uleb128 0x44
 	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa8e
 	.4byte	0x12c0
-	.4byte	.LLST73
+	.4byte	.LLST72
 	.uleb128 0x45
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa90
 	.4byte	0x301
-	.4byte	.LLST74
+	.4byte	.LLST73
 	.uleb128 0x1f
 	.4byte	.LASF423
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa91
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x56
@@ -27665,24 +27804,24 @@ check_vpc_table:
 	.4byte	0x21e8
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7338
+	.4byte	__func__.7283
 	.uleb128 0x31
-	.4byte	.LVL311
-	.4byte	0x671f
+	.4byte	.LVL317
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL312
-	.4byte	0x671f
+	.4byte	.LVL318
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL313
-	.4byte	0x671f
+	.4byte	.LVL319
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL316
-	.4byte	0x671f
+	.4byte	.LVL322
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF424
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa76
 	.4byte	0x64
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
@@ -27692,13 +27831,13 @@ check_vpc_table:
 	.uleb128 0x44
 	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa76
 	.4byte	0x12c0
-	.4byte	.LLST236
+	.4byte	.LLST237
 	.uleb128 0x1f
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa78
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x55
@@ -27707,31 +27846,31 @@ check_vpc_table:
 	.4byte	0x2500
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7331
+	.4byte	__func__.7276
 	.uleb128 0x31
-	.4byte	.LVL1171
-	.4byte	0x671f
+	.4byte	.LVL1189
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1172
-	.4byte	0x4206
+	.4byte	.LVL1190
+	.4byte	0x41fd
 	.uleb128 0x31
-	.4byte	.LVL1173
+	.4byte	.LVL1191
 	.4byte	0x23a4
 	.uleb128 0x31
-	.4byte	.LVL1174
+	.4byte	.LVL1192
 	.4byte	0x2505
 	.uleb128 0x31
-	.4byte	.LVL1175
-	.4byte	0x39f4
+	.4byte	.LVL1193
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1176
-	.4byte	0x372d
+	.4byte	.LVL1194
+	.4byte	0x373d
 	.uleb128 0x31
-	.4byte	.LVL1177
-	.4byte	0x3588
+	.4byte	.LVL1195
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1179
-	.4byte	0x422b
+	.4byte	.LVL1197
+	.4byte	0x4222
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
@@ -27745,7 +27884,7 @@ check_vpc_table:
 	.uleb128 0x4d
 	.4byte	.LASF425
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa12
 	.4byte	0x64
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
@@ -27755,121 +27894,121 @@ check_vpc_table:
 	.uleb128 0x4e
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa12
 	.4byte	0x12c0
-	.4byte	.LLST183
+	.4byte	.LLST184
 	.uleb128 0x45
 	.4byte	.LASF426
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa14
 	.4byte	0x301
-	.4byte	.LLST184
+	.4byte	.LLST185
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x301
-	.4byte	.LLST185
+	.4byte	.LLST186
 	.uleb128 0x3f
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF427
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa16
 	.4byte	0x64
-	.4byte	.LLST186
+	.4byte	.LLST187
 	.uleb128 0x45
 	.4byte	.LASF428
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa17
 	.4byte	0x301
-	.4byte	.LLST187
+	.4byte	.LLST188
 	.uleb128 0x40
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa18
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x266f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7310
+	.4byte	__func__.7255
 	.uleb128 0x4f
-	.4byte	0x3409
-	.4byte	.LBB428
-	.4byte	.Ldebug_ranges0+0x188
+	.4byte	0x3419
+	.4byte	.LBB452
+	.4byte	.Ldebug_ranges0+0x1e8
 	.byte	0x2
-	.2byte	0xa18
+	.2byte	0xa48
 	.4byte	0x25ce
 	.uleb128 0x2e
-	.4byte	0x3422
+	.4byte	0x3432
 	.uleb128 0x2e
-	.4byte	0x3416
+	.4byte	0x3426
 	.uleb128 0x31
-	.4byte	.LVL858
-	.4byte	0x5c75
+	.4byte	.LVL875
+	.4byte	0x5c2e
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL834
-	.4byte	0x671f
+	.4byte	.LVL851
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL838
-	.4byte	0x4027
+	.4byte	.LVL855
+	.4byte	0x4037
 	.uleb128 0x31
-	.4byte	.LVL839
-	.4byte	0x671f
+	.4byte	.LVL856
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL840
-	.4byte	0x2c45
+	.4byte	.LVL857
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL841
-	.4byte	0x4206
+	.4byte	.LVL858
+	.4byte	0x41fd
 	.uleb128 0x31
-	.4byte	.LVL842
-	.4byte	0x671f
+	.4byte	.LVL859
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL845
-	.4byte	0x671f
+	.4byte	.LVL862
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL846
-	.4byte	0x671f
+	.4byte	.LVL863
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL847
-	.4byte	0x671f
+	.4byte	.LVL864
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL848
-	.4byte	0x3409
+	.4byte	.LVL865
+	.4byte	0x3419
 	.uleb128 0x31
-	.4byte	.LVL850
+	.4byte	.LVL867
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL852
-	.4byte	0x27a4
+	.4byte	.LVL869
+	.4byte	0x27b4
 	.uleb128 0x31
-	.4byte	.LVL853
-	.4byte	0x499b
+	.4byte	.LVL870
+	.4byte	0x4954
 	.uleb128 0x31
-	.4byte	.LVL855
-	.4byte	0x4206
+	.4byte	.LVL872
+	.4byte	0x41fd
 	.uleb128 0x31
-	.4byte	.LVL860
-	.4byte	0x4b59
+	.4byte	.LVL877
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL863
-	.4byte	0x671f
+	.4byte	.LVL880
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
@@ -27883,125 +28022,131 @@ check_vpc_table:
 	.uleb128 0x3c
 	.4byte	.LASF430
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa09
 	.4byte	0x64
 	.byte	0x1
 	.4byte	0x2692
 	.uleb128 0x3d
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa09
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x4d
 	.4byte	.LASF431
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c0
 	.4byte	0x301
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x272c
+	.4byte	0x273c
 	.uleb128 0x1f
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c2
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x3e
 	.4byte	.LASF433
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c3
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF434
 	.byte	0x2
-	.2byte	0x992
+	.2byte	0x9c4
 	.4byte	0x301
-	.4byte	.LLST68
+	.4byte	.LLST66
 	.uleb128 0x45
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x993
+	.2byte	0x9c5
 	.4byte	0x1210
-	.4byte	.LLST69
+	.4byte	.LLST67
 	.uleb128 0x45
 	.4byte	.LASF436
 	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c6
 	.4byte	0x301
-	.4byte	.LLST70
+	.4byte	.LLST68
 	.uleb128 0x45
 	.4byte	.LASF437
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9c7
 	.4byte	0x301
-	.4byte	.LLST71
+	.4byte	.LLST69
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9c8
 	.4byte	0x30c
+	.uleb128 0x45
+	.4byte	.LASF114
+	.byte	0x2
+	.2byte	0x9c9
+	.4byte	0x301
+	.4byte	.LLST70
 	.uleb128 0x31
-	.4byte	.LVL293
-	.4byte	0x272c
+	.4byte	.LVL294
+	.4byte	0x273c
 	.uleb128 0x31
-	.4byte	.LVL299
-	.4byte	0x277b
+	.4byte	.LVL301
+	.4byte	0x278b
 	.uleb128 0x31
-	.4byte	.LVL303
-	.4byte	0x671f
+	.4byte	.LVL307
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF438
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ab
 	.4byte	0x301
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x277b
+	.4byte	0x278b
 	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ab
 	.4byte	0x301
-	.4byte	.LLST63
+	.4byte	.LLST61
 	.uleb128 0x1f
 	.4byte	.LASF439
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9ad
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3e
 	.4byte	.LASF392
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9ae
 	.4byte	0x301
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9af
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF440
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a2
 	.4byte	0x301
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27a4
+	.4byte	0x27b4
 	.uleb128 0x1f
 	.4byte	.LASF434
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a4
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x50
@@ -28009,81 +28154,81 @@ check_vpc_table:
 	.uleb128 0x4d
 	.4byte	.LASF441
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x992
 	.4byte	0x64
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2805
+	.4byte	0x2815
 	.uleb128 0x44
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x992
 	.4byte	0x301
-	.4byte	.LLST62
+	.4byte	.LLST60
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x994
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x994
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF165
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x995
 	.4byte	0x301
 	.uleb128 0x31
 	.4byte	.LVL200
-	.4byte	0x45c9
+	.4byte	0x4582
 	.uleb128 0x31
 	.4byte	.LVL201
-	.4byte	0x4afe
+	.4byte	0x4ab7
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LASF442
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x282f
+	.4byte	0x283f
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x64
 	.uleb128 0x28
 	.uleb128 0x3e
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x928
+	.2byte	0x95a
 	.4byte	0x12c0
 	.byte	0
 	.byte	0
 	.uleb128 0x50
 	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x289a
+	.4byte	0x28aa
 	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x64
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x51
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
@@ -28091,48 +28236,48 @@ check_vpc_table:
 	.uleb128 0x3e
 	.4byte	.LASF444
 	.byte	0x2
-	.2byte	0x8e6
+	.2byte	0x918
 	.4byte	0x1d3f
 	.uleb128 0x31
-	.4byte	.LVL634
-	.4byte	0x671f
+	.4byte	.LVL651
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL636
-	.4byte	0x3929
+	.4byte	.LVL653
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL637
-	.4byte	0x671f
+	.4byte	.LVL654
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL638
+	.4byte	.LVL655
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL639
-	.4byte	0x671f
+	.4byte	.LVL656
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x50
 	.4byte	.LASF445
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.4byte	.LFB240
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29b3
+	.4byte	0x29c3
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0x30c
-	.4byte	.LLST148
+	.4byte	.LLST149
 	.uleb128 0x1f
 	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
@@ -28140,41 +28285,41 @@ check_vpc_table:
 	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF447
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0x301
-	.4byte	.LLST149
+	.4byte	.LLST150
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x29c3
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7226
+	.4byte	__func__.7170
 	.uleb128 0x53
-	.4byte	.LBB389
-	.4byte	.LBE389-.LBB389
-	.4byte	0x292b
+	.4byte	.LBB413
+	.4byte	.LBE413-.LBB413
+	.4byte	0x293b
 	.uleb128 0x45
 	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0x301
-	.4byte	.LLST150
+	.4byte	.LLST151
 	.uleb128 0x31
-	.4byte	.LVL654
-	.4byte	0x671f
+	.4byte	.LVL671
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB386
-	.4byte	.LBE386-.LBB386
+	.4byte	.LBB410
+	.4byte	.LBE410-.LBB410
 	.byte	0x2
-	.2byte	0x8b7
-	.4byte	0x2985
+	.2byte	0x8e9
+	.4byte	0x2995
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -28182,8 +28327,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB387
-	.4byte	.LBE387-.LBB387
+	.4byte	.LBB411
+	.4byte	.LBE411-.LBB411
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -28191,68 +28336,68 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB388
-	.4byte	.LBE388-.LBB388
+	.4byte	.LBB412
+	.4byte	.LBE412-.LBB412
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL650
-	.4byte	0x672a
+	.4byte	.LVL667
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL649
-	.4byte	0x671f
+	.4byte	.LVL666
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL655
-	.4byte	0x671f
+	.4byte	.LVL672
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL657
-	.4byte	0x3929
+	.4byte	.LVL674
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL658
-	.4byte	0x4561
+	.4byte	.LVL675
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL660
-	.4byte	0x671f
+	.4byte	.LVL677
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x29c3
+	.4byte	0x29d3
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xd
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x29b3
+	.4byte	0x29c3
 	.uleb128 0x50
 	.4byte	.LASF448
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.4byte	.LFB239
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2a6f
+	.4byte	0x2a7f
 	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0x301
-	.4byte	.LLST234
+	.4byte	.LLST235
 	.uleb128 0x52
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0x30c
-	.4byte	.LLST235
+	.4byte	.LLST236
 	.uleb128 0x1f
 	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0x30c
 	.uleb128 0x2
 	.byte	0x91
@@ -28260,67 +28405,67 @@ check_vpc_table:
 	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0x301
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x2a7f
+	.4byte	0x2a8f
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7210
+	.4byte	__func__.7154
 	.uleb128 0x31
-	.4byte	.LVL1157
-	.4byte	0x671f
+	.4byte	.LVL1175
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1158
+	.4byte	.LVL1176
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1162
-	.4byte	0x3929
+	.4byte	.LVL1180
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1163
-	.4byte	0x4561
+	.4byte	.LVL1181
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1165
-	.4byte	0x671f
+	.4byte	.LVL1183
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1166
+	.4byte	.LVL1184
 	.4byte	0x23a4
 	.uleb128 0x31
-	.4byte	.LVL1167
-	.4byte	0x39f4
+	.4byte	.LVL1185
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1168
-	.4byte	0x3588
+	.4byte	.LVL1186
+	.4byte	0x3598
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x2a7f
+	.4byte	0x2a8f
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x14
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x2a6f
+	.4byte	0x2a7f
 	.uleb128 0x50
 	.4byte	.LASF449
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.4byte	.LFB238
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2af9
+	.4byte	0x2b09
 	.uleb128 0x44
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.4byte	0x12c0
-	.4byte	.LLST212
+	.4byte	.LLST213
 	.uleb128 0x1f
 	.4byte	.LASF450
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0x32d
 	.uleb128 0x2
 	.byte	0x91
@@ -28328,44 +28473,44 @@ check_vpc_table:
 	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x86e
+	.2byte	0x89f
 	.4byte	0x1d3f
 	.uleb128 0x3e
 	.4byte	.LASF451
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x64
 	.uleb128 0x3e
 	.4byte	.LASF174
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0x30c
 	.uleb128 0x31
-	.4byte	.LVL1036
+	.4byte	.LVL1054
 	.4byte	0x23e4
 	.uleb128 0x31
-	.4byte	.LVL1037
+	.4byte	.LVL1055
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1038
+	.4byte	.LVL1056
 	.4byte	0x232e
 	.byte	0
 	.uleb128 0x55
 	.4byte	.LASF452
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.4byte	.LFB237
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b73
+	.4byte	0x2b83
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB486
-	.4byte	.LBE486-.LBB486
+	.4byte	.LBB510
+	.4byte	.LBE510-.LBB510
 	.byte	0x2
-	.2byte	0x855
-	.4byte	0x2b69
+	.2byte	0x886
+	.4byte	0x2b79
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -28373,8 +28518,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB487
-	.4byte	.LBE487-.LBB487
+	.4byte	.LBB511
+	.4byte	.LBE511-.LBB511
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -28382,772 +28527,772 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB488
-	.4byte	.LBE488-.LBB488
+	.4byte	.LBB512
+	.4byte	.LBE512-.LBB512
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL1139
-	.4byte	0x672a
+	.4byte	.LVL1157
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1138
-	.4byte	0x377a
+	.4byte	.LVL1156
+	.4byte	0x378a
 	.byte	0
 	.uleb128 0x46
 	.4byte	.LASF454
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x4d
 	.4byte	.LASF455
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x64
 	.4byte	.LFB235
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c30
+	.4byte	0x2c40
 	.uleb128 0x45
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x301
-	.4byte	.LLST164
+	.4byte	.LLST165
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF165
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF456
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0x301
-	.4byte	.LLST165
+	.4byte	.LLST166
 	.uleb128 0x45
 	.4byte	.LASF457
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0x301
-	.4byte	.LLST166
+	.4byte	.LLST167
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x2c40
+	.4byte	0x2c50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7185
+	.4byte	__func__.7129
 	.uleb128 0x31
-	.4byte	.LVL753
+	.4byte	.LVL770
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL755
-	.4byte	0x45c9
+	.4byte	.LVL772
+	.4byte	0x4582
 	.uleb128 0x31
-	.4byte	.LVL756
-	.4byte	0x4afe
+	.4byte	.LVL773
+	.4byte	0x4ab7
 	.uleb128 0x31
-	.4byte	.LVL760
-	.4byte	0x422b
+	.4byte	.LVL777
+	.4byte	0x4222
 	.uleb128 0x31
-	.4byte	.LVL763
-	.4byte	0x4206
+	.4byte	.LVL780
+	.4byte	0x41fd
 	.uleb128 0x31
-	.4byte	.LVL765
-	.4byte	0x671f
+	.4byte	.LVL782
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x2c40
+	.4byte	0x2c50
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x11
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x2c30
+	.4byte	0x2c40
 	.uleb128 0x3b
 	.4byte	.LASF458
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x64
 	.4byte	.LFB234
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cb0
+	.4byte	0x2cc0
 	.uleb128 0x4e
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x12c0
-	.4byte	.LLST61
+	.4byte	.LLST59
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0x301
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7164
+	.4byte	__func__.7108
 	.uleb128 0x31
 	.4byte	.LVL193
-	.4byte	0x671f
+	.4byte	0x67f2
 	.uleb128 0x31
 	.4byte	.LVL195
-	.4byte	0x45c9
+	.4byte	0x4582
 	.uleb128 0x31
 	.4byte	.LVL196
-	.4byte	0x4afe
+	.4byte	0x4ab7
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF459
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x64
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d01
+	.4byte	0x2d11
 	.uleb128 0x31
-	.4byte	.LVL1265
-	.4byte	0x2d27
+	.4byte	.LVL1283
+	.4byte	0x2d37
 	.uleb128 0x31
-	.4byte	.LVL1266
-	.4byte	0x2d01
+	.4byte	.LVL1284
+	.4byte	0x2d11
 	.uleb128 0x31
-	.4byte	.LVL1267
-	.4byte	0x2d27
+	.4byte	.LVL1285
+	.4byte	0x2d37
 	.uleb128 0x31
-	.4byte	.LVL1268
-	.4byte	0x2d01
+	.4byte	.LVL1286
+	.4byte	0x2d11
 	.uleb128 0x31
-	.4byte	.LVL1269
+	.4byte	.LVL1287
 	.4byte	0x1f6f
 	.uleb128 0x31
-	.4byte	.LVL1270
+	.4byte	.LVL1288
 	.4byte	0x232e
 	.byte	0
 	.uleb128 0x56
 	.4byte	.LASF495
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x2d27
+	.4byte	0x2d37
 	.uleb128 0x3d
 	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.4byte	0x12c0
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF460
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x64
 	.4byte	.LFB231
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3072
+	.4byte	0x3082
 	.uleb128 0x44
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x12c0
-	.4byte	.LLST196
+	.4byte	.LLST197
 	.uleb128 0x45
 	.4byte	.LASF461
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0x301
-	.4byte	.LLST197
+	.4byte	.LLST198
 	.uleb128 0x45
 	.4byte	.LASF462
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0x301
-	.4byte	.LLST198
+	.4byte	.LLST199
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF172
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x301
-	.4byte	.LLST199
+	.4byte	.LLST200
 	.uleb128 0x3e
 	.4byte	.LASF170
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF463
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0x301
-	.4byte	.LLST200
+	.4byte	.LLST201
 	.uleb128 0x45
 	.4byte	.LASF464
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0x301
-	.4byte	.LLST201
+	.4byte	.LLST202
 	.uleb128 0x3e
 	.4byte	.LASF378
 	.byte	0x2
-	.2byte	0x67c
+	.2byte	0x6ad
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF465
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x64
-	.4byte	.LLST202
+	.4byte	.LLST203
 	.uleb128 0x3e
 	.4byte	.LASF466
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x64
 	.uleb128 0x3e
 	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x301
-	.4byte	.LLST203
+	.4byte	.LLST204
 	.uleb128 0x3f
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x30c
-	.4byte	.LLST204
+	.4byte	.LLST205
 	.uleb128 0x45
 	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x30c
-	.4byte	.LLST205
+	.4byte	.LLST206
 	.uleb128 0x45
 	.4byte	.LASF406
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x30c
-	.4byte	.LLST206
+	.4byte	.LLST207
 	.uleb128 0x45
 	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x30c
-	.4byte	.LLST207
+	.4byte	.LLST208
 	.uleb128 0x45
 	.4byte	.LASF412
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0x301
-	.4byte	.LLST208
+	.4byte	.LLST209
 	.uleb128 0x3e
 	.4byte	.LASF467
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF468
 	.byte	0x2
-	.2byte	0x681
+	.2byte	0x6b2
 	.4byte	0x30c
-	.4byte	.LLST209
+	.4byte	.LLST210
 	.uleb128 0x3e
 	.4byte	.LASF469
 	.byte	0x2
-	.2byte	0x682
+	.2byte	0x6b3
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x683
+	.2byte	0x6b4
 	.4byte	0x1d3f
 	.uleb128 0x3e
 	.4byte	.LASF470
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0x30c
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x3082
+	.4byte	0x3092
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7107
+	.4byte	__func__.7051
 	.uleb128 0x48
 	.4byte	.LASF472
 	.byte	0x2
-	.2byte	0x713
-	.4byte	.L1135
+	.2byte	0x744
+	.4byte	.L1140
 	.uleb128 0x48
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0x71b
-	.4byte	.L1147
+	.2byte	0x74c
+	.4byte	.L1152
 	.uleb128 0x48
 	.4byte	.LASF473
 	.byte	0x2
-	.2byte	0x7ce
-	.4byte	.L1155
+	.2byte	0x7ff
+	.4byte	.L1160
 	.uleb128 0x40
 	.4byte	.LASF474
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x53
-	.4byte	.LBB449
-	.4byte	.LBE449-.LBB449
-	.4byte	0x2f01
+	.4byte	.LBB473
+	.4byte	.LBE473-.LBB473
+	.4byte	0x2f11
 	.uleb128 0x3e
 	.4byte	.LASF475
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF476
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0x30c
 	.uleb128 0x31
-	.4byte	.LVL954
+	.4byte	.LVL971
 	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x1d0
-	.4byte	0x2f73
+	.4byte	.Ldebug_ranges0+0x230
+	.4byte	0x2f83
 	.uleb128 0x45
 	.4byte	.LASF477
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0x30c
-	.4byte	.LLST210
+	.4byte	.LLST211
 	.uleb128 0x45
 	.4byte	.LASF478
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0x30c
-	.4byte	.LLST211
+	.4byte	.LLST212
 	.uleb128 0x31
-	.4byte	.LVL996
+	.4byte	.LVL1013
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL999
+	.4byte	.LVL1016
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1004
-	.4byte	0x3929
+	.4byte	.LVL1021
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1006
-	.4byte	0x451e
+	.4byte	.LVL1023
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL1008
-	.4byte	0x3087
+	.4byte	.LVL1025
+	.4byte	0x3097
 	.uleb128 0x31
-	.4byte	.LVL1011
+	.4byte	.LVL1028
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1013
-	.4byte	0x451e
+	.4byte	.LVL1030
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL1014
-	.4byte	0x451e
+	.4byte	.LVL1031
+	.4byte	0x44d7
 	.byte	0
 	.uleb128 0x53
-	.4byte	.LBB453
-	.4byte	.LBE453-.LBB453
-	.4byte	0x2fb4
+	.4byte	.LBB477
+	.4byte	.LBE477-.LBB477
+	.4byte	0x2fc4
 	.uleb128 0x3e
 	.4byte	.LASF479
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF478
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0x30c
 	.uleb128 0x31
-	.4byte	.LVL1019
+	.4byte	.LVL1036
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1020
-	.4byte	0x451e
+	.4byte	.LVL1037
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL1021
-	.4byte	0x3929
+	.4byte	.LVL1038
+	.4byte	0x3939
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL915
-	.4byte	0x4486
+	.4byte	.LVL932
+	.4byte	0x443f
 	.uleb128 0x31
-	.4byte	.LVL917
+	.4byte	.LVL934
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL922
-	.4byte	0x4595
+	.4byte	.LVL939
+	.4byte	0x454e
 	.uleb128 0x31
-	.4byte	.LVL930
-	.4byte	0x313e
+	.4byte	.LVL947
+	.4byte	0x314e
 	.uleb128 0x31
-	.4byte	.LVL935
-	.4byte	0x671f
+	.4byte	.LVL952
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL937
-	.4byte	0x671f
+	.4byte	.LVL954
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL941
-	.4byte	0x451e
+	.4byte	.LVL958
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL957
-	.4byte	0x369b
+	.4byte	.LVL974
+	.4byte	0x36ab
 	.uleb128 0x31
-	.4byte	.LVL962
+	.4byte	.LVL979
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL971
-	.4byte	0x4595
+	.4byte	.LVL988
+	.4byte	0x454e
 	.uleb128 0x31
-	.4byte	.LVL981
+	.4byte	.LVL998
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL986
-	.4byte	0x451e
+	.4byte	.LVL1003
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL991
-	.4byte	0x671f
+	.4byte	.LVL1008
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL994
-	.4byte	0x3929
+	.4byte	.LVL1011
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL995
-	.4byte	0x451e
+	.4byte	.LVL1012
+	.4byte	0x44d7
 	.uleb128 0x31
-	.4byte	.LVL1000
-	.4byte	0x4561
+	.4byte	.LVL1017
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1002
-	.4byte	0x671f
+	.4byte	.LVL1019
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1017
-	.4byte	0x3929
+	.4byte	.LVL1034
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1018
-	.4byte	0x4561
+	.4byte	.LVL1035
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1023
-	.4byte	0x671f
+	.4byte	.LVL1040
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1026
+	.4byte	.LVL1043
 	.4byte	0x232e
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x3082
+	.4byte	0x3092
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x15
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x3072
+	.4byte	0x3082
 	.uleb128 0x50
 	.4byte	.LASF480
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x313e
+	.4byte	0x314e
 	.uleb128 0x4e
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0x30c
-	.4byte	.LLST141
+	.4byte	.LLST142
 	.uleb128 0x44
 	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0x30c
-	.4byte	.LLST142
+	.4byte	.LLST143
 	.uleb128 0x45
 	.4byte	.LASF412
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0x301
-	.4byte	.LLST143
+	.4byte	.LLST144
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7073
+	.4byte	__func__.7017
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x138
-	.4byte	0x312b
+	.4byte	.Ldebug_ranges0+0x198
+	.4byte	0x313b
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF392
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0x301
-	.4byte	.LLST144
+	.4byte	.LLST145
 	.uleb128 0x45
 	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0x301
-	.4byte	.LLST145
+	.4byte	.LLST146
 	.uleb128 0x31
-	.4byte	.LVL624
-	.4byte	0x4087
+	.4byte	.LVL641
+	.4byte	0x4097
 	.uleb128 0x31
-	.4byte	.LVL625
-	.4byte	0x671f
+	.4byte	.LVL642
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL626
-	.4byte	0x4206
+	.4byte	.LVL643
+	.4byte	0x41fd
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL619
-	.4byte	0x4561
+	.4byte	.LVL636
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL631
-	.4byte	0x3929
+	.4byte	.LVL648
+	.4byte	0x3939
 	.byte	0
 	.uleb128 0x50
 	.4byte	.LASF481
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	.LFB229
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x318f
+	.4byte	0x319f
 	.uleb128 0x57
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x12c0
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF170
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x301
-	.4byte	.LLST59
+	.4byte	.LLST57
 	.uleb128 0x44
 	.4byte	.LASF172
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x301
-	.4byte	.LLST60
+	.4byte	.LLST58
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF482
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x64
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31bc
+	.4byte	0x31cc
 	.uleb128 0x31
-	.4byte	.LVL742
-	.4byte	0x31bc
+	.4byte	.LVL759
+	.4byte	0x31cc
 	.uleb128 0x31
-	.4byte	.LVL743
-	.4byte	0x3215
+	.4byte	.LVL760
+	.4byte	0x3225
 	.byte	0
 	.uleb128 0x50
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31f1
+	.4byte	0x3201
 	.uleb128 0x3e
 	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0x301
 	.uleb128 0x31
-	.4byte	.LVL740
+	.4byte	.LVL757
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL741
+	.4byte	.LVL758
 	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF484
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x64
 	.4byte	.LFB226
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3215
+	.4byte	0x3225
 	.uleb128 0x31
-	.4byte	.LVL739
-	.4byte	0x3215
+	.4byte	.LVL756
+	.4byte	0x3225
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF485
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x64
 	.4byte	.LFB225
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3323
+	.4byte	0x3333
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x3323
-	.4byte	.LLST157
+	.2byte	0x5ea
+	.4byte	0x3333
+	.4byte	.LLST158
 	.uleb128 0x45
 	.4byte	.LASF487
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0x322
-	.4byte	.LLST158
+	.4byte	.LLST159
 	.uleb128 0x3e
 	.4byte	.LASF85
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0x322
 	.uleb128 0x45
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0x322
-	.4byte	.LLST159
+	.4byte	.LLST160
 	.uleb128 0x3e
 	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0x539
-	.4byte	.LLST160
+	.4byte	.LLST161
 	.uleb128 0x45
 	.4byte	.LASF98
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x630
-	.4byte	.LLST161
+	.4byte	.LLST162
 	.uleb128 0x45
 	.4byte	.LASF99
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0x539
-	.4byte	.LLST162
+	.4byte	.LLST163
 	.uleb128 0x1f
 	.4byte	.LASF95
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x45
 	.4byte	.LASF490
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0x301
-	.4byte	.LLST163
+	.4byte	.LLST164
 	.uleb128 0x3e
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x3329
+	.2byte	0x5f4
+	.4byte	0x3339
 	.uleb128 0x31
-	.4byte	.LVL704
+	.4byte	.LVL721
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL712
-	.4byte	0x4486
+	.4byte	.LVL729
+	.4byte	0x443f
 	.uleb128 0x31
-	.4byte	.LVL719
-	.4byte	0x3dcf
+	.4byte	.LVL736
+	.4byte	0x3ddf
 	.uleb128 0x31
-	.4byte	.LVL720
-	.4byte	0x3d77
+	.4byte	.LVL737
+	.4byte	0x3d87
 	.uleb128 0x31
-	.4byte	.LVL721
-	.4byte	0x3cac
+	.4byte	.LVL738
+	.4byte	0x3cbc
 	.uleb128 0x31
-	.4byte	.LVL722
-	.4byte	0x3cac
+	.4byte	.LVL739
+	.4byte	0x3cbc
 	.uleb128 0x31
-	.4byte	.LVL724
+	.4byte	.LVL741
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL730
+	.4byte	.LVL747
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL733
+	.4byte	.LVL750
 	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x8
@@ -29159,166 +29304,166 @@ check_vpc_table:
 	.uleb128 0x4d
 	.4byte	.LASF492
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x64
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x33de
+	.4byte	0x33ee
 	.uleb128 0x45
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0x322
-	.4byte	.LLST296
+	.4byte	.LLST297
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7010
+	.4byte	__func__.6954
 	.uleb128 0x31
-	.4byte	.LVL1544
+	.4byte	.LVL1562
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1547
-	.4byte	0x4486
+	.4byte	.LVL1565
+	.4byte	0x443f
 	.uleb128 0x31
-	.4byte	.LVL1549
-	.4byte	0x671f
+	.4byte	.LVL1567
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1550
-	.4byte	0x671f
+	.4byte	.LVL1568
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1551
+	.4byte	.LVL1569
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1552
+	.4byte	.LVL1570
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1553
+	.4byte	.LVL1571
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1556
-	.4byte	0x671f
+	.4byte	.LVL1574
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1557
-	.4byte	0x2c45
+	.4byte	.LVL1575
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1558
-	.4byte	0x2c45
+	.4byte	.LVL1576
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1559
-	.4byte	0x2c45
+	.4byte	.LVL1577
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1560
-	.4byte	0x2c45
+	.4byte	.LVL1578
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1562
+	.4byte	.LVL1580
 	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF493
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x64
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3409
+	.4byte	0x3419
 	.uleb128 0x44
 	.4byte	.LASF494
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x301
-	.4byte	.LLST58
+	.4byte	.LLST56
 	.byte	0
 	.uleb128 0x56
 	.4byte	.LASF496
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x342f
+	.4byte	0x343f
 	.uleb128 0x3d
 	.4byte	.LASF494
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x301
 	.uleb128 0x3d
 	.4byte	.LASF372
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x64
 	.byte	0
 	.uleb128 0x43
 	.4byte	.LASF498
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x64
 	.byte	0x1
 	.uleb128 0x3b
 	.4byte	.LASF499
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x64
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3588
+	.4byte	0x3598
 	.uleb128 0x3e
 	.4byte	.LASF376
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF500
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0x301
-	.4byte	.LLST154
+	.4byte	.LLST155
 	.uleb128 0x3e
 	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF357
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0x301
-	.4byte	.LLST155
+	.4byte	.LLST156
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0x322
 	.uleb128 0x3f
 	.ascii	"j\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0x322
 	.uleb128 0x45
 	.4byte	.LASF501
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x3329
-	.4byte	.LLST156
+	.2byte	0x47c
+	.4byte	0x3339
+	.4byte	.LLST157
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x29c3
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6953
+	.4byte	__func__.6897
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB395
-	.4byte	.LBE395-.LBB395
+	.4byte	.LBB419
+	.4byte	.LBE419-.LBB419
 	.byte	0x2
-	.2byte	0x453
-	.4byte	0x3512
+	.2byte	0x484
+	.4byte	0x3522
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -29326,8 +29471,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB396
-	.4byte	.LBE396-.LBB396
+	.4byte	.LBB420
+	.4byte	.LBE420-.LBB420
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -29335,125 +29480,125 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB397
-	.4byte	.LBE397-.LBB397
+	.4byte	.LBB421
+	.4byte	.LBE421-.LBB421
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL671
+	.4byte	.LVL688
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL672
+	.4byte	.LVL689
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL673
+	.4byte	.LVL690
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL674
+	.4byte	.LVL691
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL678
-	.4byte	0x45c9
+	.4byte	.LVL695
+	.4byte	0x4582
 	.uleb128 0x31
-	.4byte	.LVL679
-	.4byte	0x4afe
+	.4byte	.LVL696
+	.4byte	0x4ab7
 	.uleb128 0x31
-	.4byte	.LVL686
+	.4byte	.LVL703
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL687
+	.4byte	.LVL704
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL688
-	.4byte	0x436e
+	.4byte	.LVL705
+	.4byte	0x436d
 	.uleb128 0x31
-	.4byte	.LVL689
-	.4byte	0x671f
+	.4byte	.LVL706
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL690
-	.4byte	0x671f
+	.4byte	.LVL707
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL691
-	.4byte	0x436e
+	.4byte	.LVL708
+	.4byte	0x436d
 	.uleb128 0x31
-	.4byte	.LVL692
-	.4byte	0x671f
+	.4byte	.LVL709
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF502
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x64
 	.4byte	.LFB219
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3649
+	.4byte	0x3659
 	.uleb128 0x45
 	.4byte	.LASF86
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0x301
-	.4byte	.LLST232
+	.4byte	.LLST233
 	.uleb128 0x3e
 	.4byte	.LASF503
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x3649
+	.2byte	0x41f
+	.4byte	0x3659
 	.uleb128 0x45
 	.4byte	.LASF504
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0x301
-	.4byte	.LLST233
+	.4byte	.LLST234
 	.uleb128 0x40
 	.4byte	.LASF505
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6931
+	.4byte	__func__.6875
 	.uleb128 0x31
-	.4byte	.LVL1142
+	.4byte	.LVL1160
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1143
+	.4byte	.LVL1161
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1144
+	.4byte	.LVL1162
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1145
+	.4byte	.LVL1163
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1146
-	.4byte	0x3709
+	.4byte	.LVL1164
+	.4byte	0x3719
 	.uleb128 0x31
-	.4byte	.LVL1147
+	.4byte	.LVL1165
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1148
-	.4byte	0x4250
+	.4byte	.LVL1166
+	.4byte	0x4247
 	.uleb128 0x31
-	.4byte	.LVL1149
+	.4byte	.LVL1167
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1150
-	.4byte	0x671f
+	.4byte	.LVL1168
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1153
-	.4byte	0x671f
+	.4byte	.LVL1171
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1154
-	.4byte	0x436e
+	.4byte	.LVL1172
+	.4byte	0x436d
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
@@ -29461,181 +29606,181 @@ check_vpc_table:
 	.uleb128 0x56
 	.4byte	.LASF506
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x369b
+	.4byte	0x36ab
 	.uleb128 0x28
 	.uleb128 0x3f
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0x30c
 	.uleb128 0x3f
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF507
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF450
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0x32d
 	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x3bb
+	.2byte	0x3ec
 	.4byte	0x1d3f
 	.byte	0
 	.byte	0
 	.uleb128 0x50
 	.4byte	.LASF508
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.4byte	.LFB217
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3709
+	.4byte	0x3719
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x3323
-	.4byte	.LLST151
+	.2byte	0x3b1
+	.4byte	0x3333
+	.4byte	.LLST152
 	.uleb128 0x52
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0x30c
-	.4byte	.LLST152
+	.4byte	.LLST153
 	.uleb128 0x3e
 	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0x539
-	.4byte	.LLST153
+	.4byte	.LLST154
 	.uleb128 0x31
-	.4byte	.LVL665
+	.4byte	.LVL682
 	.4byte	0x1af8
 	.uleb128 0x24
-	.4byte	.LVL667
-	.4byte	0x3ac6
+	.4byte	.LVL684
+	.4byte	0x3ad6
 	.uleb128 0x31
-	.4byte	.LVL669
+	.4byte	.LVL686
 	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x56
 	.4byte	.LASF509
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x372d
+	.4byte	0x373d
 	.uleb128 0x3d
 	.4byte	.LASF183
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0x30c
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF510
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x64
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x377a
+	.4byte	0x378a
 	.uleb128 0x44
 	.4byte	.LASF511
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x30c
-	.4byte	.LLST224
+	.4byte	.LLST225
 	.uleb128 0x45
 	.4byte	.LASF512
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0x30c
-	.4byte	.LLST225
+	.4byte	.LLST226
 	.uleb128 0x31
-	.4byte	.LVL1117
-	.4byte	0x3850
+	.4byte	.LVL1135
+	.4byte	0x3860
 	.uleb128 0x31
-	.4byte	.LVL1118
-	.4byte	0x2b73
+	.4byte	.LVL1136
+	.4byte	0x2b83
 	.byte	0
 	.uleb128 0x4d
 	.4byte	.LASF513
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x30c
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x384a
+	.4byte	0x385a
 	.uleb128 0x44
 	.4byte	.LASF514
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x30c
-	.4byte	.LLST226
+	.4byte	.LLST227
 	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x30c
-	.4byte	.LLST227
+	.4byte	.LLST228
 	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0x384a
-	.4byte	.LLST228
+	.2byte	0x367
+	.4byte	0x385a
+	.4byte	.LLST229
 	.uleb128 0x52
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0x301
-	.4byte	.LLST229
+	.4byte	.LLST230
 	.uleb128 0x3e
 	.4byte	.LASF517
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0x30c
-	.4byte	.LLST230
+	.4byte	.LLST231
 	.uleb128 0x1f
 	.4byte	.LASF518
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x51
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0x32d
 	.uleb128 0x3
 	.byte	0x91
@@ -29643,25 +29788,25 @@ check_vpc_table:
 	.uleb128 0x45
 	.4byte	.LASF519
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0x30c
-	.4byte	.LLST231
+	.4byte	.LLST232
 	.uleb128 0x1f
 	.4byte	.LASF353
 	.byte	0x2
-	.2byte	0x33d
+	.2byte	0x36e
 	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x31
-	.4byte	.LVL1130
+	.4byte	.LVL1148
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1131
+	.4byte	.LVL1149
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1133
+	.4byte	.LVL1151
 	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x8
@@ -29670,59 +29815,59 @@ check_vpc_table:
 	.uleb128 0x4d
 	.4byte	.LASF520
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x30c
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3929
+	.4byte	0x3939
 	.uleb128 0x44
 	.4byte	.LASF514
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x30c
-	.4byte	.LLST218
+	.4byte	.LLST219
 	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x30c
-	.4byte	.LLST219
+	.4byte	.LLST220
 	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0x384a
-	.4byte	.LLST220
+	.2byte	0x342
+	.4byte	0x385a
+	.4byte	.LLST221
 	.uleb128 0x52
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0x301
-	.4byte	.LLST221
+	.4byte	.LLST222
 	.uleb128 0x3e
 	.4byte	.LASF517
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0x30c
-	.4byte	.LLST222
+	.4byte	.LLST223
 	.uleb128 0x1f
 	.4byte	.LASF518
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x51
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0x32d
 	.uleb128 0x3
 	.byte	0x91
@@ -29730,258 +29875,258 @@ check_vpc_table:
 	.uleb128 0x45
 	.4byte	.LASF519
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0x30c
-	.4byte	.LLST223
+	.4byte	.LLST224
 	.uleb128 0x1f
 	.4byte	.LASF353
 	.byte	0x2
-	.2byte	0x318
+	.2byte	0x349
 	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x31
-	.4byte	.LVL1100
+	.4byte	.LVL1118
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1101
+	.4byte	.LVL1119
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1102
-	.4byte	0x3ac6
+	.4byte	.LVL1120
+	.4byte	0x3ad6
 	.uleb128 0x31
-	.4byte	.LVL1105
+	.4byte	.LVL1123
 	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF521
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x64
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39df
+	.4byte	0x39ef
 	.uleb128 0x4e
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x30c
-	.4byte	.LLST137
+	.4byte	.LLST138
 	.uleb128 0x4e
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x539
-	.4byte	.LLST138
+	.4byte	.LLST139
 	.uleb128 0x44
 	.4byte	.LASF522
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x64
-	.4byte	.LLST139
+	.4byte	.LLST140
 	.uleb128 0x45
 	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x301
-	.4byte	.LLST140
+	.4byte	.LLST141
 	.uleb128 0x1f
 	.4byte	.LASF524
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x1f
 	.4byte	.LASF525
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x39ef
+	.4byte	0x39ff
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6858
+	.4byte	__func__.6802
 	.uleb128 0x48
 	.4byte	.LASF526
 	.byte	0x2
-	.2byte	0x2fb
-	.4byte	.L739
+	.2byte	0x32c
+	.4byte	.L745
 	.uleb128 0x31
-	.4byte	.LVL606
-	.4byte	0x671f
+	.4byte	.LVL623
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL608
-	.4byte	0x3a2f
+	.4byte	.LVL625
+	.4byte	0x3a3f
 	.uleb128 0x31
-	.4byte	.LVL609
-	.4byte	0x3a86
+	.4byte	.LVL626
+	.4byte	0x3a96
 	.uleb128 0x31
-	.4byte	.LVL610
-	.4byte	0x3e80
+	.4byte	.LVL627
+	.4byte	0x3e90
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x39ef
+	.4byte	0x39ff
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x8
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x39df
+	.4byte	0x39ef
 	.uleb128 0x3b
 	.4byte	.LASF527
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x64
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a2f
+	.4byte	0x3a3f
 	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0x301
-	.4byte	.LLST195
+	.4byte	.LLST196
 	.uleb128 0x31
-	.4byte	.LVL902
-	.4byte	0x364f
+	.4byte	.LVL919
+	.4byte	0x365f
 	.uleb128 0x31
-	.4byte	.LVL905
-	.4byte	0x3a86
+	.4byte	.LVL922
+	.4byte	0x3a96
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF528
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0x301
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a86
+	.4byte	0x3a96
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0x301
 	.uleb128 0x1f
 	.4byte	.LASF529
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x3e
 	.4byte	.LASF530
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0x30c
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x3082
+	.4byte	0x3092
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6841
+	.4byte	__func__.6785
 	.uleb128 0x31
 	.4byte	.LVL174
-	.4byte	0x671f
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF531
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x64
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ac6
+	.4byte	0x3ad6
 	.uleb128 0x44
 	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x301
-	.4byte	.LLST136
+	.4byte	.LLST137
 	.uleb128 0x3e
 	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0x30c
 	.uleb128 0x31
-	.4byte	.LVL601
-	.4byte	0x3ac6
+	.4byte	.LVL618
+	.4byte	0x3ad6
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF532
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x64
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3bdc
+	.4byte	0x3bec
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x3323
-	.4byte	.LLST129
+	.2byte	0x2a7
+	.4byte	0x3333
+	.4byte	.LLST130
 	.uleb128 0x44
 	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x30c
-	.4byte	.LLST130
+	.4byte	.LLST131
 	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x539
-	.4byte	.LLST131
+	.4byte	.LLST132
 	.uleb128 0x3e
 	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0x30c
 	.uleb128 0x45
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x3329
-	.4byte	.LLST132
+	.2byte	0x2aa
+	.4byte	0x3339
+	.4byte	.LLST133
 	.uleb128 0x45
 	.4byte	.LASF504
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0x301
-	.4byte	.LLST133
+	.4byte	.LLST134
 	.uleb128 0x40
 	.4byte	.LASF533
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6816
+	.4byte	__func__.6760
 	.uleb128 0x4f
 	.4byte	0x17c6
-	.4byte	.LBB361
-	.4byte	.Ldebug_ranges0+0x120
+	.4byte	.LBB385
+	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x2
-	.2byte	0x292
-	.4byte	0x3ba5
+	.2byte	0x2c3
+	.4byte	0x3bb5
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -29989,7 +30134,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x120
+	.4byte	.Ldebug_ranges0+0x180
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -29997,336 +30142,336 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x120
+	.4byte	.Ldebug_ranges0+0x180
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL575
-	.4byte	0x672a
+	.4byte	.LVL592
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL572
-	.4byte	0x3bdc
+	.4byte	.LVL589
+	.4byte	0x3bec
 	.uleb128 0x31
-	.4byte	.LVL573
-	.4byte	0x671f
+	.4byte	.LVL590
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL574
-	.4byte	0x671f
+	.4byte	.LVL591
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL578
+	.4byte	.LVL595
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL581
-	.4byte	0x671f
+	.4byte	.LVL598
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL582
-	.4byte	0x671f
+	.4byte	.LVL599
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF534
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x64
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3c97
+	.4byte	0x3ca7
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x3323
-	.4byte	.LLST125
+	.2byte	0x277
+	.4byte	0x3333
+	.4byte	.LLST126
 	.uleb128 0x3e
 	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF535
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0x301
-	.4byte	.LLST126
+	.4byte	.LLST127
 	.uleb128 0x45
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x630
-	.4byte	.LLST127
+	.4byte	.LLST128
 	.uleb128 0x45
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0x539
-	.4byte	.LLST128
+	.4byte	.LLST129
 	.uleb128 0x3e
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x3329
+	.2byte	0x27d
+	.4byte	0x3339
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x3ca7
+	.4byte	0x3cb7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6802
+	.4byte	__func__.6746
 	.uleb128 0x31
-	.4byte	.LVL555
-	.4byte	0x671f
+	.4byte	.LVL572
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL556
-	.4byte	0x4250
+	.4byte	.LVL573
+	.4byte	0x4247
 	.uleb128 0x31
-	.4byte	.LVL562
+	.4byte	.LVL579
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL565
+	.4byte	.LVL582
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL566
-	.4byte	0x3cac
+	.4byte	.LVL583
+	.4byte	0x3cbc
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x3ca7
+	.4byte	0x3cb7
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x3c97
+	.4byte	0x3ca7
 	.uleb128 0x3b
 	.4byte	.LASF537
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x64
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d77
+	.4byte	0x3d87
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x3323
-	.4byte	.LLST134
+	.2byte	0x249
+	.4byte	0x3333
+	.4byte	.LLST135
 	.uleb128 0x1f
 	.4byte	.LASF538
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24b
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x3e
 	.4byte	.LASF539
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24c
 	.4byte	0x301
 	.uleb128 0x1f
 	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x21c
+	.2byte	0x24d
 	.4byte	0x301
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x45
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x21d
+	.2byte	0x24e
 	.4byte	0x630
-	.4byte	.LLST135
+	.4byte	.LLST136
 	.uleb128 0x1f
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x21e
+	.2byte	0x24f
 	.4byte	0x539
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x3e
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x3329
+	.2byte	0x250
+	.4byte	0x3339
 	.uleb128 0x38
 	.4byte	.LASF362
 	.4byte	0x1af3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6788
+	.4byte	__func__.6732
 	.uleb128 0x31
-	.4byte	.LVL588
-	.4byte	0x3dcf
+	.4byte	.LVL605
+	.4byte	0x3ddf
 	.uleb128 0x31
-	.4byte	.LVL590
-	.4byte	0x3d77
+	.4byte	.LVL607
+	.4byte	0x3d87
 	.uleb128 0x31
-	.4byte	.LVL592
-	.4byte	0x436e
+	.4byte	.LVL609
+	.4byte	0x436d
 	.uleb128 0x31
-	.4byte	.LVL594
-	.4byte	0x3d77
+	.4byte	.LVL611
+	.4byte	0x3d87
 	.uleb128 0x31
-	.4byte	.LVL596
+	.4byte	.LVL613
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL597
-	.4byte	0x671f
+	.4byte	.LVL614
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL598
-	.4byte	0x3ac6
+	.4byte	.LVL615
+	.4byte	0x3ad6
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LASF540
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x3dba
+	.4byte	0x3dca
 	.uleb128 0x3d
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x3323
+	.2byte	0x231
+	.4byte	0x3333
 	.uleb128 0x3e
 	.4byte	.LASF541
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x630
 	.uleb128 0x41
 	.4byte	.LASF362
-	.4byte	0x3dca
+	.4byte	0x3dda
 	.4byte	.LASF540
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x3dca
+	.4byte	0x3dda
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x19
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x3dba
+	.4byte	0x3dca
 	.uleb128 0x3b
 	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x64
 	.4byte	.LFB204
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e80
+	.4byte	0x3e90
 	.uleb128 0x44
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x3323
-	.4byte	.LLST120
+	.2byte	0x209
+	.4byte	0x3333
+	.4byte	.LLST121
 	.uleb128 0x1f
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x630
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x45
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0x539
-	.4byte	.LLST121
+	.4byte	.LLST122
 	.uleb128 0x1f
 	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x630
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x45
 	.4byte	.LASF178
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0x301
-	.4byte	.LLST122
+	.4byte	.LLST123
 	.uleb128 0x3e
 	.4byte	.LASF119
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF541
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0x301
-	.4byte	.LLST123
+	.4byte	.LLST124
 	.uleb128 0x45
 	.4byte	.LASF539
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0x301
-	.4byte	.LLST124
+	.4byte	.LLST125
 	.uleb128 0x31
-	.4byte	.LVL543
+	.4byte	.LVL560
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL552
-	.4byte	0x436e
+	.4byte	.LVL569
+	.4byte	0x436d
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF545
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x64
 	.4byte	.LFB203
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f27
+	.4byte	0x3f37
 	.uleb128 0x44
 	.4byte	.LASF105
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x301
-	.4byte	.LLST117
+	.4byte	.LLST118
 	.uleb128 0x44
 	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x301
-	.4byte	.LLST118
+	.4byte	.LLST119
 	.uleb128 0x45
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x3329
-	.4byte	.LLST119
+	.2byte	0x1e9
+	.4byte	0x3339
+	.4byte	.LLST120
 	.uleb128 0x1f
 	.4byte	.LASF546
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x57
@@ -30335,128 +30480,128 @@ check_vpc_table:
 	.4byte	0x23df
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6745
+	.4byte	__func__.6688
 	.uleb128 0x31
-	.4byte	.LVL526
-	.4byte	0x671f
+	.4byte	.LVL543
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL528
+	.4byte	.LVL545
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL531
+	.4byte	.LVL548
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL533
-	.4byte	0x671f
+	.4byte	.LVL550
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL534
-	.4byte	0x6735
+	.4byte	.LVL551
+	.4byte	0x6808
 	.uleb128 0x31
-	.4byte	.LVL535
-	.4byte	0x6735
+	.4byte	.LVL552
+	.4byte	0x6808
 	.uleb128 0x31
-	.4byte	.LVL536
-	.4byte	0x671f
+	.4byte	.LVL553
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LASF547
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x3fa6
+	.4byte	0x3fb6
 	.uleb128 0x3d
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF548
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF549
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF550
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF551
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF552
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0x30c
 	.uleb128 0x3e
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x19b
+	.2byte	0x1c7
 	.4byte	0x1210
 	.uleb128 0x3e
 	.4byte	.LASF553
 	.byte	0x2
-	.2byte	0x19b
+	.2byte	0x1c7
 	.4byte	0x1210
 	.uleb128 0x41
 	.4byte	.LASF362
-	.4byte	0x3082
+	.4byte	0x3092
 	.4byte	.LASF547
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF554
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x64
 	.4byte	.LFB201
 	.4byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fed
+	.4byte	0x3ffd
 	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x301
-	.4byte	.LLST47
+	.4byte	.LLST46
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x182
+	.2byte	0x1ae
 	.4byte	0x1210
-	.4byte	.LLST48
+	.4byte	.LLST47
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF555
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x64
 	.4byte	.LFB200
 	.4byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4021
+	.4byte	0x4031
 	.uleb128 0x44
 	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x4021
-	.4byte	.LLST46
+	.2byte	0x1a6
+	.4byte	0x4031
+	.4byte	.LLST45
 	.uleb128 0x24
-	.4byte	.LVL148
-	.4byte	0x4027
+	.4byte	.LVL145
+	.4byte	0x4037
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
@@ -30464,427 +30609,403 @@ check_vpc_table:
 	.uleb128 0x3b
 	.4byte	.LASF557
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x64
 	.4byte	.LFB199
 	.4byte	.LFE199-.LFB199
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4087
+	.4byte	0x4097
 	.uleb128 0x44
 	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x4021
-	.4byte	.LLST43
+	.2byte	0x193
+	.4byte	0x4031
+	.4byte	.LLST42
 	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x301
-	.4byte	.LLST44
+	.4byte	.LLST43
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0x301
 	.uleb128 0x45
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x16a
+	.2byte	0x196
 	.4byte	0x1210
-	.4byte	.LLST45
+	.4byte	.LLST44
 	.uleb128 0x31
-	.4byte	.LVL142
-	.4byte	0x4087
+	.4byte	.LVL139
+	.4byte	0x4097
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF558
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x64
 	.4byte	.LFB198
 	.4byte	.LFE198-.LFB198
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40f4
+	.4byte	0x4104
 	.uleb128 0x44
 	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x4021
-	.4byte	.LLST41
+	.2byte	0x176
+	.4byte	0x4031
+	.4byte	.LLST40
 	.uleb128 0x44
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x301
-	.4byte	.LLST42
+	.4byte	.LLST41
 	.uleb128 0x1f
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x14e
+	.2byte	0x178
 	.4byte	0x1210
 	.uleb128 0x1
-	.byte	0x54
+	.byte	0x55
 	.uleb128 0x3e
 	.4byte	.LASF559
 	.byte	0x2
-	.2byte	0x14e
+	.2byte	0x178
 	.4byte	0x1210
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x4104
+	.4byte	0x4114
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6704
+	.4byte	__func__.6647
 	.uleb128 0x31
-	.4byte	.LVL134
-	.4byte	0x671f
+	.4byte	.LVL132
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x4104
+	.4byte	0x4114
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0x10
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x40f4
+	.4byte	0x4104
 	.uleb128 0x3b
 	.4byte	.LASF560
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x64
 	.4byte	.LFB197
 	.4byte	.LFE197-.LFB197
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4178
+	.4byte	0x4188
 	.uleb128 0x44
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x301
-	.4byte	.LLST38
+	.4byte	.LLST37
 	.uleb128 0x1f
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x11d
+	.2byte	0x147
 	.4byte	0x1210
 	.uleb128 0x1
 	.byte	0x56
 	.uleb128 0x1f
 	.4byte	.LASF559
 	.byte	0x2
-	.2byte	0x11d
+	.2byte	0x147
 	.4byte	0x1210
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x45
 	.4byte	.LASF561
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0x301
-	.4byte	.LLST39
+	.4byte	.LLST38
 	.uleb128 0x3e
 	.4byte	.LASF562
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF563
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0x301
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x26
 	.4byte	.LASF564
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x64
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4206
-	.uleb128 0x23
+	.byte	0x1
+	.4byte	0x41fd
+	.uleb128 0x34
 	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x301
-	.4byte	.LLST30
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF435
 	.byte	0x2
-	.byte	0xda
+	.byte	0xfa
 	.4byte	0x1210
-	.4byte	.LLST31
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF559
 	.byte	0x2
-	.byte	0xda
+	.byte	0xfa
 	.4byte	0x1210
-	.4byte	.LLST32
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF565
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0x301
-	.4byte	.LLST33
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF566
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0x301
-	.4byte	.LLST34
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF550
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0x30c
-	.4byte	.LLST35
-	.uleb128 0x2c
+	.uleb128 0x35
 	.4byte	.LASF567
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0x30c
-	.4byte	.LLST36
 	.uleb128 0x35
 	.4byte	.LASF563
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
+	.4byte	0x301
+	.uleb128 0x3e
+	.4byte	.LASF114
+	.byte	0x2
+	.2byte	0x100
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x58
 	.4byte	.LASF568
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x422b
+	.4byte	0x4222
 	.uleb128 0x34
 	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0x301
 	.uleb128 0x41
 	.4byte	.LASF362
-	.4byte	0x4104
+	.4byte	0x4114
 	.4byte	.LASF568
 	.byte	0
 	.uleb128 0x58
 	.4byte	.LASF569
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x4250
+	.4byte	0x4247
 	.uleb128 0x34
 	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0x301
 	.uleb128 0x41
 	.4byte	.LASF362
-	.4byte	0x4104
+	.4byte	0x4114
 	.4byte	.LASF569
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF570
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0x301
 	.4byte	.LFB193
 	.4byte	.LFE193-.LFB193
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x429d
+	.4byte	0x42ca
 	.uleb128 0x37
 	.ascii	"tmp\000"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0x301
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x53
-	.4byte	.LBB253
-	.4byte	.LBE253-.LBB253
-	.4byte	0x428d
+	.byte	0x55
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x429d
-	.byte	0
+	.byte	0xb7
+	.4byte	0x42ca
 	.uleb128 0x59
-	.4byte	0x43fb
-	.4byte	.LBB251
-	.4byte	.LBE251-.LBB251
+	.4byte	.LASF571
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.4byte	.L518
+	.uleb128 0x39
+	.4byte	.Ldebug_ranges0+0x118
+	.4byte	0x42a8
+	.uleb128 0x35
+	.4byte	.LASF572
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0x301
+	.uleb128 0x31
+	.4byte	.LVL463
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL464
+	.4byte	0x1954
+	.byte	0
+	.uleb128 0x5a
+	.4byte	0x43b4
+	.4byte	.LBB315
+	.4byte	.Ldebug_ranges0+0x100
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x31
+	.4byte	.LVL465
+	.4byte	0x67f2
+	.uleb128 0x31
+	.4byte	.LVL466
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xadc
 	.uleb128 0x22
-	.4byte	.LASF571
+	.4byte	.LASF573
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x64
 	.4byte	.LFB192
 	.4byte	.LFE192-.LFB192
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x42fc
+	.4byte	0x4329
 	.uleb128 0x2b
 	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x301
-	.4byte	.LLST29
+	.4byte	.LLST27
 	.uleb128 0x37
 	.ascii	"ret\000"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x64
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x37
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x429d
+	.byte	0xa6
+	.4byte	0x42ca
 	.uleb128 0x5a
-	.4byte	0x43ef
-	.4byte	.LBB247
+	.4byte	0x43a8
+	.4byte	.LBB251
 	.4byte	.Ldebug_ranges0+0x50
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF572
+	.4byte	.LASF574
 	.byte	0x2
-	.byte	0x73
+	.byte	0x75
 	.4byte	.LFB191
 	.4byte	.LFE191-.LFB191
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x436e
+	.4byte	0x436d
+	.uleb128 0x20
+	.4byte	.LASF114
+	.byte	0x2
+	.byte	0x77
+	.4byte	0x317
+	.uleb128 0x1
+	.byte	0x55
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0x301
 	.uleb128 0x4a
-	.ascii	"tmp\000"
+	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0x301
 	.4byte	.LLST26
 	.uleb128 0x29
-	.ascii	"j\000"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x301
-	.uleb128 0x2c
-	.4byte	.LASF383
-	.byte	0x2
-	.byte	0x76
-	.4byte	0x301
-	.4byte	.LLST27
-	.uleb128 0x35
-	.4byte	.LASF573
-	.byte	0x2
-	.byte	0x77
-	.4byte	0x301
-	.uleb128 0x2c
-	.4byte	.LASF574
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x30c
-	.4byte	.LLST28
-	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x429d
-	.uleb128 0x31
-	.4byte	.LVL80
-	.4byte	0x4561
+	.4byte	0x42ca
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x58
 	.4byte	.LASF575
 	.byte	0x2
 	.byte	0x61
-	.4byte	.LFB190
-	.4byte	.LFE190-.LFB190
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x43ef
-	.uleb128 0x2b
+	.byte	0x1
+	.4byte	0x43a8
+	.uleb128 0x27
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0x301
-	.4byte	.LLST98
-	.uleb128 0x23
+	.uleb128 0x34
 	.4byte	.LASF576
 	.byte	0x2
 	.byte	0x61
 	.4byte	0x301
-	.4byte	.LLST99
-	.uleb128 0x53
-	.4byte	.LBB299
-	.4byte	.LBE299-.LBB299
-	.4byte	0x43df
+	.uleb128 0x28
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x429d
-	.uleb128 0x33
-	.4byte	.LBB300
-	.4byte	.LBE300-.LBB300
+	.byte	0x66
+	.4byte	0x42ca
+	.uleb128 0x28
 	.uleb128 0x35
-	.4byte	.LASF577
+	.4byte	.LASF572
 	.byte	0x2
-	.byte	0x66
+	.byte	0x68
 	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL411
-	.4byte	0x4561
-	.uleb128 0x31
-	.4byte	.LVL412
-	.4byte	0x1954
 	.byte	0
 	.byte	0
-	.uleb128 0x59
-	.4byte	0x43ef
-	.4byte	.LBB297
-	.4byte	.LBE297-.LBB297
-	.byte	0x2
-	.byte	0x63
 	.byte	0
 	.uleb128 0x5b
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0x301
 	.byte	0x1
 	.uleb128 0x5b
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x2
 	.byte	0x57
 	.4byte	0x301
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0x301
@@ -30892,7 +31013,7 @@ check_vpc_table:
 	.4byte	.LFE187-.LFB187
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4486
+	.4byte	0x443f
 	.uleb128 0x2b
 	.ascii	"max\000"
 	.byte	0x2
@@ -30903,10 +31024,10 @@ check_vpc_table:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x429d
+	.4byte	0x42ca
 	.uleb128 0x5c
 	.4byte	0x17c6
-	.4byte	.LBB238
+	.4byte	.LBB242
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
 	.byte	0x53
@@ -30932,13 +31053,13 @@ check_vpc_table:
 	.4byte	0x17fd
 	.uleb128 0x31
 	.4byte	.LVL76
-	.4byte	0x672a
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x64
@@ -30946,19 +31067,19 @@ check_vpc_table:
 	.4byte	.LFE186-.LFB186
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x451e
+	.4byte	0x44d7
 	.uleb128 0x23
 	.4byte	.LASF178
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x30c
-	.4byte	.LLST88
+	.4byte	.LLST87
 	.uleb128 0x23
 	.4byte	.LASF356
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x64
-	.4byte	.LLST89
+	.4byte	.LLST88
 	.uleb128 0x37
 	.ascii	"req\000"
 	.byte	0x2
@@ -30975,7 +31096,7 @@ check_vpc_table:
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x20
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x2
 	.byte	0x31
 	.4byte	0x322
@@ -30987,7 +31108,7 @@ check_vpc_table:
 	.byte	0x31
 	.4byte	0x322
 	.uleb128 0x20
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x1944
@@ -30995,19 +31116,19 @@ check_vpc_table:
 	.byte	0x91
 	.sleb128 -88
 	.uleb128 0x35
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x2
 	.byte	0x33
 	.4byte	0x301
 	.uleb128 0x31
-	.4byte	.LVL374
+	.4byte	.LVL380
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL377
+	.4byte	.LVL383
 	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x30c
@@ -31015,15 +31136,15 @@ check_vpc_table:
 	.4byte	.LFE185-.LFB185
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4561
+	.4byte	0x451a
 	.uleb128 0x23
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x30c
 	.4byte	.LLST24
 	.uleb128 0x4c
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x30c
@@ -31038,7 +31159,7 @@ check_vpc_table:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x14
 	.4byte	0x301
@@ -31046,7 +31167,7 @@ check_vpc_table:
 	.4byte	.LFE184-.LFB184
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4595
+	.4byte	0x454e
 	.uleb128 0x23
 	.4byte	.LASF378
 	.byte	0x2
@@ -31060,7 +31181,7 @@ check_vpc_table:
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x2
 	.byte	0xc
 	.4byte	0x301
@@ -31068,7 +31189,7 @@ check_vpc_table:
 	.4byte	.LFE183-.LFB183
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45c9
+	.4byte	0x4582
 	.uleb128 0x23
 	.4byte	.LASF378
 	.byte	0x2
@@ -31082,7 +31203,7 @@ check_vpc_table:
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x2
 	.byte	0x4
 	.4byte	0x301
@@ -31090,7 +31211,7 @@ check_vpc_table:
 	.4byte	.LFE182-.LFB182
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x460c
+	.4byte	0x45c5
 	.uleb128 0x23
 	.4byte	.LASF376
 	.byte	0x2
@@ -31110,7 +31231,7 @@ check_vpc_table:
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0x317
@@ -31118,13 +31239,13 @@ check_vpc_table:
 	.4byte	.LFE181-.LFB181
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47d0
+	.4byte	0x4789
 	.uleb128 0x52
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0x30c
-	.4byte	.LLST216
+	.4byte	.LLST217
 	.uleb128 0x3f
 	.ascii	"blk\000"
 	.byte	0x4
@@ -31135,23 +31256,23 @@ check_vpc_table:
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0x30c
-	.4byte	.LLST217
+	.4byte	.LLST218
 	.uleb128 0x3e
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x47d0
+	.4byte	0x4789
 	.uleb128 0x40
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x4f
 	.4byte	0x17c6
-	.4byte	.LBB464
-	.4byte	.Ldebug_ranges0+0x1f0
+	.4byte	.LBB488
+	.4byte	.Ldebug_ranges0+0x250
 	.byte	0x4
 	.2byte	0x15e
-	.4byte	0x46b8
+	.4byte	0x4671
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31159,7 +31280,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1f0
+	.4byte	.Ldebug_ranges0+0x250
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31167,24 +31288,24 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1f0
+	.4byte	.Ldebug_ranges0+0x250
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL1074
-	.4byte	0x672a
+	.4byte	.LVL1092
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB470
-	.4byte	.LBE470-.LBB470
+	.4byte	.LBB494
+	.4byte	.LBE494-.LBB494
 	.byte	0x4
 	.2byte	0x15f
-	.4byte	0x4712
+	.4byte	0x46cb
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31192,8 +31313,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB471
-	.4byte	.LBE471-.LBB471
+	.4byte	.LBB495
+	.4byte	.LBE495-.LBB495
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31201,87 +31322,87 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB472
-	.4byte	.LBE472-.LBB472
+	.4byte	.LBB496
+	.4byte	.LBE496-.LBB496
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL1075
-	.4byte	0x672a
+	.4byte	.LVL1093
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1061
-	.4byte	0x4938
+	.4byte	.LVL1079
+	.4byte	0x48f1
 	.uleb128 0x31
-	.4byte	.LVL1062
-	.4byte	0x47d6
+	.4byte	.LVL1080
+	.4byte	0x478f
 	.uleb128 0x31
-	.4byte	.LVL1063
-	.4byte	0x4afe
+	.4byte	.LVL1081
+	.4byte	0x4ab7
 	.uleb128 0x31
-	.4byte	.LVL1064
+	.4byte	.LVL1082
 	.4byte	0x1900
 	.uleb128 0x31
-	.4byte	.LVL1065
-	.4byte	0x4b59
+	.4byte	.LVL1083
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1068
+	.4byte	.LVL1086
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1069
+	.4byte	.LVL1087
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1070
-	.4byte	0x4b59
+	.4byte	.LVL1088
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1071
+	.4byte	.LVL1089
 	.4byte	0x180a
 	.uleb128 0x31
-	.4byte	.LVL1072
-	.4byte	0x4a98
+	.4byte	.LVL1090
+	.4byte	0x4a51
 	.uleb128 0x31
-	.4byte	.LVL1073
-	.4byte	0x4afe
+	.4byte	.LVL1091
+	.4byte	0x4ab7
 	.uleb128 0x31
-	.4byte	.LVL1078
+	.4byte	.LVL1096
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1079
+	.4byte	.LVL1097
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL1080
+	.4byte	.LVL1098
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1081
-	.4byte	0x4b59
+	.4byte	.LVL1099
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1082
-	.4byte	0x4b59
+	.4byte	.LVL1100
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1083
+	.4byte	.LVL1101
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL1084
-	.4byte	0x4b59
+	.4byte	.LVL1102
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1085
-	.4byte	0x4b59
+	.4byte	.LVL1103
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL1086
-	.4byte	0x499b
+	.4byte	.LVL1104
+	.4byte	0x4954
 	.uleb128 0x31
-	.4byte	.LVL1087
-	.4byte	0x499b
+	.4byte	.LVL1105
+	.4byte	0x4954
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x700
 	.uleb128 0x3b
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x64
@@ -31289,7 +31410,7 @@ check_vpc_table:
 	.4byte	.LFE180-.LFB180
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4834
+	.4byte	0x47ed
 	.uleb128 0x51
 	.ascii	"die\000"
 	.byte	0x4
@@ -31302,24 +31423,24 @@ check_vpc_table:
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0x301
-	.4byte	.LLST86
+	.4byte	.LLST85
 	.uleb128 0x45
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0x30c
-	.4byte	.LLST87
+	.4byte	.LLST86
 	.uleb128 0x3e
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x47d0
+	.4byte	0x4789
 	.uleb128 0x31
-	.4byte	.LVL369
+	.4byte	.LVL375
 	.4byte	0x1af8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x64
@@ -31327,75 +31448,75 @@ check_vpc_table:
 	.4byte	.LFE179-.LFB179
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x48e4
+	.4byte	0x489d
 	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0x30c
-	.4byte	.LLST213
+	.4byte	.LLST214
 	.uleb128 0x4a
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0x301
-	.4byte	.LLST214
+	.4byte	.LLST215
 	.uleb128 0x2c
 	.4byte	.LASF488
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0x322
-	.4byte	.LLST215
+	.4byte	.LLST216
 	.uleb128 0x35
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x47d0
+	.4byte	0x4789
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x48f4
+	.4byte	0x48ad
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6546
+	.4byte	__func__.6494
 	.uleb128 0x31
-	.4byte	.LVL1039
-	.4byte	0x4938
+	.4byte	.LVL1057
+	.4byte	0x48f1
 	.uleb128 0x31
-	.4byte	.LVL1041
+	.4byte	.LVL1059
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1042
+	.4byte	.LVL1060
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1043
+	.4byte	.LVL1061
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1044
-	.4byte	0x4486
+	.4byte	.LVL1062
+	.4byte	0x443f
 	.uleb128 0x31
-	.4byte	.LVL1046
-	.4byte	0x671f
+	.4byte	.LVL1064
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1047
-	.4byte	0x58b9
+	.4byte	.LVL1065
+	.4byte	0x5872
 	.uleb128 0x31
-	.4byte	.LVL1053
+	.4byte	.LVL1071
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1057
+	.4byte	.LVL1075
 	.4byte	0x176f
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x48f4
+	.4byte	0x48ad
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xa
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x48e4
+	.4byte	0x489d
 	.uleb128 0x22
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0x301
@@ -31403,7 +31524,7 @@ check_vpc_table:
 	.4byte	.LFE178-.LFB178
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4938
+	.4byte	0x48f1
 	.uleb128 0x4a
 	.ascii	"blk\000"
 	.byte	0x4
@@ -31411,7 +31532,7 @@ check_vpc_table:
 	.4byte	0x301
 	.4byte	.LLST19
 	.uleb128 0x20
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0x301
@@ -31419,20 +31540,20 @@ check_vpc_table:
 	.byte	0x54
 	.uleb128 0x31
 	.4byte	.LVL56
-	.4byte	0x4afe
+	.4byte	0x4ab7
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x4
 	.byte	0x94
 	.4byte	.LFB177
 	.4byte	.LFE177-.LFB177
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x499b
+	.4byte	0x4954
 	.uleb128 0x5c
 	.4byte	0x17c6
-	.4byte	.LBB227
+	.4byte	.LBB231
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x4
 	.byte	0x98
@@ -31458,13 +31579,13 @@ check_vpc_table:
 	.4byte	0x17fd
 	.uleb128 0x24
 	.4byte	.LVL53
-	.4byte	0x6714
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x64
@@ -31472,33 +31593,33 @@ check_vpc_table:
 	.4byte	.LFE176-.LFB176
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4a98
+	.4byte	0x4a51
 	.uleb128 0x4a
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x64
-	.4byte	.LLST179
+	.4byte	.LLST180
 	.uleb128 0x2c
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x64
-	.4byte	.LLST180
+	.4byte	.LLST181
 	.uleb128 0x2c
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x47d0
-	.4byte	.LLST181
+	.4byte	0x4789
+	.4byte	.LLST182
 	.uleb128 0x2c
 	.4byte	.LASF504
 	.byte	0x4
 	.byte	0x54
 	.4byte	0x301
-	.4byte	.LLST182
+	.4byte	.LLST183
 	.uleb128 0x47
-	.4byte	.LASF602
+	.4byte	.LASF601
 	.byte	0x4
 	.byte	0x67
 	.uleb128 0x5d
@@ -31506,11 +31627,11 @@ check_vpc_table:
 	.4byte	0x1af3
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB419
-	.4byte	.Ldebug_ranges0+0x168
+	.4byte	.LBB443
+	.4byte	.Ldebug_ranges0+0x1c8
 	.byte	0x4
 	.byte	0x5f
-	.4byte	0x4a4f
+	.4byte	0x4a08
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31518,7 +31639,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x168
+	.4byte	.Ldebug_ranges0+0x1c8
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31526,63 +31647,63 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x168
+	.4byte	.Ldebug_ranges0+0x1c8
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL818
-	.4byte	0x6714
+	.4byte	.LVL835
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL815
+	.4byte	.LVL832
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL820
-	.4byte	0x671f
+	.4byte	.LVL837
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL821
+	.4byte	.LVL838
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL822
+	.4byte	.LVL839
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL823
+	.4byte	.LVL840
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL826
-	.4byte	0x671f
+	.4byte	.LVL843
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL827
-	.4byte	0x671f
+	.4byte	.LVL844
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL829
+	.4byte	.LVL846
 	.4byte	0x176f
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x4
 	.byte	0x41
 	.4byte	.LFB175
 	.4byte	.LFE175-.LFB175
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4af6
+	.4byte	0x4aaf
 	.uleb128 0x23
 	.4byte	.LASF536
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x630
-	.4byte	.LLST115
+	.4byte	.LLST116
 	.uleb128 0x23
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x539
-	.4byte	.LLST116
+	.4byte	.LLST117
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x4
@@ -31590,24 +31711,24 @@ check_vpc_table:
 	.4byte	0x30c
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x29c3
+	.4byte	0x29d3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6503
+	.4byte	__func__.6451
 	.uleb128 0x31
-	.4byte	.LVL522
+	.4byte	.LVL539
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL523
-	.4byte	0x671f
+	.4byte	.LVL540
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x5e
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2a
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x64
@@ -31615,7 +31736,7 @@ check_vpc_table:
 	.4byte	.LFE173-.LFB173
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b59
+	.4byte	0x4b12
 	.uleb128 0x23
 	.4byte	.LASF178
 	.byte	0x4
@@ -31634,7 +31755,7 @@ check_vpc_table:
 	.byte	0x1a
 	.4byte	0x30c
 	.uleb128 0x35
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x539
@@ -31646,7 +31767,7 @@ check_vpc_table:
 	.4byte	.LLST18
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x64
@@ -31654,7 +31775,7 @@ check_vpc_table:
 	.4byte	.LFE172-.LFB172
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4bb0
+	.4byte	0x4b69
 	.uleb128 0x23
 	.4byte	.LASF178
 	.byte	0x4
@@ -31668,7 +31789,7 @@ check_vpc_table:
 	.4byte	0x30c
 	.4byte	.LLST15
 	.uleb128 0x35
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x539
@@ -31679,630 +31800,630 @@ check_vpc_table:
 	.4byte	0x301
 	.uleb128 0x31
 	.4byte	.LVL43
-	.4byte	0x671f
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF669
+	.4byte	.LASF668
 	.byte	0x3
-	.2byte	0x4bb
+	.2byte	0x4bd
 	.4byte	0x30c
 	.4byte	.LFB171
 	.4byte	.LFE171-.LFB171
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x3b
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x64
 	.4byte	.LFB170
 	.4byte	.LFE170-.LFB170
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c1a
+	.4byte	0x4bd3
 	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x99
-	.4byte	.LLST293
+	.4byte	.LLST294
 	.uleb128 0x44
 	.4byte	.LASF114
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x99
-	.4byte	.LLST294
+	.4byte	.LLST295
 	.uleb128 0x4e
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b6
-	.4byte	0x4c1a
-	.4byte	.LLST295
+	.2byte	0x4b8
+	.4byte	0x4bd3
+	.4byte	.LLST296
 	.uleb128 0x24
-	.4byte	.LVL1543
-	.4byte	0x4d46
+	.4byte	.LVL1561
+	.4byte	0x4cff
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x79
 	.uleb128 0x3b
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x64
 	.4byte	.LFB169
 	.4byte	.LFE169-.LFB169
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c74
+	.4byte	0x4c2d
 	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x99
-	.4byte	.LLST279
+	.4byte	.LLST280
 	.uleb128 0x44
 	.4byte	.LASF114
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x99
-	.4byte	.LLST280
+	.4byte	.LLST281
 	.uleb128 0x4e
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b0
-	.4byte	0x4c1a
-	.4byte	.LLST281
+	.2byte	0x4b3
+	.4byte	0x4bd3
+	.4byte	.LLST282
 	.uleb128 0x24
-	.4byte	.LVL1442
-	.4byte	0x50c3
+	.4byte	.LVL1460
+	.4byte	0x507c
 	.byte	0
 	.uleb128 0x4d
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x64
 	.4byte	.LFB168
 	.4byte	.LFE168-.LFB168
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d46
+	.4byte	0x4cff
 	.uleb128 0x44
 	.4byte	.LASF514
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x30c
-	.4byte	.LLST244
+	.4byte	.LLST245
 	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x30c
-	.4byte	.LLST245
+	.4byte	.LLST246
 	.uleb128 0x45
 	.4byte	.LASF517
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x486
 	.4byte	0x301
-	.4byte	.LLST246
+	.4byte	.LLST247
 	.uleb128 0x3f
 	.ascii	"tmp\000"
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x487
 	.4byte	0x301
 	.uleb128 0x52
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x485
+	.2byte	0x488
 	.4byte	0x30c
-	.4byte	.LLST247
+	.4byte	.LLST248
 	.uleb128 0x45
 	.4byte	.LASF446
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x489
 	.4byte	0x30c
-	.4byte	.LLST248
+	.4byte	.LLST249
 	.uleb128 0x45
 	.4byte	.LASF423
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x489
 	.4byte	0x30c
-	.4byte	.LLST249
+	.4byte	.LLST250
 	.uleb128 0x3e
 	.4byte	.LASF412
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x48a
 	.4byte	0x301
 	.uleb128 0x31
-	.4byte	.LVL1215
-	.4byte	0x4f66
+	.4byte	.LVL1233
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1221
-	.4byte	0x39f4
+	.4byte	.LVL1239
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1222
-	.4byte	0x3588
+	.4byte	.LVL1240
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1223
-	.4byte	0x3929
+	.4byte	.LVL1241
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1226
-	.4byte	0x3929
+	.4byte	.LVL1244
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1227
-	.4byte	0x4561
+	.4byte	.LVL1245
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1228
+	.4byte	.LVL1246
 	.4byte	0x232e
 	.byte	0
 	.uleb128 0x4d
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x64
 	.4byte	.LFB167
 	.4byte	.LFE167-.LFB167
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f66
+	.4byte	0x4f1f
 	.uleb128 0x4e
 	.ascii	"LUN\000"
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x2f6
-	.4byte	.LLST282
+	.4byte	.LLST283
 	.uleb128 0x44
 	.4byte	.LASF514
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x30c
-	.4byte	.LLST283
+	.4byte	.LLST284
 	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x30c
-	.4byte	.LLST284
+	.4byte	.LLST285
 	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x384a
-	.4byte	.LLST285
+	.2byte	0x3c1
+	.4byte	0x385a
+	.4byte	.LLST286
 	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3c3
 	.4byte	0x1d3f
 	.uleb128 0x52
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x30c
-	.4byte	.LLST286
+	.4byte	.LLST287
 	.uleb128 0x45
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x30c
-	.4byte	.LLST287
+	.4byte	.LLST288
 	.uleb128 0x45
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x30c
-	.4byte	.LLST288
+	.4byte	.LLST289
 	.uleb128 0x45
 	.4byte	.LASF446
 	.byte	0x3
-	.2byte	0x3c2
+	.2byte	0x3c5
 	.4byte	0x30c
-	.4byte	.LLST289
+	.4byte	.LLST290
 	.uleb128 0x3f
 	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x3c2
+	.2byte	0x3c5
 	.4byte	0x30c
 	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x30c
-	.4byte	.LLST290
+	.4byte	.LLST291
 	.uleb128 0x45
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x30c
-	.4byte	.LLST291
+	.4byte	.LLST292
 	.uleb128 0x3e
 	.4byte	.LASF377
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x30c
 	.uleb128 0x3e
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c7
 	.4byte	0x30c
 	.uleb128 0x3e
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c7
 	.4byte	0x30c
 	.uleb128 0x45
 	.4byte	.LASF422
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c8
 	.4byte	0x12c0
-	.4byte	.LLST292
+	.4byte	.LLST293
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x39ef
+	.4byte	0x39ff
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6439
+	.4byte	__func__.6387
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x4e8d
+	.4byte	.Ldebug_ranges0+0x2b0
+	.4byte	0x4e46
 	.uleb128 0x1f
 	.4byte	.LASF385
 	.byte	0x3
-	.2byte	0x43a
+	.2byte	0x43d
 	.4byte	0x32d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x31
-	.4byte	.LVL1520
+	.4byte	.LVL1538
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1524
-	.4byte	0x671f
+	.4byte	.LVL1542
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1525
-	.4byte	0x671f
+	.4byte	.LVL1543
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1446
-	.4byte	0x3850
+	.4byte	.LVL1464
+	.4byte	0x3860
 	.uleb128 0x31
-	.4byte	.LVL1457
-	.4byte	0x4f66
+	.4byte	.LVL1475
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1463
-	.4byte	0x671f
+	.4byte	.LVL1481
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1465
-	.4byte	0x4f66
+	.4byte	.LVL1483
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1466
+	.4byte	.LVL1484
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1468
+	.4byte	.LVL1486
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1470
+	.4byte	.LVL1488
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1473
-	.4byte	0x671f
+	.4byte	.LVL1491
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1477
+	.4byte	.LVL1495
 	.4byte	0x1c72
 	.uleb128 0x31
-	.4byte	.LVL1479
-	.4byte	0x3fa6
+	.4byte	.LVL1497
+	.4byte	0x3fb6
 	.uleb128 0x31
-	.4byte	.LVL1480
+	.4byte	.LVL1498
 	.4byte	0x1e6d
 	.uleb128 0x31
-	.4byte	.LVL1481
+	.4byte	.LVL1499
 	.4byte	0x1c72
 	.uleb128 0x31
-	.4byte	.LVL1482
+	.4byte	.LVL1500
 	.4byte	0x1c72
 	.uleb128 0x31
-	.4byte	.LVL1487
+	.4byte	.LVL1505
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1492
-	.4byte	0x4f66
+	.4byte	.LVL1510
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1496
+	.4byte	.LVL1514
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1499
-	.4byte	0x3929
+	.4byte	.LVL1517
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1500
+	.4byte	.LVL1518
 	.4byte	0x23e4
 	.uleb128 0x31
-	.4byte	.LVL1501
+	.4byte	.LVL1519
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1514
-	.4byte	0x671f
+	.4byte	.LVL1532
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1521
+	.4byte	.LVL1539
 	.4byte	0x176f
 	.uleb128 0x31
-	.4byte	.LVL1526
+	.4byte	.LVL1544
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1534
-	.4byte	0x4f8a
+	.4byte	.LVL1552
+	.4byte	0x4f43
 	.uleb128 0x31
-	.4byte	.LVL1536
-	.4byte	0x671f
+	.4byte	.LVL1554
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x3
-	.2byte	0x3b5
+	.2byte	0x3b7
 	.4byte	0x64
 	.4byte	.LFB166
 	.4byte	.LFE166-.LFB166
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f8a
+	.4byte	0x4f43
 	.uleb128 0x31
-	.4byte	.LVL1205
-	.4byte	0x4f8a
+	.4byte	.LVL1223
+	.4byte	0x4f43
 	.byte	0
 	.uleb128 0x50
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	.LFB165
 	.4byte	.LFE165-.LFB165
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x50ae
+	.4byte	0x5067
 	.uleb128 0x4e
 	.ascii	"req\000"
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0xf40
-	.4byte	.LLST237
+	.4byte	.LLST238
 	.uleb128 0x44
 	.4byte	.LASF377
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x30c
-	.4byte	.LLST238
+	.4byte	.LLST239
 	.uleb128 0x44
-	.4byte	.LASF619
+	.4byte	.LASF618
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x30c
-	.4byte	.LLST239
+	.4byte	.LLST240
 	.uleb128 0x44
 	.4byte	.LASF422
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x12c0
-	.4byte	.LLST240
+	.4byte	.LLST241
 	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x387
+	.2byte	0x389
 	.4byte	0x30c
-	.4byte	.LLST241
+	.4byte	.LLST242
 	.uleb128 0x52
 	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x388
+	.2byte	0x38a
 	.4byte	0x30c
-	.4byte	.LLST242
+	.4byte	.LLST243
 	.uleb128 0x45
 	.4byte	.LASF446
 	.byte	0x3
-	.2byte	0x388
+	.2byte	0x38a
 	.4byte	0x30c
-	.4byte	.LLST243
+	.4byte	.LLST244
 	.uleb128 0x3e
 	.4byte	.LASF405
 	.byte	0x3
-	.2byte	0x389
+	.2byte	0x38b
 	.4byte	0x301
 	.uleb128 0x3e
 	.4byte	.LASF380
 	.byte	0x3
-	.2byte	0x38a
+	.2byte	0x38c
 	.4byte	0x1d3f
 	.uleb128 0x3e
 	.4byte	.LASF470
 	.byte	0x3
-	.2byte	0x38b
+	.2byte	0x38d
 	.4byte	0x30c
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x50be
+	.4byte	0x5077
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6411
+	.4byte	__func__.6359
 	.uleb128 0x31
-	.4byte	.LVL1184
+	.4byte	.LVL1202
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1186
-	.4byte	0x4561
+	.4byte	.LVL1204
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1187
+	.4byte	.LVL1205
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1188
+	.4byte	.LVL1206
 	.4byte	0x1e11
 	.uleb128 0x31
-	.4byte	.LVL1189
+	.4byte	.LVL1207
 	.4byte	0x23e4
 	.uleb128 0x31
-	.4byte	.LVL1190
+	.4byte	.LVL1208
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL1192
-	.4byte	0x671f
+	.4byte	.LVL1210
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1194
-	.4byte	0x3929
+	.4byte	.LVL1212
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1196
-	.4byte	0x4561
+	.4byte	.LVL1214
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1199
-	.4byte	0x671f
+	.4byte	.LVL1217
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1200
+	.4byte	.LVL1218
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1203
-	.4byte	0x671f
+	.4byte	.LVL1221
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x3c
-	.4byte	0x50be
+	.4byte	0x5077
 	.uleb128 0x17
 	.4byte	0x2e
 	.byte	0xc
 	.byte	0
 	.uleb128 0x4
-	.4byte	0x50ae
+	.4byte	0x5067
 	.uleb128 0x4d
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x64
 	.4byte	.LFB164
 	.4byte	.LFE164-.LFB164
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52a2
+	.4byte	0x525b
 	.uleb128 0x4e
 	.ascii	"LUN\000"
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x2f6
-	.4byte	.LLST264
+	.4byte	.LLST265
 	.uleb128 0x44
 	.4byte	.LASF514
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x30c
-	.4byte	.LLST265
+	.4byte	.LLST266
 	.uleb128 0x44
 	.4byte	.LASF515
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x30c
-	.4byte	.LLST266
+	.4byte	.LLST267
 	.uleb128 0x44
 	.4byte	.LASF516
 	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x384a
-	.4byte	.LLST267
+	.2byte	0x32d
+	.4byte	0x385a
+	.4byte	.LLST268
 	.uleb128 0x51
 	.ascii	"ret\000"
 	.byte	0x3
-	.2byte	0x32e
+	.2byte	0x32f
 	.4byte	0x64
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x45
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x30c
-	.4byte	.LLST268
-	.uleb128 0x45
-	.4byte	.LASF613
+	.4byte	.LASF611
 	.byte	0x3
-	.2byte	0x32f
+	.2byte	0x330
 	.4byte	0x30c
 	.4byte	.LLST269
 	.uleb128 0x45
-	.4byte	.LASF621
+	.4byte	.LASF612
 	.byte	0x3
-	.2byte	0x32f
+	.2byte	0x330
 	.4byte	0x30c
 	.4byte	.LLST270
-	.uleb128 0x52
-	.ascii	"lpa\000"
+	.uleb128 0x45
+	.4byte	.LASF620
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0x30c
 	.4byte	.LLST271
 	.uleb128 0x52
-	.ascii	"ppa\000"
+	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x330
+	.2byte	0x331
 	.4byte	0x30c
 	.4byte	.LLST272
 	.uleb128 0x52
-	.ascii	"n\000"
+	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x332
+	.2byte	0x331
 	.4byte	0x30c
 	.4byte	.LLST273
-	.uleb128 0x45
-	.4byte	.LASF377
+	.uleb128 0x52
+	.ascii	"n\000"
 	.byte	0x3
-	.2byte	0x332
+	.2byte	0x333
 	.4byte	0x30c
 	.4byte	.LLST274
 	.uleb128 0x45
-	.4byte	.LASF614
+	.4byte	.LASF377
 	.byte	0x3
-	.2byte	0x332
+	.2byte	0x333
 	.4byte	0x30c
 	.4byte	.LLST275
 	.uleb128 0x45
-	.4byte	.LASF622
+	.4byte	.LASF613
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0x30c
 	.4byte	.LLST276
-	.uleb128 0x3e
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30c
 	.uleb128 0x45
-	.4byte	.LASF624
+	.4byte	.LASF621
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0x30c
 	.4byte	.LLST277
+	.uleb128 0x3e
+	.4byte	.LASF622
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0x30c
 	.uleb128 0x45
-	.4byte	.LASF625
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0x30c
 	.4byte	.LLST278
+	.uleb128 0x45
+	.4byte	.LASF624
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0x30c
+	.4byte	.LLST279
 	.uleb128 0x53
-	.4byte	.LBB513
-	.4byte	.LBE513-.LBB513
-	.4byte	0x5211
+	.4byte	.LBB537
+	.4byte	.LBE537-.LBB537
+	.4byte	0x51ca
 	.uleb128 0x3e
 	.4byte	.LASF392
 	.byte	0x3
-	.2byte	0x379
+	.2byte	0x37a
 	.4byte	0x301
 	.uleb128 0x31
-	.4byte	.LVL1414
-	.4byte	0x4561
+	.4byte	.LVL1432
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL1415
+	.4byte	.LVL1433
 	.4byte	0x1e6d
 	.byte	0
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB514
-	.4byte	.LBE514-.LBB514
+	.4byte	.LBB538
+	.4byte	.LBE538-.LBB538
 	.byte	0x3
-	.2byte	0x34f
-	.4byte	0x526b
+	.2byte	0x350
+	.4byte	0x5224
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32310,8 +32431,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB515
-	.4byte	.LBE515-.LBB515
+	.4byte	.LBB539
+	.4byte	.LBE539-.LBB539
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32319,39 +32440,39 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB516
-	.4byte	.LBE516-.LBB516
+	.4byte	.LBB540
+	.4byte	.LBE540-.LBB540
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL1419
-	.4byte	0x672a
+	.4byte	.LVL1437
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1374
-	.4byte	0x377a
+	.4byte	.LVL1392
+	.4byte	0x378a
 	.uleb128 0x31
-	.4byte	.LVL1380
-	.4byte	0x4f66
+	.4byte	.LVL1398
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1395
+	.4byte	.LVL1413
 	.4byte	0x1c72
 	.uleb128 0x31
-	.4byte	.LVL1398
-	.4byte	0x3929
+	.4byte	.LVL1416
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1405
+	.4byte	.LVL1423
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1411
+	.4byte	.LVL1429
 	.4byte	0x176f
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x64
@@ -32359,13 +32480,13 @@ check_vpc_table:
 	.4byte	.LFE163-.LFB163
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52c6
+	.4byte	0x527f
 	.uleb128 0x31
-	.4byte	.LVL1210
-	.4byte	0x52c6
+	.4byte	.LVL1228
+	.4byte	0x527f
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x64
@@ -32373,22 +32494,22 @@ check_vpc_table:
 	.4byte	.LFE162-.LFB162
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5305
+	.4byte	0x52be
 	.uleb128 0x31
-	.4byte	.LVL1206
-	.4byte	0x4f66
+	.4byte	.LVL1224
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1207
-	.4byte	0x39f4
+	.4byte	.LVL1225
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1208
-	.4byte	0x372d
+	.4byte	.LVL1226
+	.4byte	0x373d
 	.uleb128 0x31
-	.4byte	.LVL1209
-	.4byte	0x3588
+	.4byte	.LVL1227
+	.4byte	0x3598
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x64
@@ -32396,56 +32517,56 @@ check_vpc_table:
 	.4byte	.LFE161-.LFB161
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5394
+	.4byte	0x534d
 	.uleb128 0x3e
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x5394
+	.4byte	0x534d
 	.uleb128 0x40
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
 	.2byte	0x2f3
 	.uleb128 0x53
-	.4byte	.LBB526
-	.4byte	.LBE526-.LBB526
-	.4byte	0x5354
+	.4byte	.LBB550
+	.4byte	.LBE550-.LBB550
+	.4byte	0x530d
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0x30c
 	.uleb128 0x31
-	.4byte	.LVL1629
+	.4byte	.LVL1647
 	.4byte	0x1c72
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1622
-	.4byte	0x671f
+	.4byte	.LVL1640
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1623
-	.4byte	0x5868
+	.4byte	.LVL1641
+	.4byte	0x5821
 	.uleb128 0x31
-	.4byte	.LVL1624
-	.4byte	0x56e0
+	.4byte	.LVL1642
+	.4byte	0x5699
 	.uleb128 0x31
-	.4byte	.LVL1625
-	.4byte	0x55e4
+	.4byte	.LVL1643
+	.4byte	0x559d
 	.uleb128 0x31
-	.4byte	.LVL1626
-	.4byte	0x4407
+	.4byte	.LVL1644
+	.4byte	0x43c0
 	.uleb128 0x31
-	.4byte	.LVL1627
-	.4byte	0x4834
+	.4byte	.LVL1645
+	.4byte	0x47ed
 	.uleb128 0x31
-	.4byte	.LVL1628
-	.4byte	0x2805
+	.4byte	.LVL1646
+	.4byte	0x2815
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x419
 	.uleb128 0x4d
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x64
@@ -32453,90 +32574,90 @@ check_vpc_table:
 	.4byte	.LFE160-.LFB160
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5493
+	.4byte	0x544c
 	.uleb128 0x3e
 	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0x301
 	.uleb128 0x45
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0x301
-	.4byte	.LLST298
+	.4byte	.LLST299
 	.uleb128 0x45
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0x301
-	.4byte	.LLST299
+	.4byte	.LLST300
 	.uleb128 0x3f
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0x301
 	.uleb128 0x48
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1779
+	.4byte	.L1784
 	.uleb128 0x48
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1781
+	.4byte	.L1786
 	.uleb128 0x31
-	.4byte	.LVL1591
-	.4byte	0x4407
+	.4byte	.LVL1609
+	.4byte	0x43c0
 	.uleb128 0x31
-	.4byte	.LVL1592
-	.4byte	0x4834
+	.4byte	.LVL1610
+	.4byte	0x47ed
 	.uleb128 0x31
-	.4byte	.LVL1593
-	.4byte	0x460c
+	.4byte	.LVL1611
+	.4byte	0x45c5
 	.uleb128 0x31
-	.4byte	.LVL1600
-	.4byte	0x499b
+	.4byte	.LVL1618
+	.4byte	0x4954
 	.uleb128 0x31
-	.4byte	.LVL1601
+	.4byte	.LVL1619
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1602
+	.4byte	.LVL1620
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL1603
-	.4byte	0x2c45
+	.4byte	.LVL1621
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1605
-	.4byte	0x5493
+	.4byte	.LVL1623
+	.4byte	0x544c
 	.uleb128 0x31
-	.4byte	.LVL1609
-	.4byte	0x58b9
+	.4byte	.LVL1627
+	.4byte	0x5872
 	.uleb128 0x31
-	.4byte	.LVL1610
-	.4byte	0x4407
+	.4byte	.LVL1628
+	.4byte	0x43c0
 	.uleb128 0x31
-	.4byte	.LVL1612
-	.4byte	0x5493
+	.4byte	.LVL1630
+	.4byte	0x544c
 	.uleb128 0x31
-	.4byte	.LVL1614
-	.4byte	0x5493
+	.4byte	.LVL1632
+	.4byte	0x544c
 	.uleb128 0x31
-	.4byte	.LVL1618
-	.4byte	0x2c45
+	.4byte	.LVL1636
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1619
-	.4byte	0x4250
+	.4byte	.LVL1637
+	.4byte	0x4247
 	.uleb128 0x31
-	.4byte	.LVL1620
-	.4byte	0x3588
+	.4byte	.LVL1638
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1621
-	.4byte	0x2805
+	.4byte	.LVL1639
+	.4byte	0x2815
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x64
@@ -32544,25 +32665,25 @@ check_vpc_table:
 	.4byte	.LFE159-.LFB159
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x55ba
+	.4byte	0x5573
 	.uleb128 0x44
 	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x301
-	.4byte	.LLST100
+	.4byte	.LLST99
 	.uleb128 0x44
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x2f6
-	.4byte	.LLST101
+	.4byte	.LLST100
 	.uleb128 0x45
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0x301
-	.4byte	.LLST102
+	.4byte	.LLST101
 	.uleb128 0x3e
 	.4byte	.LASF357
 	.byte	0x3
@@ -32579,91 +32700,91 @@ check_vpc_table:
 	.2byte	0x212
 	.4byte	0x301
 	.uleb128 0x45
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0x301
-	.4byte	.LLST103
+	.4byte	.LLST102
 	.uleb128 0x45
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0x301
-	.4byte	.LLST104
+	.4byte	.LLST103
 	.uleb128 0x45
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0x301
-	.4byte	.LLST105
+	.4byte	.LLST104
 	.uleb128 0x45
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0x301
-	.4byte	.LLST106
+	.4byte	.LLST105
 	.uleb128 0x48
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L495
+	.4byte	.L482
 	.uleb128 0x31
-	.4byte	.LVL418
+	.4byte	.LVL424
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL425
+	.4byte	.LVL431
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL433
+	.4byte	.LVL439
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL437
-	.4byte	0x45c9
-	.uleb128 0x31
-	.4byte	.LVL438
-	.4byte	0x55ba
-	.uleb128 0x31
-	.4byte	.LVL439
-	.4byte	0x4afe
+	.4byte	.LVL443
+	.4byte	0x4582
 	.uleb128 0x31
 	.4byte	.LVL444
-	.4byte	0x4b59
+	.4byte	0x5573
 	.uleb128 0x31
-	.4byte	.LVL449
-	.4byte	0x45c9
+	.4byte	.LVL445
+	.4byte	0x4ab7
 	.uleb128 0x31
 	.4byte	.LVL450
-	.4byte	0x55ba
-	.uleb128 0x31
-	.4byte	.LVL451
-	.4byte	0x4afe
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL454
-	.4byte	0x4b59
+	.4byte	.LVL455
+	.4byte	0x4582
 	.uleb128 0x31
 	.4byte	.LVL456
-	.4byte	0x436e
+	.4byte	0x5573
+	.uleb128 0x31
+	.4byte	.LVL457
+	.4byte	0x4ab7
+	.uleb128 0x31
+	.4byte	.LVL460
+	.4byte	0x4b12
+	.uleb128 0x31
+	.4byte	.LVL462
+	.4byte	0x436d
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x64
 	.byte	0x1
-	.4byte	0x55e4
+	.4byte	0x559d
 	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x301
 	.uleb128 0x3e
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0x301
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x64
@@ -32671,14 +32792,14 @@ check_vpc_table:
 	.4byte	.LFE157-.LFB157
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x56e0
+	.4byte	0x5699
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB408
-	.4byte	.LBE408-.LBB408
+	.4byte	.LBB432
+	.4byte	.LBE432-.LBB432
 	.byte	0x3
 	.2byte	0x1f9
-	.4byte	0x5658
+	.4byte	0x5611
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32686,8 +32807,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB409
-	.4byte	.LBE409-.LBB409
+	.4byte	.LBB433
+	.4byte	.LBE433-.LBB433
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32695,25 +32816,25 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB410
-	.4byte	.LBE410-.LBB410
+	.4byte	.LBB434
+	.4byte	.LBE434-.LBB434
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL747
-	.4byte	0x672a
+	.4byte	.LVL764
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x54
 	.4byte	0x17c6
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
+	.4byte	.LBB435
+	.4byte	.LBE435-.LBB435
 	.byte	0x3
 	.2byte	0x1fa
-	.4byte	0x56b2
+	.4byte	0x566b
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32721,8 +32842,8 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB412
-	.4byte	.LBE412-.LBB412
+	.4byte	.LBB436
+	.4byte	.LBE436-.LBB436
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -32730,36 +32851,36 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB413
-	.4byte	.LBE413-.LBB413
+	.4byte	.LBB437
+	.4byte	.LBE437-.LBB437
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL748
-	.4byte	0x672a
+	.4byte	.LVL765
+	.4byte	0x67fd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL744
+	.4byte	.LVL761
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL745
+	.4byte	.LVL762
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL746
+	.4byte	.LVL763
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL749
+	.4byte	.LVL766
 	.4byte	0x230f
 	.uleb128 0x31
-	.4byte	.LVL750
-	.4byte	0x31bc
+	.4byte	.LVL767
+	.4byte	0x31cc
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x64
@@ -32767,135 +32888,135 @@ check_vpc_table:
 	.4byte	.LFE156-.LFB156
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5868
+	.4byte	0x5821
 	.uleb128 0x52
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0x30c
-	.4byte	.LLST114
+	.4byte	.LLST115
 	.uleb128 0x3e
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0x30c
 	.uleb128 0x38
 	.4byte	.LASF362
-	.4byte	0x48f4
+	.4byte	0x48ad
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6287
-	.uleb128 0x31
-	.4byte	.LVL479
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL480
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL481
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL482
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL483
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL484
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL485
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL486
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL487
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL488
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL489
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL490
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL491
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL492
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL493
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL494
-	.4byte	0x6740
-	.uleb128 0x31
-	.4byte	.LVL495
-	.4byte	0x6740
+	.4byte	__func__.6235
 	.uleb128 0x31
 	.4byte	.LVL496
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL497
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL498
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL499
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL500
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL501
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL502
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL503
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL504
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL505
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL506
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL507
-	.4byte	0x17c6
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL508
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL509
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL510
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL511
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL512
-	.4byte	0x6740
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL513
-	.4byte	0x6740
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL514
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL515
+	.4byte	0x6813
 	.uleb128 0x31
 	.4byte	.LVL516
-	.4byte	0x671f
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL517
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL518
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL519
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL520
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL521
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL522
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL523
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL524
+	.4byte	0x17c6
+	.uleb128 0x31
+	.4byte	.LVL525
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL526
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL527
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL528
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL529
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL530
+	.4byte	0x6813
+	.uleb128 0x31
+	.4byte	.LVL533
+	.4byte	0x67f2
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x64
@@ -32903,12 +33024,12 @@ check_vpc_table:
 	.4byte	.LFE155-.LFB155
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58b9
+	.4byte	0x5872
 	.uleb128 0x23
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x5394
+	.4byte	0x534d
 	.4byte	.LLST11
 	.uleb128 0x4a
 	.ascii	"i\000"
@@ -32918,16 +33039,16 @@ check_vpc_table:
 	.4byte	.LLST12
 	.uleb128 0x31
 	.4byte	.LVL28
-	.4byte	0x58fa
+	.4byte	0x58b3
 	.uleb128 0x31
 	.4byte	.LVL29
-	.4byte	0x58fa
+	.4byte	0x58b3
 	.uleb128 0x31
 	.4byte	.LVL32
-	.4byte	0x58b9
+	.4byte	0x5872
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x64
@@ -32935,85 +33056,85 @@ check_vpc_table:
 	.4byte	.LFE154-.LFB154
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58e2
+	.4byte	0x589b
 	.uleb128 0x23
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x301
 	.4byte	.LLST10
 	.byte	0
 	.uleb128 0x58
-	.4byte	.LASF651
+	.4byte	.LASF650
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x58fa
+	.4byte	0x58b3
 	.uleb128 0x34
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0x30c
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x3
-	.byte	0x7f
+	.byte	0x7e
 	.4byte	0x301
 	.4byte	.LFB152
 	.4byte	.LFE152-.LFB152
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5939
+	.4byte	0x58f2
 	.uleb128 0x2b
 	.ascii	"num\000"
 	.byte	0x3
-	.byte	0x7f
+	.byte	0x7e
 	.4byte	0x30c
 	.4byte	.LLST9
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
-	.byte	0x81
+	.byte	0x80
 	.4byte	0x301
 	.uleb128 0x20
-	.4byte	.LASF654
+	.4byte	.LASF653
 	.byte	0x3
-	.byte	0x82
+	.byte	0x81
 	.4byte	0x30c
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF655
+	.4byte	.LASF654
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0x64
 	.4byte	.LFB151
 	.4byte	.LFE151-.LFB151
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x597f
+	.4byte	0x5938
 	.uleb128 0x23
 	.4byte	.LASF85
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0xb6
-	.4byte	.LLST67
+	.4byte	.LLST65
 	.uleb128 0x29
 	.ascii	"buf\000"
 	.byte	0x3
-	.byte	0x73
+	.byte	0x72
 	.4byte	0xb6
 	.uleb128 0x31
 	.4byte	.LVL286
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL287
-	.4byte	0x597f
+	.4byte	0x5938
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF656
+	.4byte	.LASF655
 	.byte	0x3
 	.byte	0xa
 	.4byte	0x64
@@ -33021,13 +33142,13 @@ check_vpc_table:
 	.4byte	.LFE150-.LFB150
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c75
+	.4byte	0x5c2e
 	.uleb128 0x23
 	.4byte	.LASF85
 	.byte	0x3
 	.byte	0xa
 	.4byte	0xb6
-	.4byte	.LLST64
+	.4byte	.LLST62
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
@@ -33039,539 +33160,557 @@ check_vpc_table:
 	.byte	0xd
 	.4byte	0xb6
 	.uleb128 0x53
-	.4byte	.LBB284
-	.4byte	.LBE284-.LBB284
-	.4byte	0x59ea
+	.4byte	.LBB289
+	.4byte	.LBE289-.LBB289
+	.4byte	0x59a3
 	.uleb128 0x2c
 	.4byte	.LASF392
 	.byte	0x3
-	.byte	0x57
+	.byte	0x56
 	.4byte	0x301
-	.4byte	.LLST65
+	.4byte	.LLST63
 	.uleb128 0x31
 	.4byte	.LVL277
-	.4byte	0x3fa6
+	.4byte	0x3fb6
 	.uleb128 0x31
 	.4byte	.LVL279
-	.4byte	0x674b
+	.4byte	0x681e
 	.byte	0
 	.uleb128 0x53
-	.4byte	.LBB285
-	.4byte	.LBE285-.LBB285
-	.4byte	0x5a10
+	.4byte	.LBB290
+	.4byte	.LBE290-.LBB290
+	.4byte	0x59c9
 	.uleb128 0x2c
 	.4byte	.LASF392
 	.byte	0x3
-	.byte	0x60
+	.byte	0x5f
 	.4byte	0x301
-	.4byte	.LLST66
+	.4byte	.LLST64
 	.uleb128 0x31
 	.4byte	.LVL283
-	.4byte	0x674b
+	.4byte	0x681e
 	.byte	0
 	.uleb128 0x31
 	.4byte	.LVL207
-	.4byte	0x6757
+	.4byte	0x682a
 	.uleb128 0x31
 	.4byte	.LVL208
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL209
-	.4byte	0x6757
+	.4byte	0x682a
 	.uleb128 0x31
 	.4byte	.LVL210
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL211
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL212
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL213
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL214
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL215
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL216
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL217
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL218
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL219
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL220
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL221
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL222
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL223
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL224
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL225
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL226
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL227
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL228
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL229
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL230
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL231
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL232
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL233
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL234
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL235
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL236
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL237
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL238
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL239
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL240
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL241
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL242
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL243
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL244
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL245
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL246
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL247
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL248
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL249
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL250
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL251
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL252
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL253
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL254
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL255
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL256
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL257
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL258
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL259
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL260
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL261
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL262
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL263
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL264
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL265
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL266
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL267
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL268
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL269
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL270
-	.4byte	0x277b
+	.4byte	0x278b
 	.uleb128 0x31
 	.4byte	.LVL271
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL272
-	.4byte	0x272c
+	.4byte	0x273c
 	.uleb128 0x31
 	.4byte	.LVL273
-	.4byte	0x674b
+	.4byte	0x681e
 	.uleb128 0x31
 	.4byte	.LVL276
-	.4byte	0x674b
+	.4byte	0x681e
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x3409
+	.4byte	0x3419
 	.4byte	.LFB286
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c97
+	.4byte	0x5c50
 	.uleb128 0x61
-	.4byte	0x3416
+	.4byte	0x3426
 	.4byte	.LLST8
 	.uleb128 0x2e
-	.4byte	0x3422
+	.4byte	0x3432
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x58e2
+	.4byte	0x589b
 	.4byte	.LFB153
 	.4byte	.LFE153-.LFB153
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cb2
+	.4byte	0x5c6b
 	.uleb128 0x62
-	.4byte	0x58ee
+	.4byte	0x58a7
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x55ba
+	.4byte	0x5573
 	.4byte	.LFB158
 	.4byte	.LFE158-.LFB158
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cea
+	.4byte	0x5ca3
 	.uleb128 0x61
-	.4byte	0x55cb
+	.4byte	0x5584
 	.4byte	.LLST13
 	.uleb128 0x30
-	.4byte	0x55d7
+	.4byte	0x5590
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x2e
-	.4byte	0x55cb
+	.4byte	0x5584
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x30
-	.4byte	0x5cce
+	.4byte	0x5c87
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x63
-	.4byte	0x4af6
+	.4byte	0x4aaf
 	.4byte	.LFB174
 	.4byte	.LFE174-.LFB174
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x63
-	.4byte	0x43fb
+	.4byte	0x43b4
 	.4byte	.LFB188
 	.4byte	.LFE188-.LFB188
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x63
-	.4byte	0x43ef
+	.4byte	0x43a8
 	.4byte	.LFB189
 	.4byte	.LFE189-.LFB189
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x60
-	.4byte	0x4206
+	.4byte	0x4188
+	.4byte	.LFB196
+	.4byte	.LFE196-.LFB196
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5d6a
+	.uleb128 0x61
+	.4byte	0x4198
+	.4byte	.LLST28
+	.uleb128 0x30
+	.4byte	0x41a3
+	.uleb128 0x30
+	.4byte	0x41ae
+	.uleb128 0x30
+	.4byte	0x41b9
+	.uleb128 0x30
+	.4byte	0x41c4
+	.uleb128 0x30
+	.4byte	0x41cf
+	.uleb128 0x30
+	.4byte	0x41da
+	.uleb128 0x30
+	.4byte	0x41e5
+	.uleb128 0x30
+	.4byte	0x41f0
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0x68
+	.uleb128 0x2e
+	.4byte	0x4198
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0x68
+	.uleb128 0x64
+	.4byte	0x5cec
+	.4byte	.LLST29
+	.uleb128 0x64
+	.4byte	0x5cf1
+	.4byte	.LLST30
+	.uleb128 0x64
+	.4byte	0x5cf6
+	.4byte	.LLST31
+	.uleb128 0x64
+	.4byte	0x5cfb
+	.4byte	.LLST32
+	.uleb128 0x64
+	.4byte	0x5d00
+	.4byte	.LLST33
+	.uleb128 0x64
+	.4byte	0x5d05
+	.4byte	.LLST34
+	.uleb128 0x30
+	.4byte	0x5d0a
+	.uleb128 0x64
+	.4byte	0x5d0f
+	.4byte	.LLST35
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	0x41fd
 	.4byte	.LFB195
 	.4byte	.LFE195-.LFB195
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d65
+	.4byte	0x5db8
 	.uleb128 0x61
-	.4byte	0x4212
-	.4byte	.LLST37
+	.4byte	0x4209
+	.4byte	.LLST36
 	.uleb128 0x30
-	.4byte	0x421d
+	.4byte	0x4214
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x68
-	.4byte	0x5d5b
+	.4byte	.Ldebug_ranges0+0x80
+	.4byte	0x5dae
 	.uleb128 0x2e
-	.4byte	0x4212
+	.4byte	0x4209
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x68
+	.4byte	.Ldebug_ranges0+0x80
 	.uleb128 0x30
-	.4byte	0x5d33
+	.4byte	0x5d86
 	.uleb128 0x24
-	.4byte	.LVL120
-	.4byte	0x671f
+	.4byte	.LVL118
+	.4byte	0x67f2
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL119
-	.4byte	0x4178
+	.4byte	.LVL117
+	.4byte	0x4188
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x422b
+	.4byte	0x4222
 	.4byte	.LFB194
 	.4byte	.LFE194-.LFB194
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5db3
+	.4byte	0x5e06
 	.uleb128 0x61
-	.4byte	0x4237
-	.4byte	.LLST40
+	.4byte	0x422e
+	.4byte	.LLST39
 	.uleb128 0x30
-	.4byte	0x4242
+	.4byte	0x4239
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x80
-	.4byte	0x5da9
+	.4byte	.Ldebug_ranges0+0x98
+	.4byte	0x5dfc
 	.uleb128 0x2e
-	.4byte	0x4237
+	.4byte	0x422e
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x80
+	.4byte	.Ldebug_ranges0+0x98
 	.uleb128 0x30
-	.4byte	0x5d81
+	.4byte	0x5dd4
 	.uleb128 0x24
-	.4byte	.LVL130
-	.4byte	0x671f
+	.4byte	.LVL128
+	.4byte	0x67f2
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL129
-	.4byte	0x4109
+	.4byte	.LVL127
+	.4byte	0x4119
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x3f27
+	.4byte	0x3f37
 	.4byte	.LFB202
 	.4byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e69
+	.4byte	0x5eba
 	.uleb128 0x61
-	.4byte	0x3f38
-	.4byte	.LLST49
+	.4byte	0x3f48
+	.4byte	.LLST48
 	.uleb128 0x30
-	.4byte	0x3f44
+	.4byte	0x3f54
 	.uleb128 0x30
-	.4byte	0x3f50
+	.4byte	0x3f60
 	.uleb128 0x30
-	.4byte	0x3f5c
+	.4byte	0x3f6c
 	.uleb128 0x30
-	.4byte	0x3f68
+	.4byte	0x3f78
 	.uleb128 0x30
-	.4byte	0x3f74
+	.4byte	0x3f84
 	.uleb128 0x30
-	.4byte	0x3f80
+	.4byte	0x3f90
 	.uleb128 0x30
-	.4byte	0x3f8c
+	.4byte	0x3f9c
 	.uleb128 0x30
-	.4byte	0x3f98
-	.uleb128 0x33
-	.4byte	.LBB268
-	.4byte	.LBE268-.LBB268
+	.4byte	0x3fa8
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0xb0
 	.uleb128 0x2e
-	.4byte	0x3f38
-	.uleb128 0x33
-	.4byte	.LBB269
-	.4byte	.LBE269-.LBB269
-	.uleb128 0x30
-	.4byte	0x5dcf
+	.4byte	0x3f48
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0xb0
 	.uleb128 0x30
-	.4byte	0x5dd4
+	.4byte	0x5e22
+	.uleb128 0x64
+	.4byte	0x5e27
+	.4byte	.LLST49
 	.uleb128 0x64
-	.4byte	0x5dd9
+	.4byte	0x5e2c
 	.4byte	.LLST50
-	.uleb128 0x30
-	.4byte	0x5dde
 	.uleb128 0x64
-	.4byte	0x5de3
+	.4byte	0x5e31
 	.4byte	.LLST51
 	.uleb128 0x64
-	.4byte	0x5de8
+	.4byte	0x5e36
 	.4byte	.LLST52
+	.uleb128 0x65
+	.4byte	0x5e3b
+	.uleb128 0x1
+	.byte	0x58
 	.uleb128 0x30
-	.4byte	0x5ded
+	.4byte	0x5e40
 	.uleb128 0x30
-	.4byte	0x5df2
+	.4byte	0x5e45
 	.uleb128 0x31
-	.4byte	.LVL163
-	.4byte	0x671f
-	.uleb128 0x31
-	.4byte	.LVL165
-	.4byte	0x4087
+	.4byte	.LVL162
+	.4byte	0x67f2
 	.uleb128 0x31
 	.4byte	.LVL166
-	.4byte	0x671f
+	.4byte	0x4097
 	.uleb128 0x31
 	.4byte	.LVL167
-	.4byte	0x4206
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x3d77
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5ed7
-	.uleb128 0x61
-	.4byte	0x3d88
-	.4byte	.LLST53
-	.uleb128 0x64
-	.4byte	0x3d94
-	.4byte	.LLST54
-	.uleb128 0x30
-	.4byte	0x3da0
-	.uleb128 0x30
-	.4byte	0x3dac
-	.uleb128 0x53
-	.4byte	.LBB272
-	.4byte	.LBE272-.LBB272
-	.4byte	0x5ecd
-	.uleb128 0x2e
-	.4byte	0x3d88
-	.uleb128 0x33
-	.4byte	.LBB273
-	.4byte	.LBE273-.LBB273
-	.uleb128 0x30
-	.4byte	0x5e85
-	.uleb128 0x30
-	.4byte	0x5e8e
-	.uleb128 0x30
-	.4byte	0x5e93
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL171
-	.4byte	0x671f
+	.4byte	.LVL168
+	.4byte	0x41fd
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL172
-	.4byte	0x4250
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x3709
+	.4byte	0x3719
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f0f
+	.4byte	0x5ef2
 	.uleb128 0x61
-	.4byte	0x3716
-	.4byte	.LLST55
+	.4byte	0x3726
+	.4byte	.LLST53
 	.uleb128 0x30
-	.4byte	0x3722
+	.4byte	0x3732
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x98
+	.4byte	.Ldebug_ranges0+0xc8
 	.uleb128 0x2e
-	.4byte	0x3716
+	.4byte	0x3726
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x98
+	.4byte	.Ldebug_ranges0+0xc8
 	.uleb128 0x30
-	.4byte	0x5ef3
+	.4byte	0x5ed6
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x3409
+	.4byte	0x3419
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f3e
+	.4byte	0x5f21
 	.uleb128 0x61
-	.4byte	0x3416
-	.4byte	.LLST56
+	.4byte	0x3426
+	.4byte	.LLST54
 	.uleb128 0x61
-	.4byte	0x3422
-	.4byte	.LLST57
+	.4byte	0x3432
+	.4byte	.LLST55
 	.uleb128 0x24
 	.4byte	.LVL178
-	.4byte	0x5c75
+	.4byte	0x5c2e
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x2d01
+	.4byte	0x2d11
 	.4byte	.LFB232
 	.4byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f7e
+	.4byte	0x5f61
 	.uleb128 0x62
-	.4byte	0x2d0e
+	.4byte	0x2d1e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x30
-	.4byte	0x2d1a
+	.4byte	0x2d2a
 	.uleb128 0x33
-	.4byte	.LBB282
-	.4byte	.LBE282-.LBB282
+	.4byte	.LBB287
+	.4byte	.LBE287-.LBB287
 	.uleb128 0x2e
-	.4byte	0x2d0e
+	.4byte	0x2d1e
 	.uleb128 0x33
-	.4byte	.LBB283
-	.4byte	.LBE283-.LBB283
+	.4byte	.LBB288
+	.4byte	.LBE288-.LBB288
 	.uleb128 0x65
-	.4byte	0x5f58
+	.4byte	0x5f3b
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
@@ -33583,18 +33722,18 @@ check_vpc_table:
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fb3
+	.4byte	0x5f96
 	.uleb128 0x61
 	.4byte	0x2685
-	.4byte	.LLST72
+	.4byte	.LLST71
 	.uleb128 0x33
-	.4byte	.LBB288
-	.4byte	.LBE288-.LBB288
+	.4byte	.LBB293
+	.4byte	.LBE293-.LBB293
 	.uleb128 0x2e
 	.4byte	0x2685
 	.uleb128 0x31
-	.4byte	.LVL308
-	.4byte	0x422b
+	.4byte	.LVL314
+	.4byte	0x4222
 	.byte	0
 	.byte	0
 	.uleb128 0x60
@@ -33603,24 +33742,114 @@ check_vpc_table:
 	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fd9
+	.4byte	0x5fbc
 	.uleb128 0x31
-	.4byte	.LVL345
-	.4byte	0x4561
+	.4byte	.LVL351
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL346
+	.4byte	.LVL352
 	.4byte	0x1e6d
 	.byte	0
 	.uleb128 0x60
+	.4byte	0x436d
+	.4byte	.LFB190
+	.4byte	.LFE190-.LFB190
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6035
+	.uleb128 0x61
+	.4byte	0x4379
+	.4byte	.LLST97
+	.uleb128 0x61
+	.4byte	0x4384
+	.4byte	.LLST98
+	.uleb128 0x66
+	.4byte	0x43a8
+	.4byte	.LBB310
+	.4byte	.LBE310-.LBB310
+	.byte	0x2
+	.byte	0x65
+	.uleb128 0x33
+	.4byte	.LBB312
+	.4byte	.LBE312-.LBB312
+	.uleb128 0x2e
+	.4byte	0x4384
+	.uleb128 0x2e
+	.4byte	0x4379
+	.uleb128 0x33
+	.4byte	.LBB313
+	.4byte	.LBE313-.LBB313
+	.uleb128 0x30
+	.4byte	0x4390
+	.uleb128 0x33
+	.4byte	.LBB314
+	.4byte	.LBE314-.LBB314
+	.uleb128 0x30
+	.4byte	0x439a
+	.uleb128 0x31
+	.4byte	.LVL417
+	.4byte	0x451a
+	.uleb128 0x31
+	.4byte	.LVL418
+	.4byte	0x1954
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	0x3d87
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60ac
+	.uleb128 0x61
+	.4byte	0x3d98
+	.4byte	.LLST106
+	.uleb128 0x64
+	.4byte	0x3da4
+	.4byte	.LLST107
+	.uleb128 0x30
+	.4byte	0x3db0
+	.uleb128 0x30
+	.4byte	0x3dbc
+	.uleb128 0x53
+	.4byte	.LBB323
+	.4byte	.LBE323-.LBB323
+	.4byte	0x6099
+	.uleb128 0x2e
+	.4byte	0x3d98
+	.uleb128 0x33
+	.4byte	.LBB324
+	.4byte	.LBE324-.LBB324
+	.uleb128 0x30
+	.4byte	0x6051
+	.uleb128 0x30
+	.4byte	0x605a
+	.uleb128 0x30
+	.4byte	0x605f
+	.uleb128 0x31
+	.4byte	.LVL472
+	.4byte	0x67f2
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL469
+	.4byte	0x4247
+	.uleb128 0x31
+	.4byte	.LVL470
+	.4byte	0x67f2
+	.byte	0
+	.uleb128 0x60
 	.4byte	0x1900
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x60ee
+	.4byte	0x61c1
 	.uleb128 0x61
 	.4byte	0x1910
-	.4byte	.LLST107
+	.4byte	.LLST108
 	.uleb128 0x30
 	.4byte	0x191b
 	.uleb128 0x30
@@ -33628,34 +33857,34 @@ check_vpc_table:
 	.uleb128 0x30
 	.4byte	0x1931
 	.uleb128 0x33
-	.4byte	.LBB313
-	.4byte	.LBE313-.LBB313
+	.4byte	.LBB337
+	.4byte	.LBE337-.LBB337
 	.uleb128 0x2e
 	.4byte	0x1910
 	.uleb128 0x33
-	.4byte	.LBB314
-	.4byte	.LBE314-.LBB314
+	.4byte	.LBB338
+	.4byte	.LBE338-.LBB338
 	.uleb128 0x30
-	.4byte	0x5ff5
+	.4byte	0x60c8
 	.uleb128 0x65
-	.4byte	0x5ffa
+	.4byte	0x60cd
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x65
-	.4byte	0x5fff
+	.4byte	0x60d2
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x66
+	.uleb128 0x67
 	.4byte	0x193c
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB315
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	.LBB339
+	.4byte	.Ldebug_ranges0+0x130
 	.byte	0x1
 	.byte	0xa7
-	.4byte	0x6088
+	.4byte	0x615b
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33663,7 +33892,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	.Ldebug_ranges0+0x130
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33671,24 +33900,24 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	.Ldebug_ranges0+0x130
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
 	.uleb128 0x31
-	.4byte	.LVL459
-	.4byte	0x6714
+	.4byte	.LVL476
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB321
-	.4byte	.Ldebug_ranges0+0xe8
+	.4byte	.LBB345
+	.4byte	.Ldebug_ranges0+0x148
 	.byte	0x1
 	.byte	0xa8
-	.4byte	0x60d0
+	.4byte	0x61a3
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33696,7 +33925,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xe8
+	.4byte	.Ldebug_ranges0+0x148
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33704,7 +33933,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xe8
+	.4byte	.Ldebug_ranges0+0x148
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
@@ -33713,13 +33942,13 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL460
+	.4byte	.LVL477
 	.4byte	0x1954
 	.uleb128 0x31
-	.4byte	.LVL461
+	.4byte	.LVL478
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL462
+	.4byte	.LVL479
 	.4byte	0x1954
 	.byte	0
 	.byte	0
@@ -33730,28 +33959,28 @@ check_vpc_table:
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x616b
+	.4byte	0x623e
 	.uleb128 0x61
 	.4byte	0x17d6
-	.4byte	.LLST111
+	.4byte	.LLST112
 	.uleb128 0x61
 	.4byte	0x17df
-	.4byte	.LLST112
+	.4byte	.LLST113
 	.uleb128 0x61
 	.4byte	0x17e8
-	.4byte	.LLST113
+	.4byte	.LLST114
 	.uleb128 0x53
-	.4byte	.LBB353
-	.4byte	.LBE353-.LBB353
-	.4byte	0x6134
+	.4byte	.LBB377
+	.4byte	.LBE377-.LBB377
+	.4byte	0x6207
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LBB354
-	.4byte	.LBE354-.LBB354
+	.4byte	.LBB378
+	.4byte	.LBE378-.LBB378
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33759,15 +33988,15 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x33
-	.4byte	.LBB355
-	.4byte	.LBE355-.LBB355
+	.4byte	.LBB379
+	.4byte	.LBE379-.LBB379
 	.uleb128 0x30
-	.4byte	0x6129
+	.4byte	0x61fc
 	.uleb128 0x30
-	.4byte	0x612e
+	.4byte	0x6201
 	.uleb128 0x31
-	.4byte	.LVL478
-	.4byte	0x6714
+	.4byte	.LVL495
+	.4byte	0x67e7
 	.byte	0
 	.byte	0
 	.byte	0
@@ -33777,7 +34006,7 @@ check_vpc_table:
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6209
+	.4byte	0x62dc
 	.uleb128 0x65
 	.4byte	0x1d6b
 	.uleb128 0x1
@@ -33789,49 +34018,49 @@ check_vpc_table:
 	.uleb128 0x30
 	.4byte	0x1d8d
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x150
-	.4byte	0x61f5
+	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x62c8
 	.uleb128 0x30
-	.4byte	0x617e
+	.4byte	0x6251
 	.uleb128 0x30
-	.4byte	0x6185
+	.4byte	0x6258
 	.uleb128 0x64
-	.4byte	0x618a
-	.4byte	.LLST146
+	.4byte	0x625d
+	.4byte	.LLST147
 	.uleb128 0x65
-	.4byte	0x618f
+	.4byte	0x6262
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x53
-	.4byte	.LBB376
-	.4byte	.LBE376-.LBB376
-	.4byte	0x61eb
+	.4byte	.LBB400
+	.4byte	.LBE400-.LBB400
+	.4byte	0x62be
 	.uleb128 0x65
 	.4byte	0x1d9e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x31
-	.4byte	.LVL642
+	.4byte	.LVL659
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL643
-	.4byte	0x4561
+	.4byte	.LVL660
+	.4byte	0x451a
 	.uleb128 0x31
-	.4byte	.LVL644
+	.4byte	.LVL661
 	.4byte	0x1e6d
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL641
-	.4byte	0x3929
+	.4byte	.LVL658
+	.4byte	0x3939
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LBB379
-	.4byte	.LBE379-.LBB379
+	.4byte	.LBB403
+	.4byte	.LBE403-.LBB403
 	.uleb128 0x64
 	.4byte	0x1dac
-	.4byte	.LLST147
+	.4byte	.LLST148
 	.byte	0
 	.byte	0
 	.uleb128 0x60
@@ -33840,10 +34069,10 @@ check_vpc_table:
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6294
+	.4byte	0x6367
 	.uleb128 0x61
 	.4byte	0x1dcb
-	.4byte	.LLST188
+	.4byte	.LLST189
 	.uleb128 0x30
 	.4byte	0x1dd7
 	.uleb128 0x30
@@ -33853,39 +34082,39 @@ check_vpc_table:
 	.uleb128 0x30
 	.4byte	0x1df7
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1a0
+	.4byte	.Ldebug_ranges0+0x200
 	.uleb128 0x2e
 	.4byte	0x1dcb
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1a0
+	.4byte	.Ldebug_ranges0+0x200
 	.uleb128 0x30
-	.4byte	0x6225
+	.4byte	0x62f8
 	.uleb128 0x65
-	.4byte	0x622a
+	.4byte	0x62fd
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x64
-	.4byte	0x622f
-	.4byte	.LLST189
+	.4byte	0x6302
+	.4byte	.LLST190
 	.uleb128 0x65
-	.4byte	0x6234
+	.4byte	0x6307
 	.uleb128 0x1
 	.byte	0x59
 	.uleb128 0x31
-	.4byte	.LVL867
+	.4byte	.LVL884
 	.4byte	0x1e04
 	.uleb128 0x31
-	.4byte	.LVL869
-	.4byte	0x45c9
+	.4byte	.LVL886
+	.4byte	0x4582
 	.uleb128 0x31
-	.4byte	.LVL870
-	.4byte	0x671f
+	.4byte	.LVL887
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL871
-	.4byte	0x4b59
+	.4byte	.LVL888
+	.4byte	0x4b12
 	.uleb128 0x31
-	.4byte	.LVL872
-	.4byte	0x499b
+	.4byte	.LVL889
+	.4byte	0x4954
 	.byte	0
 	.byte	0
 	.byte	0
@@ -33895,115 +34124,115 @@ check_vpc_table:
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x630e
+	.4byte	0x63e1
 	.uleb128 0x61
 	.4byte	0x23b5
-	.4byte	.LLST190
+	.4byte	.LLST191
 	.uleb128 0x30
 	.4byte	0x23c1
 	.uleb128 0x53
-	.4byte	.LBB440
-	.4byte	.LBE440-.LBB440
-	.4byte	0x6304
+	.4byte	.LBB464
+	.4byte	.LBE464-.LBB464
+	.4byte	0x63d7
 	.uleb128 0x2e
 	.4byte	0x23b5
 	.uleb128 0x33
-	.4byte	.LBB441
-	.4byte	.LBE441-.LBB441
+	.4byte	.LBB465
+	.4byte	.LBE465-.LBB465
 	.uleb128 0x30
-	.4byte	0x62b0
+	.4byte	0x6383
 	.uleb128 0x31
-	.4byte	.LVL877
-	.4byte	0x4087
+	.4byte	.LVL894
+	.4byte	0x4097
 	.uleb128 0x31
-	.4byte	.LVL878
-	.4byte	0x671f
+	.4byte	.LVL895
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL879
+	.4byte	.LVL896
 	.4byte	0x2674
 	.uleb128 0x31
-	.4byte	.LVL880
+	.4byte	.LVL897
 	.4byte	0x1dba
 	.uleb128 0x31
-	.4byte	.LVL881
-	.4byte	0x671f
+	.4byte	.LVL898
+	.4byte	0x67f2
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL884
-	.4byte	0x3f27
+	.4byte	.LVL901
+	.4byte	0x3f37
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x364f
+	.4byte	0x365f
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6386
+	.4byte	0x6459
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1b8
+	.4byte	.Ldebug_ranges0+0x218
 	.uleb128 0x64
-	.4byte	0x365d
-	.4byte	.LLST192
-	.uleb128 0x64
-	.4byte	0x3669
+	.4byte	0x366d
 	.4byte	.LLST193
 	.uleb128 0x64
-	.4byte	0x3675
+	.4byte	0x3679
 	.4byte	.LLST194
+	.uleb128 0x64
+	.4byte	0x3685
+	.4byte	.LLST195
 	.uleb128 0x65
-	.4byte	0x3681
+	.4byte	0x3691
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x30
-	.4byte	0x368d
+	.4byte	0x369d
 	.uleb128 0x31
-	.4byte	.LVL892
-	.4byte	0x3929
+	.4byte	.LVL909
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL893
+	.4byte	.LVL910
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL896
+	.4byte	.LVL913
 	.4byte	0x17c6
 	.uleb128 0x31
-	.4byte	.LVL898
+	.4byte	.LVL915
 	.4byte	0x23e4
 	.uleb128 0x31
-	.4byte	.LVL899
+	.4byte	.LVL916
 	.4byte	0x19ea
 	.uleb128 0x31
-	.4byte	.LVL900
+	.4byte	.LVL917
 	.4byte	0x232e
 	.byte	0
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x2b73
+	.4byte	0x2b83
 	.4byte	.LFB236
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63a3
+	.4byte	0x6476
 	.uleb128 0x24
-	.4byte	.LVL1107
-	.4byte	0x3850
+	.4byte	.LVL1125
+	.4byte	0x3860
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x342f
+	.4byte	0x343f
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63d2
+	.4byte	0x64a5
 	.uleb128 0x31
-	.4byte	.LVL1135
-	.4byte	0x377a
+	.4byte	.LVL1153
+	.4byte	0x378a
 	.uleb128 0x31
-	.4byte	.LVL1136
-	.4byte	0x671f
+	.4byte	.LVL1154
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1137
+	.4byte	.LVL1155
 	.4byte	0x17c6
 	.byte	0
 	.uleb128 0x60
@@ -34012,15 +34241,15 @@ check_vpc_table:
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6401
+	.4byte	0x64d4
 	.uleb128 0x31
-	.4byte	.LVL1262
+	.4byte	.LVL1280
 	.4byte	0x1f78
 	.uleb128 0x31
-	.4byte	.LVL1263
-	.4byte	0x369b
+	.4byte	.LVL1281
+	.4byte	0x36ab
 	.uleb128 0x31
-	.4byte	.LVL1264
+	.4byte	.LVL1282
 	.4byte	0x20c4
 	.byte	0
 	.uleb128 0x60
@@ -34029,13 +34258,13 @@ check_vpc_table:
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65f2
+	.4byte	0x66c5
 	.uleb128 0x61
 	.4byte	0x1c83
-	.4byte	.LLST255
+	.4byte	.LLST256
 	.uleb128 0x61
 	.4byte	0x1c8f
-	.4byte	.LLST256
+	.4byte	.LLST257
 	.uleb128 0x30
 	.4byte	0x1c9b
 	.uleb128 0x30
@@ -34059,283 +34288,283 @@ check_vpc_table:
 	.uleb128 0x30
 	.4byte	0x1d23
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x208
-	.4byte	0x65e8
+	.4byte	.Ldebug_ranges0+0x268
+	.4byte	0x66bb
 	.uleb128 0x2e
 	.4byte	0x1c8f
 	.uleb128 0x2e
 	.4byte	0x1c83
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x208
-	.uleb128 0x64
-	.4byte	0x6426
-	.4byte	.LLST257
+	.4byte	.Ldebug_ranges0+0x268
 	.uleb128 0x64
-	.4byte	0x642b
+	.4byte	0x64f9
 	.4byte	.LLST258
 	.uleb128 0x64
-	.4byte	0x6430
+	.4byte	0x64fe
 	.4byte	.LLST259
+	.uleb128 0x64
+	.4byte	0x6503
+	.4byte	.LLST260
 	.uleb128 0x30
-	.4byte	0x6435
+	.4byte	0x6508
 	.uleb128 0x30
-	.4byte	0x643a
+	.4byte	0x650d
 	.uleb128 0x30
-	.4byte	0x643f
-	.uleb128 0x64
-	.4byte	0x6444
-	.4byte	.LLST260
+	.4byte	0x6512
 	.uleb128 0x64
-	.4byte	0x6449
+	.4byte	0x6517
 	.4byte	.LLST261
 	.uleb128 0x64
-	.4byte	0x644e
+	.4byte	0x651c
 	.4byte	.LLST262
 	.uleb128 0x64
-	.4byte	0x6453
+	.4byte	0x6521
 	.4byte	.LLST263
-	.uleb128 0x66
+	.uleb128 0x64
+	.4byte	0x6526
+	.4byte	.LLST264
+	.uleb128 0x67
 	.4byte	0x1d13
-	.uleb128 0x66
+	.uleb128 0x67
 	.4byte	0x1d1b
 	.uleb128 0x30
-	.4byte	0x6458
+	.4byte	0x652b
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x230
-	.4byte	0x650e
+	.4byte	.Ldebug_ranges0+0x290
+	.4byte	0x65e1
 	.uleb128 0x30
 	.4byte	0x1d31
 	.uleb128 0x31
-	.4byte	.LVL1289
+	.4byte	.LVL1307
 	.4byte	0x2692
 	.uleb128 0x31
-	.4byte	.LVL1290
-	.4byte	0x3fa6
+	.4byte	.LVL1308
+	.4byte	0x3fb6
 	.uleb128 0x31
-	.4byte	.LVL1291
-	.4byte	0x3fa6
+	.4byte	.LVL1309
+	.4byte	0x3fb6
 	.uleb128 0x31
-	.4byte	.LVL1292
-	.4byte	0x671f
+	.4byte	.LVL1310
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1294
+	.4byte	.LVL1312
 	.4byte	0x1e04
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1306
+	.4byte	.LVL1324
 	.4byte	0x2255
 	.uleb128 0x31
-	.4byte	.LVL1307
-	.4byte	0x2c45
+	.4byte	.LVL1325
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1312
-	.4byte	0x3fa6
+	.4byte	.LVL1330
+	.4byte	0x3fb6
 	.uleb128 0x31
-	.4byte	.LVL1315
+	.4byte	.LVL1333
 	.4byte	0x1d5a
 	.uleb128 0x31
-	.4byte	.LVL1316
-	.4byte	0x3fa6
+	.4byte	.LVL1334
+	.4byte	0x3fb6
 	.uleb128 0x31
-	.4byte	.LVL1317
+	.4byte	.LVL1335
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1321
+	.4byte	.LVL1339
 	.4byte	0x2255
 	.uleb128 0x31
-	.4byte	.LVL1322
+	.4byte	.LVL1340
 	.4byte	0x232e
 	.uleb128 0x31
-	.4byte	.LVL1323
-	.4byte	0x671f
+	.4byte	.LVL1341
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1324
-	.4byte	0x671f
+	.4byte	.LVL1342
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1325
-	.4byte	0x671f
+	.4byte	.LVL1343
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1326
-	.4byte	0x2c45
+	.4byte	.LVL1344
+	.4byte	0x2c55
 	.uleb128 0x31
-	.4byte	.LVL1328
+	.4byte	.LVL1346
 	.4byte	0x1d5a
 	.uleb128 0x31
-	.4byte	.LVL1343
+	.4byte	.LVL1361
 	.4byte	0x1af8
 	.uleb128 0x31
-	.4byte	.LVL1345
-	.4byte	0x671f
+	.4byte	.LVL1363
+	.4byte	0x67f2
 	.uleb128 0x31
-	.4byte	.LVL1347
-	.4byte	0x3929
+	.4byte	.LVL1365
+	.4byte	0x3939
 	.uleb128 0x31
-	.4byte	.LVL1348
+	.4byte	.LVL1366
 	.4byte	0x1f15
 	.uleb128 0x31
-	.4byte	.LVL1351
+	.4byte	.LVL1369
 	.4byte	0x2287
 	.uleb128 0x31
-	.4byte	.LVL1352
+	.4byte	.LVL1370
 	.4byte	0x1ea1
 	.uleb128 0x31
-	.4byte	.LVL1359
+	.4byte	.LVL1377
 	.4byte	0x1ea1
 	.uleb128 0x31
-	.4byte	.LVL1360
+	.4byte	.LVL1378
 	.4byte	0x23a4
 	.uleb128 0x31
-	.4byte	.LVL1361
-	.4byte	0x4f66
+	.4byte	.LVL1379
+	.4byte	0x4f1f
 	.uleb128 0x31
-	.4byte	.LVL1362
-	.4byte	0x39f4
+	.4byte	.LVL1380
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1363
-	.4byte	0x3588
+	.4byte	.LVL1381
+	.4byte	0x3598
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1293
+	.4byte	.LVL1311
 	.4byte	0x20c4
 	.byte	0
 	.uleb128 0x60
-	.4byte	0x2805
+	.4byte	0x2815
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6700
+	.4byte	0x67d3
 	.uleb128 0x30
-	.4byte	0x2816
+	.4byte	0x2826
 	.uleb128 0x53
-	.4byte	.LBB523
-	.4byte	.LBE523-.LBB523
-	.4byte	0x669c
+	.4byte	.LBB547
+	.4byte	.LBE547-.LBB547
+	.4byte	0x676f
 	.uleb128 0x64
-	.4byte	0x6605
-	.4byte	.LLST297
+	.4byte	0x66d8
+	.4byte	.LLST298
 	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x268
-	.4byte	0x662f
+	.4byte	.Ldebug_ranges0+0x2c8
+	.4byte	0x6702
 	.uleb128 0x30
-	.4byte	0x2821
+	.4byte	0x2831
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1577
-	.4byte	0x2a84
+	.4byte	.LVL1595
+	.4byte	0x2a94
 	.uleb128 0x31
-	.4byte	.LVL1578
-	.4byte	0x2a84
+	.4byte	.LVL1596
+	.4byte	0x2a94
 	.uleb128 0x31
-	.4byte	.LVL1579
-	.4byte	0x369b
+	.4byte	.LVL1597
+	.4byte	0x36ab
 	.uleb128 0x31
-	.4byte	.LVL1580
-	.4byte	0x369b
+	.4byte	.LVL1598
+	.4byte	0x36ab
 	.uleb128 0x31
-	.4byte	.LVL1581
-	.4byte	0x39f4
+	.4byte	.LVL1599
+	.4byte	0x3a04
 	.uleb128 0x31
-	.4byte	.LVL1582
-	.4byte	0x3588
+	.4byte	.LVL1600
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1583
-	.4byte	0x3588
+	.4byte	.LVL1601
+	.4byte	0x3598
 	.uleb128 0x31
-	.4byte	.LVL1586
+	.4byte	.LVL1604
 	.4byte	0x1e6d
 	.uleb128 0x31
-	.4byte	.LVL1587
+	.4byte	.LVL1605
 	.4byte	0x1e6d
 	.uleb128 0x31
-	.4byte	.LVL1588
+	.4byte	.LVL1606
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1589
+	.4byte	.LVL1607
 	.4byte	0x2460
 	.uleb128 0x31
-	.4byte	.LVL1590
-	.4byte	0x29c8
+	.4byte	.LVL1608
+	.4byte	0x29d8
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL1565
-	.4byte	0x4407
+	.4byte	.LVL1583
+	.4byte	0x43c0
 	.uleb128 0x31
-	.4byte	.LVL1566
-	.4byte	0x343c
+	.4byte	.LVL1584
+	.4byte	0x344c
 	.uleb128 0x31
-	.4byte	.LVL1567
-	.4byte	0x332f
+	.4byte	.LVL1585
+	.4byte	0x333f
 	.uleb128 0x31
-	.4byte	.LVL1568
-	.4byte	0x318f
+	.4byte	.LVL1586
+	.4byte	0x319f
 	.uleb128 0x31
-	.4byte	.LVL1569
-	.4byte	0x31f1
+	.4byte	.LVL1587
+	.4byte	0x3201
 	.uleb128 0x31
-	.4byte	.LVL1570
-	.4byte	0x2af9
+	.4byte	.LVL1588
+	.4byte	0x2b09
 	.uleb128 0x31
-	.4byte	.LVL1571
-	.4byte	0x342f
+	.4byte	.LVL1589
+	.4byte	0x343f
 	.uleb128 0x31
-	.4byte	.LVL1572
-	.4byte	0x42fc
+	.4byte	.LVL1590
+	.4byte	0x4329
 	.uleb128 0x31
-	.4byte	.LVL1573
-	.4byte	0x2b7c
+	.4byte	.LVL1591
+	.4byte	0x2b8c
 	.uleb128 0x31
-	.4byte	.LVL1574
-	.4byte	0x2cb0
+	.4byte	.LVL1592
+	.4byte	0x2cc0
 	.uleb128 0x31
-	.4byte	.LVL1575
-	.4byte	0x3709
+	.4byte	.LVL1593
+	.4byte	0x3719
 	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF657
-	.4byte	.LASF657
+	.uleb128 0x68
+	.4byte	.LASF656
+	.4byte	.LASF656
 	.byte	0x11
 	.byte	0x6f
+	.uleb128 0x69
+	.4byte	.LASF669
+	.4byte	.LASF669
 	.uleb128 0x68
-	.4byte	.LASF670
-	.4byte	.LASF670
-	.uleb128 0x67
-	.4byte	.LASF658
-	.4byte	.LASF658
+	.4byte	.LASF657
+	.4byte	.LASF657
 	.byte	0x12
 	.byte	0x19
-	.uleb128 0x67
-	.4byte	.LASF659
-	.4byte	.LASF659
+	.uleb128 0x68
+	.4byte	.LASF658
+	.4byte	.LASF658
 	.byte	0xb
 	.byte	0x8e
-	.uleb128 0x67
-	.4byte	.LASF660
-	.4byte	.LASF660
+	.uleb128 0x68
+	.4byte	.LASF659
+	.4byte	.LASF659
 	.byte	0x12
 	.byte	0x1b
-	.uleb128 0x67
-	.4byte	.LASF661
-	.4byte	.LASF661
+	.uleb128 0x68
+	.4byte	.LASF660
+	.4byte	.LASF660
 	.byte	0x13
 	.byte	0x27
-	.uleb128 0x67
-	.4byte	.LASF662
-	.4byte	.LASF662
+	.uleb128 0x68
+	.4byte	.LASF661
+	.4byte	.LASF661
 	.byte	0xd
 	.byte	0x18
-	.uleb128 0x69
-	.4byte	.LASF663
-	.4byte	.LASF663
+	.uleb128 0x6a
+	.4byte	.LASF662
+	.4byte	.LASF662
 	.byte	0xc
 	.2byte	0x19b
-	.uleb128 0x6a
+	.uleb128 0x6b
+	.4byte	.LASF670
 	.4byte	.LASF671
-	.4byte	.LASF672
 	.byte	0x14
 	.byte	0
-	.4byte	.LASF671
+	.4byte	.LASF670
 	.byte	0
 	.section	.debug_abbrev,"",%progbits
 .Ldebug_abbrev0:
@@ -35582,18 +35811,16 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x59
-	.uleb128 0x1d
+	.uleb128 0xa
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x58
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
 	.byte	0
 	.uleb128 0x5a
@@ -35767,13 +35994,28 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x66
-	.uleb128 0xa
+	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0x67
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x68
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35790,7 +36032,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35803,7 +36045,7 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35820,7 +36062,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35842,218 +36084,218 @@ check_vpc_table:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST300:
-	.4byte	.LVL1630-.Ltext0
-	.4byte	.LVL1631-1-.Ltext0
+.LLST301:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST301:
-	.4byte	.LVL1630-.Ltext0
-	.4byte	.LVL1631-1-.Ltext0
+.LLST302:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST302:
-	.4byte	.LVL1630-.Ltext0
-	.4byte	.LVL1631-1-.Ltext0
+.LLST303:
+	.4byte	.LVL1648-.Ltext0
+	.4byte	.LVL1649-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST176:
-	.4byte	.LVL812-.Ltext0
-	.4byte	.LVL813-1-.Ltext0
+.LLST177:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST177:
-	.4byte	.LVL812-.Ltext0
-	.4byte	.LVL813-1-.Ltext0
+.LLST178:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST178:
-	.4byte	.LVL812-.Ltext0
-	.4byte	.LVL813-1-.Ltext0
+.LLST179:
+	.4byte	.LVL829-.Ltext0
+	.4byte	.LVL830-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST108:
-	.4byte	.LVL466-.Ltext0
-	.4byte	.LVL468-1-.Ltext0
+.LLST109:
+	.4byte	.LVL483-.Ltext0
+	.4byte	.LVL485-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL468-1-.Ltext0
+	.4byte	.LVL485-1-.Ltext0
 	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST109:
-	.4byte	.LVL466-.Ltext0
-	.4byte	.LVL467-.Ltext0
+.LLST110:
+	.4byte	.LVL483-.Ltext0
+	.4byte	.LVL484-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL467-.Ltext0
+	.4byte	.LVL484-.Ltext0
 	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST110:
-	.4byte	.LVL470-.Ltext0
-	.4byte	.LVL471-.Ltext0
+.LLST111:
+	.4byte	.LVL487-.Ltext0
+	.4byte	.LVL488-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL473-.Ltext0
-	.4byte	.LVL475-.Ltext0
+	.4byte	.LVL490-.Ltext0
+	.4byte	.LVL492-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL476-.Ltext0
+	.4byte	.LVL493-.Ltext0
 	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST95:
-	.4byte	.LVL399-.Ltext0
-	.4byte	.LVL400-.Ltext0
+.LLST94:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL401-.Ltext0
-	.4byte	.LVL404-.Ltext0
+	.4byte	.LVL407-.Ltext0
+	.4byte	.LVL410-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL405-.Ltext0
-	.4byte	.LVL406-.Ltext0
+	.4byte	.LVL411-.Ltext0
+	.4byte	.LVL412-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST96:
-	.4byte	.LVL399-.Ltext0
-	.4byte	.LVL400-.Ltext0
+.LLST95:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST97:
-	.4byte	.LVL399-.Ltext0
-	.4byte	.LVL400-.Ltext0
+.LLST96:
+	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL400-.Ltext0
-	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL406-.Ltext0
+	.4byte	.LVL411-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL405-.Ltext0
+	.4byte	.LVL411-.Ltext0
 	.4byte	.LFE274-.Ltext0
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST90:
-	.4byte	.LVL378-.Ltext0
-	.4byte	.LVL380-.Ltext0
+.LLST89:
+	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL386-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST91:
-	.4byte	.LVL378-.Ltext0
+.LLST90:
 	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL390-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL384-.Ltext0
-	.4byte	.LVL392-.Ltext0
+	.4byte	.LVL390-.Ltext0
+	.4byte	.LVL398-.Ltext0
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL396-.Ltext0
+	.4byte	.LVL402-.Ltext0
 	.4byte	.LFE273-.Ltext0
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST92:
-	.4byte	.LVL378-.Ltext0
+.LLST91:
 	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL390-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL390-.Ltext0
 	.4byte	.LFE273-.Ltext0
 	.2byte	0x1
 	.byte	0x59
 	.4byte	0
 	.4byte	0
-.LLST93:
-	.4byte	.LVL378-.Ltext0
-	.4byte	.LVL379-.Ltext0
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL383-.Ltext0
+.LLST92:
 	.4byte	.LVL384-.Ltext0
+	.4byte	.LVL385-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL389-.Ltext0
 	.4byte	.LVL390-.Ltext0
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL395-.Ltext0
 	.4byte	.LVL396-.Ltext0
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL402-.Ltext0
 	.4byte	.LFE273-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST94:
-	.4byte	.LVL381-.Ltext0
-	.4byte	.LVL389-.Ltext0
+.LLST93:
+	.4byte	.LVL387-.Ltext0
+	.4byte	.LVL395-.Ltext0
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL397-.Ltext0
-	.4byte	.LVL398-.Ltext0
+	.4byte	.LVL403-.Ltext0
+	.4byte	.LVL404-.Ltext0
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST83:
-	.4byte	.LVL347-.Ltext0
-	.4byte	.LVL351-.Ltext0
+.LLST82:
+	.4byte	.LVL353-.Ltext0
+	.4byte	.LVL357-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL352-.Ltext0
-	.4byte	.LVL354-.Ltext0
+	.4byte	.LVL358-.Ltext0
+	.4byte	.LVL360-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL355-.Ltext0
-	.4byte	.LVL357-.Ltext0
+	.4byte	.LVL361-.Ltext0
+	.4byte	.LVL363-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST84:
-	.4byte	.LVL347-.Ltext0
-	.4byte	.LVL352-.Ltext0
+.LLST83:
+	.4byte	.LVL353-.Ltext0
+	.4byte	.LVL358-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL352-.Ltext0
+	.4byte	.LVL358-.Ltext0
 	.4byte	.LFE272-.Ltext0
 	.2byte	0x1
 	.byte	0x59
 	.4byte	0
 	.4byte	0
-.LLST85:
-	.4byte	.LVL347-.Ltext0
+.LLST84:
 	.4byte	.LVL353-.Ltext0
+	.4byte	.LVL359-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL355-.Ltext0
-	.4byte	.LVL356-.Ltext0
+	.4byte	.LVL361-.Ltext0
+	.4byte	.LVL362-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
@@ -36126,463 +36368,486 @@ check_vpc_table:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST82:
-	.4byte	.LVL340-.Ltext0
-	.4byte	.LVL341-1-.Ltext0
+.LLST81:
+	.4byte	.LVL346-.Ltext0
+	.4byte	.LVL347-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL341-1-.Ltext0
-	.4byte	.LVL344-.Ltext0
+	.4byte	.LVL347-1-.Ltext0
+	.4byte	.LVL350-.Ltext0
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST81:
-	.4byte	.LVL336-.Ltext0
-	.4byte	.LVL337-.Ltext0
+.LLST80:
+	.4byte	.LVL342-.Ltext0
+	.4byte	.LVL343-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL337-.Ltext0
+	.4byte	.LVL343-.Ltext0
 	.4byte	.LFE264-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST254:
-	.4byte	.LVL1277-.Ltext0
-	.4byte	.LVL1278-1-.Ltext0
+.LLST255:
+	.4byte	.LVL1295-.Ltext0
+	.4byte	.LVL1296-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST167:
-	.4byte	.LVL770-.Ltext0
-	.4byte	.LVL774-.Ltext0
+.LLST168:
+	.4byte	.LVL787-.Ltext0
+	.4byte	.LVL791-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL774-.Ltext0
-	.4byte	.LVL811-.Ltext0
+	.4byte	.LVL791-.Ltext0
+	.4byte	.LVL828-.Ltext0
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST168:
-	.4byte	.LVL770-.Ltext0
-	.4byte	.LVL772-.Ltext0
+.LLST169:
+	.4byte	.LVL787-.Ltext0
+	.4byte	.LVL789-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL772-.Ltext0
-	.4byte	.LVL773-1-.Ltext0
+	.4byte	.LVL789-.Ltext0
+	.4byte	.LVL790-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL774-.Ltext0
-	.4byte	.LVL775-.Ltext0
+	.4byte	.LVL791-.Ltext0
+	.4byte	.LVL792-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL775-.Ltext0
-	.4byte	.LVL778-.Ltext0
+	.4byte	.LVL792-.Ltext0
+	.4byte	.LVL795-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL782-.Ltext0
-	.4byte	.LVL785-.Ltext0
+	.4byte	.LVL799-.Ltext0
+	.4byte	.LVL802-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL799-.Ltext0
-	.4byte	.LVL800-.Ltext0
+	.4byte	.LVL816-.Ltext0
+	.4byte	.LVL817-.Ltext0
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL809-.Ltext0
-	.4byte	.LVL810-.Ltext0
+	.4byte	.LVL826-.Ltext0
+	.4byte	.LVL827-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST169:
-	.4byte	.LVL779-.Ltext0
-	.4byte	.LVL780-.Ltext0
+.LLST170:
+	.4byte	.LVL796-.Ltext0
+	.4byte	.LVL797-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL788-.Ltext0
-	.4byte	.LVL789-.Ltext0
+	.4byte	.LVL805-.Ltext0
+	.4byte	.LVL806-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL792-.Ltext0
-	.4byte	.LVL793-.Ltext0
+	.4byte	.LVL809-.Ltext0
+	.4byte	.LVL810-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL777-.Ltext0
-	.4byte	.LVL790-.Ltext0
+.LLST171:
+	.4byte	.LVL794-.Ltext0
+	.4byte	.LVL807-.Ltext0
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL791-.Ltext0
-	.4byte	.LVL811-.Ltext0
+	.4byte	.LVL808-.Ltext0
+	.4byte	.LVL828-.Ltext0
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL786-.Ltext0
-	.4byte	.LVL787-.Ltext0
+.LLST172:
+	.4byte	.LVL803-.Ltext0
+	.4byte	.LVL804-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL799-.Ltext0
-	.4byte	.LVL802-.Ltext0
+	.4byte	.LVL816-.Ltext0
+	.4byte	.LVL819-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL771-.Ltext0
-	.4byte	.LVL783-.Ltext0
+.LLST173:
+	.4byte	.LVL788-.Ltext0
+	.4byte	.LVL800-.Ltext0
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL784-.Ltext0
-	.4byte	.LVL806-.Ltext0
+	.4byte	.LVL801-.Ltext0
+	.4byte	.LVL823-.Ltext0
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL809-.Ltext0
-	.4byte	.LVL811-.Ltext0
+	.4byte	.LVL826-.Ltext0
+	.4byte	.LVL828-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST173:
-	.4byte	.LVL794-.Ltext0
-	.4byte	.LVL795-1-.Ltext0
+.LLST174:
+	.4byte	.LVL811-.Ltext0
+	.4byte	.LVL812-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL796-.Ltext0
-	.4byte	.LVL801-.Ltext0
+	.4byte	.LVL813-.Ltext0
+	.4byte	.LVL818-.Ltext0
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL804-.Ltext0
-	.4byte	.LVL805-1-.Ltext0
+	.4byte	.LVL821-.Ltext0
+	.4byte	.LVL822-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST174:
-	.4byte	.LVL776-.Ltext0
-	.4byte	.LVL811-.Ltext0
+.LLST175:
+	.4byte	.LVL793-.Ltext0
+	.4byte	.LVL828-.Ltext0
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST175:
-	.4byte	.LVL797-.Ltext0
-	.4byte	.LVL798-.Ltext0
+.LLST176:
+	.4byte	.LVL814-.Ltext0
+	.4byte	.LVL815-.Ltext0
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL804-.Ltext0
-	.4byte	.LVL805-1-.Ltext0
+	.4byte	.LVL821-.Ltext0
+	.4byte	.LVL822-1-.Ltext0
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
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-	.4byte	.LBE525-.Ltext0
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB541-.Ltext0
+	.4byte	.LBE541-.Ltext0
+	.4byte	.LBB542-.Ltext0
+	.4byte	.LBE542-.Ltext0
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB548-.Ltext0
+	.4byte	.LBE548-.Ltext0
+	.4byte	.LBB549-.Ltext0
+	.4byte	.LBE549-.Ltext0
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -40240,11 +40549,11 @@ check_vpc_table:
 	.ascii	"c_ftl_nand_planes_num\000"
 .LASF1:
 	.ascii	"sizetype\000"
-.LASF593:
+.LASF592:
 	.ascii	"re_try_next_blk\000"
 .LASF23:
 	.ascii	"saved_command_line\000"
-.LASF588:
+.LASF587:
 	.ascii	"P2V_block_in_plane\000"
 .LASF343:
 	.ascii	"ftl_memcmp\000"
@@ -40254,7 +40563,7 @@ check_vpc_table:
 	.ascii	"g_totle_vendor_block\000"
 .LASF96:
 	.ascii	"BlkNum\000"
-.LASF598:
+.LASF597:
 	.ascii	"totle_count\000"
 .LASF488:
 	.ascii	"lastWritePage\000"
@@ -40332,7 +40641,7 @@ check_vpc_table:
 	.ascii	"tmp_erase_count\000"
 .LASF424:
 	.ascii	"allocate_new_data_superblock\000"
-.LASF664:
+.LASF663:
 	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mabi=aapcs-"
 	.ascii	"linux -mno-thumb-interwork -mfpu=vfp -mthumb -march"
 	.ascii	"=armv7-a -mfloat-abi=soft -mtune=cortex-a9 -mtls-di"
@@ -40349,9 +40658,9 @@ check_vpc_table:
 	.ascii	"boot_command_line\000"
 .LASF533:
 	.ascii	"update_map_block\000"
-.LASF607:
+.LASF606:
 	.ascii	"FtlBbmMapBadBlock\000"
-.LASF605:
+.LASF604:
 	.ascii	"FtlBbtInfoPrint\000"
 .LASF55:
 	.ascii	"hex_asc_upper\000"
@@ -40361,15 +40670,15 @@ check_vpc_table:
 	.ascii	"re_save_vpndata\000"
 .LASF535:
 	.ascii	"region_num\000"
-.LASF602:
+.LASF601:
 	.ascii	"re_save_bbmdata\000"
-.LASF622:
+.LASF621:
 	.ascii	"first_lpa_sctidx\000"
 .LASF20:
 	.ascii	"__security_initcall_start\000"
 .LASF307:
 	.ascii	"g_totle_slc_erase_count\000"
-.LASF596:
+.LASF595:
 	.ascii	"FtlLoadBbt\000"
 .LASF175:
 	.ascii	"check_en\000"
@@ -40381,7 +40690,7 @@ check_vpc_table:
 	.ascii	"totle_num\000"
 .LASF324:
 	.ascii	"g_nand_ops\000"
-.LASF587:
+.LASF586:
 	.ascii	"ver2\000"
 .LASF214:
 	.ascii	"c_ftl_nand_max_data_blks\000"
@@ -40393,7 +40702,7 @@ check_vpc_table:
 	.ascii	"ftl_data_blk_header\000"
 .LASF230:
 	.ascii	"req_erase\000"
-.LASF614:
+.LASF613:
 	.ascii	"num_lpa\000"
 .LASF199:
 	.ascii	"c_ftl_nand_byte_pre_oob\000"
@@ -40427,13 +40736,13 @@ check_vpc_table:
 	.ascii	"g_buffer_superblock\000"
 .LASF10:
 	.ascii	"long int\000"
-.LASF635:
+.LASF634:
 	.ascii	"create_first_buffer_superblock\000"
 .LASF63:
 	.ascii	"p_data\000"
 .LASF245:
 	.ascii	"c_gc_page_buf_num\000"
-.LASF654:
+.LASF653:
 	.ascii	"limit\000"
 .LASF514:
 	.ascii	"Index\000"
@@ -40441,7 +40750,7 @@ check_vpc_table:
 	.ascii	"gSysFreeQueue\000"
 .LASF144:
 	.ascii	"l2p_write_count\000"
-.LASF621:
+.LASF620:
 	.ascii	"absolute_sector\000"
 .LASF556:
 	.ascii	"pHead\000"
@@ -40453,7 +40762,7 @@ check_vpc_table:
 	.ascii	"FtlUpdateVaildLpnCount\000"
 .LASF351:
 	.ascii	"FlashTestBlk\000"
-.LASF672:
+.LASF671:
 	.ascii	"__builtin_strcpy\000"
 .LASF290:
 	.ascii	"g_gc_bad_block_gc_index\000"
@@ -40461,9 +40770,9 @@ check_vpc_table:
 	.ascii	"p_free_data_block_list_head\000"
 .LASF100:
 	.ascii	"pBlkVpcTbl\000"
-.LASF582:
+.LASF581:
 	.ascii	"high\000"
-.LASF637:
+.LASF636:
 	.ascii	"is_sys_blk\000"
 .LASF263:
 	.ascii	"p_vendor_region_ppn_table\000"
@@ -40515,11 +40824,11 @@ check_vpc_table:
 	.ascii	"g_gc_head_data_block\000"
 .LASF53:
 	.ascii	"system_state\000"
-.LASF620:
+.LASF619:
 	.ascii	"FtlRead\000"
 .LASF272:
 	.ascii	"g_num_free_superblocks\000"
-.LASF592:
+.LASF591:
 	.ascii	"pBbtHeader\000"
 .LASF5:
 	.ascii	"unsigned char\000"
@@ -40537,7 +40846,7 @@ check_vpc_table:
 	.ascii	"SYSTEM_BOOTING\000"
 .LASF119:
 	.ascii	"regionId\000"
-.LASF612:
+.LASF611:
 	.ascii	"start_lpa\000"
 .LASF310:
 	.ascii	"g_in_gc_progress\000"
@@ -40581,9 +40890,9 @@ check_vpc_table:
 	.ascii	"BbtMap\000"
 .LASF2:
 	.ascii	"char\000"
-.LASF649:
+.LASF648:
 	.ascii	"FtlSysBlkNumInit\000"
-.LASF658:
+.LASF657:
 	.ascii	"memset\000"
 .LASF328:
 	.ascii	"TotleReadBufferCount1\000"
@@ -40591,7 +40900,7 @@ check_vpc_table:
 	.ascii	"totle_read_sector\000"
 .LASF330:
 	.ascii	"TotleReadBufferCount3\000"
-.LASF627:
+.LASF626:
 	.ascii	"FtlSysFlush\000"
 .LASF257:
 	.ascii	"p_map_block_ver_table\000"
@@ -40603,7 +40912,7 @@ check_vpc_table:
 	.ascii	"FtlGcUpdatePage\000"
 .LASF436:
 	.ascii	"maxFreeBlockEraseCount\000"
-.LASF642:
+.LASF641:
 	.ascii	"re_test_next_page\000"
 .LASF42:
 	.ascii	"panic_on_io_nmi\000"
@@ -40619,7 +40928,7 @@ check_vpc_table:
 	.ascii	"TotleReadBufferCount2\000"
 .LASF377:
 	.ascii	"num_io\000"
-.LASF584:
+.LASF583:
 	.ascii	"pagePreBlk\000"
 .LASF129:
 	.ascii	"activePageOffset\000"
@@ -40629,7 +40938,7 @@ check_vpc_table:
 	.ascii	"FtlLoadMapInfo\000"
 .LASF366:
 	.ascii	"block_index\000"
-.LASF651:
+.LASF650:
 	.ascii	"FtlPrintInfo\000"
 .LASF480:
 	.ascii	"FtlReUsePrevPpa\000"
@@ -40637,7 +40946,7 @@ check_vpc_table:
 	.ascii	"p_swl_mul_table\000"
 .LASF564:
 	.ascii	"insert_data_list\000"
-.LASF645:
+.LASF644:
 	.ascii	"FtlVariablesInit\000"
 .LASF268:
 	.ascii	"p_data_block_list_table\000"
@@ -40647,7 +40956,7 @@ check_vpc_table:
 	.ascii	"pNode\000"
 .LASF304:
 	.ascii	"g_totle_mlc_erase_count\000"
-.LASF585:
+.LASF584:
 	.ascii	"ftl_cmp_data_ver\000"
 .LASF276:
 	.ascii	"g_gc_temp_superblock\000"
@@ -40655,7 +40964,7 @@ check_vpc_table:
 	.ascii	"p_vendor_block_valid_page_count\000"
 .LASF499:
 	.ascii	"FtlScanSysBlk\000"
-.LASF668:
+.LASF667:
 	.ascii	"l2p_addr_tran\000"
 .LASF309:
 	.ascii	"g_max_erase_count\000"
@@ -40665,13 +40974,13 @@ check_vpc_table:
 	.ascii	"ftl_gc_page_buffer\000"
 .LASF233:
 	.ascii	"g_req_cache\000"
-.LASF648:
+.LASF647:
 	.ascii	"FtlConstantsInit\000"
 .LASF451:
 	.ascii	"pages\000"
 .LASF420:
 	.ascii	"update_vpc_list\000"
-.LASF661:
+.LASF660:
 	.ascii	"rknand_print_hex\000"
 .LASF408:
 	.ascii	"p_gc_page\000"
@@ -40681,7 +40990,7 @@ check_vpc_table:
 	.ascii	"Ftl_get_new_temp_ppa\000"
 .LASF136:
 	.ascii	"PowerLostTimes\000"
-.LASF577:
+.LASF572:
 	.ascii	"blk_Id\000"
 .LASF293:
 	.ascii	"g_gc_merge_free_blk_threshold\000"
@@ -40693,7 +41002,7 @@ check_vpc_table:
 	.ascii	"cache_write_count\000"
 .LASF259:
 	.ascii	"g_totle_map_block\000"
-.LASF659:
+.LASF658:
 	.ascii	"printk\000"
 .LASF546:
 	.ascii	"phyAddr\000"
@@ -40715,18 +41024,16 @@ check_vpc_table:
 	.ascii	"scr_ppa\000"
 .LASF209:
 	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF572:
+.LASF574:
 	.ascii	"FtlFreeSysBLkSort\000"
 .LASF266:
 	.ascii	"p_l2p_map_buf\000"
-.LASF643:
+.LASF642:
 	.ascii	"IsBlkInVendorPart\000"
-.LASF599:
+.LASF598:
 	.ascii	"FtlBbtMemInit\000"
 .LASF244:
 	.ascii	"gp_gc_page_buf_info\000"
-.LASF573:
-	.ascii	"tmp_blk_id\000"
 .LASF167:
 	.ascii	"front\000"
 .LASF235:
@@ -40735,17 +41042,17 @@ check_vpc_table:
 	.ascii	"index\000"
 .LASF538:
 	.ascii	"lastMapBlk\000"
-.LASF624:
+.LASF623:
 	.ascii	"last_lpa_nscts\000"
 .LASF301:
 	.ascii	"g_tmp_data_superblock_id\000"
 .LASF247:
 	.ascii	"gp_ect_tbl_info\000"
-.LASF655:
+.LASF654:
 	.ascii	"rknand_proc_ftlread\000"
 .LASF542:
 	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF666:
+.LASF665:
 	.ascii	"/home/ldq/rk-linux/kernel-debug\000"
 .LASF35:
 	.ascii	"atomic_notifier_head\000"
@@ -40755,7 +41062,7 @@ check_vpc_table:
 	.ascii	"c_ftl_nand_blks_per_die\000"
 .LASF565:
 	.ascii	"node_data_count\000"
-.LASF601:
+.LASF600:
 	.ascii	"write_count\000"
 .LASF241:
 	.ascii	"p_io_spare_buf\000"
@@ -40775,19 +41082,19 @@ check_vpc_table:
 	.ascii	"check\000"
 .LASF29:
 	.ascii	"console_printk\000"
-.LASF671:
+.LASF670:
 	.ascii	"strcpy\000"
 .LASF61:
 	.ascii	"status\000"
 .LASF68:
 	.ascii	"die_num\000"
-.LASF628:
+.LASF627:
 	.ascii	"sftl_init\000"
 .LASF292:
 	.ascii	"g_gc_free_blk_threshold\000"
 .LASF32:
 	.ascii	"kptr_restrict\000"
-.LASF594:
+.LASF593:
 	.ascii	"FtlLoadFactoryBbt\000"
 .LASF407:
 	.ascii	"scan_page_num\000"
@@ -40801,7 +41108,7 @@ check_vpc_table:
 	.ascii	"ftl_sb_update_avl_pages\000"
 .LASF105:
 	.ascii	"region_id\000"
-.LASF631:
+.LASF630:
 	.ascii	"ftl_low_format\000"
 .LASF342:
 	.ascii	"str2\000"
@@ -40823,7 +41130,7 @@ check_vpc_table:
 	.ascii	"ftl_get_blk_mode\000"
 .LASF27:
 	.ascii	"linux_banner\000"
-.LASF663:
+.LASF662:
 	.ascii	"sprintf\000"
 .LASF108:
 	.ascii	"ftl_ect_tbl_info\000"
@@ -40831,7 +41138,7 @@ check_vpc_table:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
 .LASF513:
 	.ascii	"FtlVendorPartRead\000"
-.LASF611:
+.LASF610:
 	.ascii	"FtlWrite\000"
 .LASF74:
 	.ascii	"sec_per_page\000"
@@ -40849,7 +41156,7 @@ check_vpc_table:
 	.ascii	"lastPpa\000"
 .LASF321:
 	.ascii	"g_power_lost_recovery_flag\000"
-.LASF603:
+.LASF602:
 	.ascii	"FtlBbt2Bitmap\000"
 .LASF72:
 	.ascii	"page_per_blk\000"
@@ -40863,7 +41170,7 @@ check_vpc_table:
 	.ascii	"numREQ\000"
 .LASF78:
 	.ascii	"ecc_bits\000"
-.LASF633:
+.LASF632:
 	.ascii	"sys_bad_block_cnt\000"
 .LASF195:
 	.ascii	"c_ftl_nand_page_pre_super_blk\000"
@@ -40879,11 +41186,11 @@ check_vpc_table:
 	.ascii	"g_totle_gc_page_count\000"
 .LASF237:
 	.ascii	"p_vendor_data_buf\000"
-.LASF600:
+.LASF599:
 	.ascii	"FtlBbmTblFlush\000"
 .LASF567:
 	.ascii	"tmp_multiplier_value\000"
-.LASF660:
+.LASF659:
 	.ascii	"__memzero\000"
 .LASF406:
 	.ascii	"lookup_ppa\000"
@@ -40911,7 +41218,7 @@ check_vpc_table:
 	.ascii	"last_page_version\000"
 .LASF231:
 	.ascii	"req_gc\000"
-.LASF610:
+.LASF609:
 	.ascii	"FtlDiscard\000"
 .LASF36:
 	.ascii	"panic_notifier_list\000"
@@ -40921,7 +41228,7 @@ check_vpc_table:
 	.ascii	"add_count\000"
 .LASF154:
 	.ascii	"inkDie_write_and_check_en\000"
-.LASF581:
+.LASF580:
 	.ascii	"FtlGetLastWrittenPage\000"
 .LASF465:
 	.ascii	"detected_active_page\000"
@@ -40931,7 +41238,7 @@ check_vpc_table:
 	.ascii	"reset_devices\000"
 .LASF157:
 	.ascii	"refresh_enable_mode\000"
-.LASF606:
+.LASF605:
 	.ascii	"FtlBbmIsBadBlock\000"
 .LASF176:
 	.ascii	"dump_writed\000"
@@ -40963,7 +41270,7 @@ check_vpc_table:
 	.ascii	"g_num_data_superblocks\000"
 .LASF447:
 	.ascii	"error_flag\000"
-.LASF665:
+.LASF664:
 	.ascii	"drivers/rkflash/rksftl/rk_sftl.c\000"
 .LASF311:
 	.ascii	"g_in_swl_replace\000"
@@ -40991,7 +41298,7 @@ check_vpc_table:
 	.ascii	"kmsg_fops\000"
 .LASF568:
 	.ascii	"INSERT_DATA_LIST\000"
-.LASF615:
+.LASF614:
 	.ascii	"sctidx\000"
 .LASF390:
 	.ascii	"superBlk\000"
@@ -40999,13 +41306,13 @@ check_vpc_table:
 	.ascii	"flag\000"
 .LASF284:
 	.ascii	"g_gc_page_offset\000"
-.LASF641:
+.LASF640:
 	.ascii	"test_mode\000"
 .LASF299:
 	.ascii	"g_totle_discard_page_count\000"
 .LASF217:
 	.ascii	"g_GlobalDataVersion\000"
-.LASF652:
+.LASF651:
 	.ascii	"debug_flag\000"
 .LASF327:
 	.ascii	"gFtlInitStatus\000"
@@ -41047,7 +41354,7 @@ check_vpc_table:
 	.ascii	"str1\000"
 .LASF67:
 	.ascii	"nand_type\000"
-.LASF616:
+.LASF615:
 	.ascii	"nscts\000"
 .LASF104:
 	.ascii	"ftl_l2p_ram_map_info\000"
@@ -41059,11 +41366,11 @@ check_vpc_table:
 	.ascii	"get_bad_blk_list\000"
 .LASF296:
 	.ascii	"g_totle_write_page_count\000"
-.LASF646:
+.LASF645:
 	.ascii	"FtlMemInit\000"
 .LASF303:
 	.ascii	"g_totle_l2p_write_count\000"
-.LASF589:
+.LASF588:
 	.ascii	"P2V_plane\000"
 .LASF12:
 	.ascii	"bool\000"
@@ -41079,7 +41386,7 @@ check_vpc_table:
 	.ascii	"slc_erase_count\000"
 .LASF544:
 	.ascii	"minValidPageCount\000"
-.LASF644:
+.LASF643:
 	.ascii	"ven_blk\000"
 .LASF193:
 	.ascii	"c_ftl_nand_page_pre_blk\000"
@@ -41103,7 +41410,7 @@ check_vpc_table:
 	.ascii	"log2phys\000"
 .LASF469:
 	.ascii	"detected_error_page\000"
-.LASF583:
+.LASF582:
 	.ascii	"spareBuf\000"
 .LASF188:
 	.ascii	"c_ftl_nand_blks_per_die_shift\000"
@@ -41113,7 +41420,7 @@ check_vpc_table:
 	.ascii	"p_l2p_ram_map\000"
 .LASF97:
 	.ascii	"maxBlkNum\000"
-.LASF662:
+.LASF661:
 	.ascii	"ftl_malloc\000"
 .LASF444:
 	.ascii	"pDataHeader\000"
@@ -41123,7 +41430,7 @@ check_vpc_table:
 	.ascii	"erase_blk\000"
 .LASF455:
 	.ascii	"SupperBlkListInit\000"
-.LASF634:
+.LASF633:
 	.ascii	"create_first_active_superblock\000"
 .LASF166:
 	.ascii	"sys_blk_queue\000"
@@ -41153,7 +41460,7 @@ check_vpc_table:
 	.ascii	"g_l2p_last_update_region_id\000"
 .LASF201:
 	.ascii	"c_ftl_nand_totle_phy_blks\000"
-.LASF636:
+.LASF635:
 	.ascii	"FtlLowFormatEraseBlock\000"
 .LASF76:
 	.ascii	"byte_per_sec\000"
@@ -41173,19 +41480,19 @@ check_vpc_table:
 	.ascii	"p_blk_mode_table\000"
 .LASF285:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
-.LASF579:
+.LASF578:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
 .LASF194:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
 .LASF515:
 	.ascii	"nSec\000"
-.LASF597:
+.LASF596:
 	.ascii	"FtlBbtCalcTotleCnt\000"
 .LASF196:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
 .LASF495:
 	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF586:
+.LASF585:
 	.ascii	"ver1\000"
 .LASF153:
 	.ascii	"SlcPartLbaEndSector\000"
@@ -41217,7 +41524,7 @@ check_vpc_table:
 	.ascii	"next_free_active_page\000"
 .LASF132:
 	.ascii	"gcTempSuperblockId\000"
-.LASF623:
+.LASF622:
 	.ascii	"first_lpa_nscts\000"
 .LASF302:
 	.ascii	"g_totle_cache_write_count\000"
@@ -41227,7 +41534,7 @@ check_vpc_table:
 	.ascii	"Ftl_load_ext_data\000"
 .LASF506:
 	.ascii	"FtlWriteDump_data\000"
-.LASF638:
+.LASF637:
 	.ascii	"max_test_page_num\000"
 .LASF393:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
@@ -41261,7 +41568,7 @@ check_vpc_table:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
 .LASF371:
 	.ascii	"rk_ftl_garbage_collect\000"
-.LASF657:
+.LASF656:
 	.ascii	"memcmp\000"
 .LASF373:
 	.ascii	"numPages\000"
@@ -41275,7 +41582,7 @@ check_vpc_table:
 	.ascii	"make_superblock\000"
 .LASF19:
 	.ascii	"__con_initcall_end\000"
-.LASF632:
+.LASF631:
 	.ascii	"bad_block_cnt\000"
 .LASF550:
 	.ascii	"node_multiplier_value\000"
@@ -41291,6 +41598,8 @@ check_vpc_table:
 	.ascii	"flash_type\000"
 .LASF416:
 	.ascii	"req_num\000"
+.LASF571:
+	.ascii	"remalloc\000"
 .LASF511:
 	.ascii	"forceFlush\000"
 .LASF56:
@@ -41309,7 +41618,7 @@ check_vpc_table:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
 .LASF441:
 	.ascii	"update_multiplier_value\000"
-.LASF619:
+.LASF618:
 	.ascii	"flashType\000"
 .LASF6:
 	.ascii	"short int\000"
@@ -41321,7 +41630,7 @@ check_vpc_table:
 	.ascii	"mode\000"
 .LASF426:
 	.ascii	"new_id\000"
-.LASF629:
+.LASF628:
 	.ascii	"pNand\000"
 .LASF49:
 	.ascii	"SYSTEM_RUNNING\000"
@@ -41329,15 +41638,15 @@ check_vpc_table:
 	.ascii	"pBuf\000"
 .LASF142:
 	.ascii	"write_page_count\000"
-.LASF604:
+.LASF603:
 	.ascii	"bitmap\000"
 .LASF200:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF669:
+.LASF668:
 	.ascii	"sftl_get_density\000"
-.LASF640:
+.LASF639:
 	.ascii	"test_page_step\000"
-.LASF595:
+.LASF594:
 	.ascii	"blkAddr\000"
 .LASF286:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
@@ -41345,11 +41654,11 @@ check_vpc_table:
 	.ascii	"g_gc_next_blk_1\000"
 .LASF529:
 	.ascii	"target_region\000"
-.LASF613:
+.LASF612:
 	.ascii	"end_lpa\000"
 .LASF473:
 	.ascii	"scan_completed\000"
-.LASF656:
+.LASF655:
 	.ascii	"FtlPrintInfo2buf\000"
 .LASF365:
 	.ascii	"p_die\000"
@@ -41361,19 +41670,19 @@ check_vpc_table:
 	.ascii	"mlc_erase_count\000"
 .LASF178:
 	.ascii	"phyBlk\000"
-.LASF626:
+.LASF625:
 	.ascii	"sftl_deinit\000"
 .LASF486:
 	.ascii	"pMapBlockInfo\000"
 .LASF151:
 	.ascii	"last_refresh_data_times\000"
-.LASF667:
+.LASF666:
 	.ascii	"system_states\000"
 .LASF159:
 	.ascii	"totle_write_sector\000"
 .LASF229:
 	.ascii	"req_prgm\000"
-.LASF591:
+.LASF590:
 	.ascii	"FtlMakeBbt\000"
 .LASF102:
 	.ascii	"in_gc_mode\000"
@@ -41389,7 +41698,7 @@ check_vpc_table:
 	.ascii	"max_ec\000"
 .LASF238:
 	.ascii	"p_sys_spare_buf\000"
-.LASF670:
+.LASF669:
 	.ascii	"memcpy\000"
 .LASF504:
 	.ascii	"prog_error_count\000"
@@ -41397,7 +41706,7 @@ check_vpc_table:
 	.ascii	"gc_discard_updated\000"
 .LASF412:
 	.ascii	"prev_superblock_id\000"
-.LASF639:
+.LASF638:
 	.ascii	"test_page_num\000"
 .LASF156:
 	.ascii	"last_refresh_read_count\000"
@@ -41405,9 +41714,9 @@ check_vpc_table:
 	.ascii	"lookup_ppa_ver\000"
 .LASF490:
 	.ascii	"totleBlkNum\000"
-.LASF609:
+.LASF608:
 	.ascii	"sftl_read\000"
-.LASF578:
+.LASF577:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
 .LASF409:
 	.ascii	"FtlGcPageVarInit\000"
@@ -41419,15 +41728,15 @@ check_vpc_table:
 	.ascii	"recovery_cur_page_ver\000"
 .LASF537:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF608:
+.LASF607:
 	.ascii	"sftl_write\000"
 .LASF118:
 	.ascii	"ftl_map_blk_header\000"
-.LASF580:
+.LASF579:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
 .LASF25:
 	.ascii	"late_time_init\000"
-.LASF647:
+.LASF646:
 	.ascii	"mem_size\000"
 .LASF485:
 	.ascii	"FtlMapTblRecovery\000"
@@ -41439,11 +41748,11 @@ check_vpc_table:
 	.ascii	"lpn_index\000"
 .LASF203:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF625:
+.LASF624:
 	.ascii	"sector\000"
 .LASF507:
 	.ascii	"num_page\000"
-.LASF618:
+.LASF617:
 	.ascii	"FtlProgPages\000"
 .LASF417:
 	.ascii	"FtlGcBufFree\000"
@@ -41483,8 +41792,6 @@ check_vpc_table:
 	.ascii	"TotleReadBufferMatchCount\000"
 .LASF340:
 	.ascii	"check_spare_buf\000"
-.LASF574:
-	.ascii	"tmp_ec\000"
 .LASF315:
 	.ascii	"g_gc_skip_write_count\000"
 .LASF59:
@@ -41497,7 +41804,7 @@ check_vpc_table:
 	.ascii	"req_sys\000"
 .LASF162:
 	.ascii	"List_Node\000"
-.LASF653:
+.LASF652:
 	.ascii	"Ftl_log2\000"
 .LASF152:
 	.ascii	"all_blk_used_slc_mode\000"
@@ -41509,19 +41816,19 @@ check_vpc_table:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
 .LASF17:
 	.ascii	"initcall_t\000"
-.LASF590:
+.LASF589:
 	.ascii	"V2P_block\000"
 .LASF115:
 	.ascii	"sysBlksPerPlane\000"
 .LASF454:
 	.ascii	"Ftl_save_ext_data\000"
-.LASF617:
+.LASF616:
 	.ascii	"FtlCacheWriteBack\000"
 .LASF79:
 	.ascii	"nand_ops\000"
-.LASF630:
+.LASF629:
 	.ascii	"load_bbt\000"
-.LASF650:
+.LASF649:
 	.ascii	"blkNum\000"
 .LASF367:
 	.ascii	"page_index\000"
@@ -41529,7 +41836,7 @@ check_vpc_table:
 	.ascii	"FtlVpcTblFlush\000"
 .LASF109:
 	.ascii	"hash\000"
-.LASF571:
+.LASF573:
 	.ascii	"IsInFreeQueue\000"
 .LASF471:
 	.ascii	"read_super_page_end\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 154f15f2767ad..182764fb4a987 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-06-13
+ * date: 2018-07-13
  */
 	.arch armv8-a
 	.file	"rk_sftl.c"
@@ -82,12 +82,12 @@ l2p_addr_tran.isra.0:
 ftl_set_blk_mode.part.7:
 .LFB276:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	.cfi_startproc
 .LVL6:
-	.loc 2 1346 0
+	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1349 0
+	.loc 2 1398 0
 	adrp	x2, .LANCHOR0
 	ubfx	x1, x0, 5, 11
 	ldr	x3, [x2, #:lo12:.LANCHOR0]
@@ -108,30 +108,30 @@ ftl_set_blk_mode.part.7:
 Ftl_log2:
 .LFB141:
 	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
+	.loc 3 127 0
 	.cfi_startproc
 .LVL8:
-	.loc 3 130 0
+	.loc 3 129 0
 	mov	w2, 1
 .LVL9:
-	.loc 3 132 0
+	.loc 3 131 0
 	mov	w1, 0
 .L5:
-	.loc 3 132 0 is_stmt 0 discriminator 1
+	.loc 3 131 0 is_stmt 0 discriminator 1
 	cmp	w2, w0
 	bls	.L6
-	.loc 3 134 0 is_stmt 1
+	.loc 3 133 0 is_stmt 1
 	sub	w0, w1, #1
 .LVL10:
-	.loc 3 136 0
+	.loc 3 135 0
 	ret
 .LVL11:
 .L6:
-	.loc 3 132 0 discriminator 3
+	.loc 3 131 0 discriminator 3
 	add	w1, w1, 1
-	.loc 3 133 0 discriminator 3
-	lsl	w2, w2, 1
 	.loc 3 132 0 discriminator 3
+	lsl	w2, w2, 1
+	.loc 3 131 0 discriminator 3
 	and	w1, w1, 65535
 	b	.L5
 	.cfi_endproc
@@ -439,8 +439,8 @@ IsBlkInVendorPart:
 	.loc 3 517 0
 	ldrh	w2, [x1, 124]
 	cbz	w2, .L25
-.LBB164:
-.LBB165:
+.LBB168:
+.LBB169:
 	.loc 3 518 0
 	ldrh	w2, [x1, 100]
 	.loc 3 519 0
@@ -451,8 +451,8 @@ IsBlkInVendorPart:
 	cmp	w2, w1, uxth
 	bhi	.L24
 .L25:
-.LBE165:
-.LBE164:
+.LBE169:
+.LBE168:
 	.loc 3 524 0
 	mov	w0, 0
 .LVL23:
@@ -460,8 +460,8 @@ IsBlkInVendorPart:
 .LVL24:
 .L24:
 	add	x1, x1, 1
-.LBB167:
-.LBB166:
+.LBB171:
+.LBB170:
 	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
@@ -470,8 +470,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	mov	w0, 1
 .LVL25:
-.LBE166:
-.LBE167:
+.LBE170:
+.LBE171:
 	.loc 3 525 0
 	ret
 	.cfi_endproc
@@ -482,9 +482,9 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB160:
-	.loc 3 1212 0
-	.cfi_startproc
 	.loc 3 1214 0
+	.cfi_startproc
+	.loc 3 1216 0
 	adrp	x0, .LANCHOR0+120
 	ldr	w0, [x0, #:lo12:.LANCHOR0+120]
 	ret
@@ -816,140 +816,56 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 .LFB180:
-	.loc 2 116 0
+	.loc 2 118 0
 	.cfi_startproc
 	.loc 2 123 0
-	adrp	x2, .LANCHOR0
-	add	x7, x2, :lo12:.LANCHOR0
-	add	x6, x7, 232
-	mov	x4, x2
-	.loc 2 116 0
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 123 0
-	mov	w5, 0
-	.loc 2 116 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.L52:
-	.loc 2 123 0 discriminator 1
-	ldrh	w0, [x6, 6]
-	cmp	w0, w5
-	bhi	.L53
-	.loc 2 128 0 discriminator 1
-	add	x2, x4, :lo12:.LANCHOR0
-	mov	w0, 0
-	add	x5, x2, 232
+	adrp	x0, .LANCHOR0
+	add	x2, x0, :lo12:.LANCHOR0
+	add	x1, x2, 232
+	ldrh	w3, [x1, 6]
+	cbz	w3, .L51
+	.loc 2 119 0
+	ldrh	w5, [x2, 2316]
+	mov	w6, 0
+	ldrh	w3, [x1, 2]
+	mov	w4, 0
 .LVL53:
-.L54:
-	ldrh	w7, [x5, 6]
-	sub	w1, w7, #1
+	ldrh	w2, [x1, 4]
+	and	w5, w5, 31
 .LVL54:
-	cmp	w0, w1
-	blt	.L59
-	.loc 2 144 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
+.L53:
+	.loc 2 124 0 discriminator 1
+	cmp	w5, w4
+	bgt	.L54
+	cbz	w6, .L51
+	add	x0, x0, :lo12:.LANCHOR0
+	strh	w3, [x0, 234]
+	strh	w2, [x0, 236]
+.L51:
 	ret
+.L54:
+	.loc 2 125 0 discriminator 3
+	add	x6, x1, x3, sxtw 1
+	.loc 2 124 0 discriminator 3
+	add	w4, w4, 1
 .LVL55:
-.L53:
-	.cfi_restore_state
+	.loc 2 126 0 discriminator 3
+	add	w3, w3, 1
 	.loc 2 124 0 discriminator 3
-	ldrh	w0, [x6, 2]
-	add	w0, w0, w5
-	add	x0, x6, x0, sxtw 1
-	ldrh	w0, [x0, 8]
-	bl	P2V_block_in_plane
+	and	w4, w4, 65535
 .LVL56:
+	.loc 2 126 0 discriminator 3
+	and	w3, w3, 1023
 	.loc 2 125 0 discriminator 3
-	ldr	x3, [x7, 2296]
-	ubfiz	x0, x0, 1, 16
-	ldr	x2, [x7, 2288]
-	ubfiz	x1, x5, 2, 16
-	.loc 2 123 0 discriminator 3
-	add	w5, w5, 1
-	and	w5, w5, 65535
-	.loc 2 125 0 discriminator 3
-	ldrh	w0, [x3, x0]
-	str	w0, [x2, x1]
-	b	.L52
-.LVL57:
-.L59:
-	.loc 2 130 0
-	add	w6, w0, 1
-	.loc 2 131 0
-	ldr	x4, [x2, 2288]
-.LVL58:
-	.loc 2 130 0
-	and	w6, w6, 65535
-	mov	w1, w0
-.LVL59:
-	mov	w3, w6
-.L55:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	w3, w7
-	bcc	.L57
-	.loc 2 134 0 is_stmt 1
-	cmp	w0, w1
-	beq	.L58
-	.loc 2 136 0
-	ubfiz	x3, x0, 2, 16
-	.loc 2 135 0
-	ubfiz	x7, x1, 2, 32
-	.loc 2 136 0
-	ldr	w9, [x4, x3]
-	.loc 2 135 0
-	ldr	w8, [x4, x7]
-.LVL60:
-	.loc 2 136 0
-	str	w9, [x4, x7]
-	.loc 2 137 0
-	ldr	x4, [x2, 2288]
-.LVL61:
-	str	w8, [x4, x3]
-	.loc 2 139 0
-	ldrh	w3, [x5, 2]
-	.loc 2 140 0
-	add	w0, w0, w3
-	.loc 2 139 0
-	add	w1, w1, w3
-.LVL62:
-	.loc 2 140 0
-	add	x0, x5, x0, sxtw 1
-	.loc 2 139 0
-	add	x1, x5, x1, sxtw 1
-	.loc 2 140 0
-	ldrh	w3, [x0, 8]
-	.loc 2 139 0
-	ldrh	w4, [x1, 8]
-.LVL63:
-	.loc 2 140 0
-	strh	w3, [x1, 8]
-	.loc 2 141 0
-	strh	w4, [x0, 8]
-.LVL64:
-.L58:
-	.loc 2 130 0 discriminator 1
-	mov	w0, w6
-	b	.L54
-.LVL65:
-.L57:
-	.loc 2 131 0
-	ubfiz	x8, x3, 2, 16
-.LVL66:
-	ldr	w9, [x4, w1, uxtw 2]
-	ldr	w8, [x4, x8]
-	cmp	w9, w8
-	csel	w1, w1, w3, ls
-	.loc 2 130 0
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L55
+	ldrh	w7, [x6, 8]
+	.loc 2 127 0 discriminator 3
+	add	x6, x1, x2, sxtw 1
+	strh	w7, [x6, 8]
+	mov	w6, 1
+	.loc 2 128 0 discriminator 3
+	add	w2, w2, w6
+	and	w2, w2, 1023
+	b	.L53
 	.cfi_endproc
 .LFE180:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -958,304 +874,316 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 .LFB181:
-	.loc 2 147 0
+	.loc 2 163 0
 	.cfi_startproc
-.LVL67:
-.LBB168:
-.LBB169:
+.LVL57:
+.LBB172:
+.LBB173:
 	.loc 2 94 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x1, x1, 232
-.LBE169:
-.LBE168:
-	.loc 2 147 0
+.LBE173:
+.LBE172:
+	.loc 2 163 0
 	and	w0, w0, 65535
-.LBB171:
-.LBB170:
+.LBB175:
+.LBB174:
 	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE170:
-.LBE171:
-	.loc 2 152 0
+.LBE174:
+.LBE175:
+	.loc 2 168 0
 	cmp	w4, 1024
-	beq	.L65
-	.loc 2 155 0
+	beq	.L64
+	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.LVL68:
-.L63:
-	.loc 2 154 0 discriminator 1
+.LVL58:
+.L62:
+	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
-	bcc	.L64
-.L65:
-	.loc 2 148 0
+	bcc	.L63
+.L64:
+	.loc 2 164 0
 	mov	w0, 0
-.LVL69:
+.LVL59:
 	ret
-.LVL70:
-.L64:
-	.loc 2 155 0
+.LVL60:
+.L63:
+	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L66
-	.loc 2 154 0 discriminator 2
+	beq	.L65
+	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
-	b	.L63
-.L66:
-	.loc 2 156 0
+	b	.L62
+.L65:
+	.loc 2 172 0
 	mov	w0, 1
-.LVL71:
-	.loc 2 162 0
+.LVL61:
+	.loc 2 178 0
 	ret
 	.cfi_endproc
 .LFE181:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-.LFB182:
-	.loc 2 165 0
-	.cfi_startproc
-.LBB172:
-.LBB173:
-	.loc 2 89 0
-	adrp	x1, .LANCHOR0
-	add	x1, x1, :lo12:.LANCHOR0
-	add	x1, x1, 232
-	ldrh	w3, [x1, 6]
-.LBE173:
-.LBE172:
-	.loc 2 168 0
-	cbz	w3, .L69
-.LBB174:
-	.loc 2 170 0
-	ldrh	w2, [x1, 2]
-	.loc 2 171 0
-	sub	w3, w3, #1
-	strh	w3, [x1, 6]
-	.loc 2 170 0
-	add	x0, x1, x2, sxtw 1
-	.loc 2 172 0
-	add	w2, w2, 1
-	and	w2, w2, 1023
-	strh	w2, [x1, 2]
-	.loc 2 170 0
-	ldrh	w0, [x0, 8]
-.LVL72:
-.LVL73:
-	ret
-.L69:
-.LBE174:
-	.loc 2 166 0
-	mov	w0, 65535
-.LVL74:
-.LVL75:
-	.loc 2 176 0
-	ret
-	.cfi_endproc
-.LFE182:
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
 .LFB185:
-	.loc 2 217 0
+	.loc 2 249 0
 	.cfi_startproc
-.LVL76:
-	.loc 2 217 0
-	and	w0, w0, 65535
-	.loc 2 225 0
-	mov	w10, 65535
-	cmp	w0, w10
-	beq	.L71
-	.loc 2 230 0
+.LVL62:
+	.loc 2 260 0
 	adrp	x2, .LANCHOR0
-	add	x5, x2, :lo12:.LANCHOR0
+	add	x3, x2, :lo12:.LANCHOR0
+	.loc 2 249 0
+	and	w0, w0, 65535
+	.loc 2 260 0
+	ldrh	w1, [x3, 20]
+	cmp	w1, w0
+	bls	.L82
+.LBB178:
+.LBB179:
+	.loc 2 265 0
 	mov	w7, 6
-	.loc 2 231 0
+	ldr	x12, [x3, 2336]
+	.loc 2 266 0
 	mov	w1, -1
-	mov	x3, x2
-	.loc 2 230 0
-	ldr	x12, [x5, 2304]
+	.loc 2 265 0
 	umull	x11, w0, w7
-	add	x4, x12, x11
-.LVL77:
-	.loc 2 231 0
-	strh	w1, [x4, 2]
+	add	x5, x12, x11
+.LVL63:
+	.loc 2 266 0
+	strh	w1, [x5, 2]
 	strh	w1, [x12, x11]
-	.loc 2 233 0
-	ldr	x1, [x5, 2312]
-.LVL78:
-	cbnz	x1, .L72
-	.loc 2 234 0
-	str	x4, [x5, 2312]
-.LVL79:
-.L71:
-	.loc 2 281 0
+	.loc 2 268 0
+	ldr	x1, [x3, 2344]
+.LVL64:
+	cbnz	x1, .L69
+	.loc 2 269 0
+	str	x5, [x3, 2344]
+.L82:
+.LBE179:
+.LBE178:
+	.loc 2 323 0
 	mov	w0, 0
-.LVL80:
+.LVL65:
 	ret
-.LVL81:
-.L72:
-	.loc 2 238 0
-	ldr	x14, [x5, 2320]
+.LVL66:
+.L69:
+	.loc 2 249 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+.LBB183:
+.LBB180:
+	.loc 2 273 0
 	ubfiz	x8, x0, 1, 16
-	.loc 2 239 0
-	ldrh	w2, [x4, 4]
-	.loc 2 244 0
-	mov	x15, -6148914691236517206
-	ldr	x13, [x5, 2304]
-	movk	x15, 0xaaab, lsl 0
-	.loc 2 239 0
+	mov	x4, x2
+	.loc 2 279 0
+	mov	x9, -6148914691236517206
+.LBE180:
+.LBE183:
+	.loc 2 249 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.LBB184:
+.LBB181:
+	.loc 2 273 0
+	ldr	x14, [x3, 2352]
+	.loc 2 279 0
+	movk	x9, 0xaaab, lsl 0
+	.loc 2 274 0
+	ldrh	w2, [x5, 4]
+	mov	w10, -1
+	.loc 2 279 0
+	ldr	x13, [x3, 2336]
+	.loc 2 301 0
+	mov	w30, 65535
+	.loc 2 274 0
 	cmp	w2, 0
-	mov	w9, -1
-	.loc 2 238 0
+	.loc 2 294 0
+	ldr	x15, [x3, 2360]
+	.loc 2 273 0
 	ldrh	w6, [x14, x8]
-.LVL82:
-	.loc 2 239 0
+.LVL67:
+	.loc 2 282 0
+	ldrh	w18, [x3, 20]
+	.loc 2 256 0
+	mov	w3, 0
+.LVL68:
+	.loc 2 274 0
 	mul	w6, w6, w2
-.LVL83:
-	.loc 2 244 0
+.LVL69:
+	.loc 2 279 0
 	sub	x2, x1, x13
 	asr	x2, x2, 1
-	.loc 2 239 0
-	csel	w6, w6, w9, ne
-.LVL84:
-	.loc 2 244 0
-	mul	x2, x2, x15
-	.loc 2 252 0
-	ldr	x15, [x5, 2296]
-	.loc 2 244 0
+	.loc 2 274 0
+	csel	w6, w6, w10, ne
+.LVL70:
+	.loc 2 279 0
+	mul	x2, x2, x9
+	.loc 2 294 0
+	add	x9, x15, x8
+	.loc 2 309 0
+	mov	w8, w7
+	.loc 2 279 0
 	and	w2, w2, 65535
-	.loc 2 252 0
-	add	x8, x15, x8
-.L79:
-	.loc 2 246 0
+.L77:
+	.loc 2 281 0
+	add	w3, w3, 1
+.LVL71:
+	and	w3, w3, 65535
+.LVL72:
+	.loc 2 282 0
+	cmp	w3, w18
+	bhi	.L68
+	.loc 2 285 0
+	cmp	w0, w2
+	beq	.L68
+	.loc 2 288 0
 	ubfiz	x16, x2, 1, 16
-	.loc 2 247 0
+	.loc 2 289 0
 	ldrh	w17, [x1, 4]
 	cmp	w17, 0
-	.loc 2 246 0
-	ldrh	w5, [x14, x16]
-.LVL85:
-	.loc 2 247 0
-	mul	w5, w5, w17
-.LVL86:
-	csel	w5, w5, w9, ne
-.LVL87:
-	.loc 2 251 0
-	cmp	w6, w5
-	bne	.L75
-	.loc 2 252 0
+	.loc 2 288 0
+	ldrh	w7, [x14, x16]
+.LVL73:
+	.loc 2 289 0
+	mul	w7, w7, w17
+.LVL74:
+	csel	w7, w7, w10, ne
+.LVL75:
+	.loc 2 293 0
+	cmp	w6, w7
+	bne	.L73
+	.loc 2 294 0
 	ldrh	w16, [x15, x16]
-	ldrh	w5, [x8]
-.LVL88:
-	cmp	w16, w5
-	bcc	.L77
-.LVL89:
-.L76:
-	.loc 2 270 0
+	ldrh	w7, [x9]
+.LVL76:
+	cmp	w16, w7
+	bcc	.L75
+.LVL77:
+.L74:
+	.loc 2 312 0
 	strh	w2, [x12, x11]
-	.loc 2 271 0
+	.loc 2 313 0
 	ldrh	w2, [x1, 2]
-	strh	w2, [x4, 2]
-	.loc 2 273 0
-	add	x2, x3, :lo12:.LANCHOR0
-	ldr	x3, [x2, 2312]
+	strh	w2, [x5, 2]
+	.loc 2 315 0
+	add	x2, x4, :lo12:.LANCHOR0
+	ldr	x3, [x2, 2344]
+.LVL78:
 	cmp	x1, x3
-	bne	.L80
-	.loc 2 274 0
+	bne	.L78
+	.loc 2 316 0
 	strh	w0, [x1, 2]
-	.loc 2 275 0
-	str	x4, [x2, 2312]
-	b	.L71
+	.loc 2 317 0
+	str	x5, [x2, 2344]
+	b	.L68
+.LVL79:
+.L73:
+	.loc 2 298 0
+	bcc	.L74
 .L75:
-	.loc 2 256 0
-	bcc	.L76
-.L77:
-	.loc 2 259 0
-	ldrh	w5, [x1]
-.LVL90:
-	cmp	w5, w10
-	bne	.L78
-	.loc 2 260 0
-	strh	w2, [x4, 2]
-	.loc 2 262 0
-	add	x2, x3, :lo12:.LANCHOR0
-	.loc 2 261 0
+	.loc 2 301 0
+	ldrh	w7, [x1]
+.LVL80:
+	cmp	w7, w30
+	bne	.L76
+	.loc 2 302 0
+	strh	w2, [x5, 2]
+	.loc 2 304 0
+	add	x2, x4, :lo12:.LANCHOR0
+	.loc 2 303 0
 	strh	w0, [x1]
-	.loc 2 262 0
-	str	x4, [x2, 2328]
-	.loc 2 263 0
-	b	.L71
-.L78:
-	.loc 2 267 0
-	umaddl	x1, w5, w7, x13
-	.loc 2 246 0
-	mov	w2, w5
-	b	.L79
-.LVL91:
-.L80:
-	.loc 2 277 0
-	ldrh	w3, [x1, 2]
-	mov	w4, 6
-.LVL92:
-	ldr	x2, [x2, 2304]
-	umull	x3, w3, w4
-	strh	w0, [x2, x3]
-	.loc 2 278 0
-	strh	w0, [x1, 2]
-	b	.L71
-	.cfi_endproc
-.LFE185:
-	.size	insert_data_list, .-insert_data_list
+	.loc 2 304 0
+	str	x5, [x2, 2368]
+.LVL81:
+.L68:
+.LBE181:
+.LBE184:
+	.loc 2 323 0
+	mov	w0, 0
+.LVL82:
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL83:
+.L76:
+	.cfi_restore_state
+.LBB185:
+.LBB182:
+	.loc 2 309 0
+	umaddl	x1, w7, w8, x13
+	mov	w2, w7
+	b	.L77
+.LVL84:
+.L78:
+	.loc 2 319 0
+	ldrh	w3, [x1, 2]
+	mov	w4, 6
+	ldr	x2, [x2, 2336]
+	umull	x3, w3, w4
+	strh	w0, [x2, x3]
+	.loc 2 320 0
+	strh	w0, [x1, 2]
+	b	.L68
+.LBE182:
+.LBE185:
+	.cfi_endproc
+.LFE185:
+	.size	insert_data_list, .-insert_data_list
 	.align	2
 	.global	INSERT_DATA_LIST
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 .LFB184:
-	.loc 2 186 0
+	.loc 2 218 0
 	.cfi_startproc
-.LVL93:
+.LVL85:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL94:
-	.loc 2 188 0
+.LVL86:
+	.loc 2 220 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2336]
+	ldrh	w0, [x1, 2376]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, 2336]
-	.loc 2 189 0
+	strh	w0, [x1, 2376]
+	.loc 2 221 0
 	ldrh	w1, [x1, 20]
 	cmp	w1, w0
-	bcs	.L83
-.LBB177:
-.LBB178:
+	bcs	.L84
+.LBB188:
+.LBB189:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 189
+	mov	w2, 221
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL95:
-.L83:
-.LBE178:
-.LBE177:
-	.loc 2 190 0
+.LVL87:
+.L84:
+.LBE189:
+.LBE188:
+	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1269,109 +1197,109 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 .LFB186:
-	.loc 2 284 0
+	.loc 2 326 0
 	.cfi_startproc
-.LVL96:
-	.loc 2 284 0
+.LVL88:
+	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 290 0
+	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L87
-	.loc 2 293 0
+	beq	.L88
+	.loc 2 335 0
 	adrp	x2, .LANCHOR0
 	add	x5, x2, :lo12:.LANCHOR0
 	mov	w6, 6
-	.loc 2 294 0
+	.loc 2 336 0
 	mov	w1, -1
 	mov	x3, x2
-	.loc 2 293 0
-	ldr	x9, [x5, 2304]
+	.loc 2 335 0
+	ldr	x9, [x5, 2336]
 	umull	x8, w0, w6
 	add	x4, x9, x8
-.LVL97:
-	.loc 2 294 0
+.LVL89:
+	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x9, x8]
-	.loc 2 296 0
-	ldr	x1, [x5, 2344]
-.LVL98:
-	cbnz	x1, .L88
-	.loc 2 297 0
-	str	x4, [x5, 2344]
-.LVL99:
-.L87:
-	.loc 2 330 0
+	.loc 2 338 0
+	ldr	x1, [x5, 2384]
+.LVL90:
+	cbnz	x1, .L89
+	.loc 2 339 0
+	str	x4, [x5, 2384]
+.LVL91:
+.L88:
+	.loc 2 372 0
 	mov	w0, 0
-.LVL100:
+.LVL92:
 	ret
-.LVL101:
-.L88:
-	.loc 2 301 0
-	ldr	x11, [x5, 2296]
+.LVL93:
+.L89:
+	.loc 2 343 0
+	ldr	x11, [x5, 2360]
 	ubfiz	x2, x0, 1, 16
-	.loc 2 303 0
-	ldr	x10, [x5, 2304]
+	.loc 2 345 0
+	ldr	x10, [x5, 2336]
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 301 0
+	.loc 2 343 0
 	ldrh	w12, [x11, x2]
-.LVL102:
-	.loc 2 303 0
+.LVL94:
+	.loc 2 345 0
 	sub	x2, x1, x10
 	asr	x2, x2, 1
 	mul	x2, x2, x5
 	and	w2, w2, 65535
-.L91:
-	.loc 2 306 0
+.L92:
+	.loc 2 348 0
 	ubfiz	x5, x2, 1, 16
-	.loc 2 307 0
+	.loc 2 349 0
 	ldrh	w5, [x11, x5]
 	cmp	w5, w12
-	bcs	.L89
-	.loc 2 310 0
+	bcs	.L90
+	.loc 2 352 0
 	ldrh	w5, [x1]
 	cmp	w5, w7
-	bne	.L90
-	.loc 2 311 0
+	bne	.L91
+	.loc 2 353 0
 	strh	w2, [x4, 2]
-	.loc 2 312 0
+	.loc 2 354 0
 	strh	w0, [x1]
-	.loc 2 313 0
-	b	.L87
-.L90:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L88
+.L91:
+	.loc 2 358 0
 	umaddl	x1, w5, w6, x10
-	.loc 2 306 0
+	.loc 2 348 0
 	mov	w2, w5
-	b	.L91
-.L89:
-	.loc 2 319 0
+	b	.L92
+.L90:
+	.loc 2 361 0
 	ldrh	w5, [x1, 2]
 	strh	w5, [x4, 2]
-	.loc 2 320 0
+	.loc 2 362 0
 	strh	w2, [x9, x8]
-	.loc 2 322 0
+	.loc 2 364 0
 	add	x2, x3, :lo12:.LANCHOR0
-	ldr	x3, [x2, 2344]
+	ldr	x3, [x2, 2384]
 	cmp	x1, x3
-	bne	.L92
-	.loc 2 323 0
+	bne	.L93
+	.loc 2 365 0
 	strh	w0, [x1, 2]
-	.loc 2 324 0
-	str	x4, [x2, 2344]
-	b	.L87
-.L92:
-	.loc 2 326 0
+	.loc 2 366 0
+	str	x4, [x2, 2384]
+	b	.L88
+.L93:
+	.loc 2 368 0
 	ldrh	w3, [x1, 2]
 	mov	w4, 6
-.LVL103:
-	ldr	x2, [x2, 2304]
+.LVL95:
+	ldr	x2, [x2, 2336]
 	umull	x3, w3, w4
 	strh	w0, [x2, x3]
-	.loc 2 327 0
+	.loc 2 369 0
 	strh	w0, [x1, 2]
-	b	.L87
+	b	.L88
 	.cfi_endproc
 .LFE186:
 	.size	insert_free_list, .-insert_free_list
@@ -1380,43 +1308,43 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 .LFB183:
-	.loc 2 179 0
+	.loc 2 211 0
 	.cfi_startproc
-.LVL104:
+.LVL96:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL105:
-	.loc 2 181 0
+.LVL97:
+	.loc 2 213 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2352]
+	ldrh	w0, [x1, 2392]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, 2352]
-	.loc 2 182 0
+	strh	w0, [x1, 2392]
+	.loc 2 214 0
 	ldrh	w1, [x1, 20]
 	cmp	w1, w0
-	bcs	.L93
-.LBB181:
-.LBB182:
+	bcs	.L94
+.LBB192:
+.LBB193:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 182
+	mov	w2, 214
 	add	x1, x1, 24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL106:
-.L93:
-.LBE182:
-.LBE181:
-	.loc 2 183 0
+.LVL98:
+.L94:
+.LBE193:
+.LBE192:
+	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1430,85 +1358,85 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 .LFB187:
-	.loc 2 333 0
+	.loc 2 375 0
 	.cfi_startproc
-.LVL107:
+.LVL99:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
 	and	w1, w1, 65535
-	.loc 2 336 0
+	.loc 2 378 0
 	mov	w2, 6
-	.loc 2 333 0
+	.loc 2 375 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 336 0
+	.loc 2 378 0
 	adrp	x19, .LANCHOR0
-	.loc 2 333 0
+	.loc 2 375 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
 	mov	x23, x0
-	.loc 2 336 0
+	.loc 2 378 0
 	add	x0, x19, :lo12:.LANCHOR0
-.LVL108:
-	.loc 2 333 0
+.LVL100:
+	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 336 0
+	.loc 2 378 0
 	umull	x21, w1, w2
-	ldr	x22, [x0, 2304]
-	.loc 2 337 0
+	ldr	x22, [x0, 2336]
+	.loc 2 379 0
 	mov	w0, 65535
-	.loc 2 336 0
+	.loc 2 378 0
 	add	x20, x22, x21
-.LVL109:
-	.loc 2 337 0
+.LVL101:
+	.loc 2 379 0
 	ldrh	w1, [x20, 2]
-.LVL110:
+.LVL102:
 	cmp	w1, w0
-	bne	.L97
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L98
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23]
 	cmp	x20, x0
-	beq	.L97
-	.loc 2 337 0 discriminator 2
+	beq	.L98
+	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 337
+	mov	w2, 379
 	add	x1, x1, 48
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL111:
-.L97:
-	.loc 2 339 0 is_stmt 1
+.LVL103:
+.L98:
+	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x23]
 	mov	w1, 65535
 	cmp	x20, x0
 	ldrh	w0, [x22, x21]
-	bne	.L98
-	.loc 2 340 0
-	cmp	w0, w1
 	bne	.L99
-	.loc 2 341 0
+	.loc 2 382 0
+	cmp	w0, w1
+	bne	.L100
+	.loc 2 383 0
 	str	xzr, [x23]
-.L100:
-	.loc 2 355 0
+.L101:
+	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x22, x21]
 	strh	w0, [x20, 2]
-	.loc 2 357 0
+	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL112:
+.LVL104:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
-.LVL113:
+.LVL105:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1520,52 +1448,58 @@ List_remove_node:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL114:
-.L99:
+.LVL106:
+.L100:
 	.cfi_restore_state
-	.loc 2 343 0
+	.loc 2 385 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w2, 6
-	ldr	x1, [x19, 2304]
+	ldr	x1, [x19, 2336]
 	umaddl	x0, w0, w2, x1
-	.loc 2 344 0
+	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 343 0
+	.loc 2 385 0
 	str	x0, [x23]
-	.loc 2 344 0
+	.loc 2 386 0
 	strh	w1, [x0, 2]
-	b	.L100
-.L98:
-	.loc 2 346 0
+	b	.L101
+.L99:
+	.loc 2 388 0
 	cmp	w0, w1
-	.loc 2 347 0
-	add	x19, x19, :lo12:.LANCHOR0
-	mov	w2, 6
 	ldrh	w1, [x20, 2]
-	.loc 2 346 0
-	bne	.L101
-	.loc 2 347 0
-	umull	x1, w1, w2
-	.loc 2 348 0
-	ldr	x0, [x19, 2304]
+	bne	.L102
+	.loc 2 389 0
+	cmp	w1, w0
+	beq	.L101
+	.loc 2 390 0
+	add	x19, x19, :lo12:.LANCHOR0
+	mov	w0, 6
+	.loc 2 391 0
 	mov	w2, -1
+	.loc 2 390 0
+	umull	x1, w1, w0
+	.loc 2 391 0
+	ldr	x0, [x19, 2336]
 	strh	w2, [x0, x1]
-	b	.L100
-.L101:
-	.loc 2 351 0
-	ldr	x3, [x19, 2304]
+	b	.L101
+.L102:
+	.loc 2 394 0
+	add	x19, x19, :lo12:.LANCHOR0
+	mov	w2, 6
+	.loc 2 395 0
+	ldr	x3, [x19, 2336]
 	umaddl	x0, w0, w2, x3
 	strh	w1, [x0, 2]
-	.loc 2 352 0
-	ldrh	w1, [x20, 2]
-	.loc 2 353 0
-	ldr	x0, [x19, 2304]
+	.loc 2 396 0
+	ldrh	w0, [x20, 2]
+	.loc 2 397 0
+	ldr	x1, [x19, 2336]
 	ldrh	w3, [x22, x21]
-	.loc 2 352 0
-	umull	x1, w1, w2
-	.loc 2 353 0
-	strh	w3, [x0, x1]
-	b	.L100
+	.loc 2 396 0
+	umull	x0, w0, w2
+	.loc 2 397 0
+	strh	w3, [x1, x0]
+	b	.L101
 	.cfi_endproc
 .LFE187:
 	.size	List_remove_node, .-List_remove_node
@@ -1574,54 +1508,54 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 .LFB188:
-	.loc 2 360 0
+	.loc 2 404 0
 	.cfi_startproc
-.LVL115:
-	.loc 2 364 0
+.LVL107:
+	.loc 2 408 0
 	ldr	x2, [x0]
-.LVL116:
-	cbz	x2, .L109
-	.loc 2 360 0
+.LVL108:
+	cbz	x2, .L110
+	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 369 0
-	adrp	x3, .LANCHOR0+2304
+	.loc 2 413 0
+	adrp	x3, .LANCHOR0+2336
 	and	w1, w1, 65535
-	.loc 2 368 0
+	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 360 0
+	.loc 2 404 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 369 0
+	.loc 2 413 0
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR0+2304]
-.L105:
-	.loc 2 368 0
-	cbnz	w1, .L106
-.L108:
-	.loc 2 372 0
+	ldr	x19, [x3, #:lo12:.LANCHOR0+2336]
+.L106:
+	.loc 2 412 0
+	cbnz	w1, .L107
+.L109:
+	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL117:
+.LVL109:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL118:
-	.loc 2 373 0
+.LVL110:
+	.loc 2 417 0
 	mov	w1, w19
-.LVL119:
+.LVL111:
 	bl	List_remove_node
-.LVL120:
-	.loc 2 375 0
+.LVL112:
+	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 376 0
+	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL121:
+.LVL113:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1629,30 +1563,30 @@ List_pop_index_node:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL122:
-.L106:
+.LVL114:
+.L107:
 	.cfi_restore_state
-	.loc 2 368 0 discriminator 1
+	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L108
-	.loc 2 370 0
+	beq	.L109
+	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL123:
-	.loc 2 369 0
+.LVL115:
+	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-	.loc 2 370 0
+	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL124:
-	b	.L105
-.L109:
+.LVL116:
+	b	.L106
+.L110:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 29
 	.cfi_restore 30
-	.loc 2 365 0
+	.loc 2 409 0
 	mov	w0, 65535
-.LVL125:
+.LVL117:
 	ret
 	.cfi_endproc
 .LFE188:
@@ -1662,22 +1596,22 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 .LFB189:
-	.loc 2 379 0
+	.loc 2 423 0
 	.cfi_startproc
-.LVL126:
+.LVL118:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 2 380 0
+	.loc 2 424 0
 	mov	w1, 0
-	.loc 2 379 0
+	.loc 2 423 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 380 0
+	.loc 2 424 0
 	bl	List_pop_index_node
-.LVL127:
-	.loc 2 381 0
+.LVL119:
+	.loc 2 425 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1691,57 +1625,57 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 .LFB190:
-	.loc 2 384 0
+	.loc 2 428 0
 	.cfi_startproc
-.LVL128:
-	.loc 2 384 0
+.LVL120:
+	.loc 2 428 0
 	and	w2, w0, 65535
-.LVL129:
-	.loc 2 388 0
+.LVL121:
+	.loc 2 432 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x1, [x0, 2312]
-.LVL130:
-	cbz	x1, .L121
-	.loc 2 393 0
-	ldr	x3, [x0, 2304]
+	ldr	x1, [x0, 2344]
+.LVL122:
+	cbz	x1, .L122
+	.loc 2 437 0
+	ldr	x3, [x0, 2336]
 	mov	w4, 6
-	.loc 2 392 0
+	.loc 2 436 0
 	mov	w0, 65535
-.L118:
-	cbz	w2, .L119
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.L119:
+	cbz	w2, .L120
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL131:
+.LVL123:
 	cmp	w1, w0
-	bne	.L120
+	bne	.L121
 	ret
-.L120:
-	.loc 2 394 0 is_stmt 1
+.L121:
+	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL132:
-	.loc 2 393 0
+.LVL124:
+	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL133:
-	.loc 2 394 0
+.LVL125:
+	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL134:
-	b	.L118
-.L121:
-	.loc 2 389 0
+.LVL126:
+	b	.L119
+.L122:
+	.loc 2 433 0
 	mov	w0, 65535
 	ret
-.L119:
-	.loc 2 398 0
+.L120:
+	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL135:
+.LVL127:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 400 0
+	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 401 0
+	.loc 2 445 0
 	ret
 	.cfi_endproc
 .LFE190:
@@ -1751,151 +1685,169 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 .LFB191:
-	.loc 2 404 0
+	.loc 2 448 0
 	.cfi_startproc
-.LVL136:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
+.LVL128:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
 	and	w20, w0, 65535
-.LVL137:
-	.loc 2 413 0
+.LVL129:
+	.loc 2 457 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	.loc 2 404 0
+	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 2 413 0
-	ldrh	w1, [x0, 2360]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	.loc 2 457 0
+	ldrh	w1, [x0, 2400]
 	cmp	w1, w20
-	beq	.L124
-	.loc 2 413 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x0, 2408]
+	beq	.L125
+	.loc 2 457 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x0, 2448]
 	cmp	w1, w20
-	beq	.L124
-	.loc 2 413 0 discriminator 2
-	ldrh	w1, [x0, 2456]
+	beq	.L125
+	.loc 2 457 0 discriminator 2
+	ldrh	w1, [x0, 2496]
 	cmp	w1, w20
-	beq	.L124
-.LBB185:
-.LBB186:
-	.loc 2 416 0 is_stmt 1
-	mov	w1, 6
-	ldr	x3, [x0, 2304]
-	.loc 2 418 0
-	ldr	x2, [x0, 2312]
-	.loc 2 416 0
-	umull	x1, w20, w1
-	add	x22, x3, x1
-.LVL138:
-	.loc 2 418 0
-	cmp	x22, x2
-	beq	.L124
-	.loc 2 421 0
-	ldr	x4, [x0, 2320]
-	ubfiz	x2, x20, 1, 16
-	.loc 2 422 0
-	ldrh	w0, [x22, 4]
-	ldrh	w21, [x4, x2]
-	.loc 2 426 0
-	mov	w2, 65535
-	.loc 2 422 0
+	beq	.L125
+.LBB196:
+.LBB197:
+	.loc 2 460 0 is_stmt 1
+	mov	w22, 6
+	ldr	x24, [x0, 2336]
+	.loc 2 462 0
+	ldr	x1, [x0, 2344]
+	.loc 2 460 0
+	umull	x22, w20, w22
+	add	x23, x24, x22
+.LVL130:
+	.loc 2 462 0
+	cmp	x23, x1
+	beq	.L125
+	.loc 2 465 0
+	ldr	x2, [x0, 2352]
+	ubfiz	x1, x20, 1, 16
+	.loc 2 466 0
+	ldrh	w0, [x23, 4]
+	cmp	w0, 0
+	.loc 2 465 0
+	ldrh	w21, [x2, x1]
+.LVL131:
+	.loc 2 470 0
+	mov	w1, 65535
+	.loc 2 466 0
 	mul	w21, w21, w0
-.LVL139:
-	.loc 2 426 0
-	ldrh	w0, [x22, 2]
-	.loc 2 424 0
-	cmp	w21, 0
+.LVL132:
+	.loc 2 470 0
+	ldrh	w0, [x23, 2]
+	.loc 2 466 0
 	csinv	w21, w21, wzr, ne
-	.loc 2 426 0
-	cmp	w0, w2
-	bne	.L127
-	ldrh	w1, [x3, x1]
+.LVL133:
+	.loc 2 470 0
+	cmp	w0, w1
+	bne	.L128
+	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L127
+	bne	.L128
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 426
+	mov	w2, 470
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL140:
-.L127:
-	.loc 2 427 0
-	ldrh	w1, [x22, 2]
-	mov	w0, 6
-	.loc 2 429 0
+.LVL134:
+.L128:
+	.loc 2 471 0
+	ldrh	w0, [x23, 2]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L129
+	ldrh	w1, [x24, x22]
+	cmp	w1, w0
+	beq	.L125
+.L129:
+	.loc 2 473 0
+	mov	w1, 6
+	.loc 2 475 0
 	add	x22, x19, :lo12:.LANCHOR0
-.LVL141:
-	.loc 2 428 0
+	.loc 2 474 0
 	mov	x2, -6148914691236517206
+	.loc 2 473 0
+	umull	x0, w0, w1
+	.loc 2 474 0
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 427 0
-	umull	x1, w1, w0
-	.loc 2 428 0
-	asr	x0, x1, 1
-	mul	x0, x0, x2
-	.loc 2 429 0
-	ldr	x2, [x22, 2320]
-	.loc 2 430 0
-	ldrh	w0, [x2, x0, lsl 1]
-	ldr	x2, [x22, 2304]
-	add	x1, x2, x1
-	ldrh	w1, [x1, 4]
-	mul	w0, w0, w1
-.LVL142:
-	.loc 2 432 0
-	cmp	w0, 0
+	asr	x1, x0, 1
+	mul	x1, x1, x2
+	.loc 2 475 0
+	ldr	x2, [x22, 2352]
+	ldrh	w1, [x2, x1, lsl 1]
+.LVL135:
+	.loc 2 476 0
+	ldr	x2, [x22, 2336]
+	add	x0, x2, x0
+	ldrh	w2, [x0, 4]
+	cmp	w2, 0
+	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
-	.loc 2 434 0
+.LVL136:
+	.loc 2 480 0
 	cmp	w21, w0
-	bcs	.L124
-	.loc 2 435 0
+	bcs	.L125
+	.loc 2 481 0
 	mov	w1, w20
-	add	x0, x22, 2312
-.LVL143:
+.LVL137:
+	add	x0, x22, 2344
+.LVL138:
 	bl	List_remove_node
-.LVL144:
-	ldrh	w0, [x22, 2336]
-	cbnz	w0, .L129
+.LVL139:
+	ldrh	w0, [x22, 2376]
+	cbnz	w0, .L131
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 435
+	mov	w2, 481
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL145:
-.L129:
+.LVL140:
+.L131:
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x19, 2336]
+	ldrh	w0, [x19, 2376]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2336]
-	.loc 2 436 0
+	strh	w0, [x19, 2376]
+	.loc 2 482 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL146:
-.L124:
-.LBE186:
-.LBE185:
-	.loc 2 439 0
+.LVL141:
+.L125:
+.LBE197:
+.LBE196:
+	.loc 2 485 0
 	mov	w0, 0
-.LVL147:
+.LVL142:
 	ldp	x19, x20, [sp, 16]
-.LVL148:
+.LVL143:
 	ldp	x21, x22, [sp, 32]
-.LVL149:
-	ldp	x29, x30, [sp], 48
+.LVL144:
+	ldp	x23, x24, [sp, 48]
+.LVL145:
+	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 19
@@ -1906,178 +1858,84 @@ List_update_data_list:
 .LFE191:
 	.size	List_update_data_list, .-List_update_data_list
 	.align	2
-	.global	ftl_map_blk_alloc_new_blk
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-.LFB194:
-	.loc 2 516 0
-	.cfi_startproc
-.LVL150:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	mov	x4, x0
-	.loc 2 520 0
-	mov	w5, 0
-.LVL151:
-	.loc 2 516 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 520 0
-	ldrh	w1, [x0, 10]
-	ldr	x0, [x0, 16]
-.LVL152:
-.L132:
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	w5, w1
-	bne	.L135
-.L136:
-.LBB189:
-.LBB190:
-	.loc 2 532 0 is_stmt 1
-	adrp	x1, .LANCHOR1
-	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 532
-	add	x1, x1, 96
-	adrp	x0, .LC1
-	add	x0, x0, :lo12:.LC1
-	bl	printk
-.LVL153:
-	b	.L137
-.LVL154:
-.L135:
-.LBE190:
-.LBE189:
-	.loc 2 521 0
-	mov	x6, x0
-	ldrh	w2, [x0], 2
-	cbnz	w2, .L133
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL155:
-	strh	w0, [x6]
-	.loc 2 523 0
-	tst	w0, 65535
-	beq	.L134
-	.loc 2 526 0
-	ldr	w0, [x4, 48]
-	.loc 2 524 0
-	strh	wzr, [x4, 2]
-	.loc 2 526 0
-	add	w0, w0, 1
-	str	w0, [x4, 48]
-	.loc 2 527 0
-	ldrh	w0, [x4, 8]
-	.loc 2 525 0
-	strh	w5, [x4]
-	.loc 2 527 0
-	add	w0, w0, 1
-	strh	w0, [x4, 8]
-.L134:
-	.loc 2 532 0
-	ldrh	w0, [x4, 10]
-	cmp	w0, w5
-	bls	.L136
-.L137:
-	.loc 2 534 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-.L133:
-	.cfi_restore_state
-	.loc 2 520 0 discriminator 2
-	add	w5, w5, 1
-.LVL156:
-	and	w5, w5, 65535
-.LVL157:
-	b	.L132
-	.cfi_endproc
-.LFE194:
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 .LFB199:
-	.loc 2 700 0
+	.loc 2 749 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 705 0
+	.loc 2 754 0
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	x3, 0
-	.loc 2 700 0
+	.loc 2 749 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 706 0
+	.loc 2 755 0
 	mov	w4, 65535
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	w2, [x0, 118]
-	.loc 2 706 0
-	ldr	x0, [x0, 2504]
-.LVL158:
-.L143:
+	.loc 2 755 0
+	ldr	x0, [x0, 2544]
+.LVL146:
+.L136:
 	and	w19, w3, 65535
-	.loc 2 705 0 discriminator 1
+	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
-	bcc	.L145
+	bcc	.L138
 	add	x4, x0, 4
-	.loc 2 705 0 is_stmt 0
+	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
 	mov	w6, -2147483648
 	mov	w3, 0
-.L146:
-	.loc 2 715 0 is_stmt 1 discriminator 1
+.L139:
+	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w3, w2
-	bne	.L148
-	.loc 2 724 0
+	bne	.L141
+	.loc 2 773 0
 	cmp	w19, w2
-	bcc	.L144
-	.loc 2 730 0
+	bcc	.L137
+	.loc 2 779 0
 	add	x1, x1, :lo12:.LANCHOR0
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, 2512]
+	ldrh	w4, [x1, 2552]
 	mov	w1, 0
-.L149:
-	.loc 2 729 0 discriminator 1
+.L142:
+	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
-	bne	.L151
-	.loc 2 735 0
+	bne	.L144
+	.loc 2 784 0
 	cmp	w19, w1
-	bcc	.L144
-	.loc 2 735 0 is_stmt 0 discriminator 1
+	bcc	.L137
+	.loc 2 784 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 735
-	add	x1, x1, 128
+	mov	w2, 784
+	add	x1, x1, 96
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL159:
-	b	.L144
-.L145:
+.LVL147:
+	b	.L137
+.L138:
 	add	x3, x3, 1
-	.loc 2 706 0 is_stmt 1
+	.loc 2 755 0 is_stmt 1
 	add	x5, x0, x3, lsl 4
 	ldrh	w5, [x5, -16]
 	cmp	w5, w4
-	bne	.L143
-.L144:
-	.loc 2 737 0
+	bne	.L136
+.L137:
+	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
-.LVL160:
+.LVL148:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2085,39 +1943,39 @@ select_l2p_ram_region:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL161:
-.L148:
+.LVL149:
+.L141:
 	.cfi_restore_state
-	.loc 2 716 0
+	.loc 2 765 0
 	ldr	w5, [x4]
-	tbnz	w5, #31, .L147
-	.loc 2 717 0
+	tbnz	w5, #31, .L140
+	.loc 2 766 0
 	cmp	w6, w5
-	bls	.L147
+	bls	.L140
 	mov	w6, w5
 	mov	w19, w3
-.L147:
-	.loc 2 715 0 discriminator 2
+.L140:
+	.loc 2 764 0 discriminator 2
 	add	w3, w3, 1
 	add	x4, x4, 16
 	and	w3, w3, 65535
-	b	.L146
-.L151:
-	.loc 2 730 0
+	b	.L139
+.L144:
+	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L150
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L143
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L150:
-	.loc 2 729 0 is_stmt 1 discriminator 2
+.L143:
+	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L149
+	b	.L142
 	.cfi_endproc
 .LFE199:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
@@ -2126,62 +1984,62 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 .LFB205:
-	.loc 2 882 0
+	.loc 2 931 0
 	.cfi_startproc
-.LVL162:
-	.loc 2 885 0
+.LVL150:
+	.loc 2 934 0
 	adrp	x1, .LANCHOR0
 	add	x3, x1, :lo12:.LANCHOR0
-	ldrh	w2, [x3, 2514]
+	ldrh	w2, [x3, 2554]
 	cmp	w2, 4
-	bhi	.L154
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	w0, .L154
-	.loc 2 885 0
+	bhi	.L147
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L147
+	.loc 2 934 0
 	add	w2, w2, 1
-	strh	w2, [x3, 2514]
-	.loc 2 894 0 is_stmt 1
+	strh	w2, [x3, 2554]
+	.loc 2 943 0 is_stmt 1
 	ret
-.L154:
-	.loc 2 886 0
+.L147:
+	.loc 2 935 0
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL163:
-.LBB193:
-.LBB194:
-	.loc 2 890 0
+.LVL151:
+.LBB200:
+.LBB201:
+	.loc 2 939 0
 	mov	w6, 65535
 	mov	x1, 0
-	.loc 2 888 0
+	.loc 2 937 0
 	ldrh	w4, [x0, 20]
-	.loc 2 890 0
-	ldr	x5, [x0, 2320]
-.LBE194:
-.LBE193:
-	.loc 2 886 0
-	strh	wzr, [x0, 2514]
-	.loc 2 887 0
-	str	wzr, [x0, 2516]
-.L155:
-.LBB196:
-.LBB195:
-	.loc 2 888 0
+	.loc 2 939 0
+	ldr	x5, [x0, 2352]
+.LBE201:
+.LBE200:
+	.loc 2 935 0
+	strh	wzr, [x0, 2554]
+	.loc 2 936 0
+	str	wzr, [x0, 2556]
+.L148:
+.LBB203:
+.LBB202:
+	.loc 2 937 0
 	cmp	w4, w1, uxth
-	bhi	.L157
+	bhi	.L150
 	ret
-.L157:
-	.loc 2 890 0
+.L150:
+	.loc 2 939 0
 	ldrh	w3, [x5, x1, lsl 1]
 	cmp	w3, w6
-	beq	.L156
-	.loc 2 891 0
-	ldr	w2, [x0, 2516]
+	beq	.L149
+	.loc 2 940 0
+	ldr	w2, [x0, 2556]
 	add	w2, w2, w3
-	str	w2, [x0, 2516]
-.L156:
+	str	w2, [x0, 2556]
+.L149:
 	add	x1, x1, 1
-	b	.L155
-.LBE195:
-.LBE196:
+	b	.L148
+.LBE202:
+.LBE203:
 	.cfi_endproc
 .LFE205:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2190,13 +2048,13 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 .LFB211:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	.cfi_startproc
-.LVL164:
+.LVL152:
 	and	w0, w0, 65535
-	.loc 2 1348 0
-	cbz	w1, .L160
-	.loc 2 1347 0
+	.loc 2 1397 0
+	cbz	w1, .L153
+	.loc 2 1396 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -2204,28 +2062,28 @@ ftl_set_blk_mode:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	bl	ftl_set_blk_mode.part.7
-.LVL165:
-	.loc 2 1352 0
+.LVL153:
+	.loc 2 1401 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL166:
-.L160:
-	.loc 2 1351 0
+.LVL154:
+.L153:
+	.loc 2 1400 0
 	adrp	x1, .LANCHOR0
-.LVL167:
+.LVL155:
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
 	ldr	x3, [x1, #:lo12:.LANCHOR0]
 	mov	w1, 1
 	lsl	w0, w1, w0
-.LVL168:
+.LVL156:
 	ldr	w1, [x3, x2]
 	bic	w0, w1, w0
 	str	w0, [x3, x2]
-	.loc 2 1352 0
+	.loc 2 1401 0
 	ret
 	.cfi_endproc
 .LFE211:
@@ -2235,19 +2093,19 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 .LFB212:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	.cfi_startproc
-.LVL169:
-	.loc 2 1355 0
+.LVL157:
+	.loc 2 1404 0
 	and	w1, w0, 65535
-.LVL170:
-	.loc 2 1356 0
+.LVL158:
+	.loc 2 1405 0
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
 	.cfi_endproc
@@ -2258,71 +2116,71 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 .LFB218:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	.cfi_startproc
-.LVL171:
-	.loc 2 1608 0
+.LVL159:
+	.loc 2 1657 0
 	and	w6, w1, 65535
-.LVL172:
-	.loc 2 1611 0
+.LVL160:
+	.loc 2 1660 0
 	adrp	x4, .LANCHOR0
 	add	x1, x4, :lo12:.LANCHOR0
 	and	w2, w2, 65535
-.LVL173:
-	.loc 2 1610 0
+.LVL161:
+	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-	.loc 2 1611 0
+	.loc 2 1660 0
 	ldrh	w3, [x1, 12]
-	.loc 2 1613 0
+	.loc 2 1662 0
 	mov	w1, 65535
-.L168:
-	.loc 2 1611 0 discriminator 1
+.L161:
+	.loc 2 1660 0 discriminator 1
 	cmp	w3, w2, uxth
-	bhi	.L170
-	.loc 2 1622 0
+	bhi	.L163
+	.loc 2 1671 0
 	add	x4, x4, :lo12:.LANCHOR0
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
 	add	x3, x0, x3
-	.loc 2 1620 0
+	.loc 2 1669 0
 	mov	w5, 65535
 	ldrh	w1, [x4, 82]
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1622 0
+	.loc 2 1671 0
 	sub	w1, w1, w6
-.L171:
-	.loc 2 1618 0 discriminator 1
+.L164:
+	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
-	bne	.L173
-	.loc 2 1625 0
+	bne	.L166
+	.loc 2 1674 0
 	ret
-.L170:
-	.loc 2 1613 0
+.L163:
+	.loc 2 1662 0
 	add	x5, x0, x2, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w1
-	beq	.L169
-	.loc 2 1615 0
+	beq	.L162
+	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L169:
+.L162:
 	add	w2, w2, 1
-	b	.L168
-.L173:
-	.loc 2 1620 0
+	b	.L161
+.L166:
+	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L172
-	.loc 2 1622 0
+	beq	.L165
+	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L172:
+.L165:
 	add	x2, x2, 2
-	b	.L171
+	b	.L164
 	.cfi_endproc
 .LFE218:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -2331,58 +2189,58 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 .LFB221:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	.cfi_startproc
-.LVL174:
-	.loc 2 2016 0
+.LVL162:
+	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L174
-	.loc 2 2018 0
+	cbz	w1, .L167
+	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L174
-.LBB199:
-.LBB200:
-	.loc 2 2020 0
+	beq	.L167
+.LBB206:
+.LBB207:
+	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL175:
-	.loc 2 2023 0
+.LVL163:
+	.loc 2 2072 0
 	adrp	x2, .LANCHOR0+12
 	ldrh	w4, [x2, #:lo12:.LANCHOR0+12]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	w2, w1
-.L177:
+.L170:
 	cmp	w3, w2
-	beq	.L179
-.L174:
+	beq	.L172
+.L167:
 	ret
-.L179:
-	.loc 2 2022 0
+.L172:
+	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	w1, w4
-	bne	.L178
-	.loc 2 2024 0
+	bne	.L171
+	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L178:
-	.loc 2 2027 0
+.L171:
+	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L177
-.LBE200:
-.LBE199:
+	b	.L170
+.LBE207:
+.LBE206:
 	.cfi_endproc
 .LFE221:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2391,9 +2249,9 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 .LFB223:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	.cfi_startproc
-.LVL176:
+.LVL164:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -2403,57 +2261,57 @@ make_superblock:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 2045 0
+	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2048 0
+	.loc 2 2097 0
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL177:
+.LVL165:
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, 20]
 	cmp	w1, w0
-	bcc	.L181
-	.loc 2 2048 0 is_stmt 0 discriminator 1
+	bcc	.L174
+	.loc 2 2097 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2048
-	add	x1, x1, 152
+	mov	w2, 2097
+	add	x1, x1, 120
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL178:
-.L181:
-	.loc 2 2051 0 is_stmt 1
+.LVL166:
+.L174:
+	.loc 2 2100 0 is_stmt 1
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x6, x19, 16
-	.loc 2 2052 0
+	.loc 2 2101 0
 	add	x7, x0, 40
-	.loc 2 2049 0
+	.loc 2 2098 0
 	strh	wzr, [x19, 4]
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-	.loc 2 2051 0
+	.loc 2 2100 0
 	mov	x5, 0
 	ldrh	w8, [x0, 12]
-	.loc 2 2053 0
+	.loc 2 2102 0
 	mov	w9, -1
-.L182:
-	.loc 2 2051 0 discriminator 1
+.L175:
+	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L184
-	.loc 2 2061 0
+	bhi	.L177
+	.loc 2 2110 0
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x20, 82]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2062 0
+	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL179:
+.LVL167:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2462,31 +2320,31 @@ make_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL180:
-.L184:
+.LVL168:
+.L177:
 	.cfi_restore_state
-	.loc 2 2052 0
+	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL181:
+.LVL169:
 	mov	w4, w0
-	.loc 2 2053 0
+	.loc 2 2102 0
 	strh	w9, [x6]
-	.loc 2 2054 0
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL182:
-	cbnz	w0, .L183
-	.loc 2 2055 0
+.LVL170:
+	cbnz	w0, .L176
+	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L183:
+.L176:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L182
+	b	.L175
 	.cfi_endproc
 .LFE223:
 	.size	make_superblock, .-make_superblock
@@ -2495,101 +2353,101 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 .LFB232:
-	.loc 2 2401 0
+	.loc 2 2451 0
 	.cfi_startproc
-.LVL183:
+.LVL171:
 	and	w8, w0, 65535
-.LVL184:
-	.loc 2 2405 0
+.LVL172:
+	.loc 2 2455 0
 	adrp	x0, .LANCHOR0
 	add	x1, x0, :lo12:.LANCHOR0
 	mov	x9, 0
-	.loc 2 2403 0
+	.loc 2 2453 0
 	mov	w6, 0
 	mov	x5, x0
-	.loc 2 2406 0
+	.loc 2 2456 0
 	add	x7, x1, 40
-	.loc 2 2405 0
+	.loc 2 2455 0
 	ldrh	w10, [x1, 12]
-	.loc 2 2408 0
+	.loc 2 2458 0
 	ldrh	w11, [x1, 82]
-	.loc 2 2405 0
+	.loc 2 2455 0
 	cmp	w10, w9, uxth
-	bhi	.L198
-	.loc 2 2410 0
-	cbz	w6, .L196
-	.loc 2 2411 0
+	bhi	.L191
+	.loc 2 2460 0
+	cbz	w6, .L189
+	.loc 2 2461 0
 	mov	w0, 32768
 	sdiv	w6, w0, w6
-.L197:
-	.loc 2 2412 0
+.L190:
+	.loc 2 2462 0
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
-	ldr	x0, [x0, 2304]
+	ldr	x0, [x0, 2336]
 	umaddl	x8, w8, w1, x0
-.LVL185:
-	.loc 2 2414 0
+.LVL173:
+	.loc 2 2464 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2462 0
 	strh	w6, [x8, 4]
-	.loc 2 2414 0
+	.loc 2 2464 0
 	ret
-.LVL186:
-.L191:
+.LVL174:
+.L184:
 	.cfi_def_cfa 29, 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	mov	w6, 0
-	b	.L190
-.L196:
+	b	.L183
+.L189:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 29
 	.cfi_restore 30
 	mov	w6, 0
-	b	.L197
-.L198:
-	.loc 2 2401 0
+	b	.L190
+.L191:
+	.loc 2 2451 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.L189:
-	.loc 2 2406 0
+.L182:
+	.loc 2 2456 0
 	ldrb	w0, [x7, x9]
 	mov	w1, w8
 	bl	V2P_block
-.LVL187:
-	.loc 2 2407 0
+.LVL175:
+	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL188:
-	cbnz	w0, .L188
-	.loc 2 2408 0
+.LVL176:
+	cbnz	w0, .L181
+	.loc 2 2458 0
 	add	w6, w6, w11
 	and	w6, w6, 65535
-.L188:
+.L181:
 	add	x9, x9, 1
-	.loc 2 2405 0 discriminator 2
+	.loc 2 2455 0 discriminator 2
 	cmp	w10, w9, uxth
-	bhi	.L189
-	.loc 2 2410 0
-	cbz	w6, .L191
-	.loc 2 2411 0
+	bhi	.L182
+	.loc 2 2460 0
+	cbz	w6, .L184
+	.loc 2 2461 0
 	mov	w0, 32768
 	sdiv	w6, w0, w6
-.L190:
-	.loc 2 2412 0
+.L183:
+	.loc 2 2462 0
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
-	ldr	x0, [x0, 2304]
+	ldr	x0, [x0, 2336]
 	umaddl	x8, w8, w1, x0
-.LVL189:
-	.loc 2 2414 0
+.LVL177:
+	.loc 2 2464 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2462 0
 	strh	w6, [x8, 4]
-	.loc 2 2414 0
+	.loc 2 2464 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -2603,16 +2461,16 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 .LFB233:
-	.loc 2 2417 0
+	.loc 2 2467 0
 	.cfi_startproc
-	.loc 2 2420 0
+	.loc 2 2470 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldr	x0, [x1, 2344]
-	cbz	x0, .L201
-	.loc 2 2421 0
-	ldr	x2, [x1, 2304]
-	ldr	x1, [x1, 2296]
+	ldr	x0, [x1, 2384]
+	cbz	x0, .L194
+	.loc 2 2471 0
+	ldr	x2, [x1, 2336]
+	ldr	x1, [x1, 2360]
 	sub	x0, x0, x2
 	mov	x2, -6148914691236517206
 	asr	x0, x0, 1
@@ -2620,15 +2478,15 @@ GetFreeBlockMinEraseCount:
 	mul	x0, x0, x2
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL190:
-.LVL191:
+.LVL178:
+.LVL179:
 	ret
-.L201:
-	.loc 2 2418 0
+.L194:
+	.loc 2 2468 0
 	mov	w0, 0
-.LVL192:
-.LVL193:
-	.loc 2 2423 0
+.LVL180:
+.LVL181:
+	.loc 2 2473 0
 	ret
 	.cfi_endproc
 .LFE233:
@@ -2638,80 +2496,80 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 .LFB234:
-	.loc 2 2426 0
+	.loc 2 2476 0
 	.cfi_startproc
-.LVL194:
-	.loc 2 2431 0
+.LVL182:
+	.loc 2 2481 0
 	adrp	x2, .LANCHOR0
 	add	x4, x2, :lo12:.LANCHOR0
-	.loc 2 2426 0
+	.loc 2 2476 0
 	and	w0, w0, 65535
-	.loc 2 2431 0
-	ldr	x1, [x4, 2344]
-	cbz	x1, .L209
-	.loc 2 2432 0
-	ldrh	w3, [x4, 2352]
+	.loc 2 2481 0
+	ldr	x1, [x4, 2384]
+	cbz	x1, .L202
+	.loc 2 2482 0
+	ldrh	w3, [x4, 2392]
 	mov	w5, 7
-	.loc 2 2434 0
-	ldr	x4, [x4, 2304]
-	.loc 2 2436 0
+	.loc 2 2484 0
+	ldr	x4, [x4, 2336]
+	.loc 2 2486 0
 	mov	w6, 6
 	mov	w7, 65535
-	.loc 2 2434 0
+	.loc 2 2484 0
 	sub	x1, x1, x4
-	.loc 2 2432 0
+	.loc 2 2482 0
 	mul	w3, w3, w5
-	.loc 2 2434 0
+	.loc 2 2484 0
 	asr	x1, x1, 1
-	.loc 2 2432 0
+	.loc 2 2482 0
 	asr	w3, w3, 3
-	.loc 2 2433 0
+	.loc 2 2483 0
 	cmp	w0, w3
 	csel	w0, w3, w0, gt
-	.loc 2 2434 0
+	.loc 2 2484 0
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	mul	x1, x1, x3
-	.loc 2 2435 0
+	.loc 2 2485 0
 	mov	w3, 0
-.LVL195:
-	.loc 2 2434 0
+.LVL183:
+	.loc 2 2484 0
 	and	w1, w1, 65535
-.L205:
-	.loc 2 2435 0 discriminator 1
+.L198:
+	.loc 2 2485 0 discriminator 1
 	cmp	w0, w3
-	beq	.L208
-	.loc 2 2436 0
+	beq	.L201
+	.loc 2 2486 0
 	umull	x5, w1, w6
 	ldrh	w5, [x4, x5]
 	cmp	w5, w7
-	bne	.L206
-.L208:
-	.loc 2 2440 0
+	bne	.L199
+.L201:
+	.loc 2 2490 0
 	add	x2, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x2, 2296]
-.LVL196:
+	ldr	x0, [x2, 2360]
+.LVL184:
 	ldrh	w0, [x0, x1]
-.LVL197:
-.LVL198:
+.LVL185:
+.LVL186:
 	ret
-.LVL199:
-.L206:
-	.loc 2 2435 0 discriminator 2
+.LVL187:
+.L199:
+	.loc 2 2485 0 discriminator 2
 	add	w3, w3, 1
-.LVL200:
+.LVL188:
 	mov	w1, w5
 	and	w3, w3, 65535
-.LVL201:
-	b	.L205
-.LVL202:
-.L209:
-	.loc 2 2427 0
+.LVL189:
+	b	.L198
+.LVL190:
+.L202:
+	.loc 2 2477 0
 	mov	w0, 0
-.LVL203:
-.LVL204:
-	.loc 2 2443 0
+.LVL191:
+.LVL192:
+	.loc 2 2493 0
 	ret
 	.cfi_endproc
 .LFE234:
@@ -2723,7 +2581,7 @@ FtlPrintInfo2buf:
 .LFB139:
 	.loc 3 11 0
 	.cfi_startproc
-.LVL205:
+.LVL193:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -2741,7 +2599,7 @@ FtlPrintInfo2buf:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 3 17 0
+	.loc 3 16 0
 	adrp	x23, .LANCHOR0
 	add	x21, x23, :lo12:.LANCHOR0
 	.loc 3 11 0
@@ -2758,551 +2616,551 @@ FtlPrintInfo2buf:
 	.cfi_offset 27, -16
 	.loc 3 15 0
 	bl	strcpy
-.LVL206:
-	.loc 3 17 0
+.LVL194:
+	.loc 3 16 0
 	ldr	w2, [x21, 96]
 	mov	x0, x20
 	adrp	x1, .LC3
 	add	x1, x1, :lo12:.LC3
 	bl	sprintf
-.LVL207:
+.LVL195:
 	add	x20, x20, x0, sxtw
-	.loc 3 18 0
+	.loc 3 17 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	strcpy
-.LVL208:
-	.loc 3 19 0
-	ldr	w2, [x21, 2520]
+.LVL196:
 	.loc 3 18 0
+	ldr	w2, [x21, 2560]
+	.loc 3 17 0
 	add	x20, x20, 10
-	.loc 3 19 0
+	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
 	bl	sprintf
-.LVL209:
+.LVL197:
 	add	x20, x20, x0, sxtw
-	.loc 3 20 0
-	ldr	w2, [x21, 2516]
+	.loc 3 19 0
+	ldr	w2, [x21, 2556]
 	mov	x0, x20
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
 	bl	sprintf
-.LVL210:
+.LVL198:
 	add	x20, x20, x0, sxtw
-	.loc 3 21 0
-	ldr	w2, [x21, 2524]
+	.loc 3 20 0
+	ldr	w2, [x21, 2564]
 	mov	x0, x20
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
 	bl	sprintf
-.LVL211:
+.LVL199:
 	add	x20, x20, x0, sxtw
-	.loc 3 22 0
-	ldr	w2, [x21, 2528]
+	.loc 3 21 0
+	ldr	w2, [x21, 2568]
 	mov	x0, x20
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
 	bl	sprintf
-.LVL212:
+.LVL200:
 	add	x20, x20, x0, sxtw
-	.loc 3 23 0
-	ldr	w2, [x21, 2532]
+	.loc 3 22 0
+	ldr	w2, [x21, 2572]
 	mov	x0, x20
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
 	bl	sprintf
-.LVL213:
+.LVL201:
 	add	x20, x20, x0, sxtw
-	.loc 3 24 0
-	ldr	w2, [x21, 2536]
+	.loc 3 23 0
+	ldr	w2, [x21, 2576]
 	mov	x0, x20
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
 	bl	sprintf
-.LVL214:
+.LVL202:
 	add	x20, x20, x0, sxtw
-	.loc 3 25 0
-	ldr	w2, [x21, 2540]
+	.loc 3 24 0
+	ldr	w2, [x21, 2580]
 	mov	x0, x20
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
 	bl	sprintf
-.LVL215:
+.LVL203:
 	add	x20, x20, x0, sxtw
-	.loc 3 26 0
-	ldr	w2, [x21, 2544]
+	.loc 3 25 0
+	ldr	w2, [x21, 2584]
 	mov	x0, x20
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
 	bl	sprintf
-.LVL216:
+.LVL204:
 	add	x20, x20, x0, sxtw
-	.loc 3 27 0
-	ldr	w2, [x21, 2548]
+	.loc 3 26 0
+	ldr	w2, [x21, 2588]
 	mov	x0, x20
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL217:
-	.loc 3 28 0
-	ldr	w2, [x21, 2552]
+.LVL205:
 	.loc 3 27 0
+	ldr	w2, [x21, 2592]
+	.loc 3 26 0
 	add	x20, x20, x0, sxtw
-	.loc 3 28 0
+	.loc 3 27 0
 	mov	x0, x20
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL218:
-	.loc 3 29 0
-	ldr	w2, [x21, 2556]
+.LVL206:
 	.loc 3 28 0
+	ldr	w2, [x21, 2596]
+	.loc 3 27 0
 	add	x20, x20, x0, sxtw
-	.loc 3 29 0
+	.loc 3 28 0
 	mov	x0, x20
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
 	bl	sprintf
-.LVL219:
+.LVL207:
 	add	x20, x20, x0, sxtw
-	.loc 3 30 0
-	ldr	w2, [x21, 2560]
+	.loc 3 29 0
+	ldr	w2, [x21, 2600]
 	mov	x0, x20
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
 	bl	sprintf
-.LVL220:
+.LVL208:
 	add	x20, x20, x0, sxtw
-	.loc 3 31 0
+	.loc 3 30 0
 	ldrh	w2, [x21, 142]
 	mov	x0, x20
 	adrp	x1, .LC17
 	add	x1, x1, :lo12:.LC17
 	bl	sprintf
-.LVL221:
+.LVL209:
 	add	x20, x20, x0, sxtw
-	.loc 3 32 0
-	ldrh	w2, [x21, 2352]
+	.loc 3 31 0
+	ldrh	w2, [x21, 2392]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL222:
+.LVL210:
 	add	x20, x20, x0, sxtw
-	.loc 3 33 0
-	ldr	w2, [x21, 2564]
+	.loc 3 32 0
+	ldr	w2, [x21, 2604]
 	mov	x0, x20
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
 	bl	sprintf
-.LVL223:
+.LVL211:
 	add	x20, x20, x0, sxtw
-	.loc 3 34 0
-	ldr	w2, [x21, 2568]
+	.loc 3 33 0
+	ldr	w2, [x21, 2608]
 	mov	x0, x20
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
 	bl	sprintf
-.LVL224:
+.LVL212:
 	add	x20, x20, x0, sxtw
-	.loc 3 35 0
-	ldr	w2, [x21, 2572]
+	.loc 3 34 0
+	ldr	w2, [x21, 2612]
 	mov	x0, x20
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
 	bl	sprintf
-.LVL225:
+.LVL213:
 	add	x20, x20, x0, sxtw
-	.loc 3 36 0
-	ldr	w2, [x21, 2576]
+	.loc 3 35 0
+	ldr	w2, [x21, 2616]
 	mov	x0, x20
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
 	bl	sprintf
-.LVL226:
+.LVL214:
 	add	x20, x20, x0, sxtw
-	.loc 3 37 0
-	ldr	w2, [x21, 2580]
+	.loc 3 36 0
+	ldr	w2, [x21, 2620]
 	mov	x0, x20
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
 	bl	sprintf
-.LVL227:
+.LVL215:
 	add	x20, x20, x0, sxtw
-	.loc 3 38 0
-	ldr	w2, [x21, 2584]
+	.loc 3 37 0
+	ldr	w2, [x21, 2624]
 	mov	x0, x20
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
 	bl	sprintf
-.LVL228:
+.LVL216:
 	add	x20, x20, x0, sxtw
-	.loc 3 39 0
-	ldrh	w2, [x21, 2622]
+	.loc 3 38 0
+	ldrh	w2, [x21, 2318]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL229:
+.LVL217:
 	add	x20, x20, x0, sxtw
-	.loc 3 40 0
-	ldrh	w2, [x21, 2620]
+	.loc 3 39 0
+	ldrh	w2, [x21, 2316]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
 	bl	sprintf
-.LVL230:
+.LVL218:
 	add	x20, x20, x0, sxtw
-	.loc 3 41 0
+	.loc 3 40 0
 	ldr	w2, [x21, 120]
 	mov	x0, x20
 	adrp	x1, .LC27
 	add	x1, x1, :lo12:.LC27
 	bl	sprintf
-.LVL231:
+.LVL219:
 	add	x20, x20, x0, sxtw
-	.loc 3 42 0
+	.loc 3 41 0
 	ldr	w2, [x21, 112]
 	mov	x0, x20
 	adrp	x1, .LC28
 	add	x1, x1, :lo12:.LC28
 	bl	sprintf
-.LVL232:
+.LVL220:
 	add	x20, x20, x0, sxtw
-	.loc 3 43 0
+	.loc 3 42 0
 	ldr	w2, [x21, 8]
 	mov	x0, x20
 	adrp	x1, .LC29
 	add	x1, x1, :lo12:.LC29
 	bl	sprintf
-.LVL233:
+.LVL221:
 	add	x20, x20, x0, sxtw
-	.loc 3 44 0
+	.loc 3 43 0
 	ldrh	w2, [x21, 238]
 	mov	x0, x20
 	adrp	x1, .LC30
 	add	x1, x1, :lo12:.LC30
 	bl	sprintf
-.LVL234:
+.LVL222:
 	add	x20, x20, x0, sxtw
-	.loc 3 45 0
+	.loc 3 44 0
 	ldrh	w2, [x21, 20]
 	mov	x0, x20
 	adrp	x1, .LC31
 	add	x1, x1, :lo12:.LC31
 	bl	sprintf
-.LVL235:
+.LVL223:
 	add	x20, x20, x0, sxtw
-	.loc 3 46 0
-	ldrh	w2, [x21, 2640]
+	.loc 3 45 0
+	ldrh	w2, [x21, 2628]
 	mov	x0, x20
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
 	bl	sprintf
-.LVL236:
+.LVL224:
 	add	x20, x20, x0, sxtw
-	.loc 3 47 0
+	.loc 3 46 0
 	ldr	w2, [x21, 24]
 	mov	x0, x20
 	adrp	x1, .LC33
 	add	x1, x1, :lo12:.LC33
 	bl	sprintf
-.LVL237:
+.LVL225:
 	add	x20, x20, x0, sxtw
-	.loc 3 48 0
-	ldrh	w2, [x21, 2648]
+	.loc 3 47 0
+	ldrh	w2, [x21, 2632]
 	mov	x0, x20
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
 	bl	sprintf
-.LVL238:
+.LVL226:
 	add	x20, x20, x0, sxtw
-	.loc 3 49 0
+	.loc 3 48 0
 	ldrh	w2, [x21, 136]
 	mov	x0, x20
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL239:
+.LVL227:
 	add	x20, x20, x0, sxtw
-	.loc 3 50 0
-	ldrh	w2, [x21, 2362]
+	.loc 3 49 0
+	ldrh	w2, [x21, 2402]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL240:
+.LVL228:
 	add	x20, x20, x0, sxtw
-	.loc 3 51 0
-	ldrb	w2, [x21, 2366]
+	.loc 3 50 0
+	ldrb	w2, [x21, 2406]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL241:
+.LVL229:
 	add	x20, x20, x0, sxtw
-	.loc 3 52 0
-	ldrh	w2, [x21, 2360]
+	.loc 3 51 0
+	ldrh	w2, [x21, 2400]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL242:
+.LVL230:
 	add	x20, x20, x0, sxtw
-	.loc 3 53 0
-	ldrb	w2, [x21, 2368]
+	.loc 3 52 0
+	ldrb	w2, [x21, 2408]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL243:
+.LVL231:
 	add	x20, x20, x0, sxtw
-	.loc 3 54 0
-	ldrh	w2, [x21, 2364]
+	.loc 3 53 0
+	ldrh	w2, [x21, 2404]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL244:
+.LVL232:
 	add	x20, x20, x0, sxtw
-	.loc 3 55 0
-	ldrh	w1, [x21, 2360]
-	ldr	x0, [x21, 2320]
+	.loc 3 54 0
+	ldrh	w1, [x21, 2400]
+	ldr	x0, [x21, 2352]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL245:
+.LVL233:
 	add	x20, x20, x0, sxtw
-	.loc 3 56 0
-	ldrh	w2, [x21, 2410]
+	.loc 3 55 0
+	ldrh	w2, [x21, 2450]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL246:
+.LVL234:
 	add	x20, x20, x0, sxtw
-	.loc 3 57 0
-	ldrb	w2, [x21, 2414]
+	.loc 3 56 0
+	ldrb	w2, [x21, 2454]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL247:
+.LVL235:
 	add	x20, x20, x0, sxtw
-	.loc 3 58 0
-	ldrh	w2, [x21, 2408]
+	.loc 3 57 0
+	ldrh	w2, [x21, 2448]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL248:
+.LVL236:
 	add	x20, x20, x0, sxtw
-	.loc 3 59 0
-	ldrb	w2, [x21, 2416]
+	.loc 3 58 0
+	ldrb	w2, [x21, 2456]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL249:
+.LVL237:
 	add	x20, x20, x0, sxtw
-	.loc 3 60 0
-	ldrh	w2, [x21, 2412]
+	.loc 3 59 0
+	ldrh	w2, [x21, 2452]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL250:
+.LVL238:
 	add	x20, x20, x0, sxtw
-	.loc 3 61 0
-	ldrh	w1, [x21, 2408]
-	ldr	x0, [x21, 2320]
+	.loc 3 60 0
+	ldrh	w1, [x21, 2448]
+	ldr	x0, [x21, 2352]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL251:
+.LVL239:
 	add	x20, x20, x0, sxtw
-	.loc 3 62 0
-	ldrh	w2, [x21, 2458]
+	.loc 3 61 0
+	ldrh	w2, [x21, 2498]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL252:
+.LVL240:
 	add	x20, x20, x0, sxtw
-	.loc 3 63 0
-	ldrb	w2, [x21, 2462]
+	.loc 3 62 0
+	ldrb	w2, [x21, 2502]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL253:
+.LVL241:
 	add	x20, x20, x0, sxtw
-	.loc 3 64 0
-	ldrh	w2, [x21, 2456]
+	.loc 3 63 0
+	ldrh	w2, [x21, 2496]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
 	bl	sprintf
-.LVL254:
+.LVL242:
 	add	x20, x20, x0, sxtw
-	.loc 3 65 0
-	ldrb	w2, [x21, 2464]
+	.loc 3 64 0
+	ldrb	w2, [x21, 2504]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL255:
+.LVL243:
 	add	x20, x20, x0, sxtw
-	.loc 3 66 0
-	ldrh	w2, [x21, 2460]
+	.loc 3 65 0
+	ldrh	w2, [x21, 2500]
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL256:
+.LVL244:
 	add	x20, x20, x0, sxtw
-	.loc 3 67 0
-	ldrh	w2, [x21, 2666]
+	.loc 3 66 0
+	ldrh	w2, [x21, 2650]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL257:
+.LVL245:
 	add	x20, x20, x0, sxtw
-	.loc 3 68 0
-	ldrb	w2, [x21, 2670]
+	.loc 3 67 0
+	ldrb	w2, [x21, 2654]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL258:
+.LVL246:
 	add	x20, x20, x0, sxtw
-	.loc 3 69 0
-	ldrh	w2, [x21, 2664]
+	.loc 3 68 0
+	ldrh	w2, [x21, 2648]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL259:
+.LVL247:
 	add	x20, x20, x0, sxtw
-	.loc 3 70 0
-	ldrb	w2, [x21, 2672]
+	.loc 3 69 0
+	ldrb	w2, [x21, 2656]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL260:
+.LVL248:
 	add	x20, x20, x0, sxtw
-	.loc 3 71 0
-	ldrh	w2, [x21, 2668]
+	.loc 3 70 0
+	ldrh	w2, [x21, 2652]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL261:
+.LVL249:
 	add	x20, x20, x0, sxtw
-	.loc 3 72 0
-	ldr	w4, [x21, 2788]
+	.loc 3 71 0
+	ldr	w4, [x21, 2772]
 	adrp	x1, .LC58
-	ldr	w3, [x21, 2796]
+	ldr	w3, [x21, 2780]
 	add	x1, x1, :lo12:.LC58
-	ldr	w2, [x21, 2792]
+	ldr	w2, [x21, 2776]
 	mov	x0, x20
 	bl	sprintf
-.LVL262:
+.LVL250:
 	add	x19, x20, x0, sxtw
-	.loc 3 73 0
-	ldr	w2, [x21, 2784]
+	.loc 3 72 0
+	ldr	w2, [x21, 2768]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL263:
+.LVL251:
 	add	x19, x19, x0, sxtw
-	.loc 3 74 0
-	ldr	w2, [x21, 2808]
+	.loc 3 73 0
+	ldr	w2, [x21, 2792]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL264:
+.LVL252:
 	add	x19, x19, x0, sxtw
-	.loc 3 75 0
-	ldrh	w2, [x21, 3224]
+	.loc 3 74 0
+	ldrh	w2, [x21, 3208]
 	mov	x0, x19
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
 	bl	sprintf
-.LVL265:
+.LVL253:
 	add	x19, x19, x0, sxtw
-	.loc 3 76 0
-	ldrh	w2, [x21, 3226]
+	.loc 3 75 0
+	ldrh	w2, [x21, 3210]
 	mov	x0, x19
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
 	bl	sprintf
-.LVL266:
+.LVL254:
 	add	x19, x19, x0, sxtw
-	.loc 3 77 0
-	ldr	w2, [x21, 3228]
+	.loc 3 76 0
+	ldr	w2, [x21, 3212]
 	mov	x0, x19
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
 	bl	sprintf
-.LVL267:
+.LVL255:
 	add	x19, x19, x0, sxtw
-	.loc 3 78 0
-	ldrh	w2, [x21, 3232]
+	.loc 3 77 0
+	ldrh	w2, [x21, 3216]
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
 	mov	x0, x19
 	bl	sprintf
-.LVL268:
+.LVL256:
 	add	x19, x19, x0, sxtw
-	.loc 3 79 0
+	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
-.LVL269:
+.LVL257:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL270:
+.LVL258:
 	add	x19, x19, x0, sxtw
-	.loc 3 80 0
-	ldrh	w0, [x21, 2352]
+	.loc 3 79 0
+	ldrh	w0, [x21, 2392]
 	bl	GetFreeBlockMaxEraseCount
-.LVL271:
+.LVL259:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL272:
+.LVL260:
 	add	x19, x19, x0, sxtw
-	.loc 3 81 0
+	.loc 3 80 0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	beq	.L211
-.LVL273:
-.L216:
-	.loc 3 104 0
+	beq	.L204
+.LVL261:
+.L209:
+	.loc 3 103 0
 	sub	w0, w19, w22
-	.loc 3 105 0
+	.loc 3 104 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL274:
+.LVL262:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -3320,111 +3178,111 @@ FtlPrintInfo2buf:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL275:
-.L211:
+.LVL263:
+.L204:
 	.cfi_restore_state
-	.loc 3 84 0
-	ldrh	w0, [x21, 2664]
+	.loc 3 83 0
+	ldrh	w0, [x21, 2648]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L213
-	.loc 3 85 0
-	ldr	x1, [x21, 2320]
+	beq	.L206
+	.loc 3 84 0
+	ldr	x1, [x21, 2352]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
 	mov	x0, x19
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL276:
+.LVL264:
 	add	x19, x19, x0, sxtw
-.L213:
-.LBB201:
-	.loc 3 87 0
+.L206:
+.LBB208:
+	.loc 3 86 0
 	mov	w0, 0
-	.loc 3 91 0
+	.loc 3 90 0
 	adrp	x24, .LC68
-	.loc 3 87 0
+	.loc 3 86 0
 	bl	List_get_gc_head_node
-.LVL277:
-	.loc 3 91 0
+.LVL265:
+	.loc 3 90 0
 	add	x21, x23, :lo12:.LANCHOR0
-	.loc 3 87 0
+	.loc 3 86 0
 	and	w3, w0, 65535
-.LVL278:
-	.loc 3 91 0
+.LVL266:
+	.loc 3 90 0
 	add	x24, x24, :lo12:.LC68
-	.loc 3 88 0
+	.loc 3 87 0
 	mov	w20, 0
-	.loc 3 89 0
+	.loc 3 88 0
 	mov	w27, 65535
-	.loc 3 91 0
+	.loc 3 90 0
 	mov	w26, 6
-.L215:
-	.loc 3 89 0
+.L208:
+	.loc 3 88 0
 	cmp	w3, w27
-	beq	.L214
-	.loc 3 91 0 discriminator 2
+	beq	.L207
+	.loc 3 90 0 discriminator 2
 	umull	x25, w3, w26
-	ldr	x0, [x21, 2304]
-	ldr	x4, [x21, 2296]
+	ldr	x0, [x21, 2336]
+	ldr	x2, [x21, 2352]
 	ubfiz	x1, x3, 1, 16
-	ldr	x2, [x21, 2320]
+	ldr	x4, [x21, 2360]
 	add	x0, x0, x25
-	ldrh	w6, [x4, x1]
 	ldrh	w5, [x0, 4]
 	mov	x0, x19
+	ldrh	w6, [x4, x1]
 	ldrh	w4, [x2, x1]
 	mov	w2, w20
 	mov	x1, x24
-	.loc 3 88 0 discriminator 2
+	.loc 3 87 0 discriminator 2
 	add	w20, w20, 1
-	.loc 3 91 0 discriminator 2
+	.loc 3 90 0 discriminator 2
 	bl	sprintf
-.LVL279:
+.LVL267:
 	add	x19, x19, x0, sxtw
-	.loc 3 92 0 discriminator 2
-	ldr	x0, [x21, 2304]
-	.loc 3 88 0 discriminator 2
+	.loc 3 91 0 discriminator 2
+	ldr	x0, [x21, 2336]
+	.loc 3 87 0 discriminator 2
 	cmp	w20, 16
-	.loc 3 92 0 discriminator 2
+	.loc 3 91 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL280:
-	.loc 3 88 0 discriminator 2
-	bne	.L215
-.L214:
-.LBE201:
-.LBB202:
-	.loc 3 96 0
+.LVL268:
+	.loc 3 87 0 discriminator 2
+	bne	.L208
+.L207:
+.LBE208:
+.LBB209:
+	.loc 3 95 0
 	add	x23, x23, :lo12:.LANCHOR0
-	.loc 3 100 0
+	.loc 3 99 0
 	adrp	x21, .LC69
 	add	x21, x21, :lo12:.LC69
-	.loc 3 97 0
+	.loc 3 96 0
 	mov	w20, 0
-	.loc 3 98 0
+	.loc 3 97 0
 	mov	w25, 65535
-	.loc 3 100 0
+	.loc 3 99 0
 	mov	w26, 6
-	.loc 3 96 0
-	ldr	x0, [x23, 2304]
-	ldr	x3, [x23, 2344]
-.LVL281:
+	.loc 3 95 0
+	ldr	x0, [x23, 2336]
+	ldr	x3, [x23, 2384]
+.LVL269:
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
 	asr	x3, x3, 1
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL282:
-.L217:
-	.loc 3 98 0
+.LVL270:
+.L210:
+	.loc 3 97 0
 	cmp	w3, w25
-	beq	.L216
-	.loc 3 100 0 discriminator 2
+	beq	.L209
+	.loc 3 99 0 discriminator 2
 	umull	x24, w3, w26
-	ldr	x0, [x23, 2304]
-	ldr	x2, [x23, 2296]
+	ldr	x0, [x23, 2336]
+	ldr	x2, [x23, 2360]
 	ubfiz	x1, x3, 1, 16
 	add	x0, x0, x24
 	ldrh	w5, [x2, x1]
@@ -3432,21 +3290,21 @@ FtlPrintInfo2buf:
 	ldrh	w4, [x0, 4]
 	mov	x1, x21
 	mov	x0, x19
-	.loc 3 97 0 discriminator 2
+	.loc 3 96 0 discriminator 2
 	add	w20, w20, 1
-	.loc 3 100 0 discriminator 2
+	.loc 3 99 0 discriminator 2
 	bl	sprintf
-.LVL283:
+.LVL271:
 	add	x19, x19, x0, sxtw
-	.loc 3 97 0 discriminator 2
+	.loc 3 96 0 discriminator 2
 	cmp	w20, 4
-	beq	.L216
-	.loc 3 101 0
-	ldr	x0, [x23, 2304]
+	beq	.L209
+	.loc 3 100 0
+	ldr	x0, [x23, 2336]
 	ldrh	w3, [x0, x24]
-.LVL284:
-	b	.L217
-.LBE202:
+.LVL272:
+	b	.L210
+.LBE209:
 	.cfi_endproc
 .LFE139:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -3455,41 +3313,41 @@ FtlPrintInfo2buf:
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
 .LFB140:
-	.loc 3 114 0
+	.loc 3 113 0
 	.cfi_startproc
-.LVL285:
+.LVL273:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 3 120 0
+	.loc 3 119 0
 	adrp	x2, .LC70
 	adrp	x1, .LC71
 	add	x2, x2, :lo12:.LC70
-	.loc 3 114 0
+	.loc 3 113 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 120 0
+	.loc 3 119 0
 	add	x1, x1, :lo12:.LC71
-	.loc 3 114 0
+	.loc 3 113 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 3 114 0
+	.loc 3 113 0
 	mov	x20, x0
-	.loc 3 120 0
+	.loc 3 119 0
 	bl	sprintf
-.LVL286:
+.LVL274:
 	add	x19, x20, x0, sxtw
-	.loc 3 122 0
+	.loc 3 121 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL287:
+.LVL275:
 	add	x0, x19, x0, sxtw
-	.loc 3 124 0
+	.loc 3 123 0
 	sub	w0, w0, w20
 	ldp	x19, x20, [sp, 16]
-.LVL288:
+.LVL276:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -3505,71 +3363,71 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 .LFB235:
-	.loc 2 2447 0
+	.loc 2 2497 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2456 0
+	.loc 2 2507 0
 	adrp	x8, .LANCHOR0
 	add	x0, x8, :lo12:.LANCHOR0
-	.loc 2 2447 0
+	.loc 2 2497 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 2456 0
-	ldr	w2, [x0, 2572]
-	ldr	w1, [x0, 2584]
+	.loc 2 2507 0
+	ldr	w2, [x0, 2612]
+	ldr	w1, [x0, 2624]
 	cmp	w2, w1
-	bcs	.L226
-	.loc 2 2459 0
+	bcs	.L219
+	.loc 2 2510 0
 	ldrh	w2, [x0, 20]
 	mov	x1, 0
-	.loc 2 2460 0
-	ldr	x4, [x0, 2296]
-	.loc 2 2458 0
-	str	wzr, [x0, 2564]
-.L227:
-	.loc 2 2459 0 discriminator 1
+	.loc 2 2511 0
+	ldr	x4, [x0, 2360]
+	.loc 2 2509 0
+	str	wzr, [x0, 2604]
+.L220:
+	.loc 2 2510 0 discriminator 1
 	cmp	w2, w1
-	bhi	.L228
-	.loc 2 2461 0
+	bhi	.L221
+	.loc 2 2512 0
 	add	x1, x8, :lo12:.LANCHOR0
-	ldr	w0, [x1, 2564]
+	ldr	w0, [x1, 2604]
 	udiv	w2, w0, w2
-	str	w2, [x1, 2572]
-	.loc 2 2462 0
-	ldr	w2, [x1, 2568]
+	str	w2, [x1, 2612]
+	.loc 2 2513 0
+	ldr	w2, [x1, 2608]
 	sub	w0, w0, w2
 	ldrh	w2, [x1, 72]
 	udiv	w0, w0, w2
-	str	w0, [x1, 2564]
-.L229:
-	.loc 2 2468 0
+	str	w0, [x1, 2604]
+.L222:
+	.loc 2 2519 0
 	add	x1, x8, :lo12:.LANCHOR0
-	ldr	w9, [x1, 2584]
-	ldr	w10, [x1, 2572]
+	ldr	w9, [x1, 2624]
+	ldr	w11, [x1, 2612]
 	add	w0, w9, 256
-	cmp	w0, w10
-	bls	.L234
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	ldr	w1, [x1, 2580]
+	cmp	w0, w11
+	bls	.L227
+	.loc 2 2519 0 is_stmt 0 discriminator 1
+	ldr	w1, [x1, 2620]
 	add	w0, w9, 768
 	cmp	w0, w1
-	bls	.L234
-.LVL289:
-.L237:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L227
+.LVL277:
+.L229:
+	.loc 2 2520 0 is_stmt 1
 	mov	w20, 65535
-.L235:
-	.loc 2 2518 0
+.L228:
+	.loc 2 2566 0
 	mov	w0, w20
-.LVL290:
+.LVL278:
 	ldp	x19, x20, [sp, 16]
-.LVL291:
+.LVL279:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -3578,176 +3436,184 @@ GetSwlReplaceBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL292:
-.L228:
+.LVL280:
+.L221:
 	.cfi_restore_state
-	.loc 2 2460 0 discriminator 3
+	.loc 2 2511 0 discriminator 3
 	ldrh	w3, [x4, x1, lsl 1]
 	add	x1, x1, 1
-	ldr	w5, [x0, 2564]
+	ldr	w5, [x0, 2604]
 	add	w3, w3, w5
-	str	w3, [x0, 2564]
-	b	.L227
-.L226:
-	.loc 2 2463 0
-	ldr	w1, [x0, 2580]
+	str	w3, [x0, 2604]
+	b	.L220
+.L219:
+	.loc 2 2514 0
+	ldr	w1, [x0, 2620]
 	cmp	w2, w1
-	bls	.L229
-	.loc 2 2464 0
+	bls	.L222
+	.loc 2 2515 0
 	add	w1, w1, 1
-	str	w1, [x0, 2580]
-	.loc 2 2465 0
+	str	w1, [x0, 2620]
+	.loc 2 2516 0
 	mov	w1, 0
-.L231:
-	.loc 2 2465 0 is_stmt 0 discriminator 1
+.L224:
+	.loc 2 2516 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x0, 20]
 	cmp	w1, w2
-	bcs	.L229
-	.loc 2 2466 0 is_stmt 1 discriminator 3
-	ldr	x4, [x0, 2296]
+	bcs	.L222
+	.loc 2 2517 0 is_stmt 1 discriminator 3
+	ldr	x4, [x0, 2360]
 	ubfiz	x3, x1, 1, 32
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2516 0 discriminator 3
 	add	w1, w1, 1
-	.loc 2 2466 0 discriminator 3
+	.loc 2 2517 0 discriminator 3
 	ldrh	w2, [x4, x3]
 	add	w2, w2, 1
 	strh	w2, [x4, x3]
-	b	.L231
-.L234:
-	.loc 2 2471 0
-	add	x0, x8, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 2352]
+	b	.L224
+.L227:
+	.loc 2 2522 0
+	add	x10, x8, :lo12:.LANCHOR0
+	ldrh	w0, [x10, 2392]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL293:
+.LVL281:
 	and	w6, w0, 65535
-.LVL294:
-	.loc 2 2472 0
+.LVL282:
+	.loc 2 2523 0
 	add	w0, w9, 64
 	cmp	w6, w0
-	bcs	.L236
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	w9, 30
-	bhi	.L237
-.L236:
-	.loc 2 2476 0 is_stmt 1
-	add	x1, x8, :lo12:.LANCHOR0
-	ldr	x0, [x1, 2312]
-.LVL295:
-	cbz	x0, .L237
-	.loc 2 2484 0
+	bcc	.L229
+	.loc 2 2526 0
+	ldr	x0, [x10, 2344]
+.LVL283:
+	cbz	x0, .L229
+	.loc 2 2534 0
 	mov	w4, 65535
-.LVL296:
-	.loc 2 2483 0
-	mov	x11, -6148914691236517206
-	.loc 2 2484 0
-	ldr	x5, [x1, 2296]
-	.loc 2 2479 0
-	mov	w7, w4
-	.loc 2 2483 0
-	ldr	x3, [x1, 2304]
-	.loc 2 2484 0
-	mov	w1, w4
-	.loc 2 2483 0
-	movk	x11, 0xaaab, lsl 0
-	.loc 2 2495 0
-	mov	w12, 6
-.LVL297:
-.L238:
-	.loc 2 2479 0
-	ldrh	w2, [x0]
-	cmp	w2, w7
-	bne	.L241
-	mov	w20, w1
-.L240:
-	.loc 2 2498 0
+.LVL284:
+	.loc 2 2530 0
+	ldrh	w12, [x10, 20]
+	.loc 2 2533 0
+	mov	x13, -6148914691236517206
+	ldr	x7, [x10, 2336]
+	.loc 2 2534 0
+	ldr	x5, [x10, 2360]
+	mov	w2, w4
+	.loc 2 2528 0
+	mov	w10, w4
+	.loc 2 2534 0
+	mov	w1, 0
+.LVL285:
+	.loc 2 2533 0
+	movk	x13, 0xaaab, lsl 0
+	.loc 2 2543 0
+	mov	w14, 6
+.LVL286:
+.L230:
+	.loc 2 2528 0
+	ldrh	w3, [x0]
+	cmp	w3, w10
+	bne	.L233
+	mov	w20, w2
+.L232:
+	.loc 2 2546 0
 	mov	w0, 65535
-.LVL298:
+.LVL287:
 	cmp	w20, w0
-	beq	.L237
-	.loc 2 2500 0
+	beq	.L229
+	.loc 2 2548 0
 	ubfiz	x7, x20, 1, 32
 	ldrh	w3, [x5, x7]
-.LVL299:
-	.loc 2 2501 0
+.LVL288:
+	.loc 2 2549 0
 	cmp	w9, w3
-	bcs	.L242
-	.loc 2 2503 0
+	bcs	.L234
+	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL300:
+.LVL289:
 	cmp	w9, w0, uxth
-	bcs	.L242
-	.loc 2 2504 0
+	bcs	.L234
+	.loc 2 2552 0
 	add	x0, x8, :lo12:.LANCHOR0
-	str	w4, [x0, 2584]
-.L242:
-	.loc 2 2506 0
-	cmp	w10, w3
-	bls	.L237
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	str	w4, [x0, 2624]
+.LVL290:
+.L234:
+	.loc 2 2554 0
+	cmp	w11, w3
+	bls	.L229
+	.loc 2 2554 0 is_stmt 0 discriminator 1
 	add	w0, w3, 128
 	cmp	w6, w0
-	ble	.L237
-	.loc 2 2508 0 is_stmt 1
+	ble	.L229
+	.loc 2 2556 0 is_stmt 1
 	add	w0, w3, 256
-	cmp	w10, w0
-	bhi	.L243
-	.loc 2 2508 0 is_stmt 0 discriminator 1
+	cmp	w11, w0
+	bhi	.L235
+	.loc 2 2556 0 is_stmt 0 discriminator 1
 	add	x0, x8, :lo12:.LANCHOR0
 	add	w3, w3, 768
-.LVL301:
-	ldr	w0, [x0, 2580]
+.LVL291:
+	ldr	w0, [x0, 2620]
 	cmp	w3, w0
-	bcs	.L237
-.LVL302:
-.L243:
-	.loc 2 2510 0 is_stmt 1
+	bcs	.L229
+.LVL292:
+.L235:
+	.loc 2 2558 0 is_stmt 1
 	add	x19, x8, :lo12:.LANCHOR0
 	ldrh	w5, [x5, x7]
-	mov	w2, w10
+	mov	w2, w11
 	mov	w1, w20
-	ldr	x0, [x19, 2320]
-	ldr	w3, [x19, 2580]
-.LVL303:
+.LVL293:
+	ldr	x0, [x19, 2352]
+	ldr	w3, [x19, 2620]
+.LVL294:
 	ldrh	w4, [x0, x7]
-.LVL304:
+.LVL295:
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printk
-.LVL305:
-	.loc 2 2511 0
+.LVL296:
+	.loc 2 2559 0
 	mov	w0, 1
-	str	w0, [x19, 3236]
-	.loc 2 2512 0
-	b	.L235
-.LVL306:
-.L241:
-	.loc 2 2481 0
-	ldrh	w13, [x0, 4]
-	cbz	w13, .L239
-	.loc 2 2483 0
-	sub	x0, x0, x3
-.LVL307:
+	str	w0, [x19, 3220]
+	.loc 2 2560 0
+	b	.L228
+.LVL297:
+.L233:
+	.loc 2 2529 0
+	add	w1, w1, 1
+.LVL298:
+	and	w1, w1, 65535
+.LVL299:
+	.loc 2 2530 0
+	cmp	w1, w12
+	bhi	.L229
+	.loc 2 2532 0
+	ldrh	w15, [x0, 4]
+	cbz	w15, .L231
+	.loc 2 2533 0
+	sub	x0, x0, x7
+.LVL300:
 	asr	x0, x0, 1
-	mul	x0, x0, x11
+	mul	x0, x0, x13
 	and	w20, w0, 65535
-	.loc 2 2484 0
+	.loc 2 2534 0
 	and	x0, x0, 65535
 	ldrh	w0, [x5, x0, lsl 1]
 	cmp	w9, w0
-	bcs	.L240
-	.loc 2 2489 0
+	bcs	.L232
+	.loc 2 2538 0
 	cmp	w4, w0
-	bls	.L239
+	bls	.L231
 	mov	w4, w0
-	.loc 2 2483 0
-	mov	w1, w20
-.LVL308:
-.L239:
-	.loc 2 2495 0
-	umaddl	x0, w2, w12, x3
-	b	.L238
+	.loc 2 2533 0
+	mov	w2, w20
+.LVL301:
+.L231:
+	.loc 2 2543 0
+	umaddl	x0, w3, w14, x7
+	b	.L230
 	.cfi_endproc
 .LFE235:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
@@ -3756,50 +3622,50 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 .LFB236:
-	.loc 2 2522 0
+	.loc 2 2570 0
 	.cfi_startproc
-.LVL309:
+.LVL302:
 	and	w0, w0, 65535
-	.loc 2 2523 0
+	.loc 2 2571 0
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L254
-	.loc 2 2522 0
+	beq	.L246
+	.loc 2 2570 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-.LBB205:
-.LBB206:
-	.loc 2 2525 0
-	adrp	x2, .LANCHOR0+2320
+.LBB212:
+.LBB213:
+	.loc 2 2573 0
+	adrp	x2, .LANCHOR0+2352
 	ubfiz	x1, x0, 1, 16
-.LBE206:
-.LBE205:
-	.loc 2 2522 0
+.LBE213:
+.LBE212:
+	.loc 2 2570 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB208:
-.LBB207:
-	.loc 2 2525 0
-	ldr	x2, [x2, #:lo12:.LANCHOR0+2320]
+.LBB215:
+.LBB214:
+	.loc 2 2573 0
+	ldr	x2, [x2, #:lo12:.LANCHOR0+2352]
 	strh	wzr, [x2, x1]
-	.loc 2 2526 0
+	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL310:
-.LBE207:
-.LBE208:
-	.loc 2 2528 0
+.LVL303:
+.LBE214:
+.LBE215:
+	.loc 2 2576 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL311:
-.L254:
+.LVL304:
+.L246:
 	mov	w0, 0
-.LVL312:
+.LVL305:
 	ret
 	.cfi_endproc
 .LFE236:
@@ -3809,9 +3675,9 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 .LFB239:
-	.loc 2 2655 0
+	.loc 2 2703 0
 	.cfi_startproc
-.LVL313:
+.LVL306:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -3824,128 +3690,128 @@ get_new_active_ppa:
 	mov	x19, x0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2659 0
+	.loc 2 2707 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL314:
+.LVL307:
 	cmp	w1, w0
-	bne	.L258
-	.loc 2 2659 0 is_stmt 0 discriminator 1
+	bne	.L250
+	.loc 2 2707 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2659
-	add	x1, x1, 168
+	mov	w2, 2707
+	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL315:
-.L258:
-	.loc 2 2660 0 is_stmt 1
+.LVL308:
+.L250:
+	.loc 2 2708 0 is_stmt 1
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, 82]
 	cmp	w1, w0
-	bne	.L259
-	.loc 2 2660 0 is_stmt 0 discriminator 1
+	bne	.L251
+	.loc 2 2708 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2660
-	add	x1, x1, 168
+	mov	w2, 2708
+	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL316:
-.L259:
-	.loc 2 2661 0 is_stmt 1
+.LVL309:
+.L251:
+	.loc 2 2709 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L260
-	.loc 2 2661 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L252
+	.loc 2 2709 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2661
-	add	x1, x1, 168
+	mov	w2, 2709
+	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL317:
-.L260:
-	.loc 2 2663 0 is_stmt 1
+.LVL310:
+.L252:
+	.loc 2 2711 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2714 0
 	add	x1, x20, :lo12:.LANCHOR0
-	.loc 2 2662 0
+	.loc 2 2710 0
 	strb	wzr, [x19, 10]
-	.loc 2 2663 0
+	.loc 2 2711 0
 	add	x0, x0, 8
-	.loc 2 2666 0
+	.loc 2 2714 0
 	ldrh	w2, [x1, 12]
-	.loc 2 2664 0
+	.loc 2 2712 0
 	mov	w1, 65535
-	.loc 2 2663 0
+	.loc 2 2711 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL318:
-.L261:
-	.loc 2 2664 0
+.LVL311:
+.L253:
+	.loc 2 2712 0
 	cmp	w0, w1
-	beq	.L263
-	.loc 2 2672 0
+	beq	.L255
+	.loc 2 2720 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2680 0
+	.loc 2 2728 0
 	mov	w3, 65535
-	.loc 2 2673 0
+	.loc 2 2721 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2672 0
+	.loc 2 2720 0
 	orr	w21, w21, w0, lsl 10
 	ldrb	w0, [x19, 6]
-.LVL319:
-	.loc 2 2673 0
+.LVL312:
+	.loc 2 2721 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L265:
-	.loc 2 2675 0
+.L257:
+	.loc 2 2723 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2676 0
+	.loc 2 2724 0
 	cmp	w2, w0
-	bne	.L264
-	.loc 2 2677 0
+	bne	.L256
+	.loc 2 2725 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2678 0
+	.loc 2 2726 0
 	mov	w0, 0
-.L264:
-	.loc 2 2680 0
+.L256:
+	.loc 2 2728 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L265
-	.loc 2 2682 0
+	beq	.L257
+	.loc 2 2730 0
 	add	x20, x20, :lo12:.LANCHOR0
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, 82]
 	cmp	w2, w0
-	bne	.L257
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	w1, .L257
-	.loc 2 2682 0 discriminator 2
+	bne	.L249
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbz	w1, .L249
+	.loc 2 2730 0 discriminator 2
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2682
-	add	x1, x1, 168
+	mov	w2, 2730
+	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL320:
-.L257:
-	.loc 2 2684 0 is_stmt 1
+.LVL313:
+.L249:
+	.loc 2 2732 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL321:
+.LVL314:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -3955,32 +3821,32 @@ get_new_active_ppa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL322:
-.L263:
+.LVL315:
+.L255:
 	.cfi_restore_state
-	.loc 2 2665 0
+	.loc 2 2713 0
 	ldrb	w0, [x19, 6]
-.LVL323:
+.LVL316:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2714 0
 	cmp	w0, w2
-	bne	.L262
-	.loc 2 2667 0
+	bne	.L254
+	.loc 2 2715 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2668 0
+	.loc 2 2716 0
 	strb	wzr, [x19, 6]
-	.loc 2 2667 0
+	.loc 2 2715 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L262:
-	.loc 2 2670 0
+.L254:
+	.loc 2 2718 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL324:
-	b	.L261
+.LVL317:
+	b	.L253
 	.cfi_endproc
 .LFE239:
 	.size	get_new_active_ppa, .-get_new_active_ppa
@@ -4003,31 +3869,31 @@ FtlGcBufInit:
 	.loc 5 28 0
 	mov	w5, 4
 	.loc 5 25 0
-	str	wzr, [x1, 3240]
-.L273:
+	str	wzr, [x1, 3224]
+.L265:
 	.loc 5 26 0 discriminator 1
 	ldrh	w2, [x1, 12]
 	cmp	w3, w2
-	bcc	.L274
+	bcc	.L266
 	.loc 5 34 0 discriminator 1
 	add	x0, x0, :lo12:.LANCHOR0
 	.loc 5 35 0 discriminator 1
 	mov	w6, 24
 	.loc 5 36 0 discriminator 1
 	mov	w5, 4
-.L275:
+.L267:
 	.loc 5 34 0 discriminator 1
-	ldr	w1, [x0, 3280]
+	ldr	w1, [x0, 3264]
 	cmp	w2, w1
-	bcc	.L276
+	bcc	.L268
 	.loc 5 39 0
 	ret
-.L274:
+.L266:
 	.loc 5 27 0 discriminator 3
 	umull	x4, w3, w8
-	ldr	x6, [x1, 3248]
+	ldr	x6, [x1, 3232]
 	.loc 5 28 0 discriminator 3
-	ldr	x7, [x1, 3256]
+	ldr	x7, [x1, 3240]
 	.loc 5 27 0 discriminator 3
 	add	x2, x6, x4
 	str	w9, [x2, 16]
@@ -4039,15 +3905,15 @@ FtlGcBufInit:
 	str	x2, [x6, x4]
 	.loc 5 29 0 discriminator 3
 	ldrh	w2, [x1, 92]
-	ldr	x7, [x1, 3248]
-	ldr	x10, [x1, 3264]
+	ldr	x7, [x1, 3232]
+	ldr	x10, [x1, 3248]
 	add	x6, x7, x4
 	mul	w2, w2, w3
 	sdiv	w2, w2, w5
 	add	x2, x10, x2, sxtw 2
 	str	x2, [x6, 8]
 	.loc 5 30 0 discriminator 3
-	ldr	x2, [x1, 3272]
+	ldr	x2, [x1, 3256]
 	ubfiz	x10, x3, 5, 16
 	ldr	x4, [x7, x4]
 	.loc 5 26 0 discriminator 3
@@ -4061,13 +3927,13 @@ FtlGcBufInit:
 	.loc 5 31 0 discriminator 3
 	ldr	x4, [x6, 8]
 	str	x4, [x2, 16]
-	b	.L273
-.L276:
+	b	.L265
+.L268:
 	.loc 5 35 0 discriminator 3
 	umull	x4, w2, w6
-	ldr	x3, [x0, 3248]
+	ldr	x3, [x0, 3232]
 	.loc 5 36 0 discriminator 3
-	ldr	x7, [x0, 3256]
+	ldr	x7, [x0, 3240]
 	.loc 5 35 0 discriminator 3
 	add	x1, x3, x4
 	str	wzr, [x1, 16]
@@ -4079,9 +3945,9 @@ FtlGcBufInit:
 	str	x1, [x3, x4]
 	.loc 5 37 0 discriminator 3
 	ldrh	w1, [x0, 92]
-	ldr	x3, [x0, 3248]
+	ldr	x3, [x0, 3232]
 	add	x3, x3, x4
-	ldr	x4, [x0, 3264]
+	ldr	x4, [x0, 3248]
 	mul	w1, w1, w2
 	.loc 5 34 0 discriminator 3
 	add	w2, w2, 1
@@ -4090,7 +3956,7 @@ FtlGcBufInit:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
-	b	.L275
+	b	.L267
 	.cfi_endproc
 .LFE242:
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -4101,56 +3967,56 @@ FtlGcBufFree:
 .LFB243:
 	.loc 5 42 0
 	.cfi_startproc
-.LVL325:
+.LVL318:
 	.loc 5 47 0
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
 	.loc 5 46 0
 	mov	w3, 0
-.LVL326:
+.LVL319:
 	.loc 5 48 0
 	mov	w8, 24
 	.loc 5 47 0
-	ldr	w7, [x2, 3280]
+	ldr	w7, [x2, 3264]
 	.loc 5 48 0
-	ldr	x5, [x2, 3248]
-.LVL327:
-.L278:
+	ldr	x5, [x2, 3232]
+.LVL320:
+.L270:
 	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L277
+	bcs	.L269
 	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L283
-.L279:
+	b	.L275
+.L271:
 	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL328:
+.LVL321:
 	and	w2, w2, 65535
-.LVL329:
-.L283:
+.LVL322:
+.L275:
 	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
-	bcs	.L280
+	bcs	.L272
 	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x9, x5, x6
 	ldr	x10, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x10, x6
-	bne	.L279
+	bne	.L271
 	.loc 5 49 0
 	str	wzr, [x9, 16]
-.L280:
+.L272:
 	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL330:
+.LVL323:
 	and	w3, w3, 65535
-.LVL331:
-	b	.L278
-.L277:
+.LVL324:
+	b	.L270
+.L269:
 	ret
 	.cfi_endproc
 .LFE243:
@@ -4162,45 +4028,45 @@ FtlGcBufAlloc:
 .LFB244:
 	.loc 5 57 0
 	.cfi_startproc
-.LVL332:
+.LVL325:
 	.loc 5 62 0
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
 	.loc 5 61 0
 	mov	w3, 0
-.LVL333:
+.LVL326:
 	.loc 5 63 0
 	mov	w7, 24
 	.loc 5 64 0
 	mov	w8, 1
 	.loc 5 62 0
-	ldr	w5, [x2, 3280]
+	ldr	w5, [x2, 3264]
 	.loc 5 63 0
-	ldr	x6, [x2, 3248]
-.LVL334:
-.L285:
+	ldr	x6, [x2, 3232]
+.LVL327:
+.L277:
 	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L284
+	bcs	.L276
 	mov	w2, 0
-	b	.L290
-.L286:
+	b	.L282
+.L278:
 	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL335:
+.LVL328:
 	and	w2, w2, 65535
-.LVL336:
-.L290:
+.LVL329:
+.L282:
 	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
-	bcs	.L287
+	bcs	.L279
 	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w9, [x4, 16]
-	cbnz	w9, .L286
+	cbnz	w9, .L278
 	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL337:
+.LVL330:
 	ldr	x9, [x4]
 	add	x2, x0, x2
 	.loc 5 64 0
@@ -4210,15 +4076,15 @@ FtlGcBufAlloc:
 	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	str	x4, [x2, 16]
-.LVL338:
-.L287:
+.LVL331:
+.L279:
 	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL339:
+.LVL332:
 	and	w3, w3, 65535
-.LVL340:
-	b	.L285
-.L284:
+.LVL333:
+	b	.L277
+.L276:
 	ret
 	.cfi_endproc
 .LFE244:
@@ -4230,37 +4096,37 @@ IsBlkInGcList:
 .LFB245:
 	.loc 5 74 0
 	.cfi_startproc
-.LVL341:
+.LVL334:
 	.loc 5 77 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	.loc 5 74 0
 	and	w0, w0, 65535
 	.loc 5 77 0
-	ldrh	w2, [x1, 3284]
+	ldrh	w2, [x1, 3268]
 	.loc 5 78 0
-	ldr	x3, [x1, 3288]
+	ldr	x3, [x1, 3272]
 	.loc 5 77 0
 	mov	x1, 0
-.L292:
+.L284:
 	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
-	bhi	.L294
+	bhi	.L286
 	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL342:
+.LVL335:
 	ret
-.LVL343:
-.L294:
+.LVL336:
+.L286:
 	add	x1, x1, 1
 	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L292
+	bne	.L284
 	.loc 5 79 0
 	mov	w0, 1
-.LVL344:
+.LVL337:
 	.loc 5 82 0
 	ret
 	.cfi_endproc
@@ -4273,7 +4139,7 @@ FtlGcUpdatePage:
 .LFB246:
 	.loc 5 85 0
 	.cfi_startproc
-.LVL345:
+.LVL338:
 	mov	w5, w0
 	mov	w8, w1
 	mov	w7, w2
@@ -4283,68 +4149,68 @@ FtlGcUpdatePage:
 	.cfi_offset 30, -8
 	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL346:
+.LVL339:
 	.loc 5 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL347:
+.LVL340:
 	and	w9, w0, 65535
-.LVL348:
+.LVL341:
 	.loc 5 91 0
 	adrp	x3, .LANCHOR0
 	add	x4, x3, :lo12:.LANCHOR0
-	ldrh	w1, [x4, 3284]
+	ldrh	w1, [x4, 3268]
 	.loc 5 92 0
-	ldr	x6, [x4, 3288]
+	ldr	x6, [x4, 3272]
 	.loc 5 91 0
 	mov	x4, 0
-.L297:
+.L289:
 	and	w2, w4, 65535
-.LVL349:
+.LVL342:
 	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	w2, w1
-	bcc	.L299
+	bcc	.L291
 	.loc 5 96 0 is_stmt 1
-	bne	.L298
+	bne	.L290
 	.loc 5 97 0
 	and	x4, x4, 65535
 	strh	w0, [x6, x4, lsl 1]
 	.loc 5 98 0
 	add	x4, x3, :lo12:.LANCHOR0
-	ldrh	w0, [x4, 3284]
+	ldrh	w0, [x4, 3268]
 	add	w0, w0, 1
-	strh	w0, [x4, 3284]
-	b	.L298
-.L299:
+	strh	w0, [x4, 3268]
+	b	.L290
+.L291:
 	add	x4, x4, 1
 	.loc 5 92 0
 	add	x2, x6, x4, lsl 1
-.LVL350:
+.LVL343:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w9
-	bne	.L297
-.LVL351:
-.L298:
+	bne	.L289
+.LVL344:
+.L290:
 	.loc 5 101 0
 	add	x0, x3, :lo12:.LANCHOR0
 	mov	w1, 12
-	ldrh	w3, [x0, 3296]
-	ldr	x4, [x0, 3304]
+	ldrh	w3, [x0, 3280]
+	ldr	x4, [x0, 3288]
 	umull	x3, w3, w1
 	add	x4, x4, x3
 	str	w8, [x4, 4]
 	.loc 5 102 0
-	ldr	x1, [x0, 3304]
+	ldr	x1, [x0, 3288]
 	add	x4, x1, x3
 	str	w7, [x4, 8]
 	.loc 5 103 0
 	str	w5, [x1, x3]
 	.loc 5 107 0
-	ldrh	w1, [x0, 3296]
+	ldrh	w1, [x0, 3280]
 	add	w1, w1, 1
-	strh	w1, [x0, 3296]
+	strh	w1, [x0, 3280]
 	.loc 5 108 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -4361,7 +4227,7 @@ FtlGcRefreshBlock:
 .LFB253:
 	.loc 5 345 0
 	.cfi_startproc
-.LVL352:
+.LVL345:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -4372,34 +4238,34 @@ FtlGcRefreshBlock:
 	.cfi_offset 19, -16
 	.loc 5 345 0
 	and	w19, w0, 65535
-.LVL353:
+.LVL346:
 	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printk
-.LVL354:
+.LVL347:
 	.loc 5 349 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w3, [x0, 3312]
+	ldrh	w3, [x0, 3296]
 	cmp	w19, w3
-	beq	.L302
+	beq	.L294
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldrh	w2, [x0, 3314]
+	ldrh	w2, [x0, 3298]
 	cmp	w19, w2
-	beq	.L302
+	beq	.L294
 	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w3, w1
-	bne	.L303
+	bne	.L295
 	.loc 5 352 0
-	strh	w19, [x0, 3312]
-.L302:
+	strh	w19, [x0, 3296]
+.L294:
 	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL355:
+.LVL348:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4407,15 +4273,15 @@ FtlGcRefreshBlock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL356:
-.L303:
+.LVL349:
+.L295:
 	.cfi_restore_state
 	.loc 5 353 0
 	cmp	w2, w1
-	bne	.L302
+	bne	.L294
 	.loc 5 354 0
-	strh	w19, [x0, 3314]
-	b	.L302
+	strh	w19, [x0, 3298]
+	b	.L294
 	.cfi_endproc
 .LFE253:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4426,7 +4292,7 @@ FtlGcMarkBadPhyBlk:
 .LFB254:
 	.loc 5 359 0
 	.cfi_startproc
-.LVL357:
+.LVL350:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -4445,13 +4311,13 @@ FtlGcMarkBadPhyBlk:
 	.cfi_offset 22, -8
 	.loc 5 359 0
 	and	w21, w0, 65535
-.LVL358:
+.LVL351:
 	.loc 5 369 0
-	add	x20, x20, 3320
+	add	x20, x20, 3304
 	.loc 5 361 0
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL359:
+.LVL352:
 	.loc 5 364 0
 	ldrh	w1, [x20, -4]
 	mov	w2, w21
@@ -4461,41 +4327,41 @@ FtlGcMarkBadPhyBlk:
 	adrp	x0, .LC74
 	add	x0, x0, :lo12:.LC74
 	bl	printk
-.LVL360:
+.LVL353:
 	.loc 5 366 0
 	mov	w0, w22
 	bl	FtlGcRefreshBlock
-.LVL361:
+.LVL354:
 	.loc 5 368 0
 	ldrh	w0, [x20, -4]
 	mov	x1, 0
-.L306:
+.L298:
 	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L308
+	bhi	.L300
 	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
-	bhi	.L307
+	bhi	.L299
 	.loc 5 373 0
 	add	x19, x19, :lo12:.LANCHOR0
 	add	w1, w0, 1
-	add	x19, x19, 3320
+	add	x19, x19, 3304
 	strh	w1, [x19, -4]
 	strh	w21, [x19, w0, sxtw 1]
-	b	.L307
-.L308:
+	b	.L299
+.L300:
 	add	x1, x1, 1
 	.loc 5 369 0
 	add	x2, x20, x1, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w21
-	bne	.L306
-.L307:
+	bne	.L298
+.L299:
 	.loc 5 375 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL362:
+.LVL355:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -4526,38 +4392,38 @@ FtlGcReFreshBadBlk:
 	.loc 5 380 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3316]
-	cbz	w1, .L311
+	ldrh	w1, [x0, 3300]
+	cbz	w1, .L303
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldrh	w3, [x0, 3312]
+	ldrh	w3, [x0, 3296]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L311
+	bne	.L303
 	.loc 5 381 0 is_stmt 1
-	ldrh	w2, [x0, 3354]
+	ldrh	w2, [x0, 3338]
 	cmp	w2, w1
-	bcc	.L312
+	bcc	.L304
 	.loc 5 382 0
-	strh	wzr, [x0, 3354]
-.L312:
-.LBB211:
-.LBB212:
+	strh	wzr, [x0, 3338]
+.L304:
+.LBB218:
+.LBB219:
 	.loc 5 383 0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x0, x19, 3320
-	ldrh	w1, [x19, 3354]
+	add	x0, x19, 3304
+	ldrh	w1, [x19, 3338]
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL363:
+.LVL356:
 	bl	FtlGcRefreshBlock
-.LVL364:
+.LVL357:
 	.loc 5 384 0
-	ldrh	w0, [x19, 3354]
+	ldrh	w0, [x19, 3338]
 	add	w0, w0, 1
-	strh	w0, [x19, 3354]
-.L311:
-.LBE212:
-.LBE211:
+	strh	w0, [x19, 3338]
+.L303:
+.LBE219:
+.LBE218:
 	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -4577,13 +4443,13 @@ FlashReadPages:
 .LFB261:
 	.loc 1 44 0
 	.cfi_startproc
-.LVL365:
+.LVL358:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	ubfiz	x1, x1, 5, 32
-.LVL366:
+.LVL359:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
@@ -4592,7 +4458,7 @@ FlashReadPages:
 	.loc 1 46 0
 	adrp	x23, g_nand_phy_info
 	add	x2, x23, :lo12:g_nand_phy_info
-.LVL367:
+.LVL360:
 	.loc 1 44 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
@@ -4611,24 +4477,24 @@ FlashReadPages:
 	mov	x19, x0
 	.loc 1 46 0
 	ldrh	w25, [x2, 12]
-.LVL368:
+.LVL361:
 	add	x24, x0, x1
-.LVL369:
+.LVL362:
 	.loc 1 51 0
-	add	x20, x20, 192
+	add	x20, x20, 160
 	add	x22, x22, :lo12:.LC1
-.LVL370:
-.L318:
+.LVL363:
+.L310:
 	.loc 1 50 0 discriminator 1
 	cmp	x19, x24
-	bne	.L325
+	bne	.L317
 	.loc 1 71 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL371:
+.LVL364:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4642,23 +4508,23 @@ FlashReadPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL372:
-.L325:
+.LVL365:
+.L317:
 	.cfi_restore_state
 	.loc 1 51 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L319
+	cbz	x0, .L311
 	.loc 1 51 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L320
-.L319:
+	cbnz	x0, .L312
+.L311:
 	.loc 1 51 0 discriminator 3
 	mov	w2, 51
 	mov	x1, x20
 	mov	x0, x22
 	bl	printk
-.LVL373:
-.L320:
+.LVL366:
+.L312:
 	.loc 1 52 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	.loc 1 53 0
@@ -4668,21 +4534,21 @@ FlashReadPages:
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL374:
+.LVL367:
 	.loc 1 53 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x21, 24]
 	blr	x4
-.LVL375:
+.LVL368:
 	.loc 1 57 0
 	str	w0, [x19]
 	.loc 1 58 0
 	add	x0, x23, :lo12:g_nand_phy_info
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L322
+	bne	.L314
 	.loc 1 59 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x21, 24]
@@ -4692,31 +4558,31 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL376:
+.LVL369:
 	.loc 1 63 0
 	cmn	w0, #1
-	beq	.L323
+	beq	.L315
 	.loc 1 64 0 discriminator 1
 	ldr	x0, [x19, 16]
 	.loc 1 63 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L322
+	bne	.L314
 	.loc 1 64 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L322
+	bne	.L314
 	.loc 1 65 0
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L322
-.L323:
+	beq	.L314
+.L315:
 	.loc 1 67 0
 	mov	w0, -1
 	str	w0, [x19]
-.L322:
+.L314:
 	add	x19, x19, 32
-	b	.L318
+	b	.L310
 	.cfi_endproc
 .LFE261:
 	.size	FlashReadPages, .-FlashReadPages
@@ -4744,7 +4610,7 @@ FtlLoadFactoryBbt:
 	stp	x25, x26, [sp, 64]
 	.loc 4 289 0
 	mov	w21, 0
-.LVL377:
+.LVL370:
 	.loc 4 279 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 25, -16
@@ -4758,28 +4624,28 @@ FtlLoadFactoryBbt:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.loc 4 286 0
-	add	x23, x0, 3360
+	add	x23, x0, 3344
 	.loc 4 293 0
 	mov	x25, x23
 	.loc 4 301 0
 	mov	w26, 61664
 	.loc 4 286 0
-	ldr	x1, [x0, 2288]
+	ldr	x1, [x0, 3376]
 	.loc 4 287 0
-	ldr	x24, [x0, 3392]
+	ldr	x24, [x0, 3384]
 	stp	x1, x24, [x23, 8]
-.LVL378:
-.L337:
+.LVL371:
+.L329:
 	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x19, 34]
 	cmp	w21, w0
-	bcc	.L342
+	bcc	.L334
 	.loc 4 314 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL379:
+.LVL372:
 	ldp	x21, x22, [sp, 32]
-.LVL380:
+.LVL373:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
@@ -4796,26 +4662,26 @@ FtlLoadFactoryBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL381:
-.L342:
+.LVL374:
+.L334:
 	.cfi_restore_state
 	.loc 4 291 0
 	ldrh	w20, [x19, 78]
-.LVL382:
+.LVL375:
 	.loc 4 290 0
 	mov	w0, -1
 	strh	w0, [x22]
-.LVL383:
-.L339:
+.LVL376:
+.L331:
 	.loc 4 291 0 discriminator 2
 	ldrh	w0, [x19, 78]
 	sub	w20, w20, #1
-.LVL384:
+.LVL377:
 	and	w20, w20, 65535
-.LVL385:
+.LVL378:
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L340
+	ble	.L332
 	.loc 4 292 0
 	madd	w0, w0, w21, w20
 	.loc 4 294 0
@@ -4823,29 +4689,29 @@ FtlLoadFactoryBbt:
 	mov	w1, w2
 	.loc 4 292 0
 	lsl	w0, w0, 10
-.LVL386:
+.LVL379:
 	.loc 4 293 0
 	str	w0, [x25, 4]
 	.loc 4 294 0
 	mov	x0, x23
-.LVL387:
+.LVL380:
 	bl	FlashReadPages
-.LVL388:
+.LVL381:
 	.loc 4 295 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L339
+	beq	.L331
 	.loc 4 301 0
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L339
+	bne	.L331
 	.loc 4 303 0
 	strh	w20, [x22]
-.L340:
+.L332:
 	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
 	add	x22, x22, 2
-	b	.L337
+	b	.L329
 	.cfi_endproc
 .LFE169:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -4856,7 +4722,7 @@ FtlGetLastWrittenPage:
 .LFB175:
 	.loc 2 47 0
 	.cfi_startproc
-.LVL389:
+.LVL382:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
@@ -4872,7 +4738,7 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	adrp	x1, .LANCHOR0
-.LVL390:
+.LVL383:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
@@ -4880,17 +4746,17 @@ FtlGetLastWrittenPage:
 	.cfi_offset 22, -120
 	.loc 2 51 0
 	add	x1, x1, :lo12:.LANCHOR0
-	bne	.L348
+	bne	.L340
 	.loc 2 51 0 is_stmt 0 discriminator 1
 	ldrh	w19, [x1, 84]
-.L349:
+.L341:
 	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
 	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
 	.loc 2 56 0 discriminator 4
 	sxth	w19, w19
-.LVL391:
+.LVL384:
 	.loc 2 53 0 discriminator 4
 	add	x1, x1, :lo12:ftl_temp_buf
 	.loc 2 57 0 discriminator 4
@@ -4899,7 +4765,7 @@ FtlGetLastWrittenPage:
 	str	x1, [x29, 72]
 	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL392:
+.LVL385:
 	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
 	.loc 2 57 0 discriminator 4
@@ -4912,28 +4778,28 @@ FtlGetLastWrittenPage:
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL393:
+.LVL386:
 	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L350
+	bne	.L342
 	mov	w22, 0
-.LVL394:
+.LVL387:
 	.loc 2 61 0
 	mov	w24, 2
-.L351:
+.L343:
 	.loc 2 60 0
 	cmp	w22, w19
-	ble	.L354
-.L350:
+	ble	.L346
+.L342:
 	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL395:
+.LVL388:
 	ldp	x21, x22, [sp, 32]
-.LVL396:
+.LVL389:
 	ldp	x23, x24, [sp, 48]
-.LVL397:
+.LVL390:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4946,14 +4812,14 @@ FtlGetLastWrittenPage:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL398:
-.L348:
+.LVL391:
+.L340:
 	.cfi_restore_state
 	.loc 2 51 0 discriminator 2
 	ldrh	w19, [x1, 82]
-	b	.L349
-.LVL399:
-.L354:
+	b	.L341
+.LVL392:
+.L346:
 	.loc 2 61 0
 	add	w20, w22, w19
 	.loc 2 63 0
@@ -4968,26 +4834,26 @@ FtlGetLastWrittenPage:
 	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL400:
+.LVL393:
 	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L352
+	bne	.L344
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L352
+	bne	.L344
 	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL401:
+.LVL394:
 	sxth	w19, w19
-.LVL402:
-	b	.L351
-.L352:
+.LVL395:
+	b	.L343
+.L344:
 	.loc 2 68 0
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L351
+	b	.L343
 	.cfi_endproc
 .LFE175:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -4998,13 +4864,13 @@ FlashProgPages:
 .LFB262:
 	.loc 1 74 0
 	.cfi_startproc
-.LVL403:
+.LVL396:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL404:
+.LVL397:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
@@ -5019,7 +4885,7 @@ FlashProgPages:
 	mov	w26, w2
 	.loc 1 76 0
 	add	x2, x23, :lo12:g_nand_phy_info
-.LVL405:
+.LVL398:
 	.loc 1 74 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
@@ -5040,32 +4906,32 @@ FlashProgPages:
 	mov	w27, w3
 	.loc 1 76 0
 	ldrh	w28, [x2, 12]
-.LVL406:
+.LVL399:
 	mov	x20, x0
 	add	x24, x0, x1
-.LVL407:
+.LVL400:
 	.loc 1 80 0
 	mov	x19, x0
 	.loc 1 81 0
-	add	x22, x22, 208
+	add	x22, x22, 176
 	add	x25, x25, :lo12:.LC1
-.LVL408:
-.L357:
+.LVL401:
+.L349:
 	.loc 1 80 0 discriminator 1
 	cmp	x19, x24
-	bne	.L365
+	bne	.L357
 	.loc 1 101 0
-	cbnz	w27, .L366
-.L384:
+	cbnz	w27, .L358
+.L376:
 	.loc 1 131 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL409:
+.LVL402:
 	ldp	x27, x28, [sp, 80]
-.LVL410:
+.LVL403:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5082,23 +4948,23 @@ FlashProgPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL411:
-.L365:
+.LVL404:
+.L357:
 	.cfi_restore_state
 	.loc 1 81 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L358
+	cbz	x0, .L350
 	.loc 1 81 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L359
-.L358:
+	cbnz	x0, .L351
+.L350:
 	.loc 1 81 0 discriminator 3
 	mov	w2, 81
 	mov	x1, x22
 	mov	x0, x25
 	bl	printk
-.LVL412:
-.L359:
+.LVL405:
+.L351:
 	.loc 1 82 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
@@ -5107,7 +4973,7 @@ FlashProgPages:
 	adrp	x21, g_nand_ops
 	.loc 1 82 0
 	bl	l2p_addr_tran.isra.0
-.LVL413:
+.LVL406:
 	.loc 1 83 0
 	add	x0, x21, :lo12:g_nand_ops
 	ldr	w1, [x29, 108]
@@ -5115,17 +4981,17 @@ FlashProgPages:
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL414:
+.LVL407:
 	.loc 1 88 0
-	cbnz	w0, .L360
+	cbnz	w0, .L352
 	.loc 1 87 0
 	str	wzr, [x19]
-.L361:
+.L353:
 	.loc 1 91 0
 	add	x0, x23, :lo12:g_nand_phy_info
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L363
+	bne	.L355
 	.loc 1 92 0
 	add	x21, x21, :lo12:g_nand_ops
 	ldrb	w0, [x29, 104]
@@ -5136,22 +5002,22 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w28, w1
 	blr	x4
-.LVL415:
+.LVL408:
 	.loc 1 96 0
-	cbz	w0, .L363
+	cbz	w0, .L355
 	.loc 1 97 0
 	mov	w0, -1
 	str	w0, [x19]
-.L363:
+.L355:
 	add	x19, x19, 32
-	b	.L357
-.L360:
+	b	.L349
+.L352:
 	.loc 1 89 0
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L361
-.L370:
-.LBB213:
+	b	.L353
+.L362:
+.LBB220:
 	.loc 1 107 0
 	str	wzr, [x21]
 	.loc 1 112 0
@@ -5168,77 +5034,77 @@ FlashProgPages:
 	.loc 1 112 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL416:
+.LVL409:
 	.loc 1 113 0
 	ldr	w25, [x29, 112]
 	cmn	w25, #1
-	bne	.L367
+	bne	.L359
 	.loc 1 114 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC75
 	add	x0, x0, :lo12:.LC75
 	bl	printk
-.LVL417:
+.LVL410:
 	.loc 1 115 0
 	str	w25, [x20]
-.L367:
+.L359:
 	.loc 1 117 0
 	ldr	x0, [x20, 16]
-	cbz	x0, .L368
+	cbz	x0, .L360
 	.loc 1 118 0
 	ldr	w2, [x0]
 	add	x0, x24, :lo12:.LANCHOR0
-	ldr	w3, [x0, 3400]
+	ldr	w3, [x0, 3392]
 	cmp	w2, w3
-	beq	.L368
+	beq	.L360
 	.loc 1 119 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC76
 	add	x0, x0, :lo12:.LC76
 	bl	printk
-.LVL418:
+.LVL411:
 	.loc 1 120 0
 	mov	w0, -1
 	str	w0, [x20]
-.L368:
+.L360:
 	.loc 1 123 0
 	ldr	x0, [x20, 8]
-	cbz	x0, .L369
+	cbz	x0, .L361
 	.loc 1 124 0
 	ldr	w3, [x22, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L369
+	beq	.L361
 	.loc 1 125 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC77
 	add	x0, x0, :lo12:.LC77
 	bl	printk
-.LVL419:
+.LVL412:
 	.loc 1 126 0
 	mov	w0, -1
 	str	w0, [x20]
-.L369:
+.L361:
 	add	x20, x20, 32
-.L385:
-.LBE213:
+.L377:
+.LBE220:
 	.loc 1 103 0 discriminator 1
 	cmp	x20, x19
-	bne	.L370
-	b	.L384
-.L366:
-.LBB214:
+	bne	.L362
+	b	.L376
+.L358:
+.LBB221:
 	.loc 1 107 0 discriminator 1
 	adrp	x24, .LANCHOR0
 	add	x21, x24, :lo12:.LANCHOR0
 	.loc 1 106 0 discriminator 1
 	adrp	x22, check_buf
 	.loc 1 107 0 discriminator 1
-	add	x21, x21, 3400
+	add	x21, x21, 3392
 	.loc 1 106 0 discriminator 1
 	add	x23, x22, :lo12:check_buf
-	b	.L385
-.LBE214:
+	b	.L377
+.LBE221:
 	.cfi_endproc
 .LFE262:
 	.size	FlashProgPages, .-FlashProgPages
@@ -5249,17 +5115,17 @@ FlashEraseBlocks:
 .LFB263:
 	.loc 1 134 0
 	.cfi_startproc
-.LVL420:
+.LVL413:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
 	.loc 1 137 0
 	adrp	x1, g_nand_phy_info
-.LVL421:
+.LVL414:
 	add	x3, x1, :lo12:g_nand_phy_info
 	ubfiz	x2, x2, 5, 32
-.LVL422:
+.LVL415:
 	.loc 1 134 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -5280,21 +5146,21 @@ FlashEraseBlocks:
 	mov	x20, x1
 	.loc 1 137 0
 	ldrh	w23, [x3, 12]
-.LVL423:
+.LVL416:
 	.loc 1 147 0
 	add	x24, x21, :lo12:g_nand_ops
-.LVL424:
-.L388:
+.LVL417:
+.L380:
 	.loc 1 140 0 discriminator 1
 	cmp	x19, x22
-	bne	.L394
+	bne	.L386
 	.loc 1 153 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
-.LVL425:
+.LVL418:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL426:
+.LVL419:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5307,53 +5173,53 @@ FlashEraseBlocks:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL427:
-.L394:
+.LVL420:
+.L386:
 	.cfi_restore_state
 	.loc 1 141 0
 	ldr	w0, [x19]
-.LVL428:
+.LVL421:
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL429:
+.LVL422:
 	.loc 1 142 0
 	add	x0, x21, :lo12:g_nand_ops
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL430:
+.LVL423:
 	.loc 1 144 0
-	cbnz	w0, .L389
+	cbnz	w0, .L381
 	.loc 1 143 0
 	str	wzr, [x19, -4]
-.L390:
+.L382:
 	.loc 1 146 0
 	add	x0, x20, :lo12:g_nand_phy_info
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L392
+	bne	.L384
 	.loc 1 147 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL431:
+.LVL424:
 	.loc 1 148 0
-	cbz	w0, .L392
+	cbz	w0, .L384
 	.loc 1 149 0
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L392:
+.L384:
 	add	x19, x19, 32
-	b	.L388
-.L389:
+	b	.L380
+.L381:
 	.loc 1 145 0
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L390
+	b	.L382
 	.cfi_endproc
 .LFE263:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -5364,93 +5230,99 @@ FtlFreeSysBlkQueueIn:
 .LFB179:
 	.loc 2 98 0
 	.cfi_startproc
-.LVL432:
+.LVL425:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 2 98 0
-	and	w22, w0, 65535
-.LVL433:
-.LBB215:
-.LBB216:
+	and	w21, w0, 65535
+.LVL426:
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 99 0
+	sub	w2, w21, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcc	.L391
+.LBB230:
+.LBB231:
 	.loc 2 94 0
 	adrp	x0, .LANCHOR0
 	add	x20, x0, :lo12:.LANCHOR0
-.LBE216:
-.LBE215:
-	.loc 2 99 0
+	mov	x19, x0
+.LBE231:
+.LBE230:
+	.loc 2 101 0
 	ldrh	w2, [x20, 238]
 	cmp	w2, 1024
-	beq	.L399
+	beq	.L391
 	and	w1, w1, 65535
-	mov	x19, x0
-.LBB217:
-	.loc 2 101 0
-	cbz	w1, .L401
-.LBB218:
-	.loc 2 102 0
-	mov	w0, w22
-	bl	P2V_block_in_plane
-.LVL434:
-	and	w21, w0, 65535
-.LVL435:
+.LBB232:
+.LBB233:
 	.loc 2 103 0
-	ldr	x0, [x20, 3912]
-	lsl	w1, w22, 10
+	cbz	w1, .L393
+.LBB234:
 	.loc 2 104 0
+	mov	w0, w21
+	bl	P2V_block_in_plane
+.LVL427:
+	and	w22, w0, 65535
+.LVL428:
+	.loc 2 105 0
+	ldr	x0, [x20, 3904]
+	lsl	w1, w21, 10
+	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 103 0
+	.loc 2 105 0
 	str	w1, [x0, 4]
-	.loc 2 104 0
+	.loc 2 106 0
 	mov	w1, w2
-	ldr	x0, [x20, 3912]
+	ldr	x0, [x20, 3904]
 	bl	FlashEraseBlocks
-.LVL436:
-	.loc 2 105 0
-	ldr	x2, [x20, 2296]
-	ubfiz	x0, x21, 1, 16
+.LVL429:
+	.loc 2 107 0
+	ldr	x2, [x20, 2360]
+	ubfiz	x0, x22, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 106 0
-	ldr	w0, [x20, 2576]
-	add	w0, w0, 1
-	str	w0, [x20, 2576]
-.LVL437:
-.L401:
-.LBE218:
 	.loc 2 108 0
+	ldr	w0, [x20, 2616]
+	add	w0, w0, 1
+	str	w0, [x20, 2616]
+.LVL430:
+.L393:
+.LBE234:
+	.loc 2 110 0
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 232
 	ldrh	w1, [x0, 6]
-.LVL438:
+.LVL431:
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 110 0
+	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 109 0
-	strh	w22, [x2, 8]
-.LVL439:
-.L399:
-.LBE217:
-	.loc 2 113 0
+	.loc 2 111 0
+	strh	w21, [x2, 8]
+.LVL432:
+.L391:
+.LBE233:
+.LBE232:
+	.loc 2 115 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL440:
+.LVL433:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -5470,7 +5342,7 @@ FtlLowFormatEraseBlock:
 .LFB148:
 	.loc 3 528 0
 	.cfi_startproc
-.LVL441:
+.LVL434:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -5496,7 +5368,7 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 21, -96
 	.cfi_offset 22, -88
 	and	w23, w1, 255
-.LVL442:
+.LVL435:
 	stp	x25, x26, [sp, 64]
 	.loc 3 541 0
 	add	x8, x5, 40
@@ -5508,23 +5380,23 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 28, -40
 	.loc 3 528 0
 	and	w24, w0, 65535
-.LVL443:
+.LVL436:
 	.loc 3 536 0
 	mov	w21, 0
 	.loc 3 537 0
 	mov	w19, 0
-.LVL444:
+.LVL437:
 	.loc 3 538 0
-	str	w24, [x5, 3920]
-.L410:
+	str	w24, [x5, 3912]
+.L402:
 	.loc 3 539 0 discriminator 1
 	ldrh	w0, [x5, 12]
 	cmp	w0, w10
-	bhi	.L414
+	bhi	.L406
 	.loc 3 559 0
-	cbz	w21, .L409
+	cbz	w21, .L401
 	.loc 3 562 0
-	ldr	x0, [x5, 3912]
+	ldr	x0, [x5, 3904]
 	mov	w2, w21
 	mov	w1, 0
 	ubfiz	x21, x21, 5, 16
@@ -5533,158 +5405,158 @@ FtlLowFormatEraseBlock:
 	add	x25, x20, :lo12:.LANCHOR0
 	.loc 3 562 0
 	bl	FlashEraseBlocks
-.LVL445:
-.L418:
+.LVL438:
+.L410:
 	.loc 3 564 0
-	ldr	x0, [x25, 3912]
+	ldr	x0, [x25, 3904]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L417
+	bne	.L409
 	.loc 3 566 0
 	ldr	w0, [x1, 4]
 	.loc 3 565 0
 	add	w19, w19, 1
-.LVL446:
+.LVL439:
 	and	w19, w19, 65535
-.LVL447:
+.LVL440:
 	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL448:
-.L417:
+.LVL441:
+.L409:
 	add	x22, x22, 32
 	.loc 3 563 0 discriminator 2
 	cmp	x22, x21
-	bne	.L418
+	bne	.L410
 	.loc 3 571 0
-	cbz	w23, .L431
+	cbz	w23, .L423
 	.loc 3 573 0
 	add	x0, x20, :lo12:.LANCHOR0
 	.loc 3 572 0
 	mov	w25, 1
-.LVL449:
+.LVL442:
 	.loc 3 573 0
 	ldrh	w26, [x0, 84]
-.LVL450:
+.LVL443:
 	.loc 3 574 0
 	lsr	w0, w26, 2
-.LVL451:
+.LVL444:
 	str	w0, [x29, 124]
-.L419:
+.L411:
 	.loc 3 578 0
 	add	x27, x20, :lo12:.LANCHOR0
 	mov	w22, 0
-.LVL452:
+.LVL445:
 	.loc 3 580 0
 	add	x0, x27, 40
-.LVL453:
+.LVL446:
 	str	x0, [x29, 112]
-.LVL454:
-.L427:
+.LVL447:
+.L419:
 	.loc 3 578 0
 	mov	w5, 0
 	.loc 3 577 0
 	mov	w21, 0
-.L420:
+.L412:
 	.loc 3 578 0 discriminator 1
 	ldrh	w0, [x27, 12]
-.LVL455:
+.LVL448:
 	cmp	w0, w5
-	bhi	.L423
+	bhi	.L415
 	.loc 3 593 0
-	cbz	w21, .L409
+	cbz	w21, .L401
 	.loc 3 596 0
-	ldr	x0, [x27, 3912]
+	ldr	x0, [x27, 3904]
 	mov	w1, w21
 	mov	w3, 1
 	mov	w2, w25
 	mov	x28, 0
 	bl	FlashProgPages
-.LVL456:
+.LVL449:
 	ubfiz	x1, x21, 5, 16
-.L426:
+.L418:
 	.loc 3 598 0
-	ldr	x0, [x27, 3912]
+	ldr	x0, [x27, 3904]
 	add	x3, x0, x28
 	ldr	w0, [x0, x28]
-	cbz	w0, .L425
+	cbz	w0, .L417
 	.loc 3 600 0
 	ldr	w0, [x3, 4]
 	.loc 3 599 0
 	add	w19, w19, 1
-.LVL457:
+.LVL450:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL458:
+.LVL451:
 	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL459:
+.LVL452:
 	ldr	x1, [x29, 104]
-.L425:
+.L417:
 	add	x28, x28, 32
 	.loc 3 597 0 discriminator 2
 	cmp	x1, x28
-	bne	.L426
+	bne	.L418
 	.loc 3 604 0
 	ldr	w0, [x29, 124]
-.LVL460:
+.LVL453:
 	add	w22, w22, w0
-.LVL461:
+.LVL454:
 	and	w22, w22, 65535
-.LVL462:
+.LVL455:
 	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L427
+	bhi	.L419
 	.loc 3 611 0
 	add	x26, x20, :lo12:.LANCHOR0
-.LVL463:
+.LVL456:
 	mov	x22, 0
-.LVL464:
-.L429:
-	cbz	w23, .L428
+.LVL457:
+.L421:
+	cbz	w23, .L420
 	.loc 3 611 0 is_stmt 0 discriminator 1
-	ldr	x0, [x26, 3912]
-.LVL465:
+	ldr	x0, [x26, 3904]
+.LVL458:
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L428
+	cbnz	w0, .L420
 	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL466:
-.L428:
+.LVL459:
+.L420:
 	add	x22, x22, 32
 	.loc 3 610 0 discriminator 2
 	cmp	x22, x28
-	bne	.L429
+	bne	.L421
 	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L409
+	beq	.L401
 	.loc 3 616 0
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w2, w21
 	mov	w1, w25
-	ldr	x0, [x20, 3912]
-.LVL467:
+	ldr	x0, [x20, 3904]
+.LVL460:
 	bl	FlashEraseBlocks
-.LVL468:
-.L409:
+.LVL461:
+.L401:
 	.loc 3 619 0
 	mov	w0, w19
-.LVL469:
+.LVL462:
 	ldp	x19, x20, [sp, 16]
-.LVL470:
+.LVL463:
 	ldp	x21, x22, [sp, 32]
-.LVL471:
+.LVL464:
 	ldp	x23, x24, [sp, 48]
-.LVL472:
+.LVL465:
 	ldp	x25, x26, [sp, 64]
-.LVL473:
+.LVL466:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
@@ -5702,44 +5574,44 @@ FtlLowFormatEraseBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL474:
-.L414:
+.LVL467:
+.L406:
 	.cfi_restore_state
 	.loc 3 540 0
-	ldr	x1, [x5, 3912]
+	ldr	x1, [x5, 3904]
 	ubfiz	x0, x10, 5, 16
 	str	wzr, [x1, x0]
 	.loc 3 541 0
 	mov	w1, w24
 	ldrb	w0, [x8, w10, sxtw]
 	bl	V2P_block
-.LVL475:
+.LVL468:
 	and	w6, w0, 65535
 	mov	w7, w6
 	.loc 3 543 0
-	cbz	w23, .L411
+	cbz	w23, .L403
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL476:
-	cbnz	w0, .L412
-.L411:
+.LVL469:
+	cbnz	w0, .L404
+.L403:
 	.loc 3 548 0
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-.LVL477:
-	cbnz	w0, .L413
+.LVL470:
+	cbnz	w0, .L405
 	.loc 3 549 0
-	ldr	x0, [x5, 3912]
+	ldr	x0, [x5, 3904]
 	ubfiz	x2, x21, 5, 16
 	lsl	w6, w6, 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
 	.loc 3 550 0
-	ldr	x1, [x5, 3912]
-	ldr	x0, [x5, 3928]
+	ldr	x1, [x5, 3904]
+	ldr	x0, [x5, 3920]
 	add	x1, x1, x2
 	.loc 3 551 0
-	ldr	x2, [x5, 3936]
+	ldr	x2, [x5, 3928]
 	.loc 3 550 0
 	str	x0, [x1, 8]
 	.loc 3 551 0
@@ -5752,35 +5624,35 @@ FtlLowFormatEraseBlock:
 	sdiv	w0, w0, w9
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L412:
+.L404:
 	.loc 3 539 0 discriminator 2
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L410
-.L413:
+	b	.L402
+.L405:
 	.loc 3 554 0
 	add	w19, w19, 1
-.LVL478:
+.LVL471:
 	and	w19, w19, 65535
-.LVL479:
-	b	.L412
-.L431:
+.LVL472:
+	b	.L404
+.L423:
 	.loc 3 533 0
 	mov	w0, 6
-.LVL480:
+.LVL473:
 	.loc 3 534 0
 	mov	w25, 0
-.LVL481:
+.LVL474:
 	.loc 3 531 0
 	mov	w26, 1
-.LVL482:
+.LVL475:
 	.loc 3 533 0
 	str	w0, [x29, 124]
-	b	.L419
-.LVL483:
-.L423:
+	b	.L411
+.LVL476:
+.L415:
 	.loc 3 579 0
-	ldr	x1, [x27, 3912]
+	ldr	x1, [x27, 3904]
 	ubfiz	x0, x5, 5, 16
 	str	wzr, [x1, x0]
 	.loc 3 580 0
@@ -5788,30 +5660,30 @@ FtlLowFormatEraseBlock:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, w5, sxtw]
 	bl	V2P_block
-.LVL484:
+.LVL477:
 	and	w6, w0, 65535
 	mov	w7, w6
 	.loc 3 581 0
-	cbz	w23, .L421
+	cbz	w23, .L413
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL485:
-	cbnz	w0, .L422
-.L421:
+.LVL478:
+	cbnz	w0, .L414
+.L413:
 	.loc 3 585 0
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-.LVL486:
-	cbnz	w0, .L422
+.LVL479:
+	cbnz	w0, .L414
 	.loc 3 586 0
-	ldr	x0, [x27, 3912]
+	ldr	x0, [x27, 3904]
 	ubfiz	x2, x21, 5, 16
 	add	w6, w22, w6, lsl 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
 	.loc 3 587 0
-	ldr	x1, [x27, 3912]
-	ldr	x0, [x27, 3944]
+	ldr	x1, [x27, 3904]
+	ldr	x0, [x27, 3936]
 	add	x1, x1, x2
 	.loc 3 588 0
 	mov	w2, 4
@@ -5825,170 +5697,418 @@ FtlLowFormatEraseBlock:
 	and	w21, w21, 65535
 	.loc 3 588 0
 	sdiv	w0, w0, w2
-	ldr	x2, [x27, 3928]
+	ldr	x2, [x27, 3920]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L422:
+.L414:
 	.loc 3 578 0 discriminator 2
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L420
+	b	.L412
 	.cfi_endproc
 .LFE148:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
-	.global	ftl_memset
-	.type	ftl_memset, %function
-ftl_memset:
-.LFB266:
-	.loc 1 201 0
-	.cfi_startproc
-.LVL487:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 1 202 0
-	uxtw	x2, w2
-.LVL488:
-	.loc 1 201 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 1 202 0
-	bl	memset
-.LVL489:
-	.loc 1 203 0
-	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE266:
-	.size	ftl_memset, .-ftl_memset
-	.align	2
-	.global	FtlMemInit
-	.type	FtlMemInit, %function
-FtlMemInit:
-.LFB145:
-	.loc 3 279 0
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB182:
+	.loc 2 181 0
 	.cfi_startproc
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 3 297 0
-	mov	w0, 65535
-	.loc 3 279 0
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 3 282 0
-	adrp	x20, .LANCHOR0
-	add	x19, x20, :lo12:.LANCHOR0
-	.loc 3 279 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 287 0
-	add	x1, x19, 2304
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+.LBB235:
+.LBB236:
+	.loc 2 89 0
+	adrp	x19, .LANCHOR0
+	add	x19, x19, :lo12:.LANCHOR0
+.LBE236:
+.LBE235:
+	.loc 2 181 0
+	str	x23, [sp, 48]
+.LBB239:
+.LBB237:
+	.loc 2 89 0
+	add	x20, x19, 232
+	.cfi_offset 23, -16
+.LBE237:
+.LBE239:
+	.loc 2 203 0
+	adrp	x23, .LC79
+	add	x23, x23, :lo12:.LC79
+	.loc 2 181 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+.LVL480:
+.L445:
+.LBB240:
+.LBB238:
+	.loc 2 89 0
+	ldrh	w1, [x20, 6]
+.LBE238:
+.LBE240:
+	.loc 2 186 0
+	cbz	w1, .L446
+	.loc 2 187 0
+	ldrh	w0, [x20, 2]
+	.loc 2 188 0
+	sub	w1, w1, #1
+	strh	w1, [x20, 6]
+	.loc 2 187 0
+	add	x2, x20, x0, sxtw 1
+	.loc 2 189 0
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	strh	w0, [x20, 2]
+	.loc 2 187 0
+	ldrh	w21, [x2, 8]
+.LBB241:
+	.loc 2 191 0
+	mov	w0, w21
+	bl	P2V_block_in_plane
+.LVL481:
+	and	w22, w0, 65535
+	.loc 2 192 0
+	ldr	x0, [x19, 3904]
+	lsl	w1, w21, 10
+	.loc 2 193 0
+	mov	w2, 1
+	.loc 2 192 0
+	str	w1, [x0, 4]
+	.loc 2 193 0
+	mov	w1, w2
+	ldr	x0, [x19, 3904]
+	bl	FlashEraseBlocks
+.LVL482:
+	.loc 2 194 0
+	ldr	x2, [x19, 2360]
+	ubfiz	x0, x22, 1, 16
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+.LBE241:
+	.loc 2 202 0
+	sub	w1, w21, #1
+.LBB242:
+	.loc 2 195 0
+	ldr	w0, [x19, 2616]
+	add	w0, w0, 1
+	str	w0, [x19, 2616]
+.LBE242:
+	.loc 2 202 0
+	mov	w0, 65533
+	cmp	w0, w1, uxth
+	bcs	.L450
+	.loc 2 203 0
+	ldrh	w2, [x20, 6]
+	mov	w1, w21
+	mov	x0, x23
+	bl	printk
+.LVL483:
+	.loc 2 205 0
+	b	.L445
+.L446:
+	.loc 2 199 0
+	adrp	x0, .LC78
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC78
+	bl	printk
+.LVL484:
+.L449:
+	b	.L449
+.L450:
+	.loc 2 208 0
+	mov	w0, w21
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL485:
+	ldp	x29, x30, [sp], 64
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE182:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB194:
+	.loc 2 562 0
+	.cfi_startproc
+.LVL486:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 566 0
+	mov	w20, 0
+.LVL487:
+	ldrh	w1, [x0, 10]
+	ldr	x0, [x0, 16]
+.LVL488:
+.L453:
+	.loc 2 566 0 is_stmt 0 discriminator 1
+	cmp	w20, w1
+	beq	.L457
+	.loc 2 567 0 is_stmt 1
+	mov	x21, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L454
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL489:
+	and	w1, w0, 65535
+	strh	w0, [x21]
+	.loc 2 569 0
+	sub	w2, w1, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcs	.L455
+	.loc 2 570 0
+	adrp	x0, .LANCHOR0+238
+	ldrh	w2, [x0, #:lo12:.LANCHOR0+238]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printk
+.LVL490:
+.L456:
+	b	.L456
+.L455:
+	.loc 2 576 0
+	ldr	w0, [x19, 48]
+	.loc 2 574 0
+	strh	wzr, [x19, 2]
+	.loc 2 576 0
+	add	w0, w0, 1
+	str	w0, [x19, 48]
+	.loc 2 577 0
+	ldrh	w0, [x19, 8]
+	.loc 2 575 0
+	strh	w20, [x19]
+	.loc 2 577 0
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+.L457:
+	.loc 2 581 0
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L459
+.LBB245:
+.LBB246:
+	adrp	x1, .LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR1
+	adrp	x0, .LC1
+	mov	w2, 581
+	add	x1, x1, 192
+	add	x0, x0, :lo12:.LC1
+	bl	printk
+.LVL491:
+.L459:
+.LBE246:
+.LBE245:
+	.loc 2 583 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL492:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL493:
+.L454:
+	.cfi_restore_state
+	.loc 2 566 0 discriminator 2
+	add	w20, w20, 1
+.LVL494:
+	and	w20, w20, 65535
+.LVL495:
+	b	.L453
+	.cfi_endproc
+.LFE194:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB266:
+	.loc 1 201 0
+	.cfi_startproc
+.LVL496:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 1 202 0
+	uxtw	x2, w2
+.LVL497:
+	.loc 1 201 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 1 202 0
+	bl	memset
+.LVL498:
+	.loc 1 203 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE266:
+	.size	ftl_memset, .-ftl_memset
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB145:
+	.loc 3 279 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	.loc 3 297 0
+	mov	w0, 65535
+	.loc 3 279 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 3 282 0
+	adrp	x20, .LANCHOR0
+	add	x19, x20, :lo12:.LANCHOR0
+	.loc 3 279 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 287 0
+	add	x1, x19, 2560
 	.loc 3 291 0
 	add	x2, x19, 2560
 	.loc 3 305 0
-	strh	wzr, [x19, 3232]
+	strh	wzr, [x19, 3216]
 	.loc 3 306 0
-	strh	wzr, [x19, 3316]
+	strh	wzr, [x19, 3300]
 	.loc 3 287 0
-	stp	wzr, wzr, [x1, 220]
-	stp	wzr, wzr, [x1, 228]
+	stp	wzr, wzr, [x1, 4]
+	stp	wzr, wzr, [x1, 12]
 	.loc 3 288 0
-	str	wzr, [x19, 2540]
+	str	wzr, [x19, 2580]
 	.loc 3 284 0
-	str	wzr, [x19, 2544]
+	str	wzr, [x19, 2584]
 	.loc 3 291 0
-	stp	wzr, wzr, [x2, -4]
-	stp	wzr, wzr, [x2, 4]
+	stp	wzr, wzr, [x2, 36]
+	stp	wzr, wzr, [x2, 44]
 	.loc 3 297 0
-	str	w0, [x19, 3956]
+	str	w0, [x19, 3948]
 	.loc 3 301 0
 	mov	w0, -1
-	strh	w0, [x19, 3312]
+	strh	w0, [x19, 3296]
 	.loc 3 302 0
-	strh	w0, [x19, 3314]
+	strh	w0, [x19, 3298]
 	.loc 3 303 0
 	mov	w0, 32
 	.loc 3 292 0
-	str	wzr, [x19, 2576]
+	str	wzr, [x19, 2616]
 	.loc 3 303 0
-	strh	w0, [x19, 3224]
+	strh	w0, [x19, 3208]
 	.loc 3 304 0
 	mov	w0, 128
 	.loc 3 293 0
-	str	wzr, [x19, 2580]
+	str	wzr, [x19, 2620]
 	.loc 3 304 0
-	strh	w0, [x19, 3226]
+	strh	w0, [x19, 3210]
 	.loc 3 294 0
-	str	wzr, [x19, 2584]
+	str	wzr, [x19, 2624]
 	.loc 3 299 0
-	str	wzr, [x19, 3228]
+	str	wzr, [x19, 3212]
 	.loc 3 296 0
-	str	wzr, [x19, 3236]
+	str	wzr, [x19, 3220]
 	.loc 3 300 0
-	str	wzr, [x19, 3920]
+	str	wzr, [x19, 3912]
 	.loc 3 295 0
-	str	wzr, [x19, 3952]
+	str	wzr, [x19, 3944]
 	.loc 3 298 0
-	str	wzr, [x19, 3960]
+	str	wzr, [x19, 3952]
 	.loc 3 307 0
-	strh	wzr, [x19, 3354]
+	strh	wzr, [x19, 3338]
 	.loc 3 310 0
 	ldrh	w0, [x19, 86]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL490:
+.LVL499:
 	.loc 3 311 0
 	ldrh	w1, [x19, 86]
 	.loc 3 310 0
-	str	x0, [x19, 3288]
+	str	x0, [x19, 3272]
 	.loc 3 311 0
 	mov	w0, 12
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL491:
+.LVL500:
 	.loc 3 312 0
 	ldrh	w21, [x19, 12]
 	.loc 3 311 0
-	str	x0, [x19, 3304]
+	str	x0, [x19, 3288]
 	.loc 3 312 0
 	lsl	w22, w21, 5
 	.loc 3 313 0
 	lsl	w21, w21, 7
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL492:
-	str	x0, [x19, 3968]
+.LVL501:
+	str	x0, [x19, 3960]
 	.loc 3 314 0
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL493:
-	str	x0, [x19, 3976]
+.LVL502:
+	str	x0, [x19, 3968]
 	.loc 3 315 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL494:
-	str	x0, [x19, 3984]
+.LVL503:
+	str	x0, [x19, 3976]
 	.loc 3 316 0
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL495:
-	str	x0, [x19, 3912]
+.LVL504:
+	str	x0, [x19, 3904]
 	.loc 3 317 0
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL496:
-	str	x0, [x19, 3272]
+.LVL505:
+	str	x0, [x19, 3256]
 	.loc 3 320 0
 	ldrh	w0, [x19, 12]
 	.loc 3 319 0
@@ -5996,202 +6116,202 @@ FtlMemInit:
 	.loc 3 320 0
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x19, 3280]
+	str	w0, [x19, 3264]
 	.loc 3 321 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL497:
-	str	x0, [x19, 2288]
+.LVL506:
+	str	x0, [x19, 3376]
 	.loc 3 322 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL498:
-	str	x0, [x19, 3992]
+.LVL507:
+	str	x0, [x19, 3984]
 	.loc 3 323 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL499:
-	str	x0, [x19, 4000]
+.LVL508:
+	str	x0, [x19, 3992]
 	.loc 3 324 0
-	ldr	w0, [x19, 3280]
+	ldr	w0, [x19, 3264]
 	mul	w0, w21, w0
 	bl	ftl_malloc
-.LVL500:
-	str	x0, [x19, 3256]
+.LVL509:
+	str	x0, [x19, 3240]
 	.loc 3 325 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL501:
-	str	x0, [x19, 3944]
+.LVL510:
+	str	x0, [x19, 3936]
 	.loc 3 326 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL502:
-	str	x0, [x19, 3928]
+.LVL511:
+	str	x0, [x19, 3920]
 	.loc 3 327 0
-	ldr	w1, [x19, 3280]
+	ldr	w1, [x19, 3264]
 	mov	w0, 24
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL503:
+.LVL512:
 	.loc 3 329 0
 	ldrh	w21, [x19, 92]
 	.loc 3 327 0
-	str	x0, [x19, 3248]
+	str	x0, [x19, 3232]
 	.loc 3 329 0
 	ldrh	w0, [x19, 12]
 	mul	w21, w21, w0
 	.loc 3 330 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL504:
-	str	x0, [x19, 3392]
+.LVL513:
+	str	x0, [x19, 3384]
 	.loc 3 331 0
 	lsl	w0, w21, 2
 	bl	ftl_malloc
-.LVL505:
-	str	x0, [x19, 3936]
+.LVL514:
+	str	x0, [x19, 3928]
 	.loc 3 332 0
 	ldrh	w1, [x19, 92]
-	ldr	w0, [x19, 3280]
+	ldr	w0, [x19, 3264]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL506:
-	str	x0, [x19, 3264]
+.LVL515:
+	str	x0, [x19, 3248]
 	.loc 3 335 0
 	ldrh	w0, [x19, 22]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x19, 4008]
+	strh	w0, [x19, 4000]
 	.loc 3 336 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL507:
-	str	x0, [x19, 4016]
+.LVL516:
+	str	x0, [x19, 4008]
 	.loc 3 337 0
-	ldrh	w0, [x19, 4008]
+	ldrh	w0, [x19, 4000]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x19, 4008]
+	strh	w0, [x19, 4000]
 	.loc 3 338 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL508:
+.LVL517:
 	.loc 3 345 0
 	ldrh	w21, [x19, 22]
 	.loc 3 338 0
-	str	x0, [x19, 4024]
+	str	x0, [x19, 4016]
 	.loc 3 339 0
 	add	x0, x0, 32
-	str	x0, [x19, 2296]
+	str	x0, [x19, 2360]
 	.loc 3 345 0
 	lsl	w21, w21, 1
 	.loc 3 347 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL509:
-	str	x0, [x19, 4032]
+.LVL518:
+	str	x0, [x19, 4024]
 	.loc 3 349 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL510:
+.LVL519:
 	.loc 3 350 0
 	ldr	w21, [x19, 108]
 	.loc 3 349 0
-	str	x0, [x19, 2320]
+	str	x0, [x19, 2352]
 	.loc 3 350 0
 	lsl	w21, w21, 1
 	.loc 3 351 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL511:
-	str	x0, [x19, 4040]
+.LVL520:
+	str	x0, [x19, 4032]
 	.loc 3 352 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL512:
-	str	x0, [x19, 4048]
+.LVL521:
+	str	x0, [x19, 4040]
 	.loc 3 353 0
 	ldrh	w0, [x19, 22]
-	.loc 3 367 0
+	.loc 3 370 0
 	adrp	x21, .LANCHOR3
-	add	x22, x21, :lo12:.LANCHOR3
+	add	x21, x21, :lo12:.LANCHOR3
 	.loc 3 353 0
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL513:
+.LVL522:
 	str	x0, [x20, #:lo12:.LANCHOR0]
 	.loc 3 354 0
 	ldrh	w0, [x19, 100]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL514:
+.LVL523:
 	str	x0, [x19, 128]
 	.loc 3 355 0
 	ldrh	w0, [x19, 100]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL515:
-	str	x0, [x19, 4056]
+.LVL524:
+	str	x0, [x19, 4048]
 	.loc 3 356 0
 	ldrh	w0, [x19, 100]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL516:
-	str	x0, [x19, 4064]
+.LVL525:
+	str	x0, [x19, 4056]
 	.loc 3 357 0
 	ldrh	w0, [x19, 102]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL517:
+.LVL526:
 	.loc 3 358 0
 	ldrh	w2, [x19, 102]
 	mov	w1, 0
 	.loc 3 357 0
-	str	x0, [x19, 4072]
+	str	x0, [x19, 4064]
 	.loc 3 358 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL518:
+.LVL527:
 	.loc 3 360 0
 	ldrh	w0, [x19, 116]
 	.loc 3 361 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL519:
-	str	x0, [x19, 4080]
+.LVL528:
+	str	x0, [x19, 4072]
 	.loc 3 362 0
 	ldr	w0, [x19, 108]
 	.loc 3 363 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL520:
-	str	x0, [x19, 4088]
+.LVL529:
+	str	x0, [x19, 4080]
 	.loc 3 364 0
 	ldrh	w0, [x19, 118]
 	.loc 3 365 0
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-.LVL521:
+.LVL530:
 	.loc 3 366 0
 	ldrh	w1, [x19, 118]
 	.loc 3 365 0
-	str	x0, [x19, 2504]
+	str	x0, [x19, 2544]
 	.loc 3 366 0
 	ldrh	w0, [x19, 90]
 	.loc 3 367 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL522:
-	str	x0, [x22, -256]
+.LVL531:
+	str	x0, [x19, 4088]
 	.loc 3 368 0
 	ldrh	w1, [x19, 22]
 	.loc 3 369 0
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL523:
-	str	x0, [x19, 2304]
+.LVL532:
+	str	x0, [x19, 2336]
 	.loc 3 370 0
 	ldrh	w0, [x19, 78]
 	.loc 3 371 0
@@ -6199,15 +6319,15 @@ FtlMemInit:
 	.loc 3 370 0
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x22, -248]
+	strh	w0, [x21, -256]
 	.loc 3 371 0
 	mul	w0, w1, w0
 	.loc 3 372 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL524:
+.LVL533:
 	.loc 3 374 0
-	ldrh	w4, [x22, -248]
+	ldrh	w4, [x21, -256]
 	add	x5, x19, 176
 	.loc 3 373 0
 	ldrh	w6, [x19, 34]
@@ -6217,11 +6337,11 @@ FtlMemInit:
 	.loc 3 373 0
 	mov	w2, w4
 	mov	x0, x20
-.L455:
-.LVL525:
+.L464:
+.LVL534:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	cmp	w1, w6
-	bcc	.L456
+	bcc	.L465
 	mov	w2, 8
 	.loc 3 379 0 is_stmt 1
 	add	x4, x0, :lo12:.LANCHOR0
@@ -6230,28 +6350,28 @@ FtlMemInit:
 	add	x2, x2, 1
 	.loc 3 373 0
 	mov	x3, 0
-.L457:
+.L466:
 	add	x3, x3, 1
 	.loc 3 377 0 discriminator 1
 	cmp	x3, x2
-	bne	.L458
+	bne	.L467
 	.loc 3 383 0
 	add	x1, x0, :lo12:.LANCHOR0
-.LVL526:
-	ldr	x2, [x1, 4040]
-	cbnz	x2, .L459
-.L461:
+.LVL535:
+	ldr	x2, [x1, 4032]
+	cbnz	x2, .L468
+.L470:
 	.loc 3 385 0
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 224
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	printk
-.LVL527:
+.LVL536:
 	.loc 3 386 0
 	mov	w0, -1
-.L454:
+.L463:
 	.loc 3 484 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6265,130 +6385,129 @@ FtlMemInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL528:
-.L456:
+.LVL537:
+.L465:
 	.cfi_restore_state
 	.loc 3 374 0 discriminator 3
 	ldr	x3, [x19, 168]
 	.loc 3 373 0 discriminator 3
 	add	w1, w1, 1
-.LVL529:
+.LVL538:
 	.loc 3 374 0 discriminator 3
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x5], 8
-	b	.L455
-.LVL530:
-.L458:
+	b	.L464
+.LVL539:
+.L467:
 	.loc 3 379 0 discriminator 2
 	add	x5, x1, x3
 	add	x5, x4, x5, lsl 3
 	str	xzr, [x5, 24]
-	b	.L457
-.LVL531:
-.L459:
+	b	.L466
+.LVL540:
+.L468:
 	.loc 3 388 0
-	ldr	x2, [x1, 4048]
-	cbz	x2, .L461
+	ldr	x2, [x1, 4040]
+	cbz	x2, .L470
 	.loc 3 393 0
-	ldr	x2, [x1, 4080]
-	cbz	x2, .L461
+	ldr	x2, [x1, 4072]
+	cbz	x2, .L470
 	.loc 3 398 0
-	ldr	x2, [x1, 4088]
-	cbz	x2, .L461
+	ldr	x2, [x1, 4080]
+	cbz	x2, .L470
 	.loc 3 404 0
-	ldr	x2, [x1, 2504]
-	cbz	x2, .L461
+	ldr	x2, [x1, 2544]
+	cbz	x2, .L470
 	.loc 3 409 0
-	add	x21, x21, :lo12:.LANCHOR3
-	ldr	x2, [x21, -256]
-	cbz	x2, .L461
+	ldr	x2, [x1, 4088]
+	cbz	x2, .L470
 	.loc 3 414 0
-	ldr	x2, [x1, 2304]
-	cbz	x2, .L461
+	ldr	x2, [x1, 2336]
+	cbz	x2, .L470
 	.loc 3 419 0
 	ldr	x2, [x1, 168]
-	cbz	x2, .L461
+	cbz	x2, .L470
 	.loc 3 425 0
-	ldr	x1, [x1, 2320]
-	cbz	x1, .L461
+	ldr	x1, [x1, 2352]
+	cbz	x1, .L470
 	.loc 3 430 0
 	add	x1, x0, :lo12:.LANCHOR0
-	ldr	x2, [x1, 3288]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3272]
+	cbz	x2, .L470
 	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3304]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3288]
+	cbz	x2, .L470
 	.loc 3 435 0 is_stmt 1
-	ldr	x2, [x1, 3968]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3960]
+	cbz	x2, .L470
 	.loc 3 435 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3984]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3976]
+	cbz	x2, .L470
 	.loc 3 435 0 discriminator 2
-	ldr	x2, [x1, 3912]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3904]
+	cbz	x2, .L470
 	.loc 3 435 0 discriminator 3
-	ldr	x2, [x1, 3272]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3256]
+	cbz	x2, .L470
 	.loc 3 435 0 discriminator 4
-	ldr	x2, [x1, 3976]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3968]
+	cbz	x2, .L470
 	.loc 3 440 0 is_stmt 1
-	ldr	x2, [x1, 2288]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3376]
+	cbz	x2, .L470
 	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3992]
-	cbz	x2, .L461
+	ldr	x2, [x1, 3984]
+	cbz	x2, .L470
 	.loc 3 440 0 discriminator 2
-	ldr	x1, [x1, 4000]
-	cbz	x1, .L461
+	ldr	x1, [x1, 3992]
+	cbz	x1, .L470
 	.loc 3 441 0 is_stmt 1 discriminator 3
 	add	x0, x0, :lo12:.LANCHOR0
 	.loc 3 440 0 discriminator 3
-	ldr	x1, [x0, 3256]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3240]
+	cbz	x1, .L470
 	.loc 3 441 0
-	ldr	x1, [x0, 3944]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3936]
+	cbz	x1, .L470
 	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 3928]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3920]
+	cbz	x1, .L470
 	.loc 3 441 0 discriminator 2
-	ldr	x1, [x0, 3248]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3232]
+	cbz	x1, .L470
 	.loc 3 446 0 is_stmt 1
-	ldr	x1, [x0, 3392]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3384]
+	cbz	x1, .L470
 	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 3936]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3928]
+	cbz	x1, .L470
 	.loc 3 446 0 discriminator 2
-	ldr	x1, [x0, 3264]
-	cbz	x1, .L461
+	ldr	x1, [x0, 3248]
+	cbz	x1, .L470
 	.loc 3 452 0 is_stmt 1
-	ldr	x1, [x0, 2296]
-	cbz	x1, .L461
+	ldr	x1, [x0, 2360]
+	cbz	x1, .L470
 	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 4016]
-	cbz	x1, .L461
+	ldr	x1, [x0, 4008]
+	cbz	x1, .L470
 	.loc 3 458 0 is_stmt 1
 	ldr	x0, [x0, 128]
-	cbz	x0, .L461
+	cbz	x0, .L470
 	.loc 3 464 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x1, [x0, 4056]
-	cbz	x1, .L461
+	ldr	x1, [x0, 4048]
+	cbz	x1, .L470
 	.loc 3 470 0
-	ldr	x1, [x0, 4064]
-	cbz	x1, .L461
+	ldr	x1, [x0, 4056]
+	cbz	x1, .L470
 	.loc 3 476 0
-	ldr	x0, [x0, 4072]
-	cbz	x0, .L461
+	ldr	x0, [x0, 4064]
+	cbz	x0, .L470
 	.loc 3 483 0
 	mov	w0, 0
-	b	.L454
+	b	.L463
 	.cfi_endproc
 .LFE145:
 	.size	FtlMemInit, .-FtlMemInit
@@ -6399,7 +6518,7 @@ FtlBbt2Bitmap:
 .LFB164:
 	.loc 4 66 0
 	.cfi_startproc
-.LVL532:
+.LVL541:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -6411,8 +6530,8 @@ FtlBbt2Bitmap:
 	.cfi_offset 22, -24
 	mov	x22, x0
 	.loc 4 69 0
-	adrp	x0, .LANCHOR3-248
-.LVL533:
+	adrp	x0, .LANCHOR3-256
+.LVL542:
 	.loc 4 66 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
@@ -6421,7 +6540,7 @@ FtlBbt2Bitmap:
 	adrp	x20, .LANCHOR1
 	add	x20, x20, :lo12:.LANCHOR1
 	.loc 4 69 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR3-248]
+	ldrh	w2, [x0, #:lo12:.LANCHOR3-256]
 	.loc 4 74 0
 	add	x20, x20, 240
 	.loc 4 66 0
@@ -6437,28 +6556,28 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL534:
+.LVL543:
 	mov	x0, x21
 	bl	ftl_memset
-.LVL535:
-.L559:
+.LVL544:
+.L568:
 	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L556
+	beq	.L565
 	.loc 4 74 0
 	ldrh	w1, [x23, 78]
 	cmp	w1, w0
-	bhi	.L558
+	bhi	.L567
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL536:
-.L558:
+.LVL545:
+.L567:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
@@ -6473,12 +6592,12 @@ FtlBbt2Bitmap:
 	orr	w1, w1, w2
 	str	w1, [x21, x0]
 	.loc 4 70 0 discriminator 2
-	bne	.L559
-.L556:
+	bne	.L568
+.L565:
 	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL537:
+.LVL546:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
@@ -6522,7 +6641,7 @@ FtlBbtMemInit:
 	strh	wzr, [x0, -6]
 	.loc 4 152 0
 	bl	ftl_memset
-.LVL538:
+.LVL547:
 	.loc 4 153 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -6539,7 +6658,7 @@ FtlFreeSysBlkQueueInit:
 .LFB176:
 	.loc 2 76 0
 	.cfi_startproc
-.LVL539:
+.LVL548:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -6558,7 +6677,7 @@ FtlFreeSysBlkQueueInit:
 	strh	w0, [x3, 232]
 	.loc 2 83 0
 	add	x0, x3, 240
-.LVL540:
+.LVL549:
 	.loc 2 79 0
 	strh	wzr, [x3, 234]
 	.loc 2 80 0
@@ -6567,7 +6686,7 @@ FtlFreeSysBlkQueueInit:
 	strh	wzr, [x3, 238]
 	.loc 2 83 0
 	bl	ftl_memset
-.LVL541:
+.LVL550:
 	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -6583,9 +6702,9 @@ FtlFreeSysBlkQueueInit:
 	.type	load_l2p_region, %function
 load_l2p_region:
 .LFB192:
-	.loc 2 442 0
+	.loc 2 488 0
 	.cfi_startproc
-.LVL542:
+.LVL551:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -6595,76 +6714,76 @@ load_l2p_region:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 446 0
+	.loc 2 492 0
 	adrp	x21, .LANCHOR0
-	.loc 2 442 0
+	.loc 2 488 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	and	w23, w0, 65535
-.LVL543:
-	.loc 2 446 0
+.LVL552:
+	.loc 2 492 0
 	add	x0, x21, :lo12:.LANCHOR0
-	.loc 2 442 0
+	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
 	str	x25, [sp, 64]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 25, -16
-	.loc 2 442 0
+	.loc 2 488 0
 	and	x19, x1, 65535
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	w0, [x0, 116]
 	cmp	w0, w23
-	bcs	.L568
-	.loc 2 446 0 is_stmt 0 discriminator 1
+	bcs	.L577
+	.loc 2 492 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
-.LVL544:
+.LVL553:
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 446
+	mov	w2, 492
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL545:
-.L568:
-	.loc 2 447 0 is_stmt 1
+.LVL554:
+.L577:
+	.loc 2 493 0 is_stmt 1
 	add	x20, x21, :lo12:.LANCHOR0
 	ubfiz	x0, x23, 2, 16
-	ldr	x1, [x20, 4080]
-.LVL546:
+	ldr	x1, [x20, 4072]
+.LVL555:
 	ldr	w24, [x1, x0]
-.LVL547:
-	.loc 2 449 0
-	cbnz	w24, .L569
-	.loc 2 450 0
-	ldr	x0, [x20, 2504]
-.LVL548:
+.LVL556:
+	.loc 2 495 0
+	cbnz	w24, .L578
+	.loc 2 496 0
+	ldr	x0, [x20, 2544]
+.LVL557:
 	lsl	x19, x19, 4
-.LVL549:
+.LVL558:
 	ldrh	w2, [x20, 90]
 	mov	w1, 255
 	add	x0, x0, x19
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL550:
-	.loc 2 451 0
-	ldr	x0, [x20, 2504]
+.LVL559:
+	.loc 2 497 0
+	ldr	x0, [x20, 2544]
 	strh	w23, [x0, x19]
-	.loc 2 452 0
-	ldr	x0, [x20, 2504]
+	.loc 2 498 0
+	ldr	x0, [x20, 2544]
 	add	x19, x0, x19
 	str	wzr, [x19, 4]
-.LVL551:
-.L570:
-	.loc 2 473 0
+.LVL560:
+.L579:
+	.loc 2 519 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
-.LVL552:
+.LVL561:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL553:
+.LVL562:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -6678,89 +6797,89 @@ load_l2p_region:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL554:
-.L569:
+.LVL563:
+.L578:
 	.cfi_restore_state
-	.loc 2 456 0
-	ldr	x0, [x20, 2504]
-.LVL555:
+	.loc 2 502 0
+	ldr	x0, [x20, 2544]
+.LVL564:
 	lsl	x19, x19, 4
-.LVL556:
-	.loc 2 455 0
-	add	x22, x20, 3360
-	.loc 2 458 0
+.LVL565:
+	.loc 2 501 0
+	add	x22, x20, 3344
+	.loc 2 504 0
 	mov	w2, 1
-	.loc 2 456 0
+	.loc 2 502 0
 	add	x0, x0, x19
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	w1, w2
-	.loc 2 455 0
-	str	w24, [x20, 3364]
-	.loc 2 456 0
+	.loc 2 501 0
+	str	w24, [x20, 3348]
+	.loc 2 502 0
 	ldr	x0, [x0, 8]
-	str	x0, [x20, 3368]
-	.loc 2 457 0
-	ldr	x0, [x20, 3392]
-	str	x0, [x20, 3376]
-	.loc 2 458 0
+	str	x0, [x20, 3352]
+	.loc 2 503 0
+	ldr	x0, [x20, 3384]
+	str	x0, [x20, 3360]
+	.loc 2 504 0
 	mov	x0, x22
 	bl	FlashReadPages
-.LVL557:
-	.loc 2 459 0
-	ldr	x25, [x20, 3376]
-.LVL558:
-	.loc 2 461 0
+.LVL566:
+	.loc 2 505 0
+	ldr	x25, [x20, 3360]
+.LVL567:
+	.loc 2 507 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w23
-	beq	.L571
-	.loc 2 462 0
+	beq	.L580
+	.loc 2 508 0
 	mov	w2, w24
 	mov	w1, w23
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printk
-.LVL559:
-	.loc 2 463 0
-	ldr	x1, [x20, 3376]
+.LVL568:
+	.loc 2 509 0
+	ldr	x1, [x20, 3360]
 	mov	w3, 4
-	adrp	x0, .LC80
+	adrp	x0, .LC83
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC83
 	bl	rknand_print_hex
-.LVL560:
-	.loc 2 464 0
+.LVL569:
+	.loc 2 510 0
 	ldrh	w3, [x20, 116]
-	adrp	x0, .LC81
-	ldr	x1, [x20, 4080]
+	adrp	x0, .LC84
+	ldr	x1, [x20, 4072]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC84
 	bl	rknand_print_hex
-.LVL561:
-.L571:
-	.loc 2 467 0
+.LVL570:
+.L580:
+	.loc 2 513 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w23
-	beq	.L572
-	.loc 2 467 0 is_stmt 0 discriminator 1
+	beq	.L581
+	.loc 2 513 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 467
+	mov	w2, 513
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL562:
-.L572:
-	.loc 2 470 0 is_stmt 1
+.LVL571:
+.L581:
+	.loc 2 516 0 is_stmt 1
 	add	x21, x21, :lo12:.LANCHOR0
-	ldr	x0, [x21, 2504]
+	ldr	x0, [x21, 2544]
 	add	x0, x0, x19
 	str	wzr, [x0, 4]
-	.loc 2 471 0
-	ldr	x0, [x21, 2504]
+	.loc 2 517 0
+	ldr	x0, [x21, 2544]
 	strh	w23, [x0, x19]
-	.loc 2 472 0
-	b	.L570
+	.loc 2 518 0
+	b	.L579
 	.cfi_endproc
 .LFE192:
 	.size	load_l2p_region, .-load_l2p_region
@@ -6769,16 +6888,16 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 .LFB193:
-	.loc 2 476 0
+	.loc 2 522 0
 	.cfi_startproc
-.LVL563:
+.LVL572:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 2 485 0
+	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 476 0
+	.loc 2 522 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -6794,56 +6913,56 @@ ftl_free_no_use_map_blk:
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 485 0
+	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 478 0
+	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-.LVL564:
-	.loc 2 477 0
+.LVL573:
+	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL565:
-	.loc 2 485 0
+.LVL574:
+	.loc 2 531 0
 	lsl	w2, w2, 1
 	mov	x0, x21
-.LVL566:
+.LVL575:
 	bl	ftl_memset
-.LVL567:
-	.loc 2 486 0
+.LVL576:
+	.loc 2 532 0
 	mov	w0, 0
-.LVL568:
-.L575:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL577:
+.L584:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L579
-	.loc 2 494 0 is_stmt 1
+	bhi	.L588
+	.loc 2 540 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL569:
-	.loc 2 498 0
+.LVL578:
+	.loc 2 544 0
 	adrp	x24, .LANCHOR0
 	add	x24, x24, :lo12:.LANCHOR0
-	.loc 2 495 0
+	.loc 2 541 0
 	mov	w25, 0
-.LVL570:
-	.loc 2 497 0
+.LVL579:
+	.loc 2 543 0
 	mov	w20, 0
-.LVL571:
-.L580:
-	.loc 2 497 0 is_stmt 0 discriminator 1
+.LVL580:
+.L589:
+	.loc 2 543 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
-.LVL572:
+.LVL581:
 	cmp	w0, w20
-	bhi	.L584
-	.loc 2 513 0 is_stmt 1
+	bhi	.L593
+	.loc 2 559 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL573:
+.LVL582:
 	ldp	x21, x22, [sp, 32]
-.LVL574:
+.LVL583:
 	ldp	x23, x24, [sp, 48]
-.LVL575:
+.LVL584:
 	ldp	x25, x26, [sp, 64]
-.LVL576:
+.LVL585:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -6858,88 +6977,88 @@ ftl_free_no_use_map_blk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL577:
-.L579:
+.LVL586:
+.L588:
 	.cfi_restore_state
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-.LVL578:
-	.loc 2 488 0
+.LVL587:
+	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL579:
-.L576:
-	.loc 2 488 0 discriminator 1
+.LVL588:
+.L585:
+	.loc 2 534 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L578
-	.loc 2 486 0 discriminator 2
+	bhi	.L587
+	.loc 2 532 0 discriminator 2
 	add	w0, w0, 1
-.LVL580:
+.LVL589:
 	and	w0, w0, 65535
-.LVL581:
-	b	.L575
-.L578:
-	.loc 2 489 0
+.LVL590:
+	b	.L584
+.L587:
+	.loc 2 535 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L577
-	.loc 2 490 0
+	bne	.L586
+	.loc 2 536 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L577:
-	.loc 2 488 0 discriminator 2
+.L586:
+	.loc 2 534 0 discriminator 2
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L576
-.LVL582:
-.L584:
-	.loc 2 498 0
+	b	.L585
+.LVL591:
+.L593:
+	.loc 2 544 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L581
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L590
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24, 84]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L581
-	.loc 2 499 0 is_stmt 1
+	bcs	.L590
+	.loc 2 545 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
-.L581:
-	.loc 2 500 0
+.L590:
+	.loc 2 546 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L582
+	bls	.L591
 	mov	w25, w20
 	mov	w26, w0
-.L582:
-	.loc 2 504 0
-	cbnz	w0, .L583
-	.loc 2 504 0 is_stmt 0 discriminator 1
+.L591:
+	.loc 2 550 0
+	cbnz	w0, .L592
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L583
-	.loc 2 506 0 is_stmt 1
+	cbz	w0, .L592
+	.loc 2 552 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL583:
-	.loc 2 507 0
+.LVL592:
+	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 508 0
+	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.LVL584:
-.L583:
-	.loc 2 497 0 discriminator 2
+.LVL593:
+.L592:
+	.loc 2 543 0 discriminator 2
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L580
+	b	.L589
 	.cfi_endproc
 .LFE193:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -6948,16 +7067,16 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 .LFB196:
-	.loc 2 583 0
+	.loc 2 632 0
 	.cfi_startproc
-.LVL585:
+.LVL594:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 591 0
+	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 583 0
+	.loc 2 632 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -6969,52 +7088,52 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL586:
-	.loc 2 591 0
+.LVL595:
+	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL587:
+.LVL596:
 	cmp	w0, w1
-	bne	.L590
-	.loc 2 592 0
+	bne	.L599
+	.loc 2 641 0
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L591
-	.loc 2 592 0 is_stmt 0 discriminator 1
+	cbz	w0, .L600
+	.loc 2 641 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 592
+	mov	w2, 641
 	add	x1, x1, 272
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL588:
-.L591:
-	.loc 2 593 0 is_stmt 1
+.LVL597:
+.L600:
+	.loc 2 642 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL589:
+.LVL598:
 	strh	w0, [x20]
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 597 0
+	.loc 2 646 0
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-.LVL590:
-.L592:
-	.loc 2 628 0
+.LVL599:
+.L601:
+	.loc 2 677 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
-.LVL591:
+.LVL600:
 	ldp	x19, x20, [sp, 16]
-.LVL592:
+.LVL601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -7027,110 +7146,110 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL593:
-.L590:
+.LVL602:
+.L599:
 	.cfi_restore_state
-	.loc 2 601 0
+	.loc 2 650 0
 	ubfiz	x0, x0, 1, 16
-	.loc 2 602 0
+	.loc 2 651 0
 	adrp	x21, .LANCHOR0
-	.loc 2 607 0
+	.loc 2 656 0
 	ldr	w1, [x19, 48]
-	.loc 2 587 0
+	.loc 2 636 0
 	ldr	x23, [x19, 40]
-.LVL594:
-	.loc 2 601 0
+.LVL603:
+	.loc 2 650 0
 	ldrh	w22, [x20, x0]
-	.loc 2 602 0
+	.loc 2 651 0
 	add	x20, x21, :lo12:.LANCHOR0
-.LVL595:
+.LVL604:
 	ldrh	w0, [x19, 2]
 	orr	w0, w0, w22, lsl 10
-	str	w0, [x20, 3364]
-	.loc 2 603 0
-	ldr	x0, [x20, 2288]
-	str	x0, [x20, 3368]
-	.loc 2 604 0
-	ldr	x0, [x20, 3392]
-	str	x0, [x20, 3376]
-	.loc 2 607 0
+	str	w0, [x20, 3348]
+	.loc 2 652 0
+	ldr	x0, [x20, 3376]
+	str	x0, [x20, 3352]
+	.loc 2 653 0
+	ldr	x0, [x20, 3384]
+	str	x0, [x20, 3360]
+	.loc 2 656 0
 	str	w1, [x0, 4]
-	.loc 2 608 0
+	.loc 2 657 0
 	mov	w1, -1291
 	strh	w1, [x0, 8]
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	w22, [x0, 2]
-	.loc 2 612 0
+	.loc 2 661 0
 	mov	w1, 255
 	ldrh	w2, [x20, 84]
-	ldr	x0, [x20, 2288]
+	ldr	x0, [x20, 3376]
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL596:
-	.loc 2 613 0
+.LVL605:
+	.loc 2 662 0
 	mov	w0, 0
-.LVL597:
-	.loc 2 614 0
+.LVL606:
+	.loc 2 663 0
 	mov	w1, 0
-.LVL598:
-.L593:
-	.loc 2 614 0 is_stmt 0 discriminator 1
+.LVL607:
+.L602:
+	.loc 2 663 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x19, 6]
 	cmp	w2, w1
-	bhi	.L595
-	.loc 2 621 0 is_stmt 1
+	bhi	.L604
+	.loc 2 670 0 is_stmt 1
 	add	x0, x21, :lo12:.LANCHOR0
-.LVL599:
+.LVL608:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-.LVL600:
-	add	x0, x0, 3360
+.LVL609:
+	add	x0, x0, 3344
 	bl	FlashProgPages
-.LVL601:
-	.loc 2 622 0
+.LVL610:
+	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL602:
-	.loc 2 627 0
-	b	.L592
-.LVL603:
-.L595:
-	.loc 2 615 0
+.LVL611:
+	.loc 2 676 0
+	b	.L601
+.LVL612:
+.L604:
+	.loc 2 664 0
 	ubfiz	x2, x1, 2, 16
 	ldr	w3, [x23, x2]
 	cmp	w22, w3, lsr 10
-	bne	.L594
-	.loc 2 616 0
+	bne	.L603
+	.loc 2 665 0
 	add	w0, w0, 1
-.LVL604:
-	.loc 2 617 0
-	ldr	x4, [x20, 2288]
-	.loc 2 616 0
+.LVL613:
+	.loc 2 666 0
+	ldr	x4, [x20, 3376]
+	.loc 2 665 0
 	and	w0, w0, 65535
-.LVL605:
-	.loc 2 617 0
+.LVL614:
+	.loc 2 666 0
 	ubfiz	x3, x0, 3, 16
 	str	w1, [x4, x3]
-	.loc 2 618 0
+	.loc 2 667 0
 	ldr	w4, [x23, x2]
-	ldr	x2, [x20, 2288]
+	ldr	x2, [x20, 3376]
 	add	x2, x2, x3
 	str	w4, [x2, 4]
-.L594:
-	.loc 2 614 0 discriminator 2
+.L603:
+	.loc 2 663 0 discriminator 2
 	add	w1, w1, 1
-.LVL606:
+.LVL615:
 	and	w1, w1, 65535
-.LVL607:
-	b	.L593
+.LVL616:
+	b	.L602
 	.cfi_endproc
 .LFE196:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7139,9 +7258,9 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 .LFB197:
-	.loc 2 631 0
+	.loc 2 680 0
 	.cfi_startproc
-.LVL608:
+.LVL617:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -7151,11 +7270,11 @@ FtlMapWritePage:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 2 637 0
+	.loc 2 686 0
 	adrp	x23, .LANCHOR0
-	.loc 2 654 0
+	.loc 2 703 0
 	add	x24, x23, :lo12:.LANCHOR0
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -80
@@ -7164,189 +7283,189 @@ FtlMapWritePage:
 	.cfi_offset 22, -56
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	.loc 2 650 0
+	.loc 2 699 0
 	adrp	x22, .LANCHOR1
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 631 0
+	.loc 2 680 0
 	mov	w26, w1
 	mov	x27, x2
 	mov	x25, x23
-	.loc 2 650 0
+	.loc 2 699 0
 	add	x22, x22, :lo12:.LANCHOR1
-	.loc 2 654 0
-	add	x20, x24, 3360
-	.loc 2 634 0
+	.loc 2 703 0
+	add	x20, x24, 3344
+	.loc 2 683 0
 	mov	w21, 0
-.LVL609:
-.L601:
-	.loc 2 637 0
+.LVL618:
+.L610:
+	.loc 2 686 0
 	add	x0, x23, :lo12:.LANCHOR0
-	ldr	w1, [x0, 2540]
+	ldr	w1, [x0, 2580]
 	add	w1, w1, 1
-	str	w1, [x0, 2540]
-	.loc 2 638 0
+	str	w1, [x0, 2580]
+	.loc 2 687 0
 	ldrh	w0, [x0, 84]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L602
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L611
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L603
-.L602:
-	.loc 2 639 0 is_stmt 1
+	bne	.L612
+.L611:
+	.loc 2 688 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL610:
-.L603:
-	.loc 2 650 0
+.LVL619:
+.L612:
+	.loc 2 699 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L604
-	.loc 2 650 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L613
+	.loc 2 699 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 650
+	mov	w2, 699
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL611:
-.L604:
-	.loc 2 651 0 is_stmt 1
+.LVL620:
+.L613:
+	.loc 2 700 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L605
-	.loc 2 651 0 is_stmt 0 discriminator 1
+	bcc	.L614
+	.loc 2 700 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 651
+	mov	w2, 700
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL612:
-.L605:
-	.loc 2 652 0 is_stmt 1
+.LVL621:
+.L614:
+	.loc 2 701 0 is_stmt 1
 	ldrh	w1, [x19]
-	.loc 2 658 0
+	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 652 0
+	.loc 2 701 0
 	ldr	x0, [x19, 16]
 	ldrh	w28, [x0, x1, lsl 1]
-	.loc 2 658 0
+	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 654 0
+	.loc 2 703 0
 	ldrh	w0, [x19, 2]
-	.loc 2 655 0
+	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 654 0
+	.loc 2 703 0
 	orr	w0, w0, w28, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 656 0
-	ldr	x0, [x24, 3392]
+	.loc 2 705 0
+	ldr	x0, [x24, 3384]
 	str	x0, [x20, 16]
-	.loc 2 658 0
+	.loc 2 707 0
 	bl	ftl_memset
-.LVL613:
-	.loc 2 659 0
+.LVL622:
+	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL614:
-	.loc 2 664 0
+.LVL623:
+	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 660 0
+	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w2, w3
-	.loc 2 661 0
+	.loc 2 710 0
 	strh	w26, [x0, 8]
-	.loc 2 660 0
+	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w1, w3
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	w28, [x0, 2]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	x0, x20
-.LVL615:
+.LVL624:
 	bl	FlashProgPages
-.LVL616:
-	.loc 2 665 0
+.LVL625:
+	.loc 2 714 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 667 0
+	.loc 2 716 0
 	ldr	w1, [x20]
 	cmn	w1, #1
-	bne	.L606
-	.loc 2 668 0
+	bne	.L615
+	.loc 2 717 0
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	.loc 2 669 0
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	.loc 2 718 0
 	add	w21, w21, 1
-.LVL617:
+.LVL626:
 	and	w21, w21, 65535
-.LVL618:
-	.loc 2 668 0
+.LVL627:
+	.loc 2 717 0
 	bl	printk
-.LVL619:
-	.loc 2 670 0
+.LVL628:
+	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L607
-	.loc 2 671 0
+	bhi	.L616
+	.loc 2 720 0
 	ldrh	w0, [x24, 84]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L607:
-	.loc 2 673 0
+.L616:
+	.loc 2 722 0
 	cmp	w21, 3
-	bls	.L608
-	.loc 2 674 0
+	bls	.L617
+	.loc 2 723 0
 	add	x25, x25, :lo12:.LANCHOR0
-	adrp	x0, .LC83
+	adrp	x0, .LC86
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC83
-	ldr	w1, [x25, 3364]
+	add	x0, x0, :lo12:.LC86
+	ldr	w1, [x25, 3348]
 	bl	printk
-.LVL620:
-.L609:
-	b	.L609
-.L608:
-	.loc 2 678 0
-	ldr	w0, [x19, 52]
-	cbz	w0, .L601
+.LVL629:
 .L618:
 	b	.L618
-.L606:
-	.loc 2 682 0
+.L617:
+	.loc 2 727 0
+	ldr	w0, [x19, 52]
+	cbz	w0, .L610
+.L627:
+	b	.L627
+.L615:
+	.loc 2 731 0
 	cmp	w0, 1
-	beq	.L601
-	.loc 2 685 0
+	beq	.L610
+	.loc 2 734 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w26, uxtw 2]
-	.loc 2 687 0
+	.loc 2 736 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL621:
+.LVL630:
 	ldp	x21, x22, [sp, 32]
-.LVL622:
+.LVL631:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL623:
+.LVL632:
 	ldp	x27, x28, [sp, 80]
-.LVL624:
+.LVL633:
 	ldp	x29, x30, [sp], 96
 	.cfi_restore 30
 	.cfi_restore 29
@@ -7370,9 +7489,9 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 .LFB195:
-	.loc 2 537 0
+	.loc 2 586 0
 	.cfi_startproc
-.LVL625:
+.LVL634:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -7396,98 +7515,98 @@ ftl_map_blk_gc:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL626:
-	.loc 2 542 0
+.LVL635:
+	.loc 2 591 0
 	ldr	x25, [x0, 40]
-.LVL627:
-	.loc 2 545 0
+.LVL636:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL628:
-	.loc 2 547 0
+.LVL637:
+	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L621
-	.loc 2 548 0
+	blt	.L630
+	.loc 2 597 0
 	ubfiz	x0, x0, 1, 16
 	ldrh	w24, [x20, x0]
-.LVL629:
-	.loc 2 549 0
-	cbz	w24, .L621
-	.loc 2 549 0 is_stmt 0 discriminator 1
+.LVL638:
+	.loc 2 598 0
+	cbz	w24, .L630
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L621
-	.loc 2 550 0 is_stmt 1
+	cbnz	w1, .L630
+	.loc 2 599 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 552 0
+	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 84]
 	cmp	w1, w0
-	bcc	.L622
-	.loc 2 554 0
+	bcc	.L631
+	.loc 2 603 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL630:
-.L622:
-	.loc 2 558 0 discriminator 1
+.LVL639:
+.L631:
+	.loc 2 607 0 discriminator 1
 	add	x26, x22, :lo12:.LANCHOR0
-	.loc 2 564 0 discriminator 1
+	.loc 2 613 0 discriminator 1
 	adrp	x23, .LANCHOR1
 	add	x23, x23, :lo12:.LANCHOR1
-	.loc 2 558 0 discriminator 1
-	add	x21, x26, 3360
-	.loc 2 564 0 discriminator 1
+	.loc 2 607 0 discriminator 1
+	add	x21, x26, 3344
+	.loc 2 613 0 discriminator 1
 	add	x23, x23, 320
-	.loc 2 537 0 discriminator 1
+	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL631:
-.L623:
-	.loc 2 556 0 discriminator 1
+.LVL640:
+.L632:
+	.loc 2 605 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L627
-	.loc 2 572 0
+	bhi	.L636
+	.loc 2 621 0
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.LVL632:
-	.loc 2 573 0
+.LVL641:
+	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL633:
-.L621:
-	.loc 2 577 0
+.LVL642:
+.L630:
+	.loc 2 626 0
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x22, 84]
 	cmp	w1, w0
-	bcc	.L628
-	.loc 2 578 0
+	bcc	.L637
+	.loc 2 627 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL634:
-.L628:
-	.loc 2 580 0
+.LVL643:
+.L637:
+	.loc 2 629 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL635:
+.LVL644:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL636:
+.LVL645:
 	ldp	x25, x26, [sp, 64]
-.LVL637:
+.LVL646:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
@@ -7505,64 +7624,64 @@ ftl_map_blk_gc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL638:
-.L627:
+.LVL647:
+.L636:
 	.cfi_restore_state
-	.loc 2 557 0
+	.loc 2 606 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w0, [x25, x27]
 	cmp	w24, w0, lsr 10
-	bne	.L624
-	.loc 2 559 0
-	ldr	x28, [x26, 3392]
-	.loc 2 562 0
+	bne	.L633
+	.loc 2 608 0
+	ldr	x28, [x26, 3384]
+	.loc 2 611 0
 	mov	w2, 1
-	.loc 2 558 0
-	ldr	x0, [x26, 3992]
-	.loc 2 562 0
+	.loc 2 607 0
+	ldr	x0, [x26, 3984]
+	.loc 2 611 0
 	mov	w1, w2
-	.loc 2 559 0
+	.loc 2 608 0
 	stp	x0, x28, [x21, 8]
-	.loc 2 560 0
+	.loc 2 609 0
 	ldr	w0, [x25, x27]
 	str	w0, [x21, 4]
-	.loc 2 562 0
+	.loc 2 611 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL639:
-	.loc 2 564 0
+.LVL648:
+	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L625
-	.loc 2 564 0 is_stmt 0 discriminator 1
+	beq	.L634
+	.loc 2 613 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 564
+	mov	w2, 613
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL640:
-.L625:
-	.loc 2 565 0 is_stmt 1
+.LVL649:
+.L634:
+	.loc 2 614 0 is_stmt 1
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L626
-	.loc 2 566 0
+	bne	.L635
+	.loc 2 615 0
 	str	wzr, [x25, x27]
-.L624:
-	.loc 2 556 0 discriminator 2
+.L633:
+	.loc 2 605 0 discriminator 2
 	add	w20, w20, 1
-.LVL641:
+.LVL650:
 	and	w20, w20, 65535
-.LVL642:
-	b	.L623
-.L626:
-	.loc 2 568 0
+.LVL651:
+	b	.L632
+.L635:
+	.loc 2 617 0
 	ldr	x2, [x21, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL643:
-	b	.L624
+.LVL652:
+	b	.L633
 	.cfi_endproc
 .LFE195:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
@@ -7571,9 +7690,9 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 .LFB198:
-	.loc 2 690 0
+	.loc 2 739 0
 	.cfi_startproc
-.LVL644:
+.LVL653:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -7583,28 +7702,28 @@ flush_l2p_region:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 693 0
+	.loc 2 742 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x20, x0, 4, 16
-	ldr	x0, [x19, 2504]
-.LVL645:
+	ldr	x0, [x19, 2544]
+.LVL654:
 	add	x1, x0, x20
-	.loc 2 694 0
+	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #240
+	sub	x0, x0, #248
 	bl	FtlMapWritePage
-.LVL646:
-	.loc 2 695 0
-	ldr	x0, [x19, 2504]
+.LVL655:
+	.loc 2 744 0
+	ldr	x0, [x19, 2544]
 	add	x0, x0, x20
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 697 0
+	.loc 2 746 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7622,9 +7741,9 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 .LFB201:
-	.loc 2 753 0
+	.loc 2 802 0
 	.cfi_startproc
-.LVL647:
+.LVL656:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7635,11 +7754,11 @@ log2phys:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	mov	w23, w2
-	.loc 2 756 0
+	.loc 2 805 0
 	adrp	x24, .LANCHOR0
 	add	x2, x24, :lo12:.LANCHOR0
-.LVL648:
-	.loc 2 753 0
+.LVL657:
+	.loc 2 802 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
@@ -7649,127 +7768,127 @@ log2phys:
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 25, -16
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	w19, [x2, 88]
 	add	w1, w19, 7
-.LVL649:
-	.loc 2 757 0
+.LVL658:
+	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	w21, w0, w1
 	and	w21, w21, 65535
-.LVL650:
-	.loc 2 757 0
+.LVL659:
+	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 759 0
-	ldr	w1, [x2, 2520]
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	w1, [x2, 2560]
+	.loc 2 806 0
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	.loc 2 759 0
+	.loc 2 808 0
 	cmp	w0, w1
-	.loc 2 757 0
+	.loc 2 806 0
 	and	x19, x19, 65535
-	.loc 2 759 0
-	bcc	.L636
-	.loc 2 759 0 is_stmt 0 discriminator 1
+	.loc 2 808 0
+	bcc	.L645
+	.loc 2 808 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL651:
-	mov	w2, 759
+.LVL660:
+	mov	w2, 808
 	add	x1, x1, 336
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL652:
-.L636:
-	.loc 2 761 0 is_stmt 1
+.LVL661:
+.L645:
+	.loc 2 810 0 is_stmt 1
 	add	x0, x24, :lo12:.LANCHOR0
-.LVL653:
+.LVL662:
 	ldrh	w1, [x0, 118]
-	.loc 2 762 0
-	ldr	x2, [x0, 2504]
-	.loc 2 761 0
+	.loc 2 811 0
+	ldr	x2, [x0, 2544]
+	.loc 2 810 0
 	mov	x0, 0
-.LVL654:
-.L637:
+.LVL663:
+.L646:
 	and	x20, x0, 65535
-.LVL655:
-	.loc 2 761 0 is_stmt 0 discriminator 1
+.LVL664:
+	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L642
-	.loc 2 776 0 is_stmt 1
+	bcc	.L651
+	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL656:
+.LVL665:
 	and	x20, x0, 65535
-.LVL657:
-	.loc 2 777 0
+.LVL666:
+	.loc 2 826 0
 	add	x2, x24, :lo12:.LANCHOR0
-.LVL658:
+.LVL667:
 	ubfiz	x1, x20, 4, 16
-	.loc 2 776 0
+	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 777 0
-	ldr	x2, [x2, 2504]
+	.loc 2 826 0
+	ldr	x2, [x2, 2544]
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L643
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L652
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L643
-	.loc 2 778 0 is_stmt 1
+	tbz	w1, #31, .L652
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL659:
-.L643:
-	.loc 2 781 0
+.LVL668:
+.L652:
+	.loc 2 830 0
 	mov	w1, w25
 	mov	w0, w21
 	bl	load_l2p_region
-.LVL660:
-	.loc 2 782 0
-	b	.L638
-.L642:
+.LVL669:
+	.loc 2 831 0
+	b	.L647
+.L651:
 	add	x0, x0, 1
-	.loc 2 762 0
+	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w21
-	bne	.L637
-.L638:
-	.loc 2 764 0
-	cbnz	w23, .L639
-	.loc 2 765 0
+	bne	.L646
+.L647:
+	.loc 2 813 0
+	cbnz	w23, .L648
+	.loc 2 814 0
 	add	x0, x24, :lo12:.LANCHOR0
-	ldr	x0, [x0, 2504]
+	ldr	x0, [x0, 2544]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
-.LVL661:
+.LVL670:
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x22]
-.L640:
-	.loc 2 771 0
+.L649:
+	.loc 2 820 0
 	add	x24, x24, :lo12:.LANCHOR0
-	ldr	x0, [x24, 2504]
+	ldr	x0, [x24, 2544]
 	add	x20, x0, x20, lsl 4
-.LVL662:
+.LVL671:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L645
-	.loc 2 772 0
+	beq	.L654
+	.loc 2 821 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L645:
-	.loc 2 783 0
+.L654:
+	.loc 2 832 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL663:
+.LVL672:
 	ldp	x21, x22, [sp, 32]
-.LVL664:
+.LVL673:
 	ldp	x23, x24, [sp, 48]
-.LVL665:
+.LVL674:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -7783,28 +7902,28 @@ log2phys:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL666:
-.L639:
+.LVL675:
+.L648:
 	.cfi_restore_state
-	.loc 2 767 0
+	.loc 2 816 0
 	add	x2, x24, :lo12:.LANCHOR0
 	lsl	x0, x20, 4
 	mov	x1, x0
 	ldr	w4, [x22]
-	ldr	x3, [x2, 2504]
+	ldr	x3, [x2, 2544]
 	add	x0, x3, x0
 	ldr	x0, [x0, 8]
-.LVL667:
+.LVL676:
 	str	w4, [x0, x19, lsl 2]
-	.loc 2 769 0
-	strh	w21, [x2, 2512]
-	.loc 2 768 0
-	ldr	x0, [x2, 2504]
+	.loc 2 818 0
+	strh	w21, [x2, 2552]
+	.loc 2 817 0
+	ldr	x0, [x2, 2544]
 	add	x0, x0, x1
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	b	.L640
+	b	.L649
 	.cfi_endproc
 .LFE201:
 	.size	log2phys, .-log2phys
@@ -7813,9 +7932,9 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 .LFB219:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	.cfi_startproc
-.LVL668:
+.LVL677:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7827,111 +7946,111 @@ FtlReUsePrevPpa:
 	.cfi_offset 22, -40
 	mov	w21, w0
 	stp	x19, x20, [sp, 16]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL669:
-	.loc 2 1628 0
+.LVL678:
+	.loc 2 1677 0
 	str	w1, [x29, 76]
-	.loc 2 1631 0
+	.loc 2 1680 0
 	adrp	x22, .LANCHOR0
-	.loc 2 1628 0
+	.loc 2 1677 0
 	str	x23, [sp, 48]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 23, -32
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL670:
-	.loc 2 1631 0
+.LVL679:
+	.loc 2 1680 0
 	add	x2, x22, :lo12:.LANCHOR0
-	.loc 2 1629 0
+	.loc 2 1678 0
 	and	w0, w0, 65535
-.LVL671:
-	.loc 2 1631 0
+.LVL680:
+	.loc 2 1680 0
 	ubfiz	x20, x0, 1, 16
-	ldr	x3, [x2, 2320]
+	ldr	x3, [x2, 2352]
 	ldrh	w1, [x3, x20]
-.LVL672:
-	cbnz	w1, .L651
-	.loc 2 1632 0
-	ldr	x19, [x2, 2344]
-	cbz	x19, .L652
-.LBB219:
-	.loc 2 1635 0
-	ldrh	w3, [x2, 2352]
-.LVL673:
-	.loc 2 1636 0
+.LVL681:
+	cbnz	w1, .L660
+	.loc 2 1681 0
+	ldr	x19, [x2, 2384]
+	cbz	x19, .L661
+.LBB247:
+	.loc 2 1684 0
+	ldrh	w3, [x2, 2392]
+.LVL682:
+	.loc 2 1685 0
 	mov	x4, -6148914691236517206
-	ldr	x2, [x2, 2304]
+	ldr	x2, [x2, 2336]
 	movk	x4, 0xaaab, lsl 0
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	w5, 65535
-	.loc 2 1636 0
+	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x4
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	w4, 6
-	.loc 2 1636 0
+	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL674:
-.L653:
-	.loc 2 1637 0 discriminator 1
+.LVL683:
+.L662:
+	.loc 2 1686 0 discriminator 1
 	cmp	w1, w3
-	beq	.L652
-	.loc 2 1638 0
+	beq	.L661
+	.loc 2 1687 0
 	cmp	w19, w0
-	bne	.L654
-	.loc 2 1639 0
+	bne	.L663
+	.loc 2 1688 0
 	add	x23, x22, :lo12:.LANCHOR0
 	mov	w1, w19
-.LVL675:
-	add	x0, x23, 2344
-.LVL676:
+.LVL684:
+	add	x0, x23, 2384
+.LVL685:
 	bl	List_remove_node
-.LVL677:
-	ldrh	w0, [x23, 2352]
-	cbnz	w0, .L655
-	.loc 2 1639 0 is_stmt 0 discriminator 1
+.LVL686:
+	ldrh	w0, [x23, 2392]
+	cbnz	w0, .L664
+	.loc 2 1688 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1639
+	mov	w2, 1688
 	add	x1, x1, 352
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL678:
-.L655:
-	.loc 2 1639 0 discriminator 3
+.LVL687:
+.L664:
+	.loc 2 1688 0 discriminator 3
 	add	x22, x22, :lo12:.LANCHOR0
-	ldrh	w0, [x22, 2352]
+	ldrh	w0, [x22, 2392]
 	sub	w0, w0, #1
-	strh	w0, [x22, 2352]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+	strh	w0, [x22, 2392]
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL679:
-	.loc 2 1641 0 discriminator 3
-	ldr	x1, [x22, 2320]
+.LVL688:
+	.loc 2 1690 0 discriminator 3
+	ldr	x1, [x22, 2352]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL680:
-.L652:
-.LBE219:
-	.loc 2 1652 0
+.LVL689:
+.L661:
+.LBE247:
+	.loc 2 1701 0
 	add	x1, x29, 76
-.LVL681:
+.LVL690:
 	mov	w2, 1
 	mov	w0, w21
-.LVL682:
+.LVL691:
 	bl	log2phys
-.LVL683:
-	.loc 2 1653 0
+.LVL692:
+	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
-.LVL684:
+.LVL693:
 	ldp	x21, x22, [sp, 32]
-.LVL685:
+.LVL694:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -7944,31 +8063,31 @@ FtlReUsePrevPpa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL686:
-.L654:
+.LVL695:
+.L663:
 	.cfi_restore_state
-.LBB220:
-	.loc 2 1644 0
+.LBB248:
+	.loc 2 1693 0
 	umull	x19, w19, w4
-.LVL687:
+.LVL696:
 	ldrh	w19, [x2, x19]
-.LVL688:
+.LVL697:
 	cmp	w19, w5
-	beq	.L652
-	.loc 2 1637 0 discriminator 2
+	beq	.L661
+	.loc 2 1686 0 discriminator 2
 	add	w1, w1, 1
-.LVL689:
+.LVL698:
 	and	w1, w1, 65535
-.LVL690:
-	b	.L653
-.LVL691:
-.L651:
-.LBE220:
-	.loc 2 1650 0
+.LVL699:
+	b	.L662
+.LVL700:
+.L660:
+.LBE248:
+	.loc 2 1699 0
 	add	w1, w1, 1
-.LVL692:
+.LVL701:
 	strh	w1, [x3, x20]
-	b	.L652
+	b	.L661
 	.cfi_endproc
 .LFE219:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -7977,15 +8096,15 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 .LFB230:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	.cfi_startproc
 	sub	sp, sp, #96
 	.cfi_def_cfa_offset 96
-	.loc 2 2280 0
-	adrp	x0, .LC84
+	.loc 2 2330 0
+	adrp	x0, .LC87
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC84
-	.loc 2 2275 0
+	add	x0, x0, :lo12:.LC87
+	.loc 2 2325 0
 	stp	x29, x30, [sp, 16]
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
@@ -7994,33 +8113,33 @@ ftl_scan_all_data:
 	stp	x21, x22, [sp, 48]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 2281 0
+	.loc 2 2331 0
 	adrp	x22, .LANCHOR0
-	.loc 2 2286 0
+	.loc 2 2336 0
 	add	x21, x22, :lo12:.LANCHOR0
-	.loc 2 2275 0
+	.loc 2 2325 0
 	stp	x19, x20, [sp, 32]
 	str	x23, [sp, 64]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 23, -32
-	.loc 2 2281 0
+	.loc 2 2331 0
 	mov	w20, 0
-.LVL693:
-	.loc 2 2286 0
-	add	x19, x21, 3360
-	.loc 2 2280 0
+.LVL702:
+	.loc 2 2336 0
+	add	x19, x21, 3344
+	.loc 2 2330 0
 	bl	printk
-.LVL694:
-.L662:
-	.loc 2 2281 0 discriminator 1
+.LVL703:
+.L671:
+	.loc 2 2331 0 discriminator 1
 	add	x0, x22, :lo12:.LANCHOR0
-	ldr	w0, [x0, 2520]
+	ldr	w0, [x0, 2560]
 	cmp	w20, w0
-	bcc	.L668
-	.loc 2 2303 0
+	bcc	.L677
+	.loc 2 2353 0
 	ldp	x19, x20, [sp, 32]
-.LVL695:
+.LVL704:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
@@ -8035,77 +8154,77 @@ ftl_scan_all_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL696:
-.L668:
+.LVL705:
+.L677:
 	.cfi_restore_state
-	.loc 2 2282 0
+	.loc 2 2332 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w20
 	bl	log2phys
-.LVL697:
-	.loc 2 2283 0
+.LVL706:
+	.loc 2 2333 0
 	tst	x20, 2047
-	bne	.L663
-	.loc 2 2284 0
+	bne	.L672
+	.loc 2 2334 0
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC85
+	adrp	x0, .LC88
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC88
 	bl	printk
-.LVL698:
-.L663:
-	.loc 2 2285 0
+.LVL707:
+.L672:
+	.loc 2 2335 0
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L665
-	.loc 2 2289 0
-	ldr	x23, [x21, 3392]
-	.loc 2 2292 0
+	beq	.L674
+	.loc 2 2339 0
+	ldr	x23, [x21, 3384]
+	.loc 2 2342 0
 	mov	w2, 0
-	.loc 2 2286 0
+	.loc 2 2336 0
 	stp	wzr, w0, [x19]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2288 0
-	ldr	x0, [x21, 2288]
+	.loc 2 2338 0
+	ldr	x0, [x21, 3376]
 	str	x0, [x19, 8]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	mov	x0, x19
-	.loc 2 2289 0
+	.loc 2 2339 0
 	str	x23, [x19, 16]
-	.loc 2 2287 0
+	.loc 2 2337 0
 	str	w20, [x19, 24]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL699:
-	.loc 2 2293 0
+.LVL708:
+	.loc 2 2343 0
 	ldr	w0, [x19]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L666
-	.loc 2 2294 0
+	beq	.L675
+	.loc 2 2344 0
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L665
-.L666:
-	.loc 2 2297 0
+	beq	.L674
+.L675:
+	.loc 2 2347 0
 	ldp	x1, x0, [x19, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC86
+	adrp	x0, .LC89
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC89
 	ldr	w2, [x19, 4]
 	mov	w1, w20
 	bl	printk
-.LVL700:
-.L665:
-	.loc 2 2281 0 discriminator 2
+.LVL709:
+.L674:
+	.loc 2 2331 0 discriminator 2
 	add	w20, w20, 1
-	b	.L662
+	b	.L671
 	.cfi_endproc
 .LFE230:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8119,14 +8238,14 @@ FtlReadRefresh:
 	.loc 5 425 0
 	adrp	x0, .LANCHOR0
 	add	x1, x0, :lo12:.LANCHOR0
-	add	x2, x1, 2712
+	add	x2, x1, 2696
 	ldr	w3, [x2, 80]
-	cbz	w3, .L671
+	cbz	w3, .L680
 	.loc 5 426 0
-	ldr	w0, [x1, 2520]
+	ldr	w0, [x1, 2560]
 	ldr	w3, [x2, 84]
 	cmp	w3, w0
-	bcs	.L672
+	bcs	.L681
 	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
@@ -8137,41 +8256,41 @@ FtlReadRefresh:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
-.LBB226:
-.LBB227:
+.LBB254:
+.LBB255:
 	.loc 5 428 0
 	mov	x19, x1
-.LBE227:
-.LBE226:
+.LBE255:
+.LBE254:
 	mov	w20, 2048
 	.loc 5 419 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -128
-.LVL701:
-.L677:
-.LBB232:
-.LBB229:
+.LVL710:
+.L686:
+.LBB260:
+.LBB257:
 	.loc 5 428 0
-	ldr	w1, [x19, 2520]
-	ldr	w0, [x19, 2796]
+	ldr	w1, [x19, 2560]
+	ldr	w0, [x19, 2780]
 	cmp	w0, w1
-	bcs	.L674
+	bcs	.L683
 	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL702:
+.LVL711:
 	.loc 5 431 0
-	ldr	w0, [x19, 2796]
+	ldr	w0, [x19, 2780]
 	.loc 5 432 0
 	ldr	w1, [x29, 60]
 	.loc 5 431 0
 	add	w0, w0, 1
-	str	w0, [x19, 2796]
+	str	w0, [x19, 2780]
 	.loc 5 432 0
 	cmn	w1, #1
-	beq	.L675
-.LBB228:
+	beq	.L684
+.LBB256:
 	.loc 5 435 0
 	str	w0, [x29, 88]
 	.loc 5 436 0
@@ -8192,29 +8311,29 @@ FtlReadRefresh:
 	str	wzr, [x0, -96]!
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL703:
+.LVL712:
 	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L674
+	bne	.L683
 	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL704:
+.LVL713:
 	bl	FtlGcRefreshBlock
-.LVL705:
-.L674:
-.LBE228:
-.LBE229:
-.LBE232:
+.LVL714:
+.L683:
+.LBE256:
+.LBE257:
+.LBE260:
 	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB233:
-.LBB230:
+.LBB261:
+.LBB258:
 	mov	w0, -1
-.LBE230:
-.LBE233:
+.LBE258:
+.LBE261:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
@@ -8225,69 +8344,69 @@ FtlReadRefresh:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L675:
+.L684:
 	.cfi_restore_state
-.LBB234:
-.LBB231:
+.LBB262:
+.LBB259:
 	.loc 5 427 0
 	subs	w20, w20, #1
-	bne	.L677
-	b	.L674
-.LVL706:
-.L672:
+	bne	.L686
+	b	.L683
+.LVL715:
+.L681:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 29
 	.cfi_restore 30
-.LBE231:
-.LBE234:
+.LBE259:
+.LBE262:
 	.loc 5 451 0
-	ldr	w0, [x1, 2524]
+	ldr	w0, [x1, 2564]
 	.loc 5 449 0
 	stp	w0, wzr, [x2, 76]
 	.loc 5 450 0
 	str	wzr, [x2, 84]
-.L681:
+.L690:
 	.loc 5 420 0
 	mov	w0, 0
 	.loc 5 465 0
 	ret
-.L671:
-.LBB235:
+.L680:
+.LBB263:
 	.loc 5 456 0
-	ldr	w3, [x1, 2524]
+	ldr	w3, [x1, 2564]
 	ldr	w5, [x2, 76]
 	add	w2, w3, 1048576
 	cmp	w5, w2
-	bhi	.L680
+	bhi	.L689
 	.loc 5 454 0
-	ldr	w2, [x1, 2580]
+	ldr	w2, [x1, 2620]
 	lsr	w4, w2, 10
 	mov	w2, 33554432
 	asr	w2, w2, w4
-.LVL707:
+.LVL716:
 	.loc 5 457 0
 	add	w2, w2, w5
-.LVL708:
+.LVL717:
 	cmp	w3, w2
-	bhi	.L680
+	bhi	.L689
 	.loc 5 458 0
-	ldrb	w1, [x1, 2620]
-	cbnz	w1, .L681
-.L680:
+	ldrb	w1, [x1, 2316]
+	cbnz	w1, .L690
+.L689:
 	.loc 5 460 0
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 1
 	.loc 5 462 0
-	str	w3, [x0, 2788]
+	str	w3, [x0, 2772]
 	.loc 5 460 0
-	str	w1, [x0, 2792]
+	str	w1, [x0, 2776]
 	.loc 5 461 0
-	str	wzr, [x0, 2796]
-	b	.L681
-.LBE235:
+	str	wzr, [x0, 2780]
+	b	.L690
+.LBE263:
 	.cfi_endproc
 .LFE257:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -8296,21 +8415,21 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 .LFB206:
-	.loc 2 897 0
+	.loc 2 946 0
 	.cfi_startproc
-.LVL709:
-	.loc 2 903 0
+.LVL718:
+	.loc 2 952 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L695
-	.loc 2 897 0
+	cbz	w1, .L704
+	.loc 2 946 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 2 907 0
+	.loc 2 956 0
 	adrp	x1, .LANCHOR0
 	add	x2, x1, :lo12:.LANCHOR0
-	.loc 2 897 0
+	.loc 2 946 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -8319,54 +8438,54 @@ FtlMapBlkWriteDump_data:
 	mov	x19, x0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 907 0
-	add	x0, x2, 3360
-.LVL710:
+	.loc 2 956 0
+	add	x0, x2, 3344
+.LVL719:
 	mov	x21, x1
-	.loc 2 899 0
+	.loc 2 948 0
 	ldrh	w20, [x19, 6]
-	.loc 2 908 0
-	ldr	x4, [x2, 3392]
-	.loc 2 899 0
+	.loc 2 957 0
+	ldr	x4, [x2, 3384]
+	.loc 2 948 0
 	sub	w20, w20, #1
-	.loc 2 907 0
-	ldr	x3, [x2, 3992]
-	.loc 2 899 0
+	.loc 2 956 0
+	ldr	x3, [x2, 3984]
+	.loc 2 948 0
 	and	w20, w20, 65535
-.LVL711:
-	.loc 2 900 0
+.LVL720:
+	.loc 2 949 0
 	ldr	x5, [x19, 40]
-.LVL712:
-	.loc 2 908 0
+.LVL721:
+	.loc 2 957 0
 	stp	x3, x4, [x0, 8]
-	.loc 2 930 0
+	.loc 2 979 0
 	ubfiz	x4, x20, 2, 16
-	.loc 2 905 0
+	.loc 2 954 0
 	str	wzr, [x19, 56]
-	.loc 2 930 0
+	.loc 2 979 0
 	ldr	w4, [x5, x4]
-.LVL713:
-	.loc 2 931 0
+.LVL722:
+	.loc 2 980 0
 	str	w4, [x0, 4]
-	.loc 2 932 0
-	cbz	w4, .L689
-	.loc 2 934 0
+	.loc 2 981 0
+	cbz	w4, .L698
+	.loc 2 983 0
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL714:
-.L690:
-	.loc 2 941 0
+.LVL723:
+.L699:
+	.loc 2 990 0
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	x0, x19
-	ldr	x2, [x1, 3368]
+	ldr	x2, [x1, 3352]
 	mov	w1, w20
 	bl	FtlMapWritePage
-.LVL715:
-	.loc 2 943 0
+.LVL724:
+	.loc 2 992 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL716:
+.LVL725:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8376,18 +8495,18 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL717:
-.L689:
+.LVL726:
+.L698:
 	.cfi_restore_state
-	.loc 2 938 0
+	.loc 2 987 0
 	ldrh	w2, [x2, 90]
 	mov	w1, 255
 	mov	x0, x3
 	bl	ftl_memset
-.LVL718:
-	b	.L690
-.LVL719:
-.L695:
+.LVL727:
+	b	.L699
+.LVL728:
+.L704:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -8403,576 +8522,572 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 .LFB209:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-	.loc 2 1103 0
+	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1095 0
+	.loc 2 1144 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
-	.loc 2 1101 0
+	.loc 2 1150 0
 	adrp	x20, .LANCHOR3
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1101 0
+	.loc 2 1150 0
 	add	x0, x20, :lo12:.LANCHOR3
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 1102 0
+	.loc 2 1151 0
 	adrp	x21, .LANCHOR0
 	add	x19, x21, :lo12:.LANCHOR0
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-	.loc 2 1162 0
+	.loc 2 1211 0
 	adrp	x25, .LANCHOR1
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 1162 0
+	.loc 2 1211 0
 	add	x25, x25, :lo12:.LANCHOR1
-	.loc 2 1101 0
-	strh	wzr, [x0, -176]
-	.loc 2 1162 0
+	.loc 2 1150 0
+	strh	wzr, [x0, -184]
+	.loc 2 1211 0
 	add	x25, x25, 368
-	.loc 2 1103 0
-	ldr	x0, [x19, 4088]
+	.loc 2 1152 0
+	ldr	x0, [x19, 4080]
 	ldr	w2, [x19, 108]
-	.loc 2 1102 0
+	.loc 2 1151 0
 	strh	wzr, [x19, 124]
-	.loc 2 1103 0
+	.loc 2 1152 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL720:
-	.loc 2 1104 0
-	ldr	x0, [x19, 4040]
+.LVL729:
+	.loc 2 1153 0
+	ldr	x0, [x19, 4032]
 	mov	w1, 0
 	ldr	w2, [x19, 108]
 	lsl	w2, w2, 1
-	bl	ftl_memset
-.LVL721:
-	.loc 2 1105 0
-	ldr	x0, [x19, 4064]
+	bl	ftl_memset
+.LVL730:
+	.loc 2 1154 0
+	ldr	x0, [x19, 4056]
 	mov	w1, 0
 	ldrh	w2, [x19, 100]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL722:
-	.loc 2 1106 0
+.LVL731:
+	.loc 2 1155 0
 	ldr	x0, [x19, 128]
 	mov	w1, 0
 	ldrh	w2, [x19, 100]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL723:
-	.loc 2 1107 0
+.LVL732:
+	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x19, 2648
+	add	x0, x19, 2632
 	bl	ftl_memset
-.LVL724:
-	.loc 2 1109 0
+.LVL733:
+	.loc 2 1158 0
 	ldrh	w24, [x19, 20]
-.LVL725:
-.L699:
-	.loc 2 1109 0 is_stmt 0 discriminator 1
+.LVL734:
+.L708:
+	.loc 2 1158 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 22]
 	cmp	w0, w24
-	bls	.L739
-	.loc 2 1113 0 is_stmt 1 discriminator 1
+	bls	.L748
+	.loc 2 1162 0 is_stmt 1 discriminator 1
 	ldrh	w9, [x19, 12]
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	x5, 0
 	ldrh	w8, [x19, 92]
 	mov	w22, 0
-	.loc 2 1115 0 discriminator 1
+	.loc 2 1164 0 discriminator 1
 	add	x7, x19, 40
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	w6, 4
-	b	.L740
-.L701:
-	.loc 2 1115 0
+	b	.L749
+.L710:
+	.loc 2 1164 0
 	ldrb	w0, [x7, x5]
 	mov	w1, w24
 	bl	V2P_block
-.LVL726:
+.LVL735:
 	and	w4, w0, 65535
-	.loc 2 1116 0
+	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL727:
-	cbnz	w0, .L700
-	.loc 2 1118 0
-	ldr	x0, [x19, 3968]
+.LVL736:
+	cbnz	w0, .L709
+	.loc 2 1167 0
+	ldr	x0, [x19, 3960]
 	ubfiz	x2, x22, 5, 16
 	lsl	w4, w4, 10
 	add	x0, x0, x2
 	str	w4, [x0, 4]
-	.loc 2 1119 0
-	ldr	x1, [x19, 3968]
-	ldr	x0, [x19, 3256]
+	.loc 2 1168 0
+	ldr	x1, [x19, 3960]
+	ldr	x0, [x19, 3240]
 	add	x1, x1, x2
-	.loc 2 1120 0
-	ldr	x2, [x19, 3264]
-	.loc 2 1119 0
+	.loc 2 1169 0
+	ldr	x2, [x19, 3248]
+	.loc 2 1168 0
 	str	x0, [x1, 8]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mul	w0, w22, w8
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	w22, w22, 1
-.LVL728:
+.LVL737:
 	and	w22, w22, 65535
-.LVL729:
-	.loc 2 1120 0
+.LVL738:
+	.loc 2 1169 0
 	sdiv	w0, w0, w6
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L700:
+.L709:
 	add	x5, x5, 1
-.L740:
-	.loc 2 1113 0 discriminator 1
+.L749:
+	.loc 2 1162 0 discriminator 1
 	cmp	w9, w5, uxth
-	bhi	.L701
-	.loc 2 1124 0
-	cbnz	w22, .L702
-.L738:
-	.loc 2 1109 0
+	bhi	.L710
+	.loc 2 1173 0
+	cbnz	w22, .L711
+.L747:
+	.loc 2 1158 0
 	add	w24, w24, 1
-.LVL730:
+.LVL739:
 	and	w24, w24, 65535
-.LVL731:
-	b	.L699
-.L702:
-	.loc 2 1127 0
-	ldr	x0, [x19, 3968]
+.LVL740:
+	b	.L708
+.L711:
+	.loc 2 1176 0
+	ldr	x0, [x19, 3960]
 	mov	w1, w22
 	mov	w2, 1
 	ubfiz	x22, x22, 5, 16
-.LVL732:
+.LVL741:
 	mov	x23, 0
-	.loc 2 1248 0
-	add	x28, x19, 2648
-	.loc 2 1127 0
+	.loc 2 1297 0
+	add	x28, x19, 2632
+	.loc 2 1176 0
 	bl	FlashReadPages
-.LVL733:
-.L737:
-	.loc 2 1129 0
-	ldr	x0, [x19, 3968]
+.LVL742:
+.L746:
+	.loc 2 1178 0
+	ldr	x0, [x19, 3960]
 	add	x1, x0, x23
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	w0, [x0, x23]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	w26, [x1, 4]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	x26, x26, 10, 16
-	.loc 2 1132 0
-	bne	.L705
+	.loc 2 1181 0
+	bne	.L714
 	mov	w3, 16
-	.loc 2 1136 0
+	.loc 2 1185 0
 	mov	w4, 65535
-.L707:
-	.loc 2 1134 0
-	ldr	x0, [x19, 3968]
-	.loc 2 1135 0
+.L716:
+	.loc 2 1183 0
+	ldr	x0, [x19, 3960]
+	.loc 2 1184 0
 	mov	w2, 1
 	stp	w4, w3, [x29, 104]
-	.loc 2 1134 0
+	.loc 2 1183 0
 	add	x0, x0, x23
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	mov	w1, w2
-	ldr	x0, [x19, 3968]
+	ldr	x0, [x19, 3960]
 	add	x0, x0, x23
 	bl	FlashReadPages
-.LVL734:
-	.loc 2 1136 0
+.LVL743:
+	.loc 2 1185 0
 	ldp	w4, w3, [x29, 104]
 	ldrh	w0, [x27]
 	cmp	w0, w4
-	.loc 2 1137 0
-	ldr	x0, [x19, 3968]
-	.loc 2 1136 0
-	bne	.L704
-	.loc 2 1137 0
+	.loc 2 1186 0
+	ldr	x0, [x19, 3960]
+	.loc 2 1185 0
+	bne	.L713
+	.loc 2 1186 0
 	mov	w1, -1
 	str	w1, [x0, x23]
-	.loc 2 1145 0
-	ldr	x0, [x19, 3968]
+	.loc 2 1194 0
+	ldr	x0, [x19, 3960]
 	ldr	w0, [x0, x23]
 	cmp	w0, w1
-	bne	.L705
-.L706:
-	.loc 2 1287 0
-	mov	w1, 1
-	b	.L777
-.L704:
-	.loc 2 1139 0
+	bne	.L714
+.L715:
+	.loc 2 1336 0
+	mov	w1, 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL744:
+	b	.L719
+.L713:
+	.loc 2 1188 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	bne	.L705
+	bne	.L714
 	sub	w3, w3, #1
-	.loc 2 1133 0 discriminator 2
+	.loc 2 1182 0 discriminator 2
 	ands	w3, w3, 65535
-	bne	.L707
-	b	.L706
-.L705:
-	.loc 2 1147 0
-	ldr	w1, [x19, 2556]
+	bne	.L716
+	b	.L715
+.L714:
+	.loc 2 1196 0
+	ldr	w1, [x19, 2596]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L708
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L717
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
-	bhi	.L709
-.L708:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L718
+.L717:
+	.loc 2 1198 0 is_stmt 1
 	cmn	w0, #1
-	beq	.L709
-	.loc 2 1152 0
+	beq	.L718
+	.loc 2 1201 0
 	add	w1, w0, 1
-	str	w1, [x19, 2556]
-.L709:
-	.loc 2 1157 0
+	str	w1, [x19, 2596]
+.L718:
+	.loc 2 1206 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L711
-	bhi	.L712
+	beq	.L720
+	bhi	.L721
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L713
-.L710:
+	beq	.L722
+.L719:
 	add	x23, x23, 32
-	.loc 2 1128 0 discriminator 2
+	.loc 2 1177 0 discriminator 2
 	cmp	x22, x23
-	bne	.L737
-	b	.L738
-.L712:
-	.loc 2 1157 0
+	bne	.L746
+	b	.L747
+.L721:
+	.loc 2 1206 0
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L714
+	beq	.L723
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L710
-	.loc 2 1280 0
-	mov	w1, 0
-.L777:
-	.loc 2 1287 0
-	mov	w0, w26
-	bl	FtlFreeSysBlkQueueIn
-.LVL735:
-	b	.L710
-.L714:
-	.loc 2 1162 0
+	beq	.L715
+	b	.L719
+.L723:
+	.loc 2 1211 0
 	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w1, [x0, -176]
+	ldrh	w1, [x0, -184]
 	ldr	w0, [x19, 108]
 	cmp	w1, w0
-	bls	.L716
-	.loc 2 1162 0 is_stmt 0 discriminator 1
+	bls	.L725
+	.loc 2 1211 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 1162
+	mov	w2, 1211
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL736:
-.L716:
-	.loc 2 1163 0 is_stmt 1
+.LVL745:
+.L725:
+	.loc 2 1212 0 is_stmt 1
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w3, [x19, 108]
-	.loc 2 1165 0
-	ldr	x4, [x19, 4088]
-	.loc 2 1163 0
+	.loc 2 1214 0
+	ldr	x4, [x19, 4080]
+	.loc 2 1212 0
 	and	w2, w3, 65535
-	ldrh	w1, [x1, -176]
+	ldrh	w1, [x1, -184]
 	sub	w0, w2, #1
 	sxth	x0, w0
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	sxth	w2, w2
-.L717:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L726:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	bgt	.L723
-	.loc 2 1186 0 is_stmt 1
-	tbz	w0, #31, .L757
-	b	.L710
-.L723:
-	.loc 2 1165 0
+	bgt	.L732
+	.loc 2 1235 0 is_stmt 1
+	tbz	w0, #31, .L766
+	b	.L719
+.L732:
+	.loc 2 1214 0
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L718
-	.loc 2 1167 0
+	bls	.L727
+	.loc 2 1216 0
 	ldr	w2, [x4]
-	cbnz	w2, .L719
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L728
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
-	beq	.L719
-	.loc 2 1172 0 is_stmt 1
+	beq	.L728
+	.loc 2 1221 0 is_stmt 1
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
-	strh	w1, [x2, -176]
-.L719:
+	strh	w1, [x2, -184]
+.L728:
 	mov	w1, 0
-.L720:
-	.loc 2 1175 0 discriminator 1
+.L729:
+	.loc 2 1224 0 discriminator 1
 	cmp	w1, w0
-	bne	.L721
-	.loc 2 1180 0
-	ldr	x1, [x19, 4088]
+	bne	.L730
+	.loc 2 1229 0
+	ldr	x1, [x19, 4080]
 	ldr	w2, [x27, 4]
 	str	w2, [x1, x6]
-	.loc 2 1181 0
-	ldr	x1, [x19, 4040]
+	.loc 2 1230 0
+	ldr	x1, [x19, 4032]
 	strh	w26, [x1, x5, lsl 1]
-	.loc 2 1186 0
-	tbnz	w0, #31, .L710
-	.loc 2 1193 0
+	.loc 2 1235 0
+	tbnz	w0, #31, .L719
+	.loc 2 1242 0
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w2, [x19, 108]
-	ldrh	w1, [x1, -176]
+	ldrh	w1, [x1, -184]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L710
-.L757:
-	.loc 2 1195 0
+	bgt	.L719
+.L766:
+	.loc 2 1244 0
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
-	strh	w1, [x2, -176]
-	.loc 2 1196 0
-	ldr	x1, [x19, 4088]
+	strh	w1, [x2, -184]
+	.loc 2 1245 0
+	ldr	x1, [x19, 4080]
 	ldr	w2, [x27, 4]
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1197 0
-	ldr	x1, [x19, 4040]
-.L775:
-	.loc 2 1241 0
+	.loc 2 1246 0
+	ldr	x1, [x19, 4032]
+.L784:
+	.loc 2 1290 0
 	strh	w26, [x1, x0, lsl 1]
-	b	.L710
-.L721:
-	.loc 2 1177 0 discriminator 3
-	ldr	x4, [x19, 4088]
+	b	.L719
+.L730:
+	.loc 2 1226 0 discriminator 3
+	ldr	x4, [x19, 4080]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1177 0 discriminator 3
+	.loc 2 1226 0 discriminator 3
 	add	x7, x4, x3
 	add	w1, w1, 1
 	sxth	w1, w1
 	ldr	w7, [x7, 4]
 	str	w7, [x4, x3]
-	.loc 2 1178 0 discriminator 3
-	ldr	x3, [x19, 4040]
+	.loc 2 1227 0 discriminator 3
+	ldr	x3, [x19, 4032]
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L720
-.L718:
+	b	.L729
+.L727:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L717
-.L713:
-	.loc 2 1203 0
+	b	.L726
+.L722:
+	.loc 2 1252 0
 	ldrh	w1, [x19, 124]
 	ldrh	w0, [x19, 100]
 	cmp	w1, w0
-	bls	.L726
-	.loc 2 1203 0 is_stmt 0 discriminator 1
+	bls	.L735
+	.loc 2 1252 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 1203
+	mov	w2, 1252
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL737:
-.L726:
-	.loc 2 1204 0 is_stmt 1
+.LVL746:
+.L735:
+	.loc 2 1253 0 is_stmt 1
 	ldrh	w3, [x19, 100]
 	ldrh	w1, [x19, 124]
 	sub	w2, w3, #1
-	.loc 2 1206 0
-	ldr	x4, [x19, 4064]
-	.loc 2 1204 0
+	.loc 2 1255 0
+	ldr	x4, [x19, 4056]
+	.loc 2 1253 0
 	sxth	x0, w2
 	sub	w2, w2, w1
-.L727:
-	.loc 2 1204 0 is_stmt 0 discriminator 1
+.L736:
+	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	ble	.L732
-	.loc 2 1206 0 is_stmt 1
+	ble	.L741
+	.loc 2 1255 0 is_stmt 1
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L728
-	.loc 2 1208 0
+	bls	.L737
+	.loc 2 1257 0
 	ldr	w2, [x4]
-	cbnz	w2, .L729
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L738
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
-	beq	.L729
-	.loc 2 1216 0 is_stmt 1
+	beq	.L738
+	.loc 2 1265 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x19, 124]
-.L729:
+.L738:
 	mov	w1, 0
-.L730:
-	.loc 2 1218 0 discriminator 1
+.L739:
+	.loc 2 1267 0 discriminator 1
 	cmp	w1, w0
-	bne	.L731
-	.loc 2 1223 0
-	ldr	x1, [x19, 4064]
+	bne	.L740
+	.loc 2 1272 0
+	ldr	x1, [x19, 4056]
 	ldr	w2, [x27, 4]
 	str	w2, [x1, x6]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	ldr	x1, [x19, 128]
 	strh	w26, [x1, x5, lsl 1]
-.L732:
-	.loc 2 1229 0
-	tbnz	w0, #31, .L710
-	.loc 2 1237 0
+.L741:
+	.loc 2 1278 0
+	tbnz	w0, #31, .L719
+	.loc 2 1286 0
 	ldrh	w1, [x19, 100]
 	ldrh	w2, [x19, 124]
 	sub	w1, w1, #1
 	sub	w1, w1, w2
 	cmp	w0, w1, sxth
-	bgt	.L710
-	.loc 2 1240 0
-	ldr	x1, [x19, 4064]
-	.loc 2 1239 0
+	bgt	.L719
+	.loc 2 1289 0
+	ldr	x1, [x19, 4056]
+	.loc 2 1288 0
 	add	w2, w2, 1
 	strh	w2, [x19, 124]
-	.loc 2 1240 0
+	.loc 2 1289 0
 	ldr	w2, [x27, 4]
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1241 0
+	.loc 2 1290 0
 	ldr	x1, [x19, 128]
-	b	.L775
-.L731:
-	.loc 2 1220 0 discriminator 3
-	ldr	x4, [x19, 4064]
+	b	.L784
+.L740:
+	.loc 2 1269 0 discriminator 3
+	ldr	x4, [x19, 4056]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1269 0 discriminator 3
 	add	x7, x4, x3
 	add	w1, w1, 1
 	sxth	w1, w1
 	ldr	w7, [x7, 4]
 	str	w7, [x4, x3]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	ldr	x3, [x19, 128]
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L730
-.L728:
+	b	.L739
+.L737:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L727
-.L711:
-	.loc 2 1248 0
+	b	.L736
+.L720:
+	.loc 2 1297 0
 	ldrh	w2, [x28]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L734
-	.loc 2 1250 0
+	bne	.L743
+	.loc 2 1299 0
 	strh	w26, [x28]
-.L776:
-	.loc 2 1261 0
+.L785:
+	.loc 2 1310 0
 	str	w0, [x28, 8]
-	b	.L710
-.L734:
-	.loc 2 1255 0
+	b	.L719
+.L743:
+	.loc 2 1304 0
 	ldrh	w0, [x28, 4]
 	cmp	w0, w1
-	beq	.L735
-	.loc 2 1256 0
+	beq	.L744
+	.loc 2 1305 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL738:
-.L735:
-	.loc 2 1257 0
+.LVL747:
+.L744:
+	.loc 2 1306 0
 	ldr	w0, [x27, 4]
 	ldr	w1, [x28, 8]
 	cmp	w1, w0
-	bcs	.L736
-	.loc 2 1259 0
+	bcs	.L745
+	.loc 2 1308 0
 	ldrh	w0, [x28]
 	strh	w0, [x28, 4]
-	.loc 2 1260 0
+	.loc 2 1309 0
 	strh	w26, [x28]
-	.loc 2 1261 0
+	.loc 2 1310 0
 	ldr	w0, [x27, 4]
-	b	.L776
-.L736:
-	.loc 2 1265 0
+	b	.L785
+.L745:
+	.loc 2 1314 0
 	strh	w26, [x28, 4]
-	b	.L710
-.LVL739:
-.L739:
-	.loc 2 1292 0
-	ldr	x1, [x19, 4040]
+	b	.L719
+.LVL748:
+.L748:
+	.loc 2 1341 0
+	ldr	x1, [x19, 4032]
 	ldrh	w0, [x1]
-	cbz	w0, .L741
-.L744:
-	.loc 2 1310 0
+	cbz	w0, .L750
+.L753:
+	.loc 2 1359 0
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x1, [x0, 128]
 	ldrh	w2, [x1]
-	cbz	w2, .L742
-.L743:
-	.loc 2 1328 0
+	cbz	w2, .L751
+.L752:
+	.loc 2 1377 0
 	add	x20, x20, :lo12:.LANCHOR3
 	add	x21, x21, :lo12:.LANCHOR0
-	ldrh	w1, [x20, -176]
+	ldrh	w1, [x20, -184]
 	ldr	w0, [x21, 108]
 	cmp	w1, w0
-	bls	.L773
-	.loc 2 1328 0 is_stmt 0 discriminator 1
+	bls	.L782
+	.loc 2 1377 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1328
+	mov	w2, 1377
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL740:
-.L773:
-	.loc 2 1330 0 is_stmt 1
+.LVL749:
+.L782:
+	.loc 2 1379 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL741:
+.LVL750:
 	ldp	x23, x24, [sp, 48]
-.LVL742:
+.LVL751:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL743:
+.LVL752:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8989,31 +9104,31 @@ FtlScanSysBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL744:
-.L741:
+.LVL753:
+.L750:
 	.cfi_restore_state
-	.loc 2 1292 0 discriminator 1
+	.loc 2 1341 0 discriminator 1
 	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w0, [x0, -176]
-	cbz	w0, .L744
-	.loc 2 1294 0 discriminator 1
+	ldrh	w0, [x0, -184]
+	cbz	w0, .L753
+	.loc 2 1343 0 discriminator 1
 	ldr	w2, [x19, 108]
 	mov	w0, 0
-.L745:
+.L754:
 	cmp	w0, w2
-	bcs	.L744
-	.loc 2 1296 0
+	bcs	.L753
+	.loc 2 1345 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L746
+	cbz	w3, .L755
 	mov	w1, w0
-	.loc 2 1298 0 discriminator 1
+	.loc 2 1347 0 discriminator 1
 	add	x2, x21, :lo12:.LANCHOR0
-.L747:
+.L756:
 	ldr	w3, [x2, 108]
 	cmp	w1, w3
-	bcs	.L744
-	.loc 2 1300 0 discriminator 3
-	ldr	x5, [x2, 4040]
+	bcs	.L753
+	.loc 2 1349 0 discriminator 3
+	ldr	x5, [x2, 4032]
 	sxtw	x6, w1
 	lsl	x4, x6, 1
 	sub	w3, w1, w0
@@ -9022,39 +9137,39 @@ FtlScanSysBlk:
 	sxth	w1, w1
 	ldrh	w7, [x5, x4]
 	strh	w7, [x5, x3, lsl 1]
-	.loc 2 1301 0 discriminator 3
-	ldr	x5, [x2, 4088]
+	.loc 2 1350 0 discriminator 3
+	ldr	x5, [x2, 4080]
 	ldr	w6, [x5, x6, lsl 2]
 	str	w6, [x5, x3, lsl 2]
-	.loc 2 1302 0 discriminator 3
-	ldr	x3, [x2, 4040]
+	.loc 2 1351 0 discriminator 3
+	ldr	x3, [x2, 4032]
 	strh	wzr, [x3, x4]
-	b	.L747
-.L746:
+	b	.L756
+.L755:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L745
-.L742:
-	.loc 2 1310 0 discriminator 1
+	b	.L754
+.L751:
+	.loc 2 1359 0 discriminator 1
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L743
-	.loc 2 1312 0 discriminator 1
+	cbz	w2, .L752
+	.loc 2 1361 0 discriminator 1
 	ldrh	w2, [x0, 100]
 	mov	w0, 0
-.L752:
+.L761:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L743
-	.loc 2 1314 0
+	bge	.L752
+	.loc 2 1363 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L753
-	.loc 2 1316 0 discriminator 1
+	cbz	w3, .L762
+	.loc 2 1365 0 discriminator 1
 	add	x1, x21, :lo12:.LANCHOR0
-.L754:
+.L763:
 	ldrh	w2, [x1, 100]
 	cmp	w0, w2
-	bge	.L743
-	.loc 2 1318 0 discriminator 3
+	bge	.L752
+	.loc 2 1367 0 discriminator 3
 	ldr	x4, [x1, 128]
 	sxtw	x5, w0
 	lsl	x3, x5, 1
@@ -9064,18 +9179,18 @@ FtlScanSysBlk:
 	sxth	w0, w0
 	ldrh	w7, [x4, x3]
 	strh	w7, [x4, x2, lsl 1]
-	.loc 2 1319 0 discriminator 3
-	ldr	x4, [x1, 4064]
+	.loc 2 1368 0 discriminator 3
+	ldr	x4, [x1, 4056]
 	ldr	w5, [x4, x5, lsl 2]
 	str	w5, [x4, x2, lsl 2]
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	ldr	x2, [x1, 128]
 	strh	wzr, [x2, x3]
-	b	.L754
-.L753:
+	b	.L763
+.L762:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L752
+	b	.L761
 	.cfi_endproc
 .LFE209:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -9084,16 +9199,16 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 .LFB214:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	.cfi_startproc
-.LVL745:
+.LVL754:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
 	.cfi_offset 30, -120
-	.loc 2 1477 0
+	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -9103,158 +9218,158 @@ FtlMapTblRecovery:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -96
 	.cfi_offset 22, -88
-	.loc 2 1478 0
+	.loc 2 1527 0
 	adrp	x21, .LANCHOR0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -64
 	.cfi_offset 26, -56
 	.cfi_offset 27, -48
 	.cfi_offset 28, -40
-	.loc 2 1486 0
+	.loc 2 1535 0
 	mov	w27, 0
-.LVL746:
-	.loc 2 1466 0
+.LVL755:
+	.loc 2 1515 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	w24, [x0, 6]
-.LVL747:
-	.loc 2 1470 0
+.LVL756:
+	.loc 2 1519 0
 	ldr	x0, [x0, 40]
-.LVL748:
+.LVL757:
 	str	x0, [x29, 120]
-	.loc 2 1474 0
+	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL749:
-	.loc 2 1477 0
+.LVL758:
+	.loc 2 1526 0
 	lsl	w2, w24, 2
-	.loc 2 1474 0
+	.loc 2 1523 0
 	str	w0, [x29, 116]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	ldr	x0, [x29, 120]
-.LVL750:
-	.loc 2 1472 0
+.LVL759:
+	.loc 2 1521 0
 	ldp	x23, x26, [x19, 16]
-.LVL751:
-	.loc 2 1477 0
+.LVL760:
+	.loc 2 1526 0
 	bl	ftl_memset
-.LVL752:
-	.loc 2 1483 0
+.LVL761:
+	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1478 0
+	.loc 2 1527 0
 	add	x3, x21, :lo12:.LANCHOR0
-	add	x20, x3, 3360
-	.loc 2 1510 0
+	add	x20, x3, 3344
+	.loc 2 1559 0
 	mov	x25, x3
-	.loc 2 1478 0
-	ldr	x0, [x3, 2288]
-	.loc 2 1479 0
-	ldr	x22, [x3, 3392]
+	.loc 2 1527 0
+	ldr	x0, [x3, 3376]
+	.loc 2 1528 0
+	ldr	x22, [x3, 3384]
 	stp	x0, x22, [x20, 8]
-	.loc 2 1481 0
+	.loc 2 1530 0
 	mov	w0, -1
 	strh	w0, [x19]
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1485 0
+	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-	.loc 2 1488 0
+	.loc 2 1537 0
 	ldr	w0, [x29, 116]
-.LVL753:
+.LVL762:
 	sub	w0, w0, #1
-.LVL754:
+.LVL763:
 	str	w0, [x29, 112]
-.LVL755:
-.L779:
-	.loc 2 1486 0 discriminator 1
+.LVL764:
+.L787:
+	.loc 2 1535 0 discriminator 1
 	ldr	w0, [x29, 116]
-.LVL756:
+.LVL765:
 	cmp	w27, w0
-	bge	.L796
-	.loc 2 1488 0
+	bge	.L804
+	.loc 2 1537 0
 	ldr	w0, [x29, 112]
-.LVL757:
+.LVL766:
 	sxtw	x28, w27
-.LVL758:
+.LVL767:
 	cmp	w27, w0
-	bne	.L780
-	.loc 2 1490 0
+	bne	.L788
+	.loc 2 1539 0
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x20, x23, x0
-	.loc 2 1496 0
+	.loc 2 1545 0
 	add	x25, x21, :lo12:.LANCHOR0
-	add	x25, x25, 3360
-	.loc 2 1490 0
+	add	x25, x25, 3344
+	.loc 2 1539 0
 	ldrh	w0, [x23, x0]
-	.loc 2 1494 0
+	.loc 2 1543 0
 	mov	w23, 0
-.LVL759:
-	.loc 2 1490 0
+.LVL768:
+	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL760:
-	.loc 2 1492 0
+.LVL769:
+	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1490 0
+	.loc 2 1539 0
 	sxth	w1, w0
-.LVL761:
-	.loc 2 1491 0
+.LVL770:
+	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	w0, [x26, x28, lsl 2]
-	.loc 2 1494 0
+	.loc 2 1543 0
 	add	w26, w1, 1
-.LVL762:
-	.loc 2 1493 0
+.LVL771:
+	.loc 2 1542 0
 	str	w0, [x19, 48]
-.LVL763:
-.L781:
-	.loc 2 1494 0 discriminator 1
+.LVL772:
+.L789:
+	.loc 2 1543 0 discriminator 1
 	cmp	w23, w26
-	blt	.L783
-.LVL764:
-.L796:
-	.loc 2 1548 0
+	blt	.L791
+.LVL773:
+.L804:
+	.loc 2 1597 0
 	add	x21, x21, :lo12:.LANCHOR0
-	.loc 2 1547 0
+	.loc 2 1596 0
 	mov	x0, x19
-.LVL765:
+.LVL774:
 	bl	ftl_free_no_use_map_blk
-.LVL766:
-	.loc 2 1548 0
+.LVL775:
+	.loc 2 1597 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, 84]
 	cmp	w1, w0
-	bne	.L785
-	.loc 2 1550 0
+	bne	.L793
+	.loc 2 1599 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL767:
-.L785:
-	.loc 2 1553 0
+.LVL776:
+.L793:
+	.loc 2 1602 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL768:
-	.loc 2 1555 0
+.LVL777:
+	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL769:
-	.loc 2 1557 0
+.LVL778:
+	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL770:
+.LVL779:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL771:
+.LVL780:
 	ldp	x25, x26, [sp, 64]
-.LVL772:
+.LVL781:
 	ldp	x27, x28, [sp, 80]
-.LVL773:
+.LVL782:
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
 	.cfi_restore 30
@@ -9271,168 +9386,168 @@ FtlMapTblRecovery:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL774:
-.L783:
+.LVL783:
+.L791:
 	.cfi_restore_state
-	.loc 2 1496 0
+	.loc 2 1545 0
 	ldrh	w0, [x20]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	w2, 1
-.LVL775:
+.LVL784:
 	mov	w1, w2
-.LVL776:
-	.loc 2 1496 0
+.LVL785:
+	.loc 2 1545 0
 	orr	w0, w23, w0, lsl 10
 	str	w0, [x25, 4]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	x0, x25
 	bl	FlashReadPages
-.LVL777:
-	.loc 2 1500 0
+.LVL786:
+	.loc 2 1549 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L782
-	.loc 2 1502 0
+	beq	.L790
+	.loc 2 1551 0
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L782
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L790
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L782
-	.loc 2 1504 0 is_stmt 1
+	bne	.L790
+	.loc 2 1553 0 is_stmt 1
 	ldr	x2, [x29, 120]
-.LVL778:
+.LVL787:
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x25, 4]
 	str	w1, [x2, x0]
-.L782:
+.L790:
 	add	w23, w23, 1
 	sxth	w23, w23
-	b	.L781
-.LVL779:
-.L780:
-	.loc 2 1510 0
-	ldr	x0, [x25, 2288]
-	.loc 2 1512 0
+	b	.L789
+.LVL788:
+.L788:
+	.loc 2 1559 0
+	ldr	x0, [x25, 3376]
+	.loc 2 1561 0
 	mov	w2, 1
-	.loc 2 1510 0
+	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	lsl	x0, x28, 1
 	ldrh	w1, [x25, 84]
 	add	x28, x23, x0
-.LVL780:
+.LVL789:
 	ldrh	w0, [x23, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1511 0
+	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL781:
-	.loc 2 1515 0
+.LVL790:
+	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L798
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L806
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x22]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L798
-	.loc 2 1515 0 discriminator 2
+	bne	.L806
+	.loc 2 1564 0 discriminator 2
 	ldrh	w1, [x22, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L787
-.L798:
+	beq	.L795
+.L806:
 	mov	w5, 0
-.LVL782:
-.L788:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
+.LVL791:
+.L796:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldrh	w0, [x25, 84]
 	cmp	w5, w0
-	bge	.L794
-	.loc 2 1532 0
+	bge	.L802
+	.loc 2 1581 0
 	ldrh	w0, [x28]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w2, 1
-.LVL783:
-	.loc 2 1532 0
+.LVL792:
+	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1532 0
+	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL784:
-	.loc 2 1536 0
+.LVL793:
+	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L792
-	.loc 2 1538 0
+	beq	.L800
+	.loc 2 1587 0
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L792
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L800
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L792
-	.loc 2 1540 0 is_stmt 1
+	bne	.L800
+	.loc 2 1589 0 is_stmt 1
 	ldr	x2, [x29, 120]
-.LVL785:
+.LVL794:
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x2, x0]
-.L792:
+.L800:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L788
-.LVL786:
-.L787:
+	b	.L796
+.LVL795:
+.L795:
 	mov	w0, 0
-.LVL787:
-.L789:
-	.loc 2 1518 0 discriminator 1
+.LVL796:
+.L797:
+	.loc 2 1567 0 discriminator 1
 	ldrh	w1, [x25, 84]
-.LVL788:
+.LVL797:
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L791
-.L794:
+	blt	.L799
+.L802:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L779
-.L791:
-	.loc 2 1520 0
-	ldr	x2, [x25, 2288]
+	b	.L787
+.L799:
+	.loc 2 1569 0
+	ldr	x2, [x25, 3376]
 	sbfiz	x5, x0, 3, 32
 	ldrh	w1, [x2, x5]
-.LVL789:
-	.loc 2 1521 0
+.LVL798:
+	.loc 2 1570 0
 	cmp	w24, w1
-	bls	.L790
-	.loc 2 1523 0
+	bls	.L798
+	.loc 2 1572 0
 	add	x2, x2, x5
 	ldr	x3, [x29, 120]
 	ubfiz	x1, x1, 2, 16
-.LVL790:
+.LVL799:
 	ldr	w2, [x2, 4]
 	str	w2, [x3, x1]
-.LVL791:
-.L790:
+.LVL800:
+.L798:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L789
+	b	.L797
 	.cfi_endproc
 .LFE214:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -9441,50 +9556,50 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 .LFB215:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	.cfi_startproc
-	.loc 2 1561 0
+	.loc 2 1610 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 2 1560 0
+	.loc 2 1609 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 2 1561 0
+	.loc 2 1610 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 2 1560 0
+	.loc 2 1609 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1561 0
+	.loc 2 1610 0
 	ldrh	w2, [x1, 100]
-	strh	w2, [x0, -158]
-	.loc 2 1562 0
+	strh	w2, [x0, -166]
+	.loc 2 1611 0
 	mov	w2, -3962
-	strh	w2, [x0, -164]
-	.loc 2 1563 0
+	strh	w2, [x0, -172]
+	.loc 2 1612 0
 	ldrh	w2, [x1, 124]
-	strh	w2, [x0, -160]
-	.loc 2 1564 0
+	strh	w2, [x0, -168]
+	.loc 2 1613 0
 	ldrh	w2, [x1, 102]
-	strh	w2, [x0, -162]
-	.loc 2 1565 0
+	strh	w2, [x0, -170]
+	.loc 2 1614 0
 	ldr	x2, [x1, 128]
-	str	x2, [x0, -152]
-	.loc 2 1566 0
-	ldr	x2, [x1, 4064]
-	str	x2, [x0, -144]
-	.loc 2 1567 0
+	str	x2, [x0, -160]
+	.loc 2 1615 0
 	ldr	x2, [x1, 4056]
-	.loc 2 1568 0
-	ldr	x1, [x1, 4072]
-	stp	x2, x1, [x0, -136]
-	.loc 2 1570 0
-	sub	x0, x0, #168
+	str	x2, [x0, -152]
+	.loc 2 1616 0
+	ldr	x2, [x1, 4048]
+	.loc 2 1617 0
+	ldr	x1, [x1, 4064]
+	stp	x2, x1, [x0, -144]
+	.loc 2 1619 0
+	sub	x0, x0, #176
 	bl	FtlMapTblRecovery
-.LVL792:
-	.loc 2 1573 0
+.LVL801:
+	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -9499,124 +9614,114 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 .LFB216:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	.cfi_startproc
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 2 1578 0
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 1627 0
 	adrp	x0, .LANCHOR0
 	mov	w1, 0
-	.loc 2 1576 0
+	.loc 2 1625 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 1578 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 1627 0
 	add	x19, x0, :lo12:.LANCHOR0
-	.loc 2 1576 0
-	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 1579 0
-	adrp	x20, .LANCHOR3
-	add	x21, x20, :lo12:.LANCHOR3
-	.loc 2 1578 0
-	ldr	x0, [x19, 4048]
+	ldr	x0, [x19, 4040]
 	ldr	w2, [x19, 108]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL793:
-	.loc 2 1579 0
+.LVL802:
+	.loc 2 1628 0
 	ldrh	w0, [x19, 118]
 	mov	w1, 255
 	ldrh	w2, [x19, 90]
 	mul	w2, w2, w0
-	ldr	x0, [x21, -256]
+	ldr	x0, [x19, 4088]
 	bl	ftl_memset
-.LVL794:
-	.loc 2 1580 0
+.LVL803:
+	.loc 2 1629 0
 	mov	x0, x19
 	mov	w1, 0
-.LVL795:
-	.loc 2 1583 0
+.LVL804:
+	.loc 2 1632 0
 	mov	w5, -1
-.L809:
-	.loc 2 1580 0 discriminator 1
+.L817:
+	.loc 2 1629 0 discriminator 1
 	ldrh	w2, [x0, 118]
 	cmp	w2, w1
-	bhi	.L810
-	.loc 2 1586 0
-	add	x1, x20, :lo12:.LANCHOR3
-.LVL796:
+	bhi	.L818
+	.loc 2 1635 0
+	adrp	x1, .LANCHOR3
+.LVL805:
+	add	x1, x1, :lo12:.LANCHOR3
 	mov	w2, -1
-	strh	w2, [x1, -238]
-	.loc 2 1587 0
-	strh	w2, [x1, -240]
-	.loc 2 1588 0
+	strh	w2, [x1, -246]
+	.loc 2 1636 0
+	strh	w2, [x1, -248]
+	.loc 2 1637 0
 	ldr	w2, [x0, 108]
-	strh	w2, [x1, -230]
-	.loc 2 1589 0
+	strh	w2, [x1, -238]
+	.loc 2 1638 0
 	mov	w2, -3902
-	strh	w2, [x1, -236]
-	.loc 2 1590 0
-	ldrh	w2, [x1, -176]
-	strh	w2, [x1, -232]
-	.loc 2 1591 0
+	strh	w2, [x1, -244]
+	.loc 2 1639 0
+	ldrh	w2, [x1, -184]
+	strh	w2, [x1, -240]
+	.loc 2 1640 0
 	ldrh	w2, [x0, 116]
-	strh	w2, [x1, -234]
-	.loc 2 1592 0
-	ldr	x2, [x0, 4040]
+	strh	w2, [x1, -242]
+	.loc 2 1641 0
+	ldr	x2, [x0, 4032]
+	str	x2, [x1, -232]
+	.loc 2 1642 0
+	ldr	x2, [x0, 4080]
 	str	x2, [x1, -224]
-	.loc 2 1593 0
-	ldr	x2, [x0, 4088]
-	str	x2, [x1, -216]
-	.loc 2 1594 0
-	ldr	x2, [x0, 4048]
-	.loc 2 1595 0
-	ldr	x0, [x0, 4080]
-	stp	x2, x0, [x1, -208]
-	.loc 2 1596 0
-	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	.loc 2 1643 0
+	ldr	x2, [x0, 4040]
+	.loc 2 1644 0
+	ldr	x0, [x0, 4072]
+	stp	x2, x0, [x1, -216]
+	.loc 2 1645 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 21
 	.cfi_restore 19
-	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL797:
-.L810:
+.LVL806:
+.L818:
 	.cfi_restore_state
-	.loc 2 1582 0 discriminator 3
-	ldr	x3, [x0, 2504]
+	.loc 2 1631 0 discriminator 3
+	ldr	x3, [x0, 2544]
 	ubfiz	x2, x1, 4, 16
 	add	x3, x3, x2
 	str	wzr, [x3, 4]
-	.loc 2 1583 0 discriminator 3
-	ldr	x3, [x0, 2504]
+	.loc 2 1632 0 discriminator 3
+	ldr	x3, [x0, 2544]
 	strh	w5, [x3, x2]
-	.loc 2 1584 0 discriminator 3
-	ldr	x3, [x0, 2504]
-	ldr	x4, [x21, -256]
+	.loc 2 1633 0 discriminator 3
+	ldr	x3, [x0, 2544]
+	ldr	x4, [x0, 4088]
 	add	x3, x3, x2
 	ldrh	w2, [x0, 90]
 	mul	w2, w2, w1
-	.loc 2 1580 0 discriminator 3
+	.loc 2 1629 0 discriminator 3
 	add	w1, w1, 1
-.LVL798:
+.LVL807:
 	and	w1, w1, 65535
-.LVL799:
-	.loc 2 1584 0 discriminator 3
+.LVL808:
+	.loc 2 1633 0 discriminator 3
 	sxtw	x2, w2
 	and	x2, x2, -4
 	add	x2, x4, x2
 	str	x2, [x3, 8]
-	b	.L809
+	b	.L817
 	.cfi_endproc
 .LFE216:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -9625,7 +9730,7 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 .LFB217:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -9633,16 +9738,16 @@ FtlLoadMapInfo:
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1600 0
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL800:
-	.loc 2 1602 0
+.LVL809:
+	.loc 2 1651 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #240
+	sub	x0, x0, #248
 	bl	FtlMapTblRecovery
-.LVL801:
-	.loc 2 1605 0
+.LVL810:
+	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -9677,15 +9782,15 @@ FtlVariablesInit:
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	.loc 3 497 0
-	strh	w1, [x0, -96]
+	strh	w1, [x0, -104]
 	.loc 3 496 0
-	str	xzr, [x0, -104]
+	str	xzr, [x0, -112]
 	.loc 3 500 0
 	mov	w1, -1
 	.loc 3 499 0
-	stp	wzr, wzr, [x0, -92]
+	stp	wzr, wzr, [x0, -100]
 	.loc 3 500 0
-	str	w1, [x0, -84]
+	str	w1, [x0, -92]
 	.loc 3 502 0
 	mov	w1, 0
 	ldr	x0, [x19, 128]
@@ -9695,39 +9800,39 @@ FtlVariablesInit:
 	.loc 3 502 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL802:
+.LVL811:
 	.loc 3 503 0
-	ldr	x0, [x19, 2296]
+	ldr	x0, [x19, 2360]
 	mov	w1, 0
 	ldrh	w2, [x19, 22]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL803:
+.LVL812:
 	.loc 3 504 0
-	ldr	x0, [x19, 4016]
+	ldr	x0, [x19, 4008]
 	mov	w1, 0
 	ldrh	w2, [x19, 22]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL804:
+.LVL813:
 	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
-	add	x0, x19, 2592
+	add	x0, x19, 2288
 	bl	ftl_memset
-.LVL805:
+.LVL814:
 	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
-	add	x0, x19, 2712
+	add	x0, x19, 2696
 	bl	ftl_memset
-.LVL806:
+.LVL815:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL807:
+.LVL816:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL808:
+.LVL817:
 	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
@@ -9745,180 +9850,180 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 .LFB224:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 2071 0
+	.loc 2 2120 0
 	mov	w0, 6
 	mov	w1, 0
-	.loc 2 2067 0
+	.loc 2 2116 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 2071 0
+	.loc 2 2120 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 2 2067 0
+	.loc 2 2116 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 2 2082 0
+	.loc 2 2131 0
 	add	x23, x19, 40
-	.loc 2 2067 0
+	.loc 2 2116 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 2079 0
+	.loc 2 2128 0
 	mov	w20, 0
-.LVL809:
-	.loc 2 2077 0
+.LVL818:
+	.loc 2 2126 0
 	mov	w22, 0
-.LVL810:
-	.loc 2 2071 0
+.LVL819:
+	.loc 2 2120 0
 	ldrh	w2, [x19, 22]
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	w21, 0
-.LVL811:
-	.loc 2 2071 0
+.LVL820:
+	.loc 2 2120 0
 	mul	w2, w2, w0
-	ldr	x0, [x19, 2304]
+	ldr	x0, [x19, 2336]
 	bl	ftl_memset
-.LVL812:
-	.loc 2 2075 0
-	strh	wzr, [x19, 2336]
-	.loc 2 2076 0
-	strh	wzr, [x19, 2352]
-	.loc 2 2073 0
-	str	xzr, [x19, 2312]
-	.loc 2 2074 0
-	str	xzr, [x19, 2328]
-	.loc 2 2072 0
+.LVL821:
+	.loc 2 2124 0
+	strh	wzr, [x19, 2376]
+	.loc 2 2125 0
+	strh	wzr, [x19, 2392]
+	.loc 2 2122 0
 	str	xzr, [x19, 2344]
-.L817:
-	.loc 2 2079 0 discriminator 1
+	.loc 2 2123 0
+	str	xzr, [x19, 2368]
+	.loc 2 2121 0
+	str	xzr, [x19, 2384]
+.L825:
+	.loc 2 2128 0 discriminator 1
 	ldrh	w0, [x19, 20]
 	cmp	w20, w0
-	bcs	.L823
-	.loc 2 2081 0
+	bcs	.L831
+	.loc 2 2130 0
 	ldrh	w8, [x19, 12]
-	.loc 2 2084 0
+	.loc 2 2133 0
 	mov	x6, 0
 	ldrh	w7, [x19, 82]
 	mov	w5, 0
-	b	.L824
-.L819:
-	.loc 2 2082 0
+	b	.L832
+.L827:
+	.loc 2 2131 0
 	ldrb	w0, [x23, x6]
 	mov	w1, w20
 	bl	V2P_block
-.LVL813:
-	.loc 2 2083 0
+.LVL822:
+	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL814:
-	cbnz	w0, .L818
-	.loc 2 2084 0
+.LVL823:
+	cbnz	w0, .L826
+	.loc 2 2133 0
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L818:
+.L826:
 	add	x6, x6, 1
-.L824:
-	.loc 2 2081 0 discriminator 1
+.L832:
+	.loc 2 2130 0 discriminator 1
 	cmp	w8, w6, uxth
-	bhi	.L819
-	.loc 2 2086 0
-	cbz	w5, .L826
-	.loc 2 2087 0
+	bhi	.L827
+	.loc 2 2135 0
+	cbz	w5, .L834
+	.loc 2 2136 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L820:
-	.loc 2 2088 0
-	ldr	x1, [x19, 2304]
+.L828:
+	.loc 2 2137 0
+	ldr	x1, [x19, 2336]
 	mov	w0, 6
 	umaddl	x0, w20, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2090 0
-	ldrh	w0, [x19, 2360]
+	.loc 2 2139 0
+	ldrh	w0, [x19, 2400]
 	cmp	w0, w20
-	beq	.L821
-	.loc 2 2090 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x19, 2408]
+	beq	.L829
+	.loc 2 2139 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 2448]
 	cmp	w0, w20
-	beq	.L821
-	.loc 2 2091 0 is_stmt 1
-	ldrh	w0, [x19, 2456]
+	beq	.L829
+	.loc 2 2140 0 is_stmt 1
+	ldrh	w0, [x19, 2496]
 	cmp	w0, w20
-	beq	.L821
-	.loc 2 2094 0
-	ldr	x1, [x19, 2320]
+	beq	.L829
+	.loc 2 2143 0
+	ldr	x1, [x19, 2352]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L822
-	.loc 2 2095 0
+	cbnz	w0, .L830
+	.loc 2 2144 0
 	add	w22, w22, 1
-.LVL815:
-	.loc 2 2096 0
+.LVL824:
+	.loc 2 2145 0
 	mov	w0, w20
-	.loc 2 2095 0
+	.loc 2 2144 0
 	and	w22, w22, 65535
-.LVL816:
-	.loc 2 2096 0
+.LVL825:
+	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL817:
-.L821:
-	.loc 2 2079 0 discriminator 2
+.LVL826:
+.L829:
+	.loc 2 2128 0 discriminator 2
 	add	w20, w20, 1
-.LVL818:
+.LVL827:
 	and	w20, w20, 65535
-.LVL819:
-	b	.L817
-.L826:
+.LVL828:
+	b	.L825
+.L834:
 	mov	w5, 0
-	b	.L820
-.L822:
-	.loc 2 2098 0
+	b	.L828
+.L830:
+	.loc 2 2147 0
 	add	w21, w21, 1
-.LVL820:
-	.loc 2 2099 0
+.LVL829:
+	.loc 2 2148 0
 	mov	w0, w20
-	.loc 2 2098 0
+	.loc 2 2147 0
 	and	w21, w21, 65535
-.LVL821:
-	.loc 2 2099 0
+.LVL830:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL822:
-	b	.L821
-.L823:
-	.loc 2 2103 0
-	strh	w21, [x19, 2336]
-	.loc 2 2105 0
+.LVL831:
+	b	.L829
+.L831:
+	.loc 2 2152 0
+	strh	w21, [x19, 2376]
+	.loc 2 2154 0
 	add	w21, w21, w22
-.LVL823:
-	.loc 2 2104 0
-	strh	w22, [x19, 2352]
-	.loc 2 2105 0
+.LVL832:
+	.loc 2 2153 0
+	strh	w22, [x19, 2392]
+	.loc 2 2154 0
 	cmp	w21, w0
-	ble	.L825
-	.loc 2 2105 0 is_stmt 0 discriminator 1
+	ble	.L833
+	.loc 2 2154 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2105
+	mov	w2, 2154
 	add	x1, x1, 384
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL824:
-.L825:
-	.loc 2 2107 0 is_stmt 1
+.LVL833:
+.L833:
+	.loc 2 2156 0 is_stmt 1
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL825:
+.LVL834:
 	ldp	x21, x22, [sp, 32]
-.LVL826:
+.LVL835:
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
 	.cfi_restore 29
@@ -9937,136 +10042,136 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 .LFB229:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
 	.cfi_offset 30, -120
-	.loc 2 2229 0
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
-	.loc 2 2223 0
+	.loc 2 2279 0
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
+	.loc 2 2273 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 2 2232 0
+	.loc 2 2282 0
 	adrp	x20, .LANCHOR0
-	.loc 2 2223 0
+	.loc 2 2273 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
-	.loc 2 2232 0
+	.loc 2 2282 0
 	add	x24, x20, :lo12:.LANCHOR0
-	.loc 2 2223 0
+	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2232 0
+	.loc 2 2282 0
 	mov	w23, 0
-.LVL827:
+.LVL836:
 	.cfi_offset 21, -96
 	.cfi_offset 22, -88
-	.loc 2 2229 0
+	.loc 2 2279 0
 	adrp	x21, .LANCHOR1
 	add	x1, x21, :lo12:.LANCHOR1
 	add	x1, x1, 408
-	.loc 2 2223 0
+	.loc 2 2273 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -64
 	.cfi_offset 26, -56
 	.cfi_offset 27, -48
 	.cfi_offset 28, -40
-	.loc 2 2231 0
+	.loc 2 2281 0
 	adrp	x22, check_vpc_table
-	.loc 2 2229 0
+	.loc 2 2279 0
 	bl	printk
-.LVL828:
-	.loc 2 2231 0
+.LVL837:
+	.loc 2 2281 0
 	add	x19, x22, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL829:
-.L829:
-	.loc 2 2232 0 discriminator 1
-	ldr	w0, [x24, 2520]
+.LVL838:
+.L837:
+	.loc 2 2282 0 discriminator 1
+	ldr	w0, [x24, 2560]
 	cmp	w23, w0
-	bcc	.L831
-	.loc 2 2247 0 discriminator 1
-	adrp	x25, .LC88
-	.loc 2 2243 0 discriminator 1
+	bcc	.L839
+	.loc 2 2297 0 discriminator 1
+	adrp	x25, .LC91
+	.loc 2 2293 0 discriminator 1
 	add	x23, x20, :lo12:.LANCHOR0
-.LVL830:
-	.loc 2 2245 0 discriminator 1
+.LVL839:
+	.loc 2 2295 0 discriminator 1
 	add	x26, x22, :lo12:check_vpc_table
-	.loc 2 2247 0 discriminator 1
-	add	x25, x25, :lo12:.LC88
+	.loc 2 2297 0 discriminator 1
+	add	x25, x25, :lo12:.LC91
 	mov	w24, 0
-.LVL831:
+.LVL840:
 	mov	w19, 0
-	.loc 2 2248 0 discriminator 1
+	.loc 2 2298 0 discriminator 1
 	mov	w4, 65535
-.L832:
-	.loc 2 2243 0 discriminator 1
+.L840:
+	.loc 2 2293 0 discriminator 1
 	ldrh	w0, [x23, 20]
 	cmp	w0, w19
-	bhi	.L834
-	.loc 2 2255 0
-	ldr	x19, [x23, 2344]
-	cbz	x19, .L835
-.LBB236:
-	.loc 2 2258 0
-	ldr	x0, [x23, 2304]
-	.loc 2 2263 0
-	adrp	x25, .LC89
-	.loc 2 2261 0
+	bhi	.L842
+	.loc 2 2305 0
+	ldr	x19, [x23, 2384]
+	cbz	x19, .L843
+.LBB264:
+	.loc 2 2308 0
+	ldr	x0, [x23, 2336]
+	.loc 2 2313 0
+	adrp	x25, .LC92
+	.loc 2 2311 0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 2263 0
+	.loc 2 2313 0
 	add	x22, x22, :lo12:check_vpc_table
-	.loc 2 2258 0
+	.loc 2 2308 0
 	sub	x19, x19, x0
 	mov	x0, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x0, 0xaaab, lsl 0
-	.loc 2 2263 0
-	add	x25, x25, :lo12:.LC89
-	.loc 2 2257 0
-	ldrh	w26, [x23, 2352]
-.LVL832:
-	.loc 2 2266 0
+	.loc 2 2313 0
+	add	x25, x25, :lo12:.LC92
+	.loc 2 2307 0
+	ldrh	w26, [x23, 2392]
+.LVL841:
+	.loc 2 2316 0
 	mov	w27, 6
-	.loc 2 2259 0
+	.loc 2 2309 0
 	mov	w23, 0
-	.loc 2 2258 0
+	.loc 2 2308 0
 	mul	x19, x19, x0
 	and	w19, w19, 65535
-.L836:
-	.loc 2 2259 0 discriminator 1
+.L844:
+	.loc 2 2309 0 discriminator 1
 	cmp	w23, w26
-	bne	.L838
-.L835:
-.LBE236:
-	.loc 2 2271 0
-	cbz	w24, .L828
-	.loc 2 2271 0 is_stmt 0 discriminator 1
+	bne	.L846
+.L843:
+.LBE264:
+	.loc 2 2321 0
+	cbz	w24, .L836
+	.loc 2 2321 0 is_stmt 0 discriminator 1
 	add	x1, x21, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2271
+	mov	w2, 2321
 	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL833:
-.L828:
-	.loc 2 2272 0 is_stmt 1
+.LVL842:
+.L836:
+	.loc 2 2322 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL834:
+.LVL843:
 	ldp	x25, x26, [sp, 64]
-.LVL835:
+.LVL844:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
@@ -10084,94 +10189,94 @@ ftl_check_vpc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL836:
-.L831:
+.LVL845:
+.L839:
 	.cfi_restore_state
-	.loc 2 2234 0
+	.loc 2 2284 0
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w23
 	bl	log2phys
-.LVL837:
-	.loc 2 2235 0
+.LVL846:
+	.loc 2 2285 0
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L830
-	.loc 2 2237 0
+	beq	.L838
+	.loc 2 2287 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL838:
-	.loc 2 2238 0
+.LVL847:
+	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L830:
-	.loc 2 2232 0 discriminator 2
+.L838:
+	.loc 2 2282 0 discriminator 2
 	add	w23, w23, 1
-	b	.L829
-.LVL839:
-.L834:
-	.loc 2 2245 0
-	ldr	x0, [x23, 2320]
+	b	.L837
+.LVL848:
+.L842:
+	.loc 2 2295 0
+	ldr	x0, [x23, 2352]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L833
+	beq	.L841
 	str	w4, [x29, 108]
-	.loc 2 2247 0
+	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printk
-.LVL840:
-	.loc 2 2248 0
-	ldr	x0, [x23, 2320]
+.LVL849:
+	.loc 2 2298 0
+	ldr	x0, [x23, 2352]
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L833
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L841
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w24, w24, wzr, ls
-.L833:
-	.loc 2 2243 0 discriminator 2
+.L841:
+	.loc 2 2293 0 discriminator 2
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L832
-.LVL841:
-.L838:
-.LBB237:
-	.loc 2 2261 0
-	ldr	x1, [x20, 2320]
+	b	.L840
+.LVL850:
+.L846:
+.LBB265:
+	.loc 2 2311 0
+	ldr	x1, [x20, 2352]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L837
-	.loc 2 2263 0
+	cbz	w2, .L845
+	.loc 2 2313 0
 	ldrh	w3, [x22, w19, sxtw 1]
-	.loc 2 2264 0
+	.loc 2 2314 0
 	mov	w24, 1
-	.loc 2 2263 0
+	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printk
-.LVL842:
-.L837:
-	.loc 2 2266 0
-	ldr	x0, [x20, 2304]
+.LVL851:
+.L845:
+	.loc 2 2316 0
+	ldr	x0, [x20, 2336]
 	umull	x19, w19, w27
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L835
-	.loc 2 2259 0 discriminator 2
+	beq	.L843
+	.loc 2 2309 0 discriminator 2
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L836
-.LBE237:
+	b	.L844
+.LBE265:
 	.cfi_endproc
 .LFE229:
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -10197,27 +10302,27 @@ FtlGcPageVarInit:
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	.loc 5 205 0
-	ldr	x0, [x19, 3288]
+	ldr	x0, [x19, 3272]
 	ldrh	w2, [x19, 86]
 	.loc 5 203 0
-	strh	wzr, [x19, 3284]
+	strh	wzr, [x19, 3268]
 	.loc 5 204 0
-	strh	wzr, [x19, 3296]
+	strh	wzr, [x19, 3280]
 	.loc 5 205 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL843:
+.LVL852:
 	.loc 5 206 0
 	ldrh	w2, [x19, 86]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	ldr	x0, [x19, 3304]
+	ldr	x0, [x19, 3288]
 	bl	ftl_memset
-.LVL844:
+.LVL853:
 	.loc 5 207 0
 	bl	FtlGcBufInit
-.LVL845:
+.LVL854:
 	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -10236,7 +10341,7 @@ FtlGcScanTempBlk:
 .LFB249:
 	.loc 5 211 0
 	.cfi_startproc
-.LVL846:
+.LVL855:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -10253,7 +10358,7 @@ FtlGcScanTempBlk:
 	.loc 5 220 0
 	adrp	x23, .LANCHOR2
 	add	x0, x23, :lo12:.LANCHOR2
-.LVL847:
+.LVL856:
 	.loc 5 211 0
 	stp	x25, x26, [sp, 64]
 	stp	x19, x20, [sp, 16]
@@ -10265,37 +10370,37 @@ FtlGcScanTempBlk:
 	mov	w25, w1
 	.loc 5 220 0
 	ldrh	w19, [x0, 4]
-.LVL848:
+.LVL857:
 	.loc 5 221 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L872
+	beq	.L880
 	.loc 5 223 0
-	cbnz	w19, .L856
-.L857:
+	cbnz	w19, .L864
+.L865:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL849:
-	b	.L858
-.LVL850:
-.L872:
+.LVL858:
+	b	.L866
+.LVL859:
+.L880:
 	.loc 5 222 0
 	mov	w19, 0
-.L856:
+.L864:
 	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR0+82
 	ldrh	w0, [x0, #:lo12:.LANCHOR0+82]
 	cmp	w0, w25
-	beq	.L857
-.L858:
+	beq	.L865
+.L866:
 	.loc 5 235 0
 	adrp	x26, .LANCHOR0
 	.loc 5 234 0
 	add	x22, x26, :lo12:.LANCHOR0
 	.loc 5 222 0
 	mov	w24, 0
-.LVL851:
-.L866:
+.LVL860:
+.L874:
 	.loc 5 228 0
 	ldrh	w1, [x21]
 	mov	w0, 65535
@@ -10303,14 +10408,14 @@ FtlGcScanTempBlk:
 	strb	wzr, [x21, 8]
 	.loc 5 228 0
 	cmp	w1, w0
-	beq	.L873
-.L869:
+	beq	.L881
+.L877:
 	.loc 5 235 0
 	add	x0, x26, :lo12:.LANCHOR0
 	add	x2, x21, 16
 	.loc 5 230 0
 	mov	w20, 0
-.LVL852:
+.LVL861:
 	.loc 5 233 0
 	mov	w9, 65535
 	.loc 5 235 0
@@ -10321,117 +10426,117 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x0, 12]
 	add	x0, x0, 8
 	add	x0, x21, x0, lsl 1
-.LVL853:
-.L860:
+.LVL862:
+.L868:
 	.loc 5 231 0 discriminator 1
 	cmp	x0, x2
-	bne	.L862
+	bne	.L870
 	.loc 5 240 0
-	ldr	x0, [x22, 3968]
+	ldr	x0, [x22, 3960]
 	mov	w1, w20
-.LVL854:
+.LVL863:
 	mov	w2, 0
 	ubfiz	x20, x20, 5, 16
-.LVL855:
+.LVL864:
 	bl	FlashReadPages
-.LVL856:
+.LVL865:
 	.loc 5 241 0
 	mov	x10, 0
 	.loc 5 248 0
 	mov	w11, 65535
-.L863:
+.L871:
 	.loc 5 241 0 discriminator 1
 	cmp	x10, x20
-	bne	.L867
+	bne	.L875
 	.loc 5 264 0
 	add	w19, w19, 1
-.LVL857:
+.LVL866:
 	.loc 5 266 0
 	add	w24, w24, 1
 	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL858:
+.LVL867:
 	.loc 5 268 0
 	cmp	w25, w24
-	bls	.L868
-.L870:
+	bls	.L876
+.L878:
 	.loc 5 274 0
 	ldrh	w0, [x22, 82]
 	cmp	w0, w19
-	bhi	.L869
-.L873:
+	bhi	.L877
+.L881:
 	.loc 5 227 0
 	mov	w2, 0
-.LVL859:
-	b	.L859
-.LVL860:
-.L862:
+.LVL868:
+	b	.L867
+.LVL869:
+.L870:
 	.loc 5 232 0
 	ldrh	w1, [x2]
 	.loc 5 233 0
 	cmp	w1, w9
-	beq	.L861
+	beq	.L869
 	.loc 5 234 0
-	ldr	x4, [x22, 3968]
+	ldr	x4, [x22, 3960]
 	ubfiz	x6, x20, 5, 16
 	orr	w1, w19, w1, lsl 10
-.LVL861:
+.LVL870:
 	add	x4, x4, x6
 	str	w1, [x4, 4]
 	.loc 5 235 0
 	mul	w1, w20, w7
-	ldr	x3, [x22, 3968]
-	ldr	x4, [x22, 3256]
+	ldr	x3, [x22, 3960]
+	ldr	x4, [x22, 3240]
 	sdiv	w1, w1, w5
 	add	x3, x3, x6
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
 	.loc 5 236 0
 	mul	w1, w20, w8
-	ldr	x4, [x22, 3264]
+	ldr	x4, [x22, 3248]
 	.loc 5 237 0
 	add	w20, w20, 1
-.LVL862:
+.LVL871:
 	and	w20, w20, 65535
-.LVL863:
+.LVL872:
 	.loc 5 236 0
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 16]
-.LVL864:
-.L861:
+.LVL873:
+.L869:
 	add	x2, x2, 2
-	b	.L860
-.LVL865:
-.L867:
+	b	.L868
+.LVL874:
+.L875:
 	.loc 5 242 0
-	ldr	x6, [x22, 3968]
+	ldr	x6, [x22, 3960]
 	add	x5, x6, x10
 	ldr	w4, [x5, 4]
-.LVL866:
+.LVL875:
 	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL867:
+.LVL876:
 	and	w2, w0, 65535
-.LVL868:
+.LVL877:
 	.loc 5 245 0
 	ldr	w0, [x6, x10]
-	cbnz	w0, .L864
+	cbnz	w0, .L872
 	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL869:
+.LVL878:
 	add	x10, x10, 32
 	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w11
-	bne	.L865
+	bne	.L873
 	.loc 5 249 0
-	adrp	x0, .LANCHOR3-88
-.LVL870:
+	adrp	x0, .LANCHOR3-96
+.LVL879:
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR3-88]
-.L859:
+	str	w1, [x0, #:lo12:.LANCHOR3-96]
+.L867:
 	.loc 5 281 0
 	add	x23, x23, :lo12:.LANCHOR2
 	.loc 5 282 0
@@ -10447,22 +10552,22 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	x0, x21
 	bl	ftl_sb_update_avl_pages
-.LVL871:
+.LVL880:
 	.loc 5 285 0
-	b	.L871
-.LVL872:
-.L865:
+	b	.L879
+.LVL881:
+.L873:
 	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL873:
+.LVL882:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL874:
-	b	.L863
-.LVL875:
-.L864:
+.LVL883:
+	b	.L871
+.LVL884:
+.L872:
 	.loc 5 256 0
-	ldr	x0, [x22, 2320]
+	ldr	x0, [x22, 2352]
 	.loc 5 259 0
 	mov	w19, 0
 	.loc 5 256 0
@@ -10471,40 +10576,40 @@ FtlGcScanTempBlk:
 	.loc 5 257 0
 	ldrh	w0, [x21]
 	bl	INSERT_FREE_LIST
-.LVL876:
+.LVL885:
 	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x21]
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL877:
+.LVL886:
 	.loc 5 261 0
-	b	.L866
-.L868:
+	b	.L874
+.L876:
 	.loc 5 268 0 discriminator 1
 	add	x1, x23, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x1, 4]
 	cmp	w0, w2
-	beq	.L870
+	beq	.L878
 	.loc 5 269 0
 	add	w0, w0, w24
 	strh	w0, [x1, 4]
 	.loc 5 270 0
 	ldrh	w0, [x22, 82]
 	cmp	w0, w19
-	bls	.L870
-.L871:
+	bls	.L878
+.L879:
 	.loc 5 286 0
 	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
-.LVL878:
+.LVL887:
 	ldp	x21, x22, [sp, 32]
-.LVL879:
+.LVL888:
 	ldp	x23, x24, [sp, 48]
-.LVL880:
+.LVL889:
 	ldp	x25, x26, [sp, 64]
-.LVL881:
+.LVL890:
 	ldp	x29, x30, [sp], 80
 	.cfi_restore 30
 	.cfi_restore 29
@@ -10528,7 +10633,7 @@ FlashTestBlk:
 .LFB264:
 	.loc 1 156 0
 	.cfi_startproc
-.LVL882:
+.LVL891:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -10540,12 +10645,12 @@ FlashTestBlk:
 	.cfi_offset 20, -104
 	.loc 1 156 0
 	and	w19, w0, 65535
-.LVL883:
+.LVL892:
 	.loc 1 161 0
 	cmp	w19, 11
-	bls	.L881
-.LBB240:
-.LBB241:
+	bls	.L889
+.LBB268:
+.LBB269:
 	.loc 1 166 0
 	add	x0, x29, 64
 	.loc 1 167 0
@@ -10558,16 +10663,16 @@ FlashTestBlk:
 	stp	x20, x0, [x29, 40]
 	.loc 1 167 0
 	bl	ftl_memset
-.LVL884:
+.LVL893:
 	.loc 1 169 0
 	lsl	w19, w19, 10
-.LVL885:
+.LVL894:
 	.loc 1 168 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL886:
+.LVL895:
 	.loc 1 170 0
 	mov	w2, 1
 	.loc 1 169 0
@@ -10576,14 +10681,14 @@ FlashTestBlk:
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL887:
+.LVL896:
 	.loc 1 171 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL888:
+.LVL897:
 	.loc 1 172 0
 	ldr	w0, [x29, 32]
 	.loc 1 178 0
@@ -10597,10 +10702,10 @@ FlashTestBlk:
 	csetm	w19, ne
 	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL889:
-.L879:
-.LBE241:
-.LBE240:
+.LVL898:
+.L887:
+.LBE269:
+.LBE268:
 	.loc 1 180 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10612,13 +10717,13 @@ FlashTestBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL890:
-.L881:
+.LVL899:
+.L889:
 	.cfi_restore_state
 	.loc 1 162 0
 	mov	w19, 0
-.LVL891:
-	b	.L879
+.LVL900:
+	b	.L887
 	.cfi_endproc
 .LFE264:
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -10629,7 +10734,7 @@ FlashGetBadBlockList:
 .LFB265:
 	.loc 1 183 0
 	.cfi_startproc
-.LVL892:
+.LVL901:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -10647,47 +10752,47 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	.loc 1 186 0
 	mov	w1, 255
-.LVL893:
+.LVL902:
 	bl	ftl_memset
-.LVL894:
+.LVL903:
 	.loc 1 187 0
 	adrp	x0, g_nand_ops
 	mov	w1, w20
 	ldr	x2, [x0, #:lo12:g_nand_ops]
 	mov	x0, x19
 	blr	x2
-.LVL895:
+.LVL904:
 	and	w0, w0, 65535
-.LVL896:
+.LVL905:
 	.loc 1 188 0
 	cmp	w0, 50
-	bls	.L884
+	bls	.L892
 	.loc 1 189 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL897:
+.LVL906:
 	bl	ftl_memset
-.LVL898:
+.LVL907:
 	.loc 1 190 0
 	mov	w0, 0
-.LVL899:
-.L884:
+.LVL908:
+.L892:
 	.loc 1 192 0
 	adrp	x1, g_nand_phy_info+14
 	ldrh	w1, [x1, #:lo12:g_nand_phy_info+14]
 	cmp	w1, 4
-	bne	.L888
+	bne	.L896
 	mov	x1, 0
-.L886:
+.L894:
 	.loc 1 193 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L887
-.L888:
+	bhi	.L895
+.L896:
 	.loc 1 198 0
 	ldp	x19, x20, [sp, 16]
-.LVL900:
-.LVL901:
+.LVL909:
+.LVL910:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10696,15 +10801,15 @@ FlashGetBadBlockList:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL902:
-.L887:
+.LVL911:
+.L895:
 	.cfi_restore_state
 	.loc 1 194 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L886
+	b	.L894
 	.cfi_endproc
 .LFE265:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -10715,20 +10820,20 @@ ftl_memcpy:
 .LFB267:
 	.loc 1 206 0
 	.cfi_startproc
-.LVL903:
+.LVL912:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	.loc 1 207 0
 	uxtw	x2, w2
-.LVL904:
+.LVL913:
 	.loc 1 206 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 1 207 0
 	bl	memcpy
-.LVL905:
+.LVL914:
 	.loc 1 208 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -10773,41 +10878,41 @@ FtlBbmTblFlush:
 	adrp	x22, .LANCHOR3
 	.loc 4 91 0
 	mov	w21, 0
-.LVL906:
+.LVL915:
 	.loc 4 92 0
 	add	x22, x22, :lo12:.LANCHOR3
 	.loc 4 88 0
-	ldr	x2, [x19, 3392]
+	ldr	x2, [x19, 3384]
 	add	x23, x19, 168
 	.loc 4 87 0
-	ldr	x0, [x19, 2288]
+	ldr	x0, [x19, 3376]
 	.loc 4 88 0
-	str	x2, [x19, 3376]
+	str	x2, [x19, 3360]
 	.loc 4 89 0
 	ldrh	w2, [x19, 90]
 	.loc 4 87 0
-	str	x0, [x19, 3368]
+	str	x0, [x19, 3352]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL907:
-.L893:
+.LVL916:
+.L901:
 	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x19, 34]
-	add	x20, x19, 3360
+	add	x20, x19, 3344
 	cmp	w21, w0
-	blt	.L894
+	blt	.L902
 	.loc 4 94 0
 	ldr	x24, [x20, 16]
-.LVL908:
+.LVL917:
 	.loc 4 95 0
 	mov	w1, 255
 	mov	w2, 16
 	.loc 4 108 0
-	adrp	x22, .LC90
+	adrp	x22, .LC93
 	.loc 4 95 0
 	mov	x0, x24
 	bl	ftl_memset
-.LVL909:
+.LVL918:
 	.loc 4 97 0
 	mov	w0, -3887
 	.loc 4 98 0
@@ -10817,15 +10922,15 @@ FtlBbmTblFlush:
 	.loc 4 104 0
 	add	x25, x25, :lo12:.LANCHOR0
 	.loc 4 108 0
-	add	x22, x22, :lo12:.LC90
+	add	x22, x22, :lo12:.LC93
 	.loc 4 84 0
 	mov	w21, 0
-.LVL910:
+.LVL919:
 	.loc 4 98 0
 	ldr	w0, [x19, 144]
 	.loc 4 82 0
 	mov	w23, 0
-.LVL911:
+.LVL920:
 	.loc 4 98 0
 	str	w0, [x24, 4]
 	.loc 4 99 0
@@ -10843,12 +10948,12 @@ FtlBbmTblFlush:
 	mov	x19, x1
 	.loc 4 102 0
 	strh	w0, [x24, 12]
-.L895:
+.L903:
 	.loc 4 104 0
-	ldr	x0, [x25, 2288]
+	ldr	x0, [x25, 3376]
 	str	x0, [x20, 8]
 	.loc 4 105 0
-	ldr	x0, [x25, 3392]
+	ldr	x0, [x25, 3384]
 	str	x0, [x20, 16]
 	.loc 4 107 0
 	ldrh	w1, [x19]
@@ -10865,20 +10970,20 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	mov	x0, x22
 	bl	printk
-.LVL912:
+.LVL921:
 	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL913:
+.LVL922:
 	.loc 4 110 0
 	ldrh	w0, [x25, 84]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L896
+	blt	.L904
 	.loc 4 113 0
 	ldr	w0, [x19, 8]
 	.loc 4 122 0
@@ -10897,7 +11002,7 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	w1, [x19, 4]
 	.loc 4 121 0
-	ldr	x1, [x25, 3912]
+	ldr	x1, [x25, 3904]
 	.loc 4 116 0
 	strh	w0, [x19]
 	.loc 4 119 0
@@ -10909,17 +11014,17 @@ FtlBbmTblFlush:
 	str	w0, [x1, 4]
 	.loc 4 122 0
 	mov	w1, w2
-	ldr	x0, [x25, 3912]
+	ldr	x0, [x25, 3904]
 	bl	FlashEraseBlocks
-.LVL914:
+.LVL923:
 	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL915:
-.L896:
+.LVL924:
+.L904:
 	.loc 4 126 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
@@ -10927,37 +11032,37 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L897
+	bne	.L905
 	.loc 4 129 0
 	ldr	w1, [x20, 4]
 	.loc 4 130 0
 	add	w21, w21, 1
-.LVL916:
+.LVL925:
 	.loc 4 129 0
-	adrp	x0, .LC91
+	adrp	x0, .LC94
 	.loc 4 130 0
 	and	w21, w21, 65535
-.LVL917:
+.LVL926:
 	.loc 4 129 0
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC94
 	bl	printk
-.LVL918:
+.LVL927:
 	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L895
+	bls	.L903
 	.loc 4 132 0
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC92
+	adrp	x0, .LC95
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC95
 	bl	printk
-.LVL919:
-.L899:
-	b	.L899
-.LVL920:
-.L894:
+.LVL928:
+.L907:
+	b	.L907
+.LVL929:
+.L902:
 	.loc 4 92 0 discriminator 3
-	ldrh	w2, [x22, -248]
+	ldrh	w2, [x22, -256]
 	ldr	x1, [x23], 8
 	ldr	x0, [x20, 8]
 	mul	w3, w21, w2
@@ -10967,23 +11072,23 @@ FtlBbmTblFlush:
 	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL921:
-	b	.L893
-.LVL922:
-.L900:
+.LVL930:
+	b	.L901
+.LVL931:
+.L908:
 	mov	w23, 1
-	b	.L895
-.L897:
+	b	.L903
+.L905:
 	.loc 4 139 0
-	cbz	w23, .L900
+	cbz	w23, .L908
 	.loc 4 146 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL923:
+.LVL932:
 	ldp	x23, x24, [sp, 48]
-.LVL924:
+.LVL933:
 	ldp	x29, x30, [sp], 80
 	.cfi_restore 30
 	.cfi_restore 29
@@ -11004,9 +11109,9 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 .LFB237:
-	.loc 2 2531 0
+	.loc 2 2579 0
 	.cfi_startproc
-.LVL925:
+.LVL934:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -11016,10 +11121,10 @@ allocate_data_superblock:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 2537 0
+	.loc 2 2585 0
 	adrp	x21, .LANCHOR0
 	add	x22, x21, :lo12:.LANCHOR0
-	.loc 2 2531 0
+	.loc 2 2579 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 19, -96
@@ -11027,423 +11132,423 @@ allocate_data_superblock:
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
 	mov	x20, x0
-	.loc 2 2539 0
+	.loc 2 2587 0
 	mov	x19, x22
-	add	x23, x22, 2456
-	.loc 2 2531 0
+	add	x23, x22, 2496
+	.loc 2 2579 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-.LVL926:
-.L903:
-	.loc 2 2537 0
-	ldrh	w1, [x22, 2336]
-	ldrh	w0, [x22, 2352]
+.LVL935:
+.L911:
+	.loc 2 2585 0
+	ldrh	w1, [x22, 2376]
+	ldrh	w0, [x22, 2392]
 	add	w0, w0, w1
 	ldrh	w1, [x22, 20]
 	cmp	w0, w1
-	ble	.L904
-	.loc 2 2537 0 is_stmt 0 discriminator 1
+	ble	.L912
+	.loc 2 2585 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2537
+	mov	w2, 2585
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL927:
-.L904:
-	.loc 2 2539 0 is_stmt 1
+.LVL936:
+.L912:
+	.loc 2 2587 0 is_stmt 1
 	cmp	x20, x23
-	bne	.L929
-	.loc 2 2540 0
-	ldrh	w0, [x19, 2352]
-	ldr	w1, [x19, 3236]
+	bne	.L937
+	.loc 2 2588 0
+	ldrh	w0, [x19, 2392]
+	ldr	w1, [x19, 3220]
 	mul	w1, w0, w1
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-	.loc 2 2544 0
+	.loc 2 2592 0
 	ands	w1, w1, 65535
-.LVL928:
-	beq	.L905
-	.loc 2 2545 0
+.LVL937:
+	beq	.L913
+	.loc 2 2593 0
 	sub	w1, w1, #1
-.LVL929:
+.LVL938:
 	and	w1, w1, 65535
-.LVL930:
-.L905:
-	.loc 2 2546 0
-	add	x0, x19, 2344
+.LVL939:
+.L913:
+	.loc 2 2594 0
+	add	x0, x19, 2384
 	bl	List_pop_index_node
-.LVL931:
+.LVL940:
 	and	w24, w0, 65535
-	ldrh	w0, [x19, 2352]
-	cbnz	w0, .L906
-	.loc 2 2546 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 2392]
+	cbnz	w0, .L914
+	.loc 2 2594 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2546
+	mov	w2, 2594
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL932:
-.L906:
-	.loc 2 2546 0 discriminator 3
-	ldrh	w0, [x19, 2352]
+.LVL941:
+.L914:
+	.loc 2 2594 0 discriminator 3
+	ldrh	w0, [x19, 2392]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2352]
-	.loc 2 2549 0 is_stmt 1 discriminator 3
+	strh	w0, [x19, 2392]
+	.loc 2 2597 0 is_stmt 1 discriminator 3
 	strh	w24, [x20]
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2598 0 discriminator 3
 	mov	x0, x20
 	bl	make_superblock
-.LVL933:
-	.loc 2 2551 0 discriminator 3
+.LVL942:
+	.loc 2 2599 0 discriminator 3
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L907
-	.loc 2 2555 0
-	ldr	x1, [x19, 2320]
+	cbnz	w0, .L915
+	.loc 2 2603 0
+	ldr	x1, [x19, 2352]
 	ubfiz	x0, x24, 1, 16
 	mov	w2, -1
 	strh	w2, [x1, x0]
-	.loc 2 2556 0
+	.loc 2 2604 0
 	mov	w0, w24
 	bl	INSERT_DATA_LIST
-.LVL934:
-	.loc 2 2557 0
-	ldrh	w1, [x19, 2336]
-	ldrh	w0, [x19, 2352]
+.LVL943:
+	.loc 2 2605 0
+	ldrh	w1, [x19, 2376]
+	ldrh	w0, [x19, 2392]
 	add	w0, w0, w1
 	ldrh	w1, [x19, 20]
 	cmp	w0, w1
-	ble	.L903
-	.loc 2 2557 0 is_stmt 0 discriminator 1
+	ble	.L911
+	.loc 2 2605 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2557
+	mov	w2, 2605
 	add	x1, x1, 424
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL935:
-	b	.L903
-.L929:
+.LVL944:
+	b	.L911
+.L937:
 	mov	w1, 0
-.LVL936:
-	b	.L905
-.LVL937:
-.L907:
-	.loc 2 2560 0 is_stmt 1
-	ldrh	w1, [x19, 2336]
-	ldrh	w0, [x19, 2352]
+.LVL945:
+	b	.L913
+.LVL946:
+.L915:
+	.loc 2 2608 0 is_stmt 1
+	ldrh	w1, [x19, 2376]
+	ldrh	w0, [x19, 2392]
 	add	w0, w0, w1
 	ldrh	w1, [x19, 20]
 	cmp	w0, w1
-	ble	.L909
-	.loc 2 2560 0 is_stmt 0 discriminator 1
+	ble	.L917
+	.loc 2 2608 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2560
+	mov	w2, 2608
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL938:
-.L909:
+.LVL947:
+.L917:
 	add	x27, x20, 16
-	.loc 2 2563 0 is_stmt 1 discriminator 1
+	.loc 2 2611 0 is_stmt 1 discriminator 1
 	ldrh	w4, [x19, 12]
 	mov	x3, x27
 	mov	x0, 0
 	mov	w25, 0
-	.loc 2 2566 0 discriminator 1
+	.loc 2 2614 0 discriminator 1
 	mov	w5, 65535
-.L910:
-	.loc 2 2563 0 discriminator 1
+.L918:
+	.loc 2 2611 0 discriminator 1
 	cmp	w4, w0, uxth
-	bhi	.L912
-	.loc 2 2571 0
-	cbnz	w25, .L913
-	.loc 2 2571 0 is_stmt 0 discriminator 1
+	bhi	.L920
+	.loc 2 2619 0
+	cbnz	w25, .L921
+	.loc 2 2619 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2571
+	mov	w2, 2619
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL939:
-.L913:
-	.loc 2 2573 0 is_stmt 1
-	ldrh	w0, [x19, 2664]
+.LVL948:
+.L921:
+	.loc 2 2621 0 is_stmt 1
+	ldrh	w0, [x19, 2648]
 	cmp	w0, w24
-	bne	.L914
-	.loc 2 2573 0 is_stmt 0 discriminator 1
+	bne	.L922
+	.loc 2 2621 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2573
+	mov	w2, 2621
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL940:
-.L914:
-	.loc 2 2574 0 is_stmt 1
+.LVL949:
+.L922:
+	.loc 2 2622 0 is_stmt 1
 	ldrb	w0, [x20, 8]
 	uxtw	x26, w24
-.LVL941:
-	cbnz	w0, .L915
-	.loc 2 2575 0
-	ldr	x2, [x19, 2296]
+.LVL950:
+	cbnz	w0, .L923
+	.loc 2 2623 0
+	ldr	x2, [x19, 2360]
 	lsl	x1, x26, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L916
-	.loc 2 2576 0
+	cbz	w0, .L924
+	.loc 2 2624 0
 	ldrh	w3, [x19, 72]
 	add	w0, w0, w3
-.L937:
-	.loc 2 2578 0
+.L945:
+	.loc 2 2626 0
 	strh	w0, [x2, x1]
-	.loc 2 2580 0
+	.loc 2 2628 0
 	mov	w1, 0
-	.loc 2 2579 0
-	ldr	w0, [x19, 2564]
+	.loc 2 2627 0
+	ldr	w0, [x19, 2604]
 	add	w0, w0, 1
-	str	w0, [x19, 2564]
-.LVL942:
-	.loc 2 2580 0
+	str	w0, [x19, 2604]
+.LVL951:
+	.loc 2 2628 0
 	mov	w0, w24
 	bl	ftl_set_blk_mode
-.LVL943:
-.L918:
-	.loc 2 2587 0
-	ldr	x0, [x19, 2296]
-.LVL944:
+.LVL952:
+.L926:
+	.loc 2 2635 0
+	ldr	x0, [x19, 2360]
+.LVL953:
 	lsl	x26, x26, 1
-.LVL945:
-	ldr	w1, [x19, 2580]
+.LVL954:
+	ldr	w1, [x19, 2620]
 	ldrh	w0, [x0, x26]
 	cmp	w0, w1
-	bls	.L919
-	.loc 2 2588 0
-	str	w0, [x19, 2580]
-.L919:
-	.loc 2 2590 0
-	ldr	w1, [x19, 2568]
+	bls	.L927
+	.loc 2 2636 0
+	str	w0, [x19, 2620]
+.L927:
+	.loc 2 2638 0
+	ldr	w1, [x19, 2608]
 	ubfiz	x3, x25, 5, 16
 	ldrh	w0, [x19, 72]
-	ldr	w2, [x19, 2564]
+	ldr	w2, [x19, 2604]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x19, 20]
 	udiv	w0, w0, w1
-	.loc 2 2591 0
-	ldr	x1, [x19, 4024]
-	.loc 2 2590 0
-	str	w0, [x19, 2572]
-	.loc 2 2591 0
+	.loc 2 2639 0
+	ldr	x1, [x19, 4016]
+	.loc 2 2638 0
+	str	w0, [x19, 2612]
+	.loc 2 2639 0
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-	.loc 2 2593 0
+	.loc 2 2641 0
 	mov	x0, 0
-.L920:
-	.loc 2 2593 0 is_stmt 0 discriminator 1
+.L928:
+	.loc 2 2641 0 is_stmt 0 discriminator 1
 	cmp	x3, x0
-	bne	.L921
-	.loc 2 2595 0 is_stmt 1
+	bne	.L929
+	.loc 2 2643 0 is_stmt 1
 	ldrb	w1, [x20, 8]
 	mov	w2, w25
-	ldr	x0, [x19, 3912]
-	.loc 2 2597 0
+	ldr	x0, [x19, 3904]
+	.loc 2 2645 0
 	mov	x28, 0
-	.loc 2 2595 0
+	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL946:
-	.loc 2 2596 0
+.LVL955:
+	.loc 2 2644 0
 	mov	w1, 0
-.LVL947:
-.L922:
-	.loc 2 2597 0 discriminator 1
+.LVL956:
+.L930:
+	.loc 2 2645 0 discriminator 1
 	cmp	w25, w28, uxth
-	bhi	.L924
-	.loc 2 2608 0
+	bhi	.L932
+	.loc 2 2656 0
 	cmp	w1, 0
-	ble	.L925
-	.loc 2 2609 0
+	ble	.L933
+	.loc 2 2657 0
 	mov	w0, w24
 	bl	update_multiplier_value
-.LVL948:
-	.loc 2 2610 0
+.LVL957:
+	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL949:
-.L925:
-	.loc 2 2613 0
+.LVL958:
+.L933:
+	.loc 2 2661 0
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L926
-	.loc 2 2615 0
-	ldr	x0, [x19, 2320]
+	cbnz	w0, .L934
+	.loc 2 2663 0
+	ldr	x0, [x19, 2352]
 	mov	w1, -1
-.LVL950:
+.LVL959:
 	strh	w1, [x0, x26]
-	.loc 2 2616 0
+	.loc 2 2664 0
 	mov	w0, w24
 	bl	INSERT_DATA_LIST
-.LVL951:
-	.loc 2 2617 0
-	b	.L903
-.L912:
-	.loc 2 2564 0
-	ldr	x1, [x19, 3912]
+.LVL960:
+	.loc 2 2665 0
+	b	.L911
+.L920:
+	.loc 2 2612 0
+	ldr	x1, [x19, 3904]
 	add	x2, x1, x0, lsl 5
-	.loc 2 2565 0
+	.loc 2 2613 0
 	stp	xzr, xzr, [x2, 8]
-	.loc 2 2566 0
+	.loc 2 2614 0
 	ldrh	w2, [x3]
 	cmp	w2, w5
-	beq	.L911
-	.loc 2 2567 0
+	beq	.L919
+	.loc 2 2615 0
 	ubfiz	x6, x25, 5, 16
-	.loc 2 2568 0
+	.loc 2 2616 0
 	add	w25, w25, 1
-.LVL952:
-	.loc 2 2567 0
+.LVL961:
+	.loc 2 2615 0
 	add	x1, x1, x6
-	.loc 2 2568 0
+	.loc 2 2616 0
 	and	w25, w25, 65535
-.LVL953:
-	.loc 2 2567 0
+.LVL962:
+	.loc 2 2615 0
 	lsl	w2, w2, 10
 	str	w2, [x1, 4]
-.L911:
+.L919:
 	add	x0, x0, 1
 	add	x3, x3, 2
-	b	.L910
-.LVL954:
-.L916:
-	.loc 2 2578 0
+	b	.L918
+.LVL963:
+.L924:
+	.loc 2 2626 0
 	mov	w0, 2
-	b	.L937
-.L915:
-	.loc 2 2582 0
-	ldr	x2, [x19, 2296]
+	b	.L945
+.L923:
+	.loc 2 2630 0
+	ldr	x2, [x19, 2360]
 	lsl	x0, x26, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2583 0
-	ldr	w0, [x19, 2568]
+	.loc 2 2631 0
+	ldr	w0, [x19, 2608]
 	add	w0, w0, 1
-	str	w0, [x19, 2568]
-.LBB242:
-.LBB243:
+	str	w0, [x19, 2608]
+.LBB270:
+.LBB271:
 	mov	w0, w24
 	bl	ftl_set_blk_mode.part.7
-.LVL955:
-	b	.L918
-.LVL956:
-.L921:
-.LBE243:
-.LBE242:
-	.loc 2 2594 0 discriminator 3
-	ldr	x1, [x19, 3912]
+.LVL964:
+	b	.L926
+.LVL965:
+.L929:
+.LBE271:
+.LBE270:
+	.loc 2 2642 0 discriminator 3
+	ldr	x1, [x19, 3904]
 	add	x1, x1, x0
 	add	x0, x0, 32
 	ldr	w2, [x1, 4]
 	and	w2, w2, -1024
 	str	w2, [x1, 4]
-	b	.L920
-.LVL957:
-.L924:
-	.loc 2 2598 0
-	ldr	x2, [x19, 3912]
+	b	.L928
+.LVL966:
+.L932:
+	.loc 2 2646 0
+	ldr	x2, [x19, 3904]
 	lsl	x0, x28, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L923
-	.loc 2 2599 0
+	bne	.L931
+	.loc 2 2647 0
 	add	w1, w1, 1
-	.loc 2 2600 0
+	.loc 2 2648 0
 	ldr	w0, [x3, 4]
-	.loc 2 2599 0
+	.loc 2 2647 0
 	stp	w2, w1, [x29, 104]
-	.loc 2 2601 0
+	.loc 2 2649 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL958:
-	.loc 2 2603 0
+.LVL967:
+	.loc 2 2651 0
 	ldp	w2, w1, [x29, 104]
-	.loc 2 2602 0
+	.loc 2 2650 0
 	strh	w2, [x27]
-	.loc 2 2603 0
+	.loc 2 2651 0
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-.LVL959:
-.L923:
+.LVL968:
+.L931:
 	add	x28, x28, 1
 	add	x27, x27, 2
-	b	.L922
-.L926:
-	.loc 2 2620 0
+	b	.L930
+.L934:
+	.loc 2 2668 0
 	add	x21, x21, :lo12:.LANCHOR0
-	.loc 2 2622 0
+	.loc 2 2670 0
 	strh	wzr, [x20, 2]
-	.loc 2 2623 0
+	.loc 2 2671 0
 	strb	wzr, [x20, 6]
-	.loc 2 2620 0
+	.loc 2 2668 0
 	ldrh	w1, [x21, 82]
-.LVL960:
-	.loc 2 2621 0
+.LVL969:
+	.loc 2 2669 0
 	strh	w24, [x20]
-	.loc 2 2620 0
+	.loc 2 2668 0
 	mul	w0, w0, w1
-	.loc 2 2624 0
-	ldr	w1, [x21, 2556]
+	.loc 2 2672 0
+	ldr	w1, [x21, 2596]
 	str	w1, [x20, 12]
-	.loc 2 2620 0
+	.loc 2 2668 0
 	and	w0, w0, 65535
-	.loc 2 2624 0
+	.loc 2 2672 0
 	add	w1, w1, 1
-	.loc 2 2620 0
+	.loc 2 2668 0
 	strh	w0, [x20, 4]
-	.loc 2 2624 0
-	str	w1, [x21, 2556]
-	.loc 2 2625 0
-	ldr	x1, [x21, 2320]
+	.loc 2 2672 0
+	str	w1, [x21, 2596]
+	.loc 2 2673 0
+	ldr	x1, [x21, 2352]
 	ldrh	w2, [x20]
 	strh	w0, [x1, x2, lsl 1]
-	.loc 2 2626 0
+	.loc 2 2674 0
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L927
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	w0, .L935
+	.loc 2 2674 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L928
-.L927:
-	.loc 2 2626 0 discriminator 3
+	cbnz	w0, .L936
+.L935:
+	.loc 2 2674 0 discriminator 3
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2626
+	mov	w2, 2674
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL961:
-.L928:
-	.loc 2 2628 0 is_stmt 1
+.LVL970:
+.L936:
+	.loc 2 2676 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL962:
+.LVL971:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL963:
+.LVL972:
 	ldp	x25, x26, [sp, 64]
-.LVL964:
+.LVL973:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
@@ -11470,7 +11575,7 @@ FtlGcFreeBadSuperBlk:
 .LFB256:
 	.loc 5 390 0
 	.cfi_startproc
-.LVL965:
+.LVL974:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -11488,11 +11593,11 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	and	w22, w0, 65535
-.LVL966:
+.LVL975:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.loc 5 395 0
-	ldrh	w0, [x19, 3316]
+	ldrh	w0, [x19, 3300]
 	.loc 5 390 0
 	str	x27, [sp, 80]
 	.cfi_offset 23, -48
@@ -11501,40 +11606,40 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.loc 5 395 0
-	cbz	w0, .L939
-.LBB246:
-.LBB247:
+	cbz	w0, .L947
+.LBB274:
+.LBB275:
 	.loc 5 397 0
 	add	x23, x19, 40
 	.loc 5 399 0
-	add	x24, x19, 3320
-.LBE247:
-.LBE246:
+	add	x24, x19, 3304
+.LBE275:
+.LBE274:
 	mov	w21, 0
-.LVL967:
-.L940:
-.LBB250:
-.LBB248:
+.LVL976:
+.L948:
+.LBB278:
+.LBB276:
 	.loc 5 396 0
 	ldrh	w0, [x19, 12]
 	cmp	w0, w21
-	bhi	.L946
+	bhi	.L954
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL968:
-.L939:
-.LBE248:
-.LBE250:
+.LVL977:
+.L947:
+.LBE276:
+.LBE278:
 	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL969:
+.LVL978:
 	ldp	x21, x22, [sp, 32]
-.LVL970:
+.LVL979:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL971:
+.LVL980:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11550,83 +11655,83 @@ FtlGcFreeBadSuperBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL972:
-.L946:
+.LVL981:
+.L954:
 	.cfi_restore_state
-.LBB251:
-.LBB249:
+.LBB279:
+.LBB277:
 	.loc 5 397 0
 	ldrb	w0, [x23, w21, sxtw]
 	mov	w1, w22
 	.loc 5 401 0
-	adrp	x26, .LC93
-	add	x26, x26, :lo12:.LC93
+	adrp	x26, .LC96
+	add	x26, x26, :lo12:.LC96
 	.loc 5 398 0
 	mov	w20, 0
 	.loc 5 397 0
 	bl	V2P_block
-.LVL973:
+.LVL982:
 	and	w25, w0, 65535
-.L941:
+.L949:
 	.loc 5 398 0
-	ldrh	w0, [x19, 3316]
+	ldrh	w0, [x19, 3300]
 	cmp	w0, w20
-	bhi	.L945
+	bhi	.L953
 	.loc 5 396 0
 	add	w21, w21, 1
-.LVL974:
+.LVL983:
 	and	w21, w21, 65535
-.LVL975:
-	b	.L940
-.L945:
+.LVL984:
+	b	.L948
+.L953:
 	.loc 5 399 0
 	ldrh	w0, [x24, w20, sxtw 1]
 	add	w27, w20, 1
 	cmp	w0, w25
-	bne	.L942
+	bne	.L950
 	.loc 5 401 0
 	mov	w1, w25
 	mov	x0, x26
 	bl	printk
-.LVL976:
+.LVL985:
 	.loc 5 403 0
 	mov	w0, w25
 	bl	FtlBbmMapBadBlock
-.LVL977:
+.LVL986:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL978:
+.LVL987:
 	.loc 5 405 0
-	ldrh	w0, [x19, 3316]
+	ldrh	w0, [x19, 3300]
 	mov	w1, w27
-.LVL979:
-.L943:
+.LVL988:
+.L951:
 	cmp	w20, w0
-	bcc	.L944
+	bcc	.L952
 	.loc 5 407 0
 	sub	w0, w0, #1
-	strh	w0, [x19, 3316]
-.L942:
+	strh	w0, [x19, 3300]
+.L950:
 	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL980:
-	b	.L941
-.LVL981:
-.L944:
+.LVL989:
+	b	.L949
+.LVL990:
+.L952:
 	.loc 5 406 0
 	sub	w2, w1, #1
 	ldrh	w3, [x24, w1, sxtw 1]
 	.loc 5 405 0
 	add	w20, w20, 1
-.LVL982:
+.LVL991:
 	add	w1, w1, 1
 	and	w20, w20, 65535
-.LVL983:
+.LVL992:
 	.loc 5 406 0
 	strh	w3, [x24, w2, sxtw 1]
-	b	.L943
-.LBE249:
-.LBE251:
+	b	.L951
+.LBE277:
+.LBE279:
 	.cfi_endproc
 .LFE256:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -11635,9 +11740,9 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 .LFB240:
-	.loc 2 2687 0
+	.loc 2 2735 0
 	.cfi_startproc
-.LVL984:
+.LVL993:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -11648,78 +11753,78 @@ update_vpc_list:
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	and	w19, w0, 65535
-.LVL985:
-	.loc 2 2688 0
+.LVL994:
+	.loc 2 2736 0
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 2 2687 0
+	.loc 2 2735 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2688 0
+	.loc 2 2736 0
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, 2320]
+	ldr	x2, [x0, 2352]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L952
-	.loc 2 2689 0
-	ldrh	w1, [x0, 2664]
+	cbnz	w1, .L960
+	.loc 2 2737 0
+	ldrh	w1, [x0, 2648]
 	cmp	w1, w19
-	bne	.L953
-	.loc 2 2691 0
+	bne	.L961
+	.loc 2 2739 0
 	mov	w1, -1
-	strh	w1, [x0, 2664]
-.L954:
-.LBB254:
-.LBB255:
-	.loc 2 2696 0
+	strh	w1, [x0, 2648]
+.L962:
+.LBB282:
+.LBB283:
+	.loc 2 2744 0
 	add	x21, x20, :lo12:.LANCHOR0
 	mov	w1, w19
-	add	x0, x21, 2312
+	add	x0, x21, 2344
 	bl	List_remove_node
-.LVL986:
-	ldrh	w0, [x21, 2336]
-	cbnz	w0, .L956
+.LVL995:
+	ldrh	w0, [x21, 2376]
+	cbnz	w0, .L964
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2696
+	mov	w2, 2744
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL987:
-.L956:
+.LVL996:
+.L964:
 	add	x20, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x20, 2336]
+	ldrh	w0, [x20, 2376]
 	sub	w0, w0, #1
-	strh	w0, [x20, 2336]
-	.loc 2 2697 0
+	strh	w0, [x20, 2376]
+	.loc 2 2745 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL988:
-	.loc 2 2698 0
+.LVL997:
+	.loc 2 2746 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL989:
-	.loc 2 2699 0
-	ldrh	w1, [x20, 2336]
+.LVL998:
+	.loc 2 2747 0
+	ldrh	w1, [x20, 2376]
 	mov	w19, 1
-.LVL990:
-	ldrh	w0, [x20, 2352]
+.LVL999:
+	ldrh	w0, [x20, 2392]
 	add	w0, w0, w1
 	ldrh	w1, [x20, 20]
 	cmp	w0, w1
-	ble	.L951
+	ble	.L959
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2699
+	mov	w2, 2747
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL991:
-.L951:
-.LBE255:
-.LBE254:
-	.loc 2 2705 0
+.LVL1000:
+.L959:
+.LBE283:
+.LBE282:
+	.loc 2 2753 0
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -11732,33 +11837,33 @@ update_vpc_list:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL992:
-.L953:
+.LVL1001:
+.L961:
 	.cfi_restore_state
-	.loc 2 2692 0
-	ldrh	w1, [x0, 2360]
+	.loc 2 2740 0
+	ldrh	w1, [x0, 2400]
 	cmp	w1, w19
-	beq	.L959
-	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x0, 2408]
+	beq	.L967
+	.loc 2 2740 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x0, 2448]
 	cmp	w1, w19
-	beq	.L959
-	.loc 2 2692 0 discriminator 2
-	ldrh	w0, [x0, 2456]
+	beq	.L967
+	.loc 2 2740 0 discriminator 2
+	ldrh	w0, [x0, 2496]
 	cmp	w0, w19
-	bne	.L954
-.L959:
-	.loc 2 2694 0 is_stmt 1
+	bne	.L962
+.L967:
+	.loc 2 2742 0 is_stmt 1
 	mov	w19, 0
-.LVL993:
-	b	.L951
-.LVL994:
-.L952:
-	.loc 2 2702 0
+.LVL1002:
+	b	.L959
+.LVL1003:
+.L960:
+	.loc 2 2750 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL995:
-	b	.L959
+.LVL1004:
+	b	.L967
 	.cfi_endproc
 .LFE240:
 	.size	update_vpc_list, .-update_vpc_list
@@ -11767,9 +11872,9 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 .LFB241:
-	.loc 2 2708 0
+	.loc 2 2756 0
 	.cfi_startproc
-.LVL996:
+.LVL1005:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -11780,40 +11885,40 @@ decrement_vpc_count:
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	and	w19, w0, 65535
-.LVL997:
+.LVL1006:
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2711 0
+	.loc 2 2759 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L963
-	.loc 2 2712 0
+	beq	.L971
+	.loc 2 2760 0
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, 2320]
+	ldr	x1, [x20, 2352]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L964
-	.loc 2 2713 0
+	cbnz	w0, .L972
+	.loc 2 2761 0
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	bl	printk
-.LVL998:
-	.loc 2 2714 0
-	ldr	x0, [x20, 2320]
+.LVL1007:
+	.loc 2 2762 0
+	ldr	x0, [x20, 2352]
 	ldrh	w0, [x0, x21]
-	cbz	w0, .L965
-.L970:
-	.loc 2 2715 0 discriminator 1
+	cbz	w0, .L973
+.L978:
+	.loc 2 2763 0 discriminator 1
 	mov	w21, 0
-.L962:
-	.loc 2 2733 0
+.L970:
+	.loc 2 2781 0
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL999:
+.LVL1008:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11823,53 +11928,53 @@ decrement_vpc_count:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1000:
-.L965:
+.LVL1009:
+.L973:
 	.cfi_restore_state
-	.loc 2 2714 0 discriminator 1
+	.loc 2 2762 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2714
+	mov	w2, 2762
 	add	x1, x1, 472
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1001:
-	b	.L970
-.L964:
-	.loc 2 2717 0
+.LVL1010:
+	b	.L978
+.L972:
+	.loc 2 2765 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L963:
-	.loc 2 2721 0
+.L971:
+	.loc 2 2769 0
 	adrp	x20, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w1, 65535
-	ldrh	w0, [x20, -96]
+	ldrh	w0, [x20, -104]
 	cmp	w0, w1
-	bne	.L967
-	.loc 2 2722 0
-	strh	w19, [x20, -96]
-	b	.L970
-.L967:
-	.loc 2 2724 0
+	bne	.L975
+	.loc 2 2770 0
+	strh	w19, [x20, -104]
+	b	.L978
+.L975:
+	.loc 2 2772 0
 	cmp	w19, w0
-	beq	.L970
-	.loc 2 2727 0
+	beq	.L978
+	.loc 2 2775 0
 	bl	update_vpc_list
-.LVL1002:
+.LVL1011:
 	cmp	w0, 0
-	.loc 2 2730 0
+	.loc 2 2778 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 2 2729 0
-	strh	w19, [x20, -96]
-	.loc 2 2727 0
+	.loc 2 2777 0
+	strh	w19, [x20, -104]
+	.loc 2 2775 0
 	cset	w21, ne
-	.loc 2 2730 0
-	ldr	x2, [x1, 2304]
-	ldr	x0, [x1, 2312]
-	ldr	x1, [x1, 2320]
+	.loc 2 2778 0
+	ldr	x2, [x1, 2336]
+	ldr	x0, [x1, 2344]
+	ldr	x1, [x1, 2352]
 	sub	x0, x0, x2
 	mov	x2, -6148914691236517206
 	asr	x0, x0, 1
@@ -11877,20 +11982,20 @@ decrement_vpc_count:
 	mul	x0, x0, x2
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L962
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbnz	w1, .L970
+	.loc 2 2778 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
-	beq	.L962
-	.loc 2 2730 0 discriminator 2
+	beq	.L970
+	.loc 2 2778 0 discriminator 2
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2730
+	mov	w2, 2778
 	add	x1, x1, 472
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1003:
-	b	.L962
+.LVL1012:
+	b	.L970
 	.cfi_endproc
 .LFE241:
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -11899,7 +12004,7 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 .LFB207:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
@@ -11910,10 +12015,10 @@ FtlWriteDump_data:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 2 948 0
+	.loc 2 997 0
 	adrp	x19, .LANCHOR0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 2 947 0
+	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
@@ -11922,93 +12027,93 @@ FtlWriteDump_data:
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
 	.cfi_offset 25, -64
-	.loc 2 948 0
-	ldrh	w2, [x20, 2364]
-	cbz	w2, .L972
-	.loc 2 948 0 is_stmt 0 discriminator 1
-	ldrb	w1, [x20, 2368]
-	cbnz	w1, .L972
-	.loc 2 949 0 is_stmt 1
-	ldrb	w1, [x20, 2367]
+	.loc 2 997 0
+	ldrh	w2, [x20, 2404]
+	cbz	w2, .L980
+	.loc 2 997 0 is_stmt 0 discriminator 1
+	ldrb	w1, [x20, 2408]
+	cbnz	w1, .L980
+	.loc 2 998 0 is_stmt 1
+	ldrb	w1, [x20, 2407]
 	ldrh	w3, [x20, 82]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L972
-.LBB259:
-.LBB260:
-	.loc 2 956 0
-	ldrb	w0, [x20, 2370]
-	cbnz	w0, .L971
-	.loc 2 951 0
-	ldr	w22, [x20, 2520]
-	.loc 2 958 0
+	beq	.L980
+.LBB287:
+.LBB288:
+	.loc 2 1005 0
+	ldrb	w0, [x20, 2410]
+	cbnz	w0, .L979
+	.loc 2 1000 0
+	ldr	w22, [x20, 2560]
+	.loc 2 1007 0
 	add	x1, x29, 92
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	w24, [x20, 12]
-	.loc 2 958 0
+	.loc 2 1007 0
 	mov	w2, 0
-	.loc 2 951 0
+	.loc 2 1000 0
 	sub	w22, w22, #1
-.LVL1004:
-	.loc 2 958 0
+.LVL1013:
+	.loc 2 1007 0
 	mov	w0, w22
 	bl	log2phys
-.LVL1005:
-	.loc 2 964 0
-	ldr	x21, [x20, 3392]
-.LVL1006:
-	.loc 2 961 0
+.LVL1014:
+	.loc 2 1013 0
+	ldr	x21, [x20, 3384]
+.LVL1015:
+	.loc 2 1010 0
 	ldr	w0, [x29, 92]
-	.loc 2 963 0
-	ldr	x1, [x20, 2288]
-	.loc 2 961 0
+	.loc 2 1012 0
+	ldr	x1, [x20, 3376]
+	.loc 2 1010 0
 	str	w0, [x29, 100]
-	.loc 2 967 0
+	.loc 2 1016 0
 	cmn	w0, #1
-	.loc 2 964 0
+	.loc 2 1013 0
 	stp	x1, x21, [x29, 104]
-	.loc 2 962 0
+	.loc 2 1011 0
 	str	w22, [x29, 120]
-	.loc 2 966 0
+	.loc 2 1015 0
 	str	wzr, [x21, 4]
-	.loc 2 967 0
-	beq	.L974
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L982
+	.loc 2 1018 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1007:
-.L975:
-	.loc 2 978 0
+.LVL1016:
+.L983:
+	.loc 2 1027 0
 	add	x25, x19, :lo12:.LANCHOR0
-	.loc 2 953 0
+	.loc 2 1002 0
 	lsl	w24, w24, 2
-.LVL1008:
-	.loc 2 978 0
-	add	x20, x25, 2360
-	.loc 2 975 0
+.LVL1017:
+	.loc 2 1027 0
+	add	x20, x25, 2400
+	.loc 2 1024 0
 	mov	w0, -3947
 	mov	w23, 0
 	strh	w0, [x21]
-.L976:
-	.loc 2 976 0
+.L984:
+	.loc 2 1025 0
 	cmp	w24, w23
-	bne	.L980
-.L977:
-	.loc 2 992 0
+	bne	.L988
+.L985:
+	.loc 2 1041 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
-	strb	w0, [x19, 2370]
-.L971:
-.LBE260:
-.LBE259:
-	.loc 2 1000 0
+	strb	w0, [x19, 2410]
+.L979:
+.LBE288:
+.LBE287:
+	.loc 2 1049 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1009:
+.LVL1018:
 	ldp	x23, x24, [sp, 48]
-.LVL1010:
+.LVL1019:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
@@ -12023,69 +12128,69 @@ FtlWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1011:
-.L974:
+.LVL1020:
+.L982:
 	.cfi_restore_state
-.LBB262:
-.LBB261:
-	.loc 2 973 0
+.LBB290:
+.LBB289:
+	.loc 2 1022 0
 	ldrh	w2, [x20, 90]
 	mov	w1, 255
-	ldr	x0, [x20, 2288]
+	ldr	x0, [x20, 3376]
 	bl	ftl_memset
-.LVL1012:
-	b	.L975
-.LVL1013:
-.L980:
-	.loc 2 978 0
+.LVL1021:
+	b	.L983
+.LVL1022:
+.L988:
+	.loc 2 1027 0
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L977
-	.loc 2 983 0
+	cbz	w0, .L985
+	.loc 2 1032 0
 	ldr	w0, [x29, 100]
 	add	w23, w23, 1
 	stp	w22, w0, [x21, 8]
-	.loc 2 984 0
+	.loc 2 1033 0
 	ldrh	w0, [x20]
 	strh	w0, [x21, 2]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	x0, x20
 	bl	get_new_active_ppa
-.LVL1014:
+.LVL1023:
 	str	w0, [x29, 100]
-	.loc 2 987 0
-	ldr	w0, [x25, 2560]
-	.loc 2 988 0
+	.loc 2 1036 0
+	ldr	w0, [x25, 2600]
+	.loc 2 1037 0
 	mov	w3, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	w0, [x21, 4]
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 987 0
+	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x25, 2560]
-	.loc 2 988 0
+	str	w0, [x25, 2600]
+	.loc 2 1037 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1015:
-	.loc 2 990 0
+.LVL1024:
+	.loc 2 1039 0
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-.LVL1016:
-	b	.L976
-.LVL1017:
-.L972:
-.LBE261:
-.LBE262:
-	.loc 2 998 0
+.LVL1025:
+	b	.L984
+.LVL1026:
+.L980:
+.LBE289:
+.LBE290:
+	.loc 2 1047 0
 	add	x19, x19, :lo12:.LANCHOR0
-	strb	wzr, [x19, 2370]
-	.loc 2 1000 0
-	b	.L971
+	strb	wzr, [x19, 2410]
+	.loc 2 1049 0
+	b	.L979
 	.cfi_endproc
 .LFE207:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -12094,7 +12199,7 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 .LFB200:
-	.loc 2 740 0
+	.loc 2 789 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -12105,23 +12210,23 @@ l2p_flush:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 746 0
+	.loc 2 795 0
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w19, 0
-.LVL1018:
-	.loc 2 744 0
+.LVL1027:
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1019:
-.L990:
-	.loc 2 746 0 discriminator 1
+.LVL1028:
+.L998:
+	.loc 2 795 0 discriminator 1
 	ldrh	w0, [x20, 118]
 	cmp	w0, w19
-	bhi	.L992
-	.loc 2 750 0
+	bhi	.L1000
+	.loc 2 799 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1020:
+.LVL1029:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12130,26 +12235,26 @@ l2p_flush:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1021:
-.L992:
+.LVL1030:
+.L1000:
 	.cfi_restore_state
-	.loc 2 747 0
-	ldr	x1, [x20, 2504]
+	.loc 2 796 0
+	ldr	x1, [x20, 2544]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L991
-	.loc 2 748 0
+	tbz	w0, #31, .L999
+	.loc 2 797 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1022:
-.L991:
-	.loc 2 746 0 discriminator 2
+.LVL1031:
+.L999:
+	.loc 2 795 0 discriminator 2
 	add	w19, w19, 1
-.LVL1023:
+.LVL1032:
 	and	w19, w19, 65535
-.LVL1024:
-	b	.L990
+.LVL1033:
+	b	.L998
 	.cfi_endproc
 .LFE200:
 	.size	l2p_flush, .-l2p_flush
@@ -12158,16 +12263,16 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 .LFB220:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.cfi_startproc
-.LVL1025:
+.LVL1034:
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
 	.cfi_offset 30, -168
-	.loc 2 1670 0
+	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1656 0
+	.loc 2 1705 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -12186,49 +12291,49 @@ FtlRecoverySuperblock:
 	.cfi_offset 26, -104
 	.cfi_offset 27, -96
 	.cfi_offset 28, -88
-	.loc 2 1670 0
+	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1026:
+.LVL1035:
 	cmp	w0, w1
-	beq	.L1112
-	.loc 2 1676 0
+	beq	.L1120
+	.loc 2 1725 0
 	ldrb	w0, [x19, 6]
-.LVL1027:
-	.loc 2 1681 0
+.LVL1036:
+	.loc 2 1730 0
 	adrp	x20, .LANCHOR0
-	.loc 2 1676 0
+	.loc 2 1725 0
 	str	w0, [x29, 156]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL1028:
-	.loc 2 1675 0
+.LVL1037:
+	.loc 2 1724 0
 	ldrh	w27, [x19, 2]
-.LVL1029:
-	.loc 2 1681 0
+.LVL1038:
+	.loc 2 1730 0
 	ldrh	w0, [x0, 82]
 	cmp	w0, w27
-	bne	.L997
-	.loc 2 1682 0
+	bne	.L1005
+	.loc 2 1731 0
 	strh	wzr, [x19, 4]
-.LVL1030:
-.L1118:
-	.loc 2 1709 0
+.LVL1039:
+.L1126:
+	.loc 2 1758 0
 	strb	wzr, [x19, 6]
-.LVL1031:
-.L1112:
-	.loc 2 2010 0
+.LVL1040:
+.L1120:
+	.loc 2 2059 0
 	ldp	x19, x20, [sp, 16]
-.LVL1032:
+.LVL1041:
 	mov	w0, 0
-.LVL1033:
+.LVL1042:
 	ldp	x21, x22, [sp, 32]
-.LVL1034:
+.LVL1043:
 	ldp	x23, x24, [sp, 48]
-.LVL1035:
+.LVL1044:
 	ldp	x25, x26, [sp, 64]
-.LVL1036:
+.LVL1045:
 	ldp	x27, x28, [sp, 80]
-.LVL1037:
+.LVL1046:
 	ldp	x29, x30, [sp], 176
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12245,319 +12350,319 @@ FtlRecoverySuperblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1038:
-.L997:
+.LVL1047:
+.L1005:
 	.cfi_restore_state
-	.loc 2 1689 0
+	.loc 2 1738 0
 	ldrh	w0, [x19, 16]
-	.loc 2 1688 0
+	.loc 2 1737 0
 	mov	w21, 0
-.L998:
-	.loc 2 1690 0
+.L1006:
+	.loc 2 1739 0
 	cmp	w0, w1
-	beq	.L999
-	.loc 2 1697 0
+	beq	.L1007
+	.loc 2 1746 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1039:
+.LVL1048:
 	mov	w24, w0
-.LVL1040:
-	.loc 2 1705 0
+.LVL1049:
+	.loc 2 1754 0
 	cmn	w0, #1
-	beq	.L1000
-	.loc 2 1721 0
+	beq	.L1008
+	.loc 2 1770 0
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x19, 16
 	str	x1, [x29, 144]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	add	x5, x19, 16
 	mov	w21, 0
-	.loc 2 1719 0
+	.loc 2 1768 0
 	mov	w10, 65535
 	ldrh	w1, [x0, 12]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mov	w6, 4
 	ldrh	w8, [x0, 90]
 	add	x1, x1, 8
-	.loc 2 1722 0
+	.loc 2 1771 0
 	ldrh	w9, [x0, 92]
 	add	x1, x19, x1, lsl 1
-.L1001:
-	.loc 2 1717 0 discriminator 1
+.L1009:
+	.loc 2 1766 0 discriminator 1
 	cmp	x5, x1
-	bne	.L1005
-	.loc 2 1727 0
+	bne	.L1013
+	.loc 2 1776 0
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w1, w21
-	ldr	x0, [x23, 3968]
+	ldr	x0, [x23, 3960]
 	bl	FlashReadPages
-.LVL1041:
-	.loc 2 1728 0
-	ldr	w22, [x23, 2560]
-	.loc 2 1730 0
-	ldr	x4, [x23, 3968]
-	.loc 2 1742 0
+.LVL1050:
+	.loc 2 1777 0
+	ldr	w22, [x23, 2600]
+	.loc 2 1779 0
+	ldr	x4, [x23, 3960]
+	.loc 2 1791 0
 	and	w9, w24, 65535
-	.loc 2 1728 0
+	.loc 2 1777 0
 	sub	w22, w22, #1
-.LVL1042:
-	.loc 2 1666 0
+.LVL1051:
+	.loc 2 1715 0
 	mov	w7, 65535
 	mov	x6, x4
-	.loc 2 1729 0
+	.loc 2 1778 0
 	mov	w3, 0
-.LVL1043:
-.L1006:
-	.loc 2 1729 0 is_stmt 0 discriminator 1
+.LVL1052:
+.L1014:
+	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	w21, w3
-	bne	.L1011
-	.loc 2 1747 0 is_stmt 1
+	bne	.L1019
+	.loc 2 1796 0 is_stmt 1
 	add	w23, w24, 1
-	.loc 2 1749 0
+	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1747 0
+	.loc 2 1796 0
 	and	w23, w23, 65535
-.LVL1044:
-.L1114:
-	.loc 2 1753 0
+.LVL1053:
+.L1122:
+	.loc 2 1802 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1045:
+.LVL1054:
 	and	w28, w0, 65535
-.LVL1046:
-	.loc 2 1758 0
+.LVL1055:
+	.loc 2 1807 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 82]
 	cmp	w0, w23
-	bne	.L1013
-	.loc 2 1759 0
+	bne	.L1021
+	.loc 2 1808 0
 	strh	w23, [x19, 2]
-	.loc 2 1760 0
+	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	wzr, [x19, 4]
-.L1013:
-	.loc 2 1764 0
+.L1021:
+	.loc 2 1813 0
 	ldr	w0, [x29, 156]
 	cmp	w23, w27
-.LVL1047:
+.LVL1056:
 	ccmp	w28, w0, 0, eq
-	bne	.L1014
-.LVL1048:
-.L1119:
-	.loc 2 2004 0
+	bne	.L1022
+.LVL1057:
+.L1127:
+	.loc 2 2053 0
 	mov	w2, w28
 	mov	w1, w23
 	mov	x0, x19
-.LVL1049:
+.LVL1058:
 	bl	ftl_sb_update_avl_pages
-.LVL1050:
-	b	.L1112
-.LVL1051:
-.L999:
-	.loc 2 1691 0
+.LVL1059:
+	b	.L1120
+.LVL1060:
+.L1007:
+	.loc 2 1740 0
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 2 1692 0
+	.loc 2 1741 0
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L998
-.LVL1052:
-.L1000:
-	.loc 2 1706 0
-	cbz	w27, .L1002
-	.loc 2 1706 0 is_stmt 0 discriminator 1
+	b	.L1006
+.LVL1061:
+.L1008:
+	.loc 2 1755 0
+	cbz	w27, .L1010
+	.loc 2 1755 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL1053:
-	mov	w2, 1706
+.LVL1062:
+	mov	w2, 1755
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1054:
-.L1002:
-	.loc 2 1707 0 is_stmt 1
+.LVL1063:
+.L1010:
+	.loc 2 1756 0 is_stmt 1
 	ldr	w0, [x29, 156]
-.LVL1055:
+.LVL1064:
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L1003
-	.loc 2 1707 0 is_stmt 0 discriminator 1
+	beq	.L1011
+	.loc 2 1756 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL1056:
-	mov	w2, 1707
+.LVL1065:
+	mov	w2, 1756
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1057:
-.L1003:
-	.loc 2 1708 0 is_stmt 1
+.LVL1066:
+.L1011:
+	.loc 2 1757 0 is_stmt 1
 	strh	wzr, [x19, 2]
-	b	.L1118
-.LVL1058:
-.L1005:
-	.loc 2 1718 0
+	b	.L1126
+.LVL1067:
+.L1013:
+	.loc 2 1767 0
 	ldrh	w2, [x5]
-	.loc 2 1719 0
+	.loc 2 1768 0
 	cmp	w2, w10
-	beq	.L1004
-	.loc 2 1720 0
-	ldr	x4, [x0, 3968]
+	beq	.L1012
+	.loc 2 1769 0
+	ldr	x4, [x0, 3960]
 	ubfiz	x7, x21, 5, 16
 	orr	w2, w24, w2, lsl 10
 	add	x4, x4, x7
 	str	w2, [x4, 4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mul	w2, w21, w8
-	ldr	x3, [x0, 3968]
-	ldr	x4, [x0, 3256]
+	ldr	x3, [x0, 3960]
+	ldr	x4, [x0, 3240]
 	sdiv	w2, w2, w6
 	add	x3, x3, x7
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mul	w2, w21, w9
-	ldr	x4, [x0, 3264]
-	.loc 2 1723 0
+	ldr	x4, [x0, 3248]
+	.loc 2 1772 0
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 2 1722 0
+	.loc 2 1771 0
 	sdiv	w2, w2, w6
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 16]
-.L1004:
+.L1012:
 	add	x5, x5, 2
-	b	.L1001
-.LVL1059:
-.L1011:
-	.loc 2 1730 0
+	b	.L1009
+.LVL1068:
+.L1019:
+	.loc 2 1779 0
 	ldr	w0, [x6]
-	cbnz	w0, .L1007
-	.loc 2 1731 0
+	cbnz	w0, .L1015
+	.loc 2 1780 0
 	ldr	x8, [x6, 16]
-	.loc 2 1732 0
+	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1008
-	.loc 2 1733 0
-	ldr	w1, [x23, 2560]
+	beq	.L1016
+	.loc 2 1782 0
+	ldr	w1, [x23, 2600]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1060:
-	cbz	w0, .L1008
-	.loc 2 1735 0
+.LVL1069:
+	cbz	w0, .L1016
+	.loc 2 1784 0
 	add	w5, w5, 1
-	str	w5, [x23, 2560]
-.L1008:
-	.loc 2 1738 0
+	str	w5, [x23, 2600]
+.L1016:
+	.loc 2 1787 0
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1010
-	.loc 2 1753 0
+	bne	.L1018
+	.loc 2 1802 0
 	ubfiz	x3, x3, 5, 16
-.LVL1061:
-	.loc 2 1752 0
+.LVL1070:
+	.loc 2 1801 0
 	and	w23, w24, 65535
-.LVL1062:
-	.loc 2 1753 0
+.LVL1071:
+	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1114
-.LVL1063:
-.L1007:
-	.loc 2 1742 0
+	b	.L1122
+.LVL1072:
+.L1015:
+	.loc 2 1791 0
 	mov	w7, w9
-.L1010:
-	.loc 2 1729 0 discriminator 2
+.L1018:
+	.loc 2 1778 0 discriminator 2
 	add	w3, w3, 1
-.LVL1064:
+.LVL1073:
 	add	x6, x6, 32
 	and	w3, w3, 65535
-.LVL1065:
-	b	.L1006
-.LVL1066:
-.L1014:
-	.loc 2 1770 0
+.LVL1074:
+	b	.L1014
+.LVL1075:
+.L1022:
+	.loc 2 1819 0
 	mov	w0, 65535
-.LVL1067:
+.LVL1076:
 	adrp	x21, .LANCHOR3
 	cmp	w7, w0
-	bne	.L1015
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1023
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1016
-.L1015:
-.LBB263:
-	.loc 2 1775 0 is_stmt 1
+	cbnz	w0, .L1024
+.L1023:
+.LBB291:
+	.loc 2 1824 0 is_stmt 1
 	add	x0, x21, :lo12:.LANCHOR3
-	.loc 2 1774 0
+	.loc 2 1823 0
 	and	w3, w24, 65535
-	.loc 2 1775 0
-	ldr	w1, [x0, -84]
+	.loc 2 1824 0
+	ldr	w1, [x0, -92]
 	cmn	w1, #1
-	bne	.L1017
-	.loc 2 1776 0
-	str	w22, [x0, -84]
-.L1017:
-	.loc 2 1778 0
+	bne	.L1025
+	.loc 2 1825 0
+	str	w22, [x0, -92]
+.L1025:
+	.loc 2 1827 0
 	add	w0, w27, 7
 	cmp	w0, w24, uxth
-	bge	.L1065
-	.loc 2 1779 0
+	bge	.L1073
+	.loc 2 1828 0
 	sub	w25, w3, #7
 	and	w25, w25, 65535
-.L1018:
-	.loc 2 1782 0 discriminator 1
+.L1026:
+	.loc 2 1831 0 discriminator 1
 	add	x26, x20, :lo12:.LANCHOR0
-	.loc 2 1784 0 discriminator 1
+	.loc 2 1833 0 discriminator 1
 	mov	w4, 65535
-.L1019:
-	.loc 2 1780 0 discriminator 1
+.L1027:
+	.loc 2 1829 0 discriminator 1
 	cmp	w25, w3
-	bhi	.L1026
+	bhi	.L1034
 	ldrh	w0, [x26, 12]
-	.loc 2 1782 0
+	.loc 2 1831 0
 	mov	w24, 0
-.LVL1068:
+.LVL1077:
 	ldr	x1, [x29, 144]
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-	b	.L1027
-.LVL1069:
-.L1065:
+	b	.L1035
+.LVL1078:
+.L1073:
 	mov	w25, w27
-	b	.L1018
-.LVL1070:
-.L1021:
-	.loc 2 1783 0
+	b	.L1026
+.LVL1079:
+.L1029:
+	.loc 2 1832 0
 	ldrh	w2, [x1]
-	.loc 2 1784 0
+	.loc 2 1833 0
 	cmp	w2, w4
-	beq	.L1020
-	.loc 2 1785 0
-	ldr	x5, [x26, 3968]
+	beq	.L1028
+	.loc 2 1834 0
+	ldr	x5, [x26, 3960]
 	ubfiz	x6, x24, 5, 16
-	.loc 2 1786 0
+	.loc 2 1835 0
 	add	w24, w24, 1
-	.loc 2 1785 0
+	.loc 2 1834 0
 	orr	w2, w25, w2, lsl 10
 	add	x5, x5, x6
-	.loc 2 1786 0
+	.loc 2 1835 0
 	and	w24, w24, 65535
-	.loc 2 1785 0
+	.loc 2 1834 0
 	str	w2, [x5, 4]
-.L1020:
+.L1028:
 	add	x1, x1, 2
-.L1027:
-	.loc 2 1782 0 discriminator 1
+.L1035:
+	.loc 2 1831 0 discriminator 1
 	cmp	x0, x1
-	bne	.L1021
-	.loc 2 1789 0
-	ldr	x0, [x26, 3968]
+	bne	.L1029
+	.loc 2 1838 0
+	ldr	x0, [x26, 3960]
 	mov	w1, w24
 	mov	w2, 0
 	str	w4, [x29, 128]
@@ -12565,585 +12670,585 @@ FtlRecoverySuperblock:
 	ubfiz	x24, x24, 5, 16
 	add	x24, x24, 16
 	bl	FlashReadPages
-.LVL1071:
-	.loc 2 1791 0
-	ldr	x1, [x26, 3968]
-	.loc 2 1797 0
+.LVL1080:
+	.loc 2 1840 0
+	ldr	x1, [x26, 3960]
+	.loc 2 1846 0
 	add	x2, x21, :lo12:.LANCHOR3
-	.loc 2 1790 0
+	.loc 2 1839 0
 	ldr	w4, [x29, 128]
 	ldr	w3, [x29, 136]
 	add	x0, x1, 16
 	add	x24, x1, x24
-.L1022:
-	.loc 2 1790 0 is_stmt 0 discriminator 1
+.L1030:
+	.loc 2 1839 0 is_stmt 0 discriminator 1
 	cmp	x24, x0
-	bne	.L1025
-	.loc 2 1780 0 is_stmt 1
+	bne	.L1033
+	.loc 2 1829 0 is_stmt 1
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1019
-.L1025:
-	.loc 2 1791 0
+	b	.L1027
+.L1033:
+	.loc 2 1840 0
 	ldr	w1, [x0, -16]
-	cbnz	w1, .L1016
-	.loc 2 1792 0
+	cbnz	w1, .L1024
+	.loc 2 1841 0
 	ldr	x1, [x0]
-	.loc 2 1793 0
+	.loc 2 1842 0
 	ldrh	w5, [x1]
 	cmp	w5, w4
-	beq	.L1024
-	.loc 2 1795 0
+	beq	.L1032
+	.loc 2 1844 0
 	ldr	w1, [x1, 4]
 	cmn	w1, #1
-	beq	.L1024
-	.loc 2 1797 0
-	str	w1, [x2, -84]
-.L1024:
+	beq	.L1032
+	.loc 2 1846 0
+	str	w1, [x2, -92]
+.L1032:
 	add	x0, x0, 32
-	b	.L1022
-.LVL1072:
-.L1026:
-	.loc 2 1809 0
+	b	.L1030
+.LVL1081:
+.L1034:
+	.loc 2 1858 0
 	add	x0, x21, :lo12:.LANCHOR3
 	mov	w1, -1
-	str	w1, [x0, -84]
-.L1016:
-.LBE263:
-	.loc 2 1814 0
+	str	w1, [x0, -92]
+.L1024:
+.LBE291:
+	.loc 2 1863 0
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, 1
-	.loc 2 1815 0
+	.loc 2 1864 0
 	mov	w25, w27
-	.loc 2 1821 0
+	.loc 2 1870 0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 1814 0
-	strh	w0, [x21, -80]
-	.loc 2 1815 0
-	sub	x0, x21, #240
+	.loc 2 1863 0
+	strh	w0, [x21, -88]
+	.loc 2 1864 0
+	sub	x0, x21, #248
 	bl	FtlMapBlkWriteDump_data
-.LVL1073:
-	.loc 2 1970 0
-	sub	x0, x21, #72
+.LVL1082:
+	.loc 2 2019 0
+	sub	x0, x21, #80
 	str	x0, [x29, 112]
-.LVL1074:
-.L1028:
+.LVL1083:
+.L1036:
 	ldrh	w0, [x20, 12]
-	.loc 2 1820 0
+	.loc 2 1869 0
 	mov	w24, 0
-.LVL1075:
-	.loc 2 1821 0
+.LVL1084:
+	.loc 2 1870 0
 	ldr	x1, [x29, 144]
-.LVL1076:
-	.loc 2 1823 0
+.LVL1085:
+	.loc 2 1872 0
 	mov	w4, 65535
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-.L1029:
-	.loc 2 1821 0 discriminator 1
+.L1037:
+	.loc 2 1870 0 discriminator 1
 	cmp	x0, x1
-	bne	.L1031
-	.loc 2 1828 0
-	ldr	x0, [x20, 3968]
+	bne	.L1039
+	.loc 2 1877 0
+	ldr	x0, [x20, 3960]
 	mov	w1, w24
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1077:
+.LVL1086:
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 120]
-	.loc 2 1957 0
+	.loc 2 2006 0
 	adrp	x0, .LANCHOR1
 	add	x0, x0, :lo12:.LANCHOR1
 	add	x0, x0, 496
-	.loc 2 1829 0
+	.loc 2 1878 0
 	mov	x24, 0
-	.loc 2 1957 0
+	.loc 2 2006 0
 	str	x0, [x29, 128]
-.LVL1078:
-.L1032:
-	.loc 2 1829 0 discriminator 1
+.LVL1087:
+.L1040:
+	.loc 2 1878 0 discriminator 1
 	ldr	x0, [x29, 120]
-.LVL1079:
+.LVL1088:
 	cmp	x0, x24
-	bne	.L1059
-	.loc 2 1982 0
+	bne	.L1067
+	.loc 2 2031 0
 	add	w25, w25, 1
-	.loc 2 1983 0
+	.loc 2 2032 0
 	ldrh	w0, [x20, 82]
-	.loc 2 1982 0
+	.loc 2 2031 0
 	and	w25, w25, 65535
-	.loc 2 1983 0
+	.loc 2 2032 0
 	cmp	w0, w25
-	bne	.L1028
-	.loc 2 1986 0
+	bne	.L1036
+	.loc 2 2035 0
 	ldrh	w1, [x20, 12]
-.LVL1080:
+.LVL1089:
 	mov	w0, 0
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	w25, [x19, 2]
-	.loc 2 1988 0
+	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.L1060:
-	.loc 2 1986 0 discriminator 1
+.L1068:
+	.loc 2 2035 0 discriminator 1
 	cmp	w0, w1
-	beq	.L1112
-	.loc 2 1988 0
+	beq	.L1120
+	.loc 2 2037 0
 	ldr	x4, [x29, 144]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 144]
 	cmp	w3, w2
-	beq	.L1061
-	.loc 2 1989 0
+	beq	.L1069
+	.loc 2 2038 0
 	strb	w0, [x19, 6]
-	.loc 2 1990 0
-	b	.L1112
-.L1031:
-	.loc 2 1822 0
+	.loc 2 2039 0
+	b	.L1120
+.L1039:
+	.loc 2 1871 0
 	ldrh	w2, [x1]
-	.loc 2 1823 0
+	.loc 2 1872 0
 	cmp	w2, w4
-	beq	.L1030
-	.loc 2 1824 0
-	ldr	x3, [x20, 3968]
+	beq	.L1038
+	.loc 2 1873 0
+	ldr	x3, [x20, 3960]
 	ubfiz	x5, x24, 5, 16
-	.loc 2 1825 0
+	.loc 2 1874 0
 	add	w24, w24, 1
-	.loc 2 1824 0
+	.loc 2 1873 0
 	orr	w2, w25, w2, lsl 10
 	add	x3, x3, x5
-	.loc 2 1825 0
+	.loc 2 1874 0
 	and	w24, w24, 65535
-	.loc 2 1824 0
+	.loc 2 1873 0
 	str	w2, [x3, 4]
-.L1030:
+.L1038:
 	add	x1, x1, 2
-	b	.L1029
-.LVL1081:
-.L1059:
-	.loc 2 1830 0
-	ldr	x4, [x20, 3968]
+	b	.L1037
+.LVL1090:
+.L1067:
+	.loc 2 1879 0
+	ldr	x4, [x20, 3960]
 	add	x4, x4, x24
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 172]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1082:
+.LVL1091:
 	and	w0, w0, 65535
-.LVL1083:
-	.loc 2 1833 0
+.LVL1092:
+	.loc 2 1882 0
 	cmp	w25, w27
-	bcc	.L1033
-	.loc 2 1833 0 is_stmt 0 discriminator 1
+	bcc	.L1041
+	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 156]
-.LVL1084:
+.LVL1093:
 	ccmp	w1, w0, 0, eq
-	bhi	.L1033
-	.loc 2 1837 0 is_stmt 1
+	bhi	.L1041
+	.loc 2 1886 0 is_stmt 1
 	cmp	w25, w23
 	ccmp	w28, w0, 0, eq
-	beq	.L1034
-	.loc 2 1841 0
+	beq	.L1042
+	.loc 2 1890 0
 	ldr	w0, [x4]
-.LVL1085:
+.LVL1094:
 	cmn	w0, #1
-	beq	.L1035
-	.loc 2 1842 0
+	beq	.L1043
+	.loc 2 1891 0
 	ldr	x3, [x4, 16]
-	.loc 2 1843 0
+	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
-.LVL1086:
+.LVL1095:
 	cmp	w1, w0
-	beq	.L1036
-.L1043:
-.LBB264:
-	.loc 2 1876 0
+	beq	.L1044
+.L1051:
+.LBB292:
+	.loc 2 1925 0
 	ldrh	w0, [x19]
-.L1117:
-.LBE264:
-	.loc 2 1960 0
+.L1125:
+.LBE292:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1087:
-.L1033:
+.LVL1096:
+.L1041:
 	add	x24, x24, 32
-	b	.L1032
-.LVL1088:
-.L1036:
-	.loc 2 1849 0
+	b	.L1040
+.LVL1097:
+.L1044:
+	.loc 2 1898 0
 	ldr	w22, [x3, 4]
-.LVL1089:
-	.loc 2 1850 0
+.LVL1098:
+	.loc 2 1899 0
 	cmn	w22, #1
-	beq	.L1037
-	.loc 2 1851 0 discriminator 1
-	ldr	w1, [x20, 2560]
+	beq	.L1045
+	.loc 2 1900 0 discriminator 1
+	ldr	w1, [x20, 2600]
 	mov	w0, w22
 	str	x3, [x29, 136]
 	bl	ftl_cmp_data_ver
-.LVL1090:
-	.loc 2 1850 0 discriminator 1
+.LVL1099:
+	.loc 2 1899 0 discriminator 1
 	ldr	x3, [x29, 136]
-	cbz	w0, .L1037
-	.loc 2 1853 0
+	cbz	w0, .L1045
+	.loc 2 1902 0
 	add	w0, w22, 1
-	str	w0, [x20, 2560]
-.L1037:
-	.loc 2 1856 0
+	str	w0, [x20, 2600]
+.L1045:
+	.loc 2 1905 0
 	ldrh	w1, [x3]
 	mov	w0, 61589
 	cmp	w1, w0
-	beq	.L1038
-	.loc 2 1856 0 is_stmt 0 discriminator 1
+	beq	.L1046
+	.loc 2 1905 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 128]
-	mov	w2, 1856
+	mov	w2, 1905
 	str	x3, [x29, 136]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1091:
+.LVL1100:
 	ldr	x3, [x29, 136]
-.L1038:
-	.loc 2 1858 0 is_stmt 1
+.L1046:
+	.loc 2 1907 0 is_stmt 1
 	ldp	w26, w0, [x3, 8]
-.LVL1092:
-	.loc 2 1859 0
+.LVL1101:
+	.loc 2 1908 0
 	add	x1, x29, 168
-	.loc 2 1858 0
+	.loc 2 1907 0
 	str	w0, [x29, 164]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	mov	w2, 0
-.LVL1093:
+.LVL1102:
 	mov	w0, w26
 	bl	log2phys
-.LVL1094:
-	.loc 2 1860 0
-	ldr	w1, [x21, -84]
+.LVL1103:
+	.loc 2 1909 0
+	ldr	w1, [x21, -92]
 	cmn	w1, #1
-	beq	.L1039
-	.loc 2 1861 0 discriminator 1
+	beq	.L1047
+	.loc 2 1910 0 discriminator 1
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-.LVL1095:
-	.loc 2 1860 0 discriminator 1
-	cbz	w0, .L1039
-.LBB265:
-	.loc 2 1865 0
+.LVL1104:
+	.loc 2 1909 0 discriminator 1
+	cbz	w0, .L1047
+.LBB293:
+	.loc 2 1914 0
 	ldr	w1, [x29, 164]
 	cmn	w1, #1
-	beq	.L1040
-	.loc 2 1866 0
-	ldr	x0, [x20, 3968]
-	.loc 2 1868 0
+	beq	.L1048
+	.loc 2 1915 0
+	ldr	x0, [x20, 3960]
+	.loc 2 1917 0
 	mov	w2, 0
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	x0, x0, x24
 	ldr	x4, [x0, 16]
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	str	x4, [x29, 136]
-	.loc 2 1868 0
-	ldr	x0, [x20, 3968]
+	.loc 2 1917 0
+	ldr	x0, [x20, 3960]
 	add	x0, x0, x24
 	bl	FlashReadPages
-.LVL1096:
-	.loc 2 1881 0
-	ldr	x0, [x20, 3968]
+.LVL1105:
+	.loc 2 1930 0
+	ldr	x0, [x20, 3960]
 	ldr	x4, [x29, 136]
 	add	x3, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L1041
-.LVL1097:
-.L1042:
-	.loc 2 1913 0
+	bne	.L1049
+.LVL1106:
+.L1050:
+	.loc 2 1962 0
 	mov	w0, -1
 	str	w0, [x29, 164]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1098:
-.L1050:
-.LBE265:
-	.loc 2 1954 0
+.LVL1107:
+.L1058:
+.LBE293:
+	.loc 2 2003 0
 	ldr	w4, [x29, 164]
 	cmn	w4, #1
-	beq	.L1033
-.L1064:
-	.loc 2 1956 0
+	beq	.L1041
+.L1072:
+	.loc 2 2005 0
 	lsr	w0, w4, 10
-.LVL1099:
+.LVL1108:
 	bl	P2V_block_in_plane
-.LVL1100:
+.LVL1109:
 	and	w26, w0, 65535
-.LVL1101:
-	.loc 2 1957 0
+.LVL1110:
+	.loc 2 2006 0
 	ldrh	w0, [x20, 20]
-	.loc 2 1956 0
+	.loc 2 2005 0
 	mov	w3, w26
-.LVL1102:
-	.loc 2 1957 0
+.LVL1111:
+	.loc 2 2006 0
 	cmp	w0, w26
-	bhi	.L1055
-	.loc 2 1957 0 is_stmt 0 discriminator 1
+	bhi	.L1063
+	.loc 2 2006 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 128]
-	mov	w2, 1957
+	mov	w2, 2006
 	adrp	x0, .LC1
 	str	w26, [x29, 136]
-.LVL1103:
+.LVL1112:
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1104:
+.LVL1113:
 	ldr	w3, [x29, 136]
-.LVL1105:
-.L1055:
-	.loc 2 1958 0 is_stmt 1
-	ldr	x1, [x20, 2320]
+.LVL1114:
+.L1063:
+	.loc 2 2007 0 is_stmt 1
+	ldr	x1, [x20, 2352]
 	ubfiz	x0, x26, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1056
-	.loc 2 1960 0
+	cbz	w0, .L1064
+	.loc 2 2009 0
 	mov	w0, w3
-	b	.L1117
-.LVL1106:
-.L1040:
-.LBB266:
-	.loc 2 1872 0
+	b	.L1125
+.LVL1115:
+.L1048:
+.LBB294:
+	.loc 2 1921 0
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	bne	.L1043
-	.loc 2 1873 0
+	bne	.L1051
+	.loc 2 1922 0
 	mov	w2, 1
 	add	x1, x29, 164
 	mov	w0, w26
 	bl	log2phys
-.LVL1107:
-	b	.L1043
-.L1041:
-	.loc 2 1881 0 discriminator 1
+.LVL1116:
+	b	.L1051
+.L1049:
+	.loc 2 1930 0 discriminator 1
 	ldr	w0, [x4, 8]
 	cmp	w26, w0
-	bne	.L1042
-	.loc 2 1869 0 discriminator 2
+	bne	.L1050
+	.loc 2 1918 0 discriminator 2
 	ldr	w0, [x4, 4]
-.LVL1108:
+.LVL1117:
 	str	w0, [x29, 136]
 	str	x4, [x29, 104]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
-.LVL1109:
-	ldr	w0, [x21, -84]
+.LVL1118:
+	ldr	w0, [x21, -92]
 	bl	ftl_cmp_data_ver
-.LVL1110:
-	.loc 2 1881 0 discriminator 2
-	cbz	w0, .L1042
-	.loc 2 1883 0
+.LVL1119:
+	.loc 2 1930 0 discriminator 2
+	cbz	w0, .L1050
+	.loc 2 1932 0
 	ldp	w0, w1, [x29, 168]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
-	.loc 2 1885 0
+	.loc 2 1934 0
 	ldr	w1, [x29, 164]
-	.loc 2 1883 0
-	bne	.L1045
-.LVL1111:
-.L1115:
-	.loc 2 1909 0
+	.loc 2 1932 0
+	bne	.L1053
+.LVL1120:
+.L1123:
+	.loc 2 1958 0
 	mov	w0, w26
 	bl	FtlReUsePrevPpa
-.LVL1112:
-	b	.L1042
-.L1045:
-	.loc 2 1886 0
+.LVL1121:
+	b	.L1050
+.L1053:
+	.loc 2 1935 0
 	cmp	w0, w1
-	beq	.L1042
-	.loc 2 1887 0
+	beq	.L1050
+	.loc 2 1936 0
 	cmn	w0, #1
-	beq	.L1046
-	.loc 2 1888 0
+	beq	.L1054
+	.loc 2 1937 0
 	ldr	x4, [x3, 16]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1889 0
+	.loc 2 1938 0
 	str	w0, [x3, 4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1888 0
+	.loc 2 1937 0
 	str	x4, [x29, 104]
-	.loc 2 1890 0
-	ldr	x0, [x20, 3968]
+	.loc 2 1939 0
+	ldr	x0, [x20, 3960]
 	add	x0, x0, x24
 	bl	FlashReadPages
-.LVL1113:
+.LVL1122:
 	ldr	x4, [x29, 104]
-.L1047:
-	.loc 2 1895 0
-	adrp	x0, .LANCHOR0+3968
-	ldr	x0, [x0, #:lo12:.LANCHOR0+3968]
+.L1055:
+	.loc 2 1944 0
+	adrp	x0, .LANCHOR0+3960
+	ldr	x0, [x0, #:lo12:.LANCHOR0+3960]
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	beq	.L1048
-	.loc 2 1896 0
+	beq	.L1056
+	.loc 2 1945 0
 	ldr	w3, [x4, 4]
-	.loc 2 1897 0
-	ldr	w0, [x21, -84]
-.LVL1114:
+	.loc 2 1946 0
+	ldr	w0, [x21, -92]
+.LVL1123:
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1115:
-	cbz	w0, .L1048
-	.loc 2 1898 0
+.LVL1124:
+	cbz	w0, .L1056
+	.loc 2 1947 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1116:
-	cbz	w0, .L1042
-.L1048:
-	.loc 2 1909 0
-	ldr	w1, [x29, 164]
-	b	.L1115
-.LVL1117:
-.L1046:
-	.loc 2 1892 0
+.LVL1125:
+	cbz	w0, .L1050
+.L1056:
+	.loc 2 1958 0
+	ldr	w1, [x29, 164]
+	b	.L1123
+.LVL1126:
+.L1054:
+	.loc 2 1941 0
 	str	w0, [x3]
-	b	.L1047
-.LVL1118:
-.L1039:
-.LBE266:
-	.loc 2 1915 0
+	b	.L1055
+.LVL1127:
+.L1047:
+.LBE294:
+	.loc 2 1964 0
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	beq	.L1050
-	.loc 2 1917 0
+	beq	.L1058
+	.loc 2 1966 0
 	mov	w2, 1
 	add	x1, x29, 172
 	mov	w0, w26
 	bl	log2phys
-.LVL1119:
-	.loc 2 1918 0
+.LVL1128:
+	.loc 2 1967 0
 	ldr	w4, [x29, 168]
 	cmn	w4, #1
-	beq	.L1050
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1058
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 164]
 	cmp	w4, w0
-	beq	.L1064
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1072
+	.loc 2 1968 0 is_stmt 1
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
-.LVL1120:
-	.loc 2 1921 0
-	ldrh	w1, [x20, 2360]
-	.loc 2 1919 0
+.LVL1129:
+	.loc 2 1970 0
+	ldrh	w1, [x20, 2400]
+	.loc 2 1968 0
 	and	w0, w0, 65535
-.LVL1121:
-	.loc 2 1921 0
+.LVL1130:
+	.loc 2 1970 0
 	cmp	w1, w0
-	beq	.L1054
-	.loc 2 1921 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x20, 2408]
+	beq	.L1062
+	.loc 2 1970 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x20, 2448]
 	cmp	w1, w0
-	beq	.L1054
-	.loc 2 1922 0 is_stmt 1
-	ldrh	w1, [x20, 2456]
+	beq	.L1062
+	.loc 2 1971 0 is_stmt 1
+	ldrh	w1, [x20, 2496]
 	cmp	w1, w0
-	bne	.L1050
-.L1054:
-.LBB267:
-	.loc 2 1927 0
-	ldr	x0, [x20, 3968]
-.LVL1122:
-	.loc 2 1930 0
+	bne	.L1058
+.L1062:
+.LBB295:
+	.loc 2 1976 0
+	ldr	x0, [x20, 3960]
+.LVL1131:
+	.loc 2 1979 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	w4, [x0, 4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	x3, [x0, 16]
-	.loc 2 1930 0
-	ldr	x0, [x20, 3968]
-	.loc 2 1927 0
+	.loc 2 1979 0
+	ldr	x0, [x20, 3960]
+	.loc 2 1976 0
 	str	x3, [x29, 136]
-	.loc 2 1930 0
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1123:
-	.loc 2 1933 0
-	ldr	x0, [x20, 3968]
+.LVL1132:
+	.loc 2 1982 0
+	ldr	x0, [x20, 3960]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1050
-	.loc 2 1934 0
+	beq	.L1058
+	.loc 2 1983 0
 	ldr	x3, [x29, 136]
 	mov	w0, w22
 	ldr	w1, [x3, 4]
 	bl	ftl_cmp_data_ver
-.LVL1124:
-	cbnz	w0, .L1050
-	.loc 2 1941 0
+.LVL1133:
+	cbnz	w0, .L1058
+	.loc 2 1990 0
 	mov	w2, 1
 	add	x1, x29, 168
 	mov	w0, w26
 	bl	log2phys
-.LVL1125:
-	b	.L1050
-.LVL1126:
-.L1056:
-.LBE267:
-	.loc 2 1962 0
+.LVL1134:
+	b	.L1058
+.LVL1135:
+.L1064:
+.LBE295:
+	.loc 2 2011 0
 	mov	w1, w26
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
 	bl	printk
-.LVL1127:
-	b	.L1033
-.LVL1128:
-.L1035:
-	.loc 2 1969 0
-	ldr	w0, [x21, -76]
+.LVL1136:
+	b	.L1041
+.LVL1137:
+.L1043:
+	.loc 2 2018 0
+	ldr	w0, [x21, -84]
 	cmp	w0, 31
-	bhi	.L1057
-	.loc 2 1970 0
+	bhi	.L1065
+	.loc 2 2019 0
 	ldr	x1, [x29, 112]
-.LVL1129:
+.LVL1138:
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 1971 0
+	.loc 2 2020 0
 	add	w0, w0, 1
-	str	w0, [x21, -76]
-.LVL1130:
-.L1057:
-	.loc 2 1973 0
+	str	w0, [x21, -84]
+.LVL1139:
+.L1065:
+	.loc 2 2022 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1131:
-	.loc 2 1975 0
-	ldr	w0, [x21, -84]
+.LVL1140:
+	.loc 2 2024 0
+	ldr	w0, [x21, -92]
 	cmn	w0, #1
-	bne	.L1058
-.L1116:
-	.loc 2 1978 0
-	str	w22, [x21, -84]
-	b	.L1033
-.L1058:
-	.loc 2 1977 0
+	bne	.L1066
+.L1124:
+	.loc 2 2027 0
+	str	w22, [x21, -92]
+	b	.L1041
+.L1066:
+	.loc 2 2026 0
 	cmp	w22, w0
-	bcs	.L1033
-	b	.L1116
-.L1061:
-	.loc 2 1986 0 discriminator 2
+	bcs	.L1041
+	b	.L1124
+.L1069:
+	.loc 2 2035 0 discriminator 2
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1060
-.LVL1132:
-.L1034:
-	.loc 2 2002 0
+	b	.L1068
+.LVL1141:
+.L1042:
+	.loc 2 2051 0
 	strb	w28, [x19, 6]
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	w23, [x19, 2]
-	b	.L1119
+	b	.L1127
 	.cfi_endproc
 .LFE220:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -13152,59 +13257,95 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 .LFB227:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	.cfi_startproc
-.LVL1133:
+.LVL1142:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
+	.loc 2 2212 0
+	adrp	x2, .LANCHOR0
+	.loc 2 2220 0
+	mov	w3, 61589
+	.loc 2 2205 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
-	adrp	x20, .LANCHOR0
-	stp	x21, x22, [sp, 32]
 	mov	x19, x0
+	.loc 2 2211 0
+	mov	w0, -1
+.LVL1143:
+	.loc 2 2205 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 2211 0
+	str	w0, [x29, 88]
+	.loc 2 2212 0
+	add	x0, x2, :lo12:.LANCHOR0
+	.loc 2 2205 0
+	str	x23, [sp, 48]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 2169 0
-	add	x21, x20, :lo12:.LANCHOR0
-	.loc 2 2156 0
-	str	x23, [sp, 48]
 	.cfi_offset 23, -48
-	.loc 2 2168 0
-	mov	w22, -1
-	.loc 2 2162 0
-	mov	w23, 7
-.L1121:
-	subs	w23, w23, #1
-	beq	.L1123
-	.loc 2 2163 0
+	.loc 2 2229 0
+	mov	x20, x0
+	mov	x23, x2
+	.loc 2 2223 0
+	mov	w22, 7
+	.loc 2 2213 0
+	ldr	x21, [x0, 3384]
+	.loc 2 2212 0
+	ldr	x1, [x0, 3376]
+	.loc 2 2213 0
+	stp	x1, x21, [x29, 72]
+	.loc 2 2216 0
+	mov	w1, -3
+	str	w1, [x21, 8]
+	.loc 2 2217 0
+	mov	w1, -2
+	str	w1, [x21, 12]
+	.loc 2 2218 0
+	ldrh	w1, [x19]
+	strh	w1, [x21, 2]
+	.loc 2 2219 0
+	strh	wzr, [x21]
+	.loc 2 2220 0
+	ldr	x1, [x0, 3376]
+	str	w3, [x1]
+	.loc 2 2221 0
+	mov	w3, 22136
+	movk	w3, 0x1234, lsl 16
+	ldr	x1, [x0, 3376]
+	str	w3, [x1, 4]
+.L1129:
+	.loc 2 2223 0
+	subs	w22, w22, #1
+	beq	.L1131
+	.loc 2 2224 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1122
-.LVL1134:
-.L1123:
-	.loc 2 2183 0
-	add	x20, x20, :lo12:.LANCHOR0
+	cbnz	w0, .L1130
+.L1131:
+	.loc 2 2234 0
+	add	x2, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x19]
-	ldrh	w3, [x19, 4]
-	ldr	x2, [x20, 2320]
+	ldrh	w4, [x19, 4]
+	ldr	x3, [x2, 2352]
 	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
-	.loc 2 2185 0
+	ldrh	w1, [x3, x0]
+	sub	w1, w1, w4
+	strh	w1, [x3, x0]
+	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2184 0
-	ldrh	w0, [x20, 82]
+	.loc 2 2235 0
+	ldrh	w0, [x2, 82]
 	strh	w0, [x19, 2]
-	.loc 2 2186 0
+	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2188 0
+	.loc 2 2238 0
 	ldp	x19, x20, [sp, 16]
-.LVL1135:
+.LVL1144:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
@@ -13218,55 +13359,42 @@ FtlSuperblockPowerLostFix:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1136:
-.L1122:
+.LVL1145:
+.L1130:
 	.cfi_restore_state
-	.loc 2 2165 0
+	.loc 2 2226 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1137:
+.LVL1146:
 	str	w0, [x29, 68]
-	.loc 2 2166 0
+	.loc 2 2227 0
 	cmn	w0, #1
-	beq	.L1123
-	.loc 2 2170 0
-	ldr	x1, [x21, 3392]
-	.loc 2 2179 0
+	beq	.L1131
+	.loc 2 2229 0
+	ldr	w0, [x20, 2600]
+	.loc 2 2230 0
 	mov	w3, 0
-	.loc 2 2169 0
-	ldr	x0, [x21, 2288]
-	.loc 2 2179 0
+	.loc 2 2229 0
+	str	w0, [x21, 4]
+	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2170 0
-	stp	x0, x1, [x29, 72]
-	.loc 2 2168 0
-	str	w22, [x29, 88]
-	.loc 2 2174 0
-	stp	w22, w22, [x1, 8]
-	.loc 2 2175 0
-	ldrh	w0, [x19]
-	strh	w0, [x1, 2]
-	.loc 2 2176 0
-	strh	wzr, [x1]
-	.loc 2 2178 0
-	ldr	w0, [x21, 2560]
-	str	w0, [x1, 4]
-	.loc 2 2179 0
-	mov	w1, 1
-	.loc 2 2178 0
+	.loc 2 2229 0
 	add	w0, w0, 1
+	.loc 2 2230 0
+	mov	w1, 1
+	.loc 2 2229 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x21, 2560]
-	.loc 2 2179 0
+	str	w0, [x20, 2600]
+	.loc 2 2230 0
 	add	x0, x29, 64
 	bl	FlashProgPages
-.LVL1138:
-	.loc 2 2180 0
+.LVL1147:
+	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1139:
-	b	.L1121
+.LVL1148:
+	b	.L1129
 	.cfi_endproc
 .LFE227:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -13299,28 +13427,28 @@ FtlLoadBbt:
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.loc 4 180 0
-	add	x21, x23, 3360
+	add	x21, x23, 3344
 	.loc 4 196 0
 	mov	w24, 61649
 	.loc 4 180 0
-	ldr	x0, [x23, 2288]
+	ldr	x0, [x23, 3376]
 	.loc 4 181 0
-	ldr	x22, [x23, 3392]
+	ldr	x22, [x23, 3384]
 	stp	x0, x22, [x21, 8]
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1140:
+.LVL1149:
 	.loc 4 184 0
 	ldrh	w20, [x23, 78]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-.LVL1141:
-.L1133:
+.LVL1150:
+.L1141:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, 78]
 	sub	w0, w0, #16
 	cmp	w20, w0
-	ble	.L1136
+	ble	.L1144
 	.loc 4 185 0 is_stmt 1
 	lsl	w0, w20, 10
 	.loc 4 186 0
@@ -13331,11 +13459,11 @@ FtlLoadBbt:
 	mov	w1, w2
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1142:
+.LVL1151:
 	.loc 4 187 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1134
+	bne	.L1142
 	.loc 4 188 0
 	ldr	w0, [x21, 4]
 	.loc 4 189 0
@@ -13347,16 +13475,16 @@ FtlLoadBbt:
 	.loc 4 189 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1143:
-.L1134:
+.LVL1152:
+.L1142:
 	.loc 4 191 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1135
+	beq	.L1143
 	.loc 4 196 0
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1135
+	bne	.L1143
 	.loc 4 199 0
 	ldr	w1, [x22, 4]
 	str	w1, [x23, 144]
@@ -13365,19 +13493,19 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	w1, [x22, 8]
 	strh	w1, [x23, 140]
-.L1136:
+.L1144:
 	.loc 4 216 0
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x21, 136]
 	cmp	w1, w0
-	beq	.L1150
+	beq	.L1158
 	.loc 4 222 0
 	ldrh	w1, [x21, 140]
 	cmp	w1, w0
-	beq	.L1140
+	beq	.L1148
 	.loc 4 224 0
-	add	x0, x21, 3360
+	add	x0, x21, 3344
 	lsl	w1, w1, 10
 	.loc 4 225 0
 	mov	w2, 1
@@ -13386,21 +13514,21 @@ FtlLoadBbt:
 	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1144:
+.LVL1153:
 	.loc 4 226 0
-	ldr	w0, [x21, 3360]
+	ldr	w0, [x21, 3344]
 	cmn	w0, #1
-	beq	.L1140
+	beq	.L1148
 	.loc 4 229 0
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1140
+	bne	.L1148
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x21, 144]
 	ldr	w0, [x22, 4]
 	cmp	w0, w1
-	bls	.L1140
+	bls	.L1148
 	.loc 4 232 0 is_stmt 1
 	str	w0, [x21, 144]
 	.loc 4 231 0
@@ -13411,27 +13539,27 @@ FtlLoadBbt:
 	strh	w1, [x21, 136]
 	.loc 4 233 0
 	strh	w0, [x21, 140]
-.L1140:
+.L1148:
 	.loc 4 238 0
 	add	x20, x19, :lo12:.LANCHOR0
-.LVL1145:
+.LVL1154:
 	mov	w1, 1
 	.loc 4 243 0
-	add	x23, x20, 3360
+	add	x23, x20, 3344
 	.loc 4 247 0
 	mov	w24, 61649
 	.loc 4 238 0
 	ldrh	w0, [x20, 136]
 	bl	FtlGetLastWrittenPage
-.LVL1146:
+.LVL1155:
 	sxth	w21, w0
-.LVL1147:
+.LVL1156:
 	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x20, 138]
-.L1142:
+.L1150:
 	.loc 4 241 0
-	tbz	w21, #31, .L1145
+	tbz	w21, #31, .L1153
 	.loc 4 254 0
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
@@ -13440,8 +13568,8 @@ FtlLoadBbt:
 	add	x1, x1, 520
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1148:
-.L1144:
+.LVL1157:
+.L1152:
 	.loc 4 255 0
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 10]
@@ -13452,44 +13580,44 @@ FtlLoadBbt:
 	.loc 4 257 0
 	ldrh	w0, [x22, 12]
 	cmp	w0, w2
-	beq	.L1147
+	beq	.L1155
 	.loc 4 259 0
 	ldr	w2, [x1, 8]
 	cmp	w0, w2
-	beq	.L1147
+	beq	.L1155
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1, 22]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1147
+	bcs	.L1155
 	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
-	bcs	.L1147
+	bcs	.L1155
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1149:
-.L1147:
+.LVL1158:
+.L1155:
 	add	x19, x19, :lo12:.LANCHOR0
 	.loc 4 269 0 discriminator 1
 	adrp	x21, .LANCHOR3
-.LVL1150:
+.LVL1159:
 	add	x22, x19, 168
 	add	x21, x21, :lo12:.LANCHOR3
 	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1151:
-.L1148:
+.LVL1160:
+.L1156:
 	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x19, 34]
 	cmp	w20, w0
-	bcc	.L1149
+	bcc	.L1157
 	.loc 4 275 0
 	mov	w0, 0
-.LVL1152:
-.L1132:
+.LVL1161:
+.L1140:
 	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
-.LVL1153:
+.LVL1162:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
@@ -13504,17 +13632,17 @@ FtlLoadBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1154:
-.L1135:
+.LVL1163:
+.L1143:
 	.cfi_restore_state
 	.loc 4 184 0 discriminator 2
 	sub	w20, w20, #1
-.LVL1155:
+.LVL1164:
 	and	w20, w20, 65535
-.LVL1156:
-	b	.L1133
-.LVL1157:
-.L1145:
+.LVL1165:
+	b	.L1141
+.LVL1166:
+.L1153:
 	.loc 4 243 0
 	ldrh	w0, [x20, 136]
 	.loc 4 245 0
@@ -13524,31 +13652,31 @@ FtlLoadBbt:
 	orr	w0, w21, w0, lsl 10
 	str	w0, [x23, 4]
 	.loc 4 244 0
-	ldr	x0, [x20, 2288]
+	ldr	x0, [x20, 3376]
 	str	x0, [x23, 8]
 	.loc 4 245 0
 	mov	x0, x23
 	bl	FlashReadPages
-.LVL1158:
+.LVL1167:
 	.loc 4 247 0
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1143
+	beq	.L1151
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	beq	.L1144
-.L1143:
+	beq	.L1152
+.L1151:
 	sub	w21, w21, #1
-.LVL1159:
+.LVL1168:
 	sxth	w21, w21
-.LVL1160:
-	b	.L1142
-.LVL1161:
-.L1149:
+.LVL1169:
+	b	.L1150
+.LVL1170:
+.L1157:
 	.loc 4 269 0 is_stmt 1 discriminator 3
-	ldrh	w2, [x21, -248]
-	ldr	x0, [x19, 3368]
+	ldrh	w2, [x21, -256]
+	ldr	x0, [x19, 3352]
 	mul	w1, w2, w20
 	lsl	w2, w2, 2
 	.loc 4 268 0 discriminator 3
@@ -13557,13 +13685,13 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x22], 8
 	bl	ftl_memcpy
-.LVL1162:
-	b	.L1148
-.LVL1163:
-.L1150:
+.LVL1171:
+	b	.L1156
+.LVL1172:
+.L1158:
 	.loc 4 218 0
 	mov	w0, -1
-	b	.L1132
+	b	.L1140
 	.cfi_endproc
 .LFE168:
 	.size	FtlLoadBbt, .-FtlLoadBbt
@@ -13596,17 +13724,17 @@ FtlMakeBbt:
 	.cfi_offset 24, -40
 	.loc 4 327 0
 	mov	w24, 0
-.LVL1164:
+.LVL1173:
 	.loc 4 317 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1165:
+.LVL1174:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1166:
+.LVL1175:
 	.loc 4 357 0
 	adrp	x28, .LANCHOR3
 	add	x0, x19, :lo12:.LANCHOR0
@@ -13616,20 +13744,20 @@ FtlMakeBbt:
 	.loc 4 327 0
 	mov	x19, x0
 	.loc 4 328 0
-	add	x20, x0, 3360
-.LVL1167:
-.L1163:
+	add	x20, x0, 3344
+.LVL1176:
+.L1171:
 	.loc 4 327 0 discriminator 1
 	ldrh	w0, [x19, 34]
 	cmp	w24, w0
-	bcc	.L1169
+	bcc	.L1177
 	.loc 4 381 0 discriminator 1
 	add	x20, x21, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1170:
+.L1178:
 	ldrh	w0, [x20, 94]
 	cmp	w0, w19
-	bhi	.L1171
+	bhi	.L1179
 	.loc 4 387 0
 	add	x20, x20, 136
 	ldrh	w19, [x20, 12]
@@ -13638,54 +13766,54 @@ FtlMakeBbt:
 	.loc 4 387 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1172:
+.L1180:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x20, 12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1176
+	ble	.L1184
 	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1168:
+.LVL1177:
 	cmp	w0, 1
-	beq	.L1173
+	beq	.L1181
 	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1169:
-	cbz	w0, .L1174
+.LVL1178:
+	cbz	w0, .L1182
 	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1170:
-.L1173:
+.LVL1179:
+.L1181:
 	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1172
-.L1169:
+	b	.L1180
+.L1177:
 	.loc 4 328 0
-	ldr	x0, [x19, 2288]
+	ldr	x0, [x19, 3376]
 	.loc 4 331 0
 	mov	w2, 65535
 	.loc 4 329 0
-	ldr	x27, [x19, 3392]
+	ldr	x27, [x19, 3384]
 	.loc 4 331 0
 	ldrh	w1, [x25]
 	.loc 4 329 0
 	stp	x0, x27, [x20, 8]
 	.loc 4 331 0
 	cmp	w1, w2
-	beq	.L1164
+	beq	.L1172
 	.loc 4 333 0
 	ldrh	w23, [x19, 78]
-.LVL1171:
+.LVL1180:
 	.loc 4 335 0
 	mov	w2, 1
 	.loc 4 333 0
 	madd	w23, w23, w24, w1
-.LVL1172:
+.LVL1181:
 	.loc 4 335 0
 	mov	w1, w2
 	.loc 4 334 0
@@ -13694,7 +13822,7 @@ FtlMakeBbt:
 	.loc 4 335 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1173:
+.LVL1182:
 	.loc 4 336 0
 	ldr	x1, [x20, 8]
 	ldr	x0, [x26]
@@ -13702,57 +13830,57 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1174:
-.L1165:
+.LVL1183:
+.L1173:
 	.loc 4 376 0 discriminator 2
 	mov	w0, w23
 	.loc 4 327 0 discriminator 2
 	add	w24, w24, 1
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1175:
+.LVL1184:
 	add	x26, x26, 8
 	add	x25, x25, 2
-	b	.L1163
-.L1164:
+	b	.L1171
+.L1172:
 	.loc 4 340 0
 	mov	w1, w24
 	bl	FlashGetBadBlockList
-.LVL1176:
+.LVL1185:
 	.loc 4 341 0
 	ldr	x0, [x20, 8]
 	ldr	x1, [x26]
 	bl	FtlBbt2Bitmap
-.LVL1177:
+.LVL1186:
 	.loc 4 343 0
 	ldrh	w22, [x19, 78]
-.L1167:
+.L1175:
 	.loc 4 347 0
 	sub	w22, w22, #1
 	and	w22, w22, 65535
-.L1166:
+.L1174:
 	.loc 4 345 0
 	ldrh	w0, [x19, 78]
 	madd	w0, w24, w0, w22
 	bl	FtlBbmIsBadBlock
-.LVL1178:
+.LVL1187:
 	cmp	w0, 1
-	beq	.L1167
+	beq	.L1175
 	.loc 4 350 0
-	ldr	x0, [x19, 3392]
+	ldr	x0, [x19, 3384]
 	mov	w2, 16
 	.loc 4 349 0
 	strh	w22, [x25]
 	.loc 4 350 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1179:
+.LVL1188:
 	.loc 4 351 0
-	ldr	x0, [x19, 2288]
+	ldr	x0, [x19, 3376]
 	mov	w2, 4096
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1180:
+.LVL1189:
 	.loc 4 353 0
 	str	wzr, [x27, 4]
 	.loc 4 352 0
@@ -13763,14 +13891,14 @@ FtlMakeBbt:
 	strh	w0, [x27, 2]
 	.loc 4 355 0
 	ldrh	w23, [x19, 78]
-.LVL1181:
+.LVL1190:
 	ldrh	w0, [x25]
 	.loc 4 357 0
 	ldr	x1, [x26]
-	ldrh	w2, [x28, -248]
+	ldrh	w2, [x28, -256]
 	.loc 4 355 0
 	madd	w23, w23, w24, w0
-.LVL1182:
+.LVL1191:
 	.loc 4 357 0
 	lsl	w2, w2, 2
 	.loc 4 356 0
@@ -13779,59 +13907,59 @@ FtlMakeBbt:
 	.loc 4 357 0
 	ldr	x0, [x20, 8]
 	bl	ftl_memcpy
-.LVL1183:
+.LVL1192:
 	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x20
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1184:
+.LVL1193:
 	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1185:
+.LVL1194:
 	.loc 4 360 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1165
+	bne	.L1173
 	.loc 4 362 0
 	mov	w0, w23
 	bl	FtlBbmMapBadBlock
-.LVL1186:
+.LVL1195:
 	.loc 4 363 0
-	b	.L1166
-.L1171:
+	b	.L1174
+.L1179:
 	.loc 4 383 0 discriminator 3
 	mov	w0, w19
 	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1187:
+.LVL1196:
 	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-	b	.L1170
-.L1174:
+	b	.L1178
+.L1182:
 	.loc 4 396 0
 	ldrh	w0, [x20]
 	cmp	w0, w22
-	bne	.L1175
+	bne	.L1183
 	.loc 4 398 0
 	strh	w19, [x20]
-	b	.L1173
-.L1175:
+	b	.L1181
+.L1183:
 	.loc 4 402 0
 	strh	w19, [x20, 4]
-.L1176:
+.L1184:
 	.loc 4 411 0
 	add	x21, x21, :lo12:.LANCHOR0
 	.loc 4 416 0
 	mov	w2, 2
 	.loc 4 414 0
-	ldr	x1, [x21, 3912]
+	ldr	x1, [x21, 3904]
 	ldrh	w0, [x21, 136]
 	.loc 4 413 0
 	str	wzr, [x21, 144]
@@ -13841,25 +13969,25 @@ FtlMakeBbt:
 	lsl	w0, w0, 10
 	str	w0, [x1, 4]
 	.loc 4 415 0
-	ldr	x0, [x21, 3912]
+	ldr	x0, [x21, 3904]
 	ldrh	w1, [x21, 140]
 	lsl	w1, w1, 10
 	str	w1, [x0, 36]
 	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1188:
+.LVL1197:
 	.loc 4 418 0
 	ldrh	w0, [x21, 136]
 	bl	FtlBbmMapBadBlock
-.LVL1189:
+.LVL1198:
 	.loc 4 419 0
 	ldrh	w0, [x21, 140]
 	bl	FtlBbmMapBadBlock
-.LVL1190:
+.LVL1199:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1191:
+.LVL1200:
 	.loc 4 426 0
 	strh	wzr, [x21, 138]
 	.loc 4 422 0
@@ -13877,13 +14005,13 @@ FtlMakeBbt:
 	strh	w1, [x21, 136]
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1192:
+.LVL1201:
 	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1193:
+.LVL1202:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
@@ -13909,9 +14037,9 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 .LFB202:
-	.loc 2 786 0
+	.loc 2 835 0
 	.cfi_startproc
-.LVL1194:
+.LVL1203:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -13921,25 +14049,25 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -160
 	.cfi_offset 24, -152
-	.loc 2 794 0
+	.loc 2 843 0
 	adrp	x23, .LANCHOR0
-	.loc 2 786 0
+	.loc 2 835 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -144
 	.cfi_offset 26, -136
 	mov	x26, x2
 	stp	x27, x28, [sp, 80]
-	.loc 2 794 0
+	.loc 2 843 0
 	add	w2, w0, w1
-.LVL1195:
+.LVL1204:
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 2 786 0
+	.loc 2 835 0
 	mov	w28, w0
-	.loc 2 794 0
+	.loc 2 843 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL1196:
-	.loc 2 786 0
+.LVL1205:
+	.loc 2 835 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
@@ -13947,39 +14075,39 @@ FtlVendorPartWrite:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -192
 	.cfi_offset 20, -184
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	w1, [x0, 76]
-.LVL1197:
+.LVL1206:
 	cmp	w2, w1
-	bhi	.L1190
-	.loc 2 791 0
+	bhi	.L1198
+	.loc 2 840 0
 	ldrh	w22, [x0, 88]
-	.loc 2 812 0
+	.loc 2 861 0
 	adrp	x24, .LANCHOR3
 	add	x24, x24, :lo12:.LANCHOR3
-	.loc 2 806 0
+	.loc 2 855 0
 	add	x27, x29, 144
-	.loc 2 812 0
-	sub	x24, x24, #168
-	.loc 2 791 0
+	.loc 2 861 0
+	sub	x24, x24, #176
+	.loc 2 840 0
 	mov	w25, 0
 	lsr	w22, w28, w22
-.LVL1198:
-.L1184:
-	.loc 2 797 0
-	cbnz	w21, .L1189
-.L1182:
-	.loc 2 820 0
+.LVL1207:
+.L1192:
+	.loc 2 846 0
+	cbnz	w21, .L1197
+.L1190:
+	.loc 2 869 0
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL1199:
+.LVL1208:
 	ldp	x21, x22, [sp, 32]
-.LVL1200:
+.LVL1209:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1201:
+.LVL1210:
 	ldp	x27, x28, [sp, 80]
-.LVL1202:
+.LVL1211:
 	ldp	x29, x30, [sp], 208
 	.cfi_remember_state
 	.cfi_restore 30
@@ -13996,107 +14124,107 @@ FtlVendorPartWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1203:
-.L1189:
+.LVL1212:
+.L1197:
 	.cfi_restore_state
-	.loc 2 798 0
+	.loc 2 847 0
 	add	x2, x23, :lo12:.LANCHOR0
-	.loc 2 799 0
+	.loc 2 848 0
 	ldrh	w1, [x2, 38]
-	.loc 2 798 0
-	ldr	x0, [x2, 4072]
-	.loc 2 799 0
+	.loc 2 847 0
+	ldr	x0, [x2, 4064]
+	.loc 2 848 0
 	udiv	w20, w28, w1
-	.loc 2 798 0
+	.loc 2 847 0
 	ldr	w3, [x0, w22, uxtw 2]
-	.loc 2 802 0
+	.loc 2 851 0
 	and	w0, w21, 65535
-.LVL1204:
-	.loc 2 799 0
+.LVL1213:
+	.loc 2 848 0
 	msub	w20, w20, w1, w28
-	.loc 2 800 0
+	.loc 2 849 0
 	sub	w19, w1, w20
-.LVL1205:
+.LVL1214:
 	and	w19, w19, 65535
-.LVL1206:
-	.loc 2 802 0
+.LVL1215:
+	.loc 2 851 0
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
-.LVL1207:
-	.loc 2 803 0
-	cbz	w3, .L1186
-	.loc 2 803 0 is_stmt 0 discriminator 1
+.LVL1216:
+	.loc 2 852 0
+	cbz	w3, .L1194
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
-	beq	.L1186
-	.loc 2 805 0 is_stmt 1
-	ldr	x0, [x2, 4000]
-	.loc 2 807 0
+	beq	.L1194
+	.loc 2 854 0 is_stmt 1
+	ldr	x0, [x2, 3992]
+	.loc 2 856 0
 	mov	w2, 1
-	.loc 2 806 0
+	.loc 2 855 0
 	stp	x0, x27, [x29, 120]
-	.loc 2 807 0
+	.loc 2 856 0
 	mov	w1, w2
-	.loc 2 804 0
+	.loc 2 853 0
 	str	w3, [x29, 116]
-	.loc 2 807 0
+	.loc 2 856 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL1208:
-.L1187:
-	.loc 2 811 0
+.LVL1217:
+.L1195:
+	.loc 2 860 0
 	add	x4, x23, :lo12:.LANCHOR0
 	lsl	w3, w19, 9
 	lsl	w20, w20, 9
 	mov	w2, w3
 	asr	w20, w20, 2
 	mov	x1, x26
-	ldr	x0, [x4, 4000]
-	.loc 2 815 0
+	ldr	x0, [x4, 3992]
+	.loc 2 864 0
 	sub	w21, w21, w19
-	.loc 2 811 0
+	.loc 2 860 0
 	str	w3, [x29, 108]
-	.loc 2 816 0
+	.loc 2 865 0
 	add	w28, w28, w19
-	.loc 2 811 0
+	.loc 2 860 0
 	str	x4, [x29, 96]
 	add	x0, x0, x20, sxtw 2
 	bl	ftl_memcpy
-.LVL1209:
-	.loc 2 812 0
+.LVL1218:
+	.loc 2 861 0
 	ldr	x4, [x29, 96]
 	mov	w1, w22
 	mov	x0, x24
-	.loc 2 814 0
+	.loc 2 863 0
 	add	w22, w22, 1
-	.loc 2 812 0
-	ldr	x2, [x4, 4000]
+	.loc 2 861 0
+	ldr	x2, [x4, 3992]
 	bl	FtlMapWritePage
-.LVL1210:
-	.loc 2 813 0
+.LVL1219:
+	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 817 0
+	.loc 2 866 0
 	ldr	w3, [x29, 108]
-	.loc 2 813 0
+	.loc 2 862 0
 	csinv	w25, w25, wzr, ne
-	.loc 2 817 0
+	.loc 2 866 0
 	add	x26, x26, x3, sxtw
-	b	.L1184
-.LVL1211:
-.L1186:
-	.loc 2 809 0
+	b	.L1192
+.LVL1220:
+.L1194:
+	.loc 2 858 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL1212:
+.LVL1221:
 	mov	w1, 0
 	ldrh	w2, [x0, 90]
-	ldr	x0, [x0, 4000]
+	ldr	x0, [x0, 3992]
 	bl	ftl_memset
-.LVL1213:
-	b	.L1187
-.LVL1214:
-.L1190:
-	.loc 2 795 0
+.LVL1222:
+	b	.L1195
+.LVL1223:
+.L1198:
+	.loc 2 844 0
 	mov	w25, -1
-	b	.L1182
+	b	.L1190
 	.cfi_endproc
 .LFE202:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -14105,91 +14233,91 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 .LFB225:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	.cfi_startproc
-	.loc 2 2111 0
+	.loc 2 2160 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	ldr	w3, [x0, 2712]
+	ldr	w3, [x0, 2696]
 	cmp	w3, w1
-	bne	.L1198
-	.loc 2 2110 0
+	bne	.L1206
+	.loc 2 2159 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	add	x2, x0, 2712
-.LBB270:
-.LBB271:
-	.loc 2 2112 0
-	mov	w1, 64
-.LBE271:
-.LBE270:
-	.loc 2 2110 0
+	add	x2, x0, 2696
+.LBB298:
+.LBB299:
+	.loc 2 2161 0
+	mov	w1, 68
+.LBE299:
+.LBE298:
+	.loc 2 2159 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB274:
-.LBB272:
-	.loc 2 2112 0
+.LBB302:
+.LBB300:
+	.loc 2 2161 0
 	movk	w1, 0x5000, lsl 16
-.LBE272:
-.LBE274:
-	.loc 2 2110 0
-.LBB275:
-.LBB273:
-	.loc 2 2112 0
+.LBE300:
+.LBE302:
+	.loc 2 2159 0
+.LBB303:
+.LBB301:
+	.loc 2 2161 0
 	str	w1, [x2, 4]
-	.loc 2 2113 0
-	ldr	w1, [x0, 2548]
+	.loc 2 2162 0
+	ldr	w1, [x0, 2588]
 	str	w1, [x2, 88]
-	.loc 2 2114 0
-	ldr	w1, [x0, 2552]
+	.loc 2 2163 0
+	ldr	w1, [x0, 2592]
 	str	w1, [x2, 92]
-	.loc 2 2115 0
-	ldr	w1, [x0, 2544]
+	.loc 2 2164 0
+	ldr	w1, [x0, 2584]
 	str	w1, [x2, 8]
-	.loc 2 2116 0
-	ldr	w1, [x0, 2532]
+	.loc 2 2165 0
+	ldr	w1, [x0, 2572]
 	str	w1, [x2, 12]
-	.loc 2 2117 0
-	ldr	w1, [x0, 2524]
+	.loc 2 2166 0
+	ldr	w1, [x0, 2564]
 	str	w1, [x2, 16]
-	.loc 2 2118 0
-	ldr	w1, [x0, 2540]
+	.loc 2 2167 0
+	ldr	w1, [x0, 2580]
 	str	w1, [x2, 20]
-	.loc 2 2119 0
-	ldr	w1, [x0, 2568]
+	.loc 2 2168 0
+	ldr	w1, [x0, 2608]
 	str	w1, [x2, 28]
-	.loc 2 2120 0
-	ldr	w1, [x0, 2576]
+	.loc 2 2169 0
+	ldr	w1, [x0, 2616]
 	str	w1, [x2, 32]
-	.loc 2 2121 0
-	ldr	w1, [x0, 2528]
+	.loc 2 2170 0
+	ldr	w1, [x0, 2568]
 	str	w1, [x2, 36]
-	.loc 2 2122 0
-	ldr	w1, [x0, 2536]
+	.loc 2 2171 0
+	ldr	w1, [x0, 2576]
 	str	w1, [x2, 40]
-	.loc 2 2123 0
-	ldr	w1, [x0, 2580]
-	.loc 2 2124 0
-	ldr	w0, [x0, 2584]
+	.loc 2 2172 0
+	ldr	w1, [x0, 2620]
+	.loc 2 2173 0
+	ldr	w0, [x0, 2624]
 	stp	w1, w0, [x2, 44]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	FtlVendorPartWrite
-.LVL1215:
-.LBE273:
-.LBE275:
-	.loc 2 2127 0
+.LVL1224:
+.LBE301:
+.LBE303:
+	.loc 2 2176 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.L1198:
+.L1206:
 	ret
 	.cfi_endproc
 .LFE225:
@@ -14199,92 +14327,92 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 .LFB204:
-	.loc 2 861 0
+	.loc 2 910 0
 	.cfi_startproc
-.LVL1216:
-	.loc 2 864 0
+.LVL1225:
+	.loc 2 913 0
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
-	ldrh	w2, [x1, 56]
+	ldrh	w2, [x1, 48]
 	cmp	w2, 31
-	bhi	.L1205
-	.loc 2 865 0
+	bhi	.L1213
+	.loc 2 914 0
 	add	w2, w2, 1
-	strh	w2, [x1, 56]
-	.loc 2 866 0
+	strh	w2, [x1, 48]
+	.loc 2 915 0
 	mov	w2, 1
-.LVL1217:
-.L1202:
+.LVL1226:
+.L1210:
 	adrp	x1, .LANCHOR0
-	.loc 2 868 0
-	cbnz	w0, .L1203
-	.loc 2 868 0 is_stmt 0 discriminator 1
+	.loc 2 917 0
+	cbnz	w0, .L1211
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL1218:
-	ldr	x0, [x0, 4024]
+.LVL1227:
+	ldr	x0, [x0, 4016]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w2, w2, w3
-.LVL1219:
+.LVL1228:
 	cmp	w0, w2
-	bcc	.L1207
-.LVL1220:
-.L1203:
-	.loc 2 870 0 is_stmt 1
+	bcc	.L1215
+.LVL1229:
+.L1211:
+	.loc 2 919 0 is_stmt 1
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL1221:
-	.loc 2 861 0
+.LVL1230:
+	.loc 2 910 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 870 0
-	ldr	x1, [x0, 4024]
+	.loc 2 919 0
+	ldr	x1, [x0, 4016]
 	ldr	w2, [x1, 16]
-.LVL1222:
+.LVL1231:
 	str	w2, [x1, 20]
-	.loc 2 871 0
+	.loc 2 920 0
 	mov	w2, 17221
 	movk	w2, 0x4254, lsl 16
 	str	w2, [x1]
-	.loc 2 872 0
-	ldr	x2, [x0, 4024]
-	ldrh	w1, [x0, 4008]
+	.loc 2 921 0
+	ldr	x2, [x0, 4016]
+	ldrh	w1, [x0, 4000]
 	lsl	w3, w1, 9
-	.loc 2 874 0
+	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 872 0
+	.loc 2 921 0
 	str	w3, [x2, 12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	w3, [x2, 8]
 	add	w3, w3, 1
 	str	w3, [x2, 8]
-	.loc 2 875 0
-	ldr	x2, [x0, 4024]
+	.loc 2 924 0
+	ldr	x2, [x0, 4016]
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1223:
-	.loc 2 876 0
+.LVL1232:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1224:
-	.loc 2 878 0
+.LVL1233:
+	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1225:
-.L1205:
-	.loc 2 862 0
+.LVL1234:
+.L1213:
+	.loc 2 911 0
 	mov	w2, 32
-.LVL1226:
-	b	.L1202
-.LVL1227:
-.L1207:
-	.loc 2 878 0
+.LVL1235:
+	b	.L1210
+.LVL1236:
+.L1215:
+	.loc 2 927 0
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -14295,9 +14423,9 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 .LFB203:
-	.loc 2 823 0
+	.loc 2 872 0
 	.cfi_startproc
-.LVL1228:
+.LVL1237:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -14307,10 +14435,10 @@ FtlVendorPartRead:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -176
 	.cfi_offset 20, -168
-	.loc 2 832 0
+	.loc 2 881 0
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 823 0
+	.loc 2 872 0
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 27, -112
@@ -14320,43 +14448,43 @@ FtlVendorPartRead:
 	mov	w28, w0
 	mov	w27, w1
 	stp	x23, x24, [sp, 48]
-	.loc 2 832 0
+	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1229:
-	.loc 2 823 0
+.LVL1238:
+	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -144
 	.cfi_offset 24, -136
 	.cfi_offset 25, -128
 	.cfi_offset 26, -120
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	w0, [x20, 76]
-.LVL1230:
+.LVL1239:
 	cmp	w1, w0
-	bhi	.L1217
-	.loc 2 828 0
+	bhi	.L1225
+	.loc 2 877 0
 	ldrh	w3, [x20, 88]
 	mov	x23, x2
 	mov	w22, 0
-	.loc 2 846 0
+	.loc 2 895 0
 	mov	w25, -1
-	.loc 2 828 0
+	.loc 2 877 0
 	lsr	w24, w28, w3
-.LVL1231:
-.L1211:
-	.loc 2 834 0
-	cbnz	w27, .L1216
-.L1209:
-	.loc 2 857 0
+.LVL1240:
+.L1219:
+	.loc 2 883 0
+	cbnz	w27, .L1224
+.L1217:
+	.loc 2 906 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1232:
+.LVL1241:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1233:
+.LVL1242:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1234:
+.LVL1243:
 	ldp	x29, x30, [sp], 192
 	.cfi_remember_state
 	.cfi_restore 30
@@ -14373,97 +14501,97 @@ FtlVendorPartRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1235:
-.L1216:
+.LVL1244:
+.L1224:
 	.cfi_restore_state
-	.loc 2 836 0
+	.loc 2 885 0
 	ldrh	w19, [x20, 38]
-.LVL1236:
-	.loc 2 835 0
-	ldr	x0, [x20, 4072]
-	.loc 2 836 0
+.LVL1245:
+	.loc 2 884 0
+	ldr	x0, [x20, 4064]
+	.loc 2 885 0
 	udiv	w21, w28, w19
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	w1, [x0, w24, uxtw 2]
-	.loc 2 839 0
+	.loc 2 888 0
 	and	w0, w27, 65535
-.LVL1237:
-	.loc 2 836 0
+.LVL1246:
+	.loc 2 885 0
 	msub	w21, w21, w19, w28
-	.loc 2 837 0
+	.loc 2 886 0
 	sub	w19, w19, w21
 	and	w19, w19, 65535
-.LVL1238:
-	.loc 2 839 0
+.LVL1247:
+	.loc 2 888 0
 	cmp	w27, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-.LVL1239:
-	.loc 2 840 0
-	cbz	w1, .L1213
-	.loc 2 842 0
-	ldr	x0, [x20, 4000]
-	.loc 2 844 0
+.LVL1248:
+	.loc 2 889 0
+	cbz	w1, .L1221
+	.loc 2 891 0
+	ldr	x0, [x20, 3992]
+	.loc 2 893 0
 	mov	w2, 1
-	.loc 2 842 0
+	.loc 2 891 0
 	str	x0, [x29, 104]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	x0, x29, 128
-	.loc 2 841 0
+	.loc 2 890 0
 	str	w1, [x29, 100]
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	w1, w2
-.LVL1240:
-	.loc 2 843 0
+.LVL1249:
+	.loc 2 892 0
 	str	x0, [x29, 112]
-	.loc 2 844 0
+	.loc 2 893 0
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1241:
-	.loc 2 847 0
+.LVL1250:
+	.loc 2 896 0
 	lsl	w21, w21, 9
-	.loc 2 845 0
+	.loc 2 894 0
 	ldr	w0, [x29, 96]
-	.loc 2 847 0
+	.loc 2 896 0
 	asr	w21, w21, 2
-	ldr	x1, [x20, 4000]
+	ldr	x1, [x20, 3992]
 	mov	w2, w26
-	.loc 2 846 0
+	.loc 2 895 0
 	cmn	w0, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	x0, x23
-	.loc 2 846 0
+	.loc 2 895 0
 	csel	w22, w22, w25, ne
-	.loc 2 847 0
+	.loc 2 896 0
 	add	x1, x1, x21, sxtw 2
 	bl	ftl_memcpy
-.LVL1242:
-.L1215:
-	.loc 2 851 0
+.LVL1251:
+.L1223:
+	.loc 2 900 0
 	add	w24, w24, 1
-	.loc 2 852 0
+	.loc 2 901 0
 	sub	w27, w27, w19
-	.loc 2 853 0
+	.loc 2 902 0
 	add	w28, w28, w19
-	.loc 2 854 0
+	.loc 2 903 0
 	add	x23, x23, x26, sxtw
-	b	.L1211
-.LVL1243:
-.L1213:
-	.loc 2 849 0
+	b	.L1219
+.LVL1252:
+.L1221:
+	.loc 2 898 0
 	mov	w2, w26
 	mov	w1, 0
-.LVL1244:
+.LVL1253:
 	mov	x0, x23
-.LVL1245:
+.LVL1254:
 	bl	ftl_memset
-.LVL1246:
-	b	.L1215
-.LVL1247:
-.L1217:
-	.loc 2 833 0
+.LVL1255:
+	b	.L1223
+.LVL1256:
+.L1225:
+	.loc 2 882 0
 	mov	w22, -1
-	b	.L1209
+	b	.L1217
 	.cfi_endproc
 .LFE203:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -14472,53 +14600,53 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 .LFB210:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 1335 0
+	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1334 0
+	.loc 2 1383 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 1335 0
+	.loc 2 1384 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x19, 4008]
-	ldr	x2, [x19, 4024]
+	ldrh	w1, [x19, 4000]
+	ldr	x2, [x19, 4016]
 	bl	FtlVendorPartRead
-.LVL1248:
-	.loc 2 1336 0
-	ldr	x0, [x19, 4024]
+.LVL1257:
+	.loc 2 1385 0
+	ldr	x0, [x19, 4016]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1220
-.LBB278:
-.LBB279:
-	.loc 2 1338 0
-	adrp	x1, .LC96
+	beq	.L1228
+.LBB306:
+.LBB307:
+	.loc 2 1387 0
+	adrp	x1, .LC99
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC96
+	add	x1, x1, :lo12:.LC99
 	add	x0, x0, :lo12:.LC71
 	bl	printk
-.LVL1249:
-	.loc 2 1339 0
-	ldr	x0, [x19, 4024]
+.LVL1258:
+	.loc 2 1388 0
+	ldr	x0, [x19, 4016]
 	mov	w1, 0
-	ldrh	w2, [x19, 4008]
+	ldrh	w2, [x19, 4000]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1250:
-.L1220:
-.LBE279:
-.LBE278:
-	.loc 2 1344 0
+.LVL1259:
+.L1228:
+.LBE307:
+.LBE306:
+	.loc 2 1393 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -14535,107 +14663,107 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 .LFB226:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 2 2131 0
+	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2130 0
+	.loc 2 2179 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2131 0
+	.loc 2 2180 0
 	adrp	x19, .LANCHOR0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 2 2130 0
+	.loc 2 2179 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 2 2131 0
-	add	x22, x20, 2712
-	.loc 2 2132 0
+	.loc 2 2180 0
+	add	x22, x20, 2696
+	.loc 2 2181 0
 	mov	w21, 19539
-	.loc 2 2131 0
+	.loc 2 2180 0
 	mov	x2, x22
 	bl	FtlVendorPartRead
-.LVL1251:
-	.loc 2 2132 0
-	ldr	w0, [x20, 2712]
+.LVL1260:
+	.loc 2 2181 0
+	ldr	w0, [x20, 2696]
 	movk	w21, 0x4654, lsl 16
 	cmp	w0, w21
-	beq	.L1223
-	.loc 2 2133 0
+	beq	.L1231
+	.loc 2 2182 0
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x22
 	bl	ftl_memset
-.LVL1252:
-	.loc 2 2134 0
-	str	w21, [x20, 2712]
-.L1223:
-	.loc 2 2137 0
+.LVL1261:
+	.loc 2 2183 0
+	str	w21, [x20, 2696]
+.L1231:
+	.loc 2 2186 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
-	ldr	w3, [x0, 2712]
+	ldr	w3, [x0, 2696]
 	cmp	w3, w2
-	bne	.L1224
-	.loc 2 2138 0
-	ldr	w2, [x0, 2800]
-	str	w2, [x0, 2548]
-	.loc 2 2139 0
-	ldr	w2, [x0, 2804]
-	str	w2, [x0, 2552]
-	.loc 2 2140 0
-	ldr	w2, [x0, 2720]
-	str	w2, [x0, 2544]
-	.loc 2 2141 0
+	bne	.L1232
+	.loc 2 2187 0
+	ldr	w2, [x0, 2784]
+	str	w2, [x0, 2588]
+	.loc 2 2188 0
+	ldr	w2, [x0, 2788]
+	str	w2, [x0, 2592]
+	.loc 2 2189 0
+	ldr	w2, [x0, 2704]
+	str	w2, [x0, 2584]
+	.loc 2 2190 0
+	ldr	w2, [x0, 2708]
+	str	w2, [x0, 2572]
+	.loc 2 2191 0
+	ldr	w2, [x0, 2712]
+	str	w2, [x0, 2564]
+	.loc 2 2192 0
+	ldr	w2, [x0, 2716]
+	str	w2, [x0, 2580]
+	.loc 2 2193 0
 	ldr	w2, [x0, 2724]
-	str	w2, [x0, 2532]
-	.loc 2 2142 0
+	str	w2, [x0, 2608]
+	.loc 2 2194 0
 	ldr	w2, [x0, 2728]
-	str	w2, [x0, 2524]
-	.loc 2 2143 0
+	str	w2, [x0, 2616]
+	.loc 2 2195 0
 	ldr	w2, [x0, 2732]
-	str	w2, [x0, 2540]
-	.loc 2 2144 0
-	ldr	w2, [x0, 2740]
 	str	w2, [x0, 2568]
-	.loc 2 2145 0
-	ldr	w2, [x0, 2744]
+	.loc 2 2196 0
+	ldr	w2, [x0, 2736]
+	.loc 2 2198 0
+	ldr	w1, [x0, 2744]
+	.loc 2 2196 0
 	str	w2, [x0, 2576]
-	.loc 2 2146 0
-	ldr	w2, [x0, 2748]
-	str	w2, [x0, 2528]
-	.loc 2 2147 0
-	ldr	w2, [x0, 2752]
-	.loc 2 2149 0
-	ldr	w1, [x0, 2760]
-	.loc 2 2147 0
-	str	w2, [x0, 2536]
-	.loc 2 2148 0
-	ldr	w2, [x0, 2756]
-	.loc 2 2149 0
-	str	w1, [x0, 2584]
-	.loc 2 2148 0
-	str	w2, [x0, 2580]
-.L1224:
-	.loc 2 2152 0
+	.loc 2 2197 0
+	ldr	w2, [x0, 2740]
+	.loc 2 2198 0
+	str	w1, [x0, 2624]
+	.loc 2 2197 0
+	str	w2, [x0, 2620]
+.L1232:
+	.loc 2 2201 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldr	w2, [x0, 2568]
+	ldr	w2, [x0, 2608]
 	ldrh	w1, [x0, 72]
-	ldr	w3, [x0, 2564]
+	ldr	w3, [x0, 2604]
 	madd	w1, w1, w3, w2
 	ldrh	w2, [x0, 20]
 	udiv	w1, w1, w2
-	str	w1, [x0, 2572]
-	.loc 2 2153 0
+	str	w1, [x0, 2612]
+	.loc 2 2202 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -14655,7 +14783,7 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 .LFB208:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
@@ -14669,152 +14797,152 @@ FtlVpcTblFlush:
 	.cfi_offset 20, -56
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 1010 0
+	.loc 2 1059 0
 	adrp	x22, .LANCHOR0
 	add	x19, x22, :lo12:.LANCHOR0
-	.loc 2 1004 0
+	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 1019 0
-	add	x20, x19, 2592
-	.loc 2 1010 0
-	add	x25, x19, 3360
-	.loc 2 1007 0
+	.loc 2 1068 0
+	add	x20, x19, 2288
+	.loc 2 1059 0
+	add	x25, x19, 3344
+	.loc 2 1056 0
 	mov	w23, 0
-.LVL1253:
-	.loc 2 1011 0
-	ldr	x21, [x19, 3392]
-	.loc 2 1005 0
+.LVL1262:
+	.loc 2 1060 0
+	ldr	x21, [x19, 3384]
+	.loc 2 1054 0
 	mov	w24, 65535
-.LVL1254:
-	.loc 2 1010 0
-	ldr	x0, [x19, 2288]
-	.loc 2 1013 0
-	ldrh	w1, [x19, 2648]
-	.loc 2 1010 0
-	str	x0, [x19, 3368]
-	.loc 2 1011 0
-	str	x21, [x19, 3376]
-	.loc 2 1013 0
+.LVL1263:
+	.loc 2 1059 0
+	ldr	x0, [x19, 3376]
+	.loc 2 1062 0
+	ldrh	w1, [x19, 2632]
+	.loc 2 1059 0
+	str	x0, [x19, 3352]
+	.loc 2 1060 0
+	str	x21, [x19, 3360]
+	.loc 2 1062 0
 	strh	w1, [x21, 2]
-	.loc 2 1014 0
+	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1017 0
+	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1015 0
-	ldr	w1, [x19, 2656]
-	.loc 2 1016 0
+	.loc 2 1064 0
+	ldr	w1, [x19, 2640]
+	.loc 2 1065 0
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1019 0
+	.loc 2 1068 0
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	str	w1, [x19, 2592]
-	.loc 2 1020 0
-	mov	w1, 64
-	.loc 2 1025 0
-	ldrb	w2, [x19, 2366]
-	.loc 2 1020 0
+	str	w1, [x19, 2288]
+	.loc 2 1069 0
+	mov	w1, 68
+	.loc 2 1074 0
+	ldrb	w2, [x19, 2406]
+	.loc 2 1069 0
 	movk	w1, 0x5000, lsl 16
-	str	w1, [x19, 2596]
-	.loc 2 1024 0
-	ldrh	w1, [x19, 2360]
-	strh	w1, [x19, 2606]
-	.loc 2 1025 0
-	ldrh	w1, [x19, 2362]
-	.loc 2 1021 0
-	ldrh	w0, [x19, 2654]
-	strh	w0, [x19, 2600]
-	.loc 2 1022 0
+	str	w1, [x19, 2292]
+	.loc 2 1073 0
+	ldrh	w1, [x19, 2400]
+	strh	w1, [x19, 2302]
+	.loc 2 1074 0
+	ldrh	w1, [x19, 2402]
+	.loc 2 1070 0
+	ldrh	w0, [x19, 2638]
+	strh	w0, [x19, 2296]
+	.loc 2 1071 0
 	ldrh	w0, [x19, 34]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1022 0
-	strb	w0, [x19, 2602]
-	.loc 2 1025 0
-	strh	w1, [x19, 2608]
-	.loc 2 1028 0
-	ldrh	w1, [x19, 2408]
-	.loc 2 1029 0
-	ldrb	w2, [x19, 2414]
-	.loc 2 1028 0
-	strh	w1, [x19, 2610]
-	.loc 2 1029 0
-	ldrh	w1, [x19, 2410]
-	.loc 2 1026 0
-	ldrb	w0, [x19, 2368]
-	strb	w0, [x19, 2603]
-	.loc 2 1029 0
+	.loc 2 1071 0
+	strb	w0, [x19, 2298]
+	.loc 2 1074 0
+	strh	w1, [x19, 2304]
+	.loc 2 1077 0
+	ldrh	w1, [x19, 2448]
+	.loc 2 1078 0
+	ldrb	w2, [x19, 2454]
+	.loc 2 1077 0
+	strh	w1, [x19, 2306]
+	.loc 2 1078 0
+	ldrh	w1, [x19, 2450]
+	.loc 2 1075 0
+	ldrb	w0, [x19, 2408]
+	strb	w0, [x19, 2299]
+	.loc 2 1078 0
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1030 0
-	ldrb	w0, [x19, 2416]
-	.loc 2 1029 0
-	strh	w1, [x19, 2612]
-	.loc 2 1030 0
-	strb	w0, [x19, 2604]
-	.loc 2 1032 0
-	ldrh	w1, [x19, 2456]
-	.loc 2 1034 0
-	ldrb	w0, [x19, 2464]
-	.loc 2 1033 0
-	ldrb	w2, [x19, 2462]
-	.loc 2 1032 0
-	strh	w1, [x19, 2614]
-	.loc 2 1034 0
-	strb	w0, [x19, 2605]
-	.loc 2 1033 0
-	ldrh	w1, [x19, 2458]
-	.loc 2 1036 0
-	ldr	w0, [x19, 2564]
-	str	w0, [x19, 2624]
-	.loc 2 1041 0
-	ldr	w0, [x19, 2556]
-	.loc 2 1033 0
+	.loc 2 1079 0
+	ldrb	w0, [x19, 2456]
+	.loc 2 1078 0
+	strh	w1, [x19, 2308]
+	.loc 2 1079 0
+	strb	w0, [x19, 2300]
+	.loc 2 1081 0
+	ldrh	w1, [x19, 2496]
+	.loc 2 1083 0
+	ldrb	w0, [x19, 2504]
+	.loc 2 1082 0
+	ldrb	w2, [x19, 2502]
+	.loc 2 1081 0
+	strh	w1, [x19, 2310]
+	.loc 2 1083 0
+	strb	w0, [x19, 2301]
+	.loc 2 1082 0
+	ldrh	w1, [x19, 2498]
+	.loc 2 1085 0
+	ldr	w0, [x19, 2604]
+	str	w0, [x19, 2320]
+	.loc 2 1090 0
+	ldr	w0, [x19, 2596]
+	.loc 2 1082 0
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1041 0
-	str	w0, [x19, 2632]
-	.loc 2 1042 0
-	ldr	w0, [x19, 2560]
-	.loc 2 1047 0
+	.loc 2 1090 0
+	str	w0, [x19, 2328]
+	.loc 2 1091 0
+	ldr	w0, [x19, 2600]
+	.loc 2 1096 0
 	ldrh	w2, [x19, 90]
-	.loc 2 1042 0
-	str	w0, [x19, 2628]
-	.loc 2 1047 0
-	ldr	x0, [x19, 3368]
-	.loc 2 1033 0
-	strh	w1, [x19, 2616]
-	.loc 2 1047 0
+	.loc 2 1091 0
+	str	w0, [x19, 2324]
+	.loc 2 1096 0
+	ldr	x0, [x19, 3352]
+	.loc 2 1082 0
+	strh	w1, [x19, 2312]
+	.loc 2 1096 0
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1255:
-	.loc 2 1048 0
-	ldr	x0, [x19, 3368]
+.LVL1264:
+	.loc 2 1097 0
+	ldr	x0, [x19, 3352]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1053 0
+	.loc 2 1102 0
 	mov	x20, x25
-	.loc 2 1075 0
+	.loc 2 1124 0
 	adrp	x25, .LANCHOR1
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x25, x25, 536
-	.loc 2 1048 0
+	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1256:
-	.loc 2 1049 0
-	ldr	x1, [x19, 2320]
+.LVL1265:
+	.loc 2 1098 0
+	ldr	x1, [x19, 2352]
 	ldrh	w2, [x19, 20]
-	ldr	x0, [x19, 3368]
+	ldr	x0, [x19, 3352]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1257:
-	.loc 2 1050 0
+.LVL1266:
+	.loc 2 1099 0
 	ldrh	w0, [x19, 20]
-	ldr	x3, [x19, 3368]
+	ldr	x3, [x19, 3352]
 	ldr	x1, [x22, #:lo12:.LANCHOR0]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -14823,147 +14951,147 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1258:
-	.loc 2 1051 0
+.LVL1267:
+	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1259:
-.L1227:
-	.loc 2 1053 0
-	ldr	x0, [x19, 2288]
-	.loc 2 1056 0
+.LVL1268:
+.L1235:
+	.loc 2 1102 0
+	ldr	x0, [x19, 3376]
+	.loc 2 1105 0
 	mov	w3, 1
-	.loc 2 1053 0
+	.loc 2 1102 0
 	str	x0, [x20, 8]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1054 0
-	ldr	x0, [x19, 3392]
-	.loc 2 1055 0
-	ldrh	w1, [x19, 2650]
-	.loc 2 1054 0
+	.loc 2 1103 0
+	ldr	x0, [x19, 3384]
+	.loc 2 1104 0
+	ldrh	w1, [x19, 2634]
+	.loc 2 1103 0
 	str	x0, [x20, 16]
-	.loc 2 1055 0
-	ldrh	w0, [x19, 2648]
+	.loc 2 1104 0
+	ldrh	w0, [x19, 2632]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1055 0
+	.loc 2 1104 0
 	str	w0, [x20, 4]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	x0, x20
 	bl	FlashProgPages
-.LVL1260:
-	.loc 2 1057 0
+.LVL1269:
+	.loc 2 1106 0
 	ldrh	w0, [x19, 84]
-	ldrh	w1, [x19, 2650]
+	ldrh	w1, [x19, 2634]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1228
-	.loc 2 1059 0
-	ldrh	w0, [x19, 2648]
-	.loc 2 1058 0
-	ldrh	w24, [x19, 2652]
-	.loc 2 1060 0
-	strh	wzr, [x19, 2650]
-	.loc 2 1059 0
-	strh	w0, [x19, 2652]
-	.loc 2 1061 0
+	blt	.L1236
+	.loc 2 1108 0
+	ldrh	w0, [x19, 2632]
+	.loc 2 1107 0
+	ldrh	w24, [x19, 2636]
+	.loc 2 1109 0
+	strh	wzr, [x19, 2634]
+	.loc 2 1108 0
+	strh	w0, [x19, 2636]
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1261:
-	strh	w0, [x19, 2648]
-	.loc 2 1066 0
-	ldr	w1, [x19, 2556]
-	.loc 2 1070 0
+.LVL1270:
+	strh	w0, [x19, 2632]
+	.loc 2 1115 0
+	ldr	w1, [x19, 2596]
+	.loc 2 1119 0
 	mov	w3, 1
-	.loc 2 1066 0
-	str	w1, [x19, 2656]
+	.loc 2 1115 0
+	str	w1, [x19, 2640]
 	add	w2, w1, 1
-	str	w2, [x19, 2556]
-	.loc 2 1067 0
+	str	w2, [x19, 2596]
+	.loc 2 1116 0
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x20, 4]
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1068 0
+	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	x0, x20
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1262:
-.L1228:
-	.loc 2 1072 0
-	ldrh	w0, [x19, 2650]
-	.loc 2 1073 0
+.LVL1271:
+.L1236:
+	.loc 2 1121 0
+	ldrh	w0, [x19, 2634]
+	.loc 2 1122 0
 	ldr	w1, [x20]
-	.loc 2 1072 0
+	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2650]
-	.loc 2 1073 0
+	strh	w0, [x19, 2634]
+	.loc 2 1122 0
 	cmn	w1, #1
-	bne	.L1229
-	.loc 2 1075 0
+	bne	.L1237
+	.loc 2 1124 0
 	cmp	w0, 1
-	bne	.L1230
-	.loc 2 1075 0 is_stmt 0 discriminator 1
+	bne	.L1238
+	.loc 2 1124 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 1075
+	mov	w2, 1124
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1263:
-.L1230:
-	.loc 2 1076 0 is_stmt 1
-	ldrh	w0, [x19, 2650]
+.LVL1272:
+.L1238:
+	.loc 2 1125 0 is_stmt 1
+	ldrh	w0, [x19, 2634]
 	cmp	w0, 1
-	bne	.L1231
-	.loc 2 1077 0
+	bne	.L1239
+	.loc 2 1126 0
 	ldrh	w0, [x19, 84]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2650]
-.L1231:
-	.loc 2 1078 0
+	strh	w0, [x19, 2634]
+.L1239:
+	.loc 2 1127 0
 	add	w23, w23, 1
-.LVL1264:
+.LVL1273:
 	and	w23, w23, 65535
-.LVL1265:
-	.loc 2 1079 0
+.LVL1274:
+	.loc 2 1128 0
 	cmp	w23, 3
-	bls	.L1227
-	.loc 2 1080 0
+	bls	.L1235
+	.loc 2 1129 0
 	add	x22, x22, :lo12:.LANCHOR0
-	adrp	x0, .LC97
+	adrp	x0, .LC100
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC97
-	ldr	w1, [x22, 3364]
+	add	x0, x0, :lo12:.LC100
+	ldr	w1, [x22, 3348]
 	bl	printk
-.LVL1266:
-.L1233:
-	b	.L1233
-.L1229:
-	.loc 2 1086 0
+.LVL1275:
+.L1241:
+	b	.L1241
+.L1237:
+	.loc 2 1135 0
 	cmp	w0, 1
-	beq	.L1227
-	.loc 2 1089 0
+	beq	.L1235
+	.loc 2 1138 0
 	mov	w0, 65535
 	cmp	w24, w0
-	beq	.L1234
-	.loc 2 1090 0
+	beq	.L1242
+	.loc 2 1139 0
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.LVL1267:
-.L1234:
-	.loc 2 1092 0
+.LVL1276:
+.L1242:
+	.loc 2 1141 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1268:
+.LVL1277:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_restore 30
@@ -14986,74 +15114,74 @@ FtlVpcTblFlush:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 .LFB228:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 2 2197 0
+	.loc 2 2247 0
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC87
-	.loc 2 2192 0
+	adrp	x0, .LC90
+	.loc 2 2242 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
-	.loc 2 2198 0
+	.loc 2 2248 0
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 2192 0
+	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2197 0
+	.loc 2 2247 0
 	add	x1, x1, 552
-	add	x0, x0, :lo12:.LC87
-	.loc 2 2192 0
+	add	x0, x0, :lo12:.LC90
+	.loc 2 2242 0
 	str	x23, [sp, 48]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
 	.cfi_offset 23, -32
-	.loc 2 2197 0
+	.loc 2 2247 0
 	bl	printk
-.LVL1269:
-	.loc 2 2198 0
-	ldr	x0, [x19, 4032]
-	.loc 2 2199 0
+.LVL1278:
+	.loc 2 2248 0
+	ldr	x0, [x19, 4024]
+	.loc 2 2249 0
 	mov	w21, 0
-.LVL1270:
-	.loc 2 2198 0
+.LVL1279:
+	.loc 2 2248 0
 	ldrh	w2, [x19, 22]
 	mov	w1, 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1271:
-.L1240:
-	.loc 2 2199 0 discriminator 1
-	ldr	w0, [x19, 2520]
+.LVL1280:
+.L1248:
+	.loc 2 2249 0 discriminator 1
+	ldr	w0, [x19, 2560]
 	cmp	w21, w0
-	bcc	.L1242
-	.loc 2 2209 0 discriminator 1
-	adrp	x22, .LC98
-	.loc 2 2206 0 discriminator 1
+	bcc	.L1250
+	.loc 2 2259 0 discriminator 1
+	adrp	x22, .LC101
+	.loc 2 2256 0 discriminator 1
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 2209 0 discriminator 1
-	add	x22, x22, :lo12:.LC98
+	.loc 2 2259 0 discriminator 1
+	add	x22, x22, :lo12:.LC101
 	mov	w19, 0
-.LVL1272:
-	.loc 2 2207 0 discriminator 1
+.LVL1281:
+	.loc 2 2257 0 discriminator 1
 	mov	w23, 65535
-.L1243:
-	.loc 2 2206 0 discriminator 1
+.L1251:
+	.loc 2 2256 0 discriminator 1
 	ldrh	w0, [x20, 20]
 	cmp	w0, w19
-	bhi	.L1247
-	.loc 2 2218 0
+	bhi	.L1255
+	.loc 2 2268 0
 	ldp	x19, x20, [sp, 16]
-.LVL1273:
+.LVL1282:
 	ldp	x21, x22, [sp, 32]
-.LVL1274:
+.LVL1283:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -15066,86 +15194,86 @@ FtlVpcCheckAndModify:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1275:
-.L1242:
+.LVL1284:
+.L1250:
 	.cfi_restore_state
-	.loc 2 2200 0
+	.loc 2 2250 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	log2phys
-.LVL1276:
-	.loc 2 2201 0
+.LVL1285:
+	.loc 2 2251 0
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1241
-	.loc 2 2202 0
+	beq	.L1249
+	.loc 2 2252 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1277:
-	.loc 2 2203 0
-	ldr	x2, [x19, 4032]
+.LVL1286:
+	.loc 2 2253 0
+	ldr	x2, [x19, 4024]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1241:
-	.loc 2 2199 0 discriminator 2
+.L1249:
+	.loc 2 2249 0 discriminator 2
 	add	w21, w21, 1
-	b	.L1240
-.LVL1278:
-.L1247:
-	.loc 2 2207 0
-	ldr	x0, [x20, 2320]
+	b	.L1248
+.LVL1287:
+.L1255:
+	.loc 2 2257 0
+	ldr	x0, [x20, 2352]
 	ubfiz	x21, x19, 1, 16
-.LVL1279:
+.LVL1288:
 	ldrh	w2, [x0, x21]
-	ldr	x0, [x20, 4032]
+	ldr	x0, [x20, 4024]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1245
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1253
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	cmp	w2, w23
-	beq	.L1245
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1253
+	.loc 2 2259 0 is_stmt 1
 	mov	w1, w19
 	mov	x0, x22
 	bl	printk
-.LVL1280:
-	.loc 2 2210 0
-	ldrh	w0, [x20, 2360]
+.LVL1289:
+	.loc 2 2260 0
+	ldrh	w0, [x20, 2400]
 	cmp	w0, w19
-	beq	.L1245
-	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x20, 2456]
+	beq	.L1253
+	.loc 2 2260 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x20, 2496]
 	cmp	w0, w19
-	beq	.L1245
-	.loc 2 2210 0 discriminator 2
-	ldrh	w0, [x20, 2408]
+	beq	.L1253
+	.loc 2 2260 0 discriminator 2
+	ldrh	w0, [x20, 2448]
 	cmp	w0, w19
-	beq	.L1245
-	.loc 2 2211 0 is_stmt 1
-	ldr	x0, [x20, 4032]
+	beq	.L1253
+	.loc 2 2261 0 is_stmt 1
+	ldr	x0, [x20, 4024]
 	ldrh	w1, [x0, x21]
-	ldr	x0, [x20, 2320]
+	ldr	x0, [x20, 2352]
 	strh	w1, [x0, x21]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1281:
-	.loc 2 2213 0
+.LVL1290:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1282:
-	.loc 2 2214 0
+.LVL1291:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1283:
-.L1245:
-	.loc 2 2206 0 discriminator 2
+.LVL1292:
+.L1253:
+	.loc 2 2256 0 discriminator 2
 	add	w19, w19, 1
-.LVL1284:
+.LVL1293:
 	and	w19, w19, 65535
-.LVL1285:
-	b	.L1243
+.LVL1294:
+	b	.L1251
 	.cfi_endproc
 .LFE228:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -15154,9 +15282,9 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 .LFB238:
-	.loc 2 2631 0
+	.loc 2 2679 0
 	.cfi_startproc
-.LVL1286:
+.LVL1295:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -15166,99 +15294,99 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2633 0
+	.loc 2 2681 0
 	adrp	x19, .LANCHOR0
-	.loc 2 2631 0
+	.loc 2 2679 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 2 2631 0
+	.loc 2 2679 0
 	mov	x22, x0
-	.loc 2 2632 0
+	.loc 2 2680 0
 	ldrh	w21, [x0]
-.LVL1287:
-	.loc 2 2633 0
+.LVL1296:
+	.loc 2 2681 0
 	add	x0, x19, :lo12:.LANCHOR0
-.LVL1288:
+.LVL1297:
 	ldrh	w0, [x0, 20]
 	cmp	w0, w21
-	bcs	.L1253
-	.loc 2 2633 0 is_stmt 0 discriminator 1
+	bcs	.L1261
+	.loc 2 2681 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2633
+	mov	w2, 2681
 	add	x1, x1, 576
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1289:
-.L1253:
-	.loc 2 2635 0 is_stmt 1
+.LVL1298:
+.L1261:
+	.loc 2 2683 0 is_stmt 1
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L1254
-	.loc 2 2636 0
+	beq	.L1262
+	.loc 2 2684 0
 	add	x1, x19, :lo12:.LANCHOR0
 	ubfiz	x0, x21, 1, 16
-	ldr	x1, [x1, 2320]
+	ldr	x1, [x1, 2352]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1255
-	.loc 2 2637 0
+	cbz	w0, .L1263
+	.loc 2 2685 0
 	mov	w0, w21
 	bl	INSERT_DATA_LIST
-.LVL1290:
-.L1254:
-	.loc 2 2641 0
+.LVL1299:
+.L1262:
+	.loc 2 2689 0
 	mov	w0, 1
-	.loc 2 2642 0
+	.loc 2 2690 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2641 0
+	.loc 2 2689 0
 	strb	w0, [x22, 8]
-	.loc 2 2642 0
+	.loc 2 2690 0
 	add	x0, x1, :lo12:.LANCHOR3
 	mov	w2, 65535
 	mov	x20, x1
-	ldrh	w0, [x0, -96]
+	ldrh	w0, [x0, -104]
 	cmp	w0, w2
-	beq	.L1256
-	.loc 2 2643 0
+	beq	.L1264
+	.loc 2 2691 0
 	cmp	w21, w0
-	bne	.L1257
-	.loc 2 2643 0 is_stmt 0 discriminator 1
+	bne	.L1265
+	.loc 2 2691 0 is_stmt 0 discriminator 1
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x19, 2320]
+	ldr	x2, [x19, 2352]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1258
-.L1257:
-	.loc 2 2644 0 is_stmt 1
+	cbz	w1, .L1266
+.L1265:
+	.loc 2 2692 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1291:
-.L1258:
-	.loc 2 2645 0
+.LVL1300:
+.L1266:
+	.loc 2 2693 0
 	add	x1, x20, :lo12:.LANCHOR3
 	mov	w0, -1
-	strh	w0, [x1, -96]
-.L1256:
-	.loc 2 2647 0
+	strh	w0, [x1, -104]
+.L1264:
+	.loc 2 2695 0
 	mov	x0, x22
 	bl	allocate_data_superblock
-.LVL1292:
-	.loc 2 2648 0
+.LVL1301:
+	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1293:
-	.loc 2 2649 0
+.LVL1302:
+	.loc 2 2697 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1294:
-	.loc 2 2650 0
+.LVL1303:
+	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1295:
-	.loc 2 2652 0
+.LVL1304:
+	.loc 2 2700 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1296:
+.LVL1305:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15269,14 +15397,14 @@ allocate_new_data_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1297:
-.L1255:
+.LVL1306:
+.L1263:
 	.cfi_restore_state
-	.loc 2 2639 0
+	.loc 2 2687 0
 	mov	w0, w21
 	bl	INSERT_FREE_LIST
-.LVL1298:
-	b	.L1254
+.LVL1307:
+	b	.L1262
 	.cfi_endproc
 .LFE238:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -15285,17 +15413,17 @@ allocate_new_data_superblock:
 	.type	FtlProgPages, %function
 FtlProgPages:
 .LFB154:
-	.loc 3 902 0
+	.loc 3 904 0
 	.cfi_startproc
-.LVL1299:
+.LVL1308:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 3 909 0
+	.loc 3 911 0
 	mov	w2, 0
-.LVL1300:
-	.loc 3 902 0
+.LVL1309:
+	.loc 3 904 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -15315,166 +15443,166 @@ FtlProgPages:
 	add	x21, x21, 4
 	add	x24, x0, x21
 	adrp	x22, .LANCHOR0
-	.loc 3 909 0
+	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1301:
-	.loc 3 931 0
+.LVL1310:
+	.loc 3 933 0
 	adrp	x25, .LANCHOR1
-	.loc 3 915 0
+	.loc 3 917 0
 	add	x21, x22, :lo12:.LANCHOR0
-	.loc 3 931 0
+	.loc 3 933 0
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x20, x0, 4
-	.loc 3 909 0
+	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1302:
-.L1264:
-	.loc 3 911 0 discriminator 1
+.LVL1311:
+.L1272:
+	.loc 3 913 0 discriminator 1
 	cmp	x20, x24
-	beq	.L1271
+	beq	.L1279
 	sub	x23, x20, #4
-	b	.L1272
-.LVL1303:
-.L1267:
-	.loc 3 913 0
+	b	.L1280
+.LVL1312:
+.L1275:
+	.loc 3 915 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1304:
-	.loc 3 914 0
+.LVL1313:
+	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1265
-	.loc 3 915 0
-	ldr	x2, [x21, 2320]
+	bne	.L1273
+	.loc 3 917 0
+	ldr	x2, [x21, 2352]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
-	.loc 3 917 0
+	.loc 3 919 0
 	strb	wzr, [x19, 6]
-	.loc 3 916 0
+	.loc 3 918 0
 	ldrh	w0, [x21, 82]
 	strh	w0, [x19, 2]
-	.loc 3 918 0
-	strh	wzr, [x19, 4]
-.L1265:
 	.loc 3 920 0
+	strh	wzr, [x19, 4]
+.L1273:
+	.loc 3 922 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1266
-	.loc 3 921 0
+	cbnz	w0, .L1274
+	.loc 3 923 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1305:
-.L1266:
-	.loc 3 924 0
-	ldr	w0, [x21, 2808]
+.LVL1314:
+.L1274:
+	.loc 3 926 0
+	ldr	w0, [x21, 2792]
 	add	w0, w0, 1
-	str	w0, [x21, 2808]
-	.loc 3 925 0
+	str	w0, [x21, 2792]
+	.loc 3 927 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1306:
-	.loc 3 926 0
+.LVL1315:
+	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1307:
-	.loc 3 927 0
+.LVL1316:
+	.loc 3 929 0
 	str	w0, [x20]
-	.loc 3 928 0
+	.loc 3 930 0
 	mov	w2, 0
-	.loc 3 926 0
-	str	w0, [x29, 92]
 	.loc 3 928 0
+	str	w0, [x29, 92]
+	.loc 3 930 0
 	mov	w1, 1
 	ldrb	w3, [x19, 9]
 	mov	x0, x23
 	bl	FlashProgPages
-.LVL1308:
-.L1272:
-	.loc 3 912 0
+.LVL1317:
+.L1280:
+	.loc 3 914 0
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1267
-	.loc 3 931 0
+	beq	.L1275
+	.loc 3 933 0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x21, 12]
 	cmp	w1, w0
-	bcc	.L1268
-	.loc 3 931 0 is_stmt 0 discriminator 1
+	bcc	.L1276
+	.loc 3 933 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 931
+	mov	w2, 933
 	add	x1, x25, 608
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1309:
-.L1268:
-	.loc 3 932 0 is_stmt 1
+.LVL1318:
+.L1276:
+	.loc 3 934 0 is_stmt 1
 	add	x1, x29, 96
 	ldr	w0, [x23, 4]
-	.loc 3 933 0
+	.loc 3 935 0
 	mov	w2, 1
-	.loc 3 932 0
+	.loc 3 934 0
 	str	w0, [x1, -4]!
-.LVL1310:
-	.loc 3 933 0
+.LVL1319:
+	.loc 3 935 0
 	ldr	w0, [x23, 24]
 	bl	log2phys
-.LVL1311:
-	.loc 3 935 0
+.LVL1320:
+	.loc 3 937 0
 	ldr	x0, [x23, 16]
 	ldr	w4, [x0, 12]
-.LVL1312:
-	.loc 3 937 0
+.LVL1321:
+	.loc 3 939 0
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
-.LVL1313:
+.LVL1322:
 	and	w1, w0, 65535
 	mov	w23, w1
-	.loc 3 938 0
-	cmn	w4, #1
-	beq	.L1269
 	.loc 3 940 0
-	ldr	x2, [x21, 2320]
+	cmn	w4, #1
+	beq	.L1277
+	.loc 3 942 0
+	ldr	x2, [x21, 2352]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1270
-	.loc 3 941 0
-	adrp	x0, .LC99
+	cbnz	w0, .L1278
+	.loc 3 943 0
+	adrp	x0, .LC102
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC102
 	bl	printk
-.LVL1314:
-.L1270:
-	.loc 3 942 0
+.LVL1323:
+.L1278:
+	.loc 3 944 0
 	mov	w0, w23
 	bl	decrement_vpc_count
-.LVL1315:
-.L1269:
+.LVL1324:
+.L1277:
 	add	x20, x20, 32
-	b	.L1264
-.L1271:
-	.loc 3 946 0
+	b	.L1272
+.L1279:
+	.loc 3 948 0
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x22, 12]
 	cmp	w1, w0
-	bcc	.L1263
-	.loc 3 946 0 is_stmt 0 discriminator 1
+	bcc	.L1271
+	.loc 3 948 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 946
+	mov	w2, 948
 	add	x1, x1, 608
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1316:
-.L1263:
-	.loc 3 947 0 is_stmt 1
+.LVL1325:
+.L1271:
+	.loc 3 949 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1317:
+.LVL1326:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -15498,7 +15626,7 @@ FtlProgPages:
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
 .LFB155:
-	.loc 3 950 0
+	.loc 3 952 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -15508,21 +15636,21 @@ FtlCacheWriteBack:
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 3 951 0
+	.loc 3 953 0
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
-	ldr	x0, [x19, -104]
-	cbz	x0, .L1279
-	.loc 3 952 0
-	ldr	x3, [x19, 64]
+	ldr	x0, [x19, -112]
+	cbz	x0, .L1287
+	.loc 3 954 0
+	ldr	x3, [x19, 56]
 	mov	w2, 0
 	mov	w1, 1
 	bl	FtlProgPages
-.LVL1318:
-	.loc 3 953 0
-	str	xzr, [x19, -104]
-.L1279:
-	.loc 3 956 0
+.LVL1327:
+	.loc 3 955 0
+	str	xzr, [x19, -112]
+.L1287:
+	.loc 3 958 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15549,17 +15677,17 @@ FtlSysFlush:
 	.cfi_def_cfa_register 29
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1319:
+.LVL1328:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1320:
+.LVL1329:
 	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1321:
+.LVL1330:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1322:
+.LVL1331:
 	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -15581,7 +15709,7 @@ sftl_deinit:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	bne	.L1289
+	bne	.L1297
 	.loc 3 806 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -15591,7 +15719,7 @@ sftl_deinit:
 	.cfi_def_cfa_register 29
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1323:
+.LVL1332:
 	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -15599,7 +15727,7 @@ sftl_deinit:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.L1289:
+.L1297:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -15610,9 +15738,9 @@ sftl_deinit:
 	.type	FtlDiscard, %function
 FtlDiscard:
 .LFB157:
-	.loc 3 1154 0
+	.loc 3 1157 0
 	.cfi_startproc
-.LVL1324:
+.LVL1333:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -15622,37 +15750,37 @@ FtlDiscard:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 3 1161 0
+	.loc 3 1164 0
 	adrp	x20, .LANCHOR0
-	.loc 3 1154 0
+	.loc 3 1157 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 3 1161 0
+	.loc 3 1164 0
 	add	x22, x20, :lo12:.LANCHOR0
-	.loc 3 1154 0
+	.loc 3 1157 0
 	mov	w21, w0
 	mov	w19, w1
-	.loc 3 1161 0
+	.loc 3 1164 0
 	add	w1, w0, w1
-.LVL1325:
+.LVL1334:
 	ldr	w0, [x22, 120]
-.LVL1326:
+.LVL1335:
 	cmp	w1, w0
-	bhi	.L1300
-	.loc 3 1164 0
+	bhi	.L1308
+	.loc 3 1167 0
 	cmp	w19, 31
-	bhi	.L1294
-.LVL1327:
-.L1308:
-	.loc 3 1197 0
+	bhi	.L1302
+.LVL1336:
+.L1316:
+	.loc 3 1200 0
 	mov	w0, 0
-.L1292:
-	.loc 3 1198 0
+.L1300:
+	.loc 3 1201 0
 	ldp	x19, x20, [sp, 16]
-.LVL1328:
+.LVL1337:
 	ldp	x21, x22, [sp, 32]
-.LVL1329:
+.LVL1338:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15663,114 +15791,114 @@ FtlDiscard:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1330:
-.L1294:
+.LVL1339:
+.L1302:
 	.cfi_restore_state
-	.loc 3 1167 0
+	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1331:
-	.loc 3 1169 0
+.LVL1340:
+	.loc 3 1172 0
 	ldrh	w1, [x22, 38]
 	udiv	w22, w21, w1
-.LVL1332:
-	.loc 3 1170 0
+.LVL1341:
+	.loc 3 1173 0
 	msub	w21, w1, w22, w21
-.LVL1333:
-	.loc 3 1171 0
+.LVL1342:
+	.loc 3 1174 0
 	ands	w21, w21, 65535
-.LVL1334:
-	beq	.L1295
-	.loc 3 1172 0
+.LVL1343:
+	beq	.L1303
+	.loc 3 1175 0
 	sub	w1, w1, w21
-	.loc 3 1173 0
+	.loc 3 1176 0
 	add	w22, w22, 1
-	.loc 3 1172 0
+	.loc 3 1175 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
-	.loc 3 1174 0
+	.loc 3 1177 0
 	sub	w19, w19, w1, uxth
-.L1295:
-	.loc 3 1181 0
+.L1303:
+	.loc 3 1184 0
 	adrp	x21, .LANCHOR3
-.LVL1335:
-	.loc 3 1178 0
-	add	x20, x20, :lo12:.LANCHOR0
+.LVL1344:
 	.loc 3 1181 0
+	add	x20, x20, :lo12:.LANCHOR0
+	.loc 3 1184 0
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 3 1177 0
+	.loc 3 1180 0
 	mov	w0, -1
 	str	w0, [x29, 60]
-.LVL1336:
-.L1296:
-	.loc 3 1178 0
+.LVL1345:
+.L1304:
+	.loc 3 1181 0
 	ldrh	w0, [x20, 38]
 	cmp	w19, w0
-	bcs	.L1298
-	.loc 3 1191 0
+	bcs	.L1306
+	.loc 3 1194 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldr	w1, [x0, 72]
+	ldr	w1, [x0, 64]
 	cmp	w1, 32
-	bls	.L1308
-	.loc 3 1193 0
-	str	wzr, [x0, 72]
-	.loc 3 1194 0
+	bls	.L1316
+	.loc 3 1196 0
+	str	wzr, [x0, 64]
+	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1337:
-	.loc 3 1195 0
+.LVL1346:
+	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1338:
-	b	.L1308
-.L1298:
-	.loc 3 1179 0
+.LVL1347:
+	b	.L1316
+.L1306:
+	.loc 3 1182 0
 	mov	w2, 0
 	add	x1, x29, 56
 	mov	w0, w22
 	bl	log2phys
-.LVL1339:
-	.loc 3 1180 0
+.LVL1348:
+	.loc 3 1183 0
 	ldr	w0, [x29, 56]
 	cmn	w0, #1
-	beq	.L1297
-	.loc 3 1181 0
-	ldr	w0, [x21, 72]
-	.loc 3 1183 0
+	beq	.L1305
+	.loc 3 1184 0
+	ldr	w0, [x21, 64]
+	.loc 3 1186 0
 	mov	w2, 1
 	add	x1, x29, 60
-	.loc 3 1181 0
+	.loc 3 1184 0
 	add	w0, w0, 1
-	str	w0, [x21, 72]
-	.loc 3 1182 0
-	ldr	w0, [x20, 2528]
+	str	w0, [x21, 64]
+	.loc 3 1185 0
+	ldr	w0, [x20, 2568]
 	add	w0, w0, 1
-	str	w0, [x20, 2528]
-	.loc 3 1183 0
+	str	w0, [x20, 2568]
+	.loc 3 1186 0
 	mov	w0, w22
 	bl	log2phys
-.LVL1340:
-	.loc 3 1184 0
+.LVL1349:
+	.loc 3 1187 0
 	ldr	w0, [x29, 56]
-.LVL1341:
+.LVL1350:
 	lsr	w0, w0, 10
-.LVL1342:
+.LVL1351:
 	bl	P2V_block_in_plane
-.LVL1343:
-	.loc 3 1185 0
-	bl	decrement_vpc_count
-.LVL1344:
-.L1297:
+.LVL1352:
 	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1353:
+.L1305:
+	.loc 3 1191 0
 	ldrh	w0, [x20, 38]
-	.loc 3 1187 0
+	.loc 3 1190 0
 	add	w22, w22, 1
-	.loc 3 1188 0
+	.loc 3 1191 0
 	sub	w19, w19, w0
-	b	.L1296
-.LVL1345:
-.L1300:
-	.loc 3 1162 0
+	b	.L1304
+.LVL1354:
+.L1308:
+	.loc 3 1165 0
 	mov	w0, -1
-	b	.L1292
+	b	.L1300
 	.cfi_endproc
 .LFE157:
 	.size	FtlDiscard, .-FtlDiscard
@@ -15781,7 +15909,7 @@ FtlGcFreeTempBlock:
 .LFB247:
 	.loc 5 112 0
 	.cfi_startproc
-.LVL1346:
+.LVL1355:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -15808,40 +15936,40 @@ FtlGcFreeTempBlock:
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
 	.loc 5 119 0
-	ldrh	w20, [x2, 2456]
+	ldrh	w20, [x2, 2496]
 	.loc 5 115 0
 	ldrh	w1, [x2, 82]
-.LVL1347:
+.LVL1356:
 	.loc 5 119 0
 	cmp	w20, w3
-	bne	.L1310
-.LVL1348:
-.L1320:
+	bne	.L1318
+.LVL1357:
+.L1328:
 	.loc 5 153 0
 	add	x20, x19, :lo12:.LANCHOR0
 	.loc 5 152 0
-	adrp	x0, .LANCHOR3-88
-.LVL1349:
+	adrp	x0, .LANCHOR3-96
+.LVL1358:
 	.loc 5 153 0
-	add	x21, x20, 2456
+	add	x21, x20, 2496
 	.loc 5 152 0
-	str	wzr, [x0, #:lo12:.LANCHOR3-88]
+	str	wzr, [x0, #:lo12:.LANCHOR3-96]
 	.loc 5 153 0
 	mov	w0, 65535
-	ldrh	w1, [x20, 2456]
-.LVL1350:
+	ldrh	w1, [x20, 2496]
+.LVL1359:
 	cmp	w1, w0
-	bne	.L1333
-.LVL1351:
-.L1336:
+	bne	.L1341
+.LVL1360:
+.L1344:
 	.loc 5 198 0
 	mov	w0, 0
-.L1309:
+.L1317:
 	.loc 5 199 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1352:
+.LVL1361:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
@@ -15857,104 +15985,104 @@ FtlGcFreeTempBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1353:
-.L1310:
+.LVL1362:
+.L1318:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	w0, .L1313
+	cbz	w0, .L1321
 	.loc 5 123 0
 	adrp	x0, .LANCHOR2
-.LVL1354:
+.LVL1363:
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w4, [x0, 4]
 	cmp	w4, w3
-	beq	.L1314
-.L1315:
+	beq	.L1322
+.L1323:
 	.loc 5 122 0
 	mov	w1, 2
-.LVL1355:
-.L1313:
+.LVL1364:
+.L1321:
 	.loc 5 131 0
 	add	x21, x19, :lo12:.LANCHOR0
-	add	x0, x21, 2456
-.LVL1356:
+	add	x0, x21, 2496
+.LVL1365:
 	bl	FtlGcScanTempBlk
-.LVL1357:
+.LVL1366:
 	str	w0, [x29, 92]
-.LVL1358:
+.LVL1367:
 	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1316
+	beq	.L1324
 	.loc 5 135 0
-	ldr	x1, [x21, 2296]
+	ldr	x1, [x21, 2360]
 	ubfiz	x20, x20, 1, 16
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1317
+	bls	.L1325
 	.loc 5 136 0
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1359:
-.L1317:
+.LVL1368:
+.L1325:
 	.loc 5 139 0
 	adrp	x0, .LANCHOR3
 	add	x1, x0, :lo12:.LANCHOR3
 	mov	x20, x0
-	ldr	w1, [x1, -88]
-	cbnz	w1, .L1318
+	ldr	w1, [x1, -96]
+	cbnz	w1, .L1326
 	.loc 5 140 0
 	add	x19, x19, :lo12:.LANCHOR0
-	ldr	w0, [x19, 2808]
+	ldr	w0, [x19, 2792]
 	add	w0, w0, 1
-	str	w0, [x19, 2808]
+	str	w0, [x19, 2792]
 	.loc 5 141 0
 	ldr	w0, [x29, 92]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1360:
+.LVL1369:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1361:
-.L1318:
+.LVL1370:
+.L1326:
 	.loc 5 144 0
 	add	x0, x20, :lo12:.LANCHOR3
-	str	wzr, [x0, -88]
-.L1329:
+	str	wzr, [x0, -96]
+.L1337:
 	.loc 5 149 0
 	mov	w0, 1
-	b	.L1309
-.LVL1362:
-.L1314:
+	b	.L1317
+.LVL1371:
+.L1322:
 	.loc 5 124 0
 	strh	wzr, [x0, 4]
 	.loc 5 125 0
-	ldrh	w0, [x2, 2352]
+	ldrh	w0, [x2, 2392]
 	cmp	w0, 17
-	bhi	.L1315
-	b	.L1313
-.LVL1363:
-.L1316:
+	bhi	.L1323
+	b	.L1321
+.LVL1372:
+.L1324:
 	.loc 5 148 0
 	adrp	x0, .LANCHOR2+4
 	ldrh	w1, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1329
-	b	.L1320
-.L1333:
+	bne	.L1337
+	b	.L1328
+.L1341:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1364:
+.LVL1373:
 	.loc 5 162 0
 	ldrb	w0, [x21, 7]
 	ldrh	w2, [x20, 82]
-	ldrh	w1, [x20, 3296]
+	ldrh	w1, [x20, 3280]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1321
+	beq	.L1329
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
@@ -15963,8 +16091,8 @@ FtlGcFreeTempBlock:
 	add	x1, x1, 624
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1365:
-.L1321:
+.LVL1374:
+.L1329:
 	.loc 5 163 0 is_stmt 1
 	add	x0, x19, :lo12:.LANCHOR0
 	.loc 5 168 0
@@ -15974,141 +16102,141 @@ FtlGcFreeTempBlock:
 	add	x22, x22, 624
 	add	x25, x25, :lo12:.LC1
 	.loc 5 163 0
-	ldrb	w1, [x0, 2463]
+	ldrb	w1, [x0, 2503]
 	.loc 5 165 0
 	mov	w20, 0
-.LVL1366:
+.LVL1375:
 	.loc 5 163 0
 	ldrh	w4, [x0, 82]
-	ldr	x2, [x0, 2320]
-	ldrh	w3, [x0, 2456]
+	ldr	x2, [x0, 2352]
+	ldrh	w3, [x0, 2496]
 	mul	w1, w1, w4
 	strh	w1, [x2, x3, lsl 1]
 	.loc 5 164 0
-	ldr	w2, [x0, 2544]
-	ldrh	w1, [x0, 3296]
+	ldr	w2, [x0, 2584]
+	ldrh	w1, [x0, 3280]
 	add	w1, w1, w2
-	str	w1, [x0, 2544]
-.LVL1367:
-.L1322:
+	str	w1, [x0, 2584]
+.LVL1376:
+.L1330:
 	.loc 5 165 0 discriminator 1
 	add	x21, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x21, 3296]
+	ldrh	w0, [x21, 3280]
 	cmp	w0, w20
-	bhi	.L1326
+	bhi	.L1334
 	.loc 5 181 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1368:
+.LVL1377:
 	.loc 5 182 0
-	ldrh	w0, [x21, 2456]
-	ldr	x2, [x21, 2320]
+	ldrh	w0, [x21, 2496]
+	ldr	x2, [x21, 2352]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1327
+	cbz	w1, .L1335
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1369:
-.L1328:
+.LVL1378:
+.L1336:
 	.loc 5 186 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w20, -1
-.LVL1370:
+.LVL1379:
 	.loc 5 187 0
-	strh	wzr, [x19, 3296]
+	strh	wzr, [x19, 3280]
 	.loc 5 186 0
-	strh	w20, [x19, 2456]
+	strh	w20, [x19, 2496]
 	.loc 5 188 0
-	strh	wzr, [x19, 3284]
+	strh	wzr, [x19, 3268]
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1371:
+.LVL1380:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1372:
+.LVL1381:
 	.loc 5 191 0
-	ldrh	w0, [x19, 2640]
-	ldrh	w1, [x19, 2352]
+	ldrh	w0, [x19, 2628]
+	ldrh	w1, [x19, 2392]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1336
+	ble	.L1344
 	.loc 5 193 0
 	mov	w0, 20
 	.loc 5 192 0
-	strh	w20, [x19, 2664]
+	strh	w20, [x19, 2648]
 	.loc 5 193 0
-	strh	w0, [x19, 3224]
-	b	.L1336
-.LVL1373:
-.L1326:
+	strh	w0, [x19, 3208]
+	b	.L1344
+.LVL1382:
+.L1334:
 	.loc 5 166 0
 	mov	w24, 12
-	ldr	x26, [x21, 3304]
+	ldr	x26, [x21, 3288]
 	.loc 5 168 0
-	ldr	w0, [x21, 2520]
+	ldr	w0, [x21, 2560]
 	.loc 5 166 0
 	umull	x24, w20, w24
 	add	x23, x26, x24
 	.loc 5 168 0
 	ldr	w1, [x23, 8]
 	cmp	w1, w0
-	bcc	.L1323
+	bcc	.L1331
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	mov	w2, 168
 	mov	x1, x22
 	mov	x0, x25
 	bl	printk
-.LVL1374:
-.L1323:
+.LVL1383:
+.L1331:
 	.loc 5 169 0 is_stmt 1
 	ldr	w0, [x23, 8]
 	add	x1, x29, 92
 	mov	w2, 0
 	bl	log2phys
-.LVL1375:
+.LVL1384:
 	.loc 5 170 0
 	ldr	w0, [x26, x24]
 	ldr	w1, [x29, 92]
 	cmp	w0, w1
-	bne	.L1324
+	bne	.L1332
 	.loc 5 171 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1376:
+.LVL1385:
 	mov	w21, w0
 	.loc 5 172 0
 	ldr	w0, [x23, 8]
 	mov	w2, 1
 	add	x1, x23, 4
 	bl	log2phys
-.LVL1377:
+.LVL1386:
 	.loc 5 173 0
 	mov	w0, w21
-.L1335:
+.L1343:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1378:
-.L1325:
+.LVL1387:
+.L1333:
 	.loc 5 165 0 discriminator 2
 	add	w20, w20, 1
-.LVL1379:
+.LVL1388:
 	and	w20, w20, 65535
-.LVL1380:
-	b	.L1322
-.L1324:
+.LVL1389:
+	b	.L1330
+.L1332:
 	.loc 5 175 0
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	beq	.L1325
+	beq	.L1333
 	.loc 5 177 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 2456]
-	b	.L1335
-.L1327:
+	ldrh	w0, [x0, 2496]
+	b	.L1343
+.L1335:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1381:
-	b	.L1328
+.LVL1390:
+	b	.L1336
 	.cfi_endproc
 .LFE247:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
@@ -16131,33 +16259,33 @@ FtlGcPageRecovery:
 	.loc 5 290 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x20, x19, 2456
+	add	x20, x19, 2496
 	mov	x0, x20
 	ldrh	w1, [x19, 82]
 	bl	FtlGcScanTempBlk
-.LVL1382:
+.LVL1391:
 	.loc 5 291 0
-	ldrh	w1, [x19, 2458]
+	ldrh	w1, [x19, 2498]
 	ldrh	w0, [x19, 82]
 	cmp	w1, w0
-	bcc	.L1337
-.LBB282:
-.LBB283:
+	bcc	.L1345
+.LBB310:
+.LBB311:
 	.loc 5 293 0
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
-	sub	x0, x19, #240
+	sub	x0, x19, #248
 	bl	FtlMapBlkWriteDump_data
-.LVL1383:
+.LVL1392:
 	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1384:
+.LVL1393:
 	.loc 5 295 0
-	str	wzr, [x19, -88]
-.L1337:
-.LBE283:
-.LBE282:
+	str	wzr, [x19, -96]
+.L1345:
+.LBE311:
+.LBE310:
 	.loc 5 297 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16175,53 +16303,53 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 .LFB222:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2033 0
-	adrp	x0, .LANCHOR3-76
-	.loc 2 2032 0
+	.loc 2 2082 0
+	adrp	x0, .LANCHOR3-84
+	.loc 2 2081 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 2035 0
+	.loc 2 2084 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 2 2033 0
-	str	wzr, [x0, #:lo12:.LANCHOR3-76]
-	.loc 2 2035 0
-	add	x20, x19, 2360
-	.loc 2 2037 0
-	add	x19, x19, 2408
-	.loc 2 2035 0
+	.loc 2 2082 0
+	str	wzr, [x0, #:lo12:.LANCHOR3-84]
+	.loc 2 2084 0
+	add	x20, x19, 2400
+	.loc 2 2086 0
+	add	x19, x19, 2448
+	.loc 2 2084 0
 	mov	x0, x20
 	bl	FtlRecoverySuperblock
-.LVL1385:
-	.loc 2 2036 0
+.LVL1394:
+	.loc 2 2085 0
 	mov	x0, x20
 	bl	FtlSlcSuperblockCheck
-.LVL1386:
-	.loc 2 2037 0
+.LVL1395:
+	.loc 2 2086 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1387:
-	.loc 2 2038 0
+.LVL1396:
+	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1388:
-	.loc 2 2039 0
+.LVL1397:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1389:
-	.loc 2 2040 0
+.LVL1398:
+	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1390:
-	.loc 2 2042 0
+.LVL1399:
+	.loc 2 2091 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16256,68 +16384,68 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 19, -16
 	.loc 5 320 0
 	add	x19, x11, :lo12:.LANCHOR0
-	ldr	w1, [x19, 3240]
-	ldr	x0, [x19, 3976]
+	ldr	w1, [x19, 3224]
+	ldr	x0, [x19, 3968]
 	bl	FlashProgPages
-.LVL1391:
+.LVL1400:
 	.loc 5 321 0
 	mov	w10, 0
-.LVL1392:
-.L1343:
+.LVL1401:
+.L1351:
 	.loc 5 321 0 is_stmt 0 discriminator 1
-	ldr	w1, [x19, 3240]
+	ldr	w1, [x19, 3224]
 	cmp	w10, w1
-	bcc	.L1346
+	bcc	.L1354
 	.loc 5 335 0 is_stmt 1
-	ldr	x0, [x19, 3976]
+	ldr	x0, [x19, 3968]
 	bl	FtlGcBufFree
-.LVL1393:
+.LVL1402:
 	.loc 5 336 0
-	str	wzr, [x19, 3240]
+	str	wzr, [x19, 3224]
 	.loc 5 337 0
-	ldrh	w0, [x19, 2460]
-	cbnz	w0, .L1347
+	ldrh	w0, [x19, 2500]
+	cbnz	w0, .L1355
 	.loc 5 338 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1394:
-	b	.L1349
-.LVL1395:
-.L1346:
+.LVL1403:
+	b	.L1357
+.LVL1404:
+.L1354:
 	.loc 5 322 0
-	ldr	x0, [x19, 3976]
+	ldr	x0, [x19, 3968]
 	ubfiz	x1, x10, 5, 16
 	add	x3, x0, x1
 	ldr	w0, [x0, x1]
 	cmn	w0, #1
-	bne	.L1344
+	bne	.L1352
 	.loc 5 323 0
-	ldrh	w3, [x19, 2456]
-	ldr	x2, [x19, 2320]
+	ldrh	w3, [x19, 2496]
+	ldr	x2, [x19, 2352]
 	strh	wzr, [x2, x3, lsl 1]
 	.loc 5 324 0
-	strh	w0, [x19, 2456]
+	strh	w0, [x19, 2496]
 	.loc 5 325 0
-	ldr	w0, [x19, 2808]
+	ldr	w0, [x19, 2792]
 	add	w0, w0, 1
-	str	w0, [x19, 2808]
+	str	w0, [x19, 2792]
 	.loc 5 326 0
-	ldr	x0, [x19, 3976]
+	ldr	x0, [x19, 3968]
 	add	x0, x0, x1
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1396:
+.LVL1405:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1397:
+.LVL1406:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1398:
-.L1349:
+.LVL1407:
+.L1357:
 	.loc 5 339 0
 	mov	w0, 1
-.L1342:
+.L1350:
 	.loc 5 342 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16327,29 +16455,29 @@ Ftl_gc_temp_data_write_back:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1399:
-.L1344:
+.LVL1408:
+.L1352:
 	.cfi_restore_state
 	.loc 5 331 0 discriminator 2
 	ldr	x0, [x3, 16]
-.LVL1400:
+.LVL1409:
 	.loc 5 332 0 discriminator 2
 	ldr	w1, [x3, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1401:
+.LVL1410:
 	bl	FtlGcUpdatePage
-.LVL1402:
+.LVL1411:
 	.loc 5 321 0 discriminator 2
 	add	w10, w10, 1
-.LVL1403:
+.LVL1412:
 	and	w10, w10, 65535
-.LVL1404:
-	b	.L1343
-.LVL1405:
-.L1347:
+.LVL1413:
+	b	.L1351
+.LVL1414:
+.L1355:
 	.loc 5 341 0
 	mov	w0, 0
-	b	.L1342
+	b	.L1350
 	.cfi_endproc
 .LFE252:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -16372,50 +16500,50 @@ Ftl_get_new_temp_ppa:
 	.loc 5 301 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	add	x1, x0, 2456
-	ldrh	w2, [x0, 2456]
+	add	x1, x0, 2496
+	ldrh	w2, [x0, 2496]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L1351
+	beq	.L1359
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1352
-.L1351:
+	cbnz	w0, .L1360
+.L1359:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1406:
+.LVL1415:
 	.loc 5 304 0
 	add	x20, x19, :lo12:.LANCHOR0
 	.loc 5 303 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1407:
+.LVL1416:
 	.loc 5 304 0
-	add	x0, x20, 2456
+	add	x0, x20, 2496
 	strb	wzr, [x0, 8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1408:
+.LVL1417:
 	.loc 5 306 0
-	strh	wzr, [x20, 3284]
+	strh	wzr, [x20, 3268]
 	.loc 5 307 0
-	strh	wzr, [x20, 3296]
+	strh	wzr, [x20, 3280]
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1409:
+.LVL1418:
 	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1410:
+.LVL1419:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1411:
-.L1352:
+.LVL1420:
+.L1360:
 	.loc 5 312 0
 	add	x0, x19, :lo12:.LANCHOR0
-	add	x0, x0, 2456
+	add	x0, x0, 2496
 	bl	get_new_active_ppa
-.LVL1412:
+.LVL1421:
 	.loc 5 313 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16435,7 +16563,7 @@ rk_ftl_garbage_collect:
 .LFB258:
 	.loc 5 470 0
 	.cfi_startproc
-.LVL1413:
+.LVL1422:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -16448,7 +16576,7 @@ rk_ftl_garbage_collect:
 	.loc 5 478 0
 	adrp	x19, .LANCHOR0
 	add	x1, x19, :lo12:.LANCHOR0
-.LVL1414:
+.LVL1423:
 	.loc 5 470 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -16463,230 +16591,230 @@ rk_ftl_garbage_collect:
 	.cfi_offset 27, -48
 	.cfi_offset 28, -40
 	.loc 5 478 0
-	ldr	w2, [x1, 3952]
-	cbnz	w2, .L1426
+	ldr	w2, [x1, 3944]
+	cbnz	w2, .L1434
 	.loc 5 481 0
-	ldrh	w2, [x1, 2336]
+	ldrh	w2, [x1, 2376]
 	cmp	w2, 47
-	bls	.L1426
+	bls	.L1434
 	mov	w23, w0
 	.loc 5 485 0
 	adrp	x0, .LANCHOR2+4
-.LVL1415:
+.LVL1424:
 	ldrh	w2, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1356
-.L1359:
-.LBB287:
-.LBB288:
+	bne	.L1364
+.L1367:
+.LBB315:
+.LBB316:
 	.loc 5 489 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
-	ldrh	w1, [x0, 3314]
+	ldrh	w1, [x0, 3298]
 	cmp	w1, w2
-	bne	.L1357
-.L1358:
+	bne	.L1365
+.L1366:
 	.loc 5 496 0
 	add	x21, x19, :lo12:.LANCHOR0
 	.loc 5 497 0
 	mov	w20, 65535
 	.loc 5 496 0
-	ldr	w1, [x21, 3228]
+	ldr	w1, [x21, 3212]
 	.loc 5 497 0
-	ldrh	w0, [x21, 2664]
+	ldrh	w0, [x21, 2648]
 	.loc 5 496 0
 	add	w1, w1, 1
 	add	w1, w1, w23, lsl 7
-	str	w1, [x21, 3228]
+	str	w1, [x21, 3212]
 	.loc 5 497 0
 	cmp	w0, w20
-	bne	.L1360
-	ldrh	w20, [x21, 2456]
+	bne	.L1368
+	ldrh	w20, [x21, 2496]
 	cmp	w20, w0
-	bne	.L1429
-	ldrh	w22, [x21, 3312]
+	bne	.L1437
+	ldrh	w22, [x21, 3296]
 	cmp	w22, w20
-	bne	.L1360
+	bne	.L1368
 	.loc 5 498 0
-	ldrh	w0, [x21, 2352]
+	ldrh	w0, [x21, 2392]
 	mov	w2, 1024
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L1432
-.LBB289:
+	bls	.L1440
+.LBB317:
 	.loc 5 502 0
-	adrp	x0, .LANCHOR3+76
+	adrp	x0, .LANCHOR3+68
 	.loc 5 501 0
-	str	wzr, [x21, 3228]
+	str	wzr, [x21, 3212]
 	.loc 5 502 0
-	strh	wzr, [x0, #:lo12:.LANCHOR3+76]
+	strh	wzr, [x0, #:lo12:.LANCHOR3+68]
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1416:
+.LVL1425:
 	and	w20, w0, 65535
 	.loc 5 504 0
 	cmp	w20, w22
-	bne	.L1433
+	bne	.L1441
 	.loc 5 505 0
-	ldrh	w1, [x21, 2352]
-	ldrh	w0, [x21, 3226]
+	ldrh	w1, [x21, 2392]
+	ldrh	w0, [x21, 3210]
 	cmp	w1, w0
-	bcs	.L1363
+	bcs	.L1371
 	.loc 5 506 0
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1417:
+.LVL1426:
 	and	w0, w0, 65535
-.LVL1418:
+.LVL1427:
 	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1365
+	beq	.L1373
 	.loc 5 508 0
-	ldr	x1, [x21, 2320]
+	ldr	x1, [x21, 2352]
 	ubfiz	x0, x0, 1, 16
-.LVL1419:
+.LVL1428:
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1366
+	bhi	.L1374
 	.loc 5 509 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1420:
+.LVL1429:
 	and	w22, w0, 65535
 	.loc 5 510 0
 	mov	w0, 128
-	strh	w0, [x21, 3226]
+	strh	w0, [x21, 3210]
 	.loc 5 520 0
 	cmp	w22, w20
-	beq	.L1365
-.L1362:
+	beq	.L1373
+.L1370:
 	.loc 5 521 0
 	add	x0, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x22, 1, 32
 	mov	w20, w22
-	ldr	x3, [x0, 2296]
-	ldr	x2, [x0, 2320]
-	ldrh	w5, [x0, 3224]
+	ldr	x2, [x0, 2352]
+	ldr	x3, [x0, 2360]
+	ldrh	w5, [x0, 3208]
 	ldrh	w4, [x3, x1]
 	ldrh	w3, [x2, x1]
 	mov	w1, w22
-	ldrh	w2, [x0, 2352]
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	ldrh	w2, [x0, 2392]
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	printk
-.LVL1421:
-	b	.L1365
-.L1356:
-.LBE289:
-.LBE288:
-.LBE287:
+.LVL1430:
+	b	.L1373
+.L1364:
+.LBE317:
+.LBE316:
+.LBE315:
 	.loc 5 485 0 discriminator 1
-	ldrh	w1, [x1, 2456]
+	ldrh	w1, [x1, 2496]
 	cmp	w1, w0
-	beq	.L1359
+	beq	.L1367
 	.loc 5 486 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1422:
-	cbz	w0, .L1359
+.LVL1431:
+	cbz	w0, .L1367
 	.loc 5 487 0
 	mov	w0, 1
-	b	.L1354
-.L1357:
-.LBB294:
-.LBB292:
+	b	.L1362
+.L1365:
+.LBB322:
+.LBB320:
 	.loc 5 489 0
-	ldrh	w3, [x0, 3312]
+	ldrh	w3, [x0, 3296]
 	cmp	w3, w2
-	bne	.L1358
+	bne	.L1366
 	.loc 5 490 0
-	strh	w1, [x0, 3312]
+	strh	w1, [x0, 3296]
 	.loc 5 491 0
 	mov	w1, -1
-	strh	w1, [x0, 3314]
-	b	.L1358
-.L1366:
-.LBB290:
+	strh	w1, [x0, 3298]
+	b	.L1366
+.L1374:
+.LBB318:
 	.loc 5 512 0
 	mov	w0, 64
-.L1458:
+.L1466:
 	.loc 5 516 0
-	strh	w0, [x21, 3226]
-.LVL1423:
-.L1365:
+	strh	w0, [x21, 3210]
+.LVL1432:
+.L1373:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1424:
-.L1360:
-.LBE290:
+.LVL1433:
+.L1368:
+.LBE318:
 	.loc 5 527 0
 	cmp	w23, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1368
+	bne	.L1376
 	.loc 5 528 0
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2352]
+	ldrh	w0, [x1, 2392]
 	cmp	w0, 24
-	bhi	.L1434
+	bhi	.L1442
 	.loc 5 530 0
 	cmp	w0, 16
 	ldrh	w21, [x1, 82]
-	bls	.L1370
+	bls	.L1378
 	.loc 5 531 0
 	lsr	w21, w21, 5
-.LVL1425:
-.L1369:
+.LVL1434:
+.L1377:
 	.loc 5 539 0
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w2, [x1, 3224]
+	ldrh	w2, [x1, 3208]
 	cmp	w2, w0
-	bcs	.L1373
+	bcs	.L1381
 	.loc 5 540 0
-	ldrh	w0, [x1, 2456]
+	ldrh	w0, [x1, 2496]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1374
-	ldrh	w2, [x1, 3312]
+	bne	.L1382
+	ldrh	w2, [x1, 3296]
 	cmp	w2, w0
-	bne	.L1374
+	bne	.L1382
 	.loc 5 542 0
-	adrp	x0, .LANCHOR3+76
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+76]
-	cbnz	w0, .L1375
-	ldr	w2, [x1, 2520]
-	ldr	w3, [x1, 2516]
+	adrp	x0, .LANCHOR3+68
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+68]
+	cbnz	w0, .L1383
+	ldr	w2, [x1, 2560]
+	ldr	w3, [x1, 2556]
 	add	w2, w2, w2, lsl 1
 	cmp	w3, w2, lsr 2
-	bcs	.L1376
-.L1375:
+	bcs	.L1384
+.L1383:
 	.loc 5 543 0
 	add	x2, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x2, 2640]
+	ldrh	w1, [x2, 2628]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x2, 3224]
-.L1377:
+	strh	w1, [x2, 3208]
+.L1385:
 	.loc 5 546 0
 	add	x19, x19, :lo12:.LANCHOR0
-	str	wzr, [x19, 3236]
-.LVL1426:
-.L1354:
-.LBE292:
-.LBE294:
-	.loc 5 758 0
+	str	wzr, [x19, 3220]
+.LVL1435:
+.L1362:
+.LBE320:
+.LBE322:
+	.loc 5 754 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1427:
+.LVL1436:
 	ldp	x23, x24, [sp, 48]
-.LVL1428:
+.LVL1437:
 	ldp	x25, x26, [sp, 64]
-.LVL1429:
+.LVL1438:
 	ldp	x27, x28, [sp, 80]
-.LVL1430:
+.LVL1439:
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
 	.cfi_restore 30
@@ -16703,254 +16831,254 @@ rk_ftl_garbage_collect:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1431:
-.L1363:
+.LVL1440:
+.L1371:
 	.cfi_restore_state
-.LBB295:
-.LBB293:
-.LBB291:
+.LBB323:
+.LBB321:
+.LBB319:
 	.loc 5 516 0
 	mov	w0, 80
-	b	.L1458
-.L1433:
+	b	.L1466
+.L1441:
 	.loc 5 504 0
 	mov	w22, w20
-	b	.L1362
-.L1429:
-.LBE291:
+	b	.L1370
+.L1437:
+.LBE319:
 	.loc 5 473 0
 	mov	w20, w0
-	b	.L1360
-.L1432:
+	b	.L1368
+.L1440:
 	mov	w20, w22
-	b	.L1360
-.L1370:
+	b	.L1368
+.L1378:
 	.loc 5 532 0
 	cmp	w0, 12
-	bls	.L1371
+	bls	.L1379
 	.loc 5 533 0
 	lsr	w21, w21, 4
-.LVL1432:
-	b	.L1369
-.LVL1433:
-.L1371:
+.LVL1441:
+	b	.L1377
+.LVL1442:
+.L1379:
 	.loc 5 535 0
 	mov	w1, w21
 	cmp	w0, 9
 	lsr	w21, w21, 2
 	csel	w21, w21, w1, cs
-.LVL1434:
-	b	.L1369
-.LVL1435:
-.L1434:
+.LVL1443:
+	b	.L1377
+.LVL1444:
+.L1442:
 	.loc 5 529 0
 	mov	w21, 1
-.LVL1436:
-	b	.L1369
-.L1376:
+.LVL1445:
+	b	.L1377
+.L1384:
 	.loc 5 545 0
 	mov	w2, 18
-	strh	w2, [x1, 3224]
-	b	.L1377
-.L1374:
+	strh	w2, [x1, 3208]
+	b	.L1385
+.L1382:
 	.loc 5 549 0
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2640]
+	ldrh	w0, [x1, 2628]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, 3224]
-.L1373:
+	strh	w0, [x1, 3208]
+.L1381:
 	.loc 5 551 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 3316]
-	cbz	w0, .L1435
+	ldrh	w0, [x0, 3300]
+	cbz	w0, .L1443
 	.loc 5 552 0
 	add	w21, w21, 32
-.LVL1437:
+.LVL1446:
 	and	w21, w21, 65535
-.LVL1438:
-.L1435:
+.LVL1447:
+.L1443:
 	.loc 5 551 0
 	mov	w20, 65535
-.L1379:
-	.loc 5 597 0
+.L1387:
+	.loc 5 595 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
-	ldrh	w1, [x0, 2664]
+	ldrh	w1, [x0, 2648]
 	cmp	w1, w2
-	bne	.L1388
-	.loc 5 598 0
+	bne	.L1396
+	.loc 5 596 0
 	cmp	w20, w1
-	beq	.L1389
-	.loc 5 599 0
-	strh	w20, [x0, 2664]
-.L1390:
-	.loc 5 610 0
+	beq	.L1397
+	.loc 5 597 0
+	strh	w20, [x0, 2648]
+.L1398:
+	.loc 5 606 0
 	add	x5, x19, :lo12:.LANCHOR0
-	.loc 5 611 0
+	.loc 5 607 0
 	mov	w1, 65535
-	ldrh	w0, [x5, 2664]
-	.loc 5 610 0
-	strb	wzr, [x5, 2672]
-	.loc 5 611 0
+	ldrh	w0, [x5, 2648]
+	.loc 5 606 0
+	strb	wzr, [x5, 2656]
+	.loc 5 607 0
 	cmp	w0, w1
-	beq	.L1388
-	.loc 5 612 0
+	beq	.L1396
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1439:
-	cbz	w0, .L1393
-	.loc 5 613 0
+.LVL1448:
+	cbz	w0, .L1401
+	.loc 5 609 0
 	mov	w0, -1
-	strh	w0, [x5, 2664]
-.L1393:
-	.loc 5 615 0
+	strh	w0, [x5, 2648]
+.L1401:
+	.loc 5 611 0
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
-	add	x23, x22, 2664
-.LVL1440:
-	ldrh	w1, [x22, 2664]
+	add	x23, x22, 2648
+.LVL1449:
+	ldrh	w1, [x22, 2648]
 	cmp	w1, w0
-	beq	.L1388
-	.loc 5 616 0
+	beq	.L1396
+	.loc 5 612 0
 	mov	x0, x23
 	bl	make_superblock
-.LVL1441:
-	.loc 5 619 0
+.LVL1450:
+	.loc 5 615 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 5 620 0
-	ldrh	w2, [x22, 2664]
-	ldr	x1, [x22, 2320]
-	.loc 5 617 0
-	strh	wzr, [x22, 2666]
-	.loc 5 618 0
-	strb	wzr, [x22, 2670]
-	.loc 5 619 0
-	strh	wzr, [x0, 78]
-	.loc 5 620 0
+	.loc 5 616 0
+	ldrh	w2, [x22, 2648]
+	ldr	x1, [x22, 2352]
+	.loc 5 613 0
+	strh	wzr, [x22, 2650]
+	.loc 5 614 0
+	strb	wzr, [x22, 2654]
+	.loc 5 615 0
+	strh	wzr, [x0, 70]
+	.loc 5 616 0
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 80]
-.LVL1442:
-.L1388:
-	.loc 5 625 0
+	strh	w1, [x0, 72]
+.LVL1451:
+.L1396:
+	.loc 5 621 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2664]
-	ldrh	w2, [x0, 2360]
+	ldrh	w1, [x0, 2648]
+	ldrh	w2, [x0, 2400]
 	cmp	w2, w1
-	beq	.L1394
-	ldrh	w0, [x0, 2408]
+	beq	.L1402
+	ldrh	w0, [x0, 2448]
 	cmp	w0, w1
-	beq	.L1394
-	.loc 5 664 0
+	beq	.L1402
+	.loc 5 660 0
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x24, x24, 648
-.LVL1443:
-.L1395:
-	.loc 5 631 0
+.LVL1452:
+.L1403:
+	.loc 5 627 0
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
-	ldrh	w23, [x22, 2664]
-.LVL1444:
+	ldrh	w23, [x22, 2648]
+.LVL1453:
 	cmp	w23, w0
-	bne	.L1396
-	.loc 5 645 0
+	bne	.L1404
+	.loc 5 641 0
 	mov	w25, 2
-	.loc 5 632 0
-	str	wzr, [x22, 3236]
-.L1397:
-	.loc 5 635 0
-	ldrh	w5, [x22, 3232]
+	.loc 5 628 0
+	str	wzr, [x22, 3220]
+.L1405:
+	.loc 5 631 0
+	ldrh	w5, [x22, 3216]
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1445:
+.LVL1454:
 	and	w6, w0, 65535
-	strh	w6, [x22, 2664]
-	.loc 5 636 0
+	strh	w6, [x22, 2648]
+	.loc 5 632 0
 	cmp	w6, w23
-	bne	.L1398
-	.loc 5 637 0
-	strh	wzr, [x22, 3232]
-	.loc 5 638 0
+	bne	.L1406
+	.loc 5 633 0
+	strh	wzr, [x22, 3216]
+	.loc 5 634 0
 	mov	w0, 8
-	b	.L1354
-.LVL1446:
-.L1368:
+	b	.L1362
+.LVL1455:
+.L1376:
 	.loc 5 557 0
 	add	x5, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x5, 2456]
+	ldrh	w1, [x5, 2496]
 	cmp	w1, w0
-	bne	.L1438
-	ldrh	w0, [x5, 3312]
+	bne	.L1446
+	ldrh	w0, [x5, 3296]
 	cmp	w0, w1
-	bne	.L1438
+	bne	.L1446
 	cmp	w20, w0
-	bne	.L1438
-	ldrh	w0, [x5, 2664]
+	bne	.L1446
+	ldrh	w0, [x5, 2648]
 	cmp	w0, w20
-	beq	.L1380
-.L1438:
+	beq	.L1388
+.L1446:
 	.loc 5 556 0
 	mov	w21, 1
-.LVL1447:
-	b	.L1379
-.LVL1448:
-.L1380:
+.LVL1456:
+	b	.L1387
+.LVL1457:
+.L1388:
 	.loc 5 560 0
-	ldrh	w7, [x5, 2352]
+	ldrh	w7, [x5, 2392]
 	adrp	x21, .LANCHOR3
-	ldrh	w0, [x5, 3224]
+	ldrh	w0, [x5, 3208]
 	.loc 5 558 0
-	str	wzr, [x5, 3236]
+	str	wzr, [x5, 3220]
 	.loc 5 560 0
 	cmp	w0, w7
-	bcs	.L1381
+	bcs	.L1389
 	.loc 5 561 0
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 76]
-	cbnz	w0, .L1382
-	ldr	w0, [x5, 2520]
-	ldr	w1, [x5, 2516]
+	ldrh	w0, [x0, 68]
+	cbnz	w0, .L1390
+	ldr	w0, [x5, 2560]
+	ldr	w1, [x5, 2556]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1383
-.L1382:
+	bcs	.L1391
+.L1390:
 	.loc 5 562 0
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x19, 2640]
+	ldrh	w0, [x19, 2628]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x19, 3224]
-.L1384:
+	strh	w0, [x19, 3208]
+.L1392:
 	.loc 5 566 0
 	bl	FtlReadRefresh
-.LVL1449:
-.L1459:
-	.loc 5 734 0
+.LVL1458:
+.L1467:
+	.loc 5 730 0
 	add	x21, x21, :lo12:.LANCHOR3
-	b	.L1460
-.LVL1450:
-.L1383:
+	b	.L1468
+.LVL1459:
+.L1391:
 	.loc 5 564 0
 	mov	w0, 18
-	strh	w0, [x5, 3224]
-	b	.L1384
-.L1381:
+	strh	w0, [x5, 3208]
+	b	.L1392
+.L1389:
 	.loc 5 572 0
 	add	x21, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x21, 76]
-	cbnz	w0, .L1438
+	ldrh	w0, [x21, 68]
+	cbnz	w0, .L1446
 	.loc 5 573 0
-	ldrh	w6, [x5, 2640]
+	ldrh	w6, [x5, 2628]
 	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x5, 3224]
+	strh	w0, [x5, 3208]
 	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1451:
+.LVL1460:
 	.loc 5 575 0
-	ldr	x1, [x5, 2320]
+	ldr	x1, [x5, 2352]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x5, 12]
 	ldrh	w1, [x1, x0]
@@ -16959,507 +17087,507 @@ rk_ftl_garbage_collect:
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L1386
+	ble	.L1394
 	.loc 5 576 0
 	sub	w6, w6, #1
 	.loc 5 575 0
 	cmp	w7, w6
-	blt	.L1386
+	blt	.L1394
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1452:
-.L1460:
-	.loc 5 734 0
-	ldrh	w0, [x21, 76]
-	b	.L1354
-.LVL1453:
-.L1386:
+.LVL1461:
+.L1468:
+	.loc 5 730 0
+	ldrh	w0, [x21, 68]
+	b	.L1362
+.LVL1462:
+.L1394:
 	.loc 5 584 0
-	cbnz	w1, .L1438
+	cbnz	w1, .L1446
 	.loc 5 586 0
 	add	x19, x19, :lo12:.LANCHOR0
 	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1454:
+.LVL1463:
 	.loc 5 586 0
-	ldrh	w0, [x19, 2352]
+	ldrh	w0, [x19, 2392]
 	add	w0, w0, 1
-	b	.L1354
-.LVL1455:
-.L1389:
-	.loc 5 600 0
-	ldrh	w1, [x0, 3312]
+	b	.L1362
+.LVL1464:
+.L1397:
+	.loc 5 598 0
+	ldrh	w1, [x0, 3296]
 	cmp	w1, w20
-	beq	.L1390
-	.loc 5 604 0
-	ldr	x2, [x0, 2320]
+	beq	.L1398
+	.loc 5 600 0
+	ldr	x2, [x0, 2352]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1391
-	.loc 5 605 0
+	cbnz	w1, .L1399
+	.loc 5 601 0
 	mov	w1, -1
-	strh	w1, [x0, 3312]
-.L1391:
-	.loc 5 606 0
+	strh	w1, [x0, 3296]
+.L1399:
+	.loc 5 602 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3312]
-	strh	w1, [x0, 2664]
-	.loc 5 607 0
+	ldrh	w1, [x0, 3296]
+	strh	w1, [x0, 2648]
+	.loc 5 603 0
 	mov	w1, -1
-	strh	w1, [x0, 3312]
-	b	.L1390
-.L1394:
-	.loc 5 626 0
+	strh	w1, [x0, 3296]
+	b	.L1398
+.L1402:
+	.loc 5 622 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
-	strh	w0, [x19, 2664]
-.LVL1456:
-.L1461:
-	.loc 5 652 0
-	adrp	x0, .LANCHOR3+76
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+76]
-	b	.L1354
-.LVL1457:
-.L1398:
-	.loc 5 640 0
+	strh	w0, [x19, 2648]
+.LVL1465:
+.L1469:
+	.loc 5 648 0
+	adrp	x0, .LANCHOR3+68
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+68]
+	b	.L1362
+.LVL1466:
+.L1406:
+	.loc 5 636 0
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1458:
+.LVL1467:
 	add	w5, w5, 1
-	cbz	w0, .L1399
+	cbz	w0, .L1407
+	.loc 5 637 0
+	strh	w5, [x22, 3216]
+	b	.L1405
+.L1407:
 	.loc 5 641 0
-	strh	w5, [x22, 3232]
-	b	.L1397
-.L1399:
-	.loc 5 645 0
 	ldrh	w4, [x22, 12]
 	ubfiz	x1, x6, 1, 16
 	ldrh	w0, [x22, 82]
-	.loc 5 644 0
+	.loc 5 640 0
 	and	w5, w5, 65535
-	.loc 5 645 0
-	ldr	x2, [x22, 2320]
-	.loc 5 644 0
-	strh	w5, [x22, 3232]
-	.loc 5 645 0
+	.loc 5 641 0
+	ldr	x2, [x22, 2352]
+	.loc 5 640 0
+	strh	w5, [x22, 3216]
+	.loc 5 641 0
 	mul	w0, w0, w4
 	ldrh	w3, [x2, x1]
 	sdiv	w4, w0, w25
 	cmp	w3, w4
-	bgt	.L1401
-	.loc 5 646 0
+	bgt	.L1409
+	.loc 5 642 0
 	cmp	w5, 48
-	bls	.L1402
+	bls	.L1410
 	cmp	w3, 8
-	bls	.L1402
-	ldrh	w3, [x22, 3284]
+	bls	.L1410
+	ldrh	w3, [x22, 3268]
 	cmp	w3, 35
-	bhi	.L1402
-.L1401:
-	.loc 5 647 0
-	strh	wzr, [x22, 3232]
-.L1402:
-	.loc 5 649 0
+	bhi	.L1410
+.L1409:
+	.loc 5 643 0
+	strh	wzr, [x22, 3216]
+.L1410:
+	.loc 5 645 0
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1403
+	bgt	.L1411
 	cmp	w20, w23
-	bne	.L1403
-	.loc 5 650 0
+	bne	.L1411
+	.loc 5 646 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
+	.loc 5 647 0
+	strh	wzr, [x19, 3216]
+	.loc 5 646 0
+	strh	w0, [x19, 2648]
+	b	.L1469
+.L1411:
 	.loc 5 651 0
-	strh	wzr, [x19, 3232]
-	.loc 5 650 0
-	strh	w0, [x19, 2664]
-	b	.L1461
-.L1403:
-	.loc 5 655 0
-	cbnz	w1, .L1404
-	.loc 5 656 0
+	cbnz	w1, .L1412
+	.loc 5 652 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1459:
-	.loc 5 657 0
-	ldrh	w0, [x22, 3232]
+.LVL1468:
+	.loc 5 653 0
+	ldrh	w0, [x22, 3216]
 	add	w0, w0, 1
-	strh	w0, [x22, 3232]
-	b	.L1397
-.L1404:
-	.loc 5 660 0
+	strh	w0, [x22, 3216]
+	b	.L1405
+.L1412:
+	.loc 5 656 0
 	add	x0, x19, :lo12:.LANCHOR0
-	strb	wzr, [x0, 2672]
-	.loc 5 662 0
-	ldrh	w0, [x0, 2360]
+	strb	wzr, [x0, 2656]
+	.loc 5 658 0
+	ldrh	w0, [x0, 2400]
 	cmp	w0, w6
-	bne	.L1405
+	bne	.L1413
 	adrp	x0, .LC1
-	mov	w2, 662
+	mov	w2, 658
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1460:
-.L1405:
-	.loc 5 663 0
+.LVL1469:
+.L1413:
+	.loc 5 659 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2664]
-	ldrh	w0, [x0, 2408]
+	ldrh	w1, [x0, 2648]
+	ldrh	w0, [x0, 2448]
 	cmp	w1, w0
-	bne	.L1406
+	bne	.L1414
 	adrp	x0, .LC1
-	mov	w2, 663
+	mov	w2, 659
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1461:
-.L1406:
-	.loc 5 664 0
+.LVL1470:
+.L1414:
+	.loc 5 660 0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2664]
-	ldrh	w0, [x0, 2456]
+	ldrh	w1, [x0, 2648]
+	ldrh	w0, [x0, 2496]
 	cmp	w1, w0
-	bne	.L1407
+	bne	.L1415
 	adrp	x0, .LC1
-	mov	w2, 664
+	mov	w2, 660
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1462:
-.L1407:
-	.loc 5 665 0
+.LVL1471:
+.L1415:
+	.loc 5 661 0
 	add	x23, x19, :lo12:.LANCHOR0
-	add	x22, x23, 2664
+	add	x22, x23, 2648
 	mov	x0, x22
 	bl	make_superblock
-.LVL1463:
-	.loc 5 666 0
+.LVL1472:
+	.loc 5 662 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 5 667 0
-	ldrh	w2, [x23, 2664]
-	ldr	x1, [x23, 2320]
-	.loc 5 666 0
-	strh	wzr, [x0, 78]
-	.loc 5 667 0
+	.loc 5 663 0
+	ldrh	w2, [x23, 2648]
+	ldr	x1, [x23, 2352]
+	.loc 5 662 0
+	strh	wzr, [x0, 70]
+	.loc 5 663 0
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 80]
-	.loc 5 668 0
-	strh	wzr, [x23, 2666]
-	.loc 5 669 0
-	strb	wzr, [x23, 2670]
-.L1396:
-	.loc 5 675 0
+	strh	w1, [x0, 72]
+	.loc 5 664 0
+	strh	wzr, [x23, 2650]
+	.loc 5 665 0
+	strb	wzr, [x23, 2654]
+.L1404:
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1464:
-	.loc 5 678 0
+.LVL1473:
+	.loc 5 674 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 1
-	.loc 5 679 0
+	.loc 5 675 0
 	ldrh	w26, [x0, 82]
-	.loc 5 678 0
-	str	w1, [x0, 3952]
-	.loc 5 680 0
-	ldrh	w0, [x0, 2666]
+	.loc 5 674 0
+	str	w1, [x0, 3944]
+	.loc 5 676 0
+	ldrh	w0, [x0, 2650]
 	add	w1, w0, w21
 	cmp	w1, w26
-	ble	.L1408
-	.loc 5 681 0
+	ble	.L1416
+	.loc 5 677 0
 	sub	w21, w26, w0
-.LVL1465:
+.LVL1474:
 	and	w21, w21, 65535
-.LVL1466:
-.L1408:
-	.loc 5 693 0
+.LVL1475:
+.L1416:
+	.loc 5 689 0
 	mov	w25, 0
-.LVL1467:
-.L1409:
-	.loc 5 683 0
+.LVL1476:
+.L1417:
+	.loc 5 679 0
 	cmp	w21, w25, uxth
-	bls	.L1417
-	.loc 5 685 0
+	bls	.L1425
+	.loc 5 681 0
 	add	x0, x19, :lo12:.LANCHOR0
-	.loc 5 688 0
+	.loc 5 684 0
 	mov	w23, 0
-.LVL1468:
-	add	x3, x0, 2680
+.LVL1477:
+	add	x3, x0, 2664
 	mov	w1, 0
-.LVL1469:
-	.loc 5 687 0
+.LVL1478:
+	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 688 0
-	ldrh	w4, [x0, 2666]
-	.loc 5 685 0
+	.loc 5 684 0
+	ldrh	w4, [x0, 2650]
+	.loc 5 681 0
 	ldrh	w7, [x0, 12]
-	.loc 5 688 0
+	.loc 5 684 0
 	add	w4, w4, w25
-	b	.L1418
-.LVL1470:
-.L1411:
-	.loc 5 686 0
+	b	.L1426
+.LVL1479:
+.L1419:
+	.loc 5 682 0
 	ldrh	w2, [x3]
-	.loc 5 687 0
+	.loc 5 683 0
 	cmp	w2, w6
-	beq	.L1410
-	.loc 5 688 0
-	ldr	x5, [x0, 3272]
+	beq	.L1418
+	.loc 5 684 0
+	ldr	x5, [x0, 3256]
 	ubfiz	x8, x23, 5, 16
-	.loc 5 689 0
+	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1471:
-	.loc 5 688 0
+.LVL1480:
+	.loc 5 684 0
 	orr	w2, w4, w2, lsl 10
-.LVL1472:
+.LVL1481:
 	add	x5, x5, x8
-	.loc 5 689 0
+	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1473:
-	.loc 5 688 0
+.LVL1482:
+	.loc 5 684 0
 	str	w2, [x5, 4]
-.LVL1474:
-.L1410:
-	.loc 5 685 0
+.LVL1483:
+.L1418:
+	.loc 5 681 0
 	add	w1, w1, 1
-.LVL1475:
+.LVL1484:
 	add	x3, x3, 2
 	and	w1, w1, 65535
-.LVL1476:
-.L1418:
+.LVL1485:
+.L1426:
 	cmp	w1, w7
-	bne	.L1411
-	.loc 5 693 0
+	bne	.L1419
+	.loc 5 689 0
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w1, w23
-.LVL1477:
+.LVL1486:
 	mov	x27, 0
-	ldrb	w2, [x22, 2672]
-.LVL1478:
-	ldr	x0, [x22, 3272]
+	ldrb	w2, [x22, 2656]
+.LVL1487:
+	ldr	x0, [x22, 3256]
 	bl	FlashReadPages
-.LVL1479:
+.LVL1488:
 	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 104]
-.LVL1480:
-.L1412:
-	.loc 5 695 0
+.LVL1489:
+.L1420:
+	.loc 5 691 0
 	ldr	x0, [x29, 104]
 	cmp	x27, x0
-	bne	.L1416
+	bne	.L1424
 	add	w25, w25, 1
-	b	.L1409
-.L1416:
-	.loc 5 696 0
-	ldr	x0, [x22, 3272]
+	b	.L1417
+.L1424:
+	.loc 5 692 0
+	ldr	x0, [x22, 3256]
 	add	x1, x0, x27
-	.loc 5 697 0
+	.loc 5 693 0
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	beq	.L1413
-	.loc 5 696 0
+	beq	.L1421
+	.loc 5 692 0
 	ldr	x23, [x1, 16]
-.LVL1481:
-	.loc 5 697 0
+.LVL1490:
+	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1413
-	.loc 5 699 0
+	bne	.L1421
+	.loc 5 695 0
 	ldr	w28, [x23, 8]
-.LVL1482:
-	.loc 5 700 0
+.LVL1491:
+	.loc 5 696 0
 	cmn	w28, #1
-	bne	.L1414
+	bne	.L1422
 	adrp	x0, .LC1
-	mov	w2, 700
+	mov	w2, 696
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1483:
-.L1414:
-	.loc 5 701 0
+.LVL1492:
+.L1422:
+	.loc 5 697 0
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w28
 	bl	log2phys
-.LVL1484:
-	.loc 5 702 0
-	ldr	x0, [x22, 3272]
+.LVL1493:
+	.loc 5 698 0
+	ldr	x0, [x22, 3256]
 	ldr	w1, [x29, 124]
 	add	x0, x0, x27
 	ldr	w2, [x0, 4]
-.LVL1485:
+.LVL1494:
 	cmp	w2, w1
-	bne	.L1413
-	.loc 5 704 0
+	bne	.L1421
+	.loc 5 700 0
 	adrp	x28, .LANCHOR3
-.LVL1486:
+.LVL1495:
 	add	x2, x28, :lo12:.LANCHOR3
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 704 0
-	ldrh	w1, [x2, 78]
+	.loc 5 700 0
+	ldrh	w1, [x2, 70]
 	add	w1, w1, 1
-	strh	w1, [x2, 78]
-	.loc 5 705 0
-	ldr	x2, [x22, 3976]
-	ldr	w1, [x22, 3240]
+	strh	w1, [x2, 70]
+	.loc 5 701 0
+	ldr	x2, [x22, 3968]
+	ldr	w1, [x22, 3224]
 	add	x1, x2, x1, lsl 5
 	str	x1, [x29, 96]
 	str	w0, [x1, 24]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1487:
+.LVL1496:
 	ldr	x1, [x29, 96]
 	str	w0, [x1, 4]
-	.loc 5 707 0
-	ldr	w0, [x22, 3240]
-	ldr	x1, [x22, 3976]
+	.loc 5 703 0
+	ldr	w0, [x22, 3224]
+	ldr	x1, [x22, 3968]
 	add	x0, x1, x0, lsl 5
-	ldr	x1, [x22, 3272]
+	ldr	x1, [x22, 3256]
 	add	x1, x1, x27
 	ldr	x2, [x1, 8]
 	str	x2, [x0, 8]
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	x1, [x1, 16]
 	str	x1, [x0, 16]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	w0, [x29, 124]
-	.loc 5 716 0
+	.loc 5 712 0
 	mov	w1, 1
-.LVL1488:
-	.loc 5 709 0
+.LVL1497:
+	.loc 5 705 0
 	str	w0, [x23, 12]
-	.loc 5 710 0
-	ldrh	w0, [x22, 2456]
-.LVL1489:
+	.loc 5 706 0
+	ldrh	w0, [x22, 2496]
+.LVL1498:
 	strh	w0, [x23, 2]
-	.loc 5 713 0
-	ldr	w0, [x22, 2560]
+	.loc 5 709 0
+	ldr	w0, [x22, 2600]
 	str	w0, [x23, 4]
-	.loc 5 715 0
-	ldr	w0, [x22, 3240]
+	.loc 5 711 0
+	ldr	w0, [x22, 3224]
 	add	w0, w0, 1
-	str	w0, [x22, 3240]
-	.loc 5 716 0
-	ldr	x0, [x22, 3272]
+	str	w0, [x22, 3224]
+	.loc 5 712 0
+	ldr	x0, [x22, 3256]
 	add	x0, x0, x27
 	bl	FtlGcBufAlloc
-.LVL1490:
-	.loc 5 717 0
-	ldrb	w1, [x22, 2463]
-	ldr	w0, [x22, 3240]
+.LVL1499:
+	.loc 5 713 0
+	ldrb	w1, [x22, 2503]
+	ldr	w0, [x22, 3224]
 	cmp	w1, w0
-	beq	.L1415
-	ldrh	w0, [x22, 2460]
-	cbnz	w0, .L1413
-.L1415:
-	.loc 5 718 0
+	beq	.L1423
+	ldrh	w0, [x22, 2500]
+	cbnz	w0, .L1421
+.L1423:
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1491:
-	cbz	w0, .L1413
-	.loc 5 719 0
+.LVL1500:
+	cbz	w0, .L1421
+	.loc 5 715 0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 5 720 0
+	.loc 5 716 0
 	add	x28, x28, :lo12:.LANCHOR3
-	.loc 5 719 0
-	str	wzr, [x19, 3952]
-	.loc 5 720 0
-	ldrh	w0, [x28, 76]
-	b	.L1354
-.LVL1492:
-.L1413:
+	.loc 5 715 0
+	str	wzr, [x19, 3944]
+	.loc 5 716 0
+	ldrh	w0, [x28, 68]
+	b	.L1362
+.LVL1501:
+.L1421:
 	add	x27, x27, 32
-	b	.L1412
-.L1417:
-	.loc 5 727 0
+	b	.L1420
+.L1425:
+	.loc 5 723 0
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2666]
+	ldrh	w0, [x1, 2650]
 	add	w21, w21, w0
-.LVL1493:
+.LVL1502:
 	and	w21, w21, 65535
-	strh	w21, [x1, 2666]
-	.loc 5 729 0
+	strh	w21, [x1, 2650]
+	.loc 5 725 0
 	cmp	w26, w21
 	adrp	x21, .LANCHOR3
-	bls	.L1419
+	bls	.L1427
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w1, [x0, 78]
-	ldrh	w0, [x0, 80]
+	ldrh	w1, [x0, 70]
+	ldrh	w0, [x0, 72]
 	cmp	w1, w0
-	bne	.L1420
-.L1419:
-	.loc 5 731 0
+	bne	.L1428
+.L1427:
+	.loc 5 727 0
 	add	x22, x19, :lo12:.LANCHOR0
-	ldr	w0, [x22, 3240]
-	cbz	w0, .L1421
-	.loc 5 732 0
+	ldr	w0, [x22, 3224]
+	cbz	w0, .L1429
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1494:
-	cbz	w0, .L1421
+.LVL1503:
+	cbz	w0, .L1429
+	.loc 5 729 0
+	str	wzr, [x22, 3944]
+	b	.L1467
+.L1429:
 	.loc 5 733 0
-	str	wzr, [x22, 3952]
-	b	.L1459
-.L1421:
-	.loc 5 737 0
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 78]
-	cbnz	w0, .L1422
+	ldrh	w0, [x0, 70]
+	cbnz	w0, .L1430
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2664]
-	ldr	x2, [x1, 2320]
+	ldrh	w0, [x1, 2648]
+	ldr	x2, [x1, 2352]
 	lsl	x0, x0, 1
 	ldrh	w3, [x2, x0]
-	cbz	w3, .L1422
-	.loc 5 739 0
+	cbz	w3, .L1430
+	.loc 5 735 0
 	strh	wzr, [x2, x0]
-	.loc 5 740 0
-	ldrh	w0, [x1, 2664]
+	.loc 5 736 0
+	ldrh	w0, [x1, 2648]
 	bl	update_vpc_list
-.LVL1495:
-	.loc 5 741 0
+.LVL1504:
+	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1496:
-	.loc 5 742 0
+.LVL1505:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1497:
-	.loc 5 743 0
+.LVL1506:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1498:
-.L1422:
-	.loc 5 745 0
+.LVL1507:
+.L1430:
+	.loc 5 741 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
-	strh	w1, [x0, 2664]
-.L1420:
-	.loc 5 747 0
+	strh	w1, [x0, 2648]
+.L1428:
+	.loc 5 743 0
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2352]
+	ldrh	w0, [x1, 2392]
 	cmp	w0, 2
-	bhi	.L1423
-	.loc 5 749 0
+	bhi	.L1431
+	.loc 5 745 0
 	ldrh	w21, [x1, 82]
-.LVL1499:
-	b	.L1395
-.LVL1500:
-.L1423:
-	.loc 5 754 0
+.LVL1508:
+	b	.L1403
+.LVL1509:
+.L1431:
+	.loc 5 750 0
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 5 752 0
-	str	wzr, [x1, 3952]
-	.loc 5 754 0
-	ldrh	w1, [x21, 76]
-	.loc 5 755 0
+	.loc 5 748 0
+	str	wzr, [x1, 3944]
+	.loc 5 750 0
+	ldrh	w1, [x21, 68]
+	.loc 5 751 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1354
-.LVL1501:
-.L1426:
-.LBE293:
-.LBE295:
+	b	.L1362
+.LVL1510:
+.L1434:
+.LBE321:
+.LBE323:
 	.loc 5 479 0
 	mov	w0, 0
-.LVL1502:
-	b	.L1354
+.LVL1511:
+	b	.L1362
 	.cfi_endproc
 .LFE258:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -17468,22 +17596,22 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 .LFB259:
-	.loc 5 761 0
+	.loc 5 757 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 5 762 0
+	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
-	.loc 5 761 0
+	.loc 5 757 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 5 762 0
+	.loc 5 758 0
 	bl	rk_ftl_garbage_collect
-.LVL1503:
-	.loc 5 763 0
+.LVL1512:
+	.loc 5 759 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -17497,17 +17625,17 @@ sftl_gc:
 	.type	FtlRead, %function
 FtlRead:
 .LFB153:
-	.loc 3 813 0
+	.loc 3 814 0
 	.cfi_startproc
-.LVL1504:
+.LVL1513:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
 	.cfi_offset 30, -152
 	and	w0, w0, 255
-	.loc 3 823 0
+	.loc 3 824 0
 	cmp	w0, 16
-	.loc 3 813 0
+	.loc 3 814 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -17528,30 +17656,30 @@ FtlRead:
 	.cfi_offset 22, -120
 	.cfi_offset 25, -96
 	.cfi_offset 26, -88
-	.loc 3 823 0
-	bne	.L1465
 	.loc 3 824 0
+	bne	.L1473
+	.loc 3 825 0
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
-.LVL1505:
+.LVL1514:
 	bl	FtlVendorPartRead
-.LVL1506:
+.LVL1515:
 	mov	w21, w0
-.LVL1507:
-.L1464:
-	.loc 3 900 0
+.LVL1516:
+.L1472:
+	.loc 3 901 0
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1508:
+.LVL1517:
 	ldp	x21, x22, [sp, 32]
-.LVL1509:
+.LVL1518:
 	ldp	x23, x24, [sp, 48]
-.LVL1510:
+.LVL1519:
 	ldp	x25, x26, [sp, 64]
-.LVL1511:
+.LVL1520:
 	ldp	x27, x28, [sp, 80]
-.LVL1512:
+.LVL1521:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -17568,12 +17696,12 @@ FtlRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1513:
-.L1465:
+.LVL1522:
+.L1473:
 	.cfi_restore_state
-	.loc 3 829 0
+	.loc 3 830 0
 	add	w0, w1, w2
-.LVL1514:
+.LVL1523:
 	str	w0, [x29, 128]
 	adrp	x0, .LANCHOR0
 	add	x25, x0, :lo12:.LANCHOR0
@@ -17581,327 +17709,327 @@ FtlRead:
 	str	x0, [x29, 96]
 	ldr	w1, [x25, 120]
 	cmp	w2, w1
-	bhi	.L1485
-	.loc 3 829 0 is_stmt 0 discriminator 1
+	bhi	.L1493
+	.loc 3 830 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR2
 	ldr	w21, [x0, #:lo12:.LANCHOR2]
 	cmn	w21, #1
-	beq	.L1464
-	.loc 3 832 0 is_stmt 1
+	beq	.L1472
+	.loc 3 833 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1515:
-	.loc 3 839 0
+.LVL1524:
+	.loc 3 840 0
 	mov	w28, 0
-.LVL1516:
-	.loc 3 834 0
-	ldrh	w0, [x25, 38]
+.LVL1525:
 	.loc 3 835 0
+	ldrh	w0, [x25, 38]
+	.loc 3 836 0
 	add	w1, w19, w27
 	sub	w24, w1, #1
-	.loc 3 814 0
+	.loc 3 815 0
 	mov	w21, 0
-	.loc 3 827 0
+	.loc 3 828 0
 	stp	wzr, wzr, [x29, 132]
-	.loc 3 819 0
+	.loc 3 820 0
 	str	wzr, [x29, 140]
-	.loc 3 834 0
-	udiv	w26, w19, w0
-.LVL1517:
 	.loc 3 835 0
+	udiv	w26, w19, w0
+.LVL1526:
+	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1518:
-	.loc 3 840 0
-	ldr	w0, [x25, 2524]
-	.loc 3 834 0
+.LVL1527:
+	.loc 3 841 0
+	ldr	w0, [x25, 2564]
+	.loc 3 835 0
 	mov	w20, w26
-.LVL1519:
-	.loc 3 836 0
+.LVL1528:
+	.loc 3 837 0
 	sub	w22, w24, w26
 	add	w22, w22, 1
-.LVL1520:
-	.loc 3 840 0
-	add	w0, w0, w22
-	str	w0, [x25, 2524]
-.LVL1521:
-.L1467:
+.LVL1529:
 	.loc 3 841 0
-	cbnz	w22, .L1483
-	.loc 3 897 0
+	add	w0, w0, w22
+	str	w0, [x25, 2564]
+.LVL1530:
+.L1475:
+	.loc 3 842 0
+	cbnz	w22, .L1491
+	.loc 3 898 0
 	ldr	x0, [x29, 96]
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3316]
-	cbnz	w1, .L1484
-	.loc 3 897 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x0, 2352]
+	ldrh	w1, [x0, 3300]
+	cbnz	w1, .L1492
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x0, 2392]
 	cmp	w0, 31
-	bhi	.L1464
-.L1484:
-	.loc 3 898 0 is_stmt 1
+	bhi	.L1472
+.L1492:
+	.loc 3 899 0 is_stmt 1
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1522:
-	b	.L1464
-.LVL1523:
-.L1483:
-	.loc 3 842 0
+.LVL1531:
+	b	.L1472
+.LVL1532:
+.L1491:
+	.loc 3 843 0
 	add	x1, x29, 156
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1524:
-	.loc 3 843 0
+.LVL1533:
+	.loc 3 844 0
 	ldr	w1, [x29, 156]
 	cmn	w1, #1
-	bne	.L1468
+	bne	.L1476
 	mov	w5, 0
-.LVL1525:
-.L1469:
-	.loc 3 844 0 discriminator 1
+.LVL1534:
+.L1477:
+	.loc 3 845 0 discriminator 1
 	ldrh	w0, [x25, 38]
-.LVL1526:
+.LVL1535:
 	cmp	w5, w0
-	bcc	.L1471
-.LVL1527:
-.L1472:
-	.loc 3 871 0
+	bcc	.L1479
+.LVL1536:
+.L1480:
+	.loc 3 872 0
 	add	w20, w20, 1
-	.loc 3 873 0
+	.loc 3 874 0
 	subs	w22, w22, #1
-	beq	.L1476
-	.loc 3 873 0 is_stmt 0 discriminator 1
+	beq	.L1484
+	.loc 3 874 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x25, 12]
 	cmp	w28, w0, lsl 2
-	bne	.L1467
-.L1476:
-	.loc 3 874 0 is_stmt 1
-	cbz	w28, .L1467
-	.loc 3 875 0
-	ldr	x0, [x25, 3968]
+	bne	.L1475
+.L1484:
+	.loc 3 875 0 is_stmt 1
+	cbz	w28, .L1475
+	.loc 3 876 0
+	ldr	x0, [x25, 3960]
 	mov	w1, w28
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1528:
-	.loc 3 882 0
+.LVL1537:
+	.loc 3 883 0
 	ldr	w0, [x29, 132]
-.LVL1529:
+.LVL1538:
 	lsl	w0, w0, 9
-.LVL1530:
+.LVL1539:
 	str	w0, [x29, 112]
-	.loc 3 879 0
+	.loc 3 880 0
 	ldr	w0, [x29, 140]
-.LVL1531:
+.LVL1540:
 	lsl	w0, w0, 9
-.LVL1532:
+.LVL1541:
 	str	x0, [x29, 120]
 	ldr	w0, [x29, 136]
 	lsl	w0, w0, 9
 	str	w0, [x29, 116]
 	ubfiz	x0, x28, 5, 32
 	mov	x28, 0
-.LVL1533:
+.LVL1542:
 	str	x0, [x29, 104]
-.L1482:
-	.loc 3 877 0
-	ldr	x0, [x25, 3968]
+.L1490:
+	.loc 3 878 0
+	ldr	x0, [x25, 3960]
 	add	x0, x0, x28
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1478
-	.loc 3 878 0
+	bne	.L1486
+	.loc 3 879 0
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3944]
+	ldr	x0, [x25, 3936]
 	cmp	x1, x0
-	bne	.L1479
-	.loc 3 879 0
+	bne	.L1487
+	.loc 3 880 0
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 116]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1495:
-	.loc 3 882 0
+.L1503:
+	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1534:
-.L1479:
-	.loc 3 884 0
-	ldr	x0, [x25, 3968]
+.LVL1543:
+.L1487:
+	.loc 3 885 0
+	ldr	x0, [x25, 3960]
 	add	x1, x0, x28
 	ldr	w2, [x0, x28]
 	cmn	w2, #1
-	bne	.L1480
-	.loc 3 885 0
-	ldr	w0, [x25, 2784]
+	bne	.L1488
 	.loc 3 886 0
+	ldr	w0, [x25, 2768]
+	.loc 3 887 0
 	mov	w21, w2
-	.loc 3 885 0
+	.loc 3 886 0
 	add	w0, w0, 1
-	str	w0, [x25, 2784]
-.L1480:
-	.loc 3 888 0
+	str	w0, [x25, 2768]
+.L1488:
+	.loc 3 889 0
 	ldr	w0, [x1]
 	cmp	w0, 256
-	bne	.L1481
-.LBB296:
-	.loc 3 889 0
+	bne	.L1489
+.LBB324:
+	.loc 3 890 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1535:
-	.loc 3 890 0
+.LVL1544:
+	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1536:
-.L1481:
-.LBE296:
-	.loc 3 876 0 discriminator 2
+.LVL1545:
+.L1489:
+.LBE324:
+	.loc 3 877 0 discriminator 2
 	ldr	x0, [x29, 104]
 	add	x28, x28, 32
 	cmp	x0, x28
-	bne	.L1482
-	.loc 3 893 0
+	bne	.L1490
+	.loc 3 894 0
 	mov	w28, 0
-.LVL1537:
-	b	.L1467
-.LVL1538:
-.L1471:
-	.loc 3 845 0
-	madd	w0, w20, w0, w5
-.LVL1539:
+.LVL1546:
+	b	.L1475
+.LVL1547:
+.L1479:
 	.loc 3 846 0
+	madd	w0, w20, w0, w5
+.LVL1548:
+	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1470
-	.loc 3 846 0 is_stmt 0 discriminator 1
+	bhi	.L1478
+	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bls	.L1470
-	.loc 3 847 0 is_stmt 1
+	bls	.L1478
+	.loc 3 848 0 is_stmt 1
 	sub	w0, w0, w19
-.LVL1540:
+.LVL1549:
 	str	w5, [x29, 120]
 	lsl	w0, w0, 9
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1541:
+.LVL1550:
 	ldr	w5, [x29, 120]
-.LVL1542:
-.L1470:
-	.loc 3 844 0 discriminator 2
+.LVL1551:
+.L1478:
+	.loc 3 845 0 discriminator 2
 	add	w5, w5, 1
-	b	.L1469
-.LVL1543:
-.L1468:
-	.loc 3 850 0
-	ldr	x0, [x25, 3968]
-	ubfiz	x2, x28, 5, 32
+	b	.L1477
+.LVL1552:
+.L1476:
 	.loc 3 851 0
+	ldr	x0, [x25, 3960]
+	ubfiz	x2, x28, 5, 32
+	.loc 3 852 0
 	cmp	w20, w26
-	.loc 3 850 0
+	.loc 3 851 0
 	add	x0, x0, x2
 	str	w1, [x0, 4]
 	ldrh	w0, [x25, 38]
-	.loc 3 851 0
-	bne	.L1473
 	.loc 3 852 0
-	ldr	x1, [x25, 3968]
-	ldr	x5, [x25, 3944]
+	bne	.L1481
+	.loc 3 853 0
+	ldr	x1, [x25, 3960]
+	ldr	x5, [x25, 3936]
 	add	x1, x1, x2
 	str	x5, [x1, 8]
-	.loc 3 853 0
+	.loc 3 854 0
 	udiv	w5, w19, w0
 	msub	w3, w5, w0, w19
-.LVL1544:
+.LVL1553:
 	str	w3, [x29, 140]
-	.loc 3 854 0
+	.loc 3 855 0
 	sub	w5, w0, w3
 	cmp	w27, w5
 	csel	w3, w27, w5, ls
-.LVL1545:
+.LVL1554:
 	str	w3, [x29, 136]
-	.loc 3 856 0
-	cmp	w3, w0
-	bne	.L1474
 	.loc 3 857 0
+	cmp	w3, w0
+	bne	.L1482
+	.loc 3 858 0
 	str	x23, [x1, 8]
-.LVL1546:
-.L1474:
-	.loc 3 866 0
-	ldr	x0, [x25, 3968]
-	ldr	x1, [x25, 3936]
+.LVL1555:
+.L1482:
+	.loc 3 867 0
+	ldr	x0, [x25, 3960]
+	ldr	x1, [x25, 3928]
 	add	x2, x0, x2
 	ldrh	w0, [x25, 92]
-	.loc 3 867 0
+	.loc 3 868 0
 	str	w20, [x2, 24]
-	.loc 3 866 0
+	.loc 3 867 0
 	mul	w0, w0, w28
-	.loc 3 868 0
+	.loc 3 869 0
 	add	w28, w28, 1
-	.loc 3 866 0
+	.loc 3 867 0
 	and	x0, x0, 4294967292
 	add	x0, x1, x0
 	str	x0, [x2, 16]
-	b	.L1472
-.LVL1547:
-.L1473:
-	.loc 3 858 0
-	cmp	w20, w24
-	bne	.L1475
+	b	.L1480
+.LVL1556:
+.L1481:
 	.loc 3 859 0
-	ldr	x5, [x25, 3968]
-	ldr	x1, [x25, 3928]
-	add	x5, x5, x2
+	cmp	w20, w24
+	bne	.L1483
 	.loc 3 860 0
+	ldr	x5, [x25, 3960]
+	ldr	x1, [x25, 3920]
+	add	x5, x5, x2
+	.loc 3 861 0
 	ldr	w3, [x29, 128]
-	.loc 3 859 0
-	str	x1, [x5, 8]
 	.loc 3 860 0
+	str	x1, [x5, 8]
+	.loc 3 861 0
 	mul	w1, w20, w0
 	sub	w3, w3, w1
-.LVL1548:
+.LVL1557:
 	str	w3, [x29, 132]
-	.loc 3 861 0
-	cmp	w0, w3
-	bne	.L1474
 	.loc 3 862 0
+	cmp	w0, w3
+	bne	.L1482
+	.loc 3 863 0
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x5, 8]
-	b	.L1474
-.LVL1549:
-.L1475:
-	.loc 3 864 0
-	ldr	x1, [x25, 3968]
+	b	.L1482
+.LVL1558:
+.L1483:
+	.loc 3 865 0
+	ldr	x1, [x25, 3960]
 	mul	w0, w0, w20
 	add	x1, x1, x2
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
 	str	x0, [x1, 8]
-	b	.L1474
-.LVL1550:
-.L1478:
-	.loc 3 880 0
-	cmp	w24, w1
-	bne	.L1479
+	b	.L1482
+.LVL1559:
+.L1486:
 	.loc 3 881 0
+	cmp	w24, w1
+	bne	.L1487
+	.loc 3 882 0
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3928]
+	ldr	x0, [x25, 3920]
 	cmp	x1, x0
-	bne	.L1479
-	.loc 3 882 0
+	bne	.L1487
+	.loc 3 883 0
 	ldrh	w0, [x25, 38]
 	ldr	w2, [x29, 112]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1495
-.LVL1551:
-.L1485:
-	.loc 3 830 0
+	b	.L1503
+.LVL1560:
+.L1493:
+	.loc 3 831 0
 	mov	w21, -1
-	b	.L1464
+	b	.L1472
 	.cfi_endproc
 .LFE153:
 	.size	FtlRead, .-FtlRead
@@ -17910,30 +18038,30 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 .LFB158:
-	.loc 3 1201 0
+	.loc 3 1204 0
 	.cfi_startproc
-.LVL1552:
+.LVL1561:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 3 1202 0
+	.loc 3 1205 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1553:
+.LVL1562:
 	mov	w1, w0
-.LVL1554:
-	.loc 3 1201 0
+.LVL1563:
+	.loc 3 1204 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 1202 0
+	.loc 3 1205 0
 	mov	w0, 0
-.LVL1555:
-	.loc 3 1201 0
-	.loc 3 1202 0
-	bl	FtlRead
-.LVL1556:
+.LVL1564:
 	.loc 3 1204 0
+	.loc 3 1205 0
+	bl	FtlRead
+.LVL1565:
+	.loc 3 1206 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -17947,17 +18075,17 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 .LFB156:
-	.loc 3 959 0
+	.loc 3 962 0
 	.cfi_startproc
-.LVL1557:
+.LVL1566:
 	stp	x29, x30, [sp, -224]!
 	.cfi_def_cfa_offset 224
 	.cfi_offset 29, -224
 	.cfi_offset 30, -216
 	and	w0, w0, 255
-	.loc 3 967 0
+	.loc 3 970 0
 	cmp	w0, 16
-	.loc 3 959 0
+	.loc 3 962 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
@@ -17978,27 +18106,27 @@ FtlWrite:
 	.cfi_offset 20, -200
 	.cfi_offset 21, -192
 	.cfi_offset 22, -184
-	.loc 3 967 0
-	bne	.L1499
-	.loc 3 968 0
+	.loc 3 970 0
+	bne	.L1507
+	.loc 3 971 0
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w23, 256
-.LVL1558:
+.LVL1567:
 	bl	FtlVendorPartWrite
-.LVL1559:
-.L1498:
-	.loc 3 1150 0
+.LVL1568:
+.L1506:
+	.loc 3 1153 0
 	ldp	x19, x20, [sp, 16]
-.LVL1560:
+.LVL1569:
 	ldp	x21, x22, [sp, 32]
-.LVL1561:
+.LVL1570:
 	ldp	x23, x24, [sp, 48]
-.LVL1562:
+.LVL1571:
 	ldp	x25, x26, [sp, 64]
-.LVL1563:
+.LVL1572:
 	ldp	x27, x28, [sp, 80]
-.LVL1564:
+.LVL1573:
 	ldp	x29, x30, [sp], 224
 	.cfi_remember_state
 	.cfi_restore 30
@@ -18015,159 +18143,159 @@ FtlWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1565:
-.L1499:
+.LVL1574:
+.L1507:
 	.cfi_restore_state
-	.loc 3 971 0
+	.loc 3 974 0
 	add	w3, w1, w2
 	adrp	x20, .LANCHOR0
 	add	x2, x20, :lo12:.LANCHOR0
 	ldr	w0, [x2, 120]
-.LVL1566:
+.LVL1575:
 	cmp	w3, w0
-	bhi	.L1541
-	.loc 3 971 0 is_stmt 0 discriminator 1
+	bhi	.L1549
+	.loc 3 974 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR2
 	str	x1, [x29, 136]
 	ldr	w0, [x1, #:lo12:.LANCHOR2]
 	cmn	w0, #1
-	beq	.L1498
-	.loc 3 975 0 is_stmt 1
+	beq	.L1506
+	.loc 3 978 0 is_stmt 1
 	ldrh	w1, [x2, 38]
-	.loc 3 974 0
+	.loc 3 977 0
 	adrp	x4, .LANCHOR3
-	.loc 3 976 0
+	.loc 3 979 0
 	sub	w3, w3, #1
-	.loc 3 974 0
+	.loc 3 977 0
 	add	x5, x4, :lo12:.LANCHOR3
 	mov	w0, 2048
 	str	x4, [x29, 104]
-	.loc 3 975 0
+	.loc 3 978 0
 	udiv	w22, w23, w1
-.LVL1567:
-	.loc 3 974 0
-	str	w0, [x5, 84]
-	.loc 3 976 0
+.LVL1576:
+	.loc 3 977 0
+	str	w0, [x5, 76]
+	.loc 3 979 0
 	udiv	w0, w3, w1
-.LVL1568:
+.LVL1577:
+	.loc 3 983 0
+	ldr	x3, [x5, -112]
 	.loc 3 980 0
-	ldr	x3, [x5, -104]
-	.loc 3 977 0
 	sub	w24, w0, w22
-	.loc 3 976 0
-	str	w0, [x29, 148]
 	.loc 3 979 0
-	ldr	w0, [x2, 2532]
-.LVL1569:
-	.loc 3 977 0
+	str	w0, [x29, 148]
+	.loc 3 982 0
+	ldr	w0, [x2, 2572]
+.LVL1578:
+	.loc 3 980 0
 	add	w25, w24, 1
-.LVL1570:
-	.loc 3 979 0
+.LVL1579:
+	.loc 3 982 0
 	add	w0, w0, w25
-	str	w0, [x2, 2532]
-	.loc 3 980 0
-	cbz	x3, .L1501
-	.loc 3 981 0
+	str	w0, [x2, 2572]
+	.loc 3 983 0
+	cbz	x3, .L1509
+	.loc 3 984 0
 	ldr	w0, [x3, 24]
 	cmp	w22, w0
-	beq	.L1502
-	.loc 3 982 0
+	beq	.L1510
+	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1571:
-.L1501:
-	.loc 3 1005 0
+.LVL1580:
+.L1509:
+	.loc 3 1008 0
 	ldr	x0, [x29, 136]
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
-	cbz	w0, .L1543
-	.loc 3 1005 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x19, 2364]
-	add	x0, x19, 2360
-	.loc 3 1006 0 is_stmt 1 discriminator 1
-	add	x19, x19, 2408
+	cbz	w0, .L1551
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x19, 2404]
+	add	x0, x19, 2400
+	.loc 3 1009 0 is_stmt 1 discriminator 1
+	add	x19, x19, 2448
 	cmp	w1, 0
 	csel	x19, x19, x0, eq
-.LVL1572:
-.L1504:
-	.loc 3 1009 0
+.LVL1581:
+.L1512:
+	.loc 3 1012 0
 	adrp	x0, .LANCHOR1
 	mov	w21, w22
-.LVL1573:
+.LVL1582:
 	add	x0, x0, :lo12:.LANCHOR1
 	add	x0, x0, 672
 	str	x0, [x29, 160]
-.LVL1574:
-.L1505:
-	.loc 3 1008 0
-	cbz	w25, .L1539
-	.loc 3 1009 0
+.LVL1583:
+.L1513:
+	.loc 3 1011 0
+	cbz	w25, .L1547
+	.loc 3 1012 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 12]
 	cmp	w1, w0
-	bcc	.L1506
-	.loc 3 1009 0 is_stmt 0 discriminator 1
+	bcc	.L1514
+	.loc 3 1012 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
-	mov	w2, 1009
+	mov	w2, 1012
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1575:
-.L1506:
-	.loc 3 1010 0 is_stmt 1
+.LVL1584:
+.L1514:
+	.loc 3 1013 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1507
-	.loc 3 1011 0
+	cbnz	w0, .L1515
+	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL1576:
-	.loc 3 1013 0
+.LVL1585:
+	.loc 3 1016 0
 	add	x0, x20, :lo12:.LANCHOR0
-	add	x1, x0, 2360
+	add	x1, x0, 2400
 	cmp	x19, x1
-	bne	.L1508
-	.loc 3 1014 0
-	add	x0, x0, 2408
+	bne	.L1516
+	.loc 3 1017 0
+	add	x0, x0, 2448
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1509
-	.loc 3 1015 0
+	cbnz	w1, .L1517
+	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL1577:
-	.loc 3 1016 0
+.LVL1586:
+	.loc 3 1019 0
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-.L1509:
-	.loc 3 1018 0
+.L1517:
+	.loc 3 1021 0
 	add	x19, x20, :lo12:.LANCHOR0
-.LVL1578:
-	add	x24, x19, 2360
-	.loc 3 1020 0
-	add	x19, x19, 2408
-	.loc 3 1018 0
+.LVL1587:
+	add	x24, x19, 2400
+	.loc 3 1023 0
+	add	x19, x19, 2448
+	.loc 3 1021 0
 	mov	x0, x24
 	bl	allocate_new_data_superblock
-.LVL1579:
-	.loc 3 1019 0
+.LVL1588:
+	.loc 3 1022 0
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
-	.loc 3 1020 0
+	.loc 3 1023 0
 	cmp	w0, 0
 	csel	x19, x19, x24, ne
-.LVL1580:
-.L1510:
-	.loc 3 1030 0
+.LVL1589:
+.L1518:
+	.loc 3 1033 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1507
-	.loc 3 1031 0
+	cbnz	w0, .L1515
+	.loc 3 1034 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1581:
-.L1507:
-	.loc 3 1040 0
+.LVL1590:
+.L1515:
+	.loc 3 1043 0
 	ldrh	w0, [x19, 4]
-	.loc 3 1038 0
+	.loc 3 1041 0
 	ldrb	w1, [x19, 7]
 	cmp	w0, w25
 	csel	w0, w0, w25, ls
@@ -18175,116 +18303,116 @@ FtlWrite:
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 132]
-	.loc 3 1042 0
+	.loc 3 1045 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 12]
 	cmp	w1, w0
-	bcc	.L1511
-	.loc 3 1042 0 is_stmt 0 discriminator 1
+	bcc	.L1519
+	.loc 3 1045 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
-	mov	w2, 1042
+	mov	w2, 1045
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1582:
-.L1511:
-	.loc 3 1065 0 is_stmt 1 discriminator 1
+.LVL1591:
+.L1519:
+	.loc 3 1068 0 is_stmt 1 discriminator 1
 	str	xzr, [x29, 168]
-.L1512:
-	.loc 3 1043 0 discriminator 1
+.L1520:
+	.loc 3 1046 0 discriminator 1
 	ldr	w1, [x29, 132]
 	ldr	w28, [x29, 168]
-.LVL1583:
+.LVL1592:
 	cmp	w28, w1
-	bcc	.L1533
+	bcc	.L1541
 	mov	x28, x1
-.L1513:
-	.loc 3 1124 0
+.L1521:
+	.loc 3 1127 0
 	ldr	x0, [x29, 104]
 	add	x0, x0, :lo12:.LANCHOR3
-	ldr	x0, [x0, -104]
-	cbz	x0, .L1534
-	.loc 3 1126 0
+	ldr	x0, [x0, -112]
+	cbz	x0, .L1542
+	.loc 3 1129 0
 	sub	w25, w25, #1
-.LVL1584:
-	.loc 3 1127 0
+.LVL1593:
+	.loc 3 1130 0
 	subs	w28, w28, #1
-	bne	.L1534
-.L1539:
-	.loc 3 1134 0
+	bne	.L1542
+.L1547:
+	.loc 3 1137 0
 	ldr	w0, [x29, 148]
-	.loc 3 1136 0
+	.loc 3 1139 0
 	add	x20, x20, :lo12:.LANCHOR0
-.LVL1585:
-	.loc 3 1134 0
+.LVL1594:
+	.loc 3 1137 0
 	sub	w1, w0, w22
 	mov	w0, 0
-.LVL1586:
+.LVL1595:
 	bl	rk_ftl_garbage_collect
-.LVL1587:
-	.loc 3 1136 0
-	ldrh	w0, [x20, 2352]
+.LVL1596:
+	.loc 3 1139 0
+	ldrh	w0, [x20, 2392]
 	cmp	w0, 15
-	bhi	.L1536
-	.loc 3 1138 0
+	bhi	.L1544
+	.loc 3 1141 0
 	mov	w21, 65535
-.LVL1588:
-	.loc 3 1140 0
+.LVL1597:
+	.loc 3 1143 0
 	mov	w19, 128
-.LVL1589:
-.L1559:
-	.loc 3 1138 0
-	ldrh	w0, [x20, 2664]
+.LVL1598:
+.L1567:
+	.loc 3 1141 0
+	ldrh	w0, [x20, 2648]
 	cmp	w0, w21
-	bne	.L1540
-	.loc 3 1138 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x20, 3312]
+	bne	.L1548
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x20, 3296]
 	cmp	w0, w21
-	bne	.L1540
-	.loc 3 1139 0 is_stmt 1
+	bne	.L1548
+	.loc 3 1142 0 is_stmt 1
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1590:
+.LVL1599:
 	bl	FtlGcRefreshBlock
-.LVL1591:
-.L1540:
-	.loc 3 1142 0
+.LVL1600:
+.L1548:
+	.loc 3 1145 0
 	mov	w1, 1
-	.loc 3 1140 0
-	strh	w19, [x20, 3226]
-	.loc 3 1142 0
+	.loc 3 1143 0
+	strh	w19, [x20, 3210]
+	.loc 3 1145 0
 	mov	w0, w1
-	.loc 3 1141 0
-	strh	w19, [x20, 3224]
-	.loc 3 1142 0
+	.loc 3 1144 0
+	strh	w19, [x20, 3208]
+	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1592:
-	.loc 3 1143 0
+.LVL1601:
+	.loc 3 1146 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1593:
-	.loc 3 1144 0
-	ldrh	w0, [x20, 2352]
+.LVL1602:
+	.loc 3 1147 0
+	ldrh	w0, [x20, 2392]
 	cmp	w0, 8
-	bls	.L1559
-	b	.L1536
-.LVL1594:
-.L1502:
-	.loc 3 984 0
-	ldr	w0, [x2, 2536]
-	.loc 3 989 0
+	bls	.L1567
+	b	.L1544
+.LVL1603:
+.L1510:
+	.loc 3 987 0
+	ldr	w0, [x2, 2576]
+	.loc 3 992 0
 	ldr	x3, [x3, 8]
-	.loc 3 984 0
+	.loc 3 987 0
 	add	w0, w0, 1
-	str	w0, [x2, 2536]
-	.loc 3 985 0
+	str	w0, [x2, 2576]
+	.loc 3 988 0
 	msub	w0, w22, w1, w23
-	.loc 3 986 0
+	.loc 3 989 0
 	sub	w1, w1, w0
 	cmp	w26, w1
-	.loc 3 989 0
+	.loc 3 992 0
 	lsl	w0, w0, 9
 	csel	w19, w26, w1, ls
 	add	x0, x3, x0
@@ -18292,267 +18420,267 @@ FtlWrite:
 	mov	x1, x27
 	mov	w2, w21
 	bl	ftl_memcpy
-.LVL1595:
-	.loc 3 991 0
-	cbnz	w24, .L1503
-.LVL1596:
-.L1536:
-	.loc 3 992 0
+.LVL1604:
+	.loc 3 994 0
+	cbnz	w24, .L1511
+.LVL1605:
+.L1544:
+	.loc 3 995 0
 	mov	w0, 0
-	b	.L1498
-.LVL1597:
-.L1503:
-	.loc 3 993 0
+	b	.L1506
+.LVL1606:
+.L1511:
+	.loc 3 996 0
 	sub	w26, w26, w19
-	.loc 3 994 0
+	.loc 3 997 0
 	add	w23, w23, w19
-	.loc 3 995 0
+	.loc 3 998 0
 	add	x27, x27, x21
-	.loc 3 996 0
+	.loc 3 999 0
 	add	w22, w22, 1
-	.loc 3 997 0
+	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1598:
+.LVL1607:
 	mov	w25, w24
-	b	.L1501
-.L1543:
-	.loc 3 1003 0
-	add	x19, x19, 2360
-.LVL1599:
-	b	.L1504
-.LVL1600:
-.L1508:
-	.loc 3 1024 0
+	b	.L1509
+.L1551:
+	.loc 3 1006 0
+	add	x19, x19, 2400
+.LVL1608:
+	b	.L1512
+.LVL1609:
+.L1516:
+	.loc 3 1027 0
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-	.loc 3 1025 0
+	.loc 3 1028 0
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1546
-	.loc 3 1026 0
+	cbnz	w0, .L1554
+	.loc 3 1029 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1601:
-	b	.L1510
-.L1546:
+.LVL1610:
+	b	.L1518
+.L1554:
 	mov	x19, x1
-	b	.L1507
-.LVL1602:
-.L1533:
-	.loc 3 1044 0
+	b	.L1515
+.LVL1611:
+.L1541:
+	.loc 3 1047 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1513
-	.loc 3 1048 0
+	cbz	w0, .L1521
+	.loc 3 1051 0
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1603:
-	.loc 3 1049 0
+.LVL1612:
+	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1604:
-	.loc 3 1051 0
+.LVL1613:
+	.loc 3 1054 0
 	add	x3, x20, :lo12:.LANCHOR0
 	ldr	x1, [x29, 168]
-	.loc 3 1052 0
+	.loc 3 1055 0
 	str	x3, [x29, 152]
 	lsl	x24, x1, 5
-	.loc 3 1051 0
-	ldr	x1, [x3, 3984]
-	.loc 3 1052 0
+	.loc 3 1054 0
+	ldr	x1, [x3, 3976]
+	.loc 3 1055 0
 	ldrh	w2, [x3, 92]
-	.loc 3 1051 0
+	.loc 3 1054 0
 	add	x1, x1, x24
 	str	w0, [x1, 4]
-.LVL1605:
-	.loc 3 1052 0
+.LVL1614:
+	.loc 3 1055 0
 	mul	w28, w28, w2
-.LVL1606:
-	ldr	x0, [x3, 3984]
+.LVL1615:
+	ldr	x0, [x3, 3976]
 	and	x1, x28, 4294967292
 	str	x1, [x29, 120]
 	add	x0, x0, x24
-	ldr	x1, [x3, 3936]
+	ldr	x1, [x3, 3928]
 	ldr	x3, [x29, 120]
 	str	x1, [x29, 112]
 	add	x28, x1, x3
-	.loc 3 1053 0
+	.loc 3 1056 0
 	str	w21, [x0, 24]
-	.loc 3 1052 0
+	.loc 3 1055 0
 	str	x28, [x0, 16]
-	.loc 3 1056 0
+	.loc 3 1059 0
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-.LVL1607:
-	.loc 3 1058 0
+.LVL1616:
+	.loc 3 1061 0
 	ldr	w0, [x29, 148]
 	cmp	w21, w22
 	ldr	x3, [x29, 152]
-.LVL1608:
+.LVL1617:
 	ccmp	w21, w0, 4, ne
-	bne	.L1514
-	.loc 3 1059 0
+	bne	.L1522
+	.loc 3 1062 0
 	cmp	w21, w22
-	bne	.L1515
-	.loc 3 1060 0
+	bne	.L1523
+	.loc 3 1063 0
 	ldrh	w2, [x3, 38]
 	udiv	w0, w23, w2
-.LVL1609:
+.LVL1618:
 	msub	w0, w0, w2, w23
 	str	w0, [x29, 144]
-	.loc 3 1061 0
+	.loc 3 1064 0
 	sub	w2, w2, w0
 	cmp	w2, w26
 	csel	w0, w2, w26, ls
 	str	w0, [x29, 152]
-.L1516:
-	.loc 3 1069 0
+.L1524:
+	.loc 3 1072 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w2, [x29, 152]
 	ldrh	w1, [x0, 38]
 	cmp	w2, w1
-	bne	.L1517
-	.loc 3 1071 0
-	ldr	x0, [x0, 3984]
-	.loc 3 1070 0
+	bne	.L1525
+	.loc 3 1074 0
+	ldr	x0, [x0, 3976]
+	.loc 3 1073 0
 	cmp	w21, w22
-	.loc 3 1071 0
+	.loc 3 1074 0
 	add	x24, x0, x24
-	.loc 3 1070 0
-	bne	.L1518
-	.loc 3 1071 0
+	.loc 3 1073 0
+	bne	.L1526
+	.loc 3 1074 0
 	str	x27, [x24, 8]
-.LVL1610:
-.L1519:
-	.loc 3 1116 0
+.LVL1619:
+.L1527:
+	.loc 3 1119 0
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL1611:
+.LVL1620:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 12]
 	cmp	w1, w0
-	bcc	.L1530
-	.loc 3 1116 0 is_stmt 0 discriminator 1
+	bcc	.L1538
+	.loc 3 1119 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
-	mov	w2, 1116
+	mov	w2, 1119
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1612:
-.L1530:
-	.loc 3 1117 0 is_stmt 1
+.LVL1621:
+.L1538:
+	.loc 3 1120 0 is_stmt 1
 	ldp	x1, x2, [x29, 112]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1118 0
+	.loc 3 1121 0
 	add	x1, x20, :lo12:.LANCHOR0
-	ldr	w0, [x1, 2560]
-	.loc 3 1119 0
-	stp	w0, w21, [x28, 4]
+	ldr	w0, [x1, 2600]
 	.loc 3 1122 0
+	stp	w0, w21, [x28, 4]
+	.loc 3 1125 0
 	add	w21, w21, 1
-	.loc 3 1118 0
+	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, 2560]
-	.loc 3 1120 0
+	str	w0, [x1, 2600]
+	.loc 3 1123 0
 	ldr	w0, [x29, 188]
-.LVL1613:
+.LVL1622:
 	str	w0, [x28, 12]
-	.loc 3 1121 0
+	.loc 3 1124 0
 	ldrh	w0, [x19]
-.LVL1614:
+.LVL1623:
 	strh	w0, [x28, 2]
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1512
-.LVL1615:
-.L1515:
-	.loc 3 1066 0
+	b	.L1520
+.LVL1624:
+.L1523:
+	.loc 3 1069 0
 	ldrh	w0, [x3, 38]
-.LVL1616:
+.LVL1625:
 	add	w2, w23, w26
-	.loc 3 1065 0
+	.loc 3 1068 0
 	str	wzr, [x29, 144]
-	.loc 3 1066 0
+	.loc 3 1069 0
 	msub	w2, w21, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 152]
-	b	.L1516
-.L1518:
-	.loc 3 1073 0
+	b	.L1524
+.L1526:
+	.loc 3 1076 0
 	ldr	w0, [x29, 152]
-.L1562:
-	.loc 3 1114 0
+.L1570:
+	.loc 3 1117 0
 	mul	w0, w0, w21
 	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x27, x0
 	str	x0, [x24, 8]
-	b	.L1519
-.L1517:
-	.loc 3 1077 0
-	ldr	x1, [x0, 3984]
-	.loc 3 1076 0
+	b	.L1527
+.L1525:
+	.loc 3 1080 0
+	ldr	x1, [x0, 3976]
+	.loc 3 1079 0
 	cmp	w21, w22
-	.loc 3 1077 0
+	.loc 3 1080 0
 	add	x1, x1, x24
-	.loc 3 1076 0
-	bne	.L1520
-	.loc 3 1077 0
-	ldr	x0, [x0, 3944]
-.L1561:
 	.loc 3 1079 0
+	bne	.L1528
+	.loc 3 1080 0
+	ldr	x0, [x0, 3936]
+.L1569:
+	.loc 3 1082 0
 	str	x0, [x1, 8]
-	.loc 3 1081 0
+	.loc 3 1084 0
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1522
-.LBB297:
-	.loc 3 1085 0
+	beq	.L1530
+.LBB325:
+	.loc 3 1088 0
 	add	x3, x20, :lo12:.LANCHOR0
-	.loc 3 1083 0
+	.loc 3 1086 0
 	str	w0, [x29, 196]
-	.loc 3 1084 0
-	str	w21, [x29, 216]
 	.loc 3 1087 0
+	str	w21, [x29, 216]
+	.loc 3 1090 0
 	mov	w2, 0
-	.loc 3 1085 0
+	.loc 3 1088 0
 	str	x3, [x29, 96]
-	ldr	x0, [x3, 3984]
+	ldr	x0, [x3, 3976]
 	add	x0, x0, x24
-	.loc 3 1086 0
+	.loc 3 1089 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 200]
-	.loc 3 1087 0
+	.loc 3 1090 0
 	mov	w1, 1
 	add	x0, x29, 192
 	bl	FlashReadPages
-.LVL1617:
-	.loc 3 1088 0
+.LVL1626:
+	.loc 3 1091 0
 	ldr	w0, [x29, 192]
 	ldr	x3, [x29, 96]
 	cmn	w0, #1
-	bne	.L1523
-	.loc 3 1089 0
-	ldr	w0, [x3, 2784]
+	bne	.L1531
+	.loc 3 1092 0
+	ldr	w0, [x3, 2768]
 	add	w0, w0, 1
-	str	w0, [x3, 2784]
-.L1526:
+	str	w0, [x3, 2768]
+.L1534:
 	ldr	w0, [x29, 152]
-.LBE297:
-	.loc 3 1101 0
+.LBE325:
+	.loc 3 1104 0
 	cmp	w21, w22
 	lsl	w2, w0, 9
-	.loc 3 1102 0
+	.loc 3 1105 0
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 3 1101 0
-	bne	.L1527
-	.loc 3 1102 0
-	ldr	x1, [x0, 3984]
+	.loc 3 1104 0
+	bne	.L1535
+	.loc 3 1105 0
+	ldr	x1, [x0, 3976]
 	ldr	w0, [x29, 144]
 	add	x1, x1, x24
 	lsl	w0, w0, 9
@@ -18560,80 +18688,80 @@ FtlWrite:
 	mov	x1, x27
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1618:
-	.loc 3 1106 0
+.LVL1627:
+	.loc 3 1109 0
 	ldr	w0, [x29, 148]
-.LVL1619:
+.LVL1628:
 	cmp	w21, w0
-	bne	.L1519
-.L1528:
-	.loc 3 1107 0
+	bne	.L1527
+.L1536:
+	.loc 3 1110 0
 	ldrh	w0, [x19, 4]
-.LVL1620:
-	cbz	w0, .L1519
-	.loc 3 1108 0
+.LVL1629:
+	cbz	w0, .L1527
+	.loc 3 1111 0
 	ldr	x0, [x29, 104]
 	add	x1, x0, :lo12:.LANCHOR3
 	add	x0, x20, :lo12:.LANCHOR0
-	ldr	x0, [x0, 3984]
-	.loc 3 1109 0
-	str	x19, [x1, 64]
-	.loc 3 1108 0
+	ldr	x0, [x0, 3976]
+	.loc 3 1112 0
+	str	x19, [x1, 56]
+	.loc 3 1111 0
 	add	x24, x0, x24
-	str	x24, [x1, -104]
-	b	.L1519
-.L1520:
-	.loc 3 1079 0
-	ldr	x0, [x0, 3928]
-	b	.L1561
-.L1523:
-.LBB298:
-	.loc 3 1091 0
+	str	x24, [x1, -112]
+	b	.L1527
+.L1528:
+	.loc 3 1082 0
+	ldr	x0, [x0, 3920]
+	b	.L1569
+.L1531:
+.LBB326:
+	.loc 3 1094 0
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1525
-	.loc 3 1092 0
-	ldr	w0, [x3, 2784]
-	.loc 3 1093 0
+	beq	.L1533
+	.loc 3 1095 0
+	ldr	w0, [x3, 2768]
+	.loc 3 1096 0
 	mov	w2, w21
-	.loc 3 1092 0
+	.loc 3 1095 0
 	add	w0, w0, 1
-	str	w0, [x3, 2784]
-	.loc 3 1093 0
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	str	w0, [x3, 2768]
+	.loc 3 1096 0
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	ldr	w1, [x28, 8]
 	bl	printk
-.LVL1621:
-.L1525:
-	.loc 3 1095 0
+.LVL1630:
+.L1533:
+	.loc 3 1098 0
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1526
-	.loc 3 1095 0 is_stmt 0 discriminator 1
+	beq	.L1534
+	.loc 3 1098 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 160]
-	mov	w2, 1095
+	mov	w2, 1098
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1622:
-	b	.L1526
-.L1522:
-.LBE298:
-	.loc 3 1098 0 is_stmt 1
+.LVL1631:
+	b	.L1534
+.L1530:
+.LBE326:
+	.loc 3 1101 0 is_stmt 1
 	add	x1, x20, :lo12:.LANCHOR0
-	ldr	x0, [x1, 3984]
+	ldr	x0, [x1, 3976]
 	ldrh	w2, [x1, 90]
 	mov	w1, 0
 	add	x0, x0, x24
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL1623:
-	b	.L1526
-.L1527:
-	.loc 3 1104 0
+.LVL1632:
+	b	.L1534
+.L1535:
+	.loc 3 1107 0
 	ldrh	w1, [x0, 38]
-	ldr	x0, [x0, 3984]
+	ldr	x0, [x0, 3976]
 	add	x0, x0, x24
 	mul	w1, w1, w21
 	ldr	x0, [x0, 8]
@@ -18641,45 +18769,45 @@ FtlWrite:
 	lsl	w1, w1, 9
 	add	x1, x27, x1
 	bl	ftl_memcpy
-.LVL1624:
-	b	.L1528
-.LVL1625:
-.L1514:
-	.loc 3 1114 0
-	ldr	x0, [x3, 3984]
-.LVL1626:
+.LVL1633:
+	b	.L1536
+.LVL1634:
+.L1522:
+	.loc 3 1117 0
+	ldr	x0, [x3, 3976]
+.LVL1635:
 	add	x24, x0, x24
 	ldrh	w0, [x3, 38]
-	b	.L1562
-.LVL1627:
-.L1534:
-	.loc 3 1130 0
+	b	.L1570
+.LVL1636:
+.L1542:
+	.loc 3 1133 0
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w28
-	ldr	x0, [x0, 3984]
+	ldr	x0, [x0, 3976]
 	bl	FtlProgPages
-.LVL1628:
-	.loc 3 1131 0
+.LVL1637:
+	.loc 3 1134 0
 	cmp	w25, w28
-	bcs	.L1537
-	.loc 3 1131 0 is_stmt 0 discriminator 1
+	bcs	.L1545
+	.loc 3 1134 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
-	mov	w2, 1131
+	mov	w2, 1134
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1629:
-.L1537:
-	.loc 3 1132 0 is_stmt 1
+.LVL1638:
+.L1545:
+	.loc 3 1135 0 is_stmt 1
 	sub	w25, w25, w28
-	b	.L1505
-.LVL1630:
-.L1541:
-	.loc 3 972 0
+	b	.L1513
+.LVL1639:
+.L1549:
+	.loc 3 975 0
 	mov	w0, -1
-	b	.L1498
+	b	.L1506
 	.cfi_endproc
 .LFE156:
 	.size	FtlWrite, .-FtlWrite
@@ -18688,30 +18816,30 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB159:
-	.loc 3 1207 0
+	.loc 3 1209 0
 	.cfi_startproc
-.LVL1631:
+.LVL1640:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 3 1208 0
+	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1632:
+.LVL1641:
 	mov	w1, w0
-.LVL1633:
-	.loc 3 1207 0
+.LVL1642:
+	.loc 3 1209 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 1208 0
+	.loc 3 1210 0
 	mov	w0, 0
-.LVL1634:
-	.loc 3 1207 0
-	.loc 3 1208 0
-	bl	FtlWrite
-.LVL1635:
+.LVL1643:
 	.loc 3 1209 0
+	.loc 3 1210 0
+	bl	FtlWrite
+.LVL1644:
+	.loc 3 1211 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -18725,59 +18853,59 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 .LFB213:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 1368 0
+	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1360 0
+	.loc 2 1409 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 1365 0
+	.loc 2 1414 0
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 1360 0
+	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 1365 0
-	add	x21, x19, 3360
-	.loc 2 1360 0
+	.loc 2 1414 0
+	add	x21, x19, 3344
+	.loc 2 1409 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -16
 	.cfi_offset 24, -8
-	.loc 2 1365 0
-	ldr	x0, [x19, 2288]
+	.loc 2 1414 0
+	ldr	x0, [x19, 3376]
 	str	x0, [x21, 8]
-	.loc 2 1366 0
-	ldr	x0, [x19, 3392]
+	.loc 2 1415 0
+	ldr	x0, [x19, 3384]
 	str	x0, [x21, 16]
-	.loc 2 1368 0
-	ldr	x0, [x19, 2320]
+	.loc 2 1417 0
+	ldr	x0, [x19, 2352]
 	ldrh	w2, [x19, 20]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1636:
-	.loc 2 1369 0
-	ldrh	w0, [x19, 2648]
+.LVL1645:
+	.loc 2 1418 0
+	ldrh	w0, [x19, 2632]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1566
-.LVL1637:
-.L1574:
-	.loc 2 1370 0
+	bne	.L1574
+.LVL1646:
+.L1582:
+	.loc 2 1419 0
 	mov	w0, -1
-.L1565:
-	.loc 2 1463 0
+.L1573:
+	.loc 2 1512 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1638:
+.LVL1647:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -18791,73 +18919,73 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1566:
+.L1574:
 	.cfi_restore_state
-	add	x23, x19, 2648
-	.loc 2 1372 0
+	add	x23, x19, 2632
+	.loc 2 1421 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1639:
+.LVL1648:
 	sxth	w22, w0
-.LVL1640:
-	.loc 2 1373 0
+.LVL1649:
+	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1382 0
+	.loc 2 1431 0
 	mov	w24, 61604
-	.loc 2 1373 0
+	.loc 2 1422 0
 	strh	w0, [x23, 2]
-	.loc 2 1381 0
+	.loc 2 1430 0
 	mov	w23, 19539
 	movk	w23, 0x4654, lsl 16
-.L1568:
-	.loc 2 1375 0
-	tbz	w22, #31, .L1571
-	.loc 2 1388 0
+.L1576:
+	.loc 2 1424 0
+	tbz	w22, #31, .L1579
+	.loc 2 1437 0
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1388
+	mov	w2, 1437
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1641:
-.L1570:
-	.loc 2 1390 0
+.LVL1650:
+.L1578:
+	.loc 2 1439 0
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 20]
 	ldrh	w1, [x1, 90]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1573
-	.loc 2 1390 0 is_stmt 0 discriminator 1
+	bcs	.L1581
+	.loc 2 1439 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1390
+	mov	w2, 1439
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1642:
-.L1573:
-	.loc 2 1392 0 is_stmt 1
+.LVL1651:
+.L1581:
+	.loc 2 1441 0 is_stmt 1
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w2, 48
-	add	x21, x19, 2592
+	add	x21, x19, 2288
 	mov	x0, x21
-	ldr	x1, [x19, 3368]
+	ldr	x1, [x19, 3352]
 	bl	ftl_memcpy
-.LVL1643:
-	.loc 2 1393 0
-	ldr	x0, [x19, 2320]
+.LVL1652:
+	.loc 2 1442 0
+	ldr	x0, [x19, 2352]
 	ldrh	w2, [x19, 20]
-	ldr	x1, [x19, 3368]
+	ldr	x1, [x19, 3352]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL1644:
-	.loc 2 1394 0
+.LVL1653:
+	.loc 2 1443 0
 	ldrh	w1, [x19, 20]
-	ldr	x0, [x19, 3368]
+	ldr	x0, [x19, 3352]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
 	add	x1, x1, 48
@@ -18866,238 +18994,238 @@ FtlLoadSysInfo:
 	add	x1, x0, x1
 	ldr	x0, [x20, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-.LVL1645:
-	.loc 2 1396 0
-	ldr	w1, [x19, 2592]
+.LVL1654:
+	.loc 2 1445 0
+	ldr	w1, [x19, 2288]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1574
-	.loc 2 1399 0
-	ldrh	w1, [x19, 2600]
-	.loc 2 1400 0
-	ldrb	w2, [x19, 2602]
+	bne	.L1582
+	.loc 2 1448 0
+	ldrh	w1, [x19, 2296]
+	.loc 2 1449 0
+	ldrb	w2, [x19, 2298]
 	ldrh	w0, [x19, 34]
-	.loc 2 1399 0
-	strh	w1, [x19, 2654]
-	.loc 2 1400 0
+	.loc 2 1448 0
+	strh	w1, [x19, 2638]
+	.loc 2 1449 0
 	cmp	w2, w0
-	bne	.L1574
-	.loc 2 1403 0
-	adrp	x0, .LANCHOR3+88
-	.loc 2 1405 0
+	bne	.L1582
+	.loc 2 1452 0
+	adrp	x0, .LANCHOR3+80
+	.loc 2 1454 0
 	ldrh	w2, [x19, 38]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	w3, [x19, 12]
-	.loc 2 1403 0
-	str	w1, [x0, #:lo12:.LANCHOR3+88]
-	.loc 2 1404 0
+	.loc 2 1452 0
+	str	w1, [x0, #:lo12:.LANCHOR3+80]
+	.loc 2 1453 0
 	ldrh	w0, [x19, 82]
 	mul	w0, w0, w1
-	str	w0, [x19, 2520]
-	.loc 2 1405 0
+	str	w0, [x19, 2560]
+	.loc 2 1454 0
 	mul	w0, w2, w0
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldr	w2, [x19, 24]
-	.loc 2 1405 0
+	.loc 2 1454 0
 	str	w0, [x19, 120]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	w0, [x19, 142]
-	.loc 2 1412 0
+	.loc 2 1461 0
 	cmp	w1, w2
-	.loc 2 1406 0
+	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	strh	w0, [x19, 2640]
-	.loc 2 1412 0
-	bls	.L1575
-	.loc 2 1412 0 is_stmt 0 discriminator 1
+	strh	w0, [x19, 2628]
+	.loc 2 1461 0
+	bls	.L1583
+	.loc 2 1461 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1412
+	mov	w2, 1461
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1646:
-.L1575:
-	.loc 2 1414 0 is_stmt 1
+.LVL1655:
+.L1583:
+	.loc 2 1463 0 is_stmt 1
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 2 1419 0
+	.loc 2 1468 0
 	mov	w3, -1
-	.loc 2 1415 0
-	ldrh	w2, [x0, 2608]
-	.loc 2 1414 0
-	ldrh	w4, [x0, 2606]
-	strh	w4, [x0, 2360]
-	.loc 2 1415 0
+	.loc 2 1464 0
+	ldrh	w2, [x0, 2304]
+	.loc 2 1463 0
+	ldrh	w4, [x0, 2302]
+	strh	w4, [x0, 2400]
+	.loc 2 1464 0
 	lsr	w5, w2, 6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2366]
-	.loc 2 1417 0
-	ldrb	w2, [x0, 2603]
-	strb	w2, [x0, 2368]
-	.loc 2 1424 0
-	ldrh	w2, [x0, 2610]
-	strh	w2, [x0, 2408]
-	.loc 2 1425 0
-	ldrh	w2, [x0, 2612]
-	.loc 2 1415 0
-	strh	w5, [x0, 2362]
-	.loc 2 1419 0
-	strh	w3, [x0, 2664]
-	.loc 2 1425 0
+	strb	w2, [x0, 2406]
+	.loc 2 1466 0
+	ldrb	w2, [x0, 2299]
+	strb	w2, [x0, 2408]
+	.loc 2 1473 0
+	ldrh	w2, [x0, 2306]
+	strh	w2, [x0, 2448]
+	.loc 2 1474 0
+	ldrh	w2, [x0, 2308]
+	.loc 2 1464 0
+	strh	w5, [x0, 2402]
+	.loc 2 1468 0
+	strh	w3, [x0, 2648]
+	.loc 2 1474 0
 	lsr	w5, w2, 6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2414]
-	.loc 2 1427 0
-	ldrb	w2, [x0, 2604]
-	strb	w2, [x0, 2416]
-	.loc 2 1429 0
-	ldrh	w2, [x0, 2614]
-	strh	w2, [x0, 2456]
-	.loc 2 1430 0
-	ldrh	w2, [x0, 2616]
-	.loc 2 1425 0
-	strh	w5, [x0, 2410]
-	.loc 2 1420 0
-	strh	wzr, [x0, 2666]
-	.loc 2 1430 0
+	strb	w2, [x0, 2454]
+	.loc 2 1476 0
+	ldrb	w2, [x0, 2300]
+	strb	w2, [x0, 2456]
+	.loc 2 1478 0
+	ldrh	w2, [x0, 2310]
+	strh	w2, [x0, 2496]
+	.loc 2 1479 0
+	ldrh	w2, [x0, 2312]
+	.loc 2 1474 0
+	strh	w5, [x0, 2450]
+	.loc 2 1469 0
+	strh	wzr, [x0, 2650]
+	.loc 2 1479 0
 	lsr	w5, w2, 6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2462]
-	.loc 2 1432 0
-	ldrb	w2, [x0, 2605]
-	strb	w2, [x0, 2464]
-	.loc 2 1439 0
-	ldr	w2, [x0, 2624]
-	str	w2, [x0, 2564]
-	.loc 2 1421 0
-	strb	wzr, [x0, 2670]
-	.loc 2 1422 0
-	strb	wzr, [x0, 2672]
-	.loc 2 1430 0
-	strh	w5, [x0, 2458]
-	.loc 2 1436 0
-	str	wzr, [x0, 2524]
-	.loc 2 1435 0
-	str	wzr, [x0, 2532]
-	.loc 2 1437 0
-	str	wzr, [x0, 2540]
-	.loc 2 1434 0
-	str	wzr, [x0, 2544]
-	.loc 2 1440 0
-	str	wzr, [x0, 2568]
-	.loc 2 1441 0
+	strb	w2, [x0, 2502]
+	.loc 2 1481 0
+	ldrb	w2, [x0, 2301]
+	strb	w2, [x0, 2504]
+	.loc 2 1488 0
+	ldr	w2, [x0, 2320]
+	str	w2, [x0, 2604]
+	.loc 2 1470 0
+	strb	wzr, [x0, 2654]
+	.loc 2 1471 0
+	strb	wzr, [x0, 2656]
+	.loc 2 1479 0
+	strh	w5, [x0, 2498]
+	.loc 2 1485 0
+	str	wzr, [x0, 2564]
+	.loc 2 1484 0
+	str	wzr, [x0, 2572]
+	.loc 2 1486 0
 	str	wzr, [x0, 2580]
-	.loc 2 1444 0
-	ldr	w2, [x0, 2556]
-	ldr	w1, [x0, 2632]
-	.loc 2 1442 0
-	str	wzr, [x0, 2536]
-	.loc 2 1444 0
+	.loc 2 1483 0
+	str	wzr, [x0, 2584]
+	.loc 2 1489 0
+	str	wzr, [x0, 2608]
+	.loc 2 1490 0
+	str	wzr, [x0, 2620]
+	.loc 2 1493 0
+	ldr	w1, [x0, 2328]
+	ldr	w2, [x0, 2596]
+	.loc 2 1491 0
+	str	wzr, [x0, 2576]
+	.loc 2 1493 0
 	cmp	w1, w2
-	bls	.L1576
-	.loc 2 1445 0
-	str	w1, [x0, 2556]
-.L1576:
-	.loc 2 1447 0
+	bls	.L1584
+	.loc 2 1494 0
+	str	w1, [x0, 2596]
+.L1584:
+	.loc 2 1496 0
 	add	x0, x20, :lo12:.LANCHOR0
-	ldr	w2, [x0, 2560]
-	ldr	w1, [x0, 2628]
+	ldr	w1, [x0, 2324]
+	ldr	w2, [x0, 2600]
 	cmp	w1, w2
-	bls	.L1577
-	.loc 2 1448 0
-	str	w1, [x0, 2560]
-.L1577:
-	.loc 2 1450 0
+	bls	.L1585
+	.loc 2 1497 0
+	str	w1, [x0, 2600]
+.L1585:
+	.loc 2 1499 0
 	mov	w0, 65535
 	cmp	w4, w0
-	beq	.L1578
-	.loc 2 1451 0
+	beq	.L1586
+	.loc 2 1500 0
 	add	x0, x20, :lo12:.LANCHOR0
-	add	x0, x0, 2360
+	add	x0, x0, 2400
 	bl	make_superblock
-.LVL1647:
-.L1578:
-	.loc 2 1453 0
+.LVL1656:
+.L1586:
+	.loc 2 1502 0
 	add	x1, x20, :lo12:.LANCHOR0
-	add	x0, x1, 2408
-	ldrh	w2, [x1, 2408]
+	add	x0, x1, 2448
+	ldrh	w2, [x1, 2448]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1579
-	.loc 2 1454 0
+	beq	.L1587
+	.loc 2 1503 0
 	bl	make_superblock
-.LVL1648:
-.L1579:
-	.loc 2 1456 0
+.LVL1657:
+.L1587:
+	.loc 2 1505 0
 	add	x1, x20, :lo12:.LANCHOR0
-	add	x0, x1, 2456
-	ldrh	w2, [x1, 2456]
+	add	x0, x1, 2496
+	ldrh	w2, [x1, 2496]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1580
-	.loc 2 1457 0
+	beq	.L1588
+	.loc 2 1506 0
 	bl	make_superblock
-.LVL1649:
-.L1580:
-	.loc 2 1459 0
+.LVL1658:
+.L1588:
+	.loc 2 1508 0
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
-	add	x0, x20, 2664
-	ldrh	w2, [x20, 2664]
+	add	x0, x20, 2648
+	ldrh	w2, [x20, 2648]
 	cmp	w2, w1
-	beq	.L1581
-	.loc 2 1460 0
+	beq	.L1589
+	.loc 2 1509 0
 	bl	make_superblock
-.LVL1650:
-.L1581:
-	.loc 2 1462 0
+.LVL1659:
+.L1589:
+	.loc 2 1511 0
 	mov	w0, 0
-	b	.L1565
-.L1571:
-	.loc 2 1376 0
-	ldrh	w0, [x19, 2648]
-	.loc 2 1378 0
+	b	.L1573
+.L1579:
+	.loc 2 1425 0
+	ldrh	w0, [x19, 2632]
+	.loc 2 1427 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1377 0
-	ldr	x0, [x19, 2288]
+	.loc 2 1426 0
+	ldr	x0, [x19, 3376]
 	str	x0, [x21, 8]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1651:
-	.loc 2 1381 0
+.LVL1660:
+	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1569
-	.loc 2 1382 0 discriminator 1
-	ldr	x0, [x19, 2288]
-	.loc 2 1381 0 discriminator 1
+	beq	.L1577
+	.loc 2 1431 0 discriminator 1
+	ldr	x0, [x19, 3376]
+	.loc 2 1430 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1569
-	.loc 2 1383 0
-	ldr	x0, [x19, 3392]
+	bne	.L1577
+	.loc 2 1432 0
+	ldr	x0, [x19, 3384]
 	ldrh	w0, [x0]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	cmp	w0, w24
-	beq	.L1570
-.L1569:
+	beq	.L1578
+.L1577:
 	sub	w22, w22, #1
-.LVL1652:
+.LVL1661:
 	sxth	w22, w22
-.LVL1653:
-	b	.L1568
+.LVL1662:
+	b	.L1576
 	.cfi_endproc
 .LFE213:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -19106,7 +19234,7 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 .LFB231:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
@@ -19117,40 +19245,40 @@ FtlSysBlkInit:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 2312 0
+	.loc 2 2362 0
 	adrp	x20, .LANCHOR0
-	.loc 2 2306 0
+	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2312 0
+	.loc 2 2362 0
 	add	x19, x20, :lo12:.LANCHOR0
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 2310 0
+	.loc 2 2360 0
 	adrp	x21, .LANCHOR3
 	add	x0, x21, :lo12:.LANCHOR3
-	.loc 2 2306 0
+	.loc 2 2356 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -16
 	.cfi_offset 24, -8
-	.loc 2 2310 0
-	strh	wzr, [x0, -80]
-	.loc 2 2312 0
+	.loc 2 2360 0
+	strh	wzr, [x0, -88]
+	.loc 2 2362 0
 	ldrh	w0, [x19, 16]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1654:
-	.loc 2 2313 0
+.LVL1663:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1655:
-	.loc 2 2314 0
-	ldrh	w1, [x19, 2648]
+.LVL1664:
+	.loc 2 2364 0
+	ldrh	w1, [x19, 2632]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1588
-.L1590:
-	.loc 2 2315 0
+	bne	.L1596
+.L1598:
+	.loc 2 2365 0
 	mov	w24, -1
-.L1587:
-	.loc 2 2398 0
+.L1595:
+	.loc 2 2448 0
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -19167,193 +19295,193 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1588:
+.L1596:
 	.cfi_restore_state
-	.loc 2 2317 0
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1656:
+.LVL1665:
 	mov	w24, w0
-	cbnz	w0, .L1590
-	.loc 2 2320 0
+	cbnz	w0, .L1598
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1657:
-	.loc 2 2321 0
+.LVL1666:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1658:
-	.loc 2 2322 0
+.LVL1667:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1659:
-	.loc 2 2324 0
+.LVL1668:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1660:
-	.loc 2 2325 0
+.LVL1669:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1661:
-	.loc 2 2327 0
+.LVL1670:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1662:
-	.loc 2 2328 0
+.LVL1671:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1663:
-	.loc 2 2330 0
+.LVL1672:
+	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL1664:
-	ldr	x1, [x19, 2504]
-.LBB302:
-.LBB303:
-	.loc 2 2332 0
+.LVL1673:
+	ldr	x1, [x19, 2544]
+.LBB330:
+.LBB331:
+	.loc 2 2382 0
 	mov	w0, 0
-.LVL1665:
+.LVL1674:
 	ldrh	w3, [x19, 118]
 	add	x1, x1, 4
-.L1591:
+.L1599:
 	cmp	w0, w3
-	bge	.L1596
-	.loc 2 2333 0
+	bge	.L1604
+	.loc 2 2383 0
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L1592
-.L1596:
-	.loc 2 2336 0
+	tbz	w2, #31, .L1600
+.L1604:
+	.loc 2 2386 0
 	add	x1, x20, :lo12:.LANCHOR0
-	.loc 2 2338 0
+	.loc 2 2388 0
 	cmp	w0, w3
-	.loc 2 2336 0
-	ldrh	w2, [x1, 2620]
+	.loc 2 2386 0
+	ldrh	w2, [x1, 2316]
 	add	w2, w2, 1
-	strh	w2, [x1, 2620]
-	.loc 2 2338 0
-	bge	.L1602
-.L1593:
-	.loc 2 2339 0
+	strh	w2, [x1, 2316]
+	.loc 2 2388 0
+	bge	.L1610
+.L1601:
+	.loc 2 2389 0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 2359 0
+	.loc 2 2409 0
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 2 2339 0
-	add	x23, x19, 2360
-	.loc 2 2340 0
-	add	x22, x19, 2408
-	.loc 2 2339 0
+	.loc 2 2389 0
+	add	x23, x19, 2400
+	.loc 2 2390 0
+	add	x22, x19, 2448
+	.loc 2 2389 0
 	mov	x0, x23
-.LVL1666:
+.LVL1675:
 	bl	FtlSuperblockPowerLostFix
-.LVL1667:
-	.loc 2 2340 0
+.LVL1676:
+	.loc 2 2390 0
 	mov	x0, x22
 	bl	FtlSuperblockPowerLostFix
-.LVL1668:
-.LBB304:
-	.loc 2 2346 0
-	ldrh	w0, [x19, 2360]
-	ldr	x2, [x19, 2320]
-	ldrh	w3, [x19, 2364]
+.LVL1677:
+.LBB332:
+	.loc 2 2396 0
+	ldrh	w0, [x19, 2400]
+	ldr	x2, [x19, 2352]
+	ldrh	w3, [x19, 2404]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2348 0
-	strb	wzr, [x19, 2366]
-	.loc 2 2347 0
+	.loc 2 2398 0
+	strb	wzr, [x19, 2406]
+	.loc 2 2397 0
 	ldrh	w0, [x19, 82]
-	strh	w0, [x19, 2362]
-	.loc 2 2352 0
-	ldrh	w0, [x19, 2408]
-	ldr	x2, [x19, 2320]
-	.loc 2 2349 0
-	strh	wzr, [x19, 2364]
-	.loc 2 2352 0
+	strh	w0, [x19, 2402]
+	.loc 2 2402 0
+	ldrh	w0, [x19, 2448]
+	ldr	x2, [x19, 2352]
+	.loc 2 2399 0
+	strh	wzr, [x19, 2404]
+	.loc 2 2402 0
 	lsl	x0, x0, 1
-	ldrh	w3, [x19, 2412]
+	ldrh	w3, [x19, 2452]
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2354 0
-	strb	wzr, [x19, 2414]
-	.loc 2 2353 0
+	.loc 2 2404 0
+	strb	wzr, [x19, 2454]
+	.loc 2 2403 0
 	ldrh	w0, [x19, 82]
-	strh	w0, [x19, 2410]
-.LBE304:
-	.loc 2 2359 0
-	sub	x0, x21, #240
-.LBB305:
-	.loc 2 2355 0
-	strh	wzr, [x19, 2412]
-.LBE305:
-	.loc 2 2359 0
+	strh	w0, [x19, 2450]
+.LBE332:
+	.loc 2 2409 0
+	sub	x0, x21, #248
+.LBB333:
+	.loc 2 2405 0
+	strh	wzr, [x19, 2452]
+.LBE333:
+	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1669:
-	.loc 2 2360 0
-	sub	x0, x21, #168
+.LVL1678:
+	.loc 2 2410 0
+	sub	x0, x21, #176
 	bl	FtlMapBlkWriteDump_data
-.LVL1670:
-	.loc 2 2372 0
-	ldrh	w0, [x19, 2622]
+.LVL1679:
+	.loc 2 2422 0
+	ldrh	w0, [x19, 2318]
 	add	w0, w0, 1
-	strh	w0, [x19, 2622]
-	.loc 2 2373 0
+	strh	w0, [x19, 2318]
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1671:
-	.loc 2 2374 0
+.LVL1680:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1672:
-	.loc 2 2375 0
+.LVL1681:
+	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1673:
-	b	.L1597
-.LVL1674:
-.L1592:
-	.loc 2 2332 0
+.LVL1682:
+	b	.L1605
+.LVL1683:
+.L1600:
+	.loc 2 2382 0
 	add	w0, w0, 1
-	b	.L1591
-.L1602:
-	.loc 2 2338 0
+	b	.L1599
+.L1610:
+	.loc 2 2388 0
 	add	x0, x21, :lo12:.LANCHOR3
-.LVL1675:
-	ldrh	w0, [x0, -80]
-	cbnz	w0, .L1593
-.L1597:
-	.loc 2 2379 0
+.LVL1684:
+	ldrh	w0, [x0, -88]
+	cbnz	w0, .L1601
+.L1605:
+	.loc 2 2429 0
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
-	add	x22, x19, 2360
-	ldrh	w0, [x19, 2360]
+	add	x22, x19, 2400
+	ldrh	w0, [x19, 2400]
 	cmp	w0, w1
-	beq	.L1598
-	ldrh	w1, [x19, 2364]
-	cbnz	w1, .L1598
-	.loc 2 2380 0
-	ldrh	w1, [x19, 2412]
-	.loc 2 2381 0
-	add	x21, x19, 2408
-	.loc 2 2380 0
-	cbnz	w1, .L1598
-	.loc 2 2382 0
+	beq	.L1606
+	ldrh	w1, [x19, 2404]
+	cbnz	w1, .L1606
+	.loc 2 2430 0
+	ldrh	w1, [x19, 2452]
+	.loc 2 2431 0
+	add	x21, x19, 2448
+	.loc 2 2430 0
+	cbnz	w1, .L1606
+	.loc 2 2432 0
 	bl	FtlGcRefreshBlock
-.LVL1676:
-	.loc 2 2383 0
-	ldrh	w0, [x19, 2408]
+.LVL1685:
+	.loc 2 2433 0
+	ldrh	w0, [x19, 2448]
 	bl	FtlGcRefreshBlock
-.LVL1677:
-	.loc 2 2384 0
+.LVL1686:
+	.loc 2 2434 0
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.LVL1678:
-	.loc 2 2385 0
+.LVL1687:
+	.loc 2 2435 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL1679:
-.L1598:
-	.loc 2 2390 0
+.LVL1688:
+.L1606:
+	.loc 2 2440 0
 	add	x20, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x20, 2620]
+	ldrh	w0, [x20, 2316]
 	tst	x0, 31
-	bne	.L1587
-	.loc 2 2391 0
+	bne	.L1595
+	.loc 2 2441 0
 	bl	FtlVpcCheckAndModify
-.LVL1680:
-	b	.L1587
-.LBE303:
-.LBE302:
+.LVL1689:
+	b	.L1595
+.LBE331:
+.LBE330:
 	.cfi_endproc
 .LFE231:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -19383,149 +19511,149 @@ ftl_low_format:
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
 	.loc 3 629 0
-	str	wzr, [x0, 2556]
+	str	wzr, [x0, 2596]
 	.loc 3 630 0
-	str	wzr, [x0, 2560]
+	str	wzr, [x0, 2600]
 	.loc 3 631 0
 	ldrh	w0, [x0, 16]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1681:
+.LVL1690:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1682:
-	cbz	w0, .L1605
+.LVL1691:
+	cbz	w0, .L1613
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL1683:
-.L1605:
+.LVL1692:
+.L1613:
 	.loc 3 637 0 discriminator 1
 	mov	w4, 23752
 	.loc 3 635 0 discriminator 1
 	add	x1, x20, :lo12:.LANCHOR0
 	.loc 3 623 0 discriminator 1
 	mov	w0, 0
-.LVL1684:
+.LVL1693:
 	.loc 3 637 0 discriminator 1
 	movk	w4, 0xa0f, lsl 16
-.L1606:
+.L1614:
 	.loc 3 635 0 discriminator 1
 	ldrh	w2, [x1, 38]
 	cmp	w0, w2, lsl 7
-	blt	.L1607
+	blt	.L1615
 	.loc 3 642 0
 	ldrh	w21, [x1, 20]
 	add	x22, x20, :lo12:.LANCHOR0
 	.loc 3 641 0
 	mov	w19, 0
-.LVL1685:
-.L1608:
+.LVL1694:
+.L1616:
 	.loc 3 642 0 discriminator 1
 	ldrh	w0, [x22, 22]
-.LVL1686:
+.LVL1695:
 	cmp	w0, w21
-	bhi	.L1609
+	bhi	.L1617
 	.loc 3 645 0
 	ldrh	w0, [x22, 12]
 	sub	w1, w19, #3
 	cmp	w1, w0, lsl 1
-	bge	.L1610
-.L1614:
+	bge	.L1618
+.L1622:
 	.loc 3 656 0
 	add	x19, x20, :lo12:.LANCHOR0
-.LVL1687:
+.LVL1696:
 	.loc 3 641 0
 	mov	w21, 0
-.LVL1688:
+.LVL1697:
 	mov	w22, 0
-.L1611:
+.L1619:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x19, 20]
 	cmp	w0, w22
-	bhi	.L1615
+	bhi	.L1623
 	.loc 3 661 0
 	ldrh	w2, [x19, 12]
 	ldr	w1, [x19, 24]
 	.loc 3 658 0
 	ldrh	w0, [x19, 22]
-	str	w0, [x19, 3920]
+	str	w0, [x19, 3912]
 	.loc 3 661 0
 	udiv	w4, w1, w2
 	.loc 3 662 0
 	ubfx	x3, x4, 5, 16
 	.loc 3 661 0
-	str	w4, [x19, 2520]
+	str	w4, [x19, 2560]
 	.loc 3 662 0
 	add	w0, w3, 36
-	strh	w0, [x19, 2640]
+	strh	w0, [x19, 2628]
 	.loc 3 663 0
 	mov	w0, 24
 	mul	w0, w2, w0
 	cmp	w21, w0
-	ble	.L1616
+	ble	.L1624
 	.loc 3 664 0
 	sub	w1, w1, w21
 	udiv	w1, w1, w2
-	str	w1, [x19, 2520]
+	str	w1, [x19, 2560]
 	.loc 3 665 0
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x19, 2640]
-.L1616:
+	strh	w1, [x19, 2628]
+.L1624:
 	.loc 3 668 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L1618
+	cbz	w1, .L1626
 	.loc 3 669 0
-	ldrh	w5, [x0, 2640]
+	ldrh	w5, [x0, 2628]
 	add	w5, w5, w1, lsr 1
-	strh	w5, [x0, 2640]
+	strh	w5, [x0, 2628]
 	.loc 3 670 0
 	mul	w5, w1, w2
 	cmp	w21, w5
-	bge	.L1618
+	bge	.L1626
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
-	str	w4, [x0, 2520]
+	str	w4, [x0, 2560]
 	.loc 3 672 0
 	add	w1, w3, w1
-	strh	w1, [x0, 2640]
-.L1618:
+	strh	w1, [x0, 2628]
+.L1626:
 	.loc 3 677 0
 	add	x19, x20, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR3
 	.loc 3 694 0
-	add	x21, x19, 2360
-.LVL1689:
+	add	x21, x19, 2400
+.LVL1698:
 	.loc 3 689 0
 	mov	w23, -1
 	.loc 3 677 0
-	ldrh	w1, [x19, 2640]
-	ldr	w0, [x19, 2520]
+	ldrh	w1, [x19, 2628]
+	ldr	w0, [x19, 2560]
 	sub	w0, w0, w1
 	add	x1, x22, :lo12:.LANCHOR3
 	mul	w0, w0, w2
-	str	w0, [x1, 88]
+	str	w0, [x1, 80]
 	.loc 3 678 0
 	ldrh	w1, [x19, 82]
 	mul	w0, w1, w0
 	.loc 3 679 0
 	ldrh	w1, [x19, 38]
 	.loc 3 678 0
-	str	w0, [x19, 2520]
+	str	w0, [x19, 2560]
 	.loc 3 679 0
 	mul	w0, w1, w0
 	str	w0, [x19, 120]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL1690:
+.LVL1699:
 	.loc 3 687 0
-	ldr	x0, [x19, 2320]
+	ldr	x0, [x19, 2352]
 	mov	w1, 0
 	ldrh	w2, [x19, 22]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1691:
+.LVL1700:
 	.loc 3 697 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -19534,37 +19662,37 @@ ftl_low_format:
 	mov	w1, 255
 	ldrh	w2, [x19, 20]
 	.loc 3 689 0
-	strh	w23, [x19, 2664]
+	strh	w23, [x19, 2648]
 	.loc 3 690 0
-	strh	wzr, [x19, 2666]
+	strh	wzr, [x19, 2650]
 	.loc 3 691 0
-	strb	wzr, [x19, 2670]
+	strb	wzr, [x19, 2654]
 	.loc 3 698 0
 	lsr	w2, w2, 3
 	.loc 3 692 0
-	strb	wzr, [x19, 2672]
+	strb	wzr, [x19, 2656]
 	.loc 3 694 0
 	strh	wzr, [x21, 2]
 	.loc 3 695 0
 	strb	wzr, [x21, 6]
 	.loc 3 696 0
-	strh	wzr, [x19, 2360]
+	strh	wzr, [x19, 2400]
 	.loc 3 688 0
-	str	wzr, [x19, 2516]
+	str	wzr, [x19, 2556]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL1692:
-.L1620:
+.LVL1701:
+.L1628:
 	.loc 3 701 0
 	mov	x0, x21
 	bl	make_superblock
-.LVL1693:
+.LVL1702:
 	.loc 3 702 0
 	ldrb	w1, [x21, 7]
 	ldrh	w0, [x21]
-	cbnz	w1, .L1621
+	cbnz	w1, .L1629
 	.loc 3 705 0
-	ldr	x1, [x19, 2320]
+	ldr	x1, [x19, 2352]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	.loc 3 706 0
@@ -19572,27 +19700,27 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x21]
 	.loc 3 707 0
-	b	.L1620
-.LVL1694:
-.L1607:
+	b	.L1628
+.LVL1703:
+.L1615:
 	.loc 3 636 0 discriminator 3
-	ldr	x5, [x1, 3944]
+	ldr	x5, [x1, 3936]
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL1695:
+.LVL1704:
 	and	w0, w0, 65535
-.LVL1696:
+.LVL1705:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x5, x3]
 	.loc 3 637 0 discriminator 3
-	ldr	x2, [x1, 3928]
+	ldr	x2, [x1, 3920]
 	str	w4, [x2, x3]
-	b	.L1606
-.LVL1697:
-.L1609:
+	b	.L1614
+.LVL1706:
+.L1617:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w21
 	mov	w1, 1
@@ -19600,37 +19728,37 @@ ftl_low_format:
 	add	w21, w21, 1
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1698:
+.LVL1707:
 	add	w19, w19, w0
-.LVL1699:
+.LVL1708:
 	.loc 3 642 0 discriminator 3
 	and	w21, w21, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1700:
-	b	.L1608
-.L1610:
+.LVL1709:
+	b	.L1616
+.L1618:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	ldr	w19, [x22, 112]
-.LVL1701:
+.LVL1710:
 	.loc 3 650 0
 	add	x21, x20, :lo12:.LANCHOR0
 	.loc 3 647 0
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL1702:
+.LVL1711:
 	.loc 3 648 0
 	ldrh	w0, [x22, 16]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1703:
+.LVL1712:
 	.loc 3 650 0
 	ldrh	w19, [x22, 20]
-.L1612:
+.L1620:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 22]
 	cmp	w0, w19
-	bls	.L1614
+	bls	.L1622
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
@@ -19641,10 +19769,10 @@ ftl_low_format:
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1704:
-	b	.L1612
-.LVL1705:
-.L1615:
+.LVL1713:
+	b	.L1620
+.LVL1714:
+.L1623:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w22
 	mov	w1, 0
@@ -19652,57 +19780,57 @@ ftl_low_format:
 	add	w22, w22, 1
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1706:
+.LVL1715:
 	add	w21, w21, w0
-.LVL1707:
+.LVL1716:
 	.loc 3 656 0 discriminator 3
 	and	w22, w22, 65535
 	.loc 3 657 0 discriminator 3
 	and	w21, w21, 65535
-.LVL1708:
-	b	.L1611
-.LVL1709:
-.L1621:
+.LVL1717:
+	b	.L1619
+.LVL1718:
+.L1629:
 	.loc 3 709 0
-	ldr	w1, [x19, 2556]
+	ldr	w1, [x19, 2596]
 	.loc 3 710 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 709 0
 	str	w1, [x21, 12]
 	add	w1, w1, 1
-	str	w1, [x19, 2556]
+	str	w1, [x19, 2596]
 	.loc 3 710 0
-	ldr	x1, [x19, 2320]
+	ldr	x1, [x19, 2352]
 	ldrh	w2, [x21, 4]
 	strh	w2, [x1, x0]
 	.loc 3 712 0
-	add	x0, x19, 2408
-	strh	wzr, [x19, 2410]
+	add	x0, x19, 2448
+	strh	wzr, [x19, 2450]
 	.loc 3 714 0
 	ldrh	w1, [x21]
 	.loc 3 721 0
 	mov	w21, -1
 	.loc 3 713 0
-	strb	wzr, [x19, 2414]
+	strb	wzr, [x19, 2454]
 	.loc 3 714 0
 	add	w1, w1, 1
-	strh	w1, [x19, 2408]
+	strh	w1, [x19, 2448]
 	.loc 3 715 0
 	mov	w1, 1
-	strb	w1, [x19, 2416]
+	strb	w1, [x19, 2456]
 	.loc 3 717 0
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	x20, x0
-.L1622:
+.L1630:
 	mov	x0, x20
 	bl	make_superblock
-.LVL1710:
+.LVL1719:
 	.loc 3 718 0
 	ldrb	w1, [x20, 7]
 	ldrh	w0, [x20]
-	cbnz	w1, .L1623
+	cbnz	w1, .L1631
 	.loc 3 721 0
-	ldr	x1, [x19, 2320]
+	ldr	x1, [x19, 2352]
 	ubfiz	x0, x0, 1, 16
 	strh	w21, [x1, x0]
 	.loc 3 722 0
@@ -19710,57 +19838,57 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x20]
 	.loc 3 723 0
-	b	.L1622
-.L1623:
+	b	.L1630
+.L1631:
 	.loc 3 725 0
-	ldr	w1, [x19, 2556]
+	ldr	w1, [x19, 2596]
 	.loc 3 726 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 725 0
 	str	w1, [x20, 12]
-	.loc 3 727 0
-	mov	w4, -1
-	.loc 3 725 0
-	add	w1, w1, 1
-	str	w1, [x19, 2556]
-	.loc 3 726 0
-	ldr	x1, [x19, 2320]
 	.loc 3 733 0
 	add	x22, x22, :lo12:.LANCHOR3
+	.loc 3 725 0
+	add	w1, w1, 1
+	str	w1, [x19, 2596]
 	.loc 3 726 0
+	ldr	x1, [x19, 2352]
 	ldrh	w2, [x20, 4]
+	.loc 3 727 0
+	mov	w20, -1
+	.loc 3 726 0
 	strh	w2, [x1, x0]
 	.loc 3 727 0
-	strh	w4, [x19, 2456]
+	strh	w20, [x19, 2496]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1711:
-	strh	w0, [x19, 2648]
+.LVL1720:
+	strh	w0, [x19, 2632]
 	.loc 3 733 0
-	ldr	w0, [x22, 88]
-	strh	w0, [x19, 2654]
+	ldr	w0, [x22, 80]
+	strh	w0, [x19, 2638]
 	.loc 3 734 0
-	ldr	w0, [x19, 2556]
-	str	w0, [x19, 2656]
+	ldr	w0, [x19, 2596]
+	str	w0, [x19, 2640]
 	add	w0, w0, 1
-	.loc 3 732 0
-	strh	w4, [x19, 2652]
 	.loc 3 731 0
-	strh	wzr, [x19, 2650]
+	strh	wzr, [x19, 2634]
+	.loc 3 732 0
+	strh	w20, [x19, 2636]
 	.loc 3 734 0
-	str	w0, [x19, 2556]
+	str	w0, [x19, 2596]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL1712:
+.LVL1721:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL1713:
-	cbnz	w0, .L1624
+.LVL1722:
+	cbnz	w0, .L1632
 	.loc 3 737 0
 	adrp	x0, .LANCHOR2
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR2]
-.L1624:
+.L1632:
 	.loc 3 739 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
@@ -19812,50 +19940,50 @@ sftl_init:
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printk
-.LVL1714:
+.LVL1723:
 	.loc 3 750 0
 	adrp	x0, g_nand_phy_info
 	add	x0, x0, :lo12:g_nand_phy_info
 	bl	FtlConstantsInit
-.LVL1715:
+.LVL1724:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL1716:
+.LVL1725:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL1717:
+.LVL1726:
 	.loc 3 753 0
 	ldrh	w0, [x19, 16]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1718:
+.LVL1727:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL1719:
-	cbnz	w0, .L1633
+.LVL1728:
+	cbnz	w0, .L1641
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL1720:
-	cbnz	w0, .L1633
+.LVL1729:
+	cbnz	w0, .L1641
 	.loc 3 779 0
 	mov	w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR2]
 	.loc 3 783 0
-	ldrh	w0, [x19, 2352]
+	ldrh	w0, [x19, 2392]
 	cmp	w0, 15
-	bhi	.L1633
+	bhi	.L1641
 	mov	w19, 8129
-.L1632:
-.LBB306:
+.L1640:
+.LBB334:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1721:
+.LVL1730:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-	bne	.L1632
-.L1633:
-.LBE306:
+	bne	.L1640
+.L1641:
+.LBE334:
 	.loc 3 794 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -19876,20 +20004,20 @@ ftl_memcmp:
 .LFB268:
 	.loc 1 211 0
 	.cfi_startproc
-.LVL1722:
+.LVL1731:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	.loc 1 212 0
 	uxtw	x2, w2
-.LVL1723:
+.LVL1732:
 	.loc 1 211 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 1 212 0
 	bl	memcmp
-.LVL1724:
+.LVL1733:
 	.loc 1 213 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -20048,55 +20176,55 @@ ftl_memcmp:
 	.section	.rodata
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3775, %object
-	.size	__func__.3775, 17
-__func__.3775:
+	.type	__func__.3769, %object
+	.size	__func__.3769, 17
+__func__.3769:
 	.string	"INSERT_DATA_LIST"
 	.zero	7
-	.type	__func__.3770, %object
-	.size	__func__.3770, 17
-__func__.3770:
+	.type	__func__.3764, %object
+	.size	__func__.3764, 17
+__func__.3764:
 	.string	"INSERT_FREE_LIST"
 	.zero	7
-	.type	__func__.3805, %object
-	.size	__func__.3805, 17
-__func__.3805:
+	.type	__func__.3800, %object
+	.size	__func__.3800, 17
+__func__.3800:
 	.string	"List_remove_node"
 	.zero	7
-	.type	__func__.3837, %object
-	.size	__func__.3837, 22
-__func__.3837:
+	.type	__func__.3832, %object
+	.size	__func__.3832, 22
+__func__.3832:
 	.string	"List_update_data_list"
 	.zero	2
-	.type	__func__.3878, %object
-	.size	__func__.3878, 26
-__func__.3878:
-	.string	"ftl_map_blk_alloc_new_blk"
-	.zero	6
-	.type	__func__.3942, %object
-	.size	__func__.3942, 22
-__func__.3942:
+	.type	__func__.3938, %object
+	.size	__func__.3938, 22
+__func__.3938:
 	.string	"select_l2p_ram_region"
 	.zero	2
-	.type	__func__.4265, %object
-	.size	__func__.4265, 16
-__func__.4265:
+	.type	__func__.4261, %object
+	.size	__func__.4261, 16
+__func__.4261:
 	.string	"make_superblock"
-	.type	__func__.4439, %object
-	.size	__func__.4439, 19
-__func__.4439:
+	.type	__func__.4436, %object
+	.size	__func__.4436, 19
+__func__.4436:
 	.string	"get_new_active_ppa"
 	.zero	5
-	.type	__func__.4679, %object
-	.size	__func__.4679, 15
-__func__.4679:
+	.type	__func__.4676, %object
+	.size	__func__.4676, 15
+__func__.4676:
 	.string	"FlashReadPages"
 	.zero	1
-	.type	__func__.4696, %object
-	.size	__func__.4696, 15
-__func__.4696:
+	.type	__func__.4693, %object
+	.size	__func__.4693, 15
+__func__.4693:
 	.string	"FlashProgPages"
 	.zero	1
+	.type	__func__.3874, %object
+	.size	__func__.3874, 26
+__func__.3874:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.zero	6
 	.type	__func__.3388, %object
 	.size	__func__.3388, 11
 __func__.3388:
@@ -20107,65 +20235,65 @@ __func__.3388:
 __func__.3604:
 	.string	"FtlBbt2Bitmap"
 	.zero	2
-	.type	__func__.3846, %object
-	.size	__func__.3846, 16
-__func__.3846:
+	.type	__func__.3841, %object
+	.size	__func__.3841, 16
+__func__.3841:
 	.string	"load_l2p_region"
-	.type	__func__.3903, %object
-	.size	__func__.3903, 31
-__func__.3903:
+	.type	__func__.3899, %object
+	.size	__func__.3899, 31
+__func__.3899:
 	.string	"Ftl_write_map_blk_to_last_page"
 	.zero	1
-	.type	__func__.3917, %object
-	.size	__func__.3917, 16
-__func__.3917:
+	.type	__func__.3913, %object
+	.size	__func__.3913, 16
+__func__.3913:
 	.string	"FtlMapWritePage"
-	.type	__func__.3889, %object
-	.size	__func__.3889, 15
-__func__.3889:
+	.type	__func__.3885, %object
+	.size	__func__.3885, 15
+__func__.3885:
 	.string	"ftl_map_blk_gc"
 	.zero	1
-	.type	__func__.3959, %object
-	.size	__func__.3959, 9
-__func__.3959:
+	.type	__func__.3955, %object
+	.size	__func__.3955, 9
+__func__.3955:
 	.string	"log2phys"
 	.zero	7
-	.type	__func__.4174, %object
-	.size	__func__.4174, 16
-__func__.4174:
+	.type	__func__.4170, %object
+	.size	__func__.4170, 16
+__func__.4170:
 	.string	"FtlReUsePrevPpa"
-	.type	__func__.4054, %object
-	.size	__func__.4054, 14
-__func__.4054:
+	.type	__func__.4050, %object
+	.size	__func__.4050, 14
+__func__.4050:
 	.string	"FtlScanSysBlk"
 	.zero	2
-	.type	__func__.4286, %object
-	.size	__func__.4286, 18
-__func__.4286:
+	.type	__func__.4282, %object
+	.size	__func__.4282, 18
+__func__.4282:
 	.string	"SupperBlkListInit"
 	.zero	6
-	.type	__func__.4327, %object
-	.size	__func__.4327, 14
-__func__.4327:
+	.type	__func__.4323, %object
+	.size	__func__.4323, 14
+__func__.4323:
 	.string	"ftl_check_vpc"
 	.zero	2
-	.type	__func__.4411, %object
-	.size	__func__.4411, 25
-__func__.4411:
+	.type	__func__.4408, %object
+	.size	__func__.4408, 25
+__func__.4408:
 	.string	"allocate_data_superblock"
 	.zero	7
-	.type	__func__.4452, %object
-	.size	__func__.4452, 16
-__func__.4452:
+	.type	__func__.4449, %object
+	.size	__func__.4449, 16
+__func__.4449:
 	.string	"update_vpc_list"
-	.type	__func__.4459, %object
-	.size	__func__.4459, 20
-__func__.4459:
+	.type	__func__.4456, %object
+	.size	__func__.4456, 20
+__func__.4456:
 	.string	"decrement_vpc_count"
 	.zero	4
-	.type	__func__.4208, %object
-	.size	__func__.4208, 22
-__func__.4208:
+	.type	__func__.4204, %object
+	.size	__func__.4204, 22
+__func__.4204:
 	.string	"FtlRecoverySuperblock"
 	.zero	2
 	.type	__func__.3647, %object
@@ -20173,19 +20301,19 @@ __func__.4208:
 __func__.3647:
 	.string	"FtlLoadBbt"
 	.zero	5
-	.type	__func__.4032, %object
-	.size	__func__.4032, 15
-__func__.4032:
+	.type	__func__.4028, %object
+	.size	__func__.4028, 15
+__func__.4028:
 	.string	"FtlVpcTblFlush"
 	.zero	1
-	.type	__func__.4311, %object
-	.size	__func__.4311, 21
-__func__.4311:
+	.type	__func__.4307, %object
+	.size	__func__.4307, 21
+__func__.4307:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.4432, %object
-	.size	__func__.4432, 29
-__func__.4432:
+	.type	__func__.4429, %object
+	.size	__func__.4429, 29
+__func__.4429:
 	.string	"allocate_new_data_superblock"
 	.zero	3
 	.type	__func__.3512, %object
@@ -20193,14 +20321,14 @@ __func__.4432:
 __func__.3512:
 	.string	"FtlProgPages"
 	.zero	3
-	.type	__func__.4529, %object
-	.size	__func__.4529, 19
-__func__.4529:
+	.type	__func__.4526, %object
+	.size	__func__.4526, 19
+__func__.4526:
 	.string	"FtlGcFreeTempBlock"
 	.zero	5
-	.type	__func__.4635, %object
-	.size	__func__.4635, 23
-__func__.4635:
+	.type	__func__.4632, %object
+	.size	__func__.4632, 23
+__func__.4632:
 	.string	"rk_ftl_garbage_collect"
 	.zero	1
 	.type	__func__.3540, %object
@@ -20208,9 +20336,9 @@ __func__.4635:
 __func__.3540:
 	.string	"FtlWrite"
 	.zero	7
-	.type	__func__.4111, %object
-	.size	__func__.4111, 15
-__func__.4111:
+	.type	__func__.4107, %object
+	.size	__func__.4107, 15
+__func__.4107:
 	.string	"FtlLoadSysInfo"
 	.data
 	.align	2
@@ -20387,14 +20515,10 @@ gBbtInfo:
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.zero	2056
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 8
-p_sys_data_buf:
-	.zero	8
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 8
-p_erase_count_table:
-	.zero	8
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.zero	48
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
@@ -20406,6 +20530,10 @@ p_data_block_list_head:
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
+	.zero	8
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 8
+p_erase_count_table:
 	.zero	8
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
@@ -20521,16 +20649,11 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
-	.zero	4
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.zero	48
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
-	.zero	6
+	.zero	2
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -20634,6 +20757,10 @@ g_gc_bad_block_gc_index:
 	.size	req_sys, 32
 req_sys:
 	.zero	32
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 8
+p_sys_data_buf:
+	.zero	8
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -20986,7 +21113,7 @@ check_vpc_table:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 .LC70:
-	.string	"SFTL version: 5.0.43 20180116"
+	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
 .LC72:
@@ -21002,52 +21129,58 @@ check_vpc_table:
 .LC77:
 	.string	"prog read d error: = %x %x %x\n"
 .LC78:
-	.string	"%s error allocating memory. return -1\n"
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
 .LC79:
-	.string	"region_id = %x phyAddr = %x\n"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 .LC80:
-	.string	"spare:"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 .LC81:
-	.string	"map_ppn:"
+	.string	"%s error allocating memory. return -1\n"
 .LC82:
-	.string	"FtlMapWritePage error = %x \n"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC83:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.string	"spare:"
 .LC84:
-	.string	"ftl_scan_all_data = %x\n"
+	.string	"map_ppn:"
 .LC85:
-	.string	"scan lpa = %x ppa= %x\n"
+	.string	"FtlMapWritePage error = %x \n"
 .LC86:
-	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 .LC87:
-	.string	"...%s enter...\n"
+	.string	"ftl_scan_all_data = %x\n"
 .LC88:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"scan lpa = %x ppa= %x\n"
 .LC89:
-	.string	"free blk vpc error %x = %x  %x\n"
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC90:
-	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+	.string	"...%s enter...\n"
 .LC91:
-	.string	"FtlBbmTblFlush error:%x\n"
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC92:
-	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.string	"free blk vpc error %x = %x  %x\n"
 .LC93:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
 .LC94:
-	.string	"decrement_vpc_count %x = %d\n"
+	.string	"FtlBbmTblFlush error:%x\n"
 .LC95:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 .LC96:
-	.string	"no ect"
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 .LC97:
-	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.string	"decrement_vpc_count %x = %d\n"
 .LC98:
-	.string	"FtlCheckVpc %x = %x  %x\n"
+	.string	"spuer block %x vpn is 0\n "
 .LC99:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.string	"no ect"
 .LC100:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 .LC101:
+	.string	"FtlCheckVpc %x = %x  %x\n"
+.LC102:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+.LC103:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+.LC104:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.text
 .Letext0:
@@ -21066,15 +21199,15 @@ check_vpc_table:
 	.file 18 "<built-in>"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x74f1
+	.4byte	0x75e0
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF660
+	.4byte	.LASF659
 	.byte	0x1
+	.4byte	.LASF660
 	.4byte	.LASF661
-	.4byte	.LASF662
 	.8byte	.Ltext0
 	.8byte	.Letext0-.Ltext0
 	.4byte	.Ldebug_line0
@@ -21359,7 +21492,7 @@ check_vpc_table:
 	.2byte	0x1dc
 	.4byte	0xb9
 	.uleb128 0x12
-	.4byte	.LASF663
+	.4byte	.LASF662
 	.byte	0x4
 	.4byte	0x50
 	.byte	0xb
@@ -23766,27 +23899,27 @@ check_vpc_table:
 	.uleb128 0xd
 	.4byte	.LASF325
 	.byte	0x3
-	.byte	0x6d
+	.byte	0x6c
 	.4byte	0x2f3
 	.uleb128 0xd
 	.4byte	.LASF326
 	.byte	0x3
-	.byte	0x6e
+	.byte	0x6d
 	.4byte	0x2f3
 	.uleb128 0xd
 	.4byte	.LASF327
 	.byte	0x3
-	.byte	0x6f
+	.byte	0x6e
 	.4byte	0x2f3
 	.uleb128 0xd
 	.4byte	.LASF328
 	.byte	0x3
-	.byte	0x70
+	.byte	0x6f
 	.4byte	0x2f3
 	.uleb128 0x1e
 	.4byte	.LASF329
 	.byte	0x3
-	.2byte	0x3bd
+	.2byte	0x3c0
 	.4byte	0x2f
 	.uleb128 0x9
 	.byte	0x3
@@ -23794,7 +23927,7 @@ check_vpc_table:
 	.uleb128 0x1f
 	.4byte	.LASF333
 	.byte	0x3
-	.2byte	0x480
+	.2byte	0x483
 	.4byte	0x2f3
 	.uleb128 0x9
 	.byte	0x3
@@ -23802,7 +23935,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0x2e8
 	.uleb128 0x9
 	.byte	0x3
@@ -23810,7 +23943,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF331
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0x2e8
 	.uleb128 0x9
 	.byte	0x3
@@ -23825,7 +23958,7 @@ check_vpc_table:
 	.uleb128 0x1e
 	.4byte	.LASF332
 	.byte	0x2
-	.2byte	0x8ad
+	.2byte	0x8df
 	.4byte	0x18c1
 	.uleb128 0x9
 	.byte	0x3
@@ -23891,22 +24024,22 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x2d
-	.4byte	.LLST334
+	.4byte	.LLST335
 	.uleb128 0x23
 	.4byte	.LASF339
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x2d
-	.4byte	.LLST335
+	.4byte	.LLST336
 	.uleb128 0x23
 	.4byte	.LASF111
 	.byte	0x1
 	.byte	0xd2
 	.4byte	0x50
-	.4byte	.LLST336
+	.4byte	.LLST337
 	.uleb128 0x24
-	.8byte	.LVL1724
-	.4byte	0x7499
+	.8byte	.LVL1733
+	.4byte	0x7588
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF341
@@ -23923,22 +24056,22 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x2d
-	.4byte	.LLST202
+	.4byte	.LLST203
 	.uleb128 0x23
 	.4byte	.LASF343
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x1a16
-	.4byte	.LLST203
+	.4byte	.LLST204
 	.uleb128 0x23
 	.4byte	.LASF344
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x50
-	.4byte	.LLST204
+	.4byte	.LLST205
 	.uleb128 0x24
-	.8byte	.LVL905
-	.4byte	0x74a4
+	.8byte	.LVL914
+	.4byte	0x7593
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
@@ -23959,22 +24092,22 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xc8
 	.4byte	0x2d
-	.4byte	.LLST116
+	.4byte	.LLST117
 	.uleb128 0x26
 	.string	"c"
 	.byte	0x1
 	.byte	0xc8
 	.4byte	0x2f
-	.4byte	.LLST117
+	.4byte	.LLST118
 	.uleb128 0x26
 	.string	"n"
 	.byte	0x1
 	.byte	0xc8
 	.4byte	0x50
-	.4byte	.LLST118
+	.4byte	.LLST119
 	.uleb128 0x24
-	.8byte	.LVL489
-	.4byte	0x74ad
+	.8byte	.LVL498
+	.4byte	0x759c
 	.byte	0
 	.uleb128 0x27
 	.4byte	.LASF346
@@ -23991,29 +24124,29 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x456
-	.4byte	.LLST199
+	.4byte	.LLST200
 	.uleb128 0x26
 	.string	"die"
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0xa1
-	.4byte	.LLST200
+	.4byte	.LLST201
 	.uleb128 0x28
 	.4byte	.LASF111
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x8b
-	.4byte	.LLST201
+	.4byte	.LLST202
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x8b
 	.uleb128 0x24
-	.8byte	.LVL894
+	.8byte	.LVL903
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL898
+	.8byte	.LVL907
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x2a
@@ -24070,19 +24203,19 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x85
 	.4byte	0x2d
-	.4byte	.LLST102
+	.4byte	.LLST99
 	.uleb128 0x23
 	.4byte	.LASF351
 	.byte	0x1
 	.byte	0x85
 	.4byte	0xa1
-	.4byte	.LLST103
+	.4byte	.LLST100
 	.uleb128 0x23
 	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x85
 	.4byte	0xa1
-	.4byte	.LLST104
+	.4byte	.LLST101
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x1
@@ -24116,10 +24249,10 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x89
 	.4byte	0xa1
-	.4byte	.LLST105
+	.4byte	.LLST102
 	.uleb128 0x24
-	.8byte	.LVL429
-	.4byte	0x67ad
+	.8byte	.LVL422
+	.4byte	0x673e
 	.byte	0
 	.uleb128 0x27
 	.4byte	.LASF355
@@ -24136,25 +24269,25 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x49
 	.4byte	0x2d
-	.4byte	.LLST97
+	.4byte	.LLST94
 	.uleb128 0x23
 	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x49
 	.4byte	0xa1
-	.4byte	.LLST98
+	.4byte	.LLST95
 	.uleb128 0x23
 	.4byte	.LASF351
 	.byte	0x1
 	.byte	0x49
 	.4byte	0xa1
-	.4byte	.LLST99
+	.4byte	.LLST96
 	.uleb128 0x23
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x49
 	.4byte	0xa1
-	.4byte	.LLST100
+	.4byte	.LLST97
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x1
@@ -24183,7 +24316,7 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x4c
 	.4byte	0xa1
-	.4byte	.LLST101
+	.4byte	.LLST98
 	.uleb128 0x29
 	.string	"req"
 	.byte	0x1
@@ -24194,9 +24327,9 @@ check_vpc_table:
 	.4byte	0x1d08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4696
+	.8byte	__func__.4693
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xc0
+	.4byte	.Ldebug_ranges0+0x110
 	.4byte	0x1cdd
 	.uleb128 0x20
 	.4byte	.LASF358
@@ -24207,24 +24340,24 @@ check_vpc_table:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x24
-	.8byte	.LVL416
+	.8byte	.LVL409
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL417
-	.4byte	0x74b8
+	.8byte	.LVL410
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL418
-	.4byte	0x74b8
+	.8byte	.LVL411
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL419
-	.4byte	0x74b8
+	.8byte	.LVL412
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL412
-	.4byte	0x74b8
+	.8byte	.LVL405
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL413
-	.4byte	0x67ad
+	.8byte	.LVL406
+	.4byte	0x673e
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
@@ -24250,19 +24383,19 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x2d
-	.4byte	.LLST86
+	.4byte	.LLST83
 	.uleb128 0x23
 	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0xa1
-	.4byte	.LLST87
+	.4byte	.LLST84
 	.uleb128 0x23
 	.4byte	.LASF351
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0xa1
-	.4byte	.LLST88
+	.4byte	.LLST85
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x1
@@ -24291,7 +24424,7 @@ check_vpc_table:
 	.byte	0x1
 	.byte	0x2e
 	.4byte	0xa1
-	.4byte	.LLST89
+	.4byte	.LLST86
 	.uleb128 0x29
 	.string	"req"
 	.byte	0x1
@@ -24302,16 +24435,16 @@ check_vpc_table:
 	.4byte	0x1d08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4679
+	.8byte	__func__.4676
 	.uleb128 0x24
-	.8byte	.LVL373
-	.4byte	0x74b8
+	.8byte	.LVL366
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL374
-	.4byte	0x67ad
+	.8byte	.LVL367
+	.4byte	0x673e
 	.byte	0
 	.uleb128 0x30
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x1
 	.byte	0x11
 	.4byte	0xa1
@@ -24371,7 +24504,7 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF366
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0xa1
 	.8byte	.LFB259
 	.8byte	.LFE259-.LFB259
@@ -24379,7 +24512,7 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x1e7e
 	.uleb128 0x24
-	.8byte	.LVL1503
+	.8byte	.LVL1512
 	.4byte	0x1e7e
 	.byte	0
 	.uleb128 0x33
@@ -24452,11 +24585,11 @@ check_vpc_table:
 	.uleb128 0x37
 	.4byte	.LASF378
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x37
 	.4byte	.LASF379
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x38
 	.4byte	.LASF357
 	.4byte	0x1f61
@@ -24578,7 +24711,7 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x2e8
-	.4byte	.LLST85
+	.4byte	.LLST82
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x5
@@ -24590,13 +24723,13 @@ check_vpc_table:
 	.2byte	0x169
 	.4byte	0x2e8
 	.uleb128 0x24
-	.8byte	.LVL359
-	.4byte	0x4d4b
+	.8byte	.LVL352
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL360
-	.4byte	0x74b8
+	.8byte	.LVL353
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL361
+	.8byte	.LVL354
 	.4byte	0x208d
 	.byte	0
 	.uleb128 0x32
@@ -24614,10 +24747,10 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x2e8
-	.4byte	.LLST84
+	.4byte	.LLST81
 	.uleb128 0x24
-	.8byte	.LVL354
-	.4byte	0x74b8
+	.8byte	.LVL347
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF390
@@ -24634,33 +24767,33 @@ check_vpc_table:
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0x2e8
-	.4byte	.LLST285
+	.4byte	.LLST286
 	.uleb128 0x3e
 	.4byte	.LASF377
 	.byte	0x5
 	.2byte	0x13e
 	.4byte	0x1f4b
-	.4byte	.LLST286
+	.4byte	.LLST287
 	.uleb128 0x24
-	.8byte	.LVL1391
+	.8byte	.LVL1400
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1393
+	.8byte	.LVL1402
 	.4byte	0x25f1
 	.uleb128 0x24
-	.8byte	.LVL1394
+	.8byte	.LVL1403
 	.4byte	0x2378
 	.uleb128 0x24
-	.8byte	.LVL1396
-	.4byte	0x5333
+	.8byte	.LVL1405
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1397
-	.4byte	0x5179
+	.8byte	.LVL1406
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL1398
+	.8byte	.LVL1407
 	.4byte	0x2333
 	.uleb128 0x24
-	.8byte	.LVL1402
+	.8byte	.LVL1411
 	.4byte	0x24f1
 	.byte	0
 	.uleb128 0x32
@@ -24674,25 +24807,25 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x21e7
 	.uleb128 0x24
-	.8byte	.LVL1406
-	.4byte	0x5815
+	.8byte	.LVL1415
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1407
+	.8byte	.LVL1416
 	.4byte	0x2378
 	.uleb128 0x24
-	.8byte	.LVL1408
+	.8byte	.LVL1417
 	.4byte	0x28b2
 	.uleb128 0x24
-	.8byte	.LVL1409
-	.4byte	0x40b4
+	.8byte	.LVL1418
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1410
-	.4byte	0x3d8f
+	.8byte	.LVL1419
+	.4byte	0x3d9f
 	.uleb128 0x24
-	.8byte	.LVL1411
-	.4byte	0x3b9a
+	.8byte	.LVL1420
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1412
+	.8byte	.LVL1421
 	.4byte	0x2747
 	.byte	0
 	.uleb128 0x3f
@@ -24715,25 +24848,25 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x1423
-	.4byte	.LLST189
+	.4byte	.LLST190
 	.uleb128 0x23
 	.4byte	.LASF394
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x2f3
-	.4byte	.LLST190
+	.4byte	.LLST191
 	.uleb128 0x28
 	.4byte	.LASF375
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0x2e8
-	.4byte	.LLST191
+	.4byte	.LLST192
 	.uleb128 0x28
 	.4byte	.LASF352
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0x2e8
-	.4byte	.LLST192
+	.4byte	.LLST193
 	.uleb128 0x29
 	.string	"req"
 	.byte	0x5
@@ -24749,25 +24882,25 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0x2e8
-	.4byte	.LLST193
+	.4byte	.LLST194
 	.uleb128 0x28
 	.4byte	.LASF167
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0x2e8
-	.4byte	.LLST194
+	.4byte	.LLST195
 	.uleb128 0x28
 	.4byte	.LASF395
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0x2f3
-	.4byte	.LLST195
+	.4byte	.LLST196
 	.uleb128 0x28
 	.4byte	.LASF396
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0x2f3
-	.4byte	.LLST196
+	.4byte	.LLST197
 	.uleb128 0x2c
 	.4byte	.LASF397
 	.byte	0x5
@@ -24778,7 +24911,7 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0xda
 	.4byte	0x1f4b
-	.4byte	.LLST197
+	.4byte	.LLST198
 	.uleb128 0x40
 	.4byte	.LASF398
 	.byte	0x5
@@ -24791,27 +24924,27 @@ check_vpc_table:
 	.4byte	.LASF468
 	.byte	0x5
 	.2byte	0x117
-	.8byte	.L859
+	.8byte	.L867
 	.uleb128 0x24
-	.8byte	.LVL849
+	.8byte	.LVL858
 	.4byte	0x2333
 	.uleb128 0x24
-	.8byte	.LVL856
+	.8byte	.LVL865
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL867
-	.4byte	0x4d87
+	.8byte	.LVL876
+	.4byte	0x4d18
 	.uleb128 0x24
-	.8byte	.LVL871
-	.4byte	0x36a2
+	.8byte	.LVL880
+	.4byte	0x36b2
 	.uleb128 0x24
-	.8byte	.LVL874
+	.8byte	.LVL883
 	.4byte	0x24f1
 	.uleb128 0x24
-	.8byte	.LVL876
-	.4byte	0x49d2
+	.8byte	.LVL885
+	.4byte	0x49c3
 	.uleb128 0x24
-	.8byte	.LVL877
+	.8byte	.LVL886
 	.4byte	0x2333
 	.byte	0
 	.uleb128 0x42
@@ -24824,13 +24957,13 @@ check_vpc_table:
 	.byte	0x9c
 	.4byte	0x2378
 	.uleb128 0x24
-	.8byte	.LVL843
+	.8byte	.LVL852
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL844
+	.8byte	.LVL853
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL845
+	.8byte	.LVL854
 	.4byte	0x2645
 	.byte	0
 	.uleb128 0x22
@@ -24848,13 +24981,13 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x2f
-	.4byte	.LLST280
+	.4byte	.LLST281
 	.uleb128 0x43
 	.string	"i"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0x2e8
-	.4byte	.LLST281
+	.4byte	.LLST282
 	.uleb128 0x2c
 	.4byte	.LASF402
 	.byte	0x5
@@ -24865,13 +24998,13 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x72
 	.4byte	0x2f3
-	.4byte	.LLST282
+	.4byte	.LLST283
 	.uleb128 0x28
 	.4byte	.LASF404
 	.byte	0x5
 	.byte	0x73
 	.4byte	0x2f3
-	.4byte	.LLST283
+	.4byte	.LLST284
 	.uleb128 0x2c
 	.4byte	.LASF393
 	.byte	0x5
@@ -24882,61 +25015,61 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x1468
-	.4byte	.LLST284
+	.4byte	.LLST285
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x24ec
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4529
+	.8byte	__func__.4526
 	.uleb128 0x24
-	.8byte	.LVL1357
+	.8byte	.LVL1366
 	.4byte	0x21f0
 	.uleb128 0x24
-	.8byte	.LVL1359
-	.4byte	0x3d8f
+	.8byte	.LVL1368
+	.4byte	0x3d9f
 	.uleb128 0x24
-	.8byte	.LVL1360
-	.4byte	0x5333
+	.8byte	.LVL1369
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1361
-	.4byte	0x5179
+	.8byte	.LVL1370
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL1364
-	.4byte	0x5815
+	.8byte	.LVL1373
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1365
-	.4byte	0x74b8
+	.8byte	.LVL1374
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1368
+	.8byte	.LVL1377
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1369
-	.4byte	0x49ad
+	.8byte	.LVL1378
+	.4byte	0x499e
 	.uleb128 0x24
-	.8byte	.LVL1371
-	.4byte	0x40b4
+	.8byte	.LVL1380
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1372
-	.4byte	0x3b9a
+	.8byte	.LVL1381
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1374
-	.4byte	0x74b8
+	.8byte	.LVL1383
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1375
-	.4byte	0x3fc5
+	.8byte	.LVL1384
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1376
-	.4byte	0x4d4b
+	.8byte	.LVL1385
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1377
-	.4byte	0x3fc5
+	.8byte	.LVL1386
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1378
+	.8byte	.LVL1387
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1381
-	.4byte	0x49d2
+	.8byte	.LVL1390
+	.4byte	0x49c3
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
@@ -24961,19 +25094,19 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x2f3
-	.4byte	.LLST80
+	.4byte	.LLST77
 	.uleb128 0x23
 	.4byte	.LASF178
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x2f3
-	.4byte	.LLST81
+	.4byte	.LLST78
 	.uleb128 0x26
 	.string	"lpa"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0x2f3
-	.4byte	.LLST82
+	.4byte	.LLST79
 	.uleb128 0x20
 	.4byte	.LASF409
 	.byte	0x5
@@ -24986,10 +25119,10 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x57
 	.4byte	0x2e8
-	.4byte	.LLST83
+	.4byte	.LLST80
 	.uleb128 0x24
-	.8byte	.LVL347
-	.4byte	0x4d4b
+	.8byte	.LVL340
+	.4byte	0x4cdc
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF410
@@ -25006,7 +25139,7 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x49
 	.4byte	0x2e8
-	.4byte	.LLST79
+	.4byte	.LLST76
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x5
@@ -25041,13 +25174,13 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x3a
 	.4byte	0x2e8
-	.4byte	.LLST77
+	.4byte	.LLST74
 	.uleb128 0x28
 	.4byte	.LASF413
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0x2e8
-	.4byte	.LLST78
+	.4byte	.LLST75
 	.byte	0
 	.uleb128 0x42
 	.4byte	.LASF414
@@ -25077,13 +25210,13 @@ check_vpc_table:
 	.byte	0x5
 	.byte	0x2b
 	.4byte	0x2e8
-	.4byte	.LLST75
+	.4byte	.LLST72
 	.uleb128 0x28
 	.4byte	.LASF413
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0x2e8
-	.4byte	.LLST76
+	.4byte	.LLST73
 	.byte	0
 	.uleb128 0x42
 	.4byte	.LASF415
@@ -25103,7 +25236,7 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF416
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac3
 	.4byte	0x2f
 	.8byte	.LFB241
 	.8byte	.LFE241-.LFB241
@@ -25113,32 +25246,32 @@ check_vpc_table:
 	.uleb128 0x3c
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac3
 	.4byte	0x2e8
-	.4byte	.LLST220
+	.4byte	.LLST221
 	.uleb128 0x36
 	.string	"ret"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac5
 	.4byte	0x2f
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2702
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4459
+	.8byte	__func__.4456
 	.uleb128 0x24
-	.8byte	.LVL998
-	.4byte	0x74b8
+	.8byte	.LVL1007
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1001
-	.4byte	0x74b8
+	.8byte	.LVL1010
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1002
+	.8byte	.LVL1011
 	.4byte	0x2707
 	.uleb128 0x24
-	.8byte	.LVL1003
-	.4byte	0x74b8
+	.8byte	.LVL1012
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
@@ -25152,14 +25285,14 @@ check_vpc_table:
 	.uleb128 0x33
 	.4byte	.LASF417
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xaae
 	.4byte	0x2f
 	.byte	0x1
 	.4byte	0x2732
 	.uleb128 0x34
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xaae
 	.4byte	0x2e8
 	.uleb128 0x38
 	.4byte	.LASF357
@@ -25178,7 +25311,7 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF418
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa8e
 	.4byte	0x2f3
 	.8byte	.LFB239
 	.8byte	.LFE239-.LFB239
@@ -25188,19 +25321,19 @@ check_vpc_table:
 	.uleb128 0x3c
 	.4byte	.LASF419
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa8e
 	.4byte	0x1423
-	.4byte	.LLST73
+	.4byte	.LLST70
 	.uleb128 0x3e
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa90
 	.4byte	0x2e8
-	.4byte	.LLST74
+	.4byte	.LLST71
 	.uleb128 0x1f
 	.4byte	.LASF420
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa91
 	.4byte	0x2f3
 	.uleb128 0x1
 	.byte	0x65
@@ -25209,24 +25342,24 @@ check_vpc_table:
 	.4byte	0x24ec
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4439
+	.8byte	__func__.4436
 	.uleb128 0x24
-	.8byte	.LVL315
-	.4byte	0x74b8
+	.8byte	.LVL308
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL316
-	.4byte	0x74b8
+	.8byte	.LVL309
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL317
-	.4byte	0x74b8
+	.8byte	.LVL310
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL320
-	.4byte	0x74b8
+	.8byte	.LVL313
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF421
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa76
 	.4byte	0x2f
 	.8byte	.LFB238
 	.8byte	.LFE238-.LFB238
@@ -25236,45 +25369,45 @@ check_vpc_table:
 	.uleb128 0x3c
 	.4byte	.LASF419
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa76
 	.4byte	0x1423
-	.4byte	.LLST266
+	.4byte	.LLST267
 	.uleb128 0x3e
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa78
 	.4byte	0x2e8
-	.4byte	.LLST267
+	.4byte	.LLST268
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x28ad
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4432
+	.8byte	__func__.4429
 	.uleb128 0x24
-	.8byte	.LVL1289
-	.4byte	0x74b8
+	.8byte	.LVL1298
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1290
-	.4byte	0x49ad
+	.8byte	.LVL1299
+	.4byte	0x499e
 	.uleb128 0x24
-	.8byte	.LVL1291
+	.8byte	.LVL1300
 	.4byte	0x2707
 	.uleb128 0x24
-	.8byte	.LVL1292
+	.8byte	.LVL1301
 	.4byte	0x28b2
 	.uleb128 0x24
-	.8byte	.LVL1293
-	.4byte	0x40b4
+	.8byte	.LVL1302
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1294
-	.4byte	0x3d8f
+	.8byte	.LVL1303
+	.4byte	0x3d9f
 	.uleb128 0x24
-	.8byte	.LVL1295
-	.4byte	0x3b9a
+	.8byte	.LVL1304
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1298
-	.4byte	0x49d2
+	.8byte	.LVL1307
+	.4byte	0x49c3
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
@@ -25288,7 +25421,7 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF422
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa12
 	.4byte	0x2f
 	.8byte	.LFB237
 	.8byte	.LFE237-.LFB237
@@ -25298,121 +25431,121 @@ check_vpc_table:
 	.uleb128 0x46
 	.string	"p"
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa12
 	.4byte	0x1423
-	.4byte	.LLST209
+	.4byte	.LLST210
 	.uleb128 0x3e
 	.4byte	.LASF423
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa14
 	.4byte	0x2e8
-	.4byte	.LLST210
+	.4byte	.LLST211
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF352
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x2e8
-	.4byte	.LLST211
+	.4byte	.LLST212
 	.uleb128 0x36
 	.string	"n"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa15
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF424
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa16
 	.4byte	0x2f
-	.4byte	.LLST212
+	.4byte	.LLST213
 	.uleb128 0x3e
 	.4byte	.LASF425
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa17
 	.4byte	0x2e8
-	.4byte	.LLST213
+	.4byte	.LLST214
 	.uleb128 0x37
 	.4byte	.LASF426
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa18
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2a74
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4411
+	.8byte	__func__.4408
 	.uleb128 0x47
-	.4byte	0x3a1f
-	.8byte	.LBB242
-	.8byte	.LBE242-.LBB242
+	.4byte	0x3a2f
+	.8byte	.LBB270
+	.8byte	.LBE270-.LBB270
 	.byte	0x2
-	.2byte	0xa18
+	.2byte	0xa48
 	.4byte	0x2993
 	.uleb128 0x48
-	.4byte	0x3a38
+	.4byte	0x3a48
 	.uleb128 0x48
-	.4byte	0x3a2c
+	.4byte	0x3a3c
 	.uleb128 0x24
-	.8byte	.LVL955
-	.4byte	0x680b
+	.8byte	.LVL964
+	.4byte	0x679c
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL927
-	.4byte	0x74b8
+	.8byte	.LVL936
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL931
-	.4byte	0x479c
+	.8byte	.LVL940
+	.4byte	0x47ac
 	.uleb128 0x24
-	.8byte	.LVL932
-	.4byte	0x74b8
+	.8byte	.LVL941
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL933
-	.4byte	0x309d
+	.8byte	.LVL942
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL934
-	.4byte	0x49ad
+	.8byte	.LVL943
+	.4byte	0x499e
 	.uleb128 0x24
-	.8byte	.LVL935
-	.4byte	0x74b8
+	.8byte	.LVL944
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL938
-	.4byte	0x74b8
+	.8byte	.LVL947
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL939
-	.4byte	0x74b8
+	.8byte	.LVL948
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL940
-	.4byte	0x74b8
+	.8byte	.LVL949
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL943
-	.4byte	0x3a1f
+	.8byte	.LVL952
+	.4byte	0x3a2f
 	.uleb128 0x24
-	.8byte	.LVL946
+	.8byte	.LVL955
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL948
-	.4byte	0x2bd7
+	.8byte	.LVL957
+	.4byte	0x2be7
 	.uleb128 0x24
-	.8byte	.LVL949
-	.4byte	0x5179
+	.8byte	.LVL958
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL951
-	.4byte	0x49ad
+	.8byte	.LVL960
+	.4byte	0x499e
 	.uleb128 0x24
-	.8byte	.LVL958
-	.4byte	0x5333
+	.8byte	.LVL967
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL961
-	.4byte	0x74b8
+	.8byte	.LVL970
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
@@ -25426,204 +25559,210 @@ check_vpc_table:
 	.uleb128 0x33
 	.4byte	.LASF427
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa09
 	.4byte	0x2f
 	.byte	0x1
 	.4byte	0x2a97
 	.uleb128 0x34
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa09
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF428
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c0
 	.4byte	0x2e8
 	.8byte	.LFB235
 	.8byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b47
+	.4byte	0x2b57
 	.uleb128 0x3e
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c2
 	.4byte	0x2e8
-	.4byte	.LLST67
+	.4byte	.LLST63
 	.uleb128 0x35
 	.4byte	.LASF430
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c3
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF431
 	.byte	0x2
-	.2byte	0x992
+	.2byte	0x9c4
 	.4byte	0x2e8
-	.4byte	.LLST68
+	.4byte	.LLST64
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x993
+	.2byte	0x9c5
 	.4byte	0x134b
-	.4byte	.LLST69
+	.4byte	.LLST65
 	.uleb128 0x3e
 	.4byte	.LASF433
 	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c6
 	.4byte	0x2e8
-	.4byte	.LLST70
+	.4byte	.LLST66
 	.uleb128 0x3e
 	.4byte	.LASF434
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9c7
 	.4byte	0x2e8
-	.4byte	.LLST71
+	.4byte	.LLST67
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9c8
 	.4byte	0x2f3
+	.uleb128 0x3e
+	.4byte	.LASF111
+	.byte	0x2
+	.2byte	0x9c9
+	.4byte	0x2e8
+	.4byte	.LLST68
 	.uleb128 0x24
-	.8byte	.LVL293
-	.4byte	0x2b47
+	.8byte	.LVL281
+	.4byte	0x2b57
 	.uleb128 0x24
-	.8byte	.LVL300
-	.4byte	0x2ba4
+	.8byte	.LVL289
+	.4byte	0x2bb4
 	.uleb128 0x24
-	.8byte	.LVL305
-	.4byte	0x74b8
+	.8byte	.LVL296
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF435
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ab
 	.4byte	0x2e8
 	.8byte	.LFB234
 	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ba4
+	.4byte	0x2bb4
 	.uleb128 0x3c
 	.4byte	.LASF90
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ab
 	.4byte	0x2e8
-	.4byte	.LLST60
+	.4byte	.LLST56
 	.uleb128 0x3e
 	.4byte	.LASF436
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9ad
 	.4byte	0x2e8
-	.4byte	.LLST61
+	.4byte	.LLST57
 	.uleb128 0x35
 	.4byte	.LASF389
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9ae
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9af
 	.4byte	0x2e8
-	.4byte	.LLST62
+	.4byte	.LLST58
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF437
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a2
 	.4byte	0x2e8
 	.8byte	.LFB233
 	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2bd7
+	.4byte	0x2be7
 	.uleb128 0x3e
 	.4byte	.LASF431
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a4
 	.4byte	0x2e8
-	.4byte	.LLST59
+	.4byte	.LLST55
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF438
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x992
 	.4byte	0x2f
 	.8byte	.LFB232
 	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c48
+	.4byte	0x2c58
 	.uleb128 0x3c
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x992
 	.4byte	0x2e8
-	.4byte	.LLST58
+	.4byte	.LLST54
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x994
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x994
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF162
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x995
 	.4byte	0x2e8
 	.uleb128 0x24
-	.8byte	.LVL187
-	.4byte	0x4dc3
+	.8byte	.LVL175
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL188
-	.4byte	0x52d4
+	.8byte	.LVL176
+	.4byte	0x5265
 	.byte	0
 	.uleb128 0x33
 	.4byte	.LASF439
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x2f
 	.byte	0x1
-	.4byte	0x2c72
+	.4byte	0x2c82
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x2f
 	.uleb128 0x39
 	.uleb128 0x35
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x928
+	.2byte	0x95a
 	.4byte	0x1423
 	.byte	0
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF440
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.8byte	.LFB230
 	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cfb
+	.4byte	0x2d0b
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x2f
-	.4byte	.LLST163
+	.4byte	.LLST164
 	.uleb128 0x4a
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0x2f3
 	.uleb128 0x2
 	.byte	0x91
@@ -25631,48 +25770,48 @@ check_vpc_table:
 	.uleb128 0x35
 	.4byte	.LASF441
 	.byte	0x2
-	.2byte	0x8e6
+	.2byte	0x918
 	.4byte	0x1f4b
 	.uleb128 0x24
-	.8byte	.LVL694
-	.4byte	0x74b8
+	.8byte	.LVL703
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL697
-	.4byte	0x3fc5
+	.8byte	.LVL706
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL698
-	.4byte	0x74b8
+	.8byte	.LVL707
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL699
+	.8byte	.LVL708
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL700
-	.4byte	0x74b8
+	.8byte	.LVL709
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF442
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.8byte	.LFB229
 	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2de8
+	.4byte	0x2df8
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0x2f3
-	.4byte	.LLST186
+	.4byte	.LLST187
 	.uleb128 0x1f
 	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0x2f3
 	.uleb128 0x3
 	.byte	0x91
@@ -25680,86 +25819,86 @@ check_vpc_table:
 	.uleb128 0x36
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF444
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0x2e8
-	.4byte	.LLST187
+	.4byte	.LLST188
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x2df8
+	.4byte	0x2e08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4327
+	.8byte	__func__.4323
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x170
-	.4byte	0x2d99
+	.4byte	.Ldebug_ranges0+0x230
+	.4byte	0x2da9
 	.uleb128 0x3e
 	.4byte	.LASF90
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0x2e8
-	.4byte	.LLST188
+	.4byte	.LLST189
 	.uleb128 0x24
-	.8byte	.LVL842
-	.4byte	0x74b8
+	.8byte	.LVL851
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL828
-	.4byte	0x74b8
+	.8byte	.LVL837
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL829
+	.8byte	.LVL838
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL833
-	.4byte	0x74b8
+	.8byte	.LVL842
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL837
-	.4byte	0x3fc5
+	.8byte	.LVL846
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL838
-	.4byte	0x4d4b
+	.8byte	.LVL847
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL840
-	.4byte	0x74b8
+	.8byte	.LVL849
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x2df8
+	.4byte	0x2e08
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0xd
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x2de8
+	.4byte	0x2df8
 	.uleb128 0x49
 	.4byte	.LASF445
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.8byte	.LFB228
 	.8byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ed0
+	.4byte	0x2ee0
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0x2e8
-	.4byte	.LLST264
+	.4byte	.LLST265
 	.uleb128 0x3d
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0x2f3
-	.4byte	.LLST265
+	.4byte	.LLST266
 	.uleb128 0x1f
 	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0x2f3
 	.uleb128 0x2
 	.byte	0x91
@@ -25767,67 +25906,67 @@ check_vpc_table:
 	.uleb128 0x36
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0x2e8
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x2ee0
+	.4byte	0x2ef0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4311
+	.8byte	__func__.4307
 	.uleb128 0x24
-	.8byte	.LVL1269
-	.4byte	0x74b8
+	.8byte	.LVL1278
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1271
+	.8byte	.LVL1280
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1276
-	.4byte	0x3fc5
+	.8byte	.LVL1285
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1277
-	.4byte	0x4d4b
+	.8byte	.LVL1286
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1280
-	.4byte	0x74b8
+	.8byte	.LVL1289
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1281
+	.8byte	.LVL1290
 	.4byte	0x2707
 	.uleb128 0x24
-	.8byte	.LVL1282
-	.4byte	0x40b4
+	.8byte	.LVL1291
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1283
-	.4byte	0x3b9a
+	.8byte	.LVL1292
+	.4byte	0x3baa
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x2ee0
+	.4byte	0x2ef0
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x14
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x2ed0
+	.4byte	0x2ee0
 	.uleb128 0x49
 	.4byte	.LASF446
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f6e
+	.4byte	0x2f7e
 	.uleb128 0x3c
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.4byte	0x1423
-	.4byte	.LLST242
+	.4byte	.LLST243
 	.uleb128 0x1f
 	.4byte	.LASF447
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0x314
 	.uleb128 0x2
 	.byte	0x91
@@ -25835,797 +25974,797 @@ check_vpc_table:
 	.uleb128 0x35
 	.4byte	.LASF377
 	.byte	0x2
-	.2byte	0x86e
+	.2byte	0x89f
 	.4byte	0x1f4b
 	.uleb128 0x35
 	.4byte	.LASF448
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x2f
 	.uleb128 0x35
 	.4byte	.LASF171
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0x2f3
 	.uleb128 0x24
-	.8byte	.LVL1137
+	.8byte	.LVL1146
 	.4byte	0x2747
 	.uleb128 0x24
-	.8byte	.LVL1138
+	.8byte	.LVL1147
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1139
+	.8byte	.LVL1148
 	.4byte	0x266c
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF449
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.8byte	.LFB226
 	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2fa7
+	.4byte	0x2fb7
 	.uleb128 0x24
-	.8byte	.LVL1251
-	.4byte	0x3dec
+	.8byte	.LVL1260
+	.4byte	0x3dfc
 	.uleb128 0x24
-	.8byte	.LVL1252
+	.8byte	.LVL1261
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF451
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x32
 	.4byte	.LASF452
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x2f
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3088
+	.4byte	0x3098
 	.uleb128 0x3e
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x2e8
-	.4byte	.LLST183
+	.4byte	.LLST184
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF162
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF453
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0x2e8
-	.4byte	.LLST184
+	.4byte	.LLST185
 	.uleb128 0x3e
 	.4byte	.LASF454
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0x2e8
-	.4byte	.LLST185
+	.4byte	.LLST186
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x3098
+	.4byte	0x30a8
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4286
+	.8byte	__func__.4282
 	.uleb128 0x24
-	.8byte	.LVL812
+	.8byte	.LVL821
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL813
-	.4byte	0x4dc3
+	.8byte	.LVL822
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL814
-	.4byte	0x52d4
+	.8byte	.LVL823
+	.4byte	0x5265
 	.uleb128 0x24
-	.8byte	.LVL817
-	.4byte	0x49d2
+	.8byte	.LVL826
+	.4byte	0x49c3
 	.uleb128 0x24
-	.8byte	.LVL822
-	.4byte	0x49ad
+	.8byte	.LVL831
+	.4byte	0x499e
 	.uleb128 0x24
-	.8byte	.LVL824
-	.4byte	0x74b8
+	.8byte	.LVL833
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x3098
+	.4byte	0x30a8
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x11
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x3088
+	.4byte	0x3098
 	.uleb128 0x32
 	.4byte	.LASF455
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x2f
 	.8byte	.LFB223
 	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3120
+	.4byte	0x3130
 	.uleb128 0x46
 	.string	"p"
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x1423
-	.4byte	.LLST57
+	.4byte	.LLST53
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0x2e8
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2742
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4265
+	.8byte	__func__.4261
 	.uleb128 0x24
-	.8byte	.LVL178
-	.4byte	0x74b8
+	.8byte	.LVL166
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL181
-	.4byte	0x4dc3
+	.8byte	.LVL169
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL182
-	.4byte	0x52d4
+	.8byte	.LVL170
+	.4byte	0x5265
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF456
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x2f
 	.8byte	.LFB222
 	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3191
+	.4byte	0x31a1
 	.uleb128 0x24
-	.8byte	.LVL1385
-	.4byte	0x31b7
+	.8byte	.LVL1394
+	.4byte	0x31c7
 	.uleb128 0x24
-	.8byte	.LVL1386
-	.4byte	0x3191
+	.8byte	.LVL1395
+	.4byte	0x31a1
 	.uleb128 0x24
-	.8byte	.LVL1387
-	.4byte	0x31b7
+	.8byte	.LVL1396
+	.4byte	0x31c7
 	.uleb128 0x24
-	.8byte	.LVL1388
-	.4byte	0x3191
+	.8byte	.LVL1397
+	.4byte	0x31a1
 	.uleb128 0x24
-	.8byte	.LVL1389
+	.8byte	.LVL1398
 	.4byte	0x21e7
 	.uleb128 0x24
-	.8byte	.LVL1390
+	.8byte	.LVL1399
 	.4byte	0x266c
 	.byte	0
 	.uleb128 0x4b
 	.4byte	.LASF492
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x31b7
+	.4byte	0x31c7
 	.uleb128 0x34
 	.4byte	.LASF419
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.4byte	0x1423
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF457
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x2f
 	.8byte	.LFB220
 	.8byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35b2
+	.4byte	0x35c2
 	.uleb128 0x3c
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x1423
-	.4byte	.LLST225
+	.4byte	.LLST226
 	.uleb128 0x3e
 	.4byte	.LASF458
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0x2e8
-	.4byte	.LLST226
+	.4byte	.LLST227
 	.uleb128 0x3e
 	.4byte	.LASF459
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0x2e8
-	.4byte	.LLST227
+	.4byte	.LLST228
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF169
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x2e8
-	.4byte	.LLST228
+	.4byte	.LLST229
 	.uleb128 0x35
 	.4byte	.LASF167
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF460
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0x2e8
-	.4byte	.LLST229
+	.4byte	.LLST230
 	.uleb128 0x3e
 	.4byte	.LASF461
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0x2e8
-	.4byte	.LLST230
+	.4byte	.LLST231
 	.uleb128 0x35
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x67c
+	.2byte	0x6ad
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF462
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x2f
-	.4byte	.LLST231
+	.4byte	.LLST232
 	.uleb128 0x35
 	.4byte	.LASF463
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x2f
 	.uleb128 0x35
 	.4byte	.LASF352
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"n"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x2e8
-	.4byte	.LLST232
+	.4byte	.LLST233
 	.uleb128 0x36
 	.string	"req"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x2f3
-	.4byte	.LLST233
+	.4byte	.LLST234
 	.uleb128 0x3e
 	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x2f3
-	.4byte	.LLST234
+	.4byte	.LLST235
 	.uleb128 0x3e
 	.4byte	.LASF403
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x2f3
-	.4byte	.LLST235
+	.4byte	.LLST236
 	.uleb128 0x3e
 	.4byte	.LASF395
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0x2f3
-	.4byte	.LLST236
+	.4byte	.LLST237
 	.uleb128 0x3e
 	.4byte	.LASF409
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0x2e8
-	.4byte	.LLST237
+	.4byte	.LLST238
 	.uleb128 0x3e
 	.4byte	.LASF464
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0x2e8
-	.4byte	.LLST238
+	.4byte	.LLST239
 	.uleb128 0x3e
 	.4byte	.LASF465
 	.byte	0x2
-	.2byte	0x681
+	.2byte	0x6b2
 	.4byte	0x2f3
-	.4byte	.LLST239
+	.4byte	.LLST240
 	.uleb128 0x35
 	.4byte	.LASF466
 	.byte	0x2
-	.2byte	0x682
+	.2byte	0x6b3
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF377
 	.byte	0x2
-	.2byte	0x683
+	.2byte	0x6b4
 	.4byte	0x1f4b
 	.uleb128 0x35
 	.4byte	.LASF467
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0x2f3
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x35c2
+	.4byte	0x35d2
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4208
+	.8byte	__func__.4204
 	.uleb128 0x41
 	.4byte	.LASF469
 	.byte	0x2
-	.2byte	0x713
-	.8byte	.L1016
+	.2byte	0x744
+	.8byte	.L1024
 	.uleb128 0x41
 	.4byte	.LASF399
 	.byte	0x2
-	.2byte	0x71b
-	.8byte	.L1028
+	.2byte	0x74c
+	.8byte	.L1036
 	.uleb128 0x41
 	.4byte	.LASF470
 	.byte	0x2
-	.2byte	0x7ce
-	.8byte	.L1034
+	.2byte	0x7ff
+	.8byte	.L1042
 	.uleb128 0x37
 	.4byte	.LASF471
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x4c
-	.8byte	.LBB263
-	.8byte	.LBE263-.LBB263
-	.4byte	0x33b9
+	.8byte	.LBB291
+	.8byte	.LBE291-.LBB291
+	.4byte	0x33c9
 	.uleb128 0x35
 	.4byte	.LASF472
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF473
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0x2f3
 	.uleb128 0x24
-	.8byte	.LVL1071
+	.8byte	.LVL1080
 	.4byte	0x1d0d
 	.byte	0
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x210
-	.4byte	0x344b
+	.4byte	.Ldebug_ranges0+0x2d0
+	.4byte	0x345b
 	.uleb128 0x3e
 	.4byte	.LASF474
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0x2f3
-	.4byte	.LLST240
+	.4byte	.LLST241
 	.uleb128 0x3e
 	.4byte	.LASF475
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0x2f3
-	.4byte	.LLST241
+	.4byte	.LLST242
 	.uleb128 0x24
-	.8byte	.LVL1096
+	.8byte	.LVL1105
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1098
+	.8byte	.LVL1107
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1107
-	.4byte	0x3fc5
+	.8byte	.LVL1116
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1110
-	.4byte	0x4cfe
+	.8byte	.LVL1119
+	.4byte	0x4c8f
 	.uleb128 0x24
-	.8byte	.LVL1112
-	.4byte	0x35c7
+	.8byte	.LVL1121
+	.4byte	0x35d7
 	.uleb128 0x24
-	.8byte	.LVL1113
+	.8byte	.LVL1122
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1115
-	.4byte	0x4cfe
+	.8byte	.LVL1124
+	.4byte	0x4c8f
 	.uleb128 0x24
-	.8byte	.LVL1116
-	.4byte	0x4cfe
+	.8byte	.LVL1125
+	.4byte	0x4c8f
 	.byte	0
 	.uleb128 0x4c
-	.8byte	.LBB267
-	.8byte	.LBE267-.LBB267
-	.4byte	0x34a0
+	.8byte	.LBB295
+	.8byte	.LBE295-.LBB295
+	.4byte	0x34b0
 	.uleb128 0x35
 	.4byte	.LASF476
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF475
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0x2f3
 	.uleb128 0x24
-	.8byte	.LVL1123
+	.8byte	.LVL1132
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1124
-	.4byte	0x4cfe
+	.8byte	.LVL1133
+	.4byte	0x4c8f
 	.uleb128 0x24
-	.8byte	.LVL1125
-	.4byte	0x3fc5
+	.8byte	.LVL1134
+	.4byte	0x3fd5
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1039
-	.4byte	0x4c53
-	.uleb128 0x24
-	.8byte	.LVL1041
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1045
-	.4byte	0x4d87
+	.8byte	.LVL1048
+	.4byte	0x4be4
 	.uleb128 0x24
 	.8byte	.LVL1050
-	.4byte	0x36a2
+	.4byte	0x1d0d
 	.uleb128 0x24
 	.8byte	.LVL1054
-	.4byte	0x74b8
+	.4byte	0x4d18
 	.uleb128 0x24
-	.8byte	.LVL1057
-	.4byte	0x74b8
+	.8byte	.LVL1059
+	.4byte	0x36b2
 	.uleb128 0x24
-	.8byte	.LVL1060
-	.4byte	0x4cfe
+	.8byte	.LVL1063
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1073
-	.4byte	0x3ce5
+	.8byte	.LVL1066
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1077
-	.4byte	0x1d0d
+	.8byte	.LVL1069
+	.4byte	0x4c8f
 	.uleb128 0x24
 	.8byte	.LVL1082
-	.4byte	0x4d87
-	.uleb128 0x24
-	.8byte	.LVL1087
-	.4byte	0x266c
+	.4byte	0x3cf5
 	.uleb128 0x24
-	.8byte	.LVL1090
-	.4byte	0x4cfe
+	.8byte	.LVL1086
+	.4byte	0x1d0d
 	.uleb128 0x24
 	.8byte	.LVL1091
-	.4byte	0x74b8
+	.4byte	0x4d18
 	.uleb128 0x24
-	.8byte	.LVL1094
-	.4byte	0x3fc5
+	.8byte	.LVL1096
+	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1095
-	.4byte	0x4cfe
+	.8byte	.LVL1099
+	.4byte	0x4c8f
 	.uleb128 0x24
 	.8byte	.LVL1100
-	.4byte	0x4d4b
+	.4byte	0x75a7
+	.uleb128 0x24
+	.8byte	.LVL1103
+	.4byte	0x3fd5
 	.uleb128 0x24
 	.8byte	.LVL1104
-	.4byte	0x74b8
+	.4byte	0x4c8f
 	.uleb128 0x24
-	.8byte	.LVL1119
-	.4byte	0x3fc5
+	.8byte	.LVL1109
+	.4byte	0x4cdc
+	.uleb128 0x24
+	.8byte	.LVL1113
+	.4byte	0x75a7
+	.uleb128 0x24
+	.8byte	.LVL1128
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1120
-	.4byte	0x4d4b
+	.8byte	.LVL1129
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1127
-	.4byte	0x74b8
+	.8byte	.LVL1136
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1131
+	.8byte	.LVL1140
 	.4byte	0x266c
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x35c2
+	.4byte	0x35d2
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x15
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x35b2
+	.4byte	0x35c2
 	.uleb128 0x49
 	.4byte	.LASF477
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.8byte	.LFB219
 	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x36a2
+	.4byte	0x36b2
 	.uleb128 0x46
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0x2f3
-	.4byte	.LLST157
+	.4byte	.LLST158
 	.uleb128 0x3c
 	.4byte	.LASF443
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0x2f3
-	.4byte	.LLST158
+	.4byte	.LLST159
 	.uleb128 0x3e
 	.4byte	.LASF409
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0x2e8
-	.4byte	.LLST159
+	.4byte	.LLST160
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2742
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4174
+	.8byte	__func__.4170
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xf0
-	.4byte	0x3687
+	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x3697
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0x2e8
-	.4byte	.LLST160
+	.4byte	.LLST161
 	.uleb128 0x3e
 	.4byte	.LASF389
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0x2e8
-	.4byte	.LLST161
+	.4byte	.LLST162
 	.uleb128 0x3e
 	.4byte	.LASF90
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0x2e8
-	.4byte	.LLST162
+	.4byte	.LLST163
 	.uleb128 0x24
-	.8byte	.LVL677
-	.4byte	0x480c
+	.8byte	.LVL686
+	.4byte	0x481c
 	.uleb128 0x24
-	.8byte	.LVL678
-	.4byte	0x74b8
+	.8byte	.LVL687
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL679
-	.4byte	0x49ad
+	.8byte	.LVL688
+	.4byte	0x499e
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL670
-	.4byte	0x4d4b
+	.8byte	.LVL679
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL683
-	.4byte	0x3fc5
+	.8byte	.LVL692
+	.4byte	0x3fd5
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF478
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.8byte	.LFB218
 	.8byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x36fb
+	.4byte	0x370b
 	.uleb128 0x4d
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x1423
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3c
 	.4byte	.LASF167
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x2e8
-	.4byte	.LLST55
+	.4byte	.LLST51
 	.uleb128 0x3c
 	.4byte	.LASF169
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0x2e8
-	.4byte	.LLST56
+	.4byte	.LLST52
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF479
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x2f
 	.8byte	.LFB217
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3738
+	.4byte	0x3748
 	.uleb128 0x24
-	.8byte	.LVL800
-	.4byte	0x3738
+	.8byte	.LVL809
+	.4byte	0x3748
 	.uleb128 0x24
-	.8byte	.LVL801
-	.4byte	0x37b1
+	.8byte	.LVL810
+	.4byte	0x37c1
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF480
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.8byte	.LFB216
 	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3781
+	.4byte	0x3791
 	.uleb128 0x3e
 	.4byte	.LASF116
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0x2e8
-	.4byte	.LLST182
+	.4byte	.LLST183
 	.uleb128 0x24
-	.8byte	.LVL793
+	.8byte	.LVL802
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL794
+	.8byte	.LVL803
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF481
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x2f
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x37b1
+	.4byte	0x37c1
 	.uleb128 0x24
-	.8byte	.LVL792
-	.4byte	0x37b1
+	.8byte	.LVL801
+	.4byte	0x37c1
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF482
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x2f
 	.8byte	.LFB214
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38f1
+	.4byte	0x3901
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x38f1
-	.4byte	.LLST173
+	.2byte	0x5ea
+	.4byte	0x3901
+	.4byte	.LLST174
 	.uleb128 0x3e
 	.4byte	.LASF484
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0x309
-	.4byte	.LLST174
+	.4byte	.LLST175
 	.uleb128 0x35
 	.4byte	.LASF82
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0x309
 	.uleb128 0x3e
 	.4byte	.LASF485
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0x309
-	.4byte	.LLST175
+	.4byte	.LLST176
 	.uleb128 0x3e
 	.4byte	.LASF116
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0x2e8
-	.4byte	.LLST176
+	.4byte	.LLST177
 	.uleb128 0x3e
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0x520
-	.4byte	.LLST177
+	.4byte	.LLST178
 	.uleb128 0x3e
 	.4byte	.LASF95
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x617
-	.4byte	.LLST178
+	.4byte	.LLST179
 	.uleb128 0x3e
 	.4byte	.LASF96
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0x520
-	.4byte	.LLST179
+	.4byte	.LLST180
 	.uleb128 0x3e
 	.4byte	.LASF92
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0x2e8
-	.4byte	.LLST180
+	.4byte	.LLST181
 	.uleb128 0x3e
 	.4byte	.LASF487
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0x2e8
-	.4byte	.LLST181
+	.4byte	.LLST182
 	.uleb128 0x35
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x38f7
+	.2byte	0x5f4
+	.4byte	0x3907
 	.uleb128 0x24
-	.8byte	.LVL752
+	.8byte	.LVL761
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL760
-	.4byte	0x4c53
+	.8byte	.LVL769
+	.4byte	0x4be4
 	.uleb128 0x24
-	.8byte	.LVL766
-	.4byte	0x44ee
+	.8byte	.LVL775
+	.4byte	0x44fe
 	.uleb128 0x24
-	.8byte	.LVL767
-	.4byte	0x4496
+	.8byte	.LVL776
+	.4byte	0x44a6
 	.uleb128 0x24
-	.8byte	.LVL768
-	.4byte	0x439d
+	.8byte	.LVL777
+	.4byte	0x43ad
 	.uleb128 0x24
-	.8byte	.LVL769
-	.4byte	0x439d
+	.8byte	.LVL778
+	.4byte	0x43ad
 	.uleb128 0x24
-	.8byte	.LVL777
+	.8byte	.LVL786
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL781
+	.8byte	.LVL790
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL784
+	.8byte	.LVL793
 	.4byte	0x1d0d
 	.byte	0
 	.uleb128 0x7
@@ -26637,272 +26776,272 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF489
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x2f
 	.8byte	.LFB213
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39ec
+	.4byte	0x39fc
 	.uleb128 0x3e
 	.4byte	.LASF485
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0x309
-	.4byte	.LLST329
+	.4byte	.LLST330
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x1d08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4111
+	.8byte	__func__.4107
 	.uleb128 0x24
-	.8byte	.LVL1636
+	.8byte	.LVL1645
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1639
-	.4byte	0x4c53
+	.8byte	.LVL1648
+	.4byte	0x4be4
 	.uleb128 0x24
-	.8byte	.LVL1641
-	.4byte	0x74b8
+	.8byte	.LVL1650
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1642
-	.4byte	0x74b8
+	.8byte	.LVL1651
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1643
+	.8byte	.LVL1652
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1644
+	.8byte	.LVL1653
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1645
+	.8byte	.LVL1654
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1646
-	.4byte	0x74b8
+	.8byte	.LVL1655
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1647
-	.4byte	0x309d
+	.8byte	.LVL1656
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1648
-	.4byte	0x309d
+	.8byte	.LVL1657
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1649
-	.4byte	0x309d
+	.8byte	.LVL1658
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1650
-	.4byte	0x309d
+	.8byte	.LVL1659
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1651
+	.8byte	.LVL1660
 	.4byte	0x1d0d
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF490
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x2f
 	.8byte	.LFB212
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a1f
+	.4byte	0x3a2f
 	.uleb128 0x3c
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x2e8
-	.4byte	.LLST54
+	.4byte	.LLST50
 	.byte	0
 	.uleb128 0x4b
 	.4byte	.LASF493
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x3a45
+	.4byte	0x3a55
 	.uleb128 0x34
 	.4byte	.LASF491
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x2e8
 	.uleb128 0x34
 	.4byte	.LASF369
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x2f
 	.byte	0
 	.uleb128 0x3b
 	.4byte	.LASF495
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x2f
 	.byte	0x1
 	.uleb128 0x32
 	.4byte	.LASF496
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x2f
 	.8byte	.LFB209
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3b9a
+	.4byte	0x3baa
 	.uleb128 0x35
 	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF497
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0x2e8
-	.4byte	.LLST170
+	.4byte	.LLST171
 	.uleb128 0x35
 	.4byte	.LASF175
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF352
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0x2e8
-	.4byte	.LLST171
+	.4byte	.LLST172
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0x309
 	.uleb128 0x36
 	.string	"j"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0x309
 	.uleb128 0x3e
 	.4byte	.LASF498
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x38f7
-	.4byte	.LLST172
+	.2byte	0x47c
+	.4byte	0x3907
+	.4byte	.LLST173
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x2df8
+	.4byte	0x2e08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4054
+	.8byte	__func__.4050
 	.uleb128 0x24
-	.8byte	.LVL720
+	.8byte	.LVL729
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL721
+	.8byte	.LVL730
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL722
+	.8byte	.LVL731
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL723
+	.8byte	.LVL732
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL724
+	.8byte	.LVL733
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL726
-	.4byte	0x4dc3
+	.8byte	.LVL735
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL727
-	.4byte	0x52d4
+	.8byte	.LVL736
+	.4byte	0x5265
 	.uleb128 0x24
-	.8byte	.LVL733
+	.8byte	.LVL742
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL734
+	.8byte	.LVL743
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL735
-	.4byte	0x4b47
+	.8byte	.LVL744
+	.4byte	0x4b4a
 	.uleb128 0x24
-	.8byte	.LVL736
-	.4byte	0x74b8
+	.8byte	.LVL745
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL737
-	.4byte	0x74b8
+	.8byte	.LVL746
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL738
-	.4byte	0x4b47
+	.8byte	.LVL747
+	.4byte	0x4b4a
 	.uleb128 0x24
-	.8byte	.LVL740
-	.4byte	0x74b8
+	.8byte	.LVL749
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF499
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x2f
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3c93
+	.4byte	0x3ca3
 	.uleb128 0x3e
 	.4byte	.LASF83
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0x2e8
-	.4byte	.LLST262
+	.4byte	.LLST263
 	.uleb128 0x35
 	.4byte	.LASF500
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x3c93
+	.2byte	0x41f
+	.4byte	0x3ca3
 	.uleb128 0x3e
 	.4byte	.LASF501
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0x2e8
-	.4byte	.LLST263
+	.4byte	.LLST264
 	.uleb128 0x37
 	.4byte	.LASF502
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x1d08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.4032
+	.8byte	__func__.4028
 	.uleb128 0x24
-	.8byte	.LVL1255
+	.8byte	.LVL1264
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1256
+	.8byte	.LVL1265
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1257
+	.8byte	.LVL1266
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1258
+	.8byte	.LVL1267
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1259
-	.4byte	0x3d6b
+	.8byte	.LVL1268
+	.4byte	0x3d7b
 	.uleb128 0x24
-	.8byte	.LVL1260
+	.8byte	.LVL1269
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1261
-	.4byte	0x49f7
+	.8byte	.LVL1270
+	.4byte	0x49e8
 	.uleb128 0x24
-	.8byte	.LVL1262
+	.8byte	.LVL1271
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1263
-	.4byte	0x74b8
+	.8byte	.LVL1272
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1266
-	.4byte	0x74b8
+	.8byte	.LVL1275
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1267
-	.4byte	0x4b47
+	.8byte	.LVL1276
+	.4byte	0x4b4a
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
@@ -26910,182 +27049,182 @@ check_vpc_table:
 	.uleb128 0x4b
 	.4byte	.LASF503
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x3ce5
+	.4byte	0x3cf5
 	.uleb128 0x39
 	.uleb128 0x36
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0x2f3
 	.uleb128 0x36
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF504
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF447
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0x314
 	.uleb128 0x35
 	.4byte	.LASF377
 	.byte	0x2
-	.2byte	0x3bb
+	.2byte	0x3ec
 	.4byte	0x1f4b
 	.byte	0
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF505
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.8byte	.LFB206
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d6b
+	.4byte	0x3d7b
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x38f1
-	.4byte	.LLST166
+	.2byte	0x3b1
+	.4byte	0x3901
+	.4byte	.LLST167
 	.uleb128 0x3d
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0x2f3
-	.4byte	.LLST167
+	.4byte	.LLST168
 	.uleb128 0x3e
 	.4byte	.LASF102
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0x2e8
-	.4byte	.LLST168
+	.4byte	.LLST169
 	.uleb128 0x3e
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0x520
-	.4byte	.LLST169
+	.4byte	.LLST170
 	.uleb128 0x24
-	.8byte	.LVL714
+	.8byte	.LVL723
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL715
-	.4byte	0x41b4
+	.8byte	.LVL724
+	.4byte	0x41c4
 	.uleb128 0x24
-	.8byte	.LVL718
+	.8byte	.LVL727
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x4b
 	.4byte	.LASF506
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x3d8f
+	.4byte	0x3d9f
 	.uleb128 0x34
 	.4byte	.LASF180
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0x2f3
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF507
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x2f
 	.8byte	.LFB204
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3dec
+	.4byte	0x3dfc
 	.uleb128 0x3c
 	.4byte	.LASF508
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x2f3
-	.4byte	.LLST254
+	.4byte	.LLST255
 	.uleb128 0x3e
 	.4byte	.LASF509
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0x2f3
-	.4byte	.LLST255
+	.4byte	.LLST256
 	.uleb128 0x24
-	.8byte	.LVL1223
-	.4byte	0x3ed5
+	.8byte	.LVL1232
+	.4byte	0x3ee5
 	.uleb128 0x24
-	.8byte	.LVL1224
-	.4byte	0x2fa7
+	.8byte	.LVL1233
+	.4byte	0x2fb7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF510
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x2f3
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ecf
+	.4byte	0x3edf
 	.uleb128 0x3c
 	.4byte	.LASF511
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x2f3
-	.4byte	.LLST256
+	.4byte	.LLST257
 	.uleb128 0x3c
 	.4byte	.LASF512
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0x2f3
-	.4byte	.LLST257
+	.4byte	.LLST258
 	.uleb128 0x3c
 	.4byte	.LASF513
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0x3ecf
-	.4byte	.LLST258
+	.2byte	0x367
+	.4byte	0x3edf
+	.4byte	.LLST259
 	.uleb128 0x3d
 	.string	"len"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0x2e8
-	.4byte	.LLST259
+	.4byte	.LLST260
 	.uleb128 0x35
 	.4byte	.LASF514
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0x2f3
-	.4byte	.LLST260
+	.4byte	.LLST261
 	.uleb128 0x1f
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0x2f3
 	.uleb128 0x1
 	.byte	0x66
 	.uleb128 0x4a
 	.string	"req"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0x314
 	.uleb128 0x3
 	.byte	0x91
@@ -27093,25 +27232,25 @@ check_vpc_table:
 	.uleb128 0x3e
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0x2f3
-	.4byte	.LLST261
+	.4byte	.LLST262
 	.uleb128 0x1f
 	.4byte	.LASF348
 	.byte	0x2
-	.2byte	0x33d
+	.2byte	0x36e
 	.4byte	0x1b29
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x24
-	.8byte	.LVL1241
+	.8byte	.LVL1250
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1242
+	.8byte	.LVL1251
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1246
+	.8byte	.LVL1255
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x7
@@ -27120,59 +27259,59 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF517
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x2f3
 	.8byte	.LFB202
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fc5
+	.4byte	0x3fd5
 	.uleb128 0x3c
 	.4byte	.LASF511
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x2f3
-	.4byte	.LLST248
+	.4byte	.LLST249
 	.uleb128 0x3c
 	.4byte	.LASF512
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0x2f3
-	.4byte	.LLST249
+	.4byte	.LLST250
 	.uleb128 0x3c
 	.4byte	.LASF513
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0x3ecf
-	.4byte	.LLST250
+	.2byte	0x342
+	.4byte	0x3edf
+	.4byte	.LLST251
 	.uleb128 0x3d
 	.string	"len"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0x2e8
-	.4byte	.LLST251
+	.4byte	.LLST252
 	.uleb128 0x35
 	.4byte	.LASF514
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0x2f3
-	.4byte	.LLST252
+	.4byte	.LLST253
 	.uleb128 0x1f
 	.4byte	.LASF515
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0x2f3
 	.uleb128 0x1
 	.byte	0x69
 	.uleb128 0x4a
 	.string	"req"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0x314
 	.uleb128 0x3
 	.byte	0x91
@@ -27180,696 +27319,696 @@ check_vpc_table:
 	.uleb128 0x3e
 	.4byte	.LASF516
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0x2f3
-	.4byte	.LLST253
+	.4byte	.LLST254
 	.uleb128 0x1f
 	.4byte	.LASF348
 	.byte	0x2
-	.2byte	0x318
+	.2byte	0x349
 	.4byte	0x1b29
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x24
-	.8byte	.LVL1208
+	.8byte	.LVL1217
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1209
+	.8byte	.LVL1218
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1210
-	.4byte	0x41b4
+	.8byte	.LVL1219
+	.4byte	0x41c4
 	.uleb128 0x24
-	.8byte	.LVL1213
+	.8byte	.LVL1222
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF518
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x2f
 	.8byte	.LFB201
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x409f
+	.4byte	0x40af
 	.uleb128 0x46
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x2f3
-	.4byte	.LLST151
+	.4byte	.LLST152
 	.uleb128 0x46
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x520
-	.4byte	.LLST152
+	.4byte	.LLST153
 	.uleb128 0x3c
 	.4byte	.LASF519
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x2f
-	.4byte	.LLST153
+	.4byte	.LLST154
 	.uleb128 0x3e
 	.4byte	.LASF520
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x2e8
-	.4byte	.LLST154
+	.4byte	.LLST155
 	.uleb128 0x3e
 	.4byte	.LASF521
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x2e8
-	.4byte	.LLST155
+	.4byte	.LLST156
 	.uleb128 0x3e
 	.4byte	.LASF522
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0x2e8
-	.4byte	.LLST156
+	.4byte	.LLST157
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x40af
+	.4byte	0x40bf
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3959
+	.8byte	__func__.3955
 	.uleb128 0x41
 	.4byte	.LASF523
 	.byte	0x2
-	.2byte	0x2fb
-	.8byte	.L638
+	.2byte	0x32c
+	.8byte	.L647
 	.uleb128 0x24
-	.8byte	.LVL652
-	.4byte	0x74b8
+	.8byte	.LVL661
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL656
-	.4byte	0x40ff
+	.8byte	.LVL665
+	.4byte	0x410f
 	.uleb128 0x24
-	.8byte	.LVL659
-	.4byte	0x4168
+	.8byte	.LVL668
+	.4byte	0x4178
 	.uleb128 0x24
-	.8byte	.LVL660
-	.4byte	0x45b7
+	.8byte	.LVL669
+	.4byte	0x45c7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x40af
+	.4byte	0x40bf
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x8
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x409f
+	.4byte	0x40af
 	.uleb128 0x32
 	.4byte	.LASF524
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x2f
 	.8byte	.LFB200
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40ff
+	.4byte	0x410f
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0x2e8
-	.4byte	.LLST224
+	.4byte	.LLST225
 	.uleb128 0x24
-	.8byte	.LVL1019
-	.4byte	0x3c99
+	.8byte	.LVL1028
+	.4byte	0x3ca9
 	.uleb128 0x24
-	.8byte	.LVL1022
-	.4byte	0x4168
+	.8byte	.LVL1031
+	.4byte	0x4178
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF525
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0x2e8
 	.8byte	.LFB199
 	.8byte	.LFE199-.LFB199
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4168
+	.4byte	0x4178
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF526
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0x2e8
-	.4byte	.LLST50
+	.4byte	.LLST46
 	.uleb128 0x35
 	.4byte	.LASF527
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0x2f3
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x35c2
+	.4byte	0x35d2
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3942
+	.8byte	__func__.3938
 	.uleb128 0x24
-	.8byte	.LVL159
-	.4byte	0x74b8
+	.8byte	.LVL147
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF528
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x2f
 	.8byte	.LFB198
 	.8byte	.LFE198-.LFB198
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x41b4
+	.4byte	0x41c4
 	.uleb128 0x3c
 	.4byte	.LASF520
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x2e8
-	.4byte	.LLST150
+	.4byte	.LLST151
 	.uleb128 0x35
 	.4byte	.LASF102
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0x2f3
 	.uleb128 0x24
-	.8byte	.LVL646
-	.4byte	0x41b4
+	.8byte	.LVL655
+	.4byte	0x41c4
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF529
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x2f
 	.8byte	.LFB197
 	.8byte	.LFE197-.LFB197
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x42a9
+	.4byte	0x42b9
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x38f1
-	.4byte	.LLST140
+	.2byte	0x2a7
+	.4byte	0x3901
+	.4byte	.LLST141
 	.uleb128 0x3c
 	.4byte	.LASF102
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x2f3
-	.4byte	.LLST141
+	.4byte	.LLST142
 	.uleb128 0x3c
 	.4byte	.LASF513
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x520
-	.4byte	.LLST142
+	.4byte	.LLST143
 	.uleb128 0x35
 	.4byte	.LASF175
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0x2f3
 	.uleb128 0x3e
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x38f7
-	.4byte	.LLST143
+	.2byte	0x2aa
+	.4byte	0x3907
+	.4byte	.LLST144
 	.uleb128 0x3e
 	.4byte	.LASF501
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0x2e8
-	.4byte	.LLST144
+	.4byte	.LLST145
 	.uleb128 0x37
 	.4byte	.LASF530
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2742
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3917
+	.8byte	__func__.3913
 	.uleb128 0x24
-	.8byte	.LVL610
-	.4byte	0x42a9
+	.8byte	.LVL619
+	.4byte	0x42b9
 	.uleb128 0x24
-	.8byte	.LVL611
-	.4byte	0x74b8
+	.8byte	.LVL620
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL612
-	.4byte	0x74b8
+	.8byte	.LVL621
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL613
+	.8byte	.LVL622
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL616
+	.8byte	.LVL625
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL619
-	.4byte	0x74b8
+	.8byte	.LVL628
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL620
-	.4byte	0x74b8
+	.8byte	.LVL629
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF531
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x2f
 	.8byte	.LFB196
 	.8byte	.LFE196-.LFB196
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4388
+	.4byte	0x4398
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x38f1
-	.4byte	.LLST135
+	.2byte	0x277
+	.4byte	0x3901
+	.4byte	.LLST136
 	.uleb128 0x35
 	.4byte	.LASF175
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF116
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0x2e8
-	.4byte	.LLST136
+	.4byte	.LLST137
 	.uleb128 0x3e
 	.4byte	.LASF532
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0x2e8
-	.4byte	.LLST137
+	.4byte	.LLST138
 	.uleb128 0x3e
 	.4byte	.LASF533
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x617
-	.4byte	.LLST138
+	.4byte	.LLST139
 	.uleb128 0x3e
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0x520
-	.4byte	.LLST139
+	.4byte	.LLST140
 	.uleb128 0x35
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x38f7
+	.2byte	0x27d
+	.4byte	0x3907
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x4398
+	.4byte	0x43a8
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3903
+	.8byte	__func__.3899
 	.uleb128 0x24
-	.8byte	.LVL588
-	.4byte	0x74b8
+	.8byte	.LVL597
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL589
-	.4byte	0x49f7
+	.8byte	.LVL598
+	.4byte	0x49e8
 	.uleb128 0x24
-	.8byte	.LVL596
+	.8byte	.LVL605
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL601
+	.8byte	.LVL610
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL602
-	.4byte	0x439d
+	.8byte	.LVL611
+	.4byte	0x43ad
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x4398
+	.4byte	0x43a8
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x4388
+	.4byte	0x4398
 	.uleb128 0x32
 	.4byte	.LASF534
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x2f
 	.8byte	.LFB195
 	.8byte	.LFE195-.LFB195
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4496
+	.4byte	0x44a6
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x38f1
-	.4byte	.LLST145
+	.2byte	0x249
+	.4byte	0x3901
+	.4byte	.LLST146
 	.uleb128 0x3e
 	.4byte	.LASF535
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24b
 	.4byte	0x2e8
-	.4byte	.LLST146
+	.4byte	.LLST147
 	.uleb128 0x35
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24c
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF116
 	.byte	0x2
-	.2byte	0x21c
+	.2byte	0x24d
 	.4byte	0x2e8
-	.4byte	.LLST147
+	.4byte	.LLST148
 	.uleb128 0x3e
 	.4byte	.LASF533
 	.byte	0x2
-	.2byte	0x21d
+	.2byte	0x24e
 	.4byte	0x617
-	.4byte	.LLST148
+	.4byte	.LLST149
 	.uleb128 0x3e
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x21e
+	.2byte	0x24f
 	.4byte	0x520
-	.4byte	.LLST149
+	.4byte	.LLST150
 	.uleb128 0x35
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x38f7
+	.2byte	0x250
+	.4byte	0x3907
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x1d08
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3889
+	.8byte	__func__.3885
 	.uleb128 0x24
-	.8byte	.LVL628
-	.4byte	0x44ee
+	.8byte	.LVL637
+	.4byte	0x44fe
 	.uleb128 0x24
-	.8byte	.LVL630
-	.4byte	0x4496
+	.8byte	.LVL639
+	.4byte	0x44a6
 	.uleb128 0x24
-	.8byte	.LVL632
-	.4byte	0x4b47
+	.8byte	.LVL641
+	.4byte	0x4b4a
 	.uleb128 0x24
-	.8byte	.LVL634
-	.4byte	0x4496
+	.8byte	.LVL643
+	.4byte	0x44a6
 	.uleb128 0x24
-	.8byte	.LVL639
+	.8byte	.LVL648
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL640
-	.4byte	0x74b8
+	.8byte	.LVL649
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL643
-	.4byte	0x41b4
+	.8byte	.LVL652
+	.4byte	0x41c4
 	.byte	0
 	.uleb128 0x33
 	.4byte	.LASF537
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x2f
 	.byte	0x1
-	.4byte	0x44d9
+	.4byte	0x44e9
 	.uleb128 0x34
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x38f1
+	.2byte	0x231
+	.4byte	0x3901
 	.uleb128 0x35
 	.4byte	.LASF538
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF533
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x617
 	.uleb128 0x38
 	.4byte	.LASF357
-	.4byte	0x44e9
+	.4byte	0x44f9
 	.4byte	.LASF537
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x44e9
+	.4byte	0x44f9
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x19
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x44d9
+	.4byte	0x44e9
 	.uleb128 0x32
 	.4byte	.LASF539
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x2f
 	.8byte	.LFB193
 	.8byte	.LFE193-.LFB193
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45b7
+	.4byte	0x45c7
 	.uleb128 0x3c
 	.4byte	.LASF483
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x38f1
-	.4byte	.LLST127
+	.2byte	0x209
+	.4byte	0x3901
+	.4byte	.LLST128
 	.uleb128 0x3e
 	.4byte	.LASF533
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x617
-	.4byte	.LLST128
+	.4byte	.LLST129
 	.uleb128 0x3e
 	.4byte	.LASF486
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0x520
-	.4byte	.LLST129
+	.4byte	.LLST130
 	.uleb128 0x3e
 	.4byte	.LASF540
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x617
-	.4byte	.LLST130
+	.4byte	.LLST131
 	.uleb128 0x3e
 	.4byte	.LASF175
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0x2e8
-	.4byte	.LLST131
+	.4byte	.LLST132
 	.uleb128 0x3e
 	.4byte	.LASF116
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0x2e8
-	.4byte	.LLST132
+	.4byte	.LLST133
 	.uleb128 0x35
 	.4byte	.LASF538
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF541
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0x2e8
-	.4byte	.LLST133
+	.4byte	.LLST134
 	.uleb128 0x3e
 	.4byte	.LASF536
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0x2e8
-	.4byte	.LLST134
+	.4byte	.LLST135
 	.uleb128 0x24
-	.8byte	.LVL567
+	.8byte	.LVL576
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL583
-	.4byte	0x4b47
+	.8byte	.LVL592
+	.4byte	0x4b4a
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x2f
 	.8byte	.LFB192
 	.8byte	.LFE192-.LFB192
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4688
+	.4byte	0x4698
 	.uleb128 0x3c
 	.4byte	.LASF102
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x2e8
-	.4byte	.LLST123
+	.4byte	.LLST124
 	.uleb128 0x3c
 	.4byte	.LASF520
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x2e8
-	.4byte	.LLST124
+	.4byte	.LLST125
 	.uleb128 0x3e
 	.4byte	.LASF488
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x38f7
-	.4byte	.LLST125
+	.2byte	0x1e9
+	.4byte	0x3907
+	.4byte	.LLST126
 	.uleb128 0x3e
 	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0x2f3
-	.4byte	.LLST126
+	.4byte	.LLST127
 	.uleb128 0x2e
 	.4byte	.LASF357
 	.4byte	0x2742
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3846
+	.8byte	__func__.3841
 	.uleb128 0x24
-	.8byte	.LVL545
-	.4byte	0x74b8
+	.8byte	.LVL554
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL550
+	.8byte	.LVL559
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL557
+	.8byte	.LVL566
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL559
-	.4byte	0x74b8
+	.8byte	.LVL568
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL560
-	.4byte	0x74c3
+	.8byte	.LVL569
+	.4byte	0x75b2
 	.uleb128 0x24
-	.8byte	.LVL561
-	.4byte	0x74c3
+	.8byte	.LVL570
+	.4byte	0x75b2
 	.uleb128 0x24
-	.8byte	.LVL562
-	.4byte	0x74b8
+	.8byte	.LVL571
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x33
 	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x2f
 	.byte	0x1
-	.4byte	0x4707
+	.4byte	0x4717
 	.uleb128 0x34
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF545
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF546
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF547
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF548
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF549
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0x2f3
 	.uleb128 0x35
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x19b
+	.2byte	0x1c7
 	.4byte	0x134b
 	.uleb128 0x35
 	.4byte	.LASF550
 	.byte	0x2
-	.2byte	0x19b
+	.2byte	0x1c7
 	.4byte	0x134b
 	.uleb128 0x38
 	.4byte	.LASF357
-	.4byte	0x35c2
+	.4byte	0x35d2
 	.4byte	.LASF544
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF551
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x2f
 	.8byte	.LFB190
 	.8byte	.LFE190-.LFB190
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4756
+	.4byte	0x4766
 	.uleb128 0x3c
 	.4byte	.LASF90
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x2e8
-	.4byte	.LLST42
+	.4byte	.LLST38
 	.uleb128 0x35
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0x2e8
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x182
+	.2byte	0x1ae
 	.4byte	0x134b
-	.4byte	.LLST43
+	.4byte	.LLST39
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF552
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x2f
 	.8byte	.LFB189
 	.8byte	.LFE189-.LFB189
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4796
+	.4byte	0x47a6
 	.uleb128 0x3c
 	.4byte	.LASF553
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x4796
-	.4byte	.LLST41
+	.2byte	0x1a6
+	.4byte	0x47a6
+	.4byte	.LLST37
 	.uleb128 0x24
-	.8byte	.LVL127
-	.4byte	0x479c
+	.8byte	.LVL119
+	.4byte	0x47ac
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
@@ -27877,427 +28016,404 @@ check_vpc_table:
 	.uleb128 0x32
 	.4byte	.LASF554
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x2f
 	.8byte	.LFB188
 	.8byte	.LFE188-.LFB188
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x480c
+	.4byte	0x481c
 	.uleb128 0x3c
 	.4byte	.LASF553
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x4796
-	.4byte	.LLST37
+	.2byte	0x193
+	.4byte	0x47a6
+	.4byte	.LLST33
 	.uleb128 0x3c
 	.4byte	.LASF90
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x2e8
-	.4byte	.LLST38
+	.4byte	.LLST34
 	.uleb128 0x3e
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0x2e8
-	.4byte	.LLST39
+	.4byte	.LLST35
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x16a
+	.2byte	0x196
 	.4byte	0x134b
-	.4byte	.LLST40
+	.4byte	.LLST36
 	.uleb128 0x24
-	.8byte	.LVL120
-	.4byte	0x480c
+	.8byte	.LVL112
+	.4byte	0x481c
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LASF555
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x2f
 	.8byte	.LFB187
 	.8byte	.LFE187-.LFB187
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x488b
+	.4byte	0x489b
 	.uleb128 0x3c
 	.4byte	.LASF553
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x4796
-	.4byte	.LLST34
+	.2byte	0x176
+	.4byte	0x47a6
+	.4byte	.LLST30
 	.uleb128 0x3c
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x2e8
-	.4byte	.LLST35
+	.4byte	.LLST31
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x14e
+	.2byte	0x178
 	.4byte	0x134b
-	.4byte	.LLST36
+	.4byte	.LLST32
 	.uleb128 0x35
 	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x14e
+	.2byte	0x178
 	.4byte	0x134b
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x489b
+	.4byte	0x48ab
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.3805
+	.8byte	__func__.3800
 	.uleb128 0x24
-	.8byte	.LVL111
-	.4byte	0x74b8
+	.8byte	.LVL103
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x489b
+	.4byte	0x48ab
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0x10
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x488b
+	.4byte	0x489b
 	.uleb128 0x32
 	.4byte	.LASF557
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x2f
 	.8byte	.LFB186
 	.8byte	.LFE186-.LFB186
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4919
+	.4byte	0x4929
 	.uleb128 0x3c
 	.4byte	.LASF429
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x2e8
-	.4byte	.LLST30
+	.4byte	.LLST26
 	.uleb128 0x3e
 	.4byte	.LASF432
 	.byte	0x2
-	.2byte	0x11d
+	.2byte	0x147
 	.4byte	0x134b
-	.4byte	.LLST31
+	.4byte	.LLST27
 	.uleb128 0x1f
 	.4byte	.LASF556
 	.byte	0x2
-	.2byte	0x11d
+	.2byte	0x147
 	.4byte	0x134b
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3e
 	.4byte	.LASF558
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0x2e8
-	.4byte	.LLST32
+	.4byte	.LLST28
 	.uleb128 0x35
 	.4byte	.LASF559
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF560
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0x2e8
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x2a
 	.4byte	.LASF561
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x2f
-	.8byte	.LFB185
-	.8byte	.LFE185-.LFB185
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x49ad
-	.uleb128 0x23
+	.byte	0x1
+	.4byte	0x499e
+	.uleb128 0x2b
 	.4byte	.LASF429
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x2e8
-	.4byte	.LLST23
-	.uleb128 0x28
+	.uleb128 0x2c
 	.4byte	.LASF432
 	.byte	0x2
-	.byte	0xda
+	.byte	0xfa
 	.4byte	0x134b
-	.4byte	.LLST24
-	.uleb128 0x20
+	.uleb128 0x2c
 	.4byte	.LASF556
 	.byte	0x2
-	.byte	0xda
+	.byte	0xfa
 	.4byte	0x134b
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x28
+	.uleb128 0x2c
 	.4byte	.LASF562
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0x2e8
-	.4byte	.LLST25
-	.uleb128 0x28
+	.uleb128 0x2c
 	.4byte	.LASF563
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0x2e8
-	.4byte	.LLST26
-	.uleb128 0x28
+	.uleb128 0x2c
 	.4byte	.LASF547
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0x2f3
-	.4byte	.LLST27
-	.uleb128 0x28
+	.uleb128 0x2c
 	.4byte	.LASF564
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0x2f3
-	.4byte	.LLST28
 	.uleb128 0x2c
 	.4byte	.LASF560
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
+	.4byte	0x2e8
+	.uleb128 0x35
+	.4byte	.LASF111
+	.byte	0x2
+	.2byte	0x100
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x4e
 	.4byte	.LASF565
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x49d2
+	.4byte	0x49c3
 	.uleb128 0x2b
 	.4byte	.LASF429
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0x2e8
 	.uleb128 0x38
 	.4byte	.LASF357
-	.4byte	0x489b
+	.4byte	0x48ab
 	.4byte	.LASF565
 	.byte	0
 	.uleb128 0x4e
 	.4byte	.LASF566
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x49f7
+	.4byte	0x49e8
 	.uleb128 0x2b
 	.4byte	.LASF429
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0x2e8
 	.uleb128 0x38
 	.4byte	.LASF357
-	.4byte	0x489b
+	.4byte	0x48ab
 	.4byte	.LASF566
 	.byte	0
 	.uleb128 0x22
 	.4byte	.LASF567
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0x2e8
 	.8byte	.LFB182
 	.8byte	.LFE182-.LFB182
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4a5e
+	.4byte	0x4a91
 	.uleb128 0x43
 	.string	"tmp"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0x2e8
-	.4byte	.LLST22
-	.uleb128 0x4c
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
-	.4byte	0x4a46
+	.4byte	.LLST113
 	.uleb128 0x29
 	.string	"Q"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x4a5e
-	.byte	0
+	.byte	0xb7
+	.4byte	0x4a91
 	.uleb128 0x4f
-	.4byte	0x4c00
-	.8byte	.LBB172
-	.8byte	.LBE172-.LBB172
+	.4byte	.LASF568
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.8byte	.L445
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x4a63
+	.uleb128 0x28
+	.4byte	.LASF569
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0x2e8
+	.4byte	.LLST114
+	.uleb128 0x24
+	.8byte	.LVL481
+	.4byte	0x4cdc
+	.uleb128 0x24
+	.8byte	.LVL482
+	.4byte	0x1b39
+	.byte	0
+	.uleb128 0x50
+	.4byte	0x4b91
+	.8byte	.LBB235
+	.4byte	.Ldebug_ranges0+0x140
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x24
+	.8byte	.LVL483
+	.4byte	0x75a7
+	.uleb128 0x24
+	.8byte	.LVL484
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
 	.4byte	0xac3
 	.uleb128 0x22
-	.4byte	.LASF568
+	.4byte	.LASF570
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x2f
 	.8byte	.LFB181
 	.8byte	.LFE181-.LFB181
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ac9
+	.4byte	0x4afc
 	.uleb128 0x26
 	.string	"blk"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x2e8
-	.4byte	.LLST21
-	.uleb128 0x50
+	.4byte	.LLST19
+	.uleb128 0x51
 	.string	"ret"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x2f
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x50
+	.uleb128 0x51
 	.string	"i"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0x2f3
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x29
 	.string	"Q"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x4a5e
-	.uleb128 0x51
-	.4byte	0x4bf4
-	.8byte	.LBB168
+	.byte	0xa6
+	.4byte	0x4a91
+	.uleb128 0x50
+	.4byte	0x4b85
+	.8byte	.LBB172
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF569
-	.byte	0x2
-	.byte	0x73
-	.8byte	.LFB180
-	.8byte	.LFE180-.LFB180
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b47
-	.uleb128 0x29
-	.string	"i"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x2e8
-	.uleb128 0x43
-	.string	"tmp"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x2e8
-	.4byte	.LLST18
-	.uleb128 0x29
-	.string	"j"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0x2e8
-	.uleb128 0x28
-	.4byte	.LASF380
+	.4byte	.LASF571
 	.byte	0x2
-	.byte	0x76
-	.4byte	0x2e8
-	.4byte	.LLST19
-	.uleb128 0x2c
-	.4byte	.LASF570
+	.byte	0x75
+	.8byte	.LFB180
+	.8byte	.LFE180-.LFB180
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4b4a
+	.uleb128 0x20
+	.4byte	.LASF111
 	.byte	0x2
 	.byte	0x77
+	.4byte	0x2fe
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x43
+	.string	"i"
+	.byte	0x2
+	.byte	0x78
 	.4byte	0x2e8
-	.uleb128 0x28
-	.4byte	.LASF571
+	.4byte	.LLST18
+	.uleb128 0x51
+	.string	"blk"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0x2f3
-	.4byte	.LLST20
+	.4byte	0x2e8
+	.uleb128 0x1
+	.byte	0x57
 	.uleb128 0x29
 	.string	"Q"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x4a5e
-	.uleb128 0x24
-	.8byte	.LVL56
-	.4byte	0x4d4b
+	.4byte	0x4a91
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x4e
 	.4byte	.LASF572
 	.byte	0x2
 	.byte	0x61
-	.8byte	.LFB179
-	.8byte	.LFE179-.LFB179
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4bf4
-	.uleb128 0x26
+	.byte	0x1
+	.4byte	0x4b85
+	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0x2e8
-	.4byte	.LLST106
-	.uleb128 0x23
+	.uleb128 0x2b
 	.4byte	.LASF573
 	.byte	0x2
 	.byte	0x61
 	.4byte	0x2e8
-	.4byte	.LLST107
-	.uleb128 0x4c
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
-	.4byte	0x4bdc
+	.uleb128 0x39
 	.uleb128 0x29
 	.string	"Q"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x4a5e
-	.uleb128 0x52
-	.8byte	.LBB218
-	.8byte	.LBE218-.LBB218
-	.uleb128 0x28
-	.4byte	.LASF574
-	.byte	0x2
 	.byte	0x66
+	.4byte	0x4a91
+	.uleb128 0x39
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x2
+	.byte	0x68
 	.4byte	0x2e8
-	.4byte	.LLST108
-	.uleb128 0x24
-	.8byte	.LVL434
-	.4byte	0x4d4b
-	.uleb128 0x24
-	.8byte	.LVL436
-	.4byte	0x1b39
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.4byte	0x4bf4
-	.8byte	.LBB215
-	.8byte	.LBE215-.LBB215
-	.byte	0x2
-	.byte	0x63
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF575
+	.uleb128 0x52
+	.4byte	.LASF574
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0x2e8
 	.byte	0x1
-	.uleb128 0x53
-	.4byte	.LASF576
+	.uleb128 0x52
+	.4byte	.LASF575
 	.byte	0x2
 	.byte	0x57
 	.4byte	0x2e8
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0x2e8
@@ -28305,24 +28421,24 @@ check_vpc_table:
 	.8byte	.LFE176-.LFB176
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c53
+	.4byte	0x4be4
 	.uleb128 0x26
 	.string	"max"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0x2e8
-	.4byte	.LLST122
+	.4byte	.LLST123
 	.uleb128 0x29
 	.string	"Q"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x4a5e
+	.4byte	0x4a91
 	.uleb128 0x24
-	.8byte	.LVL541
+	.8byte	.LVL550
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x2f
@@ -28330,20 +28446,20 @@ check_vpc_table:
 	.8byte	.LFE175-.LFB175
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4cfe
+	.4byte	0x4c8f
 	.uleb128 0x23
 	.4byte	.LASF175
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x2f3
-	.4byte	.LLST93
+	.4byte	.LLST90
 	.uleb128 0x23
 	.4byte	.LASF351
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x2f
-	.4byte	.LLST94
-	.uleb128 0x50
+	.4byte	.LLST91
+	.uleb128 0x51
 	.string	"req"
 	.byte	0x2
 	.byte	0x30
@@ -28356,20 +28472,20 @@ check_vpc_table:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0x309
-	.4byte	.LLST95
+	.4byte	.LLST92
 	.uleb128 0x28
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x2
 	.byte	0x31
 	.4byte	0x309
-	.4byte	.LLST96
+	.4byte	.LLST93
 	.uleb128 0x29
 	.string	"mid"
 	.byte	0x2
 	.byte	0x31
 	.4byte	0x309
 	.uleb128 0x20
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x1b29
@@ -28377,19 +28493,19 @@ check_vpc_table:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x2c
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x2
 	.byte	0x33
 	.4byte	0x2e8
 	.uleb128 0x24
-	.8byte	.LVL393
+	.8byte	.LVL386
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL400
+	.8byte	.LVL393
 	.4byte	0x1d0d
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x2f3
@@ -28397,20 +28513,20 @@ check_vpc_table:
 	.8byte	.LFE174-.LFB174
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d4b
+	.4byte	0x4cdc
 	.uleb128 0x23
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x2f3
 	.4byte	.LLST16
 	.uleb128 0x23
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0x2f3
 	.4byte	.LLST17
-	.uleb128 0x50
+	.uleb128 0x51
 	.string	"ret"
 	.byte	0x2
 	.byte	0x20
@@ -28419,7 +28535,7 @@ check_vpc_table:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x2
 	.byte	0x14
 	.4byte	0x2e8
@@ -28427,7 +28543,7 @@ check_vpc_table:
 	.8byte	.LFE173-.LFB173
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d87
+	.4byte	0x4d18
 	.uleb128 0x23
 	.4byte	.LASF375
 	.byte	0x2
@@ -28441,7 +28557,7 @@ check_vpc_table:
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x2
 	.byte	0xc
 	.4byte	0x2e8
@@ -28449,7 +28565,7 @@ check_vpc_table:
 	.8byte	.LFE172-.LFB172
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4dc3
+	.4byte	0x4d54
 	.uleb128 0x23
 	.4byte	.LASF375
 	.byte	0x2
@@ -28463,7 +28579,7 @@ check_vpc_table:
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x4
 	.4byte	0x2e8
@@ -28471,7 +28587,7 @@ check_vpc_table:
 	.8byte	.LFE171-.LFB171
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4e0c
+	.4byte	0x4d9d
 	.uleb128 0x23
 	.4byte	.LASF373
 	.byte	0x2
@@ -28492,7 +28608,7 @@ check_vpc_table:
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0x2fe
@@ -28500,13 +28616,13 @@ check_vpc_table:
 	.8byte	.LFE170-.LFB170
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f9a
+	.4byte	0x4f2b
 	.uleb128 0x3d
 	.string	"die"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0x2f3
-	.4byte	.LLST246
+	.4byte	.LLST247
 	.uleb128 0x36
 	.string	"blk"
 	.byte	0x4
@@ -28517,91 +28633,91 @@ check_vpc_table:
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0x2f3
-	.4byte	.LLST247
+	.4byte	.LLST248
 	.uleb128 0x35
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x4f9a
+	.4byte	0x4f2b
 	.uleb128 0x37
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x24
-	.8byte	.LVL1165
-	.4byte	0x514e
+	.8byte	.LVL1174
+	.4byte	0x50df
 	.uleb128 0x24
-	.8byte	.LVL1166
-	.4byte	0x4fa0
+	.8byte	.LVL1175
+	.4byte	0x4f31
 	.uleb128 0x24
-	.8byte	.LVL1168
-	.4byte	0x52d4
+	.8byte	.LVL1177
+	.4byte	0x5265
 	.uleb128 0x24
-	.8byte	.LVL1169
+	.8byte	.LVL1178
 	.4byte	0x1ae5
 	.uleb128 0x24
-	.8byte	.LVL1170
-	.4byte	0x5333
+	.8byte	.LVL1179
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1173
+	.8byte	.LVL1182
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1174
+	.8byte	.LVL1183
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1175
-	.4byte	0x5333
+	.8byte	.LVL1184
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1176
+	.8byte	.LVL1185
 	.4byte	0x1a73
 	.uleb128 0x24
-	.8byte	.LVL1177
-	.4byte	0x525a
+	.8byte	.LVL1186
+	.4byte	0x51eb
 	.uleb128 0x24
-	.8byte	.LVL1178
-	.4byte	0x52d4
+	.8byte	.LVL1187
+	.4byte	0x5265
 	.uleb128 0x24
-	.8byte	.LVL1179
+	.8byte	.LVL1188
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1180
+	.8byte	.LVL1189
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1183
+	.8byte	.LVL1192
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1184
+	.8byte	.LVL1193
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL1185
+	.8byte	.LVL1194
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1186
-	.4byte	0x5333
+	.8byte	.LVL1195
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1187
-	.4byte	0x5333
+	.8byte	.LVL1196
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1188
+	.8byte	.LVL1197
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL1189
-	.4byte	0x5333
+	.8byte	.LVL1198
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1190
-	.4byte	0x5333
+	.8byte	.LVL1199
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL1191
-	.4byte	0x5179
+	.8byte	.LVL1200
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL1192
-	.4byte	0x5179
+	.8byte	.LVL1201
+	.4byte	0x510a
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
 	.4byte	0x6e7
 	.uleb128 0x32
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x2f
@@ -28609,36 +28725,36 @@ check_vpc_table:
 	.8byte	.LFE169-.LFB169
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x500c
+	.4byte	0x4f9d
 	.uleb128 0x3d
 	.string	"die"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0x2f3
-	.4byte	.LLST90
+	.4byte	.LLST87
 	.uleb128 0x3d
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0x2e8
-	.4byte	.LLST91
+	.4byte	.LLST88
 	.uleb128 0x3e
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0x2f3
-	.4byte	.LLST92
+	.4byte	.LLST89
 	.uleb128 0x35
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x4f9a
+	.4byte	0x4f2b
 	.uleb128 0x24
-	.8byte	.LVL388
+	.8byte	.LVL381
 	.4byte	0x1d0d
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x2f
@@ -28646,75 +28762,75 @@ check_vpc_table:
 	.8byte	.LFE168-.LFB168
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x50ec
+	.4byte	0x507d
 	.uleb128 0x43
 	.string	"i"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0x2f3
-	.4byte	.LLST243
+	.4byte	.LLST244
 	.uleb128 0x43
 	.string	"blk"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0x2e8
-	.4byte	.LLST244
+	.4byte	.LLST245
 	.uleb128 0x28
 	.4byte	.LASF485
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0x309
-	.4byte	.LLST245
+	.4byte	.LLST246
 	.uleb128 0x2c
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x4f9a
+	.4byte	0x4f2b
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x50fc
+	.4byte	0x508d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.3647
 	.uleb128 0x24
-	.8byte	.LVL1140
-	.4byte	0x514e
+	.8byte	.LVL1149
+	.4byte	0x50df
 	.uleb128 0x24
-	.8byte	.LVL1142
+	.8byte	.LVL1151
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1143
+	.8byte	.LVL1152
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1144
+	.8byte	.LVL1153
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1146
-	.4byte	0x4c53
-	.uleb128 0x24
-	.8byte	.LVL1148
-	.4byte	0x74b8
+	.8byte	.LVL1155
+	.4byte	0x4be4
 	.uleb128 0x24
-	.8byte	.LVL1149
-	.4byte	0x629d
+	.8byte	.LVL1157
+	.4byte	0x75a7
 	.uleb128 0x24
 	.8byte	.LVL1158
+	.4byte	0x622e
+	.uleb128 0x24
+	.8byte	.LVL1167
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1162
+	.8byte	.LVL1171
 	.4byte	0x19ba
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x50fc
+	.4byte	0x508d
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0xa
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x50ec
+	.4byte	0x507d
 	.uleb128 0x22
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0x2e8
@@ -28722,7 +28838,7 @@ check_vpc_table:
 	.8byte	.LFE167-.LFB167
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x514e
+	.4byte	0x50df
 	.uleb128 0x43
 	.string	"blk"
 	.byte	0x4
@@ -28730,30 +28846,30 @@ check_vpc_table:
 	.4byte	0x2e8
 	.4byte	.LLST11
 	.uleb128 0x28
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0x2e8
 	.4byte	.LLST12
 	.uleb128 0x24
 	.8byte	.LVL36
-	.4byte	0x52d4
+	.4byte	0x5265
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x4
 	.byte	0x94
 	.8byte	.LFB166
 	.8byte	.LFE166-.LFB166
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5179
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL538
+	.8byte	.LVL547
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x2f
@@ -28761,87 +28877,87 @@ check_vpc_table:
 	.8byte	.LFE165-.LFB165
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x525a
+	.4byte	0x51eb
 	.uleb128 0x43
 	.string	"i"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x2f
-	.4byte	.LLST205
+	.4byte	.LLST206
 	.uleb128 0x28
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x2f
-	.4byte	.LLST206
+	.4byte	.LLST207
 	.uleb128 0x28
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x4f9a
-	.4byte	.LLST207
+	.4byte	0x4f2b
+	.4byte	.LLST208
 	.uleb128 0x28
 	.4byte	.LASF501
 	.byte	0x4
 	.byte	0x54
 	.4byte	0x2e8
-	.4byte	.LLST208
+	.4byte	.LLST209
 	.uleb128 0x40
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x54
+	.uleb128 0x53
 	.4byte	.LASF357
 	.4byte	0x1d08
 	.uleb128 0x24
-	.8byte	.LVL907
+	.8byte	.LVL916
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL909
+	.8byte	.LVL918
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL912
-	.4byte	0x74b8
+	.8byte	.LVL921
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL913
+	.8byte	.LVL922
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL914
+	.8byte	.LVL923
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL915
+	.8byte	.LVL924
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL918
-	.4byte	0x74b8
+	.8byte	.LVL927
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL919
-	.4byte	0x74b8
+	.8byte	.LVL928
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL921
+	.8byte	.LVL930
 	.4byte	0x19ba
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x4
 	.byte	0x41
 	.8byte	.LFB164
 	.8byte	.LFE164-.LFB164
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52cc
+	.4byte	0x525d
 	.uleb128 0x23
 	.4byte	.LASF533
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x617
-	.4byte	.LLST120
+	.4byte	.LLST121
 	.uleb128 0x23
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x520
-	.4byte	.LLST121
+	.4byte	.LLST122
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x4
@@ -28849,24 +28965,24 @@ check_vpc_table:
 	.4byte	0x2f3
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x2df8
+	.4byte	0x2e08
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.3604
 	.uleb128 0x24
-	.8byte	.LVL535
+	.8byte	.LVL544
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL536
-	.4byte	0x74b8
+	.8byte	.LVL545
+	.4byte	0x75a7
 	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF602
+	.uleb128 0x54
+	.4byte	.LASF601
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x2f
@@ -28874,7 +28990,7 @@ check_vpc_table:
 	.8byte	.LFE162-.LFB162
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5333
+	.4byte	0x52c4
 	.uleb128 0x23
 	.4byte	.LASF175
 	.byte	0x4
@@ -28892,7 +29008,7 @@ check_vpc_table:
 	.byte	0x1a
 	.4byte	0x2f3
 	.uleb128 0x2c
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x520
@@ -28904,7 +29020,7 @@ check_vpc_table:
 	.4byte	.LLST10
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x2f
@@ -28912,7 +29028,7 @@ check_vpc_table:
 	.8byte	.LFE161-.LFB161
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5396
+	.4byte	0x5327
 	.uleb128 0x23
 	.4byte	.LASF175
 	.byte	0x4
@@ -28926,7 +29042,7 @@ check_vpc_table:
 	.4byte	0x2f3
 	.4byte	.LLST8
 	.uleb128 0x2c
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x520
@@ -28937,648 +29053,648 @@ check_vpc_table:
 	.4byte	0x2e8
 	.uleb128 0x24
 	.8byte	.LVL29
-	.4byte	0x74b8
+	.4byte	0x75a7
 	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF665
+	.uleb128 0x55
+	.4byte	.LASF664
 	.byte	0x3
-	.2byte	0x4bb
+	.2byte	0x4bd
 	.4byte	0x2f3
 	.8byte	.LFB160
 	.8byte	.LFE160-.LFB160
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x32
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0x2f
 	.8byte	.LFB159
 	.8byte	.LFE159-.LFB159
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5414
+	.4byte	0x53a5
 	.uleb128 0x3c
 	.4byte	.LASF90
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0xa1
-	.4byte	.LLST326
+	.4byte	.LLST327
 	.uleb128 0x3c
 	.4byte	.LASF111
 	.byte	0x3
-	.2byte	0x4b6
+	.2byte	0x4b8
 	.4byte	0xa1
-	.4byte	.LLST327
+	.4byte	.LLST328
 	.uleb128 0x46
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b6
-	.4byte	0x5414
-	.4byte	.LLST328
+	.2byte	0x4b8
+	.4byte	0x53a5
+	.4byte	.LLST329
 	.uleb128 0x24
-	.8byte	.LVL1635
-	.4byte	0x5570
+	.8byte	.LVL1644
+	.4byte	0x5501
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
 	.4byte	0x81
 	.uleb128 0x32
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0x2f
 	.8byte	.LFB158
 	.8byte	.LFE158-.LFB158
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x547a
+	.4byte	0x540b
 	.uleb128 0x3c
 	.4byte	.LASF90
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0xa1
-	.4byte	.LLST312
+	.4byte	.LLST313
 	.uleb128 0x3c
 	.4byte	.LASF111
 	.byte	0x3
-	.2byte	0x4b0
+	.2byte	0x4b3
 	.4byte	0xa1
-	.4byte	.LLST313
+	.4byte	.LLST314
 	.uleb128 0x46
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b0
-	.4byte	0x5414
-	.4byte	.LLST314
+	.2byte	0x4b3
+	.4byte	0x53a5
+	.4byte	.LLST315
 	.uleb128 0x24
-	.8byte	.LVL1556
-	.4byte	0x59b6
+	.8byte	.LVL1565
+	.4byte	0x5947
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x2f
 	.8byte	.LFB157
 	.8byte	.LFE157-.LFB157
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5570
+	.4byte	0x5501
 	.uleb128 0x3c
 	.4byte	.LASF511
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x2f3
-	.4byte	.LLST274
+	.4byte	.LLST275
 	.uleb128 0x3c
 	.4byte	.LASF512
 	.byte	0x3
-	.2byte	0x481
+	.2byte	0x484
 	.4byte	0x2f3
-	.4byte	.LLST275
+	.4byte	.LLST276
 	.uleb128 0x3e
 	.4byte	.LASF514
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x486
 	.4byte	0x2e8
-	.4byte	.LLST276
+	.4byte	.LLST277
 	.uleb128 0x36
 	.string	"tmp"
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x487
 	.4byte	0x2e8
 	.uleb128 0x3d
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x485
+	.2byte	0x488
 	.4byte	0x2f3
-	.4byte	.LLST277
+	.4byte	.LLST278
 	.uleb128 0x3e
 	.4byte	.LASF443
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x489
 	.4byte	0x2f3
-	.4byte	.LLST278
+	.4byte	.LLST279
 	.uleb128 0x3e
 	.4byte	.LASF420
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x489
 	.4byte	0x2f3
-	.4byte	.LLST279
+	.4byte	.LLST280
 	.uleb128 0x35
 	.4byte	.LASF409
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x48a
 	.4byte	0x2e8
 	.uleb128 0x24
-	.8byte	.LVL1331
-	.4byte	0x5815
+	.8byte	.LVL1340
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1337
-	.4byte	0x40b4
+	.8byte	.LVL1346
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1338
-	.4byte	0x3b9a
+	.8byte	.LVL1347
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1339
-	.4byte	0x3fc5
+	.8byte	.LVL1348
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1340
-	.4byte	0x3fc5
+	.8byte	.LVL1349
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1343
-	.4byte	0x4d4b
+	.8byte	.LVL1352
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1344
+	.8byte	.LVL1353
 	.4byte	0x266c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x2f
 	.8byte	.LFB156
 	.8byte	.LFE156-.LFB156
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5815
+	.4byte	0x57a6
 	.uleb128 0x46
 	.string	"LUN"
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x2dd
-	.4byte	.LLST315
+	.4byte	.LLST316
 	.uleb128 0x3c
 	.4byte	.LASF511
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x2f3
-	.4byte	.LLST316
+	.4byte	.LLST317
 	.uleb128 0x3c
 	.4byte	.LASF512
 	.byte	0x3
-	.2byte	0x3be
+	.2byte	0x3c1
 	.4byte	0x2f3
-	.4byte	.LLST317
+	.4byte	.LLST318
 	.uleb128 0x3c
 	.4byte	.LASF513
 	.byte	0x3
-	.2byte	0x3be
-	.4byte	0x3ecf
-	.4byte	.LLST318
+	.2byte	0x3c1
+	.4byte	0x3edf
+	.4byte	.LLST319
 	.uleb128 0x35
 	.4byte	.LASF377
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3c3
 	.4byte	0x1f4b
 	.uleb128 0x3d
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x2f3
-	.4byte	.LLST319
+	.4byte	.LLST320
 	.uleb128 0x3e
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x2f3
-	.4byte	.LLST320
+	.4byte	.LLST321
 	.uleb128 0x3e
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3c4
 	.4byte	0x2f3
-	.4byte	.LLST321
+	.4byte	.LLST322
 	.uleb128 0x3e
 	.4byte	.LASF443
 	.byte	0x3
-	.2byte	0x3c2
+	.2byte	0x3c5
 	.4byte	0x2f3
-	.4byte	.LLST322
+	.4byte	.LLST323
 	.uleb128 0x36
 	.string	"ppa"
 	.byte	0x3
-	.2byte	0x3c2
+	.2byte	0x3c5
 	.4byte	0x2f3
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x2f3
-	.4byte	.LLST323
+	.4byte	.LLST324
 	.uleb128 0x3e
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x2f3
-	.4byte	.LLST324
+	.4byte	.LLST325
 	.uleb128 0x35
 	.4byte	.LASF374
 	.byte	0x3
-	.2byte	0x3c3
+	.2byte	0x3c6
 	.4byte	0x2f3
 	.uleb128 0x35
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c7
 	.4byte	0x2f3
 	.uleb128 0x35
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c7
 	.4byte	0x2f3
 	.uleb128 0x3e
 	.4byte	.LASF419
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c8
 	.4byte	0x1423
-	.4byte	.LLST325
+	.4byte	.LLST326
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x40af
+	.4byte	0x40bf
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.3540
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0x56cf
+	.4byte	.Ldebug_ranges0+0x390
+	.4byte	0x5660
 	.uleb128 0x1f
 	.4byte	.LASF382
 	.byte	0x3
-	.2byte	0x43a
+	.2byte	0x43d
 	.4byte	0x314
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x24
-	.8byte	.LVL1617
+	.8byte	.LVL1626
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1621
-	.4byte	0x74b8
+	.8byte	.LVL1630
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1622
-	.4byte	0x74b8
+	.8byte	.LVL1631
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1559
-	.4byte	0x3ed5
+	.8byte	.LVL1568
+	.4byte	0x3ee5
 	.uleb128 0x24
-	.8byte	.LVL1571
-	.4byte	0x5815
+	.8byte	.LVL1580
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1575
-	.4byte	0x74b8
+	.8byte	.LVL1584
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1576
-	.4byte	0x5815
+	.8byte	.LVL1585
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1577
+	.8byte	.LVL1586
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1579
+	.8byte	.LVL1588
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1581
+	.8byte	.LVL1590
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1582
-	.4byte	0x74b8
+	.8byte	.LVL1591
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1587
+	.8byte	.LVL1596
 	.4byte	0x1e7e
 	.uleb128 0x24
-	.8byte	.LVL1590
-	.4byte	0x4707
+	.8byte	.LVL1599
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL1591
+	.8byte	.LVL1600
 	.4byte	0x208d
 	.uleb128 0x24
-	.8byte	.LVL1592
+	.8byte	.LVL1601
 	.4byte	0x1e7e
 	.uleb128 0x24
-	.8byte	.LVL1593
+	.8byte	.LVL1602
 	.4byte	0x1e7e
 	.uleb128 0x24
-	.8byte	.LVL1595
+	.8byte	.LVL1604
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1598
-	.4byte	0x5815
+	.8byte	.LVL1607
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1601
+	.8byte	.LVL1610
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1603
-	.4byte	0x3fc5
+	.8byte	.LVL1612
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1604
+	.8byte	.LVL1613
 	.4byte	0x2747
 	.uleb128 0x24
-	.8byte	.LVL1607
+	.8byte	.LVL1616
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1612
-	.4byte	0x74b8
+	.8byte	.LVL1621
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1618
+	.8byte	.LVL1627
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1623
+	.8byte	.LVL1632
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1624
+	.8byte	.LVL1633
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1628
-	.4byte	0x5845
+	.8byte	.LVL1637
+	.4byte	0x57d6
 	.uleb128 0x24
-	.8byte	.LVL1629
-	.4byte	0x74b8
+	.8byte	.LVL1638
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x3
-	.2byte	0x3b5
+	.2byte	0x3b7
 	.4byte	0x2f
 	.8byte	.LFB155
 	.8byte	.LFE155-.LFB155
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5845
+	.4byte	0x57d6
 	.uleb128 0x24
-	.8byte	.LVL1318
-	.4byte	0x5845
+	.8byte	.LVL1327
+	.4byte	0x57d6
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.8byte	.LFB154
 	.8byte	.LFE154-.LFB154
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x59a1
+	.4byte	0x5932
 	.uleb128 0x46
 	.string	"req"
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0xfdb
-	.4byte	.LLST268
+	.4byte	.LLST269
 	.uleb128 0x3c
 	.4byte	.LASF374
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x2f3
-	.4byte	.LLST269
+	.4byte	.LLST270
 	.uleb128 0x3c
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x2f3
-	.4byte	.LLST270
+	.4byte	.LLST271
 	.uleb128 0x3c
 	.4byte	.LASF419
 	.byte	0x3
-	.2byte	0x385
+	.2byte	0x387
 	.4byte	0x1423
-	.4byte	.LLST271
+	.4byte	.LLST272
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x3
-	.2byte	0x387
+	.2byte	0x389
 	.4byte	0x2f3
 	.uleb128 0x3d
 	.string	"ppa"
 	.byte	0x3
-	.2byte	0x388
+	.2byte	0x38a
 	.4byte	0x2f3
-	.4byte	.LLST272
+	.4byte	.LLST273
 	.uleb128 0x3e
 	.4byte	.LASF443
 	.byte	0x3
-	.2byte	0x388
+	.2byte	0x38a
 	.4byte	0x2f3
-	.4byte	.LLST273
+	.4byte	.LLST274
 	.uleb128 0x35
 	.4byte	.LASF402
 	.byte	0x3
-	.2byte	0x389
+	.2byte	0x38b
 	.4byte	0x2e8
 	.uleb128 0x35
 	.4byte	.LASF377
 	.byte	0x3
-	.2byte	0x38a
+	.2byte	0x38c
 	.4byte	0x1f4b
 	.uleb128 0x35
 	.4byte	.LASF467
 	.byte	0x3
-	.2byte	0x38b
+	.2byte	0x38d
 	.4byte	0x2f3
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x59b1
+	.4byte	0x5942
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.3512
 	.uleb128 0x24
-	.8byte	.LVL1302
+	.8byte	.LVL1311
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1304
-	.4byte	0x4d4b
+	.8byte	.LVL1313
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1305
+	.8byte	.LVL1314
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1306
+	.8byte	.LVL1315
 	.4byte	0x201d
 	.uleb128 0x24
-	.8byte	.LVL1307
+	.8byte	.LVL1316
 	.4byte	0x2747
 	.uleb128 0x24
-	.8byte	.LVL1308
+	.8byte	.LVL1317
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL1309
-	.4byte	0x74b8
+	.8byte	.LVL1318
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1311
-	.4byte	0x3fc5
+	.8byte	.LVL1320
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1313
-	.4byte	0x4d4b
+	.8byte	.LVL1322
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1314
-	.4byte	0x74b8
+	.8byte	.LVL1323
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1315
+	.8byte	.LVL1324
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1316
-	.4byte	0x74b8
+	.8byte	.LVL1325
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x4b
-	.4byte	0x59b1
+	.4byte	0x5942
 	.uleb128 0x17
 	.4byte	0x3d
 	.byte	0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	0x59a1
+	.4byte	0x5932
 	.uleb128 0x32
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x2f
 	.8byte	.LFB153
 	.8byte	.LFE153-.LFB153
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b74
+	.4byte	0x5b05
 	.uleb128 0x46
 	.string	"LUN"
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x2dd
-	.4byte	.LLST298
+	.4byte	.LLST299
 	.uleb128 0x3c
 	.4byte	.LASF511
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x2f3
-	.4byte	.LLST299
+	.4byte	.LLST300
 	.uleb128 0x3c
 	.4byte	.LASF512
 	.byte	0x3
-	.2byte	0x32c
+	.2byte	0x32d
 	.4byte	0x2f3
-	.4byte	.LLST300
+	.4byte	.LLST301
 	.uleb128 0x3c
 	.4byte	.LASF513
 	.byte	0x3
-	.2byte	0x32c
-	.4byte	0x3ecf
-	.4byte	.LLST301
+	.2byte	0x32d
+	.4byte	0x3edf
+	.4byte	.LLST302
 	.uleb128 0x4a
 	.string	"ret"
 	.byte	0x3
-	.2byte	0x32e
+	.2byte	0x32f
 	.4byte	0x2f
 	.uleb128 0x1
 	.byte	0x65
 	.uleb128 0x3e
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x3
-	.2byte	0x32f
+	.2byte	0x330
 	.4byte	0x2f3
-	.4byte	.LLST302
+	.4byte	.LLST303
 	.uleb128 0x3e
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x3
-	.2byte	0x32f
+	.2byte	0x330
 	.4byte	0x2f3
-	.4byte	.LLST303
+	.4byte	.LLST304
 	.uleb128 0x3e
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x3
-	.2byte	0x32f
+	.2byte	0x330
 	.4byte	0x2f3
-	.4byte	.LLST304
+	.4byte	.LLST305
 	.uleb128 0x3d
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x330
+	.2byte	0x331
 	.4byte	0x2f3
-	.4byte	.LLST305
+	.4byte	.LLST306
 	.uleb128 0x3d
 	.string	"ppa"
 	.byte	0x3
-	.2byte	0x330
+	.2byte	0x331
 	.4byte	0x2f3
-	.4byte	.LLST306
+	.4byte	.LLST307
 	.uleb128 0x36
 	.string	"n"
 	.byte	0x3
-	.2byte	0x332
+	.2byte	0x333
 	.4byte	0x2f3
 	.uleb128 0x3e
 	.4byte	.LASF374
 	.byte	0x3
-	.2byte	0x332
-	.4byte	0x2f3
-	.4byte	.LLST307
-	.uleb128 0x3e
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x332
+	.2byte	0x333
 	.4byte	0x2f3
 	.4byte	.LLST308
 	.uleb128 0x3e
-	.4byte	.LASF619
+	.4byte	.LASF610
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0x2f3
 	.4byte	.LLST309
-	.uleb128 0x35
-	.4byte	.LASF620
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x2f3
 	.uleb128 0x3e
-	.4byte	.LASF621
+	.4byte	.LASF618
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0x2f3
 	.4byte	.LLST310
+	.uleb128 0x35
+	.4byte	.LASF619
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0x2f3
 	.uleb128 0x3e
-	.4byte	.LASF622
+	.4byte	.LASF620
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0x2f3
 	.4byte	.LLST311
+	.uleb128 0x3e
+	.4byte	.LASF621
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0x2f3
+	.4byte	.LLST312
 	.uleb128 0x4c
-	.8byte	.LBB296
-	.8byte	.LBE296-.LBB296
-	.4byte	0x5b18
+	.8byte	.LBB324
+	.8byte	.LBE324-.LBB324
+	.4byte	0x5aa9
 	.uleb128 0x35
 	.4byte	.LASF389
 	.byte	0x3
-	.2byte	0x379
+	.2byte	0x37a
 	.4byte	0x2e8
 	.uleb128 0x24
-	.8byte	.LVL1535
-	.4byte	0x4d4b
+	.8byte	.LVL1544
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL1536
+	.8byte	.LVL1545
 	.4byte	0x208d
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1506
-	.4byte	0x3dec
-	.uleb128 0x24
 	.8byte	.LVL1515
-	.4byte	0x5815
+	.4byte	0x3dfc
+	.uleb128 0x24
+	.8byte	.LVL1524
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1522
+	.8byte	.LVL1531
 	.4byte	0x1e7e
 	.uleb128 0x24
-	.8byte	.LVL1524
-	.4byte	0x3fc5
+	.8byte	.LVL1533
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1528
+	.8byte	.LVL1537
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1534
+	.8byte	.LVL1543
 	.4byte	0x19ba
 	.uleb128 0x24
-	.8byte	.LVL1541
+	.8byte	.LVL1550
 	.4byte	0x1a1d
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF623
+	.4byte	.LASF622
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x2f
@@ -29586,13 +29702,13 @@ check_vpc_table:
 	.8byte	.LFE152-.LFB152
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ba4
+	.4byte	0x5b35
 	.uleb128 0x24
-	.8byte	.LVL1323
-	.4byte	0x5ba4
+	.8byte	.LVL1332
+	.4byte	0x5b35
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x2f
@@ -29600,22 +29716,22 @@ check_vpc_table:
 	.8byte	.LFE151-.LFB151
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bfb
+	.4byte	0x5b8c
 	.uleb128 0x24
-	.8byte	.LVL1319
-	.4byte	0x5815
+	.8byte	.LVL1328
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1320
-	.4byte	0x40b4
+	.8byte	.LVL1329
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1321
-	.4byte	0x3d8f
+	.8byte	.LVL1330
+	.4byte	0x3d9f
 	.uleb128 0x24
-	.8byte	.LVL1322
-	.4byte	0x3b9a
+	.8byte	.LVL1331
+	.4byte	0x3baa
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x2f
@@ -29623,56 +29739,56 @@ check_vpc_table:
 	.8byte	.LFE150-.LFB150
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cba
+	.4byte	0x5c4b
 	.uleb128 0x35
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x5cba
+	.4byte	0x5c4b
 	.uleb128 0x37
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x3
 	.2byte	0x2f3
 	.uleb128 0x4c
-	.8byte	.LBB306
-	.8byte	.LBE306-.LBB306
-	.4byte	0x5c5e
+	.8byte	.LBB334
+	.8byte	.LBE334-.LBB334
+	.4byte	0x5bef
 	.uleb128 0x36
 	.string	"i"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0x2f3
 	.uleb128 0x24
-	.8byte	.LVL1721
+	.8byte	.LVL1730
 	.4byte	0x1e7e
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1714
-	.4byte	0x74b8
+	.8byte	.LVL1723
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1715
-	.4byte	0x623c
+	.8byte	.LVL1724
+	.4byte	0x61cd
 	.uleb128 0x24
-	.8byte	.LVL1716
-	.4byte	0x6018
+	.8byte	.LVL1725
+	.4byte	0x5fa9
 	.uleb128 0x24
-	.8byte	.LVL1717
-	.4byte	0x5f9a
+	.8byte	.LVL1726
+	.4byte	0x5f2b
 	.uleb128 0x24
-	.8byte	.LVL1718
-	.4byte	0x4c0c
+	.8byte	.LVL1727
+	.4byte	0x4b9d
 	.uleb128 0x24
-	.8byte	.LVL1719
-	.4byte	0x500c
+	.8byte	.LVL1728
+	.4byte	0x4f9d
 	.uleb128 0x24
-	.8byte	.LVL1720
-	.4byte	0x2c48
+	.8byte	.LVL1729
+	.4byte	0x2c58
 	.byte	0
 	.uleb128 0x7
 	.byte	0x8
 	.4byte	0x400
 	.uleb128 0x32
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x2f
@@ -29680,91 +29796,91 @@ check_vpc_table:
 	.8byte	.LFE149-.LFB149
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e0d
+	.4byte	0x5d9e
 	.uleb128 0x35
 	.4byte	.LASF497
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0x2e8
 	.uleb128 0x3e
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0x2e8
-	.4byte	.LLST331
+	.4byte	.LLST332
 	.uleb128 0x3e
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0x2e8
-	.4byte	.LLST332
+	.4byte	.LLST333
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0x2e8
-	.4byte	.LLST333
+	.4byte	.LLST334
 	.uleb128 0x41
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1620
+	.8byte	.L1628
 	.uleb128 0x41
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1622
-	.uleb128 0x24
-	.8byte	.LVL1681
-	.4byte	0x4c0c
-	.uleb128 0x24
-	.8byte	.LVL1682
-	.4byte	0x500c
-	.uleb128 0x24
-	.8byte	.LVL1683
-	.4byte	0x4e0c
+	.8byte	.L1630
 	.uleb128 0x24
 	.8byte	.LVL1690
-	.4byte	0x5179
+	.4byte	0x4b9d
 	.uleb128 0x24
 	.8byte	.LVL1691
-	.4byte	0x1a1d
+	.4byte	0x4f9d
 	.uleb128 0x24
 	.8byte	.LVL1692
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1693
-	.4byte	0x309d
-	.uleb128 0x24
-	.8byte	.LVL1698
-	.4byte	0x5e0d
+	.4byte	0x4d9d
 	.uleb128 0x24
-	.8byte	.LVL1702
-	.4byte	0x629d
+	.8byte	.LVL1699
+	.4byte	0x510a
 	.uleb128 0x24
-	.8byte	.LVL1703
-	.4byte	0x4c0c
+	.8byte	.LVL1700
+	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1704
-	.4byte	0x5e0d
+	.8byte	.LVL1701
+	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1706
-	.4byte	0x5e0d
+	.8byte	.LVL1702
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1710
-	.4byte	0x309d
+	.8byte	.LVL1707
+	.4byte	0x5d9e
 	.uleb128 0x24
 	.8byte	.LVL1711
-	.4byte	0x49f7
+	.4byte	0x622e
 	.uleb128 0x24
 	.8byte	.LVL1712
-	.4byte	0x3b9a
+	.4byte	0x4b9d
 	.uleb128 0x24
 	.8byte	.LVL1713
-	.4byte	0x2c48
+	.4byte	0x5d9e
+	.uleb128 0x24
+	.8byte	.LVL1715
+	.4byte	0x5d9e
+	.uleb128 0x24
+	.8byte	.LVL1719
+	.4byte	0x30ad
+	.uleb128 0x24
+	.8byte	.LVL1720
+	.4byte	0x49e8
+	.uleb128 0x24
+	.8byte	.LVL1721
+	.4byte	0x3baa
+	.uleb128 0x24
+	.8byte	.LVL1722
+	.4byte	0x2c58
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x2f
@@ -29772,25 +29888,25 @@ check_vpc_table:
 	.8byte	.LFE148-.LFB148
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f70
+	.4byte	0x5f01
 	.uleb128 0x3c
 	.4byte	.LASF497
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x2e8
-	.4byte	.LLST109
+	.4byte	.LLST106
 	.uleb128 0x3c
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x2dd
-	.4byte	.LLST110
+	.4byte	.LLST107
 	.uleb128 0x3e
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0x2e8
-	.4byte	.LLST111
+	.4byte	.LLST108
 	.uleb128 0x35
 	.4byte	.LASF352
 	.byte	0x3
@@ -29807,91 +29923,91 @@ check_vpc_table:
 	.2byte	0x212
 	.4byte	0x2e8
 	.uleb128 0x3e
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0x2e8
-	.4byte	.LLST112
+	.4byte	.LLST109
 	.uleb128 0x3e
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0x2e8
-	.4byte	.LLST113
+	.4byte	.LLST110
 	.uleb128 0x3e
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0x2e8
-	.4byte	.LLST114
+	.4byte	.LLST111
 	.uleb128 0x3e
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0x2e8
-	.4byte	.LLST115
+	.4byte	.LLST112
 	.uleb128 0x41
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x3
 	.2byte	0x240
-	.8byte	.L419
+	.8byte	.L411
 	.uleb128 0x24
-	.8byte	.LVL445
+	.8byte	.LVL438
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL448
-	.4byte	0x5333
+	.8byte	.LVL441
+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL456
+	.8byte	.LVL449
 	.4byte	0x1bdb
 	.uleb128 0x24
+	.8byte	.LVL452
+	.4byte	0x52c4
+	.uleb128 0x24
 	.8byte	.LVL459
-	.4byte	0x5333
+	.4byte	0x4b4a
 	.uleb128 0x24
-	.8byte	.LVL466
-	.4byte	0x4b47
+	.8byte	.LVL461
+	.4byte	0x1b39
 	.uleb128 0x24
 	.8byte	.LVL468
-	.4byte	0x1b39
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL475
-	.4byte	0x4dc3
+	.8byte	.LVL469
+	.4byte	0x5f01
 	.uleb128 0x24
-	.8byte	.LVL476
-	.4byte	0x5f70
+	.8byte	.LVL470
+	.4byte	0x5265
 	.uleb128 0x24
 	.8byte	.LVL477
-	.4byte	0x52d4
-	.uleb128 0x24
-	.8byte	.LVL484
-	.4byte	0x4dc3
+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL485
-	.4byte	0x5f70
+	.8byte	.LVL478
+	.4byte	0x5f01
 	.uleb128 0x24
-	.8byte	.LVL486
-	.4byte	0x52d4
+	.8byte	.LVL479
+	.4byte	0x5265
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x2f
 	.byte	0x1
-	.4byte	0x5f9a
+	.4byte	0x5f2b
 	.uleb128 0x34
 	.4byte	.LASF175
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x2e8
 	.uleb128 0x35
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0x2e8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x2f
@@ -29899,31 +30015,31 @@ check_vpc_table:
 	.8byte	.LFE146-.LFB146
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6018
+	.4byte	0x5fa9
 	.uleb128 0x24
-	.8byte	.LVL802
+	.8byte	.LVL811
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL803
+	.8byte	.LVL812
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL804
+	.8byte	.LVL813
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL805
+	.8byte	.LVL814
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL806
+	.8byte	.LVL815
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL807
+	.8byte	.LVL816
 	.4byte	0x2645
 	.uleb128 0x24
-	.8byte	.LVL808
-	.4byte	0x3738
+	.8byte	.LVL817
+	.4byte	0x3748
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x2f
@@ -29931,135 +30047,135 @@ check_vpc_table:
 	.8byte	.LFE145-.LFB145
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x623c
+	.4byte	0x61cd
 	.uleb128 0x3d
 	.string	"i"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0x2f3
-	.4byte	.LLST119
+	.4byte	.LLST120
 	.uleb128 0x35
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0x2f3
 	.uleb128 0x2e
 	.4byte	.LASF357
-	.4byte	0x50fc
+	.4byte	0x508d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.3388
 	.uleb128 0x24
-	.8byte	.LVL490
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL491
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL492
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL493
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL494
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL495
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL496
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL497
-	.4byte	0x74ce
-	.uleb128 0x24
-	.8byte	.LVL498
-	.4byte	0x74ce
-	.uleb128 0x24
 	.8byte	.LVL499
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL500
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL501
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL502
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL503
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL504
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL505
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL506
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL507
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL508
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL509
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL510
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL511
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL512
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL513
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL514
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL515
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL516
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL517
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL518
-	.4byte	0x1a1d
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL519
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL520
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL521
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL522
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL523
-	.4byte	0x74ce
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL524
-	.4byte	0x74ce
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL525
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL526
+	.4byte	0x75bd
 	.uleb128 0x24
 	.8byte	.LVL527
-	.4byte	0x74b8
+	.4byte	0x1a1d
+	.uleb128 0x24
+	.8byte	.LVL528
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL529
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL530
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL531
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL532
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL533
+	.4byte	0x75bd
+	.uleb128 0x24
+	.8byte	.LVL536
+	.4byte	0x75a7
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x2f
@@ -30067,12 +30183,12 @@ check_vpc_table:
 	.8byte	.LFE144-.LFB144
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x629d
+	.4byte	0x622e
 	.uleb128 0x23
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x5cba
+	.4byte	0x5c4b
 	.4byte	.LLST5
 	.uleb128 0x29
 	.string	"i"
@@ -30081,16 +30197,16 @@ check_vpc_table:
 	.4byte	0x2f3
 	.uleb128 0x24
 	.8byte	.LVL19
-	.4byte	0x62e6
+	.4byte	0x6277
 	.uleb128 0x24
 	.8byte	.LVL20
-	.4byte	0x62e6
+	.4byte	0x6277
 	.uleb128 0x24
 	.8byte	.LVL21
-	.4byte	0x629d
+	.4byte	0x622e
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x2f
@@ -30098,85 +30214,85 @@ check_vpc_table:
 	.8byte	.LFE143-.LFB143
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x62ce
+	.4byte	0x625f
 	.uleb128 0x23
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x2e8
 	.4byte	.LLST4
 	.byte	0
 	.uleb128 0x4e
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x62e6
+	.4byte	0x6277
 	.uleb128 0x2b
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0x2f3
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x3
-	.byte	0x7f
+	.byte	0x7e
 	.4byte	0x2e8
 	.8byte	.LFB141
 	.8byte	.LFE141-.LFB141
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x632d
+	.4byte	0x62be
 	.uleb128 0x26
 	.string	"num"
 	.byte	0x3
-	.byte	0x7f
+	.byte	0x7e
 	.4byte	0x2f3
 	.4byte	.LLST3
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x3
-	.byte	0x81
+	.byte	0x80
 	.4byte	0x2e8
 	.uleb128 0x20
-	.4byte	.LASF651
+	.4byte	.LASF650
 	.byte	0x3
-	.byte	0x82
+	.byte	0x81
 	.4byte	0x2f3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0x2f
 	.8byte	.LFB140
 	.8byte	.LFE140-.LFB140
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6383
+	.4byte	0x6314
 	.uleb128 0x23
 	.4byte	.LASF82
 	.byte	0x3
-	.byte	0x71
+	.byte	0x70
 	.4byte	0xb3
-	.4byte	.LLST66
+	.4byte	.LLST62
 	.uleb128 0x29
 	.string	"buf"
 	.byte	0x3
-	.byte	0x73
+	.byte	0x72
 	.4byte	0xb3
 	.uleb128 0x24
-	.8byte	.LVL286
-	.4byte	0x74d9
+	.8byte	.LVL274
+	.4byte	0x75c8
 	.uleb128 0x24
-	.8byte	.LVL287
-	.4byte	0x6383
+	.8byte	.LVL275
+	.4byte	0x6314
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x3
 	.byte	0xa
 	.4byte	0x2f
@@ -30184,13 +30300,13 @@ check_vpc_table:
 	.8byte	.LFE139-.LFB139
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67ad
+	.4byte	0x673e
 	.uleb128 0x23
 	.4byte	.LASF82
 	.byte	0x3
 	.byte	0xa
 	.4byte	0xb3
-	.4byte	.LLST63
+	.4byte	.LLST59
 	.uleb128 0x29
 	.string	"i"
 	.byte	0x3
@@ -30202,1239 +30318,1352 @@ check_vpc_table:
 	.byte	0xd
 	.4byte	0xb3
 	.uleb128 0x4c
-	.8byte	.LBB201
-	.8byte	.LBE201-.LBB201
-	.4byte	0x6406
+	.8byte	.LBB208
+	.8byte	.LBE208-.LBB208
+	.4byte	0x6397
 	.uleb128 0x28
 	.4byte	.LASF389
 	.byte	0x3
-	.byte	0x57
+	.byte	0x56
 	.4byte	0x2e8
-	.4byte	.LLST64
+	.4byte	.LLST60
 	.uleb128 0x24
-	.8byte	.LVL277
-	.4byte	0x4707
+	.8byte	.LVL265
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL279
-	.4byte	0x74d9
+	.8byte	.LVL267
+	.4byte	0x75c8
 	.byte	0
 	.uleb128 0x4c
-	.8byte	.LBB202
-	.8byte	.LBE202-.LBB202
-	.4byte	0x6438
+	.8byte	.LBB209
+	.8byte	.LBE209-.LBB209
+	.4byte	0x63c9
 	.uleb128 0x28
 	.4byte	.LASF389
 	.byte	0x3
-	.byte	0x60
+	.byte	0x5f
 	.4byte	0x2e8
-	.4byte	.LLST65
+	.4byte	.LLST61
 	.uleb128 0x24
-	.8byte	.LVL283
-	.4byte	0x74d9
+	.8byte	.LVL271
+	.4byte	0x75c8
 	.byte	0
 	.uleb128 0x24
+	.8byte	.LVL194
+	.4byte	0x75d4
+	.uleb128 0x24
+	.8byte	.LVL195
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL196
+	.4byte	0x75d4
+	.uleb128 0x24
+	.8byte	.LVL197
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL198
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL199
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL200
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL201
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL202
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL203
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL204
+	.4byte	0x75c8
+	.uleb128 0x24
+	.8byte	.LVL205
+	.4byte	0x75c8
+	.uleb128 0x24
 	.8byte	.LVL206
-	.4byte	0x74e5
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL207
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL208
-	.4byte	0x74e5
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL209
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL210
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL211
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL212
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL213
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL214
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL215
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL216
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL217
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL218
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL219
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL220
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL221
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL222
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL223
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL224
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL225
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL226
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL227
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL228
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL229
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL230
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL231
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL232
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL233
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL234
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL235
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL236
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL237
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL238
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL239
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL240
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL241
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL242
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL243
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL244
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL245
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL246
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL247
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL248
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL249
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL250
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL251
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL252
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL253
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL254
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL255
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL256
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL257
-	.4byte	0x74d9
+	.4byte	0x2bb4
 	.uleb128 0x24
 	.8byte	.LVL258
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL259
-	.4byte	0x74d9
+	.4byte	0x2b57
 	.uleb128 0x24
 	.8byte	.LVL260
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL261
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL262
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL263
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.uleb128 0x24
 	.8byte	.LVL264
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL265
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL266
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL267
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL268
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL269
-	.4byte	0x2ba4
-	.uleb128 0x24
-	.8byte	.LVL270
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL271
-	.4byte	0x2b47
-	.uleb128 0x24
-	.8byte	.LVL272
-	.4byte	0x74d9
-	.uleb128 0x24
-	.8byte	.LVL276
-	.4byte	0x74d9
+	.4byte	0x75c8
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x1dcf
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x680b
-	.uleb128 0x58
+	.4byte	0x679c
+	.uleb128 0x57
 	.4byte	0x1dea
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x58
+	.uleb128 0x57
 	.4byte	0x1df5
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x48
 	.4byte	0x1ddf
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1e00
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1e0b
-	.uleb128 0x5a
+	.uleb128 0x59
 	.4byte	0x1e16
 	.4byte	.LLST0
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.4byte	0x1e21
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.4byte	0x1e2c
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1e37
-	.uleb128 0x5a
+	.uleb128 0x59
 	.4byte	0x1e42
 	.4byte	.LLST1
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x3a1f
+	.uleb128 0x56
+	.4byte	0x3a2f
 	.8byte	.LFB276
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6835
-	.uleb128 0x5c
-	.4byte	0x3a2c
+	.4byte	0x67c6
+	.uleb128 0x5b
+	.4byte	0x3a3c
 	.4byte	.LLST2
 	.uleb128 0x48
-	.4byte	0x3a38
+	.4byte	0x3a48
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x62ce
+	.uleb128 0x56
+	.4byte	0x625f
 	.8byte	.LFB142
 	.8byte	.LFE142-.LFB142
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6858
-	.uleb128 0x58
-	.4byte	0x62da
+	.4byte	0x67e9
+	.uleb128 0x57
+	.4byte	0x626b
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x5f70
+	.uleb128 0x56
+	.4byte	0x5f01
 	.8byte	.LFB147
 	.8byte	.LFE147-.LFB147
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6898
-	.uleb128 0x5c
-	.4byte	0x5f81
-	.4byte	.LLST6
+	.byte	0x9c
+	.4byte	0x6829
+	.uleb128 0x5b
+	.4byte	0x5f12
+	.4byte	.LLST6
+	.uleb128 0x58
+	.4byte	0x5f1e
+	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x48
+	.4byte	0x5f12
+	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x58
+	.4byte	0x680d
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	0x525d
+	.8byte	.LFB163
+	.8byte	.LFE163-.LFB163
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x5d
+	.4byte	0x4b91
+	.8byte	.LFB177
+	.8byte	.LFE177-.LFB177
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x5d
+	.4byte	0x4b85
+	.8byte	.LFB178
+	.8byte	.LFE178-.LFB178
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x56
+	.4byte	0x4929
+	.8byte	.LFB185
+	.8byte	.LFE185-.LFB185
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x690a
+	.uleb128 0x5b
+	.4byte	0x4939
+	.4byte	.LLST20
+	.uleb128 0x58
+	.4byte	0x4944
+	.uleb128 0x58
+	.4byte	0x494f
+	.uleb128 0x58
+	.4byte	0x495a
+	.uleb128 0x58
+	.4byte	0x4965
+	.uleb128 0x58
+	.4byte	0x4970
+	.uleb128 0x58
+	.4byte	0x497b
+	.uleb128 0x58
+	.4byte	0x4986
+	.uleb128 0x58
+	.4byte	0x4991
+	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x48
+	.4byte	0x4939
+	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x5a
+	.4byte	0x6892
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5a
+	.4byte	0x6897
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x59
+	.4byte	0x689c
+	.4byte	.LLST21
+	.uleb128 0x59
+	.4byte	0x68a1
+	.4byte	.LLST22
+	.uleb128 0x5a
+	.4byte	0x68a6
+	.uleb128 0x1
+	.byte	0x56
 	.uleb128 0x59
-	.4byte	0x5f8d
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x48
-	.4byte	0x5f81
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0
+	.4byte	0x68ab
+	.4byte	.LLST23
+	.uleb128 0x58
+	.4byte	0x68b0
 	.uleb128 0x59
-	.4byte	0x687c
+	.4byte	0x68b5
+	.4byte	.LLST24
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
-	.4byte	0x52cc
-	.8byte	.LFB163
-	.8byte	.LFE163-.LFB163
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x5e
-	.4byte	0x4c00
-	.8byte	.LFB177
-	.8byte	.LFE177-.LFB177
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x5e
-	.4byte	0x4bf4
-	.8byte	.LFB178
-	.8byte	.LFE178-.LFB178
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x57
-	.4byte	0x49ad
+	.uleb128 0x56
+	.4byte	0x499e
 	.8byte	.LFB184
 	.8byte	.LFE184-.LFB184
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6953
-	.uleb128 0x5c
-	.4byte	0x49b9
-	.4byte	.LLST29
-	.uleb128 0x59
-	.4byte	0x49c4
+	.4byte	0x6980
+	.uleb128 0x5b
+	.4byte	0x49aa
+	.4byte	.LLST25
+	.uleb128 0x58
+	.4byte	0x49b5
 	.uleb128 0x4c
-	.8byte	.LBB177
-	.8byte	.LBE177-.LBB177
-	.4byte	0x6945
+	.8byte	.LBB188
+	.8byte	.LBE188-.LBB188
+	.4byte	0x6972
 	.uleb128 0x48
-	.4byte	0x49b9
-	.uleb128 0x52
-	.8byte	.LBB178
-	.8byte	.LBE178-.LBB178
-	.uleb128 0x59
-	.4byte	0x6901
+	.4byte	0x49aa
+	.uleb128 0x5e
+	.8byte	.LBB189
+	.8byte	.LBE189-.LBB189
+	.uleb128 0x58
+	.4byte	0x692e
 	.uleb128 0x24
-	.8byte	.LVL95
-	.4byte	0x74b8
+	.8byte	.LVL87
+	.4byte	0x75a7
 	.byte	0
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL94
-	.4byte	0x4919
+	.8byte	.LVL86
+	.4byte	0x4929
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x49d2
+	.uleb128 0x56
+	.4byte	0x49c3
 	.8byte	.LFB183
 	.8byte	.LFE183-.LFB183
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69c9
-	.uleb128 0x5c
-	.4byte	0x49de
-	.4byte	.LLST33
-	.uleb128 0x59
-	.4byte	0x49e9
+	.4byte	0x69f6
+	.uleb128 0x5b
+	.4byte	0x49cf
+	.4byte	.LLST29
+	.uleb128 0x58
+	.4byte	0x49da
 	.uleb128 0x4c
-	.8byte	.LBB181
-	.8byte	.LBE181-.LBB181
-	.4byte	0x69bb
+	.8byte	.LBB192
+	.8byte	.LBE192-.LBB192
+	.4byte	0x69e8
 	.uleb128 0x48
-	.4byte	0x49de
-	.uleb128 0x52
-	.8byte	.LBB182
-	.8byte	.LBE182-.LBB182
-	.uleb128 0x59
-	.4byte	0x6977
+	.4byte	0x49cf
+	.uleb128 0x5e
+	.8byte	.LBB193
+	.8byte	.LBE193-.LBB193
+	.uleb128 0x58
+	.4byte	0x69a4
 	.uleb128 0x24
-	.8byte	.LVL106
-	.4byte	0x74b8
+	.8byte	.LVL98
+	.4byte	0x75a7
 	.byte	0
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL105
-	.4byte	0x48a0
+	.8byte	.LVL97
+	.4byte	0x48b0
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x4688
+	.uleb128 0x56
+	.4byte	0x4698
 	.8byte	.LFB191
 	.8byte	.LFE191-.LFB191
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6aa7
-	.uleb128 0x5c
-	.4byte	0x4699
-	.4byte	.LLST44
-	.uleb128 0x59
-	.4byte	0x46a5
-	.uleb128 0x59
-	.4byte	0x46b1
-	.uleb128 0x59
-	.4byte	0x46bd
-	.uleb128 0x59
-	.4byte	0x46c9
-	.uleb128 0x59
-	.4byte	0x46d5
-	.uleb128 0x59
-	.4byte	0x46e1
-	.uleb128 0x59
-	.4byte	0x46ed
-	.uleb128 0x59
-	.4byte	0x46f9
-	.uleb128 0x52
-	.8byte	.LBB185
-	.8byte	.LBE185-.LBB185
+	.4byte	0x6adc
+	.uleb128 0x5b
+	.4byte	0x46a9
+	.4byte	.LLST40
+	.uleb128 0x58
+	.4byte	0x46b5
+	.uleb128 0x58
+	.4byte	0x46c1
+	.uleb128 0x58
+	.4byte	0x46cd
+	.uleb128 0x58
+	.4byte	0x46d9
+	.uleb128 0x58
+	.4byte	0x46e5
+	.uleb128 0x58
+	.4byte	0x46f1
+	.uleb128 0x58
+	.4byte	0x46fd
+	.uleb128 0x58
+	.4byte	0x4709
+	.uleb128 0x5e
+	.8byte	.LBB196
+	.8byte	.LBE196-.LBB196
 	.uleb128 0x48
-	.4byte	0x4699
-	.uleb128 0x52
-	.8byte	.LBB186
-	.8byte	.LBE186-.LBB186
+	.4byte	0x46a9
+	.uleb128 0x5e
+	.8byte	.LBB197
+	.8byte	.LBE197-.LBB197
+	.uleb128 0x58
+	.4byte	0x6a1a
 	.uleb128 0x59
-	.4byte	0x69ed
+	.4byte	0x6a1f
+	.4byte	.LLST41
 	.uleb128 0x59
-	.4byte	0x69f2
-	.uleb128 0x5a
-	.4byte	0x69f7
-	.4byte	.LLST45
+	.4byte	0x6a24
+	.4byte	.LLST42
 	.uleb128 0x59
-	.4byte	0x69fc
-	.uleb128 0x5a
-	.4byte	0x6a01
-	.4byte	.LLST46
-	.uleb128 0x5a
-	.4byte	0x6a06
-	.4byte	.LLST47
+	.4byte	0x6a29
+	.4byte	.LLST43
 	.uleb128 0x59
-	.4byte	0x6a0b
+	.4byte	0x6a2e
+	.4byte	.LLST44
 	.uleb128 0x59
-	.4byte	0x6a10
-	.uleb128 0x24
-	.8byte	.LVL140
-	.4byte	0x74b8
+	.4byte	0x6a33
+	.4byte	.LLST45
+	.uleb128 0x58
+	.4byte	0x6a38
+	.uleb128 0x58
+	.4byte	0x6a3d
 	.uleb128 0x24
-	.8byte	.LVL144
-	.4byte	0x480c
+	.8byte	.LVL134
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL145
-	.4byte	0x74b8
+	.8byte	.LVL139
+	.4byte	0x481c
 	.uleb128 0x24
-	.8byte	.LVL146
-	.4byte	0x49ad
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x57
-	.4byte	0x4496
-	.8byte	.LFB194
-	.8byte	.LFE194-.LFB194
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6b35
-	.uleb128 0x5c
-	.4byte	0x44a7
-	.4byte	.LLST48
-	.uleb128 0x5a
-	.4byte	0x44b3
-	.4byte	.LLST49
-	.uleb128 0x59
-	.4byte	0x44bf
-	.uleb128 0x59
-	.4byte	0x44cb
-	.uleb128 0x4c
-	.8byte	.LBB189
-	.8byte	.LBE189-.LBB189
-	.4byte	0x6b27
-	.uleb128 0x48
-	.4byte	0x44a7
-	.uleb128 0x52
-	.8byte	.LBB190
-	.8byte	.LBE190-.LBB190
-	.uleb128 0x59
-	.4byte	0x6acb
-	.uleb128 0x59
-	.4byte	0x6ad4
-	.uleb128 0x59
-	.4byte	0x6ad9
+	.8byte	.LVL140
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL153
-	.4byte	0x74b8
+	.8byte	.LVL141
+	.4byte	0x499e
 	.byte	0
 	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL155
-	.4byte	0x49f7
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x3d6b
+	.uleb128 0x56
+	.4byte	0x3d7b
 	.8byte	.LFB205
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6b75
+	.4byte	0x6b1c
+	.uleb128 0x5b
+	.4byte	0x3d88
+	.4byte	.LLST47
+	.uleb128 0x58
+	.4byte	0x3d94
 	.uleb128 0x5c
-	.4byte	0x3d78
-	.4byte	.LLST51
-	.uleb128 0x59
-	.4byte	0x3d84
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x60
+	.4byte	.Ldebug_ranges0+0xb0
 	.uleb128 0x48
-	.4byte	0x3d78
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x59
-	.4byte	0x6b59
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+	.uleb128 0x5c
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+	.uleb128 0x58
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 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x3a1f
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+	.4byte	0x3a2f
 	.8byte	.LFB211
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6bb0
-	.uleb128 0x5c
-	.4byte	0x3a2c
-	.4byte	.LLST52
-	.uleb128 0x5c
-	.4byte	0x3a38
-	.4byte	.LLST53
+	.4byte	0x6b57
+	.uleb128 0x5b
+	.4byte	0x3a3c
+	.4byte	.LLST48
+	.uleb128 0x5b
+	.4byte	0x3a48
+	.4byte	.LLST49
 	.uleb128 0x24
-	.8byte	.LVL165
-	.4byte	0x680b
+	.8byte	.LVL153
+	.4byte	0x679c
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x3191
+	.uleb128 0x56
+	.4byte	0x31a1
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6c08
-	.uleb128 0x58
-	.4byte	0x319e
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+	.uleb128 0x57
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 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
-	.4byte	0x31aa
-	.uleb128 0x52
-	.8byte	.LBB199
-	.8byte	.LBE199-.LBB199
+	.uleb128 0x58
+	.4byte	0x31ba
+	.uleb128 0x5e
+	.8byte	.LBB206
+	.8byte	.LBE206-.LBB206
 	.uleb128 0x48
-	.4byte	0x319e
-	.uleb128 0x52
-	.8byte	.LBB200
-	.8byte	.LBE200-.LBB200
-	.uleb128 0x5b
-	.4byte	0x6bd2
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+	.uleb128 0x5e
+	.8byte	.LBB207
+	.8byte	.LBE207-.LBB207
+	.uleb128 0x5a
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 	.uleb128 0x1
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 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x57
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 	.4byte	0x2a79
 	.8byte	.LFB236
 	.8byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6c45
-	.uleb128 0x5c
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+	.uleb128 0x5b
 	.4byte	0x2a8a
-	.4byte	.LLST72
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x90
+	.4byte	.LLST69
+	.uleb128 0x5c
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 	.uleb128 0x48
 	.4byte	0x2a8a
 	.uleb128 0x24
-	.8byte	.LVL310
-	.4byte	0x49d2
+	.8byte	.LVL303
+	.4byte	0x49c3
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x2010
 	.8byte	.LFB255
 	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6c7b
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 	.uleb128 0x24
-	.8byte	.LVL363
-	.4byte	0x4d4b
+	.8byte	.LVL356
+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL364
+	.8byte	.LVL357
 	.4byte	0x208d
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
+	.4byte	0x4b4a
+	.8byte	.LFB179
+	.8byte	.LFE179-.LFB179
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ccf
+	.uleb128 0x5b
+	.4byte	0x4b56
+	.4byte	.LLST103
+	.uleb128 0x5b
+	.4byte	0x4b61
+	.4byte	.LLST104
+	.uleb128 0x5f
+	.4byte	0x4b85
+	.8byte	.LBB230
+	.8byte	.LBE230-.LBB230
+	.byte	0x2
+	.byte	0x65
+	.uleb128 0x5e
+	.8byte	.LBB232
+	.8byte	.LBE232-.LBB232
+	.uleb128 0x48
+	.4byte	0x4b61
+	.uleb128 0x48
+	.4byte	0x4b56
+	.uleb128 0x5e
+	.8byte	.LBB233
+	.8byte	.LBE233-.LBB233
+	.uleb128 0x58
+	.4byte	0x4b6d
+	.uleb128 0x5e
+	.8byte	.LBB234
+	.8byte	.LBE234-.LBB234
+	.uleb128 0x59
+	.4byte	0x4b77
+	.4byte	.LLST105
+	.uleb128 0x24
+	.8byte	.LVL427
+	.4byte	0x4cdc
+	.uleb128 0x24
+	.8byte	.LVL429
+	.4byte	0x1b39
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.4byte	0x44a6
+	.8byte	.LFB194
+	.8byte	.LFE194-.LFB194
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6d6a
+	.uleb128 0x5b
+	.4byte	0x44b7
+	.4byte	.LLST115
+	.uleb128 0x59
+	.4byte	0x44c3
+	.4byte	.LLST116
+	.uleb128 0x58
+	.4byte	0x44cf
+	.uleb128 0x58
+	.4byte	0x44db
+	.uleb128 0x4c
+	.8byte	.LBB245
+	.8byte	.LBE245-.LBB245
+	.4byte	0x6d4f
+	.uleb128 0x48
+	.4byte	0x44b7
+	.uleb128 0x5e
+	.8byte	.LBB246
+	.8byte	.LBE246-.LBB246
+	.uleb128 0x58
+	.4byte	0x6cf3
+	.uleb128 0x58
+	.4byte	0x6cfc
+	.uleb128 0x58
+	.4byte	0x6d01
+	.uleb128 0x24
+	.8byte	.LVL491
+	.4byte	0x75a7
+	.byte	0
+	.byte	0
+	.uleb128 0x24
+	.8byte	.LVL489
+	.4byte	0x49e8
+	.uleb128 0x24
+	.8byte	.LVL490
+	.4byte	0x75a7
+	.byte	0
+	.uleb128 0x56
 	.4byte	0x1f66
 	.8byte	.LFB257
 	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d40
-	.uleb128 0x5b
+	.4byte	0x6e2f
+	.uleb128 0x5a
 	.4byte	0x1f77
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
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 	.4byte	0x1f83
-	.uleb128 0x59
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 	.4byte	0x1f8d
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1f99
 	.uleb128 0x2f
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-	.uleb128 0x59
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 	.uleb128 0x59
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+	.4byte	.LLST165
 	.uleb128 0x5a
-	.4byte	0x6ca2
-	.4byte	.LLST164
-	.uleb128 0x5b
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 	.uleb128 0x2
 	.byte	0x91
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 	.uleb128 0x4c
-	.8byte	.LBB228
-	.8byte	.LBE228-.LBB228
-	.4byte	0x6d16
-	.uleb128 0x5b
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+	.8byte	.LBE256-.LBB256
+	.4byte	0x6e05
+	.uleb128 0x5a
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 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x24
-	.8byte	.LVL703
+	.8byte	.LVL712
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL704
-	.4byte	0x4d4b
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+	.4byte	0x4cdc
 	.uleb128 0x24
-	.8byte	.LVL705
+	.8byte	.LVL714
 	.4byte	0x208d
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL702
-	.4byte	0x3fc5
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+	.4byte	0x3fd5
 	.byte	0
-	.uleb128 0x52
-	.8byte	.LBB235
-	.8byte	.LBE235-.LBB235
-	.uleb128 0x5a
+	.uleb128 0x5e
+	.8byte	.LBB263
+	.8byte	.LBE263-.LBB263
+	.uleb128 0x59
 	.4byte	0x1fb8
-	.4byte	.LLST165
+	.4byte	.LLST166
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x1ae5
 	.8byte	.LFB264
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6df9
-	.uleb128 0x5c
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+	.uleb128 0x5b
 	.4byte	0x1af5
-	.4byte	.LLST198
-	.uleb128 0x59
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+	.uleb128 0x58
 	.4byte	0x1b00
-	.uleb128 0x59
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 	.4byte	0x1b0b
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1b16
-	.uleb128 0x52
-	.8byte	.LBB240
-	.8byte	.LBE240-.LBB240
+	.uleb128 0x5e
+	.8byte	.LBB268
+	.8byte	.LBE268-.LBB268
 	.uleb128 0x48
 	.4byte	0x1af5
-	.uleb128 0x52
-	.8byte	.LBB241
-	.8byte	.LBE241-.LBB241
-	.uleb128 0x59
-	.4byte	0x6d64
-	.uleb128 0x5b
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+	.8byte	.LBB269
+	.8byte	.LBE269-.LBB269
+	.uleb128 0x58
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 	.uleb128 0x2
 	.byte	0x91
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-	.uleb128 0x5b
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 	.uleb128 0x3
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 	.sleb128 -96
-	.uleb128 0x5f
+	.uleb128 0x60
 	.4byte	0x1b21
 	.uleb128 0x24
-	.8byte	.LVL884
+	.8byte	.LVL893
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL886
+	.8byte	.LVL895
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL887
+	.8byte	.LVL896
 	.4byte	0x1b39
 	.uleb128 0x24
-	.8byte	.LVL888
+	.8byte	.LVL897
 	.4byte	0x1bdb
 	.uleb128 0x24
-	.8byte	.LVL889
+	.8byte	.LVL898
 	.4byte	0x1b39
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x1fc6
 	.8byte	.LFB256
 	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ea8
-	.uleb128 0x5c
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+	.uleb128 0x5b
 	.4byte	0x1fd7
-	.4byte	.LLST214
-	.uleb128 0x59
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+	.uleb128 0x58
 	.4byte	0x1fe3
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1fef
-	.uleb128 0x59
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 	.4byte	0x1ff9
-	.uleb128 0x59
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 	.4byte	0x2003
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x1a0
+	.uleb128 0x5c
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 	.uleb128 0x48
 	.4byte	0x1fd7
-	.uleb128 0x5d
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-	.uleb128 0x5a
-	.4byte	0x6e1d
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-	.uleb128 0x5a
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-	.uleb128 0x5a
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-	.uleb128 0x5a
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+	.uleb128 0x59
+	.4byte	0x6f1b
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 	.uleb128 0x24
-	.8byte	.LVL968
+	.8byte	.LVL977
 	.4byte	0x2010
 	.uleb128 0x24
-	.8byte	.LVL973
-	.4byte	0x4dc3
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+	.4byte	0x4d54
 	.uleb128 0x24
-	.8byte	.LVL976
-	.4byte	0x74b8
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+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL977
-	.4byte	0x5333
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+	.4byte	0x52c4
 	.uleb128 0x24
-	.8byte	.LVL978
-	.4byte	0x5179
+	.8byte	.LVL987
+	.4byte	0x510a
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x2707
 	.8byte	.LFB240
 	.8byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6f52
-	.uleb128 0x5c
+	.4byte	0x7041
+	.uleb128 0x5b
 	.4byte	0x2718
-	.4byte	.LLST219
-	.uleb128 0x59
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+	.uleb128 0x58
 	.4byte	0x2724
 	.uleb128 0x4c
-	.8byte	.LBB254
-	.8byte	.LBE254-.LBB254
-	.4byte	0x6f44
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+	.8byte	.LBE282-.LBB282
+	.4byte	0x7033
 	.uleb128 0x48
 	.4byte	0x2718
-	.uleb128 0x52
-	.8byte	.LBB255
-	.8byte	.LBE255-.LBB255
-	.uleb128 0x59
-	.4byte	0x6ecc
+	.uleb128 0x5e
+	.8byte	.LBB283
+	.8byte	.LBE283-.LBB283
+	.uleb128 0x58
+	.4byte	0x6fbb
 	.uleb128 0x24
-	.8byte	.LVL986
-	.4byte	0x480c
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+	.4byte	0x481c
 	.uleb128 0x24
-	.8byte	.LVL987
-	.4byte	0x74b8
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+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL988
+	.8byte	.LVL997
 	.4byte	0x2a79
 	.uleb128 0x24
-	.8byte	.LVL989
+	.8byte	.LVL998
 	.4byte	0x1fc6
 	.uleb128 0x24
-	.8byte	.LVL991
-	.4byte	0x74b8
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+	.4byte	0x75a7
 	.byte	0
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL995
-	.4byte	0x4688
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+	.4byte	0x4698
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x3c99
+	.uleb128 0x56
+	.4byte	0x3ca9
 	.8byte	.LFB207
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6fea
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x1e0
-	.uleb128 0x5a
-	.4byte	0x3ca7
-	.4byte	.LLST221
-	.uleb128 0x5a
-	.4byte	0x3cb3
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+	.uleb128 0x5c
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 	.4byte	.LLST222
-	.uleb128 0x5a
-	.4byte	0x3cbf
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+	.4byte	0x3cc3
 	.4byte	.LLST223
-	.uleb128 0x5b
-	.4byte	0x3ccb
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+	.4byte	0x3ccf
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 	.uleb128 0x2
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 	.uleb128 0x24
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-	.4byte	0x3fc5
+	.8byte	.LVL1014
+	.4byte	0x3fd5
 	.uleb128 0x24
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+	.8byte	.LVL1016
 	.4byte	0x1d0d
 	.uleb128 0x24
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+	.8byte	.LVL1021
 	.4byte	0x1a1d
 	.uleb128 0x24
-	.8byte	.LVL1014
+	.8byte	.LVL1023
 	.4byte	0x2747
 	.uleb128 0x24
-	.8byte	.LVL1015
+	.8byte	.LVL1024
 	.4byte	0x1bdb
 	.uleb128 0x24
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 	.byte	0
 	.byte	0
-	.uleb128 0x57
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 	.uleb128 0x1
 	.byte	0x9c
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 	.uleb128 0x24
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 	.uleb128 0x1
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 	.uleb128 0x24
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 	.uleb128 0x24
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 	.uleb128 0x24
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 	.4byte	0x1a1d
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 	.4byte	0x21e7
 	.8byte	.LFB250
 	.8byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7099
+	.4byte	0x7188
 	.uleb128 0x24
-	.8byte	.LVL1382
+	.8byte	.LVL1391
 	.4byte	0x21f0
 	.uleb128 0x24
-	.8byte	.LVL1383
-	.4byte	0x3ce5
+	.8byte	.LVL1392
+	.4byte	0x3cf5
 	.uleb128 0x24
-	.8byte	.LVL1384
+	.8byte	.LVL1393
 	.4byte	0x2378
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.4byte	0x1e7e
 	.8byte	.LFB258
 	.8byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x731f
-	.uleb128 0x5c
+	.4byte	0x740e
+	.uleb128 0x5b
 	.4byte	0x1e8f
-	.4byte	.LLST287
-	.uleb128 0x5c
-	.4byte	0x1e9b
 	.4byte	.LLST288
-	.uleb128 0x59
+	.uleb128 0x5b
+	.4byte	0x1e9b
+	.4byte	.LLST289
+	.uleb128 0x58
 	.4byte	0x1ea7
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1eb3
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1ebf
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1ecb
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1ed7
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1ee3
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1eef
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1efb
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1f07
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1f13
-	.uleb128 0x59
+	.uleb128 0x58
 	.4byte	0x1f2f
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x7311
+	.4byte	.Ldebug_ranges0+0x310
+	.4byte	0x7400
 	.uleb128 0x48
 	.4byte	0x1e9b
 	.uleb128 0x48
 	.4byte	0x1e8f
-	.uleb128 0x5d
-	.4byte	.Ldebug_ranges0+0x250
-	.uleb128 0x5a
-	.4byte	0x70c6
-	.4byte	.LLST289
-	.uleb128 0x5a
-	.4byte	0x70cb
+	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0x310
+	.uleb128 0x59
+	.4byte	0x71b5
 	.4byte	.LLST290
-	.uleb128 0x5a
-	.4byte	0x70d0
-	.4byte	.LLST291
 	.uleb128 0x59
-	.4byte	0x70d5
+	.4byte	0x71ba
+	.4byte	.LLST291
 	.uleb128 0x59
-	.4byte	0x70da
-	.uleb128 0x5a
-	.4byte	0x70df
+	.4byte	0x71bf
 	.4byte	.LLST292
-	.uleb128 0x5a
-	.4byte	0x70e4
+	.uleb128 0x58
+	.4byte	0x71c4
+	.uleb128 0x58
+	.4byte	0x71c9
+	.uleb128 0x59
+	.4byte	0x71ce
 	.4byte	.LLST293
-	.uleb128 0x5a
-	.4byte	0x70e9
+	.uleb128 0x59
+	.4byte	0x71d3
 	.4byte	.LLST294
-	.uleb128 0x5a
-	.4byte	0x70ee
+	.uleb128 0x59
+	.4byte	0x71d8
 	.4byte	.LLST295
-	.uleb128 0x5a
-	.4byte	0x70f3
+	.uleb128 0x59
+	.4byte	0x71dd
 	.4byte	.LLST296
-	.uleb128 0x5f
+	.uleb128 0x59
+	.4byte	0x71e2
+	.4byte	.LLST297
+	.uleb128 0x60
 	.4byte	0x1f1f
-	.uleb128 0x5f
+	.uleb128 0x60
 	.4byte	0x1f27
-	.uleb128 0x59
-	.4byte	0x70f8
+	.uleb128 0x58
+	.4byte	0x71e7
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x290
-	.4byte	0x71ca
-	.uleb128 0x5a
+	.4byte	.Ldebug_ranges0+0x350
+	.4byte	0x72b9
+	.uleb128 0x59
 	.4byte	0x1f3d
-	.4byte	.LLST297
+	.4byte	.LLST298
 	.uleb128 0x24
-	.8byte	.LVL1416
+	.8byte	.LVL1425
 	.4byte	0x2a97
 	.uleb128 0x24
-	.8byte	.LVL1417
-	.4byte	0x4707
+	.8byte	.LVL1426
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL1420
-	.4byte	0x4707
+	.8byte	.LVL1429
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL1421
-	.4byte	0x74b8
+	.8byte	.LVL1430
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1424
+	.8byte	.LVL1433
 	.4byte	0x2010
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1439
+	.8byte	.LVL1448
 	.4byte	0x2563
 	.uleb128 0x24
-	.8byte	.LVL1441
-	.4byte	0x309d
+	.8byte	.LVL1450
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1445
-	.4byte	0x4707
+	.8byte	.LVL1454
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL1449
+	.8byte	.LVL1458
 	.4byte	0x1f66
 	.uleb128 0x24
-	.8byte	.LVL1451
-	.4byte	0x4707
+	.8byte	.LVL1460
+	.4byte	0x4717
 	.uleb128 0x24
-	.8byte	.LVL1452
+	.8byte	.LVL1461
 	.4byte	0x1f66
 	.uleb128 0x24
-	.8byte	.LVL1454
+	.8byte	.LVL1463
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1458
+	.8byte	.LVL1467
 	.4byte	0x2563
 	.uleb128 0x24
-	.8byte	.LVL1459
+	.8byte	.LVL1468
 	.4byte	0x266c
 	.uleb128 0x24
-	.8byte	.LVL1460
-	.4byte	0x74b8
+	.8byte	.LVL1469
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1461
-	.4byte	0x74b8
+	.8byte	.LVL1470
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1462
-	.4byte	0x74b8
+	.8byte	.LVL1471
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1463
-	.4byte	0x309d
+	.8byte	.LVL1472
+	.4byte	0x30ad
 	.uleb128 0x24
-	.8byte	.LVL1464
+	.8byte	.LVL1473
 	.4byte	0x1f66
 	.uleb128 0x24
-	.8byte	.LVL1479
+	.8byte	.LVL1488
 	.4byte	0x1d0d
 	.uleb128 0x24
-	.8byte	.LVL1483
-	.4byte	0x74b8
+	.8byte	.LVL1492
+	.4byte	0x75a7
 	.uleb128 0x24
-	.8byte	.LVL1484
-	.4byte	0x3fc5
+	.8byte	.LVL1493
+	.4byte	0x3fd5
 	.uleb128 0x24
-	.8byte	.LVL1487
+	.8byte	.LVL1496
 	.4byte	0x2169
 	.uleb128 0x24
-	.8byte	.LVL1490
+	.8byte	.LVL1499
 	.4byte	0x259d
 	.uleb128 0x24
-	.8byte	.LVL1491
+	.8byte	.LVL1500
 	.4byte	0x20cd
 	.uleb128 0x24
-	.8byte	.LVL1494
+	.8byte	.LVL1503
 	.4byte	0x20cd
 	.uleb128 0x24
-	.8byte	.LVL1495
+	.8byte	.LVL1504
 	.4byte	0x2707
 	.uleb128 0x24
-	.8byte	.LVL1496
-	.4byte	0x5815
+	.8byte	.LVL1505
+	.4byte	0x57a6
 	.uleb128 0x24
-	.8byte	.LVL1497
-	.4byte	0x40b4
+	.8byte	.LVL1506
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1498
-	.4byte	0x3b9a
+	.8byte	.LVL1507
+	.4byte	0x3baa
 	.byte	0
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1422
+	.8byte	.LVL1431
 	.4byte	0x2378
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x2c48
+	.uleb128 0x56
+	.4byte	0x2c58
 	.8byte	.LFB231
 	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7499
-	.uleb128 0x59
-	.4byte	0x2c59
+	.4byte	0x7588
+	.uleb128 0x58
+	.4byte	0x2c69
 	.uleb128 0x4c
-	.8byte	.LBB303
-	.8byte	.LBE303-.LBB303
-	.4byte	0x7409
-	.uleb128 0x5a
-	.4byte	0x733a
-	.4byte	.LLST330
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x300
-	.4byte	0x736c
+	.8byte	.LBB331
+	.8byte	.LBE331-.LBB331
+	.4byte	0x74f8
 	.uleb128 0x59
-	.4byte	0x2c64
+	.4byte	0x7429
+	.4byte	.LLST331
+	.uleb128 0x2f
+	.4byte	.Ldebug_ranges0+0x3c0
+	.4byte	0x745b
+	.uleb128 0x58
+	.4byte	0x2c74
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1667
-	.4byte	0x2ee5
+	.8byte	.LVL1676
+	.4byte	0x2ef5
 	.uleb128 0x24
-	.8byte	.LVL1668
-	.4byte	0x2ee5
+	.8byte	.LVL1677
+	.4byte	0x2ef5
 	.uleb128 0x24
-	.8byte	.LVL1669
-	.4byte	0x3ce5
+	.8byte	.LVL1678
+	.4byte	0x3cf5
 	.uleb128 0x24
-	.8byte	.LVL1670
-	.4byte	0x3ce5
+	.8byte	.LVL1679
+	.4byte	0x3cf5
 	.uleb128 0x24
-	.8byte	.LVL1671
-	.4byte	0x40b4
+	.8byte	.LVL1680
+	.4byte	0x40c4
 	.uleb128 0x24
-	.8byte	.LVL1672
-	.4byte	0x3b9a
+	.8byte	.LVL1681
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1673
-	.4byte	0x3b9a
+	.8byte	.LVL1682
+	.4byte	0x3baa
 	.uleb128 0x24
-	.8byte	.LVL1676
+	.8byte	.LVL1685
 	.4byte	0x208d
 	.uleb128 0x24
-	.8byte	.LVL1677
+	.8byte	.LVL1686
 	.4byte	0x208d
 	.uleb128 0x24
-	.8byte	.LVL1678
+	.8byte	.LVL1687
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1679
+	.8byte	.LVL1688
 	.4byte	0x27df
 	.uleb128 0x24
-	.8byte	.LVL1680
-	.4byte	0x2dfd
+	.8byte	.LVL1689
+	.4byte	0x2e0d
 	.byte	0
 	.uleb128 0x24
-	.8byte	.LVL1654
-	.4byte	0x4c0c
+	.8byte	.LVL1663
+	.4byte	0x4b9d
 	.uleb128 0x24
-	.8byte	.LVL1655
-	.4byte	0x3a52
+	.8byte	.LVL1664
+	.4byte	0x3a62
 	.uleb128 0x24
-	.8byte	.LVL1656
-	.4byte	0x38fd
+	.8byte	.LVL1665
+	.4byte	0x390d
 	.uleb128 0x24
-	.8byte	.LVL1657
-	.4byte	0x36fb
+	.8byte	.LVL1666
+	.4byte	0x370b
 	.uleb128 0x24
-	.8byte	.LVL1658
-	.4byte	0x3781
+	.8byte	.LVL1667
+	.4byte	0x3791
 	.uleb128 0x24
-	.8byte	.LVL1659
-	.4byte	0x2f6e
+	.8byte	.LVL1668
+	.4byte	0x2f7e
 	.uleb128 0x24
-	.8byte	.LVL1660
-	.4byte	0x3a45
+	.8byte	.LVL1669
+	.4byte	0x3a55
 	.uleb128 0x24
-	.8byte	.LVL1661
-	.4byte	0x4ac9
+	.8byte	.LVL1670
+	.4byte	0x4afc
 	.uleb128 0x24
-	.8byte	.LVL1662
-	.4byte	0x2fb0
+	.8byte	.LVL1671
+	.4byte	0x2fc0
 	.uleb128 0x24
-	.8byte	.LVL1663
-	.4byte	0x3120
+	.8byte	.LVL1672
+	.4byte	0x3130
 	.uleb128 0x24
-	.8byte	.LVL1664
-	.4byte	0x3d6b
+	.8byte	.LVL1673
+	.4byte	0x3d7b
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF654
-	.4byte	.LASF654
+	.uleb128 0x61
+	.4byte	.LASF653
+	.4byte	.LASF653
 	.byte	0x10
 	.byte	0x35
+	.uleb128 0x62
+	.4byte	.LASF665
+	.4byte	.LASF665
 	.uleb128 0x61
-	.4byte	.LASF666
-	.4byte	.LASF666
-	.uleb128 0x60
-	.4byte	.LASF655
-	.4byte	.LASF655
+	.4byte	.LASF654
+	.4byte	.LASF654
 	.byte	0x10
 	.byte	0x31
-	.uleb128 0x60
-	.4byte	.LASF656
-	.4byte	.LASF656
+	.uleb128 0x61
+	.4byte	.LASF655
+	.4byte	.LASF655
 	.byte	0xa
 	.byte	0x8e
-	.uleb128 0x60
+	.uleb128 0x61
+	.4byte	.LASF656
+	.4byte	.LASF656
+	.byte	0x11
+	.byte	0x27
+	.uleb128 0x61
 	.4byte	.LASF657
 	.4byte	.LASF657
-	.byte	0x11
-	.byte	0x2c
-	.uleb128 0x60
-	.4byte	.LASF658
-	.4byte	.LASF658
 	.byte	0xc
 	.byte	0x18
-	.uleb128 0x62
-	.4byte	.LASF659
-	.4byte	.LASF659
+	.uleb128 0x63
+	.4byte	.LASF658
+	.4byte	.LASF658
 	.byte	0xb
 	.2byte	0x19b
-	.uleb128 0x63
+	.uleb128 0x64
+	.4byte	.LASF666
 	.4byte	.LASF667
-	.4byte	.LASF668
 	.byte	0x12
 	.byte	0
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0
 	.section	.debug_abbrev,"",@progbits
 .Ldebug_abbrev0:
@@ -32525,21 +32754,34 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x4f
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x50
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x11
+	.uleb128 0x52
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
+	.uleb128 0x55
+	.uleb128 0x17
 	.uleb128 0x58
 	.uleb128 0xb
 	.uleb128 0x59
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x51
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -32554,31 +32796,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x51
-	.uleb128 0x1d
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
-	.byte	0
-	.byte	0
 	.uleb128 0x52
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x53
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -32597,7 +32815,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -32608,7 +32826,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x54
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -32625,7 +32843,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -32650,7 +32868,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -32667,7 +32885,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -32676,14 +32894,14 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x58
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x59
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -32692,7 +32910,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -32701,7 +32919,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -32710,14 +32928,14 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x5d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -32732,14 +32950,38 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
+	.uleb128 0x5e
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
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-	.uleb128 0xa
+	.uleb128 0x1d
 	.byte	0
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 	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
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 	.byte	0
 	.byte	0
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+	.byte	0
+	.uleb128 0x61
 	.uleb128 0x2e
 	.byte	0
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@@ -32756,7 +32998,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x62
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -32769,7 +33011,7 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -32786,7 +33028,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x64
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
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 	.byte	0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1467-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1473-.Ltext0
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 	.2byte	0x1
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 	.2byte	0x1
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-.LLST294:
-	.8byte	.LVL1470-.Ltext0
-	.8byte	.LVL1472-.Ltext0
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 	.2byte	0x1
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-	.8byte	.LVL1474-.Ltext0
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 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
-.LLST295:
-	.8byte	.LVL1426-.Ltext0
-	.8byte	.LVL1429-.Ltext0
+.LLST296:
+	.8byte	.LVL1435-.Ltext0
+	.8byte	.LVL1438-.Ltext0
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1443-.Ltext0
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 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1449-.Ltext0
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 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1452-.Ltext0
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 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1456-.Ltext0
-	.8byte	.LVL1501-.Ltext0
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+	.8byte	.LVL1510-.Ltext0
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST296:
-	.8byte	.LVL1426-.Ltext0
-	.8byte	.LVL1428-.Ltext0
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+	.8byte	.LVL1435-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1443-.Ltext0
-	.8byte	.LVL1444-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1449-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1452-.Ltext0
-	.8byte	.LVL1453-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1467-.Ltext0
-	.8byte	.LVL1468-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1480-.Ltext0
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 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST297:
-	.8byte	.LVL1418-.Ltext0
-	.8byte	.LVL1419-.Ltext0
+.LLST298:
+	.8byte	.LVL1427-.Ltext0
+	.8byte	.LVL1428-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1423-.Ltext0
-	.8byte	.LVL1424-1-.Ltext0
+	.8byte	.LVL1432-.Ltext0
+	.8byte	.LVL1433-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST330:
-	.8byte	.LVL1665-.Ltext0
-	.8byte	.LVL1666-.Ltext0
-	.2byte	0x1
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+.LLST331:
 	.8byte	.LVL1674-.Ltext0
 	.8byte	.LVL1675-.Ltext0
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1683-.Ltext0
+	.8byte	.LVL1684-.Ltext0
+	.2byte	0x1
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 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
@@ -37370,106 +37619,130 @@ check_vpc_table:
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB164-.Ltext0
-	.8byte	.LBE164-.Ltext0
-	.8byte	.LBB167-.Ltext0
-	.8byte	.LBE167-.Ltext0
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-	.8byte	.LBE193-.Ltext0
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-	.8byte	.LBE196-.Ltext0
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 	.8byte	0
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-	.8byte	.LBB205-.Ltext0
-	.8byte	.LBE205-.Ltext0
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 	.8byte	0
-	.8byte	.LBB304-.Ltext0
-	.8byte	.LBE304-.Ltext0
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-	.8byte	.LBE305-.Ltext0
+	.8byte	.LBB317-.Ltext0
+	.8byte	.LBE317-.Ltext0
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LBE325-.Ltext0
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+	.8byte	0
+	.8byte	0
+	.8byte	.LBB332-.Ltext0
+	.8byte	.LBE332-.Ltext0
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+	.8byte	.LBE333-.Ltext0
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
@@ -37495,11 +37768,11 @@ check_vpc_table:
 	.string	"c_ftl_nand_planes_num"
 .LASF1:
 	.string	"sizetype"
-.LASF590:
+.LASF589:
 	.string	"re_try_next_blk"
 .LASF19:
 	.string	"saved_command_line"
-.LASF585:
+.LASF584:
 	.string	"P2V_block_in_plane"
 .LASF340:
 	.string	"ftl_memcmp"
@@ -37509,7 +37782,7 @@ check_vpc_table:
 	.string	"g_totle_vendor_block"
 .LASF93:
 	.string	"BlkNum"
-.LASF595:
+.LASF594:
 	.string	"totle_count"
 .LASF485:
 	.string	"lastWritePage"
@@ -37593,9 +37866,9 @@ check_vpc_table:
 	.string	"boot_command_line"
 .LASF530:
 	.string	"update_map_block"
-.LASF604:
+.LASF603:
 	.string	"FtlBbmMapBadBlock"
-.LASF602:
+.LASF601:
 	.string	"FtlBbtInfoPrint"
 .LASF52:
 	.string	"hex_asc_upper"
@@ -37605,15 +37878,15 @@ check_vpc_table:
 	.string	"re_save_vpndata"
 .LASF532:
 	.string	"region_num"
-.LASF599:
+.LASF598:
 	.string	"re_save_bbmdata"
-.LASF619:
+.LASF618:
 	.string	"first_lpa_sctidx"
 .LASF16:
 	.string	"__security_initcall_start"
 .LASF304:
 	.string	"g_totle_slc_erase_count"
-.LASF593:
+.LASF592:
 	.string	"FtlLoadBbt"
 .LASF172:
 	.string	"check_en"
@@ -37625,7 +37898,7 @@ check_vpc_table:
 	.string	"totle_num"
 .LASF321:
 	.string	"g_nand_ops"
-.LASF584:
+.LASF583:
 	.string	"ver2"
 .LASF211:
 	.string	"c_ftl_nand_max_data_blks"
@@ -37637,7 +37910,7 @@ check_vpc_table:
 	.string	"ftl_data_blk_header"
 .LASF227:
 	.string	"req_erase"
-.LASF611:
+.LASF610:
 	.string	"num_lpa"
 .LASF196:
 	.string	"c_ftl_nand_byte_pre_oob"
@@ -37671,7 +37944,7 @@ check_vpc_table:
 	.string	"g_buffer_superblock"
 .LASF10:
 	.string	"long int"
-.LASF632:
+.LASF631:
 	.string	"create_first_buffer_superblock"
 .LASF60:
 	.string	"p_data"
@@ -37683,7 +37956,7 @@ check_vpc_table:
 	.string	"gSysFreeQueue"
 .LASF141:
 	.string	"l2p_write_count"
-.LASF618:
+.LASF617:
 	.string	"absolute_sector"
 .LASF553:
 	.string	"pHead"
@@ -37695,7 +37968,7 @@ check_vpc_table:
 	.string	"FtlUpdateVaildLpnCount"
 .LASF367:
 	.string	"FlashTestBlk"
-.LASF668:
+.LASF667:
 	.string	"__builtin_strcpy"
 .LASF287:
 	.string	"g_gc_bad_block_gc_index"
@@ -37703,9 +37976,9 @@ check_vpc_table:
 	.string	"p_free_data_block_list_head"
 .LASF97:
 	.string	"pBlkVpcTbl"
-.LASF579:
+.LASF578:
 	.string	"high"
-.LASF634:
+.LASF633:
 	.string	"is_sys_blk"
 .LASF260:
 	.string	"p_vendor_region_ppn_table"
@@ -37757,11 +38030,11 @@ check_vpc_table:
 	.string	"g_gc_head_data_block"
 .LASF50:
 	.string	"system_state"
-.LASF617:
+.LASF616:
 	.string	"FtlRead"
 .LASF269:
 	.string	"g_num_free_superblocks"
-.LASF589:
+.LASF588:
 	.string	"pBbtHeader"
 .LASF5:
 	.string	"unsigned char"
@@ -37779,7 +38052,7 @@ check_vpc_table:
 	.string	"SYSTEM_BOOTING"
 .LASF116:
 	.string	"regionId"
-.LASF609:
+.LASF608:
 	.string	"start_lpa"
 .LASF307:
 	.string	"g_in_gc_progress"
@@ -37823,9 +38096,9 @@ check_vpc_table:
 	.string	"BbtMap"
 .LASF2:
 	.string	"char"
-.LASF646:
+.LASF645:
 	.string	"FtlSysBlkNumInit"
-.LASF655:
+.LASF654:
 	.string	"memset"
 .LASF325:
 	.string	"TotleReadBufferCount1"
@@ -37833,7 +38106,7 @@ check_vpc_table:
 	.string	"totle_read_sector"
 .LASF327:
 	.string	"TotleReadBufferCount3"
-.LASF624:
+.LASF623:
 	.string	"FtlSysFlush"
 .LASF254:
 	.string	"p_map_block_ver_table"
@@ -37845,7 +38118,7 @@ check_vpc_table:
 	.string	"FtlGcUpdatePage"
 .LASF433:
 	.string	"maxFreeBlockEraseCount"
-.LASF639:
+.LASF638:
 	.string	"re_test_next_page"
 .LASF39:
 	.string	"panic_on_io_nmi"
@@ -37861,7 +38134,7 @@ check_vpc_table:
 	.string	"TotleReadBufferCount2"
 .LASF374:
 	.string	"num_io"
-.LASF581:
+.LASF580:
 	.string	"pagePreBlk"
 .LASF126:
 	.string	"activePageOffset"
@@ -37871,7 +38144,7 @@ check_vpc_table:
 	.string	"FtlLoadMapInfo"
 .LASF362:
 	.string	"block_index"
-.LASF648:
+.LASF647:
 	.string	"FtlPrintInfo"
 .LASF477:
 	.string	"FtlReUsePrevPpa"
@@ -37879,7 +38152,7 @@ check_vpc_table:
 	.string	"p_swl_mul_table"
 .LASF561:
 	.string	"insert_data_list"
-.LASF642:
+.LASF641:
 	.string	"FtlVariablesInit"
 .LASF265:
 	.string	"p_data_block_list_table"
@@ -37889,7 +38162,7 @@ check_vpc_table:
 	.string	"pNode"
 .LASF301:
 	.string	"g_totle_mlc_erase_count"
-.LASF582:
+.LASF581:
 	.string	"ftl_cmp_data_ver"
 .LASF273:
 	.string	"g_gc_temp_superblock"
@@ -37897,7 +38170,7 @@ check_vpc_table:
 	.string	"p_vendor_block_valid_page_count"
 .LASF496:
 	.string	"FtlScanSysBlk"
-.LASF664:
+.LASF663:
 	.string	"l2p_addr_tran"
 .LASF306:
 	.string	"g_max_erase_count"
@@ -37907,23 +38180,23 @@ check_vpc_table:
 	.string	"ftl_gc_page_buffer"
 .LASF230:
 	.string	"g_req_cache"
-.LASF645:
+.LASF644:
 	.string	"FtlConstantsInit"
 .LASF448:
 	.string	"pages"
 .LASF417:
 	.string	"update_vpc_list"
-.LASF657:
+.LASF656:
 	.string	"rknand_print_hex"
 .LASF405:
 	.string	"p_gc_page"
-.LASF651:
+.LASF650:
 	.string	"limit"
 .LASF391:
 	.string	"Ftl_get_new_temp_ppa"
 .LASF133:
 	.string	"PowerLostTimes"
-.LASF574:
+.LASF569:
 	.string	"blk_Id"
 .LASF290:
 	.string	"g_gc_merge_free_blk_threshold"
@@ -37935,7 +38208,7 @@ check_vpc_table:
 	.string	"cache_write_count"
 .LASF256:
 	.string	"g_totle_map_block"
-.LASF656:
+.LASF655:
 	.string	"printk"
 .LASF543:
 	.string	"phyAddr"
@@ -37955,18 +38228,16 @@ check_vpc_table:
 	.string	"scr_ppa"
 .LASF206:
 	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF569:
+.LASF571:
 	.string	"FtlFreeSysBLkSort"
 .LASF263:
 	.string	"p_l2p_map_buf"
-.LASF640:
+.LASF639:
 	.string	"IsBlkInVendorPart"
-.LASF596:
+.LASF595:
 	.string	"FtlBbtMemInit"
 .LASF241:
 	.string	"gp_gc_page_buf_info"
-.LASF570:
-	.string	"tmp_blk_id"
 .LASF164:
 	.string	"front"
 .LASF232:
@@ -37975,17 +38246,17 @@ check_vpc_table:
 	.string	"index"
 .LASF535:
 	.string	"lastMapBlk"
-.LASF621:
+.LASF620:
 	.string	"last_lpa_nscts"
 .LASF298:
 	.string	"g_tmp_data_superblock_id"
 .LASF244:
 	.string	"gp_ect_tbl_info"
-.LASF652:
+.LASF651:
 	.string	"rknand_proc_ftlread"
 .LASF539:
 	.string	"ftl_free_no_use_map_blk"
-.LASF662:
+.LASF661:
 	.string	"/home/ldq/rk-linux/kernel-debug"
 .LASF32:
 	.string	"atomic_notifier_head"
@@ -37995,7 +38266,7 @@ check_vpc_table:
 	.string	"c_ftl_nand_blks_per_die"
 .LASF562:
 	.string	"node_data_count"
-.LASF598:
+.LASF597:
 	.string	"write_count"
 .LASF238:
 	.string	"p_io_spare_buf"
@@ -38015,19 +38286,19 @@ check_vpc_table:
 	.string	"check"
 .LASF26:
 	.string	"console_printk"
-.LASF667:
+.LASF666:
 	.string	"strcpy"
 .LASF58:
 	.string	"status"
 .LASF65:
 	.string	"die_num"
-.LASF625:
+.LASF624:
 	.string	"sftl_init"
 .LASF289:
 	.string	"g_gc_free_blk_threshold"
 .LASF29:
 	.string	"kptr_restrict"
-.LASF591:
+.LASF590:
 	.string	"FtlLoadFactoryBbt"
 .LASF404:
 	.string	"scan_page_num"
@@ -38041,7 +38312,7 @@ check_vpc_table:
 	.string	"ftl_sb_update_avl_pages"
 .LASF102:
 	.string	"region_id"
-.LASF628:
+.LASF627:
 	.string	"ftl_low_format"
 .LASF339:
 	.string	"str2"
@@ -38063,7 +38334,7 @@ check_vpc_table:
 	.string	"ftl_get_blk_mode"
 .LASF24:
 	.string	"linux_banner"
-.LASF659:
+.LASF658:
 	.string	"sprintf"
 .LASF105:
 	.string	"ftl_ect_tbl_info"
@@ -38071,7 +38342,7 @@ check_vpc_table:
 	.string	"ftl_map_blk_alloc_new_blk"
 .LASF510:
 	.string	"FtlVendorPartRead"
-.LASF608:
+.LASF607:
 	.string	"FtlWrite"
 .LASF71:
 	.string	"sec_per_page"
@@ -38089,7 +38360,7 @@ check_vpc_table:
 	.string	"lastPpa"
 .LASF318:
 	.string	"g_power_lost_recovery_flag"
-.LASF600:
+.LASF599:
 	.string	"FtlBbt2Bitmap"
 .LASF69:
 	.string	"page_per_blk"
@@ -38103,7 +38374,7 @@ check_vpc_table:
 	.string	"numREQ"
 .LASF75:
 	.string	"ecc_bits"
-.LASF630:
+.LASF629:
 	.string	"sys_bad_block_cnt"
 .LASF192:
 	.string	"c_ftl_nand_page_pre_super_blk"
@@ -38119,7 +38390,7 @@ check_vpc_table:
 	.string	"g_totle_gc_page_count"
 .LASF234:
 	.string	"p_vendor_data_buf"
-.LASF597:
+.LASF596:
 	.string	"FtlBbmTblFlush"
 .LASF564:
 	.string	"tmp_multiplier_value"
@@ -38147,7 +38418,7 @@ check_vpc_table:
 	.string	"last_page_version"
 .LASF228:
 	.string	"req_gc"
-.LASF607:
+.LASF606:
 	.string	"FtlDiscard"
 .LASF33:
 	.string	"panic_notifier_list"
@@ -38157,7 +38428,7 @@ check_vpc_table:
 	.string	"add_count"
 .LASF151:
 	.string	"inkDie_write_and_check_en"
-.LASF578:
+.LASF577:
 	.string	"FtlGetLastWrittenPage"
 .LASF462:
 	.string	"detected_active_page"
@@ -38167,7 +38438,7 @@ check_vpc_table:
 	.string	"reset_devices"
 .LASF154:
 	.string	"refresh_enable_mode"
-.LASF603:
+.LASF602:
 	.string	"FtlBbmIsBadBlock"
 .LASF23:
 	.string	"__icache_flags"
@@ -38199,7 +38470,7 @@ check_vpc_table:
 	.string	"g_num_data_superblocks"
 .LASF444:
 	.string	"error_flag"
-.LASF661:
+.LASF660:
 	.string	"drivers/rkflash/rksftl/rk_sftl.c"
 .LASF308:
 	.string	"g_in_swl_replace"
@@ -38227,7 +38498,7 @@ check_vpc_table:
 	.string	"kmsg_fops"
 .LASF565:
 	.string	"INSERT_DATA_LIST"
-.LASF612:
+.LASF611:
 	.string	"sctidx"
 .LASF387:
 	.string	"superBlk"
@@ -38235,13 +38506,13 @@ check_vpc_table:
 	.string	"flag"
 .LASF281:
 	.string	"g_gc_page_offset"
-.LASF638:
+.LASF637:
 	.string	"test_mode"
 .LASF296:
 	.string	"g_totle_discard_page_count"
 .LASF214:
 	.string	"g_GlobalDataVersion"
-.LASF649:
+.LASF648:
 	.string	"debug_flag"
 .LASF324:
 	.string	"gFtlInitStatus"
@@ -38283,7 +38554,7 @@ check_vpc_table:
 	.string	"str1"
 .LASF64:
 	.string	"nand_type"
-.LASF613:
+.LASF612:
 	.string	"nscts"
 .LASF101:
 	.string	"ftl_l2p_ram_map_info"
@@ -38295,11 +38566,11 @@ check_vpc_table:
 	.string	"get_bad_blk_list"
 .LASF293:
 	.string	"g_totle_write_page_count"
-.LASF643:
+.LASF642:
 	.string	"FtlMemInit"
 .LASF300:
 	.string	"g_totle_l2p_write_count"
-.LASF586:
+.LASF585:
 	.string	"P2V_plane"
 .LASF11:
 	.string	"bool"
@@ -38315,7 +38586,7 @@ check_vpc_table:
 	.string	"slc_erase_count"
 .LASF541:
 	.string	"minValidPageCount"
-.LASF641:
+.LASF640:
 	.string	"ven_blk"
 .LASF190:
 	.string	"c_ftl_nand_page_pre_blk"
@@ -38339,7 +38610,7 @@ check_vpc_table:
 	.string	"log2phys"
 .LASF466:
 	.string	"detected_error_page"
-.LASF580:
+.LASF579:
 	.string	"spareBuf"
 .LASF185:
 	.string	"c_ftl_nand_blks_per_die_shift"
@@ -38349,7 +38620,7 @@ check_vpc_table:
 	.string	"p_l2p_ram_map"
 .LASF94:
 	.string	"maxBlkNum"
-.LASF658:
+.LASF657:
 	.string	"ftl_malloc"
 .LASF441:
 	.string	"pDataHeader"
@@ -38359,7 +38630,7 @@ check_vpc_table:
 	.string	"erase_blk"
 .LASF452:
 	.string	"SupperBlkListInit"
-.LASF631:
+.LASF630:
 	.string	"create_first_active_superblock"
 .LASF163:
 	.string	"sys_blk_queue"
@@ -38389,7 +38660,7 @@ check_vpc_table:
 	.string	"g_l2p_last_update_region_id"
 .LASF198:
 	.string	"c_ftl_nand_totle_phy_blks"
-.LASF633:
+.LASF632:
 	.string	"FtlLowFormatEraseBlock"
 .LASF73:
 	.string	"byte_per_sec"
@@ -38407,19 +38678,19 @@ check_vpc_table:
 	.string	"p_blk_mode_table"
 .LASF282:
 	.string	"g_gc_cur_blk_valid_pages"
-.LASF576:
+.LASF575:
 	.string	"FtlFreeSysBlkQueueEmpty"
 .LASF191:
 	.string	"c_ftl_nand_page_pre_slc_blk"
 .LASF512:
 	.string	"nSec"
-.LASF594:
+.LASF593:
 	.string	"FtlBbtCalcTotleCnt"
 .LASF193:
 	.string	"c_ftl_nand_sec_pre_page"
 .LASF492:
 	.string	"FtlSlcSuperblockCheck"
-.LASF583:
+.LASF582:
 	.string	"ver1"
 .LASF150:
 	.string	"SlcPartLbaEndSector"
@@ -38451,7 +38722,7 @@ check_vpc_table:
 	.string	"next_free_active_page"
 .LASF129:
 	.string	"gcTempSuperblockId"
-.LASF620:
+.LASF619:
 	.string	"first_lpa_nscts"
 .LASF299:
 	.string	"g_totle_cache_write_count"
@@ -38461,7 +38732,7 @@ check_vpc_table:
 	.string	"Ftl_load_ext_data"
 .LASF503:
 	.string	"FtlWriteDump_data"
-.LASF635:
+.LASF634:
 	.string	"max_test_page_num"
 .LASF390:
 	.string	"Ftl_gc_temp_data_write_back"
@@ -38495,7 +38766,7 @@ check_vpc_table:
 	.string	"c_ftl_nand_data_blks_per_plane"
 .LASF368:
 	.string	"rk_ftl_garbage_collect"
-.LASF654:
+.LASF653:
 	.string	"memcmp"
 .LASF370:
 	.string	"numPages"
@@ -38509,7 +38780,7 @@ check_vpc_table:
 	.string	"make_superblock"
 .LASF15:
 	.string	"__con_initcall_end"
-.LASF629:
+.LASF628:
 	.string	"bad_block_cnt"
 .LASF547:
 	.string	"node_multiplier_value"
@@ -38525,6 +38796,8 @@ check_vpc_table:
 	.string	"flash_type"
 .LASF413:
 	.string	"req_num"
+.LASF568:
+	.string	"remalloc"
 .LASF508:
 	.string	"forceFlush"
 .LASF53:
@@ -38543,7 +38816,7 @@ check_vpc_table:
 	.string	"c_ftl_nand_byte_pre_page"
 .LASF438:
 	.string	"update_multiplier_value"
-.LASF616:
+.LASF615:
 	.string	"flashType"
 .LASF6:
 	.string	"short int"
@@ -38555,7 +38828,7 @@ check_vpc_table:
 	.string	"mode"
 .LASF423:
 	.string	"new_id"
-.LASF626:
+.LASF625:
 	.string	"pNand"
 .LASF46:
 	.string	"SYSTEM_RUNNING"
@@ -38563,15 +38836,15 @@ check_vpc_table:
 	.string	"pBuf"
 .LASF139:
 	.string	"write_page_count"
-.LASF601:
+.LASF600:
 	.string	"bitmap"
 .LASF197:
 	.string	"c_ftl_nand_reserved_blks"
-.LASF665:
+.LASF664:
 	.string	"sftl_get_density"
-.LASF637:
+.LASF636:
 	.string	"test_page_step"
-.LASF592:
+.LASF591:
 	.string	"blkAddr"
 .LASF283:
 	.string	"g_gc_cur_blk_max_valid_pages"
@@ -38579,11 +38852,11 @@ check_vpc_table:
 	.string	"g_gc_next_blk_1"
 .LASF526:
 	.string	"target_region"
-.LASF610:
+.LASF609:
 	.string	"end_lpa"
 .LASF470:
 	.string	"scan_completed"
-.LASF653:
+.LASF652:
 	.string	"FtlPrintInfo2buf"
 .LASF361:
 	.string	"p_die"
@@ -38595,19 +38868,19 @@ check_vpc_table:
 	.string	"mlc_erase_count"
 .LASF175:
 	.string	"phyBlk"
-.LASF623:
+.LASF622:
 	.string	"sftl_deinit"
 .LASF483:
 	.string	"pMapBlockInfo"
 .LASF148:
 	.string	"last_refresh_data_times"
-.LASF663:
+.LASF662:
 	.string	"system_states"
 .LASF156:
 	.string	"totle_write_sector"
 .LASF226:
 	.string	"req_prgm"
-.LASF588:
+.LASF587:
 	.string	"FtlMakeBbt"
 .LASF99:
 	.string	"in_gc_mode"
@@ -38623,7 +38896,7 @@ check_vpc_table:
 	.string	"max_ec"
 .LASF235:
 	.string	"p_sys_spare_buf"
-.LASF666:
+.LASF665:
 	.string	"memcpy"
 .LASF501:
 	.string	"prog_error_count"
@@ -38631,7 +38904,7 @@ check_vpc_table:
 	.string	"gc_discard_updated"
 .LASF409:
 	.string	"prev_superblock_id"
-.LASF636:
+.LASF635:
 	.string	"test_page_num"
 .LASF153:
 	.string	"last_refresh_read_count"
@@ -38639,9 +38912,9 @@ check_vpc_table:
 	.string	"lookup_ppa_ver"
 .LASF487:
 	.string	"totleBlkNum"
-.LASF606:
+.LASF605:
 	.string	"sftl_read"
-.LASF575:
+.LASF574:
 	.string	"FtlFreeSysBlkQueueFull"
 .LASF406:
 	.string	"FtlGcPageVarInit"
@@ -38653,15 +38926,15 @@ check_vpc_table:
 	.string	"recovery_cur_page_ver"
 .LASF534:
 	.string	"ftl_map_blk_gc"
-.LASF605:
+.LASF604:
 	.string	"sftl_write"
 .LASF115:
 	.string	"ftl_map_blk_header"
-.LASF577:
+.LASF576:
 	.string	"FtlFreeSysBlkQueueInit"
 .LASF21:
 	.string	"late_time_init"
-.LASF644:
+.LASF643:
 	.string	"mem_size"
 .LASF482:
 	.string	"FtlMapTblRecovery"
@@ -38673,17 +38946,17 @@ check_vpc_table:
 	.string	"lpn_index"
 .LASF200:
 	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF660:
+.LASF659:
 	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mgeneral-regs-only -"
 	.ascii	"mpc-relative-literal-loads -march=armv8-a -mabi=lp64 -g -Os "
 	.ascii	"-std=gnu90 -fno-strict-aliasing -fno-common -fno-pic -fno-as"
 	.ascii	"ynchronous-unwind-tables -fno-dele"
 	.string	"te-null-pointer-checks -fno-stack-protector -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-var-tracking-assignments -fno-strict-overflow -fno-merge-all-constants -fmerge-constants -fstack-check=no -fconserve-stack --param allow-store-data-races=0"
-.LASF622:
+.LASF621:
 	.string	"sector"
 .LASF504:
 	.string	"num_page"
-.LASF615:
+.LASF614:
 	.string	"FtlProgPages"
 .LASF414:
 	.string	"FtlGcBufFree"
@@ -38723,8 +38996,6 @@ check_vpc_table:
 	.string	"TotleReadBufferMatchCount"
 .LASF337:
 	.string	"check_spare_buf"
-.LASF571:
-	.string	"tmp_ec"
 .LASF312:
 	.string	"g_gc_skip_write_count"
 .LASF56:
@@ -38737,7 +39008,7 @@ check_vpc_table:
 	.string	"req_sys"
 .LASF159:
 	.string	"List_Node"
-.LASF650:
+.LASF649:
 	.string	"Ftl_log2"
 .LASF149:
 	.string	"all_blk_used_slc_mode"
@@ -38749,19 +39020,19 @@ check_vpc_table:
 	.string	"c_ftl_nand_map_blks_per_plane"
 .LASF13:
 	.string	"initcall_t"
-.LASF587:
+.LASF586:
 	.string	"V2P_block"
 .LASF112:
 	.string	"sysBlksPerPlane"
 .LASF451:
 	.string	"Ftl_save_ext_data"
-.LASF614:
+.LASF613:
 	.string	"FtlCacheWriteBack"
 .LASF76:
 	.string	"nand_ops"
-.LASF627:
+.LASF626:
 	.string	"load_bbt"
-.LASF647:
+.LASF646:
 	.string	"blkNum"
 .LASF363:
 	.string	"page_index"
@@ -38769,7 +39040,7 @@ check_vpc_table:
 	.string	"FtlVpcTblFlush"
 .LASF106:
 	.string	"hash"
-.LASF568:
+.LASF570:
 	.string	"IsInFreeQueue"
 .LASF468:
 	.string	"read_super_page_end"

From 644805caacb7987bbec2a398ab5fadcb41c299af Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Sat, 14 Jul 2018 10:57:26 +0800
Subject: [PATCH 0593/1852] media: rockchip: isp1: fix wrong fmt of isp_sd
 .get_fmt

The isp_sd .get_fmt of source pad return format of input by mistake.
It should be the *out_fmt of isp_sd.

Change-Id: I9f592a2906275ef58dc564d68de63aac393c8690
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/rkisp1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 98098ff02db73..88f20b7fcd970 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -691,7 +691,7 @@ static int rkisp1_isp_sd_get_fmt(struct v4l2_subdev *sd,
 		*mf = isp_sd->in_frm;
 	} else if (fmt->pad == RKISP1_ISP_PAD_SOURCE_PATH) {
 		/* format of source pad */
-		*mf = isp_sd->in_frm;
+		mf->code = isp_sd->out_fmt.mbus_code;
 		/* window size of source pad */
 		mf->width = isp_sd->out_crop.width;
 		mf->height = isp_sd->out_crop.height;

From 17cf56094a53cf8490cbebe94ca295cd4d7b2285 Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Sat, 14 Jul 2018 15:02:54 +0800
Subject: [PATCH 0594/1852] drm/bridge: synopsys: dw-hdmi: Clear color depth
 mask and format if get edid failed

If edid can't be got when hdmi plug in, hdmi color depth mask and format
won't be updated. The color list in the setting are those of the previous
TV. This commit fix the error.

Change-Id: I5ed4be5efa2a69be0b58489f58a3af5de9912292
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 54de21bae71dc..d57d999c50a5b 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2498,6 +2498,7 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 	struct edid *edid;
 	struct drm_display_mode *mode;
 	const u8 def_modes[6] = {4, 16, 31, 19, 17, 2};
+	struct drm_display_info *info = &connector->display_info;
 	struct hdr_static_metadata *metedata =
 			&connector->display_info.hdmi.hdr_panel_metadata;
 	int i, ret = 0;
@@ -2533,6 +2534,10 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 				ret++;
 			}
 		}
+		info->edid_hdmi_dc_modes = 0;
+		info->hdmi.y420_dc_modes = 0;
+		info->color_formats = 0;
+
 		dev_info(hdmi->dev, "failed to get edid\n");
 	}
 

From 36cc3d44f1137a3c5f25b364e39b3f3eea3fd39f Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Sat, 14 Jul 2018 16:22:43 +0800
Subject: [PATCH 0595/1852] drm/rockchip: rk3066_hdmi: Clear color depth mask
 and format if get edid failed

If edid can't be got when hdmi plug in, hdmi color depth mask and format
won't be updated. The color list in the setting are those of the previous
TV. This commit fix the error.

Change-Id: Iffe3164af1f1ad32002c26b5bbac14f2ff417c96
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rk3066_hdmi.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rk3066_hdmi.c b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
index c7ec75320065e..7831430d81227 100644
--- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c
+++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
@@ -498,6 +498,7 @@ static int rk3066_hdmi_connector_get_modes(struct drm_connector *connector)
 	struct edid *edid;
 	const u8 def_modes[6] = {4, 16, 31, 19, 17, 2};
 	struct drm_display_mode *mode;
+	struct drm_display_info *info = &connector->display_info;
 	int i, ret = 0;
 
 	if (!hdmi->ddc)
@@ -524,6 +525,11 @@ static int rk3066_hdmi_connector_get_modes(struct drm_connector *connector)
 				ret++;
 			}
 		}
+
+		info->edid_hdmi_dc_modes = 0;
+		info->hdmi.y420_dc_modes = 0;
+		info->color_formats = 0;
+
 		dev_info(hdmi->dev, "failed to get edid\n");
 	}
 

From 09eb74c7dbcfe6e619715830006417245c6b271d Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Mon, 16 Jul 2018 11:14:09 +0800
Subject: [PATCH 0596/1852] arm64: dts: rockchip: rename rk3326 evb v10 board
 for linux

This patch tried to rename arch/arm64/boot/dts/rockchip/
{rk3326-evb-linux-lp3-v10.dts => rk3326-evb-lp3-v10-linux.dts},
and correct the right things as below.

* define the rootfs type as the squashfs.
* fixes some typo
* copyright to 2018

Change-Id: I5fed2e472c979d5209222ad51281b01148379efb
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 .../devicetree/bindings/arm/rockchip.txt      |  2 +
 arch/arm64/boot/dts/rockchip/Makefile         |  2 +-
 ...3-v10.dts => rk3326-evb-lp3-v10-linux.dts} | 89 ++++++++++---------
 3 files changed, 51 insertions(+), 42 deletions(-)
 rename arch/arm64/boot/dts/rockchip/{rk3326-evb-linux-lp3-v10.dts => rk3326-evb-lp3-v10-linux.dts} (97%)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 869dbba0361e0..fecd401ef7dd2 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -122,6 +122,8 @@ Rockchip platforms device tree bindings
 - Rockchip RK3326 evb board:
     Required root node properties:
       - compatible = "rockchip,rk3326-evb-lp3-v10", "rockchip,rk3326";
+    Or
+      - compatible = "rockchip,rk3326-evb-lp3-v10-linux", "rockchip,rk3326";
 
 - Rockchip PX30 evb ddr3 board:
     Required root node properties:
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 6b1075591ae6a..25661cd81e047 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -14,7 +14,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-voice-module-board-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-linux-lp3-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-box-liantong.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-linux-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
similarity index 97%
rename from arch/arm64/boot/dts/rockchip/rk3326-evb-linux-lp3-v10.dts
rename to arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
index 04d972316b380..9c296b0e417f6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-linux-lp3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 /dts-v1/;
@@ -15,8 +14,12 @@
 #include "rk3326-linux.dtsi"
 
 / {
-	model = "Rockchip rk3326 evb linux board";
-	compatible = "rockchip,rk3326-evb-linux-lp3-v10", "rockchip,rk3326";
+	model = "Rockchip rk3326 evb lpddr3 v10 board for linux";
+	compatible = "rockchip,rk3326-evb-lp3-v10-linux", "rockchip,rk3326";
+
+	chosen {
+                bootargs = "earlycon=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+        };
 
 	adc-keys {
 		compatible = "adc-keys";
@@ -832,42 +835,6 @@
 	};
 };
 
-&pinctrl {
-	headphone {
-		hp_det: hp-det {
-			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-
-		soc_slppin_gpio: soc_slppin_gpio {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
-		};
-
-		soc_slppin_slp: soc_slppin_slp {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
-		};
-
-		soc_slppin_rst: soc_slppin_rst {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
 &pmu_io_domains {
 	status = "okay";
 
@@ -978,3 +945,43 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&pinctrl {
+	headphone {
+		hp_det: hp-det {
+			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic_int {
+			rockchip,pins =
+				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		soc_slppin_gpio: soc_slppin_gpio {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		soc_slppin_slp: soc_slppin_slp {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+		};
+
+		soc_slppin_rst: soc_slppin_rst {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */
+/* DON'T PUT ANYTHING BELOW HERE.  PUT IT ABOVE PINCTRL */

From a40aae42484cc98f89ddbf2c12d412d035130147 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Sat, 14 Jul 2018 19:11:38 +0800
Subject: [PATCH 0597/1852] drivers: rkflash: remove CONFIG_FUNCTION_TRACER
 config for slc_ftl_arm_v7 lib

Change-Id: I63562272ca4a5d63310fcc72c109a80b88907223
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl_arm_v7.S | 40740 +++++++++++++++--------------
 1 file changed, 21044 insertions(+), 19696 deletions(-)

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 6897c7ecd7062..aa0bfb0d9e218 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,44 +2,34 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-13
+ * date: 2018-07-14
  */
-	.arch armv7-a
-	.eabi_attribute 20, 1
-	.eabi_attribute 21, 1
-	.eabi_attribute 23, 3
-	.eabi_attribute 24, 1
-	.eabi_attribute 25, 1
-	.eabi_attribute 26, 2
-	.eabi_attribute 30, 4
-	.eabi_attribute 34, 1
-	.eabi_attribute 18, 4
 	.file	"rk_sftl.c"
 	.text
 .Ltext0:
-	.global	__aeabi_uidiv
-	.align	1
+	.global	__udivsi3
+	.align	2
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	l2p_addr_tran, %function
 l2p_addr_tran:
-	.fnstart
 .LFB271:
 	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
 	.loc 1 18 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
 .LVL0:
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
+	mov	ip, sp
 .LCFI0:
-	.loc 1 18 0
-	mov	r8, r1
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+.LCFI1:
+	sub	fp, ip, #4
+.LCFI2:
 	.loc 1 25 0
 	ldr	r3, .L3
 	.loc 1 18 0
+	mov	r8, r1
 	mov	r9, r2
 	.loc 1 32 0
 	ldr	r6, [r0, #4]
@@ -53,7 +43,7 @@ l2p_addr_tran:
 	.loc 1 27 0
 	ldrh	r3, [r3, #14]
 	.loc 1 33 0
-	lsrs	r7, r6, #10
+	lsr	r7, r6, #10
 	.loc 1 37 0
 	ubfx	r6, r6, #0, #10
 .LVL4:
@@ -63,7 +53,6 @@ l2p_addr_tran:
 	uxth	r0, r7
 .LVL5:
 	.loc 1 28 0
-	itt	eq
 	lsreq	r4, r4, #1
 	.loc 1 29 0
 	lsleq	r5, r5, #1
@@ -74,11 +63,10 @@ l2p_addr_tran:
 	mov	r1, r4
 .LVL7:
 	.loc 1 29 0
-	it	eq
 	uxtheq	r5, r5
 .LVL8:
 	.loc 1 34 0
-	bl	__aeabi_uidiv
+	bl	__udivsi3
 .LVL9:
 	uxth	r0, r0
 .LVL10:
@@ -92,72 +80,74 @@ l2p_addr_tran:
 	.loc 1 38 0
 	str	r0, [r9]
 	.loc 1 41 0
-	movs	r0, #0
+	mov	r0, #0
 .LVL13:
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.LVL14:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 .L4:
 	.align	2
 .L3:
 	.word	g_nand_phy_info
 .LFE271:
-	.fnend
 	.size	l2p_addr_tran, .-l2p_addr_tran
-	.align	1
+	.align	2
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-	.fnstart
 .LFB286:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
 	.loc 2 1395 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL15:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL14:
+	mov	ip, sp
+.LCFI3:
+	push	{fp, ip, lr, pc}
+.LCFI4:
+	sub	fp, ip, #4
+.LCFI5:
 	.loc 2 1398 0
 	ldr	r3, .L6
-	lsrs	r1, r0, #5
+	lsr	r1, r0, #5
+	mov	ip, #1
 	and	r0, r0, #31
-.LVL16:
+.LVL15:
 	ldr	r2, [r3]
-	movs	r3, #1
-	lsl	r0, r3, r0
 	ldr	r3, [r2, r1, lsl #2]
-	orrs	r3, r3, r0
-	str	r3, [r2, r1, lsl #2]
-	bx	lr
+	orr	r0, r3, ip, lsl r0
+	str	r0, [r2, r1, lsl #2]
+	ldmfd	sp, {fp, sp, pc}
 .L7:
 	.align	2
 .L6:
 	.word	.LANCHOR0
 .LFE286:
-	.fnend
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
-	.align	1
+	.align	2
 	.global	Ftl_log2
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-	.fnstart
 .LFB152:
 	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
 	.loc 3 127 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL17:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL16:
+	mov	ip, sp
+.LCFI6:
+	push	{fp, ip, lr, pc}
+.LCFI7:
+	sub	fp, ip, #4
+.LCFI8:
 	.loc 3 131 0
-	movs	r1, #0
+	mov	r1, #0
 	.loc 3 129 0
-	movs	r2, #1
-.LVL18:
+	mov	r2, #1
+.LVL17:
 .L9:
 	.loc 3 131 0 discriminator 1
 	cmp	r2, r0
@@ -165,186 +155,194 @@ Ftl_log2:
 	add	r1, r1, #1
 	bls	.L10
 	.loc 3 133 0
-	subs	r0, r3, #1
-.LVL19:
+	sub	r0, r3, #1
+.LVL18:
 	.loc 3 135 0
 	uxth	r0, r0
-	bx	lr
-.LVL20:
+	ldmfd	sp, {fp, sp, pc}
+.LVL19:
 .L10:
 	.loc 3 132 0 discriminator 3
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	b	.L9
 .LFE152:
-	.fnend
 	.size	Ftl_log2, .-Ftl_log2
-	.align	1
+	.align	2
 	.global	FtlPrintInfo
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-	.fnstart
 .LFB153:
 	.loc 3 159 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL21:
-	bx	lr
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL20:
+	mov	ip, sp
+.LCFI9:
+	push	{fp, ip, lr, pc}
+.LCFI10:
+	sub	fp, ip, #4
+.LCFI11:
+	ldmfd	sp, {fp, sp, pc}
 .LFE153:
-	.fnend
 	.size	FtlPrintInfo, .-FtlPrintInfo
-	.align	1
+	.align	2
 	.global	FtlSysBlkNumInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-	.fnstart
 .LFB154:
 	.loc 3 165 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL22:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL21:
+	.loc 3 165 0
+	mov	ip, sp
+.LCFI12:
+	push	{fp, ip, lr, pc}
+.LCFI13:
+	sub	fp, ip, #4
+.LCFI14:
 	.loc 3 168 0
 	ldr	r3, .L13
-	cmp	r0, #24
-	it	cc
-	movcc	r0, #24
+	.loc 3 165 0
+	uxth	r0, r0
 	.loc 3 169 0
 	ldrh	r2, [r3, #8]
+	cmp	r0, #24
 	.loc 3 170 0
 	ldrh	r1, [r3, #18]
+	movcc	r0, #24
 	.loc 3 168 0
 	str	r0, [r3, #4]
 	.loc 3 169 0
-	muls	r2, r0, r2
+	mul	r2, r0, r2
 	.loc 3 170 0
-	subs	r0, r1, r0
-.LVL23:
+	sub	r0, r1, r0
+.LVL22:
 	.loc 3 171 0
 	ldr	r1, [r3, #24]
 	.loc 3 170 0
 	strh	r0, [r3, #16]	@ movhi
 	.loc 3 174 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 3 169 0
 	str	r2, [r3, #12]
 	.loc 3 171 0
-	subs	r2, r1, r2
+	sub	r2, r1, r2
 	str	r2, [r3, #20]
 	.loc 3 174 0
-	bx	lr
+	ldmfd	sp, {fp, sp, pc}
 .L14:
 	.align	2
 .L13:
 	.word	.LANCHOR0
 .LFE154:
-	.fnend
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
-	.global	__aeabi_idiv
-	.align	1
+	.global	__divsi3
+	.align	2
 	.global	FtlConstantsInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-	.fnstart
 .LFB155:
 	.loc 3 183 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL24:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI1:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL23:
+	mov	ip, sp
+.LCFI15:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI16:
+	sub	fp, ip, #4
+.LCFI17:
+	sub	sp, sp, #4
 	.loc 3 183 0
-	mov	fp, r0
+	mov	r7, r0
 	.loc 3 191 0
-	ldrh	r3, [fp, #14]
+	ldrh	r2, [r7, #14]
 	.loc 3 188 0
-	ldrh	r2, [r0]
 	ldr	r4, .L25
+	.loc 3 197 0
+	ldr	ip, .L25+4
 	.loc 3 191 0
-	cmp	r3, #4
+	cmp	r2, #4
+	.loc 3 188 0
+	ldrh	r1, [r0]
+	.loc 3 192 0
+	ldrheq	r2, [r7, #6]
 	.loc 3 189 0
 	ldrh	r6, [r0, #2]
 	.loc 3 190 0
 	ldrh	r0, [r0, #4]
-.LVL25:
+.LVL24:
 	.loc 3 188 0
-	strh	r2, [r4, #28]	@ movhi
+	strh	r1, [r4, #28]	@ movhi
+	.loc 3 192 0
+	lsreq	r2, r2, #1
 	.loc 3 189 0
 	strh	r6, [r4, #30]	@ movhi
 	.loc 3 190 0
 	strh	r0, [r4, #32]	@ movhi
-	.loc 3 191 0
-	bne	.L16
 	.loc 3 192 0
-	ldrh	r3, [fp, #6]
-	lsrs	r3, r3, #1
-	strh	r3, [r4, #18]	@ movhi
+	strheq	r2, [r4, #18]	@ movhi
 	.loc 3 193 0
-	movs	r3, #8
-	strh	r3, [r4, #34]	@ movhi
-.L16:
-	.loc 3 197 0 discriminator 3
-	ldr	r1, .L25+4
-	.loc 3 183 0 discriminator 3
-	movs	r3, #0
-.LVL26:
+	moveq	r2, #8
+	strheq	r2, [r4, #34]	@ movhi
+	.loc 3 183 0
+	mov	r2, #0
+.LVL25:
 .L17:
 	.loc 3 197 0 discriminator 3
-	strb	r3, [r3, r1]
+	strb	r2, [r2, ip]
 	.loc 3 196 0 discriminator 3
-	adds	r3, r3, #1
-	cmp	r3, #32
+	add	r2, r2, #1
+	cmp	r2, #32
 	bne	.L17
 	.loc 3 205 0
 	ldrh	r5, [r4, #18]
 	.loc 3 204 0
 	smulbb	r6, r6, r0
 	.loc 3 198 0
-	movs	r3, #5
-.LVL27:
+	mov	r2, #5
+.LVL26:
 	.loc 3 200 0
-	cmp	r2, #1
-	.loc 3 198 0
-	strh	r3, [r4, #68]	@ movhi
+	cmp	r1, #1
+	.loc 3 202 0
+	mov	ip, #640
 	.loc 3 204 0
 	uxth	r6, r6
-	.loc 3 199 0
-	mov	r3, #0
+	.loc 3 198 0
+	strh	r2, [r4, #68]	@ movhi
 	.loc 3 205 0
 	smulbb	r0, r0, r5
-	.loc 3 202 0
-	mov	r7, #640
-	.loc 3 201 0
-	it	eq
-	strheq	r2, [r4, #68]	@ movhi
 	.loc 3 199 0
-	strh	r3, [r4, #70]	@ movhi
+	mov	r2, #0
+	.loc 3 201 0
+	strheq	r1, [r4, #68]	@ movhi
+	.loc 3 202 0
+	strh	ip, [r4, #72]	@ movhi
 	.loc 3 205 0
 	uxth	r0, r0
 	.loc 3 202 0
-	strh	r7, [r4, #72]	@ movhi
+	str	ip, [fp, #-44]
+	.loc 3 199 0
+	strh	r2, [r4, #70]	@ movhi
 	.loc 3 204 0
 	strh	r6, [r4, #8]	@ movhi
 	.loc 3 205 0
 	strh	r0, [r4, #74]	@ movhi
 	.loc 3 206 0
 	bl	Ftl_log2
-.LVL28:
+.LVL27:
 	.loc 3 207 0
-	ldrh	r9, [fp, #12]
+	ldrh	r9, [r7, #12]
 	.loc 3 210 0
 	ldrh	r10, [r4, #34]
 	.loc 3 206 0
@@ -352,89 +350,91 @@ FtlConstantsInit:
 	.loc 3 207 0
 	strh	r9, [r4, #78]	@ movhi
 	.loc 3 209 0
-	smulbb	r3, r6, r9
+	smulbb	r2, r6, r9
 	.loc 3 210 0
 	mov	r0, r10
 	.loc 3 208 0
 	strh	r9, [r4, #80]	@ movhi
 	.loc 3 209 0
-	strh	r3, [r4, #82]	@ movhi
+	strh	r2, [r4, #82]	@ movhi
 	.loc 3 210 0
 	bl	Ftl_log2
-.LVL29:
+.LVL28:
+	.loc 3 214 0
+	ldrh	r3, [r7, #20]
 	.loc 3 212 0
-	lsl	r3, r10, #9
+	lsl	r2, r10, #9
 	.loc 3 210 0
 	mov	r8, r0
 	strh	r0, [r4, #84]	@ movhi
+	.loc 3 212 0
+	uxth	r2, r2
 	.loc 3 218 0
 	mul	r1, r9, r10
-	.loc 3 212 0
-	uxth	r3, r3
+	.loc 3 214 0
+	strh	r3, [r4, #90]	@ movhi
 	.loc 3 218 0
 	mov	r0, #5120
-	.loc 3 221 0
-	asr	r7, r7, r8
+	.loc 3 216 0
+	mul	r3, r5, r6
 	.loc 3 212 0
-	strh	r3, [r4, #86]	@ movhi
+	strh	r2, [r4, #86]	@ movhi
 	.loc 3 213 0
-	lsrs	r3, r3, #8
+	lsr	r2, r2, #8
 	.loc 3 223 0
-	add	r8, r8, #9
+	lsl	r5, r5, #6
 	.loc 3 213 0
-	strh	r3, [r4, #88]	@ movhi
-	.loc 3 221 0
-	adds	r7, r7, #2
-	.loc 3 214 0
-	ldrh	r3, [fp, #20]
-	strh	r3, [r4, #90]	@ movhi
-	.loc 3 216 0
-	mul	r3, r5, r6
-	.loc 3 223 0
-	lsls	r5, r5, #6
-	asr	r5, r5, r8
+	strh	r2, [r4, #88]	@ movhi
 	.loc 3 216 0
 	str	r3, [r4, #24]
 	.loc 3 217 0
 	mul	r3, r10, r3
 	mul	r3, r9, r3
-	asrs	r3, r3, #11
+	asr	r3, r3, #11
 	str	r3, [r4, #92]
 	.loc 3 218 0
-	bl	__aeabi_idiv
-.LVL30:
+	bl	__divsi3
+.LVL29:
+	ldr	ip, [fp, #-44]
 	uxth	r0, r0
-	.loc 3 223 0
-	strh	r5, [r4, #100]	@ movhi
-	uxth	r5, r5
 	.loc 3 226 0
 	mov	r1, r6
 	.loc 3 219 0
 	cmp	r0, #4
-	.loc 3 221 0
-	strh	r7, [r4, #98]	@ movhi
 	.loc 3 220 0
-	itet	ls
 	movls	r3, #4
 	.loc 3 218 0
 	strhhi	r0, [r4, #96]	@ movhi
+	.loc 3 221 0
+	asr	r7, ip, r8
+.LVL30:
+	.loc 3 223 0
+	add	r8, r8, #9
+	asr	r5, r5, r8
 	.loc 3 220 0
 	strhls	r3, [r4, #96]	@ movhi
+	.loc 3 221 0
+	add	r7, r7, #2
+	.loc 3 226 0
+	ldrh	r0, [r4, #96]
+	.loc 3 223 0
+	strh	r5, [r4, #100]	@ movhi
+	uxth	r5, r5
+	.loc 3 221 0
+	strh	r7, [r4, #98]	@ movhi
 	.loc 3 224 0
 	mul	r3, r6, r5
 	.loc 3 226 0
-	ldrh	r0, [r4, #96]
-	adds	r5, r5, #8
+	add	r5, r5, #8
 	.loc 3 224 0
 	str	r3, [r4, #104]
 	.loc 3 226 0
-	bl	__aeabi_uidiv
+	bl	__udivsi3
 .LVL31:
 	uxtah	r0, r5, r0
 	.loc 3 227 0
 	cmp	r6, #1
 	.loc 3 228 0
-	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4, #4]
 	.loc 3 231 0
@@ -444,1193 +444,1188 @@ FtlConstantsInit:
 	.loc 3 232 0
 	ldr	r3, [r4, #4]
 	.loc 3 236 0
-	movs	r0, #0
+	mov	r0, #0
 	str	r0, [r4, #116]
 	.loc 3 232 0
 	str	r3, [r4, #108]
 	.loc 3 234 0
 	ldr	r3, [r4, #20]
-	lsls	r2, r3, #2
+	lsl	r2, r3, #2
 	ldrh	r3, [r4, #78]
-	muls	r3, r2, r3
+	mul	r3, r3, r2
 	ldrh	r2, [r4, #84]
-	adds	r2, r2, #9
-	lsrs	r3, r3, r2
-	adds	r3, r3, #2
+	add	r2, r2, #9
+	lsr	r3, r3, r2
+	add	r3, r3, #2
 	strh	r3, [r4, #112]	@ movhi
 	.loc 3 235 0
-	movs	r3, #32
+	mov	r3, #32
 	strh	r3, [r4, #114]	@ movhi
 	.loc 3 237 0
 	ldrh	r3, [r4, #96]
-	adds	r3, r3, #3
+	add	r3, r3, #3
 	strh	r3, [r4, #96]	@ movhi
 	.loc 3 238 0
 	ldr	r3, [r4, #104]
-	adds	r3, r3, #3
+	add	r3, r3, #3
 	str	r3, [r4, #104]
 	.loc 3 263 0
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL33:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .L26:
 	.align	2
 .L25:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+36
 .LFE155:
-	.fnend
 	.size	FtlConstantsInit, .-FtlConstantsInit
-	.align	1
+	.align	2
 	.global	IsBlkInVendorPart
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	.fnstart
 .LFB158:
 	.loc 3 514 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL33:
+	mov	ip, sp
+.LCFI18:
+	push	{fp, ip, lr, pc}
+.LCFI19:
+	sub	fp, ip, #4
+.LCFI20:
+	.loc 3 517 0
+	ldr	r2, .L33
+	.loc 3 514 0
+	uxth	r1, r0
 .LVL34:
 	.loc 3 517 0
-	ldr	r2, .L34
-	ldrh	r3, [r2, #120]
-	cbz	r3, .L33
+	ldrh	r0, [r2, #120]
+	cmp	r0, #0
 .LBB222:
 .LBB223:
 	.loc 3 519 0
-	ldr	r3, [r2, #124]
-	ldrh	r2, [r2, #96]
-	add	r2, r3, r2, lsl #1
+	ldrne	r3, [r2, #124]
+	ldrhne	r2, [r2, #96]
+	addne	r2, r3, r2, lsl #1
+.LBE223:
+.LBE222:
+	.loc 3 517 0
+	bne	.L29
+	ldmfd	sp, {fp, sp, pc}
+.L30:
+.LBB226:
+.LBB224:
+	.loc 3 519 0
+	ldrh	r0, [r3], #2
+	cmp	r1, r0
+	beq	.L32
 .L29:
 	.loc 3 518 0
 	cmp	r3, r2
 	bne	.L30
-.L33:
-.LBE223:
-.LBE222:
+.LBE224:
+.LBE226:
 	.loc 3 524 0
-	movs	r0, #0
-.LVL35:
-	bx	lr
-.LVL36:
-.L30:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L32:
+.LBB227:
 .LBB225:
-.LBB224:
-	.loc 3 519 0
-	ldrh	r1, [r3], #2
-	cmp	r0, r1
-	bne	.L29
 	.loc 3 520 0
-	movs	r0, #1
-.LVL37:
-.LBE224:
+	mov	r0, #1
 .LBE225:
+.LBE227:
 	.loc 3 525 0
-	bx	lr
-.L35:
-	.align	2
+	ldmfd	sp, {fp, sp, pc}
 .L34:
+	.align	2
+.L33:
 	.word	.LANCHOR0
 .LFE158:
-	.fnend
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
-	.align	1
+	.align	2
 	.global	sftl_get_density
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_get_density, %function
 sftl_get_density:
-	.fnstart
 .LFB171:
 	.loc 3 1214 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI21:
+	push	{fp, ip, lr, pc}
+.LCFI22:
+	sub	fp, ip, #4
+.LCFI23:
 	.loc 3 1216 0
-	ldr	r3, .L37
+	ldr	r3, .L36
 	ldr	r0, [r3, #116]
-	bx	lr
-.L38:
-	.align	2
+	ldmfd	sp, {fp, sp, pc}
 .L37:
+	.align	2
+.L36:
 	.word	.LANCHOR0
 .LFE171:
-	.fnend
 	.size	sftl_get_density, .-sftl_get_density
-	.global	__aeabi_uidivmod
-	.align	1
+	.global	__umodsi3
+	.align	2
 	.global	FtlBbmMapBadBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-	.fnstart
 .LFB172:
 	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
 	.loc 4 5 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL38:
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.save {r4, r5, r6, r7, lr}
-	.pad #12
-.LCFI2:
-.LVL39:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL35:
+	mov	ip, sp
+.LCFI24:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI25:
+	sub	fp, ip, #4
+.LCFI26:
+	sub	sp, sp, #4
 	.loc 4 5 0
-	mov	r5, r0
+	uxth	r5, r0
+.LVL36:
 	.loc 4 10 0
-	ldr	r4, .L40
+	ldr	r4, .L39
+	mov	r0, r5
 	ldrh	r7, [r4, #74]
 	mov	r1, r7
-	bl	__aeabi_uidiv
-.LVL40:
+	bl	__udivsi3
+.LVL37:
 	uxth	r6, r0
-.LVL41:
+.LVL38:
 	mov	r1, r7
 	mov	r0, r5
-	bl	__aeabi_uidivmod
-.LVL42:
+	bl	__umodsi3
+.LVL39:
 	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
-	uxth	r3, r1
+	uxth	r3, r0
 	.loc 4 15 0
 	ldr	r2, [r2, #156]
-	lsrs	r1, r3, #5
-	and	r7, r3, #31
-	movs	r0, #1
-	lsls	r0, r0, r7
-	ldr	r7, [r2, r1, lsl #2]
-	orrs	r0, r0, r7
-	str	r0, [r2, r1, lsl #2]
+	lsr	r0, r3, #5
+	and	ip, r3, #31
+	mov	lr, #1
+	ldr	r1, [r2, r0, lsl #2]
+	orr	r1, r1, lr, lsl ip
+	str	r1, [r2, r0, lsl #2]
 	.loc 4 16 0
 	mov	r2, r6
-	str	r0, [sp]
+	str	r1, [sp]
 	mov	r1, r5
-	ldr	r0, .L40+4
+	ldr	r0, .L39+4
 	bl	printk
-.LVL43:
+.LVL40:
 	.loc 4 17 0
 	ldrh	r3, [r4, #134]
 	.loc 4 19 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 4 17 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #134]	@ movhi
 	.loc 4 19 0
-	add	sp, sp, #12
-.LCFI3:
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.LVL44:
-.L41:
-	.align	2
+	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L40:
+	.align	2
+.L39:
 	.word	.LANCHOR0
 	.word	.LC0
 .LFE172:
-	.fnend
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.align	1
+	.align	2
 	.global	FtlBbmIsBadBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	.fnstart
 .LFB173:
 	.loc 4 24 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL45:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI4:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL41:
+	mov	ip, sp
+.LCFI27:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI28:
+	sub	fp, ip, #4
+.LCFI29:
+	.loc 4 30 0
+	ldr	r5, .L42
 	.loc 4 24 0
-	mov	r7, r0
+	uxth	r6, r0
+.LVL42:
 	.loc 4 30 0
-	ldr	r5, .L43
-	ldrh	r6, [r5, #74]
+	ldrh	r7, [r5, #74]
 	.loc 4 31 0
-	mov	r1, r6
-	bl	__aeabi_uidivmod
-.LVL46:
+	mov	r0, r6
+	mov	r1, r7
+	bl	__umodsi3
+.LVL43:
 	.loc 4 30 0
-	mov	r0, r7
+	mov	r1, r7
 	.loc 4 31 0
-	uxth	r4, r1
-.LVL47:
+	uxth	r4, r0
+.LVL44:
 	.loc 4 30 0
-	mov	r1, r6
-	bl	__aeabi_uidiv
-.LVL48:
+	mov	r0, r6
+	bl	__udivsi3
+.LVL45:
 	uxth	r0, r0
-.LVL49:
+.LVL46:
 	.loc 4 34 0
-	lsrs	r2, r4, #5
+	lsr	r2, r4, #5
 	.loc 4 33 0
 	add	r5, r5, r0, lsl #2
 	.loc 4 34 0
 	and	r4, r4, #31
-.LVL50:
+.LVL47:
 	ldr	r3, [r5, #156]
 	ldr	r0, [r3, r2, lsl #2]
-.LVL51:
-	lsrs	r0, r0, r4
+.LVL48:
+	lsr	r0, r0, r4
 	.loc 4 36 0
 	and	r0, r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL52:
-.L44:
-	.align	2
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L43:
+	.align	2
+.L42:
 	.word	.LANCHOR0
 .LFE173:
-	.fnend
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
-	.align	1
+	.align	2
 	.global	FtlBbtInfoPrint
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-	.fnstart
 .LFB174:
 	.loc 4 39 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI30:
+	push	{fp, ip, lr, pc}
+.LCFI31:
+	sub	fp, ip, #4
+.LCFI32:
+	ldmfd	sp, {fp, sp, pc}
 .LFE174:
-	.fnend
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.align	1
+	.align	2
 	.global	FtlBbtMemInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	.fnstart
 .LFB177:
 	.loc 4 149 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	.loc 4 149 0
+	mov	ip, sp
+.LCFI33:
+	push	{fp, ip, lr, pc}
+.LCFI34:
+	sub	fp, ip, #4
+.LCFI35:
 	.loc 4 150 0
-	ldr	r0, .L47
-	movw	r3, #65535
-.LBB231:
-.LBB232:
+	ldr	r0, .L46
+	mvn	r3, #0
 .LBB233:
+.LBB234:
+.LBB235:
 	.loc 1 202 0
-	movs	r2, #16
-	movs	r1, #255
+	mov	r2, #16
+	mov	r1, #255
+.LBE235:
+.LBE234:
 .LBE233:
-.LBE232:
-.LBE231:
 	.loc 4 150 0
 	strh	r3, [r0, #128]	@ movhi
 	.loc 4 151 0
-	movs	r3, #0
+	mov	r3, #0
 	strh	r3, [r0, #134]	@ movhi
+.LBB238:
+.LBB237:
 .LBB236:
-.LBB235:
-.LBB234:
 	.loc 1 202 0
-	adds	r0, r0, #140
-	b	memset
-.LVL53:
-.L48:
-	.align	2
+	add	r0, r0, #140
+	bl	memset
+.LVL49:
+	ldmfd	sp, {fp, sp, pc}
 .L47:
+	.align	2
+.L46:
 	.word	.LANCHOR0
-.LBE234:
-.LBE235:
 .LBE236:
+.LBE237:
+.LBE238:
 .LFE177:
-	.fnend
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.align	1
+	.align	2
 	.global	FtlBbtCalcTotleCnt
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-	.fnstart
 .LFB178:
 	.loc 4 157 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 160 0
-	ldr	r3, .L56
-	.loc 4 157 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI5:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI36:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI37:
+	sub	fp, ip, #4
+.LCFI38:
 	.loc 4 160 0
-	movs	r5, #0
+	ldr	r3, .L55
+	mov	r5, #0
 	.loc 4 159 0
 	mov	r4, r5
 	.loc 4 160 0
 	ldrh	r2, [r3, #74]
 	ldrh	r6, [r3, #30]
-	muls	r6, r2, r6
-.L50:
-	uxth	r0, r5
-.LVL54:
+	mul	r6, r6, r2
+.L49:
 	.loc 4 160 0 is_stmt 0 discriminator 1
+	uxth	r0, r5
 	cmp	r0, r6
-.LVL55:
-	blt	.L52
+	blt	.L51
 	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L52:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L51:
 	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL56:
-	cbz	r0, .L51
+.LVL50:
+	cmp	r0, #0
+	add	r5, r5, #1
 	.loc 4 164 0
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L51:
-	adds	r5, r5, #1
-	b	.L50
-.L57:
-	.align	2
+	addne	r4, r4, #1
+	uxthne	r4, r4
+	b	.L49
 .L56:
+	.align	2
+.L55:
 	.word	.LANCHOR0
 .LFE178:
-	.fnend
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
-	.align	1
+	.align	2
 	.global	V2P_block
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-	.fnstart
 .LFB182:
 	.loc 2 5 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL57:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI6:
-	.loc 2 5 0
-	mov	r5, r1
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL51:
+	mov	ip, sp
+.LCFI39:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI40:
+	sub	fp, ip, #4
+.LCFI41:
 	.loc 2 8 0
-	ldr	r4, .L59
+	ldr	r4, .L58
 	.loc 2 5 0
-	mov	r7, r0
+	uxth	r7, r0
+.LVL52:
+	uxth	r5, r1
+.LVL53:
 	.loc 2 8 0
 	ldrh	r6, [r4, #32]
+	mov	r0, r7
 	mov	r1, r6
-.LVL58:
-	bl	__aeabi_uidiv
-.LVL59:
+	bl	__udivsi3
+.LVL54:
 	ldrh	r4, [r4, #74]
 	smulbb	r5, r6, r5
-.LVL60:
+.LVL55:
 	mov	r1, r6
 	smulbb	r4, r4, r0
 	mov	r0, r7
-	bl	__aeabi_uidivmod
-.LVL61:
-	adds	r0, r5, r1
-	add	r0, r0, r4
+	bl	__umodsi3
+.LVL56:
+	add	r0, r5, r0
+	add	r0, r4, r0
 	.loc 2 10 0
 	uxth	r0, r0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL62:
-.L60:
-	.align	2
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L59:
+	.align	2
+.L58:
 	.word	.LANCHOR0
 .LFE182:
-	.fnend
 	.size	V2P_block, .-V2P_block
-	.align	1
+	.align	2
 	.global	P2V_plane
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-	.fnstart
 .LFB183:
 	.loc 2 13 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL63:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL57:
+	mov	ip, sp
+.LCFI42:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI43:
+	sub	fp, ip, #4
+.LCFI44:
 	.loc 2 16 0
-	ldr	r3, .L62
-	.loc 2 13 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI7:
+	ldr	r3, .L61
 	.loc 2 13 0
-	mov	r6, r0
+	uxth	r5, r0
+.LVL58:
 	.loc 2 16 0
-	ldrh	r5, [r3, #32]
+	ldrh	r6, [r3, #32]
+	mov	r0, r5
 	ldrh	r1, [r3, #74]
-	bl	__aeabi_uidiv
-.LVL64:
-	mov	r1, r5
-	smulbb	r4, r0, r5
-	mov	r0, r6
-	bl	__aeabi_uidivmod
-.LVL65:
-	add	r1, r1, r4
+	bl	__udivsi3
+.LVL59:
+	mov	r1, r6
+	smulbb	r4, r0, r6
+	mov	r0, r5
+	bl	__umodsi3
+.LVL60:
+	add	r0, r4, r0
 	.loc 2 18 0
-	uxth	r0, r1
-	pop	{r4, r5, r6, pc}
-.LVL66:
-.L63:
-	.align	2
+	uxth	r0, r0
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
 .L62:
+	.align	2
+.L61:
 	.word	.LANCHOR0
 .LFE183:
-	.fnend
 	.size	P2V_plane, .-P2V_plane
-	.align	1
+	.align	2
 	.global	P2V_block_in_plane
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-	.fnstart
 .LFB184:
 	.loc 2 21 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL67:
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI8:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL61:
+	mov	ip, sp
+.LCFI45:
+	push	{r4, fp, ip, lr, pc}
+.LCFI46:
+	sub	fp, ip, #4
+.LCFI47:
 	.loc 2 24 0
-	ldr	r4, .L65
+	ldr	r4, .L64
+	uxth	r0, r0
+.LVL62:
 	ldrh	r1, [r4, #74]
-	bl	__aeabi_uidivmod
-.LVL68:
-	uxth	r0, r1
+	bl	__umodsi3
+.LVL63:
 	.loc 2 25 0
 	ldrh	r1, [r4, #32]
-	bl	__aeabi_uidiv
-.LVL69:
+	uxth	r0, r0
+	bl	__udivsi3
+.LVL64:
 	.loc 2 27 0
 	uxth	r0, r0
-	pop	{r4, pc}
-.L66:
-	.align	2
+	ldmfd	sp, {r4, fp, sp, pc}
 .L65:
+	.align	2
+.L64:
 	.word	.LANCHOR0
 .LFE184:
-	.fnend
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
-	.align	1
+	.align	2
 	.global	ftl_cmp_data_ver
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-	.fnstart
 .LFB185:
 	.loc 2 31 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL70:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL65:
+	mov	ip, sp
+.LCFI48:
+	push	{fp, ip, lr, pc}
+.LCFI49:
+	sub	fp, ip, #4
+.LCFI50:
 	.loc 2 34 0
 	cmp	r0, r1
-	bls	.L68
+	bls	.L67
 	.loc 2 36 0
-	subs	r0, r0, r1
-.LVL71:
+	sub	r0, r0, r1
+.LVL66:
 	cmp	r0, #-2147483648
-	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
-	bx	lr
-.LVL72:
-.L68:
+	ldmfd	sp, {fp, sp, pc}
+.LVL67:
+.L67:
 	.loc 2 40 0
-	subs	r0, r1, r0
-.LVL73:
+	sub	r0, r1, r0
+.LVL68:
 	cmp	r0, #-2147483648
-	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
 	.loc 2 44 0
-	bx	lr
+	ldmfd	sp, {fp, sp, pc}
 .LFE185:
-	.fnend
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.align	1
+	.align	2
 	.global	FtlFreeSysBlkQueueInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-	.fnstart
 .LFB187:
 	.loc 2 76 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL74:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL69:
+	mov	ip, sp
+.LCFI51:
+	push	{r4, fp, ip, lr, pc}
+.LCFI52:
+	sub	fp, ip, #4
+.LCFI53:
 	.loc 2 79 0
-	ldr	r3, .L71
-.LBB242:
-.LBB243:
+	ldr	r3, .L70
+	mov	r4, #0
 .LBB244:
+.LBB245:
+.LBB246:
 	.loc 1 202 0
 	mov	r1, #2048
+.LBE246:
+.LBE245:
 .LBE244:
-.LBE243:
-.LBE242:
-	.loc 2 76 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI9:
-	.loc 2 79 0
-	movs	r4, #0
 	.loc 2 82 0
 	strh	r0, [r3, #188]	@ movhi
+.LBB251:
 .LBB249:
 .LBB247:
-.LBB245:
 	.loc 1 202 0
 	add	r0, r3, #196
-.LVL75:
-.LBE245:
+.LVL70:
 .LBE247:
 .LBE249:
+.LBE251:
 	.loc 2 79 0
 	strh	r4, [r3, #190]	@ movhi
 	.loc 2 80 0
 	strh	r4, [r3, #192]	@ movhi
 	.loc 2 81 0
 	strh	r4, [r3, #194]	@ movhi
+.LBB252:
 .LBB250:
 .LBB248:
-.LBB246:
 	.loc 1 202 0
 	bl	__memzero
-.LVL76:
-.LBE246:
+.LVL71:
 .LBE248:
 .LBE250:
+.LBE252:
 	.loc 2 85 0
 	mov	r0, r4
-	pop	{r4, pc}
-.L72:
-	.align	2
+	ldmfd	sp, {r4, fp, sp, pc}
 .L71:
+	.align	2
+.L70:
 	.word	.LANCHOR0
 .LFE187:
-	.fnend
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.align	1
+	.align	2
 	.global	FtlFreeSysBlkQueueEmpty
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	.fnstart
 .LFB188:
 	.loc 2 88 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI54:
+	push	{fp, ip, lr, pc}
+.LCFI55:
+	sub	fp, ip, #4
+.LCFI56:
 	.loc 2 89 0
-	ldr	r3, .L74
+	ldr	r3, .L73
 	ldrh	r0, [r3, #194]
 	.loc 2 90 0
 	clz	r0, r0
-	lsrs	r0, r0, #5
-	bx	lr
-.L75:
-	.align	2
+	lsr	r0, r0, #5
+	ldmfd	sp, {fp, sp, pc}
 .L74:
+	.align	2
+.L73:
 	.word	.LANCHOR0
 .LFE188:
-	.fnend
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
-	.align	1
+	.align	2
 	.global	FtlFreeSysBlkQueueFull
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	.fnstart
 .LFB189:
 	.loc 2 93 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI57:
+	push	{fp, ip, lr, pc}
+.LCFI58:
+	sub	fp, ip, #4
+.LCFI59:
 	.loc 2 94 0
-	ldr	r3, .L77
+	ldr	r3, .L76
 	ldrh	r0, [r3, #194]
 	.loc 2 95 0
-	sub	r3, r0, #1024
-	rsbs	r0, r3, #0
-	adcs	r0, r0, r3
-	bx	lr
-.L78:
-	.align	2
+	sub	r0, r0, #1024
+	clz	r0, r0
+	lsr	r0, r0, #5
+	ldmfd	sp, {fp, sp, pc}
 .L77:
+	.align	2
+.L76:
 	.word	.LANCHOR0
 .LFE189:
-	.fnend
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
-	.align	1
+	.align	2
 	.global	FtlFreeSysBLkSort
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	.fnstart
 .LFB191:
 	.loc 2 118 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 2 123 0
-	ldr	r3, .L88
-	.loc 2 118 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI10:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI60:
+	push	{r4, fp, ip, lr, pc}
+.LCFI61:
+	sub	fp, ip, #4
+.LCFI62:
 	.loc 2 123 0
+	ldr	r3, .L87
 	ldrh	r2, [r3, #194]
-	cbz	r2, .L79
+	cmp	r2, #0
+	ldmfdeq	sp, {r4, fp, sp, pc}
 	.loc 2 119 0
-	ldrh	r5, [r3, #2272]
-	movs	r0, #0
+	ldr	r2, .L87+4
+	mov	r4, #0
 	ldrh	r1, [r3, #190]
-	mov	r6, r0
+	mov	lr, r4
+	ldrh	ip, [r2, #28]
 	ldrh	r2, [r3, #192]
-	and	r5, r5, #31
-.LVL77:
-.L81:
+	and	ip, ip, #31
+.LVL72:
+.L80:
 	.loc 2 124 0 discriminator 1
-	uxth	r4, r0
-	adds	r0, r0, #1
-	cmp	r5, r4
-	bgt	.L82
-	cbz	r6, .L79
-	strh	r1, [r3, #190]	@ movhi
-	strh	r2, [r3, #192]	@ movhi
-.L79:
-	pop	{r4, r5, r6, pc}
-.LVL78:
-.L82:
+	uxth	r0, r4
+	add	r4, r4, #1
+	cmp	ip, r0
+	bgt	.L81
+	cmp	lr, #0
+	strhne	r1, [r3, #190]	@ movhi
+	strhne	r2, [r3, #192]	@ movhi
+	ldmfd	sp, {r4, fp, sp, pc}
+.L81:
 	.loc 2 125 0 discriminator 3
-	add	r4, r3, r1, lsl #1
+	add	r0, r3, r1, lsl #1
 	.loc 2 126 0 discriminator 3
-	adds	r1, r1, #1
+	add	r1, r1, #1
 	ubfx	r1, r1, #0, #10
 	.loc 2 125 0 discriminator 3
-	ldrh	r6, [r4, #196]
-.LVL79:
+	ldrh	lr, [r0, #196]
+.LVL73:
 	.loc 2 127 0 discriminator 3
-	add	r4, r3, r2, lsl #1
-	strh	r6, [r4, #196]	@ movhi
-	movs	r6, #1
-.LVL80:
+	add	r0, r3, r2, lsl #1
+	strh	lr, [r0, #196]	@ movhi
+	mov	lr, #1
+.LVL74:
 	.loc 2 128 0 discriminator 3
-	add	r2, r2, r6
+	add	r2, r2, lr
 	ubfx	r2, r2, #0, #10
-	b	.L81
-.L89:
-	.align	2
+	b	.L80
 .L88:
+	.align	2
+.L87:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2244
 .LFE191:
-	.fnend
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.align	1
+	.align	2
 	.global	IsInFreeQueue
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-	.fnstart
 .LFB192:
 	.loc 2 163 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL81:
-.LBB251:
-.LBB252:
-	.loc 2 94 0
-	ldr	r3, .L96
-.LBE252:
-.LBE251:
-	.loc 2 163 0
-	push	{r4, r5, lr}
-	.save {r4, r5, lr}
-.LCFI11:
-.LBB254:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL75:
+	mov	ip, sp
+.LCFI63:
+	push	{fp, ip, lr, pc}
+.LCFI64:
+	sub	fp, ip, #4
+.LCFI65:
 .LBB253:
+.LBB254:
 	.loc 2 94 0
-	ldrh	r4, [r3, #194]
-.LBE253:
+	ldr	r3, .L95
 .LBE254:
+.LBE253:
+	.loc 2 163 0
+	uxth	r0, r0
+.LBB256:
+.LBB255:
+	.loc 2 94 0
+	ldrh	ip, [r3, #194]
+.LBE255:
+.LBE256:
 	.loc 2 168 0
-	cmp	r4, #1024
-	beq	.L94
+	cmp	ip, #1024
 	.loc 2 171 0
-	ldrh	r5, [r3, #190]
-	movs	r1, #0
-.LVL82:
-.L92:
-	.loc 2 170 0 discriminator 1
-	cmp	r1, r4
-	bcc	.L93
-.L94:
-	.loc 2 164 0
-	movs	r0, #0
-.LVL83:
-	pop	{r4, r5, pc}
-.LVL84:
+	ldrhne	lr, [r3, #190]
+	movne	r1, #0
+.LVL76:
+	.loc 2 168 0
+	bne	.L91
 .L93:
+	.loc 2 164 0
+	mov	r0, #0
+.LVL77:
+	ldmfd	sp, {fp, sp, pc}
+.LVL78:
+.L92:
 	.loc 2 171 0
-	adds	r2, r1, r5
+	add	r2, r1, lr
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
 	ldrh	r2, [r2, #196]
 	cmp	r2, r0
-	beq	.L95
+	beq	.L94
 	.loc 2 170 0 discriminator 2
-	adds	r1, r1, #1
-	b	.L92
-.L95:
-	.loc 2 172 0
-	movs	r0, #1
-.LVL85:
+	add	r1, r1, #1
+.L91:
+	.loc 2 170 0 is_stmt 0 discriminator 1
+	cmp	r1, ip
+	bcc	.L92
+	b	.L93
+.L94:
+	.loc 2 172 0 is_stmt 1
+	mov	r0, #1
+.LVL79:
 	.loc 2 178 0
-	pop	{r4, r5, pc}
-.L97:
-	.align	2
+	ldmfd	sp, {fp, sp, pc}
 .L96:
+	.align	2
+.L95:
 	.word	.LANCHOR0
 .LFE192:
-	.fnend
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.align	1
+	.align	2
 	.global	insert_data_list
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-	.fnstart
 .LFB196:
 	.loc 2 249 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL86:
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI12:
-.LVL87:
+	@ args = 0, pretend = 0, frame = 12
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL80:
+	mov	ip, sp
+.LCFI66:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI67:
+	sub	fp, ip, #4
+.LCFI68:
+	sub	sp, sp, #12
+	.loc 2 249 0
+	uxth	r0, r0
 	.loc 2 260 0
-	ldr	r2, .L113
-	ldrh	r3, [r2, #16]
-	mov	r5, r2
-.LVL88:
+	ldr	r1, .L113
+	ldrh	r3, [r1, #16]
+	mov	lr, r1
 	cmp	r3, r0
-	bls	.L100
-.LBB257:
-.LBB258:
+	bls	.L99
+.LBB259:
+.LBB260:
 	.loc 2 265 0
-	movs	r4, #6
-	ldr	ip, [r2, #2292]
-	muls	r4, r0, r4
+	ldr	r6, [r1, #2292]
+	lsl	r5, r0, #3
 	.loc 2 266 0
-	movw	r3, #65535
+	mvn	ip, #0
 	.loc 2 265 0
-	add	r1, ip, r4
-.LVL89:
+	add	r2, r6, r5
+.LVL81:
 	.loc 2 266 0
-	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [ip, r4]	@ movhi
+	strh	ip, [r2, #2]	@ movhi
+	strh	ip, [r6, r5]	@ movhi
 	.loc 2 268 0
-	ldr	r3, [r2, #2296]
-.LVL90:
-	cbnz	r3, .L101
-	.loc 2 269 0
-	str	r1, [r2, #2296]
-.LVL91:
+	ldr	r3, [r1, #2296]
+.LVL82:
+	cmp	r3, #0
+	bne	.L100
+.LVL83:
+.L112:
+	.loc 2 317 0
+	str	r2, [r1, #2296]
+	b	.L99
+.LVL84:
 .L100:
-.LBE258:
-.LBE257:
-	.loc 2 323 0
-	movs	r0, #0
-.LVL92:
-	add	sp, sp, #12
-.LCFI13:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL93:
-.L101:
-.LCFI14:
-.LBB260:
-.LBB259:
+	.loc 2 273 0
+	ldr	r7, [r1, #2300]
+	lsl	r4, r0, #1
 	.loc 2 274 0
-	ldrh	r6, [r1, #4]
+	ldrh	r1, [r2, #4]
+	.loc 2 279 0
+	ldr	r10, [lr, #2292]
 	.loc 2 273 0
-	lsl	r10, r0, #1
-	ldr	r8, [r2, #2300]
-	ldrh	r2, [r8, r0, lsl #1]
-.LVL94:
+	ldrh	r8, [r7, r4]
+.LVL85:
 	.loc 2 275 0
-	cmp	r6, #0
-	beq	.L111
+	cmp	r1, #0
+	.loc 2 276 0
+	streq	ip, [fp, #-44]
 	.loc 2 274 0
-	muls	r6, r2, r6
-.LVL95:
-.L102:
-	.loc 2 279 0
-	ldr	lr, [r5, #2292]
+	mulne	r1, r1, r8
+.LVL86:
 	.loc 2 282 0
-	ldrh	r7, [r5, #16]
-	.loc 2 279 0
-	sub	r2, r3, lr
-.LVL96:
-	asr	r9, r2, #1
-	ldr	r2, .L113+4
-	.loc 2 282 0
-	str	r7, [sp]
-	.loc 2 279 0
-	mul	r2, r2, r9
+	ldrh	r8, [lr, #16]
+.LVL87:
+	str	r8, [fp, #-48]
 	.loc 2 294 0
-	ldr	r9, [r5, #2304]
-	add	r5, r9, r10
+	ldr	r8, [lr, #2304]
+	.loc 2 274 0
+	strne	r1, [fp, #-44]
 	.loc 2 279 0
-	uxth	r2, r2
+	sub	r1, r3, r10
+.LVL88:
+	ubfx	r1, r1, #3, #16
 	.loc 2 294 0
-	str	r5, [sp, #4]
+	add	lr, r8, r4
+	str	lr, [fp, #-52]
 	.loc 2 256 0
-	movs	r5, #0
-.LVL97:
-.L109:
-	.loc 2 281 0
-	adds	r5, r5, #1
-.LVL98:
+	mov	lr, #0
+.LVL89:
+.L108:
 	.loc 2 282 0
-	ldr	r7, [sp]
+	ldr	r4, [fp, #-48]
 	.loc 2 281 0
-	uxth	r5, r5
-.LVL99:
+	add	lr, lr, #1
+.LVL90:
+	uxth	lr, lr
+.LVL91:
 	.loc 2 282 0
-	cmp	r5, r7
-	bhi	.L100
+	cmp	lr, r4
+	movls	r4, #0
+	movhi	r4, #1
 	.loc 2 285 0
-	cmp	r0, r2
-	beq	.L100
-	.loc 2 289 0
-	ldrh	r7, [r3, #4]
+	cmp	r0, r1
+	orreq	r4, r4, #1
+	cmp	r4, #0
+	bne	.L99
 	.loc 2 288 0
-	lsl	r10, r2, #1
-	ldrh	fp, [r8, r2, lsl #1]
+	lsl	r9, r1, #1
+	ldrh	r4, [r7, r9]
+.LVL92:
+	mov	ip, r4
+	.loc 2 289 0
+	ldrh	r4, [r3, #4]
+.LVL93:
 	.loc 2 290 0
-	cbz	r7, .L112
+	cmp	r4, #0
 	.loc 2 289 0
-	mul	r7, r7, fp
-.LVL100:
-.L104:
+	mulne	r4, r4, ip
+.LVL94:
+	.loc 2 293 0
+	ldr	ip, [fp, #-44]
+.LVL95:
+	.loc 2 291 0
+	mvneq	r4, #0
 	.loc 2 293 0
-	cmp	r6, r7
-	bne	.L105
+	cmp	ip, r4
+	bne	.L104
 	.loc 2 294 0
-	ldr	r7, [sp, #4]
-.LVL101:
-	ldrh	r10, [r9, r10]
-	ldrh	r7, [r7]
-	cmp	r10, r7
-	bcc	.L107
-.LVL102:
-.L106:
+	ldr	ip, [fp, #-52]
+.LVL96:
+	ldrh	r9, [r8, r9]
+	ldrh	r4, [ip]
+.LVL97:
+	cmp	r9, r4
+	bcc	.L106
+.LVL98:
+.L105:
 	.loc 2 312 0
-	strh	r2, [ip, r4]	@ movhi
-	.loc 2 315 0
-	ldr	r4, .L113
+	strh	r1, [r6, r5]	@ movhi
 	.loc 2 313 0
-	ldrh	r2, [r3, #2]
-	strh	r2, [r1, #2]	@ movhi
+	ldrh	r1, [r3, #2]
+	strh	r1, [r2, #2]	@ movhi
 	.loc 2 315 0
-	ldr	r2, [r4, #2296]
-	cmp	r3, r2
-	.loc 2 319 0
-	ittte	ne
-	ldrhne	r5, [r3, #2]
-.LVL103:
-	movne	r2, #6
-	ldrne	r1, [r4, #2292]
-.LVL104:
+	ldr	r1, .L113
+	ldr	ip, [r1, #2296]
+.LVL99:
+	cmp	r3, ip
+	bne	.L109
 	.loc 2 316 0
-	strheq	r0, [r3, #2]	@ movhi
-.LVL105:
-	.loc 2 317 0
-	iteee	eq
-	streq	r1, [r4, #2296]
-	.loc 2 319 0
-	mulne	r2, r2, r5
-	strhne	r0, [r1, r2]	@ movhi
-.LVL106:
-	.loc 2 320 0
-	strhne	r0, [r3, #2]	@ movhi
-	b	.L100
-.LVL107:
-.L111:
-	.loc 2 276 0
-	mov	r6, #-1
-.LVL108:
-	b	.L102
-.LVL109:
-.L112:
-	.loc 2 291 0
-	mov	r7, #-1
-.LVL110:
-	b	.L104
-.L105:
+	strh	r0, [r3, #2]	@ movhi
+	b	.L112
+.LVL100:
+.L104:
 	.loc 2 298 0
-	bcc	.L106
-.L107:
+	bcc	.L105
+.L106:
 	.loc 2 301 0
-	ldrh	r7, [r3]
-.LVL111:
-	movw	r10, #65535
-	cmp	r7, r10
-	bne	.L108
+	ldrh	r4, [r3]
+.LVL101:
+	movw	ip, #65535
+.LVL102:
+	cmp	r4, ip
+	bne	.L107
 	.loc 2 302 0
-	strh	r2, [r1, #2]	@ movhi
+	strh	r1, [r2, #2]	@ movhi
 	.loc 2 303 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 304 0
 	ldr	r3, .L113
-.LVL112:
-	str	r1, [r3, #2308]
-	b	.L100
-.LVL113:
-.L108:
+.LVL103:
+	str	r2, [r3, #2308]
+.LVL104:
+.L99:
+.LBE260:
+.LBE259:
+	.loc 2 323 0
+	mov	r0, #0
+.LVL105:
+	sub	sp, fp, #40
+.LCFI69:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL106:
+.L107:
+.LCFI70:
+.LBB262:
+.LBB261:
 	.loc 2 309 0
-	movs	r3, #6
-.LVL114:
-	mov	r2, r7
-	mla	r3, r3, r7, lr
-.LVL115:
-	b	.L109
+	add	r3, r10, r4, lsl #3
+	mov	r1, r4
+	b	.L108
+.LVL107:
+.L109:
+	.loc 2 319 0
+	ldrh	r2, [r3, #2]
+.LVL108:
+	ldr	r1, [r1, #2292]
+	lsl	r2, r2, #3
+	strh	r0, [r1, r2]	@ movhi
+	.loc 2 320 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L99
 .L114:
 	.align	2
 .L113:
 	.word	.LANCHOR0
-	.word	-1431655765
-.LBE259:
-.LBE260:
+.LBE261:
+.LBE262:
 .LFE196:
-	.fnend
 	.size	insert_data_list, .-insert_data_list
-	.align	1
+	.align	2
 	.global	INSERT_DATA_LIST
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-	.fnstart
 .LFB195:
 	.loc 2 218 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL116:
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI15:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL109:
+	mov	ip, sp
+.LCFI71:
+	push	{fp, ip, lr, pc}
+.LCFI72:
+	sub	fp, ip, #4
+.LCFI73:
 	.loc 2 219 0
+	uxth	r0, r0
+.LVL110:
 	bl	insert_data_list
-.LVL117:
+.LVL111:
 	.loc 2 220 0
 	ldr	r2, .L117
-	ldrh	r3, [r2, #2312]
-	adds	r3, r3, #1
+	movw	r1, #2312
+	ldrh	r3, [r2, r1]
+	add	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #2312]	@ movhi
+	strh	r3, [r2, r1]	@ movhi
 	.loc 2 221 0
 	ldrh	r2, [r2, #16]
 	cmp	r2, r3
-	bcs	.L115
-.LBB263:
-.LBB264:
-	movs	r2, #221
+	ldmfdcs	sp, {fp, sp, pc}
+.LBB265:
+.LBB266:
+	mov	r2, #221
 	ldr	r1, .L117+4
 	ldr	r0, .L117+8
-.LBE264:
-.LBE263:
-	.loc 2 222 0
-	pop	{r3, lr}
-.LCFI16:
-.LBB266:
-.LBB265:
-	.loc 2 221 0
-	b	printk
-.LVL118:
-.L115:
-.LCFI17:
-	pop	{r3, pc}
+	bl	printk
+.LVL112:
+	ldmfd	sp, {fp, sp, pc}
 .L118:
 	.align	2
 .L117:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
-.LBE265:
 .LBE266:
+.LBE265:
 .LFE195:
-	.fnend
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
-	.align	1
+	.align	2
 	.global	insert_free_list
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-	.fnstart
 .LFB197:
 	.loc 2 326 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL119:
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI18:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL113:
+	mov	ip, sp
+.LCFI74:
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+.LCFI75:
+	sub	fp, ip, #4
+.LCFI76:
+	.loc 2 326 0
+	uxth	r0, r0
 	.loc 2 332 0
-	movw	r4, #65535
-	cmp	r0, r4
+	movw	lr, #65535
+	cmp	r0, lr
 	beq	.L120
 	.loc 2 335 0
 	ldr	r2, .L126
-	movs	r1, #6
-	mul	r7, r1, r0
-	ldr	ip, [r2, #2292]
-	mov	r5, r2
-	add	r6, ip, r7
-.LVL120:
+	lsl	r5, r0, #3
 	.loc 2 336 0
-	strh	r4, [r6, #2]	@ movhi
-	strh	r4, [ip, r7]	@ movhi
+	mvn	r3, #0
+	.loc 2 335 0
+	ldr	r6, [r2, #2292]
+	mov	r1, r2
+	add	ip, r6, r5
+.LVL114:
+	.loc 2 336 0
+	strh	r3, [ip, #2]	@ movhi
+	strh	r3, [r6, r5]	@ movhi
 	.loc 2 338 0
 	ldr	r3, [r2, #2316]
-.LVL121:
-	cbnz	r3, .L121
+.LVL115:
+	cmp	r3, #0
 	.loc 2 339 0
-	str	r6, [r2, #2316]
-.LVL122:
-.L120:
-	.loc 2 372 0
-	movs	r0, #0
-.LVL123:
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL124:
-.L121:
-	.loc 2 345 0
-	ldr	lr, [r2, #2292]
+	streq	ip, [r2, #2316]
+	.loc 2 338 0
+	beq	.L120
 	.loc 2 343 0
 	ldr	r8, [r2, #2304]
+	lsl	r2, r0, #1
 	.loc 2 345 0
-	sub	r2, r3, lr
-	asr	r10, r2, #1
-	ldr	r2, .L126+4
-	.loc 2 343 0
-	ldrh	r9, [r8, r0, lsl #1]
-.LVL125:
-	.loc 2 345 0
-	mul	r2, r2, r10
+	ldr	r7, [r1, #2292]
 	.loc 2 352 0
-	mov	r10, r4
+	mov	r4, lr
+	.loc 2 343 0
+	ldrh	r9, [r8, r2]
+.LVL116:
 	.loc 2 345 0
-	uxth	r2, r2
+	sub	r2, r3, r7
+	ubfx	r2, r2, #3, #16
 .L124:
+	.loc 2 348 0
+	lsl	lr, r2, #1
 	.loc 2 349 0
-	ldrh	r4, [r8, r2, lsl #1]
-	cmp	r4, r9
+	ldrh	lr, [r8, lr]
+	cmp	lr, r9
 	bcs	.L122
 	.loc 2 352 0
-	ldrh	r4, [r3]
-	cmp	r4, r10
+	ldrh	lr, [r3]
+	cmp	lr, r4
 	bne	.L123
 	.loc 2 353 0
-	strh	r2, [r6, #2]	@ movhi
+	strh	r2, [ip, #2]	@ movhi
 	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 355 0
-	b	.L120
+.L120:
+	.loc 2 372 0
+	mov	r0, #0
+.LVL117:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+.LVL118:
 .L123:
 	.loc 2 358 0
-	mla	r3, r1, r4, lr
+	add	r3, r7, lr, lsl #3
 	.loc 2 348 0
-	mov	r2, r4
+	mov	r2, lr
 	b	.L124
 .L122:
 	.loc 2 361 0
-	ldrh	r1, [r3, #2]
-	strh	r1, [r6, #2]	@ movhi
+	ldrh	lr, [r3, #2]
+	strh	lr, [ip, #2]	@ movhi
 	.loc 2 362 0
-	strh	r2, [ip, r7]	@ movhi
+	strh	r2, [r6, r5]	@ movhi
 	.loc 2 364 0
-	ldr	r2, [r5, #2316]
+	ldr	r2, [r1, #2316]
 	cmp	r3, r2
 	.loc 2 368 0
-	ittte	ne
-	ldrhne	r4, [r3, #2]
-	movne	r2, #6
-	ldrne	r1, [r5, #2292]
+	ldrhne	r2, [r3, #2]
+	ldrne	r1, [r1, #2292]
 	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
 	.loc 2 366 0
-	iteee	eq
-	streq	r6, [r5, #2316]
+	streq	ip, [r1, #2316]
 	.loc 2 368 0
-	mulne	r2, r2, r4
+	lslne	r2, r2, #3
 	strhne	r0, [r1, r2]	@ movhi
 	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
@@ -1639,98 +1634,95 @@ insert_free_list:
 	.align	2
 .L126:
 	.word	.LANCHOR0
-	.word	-1431655765
 .LFE197:
-	.fnend
 	.size	insert_free_list, .-insert_free_list
-	.align	1
+	.align	2
 	.global	INSERT_FREE_LIST
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-	.fnstart
 .LFB194:
 	.loc 2 211 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL126:
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI19:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL119:
+	mov	ip, sp
+.LCFI77:
+	push	{fp, ip, lr, pc}
+.LCFI78:
+	sub	fp, ip, #4
+.LCFI79:
 	.loc 2 212 0
+	uxth	r0, r0
+.LVL120:
 	bl	insert_free_list
-.LVL127:
+.LVL121:
 	.loc 2 213 0
 	ldr	r2, .L130
-	ldrh	r3, [r2, #2320]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r2, #2320]	@ movhi
+	add	r1, r2, #2320
 	.loc 2 214 0
 	ldrh	r2, [r2, #16]
+	.loc 2 213 0
+	ldrh	r3, [r1]
+	add	r3, r3, #1
+	uxth	r3, r3
+	.loc 2 214 0
 	cmp	r2, r3
-	bcs	.L128
+	.loc 2 213 0
+	strh	r3, [r1]	@ movhi
+	.loc 2 214 0
+	ldmfdcs	sp, {fp, sp, pc}
 .LBB269:
 .LBB270:
-	movs	r2, #214
+	mov	r2, #214
 	ldr	r1, .L130+4
 	ldr	r0, .L130+8
-.LBE270:
-.LBE269:
-	.loc 2 215 0
-	pop	{r3, lr}
-.LCFI20:
-.LBB272:
-.LBB271:
-	.loc 2 214 0
-	b	printk
-.LVL128:
-.L128:
-.LCFI21:
-	pop	{r3, pc}
+	bl	printk
+.LVL122:
+	ldmfd	sp, {fp, sp, pc}
 .L131:
 	.align	2
 .L130:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
-.LBE271:
-.LBE272:
+.LBE270:
+.LBE269:
 .LFE194:
-	.fnend
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
-	.align	1
+	.align	2
 	.global	List_remove_node
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-	.fnstart
 .LFB198:
 	.loc 2 375 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL129:
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI22:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL123:
+	mov	ip, sp
+.LCFI80:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI81:
+	sub	fp, ip, #4
+.LCFI82:
 	.loc 2 378 0
-	movs	r6, #6
-	ldr	r4, .L138
-	muls	r6, r1, r6
+	ldr	r4, .L139
+	.loc 2 375 0
+	uxth	r1, r1
 	.loc 2 379 0
 	movw	r3, #65535
 	.loc 2 375 0
 	mov	r8, r0
 	.loc 2 378 0
 	ldr	r7, [r4, #2292]
-	adds	r5, r7, r6
-.LVL130:
+	lsl	r6, r1, #3
+	add	r5, r7, r6
+.LVL124:
 	.loc 2 379 0
 	ldrh	r2, [r5, #2]
 	cmp	r2, r3
@@ -1741,1567 +1733,1569 @@ List_remove_node:
 	beq	.L133
 	.loc 2 379 0 discriminator 2
 	movw	r2, #379
-	ldr	r1, .L138+4
-.LVL131:
-	ldr	r0, .L138+8
+	ldr	r1, .L139+4
+.LVL125:
+	ldr	r0, .L139+8
 	bl	printk
-.LVL132:
+.LVL126:
 .L133:
 	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
-	movw	r1, #65535
-.LVL133:
+	ldrh	r2, [r7, r6]
 	cmp	r5, r3
-	ldrh	r3, [r7, r6]
+	movw	r3, #65535
 	bne	.L134
 	.loc 2 382 0
-	cmp	r3, r1
+	cmp	r2, r3
 	.loc 2 385 0
-	ittee	ne
-	ldrne	r0, [r4, #2292]
-	movne	r2, #6
+	ldrne	r3, [r4, #2292]
 	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
 	.loc 2 385 0
-	ittt	ne
-	mlane	r3, r2, r3, r0
-	strne	r3, [r8]
+	addne	r2, r3, r2, lsl #3
+	.loc 2 386 0
+	mvnne	r3, #0
+	.loc 2 385 0
+	strne	r2, [r8]
 	.loc 2 386 0
-	strhne	r1, [r3, #2]	@ movhi
+	strhne	r3, [r2, #2]	@ movhi
 .L136:
 	.loc 2 399 0
-	movw	r3, #65535
+	mvn	r3, #0
 	.loc 2 401 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r5, #2]	@ movhi
 	.loc 2 401 0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL134:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 .L134:
 	.loc 2 388 0
-	cmp	r3, r1
-	ldrh	r1, [r5, #2]
+	cmp	r2, r3
+	ldrh	r3, [r5, #2]
 	bne	.L137
 	.loc 2 389 0
-	cmp	r1, r3
-	beq	.L136
+	cmp	r3, r2
 	.loc 2 391 0
-	movs	r2, #6
-	ldr	r0, [r4, #2292]
-	muls	r1, r2, r1
-	strh	r3, [r0, r1]	@ movhi
+	ldrne	r2, [r4, #2292]
+	lslne	r3, r3, #3
+	mvnne	r1, #0
+.LVL127:
+	.loc 2 389 0
+	beq	.L136
+.L138:
+	.loc 2 397 0
+	strh	r1, [r2, r3]	@ movhi
 	b	.L136
+.LVL128:
 .L137:
 	.loc 2 395 0
-	ldr	r0, [r4, #2292]
-	movs	r2, #6
-	mla	r3, r2, r3, r0
-	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, [r4, #2292]
+.LVL129:
+	add	r2, r1, r2, lsl #3
+	strh	r3, [r2, #2]	@ movhi
 	.loc 2 396 0
-	ldrh	r0, [r5, #2]
+	ldrh	r3, [r5, #2]
 	.loc 2 397 0
 	ldrh	r1, [r7, r6]
-	ldr	r3, [r4, #2292]
-	muls	r2, r0, r2
-	strh	r1, [r3, r2]	@ movhi
-	b	.L136
-.L139:
+	ldr	r2, [r4, #2292]
+	lsl	r3, r3, #3
+	b	.L138
+.L140:
 	.align	2
-.L138:
+.L139:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
 .LFE198:
-	.fnend
 	.size	List_remove_node, .-List_remove_node
-	.align	1
+	.align	2
 	.global	List_pop_index_node
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-	.fnstart
 .LFB199:
 	.loc 2 404 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL135:
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI23:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL130:
+	mov	ip, sp
+.LCFI83:
+	push	{r4, fp, ip, lr, pc}
+.LCFI84:
+	sub	fp, ip, #4
+.LCFI85:
 	.loc 2 408 0
 	ldr	r3, [r0]
-.LVL136:
-	cbz	r3, .L146
-	.loc 2 413 0
-	ldr	r2, .L147
+.LVL131:
+	.loc 2 404 0
+	uxth	r1, r1
+	.loc 2 408 0
+	cmp	r3, #0
+	.loc 2 409 0
+	movweq	r4, #65535
+	.loc 2 408 0
+	beq	.L141
+	.loc 2 413 0
+	ldr	r2, .L148
 	.loc 2 412 0
-	movw	r5, #65535
+	movw	ip, #65535
 	.loc 2 413 0
-	movs	r6, #6
-	ldr	r2, [r2, #2292]
-.L142:
+	ldr	r4, [r2, #2292]
+.L143:
 	.loc 2 412 0
-	cbnz	r1, .L143
-.L145:
+	cmp	r1, #0
+	bne	.L144
+.L146:
 	.loc 2 416 0
-	ldr	r4, .L147+4
-	subs	r3, r3, r2
-.LVL137:
-	asrs	r3, r3, #1
-	muls	r4, r3, r4
+	sub	r3, r3, r4
+.LVL132:
+	ubfx	r4, r3, #3, #16
 	.loc 2 417 0
-	uxth	r1, r4
-.LVL138:
+	mov	r1, r4
+.LVL133:
 	bl	List_remove_node
-.LVL139:
-	uxth	r0, r4
-	.loc 2 419 0
-	pop	{r4, r5, r6, pc}
-.LVL140:
-.L143:
+.LVL134:
+.L141:
+	.loc 2 420 0
+	mov	r0, r4
+.LVL135:
+	ldmfd	sp, {r4, fp, sp, pc}
+.LVL136:
+.L144:
 	.loc 2 412 0 discriminator 1
-	ldrh	r4, [r3]
-	cmp	r4, r5
-	beq	.L145
+	ldrh	r2, [r3]
+	cmp	r2, ip
+	beq	.L146
 	.loc 2 414 0
-	subs	r1, r1, #1
-.LVL141:
+	sub	r1, r1, #1
+.LVL137:
 	.loc 2 413 0
-	mla	r3, r6, r4, r2
+	add	r3, r4, r2, lsl #3
 	.loc 2 414 0
 	uxth	r1, r1
-.LVL142:
-	b	.L142
-.L146:
-	.loc 2 409 0
-	movw	r0, #65535
-.LVL143:
-	.loc 2 420 0
-	pop	{r4, r5, r6, pc}
-.L148:
+.LVL138:
+	b	.L143
+.L149:
 	.align	2
-.L147:
+.L148:
 	.word	.LANCHOR0
-	.word	-1431655765
 .LFE199:
-	.fnend
 	.size	List_pop_index_node, .-List_pop_index_node
-	.align	1
+	.align	2
 	.global	List_pop_head_node
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-	.fnstart
 .LFB200:
 	.loc 2 423 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL144:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL139:
+	mov	ip, sp
+.LCFI86:
+	push	{fp, ip, lr, pc}
+.LCFI87:
+	sub	fp, ip, #4
+.LCFI88:
 	.loc 2 424 0
-	movs	r1, #0
-	b	List_pop_index_node
-.LVL145:
+	mov	r1, #0
+	bl	List_pop_index_node
+.LVL140:
+	.loc 2 425 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE200:
-	.fnend
 	.size	List_pop_head_node, .-List_pop_head_node
-	.align	1
+	.align	2
 	.global	List_get_gc_head_node
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-	.fnstart
 .LFB201:
 	.loc 2 428 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL146:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL141:
+	mov	ip, sp
+.LCFI89:
+	push	{fp, ip, lr, pc}
+.LCFI90:
+	sub	fp, ip, #4
+.LCFI91:
 	.loc 2 432 0
-	ldr	r2, .L156
+	ldr	r1, .L157
 	.loc 2 428 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI24:
+	uxth	r2, r0
+.LVL142:
 	.loc 2 432 0
-	ldr	r3, [r2, #2296]
-.LVL147:
-	cbz	r3, .L155
+	ldr	r3, [r1, #2296]
+.LVL143:
+	cmp	r3, #0
 	.loc 2 437 0
-	ldr	r1, [r2, #2292]
-	movs	r4, #6
+	ldrne	r1, [r1, #2292]
 	.loc 2 436 0
-	movw	r2, #65535
-.L152:
-	cbz	r0, .L153
-	.loc 2 436 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r3]
-.LVL148:
-	cmp	r3, r2
-	bne	.L154
-.LVL149:
-.L155:
-	.loc 2 433 0 is_stmt 1
+	movwne	r0, #65535
+	.loc 2 432 0
+	bne	.L153
+	.loc 2 433 0
 	movw	r0, #65535
-.LVL150:
-	pop	{r4, pc}
-.LVL151:
-.L154:
+	ldmfd	sp, {fp, sp, pc}
+.LVL144:
+.L155:
 	.loc 2 438 0
-	subs	r0, r0, #1
-.LVL152:
+	sub	r2, r2, #1
+.LVL145:
 	.loc 2 437 0
-	mla	r3, r4, r3, r1
-.LVL153:
+	add	r3, r1, r3, lsl #3
+.LVL146:
 	.loc 2 438 0
-	uxth	r0, r0
-.LVL154:
-	b	.L152
+	uxth	r2, r2
+.LVL147:
 .L153:
-	.loc 2 442 0
-	ldr	r0, .L156+4
-.LVL155:
-	subs	r3, r3, r1
-.LVL156:
-	asrs	r3, r3, #1
-	muls	r3, r0, r3
-	uxth	r0, r3
+	.loc 2 436 0
+	cmp	r2, #0
+	beq	.L154
+	.loc 2 436 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3]
+.LVL148:
+	cmp	r3, r0
+	bne	.L155
+	ldmfd	sp, {fp, sp, pc}
+.LVL149:
+.L154:
+	.loc 2 442 0 is_stmt 1
+	sub	r3, r3, r1
+.LVL150:
+	ubfx	r0, r3, #3, #16
 	.loc 2 445 0
-	pop	{r4, pc}
-.L157:
+	ldmfd	sp, {fp, sp, pc}
+.L158:
 	.align	2
-.L156:
+.L157:
 	.word	.LANCHOR0
-	.word	-1431655765
 .LFE201:
-	.fnend
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
-	.align	1
+	.align	2
 	.global	List_update_data_list
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-	.fnstart
 .LFB202:
 	.loc 2 448 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL157:
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI25:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL151:
+	mov	ip, sp
+.LCFI92:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI93:
+	sub	fp, ip, #4
+.LCFI94:
+	.loc 2 457 0
+	ldr	r4, .L172
+	movw	r3, #2324
 	.loc 2 448 0
-	mov	r5, r0
+	uxth	r5, r0
+.LVL152:
 	.loc 2 457 0
-	ldr	r4, .L169
-	ldrh	r3, [r4, #2324]
-	cmp	r3, r0
-	beq	.L160
+	ldrh	r3, [r4, r3]
+	cmp	r3, r5
+	beq	.L161
 	.loc 2 457 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
-	cmp	r3, r0
-	beq	.L160
+	movw	r3, #2372
+	ldrh	r3, [r4, r3]
+	cmp	r3, r5
+	beq	.L161
 	.loc 2 457 0 discriminator 2
-	ldrh	r3, [r4, #2420]
-	cmp	r3, r0
-	beq	.L160
-.LBB275:
-.LBB276:
+	movw	r3, #2420
+	ldrh	r3, [r4, r3]
+	cmp	r3, r5
+	beq	.L161
+.LBB273:
+.LBB274:
 	.loc 2 460 0 is_stmt 1
-	movs	r7, #6
-	ldr	r9, [r4, #2292]
-	muls	r7, r0, r7
+	ldr	r8, [r4, #2292]
 	.loc 2 462 0
 	ldr	r3, [r4, #2296]
 	.loc 2 460 0
-	add	r8, r9, r7
-.LVL158:
+	add	r7, r8, r5, lsl #3
+.LVL153:
 	.loc 2 462 0
-	cmp	r8, r3
-	beq	.L160
+	cmp	r7, r3
+	beq	.L161
+	.loc 2 465 0
+	ldr	r2, [r4, #2300]
+	lsl	r3, r5, #1
 	.loc 2 466 0
-	ldrh	r6, [r8, #4]
+	ldrh	r6, [r7, #4]
 	.loc 2 465 0
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r0, lsl #1]
-.LVL159:
+	ldrh	r3, [r2, r3]
+.LVL154:
 	.loc 2 467 0
 	cmp	r6, #0
-	beq	.L167
+	.loc 2 468 0
+	mvneq	r6, #0
+.LVL155:
 	.loc 2 466 0
-	muls	r6, r3, r6
-.LVL160:
-.L162:
+	mulne	r6, r6, r3
+.LVL156:
 	.loc 2 470 0
-	ldrh	r3, [r8, #2]
-.LVL161:
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L163
-	ldrh	r2, [r9, r7]
-	cmp	r2, r3
-	bne	.L163
-	mov	r2, #470
-	ldr	r1, .L169+4
-	ldr	r0, .L169+8
-	bl	printk
-.LVL162:
-.L163:
-	.loc 2 471 0
-	ldrh	r3, [r8, #2]
-	movw	r2, #65535
-	cmp	r3, r2
+	ldr	r3, [r8, r5, lsl #3]
+.LVL157:
+	cmn	r3, #1
 	bne	.L164
-	ldrh	r2, [r9, r7]
-	cmp	r2, r3
-	beq	.L160
+	movw	r2, #470
+	ldr	r1, .L172+4
+	ldr	r0, .L172+8
+	bl	printk
+.LVL158:
 .L164:
+	.loc 2 471 0
+	ldr	r3, [r8, r5, lsl #3]
+	cmn	r3, #1
+	beq	.L161
 	.loc 2 473 0
-	movs	r2, #6
-	muls	r2, r3, r2
-	.loc 2 474 0
-	ldr	r3, .L169+12
-	asrs	r1, r2, #1
-	muls	r3, r1, r3
+	ldrh	r2, [r7, #2]
 	.loc 2 475 0
 	ldr	r1, [r4, #2300]
-	ldrh	r0, [r1, r3, lsl #1]
-.LVL163:
+	.loc 2 473 0
+	lsl	r2, r2, #3
+	.loc 2 475 0
+	lsr	r3, r2, #2
+	ldrh	r0, [r1, r3]
+.LVL159:
 	.loc 2 476 0
 	ldr	r1, [r4, #2292]
-	add	r2, r2, r1
+	add	r2, r1, r2
 	ldrh	r3, [r2, #4]
 	.loc 2 477 0
-	cbz	r3, .L168
+	cmp	r3, #0
 	.loc 2 476 0
-	muls	r3, r0, r3
-.LVL164:
-.L165:
+	mulne	r3, r3, r0
+.LVL160:
+	.loc 2 478 0
+	mvneq	r3, #0
 	.loc 2 480 0
 	cmp	r6, r3
-	bcs	.L160
+	bcs	.L161
 	.loc 2 481 0
 	mov	r1, r5
-	ldr	r0, .L169+16
-.LVL165:
+	ldr	r0, .L172+12
+.LVL161:
 	bl	List_remove_node
-.LVL166:
-	ldrh	r3, [r4, #2312]
-	cbnz	r3, .L166
+.LVL162:
+	movw	r3, #2312
+	ldrh	r3, [r4, r3]
+	cmp	r3, #0
+	bne	.L166
 	movw	r2, #481
-	ldr	r1, .L169+4
-	ldr	r0, .L169+8
+	ldr	r1, .L172+4
+	ldr	r0, .L172+8
 	bl	printk
-.LVL167:
+.LVL163:
 .L166:
-	ldrh	r3, [r4, #2312]
+	movw	r2, #2312
 	.loc 2 482 0
 	mov	r0, r5
 	.loc 2 481 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #2312]	@ movhi
+	ldrh	r3, [r4, r2]
+	sub	r3, r3, #1
+	strh	r3, [r4, r2]	@ movhi
 	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL168:
-.L160:
-.LBE276:
-.LBE275:
+.LVL164:
+.L161:
+.LBE274:
+.LBE273:
 	.loc 2 485 0
-	movs	r0, #0
-.LVL169:
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.LVL170:
-.L167:
-.LBB278:
-.LBB277:
-	.loc 2 468 0
-	mov	r6, #-1
-.LVL171:
-	b	.L162
-.LVL172:
-.L168:
-	.loc 2 478 0
-	mov	r3, #-1
-.LVL173:
-	b	.L165
-.L170:
+	mov	r0, #0
+.LVL165:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L173:
 	.align	2
-.L169:
+.L172:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+51
 	.word	.LC1
-	.word	-1431655765
 	.word	.LANCHOR0+2296
-.LBE277:
-.LBE278:
 .LFE202:
-	.fnend
 	.size	List_update_data_list, .-List_update_data_list
-	.align	1
+	.align	2
 	.global	select_l2p_ram_region
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-	.fnstart
 .LFB210:
 	.loc 2 749 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI26:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI95:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI96:
+	sub	fp, ip, #4
+.LCFI97:
 	.loc 2 754 0
-	movs	r1, #0
-	ldr	r5, .L181
+	ldr	r0, .L184
+	mov	r1, #0
 	.loc 2 755 0
-	movs	r0, #12
-	movw	r6, #65535
+	movw	ip, #65535
 	.loc 2 754 0
-	ldrh	r2, [r5, #114]
+	ldrh	r2, [r0, #114]
+	mov	lr, r0
 	.loc 2 755 0
-	ldr	r3, [r5, #2468]
-.L172:
+	ldr	r3, [r0, #2468]
+	mov	r0, #12
+.L175:
 	uxth	r4, r1
 	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L174
+	bcc	.L177
 	mov	r4, r2
-	movs	r1, #0
-	mov	r7, #-2147483648
+	mov	r1, #0
+	mov	r0, #-2147483648
 	.loc 2 765 0
-	mov	ip, #12
-.L175:
-	uxth	r6, r1
+	mov	r6, #12
+.L178:
+	uxth	r5, r1
 	.loc 2 764 0 discriminator 1
-	cmp	r6, r2
-	bcc	.L177
+	cmp	r5, r2
+	bcc	.L180
 	.loc 2 773 0
 	cmp	r4, r2
-	bcc	.L173
+	bcc	.L176
 	.loc 2 779 0
-	ldrh	r7, [r5, #2472]
+	movw	r1, #2472
 	mov	r4, r2
-	movs	r1, #0
-	mov	r0, #-1
-.L178:
-	uxth	r5, r1
+	ldrh	r5, [lr, r1]
+	mvn	r0, #0
+	mov	r1, #0
+.L181:
+	uxth	ip, r1
 	.loc 2 778 0 discriminator 1
-	cmp	r5, r2
-	bcc	.L180
+	cmp	ip, r2
+	bcc	.L183
 	.loc 2 784 0
 	cmp	r4, r2
-	bcc	.L173
+	bcc	.L176
 	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	r2, #784
-	ldr	r1, .L181+4
-	ldr	r0, .L181+8
+	ldr	r1, .L184+4
+	ldr	r0, .L184+8
 	bl	printk
-.LVL174:
-	b	.L173
-.L174:
-	adds	r1, r1, #1
+.LVL166:
+	b	.L176
+.L177:
+	add	r1, r1, #1
 	.loc 2 755 0 is_stmt 1
-	mla	r7, r0, r1, r3
-	ldrh	r7, [r7, #-12]
-	cmp	r7, r6
-	bne	.L172
-.L173:
+	mla	r5, r0, r1, r3
+	ldrh	r5, [r5, #-12]
+	cmp	r5, ip
+	bne	.L175
+.L176:
 	.loc 2 786 0
 	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L177:
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L180:
 	.loc 2 765 0
-	mla	r0, ip, r1, r3
-	ldr	r0, [r0, #4]
-	cmp	r0, #0
-	blt	.L176
+	mla	ip, r6, r1, r3
+	add	r1, r1, #1
+	ldr	ip, [ip, #4]
 	.loc 2 766 0
-	cmp	r7, r0
-	itt	hi
-	movhi	r7, r0
-	movhi	r4, r6
-.L176:
-	adds	r1, r1, #1
-	b	.L175
-.L180:
-	.loc 2 779 0
-	ldr	r6, [r3, #4]
-	cmp	r0, r6
-	bls	.L179
-	.loc 2 779 0 is_stmt 0 discriminator 1
-	ldrh	ip, [r3]
-	cmp	ip, r7
-	itt	ne
-	movne	r0, r6
+	cmp	r0, ip
+	movls	r7, #0
+	movhi	r7, #1
+	cmp	ip, #0
+	movlt	r7, #0
+	cmp	r7, #0
+	movne	r0, ip
 	movne	r4, r5
-.L179:
-	adds	r1, r1, #1
-	adds	r3, r3, #12
 	b	.L178
+.L183:
+	.loc 2 779 0
+	ldr	lr, [r3, #4]
+	cmp	r0, lr
+	bls	.L182
+	.loc 2 779 0 is_stmt 0 discriminator 1
+	ldrh	r6, [r3]
+	cmp	r6, r5
+	movne	r0, lr
+	movne	r4, ip
 .L182:
+	add	r1, r1, #1
+	add	r3, r3, #12
+	b	.L181
+.L185:
 	.align	2
-.L181:
+.L184:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+73
 	.word	.LC1
 .LFE210:
-	.fnend
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
-	.align	1
+	.align	2
 	.global	FtlUpdateVaildLpn
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	.fnstart
 .LFB216:
 	.loc 2 931 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL175:
-	.loc 2 934 0
-	ldr	r1, .L189
-	.loc 2 931 0
-	push	{r4, r5, lr}
-	.save {r4, r5, lr}
-.LCFI27:
-	mov	r3, r1
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL167:
+	mov	ip, sp
+.LCFI98:
+	push	{fp, ip, lr, pc}
+.LCFI99:
+	sub	fp, ip, #4
+.LCFI100:
 	.loc 2 934 0
-	ldrh	r2, [r1, #2474]
+	ldr	ip, .L192
+	movw	r1, #2474
+	ldrh	r2, [ip, r1]
+	mov	r3, ip
 	cmp	r2, #4
-	bhi	.L184
-	.loc 2 934 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L184
-	.loc 2 934 0
-	adds	r2, r2, #1
-	strh	r2, [r1, #2474]	@ movhi
-	.loc 2 943 0 is_stmt 1
-	pop	{r4, r5, pc}
-.L184:
+	cmpls	r0, #0
+	bne	.L187
+	add	r2, r2, #1
+	strh	r2, [ip, r1]	@ movhi
+	.loc 2 943 0
+	ldmfd	sp, {fp, sp, pc}
+.L187:
 	.loc 2 935 0
-	movs	r2, #0
-	ldrh	r1, [r3, #16]
-	strh	r2, [r3, #2474]	@ movhi
-.LBB281:
-.LBB282:
+	mov	r2, #0
+.LBB277:
+.LBB278:
 	.loc 2 939 0
-	movw	r5, #65535
-.LBE282:
-.LBE281:
+	movw	lr, #65535
+.LBE278:
+.LBE277:
+	.loc 2 935 0
+	strh	r2, [ip, r1]	@ movhi
 	.loc 2 936 0
-	str	r2, [r3, #2476]
-.LBB284:
-.LBB283:
+	str	r2, [ip, #2476]
+	ldrh	r1, [ip, #16]
+.LBB280:
+.LBB279:
 	.loc 2 939 0
-	ldr	r2, [r3, #2300]
+	ldr	r2, [ip, #2300]
 	add	r1, r2, r1, lsl #1
-.L185:
+.L188:
 	.loc 2 937 0
 	cmp	r2, r1
-	bne	.L187
-	pop	{r4, r5, pc}
-.L187:
+	bne	.L190
+	ldmfd	sp, {fp, sp, pc}
+.L190:
 	.loc 2 939 0
-	ldrh	r4, [r2], #2
-	cmp	r4, r5
+	ldrh	ip, [r2], #2
+	cmp	ip, lr
 	.loc 2 940 0
-	ittt	ne
 	ldrne	r0, [r3, #2476]
-.LVL176:
-	addne	r0, r0, r4
+.LVL168:
+	addne	r0, r0, ip
 	strne	r0, [r3, #2476]
-	b	.L185
-.L190:
+	b	.L188
+.L193:
 	.align	2
-.L189:
+.L192:
 	.word	.LANCHOR0
-.LBE283:
-.LBE284:
+.LBE279:
+.LBE280:
 .LFE216:
-	.fnend
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.align	1
+	.align	2
 	.global	ftl_set_blk_mode
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-	.fnstart
 .LFB222:
 	.loc 2 1396 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL177:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL169:
+	mov	ip, sp
+.LCFI101:
+	push	{fp, ip, lr, pc}
+.LCFI102:
+	sub	fp, ip, #4
+.LCFI103:
+	.loc 2 1397 0
+	cmp	r1, #0
 	.loc 2 1396 0
-	mov	r3, r0
+	uxth	r0, r0
 	.loc 2 1397 0
-	cbz	r1, .L192
-	b	ftl_set_blk_mode.part.6
-.LVL178:
-.L192:
+	beq	.L195
+	bl	ftl_set_blk_mode.part.6
+.LVL170:
+	ldmfd	sp, {fp, sp, pc}
+.LVL171:
+.L195:
 	.loc 2 1400 0
-	ldr	r2, .L193
-	lsrs	r0, r0, #5
-	and	r3, r3, #31
-.LVL179:
-	ldr	r1, [r2]
-.LVL180:
-	movs	r2, #1
-	lsl	r3, r2, r3
-	ldr	r2, [r1, r0, lsl #2]
-	bic	r2, r2, r3
-	str	r2, [r1, r0, lsl #2]
-	bx	lr
-.L194:
+	ldr	r3, .L197
+	lsr	r1, r0, #5
+.LVL172:
+	mov	ip, #1
+	and	r0, r0, #31
+.LVL173:
+	ldr	r2, [r3]
+	ldr	r3, [r2, r1, lsl #2]
+	bic	r0, r3, ip, lsl r0
+	str	r0, [r2, r1, lsl #2]
+	ldmfd	sp, {fp, sp, pc}
+.L198:
 	.align	2
-.L193:
+.L197:
 	.word	.LANCHOR0
 .LFE222:
-	.fnend
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.align	1
+	.align	2
 	.global	ftl_get_blk_mode
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-	.fnstart
 .LFB223:
 	.loc 2 1404 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL181:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL174:
+	mov	ip, sp
+.LCFI104:
+	push	{fp, ip, lr, pc}
+.LCFI105:
+	sub	fp, ip, #4
+.LCFI106:
+	.loc 2 1405 0
+	ldr	r3, .L200
+	.loc 2 1404 0
+	uxth	r0, r0
 	.loc 2 1405 0
-	ldr	r3, .L196
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-.LVL182:
 	ldr	r3, [r3]
+	lsr	r2, r0, #5
+	and	r0, r0, #31
+.LVL175:
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
 	.loc 2 1406 0
 	and	r0, r0, #1
-	bx	lr
-.L197:
+	ldmfd	sp, {fp, sp, pc}
+.L201:
 	.align	2
-.L196:
+.L200:
 	.word	.LANCHOR0
 .LFE223:
-	.fnend
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.align	1
+	.align	2
 	.global	ftl_sb_update_avl_pages
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-	.fnstart
 .LFB229:
 	.loc 2 1657 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL183:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL176:
+	mov	ip, sp
+.LCFI107:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI108:
+	sub	fp, ip, #4
+.LCFI109:
 	.loc 2 1659 0
-	movs	r3, #0
+	mov	r3, #0
 	.loc 2 1657 0
-	push	{r4, r5, r6, r7, lr}
-	.save {r4, r5, r6, r7, lr}
-.LCFI28:
+	uxth	r2, r2
+	uxth	r5, r1
+.LVL177:
 	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-	add	r4, r0, r2, lsl #1
+	.loc 2 1660 0
+	ldr	r3, .L209
+	add	ip, r0, r2, lsl #1
 	.loc 2 1662 0
-	movw	r7, #65535
+	movw	r1, #65535
+	add	ip, ip, #14
 	.loc 2 1660 0
-	ldr	r3, .L205
-	adds	r4, r4, #14
-	ldrh	r5, [r3, #8]
-.L199:
+	ldrh	lr, [r3, #8]
+.L203:
 	.loc 2 1660 0 is_stmt 0 discriminator 1
-	cmp	r2, r5
-	bcc	.L201
-	ldrh	r3, [r3, #78]
-	add	r4, r0, #16
-	.loc 2 1669 0 is_stmt 1
-	movw	r6, #65535
-	subs	r3, r3, #1
-	subs	r1, r3, r1
-.LVL184:
-	.loc 2 1671 0
-	movs	r3, #0
+	cmp	r2, lr
+	bcc	.L205
+	ldrh	r1, [r3, #78]
+	add	ip, r0, #16
+	.loc 2 1671 0 is_stmt 1
+	mov	r3, #0
+	.loc 2 1669 0
+	movw	r4, #65535
+	sub	r1, r1, #1
+	sub	r1, r1, r5
 	uxth	r1, r1
-.L202:
+.L206:
 	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
-.LVL185:
-	cmp	r5, r2
-	bhi	.L204
+.LVL178:
+	cmp	lr, r2
+	bhi	.L208
 	.loc 2 1674 0
-	pop	{r4, r5, r6, r7, pc}
-.LVL186:
-.L201:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.LVL179:
+.L205:
 	.loc 2 1662 0
-	ldrh	r6, [r4, #2]!
+	ldrh	r4, [ip, #2]!
 	.loc 2 1660 0
-	adds	r2, r2, #1
-.LVL187:
+	add	r2, r2, #1
+.LVL180:
 	uxth	r2, r2
-.LVL188:
+.LVL181:
 	.loc 2 1662 0
-	cmp	r6, r7
+	cmp	r4, r1
 	.loc 2 1664 0
-	ittt	ne
-	ldrhne	r6, [r0, #4]
-	addne	r6, r6, #1
-	strhne	r6, [r0, #4]	@ movhi
-	b	.L199
-.LVL189:
-.L204:
+	ldrhne	r4, [r0, #4]
+	addne	r4, r4, #1
+	strhne	r4, [r0, #4]	@ movhi
+	b	.L203
+.LVL182:
+.L208:
 	.loc 2 1669 0
-	ldrh	r2, [r4], #2
-	adds	r3, r3, #1
-	cmp	r2, r6
+	ldrh	r2, [ip], #2
+	add	r3, r3, #1
+	cmp	r2, r4
 	.loc 2 1671 0
-	ittt	ne
 	ldrhne	r2, [r0, #4]
-	addne	r2, r2, r1
+	addne	r2, r1, r2
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L202
-.L206:
+	b	.L206
+.L210:
 	.align	2
-.L205:
+.L209:
 	.word	.LANCHOR0
 .LFE229:
-	.fnend
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.align	1
+	.align	2
 	.global	FtlSlcSuperblockCheck
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-	.fnstart
 .LFB232:
 	.loc 2 2062 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL190:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL183:
+	mov	ip, sp
+.LCFI110:
+	push	{fp, ip, lr, pc}
+.LCFI111:
+	sub	fp, ip, #4
+.LCFI112:
 	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2062 0
-	push	{r4, r5, lr}
-	.save {r4, r5, lr}
-.LCFI29:
-	.loc 2 2065 0
-	cbz	r3, .L207
+	cmp	r3, #0
+	ldmfdeq	sp, {fp, sp, pc}
 	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L207
-.LBB287:
-.LBB288:
+	ldmfdeq	sp, {fp, sp, pc}
+.LBB283:
+.LBB284:
 	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	.loc 2 2074 0
-	movs	r5, #0
+	mov	lr, #0
 	.loc 2 2069 0
-	adds	r2, r2, #8
-	ldrh	r1, [r0, r2, lsl #1]
-.LVL191:
+	add	r2, r0, r2, lsl #1
+	ldrh	r1, [r2, #16]
+.LVL184:
 	.loc 2 2072 0
-	ldr	r2, .L213
-	ldrh	r4, [r2, #8]
+	ldr	r2, .L217
+	ldrh	ip, [r2, #8]
 	.loc 2 2070 0
 	mov	r2, r3
-.L210:
+.L214:
 	cmp	r1, r2
-	beq	.L212
-.L207:
-	pop	{r4, r5, pc}
-.L212:
+	beq	.L216
+	ldmfd	sp, {fp, sp, pc}
+.L216:
 	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	uxtb	r3, r3
 	.loc 2 2072 0
-	cmp	r3, r4
+	cmp	r3, ip
 	.loc 2 2071 0
 	strb	r3, [r0, #6]
 	.loc 2 2073 0
-	itttt	eq
 	ldrheq	r3, [r0, #2]
 	.loc 2 2074 0
-	strbeq	r5, [r0, #6]
+	strbeq	lr, [r0, #6]
 	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
 	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r1, [r0, r3, lsl #1]
-	b	.L210
-.L214:
+	add	r3, r0, r3, lsl #1
+	ldrh	r1, [r3, #16]
+	b	.L214
+.L218:
 	.align	2
-.L213:
+.L217:
 	.word	.LANCHOR0
-.LBE288:
-.LBE287:
+.LBE284:
+.LBE283:
 .LFE232:
-	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.align	1
+	.align	2
 	.global	make_superblock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-	.fnstart
 .LFB234:
 	.loc 2 2094 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL192:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI30:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL185:
+	mov	ip, sp
+.LCFI113:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI114:
+	sub	fp, ip, #4
+.LCFI115:
+	sub	sp, sp, #4
 	.loc 2 2094 0
 	mov	r4, r0
 	.loc 2 2097 0
-	ldr	r6, .L220
+	ldr	r6, .L224
 	ldrh	r2, [r0]
 	ldrh	r3, [r6, #16]
 	cmp	r2, r3
-	bcc	.L216
+	bcc	.L220
 	.loc 2 2097 0 is_stmt 0 discriminator 1
 	movw	r2, #2097
-	ldr	r1, .L220+4
-	ldr	r0, .L220+8
+	ldr	r1, .L224+4
+	ldr	r0, .L224+8
 	bl	printk
-.LVL193:
-.L216:
+.LVL186:
+.L220:
 	.loc 2 2100 0 is_stmt 1
 	ldrh	r9, [r6, #8]
 	add	r7, r4, #16
 	.loc 2 2101 0
-	ldr	r10, .L220+12
+	ldr	r10, .L224+12
 	.loc 2 2102 0
-	movw	r8, #65535
+	mvn	r8, #0
 	.loc 2 2098 0
-	movs	r5, #0
+	mov	r5, #0
 	strh	r5, [r4, #4]	@ movhi
 	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.L217:
+.L221:
 	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r9, r3
-	bhi	.L219
+	bhi	.L223
 	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	.loc 2 2113 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 2 2110 0
 	ldrh	r2, [r6, #78]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	.loc 2 2111 0
-	movs	r3, #1
+	mov	r3, #1
 	strb	r3, [r4, #9]
 	.loc 2 2113 0
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL194:
-.L219:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L223:
 	.loc 2 2101 0
-	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	add	r7, r7, #2
+	ldrh	r1, [r4]
+	add	r5, r5, #1
 	bl	V2P_block
-.LVL195:
+.LVL187:
 	.loc 2 2102 0
-	strh	r8, [r7]	@ movhi
+	strh	r8, [r7, #-2]	@ movhi
 	.loc 2 2101 0
-	mov	fp, r0
+	str	r0, [fp, #-44]
 	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL196:
-	cbnz	r0, .L218
+.LVL188:
+	cmp	r0, #0
 	.loc 2 2104 0
-	strh	fp, [r7]	@ movhi
+	ldreq	r3, [fp, #-44]
+	strheq	r3, [r7, #-2]	@ movhi
 	.loc 2 2105 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r4, #7]
-.L218:
-	adds	r5, r5, #1
-	adds	r7, r7, #2
-	b	.L217
-.L221:
+	ldrbeq	r3, [r4, #7]	@ zero_extendqisi2
+	addeq	r3, r3, #1
+	strbeq	r3, [r4, #7]
+	b	.L221
+.L225:
 	.align	2
-.L220:
+.L224:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+95
 	.word	.LC1
 	.word	.LANCHOR0+36
 .LFE234:
-	.fnend
 	.size	make_superblock, .-make_superblock
-	.align	1
+	.align	2
 	.global	update_multiplier_value
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-	.fnstart
 .LFB243:
 	.loc 2 2451 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL197:
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI31:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL189:
+	mov	ip, sp
+.LCFI116:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI117:
+	sub	fp, ip, #4
+.LCFI118:
 	.loc 2 2455 0
-	movs	r5, #0
-	ldr	r6, .L228
+	ldr	r3, .L232
+	mov	r5, #0
 	.loc 2 2451 0
-	mov	r7, r0
+	uxth	r6, r0
+.LVL190:
 	.loc 2 2453 0
 	mov	r4, r5
 	.loc 2 2455 0
-	ldrh	r8, [r6, #8]
-	.loc 2 2456 0
-	add	r10, r6, #36
+	ldrh	r8, [r3, #8]
+	mov	r7, r3
 	.loc 2 2458 0
-	ldrh	r9, [r6, #78]
-.L223:
+	ldrh	r9, [r3, #78]
+	.loc 2 2456 0
+	add	r10, r3, #36
+.L227:
 	.loc 2 2455 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L225
+	bhi	.L229
 	.loc 2 2460 0
-	cbz	r4, .L227
+	cmp	r4, #0
+	moveq	r0, r4
+	beq	.L230
 	.loc 2 2461 0
 	mov	r1, r4
 	mov	r0, #32768
-	bl	__aeabi_idiv
-.LVL198:
-.L226:
+	bl	__divsi3
+.LVL191:
+.L230:
 	.loc 2 2462 0
-	ldr	r1, [r6, #2292]
-	movs	r3, #6
-	mla	r1, r3, r7, r1
+	ldr	r1, [r7, #2292]
+	add	r1, r1, r6, lsl #3
 	strh	r0, [r1, #4]	@ movhi
 	.loc 2 2464 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL199:
-.L225:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L229:
 	.loc 2 2456 0
-	mov	r1, r7
+	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL200:
+.LVL192:
 	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL201:
-	cbnz	r0, .L224
+.LVL193:
+	cmp	r0, #0
+	add	r5, r5, #1
 	.loc 2 2458 0
-	add	r4, r4, r9
-	uxth	r4, r4
-.L224:
-	adds	r5, r5, #1
-	b	.L223
-.L227:
-	mov	r0, r4
-	b	.L226
-.L229:
+	addeq	r4, r4, r9
+	uxtheq	r4, r4
+	b	.L227
+.L233:
 	.align	2
-.L228:
+.L232:
 	.word	.LANCHOR0
 .LFE243:
-	.fnend
 	.size	update_multiplier_value, .-update_multiplier_value
-	.align	1
+	.align	2
 	.global	GetFreeBlockMinEraseCount
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	.fnstart
 .LFB244:
 	.loc 2 2467 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI119:
+	push	{fp, ip, lr, pc}
+.LCFI120:
+	sub	fp, ip, #4
+.LCFI121:
 	.loc 2 2470 0
-	ldr	r2, .L233
-	ldr	r0, [r2, #2316]
-	cbz	r0, .L231
+	ldr	r3, .L237
+	ldr	r0, [r3, #2316]
+	cmp	r0, #0
 	.loc 2 2471 0
-	ldr	r3, [r2, #2292]
-	subs	r0, r0, r3
-	ldr	r3, .L233+4
-	asrs	r0, r0, #1
-	muls	r0, r3, r0
-	ldr	r3, [r2, #2304]
-	uxth	r0, r0
-	ldrh	r0, [r3, r0, lsl #1]
-.L231:
+	ldrne	r2, [r3, #2292]
+	ldrne	r3, [r3, #2304]
+	subne	r0, r0, r2
+	ubfxne	r0, r0, #3, #16
+	lslne	r0, r0, #1
+	ldrhne	r0, [r3, r0]
 	.loc 2 2473 0
-	bx	lr
-.L234:
+	ldmfd	sp, {fp, sp, pc}
+.L238:
 	.align	2
-.L233:
+.L237:
 	.word	.LANCHOR0
-	.word	-1431655765
 .LFE244:
-	.fnend
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
-	.align	1
+	.align	2
 	.global	GetFreeBlockMaxEraseCount
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	.fnstart
 .LFB245:
 	.loc 2 2476 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL202:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL194:
+	mov	ip, sp
+.LCFI122:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI123:
+	sub	fp, ip, #4
+.LCFI124:
 	.loc 2 2481 0
-	ldr	r1, .L243
+	ldr	r2, .L247
 	.loc 2 2476 0
-	push	{r4, r5, r6, r7, lr}
-	.save {r4, r5, r6, r7, lr}
-.LCFI32:
+	uxth	r4, r0
+.LVL195:
 	.loc 2 2481 0
-	ldr	r3, [r1, #2316]
-	cbz	r3, .L241
+	ldr	r0, [r2, #2316]
+	cmp	r0, #0
+	ldmfdeq	sp, {r4, r5, fp, sp, pc}
 	.loc 2 2482 0
-	ldrh	r2, [r1, #2320]
-	.loc 2 2486 0
-	movs	r6, #6
+	add	r3, r2, #2320
 	.loc 2 2484 0
-	ldr	r4, [r1, #2292]
-	.loc 2 2486 0
-	movw	r7, #65535
+	ldr	ip, [r2, #2292]
 	.loc 2 2482 0
-	rsb	r2, r2, r2, lsl #3
-	.loc 2 2484 0
-	subs	r3, r3, r4
-	asrs	r3, r3, #1
+	ldrh	r3, [r3]
+	.loc 2 2485 0
+	mov	r1, #0
+	.loc 2 2486 0
+	movw	r5, #65535
 	.loc 2 2482 0
-	asrs	r2, r2, #3
-	cmp	r0, r2
+	rsb	r3, r3, r3, lsl #3
+	asr	r3, r3, #3
+	cmp	r4, r3
 	.loc 2 2483 0
-	it	gt
-	uxthgt	r0, r2
-	.loc 2 2484 0
-	ldr	r2, .L243+4
-	muls	r3, r2, r3
-	.loc 2 2485 0
-	movs	r2, #0
+	uxthgt	r4, r3
 	.loc 2 2484 0
-	uxth	r3, r3
-.L238:
+	sub	r3, r0, ip
+	ubfx	r3, r3, #3, #16
+.L242:
 	.loc 2 2485 0 discriminator 1
-	uxth	r5, r2
-	cmp	r0, r5
-	bls	.L240
+	uxth	r0, r1
+	cmp	r4, r0
+	bls	.L244
 	.loc 2 2486 0
-	mul	r5, r6, r3
-	adds	r2, r2, #1
-	ldrh	r5, [r4, r5]
-	cmp	r5, r7
-	bne	.L242
-.L240:
-	.loc 2 2490 0
-	ldr	r2, [r1, #2304]
-	ldrh	r0, [r2, r3, lsl #1]
-.LVL203:
-	pop	{r4, r5, r6, r7, pc}
-.LVL204:
-.L242:
-	mov	r3, r5
-	b	.L238
-.L241:
-	.loc 2 2477 0
-	mov	r0, r3
-.LVL205:
-	.loc 2 2493 0
-	pop	{r4, r5, r6, r7, pc}
+	lsl	r0, r3, #3
+	add	r1, r1, #1
+	ldrh	lr, [ip, r0]
+	cmp	lr, r5
+	bne	.L246
 .L244:
+	.loc 2 2490 0
+	ldr	r2, [r2, #2304]
+	lsl	r3, r3, #1
+	ldrh	r0, [r2, r3]
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L246:
+	mov	r3, lr
+	b	.L242
+.L248:
 	.align	2
-.L243:
+.L247:
 	.word	.LANCHOR0
-	.word	-1431655765
 .LFE245:
-	.fnend
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.align	1
+	.align	2
 	.global	FtlPrintInfo2buf
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-	.fnstart
 .LFB150:
 	.loc 3 11 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL206:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI33:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL196:
+	mov	ip, sp
+.LCFI125:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI126:
+	sub	fp, ip, #4
+.LCFI127:
+	sub	sp, sp, #12
+	.loc 3 11 0
 	mov	r7, r0
 	.loc 3 16 0
-	ldr	r6, .L257
-	.loc 3 11 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI34:
+	ldr	r6, .L261
 	.loc 3 15 0
 	add	r5, r7, #12
-	ldr	r1, .L257+4
+	ldr	r1, .L261+4
+	.loc 3 49 0
+	movw	r4, #2324
+	.loc 3 15 0
 	bl	strcpy
-.LVL207:
+.LVL197:
 	.loc 3 16 0
 	ldr	r2, [r6, #92]
 	mov	r0, r5
-	ldr	r1, .L257+8
+	ldr	r1, .L261+8
+	.loc 3 31 0
+	add	r9, r6, #2320
+	.loc 3 16 0
 	bl	sprintf
-.LVL208:
+.LVL198:
 	add	r5, r5, r0
 	.loc 3 17 0
-	ldr	r1, .L257+12
+	ldr	r1, .L261+12
 	mov	r0, r5
-	adds	r5, r5, #10
+	add	r5, r5, #10
 	bl	strcpy
-.LVL209:
+.LVL199:
 	.loc 3 18 0
 	ldr	r2, [r6, #2480]
 	mov	r0, r5
-	ldr	r1, .L257+16
+	ldr	r1, .L261+16
+	.loc 3 66 0
+	movw	r8, #2564
+	.loc 3 18 0
 	bl	sprintf
-.LVL210:
+.LVL200:
 	add	r5, r5, r0
 	.loc 3 19 0
 	ldr	r2, [r6, #2476]
-	ldr	r1, .L257+20
+	ldr	r1, .L261+20
 	mov	r0, r5
 	bl	sprintf
-.LVL211:
+.LVL201:
 	add	r5, r5, r0
 	.loc 3 20 0
 	ldr	r2, [r6, #2484]
-	ldr	r1, .L257+24
+	ldr	r1, .L261+24
 	mov	r0, r5
 	bl	sprintf
-.LVL212:
+.LVL202:
 	add	r5, r5, r0
 	.loc 3 21 0
 	ldr	r2, [r6, #2488]
-	ldr	r1, .L257+28
+	ldr	r1, .L261+28
 	mov	r0, r5
 	bl	sprintf
-.LVL213:
+.LVL203:
 	add	r5, r5, r0
 	.loc 3 22 0
 	ldr	r2, [r6, #2492]
-	ldr	r1, .L257+32
+	ldr	r1, .L261+32
 	mov	r0, r5
 	bl	sprintf
-.LVL214:
+.LVL204:
 	add	r5, r5, r0
 	.loc 3 23 0
 	ldr	r2, [r6, #2496]
-	ldr	r1, .L257+36
+	ldr	r1, .L261+36
 	mov	r0, r5
 	bl	sprintf
-.LVL215:
+.LVL205:
 	add	r5, r5, r0
 	.loc 3 24 0
 	ldr	r2, [r6, #2500]
-	ldr	r1, .L257+40
+	ldr	r1, .L261+40
 	mov	r0, r5
 	bl	sprintf
-.LVL216:
+.LVL206:
 	add	r5, r5, r0
 	.loc 3 25 0
 	ldr	r2, [r6, #2504]
-	ldr	r1, .L257+44
+	ldr	r1, .L261+44
 	mov	r0, r5
 	bl	sprintf
-.LVL217:
+.LVL207:
 	.loc 3 26 0
 	ldr	r2, [r6, #2508]
 	.loc 3 25 0
 	add	r5, r5, r0
 	.loc 3 26 0
-	ldr	r1, .L257+48
+	ldr	r1, .L261+48
 	mov	r0, r5
-	lsrs	r2, r2, #11
+	lsr	r2, r2, #11
 	bl	sprintf
-.LVL218:
+.LVL208:
 	.loc 3 27 0
 	ldr	r2, [r6, #2512]
 	.loc 3 26 0
 	add	r5, r5, r0
 	.loc 3 27 0
-	ldr	r1, .L257+52
+	ldr	r1, .L261+52
 	mov	r0, r5
-	lsrs	r2, r2, #11
+	lsr	r2, r2, #11
 	bl	sprintf
-.LVL219:
+.LVL209:
 	add	r5, r5, r0
 	.loc 3 28 0
 	ldr	r2, [r6, #2516]
-	ldr	r1, .L257+56
+	ldr	r1, .L261+56
 	mov	r0, r5
 	bl	sprintf
-.LVL220:
+.LVL210:
 	add	r5, r5, r0
 	.loc 3 29 0
 	ldr	r2, [r6, #2520]
-	ldr	r1, .L257+60
+	ldr	r1, .L261+60
 	mov	r0, r5
 	bl	sprintf
-.LVL221:
+.LVL211:
 	add	r5, r5, r0
 	.loc 3 30 0
 	ldrh	r2, [r6, #134]
-	ldr	r1, .L257+64
+	ldr	r1, .L261+64
 	mov	r0, r5
 	bl	sprintf
-.LVL222:
+.LVL212:
 	add	r5, r5, r0
 	.loc 3 31 0
-	ldrh	r2, [r6, #2320]
-	ldr	r1, .L257+68
+	ldrh	r2, [r9]
+	ldr	r1, .L261+68
 	mov	r0, r5
 	bl	sprintf
-.LVL223:
+.LVL213:
 	add	r5, r5, r0
 	.loc 3 32 0
 	ldr	r2, [r6, #2524]
-	ldr	r1, .L257+72
+	ldr	r1, .L261+72
 	mov	r0, r5
 	bl	sprintf
-.LVL224:
+.LVL214:
 	add	r5, r5, r0
 	.loc 3 33 0
 	ldr	r2, [r6, #2528]
-	ldr	r1, .L257+76
+	ldr	r1, .L261+76
 	mov	r0, r5
 	bl	sprintf
-.LVL225:
+.LVL215:
 	add	r5, r5, r0
 	.loc 3 34 0
 	ldr	r2, [r6, #2532]
-	ldr	r1, .L257+80
+	ldr	r1, .L261+80
 	mov	r0, r5
 	bl	sprintf
-.LVL226:
+.LVL216:
 	add	r5, r5, r0
 	.loc 3 35 0
 	ldr	r2, [r6, #2536]
-	ldr	r1, .L257+84
+	ldr	r1, .L261+84
 	mov	r0, r5
 	bl	sprintf
-.LVL227:
+.LVL217:
 	add	r5, r5, r0
 	.loc 3 36 0
 	ldr	r2, [r6, #2540]
-	ldr	r1, .L257+88
+	ldr	r1, .L261+88
 	mov	r0, r5
 	bl	sprintf
-.LVL228:
+.LVL218:
 	add	r5, r5, r0
 	.loc 3 37 0
 	ldr	r2, [r6, #2544]
-	ldr	r1, .L257+92
+	ldr	r1, .L261+92
 	mov	r0, r5
 	bl	sprintf
-.LVL229:
+.LVL219:
 	add	r5, r5, r0
 	.loc 3 38 0
-	ldrh	r2, [r6, #2274]
-	ldr	r1, .L257+96
+	ldrh	r2, [r9, #-46]
+	ldr	r1, .L261+96
 	mov	r0, r5
 	bl	sprintf
-.LVL230:
+.LVL220:
 	add	r5, r5, r0
 	.loc 3 39 0
-	ldrh	r2, [r6, #2272]
-	ldr	r1, .L257+100
+	ldrh	r2, [r9, #-48]
+	ldr	r1, .L261+100
 	mov	r0, r5
 	bl	sprintf
-.LVL231:
+.LVL221:
 	add	r5, r5, r0
 	.loc 3 40 0
 	ldr	r2, [r6, #116]
-	ldr	r1, .L257+104
+	ldr	r1, .L261+104
 	mov	r0, r5
 	bl	sprintf
-.LVL232:
+.LVL222:
 	add	r5, r5, r0
 	.loc 3 41 0
 	ldr	r2, [r6, #108]
-	ldr	r1, .L257+108
+	ldr	r1, .L261+108
 	mov	r0, r5
 	bl	sprintf
-.LVL233:
+.LVL223:
 	add	r5, r5, r0
 	.loc 3 42 0
 	ldr	r2, [r6, #4]
-	ldr	r1, .L257+112
+	ldr	r1, .L261+112
 	mov	r0, r5
 	bl	sprintf
-.LVL234:
+.LVL224:
 	add	r5, r5, r0
 	.loc 3 43 0
 	ldrh	r2, [r6, #194]
-	ldr	r1, .L257+116
+	ldr	r1, .L261+116
 	mov	r0, r5
 	bl	sprintf
-.LVL235:
+.LVL225:
 	add	r5, r5, r0
 	.loc 3 44 0
 	ldrh	r2, [r6, #16]
-	ldr	r1, .L257+120
+	ldr	r1, .L261+120
 	mov	r0, r5
 	bl	sprintf
-.LVL236:
+.LVL226:
+	.loc 3 45 0
+	movw	r3, #2548
+	.loc 3 44 0
 	add	r5, r5, r0
 	.loc 3 45 0
-	ldrh	r2, [r6, #2548]
-	ldr	r1, .L257+124
+	ldrh	r2, [r6, r3]
 	mov	r0, r5
+	ldr	r1, .L261+124
 	bl	sprintf
-.LVL237:
+.LVL227:
 	add	r5, r5, r0
 	.loc 3 46 0
 	ldr	r2, [r6, #20]
-	ldr	r1, .L257+128
+	ldr	r1, .L261+128
 	mov	r0, r5
 	bl	sprintf
-.LVL238:
+.LVL228:
+	.loc 3 47 0
+	movw	r3, #2552
+	.loc 3 46 0
 	add	r5, r5, r0
 	.loc 3 47 0
-	ldrh	r2, [r6, #2552]
-	ldr	r1, .L257+132
+	ldrh	r2, [r6, r3]
 	mov	r0, r5
+	ldr	r1, .L261+132
 	bl	sprintf
-.LVL239:
+.LVL229:
 	add	r5, r5, r0
 	.loc 3 48 0
 	ldrh	r2, [r6, #128]
-	ldr	r1, .L257+136
+	ldr	r1, .L261+136
 	mov	r0, r5
 	bl	sprintf
-.LVL240:
+.LVL230:
 	add	r5, r5, r0
 	.loc 3 49 0
-	ldrh	r2, [r6, #2326]
-	ldr	r1, .L257+140
+	ldrh	r2, [r9, #6]
+	ldr	r1, .L261+140
 	mov	r0, r5
 	bl	sprintf
-.LVL241:
+.LVL231:
 	add	r5, r5, r0
 	.loc 3 50 0
 	ldrb	r2, [r6, #2330]	@ zero_extendqisi2
-	ldr	r1, .L257+144
+	ldr	r1, .L261+144
 	mov	r0, r5
 	bl	sprintf
-.LVL242:
+.LVL232:
 	add	r5, r5, r0
 	.loc 3 51 0
-	ldrh	r2, [r6, #2324]
-	ldr	r1, .L257+148
+	ldrh	r2, [r6, r4]
+	ldr	r1, .L261+148
 	mov	r0, r5
 	bl	sprintf
-.LVL243:
+.LVL233:
 	add	r5, r5, r0
 	.loc 3 52 0
 	ldrb	r2, [r6, #2332]	@ zero_extendqisi2
-	ldr	r1, .L257+152
+	ldr	r1, .L261+152
 	mov	r0, r5
 	bl	sprintf
-.LVL244:
+.LVL234:
 	add	r5, r5, r0
 	.loc 3 53 0
-	ldrh	r2, [r6, #2328]
-	ldr	r1, .L257+156
+	ldrh	r2, [r9, #8]
+	ldr	r1, .L261+156
 	mov	r0, r5
 	bl	sprintf
-.LVL245:
+.LVL235:
 	.loc 3 54 0
-	ldr	r3, [r6, #2300]
+	ldrh	r3, [r6, r4]
 	.loc 3 53 0
 	add	r5, r5, r0
 	.loc 3 54 0
-	ldrh	r2, [r6, #2324]
+	ldr	r2, [r6, #2300]
 	mov	r0, r5
-	ldr	r1, .L257+160
-	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r1, .L261+160
+	.loc 3 55 0
+	movw	r4, #2372
+	.loc 3 54 0
+	lsl	r3, r3, #1
+	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL246:
+.LVL236:
 	add	r5, r5, r0
 	.loc 3 55 0
-	ldrh	r2, [r6, #2374]
-	ldr	r1, .L257+164
+	ldrh	r2, [r9, #54]
+	ldr	r1, .L261+164
 	mov	r0, r5
 	bl	sprintf
-.LVL247:
+.LVL237:
 	add	r5, r5, r0
 	.loc 3 56 0
 	ldrb	r2, [r6, #2378]	@ zero_extendqisi2
-	ldr	r1, .L257+168
+	ldr	r1, .L261+168
 	mov	r0, r5
 	bl	sprintf
-.LVL248:
+.LVL238:
 	add	r5, r5, r0
 	.loc 3 57 0
-	ldrh	r2, [r6, #2372]
-	ldr	r1, .L257+172
+	ldrh	r2, [r6, r4]
+	ldr	r1, .L261+172
 	mov	r0, r5
 	bl	sprintf
-.LVL249:
+.LVL239:
 	add	r5, r5, r0
 	.loc 3 58 0
 	ldrb	r2, [r6, #2380]	@ zero_extendqisi2
-	ldr	r1, .L257+176
+	ldr	r1, .L261+176
 	mov	r0, r5
 	bl	sprintf
-.LVL250:
+.LVL240:
 	add	r5, r5, r0
 	.loc 3 59 0
-	ldrh	r2, [r6, #2376]
-	ldr	r1, .L257+180
+	ldrh	r2, [r9, #56]
+	ldr	r1, .L261+180
 	mov	r0, r5
 	bl	sprintf
-.LVL251:
+.LVL241:
 	.loc 3 60 0
-	ldr	r3, [r6, #2300]
+	ldrh	r3, [r6, r4]
 	.loc 3 59 0
 	add	r5, r5, r0
 	.loc 3 60 0
-	ldrh	r2, [r6, #2372]
+	ldr	r2, [r6, #2300]
 	mov	r0, r5
-	ldr	r1, .L257+184
-	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r1, .L261+184
+	.loc 3 61 0
+	add	r4, r9, #100
+	.loc 3 60 0
+	lsl	r3, r3, #1
+	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL252:
+.LVL242:
 	add	r5, r5, r0
 	.loc 3 61 0
-	ldrh	r2, [r6, #2422]
-	ldr	r1, .L257+188
+	ldrh	r2, [r9, #102]
+	ldr	r1, .L261+188
 	mov	r0, r5
 	bl	sprintf
-.LVL253:
+.LVL243:
 	add	r5, r5, r0
 	.loc 3 62 0
 	ldrb	r2, [r6, #2426]	@ zero_extendqisi2
-	ldr	r1, .L257+192
+	ldr	r1, .L261+192
 	mov	r0, r5
 	bl	sprintf
-.LVL254:
+.LVL244:
+	.loc 3 63 0
+	movw	r3, #2420
+	.loc 3 62 0
 	add	r5, r5, r0
 	.loc 3 63 0
-	ldrh	r2, [r6, #2420]
-	ldr	r1, .L257+196
+	ldrh	r2, [r6, r3]
 	mov	r0, r5
+	ldr	r1, .L261+196
 	bl	sprintf
-.LVL255:
+.LVL245:
 	add	r5, r5, r0
 	.loc 3 64 0
 	ldrb	r2, [r6, #2428]	@ zero_extendqisi2
-	ldr	r1, .L257+200
+	ldr	r1, .L261+200
 	mov	r0, r5
 	bl	sprintf
-.LVL256:
+.LVL246:
 	add	r5, r5, r0
 	.loc 3 65 0
-	ldrh	r2, [r6, #2424]
-	ldr	r1, .L257+204
+	ldrh	r2, [r9, #104]
+	ldr	r1, .L261+204
 	mov	r0, r5
 	bl	sprintf
-.LVL257:
+.LVL247:
 	add	r5, r5, r0
 	.loc 3 66 0
-	ldrh	r2, [r6, #2566]
-	ldr	r1, .L257+208
+	ldrh	r2, [r4, #146]
+	ldr	r1, .L261+208
 	mov	r0, r5
 	bl	sprintf
-.LVL258:
+.LVL248:
 	add	r5, r5, r0
 	.loc 3 67 0
 	ldrb	r2, [r6, #2570]	@ zero_extendqisi2
-	ldr	r1, .L257+212
+	ldr	r1, .L261+212
 	mov	r0, r5
 	bl	sprintf
-.LVL259:
+.LVL249:
 	add	r5, r5, r0
 	.loc 3 68 0
-	ldrh	r2, [r6, #2564]
-	ldr	r1, .L257+216
+	ldrh	r2, [r6, r8]
+	ldr	r1, .L261+216
 	mov	r0, r5
 	bl	sprintf
-.LVL260:
+.LVL250:
 	add	r5, r5, r0
 	.loc 3 69 0
 	ldrb	r2, [r6, #2572]	@ zero_extendqisi2
-	ldr	r1, .L257+220
+	ldr	r1, .L261+220
 	mov	r0, r5
 	bl	sprintf
-.LVL261:
+.LVL251:
 	add	r5, r5, r0
 	.loc 3 70 0
-	ldrh	r2, [r6, #2568]
-	ldr	r1, .L257+224
+	ldrh	r2, [r4, #148]
+	ldr	r1, .L261+224
 	mov	r0, r5
 	bl	sprintf
-.LVL262:
+.LVL252:
 	.loc 3 71 0
 	ldr	r3, [r6, #2688]
 	.loc 3 70 0
@@ -3309,212 +3303,152 @@ FtlPrintInfo2buf:
 	.loc 3 71 0
 	ldr	r2, [r6, #2692]
 	mov	r0, r5
-	ldr	r1, .L257+228
+	ldr	r1, .L261+228
 	str	r3, [sp]
 	ldr	r3, [r6, #2696]
 	bl	sprintf
-.LVL263:
-	adds	r4, r5, r0
+.LVL253:
+	add	r4, r5, r0
 	.loc 3 72 0
 	ldr	r2, [r6, #2684]
-	ldr	r1, .L257+232
+	ldr	r1, .L261+232
 	mov	r0, r4
 	bl	sprintf
-.LVL264:
+.LVL254:
 	add	r4, r4, r0
 	.loc 3 73 0
 	ldr	r2, [r6, #2708]
-	ldr	r1, .L257+236
+	ldr	r1, .L261+236
 	mov	r0, r4
 	bl	sprintf
-.LVL265:
+.LVL255:
+	.loc 3 74 0
+	movw	r3, #3124
+	.loc 3 73 0
 	add	r4, r4, r0
 	.loc 3 74 0
-	ldrh	r2, [r6, #3124]
-	ldr	r1, .L257+240
+	ldrh	r2, [r6, r3]
 	mov	r0, r4
+	ldr	r1, .L261+240
 	bl	sprintf
-.LVL266:
+.LVL256:
+	.loc 3 75 0
+	movw	r3, #3126
+	.loc 3 74 0
 	add	r4, r4, r0
 	.loc 3 75 0
-	ldrh	r2, [r6, #3126]
-	ldr	r1, .L257+244
+	ldrh	r2, [r6, r3]
 	mov	r0, r4
+	ldr	r1, .L261+244
 	bl	sprintf
-.LVL267:
+.LVL257:
 	add	r4, r4, r0
 	.loc 3 76 0
 	ldr	r2, [r6, #3128]
-	b	.L258
-.L259:
-	.align	2
-.L257:
-	.word	.LANCHOR0
-	.word	.LC2
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LC12
-	.word	.LC13
-	.word	.LC14
-	.word	.LC15
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LC19
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LC27
-	.word	.LC28
-	.word	.LC29
-	.word	.LC30
-	.word	.LC31
-	.word	.LC32
-	.word	.LC33
-	.word	.LC34
-	.word	.LC35
-	.word	.LC36
-	.word	.LC37
-	.word	.LC38
-	.word	.LC39
-	.word	.LC40
-	.word	.LC41
-	.word	.LC42
-	.word	.LC43
-	.word	.LC44
-	.word	.LC45
-	.word	.LC46
-	.word	.LC47
-	.word	.LC48
-	.word	.LC49
-	.word	.LC50
-	.word	.LC51
-	.word	.LC52
-	.word	.LC53
-	.word	.LC54
-	.word	.LC55
-	.word	.LC56
-	.word	.LC57
-	.word	.LC58
-	.word	.LC59
-	.word	.LC60
-	.word	.LC61
-	.word	.LC62
-.L258:
-	ldr	r1, .L260
+	ldr	r1, .L261+248
 	mov	r0, r4
 	bl	sprintf
-.LVL268:
+.LVL258:
+	.loc 3 77 0
+	movw	r3, #3132
+	.loc 3 76 0
 	add	r4, r4, r0
 	.loc 3 77 0
-	ldrh	r2, [r6, #3132]
-	ldr	r1, .L260+4
+	ldrh	r2, [r6, r3]
 	mov	r0, r4
+	ldr	r1, .L261+252
 	bl	sprintf
-.LVL269:
+.LVL259:
 	add	r4, r4, r0
 	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
-.LVL270:
-	ldr	r1, .L260+8
+.LVL260:
+	ldr	r1, .L261+256
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL271:
+.LVL261:
 	add	r4, r4, r0
 	.loc 3 79 0
-	ldrh	r0, [r6, #2320]
+	ldrh	r0, [r9]
 	bl	GetFreeBlockMaxEraseCount
-.LVL272:
-	ldr	r1, .L260+12
+.LVL262:
+	ldr	r1, .L261+260
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL273:
+.LVL263:
 	.loc 3 80 0
-	ldr	r3, .L260+16
+	ldr	r3, .L261+264
 	.loc 3 79 0
 	add	r4, r4, r0
 	.loc 3 80 0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L246
-.LVL274:
-.L251:
+	beq	.L250
+.LVL264:
+.L255:
 	.loc 3 103 0
-	subs	r0, r4, r7
+	sub	r0, r4, r7
 	.loc 3 104 0
-	add	sp, sp, #20
-.LCFI35:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL275:
-.L246:
-.LCFI36:
+	sub	sp, fp, #40
+.LCFI128:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL265:
+.L250:
+.LCFI129:
 	.loc 3 83 0
-	ldrh	r3, [r6, #2564]
+	ldrh	r3, [r6, r8]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L248
+	beq	.L252
 	.loc 3 84 0
 	ldr	r2, [r6, #2300]
+	lsl	r3, r3, #1
 	mov	r0, r4
-	ldr	r1, .L260+20
-	ldrh	r2, [r2, r3, lsl #1]
+	ldr	r1, .L261+268
+	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL276:
+.LVL266:
 	add	r4, r4, r0
-.L248:
-.LBB289:
+.L252:
+.LBB285:
 	.loc 3 86 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 3 90 0
-	ldr	r9, .L260+28
+	ldr	r9, .L261+272
 	.loc 3 86 0
 	bl	List_get_gc_head_node
-.LVL277:
+.LVL267:
 	uxth	r3, r0
-.LVL278:
+.LVL268:
 	.loc 3 87 0
-	movs	r5, #0
+	mov	r5, #0
 	.loc 3 88 0
-	movw	fp, #65535
-	.loc 3 90 0
-	mov	r10, #6
-.L250:
-	.loc 3 88 0
-	cmp	r3, fp
-	beq	.L249
+	movw	r10, #65535
+.L254:
+	cmp	r3, r10
+	beq	.L253
 	.loc 3 90 0 discriminator 2
 	ldr	r2, [r6, #2304]
-	mul	r8, r10, r3
+	lsl	r1, r3, #1
+	lsl	r8, r3, #3
 	mov	r0, r4
-	mov	r1, r9
-	ldrh	r2, [r2, r3, lsl #1]
+	ldrh	r2, [r2, r1]
 	str	r2, [sp, #8]
 	ldr	r2, [r6, #2292]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp, #4]
 	ldr	r2, [r6, #2300]
-	ldrh	r2, [r2, r3, lsl #1]
+	ldrh	r2, [r2, r1]
+	mov	r1, r9
 	str	r2, [sp]
 	mov	r2, r5
 	bl	sprintf
-.LVL279:
+.LVL269:
 	.loc 3 87 0 discriminator 2
-	adds	r5, r5, #1
+	add	r5, r5, #1
 	.loc 3 91 0 discriminator 2
 	ldr	r3, [r6, #2292]
 	.loc 3 87 0 discriminator 2
@@ -3523,41 +3457,38 @@ FtlPrintInfo2buf:
 	add	r4, r4, r0
 	.loc 3 91 0 discriminator 2
 	ldrh	r3, [r3, r8]
-.LVL280:
+.LVL270:
 	.loc 3 87 0 discriminator 2
-	bne	.L250
-.L249:
-.LBE289:
-.LBB290:
+	bne	.L254
+.L253:
+.LBE285:
+.LBB286:
 	.loc 3 95 0
-	ldr	r2, [r6, #2292]
+	ldr	r3, [r6, #2316]
+.LVL271:
 	.loc 3 96 0
-	movs	r5, #0
+	mov	r5, #0
 	.loc 3 95 0
-	ldr	r3, [r6, #2316]
-.LVL281:
+	ldr	r2, [r6, #2292]
 	.loc 3 97 0
 	movw	r9, #65535
 	.loc 3 99 0
-	ldr	fp, .L260+32
-	mov	r10, #6
+	ldr	r10, .L261+276
 	.loc 3 95 0
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L260+24
-	muls	r3, r2, r3
-	uxth	r3, r3
-.LVL282:
-.L252:
+	sub	r3, r3, r2
+	ubfx	r3, r3, #3, #16
+.LVL272:
+.L256:
 	.loc 3 97 0
 	cmp	r3, r9
-	beq	.L251
+	beq	.L255
 	.loc 3 99 0 discriminator 2
-	ldr	r2, [r6, #2304]
-	mul	r8, r10, r3
+	ldr	r1, [r6, #2304]
+	lsl	r2, r3, #1
+	lsl	r8, r3, #3
 	mov	r0, r4
-	mov	r1, fp
-	ldrh	r2, [r2, r3, lsl #1]
+	ldrh	r2, [r1, r2]
+	mov	r1, r10
 	str	r2, [sp, #4]
 	ldr	r2, [r6, #2292]
 	add	r2, r2, r8
@@ -3565,525 +3496,580 @@ FtlPrintInfo2buf:
 	str	r2, [sp]
 	mov	r2, r5
 	.loc 3 96 0 discriminator 2
-	adds	r5, r5, #1
+	add	r5, r5, #1
 	.loc 3 99 0 discriminator 2
 	bl	sprintf
-.LVL283:
+.LVL273:
 	.loc 3 96 0 discriminator 2
 	cmp	r5, #4
 	.loc 3 99 0 discriminator 2
 	add	r4, r4, r0
 	.loc 3 96 0 discriminator 2
-	beq	.L251
+	beq	.L255
 	.loc 3 100 0
 	ldr	r3, [r6, #2292]
 	ldrh	r3, [r3, r8]
-.LVL284:
-	b	.L252
-.L261:
+.LVL274:
+	b	.L256
+.L262:
 	.align	2
-.L260:
-	.word	.LC63
-	.word	.LC64
+.L261:
+	.word	.LANCHOR0
+	.word	.LC2
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC12
+	.word	.LC13
+	.word	.LC14
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LC28
+	.word	.LC29
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LC33
+	.word	.LC34
+	.word	.LC35
+	.word	.LC36
+	.word	.LC37
+	.word	.LC38
+	.word	.LC39
+	.word	.LC40
+	.word	.LC41
+	.word	.LC42
+	.word	.LC43
+	.word	.LC44
+	.word	.LC45
+	.word	.LC46
+	.word	.LC47
+	.word	.LC48
+	.word	.LC49
+	.word	.LC50
+	.word	.LC51
+	.word	.LC52
+	.word	.LC53
+	.word	.LC54
+	.word	.LC55
+	.word	.LC56
+	.word	.LC57
+	.word	.LC58
+	.word	.LC59
+	.word	.LC60
+	.word	.LC61
+	.word	.LC62
+	.word	.LC63
+	.word	.LC64
 	.word	.LC65
 	.word	.LC66
 	.word	.LANCHOR2
 	.word	.LC67
-	.word	-1431655765
 	.word	.LC68
 	.word	.LC69
-.LBE290:
+.LBE286:
 .LFE150:
-	.fnend
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.align	1
+	.align	2
 	.global	rknand_proc_ftlread
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-	.fnstart
 .LFB151:
 	.loc 3 113 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL285:
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI37:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL275:
+	mov	ip, sp
+.LCFI130:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI131:
+	sub	fp, ip, #4
+.LCFI132:
+	.loc 3 119 0
+	ldr	r2, .L264
 	.loc 3 113 0
 	mov	r5, r0
 	.loc 3 119 0
-	ldr	r2, .L263
-	ldr	r1, .L263+4
+	ldr	r1, .L264+4
 	bl	sprintf
-.LVL286:
-	adds	r4, r5, r0
+.LVL276:
+	add	r4, r5, r0
 	.loc 3 121 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL287:
-	add	r0, r0, r4
+.LVL277:
+	add	r0, r4, r0
 	.loc 3 123 0
-	subs	r0, r0, r5
-	pop	{r3, r4, r5, pc}
-.LVL288:
-.L264:
+	sub	r0, r0, r5
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L265:
 	.align	2
-.L263:
+.L264:
 	.word	.LC70
 	.word	.LC71
 .LFE151:
-	.fnend
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.align	1
+	.align	2
 	.global	GetSwlReplaceBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-	.fnstart
 .LFB246:
 	.loc 2 2497 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI38:
-	.pad #28
-	sub	sp, sp, #28
-.LCFI39:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI133:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI134:
+	sub	fp, ip, #4
+.LCFI135:
+	sub	sp, sp, #16
 	.loc 2 2507 0
-	ldr	r4, .L289
+	ldr	r4, .L290
 	ldr	r2, [r4, #2532]
 	ldr	r3, [r4, #2544]
 	cmp	r2, r3
-	bcs	.L266
+	bcs	.L267
+	ldr	r2, [r4, #2304]
+	.loc 2 2509 0
+	mov	r3, #0
 	.loc 2 2510 0
 	ldrh	r1, [r4, #16]
 	.loc 2 2509 0
-	movs	r3, #0
-	.loc 2 2511 0
-	ldr	r0, [r4, #2304]
-	.loc 2 2509 0
 	str	r3, [r4, #2524]
-.L267:
+	sub	r2, r2, #2
+.L268:
 	.loc 2 2510 0 discriminator 1
 	cmp	r3, r1
-	bcc	.L268
+	bcc	.L269
 	.loc 2 2512 0
 	ldr	r5, [r4, #2524]
 	mov	r0, r5
-	bl	__aeabi_uidiv
-.LVL289:
+	bl	__udivsi3
+.LVL278:
 	str	r0, [r4, #2532]
 	.loc 2 2513 0
 	ldr	r0, [r4, #2528]
 	ldrh	r1, [r4, #68]
-	subs	r0, r5, r0
-	bl	__aeabi_uidiv
-.LVL290:
+	sub	r0, r5, r0
+	bl	__udivsi3
+.LVL279:
 	str	r0, [r4, #2524]
-.L269:
+.L270:
 	.loc 2 2519 0
 	ldr	r6, [r4, #2544]
 	ldr	r7, [r4, #2532]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L274
+	bls	.L275
 	.loc 2 2519 0 is_stmt 0 discriminator 1
 	ldr	r2, [r4, #2540]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L274
-.LVL291:
-.L276:
+	bls	.L275
+.LVL280:
+.L277:
 	.loc 2 2520 0 is_stmt 1
 	movw	r5, #65535
-.L275:
+.L276:
 	.loc 2 2566 0
 	mov	r0, r5
-.LVL292:
-	add	sp, sp, #28
-.LCFI40:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL293:
-.L268:
-.LCFI41:
+.LVL281:
+	sub	sp, fp, #40
+.LCFI136:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL282:
+.L269:
+.LCFI137:
 	.loc 2 2511 0 discriminator 3
-	ldrh	r2, [r0, r3, lsl #1]
+	ldrh	r0, [r2, #2]!
 	.loc 2 2510 0 discriminator 3
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	.loc 2 2511 0 discriminator 3
-	ldr	r5, [r4, #2524]
-	add	r2, r2, r5
-	str	r2, [r4, #2524]
-	b	.L267
-.L266:
+	ldr	ip, [r4, #2524]
+	add	r0, r0, ip
+	str	r0, [r4, #2524]
+	b	.L268
+.L267:
 	.loc 2 2514 0
 	ldr	r3, [r4, #2540]
 	cmp	r2, r3
-	bls	.L269
 	.loc 2 2515 0
-	adds	r3, r3, #1
-	str	r3, [r4, #2540]
+	addhi	r3, r3, #1
+	strhi	r3, [r4, #2540]
 	.loc 2 2516 0
-	movs	r3, #0
-.L271:
-	.loc 2 2516 0 is_stmt 0 discriminator 1
+	movhi	r3, #0
+	.loc 2 2514 0
+	bls	.L270
+.L272:
+	.loc 2 2516 0 discriminator 1
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	bcs	.L269
-	.loc 2 2517 0 is_stmt 1 discriminator 3
-	ldr	r1, [r4, #2304]
-	ldrh	r2, [r1, r3, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r1, r3, lsl #1]	@ movhi
+	bcs	.L270
+	.loc 2 2517 0 discriminator 3
+	ldr	r0, [r4, #2304]
+	lsl	r1, r3, #1
 	.loc 2 2516 0 discriminator 3
-	adds	r3, r3, #1
-	b	.L271
-.L274:
+	add	r3, r3, #1
+	.loc 2 2517 0 discriminator 3
+	ldrh	r2, [r0, r1]
+	add	r2, r2, #1
+	strh	r2, [r0, r1]	@ movhi
+	b	.L272
+.L275:
 	.loc 2 2522 0
-	ldrh	r0, [r4, #2320]
+	ldr	r3, .L290+4
+	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #16
+	asr	r0, r0, #2
 	bl	GetFreeBlockMaxEraseCount
-.LVL294:
+.LVL283:
 	.loc 2 2523 0
 	add	r3, r6, #64
 	.loc 2 2522 0
 	mov	r9, r0
-.LVL295:
+.LVL284:
 	.loc 2 2523 0
 	cmp	r0, r3
-	bcc	.L276
+	bcc	.L277
 	.loc 2 2526 0
 	ldr	r3, [r4, #2296]
-.LVL296:
+.LVL285:
 	cmp	r3, #0
-	beq	.L276
+	beq	.L277
 	.loc 2 2530 0
-	ldrh	r2, [r4, #16]
+	ldrh	r10, [r4, #16]
 	.loc 2 2534 0
 	movw	r1, #65535
-.LVL297:
+.LVL286:
 	.loc 2 2533 0
 	ldr	lr, [r4, #2292]
 	.loc 2 2534 0
-	movs	r0, #0
-.LVL298:
+	mov	r0, #0
+.LVL287:
 	ldr	r8, [r4, #2304]
-	.loc 2 2528 0
-	mov	r10, r1
-	.loc 2 2530 0
-	str	r2, [sp, #20]
-	.loc 2 2543 0
-	mov	fp, #6
-	.loc 2 2534 0
 	mov	r2, r1
-.L277:
+.L278:
 	.loc 2 2528 0
 	ldrh	ip, [r3]
-	cmp	ip, r10
-	bne	.L280
+	movw	r5, #65535
+	cmp	ip, r5
+	bne	.L281
 	mov	r5, r2
-.L279:
+.L280:
 	.loc 2 2546 0
 	movw	r3, #65535
-.LVL299:
+.LVL288:
 	cmp	r5, r3
-	beq	.L276
+	beq	.L277
 	.loc 2 2548 0
-	ldrh	r10, [r8, r5, lsl #1]
-.LVL300:
-	lsl	fp, r5, #1
+	lsl	r3, r5, #1
+	ldrh	r10, [r8, r3]
+.LVL289:
 	.loc 2 2549 0
 	cmp	r6, r10
-	bcs	.L281
+	bcs	.L282
+	str	r3, [fp, #-44]
 	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL301:
+.LVL290:
+	ldr	r3, [fp, #-44]
 	cmp	r6, r0
 	.loc 2 2552 0
-	it	cc
 	strcc	r1, [r4, #2544]
-.LVL302:
-.L281:
+.LVL291:
+.L282:
 	.loc 2 2554 0
 	cmp	r7, r10
-	bls	.L276
+	bls	.L277
 	.loc 2 2554 0 is_stmt 0 discriminator 1
-	add	r3, r10, #128
-	cmp	r9, r3
-	ble	.L276
+	add	r2, r10, #128
+	cmp	r9, r2
+	ble	.L277
 	.loc 2 2556 0 is_stmt 1
-	add	r3, r10, #256
-	cmp	r7, r3
-	bhi	.L282
+	add	r2, r10, #256
+	cmp	r7, r2
+	bhi	.L283
 	.loc 2 2556 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2540]
+	ldr	r2, [r4, #2540]
 	add	r10, r10, #768
-.LVL303:
-	cmp	r10, r3
-	bcs	.L276
-.LVL304:
-.L282:
+.LVL292:
+	cmp	r10, r2
+	bcs	.L277
+.LVL293:
+.L283:
 	.loc 2 2558 0 is_stmt 1
 	str	r9, [sp, #8]
-	mov	r2, r7
-	ldrh	r3, [r8, fp]
 	mov	r1, r5
-.LVL305:
-	ldr	r0, .L289+4
-.LVL306:
-	str	r3, [sp, #4]
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, fp]
+.LVL294:
+	ldrh	r2, [r8, r3]
+	ldr	r0, .L290+8
+.LVL295:
+	str	r2, [sp, #4]
+	ldr	r2, [r4, #2300]
+	ldrh	r3, [r2, r3]
+	mov	r2, r7
 	str	r3, [sp]
 	ldr	r3, [r4, #2540]
 	bl	printk
-.LVL307:
+.LVL296:
 	.loc 2 2559 0
-	movs	r3, #1
+	mov	r3, #1
 	str	r3, [r4, #3136]
 	.loc 2 2560 0
-	b	.L275
-.LVL308:
-.L280:
-	.loc 2 2529 0
-	adds	r0, r0, #1
-.LVL309:
-	.loc 2 2530 0
-	ldr	r5, [sp, #20]
+	b	.L276
+.LVL297:
+.L281:
 	.loc 2 2529 0
+	add	r0, r0, #1
+.LVL298:
 	uxth	r0, r0
-.LVL310:
+.LVL299:
 	.loc 2 2530 0
-	cmp	r0, r5
-	bhi	.L276
+	cmp	r0, r10
+	bhi	.L277
 	.loc 2 2532 0
 	ldrh	r5, [r3, #4]
-	cbz	r5, .L278
+	cmp	r5, #0
+	beq	.L279
 	.loc 2 2533 0
-	ldr	r5, .L289+8
 	sub	r3, r3, lr
-.LVL311:
-	asrs	r3, r3, #1
-	muls	r3, r5, r3
+.LVL300:
+	asr	r3, r3, #3
 	uxth	r5, r3
 	.loc 2 2534 0
-	ldrh	r3, [r8, r5, lsl #1]
+	lsl	r3, r5, #1
+	ldrh	r3, [r8, r3]
 	cmp	r6, r3
-	bcs	.L279
-	.loc 2 2538 0
+	bcs	.L280
+	.loc 2 2533 0
 	cmp	r1, r3
-	itt	hi
 	movhi	r1, r3
-	.loc 2 2533 0
 	movhi	r2, r5
-.LVL312:
-.L278:
+.LVL301:
+.L279:
 	.loc 2 2543 0
-	mla	r3, fp, ip, lr
-	b	.L277
-.L290:
+	add	r3, lr, ip, lsl #3
+	b	.L278
+.L291:
 	.align	2
-.L289:
+.L290:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2320
 	.word	.LC72
-	.word	-1431655765
 .LFE246:
-	.fnend
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.align	1
+	.align	2
 	.global	free_data_superblock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-	.fnstart
 .LFB247:
 	.loc 2 2570 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL313:
-	.loc 2 2571 0
-	movw	r2, #65535
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL302:
+	mov	ip, sp
+.LCFI138:
+	push	{fp, ip, lr, pc}
+.LCFI139:
+	sub	fp, ip, #4
+.LCFI140:
 	.loc 2 2570 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI42:
+	uxth	r0, r0
 	.loc 2 2571 0
-	cmp	r0, r2
-	beq	.L292
-.LBB293:
-.LBB294:
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L293
+.LBB289:
+.LBB290:
 	.loc 2 2573 0
-	ldr	r2, .L293
-	movs	r1, #0
-	ldr	r2, [r2, #2300]
-	strh	r1, [r2, r0, lsl #1]	@ movhi
+	ldr	r3, .L294
+	mov	r1, #0
+	ldr	r2, [r3, #2300]
+	lsl	r3, r0, #1
+	strh	r1, [r2, r3]	@ movhi
 	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL314:
-.L292:
-.LBE294:
-.LBE293:
+.LVL303:
+.L293:
+.LBE290:
+.LBE289:
 	.loc 2 2576 0
-	movs	r0, #0
-.LVL315:
-	pop	{r3, pc}
-.L294:
+	mov	r0, #0
+.LVL304:
+	ldmfd	sp, {fp, sp, pc}
+.L295:
 	.align	2
-.L293:
+.L294:
 	.word	.LANCHOR0
 .LFE247:
-	.fnend
 	.size	free_data_superblock, .-free_data_superblock
-	.align	1
+	.align	2
 	.global	get_new_active_ppa
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-	.fnstart
 .LFB250:
 	.loc 2 2703 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL316:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI43:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL305:
+	mov	ip, sp
+.LCFI141:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI142:
+	sub	fp, ip, #4
+.LCFI143:
 	.loc 2 2707 0
-	movw	r3, #65535
 	ldrh	r2, [r0]
+	movw	r3, #65535
 	.loc 2 2703 0
 	mov	r4, r0
 	.loc 2 2707 0
 	cmp	r2, r3
-	bne	.L296
+	bne	.L297
 	.loc 2 2707 0 is_stmt 0 discriminator 1
 	movw	r2, #2707
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	ldr	r1, .L310
+	ldr	r0, .L310+4
 	bl	printk
-.LVL317:
-.L296:
+.LVL306:
+.L297:
 	.loc 2 2708 0 is_stmt 1
-	ldr	r5, .L309+8
+	ldr	r5, .L310+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #78]
 	cmp	r2, r3
-	bne	.L297
+	bne	.L298
 	.loc 2 2708 0 is_stmt 0 discriminator 1
 	movw	r2, #2708
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	ldr	r1, .L310
+	ldr	r0, .L310+4
 	bl	printk
-.LVL318:
-.L297:
+.LVL307:
+.L298:
 	.loc 2 2709 0 is_stmt 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L298
+	cmp	r3, #0
+	bne	.L299
 	.loc 2 2709 0 is_stmt 0 discriminator 1
 	movw	r2, #2709
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	ldr	r1, .L310
+	ldr	r0, .L310+4
 	bl	printk
-.LVL319:
-.L298:
+.LVL308:
+.L299:
 	.loc 2 2711 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	.loc 2 2710 0
-	movs	r3, #0
+	mov	r3, #0
 	.loc 2 2714 0
 	ldrh	r1, [r5, #8]
 	.loc 2 2712 0
-	movw	r6, #65535
+	movw	ip, #65535
 	.loc 2 2710 0
 	strb	r3, [r4, #10]
 	.loc 2 2711 0
-	adds	r2, r2, #8
-	ldrh	r0, [r4, r2, lsl #1]
-.LVL320:
+	add	r2, r4, r2, lsl #1
+	ldrh	r0, [r2, #16]
+.LVL309:
 	.loc 2 2716 0
 	mov	r2, r3
-.L299:
+.L300:
 	.loc 2 2712 0
-	cmp	r0, r6
+	cmp	r0, ip
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L301
+	beq	.L302
 	.loc 2 2721 0
 	ldrh	r2, [r4, #4]
 	.loc 2 2720 0
 	ldrh	r6, [r4, #2]
 	.loc 2 2721 0
-	subs	r2, r2, #1
+	sub	r2, r2, #1
 	uxth	r2, r2
 	.loc 2 2720 0
 	orr	r6, r6, r0, lsl #10
 	.loc 2 2728 0
 	movw	r0, #65535
-.LVL321:
+.LVL310:
 	.loc 2 2721 0
 	strh	r2, [r4, #4]	@ movhi
-.L303:
+.L304:
 	.loc 2 2723 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	uxtb	r3, r3
 	.loc 2 2724 0
 	cmp	r1, r3
 	.loc 2 2725 0
-	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
 	.loc 2 2726 0
 	moveq	r3, #0
 	.loc 2 2728 0
-	add	r7, r3, #8
-	ldrh	r7, [r4, r7, lsl #1]
-	cmp	r7, r0
-	beq	.L303
+	add	ip, r4, r3, lsl #1
+	ldrh	ip, [ip, #16]
+	cmp	ip, r0
+	beq	.L304
 	strb	r3, [r4, #6]
 	.loc 2 2730 0
-	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5, #78]
-	cmp	r1, r3
-	bne	.L295
-	.loc 2 2730 0 is_stmt 0 discriminator 1
-	cbz	r2, .L295
-	.loc 2 2730 0 discriminator 2
+	cmp	r2, #0
+	ldrh	r3, [r4, #2]
+	ldrh	r1, [r5, #78]
+	sub	r3, r3, r1
+	clz	r3, r3
+	lsr	r3, r3, #5
+	moveq	r3, #0
+	cmp	r3, #0
+	beq	.L296
+	.loc 2 2730 0 is_stmt 0 discriminator 2
 	movw	r2, #2730
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	ldr	r1, .L310
+	ldr	r0, .L310+4
 	bl	printk
-.LVL322:
-.L295:
+.LVL311:
+.L296:
 	.loc 2 2732 0 is_stmt 1
 	mov	r0, r6
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL323:
-.L301:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.LVL312:
+.L302:
 	.loc 2 2713 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	uxtb	r3, r3
 	.loc 2 2714 0
 	cmp	r3, r1
 	.loc 2 2713 0
 	strb	r3, [r4, #6]
 	.loc 2 2715 0
-	itttt	eq
 	ldrheq	r3, [r4, #2]
 	.loc 2 2716 0
 	strbeq	r2, [r4, #6]
@@ -4092,1929 +4078,1971 @@ get_new_active_ppa:
 	strheq	r3, [r4, #2]	@ movhi
 	.loc 2 2718 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r0, [r4, r3, lsl #1]
-	b	.L299
-.L310:
+	add	r3, r4, r3, lsl #1
+	ldrh	r0, [r3, #16]
+	b	.L300
+.L311:
 	.align	2
-.L309:
+.L310:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
 .LFE250:
-	.fnend
 	.size	get_new_active_ppa, .-get_new_active_ppa
-	.align	1
+	.align	2
 	.global	FtlGcBufInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	.fnstart
 .LFB253:
 	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
 	.loc 5 22 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI144:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI145:
+	sub	fp, ip, #4
+.LCFI146:
 	.loc 5 25 0
-	ldr	r3, .L320
-	.loc 5 30 0
-	mov	ip, #20
-	.loc 5 22 0
-	push	{r4, r5, r6, r7, r8, r9, lr}
-	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI44:
+	ldr	r3, .L317
 	.loc 5 27 0
-	mov	r9, #12
-	movs	r6, #1
-	.loc 5 25 0
-	movs	r2, #0
-	.loc 5 29 0
-	mov	r7, r3
+	mov	lr, #12
+	mov	r4, #1
+	.loc 5 30 0
+	mov	r5, #20
 	.loc 5 25 0
+	mov	r2, #0
 	str	r2, [r3, #3140]
-.L312:
+.L313:
 	.loc 5 26 0 discriminator 1
 	ldrh	r1, [r3, #8]
 	uxth	r0, r2
-	adds	r4, r2, #1
+	add	ip, r2, #1
 	cmp	r0, r1
-	bcc	.L315
-	.loc 5 37 0 discriminator 1
-	ldr	r7, .L320
+	bcc	.L314
 	.loc 5 35 0 discriminator 1
 	mov	ip, #12
-	movs	r6, #0
-.L316:
+	mov	lr, #0
+.L315:
 	.loc 5 34 0 discriminator 1
 	ldr	r2, [r3, #3160]
 	cmp	r1, r2
-	bcc	.L319
+	bcc	.L316
 	.loc 5 39 0
-	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L315:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L314:
 	uxth	r2, r2
 	.loc 5 27 0 discriminator 3
-	ldr	r8, [r3, #3144]
-	mul	lr, r9, r2
-	add	r1, r8, lr
-	str	r6, [r1, #8]
+	ldr	r6, [r3, #3144]
+	mul	r0, lr, r2
+	add	r1, r6, r0
+	str	r4, [r1, #8]
 	.loc 5 28 0 discriminator 3
 	ldrh	r1, [r3, #86]
-	muls	r1, r2, r1
-	it	mi
-	addmi	r1, r1, #3
-	bic	r0, r1, #3
-	ldr	r1, [r3, #3148]
-	add	r1, r1, r0
-	str	r1, [r8, lr]
+	mul	r1, r2, r1
+	add	r7, r1, #3
+	cmp	r1, #0
+	movlt	r1, r7
+	ldr	r7, [r3, #3148]
+	bic	r1, r1, #3
+	add	r1, r7, r1
+	str	r1, [r6, r0]
 	.loc 5 29 0 discriminator 3
-	ldr	r5, [r7, #3152]
-	ldr	r0, [r3, #3144]
 	ldrh	r1, [r3, #88]
-	muls	r1, r2, r1
-	it	mi
-	addmi	r1, r1, #3
+	ldr	r7, [r3, #3144]
+	mul	r1, r2, r1
+	add	r6, r7, r0
+	add	r8, r1, #3
+	cmp	r1, #0
+	movlt	r1, r8
+	ldr	r8, [r3, #3152]
 	bic	r1, r1, #3
-	add	r8, r0, lr
-	add	r1, r1, r5
-	str	r1, [r8, #4]
+	add	r1, r8, r1
+	str	r1, [r6, #4]
 	.loc 5 30 0 discriminator 3
 	ldr	r1, [r3, #3156]
-	mla	r2, ip, r2, r1
-	ldr	r1, [r0, lr]
+	mla	r2, r5, r2, r1
+	ldr	r1, [r7, r0]
 	str	r1, [r2, #8]
 	.loc 5 31 0 discriminator 3
-	ldr	r1, [r8, #4]
+	ldr	r1, [r6, #4]
 	str	r1, [r2, #12]
-	mov	r2, r4
-	b	.L312
-.L319:
-	.loc 5 35 0 discriminator 3
-	mul	r0, ip, r1
-	ldr	r4, [r3, #3144]
-	.loc 5 36 0 discriminator 3
-	ldr	r5, [r3, #3148]
+	mov	r2, ip
+	b	.L313
+.L316:
 	.loc 5 35 0 discriminator 3
-	adds	r2, r4, r0
-	str	r6, [r2, #8]
+	mul	r4, ip, r1
+	ldr	r5, [r3, #3144]
+	add	r2, r5, r4
+	str	lr, [r2, #8]
 	.loc 5 36 0 discriminator 3
 	ldrh	r2, [r3, #86]
-	muls	r2, r1, r2
-	it	mi
-	addmi	r2, r2, #3
+	mul	r2, r1, r2
+	add	r0, r2, #3
+	cmp	r2, #0
+	movlt	r2, r0
+	ldr	r0, [r3, #3148]
 	bic	r2, r2, #3
-	add	r2, r2, r5
-	str	r2, [r4, r0]
+	add	r2, r0, r2
+	str	r2, [r5, r4]
 	.loc 5 37 0 discriminator 3
-	ldr	r2, [r3, #3144]
-	ldr	r4, [r7, #3152]
-	add	r0, r0, r2
 	ldrh	r2, [r3, #88]
-	muls	r2, r1, r2
-	it	mi
-	addmi	r2, r2, #3
-	bic	r2, r2, #3
-	.loc 5 34 0 discriminator 3
-	adds	r1, r1, #1
-	.loc 5 37 0 discriminator 3
-	add	r2, r2, r4
+	ldr	r0, [r3, #3144]
+	mul	r2, r1, r2
+	add	r0, r0, r4
 	.loc 5 34 0 discriminator 3
+	add	r1, r1, #1
 	uxth	r1, r1
 	.loc 5 37 0 discriminator 3
+	add	r4, r2, #3
+	cmp	r2, #0
+	movlt	r2, r4
+	ldr	r4, [r3, #3152]
+	bic	r2, r2, #3
+	add	r2, r4, r2
 	str	r2, [r0, #4]
-	b	.L316
-.L321:
+	b	.L315
+.L318:
 	.align	2
-.L320:
+.L317:
 	.word	.LANCHOR0
 .LFE253:
-	.fnend
 	.size	FtlGcBufInit, .-FtlGcBufInit
-	.align	1
+	.align	2
 	.global	FtlGcBufFree
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	.fnstart
 .LFB254:
 	.loc 5 42 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL324:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL313:
+	mov	ip, sp
+.LCFI147:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI148:
+	sub	fp, ip, #4
+.LCFI149:
 	.loc 5 47 0
-	ldr	r3, .L329
-	.loc 5 42 0
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI45:
+	ldr	r3, .L326
 	.loc 5 46 0
-	movs	r5, #0
+	mov	lr, #0
 	.loc 5 48 0
-	mov	r10, #20
-	mov	lr, #12
+	mov	r5, #20
+	mov	r7, #12
 	.loc 5 49 0
-	mov	r8, r5
+	mov	r8, lr
 	.loc 5 47 0
-	ldr	ip, [r3, #3160]
+	ldr	r6, [r3, #3160]
 	.loc 5 48 0
-	ldr	r6, [r3, #3144]
-.L323:
-	uxth	r3, r5
+	ldr	r4, [r3, #3144]
+.L320:
+	uxth	r3, lr
 	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
-	bls	.L322
+	ldmfdls	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	.loc 5 48 0
-	mla	r4, r10, r3, r0
-	movs	r2, #0
-.L324:
+	mla	ip, r5, r3, r0
+	mov	r2, #0
+.L321:
 	uxth	r3, r2
 	.loc 5 47 0 discriminator 1
-	cmp	ip, r3
-	bls	.L325
+	cmp	r6, r3
+	bls	.L322
 	.loc 5 48 0
-	mul	r3, lr, r3
-	ldr	r7, [r4, #8]
-	adds	r2, r2, #1
-	add	r9, r6, r3
-	ldr	r3, [r6, r3]
-	cmp	r3, r7
-	bne	.L324
+	mul	r3, r7, r3
+	add	r2, r2, #1
+	ldr	r10, [r4, r3]
+	add	r9, r4, r3
+	ldr	r3, [ip, #8]
+	cmp	r10, r3
+	bne	.L321
 	.loc 5 49 0
 	str	r8, [r9, #8]
-.L325:
-	adds	r5, r5, #1
-	b	.L323
 .L322:
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L330:
+	add	lr, lr, #1
+	b	.L320
+.L327:
 	.align	2
-.L329:
+.L326:
 	.word	.LANCHOR0
 .LFE254:
-	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
-	.align	1
+	.align	2
 	.global	FtlGcBufAlloc
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	.fnstart
 .LFB255:
 	.loc 5 57 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL325:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL314:
+	mov	ip, sp
+.LCFI150:
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+.LCFI151:
+	sub	fp, ip, #4
+.LCFI152:
 	.loc 5 62 0
-	ldr	r3, .L338
-	.loc 5 63 0
-	mov	ip, #12
-	.loc 5 57 0
-	push	{r4, r5, r6, r7, r8, r9, lr}
-	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI46:
+	ldr	r3, .L335
 	.loc 5 61 0
-	movs	r4, #0
+	mov	ip, #0
+	.loc 5 63 0
+	mov	r6, #12
 	.loc 5 64 0
-	mov	lr, #1
+	mov	r7, #1
 	.loc 5 65 0
 	mov	r8, #20
 	.loc 5 62 0
-	ldr	r5, [r3, #3160]
+	ldr	r4, [r3, #3160]
 	.loc 5 63 0
-	ldr	r6, [r3, #3144]
-.L332:
-	uxth	r2, r4
+	ldr	r5, [r3, #3144]
+.L329:
+	uxth	r2, ip
 	.loc 5 61 0 discriminator 1
 	cmp	r1, r2
-	bhi	.L336
+	bhi	.L333
 	.loc 5 71 0
-	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L336:
-	mov	r9, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 .L333:
-	uxth	r3, r9
+	mov	lr, #0
+.L330:
+	uxth	r3, lr
 	.loc 5 62 0 discriminator 1
-	cmp	r5, r3
-	bls	.L334
+	cmp	r4, r3
+	bls	.L331
 	.loc 5 63 0
-	mla	r3, ip, r3, r6
-	add	r9, r9, #1
-	ldr	r7, [r3, #8]
-	cmp	r7, #0
-	bne	.L333
+	mla	r3, r6, r3, r5
+	add	lr, lr, #1
+	ldr	r9, [r3, #8]
+	cmp	r9, #0
+	bne	.L330
 	.loc 5 65 0
 	mla	r2, r8, r2, r0
-	ldr	r7, [r3]
+	ldr	lr, [r3]
 	.loc 5 64 0
-	str	lr, [r3, #8]
+	str	r7, [r3, #8]
 	.loc 5 65 0
-	str	r7, [r2, #8]
+	str	lr, [r2, #8]
 	.loc 5 66 0
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L334:
-	adds	r4, r4, #1
-	b	.L332
-.L339:
+.L331:
+	add	ip, ip, #1
+	b	.L329
+.L336:
 	.align	2
-.L338:
+.L335:
 	.word	.LANCHOR0
 .LFE255:
-	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.align	1
+	.align	2
 	.global	IsBlkInGcList
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	.fnstart
 .LFB256:
 	.loc 5 74 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL326:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL315:
+	mov	ip, sp
+.LCFI153:
+	push	{fp, ip, lr, pc}
+.LCFI154:
+	sub	fp, ip, #4
+.LCFI155:
+	.loc 5 78 0
+	ldr	r2, .L342
+	.loc 5 74 0
+	uxth	r0, r0
 	.loc 5 78 0
-	ldr	r2, .L345
 	ldr	r3, [r2, #3164]
-	ldrh	r2, [r2, #3168]
+	.loc 5 77 0
+	add	r2, r2, #3168
+	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L341:
-	.loc 5 77 0 discriminator 1
+.L338:
+	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	r3, r2
-	bne	.L343
-	.loc 5 81 0
-	movs	r0, #0
-.LVL327:
-	bx	lr
-.LVL328:
-.L343:
+	bne	.L340
+	.loc 5 81 0 is_stmt 1
+	mov	r0, #0
+.LVL316:
+	ldmfd	sp, {fp, sp, pc}
+.LVL317:
+.L340:
 	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L341
+	bne	.L338
 	.loc 5 79 0
-	movs	r0, #1
-.LVL329:
+	mov	r0, #1
+.LVL318:
 	.loc 5 82 0
-	bx	lr
-.L346:
+	ldmfd	sp, {fp, sp, pc}
+.L343:
 	.align	2
-.L345:
+.L342:
 	.word	.LANCHOR0
 .LFE256:
-	.fnend
 	.size	IsBlkInGcList, .-IsBlkInGcList
-	.align	1
+	.align	2
 	.global	FtlGcUpdatePage
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-	.fnstart
 .LFB257:
 	.loc 5 85 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL330:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI47:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL319:
+	mov	ip, sp
+.LCFI156:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI157:
+	sub	fp, ip, #4
+.LCFI158:
 	.loc 5 85 0
-	mov	r5, r0
+	mov	r4, r0
 	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL331:
+.LVL320:
 	.loc 5 85 0
-	mov	r6, r1
-	mov	r7, r2
-	.loc 5 91 0
-	movs	r4, #0
+	mov	r5, r1
+	mov	r6, r2
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL332:
+.LVL321:
 	.loc 5 91 0
-	ldr	r3, .L351
-	ldrh	r1, [r3, #3168]
+	ldr	r3, .L348
+	mov	ip, #0
+	add	lr, r3, #3168
 	.loc 5 92 0
-	ldr	r2, [r3, #3164]
-.LVL333:
-.L348:
-	uxth	ip, r4
-.LVL334:
-	.loc 5 91 0 discriminator 1
-	cmp	ip, r1
-	bcc	.L350
-	.loc 5 96 0
-	bne	.L349
-	.loc 5 97 0
-	strh	r0, [r2, ip, lsl #1]	@ movhi
-.LVL335:
+	ldr	r1, [r3, #3164]
+	.loc 5 91 0
+	ldrh	r7, [lr]
+	sub	r2, r1, #2
+.LVL322:
+.L345:
+	uxth	r8, ip
+.LVL323:
+	.loc 5 91 0 is_stmt 0 discriminator 1
+	cmp	r8, r7
+	bcc	.L347
+	.loc 5 97 0 is_stmt 1
+	moveq	ip, r8
+	lsleq	ip, ip, #1
+	strheq	r0, [r1, ip]	@ movhi
 	.loc 5 98 0
-	ldrh	r0, [r3, #3168]
-.LVL336:
-	adds	r0, r0, #1
-	strh	r0, [r3, #3168]	@ movhi
-	b	.L349
-.LVL337:
-.L350:
-	adds	r4, r4, #1
+	ldrheq	r2, [lr]
+	addeq	r2, r2, #1
+	strheq	r2, [lr]	@ movhi
+	b	.L346
+.L347:
 	.loc 5 92 0
-	add	ip, r2, r4, lsl #1
-.LVL338:
-	ldrh	ip, [ip, #-2]
-	cmp	ip, r0
-	bne	.L348
-.LVL339:
-.L349:
+	ldrh	r8, [r2, #2]!
+.LVL324:
+	add	ip, ip, #1
+	cmp	r8, r0
+	bne	.L345
+.LVL325:
+.L346:
 	.loc 5 101 0
-	ldrh	r2, [r3, #3176]
-	movs	r0, #12
-.LVL340:
-	muls	r0, r2, r0
+	movw	ip, #3176
+	mov	r0, #12
+.LVL326:
+	ldrh	r2, [r3, ip]
+	mul	r0, r0, r2
 	ldr	r2, [r3, #3172]
-	adds	r1, r2, r0
-	str	r6, [r1, #4]
+	add	r1, r2, r0
 	.loc 5 102 0
-	str	r7, [r1, #8]
+	stmib	r1, {r5, r6}
+.LVL327:
 	.loc 5 103 0
-	str	r5, [r2, r0]
+	str	r4, [r2, r0]
 	.loc 5 107 0
-	ldrh	r2, [r3, #3176]
-	adds	r2, r2, #1
-	strh	r2, [r3, #3176]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL341:
-.L352:
+	ldrh	r2, [r3, ip]
+	add	r2, r2, #1
+	strh	r2, [r3, ip]	@ movhi
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L349:
 	.align	2
-.L351:
+.L348:
 	.word	.LANCHOR0
 .LFE257:
-	.fnend
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.align	1
+	.align	2
 	.global	FtlGcRefreshBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	.fnstart
 .LFB264:
 	.loc 5 345 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL342:
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI48:
-	.loc 5 347 0
-	mov	r1, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL328:
+	mov	ip, sp
+.LCFI159:
+	push	{r4, fp, ip, lr, pc}
+.LCFI160:
+	sub	fp, ip, #4
+.LCFI161:
 	.loc 5 345 0
-	mov	r4, r0
+	uxth	r4, r0
+.LVL329:
 	.loc 5 347 0
-	ldr	r0, .L356
-.LVL343:
+	ldr	r0, .L353
+	mov	r1, r4
 	bl	printk
-.LVL344:
+.LVL330:
 	.loc 5 349 0
-	ldr	r3, .L356+4
-	ldrh	r0, [r3, #3178]
-	cmp	r4, r0
-	beq	.L354
+	ldr	r3, .L353+4
+	movw	ip, #3178
+	ldrh	lr, [r3, ip]
+	cmp	r4, lr
+	beq	.L351
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r3, #3180]
-	cmp	r4, r1
-	beq	.L354
+	movw	r2, #3180
+	ldrh	r0, [r3, r2]
+	cmp	r4, r0
+	beq	.L351
 	.loc 5 351 0 is_stmt 1
-	movw	r2, #65535
-	cmp	r0, r2
-	bne	.L355
+	movw	r1, #65535
+	cmp	lr, r1
 	.loc 5 352 0
-	strh	r4, [r3, #3178]	@ movhi
-.L354:
-	.loc 5 356 0
-	movs	r0, #0
-	pop	{r4, pc}
-.LVL345:
-.L355:
+	strheq	r4, [r3, ip]	@ movhi
+	.loc 5 351 0
+	beq	.L351
 	.loc 5 353 0
-	cmp	r1, r2
+	cmp	r0, r1
 	.loc 5 354 0
-	it	eq
-	strheq	r4, [r3, #3180]	@ movhi
-	b	.L354
-.L357:
+	strheq	r4, [r3, r2]	@ movhi
+.L351:
+	.loc 5 356 0
+	mov	r0, #0
+	ldmfd	sp, {r4, fp, sp, pc}
+.L354:
 	.align	2
-.L356:
+.L353:
 	.word	.LC73
 	.word	.LANCHOR0
 .LFE264:
-	.fnend
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.align	1
+	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-	.fnstart
 .LFB265:
 	.loc 5 359 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL346:
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI49:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL331:
+	mov	ip, sp
+.LCFI162:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI163:
+	sub	fp, ip, #4
+.LCFI164:
+	.loc 5 364 0
+	ldr	r4, .L359
 	.loc 5 359 0
-	mov	r5, r0
+	uxth	r5, r0
+.LVL332:
 	.loc 5 364 0
-	ldr	r4, .L362
+	movw	r6, #3182
 	.loc 5 361 0
+	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL347:
+.LVL333:
 	.loc 5 364 0
 	mov	r2, r5
 	.loc 5 361 0
-	mov	r6, r0
+	mov	r7, r0
 	.loc 5 364 0
-	ldrh	r1, [r4, #3182]
-	ldr	r0, .L362+4
+	ldrh	r1, [r4, r6]
+	ldr	r0, .L359+4
 	bl	printk
-.LVL348:
+.LVL334:
 	.loc 5 366 0
-	mov	r0, r6
+	mov	r0, r7
 	bl	FtlGcRefreshBlock
-.LVL349:
+.LVL335:
 	.loc 5 368 0
-	ldrh	r3, [r4, #3182]
-	movs	r2, #0
+	ldrh	r3, [r4, r6]
+	mov	r2, #0
 	.loc 5 369 0
 	add	r0, r4, #3184
-.L359:
+.L356:
 	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L361
+	bhi	.L358
 	.loc 5 372 0
 	cmp	r3, #15
 	.loc 5 373 0
-	itttt	ls
-	addls	r2, r3, #1
-	strhls	r2, [r4, #3182]	@ movhi
-	addls	r4, r4, r3, lsl #1
-	strhls	r5, [r4, #3184]	@ movhi
-	b	.L360
-.L361:
-	adds	r2, r2, #1
+	movwls	r2, #3182
+	addls	r1, r3, #1
+	strhls	r1, [r4, r2]	@ movhi
+	lslls	r3, r3, #1
+	ldrls	r2, .L359+8
+	strhls	r5, [r2, r3]	@ movhi
+	b	.L357
+.L358:
+	add	r2, r2, #1
 	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L359
-.L360:
+	bne	.L356
+.L357:
 	.loc 5 375 0
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.LVL350:
-.L363:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L360:
 	.align	2
-.L362:
+.L359:
 	.word	.LANCHOR0
 	.word	.LC74
+	.word	.LANCHOR0+3184
 .LFE265:
-	.fnend
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.align	1
+	.align	2
 	.global	FtlGcReFreshBadBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	.fnstart
 .LFB266:
 	.loc 5 379 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI50:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI165:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI166:
+	sub	fp, ip, #4
+.LCFI167:
 	.loc 5 380 0
-	ldr	r4, .L370
-	ldrh	r3, [r4, #3182]
-	cbz	r3, .L365
+	ldr	r4, .L367
+	movw	r3, #3182
+	ldrh	r2, [r4, r3]
+	cmp	r2, #0
+	beq	.L362
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r4, #3178]
-	movw	r2, #65535
-	cmp	r1, r2
-	bne	.L365
+	movw	r3, #3178
+	ldrh	r1, [r4, r3]
+	movw	r3, #65535
+	cmp	r1, r3
+	bne	.L362
 	.loc 5 381 0 is_stmt 1
-	ldrh	r2, [r4, #3218]
-	cmp	r2, r3
+	movw	r3, #3218
+.LBB293:
+.LBB294:
+	.loc 5 383 0
+	movw	r5, #3218
+.LBE294:
+.LBE293:
+	.loc 5 381 0
+	ldrh	r1, [r4, r3]
+	cmp	r1, r2
 	.loc 5 382 0
-	itt	cs
-	movcs	r3, #0
-	strhcs	r3, [r4, #3218]	@ movhi
-.LBB297:
-.LBB298:
+	movcs	r2, #0
+	strhcs	r2, [r4, r3]	@ movhi
+.LBB296:
+.LBB295:
 	.loc 5 383 0
-	ldrh	r3, [r4, #3218]
-	add	r3, r4, r3, lsl #1
-	ldrh	r0, [r3, #3184]
+	ldrh	r3, [r4, r5]
+	ldr	r2, .L367+4
+	lsl	r3, r3, #1
+	ldrh	r0, [r2, r3]
 	bl	P2V_block_in_plane
-.LVL351:
+.LVL336:
 	bl	FtlGcRefreshBlock
-.LVL352:
+.LVL337:
 	.loc 5 384 0
-	ldrh	r3, [r4, #3218]
-	adds	r3, r3, #1
-	strh	r3, [r4, #3218]	@ movhi
-.L365:
-.LBE298:
-.LBE297:
+	ldrh	r3, [r4, r5]
+	add	r3, r3, #1
+	strh	r3, [r4, r5]	@ movhi
+.L362:
+.LBE295:
+.LBE296:
 	.loc 5 387 0
-	movs	r0, #0
-	pop	{r4, pc}
-.L371:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L368:
 	.align	2
-.L370:
+.L367:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3184
 .LFE266:
-	.fnend
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.align	1
+	.align	2
 	.global	FlashReadPages
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-	.fnstart
 .LFB272:
 	.loc 1 44 0
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL353:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI51:
-	mov	r9, r1
-	.loc 1 46 0
-	ldr	r5, .L390
-	mov	r4, r0
+	@ args = 0, pretend = 0, frame = 12
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL338:
+	mov	ip, sp
+.LCFI168:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI169:
+	sub	fp, ip, #4
+.LCFI170:
+	sub	sp, sp, #12
 	.loc 1 50 0
-	movs	r6, #0
-.LVL354:
+	mov	r6, #0
+.LVL339:
+	.loc 1 46 0
+	ldr	r5, .L387
 	.loc 1 44 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI52:
+	mov	r8, r1
 	.loc 1 51 0
-	ldr	r10, .L390+4
+	ldr	r9, .L387+4
+	mov	r4, r0
+	ldr	r10, .L387+8
 	.loc 1 46 0
-	ldrh	r7, [r5, #12]
-.LVL355:
-	.loc 1 51 0
-	ldr	fp, .L390+8
-	.loc 1 53 0
-	ldr	r8, .L390+12
-	str	r5, [sp, #4]
-.LVL356:
-.L373:
+	ldrh	r3, [r5, #12]
+.LVL340:
+	str	r3, [fp, #-52]
+.LVL341:
+.L370:
 	.loc 1 50 0 discriminator 1
-	cmp	r6, r9
-	bne	.L380
+	cmp	r6, r8
+	bne	.L377
 	.loc 1 71 0
-	movs	r0, #0
-.LVL357:
-	add	sp, sp, #20
-.LCFI53:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL358:
-.L380:
-.LCFI54:
+	mov	r0, #0
+.LVL342:
+	sub	sp, fp, #40
+.LCFI171:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL343:
+.L377:
+.LCFI172:
 	.loc 1 51 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L374
+.LVL344:
+	cmp	r3, #0
+	beq	.L371
 	.loc 1 51 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L375
-.L374:
+	cmp	r3, #0
+	bne	.L372
+.L371:
 	.loc 1 51 0 discriminator 3
-	movs	r2, #51
-.LVL359:
-	mov	r1, r10
-	mov	r0, fp
-.LVL360:
+	mov	r2, #51
+.LVL345:
+	mov	r1, r9
+	mov	r0, r10
+.LVL346:
 	bl	printk
-.LVL361:
-.L375:
-	.loc 1 52 0 is_stmt 1
-	add	r2, sp, #8
-.LVL362:
-	add	r1, sp, #12
+.LVL347:
+.L372:
+	.loc 1 53 0 is_stmt 1
+	ldr	r7, .L387+12
+	.loc 1 52 0
+	sub	r2, fp, #48
+.LVL348:
+	sub	r1, fp, #44
 	mov	r0, r4
-.LVL363:
+.LVL349:
 	bl	l2p_addr_tran
-.LVL364:
+.LVL350:
 	.loc 1 53 0
 	ldr	r3, [r4, #12]
+	ldr	ip, [r7, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	ldr	r5, [r8, #12]
-	blx	r5
-.LVL365:
-	.loc 1 58 0
-	ldr	r3, [sp, #4]
+	ldr	r1, [fp, #-44]
+	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
+	blx	ip
+.LVL351:
 	.loc 1 57 0
 	str	r0, [r4]
 	.loc 1 58 0
-	ldrh	r3, [r3, #14]
+	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L377
+	bne	.L374
 	.loc 1 59 0
+	ldr	r0, [fp, #-52]
+.LVL352:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [sp, #12]
-	adds	r3, r3, #8
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	ldr	r1, [fp, #-44]
+	ldr	ip, [r7, #12]
+	add	r3, r3, #8
 	add	r2, r2, #2048
-	ldr	r5, [r8, #12]
-	add	r1, r1, r7
-	blx	r5
-.LVL366:
+	add	r1, r0, r1
+	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
+.LVL353:
+	blx	ip
+.LVL354:
 	.loc 1 63 0
-	adds	r0, r0, #1
-	beq	.L378
+	cmn	r0, #1
+	beq	.L375
 	.loc 1 64 0 discriminator 1
 	ldr	r3, [r4, #12]
 	.loc 1 63 0 discriminator 1
 	ldr	r2, [r3, #12]
-	adds	r2, r2, #1
-	bne	.L377
+	cmn	r2, #1
+	bne	.L374
 	.loc 1 64 0
 	ldr	r2, [r3, #8]
-	adds	r2, r2, #1
-	bne	.L377
+	cmn	r2, #1
+	bne	.L374
 	.loc 1 65 0
 	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L377
-.L378:
+	cmn	r3, #1
+	beq	.L374
+.L375:
 	.loc 1 67 0
-	mov	r3, #-1
+	mvn	r3, #0
 	str	r3, [r4]
-.L377:
+.L374:
 	.loc 1 50 0 discriminator 2
-	adds	r6, r6, #1
-	adds	r4, r4, #20
-	b	.L373
-.L391:
+	add	r6, r6, #1
+	add	r4, r4, #20
+	b	.L370
+.L388:
 	.align	2
-.L390:
+.L387:
 	.word	g_nand_phy_info
 	.word	.LANCHOR1+130
 	.word	.LC1
 	.word	g_nand_ops
 .LFE272:
-	.fnend
 	.size	FlashReadPages, .-FlashReadPages
-	.align	1
+	.align	2
 	.global	FtlLoadFactoryBbt
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-	.fnstart
 .LFB180:
 	.loc 4 279 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI55:
-	.loc 4 289 0
-	movs	r6, #0
-.LVL367:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI173:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI174:
+	sub	fp, ip, #4
+.LCFI175:
 	.loc 4 286 0
-	ldr	r4, .L402
-	.loc 4 301 0
-	movw	r10, #61664
+	ldr	r4, .L399
+	.loc 4 289 0
+	mov	r6, #0
+.LVL355:
+	.loc 4 290 0
+	mvn	r9, #0
+	.loc 4 294 0
+	ldr	r10, .L399+4
 	.loc 4 286 0
 	ldr	r3, [r4, #3240]
 	add	r7, r4, #138
 	.loc 4 287 0
 	ldr	r8, [r4, #3244]
-	.loc 4 294 0
-	addw	r9, r4, #3220
 	.loc 4 286 0
 	str	r3, [r4, #3228]
 	.loc 4 287 0
 	str	r8, [r4, #3232]
-.LVL368:
-.L393:
+.LVL356:
+.L390:
 	.loc 4 289 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r6, r3
-	bcc	.L398
+	bcc	.L395
 	.loc 4 314 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL369:
-.L398:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L395:
 	.loc 4 291 0
 	ldrh	r5, [r4, #74]
-.LVL370:
+.LVL357:
 	.loc 4 290 0
-	movw	r3, #65535
-	strh	r3, [r7, #2]!	@ movhi
-.LVL371:
-.L395:
+	strh	r9, [r7, #2]!	@ movhi
+.LVL358:
+.L392:
 	.loc 4 291 0 discriminator 2
 	ldrh	r3, [r4, #74]
-	subs	r5, r5, #1
-.LVL372:
+	sub	r5, r5, #1
+.LVL359:
 	uxth	r5, r5
-.LVL373:
+.LVL360:
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L396
+	ble	.L393
 	.loc 4 292 0
 	mla	r3, r6, r3, r5
 	.loc 4 294 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
-	mov	r0, r9
+	mov	r0, r10
 	.loc 4 292 0
-	lsls	r3, r3, #10
-.LVL374:
+	lsl	r3, r3, #10
+.LVL361:
 	.loc 4 293 0
 	str	r3, [r4, #3224]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL375:
+.LVL362:
 	.loc 4 295 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	beq	.L395
+	cmn	r3, #1
+	beq	.L392
 	.loc 4 301 0
-	ldrh	r3, [r8]
-	cmp	r3, r10
-	bne	.L395
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L392
 	.loc 4 303 0
 	strh	r5, [r7]	@ movhi
-.L396:
+.L393:
 	.loc 4 289 0 discriminator 2
-	adds	r6, r6, #1
-	b	.L393
-.L403:
+	add	r6, r6, #1
+	b	.L390
+.L400:
 	.align	2
-.L402:
+.L399:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3220
 .LFE180:
-	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.align	1
+	.align	2
 	.global	FtlGetLastWrittenPage
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-	.fnstart
 .LFB186:
 	.loc 2 47 0
-	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL376:
-	ldr	r3, .L412
+	@ args = 0, pretend = 0, frame = 84
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL363:
+	mov	ip, sp
+.LCFI176:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI177:
+	sub	fp, ip, #4
+.LCFI178:
+	sub	sp, sp, #84
 	.loc 2 51 0
 	cmp	r1, #1
-	.loc 2 47 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI56:
+	ldr	r3, .L409
 	.loc 2 57 0
-	lsl	r7, r0, #10
-	.loc 2 47 0
-	.pad #88
-	sub	sp, sp, #88
-.LCFI57:
+	lsl	r6, r0, #10
 	.loc 2 58 0
 	mov	r2, r1
 	.loc 2 47 0
-	mov	r6, r1
+	mov	r7, r1
+	.loc 2 58 0
+	sub	r0, fp, #116
+.LVL364:
 	.loc 2 51 0
-	it	eq
 	ldrheq	r4, [r3, #80]
 	.loc 2 58 0
 	mov	r1, #1
-.LVL377:
+.LVL365:
 	.loc 2 51 0
-	it	ne
 	ldrhne	r4, [r3, #78]
-	.loc 2 58 0
-	add	r0, sp, #4
-.LVL378:
 	.loc 2 53 0
-	ldr	r3, .L412+4
+	ldr	r3, .L409+4
 	.loc 2 56 0
-	subs	r4, r4, #1
+	sub	r4, r4, #1
 	sxth	r5, r4
-.LVL379:
+.LVL366:
 	.loc 2 53 0
-	str	r3, [sp, #12]
+	str	r3, [fp, #-108]
 	.loc 2 54 0
-	add	r3, sp, #24
-	str	r3, [sp, #16]
+	sub	r3, fp, #96
+	str	r3, [fp, #-104]
 	.loc 2 57 0
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
+	orr	r3, r5, r6
+	str	r3, [fp, #-112]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL380:
+.LVL367:
 	.loc 2 59 0
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L407
-	mov	r8, #0
-.LVL381:
-.L408:
-	.loc 2 60 0
-	cmp	r8, r5
-	ble	.L411
-.L407:
+	ldr	r3, [fp, #-96]
+	cmn	r3, #1
+	moveq	r8, #0
+.LVL368:
+	beq	.L405
+.L404:
 	.loc 2 73 0
 	mov	r0, r5
-	add	sp, sp, #88
-.LCFI58:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL382:
-.L411:
-.LCFI59:
+	sub	sp, fp, #32
+.LCFI179:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL369:
+.L408:
+.LCFI180:
 	.loc 2 61 0
 	add	r4, r8, r5
 	.loc 2 63 0
-	mov	r2, r6
+	mov	r2, r7
 	.loc 2 61 0
 	add	r4, r4, r4, lsr #31
 	.loc 2 63 0
-	movs	r1, #1
-	add	r0, sp, #4
+	mov	r1, #1
+	sub	r0, fp, #116
 	.loc 2 61 0
-	asrs	r4, r4, #1
+	asr	r4, r4, #1
 	.loc 2 62 0
 	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
+	orr	r3, r3, r6
+	str	r3, [fp, #-112]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL383:
+.LVL370:
 	.loc 2 65 0
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L409
+	ldr	r3, [fp, #-96]
+	cmn	r3, #1
+	bne	.L406
 	.loc 2 65 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	bne	.L409
-	.loc 2 66 0 is_stmt 1
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L408
-.L409:
+	ldr	r3, [fp, #-92]
+	cmn	r3, #1
+	.loc 2 66 0 is_stmt 1 discriminator 1
+	subeq	r4, r4, #1
+	sxtheq	r5, r4
+	.loc 2 65 0 discriminator 1
+	beq	.L405
+.L406:
 	.loc 2 68 0
-	adds	r4, r4, #1
+	add	r4, r4, #1
 	sxth	r8, r4
-	b	.L408
-.L413:
+.L405:
+	.loc 2 60 0
+	cmp	r8, r5
+	ble	.L408
+	b	.L404
+.L410:
 	.align	2
-.L412:
+.L409:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 .LFE186:
-	.fnend
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.align	1
+	.align	2
 	.global	FlashProgPages
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-	.fnstart
 .LFB273:
 	.loc 1 74 0
-	@ args = 0, pretend = 0, frame = 40
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL384:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI60:
-	.pad #44
-	sub	sp, sp, #44
-.LCFI61:
+	@ args = 0, pretend = 0, frame = 36
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL371:
+	mov	ip, sp
+.LCFI181:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI182:
+	sub	fp, ip, #4
+.LCFI183:
+	sub	sp, sp, #36
 	.loc 1 74 0
-	str	r3, [sp]
-	mov	fp, r1
-	mov	r9, r2
-	mov	r4, r0
+	mov	r8, r3
 	.loc 1 76 0
-	ldr	r3, .L444
-.LVL385:
+	ldr	r3, .L441
+.LVL372:
+	.loc 1 74 0
+	mov	r7, r2
+	.loc 1 81 0
+	ldr	r10, .L441+4
+	.loc 1 74 0
+	mov	r9, r1
+	mov	r4, r0
 	.loc 1 80 0
 	mov	r5, r0
-.LVL386:
-	.loc 1 83 0
-	ldr	r8, .L444+28
+.LVL373:
+	.loc 1 76 0
+	ldrh	r2, [r3, #12]
+.LVL374:
 	.loc 1 80 0
-	movs	r6, #0
+	mov	r6, #0
+	str	r3, [fp, #-76]
 	.loc 1 76 0
-	ldrh	r10, [r3, #12]
-.LVL387:
-	str	r3, [sp, #4]
-.LVL388:
-.L415:
+	str	r2, [fp, #-72]
+.LVL375:
+.L412:
 	.loc 1 80 0 discriminator 1
-	cmp	r6, fp
-	bne	.L423
+	cmp	r6, r9
+	bne	.L420
 	.loc 1 101 0
-	ldr	r3, [sp]
-.LVL389:
-	cmp	r3, #0
-	bne	.L430
-.L443:
+	cmp	r8, #0
+	bne	.L427
+.L440:
 	.loc 1 131 0
-	movs	r0, #0
-	add	sp, sp, #44
-.LCFI62:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL390:
-.L423:
-.LCFI63:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI184:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL376:
+.L420:
+.LCFI185:
 	.loc 1 81 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L416
+	cmp	r3, #0
+	beq	.L413
 	.loc 1 81 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L417
-.L416:
+	cmp	r3, #0
+	bne	.L414
+.L413:
 	.loc 1 81 0 discriminator 3
-	movs	r2, #81
-	ldr	r1, .L444+4
-	ldr	r0, .L444+8
+	mov	r2, #81
+.LVL377:
+	ldr	r1, .L441+8
+	mov	r0, r10
 	bl	printk
-.LVL391:
-.L417:
+.LVL378:
+.L414:
 	.loc 1 82 0 is_stmt 1
-	add	r2, sp, #12
-	add	r1, sp, #16
+	sub	r2, fp, #68
+.LVL379:
+	sub	r1, fp, #64
 	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL392:
+.LVL380:
 	.loc 1 83 0
-	ldr	r3, [r5, #12]
+	ldr	r3, .L441+12
 	ldr	r2, [r5, #8]
-	ldr	r1, [sp, #16]
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	ldr	r7, [r8, #8]
-	blx	r7
-.LVL393:
+	ldr	r1, [fp, #-64]
+	ldr	ip, [r3, #8]
+	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
+	ldr	r3, [r5, #12]
+	blx	ip
+.LVL381:
 	.loc 1 88 0
-	cbnz	r0, .L418
+	cmp	r0, #0
+	.loc 1 89 0
+	mvnne	r3, #0
 	.loc 1 87 0
-	str	r0, [r5]
-.L419:
+	streq	r0, [r5]
+	.loc 1 89 0
+	strne	r3, [r5]
 	.loc 1 91 0
-	ldr	r3, [sp, #4]
+	ldr	r3, [fp, #-76]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L421
+	bne	.L418
 	.loc 1 92 0
+	ldr	r1, .L441+12
+	ldr	r0, [fp, #-72]
+.LVL382:
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
-	ldr	r1, [sp, #16]
-	adds	r3, r3, #8
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+	ldr	ip, [r1, #8]
+	ldr	r1, [fp, #-64]
+	add	r3, r3, #8
 	add	r2, r2, #2048
-	ldr	r7, [r8, #8]
-	add	r1, r1, r10
-	blx	r7
-.LVL394:
+	add	r1, r0, r1
+	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
+.LVL383:
+	blx	ip
+.LVL384:
 	.loc 1 96 0
-	cbz	r0, .L421
+	cmp	r0, #0
 	.loc 1 97 0
-	mov	r3, #-1
-	str	r3, [r5]
-.L421:
-	.loc 1 80 0 discriminator 2
-	adds	r6, r6, #1
-	adds	r5, r5, #20
-	b	.L415
+	mvnne	r3, #0
+	strne	r3, [r5]
 .L418:
-	.loc 1 89 0
-	mov	r3, #-1
-	str	r3, [r5]
-	b	.L419
-.LVL395:
-.L428:
-.LBB299:
-	.loc 1 106 0
-	movs	r3, #0
-.LVL396:
-	.loc 1 112 0
-	mov	r2, r9
+	.loc 1 80 0 discriminator 2
+	add	r6, r6, #1
+	add	r5, r5, #20
+	b	.L412
+.LVL385:
+.L425:
+.LBB297:
 	.loc 1 106 0
-	str	r3, [r7]
-	.loc 1 112 0
-	movs	r1, #1
+	ldr	r9, .L441+16
+.LVL386:
+	mov	r3, #0
 	.loc 1 107 0
 	str	r3, [r8, #3248]
 	.loc 1 112 0
-	add	r0, sp, #20
+	mov	r2, r7
+.LVL387:
+	mov	r1, #1
+.LVL388:
+	sub	r0, fp, #60
+	.loc 1 106 0
+	str	r3, [r9]
 	.loc 1 108 0
 	ldr	r3, [r4, #4]
 	.loc 1 109 0
-	str	r7, [sp, #28]
+	str	r9, [fp, #-52]
 	.loc 1 110 0
-	str	r10, [sp, #32]
+	str	r10, [fp, #-48]
 	.loc 1 108 0
-	str	r3, [sp, #24]
+	str	r3, [fp, #-56]
 	.loc 1 112 0
 	bl	FlashReadPages
-.LVL397:
+.LVL389:
 	.loc 1 113 0
-	ldr	fp, [sp, #20]
-.LVL398:
-	cmp	fp, #-1
-	bne	.L425
+	ldr	r3, [fp, #-60]
+	cmn	r3, #1
+	bne	.L422
 	.loc 1 114 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+12
+	ldr	r0, .L441+20
+	str	r3, [fp, #-72]
 	bl	printk
-.LVL399:
+.LVL390:
 	.loc 1 115 0
-	str	fp, [r4]
-.L425:
+	ldr	r3, [fp, #-72]
+	str	r3, [r4]
+.L422:
 	.loc 1 117 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L426
+	cmp	r3, #0
+	beq	.L423
 	.loc 1 118 0
 	ldr	r2, [r3]
 	ldr	r3, [r8, #3248]
 	cmp	r2, r3
-	beq	.L426
+	beq	.L423
 	.loc 1 119 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+16
+	ldr	r0, .L441+24
 	bl	printk
-.LVL400:
+.LVL391:
 	.loc 1 120 0
-	mov	r3, #-1
+	mvn	r3, #0
 	str	r3, [r4]
-.L426:
+.L423:
 	.loc 1 123 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L427
+	cmp	r3, #0
+	beq	.L424
 	.loc 1 124 0
 	ldr	r2, [r3]
-	ldr	r3, [r7]
+	ldr	r3, [r9]
 	cmp	r2, r3
-	beq	.L427
+	beq	.L424
 	.loc 1 125 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+20
+	ldr	r0, .L441+28
 	bl	printk
-.LVL401:
+.LVL392:
 	.loc 1 126 0
-	mov	r3, #-1
+	mvn	r3, #0
 	str	r3, [r4]
-.L427:
-.LBE299:
-	.loc 1 103 0 discriminator 2
-	adds	r5, r5, #1
-	adds	r4, r4, #20
-.LVL402:
 .L424:
+.LBE297:
+	.loc 1 103 0 discriminator 2
+	add	r5, r5, #1
+	add	r4, r4, #20
+.LVL393:
+.L421:
 	.loc 1 103 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
-	bne	.L428
-	b	.L443
-.LVL403:
-.L430:
-.LBB300:
+	bne	.L425
+	b	.L440
+.LVL394:
+.L427:
+.LBB298:
 	.loc 1 107 0 is_stmt 1
-	ldr	r8, .L444+32
-.LBE300:
-	movs	r5, #0
-.LBB301:
-	.loc 1 106 0
-	ldr	r7, .L444+24
+	ldr	r8, .L441+32
+.LVL395:
+.LBE298:
+	mov	r5, #0
+.LBB299:
 	.loc 1 110 0
 	add	r10, r8, #3248
-.LVL404:
-	b	.L424
-.L445:
+	b	.L421
+.L442:
 	.align	2
-.L444:
+.L441:
 	.word	g_nand_phy_info
-	.word	.LANCHOR1+145
 	.word	.LC1
+	.word	.LANCHOR1+145
+	.word	g_nand_ops
+	.word	check_buf
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
-	.word	check_buf
-	.word	g_nand_ops
 	.word	.LANCHOR0
-.LBE301:
+.LBE299:
 .LFE273:
-	.fnend
 	.size	FlashProgPages, .-FlashProgPages
-	.align	1
+	.align	2
 	.global	FlashEraseBlocks
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-	.fnstart
 .LFB274:
 	.loc 1 134 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL405:
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
-	.save {r4, r5, r6, r7, r8, r9, lr}
-	.pad #12
-.LCFI64:
-.LVL406:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL396:
+	mov	ip, sp
+.LCFI186:
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+.LCFI187:
+	sub	fp, ip, #4
+.LCFI188:
+	sub	sp, sp, #8
+	.loc 1 140 0
+	mov	r5, #0
+.LVL397:
+	.loc 1 137 0
+	ldr	r3, .L454
 	.loc 1 134 0
 	mov	r8, r2
-	.loc 1 137 0
-	ldr	r5, .L457
-.LVL407:
-	mov	r4, r0
-	.loc 1 140 0
-	movs	r6, #0
-.LVL408:
 	.loc 1 142 0
-	ldr	r7, .L457+4
+	ldr	r7, .L454+4
+	mov	r4, r0
 	.loc 1 137 0
-	ldrh	r9, [r5, #12]
-.LVL409:
-.L447:
+	ldrh	r9, [r3, #12]
+.LVL398:
+	mov	r6, r3
+.LVL399:
+.L444:
 	.loc 1 140 0 discriminator 1
-	cmp	r6, r8
-	bne	.L453
+	cmp	r5, r8
+	bne	.L450
 	.loc 1 153 0
-	movs	r0, #0
-.LVL410:
-	add	sp, sp, #12
-.LCFI65:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL411:
-.L453:
-.LCFI66:
+	mov	r0, #0
+.LVL400:
+	sub	sp, fp, #36
+.LCFI189:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+.LVL401:
+.L450:
+.LCFI190:
 	.loc 1 141 0
-	add	r1, sp, #4
-	mov	r2, sp
+	sub	r2, fp, #44
+	sub	r1, fp, #40
+.LVL402:
 	mov	r0, r4
-.LVL412:
+.LVL403:
 	bl	l2p_addr_tran
-.LVL413:
+.LVL404:
 	.loc 1 142 0
 	ldr	r3, [r7, #4]
-	ldr	r1, [sp, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
+	ldr	r1, [fp, #-40]
+	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
 	blx	r3
-.LVL414:
+.LVL405:
 	.loc 1 144 0
-	cbnz	r0, .L448
+	cmp	r0, #0
+	.loc 1 145 0
+	mvnne	r3, #0
 	.loc 1 143 0
-	str	r0, [r4]
-.L449:
+	streq	r0, [r4]
+	.loc 1 145 0
+	strne	r3, [r4]
 	.loc 1 146 0
-	ldrh	r3, [r5, #14]
+	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L451
+	bne	.L448
 	.loc 1 147 0
-	ldr	r1, [sp, #4]
+	ldr	r1, [fp, #-40]
 	ldr	r3, [r7, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
-	add	r1, r1, r9
+	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
+	add	r1, r9, r1
 	blx	r3
-.LVL415:
+.LVL406:
 	.loc 1 148 0
-	cbz	r0, .L451
+	cmp	r0, #0
 	.loc 1 149 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L451:
-	.loc 1 140 0 discriminator 2
-	adds	r6, r6, #1
-	adds	r4, r4, #20
-	b	.L447
+	mvnne	r3, #0
+	strne	r3, [r4]
 .L448:
-	.loc 1 145 0
-	mov	r3, #-1
-	str	r3, [r4]
-	b	.L449
-.L458:
+	.loc 1 140 0 discriminator 2
+	add	r5, r5, #1
+	add	r4, r4, #20
+	b	.L444
+.L455:
 	.align	2
-.L457:
+.L454:
 	.word	g_nand_phy_info
 	.word	g_nand_ops
 .LFE274:
-	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.align	1
+	.align	2
 	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-	.fnstart
 .LFB190:
 	.loc 2 98 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL416:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL407:
+	mov	ip, sp
+.LCFI191:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI192:
+	sub	fp, ip, #4
+.LCFI193:
+	.loc 2 98 0
+	uxth	r5, r0
+.LVL408:
 	.loc 2 99 0
-	subs	r3, r0, #1
 	movw	r2, #65533
-	uxth	r3, r3
 	.loc 2 98 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI67:
-	.loc 2 98 0
-	mov	r5, r0
+	uxth	r1, r1
 	.loc 2 99 0
+	sub	r3, r5, #1
+	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L459
-.LBB310:
-.LBB311:
+	ldmfdhi	sp, {r4, r5, r6, fp, sp, pc}
+.LBB308:
+.LBB309:
 	.loc 2 94 0
-	ldr	r4, .L468
-.LBE311:
-.LBE310:
+	ldr	r4, .L465
+.LBE309:
+.LBE308:
 	.loc 2 101 0
 	ldrh	r3, [r4, #194]
 	cmp	r3, #1024
-	beq	.L459
-.LBB312:
-.LBB313:
+	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
+.LBB310:
+.LBB311:
 	.loc 2 103 0
-	cbz	r1, .L461
-.LBB314:
+	cmp	r1, #0
+	beq	.L458
+.LBB312:
 	.loc 2 104 0
+	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL417:
+.LVL409:
 	mov	r6, r0
 	.loc 2 105 0
 	ldr	r0, [r4, #3760]
-	lsls	r3, r5, #10
+	lsl	r3, r5, #10
 	.loc 2 106 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	.loc 2 105 0
 	str	r3, [r0, #4]
 	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL418:
+.LVL410:
 	.loc 2 107 0
 	ldr	r2, [r4, #2304]
-	ldrh	r3, [r2, r6, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
+	lsl	r0, r6, #1
+	ldrh	r3, [r2, r0]
+	add	r3, r3, #1
+	strh	r3, [r2, r0]	@ movhi
 	.loc 2 108 0
 	ldr	r3, [r4, #2536]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #2536]
-.LVL419:
-.L461:
-.LBE314:
+.LVL411:
+.L458:
+.LBE312:
 	.loc 2 110 0
 	ldrh	r3, [r4, #194]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #194]	@ movhi
 	.loc 2 111 0
 	ldrh	r3, [r4, #192]
 	add	r2, r4, r3, lsl #1
 	.loc 2 112 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	ubfx	r3, r3, #0, #10
 	.loc 2 111 0
 	strh	r5, [r2, #196]	@ movhi
 	.loc 2 112 0
 	strh	r3, [r4, #192]	@ movhi
-.L459:
-	pop	{r4, r5, r6, pc}
-.LVL420:
-.L469:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L466:
 	.align	2
-.L468:
+.L465:
 	.word	.LANCHOR0
-.LBE313:
-.LBE312:
+.LBE311:
+.LBE310:
 .LFE190:
-	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.align	1
+	.align	2
 	.global	FtlLowFormatEraseBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-	.fnstart
 .LFB159:
 	.loc 3 528 0
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL421:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI68:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL412:
+	mov	ip, sp
+.LCFI194:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI195:
+	sub	fp, ip, #4
+.LCFI196:
+	sub	sp, sp, #24
+	.loc 3 528 0
+	uxth	r3, r0
+.LVL413:
 	.loc 3 539 0
 	mov	r10, #0
-	.loc 3 538 0
-	ldr	r4, .L515
 	.loc 3 528 0
-	mov	r7, r1
+	uxtb	r6, r1
+.LVL414:
+	str	r3, [fp, #-48]
 	.loc 3 536 0
-	mov	r6, r10
-	.loc 3 537 0
 	mov	r5, r10
-.LVL422:
+	.loc 3 538 0
+	ldr	r3, .L509
+.LVL415:
+	.loc 3 537 0
+	mov	r4, r10
+.LVL416:
+	.loc 3 538 0
+	ldr	r2, [fp, #-48]
+.LVL417:
 	.loc 3 540 0
 	mov	r9, #20
-	.loc 3 528 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI69:
-	.loc 3 551 0
-	mov	fp, r4
-	.loc 3 528 0
-	str	r0, [sp]
+	mov	r8, r3
 	.loc 3 538 0
-	str	r0, [r4, #3764]
-.L471:
+	str	r2, [r3, #3764]
+.L468:
 	.loc 3 539 0 discriminator 1
-	ldrh	r1, [r4, #8]
-	uxth	r3, r10
-	cmp	r1, r3
-	bhi	.L476
+	ldrh	r1, [r8, #8]
+	uxth	r2, r10
+.LVL418:
+	cmp	r1, r2
+	bhi	.L472
 	.loc 3 559 0
-	cmp	r6, #0
-	beq	.L470
+	cmp	r5, #0
+	beq	.L467
 	.loc 3 563 0
-	mov	r8, #0
+	mov	r7, #0
 	.loc 3 564 0
 	mov	r9, #20
 	.loc 3 562 0
-	mov	r2, r6
-	movs	r1, #0
-	ldr	r0, [r4, #3760]
-.LVL423:
+	mov	r2, r5
+	mov	r1, #0
+	ldr	r0, [r8, #3760]
 	bl	FlashEraseBlocks
-.LVL424:
-.L479:
+.LVL419:
+.L475:
 	.loc 3 563 0 discriminator 1
-	uxth	r3, r8
-	cmp	r6, r3
-	bhi	.L481
+	uxth	r2, r7
+	cmp	r5, r2
+	bhi	.L477
+.L478:
 	.loc 3 571 0
-	cmp	r7, #0
-	beq	.L498
+	cmp	r6, #0
 	.loc 3 573 0
-	ldrh	r3, [r4, #80]
-.LVL425:
-	.loc 3 572 0
-	mov	r10, #1
-.LVL426:
+	ldrhne	r3, [r8, #80]
+.LVL420:
+	.loc 3 533 0
+	moveq	r3, #6
+.LVL421:
+	.loc 3 578 0
+	ldr	r8, .L509
+	.loc 3 533 0
+	streq	r3, [fp, #-60]
+	.loc 3 531 0
+	moveq	r3, #1
+.LVL422:
 	.loc 3 573 0
-	str	r3, [sp, #4]
+	strne	r3, [fp, #-52]
+	.loc 3 574 0
+	lsrne	r3, r3, #2
+.LVL423:
+	mov	r10, r8
+.LVL424:
+	.loc 3 531 0
+	streq	r3, [fp, #-52]
 	.loc 3 574 0
-	lsrs	r3, r3, #2
+	strne	r3, [fp, #-60]
+	.loc 3 572 0
+	movne	r3, #1
+.LVL425:
+	strne	r3, [fp, #-56]
+	mov	r3, #0
+.LVL426:
+	.loc 3 534 0
+	streq	r6, [fp, #-56]
+	str	r3, [fp, #-44]
 .LVL427:
-	str	r3, [sp, #8]
-.LVL428:
-.L482:
-	mov	r8, #0
-.LVL429:
-	.loc 3 579 0
-	mov	fp, #20
-.L492:
+.L487:
 	.loc 3 578 0
-	mov	r9, #0
+	mov	r7, #0
 	.loc 3 577 0
-	mov	r6, r9
-.L483:
+	mov	r5, r7
+.L479:
 	.loc 3 578 0 discriminator 1
-	ldrh	r1, [r4, #8]
-	uxth	r3, r9
-.LVL430:
+	ldrh	r1, [r8, #8]
+	uxth	r3, r7
+.LVL428:
 	cmp	r1, r3
-	bhi	.L487
+	bhi	.L482
 	.loc 3 593 0
-	cbz	r6, .L470
-	.loc 3 597 0
-	mov	r9, #0
+	cmp	r5, #0
+	beq	.L467
 	.loc 3 596 0
-	movs	r3, #1
-	mov	r2, r10
-	mov	r1, r6
-	ldr	r0, [r4, #3760]
+	ldr	r2, [fp, #-56]
+.LVL429:
+	mov	r3, #1
+	mov	r1, r5
+	ldr	r0, [r8, #3760]
 	bl	FlashProgPages
-.LVL431:
-.L489:
+.LVL430:
+	.loc 3 597 0
+	mov	r9, #0
+	.loc 3 598 0
+	mov	r2, #20
+.L484:
 	.loc 3 597 0 discriminator 1
 	uxth	r3, r9
-	cmp	r6, r3
-	bhi	.L491
+	cmp	r5, r3
+	bhi	.L486
 	.loc 3 604 0
-	ldr	r3, [sp, #8]
+	ldr	r3, [fp, #-44]
+.LVL431:
+	ldr	r2, [fp, #-60]
 .LVL432:
-	add	r8, r8, r3
-.LVL433:
+	add	r7, r3, r2
+	uxth	r3, r7
+	str	r3, [fp, #-44]
 	.loc 3 605 0
-	ldr	r3, [sp, #4]
+	ldr	r2, [fp, #-44]
+.LVL433:
+	ldr	r3, [fp, #-52]
 .LVL434:
-	.loc 3 604 0
-	uxth	r8, r8
-.LVL435:
-	.loc 3 605 0
-	cmp	r3, r8
-	bhi	.L492
-	mov	r8, #0
-.LVL436:
+	cmp	r3, r2
+	bhi	.L487
+	mov	r7, #0
 	.loc 3 611 0 discriminator 1
 	mov	r9, #20
-.L493:
+.L488:
 	.loc 3 610 0 discriminator 1
-	uxth	r3, r8
-.LVL437:
-	cmp	r6, r3
-	bhi	.L495
+	uxth	r3, r7
+.LVL435:
+	cmp	r5, r3
+	bhi	.L490
 	.loc 3 615 0
-	ldr	r3, [sp]
-.LVL438:
+	ldr	r3, [fp, #-48]
+.LVL436:
+	adds	r6, r6, #0
+.LVL437:
+	movne	r6, #1
 	cmp	r3, #63
-	bls	.L496
-	.loc 3 615 0 is_stmt 0 discriminator 1
-	cbz	r7, .L470
-.L496:
-	.loc 3 616 0 is_stmt 1
-	mov	r2, r6
-	mov	r1, r10
-	ldr	r0, [r4, #3760]
+	movhi	r8, r6
+	orrls	r8, r6, #1
+	cmp	r8, #0
+	beq	.L467
+	.loc 3 616 0
+	mov	r2, r5
+.LVL438:
+	ldr	r1, [fp, #-56]
+	ldr	r0, [r10, #3760]
 	bl	FlashEraseBlocks
 .LVL439:
-.L470:
+.L467:
 	.loc 3 619 0
-	mov	r0, r5
+	mov	r0, r4
+	sub	sp, fp, #40
+.LCFI197:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .LVL440:
-	add	sp, sp, #20
-.LCFI70:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL441:
-.L476:
-.LCFI71:
+.L472:
+.LCFI198:
 	.loc 3 540 0
-	uxth	r3, r10
-	ldr	r0, [r4, #3760]
-.LVL442:
-	movs	r2, #0
-	mul	r1, r9, r3
+	uxth	r2, r10
+	ldr	r0, [r8, #3760]
+	mov	r3, #0
+	mul	r1, r9, r2
 	.loc 3 541 0
-	add	r3, r3, r4
+	add	r2, r8, r2
 	.loc 3 540 0
-	str	r2, [r0, r1]
+	str	r3, [r0, r1]
 	.loc 3 541 0
-	ldr	r1, [sp]
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldr	r1, [fp, #-48]
+	ldrb	r0, [r2, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL443:
-	mov	r8, r0
+.LVL441:
+	.loc 3 543 0
+	cmp	r6, #0
+	.loc 3 541 0
+	mov	r7, r0
 	.loc 3 543 0
-	cbz	r7, .L472
+	beq	.L469
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL444:
-	cbnz	r0, .L473
-.L472:
+.LVL442:
+	cmp	r0, #0
+	bne	.L470
+.L469:
 	.loc 3 548 0
-	mov	r0, r8
+	mov	r0, r7
 	bl	FtlBbmIsBadBlock
+.LVL443:
+	cmp	r0, #0
+	.loc 3 554 0
+	addne	r4, r4, #1
+.LVL444:
+	uxthne	r4, r4
 .LVL445:
-	cbnz	r0, .L474
+	.loc 3 548 0
+	bne	.L470
 	.loc 3 549 0
-	ldr	r1, [r4, #3760]
-	lsl	r3, r8, #10
-	.loc 3 551 0
-	ldr	r0, [fp, #3772]
+	ldr	r1, [r8, #3760]
+	lsl	r7, r7, #10
+	.loc 3 550 0
+	ldr	r2, [r8, #3768]
 	.loc 3 549 0
-	mla	r1, r9, r6, r1
-	str	r3, [r1, #4]
+	mla	r1, r9, r5, r1
 	.loc 3 550 0
-	ldr	r3, [r4, #3768]
-	str	r3, [r1, #8]
+	str	r2, [r1, #8]
 	.loc 3 551 0
-	ldrh	r3, [r4, #88]
-	muls	r3, r6, r3
-	.loc 3 552 0
-	add	r6, r6, #1
+	ldrh	r2, [r8, #88]
+	.loc 3 549 0
+	str	r7, [r1, #4]
 	.loc 3 551 0
-	it	mi
-	addmi	r3, r3, #3
+	mul	r2, r5, r2
 	.loc 3 552 0
-	uxth	r6, r6
+	add	r5, r5, #1
+	uxth	r5, r5
 	.loc 3 551 0
-	bic	r3, r3, #3
-	add	r3, r3, r0
-	str	r3, [r1, #12]
-.L473:
+	add	r0, r2, #3
+	cmp	r2, #0
+	movlt	r2, r0
+	ldr	r0, [r8, #3772]
+	bic	r2, r2, #3
+	add	r2, r0, r2
+	str	r2, [r1, #12]
+.L470:
 	add	r10, r10, #1
-	b	.L471
-.L474:
-	.loc 3 554 0
-	adds	r5, r5, #1
-.LVL446:
-	uxth	r5, r5
-.LVL447:
-	b	.L473
-.L481:
+	b	.L468
+.L477:
 	.loc 3 564 0
-	mul	r3, r9, r8
-	ldr	r2, [r4, #3760]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L480
+	mul	r2, r9, r7
+	ldr	r1, [r8, #3760]
+	add	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cmn	r2, #1
+	bne	.L476
 	.loc 3 566 0
-	ldr	r0, [r1, #4]
+	ldr	r0, [r0, #4]
 	.loc 3 565 0
-	adds	r5, r5, #1
-.LVL448:
-	uxth	r5, r5
-.LVL449:
+	add	r4, r4, #1
+.LVL446:
+	uxth	r4, r4
+.LVL447:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL450:
-.L480:
-	add	r8, r8, #1
-	b	.L479
-.L498:
-	.loc 3 533 0
-	movs	r3, #6
-.LVL451:
-	.loc 3 534 0
-	mov	r10, r7
-.LVL452:
-	.loc 3 533 0
-	str	r3, [sp, #8]
-	.loc 3 531 0
-	movs	r3, #1
-.LVL453:
-	str	r3, [sp, #4]
-	b	.L482
-.LVL454:
-.L487:
+.LVL448:
+.L476:
+	add	r7, r7, #1
+	b	.L475
+.LVL449:
+.L482:
 	.loc 3 579 0
-	uxth	r3, r9
-	ldr	r0, [r4, #3760]
-	movs	r2, #0
-	mul	r1, fp, r3
+	uxth	r3, r7
+	mov	r2, #20
+.LVL450:
+	ldr	r0, [r8, #3760]
+	mul	r1, r2, r3
+	mov	r2, #0
 	.loc 3 580 0
-	add	r3, r3, r4
+	add	r3, r8, r3
 	.loc 3 579 0
 	str	r2, [r0, r1]
 	.loc 3 580 0
-	ldr	r1, [sp]
+	ldr	r1, [fp, #-48]
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL455:
-	str	r0, [sp, #12]
+.LVL451:
+	.loc 3 581 0
+	cmp	r6, #0
+	.loc 3 580 0
+	mov	r9, r0
 	.loc 3 581 0
-	cbz	r7, .L484
+	beq	.L480
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL456:
-	cbnz	r0, .L485
-.L484:
+.LVL452:
+	cmp	r0, #0
+	bne	.L481
+.L480:
 	.loc 3 585 0
-	ldr	r0, [sp, #12]
+	mov	r0, r9
 	bl	FtlBbmIsBadBlock
-.LVL457:
-	cbnz	r0, .L485
-	.loc 3 586 0
-	ldr	r1, [r4, #3760]
-	ldr	r3, [sp, #12]
-	.loc 3 588 0
-	ldr	r2, .L515
+.LVL453:
+	cmp	r0, #0
+	bne	.L481
 	.loc 3 586 0
-	mla	r1, fp, r6, r1
-	.loc 3 588 0
-	ldr	r0, [r2, #3768]
+	ldr	r1, [r8, #3760]
+	mov	r3, #20
+	mla	r1, r3, r5, r1
+	ldr	r3, [fp, #-44]
+.LVL454:
+	add	r9, r3, r9, lsl #10
+	.loc 3 587 0
+	ldr	r3, [r8, #3776]
+.LVL455:
 	.loc 3 586 0
-	add	r3, r8, r3, lsl #10
-	str	r3, [r1, #4]
+	str	r9, [r1, #4]
 	.loc 3 587 0
-	ldr	r3, [r4, #3776]
 	str	r3, [r1, #8]
 	.loc 3 588 0
-	ldrh	r3, [r4, #88]
-	muls	r3, r6, r3
-	.loc 3 589 0
-	add	r6, r6, #1
-	.loc 3 588 0
-	it	mi
-	addmi	r3, r3, #3
+	ldrh	r3, [r8, #88]
+	mul	r3, r5, r3
 	.loc 3 589 0
-	uxth	r6, r6
+	add	r5, r5, #1
+	uxth	r5, r5
 	.loc 3 588 0
+	add	r0, r3, #3
+	cmp	r3, #0
+	movlt	r3, r0
+	ldr	r0, [r8, #3768]
 	bic	r3, r3, #3
-	add	r3, r3, r0
+	add	r3, r0, r3
 	str	r3, [r1, #12]
-.L485:
-	add	r9, r9, #1
-	b	.L483
-.L491:
+.L481:
+	add	r7, r7, #1
+	b	.L479
+.L486:
 	.loc 3 598 0
-	mul	r3, fp, r9
-	ldr	r2, [r4, #3760]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbz	r3, .L490
+	mul	r3, r2, r9
+	ldr	r1, [r10, #3760]
+	add	r0, r1, r3
+	ldr	r3, [r1, r3]
+	cmp	r3, #0
+	beq	.L485
 	.loc 3 600 0
-	ldr	r0, [r1, #4]
+	ldr	r0, [r0, #4]
 	.loc 3 599 0
-	adds	r5, r5, #1
-.LVL458:
-	uxth	r5, r5
-.LVL459:
+	add	r4, r4, #1
+.LVL456:
+	str	r2, [fp, #-64]
+	uxth	r4, r4
+.LVL457:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL460:
-.L490:
+.LVL458:
+	ldr	r2, [fp, #-64]
+.L485:
 	add	r9, r9, #1
-	b	.L489
-.LVL461:
-.L495:
+	b	.L484
+.LVL459:
+.L490:
 	.loc 3 611 0
-	cbz	r7, .L494
+	cmp	r6, #0
+	beq	.L489
 	.loc 3 611 0 is_stmt 0 discriminator 1
-	mul	r3, r9, r8
-	ldr	r2, [r4, #3760]
-	adds	r1, r2, r3
+	mul	r3, r9, r7
+	ldr	r2, [r10, #3760]
+.LVL460:
+	add	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L494
+	cmp	r3, #0
+	bne	.L489
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
-	movs	r1, #1
+	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL462:
-.L494:
-	add	r8, r8, #1
-	b	.L493
-.L516:
+.LVL461:
+.L489:
+	add	r7, r7, #1
+	b	.L488
+.L510:
 	.align	2
-.L515:
+.L509:
 	.word	.LANCHOR0
 .LFE159:
-	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.align	1
+	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-	.fnstart
 .LFB193:
 	.loc 2 181 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI72:
-.LBB315:
-.LBB316:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI199:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI200:
+	sub	fp, ip, #4
+.LCFI201:
+.LBB313:
+.LBB314:
 	.loc 2 89 0
-	ldr	r4, .L524
-.LBE316:
-.LBE315:
+	ldr	r4, .L518
+.LBE314:
+.LBE313:
 	.loc 2 203 0
-	ldr	r6, .L524+4
-.L518:
-.LBB318:
-.LBB317:
+	ldr	r6, .L518+4
+.L512:
+.LBB316:
+.LBB315:
 	.loc 2 89 0
 	ldrh	r1, [r4, #194]
-.LBE317:
-.LBE318:
+.LBE315:
+.LBE316:
 	.loc 2 186 0
-	cbz	r1, .L519
+	cmp	r1, #0
+	beq	.L513
 	.loc 2 187 0
 	ldrh	r3, [r4, #190]
 	.loc 2 188 0
-	subs	r1, r1, #1
+	sub	r1, r1, #1
 	strh	r1, [r4, #194]	@ movhi
 	.loc 2 187 0
 	add	r2, r4, r3, lsl #1
 	.loc 2 189 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	ubfx	r3, r3, #0, #10
 	.loc 2 187 0
 	ldrh	r5, [r2, #196]
 	.loc 2 189 0
 	strh	r3, [r4, #190]	@ movhi
-.LBB319:
+.LBB317:
 	.loc 2 191 0
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL463:
+.LVL462:
 	mov	r7, r0
 	.loc 2 192 0
 	ldr	r0, [r4, #3760]
-	lsls	r3, r5, #10
+	lsl	r3, r5, #10
 	.loc 2 193 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	.loc 2 192 0
 	str	r3, [r0, #4]
 	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL464:
+.LVL463:
 	.loc 2 194 0
 	ldr	r2, [r4, #2304]
-	ldrh	r3, [r2, r7, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-.LBE319:
+	lsl	r0, r7, #1
+	ldrh	r3, [r2, r0]
+	add	r3, r3, #1
+	strh	r3, [r2, r0]	@ movhi
+.LBE317:
 	.loc 2 202 0
 	movw	r2, #65533
-.LBB320:
+.LBB318:
 	.loc 2 195 0
 	ldr	r3, [r4, #2536]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #2536]
-.LBE320:
+.LBE318:
 	.loc 2 202 0
-	subs	r3, r5, #1
+	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L523
+	bls	.L517
 	.loc 2 203 0
 	ldrh	r2, [r4, #194]
 	mov	r1, r5
 	mov	r0, r6
 	bl	printk
-.LVL465:
+.LVL464:
 	.loc 2 205 0
-	b	.L518
-.L519:
+	b	.L512
+.L513:
 	.loc 2 199 0
-	ldr	r0, .L524+8
+	ldr	r0, .L518+8
 	bl	printk
-.LVL466:
-.L522:
-	b	.L522
-.L523:
+.LVL465:
+.L516:
+	b	.L516
+.L517:
 	.loc 2 208 0
 	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, pc}
-.L525:
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L519:
 	.align	2
-.L524:
+.L518:
 	.word	.LANCHOR0
 	.word	.LC79
 	.word	.LC78
 .LFE193:
-	.fnend
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.align	1
+	.align	2
 	.global	ftl_map_blk_alloc_new_blk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-	.fnstart
 .LFB205:
 	.loc 2 562 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL467:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI73:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL466:
+	mov	ip, sp
+.LCFI202:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI203:
+	sub	fp, ip, #4
+.LCFI204:
+	.loc 2 566 0
+	ldrh	r1, [r0, #10]
 	.loc 2 562 0
 	mov	r4, r0
 	.loc 2 566 0
-	ldrh	r1, [r0, #10]
-	movs	r3, #0
+	mov	r3, #0
 	ldr	r2, [r0, #12]
-.LVL468:
-.L527:
+.LVL467:
+.L521:
 	uxth	r5, r3
 	.loc 2 566 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcs	.L530
+	bcs	.L524
 	.loc 2 567 0 is_stmt 1
 	mov	r7, r2
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	ldrh	r6, [r7]
-	adds	r2, r2, #2
+	add	r2, r2, #2
 	cmp	r6, #0
-	bne	.L527
+	bne	.L521
 	.loc 2 568 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL469:
+.LVL468:
 	.loc 2 569 0
-	subs	r3, r0, #1
+	sub	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	.loc 2 568 0
@@ -6022,377 +6050,389 @@ ftl_map_blk_alloc_new_blk:
 	strh	r0, [r7]	@ movhi
 	.loc 2 569 0
 	cmp	r3, r2
-	bls	.L528
+	bls	.L522
 	.loc 2 570 0
-	ldr	r3, .L534
-	ldr	r0, .L534+4
+	ldr	r3, .L528
+	ldr	r0, .L528+4
 	ldrh	r2, [r3, #194]
 	bl	printk
-.LVL470:
-.L529:
-	b	.L529
-.L528:
-	.loc 2 576 0
-	ldr	r3, [r4, #28]
+.LVL469:
+.L523:
+	b	.L523
+.L522:
+	.loc 2 576 0
+	ldr	r3, [r4, #28]
 	.loc 2 574 0
 	strh	r6, [r4, #2]	@ movhi
 	.loc 2 575 0
 	strh	r5, [r4]	@ movhi
 	.loc 2 576 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #28]
 	.loc 2 577 0
 	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.LVL471:
-.L530:
+.LVL470:
+.L524:
 	.loc 2 581 0
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L532
-.LBB323:
-.LBB324:
+	bhi	.L526
+.LBB321:
+.LBB322:
 	movw	r2, #581
-	ldr	r1, .L534+8
-	ldr	r0, .L534+12
+	ldr	r1, .L528+8
+	ldr	r0, .L528+12
 	bl	printk
-.LVL472:
-.L532:
-.LBE324:
-.LBE323:
+.LVL471:
+.L526:
+.LBE322:
+.LBE321:
 	.loc 2 583 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL473:
-.L535:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L529:
 	.align	2
-.L534:
+.L528:
 	.word	.LANCHOR0
 	.word	.LC80
 	.word	.LANCHOR1+160
 	.word	.LC1
 .LFE205:
-	.fnend
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.align	1
+	.align	2
 	.global	FlashTestBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-	.fnstart
 .LFB275:
 	.loc 1 156 0
-	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL474:
-	.loc 1 161 0
-	cmp	r0, #11
+	@ args = 0, pretend = 0, frame = 84
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL472:
+	mov	ip, sp
+.LCFI205:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI206:
+	sub	fp, ip, #4
+.LCFI207:
+	sub	sp, sp, #84
 	.loc 1 156 0
-	push	{r4, r5, lr}
-	.save {r4, r5, lr}
-.LCFI74:
-	mov	r4, r0
-	.pad #92
-	sub	sp, sp, #92
-.LCFI75:
+	uxth	r4, r0
+.LVL473:
 	.loc 1 161 0
-	bls	.L538
-.LBB337:
-.LBB338:
+	cmp	r4, #11
+	.loc 1 162 0
+	movls	r4, #0
+.LVL474:
+	.loc 1 161 0
+	bls	.L530
+.LBB335:
+.LBB336:
 	.loc 1 165 0
-	ldr	r5, .L539
+	ldr	r5, .L533
 	.loc 1 166 0
-	add	r0, sp, #24
+	sub	r0, fp, #84
+.LBB337:
+.LBB338:
 .LBB339:
-.LBB340:
-.LBB341:
 	.loc 1 202 0
-	movs	r2, #32
-	movs	r1, #165
-.LBE341:
-.LBE340:
+	mov	r2, #32
+	mov	r1, #165
 .LBE339:
-	.loc 1 169 0
-	lsls	r4, r4, #10
-.LVL475:
+.LBE338:
+.LBE337:
 	.loc 1 166 0
-	str	r0, [sp, #16]
+	str	r0, [fp, #-92]
+.LVL475:
+	.loc 1 169 0
+	lsl	r4, r4, #10
+.LVL476:
 	.loc 1 165 0
-	str	r5, [sp, #12]
-.LBB344:
-.LBB343:
+	str	r5, [fp, #-96]
 .LBB342:
+.LBB341:
+.LBB340:
 	.loc 1 202 0
 	bl	memset
-.LVL476:
+.LVL477:
+.LBE340:
+.LBE341:
 .LBE342:
-.LBE343:
-.LBE344:
-	.loc 1 170 0
-	movs	r2, #1
+.LBB343:
+.LBB344:
 .LBB345:
-.LBB346:
-.LBB347:
-	.loc 1 202 0
-	mov	r3, #1515870810
-.LBE347:
-.LBE346:
+	ldr	r3, .L533+4
 .LBE345:
+.LBE344:
+.LBE343:
 	.loc 1 170 0
+	mov	r2, #1
 	mov	r1, r2
-	add	r0, sp, #4
-.LBB350:
-.LBB349:
+	sub	r0, fp, #104
+	.loc 1 169 0
+	str	r4, [fp, #-100]
 .LBB348:
+.LBB347:
+.LBB346:
 	.loc 1 202 0
 	str	r3, [r5]
 	str	r3, [r5, #4]
+.LBE346:
+.LBE347:
 .LBE348:
-.LBE349:
-.LBE350:
-	.loc 1 169 0
-	str	r4, [sp, #8]
 	.loc 1 170 0
 	bl	FlashEraseBlocks
-.LVL477:
+.LVL478:
 	.loc 1 171 0
-	movs	r3, #1
-	add	r0, sp, #4
+	mov	r3, #1
+	sub	r0, fp, #104
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL478:
+.LVL479:
 	.loc 1 172 0
-	ldr	r4, [sp, #4]
+	ldr	r4, [fp, #-104]
 	.loc 1 178 0
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
+	mov	r2, #1
+	mov	r1, #0
+	sub	r0, fp, #104
 	.loc 1 172 0
 	adds	r4, r4, #0
-	it	ne
 	movne	r4, #1
-	negs	r4, r4
+	rsb	r4, r4, #0
 	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL479:
-.L536:
-.LBE338:
-.LBE337:
+.LVL480:
+.L530:
+.LBE336:
+.LBE335:
 	.loc 1 180 0
 	mov	r0, r4
-.LVL480:
-	add	sp, sp, #92
-.LCFI76:
-	@ sp needed
-	pop	{r4, r5, pc}
-.LVL481:
-.L538:
-.LCFI77:
-	.loc 1 162 0
-	movs	r4, #0
-.LVL482:
-	b	.L536
-.L540:
+	sub	sp, fp, #20
+.LCFI208:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L534:
 	.align	2
-.L539:
+.L533:
 	.word	ftl_temp_buf
+	.word	1515870810
 .LFE275:
-	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
-	.align	1
+	.align	2
 	.global	FlashGetBadBlockList
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-	.fnstart
 .LFB276:
 	.loc 1 183 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL483:
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI78:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL481:
+	mov	ip, sp
+.LCFI209:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI210:
+	sub	fp, ip, #4
+.LCFI211:
+.LBB359:
+.LBB360:
 .LBB361:
-.LBB362:
-.LBB363:
 	.loc 1 202 0
 	mov	r2, #256
-.LBE363:
-.LBE362:
 .LBE361:
+.LBE360:
+.LBE359:
 	.loc 1 183 0
 	mov	r5, r1
-.LBB368:
 .LBB366:
 .LBB364:
+.LBB362:
 	.loc 1 202 0
-	movs	r1, #255
-.LVL484:
+	mov	r1, #255
+.LVL482:
+.LBE362:
 .LBE364:
 .LBE366:
-.LBE368:
 	.loc 1 183 0
 	mov	r4, r0
-.LBB369:
 .LBB367:
 .LBB365:
+.LBB363:
 	.loc 1 202 0
 	bl	memset
-.LVL485:
+.LVL483:
+.LBE363:
 .LBE365:
 .LBE367:
-.LBE369:
 	.loc 1 187 0
-	ldr	r3, .L548
+	ldr	r3, .L542
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL486:
+.LVL484:
 	uxth	r0, r0
-.LVL487:
+.LVL485:
 	.loc 1 188 0
 	cmp	r0, #50
-	bls	.L542
+	bls	.L536
+.LBB368:
+.LBB369:
 .LBB370:
-.LBB371:
-.LBB372:
 	.loc 1 202 0
 	mov	r2, #256
-	movs	r1, #255
+	mov	r1, #255
 	mov	r0, r4
-.LVL488:
+.LVL486:
 	bl	memset
-.LVL489:
-.LBE372:
-.LBE371:
+.LVL487:
 .LBE370:
+.LBE369:
+.LBE368:
 	.loc 1 190 0
-	movs	r0, #0
-.LVL490:
-.L542:
+	mov	r0, #0
+.LVL488:
+.L536:
 	.loc 1 192 0
-	ldr	r3, .L548+4
+	ldr	r3, .L542+4
+.LVL489:
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L547
-	add	r1, r4, r0, lsl #1
-.LVL491:
-	mov	r3, r4
-.L544:
-	.loc 1 193 0 discriminator 1
-	cmp	r3, r1
-	bne	.L545
-.L547:
-.LVL492:
-	.loc 1 198 0
-	pop	{r3, r4, r5, pc}
-.LVL493:
-.L545:
+	moveq	r3, r4
+.LVL490:
+	addeq	r1, r3, r0, lsl #1
+	beq	.L538
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L539:
 	.loc 1 194 0 discriminator 3
 	ldrh	r2, [r3]
-	lsrs	r2, r2, #1
+	lsr	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L544
-.L549:
+.L538:
+	.loc 1 193 0 discriminator 1
+	cmp	r3, r1
+	bne	.L539
+.LVL491:
+	.loc 1 198 0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L543:
 	.align	2
-.L548:
+.L542:
 	.word	g_nand_ops
 	.word	g_nand_phy_info
 .LFE276:
-	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.align	1
+	.align	2
 	.global	ftl_memset
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-	.fnstart
 .LFB277:
 	.loc 1 201 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL494:
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI79:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL492:
+	mov	ip, sp
+.LCFI212:
+	push	{r4, fp, ip, lr, pc}
+.LCFI213:
+	sub	fp, ip, #4
+.LCFI214:
+.LBB375:
+	.loc 1 202 0
+	cmp	r2, #0
+.LBE375:
 	.loc 1 201 0
 	mov	r4, r0
-.LBB377:
+.LBB376:
 	.loc 1 202 0
-	cbz	r2, .L551
-.LBE377:
+	beq	.L545
+.LBE376:
+.LBB377:
 .LBB378:
-.LBB379:
 	bl	memset
-.LVL495:
-.L551:
-.LBE379:
+.LVL493:
+.L545:
 .LBE378:
+.LBE377:
 	.loc 1 203 0 discriminator 8
 	mov	r0, r4
-	pop	{r4, pc}
+	ldmfd	sp, {r4, fp, sp, pc}
 .LFE277:
-	.fnend
 	.size	ftl_memset, .-ftl_memset
-	.align	1
+	.align	2
 	.global	FtlMemInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
-	.fnstart
 .LFB156:
 	.loc 3 279 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI80:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI215:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI216:
+	sub	fp, ip, #4
+.LCFI217:
+	.loc 3 282 0
+	ldr	r4, .L650
 	.loc 3 297 0
 	movw	r3, #65535
+	.loc 3 301 0
+	movw	r2, #3178
 	.loc 3 282 0
-	ldr	r4, .L656
-	movs	r5, #0
+	mov	r5, #0
 	.loc 3 311 0
-	movs	r6, #12
-	.loc 3 312 0
-	movs	r7, #20
-	.loc 3 310 0
-	ldrh	r0, [r4, #82]
+	mov	r6, #12
 	.loc 3 297 0
 	str	r3, [r4, #3784]
 	.loc 3 301 0
-	strh	r3, [r4, #3178]	@ movhi
+	mvn	r3, #0
+	strh	r3, [r4, r2]	@ movhi
 	.loc 3 302 0
-	strh	r3, [r4, #3180]	@ movhi
+	movw	r2, #3180
+	strh	r3, [r4, r2]	@ movhi
 	.loc 3 303 0
-	movs	r3, #32
-	strh	r3, [r4, #3124]	@ movhi
+	mov	r2, #32
+	movw	r3, #3124
 	.loc 3 310 0
-	lsls	r0, r0, #1
+	ldrh	r0, [r4, #82]
+	.loc 3 303 0
+	strh	r2, [r4, r3]	@ movhi
 	.loc 3 304 0
-	movs	r3, #128
+	mov	r2, #128
+	movw	r3, #3126
 	.loc 3 282 0
 	str	r5, [r4, #2516]
 	.loc 3 304 0
-	strh	r3, [r4, #3126]	@ movhi
+	strh	r2, [r4, r3]	@ movhi
+	.loc 3 305 0
+	movw	r3, #3132
+	strh	r5, [r4, r3]	@ movhi
+	.loc 3 306 0
+	movw	r3, #3182
+	strh	r5, [r4, r3]	@ movhi
+	.loc 3 310 0
+	lsl	r0, r0, #1
+	.loc 3 307 0
+	movw	r3, #3218
 	.loc 3 283 0
 	str	r5, [r4, #2520]
+	.loc 3 307 0
+	strh	r5, [r4, r3]	@ movhi
+	.loc 3 312 0
+	mov	r7, #20
 	.loc 3 284 0
 	str	r5, [r4, #2504]
 	.loc 3 285 0
@@ -6425,52 +6465,46 @@ FtlMemInit:
 	str	r5, [r4, #3128]
 	.loc 3 300 0
 	str	r5, [r4, #3764]
-	.loc 3 305 0
-	strh	r5, [r4, #3132]	@ movhi
-	.loc 3 306 0
-	strh	r5, [r4, #3182]	@ movhi
-	.loc 3 307 0
-	strh	r5, [r4, #3218]	@ movhi
 	.loc 3 310 0
 	bl	ftl_malloc
-.LVL496:
+.LVL494:
 	str	r0, [r4, #3164]
 	.loc 3 311 0
 	ldrh	r0, [r4, #82]
-	muls	r0, r6, r0
+	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL497:
+.LVL495:
 	.loc 3 312 0
 	ldrh	r3, [r4, #8]
 	.loc 3 311 0
 	str	r0, [r4, #3172]
 	.loc 3 312 0
-	muls	r7, r3, r7
+	mul	r7, r7, r3
 	.loc 3 313 0
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL498:
+.LVL496:
 	str	r0, [r4, #3792]
 	.loc 3 314 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL499:
+.LVL497:
 	str	r0, [r4, #3796]
 	.loc 3 315 0
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL500:
+.LVL498:
 	str	r0, [r4, #3800]
 	.loc 3 316 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL501:
+.LVL499:
 	str	r0, [r4, #3760]
 	.loc 3 317 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL502:
+.LVL500:
 	.loc 3 320 0
 	ldrh	r3, [r4, #8]
 	.loc 3 319 0
@@ -6478,191 +6512,193 @@ FtlMemInit:
 	.loc 3 317 0
 	str	r0, [r4, #3156]
 	.loc 3 320 0
-	lsls	r3, r3, #1
+	lsl	r3, r3, #1
 	.loc 3 321 0
 	mov	r0, r7
 	.loc 3 320 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #3160]
 	.loc 3 321 0
 	bl	ftl_malloc
-.LVL503:
+.LVL501:
 	str	r0, [r4, #3240]
 	.loc 3 322 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL504:
+.LVL502:
 	str	r0, [r4, #3804]
 	.loc 3 323 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL505:
+.LVL503:
 	str	r0, [r4, #3808]
 	.loc 3 324 0
 	ldr	r0, [r4, #3160]
-	muls	r0, r7, r0
+	mul	r0, r0, r7
 	bl	ftl_malloc
-.LVL506:
+.LVL504:
 	str	r0, [r4, #3148]
 	.loc 3 325 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL507:
+.LVL505:
 	str	r0, [r4, #3776]
 	.loc 3 326 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL508:
+.LVL506:
 	str	r0, [r4, #3768]
 	.loc 3 327 0
 	ldr	r0, [r4, #3160]
-	muls	r0, r6, r0
+	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL509:
+.LVL507:
 	.loc 3 329 0
 	ldrh	r3, [r4, #88]
 	ldrh	r7, [r4, #8]
 	.loc 3 327 0
 	str	r0, [r4, #3144]
 	.loc 3 329 0
-	muls	r7, r3, r7
+	mul	r7, r7, r3
 	.loc 3 330 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL510:
+.LVL508:
 	str	r0, [r4, #3244]
 	.loc 3 331 0
-	lsls	r0, r7, #2
+	lsl	r0, r7, #2
+	.loc 3 335 0
+	movw	r7, #3812
+	.loc 3 331 0
 	bl	ftl_malloc
-.LVL511:
+.LVL509:
 	.loc 3 332 0
 	ldrh	r3, [r4, #88]
 	.loc 3 331 0
 	str	r0, [r4, #3772]
 	.loc 3 332 0
 	ldr	r0, [r4, #3160]
-	muls	r0, r3, r0
+	mul	r0, r0, r3
 	bl	ftl_malloc
-.LVL512:
+.LVL510:
 	str	r0, [r4, #3152]
 	.loc 3 335 0
 	ldrh	r0, [r4, #18]
-	lsls	r0, r0, #1
+	lsl	r0, r0, #1
 	uxth	r0, r0
-	strh	r0, [r4, #3812]	@ movhi
+	strh	r0, [r4, r7]	@ movhi
 	.loc 3 336 0
 	bl	ftl_malloc
-.LVL513:
-	.loc 3 337 0
-	ldrh	r3, [r4, #3812]
-	.loc 3 336 0
+.LVL511:
 	str	r0, [r4, #3816]
-	.loc 3 338 0
-	ldr	r0, .L656+4
 	.loc 3 337 0
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
+	ldrh	r0, [r4, r7]
 	.loc 3 338 0
-	and	r0, r0, r3, lsl #9
+	ldr	r3, .L650+4
 	.loc 3 337 0
-	strh	r3, [r4, #3812]	@ movhi
+	add	r0, r0, #544
+	add	r0, r0, #3
+	lsr	r0, r0, #9
+	strh	r0, [r4, r7]	@ movhi
 	.loc 3 338 0
+	and	r0, r3, r0, lsl #9
 	bl	ftl_malloc
-.LVL514:
+.LVL512:
 	.loc 3 345 0
 	ldrh	r7, [r4, #18]
 	.loc 3 338 0
 	str	r0, [r4, #3820]
 	.loc 3 339 0
-	adds	r0, r0, #32
+	add	r0, r0, #32
 	str	r0, [r4, #2304]
 	.loc 3 345 0
-	lsls	r7, r7, #1
+	lsl	r7, r7, #1
 	.loc 3 347 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL515:
+.LVL513:
 	str	r0, [r4, #3824]
 	.loc 3 349 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL516:
+.LVL514:
 	.loc 3 350 0
 	ldr	r7, [r4, #104]
 	.loc 3 349 0
 	str	r0, [r4, #2300]
 	.loc 3 350 0
-	lsls	r7, r7, #1
+	lsl	r7, r7, #1
 	.loc 3 351 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL517:
+.LVL515:
 	str	r0, [r4, #3828]
 	.loc 3 352 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL518:
+.LVL516:
 	str	r0, [r4, #3832]
 	.loc 3 353 0
 	ldrh	r0, [r4, #18]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
+	lsr	r0, r0, #3
+	add	r0, r0, #4
 	bl	ftl_malloc
-.LVL519:
+.LVL517:
 	str	r0, [r4]
 	.loc 3 354 0
 	ldrh	r0, [r4, #96]
-	lsls	r0, r0, #1
+	lsl	r0, r0, #1
 	bl	ftl_malloc
-.LVL520:
+.LVL518:
 	str	r0, [r4, #124]
 	.loc 3 355 0
 	ldrh	r0, [r4, #96]
-	lsls	r0, r0, #1
+	lsl	r0, r0, #1
 	bl	ftl_malloc
-.LVL521:
+.LVL519:
 	str	r0, [r4, #3836]
 	.loc 3 356 0
 	ldrh	r0, [r4, #96]
-	lsls	r0, r0, #2
+	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL522:
+.LVL520:
 	str	r0, [r4, #3840]
 	.loc 3 357 0
 	ldrh	r0, [r4, #98]
-	lsls	r0, r0, #2
+	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL523:
+.LVL521:
 	.loc 3 358 0
 	ldrh	r2, [r4, #98]
 	mov	r1, r5
 	.loc 3 357 0
 	str	r0, [r4, #3844]
-	add	r5, r4, #156
+	.loc 3 370 0
+	movw	r5, #3860
 	.loc 3 358 0
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL524:
+.LVL522:
 	.loc 3 360 0
 	ldrh	r0, [r4, #112]
 	.loc 3 361 0
-	lsls	r0, r0, #2
+	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL525:
+.LVL523:
 	str	r0, [r4, #3848]
 	.loc 3 362 0
 	ldr	r0, [r4, #104]
 	.loc 3 363 0
-	lsls	r0, r0, #2
+	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL526:
+.LVL524:
 	str	r0, [r4, #3852]
 	.loc 3 364 0
 	ldrh	r0, [r4, #114]
 	.loc 3 365 0
-	muls	r0, r6, r0
+	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL527:
+.LVL525:
 	.loc 3 366 0
 	ldrh	r3, [r4, #114]
 	.loc 3 365 0
@@ -6670,385 +6706,381 @@ FtlMemInit:
 	.loc 3 366 0
 	ldrh	r0, [r4, #86]
 	.loc 3 367 0
-	muls	r0, r3, r0
+	mul	r0, r0, r3
 	bl	ftl_malloc
-.LVL528:
-	.loc 3 368 0
-	ldrh	r3, [r4, #18]
-	.loc 3 367 0
+.LVL526:
 	str	r0, [r4, #3856]
+	.loc 3 368 0
+	ldrh	r0, [r4, #18]
 	.loc 3 369 0
-	movs	r0, #6
-	muls	r0, r3, r0
+	lsl	r0, r0, #3
 	bl	ftl_malloc
-.LVL529:
+.LVL527:
 	str	r0, [r4, #2292]
 	.loc 3 370 0
 	ldrh	r0, [r4, #74]
 	.loc 3 371 0
 	ldrh	r3, [r4, #30]
 	.loc 3 370 0
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r4, #3860]	@ movhi
+	add	r0, r0, #31
+	asr	r0, r0, #5
+	strh	r0, [r4, r5]	@ movhi
 	.loc 3 371 0
-	muls	r0, r3, r0
+	mul	r0, r0, r3
 	.loc 3 372 0
-	lsls	r0, r0, #2
+	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL530:
+.LVL528:
 	.loc 3 374 0
-	ldrh	r2, [r4, #3860]
+	ldrh	r2, [r4, r5]
+	add	ip, r4, #156
 	.loc 3 373 0
-	movs	r3, #1
-.LVL531:
-	ldrh	r6, [r4, #30]
+	ldrh	lr, [r4, #30]
+	mov	r3, #1
+.LVL529:
 	.loc 3 372 0
 	str	r0, [r4, #156]
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	.loc 3 373 0
 	mov	r1, r2
-.L556:
+.L550:
 	.loc 3 373 0 is_stmt 0 discriminator 1
-	cmp	r3, r6
-	bcc	.L557
-	ldr	r2, .L656+8
+	cmp	r3, lr
+	bcc	.L551
+	ldr	r2, .L650+8
 	.loc 3 379 0 is_stmt 1
-	movs	r1, #0
+	mov	r1, #0
 	add	r3, r2, r3, lsl #2
-.LVL532:
-	adds	r2, r2, #56
-	adds	r3, r3, #24
-.L558:
+.LVL530:
+	add	r2, r2, #56
+	add	r3, r3, #24
+.L552:
 	.loc 3 377 0 discriminator 1
 	cmp	r2, r3
-	bne	.L559
+	bne	.L553
 	.loc 3 383 0
 	ldr	r3, [r4, #3828]
-	cbnz	r3, .L560
-.L562:
+	cmp	r3, #0
+	bne	.L554
+.L556:
 	.loc 3 385 0
-	ldr	r1, .L656+12
-	ldr	r0, .L656+16
+	ldr	r1, .L650+12
+	ldr	r0, .L650+16
 	bl	printk
-.LVL533:
+.LVL531:
 	.loc 3 386 0
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL534:
-.L557:
+	mvn	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL532:
+.L551:
 	.loc 3 374 0 discriminator 3
 	ldr	r0, [r4, #156]
 	.loc 3 373 0 discriminator 3
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	.loc 3 374 0 discriminator 3
 	add	r0, r0, r1
 	add	r1, r1, r2
-	str	r0, [r5, #4]!
-	b	.L556
-.LVL535:
-.L559:
+	str	r0, [ip, #4]!
+	b	.L550
+.LVL533:
+.L553:
 	.loc 3 379 0 discriminator 2
 	str	r1, [r3, #4]!
-	b	.L558
-.L657:
-	.align	2
-.L656:
-	.word	.LANCHOR0
-	.word	33553920
-	.word	.LANCHOR0+128
-	.word	.LANCHOR1+186
-	.word	.LC81
-.L560:
+	b	.L552
+.L554:
 	.loc 3 388 0
 	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 393 0
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 398 0
 	ldr	r3, [r4, #3852]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 404 0
 	ldr	r3, [r4, #2468]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 409 0
 	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 414 0
 	ldr	r3, [r4, #2292]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 419 0
 	ldr	r3, [r4, #156]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 425 0
 	ldr	r3, [r4, #2300]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 430 0
 	ldr	r3, [r4, #3164]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 430 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 435 0 is_stmt 1
 	ldr	r3, [r4, #3792]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 435 0 discriminator 2
 	ldr	r3, [r4, #3760]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 435 0 discriminator 3
 	ldr	r3, [r4, #3156]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 435 0 discriminator 4
 	ldr	r3, [r4, #3796]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 440 0 is_stmt 1
 	ldr	r3, [r4, #3240]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 440 0 discriminator 2
 	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 440 0 discriminator 3
 	ldr	r3, [r4, #3148]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 441 0 is_stmt 1
 	ldr	r3, [r4, #3776]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3768]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 441 0 discriminator 2
 	ldr	r3, [r4, #3144]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 446 0 is_stmt 1
 	ldr	r3, [r4, #3244]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 446 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3772]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 446 0 discriminator 2
 	ldr	r3, [r4, #3152]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 452 0 is_stmt 1
 	ldr	r3, [r4, #2304]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 452 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 458 0 is_stmt 1
 	ldr	r3, [r4, #124]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 464 0
-	ldr	r3, .L658
+	ldr	r3, .L650
 	ldr	r2, [r3, #3836]
 	cmp	r2, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 470 0
 	ldr	r2, [r3, #3840]
 	cmp	r2, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 476 0
 	ldr	r3, [r3, #3844]
 	cmp	r3, #0
-	beq	.L562
+	beq	.L556
 	.loc 3 483 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 3 484 0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L659:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L651:
 	.align	2
-.L658:
+.L650:
 	.word	.LANCHOR0
+	.word	33553920
+	.word	.LANCHOR0+128
+	.word	.LANCHOR1+186
+	.word	.LC81
 .LFE156:
-	.fnend
 	.size	FtlMemInit, .-FtlMemInit
-	.align	1
+	.align	2
 	.global	FtlBbt2Bitmap
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-	.fnstart
 .LFB175:
 	.loc 4 66 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL536:
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI81:
-	.loc 4 66 0
-	mov	r5, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL534:
+	mov	ip, sp
+.LCFI218:
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+.LCFI219:
+	sub	fp, ip, #4
+.LCFI220:
 	.loc 4 69 0
-	ldr	r6, .L666
+	ldr	r6, .L658
+	movw	r3, #3860
 	.loc 4 66 0
-	mov	r7, r1
-	subs	r4, r5, #2
-	.loc 4 72 0
-	movw	r8, #65535
+	mov	r4, r0
 	.loc 4 74 0
-	ldr	r9, .L666+4
-	addw	r5, r5, #1022
+	ldr	r8, .L658+4
+	sub	r5, r4, #2
 	.loc 4 69 0
-	ldrh	r2, [r6, #3860]
-	movs	r1, #0
-.LVL537:
+	ldrh	r2, [r6, r3]
+	add	r4, r4, #1020
 	.loc 4 74 0
-	ldr	r10, .L666+8
+	ldr	r9, .L658+8
+	.loc 4 66 0
+	mov	r7, r1
+	add	r4, r4, #2
 	.loc 4 69 0
+	mov	r1, #0
+.LVL535:
 	mov	r0, r7
-.LVL538:
-	lsls	r2, r2, #2
+.LVL536:
+	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL539:
-.L663:
+.LVL537:
+.L655:
 	.loc 4 72 0
-	ldrh	r3, [r4, #2]
-	cmp	r3, r8
-	beq	.L660
+	ldrh	r3, [r5, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	ldmfdeq	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 	.loc 4 74 0
 	ldrh	r2, [r6, #74]
 	cmp	r2, r3
-	bhi	.L662
+	bhi	.L654
 	.loc 4 74 0 is_stmt 0 discriminator 1
-	movs	r2, #74
-	mov	r1, r9
-	mov	r0, r10
+	mov	r2, #74
+	mov	r1, r8
+	mov	r0, r9
 	bl	printk
-.LVL540:
-.L662:
+.LVL538:
+.L654:
 	.loc 4 75 0 is_stmt 1 discriminator 2
-	ldrh	r3, [r4, #2]!
-	movs	r2, #1
+	ldrh	r3, [r5, #2]!
+	mov	r0, #1
 	.loc 4 70 0 discriminator 2
-	cmp	r5, r4
+	cmp	r4, r5
 	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
-	lsl	r3, r2, r3
 	ldr	r2, [r7, r1, lsl #2]
-	orr	r2, r2, r3
-	str	r2, [r7, r1, lsl #2]
+	orr	r3, r2, r0, lsl r3
+	str	r3, [r7, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L663
-.L660:
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL541:
-.L667:
+	bne	.L655
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+.L659:
 	.align	2
-.L666:
+.L658:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
 .LFE175:
-	.fnend
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.align	1
+	.align	2
 	.global	load_l2p_region
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
-	.fnstart
 .LFB203:
 	.loc 2 488 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL542:
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI82:
-	.loc 2 488 0
-	mov	r6, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL539:
+	mov	ip, sp
+.LCFI221:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI222:
+	sub	fp, ip, #4
+.LCFI223:
 	.loc 2 492 0
-	ldr	r4, .L674
+	ldr	r4, .L666
 	.loc 2 488 0
-	mov	r8, r1
+	uxth	r6, r0
+.LVL540:
+	uxth	r8, r1
+.LVL541:
 	.loc 2 492 0
 	ldrh	r3, [r4, #112]
-	cmp	r3, r0
-	bcs	.L669
+	cmp	r3, r6
+	bcs	.L661
 	.loc 2 492 0 is_stmt 0 discriminator 1
 	mov	r2, #492
-	ldr	r1, .L674+4
-	ldr	r0, .L674+8
+	ldr	r1, .L666+4
+	ldr	r0, .L666+8
 	bl	printk
-.LVL543:
-.L669:
+.LVL542:
+.L661:
 	.loc 2 493 0 is_stmt 1
 	ldr	r3, [r4, #3848]
-	movs	r5, #12
+	mov	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-.LVL544:
+.LVL543:
 	.loc 2 495 0
-	cbnz	r7, .L670
+	cmp	r7, #0
+	bne	.L662
 	.loc 2 496 0
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2468]
 	ldrh	r2, [r4, #86]
-	movs	r1, #255
+	mov	r1, #255
 	add	r3, r3, r5
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL545:
+.LVL544:
 	.loc 2 497 0
 	ldr	r3, [r4, #2468]
 	strh	r6, [r3, r5]	@ movhi
 	.loc 2 498 0
 	ldr	r3, [r4, #2468]
-	add	r5, r5, r3
+	add	r5, r3, r5
 	str	r7, [r5, #4]
-.LVL546:
-.L671:
+.LVL545:
+.L663:
 	.loc 2 519 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL547:
-.L670:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL546:
+.L662:
 	.loc 2 502 0
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2468]
 	.loc 2 504 0
-	movs	r2, #1
-	ldr	r0, .L674+12
+	mov	r2, #1
+	ldr	r0, .L666+12
 	mov	r1, r2
 	.loc 2 501 0
 	str	r7, [r4, #3224]
@@ -7061,58 +7093,58 @@ load_l2p_region:
 	str	r3, [r4, #3232]
 	.loc 2 504 0
 	bl	FlashReadPages
-.LVL548:
+.LVL547:
 	.loc 2 505 0
 	ldr	r8, [r4, #3232]
-.LVL549:
+.LVL548:
 	.loc 2 507 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L672
+	beq	.L664
 	.loc 2 508 0
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L674+16
+	ldr	r0, .L666+16
 	bl	printk
-.LVL550:
+.LVL549:
 	.loc 2 509 0
-	movs	r3, #4
+	mov	r3, #4
 	ldr	r1, [r4, #3232]
 	mov	r2, r3
-	ldr	r0, .L674+20
+	ldr	r0, .L666+20
 	bl	rknand_print_hex
-.LVL551:
+.LVL550:
 	.loc 2 510 0
 	ldrh	r3, [r4, #112]
-	movs	r2, #4
+	mov	r2, #4
 	ldr	r1, [r4, #3848]
-	ldr	r0, .L674+24
+	ldr	r0, .L666+24
 	bl	rknand_print_hex
-.LVL552:
-.L672:
+.LVL551:
+.L664:
 	.loc 2 513 0
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L673
+	beq	.L665
 	.loc 2 513 0 is_stmt 0 discriminator 1
 	movw	r2, #513
-	ldr	r1, .L674+4
-	ldr	r0, .L674+8
+	ldr	r1, .L666+4
+	ldr	r0, .L666+8
 	bl	printk
-.LVL553:
-.L673:
+.LVL552:
+.L665:
 	.loc 2 516 0 is_stmt 1
 	ldr	r3, [r4, #2468]
-	movs	r1, #0
-	adds	r2, r3, r5
+	mov	r1, #0
+	add	r2, r3, r5
 	str	r1, [r2, #4]
 	.loc 2 517 0
 	strh	r6, [r3, r5]	@ movhi
 	.loc 2 518 0
-	b	.L671
-.L675:
+	b	.L663
+.L667:
 	.align	2
-.L674:
+.L666:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
@@ -7121,207 +7153,214 @@ load_l2p_region:
 	.word	.LC83
 	.word	.LC84
 .LFE203:
-	.fnend
 	.size	load_l2p_region, .-load_l2p_region
-	.align	1
+	.align	2
 	.global	ftl_free_no_use_map_blk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-	.fnstart
 .LFB204:
 	.loc 2 522 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL554:
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI83:
-.LVL555:
-	.loc 2 522 0
-	mov	r4, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL553:
+	mov	ip, sp
+.LCFI224:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI225:
+	sub	fp, ip, #4
+.LCFI226:
+	sub	sp, sp, #8
 	.loc 2 531 0
+	mov	r1, #0
 	ldrh	r2, [r0, #10]
-	movs	r1, #0
+	.loc 2 522 0
+	mov	r4, r0
 	.loc 2 525 0
 	ldr	r5, [r0, #20]
-.LVL556:
+.LVL554:
 	.loc 2 523 0
 	ldr	r9, [r0, #12]
-.LVL557:
+.LVL555:
 	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL558:
+.LVL556:
 	.loc 2 531 0
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	mov	r0, r5
-.LVL559:
+.LVL557:
 	bl	ftl_memset
-.LVL560:
+.LVL558:
 	.loc 2 532 0
-	movs	r3, #0
-.LVL561:
-.L677:
+	mov	r2, #0
+.LVL559:
+.L669:
 	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
-.LVL562:
-	uxth	r2, r3
-	cmp	r1, r2
-	bhi	.L681
+	uxth	r3, r2
+	cmp	r1, r3
+	bhi	.L673
 	.loc 2 540 0 is_stmt 1
-	ldrh	fp, [r5]
-.LVL563:
+	ldrh	r2, [r5]
+.LVL560:
 	.loc 2 543 0
-	movs	r6, #0
-.LVL564:
+	mov	r7, #0
 	.loc 2 544 0
-	ldr	r2, .L690
+	ldr	ip, .L682
 	.loc 2 541 0
-	mov	r10, r6
-.LVL565:
-.L682:
+	mov	r10, r7
+.LVL561:
+.L674:
 	.loc 2 543 0 discriminator 1
 	ldrh	r1, [r4, #10]
-	uxth	r3, r6
+	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L686
+	bhi	.L678
 	.loc 2 559 0
 	mov	r0, r10
-	add	sp, sp, #12
-.LCFI84:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL566:
-.L681:
-.LCFI85:
+.LVL562:
+	sub	sp, fp, #40
+.LCFI227:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL563:
+.L673:
+.LCFI228:
 	.loc 2 533 0
-	uxth	r2, r3
-	ldr	r1, [r6, r2, lsl #2]
+	uxth	r3, r2
 	.loc 2 534 0
-	movs	r2, #0
+	mov	r1, #0
 	.loc 2 533 0
-	ubfx	r1, r1, #10, #16
-.LVL567:
-.L678:
+	ldr	r0, [r6, r3, lsl #2]
+.LVL564:
+	ubfx	r0, r0, #10, #16
+.LVL565:
+.L670:
 	.loc 2 534 0 discriminator 1
-	ldrh	r7, [r4, #10]
-	uxth	r0, r2
-	cmp	r7, r0
-	bhi	.L680
-	adds	r3, r3, #1
-	b	.L677
-.L680:
+	ldrh	ip, [r4, #10]
+	uxth	r3, r1
+	cmp	ip, r3
+	addls	r2, r2, #1
+	bls	.L669
+.L672:
 	.loc 2 535 0
-	uxth	r0, r2
-	adds	r2, r2, #1
-	ldrh	r7, [r9, r0, lsl #1]
-	cmp	r7, r1
+	uxth	r3, r1
+	add	r1, r1, #1
+	lsl	r3, r3, #1
+	ldrh	ip, [r9, r3]
+	cmp	ip, r0
 	.loc 2 536 0
-	ittt	eq
-	ldrheq	r7, [r5, r0, lsl #1]
-	addeq	r7, r7, #1
-	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L678
-.LVL568:
-.L686:
+	ldrheq	ip, [r5, r3]
+	addeq	ip, ip, #1
+	strheq	ip, [r5, r3]	@ movhi
+	b	.L670
+.LVL566:
+.L678:
 	.loc 2 544 0
 	ldrh	r1, [r4]
-	uxth	r7, r6
+	uxth	r6, r7
+.LVL567:
 	cmp	r1, r3
-	bne	.L683
+	bne	.L675
 	.loc 2 544 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #80]
 	ldrh	r0, [r4, #2]
+.LVL568:
+	ldrh	r1, [ip, #80]
 	cmp	r0, r1
 	.loc 2 545 0 is_stmt 1 discriminator 1
-	it	cc
-	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L683:
+	lslcc	r0, r6, #1
+	strhcc	r1, [r5, r0]	@ movhi
+.LVL569:
+.L675:
 	.loc 2 546 0
-	ldrh	r8, [r5, r7, lsl #1]
-	cmp	fp, r8
-	itt	hi
+	lsl	r6, r6, #1
+	ldrh	r8, [r5, r6]
+	cmp	r2, r8
 	movhi	r10, r3
-	movhi	fp, r8
+	movhi	r2, r8
 	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L685
+	bne	.L677
 	.loc 2 550 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L685
+	ldrh	r0, [r9, r6]
+.LVL570:
+	cmp	r0, #0
+	beq	.L677
 	.loc 2 552 0 is_stmt 1
-	movs	r1, #1
-	str	r2, [sp, #4]
+	mov	r1, #1
+	str	ip, [fp, #-48]
+	str	r2, [fp, #-44]
 	bl	FtlFreeSysBlkQueueIn
-.LVL569:
+.LVL571:
 	.loc 2 553 0
-	strh	r8, [r9, r7, lsl #1]	@ movhi
+	strh	r8, [r9, r6]	@ movhi
 	.loc 2 554 0
-	ldr	r2, [sp, #4]
+	ldr	ip, [fp, #-48]
 	ldrh	r3, [r4, #8]
-	subs	r3, r3, #1
+	ldr	r2, [fp, #-44]
+.LVL572:
+	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L685:
-	adds	r6, r6, #1
-	b	.L682
-.L691:
+.LVL573:
+.L677:
+	add	r7, r7, #1
+	b	.L674
+.L683:
 	.align	2
-.L690:
+.L682:
 	.word	.LANCHOR0
 .LFE204:
-	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.align	1
+	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	.fnstart
 .LFB207:
 	.loc 2 632 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL570:
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI86:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL574:
+	mov	ip, sp
+.LCFI229:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI230:
+	sub	fp, ip, #4
+.LCFI231:
 	.loc 2 640 0
-	movw	r2, #65535
 	ldrh	r3, [r0]
+	movw	r2, #65535
 	.loc 2 632 0
 	mov	r4, r0
 	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL571:
+.LVL575:
 	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L693
+	bne	.L685
 	.loc 2 641 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L694
+	cmp	r3, #0
+	beq	.L686
 	.loc 2 641 0 is_stmt 0 discriminator 1
 	movw	r2, #641
-	ldr	r1, .L702
-	ldr	r0, .L702+4
+	ldr	r1, .L694
+	ldr	r0, .L694+4
 	bl	printk
-.LVL572:
-.L694:
+.LVL576:
+.L686:
 	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL573:
+.LVL577:
 	.loc 2 644 0
-	movs	r3, #0
+	mov	r3, #0
 	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
 	.loc 2 644 0
@@ -7330,30 +7369,31 @@ Ftl_write_map_blk_to_last_page:
 	strh	r3, [r4]	@ movhi
 	.loc 2 646 0
 	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL574:
-.L695:
+.LVL578:
+.L687:
 	.loc 2 677 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL575:
-.L693:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.LVL579:
+.L685:
 	.loc 2 650 0
-	ldrh	r6, [r5, r3, lsl #1]
-	.loc 2 661 0
-	movs	r1, #255
-	.loc 2 651 0
-	ldrh	r3, [r0, #2]
-	ldr	r5, .L702+8
-.LVL576:
+	lsl	r3, r3, #1
 	.loc 2 656 0
 	ldr	r2, [r0, #28]
 	.loc 2 636 0
-	ldr	r7, [r0, #24]
-.LVL577:
+	ldr	r6, [r0, #24]
+.LVL580:
+	.loc 2 661 0
+	mov	r1, #255
+	.loc 2 650 0
+	ldrh	r7, [r5, r3]
 	.loc 2 651 0
-	orr	r3, r3, r6, lsl #10
+	ldrh	r3, [r0, #2]
+	ldr	r5, .L694+8
+.LVL581:
+	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #3224]
 	.loc 2 652 0
 	ldr	r3, [r5, #3240]
@@ -7364,203 +7404,204 @@ Ftl_write_map_blk_to_last_page:
 	.loc 2 656 0
 	str	r2, [r3, #4]
 	.loc 2 657 0
-	movw	r2, #64245
+	ldr	r2, .L694+12
 	strh	r2, [r3, #8]	@ movhi
 	.loc 2 658 0
 	ldrh	r2, [r0, #4]
 	.loc 2 659 0
-	strh	r6, [r3, #2]	@ movhi
+	strh	r7, [r3, #2]	@ movhi
 	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 661 0
 	ldrh	r2, [r5, #80]
 	ldr	r0, [r5, #3240]
-.LVL578:
-	lsls	r2, r2, #3
+.LVL582:
+	lsl	r2, r2, #3
 	bl	ftl_memset
-.LVL579:
+.LVL583:
 	.loc 2 663 0
-	movs	r2, #0
+	mov	r2, #0
 	.loc 2 662 0
 	mov	r3, r2
-.LVL580:
-.L696:
+.LVL584:
+.L688:
 	.loc 2 663 0 discriminator 1
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L698
+	bhi	.L690
 	.loc 2 670 0
-	movs	r2, #1
-	movs	r3, #0
-.LVL581:
+	mov	r2, #1
+	mov	r3, #0
+.LVL585:
 	mov	r1, r2
-	ldr	r0, .L702+12
+	ldr	r0, .L694+16
 	bl	FlashProgPages
-.LVL582:
+.LVL586:
 	.loc 2 671 0
 	ldrh	r3, [r4, #2]
 	.loc 2 675 0
 	mov	r0, r4
 	.loc 2 671 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL583:
+.LVL587:
 	.loc 2 676 0
-	b	.L695
-.LVL584:
-.L698:
+	b	.L687
+.LVL588:
+.L690:
 	uxth	r1, r2
 	.loc 2 664 0
-	ldr	r0, [r7, r1, lsl #2]
-	cmp	r6, r0, lsr #10
-	bne	.L697
+	ldr	r0, [r6, r1, lsl #2]
+	cmp	r7, r0, lsr #10
+	bne	.L689
 	.loc 2 666 0
 	ldr	r0, [r5, #3240]
 	.loc 2 665 0
-	adds	r3, r3, #1
-.LVL585:
-	uxth	r3, r3
-.LVL586:
+	add	r3, r3, #1
+.LVL589:
+	uxth	r3, r3
+.LVL590:
 	.loc 2 666 0
 	str	r1, [r0, r3, lsl #3]
 	.loc 2 667 0
-	ldr	r0, [r7, r1, lsl #2]
+	ldr	r0, [r6, r1, lsl #2]
 	ldr	r1, [r5, #3240]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L697:
-	adds	r2, r2, #1
-	b	.L696
-.L703:
+.L689:
+	add	r2, r2, #1
+	b	.L688
+.L695:
 	.align	2
-.L702:
+.L694:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
+	.word	-1291
 	.word	.LANCHOR0+3220
 .LFE207:
-	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.align	1
+	.align	2
 	.global	FtlMapWritePage
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-	.fnstart
 .LFB208:
 	.loc 2 680 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL587:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI87:
-	.loc 2 680 0
-	mov	r4, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL591:
+	mov	ip, sp
+.LCFI232:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI233:
+	sub	fp, ip, #4
+.LCFI234:
 	.loc 2 686 0
-	ldr	r7, .L723
+	ldr	r7, .L715
 	.loc 2 680 0
+	mov	r4, r0
 	mov	r8, r1
-	mov	r10, r2
+	mov	r9, r2
 	.loc 2 683 0
-	movs	r6, #0
-.LVL588:
-	.loc 2 699 0
-	ldr	r9, .L723+20
+	mov	r6, #0
+.LVL592:
 	mov	r5, r7
-.L705:
+.L697:
 	.loc 2 686 0
 	ldr	r3, [r7, #2500]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r7, #2500]
 	.loc 2 687 0
 	ldrh	r3, [r7, #80]
 	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
+	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L706
+	bge	.L698
 	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L707
-.L706:
+	bne	.L699
+.L698:
 	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL589:
-.L707:
+.LVL593:
+.L699:
 	.loc 2 699 0
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L708
+	ldrh	r3, [r4]
+	ldr	r2, [r4, #12]
+	lsl	r3, r3, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	bne	.L700
 	.loc 2 699 0 is_stmt 0 discriminator 1
 	movw	r2, #699
-	mov	r1, r9
-	ldr	r0, .L723+4
+	ldr	r1, .L715+4
+	ldr	r0, .L715+8
 	bl	printk
-.LVL590:
-.L708:
+.LVL594:
+.L700:
 	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L709
+	bcc	.L701
 	.loc 2 700 0 is_stmt 0 discriminator 1
 	mov	r2, #700
-	mov	r1, r9
-	ldr	r0, .L723+4
+	ldr	r1, .L715+4
+	ldr	r0, .L715+8
 	bl	printk
-.LVL591:
-.L709:
+.LVL595:
+.L701:
 	.loc 2 701 0 is_stmt 1
-	ldrh	r2, [r4]
+	ldrh	r3, [r4]
+.LBB384:
 .LBB385:
 .LBB386:
-.LBB387:
 	.loc 1 202 0
-	movs	r1, #16
-.LBE387:
+	mov	r1, #16
 .LBE386:
 .LBE385:
+.LBE384:
 	.loc 2 701 0
-	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #12]
 	.loc 2 705 0
 	ldr	r0, [r5, #3244]
 	.loc 2 701 0
-	ldrh	fp, [r3, r2, lsl #1]
+	lsl	r3, r3, #1
+	ldrh	r10, [r2, r3]
 	.loc 2 703 0
 	ldrh	r3, [r4, #2]
 	.loc 2 705 0
 	str	r0, [r5, #3232]
 	.loc 2 704 0
-	str	r10, [r5, #3228]
+	str	r9, [r5, #3228]
 	.loc 2 703 0
-	orr	r3, r3, fp, lsl #10
+	orr	r3, r3, r10, lsl #10
 	str	r3, [r5, #3224]
-.LBB390:
 .LBB389:
 .LBB388:
+.LBB387:
 	.loc 1 202 0
 	bl	__memzero
-.LVL592:
+.LVL596:
+.LBE387:
 .LBE388:
 .LBE389:
-.LBE390:
 	.loc 2 708 0
 	ldr	r3, [r5, #3232]
-.LVL593:
+.LVL597:
 	.loc 2 709 0
 	ldr	r2, [r4, #28]
 	.loc 2 713 0
-	ldr	r0, .L723+8
+	ldr	r0, .L715+12
 	.loc 2 710 0
 	strh	r8, [r3, #8]	@ movhi
 	.loc 2 709 0
@@ -7568,692 +7609,679 @@ FtlMapWritePage:
 	.loc 2 711 0
 	ldrh	r2, [r4, #4]
 	.loc 2 712 0
-	strh	fp, [r3, #2]	@ movhi
+	strh	r10, [r3, #2]	@ movhi
 	.loc 2 711 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 713 0
-	movs	r3, #1
-.LVL594:
+	mov	r3, #1
+.LVL598:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL595:
+.LVL599:
 	.loc 2 714 0
 	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 716 0
 	ldr	r2, [r5, #3220]
-	adds	r2, r2, #1
-	bne	.L710
+	cmn	r2, #1
+	bne	.L702
 	.loc 2 717 0
 	ldr	r1, [r5, #3224]
 	.loc 2 718 0
-	adds	r6, r6, #1
-.LVL596:
+	add	r6, r6, #1
+.LVL600:
 	.loc 2 717 0
-	ldr	r0, .L723+12
+	ldr	r0, .L715+16
 	.loc 2 718 0
 	uxth	r6, r6
-.LVL597:
+.LVL601:
 	.loc 2 717 0
 	bl	printk
-.LVL598:
+.LVL602:
 	.loc 2 719 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	.loc 2 720 0
-	ittt	ls
 	ldrhls	r3, [r5, #80]
-	addls	r3, r3, #-1
+	subls	r3, r3, #1
 	strhls	r3, [r4, #2]	@ movhi
 	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L712
+	bls	.L704
 	.loc 2 723 0
 	mov	r2, r6
 	ldr	r1, [r5, #3224]
-	ldr	r0, .L723+16
+	ldr	r0, .L715+20
 	bl	printk
-.LVL599:
-.L713:
-	b	.L713
-.L712:
+.LVL603:
+.L705:
+	b	.L705
+.L704:
 	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L705
-.L722:
-	b	.L722
-.L710:
+	beq	.L697
+.L714:
+	b	.L714
+.L702:
 	.loc 2 731 0
 	cmp	r3, #1
-	beq	.L705
+	beq	.L697
 	.loc 2 734 0
 	ldr	r2, [r5, #3224]
 	.loc 2 736 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	.loc 2 736 0
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL600:
-.L724:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L716:
 	.align	2
-.L723:
+.L715:
 	.word	.LANCHOR0
+	.word	.LANCHOR1+258
 	.word	.LC1
 	.word	.LANCHOR0+3220
 	.word	.LC85
 	.word	.LC86
-	.word	.LANCHOR1+258
 .LFE208:
-	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
-	.align	1
+	.align	2
 	.global	ftl_map_blk_gc
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	.fnstart
 .LFB206:
 	.loc 2 586 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL601:
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI88:
-.LVL602:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL604:
+	mov	ip, sp
+.LCFI235:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI236:
+	sub	fp, ip, #4
+.LCFI237:
+	sub	sp, sp, #8
 	.loc 2 586 0
 	mov	r4, r0
 	.loc 2 590 0
 	ldr	r6, [r0, #12]
-.LVL603:
+.LVL605:
 	.loc 2 591 0
 	ldr	r9, [r0, #24]
-.LVL604:
+.LVL606:
 	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL605:
+.LVL607:
 	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L737
-	subs	r3, r3, #4
+	ldr	r5, .L729
+	sub	r3, r3, #4
 	cmp	r2, r3
-	blt	.L726
+	blt	.L718
 	.loc 2 597 0
 	uxth	r0, r0
-	ldrh	r8, [r6, r0, lsl #1]
-.LVL606:
+	lsl	r0, r0, #1
+	ldrh	r8, [r6, r0]
+.LVL608:
 	.loc 2 598 0
 	cmp	r8, #0
-	beq	.L726
+	beq	.L718
 	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L726
+	cmp	r3, #0
+	bne	.L718
 	.loc 2 599 0 is_stmt 1
-	movs	r2, #1
+	mov	r2, #1
 	str	r2, [r4, #32]
 	.loc 2 600 0
-	strh	r3, [r6, r0, lsl #1]	@ movhi
+	strh	r3, [r6, r0]	@ movhi
 	.loc 2 601 0
 	ldrh	r3, [r4, #8]
 	.loc 2 602 0
 	ldrh	r2, [r4, #2]
 	.loc 2 601 0
-	subs	r3, r3, #1
+	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 602 0
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L727
+	bcc	.L719
 	.loc 2 603 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL607:
-.L727:
+.LVL609:
+.L719:
 	.loc 2 613 0 discriminator 1
-	ldr	fp, .L737+12
+	ldr	r10, .L729+4
 	.loc 2 586 0 discriminator 1
-	movs	r6, #0
-.LVL608:
-.L728:
+	mov	r6, #0
+.LVL610:
+.L720:
 	.loc 2 605 0 discriminator 1
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
-	cmp	r3, r10
-	bhi	.L732
+	ldrh	r2, [r4, #6]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L724
 	.loc 2 621 0
-	movs	r1, #1
+	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL609:
+.LVL611:
 	.loc 2 622 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r4, #32]
-.LVL610:
-.L726:
+.LVL612:
+.L718:
 	.loc 2 626 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bcc	.L733
+	bcc	.L725
 	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL611:
-.L733:
+.LVL613:
+.L725:
 	.loc 2 629 0
-	movs	r0, #0
-	add	sp, sp, #12
-.LCFI89:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL612:
-.L732:
-.LCFI90:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI238:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL614:
+.L724:
+.LCFI239:
 	uxth	r7, r6
 	.loc 2 606 0
-	ldr	r3, [r9, r7, lsl #2]
-	cmp	r8, r3, lsr #10
-	bne	.L729
+	ldr	r2, [r9, r7, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L721
+	.loc 2 608 0
+	ldr	ip, [r5, #3244]
 	.loc 2 607 0
-	ldr	r3, [r5, #3804]
+	ldr	r2, [r5, #3804]
 	.loc 2 611 0
-	ldr	r0, .L737+4
-	.loc 2 607 0
-	str	r3, [r5, #3228]
+	ldr	r0, .L729+8
 	.loc 2 608 0
-	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3232]
+	str	ip, [r5, #3232]
+	.loc 2 607 0
+	str	r2, [r5, #3228]
 	.loc 2 609 0
 	ldr	r2, [r9, r7, lsl #2]
+	str	r3, [fp, #-48]
 	.loc 2 608 0
-	str	r3, [sp, #4]
+	str	ip, [fp, #-44]
 	.loc 2 609 0
 	str	r2, [r5, #3224]
 	.loc 2 611 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL613:
+.LVL615:
 	.loc 2 613 0
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r10
-	beq	.L730
+	ldr	ip, [fp, #-44]
+	ldr	r3, [fp, #-48]
+.LVL616:
+	ldrh	r2, [ip, #8]
+	cmp	r2, r3
+	beq	.L722
 	.loc 2 613 0 is_stmt 0 discriminator 1
 	movw	r2, #613
-	ldr	r1, .L737+8
-	mov	r0, fp
+	mov	r1, r10
+	ldr	r0, .L729+12
 	bl	printk
-.LVL614:
-.L730:
+.LVL617:
+.L722:
 	.loc 2 614 0 is_stmt 1
 	ldr	r3, [r5, #3220]
-	adds	r3, r3, #1
-	bne	.L731
+.LVL618:
+	cmn	r3, #1
 	.loc 2 615 0
-	movs	r3, #0
-	str	r3, [r9, r7, lsl #2]
-.L729:
-	adds	r6, r6, #1
-	b	.L728
-.L731:
+	moveq	r3, #0
+	streq	r3, [r9, r7, lsl #2]
+	.loc 2 614 0
+	beq	.L721
 	.loc 2 617 0
 	ldr	r2, [r5, #3228]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL615:
-	b	.L729
-.L738:
+.LVL619:
+.L721:
+	add	r6, r6, #1
+	b	.L720
+.L730:
 	.align	2
-.L737:
+.L729:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+274
+	.word	.LANCHOR0+3220
 	.word	.LC1
 .LFE206:
-	.fnend
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.align	1
+	.align	2
 	.global	flush_l2p_region
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-	.fnstart
 .LFB209:
 	.loc 2 739 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL616:
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI91:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL620:
+	mov	ip, sp
+.LCFI240:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI241:
+	sub	fp, ip, #4
+.LCFI242:
+	.loc 2 742 0
+	ldr	r5, .L732
+	.loc 2 739 0
+	uxth	r0, r0
 	.loc 2 742 0
-	movs	r4, #12
-	ldr	r5, .L740
-	muls	r4, r0, r4
+	mov	r4, #12
+	mul	r4, r4, r0
 	ldr	r3, [r5, #2468]
 	.loc 2 743 0
-	addw	r0, r5, #3864
-.LVL617:
+	add	r0, r5, #3856
+.LVL621:
+	add	r0, r0, #8
 	.loc 2 742 0
-	adds	r2, r3, r4
+	add	r2, r3, r4
 	.loc 2 743 0
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL618:
+.LVL622:
 	.loc 2 744 0
-	ldr	r3, [r5, #2468]
+	ldr	r0, [r5, #2468]
+	add	r4, r0, r4
 	.loc 2 746 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 2 744 0
-	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	.loc 2 746 0
-	pop	{r3, r4, r5, pc}
-.L741:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L733:
 	.align	2
-.L740:
+.L732:
 	.word	.LANCHOR0
 .LFE209:
-	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
-	.align	1
+	.align	2
 	.global	log2phys
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-	.fnstart
 .LFB212:
 	.loc 2 802 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL619:
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI92:
-	.loc 2 802 0
-	mov	r7, r1
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL623:
+	mov	ip, sp
+.LCFI243:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI244:
+	sub	fp, ip, #4
+.LCFI245:
+	sub	sp, sp, #4
+	.loc 2 806 0
+	mvn	r6, #0
 	.loc 2 805 0
-	ldr	r4, .L756
+	ldr	r4, .L748
 	.loc 2 802 0
-	mov	r9, r2
-	.loc 2 805 0
-	ldrh	r5, [r4, #84]
-	adds	r3, r5, #7
-	.loc 2 806 0
-	movs	r5, #1
+	mov	r7, r1
+	mov	r10, r2
 	.loc 2 805 0
-	lsr	r8, r0, r3
+	ldrh	r3, [r4, #84]
+	add	r3, r3, #7
+	lsr	r9, r0, r3
 	.loc 2 806 0
-	lsls	r5, r5, r3
+	bic	r6, r0, r6, lsl r3
 	.loc 2 808 0
 	ldr	r3, [r4, #2480]
-	.loc 2 806 0
-	subs	r5, r5, #1
 	.loc 2 805 0
-	uxth	r8, r8
-.LVL620:
+	uxth	r8, r9
+.LVL624:
 	.loc 2 806 0
-	ands	r5, r5, r0
+	uxth	r6, r6
+.LVL625:
 	.loc 2 808 0
 	cmp	r0, r3
-	.loc 2 806 0
-	uxth	r5, r5
-.LVL621:
-	.loc 2 808 0
-	bcc	.L743
+	bcc	.L735
 	.loc 2 808 0 is_stmt 0 discriminator 1
 	mov	r2, #808
-	ldr	r1, .L756+4
-	ldr	r0, .L756+8
-.LVL622:
+	ldr	r1, .L748+4
+	ldr	r0, .L748+8
+.LVL626:
 	bl	printk
-.LVL623:
-.L743:
+.LVL627:
+.L735:
 	.loc 2 810 0 is_stmt 1
-	ldrh	r2, [r4, #114]
-	movs	r3, #0
+	ldrh	r1, [r4, #114]
+	mov	r2, #0
 	.loc 2 811 0
-	ldr	r1, [r4, #2468]
-	mov	r10, #12
-.LVL624:
-.L744:
-	uxth	r6, r3
+	ldr	r0, [r4, #2468]
+.LVL628:
+	mov	r3, #12
+.LVL629:
+.L736:
+	uxth	r5, r2
 	.loc 2 810 0 discriminator 1
-	cmp	r6, r2
-	bcc	.L749
+	cmp	r5, r1
+	bcc	.L741
+	str	r3, [fp, #-44]
 	.loc 2 825 0
 	bl	select_l2p_ram_region
-.LVL625:
+.LVL630:
 	.loc 2 826 0
-	mul	r10, r10, r0
-	ldr	r3, [r4, #2468]
+	ldr	r3, [fp, #-44]
 	.loc 2 825 0
-	mov	r6, r0
+	mov	r5, r0
 	.loc 2 826 0
-	ldrh	r1, [r3, r10]
-	add	r2, r3, r10
+	ldr	r2, [r4, #2468]
+	mul	r3, r3, r0
+	add	r1, r2, r3
+	ldrh	r2, [r2, r3]
 	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L750
+	cmp	r2, r3
+	beq	.L742
 	.loc 2 826 0 is_stmt 0 discriminator 1
-	ldr	r3, [r2, #4]
+	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L750
+	bge	.L742
 	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL626:
-.L750:
+.LVL631:
+.L742:
 	.loc 2 830 0
-	mov	r1, r6
-	mov	r0, r8
+	mov	r1, r5
+	uxth	r0, r9
 	bl	load_l2p_region
-.LVL627:
+.LVL632:
 	.loc 2 831 0
-	b	.L745
-.LVL628:
-.L749:
-	adds	r3, r3, #1
+	b	.L737
+.L741:
+	add	r2, r2, #1
 	.loc 2 811 0
-	mla	r0, r10, r3, r1
-.LVL629:
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L744
-.L745:
-	movs	r3, #12
+	mla	ip, r3, r2, r0
+	ldrh	ip, [ip, #-12]
+	cmp	ip, r8
+	bne	.L736
+.L737:
 	.loc 2 813 0
-	cmp	r9, #0
-	bne	.L746
+	cmp	r10, #0
+	mov	r3, #12
+	bne	.L738
 	.loc 2 814 0
 	ldr	r2, [r4, #2468]
-	mla	r3, r3, r6, r2
+	mla	r3, r3, r5, r2
 	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
+	ldr	r3, [r3, r6, lsl #2]
 	str	r3, [r7]
-.L747:
+.L739:
 	.loc 2 820 0
 	ldr	r2, [r4, #2468]
-	movs	r3, #12
-	mla	r6, r3, r6, r2
-.LVL630:
-	ldr	r3, [r6, #4]
-	adds	r2, r3, #1
-	beq	.L753
+	mov	r3, #12
+	.loc 2 832 0
+	mov	r0, #0
+	.loc 2 820 0
+	mla	r5, r3, r5, r2
+.LVL633:
+	ldr	r3, [r5, #4]
+	cmn	r3, #1
 	.loc 2 821 0
-	adds	r3, r3, #1
-	str	r3, [r6, #4]
-.L753:
+	addne	r3, r3, #1
+	strne	r3, [r5, #4]
 	.loc 2 832 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL631:
-.L746:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL634:
+.L738:
 	.loc 2 816 0
-	muls	r3, r6, r3
+	mul	r3, r3, r5
 	ldr	r2, [r4, #2468]
 	ldr	r1, [r7]
 	add	r2, r2, r3
 	ldr	r2, [r2, #8]
-	str	r1, [r2, r5, lsl #2]
+	str	r1, [r2, r6, lsl #2]
 	.loc 2 817 0
 	ldr	r2, [r4, #2468]
-	.loc 2 818 0
-	strh	r8, [r4, #2472]	@ movhi
-	.loc 2 817 0
-	add	r3, r3, r2
+	add	r3, r2, r3
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L747
-.L757:
+	.loc 2 818 0
+	movw	r3, #2472
+	strh	r8, [r4, r3]	@ movhi
+	b	.L739
+.L749:
 	.align	2
-.L756:
+.L748:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
 .LFE212:
-	.fnend
 	.size	log2phys, .-log2phys
-	.align	1
+	.align	2
 	.global	FtlReUsePrevPpa
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-	.fnstart
 .LFB230:
 	.loc 2 1677 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL632:
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.save {r4, r5, r6, r7, lr}
-	.pad #12
-.LCFI93:
-.LVL633:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL635:
+	mov	ip, sp
+.LCFI246:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI247:
+	sub	fp, ip, #4
+.LCFI248:
+	sub	sp, sp, #4
 	.loc 2 1677 0
-	mov	r6, r0
+	mov	r7, r0
 	.loc 2 1680 0
-	ldr	r5, .L768
-.LVL634:
+	ldr	r5, .L760
 	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL635:
+.LVL636:
 	.loc 2 1677 0
-	str	r1, [sp, #4]
+	str	r1, [fp, #-36]
 	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL636:
-	.loc 2 1680 0
-	ldr	r2, [r5, #2300]
-	.loc 2 1678 0
-	mov	r7, r0
 .LVL637:
 	.loc 2 1680 0
-	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L759
+	ldr	r2, [r5, #2300]
+.LVL638:
+	lsl	r6, r0, #1
+	ldrh	r3, [r2, r6]
+	cmp	r3, #0
+	bne	.L751
 	.loc 2 1681 0
 	ldr	r4, [r5, #2316]
-	cbz	r4, .L760
-.LBB391:
-	.loc 2 1685 0
-	ldr	r1, [r5, #2292]
-	.loc 2 1693 0
-	mov	ip, #6
+	cmp	r4, #0
+	beq	.L752
+.LBB390:
 	.loc 2 1685 0
-	ldr	r2, .L768+4
+	ldr	r2, [r5, #2292]
+	.loc 2 1684 0
+	add	r8, r5, #2320
+	ldrh	r1, [r8]
+.LVL639:
 	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1684 0
-	ldrh	r0, [r5, #2320]
-.LVL638:
 	.loc 2 1685 0
-	subs	r4, r4, r1
-	asrs	r4, r4, #1
-	muls	r4, r2, r4
-	uxth	r4, r4
-.LVL639:
-.L761:
+	sub	r4, r4, r2
+	ubfx	r4, r4, #3, #16
+.LVL640:
+.L753:
 	.loc 2 1686 0 discriminator 1
-	uxth	r2, r3
-	cmp	r0, r2
-	bls	.L760
+	uxth	ip, r3
+	cmp	r1, ip
+	bls	.L752
 	.loc 2 1687 0
-	cmp	r4, r7
-	bne	.L762
+	cmp	r4, r0
+	bne	.L754
 	.loc 2 1688 0
 	mov	r1, r4
-	ldr	r0, .L768+8
-.LVL640:
-	bl	List_remove_node
 .LVL641:
-	ldrh	r3, [r5, #2320]
-	cbnz	r3, .L763
+	ldr	r0, .L760+4
+.LVL642:
+	bl	List_remove_node
+.LVL643:
+	ldrh	r3, [r8]
+	cmp	r3, #0
+	bne	.L755
 	.loc 2 1688 0 is_stmt 0 discriminator 1
-	mov	r2, #1688
-	ldr	r1, .L768+12
-	ldr	r0, .L768+16
+	movw	r2, #1688
+	ldr	r1, .L760+8
+	ldr	r0, .L760+12
 	bl	printk
-.LVL642:
-.L763:
+.LVL644:
+.L755:
 	.loc 2 1688 0 discriminator 3
-	ldrh	r3, [r5, #2320]
+	ldrh	r3, [r8]
 	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
 	.loc 2 1688 0 discriminator 3
-	subs	r3, r3, #1
-	strh	r3, [r5, #2320]	@ movhi
+	sub	r3, r3, #1
+	strh	r3, [r8]	@ movhi
 	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL643:
+.LVL645:
 	.loc 2 1690 0 discriminator 3
 	ldr	r2, [r5, #2300]
-	ldrh	r3, [r2, r7, lsl #1]
-.L759:
-.LBE391:
+	ldrh	r3, [r2, r6]
+.LVL646:
+.L751:
+.LBE390:
 	.loc 2 1699 0
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L760
-.LVL644:
-.L762:
-.LBB392:
+	add	r3, r3, #1
+	strh	r3, [r2, r6]	@ movhi
+	b	.L752
+.LVL647:
+.L754:
+.LBB391:
 	.loc 2 1693 0
-	mul	r4, ip, r4
-.LVL645:
-	adds	r3, r3, #1
-	ldrh	r4, [r1, r4]
-.LVL646:
+	lsl	r4, r4, #3
+.LVL648:
+	add	r3, r3, #1
+	ldrh	r4, [r2, r4]
+.LVL649:
 	cmp	r4, lr
-	bne	.L761
-.L760:
-.LBE392:
+	bne	.L753
+.L752:
+.LBE391:
 	.loc 2 1701 0
-	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r6
-.LVL647:
+	mov	r2, #1
+	sub	r1, fp, #36
+.LVL650:
+	mov	r0, r7
+.LVL651:
 	bl	log2phys
-.LVL648:
-	.loc 2 1702 0
-	add	sp, sp, #12
-.LCFI94:
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.LVL649:
-.L769:
+.LVL652:
+	ldmib	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L761:
 	.align	2
-.L768:
+.L760:
 	.word	.LANCHOR0
-	.word	-1431655765
 	.word	.LANCHOR0+2316
 	.word	.LANCHOR1+298
 	.word	.LC1
 .LFE230:
-	.fnend
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.align	1
+	.align	2
 	.global	ftl_scan_all_data
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-	.fnstart
 .LFB241:
 	.loc 2 2325 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI95:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI249:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI250:
+	sub	fp, ip, #4
+.LCFI251:
+	sub	sp, sp, #24
 	.loc 2 2331 0
-	movs	r5, #0
-.LVL650:
-	ldr	r6, .L784
-	.loc 2 2325 0
-	.pad #32
-	sub	sp, sp, #32
-.LCFI96:
-	.loc 2 2330 0
-	movs	r1, #0
-	.loc 2 2334 0
-	ldr	r8, .L784+16
-	mov	r4, r6
+	mov	r5, #0
+.LVL653:
+	ldr	r6, .L770
 	.loc 2 2330 0
-	ldr	r0, .L784+4
+	mov	r1, #0
+	ldr	r0, .L770+4
 	bl	printk
-.LVL651:
-.L771:
+.LVL654:
+	mov	r4, r6
+.LVL655:
+.L763:
 	.loc 2 2331 0 discriminator 1
 	ldr	r3, [r6, #2480]
 	cmp	r5, r3
-	bcc	.L777
+	bcc	.L769
 	.loc 2 2353 0
-	add	sp, sp, #32
-.LCFI97:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL652:
-.L777:
-.LCFI98:
+	sub	sp, fp, #28
+.LCFI252:
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.LVL656:
+.L769:
+.LCFI253:
 	.loc 2 2332 0
-	movs	r2, #0
-	add	r1, sp, #28
+	mov	r2, #0
+	sub	r1, fp, #32
 	mov	r0, r5
 	bl	log2phys
-.LVL653:
+.LVL657:
 	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L772
+	cmp	r3, #0
+	bne	.L764
 	.loc 2 2334 0
-	ldr	r2, [sp, #28]
+	ldr	r2, [fp, #-32]
 	mov	r1, r5
-	mov	r0, r8
+	ldr	r0, .L770+8
 	bl	printk
-.LVL654:
-.L772:
+.LVL658:
+.L764:
 	.loc 2 2335 0
-	ldr	r3, [sp, #28]
-	adds	r2, r3, #1
-	beq	.L774
+	ldr	r3, [fp, #-32]
+	cmn	r3, #1
+	beq	.L766
 	.loc 2 2336 0
 	str	r3, [r4, #3224]
 	.loc 2 2340 0
-	movs	r2, #0
+	mov	r2, #0
 	.loc 2 2338 0
 	ldr	r3, [r4, #3240]
 	.loc 2 2342 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 2 2339 0
 	ldr	r7, [r4, #3244]
 	.loc 2 2342 0
-	ldr	r0, .L784+8
+	ldr	r0, .L770+12
 	.loc 2 2338 0
 	str	r3, [r4, #3228]
 	.loc 2 2337 0
@@ -8264,23 +8292,21 @@ ftl_scan_all_data:
 	str	r2, [r4, #3220]
 	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL655:
+.LVL659:
 	.loc 2 2343 0
 	ldr	r3, [r4, #3220]
-	cmp	r3, #256
-	beq	.L775
-	.loc 2 2343 0 is_stmt 0 discriminator 1
-	adds	r3, r3, #1
-	beq	.L775
-	.loc 2 2344 0 is_stmt 1
+	cmn	r3, #1
+	cmpne	r3, #256
+	beq	.L767
+	.loc 2 2344 0
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L774
-.L775:
+	beq	.L766
+.L767:
 	.loc 2 2347 0
 	ldr	r2, [r4, #3228]
 	ldr	r3, [r4, #3232]
-	ldr	r0, .L784+12
+	ldr	r0, .L770+16
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8295,1579 +8321,1607 @@ ftl_scan_all_data:
 	ldr	r3, [r3]
 	ldr	r2, [r4, #3224]
 	bl	printk
-.LVL656:
-.L774:
+.LVL660:
+.L766:
 	.loc 2 2331 0 discriminator 2
-	adds	r5, r5, #1
-	b	.L771
-.L785:
+	add	r5, r5, #1
+	b	.L763
+.L771:
 	.align	2
-.L784:
+.L770:
 	.word	.LANCHOR0
 	.word	.LC87
+	.word	.LC88
 	.word	.LANCHOR0+3220
 	.word	.LC89
-	.word	.LC88
 .LFE241:
-	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.align	1
+	.align	2
 	.global	FtlReadRefresh
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-	.fnstart
 .LFB268:
 	.loc 5 419 0
 	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 425 0
-	ldr	r3, .L799
-	.loc 5 419 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI99:
-	.pad #88
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI254:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI255:
+	sub	fp, ip, #4
+.LCFI256:
 	sub	sp, sp, #88
-.LCFI100:
-	mov	r4, r3
 	.loc 5 425 0
+	ldr	r3, .L785
 	ldr	r0, [r3, #2692]
+	mov	r4, r3
 	cmp	r0, #0
-	beq	.L787
+	beq	.L773
 	.loc 5 426 0
 	ldr	r1, [r3, #2696]
 	ldr	r2, [r3, #2480]
 	cmp	r1, r2
-	bcs	.L788
+	bcs	.L774
 	mov	r5, #2048
-.LVL657:
-.L793:
+.LVL661:
+.L779:
+.LBB397:
 .LBB398:
-.LBB399:
 	.loc 5 428 0
 	ldr	r0, [r4, #2696]
 	ldr	r3, [r4, #2480]
 	cmp	r0, r3
-	bcs	.L790
+	bcs	.L776
 	.loc 5 430 0
-	movs	r2, #0
-	mov	r1, sp
+	mov	r2, #0
+	sub	r1, fp, #108
 	bl	log2phys
-.LVL658:
+.LVL662:
 	.loc 5 432 0
-	ldr	r2, [sp]
+	ldr	r2, [fp, #-108]
 	.loc 5 431 0
 	ldr	r3, [r4, #2696]
 	.loc 5 432 0
-	adds	r1, r2, #1
+	cmn	r2, #1
 	.loc 5 431 0
 	add	r3, r3, #1
 	str	r3, [r4, #2696]
 	.loc 5 432 0
-	beq	.L791
-.LBB400:
+	beq	.L777
+.LBB399:
 	.loc 5 435 0
-	str	r3, [sp, #20]
+	str	r3, [fp, #-88]
 	.loc 5 438 0
-	add	r0, sp, #88
+	sub	r0, fp, #20
 	.loc 5 436 0
-	ldr	r3, .L799+4
+	ldr	r3, .L785+4
 	.loc 5 439 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 5 434 0
-	str	r2, [sp, #8]
+	str	r2, [fp, #-100]
 	.loc 5 438 0
-	movs	r2, #0
+	mov	r2, #0
 	str	r2, [r0, #-84]!
 	.loc 5 436 0
-	str	r3, [sp, #12]
+	str	r3, [fp, #-96]
 	.loc 5 437 0
-	add	r3, sp, #24
-	str	r3, [sp, #16]
+	sub	r3, fp, #84
+	str	r3, [fp, #-92]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL659:
+.LVL663:
 	.loc 5 440 0
-	ldr	r3, [sp, #4]
+	ldr	r3, [fp, #-104]
 	cmp	r3, #256
-	bne	.L790
+	bne	.L776
 	.loc 5 442 0
-	ldr	r0, [sp]
+	ldr	r0, [fp, #-108]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL660:
+.LVL664:
 	bl	FtlGcRefreshBlock
-.LVL661:
-.L790:
-.LBE400:
-	mov	r0, #-1
-.L786:
+.LVL665:
+.L776:
 .LBE399:
+	mvn	r0, #0
+.L772:
 .LBE398:
+.LBE397:
 	.loc 5 466 0
-	add	sp, sp, #88
-.LCFI101:
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L791:
-.LCFI102:
-.LBB402:
+	sub	sp, fp, #20
+.LCFI257:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L777:
+.LCFI258:
 .LBB401:
+.LBB400:
 	.loc 5 427 0
 	subs	r5, r5, #1
-	bne	.L793
-	b	.L790
-.LVL662:
-.L788:
+	bne	.L779
+	b	.L776
+.LVL666:
+.L774:
+.LBE400:
 .LBE401:
-.LBE402:
 	.loc 5 451 0
 	ldr	r2, [r3, #2484]
 	.loc 5 449 0
-	movs	r0, #0
+	mov	r0, #0
 	str	r0, [r3, #2692]
 	.loc 5 450 0
 	str	r0, [r3, #2696]
 	.loc 5 451 0
 	str	r2, [r3, #2688]
-	b	.L786
-.L787:
-.LBB403:
+	b	.L772
+.L773:
+.LBB402:
 	.loc 5 456 0
 	ldr	r1, [r3, #2484]
-	ldr	r6, [r3, #2688]
-	add	r2, r1, #1048576
-	cmp	r6, r2
-	bhi	.L796
+	ldr	r2, [r3, #2688]
+	add	ip, r1, #1048576
+	cmp	r2, ip
+	bhi	.L782
 	.loc 5 454 0
-	ldr	r2, [r3, #2540]
-	lsrs	r5, r2, #10
-	mov	r2, #33554432
-	asrs	r2, r2, r5
-.LVL663:
+	ldr	r3, [r3, #2540]
 	.loc 5 457 0
-	add	r2, r2, r6
-.LVL664:
+	mov	ip, #33554432
+	.loc 5 454 0
+	lsr	r3, r3, #10
+	.loc 5 457 0
+	add	r2, r2, ip, asr r3
 	cmp	r1, r2
-	bhi	.L796
+	bhi	.L782
 	.loc 5 458 0
-	ldrb	r3, [r3, #2272]	@ zero_extendqisi2
+	ldr	r3, .L785+8
+	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L786
-.L796:
+	bne	.L772
+.L782:
 	.loc 5 460 0
-	movs	r3, #1
+	mov	r3, #1
 	.loc 5 461 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 5 460 0
 	str	r3, [r4, #2692]
 	.loc 5 461 0
 	str	r0, [r4, #2696]
 	.loc 5 462 0
 	str	r1, [r4, #2688]
-	b	.L786
-.L800:
+	b	.L772
+.L786:
 	.align	2
-.L799:
+.L785:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LBE403:
+	.word	.LANCHOR0+2244
+.LBE402:
 .LFE268:
-	.fnend
 	.size	FtlReadRefresh, .-FtlReadRefresh
-	.align	1
+	.align	2
 	.global	ftl_check_vpc
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-	.fnstart
 .LFB240:
 	.loc 2 2273 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI103:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI259:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI260:
+	sub	fp, ip, #4
+.LCFI261:
+	sub	sp, sp, #4
 	.loc 2 2282 0
-	movs	r4, #0
-.LVL665:
-	ldr	r6, .L825
-	.loc 2 2288 0
-	ldr	r7, .L825+4
+	mov	r4, #0
+.LVL667:
+	ldr	r6, .L811
 	.loc 2 2279 0
-	ldr	r1, .L825+8
+	ldr	r1, .L811+4
+	ldr	r0, .L811+8
 	mov	r5, r6
-	ldr	r0, .L825+12
 	bl	printk
-.LVL666:
+.LVL668:
+.LBB409:
 .LBB410:
 .LBB411:
-.LBB412:
 	.loc 1 202 0
 	mov	r1, #8192
-	ldr	r0, .L825+4
+	ldr	r0, .L811+12
 	bl	__memzero
-.LVL667:
-.L802:
-.LBE412:
+.LVL669:
+.L788:
 .LBE411:
 .LBE410:
+.LBE409:
 	.loc 2 2282 0 discriminator 1
 	ldr	r3, [r6, #2480]
 	cmp	r4, r3
-	bcc	.L804
+	bcc	.L790
 	.loc 2 2295 0 discriminator 1
-	ldr	r8, .L825+4
-	movs	r4, #0
-.LVL668:
+	ldr	r8, .L811+12
+	mov	r4, #0
+.LVL670:
 	.loc 2 2297 0 discriminator 1
-	ldr	r10, .L825+24
-	mov	r7, r4
-.LVL669:
-	.loc 2 2295 0 discriminator 1
-	movw	r9, #65535
-.L805:
+	ldr	r9, .L811+16
+	mov	r6, r4
+.LVL671:
+.L791:
 	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r5, #16]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L807
+	bhi	.L793
 	.loc 2 2305 0
 	ldr	r4, [r5, #2316]
-	cbz	r4, .L808
-.LBB413:
-	.loc 2 2308 0
-	ldr	r3, [r5, #2292]
-	.loc 2 2309 0
-	movs	r6, #0
+	cmp	r4, #0
+	beq	.L794
+.LBB412:
 	.loc 2 2307 0
-	ldrh	r8, [r5, #2320]
-.LVL670:
-	.loc 2 2316 0
-	mov	fp, #6
-	.loc 2 2313 0
-	ldr	r9, .L825+4
-	.loc 2 2308 0
-	subs	r4, r4, r3
-	ldr	r3, .L825+16
-	asrs	r4, r4, #1
+	ldr	r3, .L811+20
+	.loc 2 2309 0
+	mov	r7, #0
 	.loc 2 2313 0
-	ldr	r10, .L825+28
+	ldr	r9, .L811+12
+	ldr	r10, .L811+24
+	.loc 2 2307 0
+	ldrh	r8, [r3]
+.LVL672:
 	.loc 2 2308 0
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L809:
+	ldr	r3, [r5, #2292]
+	sub	r4, r4, r3
+	ubfx	r4, r4, #3, #16
+.L795:
 	.loc 2 2309 0 discriminator 1
-	uxth	r3, r6
+	uxth	r3, r7
 	cmp	r8, r3
-	bls	.L808
+	bls	.L794
 	.loc 2 2311 0
-	ldr	r3, [r5, #2300]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L810
+	ldr	r2, [r5, #2300]
+	lsl	r3, r4, #1
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	beq	.L796
 	.loc 2 2314 0
-	movs	r7, #1
+	mov	r6, #1
 	.loc 2 2313 0
-	ldrh	r3, [r9, r4, lsl #1]
+	ldrh	r3, [r9, r3]
 	mov	r1, r4
 	mov	r0, r10
 	bl	printk
-.LVL671:
-.L810:
+.LVL673:
+.L796:
 	.loc 2 2316 0
-	mul	r4, fp, r4
 	ldr	r3, [r5, #2292]
-	adds	r6, r6, #1
+	lsl	r4, r4, #3
+	add	r7, r7, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L809
-.L808:
-.LBE413:
+	bne	.L795
+.L794:
+.LBE412:
 	.loc 2 2321 0
-	cbz	r7, .L801
+	cmp	r6, #0
+	ldmibeq	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	.loc 2 2321 0 is_stmt 0 discriminator 1
 	movw	r2, #2321
-	ldr	r1, .L825+8
-	ldr	r0, .L825+20
+	ldr	r1, .L811+4
+	ldr	r0, .L811+28
 	bl	printk
-.LVL672:
-.L801:
-	.loc 2 2322 0 is_stmt 1
-	add	sp, sp, #12
-.LCFI104:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL673:
-.L804:
-.LCFI105:
-	.loc 2 2284 0
-	movs	r2, #0
-	add	r1, sp, #4
+.LVL674:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL675:
+.L790:
+	.loc 2 2284 0 is_stmt 1
+	mov	r2, #0
+	sub	r1, fp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL674:
+.LVL676:
 	.loc 2 2285 0
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L803
+	ldr	r0, [fp, #-44]
+	cmn	r0, #1
+	beq	.L789
 	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL675:
+.LVL677:
 	.loc 2 2288 0
-	ldrh	r3, [r7, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L803:
+	ldr	r2, .L811+12
+	lsl	r0, r0, #1
+	ldrh	r3, [r2, r0]
+	add	r3, r3, #1
+	strh	r3, [r2, r0]	@ movhi
+.L789:
 	.loc 2 2282 0 discriminator 2
-	adds	r4, r4, #1
-	b	.L802
-.LVL676:
-.L807:
+	add	r4, r4, #1
+	b	.L788
+.LVL678:
+.L793:
 	.loc 2 2295 0
+	uxth	r1, r4
 	ldr	r3, [r5, #2300]
-	uxth	r6, r4
-	ldrh	r2, [r3, r6, lsl #1]
-	ldrh	r3, [r8, r6, lsl #1]
+	lsl	r7, r1, #1
+	ldrh	r2, [r3, r7]
+	ldrh	r3, [r8, r7]
 	cmp	r2, r3
-	beq	.L806
+	beq	.L792
 	.loc 2 2297 0
-	mov	r1, r6
-	mov	r0, r10
+	mov	r0, r9
 	bl	printk
-.LVL677:
+.LVL679:
 	.loc 2 2298 0
 	ldr	r3, [r5, #2300]
-	ldrh	r3, [r3, r6, lsl #1]
-	cmp	r3, r9
-	beq	.L806
+	movw	r2, #65535
+	ldrh	r3, [r3, r7]
+	cmp	r3, r2
+	beq	.L792
 	.loc 2 2298 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r8, r6, lsl #1]
+	ldrh	r2, [r8, r7]
 	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
-	it	hi
-	movhi	r7, #1
-.L806:
-	adds	r4, r4, #1
-	b	.L805
-.L826:
+	movhi	r6, #1
+.L792:
+	add	r4, r4, #1
+	b	.L791
+.L812:
 	.align	2
-.L825:
+.L811:
 	.word	.LANCHOR0
-	.word	check_vpc_table
 	.word	.LANCHOR1+314
 	.word	.LC90
-	.word	-1431655765
-	.word	.LC1
+	.word	check_vpc_table
 	.word	.LC91
+	.word	.LANCHOR0+2320
 	.word	.LC92
+	.word	.LC1
 .LFE240:
-	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
-	.align	1
+	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-	.fnstart
 .LFB217:
 	.loc 2 946 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL678:
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI106:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL680:
+	mov	ip, sp
+.LCFI262:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI263:
+	sub	fp, ip, #4
+.LCFI264:
+	.loc 2 952 0
+	ldr	r3, [r0, #36]
 	.loc 2 946 0
 	mov	r6, r0
 	.loc 2 952 0
-	ldr	r3, [r0, #36]
-	cbz	r3, .L827
+	cmp	r3, #0
+	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
+	.loc 2 954 0
+	mov	r3, #0
 	.loc 2 948 0
 	ldrh	r5, [r0, #6]
 	.loc 2 954 0
-	movs	r3, #0
+	str	r3, [r0, #36]
 	.loc 2 956 0
-	ldr	r4, .L831
+	ldr	r3, .L820
 	.loc 2 949 0
 	ldr	r2, [r0, #24]
-.LVL679:
-	.loc 2 954 0
-	str	r3, [r0, #36]
+.LVL681:
 	.loc 2 948 0
-	subs	r5, r5, #1
-	.loc 2 956 0
-	ldr	r0, [r4, #3804]
+	sub	r5, r5, #1
 	.loc 2 979 0
 	uxth	r5, r5
+	.loc 2 956 0
+	ldr	r0, [r3, #3804]
+.LVL682:
+	mov	r4, r3
 	.loc 2 957 0
-	ldr	r1, [r4, #3244]
+	ldr	r1, [r3, #3244]
 	.loc 2 956 0
-	str	r0, [r4, #3228]
+	str	r0, [r3, #3228]
 	.loc 2 957 0
-	str	r1, [r4, #3232]
+	str	r1, [r3, #3232]
 	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL680:
+.LVL683:
+	.loc 2 981 0
+	cmp	r2, #0
 	.loc 2 980 0
-	str	r2, [r4, #3224]
+	str	r2, [r3, #3224]
 	.loc 2 981 0
-	cbz	r2, .L829
+	beq	.L815
 	.loc 2 983 0
-	movs	r2, #1
-.LVL681:
-	addw	r0, r4, #3220
+	mov	r2, #1
+.LVL684:
+	ldr	r0, .L820+4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL682:
-.L830:
+.LVL685:
+.L816:
 	.loc 2 990 0
 	ldr	r2, [r4, #3228]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 992 0
-	pop	{r4, r5, r6, lr}
-.LCFI107:
-.LVL683:
-	.loc 2 990 0
-	b	FtlMapWritePage
-.LVL684:
-.L829:
-.LCFI108:
-	.loc 2 987 0
-	ldrh	r2, [r4, #86]
-.LVL685:
-	movs	r1, #255
-	bl	ftl_memset
+	bl	FtlMapWritePage
 .LVL686:
-	b	.L830
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
 .LVL687:
-.L827:
-	pop	{r4, r5, r6, pc}
-.L832:
+.L815:
+	.loc 2 987 0
+	ldrh	r2, [r3, #86]
+.LVL688:
+	mov	r1, #255
+	bl	ftl_memset
+.LVL689:
+	b	.L816
+.L821:
 	.align	2
-.L831:
+.L820:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3220
 .LFE217:
-	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.align	1
+	.align	2
 	.global	FtlScanSysBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-	.fnstart
 .LFB220:
 	.loc 2 1144 0
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI109:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI265:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI266:
+	sub	fp, ip, #4
+.LCFI267:
+	sub	sp, sp, #24
 	.loc 2 1150 0
-	movs	r5, #0
-	ldr	r4, .L914
-	.loc 2 1144 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI110:
+	mov	r5, #0
+	ldr	r4, .L903
 	.loc 2 1152 0
 	mov	r1, r5
 	ldr	r2, [r4, #104]
+	.loc 2 1150 0
+	add	r3, r4, #3904
+	.loc 2 1152 0
 	ldr	r0, [r4, #3852]
+	.loc 2 1158 0
+	mov	r6, r4
 	.loc 2 1150 0
-	strh	r5, [r4, #3904]	@ movhi
+	strh	r5, [r3]	@ movhi
 	.loc 2 1151 0
 	strh	r5, [r4, #120]	@ movhi
 	.loc 2 1152 0
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL688:
+.LVL690:
 	.loc 2 1153 0
 	ldr	r2, [r4, #104]
 	mov	r1, r5
 	ldr	r0, [r4, #3828]
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL689:
+.LVL691:
 	.loc 2 1154 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #3840]
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL690:
+.LVL692:
 	.loc 2 1155 0
 	ldrh	r2, [r4, #96]
 	mov	r1, r5
 	ldr	r0, [r4, #124]
-	lsls	r2, r2, #1
+	mov	r5, r4
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL691:
-	.loc 2 1158 0
-	ldrh	r8, [r4, #16]
-.LVL692:
+.LVL693:
+.LBB418:
 .LBB419:
 .LBB420:
-.LBB421:
 	.loc 1 202 0
-	mov	r3, #-1
+	ldr	r2, .L903+4
+	mvn	r3, #0
 	str	r3, [r4, #2552]
-	str	r3, [r4, #2556]
-	str	r3, [r4, #2560]
-.LVL693:
-.L834:
-.LBE421:
+	str	r3, [r2, #4]
+	str	r3, [r2, #8]
 .LBE420:
 .LBE419:
-	.loc 2 1158 0 discriminator 1
-	ldrh	r3, [r4, #18]
-	cmp	r3, r8
-	bls	.L876
-	.loc 2 1169 0 discriminator 1
-	movs	r5, #0
+.LBE418:
+	.loc 2 1158 0
+	ldrh	r3, [r4, #16]
+.LVL694:
+	str	r3, [fp, #-44]
+.LVL695:
+.L823:
+	.loc 2 1158 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r6, #18]
+.LVL696:
+	ldr	r2, [fp, #-44]
+.LVL697:
+	cmp	r3, r2
+	bls	.L864
+	.loc 2 1169 0 is_stmt 1 discriminator 1
+	ldr	r1, [r6, #3152]
+	mov	r7, #0
+.LVL698:
 	.loc 2 1162 0 discriminator 1
-	ldrh	fp, [r4, #8]
-	.loc 2 1167 0 discriminator 1
-	ldr	r9, [r4, #3792]
+	ldrh	r2, [r6, #8]
+.LVL699:
 	.loc 2 1169 0 discriminator 1
-	mov	r7, r5
-	.loc 2 1168 0 discriminator 1
-	ldr	r3, [r4, #3148]
+	mov	r10, r7
 	.loc 2 1167 0 discriminator 1
-	mov	r10, #20
+	ldr	r8, [r6, #3792]
+	.loc 2 1168 0 discriminator 1
+	ldr	r3, [r6, #3148]
 	.loc 2 1169 0 discriminator 1
-	ldr	r2, [r4, #3152]
-	ldrh	r6, [r4, #88]
-.LVL694:
-	b	.L877
-.L837:
-	str	r3, [sp, #8]
-	.loc 2 1164 0
-	mov	r1, r8
-	ldr	r3, .L914+4
-	str	r2, [sp, #12]
-	ldrb	r0, [r3, r5]	@ zero_extendqisi2
+	str	r1, [fp, #-48]
+	ldrh	r9, [r6, #88]
+	.loc 2 1164 0 discriminator 1
+	ldr	ip, .L903+8
+	b	.L865
+.L825:
+	.loc 2 1164 0 is_stmt 0
+	ldrb	r0, [ip, r7]	@ zero_extendqisi2
+	ldr	r1, [fp, #-44]
+	str	r3, [fp, #-64]
+	str	r2, [fp, #-60]
+	str	ip, [fp, #-56]
 	bl	V2P_block
-.LVL695:
-	str	r0, [sp, #4]
-	.loc 2 1165 0
+.LVL700:
+	str	r0, [fp, #-52]
+	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL696:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	cbnz	r0, .L835
+.LVL701:
+	cmp	r0, #0
+	ldr	ip, [fp, #-56]
+	ldr	r2, [fp, #-60]
+	ldr	r3, [fp, #-64]
+	bne	.L824
 	.loc 2 1167 0
-	ldr	r1, [sp, #4]
-	mla	r0, r10, r7, r9
-	lsls	r1, r1, #10
+	mov	r1, #20
+	mla	r0, r1, r10, r8
+	ldr	r1, [fp, #-52]
+	lsl	r1, r1, #10
 	.loc 2 1168 0
-	str	r3, [r0, #8]
-	.loc 2 1167 0
-	str	r1, [r0, #4]
-	.loc 2 1169 0
-	mov	r1, r6
-	muls	r1, r7, r1
-	.loc 2 1170 0
-	add	r7, r7, #1
-.LVL697:
-	.loc 2 1169 0
-	it	mi
-	addmi	r1, r1, #3
-	.loc 2 1170 0
-	uxth	r7, r7
-.LVL698:
+	stmib	r0, {r1, r3}
 	.loc 2 1169 0
+	mul	r1, r9, r10
+	add	lr, r1, #3
+	cmp	r1, #0
+	movlt	r1, lr
+	ldr	lr, [fp, #-48]
 	bic	r1, r1, #3
-	add	r1, r1, r2
+	add	r1, lr, r1
 	str	r1, [r0, #12]
-.L835:
-	adds	r5, r5, #1
-.L877:
+	.loc 2 1170 0
+	add	r1, r10, #1
+	uxth	r10, r1
+.L824:
+	add	r7, r7, #1
+.L865:
 	.loc 2 1162 0 discriminator 1
-	uxth	r1, r5
-	cmp	fp, r1
-	bhi	.L837
+	uxth	r1, r7
+	cmp	r2, r1
+	bhi	.L825
 	.loc 2 1173 0
-	cbnz	r7, .L838
-.LVL699:
-.L875:
-	.loc 2 1158 0
-	add	r8, r8, #1
-.LVL700:
-	uxth	r8, r8
-.LVL701:
-	b	.L834
+	cmp	r10, #0
+	bne	.L826
 .LVL702:
-.L838:
-	.loc 2 1176 0
-	mov	r0, r9
-	.loc 2 1177 0
-	mov	r9, #0
+.L863:
+	.loc 2 1158 0
+	ldr	r3, [fp, #-44]
+.LVL703:
+	add	r3, r3, #1
+.LVL704:
+	uxth	r3, r3
+.LVL705:
+	str	r3, [fp, #-44]
+	b	.L823
+.LVL706:
+.L826:
 	.loc 2 1176 0
-	movs	r2, #1
-	mov	r1, r7
+	mov	r2, #1
+	mov	r1, r10
+	mov	r0, r8
 	bl	FlashReadPages
-.LVL703:
-.L839:
-	.loc 2 1177 0 discriminator 1
-	uxth	r3, r9
-	cmp	r7, r3
-	bls	.L875
-	movs	r3, #20
-	mul	r10, r3, r9
-	.loc 2 1178 0
+.LVL707:
+	.loc 2 1177 0
+	mov	r3, #0
+.LVL708:
+.L902:
+	str	r3, [fp, #-48]
+	.loc 2 1177 0 is_stmt 0 discriminator 2
+	ldrh	r3, [fp, #-48]
+	cmp	r10, r3
+	bls	.L863
+	ldr	r3, [fp, #-48]
+	mov	r9, #20
+	mul	r9, r9, r3
+	.loc 2 1178 0 is_stmt 1
 	ldr	r3, [r4, #3792]
-	add	r2, r3, r10
+	add	r2, r3, r9
 	.loc 2 1181 0
-	ldr	r3, [r3, r10]
+	ldr	r3, [r3, r9]
 	.loc 2 1178 0
-	ldr	r5, [r2, #4]
+	ldr	r1, [r2, #4]
 	.loc 2 1179 0
-	ldr	r6, [r2, #12]
+	ldr	r7, [r2, #12]
 	.loc 2 1181 0
-	adds	r3, r3, #1
+	cmn	r3, #1
 	.loc 2 1178 0
-	ubfx	r5, r5, #10, #16
+	lsr	ip, r1, #10
+	uxth	r8, ip
 	.loc 2 1181 0
-	bne	.L842
-	mov	fp, #16
-	.loc 2 1185 0
-	movw	r3, #65535
-.L844:
+	bne	.L830
+	mov	r3, #16
+.L832:
 	.loc 2 1183 0
 	ldr	r0, [r4, #3792]
-	str	r3, [sp, #4]
-	add	r0, r0, r10
+	str	ip, [fp, #-56]
+	str	r3, [fp, #-52]
+	add	r0, r0, r9
 	ldr	r2, [r0, #4]
-	adds	r2, r2, #1
+	add	r2, r2, #1
 	str	r2, [r0, #4]
 	.loc 2 1184 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL704:
+.LVL709:
 	.loc 2 1185 0
-	ldrh	r2, [r6]
-	ldr	r3, [sp, #4]
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	ldr	ip, [fp, #-56]
 	cmp	r2, r3
-	bne	.L841
+	ldr	r3, [fp, #-52]
+	bne	.L829
 	.loc 2 1186 0
 	ldr	r3, [r4, #3792]
-	mov	r2, #-1
-	str	r2, [r3, r10]
+	mvn	r2, #0
+	str	r2, [r3, r9]
 	.loc 2 1194 0
 	ldr	r3, [r4, #3792]
-	ldr	r3, [r3, r10]
+	ldr	r3, [r3, r9]
 	cmp	r3, r2
-	bne	.L842
-.L843:
+	bne	.L830
+.L831:
 	.loc 2 1336 0
-	movs	r1, #0
-	mov	r0, r5
+	mov	r1, #0
+	uxth	r0, ip
 	bl	FtlFreeSysBlkQueueIn
-.LVL705:
-	b	.L847
-.L841:
+.LVL710:
+	b	.L835
+.L829:
 	.loc 2 1188 0
 	ldr	r2, [r4, #3792]
-	ldr	r2, [r2, r10]
-	adds	r2, r2, #1
-	bne	.L842
-	add	fp, fp, #-1
-	uxth	fp, fp
+	ldr	r2, [r2, r9]
+	cmn	r2, #1
+	bne	.L830
+	sub	r3, r3, #1
+	uxth	r3, r3
 	.loc 2 1182 0 discriminator 2
-	cmp	fp, #0
-	bne	.L844
-	b	.L843
-.L842:
+	cmp	r3, #0
+	bne	.L832
+	b	.L831
+.L830:
 	.loc 2 1196 0
-	ldr	r2, [r4, #2516]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L845
+	ldr	r2, [r6, #2516]
+	ldr	r3, [r7, #4]
+	cmn	r2, #1
+	beq	.L833
 	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L846
-.L845:
+	bhi	.L834
+.L833:
 	.loc 2 1198 0 is_stmt 1
-	adds	r2, r3, #1
+	cmn	r3, #1
 	.loc 2 1201 0
-	itt	ne
 	addne	r2, r3, #1
-	strne	r2, [r4, #2516]
-.L846:
+	strne	r2, [r5, #2516]
+.L834:
 	.loc 2 1206 0
-	ldrh	r2, [r6]
+	ldrh	r2, [r7]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L848
-	bhi	.L849
+	beq	.L836
+	bhi	.L837
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L850
-.L847:
-	add	r9, r9, #1
-	b	.L839
-.L849:
+	beq	.L838
+.L835:
+	ldr	r3, [fp, #-48]
+	add	r3, r3, #1
+	b	.L902
+.L837:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L851
+	beq	.L839
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L843
-	b	.L847
-.L851:
+	beq	.L831
+	b	.L835
+.L839:
 	.loc 2 1211 0
-	ldrh	r2, [r4, #3904]
+	ldr	r9, .L903+12
 	ldr	r3, [r4, #104]
+	ldrh	r2, [r9]
 	cmp	r2, r3
-	bls	.L853
+	bls	.L841
 	.loc 2 1211 0 is_stmt 0 discriminator 1
 	movw	r2, #1211
-	ldr	r1, .L914+8
-	ldr	r0, .L914+12
+	ldr	r1, .L903+16
+	ldr	r0, .L903+20
 	bl	printk
-.LVL706:
-.L853:
+.LVL711:
+.L841:
 	.loc 2 1212 0 is_stmt 1
-	ldr	r1, [r4, #104]
-	ldrh	r0, [r4, #3904]
+	ldr	r0, [r4, #104]
+	ldrh	r2, [r9]
 	.loc 2 1214 0
-	ldr	r10, [r4, #3852]
+	ldr	ip, [r4, #3852]
 	.loc 2 1212 0
-	uxth	ip, r1
-	add	r3, ip, #-1
-	sub	ip, ip, r0
-	add	ip, ip, #-1
+	uxth	r1, r0
+	sub	r3, r1, #1
+	sub	r1, r1, r2
+	sub	r1, r1, #1
 	sxth	r3, r3
-	sxth	ip, ip
-.L854:
+	sxth	r1, r1
+	str	r1, [fp, #-52]
+.L842:
 	.loc 2 1212 0 is_stmt 0 discriminator 1
-	cmp	r3, ip
-	bgt	.L860
+	ldr	r1, [fp, #-52]
+	cmp	r3, r1
+	bgt	.L848
 	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L892
-	b	.L847
-.L860:
+	bge	.L880
+	b	.L835
+.L848:
 	.loc 2 1214 0
-	ldr	r2, [r6, #4]
-	lsl	fp, r3, #2
-	mov	lr, r2
-	ldr	r2, [r10, r3, lsl #2]
-	cmp	lr, r2
-	bls	.L855
+	lsl	lr, r3, #2
+	ldr	r1, [r7, #4]
+	str	lr, [fp, #-56]
+	ldr	lr, [ip, r3, lsl #2]
+	cmp	r1, lr
+	bls	.L843
 	.loc 2 1216 0
-	ldr	r2, [r10]
-	cbnz	r2, .L856
+	ldr	r1, [ip]
+	cmp	r1, #0
+	bne	.L844
 	.loc 2 1216 0 is_stmt 0 discriminator 1
-	cmp	r1, r0
+	cmp	r0, r2
 	.loc 2 1221 0 is_stmt 1 discriminator 1
-	itt	ne
-	addne	r0, r0, #1
-	strhne	r0, [r4, #3904]	@ movhi
-.L856:
+	addne	r2, r2, #1
+	strhne	r2, [r9]	@ movhi
+.L844:
 	.loc 2 1224 0 discriminator 1
 	uxth	ip, r3
-	movs	r2, #0
-.L857:
-	uxth	r0, r2
-	sxth	r1, r2
+	mov	r1, #0
+.L845:
+	uxth	r0, r1
+	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L858
+	bhi	.L846
 	.loc 2 1229 0
-	ldr	r2, [r4, #3852]
+	ldr	r1, [r7, #4]
 	.loc 2 1235 0
 	cmp	r3, #0
 	.loc 2 1229 0
-	ldr	r1, [r6, #4]
-	str	r1, [r2, fp]
+	ldr	r2, [r5, #3852]
+	ldr	r0, [fp, #-56]
+	str	r1, [r2, r0]
 	.loc 2 1230 0
-	ldr	r2, [r4, #3828]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
+	lsl	r2, r3, #1
+	ldr	r1, [r5, #3828]
+	strh	r8, [r1, r2]	@ movhi
 	.loc 2 1235 0
-	blt	.L847
+	blt	.L835
 	.loc 2 1242 0
-	ldrh	r0, [r4, #3904]
-	ldr	r2, [r4, #104]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L847
-.L892:
-	.loc 2 1245 0
-	ldr	r2, [r4, #3852]
+	ldr	r2, .L903+12
+	ldr	r1, [r5, #104]
+	ldrh	r2, [r2]
+	sub	r1, r1, r2
+	sub	r1, r1, #1
+	sxth	r1, r1
+	cmp	r3, r1
+	bgt	.L835
+.L880:
 	.loc 2 1244 0
-	adds	r0, r0, #1
+	add	r2, r2, #1
 	.loc 2 1245 0
-	ldr	r1, [r6, #4]
+	ldr	r1, [r7, #4]
 	.loc 2 1244 0
-	strh	r0, [r4, #3904]	@ movhi
+	strh	r2, [r9]	@ movhi
 	.loc 2 1245 0
+	ldr	r2, [r4, #3852]
 	str	r1, [r2, r3, lsl #2]
 	.loc 2 1246 0
+	lsl	r3, r3, #1
 	ldr	r2, [r4, #3828]
-.L912:
+.L900:
 	.loc 2 1290 0
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L847
-.L858:
+	strh	r8, [r2, r3]	@ movhi
+	b	.L835
+.L846:
 	.loc 2 1226 0 discriminator 3
-	ldr	r0, [r4, #3852]
-	adds	r2, r2, #1
-	add	lr, r0, r1, lsl #2
+	ldr	r0, [r6, #3852]
+	add	r1, r1, #1
+	add	lr, r0, r2, lsl #2
 	ldr	lr, [lr, #4]
-	str	lr, [r0, r1, lsl #2]
+	str	lr, [r0, r2, lsl #2]
 	.loc 2 1227 0 discriminator 3
-	ldr	r0, [r4, #3828]
-	add	lr, r0, r1, lsl #1
+	lsl	r2, r2, #1
+	ldr	r0, [r6, #3828]
+	add	lr, r0, r2
 	ldrh	lr, [lr, #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L857
-.L855:
-	subs	r3, r3, #1
+	strh	lr, [r0, r2]	@ movhi
+	b	.L845
+.L843:
+	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L854
-.L915:
-	.align	2
-.L914:
-	.word	.LANCHOR0
-	.word	.LANCHOR0+36
-	.word	.LANCHOR1+328
-	.word	.LC1
-.L850:
+	b	.L842
+.L838:
 	.loc 2 1252 0
 	ldrh	r2, [r4, #120]
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bls	.L863
+	bls	.L851
 	.loc 2 1252 0 is_stmt 0 discriminator 1
 	movw	r2, #1252
-	ldr	r1, .L916
-	ldr	r0, .L916+4
+	ldr	r1, .L903+16
+	ldr	r0, .L903+20
 	bl	printk
-.LVL707:
-.L863:
+.LVL712:
+.L851:
 	.loc 2 1253 0 is_stmt 1
-	ldrh	lr, [r4, #96]
-	ldrh	r0, [r4, #120]
+	ldrh	r2, [r4, #96]
+	ldrh	r1, [r4, #120]
 	.loc 2 1255 0
-	ldr	r10, [r4, #3840]
+	ldr	ip, [r4, #3840]
 	.loc 2 1253 0
-	add	ip, lr, #-1
-	sxth	r3, ip
-	sub	ip, ip, r0
-.L864:
+	sub	r0, r2, #1
+	sxth	r3, r0
+	sub	r0, r0, r1
+	str	r0, [fp, #-52]
+.L852:
 	.loc 2 1253 0 is_stmt 0 discriminator 1
-	cmp	r3, ip
-	ble	.L869
+	ldr	r0, [fp, #-52]
+	cmp	r3, r0
+	ble	.L857
 	.loc 2 1255 0 is_stmt 1
-	ldr	r2, [r6, #4]
-	lsl	fp, r3, #2
-	ldr	r1, [r10, r3, lsl #2]
-	cmp	r2, r1
-	bls	.L865
+	ldr	r9, [ip, r3, lsl #2]
+	lsl	lr, r3, #2
+	ldr	r0, [r7, #4]
+	cmp	r0, r9
+	bls	.L853
 	.loc 2 1257 0
-	ldr	r2, [r10]
-	cbnz	r2, .L866
-	.loc 2 1257 0 is_stmt 0 discriminator 1
-	cmp	lr, r0
-	.loc 2 1265 0 is_stmt 1 discriminator 1
-	itt	ne
-	addne	r0, r0, #1
-	strhne	r0, [r4, #120]	@ movhi
-.L866:
-	.loc 2 1267 0 discriminator 1
+	sub	r2, r2, r1
+	ldr	r0, [ip]
+	clz	r2, r2
+	.loc 2 1267 0
 	uxth	ip, r3
-	movs	r2, #0
-.L867:
-	uxth	r0, r2
-	sxth	r1, r2
+	.loc 2 1257 0
+	lsr	r2, r2, #5
+	cmp	r0, #0
+	orrne	r2, r2, #1
+	cmp	r2, #0
+	.loc 2 1265 0
+	addeq	r1, r1, #1
+	strheq	r1, [r5, #120]	@ movhi
+	mov	r1, #0
+.L855:
+	.loc 2 1267 0 discriminator 1
+	uxth	r0, r1
+	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L868
+	bhi	.L856
 	.loc 2 1272 0
-	ldr	r2, [r4, #3840]
-	ldr	r1, [r6, #4]
-	str	r1, [r2, fp]
+	ldr	r1, [r7, #4]
+	ldr	r2, [r5, #3840]
+	str	r1, [r2, lr]
 	.loc 2 1273 0
-	ldr	r2, [r4, #124]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L869:
+	lsl	r2, r3, #1
+	ldr	r1, [r5, #124]
+	strh	r8, [r1, r2]	@ movhi
+.L857:
 	.loc 2 1278 0
 	cmp	r3, #0
-	blt	.L847
+	blt	.L835
 	.loc 2 1286 0
-	ldrh	r2, [r4, #96]
-	ldrh	r1, [r4, #120]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
+	ldrh	r2, [r5, #96]
+	ldrh	r1, [r5, #120]
+	sub	r2, r2, #1
+	sub	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L847
+	bgt	.L835
 	.loc 2 1288 0
-	adds	r1, r1, #1
+	add	r1, r1, #1
 	.loc 2 1289 0
-	ldr	r2, [r4, #3840]
+	ldr	r2, [r5, #3840]
 	.loc 2 1288 0
-	strh	r1, [r4, #120]	@ movhi
+	strh	r1, [r5, #120]	@ movhi
 	.loc 2 1289 0
-	ldr	r1, [r6, #4]
+	ldr	r1, [r7, #4]
 	str	r1, [r2, r3, lsl #2]
 	.loc 2 1290 0
-	ldr	r2, [r4, #124]
-	b	.L912
-.L868:
+	lsl	r3, r3, #1
+	ldr	r2, [r5, #124]
+	b	.L900
+.L856:
 	.loc 2 1269 0 discriminator 3
-	ldr	r0, [r4, #3840]
-	adds	r2, r2, #1
-	add	lr, r0, r1, lsl #2
-	ldr	lr, [lr, #4]
-	str	lr, [r0, r1, lsl #2]
+	ldr	r0, [r6, #3840]
+	add	r1, r1, #1
+	add	r9, r0, r2, lsl #2
+	ldr	r9, [r9, #4]
+	str	r9, [r0, r2, lsl #2]
 	.loc 2 1270 0 discriminator 3
-	ldr	r0, [r4, #124]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L867
-.L865:
-	subs	r3, r3, #1
+	lsl	r2, r2, #1
+	ldr	r0, [r6, #124]
+	add	r9, r0, r2
+	ldrh	r9, [r9, #2]
+	strh	r9, [r0, r2]	@ movhi
+	b	.L855
+.L853:
+	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L864
-.L848:
+	b	.L852
+.L836:
 	.loc 2 1297 0
-	ldrh	r1, [r4, #2552]
+	ldr	r9, .L903+4
 	movw	r2, #65535
+	ldrh	r1, [r9]
 	cmp	r1, r2
-	bne	.L871
 	.loc 2 1299 0
-	strh	r5, [r4, #2552]	@ movhi
-.L913:
-	.loc 2 1310 0
-	str	r3, [r4, #2560]
-	b	.L847
-.L871:
+	strheq	r8, [r9]	@ movhi
+	.loc 2 1297 0
+	beq	.L901
 	.loc 2 1304 0
-	ldrh	r0, [r4, #2556]
+	ldrh	r0, [r9, #4]
 	cmp	r0, r2
-	beq	.L872
+	beq	.L860
 	.loc 2 1305 0
-	movs	r1, #1
+	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL708:
-.L872:
+.LVL713:
+.L860:
 	.loc 2 1306 0
+	ldr	r3, [r7, #4]
 	ldr	r2, [r4, #2560]
-	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L873
+	.loc 2 1314 0
+	strhcs	r8, [r9, #4]	@ movhi
+	.loc 2 1306 0
+	bcs	.L835
 	.loc 2 1308 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r9]
 	.loc 2 1309 0
-	strh	r5, [r4, #2552]	@ movhi
+	strh	r8, [r9]	@ movhi
 	.loc 2 1308 0
-	strh	r3, [r4, #2556]	@ movhi
+	strh	r3, [r9, #4]	@ movhi
 	.loc 2 1310 0
-	ldr	r3, [r6, #4]
-	b	.L913
-.L873:
-	.loc 2 1314 0
-	strh	r5, [r4, #2556]	@ movhi
-	b	.L847
-.L876:
+	ldr	r3, [r7, #4]
+.L901:
+	str	r3, [r4, #2560]
+	b	.L835
+.LVL714:
+.L864:
 	.loc 2 1341 0
-	ldr	r1, [r4, #3828]
-	ldrh	r3, [r1]
-	cbz	r3, .L878
-.L881:
+	ldr	r2, [r6, #3828]
+.LVL715:
+	ldrh	r3, [r2]
+	cmp	r3, #0
+	beq	.L866
+.L869:
 	.loc 2 1359 0
 	ldr	r1, [r4, #124]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L879
-.L880:
+	beq	.L867
+.L868:
 	.loc 2 1377 0
-	ldrh	r2, [r4, #3904]
+	ldr	r3, .L903+12
+	ldrh	r2, [r3]
 	ldr	r3, [r4, #104]
 	cmp	r2, r3
-	bls	.L911
+	bls	.L899
 	.loc 2 1377 0 is_stmt 0 discriminator 1
 	movw	r2, #1377
-	ldr	r1, .L916
-	ldr	r0, .L916+4
+	ldr	r1, .L903+16
+	ldr	r0, .L903+20
 	bl	printk
-.LVL709:
-.L911:
+.LVL716:
+.L899:
 	.loc 2 1379 0 is_stmt 1
-	movs	r0, #0
-	add	sp, sp, #20
-.LCFI111:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL710:
-.L878:
-.LCFI112:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI268:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL717:
+.L866:
+.LCFI269:
 	.loc 2 1341 0 discriminator 1
-	ldrh	r2, [r4, #3904]
-	cmp	r2, #0
-	beq	.L881
+	ldr	r1, .L903+12
+	ldrh	r1, [r1]
+	cmp	r1, #0
 	.loc 2 1343 0 discriminator 1
-	ldr	r0, [r4, #104]
-.L882:
-	sxth	r2, r3
-	cmp	r2, r0
-	bcs	.L881
+	ldrne	r1, [r6, #104]
+	.loc 2 1341 0 discriminator 1
+	beq	.L869
+.L870:
+	sxth	ip, r3
+	.loc 2 1343 0 discriminator 1
+	cmp	ip, r1
+	bcs	.L869
 	.loc 2 1345 0
-	ldrh	r5, [r1, r2, lsl #1]
-	adds	r3, r3, #1
-	cmp	r5, #0
-	beq	.L882
-	mov	r3, r2
+	lsl	r0, ip, #1
+	add	r3, r3, #1
+	ldrh	r0, [r2, r0]
+	cmp	r0, #0
+	beq	.L870
+	mov	r3, ip
 	.loc 2 1351 0 discriminator 1
-	movs	r5, #0
-.L883:
+	mov	lr, #0
+.L871:
 	.loc 2 1347 0 discriminator 1
-	ldr	r1, [r4, #104]
-	cmp	r3, r1
-	bcs	.L881
+	ldr	r2, [r5, #104]
+	cmp	r3, r2
+	bcs	.L869
 	.loc 2 1349 0 discriminator 3
-	ldr	r1, [r4, #3828]
-	subs	r0, r3, r2
-	ldrh	r6, [r1, r3, lsl #1]
-.LVL711:
-	strh	r6, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, [r5, #3828]
+	lsl	r2, r3, #1
+	sub	r0, r3, ip
+	lsl	r6, r0, #1
+	ldrh	r7, [r1, r2]
+.LVL718:
+	strh	r7, [r1, r6]	@ movhi
 	.loc 2 1350 0 discriminator 3
-	ldr	r1, [r4, #3852]
+	ldr	r1, [r5, #3852]
 	ldr	r6, [r1, r3, lsl #2]
+	add	r3, r3, #1
+	sxth	r3, r3
 	str	r6, [r1, r0, lsl #2]
 	.loc 2 1351 0 discriminator 3
-	ldr	r1, [r4, #3828]
-	strh	r5, [r1, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L883
-.LVL712:
-.L879:
+	ldr	r1, [r5, #3828]
+	strh	lr, [r1, r2]	@ movhi
+	b	.L871
+.LVL719:
+.L867:
 	.loc 2 1359 0 discriminator 1
 	ldrh	r3, [r4, #120]
 	cmp	r3, #0
-	beq	.L880
 	.loc 2 1361 0 discriminator 1
-	ldrh	r0, [r4, #96]
-.L888:
+	ldrhne	r0, [r4, #96]
+	.loc 2 1359 0 discriminator 1
+	beq	.L868
+.L876:
 	sxth	r3, r2
+	.loc 2 1361 0 discriminator 1
 	cmp	r3, r0
-	mov	r5, r3
-	bge	.L880
+	mov	ip, r3
+	bge	.L868
 	.loc 2 1363 0
-	ldrh	r6, [r1, r3, lsl #1]
-.LVL713:
-	adds	r2, r2, #1
-	cmp	r6, #0
-	beq	.L888
+	lsl	lr, r3, #1
+	add	r2, r2, #1
+	ldrh	lr, [r1, lr]
+	cmp	lr, #0
+	beq	.L876
 	.loc 2 1369 0 discriminator 1
-	movs	r0, #0
-.L889:
+	mov	lr, #0
+.L877:
 	.loc 2 1365 0 discriminator 1
-	ldrh	r2, [r4, #96]
+	ldrh	r2, [r5, #96]
 	cmp	r3, r2
-	bge	.L880
+	bge	.L868
 	.loc 2 1367 0 discriminator 3
-	ldr	r2, [r4, #124]
-	subs	r1, r3, r5
-	ldrh	r6, [r2, r3, lsl #1]
-	strh	r6, [r2, r1, lsl #1]	@ movhi
+	ldr	r1, [r5, #124]
+	lsl	r2, r3, #1
+	sub	r0, r3, ip
+	lsl	r6, r0, #1
+	ldrh	r7, [r1, r2]
+.LVL720:
+	strh	r7, [r1, r6]	@ movhi
 	.loc 2 1368 0 discriminator 3
-	ldr	r2, [r4, #3840]
-	ldr	r6, [r2, r3, lsl #2]
-	str	r6, [r2, r1, lsl #2]
-	.loc 2 1369 0 discriminator 3
-	ldr	r2, [r4, #124]
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
+	ldr	r1, [r5, #3840]
+	ldr	r6, [r1, r3, lsl #2]
+	add	r3, r3, #1
 	sxth	r3, r3
-	b	.L889
-.L917:
+	str	r6, [r1, r0, lsl #2]
+	.loc 2 1369 0 discriminator 3
+	ldr	r1, [r5, #124]
+	strh	lr, [r1, r2]	@ movhi
+	b	.L877
+.L904:
 	.align	2
-.L916:
+.L903:
+	.word	.LANCHOR0
+	.word	.LANCHOR0+2552
+	.word	.LANCHOR0+36
+	.word	.LANCHOR0+3904
 	.word	.LANCHOR1+328
 	.word	.LC1
 .LFE220:
-	.fnend
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.align	1
+	.align	2
 	.global	FtlMapTblRecovery
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	.fnstart
 .LFB225:
 	.loc 2 1515 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL714:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI113:
-	.pad #28
-	sub	sp, sp, #28
-.LCFI114:
+	@ args = 0, pretend = 0, frame = 20
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL721:
+	mov	ip, sp
+.LCFI270:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI271:
+	sub	fp, ip, #4
+.LCFI272:
+	sub	sp, sp, #20
+	.loc 2 1526 0
+	mov	r1, #0
 	.loc 2 1519 0
 	ldr	r3, [r0, #24]
-.LVL715:
+.LVL722:
 	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1526 0
-	movs	r1, #0
-	.loc 2 1522 0
-	ldrh	r10, [r0, #6]
-.LVL716:
-	.loc 2 1519 0
-	str	r3, [sp, #4]
-	.loc 2 1521 0
-	ldr	r3, [r0, #16]
-.LVL717:
 	.loc 2 1527 0
-	ldr	r5, .L945
+	ldr	r6, .L932
+	.loc 2 1532 0
+	mov	r7, #0
 	.loc 2 1520 0
-	ldr	r9, [r0, #12]
-.LVL718:
-	.loc 2 1526 0
-	lsl	r2, r10, #2
+	ldr	r8, [r0, #12]
+.LVL723:
+	.loc 2 1519 0
+	str	r3, [fp, #-44]
 	.loc 2 1521 0
-	str	r3, [sp, #12]
+	ldr	r3, [r0, #16]
+.LVL724:
+	mov	r5, r6
+	str	r3, [fp, #-56]
+	.loc 2 1522 0
+	ldrh	r3, [r0, #6]
+.LVL725:
+	str	r3, [fp, #-48]
 	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-.LVL719:
+.LVL726:
 	.loc 2 1526 0
-	ldr	r0, [sp, #4]
-.LVL720:
+	ldr	r0, [fp, #-44]
+.LVL727:
 	.loc 2 1523 0
-	str	r3, [sp, #8]
+	str	r3, [fp, #-52]
 	.loc 2 1526 0
+	ldr	r3, [fp, #-48]
+.LVL728:
+	lsl	r2, r3, #2
 	bl	ftl_memset
-.LVL721:
+.LVL729:
 	.loc 2 1527 0
-	ldr	r3, [r5, #3240]
-	.loc 2 1534 0
-	movs	r2, #1
+	ldr	r3, [r6, #3240]
+	.loc 2 1530 0
+	mvn	r2, #0
 	.loc 2 1528 0
-	ldr	r6, [r5, #3244]
-	.loc 2 1534 0
-	str	r2, [r4, #36]
+	ldr	r9, [r6, #3244]
+	.loc 2 1532 0
+	str	r7, [r4, #32]
 	.loc 2 1527 0
-	str	r3, [r5, #3228]
-	.loc 2 1530 0
-	movw	r3, #65535
+	str	r3, [r6, #3228]
 	.loc 2 1528 0
-	str	r6, [r5, #3232]
+	str	r9, [r6, #3232]
 	.loc 2 1530 0
-	strh	r3, [r4]	@ movhi
+	strh	r2, [r4]	@ movhi
 	.loc 2 1531 0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1532 0
-	movs	r3, #0
-	str	r3, [r4, #32]
-	.loc 2 1535 0
-	mov	r8, r3
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 1534 0
+	mov	r2, #1
 	.loc 2 1533 0
-	str	r3, [r4, #28]
-	.loc 2 1537 0
-	ldr	r3, [sp, #8]
-.LVL722:
-	add	fp, r3, #-1
-	.loc 2 1579 0
-	mov	r3, r5
-.LVL723:
-.L919:
+	str	r7, [r4, #28]
+	.loc 2 1534 0
+	str	r2, [r4, #36]
+.LVL730:
+.L906:
 	.loc 2 1535 0 discriminator 1
-	ldr	r1, [sp, #8]
-.LVL724:
-	sxth	r2, r8
-.LVL725:
-	cmp	r2, r1
-	bge	.L936
+	ldr	r3, [fp, #-52]
+.LVL731:
+	sxth	r2, r7
+.LVL732:
+	cmp	r2, r3
+	bge	.L923
 	.loc 2 1537 0
-	cmp	r2, fp
-	lsl	r7, r2, #1
-.LVL726:
-	bne	.L920
+	ldr	r3, [fp, #-52]
+	lsl	r0, r2, #1
+	sub	r1, r3, #1
+	cmp	r2, r1
+	bne	.L907
+	.loc 2 1539 0
+	add	r10, r8, r0
+	mov	r1, #1
+	ldrh	r0, [r8, r0]
+	.loc 2 1543 0
+	mov	r8, #0
+.LVL733:
+	str	r2, [fp, #-52]
 	.loc 2 1539 0
-	ldrh	r0, [r9, fp, lsl #1]
-.LVL727:
-	movs	r1, #1
-.LVL728:
 	bl	FtlGetLastWrittenPage
-.LVL729:
+.LVL734:
 	.loc 2 1542 0
-	ldr	r3, [sp, #12]
-.LVL730:
-	.loc 2 1539 0
-	add	r7, r7, r9
-	.loc 2 1541 0
-	strh	r8, [r4]	@ movhi
+	ldr	r3, [fp, #-56]
+.LVL735:
 	.loc 2 1539 0
-	sxth	r9, r0
-.LVL731:
+	sxth	r1, r0
+.LVL736:
+	.loc 2 1542 0
+	ldr	r2, [fp, #-52]
+.LVL737:
+	.loc 2 1540 0
+	add	r0, r0, #1
 	.loc 2 1546 0
-	ldr	r8, .L945+4
+	ldr	ip, .L932+4
+	.loc 2 1541 0
+	strh	r7, [r4]	@ movhi
+	.loc 2 1543 0
+	add	r7, r1, #1
 	.loc 2 1540 0
-	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1543 0
-	add	r9, r9, #1
-.LVL732:
-	.loc 2 1542 0
-	ldr	r3, [r3, fp, lsl #2]
-.LVL733:
-	.loc 2 1543 0
-	mov	fp, #0
 	.loc 2 1542 0
-	str	r3, [r4, #28]
-.LVL734:
-.L921:
+	ldr	r2, [r3, r2, lsl #2]
+.LVL738:
+	str	r2, [r4, #28]
+.LVL739:
+.L908:
 	.loc 2 1543 0 discriminator 1
-	sxth	r2, fp
-	cmp	r2, r9
-	blt	.L923
-.LVL735:
-.L936:
+	sxth	r2, r8
+	cmp	r2, r7
+	blt	.L910
+.LVL740:
+.L923:
 	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL736:
+.LVL741:
 	.loc 2 1597 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #80]
 	cmp	r2, r3
-	bne	.L925
+	bne	.L912
 	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL737:
-.L925:
+.LVL742:
+.L912:
 	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL738:
+.LVL743:
 	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL739:
+.LVL744:
 	.loc 2 1606 0
-	movs	r0, #0
-	add	sp, sp, #28
-.LCFI115:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL740:
-.L923:
-.LCFI116:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI273:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL745:
+.L910:
+.LCFI274:
 	.loc 2 1545 0
-	ldrh	r1, [r7]
+	ldrh	r1, [r10]
+.LVL746:
 	.loc 2 1546 0
-	mov	r0, r8
+	mov	r0, ip
+	str	ip, [fp, #-52]
 	.loc 2 1545 0
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3224]
+	str	r2, [r6, #3224]
 	.loc 2 1546 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL741:
+.LVL747:
 	.loc 2 1549 0
-	ldr	r2, [r5, #3220]
-	adds	r2, r2, #1
-	beq	.L922
+	ldr	r2, [r6, #3220]
+	ldr	ip, [fp, #-52]
+	cmn	r2, #1
+	beq	.L909
 	.loc 2 1551 0
-	ldrh	r2, [r6, #8]
-	cmp	r10, r2
-	bls	.L922
+	ldrh	r2, [r9, #8]
+	ldr	r3, [fp, #-48]
+.LVL748:
+	cmp	r3, r2
+	bls	.L909
 	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
-	ldrh	r0, [r6]
+	ldrh	r0, [r9]
 	cmp	r0, r1
 	.loc 2 1553 0 is_stmt 1 discriminator 1
-	ittt	eq
-	ldreq	r1, [r5, #3224]
-	ldreq	r3, [sp, #4]
-.LVL742:
+	ldreq	r1, [r6, #3224]
+	ldreq	r3, [fp, #-44]
+.LVL749:
 	streq	r1, [r3, r2, lsl #2]
-.L922:
-	add	fp, fp, #1
-	b	.L921
-.LVL743:
-.L920:
+.LVL750:
+.L909:
+	add	r8, r8, #1
+	b	.L908
+.LVL751:
+.L907:
 	.loc 2 1559 0
-	ldr	r1, [r5, #3240]
-.LVL744:
-	str	r3, [sp, #20]
+	ldr	r2, [r5, #3240]
+.LVL752:
 	.loc 2 1560 0
-	add	r3, r9, r7
-	.loc 2 1561 0
-	ldr	r0, .L945+4
-.LVL745:
+	add	r3, r8, r0
+.LVL753:
+	str	r3, [fp, #-60]
 	.loc 2 1559 0
-	str	r1, [r5, #3228]
+	str	r2, [r5, #3228]
 	.loc 2 1560 0
-	ldrh	r1, [r9, r2, lsl #1]
 	ldrh	r2, [r5, #80]
-.LVL746:
-	str	r3, [sp, #16]
-	subs	r2, r2, #1
+	ldrh	r1, [r8, r0]
+	.loc 2 1561 0
+	ldr	r0, .L932+4
+	.loc 2 1560 0
+	sub	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #3224]
 	.loc 2 1561 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL747:
+.LVL754:
 	.loc 2 1564 0
 	ldr	r2, [r5, #3220]
-	ldr	r3, [sp, #20]
-	adds	r2, r2, #1
-	beq	.L938
+	cmn	r2, #1
+	beq	.L925
 	.loc 2 1564 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6]
+	ldrh	r1, [r9]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L938
+	bne	.L925
 	.loc 2 1564 0 discriminator 2
-	ldrh	r1, [r6, #8]
+	ldrh	r1, [r9, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L927
-.L938:
-	movs	r7, #0
-.LVL748:
-.L928:
+	beq	.L914
+.L925:
+	mov	r10, #0
+.LVL755:
+.L915:
 	.loc 2 1579 0 is_stmt 1 discriminator 1
-	ldrh	r1, [r3, #80]
-	sxth	r2, r7
+	ldrh	r1, [r5, #80]
+	sxth	r2, r10
 	cmp	r2, r1
-	bge	.L934
+	bge	.L921
 	.loc 2 1581 0
-	ldr	r1, [sp, #16]
+	ldr	r3, [fp, #-60]
+.LVL756:
 	.loc 2 1582 0
-	ldr	r0, .L945+4
-.LVL749:
+	ldr	r0, .L932+4
 	.loc 2 1581 0
-	str	r3, [sp, #20]
-	ldrh	r1, [r1]
+	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #3224]
+	str	r2, [r5, #3224]
 	.loc 2 1582 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL750:
+.LVL757:
 	.loc 2 1585 0
-	ldr	r3, [sp, #20]
-	ldr	r2, [r3, #3220]
-	adds	r2, r2, #1
-	beq	.L932
+	ldr	r2, [r5, #3220]
+	cmn	r2, #1
+	beq	.L919
 	.loc 2 1587 0
-	ldrh	r2, [r6, #8]
-	cmp	r10, r2
-	bls	.L932
+	ldrh	r2, [r9, #8]
+	ldr	r3, [fp, #-48]
+.LVL758:
+	cmp	r3, r2
+	bls	.L919
 	.loc 2 1587 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
+	ldrh	r0, [r9]
 	cmp	r0, r1
 	.loc 2 1589 0 is_stmt 1 discriminator 1
-	ittt	eq
-	ldreq	r1, [r3, #3224]
-	ldreq	r0, [sp, #4]
-.LVL751:
-	streq	r1, [r0, r2, lsl #2]
-.L932:
-	adds	r7, r7, #1
-	b	.L928
-.LVL752:
-.L927:
-	movs	r0, #0
+	ldreq	r1, [r5, #3224]
+	ldreq	r3, [fp, #-44]
+.LVL759:
+	streq	r1, [r3, r2, lsl #2]
+.LVL760:
+.L919:
+	add	r10, r10, #1
+	b	.L915
+.LVL761:
+.L914:
+	mov	r0, #0
 	.loc 2 1572 0 discriminator 1
-	mov	ip, #4
-.LVL753:
-.L929:
+	mov	lr, #4
+.LVL762:
+.L916:
 	.loc 2 1567 0 discriminator 1
 	ldrh	r1, [r5, #80]
 	sxth	r2, r0
-	subs	r1, r1, #1
+	sub	r1, r1, #1
 	cmp	r2, r1
-	blt	.L931
-.L934:
-	add	r8, r8, #1
-	b	.L919
-.L931:
+	blt	.L918
+.LVL763:
+.L921:
+	add	r7, r7, #1
+	b	.L906
+.LVL764:
+.L918:
 	.loc 2 1569 0
-	ldr	r7, [r5, #3240]
-.LVL754:
-	ldr	r1, [r7, r2, lsl #3]
+	ldr	ip, [r5, #3240]
+	add	r0, r0, #1
 	.loc 2 1570 0
-	uxth	lr, r1
-	cmp	r10, lr
-	bls	.L930
+	ldr	r3, [fp, #-48]
+.LVL765:
+	.loc 2 1569 0
+	ldr	r1, [ip, r2, lsl #3]
+	.loc 2 1570 0
+	uxth	r10, r1
+	cmp	r3, r10
 	.loc 2 1572 0
-	add	r2, ip, r2, lsl #3
-	ldr	r2, [r7, r2]
-	ldr	r7, [sp, #4]
-.LVL755:
-	str	r2, [r7, lr, lsl #2]
-.L930:
-	adds	r0, r0, #1
-	b	.L929
-.L946:
+	addhi	r2, lr, r2, lsl #3
+	ldrhi	r3, [fp, #-44]
+.LVL766:
+	movhi	r1, r10
+	ldrhi	r2, [ip, r2]
+	strhi	r2, [r3, r1, lsl #2]
+	b	.L916
+.L933:
 	.align	2
-.L945:
+.L932:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3220
 .LFE225:
-	.fnend
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.align	1
+	.align	2
 	.global	FtlLoadVonderInfo
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-	.fnstart
 .LFB226:
 	.loc 2 1609 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 2 1610 0
-	ldr	r0, .L948
-	.loc 2 1609 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI117:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI275:
+	push	{fp, ip, lr, pc}
+.LCFI276:
+	sub	fp, ip, #4
+.LCFI277:
 	.loc 2 1610 0
-	ldrh	r3, [r0, #96]
-	strh	r3, [r0, #3918]	@ movhi
+	ldr	r3, .L935
+	ldrh	r2, [r3, #96]
+	add	r0, r3, #3904
+	add	r0, r0, #4
+	strh	r2, [r0, #10]	@ movhi
 	.loc 2 1611 0
-	movw	r3, #61574
-	strh	r3, [r0, #3912]	@ movhi
+	ldr	r2, .L935+4
+	strh	r2, [r0, #4]	@ movhi
 	.loc 2 1612 0
-	ldrh	r3, [r0, #120]
-	strh	r3, [r0, #3916]	@ movhi
+	ldrh	r2, [r3, #120]
+	strh	r2, [r0, #8]	@ movhi
 	.loc 2 1613 0
-	ldrh	r3, [r0, #98]
-	strh	r3, [r0, #3914]	@ movhi
-	.loc 2 1614 0
-	ldr	r3, [r0, #124]
-	.loc 2 1619 0
-	addw	r0, r0, #3908
+	ldrh	r2, [r3, #98]
+	strh	r2, [r0, #6]	@ movhi
 	.loc 2 1614 0
-	str	r3, [r0, #12]
+	ldr	r2, [r3, #124]
+	str	r2, [r3, #3920]
 	.loc 2 1615 0
-	ldr	r3, [r0, #-68]
-	str	r3, [r0, #16]
+	ldr	r2, [r3, #3840]
+	str	r2, [r3, #3924]
 	.loc 2 1616 0
-	ldr	r3, [r0, #-72]
-	str	r3, [r0, #20]
+	ldr	r2, [r3, #3836]
+	str	r2, [r3, #3928]
 	.loc 2 1617 0
-	ldr	r3, [r0, #-64]
-	str	r3, [r0, #24]
+	ldr	r2, [r3, #3844]
+	str	r2, [r3, #3932]
 	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL756:
+.LVL767:
 	.loc 2 1622 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L949:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L936:
 	.align	2
-.L948:
+.L935:
 	.word	.LANCHOR0
+	.word	-3962
 .LFE226:
-	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.align	1
+	.align	2
 	.global	FtlL2PDataInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-	.fnstart
 .LFB227:
 	.loc 2 1625 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI118:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI278:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI279:
+	sub	fp, ip, #4
+.LCFI280:
 	.loc 2 1627 0
-	movs	r1, #0
-	ldr	r4, .L953
-	.loc 2 1631 0
-	movs	r6, #12
+	ldr	r4, .L940
+	mov	r1, #0
+	.loc 2 1632 0
+	mvn	r5, #0
 	.loc 2 1627 0
 	ldr	r2, [r4, #104]
 	ldr	r0, [r4, #3832]
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL757:
+.LVL768:
 	.loc 2 1628 0
 	ldrh	r3, [r4, #86]
-	movs	r1, #255
+	mov	r1, #255
 	ldrh	r2, [r4, #114]
 	ldr	r0, [r4, #3856]
-	muls	r2, r3, r2
+	mul	r2, r2, r3
 	bl	ftl_memset
-.LVL758:
+.LVL769:
 	.loc 2 1629 0
-	movs	r2, #0
+	mov	r2, #0
 	mov	r3, r4
-	movw	r1, #65535
 	.loc 2 1631 0
-	mov	r7, r2
-.L951:
+	mov	lr, #12
+	mov	r4, r2
+.L938:
 	.loc 2 1629 0 discriminator 1
-	ldrh	r4, [r3, #114]
-	uxth	r0, r2
-	adds	r5, r2, #1
-	cmp	r4, r0
-	bhi	.L952
-	.loc 2 1637 0
-	ldr	r2, [r3, #104]
+	ldrh	r0, [r3, #114]
+	uxth	r1, r2
+	add	ip, r2, #1
+	cmp	r0, r1
+	bhi	.L939
 	.loc 2 1635 0
-	strh	r1, [r3, #3866]	@ movhi
+	ldr	r2, .L940+4
+	mvn	r1, #0
 	.loc 2 1636 0
-	strh	r1, [r3, #3864]	@ movhi
+	movw	r0, #3864
+	strh	r1, [r3, r0]	@ movhi
+	.loc 2 1635 0
+	strh	r1, [r2, #2]	@ movhi
 	.loc 2 1637 0
-	strh	r2, [r3, #3874]	@ movhi
+	ldr	r1, [r3, #104]
+	strh	r1, [r2, #10]	@ movhi
 	.loc 2 1638 0
-	movw	r2, #61634
-	strh	r2, [r3, #3868]	@ movhi
+	ldr	r1, .L940+8
+	strh	r1, [r2, #4]	@ movhi
 	.loc 2 1639 0
-	ldrh	r2, [r3, #3904]
-	strh	r2, [r3, #3872]	@ movhi
+	ldrh	r1, [r2, #40]
+	strh	r1, [r2, #8]	@ movhi
 	.loc 2 1640 0
-	ldrh	r2, [r3, #112]
-	strh	r2, [r3, #3870]	@ movhi
+	ldrh	r1, [r3, #112]
+	strh	r1, [r2, #6]	@ movhi
 	.loc 2 1641 0
 	ldr	r2, [r3, #3828]
 	str	r2, [r3, #3876]
@@ -9880,737 +9934,759 @@ FtlL2PDataInit:
 	.loc 2 1644 0
 	ldr	r2, [r3, #3848]
 	str	r2, [r3, #3888]
-	pop	{r3, r4, r5, r6, r7, pc}
-.L952:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L939:
 	.loc 2 1631 0 discriminator 3
 	uxth	r2, r2
-	ldr	r0, [r3, #2468]
-	mul	r4, r6, r2
-	add	ip, r0, r4
-	str	r7, [ip, #4]
+	ldr	r1, [r3, #2468]
+	mul	r0, lr, r2
+	add	r6, r1, r0
+	str	r4, [r6, #4]
 	.loc 2 1632 0 discriminator 3
-	strh	r1, [r0, r4]	@ movhi
+	strh	r5, [r1, r0]	@ movhi
 	.loc 2 1633 0 discriminator 3
-	ldr	r0, [r3, #2468]
-	add	r0, r0, r4
-	ldrh	r4, [r3, #86]
-	muls	r2, r4, r2
-	ldr	r4, [r3, #3856]
+	ldr	r1, [r3, #2468]
+	add	r1, r1, r0
+	ldrh	r0, [r3, #86]
+	mul	r2, r2, r0
+	ldr	r0, [r3, #3856]
 	bic	r2, r2, #3
-	add	r2, r2, r4
-	str	r2, [r0, #8]
-	mov	r2, r5
-	b	.L951
-.L954:
+	add	r2, r0, r2
+	str	r2, [r1, #8]
+	mov	r2, ip
+	b	.L938
+.L941:
 	.align	2
-.L953:
+.L940:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3864
+	.word	-3902
 .LFE227:
-	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.align	1
+	.align	2
 	.global	FtlLoadMapInfo
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-	.fnstart
 .LFB228:
 	.loc 2 1648 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI119:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI281:
+	push	{fp, ip, lr, pc}
+.LCFI282:
+	sub	fp, ip, #4
+.LCFI283:
 	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL759:
+.LVL770:
 	.loc 2 1651 0
-	ldr	r0, .L956
+	ldr	r0, .L943
 	bl	FtlMapTblRecovery
-.LVL760:
+.LVL771:
 	.loc 2 1654 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L957:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L944:
 	.align	2
-.L956:
+.L943:
 	.word	.LANCHOR0+3864
 .LFE228:
-	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.align	1
+	.align	2
 	.global	FtlVariablesInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-	.fnstart
 .LFB157:
 	.loc 3 493 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI120:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI284:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI285:
+	sub	fp, ip, #4
+.LCFI286:
 	.loc 3 496 0
-	movs	r5, #0
-	ldr	r4, .L959
+	ldr	r4, .L946
 	.loc 3 497 0
-	movw	r3, #65535
+	mvn	r3, #0
+	.loc 3 496 0
+	mov	r5, #0
 	.loc 3 502 0
 	mov	r1, r5
-	ldrh	r2, [r4, #96]
 	.loc 3 497 0
-	strh	r3, [r4, #3952]	@ movhi
-	.loc 3 500 0
-	mov	r3, #-1
+	add	r2, r4, #3952
 	.loc 3 502 0
 	ldr	r0, [r4, #124]
+	.loc 3 497 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 502 0
+	ldrh	r2, [r4, #96]
 	.loc 3 500 0
 	str	r3, [r4, #3964]
-	.loc 3 502 0
-	lsls	r2, r2, #1
 	.loc 3 496 0
 	str	r5, [r4, #3948]
 	.loc 3 498 0
 	str	r5, [r4, #3956]
+	.loc 3 502 0
+	lsl	r2, r2, #1
 	.loc 3 499 0
 	str	r5, [r4, #3960]
 	.loc 3 501 0
 	strh	r5, [r4, #120]	@ movhi
 	.loc 3 502 0
 	bl	ftl_memset
-.LVL761:
+.LVL772:
 	.loc 3 503 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
 	ldr	r0, [r4, #2304]
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL762:
+.LVL773:
 	.loc 3 504 0
 	ldrh	r2, [r4, #18]
 	mov	r1, r5
 	ldr	r0, [r4, #3816]
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL763:
+.LVL774:
+.LBB431:
 .LBB432:
 .LBB433:
-.LBB434:
 	.loc 1 202 0
-	addw	r0, r4, #2244
-	movs	r1, #48
+	add	r0, r4, #2240
+	mov	r1, #48
+	add	r0, r0, #4
 	bl	__memzero
-.LVL764:
-.LBE434:
+.LVL775:
 .LBE433:
 .LBE432:
+.LBE431:
+.LBB434:
 .LBB435:
 .LBB436:
-.LBB437:
-	addw	r0, r4, #2612
+	add	r0, r4, #2608
 	mov	r1, #512
+	add	r0, r0, #4
 	bl	__memzero
-.LVL765:
-.LBE437:
+.LVL776:
 .LBE436:
 .LBE435:
+.LBE434:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL766:
+.LVL777:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL767:
+.LVL778:
 	.loc 3 510 0
 	mov	r0, r5
-	pop	{r3, r4, r5, pc}
-.L960:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L947:
 	.align	2
-.L959:
+.L946:
 	.word	.LANCHOR0
 .LFE157:
-	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
-	.align	1
+	.align	2
 	.global	SupperBlkListInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-	.fnstart
 .LFB235:
 	.loc 2 2116 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI121:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI287:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI288:
+	sub	fp, ip, #4
+.LCFI289:
+	sub	sp, sp, #16
 	.loc 2 2121 0
-	movs	r6, #0
+	mov	r5, #0
 	.loc 2 2120 0
-	ldr	r4, .L972
-	movs	r2, #6
+	ldr	r4, .L959
+	mov	r1, #0
 	.loc 2 2126 0
-	mov	r9, r6
-.LVL768:
-	mov	r7, r6
-.LVL769:
-	.loc 2 2120 0
-	movs	r1, #0
-	ldrh	r3, [r4, #18]
-	.loc 2 2131 0
-	add	fp, r4, #36
+	mov	r8, r5
+.LVL779:
+	mov	r7, r5
+.LVL780:
 	.loc 2 2120 0
+	ldrh	r2, [r4, #18]
 	ldr	r0, [r4, #2292]
-	muls	r2, r3, r2
+	lsl	r2, r2, #3
 	bl	ftl_memset
-.LVL770:
+.LVL781:
+	.loc 2 2124 0
+	movw	r3, #2312
 	.loc 2 2121 0
-	str	r6, [r4, #2316]
+	str	r5, [r4, #2316]
+	.loc 2 2124 0
+	strh	r5, [r4, r3]	@ movhi
+	.loc 2 2125 0
+	add	r3, r4, #2320
 	.loc 2 2122 0
-	str	r6, [r4, #2296]
+	str	r5, [r4, #2296]
 	.loc 2 2123 0
-	str	r6, [r4, #2308]
-	.loc 2 2124 0
-	strh	r6, [r4, #2312]	@ movhi
+	str	r5, [r4, #2308]
 	.loc 2 2125 0
-	strh	r6, [r4, #2320]	@ movhi
-.LVL771:
-.L962:
+	strh	r5, [r3]	@ movhi
+	str	r3, [fp, #-48]
+.LVL782:
+.L949:
 	.loc 2 2128 0 discriminator 1
 	ldrh	r3, [r4, #16]
-	uxth	r8, r6
-	cmp	r8, r3
-	bcs	.L968
+	uxth	r10, r5
+	cmp	r10, r3
+	bcs	.L955
 	.loc 2 2133 0
-	mov	r10, #0
+	ldrh	r3, [r4, #78]
+	mov	r9, r10
 	.loc 2 2130 0
-	ldrh	r2, [r4, #8]
+	ldrh	ip, [r4, #8]
 	.loc 2 2133 0
-	ldrh	r3, [r4, #78]
-	mov	r5, r10
-	b	.L969
-.L964:
+	str	r3, [fp, #-44]
+	mov	r3, #0
+	mov	r6, r3
+	b	.L956
+.L951:
 	.loc 2 2131 0
-	mov	r1, r8
-	ldrb	r0, [fp, r10]	@ zero_extendqisi2
-	stm	sp, {r2, r3}
+	ldr	r2, .L959+4
+	mov	r1, r9
+	str	ip, [fp, #-56]
+	str	r3, [fp, #-52]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL772:
+.LVL783:
 	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL773:
-	ldm	sp, {r2, r3}
-	cbnz	r0, .L963
+.LVL784:
+	cmp	r0, #0
+	ldr	r3, [fp, #-52]
 	.loc 2 2133 0
-	add	r5, r5, r3
-	uxth	r5, r5
-.L963:
-	add	r10, r10, #1
-.L969:
+	ldreq	r2, [fp, #-44]
+	.loc 2 2132 0
+	ldr	ip, [fp, #-56]
+	add	r3, r3, #1
+	.loc 2 2133 0
+	addeq	r6, r6, r2
+	uxtheq	r6, r6
+.L956:
 	.loc 2 2130 0 discriminator 1
-	uxth	r1, r10
-	cmp	r2, r1
-	bhi	.L964
+	uxth	r1, r3
+	cmp	ip, r1
+	bhi	.L951
 	.loc 2 2135 0
-	cbz	r5, .L971
+	cmp	r6, #0
+	moveq	r0, r6
+	beq	.L952
 	.loc 2 2136 0
-	mov	r1, r5
+	mov	r1, r6
 	mov	r0, #32768
-	bl	__aeabi_idiv
-.LVL774:
-.L965:
+	bl	__divsi3
+.LVL785:
+.L952:
 	.loc 2 2137 0
-	ldr	r2, [r4, #2292]
-	uxth	r1, r6
-	movs	r3, #6
-	mla	r3, r3, r1, r2
+	ldr	r3, [r4, #2292]
+	add	r3, r3, r9, lsl #3
 	strh	r0, [r3, #4]	@ movhi
 	.loc 2 2139 0
-	ldrh	r3, [r4, #2324]
-	cmp	r3, r8
-	beq	.L966
+	ldr	r3, .L959+8
+	ldrh	r1, [r3]
+	cmp	r1, r10
+	beq	.L953
 	.loc 2 2139 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
-	cmp	r3, r8
-	beq	.L966
+	ldrh	r1, [r3, #48]
+	cmp	r1, r10
+	beq	.L953
 	.loc 2 2140 0 is_stmt 1
-	ldrh	r3, [r4, #2420]
-	cmp	r3, r8
-	beq	.L966
+	ldrh	r3, [r3, #96]
+	cmp	r3, r10
+	beq	.L953
 	.loc 2 2143 0
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r1, lsl #1]
-	cbnz	r3, .L967
+	ldr	r2, [r4, #2300]
+	lsl	r3, r9, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	bne	.L954
 	.loc 2 2144 0
-	add	r9, r9, #1
-.LVL775:
+	add	r8, r8, #1
+.LVL786:
 	.loc 2 2145 0
-	mov	r0, r8
+	mov	r0, r9
 	.loc 2 2144 0
-	uxth	r9, r9
-.LVL776:
+	uxth	r8, r8
+.LVL787:
 	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL777:
-.L966:
-	adds	r6, r6, #1
-	b	.L962
-.L971:
-	mov	r0, r5
-	b	.L965
-.L967:
+.LVL788:
+.L953:
+	add	r5, r5, #1
+	b	.L949
+.L954:
 	.loc 2 2147 0
-	adds	r7, r7, #1
-.LVL778:
+	add	r7, r7, #1
+.LVL789:
 	.loc 2 2148 0
-	mov	r0, r8
+	mov	r0, r9
 	.loc 2 2147 0
 	uxth	r7, r7
-.LVL779:
+.LVL790:
 	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL780:
-	b	.L966
-.L968:
+.LVL791:
+	b	.L953
+.L955:
 	.loc 2 2152 0
-	strh	r7, [r4, #2312]	@ movhi
+	movw	r2, #2312
+	strh	r7, [r4, r2]	@ movhi
+	.loc 2 2154 0
+	add	r7, r7, r8
+.LVL792:
+	.loc 2 2153 0
+	ldr	r2, [fp, #-48]
 	.loc 2 2154 0
-	add	r7, r7, r9
-.LVL781:
 	cmp	r7, r3
 	.loc 2 2153 0
-	strh	r9, [r4, #2320]	@ movhi
+	strh	r8, [r2]	@ movhi
 	.loc 2 2154 0
-	ble	.L970
+	ble	.L957
 	.loc 2 2154 0 is_stmt 0 discriminator 1
 	movw	r2, #2154
-	ldr	r1, .L972+4
-	ldr	r0, .L972+8
+	ldr	r1, .L959+12
+	ldr	r0, .L959+16
 	bl	printk
-.LVL782:
-.L970:
+.LVL793:
+.L957:
 	.loc 2 2156 0 is_stmt 1
-	movs	r0, #0
-	add	sp, sp, #12
-.LCFI122:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL783:
-.L973:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI290:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL794:
+.L960:
 	.align	2
-.L972:
+.L959:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+36
+	.word	.LANCHOR0+2324
 	.word	.LANCHOR1+342
 	.word	.LC1
 .LFE235:
-	.fnend
 	.size	SupperBlkListInit, .-SupperBlkListInit
-	.align	1
+	.align	2
 	.global	FtlGcPageVarInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-	.fnstart
 .LFB259:
 	.loc 5 202 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI123:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI291:
+	push	{r4, fp, ip, lr, pc}
+.LCFI292:
+	sub	fp, ip, #4
+.LCFI293:
 	.loc 5 203 0
-	movs	r3, #0
-	ldr	r4, .L975
+	ldr	r4, .L962
+	mov	r3, #0
+	.loc 5 205 0
+	mov	r1, #255
+	.loc 5 203 0
+	add	r2, r4, #3168
 	.loc 5 205 0
-	movs	r1, #255
-	ldrh	r2, [r4, #82]
 	ldr	r0, [r4, #3164]
 	.loc 5 203 0
-	strh	r3, [r4, #3168]	@ movhi
+	strh	r3, [r2]	@ movhi
 	.loc 5 204 0
-	strh	r3, [r4, #3176]	@ movhi
+	movw	r2, #3176
+	strh	r3, [r4, r2]	@ movhi
 	.loc 5 205 0
-	lsls	r2, r2, #1
+	ldrh	r2, [r4, #82]
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL784:
+.LVL795:
 	.loc 5 206 0
 	ldrh	r3, [r4, #82]
-	movs	r2, #12
+	mov	r2, #12
+	mov	r1, #255
 	ldr	r0, [r4, #3172]
-	movs	r1, #255
-	muls	r2, r3, r2
+	mul	r2, r2, r3
 	bl	ftl_memset
-.LVL785:
-	.loc 5 208 0
-	pop	{r4, lr}
-.LCFI124:
+.LVL796:
 	.loc 5 207 0
-	b	FtlGcBufInit
-.LVL786:
-.L976:
+	bl	FtlGcBufInit
+.LVL797:
+	ldmfd	sp, {r4, fp, sp, pc}
+.L963:
 	.align	2
-.L975:
+.L962:
 	.word	.LANCHOR0
 .LFE259:
-	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.align	1
+	.align	2
 	.global	FtlGcScanTempBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-	.fnstart
 .LFB260:
 	.loc 5 211 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL787:
-	.loc 5 220 0
-	ldr	r3, .L1002
+	@ args = 0, pretend = 0, frame = 20
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL798:
+	mov	ip, sp
+.LCFI294:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI295:
+	sub	fp, ip, #4
+.LCFI296:
+	sub	sp, sp, #20
 	.loc 5 211 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI125:
-	.pad #28
-	sub	sp, sp, #28
-.LCFI126:
+	mov	r6, r0
+	.loc 5 220 0
+	ldr	r3, .L987
 	.loc 5 211 0
-	mov	r7, r0
-	str	r1, [sp, #8]
+	mov	r10, r1
 	.loc 5 220 0
 	ldrh	r4, [r3, #4]
-.LVL788:
+.LVL799:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L996
+	beq	.L981
 	.loc 5 223 0
-	cbnz	r4, .L978
-.LVL789:
-.L979:
+	cmp	r4, #0
+	bne	.L965
+.L966:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL790:
-	b	.L980
-.LVL791:
-.L996:
+.LVL800:
+	b	.L967
+.LVL801:
+.L981:
 	.loc 5 222 0
-	movs	r4, #0
-.L978:
+	mov	r4, #0
+.L965:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L1002+4
-	ldr	r2, [sp, #8]
-.LVL792:
+	ldr	r3, .L987+4
 	ldrh	r3, [r3, #78]
-	cmp	r3, r2
-	beq	.L979
-.L980:
+	cmp	r3, r10
+	beq	.L966
+.L967:
+	.loc 5 231 0
+	ldr	r5, .L987+4
 	.loc 5 222 0
-	mov	fp, #0
-.LVL793:
+	mov	r8, #0
+.LVL802:
+.L975:
 	.loc 5 228 0
-	movw	r8, #65535
-.LVL794:
-.L990:
-	ldrh	r3, [r7]
+	ldrh	r2, [r6]
+	movw	r3, #65535
 	.loc 5 226 0
-	movs	r0, #0
-	strb	r0, [r7, #8]
+	mov	r0, #0
+	strb	r0, [r6, #8]
 	.loc 5 228 0
-	cmp	r3, r8
-	beq	.L981
+	cmp	r2, r3
+	beq	.L968
+.L978:
 	.loc 5 231 0
-	ldr	r5, .L1002+4
-.L993:
+	ldrh	r3, [r5, #8]
+	mov	r2, #0
 	.loc 5 234 0
-	ldr	r3, [r5, #3792]
-	.loc 5 231 0
-	movs	r2, #0
-.LVL795:
-	ldrh	ip, [r5, #8]
-	add	lr, r7, #16
-	.loc 5 236 0
-	ldr	r10, [r5, #3152]
+	ldr	r0, [r5, #3792]
+	add	ip, r6, #16
 	.loc 5 230 0
-	mov	r6, r2
-	.loc 5 234 0
-	str	r3, [sp, #4]
-	mov	r9, #20
+	mov	r7, r2
+	.loc 5 233 0
+	movw	r9, #65535
+	.loc 5 231 0
+	str	r3, [fp, #-44]
 	.loc 5 235 0
 	ldr	r3, [r5, #3148]
-	str	r3, [sp, #12]
+	str	r3, [fp, #-48]
 	ldrh	r3, [r5, #86]
-	str	r3, [sp, #16]
+	str	r3, [fp, #-52]
 	.loc 5 236 0
+	ldr	r3, [r5, #3152]
+	str	r3, [fp, #-56]
 	ldrh	r3, [r5, #88]
-	str	r3, [sp, #20]
-.LVL796:
-.L982:
+	str	r3, [fp, #-60]
+.LVL803:
+.L969:
 	.loc 5 231 0 discriminator 1
+	ldr	r1, [fp, #-44]
 	uxth	r3, r2
-.LVL797:
-	cmp	ip, r3
-	bhi	.L986
+.LVL804:
+	cmp	r1, r3
+	bhi	.L971
 	.loc 5 241 0
 	mov	r9, #0
 	.loc 5 240 0
-	movs	r2, #0
-	mov	r1, r6
-	ldr	r0, [sp, #4]
+	mov	r2, #0
+	mov	r1, r7
 	bl	FlashReadPages
-.LVL798:
-.L987:
+.LVL805:
+.L972:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r9
-	cmp	r6, r3
-	bhi	.L991
-	.loc 5 268 0
-	ldr	r3, [sp, #8]
-.LVL799:
+	cmp	r7, r3
+	bhi	.L976
 	.loc 5 266 0
-	add	fp, fp, #1
+	add	r8, r8, #1
+	.loc 5 264 0
+	add	r4, r4, #1
+.LVL806:
+	.loc 5 268 0
+	cmp	r10, r8
 	.loc 5 264 0
-	adds	r4, r4, #1
-.LVL800:
 	uxth	r4, r4
-.LVL801:
+.LVL807:
 	.loc 5 268 0
-	cmp	r3, fp
-	bls	.L992
-.L994:
+	bls	.L977
+.L979:
 	.loc 5 274 0
 	ldrh	r3, [r5, #78]
-.LVL802:
 	cmp	r3, r4
-	bhi	.L993
+	bhi	.L978
 	.loc 5 265 0
-	movs	r0, #0
-.LVL803:
-	b	.L981
-.LVL804:
-.L986:
+	mov	r0, #0
+.LVL808:
+	b	.L968
+.LVL809:
+.L971:
 	.loc 5 232 0
-	ldrh	r3, [lr], #2
-.LVL805:
+	ldrh	r3, [ip], #2
+.LVL810:
 	.loc 5 233 0
-	cmp	r3, r8
-	beq	.L983
+	cmp	r3, r9
+	beq	.L970
 	.loc 5 234 0
-	ldr	r1, [sp, #4]
+	mov	r1, #20
 	orr	r3, r4, r3, lsl #10
-.LVL806:
-	mla	r1, r9, r6, r1
+.LVL811:
+	mla	r1, r1, r7, r0
 	str	r3, [r1, #4]
 	.loc 5 235 0
-	ldr	r3, [sp, #16]
-	muls	r3, r6, r3
-	it	mi
-	addmi	r3, r3, #3
+	ldr	r3, [fp, #-52]
+	mul	r3, r3, r7
+	add	lr, r3, #3
+	cmp	r3, #0
+	movlt	r3, lr
+	ldr	lr, [fp, #-48]
 	bic	r3, r3, #3
-	mov	r0, r3
-	ldr	r3, [sp, #12]
-	add	r0, r0, r3
-	.loc 5 236 0
-	ldr	r3, [sp, #20]
-	muls	r3, r6, r3
-	.loc 5 237 0
-	add	r6, r6, #1
-.LVL807:
+	add	r3, lr, r3
+	str	r3, [r1, #8]
 	.loc 5 236 0
-	it	mi
-	addmi	r3, r3, #3
+	ldr	r3, [fp, #-60]
+	mul	r3, r3, r7
 	.loc 5 237 0
-	uxth	r6, r6
-.LVL808:
+	add	r7, r7, #1
+.LVL812:
+	uxth	r7, r7
+.LVL813:
 	.loc 5 236 0
+	add	lr, r3, #3
+	cmp	r3, #0
+	movlt	r3, lr
+	ldr	lr, [fp, #-56]
 	bic	r3, r3, #3
-	.loc 5 235 0
-	str	r0, [r1, #8]
-	.loc 5 236 0
-	add	r3, r3, r10
+	add	r3, lr, r3
 	str	r3, [r1, #12]
-.LVL809:
-.L983:
-	adds	r2, r2, #1
-	b	.L982
-.LVL810:
-.L991:
+.LVL814:
+.L970:
+	add	r2, r2, #1
+	b	.L969
+.LVL815:
+.L976:
 	.loc 5 242 0
-	movs	r3, #20
+	mov	r3, #20
 	ldr	r2, [r5, #3792]
-	mul	r10, r3, r9
-	str	r2, [sp, #16]
-	add	r3, r2, r10
-	ldr	r1, [r3, #4]
-.LVL811:
-	str	r3, [sp, #12]
+	mul	r3, r3, r9
+	str	r2, [fp, #-52]
+	add	ip, r2, r3
+	str	r3, [fp, #-56]
+	ldr	r1, [ip, #4]
+.LVL816:
+	str	ip, [fp, #-48]
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
+	str	r1, [fp, #-44]
 	bl	P2V_plane
-.LVL812:
+.LVL817:
 	.loc 5 245 0
-	ldr	r2, [sp, #16]
-	ldr	r2, [r2, r10]
-	cbnz	r2, .L988
+	ldr	r2, [fp, #-52]
+	ldr	r3, [fp, #-56]
+	ldr	r3, [r2, r3]
+	cmp	r3, #0
+	bne	.L973
 	.loc 5 247 0
-	ldr	r3, [sp, #12]
-	add	r9, r9, #1
+	ldr	ip, [fp, #-48]
 	.loc 5 248 0
-	ldr	r1, [sp, #4]
-.LVL813:
+	movw	r2, #65535
+	add	r9, r9, #1
+	ldr	r1, [fp, #-44]
+.LVL818:
 	.loc 5 247 0
-	ldr	r3, [r3, #12]
-.LVL814:
+	ldr	r3, [ip, #12]
+.LVL819:
 	.loc 5 248 0
-	ldrh	r2, [r3]
-	cmp	r2, r8
-	bne	.L989
+	ldrh	ip, [r3]
+	cmp	ip, r2
+	bne	.L974
 	.loc 5 249 0
-	movs	r3, #1
-.LVL815:
+	mov	r3, #1
+.LVL820:
 	str	r3, [r5, #3960]
-.LVL816:
-.L981:
+.LVL821:
+.L968:
 	.loc 5 281 0
-	ldr	r3, .L1002
-	movw	r2, #65535
-.LVL817:
+	ldr	r3, .L987
+	mvn	r2, #0
 	.loc 5 283 0
-	strb	r0, [r7, #6]
+	strb	r0, [r6, #6]
 	.loc 5 284 0
 	mov	r1, r4
-.LVL818:
+.LVL822:
 	.loc 5 282 0
-	strh	r4, [r7, #2]	@ movhi
+	strh	r4, [r6, #2]	@ movhi
 	.loc 5 281 0
 	strh	r2, [r3, #4]	@ movhi
 	.loc 5 284 0
 	mov	r2, r0
-	mov	r0, r7
-.LVL819:
+	mov	r0, r6
+.LVL823:
 	bl	ftl_sb_update_avl_pages
-.LVL820:
+.LVL824:
 	.loc 5 285 0
-	b	.L995
-.LVL821:
-.L989:
+	b	.L980
+.LVL825:
+.L974:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL822:
-	b	.L987
-.L988:
+.LVL826:
+	b	.L972
+.L973:
 	.loc 5 256 0
-	ldrh	r2, [r7]
-	movs	r4, #0
-.LVL823:
-	ldr	r3, [r5, #2300]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r6]
+	mov	r4, #0
+.LVL827:
+	ldr	r2, [r5, #2300]
+	lsl	r3, r3, #1
+	strh	r4, [r2, r3]	@ movhi
 	.loc 5 257 0
-	ldrh	r0, [r7]
+	ldrh	r0, [r6]
 	bl	INSERT_FREE_LIST
-.LVL824:
+.LVL828:
 	.loc 5 258 0
-	strh	r8, [r7]	@ movhi
+	mvn	r3, #0
+	strh	r3, [r6]	@ movhi
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL825:
+.LVL829:
 	.loc 5 261 0
-	b	.L990
-.LVL826:
-.L992:
+	b	.L975
+.LVL830:
+.L977:
 	.loc 5 268 0 discriminator 1
-	ldr	r2, .L1002
+	ldr	r2, .L987
+	movw	r1, #65535
 	ldrh	r3, [r2, #4]
-.LVL827:
-	cmp	r3, r8
-	beq	.L994
+	cmp	r3, r1
+	beq	.L979
 	.loc 5 269 0
-	add	r3, r3, fp
+	add	r3, r3, r8
 	strh	r3, [r2, #4]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r5, #78]
 	cmp	r3, r4
-	bls	.L994
-.L995:
+	bls	.L979
+.L980:
 	.loc 5 286 0
-	mov	r0, #-1
-	add	sp, sp, #28
-.LCFI127:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL828:
-.L1003:
+	mvn	r0, #0
+	sub	sp, fp, #40
+.LCFI297:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL831:
+.L988:
 	.align	2
-.L1002:
+.L987:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 .LFE260:
-	.fnend
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.align	1
+	.align	2
 	.global	ftl_memcpy
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-	.fnstart
 .LFB278:
 	.loc 1 206 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL829:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL832:
+	mov	ip, sp
+.LCFI298:
+	push	{fp, ip, lr, pc}
+.LCFI299:
+	sub	fp, ip, #4
+.LCFI300:
 	.loc 1 207 0
-	b	memcpy
-.LVL830:
+	bl	memcpy
+.LVL833:
+	.loc 1 208 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE278:
-	.fnend
 	.size	ftl_memcpy, .-ftl_memcpy
-	.align	1
+	.align	2
 	.global	FtlBbmTblFlush
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-	.fnstart
 .LFB176:
 	.loc 4 80 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI128:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI301:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI302:
+	sub	fp, ip, #4
+.LCFI303:
+	sub	sp, sp, #4
 	.loc 4 91 0
-	movs	r5, #0
-.LVL831:
+	mov	r5, #0
+.LVL834:
 	.loc 4 87 0
-	ldr	r4, .L1014
+	ldr	r4, .L999
 	.loc 4 89 0
-	movs	r1, #0
+	mov	r1, #0
+	.loc 4 92 0
+	ldr	r7, .L999+4
 	.loc 4 87 0
 	ldr	r0, [r4, #3240]
 	add	r6, r4, #152
@@ -10624,56 +10700,53 @@ FtlBbmTblFlush:
 	str	r3, [r4, #3232]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL832:
-.L1006:
+.LVL835:
+.L991:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	blt	.L1007
+	blt	.L992
 	.loc 4 94 0
 	ldr	r6, [r4, #3232]
-.LVL833:
+.LVL836:
+.LBB442:
 .LBB443:
 .LBB444:
-.LBB445:
 	.loc 1 202 0
-	movs	r2, #16
-	movs	r1, #255
-.LBE445:
+	mov	r2, #16
+	mov	r1, #255
 .LBE444:
 .LBE443:
+.LBE442:
 	.loc 4 108 0
-	ldr	r9, .L1014+12
+	ldr	r9, .L999+8
 	.loc 4 109 0
-	ldr	r8, .L1014+4
+	ldr	r8, .L999+12
 	.loc 4 84 0
-	movs	r5, #0
-.LVL834:
-.LBB450:
-.LBB448:
-.LBB446:
-	.loc 1 202 0
-	mov	r0, r6
-.LBE446:
-.LBE448:
-.LBE450:
-	.loc 4 129 0
-	ldr	r10, .L1014+16
-.LBB451:
+	mov	r5, #0
+.LVL837:
 .LBB449:
 .LBB447:
+.LBB445:
 	.loc 1 202 0
-	bl	memset
-.LVL835:
+	mov	r0, r6
+.LBE445:
 .LBE447:
 .LBE449:
-.LBE451:
-	.loc 4 97 0
-	movw	r3, #61649
 	.loc 4 82 0
 	mov	r7, r5
-.LVL836:
+.LVL838:
+.LBB450:
+.LBB448:
+.LBB446:
+	.loc 1 202 0
+	bl	memset
+.LVL839:
+.LBE446:
+.LBE448:
+.LBE450:
 	.loc 4 97 0
+	ldr	r3, .L999+16
 	strh	r3, [r6]	@ movhi
 	.loc 4 98 0
 	ldr	r3, [r4, #136]
@@ -10690,11 +10763,11 @@ FtlBbmTblFlush:
 	.loc 4 102 0
 	ldr	r3, [r4, #4]
 	strh	r3, [r6, #12]	@ movhi
-.L1008:
+.L993:
 	.loc 4 104 0
 	ldr	r3, [r4, #3240]
 	.loc 4 106 0
-	mov	fp, #0
+	mov	r10, #0
 	.loc 4 107 0
 	ldrh	r1, [r4, #128]
 	ldrh	r2, [r4, #130]
@@ -10703,7 +10776,7 @@ FtlBbmTblFlush:
 	.loc 4 105 0
 	ldr	r3, [r4, #3244]
 	.loc 4 106 0
-	str	fp, [r4, #3220]
+	str	r10, [r4, #3220]
 	.loc 4 105 0
 	str	r3, [r4, #3232]
 	.loc 4 107 0
@@ -10717,20 +10790,20 @@ FtlBbmTblFlush:
 	str	r0, [sp]
 	mov	r0, r9
 	bl	printk
-.LVL837:
+.LVL840:
 	.loc 4 109 0
-	movs	r3, #1
-	ldr	r0, .L1014+4
+	mov	r3, #1
+	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL838:
+.LVL841:
 	.loc 4 110 0
 	ldrh	r3, [r4, #80]
 	ldrh	r2, [r4, #130]
-	subs	r3, r3, #1
+	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1009
+	blt	.L994
 	.loc 4 113 0
 	ldr	r3, [r4, #136]
 	.loc 4 115 0
@@ -10738,9 +10811,9 @@ FtlBbmTblFlush:
 	.loc 4 121 0
 	ldr	r0, [r4, #3760]
 	.loc 4 113 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	.loc 4 117 0
-	strh	fp, [r4, #130]	@ movhi
+	strh	r10, [r4, #130]	@ movhi
 	.loc 4 113 0
 	str	r3, [r4, #136]
 	.loc 4 114 0
@@ -10752,325 +10825,320 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #132]	@ movhi
 	.loc 4 122 0
-	movs	r2, #1
+	mov	r2, #1
 	.loc 4 116 0
 	strh	r3, [r4, #128]	@ movhi
 	.loc 4 122 0
 	mov	r1, r2
 	.loc 4 119 0
-	lsls	r3, r3, #10
+	lsl	r3, r3, #10
 	str	r3, [r4, #3224]
 	.loc 4 121 0
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL839:
+.LVL842:
 	.loc 4 123 0
-	movs	r3, #1
+	mov	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL840:
-.L1009:
+.LVL843:
+.L994:
 	.loc 4 126 0
 	ldrh	r3, [r4, #130]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	strh	r3, [r4, #130]	@ movhi
 	.loc 4 127 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	bne	.L1010
+	cmn	r3, #1
+	bne	.L995
 	.loc 4 130 0
-	adds	r5, r5, #1
-.LVL841:
+	add	r5, r5, #1
+.LVL844:
 	.loc 4 129 0
 	ldr	r1, [r4, #3224]
 	.loc 4 130 0
 	uxth	r5, r5
-.LVL842:
+.LVL845:
 	.loc 4 129 0
-	mov	r0, r10
+	ldr	r0, .L999+20
 	bl	printk
-.LVL843:
+.LVL846:
 	.loc 4 131 0
 	cmp	r5, #3
-	bls	.L1008
+	bls	.L993
 	.loc 4 132 0
 	mov	r2, r5
 	ldr	r1, [r4, #3224]
-	ldr	r0, .L1014+8
+	ldr	r0, .L999+24
 	bl	printk
-.LVL844:
-.L1012:
-	b	.L1012
-.LVL845:
-.L1007:
+.LVL847:
+.L997:
+	b	.L997
+.LVL848:
+.L992:
 	.loc 4 92 0 discriminator 3
-	ldrh	r2, [r4, #3860]
+	ldrh	r2, [r7]
 	ldr	r3, [r4, #3228]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	.loc 4 91 0 discriminator 3
-	adds	r5, r5, #1
+	add	r5, r5, #1
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL846:
-	b	.L1006
-.LVL847:
-.L1013:
-	movs	r7, #1
-	b	.L1008
-.L1010:
+.LVL849:
+	b	.L991
+.LVL850:
+.L998:
+	mov	r7, #1
+	b	.L993
+.L995:
 	.loc 4 139 0
 	cmp	r7, #0
-	beq	.L1013
+	beq	.L998
 	.loc 4 146 0
-	movs	r0, #0
-	add	sp, sp, #12
-.LCFI129:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL848:
-.L1015:
+	mov	r0, #0
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1000:
 	.align	2
-.L1014:
+.L999:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-	.word	.LC95
+	.word	.LANCHOR0+3860
 	.word	.LC93
+	.word	.LANCHOR0+3220
+	.word	-3887
 	.word	.LC94
+	.word	.LC95
 .LFE176:
-	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.align	1
+	.align	2
 	.global	allocate_data_superblock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	.fnstart
 .LFB248:
 	.loc 2 2579 0
 	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL849:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI130:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL851:
+	mov	ip, sp
+.LCFI304:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI305:
+	sub	fp, ip, #4
+.LCFI306:
+	sub	sp, sp, #16
+	.loc 2 2579 0
 	mov	r5, r0
-	ldr	r4, .L1051
-	.pad #20
-	sub	sp, sp, #20
-.LCFI131:
 	.loc 2 2585 0
-	ldr	r9, .L1051+20
-.LVL850:
-.L1017:
-	ldr	r3, .L1051
-	ldr	r2, .L1051
-	ldrh	r3, [r3, #2320]
-	ldrh	r2, [r2, #2312]
+	ldr	r4, .L1036
+	add	r8, r4, #2320
+.LVL852:
+.L1002:
+	ldr	r7, .L1036+4
+.LVL853:
+	ldrh	r3, [r8]
+	ldrh	r2, [r7]
 	add	r3, r3, r2
-	ldr	r2, .L1051
-	ldrh	r2, [r2, #16]
+	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1018
+	ble	.L1003
 	.loc 2 2585 0 is_stmt 0 discriminator 1
 	movw	r2, #2585
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL851:
-.L1018:
+.LVL854:
+.L1003:
 	.loc 2 2587 0 is_stmt 1
-	ldr	r3, .L1051+8
+	ldr	r3, .L1036+16
 	cmp	r5, r3
-	bne	.L1043
+	movne	r1, #0
+.LVL855:
+	bne	.L1004
 	.loc 2 2588 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r8]
 	ldr	r1, [r4, #3136]
+.LVL856:
 	mul	r2, r1, r3
-	lsrs	r1, r3, #1
-	adds	r1, r1, #1
+	lsr	r1, r3, #1
+	add	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL852:
+.LVL857:
 	.loc 2 2592 0
-	cbz	r1, .L1019
+	cmp	r1, #0
 	.loc 2 2593 0
-	subs	r1, r1, #1
-.LVL853:
-	uxth	r1, r1
-.LVL854:
-.L1019:
+	subne	r1, r1, #1
+.LVL858:
+	uxthne	r1, r1
+.LVL859:
+.L1004:
 	.loc 2 2594 0
-	ldr	r0, .L1051+12
+	ldr	r0, .L1036+20
 	bl	List_pop_index_node
-.LVL855:
-	ldrh	r3, [r4, #2320]
+.LVL860:
+	ldrh	r3, [r8]
 	mov	r6, r0
-	uxth	r8, r0
-	cbnz	r3, .L1020
+	uxth	r9, r0
+	cmp	r3, #0
+	bne	.L1005
 	.loc 2 2594 0 is_stmt 0 discriminator 1
 	movw	r2, #2594
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL856:
-.L1020:
+.LVL861:
+.L1005:
 	.loc 2 2594 0 discriminator 3
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r8]
 	.loc 2 2598 0 is_stmt 1 discriminator 3
 	mov	r0, r5
 	.loc 2 2594 0 discriminator 3
-	subs	r3, r3, #1
-	strh	r3, [r4, #2320]	@ movhi
+	sub	r3, r3, #1
+	strh	r3, [r8]	@ movhi
 	.loc 2 2597 0 discriminator 3
-	strh	r8, [r5]	@ movhi
+	strh	r9, [r5]	@ movhi
 	.loc 2 2598 0 discriminator 3
 	bl	make_superblock
-.LVL857:
+.LVL862:
 	.loc 2 2599 0 discriminator 3
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1021
-	.loc 2 2603 0
-	ldr	r3, [r4, #2300]
-	uxth	r6, r6
-	movw	r2, #65535
-	.loc 2 2604 0
-	mov	r0, r8
+	cmp	r3, #0
+	bne	.L1006
+	uxth	r0, r6
 	.loc 2 2603 0
-	strh	r2, [r3, r6, lsl #1]	@ movhi
+	ldr	r2, [r4, #2300]
+	mvn	r1, #0
+	lsl	r3, r0, #1
+	strh	r1, [r2, r3]	@ movhi
 	.loc 2 2604 0
 	bl	INSERT_DATA_LIST
-.LVL858:
+.LVL863:
 	.loc 2 2605 0
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	ldrh	r2, [r7]
+	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1017
+	ble	.L1002
 	.loc 2 2605 0 is_stmt 0 discriminator 1
 	movw	r2, #2605
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL859:
-	b	.L1017
-.L1043:
-	movs	r1, #0
-.LVL860:
-	b	.L1019
-.LVL861:
-.L1021:
+.LVL864:
+	b	.L1002
+.L1006:
 	.loc 2 2608 0 is_stmt 1
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	ldrh	r2, [r7]
+	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #16]
 	cmp	r3, r2
-	ble	.L1023
+	ble	.L1008
 	.loc 2 2608 0 is_stmt 0 discriminator 1
 	mov	r2, #2608
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL862:
-.L1023:
+.LVL865:
+.L1008:
 	.loc 2 2612 0 is_stmt 1 discriminator 1
-	ldr	r1, [r4, #3760]
-	mov	r10, #20
-	ldrh	r2, [r4, #8]
-	add	fp, r5, #16
-	movs	r7, #0
-	mov	r0, fp
-	mov	r3, r1
-	mov	ip, r7
-	mla	r2, r10, r2, r1
-	str	r2, [sp, #4]
-.L1024:
+	ldr	r0, [r4, #3760]
+	mov	r2, #20
+	ldrh	r1, [r4, #8]
+	mov	r7, #0
+.LVL866:
+	add	ip, r5, #16
+	mov	lr, r7
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [fp, #-44]
+.L1009:
 	.loc 2 2611 0 discriminator 1
-	ldr	r2, [sp, #4]
-	cmp	r2, r3
-	bne	.L1026
+	ldr	r1, [fp, #-44]
+	cmp	r1, r3
+	bne	.L1011
 	.loc 2 2619 0
-	cbnz	r7, .L1027
+	cmp	r7, #0
+	bne	.L1012
 	.loc 2 2619 0 is_stmt 0 discriminator 1
 	movw	r2, #2619
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL863:
-.L1027:
+.LVL867:
+.L1012:
 	.loc 2 2621 0 is_stmt 1
-	ldrh	r3, [r4, #2564]
-	cmp	r3, r8
-	bne	.L1028
+	ldr	r3, .L1036+24
+	ldrh	r3, [r3]
+	cmp	r3, r9
+	bne	.L1013
 	.loc 2 2621 0 is_stmt 0 discriminator 1
 	movw	r2, #2621
-	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL864:
-.L1028:
+.LVL868:
+.L1013:
 	.loc 2 2622 0 is_stmt 1
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
-	.loc 2 2623 0
-	ldr	r2, [r4, #2304]
-	.loc 2 2622 0
 	cmp	r3, #0
-	bne	.L1029
+	bne	.L1014
 	.loc 2 2623 0
-	ldrh	r3, [r2, r6, lsl #1]
+	ldr	r1, [r4, #2304]
+	lsl	r2, r6, #1
+	ldrh	r3, [r1, r2]
 	cmp	r3, #0
-	beq	.L1030
 	.loc 2 2624 0
-	ldrh	r1, [r4, #68]
-	add	r3, r3, r1
-.L1050:
+	ldrhne	r0, [r4, #68]
 	.loc 2 2626 0
-	strh	r3, [r2, r6, lsl #1]	@ movhi
+	moveq	r3, #2
+	.loc 2 2624 0
+	addne	r3, r3, r0
 	.loc 2 2628 0
-	movs	r1, #0
-	.loc 2 2627 0
-	ldr	r3, [r4, #2524]
+	mov	r0, r6
+	.loc 2 2626 0
+	strh	r3, [r1, r2]	@ movhi
 	.loc 2 2628 0
-	mov	r0, r8
+	mov	r1, #0
 	.loc 2 2627 0
-	adds	r3, r3, #1
+	ldr	r3, [r4, #2524]
+	add	r3, r3, #1
 	str	r3, [r4, #2524]
 	.loc 2 2628 0
 	bl	ftl_set_blk_mode
-.LVL865:
-.L1032:
+.LVL869:
+.L1017:
 	.loc 2 2635 0
 	ldr	r3, [r4, #2304]
+	lsl	r10, r6, #1
 	ldr	r2, [r4, #2540]
 	.loc 2 2638 0
-	ldrh	r0, [r4, #68]
+	ldr	r0, [r4, #2524]
 	.loc 2 2635 0
-	ldrh	r3, [r3, r6, lsl #1]
+	ldrh	r3, [r3, r10]
 	.loc 2 2638 0
 	ldrh	r1, [r4, #16]
 	.loc 2 2635 0
 	cmp	r3, r2
 	.loc 2 2638 0
-	ldr	r2, [r4, #2524]
+	ldrh	r2, [r4, #68]
 	.loc 2 2636 0
-	it	hi
 	strhi	r3, [r4, #2540]
 	.loc 2 2638 0
 	ldr	r3, [r4, #2528]
-	mla	r0, r2, r0, r3
-	bl	__aeabi_uidiv
-.LVL866:
+	mla	r0, r0, r2, r3
+	bl	__udivsi3
+.LVL870:
 	.loc 2 2639 0
 	ldr	r2, [r4, #3820]
 	.loc 2 2642 0
@@ -11080,171 +11148,164 @@ allocate_data_superblock:
 	.loc 2 2639 0
 	ldr	r3, [r2, #16]
 	.loc 2 2642 0
-	ldr	r0, .L1051+16
+	ldr	r0, .L1036+28
 	.loc 2 2639 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r2, #16]
-	movs	r2, #20
+	mov	r2, #20
 	mla	r2, r2, r7, r1
-	adds	r3, r1, #4
-	adds	r2, r2, #24
-.L1034:
-	adds	r3, r3, #20
+	add	r3, r1, #4
+	add	r2, r2, #24
+.L1019:
+	add	r3, r3, #20
 	.loc 2 2641 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1035
+	bne	.L1020
 	.loc 2 2643 0
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3760]
-	.loc 2 2645 0
-	mov	r10, #0
-	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL867:
-	.loc 2 2644 0
-	mov	r3, r10
-.LVL868:
+.LVL871:
+	.loc 2 2645 0
+	mov	r3, #0
 	.loc 2 2646 0
-	movs	r1, #20
-.L1036:
+	mov	ip, #20
+	.loc 2 2644 0
+	mov	r1, r3
+.LVL872:
+.L1021:
 	.loc 2 2645 0 discriminator 1
-	uxth	r2, r10
+	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L1038
+	bhi	.L1023
 	.loc 2 2656 0
-	cmp	r3, #0
-	ble	.L1039
+	cmp	r1, #0
+	ble	.L1024
 	.loc 2 2657 0
-	mov	r0, r8
+	mov	r0, r6
 	bl	update_multiplier_value
-.LVL869:
+.LVL873:
 	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL870:
-.L1039:
+.LVL874:
+.L1024:
 	.loc 2 2661 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1040
+	bne	.L1025
 	.loc 2 2663 0
 	ldr	r3, [r4, #2300]
-.LVL871:
-	movw	r2, #65535
+	mvn	r2, #0
 	.loc 2 2664 0
-	mov	r0, r8
+	mov	r0, r6
 	.loc 2 2663 0
-	strh	r2, [r3, r6, lsl #1]	@ movhi
+	strh	r2, [r3, r10]	@ movhi
 	.loc 2 2664 0
 	bl	INSERT_DATA_LIST
-.LVL872:
+.LVL875:
 	.loc 2 2665 0
-	b	.L1017
-.L1026:
+	b	.L1002
+.L1011:
 	.loc 2 2612 0
-	str	ip, [r3, #8]
+	str	lr, [r3, #8]
 	.loc 2 2614 0
-	movw	lr, #65535
+	movw	r10, #65535
 	.loc 2 2613 0
-	str	ip, [r3, #12]
+	str	lr, [r3, #12]
+	add	r3, r3, #20
 	.loc 2 2614 0
-	ldrh	r2, [r0], #2
-	cmp	r2, lr
-	beq	.L1025
-	.loc 2 2615 0
-	mla	lr, r10, r7, r1
-	.loc 2 2616 0
-	adds	r7, r7, #1
-.LVL873:
+	ldrh	r1, [ip], #2
+	cmp	r1, r10
 	.loc 2 2615 0
-	lsls	r2, r2, #10
+	mlane	r10, r2, r7, r0
+	lslne	r1, r1, #10
 	.loc 2 2616 0
-	uxth	r7, r7
-.LVL874:
+	addne	r7, r7, #1
+.LVL876:
+	uxthne	r7, r7
+.LVL877:
 	.loc 2 2615 0
-	str	r2, [lr, #4]
-.L1025:
-	adds	r3, r3, #20
-	b	.L1024
-.L1030:
-	.loc 2 2626 0
-	movs	r3, #2
-	b	.L1050
-.L1029:
+	strne	r1, [r10, #4]
+	b	.L1009
+.L1014:
 	.loc 2 2630 0
-	ldrh	r3, [r2, r6, lsl #1]
+	ldr	r1, [r4, #2304]
+	lsl	r3, r6, #1
+.LBB451:
 .LBB452:
-.LBB453:
-	mov	r0, r8
-.LBE453:
+	mov	r0, r6
 .LBE452:
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
+.LBE451:
+	ldrh	r2, [r1, r3]
+	add	r2, r2, #1
+	strh	r2, [r1, r3]	@ movhi
 	.loc 2 2631 0
 	ldr	r3, [r4, #2528]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #2528]
-.LBB455:
 .LBB454:
+.LBB453:
 	bl	ftl_set_blk_mode.part.6
-.LVL875:
-	b	.L1032
-.L1035:
+.LVL878:
+	b	.L1017
+.L1020:
+.LBE453:
 .LBE454:
-.LBE455:
 	.loc 2 2642 0 discriminator 3
 	ldr	r1, [r3, #-20]
-	ands	r1, r1, r0
+	and	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1034
-.LVL876:
-.L1038:
+	b	.L1019
+.LVL879:
+.L1023:
 	.loc 2 2646 0
-	mul	r2, r1, r10
-	ldr	r0, [r4, #3760]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
-	bne	.L1037
+	mul	r2, ip, r3
+	ldr	lr, [r4, #3760]
+	add	r0, lr, r2
+	ldr	r2, [lr, r2]
+	cmn	r2, #1
+	bne	.L1022
 	.loc 2 2648 0
-	ldr	r0, [ip, #4]
+	ldr	r0, [r0, #4]
 	.loc 2 2647 0
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
+	add	r1, r1, #1
+	str	ip, [fp, #-56]
+	str	r2, [fp, #-52]
 	.loc 2 2649 0
 	ubfx	r0, r0, #10, #16
+	str	r3, [fp, #-48]
 	.loc 2 2647 0
-	str	r3, [sp, #4]
+	str	r1, [fp, #-44]
 	.loc 2 2649 0
 	bl	FtlBbmMapBadBlock
-.LVL877:
+.LVL880:
 	.loc 2 2650 0
-	ldr	r2, [sp, #8]
+	ldr	r3, [fp, #-48]
+	ldr	r2, [fp, #-52]
 	.loc 2 2651 0
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-.LVL878:
+	ldr	ip, [fp, #-56]
+	ldr	r1, [fp, #-44]
+.LVL881:
 	.loc 2 2650 0
-	strh	r2, [fp]	@ movhi
+	add	r0, r5, r3, lsl #1
+	strh	r2, [r0, #16]	@ movhi
 	.loc 2 2651 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
+	sub	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1037:
-	add	r10, r10, #1
-	add	fp, fp, #2
-	b	.L1036
-.L1040:
+.L1022:
+	add	r3, r3, #1
+	b	.L1021
+.L1025:
 	.loc 2 2668 0
 	ldrh	r3, [r4, #78]
-.LVL879:
 	.loc 2 2669 0
-	strh	r8, [r5]	@ movhi
+	strh	r9, [r5]	@ movhi
 	.loc 2 2668 0
 	smulbb	r3, r3, r2
 	.loc 2 2670 0
-	movs	r2, #0
+	mov	r2, #0
 	strh	r2, [r5, #2]	@ movhi
 	.loc 2 2671 0
 	strb	r2, [r5, #6]
@@ -11252,1814 +11313,1830 @@ allocate_data_superblock:
 	ldr	r2, [r4, #2516]
 	.loc 2 2668 0
 	uxth	r3, r3
+	.loc 2 2673 0
+	ldr	r1, [r4, #2300]
+.LVL882:
+	.loc 2 2668 0
 	strh	r3, [r5, #4]	@ movhi
 	.loc 2 2672 0
 	str	r2, [r5, #12]
-	adds	r2, r2, #1
+	add	r2, r2, #1
 	str	r2, [r4, #2516]
 	.loc 2 2673 0
-	ldr	r2, [r4, #2300]
-	ldrh	r1, [r5]
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r2, [r5]
+	lsl	r2, r2, #1
+	strh	r3, [r1, r2]	@ movhi
 	.loc 2 2674 0
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1041
+	cmp	r3, #0
+	beq	.L1026
 	.loc 2 2674 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1042
-.L1041:
+	cmp	r3, #0
+	bne	.L1027
+.L1026:
 	.loc 2 2674 0 discriminator 3
 	movw	r2, #2674
-	ldr	r1, .L1051+20
-	ldr	r0, .L1051+4
+	ldr	r1, .L1036+8
+	ldr	r0, .L1036+12
 	bl	printk
-.LVL880:
-.L1042:
+.LVL883:
+.L1027:
 	.loc 2 2676 0 is_stmt 1
-	movs	r0, #0
-	add	sp, sp, #20
-.LCFI132:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL881:
-.L1052:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI307:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL884:
+.L1037:
 	.align	2
-.L1051:
+.L1036:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2312
+	.word	.LANCHOR1+360
 	.word	.LC1
 	.word	.LANCHOR0+2420
 	.word	.LANCHOR0+2316
+	.word	.LANCHOR0+2564
 	.word	-1024
-	.word	.LANCHOR1+360
 .LFE248:
-	.fnend
 	.size	allocate_data_superblock, .-allocate_data_superblock
-	.align	1
+	.align	2
 	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-	.fnstart
 .LFB267:
 	.loc 5 390 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL882:
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI133:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL885:
+	mov	ip, sp
+.LCFI308:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI309:
+	sub	fp, ip, #4
+.LCFI310:
+	sub	sp, sp, #8
 	.loc 5 390 0
-	mov	r8, r0
+	uxth	r3, r0
+.LVL886:
 	.loc 5 395 0
-	ldr	r4, .L1065
-	ldrh	r3, [r4, #3182]
-	cbz	r3, .L1054
-	movs	r7, #0
-	add	r10, r4, #3184
-.LVL883:
-.L1055:
+	ldr	r6, .L1050
+	.loc 5 390 0
+	str	r3, [fp, #-44]
+	.loc 5 395 0
+	movw	r3, #3182
+.LVL887:
+	ldrh	r3, [r6, r3]
+	cmp	r3, #0
+	movne	r7, #0
+.LBB457:
 .LBB458:
-.LBB459:
-	.loc 5 396 0
-	ldrh	r2, [r4, #8]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L1061
-	.loc 5 412 0
-	bl	FtlGcReFreshBadBlk
-.LVL884:
-.L1054:
-.LBE459:
+	.loc 5 398 0
+	ldrne	r10, .L1050+4
 .LBE458:
+.LBE457:
+	.loc 5 395 0
+	bne	.L1040
+.LVL888:
+.L1039:
 	.loc 5 415 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL885:
-.L1061:
-.LBB461:
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI311:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL889:
+.L1046:
+.LCFI312:
 .LBB460:
+.LBB459:
 	.loc 5 397 0
-	uxtah	r3, r4, r7
-	mov	r1, r8
-	mov	fp, #0
+	uxtah	r3, r6, r7
+	ldr	r1, [fp, #-44]
+	mov	r8, #0
 	ldrb	r0, [r3, #36]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL886:
+.LVL890:
 	mov	r9, r0
-.L1056:
+.L1041:
 	.loc 5 398 0
-	ldrh	r3, [r4, #3182]
-	uxth	r5, fp
-	cmp	r3, r5
-	bhi	.L1060
-	adds	r7, r7, #1
-	b	.L1055
-.L1060:
+	ldrh	r3, [r10]
+	uxth	r4, r8
+	cmp	r3, r4
+	bhi	.L1045
+	add	r7, r7, #1
+.L1040:
+	.loc 5 396 0
+	ldrh	r2, [r6, #8]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1046
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL891:
+	b	.L1039
+.L1045:
 	.loc 5 399 0
-	uxth	r6, fp
-	add	r3, r4, r6, lsl #1
-	ldrh	r3, [r3, #3184]
-	cmp	r3, r9
-	bne	.L1057
+	uxth	r3, r8
+	ldr	r5, .L1050+8
+	lsl	r2, r3, #1
+	ldrh	r2, [r5, r2]
+	cmp	r2, r9
+	bne	.L1042
 	.loc 5 401 0
 	mov	r1, r9
-	ldr	r0, .L1065+4
+	ldr	r0, .L1050+12
+	str	r3, [fp, #-48]
 	bl	printk
-.LVL887:
+.LVL892:
 	.loc 5 403 0
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
-.LVL888:
+.LVL893:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL889:
+.LVL894:
+	ldr	r3, [fp, #-48]
 	.loc 5 405 0
-	ldrh	r1, [r4, #3182]
-	add	r3, r10, r6, lsl #1
-.L1058:
-	cmp	r5, r1
-	bcc	.L1059
+	ldrh	r2, [r10]
+	add	r3, r5, r3, lsl #1
+.L1043:
+	cmp	r4, r2
+	bcc	.L1044
 	.loc 5 407 0
-	subs	r1, r1, #1
-	strh	r1, [r4, #3182]	@ movhi
-.L1057:
-	add	fp, fp, #1
-	b	.L1056
-.L1059:
+	sub	r2, r2, #1
+	strh	r2, [r10]	@ movhi
+.L1042:
+	add	r8, r8, #1
+	b	.L1041
+.L1044:
 	.loc 5 406 0
-	ldrh	r0, [r3, #2]!
+	ldrh	r1, [r3, #2]!
 	.loc 5 405 0
-	adds	r5, r5, #1
-.LVL890:
-	uxth	r5, r5
-.LVL891:
+	add	r4, r4, #1
+.LVL895:
+	uxth	r4, r4
+.LVL896:
 	.loc 5 406 0
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1058
-.L1066:
+	strh	r1, [r3, #-2]	@ movhi
+	b	.L1043
+.L1051:
 	.align	2
-.L1065:
+.L1050:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3182
+	.word	.LANCHOR0+3184
 	.word	.LC96
+.LBE459:
 .LBE460:
-.LBE461:
 .LFE267:
-	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.align	1
+	.align	2
 	.global	update_vpc_list
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
-	.fnstart
 .LFB251:
 	.loc 2 2735 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL892:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL897:
+	mov	ip, sp
+.LCFI313:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI314:
+	sub	fp, ip, #4
+.LCFI315:
 	.loc 2 2736 0
-	ldr	r2, .L1077
-	.loc 2 2735 0
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI134:
+	ldr	r3, .L1062
 	.loc 2 2735 0
-	mov	r5, r0
-	mov	r4, r2
+	uxth	r4, r0
+.LVL898:
 	.loc 2 2736 0
-	ldr	r3, [r2, #2300]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1068
+	ldr	r1, [r3, #2300]
+	lsl	r2, r4, #1
+	mov	r5, r3
+	ldrh	r0, [r1, r2]
+	cmp	r0, #0
+	bne	.L1053
 	.loc 2 2737 0
-	ldrh	r1, [r2, #2564]
-	cmp	r1, r0
-	bne	.L1069
+	movw	r2, #2564
+	ldrh	r1, [r3, r2]
+	cmp	r1, r4
 	.loc 2 2739 0
-	movw	r3, #65535
-	strh	r3, [r2, #2564]	@ movhi
-.L1070:
-.LVL893:
+	mvneq	r3, #0
+	strheq	r3, [r5, r2]	@ movhi
+	.loc 2 2737 0
+	beq	.L1055
+	.loc 2 2740 0
+	movw	r2, #2324
+	ldrh	r2, [r3, r2]
+	cmp	r2, r4
+	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
+	.loc 2 2740 0 is_stmt 0 discriminator 1
+	movw	r2, #2372
+	ldrh	r2, [r3, r2]
+	cmp	r2, r4
+	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
+	.loc 2 2740 0 discriminator 2
+	movw	r2, #2420
+	ldrh	r3, [r3, r2]
+	cmp	r3, r4
+	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
+.L1055:
+.LBB463:
 .LBB464:
-.LBB465:
-	.loc 2 2744 0
-	mov	r1, r5
-	ldr	r0, .L1077+4
+	.loc 2 2744 0 is_stmt 1
+	mov	r1, r4
+	ldr	r0, .L1062+4
 	bl	List_remove_node
-.LVL894:
-	ldrh	r3, [r4, #2312]
-	cbnz	r3, .L1072
+.LVL899:
+	movw	r3, #2312
+	ldrh	r3, [r5, r3]
+	cmp	r3, #0
+	bne	.L1057
 	movw	r2, #2744
-	ldr	r1, .L1077+8
-	ldr	r0, .L1077+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printk
-.LVL895:
-.L1072:
-	ldrh	r3, [r4, #2312]
+.LVL900:
+.L1057:
+	movw	r6, #2312
 	.loc 2 2745 0
-	mov	r0, r5
+	mov	r0, r4
 	.loc 2 2744 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #2312]	@ movhi
+	ldrh	r3, [r5, r6]
+	sub	r3, r3, #1
+	strh	r3, [r5, r6]	@ movhi
 	.loc 2 2745 0
 	bl	free_data_superblock
-.LVL896:
+.LVL901:
 	.loc 2 2746 0
-	mov	r0, r5
+	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL897:
+.LVL902:
 	.loc 2 2747 0
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	ldr	r3, .L1062+16
+	ldrh	r2, [r5, r6]
+	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r5, #16]
 	cmp	r3, r2
-	ble	.L1076
+	ble	.L1061
 	movw	r2, #2747
-	ldr	r1, .L1077+8
-	ldr	r0, .L1077+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printk
-.LVL898:
-.L1076:
-	movs	r3, #1
-	b	.L1067
-.LVL899:
-.L1069:
-.LBE465:
+.LVL903:
+.L1061:
+	mov	r0, #1
 .LBE464:
-	.loc 2 2740 0
-	ldrh	r1, [r2, #2324]
-	cmp	r1, r0
-	beq	.L1067
-	.loc 2 2740 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #2372]
-	cmp	r1, r0
-	beq	.L1067
-	.loc 2 2740 0 discriminator 2
-	ldrh	r2, [r2, #2420]
-	cmp	r2, r0
-	bne	.L1070
-.L1067:
-	.loc 2 2753 0 is_stmt 1
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.LVL900:
-.L1068:
+.LBE463:
+	.loc 2 2753 0
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1053:
 	.loc 2 2750 0
+	mov	r0, r4
 	bl	List_update_data_list
-.LVL901:
+.LVL904:
 	.loc 2 2752 0
-	movs	r3, #0
-	b	.L1067
-.L1078:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1063:
 	.align	2
-.L1077:
+.L1062:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2296
 	.word	.LANCHOR1+385
 	.word	.LC1
+	.word	.LANCHOR0+2320
 .LFE251:
-	.fnend
 	.size	update_vpc_list, .-update_vpc_list
-	.align	1
+	.align	2
 	.global	decrement_vpc_count
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-	.fnstart
 .LFB252:
 	.loc 2 2756 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL902:
-	.loc 2 2759 0
-	movw	r3, #65535
-	.loc 2 2756 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI135:
-	.loc 2 2759 0
-	cmp	r0, r3
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL905:
+	mov	ip, sp
+.LCFI316:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI317:
+	sub	fp, ip, #4
+.LCFI318:
 	.loc 2 2756 0
-	mov	r4, r0
-	ldr	r5, .L1088
+	uxth	r5, r0
+.LVL906:
 	.loc 2 2759 0
-	beq	.L1080
+	movw	r3, #65535
+	cmp	r5, r3
+	ldr	r6, .L1076
+	beq	.L1065
 	.loc 2 2760 0
-	ldr	r3, [r5, #2300]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1081
+	ldr	r3, [r6, #2300]
+	lsl	r4, r5, #1
+	ldrh	r2, [r3, r4]
+	cmp	r2, #0
+	.loc 2 2765 0
+	subne	r2, r2, #1
+	strhne	r2, [r3, r4]	@ movhi
+	.loc 2 2760 0
+	bne	.L1065
 	.loc 2 2761 0
-	mov	r1, r0
-	ldr	r0, .L1088+4
+	mov	r1, r5
+	ldr	r0, .L1076+4
 	bl	printk
-.LVL903:
+.LVL907:
 	.loc 2 2762 0
-	ldr	r3, [r5, #2300]
-	ldrh	r6, [r3, r4, lsl #1]
-	cbz	r6, .L1082
-.L1086:
+	ldr	r3, [r6, #2300]
+	ldrh	r4, [r3, r4]
+	cmp	r4, #0
+	beq	.L1067
+.L1074:
 	.loc 2 2771 0
-	movs	r6, #0
-.L1079:
+	mov	r4, #0
+.L1064:
 	.loc 2 2781 0
-	mov	r0, r6
-	pop	{r4, r5, r6, pc}
-.LVL904:
-.L1082:
+	mov	r0, r4
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1067:
 	.loc 2 2762 0 discriminator 1
 	movw	r2, #2762
-.L1087:
+.L1075:
 	.loc 2 2778 0 discriminator 2
-	ldr	r1, .L1088+8
-	ldr	r0, .L1088+12
+	ldr	r1, .L1076+8
+	ldr	r0, .L1076+12
 	bl	printk
-.LVL905:
-	b	.L1079
-.LVL906:
-.L1081:
-	.loc 2 2765 0
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1080:
+.LVL908:
+	b	.L1064
+.L1065:
 	.loc 2 2769 0
-	ldrh	r0, [r5, #3952]
+	ldr	r7, .L1076+16
 	movw	r3, #65535
+	ldrh	r0, [r7]
 	cmp	r0, r3
-	bne	.L1084
 	.loc 2 2770 0
-	strh	r4, [r5, #3952]	@ movhi
-	b	.L1086
-.L1084:
+	strheq	r5, [r7]	@ movhi
+	beq	.L1074
+.L1069:
 	.loc 2 2772 0
-	cmp	r4, r0
-	beq	.L1086
+	cmp	r5, r0
+	beq	.L1074
 	.loc 2 2775 0
 	bl	update_vpc_list
-.LVL907:
+.LVL909:
 	.loc 2 2778 0
-	ldr	r2, [r5, #2292]
+	ldr	r2, [r6, #2292]
 	.loc 2 2775 0
-	adds	r6, r0, #0
+	adds	r4, r0, #0
 	.loc 2 2778 0
-	ldr	r3, [r5, #2296]
+	ldr	r3, [r6, #2296]
 	.loc 2 2775 0
-	it	ne
-	movne	r6, #1
+	movne	r4, #1
+	.loc 2 2778 0
+	ldr	r1, [r6, #2300]
 	.loc 2 2777 0
-	strh	r4, [r5, #3952]	@ movhi
+	strh	r5, [r7]	@ movhi
 	.loc 2 2778 0
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1088+16
-	muls	r3, r2, r3
-	ldr	r2, [r5, #2300]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
+	sub	r3, r3, r2
+	asr	r3, r3, #3
+	uxth	r2, r3
+	uxth	r3, r3
+	lsl	r2, r2, #1
+	cmp	r3, r5
+	ldrh	r2, [r1, r2]
+	clz	r2, r2
+	lsr	r2, r2, #5
+	moveq	r2, #0
 	cmp	r2, #0
-	bne	.L1079
-	.loc 2 2778 0 is_stmt 0 discriminator 1
-	cmp	r4, r1
-	beq	.L1079
-	.loc 2 2778 0 discriminator 2
+	beq	.L1064
+	.loc 2 2778 0 is_stmt 0 discriminator 2
 	movw	r2, #2778
-	b	.L1087
-.L1089:
+	b	.L1075
+.L1077:
 	.align	2
-.L1088:
+.L1076:
 	.word	.LANCHOR0
 	.word	.LC97
 	.word	.LANCHOR1+401
 	.word	.LC1
-	.word	-1431655765
+	.word	.LANCHOR0+3952
 .LFE252:
-	.fnend
 	.size	decrement_vpc_count, .-decrement_vpc_count
-	.align	1
+	.align	2
 	.global	FtlWriteDump_data
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-	.fnstart
 .LFB218:
 	.loc 2 996 0 is_stmt 1
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI136:
-	.pad #24
-	sub	sp, sp, #24
-.LCFI137:
+	@ args = 0, pretend = 0, frame = 28
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI319:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI320:
+	sub	fp, ip, #4
+.LCFI321:
+	sub	sp, sp, #28
 	.loc 2 997 0
-	ldr	r4, .L1108
-	ldrh	r2, [r4, #2328]
+	ldr	r6, .L1096
+	ldr	r4, .L1096+4
+	ldrh	r2, [r6, #4]
 	cmp	r2, #0
-	beq	.L1091
+	beq	.L1079
 	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1091
+	bne	.L1079
 	.loc 2 998 0 is_stmt 1
 	ldrb	r1, [r4, #2331]	@ zero_extendqisi2
 	ldrh	r3, [r4, #78]
-	muls	r3, r1, r3
+	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1091
+	beq	.L1079
+.LBB468:
 .LBB469:
-.LBB470:
 	.loc 2 1005 0
-	ldrb	r7, [r4, #2334]	@ zero_extendqisi2
-	cbnz	r7, .L1090
+	ldrb	r8, [r4, #2334]	@ zero_extendqisi2
+	cmp	r8, #0
+	bne	.L1078
 	.loc 2 1000 0
-	ldr	r6, [r4, #2480]
+	ldr	r7, [r4, #2480]
 	.loc 2 1007 0
-	mov	r2, r7
-	mov	r1, sp
+	mov	r2, r8
+	sub	r1, fp, #64
 	.loc 2 1002 0
-	ldrh	r8, [r4, #8]
+	ldrh	r9, [r4, #8]
 	.loc 2 1000 0
-	subs	r6, r6, #1
-.LVL908:
+	sub	r7, r7, #1
+.LVL910:
 	.loc 2 1007 0
-	mov	r0, r6
+	mov	r0, r7
 	bl	log2phys
-.LVL909:
+.LVL911:
 	.loc 2 1010 0
-	ldr	r3, [sp]
+	ldr	r3, [fp, #-64]
 	.loc 2 1013 0
 	ldr	r5, [r4, #3244]
 	.loc 2 1012 0
 	ldr	r0, [r4, #3240]
-	.loc 2 1010 0
-	str	r3, [sp, #8]
 	.loc 2 1016 0
-	adds	r3, r3, #1
+	cmn	r3, #1
+	.loc 2 1010 0
+	str	r3, [fp, #-56]
 	.loc 2 1011 0
-	str	r6, [sp, #20]
+	str	r7, [fp, #-44]
 	.loc 2 1012 0
-	str	r0, [sp, #12]
+	str	r0, [fp, #-52]
 	.loc 2 1013 0
-	str	r5, [sp, #16]
+	str	r5, [fp, #-48]
 	.loc 2 1015 0
-	str	r7, [r5, #4]
+	str	r8, [r5, #4]
 	.loc 2 1016 0
-	beq	.L1093
+	beq	.L1081
 	.loc 2 1018 0
-	mov	r2, r7
-	movs	r1, #1
-	add	r0, sp, #4
+	mov	r2, r8
+	mov	r1, #1
+	sub	r0, fp, #60
 	bl	FlashReadPages
-.LVL910:
-.L1094:
+.LVL912:
+.L1082:
 	.loc 2 1035 0
-	ldr	r9, .L1108+4
+	ldr	ip, .L1096
 	.loc 2 1024 0
-	movs	r7, #0
+	mov	r8, #0
+	ldr	r3, .L1096+8
 	.loc 2 1002 0
-	lsl	r8, r8, #2
-.LVL911:
+	lsl	r9, r9, #2
+.LVL913:
 	.loc 2 1036 0
-	mov	r10, r7
+	mov	r10, r8
 	.loc 2 1024 0
-	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1095:
+.L1083:
 	.loc 2 1025 0
-	cmp	r8, r7
-	bne	.L1099
-.L1096:
+	cmp	r9, r8
+	bne	.L1087
+.L1084:
 	.loc 2 1041 0
-	movs	r3, #1
-.L1107:
-.LBE470:
+	mov	r3, #1
+.L1095:
 .LBE469:
+.LBE468:
 	.loc 2 1047 0
 	strb	r3, [r4, #2334]
-.L1090:
+.L1078:
 	.loc 2 1049 0
-	add	sp, sp, #24
-.LCFI138:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL912:
-.L1093:
-.LCFI139:
-.LBB472:
+	sub	sp, fp, #40
+.LCFI322:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL914:
+.L1081:
+.LCFI323:
 .LBB471:
+.LBB470:
 	.loc 2 1022 0
 	ldrh	r2, [r4, #86]
-	movs	r1, #255
+	mov	r1, #255
 	bl	ftl_memset
-.LVL913:
-	b	.L1094
-.LVL914:
-.L1099:
+.LVL915:
+	b	.L1082
+.LVL916:
+.L1087:
 	.loc 2 1027 0
-	ldrh	r3, [r4, #2328]
+	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1096
+	beq	.L1084
 	.loc 2 1032 0
-	ldr	r3, [sp, #8]
+	ldr	r3, [fp, #-56]
 	.loc 2 1035 0
-	mov	r0, r9
+	mov	r0, ip
 	.loc 2 1031 0
-	str	r6, [r5, #8]
-	adds	r7, r7, #1
+	str	r7, [r5, #8]
+	add	r8, r8, #1
+	.loc 2 1035 0
+	str	ip, [fp, #-68]
 	.loc 2 1032 0
 	str	r3, [r5, #12]
 	.loc 2 1033 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r6]
 	strh	r3, [r5, #2]	@ movhi
 	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL915:
+.LVL917:
 	.loc 2 1036 0
 	ldr	r3, [r4, #2520]
 	.loc 2 1037 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 2 1035 0
-	str	r0, [sp, #8]
+	str	r0, [fp, #-56]
 	.loc 2 1037 0
-	add	r0, sp, #4
+	sub	r0, fp, #60
 	.loc 2 1036 0
 	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
+	add	r3, r3, #1
+	cmn	r3, #1
 	moveq	r3, r10
 	str	r3, [r4, #2520]
 	.loc 2 1037 0
-	movs	r3, #0
+	mov	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL916:
+.LVL918:
 	.loc 2 1039 0
-	ldrh	r0, [r4, #2324]
+	ldrh	r0, [r6]
 	bl	decrement_vpc_count
-.LVL917:
-	b	.L1095
-.LVL918:
-.L1091:
+.LVL919:
+	ldr	ip, [fp, #-68]
+	b	.L1083
+.LVL920:
+.L1079:
+.LBE470:
 .LBE471:
-.LBE472:
 	.loc 2 1047 0
-	movs	r3, #0
-	b	.L1107
-.L1109:
+	mov	r3, #0
+	b	.L1095
+.L1097:
 	.align	2
-.L1108:
-	.word	.LANCHOR0
+.L1096:
 	.word	.LANCHOR0+2324
+	.word	.LANCHOR0
+	.word	-3947
 .LFE218:
-	.fnend
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.align	1
+	.align	2
 	.global	l2p_flush
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
-	.fnstart
 .LFB211:
 	.loc 2 789 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI140:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI324:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI325:
+	sub	fp, ip, #4
+.LCFI326:
 	.loc 2 795 0
-	movs	r4, #0
-	ldr	r5, .L1114
+	ldr	r5, .L1102
+	mov	r4, #0
 	.loc 2 796 0
-	movs	r6, #12
+	mov	r6, #12
 	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL919:
-.L1111:
+.LVL921:
+.L1099:
 	.loc 2 795 0 discriminator 1
-	ldrh	r3, [r5, #114]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L1113
+	ldrh	r2, [r5, #114]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L1101
 	.loc 2 799 0
-	movs	r0, #0
-.LVL920:
-	pop	{r4, r5, r6, pc}
-.LVL921:
-.L1113:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1101:
 	.loc 2 796 0
-	ldr	r2, [r5, #2468]
-	uxth	r3, r4
-	mla	r3, r6, r3, r2
+	ldr	r3, [r5, #2468]
+	uxth	r0, r4
+	mla	r3, r6, r0, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1112
+	bge	.L1100
 	.loc 2 797 0
 	bl	flush_l2p_region
 .LVL922:
-.L1112:
-	adds	r4, r4, #1
-	b	.L1111
-.L1115:
+.L1100:
+	add	r4, r4, #1
+	b	.L1099
+.L1103:
 	.align	2
-.L1114:
+.L1102:
 	.word	.LANCHOR0
 .LFE211:
-	.fnend
 	.size	l2p_flush, .-l2p_flush
-	.align	1
+	.align	2
 	.global	FtlRecoverySuperblock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-	.fnstart
 .LFB231:
 	.loc 2 1705 0
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
+	@ args = 0, pretend = 0, frame = 44
+	@ frame_needed = 1, uses_anonymous_args = 0
 .LVL923:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI141:
+	mov	ip, sp
+.LCFI327:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI328:
+	sub	fp, ip, #4
+.LCFI329:
+	sub	sp, sp, #44
 	.loc 2 1719 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
 	.loc 2 1705 0
-	.pad #52
-	sub	sp, sp, #52
-.LCFI142:
-	.loc 2 1705 0
-	mov	fp, r0
+	mov	r4, r0
 	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1241
+	beq	.L1225
 	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
 .LVL924:
 	.loc 2 1730 0
-	ldr	r4, .L1248
+	ldr	r6, .L1232
 	.loc 2 1724 0
-	str	r3, [sp, #8]
+	str	r3, [fp, #-64]
 	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 .LVL925:
 	.loc 2 1730 0
-	ldr	r1, [sp, #8]
+	ldr	r1, [fp, #-64]
 .LVL926:
 	.loc 2 1725 0
-	str	r3, [sp, #24]
+	str	r3, [fp, #-80]
 	.loc 2 1730 0
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r6, #78]
 .LVL927:
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1119
 	.loc 2 1731 0
-	strh	r3, [r0, #4]	@ movhi
+	strheq	r3, [r0, #4]	@ movhi
+	.loc 2 1738 0
+	ldrhne	r0, [r0, #16]
 .LVL928:
-.L1246:
+	.loc 2 1730 0
+	bne	.L1108
+.LVL929:
+.L1230:
 	.loc 2 2038 0
-	strb	r3, [fp, #6]
-.L1241:
+	strb	r3, [r4, #6]
+.L1225:
 	.loc 2 2059 0
-	movs	r0, #0
-	add	sp, sp, #52
-.LCFI143:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL929:
-.L1119:
-.LCFI144:
-	.loc 2 1738 0
-	ldrh	r0, [r0, #16]
+	mov	r0, #0
+	sub	sp, fp, #40
+.LCFI330:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .LVL930:
-.L1120:
+.L1109:
+.LCFI331:
+	.loc 2 1741 0
+	uxth	r1, r3
+.LVL931:
+	add	r1, r4, r1, lsl #1
+	ldrh	r0, [r1, #16]
+.LVL932:
+.L1108:
 	.loc 2 1739 0
 	cmp	r0, r2
-	uxth	r5, r3
+	uxth	r7, r3
 	add	r3, r3, #1
-	beq	.L1121
+	beq	.L1109
 	.loc 2 1746 0
-	movs	r1, #1
-.LVL931:
+	mov	r1, #1
+.LVL933:
 	bl	FtlGetLastWrittenPage
-.LVL932:
+.LVL934:
 	.loc 2 1754 0
-	adds	r7, r0, #1
+	cmn	r0, #1
 	.loc 2 1746 0
-	mov	r6, r0
-.LVL933:
+	mov	r5, r0
+.LVL935:
 	.loc 2 1754 0
-	beq	.L1122
-	.loc 2 1770 0
-	ldr	r3, [r4, #3148]
-	.loc 2 1771 0
-	movs	r2, #0
+	beq	.L1110
 	.loc 2 1766 0
-	ldrh	lr, [r4, #8]
+	ldrh	r3, [r6, #8]
+	.loc 2 1771 0
+	mov	r2, #0
+	.loc 2 1769 0
+	ldr	r0, [r6, #3792]
 	.loc 2 1768 0
-	movw	r9, #65535
+	movw	r8, #65535
+	.loc 2 1771 0
+	ldr	lr, [r6, #3152]
 	.loc 2 1769 0
-	ldr	r0, [r4, #3792]
-	mov	r10, #20
+	mov	r9, #20
+	.loc 2 1766 0
+	str	r3, [fp, #-56]
 	.loc 2 1770 0
-	str	r3, [sp, #4]
-	ldrh	r3, [r4, #86]
+	ldr	r3, [r6, #3148]
 	.loc 2 1771 0
-	ldr	r8, [r4, #3152]
-	ldrh	r7, [r4, #88]
-	mov	r4, r2
+	ldrh	r7, [r6, #88]
+	.loc 2 1770 0
+	str	r3, [fp, #-60]
+	ldrh	r3, [r6, #86]
+	.loc 2 1771 0
+	mov	r6, r2
 	.loc 2 1770 0
-	str	r3, [sp, #12]
-	add	r3, fp, #16
+	str	r3, [fp, #-68]
+	add	r3, r4, #16
 	.loc 2 1771 0
 	mov	ip, r3
-	str	r3, [sp, #20]
-.L1123:
+	str	r3, [fp, #-76]
+.L1111:
 	.loc 2 1766 0 discriminator 1
+	ldr	r1, [fp, #-56]
 	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L1129
+	cmp	r1, r3
+	bhi	.L1115
 	.loc 2 1777 0
-	ldr	r5, .L1248
-	.loc 2 1776 0
-	movs	r2, #0
-	mov	r1, r4
-	.loc 2 1715 0
-	movw	r9, #65535
+	ldr	r7, .L1232
 	.loc 2 1776 0
+	mov	r2, #0
+	mov	r1, r6
 	bl	FlashReadPages
-.LVL934:
+.LVL936:
 	.loc 2 1777 0
-	ldr	r3, [r5, #2520]
-	.loc 2 1791 0
-	uxth	r2, r6
+	ldr	r3, [r7, #2520]
+	.loc 2 1715 0
+	movw	r2, #65535
 	.loc 2 1779 0
-	ldr	r8, [r5, #3792]
+	ldr	r9, [r7, #3792]
+	.loc 2 1782 0
+	mov	r10, r7
+	.loc 2 1715 0
+	str	r2, [fp, #-72]
 	.loc 2 1791 0
-	str	r2, [sp, #12]
+	uxth	r2, r5
 	.loc 2 1777 0
-	subs	r3, r3, #1
-.LVL935:
-	str	r3, [sp, #4]
-	mov	r7, r8
+	sub	r3, r3, #1
+.LVL937:
+	str	r3, [fp, #-56]
+	mov	r8, r9
 	.loc 2 1778 0
-	movs	r3, #0
-.LVL936:
-.L1130:
+	mov	r3, #0
+.LVL938:
+	.loc 2 1791 0
+	str	r2, [fp, #-60]
+.L1116:
 	uxth	r2, r3
-.LVL937:
-	.loc 2 1778 0 is_stmt 0 discriminator 1
-	cmp	r4, r2
-	bhi	.L1135
-	.loc 2 1794 0 is_stmt 1
-	bne	.L1133
+.LVL939:
+	.loc 2 1778 0 discriminator 1
+	cmp	r6, r2
+	bhi	.L1121
 	.loc 2 1796 0
-	adds	r3, r6, #1
-	uxth	r3, r3
-.LVL938:
-	str	r3, [sp, #16]
-.L1242:
+	addeq	r3, r5, #1
+	uxtheq	r3, r3
+.LVL940:
+	streq	r3, [fp, #-60]
+	.loc 2 1794 0
+	bne	.L1119
+.L1226:
 	.loc 2 1802 0
-	ldr	r0, [r8, #4]
+	ldr	r0, [r9, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL939:
+.LVL941:
 	.loc 2 1807 0
-	ldrh	r3, [r5, #78]
-	ldr	r2, [sp, #16]
-.LVL940:
+	ldrh	r3, [r7, #78]
+	.loc 2 1813 0
+	sub	r1, fp, #68
+	.loc 2 1807 0
+	ldr	r2, [fp, #-60]
+.LVL942:
 	.loc 2 1802 0
-	str	r0, [sp, #12]
+	str	r0, [fp, #-68]
+	.loc 2 1813 0
+	ldr	r0, [fp, #-80]
+.LVL943:
 	.loc 2 1807 0
 	cmp	r3, r2
-	bne	.L1137
 	.loc 2 1808 0
-	ldrh	r3, [sp, #16]
-	strh	r3, [fp, #2]	@ movhi
+	ldrheq	r3, [fp, #-60]
+	strheq	r3, [r4, #2]	@ movhi
 	.loc 2 1809 0
-	movs	r3, #0
-	strb	r3, [fp, #6]
+	moveq	r3, #0
+	strbeq	r3, [r4, #6]
 	.loc 2 1810 0
-	strh	r3, [fp, #4]	@ movhi
-.L1137:
+	strheq	r3, [r4, #4]	@ movhi
 	.loc 2 1813 0
-	ldr	r3, [sp, #16]
-.LVL941:
-	ldr	r2, [sp, #8]
-.LVL942:
-	cmp	r3, r2
-	bne	.L1138
-	.loc 2 1813 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-.LVL943:
-	ldr	r2, [sp, #24]
+	ldm	r1, {r1, r2, r3}
 .LVL944:
 	cmp	r3, r2
-	bne	.L1138
-	.loc 2 1814 0 is_stmt 1
-	ldr	r1, [sp, #16]
-	mov	r2, r3
+	cmpeq	r1, r0
+	.loc 2 1814 0
+	moveq	r2, r1
 .LVL945:
-.L1247:
-	.loc 2 2053 0
-	mov	r0, fp
+	moveq	r1, r3
 .LVL946:
-	bl	ftl_sb_update_avl_pages
+	.loc 2 1813 0
+	beq	.L1231
+	.loc 2 1819 0
+	ldr	r2, [fp, #-72]
+	movw	r3, #65535
 .LVL947:
-	b	.L1241
+	cmp	r2, r3
+	bne	.L1125
+	.loc 2 1819 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1126
+.L1125:
+.LBB472:
+	.loc 2 1824 0 is_stmt 1
+	ldr	r3, [r7, #3964]
+	.loc 2 1823 0
+	uxth	r8, r5
+	.loc 2 1827 0
+	uxth	r5, r5
 .LVL948:
-.L1121:
-	.loc 2 1741 0
-	uxth	r1, r3
+	.loc 2 1824 0
+	cmn	r3, #1
+	.loc 2 1825 0
+	ldreq	r3, [fp, #-56]
 .LVL949:
-	adds	r1, r1, #8
-	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1120
+	streq	r3, [r7, #3964]
+	.loc 2 1827 0
+	ldr	r3, [fp, #-64]
 .LVL950:
-.L1122:
-	.loc 2 1755 0
-	ldr	r3, [sp, #8]
+	ldr	r7, .L1232
+	add	r3, r3, #7
 .LVL951:
-	cbz	r3, .L1124
+	cmp	r5, r3
+	.loc 2 1828 0
+	subgt	r5, r8, #7
+	ldrle	r5, [fp, #-64]
+	uxthgt	r5, r5
+.L1129:
+	.loc 2 1829 0 discriminator 1
+	cmp	r5, r8
+	bhi	.L1136
+	.loc 2 1834 0
+	mov	r3, #0
+	.loc 2 1831 0
+	ldrh	r9, [r7, #8]
+	.loc 2 1834 0
+	ldr	r0, [r7, #3792]
+.LVL952:
+	mov	r6, r3
+	ldr	r1, [fp, #-76]
+	.loc 2 1833 0
+	movw	lr, #65535
+	.loc 2 1834 0
+	mov	ip, #20
+	b	.L1137
+.LVL953:
+.L1110:
+.LBE472:
+	.loc 2 1755 0
+	ldr	r3, [fp, #-64]
+.LVL954:
+	cmp	r3, #0
+	beq	.L1112
 	.loc 2 1755 0 is_stmt 0 discriminator 1
 	movw	r2, #1755
-	ldr	r1, .L1248+4
-	ldr	r0, .L1248+8
+	ldr	r1, .L1232+4
+	ldr	r0, .L1232+8
 	bl	printk
-.LVL952:
-.L1124:
+.LVL955:
+.L1112:
 	.loc 2 1756 0 is_stmt 1
-	ldr	r3, [sp, #24]
-.LVL953:
-	cbz	r3, .L1125
+	ldr	r3, [fp, #-80]
+.LVL956:
+	cmp	r3, #0
+	cmpne	r7, r3
+	beq	.L1113
 	.loc 2 1756 0 is_stmt 0 discriminator 1
-	cmp	r5, r3
-	beq	.L1125
-	.loc 2 1756 0 discriminator 2
 	movw	r2, #1756
-	ldr	r1, .L1248+4
-	ldr	r0, .L1248+8
+	ldr	r1, .L1232+4
+	ldr	r0, .L1232+8
 	bl	printk
-.LVL954:
-.L1125:
+.LVL957:
+.L1113:
 	.loc 2 1757 0 is_stmt 1
-	movs	r3, #0
-.LVL955:
-	strh	r3, [fp, #2]	@ movhi
-	b	.L1246
-.L1129:
+	mov	r3, #0
+.LVL958:
+	strh	r3, [r4, #2]	@ movhi
+	b	.L1230
+.L1115:
 	.loc 2 1767 0
 	ldrh	r3, [ip], #2
 	.loc 2 1768 0
-	cmp	r3, r9
-	beq	.L1126
+	cmp	r3, r8
+	beq	.L1114
 	.loc 2 1769 0
-	mla	r1, r10, r4, r0
-	orr	r3, r6, r3, lsl #10
+	mla	r1, r9, r6, r0
+	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
 	.loc 2 1770 0
-	ldr	r3, [sp, #12]
-	muls	r3, r4, r3
-	it	mi
-	addmi	r3, r3, #3
+	ldr	r3, [fp, #-68]
+	mul	r3, r3, r6
+	add	r10, r3, #3
+	cmp	r3, #0
+	movlt	r3, r10
+	ldr	r10, [fp, #-60]
 	bic	r3, r3, #3
-	mov	r5, r3
-	ldr	r3, [sp, #4]
-	add	r5, r5, r3
-	.loc 2 1771 0
-	mov	r3, r7
-	muls	r3, r4, r3
-	.loc 2 1772 0
-	add	r4, r4, #1
+	add	r3, r10, r3
+	str	r3, [r1, #8]
 	.loc 2 1771 0
-	it	mi
-	addmi	r3, r3, #3
+	mul	r3, r7, r6
 	.loc 2 1772 0
-	uxth	r4, r4
+	add	r6, r6, #1
+	uxth	r6, r6
 	.loc 2 1771 0
+	add	r10, r3, #3
+	cmp	r3, #0
+	movlt	r3, r10
 	bic	r3, r3, #3
-	.loc 2 1770 0
-	str	r5, [r1, #8]
-	.loc 2 1771 0
-	add	r3, r3, r8
+	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1126:
-	adds	r2, r2, #1
-	b	.L1123
-.LVL956:
-.L1135:
+.L1114:
+	add	r2, r2, #1
+	b	.L1111
+.LVL959:
+.L1121:
 	.loc 2 1779 0
-	ldr	r2, [r7]
-.LVL957:
-	cbnz	r2, .L1131
+	ldr	r2, [r8]
+.LVL960:
+	cmp	r2, #0
+	bne	.L1117
 	.loc 2 1780 0
-	ldr	r10, [r7, #12]
+	ldr	ip, [r8, #12]
 	.loc 2 1781 0
-	ldr	r2, [r10, #4]
-	adds	r0, r2, #1
-	beq	.L1132
+	ldr	r2, [ip, #4]
+	cmn	r2, #1
+	beq	.L1118
 	.loc 2 1782 0
-	ldr	r1, [r5, #2520]
+	ldr	r1, [r10, #2520]
 	mov	r0, r2
+	str	ip, [fp, #-68]
 	bl	ftl_cmp_data_ver
-.LVL958:
-	cbz	r0, .L1132
+.LVL961:
+	ldr	ip, [fp, #-68]
+	cmp	r0, #0
 	.loc 2 1784 0
-	adds	r2, r2, #1
-	str	r2, [r5, #2520]
-.L1132:
+	addne	r2, r2, #1
+	strne	r2, [r10, #2520]
+.L1118:
 	.loc 2 1787 0
-	ldr	r2, [r10]
-	adds	r2, r2, #1
-	bne	.L1134
-.LVL959:
-.L1133:
+	ldr	r2, [ip]
+	cmn	r2, #1
+	bne	.L1120
+.LVL962:
+.L1119:
 	.loc 2 1801 0
-	uxth	r2, r6
-.LVL960:
+	uxth	r2, r5
+.LVL963:
 	.loc 2 1802 0
 	uxth	r3, r3
 	.loc 2 1801 0
-	str	r2, [sp, #16]
+	str	r2, [fp, #-60]
 	.loc 2 1802 0
-	movs	r2, #20
-.LVL961:
-	mla	r8, r2, r3, r8
-	b	.L1242
-.L1131:
-	.loc 2 1791 0
-	ldr	r9, [sp, #12]
-.L1134:
-	adds	r3, r3, #1
-	adds	r7, r7, #20
-	b	.L1130
-.LVL962:
-.L1138:
-	.loc 2 1819 0
-	movw	r3, #65535
-.LVL963:
-	cmp	r9, r3
-	bne	.L1139
-	.loc 2 1819 0 is_stmt 0 discriminator 1
-	ldrb	r3, [fp, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1140
-.L1139:
-.LBB473:
-	.loc 2 1824 0 is_stmt 1
-	ldr	r3, [r5, #3964]
-	.loc 2 1823 0
-	uxth	r8, r6
-	.loc 2 1827 0
-	uxth	r6, r6
+	mov	r2, #20
 .LVL964:
-	ldr	r7, .L1248
-	.loc 2 1833 0
-	movw	r9, #65535
-	.loc 2 1824 0
-	adds	r3, r3, #1
-	.loc 2 1825 0
-	itt	eq
-	ldreq	r3, [sp, #4]
+	mla	r9, r2, r3, r9
+	b	.L1226
+.L1117:
+	.loc 2 1791 0
+	ldr	r2, [fp, #-60]
+	str	r2, [fp, #-72]
+.L1120:
+	add	r3, r3, #1
+	add	r8, r8, #20
+	b	.L1116
 .LVL965:
-	streq	r3, [r5, #3964]
-	.loc 2 1827 0
-	ldr	r3, [sp, #8]
-.LVL966:
-	adds	r3, r3, #7
-.LVL967:
-	cmp	r6, r3
-	.loc 2 1828 0
-	itet	gt
-	subgt	r4, r8, #7
-	ldrle	r4, [sp, #8]
-	uxthgt	r4, r4
-.L1143:
-	.loc 2 1829 0 discriminator 1
-	cmp	r4, r8
-	bhi	.L1150
-	.loc 2 1834 0
-	movs	r3, #0
-	.loc 2 1831 0
-	ldrh	lr, [r7, #8]
-	.loc 2 1834 0
-	ldr	r0, [r7, #3792]
-	mov	r6, r3
-	ldr	r1, [sp, #20]
-	mov	ip, #20
-	b	.L1151
-.LVL968:
-.L1145:
+.L1131:
+.LBB473:
 	.loc 2 1832 0
 	ldrh	r2, [r1], #2
+	add	r3, r3, #1
 	.loc 2 1833 0
-	cmp	r2, r9
-	beq	.L1144
+	cmp	r2, lr
 	.loc 2 1834 0
-	mla	r10, ip, r6, r0
+	mlane	r10, ip, r6, r0
 	.loc 2 1835 0
-	adds	r6, r6, #1
+	addne	r6, r6, #1
 	.loc 2 1834 0
-	orr	r2, r4, r2, lsl #10
+	orrne	r2, r5, r2, lsl #10
 	.loc 2 1835 0
-	uxth	r6, r6
+	uxthne	r6, r6
 	.loc 2 1834 0
-	str	r2, [r10, #4]
-.L1144:
-	adds	r3, r3, #1
-.LVL969:
-.L1151:
+	strne	r2, [r10, #4]
+.L1137:
 	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
-.LVL970:
-	cmp	r2, lr
-	bcc	.L1145
+	cmp	r9, r2
+	bhi	.L1131
 	.loc 2 1838 0
-	movs	r2, #0
 	mov	r1, r6
+	mov	r2, #0
 	bl	FlashReadPages
-.LVL971:
+.LVL966:
 	.loc 2 1840 0
 	ldr	r3, [r7, #3792]
-	movs	r2, #20
+	mov	r2, #20
+	.loc 2 1842 0
+	movw	r1, #65535
 	mla	r6, r2, r6, r3
-.L1146:
+.L1132:
 	.loc 2 1839 0 discriminator 1
 	cmp	r6, r3
-	bne	.L1149
 	.loc 2 1829 0
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1143
-.L1149:
+	addeq	r5, r5, #1
+	uxtheq	r5, r5
+	beq	.L1129
+.L1135:
 	.loc 2 1840 0
 	ldr	r2, [r3]
-	cbnz	r2, .L1140
+	cmp	r2, #0
+	bne	.L1126
 	.loc 2 1841 0
 	ldr	r2, [r3, #12]
 	.loc 2 1842 0
-	ldrh	r1, [r2]
-	cmp	r1, r9
-	beq	.L1148
+	ldrh	r0, [r2]
+	cmp	r0, r1
+	beq	.L1134
 	.loc 2 1844 0
 	ldr	r2, [r2, #4]
-	adds	r1, r2, #1
+	cmn	r2, #1
 	.loc 2 1846 0
-	it	ne
 	strne	r2, [r7, #3964]
-.L1148:
-	adds	r3, r3, #20
-	b	.L1146
-.LVL972:
-.L1150:
+.L1134:
+	add	r3, r3, #20
+	b	.L1132
+.LVL967:
+.L1136:
 	.loc 2 1858 0
-	mov	r3, #-1
+	mvn	r3, #0
 	str	r3, [r7, #3964]
-.LVL973:
-.L1140:
+.LVL968:
+.L1126:
 .LBE473:
 	.loc 2 1863 0
-	movs	r3, #1
-	.loc 2 1864 0
-	ldr	r0, .L1248+12
-	.loc 2 1863 0
-	strh	r3, [r5, #3968]	@ movhi
+	ldr	r5, .L1232+12
+.LVL969:
+	mov	r3, #1
+	mov	r0, r5
+.LVL970:
 	.loc 2 1870 0
-	ldr	r4, .L1248
+	sub	r5, r5, #3968
+	.loc 2 1863 0
+	strh	r3, [r0], #-104	@ movhi
 	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL974:
-	ldr	r5, [sp, #8]
-.LVL975:
-.L1152:
+.LVL971:
+	ldr	r9, [fp, #-64]
+.LVL972:
+.L1138:
 	.loc 2 1870 0
-	ldrh	r6, [r4, #8]
-.LVL976:
-	movs	r3, #0
+	ldrh	ip, [r5, #8]
+	mov	r3, #0
 	.loc 2 1873 0
-	ldr	r0, [r4, #3792]
-.LVL977:
+	ldr	r0, [r5, #3792]
 	.loc 2 1869 0
 	mov	r10, r3
 	.loc 2 1870 0
-	ldr	r1, [sp, #20]
+	ldr	r1, [fp, #-76]
 	.loc 2 1872 0
-	movw	r7, #65535
+	movw	lr, #65535
 	.loc 2 1873 0
-	mov	ip, #20
-.L1153:
+	mov	r6, #20
+.LVL973:
+.L1139:
 	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
-.LVL978:
-	cmp	r6, r2
-	bhi	.L1155
+.LVL974:
+	cmp	ip, r2
+	bhi	.L1141
 	.loc 2 1877 0
-	movs	r2, #0
+	mov	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.LVL979:
+.LVL975:
 	.loc 2 1878 0
-	movs	r3, #0
-.LVL980:
-.L1245:
-	str	r3, [sp, #28]
+	mov	r3, #0
+.LVL976:
+.L1229:
+	str	r3, [fp, #-72]
 	.loc 2 1878 0 is_stmt 0 discriminator 2
-	ldrh	r3, [sp, #28]
+	ldrh	r3, [fp, #-72]
 	cmp	r10, r3
-	bhi	.L1185
+	bhi	.L1169
 	.loc 2 2031 0 is_stmt 1
-	adds	r5, r5, #1
+	add	r9, r9, #1
 	.loc 2 2032 0
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r5, #78]
 	.loc 2 2031 0
-	uxth	r5, r5
+	uxth	r9, r9
 	.loc 2 2032 0
-	cmp	r3, r5
-	bne	.L1152
+	cmp	r3, r9
+	bne	.L1138
 	.loc 2 2035 0
-	ldrh	r2, [r4, #8]
-.LVL981:
+	ldrh	r2, [r5, #8]
+.LVL977:
 	.loc 2 2037 0
 	movw	r0, #65535
-.LVL982:
 	.loc 2 2034 0
-	movs	r3, #0
+	mov	r3, #0
 	.loc 2 2033 0
-	strh	r5, [fp, #2]	@ movhi
+	strh	r9, [r4, #2]	@ movhi
 	.loc 2 2034 0
-	strh	r3, [fp, #4]	@ movhi
-.L1186:
+	strh	r3, [r4, #4]	@ movhi
+.L1170:
 	.loc 2 2035 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1241
+	bcs	.L1225
 	.loc 2 2036 0
-	ldr	r1, [sp, #20]
-	ldrh	r4, [r1], #2
+	ldr	r1, [fp, #-76]
+	ldrh	ip, [r1], #2
 	.loc 2 2037 0
-	cmp	r4, r0
+	cmp	ip, r0
 	.loc 2 2036 0
-	str	r1, [sp, #20]
+	str	r1, [fp, #-76]
 	add	r1, r3, #1
 	.loc 2 2037 0
-	bne	.L1246
+	bne	.L1230
 	mov	r3, r1
-	b	.L1186
-.LVL983:
-.L1155:
+	b	.L1170
+.LVL978:
+.L1141:
 	.loc 2 1871 0
 	ldrh	r2, [r1], #2
+	add	r3, r3, #1
 	.loc 2 1872 0
-	cmp	r2, r7
-	beq	.L1154
-	.loc 2 1873 0
-	mla	lr, ip, r10, r0
-	.loc 2 1874 0
-	add	r10, r10, #1
+	cmp	r2, lr
 	.loc 2 1873 0
-	orr	r2, r5, r2, lsl #10
+	mlane	r7, r6, r10, r0
+	orrne	r2, r9, r2, lsl #10
 	.loc 2 1874 0
-	uxth	r10, r10
+	addne	r10, r10, #1
+	uxthne	r10, r10
 	.loc 2 1873 0
-	str	r2, [lr, #4]
-.L1154:
-	adds	r3, r3, #1
-	b	.L1153
-.L1249:
-	.align	2
-.L1248:
-	.word	.LANCHOR0
-	.word	.LANCHOR1+421
-	.word	.LC1
-	.word	.LANCHOR0+3864
-.LVL984:
-.L1185:
-	ldr	r3, [sp, #28]
-	movs	r7, #20
+	strne	r2, [r7, #4]
+	b	.L1139
+.LVL979:
+.L1169:
+	ldr	r3, [fp, #-72]
+	mov	r7, #20
 	.loc 2 1879 0
-	ldr	r9, [r4, #3792]
-.LVL985:
-	muls	r7, r3, r7
-	add	r8, r9, r7
+	ldr	r2, [r5, #3792]
+.LVL980:
+	mul	r7, r7, r3
+	str	r2, [fp, #-84]
+	add	r8, r2, r7
 	ldr	r6, [r8, #4]
-.LVL986:
+.LVL981:
 	.loc 2 1880 0
 	ubfx	r0, r6, #10, #16
-.LVL987:
 	.loc 2 1879 0
-	str	r6, [sp, #44]
+	str	r6, [fp, #-44]
 	.loc 2 1880 0
 	bl	P2V_plane
-.LVL988:
+.LVL982:
 	.loc 2 1882 0
-	ldr	r3, [sp, #8]
-.LVL989:
-	cmp	r5, r3
-	bcc	.L1157
+	ldr	r3, [fp, #-64]
+.LVL983:
+	cmp	r9, r3
+	bcc	.L1143
 	.loc 2 1882 0 is_stmt 0 discriminator 1
-	bne	.L1158
-	.loc 2 1883 0 is_stmt 1
-	ldr	r3, [sp, #24]
-.LVL990:
-	cmp	r3, r0
-	bhi	.L1157
-.LVL991:
-.L1158:
+	ldr	r2, [fp, #-80]
+.LVL984:
+	.loc 2 1883 0 is_stmt 1 discriminator 1
+	moveq	r3, #1
+.LVL985:
+	movne	r3, #0
+	.loc 2 1882 0 discriminator 1
+	cmp	r2, r0
+	movls	r3, #0
+	andhi	r3, r3, #1
+	cmp	r3, #0
+	bne	.L1143
 	.loc 2 1886 0
-	ldr	r3, [sp, #16]
-.LVL992:
-	cmp	r5, r3
-	bne	.L1159
-	.loc 2 1886 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-.LVL993:
-	cmp	r3, r0
-	beq	.L1160
-.LVL994:
-.L1159:
-	.loc 2 1890 0 is_stmt 1
-	ldr	r3, [r9, r7]
-.LVL995:
-	adds	r3, r3, #1
-	beq	.L1161
+	ldr	r3, [fp, #-60]
+.LVL986:
+	ldr	r2, [fp, #-68]
+.LVL987:
+	cmp	r9, r3
+	cmpeq	r2, r0
+	beq	.L1144
+	.loc 2 1890 0
+	ldr	r2, [fp, #-84]
+.LVL988:
+	ldr	r3, [r2, r7]
+.LVL989:
+	cmn	r3, #1
+	beq	.L1145
 	.loc 2 1891 0
 	ldr	r8, [r8, #12]
 	.loc 2 1892 0
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1162
-.LVL996:
-.L1169:
+	beq	.L1146
+.LVL990:
+.L1153:
 .LBB474:
 	.loc 2 1925 0
-	ldrh	r0, [fp]
-.LVL997:
-.L1244:
+	ldrh	r0, [r4]
+.LVL991:
+.L1228:
 .LBE474:
 	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL998:
-.L1157:
-	ldr	r3, [sp, #28]
-.LVL999:
-	adds	r3, r3, #1
-	b	.L1245
-.LVL1000:
-.L1162:
+.LVL992:
+.L1143:
+	ldr	r3, [fp, #-72]
+.LVL993:
+	add	r3, r3, #1
+	b	.L1229
+.LVL994:
+.L1146:
 	.loc 2 1898 0
 	ldr	r3, [r8, #4]
-.LVL1001:
+.LVL995:
 	.loc 2 1899 0
-	adds	r6, r3, #1
+	cmn	r3, #1
 	.loc 2 1898 0
-	str	r3, [sp, #4]
+	str	r3, [fp, #-56]
 	.loc 2 1899 0
-	beq	.L1163
+	beq	.L1147
 	.loc 2 1900 0 discriminator 1
-	ldr	r1, [r4, #2520]
 	mov	r0, r3
-.LVL1002:
+	ldr	r1, [r5, #2520]
 	bl	ftl_cmp_data_ver
-.LVL1003:
+.LVL996:
 	.loc 2 1899 0 discriminator 1
-	cbz	r0, .L1163
-	.loc 2 1902 0
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-.LVL1004:
-	str	r3, [r4, #2520]
-.LVL1005:
-.L1163:
+	cmp	r0, #0
+	.loc 2 1902 0 discriminator 1
+	ldrne	r3, [fp, #-56]
+	addne	r3, r3, #1
+.LVL997:
+	strne	r3, [r5, #2520]
+.LVL998:
+.L1147:
 	.loc 2 1905 0
 	ldrh	r2, [r8]
 	movw	r3, #61589
-.LVL1006:
+.LVL999:
 	cmp	r2, r3
-	beq	.L1164
+	beq	.L1148
 	.loc 2 1905 0 is_stmt 0 discriminator 1
 	movw	r2, #1905
-	ldr	r1, .L1250
-	ldr	r0, .L1250+4
-.LVL1007:
+	ldr	r1, .L1232+4
+	ldr	r0, .L1232+8
 	bl	printk
-.LVL1008:
-.L1164:
+.LVL1000:
+.L1148:
 	.loc 2 1906 0 is_stmt 1
 	ldr	r6, [r8, #8]
-.LVL1009:
+.LVL1001:
 	.loc 2 1908 0
-	add	r1, sp, #40
+	sub	r1, fp, #48
 	.loc 2 1907 0
 	ldr	r3, [r8, #12]
 	.loc 2 1908 0
-	movs	r2, #0
+	mov	r2, #0
 	mov	r0, r6
-.LVL1010:
 	.loc 2 1907 0
-	str	r3, [sp, #36]
+	str	r3, [fp, #-52]
 	.loc 2 1908 0
 	bl	log2phys
-.LVL1011:
+.LVL1002:
 	.loc 2 1909 0
-	ldr	r1, [r4, #3964]
-	adds	r0, r1, #1
-	beq	.L1165
+	ldr	r1, [r5, #3964]
+	cmn	r1, #1
+	beq	.L1149
 	.loc 2 1910 0 discriminator 1
-	ldr	r0, [sp, #4]
+	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
-.LVL1012:
+.LVL1003:
 	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1165
+	beq	.L1149
 .LBB475:
 	.loc 2 1914 0
-	ldr	r3, [sp, #36]
-	adds	r2, r3, #1
-	beq	.L1166
+	ldr	r2, [fp, #-52]
+	cmn	r2, #1
+	beq	.L1150
 	.loc 2 1915 0
-	ldr	r0, [r4, #3792]
+	ldr	r0, [r5, #3792]
 	.loc 2 1917 0
-	movs	r2, #0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 2 1915 0
 	add	r0, r0, r7
 	.loc 2 1916 0
-	str	r3, [r0, #4]
+	str	r2, [r0, #4]
+	.loc 2 1917 0
+	mov	r2, #0
 	.loc 2 1915 0
 	ldr	r8, [r0, #12]
 	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1013:
+.LVL1004:
 	.loc 2 1930 0
-	ldr	r2, [r4, #3792]
+	ldr	r2, [r5, #3792]
 	ldr	r1, [r2, r7]
-	adds	r3, r2, r7
-	adds	r1, r1, #1
-	bne	.L1167
-.LVL1014:
-.L1168:
+	add	r3, r2, r7
+	cmn	r1, #1
+	bne	.L1151
+.LVL1005:
+.L1152:
 	.loc 2 1962 0
-	mov	r3, #-1
-.LVL1015:
+	mvn	r3, #0
+.LVL1006:
 	.loc 2 1963 0
-	ldrh	r0, [fp]
+	ldrh	r0, [r4]
 	.loc 2 1962 0
-	str	r3, [sp, #36]
+	str	r3, [fp, #-52]
 	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1016:
-.L1176:
+.LVL1007:
+.L1160:
 .LBE475:
 	.loc 2 2003 0
-	ldr	r0, [sp, #36]
-	adds	r1, r0, #1
-	beq	.L1157
-.L1189:
+	ldr	r7, [fp, #-52]
+	cmn	r7, #1
+	beq	.L1143
+.L1173:
 	.loc 2 2005 0
-	ubfx	r0, r0, #10, #16
+	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1017:
+.LVL1008:
 	.loc 2 2006 0
-	ldrh	r3, [r4, #16]
+	ldrh	r3, [r5, #16]
 	.loc 2 2005 0
 	mov	r6, r0
-.LVL1018:
+.LVL1009:
 	.loc 2 2006 0
 	cmp	r3, r0
-	bhi	.L1181
+	bhi	.L1165
 	.loc 2 2006 0 is_stmt 0 discriminator 1
 	movw	r2, #2006
-	ldr	r1, .L1250
-	ldr	r0, .L1250+4
+	ldr	r1, .L1232+4
+	ldr	r0, .L1232+8
 	bl	printk
-.LVL1019:
-.L1181:
+.LVL1010:
+.L1165:
 	.loc 2 2007 0 is_stmt 1
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r6, lsl #1]
+	ldr	r2, [r5, #2300]
+	lsl	r3, r6, #1
+	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1182
+	beq	.L1166
 	.loc 2 2009 0
 	mov	r0, r6
-	b	.L1244
-.LVL1020:
-.L1166:
+	b	.L1228
+.LVL1011:
+.L1150:
 .LBB476:
 	.loc 2 1921 0
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
+	ldr	r3, [fp, #-44]
+.LVL1012:
+	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	bne	.L1169
+	bne	.L1153
 	.loc 2 1922 0
-	movs	r2, #1
-	add	r1, sp, #36
+	mov	r2, #1
+	sub	r1, fp, #52
 	mov	r0, r6
 	bl	log2phys
-.LVL1021:
-	b	.L1169
-.L1167:
+.LVL1013:
+	b	.L1153
+.L1151:
 	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1168
+	bne	.L1152
 	.loc 2 1918 0 discriminator 2
-	ldr	r9, [r8, #4]
-.LVL1022:
+	ldr	r1, [r8, #4]
+.LVL1014:
+	.loc 2 1931 0 discriminator 2
+	ldr	r0, [r5, #3964]
+	.loc 2 1918 0 discriminator 2
+	str	r1, [fp, #-84]
 	.loc 2 1931 0 discriminator 2
-	ldr	r0, [r4, #3964]
-	mov	r1, r9
 	bl	ftl_cmp_data_ver
-.LVL1023:
+.LVL1015:
 	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1168
+	beq	.L1152
 	.loc 2 1932 0
-	ldr	r1, [sp, #40]
-	ldr	r0, [sp, #44]
+	ldr	r1, [fp, #-48]
+.LVL1016:
+	ldr	r0, [fp, #-44]
+.LVL1017:
 	cmp	r1, r0
-	bne	.L1171
-.LVL1024:
-.L1174:
+	bne	.L1155
+.LVL1018:
+.L1158:
 	.loc 2 1958 0
-	ldr	r1, [sp, #36]
+	ldr	r1, [fp, #-52]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-.LVL1025:
-	b	.L1168
-.LVL1026:
-.L1171:
+.LVL1019:
+	b	.L1152
+.L1155:
 	.loc 2 1935 0
-	ldr	r0, [sp, #36]
-.LVL1027:
+	ldr	r0, [fp, #-52]
+.LVL1020:
 	cmp	r1, r0
-	beq	.L1168
+	beq	.L1152
 	.loc 2 1936 0
-	adds	r0, r1, #1
-	beq	.L1172
+	cmn	r1, #1
+	.loc 2 1941 0
+	streq	r1, [r2, r7]
+	.loc 2 1936 0
+	beq	.L1157
 	.loc 2 1938 0
 	str	r1, [r3, #4]
 	.loc 2 1939 0
-	movs	r2, #0
-	movs	r1, #1
+	mov	r2, #0
+	mov	r1, #1
 	mov	r0, r3
 	.loc 2 1937 0
 	ldr	r8, [r3, #12]
 	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1028:
-.L1173:
+.LVL1021:
+.L1157:
 	.loc 2 1944 0
-	ldr	r3, [r4, #3792]
-	ldr	r3, [r3, r7]
-	adds	r3, r3, #1
-	beq	.L1174
+	ldr	r2, [r5, #3792]
+	ldr	r2, [r2, r7]
+	cmn	r2, #1
+	beq	.L1158
 	.loc 2 1945 0
 	ldr	r3, [r8, #4]
-.LVL1029:
+.LVL1022:
 	.loc 2 1946 0
-	ldr	r0, [r4, #3964]
+	ldr	r0, [r5, #3964]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
-.LVL1030:
+.LVL1023:
 	cmp	r0, #0
-	beq	.L1174
+	beq	.L1158
 	.loc 2 1947 0
 	mov	r1, r3
-	mov	r0, r9
+	ldr	r0, [fp, #-84]
 	bl	ftl_cmp_data_ver
-.LVL1031:
+.LVL1024:
 	cmp	r0, #0
-	beq	.L1168
-	b	.L1174
-.LVL1032:
-.L1172:
-	.loc 2 1941 0
-	str	r1, [r2, r7]
-	b	.L1173
-.LVL1033:
-.L1165:
+	beq	.L1152
+	b	.L1158
+.LVL1025:
+.L1149:
 .LBE476:
 	.loc 2 1964 0
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
+	ldr	r3, [fp, #-44]
+.LVL1026:
+	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	beq	.L1176
+	beq	.L1160
 	.loc 2 1966 0
-	movs	r2, #1
-	add	r1, sp, #44
+	mov	r2, #1
+	sub	r1, fp, #44
 	mov	r0, r6
 	bl	log2phys
-.LVL1034:
+.LVL1027:
 	.loc 2 1967 0
-	ldr	r8, [sp, #40]
-	cmp	r8, #-1
-	beq	.L1176
+	ldr	r7, [fp, #-48]
+	cmn	r7, #1
+	beq	.L1160
 	.loc 2 1967 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #36]
-	cmp	r8, r3
-	beq	.L1179
+	ldr	r3, [fp, #-52]
+	cmp	r7, r3
+	beq	.L1173
 	.loc 2 1968 0 is_stmt 1
-	ubfx	r0, r8, #10, #16
+	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1035:
+.LVL1028:
 	.loc 2 1970 0
-	ldrh	r3, [r4, #2324]
-	cmp	r3, r0
-	beq	.L1180
+	ldr	r3, .L1232+16
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	beq	.L1164
 	.loc 2 1970 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
-	cmp	r3, r0
-	beq	.L1180
+	ldrh	r2, [r3, #48]
+	cmp	r2, r0
+	beq	.L1164
 	.loc 2 1971 0 is_stmt 1
-	ldrh	r3, [r4, #2420]
+	ldrh	r3, [r3, #96]
 	cmp	r3, r0
-	bne	.L1176
-.L1180:
+	bne	.L1160
+.L1164:
 .LBB477:
 	.loc 2 1976 0
-	ldr	r0, [r4, #3792]
+	ldr	r0, [r5, #3792]
 	.loc 2 1979 0
-	movs	r2, #0
-	movs	r1, #1
+	mov	r2, #0
+	mov	r1, #1
 	.loc 2 1978 0
-	str	r8, [r0, #4]
+	str	r7, [r0, #4]
 	.loc 2 1976 0
-	ldr	r7, [r0, #12]
+	ldr	r8, [r0, #12]
 	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1036:
+.LVL1029:
 	.loc 2 1982 0
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r5, #3792]
 	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L1176
+	cmn	r3, #1
+	beq	.L1160
 	.loc 2 1983 0
-	ldr	r1, [r7, #4]
-	ldr	r0, [sp, #4]
+	ldr	r1, [r8, #4]
+	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
-.LVL1037:
+.LVL1030:
 	cmp	r0, #0
-	bne	.L1176
+	bne	.L1160
 	.loc 2 1990 0
-	movs	r2, #1
-	add	r1, sp, #40
+	mov	r2, #1
+	sub	r1, fp, #48
 	mov	r0, r6
 	bl	log2phys
-.LVL1038:
-	b	.L1176
-.LVL1039:
-.L1182:
+.LVL1031:
+	b	.L1160
+.LVL1032:
+.L1166:
 .LBE477:
 	.loc 2 2011 0
 	mov	r1, r6
-	ldr	r0, .L1250+8
+	ldr	r0, .L1232+20
 	bl	printk
-.LVL1040:
-	b	.L1157
-.LVL1041:
-.L1161:
+.LVL1033:
+	b	.L1143
+.LVL1034:
+.L1145:
 	.loc 2 2018 0
-	ldr	r3, [r4, #3972]
+	ldr	r3, [r5, #3972]
 	cmp	r3, #31
 	.loc 2 2019 0
-	itttt	ls
-	addls	r2, r4, r3, lsl #2
+	addls	r2, r5, r3, lsl #2
 	.loc 2 2020 0
 	addls	r3, r3, #1
-	strls	r3, [r4, #3972]
+	strls	r3, [r5, #3972]
 	.loc 2 2019 0
 	strls	r6, [r2, #3976]
 	.loc 2 2022 0
-	ldrh	r0, [fp]
-.LVL1042:
+	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1043:
+.LVL1035:
 	.loc 2 2024 0
-	ldr	r3, [r4, #3964]
-	adds	r2, r3, #1
-	bne	.L1184
+	ldr	r3, [r5, #3964]
+	cmn	r3, #1
 	.loc 2 2025 0
-	ldr	r3, [sp, #4]
-.LVL1044:
-.L1243:
-	.loc 2 2027 0
-	str	r3, [r4, #3964]
-	b	.L1157
-.LVL1045:
-.L1184:
+	ldreq	r3, [fp, #-56]
+.LVL1036:
+	.loc 2 2024 0
+	beq	.L1227
 	.loc 2 2026 0
-	ldr	r2, [sp, #4]
-.LVL1046:
+	ldr	r2, [fp, #-56]
+.LVL1037:
 	cmp	r2, r3
-	bcs	.L1157
+	bcs	.L1143
 	.loc 2 2027 0
 	mov	r3, r2
-.LVL1047:
-	b	.L1243
-.LVL1048:
-.L1160:
+.LVL1038:
+.L1227:
+	str	r3, [r5, #3964]
+	b	.L1143
+.LVL1039:
+.L1144:
 	.loc 2 2051 0
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-.LVL1049:
+	ldrb	r3, [fp, #-68]	@ zero_extendqisi2
+.LVL1040:
 	.loc 2 2053 0
-	mov	r1, r5
+	ldr	r2, [fp, #-68]
+.LVL1041:
+	ldr	r1, [fp, #-60]
+	.loc 2 2051 0
+	strb	r3, [r4, #6]
 	.loc 2 2052 0
-	strh	r5, [fp, #2]	@ movhi
+	ldrh	r3, [fp, #-60]
+	strh	r3, [r4, #2]	@ movhi
+.LVL1042:
+.L1231:
 	.loc 2 2053 0
-	ldr	r2, [sp, #12]
-	.loc 2 2051 0
-	strb	r3, [fp, #6]
-	b	.L1247
-.LVL1050:
-.L1179:
-	.loc 2 2003 0
-	mov	r0, r8
-	b	.L1189
-.L1251:
+	mov	r0, r4
+.LVL1043:
+	bl	ftl_sb_update_avl_pages
+.LVL1044:
+	b	.L1225
+.L1233:
 	.align	2
-.L1250:
+.L1232:
+	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
+	.word	.LANCHOR0+3968
+	.word	.LANCHOR0+2324
 	.word	.LC98
 .LFE231:
-	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.align	1
+	.align	2
 	.global	FtlSuperblockPowerLostFix
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-	.fnstart
 .LFB238:
 	.loc 2 2205 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1051:
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI145:
-	.pad #24
-	sub	sp, sp, #24
-.LCFI146:
-	.loc 2 2212 0
-	ldr	r4, .L1263
+	@ args = 0, pretend = 0, frame = 20
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1045:
+	mov	ip, sp
+.LCFI332:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI333:
+	sub	fp, ip, #4
+.LCFI334:
+	sub	sp, sp, #20
 	.loc 2 2211 0
-	mov	r3, #-1
+	mvn	r3, #0
+	str	r3, [fp, #-36]
 	.loc 2 2219 0
-	mov	r8, #0
+	mov	r7, #0
+	.loc 2 2212 0
+	ldr	r3, .L1245
 	.loc 2 2220 0
 	movw	r1, #61589
-	.loc 2 2211 0
-	str	r3, [sp, #20]
 	.loc 2 2205 0
-	mov	r5, r0
-	.loc 2 2212 0
-	ldr	r2, [r4, #3240]
+	mov	r4, r0
 	.loc 2 2223 0
-	movs	r7, #7
+	mov	r6, #7
+	.loc 2 2212 0
+	ldr	r2, [r3, #3240]
+	mov	r8, r3
 	.loc 2 2213 0
-	ldr	r6, [r4, #3244]
+	ldr	r5, [r3, #3244]
 	.loc 2 2212 0
-	str	r2, [sp, #12]
+	str	r2, [fp, #-44]
 	.loc 2 2216 0
 	mvn	r2, #2
 	.loc 2 2213 0
-	str	r6, [sp, #16]
+	str	r5, [fp, #-40]
 	.loc 2 2216 0
-	str	r2, [r6, #8]
+	str	r2, [r5, #8]
 	.loc 2 2217 0
 	mvn	r2, #1
-	str	r2, [r6, #12]
+	str	r2, [r5, #12]
 	.loc 2 2218 0
 	ldrh	r2, [r0]
 	.loc 2 2219 0
-	strh	r8, [r6]	@ movhi
+	strh	r7, [r5]	@ movhi
 	.loc 2 2218 0
-	strh	r2, [r6, #2]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
 	.loc 2 2220 0
-	ldr	r2, [r4, #3240]
+	ldr	r2, [r3, #3240]
 	str	r1, [r2]
 	.loc 2 2221 0
-	add	r1, r1, #304087040
-	ldr	r2, [r4, #3240]
-	add	r1, r1, #1269760
-	addw	r1, r1, #1507
+	ldr	r1, .L1245+4
+	ldr	r2, [r3, #3240]
 	str	r1, [r2, #4]
-.L1253:
+.L1235:
 	.loc 2 2223 0
-	subs	r7, r7, #1
-	beq	.L1255
-.LVL1052:
+	subs	r6, r6, #1
+	beq	.L1237
+.LVL1046:
 	.loc 2 2224 0
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1254
-.L1255:
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1236
+.L1237:
 	.loc 2 2234 0
-	ldr	r2, [r4, #2300]
-	ldrh	r1, [r5]
-	ldrh	r0, [r5, #4]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	ldr	r1, [r8, #2300]
+	ldrh	r0, [r4, #4]
+	lsl	r3, r3, #1
+	ldrh	r2, [r1, r3]
+	sub	r2, r2, r0
+	strh	r2, [r1, r3]	@ movhi
 	.loc 2 2235 0
-	ldrh	r3, [r4, #78]
-	strh	r3, [r5, #2]	@ movhi
+	ldrh	r3, [r8, #78]
+	strh	r3, [r4, #2]	@ movhi
 	.loc 2 2236 0
-	movs	r3, #0
-	strb	r3, [r5, #6]
+	mov	r3, #0
+	strb	r3, [r4, #6]
 	.loc 2 2237 0
-	strh	r3, [r5, #4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
 	.loc 2 2238 0
-	add	sp, sp, #24
-.LCFI147:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1053:
-.L1254:
-.LCFI148:
+	sub	sp, fp, #32
+.LCFI335:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL1047:
+.L1236:
+.LCFI336:
 	.loc 2 2226 0
-	mov	r0, r5
+	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1054:
-	str	r0, [sp, #8]
+.LVL1048:
 	.loc 2 2227 0
-	adds	r0, r0, #1
-	beq	.L1255
+	cmn	r0, #1
+	.loc 2 2226 0
+	str	r0, [fp, #-48]
+	.loc 2 2227 0
+	beq	.L1237
 	.loc 2 2229 0
-	ldr	r3, [r4, #2520]
+	ldr	r3, [r8, #2520]
 	.loc 2 2230 0
-	movs	r1, #1
-	add	r0, sp, #4
+	mov	r1, #1
+	sub	r0, fp, #52
 	.loc 2 2229 0
-	str	r3, [r6, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, r8
-	str	r3, [r4, #2520]
+	str	r3, [r5, #4]
+	add	r3, r3, #1
+	cmn	r3, #1
+	moveq	r3, r7
+	str	r3, [r8, #2520]
 	.loc 2 2230 0
-	movs	r3, #0
+	mov	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1055:
+.LVL1049:
 	.loc 2 2231 0
-	ldrh	r0, [r5]
+	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1056:
-	b	.L1253
-.L1264:
+.LVL1050:
+	b	.L1235
+.L1246:
 	.align	2
-.L1263:
+.L1245:
 	.word	.LANCHOR0
+	.word	305419896
 .LFE238:
-	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.align	1
+	.align	2
 	.global	FtlLoadBbt
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-	.fnstart
 .LFB179:
 	.loc 4 173 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-.LCFI149:
-	.loc 4 196 0
-	movw	r8, #61649
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI337:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI338:
+	sub	fp, ip, #4
+.LCFI339:
 	.loc 4 180 0
-	ldr	r4, .L1294
-	ldr	r3, [r4, #3240]
+	ldr	r4, .L1279
 	.loc 4 186 0
-	addw	r7, r4, #3220
+	ldr	r7, .L1279+4
+	.loc 4 180 0
+	ldr	r3, [r4, #3240]
 	.loc 4 181 0
 	ldr	r6, [r4, #3244]
 	.loc 4 180 0
@@ -13068,54 +13145,55 @@ FtlLoadBbt:
 	str	r6, [r4, #3232]
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1057:
+.LVL1051:
 	.loc 4 184 0
 	ldrh	r5, [r4, #74]
-	subs	r5, r5, #1
+	sub	r5, r5, #1
 	uxth	r5, r5
-.LVL1058:
-.L1266:
+.LVL1052:
+.L1248:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #74]
-	subs	r3, r3, #16
+	sub	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1269
+	ble	.L1251
 	.loc 4 185 0 is_stmt 1
-	lsls	r3, r5, #10
+	lsl	r3, r5, #10
 	.loc 4 186 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 185 0
 	str	r3, [r4, #3224]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1059:
+.LVL1053:
 	.loc 4 187 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	bne	.L1267
+	cmn	r3, #1
+	bne	.L1249
 	.loc 4 188 0
 	ldr	r3, [r4, #3224]
 	.loc 4 189 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 188 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #3224]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1060:
-.L1267:
+.LVL1054:
+.L1249:
 	.loc 4 191 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	beq	.L1268
+	cmn	r3, #1
+	beq	.L1250
 	.loc 4 196 0
-	ldrh	r3, [r6]
-	cmp	r3, r8
-	bne	.L1268
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1250
 	.loc 4 199 0
 	ldr	r3, [r6, #4]
 	.loc 4 198 0
@@ -13125,78 +13203,74 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #132]	@ movhi
-.L1269:
+.L1251:
 	.loc 4 216 0
 	ldrh	r3, [r4, #128]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1283
+	beq	.L1265
 	.loc 4 222 0
 	ldrh	r3, [r4, #132]
 	cmp	r3, r2
-	beq	.L1273
+	beq	.L1255
 	.loc 4 224 0
-	lsls	r3, r3, #10
+	lsl	r3, r3, #10
 	.loc 4 225 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1294+4
+	ldr	r0, .L1279+4
 	.loc 4 224 0
 	str	r3, [r4, #3224]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1061:
+.LVL1055:
 	.loc 4 226 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	beq	.L1273
+	cmn	r3, #1
+	beq	.L1255
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1273
+	bne	.L1255
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #136]
 	cmp	r3, r2
-	bls	.L1273
-	.loc 4 231 0 is_stmt 1
-	ldrh	r2, [r4, #132]
-	.loc 4 232 0
-	str	r3, [r4, #136]
-	.loc 4 233 0
-	ldrh	r3, [r6, #8]
-	.loc 4 231 0
-	strh	r2, [r4, #128]	@ movhi
-	.loc 4 233 0
-	strh	r3, [r4, #132]	@ movhi
-.L1273:
+	.loc 4 231 0 is_stmt 1 discriminator 1
+	ldrhhi	r2, [r4, #132]
+	.loc 4 232 0 discriminator 1
+	strhi	r3, [r4, #136]
+	.loc 4 233 0 discriminator 1
+	ldrhhi	r3, [r6, #8]
+	.loc 4 231 0 discriminator 1
+	strhhi	r2, [r4, #128]	@ movhi
+	.loc 4 233 0 discriminator 1
+	strhhi	r3, [r4, #132]	@ movhi
+.L1255:
 	.loc 4 245 0
-	ldr	r7, .L1294+4
+	ldr	r7, .L1279+4
 	.loc 4 238 0
-	movs	r1, #1
+	mov	r1, #1
 	ldrh	r0, [r4, #128]
-	.loc 4 247 0
-	movw	r8, #61649
-	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1062:
+.LVL1056:
 	sxth	r5, r0
-.LVL1063:
+.LVL1057:
 	.loc 4 239 0
-	adds	r0, r0, #1
+	add	r0, r0, #1
 	strh	r0, [r4, #130]	@ movhi
-.L1275:
+.L1257:
 	.loc 4 241 0
 	cmp	r5, #0
-	bge	.L1278
+	bge	.L1260
 	.loc 4 254 0
-	movs	r2, #254
-	ldr	r1, .L1294+8
-	ldr	r0, .L1294+12
+	mov	r2, #254
+	ldr	r1, .L1279+8
+	ldr	r0, .L1279+12
 	bl	printk
-.LVL1064:
-.L1277:
+.LVL1058:
+.L1259:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -13206,49 +13280,50 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1280
+	beq	.L1262
 	.loc 4 259 0
 	ldr	r2, [r4, #4]
 	cmp	r0, r2
-	beq	.L1280
+	beq	.L1262
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L1280
-	.loc 4 261 0 is_stmt 1
+	lsr	r3, r3, #2
+	.loc 4 261 0 is_stmt 1 discriminator 1
 	cmp	r0, r3
-	bcs	.L1280
+	cmpcc	r2, r3
+	bcs	.L1262
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1065:
-.L1280:
-	ldr	r6, .L1294+16
+.LVL1059:
+.L1262:
+	ldr	r6, .L1279+16
 	.loc 4 173 0 discriminator 1
-	movs	r5, #0
-.LVL1066:
-.L1281:
+	mov	r5, #0
+.LVL1060:
+	.loc 4 269 0 discriminator 1
+	ldr	r7, .L1279+20
+.L1263:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r4, #30]
 	cmp	r5, r3
-	bcc	.L1282
+	bcc	.L1264
 	.loc 4 275 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1067:
-.L1268:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.LVL1061:
+.L1250:
 	.loc 4 184 0 discriminator 2
-	subs	r5, r5, #1
-.LVL1068:
+	sub	r5, r5, #1
+.LVL1062:
 	uxth	r5, r5
-.LVL1069:
-	b	.L1266
-.LVL1070:
-.L1278:
+.LVL1063:
+	b	.L1248
+.LVL1064:
+.L1260:
 	.loc 4 243 0
 	ldrh	r3, [r4, #128]
 	.loc 4 245 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	.loc 4 243 0
@@ -13259,221 +13334,225 @@ FtlLoadBbt:
 	str	r3, [r4, #3228]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1071:
+.LVL1065:
 	.loc 4 247 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	beq	.L1276
+	cmn	r3, #1
+	beq	.L1258
 	.loc 4 247 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r6]
-	cmp	r3, r8
-	beq	.L1277
-.L1276:
-	subs	r5, r5, #1
-.LVL1072:
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1259
+.L1258:
+	sub	r5, r5, #1
+.LVL1066:
 	sxth	r5, r5
-.LVL1073:
-	b	.L1275
-.LVL1074:
-.L1282:
+.LVL1067:
+	b	.L1257
+.LVL1068:
+.L1264:
 	.loc 4 269 0 is_stmt 1 discriminator 3
-	ldrh	r2, [r4, #3860]
+	ldrh	r2, [r7]
 	ldr	r1, [r4, #3228]
 	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
+	lsl	r2, r2, #2
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
-	adds	r5, r5, #1
+	add	r5, r5, #1
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1075:
-	b	.L1281
-.LVL1076:
-.L1283:
+.LVL1069:
+	b	.L1263
+.LVL1070:
+.L1265:
 	.loc 4 218 0
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1077:
-.L1295:
+	mvn	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1280:
 	.align	2
-.L1294:
+.L1279:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3220
 	.word	.LANCHOR1+443
 	.word	.LC1
 	.word	.LANCHOR0+152
+	.word	.LANCHOR0+3860
 .LFE179:
-	.fnend
 	.size	FtlLoadBbt, .-FtlLoadBbt
-	.align	1
+	.align	2
 	.global	FtlMakeBbt
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-	.fnstart
 .LFB181:
 	.loc 4 317 0
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI150:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI340:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI341:
+	sub	fp, ip, #4
+.LCFI342:
+	sub	sp, sp, #4
 	.loc 4 327 0
-	mov	r8, #0
-.LVL1078:
-	ldr	r9, .L1315+4
+	mov	r7, #0
+.LVL1071:
+	ldr	r8, .L1300
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1079:
-	.loc 4 327 0
-	sub	r5, r9, #156
-	sub	r10, r9, #18
-	mov	r4, r5
+.LVL1072:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1080:
-.L1297:
-	.loc 4 327 0 discriminator 1
+.LVL1073:
+	.loc 4 327 0
+	sub	r5, r8, #156
+	sub	r9, r8, #18
+	mov	r4, r5
+.L1282:
+	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r5, #30]
-	cmp	r8, r3
-	bcc	.L1303
-	movs	r5, #0
-.L1304:
-	.loc 4 381 0 discriminator 1
-	ldrh	r3, [r4, #90]
-	uxth	r0, r5
-	adds	r5, r5, #1
-	cmp	r3, r0
-	bhi	.L1305
+	cmp	r7, r3
+	bcc	.L1288
+	mov	r0, #0
+.L1289:
+	.loc 4 381 0 is_stmt 1 discriminator 1
+	ldrh	r2, [r4, #90]
+	uxth	r3, r0
+	add	r5, r0, #1
+	cmp	r2, r3
+	bhi	.L1290
 	.loc 4 387 0
 	ldrh	r5, [r4, #140]
 	.loc 4 396 0
 	movw	r6, #65535
 	.loc 4 387 0
-	subs	r5, r5, #1
+	sub	r5, r5, #1
 	uxth	r5, r5
-.L1306:
+.L1291:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #140]
-	subs	r3, r3, #48
+	sub	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1310
+	ble	.L1295
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1081:
+.LVL1074:
 	cmp	r0, #1
-	beq	.L1307
+	beq	.L1292
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1082:
+.LVL1075:
 	cmp	r0, #0
-	beq	.L1308
+	beq	.L1293
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1083:
-.L1307:
+.LVL1076:
+.L1292:
 	.loc 4 387 0 discriminator 2
-	subs	r5, r5, #1
+	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1306
-.L1303:
+	b	.L1291
+.L1288:
 	.loc 4 331 0
-	ldrh	r3, [r10, #2]!
+	ldrh	r3, [r9, #2]!
 	movw	r2, #65535
 	.loc 4 328 0
 	ldr	r0, [r5, #3240]
 	.loc 4 329 0
-	ldr	fp, [r5, #3244]
+	ldr	r10, [r5, #3244]
 	.loc 4 331 0
 	cmp	r3, r2
 	.loc 4 328 0
 	str	r0, [r5, #3228]
 	.loc 4 329 0
-	str	fp, [r5, #3232]
+	str	r10, [r5, #3232]
 	.loc 4 331 0
-	beq	.L1298
+	beq	.L1283
 	.loc 4 333 0
-	ldrh	r7, [r5, #74]
-.LVL1084:
+	ldrh	ip, [r5, #74]
 	.loc 4 335 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1315
+	ldr	r0, .L1300+4
 	.loc 4 333 0
-	mla	r7, r8, r7, r3
-.LVL1085:
+	mla	ip, r7, ip, r3
+.LVL1077:
 	.loc 4 334 0
-	lsls	r3, r7, #10
+	lsl	r3, ip, #10
+	str	ip, [fp, #-44]
 	str	r3, [r5, #3224]
 	.loc 4 335 0
 	bl	FlashReadPages
-.LVL1086:
+.LVL1078:
 	.loc 4 336 0
 	ldrh	r2, [r5, #74]
 	ldr	r1, [r5, #3228]
-	ldr	r0, [r9]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
+	ldr	r0, [r8]
+	add	r2, r2, #7
+	asr	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1087:
-.L1299:
+.LVL1079:
+	ldr	ip, [fp, #-44]
+.LVL1080:
+.L1284:
 	.loc 4 376 0 discriminator 2
-	uxth	r0, r7
+	uxth	r0, ip
 	.loc 4 327 0 discriminator 2
-	add	r8, r8, #1
-	add	r9, r9, #4
+	add	r7, r7, #1
+	add	r8, r8, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1088:
-	b	.L1297
-.L1298:
+.LVL1081:
+	b	.L1282
+.L1283:
 	.loc 4 340 0
-	mov	r1, r8
+	mov	r1, r7
 	bl	FlashGetBadBlockList
-.LVL1089:
+.LVL1082:
 	.loc 4 341 0
-	ldr	r1, [r9]
+	ldr	r1, [r8]
 	ldr	r0, [r5, #3228]
 	bl	FtlBbt2Bitmap
-.LVL1090:
+.LVL1083:
 	.loc 4 343 0
 	ldrh	r6, [r5, #74]
-.L1301:
+.L1286:
 	.loc 4 347 0
-	subs	r6, r6, #1
+	sub	r6, r6, #1
 	uxth	r6, r6
-.L1300:
+.L1285:
 	.loc 4 345 0
 	ldrh	r0, [r4, #74]
-	smlabb	r0, r0, r8, r6
+	smlabb	r0, r0, r7, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1091:
+.LVL1084:
 	cmp	r0, #1
-	beq	.L1301
+	beq	.L1286
 .LBB488:
 .LBB489:
 .LBB490:
 	.loc 1 202 0
-	movs	r1, #16
+	mov	r1, #16
 	ldr	r0, [r4, #3244]
 .LBE490:
 .LBE489:
 .LBE488:
 	.loc 4 349 0
-	strh	r6, [r10]	@ movhi
+	strh	r6, [r9]	@ movhi
 .LBB493:
 .LBB492:
 .LBB491:
 	.loc 1 202 0
 	bl	__memzero
-.LVL1092:
+.LVL1085:
 .LBE491:
 .LBE492:
 .LBE493:
@@ -13483,115 +13562,118 @@ FtlMakeBbt:
 	mov	r1, #4096
 	ldr	r0, [r4, #3240]
 	bl	__memzero
-.LVL1093:
+.LVL1086:
 .LBE496:
 .LBE495:
 .LBE494:
 	.loc 4 352 0
-	movw	r3, #61664
-	strh	r3, [fp]	@ movhi
+	ldr	r3, .L1300+8
+	strh	r3, [r10]	@ movhi
 	.loc 4 353 0
-	movs	r3, #0
-	str	r3, [fp, #4]
+	mov	r3, #0
+	str	r3, [r10, #4]
 	.loc 4 354 0
-	ldrh	r3, [r10]
+	ldrh	r3, [r9]
 	.loc 4 355 0
-	ldrh	r7, [r4, #74]
-.LVL1094:
-	.loc 4 357 0
-	ldrh	r2, [r4, #3860]
+	ldrh	ip, [r4, #74]
 	.loc 4 354 0
-	strh	r3, [fp, #2]	@ movhi
+	strh	r3, [r10, #2]	@ movhi
 	.loc 4 355 0
-	ldrh	r3, [r10]
+	ldrh	r3, [r9]
 	.loc 4 357 0
-	ldr	r1, [r9]
-	lsls	r2, r2, #2
+	ldr	r1, [r8]
 	ldr	r0, [r4, #3228]
 	.loc 4 355 0
-	mla	r7, r8, r7, r3
-.LVL1095:
+	mla	ip, r7, ip, r3
+.LVL1087:
 	.loc 4 356 0
-	lsls	r3, r7, #10
+	lsl	r3, ip, #10
+	str	ip, [fp, #-44]
 	str	r3, [r4, #3224]
 	.loc 4 357 0
+	ldr	r3, .L1300+12
+	ldrh	r2, [r3]
+	lsl	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1096:
+.LVL1088:
 	.loc 4 358 0
-	movs	r2, #1
-	ldr	r0, .L1315
+	mov	r2, #1
+	ldr	r0, .L1300+4
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1097:
+.LVL1089:
 	.loc 4 359 0
-	movs	r3, #1
-	ldr	r0, .L1315
+	mov	r3, #1
+	ldr	r0, .L1300+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1098:
+.LVL1090:
 	.loc 4 360 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	bne	.L1299
+	ldr	ip, [fp, #-44]
+.LVL1091:
+	cmn	r3, #1
+	bne	.L1284
 	.loc 4 362 0
-	uxth	r0, r7
+	uxth	r0, ip
 	bl	FtlBbmMapBadBlock
-.LVL1099:
+.LVL1092:
 	.loc 4 363 0
-	b	.L1300
-.L1305:
+	b	.L1285
+.L1290:
 	.loc 4 383 0 discriminator 3
+	uxth	r0, r0
 	bl	FtlBbmMapBadBlock
-.LVL1100:
-	b	.L1304
-.L1308:
+.LVL1093:
+	mov	r0, r5
+	b	.L1289
+.L1293:
 	.loc 4 396 0
 	ldrh	r3, [r4, #128]
 	cmp	r3, r6
-	bne	.L1309
 	.loc 4 398 0
-	strh	r5, [r4, #128]	@ movhi
-	b	.L1307
-.L1309:
+	strheq	r5, [r4, #128]	@ movhi
+	beq	.L1292
+.L1294:
 	.loc 4 402 0
 	strh	r5, [r4, #132]	@ movhi
-.L1310:
+.L1295:
 	.loc 4 414 0
 	ldrh	r3, [r4, #128]
 	.loc 4 411 0
-	movs	r5, #0
+	mov	r5, #0
 	.loc 4 414 0
 	ldr	r0, [r4, #3760]
 	.loc 4 416 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 4 413 0
 	str	r5, [r4, #136]
 	.loc 4 416 0
-	movs	r2, #2
+	mov	r2, #2
 	.loc 4 411 0
 	strh	r5, [r4, #130]	@ movhi
 	.loc 4 414 0
-	lsls	r3, r3, #10
+	lsl	r3, r3, #10
 	str	r3, [r0, #4]
 	.loc 4 415 0
 	ldrh	r3, [r4, #132]
-	lsls	r3, r3, #10
+	lsl	r3, r3, #10
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1101:
+.LVL1094:
 	.loc 4 418 0
 	ldrh	r0, [r4, #128]
 	bl	FtlBbmMapBadBlock
-.LVL1102:
+.LVL1095:
 	.loc 4 419 0
 	ldrh	r0, [r4, #132]
 	bl	FtlBbmMapBadBlock
-.LVL1103:
+.LVL1096:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1104:
+.LVL1097:
 	.loc 4 422 0
 	ldr	r3, [r4, #136]
 	.loc 4 425 0
@@ -13599,7 +13681,7 @@ FtlMakeBbt:
 	.loc 4 426 0
 	strh	r5, [r4, #130]	@ movhi
 	.loc 4 422 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #136]
 	.loc 4 424 0
 	ldrh	r3, [r4, #128]
@@ -13609,619 +13691,616 @@ FtlMakeBbt:
 	strh	r3, [r4, #132]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1105:
+.LVL1098:
 	.loc 4 432 0
 	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1106:
-.L1316:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1301:
 	.align	2
-.L1315:
-	.word	.LANCHOR0+3220
+.L1300:
 	.word	.LANCHOR0+156
+	.word	.LANCHOR0+3220
+	.word	-3872
+	.word	.LANCHOR0+3860
 .LFE181:
-	.fnend
 	.size	FtlMakeBbt, .-FtlMakeBbt
-	.align	1
+	.align	2
 	.global	FtlVendorPartWrite
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-	.fnstart
 .LFB213:
 	.loc 2 835 0
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1107:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI151:
-	mov	r10, r2
-	.loc 2 843 0
-	ldr	r4, .L1329
-	adds	r2, r0, r1
-.LVL1108:
+	@ args = 0, pretend = 0, frame = 100
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1099:
+	mov	ip, sp
+.LCFI343:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI344:
+	sub	fp, ip, #4
+.LCFI345:
+	sub	sp, sp, #100
 	.loc 2 835 0
-	.pad #108
-	sub	sp, sp, #108
-.LCFI152:
+	mov	r7, r0
+	.loc 2 843 0
+	ldr	r4, .L1311
 	.loc 2 835 0
-	mov	r8, r0
-	mov	r6, r1
+	mov	r5, r1
+	str	r2, [fp, #-128]
 	.loc 2 843 0
+	add	r2, r0, r1
+.LVL1100:
 	ldrh	r3, [r4, #72]
 	cmp	r2, r3
-	bhi	.L1325
+	.loc 2 844 0
+	mvnhi	r8, #0
+	.loc 2 843 0
+	bhi	.L1302
 	.loc 2 840 0
-	ldrh	r7, [r4, #84]
-	mov	r9, #0
-	lsr	r7, r0, r7
-.LVL1109:
-	lsl	fp, r7, #2
-.LVL1110:
-.L1319:
+	ldrh	r6, [r4, #84]
+	mov	r8, #0
+	lsr	r6, r0, r6
+.LVL1101:
+	lsl	r10, r6, #2
+.LVL1102:
+.L1304:
 	.loc 2 846 0
-	cbnz	r6, .L1324
-.L1317:
+	cmp	r5, #0
+	bne	.L1309
+.L1302:
 	.loc 2 869 0
-	mov	r0, r9
-	add	sp, sp, #108
-.LCFI153:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1111:
-.L1324:
-.LCFI154:
+	mov	r0, r8
+	sub	sp, fp, #40
+.LCFI346:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1103:
+.L1309:
+.LCFI347:
 	.loc 2 847 0
 	ldr	r3, [r4, #3844]
+.LVL1104:
 	.loc 2 848 0
-	mov	r0, r8
+	mov	r0, r7
+	ldrh	r2, [r4, #34]
 	.loc 2 847 0
-	ldr	r2, [r3, fp]
-.LVL1112:
+	ldr	ip, [r3, r10]
+.LVL1105:
 	.loc 2 848 0
-	ldrh	r3, [r4, #34]
+	mov	r1, r2
+	str	r2, [fp, #-136]
 	.loc 2 847 0
-	str	r2, [sp, #12]
+	str	ip, [fp, #-140]
 	.loc 2 848 0
-	mov	r1, r3
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-.LVL1113:
+	bl	__umodsi3
+.LVL1106:
 	.loc 2 849 0
-	ldr	r3, [sp, #8]
+	ldr	r2, [fp, #-136]
 	.loc 2 850 0
-	ldr	r2, [sp, #12]
-.LVL1114:
+	ldr	ip, [fp, #-140]
+.LVL1107:
 	.loc 2 848 0
-	str	r1, [sp, #4]
+	str	r0, [fp, #-132]
 	.loc 2 849 0
-	subs	r5, r3, r1
-.LVL1115:
-	uxth	r5, r5
-.LVL1116:
+	sub	r3, r2, r0
+	uxth	r9, r3
 	.loc 2 850 0
-	cmp	r6, r5
+	cmp	r5, r9
 	.loc 2 851 0
-	it	cc
-	uxthcc	r5, r6
+	uxthcc	r9, r5
 	.loc 2 852 0
-	cbz	r2, .L1321
-	.loc 2 852 0 is_stmt 0 discriminator 1
-	cmp	r5, r3
-	beq	.L1321
-	.loc 2 854 0 is_stmt 1
-	ldr	r3, [r4, #3808]
+	cmp	ip, #0
+	cmpne	r9, r2
+	movne	r1, #1
+	moveq	r1, #0
+	beq	.L1306
+	.loc 2 854 0
+	ldr	r2, [r4, #3808]
 	.loc 2 856 0
-	add	r0, sp, #20
+	sub	r0, fp, #124
 	.loc 2 853 0
-	str	r2, [sp, #24]
-	.loc 2 856 0
-	movs	r2, #1
-.LVL1117:
-	mov	r1, r2
+	str	ip, [fp, #-120]
 	.loc 2 854 0
-	str	r3, [sp, #28]
+	str	r2, [fp, #-116]
 	.loc 2 855 0
-	add	r3, sp, #40
-	str	r3, [sp, #32]
+	sub	r2, fp, #104
+	str	r2, [fp, #-112]
 	.loc 2 856 0
+	mov	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL1118:
-.L1322:
+.LVL1108:
+.L1307:
 	.loc 2 860 0
-	lsls	r3, r5, #9
+	ldr	r3, [fp, #-132]
+	lsl	ip, r9, #9
 	ldr	r0, [r4, #3808]
-	mov	r1, r10
-	mov	r2, r3
-	str	r3, [sp, #8]
-	ldr	r3, [sp, #4]
 	.loc 2 864 0
-	subs	r6, r6, r5
+	sub	r5, r5, r9
+	.loc 2 860 0
+	mov	r2, ip
+	ldr	r1, [fp, #-128]
+	str	ip, [fp, #-136]
 	.loc 2 865 0
-	add	r8, r8, r5
-	add	fp, fp, #4
+	add	r7, r7, r9
+	add	r10, r10, #4
 	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1119:
+.LVL1109:
 	.loc 2 861 0
-	mov	r1, r7
+	mov	r1, r6
 	ldr	r2, [r4, #3808]
-	ldr	r0, .L1329+4
+	ldr	r0, .L1311+4
 	.loc 2 863 0
-	adds	r7, r7, #1
+	add	r6, r6, #1
 	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1120:
+.LVL1110:
 	.loc 2 866 0
-	ldr	r3, [sp, #8]
+	ldr	r3, [fp, #-128]
+.LVL1111:
 	.loc 2 862 0
-	adds	r0, r0, #1
-	it	eq
-	moveq	r9, #-1
+	cmn	r0, #1
 	.loc 2 866 0
-	add	r10, r10, r3
-	b	.L1319
-.LVL1121:
-.L1321:
+	ldr	ip, [fp, #-136]
+	.loc 2 862 0
+	mvneq	r8, #0
+	.loc 2 866 0
+	add	r3, r3, ip
+	str	r3, [fp, #-128]
+	b	.L1304
+.LVL1112:
+.L1306:
 	.loc 2 858 0
 	ldrh	r2, [r4, #86]
-.LVL1122:
-	movs	r1, #0
 	ldr	r0, [r4, #3808]
 	bl	ftl_memset
-.LVL1123:
-	b	.L1322
-.LVL1124:
-.L1325:
-	.loc 2 844 0
-	mov	r9, #-1
-	b	.L1317
-.L1330:
+.LVL1113:
+	b	.L1307
+.L1312:
 	.align	2
-.L1329:
+.L1311:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3908
 .LFE213:
-	.fnend
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.align	1
+	.align	2
 	.global	Ftl_save_ext_data
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	.fnstart
 .LFB236:
 	.loc 2 2159 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI348:
+	push	{fp, ip, lr, pc}
+.LCFI349:
+	sub	fp, ip, #4
+.LCFI350:
 	.loc 2 2160 0
-	ldr	r2, .L1333
-	ldr	r3, .L1333+4
-	ldr	r1, [r2, #2612]
-	cmp	r1, r3
-	bne	.L1331
+	ldr	r3, .L1315
+	ldr	r2, .L1315+4
+	ldr	r1, [r3, #2612]
+	cmp	r1, r2
+	ldmfdne	sp, {fp, sp, pc}
 .LBB499:
 .LBB500:
 	.loc 2 2161 0
-	ldr	r3, .L1333+8
+	ldr	r2, .L1315+8
 	.loc 2 2174 0
-	addw	r2, r2, #2612
-	movs	r1, #1
-	movs	r0, #0
+	mov	r1, #1
+	mov	r0, #0
 	.loc 2 2161 0
-	str	r3, [r2, #4]
+	str	r2, [r3, #2616]
 	.loc 2 2162 0
-	ldr	r3, [r2, #-104]
-	str	r3, [r2, #88]
+	ldr	r2, [r3, #2508]
+	str	r2, [r3, #2700]
 	.loc 2 2163 0
-	ldr	r3, [r2, #-100]
-	str	r3, [r2, #92]
+	ldr	r2, [r3, #2512]
+	str	r2, [r3, #2704]
 	.loc 2 2164 0
-	ldr	r3, [r2, #-108]
-	str	r3, [r2, #8]
+	ldr	r2, [r3, #2504]
+	str	r2, [r3, #2620]
 	.loc 2 2165 0
-	ldr	r3, [r2, #-120]
-	str	r3, [r2, #12]
+	ldr	r2, [r3, #2492]
+	str	r2, [r3, #2624]
 	.loc 2 2166 0
-	ldr	r3, [r2, #-128]
-	str	r3, [r2, #16]
+	ldr	r2, [r3, #2484]
+	str	r2, [r3, #2628]
 	.loc 2 2167 0
-	ldr	r3, [r2, #-112]
-	str	r3, [r2, #20]
+	ldr	r2, [r3, #2500]
+	str	r2, [r3, #2632]
 	.loc 2 2168 0
-	ldr	r3, [r2, #-84]
-	str	r3, [r2, #28]
+	ldr	r2, [r3, #2528]
+	str	r2, [r3, #2640]
 	.loc 2 2169 0
-	ldr	r3, [r2, #-76]
-	str	r3, [r2, #32]
+	ldr	r2, [r3, #2536]
+	str	r2, [r3, #2644]
 	.loc 2 2170 0
-	ldr	r3, [r2, #-124]
-	str	r3, [r2, #36]
+	ldr	r2, [r3, #2488]
+	str	r2, [r3, #2648]
 	.loc 2 2171 0
-	ldr	r3, [r2, #-116]
-	str	r3, [r2, #40]
+	ldr	r2, [r3, #2496]
+	str	r2, [r3, #2652]
 	.loc 2 2172 0
-	ldr	r3, [r2, #-72]
-	str	r3, [r2, #44]
+	ldr	r2, [r3, #2540]
+	str	r2, [r3, #2656]
 	.loc 2 2173 0
-	ldr	r3, [r2, #-68]
-	str	r3, [r2, #48]
+	ldr	r2, [r3, #2544]
+	str	r2, [r3, #2660]
 	.loc 2 2174 0
-	b	FtlVendorPartWrite
-.LVL1125:
-.L1331:
-	bx	lr
-.L1334:
+	ldr	r2, .L1315+12
+	bl	FtlVendorPartWrite
+.LVL1114:
+	ldmfd	sp, {fp, sp, pc}
+.L1316:
 	.align	2
-.L1333:
+.L1315:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
+	.word	.LANCHOR0+2612
 .LBE500:
 .LBE499:
 .LFE236:
-	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.align	1
+	.align	2
 	.global	FtlEctTblFlush
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	.fnstart
 .LFB215:
 	.loc 2 910 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1126:
-	.loc 2 913 0
-	ldr	r2, .L1340
-	.loc 2 910 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI155:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1115:
+	mov	ip, sp
+.LCFI351:
+	push	{fp, ip, lr, pc}
+.LCFI352:
+	sub	fp, ip, #4
+.LCFI353:
 	.loc 2 913 0
-	ldrh	r3, [r2, #-240]
+	ldr	r2, .L1322
+	ldrh	r3, [r2]
 	cmp	r3, #31
 	.loc 2 914 0
-	itett	ls
 	addls	r3, r3, #1
 	.loc 2 911 0
 	movhi	r2, #32
-.LVL1127:
+.LVL1116:
 	.loc 2 914 0
-	strhls	r3, [r2, #-240]	@ movhi
-.LVL1128:
+	strhls	r3, [r2]	@ movhi
+.LVL1117:
 	.loc 2 915 0
 	movls	r2, #1
-.LVL1129:
-	ldr	r3, .L1340+4
+.LVL1118:
 	.loc 2 917 0
-	cbnz	r0, .L1337
+	cmp	r0, #0
+	ldr	r3, .L1322+4
+	bne	.L1319
 	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r3, #3820]
 	ldr	r0, [r1, #20]
-.LVL1130:
+.LVL1119:
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
-.LVL1131:
+.LVL1120:
 	cmp	r1, r2
-	bcc	.L1338
-.LVL1132:
-.L1337:
+	bcc	.L1320
+.LVL1121:
+.L1319:
 	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r3, #3820]
-.LVL1133:
+.LVL1122:
 	.loc 2 924 0
-	movs	r0, #64
-.LVL1134:
+	mov	r0, #64
+.LVL1123:
 	.loc 2 919 0
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
 	.loc 2 920 0
-	ldr	r1, .L1340+8
+	ldr	r1, .L1322+8
 	str	r1, [r2]
 	.loc 2 921 0
-	ldrh	r1, [r3, #3812]
+	movw	r1, #3812
+	ldrh	r1, [r3, r1]
 	ldr	r2, [r3, #3820]
-	lsls	r3, r1, #9
+	lsl	r3, r1, #9
 	str	r3, [r2, #12]
 	.loc 2 922 0
 	ldr	r3, [r2, #8]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r2, #8]
 	.loc 2 923 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r2, #4]
 	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1135:
+.LVL1124:
 	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1136:
-.L1338:
+.LVL1125:
+.L1320:
 	.loc 2 927 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L1341:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L1323:
 	.align	2
-.L1340:
-	.word	.LANCHOR3
+.L1322:
+	.word	.LANCHOR3-4080
 	.word	.LANCHOR0
 	.word	1112818501
 .LFE215:
-	.fnend
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.align	1
+	.align	2
 	.global	FtlVendorPartRead
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-	.fnstart
 .LFB214:
 	.loc 2 872 0
-	@ args = 0, pretend = 0, frame = 96
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1137:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI156:
-	mov	r10, r2
-	.loc 2 881 0
-	ldr	r5, .L1351
-	adds	r2, r0, r1
-.LVL1138:
+	@ args = 0, pretend = 0, frame = 92
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1126:
+	mov	ip, sp
+.LCFI354:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI355:
+	sub	fp, ip, #4
+.LCFI356:
+	sub	sp, sp, #92
 	.loc 2 872 0
-	.pad #100
-	sub	sp, sp, #100
-.LCFI157:
+	mov	r9, r2
+	.loc 2 881 0
+	ldr	r5, .L1333
 	.loc 2 872 0
-	mov	r8, r0
 	mov	r7, r1
 	.loc 2 881 0
-	ldrh	r3, [r5, #72]
-	cmp	r2, r3
-	bhi	.L1350
+	add	r1, r0, r1
+.LVL1127:
+	.loc 2 872 0
+	mov	r10, r0
+	.loc 2 881 0
+	ldrh	r2, [r5, #72]
+.LVL1128:
+	cmp	r1, r2
+	.loc 2 882 0
+	mvnhi	r8, #0
+	.loc 2 881 0
+	bhi	.L1324
 	.loc 2 877 0
 	ldrh	r6, [r5, #84]
-	mov	r9, #0
+	mov	r8, #0
 	lsr	r6, r0, r6
-.LVL1139:
-	lsls	r6, r6, #2
-.LVL1140:
-.L1344:
+.LVL1129:
+	lsl	r6, r6, #2
+.LVL1130:
+.L1326:
 	.loc 2 883 0
-	cbnz	r7, .L1349
-.L1342:
+	cmp	r7, #0
+	bne	.L1331
+.L1324:
 	.loc 2 906 0
-	mov	r0, r9
-	add	sp, sp, #100
-.LCFI158:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1141:
-.L1349:
-.LCFI159:
+	mov	r0, r8
+	sub	sp, fp, #40
+.LCFI357:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1131:
+.L1331:
+.LCFI358:
 	.loc 2 884 0
-	ldr	r3, [r5, #3844]
+	ldr	r2, [r5, #3844]
 	.loc 2 885 0
-	mov	r0, r8
+	mov	r0, r10
 	ldrh	r4, [r5, #34]
-.LVL1142:
+.LVL1132:
 	.loc 2 884 0
-	ldr	r3, [r3, r6]
-.LVL1143:
+	ldr	ip, [r2, r6]
+.LVL1133:
 	.loc 2 885 0
 	mov	r1, r4
 	.loc 2 884 0
-	str	r3, [sp, #4]
+	str	ip, [fp, #-128]
 	.loc 2 885 0
-	bl	__aeabi_uidivmod
-.LVL1144:
+	bl	__umodsi3
+.LVL1134:
 	.loc 2 886 0
-	subs	r4, r4, r1
+	sub	r4, r4, r0
 	.loc 2 887 0
-	ldr	r3, [sp, #4]
-.LVL1145:
+	ldr	ip, [fp, #-128]
+.LVL1135:
 	.loc 2 886 0
 	uxth	r4, r4
-.LVL1146:
-	.loc 2 885 0
-	str	r1, [sp]
+.LVL1136:
+	str	r0, [fp, #-132]
 	.loc 2 887 0
 	cmp	r7, r4
 	.loc 2 888 0
-	it	cc
 	uxthcc	r4, r7
-	lsl	fp, r4, #9
 	.loc 2 889 0
-	cbz	r3, .L1346
-	.loc 2 890 0
-	str	r3, [sp, #16]
-	.loc 2 893 0
-	movs	r2, #1
+	cmp	ip, #0
+	lsl	r3, r4, #9
+	str	r3, [fp, #-128]
+	beq	.L1328
 	.loc 2 891 0
-	ldr	r3, [r5, #3808]
-.LVL1147:
+	ldr	r2, [r5, #3808]
+	.loc 2 892 0
+	sub	r3, fp, #104
 	.loc 2 893 0
-	mov	r1, r2
-	add	r0, sp, #12
-	.loc 2 891 0
-	str	r3, [sp, #20]
+	sub	r0, fp, #124
 	.loc 2 892 0
-	add	r3, sp, #32
-	str	r3, [sp, #24]
+	str	r3, [fp, #-112]
+	.loc 2 890 0
+	str	ip, [fp, #-120]
+	.loc 2 891 0
+	str	r2, [fp, #-116]
 	.loc 2 893 0
+	mov	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL1148:
-	.loc 2 894 0
-	ldr	r3, [sp, #12]
+.LVL1137:
 	.loc 2 896 0
-	mov	r2, fp
 	ldr	r1, [r5, #3808]
-	mov	r0, r10
+	mov	r0, r9
+	ldr	r3, [fp, #-132]
+	.loc 2 894 0
+	ldr	r2, [fp, #-124]
+	.loc 2 896 0
+	add	r1, r1, r3, lsl #9
 	.loc 2 895 0
-	adds	r3, r3, #1
+	cmn	r2, #1
 	.loc 2 896 0
-	ldr	r3, [sp]
+	lsl	r2, r4, #9
 	.loc 2 895 0
-	it	eq
-	moveq	r9, #-1
+	mvneq	r8, #0
 	.loc 2 896 0
-	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1149:
-.L1348:
+.LVL1138:
+.L1330:
+	.loc 2 903 0
+	ldr	r3, [fp, #-128]
 	.loc 2 901 0
-	subs	r7, r7, r4
+	sub	r7, r7, r4
 	.loc 2 902 0
-	add	r8, r8, r4
+	add	r10, r10, r4
+	add	r6, r6, #4
 	.loc 2 903 0
-	add	r10, r10, fp
-	adds	r6, r6, #4
-	b	.L1344
-.LVL1150:
-.L1346:
+	add	r9, r9, r3
+	b	.L1326
+.LVL1139:
+.L1328:
 	.loc 2 898 0
-	mov	r2, fp
-	mov	r1, r3
-	mov	r0, r10
+	lsl	r2, r4, #9
+	mov	r1, ip
+	mov	r0, r9
 	bl	ftl_memset
-.LVL1151:
-	b	.L1348
-.LVL1152:
-.L1350:
-	.loc 2 882 0
-	mov	r9, #-1
-	b	.L1342
-.L1352:
+.LVL1140:
+	b	.L1330
+.L1334:
 	.align	2
-.L1351:
+.L1333:
 	.word	.LANCHOR0
 .LFE214:
-	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.align	1
+	.align	2
 	.global	FtlLoadEctTbl
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-	.fnstart
 .LFB221:
 	.loc 2 1383 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI160:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI359:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI360:
+	sub	fp, ip, #4
+.LCFI361:
 	.loc 2 1384 0
-	movs	r0, #64
-	ldr	r4, .L1355
+	ldr	r4, .L1337
+	movw	r5, #3812
+	mov	r0, #64
 	ldr	r2, [r4, #3820]
-	ldrh	r1, [r4, #3812]
+	ldrh	r1, [r4, r5]
 	bl	FtlVendorPartRead
-.LVL1153:
+.LVL1141:
 	.loc 2 1385 0
 	ldr	r3, [r4, #3820]
 	ldr	r2, [r3]
-	ldr	r3, .L1355+4
+	ldr	r3, .L1337+4
 	cmp	r2, r3
-	beq	.L1354
+	beq	.L1336
 .LBB503:
 .LBB504:
 	.loc 2 1387 0
-	ldr	r1, .L1355+8
-	ldr	r0, .L1355+12
+	ldr	r1, .L1337+8
+	ldr	r0, .L1337+12
 	bl	printk
-.LVL1154:
+.LVL1142:
 	.loc 2 1388 0
-	ldrh	r2, [r4, #3812]
-	movs	r1, #0
+	ldrh	r2, [r4, r5]
+	mov	r1, #0
 	ldr	r0, [r4, #3820]
-	lsls	r2, r2, #9
+	lsl	r2, r2, #9
 	bl	ftl_memset
-.LVL1155:
-.L1354:
+.LVL1143:
+.L1336:
 .LBE504:
 .LBE503:
 	.loc 2 1393 0
-	movs	r0, #0
-	pop	{r4, pc}
-.L1356:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1338:
 	.align	2
-.L1355:
+.L1337:
 	.word	.LANCHOR0
 	.word	1112818501
 	.word	.LC99
 	.word	.LC71
 .LFE221:
-	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.align	1
+	.align	2
 	.global	Ftl_load_ext_data
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-	.fnstart
 .LFB237:
 	.loc 2 2179 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI161:
-	.loc 2 2180 0
-	movs	r1, #1
-	ldr	r4, .L1360
-	movs	r0, #0
-	.loc 2 2181 0
-	ldr	r5, .L1360+4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI362:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI363:
+	sub	fp, ip, #4
+.LCFI364:
 	.loc 2 2180 0
-	addw	r2, r4, #2612
+	ldr	r4, .L1342
+	mov	r1, #1
+	mov	r0, #0
+	ldr	r2, .L1342+4
 	bl	FtlVendorPartRead
-.LVL1156:
+.LVL1144:
 	.loc 2 2181 0
+	ldr	r5, .L1342+8
 	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	beq	.L1358
+	beq	.L1340
 .LBB510:
 .LBB511:
 .LBB512:
 	.loc 1 202 0
 	mov	r1, #512
-	addw	r0, r4, #2612
+	ldr	r0, .L1342+4
 	bl	__memzero
-.LVL1157:
+.LVL1145:
 .LBE512:
 .LBE511:
 .LBE510:
 	.loc 2 2183 0
 	str	r5, [r4, #2612]
-.L1358:
+.L1340:
 	.loc 2 2186 0
 	ldr	r3, [r4, #2612]
 	cmp	r3, r5
-	bne	.L1359
+	bne	.L1341
 	.loc 2 2187 0
 	ldr	r3, [r4, #2700]
 	str	r3, [r4, #2508]
@@ -14258,131 +14337,134 @@ Ftl_load_ext_data:
 	.loc 2 2198 0
 	ldr	r3, [r4, #2660]
 	str	r3, [r4, #2544]
-.L1359:
+.L1341:
 	.loc 2 2201 0
 	ldrh	r2, [r4, #68]
 	ldr	r3, [r4, #2528]
 	ldr	r0, [r4, #2524]
 	ldrh	r1, [r4, #16]
 	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-.LVL1158:
+	bl	__udivsi3
+.LVL1146:
 	str	r0, [r4, #2532]
-	pop	{r3, r4, r5, pc}
-.L1361:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1343:
 	.align	2
-.L1360:
+.L1342:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2612
 	.word	1179929683
 .LFE237:
-	.fnend
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.align	1
+	.align	2
 	.global	FtlVpcTblFlush
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-	.fnstart
 .LFB219:
 	.loc 2 1053 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI162:
-	.loc 2 1065 0
-	movs	r5, #0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI365:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI366:
+	sub	fp, ip, #4
+.LCFI367:
 	.loc 2 1059 0
-	ldr	r4, .L1374
+	ldr	r4, .L1356
+	.loc 2 1065 0
+	mov	r6, #0
 	.loc 2 1096 0
-	movs	r1, #255
-	.loc 2 1054 0
-	movw	r7, #65535
-.LVL1159:
-	.loc 2 1124 0
-	ldr	r9, .L1374+16
+	mov	r1, #255
+	.loc 2 1062 0
+	ldr	r5, .L1356+4
 	.loc 2 1059 0
 	ldr	r3, [r4, #3240]
-	.loc 2 1105 0
-	addw	r8, r4, #3220
 	.loc 2 1060 0
-	ldr	r6, [r4, #3244]
+	ldr	r7, [r4, #3244]
+	.loc 2 1070 0
+	sub	r8, r5, #308
 	.loc 2 1124 0
-	ldr	r10, .L1374+20
+	ldr	r10, .L1356+8
 	.loc 2 1059 0
 	str	r3, [r4, #3228]
 	.loc 2 1062 0
-	ldrh	r3, [r4, #2552]
+	movw	r3, #2552
+	ldrh	r3, [r4, r3]
+	.loc 2 1105 0
+	add	r9, r5, #668
 	.loc 2 1060 0
-	str	r6, [r4, #3232]
+	str	r7, [r4, #3232]
 	.loc 2 1066 0
-	str	r5, [r6, #12]
+	str	r6, [r7, #12]
 	.loc 2 1062 0
-	strh	r3, [r6, #2]	@ movhi
+	strh	r3, [r7, #2]	@ movhi
 	.loc 2 1063 0
-	movw	r3, #61604
-	strh	r3, [r6]	@ movhi
+	ldr	r3, .L1356+12
+	strh	r3, [r7]	@ movhi
 	.loc 2 1064 0
 	ldr	r3, [r4, #2560]
 	.loc 2 1065 0
-	str	r5, [r6, #8]
+	str	r6, [r7, #8]
 	.loc 2 1074 0
-	ldrh	r2, [r4, #2326]
+	ldrh	r2, [r5, #-226]
 	.loc 2 1064 0
-	str	r3, [r6, #4]
+	str	r3, [r7, #4]
 	.loc 2 1068 0
-	ldr	r3, .L1374+4
+	ldr	r3, .L1356+16
 	str	r3, [r4, #2244]
 	.loc 2 1069 0
-	ldr	r3, .L1374+8
+	ldr	r3, .L1356+20
 	str	r3, [r4, #2248]
 	.loc 2 1070 0
-	ldrh	r3, [r4, #2558]
-	strh	r3, [r4, #2252]	@ movhi
+	ldrh	r3, [r5, #6]
+	strh	r3, [r8, #8]	@ movhi
 	.loc 2 1071 0
 	ldrh	r3, [r4, #30]
 	strb	r3, [r4, #2254]
 	.loc 2 1073 0
-	ldrh	r3, [r4, #2324]
-	strh	r3, [r4, #2258]	@ movhi
+	movw	r3, #2324
+	ldrh	r3, [r4, r3]
+	strh	r3, [r8, #14]	@ movhi
 	.loc 2 1074 0
 	ldrb	r3, [r4, #2330]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
 	.loc 2 1078 0
-	ldrh	r2, [r4, #2374]
+	ldrh	r2, [r5, #-178]
 	.loc 2 1074 0
-	strh	r3, [r4, #2260]	@ movhi
+	strh	r3, [r8, #16]	@ movhi
 	.loc 2 1075 0
 	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
 	strb	r3, [r4, #2255]
 	.loc 2 1077 0
-	ldrh	r3, [r4, #2372]
-	strh	r3, [r4, #2262]	@ movhi
+	movw	r3, #2372
+	ldrh	r3, [r4, r3]
+	strh	r3, [r8, #18]	@ movhi
 	.loc 2 1078 0
 	ldrb	r3, [r4, #2378]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	strh	r3, [r4, #2264]	@ movhi
+	strh	r3, [r8, #20]	@ movhi
 	.loc 2 1079 0
 	ldrb	r3, [r4, #2380]	@ zero_extendqisi2
 	strb	r3, [r4, #2256]
 	.loc 2 1081 0
-	ldrh	r3, [r4, #2420]
+	movw	r3, #2420
+	ldrh	r3, [r4, r3]
+	strh	r3, [r8, #22]	@ movhi
 	.loc 2 1082 0
-	ldrh	r2, [r4, #2422]
+	ldrh	r2, [r5, #-130]
+	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
 	.loc 2 1096 0
 	ldr	r0, [r4, #3228]
-	.loc 2 1081 0
-	strh	r3, [r4, #2266]	@ movhi
 	.loc 2 1082 0
-	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
 	.loc 2 1096 0
 	ldrh	r2, [r4, #86]
 	.loc 2 1082 0
-	strh	r3, [r4, #2268]	@ movhi
+	strh	r3, [r8, #24]	@ movhi
 	.loc 2 1083 0
 	ldrb	r3, [r4, #2428]	@ zero_extendqisi2
 	strb	r3, [r4, #2257]
@@ -14397,496 +14479,502 @@ FtlVpcTblFlush:
 	str	r3, [r4, #2280]
 	.loc 2 1096 0
 	bl	ftl_memset
-.LVL1160:
+.LVL1147:
 	.loc 2 1097 0
-	movs	r2, #48
-	addw	r1, r4, #2244
+	mov	r1, r8
+	mov	r2, #48
 	ldr	r0, [r4, #3228]
+	.loc 2 1054 0
+	movw	r8, #65535
+.LVL1148:
+	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1161:
+.LVL1149:
 	.loc 2 1098 0
 	ldrh	r2, [r4, #16]
 	ldr	r0, [r4, #3228]
 	ldr	r1, [r4, #2300]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
+	lsl	r2, r2, #1
+	add	r0, r0, #48
 	bl	ftl_memcpy
-.LVL1162:
+.LVL1150:
 	.loc 2 1099 0
 	ldrh	r0, [r4, #16]
 	ldr	r3, [r4, #3228]
 	ldr	r1, [r4]
-	lsrs	r2, r0, #3
-	adds	r0, r0, #24
-	lsls	r0, r0, #1
-	adds	r2, r2, #4
+	lsr	r2, r0, #3
+	add	r0, r0, #24
+	lsl	r0, r0, #1
+	add	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r0, r3
+	add	r0, r3, r0
 	bl	ftl_memcpy
-.LVL1163:
+.LVL1151:
 	.loc 2 1100 0
-	mov	r0, r5
+	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1164:
-.L1363:
+.LVL1152:
+.L1345:
 	.loc 2 1102 0
 	ldr	r3, [r4, #3240]
 	.loc 2 1105 0
-	mov	r0, r8
+	mov	r0, r9
 	.loc 2 1104 0
-	ldrh	r2, [r4, #2552]
+	ldrh	r2, [r5]
 	.loc 2 1102 0
 	str	r3, [r4, #3228]
 	.loc 2 1103 0
 	ldr	r3, [r4, #3244]
 	str	r3, [r4, #3232]
 	.loc 2 1104 0
-	ldrh	r3, [r4, #2554]
+	ldrh	r3, [r5, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r4, #3224]
 	.loc 2 1105 0
-	movs	r3, #1
+	mov	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1165:
+.LVL1153:
 	.loc 2 1106 0
 	ldrh	r3, [r4, #80]
-	ldrh	r2, [r4, #2554]
-	subs	r3, r3, #1
+	ldrh	r2, [r5, #2]
+	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1364
+	blt	.L1346
 	.loc 2 1108 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r5]
 	.loc 2 1107 0
-	ldrh	r7, [r4, #2556]
+	ldrh	r8, [r5, #4]
 	.loc 2 1108 0
-	strh	r3, [r4, #2556]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
 	.loc 2 1109 0
-	movs	r3, #0
-	strh	r3, [r4, #2554]	@ movhi
+	mov	r3, #0
+	strh	r3, [r5, #2]	@ movhi
 	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1166:
+.LVL1154:
 	.loc 2 1115 0
 	ldr	r3, [r4, #2516]
 	.loc 2 1110 0
-	strh	r0, [r4, #2552]	@ movhi
+	strh	r0, [r5]	@ movhi
 	.loc 2 1115 0
-	adds	r2, r3, #1
+	add	r2, r3, #1
 	str	r3, [r4, #2560]
 	str	r2, [r4, #2516]
 	.loc 2 1116 0
-	lsls	r2, r0, #10
+	lsl	r2, r0, #10
 	str	r2, [r4, #3224]
 	.loc 2 1117 0
-	str	r3, [r6, #4]
+	str	r3, [r7, #4]
 	.loc 2 1119 0
-	movs	r3, #1
+	mov	r3, #1
 	.loc 2 1118 0
-	strh	r0, [r6, #2]	@ movhi
+	strh	r0, [r7, #2]	@ movhi
 	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	mov	r0, r8
+	mov	r0, r9
 	bl	FlashProgPages
-.LVL1167:
-.L1364:
+.LVL1155:
+.L1346:
 	.loc 2 1121 0
-	ldrh	r3, [r4, #2554]
+	ldrh	r3, [r5, #2]
 	.loc 2 1122 0
 	ldr	r2, [r4, #3220]
 	.loc 2 1121 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	uxth	r3, r3
 	.loc 2 1122 0
-	adds	r2, r2, #1
+	cmn	r2, #1
 	.loc 2 1121 0
-	strh	r3, [r4, #2554]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
 	.loc 2 1122 0
-	bne	.L1365
+	bne	.L1347
 	.loc 2 1124 0
 	cmp	r3, #1
-	bne	.L1366
+	bne	.L1348
 	.loc 2 1124 0 is_stmt 0 discriminator 1
 	movw	r2, #1124
-	mov	r1, r9
-	mov	r0, r10
+	mov	r1, r10
+	ldr	r0, .L1356+24
 	bl	printk
-.LVL1168:
-.L1366:
+.LVL1156:
+.L1348:
 	.loc 2 1125 0 is_stmt 1
-	ldrh	r3, [r4, #2554]
+	ldrh	r3, [r5, #2]
 	.loc 2 1127 0
-	adds	r5, r5, #1
-.LVL1169:
-	uxth	r5, r5
-.LVL1170:
+	add	r6, r6, #1
+.LVL1157:
+	uxth	r6, r6
+.LVL1158:
 	.loc 2 1125 0
 	cmp	r3, #1
 	.loc 2 1126 0
-	ittt	eq
 	ldrheq	r3, [r4, #80]
-	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2554]	@ movhi
+	subeq	r3, r3, #1
+	strheq	r3, [r5, #2]	@ movhi
 	.loc 2 1128 0
-	cmp	r5, #3
-	bls	.L1363
+	cmp	r6, #3
+	bls	.L1345
 	.loc 2 1129 0
-	mov	r2, r5
+	mov	r2, r6
 	ldr	r1, [r4, #3224]
-	ldr	r0, .L1374+12
+	ldr	r0, .L1356+28
 	bl	printk
-.LVL1171:
-.L1369:
-	b	.L1369
-.L1365:
+.LVL1159:
+.L1351:
+	b	.L1351
+.L1347:
 	.loc 2 1135 0
 	cmp	r3, #1
-	beq	.L1363
+	beq	.L1345
 	.loc 2 1138 0
 	movw	r3, #65535
-	cmp	r7, r3
-	beq	.L1370
+	cmp	r8, r3
+	beq	.L1352
 	.loc 2 1139 0
-	movs	r1, #1
-	mov	r0, r7
+	mov	r1, #1
+	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL1172:
-.L1370:
+.LVL1160:
+.L1352:
 	.loc 2 1141 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL1173:
-.L1375:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1357:
 	.align	2
-.L1374:
+.L1356:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2552
+	.word	.LANCHOR1+454
+	.word	-3932
 	.word	1179929683
 	.word	1342177348
-	.word	.LC100
-	.word	.LANCHOR1+454
 	.word	.LC1
+	.word	.LC100
 .LFE219:
-	.fnend
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.align	1
+	.align	2
 	.global	FtlVpcCheckAndModify
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-	.fnstart
 .LFB239:
 	.loc 2 2242 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
-	.save {r4, r5, r6, r7, r8, r9, lr}
-	.pad #12
-.LCFI163:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI368:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI369:
+	sub	fp, ip, #4
+.LCFI370:
+	sub	sp, sp, #4
 	.loc 2 2249 0
-	movs	r5, #0
-.LVL1174:
+	mov	r5, #0
+.LVL1161:
 	.loc 2 2248 0
-	ldr	r4, .L1388
+	ldr	r4, .L1370
 	.loc 2 2247 0
-	ldr	r1, .L1388+4
-	ldr	r0, .L1388+8
+	ldr	r1, .L1370+4
+	ldr	r0, .L1370+8
 	bl	printk
-.LVL1175:
+.LVL1162:
 	.loc 2 2248 0
 	ldrh	r2, [r4, #18]
-	movs	r1, #0
+	mov	r1, #0
 	ldr	r0, [r4, #3824]
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL1176:
-.L1377:
+.LVL1163:
+.L1359:
 	.loc 2 2249 0 discriminator 1
 	ldr	r3, [r4, #2480]
 	cmp	r5, r3
-	bcc	.L1379
+	bcc	.L1361
 	.loc 2 2259 0 discriminator 1
-	ldr	r9, .L1388+12
-	movs	r7, #0
-	.loc 2 2257 0 discriminator 1
-	movw	r8, #65535
-.LVL1177:
-.L1380:
+	ldr	r9, .L1370+12
+	mov	r6, #0
+	.loc 2 2260 0 discriminator 1
+	ldr	r10, .L1370+16
+.LVL1164:
+.L1362:
 	.loc 2 2256 0 discriminator 1
 	ldrh	r3, [r4, #16]
-	uxth	r5, r7
-.LVL1178:
+	uxth	r5, r6
+.LVL1165:
 	cmp	r3, r5
-	bhi	.L1384
+	bhi	.L1366
 	.loc 2 2268 0
-	add	sp, sp, #12
-.LCFI164:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL1179:
-.L1379:
-.LCFI165:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1166:
+.L1361:
 	.loc 2 2250 0
-	movs	r2, #0
-	add	r1, sp, #4
+	mov	r2, #0
+	sub	r1, fp, #44
 	mov	r0, r5
 	bl	log2phys
-.LVL1180:
+.LVL1167:
 	.loc 2 2251 0
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L1378
+	ldr	r0, [fp, #-44]
+	cmn	r0, #1
+	beq	.L1360
 	.loc 2 2252 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1181:
+.LVL1168:
 	.loc 2 2253 0
 	ldr	r2, [r4, #3824]
-	ldrh	r3, [r2, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1378:
+	lsl	r0, r0, #1
+	ldrh	r3, [r2, r0]
+	add	r3, r3, #1
+	strh	r3, [r2, r0]	@ movhi
+.L1360:
 	.loc 2 2249 0 discriminator 2
-	adds	r5, r5, #1
-	b	.L1377
-.LVL1182:
-.L1384:
+	add	r5, r5, #1
+	b	.L1359
+.LVL1169:
+.L1366:
 	.loc 2 2257 0
+	uxth	r8, r6
 	ldr	r3, [r4, #2300]
-	uxth	r6, r7
-	ldrh	r2, [r3, r6, lsl #1]
+	movw	r1, #65535
+	lsl	r7, r8, #1
+	ldrh	r2, [r3, r7]
 	ldr	r3, [r4, #3824]
-	ldrh	r3, [r3, r6, lsl #1]
-	cmp	r2, r3
-	beq	.L1382
-	.loc 2 2257 0 is_stmt 0 discriminator 1
-	cmp	r2, r8
-	beq	.L1382
-	.loc 2 2259 0 is_stmt 1
-	mov	r1, r6
+	ldrh	r3, [r3, r7]
+	cmp	r2, r1
+	cmpne	r2, r3
+	beq	.L1364
+	.loc 2 2259 0
+	mov	r1, r8
 	mov	r0, r9
 	bl	printk
-.LVL1183:
+.LVL1170:
 	.loc 2 2260 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r10]
 	cmp	r3, r5
-	beq	.L1382
+	beq	.L1364
 	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2420]
-	cmp	r3, r5
-	beq	.L1382
+	ldr	r3, .L1370+20
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L1364
 	.loc 2 2260 0 discriminator 2
-	ldrh	r3, [r4, #2372]
+	ldrh	r3, [r3, #-48]
 	cmp	r3, r5
-	beq	.L1382
+	beq	.L1364
 	.loc 2 2261 0 is_stmt 1
 	ldr	r3, [r4, #3824]
 	.loc 2 2262 0
-	mov	r0, r5
+	mov	r0, r8
 	.loc 2 2261 0
-	ldrh	r2, [r3, r6, lsl #1]
+	ldrh	r2, [r3, r7]
 	ldr	r3, [r4, #2300]
-	strh	r2, [r3, r6, lsl #1]	@ movhi
+	strh	r2, [r3, r7]	@ movhi
 	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1184:
+.LVL1171:
 	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1185:
+.LVL1172:
 	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1186:
-.L1382:
-	adds	r7, r7, #1
-	b	.L1380
-.L1389:
+.LVL1173:
+.L1364:
+	add	r6, r6, #1
+	b	.L1362
+.L1371:
 	.align	2
-.L1388:
+.L1370:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
 	.word	.LC90
 	.word	.LC101
+	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2420
 .LFE239:
-	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
-	.align	1
+	.align	2
 	.global	allocate_new_data_superblock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-	.fnstart
 .LFB249:
 	.loc 2 2679 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1187:
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI166:
-	.loc 2 2679 0
-	mov	r6, r0
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1174:
+	mov	ip, sp
+.LCFI371:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+.LCFI372:
+	sub	fp, ip, #4
+.LCFI373:
 	.loc 2 2681 0
-	ldr	r4, .L1400
+	ldr	r5, .L1382
+	.loc 2 2679 0
+	mov	r7, r0
 	.loc 2 2680 0
-	ldrh	r5, [r0]
-.LVL1188:
+	ldrh	r4, [r0]
+.LVL1175:
 	.loc 2 2681 0
-	ldrh	r3, [r4, #16]
-	cmp	r3, r5
-	bcs	.L1391
+	ldrh	r3, [r5, #16]
+	cmp	r3, r4
+	bcs	.L1373
 	.loc 2 2681 0 is_stmt 0 discriminator 1
 	movw	r2, #2681
-	ldr	r1, .L1400+4
-	ldr	r0, .L1400+8
+	ldr	r1, .L1382+4
+	ldr	r0, .L1382+8
 	bl	printk
-.LVL1189:
-.L1391:
+.LVL1176:
+.L1373:
 	.loc 2 2683 0 is_stmt 1
 	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1392
+	cmp	r4, r3
+	beq	.L1374
 	.loc 2 2684 0
-	ldr	r3, [r4, #2300]
+	ldr	r2, [r5, #2300]
+	lsl	r3, r4, #1
 	.loc 2 2685 0
-	mov	r0, r5
+	mov	r0, r4
 	.loc 2 2684 0
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1393
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L1375
 	.loc 2 2685 0
 	bl	INSERT_DATA_LIST
-.LVL1190:
-.L1392:
+.LVL1177:
+.L1374:
+	.loc 2 2689 0
+	mov	r3, #1
 	.loc 2 2690 0
-	ldrh	r0, [r4, #3952]
+	movw	r2, #65535
 	.loc 2 2689 0
-	movs	r3, #1
-	strb	r3, [r6, #8]
+	strb	r3, [r7, #8]
 	.loc 2 2690 0
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1394
+	ldr	r3, .L1382+12
+	ldrh	r0, [r3]
+	mov	r6, r3
+	cmp	r0, r2
+	beq	.L1376
 	.loc 2 2691 0
-	cmp	r5, r0
-	bne	.L1395
+	cmp	r4, r0
+	bne	.L1377
 	.loc 2 2691 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1396
-.L1395:
+	ldr	r2, [r5, #2300]
+	lsl	r3, r0, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L1378
+.L1377:
 	.loc 2 2692 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1191:
-.L1396:
+.LVL1178:
+.L1378:
 	.loc 2 2693 0
-	movw	r3, #65535
-	strh	r3, [r4, #3952]	@ movhi
-.L1394:
+	mvn	r3, #0
+	strh	r3, [r6]	@ movhi
+.L1376:
 	.loc 2 2695 0
-	mov	r0, r6
+	mov	r0, r7
 	bl	allocate_data_superblock
-.LVL1192:
+.LVL1179:
 	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1193:
+.LVL1180:
 	.loc 2 2697 0
-	movs	r0, #0
+	mov	r0, #0
 	bl	FtlEctTblFlush
-.LVL1194:
+.LVL1181:
 	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1195:
+.LVL1182:
 	.loc 2 2700 0
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.LVL1196:
-.L1393:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1375:
 	.loc 2 2687 0
 	bl	INSERT_FREE_LIST
-.LVL1197:
-	b	.L1392
-.L1401:
+.LVL1183:
+	b	.L1374
+.L1383:
 	.align	2
-.L1400:
+.L1382:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
+	.word	.LANCHOR0+3952
 .LFE249:
-	.fnend
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.align	1
+	.align	2
 	.global	FtlProgPages
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-	.fnstart
 .LFB165:
 	.loc 3 904 0
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1198:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI167:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1184:
+	mov	ip, sp
+.LCFI374:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI375:
+	sub	fp, ip, #4
+.LCFI376:
+	sub	sp, sp, #8
 	.loc 3 913 0
-	movs	r7, #0
-.LVL1199:
-	ldr	r6, .L1416
-	.loc 3 904 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI168:
+	mov	r7, #0
+.LVL1185:
+	ldr	r6, .L1398
 	.loc 3 904 0
 	mov	r4, r3
-	.loc 3 911 0
-	movs	r2, #0
-.LVL1200:
 	.loc 3 933 0
-	ldr	r10, .L1416+8
+	ldr	r10, .L1398+4
+	.loc 3 911 0
+	mov	r2, #0
+.LVL1186:
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+.LVL1187:
 	.loc 3 904 0
 	mov	r5, r0
-	.loc 3 933 0
-	ldr	fp, .L1416+12
-	.loc 3 904 0
 	mov	r9, r1
 	.loc 3 911 0
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1201:
 	bl	FlashProgPages
-.LVL1202:
-.L1403:
+.LVL1188:
+.L1385:
 	.loc 3 913 0 discriminator 1
 	cmp	r7, r9
-	beq	.L1410
+	beq	.L1392
 	.loc 3 919 0
 	mov	r8, #0
-	b	.L1411
-.LVL1203:
-.L1406:
+	b	.L1393
+.LVL1189:
+.L1388:
 	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1204:
+.LVL1190:
 	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1404
+	bne	.L1386
 	.loc 3 917 0
 	ldr	r1, [r6, #2300]
+	lsl	r3, r3, #1
 	ldrh	r0, [r4, #4]
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldrh	r2, [r1, r3]
+	sub	r2, r2, r0
+	strh	r2, [r1, r3]	@ movhi
 	.loc 3 918 0
 	ldrh	r3, [r6, #78]
 	.loc 3 919 0
@@ -14895,3320 +14983,3418 @@ FtlProgPages:
 	strh	r8, [r4, #4]	@ movhi
 	.loc 3 918 0
 	strh	r3, [r4, #2]	@ movhi
-.L1404:
+.L1386:
 	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1405
+	cmp	r3, #0
+	bne	.L1387
 	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1205:
-.L1405:
+.LVL1191:
+.L1387:
 	.loc 3 926 0
 	ldr	r3, [r6, #2708]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r6, #2708]
 	.loc 3 927 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1206:
+.LVL1192:
 	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1207:
+.LVL1193:
 	.loc 3 930 0
-	movs	r2, #0
+	mov	r2, #0
 	.loc 3 929 0
 	str	r0, [r5, #4]
 	.loc 3 928 0
-	str	r0, [sp, #12]
+	str	r0, [fp, #-44]
 	.loc 3 930 0
-	movs	r1, #1
+	mov	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1208:
-.L1411:
+.LVL1194:
+.L1393:
 	.loc 3 914 0
 	ldr	r3, [r5]
-.LVL1209:
-	adds	r3, r3, #1
-	beq	.L1406
+.LVL1195:
+	cmn	r3, #1
+	beq	.L1388
 	.loc 3 933 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
 	cmp	r2, r3
-	bcc	.L1407
+	bcc	.L1389
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	movw	r2, #933
 	mov	r1, r10
-	mov	r0, fp
+	ldr	r0, .L1398+8
 	bl	printk
-.LVL1210:
-.L1407:
+.LVL1196:
+.L1389:
 	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
-	add	r1, sp, #16
+	sub	r1, fp, #40
 	.loc 3 935 0
-	movs	r2, #1
+	mov	r2, #1
 	ldr	r0, [r5, #16]
 	.loc 3 934 0
 	str	r3, [r1, #-4]!
-.LVL1211:
+.LVL1197:
 	.loc 3 935 0
 	bl	log2phys
-.LVL1212:
+.LVL1198:
 	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
-.LVL1213:
+.LVL1199:
 	.loc 3 939 0
 	ubfx	r0, r3, #10, #16
-	str	r3, [sp, #4]
+	str	r3, [fp, #-48]
 	bl	P2V_block_in_plane
-.LVL1214:
+.LVL1200:
 	.loc 3 940 0
-	ldr	r3, [sp, #4]
-.LVL1215:
+	ldr	r3, [fp, #-48]
+.LVL1201:
 	.loc 3 939 0
 	mov	r8, r0
 	.loc 3 940 0
-	adds	r3, r3, #1
-	beq	.L1408
+	cmn	r3, #1
+	beq	.L1390
 	.loc 3 942 0
-	ldr	r3, [r6, #2300]
-.LVL1216:
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1409
+	ldr	r2, [r6, #2300]
+	lsl	r3, r0, #1
+.LVL1202:
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	bne	.L1391
 	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1416+4
+	ldr	r0, .L1398+12
 	bl	printk
-.LVL1217:
-.L1409:
+.LVL1203:
+.L1391:
 	.loc 3 944 0
 	mov	r0, r8
 	bl	decrement_vpc_count
-.LVL1218:
-.L1408:
+.LVL1204:
+.L1390:
 	.loc 3 913 0 discriminator 2
-	adds	r7, r7, #1
-	adds	r5, r5, #20
-	b	.L1403
-.LVL1219:
-.L1410:
+	add	r7, r7, #1
+	add	r5, r5, #20
+	b	.L1385
+.LVL1205:
+.L1392:
 	.loc 3 948 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #8]
-.LVL1220:
+.LVL1206:
 	cmp	r2, r3
-	bcc	.L1402
+	bcc	.L1384
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	mov	r2, #948
-	ldr	r1, .L1416+8
-	ldr	r0, .L1416+12
+	ldr	r1, .L1398+4
+	ldr	r0, .L1398+8
 	bl	printk
-.LVL1221:
-.L1402:
+.LVL1207:
+.L1384:
 	.loc 3 949 0 is_stmt 1
-	add	sp, sp, #20
-.LCFI169:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1222:
-.L1417:
+	sub	sp, fp, #40
+.LCFI377:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1208:
+.L1399:
 	.align	2
-.L1416:
+.L1398:
 	.word	.LANCHOR0
-	.word	.LC102
 	.word	.LANCHOR1+519
 	.word	.LC1
+	.word	.LC102
 .LFE165:
-	.fnend
 	.size	FtlProgPages, .-FtlProgPages
-	.align	1
+	.align	2
 	.global	FtlCacheWriteBack
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-	.fnstart
 .LFB166:
 	.loc 3 952 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI170:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI378:
+	push	{r4, fp, ip, lr, pc}
+.LCFI379:
+	sub	fp, ip, #4
+.LCFI380:
 	.loc 3 953 0
-	ldr	r4, .L1423
+	ldr	r4, .L1405
 	ldr	r0, [r4, #3948]
-	cbz	r0, .L1419
+	cmp	r0, #0
+	beq	.L1401
 	.loc 3 954 0
-	ldr	r3, .L1423+4
-	movs	r2, #0
-	movs	r1, #1
-	ldr	r3, [r3, #-236]
+	ldr	r3, .L1405+4
+	mov	r2, #0
+	mov	r1, #1
+	ldr	r3, [r3, #-4076]
 	bl	FtlProgPages
-.LVL1223:
+.LVL1209:
 	.loc 3 955 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r4, #3948]
-.L1419:
+.L1401:
 	.loc 3 958 0
-	movs	r0, #0
-	pop	{r4, pc}
-.L1424:
+	mov	r0, #0
+	ldmfd	sp, {r4, fp, sp, pc}
+.L1406:
 	.align	2
-.L1423:
+.L1405:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 .LFE166:
-	.fnend
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.align	1
+	.align	2
 	.global	FtlSysFlush
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-	.fnstart
 .LFB162:
 	.loc 3 797 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI171:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI381:
+	push	{fp, ip, lr, pc}
+.LCFI382:
+	sub	fp, ip, #4
+.LCFI383:
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1224:
+.LVL1210:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1225:
+.LVL1211:
 	.loc 3 800 0
-	movs	r0, #1
+	mov	r0, #1
 	bl	FtlEctTblFlush
-.LVL1226:
+.LVL1212:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1227:
+.LVL1213:
 	.loc 3 803 0
-	movs	r0, #0
-	pop	{r3, pc}
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
 .LFE162:
-	.fnend
 	.size	FtlSysFlush, .-FtlSysFlush
-	.align	1
+	.align	2
 	.global	sftl_deinit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_deinit, %function
 sftl_deinit:
-	.fnstart
 .LFB163:
 	.loc 3 806 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.save {r3, lr}
-.LCFI172:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI384:
+	push	{fp, ip, lr, pc}
+.LCFI385:
+	sub	fp, ip, #4
+.LCFI386:
 	.loc 3 807 0
-	ldr	r3, .L1428
+	ldr	r3, .L1410
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1427
+	bne	.L1409
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1228:
-.L1427:
+.LVL1214:
+.L1409:
 	.loc 3 810 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L1429:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L1411:
 	.align	2
-.L1428:
+.L1410:
 	.word	.LANCHOR2
 .LFE163:
-	.fnend
 	.size	sftl_deinit, .-sftl_deinit
-	.align	1
+	.align	2
 	.global	FtlDiscard
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlDiscard, %function
 FtlDiscard:
-	.fnstart
 .LFB168:
 	.loc 3 1157 0
 	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1229:
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-	.pad #8
-.LCFI173:
-.LVL1230:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1215:
+	mov	ip, sp
+.LCFI387:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI388:
+	sub	fp, ip, #4
+.LCFI389:
+	sub	sp, sp, #8
 	.loc 3 1164 0
-	adds	r2, r0, r1
-	ldr	r6, .L1445
+	add	r2, r0, r1
+	ldr	r6, .L1427
 	.loc 3 1157 0
 	mov	r7, r0
 	mov	r5, r1
 	.loc 3 1164 0
 	ldr	r3, [r6, #116]
 	cmp	r2, r3
-	bhi	.L1438
+	.loc 3 1165 0
+	mvnhi	r0, #0
+.LVL1216:
+	.loc 3 1164 0
+	bhi	.L1412
 	.loc 3 1167 0
 	cmp	r1, #31
-	bhi	.L1432
-.LVL1231:
-.L1437:
+	bhi	.L1414
+.LVL1217:
+.L1419:
 	.loc 3 1168 0
-	movs	r0, #0
-.L1430:
+	mov	r0, #0
+.L1412:
 	.loc 3 1201 0
-	add	sp, sp, #8
-.LCFI174:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1232:
-.L1432:
-.LCFI175:
+	sub	sp, fp, #32
+.LCFI390:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL1218:
+.L1414:
+.LCFI391:
 	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1233:
+.LVL1219:
 	.loc 3 1172 0
 	ldrh	r4, [r6, #34]
 	mov	r0, r7
 	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL1234:
+	bl	__udivsi3
+.LVL1220:
 	.loc 3 1173 0
 	smulbb	r3, r0, r4
 	.loc 3 1172 0
 	mov	r8, r0
-.LVL1235:
+.LVL1221:
 	.loc 3 1173 0
-	subs	r7, r7, r3
-.LVL1236:
+	sub	r7, r7, r3
+.LVL1222:
 	uxth	r7, r7
-.LVL1237:
+.LVL1223:
 	.loc 3 1174 0
-	cbz	r7, .L1433
+	cmp	r7, #0
+	beq	.L1415
 	.loc 3 1175 0
-	subs	r4, r4, r7
+	sub	r4, r4, r7
 	.loc 3 1176 0
 	add	r8, r0, #1
 	.loc 3 1175 0
 	cmp	r4, r5
-	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
 	.loc 3 1177 0
-	subs	r5, r5, r4
-.L1433:
+	sub	r5, r5, r4
+.L1415:
 	.loc 3 1184 0
-	ldr	r4, .L1445+4
+	ldr	r4, .L1427+4
 	.loc 3 1180 0
-	mov	r3, #-1
-	str	r3, [sp, #4]
-.LVL1238:
-.L1434:
+	mvn	r3, #0
+	str	r3, [fp, #-36]
+.LVL1224:
+.L1416:
 	.loc 3 1181 0
 	ldrh	r3, [r6, #34]
 	cmp	r5, r3
-	bcs	.L1436
+	bcs	.L1418
 	.loc 3 1194 0
-	ldr	r3, .L1445+4
-	ldr	r2, [r3, #-232]
+	ldr	r3, .L1427+4
+	ldr	r2, [r3, #-4072]
 	cmp	r2, #32
-	bls	.L1437
+	bls	.L1419
 	.loc 3 1196 0
-	movs	r4, #0
-	str	r4, [r3, #-232]
+	mov	r4, #0
+	str	r4, [r3, #-4072]
 	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1239:
+.LVL1225:
 	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1240:
-	b	.L1437
-.L1436:
+.LVL1226:
+	b	.L1419
+.L1418:
 	.loc 3 1182 0
-	movs	r2, #0
-	mov	r1, sp
+	mov	r2, #0
+	sub	r1, fp, #40
 	mov	r0, r8
 	bl	log2phys
-.LVL1241:
+.LVL1227:
 	.loc 3 1183 0
-	ldr	r3, [sp]
-	adds	r3, r3, #1
-.LVL1242:
-	beq	.L1435
+	ldr	r3, [fp, #-40]
+	cmn	r3, #1
+	beq	.L1417
 	.loc 3 1184 0
-	ldr	r3, [r4, #-232]
-.LVL1243:
+	ldr	r3, [r4, #-4072]
 	.loc 3 1186 0
-	movs	r2, #1
-	add	r1, sp, #4
+	mov	r2, #1
+	sub	r1, fp, #36
 	mov	r0, r8
 	.loc 3 1184 0
-	adds	r3, r3, #1
-	str	r3, [r4, #-232]
+	add	r3, r3, #1
+	str	r3, [r4, #-4072]
 	.loc 3 1185 0
 	ldr	r3, [r6, #2488]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r6, #2488]
 	.loc 3 1186 0
 	bl	log2phys
-.LVL1244:
+.LVL1228:
 	.loc 3 1187 0
-	ldr	r0, [sp]
+	ldr	r0, [fp, #-40]
+.LVL1229:
 	ubfx	r0, r0, #10, #16
+.LVL1230:
 	bl	P2V_block_in_plane
-.LVL1245:
+.LVL1231:
 	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1246:
-.L1435:
+.LVL1232:
+.L1417:
 	.loc 3 1191 0
 	ldrh	r3, [r6, #34]
-.LVL1247:
 	.loc 3 1190 0
 	add	r8, r8, #1
 	.loc 3 1191 0
-	subs	r5, r5, r3
-	b	.L1434
-.LVL1248:
-.L1438:
-	.loc 3 1165 0
-	mov	r0, #-1
-	b	.L1430
-.L1446:
+	sub	r5, r5, r3
+	b	.L1416
+.L1428:
 	.align	2
-.L1445:
+.L1427:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 .LFE168:
-	.fnend
 	.size	FtlDiscard, .-FtlDiscard
-	.align	1
+	.align	2
 	.global	FtlGcFreeTempBlock
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	.fnstart
 .LFB258:
 	.loc 5 112 0
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1249:
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-.LCFI176:
-.LVL1250:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1233:
+	mov	ip, sp
+.LCFI392:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI393:
+	sub	fp, ip, #4
+.LCFI394:
+	sub	sp, sp, #4
 	.loc 5 119 0
-	movw	r2, #65535
+	movw	r3, #2420
 	.loc 5 115 0
-	ldr	r4, .L1473
+	ldr	r4, .L1455
 	.loc 5 119 0
-	ldrh	r5, [r4, #2420]
+	movw	r2, #65535
+	ldrh	r5, [r4, r3]
 	.loc 5 115 0
 	ldrh	r1, [r4, #78]
-.LVL1251:
+.LVL1234:
 	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1448
-.LVL1252:
-.L1458:
-	.loc 5 153 0
-	ldrh	r2, [r4, #2420]
+	bne	.L1430
+.LVL1235:
+.L1440:
 	.loc 5 152 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r4, #3960]
 	.loc 5 153 0
+	movw	r3, #2420
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1471
-.L1449:
+	bne	.L1453
+.L1431:
 	.loc 5 154 0
-	movs	r0, #0
-.L1447:
-	.loc 5 199 0
-	add	sp, sp, #12
-.LCFI177:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1253:
-.L1448:
-.LCFI178:
+	mov	r0, #0
+.LVL1236:
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1237:
+.L1430:
 	.loc 5 121 0
-	cbz	r0, .L1451
+	cmp	r0, #0
+	beq	.L1433
 	.loc 5 123 0
-	ldr	r3, .L1473+4
+	ldr	r3, .L1455+4
 	ldrh	r0, [r3, #4]
-.LVL1254:
+.LVL1238:
 	cmp	r0, r2
-	beq	.L1452
-.L1453:
+	beq	.L1434
+.L1435:
 	.loc 5 122 0
-	movs	r1, #2
-.LVL1255:
-.L1451:
+	mov	r1, #2
+.LVL1239:
+.L1433:
 	.loc 5 131 0
-	ldr	r0, .L1473+8
-.LVL1256:
+	ldr	r0, .L1455+8
+.LVL1240:
 	bl	FtlGcScanTempBlk
-.LVL1257:
-	str	r0, [sp, #4]
-.LVL1258:
+.LVL1241:
+	.loc 5 132 0
+	cmn	r0, #1
+	.loc 5 131 0
+	str	r0, [fp, #-44]
+.LVL1242:
 	.loc 5 132 0
-	adds	r0, r0, #1
-	beq	.L1454
+	beq	.L1436
 	.loc 5 135 0
 	ldr	r2, [r4, #2304]
-	ldrh	r3, [r2, r5, lsl #1]
+	lsl	r5, r5, #1
+	ldrh	r3, [r2, r5]
 	cmp	r3, #4
-	bls	.L1455
+	bls	.L1437
 	.loc 5 136 0
-	subs	r3, r3, #5
+	sub	r3, r3, #5
 	.loc 5 137 0
-	movs	r0, #1
+	mov	r0, #1
 	.loc 5 136 0
-	strh	r3, [r2, r5, lsl #1]	@ movhi
+	strh	r3, [r2, r5]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1259:
-.L1455:
+.LVL1243:
+.L1437:
 	.loc 5 139 0
 	ldr	r3, [r4, #3960]
-	cbnz	r3, .L1456
+	cmp	r3, #0
+	bne	.L1438
 	.loc 5 140 0
 	ldr	r3, [r4, #2708]
 	.loc 5 141 0
-	ldr	r0, [sp, #4]
+	ldr	r0, [fp, #-44]
 	.loc 5 140 0
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
 	.loc 5 140 0
 	str	r3, [r4, #2708]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1260:
+.LVL1244:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1261:
-.L1456:
+.LVL1245:
+.L1438:
 	.loc 5 144 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r4, #3960]
-.L1467:
+.L1449:
 	.loc 5 149 0
-	movs	r0, #1
-	b	.L1447
-.LVL1262:
-.L1452:
+	mov	r0, #1
+	.loc 5 199 0
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1246:
+.L1434:
 	.loc 5 124 0
-	movs	r2, #0
+	mov	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	.loc 5 125 0
-	ldrh	r3, [r4, #2320]
+	add	r3, r4, #2320
+	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1453
-	b	.L1451
-.LVL1263:
-.L1454:
+	bhi	.L1435
+	b	.L1433
+.LVL1247:
+.L1436:
 	.loc 5 148 0
-	ldr	r3, .L1473+4
+	ldr	r3, .L1455+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1467
-	b	.L1458
-.LVL1264:
-.L1471:
+	bne	.L1449
+	b	.L1440
+.LVL1248:
+.L1453:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1265:
+.LVL1249:
 	.loc 5 162 0
+	movw	r3, #3176
 	ldrb	r1, [r4, #2427]	@ zero_extendqisi2
+	ldrh	r2, [r4, r3]
 	ldrh	r3, [r4, #78]
-	ldrh	r2, [r4, #3176]
-	muls	r3, r1, r3
+	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1459
+	beq	.L1441
 	.loc 5 162 0 is_stmt 0 discriminator 1
-	movs	r2, #162
-	ldr	r1, .L1473+12
-	ldr	r0, .L1473+16
+	mov	r2, #162
+	ldr	r1, .L1455+12
+	ldr	r0, .L1455+16
 	bl	printk
-.LVL1266:
-.L1459:
+.LVL1250:
+.L1441:
 	.loc 5 163 0 is_stmt 1
-	ldrb	r3, [r4, #2427]	@ zero_extendqisi2
-	.loc 5 165 0
-	movs	r6, #0
-	.loc 5 163 0
+	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
+	movw	r3, #2420
 	ldrh	r0, [r4, #78]
-	.loc 5 166 0
-	mov	r9, #12
+	.loc 5 165 0
+	mov	r6, #0
 	.loc 5 163 0
-	ldr	r2, [r4, #2300]
-	ldrh	r1, [r4, #2420]
-	.loc 5 168 0
-	ldr	r10, .L1473+12
+	ldrh	r3, [r4, r3]
+	ldr	r1, [r4, #2300]
+	.loc 5 165 0
+	ldr	r9, .L1455+20
 	.loc 5 163 0
-	smulbb	r3, r3, r0
+	smulbb	r2, r2, r0
 	.loc 5 168 0
-	ldr	fp, .L1473+16
+	ldr	r10, .L1455+12
 	.loc 5 163 0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+	lsl	r3, r3, #1
+	strh	r2, [r1, r3]	@ movhi
 	.loc 5 164 0
+	movw	r3, #3176
 	ldr	r2, [r4, #2504]
-	ldrh	r3, [r4, #3176]
+	ldrh	r3, [r4, r3]
 	add	r3, r3, r2
 	str	r3, [r4, #2504]
-.LVL1267:
-.L1460:
+.LVL1251:
+.L1442:
 	.loc 5 165 0 discriminator 1
-	ldrh	r2, [r4, #3176]
+	ldrh	r2, [r9]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1464
+	bhi	.L1446
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1268:
+.LVL1252:
 	.loc 5 182 0
-	ldrh	r0, [r4, #2420]
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	beq	.L1465
+	movw	r3, #2420
+	ldr	r1, [r4, #2300]
+	ldrh	r0, [r4, r3]
+	mov	r5, r3
+.LVL1253:
+	lsl	r2, r0, #1
+	ldrh	r2, [r1, r2]
+	cmp	r2, #0
+	beq	.L1447
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1269:
-.L1466:
+.LVL1254:
+.L1448:
+	.loc 5 188 0
+	ldr	r6, .L1455+24
+	.loc 5 186 0
+	mvn	r7, #0
 	.loc 5 187 0
-	movs	r5, #0
-.LVL1270:
+	movw	r3, #3176
 	.loc 5 186 0
-	movw	r6, #65535
-	strh	r6, [r4, #2420]	@ movhi
+	strh	r7, [r4, r5]	@ movhi
 	.loc 5 187 0
-	strh	r5, [r4, #3176]	@ movhi
+	mov	r5, #0
+	strh	r5, [r4, r3]	@ movhi
 	.loc 5 188 0
-	strh	r5, [r4, #3168]	@ movhi
+	strh	r5, [r6]	@ movhi
+	.loc 5 191 0
+	sub	r6, r6, #848
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1271:
+.LVL1255:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1272:
+.LVL1256:
 	.loc 5 191 0
-	ldrh	r3, [r4, #2548]
-	ldrh	r2, [r4, #2320]
+	movw	r3, #2548
+	ldrh	r2, [r6]
+	ldrh	r3, [r4, r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1449
+	.loc 5 192 0
+	movwgt	r3, #2564
 	.loc 5 193 0
-	movs	r3, #20
+	movgt	r2, #20
 	.loc 5 192 0
-	strh	r6, [r4, #2564]	@ movhi
+	strhgt	r7, [r4, r3]	@ movhi
 	.loc 5 193 0
-	strh	r3, [r4, #3124]	@ movhi
-	b	.L1449
-.LVL1273:
-.L1464:
+	movwgt	r3, #3124
+	strhgt	r2, [r4, r3]	@ movhi
+	b	.L1431
+.LVL1257:
+.L1446:
 	.loc 5 166 0
-	uxth	r7, r6
+	uxth	r3, r6
+	mov	r7, #12
 	ldr	r8, [r4, #3172]
+	mul	r7, r7, r3
 	.loc 5 168 0
 	ldr	r3, [r4, #2480]
 	.loc 5 166 0
-	mul	r7, r9, r7
 	add	r5, r8, r7
 	.loc 5 168 0
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1461
+	bcc	.L1443
 	.loc 5 168 0 is_stmt 0 discriminator 1
-	movs	r2, #168
+	mov	r2, #168
 	mov	r1, r10
-	mov	r0, fp
+	ldr	r0, .L1455+16
 	bl	printk
-.LVL1274:
-.L1461:
+.LVL1258:
+.L1443:
 	.loc 5 169 0 is_stmt 1
-	movs	r2, #0
-	add	r1, sp, #4
+	mov	r2, #0
+	sub	r1, fp, #44
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1275:
+.LVL1259:
 	.loc 5 170 0
-	ldr	r3, [sp, #4]
+	ldr	r3, [fp, #-44]
 	ldr	r0, [r8, r7]
 	cmp	r0, r3
-	bne	.L1462
+	bne	.L1444
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1276:
+.LVL1260:
 	.loc 5 172 0
-	movs	r2, #1
+	mov	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
 	.loc 5 172 0
-	adds	r1, r5, #4
+	add	r1, r5, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1277:
+.LVL1261:
 	.loc 5 173 0
 	mov	r0, r7
-.L1472:
+.L1454:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1278:
-.L1463:
-	adds	r6, r6, #1
-	b	.L1460
-.L1462:
+.LVL1262:
+.L1445:
+	add	r6, r6, #1
+	b	.L1442
+.L1444:
 	.loc 5 175 0
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1463
+	beq	.L1445
 	.loc 5 177 0
-	ldrh	r0, [r4, #2420]
-	b	.L1472
-.L1465:
+	ldr	r3, .L1455+8
+	ldrh	r0, [r3]
+	b	.L1454
+.LVL1263:
+.L1447:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1279:
-	b	.L1466
-.L1474:
+.LVL1264:
+	b	.L1448
+.L1456:
 	.align	2
-.L1473:
+.L1455:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2420
 	.word	.LANCHOR1+532
 	.word	.LC1
+	.word	.LANCHOR0+3176
+	.word	.LANCHOR0+3168
 .LFE258:
-	.fnend
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.align	1
+	.align	2
 	.global	FtlGcPageRecovery
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-	.fnstart
 .LFB261:
 	.loc 5 289 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-.LCFI179:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI395:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI396:
+	sub	fp, ip, #4
+.LCFI397:
 	.loc 5 290 0
-	ldr	r4, .L1477
+	ldr	r4, .L1459
+	ldr	r5, .L1459+4
 	ldrh	r1, [r4, #78]
-	addw	r0, r4, #2420
+	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1280:
+.LVL1265:
 	.loc 5 291 0
-	ldrh	r2, [r4, #2422]
+	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4, #78]
 	cmp	r2, r3
-	bcc	.L1475
+	ldmfdcc	sp, {r4, r5, fp, sp, pc}
 .LBB515:
 .LBB516:
 	.loc 5 293 0
-	addw	r0, r4, #3864
+	ldr	r0, .L1459+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1281:
+.LVL1266:
 	.loc 5 294 0
-	movs	r0, #0
+	mov	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1282:
+.LVL1267:
 	.loc 5 295 0
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [r4, #3960]
-.L1475:
-	pop	{r4, pc}
-.L1478:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1460:
 	.align	2
-.L1477:
+.L1459:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+3864
 .LBE516:
 .LBE515:
 .LFE261:
-	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.align	1
+	.align	2
 	.global	FtlPowerLostRecovery
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-	.fnstart
 .LFB233:
 	.loc 2 2081 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI180:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI398:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI399:
+	sub	fp, ip, #4
+.LCFI400:
 	.loc 2 2082 0
-	movs	r5, #0
-	ldr	r4, .L1480
+	ldr	r4, .L1462
+	mov	r6, #0
 	.loc 2 2084 0
-	addw	r6, r4, #2324
+	add	r5, r4, #2320
 	.loc 2 2082 0
-	str	r5, [r4, #3972]
+	str	r6, [r4, #3972]
 	.loc 2 2084 0
-	mov	r0, r6
+	add	r5, r5, #4
+	.loc 2 2086 0
+	add	r4, r4, #2368
+	.loc 2 2084 0
+	mov	r0, r5
 	.loc 2 2086 0
-	addw	r4, r4, #2372
+	add	r4, r4, #4
 	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1283:
+.LVL1268:
 	.loc 2 2085 0
-	mov	r0, r6
+	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1284:
+.LVL1269:
 	.loc 2 2086 0
 	mov	r0, r4
 	bl	FtlRecoverySuperblock
-.LVL1285:
+.LVL1270:
 	.loc 2 2087 0
 	mov	r0, r4
 	bl	FtlSlcSuperblockCheck
-.LVL1286:
+.LVL1271:
 	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1287:
+.LVL1272:
 	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1288:
+.LVL1273:
 	.loc 2 2091 0
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1481:
+	mov	r0, r6
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1463:
 	.align	2
-.L1480:
+.L1462:
 	.word	.LANCHOR0
 .LFE233:
-	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.align	1
+	.align	2
 	.global	Ftl_gc_temp_data_write_back
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-	.fnstart
 .LFB263:
 	.loc 5 316 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI181:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI401:
+	push	{r4, r5, r6, fp, ip, lr, pc}
+.LCFI402:
+	sub	fp, ip, #4
+.LCFI403:
 	.loc 5 320 0
-	movs	r3, #0
-	ldr	r4, .L1489
+	ldr	r4, .L1471
+	mov	r3, #0
 	.loc 5 321 0
-	movs	r5, #0
+	mov	r5, #0
 	.loc 5 322 0
-	movs	r6, #20
+	mov	r6, #20
 	.loc 5 320 0
 	mov	r2, r3
 	ldr	r1, [r4, #3140]
 	ldr	r0, [r4, #3796]
 	bl	FlashProgPages
-.LVL1289:
-.L1483:
+.LVL1274:
+.L1465:
 	.loc 5 321 0 discriminator 1
 	ldr	r1, [r4, #3140]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1486
+	bhi	.L1468
 	.loc 5 335 0
 	ldr	r0, [r4, #3796]
 	bl	FtlGcBufFree
-.LVL1290:
+.LVL1275:
 	.loc 5 337 0
-	ldrh	r3, [r4, #2424]
+	ldr	r3, .L1471+4
 	.loc 5 336 0
-	movs	r0, #0
+	mov	r0, #0
 	str	r0, [r4, #3140]
 	.loc 5 337 0
-	cbnz	r3, .L1482
+	ldrh	r3, [r3, #4]
+	cmp	r3, r0
+	ldmfdne	sp, {r4, r5, r6, fp, sp, pc}
 	.loc 5 338 0
-	movs	r0, #1
+	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1291:
-	b	.L1488
-.L1486:
+.LVL1276:
+	b	.L1470
+.L1468:
 	.loc 5 322 0
-	muls	r3, r6, r3
+	mul	r3, r6, r3
 	ldr	r2, [r4, #3796]
-	adds	r5, r5, #1
-	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r0, r2, #1
-	bne	.L1484
+	add	r5, r5, #1
+	ldr	r0, [r2, r3]
+	add	r1, r2, r3
+	cmn	r0, #1
+	bne	.L1466
 	.loc 5 323 0
-	ldrh	r0, [r4, #2420]
-	movs	r5, #0
-	ldr	r1, [r4, #2300]
-	strh	r5, [r1, r0, lsl #1]	@ movhi
-	.loc 5 324 0
-	strh	r2, [r4, #2420]	@ movhi
+	movw	r1, #2420
+	ldr	ip, [r4, #2300]
+	ldrh	r2, [r4, r1]
+	mov	lr, #0
+	lsl	r2, r2, #1
+	strh	lr, [ip, r2]	@ movhi
 	.loc 5 325 0
 	ldr	r2, [r4, #2708]
-	adds	r2, r2, #1
+	.loc 5 324 0
+	strh	r0, [r4, r1]	@ movhi
+	.loc 5 325 0
+	add	r2, r2, #1
 	str	r2, [r4, #2708]
 	.loc 5 326 0
 	ldr	r2, [r4, #3796]
-	add	r3, r3, r2
+	add	r3, r2, r3
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL1292:
+.LVL1277:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1293:
+.LVL1278:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1294:
-.L1488:
+.LVL1279:
+.L1470:
 	.loc 5 339 0
-	movs	r0, #1
-.L1482:
+	mov	r0, #1
 	.loc 5 342 0
-	pop	{r4, r5, r6, pc}
-.L1484:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1466:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1295:
+.LVL1280:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1296:
-	b	.L1483
-.L1490:
+.LVL1281:
+	b	.L1465
+.L1472:
 	.align	2
-.L1489:
+.L1471:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2420
 .LFE263:
-	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.align	1
+	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-	.fnstart
 .LFB262:
 	.loc 5 300 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI182:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI404:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI405:
+	sub	fp, ip, #4
+.LCFI406:
 	.loc 5 301 0
+	ldr	r4, .L1476
+	movw	r3, #2420
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
-	ldr	r4, .L1494
-	ldrh	r2, [r4, #2420]
 	cmp	r2, r3
-	beq	.L1492
+	beq	.L1474
 	.loc 5 301 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2424]
-	cbnz	r3, .L1493
-.L1492:
+	ldr	r3, .L1476+4
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L1475
+.L1474:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1297:
+.LVL1282:
 	.loc 5 303 0
-	movs	r0, #0
+	mov	r0, #0
 	.loc 5 304 0
-	movs	r5, #0
+	mov	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1298:
+.LVL1283:
 	.loc 5 305 0
-	ldr	r0, .L1494+4
+	ldr	r0, .L1476+4
 	.loc 5 304 0
 	strb	r5, [r4, #2428]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1299:
+.LVL1284:
 	.loc 5 306 0
-	strh	r5, [r4, #3168]	@ movhi
+	ldr	r3, .L1476+8
+	strh	r5, [r3]	@ movhi
 	.loc 5 307 0
-	strh	r5, [r4, #3176]	@ movhi
+	movw	r3, #3176
+	strh	r5, [r4, r3]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1300:
+.LVL1285:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1301:
+.LVL1286:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1302:
-.L1493:
+.LVL1287:
+.L1475:
 	.loc 5 312 0
-	ldr	r0, .L1494+4
+	ldr	r0, .L1476+4
+	bl	get_new_active_ppa
+.LVL1288:
 	.loc 5 313 0
-	pop	{r3, r4, r5, lr}
-.LCFI183:
-	.loc 5 312 0
-	b	get_new_active_ppa
-.LVL1303:
-.L1495:
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1477:
 	.align	2
-.L1494:
+.L1476:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+3168
 .LFE262:
-	.fnend
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.align	1
+	.align	2
 	.global	rk_ftl_garbage_collect
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	.fnstart
 .LFB269:
 	.loc 5 470 0
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1304:
-	.loc 5 478 0
-	ldr	r3, .L1615
-	.loc 5 470 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI184:
-	mov	r7, r0
-	.pad #36
+	@ args = 0, pretend = 0, frame = 28
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1289:
+	mov	ip, sp
+.LCFI407:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI408:
+	sub	fp, ip, #4
+.LCFI409:
 	sub	sp, sp, #36
-.LCFI185:
-	mov	r4, r3
+	.loc 5 470 0
+	mov	r6, r0
 	.loc 5 478 0
+	ldr	r3, .L1591
 	ldr	r0, [r3, #3780]
-.LVL1305:
+.LVL1290:
+	mov	r5, r3
 	cmp	r0, #0
-	bne	.L1571
+	.loc 5 479 0
+	movne	r0, #0
+	.loc 5 478 0
+	bne	.L1478
 	.loc 5 481 0
-	ldrh	r2, [r3, #2312]
+	movw	r2, #2312
+	ldrh	r2, [r3, r2]
 	cmp	r2, #47
-	bls	.L1496
+	bls	.L1478
 	.loc 5 485 0
-	ldr	r2, .L1615+4
+	ldr	r2, .L1591+4
 	ldrh	r1, [r2, #4]
-.LVL1306:
+.LVL1291:
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1498
-.L1501:
+	bne	.L1480
+.L1483:
 .LBB520:
 .LBB521:
 	.loc 5 489 0
-	ldrh	r2, [r4, #3180]
-	movw	r1, #65535
-	cmp	r2, r1
-	bne	.L1499
-.L1500:
+	movw	r3, #3180
+	movw	r0, #65535
+	ldrh	r1, [r5, r3]
+	cmp	r1, r0
+	bne	.L1481
+.L1482:
 	.loc 5 496 0
-	ldr	r3, [r4, #3128]
+	ldr	r3, [r5, #3128]
 	.loc 5 497 0
-	movw	r5, #65535
-	ldrh	r1, [r4, #2564]
+	movw	r2, #2564
+	ldrh	r2, [r5, r2]
+	movw	r4, #65535
 	.loc 5 496 0
-	adds	r3, r3, #1
-	add	r3, r3, r7, lsl #7
+	add	r3, r3, #1
+	add	r3, r3, r6, lsl #7
 	.loc 5 497 0
-	cmp	r1, r5
+	cmp	r2, r4
 	.loc 5 496 0
-	str	r3, [r4, #3128]
+	str	r3, [r5, #3128]
 	.loc 5 497 0
-	bne	.L1502
-	ldrh	r2, [r4, #2420]
-	cmp	r2, r1
-	bne	.L1503
-	ldrh	r8, [r4, #3178]
-	cmp	r8, r2
-	bne	.L1504
+	bne	.L1484
+	movw	r1, #2420
+	ldrh	r4, [r5, r1]
+	cmp	r4, r2
+	.loc 5 473 0
+	movne	r4, r2
+	.loc 5 497 0
+	bne	.L1484
+	movw	r2, #3178
+	ldrh	r8, [r5, r2]
+	cmp	r8, r4
+	bne	.L1484
 	.loc 5 498 0
-	ldrh	r2, [r4, #2320]
+	ldr	r7, .L1591+8
+	ldrh	r2, [r7]
 	cmp	r2, #24
-	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1504
+	.loc 5 473 0
+	movls	r4, r8
+	.loc 5 498 0
+	bls	.L1484
 .LBB522:
 	.loc 5 502 0
-	ldr	r3, .L1615+8
+	ldr	r3, .L1591+12
 	.loc 5 501 0
-	movs	r6, #0
-	str	r6, [r4, #3128]
+	mov	r10, #0
+	str	r10, [r5, #3128]
 	.loc 5 502 0
-	strh	r6, [r3, #-228]	@ movhi
+	strh	r10, [r3, #-4]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1307:
+.LVL1292:
 	.loc 5 504 0
 	cmp	r0, r8
 	.loc 5 503 0
-	mov	r5, r0
+	mov	r4, r0
 	.loc 5 504 0
-	bne	.L1575
+	movne	r8, r0
+	bne	.L1486
 	.loc 5 505 0
-	ldrh	r2, [r4, #2320]
-	ldrh	r3, [r4, #3126]
+	movw	r9, #3126
+	ldrh	r2, [r7]
+	ldrh	r3, [r5, r9]
 	cmp	r2, r3
-	bcs	.L1507
+	bcs	.L1487
 	.loc 5 506 0
-	movs	r0, #64
+	mov	r0, #64
 	bl	List_get_gc_head_node
-.LVL1308:
+.LVL1293:
 	.loc 5 507 0
 	uxth	r3, r0
-	cmp	r3, r5
-	beq	.L1509
+	cmp	r3, r4
+	beq	.L1489
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r0, lsl #1]
+	ldr	r3, [r5, #2300]
+	lsl	r0, r0, #1
+	ldrh	r3, [r3, r0]
 	cmp	r3, #7
-	bhi	.L1510
+	bhi	.L1490
 	.loc 5 509 0
-	mov	r0, r6
+	mov	r0, r10
 	bl	List_get_gc_head_node
-.LVL1309:
-	uxth	r6, r0
+.LVL1294:
+	uxth	r8, r0
 	.loc 5 510 0
-	movs	r3, #128
-	strh	r3, [r4, #3126]	@ movhi
+	mov	r3, #128
+	strh	r3, [r5, r9]	@ movhi
 	.loc 5 520 0
-	cmp	r6, r5
-	beq	.L1509
-.L1506:
+	cmp	r8, r4
+	beq	.L1489
+.L1486:
 	.loc 5 521 0
-	ldr	r3, [r4, #2300]
-	mov	r5, r6
-	ldrh	r1, [r4, #3124]
-	ldrh	r2, [r4, #2320]
-	ldrh	r3, [r3, r6, lsl #1]
-	str	r1, [sp, #4]
-	ldr	r1, [r4, #2304]
-	ldr	r0, .L1615+12
-	ldrh	r1, [r1, r6, lsl #1]
+	movw	r0, #3124
+	ldr	r3, [r5, #2300]
+	ldrh	r0, [r5, r0]
+	lsl	r1, r8, #1
+	ldrh	r2, [r7]
+	mov	r4, r8
+	ldrh	r3, [r3, r1]
+	str	r0, [sp, #4]
+	ldr	r0, [r5, #2304]
+	ldrh	r1, [r0, r1]
+	ldr	r0, .L1591+16
 	str	r1, [sp]
-	mov	r1, r6
+	mov	r1, r8
 	bl	printk
-.LVL1310:
-	b	.L1509
-.L1498:
+.LVL1295:
+	b	.L1489
+.L1480:
 .LBE522:
 .LBE521:
 .LBE520:
 	.loc 5 485 0 discriminator 1
-	ldrh	r3, [r3, #2420]
+	movw	r1, #2420
+	ldrh	r3, [r3, r1]
 	cmp	r3, r2
-	beq	.L1501
+	beq	.L1483
 	.loc 5 486 0
-	movs	r0, #1
+	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1311:
+.LVL1296:
 	cmp	r0, #0
-	beq	.L1501
+	beq	.L1483
 	.loc 5 487 0
-	movs	r0, #1
-	b	.L1496
-.L1499:
-.LBB528:
+	mov	r0, #1
+	b	.L1478
+.L1481:
+.LBB527:
 .LBB525:
 	.loc 5 489 0
-	ldrh	r3, [r4, #3178]
-	cmp	r3, r1
+	movw	r2, #3178
+	ldrh	ip, [r5, r2]
+	cmp	ip, r0
 	.loc 5 490 0
-	itt	eq
-	strheq	r2, [r4, #3178]	@ movhi
+	strheq	r1, [r5, r2]	@ movhi
 	.loc 5 491 0
-	strheq	r3, [r4, #3180]	@ movhi
-	b	.L1500
-.L1510:
+	mvneq	r2, #0
+	strheq	r2, [r5, r3]	@ movhi
+	b	.L1482
+.L1490:
 .LBB523:
 	.loc 5 512 0
-	movs	r3, #64
-.L1608:
+	mov	r3, #64
+.L1583:
 	.loc 5 516 0
-	strh	r3, [r4, #3126]	@ movhi
-.L1509:
+	strh	r3, [r5, r9]	@ movhi
+.L1489:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1312:
+.LVL1297:
+.L1484:
 .LBE523:
 	.loc 5 527 0
-	cmp	r7, #0
-	bne	.L1512
-	movw	r3, #65535
-	cmp	r5, r3
-	bne	.L1512
-.L1569:
+	movw	r2, #65535
+	sub	r3, r4, r2
+	clz	r3, r3
+	lsr	r3, r3, #5
+	cmp	r6, #0
+	movne	r6, #0
+	andeq	r6, r3, #1
+.LVL1298:
+	cmp	r6, #0
+	beq	.L1492
 	.loc 5 528 0
-	ldrh	r3, [r4, #2320]
+	ldr	r3, .L1591+8
+	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1576
+	.loc 5 529 0
+	movhi	r6, #1
+.LVL1299:
+	.loc 5 528 0
+	bhi	.L1493
+	ldrh	r6, [r5, #78]
+.LVL1300:
 	.loc 5 530 0
 	cmp	r3, #16
-	ldrh	r6, [r4, #78]
-	bls	.L1514
 	.loc 5 531 0
-	lsrs	r6, r6, #5
-.LVL1313:
-.L1513:
+	lsrhi	r6, r6, #5
+.LVL1301:
+	.loc 5 530 0
+	bhi	.L1493
+	.loc 5 532 0
+	cmp	r3, #12
+	.loc 5 533 0
+	lsrhi	r6, r6, #4
+.LVL1302:
+	.loc 5 532 0
+	bhi	.L1493
+	.loc 5 534 0
+	cmp	r3, #8
+	.loc 5 535 0
+	lsrhi	r6, r6, #2
+.LVL1303:
+.L1493:
 	.loc 5 539 0
-	ldrh	r2, [r4, #3124]
-	cmp	r2, r3
-	bcs	.L1517
+	movw	r2, #3124
+	ldrh	r1, [r5, r2]
+	cmp	r1, r3
+	bcs	.L1497
 	.loc 5 540 0
-	ldrh	r3, [r4, #2420]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1518
-	ldrh	r2, [r4, #3178]
-	cmp	r2, r3
-	bne	.L1518
+	movw	r3, #2420
+	movw	r1, #65535
+	ldrh	r3, [r5, r3]
+	cmp	r3, r1
+	bne	.L1498
+	movw	r1, #3178
+	ldrh	r1, [r5, r1]
+	cmp	r1, r3
+	bne	.L1498
 	.loc 5 542 0
-	ldr	r3, .L1615+8
-	ldrh	r0, [r3, #-228]
-	cbnz	r0, .L1519
-	ldr	r3, [r4, #2480]
-	ldr	r2, [r4, #2476]
+	ldr	r3, .L1591+12
+	ldrh	r0, [r3, #-4]
+	cmp	r0, #0
+	bne	.L1499
+	ldr	r3, [r5, #2480]
+	ldr	r1, [r5, #2476]
 	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, lsr #2
-	bcs	.L1520
-.L1519:
+	cmp	r1, r3, lsr #2
+	.loc 5 545 0
+	movcs	r3, #18
+	.loc 5 542 0
+	bcs	.L1584
+.L1499:
 	.loc 5 543 0
-	ldrh	r3, [r4, #2548]
+	movw	r3, #2548
+	movw	r2, #3124
+	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-.L1609:
+	asr	r3, r3, #2
+.L1584:
 	.loc 5 545 0
-	strh	r3, [r4, #3124]	@ movhi
+	strh	r3, [r5, r2]	@ movhi
 	.loc 5 546 0
-	movs	r3, #0
-	str	r3, [r4, #3136]
-.LVL1314:
-.L1496:
+	mov	r3, #0
+	str	r3, [r5, #3136]
+.LVL1304:
+.L1478:
 .LBE525:
-.LBE528:
+.LBE527:
 	.loc 5 754 0
-	add	sp, sp, #36
-.LCFI186:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1315:
-.L1507:
-.LCFI187:
-.LBB529:
+	sub	sp, fp, #40
+.LCFI410:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1305:
+.L1487:
+.LCFI411:
+.LBB528:
 .LBB526:
 .LBB524:
 	.loc 5 516 0
-	movs	r3, #80
-	b	.L1608
-.L1575:
-	.loc 5 504 0
-	mov	r6, r0
-	b	.L1506
-.L1514:
+	mov	r3, #80
+	b	.L1583
+.LVL1306:
+.L1498:
 .LBE524:
-	.loc 5 532 0
-	cmp	r3, #12
-	bls	.L1515
-	.loc 5 533 0
-	lsrs	r6, r6, #4
-.LVL1316:
-	b	.L1513
-.LVL1317:
-.L1515:
-	.loc 5 534 0
-	cmp	r3, #8
-	bls	.L1513
-	.loc 5 535 0
-	lsrs	r6, r6, #2
-.LVL1318:
-	b	.L1513
-.LVL1319:
-.L1576:
-	.loc 5 529 0
-	movs	r6, #1
-.LVL1320:
-	b	.L1513
-.L1520:
-	.loc 5 545 0
-	movs	r3, #18
-	b	.L1609
-.L1518:
 	.loc 5 549 0
-	ldrh	r3, [r4, #2548]
+	movw	r3, #2548
+	movw	r2, #3124
+	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r4, #3124]	@ movhi
-.L1517:
+	asr	r3, r3, #2
+	strh	r3, [r5, r2]	@ movhi
+.L1497:
 	.loc 5 551 0
-	ldrh	r3, [r4, #3182]
-	cbz	r3, .L1577
+	movw	r3, #3182
+	movw	r4, #65535
+	ldrh	r3, [r5, r3]
+	cmp	r3, #0
 	.loc 5 552 0
-	adds	r6, r6, #32
-.LVL1321:
-	uxth	r6, r6
-.LVL1322:
-.L1577:
-	.loc 5 551 0
-	movw	r5, #65535
-.L1523:
+	addne	r6, r6, #32
+.LVL1307:
+	uxthne	r6, r6
+.LVL1308:
+.L1503:
 	.loc 5 595 0
-	ldrh	r3, [r4, #2564]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1532
+	movw	r3, #2564
+	ldrh	r2, [r5, r3]
+	movw	r1, #65535
+	cmp	r2, r1
+	bne	.L1512
 	.loc 5 596 0
-	cmp	r5, r3
-	beq	.L1533
+	cmp	r4, r2
 	.loc 5 597 0
-	strh	r5, [r4, #2564]	@ movhi
-.L1534:
+	strhne	r4, [r5, r3]	@ movhi
+	.loc 5 596 0
+	bne	.L1514
+	.loc 5 598 0
+	movw	r2, #3178
+	ldrh	r3, [r5, r2]
+	cmp	r3, r4
+	beq	.L1514
+	.loc 5 600 0
+	ldr	r1, [r5, #2300]
+	lsl	r3, r3, #1
+	ldrh	r3, [r1, r3]
+	cmp	r3, #0
+	.loc 5 601 0
+	mvneq	r3, #0
+	strheq	r3, [r5, r2]	@ movhi
+	.loc 5 602 0
+	movw	r3, #3178
+	ldrh	r1, [r5, r3]
+	movw	r2, #2564
+	strh	r1, [r5, r2]	@ movhi
+	.loc 5 603 0
+	mvn	r2, #0
+	strh	r2, [r5, r3]	@ movhi
+.L1514:
 	.loc 5 607 0
-	ldrh	r0, [r4, #2564]
-	movw	r7, #65535
-.LVL1323:
+	movw	r7, #2564
 	.loc 5 606 0
-	movs	r3, #0
-	strb	r3, [r4, #2572]
+	mov	r3, #0
+	.loc 5 607 0
+	ldrh	r0, [r5, r7]
+	.loc 5 606 0
+	strb	r3, [r5, #2572]
 	.loc 5 607 0
-	cmp	r0, r7
-	beq	.L1532
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1512
 	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1324:
-	cbz	r0, .L1537
+.LVL1309:
+	cmp	r0, #0
+	.loc 5 611 0
+	ldr	r8, .L1591+20
 	.loc 5 609 0
-	strh	r7, [r4, #2564]	@ movhi
-.L1537:
+	mvnne	r3, #0
+	strhne	r3, [r5, r7]	@ movhi
 	.loc 5 611 0
-	ldrh	r2, [r4, #2564]
+	movw	r7, #2564
+	ldrh	r2, [r5, r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1532
+	beq	.L1512
 	.loc 5 612 0
-	ldr	r0, .L1615+16
+	mov	r0, r8
 	bl	make_superblock
-.LVL1325:
+.LVL1310:
 	.loc 5 615 0
-	ldr	r2, .L1615+8
+	ldr	r2, .L1591+12
 	.loc 5 613 0
-	movs	r3, #0
-	strh	r3, [r4, #2566]	@ movhi
+	mov	r3, #0
+	strh	r3, [r8, #2]	@ movhi
 	.loc 5 614 0
-	strb	r3, [r4, #2570]
+	strb	r3, [r5, #2570]
 	.loc 5 615 0
-	strh	r3, [r2, #-226]	@ movhi
+	strh	r3, [r2, #-2]	@ movhi
 	.loc 5 616 0
-	ldrh	r1, [r4, #2564]
-	ldr	r3, [r4, #2300]
-	ldrh	r3, [r3, r1, lsl #1]
-	strh	r3, [r2, #-224]	@ movhi
-.LVL1326:
-.L1532:
+	ldrh	r3, [r5, r7]
+	ldr	r1, [r5, #2300]
+	lsl	r3, r3, #1
+	ldrh	r3, [r1, r3]
+	strh	r3, [r2]	@ movhi
+.L1512:
 	.loc 5 621 0
-	ldrh	r3, [r4, #2564]
-	ldrh	r2, [r4, #2324]
+	movw	r3, #2564
+	movw	r2, #2324
+	ldrh	r3, [r5, r3]
+	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1538
-	ldrh	r2, [r4, #2372]
+	beq	.L1518
+	movw	r2, #2372
+	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1538
-	.loc 5 662 0
-	ldr	r7, .L1615+8
-.LVL1327:
-.L1539:
 	.loc 5 627 0
-	ldrh	r9, [r4, #2564]
-	movw	r3, #65535
-	cmp	r9, r3
-	bne	.L1540
-	.loc 5 628 0
-	movs	r3, #0
-	.loc 5 643 0
-	mov	r10, r3
-.LVL1328:
-	.loc 5 628 0
-	str	r3, [r4, #3136]
-.L1541:
-	.loc 5 631 0
-	ldrh	r8, [r4, #3132]
-.LVL1329:
-	mov	r0, r8
-	bl	List_get_gc_head_node
-.LVL1330:
-	uxth	fp, r0
-	.loc 5 632 0
-	cmp	fp, r9
-	.loc 5 631 0
-	strh	fp, [r4, #2564]	@ movhi
-	.loc 5 632 0
-	bne	.L1542
-	.loc 5 633 0
-	movs	r3, #0
-	.loc 5 634 0
-	movs	r0, #8
-	.loc 5 633 0
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1496
-.LVL1331:
-.L1524:
-	.loc 5 558 0
-	movs	r3, #0
+	ldrne	r7, .L1591
+	movne	r5, r7
+	.loc 5 621 0
+	bne	.L1519
+.L1518:
+	.loc 5 622 0
+	mvn	r2, #0
+	movw	r3, #2564
+.LVL1311:
+.L1589:
+	.loc 5 647 0
+	strh	r2, [r5, r3]	@ movhi
+	.loc 5 648 0
+	ldr	r3, .L1591+12
+.LVL1312:
+.L1590:
+	ldrh	r0, [r3, #-4]
+	b	.L1478
+.LVL1313:
+.L1492:
+	.loc 5 557 0
+	movw	r1, #2420
+	ldrh	r8, [r5, r1]
+	cmp	r8, r2
+	bne	.L1561
+	movw	r2, #3178
+	ldrh	r2, [r5, r2]
+	cmp	r2, r8
+	movne	r3, #0
+	andeq	r3, r3, #1
+	cmp	r3, #0
+	beq	.L1561
+	movw	r3, #2564
+	ldrh	r3, [r5, r3]
+	cmp	r3, r8
+	beq	.L1504
+.L1509:
+	.loc 5 556 0
+	mov	r4, r8
+.L1561:
+	mov	r6, #1
+.LVL1314:
+	b	.L1503
+.LVL1315:
+.L1504:
 	.loc 5 560 0
-	ldrh	r7, [r4, #2320]
-.LVL1332:
+	ldr	r7, .L1591+8
+	movw	r2, #3124
+	ldrh	r3, [r5, r2]
 	.loc 5 558 0
-	str	r3, [r4, #3136]
+	str	r6, [r5, #3136]
 	.loc 5 560 0
-	ldrh	r3, [r4, #3124]
-	ldr	r5, .L1615+8
-	cmp	r3, r7
-	bcs	.L1525
+	ldrh	r9, [r7]
+	ldr	r4, .L1591+12
+	cmp	r3, r9
+	bcs	.L1505
 	.loc 5 561 0
-	ldrh	r3, [r5, #-228]
-	cbnz	r3, .L1526
-	ldr	r3, [r4, #2480]
-	ldr	r2, [r4, #2476]
+	ldrh	r3, [r4, #-4]
+	cmp	r3, #0
+	bne	.L1506
+	ldr	r3, [r5, #2480]
+	ldr	r1, [r5, #2476]
 	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, lsr #2
-	bcs	.L1527
-.L1526:
+	cmp	r1, r3, lsr #2
+	.loc 5 564 0
+	movcs	r3, #18
+	.loc 5 561 0
+	bcs	.L1585
+.L1506:
 	.loc 5 562 0
-	ldrh	r3, [r4, #2548]
+	movw	r3, #2548
+	movw	r2, #3124
+	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-.L1610:
+	asr	r3, r3, #2
+.L1585:
 	.loc 5 564 0
-	strh	r3, [r4, #3124]	@ movhi
-.L1612:
+	strh	r3, [r5, r2]	@ movhi
+.L1588:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1333:
+.LVL1316:
 	.loc 5 579 0
-	ldrh	r0, [r5, #-228]
-	b	.L1496
-.L1527:
-	.loc 5 564 0
-	movs	r3, #18
-	b	.L1610
-.L1525:
+	ldrh	r0, [r4, #-4]
+	b	.L1478
+.L1505:
 	.loc 5 572 0
-	ldrh	r0, [r5, #-228]
+	ldrh	r0, [r4, #-4]
 	cmp	r0, #0
-	bne	.L1529
+	bne	.L1509
 	.loc 5 573 0
-	ldrh	r6, [r4, #2548]
+	movw	r3, #2548
+	ldrh	r6, [r5, r3]
 	add	r3, r6, r6, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r4, #3124]	@ movhi
+	asr	r3, r3, #2
+	strh	r3, [r5, r2]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1334:
+.LVL1317:
 	.loc 5 575 0
-	ldr	r3, [r4, #2300]
 	uxth	r0, r0
-	ldrh	r1, [r4, #80]
-	ldrh	r2, [r3, r0, lsl #1]
-	ldrh	r3, [r4, #8]
-	muls	r3, r1, r3
+	ldr	r3, [r5, #2300]
+	ldrh	r1, [r5, #80]
+	lsl	r0, r0, #1
+	ldrh	r2, [r3, r0]
+	ldrh	r3, [r5, #8]
+	mul	r3, r3, r1
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1530
+	ble	.L1510
 	.loc 5 576 0
-	subs	r6, r6, #1
+	sub	r6, r6, #1
 	.loc 5 575 0
-	cmp	r7, r6
-	bge	.L1612
-.L1530:
+	cmp	r9, r6
+	bge	.L1588
+.L1510:
 	.loc 5 584 0
 	cmp	r2, #0
-	bne	.L1529
+	bne	.L1509
 	.loc 5 585 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1335:
+.LVL1318:
 	.loc 5 586 0
-	ldrh	r0, [r4, #2320]
-	adds	r0, r0, #1
-	b	.L1496
-.LVL1336:
-.L1533:
-	.loc 5 598 0
-	ldrh	r3, [r4, #3178]
-	cmp	r3, r5
-	beq	.L1534
-	.loc 5 600 0
-	ldr	r2, [r4, #2300]
-	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1535
-	.loc 5 601 0
-	strh	r5, [r4, #3178]	@ movhi
-.L1535:
-	.loc 5 602 0
-	ldrh	r3, [r4, #3178]
-	strh	r3, [r4, #2564]	@ movhi
-	.loc 5 603 0
-	movw	r3, #65535
-	strh	r3, [r4, #3178]	@ movhi
-	b	.L1534
-.L1616:
-	.align	2
-.L1615:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LANCHOR3
-	.word	.LC103
-	.word	.LANCHOR0+2564
-.L1538:
-	.loc 5 622 0
-	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
-.LVL1337:
-.L1613:
-	.loc 5 648 0
-	ldr	r3, .L1617
-	ldrh	r0, [r3, #-228]
-	b	.L1496
-.LVL1338:
-.L1542:
-	str	r0, [sp, #8]
+	ldrh	r0, [r7]
+	add	r0, r0, #1
+	b	.L1478
+.LVL1319:
+.L1522:
+	uxth	r2, r0
+	str	r1, [fp, #-52]
+	add	r10, r10, #1
 	.loc 5 636 0
-	mov	r0, fp
+	mov	r0, r2
+	str	r2, [fp, #-48]
 	bl	IsBlkInGcList
-.LVL1339:
-	add	r8, r8, #1
-	ldr	r3, [sp, #8]
-	cbz	r0, .L1543
+.LVL1320:
+	cmp	r0, #0
+	ldr	r2, [fp, #-48]
+	ldr	r1, [fp, #-52]
 	.loc 5 637 0
-	strh	r8, [r4, #3132]	@ movhi
-	b	.L1541
-.L1543:
+	strhne	r10, [r9]	@ movhi
+	.loc 5 636 0
+	bne	.L1521
 	.loc 5 641 0
-	uxth	r0, r3
-	ldrh	ip, [r4, #8]
-	ldrh	r3, [r4, #78]
+	ldrh	lr, [r5, #8]
 	.loc 5 640 0
-	uxth	r8, r8
+	uxth	r10, r10
 	.loc 5 641 0
-	ldr	r2, [r4, #2300]
+	ldrh	r3, [r5, #78]
+	lsl	r2, r2, #1
+	ldr	r0, [r5, #2300]
 	.loc 5 640 0
-	strh	r8, [r4, #3132]	@ movhi
+	strh	r10, [r9]	@ movhi
 	.loc 5 641 0
-	mul	r3, ip, r3
-	ldrh	r1, [r2, r0, lsl #1]
-	add	ip, r3, r3, lsr #31
-	cmp	r1, ip, asr #1
-	bgt	.L1545
+	mul	r3, lr, r3
+	ldrh	ip, [r0, r2]
+	add	lr, r3, r3, lsr #31
+	cmp	ip, lr, asr #1
+	bgt	.L1525
 	.loc 5 642 0
-	cmp	r8, #48
-	bls	.L1546
-	cmp	r1, #8
-	bls	.L1546
-	ldrh	r1, [r4, #3168]
-	cmp	r1, #35
-	bhi	.L1546
-.L1545:
+	cmp	ip, #8
+	cmphi	r10, #48
+	bls	.L1526
+	ldr	ip, .L1591+24
+	ldrh	ip, [ip]
+	cmp	ip, #35
+	bhi	.L1526
+.L1525:
 	.loc 5 643 0
-	strh	r10, [r4, #3132]	@ movhi
-.L1546:
+	ldr	lr, .L1591+28
+	mov	ip, #0
+	strh	ip, [lr]	@ movhi
+.L1526:
 	.loc 5 645 0
-	ldrh	r2, [r2, r0, lsl #1]
-	cmp	r3, r2
-	bgt	.L1547
-	cmp	r5, r9
-	bne	.L1547
-	.loc 5 647 0
-	movs	r3, #0
+	ldrh	ip, [r0, r2]
+	movw	r0, #65535
+	cmp	r3, ip
+	cmple	r4, r0
+	moveq	r3, #1
+	movne	r3, #0
+	bne	.L1527
 	.loc 5 646 0
-	strh	r5, [r4, #2564]	@ movhi
+	mvn	r2, #0
+	movw	r3, #2564
+	strh	r2, [r5, r3]	@ movhi
 	.loc 5 647 0
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1613
-.L1547:
+	mov	r2, #0
+	movw	r3, #3132
+	b	.L1589
+.L1527:
 	.loc 5 651 0
-	cbnz	r2, .L1548
+	cmp	ip, #0
+	bne	.L1528
 	.loc 5 652 0
-	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1340:
+.LVL1321:
 	.loc 5 653 0
-	ldrh	r3, [r4, #3132]
-	adds	r3, r3, #1
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1541
-.L1548:
+	ldr	r3, .L1591+28
+	ldr	r2, .L1591+28
+	ldrh	r3, [r3]
+	add	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	b	.L1521
+.L1528:
 	.loc 5 656 0
-	movs	r3, #0
-	strb	r3, [r4, #2572]
+	strb	r3, [r5, #2572]
 	.loc 5 658 0
-	ldrh	r3, [r4, #2324]
-	cmp	r3, fp
-	bne	.L1549
+	ldr	r3, .L1591+32
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bne	.L1529
 	movw	r2, #658
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1591+36
+	ldr	r0, .L1591+40
 	bl	printk
-.LVL1341:
-.L1549:
+.LVL1322:
+.L1529:
 	.loc 5 659 0
-	ldrh	r2, [r4, #2564]
-	ldrh	r3, [r4, #2372]
+	ldr	r3, .L1591+44
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1550
+	bne	.L1530
 	movw	r2, #659
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1591+36
+	ldr	r0, .L1591+40
 	bl	printk
-.LVL1342:
-.L1550:
+.LVL1323:
+.L1530:
 	.loc 5 660 0
-	ldrh	r2, [r4, #2564]
-	ldrh	r3, [r4, #2420]
+	ldr	r3, .L1591+48
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1551
+	bne	.L1531
 	mov	r2, #660
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1591+36
+	ldr	r0, .L1591+40
 	bl	printk
-.LVL1343:
-.L1551:
+.LVL1324:
+.L1531:
 	.loc 5 661 0
-	ldr	r0, .L1617+12
+	ldr	r0, .L1591+20
 	bl	make_superblock
-.LVL1344:
+.LVL1325:
 	.loc 5 663 0
-	ldrh	r1, [r4, #2564]
+	ldrh	r2, [r8]
 	.loc 5 662 0
-	movs	r3, #0
+	mov	r3, #0
+	ldr	r1, .L1591+12
 	.loc 5 663 0
-	ldr	r2, [r4, #2300]
+	ldr	r0, [r5, #2300]
+	lsl	r2, r2, #1
 	.loc 5 662 0
-	strh	r3, [r7, #-226]	@ movhi
+	strh	r3, [r1, #-2]	@ movhi
 	.loc 5 663 0
-	ldrh	r2, [r2, r1, lsl #1]
+	ldrh	r2, [r0, r2]
 	.loc 5 664 0
-	strh	r3, [r4, #2566]	@ movhi
+	strh	r3, [r8, #2]	@ movhi
 	.loc 5 665 0
-	strb	r3, [r4, #2570]
+	strb	r3, [r5, #2570]
 	.loc 5 663 0
-	strh	r2, [r7, #-224]	@ movhi
-.LVL1345:
-.L1540:
+	strh	r2, [r1]	@ movhi
+.LVL1326:
+.L1520:
 	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1346:
+.LVL1327:
 	.loc 5 674 0
-	movs	r3, #1
-	str	r3, [r4, #3780]
+	mov	r3, #1
+	str	r3, [r5, #3780]
 	.loc 5 675 0
-	ldrh	r3, [r4, #78]
-.LVL1347:
-	str	r3, [sp, #12]
+	ldrh	r3, [r5, #78]
+.LVL1328:
+	str	r3, [fp, #-56]
 	.loc 5 676 0
-	ldrh	r3, [r4, #2566]
-.LVL1348:
-	ldr	r1, [sp, #12]
-.LVL1349:
-	adds	r2, r3, r6
+	ldrh	r3, [r8, #2]
+.LVL1329:
+	ldr	r1, [fp, #-56]
+.LVL1330:
+	add	r2, r3, r6
 	cmp	r2, r1
 	.loc 5 677 0
-	itt	gt
 	movgt	r2, r1
 	subgt	r6, r2, r3
-.LVL1350:
+.LVL1331:
 	.loc 5 689 0
 	mov	r3, #0
 	.loc 5 677 0
-	it	gt
 	uxthgt	r6, r6
-.LVL1351:
-.L1611:
-	str	r3, [sp, #8]
+.LVL1332:
+.L1587:
+	str	r3, [fp, #-52]
 	.loc 5 679 0
-	ldrh	r3, [sp, #8]
+	ldrh	r3, [fp, #-52]
+	ldr	r8, .L1591+20
+.LVL1333:
 	cmp	r6, r3
-	bls	.L1561
+	bls	.L1541
 	.loc 5 684 0
-	ldr	r3, [sp, #8]
+	ldrh	r9, [r8, #2]
+	mov	r2, #0
+	ldr	r3, [fp, #-52]
 	.loc 5 683 0
 	movw	r10, #65535
-.LVL1352:
-	.loc 5 684 0
-	ldrh	r1, [r4, #2566]
-	mov	fp, #20
+.LVL1334:
 	.loc 5 681 0
-	ldrh	lr, [r4, #8]
+	ldrh	ip, [r7, #8]
 	.loc 5 684 0
-	ldr	r0, [r4, #3156]
-	add	r1, r1, r3
-	movs	r3, #0
-	ldr	ip, .L1617+16
-	mov	r8, r3
-	b	.L1562
-.LVL1353:
-.L1555:
+	ldr	r0, [r7, #3156]
+	add	r9, r9, r3
+	add	r3, r8, #14
+	mov	r8, r2
+.LVL1335:
+	b	.L1542
+.LVL1336:
+.L1535:
 	.loc 5 682 0
-	ldrh	r2, [ip, #2]!
-.LVL1354:
+	ldrh	r1, [r3, #2]!
+.LVL1337:
+	add	r2, r2, #1
 	.loc 5 683 0
-	cmp	r2, r10
-	beq	.L1554
-	.loc 5 684 0
-	mla	r9, fp, r8, r0
-	.loc 5 685 0
-	add	r8, r8, #1
-.LVL1355:
+	cmp	r1, r10
 	.loc 5 684 0
-	orr	r2, r1, r2, lsl #10
-.LVL1356:
+	movne	lr, #20
+	orrne	r1, r9, r1, lsl #10
+.LVL1338:
+	mlane	lr, lr, r8, r0
 	.loc 5 685 0
-	uxth	r8, r8
-.LVL1357:
+	addne	r8, r8, #1
+.LVL1339:
+	uxthne	r8, r8
+.LVL1340:
 	.loc 5 684 0
-	str	r2, [r9, #4]
-.LVL1358:
-.L1554:
-	adds	r3, r3, #1
-.LVL1359:
-.L1562:
+	strne	r1, [lr, #4]
+.LVL1341:
+.L1542:
 	.loc 5 681 0
-	uxth	r2, r3
-.LVL1360:
-	cmp	lr, r2
-	bhi	.L1555
+	uxth	r1, r2
+.LVL1342:
+	cmp	ip, r1
+	bhi	.L1535
 	.loc 5 689 0
-	mov	fp, #0
-	ldrb	r2, [r4, #2572]	@ zero_extendqisi2
+	ldrb	r2, [r7, #2572]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.LVL1361:
-.L1556:
+.LVL1343:
+	mov	r3, #0
+.LVL1344:
+.L1586:
+	str	r3, [fp, #-48]
 	.loc 5 691 0
-	uxth	r3, fp
-	cmp	r8, r3
-	bhi	.L1560
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	b	.L1611
-.L1560:
+	ldrh	r3, [fp, #-48]
+	cmp	r3, r8
+	ldrcs	r3, [fp, #-52]
+	addcs	r3, r3, #1
+	bcs	.L1587
+.L1540:
+	ldr	r3, [fp, #-48]
 	mov	r9, #20
+	mul	r9, r9, r3
 	.loc 5 692 0
-	ldr	r3, [r4, #3156]
-	mul	r9, r9, fp
+	ldr	r3, [r7, #3156]
 	add	r2, r3, r9
 	.loc 5 693 0
 	ldr	r3, [r3, r9]
-	adds	r3, r3, #1
-	beq	.L1557
+	cmn	r3, #1
+	beq	.L1537
 	.loc 5 692 0
 	ldr	r10, [r2, #12]
 	.loc 5 693 0
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1557
+	bne	.L1537
 	.loc 5 695 0
 	ldr	r3, [r10, #8]
-.LVL1362:
+.LVL1345:
 	.loc 5 696 0
-	adds	r2, r3, #1
-	bne	.L1558
+	cmn	r3, #1
+	bne	.L1538
 	mov	r2, #696
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
-	str	r3, [sp, #16]
+	ldr	r1, .L1591+36
+	ldr	r0, .L1591+40
+	str	r3, [fp, #-60]
 	bl	printk
-.LVL1363:
-	ldr	r3, [sp, #16]
-.LVL1364:
-.L1558:
+.LVL1346:
+	ldr	r3, [fp, #-60]
+.LVL1347:
+.L1538:
 	.loc 5 697 0
-	movs	r2, #0
+	mov	r2, #0
 	mov	r0, r3
-	add	r1, sp, #28
+	sub	r1, fp, #44
 	bl	log2phys
-.LVL1365:
+.LVL1348:
 	.loc 5 698 0
-	ldr	r0, [r4, #3156]
-	ldr	r3, [sp, #28]
+	ldr	r0, [r5, #3156]
+	ldr	r3, [fp, #-44]
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1557
+	bne	.L1537
 	.loc 5 700 0
-	ldrh	r3, [r7, #-226]
+	ldr	r3, .L1591+52
 	.loc 5 701 0
-	movs	r2, #20
-	ldr	r1, [r4, #3140]
-	str	r2, [sp, #20]
+	mov	r1, #20
+	ldr	lr, [r5, #3140]
+	ldr	r0, [r0, #16]
 	.loc 5 700 0
-	adds	r3, r3, #1
-	strh	r3, [r7, #-226]	@ movhi
+	ldrh	r2, [r3]
 	.loc 5 701 0
-	ldr	r3, [r4, #3796]
-	mla	r3, r2, r1, r3
-	ldr	r1, [r0, #16]
-	str	r1, [r3, #16]
-	str	r3, [sp, #16]
+	str	r1, [fp, #-64]
+	.loc 5 700 0
+	add	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	.loc 5 701 0
+	ldr	r2, [r5, #3796]
+	.loc 5 700 0
+	str	r3, [fp, #-68]
+	.loc 5 701 0
+	mla	r2, r1, lr, r2
+	str	r0, [r2, #16]
+	str	r2, [fp, #-60]
 	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1366:
-	ldr	r3, [sp, #16]
+.LVL1349:
+	ldr	r2, [fp, #-60]
 	.loc 5 703 0
-	ldr	r1, [r4, #3796]
-	ldr	r2, [sp, #20]
+	ldr	r1, [fp, #-64]
 	.loc 5 702 0
-	str	r0, [r3, #4]
+	str	r0, [r2, #4]
 	.loc 5 703 0
-	ldr	r3, [r4, #3140]
-	mla	r3, r2, r3, r1
-	ldr	r2, [r4, #3156]
+	ldr	r0, [r5, #3140]
+	ldr	r2, [r5, #3796]
+	mla	r1, r1, r0, r2
+	ldr	r2, [r5, #3156]
 	add	r2, r2, r9
-	ldr	r1, [r2, #8]
-	str	r1, [r3, #8]
-	.loc 5 712 0
-	movs	r1, #1
+	ldr	r0, [r2, #8]
+	str	r0, [r1, #8]
 	.loc 5 704 0
 	ldr	r2, [r2, #12]
-	str	r2, [r3, #12]
+	str	r2, [r1, #12]
 	.loc 5 705 0
-	ldr	r3, [sp, #28]
-.LVL1367:
-	str	r3, [r10, #12]
+	ldr	r2, [fp, #-44]
+.LVL1350:
+	str	r2, [r10, #12]
 	.loc 5 706 0
-	ldrh	r3, [r4, #2420]
-.LVL1368:
-	strh	r3, [r10, #2]	@ movhi
+	ldr	r2, .L1591+48
+.LVL1351:
+	ldrh	r1, [r2]
+	str	r2, [fp, #-60]
+	strh	r1, [r10, #2]	@ movhi
 	.loc 5 709 0
-	ldr	r3, [r4, #2520]
+	ldr	r1, [r5, #2520]
 	.loc 5 712 0
-	ldr	r0, [r4, #3156]
+	ldr	r0, [r5, #3156]
 	.loc 5 709 0
-	str	r3, [r10, #4]
+	str	r1, [r10, #4]
 	.loc 5 711 0
-	ldr	r3, [r4, #3140]
+	ldr	r1, [r5, #3140]
 	.loc 5 712 0
 	add	r0, r0, r9
 	.loc 5 711 0
-	adds	r3, r3, #1
-	str	r3, [r4, #3140]
+	add	r1, r1, #1
+	str	r1, [r5, #3140]
 	.loc 5 712 0
+	mov	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1369:
+.LVL1352:
 	.loc 5 713 0
-	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
-	ldr	r3, [r4, #3140]
-	cmp	r2, r3
-	beq	.L1559
-	ldrh	r3, [r4, #2424]
-	cbnz	r3, .L1557
-.L1559:
+	ldrb	r0, [r5, #2427]	@ zero_extendqisi2
+	ldr	r1, [r5, #3140]
+	ldr	r3, [fp, #-68]
+	cmp	r0, r1
+	beq	.L1539
+	ldr	r2, [fp, #-60]
+	ldrh	r2, [r2, #4]
+	cmp	r2, #0
+	bne	.L1537
+.L1539:
+	str	r3, [fp, #-60]
 	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1370:
-	cbz	r0, .L1557
-.L1614:
-	.loc 5 729 0
-	movs	r3, #0
-	.loc 5 730 0
-	ldrh	r0, [r7, #-228]
-	.loc 5 729 0
-	str	r3, [r4, #3780]
-	b	.L1496
-.L1557:
-	add	fp, fp, #1
-	b	.L1556
-.LVL1371:
-.L1561:
+.LVL1353:
+	cmp	r0, #0
+	ldr	r3, [fp, #-60]
+	.loc 5 715 0
+	ldrne	r2, .L1591
+	movne	r1, #0
+	strne	r1, [r2, #3780]
+	bne	.L1590
+.L1537:
+	ldr	r3, [fp, #-48]
+	add	r3, r3, #1
+	b	.L1586
+.LVL1354:
+.L1541:
 	.loc 5 723 0
-	ldrh	r3, [r4, #2566]
+	ldrh	r3, [r8, #2]
 	add	r6, r6, r3
-.LVL1372:
+.LVL1355:
 	.loc 5 725 0
-	ldr	r3, [sp, #12]
-.LVL1373:
+	ldr	r3, [fp, #-56]
+.LVL1356:
 	.loc 5 723 0
 	uxth	r6, r6
 	.loc 5 725 0
 	cmp	r3, r6
 	.loc 5 723 0
-	strh	r6, [r4, #2566]	@ movhi
+	strh	r6, [r8, #2]	@ movhi
+	ldr	r6, .L1591+12
 	.loc 5 725 0
-	bls	.L1563
-	ldrh	r2, [r7, #-226]
-	ldrh	r3, [r7, #-224]
-.LVL1374:
+	bls	.L1543
+	ldrh	r2, [r6, #-2]
+	ldrh	r3, [r6]
+.LVL1357:
 	cmp	r2, r3
-	bne	.L1564
-.LVL1375:
-.L1563:
+	bne	.L1544
+.LVL1358:
+.L1543:
 	.loc 5 727 0
-	ldr	r3, [r4, #3140]
-.LVL1376:
-	cbz	r3, .L1565
+	ldr	r3, [r7, #3140]
+.LVL1359:
+	cmp	r3, #0
+	beq	.L1545
 	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1377:
+.LVL1360:
 	cmp	r0, #0
-	bne	.L1614
-.L1565:
+	.loc 5 729 0
+	movne	r3, #0
+	.loc 5 730 0
+	ldrhne	r0, [r6, #-4]
+	.loc 5 729 0
+	strne	r3, [r7, #3780]
+	bne	.L1478
+.L1545:
 	.loc 5 733 0
-	ldrh	r1, [r7, #-226]
-	cbnz	r1, .L1566
-	ldrh	r2, [r4, #2564]
-	ldr	r3, [r4, #2300]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1566
+	ldrh	r1, [r6, #-2]
+	cmp	r1, #0
+	bne	.L1546
+	ldrh	r3, [r8]
+	ldr	r2, [r7, #2300]
+	lsl	r3, r3, #1
+	ldrh	r0, [r2, r3]
+	cmp	r0, #0
+	beq	.L1546
 	.loc 5 735 0
-	strh	r1, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r2, r3]	@ movhi
 	.loc 5 736 0
-	ldrh	r0, [r4, #2564]
+	ldrh	r0, [r8]
 	bl	update_vpc_list
-.LVL1378:
+.LVL1361:
 	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1379:
+.LVL1362:
 	.loc 5 738 0
 	bl	l2p_flush
-.LVL1380:
+.LVL1363:
 	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1381:
-.L1566:
+.LVL1364:
+.L1546:
 	.loc 5 741 0
-	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
-.L1564:
+	mvn	r3, #0
+	strh	r3, [r8]	@ movhi
+.L1544:
 	.loc 5 743 0
-	ldrh	r3, [r4, #2320]
+	ldr	r3, .L1591+8
+	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1567
+	bhi	.L1547
 	.loc 5 745 0
-	ldrh	r6, [r4, #78]
-.LVL1382:
-	b	.L1539
-.LVL1383:
-.L1567:
+	ldrh	r6, [r7, #78]
+.LVL1365:
+.L1519:
+	.loc 5 627 0
+	ldr	r8, .L1591+20
+	movw	r3, #65535
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L1520
+	.loc 5 631 0
+	add	r9, r8, #568
+	.loc 5 628 0
+	mov	r3, #0
+	str	r3, [r7, #3136]
+.L1521:
+	.loc 5 631 0
+	ldrh	r10, [r9]
+.LVL1366:
+	mov	r0, r10
+	bl	List_get_gc_head_node
+.LVL1367:
+	ldr	r3, .L1591+20
+	uxth	r1, r0
+	strh	r1, [r3]	@ movhi
+	.loc 5 632 0
+	movw	r3, #65535
+	cmp	r1, r3
+	bne	.L1522
+	.loc 5 633 0
+	mov	r3, #0
+	.loc 5 634 0
+	mov	r0, #8
+	.loc 5 633 0
+	strh	r3, [r9]	@ movhi
+	b	.L1478
+.LVL1368:
+.L1547:
 	.loc 5 750 0
-	ldrh	r0, [r7, #-228]
+	ldrh	r0, [r6, #-4]
 	.loc 5 748 0
-	movs	r2, #0
-	str	r2, [r4, #3780]
+	mov	r2, #0
+	str	r2, [r7, #3780]
 	.loc 5 750 0
-	cmp	r0, #0
-	bne	.L1496
+	cmp	r0, r2
 	.loc 5 753 0
-	adds	r0, r3, #1
-	b	.L1496
-.LVL1384:
-.L1571:
-.LBE526:
-.LBE529:
-	.loc 5 479 0
-	movs	r0, #0
-	b	.L1496
-.L1618:
+	addeq	r0, r3, #1
+	b	.L1478
+.L1592:
 	.align	2
-.L1617:
-	.word	.LANCHOR3
+.L1591:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR0+2320
+	.word	.LANCHOR3-4064
+	.word	.LC103
+	.word	.LANCHOR0+2564
+	.word	.LANCHOR0+3168
+	.word	.LANCHOR0+3132
+	.word	.LANCHOR0+2324
 	.word	.LANCHOR1+551
 	.word	.LC1
-	.word	.LANCHOR0+2564
-	.word	.LANCHOR0+2578
-.LVL1385:
-.L1502:
-.LBB530:
-.LBB527:
-	.loc 5 527 0
-	cmp	r7, #0
-	beq	.L1569
-.L1512:
-	.loc 5 557 0
-	ldrh	r2, [r4, #2420]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1580
-.L1570:
-	ldrh	r3, [r4, #3178]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1580
-	cmp	r5, r3
-	bne	.L1580
-	ldrh	r3, [r4, #2564]
-	cmp	r3, r5
-	beq	.L1524
-.L1529:
-	.loc 5 556 0
-	movw	r5, #65535
-.L1580:
-	movs	r6, #1
-.LVL1386:
-	b	.L1523
-.LVL1387:
-.L1504:
-	.loc 5 527 0
-	cmp	r7, #0
-	beq	.L1569
-	movw	r5, #65535
-	b	.L1570
-.L1503:
-	cmp	r7, #0
-	bne	.L1529
-	b	.L1569
-.LBE527:
-.LBE530:
+	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2420
+	.word	.LANCHOR3-4066
+.LBE526:
+.LBE528:
 .LFE269:
-	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.align	1
+	.align	2
 	.global	sftl_gc
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_gc, %function
 sftl_gc:
-	.fnstart
 .LFB270:
 	.loc 5 757 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI412:
+	push	{fp, ip, lr, pc}
+.LCFI413:
+	sub	fp, ip, #4
+.LCFI414:
 	.loc 5 758 0
-	movs	r1, #1
+	mov	r1, #1
 	mov	r0, r1
-	b	rk_ftl_garbage_collect
-.LVL1388:
+	bl	rk_ftl_garbage_collect
+.LVL1369:
+	.loc 5 759 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE270:
-	.fnend
 	.size	sftl_gc, .-sftl_gc
-	.align	1
+	.align	2
 	.global	FtlRead
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlRead, %function
 FtlRead:
-	.fnstart
 .LFB164:
 	.loc 3 814 0
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1389:
+	@ args = 0, pretend = 0, frame = 52
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1370:
+	mov	ip, sp
+.LCFI415:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI416:
+	sub	fp, ip, #4
+.LCFI417:
+	sub	sp, sp, #52
+	.loc 3 814 0
+	uxtb	r0, r0
+	mov	r6, r1
+	str	r2, [fp, #-68]
 	.loc 3 824 0
 	cmp	r0, #16
 	.loc 3 814 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI188:
-	.pad #60
-	sub	sp, sp, #60
-.LCFI189:
-	.loc 3 814 0
-	mov	r7, r1
-	mov	r10, r3
-	str	r2, [sp, #28]
+	mov	r9, r3
 	.loc 3 824 0
-	bne	.L1621
+	bne	.L1595
 	.loc 3 825 0
 	mov	r2, r3
-.LVL1390:
-	ldr	r1, [sp, #28]
-	add	r0, r7, #256
-.LVL1391:
+.LVL1371:
+	ldr	r1, [fp, #-68]
+	add	r0, r6, #256
+.LVL1372:
 	bl	FtlVendorPartRead
-.LVL1392:
-	mov	r8, r0
-.LVL1393:
-.L1620:
+.LVL1373:
+	str	r0, [fp, #-48]
+.LVL1374:
+.L1594:
 	.loc 3 901 0
-	mov	r0, r8
-.LVL1394:
-	add	sp, sp, #60
-.LCFI190:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1395:
-.L1621:
-.LCFI191:
+	ldr	r0, [fp, #-48]
+.LVL1375:
+	sub	sp, fp, #40
+.LCFI418:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1376:
+.L1595:
+.LCFI419:
 	.loc 3 830 0
-	ldr	r3, [sp, #28]
-.LVL1396:
-	ldr	r4, .L1652
-	adds	r3, r1, r3
-.LVL1397:
-	str	r3, [sp, #8]
-	ldr	r2, [sp, #8]
-	ldr	r3, [r4, #116]
+	ldr	r3, [fp, #-68]
+.LVL1377:
+	ldr	r10, .L1628
+	add	r3, r1, r3
+.LVL1378:
+	str	r3, [fp, #-56]
+	ldr	r2, [fp, #-56]
+	ldr	r3, [r10, #116]
 	cmp	r2, r3
-	bhi	.L1641
+	.loc 3 831 0
+	mvnhi	r3, #0
+	strhi	r3, [fp, #-48]
+	.loc 3 830 0
+	bhi	.L1594
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1652+4
-	ldr	r3, [r3]
-	adds	r5, r3, #1
-	beq	.L1642
-	.loc 3 833 0 is_stmt 1
+	ldr	r3, .L1628+4
+	ldr	r7, [r3]
+	cmn	r7, #1
+	.loc 3 831 0 is_stmt 1 discriminator 1
+	streq	r7, [fp, #-48]
+	.loc 3 830 0 discriminator 1
+	beq	.L1594
+	.loc 3 833 0
 	bl	FtlCacheWriteBack
-.LVL1398:
+.LVL1379:
 	.loc 3 835 0
-	ldrh	r5, [r4, #34]
-	mov	r0, r7
+	ldrh	r4, [r10, #34]
+	mov	r0, r6
 	.loc 3 828 0
-	mov	r9, #0
-.LVL1399:
+	mov	r8, #0
+.LVL1380:
+	.loc 3 851 0
+	mov	r7, r10
 	.loc 3 840 0
-	mov	r6, r9
-.LVL1400:
-	.loc 3 815 0
-	mov	r8, r9
+	mov	r5, r8
+.LVL1381:
 	.loc 3 835 0
-	mov	r1, r5
-	bl	__aeabi_uidiv
-.LVL1401:
+	mov	r1, r4
+	bl	__udivsi3
+.LVL1382:
 	.loc 3 836 0
-	ldr	r3, [sp, #8]
-	mov	r1, r5
+	ldr	r3, [fp, #-56]
+	mov	r1, r4
 	.loc 3 835 0
-	str	r0, [sp, #12]
+	str	r0, [fp, #-60]
 	.loc 3 836 0
-	subs	r0, r3, #1
-	bl	__aeabi_uidiv
-.LVL1402:
+	sub	r0, r3, #1
+	bl	__udivsi3
+.LVL1383:
 	.loc 3 837 0
-	ldr	r3, [sp, #12]
-.LVL1403:
+	ldr	r3, [fp, #-60]
+.LVL1384:
 	.loc 3 835 0
-	ldr	r5, [sp, #12]
-.LVL1404:
+	ldr	r4, [fp, #-60]
+.LVL1385:
 	.loc 3 836 0
-	str	r0, [sp, #16]
+	str	r0, [fp, #-64]
 	.loc 3 837 0
 	rsb	r3, r3, #1
-.LVL1405:
+.LVL1386:
 	.loc 3 828 0
-	str	r9, [sp, #24]
-.LVL1406:
+	str	r8, [fp, #-76]
+.LVL1387:
 	.loc 3 837 0
 	add	r3, r3, r0
-.LVL1407:
+.LVL1388:
 	.loc 3 820 0
-	str	r9, [sp, #20]
+	str	r8, [fp, #-72]
 	.loc 3 837 0
-	str	r3, [sp, #4]
+	str	r3, [fp, #-52]
+	.loc 3 841 0
+	ldr	r2, [fp, #-52]
+.LVL1389:
+	ldr	r3, [r10, #2484]
+	.loc 3 815 0
+	str	r8, [fp, #-48]
 	.loc 3 841 0
-	ldr	r2, [sp, #4]
-.LVL1408:
-	ldr	r3, [r4, #2484]
 	add	r3, r3, r2
-	str	r3, [r4, #2484]
-.LVL1409:
-.L1623:
+	str	r3, [r10, #2484]
+.LVL1390:
+.L1597:
 	.loc 3 842 0
-	ldr	r3, [sp, #4]
-.LVL1410:
-	cbnz	r3, .L1639
+	ldr	r3, [fp, #-52]
+.LVL1391:
+	cmp	r3, #0
+	bne	.L1613
 	.loc 3 898 0
-	ldr	r3, .L1652
-.LVL1411:
-	ldrh	r2, [r3, #3182]
-	cbnz	r2, .L1640
+	ldr	r3, .L1628
+.LVL1392:
+	movw	r2, #3182
+	ldrh	r2, [r3, r2]
+	cmp	r2, #0
+	bne	.L1614
 	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r3, #2320]
+	add	r3, r3, #2320
+	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1620
-.L1640:
+	bhi	.L1594
+.L1614:
 	.loc 3 899 0 is_stmt 1
-	movs	r1, #1
-	movs	r0, #0
-.LVL1412:
+	mov	r1, #1
+	mov	r0, #0
+.LVL1393:
 	bl	rk_ftl_garbage_collect
-.LVL1413:
-	b	.L1620
-.LVL1414:
-.L1639:
+.LVL1394:
+	b	.L1594
+.LVL1395:
+.L1613:
 	.loc 3 843 0
-	movs	r2, #0
-	add	r1, sp, #52
-	mov	r0, r5
-.LVL1415:
+	sub	r1, fp, #44
+	mov	r2, #0
+	mov	r0, r4
+.LVL1396:
 	bl	log2phys
-.LVL1416:
+.LVL1397:
 	.loc 3 844 0
-	ldr	r2, [sp, #52]
-	adds	r0, r2, #1
-	bne	.L1624
-	mov	fp, #0
-.LVL1417:
-.L1625:
-	.loc 3 845 0 discriminator 1
-	ldrh	r0, [r4, #34]
-.LVL1418:
-	cmp	fp, r0
-	bcc	.L1627
-.L1628:
-	.loc 3 874 0
-	ldr	r3, [sp, #4]
-.LVL1419:
-	.loc 3 872 0
-	adds	r5, r5, #1
-	.loc 3 874 0
-	subs	r3, r3, #1
-	str	r3, [sp, #4]
-	beq	.L1632
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #8]
-.LVL1420:
-	cmp	r6, r3, lsl #2
-	bne	.L1623
-.LVL1421:
-.L1632:
-	.loc 3 875 0 is_stmt 1
-	cmp	r6, #0
-	beq	.L1623
-	.loc 3 876 0
-	movs	r2, #0
-	mov	r1, r6
-	ldr	r0, [r4, #3792]
-	.loc 3 877 0
-	mov	fp, #0
-.LVL1422:
-	.loc 3 876 0
-	bl	FlashReadPages
-.LVL1423:
-	.loc 3 883 0
-	lsl	r3, r9, #9
-	str	r3, [sp, #40]
-	.loc 3 880 0
-	ldr	r3, [sp, #20]
-.LVL1424:
-	lsls	r3, r3, #9
-.LVL1425:
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #24]
-	lsls	r3, r3, #9
-	str	r3, [sp, #36]
-.L1638:
-	movs	r3, #20
+	ldr	r1, [fp, #-44]
+	cmn	r1, #1
+	moveq	r10, #0
+.LVL1398:
+	beq	.L1599
+	.loc 3 851 0
+	ldr	r2, [r7, #3792]
+	mov	r0, #20
+	.loc 3 852 0
+	ldr	r3, [fp, #-60]
+.LVL1399:
+	ldrh	r10, [r7, #34]
+.LVL1400:
+	.loc 3 851 0
+	mla	r2, r0, r5, r2
+	.loc 3 852 0
+	cmp	r4, r3
+	.loc 3 851 0
+	str	r1, [r2, #4]
+	.loc 3 852 0
+	bne	.L1603
+	.loc 3 853 0
+	ldr	r1, [r7, #3776]
+	.loc 3 854 0
+	mov	r0, r6
+	.loc 3 853 0
+	str	r2, [fp, #-80]
+	str	r1, [r2, #8]
+	.loc 3 854 0
+	mov	r1, r10
+	bl	__umodsi3
+.LVL1401:
+	ldr	r3, [fp, #-68]
+.LVL1402:
+	.loc 3 855 0
+	sub	r1, r10, r0
+	.loc 3 857 0
+	ldr	r2, [fp, #-80]
+	.loc 3 854 0
+	str	r0, [fp, #-72]
+.LVL1403:
+	cmp	r3, r1
+	movcs	r3, r1
+.LVL1404:
+	.loc 3 857 0
+	cmp	r3, r10
+	str	r3, [fp, #-76]
+	.loc 3 858 0
+	streq	r9, [r2, #8]
+.LVL1405:
+.L1604:
+	.loc 3 867 0
+	ldrh	r1, [r7, #88]
+	ldr	r0, [r7, #3772]
+	.loc 3 868 0
+	str	r4, [r2, #16]
+	.loc 3 867 0
+	mul	r1, r5, r1
+	.loc 3 869 0
+	add	r5, r5, #1
+	.loc 3 867 0
+	bic	r1, r1, #3
+	add	r1, r0, r1
+	str	r1, [r2, #12]
+	b	.L1602
+.LVL1406:
+.L1601:
+	.loc 3 846 0
+	mla	r0, r0, r4, r10
+.LVL1407:
+	.loc 3 847 0
+	ldr	r2, [fp, #-56]
+	cmp	r2, r0
+	movhi	r2, #1
+	movls	r2, #0
+	cmp	r6, r0
+	movhi	r2, #0
+	cmp	r2, #0
+	beq	.L1600
+	.loc 3 848 0
+	sub	r0, r0, r6
+.LVL1408:
+.LBB535:
+.LBB536:
+.LBB537:
+	.loc 1 202 0
+	mov	r1, #512
+	add	r0, r9, r0, lsl #9
+	bl	__memzero
+.LVL1409:
+.L1600:
+.LBE537:
+.LBE536:
+.LBE535:
+	.loc 3 845 0 discriminator 2
+	add	r10, r10, #1
+.L1599:
+	.loc 3 845 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r7, #34]
+.LVL1410:
+	cmp	r10, r0
+	bcc	.L1601
+.LVL1411:
+.L1602:
+	.loc 3 874 0 is_stmt 1
+	ldr	r3, [fp, #-52]
+.LVL1412:
+	.loc 3 872 0
+	add	r4, r4, #1
+	.loc 3 874 0
+	subs	r3, r3, #1
+	str	r3, [fp, #-52]
+	beq	.L1606
+	.loc 3 874 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r7, #8]
+	cmp	r5, r2, lsl #2
+	bne	.L1597
+.L1606:
+	.loc 3 875 0 is_stmt 1
+	cmp	r5, #0
+	beq	.L1597
+	.loc 3 876 0
+	mov	r2, #0
+	mov	r1, r5
+	ldr	r0, [r7, #3792]
+	.loc 3 877 0
+	mov	r10, #0
+.LVL1413:
+	.loc 3 876 0
+	bl	FlashReadPages
+.LVL1414:
+	.loc 3 883 0
+	lsl	r3, r8, #9
+	str	r3, [fp, #-88]
+	.loc 3 880 0
+	ldr	r3, [fp, #-72]
+.LVL1415:
+	lsl	r3, r3, #9
+.LVL1416:
+	str	r3, [fp, #-80]
+	ldr	r3, [fp, #-76]
+	lsl	r3, r3, #9
+	str	r3, [fp, #-84]
+.LVL1417:
+.L1612:
+	mov	r3, #20
+.LVL1418:
 	.loc 3 878 0
-	ldr	r2, [r4, #3792]
-	mul	r3, r3, fp
-	ldr	r0, [sp, #12]
-.LVL1426:
-	add	r2, r2, r3
+	ldr	r2, [r7, #3792]
+	mul	ip, r3, r10
+	ldr	r3, [fp, #-60]
+.LVL1419:
+	add	r2, r2, ip
 	ldr	r1, [r2, #16]
-	cmp	r0, r1
-	bne	.L1634
+	cmp	r3, r1
+	bne	.L1608
 	.loc 3 879 0
 	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3776]
+	ldr	r2, [r7, #3776]
 	cmp	r1, r2
-	bne	.L1635
-	str	r3, [sp, #44]
+	bne	.L1609
 	.loc 3 880 0
-	mov	r0, r10
-.LVL1427:
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #36]
+	ldr	r3, [fp, #-80]
+.LVL1420:
+	mov	r0, r9
+	ldr	r2, [fp, #-84]
+	str	ip, [fp, #-92]
 	add	r1, r1, r3
-.LVL1428:
-.L1651:
+.LVL1421:
+.L1627:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1429:
-	ldr	r3, [sp, #44]
-.LVL1430:
-.L1635:
+.LVL1422:
+	ldr	ip, [fp, #-92]
+.LVL1423:
+.L1609:
 	.loc 3 885 0
-	ldr	r2, [r4, #3792]
-	ldr	r0, [r2, r3]
-.LVL1431:
-	add	ip, r2, r3
-	adds	r1, r0, #1
+	ldr	r2, [r7, #3792]
+	ldr	r0, [r2, ip]
+	add	lr, r2, ip
+	cmn	r0, #1
 	.loc 3 886 0
-	itttt	eq
-	ldreq	r1, [r4, #2684]
+	ldreq	r1, [r7, #2684]
 	.loc 3 887 0
-	moveq	r8, r0
+	streq	r0, [fp, #-48]
 	.loc 3 886 0
 	addeq	r1, r1, #1
-	streq	r1, [r4, #2684]
+	streq	r1, [r7, #2684]
 	.loc 3 889 0
-	ldr	r3, [r2, r3]
-	cmp	r3, #256
-	bne	.L1637
-.LBB537:
+	ldr	r2, [r2, ip]
+	cmp	r2, #256
+	bne	.L1611
+.LBB538:
 	.loc 3 890 0
-	ldr	r0, [ip, #4]
+	ldr	r0, [lr, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1432:
+.LVL1424:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1433:
-.L1637:
-.LBE537:
+.LVL1425:
+.L1611:
+.LBE538:
 	.loc 3 877 0 discriminator 2
-	add	fp, fp, #1
-	cmp	r6, fp
-	bne	.L1638
+	add	r10, r10, #1
+	cmp	r5, r10
+	bne	.L1612
 	.loc 3 894 0
-	movs	r6, #0
-	b	.L1623
-.LVL1434:
-.L1627:
-	.loc 3 846 0
-	mla	r0, r0, r5, fp
-.LVL1435:
-	.loc 3 847 0
-	cmp	r7, r0
-	bhi	.L1626
-	.loc 3 847 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #8]
-	cmp	r3, r0
-	bls	.L1626
-	.loc 3 848 0 is_stmt 1
-	subs	r0, r0, r7
-.LVL1436:
-.LBB538:
-.LBB539:
-.LBB540:
-	.loc 1 202 0
-	mov	r1, #512
-	add	r0, r10, r0, lsl #9
-	bl	__memzero
-.LVL1437:
-.L1626:
-.LBE540:
-.LBE539:
-.LBE538:
-	.loc 3 845 0 discriminator 2
-	add	fp, fp, #1
-	b	.L1625
-.LVL1438:
-.L1624:
-	.loc 3 851 0
-	ldr	r3, [r4, #3792]
-	movs	r1, #20
-	ldrh	fp, [r4, #34]
-.LVL1439:
-	mla	r3, r1, r6, r3
-	str	r2, [r3, #4]
-	.loc 3 852 0
-	ldr	r2, [sp, #12]
-.LVL1440:
-	cmp	r5, r2
-	bne	.L1629
-	.loc 3 853 0
-	ldr	r2, [r4, #3776]
-.LVL1441:
-	.loc 3 854 0
-	mov	r1, fp
-	mov	r0, r7
-	.loc 3 853 0
-	str	r3, [sp, #32]
-	str	r2, [r3, #8]
-	.loc 3 854 0
-	bl	__aeabi_uidivmod
-.LVL1442:
-	.loc 3 855 0
-	sub	r2, fp, r1
-	.loc 3 854 0
-	str	r1, [sp, #20]
-.LVL1443:
-	ldr	r1, [sp, #28]
-.LVL1444:
-	mov	r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r3, r1
-	.loc 3 857 0
-	cmp	r3, fp
-	str	r3, [sp, #24]
-	ldr	r3, [sp, #32]
-	bne	.L1630
-	.loc 3 858 0
-	str	r10, [r3, #8]
-.L1630:
-	.loc 3 867 0
-	ldrh	r2, [r4, #88]
-	ldr	r1, [r4, #3772]
-.LVL1445:
-	.loc 3 868 0
-	str	r5, [r3, #16]
-	.loc 3 867 0
-	muls	r2, r6, r2
-	.loc 3 869 0
-	adds	r6, r6, #1
-	.loc 3 867 0
-	bic	r2, r2, #3
-	add	r2, r2, r1
-	str	r2, [r3, #12]
-	b	.L1628
-.LVL1446:
-.L1629:
+	mov	r5, #0
+	b	.L1597
+.LVL1426:
+.L1603:
 	.loc 3 859 0
-	ldr	r2, [sp, #16]
-.LVL1447:
-	cmp	r5, r2
-	bne	.L1631
+	ldr	r3, [fp, #-64]
+.LVL1427:
+	cmp	r4, r3
+	bne	.L1605
 	.loc 3 860 0
-	ldr	r2, [r4, #3768]
-.LVL1448:
+	ldr	r1, [r7, #3768]
 	.loc 3 861 0
-	ldr	r1, [sp, #8]
+	ldr	r3, [fp, #-56]
+.LVL1428:
 	.loc 3 860 0
-	str	r2, [r3, #8]
+	str	r1, [r2, #8]
 	.loc 3 861 0
-	mul	r2, fp, r5
-	sub	r9, r1, r2
+	mul	r1, r10, r4
+	sub	r8, r3, r1
 	.loc 3 862 0
-	cmp	fp, r9
-	bne	.L1630
-.L1650:
+	cmp	r10, r8
+	.loc 3 863 0
+	subeq	r1, r1, r6
+	addeq	r1, r9, r1, lsl #9
+	streq	r1, [r2, #8]
+	b	.L1604
+.LVL1429:
+.L1605:
 	.loc 3 865 0
-	subs	r2, r2, r7
-	add	r2, r10, r2, lsl #9
-	str	r2, [r3, #8]
-	b	.L1630
-.LVL1449:
-.L1631:
-	mul	r2, r5, fp
-.LVL1450:
-	b	.L1650
-.LVL1451:
-.L1634:
+	mul	r10, r4, r10
+	sub	r10, r10, r6
+	add	r10, r9, r10, lsl #9
+	str	r10, [r2, #8]
+	b	.L1604
+.LVL1430:
+.L1608:
 	.loc 3 881 0
-	ldr	r0, [sp, #16]
-.LVL1452:
-	cmp	r0, r1
-	bne	.L1635
+	ldr	r3, [fp, #-64]
+.LVL1431:
+	cmp	r3, r1
+	bne	.L1609
 	.loc 3 882 0
 	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3768]
+	ldr	r2, [r7, #3768]
 	cmp	r1, r2
-	bne	.L1635
-	str	r3, [sp, #44]
+	bne	.L1609
 	.loc 3 883 0
-	ldrh	r0, [r4, #34]
-.LVL1453:
-	ldr	r3, [sp, #16]
-.LVL1454:
-	ldr	r2, [sp, #40]
-	muls	r0, r3, r0
-	subs	r0, r0, r7
-	add	r0, r10, r0, lsl #9
-	b	.L1651
-.LVL1455:
-.L1641:
-	.loc 3 831 0
-	mov	r8, #-1
-	b	.L1620
-.L1642:
-	mov	r8, r3
-	b	.L1620
-.L1653:
+	ldrh	r0, [r7, #34]
+	str	ip, [fp, #-92]
+	ldr	r2, [fp, #-88]
+	mul	r0, r3, r0
+	sub	r0, r0, r6
+	add	r0, r9, r0, lsl #9
+	b	.L1627
+.L1629:
 	.align	2
-.L1652:
+.L1628:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 .LFE164:
-	.fnend
 	.size	FtlRead, .-FtlRead
-	.align	1
+	.align	2
 	.global	sftl_read
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_read, %function
 sftl_read:
-	.fnstart
 .LFB169:
 	.loc 3 1204 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1456:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1432:
+	mov	ip, sp
+.LCFI420:
+	push	{fp, ip, lr, pc}
+.LCFI421:
+	sub	fp, ip, #4
+.LCFI422:
 	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1457:
+.LVL1433:
 	mov	r1, r0
-.LVL1458:
-	movs	r0, #0
-.LVL1459:
-	b	FtlRead
-.LVL1460:
+.LVL1434:
+	mov	r0, #0
+.LVL1435:
+	bl	FtlRead
+.LVL1436:
+	.loc 3 1206 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE169:
-	.fnend
 	.size	sftl_read, .-sftl_read
-	.align	1
+	.align	2
 	.global	FtlWrite
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-	.fnstart
 .LFB167:
 	.loc 3 962 0
 	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1461:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1437:
+	mov	ip, sp
+.LCFI423:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI424:
+	sub	fp, ip, #4
+.LCFI425:
+	sub	sp, sp, #64
+	.loc 3 962 0
+	uxtb	r0, r0
+	mov	r8, r1
+	str	r2, [fp, #-76]
 	.loc 3 970 0
 	cmp	r0, #16
 	.loc 3 962 0
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI192:
-	.pad #68
-	sub	sp, sp, #68
-.LCFI193:
-	.loc 3 962 0
-	mov	r8, r1
-	str	r2, [sp, #12]
-	str	r3, [sp, #4]
+	str	r3, [fp, #-80]
 	.loc 3 970 0
-	bne	.L1656
+	bne	.L1632
 	.loc 3 971 0
 	mov	r2, r3
-.LVL1462:
-	ldr	r1, [sp, #12]
+.LVL1438:
+	ldr	r1, [fp, #-76]
 	add	r0, r8, #256
-.LVL1463:
+.LVL1439:
 	bl	FtlVendorPartWrite
-.LVL1464:
-.L1655:
+.LVL1440:
+.L1631:
 	.loc 3 1153 0
-	add	sp, sp, #68
-.LCFI194:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1465:
-.L1656:
-.LCFI195:
+	sub	sp, fp, #40
+.LCFI426:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.LVL1441:
+.L1632:
+.LCFI427:
 	.loc 3 974 0
-	ldr	r3, [sp, #12]
-.LVL1466:
-	ldr	r4, .L1722
-	adds	r7, r1, r3
-	ldr	r3, [r4, #116]
-.LVL1467:
-	cmp	r7, r3
-	bhi	.L1698
+	ldr	r3, [fp, #-76]
+.LVL1442:
+	ldr	r9, .L1696
+	add	r6, r1, r3
+	ldr	r3, [r9, #116]
+.LVL1443:
+	cmp	r6, r3
+	.loc 3 975 0
+	mvnhi	r0, #0
+.LVL1444:
+	.loc 3 974 0
+	bhi	.L1631
 	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r6, .L1722+4
-	ldr	r0, [r6]
-.LVL1468:
-	adds	r5, r0, #1
-	beq	.L1655
+	ldr	r5, .L1696+4
+	ldr	r0, [r5]
+	cmn	r0, #1
+	beq	.L1631
 	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1722+8
+	ldr	r3, .L1696+8
 	mov	r2, #2048
 	.loc 3 978 0
-	ldrh	r5, [r4, #34]
+	ldrh	r4, [r9, #34]
 	mov	r0, r8
 	.loc 3 977 0
-	str	r2, [r3, #-220]
+	str	r2, [r3, #-4060]
 	.loc 3 978 0
-	mov	r1, r5
-	bl	__aeabi_uidiv
-.LVL1469:
+	mov	r1, r4
+	bl	__udivsi3
+.LVL1445:
 	.loc 3 979 0
-	mov	r1, r5
+	mov	r1, r4
 	.loc 3 978 0
-	mov	r10, r0
-.LVL1470:
+	str	r0, [fp, #-68]
 	.loc 3 979 0
-	subs	r0, r7, #1
-	bl	__aeabi_uidiv
-.LVL1471:
+	sub	r0, r6, #1
+	bl	__udivsi3
+.LVL1446:
 	.loc 3 980 0
-	sub	r7, r0, r10
+	ldr	r2, [fp, #-68]
+.LVL1447:
 	.loc 3 983 0
-	ldr	fp, [r4, #3948]
+	ldr	r10, [r9, #3948]
+	.loc 3 979 0
+	str	r0, [fp, #-88]
+.LVL1448:
 	.loc 3 980 0
-	adds	r3, r7, #1
-.LVL1472:
+	sub	r6, r0, r2
+	add	r3, r6, #1
+.LVL1449:
 	.loc 3 982 0
-	adds	r2, r7, #1
-.LVL1473:
+	add	r2, r6, #1
+.LVL1450:
 	.loc 3 980 0
-	str	r3, [sp, #8]
-	.loc 3 982 0
-	ldr	r3, [r4, #2492]
-	.loc 3 979 0
-	str	r0, [sp, #20]
-.LVL1474:
+	str	r3, [fp, #-72]
+	.loc 3 983 0
+	cmp	r10, #0
 	.loc 3 982 0
+	ldr	r3, [r9, #2492]
 	add	r3, r3, r2
-	str	r3, [r4, #2492]
+	str	r3, [r9, #2492]
 	.loc 3 983 0
-	cmp	fp, #0
-	beq	.L1658
+	beq	.L1634
 	.loc 3 984 0
-	ldr	r3, [fp, #16]
-	cmp	r10, r3
-	beq	.L1659
+	ldr	r3, [r10, #16]
+	ldr	r2, [fp, #-68]
+.LVL1451:
+	cmp	r2, r3
+	beq	.L1635
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1475:
-.L1658:
+.LVL1452:
+.L1634:
 	.loc 3 1008 0
-	ldr	r3, [r6, #8]
+	ldr	r3, [r5, #8]
+	ldr	r4, .L1696+12
+.LVL1453:
 	cmp	r3, #0
-	beq	.L1700
-	.loc 3 1009 0 discriminator 1
-	ldr	r5, .L1722+12
-	.loc 3 1008 0 discriminator 1
-	ldrh	r2, [r4, #2328]
-.LVL1476:
-	.loc 3 1009 0 discriminator 1
-	add	r3, r5, #48
-	cmp	r2, #0
-	it	eq
-	moveq	r5, r3
-.LVL1477:
-.L1661:
-	.loc 3 1012 0
-	ldr	r4, .L1722
+	beq	.L1637
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #4]
+	.loc 3 1009 0 is_stmt 1 discriminator 1
+	add	r0, r4, #48
+.LVL1454:
+	cmp	r3, #0
+	moveq	r4, r0
+.LVL1455:
+.L1637:
 	.loc 3 1068 0
-	mov	r6, r10
-.LVL1478:
-.L1662:
+	ldr	r5, [fp, #-68]
+.LVL1456:
+	.loc 3 1012 0
+	ldr	r7, .L1696
+.LVL1457:
+.L1638:
 	.loc 3 1011 0
-	ldr	r3, [sp, #8]
-.LVL1479:
+	ldr	r3, [fp, #-72]
+.LVL1458:
 	cmp	r3, #0
-	beq	.L1696
+	beq	.L1672
 	.loc 3 1012 0
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r4, #8]
-.LVL1480:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r7, #8]
+.LVL1459:
 	cmp	r2, r3
-	bcc	.L1663
+	bcc	.L1639
 	.loc 3 1012 0 is_stmt 0 discriminator 1
 	mov	r2, #1012
-	ldr	r1, .L1722+16
-	ldr	r0, .L1722+20
+	ldr	r1, .L1696+16
+	ldr	r0, .L1696+20
+.LVL1460:
 	bl	printk
-.LVL1481:
-.L1663:
+.LVL1461:
+.L1639:
 	.loc 3 1013 0 is_stmt 1
-	ldrh	r9, [r5, #4]
-.LVL1482:
+	ldrh	r9, [r4, #4]
+.LVL1462:
 	cmp	r9, #0
-	bne	.L1664
+	bne	.L1640
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL1483:
+.LVL1463:
 	.loc 3 1016 0
-	ldr	r3, .L1722+12
-	ldr	r7, .L1722+4
-	cmp	r5, r3
-	bne	.L1665
+	ldr	r3, .L1696+12
+	ldr	r6, .L1696+4
+	cmp	r4, r3
+	bne	.L1641
 	.loc 3 1017 0
-	ldrh	r9, [r4, #2376]
+	add	r0, r4, #48
+	ldrh	r9, [r0, #4]
 	cmp	r9, #0
-	bne	.L1666
+	bne	.L1642
 	.loc 3 1018 0
-	add	r0, r5, #48
 	bl	allocate_new_data_superblock
-.LVL1484:
+.LVL1464:
 	.loc 3 1019 0
-	str	r9, [r7, #8]
-.L1666:
-	.loc 3 1023 0
-	ldr	r5, .L1722+12
-.LVL1485:
+	str	r9, [r6, #8]
+.L1642:
 	.loc 3 1021 0
-	ldr	r0, .L1722+12
+	ldr	r0, .L1696+12
 	bl	allocate_new_data_superblock
-.LVL1486:
+.LVL1465:
+	.loc 3 1023 0
+	ldr	r4, .L1696+12
+.LVL1466:
 	.loc 3 1022 0
-	ldr	r2, [r7, #8]
+	ldr	r3, [r6, #8]
 	.loc 3 1023 0
-	add	r3, r5, #48
-	cmp	r2, #0
-	it	ne
-	movne	r5, r3
-.LVL1487:
-.L1667:
+	add	r0, r4, #48
+	cmp	r3, #0
+	movne	r4, r0
+.LVL1467:
+.L1643:
 	.loc 3 1033 0
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1664
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1640
 	.loc 3 1034 0
-	mov	r0, r5
+	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1488:
-.L1664:
-	.loc 3 1041 0
-	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+.LVL1468:
+.L1640:
 	.loc 3 1043 0
-	ldrh	r3, [r5, #4]
-	ldr	r1, [sp, #8]
-.LVL1489:
+	ldrh	r3, [r4, #4]
+	ldr	r2, [fp, #-72]
+.LVL1469:
+	cmp	r3, r2
+	movcs	r3, r2
 	.loc 3 1041 0
-	lsls	r2, r2, #2
-	cmp	r3, r1
-	it	cs
-	movcs	r3, r1
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+.LVL1470:
+	lsl	r2, r2, #2
+	cmp	r3, r2
+	movcs	r3, r2
 	.loc 3 1045 0
-	ldrh	r3, [r4, #8]
-	str	r2, [sp, #36]
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	str	r3, [fp, #-104]
+	ldrh	r3, [r7, #8]
 	cmp	r2, r3
-	bcc	.L1668
+	bcc	.L1644
 	.loc 3 1045 0 is_stmt 0 discriminator 1
 	movw	r2, #1045
-	ldr	r1, .L1722+16
-.LVL1490:
-	ldr	r0, .L1722+20
+	ldr	r1, .L1696+16
+	ldr	r0, .L1696+20
+.LVL1471:
 	bl	printk
-.LVL1491:
-.L1668:
+.LVL1472:
+.L1644:
 	.loc 3 1068 0 is_stmt 1 discriminator 1
 	mov	r9, #0
-.LVL1492:
-.L1669:
+.LVL1473:
+.L1645:
 	.loc 3 1046 0 discriminator 1
-	ldr	r3, [sp, #36]
+	ldr	r3, [fp, #-104]
 	cmp	r9, r3
-	bne	.L1690
-.L1670:
+	bne	.L1666
+.L1646:
 	.loc 3 1127 0
-	ldr	r3, [r4, #3948]
+	ldr	r3, [r7, #3948]
 	cmp	r3, #0
-	beq	.L1691
+	beq	.L1667
 	.loc 3 1129 0
-	ldr	r3, [sp, #8]
-.LVL1493:
+	ldr	r3, [fp, #-72]
+.LVL1474:
 	.loc 3 1130 0
 	subs	r9, r9, #1
 	.loc 3 1129 0
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
+	sub	r3, r3, #1
+	str	r3, [fp, #-72]
 	.loc 3 1130 0
-	bne	.L1691
-.L1696:
+	bne	.L1667
+.L1672:
 	.loc 3 1137 0
-	ldr	r3, [sp, #20]
-.LVL1494:
-	movs	r0, #0
+	ldr	r3, [fp, #-88]
+.LVL1475:
+	mov	r0, #0
+	ldr	r2, [fp, #-68]
+.LVL1476:
 	.loc 3 1139 0
-	ldr	r4, .L1722
+	ldr	r4, .L1696+24
+.LVL1477:
 	.loc 3 1137 0
-	sub	r1, r3, r10
+	sub	r1, r3, r2
 	bl	rk_ftl_garbage_collect
-.LVL1495:
+.LVL1478:
 	.loc 3 1139 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4]
 	cmp	r3, #15
-	bhi	.L1693
 	.loc 3 1141 0
-	movw	r5, #65535
-.LVL1496:
-.L1717:
-	ldrh	r3, [r4, #2564]
-	cmp	r3, r5
-	bne	.L1697
+	addls	r5, r4, #244
+.LVL1479:
+	ldrls	r6, .L1696+28
+	.loc 3 1139 0
+	bhi	.L1669
+.L1692:
+	.loc 3 1141 0
+	ldrh	r3, [r5]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1673
 	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #3178]
-	cmp	r3, r5
-	bne	.L1697
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bne	.L1673
 	.loc 3 1142 0 is_stmt 1
-	movs	r0, #0
+	mov	r0, #0
 	bl	List_get_gc_head_node
-.LVL1497:
+.LVL1480:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1498:
-.L1697:
+.LVL1481:
+.L1673:
+	.loc 3 1143 0
+	ldr	r3, .L1696+32
 	.loc 3 1145 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 3 1143 0
-	movs	r3, #128
+	mov	r2, #128
 	.loc 3 1145 0
 	mov	r0, r1
 	.loc 3 1143 0
-	strh	r3, [r4, #3126]	@ movhi
+	strh	r2, [r3]	@ movhi
 	.loc 3 1144 0
-	strh	r3, [r4, #3124]	@ movhi
+	strh	r2, [r3, #-2]	@ movhi
 	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1499:
+.LVL1482:
 	.loc 3 1146 0
-	movs	r1, #1
-	movs	r0, #0
+	mov	r1, #1
+	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1500:
+.LVL1483:
 	.loc 3 1147 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1717
-	b	.L1693
-.LVL1501:
-.L1659:
+	bls	.L1692
+	b	.L1669
+.LVL1484:
+.L1635:
 	.loc 3 987 0
-	ldr	r3, [r4, #2496]
+	ldr	r3, [r9, #2496]
 	.loc 3 988 0
-	mov	r1, r5
+	mov	r1, r4
 	mov	r0, r8
+.LVL1485:
 	.loc 3 987 0
-	adds	r3, r3, #1
-	str	r3, [r4, #2496]
+	add	r3, r3, #1
+	str	r3, [r9, #2496]
 	.loc 3 988 0
-	bl	__aeabi_uidivmod
-.LVL1502:
-	ldr	r2, [sp, #12]
-.LVL1503:
+	bl	__umodsi3
+.LVL1486:
+	ldr	r3, [fp, #-76]
+.LVL1487:
 	.loc 3 989 0
-	subs	r5, r5, r1
-	.loc 3 992 0
-	ldr	r0, [fp, #8]
-	.loc 3 988 0
-	mov	r3, r1
+	sub	r4, r4, r0
 	.loc 3 992 0
-	ldr	r1, [sp, #4]
-	cmp	r5, r2
-	it	cs
-	movcs	r5, r2
-	lsl	r9, r5, #9
-	add	r0, r0, r3, lsl #9
+	ldr	r1, [fp, #-80]
+	cmp	r3, r4
+	movcc	r4, r3
+	ldr	r3, [r10, #8]
+.LVL1488:
+	lsl	r9, r4, #9
 	mov	r2, r9
-.LVL1504:
+	add	r0, r3, r0, lsl #9
 	bl	ftl_memcpy
-.LVL1505:
+.LVL1489:
 	.loc 3 994 0
-	cbnz	r7, .L1660
-.LVL1506:
-.L1693:
+	cmp	r6, #0
+	bne	.L1636
+.LVL1490:
+.L1669:
 	.loc 3 995 0
-	movs	r0, #0
-	b	.L1655
-.LVL1507:
-.L1660:
+	mov	r0, #0
+	b	.L1631
+.LVL1491:
+.L1636:
 	.loc 3 996 0
-	ldr	r3, [sp, #12]
-.LVL1508:
+	ldr	r3, [fp, #-76]
+.LVL1492:
 	.loc 3 997 0
-	add	r8, r8, r5
-	.loc 3 999 0
-	add	r10, r10, #1
+	add	r8, r8, r4
 	.loc 3 996 0
-	subs	r3, r3, r5
-	str	r3, [sp, #12]
+	sub	r3, r3, r4
+	str	r3, [fp, #-76]
 	.loc 3 998 0
-	ldr	r3, [sp, #4]
-.LVL1509:
+	ldr	r3, [fp, #-80]
+.LVL1493:
 	add	r3, r3, r9
-	str	r3, [sp, #4]
+	str	r3, [fp, #-80]
+	.loc 3 999 0
+	ldr	r3, [fp, #-68]
+.LVL1494:
+	add	r3, r3, #1
+	str	r3, [fp, #-68]
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1510:
-	str	r7, [sp, #8]
-	b	.L1658
-.LVL1511:
-.L1700:
-	.loc 3 1006 0
-	ldr	r5, .L1722+12
-.LVL1512:
-	b	.L1661
-.LVL1513:
-.L1665:
+.LVL1495:
+	str	r6, [fp, #-72]
+	b	.L1634
+.LVL1496:
+.L1641:
 	.loc 3 1028 0
-	ldrh	r2, [r4, #2328]
+	ldrh	r2, [r3, #4]
 	.loc 3 1027 0
-	str	r9, [r7, #8]
+	str	r9, [r6, #8]
 	.loc 3 1028 0
-	cbnz	r2, .L1703
+	cmp	r2, #0
+	movne	r4, r3
+	bne	.L1640
 	.loc 3 1029 0
-	mov	r0, r5
+	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1514:
-	b	.L1667
-.L1703:
-	mov	r5, r3
-	b	.L1664
-.LVL1515:
-.L1690:
+.LVL1497:
+	b	.L1643
+.LVL1498:
+.L1666:
 	.loc 3 1047 0
-	ldrh	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1670
+	beq	.L1646
 	.loc 3 1051 0
-	movs	r2, #0
-	add	r1, sp, #40
-.LVL1516:
-	mov	r0, r6
-	movs	r7, #20
+	mov	r2, #0
+	sub	r1, fp, #64
+	mov	r0, r5
+.LVL1499:
+	mov	r6, #20
 	bl	log2phys
-.LVL1517:
+.LVL1500:
 	.loc 3 1052 0
-	mov	r0, r5
-	mul	r7, r7, r9
+	mov	r0, r4
+	mul	r6, r6, r9
 	bl	get_new_active_ppa
-.LVL1518:
+.LVL1501:
 	.loc 3 1055 0
-	ldrh	r2, [r4, #88]
+	ldrh	r2, [r7, #88]
 	.loc 3 1054 0
-	ldr	r3, [r4, #3800]
+	ldr	r3, [r7, #3800]
 	.loc 3 1055 0
 	mul	r1, r2, r9
 	.loc 3 1054 0
-	add	r3, r3, r7
+	add	r3, r3, r6
 	str	r0, [r3, #4]
 	.loc 3 1056 0
-	str	r6, [r3, #16]
+	str	r5, [r3, #16]
 	.loc 3 1055 0
 	bic	r1, r1, #3
-	str	r1, [sp, #28]
-	ldr	r0, [sp, #28]
-	ldr	r1, [r4, #3772]
-	add	fp, r1, r0
-	str	r1, [sp, #32]
-	str	fp, [r3, #12]
+	str	r1, [fp, #-96]
+	ldr	r0, [fp, #-96]
+	ldr	r1, [r7, #3772]
+	add	r10, r1, r0
+	str	r1, [fp, #-100]
+	str	r10, [r3, #12]
 	.loc 3 1059 0
-	movs	r1, #0
-	mov	r0, fp
+	mov	r1, #0
+	mov	r0, r10
 	bl	ftl_memset
-.LVL1519:
+.LVL1502:
 	.loc 3 1061 0
-	cmp	r6, r10
-	beq	.L1671
-	.loc 3 1061 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #20]
-.LVL1520:
-	cmp	r6, r3
-	bne	.L1716
-	.loc 3 1069 0 is_stmt 1
-	ldr	r3, [sp, #12]
-.LVL1521:
-	add	r2, r8, r3
-	ldrh	r3, [r4, #34]
-.LVL1522:
-	smulbb	r3, r3, r6
-	subs	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [sp, #16]
-	.loc 3 1068 0
-	movs	r3, #0
-	str	r3, [sp, #24]
-	b	.L1674
-.L1671:
+	ldr	r3, [fp, #-68]
+.LVL1503:
+	ldr	r2, [fp, #-88]
+.LVL1504:
+	cmp	r5, r2
+	cmpne	r5, r3
+	ldrh	r3, [r7, #34]
+.LVL1505:
+	bne	.L1647
+	.loc 3 1062 0
+	ldr	r2, [fp, #-68]
+.LVL1506:
+	cmp	r5, r2
+	bne	.L1648
 	.loc 3 1063 0
-	ldrh	r2, [r4, #34]
+	mov	r1, r3
 	mov	r0, r8
-	mov	r1, r2
-	str	r2, [sp, #16]
-	bl	__aeabi_uidivmod
-.LVL1523:
+	str	r3, [fp, #-84]
+	bl	__umodsi3
+.LVL1507:
 	.loc 3 1064 0
-	ldr	r2, [sp, #16]
+	ldr	r3, [fp, #-84]
+	ldr	r2, [fp, #-76]
+.LVL1508:
 	.loc 3 1063 0
-	str	r1, [sp, #24]
+	str	r0, [fp, #-92]
 	.loc 3 1064 0
-	subs	r2, r2, r1
-	ldr	r1, [sp, #12]
-.LVL1524:
-	mov	r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r3, r1
-	str	r3, [sp, #16]
-.L1674:
+	sub	r3, r3, r0
+	cmp	r3, r2
+	movcs	r3, r2
+	str	r3, [fp, #-84]
+.L1649:
 	.loc 3 1072 0
-	ldrh	r3, [r4, #34]
-	ldr	r2, [sp, #16]
+	ldrh	r3, [r7, #34]
+	ldr	r2, [fp, #-84]
+.LVL1509:
 	cmp	r2, r3
-	.loc 3 1074 0
-	ldr	r3, [r4, #3800]
+	.loc 3 1073 0
+	ldr	r3, [fp, #-68]
+.LVL1510:
 	.loc 3 1072 0
-	bne	.L1675
+	bne	.L1650
 	.loc 3 1073 0
-	cmp	r6, r10
+	cmp	r5, r3
 	.loc 3 1074 0
-	add	r7, r7, r3
+	ldr	r3, [r7, #3800]
+.LVL1511:
+	add	r6, r3, r6
+	ldreq	r3, [fp, #-80]
+.LVL1512:
 	.loc 3 1073 0
-	bne	.L1676
-	.loc 3 1074 0
-	ldr	r3, [sp, #4]
-.LVL1525:
-.L1720:
-	.loc 3 1117 0
-	str	r3, [r7, #8]
-.LVL1526:
-	b	.L1677
-.LVL1527:
-.L1676:
+	beq	.L1694
 	.loc 3 1076 0
-	ldr	r2, [sp, #16]
-	ldr	r3, [sp, #4]
-.LVL1528:
-	muls	r2, r6, r2
+	ldr	r3, [fp, #-84]
+.LVL1513:
+	mul	r2, r3, r5
+	ldr	r3, [fp, #-80]
+.LVL1514:
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
-	str	r2, [r7, #8]
-.LVL1529:
-.L1677:
+	str	r2, [r6, #8]
+.LVL1515:
+.L1652:
 	.loc 3 1119 0
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r4, #8]
-.LVL1530:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r7, #8]
+.LVL1516:
 	cmp	r2, r3
-	bcc	.L1687
+	bcc	.L1663
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	movw	r2, #1119
-	ldr	r1, .L1722+16
-.LVL1531:
-	ldr	r0, .L1722+20
+	ldr	r1, .L1696+16
+	ldr	r0, .L1696+20
 	bl	printk
-.LVL1532:
-.L1687:
+.LVL1517:
+.L1663:
 	.loc 3 1120 0 is_stmt 1
-	ldr	r2, [sp, #32]
-	movw	r3, #61589
-	ldr	r1, [sp, #28]
-.LVL1533:
+	ldr	r3, .L1696+36
 	.loc 3 1046 0
 	add	r9, r9, #1
 	.loc 3 1120 0
+	ldr	r2, [fp, #-100]
+	ldr	r1, [fp, #-96]
 	strh	r3, [r2, r1]	@ movhi
 	.loc 3 1121 0
-	ldr	r3, [r4, #2520]
+	ldr	r3, [r7, #2520]
 	.loc 3 1122 0
-	str	r6, [fp, #8]
+	str	r5, [r10, #8]
 	.loc 3 1125 0
-	adds	r6, r6, #1
+	add	r5, r5, #1
 	.loc 3 1121 0
-	str	r3, [fp, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
+	str	r3, [r10, #4]
+	add	r3, r3, #1
+	cmn	r3, #1
 	moveq	r3, #0
-	str	r3, [r4, #2520]
+	str	r3, [r7, #2520]
 	.loc 3 1123 0
-	ldr	r3, [sp, #40]
-.LVL1534:
-	str	r3, [fp, #12]
+	ldr	r3, [fp, #-64]
+.LVL1518:
+	str	r3, [r10, #12]
 	.loc 3 1124 0
-	ldrh	r3, [r5]
-.LVL1535:
-	strh	r3, [fp, #2]	@ movhi
-	b	.L1669
-.L1723:
-	.align	2
-.L1722:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR1+574
-	.word	.LC1
-.LVL1536:
-.L1675:
+	ldrh	r3, [r4]
+.LVL1519:
+	strh	r3, [r10, #2]	@ movhi
+	b	.L1645
+.LVL1520:
+.L1648:
+	.loc 3 1069 0
+	ldr	r2, [fp, #-76]
+.LVL1521:
+	smulbb	r3, r3, r5
+	add	r2, r8, r2
+.LVL1522:
+	sub	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [fp, #-84]
+	.loc 3 1068 0
+	mov	r3, #0
+	str	r3, [fp, #-92]
+	b	.L1649
+.LVL1523:
+.L1650:
 	.loc 3 1079 0
-	cmp	r6, r10
+	cmp	r5, r3
+	.loc 3 1080 0
+	ldr	r3, [r7, #3800]
+.LVL1524:
+	ldreq	r2, [r7, #3776]
+	.loc 3 1082 0
+	ldrne	r2, [r7, #3768]
 	.loc 3 1080 0
-	add	r3, r3, r7
-	ite	eq
-	ldreq	r2, [r4, #3776]
+	add	r3, r3, r6
 	.loc 3 1082 0
-	ldrne	r2, [r4, #3768]
 	str	r2, [r3, #8]
 	.loc 3 1084 0
-	ldr	r3, [sp, #40]
-	adds	r1, r3, #1
-.LVL1537:
-	beq	.L1680
-.LBB541:
+	ldr	r3, [fp, #-64]
+	cmn	r3, #1
+	beq	.L1655
+.LBB539:
 	.loc 3 1086 0
-	str	r3, [sp, #48]
+	str	r3, [fp, #-56]
 	.loc 3 1090 0
-	movs	r1, #1
+	mov	r1, #1
 	.loc 3 1088 0
-	ldr	r3, [r4, #3800]
+	ldr	r3, [r7, #3800]
 	.loc 3 1090 0
-	add	r0, sp, #44
+	sub	r0, fp, #60
 	.loc 3 1087 0
-	str	r6, [sp, #60]
+	str	r5, [fp, #-44]
 	.loc 3 1088 0
-	add	r3, r3, r7
+	add	r3, r3, r6
 	ldr	r2, [r3, #8]
 	.loc 3 1089 0
 	ldr	r3, [r3, #12]
 	.loc 3 1088 0
-	str	r2, [sp, #52]
+	str	r2, [fp, #-52]
 	.loc 3 1090 0
-	movs	r2, #0
+	mov	r2, #0
 	.loc 3 1089 0
-	str	r3, [sp, #56]
+	str	r3, [fp, #-48]
 	.loc 3 1090 0
 	bl	FlashReadPages
-.LVL1538:
+.LVL1525:
 	.loc 3 1091 0
-	ldr	r3, [sp, #44]
-	adds	r3, r3, #1
-	bne	.L1681
+	ldr	r3, [fp, #-60]
+	cmn	r3, #1
 	.loc 3 1092 0
-	ldr	r3, [r4, #2684]
-	adds	r3, r3, #1
-	str	r3, [r4, #2684]
-.L1684:
-	ldr	r3, [sp, #16]
-.LBE541:
-	.loc 3 1104 0
-	cmp	r6, r10
+	ldreq	r3, [r7, #2684]
+	addeq	r3, r3, #1
+	streq	r3, [r7, #2684]
+	.loc 3 1091 0
+	beq	.L1659
+	.loc 3 1094 0
+	ldr	r3, [r10, #8]
+	cmp	r5, r3
+	beq	.L1658
+	.loc 3 1095 0
+	ldr	r3, [r7, #2684]
+	.loc 3 1096 0
+	mov	r2, r5
+	ldr	r0, .L1696+40
+	.loc 3 1095 0
+	add	r3, r3, #1
+	str	r3, [r7, #2684]
+	.loc 3 1096 0
+	ldr	r1, [r10, #8]
+	bl	printk
+.LVL1526:
+.L1658:
+	.loc 3 1098 0
+	ldr	r3, [r10, #8]
+	cmp	r5, r3
+	beq	.L1659
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1696+16
+	ldr	r0, .L1696+20
+	bl	printk
+.LVL1527:
+.L1659:
+.LBE539:
+	.loc 3 1104 0 is_stmt 1
+	ldr	r3, [fp, #-68]
+.LVL1528:
+	cmp	r5, r3
+	ldr	r3, [fp, #-84]
+.LVL1529:
 	lsl	r2, r3, #9
-	bne	.L1685
+	bne	.L1660
 	.loc 3 1105 0
-	ldr	r3, [r4, #3800]
-	ldr	r1, [sp, #4]
-	add	r3, r3, r7
+	ldr	r3, [r7, #3800]
+	ldr	r1, [fp, #-80]
+	add	r3, r3, r6
 	ldr	r0, [r3, #8]
-	ldr	r3, [sp, #24]
+	ldr	r3, [fp, #-92]
 	add	r0, r0, r3, lsl #9
-.L1719:
-	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1539:
+.LVL1530:
 	.loc 3 1109 0
-	ldr	r3, [sp, #20]
-.LVL1540:
-	cmp	r6, r3
-	bne	.L1677
+	ldr	r3, [fp, #-88]
+.LVL1531:
+	cmp	r5, r3
+	bne	.L1652
+.L1661:
 	.loc 3 1110 0
-	ldrh	r3, [r5, #4]
-.LVL1541:
+	ldrh	r3, [r4, #4]
+.LVL1532:
 	cmp	r3, #0
-	beq	.L1677
 	.loc 3 1111 0
-	ldr	r3, [r4, #3800]
-	add	r7, r7, r3
+	ldrne	r3, [r7, #3800]
+	addne	r6, r3, r6
 	.loc 3 1112 0
-	ldr	r3, .L1724
+	ldrne	r3, .L1696+8
 	.loc 3 1111 0
-	str	r7, [r4, #3948]
+	strne	r6, [r7, #3948]
 	.loc 3 1112 0
-	str	r5, [r3, #-236]
-	b	.L1677
-.L1681:
-.LBB542:
-	.loc 3 1094 0
-	ldr	r3, [fp, #8]
-	cmp	r6, r3
-	beq	.L1683
-	.loc 3 1095 0
-	ldr	r3, [r4, #2684]
-	.loc 3 1096 0
-	mov	r2, r6
-	ldr	r0, .L1724+4
-	.loc 3 1095 0
-	adds	r3, r3, #1
-	str	r3, [r4, #2684]
-	.loc 3 1096 0
-	ldr	r1, [fp, #8]
-	bl	printk
-.LVL1542:
-.L1683:
-	.loc 3 1098 0
-	ldr	r3, [fp, #8]
-	cmp	r6, r3
-	beq	.L1684
-	.loc 3 1098 0 is_stmt 0 discriminator 1
-	movw	r2, #1098
-	ldr	r1, .L1724+8
-	ldr	r0, .L1724+12
-	bl	printk
-.LVL1543:
-	b	.L1684
-.L1680:
-.LBE542:
-	.loc 3 1101 0 is_stmt 1
-	ldr	r3, [r4, #3800]
-	movs	r1, #0
-	ldrh	r2, [r4, #86]
-	add	r3, r3, r7
+	strne	r4, [r3, #-4076]
+	b	.L1652
+.L1655:
+	.loc 3 1101 0
+	ldr	r3, [r7, #3800]
+	mov	r1, #0
+	ldrh	r2, [r7, #86]
+	add	r3, r3, r6
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL1544:
-	b	.L1684
-.L1685:
+.LVL1533:
+	b	.L1659
+.L1660:
 	.loc 3 1107 0
-	ldrh	r1, [r4, #34]
-	ldr	r0, [sp, #4]
-.LVL1545:
-	ldr	r3, [r4, #3800]
-	muls	r1, r6, r1
-	add	r3, r3, r7
+	ldrh	r1, [r7, #34]
+	ldr	r0, [fp, #-80]
+.LVL1534:
+	ldr	r3, [r7, #3800]
+	mul	r1, r5, r1
+	add	r3, r3, r6
 	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-.LVL1546:
-	b	.L1719
-.LVL1547:
-.L1716:
+.LVL1535:
+	bl	ftl_memcpy
+.LVL1536:
+	b	.L1661
+.LVL1537:
+.L1647:
 	.loc 3 1117 0
-	ldr	r3, [r4, #3800]
-.LVL1548:
-	ldr	r2, [sp, #4]
-.LVL1549:
-	add	r7, r7, r3
-	ldrh	r3, [r4, #34]
-	muls	r3, r6, r3
+	ldr	r2, [r7, #3800]
+.LVL1538:
+	mul	r3, r5, r3
+	add	r6, r2, r6
+	ldr	r2, [fp, #-80]
+.LVL1539:
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-	b	.L1720
-.LVL1550:
-.L1691:
+.L1694:
+	str	r3, [r6, #8]
+	b	.L1652
+.LVL1540:
+.L1667:
 	.loc 3 1133 0
-	mov	r3, r5
-	movs	r2, #0
+	mov	r3, r4
+.LVL1541:
+	mov	r2, #0
 	mov	r1, r9
-.LVL1551:
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r7, #3800]
+.LVL1542:
 	bl	FtlProgPages
-.LVL1552:
+.LVL1543:
 	.loc 3 1134 0
-	ldr	r3, [sp, #8]
-.LVL1553:
+	ldr	r3, [fp, #-72]
+.LVL1544:
 	cmp	r3, r9
-	bcs	.L1694
+	bcs	.L1670
 	.loc 3 1134 0 is_stmt 0 discriminator 1
 	movw	r2, #1134
-	ldr	r1, .L1724+8
-	ldr	r0, .L1724+12
+	ldr	r1, .L1696+16
+	ldr	r0, .L1696+20
 	bl	printk
-.LVL1554:
-.L1694:
+.LVL1545:
+.L1670:
 	.loc 3 1135 0 is_stmt 1
-	ldr	r3, [sp, #8]
+	ldr	r3, [fp, #-72]
 	sub	r3, r3, r9
-	str	r3, [sp, #8]
-	b	.L1662
-.LVL1555:
-.L1698:
-	.loc 3 975 0
-	mov	r0, #-1
-.LVL1556:
-	b	.L1655
-.L1725:
+	str	r3, [fp, #-72]
+	b	.L1638
+.L1697:
 	.align	2
-.L1724:
+.L1696:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LC104
+	.word	.LANCHOR0+2324
 	.word	.LANCHOR1+574
 	.word	.LC1
+	.word	.LANCHOR0+2320
+	.word	.LANCHOR0+3178
+	.word	.LANCHOR0+3126
+	.word	-3947
+	.word	.LC104
 .LFE167:
-	.fnend
 	.size	FtlWrite, .-FtlWrite
-	.align	1
+	.align	2
 	.global	sftl_write
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	.fnstart
 .LFB170:
 	.loc 3 1209 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1557:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1546:
+	mov	ip, sp
+.LCFI428:
+	push	{fp, ip, lr, pc}
+.LCFI429:
+	sub	fp, ip, #4
+.LCFI430:
 	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1558:
+.LVL1547:
 	mov	r1, r0
-.LVL1559:
-	movs	r0, #0
-.LVL1560:
-	b	FtlWrite
-.LVL1561:
+.LVL1548:
+	mov	r0, #0
+.LVL1549:
+	bl	FtlWrite
+.LVL1550:
+	.loc 3 1211 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE170:
-	.fnend
 	.size	sftl_write, .-sftl_write
-	.align	1
+	.align	2
 	.global	FtlLoadSysInfo
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-	.fnstart
 .LFB224:
 	.loc 2 1409 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.save {r3, r4, r5, r6, r7, lr}
-.LCFI196:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI431:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI432:
+	sub	fp, ip, #4
+.LCFI433:
+	.loc 2 1414 0
+	ldr	r4, .L1720
 	.loc 2 1417 0
-	movs	r1, #0
+	mov	r1, #0
+	ldr	r6, .L1720+4
 	.loc 2 1414 0
-	ldr	r4, .L1748
 	ldr	r3, [r4, #3240]
 	.loc 2 1417 0
 	ldrh	r2, [r4, #16]
@@ -18218,213 +18404,222 @@ FtlLoadSysInfo:
 	.loc 2 1415 0
 	ldr	r3, [r4, #3244]
 	.loc 2 1417 0
-	lsls	r2, r2, #1
+	lsl	r2, r2, #1
 	.loc 2 1415 0
 	str	r3, [r4, #3232]
 	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1562:
+.LVL1551:
 	.loc 2 1418 0
-	ldrh	r0, [r4, #2552]
+	movw	r3, #2552
+	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1728
-.LVL1563:
-.L1736:
+	bne	.L1700
+.L1708:
 	.loc 2 1419 0
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1564:
-.L1728:
-	.loc 2 1430 0
-	ldr	r7, .L1748+4
-	.loc 2 1421 0
-	movs	r1, #1
+	mvn	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L1700:
 	.loc 2 1427 0
-	addw	r6, r4, #3220
+	ldr	r7, .L1720+8
+	.loc 2 1421 0
+	mov	r1, #1
+	.loc 2 1430 0
+	ldr	r8, .L1720+12
 	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1565:
+.LVL1552:
 	sxth	r5, r0
-.LVL1566:
+.LVL1553:
 	.loc 2 1422 0
-	adds	r0, r0, #1
-	strh	r0, [r4, #2554]	@ movhi
-.L1730:
+	add	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L1702:
 	.loc 2 1424 0
 	cmp	r5, #0
-	bge	.L1733
+	bge	.L1705
 	.loc 2 1437 0
 	movw	r2, #1437
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1720+16
+	ldr	r0, .L1720+20
 	bl	printk
-.LVL1567:
-.L1732:
+.LVL1554:
+.L1704:
 	.loc 2 1439 0
 	ldrh	r3, [r4, #16]
 	ldrh	r2, [r4, #86]
-	adds	r3, r3, #24
+	add	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1735
+	bcs	.L1707
 	.loc 2 1439 0 is_stmt 0 discriminator 1
 	movw	r2, #1439
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1720+16
+	ldr	r0, .L1720+20
 	bl	printk
-.LVL1568:
-.L1735:
+.LVL1555:
+.L1707:
 	.loc 2 1441 0 is_stmt 1
-	movs	r2, #48
+	ldr	r5, .L1720+24
+.LVL1556:
+	mov	r2, #48
 	ldr	r1, [r4, #3228]
-	ldr	r0, .L1748+16
+	mov	r0, r5
 	bl	ftl_memcpy
-.LVL1569:
+.LVL1557:
 	.loc 2 1442 0
 	ldrh	r2, [r4, #16]
 	ldr	r1, [r4, #3228]
 	ldr	r0, [r4, #2300]
-	lsls	r2, r2, #1
-	adds	r1, r1, #48
+	lsl	r2, r2, #1
+	add	r1, r1, #48
 	bl	ftl_memcpy
-.LVL1570:
+.LVL1558:
 	.loc 2 1443 0
 	ldrh	r1, [r4, #16]
 	ldr	r3, [r4, #3228]
 	ldr	r0, [r4]
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
+	lsr	r2, r1, #3
+	add	r1, r1, #24
+	lsl	r1, r1, #1
+	add	r2, r2, #4
 	bic	r1, r1, #3
-	add	r1, r1, r3
+	add	r1, r3, r1
 	bl	ftl_memcpy
-.LVL1571:
+.LVL1559:
 	.loc 2 1445 0
 	ldr	r2, [r4, #2244]
-	ldr	r3, .L1748+4
+	ldr	r3, .L1720+12
 	cmp	r2, r3
-	bne	.L1736
+	bne	.L1708
 	.loc 2 1449 0
 	ldrb	r2, [r4, #2254]	@ zero_extendqisi2
 	ldrh	r3, [r4, #30]
 	.loc 2 1448 0
-	ldrh	r5, [r4, #2252]
-.LVL1572:
+	ldrh	r7, [r5, #8]
 	.loc 2 1449 0
 	cmp	r2, r3
 	.loc 2 1448 0
-	strh	r5, [r4, #2558]	@ movhi
+	strh	r7, [r6, #6]	@ movhi
 	.loc 2 1449 0
-	bne	.L1736
+	bne	.L1708
 	.loc 2 1452 0
-	ldr	r3, .L1748+20
+	ldr	r3, .L1720+28
 	.loc 2 1454 0
 	ldrh	r2, [r4, #34]
 	.loc 2 1455 0
 	ldr	r6, [r4, #20]
 	.loc 2 1452 0
-	str	r5, [r3, #-216]
+	str	r7, [r3, #-4056]
 	.loc 2 1453 0
 	ldrh	r3, [r4, #78]
 	.loc 2 1455 0
 	ldrh	r0, [r4, #134]
 	ldrh	r1, [r4, #8]
 	.loc 2 1453 0
-	muls	r3, r5, r3
+	mul	r3, r7, r3
 	.loc 2 1455 0
-	subs	r0, r6, r0
-	subs	r0, r0, r5
+	sub	r0, r6, r0
+	sub	r0, r0, r7
 	.loc 2 1453 0
 	str	r3, [r4, #2480]
 	.loc 2 1454 0
-	muls	r3, r2, r3
+	mul	r3, r3, r2
 	str	r3, [r4, #116]
 	.loc 2 1455 0
-	bl	__aeabi_uidiv
-.LVL1573:
+	bl	__udivsi3
+.LVL1560:
 	.loc 2 1461 0
-	cmp	r5, r6
+	cmp	r7, r6
 	.loc 2 1455 0
-	strh	r0, [r4, #2548]	@ movhi
+	movw	r3, #2548
+	strh	r0, [r4, r3]	@ movhi
 	.loc 2 1461 0
-	bls	.L1737
+	bls	.L1709
 	.loc 2 1461 0 is_stmt 0 discriminator 1
 	movw	r2, #1461
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1720+16
+	ldr	r0, .L1720+20
 	bl	printk
-.LVL1574:
-.L1737:
-	.loc 2 1464 0 is_stmt 1
-	ldrh	r3, [r4, #2260]
+.LVL1561:
+.L1709:
+	.loc 2 1463 0 is_stmt 1
+	ldrh	r0, [r5, #14]
+	movw	r3, #2324
+	ldr	r1, .L1720+32
+	.loc 2 1468 0
+	mvn	ip, #0
 	.loc 2 1463 0
-	ldrh	r1, [r4, #2258]
+	strh	r0, [r4, r3]	@ movhi
 	.loc 2 1464 0
-	lsrs	r2, r3, #6
+	ldrh	r3, [r5, #16]
+	lsr	r2, r3, #6
 	.loc 2 1465 0
 	and	r3, r3, #63
 	strb	r3, [r4, #2330]
-	.loc 2 1464 0
-	strh	r2, [r4, #2326]	@ movhi
-	.loc 2 1473 0
-	ldrh	r2, [r4, #2262]
 	.loc 2 1466 0
 	ldrb	r3, [r4, #2255]	@ zero_extendqisi2
-	.loc 2 1463 0
-	strh	r1, [r4, #2324]	@ movhi
+	.loc 2 1464 0
+	strh	r2, [r1, #2]	@ movhi
 	.loc 2 1473 0
-	strh	r2, [r4, #2372]	@ movhi
-	.loc 2 1474 0
-	ldrh	r2, [r4, #2264]
+	movw	r2, #2372
 	.loc 2 1466 0
 	strb	r3, [r4, #2332]
 	.loc 2 1468 0
-	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
+	movw	r3, #2564
+	strh	ip, [r4, r3]	@ movhi
+	.loc 2 1469 0
+	mov	r3, #0
+	.loc 2 1473 0
+	ldrh	ip, [r5, #18]
 	.loc 2 1469 0
-	movs	r3, #0
-	strh	r3, [r4, #2566]	@ movhi
+	strh	r3, [r1, #242]	@ movhi
+	.loc 2 1470 0
+	strb	r3, [r4, #2570]
+	.loc 2 1473 0
+	strh	ip, [r4, r2]	@ movhi
 	.loc 2 1474 0
-	lsrs	r0, r2, #6
+	ldrh	r2, [r5, #20]
+	.loc 2 1471 0
+	strb	r3, [r4, #2572]
+	.loc 2 1483 0
+	str	r3, [r4, #2504]
+	.loc 2 1484 0
+	str	r3, [r4, #2492]
+	.loc 2 1474 0
+	lsr	ip, r2, #6
 	.loc 2 1475 0
 	and	r2, r2, #63
 	strb	r2, [r4, #2378]
 	.loc 2 1476 0
 	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
 	.loc 2 1474 0
-	strh	r0, [r4, #2374]	@ movhi
-	.loc 2 1470 0
-	strb	r3, [r4, #2570]
+	strh	ip, [r1, #50]	@ movhi
+	.loc 2 1478 0
+	ldrh	ip, [r5, #22]
 	.loc 2 1476 0
 	strb	r2, [r4, #2380]
 	.loc 2 1478 0
-	ldrh	r2, [r4, #2266]
-	.loc 2 1471 0
-	strb	r3, [r4, #2572]
-	.loc 2 1483 0
-	str	r3, [r4, #2504]
-	.loc 2 1478 0
-	strh	r2, [r4, #2420]	@ movhi
-	.loc 2 1479 0
-	ldrh	r2, [r4, #2268]
-	.loc 2 1484 0
-	str	r3, [r4, #2492]
+	movw	r2, #2420
 	.loc 2 1485 0
 	str	r3, [r4, #2484]
+	.loc 2 1478 0
+	strh	ip, [r4, r2]	@ movhi
+	.loc 2 1479 0
+	ldrh	r2, [r5, #24]
 	.loc 2 1486 0
 	str	r3, [r4, #2500]
+	.loc 2 1489 0
+	str	r3, [r4, #2528]
 	.loc 2 1479 0
-	lsrs	r0, r2, #6
+	lsr	ip, r2, #6
 	.loc 2 1480 0
 	and	r2, r2, #63
 	strb	r2, [r4, #2426]
 	.loc 2 1481 0
 	ldrb	r2, [r4, #2257]	@ zero_extendqisi2
-	.loc 2 1489 0
-	str	r3, [r4, #2528]
 	.loc 2 1479 0
-	strh	r0, [r4, #2422]	@ movhi
+	strh	ip, [r1, #98]	@ movhi
 	.loc 2 1481 0
 	strb	r2, [r4, #2428]
 	.loc 2 1488 0
@@ -18442,64 +18637,65 @@ FtlLoadSysInfo:
 	.loc 2 1496 0
 	ldr	r2, [r4, #2520]
 	.loc 2 1494 0
-	it	hi
 	strhi	r3, [r4, #2516]
 	.loc 2 1496 0
 	ldr	r3, [r4, #2280]
 	cmp	r3, r2
 	.loc 2 1497 0
-	it	hi
 	strhi	r3, [r4, #2520]
 	.loc 2 1499 0
 	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1740
+	cmp	r0, r3
+	beq	.L1712
 	.loc 2 1500 0
-	ldr	r0, .L1748+24
+	ldr	r0, .L1720+32
 	bl	make_superblock
-.LVL1575:
-.L1740:
+.LVL1562:
+.L1712:
 	.loc 2 1502 0
-	ldrh	r2, [r4, #2372]
+	movw	r3, #2372
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1741
+	beq	.L1713
 	.loc 2 1503 0
-	ldr	r0, .L1748+28
+	ldr	r0, .L1720+36
 	bl	make_superblock
-.LVL1576:
-.L1741:
+.LVL1563:
+.L1713:
 	.loc 2 1505 0
-	ldrh	r2, [r4, #2420]
+	movw	r3, #2420
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1742
+	beq	.L1714
 	.loc 2 1506 0
-	ldr	r0, .L1748+32
+	ldr	r0, .L1720+40
 	bl	make_superblock
-.LVL1577:
-.L1742:
+.LVL1564:
+.L1714:
 	.loc 2 1508 0
-	ldrh	r2, [r4, #2564]
+	movw	r3, #2564
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1743
+	beq	.L1715
 	.loc 2 1509 0
-	ldr	r0, .L1748+36
+	ldr	r0, .L1720+44
 	bl	make_superblock
-.LVL1578:
-.L1743:
+.LVL1565:
+.L1715:
 	.loc 2 1511 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1579:
-.L1733:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.LVL1566:
+.L1705:
 	.loc 2 1425 0
-	ldrh	r3, [r4, #2552]
+	ldrh	r3, [r6]
 	.loc 2 1427 0
-	movs	r2, #1
+	mov	r2, #1
 	mov	r1, r2
-	mov	r0, r6
+	mov	r0, r7
 	.loc 2 1425 0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r4, #3224]
@@ -18508,34 +18704,36 @@ FtlLoadSysInfo:
 	str	r3, [r4, #3228]
 	.loc 2 1427 0
 	bl	FlashReadPages
-.LVL1580:
+.LVL1567:
 	.loc 2 1430 0
 	ldr	r3, [r4, #3220]
-	adds	r3, r3, #1
-	beq	.L1731
+	cmn	r3, #1
+	beq	.L1703
 	.loc 2 1431 0 discriminator 1
 	ldr	r3, [r4, #3240]
 	.loc 2 1430 0 discriminator 1
 	ldr	r3, [r3]
-	cmp	r3, r7
-	bne	.L1731
+	cmp	r3, r8
+	bne	.L1703
 	.loc 2 1432 0
 	ldr	r3, [r4, #3244]
 	ldrh	r2, [r3]
 	.loc 2 1431 0
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1732
-.L1731:
-	subs	r5, r5, #1
-.LVL1581:
+	beq	.L1704
+.L1703:
+	sub	r5, r5, #1
+.LVL1568:
 	sxth	r5, r5
-.LVL1582:
-	b	.L1730
-.L1749:
+.LVL1569:
+	b	.L1702
+.L1721:
 	.align	2
-.L1748:
+.L1720:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2552
+	.word	.LANCHOR0+3220
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
@@ -18546,255 +18744,271 @@ FtlLoadSysInfo:
 	.word	.LANCHOR0+2420
 	.word	.LANCHOR0+2564
 .LFE224:
-	.fnend
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.align	1
+	.align	2
 	.global	FtlSysBlkInit
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-	.fnstart
 .LFB242:
 	.loc 2 2356 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	.save {r4, r5, r6, lr}
-.LCFI197:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI434:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+.LCFI435:
+	sub	fp, ip, #4
+.LCFI436:
 	.loc 2 2360 0
-	movs	r3, #0
-	ldr	r4, .L1766
+	ldr	r4, .L1738
+	mov	r3, #0
+	add	r6, r4, #3968
 	.loc 2 2362 0
 	ldrh	r0, [r4, #12]
 	.loc 2 2360 0
-	strh	r3, [r4, #3968]	@ movhi
+	strh	r3, [r6]	@ movhi
 	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1583:
+.LVL1570:
 	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1584:
+.LVL1571:
 	.loc 2 2364 0
-	ldrh	r2, [r4, #2552]
+	movw	r3, #2552
+	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1751
-.L1753:
+	bne	.L1723
+.L1725:
 	.loc 2 2365 0
-	mov	r5, #-1
-.L1750:
+	mvn	r8, #0
+.L1722:
 	.loc 2 2448 0
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1751:
+	mov	r0, r8
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L1723:
 	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1585:
-	mov	r5, r0
-	cmp	r0, #0
-	bne	.L1753
+.LVL1572:
+	subs	r8, r0, #0
+	bne	.L1725
 	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1586:
+.LVL1573:
 	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1587:
+.LVL1574:
 	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1588:
+.LVL1575:
 	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1589:
+.LVL1576:
 	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1590:
+.LVL1577:
 	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1591:
+.LVL1578:
 	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1592:
+.LVL1579:
 	.loc 2 2380 0
-	movs	r0, #1
+	mov	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1593:
-.LBB546:
-.LBB547:
+.LVL1580:
+.LBB543:
+.LBB544:
 	.loc 2 2382 0
 	ldrh	r1, [r4, #114]
-	mov	r3, r5
-.LVL1594:
+	mov	r3, r8
+.LVL1581:
 	.loc 2 2383 0
 	ldr	r2, [r4, #2468]
-	movs	r0, #12
-.L1754:
+	mov	r0, #12
+.L1726:
 	.loc 2 2382 0
 	cmp	r3, r1
-	bge	.L1759
+	bge	.L1731
 	.loc 2 2383 0
-	mla	r6, r0, r3, r2
-	ldr	r6, [r6, #4]
-	cmp	r6, #0
-	bge	.L1755
-.L1759:
+	mla	ip, r0, r3, r2
+	ldr	ip, [ip, #4]
+	cmp	ip, #0
+	bge	.L1727
+.L1731:
 	.loc 2 2386 0
-	ldrh	r2, [r4, #2272]
+	ldr	r5, .L1738+4
 	.loc 2 2388 0
 	cmp	r3, r1
 	.loc 2 2386 0
+	ldrh	r2, [r5, #28]
+	add	r7, r5, #80
 	add	r2, r2, #1
-	strh	r2, [r4, #2272]	@ movhi
+	strh	r2, [r5, #28]	@ movhi
 	.loc 2 2388 0
-	bge	.L1765
-.L1756:
+	bge	.L1737
+.L1728:
+	.loc 2 2390 0
+	ldr	r6, .L1738+8
 	.loc 2 2389 0
-	ldr	r0, .L1766+4
+	ldr	r0, .L1738+12
 	bl	FtlSuperblockPowerLostFix
-.LVL1595:
+.LVL1582:
 	.loc 2 2390 0
-	ldr	r0, .L1766+8
+	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1596:
-.LBB548:
+.LVL1583:
+.LBB545:
 	.loc 2 2396 0
-	ldrh	r1, [r4, #2324]
-	ldr	r2, [r4, #2300]
-	ldrh	r0, [r4, #2328]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movw	r3, #2324
+	ldr	r1, [r4, #2300]
+	ldrh	r3, [r4, r3]
+	ldrh	r0, [r7, #4]
+	lsl	r3, r3, #1
+	ldrh	r2, [r1, r3]
+	sub	r2, r2, r0
+	strh	r2, [r1, r3]	@ movhi
+	.loc 2 2402 0
+	movw	r2, #2372
+	ldrh	r2, [r4, r2]
 	.loc 2 2397 0
 	ldrh	r3, [r4, #78]
 	.loc 2 2402 0
-	ldr	r1, [r4, #2300]
-	ldrh	r0, [r4, #2372]
+	ldr	r0, [r4, #2300]
+	ldrh	ip, [r6, #4]
+	lsl	r2, r2, #1
 	.loc 2 2397 0
-	strh	r3, [r4, #2326]	@ movhi
+	strh	r3, [r7, #2]	@ movhi
 	.loc 2 2398 0
-	movs	r3, #0
+	mov	r3, #0
 	strb	r3, [r4, #2330]
 	.loc 2 2399 0
-	strh	r3, [r4, #2328]	@ movhi
+	strh	r3, [r7, #4]	@ movhi
 	.loc 2 2402 0
-	ldrh	r6, [r4, #2376]
-	ldrh	r2, [r1, r0, lsl #1]
-	subs	r2, r2, r6
-	strh	r2, [r1, r0, lsl #1]	@ movhi
+	ldrh	r1, [r0, r2]
+	sub	r1, r1, ip
+	strh	r1, [r0, r2]	@ movhi
 	.loc 2 2403 0
 	ldrh	r2, [r4, #78]
-.LBE548:
+.LBE545:
 	.loc 2 2409 0
-	ldr	r0, .L1766+12
-.LBB549:
+	ldr	r0, .L1738+16
+.LBB546:
 	.loc 2 2404 0
 	strb	r3, [r4, #2378]
 	.loc 2 2403 0
-	strh	r2, [r4, #2374]	@ movhi
+	strh	r2, [r6, #2]	@ movhi
 	.loc 2 2405 0
-	strh	r3, [r4, #2376]	@ movhi
-.LBE549:
+	strh	r3, [r6, #4]	@ movhi
+.LBE546:
 	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1597:
+.LVL1584:
 	.loc 2 2410 0
-	ldr	r0, .L1766+16
+	add	r0, r6, #1536
 	bl	FtlMapBlkWriteDump_data
-.LVL1598:
+.LVL1585:
 	.loc 2 2422 0
-	ldrh	r3, [r4, #2274]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2274]	@ movhi
+	ldrh	r3, [r5, #30]
+	add	r3, r3, #1
+	strh	r3, [r5, #30]	@ movhi
 	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1599:
+.LVL1586:
 	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1600:
+.LVL1587:
 	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1601:
-	b	.L1760
-.LVL1602:
-.L1755:
+.LVL1588:
+	b	.L1732
+.LVL1589:
+.L1727:
 	.loc 2 2382 0
-	adds	r3, r3, #1
-	b	.L1754
-.L1765:
+	add	r3, r3, #1
+	b	.L1726
+.L1737:
 	.loc 2 2388 0
-	ldrh	r3, [r4, #3968]
-.LVL1603:
+	ldrh	r3, [r6]
+.LVL1590:
 	cmp	r3, #0
-	bne	.L1756
-.L1760:
+	bne	.L1728
+.L1732:
 	.loc 2 2429 0
-	ldrh	r0, [r4, #2324]
+	movw	r3, #2324
+	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1761
-	ldrh	r3, [r4, #2328]
-	cbnz	r3, .L1761
+	beq	.L1733
+	ldrh	r3, [r7, #4]
+	cmp	r3, #0
+	bne	.L1733
+	.loc 2 2431 0
+	ldr	r6, .L1738+8
 	.loc 2 2430 0
-	ldrh	r3, [r4, #2376]
-	cbnz	r3, .L1761
+	ldrh	r3, [r6, #4]
+	cmp	r3, #0
+	bne	.L1733
 	.loc 2 2432 0
 	bl	FtlGcRefreshBlock
-.LVL1604:
+.LVL1591:
 	.loc 2 2433 0
-	ldrh	r0, [r4, #2372]
+	movw	r3, #2372
+	ldrh	r0, [r4, r3]
 	bl	FtlGcRefreshBlock
-.LVL1605:
+.LVL1592:
 	.loc 2 2434 0
-	ldr	r0, .L1766+4
+	sub	r0, r6, #48
 	bl	allocate_new_data_superblock
-.LVL1606:
+.LVL1593:
 	.loc 2 2435 0
-	ldr	r0, .L1766+8
+	mov	r0, r6
 	bl	allocate_new_data_superblock
-.LVL1607:
-.L1761:
+.LVL1594:
+.L1733:
 	.loc 2 2440 0
-	ldrh	r3, [r4, #2272]
-	lsls	r3, r3, #27
-	bne	.L1750
+	ldrh	r3, [r5, #28]
+	tst	r3, #31
+	bne	.L1722
 	.loc 2 2441 0
 	bl	FtlVpcCheckAndModify
-.LVL1608:
-	b	.L1750
-.L1767:
+.LVL1595:
+	b	.L1722
+.L1739:
 	.align	2
-.L1766:
+.L1738:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2244
 	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2324
 	.word	.LANCHOR0+3864
-	.word	.LANCHOR0+3908
-.LBE547:
-.LBE546:
+.LBE544:
+.LBE543:
 .LFE242:
-	.fnend
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.align	1
+	.align	2
 	.global	ftl_low_format
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_low_format, %function
 ftl_low_format:
-	.fnstart
 .LFB160:
 	.loc 3 623 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI198:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI437:
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+.LCFI438:
+	sub	fp, ip, #4
+.LCFI439:
 	.loc 3 629 0
-	movs	r3, #0
-	ldr	r4, .L1792
+	ldr	r4, .L1764
+	mov	r3, #0
 	.loc 3 631 0
 	ldrh	r0, [r4, #12]
 	.loc 3 629 0
@@ -18803,66 +19017,69 @@ ftl_low_format:
 	str	r3, [r4, #2520]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL1609:
+.LVL1596:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1610:
-	cbz	r0, .L1769
+.LVL1597:
+	cmp	r0, #0
+	beq	.L1741
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL1611:
-.L1769:
+.LVL1598:
+.L1741:
 	.loc 3 637 0 discriminator 1
-	ldr	r0, .L1792+4
+	ldr	r0, .L1764+4
 	.loc 3 623 0 discriminator 1
-	movs	r2, #0
-.L1770:
+	mov	r2, #0
+.L1742:
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r4, #34]
 	uxth	r3, r2
-	adds	r2, r2, #1
+	add	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1771
+	blt	.L1743
 	.loc 3 642 0
 	ldrh	r6, [r4, #16]
 	.loc 3 641 0
-	movs	r5, #0
-.LVL1612:
-.L1772:
+	mov	r5, #0
+.LVL1599:
+.L1744:
 	.loc 3 642 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r6
-	bhi	.L1773
+	bhi	.L1745
 	.loc 3 645 0
 	ldrh	r1, [r4, #8]
-	subs	r3, r5, #3
+	sub	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1774
-.L1778:
+	bge	.L1746
+.L1750:
 	.loc 3 641 0
-	movs	r5, #0
-.LVL1613:
-	mov	r6, r5
-.LVL1614:
-.L1775:
+	mov	r0, #0
+	mov	r6, r0
+.LVL1600:
+.L1747:
 	.loc 3 656 0 discriminator 1
-	ldrh	r3, [r4, #16]
-	uxth	r0, r5
-	adds	r5, r5, #1
-	cmp	r3, r0
-	bhi	.L1779
+	ldrh	r2, [r4, #16]
+	uxth	r3, r0
+	add	r5, r0, #1
+.LVL1601:
+	cmp	r2, r3
+	bhi	.L1751
 	.loc 3 658 0
 	ldrh	r3, [r4, #18]
+	.loc 3 662 0
+	movw	r9, #2548
 	.loc 3 661 0
 	ldrh	r5, [r4, #8]
-	ldr	r9, [r4, #20]
+	ldr	r10, [r4, #20]
 	.loc 3 658 0
 	str	r3, [r4, #3764]
 	.loc 3 661 0
 	mov	r1, r5
-	mov	r0, r9
-	bl	__aeabi_uidiv
-.LVL1615:
+	mov	r0, r10
+	bl	__udivsi3
+.LVL1602:
 	.loc 3 662 0
 	ubfx	r7, r0, #5, #16
 	.loc 3 661 0
@@ -18872,416 +19089,447 @@ ftl_low_format:
 	.loc 3 661 0
 	str	r0, [r4, #2480]
 	.loc 3 662 0
-	strh	r3, [r4, #2548]	@ movhi
+	strh	r3, [r4, r9]	@ movhi
 	.loc 3 663 0
-	movs	r3, #24
-	muls	r3, r5, r3
+	mov	r3, #24
+	mul	r3, r3, r5
 	cmp	r6, r3
-	ble	.L1780
+	ble	.L1752
 	.loc 3 664 0
 	mov	r1, r5
-	sub	r0, r9, r6
-	bl	__aeabi_uidiv
-.LVL1616:
+	sub	r0, r10, r6
+	bl	__udivsi3
+.LVL1603:
 	str	r0, [r4, #2480]
 	.loc 3 665 0
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r4, #2548]	@ movhi
-.L1780:
+	lsr	r0, r0, #5
+	add	r0, r0, #24
+	strh	r0, [r4, r9]	@ movhi
+.L1752:
 	.loc 3 668 0
 	ldrh	r3, [r4, #70]
-	cbz	r3, .L1782
+	cmp	r3, #0
+	beq	.L1754
 	.loc 3 669 0
-	ldrh	r2, [r4, #2548]
-	add	r2, r2, r3, lsr #1
-	strh	r2, [r4, #2548]	@ movhi
+	movw	r2, #2548
+	ldrh	r1, [r4, r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r4, r2]	@ movhi
 	.loc 3 670 0
-	mul	r2, r5, r3
-	cmp	r6, r2
+	mul	r1, r5, r3
+	cmp	r6, r1
 	.loc 3 672 0
-	itttt	lt
 	addlt	r3, r3, #32
 	.loc 3 671 0
 	strlt	r8, [r4, #2480]
 	.loc 3 672 0
-	addlt	r3, r3, r7
-	strhlt	r3, [r4, #2548]	@ movhi
-.L1782:
+	addlt	r3, r7, r3
+	strhlt	r3, [r4, r2]	@ movhi
+.L1754:
 	.loc 3 677 0
-	ldrh	r2, [r4, #2548]
+	movw	r3, #2548
+	ldr	r6, .L1764+8
+.LVL1604:
+	ldrh	r2, [r4, r3]
 	.loc 3 689 0
-	movw	r6, #65535
-.LVL1617:
+	mvn	r7, #0
 	.loc 3 677 0
 	ldr	r3, [r4, #2480]
-	ldr	r7, .L1792+8
-	subs	r3, r3, r2
-	muls	r5, r3, r5
+	sub	r3, r3, r2
+	mul	r5, r5, r3
 	.loc 3 678 0
 	ldrh	r3, [r4, #78]
 	.loc 3 677 0
-	str	r5, [r7, #-216]
+	str	r5, [r6, #-4056]
 	.loc 3 678 0
-	muls	r5, r3, r5
+	mul	r5, r5, r3
 	.loc 3 679 0
 	ldrh	r3, [r4, #34]
 	.loc 3 678 0
 	str	r5, [r4, #2480]
 	.loc 3 679 0
-	muls	r5, r3, r5
+	mul	r5, r5, r3
 	str	r5, [r4, #116]
-	mov	r5, r7
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL1618:
+.LVL1605:
 	.loc 3 687 0
 	ldrh	r2, [r4, #18]
-	movs	r1, #0
+	mov	r1, #0
 	ldr	r0, [r4, #2300]
-	.loc 3 701 0
-	ldr	r7, .L1792+12
+	.loc 3 689 0
+	ldr	r5, .L1764+12
+	.loc 3 687 0
+	lsl	r2, r2, #1
+	.loc 3 694 0
+	sub	r5, r5, #240
 	.loc 3 687 0
-	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1619:
+.LVL1606:
+	.loc 3 689 0
+	movw	r2, #2564
+	.loc 3 688 0
+	mov	r3, #0
+	.loc 3 689 0
+	strh	r7, [r4, r2]	@ movhi
+	.loc 3 696 0
+	movw	r2, #2324
+	strh	r3, [r4, r2]	@ movhi
 	.loc 3 698 0
+	mov	r1, #255
 	ldrh	r2, [r4, #16]
+	.loc 3 690 0
+	strh	r3, [r5, #242]	@ movhi
+	.loc 3 701 0
+	mov	r8, r5
 	.loc 3 688 0
-	movs	r3, #0
 	str	r3, [r4, #2476]
-	.loc 3 698 0
-	movs	r1, #255
-	.loc 3 690 0
-	strh	r3, [r4, #2566]	@ movhi
 	.loc 3 691 0
 	strb	r3, [r4, #2570]
 	.loc 3 692 0
 	strb	r3, [r4, #2572]
 	.loc 3 698 0
-	lsrs	r2, r2, #3
+	lsr	r2, r2, #3
 	.loc 3 694 0
-	strh	r3, [r4, #2326]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
 	.loc 3 695 0
 	strb	r3, [r4, #2330]
-	.loc 3 696 0
-	strh	r3, [r4, #2324]	@ movhi
 	.loc 3 697 0
-	movs	r3, #1
+	mov	r3, #1
 	.loc 3 698 0
 	ldr	r0, [r4]
-	.loc 3 689 0
-	strh	r6, [r4, #2564]	@ movhi
 	.loc 3 697 0
 	strb	r3, [r4, #2332]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL1620:
-.L1784:
+.LVL1607:
+.L1756:
 	.loc 3 701 0
-	mov	r0, r7
+	mov	r0, r8
 	bl	make_superblock
-.LVL1621:
+.LVL1608:
 	.loc 3 702 0
 	ldrb	r3, [r4, #2331]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2324]
 	cmp	r3, #0
-	bne	.L1785
+	ldrh	r3, [r5]
+	bne	.L1757
 	.loc 3 705 0
-	ldr	r3, [r4, #2300]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, [r4, #2300]
+	lsl	r3, r3, #1
+	strh	r7, [r2, r3]	@ movhi
 	.loc 3 706 0
-	ldrh	r3, [r4, #2324]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2324]	@ movhi
+	ldrh	r3, [r5]
+	add	r3, r3, #1
+	strh	r3, [r5]	@ movhi
 	.loc 3 707 0
-	b	.L1784
-.L1771:
+	b	.L1756
+.L1743:
 	.loc 3 636 0 discriminator 3
-	ldr	r5, [r4, #3776]
-	mvns	r1, r3
+	ldr	ip, [r4, #3776]
+	mvn	r1, r3
 	orr	r1, r3, r1, lsl #16
-	str	r1, [r5, r3, lsl #2]
+	str	r1, [ip, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	ldr	r1, [r4, #3768]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1770
-.LVL1622:
-.L1773:
+	b	.L1742
+.LVL1609:
+.L1745:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r6
-	movs	r1, #1
+	mov	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL1623:
+.LVL1610:
 	.loc 3 642 0 discriminator 3
-	adds	r6, r6, #1
+	add	r6, r6, #1
 	.loc 3 643 0 discriminator 3
 	add	r5, r5, r0
-.LVL1624:
+.LVL1611:
 	uxth	r5, r5
-.LVL1625:
+.LVL1612:
 	.loc 3 642 0 discriminator 3
 	uxth	r6, r6
-	b	.L1772
-.L1774:
+	b	.L1744
+.L1746:
 	.loc 3 647 0
 	mov	r0, r5
-	bl	__aeabi_uidiv
-.LVL1626:
+	bl	__udivsi3
+.LVL1613:
 	ldr	r3, [r4, #108]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL1627:
+.LVL1614:
 	.loc 3 648 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1628:
+.LVL1615:
 	.loc 3 650 0
 	ldrh	r5, [r4, #16]
-.LVL1629:
-.L1776:
+.LVL1616:
+.L1748:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #18]
 	cmp	r3, r5
-	bls	.L1778
+	bls	.L1750
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r5
-	movs	r1, #1
+	mov	r1, #1
 	.loc 3 650 0 discriminator 3
-	adds	r5, r5, #1
+	add	r5, r5, #1
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1630:
+.LVL1617:
 	.loc 3 650 0 discriminator 3
 	uxth	r5, r5
-	b	.L1776
-.LVL1631:
-.L1779:
+	b	.L1748
+.LVL1618:
+.L1751:
 	.loc 3 657 0 discriminator 3
-	movs	r1, #0
+	mov	r1, #0
+	uxth	r0, r0
 	bl	FtlLowFormatEraseBlock
-.LVL1632:
+.LVL1619:
 	add	r6, r6, r0
-.LVL1633:
+.LVL1620:
+	mov	r0, r5
 	uxth	r6, r6
-.LVL1634:
-	b	.L1775
-.LVL1635:
-.L1785:
+.LVL1621:
+	b	.L1747
+.LVL1622:
+.L1757:
 	.loc 3 709 0
-	ldr	r3, [r4, #2516]
-	.loc 3 721 0
-	movw	r6, #65535
+	ldr	r2, [r4, #2516]
 	.loc 3 710 0
-	ldrh	r1, [r4, #2328]
-	.loc 3 717 0
-	ldr	r7, .L1792+16
+	lsl	r3, r3, #1
+	ldrh	r1, [r5, #4]
+	.loc 3 721 0
+	mvn	r7, #0
 	.loc 3 709 0
-	str	r3, [r4, #2336]
-	adds	r3, r3, #1
-	str	r3, [r4, #2516]
+	str	r2, [r4, #2336]
+	add	r2, r2, #1
+	str	r2, [r4, #2516]
 	.loc 3 710 0
-	ldr	r3, [r4, #2300]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, [r4, #2300]
+	strh	r1, [r2, r3]	@ movhi
 	.loc 3 712 0
-	movs	r3, #0
-	strh	r3, [r4, #2374]	@ movhi
+	mov	r3, #0
+	ldr	r2, .L1764+16
+	.loc 3 714 0
+	movw	r1, #2372
 	.loc 3 713 0
 	strb	r3, [r4, #2378]
+	.loc 3 712 0
+	strh	r3, [r2, #2]	@ movhi
+	.loc 3 717 0
+	mov	r8, r2
 	.loc 3 714 0
-	ldrh	r3, [r4, #2324]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2372]	@ movhi
+	ldrh	r3, [r5]
+	mov	r5, r2
+	add	r3, r3, #1
+	strh	r3, [r4, r1]	@ movhi
 	.loc 3 715 0
-	movs	r3, #1
+	mov	r3, #1
 	strb	r3, [r4, #2380]
-.L1786:
+.L1758:
 	.loc 3 717 0
-	mov	r0, r7
+	mov	r0, r8
 	bl	make_superblock
-.LVL1636:
+.LVL1623:
 	.loc 3 718 0
 	ldrb	r3, [r4, #2379]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2372]
-	cbnz	r3, .L1787
+	cmp	r3, #0
+	ldrh	r3, [r5]
+	bne	.L1759
 	.loc 3 721 0
-	ldr	r3, [r4, #2300]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, [r4, #2300]
+	lsl	r3, r3, #1
+	strh	r7, [r2, r3]	@ movhi
 	.loc 3 722 0
-	ldrh	r3, [r4, #2372]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2372]	@ movhi
+	ldrh	r3, [r5]
+	add	r3, r3, #1
+	strh	r3, [r5]	@ movhi
 	.loc 3 723 0
-	b	.L1786
-.L1787:
+	b	.L1758
+.L1759:
 	.loc 3 725 0
-	ldr	r3, [r4, #2516]
-	.loc 3 727 0
-	movw	r6, #65535
+	ldr	r2, [r4, #2516]
 	.loc 3 726 0
-	ldrh	r1, [r4, #2376]
+	lsl	r3, r3, #1
+	ldrh	r1, [r5, #4]
+	.loc 3 727 0
+	mvn	r5, #0
 	.loc 3 725 0
-	str	r3, [r4, #2384]
-	adds	r3, r3, #1
-	str	r3, [r4, #2516]
+	str	r2, [r4, #2384]
+	add	r2, r2, #1
+	str	r2, [r4, #2516]
 	.loc 3 726 0
-	ldr	r3, [r4, #2300]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, [r4, #2300]
+	strh	r1, [r2, r3]	@ movhi
 	.loc 3 727 0
-	strh	r6, [r4, #2420]	@ movhi
+	movw	r3, #2420
+	strh	r5, [r4, r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1637:
-	.loc 3 731 0
-	movs	r3, #0
-	.loc 3 730 0
-	strh	r0, [r4, #2552]	@ movhi
+.LVL1624:
+	ldr	r3, .L1764+20
+	movw	r2, #2552
+	strh	r0, [r4, r2]	@ movhi
 	.loc 3 731 0
-	strh	r3, [r4, #2554]	@ movhi
+	mov	r2, #0
+	strh	r2, [r3, #2]	@ movhi
 	.loc 3 733 0
-	ldr	r3, [r5, #-216]
+	ldr	r2, [r6, #-4056]
 	.loc 3 732 0
-	strh	r6, [r4, #2556]	@ movhi
+	strh	r5, [r3, #4]	@ movhi
 	.loc 3 733 0
-	strh	r3, [r4, #2558]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
 	.loc 3 734 0
 	ldr	r3, [r4, #2516]
 	str	r3, [r4, #2560]
-	adds	r3, r3, #1
+	add	r3, r3, #1
 	str	r3, [r4, #2516]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL1638:
+.LVL1625:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL1639:
-	cbnz	r0, .L1788
+.LVL1626:
+	cmp	r0, #0
+	.loc 3 739 0
+	mov	r0, #0
 	.loc 3 737 0
-	ldr	r3, .L1792+20
-	movs	r2, #1
-	str	r2, [r3]
-.L1788:
+	ldreq	r3, .L1764+24
+	moveq	r2, #1
+	streq	r2, [r3]
 	.loc 3 739 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1793:
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1765:
 	.align	2
-.L1792:
+.L1764:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2564
 	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2552
 	.word	.LANCHOR2
 .LFE160:
-	.fnend
 	.size	ftl_low_format, .-ftl_low_format
-	.align	1
+	.align	2
 	.global	sftl_init
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	sftl_init, %function
 sftl_init:
-	.fnstart
 .LFB161:
 	.loc 3 743 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI199:
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+.LCFI440:
+	push	{r4, r5, fp, ip, lr, pc}
+.LCFI441:
+	sub	fp, ip, #4
+.LCFI442:
 	.loc 3 746 0
-	mov	r3, #-1
-	ldr	r5, .L1800
+	ldr	r5, .L1772
+	mvn	r3, #0
 	.loc 3 753 0
-	ldr	r4, .L1800+4
+	ldr	r4, .L1772+4
 	.loc 3 749 0
-	ldr	r1, .L1800+8
-	ldr	r0, .L1800+12
+	ldr	r1, .L1772+8
+	ldr	r0, .L1772+12
 	.loc 3 746 0
 	str	r3, [r5]
 	.loc 3 749 0
 	bl	printk
-.LVL1640:
+.LVL1627:
 	.loc 3 750 0
-	ldr	r0, .L1800+16
+	ldr	r0, .L1772+16
 	bl	FtlConstantsInit
-.LVL1641:
+.LVL1628:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL1642:
+.LVL1629:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL1643:
+.LVL1630:
 	.loc 3 753 0
 	ldrh	r0, [r4, #12]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1644:
+.LVL1631:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL1645:
-	cbnz	r0, .L1798
+.LVL1632:
+	cmp	r0, #0
+	bne	.L1770
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL1646:
-	cbnz	r0, .L1798
+.LVL1633:
+	cmp	r0, #0
+	bne	.L1770
+	.loc 3 779 0
+	mov	r3, #1
+	.loc 3 783 0
+	add	r4, r4, #2320
 	.loc 3 779 0
-	movs	r3, #1
 	str	r3, [r5]
 	.loc 3 783 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4]
 	cmp	r3, #15
-	bhi	.L1798
+	bhi	.L1770
 	movw	r4, #8129
-.L1797:
-.LBB550:
+.L1769:
+.LBB547:
 	.loc 3 786 0 discriminator 3
-	movs	r1, #1
-	movs	r0, #0
+	mov	r1, #1
+	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1647:
+.LVL1634:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-	bne	.L1797
-.L1798:
-.LBE550:
+	bne	.L1769
+.L1770:
+.LBE547:
 	.loc 3 794 0
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1801:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1773:
 	.align	2
-.L1800:
+.L1772:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.word	.LC70
 	.word	.LC71
 	.word	g_nand_phy_info
 .LFE161:
-	.fnend
 	.size	sftl_init, .-sftl_init
-	.align	1
+	.align	2
 	.global	ftl_memcmp
 	.syntax unified
-	.thumb
-	.thumb_func
+	.arm
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-	.fnstart
 .LFB279:
 	.loc 1 211 0
 	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1648:
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL1635:
+	mov	ip, sp
+.LCFI443:
+	push	{fp, ip, lr, pc}
+.LCFI444:
+	sub	fp, ip, #4
+.LCFI445:
 	.loc 1 212 0
-	b	memcmp
-.LVL1649:
+	bl	memcmp
+.LVL1636:
+	.loc 1 213 0
+	ldmfd	sp, {fp, sp, pc}
 .LFE279:
-	.fnend
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	gc_ink_free_return_value
@@ -19431,141 +19679,141 @@ ftl_memcmp:
 	.global	c_ftl_nand_type
 	.section	.rodata
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6616, %object
-	.size	__func__.6616, 17
-__func__.6616:
+	.type	__func__.3871, %object
+	.size	__func__.3871, 17
+__func__.3871:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6611, %object
-	.size	__func__.6611, 17
-__func__.6611:
+	.type	__func__.3866, %object
+	.size	__func__.3866, 17
+__func__.3866:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6647, %object
-	.size	__func__.6647, 17
-__func__.6647:
+	.type	__func__.3902, %object
+	.size	__func__.3902, 17
+__func__.3902:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6679, %object
-	.size	__func__.6679, 22
-__func__.6679:
+	.type	__func__.3934, %object
+	.size	__func__.3934, 22
+__func__.3934:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6785, %object
-	.size	__func__.6785, 22
-__func__.6785:
+	.type	__func__.4040, %object
+	.size	__func__.4040, 22
+__func__.4040:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7108, %object
-	.size	__func__.7108, 16
-__func__.7108:
+	.type	__func__.4363, %object
+	.size	__func__.4363, 16
+__func__.4363:
 	.ascii	"make_superblock\000"
-	.type	__func__.7283, %object
-	.size	__func__.7283, 19
-__func__.7283:
+	.type	__func__.4538, %object
+	.size	__func__.4538, 19
+__func__.4538:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.7523, %object
-	.size	__func__.7523, 15
-__func__.7523:
+	.type	__func__.4778, %object
+	.size	__func__.4778, 15
+__func__.4778:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.7540, %object
-	.size	__func__.7540, 15
-__func__.7540:
+	.type	__func__.4795, %object
+	.size	__func__.4795, 15
+__func__.4795:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6721, %object
-	.size	__func__.6721, 26
-__func__.6721:
+	.type	__func__.3976, %object
+	.size	__func__.3976, 26
+__func__.3976:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6235, %object
-	.size	__func__.6235, 11
-__func__.6235:
+	.type	__func__.3490, %object
+	.size	__func__.3490, 11
+__func__.3490:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6451, %object
-	.size	__func__.6451, 14
-__func__.6451:
+	.type	__func__.3706, %object
+	.size	__func__.3706, 14
+__func__.3706:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6688, %object
-	.size	__func__.6688, 16
-__func__.6688:
+	.type	__func__.3943, %object
+	.size	__func__.3943, 16
+__func__.3943:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6746, %object
-	.size	__func__.6746, 31
-__func__.6746:
+	.type	__func__.4001, %object
+	.size	__func__.4001, 31
+__func__.4001:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6760, %object
-	.size	__func__.6760, 16
-__func__.6760:
+	.type	__func__.4015, %object
+	.size	__func__.4015, 16
+__func__.4015:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6732, %object
-	.size	__func__.6732, 15
-__func__.6732:
+	.type	__func__.3987, %object
+	.size	__func__.3987, 15
+__func__.3987:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6802, %object
-	.size	__func__.6802, 9
-__func__.6802:
+	.type	__func__.4057, %object
+	.size	__func__.4057, 9
+__func__.4057:
 	.ascii	"log2phys\000"
-	.type	__func__.7017, %object
-	.size	__func__.7017, 16
-__func__.7017:
+	.type	__func__.4272, %object
+	.size	__func__.4272, 16
+__func__.4272:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7170, %object
-	.size	__func__.7170, 14
-__func__.7170:
+	.type	__func__.4425, %object
+	.size	__func__.4425, 14
+__func__.4425:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6897, %object
-	.size	__func__.6897, 14
-__func__.6897:
+	.type	__func__.4152, %object
+	.size	__func__.4152, 14
+__func__.4152:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7129, %object
-	.size	__func__.7129, 18
-__func__.7129:
+	.type	__func__.4384, %object
+	.size	__func__.4384, 18
+__func__.4384:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7255, %object
-	.size	__func__.7255, 25
-__func__.7255:
+	.type	__func__.4510, %object
+	.size	__func__.4510, 25
+__func__.4510:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7296, %object
-	.size	__func__.7296, 16
-__func__.7296:
+	.type	__func__.4551, %object
+	.size	__func__.4551, 16
+__func__.4551:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7303, %object
-	.size	__func__.7303, 20
-__func__.7303:
+	.type	__func__.4558, %object
+	.size	__func__.4558, 20
+__func__.4558:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7051, %object
-	.size	__func__.7051, 22
-__func__.7051:
+	.type	__func__.4306, %object
+	.size	__func__.4306, 22
+__func__.4306:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6494, %object
-	.size	__func__.6494, 11
-__func__.6494:
+	.type	__func__.3749, %object
+	.size	__func__.3749, 11
+__func__.3749:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6875, %object
-	.size	__func__.6875, 15
-__func__.6875:
+	.type	__func__.4130, %object
+	.size	__func__.4130, 15
+__func__.4130:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7154, %object
-	.size	__func__.7154, 21
-__func__.7154:
+	.type	__func__.4409, %object
+	.size	__func__.4409, 21
+__func__.4409:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7276, %object
-	.size	__func__.7276, 29
-__func__.7276:
+	.type	__func__.4531, %object
+	.size	__func__.4531, 29
+__func__.4531:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6359, %object
-	.size	__func__.6359, 13
-__func__.6359:
+	.type	__func__.3614, %object
+	.size	__func__.3614, 13
+__func__.3614:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7373, %object
-	.size	__func__.7373, 19
-__func__.7373:
+	.type	__func__.4628, %object
+	.size	__func__.4628, 19
+__func__.4628:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7479, %object
-	.size	__func__.7479, 23
-__func__.7479:
+	.type	__func__.4734, %object
+	.size	__func__.4734, 23
+__func__.4734:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6387, %object
-	.size	__func__.6387, 9
-__func__.6387:
+	.type	__func__.3642, %object
+	.size	__func__.3642, 9
+__func__.3642:
 	.ascii	"FtlWrite\000"
-	.type	__func__.6954, %object
-	.size	__func__.6954, 15
-__func__.6954:
+	.type	__func__.4209, %object
+	.size	__func__.4209, 15
+__func__.4209:
 	.ascii	"FtlLoadSysInfo\000"
 	.data
 	.align	2
@@ -19586,7 +19834,7 @@ power_up_flag:
 	.bss
 	.align	2
 	.set	.LANCHOR0,. + 0
-	.set	.LANCHOR3,. + 4344
+	.set	.LANCHOR3,. + 8184
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -20428,24 +20676,33 @@ check_vpc_table:
 	.4byte	.LFE271-.LFB271
 	.byte	0x4
 	.4byte	.LCFI0-.LFB271
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI1-.LCFI0
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x88
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x89
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI2-.LCFI1
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE0:
 .LSFDE2:
@@ -20454,6 +20711,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB286
 	.4byte	.LFE286-.LFB286
+	.byte	0x4
+	.4byte	.LCFI3-.LFB286
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI4-.LCFI3
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI5-.LCFI4
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE2:
 .LSFDE4:
@@ -20462,6 +20736,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB152
 	.4byte	.LFE152-.LFB152
+	.byte	0x4
+	.4byte	.LCFI6-.LFB152
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI7-.LCFI6
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI8-.LCFI7
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE4:
 .LSFDE6:
@@ -20470,6 +20761,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB153
 	.4byte	.LFE153-.LFB153
+	.byte	0x4
+	.4byte	.LCFI9-.LFB153
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI10-.LCFI9
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI11-.LCFI10
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE6:
 .LSFDE8:
@@ -20478,6 +20786,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB154
 	.4byte	.LFE154-.LFB154
+	.byte	0x4
+	.4byte	.LCFI12-.LFB154
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI13-.LCFI12
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI14-.LCFI13
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE8:
 .LSFDE10:
@@ -20487,29 +20812,36 @@ check_vpc_table:
 	.4byte	.LFB155
 	.4byte	.LFE155-.LFB155
 	.byte	0x4
-	.4byte	.LCFI1-.LFB155
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
+	.4byte	.LCFI15-.LFB155
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI16-.LCFI15
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI17-.LCFI16
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE10:
 .LSFDE12:
@@ -20518,6 +20850,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB158
 	.4byte	.LFE158-.LFB158
+	.byte	0x4
+	.4byte	.LCFI18-.LFB158
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI19-.LCFI18
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI20-.LCFI19
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE12:
 .LSFDE14:
@@ -20526,6 +20875,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB171
 	.4byte	.LFE171-.LFB171
+	.byte	0x4
+	.4byte	.LCFI21-.LFB171
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI22-.LCFI21
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI23-.LCFI22
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE14:
 .LSFDE16:
@@ -20535,23 +20901,30 @@ check_vpc_table:
 	.4byte	.LFB172
 	.4byte	.LFE172-.LFB172
 	.byte	0x4
-	.4byte	.LCFI2-.LFB172
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI24-.LFB172
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI25-.LCFI24
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI3-.LCFI2
-	.byte	0xe
-	.uleb128 0x14
+	.4byte	.LCFI26-.LCFI25
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE16:
 .LSFDE18:
@@ -20561,21 +20934,30 @@ check_vpc_table:
 	.4byte	.LFB173
 	.4byte	.LFE173-.LFB173
 	.byte	0x4
-	.4byte	.LCFI4-.LFB173
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
+	.4byte	.LCFI27-.LFB173
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI28-.LCFI27
+	.byte	0x84
+	.uleb128 0x8
+	.byte	0x85
+	.uleb128 0x7
+	.byte	0x86
 	.uleb128 0x6
-	.byte	0x84
+	.byte	0x87
 	.uleb128 0x5
-	.byte	0x85
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x86
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI29-.LCFI28
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE18:
 .LSFDE20:
@@ -20584,6 +20966,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB174
 	.4byte	.LFE174-.LFB174
+	.byte	0x4
+	.4byte	.LCFI30-.LFB174
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI31-.LCFI30
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI32-.LCFI31
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE20:
 .LSFDE22:
@@ -20592,6 +20991,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB177
 	.4byte	.LFE177-.LFB177
+	.byte	0x4
+	.4byte	.LCFI33-.LFB177
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI34-.LCFI33
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI35-.LCFI34
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE22:
 .LSFDE24:
@@ -20601,17 +21017,28 @@ check_vpc_table:
 	.4byte	.LFB178
 	.4byte	.LFE178-.LFB178
 	.byte	0x4
-	.4byte	.LCFI5-.LFB178
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI36-.LFB178
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI37-.LCFI36
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI38-.LCFI37
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE24:
 .LSFDE26:
@@ -20621,21 +21048,30 @@ check_vpc_table:
 	.4byte	.LFB182
 	.4byte	.LFE182-.LFB182
 	.byte	0x4
-	.4byte	.LCFI6-.LFB182
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI39-.LFB182
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI40-.LCFI39
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI41-.LCFI40
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE26:
 .LSFDE28:
@@ -20645,17 +21081,28 @@ check_vpc_table:
 	.4byte	.LFB183
 	.4byte	.LFE183-.LFB183
 	.byte	0x4
-	.4byte	.LCFI7-.LFB183
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI42-.LFB183
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI43-.LCFI42
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI44-.LCFI43
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE28:
 .LSFDE30:
@@ -20665,13 +21112,24 @@ check_vpc_table:
 	.4byte	.LFB184
 	.4byte	.LFE184-.LFB184
 	.byte	0x4
-	.4byte	.LCFI8-.LFB184
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI45-.LFB184
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI46-.LCFI45
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI47-.LCFI46
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE30:
 .LSFDE32:
@@ -20680,6 +21138,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB185
 	.4byte	.LFE185-.LFB185
+	.byte	0x4
+	.4byte	.LCFI48-.LFB185
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI49-.LCFI48
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI50-.LCFI49
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE32:
 .LSFDE34:
@@ -20689,13 +21164,24 @@ check_vpc_table:
 	.4byte	.LFB187
 	.4byte	.LFE187-.LFB187
 	.byte	0x4
-	.4byte	.LCFI9-.LFB187
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI51-.LFB187
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI52-.LCFI51
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI53-.LCFI52
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE34:
 .LSFDE36:
@@ -20704,6 +21190,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB188
 	.4byte	.LFE188-.LFB188
+	.byte	0x4
+	.4byte	.LCFI54-.LFB188
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI55-.LCFI54
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI56-.LCFI55
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE36:
 .LSFDE38:
@@ -20712,6 +21215,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB189
 	.4byte	.LFE189-.LFB189
+	.byte	0x4
+	.4byte	.LCFI57-.LFB189
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI58-.LCFI57
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI59-.LCFI58
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE38:
 .LSFDE40:
@@ -20721,17 +21241,24 @@ check_vpc_table:
 	.4byte	.LFB191
 	.4byte	.LFE191-.LFB191
 	.byte	0x4
-	.4byte	.LCFI10-.LFB191
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI60-.LFB191
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI61-.LCFI60
 	.byte	0x84
+	.uleb128 0x5
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x85
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI62-.LCFI61
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE40:
 .LSFDE42:
@@ -20741,15 +21268,22 @@ check_vpc_table:
 	.4byte	.LFB192
 	.4byte	.LFE192-.LFB192
 	.byte	0x4
-	.4byte	.LCFI11-.LFB192
-	.byte	0xe
+	.4byte	.LCFI63-.LFB192
+	.byte	0xd
 	.uleb128 0xc
-	.byte	0x84
+	.byte	0x4
+	.4byte	.LCFI64-.LCFI63
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI65-.LCFI64
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE42:
 .LSFDE44:
@@ -20759,34 +21293,44 @@ check_vpc_table:
 	.4byte	.LFB196
 	.4byte	.LFE196-.LFB196
 	.byte	0x4
-	.4byte	.LCFI12-.LFB196
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI66-.LFB196
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI67-.LCFI66
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI68-.LCFI67
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI13-.LCFI12
+	.4byte	.LCFI69-.LCFI68
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI14-.LCFI13
+	.4byte	.LCFI70-.LCFI69
 	.byte	0xb
 	.align	2
 .LEFDE44:
@@ -20797,23 +21341,22 @@ check_vpc_table:
 	.4byte	.LFB195
 	.4byte	.LFE195-.LFB195
 	.byte	0x4
-	.4byte	.LCFI15-.LFB195
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
+	.4byte	.LCFI71-.LFB195
+	.byte	0xd
+	.uleb128 0xc
 	.byte	0x4
-	.4byte	.LCFI16-.LCFI15
-	.byte	0xa
-	.byte	0xce
-	.byte	0xc3
-	.byte	0xe
-	.uleb128 0
+	.4byte	.LCFI72-.LCFI71
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI17-.LCFI16
-	.byte	0xb
+	.4byte	.LCFI73-.LCFI72
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE46:
 .LSFDE48:
@@ -20823,25 +21366,34 @@ check_vpc_table:
 	.4byte	.LFB197
 	.4byte	.LFE197-.LFB197
 	.byte	0x4
-	.4byte	.LCFI18-.LFB197
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI74-.LFB197
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI75-.LCFI74
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x89
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8a
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI76-.LCFI75
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE48:
 .LSFDE50:
@@ -20851,23 +21403,22 @@ check_vpc_table:
 	.4byte	.LFB194
 	.4byte	.LFE194-.LFB194
 	.byte	0x4
-	.4byte	.LCFI19-.LFB194
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
+	.4byte	.LCFI77-.LFB194
+	.byte	0xd
+	.uleb128 0xc
 	.byte	0x4
-	.4byte	.LCFI20-.LCFI19
-	.byte	0xa
-	.byte	0xce
-	.byte	0xc3
-	.byte	0xe
-	.uleb128 0
+	.4byte	.LCFI78-.LCFI77
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI21-.LCFI20
-	.byte	0xb
+	.4byte	.LCFI79-.LCFI78
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE50:
 .LSFDE52:
@@ -20877,21 +21428,32 @@ check_vpc_table:
 	.4byte	.LFB198
 	.4byte	.LFE198-.LFB198
 	.byte	0x4
-	.4byte	.LCFI22-.LFB198
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI80-.LFB198
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI81-.LCFI80
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI82-.LCFI81
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE52:
 .LSFDE54:
@@ -20901,17 +21463,24 @@ check_vpc_table:
 	.4byte	.LFB199
 	.4byte	.LFE199-.LFB199
 	.byte	0x4
-	.4byte	.LCFI23-.LFB199
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI83-.LFB199
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI84-.LCFI83
 	.byte	0x84
+	.uleb128 0x5
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x85
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI85-.LCFI84
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE54:
 .LSFDE56:
@@ -20920,6 +21489,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB200
 	.4byte	.LFE200-.LFB200
+	.byte	0x4
+	.4byte	.LCFI86-.LFB200
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI87-.LCFI86
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI88-.LCFI87
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE56:
 .LSFDE58:
@@ -20929,13 +21515,22 @@ check_vpc_table:
 	.4byte	.LFB201
 	.4byte	.LFE201-.LFB201
 	.byte	0x4
-	.4byte	.LCFI24-.LFB201
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x2
+	.4byte	.LCFI89-.LFB201
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI90-.LCFI89
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI91-.LCFI90
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE58:
 .LSFDE60:
@@ -20945,25 +21540,32 @@ check_vpc_table:
 	.4byte	.LFB202
 	.4byte	.LFE202-.LFB202
 	.byte	0x4
-	.4byte	.LCFI25-.LFB202
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
+	.4byte	.LCFI92-.LFB202
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI93-.LCFI92
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x89
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI94-.LCFI93
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE60:
 .LSFDE62:
@@ -20973,21 +21575,30 @@ check_vpc_table:
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.byte	0x4
-	.4byte	.LCFI26-.LFB210
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI95-.LFB210
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI96-.LCFI95
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI97-.LCFI96
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE62:
 .LSFDE64:
@@ -20997,15 +21608,22 @@ check_vpc_table:
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
 	.byte	0x4
-	.4byte	.LCFI27-.LFB216
-	.byte	0xe
+	.4byte	.LCFI98-.LFB216
+	.byte	0xd
 	.uleb128 0xc
-	.byte	0x84
+	.byte	0x4
+	.4byte	.LCFI99-.LCFI98
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI100-.LCFI99
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE64:
 .LSFDE66:
@@ -21014,6 +21632,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
+	.byte	0x4
+	.4byte	.LCFI101-.LFB222
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI102-.LCFI101
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI103-.LCFI102
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE66:
 .LSFDE68:
@@ -21022,6 +21657,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
+	.byte	0x4
+	.4byte	.LCFI104-.LFB223
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI105-.LCFI104
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI106-.LCFI105
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE68:
 .LSFDE70:
@@ -21031,19 +21683,26 @@ check_vpc_table:
 	.4byte	.LFB229
 	.4byte	.LFE229-.LFB229
 	.byte	0x4
-	.4byte	.LCFI28-.LFB229
-	.byte	0xe
-	.uleb128 0x14
+	.4byte	.LCFI107-.LFB229
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI108-.LCFI107
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x6
 	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x86
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI109-.LCFI108
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE70:
 .LSFDE72:
@@ -21053,15 +21712,22 @@ check_vpc_table:
 	.4byte	.LFB232
 	.4byte	.LFE232-.LFB232
 	.byte	0x4
-	.4byte	.LCFI29-.LFB232
-	.byte	0xe
+	.4byte	.LCFI110-.LFB232
+	.byte	0xd
 	.uleb128 0xc
-	.byte	0x84
+	.byte	0x4
+	.4byte	.LCFI111-.LCFI110
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI112-.LCFI111
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE72:
 .LSFDE74:
@@ -21071,29 +21737,36 @@ check_vpc_table:
 	.4byte	.LFB234
 	.4byte	.LFE234-.LFB234
 	.byte	0x4
-	.4byte	.LCFI30-.LFB234
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
+	.4byte	.LCFI113-.LFB234
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI114-.LCFI113
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI115-.LCFI114
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE74:
 .LSFDE76:
@@ -21103,25 +21776,36 @@ check_vpc_table:
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.byte	0x4
-	.4byte	.LCFI31-.LFB243
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI116-.LFB243
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI117-.LCFI116
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI118-.LCFI117
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE76:
 .LSFDE78:
@@ -21130,6 +21814,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
+	.byte	0x4
+	.4byte	.LCFI119-.LFB244
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI120-.LCFI119
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI121-.LCFI120
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE78:
 .LSFDE80:
@@ -21139,19 +21840,26 @@ check_vpc_table:
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.byte	0x4
-	.4byte	.LCFI32-.LFB245
-	.byte	0xe
-	.uleb128 0x14
+	.4byte	.LCFI122-.LFB245
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI123-.LCFI122
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x6
 	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x86
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI124-.LCFI123
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE80:
 .LSFDE82:
@@ -21161,38 +21869,44 @@ check_vpc_table:
 	.4byte	.LFB150
 	.4byte	.LFE150-.LFB150
 	.byte	0x4
-	.4byte	.LCFI33-.LFB150
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI125-.LFB150
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI126-.LCFI125
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI34-.LCFI33
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI127-.LCFI126
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI35-.LCFI34
+	.4byte	.LCFI128-.LCFI127
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI36-.LCFI35
+	.4byte	.LCFI129-.LCFI128
 	.byte	0xb
 	.align	2
 .LEFDE82:
@@ -21203,17 +21917,26 @@ check_vpc_table:
 	.4byte	.LFB151
 	.4byte	.LFE151-.LFB151
 	.byte	0x4
-	.4byte	.LCFI37-.LFB151
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI130-.LFB151
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI131-.LCFI130
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI132-.LCFI131
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE84:
 .LSFDE86:
@@ -21223,38 +21946,44 @@ check_vpc_table:
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.byte	0x4
-	.4byte	.LCFI38-.LFB246
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI133-.LFB246
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI134-.LCFI133
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI39-.LCFI38
-	.byte	0xe
-	.uleb128 0x40
+	.4byte	.LCFI135-.LCFI134
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI40-.LCFI39
+	.4byte	.LCFI136-.LCFI135
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI41-.LCFI40
+	.4byte	.LCFI137-.LCFI136
 	.byte	0xb
 	.align	2
 .LEFDE86:
@@ -21265,13 +21994,22 @@ check_vpc_table:
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.byte	0x4
-	.4byte	.LCFI42-.LFB247
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI138-.LFB247
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI139-.LCFI138
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI140-.LCFI139
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE88:
 .LSFDE90:
@@ -21281,21 +22019,28 @@ check_vpc_table:
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
 	.byte	0x4
-	.4byte	.LCFI43-.LFB250
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI141-.LFB250
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI142-.LCFI141
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x86
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI143-.LCFI142
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE90:
 .LSFDE92:
@@ -21305,23 +22050,32 @@ check_vpc_table:
 	.4byte	.LFB253
 	.4byte	.LFE253-.LFB253
 	.byte	0x4
-	.4byte	.LCFI44-.LFB253
-	.byte	0xe
-	.uleb128 0x1c
+	.4byte	.LCFI144-.LFB253
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI145-.LCFI144
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x89
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI146-.LCFI145
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE92:
 .LSFDE94:
@@ -21331,25 +22085,36 @@ check_vpc_table:
 	.4byte	.LFB254
 	.4byte	.LFE254-.LFB254
 	.byte	0x4
-	.4byte	.LCFI45-.LFB254
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI147-.LFB254
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI148-.LCFI147
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI149-.LCFI148
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE94:
 .LSFDE96:
@@ -21359,23 +22124,34 @@ check_vpc_table:
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.byte	0x4
-	.4byte	.LCFI46-.LFB255
-	.byte	0xe
-	.uleb128 0x1c
+	.4byte	.LCFI150-.LFB255
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI151-.LCFI150
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x88
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x89
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI152-.LCFI151
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE96:
 .LSFDE98:
@@ -21384,6 +22160,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB256
 	.4byte	.LFE256-.LFB256
+	.byte	0x4
+	.4byte	.LCFI153-.LFB256
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI154-.LCFI153
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI155-.LCFI154
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE98:
 .LSFDE100:
@@ -21393,21 +22186,32 @@ check_vpc_table:
 	.4byte	.LFB257
 	.4byte	.LFE257-.LFB257
 	.byte	0x4
-	.4byte	.LCFI47-.LFB257
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI156-.LFB257
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI157-.LCFI156
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI158-.LCFI157
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE100:
 .LSFDE102:
@@ -21417,13 +22221,24 @@ check_vpc_table:
 	.4byte	.LFB264
 	.4byte	.LFE264-.LFB264
 	.byte	0x4
-	.4byte	.LCFI48-.LFB264
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI159-.LFB264
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI160-.LCFI159
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI161-.LCFI160
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE102:
 .LSFDE104:
@@ -21433,17 +22248,30 @@ check_vpc_table:
 	.4byte	.LFB265
 	.4byte	.LFE265-.LFB265
 	.byte	0x4
-	.4byte	.LCFI49-.LFB265
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI162-.LFB265
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI163-.LCFI162
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x87
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI164-.LCFI163
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE104:
 .LSFDE106:
@@ -21453,13 +22281,26 @@ check_vpc_table:
 	.4byte	.LFB266
 	.4byte	.LFE266-.LFB266
 	.byte	0x4
-	.4byte	.LCFI50-.LFB266
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI165-.LFB266
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI166-.LCFI165
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI167-.LCFI166
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE106:
 .LSFDE108:
@@ -21469,38 +22310,44 @@ check_vpc_table:
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
 	.byte	0x4
-	.4byte	.LCFI51-.LFB272
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI168-.LFB272
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI169-.LCFI168
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI52-.LCFI51
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI170-.LCFI169
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI53-.LCFI52
+	.4byte	.LCFI171-.LCFI170
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI54-.LCFI53
+	.4byte	.LCFI172-.LCFI171
 	.byte	0xb
 	.align	2
 .LEFDE108:
@@ -21511,25 +22358,36 @@ check_vpc_table:
 	.4byte	.LFB180
 	.4byte	.LFE180-.LFB180
 	.byte	0x4
-	.4byte	.LCFI55-.LFB180
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI173-.LFB180
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI174-.LCFI173
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI175-.LCFI174
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE110:
 .LSFDE112:
@@ -21539,32 +22397,40 @@ check_vpc_table:
 	.4byte	.LFB186
 	.4byte	.LFE186-.LFB186
 	.byte	0x4
-	.4byte	.LCFI56-.LFB186
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI176-.LFB186
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI177-.LCFI176
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI57-.LCFI56
-	.byte	0xe
-	.uleb128 0x70
+	.4byte	.LCFI178-.LCFI177
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI58-.LCFI57
+	.4byte	.LCFI179-.LCFI178
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x18
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI59-.LCFI58
+	.4byte	.LCFI180-.LCFI179
 	.byte	0xb
 	.align	2
 .LEFDE112:
@@ -21575,38 +22441,44 @@ check_vpc_table:
 	.4byte	.LFB273
 	.4byte	.LFE273-.LFB273
 	.byte	0x4
-	.4byte	.LCFI60-.LFB273
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI181-.LFB273
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI182-.LCFI181
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI61-.LCFI60
-	.byte	0xe
-	.uleb128 0x50
+	.4byte	.LCFI183-.LCFI182
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI62-.LCFI61
+	.4byte	.LCFI184-.LCFI183
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI63-.LCFI62
+	.4byte	.LCFI185-.LCFI184
 	.byte	0xb
 	.align	2
 .LEFDE114:
@@ -21617,30 +22489,42 @@ check_vpc_table:
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.byte	0x4
-	.4byte	.LCFI64-.LFB274
-	.byte	0xe
-	.uleb128 0x28
+	.4byte	.LCFI186-.LFB274
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI187-.LCFI186
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x88
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x89
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI65-.LCFI64
+	.4byte	.LCFI188-.LCFI187
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI189-.LCFI188
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x1c
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x28
 	.byte	0x4
-	.4byte	.LCFI66-.LCFI65
+	.4byte	.LCFI190-.LCFI189
 	.byte	0xb
 	.align	2
 .LEFDE116:
@@ -21651,17 +22535,28 @@ check_vpc_table:
 	.4byte	.LFB190
 	.4byte	.LFE190-.LFB190
 	.byte	0x4
-	.4byte	.LCFI67-.LFB190
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI191-.LFB190
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI192-.LCFI191
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI193-.LCFI192
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE118:
 .LSFDE120:
@@ -21671,38 +22566,44 @@ check_vpc_table:
 	.4byte	.LFB159
 	.4byte	.LFE159-.LFB159
 	.byte	0x4
-	.4byte	.LCFI68-.LFB159
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI194-.LFB159
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI195-.LCFI194
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI69-.LCFI68
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI196-.LCFI195
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI70-.LCFI69
+	.4byte	.LCFI197-.LCFI196
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI71-.LCFI70
+	.4byte	.LCFI198-.LCFI197
 	.byte	0xb
 	.align	2
 .LEFDE120:
@@ -21713,21 +22614,30 @@ check_vpc_table:
 	.4byte	.LFB193
 	.4byte	.LFE193-.LFB193
 	.byte	0x4
-	.4byte	.LCFI72-.LFB193
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI199-.LFB193
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI200-.LCFI199
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI201-.LCFI200
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE122:
 .LSFDE124:
@@ -21737,21 +22647,30 @@ check_vpc_table:
 	.4byte	.LFB205
 	.4byte	.LFE205-.LFB205
 	.byte	0x4
-	.4byte	.LCFI73-.LFB205
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI202-.LFB205
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI203-.LCFI202
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI204-.LCFI203
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE124:
 .LSFDE126:
@@ -21761,27 +22680,31 @@ check_vpc_table:
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.byte	0x4
-	.4byte	.LCFI74-.LFB275
-	.byte	0xe
+	.4byte	.LCFI205-.LFB275
+	.byte	0xd
 	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI206-.LCFI205
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI75-.LCFI74
-	.byte	0xe
-	.uleb128 0x68
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI76-.LCFI75
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0xc
+	.4byte	.LCFI207-.LCFI206
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI77-.LCFI76
-	.byte	0xb
+	.4byte	.LCFI208-.LCFI207
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x18
 	.align	2
 .LEFDE126:
 .LSFDE128:
@@ -21791,17 +22714,26 @@ check_vpc_table:
 	.4byte	.LFB276
 	.4byte	.LFE276-.LFB276
 	.byte	0x4
-	.4byte	.LCFI78-.LFB276
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI209-.LFB276
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI210-.LCFI209
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI211-.LCFI210
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE128:
 .LSFDE130:
@@ -21811,13 +22743,24 @@ check_vpc_table:
 	.4byte	.LFB277
 	.4byte	.LFE277-.LFB277
 	.byte	0x4
-	.4byte	.LCFI79-.LFB277
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI212-.LFB277
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI213-.LCFI212
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI214-.LCFI213
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE130:
 .LSFDE132:
@@ -21827,21 +22770,32 @@ check_vpc_table:
 	.4byte	.LFB156
 	.4byte	.LFE156-.LFB156
 	.byte	0x4
-	.4byte	.LCFI80-.LFB156
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI215-.LFB156
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI216-.LCFI215
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI217-.LCFI216
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE132:
 .LSFDE134:
@@ -21851,25 +22805,34 @@ check_vpc_table:
 	.4byte	.LFB175
 	.4byte	.LFE175-.LFB175
 	.byte	0x4
-	.4byte	.LCFI81-.LFB175
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI218-.LFB175
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI219-.LCFI218
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x89
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8a
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI220-.LCFI219
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE134:
 .LSFDE136:
@@ -21879,21 +22842,32 @@ check_vpc_table:
 	.4byte	.LFB203
 	.4byte	.LFE203-.LFB203
 	.byte	0x4
-	.4byte	.LCFI82-.LFB203
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI221-.LFB203
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI222-.LCFI221
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI223-.LCFI222
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE136:
 .LSFDE138:
@@ -21903,34 +22877,44 @@ check_vpc_table:
 	.4byte	.LFB204
 	.4byte	.LFE204-.LFB204
 	.byte	0x4
-	.4byte	.LCFI83-.LFB204
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI224-.LFB204
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI225-.LCFI224
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI84-.LCFI83
+	.4byte	.LCFI226-.LCFI225
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI227-.LCFI226
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI85-.LCFI84
+	.4byte	.LCFI228-.LCFI227
 	.byte	0xb
 	.align	2
 .LEFDE138:
@@ -21941,21 +22925,30 @@ check_vpc_table:
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.byte	0x4
-	.4byte	.LCFI86-.LFB207
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI229-.LFB207
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI230-.LCFI229
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI231-.LCFI230
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE140:
 .LSFDE142:
@@ -21965,29 +22958,36 @@ check_vpc_table:
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.byte	0x4
-	.4byte	.LCFI87-.LFB208
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
+	.4byte	.LCFI232-.LFB208
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI233-.LCFI232
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI234-.LCFI233
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE142:
 .LSFDE144:
@@ -21997,34 +22997,44 @@ check_vpc_table:
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.byte	0x4
-	.4byte	.LCFI88-.LFB206
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI235-.LFB206
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI236-.LCFI235
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI89-.LCFI88
+	.4byte	.LCFI237-.LCFI236
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI238-.LCFI237
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI90-.LCFI89
+	.4byte	.LCFI239-.LCFI238
 	.byte	0xb
 	.align	2
 .LEFDE144:
@@ -22035,17 +23045,26 @@ check_vpc_table:
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.byte	0x4
-	.4byte	.LCFI91-.LFB209
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI240-.LFB209
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI241-.LCFI240
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI242-.LCFI241
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE146:
 .LSFDE148:
@@ -22055,25 +23074,36 @@ check_vpc_table:
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
 	.byte	0x4
-	.4byte	.LCFI92-.LFB212
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI243-.LFB212
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI244-.LCFI243
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI245-.LCFI244
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE148:
 .LSFDE150:
@@ -22083,23 +23113,32 @@ check_vpc_table:
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.byte	0x4
-	.4byte	.LCFI93-.LFB230
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI246-.LFB230
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI247-.LCFI246
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI94-.LCFI93
-	.byte	0xe
-	.uleb128 0x14
+	.4byte	.LCFI248-.LCFI247
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE150:
 .LSFDE152:
@@ -22109,32 +23148,38 @@ check_vpc_table:
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.byte	0x4
-	.4byte	.LCFI95-.LFB241
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI249-.LFB241
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI250-.LCFI249
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x87
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x88
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI96-.LCFI95
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI251-.LCFI250
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI97-.LCFI96
+	.4byte	.LCFI252-.LCFI251
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x18
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x20
 	.byte	0x4
-	.4byte	.LCFI98-.LCFI97
+	.4byte	.LCFI253-.LCFI252
 	.byte	0xb
 	.align	2
 .LEFDE152:
@@ -22145,28 +23190,34 @@ check_vpc_table:
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
 	.byte	0x4
-	.4byte	.LCFI99-.LFB268
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI254-.LFB268
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI255-.LCFI254
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI100-.LCFI99
-	.byte	0xe
-	.uleb128 0x68
+	.4byte	.LCFI256-.LCFI255
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI101-.LCFI100
+	.4byte	.LCFI257-.LCFI256
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x10
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x18
 	.byte	0x4
-	.4byte	.LCFI102-.LCFI101
+	.4byte	.LCFI258-.LCFI257
 	.byte	0xb
 	.align	2
 .LEFDE154:
@@ -22177,35 +23228,36 @@ check_vpc_table:
 	.4byte	.LFB240
 	.4byte	.LFE240-.LFB240
 	.byte	0x4
-	.4byte	.LCFI103-.LFB240
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI259-.LFB240
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI260-.LCFI259
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI104-.LCFI103
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI105-.LCFI104
-	.byte	0xb
+	.4byte	.LCFI261-.LCFI260
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE156:
 .LSFDE158:
@@ -22215,29 +23267,28 @@ check_vpc_table:
 	.4byte	.LFB217
 	.4byte	.LFE217-.LFB217
 	.byte	0x4
-	.4byte	.LCFI106-.LFB217
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI262-.LFB217
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI263-.LCFI262
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI107-.LCFI106
-	.byte	0xa
-	.byte	0xce
-	.byte	0xc6
-	.byte	0xc5
-	.byte	0xc4
-	.byte	0xe
-	.uleb128 0
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI108-.LCFI107
-	.byte	0xb
+	.4byte	.LCFI264-.LCFI263
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE158:
 .LSFDE160:
@@ -22247,38 +23298,44 @@ check_vpc_table:
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.byte	0x4
-	.4byte	.LCFI109-.LFB220
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI265-.LFB220
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI266-.LCFI265
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI110-.LCFI109
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI267-.LCFI266
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI111-.LCFI110
+	.4byte	.LCFI268-.LCFI267
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI112-.LCFI111
+	.4byte	.LCFI269-.LCFI268
 	.byte	0xb
 	.align	2
 .LEFDE160:
@@ -22289,38 +23346,44 @@ check_vpc_table:
 	.4byte	.LFB225
 	.4byte	.LFE225-.LFB225
 	.byte	0x4
-	.4byte	.LCFI113-.LFB225
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI270-.LFB225
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI271-.LCFI270
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
+	.uleb128 0xa
+	.byte	0x86
+	.uleb128 0x9
+	.byte	0x87
 	.uleb128 0x8
-	.byte	0x86
+	.byte	0x88
 	.uleb128 0x7
-	.byte	0x87
+	.byte	0x89
 	.uleb128 0x6
-	.byte	0x88
+	.byte	0x8a
 	.uleb128 0x5
-	.byte	0x89
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8a
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI114-.LCFI113
-	.byte	0xe
-	.uleb128 0x40
+	.4byte	.LCFI272-.LCFI271
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI115-.LCFI114
+	.4byte	.LCFI273-.LCFI272
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI116-.LCFI115
+	.4byte	.LCFI274-.LCFI273
 	.byte	0xb
 	.align	2
 .LEFDE162:
@@ -22331,13 +23394,22 @@ check_vpc_table:
 	.4byte	.LFB226
 	.4byte	.LFE226-.LFB226
 	.byte	0x4
-	.4byte	.LCFI117-.LFB226
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI275-.LFB226
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI276-.LCFI275
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI277-.LCFI276
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE164:
 .LSFDE166:
@@ -22347,21 +23419,28 @@ check_vpc_table:
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.byte	0x4
-	.4byte	.LCFI118-.LFB227
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI278-.LFB227
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI279-.LCFI278
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x86
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI280-.LCFI279
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE166:
 .LSFDE168:
@@ -22371,13 +23450,22 @@ check_vpc_table:
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.byte	0x4
-	.4byte	.LCFI119-.LFB228
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI281-.LFB228
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI282-.LCFI281
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI283-.LCFI282
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE168:
 .LSFDE170:
@@ -22387,17 +23475,26 @@ check_vpc_table:
 	.4byte	.LFB157
 	.4byte	.LFE157-.LFB157
 	.byte	0x4
-	.4byte	.LCFI120-.LFB157
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI284-.LFB157
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI285-.LCFI284
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI286-.LCFI285
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE170:
 .LSFDE172:
@@ -22407,31 +23504,41 @@ check_vpc_table:
 	.4byte	.LFB235
 	.4byte	.LFE235-.LFB235
 	.byte	0x4
-	.4byte	.LCFI121-.LFB235
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI287-.LFB235
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI288-.LCFI287
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI122-.LCFI121
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI289-.LCFI288
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI290-.LCFI289
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.align	2
 .LEFDE172:
 .LSFDE174:
@@ -22441,19 +23548,24 @@ check_vpc_table:
 	.4byte	.LFB259
 	.4byte	.LFE259-.LFB259
 	.byte	0x4
-	.4byte	.LCFI123-.LFB259
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI291-.LFB259
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI292-.LCFI291
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI124-.LCFI123
-	.byte	0xce
-	.byte	0xc4
-	.byte	0xe
-	.uleb128 0
+	.4byte	.LCFI293-.LCFI292
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE174:
 .LSFDE176:
@@ -22463,35 +23575,41 @@ check_vpc_table:
 	.4byte	.LFB260
 	.4byte	.LFE260-.LFB260
 	.byte	0x4
-	.4byte	.LCFI125-.LFB260
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI294-.LFB260
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI295-.LCFI294
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI126-.LCFI125
-	.byte	0xe
-	.uleb128 0x40
+	.4byte	.LCFI296-.LCFI295
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI127-.LCFI126
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI297-.LCFI296
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.align	2
 .LEFDE176:
 .LSFDE178:
@@ -22500,6 +23618,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB278
 	.4byte	.LFE278-.LFB278
+	.byte	0x4
+	.4byte	.LCFI298-.LFB278
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI299-.LCFI298
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI300-.LCFI299
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE178:
 .LSFDE180:
@@ -22509,31 +23644,36 @@ check_vpc_table:
 	.4byte	.LFB176
 	.4byte	.LFE176-.LFB176
 	.byte	0x4
-	.4byte	.LCFI128-.LFB176
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI301-.LFB176
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI302-.LCFI301
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI129-.LCFI128
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI303-.LCFI302
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE180:
 .LSFDE182:
@@ -22543,35 +23683,41 @@ check_vpc_table:
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.byte	0x4
-	.4byte	.LCFI130-.LFB248
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI304-.LFB248
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI305-.LCFI304
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
+	.uleb128 0x8
+	.byte	0x88
+	.uleb128 0x7
+	.byte	0x89
 	.uleb128 0x6
-	.byte	0x88
+	.byte	0x8a
 	.uleb128 0x5
-	.byte	0x89
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8a
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI131-.LCFI130
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI306-.LCFI305
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI132-.LCFI131
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI307-.LCFI306
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.align	2
 .LEFDE182:
 .LSFDE184:
@@ -22581,29 +23727,45 @@ check_vpc_table:
 	.4byte	.LFB267
 	.4byte	.LFE267-.LFB267
 	.byte	0x4
-	.4byte	.LCFI133-.LFB267
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
+	.4byte	.LCFI308-.LFB267
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI309-.LCFI308
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI310-.LCFI309
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI311-.LCFI310
+	.byte	0xa
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
+	.byte	0x4
+	.4byte	.LCFI312-.LCFI311
+	.byte	0xb
 	.align	2
 .LEFDE184:
 .LSFDE186:
@@ -22613,17 +23775,28 @@ check_vpc_table:
 	.4byte	.LFB251
 	.4byte	.LFE251-.LFB251
 	.byte	0x4
-	.4byte	.LCFI134-.LFB251
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI313-.LFB251
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI314-.LCFI313
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x86
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI315-.LCFI314
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE186:
 .LSFDE188:
@@ -22633,17 +23806,30 @@ check_vpc_table:
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
 	.byte	0x4
-	.4byte	.LCFI135-.LFB252
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI316-.LFB252
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI317-.LCFI316
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x87
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI318-.LCFI317
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE188:
 .LSFDE190:
@@ -22653,36 +23839,44 @@ check_vpc_table:
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.byte	0x4
-	.4byte	.LCFI136-.LFB218
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI319-.LFB218
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI320-.LCFI319
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI137-.LCFI136
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI321-.LCFI320
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI138-.LCFI137
+	.4byte	.LCFI322-.LCFI321
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x20
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI139-.LCFI138
+	.4byte	.LCFI323-.LCFI322
 	.byte	0xb
 	.align	2
 .LEFDE190:
@@ -22693,17 +23887,28 @@ check_vpc_table:
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.byte	0x4
-	.4byte	.LCFI140-.LFB211
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI324-.LFB211
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI325-.LCFI324
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI326-.LCFI325
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE192:
 .LSFDE194:
@@ -22713,38 +23918,44 @@ check_vpc_table:
 	.4byte	.LFB231
 	.4byte	.LFE231-.LFB231
 	.byte	0x4
-	.4byte	.LCFI141-.LFB231
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI327-.LFB231
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI328-.LCFI327
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI142-.LCFI141
-	.byte	0xe
-	.uleb128 0x58
+	.4byte	.LCFI329-.LCFI328
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI143-.LCFI142
+	.4byte	.LCFI330-.LCFI329
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI144-.LCFI143
+	.4byte	.LCFI331-.LCFI330
 	.byte	0xb
 	.align	2
 .LEFDE194:
@@ -22755,32 +23966,40 @@ check_vpc_table:
 	.4byte	.LFB238
 	.4byte	.LFE238-.LFB238
 	.byte	0x4
-	.4byte	.LCFI145-.LFB238
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI332-.LFB238
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI333-.LCFI332
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI146-.LCFI145
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI334-.LCFI333
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI147-.LCFI146
+	.4byte	.LCFI335-.LCFI334
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x18
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI148-.LCFI147
+	.4byte	.LCFI336-.LCFI335
 	.byte	0xb
 	.align	2
 .LEFDE196:
@@ -22791,21 +24010,30 @@ check_vpc_table:
 	.4byte	.LFB179
 	.4byte	.LFE179-.LFB179
 	.byte	0x4
-	.4byte	.LCFI149-.LFB179
-	.byte	0xe
-	.uleb128 0x18
+	.4byte	.LCFI337-.LFB179
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI338-.LCFI337
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x87
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x88
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI339-.LCFI338
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE198:
 .LSFDE200:
@@ -22815,29 +24043,36 @@ check_vpc_table:
 	.4byte	.LFB181
 	.4byte	.LFE181-.LFB181
 	.byte	0x4
-	.4byte	.LCFI150-.LFB181
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
+	.4byte	.LCFI340-.LFB181
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI341-.LCFI340
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI342-.LCFI341
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE200:
 .LSFDE202:
@@ -22847,38 +24082,44 @@ check_vpc_table:
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
 	.byte	0x4
-	.4byte	.LCFI151-.LFB213
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI343-.LFB213
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI344-.LCFI343
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI152-.LCFI151
-	.byte	0xe
-	.uleb128 0x90
+	.4byte	.LCFI345-.LCFI344
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI153-.LCFI152
+	.4byte	.LCFI346-.LCFI345
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI154-.LCFI153
+	.4byte	.LCFI347-.LCFI346
 	.byte	0xb
 	.align	2
 .LEFDE202:
@@ -22888,6 +24129,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB236
 	.4byte	.LFE236-.LFB236
+	.byte	0x4
+	.4byte	.LCFI348-.LFB236
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI349-.LCFI348
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI350-.LCFI349
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE204:
 .LSFDE206:
@@ -22897,13 +24155,22 @@ check_vpc_table:
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.byte	0x4
-	.4byte	.LCFI155-.LFB215
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI351-.LFB215
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI352-.LCFI351
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI353-.LCFI352
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE206:
 .LSFDE208:
@@ -22913,38 +24180,44 @@ check_vpc_table:
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
 	.byte	0x4
-	.4byte	.LCFI156-.LFB214
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI354-.LFB214
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI355-.LCFI354
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI157-.LCFI156
-	.byte	0xe
-	.uleb128 0x88
+	.4byte	.LCFI356-.LCFI355
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI158-.LCFI157
+	.4byte	.LCFI357-.LCFI356
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI159-.LCFI158
+	.4byte	.LCFI358-.LCFI357
 	.byte	0xb
 	.align	2
 .LEFDE208:
@@ -22955,13 +24228,26 @@ check_vpc_table:
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.byte	0x4
-	.4byte	.LCFI160-.LFB221
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI359-.LFB221
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI360-.LCFI359
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI361-.LCFI360
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE210:
 .LSFDE212:
@@ -22971,17 +24257,26 @@ check_vpc_table:
 	.4byte	.LFB237
 	.4byte	.LFE237-.LFB237
 	.byte	0x4
-	.4byte	.LCFI161-.LFB237
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI362-.LFB237
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI363-.LCFI362
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI364-.LCFI363
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE212:
 .LSFDE214:
@@ -22991,25 +24286,36 @@ check_vpc_table:
 	.4byte	.LFB219
 	.4byte	.LFE219-.LFB219
 	.byte	0x4
-	.4byte	.LCFI162-.LFB219
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI365-.LFB219
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI366-.LCFI365
 	.byte	0x84
-	.uleb128 0x8
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x7
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI367-.LCFI366
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE214:
 .LSFDE216:
@@ -23019,31 +24325,36 @@ check_vpc_table:
 	.4byte	.LFB239
 	.4byte	.LFE239-.LFB239
 	.byte	0x4
-	.4byte	.LCFI163-.LFB239
-	.byte	0xe
-	.uleb128 0x28
+	.4byte	.LCFI368-.LFB239
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI369-.LCFI368
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x8a
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI164-.LCFI163
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x1c
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI165-.LCFI164
-	.byte	0xb
+	.4byte	.LCFI370-.LCFI369
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE216:
 .LSFDE218:
@@ -23053,17 +24364,30 @@ check_vpc_table:
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.byte	0x4
-	.4byte	.LCFI166-.LFB249
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI371-.LFB249
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI372-.LCFI371
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x87
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI373-.LCFI372
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE218:
 .LSFDE220:
@@ -23073,35 +24397,41 @@ check_vpc_table:
 	.4byte	.LFB165
 	.4byte	.LFE165-.LFB165
 	.byte	0x4
-	.4byte	.LCFI167-.LFB165
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI374-.LFB165
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI375-.LCFI374
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI168-.LCFI167
-	.byte	0xe
-	.uleb128 0x38
+	.4byte	.LCFI376-.LCFI375
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI169-.LCFI168
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI377-.LCFI376
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.align	2
 .LEFDE220:
 .LSFDE222:
@@ -23111,13 +24441,24 @@ check_vpc_table:
 	.4byte	.LFB166
 	.4byte	.LFE166-.LFB166
 	.byte	0x4
-	.4byte	.LCFI170-.LFB166
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI378-.LFB166
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI379-.LCFI378
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI380-.LCFI379
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE222:
 .LSFDE224:
@@ -23127,13 +24468,22 @@ check_vpc_table:
 	.4byte	.LFB162
 	.4byte	.LFE162-.LFB162
 	.byte	0x4
-	.4byte	.LCFI171-.LFB162
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI381-.LFB162
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI382-.LCFI381
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI383-.LCFI382
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE224:
 .LSFDE226:
@@ -23143,13 +24493,22 @@ check_vpc_table:
 	.4byte	.LFB163
 	.4byte	.LFE163-.LFB163
 	.byte	0x4
-	.4byte	.LCFI172-.LFB163
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
+	.4byte	.LCFI384-.LFB163
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI385-.LCFI384
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI386-.LCFI385
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE226:
 .LSFDE228:
@@ -23159,28 +24518,40 @@ check_vpc_table:
 	.4byte	.LFB168
 	.4byte	.LFE168-.LFB168
 	.byte	0x4
-	.4byte	.LCFI173-.LFB168
-	.byte	0xe
-	.uleb128 0x20
+	.4byte	.LCFI387-.LFB168
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI388-.LCFI387
 	.byte	0x84
-	.uleb128 0x6
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x5
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x88
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI174-.LCFI173
+	.4byte	.LCFI389-.LCFI388
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
+	.byte	0x4
+	.4byte	.LCFI390-.LCFI389
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x18
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x24
 	.byte	0x4
-	.4byte	.LCFI175-.LCFI174
+	.4byte	.LCFI391-.LCFI390
 	.byte	0xb
 	.align	2
 .LEFDE228:
@@ -23191,35 +24562,36 @@ check_vpc_table:
 	.4byte	.LFB258
 	.4byte	.LFE258-.LFB258
 	.byte	0x4
-	.4byte	.LCFI176-.LFB258
-	.byte	0xe
-	.uleb128 0x30
+	.4byte	.LCFI392-.LFB258
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI393-.LCFI392
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI177-.LCFI176
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI178-.LCFI177
-	.byte	0xb
+	.4byte	.LCFI394-.LCFI393
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE230:
 .LSFDE232:
@@ -23229,13 +24601,26 @@ check_vpc_table:
 	.4byte	.LFB261
 	.4byte	.LFE261-.LFB261
 	.byte	0x4
-	.4byte	.LCFI179-.LFB261
-	.byte	0xe
-	.uleb128 0x8
+	.4byte	.LCFI395-.LFB261
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI396-.LCFI395
 	.byte	0x84
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x85
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI397-.LCFI396
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE232:
 .LSFDE234:
@@ -23245,17 +24630,28 @@ check_vpc_table:
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.byte	0x4
-	.4byte	.LCFI180-.LFB233
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI398-.LFB233
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI399-.LCFI398
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI400-.LCFI399
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE234:
 .LSFDE236:
@@ -23265,17 +24661,28 @@ check_vpc_table:
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.byte	0x4
-	.4byte	.LCFI181-.LFB263
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI401-.LFB263
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI402-.LCFI401
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x7
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI403-.LCFI402
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE236:
 .LSFDE238:
@@ -23285,25 +24692,26 @@ check_vpc_table:
 	.4byte	.LFB262
 	.4byte	.LFE262-.LFB262
 	.byte	0x4
-	.4byte	.LCFI182-.LFB262
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI404-.LFB262
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI405-.LCFI404
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI183-.LCFI182
-	.byte	0xce
-	.byte	0xc5
-	.byte	0xc4
-	.byte	0xc3
-	.byte	0xe
-	.uleb128 0
+	.4byte	.LCFI406-.LCFI405
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE238:
 .LSFDE240:
@@ -23313,38 +24721,44 @@ check_vpc_table:
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.byte	0x4
-	.4byte	.LCFI184-.LFB269
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI407-.LFB269
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI408-.LCFI407
 	.byte	0x84
+	.uleb128 0xb
+	.byte	0x85
+	.uleb128 0xa
+	.byte	0x86
 	.uleb128 0x9
-	.byte	0x85
+	.byte	0x87
 	.uleb128 0x8
-	.byte	0x86
+	.byte	0x88
 	.uleb128 0x7
-	.byte	0x87
+	.byte	0x89
 	.uleb128 0x6
-	.byte	0x88
+	.byte	0x8a
 	.uleb128 0x5
-	.byte	0x89
+	.byte	0x8b
 	.uleb128 0x4
-	.byte	0x8a
+	.byte	0x8d
 	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI185-.LCFI184
-	.byte	0xe
-	.uleb128 0x48
+	.4byte	.LCFI409-.LCFI408
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI186-.LCFI185
+	.4byte	.LCFI410-.LCFI409
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI187-.LCFI186
+	.4byte	.LCFI411-.LCFI410
 	.byte	0xb
 	.align	2
 .LEFDE240:
@@ -23354,6 +24768,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
+	.byte	0x4
+	.4byte	.LCFI412-.LFB270
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI413-.LCFI412
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI414-.LCFI413
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE242:
 .LSFDE244:
@@ -23363,38 +24794,44 @@ check_vpc_table:
 	.4byte	.LFB164
 	.4byte	.LFE164-.LFB164
 	.byte	0x4
-	.4byte	.LCFI188-.LFB164
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI415-.LFB164
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI416-.LCFI415
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI189-.LCFI188
-	.byte	0xe
-	.uleb128 0x60
+	.4byte	.LCFI417-.LCFI416
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI190-.LCFI189
+	.4byte	.LCFI418-.LCFI417
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI191-.LCFI190
+	.4byte	.LCFI419-.LCFI418
 	.byte	0xb
 	.align	2
 .LEFDE244:
@@ -23404,6 +24841,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB169
 	.4byte	.LFE169-.LFB169
+	.byte	0x4
+	.4byte	.LCFI420-.LFB169
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI421-.LCFI420
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI422-.LCFI421
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE246:
 .LSFDE248:
@@ -23413,38 +24867,44 @@ check_vpc_table:
 	.4byte	.LFB167
 	.4byte	.LFE167-.LFB167
 	.byte	0x4
-	.4byte	.LCFI192-.LFB167
-	.byte	0xe
-	.uleb128 0x24
+	.4byte	.LCFI423-.LFB167
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI424-.LCFI423
 	.byte	0x84
-	.uleb128 0x9
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x8
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x7
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x6
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x5
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x4
+	.uleb128 0x6
 	.byte	0x8a
-	.uleb128 0x3
+	.uleb128 0x5
 	.byte	0x8b
-	.uleb128 0x2
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x4
-	.4byte	.LCFI193-.LCFI192
-	.byte	0xe
-	.uleb128 0x68
+	.4byte	.LCFI425-.LCFI424
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.byte	0x4
-	.4byte	.LCFI194-.LCFI193
+	.4byte	.LCFI426-.LCFI425
 	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
+	.byte	0xc
+	.uleb128 0xd
+	.uleb128 0x2c
 	.byte	0x4
-	.4byte	.LCFI195-.LCFI194
+	.4byte	.LCFI427-.LCFI426
 	.byte	0xb
 	.align	2
 .LEFDE248:
@@ -23454,6 +24914,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB170
 	.4byte	.LFE170-.LFB170
+	.byte	0x4
+	.4byte	.LCFI428-.LFB170
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI429-.LCFI428
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI430-.LCFI429
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE250:
 .LSFDE252:
@@ -23463,21 +24940,32 @@ check_vpc_table:
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.byte	0x4
-	.4byte	.LCFI196-.LFB224
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
+	.4byte	.LCFI431-.LFB224
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI432-.LCFI431
 	.byte	0x84
-	.uleb128 0x5
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x87
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI433-.LCFI432
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE252:
 .LSFDE254:
@@ -23487,17 +24975,32 @@ check_vpc_table:
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.byte	0x4
-	.4byte	.LCFI197-.LFB242
-	.byte	0xe
-	.uleb128 0x10
+	.4byte	.LCFI434-.LFB242
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI435-.LCFI434
 	.byte	0x84
-	.uleb128 0x4
+	.uleb128 0x9
 	.byte	0x85
-	.uleb128 0x3
+	.uleb128 0x8
 	.byte	0x86
-	.uleb128 0x2
+	.uleb128 0x7
+	.byte	0x87
+	.uleb128 0x6
+	.byte	0x88
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI436-.LCFI435
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE254:
 .LSFDE256:
@@ -23507,25 +25010,36 @@ check_vpc_table:
 	.4byte	.LFB160
 	.4byte	.LFE160-.LFB160
 	.byte	0x4
-	.4byte	.LCFI198-.LFB160
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
+	.4byte	.LCFI437-.LFB160
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI438-.LCFI437
 	.byte	0x84
-	.uleb128 0x7
+	.uleb128 0xb
 	.byte	0x85
-	.uleb128 0x6
+	.uleb128 0xa
 	.byte	0x86
-	.uleb128 0x5
+	.uleb128 0x9
 	.byte	0x87
-	.uleb128 0x4
+	.uleb128 0x8
 	.byte	0x88
-	.uleb128 0x3
+	.uleb128 0x7
 	.byte	0x89
-	.uleb128 0x2
+	.uleb128 0x6
+	.byte	0x8a
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI439-.LCFI438
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE256:
 .LSFDE258:
@@ -23535,17 +25049,26 @@ check_vpc_table:
 	.4byte	.LFB161
 	.4byte	.LFE161-.LFB161
 	.byte	0x4
-	.4byte	.LCFI199-.LFB161
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
+	.4byte	.LCFI440-.LFB161
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI441-.LCFI440
 	.byte	0x84
-	.uleb128 0x3
+	.uleb128 0x6
 	.byte	0x85
-	.uleb128 0x2
+	.uleb128 0x5
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
 	.byte	0x8e
-	.uleb128 0x1
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI442-.LCFI441
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE258:
 .LSFDE260:
@@ -23554,6 +25077,23 @@ check_vpc_table:
 	.4byte	.Lframe0
 	.4byte	.LFB279
 	.4byte	.LFE279-.LFB279
+	.byte	0x4
+	.4byte	.LCFI443-.LFB279
+	.byte	0xd
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	.LCFI444-.LCFI443
+	.byte	0x8b
+	.uleb128 0x4
+	.byte	0x8d
+	.uleb128 0x3
+	.byte	0x8e
+	.uleb128 0x2
+	.byte	0x4
+	.4byte	.LCFI445-.LCFI444
+	.byte	0xc
+	.uleb128 0xb
+	.uleb128 0x4
 	.align	2
 .LEFDE260:
 	.text
@@ -23575,7 +25115,7 @@ check_vpc_table:
 	.file 20 "<built-in>"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x6836
+	.4byte	0x6832
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -23589,2882 +25129,2882 @@ check_vpc_table:
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.byte	0x4
-	.uleb128 0x3
-	.byte	0x4
 	.byte	0x7
 	.4byte	.LASF0
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x4
 	.byte	0x7
 	.4byte	.LASF1
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x1
 	.byte	0x8
 	.4byte	.LASF2
-	.uleb128 0x4
-	.4byte	0x35
 	.uleb128 0x3
+	.4byte	0x33
+	.uleb128 0x2
 	.byte	0x4
 	.byte	0x7
 	.4byte	.LASF3
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x1
 	.byte	0x6
 	.4byte	.LASF4
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x1
 	.byte	0x8
 	.4byte	.LASF5
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x2
 	.byte	0x5
 	.4byte	.LASF6
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x2
 	.byte	0x7
 	.4byte	.LASF7
-	.uleb128 0x5
+	.uleb128 0x4
 	.byte	0x4
 	.byte	0x5
 	.ascii	"int\000"
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x8
 	.byte	0x5
 	.4byte	.LASF8
-	.uleb128 0x3
+	.uleb128 0x2
 	.byte	0x8
 	.byte	0x7
 	.4byte	.LASF9
-	.uleb128 0x6
+	.uleb128 0x5
 	.ascii	"u8\000"
 	.byte	0x6
 	.byte	0x10
-	.4byte	0x4f
-	.uleb128 0x6
+	.4byte	0x4d
+	.uleb128 0x5
 	.ascii	"u16\000"
 	.byte	0x6
 	.byte	0x13
-	.4byte	0x5d
-	.uleb128 0x6
+	.4byte	0x5b
+	.uleb128 0x5
 	.ascii	"s32\000"
 	.byte	0x6
 	.byte	0x15
-	.4byte	0x64
-	.uleb128 0x6
+	.4byte	0x62
+	.uleb128 0x5
 	.ascii	"u32\000"
 	.byte	0x6
 	.byte	0x16
-	.4byte	0x41
-	.uleb128 0x3
+	.4byte	0x3f
+	.uleb128 0x2
 	.byte	0x4
 	.byte	0x5
 	.4byte	.LASF10
-	.uleb128 0x7
+	.uleb128 0x6
 	.4byte	.LASF11
 	.byte	0x7
 	.byte	0x43
-	.4byte	0x41
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x35
+	.4byte	0x3f
 	.uleb128 0x7
+	.byte	0x4
+	.4byte	0x33
+	.uleb128 0x6
 	.4byte	.LASF12
 	.byte	0x8
 	.byte	0x1d
-	.4byte	0xc7
-	.uleb128 0x3
+	.4byte	0xc5
+	.uleb128 0x2
 	.byte	0x1
 	.byte	0x2
 	.4byte	.LASF13
-	.uleb128 0x7
+	.uleb128 0x6
 	.4byte	.LASF14
 	.byte	0x8
 	.byte	0x36
-	.4byte	0xab
-	.uleb128 0x9
+	.4byte	0xa9
+	.uleb128 0x8
 	.4byte	.LASF15
 	.byte	0x9
 	.byte	0xd
-	.4byte	0x41
-	.uleb128 0x9
+	.4byte	0x3f
+	.uleb128 0x8
 	.4byte	.LASF16
 	.byte	0x9
 	.byte	0xd
-	.4byte	0x41
-	.uleb128 0x7
+	.4byte	0x3f
+	.uleb128 0x6
 	.4byte	.LASF17
 	.byte	0xa
 	.byte	0x83
-	.4byte	0xfa
-	.uleb128 0x8
+	.4byte	0xf8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x100
-	.uleb128 0xa
-	.4byte	0x64
-	.uleb128 0x8
+	.4byte	0xfe
+	.uleb128 0x9
+	.4byte	0x62
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x10b
+	.4byte	0x109
+	.uleb128 0xa
 	.uleb128 0xb
+	.4byte	0xed
+	.4byte	0x115
 	.uleb128 0xc
-	.4byte	0xef
-	.4byte	0x117
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF18
 	.byte	0xa
 	.byte	0x86
-	.4byte	0x10c
-	.uleb128 0x9
+	.4byte	0x10a
+	.uleb128 0x8
 	.4byte	.LASF19
 	.byte	0xa
 	.byte	0x86
-	.4byte	0x10c
-	.uleb128 0x9
+	.4byte	0x10a
+	.uleb128 0x8
 	.4byte	.LASF20
 	.byte	0xa
 	.byte	0x87
-	.4byte	0x10c
-	.uleb128 0x9
+	.4byte	0x10a
+	.uleb128 0x8
 	.4byte	.LASF21
 	.byte	0xa
 	.byte	0x87
-	.4byte	0x10c
+	.4byte	0x10a
+	.uleb128 0xb
+	.4byte	0x33
+	.4byte	0x14c
 	.uleb128 0xc
-	.4byte	0x35
-	.4byte	0x14e
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF22
 	.byte	0xa
 	.byte	0x8e
-	.4byte	0x143
-	.uleb128 0x9
+	.4byte	0x141
+	.uleb128 0x8
 	.4byte	.LASF23
 	.byte	0xa
 	.byte	0x8f
-	.4byte	0xb6
-	.uleb128 0x9
+	.4byte	0xb4
+	.uleb128 0x8
 	.4byte	.LASF24
 	.byte	0xa
 	.byte	0x90
-	.4byte	0x41
-	.uleb128 0x9
+	.4byte	0x3f
+	.uleb128 0x8
 	.4byte	.LASF25
 	.byte	0xa
 	.byte	0x9c
-	.4byte	0x105
-	.uleb128 0x9
+	.4byte	0x103
+	.uleb128 0x8
 	.4byte	.LASF26
 	.byte	0xa
 	.byte	0x9e
-	.4byte	0xbc
+	.4byte	0xba
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x18e
 	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x190
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x185
-	.uleb128 0x9
+	.uleb128 0x3
+	.4byte	0x183
+	.uleb128 0x8
 	.4byte	.LASF27
 	.byte	0xb
 	.byte	0xa
-	.4byte	0x190
-	.uleb128 0x9
+	.4byte	0x18e
+	.uleb128 0x8
 	.4byte	.LASF28
 	.byte	0xb
 	.byte	0xb
-	.4byte	0x190
+	.4byte	0x18e
+	.uleb128 0xb
+	.4byte	0x62
+	.4byte	0x1b4
 	.uleb128 0xc
-	.4byte	0x64
-	.4byte	0x1b6
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF29
 	.byte	0xb
 	.byte	0x2e
-	.4byte	0x1ab
-	.uleb128 0x9
+	.4byte	0x1a9
+	.uleb128 0x8
 	.4byte	.LASF30
 	.byte	0xb
 	.byte	0x9f
-	.4byte	0x64
-	.uleb128 0x9
+	.4byte	0x62
+	.uleb128 0x8
 	.4byte	.LASF31
 	.byte	0xb
 	.byte	0xa0
-	.4byte	0x64
-	.uleb128 0x9
+	.4byte	0x62
+	.uleb128 0x8
 	.4byte	.LASF32
 	.byte	0xb
 	.byte	0xa1
-	.4byte	0x64
-	.uleb128 0xe
+	.4byte	0x62
+	.uleb128 0xd
 	.4byte	.LASF34
-	.uleb128 0x4
-	.4byte	0x1e2
-	.uleb128 0xf
+	.uleb128 0x3
+	.4byte	0x1e0
+	.uleb128 0xe
 	.4byte	.LASF33
 	.byte	0xb
 	.2byte	0x1a4
-	.4byte	0x1e7
-	.uleb128 0xe
+	.4byte	0x1e5
+	.uleb128 0xd
 	.4byte	.LASF35
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0xc
 	.2byte	0x104
-	.4byte	0x1f8
+	.4byte	0x1f6
+	.uleb128 0xf
+	.4byte	0xa2
+	.4byte	0x216
 	.uleb128 0x10
-	.4byte	0xa4
-	.4byte	0x218
-	.uleb128 0x11
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF37
 	.byte	0xc
 	.2byte	0x105
-	.4byte	0x224
-	.uleb128 0x8
+	.4byte	0x222
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x209
-	.uleb128 0xf
+	.4byte	0x207
+	.uleb128 0xe
 	.4byte	.LASF38
 	.byte	0xc
 	.2byte	0x1bf
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF39
 	.byte	0xc
 	.2byte	0x1c0
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF40
 	.byte	0xc
 	.2byte	0x1c1
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF41
 	.byte	0xc
 	.2byte	0x1c2
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0xc
 	.2byte	0x1c3
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF43
 	.byte	0xc
 	.2byte	0x1c4
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF44
 	.byte	0xc
 	.2byte	0x1c5
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xc
 	.2byte	0x1c7
-	.4byte	0xbc
-	.uleb128 0xf
+	.4byte	0xba
+	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0xc
 	.2byte	0x1da
-	.4byte	0x64
-	.uleb128 0xf
+	.4byte	0x62
+	.uleb128 0xe
 	.4byte	.LASF47
 	.byte	0xc
 	.2byte	0x1dc
-	.4byte	0xbc
-	.uleb128 0x12
+	.4byte	0xba
+	.uleb128 0x11
 	.4byte	.LASF666
 	.byte	0x4
-	.4byte	0x41
+	.4byte	0x3f
 	.byte	0xc
 	.2byte	0x1df
-	.4byte	0x2d2
-	.uleb128 0x13
+	.4byte	0x2d0
+	.uleb128 0x12
 	.4byte	.LASF48
 	.byte	0
-	.uleb128 0x13
+	.uleb128 0x12
 	.4byte	.LASF49
 	.byte	0x1
-	.uleb128 0x13
+	.uleb128 0x12
 	.4byte	.LASF50
 	.byte	0x2
-	.uleb128 0x13
+	.uleb128 0x12
 	.4byte	.LASF51
 	.byte	0x3
-	.uleb128 0x13
+	.uleb128 0x12
 	.4byte	.LASF52
 	.byte	0x4
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF53
 	.byte	0xc
 	.2byte	0x1e5
-	.4byte	0x2a2
-	.uleb128 0xf
+	.4byte	0x2a0
+	.uleb128 0xe
 	.4byte	.LASF54
 	.byte	0xc
 	.2byte	0x1f8
-	.4byte	0x190
-	.uleb128 0xf
+	.4byte	0x18e
+	.uleb128 0xe
 	.4byte	.LASF55
 	.byte	0xc
 	.2byte	0x203
-	.4byte	0x190
-	.uleb128 0x7
+	.4byte	0x18e
+	.uleb128 0x6
 	.4byte	.LASF56
 	.byte	0xd
 	.byte	0x9
-	.4byte	0x4f
-	.uleb128 0x7
+	.4byte	0x4d
+	.uleb128 0x6
 	.4byte	.LASF57
 	.byte	0xd
 	.byte	0xa
-	.4byte	0x5d
-	.uleb128 0x7
+	.4byte	0x5b
+	.uleb128 0x6
 	.4byte	.LASF58
 	.byte	0xd
 	.byte	0xb
-	.4byte	0x41
-	.uleb128 0x7
+	.4byte	0x3f
+	.uleb128 0x6
 	.4byte	.LASF59
 	.byte	0xd
 	.byte	0xc
-	.4byte	0x64
-	.uleb128 0x7
+	.4byte	0x62
+	.uleb128 0x6
 	.4byte	.LASF60
 	.byte	0xd
 	.byte	0xd
-	.4byte	0x56
-	.uleb128 0x14
+	.4byte	0x54
+	.uleb128 0x13
 	.4byte	.LASF65
 	.byte	0x14
 	.byte	0xe
 	.byte	0x22
-	.4byte	0x376
-	.uleb128 0x15
+	.4byte	0x374
+	.uleb128 0x14
 	.4byte	.LASF61
 	.byte	0xe
 	.byte	0x23
-	.4byte	0x99
+	.4byte	0x97
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF62
 	.byte	0xe
 	.byte	0x24
-	.4byte	0x99
+	.4byte	0x97
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF63
 	.byte	0xe
 	.byte	0x25
-	.4byte	0x376
+	.4byte	0x374
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF64
 	.byte	0xe
 	.byte	0x26
-	.4byte	0x376
+	.4byte	0x374
 	.byte	0xc
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"lpa\000"
 	.byte	0xe
 	.byte	0x27
-	.4byte	0x99
+	.4byte	0x97
 	.byte	0x10
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x99
-	.uleb128 0x14
+	.4byte	0x97
+	.uleb128 0x13
 	.4byte	.LASF66
 	.byte	0x18
 	.byte	0xe
 	.byte	0x2a
-	.4byte	0x419
-	.uleb128 0x15
+	.4byte	0x417
+	.uleb128 0x14
 	.4byte	.LASF67
 	.byte	0xe
 	.byte	0x2b
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF68
 	.byte	0xe
 	.byte	0x2c
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF69
 	.byte	0xe
 	.byte	0x2d
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF70
 	.byte	0xe
 	.byte	0x2e
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x6
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF71
 	.byte	0xe
 	.byte	0x2f
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF72
 	.byte	0xe
 	.byte	0x30
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0xa
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF73
 	.byte	0xe
 	.byte	0x31
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF74
 	.byte	0xe
 	.byte	0x32
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0xe
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF75
 	.byte	0xe
 	.byte	0x33
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x10
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF76
 	.byte	0xe
 	.byte	0x34
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x12
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF77
 	.byte	0xe
 	.byte	0x35
-	.4byte	0x83
+	.4byte	0x81
 	.byte	0x14
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF78
 	.byte	0xe
 	.byte	0x36
-	.4byte	0x79
+	.4byte	0x77
 	.byte	0x16
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x37c
-	.uleb128 0x14
+	.uleb128 0x3
+	.4byte	0x37a
+	.uleb128 0x13
 	.4byte	.LASF79
 	.byte	0x10
 	.byte	0xe
 	.byte	0x39
-	.4byte	0x45b
-	.uleb128 0x15
+	.4byte	0x459
+	.uleb128 0x14
 	.4byte	.LASF80
 	.byte	0xe
 	.byte	0x3a
-	.4byte	0x475
+	.4byte	0x473
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF81
 	.byte	0xe
 	.byte	0x3b
-	.4byte	0x48f
+	.4byte	0x48d
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF82
 	.byte	0xe
 	.byte	0x3c
-	.4byte	0x4b3
+	.4byte	0x4b1
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF83
 	.byte	0xe
 	.byte	0x3d
-	.4byte	0x4b3
+	.4byte	0x4b1
 	.byte	0xc
 	.byte	0
+	.uleb128 0xf
+	.4byte	0x8c
+	.4byte	0x46d
 	.uleb128 0x10
-	.4byte	0x8e
-	.4byte	0x46f
-	.uleb128 0x11
-	.4byte	0x46f
-	.uleb128 0x11
-	.4byte	0x99
+	.4byte	0x46d
+	.uleb128 0x10
+	.4byte	0x97
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x83
-	.uleb128 0x8
+	.4byte	0x81
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x45b
+	.4byte	0x459
+	.uleb128 0xf
+	.4byte	0x97
+	.4byte	0x48d
 	.uleb128 0x10
-	.4byte	0x99
-	.4byte	0x48f
-	.uleb128 0x11
-	.4byte	0x79
-	.uleb128 0x11
-	.4byte	0x99
+	.4byte	0x77
+	.uleb128 0x10
+	.4byte	0x97
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x47b
+	.4byte	0x479
+	.uleb128 0xf
+	.4byte	0x97
+	.4byte	0x4b1
 	.uleb128 0x10
-	.4byte	0x99
-	.4byte	0x4b3
-	.uleb128 0x11
-	.4byte	0x79
-	.uleb128 0x11
-	.4byte	0x99
-	.uleb128 0x11
-	.4byte	0x376
-	.uleb128 0x11
-	.4byte	0x376
+	.4byte	0x77
+	.uleb128 0x10
+	.4byte	0x97
+	.uleb128 0x10
+	.4byte	0x374
+	.uleb128 0x10
+	.4byte	0x374
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x495
-	.uleb128 0x14
+	.4byte	0x493
+	.uleb128 0x13
 	.4byte	.LASF84
 	.byte	0x3c
 	.byte	0xf
 	.byte	0x2b
-	.4byte	0x519
-	.uleb128 0x16
+	.4byte	0x517
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x2d
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF85
 	.byte	0xf
 	.byte	0x2e
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF86
 	.byte	0xf
 	.byte	0x2f
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"cnt\000"
 	.byte	0xf
 	.byte	0x30
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x6
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x31
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF88
 	.byte	0xf
 	.byte	0x32
-	.4byte	0x519
+	.4byte	0x517
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF89
 	.byte	0xf
 	.byte	0x33
-	.4byte	0x529
+	.4byte	0x527
 	.byte	0x1c
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x529
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0x527
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x7
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x539
-	.4byte	0x539
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x537
+	.4byte	0x537
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x7
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x30c
-	.uleb128 0x14
+	.4byte	0x30a
+	.uleb128 0x13
 	.4byte	.LASF90
 	.byte	0xc
 	.byte	0xf
 	.byte	0x3f
-	.4byte	0x587
-	.uleb128 0x16
+	.4byte	0x585
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x41
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF85
 	.byte	0xf
 	.byte	0x42
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF86
 	.byte	0xf
 	.byte	0x43
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF91
 	.byte	0xf
 	.byte	0x44
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x6
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x45
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF92
 	.byte	0x28
 	.byte	0xf
 	.byte	0x48
-	.4byte	0x630
-	.uleb128 0x15
+	.4byte	0x62e
+	.uleb128 0x14
 	.4byte	.LASF93
 	.byte	0xf
 	.byte	0x4a
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF85
 	.byte	0xf
 	.byte	0x4b
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x4d
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF95
 	.byte	0xf
 	.byte	0x4e
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x6
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF96
 	.byte	0xf
 	.byte	0x50
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF97
 	.byte	0xf
 	.byte	0x51
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0xa
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF98
 	.byte	0xf
 	.byte	0x53
-	.4byte	0x630
+	.4byte	0x62e
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF99
 	.byte	0xf
 	.byte	0x54
-	.4byte	0x539
+	.4byte	0x537
 	.byte	0x10
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF100
 	.byte	0xf
 	.byte	0x55
-	.4byte	0x630
+	.4byte	0x62e
 	.byte	0x14
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF101
 	.byte	0xf
 	.byte	0x56
-	.4byte	0x539
+	.4byte	0x537
 	.byte	0x18
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x58
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x1c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF102
 	.byte	0xf
 	.byte	0x59
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x20
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF103
 	.byte	0xf
 	.byte	0x5a
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x24
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x301
-	.uleb128 0x14
+	.4byte	0x2ff
+	.uleb128 0x13
 	.4byte	.LASF104
 	.byte	0xc
 	.byte	0xf
 	.byte	0x5d
-	.4byte	0x673
-	.uleb128 0x15
+	.4byte	0x671
+	.uleb128 0x14
 	.4byte	.LASF105
 	.byte	0xf
 	.byte	0x5f
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF106
 	.byte	0xf
 	.byte	0x60
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"hit\000"
 	.byte	0xf
 	.byte	0x61
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF107
 	.byte	0xf
 	.byte	0x62
-	.4byte	0x539
+	.4byte	0x537
 	.byte	0x8
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF108
 	.byte	0x24
 	.byte	0xf
 	.byte	0x65
-	.4byte	0x6e0
-	.uleb128 0x15
+	.4byte	0x6de
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x67
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF109
 	.byte	0xf
 	.byte	0x68
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x69
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"len\000"
 	.byte	0xf
 	.byte	0x6a
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF110
 	.byte	0xf
 	.byte	0x6b
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x10
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF111
 	.byte	0xf
 	.byte	0x6c
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x14
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x6d
-	.4byte	0x6e0
+	.4byte	0x6de
 	.byte	0x18
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"tbl\000"
 	.byte	0xf
 	.byte	0x6e
-	.4byte	0x6f0
+	.4byte	0x6ee
 	.byte	0x20
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x6f0
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x30a
+	.4byte	0x6ee
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x700
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0x6fe
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF113
 	.byte	0x10
 	.byte	0xf
 	.byte	0x72
-	.4byte	0x760
-	.uleb128 0x15
+	.4byte	0x75e
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x74
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x75
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x76
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF86
 	.byte	0xf
 	.byte	0x77
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF114
 	.byte	0xf
 	.byte	0x78
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0xa
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF115
 	.byte	0xf
 	.byte	0x79
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x7a
-	.4byte	0x760
+	.4byte	0x75e
 	.byte	0xe
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x2f6
-	.4byte	0x770
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2f4
+	.4byte	0x76e
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF116
 	.byte	0x10
 	.byte	0xf
 	.byte	0x7d
-	.4byte	0x7b8
-	.uleb128 0x15
+	.4byte	0x7b6
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x7f
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x80
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x81
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"lpa\000"
 	.byte	0xf
 	.byte	0x82
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF117
 	.byte	0xf
 	.byte	0x83
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0xc
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF118
 	.byte	0x10
 	.byte	0xf
 	.byte	0x8f
-	.4byte	0x800
-	.uleb128 0x15
+	.4byte	0x7fe
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x91
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x92
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x93
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF119
 	.byte	0xf
 	.byte	0x94
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x95
-	.4byte	0x800
+	.4byte	0x7fe
 	.byte	0xa
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x2f6
-	.4byte	0x810
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2f4
+	.4byte	0x80e
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x5
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF120
 	.byte	0x10
 	.byte	0xf
 	.byte	0x98
-	.4byte	0x858
-	.uleb128 0x15
+	.4byte	0x856
+	.uleb128 0x14
 	.4byte	.LASF94
 	.byte	0xf
 	.byte	0x9a
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0x9b
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x9c
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF121
 	.byte	0xf
 	.byte	0x9d
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF122
 	.byte	0xf
 	.byte	0x9e
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0xc
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF123
 	.byte	0x30
 	.byte	0xf
 	.byte	0xa1
-	.4byte	0x955
-	.uleb128 0x16
+	.4byte	0x953
+	.uleb128 0x15
 	.ascii	"tag\000"
 	.byte	0xf
 	.byte	0xa3
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"ver\000"
 	.byte	0xf
 	.byte	0xa4
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF91
 	.byte	0xf
 	.byte	0xa6
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF124
 	.byte	0xf
 	.byte	0xa7
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xa
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF125
 	.byte	0xf
 	.byte	0xa8
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xb
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF126
 	.byte	0xf
 	.byte	0xa9
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF127
 	.byte	0xf
 	.byte	0xaa
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xd
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF128
 	.byte	0xf
 	.byte	0xab
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0xe
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF129
 	.byte	0xf
 	.byte	0xad
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x10
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF130
 	.byte	0xf
 	.byte	0xae
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x12
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF131
 	.byte	0xf
 	.byte	0xaf
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x14
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF132
 	.byte	0xf
 	.byte	0xb0
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x16
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF133
 	.byte	0xf
 	.byte	0xb2
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x18
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF134
 	.byte	0xf
 	.byte	0xb3
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x1a
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF135
 	.byte	0xf
 	.byte	0xb4
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x1c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF136
 	.byte	0xf
 	.byte	0xb5
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x1e
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF137
 	.byte	0xf
 	.byte	0xb7
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x20
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF138
 	.byte	0xf
 	.byte	0xb8
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x24
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF139
 	.byte	0xf
 	.byte	0xb9
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x28
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF112
 	.byte	0xf
 	.byte	0xba
-	.4byte	0x6f0
+	.4byte	0x6ee
 	.byte	0x2c
 	.byte	0
-	.uleb128 0x18
+	.uleb128 0x17
 	.4byte	.LASF140
 	.2byte	0x200
 	.byte	0xf
 	.byte	0xbe
-	.4byte	0xa9b
-	.uleb128 0x16
+	.4byte	0xa99
+	.uleb128 0x15
 	.ascii	"tag\000"
 	.byte	0xf
 	.byte	0xc0
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"ver\000"
 	.byte	0xf
 	.byte	0xc1
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF141
 	.byte	0xf
 	.byte	0xc3
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF142
 	.byte	0xf
 	.byte	0xc4
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0xc
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF143
 	.byte	0xf
 	.byte	0xc5
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x10
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF144
 	.byte	0xf
 	.byte	0xc6
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x14
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF137
 	.byte	0xf
 	.byte	0xc8
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x18
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF145
 	.byte	0xf
 	.byte	0xc9
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x1c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF146
 	.byte	0xf
 	.byte	0xca
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x20
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF147
 	.byte	0xf
 	.byte	0xcb
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x24
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF134
 	.byte	0xf
 	.byte	0xcd
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x28
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF148
 	.byte	0xf
 	.byte	0xce
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x2c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF149
 	.byte	0xf
 	.byte	0xcf
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x30
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF150
 	.byte	0xf
 	.byte	0xd0
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x34
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF151
 	.byte	0xf
 	.byte	0xd2
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x38
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF152
 	.byte	0xf
 	.byte	0xd3
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x3c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF153
 	.byte	0xf
 	.byte	0xd4
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x40
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF154
 	.byte	0xf
 	.byte	0xd5
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x44
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF155
 	.byte	0xf
 	.byte	0xd7
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x48
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF156
 	.byte	0xf
 	.byte	0xd8
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF157
 	.byte	0xf
 	.byte	0xd9
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x50
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF158
 	.byte	0xf
 	.byte	0xda
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x54
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF159
 	.byte	0xf
 	.byte	0xdc
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x58
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF160
 	.byte	0xf
 	.byte	0xdd
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x5c
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF161
 	.byte	0xf
 	.byte	0xde
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x60
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF112
 	.byte	0xf
 	.byte	0xe0
-	.4byte	0xa9b
+	.4byte	0xa99
 	.byte	0x64
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0xaab
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x30a
+	.4byte	0xaa9
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x66
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF162
-	.byte	0x6
+	.byte	0x8
 	.byte	0xf
 	.byte	0xe4
-	.4byte	0xadc
-	.uleb128 0x15
+	.4byte	0xada
+	.uleb128 0x14
 	.4byte	.LASF163
 	.byte	0xf
 	.byte	0xe6
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF164
 	.byte	0xf
 	.byte	0xe7
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF165
 	.byte	0xf
 	.byte	0xe8
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
 	.byte	0
-	.uleb128 0x18
+	.uleb128 0x17
 	.4byte	.LASF166
 	.2byte	0x808
 	.byte	0xf
 	.byte	0xeb
-	.4byte	0xb26
-	.uleb128 0x16
+	.4byte	0xb24
+	.uleb128 0x15
 	.ascii	"max\000"
 	.byte	0xf
 	.byte	0xed
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF167
 	.byte	0xf
 	.byte	0xee
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF168
 	.byte	0xf
 	.byte	0xef
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF114
 	.byte	0xf
 	.byte	0xf0
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x6
-	.uleb128 0x16
+	.uleb128 0x15
 	.ascii	"arr\000"
 	.byte	0xf
 	.byte	0xf1
-	.4byte	0xb26
+	.4byte	0xb24
 	.byte	0x8
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0xb37
-	.uleb128 0x19
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0xb35
+	.uleb128 0x18
+	.4byte	0x2c
 	.2byte	0x3ff
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.4byte	.LASF169
 	.byte	0x30
 	.byte	0xf
 	.byte	0xf5
-	.4byte	0xbc9
-	.uleb128 0x16
+	.4byte	0xbc7
+	.uleb128 0x15
 	.ascii	"id\000"
 	.byte	0xf
 	.byte	0xf7
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF170
 	.byte	0xf
 	.byte	0xf8
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x2
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF171
 	.byte	0xf
 	.byte	0xf9
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x4
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF172
 	.byte	0xf
 	.byte	0xfa
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0x6
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF173
 	.byte	0xf
 	.byte	0xfb
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0x7
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF174
 	.byte	0xf
 	.byte	0xfc
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0x8
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF175
 	.byte	0xf
 	.byte	0xfd
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0x9
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF176
 	.byte	0xf
 	.byte	0xfe
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xa
-	.uleb128 0x15
+	.uleb128 0x14
 	.4byte	.LASF177
 	.byte	0xf
 	.byte	0xff
-	.4byte	0x2f6
+	.4byte	0x2f4
 	.byte	0xb
-	.uleb128 0x1a
+	.uleb128 0x19
 	.4byte	.LASF87
 	.byte	0xf
 	.2byte	0x100
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0xc
-	.uleb128 0x1a
+	.uleb128 0x19
 	.4byte	.LASF178
 	.byte	0xf
 	.2byte	0x101
-	.4byte	0xbc9
+	.4byte	0xbc7
 	.byte	0x10
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0xbd9
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0xbd7
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xf
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x1a
 	.4byte	.LASF179
 	.byte	0xc
 	.byte	0xf
 	.2byte	0x105
-	.4byte	0xc0e
-	.uleb128 0x1a
+	.4byte	0xc0c
+	.uleb128 0x19
 	.4byte	.LASF180
 	.byte	0xf
 	.2byte	0x107
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x19
 	.4byte	.LASF181
 	.byte	0xf
 	.2byte	0x108
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x4
-	.uleb128 0x1c
+	.uleb128 0x1b
 	.ascii	"lpa\000"
 	.byte	0xf
 	.2byte	0x109
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x1a
 	.4byte	.LASF182
 	.byte	0xc
 	.byte	0xf
 	.2byte	0x10c
-	.4byte	0xc43
-	.uleb128 0x1a
+	.4byte	0xc41
+	.uleb128 0x19
 	.4byte	.LASF63
 	.byte	0xf
 	.2byte	0x10e
-	.4byte	0x539
+	.4byte	0x537
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x19
 	.4byte	.LASF64
 	.byte	0xf
 	.2byte	0x10f
-	.4byte	0x539
+	.4byte	0x537
 	.byte	0x4
-	.uleb128 0x1a
+	.uleb128 0x19
 	.4byte	.LASF183
 	.byte	0xf
 	.2byte	0x110
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0x8
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF184
 	.byte	0x10
 	.byte	0x12
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_type
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF185
 	.byte	0x10
 	.byte	0x13
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF186
 	.byte	0x10
 	.byte	0x14
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF187
 	.byte	0x10
 	.byte	0x15
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF188
 	.byte	0x10
 	.byte	0x16
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF189
 	.byte	0x10
 	.byte	0x17
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF190
 	.byte	0x10
 	.byte	0x18
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF191
 	.byte	0x10
 	.byte	0x19
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF192
 	.byte	0x10
 	.byte	0x1a
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF193
 	.byte	0x10
 	.byte	0x1c
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF194
 	.byte	0x10
 	.byte	0x1d
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF195
 	.byte	0x10
 	.byte	0x1e
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF196
 	.byte	0x10
 	.byte	0x1f
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF197
 	.byte	0x10
 	.byte	0x20
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF198
 	.byte	0x10
 	.byte	0x24
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF199
 	.byte	0x10
 	.byte	0x25
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF200
 	.byte	0x10
 	.byte	0x26
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF201
 	.byte	0x10
 	.byte	0x27
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF202
 	.byte	0x10
 	.byte	0x29
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF203
 	.byte	0x10
 	.byte	0x2a
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF204
 	.byte	0x10
 	.byte	0x2c
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF205
 	.byte	0x10
 	.byte	0x2e
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF206
 	.byte	0x10
 	.byte	0x2f
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF207
 	.byte	0x10
 	.byte	0x30
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF208
 	.byte	0x10
 	.byte	0x31
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF209
 	.byte	0x10
 	.byte	0x32
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF210
 	.byte	0x10
 	.byte	0x33
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF211
 	.byte	0x10
 	.byte	0x34
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF212
 	.byte	0x10
 	.byte	0x35
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF213
 	.byte	0x10
 	.byte	0x36
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF214
 	.byte	0x10
 	.byte	0x37
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF215
 	.byte	0x10
 	.byte	0x38
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF216
 	.byte	0x10
 	.byte	0x3a
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_GlobalSysVersion
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF217
 	.byte	0x10
 	.byte	0x3b
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_GlobalDataVersion
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF218
 	.byte	0x10
 	.byte	0x3c
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLbaSector
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF219
 	.byte	0x10
 	.byte	0x3d
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLpn
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF220
 	.byte	0x10
 	.byte	0x3e
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_VaildLpn
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF221
 	.byte	0x10
 	.byte	0x3f
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_MaxLbn
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF222
 	.byte	0x10
 	.byte	0x41
-	.4byte	0x4b9
+	.4byte	0x4b7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gBbtInfo
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF223
 	.byte	0x10
 	.byte	0x42
-	.4byte	0x53f
+	.4byte	0x53d
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gSysInfo
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF224
 	.byte	0x10
 	.byte	0x43
-	.4byte	0xadc
+	.4byte	0xada
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF225
 	.byte	0x10
 	.byte	0x44
-	.4byte	0x587
+	.4byte	0x585
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gL2pMapInfo
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF226
 	.byte	0x10
 	.byte	0x45
-	.4byte	0x587
+	.4byte	0x585
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gVendorBlkInfo
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF227
 	.byte	0x10
 	.byte	0x46
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_sys
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF228
 	.byte	0x10
 	.byte	0x47
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_read
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x32d
-	.uleb128 0x1d
+	.4byte	0x32b
+	.uleb128 0x1c
 	.4byte	.LASF229
 	.byte	0x10
 	.byte	0x48
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_prgm
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF230
 	.byte	0x10
 	.byte	0x49
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_erase
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF231
 	.byte	0x10
 	.byte	0x4a
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF232
 	.byte	0x10
 	.byte	0x4b
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc_dst
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF233
 	.byte	0x10
 	.byte	0x4d
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_req_cache
-	.uleb128 0xc
-	.4byte	0x2f6
-	.4byte	0xfab
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2f4
+	.4byte	0xfa9
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF234
 	.byte	0x10
 	.byte	0x4f
-	.4byte	0xf9b
+	.4byte	0xf99
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_plane_order_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF235
 	.byte	0x10
 	.byte	0x51
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF236
 	.byte	0x10
 	.byte	0x52
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf_1
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF237
 	.byte	0x10
 	.byte	0x53
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_data_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF238
 	.byte	0x10
 	.byte	0x54
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF239
 	.byte	0x10
 	.byte	0x55
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF240
 	.byte	0x10
 	.byte	0x56
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_1
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF241
 	.byte	0x10
 	.byte	0x57
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_spare_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF242
 	.byte	0x10
 	.byte	0x58
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_spare_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF243
 	.byte	0x10
 	.byte	0x59
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_data_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF244
 	.byte	0x10
 	.byte	0x5a
-	.4byte	0x1066
+	.4byte	0x1064
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_gc_page_buf_info
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0xc0e
-	.uleb128 0x1d
+	.4byte	0xc0c
+	.uleb128 0x1c
 	.4byte	.LASF245
 	.byte	0x10
 	.byte	0x5b
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_gc_page_buf_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF246
 	.byte	0x10
 	.byte	0x5c
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_num_req
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF247
 	.byte	0x10
 	.byte	0x5d
-	.4byte	0x109f
+	.4byte	0x109d
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_ect_tbl_info
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x673
-	.uleb128 0x1d
+	.4byte	0x671
+	.uleb128 0x1c
 	.4byte	.LASF248
 	.byte	0x10
 	.byte	0x5e
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_info_size
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF249
 	.byte	0x10
 	.byte	0x5f
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_erase_count_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF250
 	.byte	0x10
 	.byte	0x61
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_swl_mul_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF251
 	.byte	0x10
 	.byte	0x62
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_swl_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF252
 	.byte	0x10
 	.byte	0x63
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x10
 	.byte	0x64
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_check_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
 	.byte	0x10
 	.byte	0x65
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_blk_mode_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF255
 	.byte	0x10
 	.byte	0x67
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF256
 	.byte	0x10
 	.byte	0x68
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_valid_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF257
 	.byte	0x10
 	.byte	0x69
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_ver_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF258
 	.byte	0x10
 	.byte	0x6a
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_region_ppn_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF259
 	.byte	0x10
 	.byte	0x6b
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_map_block
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF260
 	.byte	0x10
 	.byte	0x6d
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF261
 	.byte	0x10
 	.byte	0x6e
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF262
 	.byte	0x10
 	.byte	0x6f
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_ver_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF263
 	.byte	0x10
 	.byte	0x70
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF264
 	.byte	0x10
 	.byte	0x71
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_vendor_block
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF265
 	.byte	0x10
 	.byte	0x73
-	.4byte	0x11d7
+	.4byte	0x11d5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_ram_map
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x636
-	.uleb128 0x1d
+	.4byte	0x634
+	.uleb128 0x1c
 	.4byte	.LASF266
 	.byte	0x10
 	.byte	0x74
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_map_buf
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF267
 	.byte	0x10
 	.byte	0x75
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF268
 	.byte	0x10
 	.byte	0x7c
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_table
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0xaab
-	.uleb128 0x1d
+	.4byte	0xaa9
+	.uleb128 0x1c
 	.4byte	.LASF269
 	.byte	0x10
 	.byte	0x7d
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_free_data_block_list_head
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF270
 	.byte	0x10
 	.byte	0x7f
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_head
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF271
 	.byte	0x10
 	.byte	0x80
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_tail
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF272
 	.byte	0x10
 	.byte	0x81
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF273
 	.byte	0x10
 	.byte	0x82
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF274
 	.byte	0x10
 	.byte	0x83
-	.4byte	0xb37
+	.4byte	0xb35
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_active_superblock
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF275
 	.byte	0x10
 	.byte	0x84
-	.4byte	0xb37
+	.4byte	0xb35
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_buffer_superblock
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF276
 	.byte	0x10
 	.byte	0x85
-	.4byte	0xb37
+	.4byte	0xb35
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF277
 	.byte	0x10
 	.byte	0x86
-	.4byte	0xb37
+	.4byte	0xb35
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_superblock
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF278
 	.byte	0x10
 	.byte	0x87
-	.4byte	0x12c0
+	.4byte	0x12be
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_last_act_superblock
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0xb37
-	.uleb128 0x1d
+	.4byte	0xb35
+	.uleb128 0x1c
 	.4byte	.LASF279
 	.byte	0x10
 	.byte	0x88
-	.4byte	0x858
+	.4byte	0x856
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_save_data
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF280
 	.byte	0x10
 	.byte	0x89
-	.4byte	0x955
+	.4byte	0x953
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_ext_data
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF281
 	.byte	0x10
 	.byte	0x8b
-	.4byte	0x12f9
+	.4byte	0x12f7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_page_info
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0xbd9
-	.uleb128 0x1d
+	.4byte	0xbd7
+	.uleb128 0x1c
 	.4byte	.LASF282
 	.byte	0x10
 	.byte	0x8c
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_blk_tbl
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF283
 	.byte	0x10
 	.byte	0x8d
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF284
 	.byte	0x10
 	.byte	0x8e
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_page_offset
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF285
 	.byte	0x10
 	.byte	0x8f
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF286
 	.byte	0x10
 	.byte	0x90
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF287
 	.byte	0x10
 	.byte	0x91
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF288
 	.byte	0x10
 	.byte	0x92
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk_1
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF289
 	.byte	0x10
 	.byte	0x93
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF290
 	.byte	0x10
 	.byte	0x94
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x13a8
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0x13a6
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x10
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF291
 	.byte	0x10
 	.byte	0x95
-	.4byte	0x1398
+	.4byte	0x1396
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF292
 	.byte	0x10
 	.byte	0x97
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF293
 	.byte	0x10
 	.byte	0x98
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF294
 	.byte	0x10
 	.byte	0x99
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_index
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF295
 	.byte	0x10
 	.byte	0x9b
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_gc_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF296
 	.byte	0x10
 	.byte	0x9c
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF297
 	.byte	0x10
 	.byte	0x9d
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_sector
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF298
 	.byte	0x10
 	.byte	0x9e
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_sector
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF299
 	.byte	0x10
 	.byte	0xa0
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_discard_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF300
 	.byte	0x10
 	.byte	0xa1
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_page_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF301
 	.byte	0x10
 	.byte	0xa2
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF302
 	.byte	0x10
 	.byte	0xa3
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_cache_write_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF303
 	.byte	0x10
 	.byte	0xa4
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_l2p_write_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF304
 	.byte	0x10
 	.byte	0xa6
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF305
 	.byte	0x10
 	.byte	0xa7
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_avg_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF306
 	.byte	0x10
 	.byte	0xa8
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_min_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF307
 	.byte	0x10
 	.byte	0xa9
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_slc_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF308
 	.byte	0x10
 	.byte	0xaa
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF309
 	.byte	0x10
 	.byte	0xab
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_max_erase_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF310
 	.byte	0x10
 	.byte	0xac
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_gc_progress
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF311
 	.byte	0x10
 	.byte	0xad
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_swl_replace
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF312
 	.byte	0x10
 	.byte	0xae
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ftl_nand_free_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF313
 	.byte	0x10
 	.byte	0xaf
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF314
 	.byte	0x10
 	.byte	0xb0
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF315
 	.byte	0x10
 	.byte	0xb1
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_skip_write_count
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF316
 	.byte	0x10
 	.byte	0xb2
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_cur_erase_blk
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF317
 	.byte	0x10
 	.byte	0xb4
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_num
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF318
 	.byte	0x10
 	.byte	0xb5
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_min_ver
-	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x1594
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x30a
+	.4byte	0x1592
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF319
 	.byte	0x10
 	.byte	0xb6
-	.4byte	0x1584
+	.4byte	0x1582
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF320
 	.byte	0x10
 	.byte	0xb7
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_mlc_erase_count_value
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF321
 	.byte	0x10
 	.byte	0xb8
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF322
 	.byte	0xd
 	.byte	0x14
-	.4byte	0x37c
-	.uleb128 0x9
+	.4byte	0x37a
+	.uleb128 0x8
 	.4byte	.LASF323
 	.byte	0xd
 	.byte	0x15
-	.4byte	0x37c
-	.uleb128 0x9
+	.4byte	0x37a
+	.uleb128 0x8
 	.4byte	.LASF324
 	.byte	0xd
 	.byte	0x16
-	.4byte	0x41e
-	.uleb128 0xc
-	.4byte	0x99
-	.4byte	0x15f9
-	.uleb128 0x19
-	.4byte	0x2e
+	.4byte	0x41c
+	.uleb128 0xb
+	.4byte	0x97
+	.4byte	0x15f7
+	.uleb128 0x18
+	.4byte	0x2c
 	.2byte	0x3ff
 	.byte	0
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF325
 	.byte	0xd
 	.byte	0x17
-	.4byte	0x15e8
-	.uleb128 0x1d
+	.4byte	0x15e6
+	.uleb128 0x1c
 	.4byte	.LASF326
 	.byte	0x3
 	.byte	0x5
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	DeviceCapacity
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF327
 	.byte	0x3
 	.byte	0x6
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gFtlInitStatus
-	.uleb128 0x9
+	.uleb128 0x8
 	.4byte	.LASF328
 	.byte	0x3
 	.byte	0x6c
-	.4byte	0x30c
-	.uleb128 0x9
+	.4byte	0x30a
+	.uleb128 0x8
 	.4byte	.LASF329
 	.byte	0x3
 	.byte	0x6d
-	.4byte	0x30c
-	.uleb128 0x9
+	.4byte	0x30a
+	.uleb128 0x8
 	.4byte	.LASF330
 	.byte	0x3
 	.byte	0x6e
-	.4byte	0x30c
-	.uleb128 0x9
+	.4byte	0x30a
+	.uleb128 0x8
 	.4byte	.LASF331
 	.byte	0x3
 	.byte	0x6f
-	.4byte	0x30c
-	.uleb128 0x1e
+	.4byte	0x30a
+	.uleb128 0x1d
 	.4byte	.LASF332
 	.byte	0x3
 	.2byte	0x3c0
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	power_up_flag
-	.uleb128 0x1f
+	.uleb128 0x1e
 	.4byte	.LASF336
 	.byte	0x3
 	.2byte	0x483
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_discard_updated
-	.uleb128 0x1e
+	.uleb128 0x1d
 	.4byte	.LASF333
 	.byte	0x2
 	.2byte	0x38c
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x1e
+	.uleb128 0x1d
 	.4byte	.LASF334
 	.byte	0x2
 	.2byte	0x3a1
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x16ab
-	.uleb128 0x19
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x2ff
+	.4byte	0x16a9
+	.uleb128 0x18
+	.4byte	0x2c
 	.2byte	0x1fff
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1d
 	.4byte	.LASF335
 	.byte	0x2
 	.2byte	0x8df
-	.4byte	0x169a
+	.4byte	0x1698
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_vpc_table
-	.uleb128 0x20
+	.uleb128 0x1f
 	.4byte	.LASF337
 	.byte	0x5
 	.byte	0x6d
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x1e
+	.uleb128 0x1d
 	.4byte	.LASF338
 	.byte	0x5
 	.2byte	0x1d4
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_ink_free_return_value
-	.uleb128 0x20
+	.uleb128 0x1f
 	.4byte	.LASF339
 	.byte	0x1
 	.byte	0xe
-	.4byte	0x15e8
+	.4byte	0x15e6
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_buf
-	.uleb128 0x21
-	.4byte	0x15f9
+	.uleb128 0x20
+	.4byte	0x15f7
 	.byte	0x1
 	.byte	0xf
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	ftl_temp_buf
-	.uleb128 0xc
-	.4byte	0x99
-	.4byte	0x170e
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x97
+	.4byte	0x170c
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x7f
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1f
 	.4byte	.LASF340
 	.byte	0x1
 	.byte	0x10
-	.4byte	0x16fe
+	.4byte	0x16fc
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_spare_buf
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF343
 	.byte	0x1
 	.byte	0xd2
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB279
 	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x176f
-	.uleb128 0x23
+	.4byte	0x176d
+	.uleb128 0x22
 	.4byte	.LASF341
 	.byte	0x1
 	.byte	0xd2
-	.4byte	0x25
-	.4byte	.LLST301
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST290
+	.uleb128 0x22
 	.4byte	.LASF342
 	.byte	0x1
 	.byte	0xd2
-	.4byte	0x25
-	.4byte	.LLST302
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST291
+	.uleb128 0x22
 	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xd2
-	.4byte	0x41
-	.4byte	.LLST303
-	.uleb128 0x24
-	.4byte	.LVL1649
-	.4byte	0x67d3
+	.4byte	0x3f
+	.4byte	.LLST292
+	.uleb128 0x23
+	.4byte	.LVL1636
+	.4byte	0x67cf
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x24
+	.byte	0x4
+	.uleb128 0x21
 	.4byte	.LASF344
 	.byte	0x1
 	.byte	0xcd
-	.4byte	0x25
+	.4byte	0x176d
 	.4byte	.LFB278
 	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x17bf
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF345
 	.byte	0x1
 	.byte	0xcd
-	.4byte	0x25
-	.4byte	.LLST177
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST172
+	.uleb128 0x22
 	.4byte	.LASF346
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x17bf
-	.4byte	.LLST178
-	.uleb128 0x23
+	.4byte	.LLST173
+	.uleb128 0x22
 	.4byte	.LASF347
 	.byte	0x1
 	.byte	0xcd
-	.4byte	0x41
-	.4byte	.LLST179
-	.uleb128 0x24
-	.4byte	.LVL830
-	.4byte	0x67de
+	.4byte	0x3f
+	.4byte	.LLST174
+	.uleb128 0x23
+	.4byte	.LVL833
+	.4byte	0x67da
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
 	.4byte	0x17c5
 	.uleb128 0x25
@@ -26472,74 +28012,74 @@ check_vpc_table:
 	.4byte	.LASF350
 	.byte	0x1
 	.byte	0xc8
-	.4byte	0x25
+	.4byte	0x176d
 	.byte	0x1
 	.4byte	0x180a
 	.uleb128 0x27
 	.ascii	"s\000"
 	.byte	0x1
 	.byte	0xc8
-	.4byte	0x25
+	.4byte	0x176d
 	.uleb128 0x27
 	.ascii	"c\000"
 	.byte	0x1
 	.byte	0xc8
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x27
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0xc8
-	.4byte	0x41
+	.4byte	0x3f
 	.uleb128 0x28
 	.uleb128 0x29
 	.ascii	"__p\000"
 	.byte	0x1
 	.byte	0xca
-	.4byte	0x25
+	.4byte	0x176d
 	.uleb128 0x29
 	.ascii	"__n\000"
 	.byte	0x1
 	.byte	0xca
-	.4byte	0xce
+	.4byte	0xcc
 	.byte	0
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF348
 	.byte	0x1
 	.byte	0xb6
-	.4byte	0x8e
+	.4byte	0x8c
 	.4byte	.LFB276
 	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1900
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF349
 	.byte	0x1
 	.byte	0xb6
-	.4byte	0x46f
-	.4byte	.LLST109
+	.4byte	0x46d
+	.4byte	.LLST105
 	.uleb128 0x2b
 	.ascii	"die\000"
 	.byte	0x1
 	.byte	0xb6
-	.4byte	0x99
-	.4byte	.LLST110
+	.4byte	0x97
+	.4byte	.LLST106
 	.uleb128 0x2c
 	.4byte	.LASF114
 	.byte	0x1
 	.byte	0xb8
-	.4byte	0x83
-	.4byte	.LLST111
+	.4byte	0x81
+	.4byte	.LLST107
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0xb8
-	.4byte	0x83
+	.4byte	0x81
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB361
-	.4byte	.Ldebug_ranges0+0x160
+	.4byte	.LBB359
+	.4byte	.Ldebug_ranges0+0x120
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x18aa
@@ -26550,7 +28090,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x160
+	.4byte	.Ldebug_ranges0+0x120
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -26558,21 +28098,21 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x160
+	.4byte	.Ldebug_ranges0+0x120
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL485
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL483
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x31
 	.4byte	0x17c6
-	.4byte	.LBB370
-	.4byte	.LBE370-.LBB370
+	.4byte	.LBB368
+	.4byte	.LBE368-.LBB368
 	.byte	0x1
 	.byte	0xbd
 	.uleb128 0x2e
@@ -26581,25 +28121,25 @@ check_vpc_table:
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB371
-	.4byte	.LBE371-.LBB371
+	.uleb128 0x32
+	.4byte	.LBB369
+	.4byte	.LBE369-.LBB369
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB372
-	.4byte	.LBE372-.LBB372
+	.uleb128 0x32
+	.4byte	.LBB370
+	.4byte	.LBE370-.LBB370
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL489
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL487
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
@@ -26608,20 +28148,20 @@ check_vpc_table:
 	.4byte	.LASF351
 	.byte	0x1
 	.byte	0x9b
-	.4byte	0x317
+	.4byte	0x315
 	.byte	0x1
 	.4byte	0x1944
-	.uleb128 0x34
+	.uleb128 0x33
 	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x9b
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x29
 	.ascii	"sts\000"
 	.byte	0x1
 	.byte	0x9d
-	.4byte	0x317
-	.uleb128 0x35
+	.4byte	0x315
+	.uleb128 0x34
 	.4byte	.LASF353
 	.byte	0x1
 	.byte	0x9e
@@ -26630,795 +28170,794 @@ check_vpc_table:
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x9f
-	.4byte	0x32d
-	.uleb128 0x36
+	.4byte	0x32b
+	.uleb128 0x35
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0xb1
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x30c
+	.uleb128 0xb
+	.4byte	0x30a
 	.4byte	0x1954
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xf
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF354
 	.byte	0x1
 	.byte	0x85
-	.4byte	0x8e
+	.4byte	0x8c
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x19ea
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x85
-	.4byte	0x25
-	.4byte	.LLST94
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST91
+	.uleb128 0x22
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x85
-	.4byte	0x99
-	.4byte	.LLST95
-	.uleb128 0x23
+	.4byte	0x97
+	.4byte	.LLST92
+	.uleb128 0x22
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x85
-	.4byte	0x99
-	.4byte	.LLST96
-	.uleb128 0x37
+	.4byte	0x97
+	.4byte	.LLST93
+	.uleb128 0x36
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x87
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x1
-	.byte	0x56
+	.byte	0x55
 	.uleb128 0x29
 	.ascii	"cs\000"
 	.byte	0x1
 	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x35
+	.4byte	0x97
+	.uleb128 0x34
 	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x20
+	.4byte	0x97
+	.uleb128 0x1f
 	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x87
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -36
+	.sleb128 -44
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x88
-	.4byte	0xf40
-	.uleb128 0x20
+	.4byte	0xf3e
+	.uleb128 0x1f
 	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x89
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x31
-	.4byte	.LVL413
-	.4byte	0x1ba6
+	.uleb128 0x23
+	.4byte	.LVL404
+	.4byte	0x1ba9
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF360
 	.byte	0x1
 	.byte	0x49
-	.4byte	0x8e
+	.4byte	0x8c
 	.4byte	.LFB273
 	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ae3
-	.uleb128 0x23
+	.4byte	0x1ae4
+	.uleb128 0x22
 	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x49
-	.4byte	0x25
-	.4byte	.LLST89
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST86
+	.uleb128 0x22
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST90
-	.uleb128 0x23
+	.4byte	0x97
+	.4byte	.LLST87
+	.uleb128 0x22
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST91
-	.uleb128 0x23
+	.4byte	0x97
+	.4byte	.LLST88
+	.uleb128 0x22
 	.4byte	.LASF361
 	.byte	0x1
 	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST92
+	.4byte	0x97
+	.4byte	.LLST89
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x4b
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x29
 	.ascii	"cs\000"
 	.byte	0x1
 	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x35
+	.4byte	0x97
+	.uleb128 0x34
 	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x20
+	.4byte	0x97
+	.uleb128 0x1f
 	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x2
+	.4byte	0x97
+	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -64
+	.sleb128 -68
 	.uleb128 0x2c
 	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x4c
-	.4byte	0x99
-	.4byte	.LLST93
+	.4byte	0x97
+	.4byte	.LLST90
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x4d
-	.4byte	0xf40
-	.uleb128 0x38
+	.4byte	0xf3e
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7540
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0xe0
-	.4byte	0x1ad0
-	.uleb128 0x20
+	.4byte	__func__.4795
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0xa0
+	.4byte	0x1ad1
+	.uleb128 0x1f
 	.4byte	.LASF363
 	.byte	0x1
 	.byte	0x68
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x31
-	.4byte	.LVL397
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL399
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL400
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL401
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x31
+	.sleb128 -64
+	.uleb128 0x23
+	.4byte	.LVL389
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL390
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL391
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL392
-	.4byte	0x1ba6
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x1af3
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0x23
+	.4byte	.LVL378
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL380
+	.4byte	0x1ba9
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x1af4
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xe
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x1ae3
+	.uleb128 0x3
+	.4byte	0x1ae4
 	.uleb128 0x2a
 	.4byte	.LASF364
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x8e
+	.4byte	0x8c
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ba6
-	.uleb128 0x23
+	.4byte	0x1ba9
+	.uleb128 0x22
 	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x25
-	.4byte	.LLST82
-	.uleb128 0x23
+	.4byte	0x176d
+	.4byte	.LLST78
+	.uleb128 0x22
 	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x99
-	.4byte	.LLST83
-	.uleb128 0x23
+	.4byte	0x97
+	.4byte	.LLST79
+	.uleb128 0x22
 	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x99
-	.4byte	.LLST84
-	.uleb128 0x37
+	.4byte	0x97
+	.4byte	.LLST80
+	.uleb128 0x36
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x1
 	.byte	0x56
 	.uleb128 0x29
 	.ascii	"cs\000"
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x35
+	.4byte	0x97
+	.uleb128 0x34
 	.4byte	.LASF61
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x20
+	.4byte	0x97
+	.uleb128 0x1f
 	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x99
+	.4byte	0x97
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x20
+	.sleb128 -48
+	.uleb128 0x2c
 	.4byte	.LASF359
 	.byte	0x1
 	.byte	0x2e
-	.4byte	0x99
-	.uleb128 0x1
-	.byte	0x57
+	.4byte	0x97
+	.4byte	.LLST81
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x2f
-	.4byte	0xf40
-	.uleb128 0x38
+	.4byte	0xf3e
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7523
-	.uleb128 0x31
-	.4byte	.LVL361
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL364
-	.4byte	0x1ba6
+	.4byte	__func__.4778
+	.uleb128 0x23
+	.4byte	.LVL347
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL350
+	.4byte	0x1ba9
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.4byte	.LASF667
 	.byte	0x1
 	.byte	0x11
-	.4byte	0x99
+	.4byte	0x97
 	.4byte	.LFB271
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c4e
+	.4byte	0x1c51
 	.uleb128 0x2b
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x11
-	.4byte	0xf40
+	.4byte	0xf3e
 	.4byte	.LLST0
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF358
 	.byte	0x1
 	.byte	0x11
-	.4byte	0x376
+	.4byte	0x374
 	.4byte	.LLST1
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF365
 	.byte	0x1
 	.byte	0x11
-	.4byte	0x376
+	.4byte	0x374
 	.4byte	.LLST2
-	.uleb128 0x35
+	.uleb128 0x34
 	.4byte	.LASF366
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x83
-	.uleb128 0x35
+	.4byte	0x81
+	.uleb128 0x34
 	.4byte	.LASF367
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x83
+	.4byte	0x81
 	.uleb128 0x2c
 	.4byte	.LASF71
 	.byte	0x1
 	.byte	0x14
-	.4byte	0x83
+	.4byte	0x81
 	.4byte	.LLST3
 	.uleb128 0x2c
 	.4byte	.LASF72
 	.byte	0x1
 	.byte	0x14
-	.4byte	0x83
+	.4byte	0x81
 	.4byte	.LLST4
 	.uleb128 0x2c
 	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x15
-	.4byte	0x99
+	.4byte	0x97
 	.4byte	.LLST5
 	.uleb128 0x2c
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x16
-	.4byte	0x99
+	.4byte	0x97
 	.4byte	.LLST6
 	.uleb128 0x2c
 	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x17
-	.4byte	0x99
+	.4byte	0x97
 	.4byte	.LLST7
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF370
 	.byte	0x5
 	.2byte	0x2f4
-	.4byte	0x99
+	.4byte	0x97
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c72
-	.uleb128 0x24
-	.4byte	.LVL1388
-	.4byte	0x1c72
+	.4byte	0x1c75
+	.uleb128 0x23
+	.4byte	.LVL1369
+	.4byte	0x1c75
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF371
 	.byte	0x5
 	.2byte	0x1d5
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x1d3f
-	.uleb128 0x3d
+	.4byte	0x1d42
+	.uleb128 0x3c
 	.4byte	.LASF372
 	.byte	0x5
 	.2byte	0x1d5
-	.4byte	0x30c
-	.uleb128 0x3d
+	.4byte	0x30a
+	.uleb128 0x3c
 	.4byte	.LASF373
 	.byte	0x5
 	.2byte	0x1d5
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF374
 	.byte	0x5
 	.2byte	0x1d7
-	.4byte	0x301
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.uleb128 0x3e
 	.ascii	"lpa\000"
 	.byte	0x5
 	.2byte	0x1d8
-	.4byte	0x30c
-	.uleb128 0x3f
+	.4byte	0x30a
+	.uleb128 0x3e
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1d8
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF375
 	.byte	0x5
 	.2byte	0x1d9
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF85
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF377
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x5
 	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF379
 	.byte	0x5
 	.2byte	0x1db
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x1d3f
-	.uleb128 0x40
+	.4byte	0x1d42
+	.uleb128 0x3f
 	.4byte	.LASF381
 	.byte	0x5
 	.2byte	0x272
-	.uleb128 0x40
+	.uleb128 0x3f
 	.4byte	.LASF382
 	.byte	0x5
 	.2byte	0x275
-	.uleb128 0x41
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x1d55
+	.4byte	0x1d58
 	.4byte	.LASF371
 	.uleb128 0x28
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF383
 	.byte	0x5
 	.2byte	0x1f3
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x770
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x1d55
-	.uleb128 0x17
-	.4byte	0x2e
+	.4byte	0x76e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x1d58
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x16
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x1d45
-	.uleb128 0x3c
+	.uleb128 0x3
+	.4byte	0x1d48
+	.uleb128 0x3b
 	.4byte	.LASF384
 	.byte	0x5
 	.2byte	0x1a2
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x1dba
-	.uleb128 0x3f
+	.4byte	0x1dbd
+	.uleb128 0x3e
 	.ascii	"ret\000"
 	.byte	0x5
 	.2byte	0x1a4
-	.4byte	0x64
-	.uleb128 0x3f
+	.4byte	0x62
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x1a5
-	.4byte	0x64
-	.uleb128 0x3f
+	.4byte	0x62
+	.uleb128 0x3e
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1a6
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF353
 	.byte	0x5
 	.2byte	0x1a7
 	.4byte	0x1944
-	.uleb128 0x42
-	.4byte	0x1dab
-	.uleb128 0x3e
+	.uleb128 0x41
+	.4byte	0x1dae
+	.uleb128 0x3d
 	.4byte	.LASF385
 	.byte	0x5
 	.2byte	0x1b1
-	.4byte	0x32d
+	.4byte	0x32b
 	.byte	0
 	.uleb128 0x28
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF386
 	.byte	0x5
 	.2byte	0x1c6
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF387
 	.byte	0x5
 	.2byte	0x185
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x1e04
-	.uleb128 0x3d
+	.4byte	0x1e07
+	.uleb128 0x3c
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x185
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x5
 	.2byte	0x187
-	.4byte	0x301
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x188
-	.4byte	0x301
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.uleb128 0x3e
 	.ascii	"j\000"
 	.byte	0x5
 	.2byte	0x188
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x5
 	.2byte	0x189
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.4byte	.LASF497
 	.byte	0x5
 	.2byte	0x17a
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF389
 	.byte	0x5
 	.2byte	0x166
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB265
 	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1e6d
-	.uleb128 0x44
+	.4byte	0x1e70
+	.uleb128 0x43
 	.4byte	.LASF178
 	.byte	0x5
 	.2byte	0x166
-	.4byte	0x301
-	.4byte	.LLST81
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST77
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF390
 	.byte	0x5
 	.2byte	0x169
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL347
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL348
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL349
-	.4byte	0x1e6d
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL333
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL334
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL335
+	.4byte	0x1e70
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF391
 	.byte	0x5
 	.2byte	0x158
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB264
 	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ea1
-	.uleb128 0x44
+	.4byte	0x1ea4
+	.uleb128 0x43
 	.4byte	.LASF392
 	.byte	0x5
 	.2byte	0x158
-	.4byte	0x301
-	.4byte	.LLST80
-	.uleb128 0x31
-	.4byte	.LVL344
-	.4byte	0x67f2
+	.4byte	0x2ff
+	.4byte	.LLST76
+	.uleb128 0x23
+	.4byte	.LVL330
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF393
 	.byte	0x5
 	.2byte	0x13b
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f15
-	.uleb128 0x3f
+	.4byte	0x1f18
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF380
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x1d3f
-	.4byte	.LLST255
-	.uleb128 0x31
-	.4byte	.LVL1289
+	.4byte	0x1d42
+	.4byte	.LLST244
+	.uleb128 0x23
+	.4byte	.LVL1274
 	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1290
-	.4byte	0x22cb
-	.uleb128 0x31
-	.4byte	.LVL1291
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL1292
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1293
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1294
-	.4byte	0x2093
-	.uleb128 0x31
-	.4byte	.LVL1296
-	.4byte	0x21ed
+	.uleb128 0x23
+	.4byte	.LVL1275
+	.4byte	0x22ce
+	.uleb128 0x23
+	.4byte	.LVL1276
+	.4byte	0x20c7
+	.uleb128 0x23
+	.4byte	.LVL1277
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL1278
+	.4byte	0x493b
+	.uleb128 0x23
+	.4byte	.LVL1279
+	.4byte	0x2096
+	.uleb128 0x23
+	.4byte	.LVL1281
+	.4byte	0x21f0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF394
 	.byte	0x5
 	.2byte	0x12b
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB262
 	.4byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f6f
-	.uleb128 0x31
-	.4byte	.LVL1297
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1298
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL1299
-	.4byte	0x2505
-	.uleb128 0x31
-	.4byte	.LVL1300
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1301
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1302
-	.4byte	0x3598
-	.uleb128 0x24
-	.4byte	.LVL1303
-	.4byte	0x23e4
+	.4byte	0x1f72
+	.uleb128 0x23
+	.4byte	.LVL1282
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1283
+	.4byte	0x20c7
+	.uleb128 0x23
+	.4byte	.LVL1284
+	.4byte	0x2508
+	.uleb128 0x23
+	.4byte	.LVL1285
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1286
+	.4byte	0x3736
+	.uleb128 0x23
+	.4byte	.LVL1287
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1288
+	.4byte	0x23e7
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.4byte	.LASF453
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF395
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB260
 	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2093
-	.uleb128 0x23
+	.4byte	0x2096
+	.uleb128 0x22
 	.4byte	.LASF396
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x12c0
-	.4byte	.LLST168
-	.uleb128 0x23
+	.4byte	0x12be
+	.4byte	.LLST163
+	.uleb128 0x22
 	.4byte	.LASF397
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x30c
-	.4byte	.LLST169
+	.4byte	0x30a
+	.4byte	.LLST164
 	.uleb128 0x2c
 	.4byte	.LASF378
 	.byte	0x5
 	.byte	0xd4
-	.4byte	0x301
-	.4byte	.LLST170
+	.4byte	0x2ff
+	.4byte	.LLST165
 	.uleb128 0x2c
 	.4byte	.LASF357
 	.byte	0x5
 	.byte	0xd5
-	.4byte	0x301
-	.4byte	.LLST171
+	.4byte	0x2ff
+	.4byte	.LLST166
 	.uleb128 0x29
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0xd5
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF376
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x2c
 	.4byte	.LASF172
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x301
-	.4byte	.LLST172
+	.4byte	0x2ff
+	.4byte	.LLST167
 	.uleb128 0x2c
 	.4byte	.LASF170
 	.byte	0x5
 	.byte	0xd6
-	.4byte	0x301
-	.4byte	.LLST173
+	.4byte	0x2ff
+	.4byte	.LLST168
 	.uleb128 0x2c
 	.4byte	.LASF398
 	.byte	0x5
 	.byte	0xd7
-	.4byte	0x30c
-	.4byte	.LLST174
+	.4byte	0x30a
+	.4byte	.LLST169
 	.uleb128 0x2c
 	.4byte	.LASF399
 	.byte	0x5
 	.byte	0xd8
-	.4byte	0x30c
-	.4byte	.LLST175
-	.uleb128 0x35
+	.4byte	0x30a
+	.4byte	.LLST170
+	.uleb128 0x34
 	.4byte	.LASF400
 	.byte	0x5
 	.byte	0xd9
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x2c
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x1d3f
-	.4byte	.LLST176
-	.uleb128 0x47
+	.4byte	0x1d42
+	.4byte	.LLST171
+	.uleb128 0x46
 	.4byte	.LASF401
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x47
+	.uleb128 0x46
 	.4byte	.LASF402
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x48
+	.uleb128 0x47
 	.4byte	.LASF471
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L981
-	.uleb128 0x31
-	.4byte	.LVL790
-	.4byte	0x2093
-	.uleb128 0x31
-	.4byte	.LVL798
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL812
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL820
-	.4byte	0x314e
-	.uleb128 0x31
-	.4byte	.LVL822
-	.4byte	0x21ed
-	.uleb128 0x31
+	.4byte	.L968
+	.uleb128 0x23
+	.4byte	.LVL800
+	.4byte	0x2096
+	.uleb128 0x23
+	.4byte	.LVL805
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL817
+	.4byte	0x453b
+	.uleb128 0x23
 	.4byte	.LVL824
-	.4byte	0x4222
-	.uleb128 0x31
-	.4byte	.LVL825
-	.4byte	0x2093
+	.4byte	0x3149
+	.uleb128 0x23
+	.4byte	.LVL826
+	.4byte	0x21f0
+	.uleb128 0x23
+	.4byte	.LVL828
+	.4byte	0x420f
+	.uleb128 0x23
+	.4byte	.LVL829
+	.4byte	0x2096
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF409
 	.byte	0x5
 	.byte	0xc9
@@ -27426,131 +28965,131 @@ check_vpc_table:
 	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL784
+	.4byte	0x20c7
+	.uleb128 0x23
+	.4byte	.LVL795
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL785
+	.uleb128 0x23
+	.4byte	.LVL796
 	.4byte	0x17c6
-	.uleb128 0x24
-	.4byte	.LVL786
-	.4byte	0x230f
+	.uleb128 0x23
+	.4byte	.LVL797
+	.4byte	0x2312
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF403
 	.byte	0x5
 	.byte	0x6f
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB258
 	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x21d8
-	.uleb128 0x23
+	.4byte	0x21db
+	.uleb128 0x22
 	.4byte	.LASF404
 	.byte	0x5
 	.byte	0x6f
-	.4byte	0x64
-	.4byte	.LLST251
+	.4byte	0x62
+	.4byte	.LLST240
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF405
 	.byte	0x5
 	.byte	0x71
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x2c
 	.4byte	.LASF406
 	.byte	0x5
 	.byte	0x72
-	.4byte	0x30c
-	.4byte	.LLST252
+	.4byte	0x30a
+	.4byte	.LLST241
 	.uleb128 0x2c
 	.4byte	.LASF407
 	.byte	0x5
 	.byte	0x73
-	.4byte	0x30c
-	.4byte	.LLST253
-	.uleb128 0x35
+	.4byte	0x30a
+	.4byte	.LLST242
+	.uleb128 0x34
 	.4byte	.LASF396
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x12c0
+	.4byte	0x12be
 	.uleb128 0x2c
 	.4byte	.LASF408
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x12f9
-	.4byte	.LLST254
-	.uleb128 0x38
+	.4byte	0x12f7
+	.4byte	.LLST243
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x21e8
+	.4byte	0x21eb
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7373
-	.uleb128 0x31
-	.4byte	.LVL1257
-	.4byte	0x1f78
-	.uleb128 0x31
+	.4byte	__func__.4628
+	.uleb128 0x23
+	.4byte	.LVL1241
+	.4byte	0x1f7b
+	.uleb128 0x23
+	.4byte	.LVL1243
+	.4byte	0x3736
+	.uleb128 0x23
+	.4byte	.LVL1244
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL1245
+	.4byte	0x493b
+	.uleb128 0x23
+	.4byte	.LVL1249
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1250
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1252
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL1254
+	.4byte	0x41ea
+	.uleb128 0x23
+	.4byte	.LVL1255
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1256
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1258
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1259
-	.4byte	0x373d
-	.uleb128 0x31
+	.4byte	0x392e
+	.uleb128 0x23
 	.4byte	.LVL1260
-	.4byte	0x4b12
-	.uleb128 0x31
+	.4byte	0x4507
+	.uleb128 0x23
 	.4byte	.LVL1261
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1265
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1266
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1268
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1269
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL1271
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1272
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1274
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1275
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1276
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1277
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1278
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1279
-	.4byte	0x4222
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1262
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL1264
+	.4byte	0x420f
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x21e8
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x21eb
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x12
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x21d8
-	.uleb128 0x49
+	.uleb128 0x3
+	.4byte	0x21db
+	.uleb128 0x48
 	.4byte	.LASF410
 	.byte	0x5
 	.byte	0x54
@@ -27558,64 +29097,64 @@ check_vpc_table:
 	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2255
-	.uleb128 0x23
+	.4byte	0x2258
+	.uleb128 0x22
 	.4byte	.LASF411
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST75
-	.uleb128 0x23
+	.4byte	0x30a
+	.4byte	.LLST71
+	.uleb128 0x22
 	.4byte	.LASF181
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST76
+	.4byte	0x30a
+	.4byte	.LLST72
 	.uleb128 0x2b
 	.ascii	"lpa\000"
 	.byte	0x5
 	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST77
+	.4byte	0x30a
+	.4byte	.LLST73
 	.uleb128 0x2c
 	.4byte	.LASF412
 	.byte	0x5
 	.byte	0x56
-	.4byte	0x301
-	.4byte	.LLST78
-	.uleb128 0x4a
+	.4byte	0x2ff
+	.4byte	.LLST74
+	.uleb128 0x49
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x57
-	.4byte	0x301
-	.4byte	.LLST79
-	.uleb128 0x31
-	.4byte	.LVL332
-	.4byte	0x451a
+	.4byte	0x2ff
+	.4byte	.LLST75
+	.uleb128 0x23
+	.4byte	.LVL321
+	.4byte	0x4507
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF413
 	.byte	0x5
 	.byte	0x49
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB256
 	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2287
+	.4byte	0x228a
 	.uleb128 0x2b
 	.ascii	"blk\000"
 	.byte	0x5
 	.byte	0x49
-	.4byte	0x301
-	.4byte	.LLST74
+	.4byte	0x2ff
+	.4byte	.LLST70
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x4b
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF414
 	.byte	0x5
 	.byte	0x38
@@ -27623,33 +29162,33 @@ check_vpc_table:
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x22cb
-	.uleb128 0x4b
+	.4byte	0x22ce
+	.uleb128 0x4a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x38
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.4byte	.LASF415
 	.byte	0x5
 	.byte	0x38
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x3a
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF416
 	.byte	0x5
 	.byte	0x3b
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF417
 	.byte	0x5
 	.byte	0x29
@@ -27657,33 +29196,33 @@ check_vpc_table:
 	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x230f
-	.uleb128 0x4b
+	.4byte	0x2312
+	.uleb128 0x4a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x29
-	.4byte	0xf40
+	.4byte	0xf3e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.4byte	.LASF415
 	.byte	0x5
 	.byte	0x29
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x2b
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF416
 	.byte	0x5
 	.byte	0x2c
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF418
 	.byte	0x5
 	.byte	0x15
@@ -27691,525 +29230,525 @@ check_vpc_table:
 	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x232e
+	.4byte	0x2331
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x17
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF419
 	.byte	0x2
 	.2byte	0xac3
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x238f
-	.uleb128 0x44
+	.4byte	0x2392
+	.uleb128 0x43
 	.4byte	.LASF405
 	.byte	0x2
 	.2byte	0xac3
-	.4byte	0x301
-	.4byte	.LLST192
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST187
+	.uleb128 0x3e
 	.ascii	"ret\000"
 	.byte	0x2
 	.2byte	0xac5
-	.4byte	0x64
-	.uleb128 0x38
+	.4byte	0x62
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x239f
+	.4byte	0x23a2
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7303
-	.uleb128 0x31
-	.4byte	.LVL903
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL905
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	__func__.4558
+	.uleb128 0x23
 	.4byte	.LVL907
-	.4byte	0x23a4
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL908
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL909
+	.4byte	0x23a7
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x239f
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x23a2
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x13
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x238f
-	.uleb128 0x3c
+	.uleb128 0x3
+	.4byte	0x2392
+	.uleb128 0x3b
 	.4byte	.LASF420
 	.byte	0x2
 	.2byte	0xaae
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x23cf
-	.uleb128 0x3d
+	.4byte	0x23d2
+	.uleb128 0x3c
 	.4byte	.LASF405
 	.byte	0x2
 	.2byte	0xaae
-	.4byte	0x301
-	.uleb128 0x41
+	.4byte	0x2ff
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x23df
+	.4byte	0x23e2
 	.4byte	.LASF420
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x23df
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x23e2
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xf
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x23cf
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x23d2
+	.uleb128 0x3a
 	.4byte	.LASF421
 	.byte	0x2
 	.2byte	0xa8e
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2460
-	.uleb128 0x44
+	.4byte	0x2463
+	.uleb128 0x43
 	.4byte	.LASF422
 	.byte	0x2
 	.2byte	0xa8e
-	.4byte	0x12c0
-	.4byte	.LLST72
-	.uleb128 0x45
+	.4byte	0x12be
+	.4byte	.LLST68
+	.uleb128 0x44
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0xa90
-	.4byte	0x301
-	.4byte	.LLST73
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.4byte	.LLST69
+	.uleb128 0x1e
 	.4byte	.LASF423
 	.byte	0x2
 	.2byte	0xa91
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x38
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x21e8
+	.4byte	0x21eb
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7283
-	.uleb128 0x31
-	.4byte	.LVL317
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL318
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL319
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL322
-	.4byte	0x67f2
+	.4byte	__func__.4538
+	.uleb128 0x23
+	.4byte	.LVL306
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL307
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL308
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL311
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF424
 	.byte	0x2
 	.2byte	0xa76
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24f0
-	.uleb128 0x44
+	.4byte	0x24f3
+	.uleb128 0x43
 	.4byte	.LASF422
 	.byte	0x2
 	.2byte	0xa76
-	.4byte	0x12c0
-	.4byte	.LLST237
-	.uleb128 0x1f
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xa78
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x2500
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7276
-	.uleb128 0x31
-	.4byte	.LVL1189
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1190
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL1191
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1192
-	.4byte	0x2505
-	.uleb128 0x31
-	.4byte	.LVL1193
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1194
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1195
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1197
-	.4byte	0x4222
+	.4byte	0x12be
+	.4byte	.LLST226
+	.uleb128 0x1e
+	.4byte	.LASF405
+	.byte	0x2
+	.2byte	0xa78
+	.4byte	0x2ff
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x37
+	.4byte	.LASF362
+	.4byte	0x2503
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.4531
+	.uleb128 0x23
+	.4byte	.LVL1176
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1177
+	.4byte	0x41ea
+	.uleb128 0x23
+	.4byte	.LVL1178
+	.4byte	0x23a7
+	.uleb128 0x23
+	.4byte	.LVL1179
+	.4byte	0x2508
+	.uleb128 0x23
+	.4byte	.LVL1180
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1181
+	.4byte	0x3736
+	.uleb128 0x23
+	.4byte	.LVL1182
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1183
+	.4byte	0x420f
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2500
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x2503
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1c
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x24f0
-	.uleb128 0x4d
+	.uleb128 0x3
+	.4byte	0x24f3
+	.uleb128 0x4c
 	.4byte	.LASF425
 	.byte	0x2
 	.2byte	0xa12
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x265f
-	.uleb128 0x4e
+	.4byte	0x2662
+	.uleb128 0x4d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0xa12
-	.4byte	0x12c0
-	.4byte	.LLST184
-	.uleb128 0x45
+	.4byte	0x12be
+	.4byte	.LLST179
+	.uleb128 0x44
 	.4byte	.LASF426
 	.byte	0x2
 	.2byte	0xa14
-	.4byte	0x301
-	.4byte	.LLST185
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST180
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF357
 	.byte	0x2
 	.2byte	0xa15
-	.4byte	0x301
-	.4byte	.LLST186
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST181
+	.uleb128 0x3e
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF427
 	.byte	0x2
 	.2byte	0xa16
-	.4byte	0x64
-	.4byte	.LLST187
-	.uleb128 0x45
+	.4byte	0x62
+	.4byte	.LLST182
+	.uleb128 0x44
 	.4byte	.LASF428
 	.byte	0x2
 	.2byte	0xa17
-	.4byte	0x301
-	.4byte	.LLST188
-	.uleb128 0x40
+	.4byte	0x2ff
+	.4byte	.LLST183
+	.uleb128 0x3f
 	.4byte	.LASF429
 	.byte	0x2
 	.2byte	0xa18
-	.uleb128 0x38
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x266f
+	.4byte	0x2672
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7255
-	.uleb128 0x4f
-	.4byte	0x3419
-	.4byte	.LBB452
-	.4byte	.Ldebug_ranges0+0x1e8
+	.4byte	__func__.4510
+	.uleb128 0x4e
+	.4byte	0x3416
+	.4byte	.LBB451
+	.4byte	.Ldebug_ranges0+0x1c0
 	.byte	0x2
 	.2byte	0xa48
-	.4byte	0x25ce
+	.4byte	0x25d1
 	.uleb128 0x2e
-	.4byte	0x3432
+	.4byte	0x342f
 	.uleb128 0x2e
-	.4byte	0x3426
-	.uleb128 0x31
-	.4byte	.LVL875
-	.4byte	0x5c2e
+	.4byte	0x3423
+	.uleb128 0x23
+	.4byte	.LVL878
+	.4byte	0x5c1e
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL851
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL855
-	.4byte	0x4037
-	.uleb128 0x31
-	.4byte	.LVL856
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL857
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL858
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL859
-	.4byte	0x67f2
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL854
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL860
+	.4byte	0x4026
+	.uleb128 0x23
+	.4byte	.LVL861
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL862
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x2c58
+	.uleb128 0x23
 	.4byte	.LVL863
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x41ea
+	.uleb128 0x23
 	.4byte	.LVL864
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL865
-	.4byte	0x3419
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL867
-	.4byte	0x1954
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL868
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL869
-	.4byte	0x27b4
-	.uleb128 0x31
-	.4byte	.LVL870
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL872
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL877
-	.4byte	0x4b12
-	.uleb128 0x31
+	.4byte	0x3416
+	.uleb128 0x23
+	.4byte	.LVL871
+	.4byte	0x1954
+	.uleb128 0x23
+	.4byte	.LVL873
+	.4byte	0x27b7
+	.uleb128 0x23
+	.4byte	.LVL874
+	.4byte	0x493b
+	.uleb128 0x23
+	.4byte	.LVL875
+	.4byte	0x41ea
+	.uleb128 0x23
 	.4byte	.LVL880
-	.4byte	0x67f2
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL883
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x266f
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x2672
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x18
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x265f
-	.uleb128 0x3c
+	.uleb128 0x3
+	.4byte	0x2662
+	.uleb128 0x3b
 	.4byte	.LASF430
 	.byte	0x2
 	.2byte	0xa09
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x2692
-	.uleb128 0x3d
+	.4byte	0x2695
+	.uleb128 0x3c
 	.4byte	.LASF405
 	.byte	0x2
 	.2byte	0xa09
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF431
 	.byte	0x2
 	.2byte	0x9c0
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x273c
-	.uleb128 0x1f
+	.4byte	0x273f
+	.uleb128 0x1e
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x9c2
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF433
 	.byte	0x2
 	.2byte	0x9c3
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF434
 	.byte	0x2
 	.2byte	0x9c4
-	.4byte	0x301
-	.4byte	.LLST66
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST62
+	.uleb128 0x44
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x9c5
-	.4byte	0x1210
-	.4byte	.LLST67
-	.uleb128 0x45
+	.4byte	0x120e
+	.4byte	.LLST63
+	.uleb128 0x44
 	.4byte	.LASF436
 	.byte	0x2
 	.2byte	0x9c6
-	.4byte	0x301
-	.4byte	.LLST68
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST64
+	.uleb128 0x44
 	.4byte	.LASF437
 	.byte	0x2
 	.2byte	0x9c7
-	.4byte	0x301
-	.4byte	.LLST69
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST65
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x9c8
-	.4byte	0x30c
-	.uleb128 0x45
+	.4byte	0x30a
+	.uleb128 0x44
 	.4byte	.LASF114
 	.byte	0x2
 	.2byte	0x9c9
-	.4byte	0x301
-	.4byte	.LLST70
-	.uleb128 0x31
-	.4byte	.LVL294
-	.4byte	0x273c
-	.uleb128 0x31
-	.4byte	.LVL301
-	.4byte	0x278b
-	.uleb128 0x31
-	.4byte	.LVL307
-	.4byte	0x67f2
+	.4byte	0x2ff
+	.4byte	.LLST66
+	.uleb128 0x23
+	.4byte	.LVL283
+	.4byte	0x273f
+	.uleb128 0x23
+	.4byte	.LVL290
+	.4byte	0x278e
+	.uleb128 0x23
+	.4byte	.LVL296
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF438
 	.byte	0x2
 	.2byte	0x9ab
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x278b
-	.uleb128 0x44
+	.4byte	0x278e
+	.uleb128 0x43
 	.4byte	.LASF93
 	.byte	0x2
 	.2byte	0x9ab
-	.4byte	0x301
-	.4byte	.LLST61
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.4byte	.LLST57
+	.uleb128 0x1e
 	.4byte	.LASF439
 	.byte	0x2
 	.2byte	0x9ad
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF392
 	.byte	0x2
 	.2byte	0x9ae
-	.4byte	0x301
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x9af
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF440
 	.byte	0x2
 	.2byte	0x9a2
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27b4
-	.uleb128 0x1f
+	.4byte	0x27b7
+	.uleb128 0x1e
 	.4byte	.LASF434
 	.byte	0x2
 	.2byte	0x9a4
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF441
 	.byte	0x2
 	.2byte	0x992
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2815
-	.uleb128 0x44
+	.4byte	0x2818
+	.uleb128 0x43
 	.4byte	.LASF405
 	.byte	0x2
 	.2byte	0x992
-	.4byte	0x301
-	.4byte	.LLST60
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST56
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x994
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x994
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF165
 	.byte	0x2
 	.2byte	0x995
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL200
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL201
-	.4byte	0x4ab7
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL192
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL193
+	.4byte	0x4a9e
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF442
 	.byte	0x2
 	.2byte	0x933
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x283f
-	.uleb128 0x3f
+	.4byte	0x2842
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x935
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x28
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF396
 	.byte	0x2
 	.2byte	0x95a
-	.4byte	0x12c0
+	.4byte	0x12be
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF443
 	.byte	0x2
 	.2byte	0x914
@@ -28217,44 +29756,44 @@ check_vpc_table:
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x28aa
-	.uleb128 0x51
+	.4byte	0x28ad
+	.uleb128 0x50
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x916
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x51
+	.uleb128 0x50
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x917
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x3e
+	.sleb128 -36
+	.uleb128 0x3d
 	.4byte	.LASF444
 	.byte	0x2
 	.2byte	0x918
-	.4byte	0x1d3f
-	.uleb128 0x31
-	.4byte	.LVL651
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL653
-	.4byte	0x3939
-	.uleb128 0x31
+	.4byte	0x1d42
+	.uleb128 0x23
 	.4byte	.LVL654
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL655
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL656
-	.4byte	0x67f2
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL657
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL658
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL659
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL660
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF445
 	.byte	0x2
 	.2byte	0x8e0
@@ -28262,118 +29801,118 @@ check_vpc_table:
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29c3
-	.uleb128 0x3f
+	.4byte	0x29c6
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8e2
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x8e3
-	.4byte	0x30c
-	.4byte	.LLST149
-	.uleb128 0x1f
+	.4byte	0x30a
+	.4byte	.LLST144
+	.uleb128 0x1e
 	.4byte	.LASF446
 	.byte	0x2
 	.2byte	0x8e4
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3f
+	.sleb128 -48
+	.uleb128 0x3e
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x8e5
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF447
 	.byte	0x2
 	.2byte	0x8e6
-	.4byte	0x301
-	.4byte	.LLST150
-	.uleb128 0x38
+	.4byte	0x2ff
+	.4byte	.LLST145
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x29d3
+	.4byte	0x29d6
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7170
-	.uleb128 0x53
-	.4byte	.LBB413
-	.4byte	.LBE413-.LBB413
-	.4byte	0x293b
-	.uleb128 0x45
+	.4byte	__func__.4425
+	.uleb128 0x52
+	.4byte	.LBB412
+	.4byte	.LBE412-.LBB412
+	.4byte	0x293e
+	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x2
 	.2byte	0x903
-	.4byte	0x301
-	.4byte	.LLST151
-	.uleb128 0x31
-	.4byte	.LVL671
-	.4byte	0x67f2
+	.4byte	0x2ff
+	.4byte	.LLST146
+	.uleb128 0x23
+	.4byte	.LVL673
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.4byte	0x17c6
-	.4byte	.LBB410
-	.4byte	.LBE410-.LBB410
+	.4byte	.LBB409
+	.4byte	.LBE409-.LBB409
 	.byte	0x2
 	.2byte	0x8e9
-	.4byte	0x2995
+	.4byte	0x2998
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
+	.uleb128 0x32
+	.4byte	.LBB410
+	.4byte	.LBE410-.LBB410
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB412
-	.4byte	.LBE412-.LBB412
+	.uleb128 0x32
+	.4byte	.LBB411
+	.4byte	.LBE411-.LBB411
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL667
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL669
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL666
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL672
-	.4byte	0x67f2
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL668
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL674
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL675
-	.4byte	0x451a
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL676
+	.4byte	0x392e
+	.uleb128 0x23
 	.4byte	.LVL677
-	.4byte	0x67f2
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL679
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x29d3
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x29d6
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xd
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x29c3
-	.uleb128 0x50
+	.uleb128 0x3
+	.4byte	0x29c6
+	.uleb128 0x4f
 	.4byte	.LASF448
 	.byte	0x2
 	.2byte	0x8c1
@@ -28381,73 +29920,73 @@ check_vpc_table:
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2a7f
-	.uleb128 0x52
+	.4byte	0x2a82
+	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8c3
-	.4byte	0x301
-	.4byte	.LLST235
-	.uleb128 0x52
+	.4byte	0x2ff
+	.4byte	.LLST224
+	.uleb128 0x51
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x8c4
-	.4byte	0x30c
-	.4byte	.LLST236
-	.uleb128 0x1f
+	.4byte	0x30a
+	.4byte	.LLST225
+	.uleb128 0x1e
 	.4byte	.LASF446
 	.byte	0x2
 	.2byte	0x8c5
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3f
+	.sleb128 -48
+	.uleb128 0x3e
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x8c6
-	.4byte	0x301
-	.uleb128 0x38
+	.4byte	0x2ff
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x2a8f
+	.4byte	0x2a92
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7154
-	.uleb128 0x31
-	.4byte	.LVL1175
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1176
+	.4byte	__func__.4409
+	.uleb128 0x23
+	.4byte	.LVL1162
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1163
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1180
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1181
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1183
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1184
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1185
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1186
-	.4byte	0x3598
+	.uleb128 0x23
+	.4byte	.LVL1167
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1168
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1170
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1171
+	.4byte	0x23a7
+	.uleb128 0x23
+	.4byte	.LVL1172
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1173
+	.4byte	0x3593
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2a8f
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x2a92
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x14
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x2a7f
-	.uleb128 0x50
+	.uleb128 0x3
+	.4byte	0x2a82
+	.uleb128 0x4f
 	.4byte	.LASF449
 	.byte	0x2
 	.2byte	0x89c
@@ -28455,47 +29994,47 @@ check_vpc_table:
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b09
-	.uleb128 0x44
+	.4byte	0x2b0c
+	.uleb128 0x43
 	.4byte	.LASF396
 	.byte	0x2
 	.2byte	0x89c
-	.4byte	0x12c0
-	.4byte	.LLST213
-	.uleb128 0x1f
+	.4byte	0x12be
+	.4byte	.LLST206
+	.uleb128 0x1e
 	.4byte	.LASF450
 	.byte	0x2
 	.2byte	0x89e
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3e
+	.sleb128 -56
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x89f
-	.4byte	0x1d3f
-	.uleb128 0x3e
+	.4byte	0x1d42
+	.uleb128 0x3d
 	.4byte	.LASF451
 	.byte	0x2
 	.2byte	0x8a0
-	.4byte	0x64
-	.uleb128 0x3e
+	.4byte	0x62
+	.uleb128 0x3d
 	.4byte	.LASF174
 	.byte	0x2
 	.2byte	0x8a1
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1054
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1055
+	.4byte	0x30a
+	.uleb128 0x23
+	.4byte	.LVL1048
+	.4byte	0x23e7
+	.uleb128 0x23
+	.4byte	.LVL1049
 	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1056
-	.4byte	0x232e
+	.uleb128 0x23
+	.4byte	.LVL1050
+	.4byte	0x2331
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x54
 	.4byte	.LASF452
 	.byte	0x2
 	.2byte	0x882
@@ -28503,21 +30042,21 @@ check_vpc_table:
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b83
-	.uleb128 0x54
+	.4byte	0x2b86
+	.uleb128 0x53
 	.4byte	0x17c6
 	.4byte	.LBB510
 	.4byte	.LBE510-.LBB510
 	.byte	0x2
 	.2byte	0x886
-	.4byte	0x2b79
+	.4byte	0x2b7c
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.LBB511
 	.4byte	.LBE511-.LBB511
 	.uleb128 0x2e
@@ -28526,518 +30065,516 @@ check_vpc_table:
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.LBB512
 	.4byte	.LBE512-.LBB512
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1157
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL1145
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1156
-	.4byte	0x378a
+	.uleb128 0x23
+	.4byte	.LVL1144
+	.4byte	0x3783
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.4byte	.LASF454
 	.byte	0x2
 	.2byte	0x86e
 	.byte	0x1
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF455
 	.byte	0x2
 	.2byte	0x843
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB235
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c40
-	.uleb128 0x45
+	.4byte	0x2c43
+	.uleb128 0x44
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x845
-	.4byte	0x301
-	.4byte	.LLST165
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST160
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF165
 	.byte	0x2
 	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF456
 	.byte	0x2
 	.2byte	0x846
-	.4byte	0x301
-	.4byte	.LLST166
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST161
+	.uleb128 0x44
 	.4byte	.LASF457
 	.byte	0x2
 	.2byte	0x846
-	.4byte	0x301
-	.4byte	.LLST167
-	.uleb128 0x38
+	.4byte	0x2ff
+	.4byte	.LLST162
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x2c50
+	.4byte	0x2c53
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7129
-	.uleb128 0x31
-	.4byte	.LVL770
+	.4byte	__func__.4384
+	.uleb128 0x23
+	.4byte	.LVL781
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL772
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL773
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL777
-	.4byte	0x4222
-	.uleb128 0x31
-	.4byte	.LVL780
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL782
-	.4byte	0x67f2
+	.uleb128 0x23
+	.4byte	.LVL783
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL784
+	.4byte	0x4a9e
+	.uleb128 0x23
+	.4byte	.LVL788
+	.4byte	0x420f
+	.uleb128 0x23
+	.4byte	.LVL791
+	.4byte	0x41ea
+	.uleb128 0x23
+	.4byte	.LVL793
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2c50
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x2c53
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x11
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x2c40
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x2c43
+	.uleb128 0x3a
 	.4byte	.LASF458
 	.byte	0x2
 	.2byte	0x82d
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB234
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cc0
-	.uleb128 0x4e
+	.4byte	0x2cc3
+	.uleb128 0x4d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0x82d
-	.4byte	0x12c0
-	.4byte	.LLST59
-	.uleb128 0x3e
+	.4byte	0x12be
+	.4byte	.LLST55
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x82f
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x82f
-	.4byte	0x301
-	.uleb128 0x38
+	.4byte	0x2ff
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x23df
+	.4byte	0x23e2
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7108
-	.uleb128 0x31
-	.4byte	.LVL193
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL195
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL196
-	.4byte	0x4ab7
+	.4byte	__func__.4363
+	.uleb128 0x23
+	.4byte	.LVL186
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL187
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL188
+	.4byte	0x4a9e
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF459
 	.byte	0x2
 	.2byte	0x820
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1283
-	.4byte	0x2d37
-	.uleb128 0x31
-	.4byte	.LVL1284
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1285
-	.4byte	0x2d37
-	.uleb128 0x31
-	.4byte	.LVL1286
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1287
-	.4byte	0x1f6f
-	.uleb128 0x31
-	.4byte	.LVL1288
-	.4byte	0x232e
+	.4byte	0x2d14
+	.uleb128 0x23
+	.4byte	.LVL1268
+	.4byte	0x2d3a
+	.uleb128 0x23
+	.4byte	.LVL1269
+	.4byte	0x2d14
+	.uleb128 0x23
+	.4byte	.LVL1270
+	.4byte	0x2d3a
+	.uleb128 0x23
+	.4byte	.LVL1271
+	.4byte	0x2d14
+	.uleb128 0x23
+	.4byte	.LVL1272
+	.4byte	0x1f72
+	.uleb128 0x23
+	.4byte	.LVL1273
+	.4byte	0x2331
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x55
 	.4byte	.LASF495
 	.byte	0x2
 	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x2d37
-	.uleb128 0x3d
+	.4byte	0x2d3a
+	.uleb128 0x3c
 	.4byte	.LASF422
 	.byte	0x2
 	.2byte	0x80d
-	.4byte	0x12c0
-	.uleb128 0x3e
+	.4byte	0x12be
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x80f
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF460
 	.byte	0x2
 	.2byte	0x6a8
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB231
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3082
-	.uleb128 0x44
+	.4byte	0x307d
+	.uleb128 0x43
 	.4byte	.LASF396
 	.byte	0x2
 	.2byte	0x6a8
-	.4byte	0x12c0
-	.4byte	.LLST197
-	.uleb128 0x45
+	.4byte	0x12be
+	.4byte	.LLST191
+	.uleb128 0x44
 	.4byte	.LASF461
 	.byte	0x2
 	.2byte	0x6aa
-	.4byte	0x301
-	.4byte	.LLST198
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST192
+	.uleb128 0x44
 	.4byte	.LASF462
 	.byte	0x2
 	.2byte	0x6aa
-	.4byte	0x301
-	.4byte	.LLST199
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST193
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x6ab
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF172
 	.byte	0x2
 	.2byte	0x6ab
-	.4byte	0x301
-	.4byte	.LLST200
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF170
 	.byte	0x2
 	.2byte	0x6ab
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF463
 	.byte	0x2
 	.2byte	0x6ac
-	.4byte	0x301
-	.4byte	.LLST201
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST194
+	.uleb128 0x44
 	.4byte	.LASF464
 	.byte	0x2
 	.2byte	0x6ac
-	.4byte	0x301
-	.4byte	.LLST202
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST195
+	.uleb128 0x3d
 	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x6ad
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF465
 	.byte	0x2
 	.2byte	0x6ae
-	.4byte	0x64
-	.4byte	.LLST203
-	.uleb128 0x3e
+	.4byte	0x62
+	.4byte	.LLST196
+	.uleb128 0x3d
 	.4byte	.LASF466
 	.byte	0x2
 	.2byte	0x6ae
-	.4byte	0x64
-	.uleb128 0x3e
+	.4byte	0x62
+	.uleb128 0x3d
 	.4byte	.LASF357
 	.byte	0x2
 	.2byte	0x6af
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0x6af
-	.4byte	0x301
-	.4byte	.LLST204
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST197
+	.uleb128 0x3e
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x6af
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST205
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST198
+	.uleb128 0x44
 	.4byte	.LASF446
 	.byte	0x2
 	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST206
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST199
+	.uleb128 0x44
 	.4byte	.LASF406
 	.byte	0x2
 	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST207
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST200
+	.uleb128 0x44
 	.4byte	.LASF398
 	.byte	0x2
 	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST208
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST201
+	.uleb128 0x44
 	.4byte	.LASF412
 	.byte	0x2
 	.2byte	0x6b1
-	.4byte	0x301
-	.4byte	.LLST209
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST202
+	.uleb128 0x3d
 	.4byte	.LASF467
 	.byte	0x2
 	.2byte	0x6b1
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF468
 	.byte	0x2
 	.2byte	0x6b2
-	.4byte	0x30c
-	.4byte	.LLST210
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST203
+	.uleb128 0x3d
 	.4byte	.LASF469
 	.byte	0x2
 	.2byte	0x6b3
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x6b4
-	.4byte	0x1d3f
-	.uleb128 0x3e
+	.4byte	0x1d42
+	.uleb128 0x3d
 	.4byte	.LASF470
 	.byte	0x2
 	.2byte	0x6b5
-	.4byte	0x30c
-	.uleb128 0x38
+	.4byte	0x30a
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x3092
+	.4byte	0x308d
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7051
-	.uleb128 0x48
+	.4byte	__func__.4306
+	.uleb128 0x47
 	.4byte	.LASF472
 	.byte	0x2
 	.2byte	0x744
-	.4byte	.L1140
-	.uleb128 0x48
+	.4byte	.L1126
+	.uleb128 0x47
 	.4byte	.LASF402
 	.byte	0x2
 	.2byte	0x74c
-	.4byte	.L1152
-	.uleb128 0x48
+	.4byte	.L1138
+	.uleb128 0x47
 	.4byte	.LASF473
 	.byte	0x2
 	.2byte	0x7ff
-	.4byte	.L1160
-	.uleb128 0x40
+	.4byte	.L1144
+	.uleb128 0x3f
 	.4byte	.LASF474
 	.byte	0x2
 	.2byte	0x809
-	.uleb128 0x53
-	.4byte	.LBB473
-	.4byte	.LBE473-.LBB473
-	.4byte	0x2f11
-	.uleb128 0x3e
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x208
+	.4byte	0x2f0c
+	.uleb128 0x3d
 	.4byte	.LASF475
 	.byte	0x2
 	.2byte	0x71c
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF476
 	.byte	0x2
 	.2byte	0x71d
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL971
-	.4byte	0x1af8
+	.4byte	0x30a
+	.uleb128 0x23
+	.4byte	.LVL966
+	.4byte	0x1af9
 	.byte	0
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x230
-	.4byte	0x2f83
-	.uleb128 0x45
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x220
+	.4byte	0x2f7e
+	.uleb128 0x44
 	.4byte	.LASF477
 	.byte	0x2
 	.2byte	0x777
-	.4byte	0x30c
-	.4byte	.LLST211
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST204
+	.uleb128 0x44
 	.4byte	.LASF478
 	.byte	0x2
 	.2byte	0x778
-	.4byte	0x30c
-	.4byte	.LLST212
-	.uleb128 0x31
+	.4byte	0x30a
+	.4byte	.LLST205
+	.uleb128 0x23
+	.4byte	.LVL1004
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1007
+	.4byte	0x2331
+	.uleb128 0x23
 	.4byte	.LVL1013
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1016
-	.4byte	0x232e
-	.uleb128 0x31
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1015
+	.4byte	0x44c4
+	.uleb128 0x23
+	.4byte	.LVL1019
+	.4byte	0x3092
+	.uleb128 0x23
 	.4byte	.LVL1021
-	.4byte	0x3939
-	.uleb128 0x31
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL1023
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1025
-	.4byte	0x3097
-	.uleb128 0x31
-	.4byte	.LVL1028
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1030
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1031
-	.4byte	0x44d7
+	.4byte	0x44c4
+	.uleb128 0x23
+	.4byte	.LVL1024
+	.4byte	0x44c4
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x52
 	.4byte	.LBB477
 	.4byte	.LBE477-.LBB477
-	.4byte	0x2fc4
-	.uleb128 0x3e
+	.4byte	0x2fbf
+	.uleb128 0x3d
 	.4byte	.LASF479
 	.byte	0x2
 	.2byte	0x7b6
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF478
 	.byte	0x2
 	.2byte	0x7b7
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1036
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1037
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1038
-	.4byte	0x3939
+	.4byte	0x30a
+	.uleb128 0x23
+	.4byte	.LVL1029
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1030
+	.4byte	0x44c4
+	.uleb128 0x23
+	.4byte	.LVL1031
+	.4byte	0x392e
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL932
-	.4byte	0x443f
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL934
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL939
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL947
-	.4byte	0x314e
-	.uleb128 0x31
-	.4byte	.LVL952
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL954
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL958
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL974
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL979
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL988
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL998
-	.4byte	0x232e
-	.uleb128 0x31
+	.4byte	0x442c
+	.uleb128 0x23
+	.4byte	.LVL936
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL941
+	.4byte	0x453b
+	.uleb128 0x23
+	.4byte	.LVL955
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL957
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL961
+	.4byte	0x44c4
+	.uleb128 0x23
+	.4byte	.LVL971
+	.4byte	0x36a4
+	.uleb128 0x23
+	.4byte	.LVL975
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL982
+	.4byte	0x453b
+	.uleb128 0x23
+	.4byte	.LVL992
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL996
+	.4byte	0x44c4
+	.uleb128 0x23
+	.4byte	.LVL1000
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1002
+	.4byte	0x392e
+	.uleb128 0x23
 	.4byte	.LVL1003
-	.4byte	0x44d7
-	.uleb128 0x31
+	.4byte	0x44c4
+	.uleb128 0x23
 	.4byte	.LVL1008
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1011
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1012
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1017
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1019
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1034
-	.4byte	0x3939
-	.uleb128 0x31
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1010
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1027
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1028
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1033
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1035
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1040
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1043
-	.4byte	0x232e
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL1044
+	.4byte	0x3149
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3092
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x308d
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x15
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x3082
-	.uleb128 0x50
+	.uleb128 0x3
+	.4byte	0x307d
+	.uleb128 0x4f
 	.4byte	.LASF480
 	.byte	0x2
 	.2byte	0x68c
@@ -29045,69 +30582,69 @@ check_vpc_table:
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x314e
-	.uleb128 0x4e
+	.4byte	0x3149
+	.uleb128 0x4d
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x68c
-	.4byte	0x30c
-	.4byte	.LLST142
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST138
+	.uleb128 0x43
 	.4byte	.LASF446
 	.byte	0x2
 	.2byte	0x68c
-	.4byte	0x30c
-	.4byte	.LLST143
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST139
+	.uleb128 0x44
 	.4byte	.LASF412
 	.byte	0x2
 	.2byte	0x68e
-	.4byte	0x301
-	.4byte	.LLST144
-	.uleb128 0x38
+	.4byte	0x2ff
+	.4byte	.LLST140
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x23df
+	.4byte	0x23e2
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.7017
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x198
-	.4byte	0x313b
-	.uleb128 0x3f
+	.4byte	__func__.4272
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x170
+	.4byte	0x3136
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x692
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF392
 	.byte	0x2
 	.2byte	0x693
-	.4byte	0x301
-	.4byte	.LLST145
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST141
+	.uleb128 0x44
 	.4byte	.LASF93
 	.byte	0x2
 	.2byte	0x694
-	.4byte	0x301
-	.4byte	.LLST146
-	.uleb128 0x31
-	.4byte	.LVL641
-	.4byte	0x4097
-	.uleb128 0x31
-	.4byte	.LVL642
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x2ff
+	.4byte	.LLST142
+	.uleb128 0x23
 	.4byte	.LVL643
-	.4byte	0x41fd
+	.4byte	0x4086
+	.uleb128 0x23
+	.4byte	.LVL644
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL645
+	.4byte	0x41ea
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL636
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL648
-	.4byte	0x3939
+	.uleb128 0x23
+	.4byte	.LVL637
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL652
+	.4byte	0x392e
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF481
 	.byte	0x2
 	.2byte	0x678
@@ -29115,50 +30652,50 @@ check_vpc_table:
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x319f
-	.uleb128 0x57
+	.4byte	0x319a
+	.uleb128 0x56
 	.4byte	.LASF396
 	.byte	0x2
 	.2byte	0x678
-	.4byte	0x12c0
+	.4byte	0x12be
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x44
+	.uleb128 0x43
 	.4byte	.LASF170
 	.byte	0x2
 	.2byte	0x678
-	.4byte	0x301
-	.4byte	.LLST57
-	.uleb128 0x44
+	.4byte	0x2ff
+	.4byte	.LLST53
+	.uleb128 0x43
 	.4byte	.LASF172
 	.byte	0x2
 	.2byte	0x678
-	.4byte	0x301
-	.4byte	.LLST58
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST54
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x67a
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF482
 	.byte	0x2
 	.2byte	0x66f
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31cc
-	.uleb128 0x31
-	.4byte	.LVL759
-	.4byte	0x31cc
-	.uleb128 0x31
-	.4byte	.LVL760
-	.4byte	0x3225
+	.4byte	0x31c7
+	.uleb128 0x23
+	.4byte	.LVL770
+	.4byte	0x31c7
+	.uleb128 0x23
+	.4byte	.LVL771
+	.4byte	0x3220
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF483
 	.byte	0x2
 	.2byte	0x658
@@ -29166,322 +30703,322 @@ check_vpc_table:
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3201
-	.uleb128 0x3e
+	.4byte	0x31fc
+	.uleb128 0x3d
 	.4byte	.LASF119
 	.byte	0x2
 	.2byte	0x65a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL757
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL768
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL758
+	.uleb128 0x23
+	.4byte	.LVL769
 	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF484
 	.byte	0x2
 	.2byte	0x648
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB226
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3225
-	.uleb128 0x31
-	.4byte	.LVL756
-	.4byte	0x3225
+	.4byte	0x3220
+	.uleb128 0x23
+	.4byte	.LVL767
+	.4byte	0x3220
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF485
 	.byte	0x2
 	.2byte	0x5ea
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB225
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3333
-	.uleb128 0x44
+	.4byte	0x3330
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x5ea
-	.4byte	0x3333
-	.4byte	.LLST158
-	.uleb128 0x45
+	.4byte	0x3330
+	.4byte	.LLST152
+	.uleb128 0x44
 	.4byte	.LASF487
 	.byte	0x2
 	.2byte	0x5ec
-	.4byte	0x322
-	.4byte	.LLST159
-	.uleb128 0x3e
+	.4byte	0x320
+	.4byte	.LLST153
+	.uleb128 0x3d
 	.4byte	.LASF85
 	.byte	0x2
 	.2byte	0x5ec
-	.4byte	0x322
-	.uleb128 0x45
+	.4byte	0x320
+	.uleb128 0x44
 	.4byte	.LASF488
 	.byte	0x2
 	.2byte	0x5ed
-	.4byte	0x322
-	.4byte	.LLST160
-	.uleb128 0x3e
+	.4byte	0x320
+	.4byte	.LLST154
+	.uleb128 0x3d
 	.4byte	.LASF119
 	.byte	0x2
 	.2byte	0x5ee
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF489
 	.byte	0x2
 	.2byte	0x5ef
-	.4byte	0x539
-	.4byte	.LLST161
-	.uleb128 0x45
+	.4byte	0x537
+	.4byte	.LLST155
+	.uleb128 0x44
 	.4byte	.LASF98
 	.byte	0x2
 	.2byte	0x5f0
-	.4byte	0x630
-	.4byte	.LLST162
-	.uleb128 0x45
+	.4byte	0x62e
+	.4byte	.LLST156
+	.uleb128 0x44
 	.4byte	.LASF99
 	.byte	0x2
 	.2byte	0x5f1
-	.4byte	0x539
-	.4byte	.LLST163
-	.uleb128 0x1f
+	.4byte	0x537
+	.4byte	.LLST157
+	.uleb128 0x44
 	.4byte	.LASF95
 	.byte	0x2
 	.2byte	0x5f2
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST158
+	.uleb128 0x44
 	.4byte	.LASF490
 	.byte	0x2
 	.2byte	0x5f3
-	.4byte	0x301
-	.4byte	.LLST164
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST159
+	.uleb128 0x3d
 	.4byte	.LASF491
 	.byte	0x2
 	.2byte	0x5f4
-	.4byte	0x3339
-	.uleb128 0x31
-	.4byte	.LVL721
-	.4byte	0x17c6
-	.uleb128 0x31
+	.4byte	0x3336
+	.uleb128 0x23
 	.4byte	.LVL729
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL736
-	.4byte	0x3ddf
-	.uleb128 0x31
-	.4byte	.LVL737
-	.4byte	0x3d87
-	.uleb128 0x31
-	.4byte	.LVL738
-	.4byte	0x3cbc
-	.uleb128 0x31
-	.4byte	.LVL739
-	.4byte	0x3cbc
-	.uleb128 0x31
+	.4byte	0x17c6
+	.uleb128 0x23
+	.4byte	.LVL734
+	.4byte	0x442c
+	.uleb128 0x23
 	.4byte	.LVL741
-	.4byte	0x1af8
-	.uleb128 0x31
+	.4byte	0x3dce
+	.uleb128 0x23
+	.4byte	.LVL742
+	.4byte	0x3d76
+	.uleb128 0x23
+	.4byte	.LVL743
+	.4byte	0x3ca9
+	.uleb128 0x23
+	.4byte	.LVL744
+	.4byte	0x3ca9
+	.uleb128 0x23
 	.4byte	.LVL747
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL750
-	.4byte	0x1af8
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL754
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL757
+	.4byte	0x1af9
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x587
-	.uleb128 0x8
+	.4byte	0x585
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x7b8
-	.uleb128 0x4d
+	.4byte	0x7b6
+	.uleb128 0x4c
 	.4byte	.LASF492
 	.byte	0x2
 	.2byte	0x580
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x33ee
-	.uleb128 0x45
+	.4byte	0x33eb
+	.uleb128 0x44
 	.4byte	.LASF488
 	.byte	0x2
 	.2byte	0x582
-	.4byte	0x322
-	.4byte	.LLST297
-	.uleb128 0x38
+	.4byte	0x320
+	.4byte	.LLST286
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6954
-	.uleb128 0x31
-	.4byte	.LVL1562
+	.4byte	__func__.4209
+	.uleb128 0x23
+	.4byte	.LVL1551
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1565
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL1567
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1568
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1569
+	.uleb128 0x23
+	.4byte	.LVL1552
+	.4byte	0x442c
+	.uleb128 0x23
+	.4byte	.LVL1554
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1555
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1557
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1570
+	.uleb128 0x23
+	.4byte	.LVL1558
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1571
+	.uleb128 0x23
+	.4byte	.LVL1559
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1574
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1575
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1576
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1577
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1578
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1580
-	.4byte	0x1af8
+	.uleb128 0x23
+	.4byte	.LVL1561
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1562
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1563
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1564
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1565
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1567
+	.4byte	0x1af9
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF493
 	.byte	0x2
 	.2byte	0x57b
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3419
-	.uleb128 0x44
+	.4byte	0x3416
+	.uleb128 0x43
 	.4byte	.LASF494
 	.byte	0x2
 	.2byte	0x57b
-	.4byte	0x301
-	.4byte	.LLST56
+	.4byte	0x2ff
+	.4byte	.LLST52
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x55
 	.4byte	.LASF496
 	.byte	0x2
 	.2byte	0x573
 	.byte	0x1
-	.4byte	0x343f
-	.uleb128 0x3d
+	.4byte	0x343c
+	.uleb128 0x3c
 	.4byte	.LASF494
 	.byte	0x2
 	.2byte	0x573
-	.4byte	0x301
-	.uleb128 0x3d
+	.4byte	0x2ff
+	.uleb128 0x3c
 	.4byte	.LASF372
 	.byte	0x2
 	.2byte	0x573
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.4byte	.LASF498
 	.byte	0x2
 	.2byte	0x566
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF499
 	.byte	0x2
 	.2byte	0x477
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3598
-	.uleb128 0x3e
+	.4byte	0x3593
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x479
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF500
 	.byte	0x2
 	.2byte	0x479
-	.4byte	0x301
-	.4byte	.LLST155
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST150
+	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x2
 	.2byte	0x47a
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x1e
 	.4byte	.LASF357
 	.byte	0x2
 	.2byte	0x47a
-	.4byte	0x301
-	.4byte	.LLST156
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x47b
-	.4byte	0x322
-	.uleb128 0x3f
+	.4byte	0x320
+	.uleb128 0x3e
 	.ascii	"j\000"
 	.byte	0x2
 	.2byte	0x47b
-	.4byte	0x322
-	.uleb128 0x45
+	.4byte	0x320
+	.uleb128 0x44
 	.4byte	.LASF501
 	.byte	0x2
 	.2byte	0x47c
-	.4byte	0x3339
-	.4byte	.LLST157
-	.uleb128 0x38
+	.4byte	0x3336
+	.4byte	.LLST151
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x29d3
+	.4byte	0x29d6
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6897
-	.uleb128 0x54
+	.4byte	__func__.4152
+	.uleb128 0x53
 	.4byte	0x17c6
-	.4byte	.LBB419
-	.4byte	.LBE419-.LBB419
+	.4byte	.LBB418
+	.4byte	.LBE418-.LBB418
 	.byte	0x2
 	.2byte	0x484
-	.4byte	0x3522
+	.4byte	0x351d
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB420
-	.4byte	.LBE420-.LBB420
+	.uleb128 0x32
+	.4byte	.LBB419
+	.4byte	.LBE419-.LBB419
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB421
-	.4byte	.LBE421-.LBB421
+	.uleb128 0x32
+	.4byte	.LBB420
+	.4byte	.LBE420-.LBB420
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
@@ -29489,155 +31026,156 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL688
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL689
-	.4byte	0x17c6
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL690
 	.4byte	0x17c6
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL691
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL695
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL696
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL703
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL704
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL705
-	.4byte	0x436d
-	.uleb128 0x31
-	.4byte	.LVL706
-	.4byte	0x67f2
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL692
+	.4byte	0x17c6
+	.uleb128 0x23
+	.4byte	.LVL693
+	.4byte	0x17c6
+	.uleb128 0x23
+	.4byte	.LVL700
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL701
+	.4byte	0x4a9e
+	.uleb128 0x23
 	.4byte	.LVL707
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL708
-	.4byte	0x436d
-	.uleb128 0x31
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL709
-	.4byte	0x67f2
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL710
+	.4byte	0x435a
+	.uleb128 0x23
+	.4byte	.LVL711
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL712
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL713
+	.4byte	0x435a
+	.uleb128 0x23
+	.4byte	.LVL716
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF502
 	.byte	0x2
 	.2byte	0x41c
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB219
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3659
-	.uleb128 0x45
+	.4byte	0x3652
+	.uleb128 0x1e
 	.4byte	.LASF86
 	.byte	0x2
 	.2byte	0x41e
-	.4byte	0x301
-	.4byte	.LLST233
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x3d
 	.4byte	.LASF503
 	.byte	0x2
 	.2byte	0x41f
-	.4byte	0x3659
-	.uleb128 0x45
+	.4byte	0x3652
+	.uleb128 0x44
 	.4byte	.LASF504
 	.byte	0x2
 	.2byte	0x420
-	.4byte	0x301
-	.4byte	.LLST234
-	.uleb128 0x40
+	.4byte	0x2ff
+	.4byte	.LLST223
+	.uleb128 0x3f
 	.4byte	.LASF505
 	.byte	0x2
 	.2byte	0x44d
-	.uleb128 0x38
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6875
-	.uleb128 0x31
-	.4byte	.LVL1160
+	.4byte	__func__.4130
+	.uleb128 0x23
+	.4byte	.LVL1147
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1161
+	.uleb128 0x23
+	.4byte	.LVL1149
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1162
+	.uleb128 0x23
+	.4byte	.LVL1150
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1163
+	.uleb128 0x23
+	.4byte	.LVL1151
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1164
-	.4byte	0x3719
-	.uleb128 0x31
-	.4byte	.LVL1165
+	.uleb128 0x23
+	.4byte	.LVL1152
+	.4byte	0x3712
+	.uleb128 0x23
+	.4byte	.LVL1153
 	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1166
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL1167
+	.uleb128 0x23
+	.4byte	.LVL1154
+	.4byte	0x4234
+	.uleb128 0x23
+	.4byte	.LVL1155
 	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1168
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1171
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1172
-	.4byte	0x436d
+	.uleb128 0x23
+	.4byte	.LVL1156
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1159
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1160
+	.4byte	0x435a
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x810
-	.uleb128 0x56
+	.4byte	0x80e
+	.uleb128 0x55
 	.4byte	.LASF506
 	.byte	0x2
 	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x36ab
+	.4byte	0x36a4
 	.uleb128 0x28
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x3e8
-	.4byte	0x30c
-	.uleb128 0x3f
+	.4byte	0x30a
+	.uleb128 0x3e
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x3e9
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF507
 	.byte	0x2
 	.2byte	0x3ea
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF450
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x32d
-	.uleb128 0x3e
+	.4byte	0x32b
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x3ec
-	.4byte	0x1d3f
+	.4byte	0x1d42
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF508
 	.byte	0x2
 	.2byte	0x3b1
@@ -29645,488 +31183,488 @@ check_vpc_table:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3719
-	.uleb128 0x44
+	.4byte	0x3712
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x3b1
-	.4byte	0x3333
-	.4byte	.LLST152
-	.uleb128 0x52
+	.4byte	0x3330
+	.4byte	.LLST147
+	.uleb128 0x51
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x3b3
-	.4byte	0x30c
-	.4byte	.LLST153
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST148
+	.uleb128 0x3d
 	.4byte	.LASF105
 	.byte	0x2
 	.2byte	0x3b4
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF489
 	.byte	0x2
 	.2byte	0x3b5
-	.4byte	0x539
-	.4byte	.LLST154
-	.uleb128 0x31
-	.4byte	.LVL682
-	.4byte	0x1af8
-	.uleb128 0x24
-	.4byte	.LVL684
-	.4byte	0x3ad6
-	.uleb128 0x31
+	.4byte	0x537
+	.4byte	.LLST149
+	.uleb128 0x23
+	.4byte	.LVL685
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL686
+	.4byte	0x3ac5
+	.uleb128 0x23
+	.4byte	.LVL689
 	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x55
 	.4byte	.LASF509
 	.byte	0x2
 	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x373d
-	.uleb128 0x3d
+	.4byte	0x3736
+	.uleb128 0x3c
 	.4byte	.LASF183
 	.byte	0x2
 	.2byte	0x3a2
-	.4byte	0x30c
-	.uleb128 0x3f
+	.4byte	0x30a
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x3a4
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF510
 	.byte	0x2
 	.2byte	0x38d
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x378a
-	.uleb128 0x44
+	.4byte	0x3783
+	.uleb128 0x43
 	.4byte	.LASF511
 	.byte	0x2
 	.2byte	0x38d
-	.4byte	0x30c
-	.4byte	.LLST225
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST215
+	.uleb128 0x44
 	.4byte	.LASF512
 	.byte	0x2
 	.2byte	0x38f
-	.4byte	0x30c
-	.4byte	.LLST226
-	.uleb128 0x31
-	.4byte	.LVL1135
-	.4byte	0x3860
-	.uleb128 0x31
-	.4byte	.LVL1136
-	.4byte	0x2b83
+	.4byte	0x30a
+	.4byte	.LLST216
+	.uleb128 0x23
+	.4byte	.LVL1124
+	.4byte	0x3859
+	.uleb128 0x23
+	.4byte	.LVL1125
+	.4byte	0x2b86
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF513
 	.byte	0x2
 	.2byte	0x367
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x385a
-	.uleb128 0x44
+	.4byte	0x3853
+	.uleb128 0x43
 	.4byte	.LASF514
 	.byte	0x2
 	.2byte	0x367
-	.4byte	0x30c
-	.4byte	.LLST227
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST217
+	.uleb128 0x43
 	.4byte	.LASF515
 	.byte	0x2
 	.2byte	0x367
-	.4byte	0x30c
-	.4byte	.LLST228
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST218
+	.uleb128 0x43
 	.4byte	.LASF516
 	.byte	0x2
 	.2byte	0x367
-	.4byte	0x385a
-	.4byte	.LLST229
-	.uleb128 0x52
+	.4byte	0x3853
+	.4byte	.LLST219
+	.uleb128 0x51
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x369
-	.4byte	0x301
-	.4byte	.LLST230
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST220
+	.uleb128 0x3d
 	.4byte	.LASF517
 	.byte	0x2
 	.2byte	0x369
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x36a
-	.4byte	0x30c
-	.4byte	.LLST231
-	.uleb128 0x1f
+	.4byte	0x30a
+	.4byte	.LLST221
+	.uleb128 0x1e
 	.4byte	.LASF518
 	.byte	0x2
 	.2byte	0x36b
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x51
+	.byte	0x58
+	.uleb128 0x50
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x36c
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x45
+	.sleb128 -128
+	.uleb128 0x44
 	.4byte	.LASF519
 	.byte	0x2
 	.2byte	0x36d
-	.4byte	0x30c
-	.4byte	.LLST232
-	.uleb128 0x1f
+	.4byte	0x30a
+	.4byte	.LLST222
+	.uleb128 0x1e
 	.4byte	.LASF353
 	.byte	0x2
 	.2byte	0x36e
 	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -104
-	.uleb128 0x31
-	.4byte	.LVL1148
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1149
+	.sleb128 -108
+	.uleb128 0x23
+	.4byte	.LVL1137
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1138
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1151
+	.uleb128 0x23
+	.4byte	.LVL1140
 	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x2f6
-	.uleb128 0x4d
+	.4byte	0x2f4
+	.uleb128 0x4c
 	.4byte	.LASF520
 	.byte	0x2
 	.2byte	0x342
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3939
-	.uleb128 0x44
+	.4byte	0x392e
+	.uleb128 0x43
 	.4byte	.LASF514
 	.byte	0x2
 	.2byte	0x342
-	.4byte	0x30c
-	.4byte	.LLST219
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST211
+	.uleb128 0x43
 	.4byte	.LASF515
 	.byte	0x2
 	.2byte	0x342
-	.4byte	0x30c
-	.4byte	.LLST220
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST212
+	.uleb128 0x43
 	.4byte	.LASF516
 	.byte	0x2
 	.2byte	0x342
-	.4byte	0x385a
-	.4byte	.LLST221
-	.uleb128 0x52
+	.4byte	0x3853
+	.4byte	.LLST213
+	.uleb128 0x50
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x344
-	.4byte	0x301
-	.4byte	.LLST222
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x1
+	.byte	0x59
+	.uleb128 0x3d
 	.4byte	.LASF517
 	.byte	0x2
 	.2byte	0x344
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x345
-	.4byte	0x30c
-	.4byte	.LLST223
-	.uleb128 0x1f
+	.4byte	0x30a
+	.4byte	.LLST214
+	.uleb128 0x1e
 	.4byte	.LASF518
 	.byte	0x2
 	.2byte	0x346
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x51
+	.byte	0x58
+	.uleb128 0x50
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x347
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x45
+	.sleb128 -128
+	.uleb128 0x1e
 	.4byte	.LASF519
 	.byte	0x2
 	.2byte	0x348
-	.4byte	0x30c
-	.4byte	.LLST224
-	.uleb128 0x1f
+	.4byte	0x30a
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x1e
 	.4byte	.LASF353
 	.byte	0x2
 	.2byte	0x349
 	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -104
-	.uleb128 0x31
-	.4byte	.LVL1118
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1119
+	.sleb128 -108
+	.uleb128 0x23
+	.4byte	.LVL1108
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1109
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1120
-	.4byte	0x3ad6
-	.uleb128 0x31
-	.4byte	.LVL1123
+	.uleb128 0x23
+	.4byte	.LVL1110
+	.4byte	0x3ac5
+	.uleb128 0x23
+	.4byte	.LVL1113
 	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF521
 	.byte	0x2
 	.2byte	0x321
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39ef
-	.uleb128 0x4e
+	.4byte	0x39e4
+	.uleb128 0x4d
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x321
-	.4byte	0x30c
-	.4byte	.LLST138
-	.uleb128 0x4e
+	.4byte	0x30a
+	.4byte	.LLST134
+	.uleb128 0x4d
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x321
-	.4byte	0x539
-	.4byte	.LLST139
-	.uleb128 0x44
+	.4byte	0x537
+	.4byte	.LLST135
+	.uleb128 0x43
 	.4byte	.LASF522
 	.byte	0x2
 	.2byte	0x321
-	.4byte	0x64
-	.4byte	.LLST140
-	.uleb128 0x45
+	.4byte	0x62
+	.4byte	.LLST136
+	.uleb128 0x44
 	.4byte	.LASF523
 	.byte	0x2
 	.2byte	0x323
-	.4byte	0x301
-	.4byte	.LLST141
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.4byte	.LLST137
+	.uleb128 0x1e
 	.4byte	.LASF524
 	.byte	0x2
 	.2byte	0x323
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x1f
+	.uleb128 0x1e
 	.4byte	.LASF525
 	.byte	0x2
 	.2byte	0x323
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
+	.byte	0x56
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x39ff
+	.4byte	0x39f4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6802
-	.uleb128 0x48
+	.4byte	__func__.4057
+	.uleb128 0x47
 	.4byte	.LASF526
 	.byte	0x2
 	.2byte	0x32c
-	.4byte	.L745
-	.uleb128 0x31
-	.4byte	.LVL623
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL625
-	.4byte	0x3a3f
-	.uleb128 0x31
-	.4byte	.LVL626
-	.4byte	0x3a96
-	.uleb128 0x31
+	.4byte	.L737
+	.uleb128 0x23
 	.4byte	.LVL627
-	.4byte	0x3e90
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL630
+	.4byte	0x3a30
+	.uleb128 0x23
+	.4byte	.LVL631
+	.4byte	0x3a85
+	.uleb128 0x23
+	.4byte	.LVL632
+	.4byte	0x3e7f
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x39ff
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x39f4
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x8
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x39ef
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x39e4
+	.uleb128 0x3a
 	.4byte	.LASF527
 	.byte	0x2
 	.2byte	0x314
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a3f
-	.uleb128 0x52
+	.4byte	0x3a30
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x316
-	.4byte	0x301
-	.4byte	.LLST196
-	.uleb128 0x31
-	.4byte	.LVL919
-	.4byte	0x365f
-	.uleb128 0x31
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL921
+	.4byte	0x3658
+	.uleb128 0x23
 	.4byte	.LVL922
-	.4byte	0x3a96
+	.4byte	0x3a85
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF528
 	.byte	0x2
 	.2byte	0x2ec
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a96
-	.uleb128 0x3f
+	.4byte	0x3a85
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x2ee
-	.4byte	0x301
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF529
 	.byte	0x2
 	.2byte	0x2ef
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF530
 	.byte	0x2
 	.2byte	0x2f0
-	.4byte	0x30c
-	.uleb128 0x38
+	.4byte	0x30a
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x3092
+	.4byte	0x308d
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6785
-	.uleb128 0x31
-	.4byte	.LVL174
-	.4byte	0x67f2
+	.4byte	__func__.4040
+	.uleb128 0x23
+	.4byte	.LVL166
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF531
 	.byte	0x2
 	.2byte	0x2e2
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ad6
-	.uleb128 0x44
+	.4byte	0x3ac5
+	.uleb128 0x43
 	.4byte	.LASF523
 	.byte	0x2
 	.2byte	0x2e2
-	.4byte	0x301
-	.4byte	.LLST137
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST133
+	.uleb128 0x3d
 	.4byte	.LASF105
 	.byte	0x2
 	.2byte	0x2e4
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL618
-	.4byte	0x3ad6
+	.4byte	0x30a
+	.uleb128 0x23
+	.4byte	.LVL622
+	.4byte	0x3ac5
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF532
 	.byte	0x2
 	.2byte	0x2a7
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3bec
-	.uleb128 0x44
+	.4byte	0x3bd9
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x2a7
-	.4byte	0x3333
-	.4byte	.LLST130
-	.uleb128 0x44
+	.4byte	0x3330
+	.4byte	.LLST126
+	.uleb128 0x43
 	.4byte	.LASF105
 	.byte	0x2
 	.2byte	0x2a7
-	.4byte	0x30c
-	.4byte	.LLST131
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST127
+	.uleb128 0x56
 	.4byte	.LASF516
 	.byte	0x2
 	.2byte	0x2a7
-	.4byte	0x539
-	.4byte	.LLST132
-	.uleb128 0x3e
+	.4byte	0x537
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x2
 	.2byte	0x2a9
-	.4byte	0x30c
-	.uleb128 0x45
+	.4byte	0x30a
+	.uleb128 0x44
 	.4byte	.LASF491
 	.byte	0x2
 	.2byte	0x2aa
-	.4byte	0x3339
-	.4byte	.LLST133
-	.uleb128 0x45
+	.4byte	0x3336
+	.4byte	.LLST128
+	.uleb128 0x44
 	.4byte	.LASF504
 	.byte	0x2
 	.2byte	0x2ab
-	.4byte	0x301
-	.4byte	.LLST134
-	.uleb128 0x40
+	.4byte	0x2ff
+	.4byte	.LLST129
+	.uleb128 0x3f
 	.4byte	.LASF533
 	.byte	0x2
 	.2byte	0x2ad
-	.uleb128 0x38
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x23df
+	.4byte	0x23e2
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6760
-	.uleb128 0x4f
+	.4byte	__func__.4015
+	.uleb128 0x4e
 	.4byte	0x17c6
-	.4byte	.LBB385
-	.4byte	.Ldebug_ranges0+0x180
+	.4byte	.LBB384
+	.4byte	.Ldebug_ranges0+0x158
 	.byte	0x2
 	.2byte	0x2c3
-	.4byte	0x3bb5
+	.4byte	0x3ba2
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -30134,7 +31672,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x180
+	.4byte	.Ldebug_ranges0+0x158
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -30142,793 +31680,793 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x180
+	.4byte	.Ldebug_ranges0+0x158
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL592
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL596
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL589
-	.4byte	0x3bec
-	.uleb128 0x31
-	.4byte	.LVL590
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL591
-	.4byte	0x67f2
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL593
+	.4byte	0x3bd9
+	.uleb128 0x23
+	.4byte	.LVL594
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL595
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL598
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL599
-	.4byte	0x67f2
+	.4byte	0x19ea
+	.uleb128 0x23
+	.4byte	.LVL602
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL603
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF534
 	.byte	0x2
 	.2byte	0x277
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ca7
-	.uleb128 0x44
+	.4byte	0x3c94
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x277
-	.4byte	0x3333
-	.4byte	.LLST126
-	.uleb128 0x3e
+	.4byte	0x3330
+	.4byte	.LLST122
+	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF119
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF535
 	.byte	0x2
 	.2byte	0x27a
-	.4byte	0x301
-	.4byte	.LLST127
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST123
+	.uleb128 0x44
 	.4byte	.LASF536
 	.byte	0x2
 	.2byte	0x27b
-	.4byte	0x630
-	.4byte	.LLST128
-	.uleb128 0x45
+	.4byte	0x62e
+	.4byte	.LLST124
+	.uleb128 0x44
 	.4byte	.LASF489
 	.byte	0x2
 	.2byte	0x27c
-	.4byte	0x539
-	.4byte	.LLST129
-	.uleb128 0x3e
+	.4byte	0x537
+	.4byte	.LLST125
+	.uleb128 0x3d
 	.4byte	.LASF491
 	.byte	0x2
 	.2byte	0x27d
-	.4byte	0x3339
-	.uleb128 0x38
+	.4byte	0x3336
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x3cb7
+	.4byte	0x3ca4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6746
-	.uleb128 0x31
-	.4byte	.LVL572
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL573
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL579
+	.4byte	__func__.4001
+	.uleb128 0x23
+	.4byte	.LVL576
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL577
+	.4byte	0x4234
+	.uleb128 0x23
+	.4byte	.LVL583
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL582
+	.uleb128 0x23
+	.4byte	.LVL586
 	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL583
-	.4byte	0x3cbc
+	.uleb128 0x23
+	.4byte	.LVL587
+	.4byte	0x3ca9
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3cb7
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x3ca4
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x1e
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x3ca7
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x3c94
+	.uleb128 0x3a
 	.4byte	.LASF537
 	.byte	0x2
 	.2byte	0x249
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d87
-	.uleb128 0x44
+	.4byte	0x3d76
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x249
-	.4byte	0x3333
-	.4byte	.LLST135
-	.uleb128 0x1f
+	.4byte	0x3330
+	.4byte	.LLST130
+	.uleb128 0x1e
 	.4byte	.LASF538
 	.byte	0x2
 	.2byte	0x24b
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF539
 	.byte	0x2
 	.2byte	0x24c
-	.4byte	0x301
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF119
 	.byte	0x2
 	.2byte	0x24d
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST131
+	.uleb128 0x44
 	.4byte	.LASF536
 	.byte	0x2
 	.2byte	0x24e
-	.4byte	0x630
-	.4byte	.LLST136
-	.uleb128 0x1f
+	.4byte	0x62e
+	.4byte	.LLST132
+	.uleb128 0x1e
 	.4byte	.LASF489
 	.byte	0x2
 	.2byte	0x24f
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF491
 	.byte	0x2
 	.2byte	0x250
-	.4byte	0x3339
-	.uleb128 0x38
+	.4byte	0x3336
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6732
-	.uleb128 0x31
-	.4byte	.LVL605
-	.4byte	0x3ddf
-	.uleb128 0x31
+	.4byte	__func__.3987
+	.uleb128 0x23
 	.4byte	.LVL607
-	.4byte	0x3d87
-	.uleb128 0x31
+	.4byte	0x3dce
+	.uleb128 0x23
 	.4byte	.LVL609
-	.4byte	0x436d
-	.uleb128 0x31
+	.4byte	0x3d76
+	.uleb128 0x23
 	.4byte	.LVL611
-	.4byte	0x3d87
-	.uleb128 0x31
+	.4byte	0x435a
+	.uleb128 0x23
 	.4byte	.LVL613
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL614
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x3d76
+	.uleb128 0x23
 	.4byte	.LVL615
-	.4byte	0x3ad6
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL617
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL619
+	.4byte	0x3ac5
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF540
 	.byte	0x2
 	.2byte	0x231
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x3dca
-	.uleb128 0x3d
+	.4byte	0x3db9
+	.uleb128 0x3c
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x231
-	.4byte	0x3333
-	.uleb128 0x3e
+	.4byte	0x3330
+	.uleb128 0x3d
 	.4byte	.LASF541
 	.byte	0x2
 	.2byte	0x233
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF536
 	.byte	0x2
 	.2byte	0x234
-	.4byte	0x630
-	.uleb128 0x41
+	.4byte	0x62e
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x3dda
+	.4byte	0x3dc9
 	.4byte	.LASF540
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3dda
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x3dc9
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x19
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x3dca
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x3db9
+	.uleb128 0x3a
 	.4byte	.LASF542
 	.byte	0x2
 	.2byte	0x209
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB204
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e90
-	.uleb128 0x44
+	.4byte	0x3e7f
+	.uleb128 0x43
 	.4byte	.LASF486
 	.byte	0x2
 	.2byte	0x209
-	.4byte	0x3333
-	.4byte	.LLST121
-	.uleb128 0x1f
+	.4byte	0x3330
+	.4byte	.LLST117
+	.uleb128 0x1e
 	.4byte	.LASF536
 	.byte	0x2
 	.2byte	0x20b
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x45
+	.uleb128 0x44
 	.4byte	.LASF489
 	.byte	0x2
 	.2byte	0x20c
-	.4byte	0x539
-	.4byte	.LLST122
-	.uleb128 0x1f
+	.4byte	0x537
+	.4byte	.LLST118
+	.uleb128 0x1e
 	.4byte	.LASF543
 	.byte	0x2
 	.2byte	0x20d
-	.4byte	0x630
+	.4byte	0x62e
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x45
+	.uleb128 0x44
 	.4byte	.LASF178
 	.byte	0x2
 	.2byte	0x20e
-	.4byte	0x301
-	.4byte	.LLST123
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST119
+	.uleb128 0x3d
 	.4byte	.LASF119
 	.byte	0x2
 	.2byte	0x20e
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF541
 	.byte	0x2
 	.2byte	0x20f
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF544
 	.byte	0x2
 	.2byte	0x210
-	.4byte	0x301
-	.4byte	.LLST124
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST120
+	.uleb128 0x44
 	.4byte	.LASF539
 	.byte	0x2
 	.2byte	0x211
-	.4byte	0x301
-	.4byte	.LLST125
-	.uleb128 0x31
-	.4byte	.LVL560
+	.4byte	0x2ff
+	.4byte	.LLST121
+	.uleb128 0x23
+	.4byte	.LVL558
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL569
-	.4byte	0x436d
+	.uleb128 0x23
+	.4byte	.LVL571
+	.4byte	0x435a
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF545
 	.byte	0x2
 	.2byte	0x1e7
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB203
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f37
-	.uleb128 0x44
+	.4byte	0x3f26
+	.uleb128 0x43
 	.4byte	.LASF105
 	.byte	0x2
 	.2byte	0x1e7
-	.4byte	0x301
-	.4byte	.LLST118
-	.uleb128 0x44
+	.4byte	0x2ff
+	.4byte	.LLST114
+	.uleb128 0x43
 	.4byte	.LASF523
 	.byte	0x2
 	.2byte	0x1e7
-	.4byte	0x301
-	.4byte	.LLST119
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST115
+	.uleb128 0x44
 	.4byte	.LASF491
 	.byte	0x2
 	.2byte	0x1e9
-	.4byte	0x3339
-	.4byte	.LLST120
-	.uleb128 0x1f
+	.4byte	0x3336
+	.4byte	.LLST116
+	.uleb128 0x1e
 	.4byte	.LASF546
 	.byte	0x2
 	.2byte	0x1ea
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x57
-	.uleb128 0x38
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x23df
+	.4byte	0x23e2
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6688
-	.uleb128 0x31
-	.4byte	.LVL543
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL545
+	.4byte	__func__.3943
+	.uleb128 0x23
+	.4byte	.LVL542
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL544
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL548
-	.4byte	0x1af8
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL547
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL549
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL550
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x6804
+	.uleb128 0x23
 	.4byte	.LVL551
-	.4byte	0x6808
-	.uleb128 0x31
+	.4byte	0x6804
+	.uleb128 0x23
 	.4byte	.LVL552
-	.4byte	0x6808
-	.uleb128 0x31
-	.4byte	.LVL553
-	.4byte	0x67f2
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF547
 	.byte	0x2
 	.2byte	0x1bf
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x3fb6
-	.uleb128 0x3d
+	.4byte	0x3fa5
+	.uleb128 0x3c
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x1bf
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF548
 	.byte	0x2
 	.2byte	0x1c1
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF549
 	.byte	0x2
 	.2byte	0x1c2
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF550
 	.byte	0x2
 	.2byte	0x1c3
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF551
 	.byte	0x2
 	.2byte	0x1c5
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF552
 	.byte	0x2
 	.2byte	0x1c6
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x1c7
-	.4byte	0x1210
-	.uleb128 0x3e
+	.4byte	0x120e
+	.uleb128 0x3d
 	.4byte	.LASF553
 	.byte	0x2
 	.2byte	0x1c7
-	.4byte	0x1210
-	.uleb128 0x41
+	.4byte	0x120e
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x3092
+	.4byte	0x308d
 	.4byte	.LASF547
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF554
 	.byte	0x2
 	.2byte	0x1ab
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB201
 	.4byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3ffd
-	.uleb128 0x44
+	.4byte	0x3fec
+	.uleb128 0x43
 	.4byte	.LASF93
 	.byte	0x2
 	.2byte	0x1ab
-	.4byte	0x301
-	.4byte	.LLST46
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST43
+	.uleb128 0x3d
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x1ad
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x1ae
-	.4byte	0x1210
-	.4byte	.LLST47
+	.4byte	0x120e
+	.4byte	.LLST44
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF555
 	.byte	0x2
 	.2byte	0x1a6
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB200
 	.4byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4031
-	.uleb128 0x44
+	.4byte	0x4020
+	.uleb128 0x43
 	.4byte	.LASF556
 	.byte	0x2
 	.2byte	0x1a6
-	.4byte	0x4031
-	.4byte	.LLST45
-	.uleb128 0x24
-	.4byte	.LVL145
-	.4byte	0x4037
+	.4byte	0x4020
+	.4byte	.LLST42
+	.uleb128 0x23
+	.4byte	.LVL140
+	.4byte	0x4026
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x1210
-	.uleb128 0x3b
+	.4byte	0x120e
+	.uleb128 0x3a
 	.4byte	.LASF557
 	.byte	0x2
 	.2byte	0x193
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB199
 	.4byte	.LFE199-.LFB199
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4097
-	.uleb128 0x44
+	.4byte	0x4086
+	.uleb128 0x43
 	.4byte	.LASF556
 	.byte	0x2
 	.2byte	0x193
-	.4byte	0x4031
-	.4byte	.LLST42
-	.uleb128 0x44
+	.4byte	0x4020
+	.4byte	.LLST39
+	.uleb128 0x43
 	.4byte	.LASF93
 	.byte	0x2
 	.2byte	0x193
-	.4byte	0x301
-	.4byte	.LLST43
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST40
+	.uleb128 0x3d
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x195
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x196
-	.4byte	0x1210
-	.4byte	.LLST44
-	.uleb128 0x31
-	.4byte	.LVL139
-	.4byte	0x4097
+	.4byte	0x120e
+	.4byte	.LLST41
+	.uleb128 0x23
+	.4byte	.LVL134
+	.4byte	0x4086
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF558
 	.byte	0x2
 	.2byte	0x176
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB198
 	.4byte	.LFE198-.LFB198
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4104
-	.uleb128 0x44
+	.4byte	0x40f3
+	.uleb128 0x43
 	.4byte	.LASF556
 	.byte	0x2
 	.2byte	0x176
-	.4byte	0x4031
-	.4byte	.LLST40
-	.uleb128 0x44
+	.4byte	0x4020
+	.4byte	.LLST37
+	.uleb128 0x43
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x176
-	.4byte	0x301
-	.4byte	.LLST41
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.4byte	.LLST38
+	.uleb128 0x1e
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x178
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.4byte	.LASF559
 	.byte	0x2
 	.2byte	0x178
-	.4byte	0x1210
-	.uleb128 0x38
+	.4byte	0x120e
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x4114
+	.4byte	0x4103
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6647
-	.uleb128 0x31
-	.4byte	.LVL132
-	.4byte	0x67f2
+	.4byte	__func__.3902
+	.uleb128 0x23
+	.4byte	.LVL126
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x4114
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x4103
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0x10
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x4104
-	.uleb128 0x3b
+	.uleb128 0x3
+	.4byte	0x40f3
+	.uleb128 0x3a
 	.4byte	.LASF560
 	.byte	0x2
 	.2byte	0x145
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB197
 	.4byte	.LFE197-.LFB197
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4188
-	.uleb128 0x44
+	.4byte	0x4175
+	.uleb128 0x43
 	.4byte	.LASF432
 	.byte	0x2
 	.2byte	0x145
-	.4byte	0x301
-	.4byte	.LLST37
-	.uleb128 0x1f
+	.4byte	0x2ff
+	.4byte	.LLST35
+	.uleb128 0x1e
 	.4byte	.LASF435
 	.byte	0x2
 	.2byte	0x147
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x1f
+	.byte	0x5c
+	.uleb128 0x1e
 	.4byte	.LASF559
 	.byte	0x2
 	.2byte	0x147
-	.4byte	0x1210
+	.4byte	0x120e
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x45
+	.uleb128 0x1e
 	.4byte	.LASF561
 	.byte	0x2
 	.2byte	0x148
-	.4byte	0x301
-	.4byte	.LLST38
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x1
+	.byte	0x59
+	.uleb128 0x3d
 	.4byte	.LASF562
 	.byte	0x2
 	.2byte	0x149
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF563
 	.byte	0x2
 	.2byte	0x14a
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF564
 	.byte	0x2
 	.byte	0xf8
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x41fd
-	.uleb128 0x34
+	.4byte	0x41ea
+	.uleb128 0x33
 	.4byte	.LASF432
 	.byte	0x2
 	.byte	0xf8
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF435
 	.byte	0x2
 	.byte	0xfa
-	.4byte	0x1210
-	.uleb128 0x35
+	.4byte	0x120e
+	.uleb128 0x34
 	.4byte	.LASF559
 	.byte	0x2
 	.byte	0xfa
-	.4byte	0x1210
-	.uleb128 0x35
+	.4byte	0x120e
+	.uleb128 0x34
 	.4byte	.LASF565
 	.byte	0x2
 	.byte	0xfb
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF566
 	.byte	0x2
 	.byte	0xfc
-	.4byte	0x301
-	.uleb128 0x35
+	.4byte	0x2ff
+	.uleb128 0x34
 	.4byte	.LASF550
 	.byte	0x2
 	.byte	0xfd
-	.4byte	0x30c
-	.uleb128 0x35
+	.4byte	0x30a
+	.uleb128 0x34
 	.4byte	.LASF567
 	.byte	0x2
 	.byte	0xfe
-	.4byte	0x30c
-	.uleb128 0x35
+	.4byte	0x30a
+	.uleb128 0x34
 	.4byte	.LASF563
 	.byte	0x2
 	.byte	0xff
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF114
 	.byte	0x2
 	.2byte	0x100
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.4byte	.LASF568
 	.byte	0x2
 	.byte	0xd9
 	.byte	0x1
-	.4byte	0x4222
-	.uleb128 0x34
+	.4byte	0x420f
+	.uleb128 0x33
 	.4byte	.LASF432
 	.byte	0x2
 	.byte	0xd9
-	.4byte	0x301
-	.uleb128 0x41
+	.4byte	0x2ff
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x4114
+	.4byte	0x4103
 	.4byte	.LASF568
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.4byte	.LASF569
 	.byte	0x2
 	.byte	0xd2
 	.byte	0x1
-	.4byte	0x4247
-	.uleb128 0x34
+	.4byte	0x4234
+	.uleb128 0x33
 	.4byte	.LASF432
 	.byte	0x2
 	.byte	0xd2
-	.4byte	0x301
-	.uleb128 0x41
+	.4byte	0x2ff
+	.uleb128 0x40
 	.4byte	.LASF362
-	.4byte	0x4114
+	.4byte	0x4103
 	.4byte	.LASF569
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF570
 	.byte	0x2
 	.byte	0xb4
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB193
 	.4byte	.LFE193-.LFB193
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x42ca
-	.uleb128 0x37
+	.4byte	0x42b7
+	.uleb128 0x36
 	.ascii	"tmp\000"
 	.byte	0x2
 	.byte	0xb6
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0xb7
-	.4byte	0x42ca
-	.uleb128 0x59
+	.4byte	0x42b7
+	.uleb128 0x58
 	.4byte	.LASF571
 	.byte	0x2
 	.byte	0xb9
-	.4byte	.L518
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x118
-	.4byte	0x42a8
-	.uleb128 0x35
+	.4byte	.L512
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0xd8
+	.4byte	0x4295
+	.uleb128 0x34
 	.4byte	.LASF572
 	.byte	0x2
 	.byte	0xbf
-	.4byte	0x301
-	.uleb128 0x31
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL462
+	.4byte	0x4507
+	.uleb128 0x23
 	.4byte	.LVL463
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL464
 	.4byte	0x1954
 	.byte	0
-	.uleb128 0x5a
-	.4byte	0x43b4
-	.4byte	.LBB315
-	.4byte	.Ldebug_ranges0+0x100
+	.uleb128 0x59
+	.4byte	0x43a1
+	.4byte	.LBB313
+	.4byte	.Ldebug_ranges0+0xc0
 	.byte	0x2
 	.byte	0xba
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL464
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL465
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL466
-	.4byte	0x67f2
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0xadc
-	.uleb128 0x22
+	.4byte	0xada
+	.uleb128 0x21
 	.4byte	.LASF573
 	.byte	0x2
 	.byte	0xa2
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB192
 	.4byte	.LFE192-.LFB192
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4329
+	.4byte	0x4316
 	.uleb128 0x2b
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0xa2
-	.4byte	0x301
-	.4byte	.LLST27
-	.uleb128 0x37
+	.4byte	0x2ff
+	.4byte	.LLST25
+	.uleb128 0x36
 	.ascii	"ret\000"
 	.byte	0x2
 	.byte	0xa4
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x37
+	.uleb128 0x36
 	.ascii	"i\000"
 	.byte	0x2
 	.byte	0xa5
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0xa6
-	.4byte	0x42ca
-	.uleb128 0x5a
-	.4byte	0x43a8
-	.4byte	.LBB251
-	.4byte	.Ldebug_ranges0+0x50
+	.4byte	0x42b7
+	.uleb128 0x59
+	.4byte	0x4395
+	.4byte	.LBB253
+	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x2
 	.byte	0xa8
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF574
 	.byte	0x2
 	.byte	0x75
@@ -30936,99 +32474,99 @@ check_vpc_table:
 	.4byte	.LFE191-.LFB191
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x436d
-	.uleb128 0x20
+	.4byte	0x435a
+	.uleb128 0x1f
 	.4byte	.LASF114
 	.byte	0x2
 	.byte	0x77
-	.4byte	0x317
+	.4byte	0x315
 	.uleb128 0x1
-	.byte	0x55
+	.byte	0x5c
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0x301
-	.uleb128 0x4a
+	.4byte	0x2ff
+	.uleb128 0x49
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0x301
-	.4byte	.LLST26
+	.4byte	0x2ff
+	.4byte	.LLST24
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x42ca
+	.4byte	0x42b7
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.4byte	.LASF575
 	.byte	0x2
 	.byte	0x61
 	.byte	0x1
-	.4byte	0x43a8
+	.4byte	0x4395
 	.uleb128 0x27
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
-	.4byte	0x301
-	.uleb128 0x34
+	.4byte	0x2ff
+	.uleb128 0x33
 	.4byte	.LASF576
 	.byte	0x2
 	.byte	0x61
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x28
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x66
-	.4byte	0x42ca
+	.4byte	0x42b7
 	.uleb128 0x28
-	.uleb128 0x35
+	.uleb128 0x34
 	.4byte	.LASF572
 	.byte	0x2
 	.byte	0x68
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.4byte	.LASF577
 	.byte	0x2
 	.byte	0x5c
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x1
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.4byte	.LASF578
 	.byte	0x2
 	.byte	0x57
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0x1
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF579
 	.byte	0x2
 	.byte	0x4b
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB187
 	.4byte	.LFE187-.LFB187
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x443f
+	.4byte	0x442c
 	.uleb128 0x2b
 	.ascii	"max\000"
 	.byte	0x2
 	.byte	0x4b
-	.4byte	0x301
-	.4byte	.LLST25
+	.4byte	0x2ff
+	.4byte	.LLST23
 	.uleb128 0x29
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x42ca
-	.uleb128 0x5c
+	.4byte	0x42b7
+	.uleb128 0x5b
 	.4byte	0x17c6
-	.4byte	.LBB242
-	.4byte	.Ldebug_ranges0+0x30
+	.4byte	.LBB244
+	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x2
 	.byte	0x53
 	.uleb128 0x2e
@@ -31038,7 +32576,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x30
+	.4byte	.Ldebug_ranges0+0x38
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31046,115 +32584,115 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x30
+	.4byte	.Ldebug_ranges0+0x38
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL76
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL71
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF580
 	.byte	0x2
 	.byte	0x2e
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB186
 	.4byte	.LFE186-.LFB186
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x44d7
-	.uleb128 0x23
+	.4byte	0x44c4
+	.uleb128 0x22
 	.4byte	.LASF178
 	.byte	0x2
 	.byte	0x2e
-	.4byte	0x30c
-	.4byte	.LLST87
-	.uleb128 0x23
+	.4byte	0x30a
+	.4byte	.LLST84
+	.uleb128 0x22
 	.4byte	.LASF356
 	.byte	0x2
 	.byte	0x2e
-	.4byte	0x64
-	.4byte	.LLST88
-	.uleb128 0x37
+	.4byte	0x62
+	.4byte	.LLST85
+	.uleb128 0x36
 	.ascii	"req\000"
 	.byte	0x2
 	.byte	0x30
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x37
+	.sleb128 -120
+	.uleb128 0x36
 	.ascii	"low\000"
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x322
+	.4byte	0x320
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x20
+	.uleb128 0x1f
 	.4byte	.LASF581
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x322
+	.4byte	0x320
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x29
 	.ascii	"mid\000"
 	.byte	0x2
 	.byte	0x31
-	.4byte	0x322
-	.uleb128 0x20
+	.4byte	0x320
+	.uleb128 0x1f
 	.4byte	.LASF582
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x1944
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x35
+	.sleb128 -100
+	.uleb128 0x34
 	.4byte	.LASF583
 	.byte	0x2
 	.byte	0x33
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL380
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL383
-	.4byte	0x1af8
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL367
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL370
+	.4byte	0x1af9
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF584
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB185
 	.4byte	.LFE185-.LFB185
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x451a
-	.uleb128 0x23
+	.4byte	0x4507
+	.uleb128 0x22
 	.4byte	.LASF585
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x30c
-	.4byte	.LLST24
-	.uleb128 0x4c
+	.4byte	0x30a
+	.4byte	.LLST22
+	.uleb128 0x4b
 	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x1e
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x37
+	.uleb128 0x36
 	.ascii	"ret\000"
 	.byte	0x2
 	.byte	0x20
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
@@ -31162,117 +32700,118 @@ check_vpc_table:
 	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x14
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB184
 	.4byte	.LFE184-.LFB184
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x454e
-	.uleb128 0x23
+	.4byte	0x453b
+	.uleb128 0x22
 	.4byte	.LASF378
 	.byte	0x2
 	.byte	0x14
-	.4byte	0x301
-	.4byte	.LLST23
-	.uleb128 0x35
+	.4byte	0x2ff
+	.4byte	.LLST21
+	.uleb128 0x34
 	.4byte	.LASF500
 	.byte	0x2
 	.byte	0x16
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF588
 	.byte	0x2
 	.byte	0xc
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB183
 	.4byte	.LFE183-.LFB183
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4582
-	.uleb128 0x23
+	.4byte	0x456f
+	.uleb128 0x22
 	.4byte	.LASF378
 	.byte	0x2
 	.byte	0xc
-	.4byte	0x301
-	.4byte	.LLST22
-	.uleb128 0x35
+	.4byte	0x2ff
+	.4byte	.LLST20
+	.uleb128 0x34
 	.4byte	.LASF376
 	.byte	0x2
 	.byte	0xe
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF589
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB182
 	.4byte	.LFE182-.LFB182
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45c5
-	.uleb128 0x23
+	.4byte	0x45b2
+	.uleb128 0x22
 	.4byte	.LASF376
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x301
-	.4byte	.LLST20
-	.uleb128 0x23
+	.4byte	0x2ff
+	.4byte	.LLST18
+	.uleb128 0x22
 	.4byte	.LASF500
 	.byte	0x2
 	.byte	0x4
-	.4byte	0x301
-	.4byte	.LLST21
-	.uleb128 0x35
+	.4byte	0x2ff
+	.4byte	.LLST19
+	.uleb128 0x34
 	.4byte	.LASF392
 	.byte	0x2
 	.byte	0x6
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF590
 	.byte	0x4
 	.2byte	0x13c
-	.4byte	0x317
+	.4byte	0x315
 	.4byte	.LFB181
 	.4byte	.LFE181-.LFB181
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4789
-	.uleb128 0x52
+	.4byte	0x4774
+	.uleb128 0x50
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
-	.4byte	0x30c
-	.4byte	.LLST217
-	.uleb128 0x3f
+	.4byte	0x30a
+	.uleb128 0x1
+	.byte	0x57
+	.uleb128 0x3e
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF352
 	.byte	0x4
 	.2byte	0x140
-	.4byte	0x30c
-	.4byte	.LLST218
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST210
+	.uleb128 0x3d
 	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x4789
-	.uleb128 0x40
+	.4byte	0x4774
+	.uleb128 0x3f
 	.4byte	.LASF592
 	.byte	0x4
 	.2byte	0x158
-	.uleb128 0x4f
+	.uleb128 0x4e
 	.4byte	0x17c6
 	.4byte	.LBB488
-	.4byte	.Ldebug_ranges0+0x250
+	.4byte	.Ldebug_ranges0+0x240
 	.byte	0x4
 	.2byte	0x15e
-	.4byte	0x4671
+	.4byte	0x465c
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31280,7 +32819,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x250
+	.4byte	.Ldebug_ranges0+0x240
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31288,31 +32827,31 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x250
+	.4byte	.Ldebug_ranges0+0x240
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1092
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL1085
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.4byte	0x17c6
 	.4byte	.LBB494
 	.4byte	.LBE494-.LBB494
 	.byte	0x4
 	.2byte	0x15f
-	.4byte	0x46cb
+	.4byte	0x46b6
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.LBB495
 	.4byte	.LBE495-.LBB495
 	.uleb128 0x2e
@@ -31321,228 +32860,227 @@ check_vpc_table:
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.LBB496
 	.4byte	.LBE496-.LBB496
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1093
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL1086
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL1072
+	.4byte	0x48d8
+	.uleb128 0x23
+	.4byte	.LVL1073
+	.4byte	0x477a
+	.uleb128 0x23
+	.4byte	.LVL1074
+	.4byte	0x4a9e
+	.uleb128 0x23
+	.4byte	.LVL1075
+	.4byte	0x1900
+	.uleb128 0x23
+	.4byte	.LVL1076
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL1078
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL1079
-	.4byte	0x48f1
-	.uleb128 0x31
-	.4byte	.LVL1080
-	.4byte	0x478f
-	.uleb128 0x31
+	.4byte	0x176f
+	.uleb128 0x23
 	.4byte	.LVL1081
-	.4byte	0x4ab7
-	.uleb128 0x31
+	.4byte	0x4af9
+	.uleb128 0x23
 	.4byte	.LVL1082
-	.4byte	0x1900
-	.uleb128 0x31
+	.4byte	0x180a
+	.uleb128 0x23
 	.4byte	.LVL1083
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1086
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1087
-	.4byte	0x176f
-	.uleb128 0x31
+	.4byte	0x4a38
+	.uleb128 0x23
+	.4byte	.LVL1084
+	.4byte	0x4a9e
+	.uleb128 0x23
 	.4byte	.LVL1088
-	.4byte	0x4b12
-	.uleb128 0x31
+	.4byte	0x176f
+	.uleb128 0x23
 	.4byte	.LVL1089
-	.4byte	0x180a
-	.uleb128 0x31
+	.4byte	0x1954
+	.uleb128 0x23
 	.4byte	.LVL1090
-	.4byte	0x4a51
-	.uleb128 0x31
-	.4byte	.LVL1091
-	.4byte	0x4ab7
-	.uleb128 0x31
+	.4byte	0x19ea
+	.uleb128 0x23
+	.4byte	.LVL1092
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL1093
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL1094
+	.4byte	0x1954
+	.uleb128 0x23
+	.4byte	.LVL1095
+	.4byte	0x4af9
+	.uleb128 0x23
 	.4byte	.LVL1096
-	.4byte	0x176f
-	.uleb128 0x31
+	.4byte	0x4af9
+	.uleb128 0x23
 	.4byte	.LVL1097
-	.4byte	0x1954
-	.uleb128 0x31
+	.4byte	0x493b
+	.uleb128 0x23
 	.4byte	.LVL1098
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1099
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1100
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1101
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL1102
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1103
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1104
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1105
-	.4byte	0x4954
+	.4byte	0x493b
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x700
-	.uleb128 0x3b
+	.4byte	0x6fe
+	.uleb128 0x3a
 	.4byte	.LASF593
 	.byte	0x4
 	.2byte	0x116
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB180
 	.4byte	.LFE180-.LFB180
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47ed
-	.uleb128 0x51
+	.4byte	0x47d8
+	.uleb128 0x50
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x118
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x52
+	.uleb128 0x51
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x119
-	.4byte	0x301
-	.4byte	.LLST85
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST82
+	.uleb128 0x44
 	.4byte	.LASF594
 	.byte	0x4
 	.2byte	0x11a
-	.4byte	0x30c
-	.4byte	.LLST86
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST83
+	.uleb128 0x3d
 	.4byte	.LASF591
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x4789
-	.uleb128 0x31
-	.4byte	.LVL375
-	.4byte	0x1af8
+	.4byte	0x4774
+	.uleb128 0x23
+	.4byte	.LVL362
+	.4byte	0x1af9
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF595
 	.byte	0x4
 	.byte	0xac
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB179
 	.4byte	.LFE179-.LFB179
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x489d
-	.uleb128 0x4a
+	.4byte	0x4888
+	.uleb128 0x49
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
-	.4byte	0x30c
-	.4byte	.LLST214
-	.uleb128 0x4a
+	.4byte	0x30a
+	.4byte	.LLST207
+	.uleb128 0x49
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
-	.4byte	0x301
-	.4byte	.LLST215
+	.4byte	0x2ff
+	.4byte	.LLST208
 	.uleb128 0x2c
 	.4byte	.LASF488
 	.byte	0x4
 	.byte	0xb0
-	.4byte	0x322
-	.4byte	.LLST216
-	.uleb128 0x35
+	.4byte	0x320
+	.4byte	.LLST209
+	.uleb128 0x34
 	.4byte	.LASF591
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x4789
-	.uleb128 0x38
+	.4byte	0x4774
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x48ad
+	.4byte	0x4898
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6494
-	.uleb128 0x31
-	.4byte	.LVL1057
-	.4byte	0x48f1
-	.uleb128 0x31
+	.4byte	__func__.3749
+	.uleb128 0x23
+	.4byte	.LVL1051
+	.4byte	0x48d8
+	.uleb128 0x23
+	.4byte	.LVL1053
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1054
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1055
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1056
+	.4byte	0x442c
+	.uleb128 0x23
+	.4byte	.LVL1058
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1059
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1060
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1061
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1062
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL1064
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x5862
+	.uleb128 0x23
 	.4byte	.LVL1065
-	.4byte	0x5872
-	.uleb128 0x31
-	.4byte	.LVL1071
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1075
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1069
 	.4byte	0x176f
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x48ad
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x4898
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xa
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x489d
-	.uleb128 0x22
+	.uleb128 0x3
+	.4byte	0x4888
+	.uleb128 0x21
 	.4byte	.LASF596
 	.byte	0x4
 	.byte	0x9c
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB178
 	.4byte	.LFE178-.LFB178
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x48f1
-	.uleb128 0x4a
+	.4byte	0x48d8
+	.uleb128 0x29
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0x9e
-	.4byte	0x301
-	.4byte	.LLST19
-	.uleb128 0x20
+	.4byte	0x2ff
+	.uleb128 0x1f
 	.4byte	.LASF597
 	.byte	0x4
 	.byte	0x9f
-	.4byte	0x301
+	.4byte	0x2ff
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x31
-	.4byte	.LVL56
-	.4byte	0x4ab7
+	.uleb128 0x23
+	.4byte	.LVL50
+	.4byte	0x4a9e
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF598
 	.byte	0x4
 	.byte	0x94
@@ -31550,11 +33088,11 @@ check_vpc_table:
 	.4byte	.LFE177-.LFB177
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4954
-	.uleb128 0x5c
+	.4byte	0x493b
+	.uleb128 0x5b
 	.4byte	0x17c6
-	.4byte	.LBB231
-	.4byte	.Ldebug_ranges0+0x18
+	.4byte	.LBB233
+	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x4
 	.byte	0x98
 	.uleb128 0x2e
@@ -31564,7 +33102,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x18
+	.4byte	.Ldebug_ranges0+0x20
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31572,66 +33110,66 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x18
+	.4byte	.Ldebug_ranges0+0x20
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
-	.uleb128 0x24
-	.4byte	.LVL53
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL49
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF599
 	.byte	0x4
 	.byte	0x4f
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB176
 	.4byte	.LFE176-.LFB176
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4a51
-	.uleb128 0x4a
+	.4byte	0x4a38
+	.uleb128 0x49
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x51
-	.4byte	0x64
-	.4byte	.LLST180
+	.4byte	0x62
+	.4byte	.LLST175
 	.uleb128 0x2c
 	.4byte	.LASF600
 	.byte	0x4
 	.byte	0x52
-	.4byte	0x64
-	.4byte	.LLST181
+	.4byte	0x62
+	.4byte	.LLST176
 	.uleb128 0x2c
 	.4byte	.LASF591
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x4789
-	.4byte	.LLST182
+	.4byte	0x4774
+	.4byte	.LLST177
 	.uleb128 0x2c
 	.4byte	.LASF504
 	.byte	0x4
 	.byte	0x54
-	.4byte	0x301
-	.4byte	.LLST183
-	.uleb128 0x47
+	.4byte	0x2ff
+	.4byte	.LLST178
+	.uleb128 0x46
 	.4byte	.LASF601
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x5d
+	.uleb128 0x5c
 	.4byte	.LASF362
-	.4byte	0x1af3
+	.4byte	0x1af4
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB443
-	.4byte	.Ldebug_ranges0+0x1c8
+	.4byte	.LBB442
+	.4byte	.Ldebug_ranges0+0x1a0
 	.byte	0x4
 	.byte	0x5f
-	.4byte	0x4a08
+	.4byte	0x49ef
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31639,7 +33177,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1c8
+	.4byte	.Ldebug_ranges0+0x1a0
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -31647,43 +33185,43 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1c8
+	.4byte	.Ldebug_ranges0+0x1a0
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL835
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL839
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL832
+	.uleb128 0x23
+	.4byte	.LVL835
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL837
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL838
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL839
-	.4byte	0x1954
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL840
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL841
 	.4byte	0x19ea
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL842
+	.4byte	0x1954
+	.uleb128 0x23
 	.4byte	.LVL843
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL844
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x19ea
+	.uleb128 0x23
 	.4byte	.LVL846
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL847
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL849
 	.4byte	0x176f
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.4byte	.LASF602
 	.byte	0x4
 	.byte	0x41
@@ -31691,38 +33229,38 @@ check_vpc_table:
 	.4byte	.LFE175-.LFB175
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4aaf
-	.uleb128 0x23
+	.4byte	0x4a96
+	.uleb128 0x22
 	.4byte	.LASF536
 	.byte	0x4
 	.byte	0x41
-	.4byte	0x630
-	.4byte	.LLST116
-	.uleb128 0x23
+	.4byte	0x62e
+	.4byte	.LLST112
+	.uleb128 0x22
 	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x41
-	.4byte	0x539
-	.4byte	.LLST117
+	.4byte	0x537
+	.4byte	.LLST113
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x43
-	.4byte	0x30c
-	.uleb128 0x38
+	.4byte	0x30a
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x29d3
+	.4byte	0x29d6
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6451
-	.uleb128 0x31
-	.4byte	.LVL539
+	.4byte	__func__.3706
+	.uleb128 0x23
+	.4byte	.LVL537
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL540
-	.4byte	0x67f2
+	.uleb128 0x23
+	.4byte	.LVL538
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x5d
 	.4byte	.LASF604
 	.byte	0x4
 	.byte	0x26
@@ -31731,447 +33269,452 @@ check_vpc_table:
 	.4byte	.LASF605
 	.byte	0x4
 	.byte	0x17
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB173
 	.4byte	.LFE173-.LFB173
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b12
-	.uleb128 0x23
+	.4byte	0x4af9
+	.uleb128 0x22
 	.4byte	.LASF178
 	.byte	0x4
 	.byte	0x17
-	.4byte	0x301
-	.4byte	.LLST16
-	.uleb128 0x4a
+	.4byte	0x2ff
+	.4byte	.LLST15
+	.uleb128 0x49
 	.ascii	"die\000"
 	.byte	0x4
 	.byte	0x19
-	.4byte	0x30c
-	.4byte	.LLST17
+	.4byte	0x30a
+	.4byte	.LLST16
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x1a
-	.4byte	0x30c
-	.uleb128 0x35
+	.4byte	0x30a
+	.uleb128 0x34
 	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x1b
-	.4byte	0x539
+	.4byte	0x537
 	.uleb128 0x2c
 	.4byte	.LASF369
 	.byte	0x4
 	.byte	0x1c
-	.4byte	0x301
-	.4byte	.LLST18
+	.4byte	0x2ff
+	.4byte	.LLST17
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF606
 	.byte	0x4
 	.byte	0x4
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB172
 	.4byte	.LFE172-.LFB172
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b69
-	.uleb128 0x23
+	.4byte	0x4b4e
+	.uleb128 0x22
 	.4byte	.LASF178
 	.byte	0x4
 	.byte	0x4
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LLST14
-	.uleb128 0x4a
+	.uleb128 0x36
 	.ascii	"die\000"
 	.byte	0x4
 	.byte	0x6
-	.4byte	0x30c
-	.4byte	.LLST15
-	.uleb128 0x35
+	.4byte	0x30a
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x34
 	.4byte	.LASF603
 	.byte	0x4
 	.byte	0x7
-	.4byte	0x539
-	.uleb128 0x35
+	.4byte	0x537
+	.uleb128 0x34
 	.4byte	.LASF369
 	.byte	0x4
 	.byte	0x8
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL43
-	.4byte	0x67f2
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL40
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x5e
 	.4byte	.LASF668
 	.byte	0x3
 	.2byte	0x4bd
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LFB171
 	.4byte	.LFE171-.LFB171
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF607
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB170
 	.4byte	.LFE170-.LFB170
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4bd3
-	.uleb128 0x44
+	.4byte	0x4bb8
+	.uleb128 0x43
 	.4byte	.LASF93
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x99
-	.4byte	.LLST294
-	.uleb128 0x44
+	.4byte	0x97
+	.4byte	.LLST283
+	.uleb128 0x43
 	.4byte	.LASF114
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x99
-	.4byte	.LLST295
-	.uleb128 0x4e
+	.4byte	0x97
+	.4byte	.LLST284
+	.uleb128 0x4d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x4bd3
-	.4byte	.LLST296
-	.uleb128 0x24
-	.4byte	.LVL1561
-	.4byte	0x4cff
+	.4byte	0x4bb8
+	.4byte	.LLST285
+	.uleb128 0x23
+	.4byte	.LVL1550
+	.4byte	0x4ce4
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x79
-	.uleb128 0x3b
+	.4byte	0x77
+	.uleb128 0x3a
 	.4byte	.LASF608
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB169
 	.4byte	.LFE169-.LFB169
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4c2d
-	.uleb128 0x44
+	.4byte	0x4c12
+	.uleb128 0x43
 	.4byte	.LASF93
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x99
-	.4byte	.LLST280
-	.uleb128 0x44
+	.4byte	0x97
+	.4byte	.LLST269
+	.uleb128 0x43
 	.4byte	.LASF114
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x99
-	.4byte	.LLST281
-	.uleb128 0x4e
+	.4byte	0x97
+	.4byte	.LLST270
+	.uleb128 0x4d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x4bd3
-	.4byte	.LLST282
-	.uleb128 0x24
-	.4byte	.LVL1460
-	.4byte	0x507c
+	.4byte	0x4bb8
+	.4byte	.LLST271
+	.uleb128 0x23
+	.4byte	.LVL1436
+	.4byte	0x506e
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF609
 	.byte	0x3
 	.2byte	0x484
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB168
 	.4byte	.LFE168-.LFB168
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4cff
-	.uleb128 0x44
+	.4byte	0x4ce4
+	.uleb128 0x43
 	.4byte	.LASF514
 	.byte	0x3
 	.2byte	0x484
-	.4byte	0x30c
-	.4byte	.LLST245
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST234
+	.uleb128 0x43
 	.4byte	.LASF515
 	.byte	0x3
 	.2byte	0x484
-	.4byte	0x30c
-	.4byte	.LLST246
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST235
+	.uleb128 0x44
 	.4byte	.LASF517
 	.byte	0x3
 	.2byte	0x486
-	.4byte	0x301
-	.4byte	.LLST247
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST236
+	.uleb128 0x3e
 	.ascii	"tmp\000"
 	.byte	0x3
 	.2byte	0x487
-	.4byte	0x301
-	.uleb128 0x52
+	.4byte	0x2ff
+	.uleb128 0x51
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x488
-	.4byte	0x30c
-	.4byte	.LLST248
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST237
+	.uleb128 0x44
 	.4byte	.LASF446
 	.byte	0x3
 	.2byte	0x489
-	.4byte	0x30c
-	.4byte	.LLST249
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST238
+	.uleb128 0x44
 	.4byte	.LASF423
 	.byte	0x3
 	.2byte	0x489
-	.4byte	0x30c
-	.4byte	.LLST250
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST239
+	.uleb128 0x3d
 	.4byte	.LASF412
 	.byte	0x3
 	.2byte	0x48a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL1233
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1239
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1240
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1241
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1244
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1245
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1246
-	.4byte	0x232e
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL1219
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1225
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1226
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1227
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1228
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1231
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1232
+	.4byte	0x2331
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.4byte	.LASF610
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB167
 	.4byte	.LFE167-.LFB167
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f1f
-	.uleb128 0x4e
+	.4byte	0x4f11
+	.uleb128 0x4d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x2f6
-	.4byte	.LLST283
-	.uleb128 0x44
+	.4byte	0x2f4
+	.4byte	.LLST272
+	.uleb128 0x43
 	.4byte	.LASF514
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x30c
-	.4byte	.LLST284
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST273
+	.uleb128 0x43
 	.4byte	.LASF515
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x30c
-	.4byte	.LLST285
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST274
+	.uleb128 0x43
 	.4byte	.LASF516
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x385a
-	.4byte	.LLST286
-	.uleb128 0x3e
+	.4byte	0x3853
+	.4byte	.LLST275
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x1d3f
-	.uleb128 0x52
+	.4byte	0x1d42
+	.uleb128 0x51
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST287
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST276
+	.uleb128 0x44
 	.4byte	.LASF611
 	.byte	0x3
 	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST288
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST277
+	.uleb128 0x44
 	.4byte	.LASF612
 	.byte	0x3
 	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST289
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST278
+	.uleb128 0x44
 	.4byte	.LASF446
 	.byte	0x3
 	.2byte	0x3c5
-	.4byte	0x30c
-	.4byte	.LLST290
-	.uleb128 0x3f
+	.4byte	0x30a
+	.4byte	.LLST279
+	.uleb128 0x3e
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x3c5
-	.4byte	0x30c
-	.uleb128 0x52
+	.4byte	0x30a
+	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x3c6
-	.4byte	0x30c
-	.4byte	.LLST291
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST280
+	.uleb128 0x44
 	.4byte	.LASF613
 	.byte	0x3
 	.2byte	0x3c6
-	.4byte	0x30c
-	.4byte	.LLST292
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST281
+	.uleb128 0x3d
 	.4byte	.LASF377
 	.byte	0x3
 	.2byte	0x3c6
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF614
 	.byte	0x3
 	.2byte	0x3c7
-	.4byte	0x30c
-	.uleb128 0x3e
+	.4byte	0x30a
+	.uleb128 0x3d
 	.4byte	.LASF615
 	.byte	0x3
 	.2byte	0x3c7
-	.4byte	0x30c
-	.uleb128 0x45
+	.4byte	0x30a
+	.uleb128 0x44
 	.4byte	.LASF422
 	.byte	0x3
 	.2byte	0x3c8
-	.4byte	0x12c0
-	.4byte	.LLST293
-	.uleb128 0x38
+	.4byte	0x12be
+	.4byte	.LLST282
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x39ff
+	.4byte	0x39f4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6387
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x2b0
-	.4byte	0x4e46
-	.uleb128 0x1f
+	.4byte	__func__.3642
+	.uleb128 0x52
+	.4byte	.LBB539
+	.4byte	.LBE539-.LBB539
+	.4byte	0x4e2f
+	.uleb128 0x1e
 	.4byte	.LASF385
 	.byte	0x3
 	.2byte	0x43d
-	.4byte	0x32d
+	.4byte	0x32b
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x31
-	.4byte	.LVL1538
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1542
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1543
-	.4byte	0x67f2
+	.sleb128 -64
+	.uleb128 0x23
+	.4byte	.LVL1525
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1526
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1527
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL1440
+	.4byte	0x3859
+	.uleb128 0x23
+	.4byte	.LVL1452
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1461
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1463
+	.4byte	0x4f11
+	.uleb128 0x23
 	.4byte	.LVL1464
-	.4byte	0x3860
-	.uleb128 0x31
-	.4byte	.LVL1475
-	.4byte	0x4f1f
-	.uleb128 0x31
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1465
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1468
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1472
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1478
+	.4byte	0x1c75
+	.uleb128 0x23
+	.4byte	.LVL1480
+	.4byte	0x3fa5
+	.uleb128 0x23
 	.4byte	.LVL1481
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x1e70
+	.uleb128 0x23
+	.4byte	.LVL1482
+	.4byte	0x1c75
+	.uleb128 0x23
 	.4byte	.LVL1483
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1484
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1486
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1488
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1491
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x1c75
+	.uleb128 0x23
+	.4byte	.LVL1489
+	.4byte	0x176f
+	.uleb128 0x23
 	.4byte	.LVL1495
-	.4byte	0x1c72
-	.uleb128 0x31
+	.4byte	0x4f11
+	.uleb128 0x23
 	.4byte	.LVL1497
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1498
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1499
-	.4byte	0x1c72
-	.uleb128 0x31
+	.4byte	0x2463
+	.uleb128 0x23
 	.4byte	.LVL1500
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1505
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1510
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1514
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1517
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1518
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1519
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1501
+	.4byte	0x23e7
+	.uleb128 0x23
+	.4byte	.LVL1502
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1532
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1539
+	.uleb128 0x23
+	.4byte	.LVL1517
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1530
 	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1544
+	.uleb128 0x23
+	.4byte	.LVL1533
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1552
-	.4byte	0x4f43
-	.uleb128 0x31
-	.4byte	.LVL1554
-	.4byte	0x67f2
+	.uleb128 0x23
+	.4byte	.LVL1536
+	.4byte	0x176f
+	.uleb128 0x23
+	.4byte	.LVL1543
+	.4byte	0x4f35
+	.uleb128 0x23
+	.4byte	.LVL1545
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF616
 	.byte	0x3
 	.2byte	0x3b7
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB166
 	.4byte	.LFE166-.LFB166
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f43
-	.uleb128 0x31
-	.4byte	.LVL1223
-	.4byte	0x4f43
+	.4byte	0x4f35
+	.uleb128 0x23
+	.4byte	.LVL1209
+	.4byte	0x4f35
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.4byte	.LASF617
 	.byte	0x3
 	.2byte	0x387
@@ -32179,1712 +33722,1718 @@ check_vpc_table:
 	.4byte	.LFE165-.LFB165
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5067
-	.uleb128 0x4e
+	.4byte	0x5059
+	.uleb128 0x4d
 	.ascii	"req\000"
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0xf40
-	.4byte	.LLST238
-	.uleb128 0x44
+	.4byte	0xf3e
+	.4byte	.LLST227
+	.uleb128 0x43
 	.4byte	.LASF377
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x30c
-	.4byte	.LLST239
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST228
+	.uleb128 0x43
 	.4byte	.LASF618
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x30c
-	.4byte	.LLST240
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST229
+	.uleb128 0x43
 	.4byte	.LASF422
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x12c0
-	.4byte	.LLST241
-	.uleb128 0x52
+	.4byte	0x12be
+	.4byte	.LLST230
+	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
-	.4byte	0x30c
-	.4byte	.LLST242
-	.uleb128 0x52
+	.4byte	0x30a
+	.4byte	.LLST231
+	.uleb128 0x51
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x38a
-	.4byte	0x30c
-	.4byte	.LLST243
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST232
+	.uleb128 0x44
 	.4byte	.LASF446
 	.byte	0x3
 	.2byte	0x38a
-	.4byte	0x30c
-	.4byte	.LLST244
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST233
+	.uleb128 0x3d
 	.4byte	.LASF405
 	.byte	0x3
 	.2byte	0x38b
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF380
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x1d3f
-	.uleb128 0x3e
+	.4byte	0x1d42
+	.uleb128 0x3d
 	.4byte	.LASF470
 	.byte	0x3
 	.2byte	0x38d
-	.4byte	0x30c
-	.uleb128 0x38
+	.4byte	0x30a
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x5077
+	.4byte	0x5069
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6359
-	.uleb128 0x31
-	.4byte	.LVL1202
+	.4byte	__func__.3614
+	.uleb128 0x23
+	.4byte	.LVL1188
 	.4byte	0x19ea
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL1190
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1191
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1192
+	.4byte	0x1e14
+	.uleb128 0x23
+	.4byte	.LVL1193
+	.4byte	0x23e7
+	.uleb128 0x23
+	.4byte	.LVL1194
+	.4byte	0x19ea
+	.uleb128 0x23
+	.4byte	.LVL1196
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1198
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1200
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1203
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1204
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1205
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1206
-	.4byte	0x1e11
-	.uleb128 0x31
+	.4byte	0x2331
+	.uleb128 0x23
 	.4byte	.LVL1207
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1208
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1210
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1212
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1214
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1217
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1218
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1221
-	.4byte	0x67f2
+	.4byte	0x67ee
 	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x5077
-	.uleb128 0x17
-	.4byte	0x2e
+	.uleb128 0xb
+	.4byte	0x3a
+	.4byte	0x5069
+	.uleb128 0x16
+	.4byte	0x2c
 	.byte	0xc
 	.byte	0
-	.uleb128 0x4
-	.4byte	0x5067
-	.uleb128 0x4d
+	.uleb128 0x3
+	.4byte	0x5059
+	.uleb128 0x4c
 	.4byte	.LASF619
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB164
 	.4byte	.LFE164-.LFB164
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x525b
-	.uleb128 0x4e
+	.4byte	0x524b
+	.uleb128 0x4d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x2f6
-	.4byte	.LLST265
-	.uleb128 0x44
+	.4byte	0x2f4
+	.4byte	.LLST254
+	.uleb128 0x43
 	.4byte	.LASF514
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x30c
-	.4byte	.LLST266
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST255
+	.uleb128 0x43
 	.4byte	.LASF515
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x30c
-	.4byte	.LLST267
-	.uleb128 0x44
+	.4byte	0x30a
+	.4byte	.LLST256
+	.uleb128 0x43
 	.4byte	.LASF516
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x385a
-	.4byte	.LLST268
-	.uleb128 0x51
+	.4byte	0x3853
+	.4byte	.LLST257
+	.uleb128 0x3e
 	.ascii	"ret\000"
 	.byte	0x3
 	.2byte	0x32f
-	.4byte	0x64
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x45
+	.4byte	0x62
+	.uleb128 0x44
 	.4byte	.LASF611
 	.byte	0x3
 	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST269
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST258
+	.uleb128 0x44
 	.4byte	.LASF612
 	.byte	0x3
 	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST270
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST259
+	.uleb128 0x44
 	.4byte	.LASF620
 	.byte	0x3
 	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST271
-	.uleb128 0x52
+	.4byte	0x30a
+	.4byte	.LLST260
+	.uleb128 0x51
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x331
-	.4byte	0x30c
-	.4byte	.LLST272
-	.uleb128 0x52
+	.4byte	0x30a
+	.4byte	.LLST261
+	.uleb128 0x51
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x331
-	.4byte	0x30c
-	.4byte	.LLST273
-	.uleb128 0x52
+	.4byte	0x30a
+	.4byte	.LLST262
+	.uleb128 0x51
 	.ascii	"n\000"
 	.byte	0x3
 	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST274
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST263
+	.uleb128 0x44
 	.4byte	.LASF377
 	.byte	0x3
 	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST275
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST264
+	.uleb128 0x44
 	.4byte	.LASF613
 	.byte	0x3
 	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST276
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST265
+	.uleb128 0x44
 	.4byte	.LASF621
 	.byte	0x3
 	.2byte	0x334
-	.4byte	0x30c
-	.4byte	.LLST277
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST266
+	.uleb128 0x3d
 	.4byte	.LASF622
 	.byte	0x3
 	.2byte	0x334
-	.4byte	0x30c
-	.uleb128 0x45
+	.4byte	0x30a
+	.uleb128 0x44
 	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x335
-	.4byte	0x30c
-	.4byte	.LLST278
-	.uleb128 0x45
+	.4byte	0x30a
+	.4byte	.LLST267
+	.uleb128 0x44
 	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x336
-	.4byte	0x30c
-	.4byte	.LLST279
-	.uleb128 0x53
-	.4byte	.LBB537
-	.4byte	.LBE537-.LBB537
-	.4byte	0x51ca
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST268
+	.uleb128 0x52
+	.4byte	.LBB538
+	.4byte	.LBE538-.LBB538
+	.4byte	0x51ba
+	.uleb128 0x3d
 	.4byte	.LASF392
 	.byte	0x3
 	.2byte	0x37a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL1432
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1433
-	.4byte	0x1e6d
+	.4byte	0x2ff
+	.uleb128 0x23
+	.4byte	.LVL1424
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL1425
+	.4byte	0x1e70
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.4byte	0x17c6
-	.4byte	.LBB538
-	.4byte	.LBE538-.LBB538
+	.4byte	.LBB535
+	.4byte	.LBE535-.LBB535
 	.byte	0x3
 	.2byte	0x350
-	.4byte	0x5224
+	.4byte	0x5214
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB539
-	.4byte	.LBE539-.LBB539
+	.uleb128 0x32
+	.4byte	.LBB536
+	.4byte	.LBE536-.LBB536
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB540
-	.4byte	.LBE540-.LBB540
+	.uleb128 0x32
+	.4byte	.LBB537
+	.4byte	.LBE537-.LBB537
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1437
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL1409
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1392
-	.4byte	0x378a
-	.uleb128 0x31
-	.4byte	.LVL1398
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1413
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1416
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1423
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1429
+	.uleb128 0x23
+	.4byte	.LVL1373
+	.4byte	0x3783
+	.uleb128 0x23
+	.4byte	.LVL1379
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1394
+	.4byte	0x1c75
+	.uleb128 0x23
+	.4byte	.LVL1397
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1414
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL1422
 	.4byte	0x176f
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF625
 	.byte	0x3
 	.2byte	0x325
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB163
 	.4byte	.LFE163-.LFB163
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x527f
-	.uleb128 0x31
-	.4byte	.LVL1228
-	.4byte	0x527f
+	.4byte	0x526f
+	.uleb128 0x23
+	.4byte	.LVL1214
+	.4byte	0x526f
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF626
 	.byte	0x3
 	.2byte	0x31c
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB162
 	.4byte	.LFE162-.LFB162
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52be
-	.uleb128 0x31
-	.4byte	.LVL1224
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1225
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1226
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1227
-	.4byte	0x3598
+	.4byte	0x52ae
+	.uleb128 0x23
+	.4byte	.LVL1210
+	.4byte	0x4f11
+	.uleb128 0x23
+	.4byte	.LVL1211
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1212
+	.4byte	0x3736
+	.uleb128 0x23
+	.4byte	.LVL1213
+	.4byte	0x3593
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF627
 	.byte	0x3
 	.2byte	0x2e6
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB161
 	.4byte	.LFE161-.LFB161
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x534d
-	.uleb128 0x3e
+	.4byte	0x533d
+	.uleb128 0x3d
 	.4byte	.LASF628
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x534d
-	.uleb128 0x40
+	.4byte	0x533d
+	.uleb128 0x3f
 	.4byte	.LASF629
 	.byte	0x3
 	.2byte	0x2f3
-	.uleb128 0x53
-	.4byte	.LBB550
-	.4byte	.LBE550-.LBB550
-	.4byte	0x530d
-	.uleb128 0x3f
+	.uleb128 0x52
+	.4byte	.LBB547
+	.4byte	.LBE547-.LBB547
+	.4byte	0x52fd
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1647
-	.4byte	0x1c72
+	.4byte	0x30a
+	.uleb128 0x23
+	.4byte	.LVL1634
+	.4byte	0x1c75
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1640
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1641
-	.4byte	0x5821
-	.uleb128 0x31
-	.4byte	.LVL1642
-	.4byte	0x5699
-	.uleb128 0x31
-	.4byte	.LVL1643
-	.4byte	0x559d
-	.uleb128 0x31
-	.4byte	.LVL1644
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1645
-	.4byte	0x47ed
-	.uleb128 0x31
-	.4byte	.LVL1646
-	.4byte	0x2815
+	.uleb128 0x23
+	.4byte	.LVL1627
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1628
+	.4byte	0x5811
+	.uleb128 0x23
+	.4byte	.LVL1629
+	.4byte	0x5689
+	.uleb128 0x23
+	.4byte	.LVL1630
+	.4byte	0x558d
+	.uleb128 0x23
+	.4byte	.LVL1631
+	.4byte	0x43ad
+	.uleb128 0x23
+	.4byte	.LVL1632
+	.4byte	0x47d8
+	.uleb128 0x23
+	.4byte	.LVL1633
+	.4byte	0x2818
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.byte	0x4
-	.4byte	0x419
-	.uleb128 0x4d
+	.4byte	0x417
+	.uleb128 0x4c
 	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x26e
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB160
 	.4byte	.LFE160-.LFB160
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x544c
-	.uleb128 0x3e
+	.4byte	0x543c
+	.uleb128 0x3d
 	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x270
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x270
-	.4byte	0x301
-	.4byte	.LLST299
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST288
+	.uleb128 0x44
 	.4byte	.LASF632
 	.byte	0x3
 	.2byte	0x271
-	.4byte	0x301
-	.4byte	.LLST300
-	.uleb128 0x3f
+	.4byte	0x2ff
+	.4byte	.LLST289
+	.uleb128 0x3e
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
-	.4byte	0x301
-	.uleb128 0x48
+	.4byte	0x2ff
+	.uleb128 0x47
 	.4byte	.LASF633
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1784
-	.uleb128 0x48
+	.4byte	.L1756
+	.uleb128 0x47
 	.4byte	.LASF634
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1786
-	.uleb128 0x31
-	.4byte	.LVL1609
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1610
-	.4byte	0x47ed
-	.uleb128 0x31
-	.4byte	.LVL1611
-	.4byte	0x45c5
-	.uleb128 0x31
-	.4byte	.LVL1618
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1619
+	.4byte	.L1758
+	.uleb128 0x23
+	.4byte	.LVL1596
+	.4byte	0x43ad
+	.uleb128 0x23
+	.4byte	.LVL1597
+	.4byte	0x47d8
+	.uleb128 0x23
+	.4byte	.LVL1598
+	.4byte	0x45b2
+	.uleb128 0x23
+	.4byte	.LVL1605
+	.4byte	0x493b
+	.uleb128 0x23
+	.4byte	.LVL1606
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1620
+	.uleb128 0x23
+	.4byte	.LVL1607
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1621
-	.4byte	0x2c55
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL1608
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1610
+	.4byte	0x543c
+	.uleb128 0x23
+	.4byte	.LVL1614
+	.4byte	0x5862
+	.uleb128 0x23
+	.4byte	.LVL1615
+	.4byte	0x43ad
+	.uleb128 0x23
+	.4byte	.LVL1617
+	.4byte	0x543c
+	.uleb128 0x23
+	.4byte	.LVL1619
+	.4byte	0x543c
+	.uleb128 0x23
 	.4byte	.LVL1623
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1627
-	.4byte	0x5872
-	.uleb128 0x31
-	.4byte	.LVL1628
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1630
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1632
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1636
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1637
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL1638
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1639
-	.4byte	0x2815
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1624
+	.4byte	0x4234
+	.uleb128 0x23
+	.4byte	.LVL1625
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1626
+	.4byte	0x2818
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF635
 	.byte	0x3
 	.2byte	0x20f
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB159
 	.4byte	.LFE159-.LFB159
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5573
-	.uleb128 0x44
+	.4byte	0x5563
+	.uleb128 0x43
 	.4byte	.LASF500
 	.byte	0x3
 	.2byte	0x20f
-	.4byte	0x301
-	.4byte	.LLST99
-	.uleb128 0x44
+	.4byte	0x2ff
+	.4byte	.LLST96
+	.uleb128 0x43
 	.4byte	.LASF636
 	.byte	0x3
 	.2byte	0x20f
-	.4byte	0x2f6
-	.4byte	.LLST100
-	.uleb128 0x45
+	.4byte	0x2f4
+	.4byte	.LLST97
+	.uleb128 0x44
 	.4byte	.LASF631
 	.byte	0x3
 	.2byte	0x211
-	.4byte	0x301
-	.4byte	.LLST101
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.4byte	.LLST98
+	.uleb128 0x3d
 	.4byte	.LASF357
 	.byte	0x3
 	.2byte	0x211
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF376
 	.byte	0x3
 	.2byte	0x212
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF178
 	.byte	0x3
 	.2byte	0x212
-	.4byte	0x301
-	.uleb128 0x45
+	.4byte	0x2ff
+	.uleb128 0x44
 	.4byte	.LASF637
 	.byte	0x3
 	.2byte	0x213
-	.4byte	0x301
-	.4byte	.LLST102
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST99
+	.uleb128 0x44
 	.4byte	.LASF638
 	.byte	0x3
 	.2byte	0x214
-	.4byte	0x301
-	.4byte	.LLST103
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST100
+	.uleb128 0x44
 	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x215
-	.4byte	0x301
-	.4byte	.LLST104
-	.uleb128 0x45
+	.4byte	0x2ff
+	.4byte	.LLST101
+	.uleb128 0x44
 	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x216
-	.4byte	0x301
-	.4byte	.LLST105
-	.uleb128 0x48
+	.4byte	0x2ff
+	.4byte	.LLST102
+	.uleb128 0x47
 	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L482
-	.uleb128 0x31
-	.4byte	.LVL424
+	.4byte	.L478
+	.uleb128 0x23
+	.4byte	.LVL419
 	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL431
+	.uleb128 0x23
+	.4byte	.LVL430
 	.4byte	0x19ea
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL439
 	.4byte	0x1954
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL441
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL442
+	.4byte	0x5563
+	.uleb128 0x23
 	.4byte	.LVL443
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL444
-	.4byte	0x5573
-	.uleb128 0x31
-	.4byte	.LVL445
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL450
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL455
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL456
-	.4byte	0x5573
-	.uleb128 0x31
-	.4byte	.LVL457
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL460
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL462
-	.4byte	0x436d
+	.4byte	0x4a9e
+	.uleb128 0x23
+	.4byte	.LVL448
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL451
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL452
+	.4byte	0x5563
+	.uleb128 0x23
+	.4byte	.LVL453
+	.4byte	0x4a9e
+	.uleb128 0x23
+	.4byte	.LVL458
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL461
+	.4byte	0x435a
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.4byte	.LASF642
 	.byte	0x3
 	.2byte	0x201
-	.4byte	0x64
+	.4byte	0x62
 	.byte	0x1
-	.4byte	0x559d
-	.uleb128 0x3d
+	.4byte	0x558d
+	.uleb128 0x3c
 	.4byte	.LASF178
 	.byte	0x3
 	.2byte	0x201
-	.4byte	0x301
-	.uleb128 0x3e
+	.4byte	0x2ff
+	.uleb128 0x3d
 	.4byte	.LASF643
 	.byte	0x3
 	.2byte	0x203
-	.4byte	0x301
+	.4byte	0x2ff
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF644
 	.byte	0x3
 	.2byte	0x1ec
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB157
 	.4byte	.LFE157-.LFB157
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5699
-	.uleb128 0x54
+	.4byte	0x5689
+	.uleb128 0x53
 	.4byte	0x17c6
-	.4byte	.LBB432
-	.4byte	.LBE432-.LBB432
+	.4byte	.LBB431
+	.4byte	.LBE431-.LBB431
 	.byte	0x3
 	.2byte	0x1f9
-	.4byte	0x5611
+	.4byte	0x5601
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB433
-	.4byte	.LBE433-.LBB433
+	.uleb128 0x32
+	.4byte	.LBB432
+	.4byte	.LBE432-.LBB432
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB434
-	.4byte	.LBE434-.LBB434
+	.uleb128 0x32
+	.4byte	.LBB433
+	.4byte	.LBE433-.LBB433
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL764
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL775
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.4byte	0x17c6
-	.4byte	.LBB435
-	.4byte	.LBE435-.LBB435
+	.4byte	.LBB434
+	.4byte	.LBE434-.LBB434
 	.byte	0x3
 	.2byte	0x1fa
-	.4byte	0x566b
+	.4byte	0x565b
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB436
-	.4byte	.LBE436-.LBB436
+	.uleb128 0x32
+	.4byte	.LBB435
+	.4byte	.LBE435-.LBB435
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB437
-	.4byte	.LBE437-.LBB437
+	.uleb128 0x32
+	.4byte	.LBB436
+	.4byte	.LBE436-.LBB436
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL765
-	.4byte	0x67fd
+	.uleb128 0x23
+	.4byte	.LVL776
+	.4byte	0x67f9
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL761
+	.uleb128 0x23
+	.4byte	.LVL772
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL762
+	.uleb128 0x23
+	.4byte	.LVL773
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL763
+	.uleb128 0x23
+	.4byte	.LVL774
 	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL766
-	.4byte	0x230f
-	.uleb128 0x31
-	.4byte	.LVL767
-	.4byte	0x31cc
+	.uleb128 0x23
+	.4byte	.LVL777
+	.4byte	0x2312
+	.uleb128 0x23
+	.4byte	.LVL778
+	.4byte	0x31c7
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.4byte	.LASF645
 	.byte	0x3
 	.2byte	0x116
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB156
 	.4byte	.LFE156-.LFB156
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5821
-	.uleb128 0x52
+	.4byte	0x5811
+	.uleb128 0x51
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x118
-	.4byte	0x30c
-	.4byte	.LLST115
-	.uleb128 0x3e
+	.4byte	0x30a
+	.4byte	.LLST111
+	.uleb128 0x3d
 	.4byte	.LASF646
 	.byte	0x3
 	.2byte	0x119
-	.4byte	0x30c
-	.uleb128 0x38
+	.4byte	0x30a
+	.uleb128 0x37
 	.4byte	.LASF362
-	.4byte	0x48ad
+	.4byte	0x4898
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.6235
-	.uleb128 0x31
+	.4byte	__func__.3490
+	.uleb128 0x23
+	.4byte	.LVL494
+	.4byte	0x680f
+	.uleb128 0x23
+	.4byte	.LVL495
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL496
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL497
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL498
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL499
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL500
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL501
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL502
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL503
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL504
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL505
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL506
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL507
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL508
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL509
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL510
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL511
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL512
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL513
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL514
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL515
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL516
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL517
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL518
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL519
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL520
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL521
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL522
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x17c6
+	.uleb128 0x23
 	.4byte	.LVL523
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL524
-	.4byte	0x17c6
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL525
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL526
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL527
-	.4byte	0x6813
-	.uleb128 0x31
+	.4byte	0x680f
+	.uleb128 0x23
 	.4byte	.LVL528
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL529
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL530
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL533
-	.4byte	0x67f2
+	.4byte	0x680f
+	.uleb128 0x23
+	.4byte	.LVL531
+	.4byte	0x67ee
 	.byte	0
 	.uleb128 0x2a
 	.4byte	.LASF647
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB155
 	.4byte	.LFE155-.LFB155
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5872
-	.uleb128 0x23
+	.4byte	0x5862
+	.uleb128 0x22
 	.4byte	.LASF628
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x534d
+	.4byte	0x533d
 	.4byte	.LLST11
-	.uleb128 0x4a
+	.uleb128 0x49
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0xb8
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LLST12
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL27
+	.4byte	0x58a3
+	.uleb128 0x23
 	.4byte	.LVL28
-	.4byte	0x58b3
-	.uleb128 0x31
-	.4byte	.LVL29
-	.4byte	0x58b3
-	.uleb128 0x31
+	.4byte	0x58a3
+	.uleb128 0x23
 	.4byte	.LVL32
-	.4byte	0x5872
+	.4byte	0x5862
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF648
 	.byte	0x3
 	.byte	0xa4
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB154
 	.4byte	.LFE154-.LFB154
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x589b
-	.uleb128 0x23
+	.4byte	0x588b
+	.uleb128 0x22
 	.4byte	.LASF649
 	.byte	0x3
 	.byte	0xa4
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LLST10
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.4byte	.LASF650
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x58b3
-	.uleb128 0x34
+	.4byte	0x58a3
+	.uleb128 0x33
 	.4byte	.LASF651
 	.byte	0x3
 	.byte	0x9e
-	.4byte	0x30c
+	.4byte	0x30a
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF652
 	.byte	0x3
 	.byte	0x7e
-	.4byte	0x301
+	.4byte	0x2ff
 	.4byte	.LFB152
 	.4byte	.LFE152-.LFB152
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58f2
+	.4byte	0x58e2
 	.uleb128 0x2b
 	.ascii	"num\000"
 	.byte	0x3
 	.byte	0x7e
-	.4byte	0x30c
+	.4byte	0x30a
 	.4byte	.LLST9
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0x80
-	.4byte	0x301
-	.uleb128 0x20
+	.4byte	0x2ff
+	.uleb128 0x1f
 	.4byte	.LASF653
 	.byte	0x3
 	.byte	0x81
-	.4byte	0x30c
+	.4byte	0x30a
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF654
 	.byte	0x3
 	.byte	0x70
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB151
 	.4byte	.LFE151-.LFB151
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5938
-	.uleb128 0x23
+	.4byte	0x5928
+	.uleb128 0x22
 	.4byte	.LASF85
 	.byte	0x3
 	.byte	0x70
-	.4byte	0xb6
-	.4byte	.LLST65
+	.4byte	0xb4
+	.4byte	.LLST61
 	.uleb128 0x29
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0x72
-	.4byte	0xb6
-	.uleb128 0x31
-	.4byte	.LVL286
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL287
-	.4byte	0x5938
+	.4byte	0xb4
+	.uleb128 0x23
+	.4byte	.LVL276
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL277
+	.4byte	0x5928
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.4byte	.LASF655
 	.byte	0x3
 	.byte	0xa
-	.4byte	0x64
+	.4byte	0x62
 	.4byte	.LFB150
 	.4byte	.LFE150-.LFB150
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c2e
-	.uleb128 0x23
+	.4byte	0x5c1e
+	.uleb128 0x22
 	.4byte	.LASF85
 	.byte	0x3
 	.byte	0xa
-	.4byte	0xb6
-	.4byte	.LLST62
+	.4byte	0xb4
+	.4byte	.LLST58
 	.uleb128 0x29
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0xc
-	.4byte	0x64
+	.4byte	0x62
 	.uleb128 0x29
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0xd
-	.4byte	0xb6
-	.uleb128 0x53
-	.4byte	.LBB289
-	.4byte	.LBE289-.LBB289
-	.4byte	0x59a3
+	.4byte	0xb4
+	.uleb128 0x52
+	.4byte	.LBB285
+	.4byte	.LBE285-.LBB285
+	.4byte	0x5993
 	.uleb128 0x2c
 	.4byte	.LASF392
 	.byte	0x3
 	.byte	0x56
-	.4byte	0x301
-	.4byte	.LLST63
-	.uleb128 0x31
-	.4byte	.LVL277
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL279
-	.4byte	0x681e
+	.4byte	0x2ff
+	.4byte	.LLST59
+	.uleb128 0x23
+	.4byte	.LVL267
+	.4byte	0x3fa5
+	.uleb128 0x23
+	.4byte	.LVL269
+	.4byte	0x681a
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LBB290
-	.4byte	.LBE290-.LBB290
-	.4byte	0x59c9
+	.uleb128 0x52
+	.4byte	.LBB286
+	.4byte	.LBE286-.LBB286
+	.4byte	0x59b9
 	.uleb128 0x2c
 	.4byte	.LASF392
 	.byte	0x3
 	.byte	0x5f
-	.4byte	0x301
-	.4byte	.LLST64
-	.uleb128 0x31
-	.4byte	.LVL283
-	.4byte	0x681e
+	.4byte	0x2ff
+	.4byte	.LLST60
+	.uleb128 0x23
+	.4byte	.LVL273
+	.4byte	0x681a
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL197
+	.4byte	0x6826
+	.uleb128 0x23
+	.4byte	.LVL198
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL199
+	.4byte	0x6826
+	.uleb128 0x23
+	.4byte	.LVL200
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL201
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL202
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL203
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL204
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL205
+	.4byte	0x681a
+	.uleb128 0x23
+	.4byte	.LVL206
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL207
-	.4byte	0x682a
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL208
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL209
-	.4byte	0x682a
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL210
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL211
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL212
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL213
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL214
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL215
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL216
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL217
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL218
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL219
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL220
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL221
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL222
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL223
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL224
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL225
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL226
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL227
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL228
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL229
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL230
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL231
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL232
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL233
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL234
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL235
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL236
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL237
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL238
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL239
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL240
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL241
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL242
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL243
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL244
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL245
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL246
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL247
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL248
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL249
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL250
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL251
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL252
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL253
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL254
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL255
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL256
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL257
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL258
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL259
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL260
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x278e
+	.uleb128 0x23
 	.4byte	.LVL261
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL262
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x273f
+	.uleb128 0x23
 	.4byte	.LVL263
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL264
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL265
-	.4byte	0x681e
-	.uleb128 0x31
+	.4byte	0x681a
+	.uleb128 0x23
 	.4byte	.LVL266
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL267
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL268
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL269
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL270
-	.4byte	0x278b
-	.uleb128 0x31
-	.4byte	.LVL271
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL272
-	.4byte	0x273c
-	.uleb128 0x31
-	.4byte	.LVL273
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL276
-	.4byte	0x681e
+	.4byte	0x681a
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x3419
+	.uleb128 0x5f
+	.4byte	0x3416
 	.4byte	.LFB286
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c50
-	.uleb128 0x61
-	.4byte	0x3426
+	.4byte	0x5c40
+	.uleb128 0x60
+	.4byte	0x3423
 	.4byte	.LLST8
 	.uleb128 0x2e
-	.4byte	0x3432
+	.4byte	0x342f
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x589b
+	.uleb128 0x5f
+	.4byte	0x588b
 	.4byte	.LFB153
 	.4byte	.LFE153-.LFB153
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c6b
-	.uleb128 0x62
-	.4byte	0x58a7
+	.4byte	0x5c5b
+	.uleb128 0x61
+	.4byte	0x5897
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x5573
+	.uleb128 0x5f
+	.4byte	0x5563
 	.4byte	.LFB158
 	.4byte	.LFE158-.LFB158
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ca3
-	.uleb128 0x61
-	.4byte	0x5584
+	.4byte	0x5c93
+	.uleb128 0x60
+	.4byte	0x5574
 	.4byte	.LLST13
 	.uleb128 0x30
-	.4byte	0x5590
+	.4byte	0x5580
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x2e
-	.4byte	0x5584
+	.4byte	0x5574
 	.uleb128 0x2f
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x30
-	.4byte	0x5c87
+	.4byte	0x5c77
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x63
-	.4byte	0x4aaf
+	.uleb128 0x62
+	.4byte	0x4a96
 	.4byte	.LFB174
 	.4byte	.LFE174-.LFB174
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x63
-	.4byte	0x43b4
+	.uleb128 0x62
+	.4byte	0x43a1
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 	.4byte	.LFE188-.LFB188
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x63
-	.4byte	0x43a8
+	.uleb128 0x62
+	.4byte	0x4395
 	.4byte	.LFB189
 	.4byte	.LFE189-.LFB189
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x60
-	.4byte	0x4188
+	.uleb128 0x5f
+	.4byte	0x4175
 	.4byte	.LFB196
 	.4byte	.LFE196-.LFB196
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d6a
-	.uleb128 0x61
-	.4byte	0x4198
-	.4byte	.LLST28
+	.4byte	0x5d5a
+	.uleb128 0x60
+	.4byte	0x4185
+	.4byte	.LLST26
 	.uleb128 0x30
-	.4byte	0x41a3
+	.4byte	0x4190
 	.uleb128 0x30
-	.4byte	0x41ae
+	.4byte	0x419b
 	.uleb128 0x30
-	.4byte	0x41b9
+	.4byte	0x41a6
 	.uleb128 0x30
-	.4byte	0x41c4
+	.4byte	0x41b1
 	.uleb128 0x30
-	.4byte	0x41cf
+	.4byte	0x41bc
 	.uleb128 0x30
-	.4byte	0x41da
+	.4byte	0x41c7
 	.uleb128 0x30
-	.4byte	0x41e5
+	.4byte	0x41d2
 	.uleb128 0x30
-	.4byte	0x41f0
+	.4byte	0x41dd
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x68
+	.4byte	.Ldebug_ranges0+0x70
 	.uleb128 0x2e
-	.4byte	0x4198
+	.4byte	0x4185
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x68
-	.uleb128 0x64
-	.4byte	0x5cec
+	.4byte	.Ldebug_ranges0+0x70
+	.uleb128 0x63
+	.4byte	0x5cdc
+	.4byte	.LLST27
+	.uleb128 0x63
+	.4byte	0x5ce1
+	.4byte	.LLST28
+	.uleb128 0x63
+	.4byte	0x5ce6
 	.4byte	.LLST29
-	.uleb128 0x64
-	.4byte	0x5cf1
+	.uleb128 0x63
+	.4byte	0x5ceb
 	.4byte	.LLST30
-	.uleb128 0x64
-	.4byte	0x5cf6
+	.uleb128 0x63
+	.4byte	0x5cf0
 	.4byte	.LLST31
-	.uleb128 0x64
-	.4byte	0x5cfb
+	.uleb128 0x63
+	.4byte	0x5cf5
 	.4byte	.LLST32
-	.uleb128 0x64
-	.4byte	0x5d00
-	.4byte	.LLST33
-	.uleb128 0x64
-	.4byte	0x5d05
-	.4byte	.LLST34
 	.uleb128 0x30
-	.4byte	0x5d0a
-	.uleb128 0x64
-	.4byte	0x5d0f
-	.4byte	.LLST35
+	.4byte	0x5cfa
+	.uleb128 0x63
+	.4byte	0x5cff
+	.4byte	.LLST33
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x41fd
+	.uleb128 0x5f
+	.4byte	0x41ea
 	.4byte	.LFB195
 	.4byte	.LFE195-.LFB195
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5db8
-	.uleb128 0x61
-	.4byte	0x4209
-	.4byte	.LLST36
+	.4byte	0x5db0
+	.uleb128 0x60
+	.4byte	0x41f6
+	.4byte	.LLST34
 	.uleb128 0x30
-	.4byte	0x4214
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x80
-	.4byte	0x5dae
+	.4byte	0x4201
+	.uleb128 0x52
+	.4byte	.LBB265
+	.4byte	.LBE265-.LBB265
+	.4byte	0x5da6
 	.uleb128 0x2e
-	.4byte	0x4209
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x80
+	.4byte	0x41f6
+	.uleb128 0x32
+	.4byte	.LBB266
+	.4byte	.LBE266-.LBB266
 	.uleb128 0x30
-	.4byte	0x5d86
-	.uleb128 0x24
-	.4byte	.LVL118
-	.4byte	0x67f2
+	.4byte	0x5d76
+	.uleb128 0x23
+	.4byte	.LVL112
+	.4byte	0x67ee
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL117
-	.4byte	0x4188
+	.uleb128 0x23
+	.4byte	.LVL111
+	.4byte	0x4175
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x4222
+	.uleb128 0x5f
+	.4byte	0x420f
 	.4byte	.LFB194
 	.4byte	.LFE194-.LFB194
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x5e06
-	.uleb128 0x61
-	.4byte	0x422e
-	.4byte	.LLST39
+	.uleb128 0x60
+	.4byte	0x421b
+	.4byte	.LLST36
 	.uleb128 0x30
-	.4byte	0x4239
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x98
+	.4byte	0x4226
+	.uleb128 0x52
+	.4byte	.LBB269
+	.4byte	.LBE269-.LBB269
 	.4byte	0x5dfc
 	.uleb128 0x2e
-	.4byte	0x422e
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x98
+	.4byte	0x421b
+	.uleb128 0x32
+	.4byte	.LBB270
+	.4byte	.LBE270-.LBB270
 	.uleb128 0x30
-	.4byte	0x5dd4
-	.uleb128 0x24
-	.4byte	.LVL128
-	.4byte	0x67f2
+	.4byte	0x5dcc
+	.uleb128 0x23
+	.4byte	.LVL122
+	.4byte	0x67ee
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL127
-	.4byte	0x4119
+	.uleb128 0x23
+	.4byte	.LVL121
+	.4byte	0x4108
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x3f37
+	.uleb128 0x5f
+	.4byte	0x3f26
 	.4byte	.LFB202
 	.4byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5eba
-	.uleb128 0x61
-	.4byte	0x3f48
-	.4byte	.LLST48
+	.4byte	0x5ec0
+	.uleb128 0x60
+	.4byte	0x3f37
+	.4byte	.LLST45
 	.uleb128 0x30
-	.4byte	0x3f54
+	.4byte	0x3f43
 	.uleb128 0x30
-	.4byte	0x3f60
+	.4byte	0x3f4f
 	.uleb128 0x30
-	.4byte	0x3f6c
+	.4byte	0x3f5b
 	.uleb128 0x30
-	.4byte	0x3f78
+	.4byte	0x3f67
 	.uleb128 0x30
-	.4byte	0x3f84
+	.4byte	0x3f73
 	.uleb128 0x30
-	.4byte	0x3f90
+	.4byte	0x3f7f
 	.uleb128 0x30
-	.4byte	0x3f9c
+	.4byte	0x3f8b
 	.uleb128 0x30
-	.4byte	0x3fa8
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	0x3f97
+	.uleb128 0x32
+	.4byte	.LBB273
+	.4byte	.LBE273-.LBB273
 	.uleb128 0x2e
-	.4byte	0x3f48
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	0x3f37
+	.uleb128 0x32
+	.4byte	.LBB274
+	.4byte	.LBE274-.LBB274
 	.uleb128 0x30
 	.4byte	0x5e22
-	.uleb128 0x64
+	.uleb128 0x63
 	.4byte	0x5e27
-	.4byte	.LLST49
+	.4byte	.LLST46
 	.uleb128 0x64
 	.4byte	0x5e2c
-	.4byte	.LLST50
-	.uleb128 0x64
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x63
 	.4byte	0x5e31
-	.4byte	.LLST51
-	.uleb128 0x64
+	.4byte	.LLST47
+	.uleb128 0x63
 	.4byte	0x5e36
-	.4byte	.LLST52
-	.uleb128 0x65
+	.4byte	.LLST48
+	.uleb128 0x64
 	.4byte	0x5e3b
 	.uleb128 0x1
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+	.byte	0x57
 	.uleb128 0x30
 	.4byte	0x5e40
 	.uleb128 0x30
 	.4byte	0x5e45
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL158
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL162
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL166
-	.4byte	0x4097
-	.uleb128 0x31
-	.4byte	.LVL167
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL168
-	.4byte	0x41fd
+	.4byte	0x4086
+	.uleb128 0x23
+	.4byte	.LVL163
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL164
+	.4byte	0x41ea
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x3719
+	.uleb128 0x5f
+	.4byte	0x3712
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 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ef2
-	.uleb128 0x61
-	.4byte	0x3726
-	.4byte	.LLST53
+	.4byte	0x5ef8
+	.uleb128 0x60
+	.4byte	0x371f
+	.4byte	.LLST49
 	.uleb128 0x30
-	.4byte	0x3732
+	.4byte	0x372b
 	.uleb128 0x2f
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+	.4byte	.Ldebug_ranges0+0x88
 	.uleb128 0x2e
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 	.uleb128 0x2f
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 	.uleb128 0x30
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 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
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 	.uleb128 0x1
 	.byte	0x9c
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-	.uleb128 0x61
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-	.uleb128 0x61
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-	.4byte	.LLST55
-	.uleb128 0x24
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-	.4byte	0x5c2e
-	.byte	0
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 	.uleb128 0x60
-	.4byte	0x2d11
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+	.uleb128 0x23
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+	.4byte	0x5c1e
+	.byte	0
+	.uleb128 0x5f
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 	.uleb128 0x1
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-	.uleb128 0x62
-	.4byte	0x2d1e
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 	.uleb128 0x1
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 	.uleb128 0x30
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-	.uleb128 0x33
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 	.uleb128 0x2e
-	.4byte	0x2d1e
-	.uleb128 0x33
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 	.uleb128 0x1
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 	.uleb128 0x1
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-	.uleb128 0x61
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-	.uleb128 0x33
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-	.4byte	.LBE293-.LBB293
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 	.uleb128 0x2e
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 	.uleb128 0x1
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 	.byte	0
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 	.uleb128 0x1
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 	.byte	0
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 	.uleb128 0x30
 	.4byte	0x191b
 	.uleb128 0x30
 	.4byte	0x1926
 	.uleb128 0x30
 	.4byte	0x1931
-	.uleb128 0x33
-	.4byte	.LBB337
-	.4byte	.LBE337-.LBB337
+	.uleb128 0x32
+	.4byte	.LBB335
+	.4byte	.LBE335-.LBB335
 	.uleb128 0x2e
 	.4byte	0x1910
-	.uleb128 0x33
-	.4byte	.LBB338
-	.4byte	.LBE338-.LBB338
+	.uleb128 0x32
+	.4byte	.LBB336
+	.4byte	.LBE336-.LBB336
 	.uleb128 0x30
-	.4byte	0x60c8
-	.uleb128 0x65
-	.4byte	0x60cd
+	.4byte	0x60cc
+	.uleb128 0x64
+	.4byte	0x60d1
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x65
-	.4byte	0x60d2
+	.sleb128 -88
+	.uleb128 0x64
+	.4byte	0x60d6
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x67
+	.sleb128 -108
+	.uleb128 0x66
 	.4byte	0x193c
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB339
-	.4byte	.Ldebug_ranges0+0x130
+	.4byte	.LBB337
+	.4byte	.Ldebug_ranges0+0xf0
 	.byte	0x1
 	.byte	0xa7
-	.4byte	0x615b
+	.4byte	0x615f
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33892,7 +35441,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x130
+	.4byte	.Ldebug_ranges0+0xf0
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33900,24 +35449,24 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x130
+	.4byte	.Ldebug_ranges0+0xf0
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL476
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL477
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
 	.4byte	0x17c6
-	.4byte	.LBB345
-	.4byte	.Ldebug_ranges0+0x148
+	.4byte	.LBB343
+	.4byte	.Ldebug_ranges0+0x108
 	.byte	0x1
 	.byte	0xa8
-	.4byte	0x61a3
+	.4byte	0x61a7
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33925,7 +35474,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x148
+	.4byte	.Ldebug_ranges0+0x108
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
@@ -33933,7 +35482,7 @@ check_vpc_table:
 	.uleb128 0x2e
 	.4byte	0x17d6
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x148
+	.4byte	.Ldebug_ranges0+0x108
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
@@ -33941,625 +35490,623 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL477
-	.4byte	0x1954
-	.uleb128 0x31
+	.uleb128 0x23
 	.4byte	.LVL478
-	.4byte	0x19ea
-	.uleb128 0x31
+	.4byte	0x1954
+	.uleb128 0x23
 	.4byte	.LVL479
+	.4byte	0x19ea
+	.uleb128 0x23
+	.4byte	.LVL480
 	.4byte	0x1954
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x5f
 	.4byte	0x17c6
 	.4byte	.LFB277
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x623e
-	.uleb128 0x61
+	.uleb128 0x60
 	.4byte	0x17d6
-	.4byte	.LLST112
-	.uleb128 0x61
+	.4byte	.LLST108
+	.uleb128 0x60
 	.4byte	0x17df
-	.4byte	.LLST113
-	.uleb128 0x61
+	.4byte	.LLST109
+	.uleb128 0x60
 	.4byte	0x17e8
-	.4byte	.LLST114
-	.uleb128 0x53
-	.4byte	.LBB377
-	.4byte	.LBE377-.LBB377
+	.4byte	.LLST110
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x140
 	.4byte	0x6207
 	.uleb128 0x30
 	.4byte	0x17f2
 	.uleb128 0x30
 	.4byte	0x17fd
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LBB378
-	.4byte	.LBE378-.LBB378
+	.uleb128 0x32
+	.4byte	.LBB377
+	.4byte	.LBE377-.LBB377
 	.uleb128 0x2e
 	.4byte	0x17e8
 	.uleb128 0x2e
 	.4byte	0x17df
 	.uleb128 0x2e
 	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB379
-	.4byte	.LBE379-.LBB379
+	.uleb128 0x32
+	.4byte	.LBB378
+	.4byte	.LBE378-.LBB378
 	.uleb128 0x30
 	.4byte	0x61fc
 	.uleb128 0x30
 	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL495
-	.4byte	0x67e7
+	.uleb128 0x23
+	.4byte	.LVL493
+	.4byte	0x67e3
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x1d5a
+	.uleb128 0x5f
+	.4byte	0x1d5d
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x62dc
-	.uleb128 0x65
-	.4byte	0x1d6b
+	.4byte	0x62d8
+	.uleb128 0x64
+	.4byte	0x1d6e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x30
-	.4byte	0x1d77
+	.4byte	0x1d7a
 	.uleb128 0x30
-	.4byte	0x1d81
+	.4byte	0x1d84
 	.uleb128 0x30
-	.4byte	0x1d8d
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x1d90
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x188
 	.4byte	0x62c8
 	.uleb128 0x30
 	.4byte	0x6251
 	.uleb128 0x30
 	.4byte	0x6258
-	.uleb128 0x64
+	.uleb128 0x63
 	.4byte	0x625d
-	.4byte	.LLST147
-	.uleb128 0x65
+	.4byte	.LLST143
+	.uleb128 0x64
 	.4byte	0x6262
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x53
-	.4byte	.LBB400
-	.4byte	.LBE400-.LBB400
+	.sleb128 -88
+	.uleb128 0x52
+	.4byte	.LBB399
+	.4byte	.LBE399-.LBB399
 	.4byte	0x62be
-	.uleb128 0x65
-	.4byte	0x1d9e
+	.uleb128 0x64
+	.4byte	0x1da1
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x31
-	.4byte	.LVL659
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL660
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL661
-	.4byte	0x1e6d
+	.sleb128 -108
+	.uleb128 0x23
+	.4byte	.LVL663
+	.4byte	0x1af9
+	.uleb128 0x23
+	.4byte	.LVL664
+	.4byte	0x4507
+	.uleb128 0x23
+	.4byte	.LVL665
+	.4byte	0x1e70
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL658
-	.4byte	0x3939
+	.uleb128 0x23
+	.4byte	.LVL662
+	.4byte	0x392e
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LBB403
-	.4byte	.LBE403-.LBB403
-	.uleb128 0x64
-	.4byte	0x1dac
-	.4byte	.LLST148
+	.uleb128 0x32
+	.4byte	.LBB402
+	.4byte	.LBE402-.LBB402
+	.uleb128 0x30
+	.4byte	0x1daf
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x1dba
+	.uleb128 0x5f
+	.4byte	0x1dbd
 	.4byte	.LFB267
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6367
-	.uleb128 0x61
-	.4byte	0x1dcb
-	.4byte	.LLST189
+	.4byte	0x6363
+	.uleb128 0x60
+	.4byte	0x1dce
+	.4byte	.LLST184
 	.uleb128 0x30
-	.4byte	0x1dd7
+	.4byte	0x1dda
 	.uleb128 0x30
-	.4byte	0x1de3
+	.4byte	0x1de6
 	.uleb128 0x30
-	.4byte	0x1ded
+	.4byte	0x1df0
 	.uleb128 0x30
-	.4byte	0x1df7
+	.4byte	0x1dfa
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x200
+	.4byte	.Ldebug_ranges0+0x1d8
 	.uleb128 0x2e
-	.4byte	0x1dcb
+	.4byte	0x1dce
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x200
+	.4byte	.Ldebug_ranges0+0x1d8
 	.uleb128 0x30
-	.4byte	0x62f8
-	.uleb128 0x65
-	.4byte	0x62fd
+	.4byte	0x62f4
+	.uleb128 0x64
+	.4byte	0x62f9
 	.uleb128 0x1
-	.byte	0x55
+	.byte	0x54
+	.uleb128 0x63
+	.4byte	0x62fe
+	.4byte	.LLST185
 	.uleb128 0x64
-	.4byte	0x6302
-	.4byte	.LLST190
-	.uleb128 0x65
-	.4byte	0x6307
+	.4byte	0x6303
 	.uleb128 0x1
 	.byte	0x59
-	.uleb128 0x31
-	.4byte	.LVL884
-	.4byte	0x1e04
-	.uleb128 0x31
-	.4byte	.LVL886
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL887
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL888
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL889
-	.4byte	0x4954
+	.uleb128 0x23
+	.4byte	.LVL890
+	.4byte	0x456f
+	.uleb128 0x23
+	.4byte	.LVL891
+	.4byte	0x1e07
+	.uleb128 0x23
+	.4byte	.LVL892
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL893
+	.4byte	0x4af9
+	.uleb128 0x23
+	.4byte	.LVL894
+	.4byte	0x493b
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x23a4
+	.uleb128 0x5f
+	.4byte	0x23a7
 	.4byte	.LFB251
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63e1
-	.uleb128 0x61
-	.4byte	0x23b5
-	.4byte	.LLST191
+	.4byte	0x63dd
+	.uleb128 0x60
+	.4byte	0x23b8
+	.4byte	.LLST186
 	.uleb128 0x30
-	.4byte	0x23c1
-	.uleb128 0x53
+	.4byte	0x23c4
+	.uleb128 0x52
+	.4byte	.LBB463
+	.4byte	.LBE463-.LBB463
+	.4byte	0x63d3
+	.uleb128 0x2e
+	.4byte	0x23b8
+	.uleb128 0x32
 	.4byte	.LBB464
 	.4byte	.LBE464-.LBB464
-	.4byte	0x63d7
-	.uleb128 0x2e
-	.4byte	0x23b5
-	.uleb128 0x33
-	.4byte	.LBB465
-	.4byte	.LBE465-.LBB465
 	.uleb128 0x30
-	.4byte	0x6383
-	.uleb128 0x31
-	.4byte	.LVL894
-	.4byte	0x4097
-	.uleb128 0x31
-	.4byte	.LVL895
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL896
-	.4byte	0x2674
-	.uleb128 0x31
-	.4byte	.LVL897
-	.4byte	0x1dba
-	.uleb128 0x31
-	.4byte	.LVL898
-	.4byte	0x67f2
+	.4byte	0x637f
+	.uleb128 0x23
+	.4byte	.LVL899
+	.4byte	0x4086
+	.uleb128 0x23
+	.4byte	.LVL900
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL901
+	.4byte	0x2677
+	.uleb128 0x23
+	.4byte	.LVL902
+	.4byte	0x1dbd
+	.uleb128 0x23
+	.4byte	.LVL903
+	.4byte	0x67ee
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL901
-	.4byte	0x3f37
+	.uleb128 0x23
+	.4byte	.LVL904
+	.4byte	0x3f26
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x365f
+	.uleb128 0x5f
+	.4byte	0x3658
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6459
+	.4byte	0x6455
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x218
-	.uleb128 0x64
-	.4byte	0x366d
-	.4byte	.LLST193
-	.uleb128 0x64
-	.4byte	0x3679
-	.4byte	.LLST194
+	.4byte	.Ldebug_ranges0+0x1f0
+	.uleb128 0x63
+	.4byte	0x3666
+	.4byte	.LLST188
+	.uleb128 0x63
+	.4byte	0x3672
+	.4byte	.LLST189
+	.uleb128 0x63
+	.4byte	0x367e
+	.4byte	.LLST190
 	.uleb128 0x64
-	.4byte	0x3685
-	.4byte	.LLST195
-	.uleb128 0x65
-	.4byte	0x3691
+	.4byte	0x368a
 	.uleb128 0x2
 	.byte	0x91
-	.sleb128 -52
+	.sleb128 -64
 	.uleb128 0x30
-	.4byte	0x369d
-	.uleb128 0x31
-	.4byte	.LVL909
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL910
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL913
-	.4byte	0x17c6
-	.uleb128 0x31
+	.4byte	0x3696
+	.uleb128 0x23
+	.4byte	.LVL911
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL912
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL915
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL916
-	.4byte	0x19ea
-	.uleb128 0x31
+	.4byte	0x17c6
+	.uleb128 0x23
 	.4byte	.LVL917
-	.4byte	0x232e
+	.4byte	0x23e7
+	.uleb128 0x23
+	.4byte	.LVL918
+	.4byte	0x19ea
+	.uleb128 0x23
+	.4byte	.LVL919
+	.4byte	0x2331
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x2b83
+	.uleb128 0x5f
+	.4byte	0x2b86
 	.4byte	.LFB236
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6476
-	.uleb128 0x24
-	.4byte	.LVL1125
-	.4byte	0x3860
+	.4byte	0x6472
+	.uleb128 0x23
+	.4byte	.LVL1114
+	.4byte	0x3859
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x343f
+	.uleb128 0x5f
+	.4byte	0x343c
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x64a5
-	.uleb128 0x31
-	.4byte	.LVL1153
-	.4byte	0x378a
-	.uleb128 0x31
-	.4byte	.LVL1154
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1155
+	.4byte	0x64a1
+	.uleb128 0x23
+	.4byte	.LVL1141
+	.4byte	0x3783
+	.uleb128 0x23
+	.4byte	.LVL1142
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1143
 	.4byte	0x17c6
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x1f6f
+	.uleb128 0x5f
+	.4byte	0x1f72
 	.4byte	.LFB261
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x64d4
-	.uleb128 0x31
-	.4byte	.LVL1280
-	.4byte	0x1f78
-	.uleb128 0x31
-	.4byte	.LVL1281
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1282
-	.4byte	0x20c4
+	.4byte	0x64d0
+	.uleb128 0x23
+	.4byte	.LVL1265
+	.4byte	0x1f7b
+	.uleb128 0x23
+	.4byte	.LVL1266
+	.4byte	0x36a4
+	.uleb128 0x23
+	.4byte	.LVL1267
+	.4byte	0x20c7
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x1c72
+	.uleb128 0x5f
+	.4byte	0x1c75
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x66c5
-	.uleb128 0x61
-	.4byte	0x1c83
-	.4byte	.LLST256
-	.uleb128 0x61
-	.4byte	0x1c8f
-	.4byte	.LLST257
+	.4byte	0x66c1
+	.uleb128 0x60
+	.4byte	0x1c86
+	.4byte	.LLST245
+	.uleb128 0x60
+	.4byte	0x1c92
+	.4byte	.LLST246
 	.uleb128 0x30
-	.4byte	0x1c9b
+	.4byte	0x1c9e
 	.uleb128 0x30
-	.4byte	0x1ca7
+	.4byte	0x1caa
 	.uleb128 0x30
-	.4byte	0x1cb3
+	.4byte	0x1cb6
 	.uleb128 0x30
-	.4byte	0x1cbf
+	.4byte	0x1cc2
 	.uleb128 0x30
-	.4byte	0x1ccb
+	.4byte	0x1cce
 	.uleb128 0x30
-	.4byte	0x1cd7
+	.4byte	0x1cda
 	.uleb128 0x30
-	.4byte	0x1ce3
+	.4byte	0x1ce6
 	.uleb128 0x30
-	.4byte	0x1cef
+	.4byte	0x1cf2
 	.uleb128 0x30
-	.4byte	0x1cfb
+	.4byte	0x1cfe
 	.uleb128 0x30
-	.4byte	0x1d07
+	.4byte	0x1d0a
 	.uleb128 0x30
-	.4byte	0x1d23
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x268
-	.4byte	0x66bb
+	.4byte	0x1d26
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x258
+	.4byte	0x66b7
 	.uleb128 0x2e
-	.4byte	0x1c8f
+	.4byte	0x1c92
 	.uleb128 0x2e
-	.4byte	0x1c83
+	.4byte	0x1c86
 	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x268
-	.uleb128 0x64
-	.4byte	0x64f9
-	.4byte	.LLST258
-	.uleb128 0x64
-	.4byte	0x64fe
-	.4byte	.LLST259
-	.uleb128 0x64
-	.4byte	0x6503
-	.4byte	.LLST260
-	.uleb128 0x30
-	.4byte	0x6508
-	.uleb128 0x30
-	.4byte	0x650d
-	.uleb128 0x30
-	.4byte	0x6512
-	.uleb128 0x64
-	.4byte	0x6517
-	.4byte	.LLST261
-	.uleb128 0x64
-	.4byte	0x651c
-	.4byte	.LLST262
-	.uleb128 0x64
-	.4byte	0x6521
-	.4byte	.LLST263
-	.uleb128 0x64
-	.4byte	0x6526
-	.4byte	.LLST264
-	.uleb128 0x67
-	.4byte	0x1d13
-	.uleb128 0x67
-	.4byte	0x1d1b
+	.4byte	.Ldebug_ranges0+0x258
+	.uleb128 0x63
+	.4byte	0x64f5
+	.4byte	.LLST247
+	.uleb128 0x63
+	.4byte	0x64fa
+	.4byte	.LLST248
+	.uleb128 0x63
+	.4byte	0x64ff
+	.4byte	.LLST249
 	.uleb128 0x30
-	.4byte	0x652b
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x290
-	.4byte	0x65e1
+	.4byte	0x6504
 	.uleb128 0x30
-	.4byte	0x1d31
-	.uleb128 0x31
-	.4byte	.LVL1307
-	.4byte	0x2692
-	.uleb128 0x31
-	.4byte	.LVL1308
-	.4byte	0x3fb6
-	.uleb128 0x31
+	.4byte	0x6509
+	.uleb128 0x30
+	.4byte	0x650e
+	.uleb128 0x63
+	.4byte	0x6513
+	.4byte	.LLST250
+	.uleb128 0x63
+	.4byte	0x6518
+	.4byte	.LLST251
+	.uleb128 0x63
+	.4byte	0x651d
+	.4byte	.LLST252
+	.uleb128 0x63
+	.4byte	0x6522
+	.4byte	.LLST253
+	.uleb128 0x66
+	.4byte	0x1d16
+	.uleb128 0x66
+	.4byte	0x1d1e
+	.uleb128 0x30
+	.4byte	0x6527
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x278
+	.4byte	0x65dd
+	.uleb128 0x30
+	.4byte	0x1d34
+	.uleb128 0x23
+	.4byte	.LVL1292
+	.4byte	0x2695
+	.uleb128 0x23
+	.4byte	.LVL1293
+	.4byte	0x3fa5
+	.uleb128 0x23
+	.4byte	.LVL1294
+	.4byte	0x3fa5
+	.uleb128 0x23
+	.4byte	.LVL1295
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1297
+	.4byte	0x1e07
+	.byte	0
+	.uleb128 0x23
 	.4byte	.LVL1309
-	.4byte	0x3fb6
-	.uleb128 0x31
+	.4byte	0x2258
+	.uleb128 0x23
 	.4byte	.LVL1310
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1312
-	.4byte	0x1e04
-	.byte	0
-	.uleb128 0x31
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1316
+	.4byte	0x1d5d
+	.uleb128 0x23
+	.4byte	.LVL1317
+	.4byte	0x3fa5
+	.uleb128 0x23
+	.4byte	.LVL1318
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL1320
+	.4byte	0x2258
+	.uleb128 0x23
+	.4byte	.LVL1321
+	.4byte	0x2331
+	.uleb128 0x23
+	.4byte	.LVL1322
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1323
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1324
-	.4byte	0x2255
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
 	.4byte	.LVL1325
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1330
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1333
-	.4byte	0x1d5a
-	.uleb128 0x31
-	.4byte	.LVL1334
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1335
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1339
-	.4byte	0x2255
-	.uleb128 0x31
-	.4byte	.LVL1340
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1341
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1342
-	.4byte	0x67f2
-	.uleb128 0x31
+	.4byte	0x2c58
+	.uleb128 0x23
+	.4byte	.LVL1327
+	.4byte	0x1d5d
+	.uleb128 0x23
 	.4byte	.LVL1343
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1344
-	.4byte	0x2c55
-	.uleb128 0x31
+	.4byte	0x1af9
+	.uleb128 0x23
 	.4byte	.LVL1346
-	.4byte	0x1d5a
-	.uleb128 0x31
+	.4byte	0x67ee
+	.uleb128 0x23
+	.4byte	.LVL1348
+	.4byte	0x392e
+	.uleb128 0x23
+	.4byte	.LVL1349
+	.4byte	0x1f18
+	.uleb128 0x23
+	.4byte	.LVL1352
+	.4byte	0x228a
+	.uleb128 0x23
+	.4byte	.LVL1353
+	.4byte	0x1ea4
+	.uleb128 0x23
+	.4byte	.LVL1360
+	.4byte	0x1ea4
+	.uleb128 0x23
 	.4byte	.LVL1361
-	.4byte	0x1af8
-	.uleb128 0x31
+	.4byte	0x23a7
+	.uleb128 0x23
+	.4byte	.LVL1362
+	.4byte	0x4f11
+	.uleb128 0x23
 	.4byte	.LVL1363
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1365
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1366
-	.4byte	0x1f15
-	.uleb128 0x31
-	.4byte	.LVL1369
-	.4byte	0x2287
-	.uleb128 0x31
-	.4byte	.LVL1370
-	.4byte	0x1ea1
-	.uleb128 0x31
-	.4byte	.LVL1377
-	.4byte	0x1ea1
-	.uleb128 0x31
-	.4byte	.LVL1378
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1379
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1380
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1381
-	.4byte	0x3598
+	.4byte	0x39f9
+	.uleb128 0x23
+	.4byte	.LVL1364
+	.4byte	0x3593
+	.uleb128 0x23
+	.4byte	.LVL1367
+	.4byte	0x3fa5
 	.byte	0
 	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1311
-	.4byte	0x20c4
+	.uleb128 0x23
+	.4byte	.LVL1296
+	.4byte	0x20c7
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x2815
+	.uleb128 0x5f
+	.4byte	0x2818
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67d3
+	.4byte	0x67cf
 	.uleb128 0x30
-	.4byte	0x2826
-	.uleb128 0x53
-	.4byte	.LBB547
-	.4byte	.LBE547-.LBB547
-	.4byte	0x676f
-	.uleb128 0x64
-	.4byte	0x66d8
-	.4byte	.LLST298
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x2c8
-	.4byte	0x6702
+	.4byte	0x2829
+	.uleb128 0x52
+	.4byte	.LBB544
+	.4byte	.LBE544-.LBB544
+	.4byte	0x676b
+	.uleb128 0x63
+	.4byte	0x66d4
+	.4byte	.LLST287
+	.uleb128 0x38
+	.4byte	.Ldebug_ranges0+0x298
+	.4byte	0x66fe
 	.uleb128 0x30
-	.4byte	0x2831
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1595
-	.4byte	0x2a94
-	.uleb128 0x31
-	.4byte	.LVL1596
-	.4byte	0x2a94
-	.uleb128 0x31
-	.4byte	.LVL1597
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1598
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1599
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1600
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1601
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1604
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1605
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1606
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1607
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1608
-	.4byte	0x29d8
+	.4byte	0x2834
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x23
+	.4byte	.LVL1582
+	.4byte	0x2a97
+	.uleb128 0x23
 	.4byte	.LVL1583
-	.4byte	0x43c0
-	.uleb128 0x31
+	.4byte	0x2a97
+	.uleb128 0x23
 	.4byte	.LVL1584
-	.4byte	0x344c
-	.uleb128 0x31
+	.4byte	0x36a4
+	.uleb128 0x23
 	.4byte	.LVL1585
-	.4byte	0x333f
-	.uleb128 0x31
+	.4byte	0x36a4
+	.uleb128 0x23
 	.4byte	.LVL1586
-	.4byte	0x319f
-	.uleb128 0x31
+	.4byte	0x39f9
+	.uleb128 0x23
 	.4byte	.LVL1587
-	.4byte	0x3201
-	.uleb128 0x31
+	.4byte	0x3593
+	.uleb128 0x23
 	.4byte	.LVL1588
-	.4byte	0x2b09
-	.uleb128 0x31
-	.4byte	.LVL1589
-	.4byte	0x343f
-	.uleb128 0x31
-	.4byte	.LVL1590
-	.4byte	0x4329
-	.uleb128 0x31
+	.4byte	0x3593
+	.uleb128 0x23
 	.4byte	.LVL1591
-	.4byte	0x2b8c
-	.uleb128 0x31
+	.4byte	0x1e70
+	.uleb128 0x23
 	.4byte	.LVL1592
-	.4byte	0x2cc0
-	.uleb128 0x31
+	.4byte	0x1e70
+	.uleb128 0x23
 	.4byte	.LVL1593
-	.4byte	0x3719
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1594
+	.4byte	0x2463
+	.uleb128 0x23
+	.4byte	.LVL1595
+	.4byte	0x29db
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x23
+	.4byte	.LVL1570
+	.4byte	0x43ad
+	.uleb128 0x23
+	.4byte	.LVL1571
+	.4byte	0x3449
+	.uleb128 0x23
+	.4byte	.LVL1572
+	.4byte	0x333c
+	.uleb128 0x23
+	.4byte	.LVL1573
+	.4byte	0x319a
+	.uleb128 0x23
+	.4byte	.LVL1574
+	.4byte	0x31fc
+	.uleb128 0x23
+	.4byte	.LVL1575
+	.4byte	0x2b0c
+	.uleb128 0x23
+	.4byte	.LVL1576
+	.4byte	0x343c
+	.uleb128 0x23
+	.4byte	.LVL1577
+	.4byte	0x4316
+	.uleb128 0x23
+	.4byte	.LVL1578
+	.4byte	0x2b8f
+	.uleb128 0x23
+	.4byte	.LVL1579
+	.4byte	0x2cc3
+	.uleb128 0x23
+	.4byte	.LVL1580
+	.4byte	0x3712
+	.byte	0
+	.uleb128 0x67
 	.4byte	.LASF656
 	.4byte	.LASF656
 	.byte	0x11
 	.byte	0x6f
-	.uleb128 0x69
+	.uleb128 0x68
 	.4byte	.LASF669
 	.4byte	.LASF669
-	.uleb128 0x68
+	.uleb128 0x67
 	.4byte	.LASF657
 	.4byte	.LASF657
 	.byte	0x12
 	.byte	0x19
-	.uleb128 0x68
+	.uleb128 0x67
 	.4byte	.LASF658
 	.4byte	.LASF658
 	.byte	0xb
 	.byte	0x8e
-	.uleb128 0x68
+	.uleb128 0x67
 	.4byte	.LASF659
 	.4byte	.LASF659
 	.byte	0x12
 	.byte	0x1b
-	.uleb128 0x68
+	.uleb128 0x67
 	.4byte	.LASF660
 	.4byte	.LASF660
 	.byte	0x13
 	.byte	0x27
-	.uleb128 0x68
+	.uleb128 0x67
 	.4byte	.LASF661
 	.4byte	.LASF661
 	.byte	0xd
 	.byte	0x18
-	.uleb128 0x6a
+	.uleb128 0x69
 	.4byte	.LASF662
 	.4byte	.LASF662
 	.byte	0xc
 	.2byte	0x19b
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.4byte	.LASF670
 	.4byte	.LASF671
 	.byte	0x14
@@ -34588,13 +36135,6 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x2
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x3
 	.uleb128 0x24
 	.byte	0
 	.uleb128 0xb
@@ -34605,14 +36145,14 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4
+	.uleb128 0x3
 	.uleb128 0x26
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5
+	.uleb128 0x4
 	.uleb128 0x24
 	.byte	0
 	.uleb128 0xb
@@ -34623,7 +36163,7 @@ check_vpc_table:
 	.uleb128 0x8
 	.byte	0
 	.byte	0
-	.uleb128 0x6
+	.uleb128 0x5
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -34636,7 +36176,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x7
+	.uleb128 0x6
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -34649,7 +36189,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x8
+	.uleb128 0x7
 	.uleb128 0xf
 	.byte	0
 	.uleb128 0xb
@@ -34658,7 +36198,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x9
+	.uleb128 0x8
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34675,7 +36215,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xa
+	.uleb128 0x9
 	.uleb128 0x15
 	.byte	0
 	.uleb128 0x27
@@ -34684,14 +36224,14 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0xb
+	.uleb128 0xa
 	.uleb128 0x15
 	.byte	0
 	.uleb128 0x27
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xc
+	.uleb128 0xb
 	.uleb128 0x1
 	.byte	0x1
 	.uleb128 0x49
@@ -34700,12 +36240,12 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0xd
+	.uleb128 0xc
 	.uleb128 0x21
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0xd
 	.uleb128 0x13
 	.byte	0
 	.uleb128 0x3
@@ -34714,7 +36254,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34731,7 +36271,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.uleb128 0x15
 	.byte	0x1
 	.uleb128 0x27
@@ -34742,14 +36282,14 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x12
+	.uleb128 0x11
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -34766,7 +36306,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x13
+	.uleb128 0x12
 	.uleb128 0x28
 	.byte	0
 	.uleb128 0x3
@@ -34775,7 +36315,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x14
+	.uleb128 0x13
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -34790,7 +36330,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x15
+	.uleb128 0x14
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -34805,7 +36345,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x16
+	.uleb128 0x15
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -34820,7 +36360,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x17
+	.uleb128 0x16
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -34829,7 +36369,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x18
+	.uleb128 0x17
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -34844,7 +36384,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x19
+	.uleb128 0x18
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -34853,7 +36393,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x19
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -34868,7 +36408,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x1a
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -34883,7 +36423,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1c
+	.uleb128 0x1b
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -34898,7 +36438,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34915,7 +36455,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34932,7 +36472,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x1e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34947,7 +36487,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -34962,7 +36502,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x20
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x47
@@ -34975,7 +36515,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35002,7 +36542,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x22
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35017,17 +36557,22 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x23
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x2115
-	.uleb128 0x19
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x24
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
 	.uleb128 0x25
 	.uleb128 0x26
 	.byte	0
@@ -35181,15 +36726,6 @@ check_vpc_table:
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x32
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -35204,7 +36740,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x32
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -35213,7 +36749,7 @@ check_vpc_table:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x33
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35226,7 +36762,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x34
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35239,7 +36775,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -35250,7 +36786,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35265,7 +36801,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35278,7 +36814,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -35287,7 +36823,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -35312,7 +36848,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35339,7 +36875,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35360,7 +36896,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35373,7 +36909,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35386,7 +36922,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35399,7 +36935,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3f
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -35410,7 +36946,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35423,14 +36959,14 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35449,7 +36985,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35464,7 +37000,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35479,7 +37015,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35496,7 +37032,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x46
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -35507,7 +37043,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x47
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -35520,7 +37056,7 @@ check_vpc_table:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35545,7 +37081,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35560,7 +37096,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35575,7 +37111,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35590,7 +37126,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35617,7 +37153,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35632,7 +37168,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -35649,7 +37185,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35674,7 +37210,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x50
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35689,7 +37225,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x51
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35704,7 +37240,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x52
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -35715,7 +37251,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -35732,7 +37268,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x54
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35757,7 +37293,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35776,7 +37312,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x56
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -35791,7 +37327,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x57
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -35810,7 +37346,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -35823,7 +37359,7 @@ check_vpc_table:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x59
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -35838,7 +37374,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35857,7 +37393,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -35872,7 +37408,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -35883,7 +37419,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x5d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35900,7 +37436,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x5e
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -35925,7 +37461,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -35942,7 +37478,7 @@ check_vpc_table:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x60
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -35951,7 +37487,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x61
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -35960,7 +37496,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x62
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -35975,7 +37511,7 @@ check_vpc_table:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x63
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -35984,7 +37520,7 @@ check_vpc_table:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x64
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -35993,7 +37529,7 @@ check_vpc_table:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x65
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -36008,14 +37544,14 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x66
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x67
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -36032,7 +37568,7 @@ check_vpc_table:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x68
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -36045,7 +37581,7 @@ check_vpc_table:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -36062,7 +37598,7 @@ check_vpc_table:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -36084,222 +37620,237 @@ check_vpc_table:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST301:
-	.4byte	.LVL1648-.Ltext0
-	.4byte	.LVL1649-1-.Ltext0
+.LLST290:
+	.4byte	.LVL1635-.Ltext0
+	.4byte	.LVL1636-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST302:
-	.4byte	.LVL1648-.Ltext0
-	.4byte	.LVL1649-1-.Ltext0
+.LLST291:
+	.4byte	.LVL1635-.Ltext0
+	.4byte	.LVL1636-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST303:
-	.4byte	.LVL1648-.Ltext0
-	.4byte	.LVL1649-1-.Ltext0
+.LLST292:
+	.4byte	.LVL1635-.Ltext0
+	.4byte	.LVL1636-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST177:
-	.4byte	.LVL829-.Ltext0
-	.4byte	.LVL830-1-.Ltext0
+.LLST172:
+	.4byte	.LVL832-.Ltext0
+	.4byte	.LVL833-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST178:
-	.4byte	.LVL829-.Ltext0
-	.4byte	.LVL830-1-.Ltext0
+.LLST173:
+	.4byte	.LVL832-.Ltext0
+	.4byte	.LVL833-1-.Ltext0
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST179:
-	.4byte	.LVL829-.Ltext0
-	.4byte	.LVL830-1-.Ltext0
+.LLST174:
+	.4byte	.LVL832-.Ltext0
+	.4byte	.LVL833-1-.Ltext0
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST109:
-	.4byte	.LVL483-.Ltext0
-	.4byte	.LVL485-1-.Ltext0
+.LLST105:
+	.4byte	.LVL481-.Ltext0
+	.4byte	.LVL483-1-.Ltext0
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL485-1-.Ltext0
+	.4byte	.LVL483-1-.Ltext0
 	.4byte	.LFE276-.Ltext0
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
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-	.4byte	.LBE278-.Ltext0
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB281-.Ltext0
-	.4byte	.LBE281-.Ltext0
-	.4byte	.LBB284-.Ltext0
-	.4byte	.LBE284-.Ltext0
+	.4byte	.LBB277-.Ltext0
+	.4byte	.LBE277-.Ltext0
+	.4byte	.LBB280-.Ltext0
+	.4byte	.LBE280-.Ltext0
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB297-.Ltext0
+	.4byte	.LBE297-.Ltext0
+	.4byte	.LBB298-.Ltext0
+	.4byte	.LBE298-.Ltext0
 	.4byte	.LBB299-.Ltext0
 	.4byte	.LBE299-.Ltext0
-	.4byte	.LBB300-.Ltext0
-	.4byte	.LBE300-.Ltext0
-	.4byte	.LBB301-.Ltext0
-	.4byte	.LBE301-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB315-.Ltext0
-	.4byte	.LBE315-.Ltext0
+	.4byte	.LBB313-.Ltext0
+	.4byte	.LBE313-.Ltext0
+	.4byte	.LBB316-.Ltext0
+	.4byte	.LBE316-.Ltext0
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB317-.Ltext0
+	.4byte	.LBE317-.Ltext0
 	.4byte	.LBB318-.Ltext0
 	.4byte	.LBE318-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB319-.Ltext0
-	.4byte	.LBE319-.Ltext0
-	.4byte	.LBB320-.Ltext0
-	.4byte	.LBE320-.Ltext0
+	.4byte	.LBB337-.Ltext0
+	.4byte	.LBE337-.Ltext0
+	.4byte	.LBB342-.Ltext0
+	.4byte	.LBE342-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB339-.Ltext0
-	.4byte	.LBE339-.Ltext0
-	.4byte	.LBB344-.Ltext0
-	.4byte	.LBE344-.Ltext0
+	.4byte	.LBB343-.Ltext0
+	.4byte	.LBE343-.Ltext0
+	.4byte	.LBB348-.Ltext0
+	.4byte	.LBE348-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB345-.Ltext0
-	.4byte	.LBE345-.Ltext0
-	.4byte	.LBB350-.Ltext0
-	.4byte	.LBE350-.Ltext0
+	.4byte	.LBB359-.Ltext0
+	.4byte	.LBE359-.Ltext0
+	.4byte	.LBB366-.Ltext0
+	.4byte	.LBE366-.Ltext0
+	.4byte	.LBB367-.Ltext0
+	.4byte	.LBE367-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB361-.Ltext0
-	.4byte	.LBE361-.Ltext0
-	.4byte	.LBB368-.Ltext0
-	.4byte	.LBE368-.Ltext0
-	.4byte	.LBB369-.Ltext0
-	.4byte	.LBE369-.Ltext0
+	.4byte	.LBB375-.Ltext0
+	.4byte	.LBE375-.Ltext0
+	.4byte	.LBB376-.Ltext0
+	.4byte	.LBE376-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB385-.Ltext0
-	.4byte	.LBE385-.Ltext0
-	.4byte	.LBB390-.Ltext0
-	.4byte	.LBE390-.Ltext0
+	.4byte	.LBB384-.Ltext0
+	.4byte	.LBE384-.Ltext0
+	.4byte	.LBB389-.Ltext0
+	.4byte	.LBE389-.Ltext0
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB390-.Ltext0
+	.4byte	.LBE390-.Ltext0
 	.4byte	.LBB391-.Ltext0
 	.4byte	.LBE391-.Ltext0
-	.4byte	.LBB392-.Ltext0
-	.4byte	.LBE392-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB399-.Ltext0
-	.4byte	.LBE399-.Ltext0
-	.4byte	.LBB401-.Ltext0
-	.4byte	.LBE401-.Ltext0
+	.4byte	.LBB398-.Ltext0
+	.4byte	.LBE398-.Ltext0
+	.4byte	.LBB400-.Ltext0
+	.4byte	.LBE400-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB443-.Ltext0
-	.4byte	.LBE443-.Ltext0
+	.4byte	.LBB442-.Ltext0
+	.4byte	.LBE442-.Ltext0
+	.4byte	.LBB449-.Ltext0
+	.4byte	.LBE449-.Ltext0
 	.4byte	.LBB450-.Ltext0
 	.4byte	.LBE450-.Ltext0
-	.4byte	.LBB451-.Ltext0
-	.4byte	.LBE451-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB452-.Ltext0
-	.4byte	.LBE452-.Ltext0
-	.4byte	.LBB455-.Ltext0
-	.4byte	.LBE455-.Ltext0
+	.4byte	.LBB451-.Ltext0
+	.4byte	.LBE451-.Ltext0
+	.4byte	.LBB454-.Ltext0
+	.4byte	.LBE454-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB458-.Ltext0
-	.4byte	.LBE458-.Ltext0
-	.4byte	.LBB461-.Ltext0
-	.4byte	.LBE461-.Ltext0
+	.4byte	.LBB457-.Ltext0
+	.4byte	.LBE457-.Ltext0
+	.4byte	.LBB460-.Ltext0
+	.4byte	.LBE460-.Ltext0
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB469-.Ltext0
+	.4byte	.LBE469-.Ltext0
 	.4byte	.LBB470-.Ltext0
 	.4byte	.LBE470-.Ltext0
-	.4byte	.LBB471-.Ltext0
-	.4byte	.LBE471-.Ltext0
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB472-.Ltext0
+	.4byte	.LBE472-.Ltext0
+	.4byte	.LBB473-.Ltext0
+	.4byte	.LBE473-.Ltext0
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB474-.Ltext0
@@ -40498,12 +41853,10 @@ check_vpc_table:
 	.4byte	0
 	.4byte	.LBB520-.Ltext0
 	.4byte	.LBE520-.Ltext0
+	.4byte	.LBB527-.Ltext0
+	.4byte	.LBE527-.Ltext0
 	.4byte	.LBB528-.Ltext0
 	.4byte	.LBE528-.Ltext0
-	.4byte	.LBB529-.Ltext0
-	.4byte	.LBE529-.Ltext0
-	.4byte	.LBB530-.Ltext0
-	.4byte	.LBE530-.Ltext0
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB522-.Ltext0
@@ -40514,16 +41867,10 @@ check_vpc_table:
 	.4byte	.LBE524-.Ltext0
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB541-.Ltext0
-	.4byte	.LBE541-.Ltext0
-	.4byte	.LBB542-.Ltext0
-	.4byte	.LBE542-.Ltext0
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB548-.Ltext0
-	.4byte	.LBE548-.Ltext0
-	.4byte	.LBB549-.Ltext0
-	.4byte	.LBE549-.Ltext0
+	.4byte	.LBB545-.Ltext0
+	.4byte	.LBE545-.Ltext0
+	.4byte	.LBB546-.Ltext0
+	.4byte	.LBE546-.Ltext0
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -40641,17 +41988,6 @@ check_vpc_table:
 	.ascii	"tmp_erase_count\000"
 .LASF424:
 	.ascii	"allocate_new_data_superblock\000"
-.LASF663:
-	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mabi=aapcs-"
-	.ascii	"linux -mno-thumb-interwork -mfpu=vfp -mthumb -march"
-	.ascii	"=armv7-a -mfloat-abi=soft -mtune=cortex-a9 -mtls-di"
-	.ascii	"alect=gnu -g -Os -std=gnu90 -fno-strict-aliasing -f"
-	.ascii	"no-common -fno-PIE -fno-dwarf2-cfi-asm -fno-ipa-sra"
-	.ascii	" -funwind-tables -fno-delete-null-pointer-checks -f"
-	.ascii	"no-stack-protector -fomit-frame-pointer -fno-var-tr"
-	.ascii	"acking-assignments -fno-strict-overflow -fno-merge-"
-	.ascii	"all-constants -fmerge-constants -fstack-check=no -f"
-	.ascii	"conserve-stack --param allow-store-data-races=0\000"
 .LASF381:
 	.ascii	"gc_next_superblock\000"
 .LASF22:
@@ -40718,6 +42054,8 @@ check_vpc_table:
 	.ascii	"p_sys_data_buf_1\000"
 .LASF44:
 	.ascii	"sysctl_panic_on_stackoverflow\000"
+.LASF616:
+	.ascii	"FtlCacheWriteBack\000"
 .LASF202:
 	.ascii	"c_ftl_nand_map_region_num\000"
 .LASF52:
@@ -41822,8 +43160,18 @@ check_vpc_table:
 	.ascii	"sysBlksPerPlane\000"
 .LASF454:
 	.ascii	"Ftl_save_ext_data\000"
-.LASF616:
-	.ascii	"FtlCacheWriteBack\000"
+.LASF663:
+	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mapcs -mno-"
+	.ascii	"sched-prolog -mabi=apcs-gnu -mno-thumb-interwork -m"
+	.ascii	"arm -march=armv7-a -mfloat-abi=soft -mtune=cortex-a"
+	.ascii	"9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -std=gnu"
+	.ascii	"90 -fno-strict-aliasing -fno-common -fno-PIE -fno-d"
+	.ascii	"warf2-cfi-asm -fno-ipa-sra -fno-delete-null-pointer"
+	.ascii	"-checks -fno-stack-protector -fno-omit-frame-pointe"
+	.ascii	"r -fno-optimize-sibling-calls -fno-var-tracking-ass"
+	.ascii	"ignments -fno-strict-overflow -fno-merge-all-consta"
+	.ascii	"nts -fmerge-constants -fstack-check=no -fconserve-s"
+	.ascii	"tack --param allow-store-data-races=0\000"
 .LASF79:
 	.ascii	"nand_ops\000"
 .LASF629:

From 296d2e9c4a4593d589909cbf5c26a6a232f91713 Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Thu, 12 Jul 2018 15:07:46 +0800
Subject: [PATCH 0598/1852] serial: 8250_dw: lost one byte sometime when
 receive

To avoid "too much work for irq" issue, cherry pick the the patch.
It reads the RBR to clear the time out interrupt, but sometime the
rx fifo may be not empty while cpu reads the RBR. Which would cause
the data lost.

patch for "too much work":06451e93ab59e5b1843c29cbb468a274f4919563

By the way, current patch can't get rid of the risk entirely, so I
try a lot to solve it. Unfortunately, I only got the phenomenon that
lower pclk can reduce the probability. And I check the dw data sheet,
it has pclk and sclk, so there is synchronization problem. But it
only requires (slck < 4*pclk).

Change-Id: I01a36c689b43310294c45294abcf4982f5ddf2af
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 drivers/tty/serial/8250/8250_dw.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index d756926ca9ca7..1ebbe7c140c24 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -34,6 +34,7 @@
 
 /* Offsets for the DesignWare specific registers */
 #define DW_UART_USR	0x1f /* UART Status Register */
+#define DW_UART_RFL	0x21 /* UART Receive Fifo Level Register */
 #define DW_UART_CPR	0xf4 /* Component Parameter Register */
 #define DW_UART_UCV	0xf8 /* UART Component Version */
 
@@ -191,7 +192,7 @@ static int dw8250_handle_irq(struct uart_port *p)
 {
 	struct dw8250_data *d = p->private_data;
 	unsigned int iir = p->serial_in(p, UART_IIR);
-	unsigned int status;
+	unsigned int status, usr, rfl;
 	unsigned long flags;
 
 	/*
@@ -203,9 +204,10 @@ static int dw8250_handle_irq(struct uart_port *p)
 	 */
 	if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) {
 		spin_lock_irqsave(&p->lock, flags);
+		usr = p->serial_in(p, d->usr_reg);
 		status = p->serial_in(p, UART_LSR);
-
-		if (!(status & (UART_LSR_DR | UART_LSR_BI)))
+		rfl = p->serial_in(p, DW_UART_RFL);
+		if (!(status & (UART_LSR_DR | UART_LSR_BI)) && !(usr & 0x1) && (rfl == 0))
 			(void) p->serial_in(p, UART_RX);
 
 		spin_unlock_irqrestore(&p->lock, flags);

From df8e4ce3cb8af1010aca92c73eb97bf24dc63dd9 Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Sat, 14 Jul 2018 17:18:29 +0800
Subject: [PATCH 0599/1852] drm/rockchip: inno_hdmi: output common tv
 resolution and hdmi mode if no read the correct edid

Change-Id: I5b59b35a01e6b7093f4a076ed3cacf8d92dc2c69
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 drivers/gpu/drm/rockchip/inno_hdmi.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c
index 2e037a8efa472..0cf9fe98d0458 100644
--- a/drivers/gpu/drm/rockchip/inno_hdmi.c
+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c
@@ -691,8 +691,12 @@ inno_hdmi_connector_detect(struct drm_connector *connector, bool force)
 static int inno_hdmi_connector_get_modes(struct drm_connector *connector)
 {
 	struct inno_hdmi *hdmi = to_inno_hdmi(connector);
+	struct drm_display_mode *mode;
+	struct drm_display_info *info = &connector->display_info;
+	const u8 def_modes[6] = {4, 16, 31, 19, 17, 2};
 	struct edid *edid;
 	int ret = 0;
+	u8 i;
 
 	if (!hdmi->ddc)
 		return 0;
@@ -704,6 +708,25 @@ static int inno_hdmi_connector_get_modes(struct drm_connector *connector)
 		drm_mode_connector_update_edid_property(connector, edid);
 		ret = drm_add_edid_modes(connector, edid);
 		kfree(edid);
+	} else {
+		hdmi->hdmi_data.sink_is_hdmi = true;
+		hdmi->hdmi_data.sink_has_audio = true;
+		for (i = 0; i < sizeof(def_modes); i++) {
+			mode = drm_display_mode_from_vic_index(connector,
+							       def_modes,
+							       31, i);
+			if (mode) {
+				if (!i)
+					mode->type = DRM_MODE_TYPE_PREFERRED;
+				drm_mode_probed_add(connector, mode);
+				ret++;
+			}
+		}
+		info->edid_hdmi_dc_modes = 0;
+		info->hdmi.y420_dc_modes = 0;
+		info->color_formats = 0;
+
+		dev_info(hdmi->dev, "failed to get edid\n");
 	}
 
 	return ret;

From b4a63b8aa53fce14c08b2e3ab05b9e65c6418306 Mon Sep 17 00:00:00 2001
From: Ruslan Bilovol <ruslan.bilovol@gmail.com>
Date: Sun, 18 Jun 2017 00:23:58 +0300
Subject: [PATCH 0600/1852] UPSTREAM: usb: gadget: function: f_uac1: implement
 get_alt()

After commit 7e4da3fcf7c9 ("usb: gadget: composite:
Test get_alt() presence instead of set_alt()") f_uac1
function became broken because it doesn't have
get_alt() callback implementation and composite
framework never set altsetting 1 for audiostreaming
interface. On host site it looks like:

 [424339.017711] 21:1:1: usb_set_interface failed (-32)

Since host can't set altsetting 1, it can't start
playing audio.

In order to fix it implemented get_alt along with
minor improvements (error conditions checking)
similar to what existing f_uac2 has.

Change-Id: I41d59c69e3b300b164e6267c48c1367e8d38b098
Cc: Krzysztof Opasiak <k.opasiak@samsung.com>
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 1fc4926d92b9515b44f35b339bab5d2ca474a723)
---
 drivers/usb/gadget/function/f_uac1.c | 40 +++++++++++++++++++++++++++-
 1 file changed, 39 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/function/f_uac1.c b/drivers/usb/gadget/function/f_uac1.c
index 6a2346b99f559..366e7b6045e45 100644
--- a/drivers/usb/gadget/function/f_uac1.c
+++ b/drivers/usb/gadget/function/f_uac1.c
@@ -277,6 +277,9 @@ static void f_audio_buffer_free(struct f_audio_buf *audio_buf)
 struct f_audio {
 	struct gaudio			card;
 
+	u8 ac_intf, ac_alt;
+	u8 as_intf, as_alt;
+
 	/* endpoints handle full and/or high speeds */
 	struct usb_ep			*out_ep;
 
@@ -586,7 +589,20 @@ static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
 	req_count = opts->req_count;
 	audio_buf_size = opts->audio_buf_size;
 
-	if (intf == 1) {
+	/* No i/f has more than 2 alt settings */
+	if (alt > 1) {
+		ERROR(cdev, "%s:%d Error!\n", __func__, __LINE__);
+		return -EINVAL;
+	}
+
+	if (intf == audio->ac_intf) {
+		/* Control I/f has only 1 AltSetting - 0 */
+		if (alt) {
+			ERROR(cdev, "%s:%d Error!\n", __func__, __LINE__);
+			return -EINVAL;
+		}
+		return 0;
+	} else if (intf == audio->as_intf) {
 		if (alt == 1) {
 			err = config_ep_by_speed(cdev->gadget, f, out_ep);
 			if (err)
@@ -631,11 +647,28 @@ static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
 				schedule_work(&audio->playback_work);
 			}
 		}
+		audio->as_alt = alt;
 	}
 
 	return err;
 }
 
+static int f_audio_get_alt(struct usb_function *f, unsigned intf)
+{
+	struct f_audio		*audio = func_to_audio(f);
+	struct usb_composite_dev *cdev = f->config->cdev;
+
+	if (intf == audio->ac_intf)
+		return audio->ac_alt;
+	else if (intf == audio->as_intf)
+		return audio->as_alt;
+	else
+		ERROR(cdev, "%s:%d Invalid Interface %d!\n",
+		      __func__, __LINE__, intf);
+
+	return -EINVAL;
+}
+
 static void f_audio_disable(struct usb_function *f)
 {
 	return;
@@ -702,12 +735,16 @@ f_audio_bind(struct usb_configuration *c, struct usb_function *f)
 	if (status < 0)
 		goto fail;
 	ac_interface_desc.bInterfaceNumber = status;
+	audio->ac_intf = status;
+	audio->ac_alt = 0;
 
 	status = usb_interface_id(c, f);
 	if (status < 0)
 		goto fail;
 	as_interface_alt_0_desc.bInterfaceNumber = status;
 	as_interface_alt_1_desc.bInterfaceNumber = status;
+	audio->as_intf = status;
+	audio->as_alt = 0;
 
 	status = -ENODEV;
 
@@ -965,6 +1002,7 @@ static struct usb_function *f_audio_alloc(struct usb_function_instance *fi)
 	audio->card.func.bind = f_audio_bind;
 	audio->card.func.unbind = f_audio_unbind;
 	audio->card.func.set_alt = f_audio_set_alt;
+	audio->card.func.get_alt = f_audio_get_alt;
 	audio->card.func.setup = f_audio_setup;
 	audio->card.func.disable = f_audio_disable;
 	audio->card.func.free_func = f_audio_free;

From 4ca9ad98cf17277ecba39673141570f2834493fb Mon Sep 17 00:00:00 2001
From: Huang jianzhi <jesse.huang@rock-chips.com>
Date: Tue, 17 Jul 2018 09:40:48 +0800
Subject: [PATCH 0601/1852] arm: dts: rk3128h-box: add rtc fake node

Change-Id: Id2f1861b78de577e95fe2799b0853411f398f23a
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3128h-box.dts b/arch/arm/boot/dts/rk3128h-box.dts
index a8816cbae5982..0c86a5f5c8339 100644
--- a/arch/arm/boot/dts/rk3128h-box.dts
+++ b/arch/arm/boot/dts/rk3128h-box.dts
@@ -144,6 +144,11 @@
 		};
 	};
 
+	rtc-fake {
+		compatible = "rtc-fake";
+		status = "okay";
+	};
+
 	sdio_pwrseq: sdio-pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		clocks = <&hym8563>;

From f01d62093710bc6b83a4116a3f95e4cd2f434e38 Mon Sep 17 00:00:00 2001
From: Zhou weixin <zwx@rock-chips.com>
Date: Sat, 14 Jul 2018 14:48:01 +0800
Subject: [PATCH 0602/1852] arm64: dts: rockchip: add rk3326 86v board

Change-Id: I533b3243aae6e43151a1db2a454fb67c7423af12
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
---
 .../devicetree/bindings/arm/rockchip.txt      |   4 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../boot/dts/rockchip/rk3326-86v-v10.dts      | 772 ++++++++++++++++++
 3 files changed, 777 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index fecd401ef7dd2..890ddac318dd3 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -119,6 +119,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "rockchip,rk3326-863-lp3-v10", "rockchip,rk3326";
 
+- Rockchip RK3326 86v board:
+    Required root node properties:
+      - compatible = "rockchip,rk3326-86v-v10", "rockchip,rk3326";
+
 - Rockchip RK3326 evb board:
     Required root node properties:
       - compatible = "rockchip,rk3326-evb-lp3-v10", "rockchip,rk3326";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 25661cd81e047..cb3e9c3d71794 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-86v-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-box-liantong.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb-android.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts
new file mode 100644
index 0000000000000..5eda0e23aec8d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts
@@ -0,0 +1,772 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/display/drm_mipi_dsi.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/sensor-dev.h>
+#include "rk3326.dtsi"
+#include "rk3326-863-cif-sensor.dtsi"
+#include "px30-android.dtsi"
+
+/ {
+	model = "Rockchip rk3326 86v board";
+	compatible = "rockchip,rk3326-86v-v10", "rockchip,rk3326";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <617000>;
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <17000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			 0   10  10  11  11  12  12  13
+			 13  14  14  15  15  16  16  17
+			 17  18  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	charge-animation {
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <0>;
+		rockchip,android-charge-on = <0>;
+		rockchip,uboot-low-power-voltage = <3500>;
+		rockchip,screen-on-voltage = <3600>;
+		status = "okay";
+	};
+
+	panel {
+		compatible ="simple-panel";
+		enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
+		rockchip,data-width = <18>;
+		rockchip,output = "rgb";
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <51200000>;
+				hactive = <1024>;
+				vactive = <600>;
+				hback-porch = <100>;
+				hfront-porch = <120>;
+				vback-porch = <10>;
+				vfront-porch = <15>;
+				hsync-len = <100>;
+				vsync-len = <10>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		port {
+			panel_in_lvds: endpoint {
+				remote-endpoint = <&lvds_out_panel>;
+			};
+		};
+	};
+
+	rk817-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,rk817-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"Mic Jack", "MICBIAS1",
+			"IN1P", "Mic Jack",
+			"Headphone Jack", "HPOL",
+			"Headphone Jack", "HPOR";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&rk817_codec>;
+		};
+	};
+
+	rk_headset {
+		compatible = "rockchip_headset";
+		headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&cru SCLK_WIFI_PMU>;
+		clock-names = "clk_wifi_pmu";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+	};
+
+	vccsys: vccsys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v8_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3800000>;
+		regulator-max-microvolt = <3800000>;
+	};
+};
+
+&cif {
+	status = "okay";
+};
+
+&cif_sensor {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&bus_apll {
+	bus-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu0_opp_table {
+	/*
+	 * max IR-drop values on different freq condition for this board!
+	 */
+	rockchip,board-irdrop = <
+		/*MHz	MHz	uV */
+		0	815	75000
+		816	1119	75000
+		1200	1512	75000
+	>;
+};
+
+&dmc_opp_table {
+	/*
+	 * max IR-drop values on different freq condition for this board!
+	 */
+	rockchip,board-irdrop = <
+		/*MHz	MHz	uV */
+		451	800	75000
+	>;
+};
+
+&dfi {
+	status = "okay";
+};
+
+&dmc {
+	center-supply = <&vdd_logic>;
+	status = "disabled";
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	/*mmc-hs200-1_8v;*/
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default", "pmic-sleep",
+				"pmic-power-off", "pmic-reset";
+		pinctrl-0 = <&pmic_int>;
+		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
+		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
+		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		//fb-inner-reg-idxs = <2>;
+		/* 1: rst regs (default in codes), 0: rst the pmic */
+		pmic-reset-func = <1>;
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		pwrkey {
+			status = "okay";
+		};
+
+		pinctrl_rk8xx: pinctrl_rk8xx {
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			rk817_ts_gpio1: rk817_ts_gpio1 {
+				pins = "gpio_ts";
+				function = "pin_fun1";
+				/* output-low; */
+				/* input-enable; */
+			};
+
+			rk817_gt_gpio2: rk817_gt_gpio2 {
+				pins = "gpio_gt";
+				function = "pin_fun1";
+			};
+
+			rk817_pin_ts: rk817_pin_ts {
+				pins = "gpio_ts";
+				function = "pin_fun0";
+			};
+
+			rk817_pin_gt: rk817_pin_gt {
+				pins = "gpio_gt";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_null: rk817_slppin_null {
+				pins = "gpio_slp";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_slp: rk817_slppin_slp {
+				pins = "gpio_slp";
+				function = "pin_fun1";
+			};
+
+			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
+				pins = "gpio_slp";
+				function = "pin_fun2";
+			};
+
+			rk817_slppin_rst: rk817_slppin_rst {
+				pins = "gpio_slp";
+				function = "pin_fun3";
+			};
+		};
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v0: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc_1v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3548 3592 3636 3687 3740 3780
+				3806 3827 3846 3864 3889 3929 3964
+				3993 4015 4030 4041 4056 4076 4148>;
+			design_capacity = <4000>;
+			design_qmax = <4200>;
+			bat_res = <100>;
+			sleep_enter_current = <150>;
+			sleep_exit_current = <180>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <0>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <2000>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <0>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+			extcon = <&u2phy>;
+		};
+
+		rk817_codec: codec {
+			#sound-dai-cells = <0>;
+			compatible = "rockchip,rk817-codec";
+			clocks = <&cru SCLK_I2S1_OUT>;
+			clock-names = "mclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2s1_2ch_mclk>;
+			hp-volume = <20>;
+			spk-volume = <3>;
+			mic-in-differential;
+			status = "okay";
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	ts@40 {
+		compatible = "gslX680-d708";
+		reg = <0x40>;
+		touch-gpio = <&gpio0 RK_PB3 IRQ_TYPE_LEVEL_LOW>;
+		wake-gpio = <&gpio0 RK_PC1 IRQ_TYPE_LEVEL_LOW>;
+		screen_max_x = <1024>;
+		screen_max_y = <600>;
+		revert_x = <1>;
+		status = "okay";
+	};
+
+	sensor@1d {
+		status = "okay";
+		compatible = "gs_lsm303d";
+		reg = <0x1d>;
+		type = <SENSOR_TYPE_ACCEL>;
+		irq-gpio = <&gpio0 RK_PA1 IRQ_TYPE_LEVEL_LOW>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		layout = <5>;
+		reprobe_en = <1>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2s1_2ch {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vcc_3v0>;
+	vccio2-supply = <&vccio_sd>;
+	vccio3-supply = <&vcc2v8_dvp>;
+	vccio4-supply = <&vcc_3v0>;
+	vccio5-supply = <&vcc_3v0>;
+};
+
+&lvds {
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcdc_rgb_dclk_pin &lcdc_rgb666_m1_data_pins>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			lvds_out_panel: endpoint {
+				remote-endpoint = <&panel_in_lvds>;
+			};
+		};
+	};
+};
+
+&nandc0 {
+	status = "okay";
+};
+
+&pinctrl {
+	headphone {
+		hp_det: hp-det {
+			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	lcdc {
+		lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
+			rockchip,pins = <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic_int {
+			rockchip,pins =
+				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		soc_slppin_gpio: soc_slppin_gpio {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		soc_slppin_slp: soc_slppin_slp {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+		};
+
+		soc_slppin_rst: soc_slppin_rst {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pmu_io_domains {
+	status = "okay";
+
+	pmuio1-supply = <&vcc3v0_pmu>;
+	pmuio2-supply = <&vcc3v0_pmu>;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&rk_rga {
+	status = "okay";
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <1>;
+};
+
+&route_lvds {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc1v8_soc>;
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "disabled";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "disabled";
+};
+
+&tsadc {
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&tsadc_otp_gpio>;
+	pinctrl-1 = <&tsadc_otp_out>;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		rockchip,low-power-mode;
+		status = "okay";
+	};
+
+	u2phy_otg: otg-port {
+		rockchip,low-power-mode;
+		status = "okay";
+	};
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts>;
+	status = "okay";
+};
+
+&vip_mmu {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&vpu_combo {
+	status = "okay";
+};

From 50fd929db6c62d9f533136a73a26d7d17d2ebe0f Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 17 Jul 2018 21:02:31 +0800
Subject: [PATCH 0603/1852] ASoC: rk3308_codec: fix incorrect idx with
 loopback_grp

Here should use the mapped grp as a reference, not idx.

Change-Id: Ia40dafc11f4f5f077f764f49985bb8d3ec800c28
Reported-by: Lin Jianhua <linjh@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 76c6e2b1e7cc6..25afb4e0c95d9 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -588,7 +588,7 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 
 		if ((!rk3308->loopback_dacs_enabled) &&
 		    has_loopback(rk3308->loopback_grp) &&
-		    rk3308->loopback_grp == idx) {
+		    rk3308->loopback_grp == mapped_grp) {
 			/*
 			 * Ths loopback DACs are closed, and specify the
 			 * loopback ADCs.

From 86a9570bcfb0f648004d28c539caa14184d4808e Mon Sep 17 00:00:00 2001
From: Zhou weixin <zwx@rock-chips.com>
Date: Tue, 17 Jul 2018 16:43:11 +0800
Subject: [PATCH 0604/1852] input: sensors: accel: lsm303d: add data convert

Change-Id: Ied735816cb86cf73ebef76522f0882dbb19a9eb3
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
---
 drivers/input/sensors/accel/lsm303d.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/input/sensors/accel/lsm303d.c b/drivers/input/sensors/accel/lsm303d.c
index 7a3d5573fe71c..17a5baeb98b33 100644
--- a/drivers/input/sensors/accel/lsm303d.c
+++ b/drivers/input/sensors/accel/lsm303d.c
@@ -68,7 +68,7 @@
 #define LSM303D_DEVID			(0x49)	//chip id
 #define LSM303D_ACC_DISABLE		(0x08)
 
-#define LSM303D_RANGE			2000000
+#define LSM303D_RANGE			32768
 
 /* LSM303D */
 #define LSM303D_PRECISION		16
@@ -207,13 +207,18 @@ static int sensor_init(struct i2c_client *client)
 
 static int sensor_convert_data(struct i2c_client *client, char high_byte, char low_byte)
 {
-	s64 result;
+	int result;
 	struct sensor_private_data *sensor =
 	    (struct sensor_private_data *) i2c_get_clientdata(client);
 
 	switch (sensor->devid) {
 		case LSM303D_DEVID:
 			result = ((int)high_byte << 8) | (int)low_byte;
+			if (result < LSM303D_BOUNDARY)
+				result = result * LSM303D_GRAVITY_STEP;
+			else
+				result = ~(((~result & (0x7fff >> (16 - LSM303D_PRECISION))) + 1)
+						* LSM303D_GRAVITY_STEP) + 1;
 			break;
 
 		default:
@@ -312,7 +317,7 @@ struct sensor_operate gsensor_lsm303d_ops = {
 	.precision			= LSM303D_PRECISION,
 	.ctrl_reg			= LSM303D_CTRL_REG1,
 	.int_status_reg	= LSM303D_IG_SRC1,
-	.range			= {-32768, 32768},
+	.range			= {-LSM303D_RANGE, LSM303D_RANGE},
 	.trig				= (IRQF_TRIGGER_LOW | IRQF_ONESHOT),
 	.active			= sensor_active,
 	.init				= sensor_init,

From b7b65aa00e7bf2e293c82d02f0839cf430070190 Mon Sep 17 00:00:00 2001
From: Cliff Chen <cliff.chen@rock-chips.com>
Date: Mon, 16 Jul 2018 14:40:48 +0800
Subject: [PATCH 0605/1852] f2fs: add a new limit for reserve root

The reserved root blocks is not enough for booting Android due to
the limit of 0.2% if the fs size too small. so we add a new mini-
mum limit is 128MB.

Change-Id: I5af3b182001d27e4d18b4090c5270bbb2ac6253b
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
---
 fs/f2fs/f2fs.h  | 2 ++
 fs/f2fs/super.c | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 97c17b3d984c2..4587fbadc555d 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -70,6 +70,8 @@ extern char *fault_name[FAULT_MAX];
 #define IS_FAULT_SET(fi, type) ((fi)->inject_type & (1 << (type)))
 #endif
 
+#define MIN_ROOT_RESERVED_BLOCKS (128 * 1024 * 1024)
+
 /*
  * For mount options
  */
diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index cb57ad3ca32d2..dcce72aa47a6c 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/super.c
@@ -211,7 +211,8 @@ static inline void limit_reserve_root(struct f2fs_sb_info *sbi)
 
 	/* limit is 0.2% */
 	if (test_opt(sbi, RESERVE_ROOT) &&
-			F2FS_OPTION(sbi).root_reserved_blocks > limit) {
+			F2FS_OPTION(sbi).root_reserved_blocks > limit &&
+			F2FS_OPTION(sbi).root_reserved_blocks > MIN_ROOT_RESERVED_BLOCKS) {
 		F2FS_OPTION(sbi).root_reserved_blocks = limit;
 		f2fs_msg(sbi->sb, KERN_INFO,
 			"Reduce reserved blocks for root = %u",

From cc8203412902a34d81e07347ea54aa3f1cd982d2 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Wed, 18 Jul 2018 15:59:46 +0800
Subject: [PATCH 0606/1852] rockchip: rkflash: fix compile error if !NAND

Change-Id: I890ff638ff3b6fe3e9fb8fc43f4fa4522bd75c11
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/Makefile | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index e1a3ccee8978b..cf11289493bc2 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -1,13 +1,13 @@
 # SPDX-License-Identifier: GPL-2.0
 
-obj-$(CONFIG_RK_NANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_debug.o nand_boot.o  flash.o nandc.o ftl_flash_plat.o
-obj-$(CONFIG_RK_SFC_NAND) += rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nand_boot.o sfc_nand.o sfc.o ftl_flash_plat.o
+obj-$(CONFIG_RK_NANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_debug.o nand_boot.o  flash.o nandc.o ftl_flash_plat.o
+obj-$(CONFIG_RK_SFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nand_boot.o sfc_nand.o sfc.o ftl_flash_plat.o
 obj-$(CONFIG_RK_SFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nor_boot.o sfc_nor.o sfc.o
 obj-$(CONFIG_RK_SFC_NOR_MTD) += sfc_nor_mtd.o
 
 ifdef CONFIG_THUMB2_KERNEL
-obj-$(CONFIG_THUMB2_KERNEL) += rk_sftl_arm_v7_thumb.o
+rksftl-$(CONFIG_THUMB2_KERNEL) += rk_sftl_arm_v7_thumb.o
 else
-obj-$(CONFIG_ARM64) += rk_sftl_arm_v8.o
-obj-$(CONFIG_ARM) += rk_sftl_arm_v7.o
+rksftl-$(CONFIG_ARM64) += rk_sftl_arm_v8.o
+rksftl-$(CONFIG_ARM) += rk_sftl_arm_v7.o
 endif

From 910e71aa2d6178836f0969e4a419b03161d028ed Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 18 Jul 2018 19:12:22 +0800
Subject: [PATCH 0607/1852] Input: rmi4 - remove unused synaptics s3202 driver

Change-Id: If377d7af56ad443a905947a585ff826b6c1625b2
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/input/touchscreen/rmi4/Kconfig       |  199 --
 drivers/input/touchscreen/rmi4/Makefile      |   35 -
 drivers/input/touchscreen/rmi4/rmi_bus.c     |  482 ---
 drivers/input/touchscreen/rmi4/rmi_dev.c     |  448 ---
 drivers/input/touchscreen/rmi4/rmi_driver.c  | 1616 ----------
 drivers/input/touchscreen/rmi4/rmi_driver.h  |  405 ---
 drivers/input/touchscreen/rmi4/rmi_f01.c     | 1385 ---------
 drivers/input/touchscreen/rmi4/rmi_f09.c     |  771 -----
 drivers/input/touchscreen/rmi4/rmi_f11.c     | 1950 ------------
 drivers/input/touchscreen/rmi4/rmi_f17.c     |  731 -----
 drivers/input/touchscreen/rmi4/rmi_f19.c     | 1505 ---------
 drivers/input/touchscreen/rmi4/rmi_f1a.c     | 1809 -----------
 drivers/input/touchscreen/rmi4/rmi_f21.c     |  751 -----
 drivers/input/touchscreen/rmi4/rmi_f34.c     |  962 ------
 drivers/input/touchscreen/rmi4/rmi_f54.c     | 2272 --------------
 drivers/input/touchscreen/rmi4/rmi_i2c.c     |  453 ---
 drivers/input/touchscreen/rmi4/rmi_reflash.c |  670 ----
 drivers/input/touchscreen/rmi4/rmi_reflash.h | 2917 ------------------
 drivers/input/touchscreen/rmi4/rmi_spi.c     |  909 ------
 include/linux/rmi.h                          |  609 ----
 20 files changed, 20879 deletions(-)
 delete mode 100644 drivers/input/touchscreen/rmi4/Kconfig
 delete mode 100644 drivers/input/touchscreen/rmi4/Makefile
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_bus.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_dev.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_driver.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_driver.h
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f01.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f09.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f11.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f17.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f19.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f1a.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f21.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f34.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_f54.c
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_i2c.c
 delete mode 100644 drivers/input/touchscreen/rmi4/rmi_reflash.c
 delete mode 100644 drivers/input/touchscreen/rmi4/rmi_reflash.h
 delete mode 100755 drivers/input/touchscreen/rmi4/rmi_spi.c
 delete mode 100755 include/linux/rmi.h

diff --git a/drivers/input/touchscreen/rmi4/Kconfig b/drivers/input/touchscreen/rmi4/Kconfig
deleted file mode 100644
index 5b54d71fbb8e1..0000000000000
--- a/drivers/input/touchscreen/rmi4/Kconfig
+++ /dev/null
@@ -1,199 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# RMI4 configuration
-#
-config RMI4_BUS
-	bool "Synaptics RMI4 bus support"
-	depends on TOUCHSCREEN_SYNAPTICS_RMI4_I2C_RK
-	help
-	  Say Y here if you want to support the Synaptics RMI4 bus.
-
-	  If unsure, say Y.
-
-	  This feature is not currently available as
-	  a loadable module.
-
-config RMI4_DEBUG
-	bool "Synaptics RMI4 debugging"
-	depends on RMI4_BUS
-	help
-	  Say Y here to enable debug feature in the RMI4 driver.
-
-	  Note that the RMI4 driver debug features can generate a lot of
-	  output (potentially clogging up your dmesg output) and generally
-	  slow down driver operation.  It's recommended to enable them only
-	  if you are actively developing/debugging RMI4 features.
-
-	  If unsure, say N.
-
-config RMI4_I2C
-	bool "RMI4 I2C Support"
-	depends on RMI4_BUS && I2C
-	help
-	  Say Y here if you want to support RMI4 devices connected to an I2C
-	  bus.
-
-	  If unsure, say Y.
-
-	  This feature is not currently available as a loadable module.
-
-config RMI4_I2C_SCL_RATE
-	int "RMI4 I2C SCL RATE Support"
-	depends on RMI4_I2C
-
-config RMI4_SPI
-	bool "RMI4 SPI Support"
-	depends on RMI4_BUS && SPI
-	help
-	  Say Y here if you want to support RMI4 devices connected to an SPI
-	  bus.
-
-	  If unsure, say Y.
-
-	  This feature is not currently available as a loadable module.
-
-config RMI4_GENERIC
-	bool "RMI4 Generic driver"
-	depends on RMI4_BUS
-	help
-	  Say Y here if you want to support generic RMI4 devices.
-
-	  This is pretty much required if you want to do anything useful with
-	  your RMI device.
-
-	  This feature is not currently available as a loadable module.
-
-
-config RMI4_F1A
-	tristate "RMI4 Function 1A (capacitive button sensor)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 1A.
-
-	  Function 1A provides self testing for touchscreens and touchpads.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f1a.
-
-config RMI4_F09
-	tristate "RMI4 Function 09 (self testing)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 09.
-
-	  Function 09 provides self testing for touchscreens and touchpads.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f09.
-
-config RMI4_F11
-	tristate "RMI4 Function 11 (2D pointing)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 11.
-
-	  Function 11 provides 2D multifinger pointing for touchscreens and
-	  touchpads.  For sensors that support relative pointing, F11 also
-	  provides mouse input.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f11.
-
-config RMI4_F11_PEN
-	bool "RMI4 F11 Pen Support"
-	depends on RMI4_F11
-	help
-	  Say Y here to add support for pen input to RMI4 function 11.
-
-	  If this feature is enabled, when pen inputs are detected they
-	  will be reported to the input stream as MT_TOOL_PEN.  Otherwise,
-	  pens will be treated the same as fingers.
-
-	  Not all UI implementations deal gracefully with pen discrimination.
-	  If your system is not recognizing pen touches and you know your
-	  sensor supports pen input, you probably want to turn this feature
-	  off.
-
-config RMI4_VIRTUAL_BUTTON
-	tristate "RMI4 Vitual Button"
-	depends on RMI4_F11
-	help
-	  Say Y here if you want to add support for RMI4 virtual button to F11.
-
-	  The virtual button feature implement the virtual button device in
-	  certain RMI4 touch sensors.
-
-	  This works only if your sensor supports F11 gestures.
-
-config RMI4_F17
-	tristate "RMI4 Function 17 (pointing sticks)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 17.
-
-	  Function 19 provides support for capacitive and resistive
-	  pointing sticks.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f17.
-
-config RMI4_F19
-	tristate "RMI4 Function 19 (0D pointing)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 19.
-
-	  Function 19 provides support for capacitive buttons for sensors
-	  that implement capacitive buttons.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f19.
-	  
-config RMI4_F21
-	tristate "RMI4 Function 21 (2D Force)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 21.
-
-	  Function 21 provides 2D Force Sensing for ForcePad products.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f21.
-
-config RMI4_F34
-	tristate "RMI4 Function 34 (device reflash)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 34.
-
-	  Function 34 provides firmware upgrade capability for your sensor.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f34.
-config RMI4_REFLASH_WHEN_BOOT
-	tristate "RMI4 Function 34 (device reflash when system boot)"
-	depends on RMI4_BUS && RMI4_GENERIC
-
-config RMI4_F54
-	tristate "RMI4 Function 54 (analog diagnostics)"
-	depends on RMI4_BUS && RMI4_GENERIC
-	help
-	  Say Y here if you want to add support for RMI4 function 54.
-
-	  Function 54 provides access to various diagnostic features in
-	  certain RMI4 touch sensors.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-f54.
-
-config RMI4_DEV
-	tristate "Synaptics direct RMI device support (rmidev)"
-	depends on GPIO_SYSFS && (RMI4_I2C || RMI4_SPI)
-	help
-	  Say Y here to add support for rmidev.
-
-	  The rmidev feature implements a character device providing access
-	  to RMI4 sensor register maps.
-
-	  To compile this driver as a module, choose M here: the
-	  module will be called rmi-dev.
diff --git a/drivers/input/touchscreen/rmi4/Makefile b/drivers/input/touchscreen/rmi4/Makefile
deleted file mode 100644
index 562f672265bd6..0000000000000
--- a/drivers/input/touchscreen/rmi4/Makefile
+++ /dev/null
@@ -1,35 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_RMI4_BUS) += rmi_bus.o
-obj-$(CONFIG_RMI4_I2C) += rmi_i2c.o
-obj-$(CONFIG_RMI4_SPI) += rmi_spi.o
-obj-$(CONFIG_RMI4_GENERIC) += rmi_driver.o rmi_f01.o
-obj-$(CONFIG_RMI4_F09) += rmi_f09.o
-obj-$(CONFIG_RMI4_F1A) += rmi_f1a.o
-obj-$(CONFIG_RMI4_F11) += rmi_f11.o
-obj-$(CONFIG_RMI4_F17) += rmi_f17.o
-obj-$(CONFIG_RMI4_F19) += rmi_f19.o
-obj-$(CONFIG_RMI4_F21) += rmi_f21.o
-obj-$(CONFIG_RMI4_F34) += rmi_f34.o
-obj-$(CONFIG_RMI4_F54) += rmi_f54.o
-obj-$(CONFIG_RMI4_DEV) += rmi_dev.o
-obj-y += rmi_reflash.o
-
-ifeq ($(KERNELRELEASE),)
-
-# KERNELDIR ?= /home/<AndroidKernelDirectory>
-PWD := $(shell pwd)
-
-.PHONY: build clean
-
-build:
-	$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
-
-clean:
-	rm -rf *.o *~ core .depend .*.cmd *.ko *.mod.c
-else
-
-$(info Building with KERNELRELEASE = ${KERNELRELEASE})
-obj-m +=    rmi_dev.o
-
-endif
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_bus.c b/drivers/input/touchscreen/rmi4/rmi_bus.c
deleted file mode 100755
index b055a4a20eb30..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_bus.c
+++ /dev/null
@@ -1,482 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/pm.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/rmi.h>
-#include <linux/types.h>
-#ifdef CONFIG_RMI4_DEBUG
-#include <linux/debugfs.h>
-#endif
-#include "rmi_driver.h"
-DEFINE_MUTEX(rmi_bus_mutex);
-
-static struct rmi_function_list {
-	struct list_head list;
-	struct rmi_function_handler *fh;
-} rmi_supported_functions;
-
-static struct rmi_character_driver_list {
-	struct list_head list;
-	struct rmi_char_driver *cd;
-} rmi_character_drivers;
-
-static atomic_t physical_device_count;
-
-#ifdef CONFIG_RMI4_DEBUG
-static struct dentry *rmi_debugfs_root;
-#endif
-
-static int rmi_bus_match(struct device *dev, struct device_driver *driver)
-{
-	struct rmi_driver *rmi_driver;
-	struct rmi_device *rmi_dev;
-	struct rmi_device_platform_data *pdata;
-
-	rmi_driver = to_rmi_driver(driver);
-	rmi_dev = to_rmi_device(dev);
-	pdata = to_rmi_platform_data(rmi_dev);
-	dev_dbg(dev, "%s: Matching %s.\n", __func__, pdata->sensor_name);
-
-	if (!strcmp(pdata->driver_name, rmi_driver->driver.name)) {
-		rmi_dev->driver = rmi_driver;
-		dev_dbg(dev, "%s: Match %s to %s succeeded.\n", __func__,
-			pdata->driver_name, rmi_driver->driver.name);
-		return 1;
-	}
-
-	dev_vdbg(dev, "%s: Match %s to %s failed.\n", __func__,
-		pdata->driver_name, rmi_driver->driver.name);
-	return 0;
-}
-
-#ifdef CONFIG_PM
-static int rmi_bus_suspend(struct device *dev)
-{
-#ifdef GENERIC_SUBSYS_PM_OPS
-	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
-	if (pm && pm->suspend)
-		return pm->suspend(dev);
-#endif
-
-	return 0;
-}
-
-static int rmi_bus_resume(struct device *dev)
-{
-#ifdef GENERIC_SUBSYS_PM_OPS
-	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
-	if (pm && pm->resume)
-		return pm->resume(dev);
-	else if (dev->driver && dev->driver->resume)
-		return dev->driver->resume(dev);
-#else
-	if (dev->driver && dev->driver->resume)
-		return dev->driver->resume(dev);
-#endif
-
-	return 0;
-}
-#endif
-
-static int rmi_bus_probe(struct device *dev)
-{
-	struct rmi_driver *driver;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	driver = rmi_dev->driver;
-	if (driver && driver->probe)
-		return driver->probe(rmi_dev);
-
-	return 0;
-}
-
-static int rmi_bus_remove(struct device *dev)
-{
-	struct rmi_driver *driver;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	driver = rmi_dev->driver;
-	if (driver && driver->remove)
-		return driver->remove(rmi_dev);
-
-	return 0;
-}
-
-static void rmi_bus_shutdown(struct device *dev)
-{
-	struct rmi_driver *driver;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	driver = rmi_dev->driver;
-	if (driver && driver->shutdown)
-		driver->shutdown(rmi_dev);
-}
-
-static SIMPLE_DEV_PM_OPS(rmi_bus_pm_ops,
-			 rmi_bus_suspend, rmi_bus_resume);
-
-struct bus_type rmi_bus_type = {
-	.name		= "rmi",
-	.match		= rmi_bus_match,
-	.probe		= rmi_bus_probe,
-	.remove		= rmi_bus_remove,
-	.shutdown	= rmi_bus_shutdown,
-	.pm		= &rmi_bus_pm_ops
-};
-
-static void release_rmidev_device(struct device *dev) {
-	device_unregister(dev);
-}
-
-int rmi_register_phys_device(struct rmi_phys_device *phys)
-{
-	struct rmi_device_platform_data *pdata = phys->dev->platform_data;
-	struct rmi_device *rmi_dev;
-
-	if (!pdata) {
-		dev_err(phys->dev, "no platform data!\n");
-		return -EINVAL;
-	}
-
-	rmi_dev = kzalloc(sizeof(struct rmi_device), GFP_KERNEL);
-	if (!rmi_dev)
-		return -ENOMEM;
-
-	rmi_dev->phys = phys;
-	rmi_dev->dev.bus = &rmi_bus_type;
-
-	rmi_dev->number = atomic_inc_return(&physical_device_count) - 1;
-	rmi_dev->dev.release = release_rmidev_device;
-
-	dev_set_name(&rmi_dev->dev, "sensor%02d", rmi_dev->number);
-	dev_dbg(phys->dev, "%s: Registered %s as %s.\n", __func__,
-		pdata->sensor_name, dev_name(&rmi_dev->dev));
-
-#ifdef CONFIG_RMI4_DEBUG
-	if (rmi_debugfs_root) {
-		rmi_dev->debugfs_root = debugfs_create_dir(
-			dev_name(&rmi_dev->dev), rmi_debugfs_root);
-		if (!rmi_dev->debugfs_root)
-			dev_err(&rmi_dev->dev, "Failed to create debugfs root.\n");
-	}
-#endif
-	phys->rmi_dev = rmi_dev;
-	return device_register(&rmi_dev->dev);
-}
-EXPORT_SYMBOL(rmi_register_phys_device);
-
-void rmi_unregister_phys_device(struct rmi_phys_device *phys)
-{
-	struct rmi_device *rmi_dev = phys->rmi_dev;
-
-#ifdef CONFIG_RMI4_DEBUG
-	if (rmi_dev->debugfs_root)
-		debugfs_remove(rmi_dev->debugfs_root);
-#endif
-
-	kfree(rmi_dev);
-}
-EXPORT_SYMBOL(rmi_unregister_phys_device);
-
-int rmi_register_driver(struct rmi_driver *driver)
-{
-	driver->driver.bus = &rmi_bus_type;
-	return driver_register(&driver->driver);
-}
-EXPORT_SYMBOL(rmi_register_driver);
-
-static int __rmi_driver_remove(struct device *dev, void *data)
-{
-	struct rmi_driver *driver = data;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	if (rmi_dev->driver == driver)
-		rmi_dev->driver = NULL;
-
-	return 0;
-}
-
-void rmi_unregister_driver(struct rmi_driver *driver)
-{
-	bus_for_each_dev(&rmi_bus_type, NULL, driver, __rmi_driver_remove);
-	driver_unregister(&driver->driver);
-}
-EXPORT_SYMBOL(rmi_unregister_driver);
-
-static int __rmi_bus_fh_add(struct device *dev, void *data)
-{
-	struct rmi_driver *driver;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	driver = rmi_dev->driver;
-	if (driver && driver->fh_add)
-		driver->fh_add(rmi_dev, data);
-
-	return 0;
-}
-
-int rmi_register_function_driver(struct rmi_function_handler *fh)
-{
-	struct rmi_function_list *entry;
-	struct rmi_function_handler *fh_dup;
-
-	fh_dup = rmi_get_function_handler(fh->func);
-	if (fh_dup) {
-		pr_err("%s: function f%.2x already registered!\n", __func__,
-			fh->func);
-		return -EINVAL;
-	}
-
-	entry = kzalloc(sizeof(struct rmi_function_list), GFP_KERNEL);
-	if (!entry)
-		return -ENOMEM;
-
-	entry->fh = fh;
-	INIT_LIST_HEAD(&entry->list);
-	list_add_tail(&entry->list, &rmi_supported_functions.list);
-
-	/* notify devices of the new function handler */
-	bus_for_each_dev(&rmi_bus_type, NULL, fh, __rmi_bus_fh_add);
-
-	return 0;
-}
-EXPORT_SYMBOL(rmi_register_function_driver);
-
-static int __rmi_bus_fh_remove(struct device *dev, void *data)
-{
-	struct rmi_driver *driver;
-	struct rmi_device *rmi_dev = to_rmi_device(dev);
-
-	driver = rmi_dev->driver;
-	if (driver && driver->fh_remove)
-		driver->fh_remove(rmi_dev, data);
-
-	return 0;
-}
-
-void rmi_unregister_function_driver(struct rmi_function_handler *fh)
-{
-	struct rmi_function_list *entry, *n;
-
-	/* notify devices of the removal of the function handler */
-	bus_for_each_dev(&rmi_bus_type, NULL, fh, __rmi_bus_fh_remove);
-
-	if (list_empty(&rmi_supported_functions.list))
-		return;
-
-	list_for_each_entry_safe(entry, n, &rmi_supported_functions.list,
-									list) {
-		if (entry->fh->func == fh->func) {
-			list_del(&entry->list);
-			kfree(entry);
-		}
-	}
-
-}
-EXPORT_SYMBOL(rmi_unregister_function_driver);
-
-struct rmi_function_handler *rmi_get_function_handler(int id)
-{
-	struct rmi_function_list *entry;
-
-	if (list_empty(&rmi_supported_functions.list))
-		return NULL;
-
-	list_for_each_entry(entry, &rmi_supported_functions.list, list)
-		if (entry->fh->func == id)
-			return entry->fh;
-
-	return NULL;
-}
-EXPORT_SYMBOL(rmi_get_function_handler);
-
-static void rmi_release_character_device(struct device *dev)
-{
-	dev_dbg(dev, "%s: Called.\n", __func__);
-	return;
-}
-
-static int rmi_register_character_device(struct device *dev, void *data)
-{
-	struct rmi_device *rmi_dev;
-	struct rmi_char_driver *char_driver = data;
-	struct rmi_char_device *char_dev;
-	int retval;
-
-	dev_dbg(dev, "Attaching character device.\n");
-	rmi_dev = to_rmi_device(dev);
-	if (char_driver->match && !char_driver->match(rmi_dev))
-		return 0;
-
-	if (!char_driver->init) {
-		dev_err(dev, "ERROR: No init() function in %s.\n", __func__);
-		return -EINVAL;
-	}
-
-	char_dev = kzalloc(sizeof(struct rmi_char_device), GFP_KERNEL);
-	if (!char_dev)
-		return -ENOMEM;
-
-	char_dev->rmi_dev = rmi_dev;
-	char_dev->driver = char_driver;
-
-	char_dev->dev.parent = dev;
-	char_dev->dev.release = rmi_release_character_device;
-	char_dev->dev.driver = &char_driver->driver;
-	retval = device_register(&char_dev->dev);
-	if (!retval) {
-		dev_err(dev, "Failed to register character device.\n");
-		goto error_exit;
-	}
-
-	retval = char_driver->init(char_dev);
-	if (retval) {
-		dev_err(dev, "Failed to initialize character device.\n");
-		goto error_exit;
-	}
-
-	mutex_lock(&rmi_bus_mutex);
-	list_add_tail(&char_dev->list, &char_driver->devices);
-	mutex_unlock(&rmi_bus_mutex);
-	dev_info(&char_dev->dev, "Registered a device.\n");
-	return retval;
-
-error_exit:
-	kfree(char_dev);
-	return retval;
-}
-
-int rmi_register_character_driver(struct rmi_char_driver *char_driver)
-{
-	struct rmi_character_driver_list *entry;
-	int retval;
-
-	pr_debug("%s: Registering character driver %s.\n", __func__,
-		char_driver->driver.name);
-
-	char_driver->driver.bus = &rmi_bus_type;
-	INIT_LIST_HEAD(&char_driver->devices);
-	retval = driver_register(&char_driver->driver);
-	if (retval) {
-		pr_err("%s: Failed to register %s, code: %d.\n", __func__,
-		       char_driver->driver.name, retval);
-		return retval;
-	}
-
-	entry = kzalloc(sizeof(struct rmi_character_driver_list), GFP_KERNEL);
-	if (!entry)
-		return -ENOMEM;
-	entry->cd = char_driver;
-
-	mutex_lock(&rmi_bus_mutex);
-	list_add_tail(&entry->list, &rmi_character_drivers.list);
-	mutex_unlock(&rmi_bus_mutex);
-
-	/* notify devices of the removal of the function handler */
-	bus_for_each_dev(&rmi_bus_type, NULL, char_driver,
-			 rmi_register_character_device);
-
-	return 0;
-}
-EXPORT_SYMBOL(rmi_register_character_driver);
-
-
-int rmi_unregister_character_driver(struct rmi_char_driver *char_driver)
-{
-	struct rmi_character_driver_list *entry, *n;
-	struct rmi_char_device *char_dev, *m;
-	pr_debug("%s: Unregistering character driver %s.\n", __func__,
-		char_driver->driver.name);
-
-	mutex_lock(&rmi_bus_mutex);
-	list_for_each_entry_safe(char_dev, m, &char_driver->devices,
-				 list) {
-		list_del(&char_dev->list);
-		char_dev->driver->remove(char_dev);
-	}
-	list_for_each_entry_safe(entry, n, &rmi_character_drivers.list,
-				 list) {
-		if (entry->cd == char_driver) {
-			list_del(&entry->list);
-			kfree(entry);
-		}
-	}
-	mutex_unlock(&rmi_bus_mutex);
-
-	driver_unregister(&char_driver->driver);
-
-	return 0;
-}
-EXPORT_SYMBOL(rmi_unregister_character_driver);
-
-static int __init rmi_bus_init(void)
-{
-	int error;
-
-	mutex_init(&rmi_bus_mutex);
-	INIT_LIST_HEAD(&rmi_supported_functions.list);
-	INIT_LIST_HEAD(&rmi_character_drivers.list);
-
-#ifdef CONFIG_RMI4_DEBUG
-	rmi_debugfs_root = debugfs_create_dir(rmi_bus_type.name, NULL);
-	if (!rmi_debugfs_root)
-		pr_err("%s: Failed to create debugfs root.\n", __func__);
-	else if (IS_ERR(rmi_debugfs_root)) {
-		pr_err("%s: Kernel may not contain debugfs support, code=%ld\n",
-		       __func__, PTR_ERR(rmi_debugfs_root));
-		rmi_debugfs_root = NULL;
-	}
-#endif
-
-	error = bus_register(&rmi_bus_type);
-	if (error < 0) {
-		pr_err("%s: error registering the RMI bus: %d\n", __func__,
-		       error);
-		return error;
-	}
-	pr_debug("%s: successfully registered RMI bus.\n", __func__);
-
-	return 0;
-}
-
-static void __exit rmi_bus_exit(void)
-{
-	/* We should only ever get here if all drivers are unloaded, so
-	 * all we have to do at this point is unregister ourselves.
-	 */
-#ifdef CONFIG_RMI4_DEBUG
-	if (rmi_debugfs_root)
-		debugfs_remove(rmi_debugfs_root);
-#endif
-	bus_unregister(&rmi_bus_type);
-}
-
-module_init(rmi_bus_init);
-module_exit(rmi_bus_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com");
-MODULE_DESCRIPTION("RMI bus");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_dev.c b/drivers/input/touchscreen/rmi4/rmi_dev.c
deleted file mode 100755
index 080db55341bb5..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_dev.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/fs.h>
-#include <linux/delay.h>
-#include <linux/uaccess.h>
-#include <linux/slab.h>
-#include <linux/input.h>
-#include <linux/interrupt.h>
-#include <linux/syscalls.h>
-
-#include <linux/rmi.h>
-#include "rmi_driver.h"
-
-#define CHAR_DEVICE_NAME "rmi"
-#define DEVICE_CLASS_NAME "rmidev"
-
-#define RMI_CHAR_DEV_TMPBUF_SZ 128
-#define RMI_REG_ADDR_PAGE_SELECT 0xFF
-#define REG_ADDR_LIMIT 0xFFFF
-
-struct rmidev_data {
-	/* mutex for file operation*/
-	struct mutex file_mutex;
-	/* main char dev structure */
-	struct cdev main_dev;
-
-	/* pointer to the corresponding RMI4 device.  We use this to do */
-	/* read, write, etc. */
-	struct rmi_device *rmi_dev;
-	/* reference count */
-	int ref_count;
-
-	struct class *device_class;
-};
-
-/*store dynamically allocated major number of char device*/
-static int rmidev_major_num;
-
-
-static struct class *rmidev_device_class;
-
-
-/* file operations for RMI char device */
-
-/*
- * rmidev_llseek: - use to setup register address
- *
- * @filp: file structure for seek
- * @off: offset
- *       if whence == SEEK_SET,
- *       high 16 bits: page address
- *       low 16 bits: register address
- *
- *       if whence == SEEK_CUR,
- *       offset from current position
- *
- *       if whence == SEEK_END,
- *       offset from END(0xFFFF)
- *
- * @whence: SEEK_SET , SEEK_CUR or SEEK_END
- */
-static loff_t rmidev_llseek(struct file *filp, loff_t off, int whence)
-{
-	loff_t newpos;
-	struct rmidev_data *data = filp->private_data;
-
-	if (IS_ERR(data)) {
-		pr_err("%s: pointer of char device is invalid", __func__);
-		return -EBADF;
-	}
-
-	mutex_lock(&(data->file_mutex));
-
-	switch (whence) {
-	case SEEK_SET:
-		newpos = off;
-		break;
-
-	case SEEK_CUR:
-		newpos = filp->f_pos + off;
-		break;
-
-	case SEEK_END:
-		newpos = REG_ADDR_LIMIT + off;
-		break;
-
-	default:		/* can't happen */
-		newpos = -EINVAL;
-		goto clean_up;
-	}
-
-	if (newpos < 0 || newpos > REG_ADDR_LIMIT) {
-		dev_err(&data->rmi_dev->dev, "newpos 0x%04x is invalid.\n",
-			(unsigned int)newpos);
-		newpos = -EINVAL;
-		goto clean_up;
-	}
-
-	filp->f_pos = newpos;
-
-clean_up:
-	mutex_unlock(&(data->file_mutex));
-	return newpos;
-}
-
-/*
- *  rmidev_read: - use to read data from RMI stream
- *
- *  @filp: file structure for read
- *  @buf: user-level buffer pointer
- *
- *  @count: number of byte read
- *  @f_pos: offset (starting register address)
- *
- *	@return number of bytes read into user buffer (buf) if succeeds
- *          negative number if error occurs.
- */
-static ssize_t rmidev_read(struct file *filp, char __user *buf,
-		size_t count, loff_t *f_pos)
-{
-	struct rmidev_data *data = filp->private_data;
-	ssize_t retval  = 0;
-	unsigned char tmpbuf[count+1];
-
-	/* limit offset to REG_ADDR_LIMIT-1 */
-	if (count > (REG_ADDR_LIMIT - *f_pos))
-		count = REG_ADDR_LIMIT - *f_pos;
-
-	if (count == 0)
-		return 0;
-
-	if (IS_ERR(data)) {
-		pr_err("%s: pointer of char device is invalid", __func__);
-		return -EBADF;
-	}
-
-	mutex_lock(&(data->file_mutex));
-
-	retval = rmi_read_block(data->rmi_dev, *f_pos, tmpbuf, count);
-
-	if (retval < 0)
-		goto clean_up;
-
-	if (copy_to_user(buf, tmpbuf, count))
-		retval = -EFAULT;
-	else
-		*f_pos += retval;
-
-clean_up:
-
-	mutex_unlock(&(data->file_mutex));
-
-	return retval;
-}
-
-/*
- * rmidev_write: - use to write data into RMI stream
- *
- * @filep : file structure for write
- * @buf: user-level buffer pointer contains data to be written
- * @count: number of byte be be written
- * @f_pos: offset (starting register address)
- *
- * @return number of bytes written from user buffer (buf) if succeeds
- *         negative number if error occurs.
- */
-static ssize_t rmidev_write(struct file *filp, const char __user *buf,
-		size_t count, loff_t *f_pos)
-{
-	struct rmidev_data *data = filp->private_data;
-	ssize_t retval  = 0;
-	unsigned char tmpbuf[count+1];
-
-	/* limit offset to REG_ADDR_LIMIT-1 */
-	if (count > (REG_ADDR_LIMIT - *f_pos))
-		count = REG_ADDR_LIMIT - *f_pos;
-
-	if (count == 0)
-		return 0;
-
-	if (IS_ERR(data)) {
-		pr_err("%s: pointer of char device is invalid", __func__);
-		return -EBADF;
-	}
-
-	if (copy_from_user(tmpbuf, buf, count))
-		return -EFAULT;
-
-	mutex_lock(&(data->file_mutex));
-
-	retval = rmi_write_block(data->rmi_dev, *f_pos, tmpbuf, count);
-
-	if (retval >= 0)
-		*f_pos += count;
-
-	mutex_unlock(&(data->file_mutex));
-
-	return retval;
-}
-
-/*
- * rmidev_open: - get a new handle for from RMI stream
- * @inp : inode struture
- * @filp: file structure for read/write
- *
- * @return 0 if succeeds
- */
-static int rmidev_open(struct inode *inp, struct file *filp)
-{
-	struct rmidev_data *data = container_of(inp->i_cdev,
-			struct rmidev_data, main_dev);
-	int retval = 0;
-
-	filp->private_data = data;
-
-	if (!data->rmi_dev)
-		return -EACCES;
-
-	mutex_lock(&(data->file_mutex));
-	if (data->ref_count < 1)
-		data->ref_count++;
-	else
-		retval = -EACCES;
-
-	mutex_unlock(&(data->file_mutex));
-
-	return retval;
-}
-
-/*
- *  rmidev_release: - release an existing handle
- *  @inp: inode structure
- *  @filp: file structure for read/write
- *
- *  @return 0 if succeeds
- */
-static int rmidev_release(struct inode *inp, struct file *filp)
-{
-	struct rmidev_data *data = container_of(inp->i_cdev,
-			struct rmidev_data, main_dev);
-
-	if (!data->rmi_dev)
-		return -EACCES;
-
-	mutex_lock(&(data->file_mutex));
-
-	data->ref_count--;
-	if (data->ref_count < 0)
-		data->ref_count = 0;
-
-	mutex_unlock(&(data->file_mutex));
-
-	return 0;
-}
-
-static const struct file_operations rmidev_fops = {
-	.owner =    THIS_MODULE,
-	.llseek =   rmidev_llseek,
-	.read =     rmidev_read,
-	.write =    rmidev_write,
-	.open =     rmidev_open,
-	.release =  rmidev_release,
-};
-
-/*
- * rmidev_device_cleanup - release memory or unregister driver
- * @rmidev_data: instance data for a particular device.
- *
- */
-static void rmidev_device_cleanup(struct rmidev_data *data)
-{
-	dev_t devno;
-
-	/* Get rid of our char dev entries */
-	if (data) {
-		devno = data->main_dev.dev;
-
-		if (data->device_class)
-			device_destroy(data->device_class, devno);
-
-		cdev_del(&data->main_dev);
-		kfree(data);
-
-		/* cleanup_module is never called if registering failed */
-		unregister_chrdev_region(devno, 1);
-		pr_debug("%s: rmidev device is removed\n", __func__);
-	}
-}
-
-/*
- * rmi_char_devnode - return device permission
- *
- * @dev: char device structure
- * @mode: file permission
- *
- */
-static char *rmi_char_devnode(struct device *dev, mode_t *mode)
-{
-	if (!mode)
-		return NULL;
-	/**mode = 0666*/
-	*mode = (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH);
-
-	return kasprintf(GFP_KERNEL, "rmi/%s", dev_name(dev));
-}
-
-static int rmidev_init_device(struct rmi_char_device *cd)
-{
-	struct rmi_device *rmi_dev = cd->rmi_dev;
-	struct rmidev_data *data;
-	dev_t dev_no;
-	int retval;
-	struct device *device_ptr;
-
-	if (rmidev_major_num) {
-		dev_no = MKDEV(rmidev_major_num, cd->rmi_dev->number);
-		retval = register_chrdev_region(dev_no, 1, CHAR_DEVICE_NAME);
-	} else {
-		retval = alloc_chrdev_region(&dev_no, 0, 1, CHAR_DEVICE_NAME);
-		/* let kernel allocate a major for us */
-		rmidev_major_num = MAJOR(dev_no);
-		dev_info(&rmi_dev->dev, "Major number of rmidev: %d\n",
-				 rmidev_major_num);
-	}
-	if (retval < 0) {
-		dev_err(&rmi_dev->dev,
-			"Failed to get minor dev number %d, code %d.\n",
-			cd->rmi_dev->number, retval);
-		return retval;
-	} else
-		dev_info(&rmi_dev->dev, "Allocated rmidev %d %d.\n",
-			 MAJOR(dev_no), MINOR(dev_no));
-
-	data = kzalloc(sizeof(struct rmidev_data), GFP_KERNEL);
-	if (!data) {
-		dev_err(&rmi_dev->dev, "Failed to allocate rmidev_data.\n");
-		/* unregister the char device region */
-		__unregister_chrdev(rmidev_major_num, MINOR(dev_no), 1,
-				CHAR_DEVICE_NAME);
-		return -ENOMEM;
-	}
-
-	mutex_init(&data->file_mutex);
-
-	data->rmi_dev = cd->rmi_dev;
-	cd->data = data;
-
-	cdev_init(&data->main_dev, &rmidev_fops);
-
-	retval = cdev_add(&data->main_dev, dev_no, 1);
-	if (retval) {
-		dev_err(&cd->rmi_dev->dev, "Error %d adding rmi_char_dev.\n",
-			retval);
-		rmidev_device_cleanup(data);
-		return retval;
-	}
-
-	dev_set_name(&cd->dev, "rmidev%d", MINOR(dev_no));
-	data->device_class = rmidev_device_class;
-	device_ptr = device_create(
-			data->device_class,
-			NULL, dev_no, NULL,
-			CHAR_DEVICE_NAME"%d",
-			MINOR(dev_no));
-
-	if (IS_ERR(device_ptr)) {
-		dev_err(&cd->rmi_dev->dev, "Failed to create rmi device.\n");
-		rmidev_device_cleanup(data);
-		return -ENODEV;
-	}
-
-	return 0;
-}
-
-static void rmidev_remove_device(struct rmi_char_device *cd)
-{
-	struct rmidev_data *data;
-
-	dev_dbg(&cd->dev, "%s: removing an rmidev device.\n", __func__);
-	if (!cd)
-		return;
-
-	data = cd->data;
-	if (data)
-		rmidev_device_cleanup(data);
-}
-
-static struct rmi_char_driver rmidev_driver = {
-	.driver = {
-		.name = "rmidev",
-		.owner = THIS_MODULE,
-	},
-
-	.init = rmidev_init_device,
-	.remove = rmidev_remove_device,
-};
-
-static int __init rmidev_init(void)
-{
-	int error = 0;
-	pr_debug("%s: rmi_dev initialization.\n", __func__);
-
-	/* create device node */
-	rmidev_device_class = class_create(THIS_MODULE, DEVICE_CLASS_NAME);
-
-	if (IS_ERR(rmidev_device_class)) {
-		pr_err("%s: ERROR - Failed to create /dev/%s.\n", __func__,
-			CHAR_DEVICE_NAME);
-		return -ENODEV;
-	}
-	/* setup permission */
-	rmidev_device_class->devnode = rmi_char_devnode;
-
-	error = rmi_register_character_driver(&rmidev_driver);
-	if (error)
-		class_destroy(rmidev_device_class);
-	return error;
-}
-
-static void __exit rmidev_exit(void)
-{
-	pr_debug("%s: exiting.\n", __func__);
-	rmi_unregister_character_driver(&rmidev_driver);
-	class_destroy(rmidev_device_class);
-}
-
-module_init(rmidev_init);
-module_exit(rmidev_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com>");
-MODULE_DESCRIPTION("RMI4 Char Device");
-MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/rmi4/rmi_driver.c b/drivers/input/touchscreen/rmi4/rmi_driver.c
deleted file mode 100755
index 67f84a8eed920..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_driver.c
+++ /dev/null
@@ -1,1616 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This driver adds support for generic RMI4 devices from Synpatics. It
- * implements the mandatory f01 RMI register and depends on the presence of
- * other required RMI functions.
- *
- * The RMI4 specification can be found here (URL split after files/ for
- * style reasons):
- * http://www.synaptics.com/sites/default/files/
- *           511-000136-01-Rev-E-RMI4%20Intrfacing%20Guide.pdf
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/pm.h>
-#include <linux/rmi.h>
-#include "rmi_driver.h"
-#ifdef CONFIG_RMI4_DEBUG
-#include <linux/debugfs.h>
-#include <linux/fs.h>
-#include <asm/uaccess.h>
-#endif
-
-#define REGISTER_DEBUG 0
-
-#define PDT_END_SCAN_LOCATION	0x0005
-#define PDT_PROPERTIES_LOCATION 0x00EF
-#define BSR_LOCATION 0x00FE
-#define HAS_BSR_MASK 0x20
-#define HAS_NONSTANDARD_PDT_MASK 0x40
-#define RMI4_END_OF_PDT(id) ((id) == 0x00 || (id) == 0xff)
-#define RMI4_MAX_PAGE 0xff
-#define RMI4_PAGE_SIZE 0x100
-
-#define RMI_DEVICE_RESET_CMD	0x01
-#define DEFAULT_RESET_DELAY_MS	20
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-static void rmi_driver_early_suspend(struct early_suspend *h);
-static void rmi_driver_late_resume(struct early_suspend *h);
-#endif
-
-/* sysfs files for attributes for driver values. */
-static ssize_t rmi_driver_bsr_show(struct device *dev,
-				   struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_driver_bsr_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count);
-
-static ssize_t rmi_driver_enabled_show(struct device *dev,
-				       struct device_attribute *attr,
-				       char *buf);
-
-static ssize_t rmi_driver_enabled_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count);
-
-#if REGISTER_DEBUG
-static ssize_t rmi_driver_reg_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count);
-#endif
-
-#ifdef CONFIG_RMI4_DEBUG
-
-struct driver_debugfs_data {
-	bool done;
-	struct rmi_device *rmi_dev;
-};
-
-static int debug_open(struct inode *inodep, struct file *filp) {
-	struct driver_debugfs_data *data;
-
-	data = kzalloc(sizeof(struct driver_debugfs_data), GFP_KERNEL);
-	if (!data)
-		return -ENOMEM;
-
-	data->rmi_dev = inodep->i_private;
-	filp->private_data = data;
-	return 0;
-}
-
-static int debug_release(struct inode *inodep, struct file *filp) {
-	kfree(filp->private_data);
-	return 0;
-}
-
-#ifdef CONFIG_RMI4_SPI
-#define DELAY_NAME "delay"
-
-static ssize_t delay_read(struct file *filp, char __user *buffer, size_t size,
-		    loff_t *offset) {
-	struct driver_debugfs_data *data = filp->private_data;
-	struct rmi_device_platform_data *pdata =
-			data->rmi_dev->phys->dev->platform_data;
-	int retval;
-	char local_buf[size];
-
-	if (data->done)
-		return 0;
-
-	data->done = 1;
-
-	retval = snprintf(local_buf, size, "%d %d %d %d %d\n",
-		pdata->spi_data.read_delay_us, pdata->spi_data.write_delay_us,
-		pdata->spi_data.block_delay_us,
-		pdata->spi_data.pre_delay_us, pdata->spi_data.post_delay_us);
-
-	if (retval <= 0 || copy_to_user(buffer, local_buf, retval))
-		return -EFAULT;
-
-	return retval;
-}
-
-static ssize_t delay_write(struct file *filp, const char __user *buffer,
-			   size_t size, loff_t *offset) {
-	struct driver_debugfs_data *data = filp->private_data;
-	struct rmi_device_platform_data *pdata =
-			data->rmi_dev->phys->dev->platform_data;
-	int retval;
-	char local_buf[size];
-	unsigned int new_read_delay;
-	unsigned int new_write_delay;
-	unsigned int new_block_delay;
-	unsigned int new_pre_delay;
-	unsigned int new_post_delay;
-
-	retval = copy_from_user(local_buf, buffer, size);
-	if (retval)
-		return -EFAULT;
-
-	retval = sscanf(local_buf, "%u %u %u %u %u", &new_read_delay,
-			&new_write_delay, &new_block_delay,
-			&new_pre_delay, &new_post_delay);
-	if (retval != 5) {
-		dev_err(&data->rmi_dev->dev,
-			"Incorrect number of values provided for delay.");
-		return -EINVAL;
-	}
-	if (new_read_delay < 0) {
-		dev_err(&data->rmi_dev->dev,
-			"Byte delay must be positive microseconds.\n");
-		return -EINVAL;
-	}
-	if (new_write_delay < 0) {
-		dev_err(&data->rmi_dev->dev,
-			"Write delay must be positive microseconds.\n");
-		return -EINVAL;
-	}
-	if (new_block_delay < 0) {
-		dev_err(&data->rmi_dev->dev,
-			"Block delay must be positive microseconds.\n");
-		return -EINVAL;
-	}
-	if (new_pre_delay < 0) {
-		dev_err(&data->rmi_dev->dev,
-			"Pre-transfer delay must be positive microseconds.\n");
-		return -EINVAL;
-	}
-	if (new_post_delay < 0) {
-		dev_err(&data->rmi_dev->dev,
-			"Post-transfer delay must be positive microseconds.\n");
-		return -EINVAL;
-	}
-
-	dev_dbg(&data->rmi_dev->dev,
-		 "Setting delays to %u %u %u %u %u.\n", new_read_delay,
-		 new_write_delay, new_block_delay, new_pre_delay,
-		 new_post_delay);
-	pdata->spi_data.read_delay_us = new_read_delay;
-	pdata->spi_data.write_delay_us = new_write_delay;
-	pdata->spi_data.block_delay_us = new_block_delay;
-	pdata->spi_data.pre_delay_us = new_pre_delay;
-	pdata->spi_data.post_delay_us = new_post_delay;
-
-	return size;
-}
-
-static struct file_operations delay_fops = {
-	.owner = THIS_MODULE,
-	.open = debug_open,
-	.release = debug_release,
-	.read = delay_read,
-	.write = delay_write,
-};
-#endif /* CONFIG_RMI4_SPI */
-
-#define PHYS_NAME "phys"
-
-static ssize_t phys_read(struct file *filp, char __user *buffer, size_t size,
-		    loff_t *offset) {
-	struct driver_debugfs_data *data = filp->private_data;
-	struct rmi_phys_info *info = &data->rmi_dev->phys->info;
-	int retval;
-	char local_buf[size];
-
-	if (data->done)
-		return 0;
-
-	data->done = 1;
-
-	retval = snprintf(local_buf, PAGE_SIZE,
-		"%-5s %ld %ld %ld %ld %ld %ld %ld\n",
-		 info->proto ? info->proto : "unk",
-		 info->tx_count, info->tx_bytes, info->tx_errs,
-		 info->rx_count, info->rx_bytes, info->rx_errs,
-		 info->attn_count);
-	if (retval <= 0 || copy_to_user(buffer, local_buf, retval))
-		return -EFAULT;
-
-	return retval;
-}
-
-static struct file_operations phys_fops = {
-	.owner = THIS_MODULE,
-	.open = debug_open,
-	.release = debug_release,
-	.read = phys_read,
-};
-
-static int setup_debugfs(struct rmi_device *rmi_dev) {
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-#ifdef CONFIG_RMI4_SPI
-	struct rmi_phys_info *info = &rmi_dev->phys->info;
-#endif
-	int retval = 0;
-
-	if (!rmi_dev->debugfs_root)
-		return -ENODEV;
-
-#ifdef CONFIG_RMI4_SPI
-	if (!strncmp("spi", info->proto, 3)) {
-		data->debugfs_delay = debugfs_create_file(DELAY_NAME, RMI_RW_ATTR,
-					rmi_dev->debugfs_root, rmi_dev, &delay_fops);
-		if (!data->debugfs_delay || IS_ERR(data->debugfs_delay)) {
-			dev_warn(&rmi_dev->dev, "Failed to create debugfs delay.\n");
-			data->debugfs_delay = NULL;
-		}
-	}
-#endif
-
-	data->debugfs_phys = debugfs_create_file(PHYS_NAME, RMI_RO_ATTR,
-				rmi_dev->debugfs_root, rmi_dev, &phys_fops);
-	if (!data->debugfs_phys || IS_ERR(data->debugfs_phys)) {
-		dev_warn(&rmi_dev->dev, "Failed to create debugfs phys.\n");
-		data->debugfs_phys = NULL;
-	}
-
-	return retval;
-}
-
-static void teardown_debugfs(struct rmi_device *rmi_dev) {
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-#ifdef CONFIG_RMI4_SPI
-	if (!data->debugfs_delay)
-		debugfs_remove(data->debugfs_delay);
-#endif
-	if (!data->debugfs_phys)
-		debugfs_remove(data->debugfs_phys);
-}
-#endif
-
-static int rmi_driver_process_reset_requests(struct rmi_device *rmi_dev);
-
-static int rmi_driver_process_config_requests(struct rmi_device *rmi_dev);
-
-static int rmi_driver_irq_restore(struct rmi_device *rmi_dev);
-
-static struct device_attribute attrs[] = {
-	__ATTR(enabled, RMI_RW_ATTR,
-	       rmi_driver_enabled_show, rmi_driver_enabled_store),
-#if REGISTER_DEBUG
-	__ATTR(reg, RMI_WO_ATTR,
-	       rmi_show_error, rmi_driver_reg_store),
-#endif
-};
-
-static struct device_attribute bsr_attribute = __ATTR(bsr, RMI_RW_ATTR,
-	       rmi_driver_bsr_show, rmi_driver_bsr_store);
-
-/* Useful helper functions for u8* */
-
-void u8_set_bit(u8 *target, int pos)
-{
-	target[pos/8] |= 1<<pos%8;
-}
-
-void u8_clear_bit(u8 *target, int pos)
-{
-	target[pos/8] &= ~(1<<pos%8);
-}
-
-bool u8_is_set(u8 *target, int pos)
-{
-	return target[pos/8] & 1<<pos%8;
-}
-
-bool u8_is_any_set(u8 *target, int size)
-{
-	int i;
-	for (i = 0; i < size; i++) {
-		if (target[i])
-			return true;
-	}
-	return false;
-}
-
-void u8_or(u8 *dest, u8 *target1, u8 *target2, int size)
-{
-	int i;
-	for (i = 0; i < size; i++)
-		dest[i] = target1[i] | target2[i];
-}
-
-void u8_and(u8 *dest, u8 *target1, u8 *target2, int size)
-{
-	int i;
-	for (i = 0; i < size; i++)
-		dest[i] = target1[i] & target2[i];
-}
-
-static bool has_bsr(struct rmi_driver_data *data)
-{
-	return (data->pdt_props & HAS_BSR_MASK) != 0;
-}
-
-/* Utility routine to set bits in a register. */
-int rmi_set_bits(struct rmi_device *rmi_dev, unsigned short address,
-		 unsigned char bits)
-{
-	unsigned char reg_contents;
-	int retval;
-
-	retval = rmi_read_block(rmi_dev, address, &reg_contents, 1);
-	if (retval)
-		return retval;
-	reg_contents = reg_contents | bits;
-	retval = rmi_write_block(rmi_dev, address, &reg_contents, 1);
-	if (retval == 1)
-		return 0;
-	else if (retval == 0)
-		return -EIO;
-	return retval;
-}
-EXPORT_SYMBOL(rmi_set_bits);
-
-/* Utility routine to clear bits in a register. */
-int rmi_clear_bits(struct rmi_device *rmi_dev, unsigned short address,
-		   unsigned char bits)
-{
-	unsigned char reg_contents;
-	int retval;
-
-	retval = rmi_read_block(rmi_dev, address, &reg_contents, 1);
-	if (retval)
-		return retval;
-	reg_contents = reg_contents & ~bits;
-	retval = rmi_write_block(rmi_dev, address, &reg_contents, 1);
-	if (retval == 1)
-		return 0;
-	else if (retval == 0)
-		return -EIO;
-	return retval;
-}
-EXPORT_SYMBOL(rmi_clear_bits);
-
-static void rmi_free_function_list(struct rmi_device *rmi_dev)
-{
-	struct rmi_function_container *entry, *n;
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	if (!data) {
-		dev_err(&rmi_dev->dev, "WTF: No driver data in %s\n", __func__);
-		return;
-	}
-
-	if (data->f01_container) {
-		if (data->f01_container->fh && data->f01_container->fh->remove) {
-			data->f01_container->fh->remove(data->f01_container);
-		}
-		device_unregister(&data->f01_container->dev);
-		kfree(data->f01_container->irq_mask);
-		kfree(data->f01_container);
-		data->f01_container = NULL;
-	}
-
-	if (list_empty(&data->rmi_functions.list))
-		return;
-
-	list_for_each_entry_safe(entry, n, &data->rmi_functions.list, list) {
-		if (entry->fh) {
-			if (entry->fh->remove)
-				entry->fh->remove(entry);
-			device_unregister(&entry->dev);
-		}
-		kfree(entry->irq_mask);
-		list_del(&entry->list);
-		kfree(entry);
-	}
-}
-
-static void no_op(struct device *dev)
-{
-	dev_dbg(dev, "REMOVING KOBJ!");
-	kobject_put(&dev->kobj);
-}
-
-static int init_one_function(struct rmi_device *rmi_dev,
-			     struct rmi_function_container *fc)
-{
-	int retval;
-
-	if (!fc->fh) {
-		struct rmi_function_handler *fh =
-			rmi_get_function_handler(fc->fd.function_number);
-		if (!fh) {
-			dev_dbg(&rmi_dev->dev, "No handler for F%02X.\n",
-				fc->fd.function_number);
-			return 0;
-		}
-		fc->fh = fh;
-	}
-
-	if (!fc->fh->init)
-		return 0;
-	/* This memset might not be what we want to do... */
-	memset(&(fc->dev), 0, sizeof(struct device));
-	dev_set_name(&(fc->dev), "fn%02x", fc->fd.function_number);
-	fc->dev.release = no_op;
-
-	fc->dev.parent = &rmi_dev->dev;
-	dev_dbg(&rmi_dev->dev, "%s: Register F%02X.\n", __func__,
-			fc->fd.function_number);
-	retval = device_register(&fc->dev);
-	if (retval) {
-		dev_err(&rmi_dev->dev, "Failed device_register for F%02X.\n",
-			fc->fd.function_number);
-		return retval;
-	}
-
-	retval = fc->fh->init(fc);
-	if (retval < 0) {
-		dev_err(&rmi_dev->dev, "Failed to initialize function F%02x\n",
-			fc->fd.function_number);
-		goto error_exit;
-	}
-
-	return 0;
-
-error_exit:
-	device_unregister(&fc->dev);
-	return retval;
-}
-
-static void rmi_driver_fh_add(struct rmi_device *rmi_dev,
-			      struct rmi_function_handler *fh)
-{
-	struct rmi_function_container *entry;
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	if (!data)
-		return;
-	if (fh->func == 0x01) {
-		if (data->f01_container)
-			data->f01_container->fh = fh;
-	} else if (!list_empty(&data->rmi_functions.list)) {
-		mutex_lock(&data->pdt_mutex);
-		list_for_each_entry(entry, &data->rmi_functions.list, list)
-			if (entry->fd.function_number == fh->func) {
-				entry->fh = fh;
-				if (init_one_function(rmi_dev, entry) < 0)
-					entry->fh = NULL;
-			}
-		mutex_unlock(&data->pdt_mutex);
-	}
-
-}
-
-static void rmi_driver_fh_remove(struct rmi_device *rmi_dev,
-				 struct rmi_function_handler *fh)
-{
-	struct rmi_function_container *entry, *temp;
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	if (fh->func == 0x01) {
-		/* don't call remove here since
-		 * rmi_f01_initialize just get call one time */
-		if (data->f01_container)
-			data->f01_container->fh = NULL;
-		return;
-	}
-
-	list_for_each_entry_safe(entry, temp, &data->rmi_functions.list,
-									list) {
-		if (entry->fh && entry->fd.function_number == fh->func) {
-			if (fh->remove)
-				fh->remove(entry);
-
-			entry->fh = NULL;
-			device_unregister(&entry->dev);
-		}
-	}
-}
-
-static int rmi_driver_process_reset_requests(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct device *dev = &rmi_dev->dev;
-	struct rmi_function_container *entry;
-	int retval;
-
-	/* Device control (F01) is handled before anything else. */
-
-	if (data->f01_container && data->f01_container->fh &&
-			data->f01_container->fh->reset) {
-		retval = data->f01_container->fh->reset(data->f01_container);
-		if (retval < 0) {
-			dev_err(dev, "F%02x reset handler failed: %d.\n",
-				data->f01_container->fh->func, retval);
-			return retval;
-		}
-	}
-
-	if (list_empty(&data->rmi_functions.list))
-		return 0;
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list) {
-		if (entry->fh && entry->fh->reset) {
-			retval = entry->fh->reset(entry);
-			if (retval < 0) {
-				dev_err(dev, "F%02x reset handler failed: %d\n",
-					entry->fh->func, retval);
-				return retval;
-			}
-		}
-	}
-
-	return 0;
-}
-
-static int rmi_driver_process_config_requests(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct device *dev = &rmi_dev->dev;
-	struct rmi_function_container *entry;
-	int retval;
-
-	/* Device control (F01) is handled before anything else. */
-
-	if (data->f01_container && data->f01_container->fh &&
-			data->f01_container->fh->config) {
-		retval = data->f01_container->fh->config(data->f01_container);
-		if (retval < 0) {
-			dev_err(dev, "F%02x config handler failed: %d.\n",
-					data->f01_container->fh->func, retval);
-			return retval;
-		}
-	}
-
-	if (list_empty(&data->rmi_functions.list))
-		return 0;
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list) {
-		if (entry->fh && entry->fh->config) {
-			retval = entry->fh->config(entry);
-			if (retval < 0) {
-				dev_err(dev, "F%02x config handler failed: %d.\n",
-					entry->fh->func, retval);
-				return retval;
-			}
-		}
-	}
-
-	return 0;
-}
-
-static void construct_mask(u8 *mask, int num, int pos)
-{
-	int i;
-
-	for (i = 0; i < num; i++)
-		u8_set_bit(mask, pos+i);
-}
-
-static int process_interrupt_requests(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct device *dev = &rmi_dev->dev;
-	struct rmi_function_container *entry;
-	u8 irq_status[data->num_of_irq_regs];
-	u8 irq_bits[data->num_of_irq_regs];
-	int error;
-
-	error = rmi_read_block(rmi_dev,
-				data->f01_container->fd.data_base_addr + 1,
-				irq_status, data->num_of_irq_regs);
-	if (error < 0) {
-		dev_err(dev, "%s: failed to read irqs.", __func__);
-		return error;
-	}
-	/* Device control (F01) is handled before anything else. */
-	if (data->f01_container->irq_mask && data->f01_container->fh->attention) {
-		u8_and(irq_bits, irq_status, data->f01_container->irq_mask,
-				data->num_of_irq_regs);
-		if (u8_is_any_set(irq_bits, data->num_of_irq_regs))
-			data->f01_container->fh->attention(
-					data->f01_container, irq_bits);
-	}
-
-	u8_and(irq_status, irq_status, data->current_irq_mask,
-	       data->num_of_irq_regs);
-	/* At this point, irq_status has all bits that are set in the
-	 * interrupt status register and are enabled.
-	 */
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->irq_mask && entry->fh && entry->fh->attention) {
-			u8_and(irq_bits, irq_status, entry->irq_mask,
-			       data->num_of_irq_regs);
-			if (u8_is_any_set(irq_bits, data->num_of_irq_regs)) {
-				error = entry->fh->attention(entry, irq_bits);
-				if (error < 0)
-					dev_err(dev, "%s: f%.2x"
-						" attention handler failed:"
-						" %d\n", __func__,
-						entry->fh->func, error);
-			}
-		}
-
-	return 0;
-}
-
-static int rmi_driver_irq_handler(struct rmi_device *rmi_dev, int irq)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	/* Can get called before the driver is fully ready to deal with
-	 * interrupts.
-	 */
-	if (!data || !data->f01_container || !data->f01_container->fh) {
-		dev_warn(&rmi_dev->dev,
-			 "Not ready to handle interrupts yet!\n");
-		return 0;
-	}
-	return process_interrupt_requests(rmi_dev);
-}
-
-static int rmi_driver_reset_handler(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	int error;
-
-	/* Can get called before the driver is fully ready to deal with
-	 * interrupts.
-	 */
-	if (!data || !data->f01_container || !data->f01_container->fh) {
-		dev_warn(&rmi_dev->dev,
-			 "Not ready to handle reset yet!\n");
-		return 0;
-	}
-
-	error = rmi_driver_process_reset_requests(rmi_dev);
-	if (error < 0)
-		return error;
-
-
-	error = rmi_driver_process_config_requests(rmi_dev);
-	if (error < 0)
-		return error;
-
-	if (data->irq_stored) {
-		error = rmi_driver_irq_restore(rmi_dev);
-		if (error < 0)
-			return error;
-	}
-
-	return 0;
-}
-
-
-
-/*
- * Construct a function's IRQ mask. This should
- * be called once and stored.
- */
-static u8 *rmi_driver_irq_get_mask(struct rmi_device *rmi_dev,
-				   struct rmi_function_container *fc) {
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	u8 *irq_mask = kzalloc(sizeof(u8) * data->num_of_irq_regs, GFP_KERNEL);
-	if (irq_mask)
-		construct_mask(irq_mask, fc->num_of_irqs, fc->irq_pos);
-
-	return irq_mask;
-}
-
-/*
- * This pair of functions allows functions like function 54 to request to have
- * other interupts disabled until the restore function is called. Only one store
- * happens at a time.
- */
-static int rmi_driver_irq_save(struct rmi_device *rmi_dev, u8 * new_ints)
-{
-	int retval = 0;
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct device *dev = &rmi_dev->dev;
-
-	mutex_lock(&data->irq_mutex);
-	if (!data->irq_stored) {
-		/* Save current enabled interupts */
-		retval = rmi_read_block(rmi_dev,
-				data->f01_container->fd.control_base_addr+1,
-				data->irq_mask_store, data->num_of_irq_regs);
-		if (retval < 0) {
-			dev_err(dev, "%s: Failed to read enabled interrupts!",
-								__func__);
-			goto error_unlock;
-		}
-		/*
-		 * Disable every interupt except for function 54
-		 * TODO:Will also want to not disable function 1-like functions.
-		 * No need to take care of this now, since there's no good way
-		 * to identify them.
-		 */
-		retval = rmi_write_block(rmi_dev,
-				data->f01_container->fd.control_base_addr+1,
-				new_ints, data->num_of_irq_regs);
-		if (retval < 0) {
-			dev_err(dev, "%s: Failed to change enabled interrupts!",
-								__func__);
-			goto error_unlock;
-		}
-		memcpy(data->current_irq_mask, new_ints,
-					data->num_of_irq_regs * sizeof(u8));
-		data->irq_stored = true;
-	} else {
-		retval = -ENOSPC; /* No space to store IRQs.*/
-		dev_err(dev, "%s: Attempted to save values when"
-						" already stored!", __func__);
-	}
-
-error_unlock:
-	mutex_unlock(&data->irq_mutex);
-	return retval;
-}
-
-static int rmi_driver_irq_restore(struct rmi_device *rmi_dev)
-{
-	int retval = 0;
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct device *dev = &rmi_dev->dev;
-	mutex_lock(&data->irq_mutex);
-
-	if (data->irq_stored) {
-		retval = rmi_write_block(rmi_dev,
-				data->f01_container->fd.control_base_addr+1,
-				data->irq_mask_store, data->num_of_irq_regs);
-		if (retval < 0) {
-			dev_err(dev, "%s: Failed to write enabled interupts!",
-								__func__);
-			goto error_unlock;
-		}
-		memcpy(data->current_irq_mask, data->irq_mask_store,
-					data->num_of_irq_regs * sizeof(u8));
-		data->irq_stored = false;
-	} else {
-		retval = -EINVAL;
-		dev_err(dev, "%s: Attempted to restore values when not stored!",
-			__func__);
-	}
-
-error_unlock:
-	mutex_unlock(&data->irq_mutex);
-	return retval;
-}
-
-static int rmi_driver_fn_generic(struct rmi_device *rmi_dev,
-				     struct pdt_entry *pdt_ptr,
-				     int *current_irq_count,
-				     u16 page_start)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct rmi_function_container *fc = NULL;
-	int retval = 0;
-	struct device *dev = &rmi_dev->dev;
-	struct rmi_device_platform_data *pdata;
-
-	pdata = to_rmi_platform_data(rmi_dev);
-
-	dev_dbg(dev, "Initializing F%02X for %s.\n", pdt_ptr->function_number,
-		pdata->sensor_name);
-
-	fc = kzalloc(sizeof(struct rmi_function_container),
-			GFP_KERNEL);
-	if (!fc) {
-		dev_err(dev, "Failed to allocate container for F%02X.\n",
-			pdt_ptr->function_number);
-		retval = -ENOMEM;
-		goto error_free_data;
-	}
-
-	copy_pdt_entry_to_fd(pdt_ptr, &fc->fd, page_start);
-
-	fc->rmi_dev = rmi_dev;
-	fc->num_of_irqs = pdt_ptr->interrupt_source_count;
-	fc->irq_pos = *current_irq_count;
-	*current_irq_count += fc->num_of_irqs;
-
-	retval = init_one_function(rmi_dev, fc);
-	if (retval < 0) {
-		dev_err(dev, "Failed to initialize F%.2x\n",
-			pdt_ptr->function_number);
-		goto error_free_data;
-	}
-
-	INIT_LIST_HEAD(&fc->list);
-	list_add_tail(&fc->list, &data->rmi_functions.list);
-	return 0;
-
-error_free_data:
-	kfree(fc);
-	return retval;
-}
-
-/*
- * F01 was once handled very differently from all other functions.  It is
- * now only slightly special, and as the driver is refined we expect this
- * function to go away.
- */
-static int rmi_driver_fn_01_specific(struct rmi_device *rmi_dev,
-				     struct pdt_entry *pdt_ptr,
-				     int *current_irq_count,
-				     u16 page_start)
-{
-	struct rmi_driver_data *data = NULL;
-	struct rmi_function_container *fc = NULL;
-	union f01_device_status device_status;
-	int retval = 0;
-	struct device *dev = &rmi_dev->dev;
-	struct rmi_function_handler *fh =
-		rmi_get_function_handler(0x01);
-	struct rmi_device_platform_data *pdata;
-
-	pdata = to_rmi_platform_data(rmi_dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	retval = rmi_read(rmi_dev, pdt_ptr->data_base_addr, &device_status.reg);
-	if (retval) {
-		dev_err(dev, "Failed to read device status.\n");
-		return retval;
-	}
-
-	dev_dbg(dev, "Initializing F01 for %s.\n", pdata->sensor_name);
-
-	if (!fh)
-		dev_dbg(dev, "%s: No function handler for F01?!", __func__);
-
-	fc = kzalloc(sizeof(struct rmi_function_container), GFP_KERNEL);
-	if (!fc) {
-		retval = -ENOMEM;
-		return retval;
-	}
-
-	copy_pdt_entry_to_fd(pdt_ptr, &fc->fd, page_start);
-	fc->num_of_irqs = pdt_ptr->interrupt_source_count;
-	fc->irq_pos = *current_irq_count;
-	*current_irq_count += fc->num_of_irqs;
-
-	fc->rmi_dev        = rmi_dev;
-	fc->dev.parent     = &fc->rmi_dev->dev;
-	fc->fh = fh;
-
-	dev_set_name(&(fc->dev), "fn%02x", fc->fd.function_number);
-	fc->dev.release = no_op;
-
-	dev_dbg(dev, "%s: Register F01.\n", __func__);
-	retval = device_register(&fc->dev);
-	if (retval) {
-		dev_err(dev, "%s: Failed device_register for F01.\n", __func__);
-		goto error_free_data;
-	}
-
-	data->f01_container = fc;
-	data->f01_bootloader_mode = device_status.flash_prog;
-	if (device_status.flash_prog)
-		dev_warn(dev, "WARNING: RMI4 device is in bootloader mode!\n");
-
-	INIT_LIST_HEAD(&fc->list);
-
-	return retval;
-
-error_free_data:
-	kfree(fc);
-	return retval;
-}
-
-/*
- * Scan the PDT for F01 so we can force a reset before anything else
- * is done.  This forces the sensor into a known state, and also
- * forces application of any pending updates from reflashing the
- * firmware or configuration.  We have to do this before actually
- * building the PDT because the reflash might cause various registers
- * to move around.
- */
-static int do_initial_reset(struct rmi_device *rmi_dev)
-{
-	struct pdt_entry pdt_entry;
-	int page;
-	struct device *dev = &rmi_dev->dev;
-	bool done = false;
-	int i;
-	int retval;
-	struct rmi_device_platform_data *pdata;
-
-	dev_dbg(dev, "Initial reset.\n");
-	pdata = to_rmi_platform_data(rmi_dev);
-	for (page = 0; (page <= RMI4_MAX_PAGE) && !done; page++) {
-		u16 page_start = RMI4_PAGE_SIZE * page;
-		u16 pdt_start = page_start + PDT_START_SCAN_LOCATION;
-		u16 pdt_end = page_start + PDT_END_SCAN_LOCATION;
-
-		done = true;
-		for (i = pdt_start; i >= pdt_end; i -= sizeof(pdt_entry)) {
-			retval = rmi_read_block(rmi_dev, i, (u8 *)&pdt_entry,
-					       sizeof(pdt_entry));
-			if (retval != sizeof(pdt_entry)) {
-				dev_err(dev, "Read PDT entry at 0x%04x"
-					"failed, code = %d.\n", i, retval);
-				return retval;
-			}
-
-			if (RMI4_END_OF_PDT(pdt_entry.function_number))
-				break;
-			done = false;
-
-			if (pdt_entry.function_number == 0x01) {
-				u16 cmd_addr = page_start +
-					pdt_entry.command_base_addr;
-				u8 cmd_buf = RMI_DEVICE_RESET_CMD;
-				retval = rmi_write_block(rmi_dev, cmd_addr,
-						&cmd_buf, 1);
-				if (retval < 0) {
-					dev_err(dev, "Initial reset failed. "
-						"Code = %d.\n", retval);
-					return retval;
-				}
-				mdelay(pdata->reset_delay_ms);
-				return 0;
-			}
-		}
-	}
-
-	dev_warn(dev, "WARNING: Failed to find F01 for initial reset.\n");
-	return -ENODEV;
-}
-
-static int rmi_scan_pdt(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data;
-	struct pdt_entry pdt_entry;
-	int page;
-	struct device *dev = &rmi_dev->dev;
-	int irq_count = 0;
-	bool done = false;
-	int i;
-	int retval;
-#ifdef CONFIG_RMI4_DEBUG
-	dev_info(dev, "Scanning PDT...\n");
-#endif
-	data = rmi_get_driverdata(rmi_dev);
-	mutex_lock(&data->pdt_mutex);
-
-	for (page = 0; (page <= RMI4_MAX_PAGE) && !done; page++) {
-		u16 page_start = RMI4_PAGE_SIZE * page;
-		u16 pdt_start = page_start + PDT_START_SCAN_LOCATION;
-		u16 pdt_end = page_start + PDT_END_SCAN_LOCATION;
-
-		done = true;
-		for (i = pdt_start; i >= pdt_end; i -= sizeof(pdt_entry)) {
-			retval = rmi_read_block(rmi_dev, i, (u8 *)&pdt_entry,
-					       sizeof(pdt_entry));
-			if (retval != sizeof(pdt_entry)) {
-				dev_err(dev, "Read PDT entry at 0x%04x "
-					"failed.\n", i);
-				goto error_exit;
-			}
-
-			if (RMI4_END_OF_PDT(pdt_entry.function_number))
-				break;
-#ifdef CONFIG_RMI4_DEBUG
-			dev_info(dev, "%s: Found F%.2X on page 0x%02X\n",
-				__func__, pdt_entry.function_number, page);
-#endif
-			done = false;
-
-			if (pdt_entry.function_number == 0x01)
-				retval = rmi_driver_fn_01_specific(rmi_dev,
-						&pdt_entry, &irq_count,
-						page_start);
-			else
-				retval = rmi_driver_fn_generic(rmi_dev,
-						&pdt_entry, &irq_count,
-						page_start);
-
-			if (retval)
-				goto error_exit;
-#ifdef CONFIG_RMI4_DEBUG
-			printk("command_base_addr:%x, control_base_addr:%x, data_base_addr:%x\n", pdt_entry.command_base_addr,
-					pdt_entry.control_base_addr, pdt_entry.data_base_addr);
-#else
-			msleep(1);         //in this for(), enough delay is needed, or may cause system die
-#endif
-		}
-		done = done || data->f01_bootloader_mode;
-	}
-	data->irq_count = irq_count;
-	data->num_of_irq_regs = (irq_count + 7) / 8;
-	dev_dbg(dev, "%s: Done with PDT scan.\n", __func__);
-	retval = 0;
-
-error_exit:
-	mutex_unlock(&data->pdt_mutex);
-	return retval;
-}
-
-static int rmi_driver_probe(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = NULL;
-	struct rmi_function_container *fc;
-	struct rmi_device_platform_data *pdata;
-	int retval = 0;
-	struct device *dev = &rmi_dev->dev;
-	int attr_count = 0;
-
-	dev_dbg(dev, "%s: Starting probe.\n", __func__);
-
-	pdata = to_rmi_platform_data(rmi_dev);
-
-	data = kzalloc(sizeof(struct rmi_driver_data), GFP_KERNEL);
-	if (!data) {
-		dev_err(dev, "%s: Failed to allocate driver data.\n", __func__);
-		return -ENOMEM;
-	}
-	INIT_LIST_HEAD(&data->rmi_functions.list);
-	rmi_set_driverdata(rmi_dev, data);
-	mutex_init(&data->pdt_mutex);
-
-	if (!pdata->reset_delay_ms)
-		pdata->reset_delay_ms = DEFAULT_RESET_DELAY_MS;
-	retval = do_initial_reset(rmi_dev);
-	if (retval)
-		dev_warn(dev, "RMI initial reset failed! Soldiering on.\n");
-
-
-	retval = rmi_scan_pdt(rmi_dev);
-	if (retval) {
-		dev_err(dev, "PDT scan for %s failed with code %d.\n",
-			pdata->sensor_name, retval);
-		goto err_free_data;
-	}
-
-	if (!data->f01_container) {
-		dev_err(dev, "missing F01 container!\n");
-		retval = -EINVAL;
-		goto err_free_data;
-	}
-
-	data->f01_container->irq_mask = kzalloc(
-			sizeof(u8) * data->num_of_irq_regs, GFP_KERNEL);
-	if (!data->f01_container->irq_mask) {
-		dev_err(dev, "Failed to allocate F01 IRQ mask.\n");
-		retval = -ENOMEM;
-		goto err_free_data;
-	}
-	construct_mask(data->f01_container->irq_mask,
-		       data->f01_container->num_of_irqs,
-		       data->f01_container->irq_pos);
-	list_for_each_entry(fc, &data->rmi_functions.list, list)
-		fc->irq_mask = rmi_driver_irq_get_mask(rmi_dev, fc);
-
-	retval = rmi_driver_f01_init(rmi_dev);
-	if (retval < 0) {
-		dev_err(dev, "Failed to initialize F01.\n");
-		goto err_free_data;
-	}
-
-	retval = rmi_read(rmi_dev, PDT_PROPERTIES_LOCATION,
-			 (char *) &data->pdt_props);
-	if (retval < 0) {
-		/* we'll print out a warning and continue since
-		 * failure to get the PDT properties is not a cause to fail
-		 */
-		dev_warn(dev, "Could not read PDT properties from 0x%04x. "
-			 "Assuming 0x00.\n", PDT_PROPERTIES_LOCATION);
-	}
-
-	dev_dbg(dev, "%s: Creating sysfs files.", __func__);
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		retval = device_create_file(dev, &attrs[attr_count]);
-		if (retval < 0) {
-			dev_err(dev, "%s: Failed to create sysfs file %s.\n",
-				__func__, attrs[attr_count].attr.name);
-			goto err_free_data;
-		}
-	}
-	if (has_bsr(data)) {
-		retval = device_create_file(dev, &bsr_attribute);
-		if (retval < 0) {
-			dev_err(dev, "%s: Failed to create sysfs file bsr.\n",
-				__func__);
-			goto err_free_data;
-		}
-	}
-
-	mutex_init(&data->irq_mutex);
-	data->current_irq_mask = kzalloc(sizeof(u8) * data->num_of_irq_regs,
-					 GFP_KERNEL);
-	if (!data->current_irq_mask) {
-		dev_err(dev, "Failed to allocate current_irq_mask.\n");
-		retval = -ENOMEM;
-		goto err_free_data;
-	}
-	retval = rmi_read_block(rmi_dev,
-				data->f01_container->fd.control_base_addr+1,
-				data->current_irq_mask, data->num_of_irq_regs);
-	if (retval < 0) {
-		dev_err(dev, "%s: Failed to read current IRQ mask.\n",
-			__func__);
-		goto err_free_data;
-	}
-	data->irq_mask_store = kzalloc(sizeof(u8) * data->num_of_irq_regs,
-				       GFP_KERNEL);
-	if (!data->irq_mask_store) {
-		dev_err(dev, "Failed to allocate mask store.\n");
-		retval = -ENOMEM;
-		goto err_free_data;
-	}
-
-#ifdef	CONFIG_PM
-	data->pm_data = pdata->pm_data;
-	data->pre_suspend = pdata->pre_suspend;
-	data->post_resume = pdata->post_resume;
-
-	mutex_init(&data->suspend_mutex);
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	rmi_dev->early_suspend_handler.level =
-		EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
-	rmi_dev->early_suspend_handler.suspend = rmi_driver_early_suspend;
-	rmi_dev->early_suspend_handler.resume = rmi_driver_late_resume;
-	register_early_suspend(&rmi_dev->early_suspend_handler);
-#endif /* CONFIG_HAS_EARLYSUSPEND */
-#endif /* CONFIG_PM */
-	data->enabled = true;
-
-#ifdef CONFIG_RMI4_DEBUG
-	retval = setup_debugfs(rmi_dev);
-	if (retval < 0)
-		dev_warn(&fc->dev, "Failed to setup debugfs. Code: %d.\n",
-			 retval);
-#endif
-
-	return 0;
-
- err_free_data:
-	rmi_free_function_list(rmi_dev);
-	for (attr_count--; attr_count >= 0; attr_count--)
-		device_remove_file(dev, &attrs[attr_count]);
-	if (has_bsr(data))
-		device_remove_file(dev, &bsr_attribute);
-	if (data->f01_container)
-		kfree(data->f01_container->irq_mask);
-	kfree(data->irq_mask_store);
-	kfree(data->current_irq_mask);
-	kfree(data);
-	rmi_set_driverdata(rmi_dev, NULL);
-	return retval;
-}
-
-#ifdef CONFIG_PM
-static int rmi_driver_suspend(struct device *dev)
-{
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-	struct rmi_function_container *entry;
-	int retval = 0;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	mutex_lock(&data->suspend_mutex);
-	if (data->suspended)
-		goto exit;
-
-#ifndef	CONFIG_HAS_EARLYSUSPEND
-	if (data->pre_suspend) {
-		retval = data->pre_suspend(data->pm_data);
-		if (retval)
-			goto exit;
-	}
-#endif  /* !CONFIG_HAS_EARLYSUSPEND */
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->fh && entry->fh->suspend) {
-			retval = entry->fh->suspend(entry);
-			if (retval < 0)
-				goto exit;
-		}
-
-	if (data->f01_container && data->f01_container->fh
-				&& data->f01_container->fh->suspend) {
-		retval = data->f01_container->fh->suspend(data->f01_container);
-		if (retval < 0)
-			goto exit;
-	}
-	data->suspended = true;
-
-exit:
-	mutex_unlock(&data->suspend_mutex);
-	return retval;
-}
-
-static int rmi_driver_resume(struct device *dev)
-{
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-	struct rmi_function_container *entry;
-	int retval = 0;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	mutex_lock(&data->suspend_mutex);
-	if (!data->suspended)
-		goto exit;
-
-	if (data->f01_container && data->f01_container->fh
-				&& data->f01_container->fh->resume) {
-		retval = data->f01_container->fh->resume(data->f01_container);
-		if (retval < 0)
-			goto exit;
-	}
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->fh && entry->fh->resume) {
-			retval = entry->fh->resume(entry);
-			if (retval < 0)
-				goto exit;
-		}
-
-#ifndef	CONFIG_HAS_EARLYSUSPEND
-	if (data->post_resume) {
-		retval = data->post_resume(data->pm_data);
-		if (retval)
-			goto exit;
-	}
-#endif  /* !CONFIG_HAS_EARLYSUSPEND */
-
-	data->suspended = false;
-
-exit:
-	mutex_unlock(&data->suspend_mutex);
-	return retval;
-}
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-static void rmi_driver_early_suspend(struct early_suspend *h)
-{
-	struct rmi_device *rmi_dev =
-	    container_of(h, struct rmi_device, early_suspend_handler);
-	struct rmi_driver_data *data;
-	struct rmi_function_container *entry;
-	int retval = 0;
-
-	data = rmi_get_driverdata(rmi_dev);
-	dev_dbg(&rmi_dev->dev, "Early suspend.\n");
-
-	mutex_lock(&data->suspend_mutex);
-	if (data->suspended)
-		goto exit;
-
-	if (data->pre_suspend) {
-		retval = data->pre_suspend(data->pm_data);
-		if (retval)
-			goto exit;
-	}
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->fh && entry->fh->early_suspend) {
-			retval = entry->fh->early_suspend(entry);
-			if (retval < 0)
-				goto exit;
-		}
-
-	if (data->f01_container && data->f01_container->fh
-				&& data->f01_container->fh->early_suspend) {
-		retval = data->f01_container->fh->early_suspend(
-				data->f01_container);
-		if (retval < 0)
-			goto exit;
-	}
-	data->suspended = true;
-
-exit:
-	mutex_unlock(&data->suspend_mutex);
-}
-
-static void rmi_driver_late_resume(struct early_suspend *h)
-{
-	struct rmi_device *rmi_dev =
-	    container_of(h, struct rmi_device, early_suspend_handler);
-	struct rmi_driver_data *data;
-	struct rmi_function_container *entry;
-	int retval = 0;
-
-	data = rmi_get_driverdata(rmi_dev);
-	dev_dbg(&rmi_dev->dev, "Late resume.\n");
-
-	mutex_lock(&data->suspend_mutex);
-	if (!data->suspended)
-		goto exit;
-
-	if (data->f01_container && data->f01_container->fh
-				&& data->f01_container->fh->late_resume) {
-		retval = data->f01_container->fh->late_resume(
-				data->f01_container);
-		if (retval < 0)
-			goto exit;
-	}
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->fh && entry->fh->late_resume) {
-			retval = entry->fh->late_resume(entry);
-			if (retval < 0)
-				goto exit;
-		}
-
-	if (data->post_resume) {
-		retval = data->post_resume(data->pm_data);
-		if (retval)
-			goto exit;
-	}
-
-	data->suspended = false;
-
-exit:
-	mutex_unlock(&data->suspend_mutex);
-}
-#endif /* CONFIG_HAS_EARLYSUSPEND */
-#endif /* CONFIG_PM */
-
-static int __devexit rmi_driver_remove(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	struct rmi_function_container *entry;
-	int i;
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	unregister_early_suspend(&rmi_dev->early_suspend_handler);
-#endif /* CONFIG_HAS_EARLYSUSPEND */
-#ifdef	CONFIG_RMI4_DEBUG
-	teardown_debugfs(rmi_dev);
-#endif
-
-	list_for_each_entry(entry, &data->rmi_functions.list, list)
-		if (entry->fh && entry->fh->remove)
-			entry->fh->remove(entry);
-
-	rmi_free_function_list(rmi_dev);
-	for (i = 0; i < ARRAY_SIZE(attrs); i++)
-		device_remove_file(&rmi_dev->dev, &attrs[i]);
-	if (has_bsr(data))
-		device_remove_file(&rmi_dev->dev, &bsr_attribute);
-	kfree(data->f01_container->irq_mask);
-	kfree(data->irq_mask_store);
-	kfree(data->current_irq_mask);
-	kfree(data);
-
-	return 0;
-}
-
-#ifdef UNIVERSAL_DEV_PM_OPS
-static UNIVERSAL_DEV_PM_OPS(rmi_driver_pm, rmi_driver_suspend,
-			    rmi_driver_resume, NULL);
-#endif
-
-static struct rmi_driver sensor_driver = {
-	.driver = {
-		.owner = THIS_MODULE,
-		.name = "rmi_generic",
-#ifdef UNIVERSAL_DEV_PM_OPS
-		.pm = &rmi_driver_pm,
-#endif
-	},
-	.probe = rmi_driver_probe,
-	.irq_handler = rmi_driver_irq_handler,
-	.reset_handler = rmi_driver_reset_handler,
-	.fh_add = rmi_driver_fh_add,
-	.fh_remove = rmi_driver_fh_remove,
-	.get_func_irq_mask = rmi_driver_irq_get_mask,
-	.store_irq_mask = rmi_driver_irq_save,
-	.restore_irq_mask = rmi_driver_irq_restore,
-	.remove = __devexit_p(rmi_driver_remove)
-};
-
-/* sysfs show and store fns for driver attributes */
-
-static ssize_t rmi_driver_bsr_show(struct device *dev,
-				   struct device_attribute *attr, char *buf)
-{
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->bsr);
-}
-
-static ssize_t rmi_driver_bsr_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count)
-{
-	int retval;
-	unsigned long val;
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	/* need to convert the string data to an actual value */
-	retval = strict_strtoul(buf, 10, &val);
-	if (retval < 0) {
-		dev_err(dev, "Invalid value '%s' written to BSR.\n", buf);
-		return -EINVAL;
-	}
-
-	retval = rmi_write(rmi_dev, BSR_LOCATION, (unsigned char)val);
-	if (retval) {
-		dev_err(dev, "%s : failed to write bsr %u to 0x%x\n",
-			__func__, (unsigned int)val, BSR_LOCATION);
-		return retval;
-	}
-
-	data->bsr = val;
-
-	return count;
-}
-
-static void disable_sensor(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-
-	rmi_dev->phys->disable_device(rmi_dev->phys);
-
-	data->enabled = false;
-}
-
-static int enable_sensor(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *data = rmi_get_driverdata(rmi_dev);
-	int retval = 0;
-
-	retval = rmi_dev->phys->enable_device(rmi_dev->phys);
-	/* non-zero means error occurred */
-	if (retval)
-		return retval;
-
-	data->enabled = true;
-
-	return 0;
-}
-
-static ssize_t rmi_driver_enabled_show(struct device *dev,
-				       struct device_attribute *attr, char *buf)
-{
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->enabled);
-}
-
-static ssize_t rmi_driver_enabled_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	int retval;
-	int new_value;
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	if (sysfs_streq(buf, "0"))
-		new_value = false;
-	else if (sysfs_streq(buf, "1"))
-		new_value = true;
-	else
-		return -EINVAL;
-
-	if (new_value) {
-		retval = enable_sensor(rmi_dev);
-		if (retval) {
-			dev_err(dev, "Failed to enable sensor, code=%d.\n",
-				retval);
-			return -EIO;
-		}
-	} else {
-		disable_sensor(rmi_dev);
-	}
-
-	return count;
-}
-
-#if REGISTER_DEBUG
-static ssize_t rmi_driver_reg_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	int retval;
-	unsigned int address;
-	unsigned int bytes;
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *data;
-	u8 readbuf[128];
-	unsigned char outbuf[512];
-	unsigned char *bufptr = outbuf;
-	int i;
-
-	rmi_dev = to_rmi_device(dev);
-	data = rmi_get_driverdata(rmi_dev);
-
-	retval = sscanf(buf, "%x %u", &address, &bytes);
-	if (retval != 2) {
-		dev_err(dev, "Invalid input (code %d) for reg store: %s",
-			retval, buf);
-		return -EINVAL;
-	}
-	if (address < 0 || address > 0xFFFF) {
-		dev_err(dev, "Invalid address for reg store '%#06x'.\n",
-			address);
-		return -EINVAL;
-	}
-	if (bytes < 0 || bytes >= sizeof(readbuf) || address+bytes > 65535) {
-		dev_err(dev, "Invalid byte count for reg store '%d'.\n",
-			bytes);
-		return -EINVAL;
-	}
-
-	retval = rmi_read_block(rmi_dev, address, readbuf, bytes);
-	if (retval != bytes) {
-		dev_err(dev, "Failed to read %d registers at %#06x, code %d.\n",
-			bytes, address, retval);
-		return retval;
-	}
-
-	dev_info(dev, "Reading %d bytes from %#06x.\n", bytes, address);
-	for (i = 0; i < bytes; i++) {
-		retval = snprintf(bufptr, 4, "%02X ", readbuf[i]);
-		if (retval < 0) {
-			dev_err(dev, "Failed to format string. Code: %d",
-				retval);
-			return retval;
-		}
-		bufptr += retval;
-	}
-	dev_info(dev, "%s\n", outbuf);
-
-	return count;
-}
-#endif
-
-static int __init rmi_driver_init(void)
-{
-	return rmi_register_driver(&sensor_driver);
-}
-
-static void __exit rmi_driver_exit(void)
-{
-	rmi_unregister_driver(&sensor_driver);
-}
-
-module_init(rmi_driver_init);
-module_exit(rmi_driver_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com");
-MODULE_DESCRIPTION("RMI generic driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_driver.h b/drivers/input/touchscreen/rmi4/rmi_driver.h
deleted file mode 100755
index 44504a167f266..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_driver.h
+++ /dev/null
@@ -1,405 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef _RMI_DRIVER_H
-#define _RMI_DRIVER_H
-
-#define RMI_DRIVER_VERSION "1.3"
-
-#define RMI_PRODUCT_ID_LENGTH    10
-#define RMI_PRODUCT_INFO_LENGTH   2
-#define RMI_DATE_CODE_LENGTH      3
-
-#include <linux/ctype.h>
-/* Sysfs related macros */
-
-/* You must define FUNCTION_DATA and FNUM to use these functions. */
-#define RMI4_SYSFS_DEBUG defined(CONFIG_RMI4_DEBUG) || defined(CONFIG_ANDROID))
-
-#if defined(FNUM) && defined(FUNCTION_DATA)
-
-#define tricat(x,y,z) tricat_(x,y,z)
-
-#define tricat_(x,y,z) x##y##z
-
-#define show_union_struct_prototype(propname)\
-static ssize_t tricat(rmi_fn_,FNUM,_##propname##_show)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					char *buf);\
-\
-DEVICE_ATTR(propname, RMI_RO_ATTR,\
-		tricat(rmi_fn_,FNUM,_##propname##_show),\
-		rmi_store_error);
-
-#define store_union_struct_prototype(propname)\
-static ssize_t tricat(rmi_fn_,FNUM,_##propname##_store)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					const char *buf, size_t count);\
-\
-DEVICE_ATTR(propname, RMI_WO_ATTR,\
-		rmi_show_error,\
-		tricat(rmi_fn_, FNUM, _##propname##_store));
-
-
-#define show_store_union_struct_prototype(propname)\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_show)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					char *buf);\
-\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_store)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					const char *buf, size_t count);\
-\
-DEVICE_ATTR(propname, RMI_RW_ATTR,\
-		tricat(rmi_fn_, FNUM, _##propname##_show),\
-		tricat(rmi_fn_, FNUM, _##propname##_store));
-
-#define simple_show_union_struct(regtype, propname, fmt)\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_show)(struct device *dev,\
-				struct device_attribute *attr, char *buf) {\
-	struct rmi_function_container *fc;\
-	struct FUNCTION_DATA *data;\
-\
-	fc = to_rmi_function_container(dev);\
-	data = fc->data;\
-\
-	return snprintf(buf, PAGE_SIZE, fmt,\
-			data->regtype.propname);\
-}
-
-#define show_union_struct(regtype, reg_group, propname, fmt)\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_show)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					char *buf) {\
-	struct rmi_function_container *fc;\
-	struct FUNCTION_DATA *data;\
-	int result;\
-\
-	fc = to_rmi_function_container(dev);\
-	data = fc->data;\
-\
-	mutex_lock(&data->regtype##_mutex);\
-	/* Read current regtype values */\
-	result = rmi_read_block(fc->rmi_dev, data->regtype.reg_group->address,\
-				(u8 *)data->regtype.reg_group,\
-				sizeof(data->regtype.reg_group->regs));\
-	mutex_unlock(&data->regtype##_mutex);\
-	if (result < 0) {\
-		dev_dbg(dev, "%s : Could not read regtype at 0x%x\\n",\
-					__func__, data->regtype.reg_group->address);\
-		return result;\
-	}\
-	return snprintf(buf, PAGE_SIZE, fmt,\
-			data->regtype.reg_group->propname);\
-}\
-
-#define show_store_union_struct(regtype, reg_group, propname, fmt)\
-show_union_struct(regtype, reg_group, propname, fmt)\
-\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_store)(\
-					struct device *dev,\
-					struct device_attribute *attr,\
-					const char *buf, size_t count) {\
-	int result;\
-	unsigned long val;\
-	unsigned long old_val;\
-	struct rmi_function_container *fc;\
-	struct FUNCTION_DATA *data;\
-\
-	fc = to_rmi_function_container(dev);\
-	data = fc->data;\
-\
-	/* need to convert the string data to an actual value */\
-	result = strict_strtoul(buf, 10, &val);\
-\
-	/* if an error occured, return it */\
-	if (result)\
-		return result;\
-	/* Check value maybe */\
-\
-	/* Read current regtype values */\
-	mutex_lock(&data->regtype##_mutex);\
-	result =\
-	    rmi_read_block(fc->rmi_dev, data->regtype.reg_group->address,\
-				(u8 *)data->regtype.reg_group,\
-				sizeof(data->regtype.reg_group->regs));\
-\
-	if (result < 0) {\
-		mutex_unlock(&data->regtype##_mutex);\
-		dev_dbg(dev, "%s : Could not read regtype at 0x%x\\n",\
-					 __func__,\
-					data->regtype.reg_group->address);\
-		return result;\
-	}\
-	/* if the current regtype registers are already set as we want them,\
-	 * do nothing to them */\
-	if (data->regtype.reg_group->propname == val) {\
-		mutex_unlock(&data->regtype##_mutex);\
-		return count;\
-	}\
-	/* Write the regtype back to the regtype register */\
-	old_val = data->regtype.reg_group->propname;\
-	data->regtype.reg_group->propname = val;\
-	result =\
-	    rmi_write_block(fc->rmi_dev, data->regtype.reg_group->address,\
-				(u8 *)data->regtype.reg_group,\
-				sizeof(data->regtype.reg_group->regs));\
-	if (result < 0) {\
-		dev_dbg(dev, "%s : Could not write regtype to 0x%x\\n",\
-					__func__,\
-					data->regtype.reg_group->address);\
-		/* revert change to local value if value not written */\
-		data->regtype.reg_group->propname = old_val;\
-		mutex_unlock(&data->regtype##_mutex);\
-		return result;\
-	}\
-	mutex_unlock(&data->regtype##_mutex);\
-	return count;\
-}
-
-
-#define show_repeated_union_struct(regtype, reg_group, propname, fmt)\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_show)(struct device *dev,\
-					struct device_attribute *attr,\
-					char *buf) {\
-	struct rmi_function_container *fc;\
-	struct FUNCTION_DATA *data;\
-	int reg_length;\
-	int result, size = 0;\
-	char *temp;\
-	int i;\
-\
-	fc = to_rmi_function_container(dev);\
-	data = fc->data;\
-	mutex_lock(&data->regtype##_mutex);\
-\
-	/* Read current regtype values */\
-	reg_length = data->regtype.reg_group->length;\
-	result = rmi_read_block(fc->rmi_dev, data->regtype.reg_group->address,\
-			(u8*) data->regtype.reg_group->regs,\
-			reg_length * sizeof(u8));\
-	mutex_unlock(&data->regtype##_mutex);\
-	if (result < 0) {\
-		dev_dbg(dev, "%s : Could not read regtype at 0x%x\n"\
-					"Data may be outdated.", __func__,\
-					data->regtype.reg_group->address);\
-	}\
-	temp = buf;\
-	for (i = 0; i < reg_length; i++) {\
-		result = snprintf(temp, PAGE_SIZE - size, fmt " ",\
-					data->regtype.reg_group->regs[i].propname);\
-		if (result < 0) {\
-			dev_err(dev, "%s : Could not write output.", __func__);\
-			return result;\
-		}\
-		size += result;\
-		temp += result;\
-	}\
-	result = snprintf(temp, PAGE_SIZE - size, "\n");\
-	if (result < 0) {\
-			dev_err(dev, "%s : Could not write output.", __func__);\
-			return result;\
-	}\
-	return size + result;\
-}
-
-#define show_store_repeated_union_struct(regtype, reg_group, propname, fmt)\
-show_repeated_union_struct(regtype, reg_group, propname, fmt)\
-\
-static ssize_t tricat(rmi_fn_, FNUM, _##propname##_store)(struct device *dev,\
-				   struct device_attribute *attr,\
-				   const char *buf, size_t count) {\
-	struct rmi_function_container *fc;\
-	struct FUNCTION_DATA *data;\
-	int reg_length;\
-	int result;\
-	const char *temp;\
-	int i;\
-	unsigned int newval;\
-\
-	fc = to_rmi_function_container(dev);\
-	data = fc->data;\
-	mutex_lock(&data->regtype##_mutex);\
-\
-	/* Read current regtype values */\
-\
-	reg_length = data->regtype.reg_group->length;\
-	result = rmi_read_block(fc->rmi_dev, data->regtype.reg_group->address,\
-			(u8*) data->regtype.reg_group->regs,\
-			reg_length * sizeof(u8));\
-\
-	if (result < 0) {\
-		dev_dbg(dev, "%s : Could not read regtype at 0x%x\n"\
-					"Data may be outdated.", __func__,\
-					data->regtype.reg_group->address);\
-	}\
-	/* parse input */\
-	\
-	temp = buf;\
-	for (i = 0; i < reg_length; i++) {\
-		if(sscanf(temp, fmt, &newval) == 1) {\
-			data->regtype.reg_group->regs[i].propname = newval;\
-		} else {\
-			/* If we don't read a value for each position, abort, restore
-			 * previous values locally by rereading */\
-			result = rmi_read_block(fc->rmi_dev, data->regtype.reg_group->address,\
-											(u8*) data->regtype.reg_group->regs,\
-											reg_length * sizeof(u8));\
-\
-			if (result < 0) {\
-				dev_dbg(dev, "%s : Could not read regtype at 0x%x\n"\
-							"Local data may be innacurrate.", __func__,\
-							data->regtype.reg_group->address);\
-			}\
-			return -EINVAL;\
-		}\
-		/* move to next number */\
-		while (*temp != 0) {\
-			temp++;\
-			if (isspace(*(temp - 1)) && !isspace(*temp))\
-				break;\
-		}\
-	}\
-	result = rmi_write_block(fc->rmi_dev, data->regtype.reg_group->address,\
-			(u8*) data->regtype.reg_group->regs,\
-			reg_length * sizeof(u8));\
-	mutex_unlock(&data->regtype##_mutex);\
-	if (result < 0) {\
-		dev_dbg(dev, "%s : Could not write new values"\
-			" to 0x%x\n", __func__, data->regtype.reg_group->address);\
-		return result;\
-	}\
-	return count;\
-}
-
-/* Create templates for given types */
-#define simple_show_union_struct_unsigned(regtype, propname)\
-simple_show_union_struct(regtype, propname, "%u\n")
-
-#define show_union_struct_unsigned(regtype, reg_group, propname)\
-show_union_struct(regtype, reg_group, propname, "%u\n")
-
-#define show_store_union_struct_unsigned(regtype, reg_group, propname)\
-show_store_union_struct(regtype, reg_group, propname, "%u\n")
-
-#define show_repeated_union_struct_unsigned(regtype, reg_group, propname)\
-show_repeated_union_struct(regtype, reg_group, propname, "%u")
-
-#define show_store_repeated_union_struct_unsigned(regtype, reg_group, propname)\
-show_store_repeated_union_struct(regtype, reg_group, propname, "%u")
-
-/* Remove access to raw format string versions */
-/*#undef simple_show_union_struct
-#undef show_union_struct_unsigned
-#undef show_store_union_struct
-#undef show_repeated_union_struct
-#undef show_store_repeated_union_struct*/
-
-#endif
-
-#define GROUP(_attrs) { \
-	.attrs = _attrs,  \
-}
-
-#define attrify(nm) &dev_attr_##nm.attr
-
-union f01_device_status {
-	struct {
-		u8 status_code:4;
-		u8 reserved:2;
-		u8 flash_prog:1;
-		u8 unconfigured:1;
-	};
-	u8 reg;
-};
-
-struct rmi_driver_data {
-	struct rmi_function_container rmi_functions;
-
-	struct rmi_function_container *f01_container;
-	bool f01_bootloader_mode;
-
-	int num_of_irq_regs;
-	int irq_count;
-	u8 *current_irq_mask;
-	u8 *irq_mask_store;
-	bool irq_stored;
-	struct mutex irq_mutex;
-	struct mutex pdt_mutex;
-
-	unsigned char pdt_props;
-	unsigned char bsr;
-	bool enabled;
-
-#ifdef CONFIG_PM
-	bool suspended;
-	struct mutex suspend_mutex;
-
-	void *pm_data;
-	int (*pre_suspend) (const void *pm_data);
-	int (*post_resume) (const void *pm_data);
-#endif
-
-#ifdef CONFIG_RMI4_DEBUG
-#ifdef CONFIG_RMI4_SPI
-	struct dentry *debugfs_delay;
-#endif
-	struct dentry *debugfs_phys;
-	struct dentry *debugfs_reg_ctl;
-	struct dentry *debugfs_reg;
-	u16 reg_debug_addr;
-	u8 reg_debug_size;
-#endif
-
-	void *data;
-};
-
-struct pdt_entry {
-	u8 query_base_addr:8;
-	u8 command_base_addr:8;
-	u8 control_base_addr:8;
-	u8 data_base_addr:8;
-	u8 interrupt_source_count:3;
-	u8 bits3and4:2;
-	u8 function_version:2;
-	u8 bit7:1;
-	u8 function_number:8;
-};
-
-int rmi_driver_f01_init(struct rmi_device *rmi_dev);
-
-static inline void copy_pdt_entry_to_fd(struct pdt_entry *pdt,
-				 struct rmi_function_descriptor *fd,
-				 u16 page_start)
-{
-	fd->query_base_addr = pdt->query_base_addr + page_start;
-	fd->command_base_addr = pdt->command_base_addr + page_start;
-	fd->control_base_addr = pdt->control_base_addr + page_start;
-	fd->data_base_addr = pdt->data_base_addr + page_start;
-	fd->function_number = pdt->function_number;
-	fd->interrupt_source_count = pdt->interrupt_source_count;
-	fd->function_version = pdt->function_version;
-}
-
-#endif
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_f01.c b/drivers/input/touchscreen/rmi4/rmi_f01.c
deleted file mode 100755
index dfd4b1fbc5d78..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f01.c
+++ /dev/null
@@ -1,1385 +0,0 @@
-/*
- * Copyright (c) 2011-2012 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-
-/* control register bits */
-#define RMI_SLEEP_MODE_NORMAL (0x00)
-#define RMI_SLEEP_MODE_SENSOR_SLEEP (0x01)
-#define RMI_SLEEP_MODE_RESERVED0 (0x02)
-#define RMI_SLEEP_MODE_RESERVED1 (0x03)
-
-#define RMI_IS_VALID_SLEEPMODE(mode) \
-	(mode >= RMI_SLEEP_MODE_NORMAL && mode <= RMI_SLEEP_MODE_RESERVED1)
-
-union f01_device_commands {
-	struct {
-		u8 reset:1;
-		u8 reserved:1;
-	};
-	u8 reg;
-};
-
-struct f01_device_control_0 {
-	union {
-		struct {
-			u8 sleep_mode:2;
-			u8 nosleep:1;
-			u8 reserved:2;
-			u8 charger_input:1;
-			u8 report_rate:1;
-			u8 configured:1;
-		};
-		u8 reg;
-	};
-};
-
-struct f01_device_control {
-	struct f01_device_control_0 ctrl0;
-	u8 *interrupt_enable;
-	u8 doze_interval;
-	u8 wakeup_threshold;
-	u8 doze_holdoff;
-};
-
-union f01_basic_queries {
-	struct {
-		u8 manufacturer_id:8;
-
-		u8 custom_map:1;
-		u8 non_compliant:1;
-		u8 has_lts:1;
-		u8 has_sensor_id:1;
-		u8 has_charger_input:1;
-		u8 has_adjustable_doze:1;
-		u8 has_adjustable_doze_holdoff:1;
-		u8 has_product_properties_2:1;
-
-		u8 productinfo_1:7;
-		u8 q2_bit_7:1;
-		u8 productinfo_2:7;
-		u8 q3_bit_7:1;
-
-		u8 year:5;
-		u8 month:4;
-		u8 day:5;
-		u8 cp1:1;
-		u8 cp2:1;
-		u8 wafer_id1_lsb:8;
-		u8 wafer_id1_msb:8;
-		u8 wafer_id2_lsb:8;
-		u8 wafer_id2_msb:8;
-		u8 wafer_id3_lsb:8;
-	};
-	u8 regs[11];
-};
-
-union f01_query_42 {
-	struct {
-		u8 has_ds4_queries:1;
-		u8 has_multi_phy:1;
-		u8 has_guest:1;
-		u8 reserved:5;
-	};
-	u8 regs[1];
-};
-
-union f01_ds4_queries {
-	struct {
-		u8 length:4;
-		u8 reserved_1:4;
-
-		u8 has_package_id_query:1;
-		u8 has_packrat_query:1;
-		u8 has_reset_query:1;
-		u8 has_maskrev_query:1;
-		u8 reserved_2:4;
-
-		u8 has_i2c_control:1;
-		u8 has_spi_control:1;
-		u8 has_attn_control:1;
-		u8 reserved_3:5;
-
-		u8 reset_enabled:1;
-		u8 reset_polarity:1;
-		u8 pullup_enabled:1;
-		u8 reserved_4:1;
-		u8 reset_pin_number:4;
-	};
-	u8 regs[4];
-};
-
-struct f01_data {
-	struct f01_device_control device_control;
-	union f01_basic_queries basic_queries;
-	union f01_device_status device_status;
-	u8 product_id[RMI_PRODUCT_ID_LENGTH+1];
-
-	u8 interrupt_enable_addr;
-	u8 doze_interval_addr;
-	u8 wakeup_threshold_addr;
-	u8 doze_holdoff_addr;
-
-	int irq_count;
-	int num_of_irq_regs;
-
-#ifdef	CONFIG_PM
-	bool suspended;
-	bool old_nosleep;
-#endif
-};
-
-
-static ssize_t rmi_fn_01_productinfo_show(struct device *dev,
-					  struct device_attribute *attr,
-					  char *buf);
-
-static ssize_t rmi_fn_01_productid_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t rmi_fn_01_manufacturer_show(struct device *dev,
-					   struct device_attribute *attr,
-					   char *buf);
-
-static ssize_t rmi_fn_01_datecode_show(struct device *dev,
-				       struct device_attribute *attr,
-				       char *buf);
-
-static ssize_t rmi_fn_01_reportrate_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-
-static ssize_t rmi_fn_01_reportrate_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_interrupt_enable_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-
-static ssize_t rmi_fn_01_interrupt_enable_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_doze_interval_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-
-static ssize_t rmi_fn_01_doze_interval_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_wakeup_threshold_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-
-static ssize_t rmi_fn_01_wakeup_threshold_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_doze_holdoff_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-
-static ssize_t rmi_fn_01_doze_holdoff_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_reset_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_sleepmode_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t rmi_fn_01_sleepmode_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_nosleep_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static ssize_t rmi_fn_01_nosleep_store(struct device *dev,
-				       struct device_attribute *attr,
-				       const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_chargerinput_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static ssize_t rmi_fn_01_chargerinput_store(struct device *dev,
-				       struct device_attribute *attr,
-				       const char *buf, size_t count);
-
-static ssize_t rmi_fn_01_configured_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static ssize_t rmi_fn_01_unconfigured_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static ssize_t rmi_fn_01_flashprog_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static ssize_t rmi_fn_01_statuscode_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf);
-
-static int rmi_f01_alloc_memory(struct rmi_function_container *fc,
-					int num_of_irq_regs);
-
-static void rmi_f01_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f01_initialize(struct rmi_function_container *fc);
-
-static int rmi_f01_create_sysfs(struct rmi_function_container *fc);
-
-static int rmi_f01_config(struct rmi_function_container *fc);
-
-static int rmi_f01_reset(struct rmi_function_container *fc);
-
-
-static struct device_attribute fn_01_attrs[] = {
-	__ATTR(productinfo, RMI_RO_ATTR,
-	       rmi_fn_01_productinfo_show, rmi_store_error),
-	__ATTR(productid, RMI_RO_ATTR,
-	       rmi_fn_01_productid_show, rmi_store_error),
-	__ATTR(manufacturer, RMI_RO_ATTR,
-	       rmi_fn_01_manufacturer_show, rmi_store_error),
-	__ATTR(datecode, RMI_RO_ATTR,
-	       rmi_fn_01_datecode_show, rmi_store_error),
-
-	/* control register access */
-	__ATTR(sleepmode, RMI_RW_ATTR,
-	       rmi_fn_01_sleepmode_show, rmi_fn_01_sleepmode_store),
-	__ATTR(nosleep, RMI_RW_ATTR,
-	       rmi_fn_01_nosleep_show, rmi_fn_01_nosleep_store),
-	__ATTR(chargerinput, RMI_RW_ATTR,
-	       rmi_fn_01_chargerinput_show, rmi_fn_01_chargerinput_store),
-	__ATTR(reportrate, RMI_RW_ATTR,
-	       rmi_fn_01_reportrate_show, rmi_fn_01_reportrate_store),
-	__ATTR(interrupt_enable, RMI_RW_ATTR,
-	       rmi_fn_01_interrupt_enable_show,
-		rmi_fn_01_interrupt_enable_store),
-	__ATTR(doze_interval, RMI_RW_ATTR,
-	       rmi_fn_01_doze_interval_show,
-		rmi_fn_01_doze_interval_store),
-	__ATTR(wakeup_threshold, RMI_RW_ATTR,
-	       rmi_fn_01_wakeup_threshold_show,
-		rmi_fn_01_wakeup_threshold_store),
-	__ATTR(doze_holdoff, RMI_RW_ATTR,
-	       rmi_fn_01_doze_holdoff_show,
-		rmi_fn_01_doze_holdoff_store),
-
-	/* We make report rate RO, since the driver uses that to look for
-	 * resets.  We don't want someone faking us out by changing that
-	 * bit.
-	 */
-	__ATTR(configured, RMI_RO_ATTR,
-	       rmi_fn_01_configured_show, rmi_store_error),
-
-	/* Command register access. */
-	__ATTR(reset, RMI_WO_ATTR,
-	       rmi_show_error, rmi_fn_01_reset_store),
-
-	/* STatus register access. */
-	__ATTR(unconfigured, RMI_RO_ATTR,
-	       rmi_fn_01_unconfigured_show, rmi_store_error),
-	__ATTR(flashprog, RMI_RO_ATTR,
-	       rmi_fn_01_flashprog_show, rmi_store_error),
-	__ATTR(statuscode, RMI_RO_ATTR,
-	       rmi_fn_01_statuscode_show, rmi_store_error),
-};
-
-/* Utility routine to set the value of a bit field in a register. */
-int rmi_set_bit_field(struct rmi_device *rmi_dev,
-		      unsigned short address,
-		      unsigned char field_mask,
-		      unsigned char bits)
-{
-	unsigned char reg_contents;
-	int retval;
-
-	retval = rmi_read(rmi_dev, address, &reg_contents);
-	if (retval)
-		return retval;
-	reg_contents = (reg_contents & ~field_mask) | bits;
-	retval = rmi_write(rmi_dev, address, reg_contents);
-	if (retval == 1)
-		return 0;
-	else if (retval == 0)
-		return -EIO;
-	return retval;
-}
-
-static ssize_t rmi_fn_01_productinfo_show(struct device *dev,
-					  struct device_attribute *attr,
-					  char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "0x%02x 0x%02x\n",
-			data->basic_queries.productinfo_1,
-			data->basic_queries.productinfo_2);
-}
-
-static ssize_t rmi_fn_01_productid_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%s\n", data->product_id);
-}
-
-static ssize_t rmi_fn_01_manufacturer_show(struct device *dev,
-					   struct device_attribute *attr,
-					   char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "0x%02x\n",
-			data->basic_queries.manufacturer_id);
-}
-
-static ssize_t rmi_fn_01_datecode_show(struct device *dev,
-				       struct device_attribute *attr,
-				       char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "20%02u-%02u-%02u\n",
-			data->basic_queries.year,
-			data->basic_queries.month,
-			data->basic_queries.day);
-}
-
-static ssize_t rmi_fn_01_reset_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count)
-{
-	struct rmi_function_container *fc = NULL;
-	unsigned int reset;
-	int retval = 0;
-	/* Command register always reads as 0, so we can just use a local. */
-	union f01_device_commands commands = {};
-
-	fc = to_rmi_function_container(dev);
-
-	if (sscanf(buf, "%u", &reset) != 1)
-		return -EINVAL;
-	if (reset < 0 || reset > 1)
-		return -EINVAL;
-
-	/* Per spec, 0 has no effect, so we skip it entirely. */
-	if (reset) {
-		commands.reset = 1;
-		retval = rmi_write_block(fc->rmi_dev, fc->fd.command_base_addr,
-				&commands.reg, sizeof(commands.reg));
-		if (retval < 0) {
-			dev_err(dev, "%s: failed to issue reset command, "
-				"error = %d.", __func__, retval);
-			return retval;
-		}
-	}
-
-	return count;
-}
-
-static ssize_t rmi_fn_01_sleepmode_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE,
-			"%d\n", data->device_control.ctrl0.sleep_mode);
-}
-
-static ssize_t rmi_fn_01_sleepmode_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf,
-					 size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || !RMI_IS_VALID_SLEEPMODE(new_value)) {
-		dev_err(dev, "%s: Invalid sleep mode %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	dev_dbg(dev, "Setting sleep mode to %ld.", new_value);
-	data->device_control.ctrl0.sleep_mode = new_value;
-	retval = rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write sleep mode, code %d.\n", retval);
-	return retval;
-}
-
-static ssize_t rmi_fn_01_nosleep_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-		data->device_control.ctrl0.nosleep);
-}
-
-static ssize_t rmi_fn_01_nosleep_store(struct device *dev,
-				       struct device_attribute *attr,
-				       const char *buf,
-				       size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid nosleep bit %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.ctrl0.nosleep = new_value;
-	retval = rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write nosleep bit.\n");
-	return retval;
-}
-
-static ssize_t rmi_fn_01_chargerinput_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.ctrl0.charger_input);
-}
-
-static ssize_t rmi_fn_01_chargerinput_store(struct device *dev,
-				       struct device_attribute *attr,
-				       const char *buf,
-				       size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid chargerinput bit %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.ctrl0.charger_input = new_value;
-	retval = rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write chargerinput bit.\n");
-	return retval;
-}
-
-static ssize_t rmi_fn_01_reportrate_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.ctrl0.report_rate);
-}
-
-static ssize_t rmi_fn_01_reportrate_store(struct device *dev,
-				       struct device_attribute *attr,
-				       const char *buf,
-				       size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid reportrate bit %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.ctrl0.report_rate = new_value;
-	retval = rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write reportrate bit.\n");
-	return retval;
-}
-
-static ssize_t rmi_fn_01_interrupt_enable_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f01_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each irq value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->irq_count; i++) {
-		int irq_reg;
-		int irq_shift;
-		int interrupt_enable;
-
-		irq_reg = i / 8;
-		irq_shift = i % 8;
-		interrupt_enable =
-		    ((data->device_control.interrupt_enable[irq_reg]
-			>> irq_shift) & 0x01);
-
-		/* get next irq value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", interrupt_enable);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build interrupt_enable"
-				" buffer, code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-
-}
-
-static ssize_t rmi_fn_01_interrupt_enable_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f01_data *data;
-	int i;
-	int irq_count = 0;
-	int retval = count;
-	int irq_reg = 0;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	for (i = 0; i < data->irq_count && *buf != 0;
-	     i++, buf += 2) {
-		int irq_shift;
-		int interrupt_enable;
-		int result;
-
-		irq_reg = i / 8;
-		irq_shift = i % 8;
-
-		/* get next interrupt mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%u", &interrupt_enable);
-		if ((result != 1) ||
-			(interrupt_enable != 0 && interrupt_enable != 1)) {
-			dev_err(dev,
-				"%s: Error - interrupt enable[%d]"
-				" is not a valid value 0x%x.\n",
-				__func__, i, interrupt_enable);
-			return -EINVAL;
-		}
-		if (interrupt_enable == 0) {
-			data->device_control.interrupt_enable[irq_reg] &=
-				(1 << irq_shift) ^ 0xFF;
-		} else
-			data->device_control.interrupt_enable[irq_reg] |=
-				(1 << irq_shift);
-		irq_count++;
-	}
-
-	/* Make sure the irq count matches */
-	if (irq_count != data->irq_count) {
-		dev_err(dev,
-			"%s: Error - interrupt enable count of %d"
-			" doesn't match device count of %d.\n",
-			 __func__, irq_count, data->irq_count);
-		return -EINVAL;
-	}
-
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->interrupt_enable_addr,
-			data->device_control.interrupt_enable,
-			sizeof(u8)*(data->num_of_irq_regs));
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not write interrupt_enable_store"
-			" to 0x%x\n", __func__, data->interrupt_enable_addr);
-		return retval;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_fn_01_doze_interval_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.doze_interval);
-
-}
-
-static ssize_t rmi_fn_01_doze_interval_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-	int ctrl_base_addr;
-
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 255) {
-		dev_err(dev, "%s: Invalid doze interval %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.doze_interval = new_value;
-	ctrl_base_addr = fc->fd.control_base_addr + sizeof(u8) +
-			(sizeof(u8)*(data->num_of_irq_regs));
-	dev_info(dev, "doze_interval store address %x, value %d",
-		ctrl_base_addr, data->device_control.doze_interval);
-
-	retval = rmi_write_block(fc->rmi_dev, data->doze_interval_addr,
-			&data->device_control.doze_interval,
-			sizeof(u8));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write doze interval.\n");
-	return retval;
-
-}
-
-static ssize_t rmi_fn_01_wakeup_threshold_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.wakeup_threshold);
-}
-
-static ssize_t rmi_fn_01_wakeup_threshold_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 255) {
-		dev_err(dev, "%s: Invalid wakeup threshold %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.doze_interval = new_value;
-	retval = rmi_write_block(fc->rmi_dev, data->wakeup_threshold_addr,
-			&data->device_control.wakeup_threshold,
-			sizeof(u8));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write wakeup threshold.\n");
-	return retval;
-
-}
-
-static ssize_t rmi_fn_01_doze_holdoff_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.doze_holdoff);
-
-}
-
-
-static ssize_t rmi_fn_01_doze_holdoff_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count)
-{
-	struct f01_data *data = NULL;
-	unsigned long new_value;
-	int retval;
-
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	retval = strict_strtoul(buf, 10, &new_value);
-	if (retval < 0 || new_value < 0 || new_value > 255) {
-		dev_err(dev, "%s: Invalid doze holdoff %s.", __func__, buf);
-		return -EINVAL;
-	}
-
-	data->device_control.doze_interval = new_value;
-	retval = rmi_write_block(fc->rmi_dev, data->doze_holdoff_addr,
-			&data->device_control.doze_holdoff,
-			sizeof(u8));
-	if (retval >= 0)
-		retval = count;
-	else
-		dev_err(dev, "Failed to write doze holdoff.\n");
-	return retval;
-
-}
-
-static ssize_t rmi_fn_01_configured_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_control.ctrl0.configured);
-}
-
-static ssize_t rmi_fn_01_unconfigured_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_status.unconfigured);
-}
-
-static ssize_t rmi_fn_01_flashprog_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n",
-			data->device_status.flash_prog);
-}
-
-static ssize_t rmi_fn_01_statuscode_show(struct device *dev,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct f01_data *data = NULL;
-	struct rmi_function_container *fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "0x%02x\n",
-			data->device_status.status_code);
-}
-
-/* why is this not done in init? */
-int rmi_driver_f01_init(struct rmi_device *rmi_dev)
-{
-	struct rmi_driver_data *driver_data = rmi_get_driverdata(rmi_dev);
-	struct rmi_function_container *fc = driver_data->f01_container;
-	int error;
-
-	error = rmi_f01_alloc_memory(fc, driver_data->num_of_irq_regs);
-	if (error < 0)
-		goto error_exit;
-
-	error = rmi_f01_initialize(fc);
-	if (error < 0)
-		goto error_exit;
-
-	error = rmi_f01_create_sysfs(fc);
-	if (error < 0)
-		goto error_exit;
-
-	return 0;
-
- error_exit:
-	rmi_f01_free_memory(fc);
-
-	return error;
-}
-
-static int rmi_f01_alloc_memory(struct rmi_function_container *fc,
-	int num_of_irq_regs)
-{
-	struct f01_data *f01;
-
-	f01 = kzalloc(sizeof(struct f01_data), GFP_KERNEL);
-	if (!f01) {
-		dev_err(&fc->dev, "Failed to allocate fn_01_data.\n");
-		return -ENOMEM;
-	}
-
-	f01->device_control.interrupt_enable =
-		kzalloc(sizeof(u8)*(num_of_irq_regs), GFP_KERNEL);
-	if (!f01->device_control.interrupt_enable) {
-		kfree(f01);
-		return -ENOMEM;
-	}
-	fc->data = f01;
-
-	return 0;
-}
-
-static void rmi_f01_free_memory(struct rmi_function_container *fc)
-{
-	struct f01_data *f01 = fc->data;
-	kfree(f01->device_control.interrupt_enable);
-	kfree(fc->data);
-	fc->data = NULL;
-}
-
-static int rmi_f01_initialize(struct rmi_function_container *fc)
-{
-	u8 temp;
-	int retval;
-	int ctrl_base_addr;
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_driver_data *driver_data = rmi_get_driverdata(rmi_dev);
-	struct f01_data *data = fc->data;
-	struct rmi_device_platform_data *pdata = to_rmi_platform_data(rmi_dev);
-
-	/* Set the configured bit and (optionally) other important stuff
-	 * in the device control register. */
-	ctrl_base_addr = fc->fd.control_base_addr;
-	retval = rmi_read_block(rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read F01 control.\n");
-		return retval;
-	}
-	switch (pdata->power_management.nosleep) {
-	case RMI_F01_NOSLEEP_DEFAULT:
-		break;
-	case RMI_F01_NOSLEEP_OFF:
-		data->device_control.ctrl0.nosleep = 0;
-		break;
-	case RMI_F01_NOSLEEP_ON:
-		data->device_control.ctrl0.nosleep = 1;
-		break;
-	}
-	/* Sleep mode might be set as a hangover from a system crash or
-	 * reboot without power cycle.  If so, clear it so the sensor
-	 * is certain to function.
-	 */
-	if (data->device_control.ctrl0.sleep_mode != RMI_SLEEP_MODE_NORMAL) {
-		dev_warn(&fc->dev,
-			 "WARNING: Non-zero sleep mode found. Clearing...\n");
-		data->device_control.ctrl0.sleep_mode = RMI_SLEEP_MODE_NORMAL;
-	}
-
-	data->device_control.ctrl0.configured = 1;
-	retval = rmi_write_block(rmi_dev, fc->fd.control_base_addr,
-			&data->device_control.ctrl0.reg,
-			sizeof(data->device_control.ctrl0.reg));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to write F01 control.\n");
-		return retval;
-	}
-
-	data->irq_count = driver_data->irq_count;
-	data->num_of_irq_regs = driver_data->num_of_irq_regs;
-	ctrl_base_addr += sizeof(struct f01_device_control_0);
-
-	data->interrupt_enable_addr = ctrl_base_addr;
-	retval = rmi_read_block(rmi_dev, ctrl_base_addr,
-			data->device_control.interrupt_enable,
-			sizeof(u8) * (driver_data->num_of_irq_regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read F01 control interrupt enable register.\n");
-		goto error_exit;
-	}
-	ctrl_base_addr += (sizeof(u8) * (driver_data->num_of_irq_regs));
-
-	/* dummy read in order to clear irqs */
-	retval = rmi_read(rmi_dev, fc->fd.data_base_addr + 1, &temp);
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read Interrupt Status.\n");
-		return retval;
-	}
-
-	retval = rmi_read_block(rmi_dev, fc->fd.query_base_addr,
-				data->basic_queries.regs,
-				sizeof(data->basic_queries.regs));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read device query registers.\n");
-		return retval;
-	}
-
-	retval = rmi_read_block(rmi_dev,
-		fc->fd.query_base_addr + sizeof(data->basic_queries.regs),
-		data->product_id, RMI_PRODUCT_ID_LENGTH);
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read product ID.\n");
-		return retval;
-	}
-	data->product_id[RMI_PRODUCT_ID_LENGTH] = '\0';
-	dev_info(&fc->dev, "found RMI device, manufacturer: %s, product: %s\n",
-		 data->basic_queries.manufacturer_id == 1 ?
-							"synaptics" : "unknown",
-		 data->product_id);
-
-	/* read control register */
-	if (data->basic_queries.has_adjustable_doze) {
-		data->doze_interval_addr = ctrl_base_addr;
-		ctrl_base_addr++;
-
-		if (pdata->power_management.doze_interval) {
-			data->device_control.doze_interval =
-				pdata->power_management.doze_interval;
-			retval = rmi_write(rmi_dev, data->doze_interval_addr,
-					data->device_control.doze_interval);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to configure F01 doze interval register.\n");
-				goto error_exit;
-			}
-		} else {
-			retval = rmi_read(rmi_dev, data->doze_interval_addr,
-					&data->device_control.doze_interval);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to read F01 doze interval register.\n");
-				goto error_exit;
-			}
-		}
-
-		data->wakeup_threshold_addr = ctrl_base_addr;
-		ctrl_base_addr++;
-
-		if (pdata->power_management.wakeup_threshold) {
-			data->device_control.wakeup_threshold =
-				pdata->power_management.wakeup_threshold;
-			retval = rmi_write(rmi_dev, data->wakeup_threshold_addr,
-					data->device_control.wakeup_threshold);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to configure F01 wakeup threshold register.\n");
-				goto error_exit;
-			}
-		} else {
-			retval = rmi_read(rmi_dev, data->wakeup_threshold_addr,
-					&data->device_control.wakeup_threshold);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to read F01 wakeup threshold register.\n");
-				goto error_exit;
-			}
-		}
-	}
-
-	if (data->basic_queries.has_adjustable_doze_holdoff) {
-		data->doze_holdoff_addr = ctrl_base_addr;
-		ctrl_base_addr++;
-
-		if (pdata->power_management.doze_holdoff) {
-			data->device_control.doze_holdoff =
-				pdata->power_management.doze_holdoff;
-			retval = rmi_write(rmi_dev, data->doze_holdoff_addr,
-					data->device_control.doze_holdoff);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to configure F01 "
-					"doze holdoff register.\n");
-				goto error_exit;
-			}
-		} else {
-			retval = rmi_read(rmi_dev, data->doze_holdoff_addr,
-					&data->device_control.doze_holdoff);
-			if (retval < 0) {
-				dev_err(&fc->dev, "Failed to read F01 doze"
-					" holdoff register.\n");
-				goto error_exit;
-			}
-		}
-	}
-
-	retval = rmi_read_block(rmi_dev, fc->fd.data_base_addr,
-			&data->device_status.reg,
-			sizeof(data->device_status.reg));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read device status.\n");
-		goto error_exit;
-	}
-
-	if (data->device_status.unconfigured) {
-		dev_err(&fc->dev,
-			"Device reset during configuration process, status: "
-			"%#02x!\n", data->device_status.status_code);
-		retval = -EINVAL;
-		goto error_exit;
-	}
-
-	return retval;
-
- error_exit:
-	kfree(data);
-	return retval;
-}
-
-static int rmi_f01_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int retval = 0;
-	struct f01_data *data = fc->data;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.");
-	for (attr_count = 0; attr_count < ARRAY_SIZE(fn_01_attrs);
-			attr_count++) {
-		if (!strcmp("doze_interval", fn_01_attrs[attr_count].attr.name)
-			&& !data->basic_queries.has_lts) {
-			continue;
-		}
-		if (!strcmp("wakeup_threshold",
-			fn_01_attrs[attr_count].attr.name)
-			&& !data->basic_queries.has_adjustable_doze) {
-			continue;
-		}
-		if (!strcmp("doze_holdoff", fn_01_attrs[attr_count].attr.name)
-			&& !data->basic_queries.has_adjustable_doze_holdoff) {
-			continue;
-		}
-		retval = sysfs_create_file(&fc->dev.kobj,
-				      &fn_01_attrs[attr_count].attr);
-		if (retval < 0) {
-			dev_err(&fc->dev, "Failed to create sysfs file for %s.",
-			       fn_01_attrs[attr_count].attr.name);
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &fn_01_attrs[attr_count].attr);
-
-	return retval;
-}
-
-static int rmi_f01_config(struct rmi_function_container *fc)
-{
-	struct f01_data *data = fc->data;
-	int retval;
-
-	retval = rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr,
-			(u8 *)&data->device_control.ctrl0,
-			sizeof(struct f01_device_control_0));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to write device_control.reg.\n");
-		return retval;
-	}
-
-	retval = rmi_write_block(fc->rmi_dev, data->interrupt_enable_addr,
-			data->device_control.interrupt_enable,
-			sizeof(u8)*(data->num_of_irq_regs));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to write interrupt enable.\n");
-		return retval;
-	}
-	if (data->basic_queries.has_lts) {
-		retval = rmi_write_block(fc->rmi_dev, data->doze_interval_addr,
-				&data->device_control.doze_interval,
-				sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "Failed to write doze interval.\n");
-			return retval;
-		}
-	}
-
-	if (data->basic_queries.has_adjustable_doze) {
-		retval = rmi_write_block(
-				fc->rmi_dev, data->wakeup_threshold_addr,
-				&data->device_control.wakeup_threshold,
-				sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "Failed to write wakeup threshold.\n");
-			return retval;
-		}
-	}
-
-	if (data->basic_queries.has_adjustable_doze_holdoff) {
-		retval = rmi_write_block(fc->rmi_dev, data->doze_holdoff_addr,
-				&data->device_control.doze_holdoff,
-				sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "Failed to write doze holdoff.\n");
-			return retval;
-		}
-	}
-	return 0;
-}
-
-static int rmi_f01_reset(struct rmi_function_container *fc)
-{
-	/*do nothing here */
-	return 0;
-}
-
-
-#ifdef CONFIG_PM
-static int rmi_f01_suspend(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_driver_data *driver_data = rmi_get_driverdata(rmi_dev);
-	struct f01_data *data = driver_data->f01_container->data;
-	int retval = 0;
-
-	dev_dbg(&fc->dev, "Suspending...\n");
-	if (data->suspended)
-		return 0;
-
-	data->old_nosleep = data->device_control.ctrl0.nosleep;
-	data->device_control.ctrl0.nosleep = 0;
-	data->device_control.ctrl0.sleep_mode = RMI_SLEEP_MODE_SENSOR_SLEEP;
-	retval = rmi_write_block(rmi_dev,
-			driver_data->f01_container->fd.control_base_addr,
-			(u8 *)&data->device_control.ctrl0,
-			sizeof(struct f01_device_control_0));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to write sleep mode. Code: %d.\n",
-			retval);
-		data->device_control.ctrl0.nosleep = data->old_nosleep;
-		data->device_control.ctrl0.sleep_mode = RMI_SLEEP_MODE_NORMAL;
-	} else {
-		data->suspended = true;
-		retval = 0;
-	}
-
-	return retval;
-}
-
-static int rmi_f01_resume(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_driver_data *driver_data = rmi_get_driverdata(rmi_dev);
-	struct f01_data *data = driver_data->f01_container->data;
-	int retval = 0;
-
-	dev_dbg(&fc->dev, "Resuming...\n");
-	if (!data->suspended)
-		return 0;
-
-	data->device_control.ctrl0.nosleep = data->old_nosleep;
-	data->device_control.ctrl0.sleep_mode = RMI_SLEEP_MODE_NORMAL;
-	retval = rmi_write_block(rmi_dev,
-			driver_data->f01_container->fd.control_base_addr,
-			(u8 *)&data->device_control.ctrl0,
-			sizeof(struct f01_device_control_0));
-	if (retval < 0)
-		dev_err(&fc->dev,
-			"Failed to restore normal operation. Code: %d.\n",
-			retval);
-	else {
-		data->suspended = false;
-		retval = 0;
-	}
-
-	return retval;
-}
-#endif /* CONFIG_PM */
-
-static int rmi_f01_init(struct rmi_function_container *fc)
-{
-	return 0;
-}
-
-static void rmi_f01_remove(struct rmi_function_container *fc)
-{
-	int attr_count;
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(fn_01_attrs);
-			attr_count++) {
-		sysfs_remove_file(&fc->dev.kobj, &fn_01_attrs[attr_count].attr);
-	}
-
-	rmi_f01_free_memory(fc);
-}
-
-static int rmi_f01_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f01_data *data = fc->data;
-	int retval;
-
-	retval = rmi_read_block(rmi_dev, fc->fd.data_base_addr,
-		&data->device_status.reg,
-	sizeof(data->device_status.reg));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read device status, code: %d.\n",
-			retval);
-		return retval;
-	}
-	if (data->device_status.unconfigured) {
-		dev_warn(&fc->dev, "Device reset detected.\n");
-		retval = rmi_dev->driver->reset_handler(rmi_dev);
-		if (retval < 0)
-			return retval;
-	}
-	return 0;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x01,
-	.init = rmi_f01_init,
-	.config = rmi_f01_config,
-	.reset = rmi_f01_reset,
-	.attention = rmi_f01_attention,
-#ifdef CONFIG_PM
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	.early_suspend = rmi_f01_suspend,
-	.late_resume = rmi_f01_resume,
-#endif  /* CONFIG_HAS_EARLYSUSPEND */
-	.suspend = rmi_f01_suspend,
-	.resume = rmi_f01_resume,
-#endif  /* CONFIG_PM */
-	.remove = rmi_f01_remove,
-};
-
-static int __init rmi_f01_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void __exit rmi_f01_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-module_init(rmi_f01_module_init);
-module_exit(rmi_f01_module_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com>");
-MODULE_DESCRIPTION("RMI F01 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f09.c b/drivers/input/touchscreen/rmi4/rmi_f09.c
deleted file mode 100755
index e71f4720b5689..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f09.c
+++ /dev/null
@@ -1,771 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-#define QUERY_BASE_INDEX 1
-
-/* data specific to fn $09 that needs to be kept around */
-struct f09_query {
-	u8 limit_register_count;
-	union {
-		struct {
-			u8 result_register_count:3;
-			u8 reserved:3;
-			u8 internal_limits:1;
-			u8 host_test_enable:1;
-		};
-		u8 f09_bist_query1;
-	};
-};
-
-struct f09_control {
-	union {
-		struct {
-			u8 test1_limit_low:8;
-			u8 test1_limit_high:8;
-			u8 test1_limit_diff:8;
-		};
-		u8 f09_control_test1[3];
-	};
-	union {
-		struct {
-			u8 test2_limit_low:8;
-			u8 test2_limit_high:8;
-			u8 test2_limit_diff:8;
-		};
-		u8 f09_control_test2[3];
-	};
-};
-
-struct f09_data {
-	u8 test_number_control;
-	u8 overall_bist_result;
-	u8 test_result1;
-	u8 test_result2;
-	u8 transmitter_number;
-
-	union {
-		struct {
-			u8 receiver_number:6;
-			u8 limit_failure_code:2;
-		};
-		u8 f09_bist_data2;
-	};
-};
-
-struct f09_cmd {
-	union {
-		struct {
-			u8 run_bist:1;
-		};
-		u8 f09_bist_cmd0;
-	};
-};
-
-struct rmi_fn_09_data {
-	struct f09_query query;
-	struct f09_data data;
-	struct f09_cmd cmd;
-	struct f09_control control;
-	signed char status;
-};
-
-
-static ssize_t rmi_f09_status_show(struct device *dev,
-				     struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_status_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-
-static ssize_t rmi_f09_limit_register_count_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_host_test_enable_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_host_test_enable_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count);
-
-static ssize_t rmi_f09_internal_limits_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_result_register_count_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_overall_bist_result_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_test_number_control_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_test_number_control_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count);
-
-static ssize_t rmi_f09_run_bist_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_run_bist_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count);
-
-static ssize_t rmi_f09_test_result1_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_test_result2_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_control_test1_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_control_test1_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count);
-
-static ssize_t rmi_f09_control_test2_show(struct device *dev,
-				      struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_f09_control_test2_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count);
-
-static int rmi_f09_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f09_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f09_initialize(struct rmi_function_container *fc);
-
-static int rmi_f09_config(struct rmi_function_container *fc);
-
-static int rmi_f09_reset(struct rmi_function_container *fc);
-
-static int rmi_f09_create_sysfs(struct rmi_function_container *fc);
-
-
-static struct device_attribute attrs[] = {
-	__ATTR(status, RMI_RW_ATTR,
-		   rmi_f09_status_show, rmi_f09_status_store),
-	__ATTR(limitRegisterCount, RMI_RO_ATTR,
-	       rmi_f09_limit_register_count_show, rmi_store_error),
-	__ATTR(hostTestEnable, RMI_RW_ATTR,
-	       rmi_f09_host_test_enable_show, rmi_f09_host_test_enable_store),
-	__ATTR(internalLimits, RMI_RO_ATTR,
-	       rmi_f09_internal_limits_show, rmi_store_error),
-	__ATTR(resultRegisterCount, RMI_RO_ATTR,
-	       rmi_f09_result_register_count_show, rmi_store_error),
-	__ATTR(overall_bist_result, RMI_RO_ATTR,
-	       rmi_f09_overall_bist_result_show, rmi_store_error),
-	__ATTR(test_number_control, RMI_RW_ATTR,
-	       rmi_f09_test_number_control_show,
-	       rmi_f09_test_number_control_store),
-	__ATTR(test_result1, RMI_RO_ATTR,
-	       rmi_f09_test_result1_show, rmi_store_error),
-	__ATTR(test_result2, RMI_RO_ATTR,
-	       rmi_f09_test_result2_show, rmi_store_error),
-	__ATTR(run_bist, RMI_RW_ATTR,
-	       rmi_f09_run_bist_show, rmi_f09_run_bist_store),
-	__ATTR(f09_control_test1, RMI_RW_ATTR,
-	       rmi_f09_control_test1_show, rmi_f09_control_test1_store),
-	__ATTR(f09_control_test2, RMI_RW_ATTR,
-	       rmi_f09_control_test2_show, rmi_f09_control_test2_store),
-};
-
-static int rmi_f09_init(struct rmi_function_container *fc)
-{
-	int rc;
-
-	dev_info(&fc->dev, "Intializing F09 values.");
-
-	rc = rmi_f09_alloc_memory(fc);
-	if (rc < 0)
-		goto error_exit;
-
-	rc = rmi_f09_initialize(fc);
-	if (rc < 0)
-		goto error_exit;
-
-	rc = rmi_f09_create_sysfs(fc);
-	if (rc < 0)
-		goto error_exit;
-
-	return 0;
-
-error_exit:
-	rmi_f09_free_memory(fc);
-
-	return rc;
-}
-
-static int rmi_f09_alloc_memory(struct rmi_function_container *fc)
-{
-	struct rmi_fn_09_data *f09;
-
-	f09 = kzalloc(sizeof(struct rmi_fn_09_data), GFP_KERNEL);
-	if (!f09) {
-		dev_err(&fc->dev, "Failed to allocate rmi_fn_09_data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f09;
-
-	return 0;
-}
-
-static void rmi_f09_free_memory(struct rmi_function_container *fc)
-{
-	kfree(fc->data);
-	fc->data = NULL;
-}
-
-static int rmi_f09_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_device_platform_data *pdata;
-	struct rmi_fn_09_data *f09 = fc->data;
-	u8 query_base_addr;
-	int rc;
-
-
-	pdata = to_rmi_platform_data(rmi_dev);
-	query_base_addr = fc->fd.query_base_addr;
-
-	/* initial all default values for f09 query here */
-	rc = rmi_read_block(rmi_dev, query_base_addr,
-		(u8 *)&f09->query, sizeof(f09->query));
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to read query register."
-			" from 0x%04x\n", query_base_addr);
-		return rc;
-	}
-
-	return 0;
-}
-
-static int rmi_f09_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.");
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev, "Failed to create sysfs file for %s.",
-			     attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-
-	return rc;
-}
-
-static int rmi_f09_config(struct rmi_function_container *fc)
-{
-	/*we do nothing here. instead reset should notify the user.*/
-	return 0;
-}
-
-static int rmi_f09_reset(struct rmi_function_container *fc)
-{
-	struct  rmi_fn_09_data  *instance_data = fc->data;
-
-	instance_data->status = -ECONNRESET;
-
-	return 0;
-}
-
-static void rmi_f09_remove(struct rmi_function_container *fc)
-{
-	int attr_count;
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-
-	rmi_f09_free_memory(fc);
-}
-
-static int rmi_f09_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_fn_09_data *data = fc->data;
-	int error;
-	error = rmi_read_block(rmi_dev, fc->fd.command_base_addr,
-			(u8 *)&data->cmd, sizeof(data->cmd));
-
-	if (error < 0) {
-		dev_err(&fc->dev, "Failed to read command register.\n");
-		return error;
-	}
-	/* If the command register is cleared, meaning the value is 0 */
-	if (data->status == ECONNRESET) {
-		dev_warn(&rmi_dev->dev, "RESET occured: %#04x.\n",
-			data->status);
-	} else if (data->cmd.run_bist) {
-		dev_warn(&rmi_dev->dev,
-			"Command register not cleared: %#04x.\n",
-			data->cmd.run_bist);
-	}
-	return 0;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x09,
-	.init = rmi_f09_init,
-	.attention = rmi_f09_attention,
-	.config = rmi_f09_config,
-	.reset = rmi_f09_reset,
-	.remove = rmi_f09_remove
-};
-
-static int __init rmi_f09_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void rmi_f09_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-static ssize_t rmi_f09_status_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n", instance_data->status);
-}
-
-static ssize_t rmi_f09_status_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	/* any write to status resets 1 */
-	instance_data->status = 0;
-
-	return 0;
-}
-
-static ssize_t rmi_f09_limit_register_count_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->query.limit_register_count);
-}
-
-static ssize_t rmi_f09_host_test_enable_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->query.host_test_enable);
-}
-
-static ssize_t rmi_f09_host_test_enable_store(struct device *dev,
-					  struct device_attribute *attr,
-					  const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-	unsigned int new_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) != 1) {
-		dev_err(dev,
-			"%s: Error - hostTestEnable has an invalid length.\n",
-			__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid hostTestEnable bit %s.",
-			__func__, buf);
-		return -EINVAL;
-	}
-	data->query.host_test_enable = new_value;
-	result = rmi_write(fc->rmi_dev, fc->fd.query_base_addr,
-		data->query.host_test_enable);
-	if (result < 0) {
-		dev_err(dev, "%s: Could not write hostTestEnable to 0x%x\n",
-				__func__, fc->fd.query_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_f09_internal_limits_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->query.internal_limits);
-}
-
-static ssize_t rmi_f09_result_register_count_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->query.result_register_count);
-}
-
-static ssize_t rmi_f09_overall_bist_result_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->data.overall_bist_result);
-}
-
-static ssize_t rmi_f09_test_result1_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->data.test_result1);
-}
-
-static ssize_t rmi_f09_test_result2_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->data.test_result2);
-}
-
-static ssize_t rmi_f09_run_bist_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->cmd.run_bist);
-}
-
-static ssize_t rmi_f09_run_bist_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-	unsigned int new_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) != 1) {
-		dev_err(dev,
-		"%s: Error - run_bist_store has an "
-		"invalid len.\n",
-		__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid run_bist bit %s.", __func__, buf);
-		return -EINVAL;
-	}
-	data->cmd.run_bist = new_value;
-	result = rmi_write(fc->rmi_dev, fc->fd.command_base_addr,
-		data->cmd.run_bist);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write run_bist_store to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_f09_control_test1_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u %u %u\n",
-			data->control.test1_limit_low,
-			data->control.test1_limit_high,
-			data->control.test1_limit_diff);
-}
-
-static ssize_t rmi_f09_control_test1_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-	unsigned int new_low, new_high, new_diff;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u %u %u", &new_low, &new_high, &new_diff) != 3) {
-		dev_err(dev,
-		"%s: Error - f09_control_test1_store has an "
-		"invalid len.\n",
-		__func__);
-		return -EINVAL;
-	}
-
-	if (new_low < 0 || new_low > 1 || new_high < 0 || new_high
-			|| new_diff < 0 || new_diff) {
-		dev_err(dev, "%s: Invalid f09_control_test1_diff bit %s.",
-			__func__, buf);
-		return -EINVAL;
-	}
-	data->control.test1_limit_low = new_low;
-	data->control.test1_limit_high = new_high;
-	data->control.test1_limit_diff = new_diff;
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test1_limit_low);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test1_limit_low to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test1_limit_high);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test1_limit_high to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test1_limit_diff);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test1_limit_diff to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_f09_control_test2_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u %u %u\n",
-			data->control.test2_limit_low,
-			data->control.test2_limit_high,
-			data->control.test2_limit_diff);
-}
-
-static ssize_t rmi_f09_control_test2_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-	unsigned int new_low, new_high, new_diff;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u %u %u", &new_low, &new_high, &new_diff) != 3) {
-		dev_err(dev,
-		"%s: Error - f09_control_test1_store has an "
-		"invalid len.\n",
-		__func__);
-		return -EINVAL;
-	}
-
-	if (new_low < 0 || new_low > 1 || new_high < 0 || new_high > 1 ||
-			new_diff < 0 || new_diff > 1) {
-		dev_err(dev, "%s: Invalid f09_control_test2_diff bit %s.",
-			__func__, buf);
-		return -EINVAL;
-	}
-	data->control.test2_limit_low = new_low;
-	data->control.test2_limit_high = new_high;
-	data->control.test2_limit_diff = new_diff;
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test2_limit_low);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test2_limit_low to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test2_limit_high);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test2_limit_high to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->control.test2_limit_diff);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write f09_control_test2_limit_diff to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-
-static ssize_t rmi_f09_test_number_control_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->data.test_number_control);
-}
-
-static ssize_t rmi_f09_test_number_control_store(struct device *dev,
-				      struct device_attribute *attr,
-					const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_09_data *data;
-	unsigned int new_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) != 1) {
-		dev_err(dev,
-		"%s: Error - test_number_control_store has an "
-		"invalid len.\n",
-		__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < 0 || new_value > 1) {
-		dev_err(dev, "%s: Invalid test_number_control bit %s.",
-			__func__, buf);
-		return -EINVAL;
-	}
-	data->data.test_number_control = new_value;
-	result = rmi_write(fc->rmi_dev, fc->fd.control_base_addr,
-		data->data.test_number_control);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write "
-				"test_number_control_store to 0x%x\n",
-				__func__, fc->fd.data_base_addr);
-		return result;
-	}
-
-	return count;
-}
-
-module_init(rmi_f09_module_init);
-module_exit(rmi_f09_module_exit);
-
-MODULE_AUTHOR("Allie Xiong <axiong@Synaptics.com>");
-MODULE_DESCRIPTION("RMI F09 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f11.c b/drivers/input/touchscreen/rmi4/rmi_f11.c
deleted file mode 100755
index 794abc4e4ea74..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f11.c
+++ /dev/null
@@ -1,1950 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/input.h>
-#include <linux/input/mt.h>
-#include <linux/rmi.h>
-#include "rmi_driver.h"
-#define RESUME_REZERO (1 && defined(CONFIG_PM))
-#if RESUME_REZERO
-#include <linux/delay.h>
-#define DEFAULT_REZERO_WAIT_MS	40
-#endif
-
-#ifndef MT_TOOL_MAX
-#define MT_TOOL_MAX MT_TOOL_PEN
-#endif
-
-#define F11_MAX_NUM_OF_SENSORS		8
-#define F11_MAX_NUM_OF_FINGERS		10
-#define F11_MAX_NUM_OF_TOUCH_SHAPES	16
-
-#define F11_REL_POS_MIN		-128
-#define F11_REL_POS_MAX		127
-
-#define FINGER_STATE_MASK	0x03
-#define GET_FINGER_STATE(f_states, i) \
-	((f_states[i / 4] >> (2 * (i % 4))) & FINGER_STATE_MASK)
-
-#define F11_CTRL_SENSOR_MAX_X_POS_OFFSET	6
-#define F11_CTRL_SENSOR_MAX_Y_POS_OFFSET	8
-
-#define F11_CEIL(x, y) (((x) + ((y)-1)) / (y))
-#define INBOX(x, y, box) (x >= box.x && x < (box.x + box.width) \
-			&& y >= box.y && y < (box.y + box.height))
-
-#define DEFAULT_XY_MAX 9999
-#define DEFAULT_MAX_ABS_MT_PRESSURE 255
-#define DEFAULT_MAX_ABS_MT_TOUCH 15
-#define DEFAULT_MAX_ABS_MT_ORIENTATION 1
-#define DEFAULT_MIN_ABS_MT_TRACKING_ID 1
-#define DEFAULT_MAX_ABS_MT_TRACKING_ID 10
-#define MAX_NAME_LENGTH 256
-
-#define SYNAPTICS_MAX_POINTS  (10)
-static ssize_t f11_flip_show(struct device *dev,
-				   struct device_attribute *attr, char *buf);
-
-static ssize_t f11_flip_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count);
-
-static ssize_t f11_clip_show(struct device *dev,
-				   struct device_attribute *attr, char *buf);
-
-static ssize_t f11_clip_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count);
-
-static ssize_t f11_offset_show(struct device *dev,
-				     struct device_attribute *attr, char *buf);
-
-static ssize_t f11_offset_store(struct device *dev,
-				      struct device_attribute *attr,
-				      const char *buf, size_t count);
-
-static ssize_t f11_swap_show(struct device *dev,
-				   struct device_attribute *attr, char *buf);
-
-static ssize_t f11_swap_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count);
-
-static ssize_t f11_relreport_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t f11_relreport_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-
-static ssize_t f11_maxPos_show(struct device *dev,
-				     struct device_attribute *attr, char *buf);
-
-static ssize_t f11_rezero_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-
-#if RESUME_REZERO
-static ssize_t f11_rezeroOnResume_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t f11_rezeroOnResume_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-static ssize_t f11_rezeroWait_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t f11_rezeroWait_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-#endif
-
-
-static void rmi_f11_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f11_initialize(struct rmi_function_container *fc);
-
-static int rmi_f11_create_sysfs(struct rmi_function_container *fc);
-
-static int rmi_f11_config(struct rmi_function_container *fc);
-
-static int rmi_f11_reset(struct rmi_function_container *fc);
-
-static int rmi_f11_register_devices(struct rmi_function_container *fc);
-
-static void rmi_f11_free_devices(struct rmi_function_container *fc);
-
-
-static struct device_attribute attrs[] = {
-	__ATTR(flip, RMI_RW_ATTR, f11_flip_show, f11_flip_store),
-	__ATTR(clip, RMI_RW_ATTR, f11_clip_show, f11_clip_store),
-	__ATTR(offset, RMI_RW_ATTR, f11_offset_show, f11_offset_store),
-	__ATTR(swap, RMI_RW_ATTR, f11_swap_show, f11_swap_store),
-	__ATTR(relreport, RMI_RW_ATTR, f11_relreport_show, f11_relreport_store),
-	__ATTR(maxPos, RMI_RO_ATTR, f11_maxPos_show, rmi_store_error),
-#if RESUME_REZERO
-	__ATTR(rezeroOnResume, RMI_RW_ATTR, f11_rezeroOnResume_show,
-		f11_rezeroOnResume_store),
-	__ATTR(rezeroWait, RMI_RW_ATTR, f11_rezeroWait_show,
-		f11_rezeroWait_store),
-#endif
-	__ATTR(rezero, RMI_WO_ATTR, rmi_show_error, f11_rezero_store)
-};
-
-
-union f11_2d_commands {
-	struct {
-		u8 rezero:1;
-	};
-	u8 reg;
-};
-
-struct f11_2d_device_query {
-	union {
-		struct {
-			u8 nbr_of_sensors:3;
-			u8 has_query9:1;
-			u8 has_query11:1;
-		};
-		u8 f11_2d_query0;
-	};
-
-	union {
-		struct {
-			u8 has_z_tuning:1;
-			u8 has_pos_interpolation_tuning:1;
-			u8 has_w_tuning:1;
-			u8 has_pitch_info:1;
-			u8 has_default_finger_width:1;
-			u8 has_segmentation_aggressiveness:1;
-			u8 has_tx_rw_clip:1;
-			u8 has_drumming_correction:1;
-		};
-		u8 f11_2d_query11;
-	};
-};
-
-union f11_2d_query9 {
-	struct {
-		u8 has_pen:1;
-		u8 has_proximity:1;
-		u8 has_palm_det_sensitivity:1;
-		u8 has_suppress_on_palm_detect:1;
-		u8 has_two_pen_thresholds:1;
-		u8 has_contact_geometry:1;
-	};
-	u8 reg;
-};
-
-struct f11_2d_sensor_query {
-	union {
-		struct {
-			/* query1 */
-			u8 number_of_fingers:3;
-			u8 has_rel:1;
-			u8 has_abs:1;
-			u8 has_gestures:1;
-			u8 has_sensitivity_adjust:1;
-			u8 configurable:1;
-			/* query2 */
-			u8 num_of_x_electrodes:7;
-			/* query3 */
-			u8 num_of_y_electrodes:7;
-			/* query4 */
-			u8 max_electrodes:7;
-		};
-		u8 f11_2d_query1__4[4];
-	};
-
-	union {
-		struct {
-			u8 abs_data_size:3;
-			u8 has_anchored_finger:1;
-			u8 has_adj_hyst:1;
-			u8 has_dribble:1;
-		};
-		u8 f11_2d_query5;
-	};
-
-	u8 f11_2d_query6;
-
-	union {
-		struct {
-			u8 has_single_tap:1;
-			u8 has_tap_n_hold:1;
-			u8 has_double_tap:1;
-			u8 has_early_tap:1;
-			u8 has_flick:1;
-			u8 has_press:1;
-			u8 has_pinch:1;
-			u8 padding:1;
-
-			u8 has_palm_det:1;
-			u8 has_rotate:1;
-			u8 has_touch_shapes:1;
-			u8 has_scroll_zones:1;
-			u8 has_individual_scroll_zones:1;
-			u8 has_multi_finger_scroll:1;
-		};
-		u8 f11_2d_query7__8[2];
-	};
-
-	union f11_2d_query9 query9;
-
-	union {
-		struct {
-			u8 nbr_touch_shapes:5;
-		};
-		u8 f11_2d_query10;
-	};
-};
-
-union f11_2d_ctrl10 {
-	struct {
-		u8 single_tap_int_enable:1;
-		u8 tap_n_hold_int_enable:1;
-		u8 double_tap_int_enable:1;
-		u8 early_tap_int_enable:1;
-		u8 flick_int_enable:1;
-		u8 press_int_enable:1;
-		u8 pinch_int_enable:1;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl11 {
-	struct {
-		u8 palm_detect_int_enable:1;
-		u8 rotate_int_enable:1;
-		u8 touch_shape_int_enable:1;
-		u8 scroll_zone_int_enable:1;
-		u8 multi_finger_scroll_int_enable:1;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl12 {
-	struct {
-		u8 sensor_map:7;
-		u8 xy_sel:1;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl14 {
-	struct {
-		u8 sens_adjustment:5;
-		u8 hyst_adjustment:3;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl15 {
-	struct {
-		u8 max_tap_time:8;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl16 {
-	struct {
-		u8 min_press_time:8;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl17 {
-	struct {
-		u8 max_tap_distance:8;
-	};
-	u8 reg;
-};
-
-union f11_2d_ctrl18_19 {
-	struct {
-		u8 min_flick_distance:8;
-		u8 min_flick_speed:8;
-	};
-	u8 reg[2];
-};
-
-union f11_2d_ctrl20_21 {
-	struct {
-		u8 pen_detect_enable:1;
-		u8 pen_jitter_filter_enable:1;
-		u8 ctrl20_reserved:6;
-		u8 pen_z_threshold:8;
-	};
-	u8 reg[2];
-};
-
-struct  f11_2d_ctrl {
-
-	union {
-		struct {
-			/* F11_2D_Ctrl0 */
-			u8 reporting_mode:3;
-			u8 abs_pos_filt:1;
-			u8 rel_pos_filt:1;
-			u8 rel_ballistics:1;
-			u8 dribble:1;
-			u8 report_beyond_clip:1;
-			/* F11_2D_Ctrl1 */
-			u8 palm_detect_thres:4;
-			u8 motion_sensitivity:2;
-			u8 man_track_en:1;
-			u8 man_tracked_finger:1;
-			/* F11_2D_Ctrl2 and 3 */
-			u8 delta_x_threshold:8;
-			u8 delta_y_threshold:8;
-			/* F11_2D_Ctrl4 and 5 */
-			u8 velocity:8;
-			u8 acceleration:8;
-			/* F11_2D_Ctrl6 thru 9 */
-			u16 sensor_max_x_pos:12;
-			u8 ctrl7_reserved:4;
-			u16 sensor_max_y_pos:12;
-			u8 ctrl9_reserved:4;
-		};
-		u8 ctrl0_9[10];
-	};
-
-	union f11_2d_ctrl10		*ctrl10;
-	union f11_2d_ctrl11		*ctrl11;
-	union f11_2d_ctrl12		*ctrl12;
-	u8				ctrl12_size;
-	union f11_2d_ctrl14		*ctrl14;
-	union f11_2d_ctrl15		*ctrl15;
-	union f11_2d_ctrl16		*ctrl16;
-	union f11_2d_ctrl17		*ctrl17;
-	union f11_2d_ctrl18_19		*ctrl18_19;
-	union f11_2d_ctrl20_21		*ctrl20_21;
-};
-
-struct f11_2d_data_1_5 {
-	u8 x_msb;
-	u8 y_msb;
-	u8 x_lsb:4;
-	u8 y_lsb:4;
-	u8 w_y:4;
-	u8 w_x:4;
-	u8 z;
-};
-
-struct f11_2d_data_6_7 {
-	s8 delta_x;
-	s8 delta_y;
-};
-
-struct f11_2d_data_8 {
-	u8 single_tap:1;
-	u8 tap_and_hold:1;
-	u8 double_tap:1;
-	u8 early_tap:1;
-	u8 flick:1;
-	u8 press:1;
-	u8 pinch:1;
-};
-
-struct f11_2d_data_9 {
-	u8 palm_detect:1;
-	u8 rotate:1;
-	u8 shape:1;
-	u8 scrollzone:1;
-	u8 finger_count:3;
-};
-
-struct f11_2d_data_10 {
-	u8 pinch_motion;
-};
-
-struct f11_2d_data_10_12 {
-	u8 x_flick_dist;
-	u8 y_flick_dist;
-	u8 flick_time;
-};
-
-struct f11_2d_data_11_12 {
-	u8 motion;
-	u8 finger_separation;
-};
-
-struct f11_2d_data_13 {
-	u8 shape_n;
-};
-
-struct f11_2d_data_14_15 {
-	u8 horizontal;
-	u8 vertical;
-};
-
-struct f11_2d_data_14_17 {
-	u8 x_low;
-	u8 y_right;
-	u8 x_upper;
-	u8 y_left;
-};
-
-struct f11_2d_data {
-	u8				*f_state;
-	const struct f11_2d_data_1_5	*abs_pos;
-	const struct f11_2d_data_6_7	*rel_pos;
-	const struct f11_2d_data_8	*gest_1;
-	const struct f11_2d_data_9	*gest_2;
-	const struct f11_2d_data_10	*pinch;
-	const struct f11_2d_data_10_12	*flick;
-	const struct f11_2d_data_11_12	*rotate;
-	const struct f11_2d_data_13	*shapes;
-	const struct f11_2d_data_14_15	*multi_scroll;
-	const struct f11_2d_data_14_17	*scroll_zones;
-};
-
-struct f11_2d_sensor {
-	struct rmi_f11_2d_axis_alignment axis_align;
-	struct f11_2d_sensor_query sens_query;
-	struct f11_2d_data data;
-	u16 max_x;
-	u16 max_y;
-	u8 nbr_fingers;
-	u8 finger_tracker[F11_MAX_NUM_OF_FINGERS];
-	u8 *data_pkt;
-	int pkt_size;
-	u8 sensor_index;
-	struct rmi_f11_virtualbutton_map virtualbutton_map;
-	char input_name[MAX_NAME_LENGTH];
-	char input_phys[MAX_NAME_LENGTH];
-	struct input_dev *input;
-	struct input_dev *mouse_input;
-};
-
-struct f11_data {
-	struct f11_2d_device_query dev_query;
-	struct f11_2d_ctrl dev_controls;
-#if	RESUME_REZERO
-	u16 rezero_wait_ms;
-	bool rezero_on_resume;
-#endif
-	struct f11_2d_sensor sensors[F11_MAX_NUM_OF_SENSORS];
-};
-
-enum finger_state_values {
-	F11_NO_FINGER	= 0x00,
-	F11_PRESENT	= 0x01,
-	F11_INACCURATE	= 0x02,
-	F11_RESERVED	= 0x03
-};
-
-/** F11_INACCURATE state is overloaded to indicate pen present. */
-#define F11_PEN F11_INACCURATE
-
-static int get_tool_type(struct f11_2d_sensor *sensor, u8 finger_state) {
-	if (sensor->sens_query.query9.has_pen && finger_state == F11_PEN)
-		return MT_TOOL_PEN;
-	return MT_TOOL_FINGER;
-}
-
-static void rmi_f11_rel_pos_report(struct f11_2d_sensor *sensor, u8 n_finger)
-{
-	struct f11_2d_data *data = &sensor->data;
-	struct rmi_f11_2d_axis_alignment *axis_align = &sensor->axis_align;
-	s8 x, y;
-	s8 temp;
-
-	x = data->rel_pos[n_finger].delta_x;
-	y = data->rel_pos[n_finger].delta_y;
-
-	x = min(F11_REL_POS_MAX, max(F11_REL_POS_MIN, (int)x));
-	y = min(F11_REL_POS_MAX, max(F11_REL_POS_MIN, (int)y));
-
-	if (axis_align->swap_axes) {
-		temp = x;
-		x = y;
-		y = temp;
-	}
-	if (axis_align->flip_x)
-		x = min(F11_REL_POS_MAX, -x);
-	if (axis_align->flip_y)
-		y = min(F11_REL_POS_MAX, -y);
-
-	if (x || y) {
-		input_report_rel(sensor->input, REL_X, x);
-		input_report_rel(sensor->input, REL_Y, y);
-		input_report_rel(sensor->mouse_input, REL_X, x);
-		input_report_rel(sensor->mouse_input, REL_Y, y);
-	}
-	input_sync(sensor->mouse_input);
-}
-
-static void rmi_f11_abs_pos_report(struct f11_2d_sensor *sensor,
-					u8 finger_state, u8 n_finger)
-{
-	struct f11_2d_data *data = &sensor->data;
-	struct rmi_f11_2d_axis_alignment *axis_align = &sensor->axis_align;
-	int prev_state = sensor->finger_tracker[n_finger];
-	int x, y, z;
-	int w_x, w_y, w_max, w_min, orient;
-	int temp;
-
-	if (prev_state && !finger_state) {
-		/* this is a release */
-		x = y = z = w_max = w_min = orient = 0;
-		input_mt_slot(sensor->input, n_finger);
-		input_mt_report_slot_state(sensor->input, MT_TOOL_FINGER, false);
-		input_report_abs(sensor->input, ABS_MT_TRACKING_ID, -1);
-	} else if (!prev_state && !finger_state) {
-		/* nothing to report */
-		return;
-	} else {
-		x = ((data->abs_pos[n_finger].x_msb << 4) |
-			data->abs_pos[n_finger].x_lsb);
-		y = ((data->abs_pos[n_finger].y_msb << 4) |
-			data->abs_pos[n_finger].y_lsb);
-		z = data->abs_pos[n_finger].z;
-		w_x = data->abs_pos[n_finger].w_x;
-		w_y = data->abs_pos[n_finger].w_y;
-		w_max = max(w_x, w_y);
-		w_min = min(w_x, w_y);
-		if (axis_align->swap_axes) {
-			temp = x;
-			x = y;
-			y = temp;
-			temp = w_x;
-			w_x = w_y;
-			w_y = temp;
-		}
-
-		orient = w_x > w_y ? 1 : 0;
-
-		if (axis_align->flip_x)
-			x = max(sensor->max_x - x, 0);
-
-		if (axis_align->flip_y)
-			y = max(sensor->max_y - y, 0);
-
-		/*
-		** here checking if X offset or y offset are specified is
-		**  redundant.  We just add the offsets or, clip the values
-		**
-		** note: offsets need to be done before clipping occurs,
-		** or we could get funny values that are outside
-		** clipping boundaries.
-		*/
-		x += axis_align->offset_X;
-		y += axis_align->offset_Y;
-		x =  max(axis_align->clip_X_low, x);
-		y =  max(axis_align->clip_Y_low, y);
-		if (axis_align->clip_X_high)
-			x = min(axis_align->clip_X_high, x);
-		if (axis_align->clip_Y_high)
-			y =  min(axis_align->clip_Y_high, y);
-
-		pr_debug("%s: f_state[%d]:%d - x:%d y:%d z:%d w_max:%d w_min:%d\n",
-			__func__, n_finger, finger_state, x, y, z, w_max, w_min);
-#ifndef CONFIG_RMI4_F11_PEN
-		/* Some UIs ignore W of zero, so we fudge it to 1 for pens. */
-		if (sensor->sens_query.query9.has_pen &&
-				get_tool_type(sensor, finger_state) == MT_TOOL_PEN) {
-			w_max = max(1, w_max);
-			w_min = max(1, w_min);
-		}
-#endif
-		//printk("+finger:%d, state:%d x:%d, y:%d\n",n_finger, finger_state, x , y);
-		input_mt_slot(sensor->input, n_finger);
-		input_mt_report_slot_state(sensor->input, MT_TOOL_FINGER, true);
-		input_report_abs(sensor->input, ABS_MT_TRACKING_ID, n_finger);
-		input_report_abs(sensor->input, ABS_MT_TOUCH_MAJOR, w_max);
-		input_report_abs(sensor->input, ABS_MT_PRESSURE, z);
-		input_report_abs(sensor->input, ABS_MT_TOUCH_MINOR, w_min);
-		input_report_abs(sensor->input, ABS_MT_ORIENTATION, orient);
-		input_report_abs(sensor->input, ABS_MT_POSITION_X, x);
-		input_report_abs(sensor->input, ABS_MT_POSITION_Y, y);
-
-#ifdef	CONFIG_RMI4_F11_PEN
-		if (sensor->sens_query.query9.has_pen) {
-			input_report_abs(sensor->input, ABS_MT_TOOL_TYPE,
-					 get_tool_type(sensor, finger_state));
-		}
-#endif
-
-	}
-	sensor->finger_tracker[n_finger] = finger_state;
-}
-
-#ifdef CONFIG_RMI4_VIRTUAL_BUTTON
-static int rmi_f11_virtual_button_handler(struct f11_2d_sensor *sensor)
-{
-	int i;
-	int x;
-	int y;
-	struct rmi_f11_virtualbutton_map *virtualbutton_map;
-	if (sensor->sens_query.has_gestures &&
-		sensor->data.gest_1->single_tap) {
-		virtualbutton_map = &sensor->virtualbutton_map;
-		x = ((sensor->data.abs_pos[0].x_msb << 4) |
-			sensor->data.abs_pos[0].x_lsb);
-		y = ((sensor->data.abs_pos[0].y_msb << 4) |
-			sensor->data.abs_pos[0].y_lsb);
-		for (i = 0; i < virtualbutton_map->buttons; i++) {
-			if (INBOX(x, y, virtualbutton_map->map[i])) {
-				input_report_key(sensor->input,
-					virtualbutton_map->map[i].code, 1);
-				input_report_key(sensor->input,
-					virtualbutton_map->map[i].code, 0);
-				input_sync(sensor->input);
-				return 0;
-			}
-		}
-	}
-	return 0;
-}
-#else
-#define rmi_f11_virtual_button_handler(sensor)
-#endif
-
-static void rmi_f11_finger_handler(struct f11_2d_sensor *sensor)
-{
-	const u8 *f_state = sensor->data.f_state;
-	u8 finger_state;
-	u8 finger_pressed_count;
-	u8 i;
-	for (i = 0, finger_pressed_count = 0; i < sensor->nbr_fingers; i++) {
-		/* Possible of having 4 fingers per f_statet register */
-		finger_state = GET_FINGER_STATE(f_state, i);
-
-		if (finger_state == F11_RESERVED) {
-			pr_err("%s: Invalid finger state[%d]:0x%02x.", __func__,
-					i, finger_state);
-			continue;
-		} else if (finger_state == F11_PRESENT) {
-			finger_pressed_count++;
-		} else if (finger_state == F11_INACCURATE) {
-			continue;
-		}
-
-		if (sensor->data.abs_pos)
-			rmi_f11_abs_pos_report(sensor, finger_state, i);
-
-		if (sensor->data.rel_pos)
-			rmi_f11_rel_pos_report(sensor, i);
-	}
-	input_report_key(sensor->input, BTN_TOUCH, finger_pressed_count);
-	input_sync(sensor->input);
-}
-
-static int f11_2d_construct_data(struct f11_2d_sensor *sensor)
-{
-	struct f11_2d_sensor_query *query = &sensor->sens_query;
-	struct f11_2d_data *data = &sensor->data;
-	int i;
-
-	sensor->nbr_fingers = (query->number_of_fingers == 5 ? 10 :
-				query->number_of_fingers + 1);
-
-	sensor->pkt_size = F11_CEIL(sensor->nbr_fingers, 4);
-
-	if (query->has_abs)
-		sensor->pkt_size += (sensor->nbr_fingers * 5);
-
-	if (query->has_rel)
-		sensor->pkt_size +=  (sensor->nbr_fingers * 2);
-
-	/* Check if F11_2D_Query7 is non-zero */
-	if (query->f11_2d_query7__8[0])
-		sensor->pkt_size += sizeof(u8);
-
-	/* Check if F11_2D_Query7 or F11_2D_Query8 is non-zero */
-	if (query->f11_2d_query7__8[0] || query->f11_2d_query7__8[1])
-		sensor->pkt_size += sizeof(u8);
-
-	if (query->has_pinch || query->has_flick || query->has_rotate) {
-		sensor->pkt_size += 3;
-		if (!query->has_flick)
-			sensor->pkt_size--;
-		if (!query->has_rotate)
-			sensor->pkt_size--;
-	}
-
-	if (query->has_touch_shapes)
-		sensor->pkt_size += F11_CEIL(query->nbr_touch_shapes + 1, 8);
-
-	sensor->data_pkt = kzalloc(sensor->pkt_size, GFP_KERNEL);
-	if (!sensor->data_pkt)
-		return -ENOMEM;
-
-	data->f_state = sensor->data_pkt;
-	i = F11_CEIL(sensor->nbr_fingers, 4);
-
-	if (query->has_abs) {
-		data->abs_pos = (struct f11_2d_data_1_5 *)
-				&sensor->data_pkt[i];
-		i += (sensor->nbr_fingers * 5);
-	}
-
-	if (query->has_rel) {
-		data->rel_pos = (struct f11_2d_data_6_7 *)
-				&sensor->data_pkt[i];
-		i += (sensor->nbr_fingers * 2);
-	}
-
-	if (query->f11_2d_query7__8[0]) {
-		data->gest_1 = (struct f11_2d_data_8 *)&sensor->data_pkt[i];
-		i++;
-	}
-
-	if (query->f11_2d_query7__8[0] || query->f11_2d_query7__8[1]) {
-		data->gest_2 = (struct f11_2d_data_9 *)&sensor->data_pkt[i];
-		i++;
-	}
-
-	if (query->has_pinch) {
-		data->pinch = (struct f11_2d_data_10 *)&sensor->data_pkt[i];
-		i++;
-	}
-
-	if (query->has_flick) {
-		if (query->has_pinch) {
-			data->flick = (struct f11_2d_data_10_12 *)data->pinch;
-			i += 2;
-		} else {
-			data->flick = (struct f11_2d_data_10_12 *)
-					&sensor->data_pkt[i];
-			i += 3;
-		}
-	}
-
-	if (query->has_rotate) {
-		if (query->has_flick) {
-			data->rotate = (struct f11_2d_data_11_12 *)
-					(data->flick + 1);
-		} else {
-			data->rotate = (struct f11_2d_data_11_12 *)
-					&sensor->data_pkt[i];
-			i += 2;
-		}
-	}
-
-	if (query->has_touch_shapes)
-		data->shapes = (struct f11_2d_data_13 *)&sensor->data_pkt[i];
-
-	return 0;
-}
-
-static void f11_free_control_regs(struct f11_2d_ctrl *ctrl)
-{
-	kfree(ctrl->ctrl10);
-	kfree(ctrl->ctrl11);
-	kfree(ctrl->ctrl14);
-	kfree(ctrl->ctrl15);
-	kfree(ctrl->ctrl16);
-	kfree(ctrl->ctrl17);
-	kfree(ctrl->ctrl18_19);
-	kfree(ctrl->ctrl20_21);
-	ctrl->ctrl10 = NULL;
-	ctrl->ctrl11 = NULL;
-	ctrl->ctrl14 = NULL;
-	ctrl->ctrl15 = NULL;
-	ctrl->ctrl16 = NULL;
-	ctrl->ctrl17 = NULL;
-	ctrl->ctrl18_19 = NULL;
-	ctrl->ctrl20_21 = NULL;
-}
-
-static int f11_read_control_regs(struct rmi_device *rmi_dev,
-					   struct f11_2d_ctrl *ctrl,
-					   int ctrl_base_addr) {
-	int read_address = ctrl_base_addr;
-	int error = 0;
-
-	error = rmi_read_block(rmi_dev, read_address, ctrl->ctrl0_9,
-		sizeof(ctrl->ctrl0_9));
-	if (error < 0) {
-		dev_err(&rmi_dev->dev,
-			"Failed to read F11 ctrl0, code: %d.\n", error);
-		return error;
-	}
-	read_address = read_address + sizeof(ctrl->ctrl0_9);
-
-	if (ctrl->ctrl10) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl10->reg, sizeof(union f11_2d_ctrl10));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl10, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl10);
-	}
-
-	if (ctrl->ctrl11) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl11->reg, sizeof(union f11_2d_ctrl11));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl11, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl11);
-	}
-
-	if (ctrl->ctrl14) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl14->reg, sizeof(union f11_2d_ctrl14));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl14, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl14);
-	}
-
-	if (ctrl->ctrl15) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl15->reg, sizeof(union f11_2d_ctrl15));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl15, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl15);
-	}
-
-	if (ctrl->ctrl16) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl16->reg, sizeof(union f11_2d_ctrl16));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl16, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl16);
-	}
-
-	if (ctrl->ctrl17) {
-		error = rmi_read_block(rmi_dev, read_address,
-			&ctrl->ctrl17->reg, sizeof(union f11_2d_ctrl17));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl17, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl17);
-	}
-
-	if (ctrl->ctrl18_19) {
-		error = rmi_read_block(rmi_dev, read_address,
-			ctrl->ctrl18_19->reg, sizeof(union f11_2d_ctrl18_19));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl18_19, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl18_19);
-	}
-
-	if (ctrl->ctrl20_21) {
-		error = rmi_read_block(rmi_dev, read_address,
-			ctrl->ctrl20_21->reg, sizeof(union f11_2d_ctrl20_21));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read F11 ctrl20_21, code: %d.\n",
-				error);
-			return error;
-		}
-		read_address = read_address + sizeof(union f11_2d_ctrl20_21);
-	}
-
-	return 0;
-}
-
-static int f11_allocate_control_regs(struct rmi_device *rmi_dev,
-				struct f11_2d_device_query *device_query,
-				struct f11_2d_sensor_query *sensor_query,
-				struct f11_2d_ctrl *ctrl,
-				int ctrl_base_addr) {
-	int error = 0;
-
-	if (sensor_query->f11_2d_query7__8[0]) {
-		ctrl->ctrl10 = kzalloc(sizeof(union f11_2d_ctrl10),
-				       GFP_KERNEL);
-		if (!ctrl->ctrl10) {
-			error = -ENOMEM;
-			goto error_exit;
-		}
-	}
-
-	if (sensor_query->f11_2d_query7__8[1]) {
-		ctrl->ctrl11 = kzalloc(sizeof(union f11_2d_ctrl11),
-				       GFP_KERNEL);
-		if (!ctrl->ctrl11) {
-			error = -ENOMEM;
-			goto error_exit;
-		}
-	}
-
-	if (device_query->has_query9 && sensor_query->query9.has_pen) {
-		ctrl->ctrl20_21 = kzalloc(sizeof(union f11_2d_ctrl20_21),
-					  GFP_KERNEL);
-		if (!ctrl->ctrl20_21) {
-			error = -ENOMEM;
-			goto error_exit;
-		}
-	}
-
-	return f11_read_control_regs(rmi_dev, ctrl, ctrl_base_addr);
-
-error_exit:
-	f11_free_control_regs(ctrl);
-	return error;
-}
-
-static int f11_write_control_regs(struct rmi_device *rmi_dev,
-					struct f11_2d_sensor_query *query,
-					struct f11_2d_ctrl *ctrl,
-					int ctrl_base_addr)
-{
-	int write_address = ctrl_base_addr;
-	int error;
-
-	error = rmi_write_block(rmi_dev, write_address,
-				ctrl->ctrl0_9, sizeof(ctrl->ctrl0_9));
-	if (error < 0)
-		return error;
-	write_address += sizeof(ctrl->ctrl0_9);
-
-	if (ctrl->ctrl10) {
-		error = rmi_write_block(rmi_dev, write_address,
-					&ctrl->ctrl10->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl11) {
-		error = rmi_write_block(rmi_dev, write_address,
-					&ctrl->ctrl11->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl12 && ctrl->ctrl12_size && query->configurable) {
-		if (ctrl->ctrl12_size > query->max_electrodes) {
-			dev_err(&rmi_dev->dev,
-				"%s: invalid cfg size:%d, should be < %d.\n",
-				__func__, ctrl->ctrl12_size,
-				query->max_electrodes);
-			return -EINVAL;
-		}
-		error = rmi_write_block(rmi_dev, write_address,
-						&ctrl->ctrl12->reg,
-						ctrl->ctrl12_size);
-		if (error < 0)
-			return error;
-		write_address += ctrl->ctrl12_size;
-	}
-
-	if (ctrl->ctrl14) {
-		error = rmi_write_block(rmi_dev, write_address,
-				&ctrl->ctrl14->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl15) {
-		error = rmi_write_block(rmi_dev, write_address,
-				&ctrl->ctrl15->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl16) {
-		error = rmi_write_block(rmi_dev, write_address,
-				&ctrl->ctrl16->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl17) {
-		error = rmi_write_block(rmi_dev, write_address,
-				&ctrl->ctrl17->reg, 1);
-		if (error < 0)
-			return error;
-		write_address++;
-	}
-
-	if (ctrl->ctrl18_19) {
-		error = rmi_write_block(rmi_dev, write_address,
-			ctrl->ctrl18_19->reg, sizeof(union f11_2d_ctrl18_19));
-		if (error < 0)
-			return error;
-		write_address += sizeof(union f11_2d_ctrl18_19);
-	}
-
-	if (ctrl->ctrl20_21) {
-		error = rmi_write_block(rmi_dev, write_address,
-					ctrl->ctrl20_21->reg,
-					sizeof(union f11_2d_ctrl20_21));
-		if (error < 0)
-			return error;
-		write_address += sizeof(union f11_2d_ctrl20_21);
-	}
-
-	return 0;
-}
-
-static int rmi_f11_get_query_parameters(struct rmi_device *rmi_dev,
-			struct f11_2d_sensor_query *query, u8 query_base_addr)
-{
-	int query_size;
-	int rc;
-
-	rc = rmi_read_block(rmi_dev, query_base_addr, query->f11_2d_query1__4,
-					sizeof(query->f11_2d_query1__4));
-	if (rc < 0)
-		return rc;
-	query_size = rc;
-
-	if (query->has_abs) {
-		rc = rmi_read(rmi_dev, query_base_addr + query_size,
-					&query->f11_2d_query5);
-		if (rc < 0)
-			return rc;
-		query_size++;
-	}
-
-	if (query->has_rel) {
-		rc = rmi_read(rmi_dev, query_base_addr + query_size,
-					&query->f11_2d_query6);
-		if (rc < 0)
-			return rc;
-		query_size++;
-	}
-
-	if (query->has_gestures) {
-		rc = rmi_read_block(rmi_dev, query_base_addr + query_size,
-					query->f11_2d_query7__8,
-					sizeof(query->f11_2d_query7__8));
-		if (rc < 0)
-			return rc;
-		query_size += sizeof(query->f11_2d_query7__8);
-	}
-
-	if (query->has_touch_shapes) {
-		rc = rmi_read(rmi_dev, query_base_addr + query_size,
-					&query->f11_2d_query10);
-		if (rc < 0)
-			return rc;
-		query_size++;
-	}
-
-	return query_size;
-}
-
-/* This operation is done in a number of places, so we have a handy routine
- * for it.
- */
-static void f11_set_abs_params(struct rmi_function_container *fc, int index)
-{
-	struct f11_data *instance_data =  fc->data;
-	struct f11_2d_sensor *sensor = &instance_data->sensors[index];
-	struct input_dev *input = sensor->input;
-	int device_x_max =
-		instance_data->dev_controls.sensor_max_x_pos;
-	int device_y_max =
-		instance_data->dev_controls.sensor_max_y_pos;
-	int x_min, x_max, y_min, y_max;
-
-	if (sensor->axis_align.swap_axes) {
-		int temp = device_x_max;
-		device_x_max = device_y_max;
-		device_y_max = temp;
-	}
-
-	/* Use the max X and max Y read from the device, or the clip values,
-	 * whichever is stricter.
-	 */
-	x_min = sensor->axis_align.clip_X_low;
-	if (sensor->axis_align.clip_X_high)
-		x_max = min((int) device_x_max,
-			sensor->axis_align.clip_X_high);
-	else
-		x_max = device_x_max;
-
-	y_min = sensor->axis_align.clip_Y_low;
-	if (sensor->axis_align.clip_Y_high)
-		y_max = min((int) device_y_max,
-			sensor->axis_align.clip_Y_high);
-	else
-		y_max = device_y_max;
-
-	dev_dbg(&fc->dev, "Set ranges X=[%d..%d] Y=[%d..%d].",
-			x_min, x_max, y_min, y_max);
-
-	__set_bit(INPUT_PROP_DIRECT, input->propbit);
-	__set_bit(EV_ABS, input->evbit);
-	input_mt_init_slots(input, SYNAPTICS_MAX_POINTS);
-	input_set_abs_params(input, ABS_MT_PRESSURE, 0, DEFAULT_MAX_ABS_MT_PRESSURE, 0, 0);
-	input_set_abs_params(input, ABS_MT_TOUCH_MAJOR, 0, DEFAULT_MAX_ABS_MT_TOUCH, 0, 0);
-	input_set_abs_params(input, ABS_MT_TOUCH_MINOR, 0, DEFAULT_MAX_ABS_MT_TOUCH, 0, 0);
-	input_set_abs_params(input, ABS_MT_ORIENTATION, 0, DEFAULT_MAX_ABS_MT_ORIENTATION, 0, 0);
-	input_set_abs_params(input, ABS_MT_TRACKING_ID, 
-			DEFAULT_MIN_ABS_MT_TRACKING_ID,
-			DEFAULT_MAX_ABS_MT_TRACKING_ID, 0, 0);
-	/* TODO get max_x_pos (and y) from control registers. */
-	input_set_abs_params(input, ABS_MT_POSITION_X, x_min, x_max, 0, 0);
-	input_set_abs_params(input, ABS_MT_POSITION_Y, y_min, y_max, 0, 0);
-#ifdef	CONFIG_RMI4_F11_PEN
-	if (sensor->sens_query.query9.has_pen)
-		input_set_abs_params(input, ABS_MT_TOOL_TYPE,
-				     0, MT_TOOL_MAX, 0, 0);
-#endif
-}
-
-static int rmi_f11_init(struct rmi_function_container *fc)
-{
-	int rc;
-	char buf[10];
-	rc = rmi_f11_initialize(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f11_register_devices(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f11_create_sysfs(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	//hhb@rock-chips.com
-	buf[0] = 0x09;
-	//buf[1] = 0x1b;
-	rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr, buf, 1);
-	return 0;
-
-err_free_data:
-	rmi_f11_free_memory(fc);
-
-	return rc;
-}
-
-static void rmi_f11_free_memory(struct rmi_function_container *fc)
-{
-	struct f11_data *f11 = fc->data;
-	int i;
-
-	if (f11) {
-		f11_free_control_regs(&f11->dev_controls);
-		for (i = 0; i < f11->dev_query.nbr_of_sensors + 1; i++)
-			kfree(f11->sensors[i].virtualbutton_map.map);
-		kfree(f11);
-		fc->data = NULL;
-	}
-}
-
-
-static int rmi_f11_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f11_data *f11;
-	u8 query_offset;
-	u8 query_base_addr;
-	u8 control_base_addr;
-	u16 max_x_pos, max_y_pos, temp;
-	int rc;
-	int i;
-	struct rmi_device_platform_data *pdata = to_rmi_platform_data(rmi_dev);
-
-	dev_dbg(&fc->dev, "Initializing F11 values for %s.\n",
-		 pdata->sensor_name);
-
-	/*
-	** init instance data, fill in values and create any sysfs files
-	*/
-	f11 = kzalloc(sizeof(struct f11_data), GFP_KERNEL);
-	if (!f11)
-		return -ENOMEM;
-
-	fc->data = f11;
-#if	RESUME_REZERO
-	f11->rezero_on_resume = true;
-	f11->rezero_wait_ms = DEFAULT_REZERO_WAIT_MS;
-#endif
-
-	query_base_addr = fc->fd.query_base_addr;
-	control_base_addr = fc->fd.control_base_addr;
-
-	rc = rmi_read(rmi_dev, query_base_addr, &f11->dev_query.f11_2d_query0);
-	if (rc < 0)
-		return rc;
-
-	query_offset = (query_base_addr + 1);
-	/* Increase with one since number of sensors is zero based */
-	for (i = 0; i < (f11->dev_query.nbr_of_sensors + 1); i++) {
-		f11->sensors[i].sensor_index = i;
-
-		rc = rmi_f11_get_query_parameters(rmi_dev,
-					&f11->sensors[i].sens_query,
-					query_offset);
-		if (rc < 0)
-			return rc;
-		query_offset += rc;
-
-		if (f11->dev_query.has_query9) {
-			rc = rmi_read(rmi_dev, query_offset,
-				      &f11->sensors[i].sens_query.query9.reg);
-			if (rc < 0) {
-				dev_err(&fc->dev, "Failed to read query 9.\n");
-				return rc;
-			}
-			query_offset += rc;
-		}
-
-		rc = f11_allocate_control_regs(rmi_dev,
-				&f11->dev_query, &f11->sensors[i].sens_query,
-				&f11->dev_controls, control_base_addr);
-		if (rc < 0) {
-			dev_err(&fc->dev,
-				"Failed to initialize F11 control params.\n");
-			return rc;
-		}
-
-		f11->sensors[i].axis_align = pdata->axis_align;
-
-		rc = rmi_read_block(rmi_dev,
-			control_base_addr + F11_CTRL_SENSOR_MAX_X_POS_OFFSET,
-			(u8 *)&max_x_pos, sizeof(max_x_pos));
-		if (rc < 0)
-			return rc;
-
-		rc = rmi_read_block(rmi_dev,
-			control_base_addr + F11_CTRL_SENSOR_MAX_Y_POS_OFFSET,
-			(u8 *)&max_y_pos, sizeof(max_y_pos));
-		if (rc < 0)
-			return rc;
-
-		if (pdata->axis_align.swap_axes) {
-			temp = max_x_pos;
-			max_x_pos = max_y_pos;
-			max_y_pos = temp;
-		}
-		f11->sensors[i].max_x = max_x_pos;
-		f11->sensors[i].max_y = max_y_pos;
-
-		rc = f11_2d_construct_data(&f11->sensors[i]);
-		if (rc < 0)
-			return rc;
-	}
-
-	return 0;
-}
-
-static int rmi_f11_register_devices(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f11_data *f11 = fc->data;
-	struct input_dev *input_dev;
-	struct input_dev *input_dev_mouse;
-	int sensors_itertd = 0;
-	int i;
-	int rc;
-#ifdef CONFIG_RMI4_VIRTUAL_BUTTON
-	struct rmi_f11_virtualbutton_map *vm_sensor;
-	struct rmi_f11_virtualbutton_map *vm_pdata;
-	struct rmi_device_platform_data *pdata = to_rmi_platform_data(rmi_dev);
-#endif
-
-	for (i = 0; i < (f11->dev_query.nbr_of_sensors + 1); i++) {
-		sensors_itertd = i;
-		input_dev = input_allocate_device();
-		if (!input_dev) {
-			rc = -ENOMEM;
-			goto error_unregister;
-		}
-
-		f11->sensors[i].input = input_dev;
-		/* TODO how to modify the dev name and
-		* phys name for input device */
-		sprintf(f11->sensors[i].input_name, "%sfn%02x",
-			dev_name(&rmi_dev->dev), fc->fd.function_number);
-		input_dev->name = f11->sensors[i].input_name;
-		sprintf(f11->sensors[i].input_phys, "%s/input0",
-			input_dev->name);
-		input_dev->phys = f11->sensors[i].input_phys;
-		input_dev->dev.parent = &rmi_dev->dev;
-		input_set_drvdata(input_dev, f11);
-
-		set_bit(EV_SYN, input_dev->evbit);
-		set_bit(EV_KEY, input_dev->evbit);
-		set_bit(EV_ABS, input_dev->evbit);
-
-		f11_set_abs_params(fc, i);
-
-		dev_dbg(&fc->dev, "%s: Sensor %d hasRel %d.\n",
-			__func__, i, f11->sensors[i].sens_query.has_rel);
-		if (f11->sensors[i].sens_query.has_rel) {
-			set_bit(EV_REL, input_dev->evbit);
-			set_bit(REL_X, input_dev->relbit);
-			set_bit(REL_Y, input_dev->relbit);
-		}
-		rc = input_register_device(input_dev);
-		if (rc < 0) {
-			input_free_device(input_dev);
-			f11->sensors[i].input = NULL;
-			goto error_unregister;
-		}
-
-		/* how to register the virtualbutton device */
-#ifdef CONFIG_RMI4_VIRTUAL_BUTTON
-		if (f11->sensors[i].sens_query.has_gestures) {
-			int j;
-
-			vm_sensor = &f11->sensors[i].virtualbutton_map;
-			vm_pdata = pdata->virtualbutton_map;
-			if (!vm_pdata) {
-				dev_err(&fc->dev, "Failed to get the pdata virtualbutton map.\n");
-				goto error_unregister;
-			}
-			vm_sensor->buttons = vm_pdata->buttons;
-			vm_sensor->map = kcalloc(vm_pdata->buttons,
-					sizeof(struct virtualbutton_map),
-					GFP_KERNEL);
-			if (!vm_sensor->map) {
-				dev_err(&fc->dev, "Failed to allocate the virtualbutton map.\n");
-				rc = -ENOMEM;
-				goto error_unregister;
-			}
-			/* set bits for each button... */
-			for (j = 0; j < vm_pdata->buttons; j++) {
-				memcpy(&vm_sensor->map[j], &vm_pdata->map[j],
-					sizeof(struct virtualbutton_map));
-				set_bit(vm_sensor->map[j].code,
-					f11->sensors[i].input->keybit);
-			}
-		}
-
-#endif
-
-		if (f11->sensors[i].sens_query.has_rel) {
-			/*create input device for mouse events  */
-			input_dev_mouse = input_allocate_device();
-			if (!input_dev_mouse) {
-				rc = -ENOMEM;
-				goto error_unregister;
-			}
-
-			f11->sensors[i].mouse_input = input_dev_mouse;
-			input_dev_mouse->name = "rmi_mouse";
-			input_dev_mouse->phys = "rmi_f11/input0";
-
-			input_dev_mouse->id.vendor  = 0x18d1;
-			input_dev_mouse->id.product = 0x0210;
-			input_dev_mouse->id.version = 0x0100;
-
-			set_bit(EV_REL, input_dev_mouse->evbit);
-			set_bit(REL_X, input_dev_mouse->relbit);
-			set_bit(REL_Y, input_dev_mouse->relbit);
-
-			set_bit(BTN_MOUSE, input_dev_mouse->evbit);
-			/* Register device's buttons and keys */
-			set_bit(EV_KEY, input_dev_mouse->evbit);
-			set_bit(BTN_LEFT, input_dev_mouse->keybit);
-			set_bit(BTN_MIDDLE, input_dev_mouse->keybit);
-			set_bit(BTN_RIGHT, input_dev_mouse->keybit);
-
-			rc = input_register_device(input_dev_mouse);
-			if (rc < 0) {
-				input_free_device(input_dev_mouse);
-				f11->sensors[i].mouse_input = NULL;
-				goto error_unregister;
-			}
-
-			set_bit(BTN_RIGHT, input_dev_mouse->keybit);
-		}
-
-	}
-
-	return 0;
-
-error_unregister:
-	for (; sensors_itertd > 0; sensors_itertd--) {
-		if (f11->sensors[sensors_itertd].input) {
-			if (f11->sensors[sensors_itertd].mouse_input) {
-				input_unregister_device(
-				   f11->sensors[sensors_itertd].mouse_input);
-				f11->sensors[sensors_itertd].mouse_input = NULL;
-			}
-			input_unregister_device(f11->sensors[i].input);
-			f11->sensors[i].input = NULL;
-		}
-		kfree(f11->sensors[i].virtualbutton_map.map);
-	}
-
-	return rc;
-}
-
-static void rmi_f11_free_devices(struct rmi_function_container *fc)
-{
-	struct f11_data *f11 = fc->data;
-	int i;
-
-	for (i = 0; i < (f11->dev_query.nbr_of_sensors + 1); i++) {
-		if (f11->sensors[i].input)
-			input_unregister_device(f11->sensors[i].input);
-		if (f11->sensors[i].sens_query.has_rel &&
-				f11->sensors[i].mouse_input)
-			input_unregister_device(f11->sensors[i].mouse_input);
-	}
-}
-
-static int rmi_f11_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.\n");
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev,
-				"Failed to create sysfs file for %s.",
-				attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-						  &attrs[attr_count].attr);
-	return rc;
-}
-
-static int rmi_f11_config(struct rmi_function_container *fc)
-{
-	struct f11_data *f11 = fc->data;
-	int i;
-	int rc;
-
-	for (i = 0; i < (f11->dev_query.nbr_of_sensors + 1); i++) {
-		rc = f11_write_control_regs(fc->rmi_dev,
-				   &f11->sensors[i].sens_query,
-				   &f11->dev_controls,
-				   fc->fd.query_base_addr);
-		if (rc < 0)
-			return rc;
-	}
-	return 0;
-}
-
-static int rmi_f11_reset(struct rmi_function_container *fc)
-{
-	/* we do nothing here */
-	return 0;
-}
-
-int rmi_f11_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f11_data *f11 = fc->data;
-	u8 data_base_addr = fc->fd.data_base_addr;
-	int data_base_addr_offset = 0;
-	int error;
-	int i;
-
-	for (i = 0; i < f11->dev_query.nbr_of_sensors + 1; i++) {
-		error = rmi_read_block(rmi_dev,
-				data_base_addr + data_base_addr_offset,
-				f11->sensors[i].data_pkt,
-				f11->sensors[i].pkt_size);
-		if (error < 0)
-			return error;
-
-		rmi_f11_finger_handler(&f11->sensors[i]);
-		rmi_f11_virtual_button_handler(&f11->sensors[i]);
-		data_base_addr_offset += f11->sensors[i].pkt_size;
-	}
-
-	return 0;
-}
-
-#if RESUME_REZERO
-static int rmi_f11_resume(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f11_data *data = fc->data;
-	/* Command register always reads as 0, so we can just use a local. */
-	union f11_2d_commands commands = {};
-	int retval = 0;
-
-	dev_dbg(&fc->dev, "Resuming...\n");
-	if (!data->rezero_on_resume)
-		return 0;
-
-	if (data->rezero_wait_ms)
-		mdelay(data->rezero_wait_ms);
-
-	commands.rezero = 1;
-	retval = rmi_write_block(rmi_dev, fc->fd.command_base_addr,
-			&commands.reg, sizeof(commands.reg));
-	if (retval < 0) {
-		dev_err(&rmi_dev->dev, "%s: failed to issue rezero command, error = %d.",
-			__func__, retval);
-		return retval;
-	}
-
-	return retval;
-}
-#endif /* RESUME_REZERO */
-
-static void rmi_f11_remove(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-	}
-
-	rmi_f11_free_devices(fc);
-
-	rmi_f11_free_memory(fc);
-
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x11,
-	.init = rmi_f11_init,
-	.config = rmi_f11_config,
-	.reset = rmi_f11_reset,
-	.attention = rmi_f11_attention,
-	.remove = rmi_f11_remove
-#if	RESUME_REZERO
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	,
-	.late_resume = rmi_f11_resume
-#else
-	.resume = rmi_f11_resume
-#endif  /* CONFIG_HAS_EARLYSUSPEND */
-#endif
-};
-
-static int __init rmi_f11_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void __exit rmi_f11_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-static ssize_t f11_maxPos_show(struct device *dev,
-				     struct device_attribute *attr,
-				     char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u %u\n",
-			data->sensors[0].max_x, data->sensors[0].max_y);
-}
-
-static ssize_t f11_flip_show(struct device *dev,
-				   struct device_attribute *attr,
-				   char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u %u\n",
-			data->sensors[0].axis_align.flip_x,
-			data->sensors[0].axis_align.flip_y);
-}
-
-static ssize_t f11_flip_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf,
-				    size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-	unsigned int new_X, new_Y;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-
-	if (sscanf(buf, "%u %u", &new_X, &new_Y) != 2)
-		return -EINVAL;
-	if (new_X < 0 || new_X > 1 || new_Y < 0 || new_Y > 1)
-		return -EINVAL;
-	instance_data->sensors[0].axis_align.flip_x = new_X;
-	instance_data->sensors[0].axis_align.flip_y = new_Y;
-
-	return count;
-}
-
-static ssize_t f11_swap_show(struct device *dev,
-				   struct device_attribute *attr, char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->sensors[0].axis_align.swap_axes);
-}
-
-static ssize_t f11_swap_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-	unsigned int newSwap;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-
-	if (sscanf(buf, "%u", &newSwap) != 1)
-		return -EINVAL;
-	if (newSwap < 0 || newSwap > 1)
-		return -EINVAL;
-	instance_data->sensors[0].axis_align.swap_axes = newSwap;
-
-	f11_set_abs_params(fc, 0);
-
-	return count;
-}
-
-static ssize_t f11_relreport_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->
-			sensors[0].axis_align.rel_report_enabled);
-}
-
-static ssize_t f11_relreport_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf,
-					 size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-	unsigned int new_value;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-
-	if (sscanf(buf, "%u", &new_value) != 1)
-		return -EINVAL;
-	if (new_value < 0 || new_value > 1)
-		return -EINVAL;
-	instance_data->sensors[0].axis_align.rel_report_enabled = new_value;
-
-	return count;
-}
-
-static ssize_t f11_offset_show(struct device *dev,
-				     struct device_attribute *attr,
-				     char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d %d\n",
-			instance_data->sensors[0].axis_align.offset_X,
-			instance_data->sensors[0].axis_align.offset_Y);
-}
-
-static ssize_t f11_offset_store(struct device *dev,
-				      struct device_attribute *attr,
-				      const char *buf,
-				      size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-	int new_X, new_Y;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-
-	if (sscanf(buf, "%d %d", &new_X, &new_Y) != 2)
-		return -EINVAL;
-	instance_data->sensors[0].axis_align.offset_X = new_X;
-	instance_data->sensors[0].axis_align.offset_Y = new_Y;
-
-	return count;
-}
-
-static ssize_t f11_clip_show(struct device *dev,
-				   struct device_attribute *attr,
-				   char *buf)
-{
-
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u %u %u %u\n",
-			instance_data->sensors[0].axis_align.clip_X_low,
-			instance_data->sensors[0].axis_align.clip_X_high,
-			instance_data->sensors[0].axis_align.clip_Y_low,
-			instance_data->sensors[0].axis_align.clip_Y_high);
-}
-
-static ssize_t f11_clip_store(struct device *dev,
-				    struct device_attribute *attr,
-				    const char *buf,
-				    size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-	unsigned int new_X_low, new_X_high, new_Y_low, new_Y_high;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	if (sscanf(buf, "%u %u %u %u",
-		   &new_X_low, &new_X_high, &new_Y_low, &new_Y_high) != 4)
-		return -EINVAL;
-	if (new_X_low < 0 || new_X_low >= new_X_high || new_Y_low < 0
-	    || new_Y_low >= new_Y_high)
-		return -EINVAL;
-	instance_data->sensors[0].axis_align.clip_X_low = new_X_low;
-	instance_data->sensors[0].axis_align.clip_X_high = new_X_high;
-	instance_data->sensors[0].axis_align.clip_Y_low = new_Y_low;
-	instance_data->sensors[0].axis_align.clip_Y_high = new_Y_high;
-
-	/*
-	** for now, we assume this is sensor index 0
-	*/
-	f11_set_abs_params(fc, 0);
-
-	return count;
-}
-
-static ssize_t f11_rezero_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count)
-{
-	struct rmi_function_container *fc = NULL;
-	unsigned int rezero;
-	int retval = 0;
-	/* Command register always reads as 0, so we can just use a local. */
-	union f11_2d_commands commands = {};
-
-	fc = to_rmi_function_container(dev);
-
-	if (sscanf(buf, "%u", &rezero) != 1)
-		return -EINVAL;
-	if (rezero < 0 || rezero > 1)
-		return -EINVAL;
-
-	/* Per spec, 0 has no effect, so we skip it entirely. */
-	if (rezero) {
-		commands.rezero = 1;
-		retval = rmi_write_block(fc->rmi_dev, fc->fd.command_base_addr,
-				&commands.reg, sizeof(commands.reg));
-		if (retval < 0) {
-			dev_err(dev, "%s: failed to issue rezero command, error = %d.",
-				__func__, retval);
-			return retval;
-		}
-	}
-
-	return count;
-}
-
-#if RESUME_REZERO
-static ssize_t f11_rezeroOnResume_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count)
-{
-	struct rmi_function_container *fc = NULL;
-	unsigned int newValue;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	if (sscanf(buf, "%u", &newValue) != 1)
-		return -EINVAL;
-	if (newValue < 0 || newValue > 1) {
-		dev_err(dev, "rezeroOnResume must be either 1 or 0.\n");
-		return -EINVAL;
-	}
-
-	instance_data->rezero_on_resume = (newValue != 0);
-
-	return count;
-}
-
-static ssize_t f11_rezeroOnResume_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->rezero_on_resume);
-}
-
-static ssize_t f11_rezeroWait_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count)
-{
-	struct rmi_function_container *fc = NULL;
-	unsigned int newValue;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	if (sscanf(buf, "%u", &newValue) != 1)
-		return -EINVAL;
-	if (newValue < 0) {
-		dev_err(dev, "rezeroWait must be 0 or greater.\n");
-		return -EINVAL;
-	}
-
-	instance_data->rezero_wait_ms = (newValue != 0);
-
-	return count;
-}
-
-static ssize_t f11_rezeroWait_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f11_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->rezero_wait_ms);
-}
-#endif
-
-module_init(rmi_f11_module_init);
-module_exit(rmi_f11_module_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com");
-MODULE_DESCRIPTION("RMI F11 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_f17.c b/drivers/input/touchscreen/rmi4/rmi_f17.c
deleted file mode 100755
index 2b99e5c1ab6cf..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f17.c
+++ /dev/null
@@ -1,731 +0,0 @@
-/*
- * Copyright (c) 2012 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-#define QUERY_BASE_INDEX 1
-#define MAX_NAME_LENGTH 256
-
-union f17_device_query {
-	struct {
-		u8 number_of_sticks:3;
-	};
-	u8 regs[1];
-};
-
-#define F17_MANUFACTURER_SYNAPTICS 0
-#define F17_MANUFACTURER_NMB 1
-#define F17_MANUFACTURER_ALPS 2
-
-struct f17_stick_query {
-	union {
-		struct {
-			u8 manufacturer:4;
-			u8 resistive:1;
-			u8 ballistics:1;
-			u8 reserved1:2;
-			u8 has_relative:1;
-			u8 has_absolute:1;
-			u8 has_gestures:1;
-			u8 has_dribble:1;
-			u8 reserved2:4;
-		};
-		u8 regs[2];
-	} general;
-
-	union {
-		struct {
-			u8 has_single_tap:1;
-			u8 has_tap_and_hold:1;
-			u8 has_double_tap:1;
-			u8 has_early_tap:1;
-			u8 has_press:1;
-		};
-		u8 regs[1];
-	} gestures;
-};
-
-union f17_device_controls {
-	struct {
-		u8 reporting_mode:3;
-		u8 dribble:1;
-	};
-	u8 regs[1];
-};
-
-struct f17_stick_controls {
-	union {
-		struct {
-			u8 z_force_threshold;
-			u8 radial_force_threshold;
-		};
-		u8 regs[3];
-	} general;
-
-	union {
-		struct {
-			u8 motion_sensitivity:4;
-			u8 antijitter:1;
-		};
-		u8 regs[1];
-	} relative;
-
-	union {
-		struct {
-			u8 single_tap:1;
-			u8 tap_and_hold:1;
-
-			u8 double_tap:1;
-			u8 early_tap:1;
-			u8 press:1;
-		};
-		u8 regs[1];
-	} enable;
-
-	u8 maximum_tap_time;
-	u8 minimum_press_time;
-	u8 maximum_radial_force;
-};
-
-
-union f17_device_commands {
-	struct {
-		u8 rezero:1;
-	};
-	u8 regs[1];
-};
-
-struct f17_stick_data {
-	union {
-		struct {
-			u8 x_force_high;
-			u8 y_force_high;
-			u8 y_force_low:4;
-			u8 x_force_low:4;
-			u8 z_force;
-		};
-		u8 regs[4];
-	} abs;
-	union {
-		struct {
-			s8 x_delta;
-			s8 y_delta;
-		};
-		u8 regs[2];
-	} rel;
-	union {
-		struct {
-			u8 single_tap:1;
-			u8 tap_and_hold:1;
-			u8 double_tap:1;
-			u8 early_tap:1;
-			u8 press:1;
-		};
-		u8 regs[1];
-	} gestures;
-};
-
-
-/* data specific to f17 that needs to be kept around */
-
-struct rmi_f17_stick_data {
-	struct f17_stick_query query;
-	struct f17_stick_controls controls;
-	struct f17_stick_data data;
-
-	u16 abs_data_address;
-	u16 rel_data_address;
-	u16 gesture_data_address;
-	u16 control_address;
-
-	int index;
-
-	char input_name[MAX_NAME_LENGTH];
-	char input_phys[MAX_NAME_LENGTH];
-	struct input_dev *input;
-	char mouse_name[MAX_NAME_LENGTH];
-	char mouse_phys[MAX_NAME_LENGTH];
-	struct input_dev *mouse;
-};
-
-struct rmi_f17_device_data {
-	u16 control_address;
-
-	union f17_device_query query;
-	union f17_device_commands commands;
-	union f17_device_controls controls;
-
-	struct rmi_f17_stick_data *sticks;
-
-};
-
-static ssize_t f17_rezero_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf);
-static ssize_t f17_rezero_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count);
-
-
-
-static int f17_alloc_memory(struct rmi_function_container *fc);
-
-static void f17_free_memory(struct rmi_function_container *fc);
-
-static int f17_initialize(struct rmi_function_container *fc);
-
-static int f17_register_devices(struct rmi_function_container *fc);
-
-static int f17_create_sysfs(struct rmi_function_container *fc);
-
-static int f17_config(struct rmi_function_container *fc);
-
-static int f17_reset(struct rmi_function_container *fc);
-
-static struct device_attribute attrs[] = {
-	__ATTR(rezero, RMI_RW_ATTR,
-		f17_rezero_show, f17_rezero_store),
-};
-
-
-int f17_read_control_parameters(struct rmi_device *rmi_dev,
-	struct rmi_f17_device_data *f17)
-{
-	int retval = 0;
-
-	// TODO: read this or delete the function
-
-	return retval;
-}
-
-
-static int f17_init(struct rmi_function_container *fc)
-{
-	int retval;
-
-	retval = f17_alloc_memory(fc);
-	if (retval < 0)
-		goto err_free_data;
-
-	retval = f17_initialize(fc);
-	if (retval < 0)
-		goto err_free_data;
-
-	retval = f17_register_devices(fc);
-	if (retval < 0)
-		goto err_free_data;
-
-	retval = f17_create_sysfs(fc);
-	if (retval < 0)
-		goto err_free_data;
-
-	return 0;
-
-err_free_data:
-	f17_free_memory(fc);
-
-	return retval;
-}
-
-static int f17_alloc_memory(struct rmi_function_container *fc)
-{
-	struct rmi_f17_device_data *f17;
-	int retval;
-	int i;
-
-	f17 = kzalloc(sizeof(struct rmi_f17_device_data), GFP_KERNEL);
-	if (!f17) {
-		dev_err(&fc->dev, "Failed to allocate function data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f17;
-
-	retval = rmi_read_block(fc->rmi_dev, fc->fd.query_base_addr,
-				f17->query.regs, sizeof(f17->query.regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read query register.\n");
-		goto error_exit;
-	}
-	dev_info(&fc->dev, "Found F17 with %d sticks.\n",
-		 f17->query.number_of_sticks + 1);
-
-	f17->sticks = kcalloc(f17->query.number_of_sticks + 1,
-			sizeof(struct rmi_f17_stick_data), GFP_KERNEL);
-	if (!f17->sticks) {
-		dev_err(&fc->dev, "Failed to allocate per stick data.\n");
-		return -ENOMEM;
-	}
-
-	for (i = 0; i < f17->query.number_of_sticks + 1; i++) {
-		// TODO: allocate any per stick stuff (or remove this loop)
-	}
-
-	return 0;
-
-error_exit:
-	kfree(f17);
-	fc->data = NULL;
-	return retval;
-}
-
-static void f17_free_memory(struct rmi_function_container *fc)
-{
-	struct rmi_f17_device_data *f17 = fc->data;
-	int i;
-
-	if (f17) {
-		if (f17->sticks) {
-			for (i = 0; i < f17->query.number_of_sticks + 1; i++) {
-				// TODO: Free stick stuff
-			}
-		}
-		kfree(f17->sticks);
-		f17->sticks = NULL;
-	}
-	kfree(f17);
-	fc->data = NULL;
-}
-
-static int f17_init_stick(struct rmi_device *rmi_dev,
-			  struct rmi_f17_stick_data *stick,
-			  u16 *next_query_reg, u16 *next_data_reg,
-			  u16 *next_control_reg) {
-	int retval = 0;
-
-	retval = rmi_read_block(rmi_dev, *next_query_reg,
-		stick->query.general.regs,
-		sizeof(stick->query.general.regs));
-	if (retval < 0) {
-		dev_err(&rmi_dev->dev, "Failed to read stick general query.\n");
-		return retval;
-	}
-	*next_query_reg += sizeof(stick->query.general.regs);
-
-	dev_info(&rmi_dev->dev, "Stick %d found\n", stick->index);
-	dev_info(&rmi_dev->dev, "    Manufacturer: %d.\n", stick->query.general.manufacturer);
-	dev_info(&rmi_dev->dev, "    Resistive:    %d.\n", stick->query.general.resistive);
-	dev_info(&rmi_dev->dev, "    Ballistics:   %d.\n", stick->query.general.ballistics);
-	dev_info(&rmi_dev->dev, "    Manufacturer: %d.\n", stick->query.general.ballistics);
-	dev_info(&rmi_dev->dev, "    Has relative: %d.\n", stick->query.general.has_relative);
-	dev_info(&rmi_dev->dev, "    Has absolute: %d.\n", stick->query.general.has_absolute);
-	dev_info(&rmi_dev->dev, "    Had dribble:  %d.\n", stick->query.general.has_dribble);
-	dev_info(&rmi_dev->dev, "    Has gestures: %d.\n", stick->query.general.has_gestures);
-
-	if (stick->query.general.has_gestures) {
-		retval = rmi_read_block(rmi_dev, *next_query_reg,
-			stick->query.gestures.regs,
-			sizeof(stick->query.gestures.regs));
-		if (retval < 0) {
-			dev_err(&rmi_dev->dev, "Failed to read stick gestures query.\n");
-			return retval;
-		}
-		*next_query_reg += sizeof(stick->query.gestures.regs);
-		dev_info(&rmi_dev->dev, "        single tap: %d.\n", stick->query.gestures.has_single_tap);
-		dev_info(&rmi_dev->dev, "        tap & hold: %d.\n", stick->query.gestures.has_tap_and_hold);
-		dev_info(&rmi_dev->dev, "        double tap: %d.\n", stick->query.gestures.has_double_tap);
-		dev_info(&rmi_dev->dev, "        early tap:  %d.\n", stick->query.gestures.has_early_tap);
-		dev_info(&rmi_dev->dev, "        press:      %d.\n", stick->query.gestures.has_press);
-	}
-	if (stick->query.general.has_absolute) {
-		stick->abs_data_address = *next_data_reg;
-		*next_data_reg += sizeof(stick->data.abs.regs);
-	}
-	if (stick->query.general.has_relative) {
-		stick->rel_data_address = *next_data_reg;
-		*next_data_reg += sizeof(stick->data.rel.regs);
-	}
-	if (stick->query.general.has_gestures) {
-		stick->gesture_data_address = *next_data_reg;
-		*next_data_reg += sizeof(stick->data.gestures.regs);
-	}
-
-	return retval;
-}
-
-static int f17_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_f17_device_data *f17 = fc->data;
-	int i;
-	int retval;
-	u16 next_query_reg = fc->fd.query_base_addr;
-	u16 next_data_reg = fc->fd.data_base_addr;
-	u16 next_control_reg = fc->fd.control_base_addr;
-
-	dev_info(&fc->dev, "Intializing F17 values.");
-
-	retval = rmi_read_block(fc->rmi_dev, fc->fd.query_base_addr,
-				f17->query.regs, sizeof(f17->query.regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read query register.\n");
-		return retval;
-	}
-	dev_info(&fc->dev, "Found F17 with %d sticks.\n",
-		 f17->query.number_of_sticks + 1);
-	next_query_reg += sizeof(f17->query.regs);
-
-	retval = rmi_read_block(rmi_dev, fc->fd.command_base_addr,
-		f17->commands.regs, sizeof(f17->commands.regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to read command register.\n");
-		return retval;
-	}
-
-	f17->control_address = fc->fd.control_base_addr;
-	retval = f17_read_control_parameters(rmi_dev, f17);
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to initialize F17 control params.\n");
-		return retval;
-	}
-
-	for (i = 0; i < f17->query.number_of_sticks + 1; i++) {
-		f17->sticks[i].index = i;
-		retval = f17_init_stick(rmi_dev, &f17->sticks[i],
-					&next_query_reg, &next_data_reg,
-					&next_control_reg);
-		if (!retval) {
-			dev_err(&fc->dev, "Failed to init stick %d.\n", i);
-			return retval;
-		}
-	}
-
-	return retval;
-}
-
-static int f17_register_stick(struct rmi_function_container *fc,
-			      struct rmi_f17_stick_data *stick) {
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	int retval = 0;
-
-	if (stick->query.general.has_absolute) {
-		struct input_dev *input_dev;
-		input_dev = input_allocate_device();
-		if (!input_dev) {
-			dev_err(&rmi_dev->dev, "Failed to allocate stick device %d.\n",
-				stick->index);
-			return -ENOMEM;
-		}
-
-		snprintf(stick->input_name, sizeof(stick->input_name),
-			"RMI F%02x Stick %d", 0x17, stick->index);
-		snprintf(stick->input_phys, sizeof(stick->input_phys),
-			 "sensor00fn%02x/stick%d", 0x17, stick->index);
-		input_dev->name = stick->input_name;
-		input_dev->phys = stick->input_phys;
-		input_dev->dev.parent = &fc->dev;
-		input_set_drvdata(input_dev, stick);
-
-		retval = input_register_device(input_dev);
-		if (retval < 0) {
-			dev_err(&rmi_dev->dev, "Failed to register stick device %d.\n",
-				stick->index);
-			goto error_free_device;
-		}
-		stick->input = input_dev;
-	}
-
-	if (stick->query.general.has_relative) {
-		struct input_dev *input_dev_mouse;
-		/*create input device for mouse events  */
-		input_dev_mouse = input_allocate_device();
-		if (!input_dev_mouse) {
-			retval = -ENOMEM;
-			goto error_free_device;
-		}
-
-		snprintf(stick->mouse_name, sizeof(stick->mouse_name),
-			"RMI F%02x Mouse %d", 0x17, stick->index);
-		snprintf(stick->mouse_phys, sizeof(stick->mouse_name),
-			 "sensor00fn%02x/mouse%d", 0x17, stick->index);
-		input_dev_mouse->name = stick->mouse_name;
-		input_dev_mouse->phys = stick->mouse_phys;
-		input_dev_mouse->dev.parent = &fc->dev;
-
-		input_dev_mouse->id.vendor  = 0x18d1;
-		input_dev_mouse->id.product = 0x0210;
-		input_dev_mouse->id.version = 0x0100;
-
-		set_bit(EV_REL, input_dev_mouse->evbit);
-		set_bit(REL_X, input_dev_mouse->relbit);
-		set_bit(REL_Y, input_dev_mouse->relbit);
-
-		set_bit(BTN_MOUSE, input_dev_mouse->evbit);
-		/* Register device's buttons and keys */
-		set_bit(EV_KEY, input_dev_mouse->evbit);
-		set_bit(BTN_LEFT, input_dev_mouse->keybit);
-		set_bit(BTN_MIDDLE, input_dev_mouse->keybit);
-		set_bit(BTN_RIGHT, input_dev_mouse->keybit);
-
-		retval = input_register_device(input_dev_mouse);
-		if (retval < 0)
-			goto error_free_device;
-		stick->mouse = input_dev_mouse;
-	}
-
-	return 0;
-
-error_free_device:
-	if (stick->input) {
-		input_free_device(stick->input);
-		stick->input = NULL;
-	}
-	if (stick->mouse) {
-		input_free_device(stick->mouse);
-		stick->mouse = NULL;
-	}
-	return retval;
-}
-
-static int f17_register_devices(struct rmi_function_container *fc)
-{
-	struct rmi_f17_device_data *f17 = fc->data;
-	int i;
-	int retval = 0;
-
-	for (i = 0; i < f17->query.number_of_sticks + 1 && !retval; i++) {
-		retval = f17_register_stick(fc, &f17->sticks[i]);
-	}
-
-	return retval;
-}
-
-static int f17_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.\n");
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev,
-				"Failed to create sysfs file for %s.",
-				attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj, &attrs[attr_count].attr);
-	return rc;
-
-}
-
-static int f17_config(struct rmi_function_container *fc)
-{
-	struct rmi_f17_device_data *f17 = fc->data;
-	int retval;
-	int i;
-
-	retval = rmi_write_block(fc->rmi_dev, f17->control_address,
-		f17->controls.regs, sizeof(f17->controls.regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not write stick controls to 0x%04x\n",
-				f17->control_address);
-		return retval;
-	}
-
-#if 0
-	if (f17->query.has_relative) {
-		retval = rmi_write_block(fc->rmi_dev,
-			f17->relative_control_address,
-			f17->controls.relative.regs,
-			sizeof(f17->controls.relative.regs));
-		if (retval < 0) {
-			dev_err(&fc->dev, "Could not write stick controls to 0x%04x\n",
-					f17->control_address);
-			return retval;
-		}
-	}
-#endif
-
-	for (i = 0; i < f17->query.number_of_sticks + 1; i++) {
-		// TODO: Configure each styk
-	}
-
-	return retval;
-}
-
-static int f17_reset(struct rmi_function_container *fc)
-{
-	/* we do nothing here */
-	return 0;
-}
-
-static void f17_remove(struct rmi_function_container *fc)
-{
-	struct rmi_f17_device_data *f17 = fc->data;
-	int i = 0;
-
-	for (i = 0; i < ARRAY_SIZE(attrs); i++)
-		sysfs_remove_file(&fc->dev.kobj, &attrs[i].attr);
-
-	for (i = 0; i < f17->query.number_of_sticks + 1; i++) {
-		input_unregister_device(f17->sticks[i].input);
-	}
-
-	f17_free_memory(fc);
-}
-
-static int f17_process_stick(struct rmi_device *rmi_dev,
-			     struct rmi_f17_stick_data *stick) {
-	int retval = 0;
-
-	if (stick->query.general.has_absolute) {
-		retval = rmi_read_block(rmi_dev, stick->abs_data_address,
-			stick->data.abs.regs, sizeof(stick->data.abs.regs));
-		if (retval < 0) {
-			dev_err(&rmi_dev->dev, "Failed to read abs data for stick %d.\n",
-				stick->index);
-			goto error_exit;
-		}
-	}
-	if (stick->query.general.has_relative) {
-		retval = rmi_read_block(rmi_dev, stick->rel_data_address,
-			stick->data.rel.regs, sizeof(stick->data.rel.regs));
-		if (retval < 0) {
-			dev_err(&rmi_dev->dev, "Failed to read rel data for stick %d.\n",
-				stick->index);
-			goto error_exit;
-		}
-		dev_info(&rmi_dev->dev, "Reporting dX: %d, dy: %d\n", stick->data.rel.x_delta, stick->data.rel.y_delta);
-		input_report_rel(stick->mouse, REL_X, stick->data.rel.x_delta);
-		input_report_rel(stick->mouse, REL_Y, stick->data.rel.y_delta);
-	}
-	if (stick->query.general.has_gestures) {
-		retval = rmi_read_block(rmi_dev, stick->gesture_data_address,
-			stick->data.gestures.regs, sizeof(stick->data.gestures.regs));
-		if (retval < 0) {
-			dev_err(&rmi_dev->dev, "Failed to read gesture data for stick %d.\n",
-				stick->index);
-			goto error_exit;
-		}
-	}
-	retval = 0;
-
-error_exit:
-	if (stick->input)
-		input_sync(stick->input);
-	if (stick->mouse)
-		input_sync(stick->mouse);
-	return retval;
-}
-
-static int f17_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_f17_device_data *f17 = fc->data;
-	int i;
-	int retval = 0;
-
-	for (i = 0; i < f17->query.number_of_sticks + 1 && !retval; i++) {
-		retval = f17_process_stick(rmi_dev, &f17->sticks[i]);
-	}
-
-	return retval;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x17,
-	.init = f17_init,
-	.config = f17_config,
-	.reset = f17_reset,
-	.attention = f17_attention,
-	.remove = f17_remove
-};
-
-static int __init f17_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void f17_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-
-static ssize_t f17_rezero_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_f17_device_data *f17;
-
-	fc = to_rmi_function_container(dev);
-	f17 = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			f17->commands.rezero);
-
-}
-
-static ssize_t f17_rezero_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf,
-					 size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_f17_device_data *data;
-	unsigned int new_value;
-	int len;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	len = sscanf(buf, "%u", &new_value);
-	if (new_value != 0 && new_value != 1) {
-		dev_err(dev,
-			"%s: Error - rezero is not a valid value 0x%x.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	data->commands.rezero = new_value;
-	len = rmi_write(fc->rmi_dev, fc->fd.command_base_addr,
-		data->commands.rezero);
-
-	if (len < 0) {
-		dev_err(dev, "%s : Could not write rezero to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return -EINVAL;
-	}
-	return count;
-}
-
-
-module_init(f17_module_init);
-module_exit(f17_module_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com>");
-MODULE_DESCRIPTION("RMI F17 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f19.c b/drivers/input/touchscreen/rmi4/rmi_f19.c
deleted file mode 100755
index 37b341957885c..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f19.c
+++ /dev/null
@@ -1,1505 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-#define QUERY_BASE_INDEX 1
-#define MAX_LEN 256
-#define MAX_BUFFER_LEN 80
-
-#define SENSOR_MAP_MIN			0
-#define SENSOR_MAP_MAX			127
-#define SENSITIVITY_ADJ_MIN		0
-#define SENSITIVITY_ADJ_MAX		31
-#define HYSTERESIS_THRESHOLD_MIN	0
-#define HYSTERESIS_THRESHOLD_MAX	15
-
-union f19_0d_query {
-	struct {
-		u8 configurable:1;
-		u8 has_sensitivity_adjust:1;
-		u8 has_hysteresis_threshold:1;
-		u8 reserved_1:5;
-
-		u8 button_count:5;
-		u8 reserved_2:3;
-	};
-	u8 regs[2];
-};
-
-union f19_0d_control_0 {
-	struct {
-		u8 button_usage:2;
-		u8 filter_mode:2;
-	};
-	u8 regs[1];
-};
-
-struct f19_0d_control_3 {
-	u8 sensor_map_button:7;
-	/*u8 sensitivity_button;*/
-};
-
-struct f19_0d_control_5 {
-	u8 sensitivity_adj:5;
-};
-
-struct f19_0d_control_6 {
-	u8 hysteresis_threshold:4;
-};
-
-struct f19_0d_control {
-	union f19_0d_control_0 general_control;
-	u8 *int_enabled_button;
-	u8 *single_button;
-	struct f19_0d_control_3 *sensor_map;
-	struct f19_0d_control_5 all_button_sensitivity_adj;
-	struct f19_0d_control_6 all_button_hysteresis_threshold;
-};
-/* data specific to fn $19 that needs to be kept around */
-struct f19_data {
-	struct f19_0d_control button_control;
-	union f19_0d_query button_query;
-	u8 button_rezero;
-	unsigned char button_count;
-	unsigned char button_bitmask_size;
-	unsigned char *button_data_buffer;
-	unsigned short *button_map;
-	char input_name[MAX_LEN];
-	char input_phys[MAX_LEN];
-	struct input_dev *input;
-	int general_control_address;
-	int int_enable_button_address;
-	int single_button_address;
-	int sensor_map_address;
-	int all_button_sensitivity_address;
-	int all_button_threshold_address;
-};
-
-static ssize_t rmi_f19_button_count_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_button_map_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f19_button_map_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_rezero_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_rezero_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_has_hysteresis_threshold_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f19_has_sensitivity_adjust_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f19_configurable_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f19_filter_mode_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_filter_mode_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_button_usage_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_button_usage_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_interrupt_enable_button_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_interrupt_enable_button_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_single_button_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_single_button_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_sensor_map_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_sensor_map_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_sensitivity_adjust_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_sensitivity_adjust_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f19_hysteresis_threshold_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f19_hysteresis_threshold_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-
-
-
-static int rmi_f19_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f19_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f19_initialize(struct rmi_function_container *fc);
-
-static int rmi_f19_register_device(struct rmi_function_container *fc);
-
-static int rmi_f19_create_sysfs(struct rmi_function_container *fc);
-
-static int rmi_f19_config(struct rmi_function_container *fc);
-
-static int rmi_f19_reset(struct rmi_function_container *fc);
-
-static struct device_attribute attrs[] = {
-	__ATTR(button_count, RMI_RO_ATTR,
-		rmi_f19_button_count_show, rmi_store_error),
-	__ATTR(button_map, RMI_RW_ATTR,
-		rmi_f19_button_map_show, rmi_f19_button_map_store),
-	__ATTR(rezero, RMI_RW_ATTR,
-		rmi_f19_rezero_show, rmi_f19_rezero_store),
-	__ATTR(has_hysteresis_threshold, RMI_RO_ATTR,
-		rmi_f19_has_hysteresis_threshold_show, rmi_store_error),
-	__ATTR(has_sensitivity_adjust, RMI_RO_ATTR,
-		rmi_f19_has_sensitivity_adjust_show, rmi_store_error),
-	__ATTR(configurable, RMI_RO_ATTR,
-		rmi_f19_configurable_show, rmi_store_error),
-	__ATTR(filter_mode, RMI_RW_ATTR,
-		rmi_f19_filter_mode_show, rmi_f19_filter_mode_store),
-	__ATTR(button_usage, RMI_RW_ATTR,
-		rmi_f19_button_usage_show, rmi_f19_button_usage_store),
-	__ATTR(interrupt_enable_button, RMI_RW_ATTR,
-		rmi_f19_interrupt_enable_button_show,
-		rmi_f19_interrupt_enable_button_store),
-	__ATTR(single_button, RMI_RW_ATTR,
-		rmi_f19_single_button_show, rmi_f19_single_button_store),
-	__ATTR(sensor_map, RMI_RW_ATTR,
-		rmi_f19_sensor_map_show, rmi_f19_sensor_map_store),
-	__ATTR(sensitivity_adjust, RMI_RW_ATTR,
-		rmi_f19_sensitivity_adjust_show,
-		rmi_f19_sensitivity_adjust_store),
-	__ATTR(hysteresis_threshold, RMI_RW_ATTR,
-		rmi_f19_hysteresis_threshold_show,
-		rmi_f19_hysteresis_threshold_store)
-};
-
-
-int rmi_f19_read_control_parameters(struct rmi_device *rmi_dev,
-	struct f19_data *f19)
-{
-	int error = 0;
-	struct f19_0d_control *button_control = &f19->button_control;
-	union f19_0d_query *button_query = &f19->button_query;
-
-	int ctrl_base_addr = f19->general_control_address;
-
-	error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			(u8 *)&button_control->general_control,
-			sizeof(union f19_0d_control_0));
-	if (error < 0) {
-		dev_err(&rmi_dev->dev,
-			"Failed to read f19_0d_control_0, code:"
-			" %d.\n", error);
-		return error;
-	}
-	ctrl_base_addr = ctrl_base_addr +
-			sizeof(union f19_0d_control_0);
-
-	f19->int_enable_button_address = ctrl_base_addr;
-	if (button_control->int_enabled_button) {
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			button_control->int_enabled_button,
-			f19->button_bitmask_size);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f19_0d_control_2,"
-				" code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + f19->button_bitmask_size;
-	}
-
-	if (button_control->single_button) {
-		f19->single_button_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				button_control->single_button,
-				f19->button_bitmask_size);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f19_0d_control_2,"
-				" code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + f19->button_bitmask_size;
-	}
-
-	if (button_control->sensor_map) {
-		f19->sensor_map_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			(u8 *)(button_control->sensor_map),
-			sizeof(struct f19_0d_control_3)*f19->button_count);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-			"Failed to read f19_0d_control_3,"
-			" code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-			(sizeof(struct f19_0d_control_3)*f19->button_count);
-		ctrl_base_addr += (sizeof(u8)*f19->button_count);
-	}
-
-	if (button_query->has_sensitivity_adjust) {
-		f19->all_button_sensitivity_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				(u8 *)&button_control->
-					all_button_sensitivity_adj,
-				sizeof(struct f19_0d_control_5));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f19_0d_control_5,"
-				" code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-			sizeof(struct f19_0d_control_5);
-	}
-	if (button_query->has_hysteresis_threshold) {
-		f19->all_button_threshold_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				(u8 *)&button_control->
-					all_button_hysteresis_threshold,
-				sizeof(struct f19_0d_control_6));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f19_0d_control_6,"
-				" code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-			sizeof(struct f19_0d_control_6);
-	}
-	return 0;
-}
-
-
-static int rmi_f19_init(struct rmi_function_container *fc)
-{
-	int rc;
-
-	rc = rmi_f19_alloc_memory(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f19_initialize(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f19_register_device(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f19_create_sysfs(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	return 0;
-
-err_free_data:
-	rmi_f19_free_memory(fc);
-
-	return rc;
-}
-
-
-static int rmi_f19_alloc_memory(struct rmi_function_container *fc)
-{
-	struct f19_data *f19;
-	int rc;
-
-	f19 = kzalloc(sizeof(struct f19_data), GFP_KERNEL);
-	if (!f19) {
-		dev_err(&fc->dev, "Failed to allocate function data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f19;
-
-	rc = rmi_read_block(fc->rmi_dev,
-						fc->fd.query_base_addr,
-						(u8 *)&f19->button_query,
-						sizeof(union f19_0d_query));
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to read query register.\n");
-		return rc;
-	}
-
-	f19->button_count = f19->button_query.button_count;
-	f19->button_bitmask_size = sizeof(u8)*(f19->button_count + 7) / 8;
-	f19->button_data_buffer =
-	    kcalloc(f19->button_bitmask_size,
-		    sizeof(unsigned char), GFP_KERNEL);
-	if (!f19->button_data_buffer) {
-		dev_err(&fc->dev, "Failed to allocate button data buffer.\n");
-		return -ENOMEM;
-	}
-
-	f19->button_map = kcalloc(f19->button_count,
-				sizeof(unsigned short), GFP_KERNEL);
-	if (!f19->button_map) {
-		dev_err(&fc->dev, "Failed to allocate button map.\n");
-		return -ENOMEM;
-	}
-
-	f19->button_control.int_enabled_button =
-		kzalloc(f19->button_bitmask_size, GFP_KERNEL);
-	if (!f19->button_control.int_enabled_button) {
-		dev_err(&fc->dev, "Failed to allocate interrupt button.\n");
-		return -ENOMEM;
-	}
-
-	f19->button_control.single_button =
-		kzalloc(f19->button_bitmask_size, GFP_KERNEL);
-	if (!f19->button_control.single_button) {
-		dev_err(&fc->dev, "Failed to allocate"
-			" single button.\n");
-		return -ENOMEM;
-	}
-
-	f19->button_control.sensor_map = kzalloc(f19->button_count *
-				sizeof(struct f19_0d_control_3), GFP_KERNEL);
-	if (!f19->button_control.sensor_map) {
-		dev_err(&fc->dev, "Failed to allocate"
-			" f19_0d_control_3.\n");
-		return -ENOMEM;
-	}
-
-	return 0;
-}
-
-
-
-static void rmi_f19_free_memory(struct rmi_function_container *fc)
-{
-	struct f19_data *f19 = fc->data;
-
-	if (f19) {
-		kfree(f19->button_data_buffer);
-		kfree(f19->button_map);
-		kfree(f19->button_control.int_enabled_button);
-		kfree(f19->button_control.single_button);
-		kfree(f19->button_control.sensor_map);
-		kfree(f19);
-		fc->data = NULL;
-	}
-}
-
-
-static int rmi_f19_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_device_platform_data *pdata;
-	struct f19_data *f19 = fc->data;
-	int i;
-	int rc;
-
-	dev_info(&fc->dev, "Intializing F19 values.");
-
-	/* initial all default values for f19 data here */
-	rc = rmi_read(rmi_dev, fc->fd.command_base_addr,
-		(u8 *)&f19->button_rezero);
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to read command register.\n");
-		return rc;
-	}
-	f19->button_rezero = f19->button_rezero & 1;
-
-	pdata = to_rmi_platform_data(rmi_dev);
-	if (pdata) {
-		if (!pdata->button_map) {
-			dev_warn(&fc->dev, "%s - button_map is NULL", __func__);
-		} else if (pdata->button_map->nbuttons != f19->button_count) {
-			dev_warn(&fc->dev,
-				"Platformdata button map size (%d) != number "
-				"of buttons on device (%d) - ignored.\n",
-				pdata->button_map->nbuttons,
-				f19->button_count);
-		} else if (!pdata->button_map->map) {
-			dev_warn(&fc->dev,
-				 "Platformdata button map is missing!\n");
-		} else {
-			for (i = 0; i < pdata->button_map->nbuttons; i++)
-				f19->button_map[i] = pdata->button_map->map[i];
-		}
-	}
-
-	f19->general_control_address = fc->fd.control_base_addr;
-	rc = rmi_f19_read_control_parameters(rmi_dev, f19);
-	if (rc < 0) {
-		dev_err(&fc->dev,
-			"Failed to initialize F19 control params.\n");
-		return rc;
-	}
-
-	return 0;
-}
-
-
-
-static int rmi_f19_register_device(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct input_dev *input_dev;
-	struct f19_data *f19 = fc->data;
-	int i;
-	int rc;
-
-	input_dev = input_allocate_device();
-	if (!input_dev) {
-		dev_err(&fc->dev, "Failed to allocate input device.\n");
-		return -ENOMEM;
-	}
-
-	f19->input = input_dev;
-	snprintf(f19->input_name, MAX_LEN, "%sfn%02x", dev_name(&rmi_dev->dev),
-		fc->fd.function_number);
-	input_dev->name = f19->input_name;
-	snprintf(f19->input_phys, MAX_LEN, "%s/input0", input_dev->name);
-	input_dev->phys = f19->input_phys;
-	input_dev->dev.parent = &rmi_dev->dev;
-	input_set_drvdata(input_dev, f19);
-
-	/* Set up any input events. */
-	set_bit(EV_SYN, input_dev->evbit);
-	set_bit(EV_KEY, input_dev->evbit);
-	/* set bits for each button... */
-	for (i = 0; i < f19->button_count; i++)
-		set_bit(f19->button_map[i], input_dev->keybit);
-	rc = input_register_device(input_dev);
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to register input device.\n");
-		goto error_free_device;
-	}
-
-	return 0;
-
-error_free_device:
-	input_free_device(input_dev);
-
-	return rc;
-}
-
-
-static int rmi_f19_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-	char *name;
-	struct f19_data *data;
-	union f19_0d_query *button_query;
-
-	data = fc->data;
-	button_query = &data->button_query;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.\n");
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		name = (char *) attrs[attr_count].attr.name;
-		if (!button_query->has_sensitivity_adjust &&
-			!strcmp(name, "sensitivity_adjust"))
-			continue;
-		if (!button_query->has_hysteresis_threshold &&
-			!strcmp(name, "hysteresis_threshold"))
-			continue;
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev,
-				"Failed to create sysfs file for %s.",
-				attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-						  &attrs[attr_count].attr);
-	return rc;
-
-}
-
-
-
-static int rmi_f19_config(struct rmi_function_container *fc)
-{
-	struct f19_data *data;
-	int retval;
-	union f19_0d_query *button_query;
-
-	data = fc->data;
-	button_query = &data->button_query;
-	retval = rmi_write_block(fc->rmi_dev, data->general_control_address,
-		(u8 *)&data->button_control.general_control,
-			sizeof(union f19_0d_control_0));
-	if (retval < 0) {
-		dev_err(&fc->dev, "%s : Could not write general_control to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return retval;
-	}
-
-	retval = rmi_write_block(fc->rmi_dev, data->int_enable_button_address,
-		data->button_control.int_enabled_button,
-		data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(&fc->dev, "%s : Could not write interrupt_enable_store"
-			" to 0x%x\n", __func__,
-				data->int_enable_button_address);
-		return retval;
-	}
-
-	retval = rmi_write_block(fc->rmi_dev, data->single_button_address,
-		data->button_control.single_button,
-		data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(&fc->dev,
-				"%s : Could not write interrupt_enable_store to"
-				" 0x%x\n", __func__,
-				data->single_button_address);
-		return -EINVAL;
-	}
-
-	retval = rmi_write_block(fc->rmi_dev,  data->sensor_map_address,
-		(u8 *)data->button_control.sensor_map,
-			sizeof(struct f19_0d_control_3)*data->button_count);
-	if (retval < 0) {
-		dev_err(&fc->dev, "%s : Could not sensor_map_store to 0x%x\n",
-				__func__, data->sensor_map_address);
-		return -EINVAL;
-	}
-	if (button_query->has_sensitivity_adjust) {
-		retval = rmi_write_block(fc->rmi_dev,
-			data->all_button_sensitivity_address,
-			(u8 *)&data->button_control.all_button_sensitivity_adj,
-			sizeof(struct f19_0d_control_5));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not sensitivity_adjust_store to"
-				" 0x%x\n", __func__,
-				data->all_button_sensitivity_address);
-			return retval;
-		}
-	}
-	if (!button_query->has_hysteresis_threshold) {
-		retval = rmi_write_block(fc->rmi_dev,
-			data->all_button_threshold_address,
-			(u8 *)&data->button_control.
-				all_button_hysteresis_threshold,
-			sizeof(struct f19_0d_control_6));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write all_button hysteresis "
-				"threshold to 0x%x\n", __func__,
-				data->all_button_threshold_address);
-			return -EINVAL;
-		}
-	}
-	return 0;
-}
-
-
-static int rmi_f19_reset(struct rmi_function_container *fc)
-{
-	/* we do nnothing here */
-	return 0;
-}
-
-
-static void rmi_f19_remove(struct rmi_function_container *fc)
-{
-	struct f19_data *f19 = fc->data;
-	int attr_count = 0;
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-
-	input_unregister_device(f19->input);
-
-	rmi_f19_free_memory(fc);
-}
-
-int rmi_f19_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f19_data *f19 = fc->data;
-	int data_base_addr = fc->fd.data_base_addr;
-	int error;
-	int button;
-
-	/* Read the button data. */
-
-	error = rmi_read_block(rmi_dev, data_base_addr, f19->button_data_buffer,
-			f19->button_bitmask_size);
-	if (error < 0) {
-		dev_err(&fc->dev, "%s: Failed to read button data registers.\n",
-			__func__);
-		return error;
-	}
-
-	/* Generate events for buttons that change state. */
-	for (button = 0; button < f19->button_count;
-	     button++) {
-		int button_reg;
-		int button_shift;
-		bool button_status;
-
-		/* determine which data byte the button status is in */
-		button_reg = button / 8;
-		/* bit shift to get button's status */
-		button_shift = button % 8;
-		button_status =
-		    ((f19->button_data_buffer[button_reg] >> button_shift)
-			& 0x01) != 0;
-
-		/* if the button state changed from the last time report it
-		 * and store the new state */
-			/* Generate an event here. */
-		input_report_key(f19->input, f19->button_map[button],
-				 button_status);
-	}
-
-	input_sync(f19->input); /* sync after groups of events */
-	return 0;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x19,
-	.init = rmi_f19_init,
-	.config = rmi_f19_config,
-	.reset = rmi_f19_reset,
-	.attention = rmi_f19_attention,
-	.remove = rmi_f19_remove
-};
-
-static int __init rmi_f19_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void rmi_f19_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-static ssize_t rmi_f19_filter_mode_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_control.general_control.filter_mode);
-
-}
-
-static ssize_t rmi_f19_filter_mode_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	unsigned int new_value;
-	unsigned int old_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) < 1) {
-		dev_err(dev,
-			"%s: Error - filter_mode_store has an invalid len.\n",
-			__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < 0 || new_value > 4) {
-		dev_err(dev, "%s: Error - filter_mode_store has an invalid value %d.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.general_control.filter_mode;
-	data->button_control.general_control.filter_mode = new_value;
-	result = rmi_write_block(fc->rmi_dev, data->general_control_address,
-		(u8 *)&(data->button_control.general_control),
-			sizeof(union f19_0d_control_0));
-	if (result < 0) {
-		data->button_control.general_control.filter_mode = old_value;
-		dev_err(dev, "%s : Could not write filter_mode_store to 0x%x\n",
-			__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_f19_button_usage_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_control.general_control.button_usage);
-
-}
-
-static ssize_t rmi_f19_button_usage_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	unsigned int new_value;
-	unsigned int old_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) < 1) {
-		dev_err(dev,
-			"%s: Error - button_usage_store has an invalid len.\n",
-			__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < 0 || new_value > 4) {
-		dev_err(dev, "%s: Error - button_usage_store has an invalid value %d.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.general_control.button_usage;
-	data->button_control.general_control.button_usage = new_value;
-	result = rmi_write_block(fc->rmi_dev, data->general_control_address,
-		(u8 *)&(data->button_control.general_control),
-			sizeof(union f19_0d_control_0));
-	if (result < 0) {
-		data->button_control.general_control.button_usage = old_value;
-		dev_err(dev, "%s : Could not write button_usage_store to 0x%x\n",
-			__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_f19_interrupt_enable_button_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		int button_reg;
-		int button_shift;
-		int interrupt_button;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		interrupt_button =
-			((data->button_control.int_enabled_button[button_reg]
-				>> button_shift) & 0x01);
-
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", interrupt_button);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build interrupt button buffer, code = %d.\n",
-				__func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n", __func__);
-	return total_len;
-
-}
-
-static ssize_t rmi_f19_interrupt_enable_button_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i;
-	int button_count = 0;
-	int retval = count;
-	int button_reg = 0;
-	u8 *new_value;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_bitmask_size, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate button interrupt enable.\n", __func__);
-		return -ENOMEM;
-	}
-	for (i = 0; i < data->button_count && *buf != 0;
-	     i++, buf += 2) {
-		int button_shift;
-		int button;
-		int result;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%u", &button);
-
-		if ((result != 1) || (button != 0 && button != 1)) {
-			dev_err(dev,
-				"%s: Error-int enable button for button %d is not a valid value 0x%x.\n",
-				__func__, i, button);
-			return -EINVAL;
-		}
-
-		if (button)
-			new_value[button_reg] |= (1 << button_shift);
-
-		button_count++;
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-			"%s: Error-int enable button count of %d doesn't match device button count of %d.\n",
-			 __func__, button_count, data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->int_enable_button_address,
-			new_value,
-			data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not write interrupt_enable_store to 0x%x\n", __func__,
-			data->int_enable_button_address);
-		kfree(new_value);
-		return retval;
-	}
-	memcpy(data->button_control.int_enabled_button,
-		new_value, data->button_bitmask_size);
-
-	kfree(new_value);
-
-	return count;
-}
-
-static ssize_t rmi_f19_single_button_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		int button_reg;
-		int button_shift;
-		int single_button;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		single_button =
-			((data->button_control.single_button[button_reg]
-				>> button_shift) & 0x01);
-
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", single_button);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build signle button buffer, code = %d.\n",
-				__func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n", __func__);
-
-	return total_len;
-
-}
-
-static ssize_t rmi_f19_single_button_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i;
-	int button_count = 0;
-	int retval = count;
-	int button_reg = 0;
-	u8 *new_value;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_bitmask_size, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate button interrupt enable.\n", __func__);
-		return -ENOMEM;
-	}
-	for (i = 0; i < data->button_count && *buf != 0;
-	     i++, buf += 2) {
-		int button_shift;
-		int button;
-		int result;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%u", &button);
-
-		if ((result != 1) || (button != 0 && button != 1)) {
-			dev_err(dev,
-				"%s: Error - single button for button %d is not a valid value 0x%x.\n",
-				__func__, i, button);
-			kfree(new_value);
-			return -EINVAL;
-		}
-
-		if (button) {
-			new_value[button_reg] |=
-				(1 << button_shift);
-		}
-		button_count++;
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-			"%s:Error-single button count of %d doesn't match device button count of %d\n",
-			__func__, button_count, data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->single_button_address,
-			new_value,
-			data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not write interrupt_enable_store to 0x%x\n",
-			__func__, data->single_button_address);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	memcpy(data->button_control.single_button,
-		new_value, data->button_bitmask_size);
-
-	kfree(new_value);
-	return count;
-}
-
-static ssize_t rmi_f19_sensor_map_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	for (i = 0; i < data->button_count; i++) {
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", data->button_control.sensor_map[i].
-			sensor_map_button);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build sensor map buffer, code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n", __func__);
-	return total_len;
-
-
-}
-
-static ssize_t rmi_f19_sensor_map_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i;
-	int retval = count;
-	int button_count = 0;
-	u8 *new_value;
-	char *tail;
-	char *p = (char *) buf;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_count, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate sensor map.\n", __func__);
-		return -ENOMEM;
-	}
-
-	if (data->button_query.configurable == 0) {
-		dev_err(dev, "%s: Error - sensor map is not configuralbe at run-time", __func__);
-		return -EINVAL;
-	}
-
-	for (i = 0; i < data->button_count && *p != 0; i++) {
-		new_value[i] = simple_strtoul(p, &tail, 10);
-		if (new_value[i] == 0  && p[0] != '0') {
-			dev_err(dev, "%s: Error - reading sensor map is invalid\n", __func__);
-			return -EINVAL;
-		}
-		if (new_value[i] > INT_MAX) {
-			dev_err(dev, "%s: Error - reading sensor map is out for range\n", __func__);
-			return -ERANGE;
-		}
-		p = tail;
-		/* Make sure the key is a valid key */
-		if (new_value[i] < SENSOR_MAP_MIN ||
-			new_value[i] > SENSOR_MAP_MAX) {
-			dev_err(dev,
-				"%s: Error - sensor map for button %d is not a valid value 0x%x.\n",
-				__func__, i, new_value[i]);
-			return -EINVAL;
-		}
-		button_count++;
-		while (p[0] == ' ')
-			p++;
-	}
-
-	if (button_count != data->button_count) {
-		dev_err(dev,
-			"%s: Error - button map count of %d doesn't match device button count of %d.\n", 				__func__, button_count, data->button_count);
-		return -EINVAL;
-	}
-
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->sensor_map_address,
-			new_value,
-			sizeof(struct f19_0d_control_3)*button_count);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not sensor_map_store to 0x%x\n",
-				__func__,  data->sensor_map_address);
-		return -EINVAL;
-	}
-	memcpy(data->button_control.sensor_map, new_value, data->button_count);
-	kfree(new_value);
-	return count;
-}
-
-static ssize_t rmi_f19_sensitivity_adjust_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->button_control.
-		all_button_sensitivity_adj.sensitivity_adj);
-
-}
-
-static ssize_t rmi_f19_sensitivity_adjust_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	unsigned int old_value;
-	unsigned int new_value;
-	int len;
-	struct f19_0d_control_5 *all_button_sensitivity_adj;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	all_button_sensitivity_adj =
-			 &data->button_control.all_button_sensitivity_adj;
-
-	if (data->button_query.configurable == 0) {
-		dev_err(dev,
-			"%s: Error - sensitivity_adjust is not configuralbe at run-time", __func__);
-		return -EINVAL;
-	}
-
-	len = sscanf(buf, "%u", &new_value);
-	if (len < 1 || new_value < SENSITIVITY_ADJ_MIN ||
-		new_value > SENSITIVITY_ADJ_MAX)
-		return -EINVAL;
-	old_value = all_button_sensitivity_adj->sensitivity_adj;
-	all_button_sensitivity_adj->sensitivity_adj = new_value;
-	/* write back to the control register */
-	len = rmi_write_block(fc->rmi_dev, data->all_button_sensitivity_address,
-		(u8 *)all_button_sensitivity_adj,
-			sizeof(struct f19_0d_control_5));
-	if (len < 0) {
-		all_button_sensitivity_adj->sensitivity_adj = old_value;
-		dev_err(dev, "%s : Could not sensitivity_adjust_store to 0x%x\n", __func__,
-			data->all_button_sensitivity_address);
-		return len;
-	}
-
-	return len;
-}
-
-static ssize_t rmi_f19_hysteresis_threshold_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->button_control.
-		all_button_hysteresis_threshold.hysteresis_threshold);
-
-}
-static ssize_t rmi_f19_hysteresis_threshold_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	unsigned int new_value;
-	unsigned int old_value;
-	int len;
-	struct f19_0d_control_6 *all_button_hysteresis_threshold;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	all_button_hysteresis_threshold =
-		&data->button_control.all_button_hysteresis_threshold;
-	len = sscanf(buf, "%u", &new_value);
-	if (new_value < HYSTERESIS_THRESHOLD_MIN ||
-		new_value > HYSTERESIS_THRESHOLD_MAX) {
-		dev_err(dev, "%s: Error - hysteresis_threshold_store has an invalid value %d.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = all_button_hysteresis_threshold->hysteresis_threshold;
-	all_button_hysteresis_threshold->hysteresis_threshold = new_value;
-	/* write back to the control register */
-	len = rmi_write_block(fc->rmi_dev, data->all_button_threshold_address,
-		(u8 *)all_button_hysteresis_threshold,
-			sizeof(struct f19_0d_control_6));
-	if (len < 0) {
-		all_button_hysteresis_threshold->hysteresis_threshold =
-								old_value;
-		dev_err(dev, "%s : Could not write all_button hysteresis threshold to 0x%x.\n", __func__,
-			data->all_button_threshold_address);
-		return -EINVAL;
-	}
-	return count;
-}
-
-static ssize_t rmi_f19_has_hysteresis_threshold_show(struct device *dev,
-				      struct device_attribute *attr, char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_hysteresis_threshold);
-}
-
-static ssize_t rmi_f19_has_sensitivity_adjust_show(struct device *dev,
-				      struct device_attribute *attr, char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_sensitivity_adjust);
-}
-
-static ssize_t rmi_f19_configurable_show(struct device *dev,
-				      struct device_attribute *attr, char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.configurable);
-}
-
-static ssize_t rmi_f19_rezero_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_rezero);
-
-}
-
-static ssize_t rmi_f19_rezero_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf,
-					 size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	unsigned int new_value;
-	int len;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	len = sscanf(buf, "%u", &new_value);
-	if (new_value != 0 && new_value != 1) {
-		dev_err(dev, "%s: Error - rezero is not a valid value 0x%x.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	data->button_rezero = new_value & 1;
-	len = rmi_write(fc->rmi_dev, fc->fd.command_base_addr,
-		data->button_rezero);
-
-	if (len < 0) {
-		dev_err(dev, "%s : Could not write rezero to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return -EINVAL;
-	}
-	return count;
-}
-
-static ssize_t rmi_f19_button_count_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_count);
-}
-
-static ssize_t rmi_f19_button_map_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", data->button_map[i]);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build button map buffer, code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-}
-
-static ssize_t rmi_f19_button_map_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf,
-				size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f19_data *data;
-	int i;
-	int retval = count;
-	int button_count = 0;
-	unsigned short *temp_button_map;
-	char *p = (char *) buf;
-	char *tail;
-
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	temp_button_map = kcalloc(data->button_count,
-				sizeof(unsigned short), GFP_KERNEL);
-
-	if (!temp_button_map) {
-		dev_err(dev, "%s: Error - failed to allocate button map.\n", __func__);
-		return -ENOMEM;
-	}
-	/* Do validation on the button map data passed in.  Store button
-	 * mappings into a temp buffer and then verify button count and
-	 * data prior to clearing out old button mappings and storing the
-	 * new ones. */
-	for (i = 0; i < data->button_count && *p != 0; i++) {
-		temp_button_map[i] = simple_strtoul(p, &tail, 10);
-		if (temp_button_map[i] == 0  && p[0] != '0') {
-			dev_err(dev, "%s: Error - reading button map is invalid\n", __func__);
-			retval = -EINVAL;
-			goto err_ret;
-		}
-		if (temp_button_map[i] > INT_MAX) {
-			dev_err(dev, "%s: Error - reading button map is out for range\n", __func__);
-			retval = -ERANGE;
-			goto err_ret;
-		}
-		p = tail;
-
-		/* Make sure the key is a valid key */
-		if (temp_button_map[i] > KEY_MAX) {
-			dev_err(dev,
-				"%s: Error - button map for button %d is not avalid value 0x%x.\n",
-				 __func__, i, temp_button_map[i]);
-			retval = -EINVAL;
-			goto err_ret;
-		}
-		button_count++;
-		while (p[0] == ' ')
-			p++;
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-			"%s: Error - button map count of %d doesn't match device button count of %d.\n",
-			__func__, button_count, data->button_count);
-		retval = -EINVAL;
-		goto err_ret;
-	}
-
-	/* Clear the key bits for the old button map. */
-	for (i = 0; i < button_count; i++)
-		clear_bit(data->button_map[i], data->input->keybit);
-
-	/* Loop through the key map and set the key bit for the new mapping. */
-	for (i = 0; i < button_count; i++) {
-		data->button_map[i] = temp_button_map[i];
-		set_bit(data->button_map[i], data->input->keybit);
-	}
-
-err_ret:
-	kfree(temp_button_map);
-	return retval;
-}
-
-module_init(rmi_f19_module_init);
-module_exit(rmi_f19_module_exit);
-
-MODULE_AUTHOR("Vivian Ly <vly@synaptics.com>");
-MODULE_DESCRIPTION("RMI F19 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f1a.c b/drivers/input/touchscreen/rmi4/rmi_f1a.c
deleted file mode 100755
index 7e93e2cfbb0c1..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f1a.c
+++ /dev/null
@@ -1,1809 +0,0 @@
-/*
- * Copyright (c) 2012 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-#define QUERY_BASE_INDEX 1
-#define MAX_NAME_LEN 256
-#define MAX_BUFFER_LEN 80
-
-#define FILTER_MODE_MIN				0
-#define FILTER_MODE_MAX				3
-#define MULTI_BUTTON_REPORT_MIN			0
-#define MULTI_BUTTON_REPORT_MAX			3
-#define TX_RX_BUTTON_MIN			0
-#define TX_RX_BUTTON_MAX			255
-#define THREADHOLD_BUTTON_MIN			0
-#define THREADHOLD_BUTTON_MAX			255
-#define RELEASE_THREADHOLD_BUTTON_MIN		0
-#define RELEASE_THREADHOLD_BUTTON_MAX		255
-#define STRONGEST_BUTTON_HYSTERESIS_MIN		0
-#define STRONGEST_BUTTON_HYSTERESIS_MAX		255
-#define FILTER_STRENGTH_MIN			0
-#define FILTER_STRENGTH_MAX			255
-
-union f1a_0d_query {
-	struct {
-		u8 max_button_count:3;
-		u8 reserved:5;
-
-		u8 has_general_control:1;
-		u8 has_interrupt_enable:1;
-		u8 has_multibutton_select:1;
-		u8 has_tx_rx_map:1;
-		u8 has_perbutton_threshold:1;
-		u8 has_release_threshold:1;
-		u8 has_strongestbtn_hysteresis:1;
-		u8 has_filter_strength:1;
-	};
-	u8 regs[2];
-};
-
-union f1a_0d_control_0 {
-	struct {
-		u8 multibutton_report:2;
-		u8 filter_mode:2;
-	};
-	u8 regs[1];
-};
-
-struct f1a_0d_control_3_4 {
-	u8 transmitterbutton;
-	u8 receiverbutton;
-};
-
-struct f1a_0d_control {
-	union f1a_0d_control_0 general_control;
-	u8 *button_int_enable;
-	u8 *multi_button;
-	struct f1a_0d_control_3_4 *electrode_map;
-	u8 *button_threshold;
-	u8 button_release_threshold;
-	u8 strongest_button_hysteresis;
-	u8 filter_strength;
-};
-
-/* data specific to fn $1a that needs to be kept around */
-struct f1a_data {
-	struct f1a_0d_control button_control;
-	union f1a_0d_query button_query;
-	u8 button_count;
-	int button_bitmask_size;
-	u8 *button_data_buffer;
-	u8 *button_map;
-	char input_name[MAX_NAME_LEN];
-	char input_phys[MAX_NAME_LEN];
-	struct input_dev *input;
-	int general_control_address;
-	int button_int_enable_address;
-	int multi_button_address;
-	int electrode_map_address;
-	int button_threshold_address;
-	int button_release_threshold_address;
-	int strongest_button_hysteresis_address;
-	int filter_strength_address;
-};
-
-static ssize_t rmi_f1a_button_count_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f1a_button_map_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_button_map_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f1a_has_general_control_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_interrupt_enable_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_multibutton_select_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_tx_rx_map_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_perbutton_threshold_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_release_threshold_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_strongestbtn_hysteresis_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_has_filter_strength_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_multibutton_report_show(struct device *dev,
-				struct device_attribute *attr, char *buf);
-static ssize_t rmi_f1a_multibutton_report_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count);
-static ssize_t rmi_f1a_filter_mode_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf);
-static ssize_t rmi_f1a_filter_mode_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_button_int_enable_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_button_int_enable_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_multibutton_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_multibutton_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_electrode_map_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_electrode_map_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_threshold_button_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_threshold_button_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_button_release_threshold_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_button_release_threshold_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_strongest_button_hysteresis_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_strongest_button_hysteresis_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-static ssize_t rmi_f1a_filter_strength_show(struct device *dev,
-				 struct device_attribute *attr,
-				 char *buf);
-static ssize_t rmi_f1a_filter_strength_store(struct device *dev,
-				 struct device_attribute *attr,
-				 const char *buf, size_t count);
-
-static int rmi_f1a_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f1a_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f1a_initialize(struct rmi_function_container *fc);
-
-static int rmi_f1a_register_device(struct rmi_function_container *fc);
-
-static int rmi_f1a_create_sysfs(struct rmi_function_container *fc);
-
-static int rmi_f1a_config(struct rmi_function_container *fc);
-
-static int rmi_f1a_reset(struct rmi_function_container *fc);
-
-static struct device_attribute attrs[] = {
-	__ATTR(button_count, RMI_RO_ATTR,
-		rmi_f1a_button_count_show, rmi_store_error),
-	__ATTR(button_map, RMI_RW_ATTR,
-		rmi_f1a_button_map_show, rmi_f1a_button_map_store),
-	__ATTR(has_general_control, RMI_RO_ATTR,
-		rmi_f1a_has_general_control_show, rmi_store_error),
-	__ATTR(has_interrupt_enable, RMI_RO_ATTR,
-		rmi_f1a_has_interrupt_enable_show, rmi_store_error),
-	__ATTR(has_multibutton_select, RMI_RO_ATTR,
-		rmi_f1a_has_multibutton_select_show, rmi_store_error),
-	__ATTR(has_tx_rx_map, RMI_RO_ATTR,
-		rmi_f1a_has_tx_rx_map_show, rmi_store_error),
-	__ATTR(has_perbutton_threshold, RMI_RO_ATTR,
-		rmi_f1a_has_perbutton_threshold_show, rmi_store_error),
-	__ATTR(has_release_threshold, RMI_RO_ATTR,
-		rmi_f1a_has_release_threshold_show, rmi_store_error),
-	__ATTR(has_strongestbtn_hysteresis, RMI_RO_ATTR,
-		rmi_f1a_has_strongestbtn_hysteresis_show, rmi_store_error),
-	__ATTR(has_filter_strength, RMI_RO_ATTR,
-		rmi_f1a_has_filter_strength_show, rmi_store_error),
-	__ATTR(multibutton_report, RMI_RW_ATTR,
-		rmi_f1a_multibutton_report_show,
-		rmi_f1a_multibutton_report_store),
-	__ATTR(filter_mode, RMI_RW_ATTR,
-		rmi_f1a_filter_mode_show, rmi_f1a_filter_mode_store),
-	__ATTR(button_int_enable, RMI_RW_ATTR,
-		rmi_f1a_button_int_enable_show,
-		rmi_f1a_button_int_enable_store),
-	__ATTR(multibutton, RMI_RW_ATTR,
-		rmi_f1a_multibutton_show, rmi_f1a_multibutton_store),
-	__ATTR(electrode_map, RMI_RW_ATTR,
-		rmi_f1a_electrode_map_show,
-		rmi_f1a_electrode_map_store),
-	__ATTR(threshold_button, RMI_RW_ATTR,
-		rmi_f1a_threshold_button_show,
-		rmi_f1a_threshold_button_store),
-	__ATTR(button_release_threshold, RMI_RW_ATTR,
-		rmi_f1a_button_release_threshold_show,
-		rmi_f1a_button_release_threshold_store),
-	__ATTR(strongest_button_hysteresis, RMI_RW_ATTR,
-		rmi_f1a_strongest_button_hysteresis_show,
-		rmi_f1a_strongest_button_hysteresis_store),
-	__ATTR(filter_strength, RMI_RW_ATTR,
-		rmi_f1a_filter_strength_show,
-		rmi_f1a_filter_strength_store)
-};
-
-static int rmi_f1a_read_control_parameters(struct rmi_device *rmi_dev,
-	struct f1a_data *f1a)
-{
-	int error = 0;
-	struct f1a_0d_control *button_control = &f1a->button_control;
-	union f1a_0d_query *button_query = &f1a->button_query;
-	int ctrl_base_addr = f1a->general_control_address;
-	int button_bitmask_size = f1a->button_bitmask_size;
-
-	if (button_query->has_general_control) {
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				(u8 *)&button_control->general_control,
-				sizeof(union f1a_0d_control_0));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_0, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-				sizeof(union f1a_0d_control_0);
-	}
-
-	if (button_query->has_interrupt_enable &&
-		button_control->button_int_enable) {
-		f1a->button_int_enable_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			button_control->button_int_enable,
-			button_bitmask_size);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_1, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + button_bitmask_size;
-	}
-
-	if (button_query->has_multibutton_select &&
-		button_control->multi_button) {
-		f1a->multi_button_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				button_control->multi_button,
-				button_bitmask_size);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_2, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + button_bitmask_size;
-	}
-
-	if (button_query->has_tx_rx_map &&
-		button_control->electrode_map) {
-		f1a->electrode_map_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			(u8 *)(button_control->electrode_map),
-			sizeof(struct f1a_0d_control_3_4)*f1a->button_count);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-			"Failed to read f1a_0d_control_3_4, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-			(sizeof(struct f1a_0d_control_3_4)*f1a->button_count);
-	}
-	if (button_query->has_perbutton_threshold &&
-		button_control->button_threshold) {
-		f1a->button_threshold_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-			button_control->button_threshold,
-			f1a->button_count);
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-			"Failed to read f1a_0d_control_5, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr +
-			(sizeof(u8)*f1a->button_count);
-	}
-
-	if (button_query->has_release_threshold) {
-		f1a->button_release_threshold_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				&button_control->button_release_threshold,
-				sizeof(u8));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_6, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + sizeof(u8);
-	}
-
-	if (button_query->has_strongestbtn_hysteresis) {
-		f1a->strongest_button_hysteresis_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				&button_control->
-					strongest_button_hysteresis,
-				sizeof(u8));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_7, code: %d.\n", error);
-			return error;
-		}
-		ctrl_base_addr = ctrl_base_addr + sizeof(u8);
-	}
-
-	if (button_query->has_filter_strength) {
-		f1a->filter_strength_address = ctrl_base_addr;
-		error = rmi_read_block(rmi_dev, ctrl_base_addr,
-				(u8 *)&button_control->filter_strength,
-				sizeof(u8));
-		if (error < 0) {
-			dev_err(&rmi_dev->dev,
-				"Failed to read f1a_0d_control_8, code: %d.\n", error);
-			return error;
-		}
-	}
-	return 0;
-}
-
-
-static int rmi_f1a_init(struct rmi_function_container *fc)
-{
-	int rc;
-
-	rc = rmi_f1a_alloc_memory(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f1a_initialize(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f1a_register_device(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	rc = rmi_f1a_create_sysfs(fc);
-	if (rc < 0)
-		goto err_free_data;
-
-	return 0;
-
-err_free_data:
-	rmi_f1a_free_memory(fc);
-
-	return rc;
-}
-
-
-static int rmi_f1a_alloc_memory(struct rmi_function_container *fc)
-{
-	struct f1a_data *f1a;
-	int rc;
-
-	f1a = kzalloc(sizeof(struct f1a_data), GFP_KERNEL);
-	if (!f1a) {
-		dev_err(&fc->dev, "Failed to allocate function data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f1a;
-
-	rc = rmi_read_block(fc->rmi_dev, fc->fd.query_base_addr,
-			(u8 *)&f1a->button_query,
-			sizeof(union f1a_0d_query));
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to read query register.\n");
-		return rc;
-	}
-
-	f1a->button_count = f1a->button_query.max_button_count+1;
-
-	f1a->button_bitmask_size = sizeof(u8)*(f1a->button_count + 7) / 8;
-	f1a->button_data_buffer = kcalloc(f1a->button_bitmask_size,
-				sizeof(u8), GFP_KERNEL);
-	if (!f1a->button_data_buffer) {
-		dev_err(&fc->dev, "Failed to allocate button data buffer.\n");
-		return -ENOMEM;
-	}
-
-	f1a->button_map = kcalloc(f1a->button_count,
-				sizeof(unsigned char), GFP_KERNEL);
-	if (!f1a->button_map) {
-		dev_err(&fc->dev, "Failed to allocate button map.\n");
-		return -ENOMEM;
-	}
-	if (f1a->button_query.has_interrupt_enable) {
-		f1a->button_control.button_int_enable =
-				kzalloc(f1a->button_bitmask_size, GFP_KERNEL);
-		if (!f1a->button_control.button_int_enable) {
-			dev_err(&fc->dev, "Failed to allocate interrupt button.\n");
-			return -ENOMEM;
-		}
-	}
-	if (f1a->button_query.has_multibutton_select) {
-		f1a->button_control.multi_button =
-			kzalloc(f1a->button_bitmask_size, GFP_KERNEL);
-		if (!f1a->button_control.multi_button) {
-			dev_err(&fc->dev, "Failed to allocate multi button group select.\n");
-			return -ENOMEM;
-		}
-	}
-	if (f1a->button_query.has_tx_rx_map) {
-		f1a->button_control.electrode_map =
-			kzalloc(f1a->button_count *
-				sizeof(struct f1a_0d_control_3_4), GFP_KERNEL);
-		if (!f1a->button_control.electrode_map) {
-			dev_err(&fc->dev, "Failed to allocate f1a_0d_control_3_4.\n");
-			return -ENOMEM;
-		}
-	}
-	if (f1a->button_query.has_perbutton_threshold) {
-		f1a->button_control.button_threshold =
-			kzalloc(f1a->button_count, GFP_KERNEL);
-		if (!f1a->button_control.button_threshold) {
-			dev_err(&fc->dev, "Failed to allocate button threshold.\n");
-			return -ENOMEM;
-		}
-	}
-	return 0;
-}
-
-
-
-static void rmi_f1a_free_memory(struct rmi_function_container *fc)
-{
-	struct f1a_data *f1a = fc->data;
-
-	if (f1a) {
-		kfree(f1a->button_data_buffer);
-		kfree(f1a->button_map);
-		kfree(f1a->button_control.button_int_enable);
-		kfree(f1a->button_control.multi_button);
-		kfree(f1a->button_control.electrode_map);
-		kfree(f1a->button_control.button_threshold);
-		kfree(f1a);
-		fc->data = NULL;
-	}
-}
-
-
-static int rmi_f1a_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_device_platform_data *pdata;
-	struct f1a_data *f1a = fc->data;
-	int i;
-	int rc;
-
-	dev_info(&fc->dev, "Intializing F1a values.");
-
-	/* initial all default values for f1a data here */
-	pdata = to_rmi_platform_data(rmi_dev);
-	if (pdata) {
-		if (!pdata->f1a_button_map)
-			dev_warn(&fc->dev, "%s - button_map is NULL", __func__);
-		else if (pdata->f1a_button_map->nbuttons !=
-				f1a->button_count)
-			dev_warn(&fc->dev,
-				"Platformdata button map size (%d) != number "
-				"of buttons on device (%d) - ignored.\n",
-				pdata->f1a_button_map->nbuttons,
-				f1a->button_count);
-		else if (!pdata->f1a_button_map->map)
-			dev_warn(&fc->dev,
-				 "Platformdata button map is missing!\n");
-		else
-			for (i = 0; i < pdata->f1a_button_map->nbuttons; i++)
-				f1a->button_map[i] =
-					pdata->f1a_button_map->map[i];
-	}
-
-	f1a->general_control_address = fc->fd.control_base_addr;
-	rc = rmi_f1a_read_control_parameters(rmi_dev, f1a);
-	if (rc < 0) {
-		dev_err(&fc->dev,
-			"Failed to initialize F1a control params.\n");
-		return rc;
-	}
-
-	return 0;
-}
-
-
-
-static int rmi_f1a_register_device(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct input_dev *input_dev;
-	struct f1a_data *f1a = fc->data;
-	int i;
-	int rc;
-
-	input_dev = input_allocate_device();
-	if (!input_dev) {
-		dev_err(&fc->dev, "Failed to allocate input device.\n");
-		return -ENOMEM;
-	}
-
-	f1a->input = input_dev;
-	snprintf(f1a->input_name, MAX_NAME_LEN, "%sfn%02x",
-			dev_name(&rmi_dev->dev),
-			fc->fd.function_number);
-	input_dev->name = f1a->input_name;
-	snprintf(f1a->input_phys, MAX_NAME_LEN, "%s/input0", input_dev->name);
-	input_dev->phys = f1a->input_phys;
-	input_dev->dev.parent = &rmi_dev->dev;
-	input_set_drvdata(input_dev, f1a);
-
-	/* Set up any input events. */
-	set_bit(EV_SYN, input_dev->evbit);
-	set_bit(EV_KEY, input_dev->evbit);
-	/* set bits for each button... */
-	for (i = 0; i < f1a->button_count; i++)
-		set_bit(f1a->button_map[i], input_dev->keybit);
-	rc = input_register_device(input_dev);
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to register input device.\n");
-		goto error_free_device;
-	}
-
-	return 0;
-
-error_free_device:
-	input_free_device(input_dev);
-
-	return rc;
-}
-
-
-static int rmi_f1a_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-	struct f1a_data *data;
-	union f1a_0d_query *button_query;
-	char *name;
-	data = fc->data;
-	button_query = &data->button_query;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.\n");
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		name = (char *) attrs[attr_count].attr.name;
-		if (!button_query->has_general_control &&
-			(!strcmp(name, "multibutton_report") ||
-			!strcmp(name, "filter_mode")))
-			continue;
-		if (!button_query->has_interrupt_enable &&
-			!strcmp(name, "button_int_enable"))
-			continue;
-		if (!button_query->has_multibutton_select &&
-			!strcmp(name, "multibutton"))
-			continue;
-		if (!button_query->has_tx_rx_map &&
-			!strcmp(name, "electrode_map"))
-			continue;
-		if (!button_query->has_perbutton_threshold &&
-			!strcmp(name, "threshold_button"))
-			continue;
-		if (!button_query->has_release_threshold &&
-			!strcmp(name, "button_release_threshold"))
-			continue;
-		if (!button_query->has_strongestbtn_hysteresis &&
-			!strcmp(name, "strongest_button_hysteresis"))
-			continue;
-		if (!button_query->has_filter_strength &&
-			!strcmp(name, "filter_strength"))
-			continue;
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev,
-				"Failed to create sysfs file for %s.",
-				attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-						  &attrs[attr_count].attr);
-	return rc;
-
-}
-
-
-
-static int rmi_f1a_config(struct rmi_function_container *fc)
-{
-	struct f1a_data *data;
-	int retval;
-	union f1a_0d_query *button_query;
-
-	data = fc->data;
-	button_query = &data->button_query;
-	if (button_query->has_general_control) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->general_control_address,
-				(u8 *)&data->button_control.general_control,
-				sizeof(union f1a_0d_control_0));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write general_control to 0x%x\n",
-					__func__, fc->fd.control_base_addr);
-			return retval;
-		}
-	}
-	if (button_query->has_interrupt_enable) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->button_int_enable_address,
-				data->button_control.button_int_enable,
-				data->button_bitmask_size);
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write interrupt_enable_store to 0x%x\n",
-				__func__, data->button_int_enable_address);
-			return retval;
-		}
-	}
-	if (button_query->has_multibutton_select) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->multi_button_address,
-				data->button_control.multi_button,
-				data->button_bitmask_size);
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write multi_button_store to 0x%x\n",
-				__func__, data->multi_button_address);
-			return -EINVAL;
-		}
-	}
-	if (button_query->has_tx_rx_map) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->electrode_map_address,
-				(u8 *)data->button_control.electrode_map,
-				sizeof(struct f1a_0d_control_3_4)*
-				data->button_count);
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not electrode_map_store to 0x%x\n",
-					__func__, data->electrode_map_address);
-			return -EINVAL;
-		}
-	}
-	if (button_query->has_perbutton_threshold) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->button_threshold_address,
-				data->button_control.button_threshold,
-				data->button_count);
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not button_threshold_store to 0x%x\n",
-				__func__, data->button_threshold_address);
-			return retval;
-		}
-	}
-	if (button_query->has_release_threshold) {
-		retval = rmi_write_block(fc->rmi_dev,
-			data->button_release_threshold_address,
-			&data->button_control.button_release_threshold,
-			sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write  button_release_threshold store to 0x%x\n",
-				__func__,
-				data->button_release_threshold_address);
-			return -EINVAL;
-		}
-	}
-	if (button_query->has_strongestbtn_hysteresis) {
-		retval = rmi_write_block(fc->rmi_dev,
-			data->strongest_button_hysteresis_address,
-			&data->button_control.strongest_button_hysteresis,
-			sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write strongest_button_hysteresis store"
-				" to 0x%x\n",
-				__func__,
-				data->strongest_button_hysteresis_address);
-			return -EINVAL;
-		}
-	}
-	if (button_query->has_filter_strength) {
-		retval = rmi_write_block(fc->rmi_dev,
-				data->filter_strength_address,
-				&data->button_control.filter_strength,
-				sizeof(u8));
-		if (retval < 0) {
-			dev_err(&fc->dev, "%s : Could not write filter_strength store to 0x%x\n", __func__,
-				data->filter_strength_address);
-			return -EINVAL;
-		}
-	}
-	return 0;
-}
-
-
-static int rmi_f1a_reset(struct rmi_function_container *fc)
-{
-	/* we do nnothing here */
-	return 0;
-}
-
-
-static void rmi_f1a_remove(struct rmi_function_container *fc)
-{
-	struct f1a_data *f1a = fc->data;
-	int attr_count = 0;
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-
-	input_unregister_device(f1a->input);
-
-	rmi_f1a_free_memory(fc);
-}
-
-int rmi_f1a_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct f1a_data *f1a = fc->data;
-	u16 data_base_addr = fc->fd.data_base_addr;
-	int error;
-	int button;
-	//char buf[256];
-	/* Read the button data. */
-	error = rmi_read_block(rmi_dev, data_base_addr, f1a->button_data_buffer,
-			f1a->button_bitmask_size);
-	if (error < 0) {
-		dev_err(&fc->dev, "%s: Failed to read button data registers.\n",
-			__func__);
-		return error;
-	}
-	//printk("++++++++++++button_data_buffer:%x\n", f1a->button_data_buffer[0]);
-	/* Generate events for buttons that change state. */
-	for (button = 0; button < f1a->button_count; button++) {
-		int button_reg;
-		int button_shift;
-		bool button_status;
-
-		/* determine which data byte the button status is in */
-		button_reg = button / 8;
-		/* bit shift to get button's status */
-		button_shift = button % 8;
-		button_status =
-		    ((f1a->button_data_buffer[button_reg] >> button_shift)
-			& 0x01) != 0;
-
-		dev_dbg(&fc->dev, "%s: Button %d (code %d) -> %d.\n",
-			__func__, button, f1a->button_map[button],
-				button_status);
-		/* Generate an event here. */
-		input_report_key(f1a->input, f1a->button_map[button],
-					button_status);
-	}
-
-	input_sync(f1a->input); /* sync after groups of events */
-	return 0;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x1a,
-	.init = rmi_f1a_init,
-	.config = rmi_f1a_config,
-	.reset = rmi_f1a_reset,
-	.attention = rmi_f1a_attention,
-	.remove = rmi_f1a_remove
-};
-
-static int __init rmi_f1a_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void rmi_f1a_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-static ssize_t rmi_f1a_filter_mode_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_control.general_control.filter_mode);
-
-}
-
-static ssize_t rmi_f1a_filter_mode_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	unsigned int new_value;
-	unsigned int old_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) < 1) {
-		dev_err(dev, "%s: Error - filter_mode_store has an invalid len.\n", __func__);
-		return -EINVAL;
-	}
-
-	if (new_value < FILTER_MODE_MIN || new_value > FILTER_MODE_MAX) {
-		dev_err(dev, "%s: Error - filter_mode_store has an "
-		"invalid value %d.\n",
-		__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.general_control.filter_mode;
-	data->button_control.general_control.filter_mode = new_value;
-	result = rmi_write_block(fc->rmi_dev, data->general_control_address,
-		(u8 *)&(data->button_control.general_control),
-			sizeof(union f1a_0d_control_0));
-	if (result < 0) {
-		data->button_control.general_control.filter_mode = old_value;
-		dev_err(dev, "%s : Could not write filter_mode_store to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_f1a_multibutton_report_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-		data->button_control.general_control.multibutton_report);
-
-}
-
-static ssize_t rmi_f1a_multibutton_report_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	unsigned int new_value;
-	unsigned int old_value;
-	int result;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	if (sscanf(buf, "%u", &new_value) < 1) {
-		dev_err(dev,
-		"%s: Error - multibutton_report_store has an "
-		"invalid len.\n",
-		__func__);
-		return -EINVAL;
-	}
-
-	if (new_value < MULTI_BUTTON_REPORT_MIN ||
-		new_value > MULTI_BUTTON_REPORT_MAX) {
-		dev_err(dev, "%s: Error - multibutton_report_store has an "
-		"invalid value %d.\n",
-		__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.general_control.multibutton_report;
-	data->button_control.general_control.multibutton_report = new_value;
-	result = rmi_write_block(fc->rmi_dev, data->general_control_address,
-		(u8 *)&(data->button_control.general_control),
-			sizeof(union f1a_0d_control_0));
-	if (result < 0) {
-		data->button_control.general_control.multibutton_report =
-				old_value;
-		dev_err(dev, "%s : Could not write multibutton_report_store to 0x%x\n",
-				__func__, fc->fd.control_base_addr);
-		return result;
-	}
-
-	return count;
-
-}
-
-static ssize_t rmi_f1a_button_int_enable_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		int button_reg;
-		int button_shift;
-		int interrupt_button;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		interrupt_button =
-		    ((data->button_control.button_int_enable[button_reg] >>
-				button_shift) & 0x01);
-
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", interrupt_button);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build interrupt button"
-				" buffer, code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-
-}
-
-static ssize_t rmi_f1a_button_int_enable_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i;
-	int button_count = 0;
-	int retval = count;
-	int button_reg = 0;
-	u8 *new_value;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_bitmask_size, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate button interrupt enable.\n", __func__);
-		return -ENOMEM;
-	}
-	for (i = 0; i < data->button_count && *buf != 0;
-	     i++, buf += 2) {
-		int button_shift;
-		int button;
-		int result;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%u", &button);
-
-		if ((result != 1) || (button != 0 && button != 1)) {
-			dev_err(dev,
-				"%s: Error - interrupt enable button for"
-				"button %d is not a valid value 0x%x.\n",
-				__func__, i, button);
-			kfree(new_value);
-			return -EINVAL;
-		}
-		if (button)
-			new_value[button_reg] |= (1 << button_shift);
-
-		button_count++;
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-			"%s: Error - interrupt enable button count of %d"
-			" doesn't match device button count of %d.\n",
-			 __func__, button_count, data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev,
-			data->button_int_enable_address,
-			new_value, data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not write interrupt_enable_store to 0x%x\n",
-			__func__, data->button_int_enable_address);
-		return retval;
-	}
-	memcpy(data->button_control.button_int_enable,
-		new_value, data->button_bitmask_size);
-
-	kfree(new_value);
-	return count;
-}
-
-static ssize_t rmi_f1a_multibutton_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		int button_reg;
-		int button_shift;
-		int multibutton;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		multibutton = ((data->button_control.
-			multi_button[button_reg] >> button_shift) & 0x01);
-
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", multibutton);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build multibutton buffer"
-				", code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-
-	return total_len;
-
-}
-
-static ssize_t rmi_f1a_multibutton_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i;
-	int button_count = 0;
-	int retval = count;
-	int button_reg = 0;
-	u8 *new_value;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_bitmask_size, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate multi button.\n", __func__);
-		return -ENOMEM;
-	}
-	for (i = 0; i < data->button_count && *buf != 0;
-	     i++, buf += 2) {
-		int button_shift;
-		int button;
-		int result;
-
-		button_reg = i / 8;
-		button_shift = i % 8;
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%u", &button);
-
-		if ((result < 1) || (button < 0 || button > 1)) {
-			dev_err(dev,
-				"%s: Error - multibutton for button %d"
-				" is not a valid value 0x%x.\n",
-				__func__, i, button);
-			kfree(new_value);
-			return -EINVAL;
-		}
-
-		if (button)
-			new_value[button_reg] |= (1 << button_shift);
-
-		button_count++;
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-		    "%s: Error - multibutton count of %d doesn't match"
-		     " device button count of %d.\n", __func__, button_count,
-		     data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->multi_button_address,
-			new_value,
-			data->button_bitmask_size);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not write multibutton_store to"
-			" 0x%x\n", __func__, data->multi_button_address);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	memcpy(data->button_control.multi_button, new_value,
-		data->button_bitmask_size);
-	kfree(new_value);
-	return count;
-}
-
-static ssize_t rmi_f1a_electrode_map_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-	struct f1a_0d_control *button_control;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	button_control = &data->button_control;
-	for (i = 0; i < data->button_count; i++) {
-		len = snprintf(current_buf, PAGE_SIZE - total_len, "%u:%u ",
-			button_control->electrode_map[i].transmitterbutton,
-			button_control->electrode_map[i].receiverbutton);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build electrode map buffer, code = %d.\n",
-				__func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-
-
-}
-
-static ssize_t rmi_f1a_electrode_map_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	char colon;
-	int i;
-	int result;
-	int retval = count;
-	int button_count = 0;
-	char tx_rx[MAX_BUFFER_LEN];
-	struct f1a_0d_control_3_4  *new_value;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	new_value = kzalloc(data->button_count *
-			sizeof(struct f1a_0d_control_3_4), GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate eletrode map.\n", __func__);
-		return -ENOMEM;
-	}
-	for (i = 0; i < data->button_count && *buf != 0; i++) {
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%s ", tx_rx);
-		if (result < 1) {
-			dev_err(dev, "%s: Error - scanf threshold button\n", __func__);
-			kfree(new_value);
-			return -EINVAL;
-		}
-		result = sscanf(tx_rx, "%u%c%u",
-			(unsigned int *)&new_value[i].transmitterbutton,
-			&colon,
-			(unsigned int *)&new_value[i].receiverbutton);
-		buf += strlen(tx_rx)+1;
-		/* Make sure the key is a valid key */
-		if ((result < 3) || (colon != ':') ||
-			(new_value[i].transmitterbutton < TX_RX_BUTTON_MIN ||
-			new_value[i].transmitterbutton > TX_RX_BUTTON_MAX) ||
-			(new_value[i].receiverbutton < TX_RX_BUTTON_MIN ||
-			new_value[i].receiverbutton > TX_RX_BUTTON_MAX)) {
-			dev_err(dev, "%s: Error - electrode map for button %d "
-				"is not a valid value 0x%x:0x%x.\n",
-				__func__, i, new_value[i].transmitterbutton,
-				new_value[i].receiverbutton);
-			kfree(new_value);
-			return -EINVAL;
-		}
-		button_count++;
-	}
-
-	if (button_count != data->button_count) {
-		dev_err(dev,
-		    "%s: Error - button map count of %d doesn't match device "
-		     "button count of %d.\n", __func__, button_count,
-		     data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->electrode_map_address,
-			(u8 *)new_value,
-			sizeof(struct f1a_0d_control_3_4)*button_count);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not transmitter_btn_store to 0x%x\n",
-				__func__,  data->electrode_map_address);
-		return -EINVAL;
-		kfree(new_value);
-	}
-	for (i = 0; i < data->button_count; i++) {
-		data->button_control.electrode_map[i].transmitterbutton =
-			new_value[i].transmitterbutton;
-		data->button_control.electrode_map[i].receiverbutton =
-			new_value[i].receiverbutton;
-	}
-	kfree(new_value);
-	return count;
-}
-
-static ssize_t rmi_f1a_threshold_button_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	for (i = 0; i < data->button_count; i++) {
-		len = snprintf(current_buf, PAGE_SIZE - total_len, "%u ",
-			data->button_control.button_threshold[i]);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build threshold_button, "
-				"code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-
-
-}
-
-static ssize_t rmi_f1a_threshold_button_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i;
-	int result;
-	int retval = count;
-	int button_count = 0;
-	char threshold_button[MAX_BUFFER_LEN];
-	u8 *new_value;
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	new_value = kzalloc(data->button_count, GFP_KERNEL);
-	if (!new_value) {
-		dev_err(dev, "%s: Error - failed to allocate threshold button.\n", __func__);
-		return -ENOMEM;
-	}
-
-	for (i = 0; i < data->button_count && *buf != 0; i++) {
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		result = sscanf(buf, "%s ", threshold_button);
-		if (result < 1) {
-			dev_err(dev, "%s: Error - scanf threshold button\n", __func__);
-			kfree(new_value);
-			return -EINVAL;
-		}
-		result = sscanf(threshold_button, "%u",
-				(unsigned int *)&new_value[i]);
-		buf += strlen(threshold_button)+1;
-		/* Make sure the key is a valid key */
-		if ((result < 1) ||
-			(new_value[i] < THREADHOLD_BUTTON_MIN ||
-			new_value[i] > THREADHOLD_BUTTON_MAX)) {
-			dev_err(dev,
-				"%s: Error - threshold_button for button %d "
-				"is not a valid value 0x%x.\n",
-				__func__, i, new_value[i]);
-			kfree(new_value);
-			return -EINVAL;
-		}
-		button_count++;
-	}
-
-	if (button_count != data->button_count) {
-		dev_err(dev,
-		    "%s: Error - button map count of %d doesn't match device "
-		     "button count of %d.\n", __func__, button_count,
-		     data->button_count);
-		kfree(new_value);
-		return -EINVAL;
-	}
-
-	/* write back to the control register */
-	retval = rmi_write_block(fc->rmi_dev, data->button_threshold_address,
-		new_value, data->button_count);
-	if (retval < 0) {
-		dev_err(dev, "%s : Could not threshold_button_store to 0x%x\n",
-				__func__,  data->button_threshold_address);
-		kfree(new_value);
-		return -EINVAL;
-	}
-	memcpy(data->button_control.button_threshold, new_value,
-		data->button_count);
-	kfree(new_value);
-	return count;
-}
-
-
-static ssize_t rmi_f1a_button_release_threshold_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->button_control.
-		button_release_threshold);
-
-}
-static ssize_t rmi_f1a_button_release_threshold_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	u8 new_value;
-	u8 old_value;
-	int len;
-
-	fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	len = sscanf(buf, "%u", (unsigned int *)&new_value);
-	if ((len < 1) ||
-		(new_value < RELEASE_THREADHOLD_BUTTON_MIN ||
-		new_value > RELEASE_THREADHOLD_BUTTON_MAX)) {
-		dev_err(dev,
-			"%s: Error - release threshold_button "
-			"is not a valid value 0x%x.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.button_release_threshold;
-	data->button_control.button_release_threshold = new_value;
-	/* write back to the control register */
-	len = rmi_write_block(fc->rmi_dev,
-		data->button_release_threshold_address,
-		(u8 *)&(data->button_control.button_release_threshold),
-			sizeof(u8));
-	if (len < 0) {
-		data->button_control.button_release_threshold = old_value;
-		dev_err(dev, "%s : Could not button_release_threshold_store to"
-			" 0x%x\n", __func__,
-			data->button_release_threshold_address);
-		return len;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_f1a_strongest_button_hysteresis_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->button_control.
-		strongest_button_hysteresis);
-
-}
-static ssize_t rmi_f1a_strongest_button_hysteresis_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	u8 new_value;
-	u8 old_value;
-	int len;
-
-	fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	len = sscanf(buf, "%u", (unsigned int *)&new_value);
-	if ((len < 1) ||
-		(new_value < STRONGEST_BUTTON_HYSTERESIS_MIN ||
-		new_value > STRONGEST_BUTTON_HYSTERESIS_MAX)) {
-		dev_err(dev,
-			"%s: Error - strongest button hysteresis is not a valid value 0x%x.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.strongest_button_hysteresis;
-	data->button_control.strongest_button_hysteresis = new_value;
-	/* write back to the control register */
-	len = rmi_write_block(fc->rmi_dev,
-		data->strongest_button_hysteresis_address,
-		(u8 *)&(data->button_control.strongest_button_hysteresis),
-			sizeof(u8));
-	if (len < 0) {
-		data->button_control.strongest_button_hysteresis = old_value;
-		dev_err(dev, "%s : Could not strongest_button_hysteresis_store"
-			" to 0x%x\n", __func__,
-			data->strongest_button_hysteresis_address);
-		return len;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_f1a_filter_strength_show(struct device *dev,
-					 struct device_attribute *attr,
-					 char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", data->button_control.
-		filter_strength);
-
-}
-
-static ssize_t rmi_f1a_filter_strength_store(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int new_value;
-	int old_value;
-	int len;
-
-	fc = to_rmi_function_container(dev);
-
-	data = fc->data;
-
-	len = sscanf(buf, "%u", &new_value);
-	if ((len < 1) ||
-		(new_value < FILTER_STRENGTH_MIN ||
-		new_value > FILTER_STRENGTH_MAX)) {
-		dev_err(dev,
-			"%s: Error - filter strength button is not a valid value 0x%x.\n",
-			__func__, new_value);
-		return -EINVAL;
-	}
-	old_value = data->button_control.filter_strength;
-	data->button_control.filter_strength = new_value;
-	/* write back to the control register */
-	len = rmi_write_block(fc->rmi_dev,
-		data->filter_strength_address,
-		(u8 *)&(data->button_control.filter_strength),
-			sizeof(u8));
-	if (len < 0) {
-		data->button_control.filter_strength = old_value;
-		dev_err(dev, "%s : Could not filter_strength_store to 0x%x\n", __func__,
-			data->filter_strength_address);
-		return len;
-	}
-
-	return count;
-}
-
-
-static ssize_t rmi_f1a_button_count_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.max_button_count);
-}
-
-static ssize_t rmi_f1a_has_general_control_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_general_control);
-}
-
-static ssize_t rmi_f1a_has_interrupt_enable_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_interrupt_enable);
-}
-
-static ssize_t rmi_f1a_has_multibutton_select_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_multibutton_select);
-}
-
-static ssize_t rmi_f1a_has_tx_rx_map_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_tx_rx_map);
-}
-
-static ssize_t rmi_f1a_has_perbutton_threshold_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_perbutton_threshold);
-}
-
-static ssize_t rmi_f1a_has_release_threshold_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_release_threshold);
-}
-
-static ssize_t rmi_f1a_has_strongestbtn_hysteresis_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_strongestbtn_hysteresis);
-}
-
-static ssize_t rmi_f1a_has_filter_strength_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			data->button_query.has_filter_strength);
-}
-
-static ssize_t rmi_f1a_button_map_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	int i, len, total_len = 0;
-	char *current_buf = buf;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	/* loop through each button map value and copy its
-	 * string representation into buf */
-	for (i = 0; i < data->button_count; i++) {
-		/* get next button mapping value and write it to buf */
-		len = snprintf(current_buf, PAGE_SIZE - total_len,
-			"%u ", data->button_map[i]);
-		/* bump up ptr to next location in buf if the
-		 * snprintf was valid.  Otherwise issue an error
-		 * and return. */
-		if (len > 0) {
-			current_buf += len;
-			total_len += len;
-		} else {
-			dev_err(dev, "%s: Failed to build button map buffer, "
-				"code = %d.\n", __func__, len);
-			return snprintf(buf, PAGE_SIZE, "unknown\n");
-		}
-	}
-	len = snprintf(current_buf, PAGE_SIZE - total_len, "\n");
-	if (len > 0)
-		total_len += len;
-	else
-		dev_warn(dev, "%s: Failed to append carriage return.\n",
-			 __func__);
-	return total_len;
-}
-
-static ssize_t rmi_f1a_button_map_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf,
-				size_t count)
-{
-	struct rmi_function_container *fc;
-	struct f1a_data *data;
-	unsigned int button;
-	int i;
-	int retval = count;
-	int button_count = 0;
-	unsigned char temp_button_map[KEY_MAX];
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	/* Do validation on the button map data passed in.  Store button
-	 * mappings into a temp buffer and then verify button count and
-	 * data prior to clearing out old button mappings and storing the
-	 * new ones. */
-	for (i = 0; i < data->button_count && *buf != 0;
-	     i++) {
-		/* get next button mapping value and store and bump up to
-		 * point to next item in buf */
-		sscanf(buf, "%u", &button);
-
-		/* Make sure the key is a valid key */
-		if (button > KEY_MAX) {
-			dev_err(dev,
-				"%s: Error - button map for button %d is not a"
-				" valid value 0x%x.\n", __func__, i, button);
-			retval = -EINVAL;
-			goto err_ret;
-		}
-
-		temp_button_map[i] = button;
-		button_count++;
-
-		/* bump up buf to point to next item to read */
-		while (*buf != 0) {
-			buf++;
-			if (*(buf - 1) == ' ')
-				break;
-		}
-	}
-
-	/* Make sure the button count matches */
-	if (button_count != data->button_count) {
-		dev_err(dev,
-		    "%s: Error - button map count of %d doesn't match device "
-		     "button count of %d.\n", __func__, button_count,
-		     data->button_count);
-		retval = -EINVAL;
-		goto err_ret;
-	}
-
-	/* Clear the key bits for the old button map. */
-	for (i = 0; i < button_count; i++)
-		clear_bit(data->button_map[i], data->input->keybit);
-
-	/* Switch to the new map. */
-	memcpy(data->button_map, temp_button_map,
-	       data->button_count);
-
-	/* Loop through the key map and set the key bit for the new mapping. */
-	for (i = 0; i < button_count; i++)
-		set_bit(data->button_map[i], data->input->keybit);
-
-err_ret:
-	return retval;
-}
-
-module_init(rmi_f1a_module_init);
-module_exit(rmi_f1a_module_exit);
-
-MODULE_AUTHOR("Vivian Ly <vly@synaptics.com>");
-MODULE_DESCRIPTION("RMI F1a module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f21.c b/drivers/input/touchscreen/rmi4/rmi_f21.c
deleted file mode 100755
index a8a163bc3bfee..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f21.c
+++ /dev/null
@@ -1,751 +0,0 @@
-
-/*
- * Copyright (c) 2012 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
- 
-#define FUNCTION_DATA rmi_fn_21_data
-#define FNUM 21
-
- 
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/slab.h>
-#include "rmi_driver.h"
-
-union f21_2df_query {
-	struct {
-		/* Query 0 */
-		u8 max_force_sensor_count:3;
-		u8 f21_2df_query0_b3__6:4;
-		u8 has_high_resolution:1;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f21_2df_control_0__3 {
-	struct {
-		/* Control 0 */
-		u8 reporting_mode:2;
-		u8 no_rezero:1;
-		u8 f21_2df_control0_b5__7:4;
-
-		/* Control 1 */
-		u8 force_click_threshold;
-
-		/* Control 2 */
-		u8 int_en_force_0:1;
-		u8 int_en_force_1:1;
-		u8 int_en_force_2:1;
-		u8 int_en_force_3:1;
-		u8 int_en_force_4:1;
-		u8 int_en_force_5:1;
-		u8 int_en_force_6:1;
-		u8 f21_ap_control2_b4__6:3;
-		u8 int_en_click:1;
-
-		/* Control 3 */
-		u8 force_interrupt_threshold;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-struct f21_2df_control_4n {
-	/*Control 4.* */
-	u8 one_newton_calibration:7;
-	u8 use_cfg_cal:1;
-};
-
-struct f21_2df_control_4{
-		struct f21_2df_control_4n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f21_2df_control_5n {
-	/*Control 5.* */
-	u8 x_location;
-};
-
-struct f21_2df_control_5{
-		struct f21_2df_control_5n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f21_2df_control_6n {
-	/*Control 6.* */
-	u8 y_location;
-};
-
-struct f21_2df_control_6{
-		struct f21_2df_control_6n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f21_2df_control_7n {
-	/*Control 7.* */
-	u8 transmitter_force_sensor;
-};
-
-struct f21_2df_control_7{
-		struct f21_2df_control_7n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f21_2df_control_8n {
-	/*Control 8.* */
-	u8 receiver_force_sensor;
-};
-
-struct f21_2df_control_8{
-		struct f21_2df_control_8n *regs;
-		u16 address;
-		u8 length;
-};
-
-
-#define RMI_F21_NUM_CTRL_REGS 8
-struct f21_2df_control {
-	/* Control 0-3 */
-	union f21_2df_control_0__3 *reg_0__3;
-
-	/* Control 4 */
-	struct f21_2df_control_4 *reg_4;
-
-	/* Control 5 */
-	struct f21_2df_control_5 *reg_5;
-
-	/* Control 6 */
-	struct f21_2df_control_6 *reg_6;
-
-	/* Control 7 */
-	struct f21_2df_control_7 *reg_7;
-
-	/* Control 8 */
-	struct f21_2df_control_8 *reg_8;
-};
-
-union f21_2df_data_2 {
-	struct {
-		/* Data 2 */
-		u8 force_click:1;
-		u8 f21_2df_control0_b2__7:7;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-struct f21_2df_data {
-	/* Data 0 */
-	struct {
-		u8 *force_hi_lo;
-		u16 address;
-	} reg_0__1;
-
-	/* Data 2 */
-	union f21_2df_data_2 *reg_2;
-};
-
-#define F21_REZERO_CMD 0x01
-
-/* data specific to fn $21 that needs to be kept around */
-struct rmi_fn_21_data {
-	union f21_2df_query query;
-	struct f21_2df_control control;
-	struct f21_2df_data data;
-	
-	struct mutex control_mutex;
-	struct mutex data_mutex;
-};
-
-static int rmi_f21_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f21_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f21_initialize(struct rmi_function_container *fc);
-
-static int rmi_f21_config(struct rmi_function_container *fc);
-
-static int rmi_f21_create_sysfs(struct rmi_function_container *fc);
-
-/* Sysfs files */
-
-/* Query sysfs files */
-
-
-show_union_struct_prototype(max_force_sensor_count)
-show_union_struct_prototype(has_high_resolution)
-
-static struct attribute *attrs[] = {
-	attrify(max_force_sensor_count),
-	attrify(has_high_resolution),
-	NULL
-};
-static struct attribute_group attrs_query = GROUP(attrs);
-/* Control sysfs files */
-
-show_store_union_struct_prototype(reporting_mode)
-show_store_union_struct_prototype(no_rezero)
-show_store_union_struct_prototype(force_click_threshold)
-show_store_union_struct_prototype(int_en_force_0)
-show_store_union_struct_prototype(int_en_force_1)
-show_store_union_struct_prototype(int_en_force_2)
-show_store_union_struct_prototype(int_en_force_3)
-show_store_union_struct_prototype(int_en_force_4)
-show_store_union_struct_prototype(int_en_force_5)
-show_store_union_struct_prototype(int_en_force_6)
-show_store_union_struct_prototype(int_en_click)
-show_store_union_struct_prototype(force_interrupt_threshold)
-
-show_store_union_struct_prototype(use_cfg_cal)
-show_store_union_struct_prototype(one_newton_calibration)
-show_store_union_struct_prototype(x_location)
-show_store_union_struct_prototype(y_location)
-show_store_union_struct_prototype(transmitter_force_sensor)
-show_store_union_struct_prototype(receiver_force_sensor)
-
-
-static struct attribute *attrs2[] = {
-	attrify(reporting_mode),
-	attrify(no_rezero),
-	attrify(force_click_threshold),
-	attrify(int_en_click),
-	attrify(force_interrupt_threshold),
-	attrify(use_cfg_cal),
-	attrify(one_newton_calibration),
-	attrify(x_location),
-	attrify(y_location),
-	attrify(transmitter_force_sensor),
-	attrify(receiver_force_sensor),
-	NULL
-};
-static struct attribute_group attrs_control = GROUP(attrs2);
-
-/* Data sysfs files */
-show_union_struct_prototype(force)
-show_union_struct_prototype(force_click)
-
-static struct attribute *attrs3[] = {
-	attrify(force),
-	attrify(force_click),
-	NULL
-};
-static struct attribute_group attrs_data = GROUP(attrs3);
-
-/* Command sysfs files */
-
-static ssize_t rmi_fn_21_rezero_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count);
-DEVICE_ATTR(rezero, RMI_WO_ATTR,
-		rmi_show_error,
-		rmi_fn_21_rezero_store);
-
-static struct attribute *attrs4[] = {
-	attrify(rezero),
-	NULL
-};
-static struct attribute_group attrs_command = GROUP(attrs4);
-
-static int rmi_f21_init(struct rmi_function_container *fc)
-{
-	int retval = 0;
-
-	dev_info(&fc->dev, "Intializing F21.");
-
-	retval = rmi_f21_alloc_memory(fc);
-	if (retval < 0)
-		goto error_exit;
-
-	retval = rmi_f21_initialize(fc);
-	if (retval < 0)
-		goto error_exit;
-
-	retval = rmi_f21_create_sysfs(fc);
-	if (retval < 0)
-		goto error_exit;
-
-	return retval;
-
-error_exit:
-	rmi_f21_free_memory(fc);
-
-	return retval;
-}
-
-static int rmi_f21_alloc_memory(struct rmi_function_container *fc)
-{
-	struct rmi_fn_21_data *f21;
-
-	f21 = kzalloc(sizeof(struct rmi_fn_21_data), GFP_KERNEL);
-	if (!f21) {
-		dev_err(&fc->dev, "Failed to allocate rmi_fn_21_data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f21;
-
-	return 0;
-}
-
-
-static void rmi_f21_free_memory(struct rmi_function_container *fc)
-{
-	struct rmi_fn_21_data *f21 = fc->data;
-	u8 int_num = f21->query.max_force_sensor_count;
-	sysfs_remove_group(&fc->dev.kobj, &attrs_query);
-	sysfs_remove_group(&fc->dev.kobj, &attrs_control);
-	switch(int_num) {
-	case 7:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_6));
-	case 6:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_5));
-	case 5:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_4));
-	case 4:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_3));
-	case 3:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_2));
-	case 2:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_1));
-	case 1:
-		sysfs_remove_file(&fc->dev.kobj, attrify(int_en_force_0));
-	default:
-		break;
-	}
-	sysfs_remove_group(&fc->dev.kobj, &attrs_data);
-	sysfs_remove_group(&fc->dev.kobj, &attrs_command);
-	if (f21) {
-		kfree(f21->control.reg_0__3);
-		kfree(f21->control.reg_4->regs);
-		kfree(f21->control.reg_4);
-		kfree(f21->control.reg_5->regs);
-		kfree(f21->control.reg_5);
-		kfree(f21->control.reg_6->regs);
-		kfree(f21->control.reg_6);
-		kfree(f21->control.reg_7->regs);
-		kfree(f21->control.reg_7);
-		kfree(f21->control.reg_8->regs);
-		kfree(f21->control.reg_8);
-		kfree(f21);
-		fc->data = NULL;
-	}
-}
-
-
-static int rmi_f21_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_fn_21_data *instance_data = fc->data;
-	int retval = 0;
-	u16 next_loc;
-
-	/* Read F21 Query Data */
-	instance_data->query.address = fc->fd.query_base_addr;
-	retval = rmi_read_block(fc->rmi_dev, instance_data->query.address,
-		(u8 *)&instance_data->query, sizeof(instance_data->query.regs));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not read query registers from 0x%04x\n", instance_data->query.address);
-		return retval;
-	}
-
-	/* Initialize Control Data */
-	next_loc = fc->fd.control_base_addr;
-
-	instance_data->control.reg_0__3 = 
-			kzalloc(sizeof(union f21_2df_control_0__3), GFP_KERNEL);
-	if (!instance_data->control.reg_0__3) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_0__3->address = next_loc;
-	next_loc += sizeof(instance_data->control.reg_0__3->regs);
-	
-	instance_data->control.reg_4 = 
-			kzalloc(sizeof(struct f21_2df_control_4), GFP_KERNEL);
-	if (!instance_data->control.reg_4) {
-		dev_err(&fc->dev, "Failed to allocate control register.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_4->length = instance_data->query.max_force_sensor_count;
-	instance_data->control.reg_4->regs = 
-			kzalloc(sizeof(struct f21_2df_control_4n)
-				* instance_data->control.reg_4->length, GFP_KERNEL);
-	if (!instance_data->control.reg_4->regs) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_4->address = next_loc;
-	next_loc += instance_data->control.reg_4->length;
-
-	instance_data->control.reg_5 = 
-			kzalloc(sizeof(struct f21_2df_control_5), GFP_KERNEL);
-	if (!instance_data->control.reg_5) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_5->length = instance_data->query.max_force_sensor_count;
-	instance_data->control.reg_5->regs = 
-			kzalloc(sizeof(struct f21_2df_control_5n)
-				* instance_data->control.reg_5->length, GFP_KERNEL);
-	if (!instance_data->control.reg_5->regs) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_5->address = next_loc;
-	next_loc += instance_data->control.reg_5->length;
-
-	instance_data->control.reg_6 = 
-			kzalloc(sizeof(struct f21_2df_control_6), GFP_KERNEL);
-	if (!instance_data->control.reg_6) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_6->length = instance_data->query.max_force_sensor_count;
-	instance_data->control.reg_6->regs = 
-			kzalloc(sizeof(struct f21_2df_control_6n)
-			* instance_data->control.reg_6->length, GFP_KERNEL);
-	if (!instance_data->control.reg_6->regs) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_6->address = next_loc;
-	next_loc += instance_data->control.reg_6->length;
-
-	instance_data->control.reg_7 = 
-			kzalloc(sizeof(struct f21_2df_control_7), GFP_KERNEL);
-	if (!instance_data->control.reg_7) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_7->length = instance_data->query.max_force_sensor_count;
-	instance_data->control.reg_7->regs = 
-			kzalloc(sizeof(struct f21_2df_control_7n)
-			* instance_data->control.reg_7->length, GFP_KERNEL);
-	if (!instance_data->control.reg_7->regs) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_7->address = next_loc;
-	next_loc += instance_data->control.reg_7->length;
-
-	instance_data->control.reg_8 = 
-			kzalloc(sizeof(struct f21_2df_control_8), GFP_KERNEL);
-	if (!instance_data->control.reg_8) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_8->length = instance_data->query.max_force_sensor_count;
-	instance_data->control.reg_8->regs = 
-			kzalloc(sizeof(struct f21_2df_control_8n)
-			* instance_data->control.reg_8->length, GFP_KERNEL);
-	if (!instance_data->control.reg_8->regs) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_8->address = next_loc;
-	
-	
-	/* initialize data registers */
-	next_loc = fc->fd.data_base_addr;
-
-	instance_data->data.reg_0__1.force_hi_lo = kzalloc(
-		2 * instance_data->query.max_force_sensor_count * sizeof(u8),
-								GFP_KERNEL);
-	if (!instance_data->data.reg_0__1.force_hi_lo) {
-		dev_err(&fc->dev, "Failed to allocate data registers.");
-		return -ENOMEM;
-	}
-	instance_data->data.reg_0__1.address = next_loc;
-	next_loc += 2 * instance_data->query.max_force_sensor_count;
-
-	instance_data->data.reg_2 = 
-			kzalloc(sizeof(union f21_2df_data_2), GFP_KERNEL);
-	if (!instance_data->data.reg_2) {
-		dev_err(&fc->dev, "Failed to allocate data registers.");
-		return -ENOMEM;
-	}
-	instance_data->control.reg_0__3->address = next_loc;
-
-	mutex_init(&instance_data->control_mutex);
-	return 0;
-}
-
-
-static int rmi_f21_create_sysfs(struct rmi_function_container *fc)
-{
-	struct rmi_fn_21_data *instance_data = fc->data;
-	u8 int_num = instance_data->query.max_force_sensor_count;
-	if (int_num > 7)
-		int_num = 7;
-	dev_dbg(&fc->dev, "Creating sysfs files.");
-
-	/* Set up sysfs device attributes. */
-	if (sysfs_create_group(&fc->dev.kobj, &attrs_query) < 0 ) {
-	    dev_err(&fc->dev, "Failed to create query sysfs files.");
-		return -ENODEV;
-	}
-	if (sysfs_create_group(&fc->dev.kobj, &attrs_control) < 0 ) {
-	    dev_err(&fc->dev, "Failed to create control sysfs files.");
-		return -ENODEV;
-	}
-	switch(int_num) {
-	case 7:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_6)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 6:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_5)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 5:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_4)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 4:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_3)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 3:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_2)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 2:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_1)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	case 1:
-		if (sysfs_create_file(&fc->dev.kobj, attrify(int_en_force_0)) < 0) {
-			dev_err(&fc->dev, "Failed to create control sysfs files.");
-			return -ENODEV;
-		}
-	default:
-		break;
-	}
-	if (sysfs_create_group(&fc->dev.kobj, &attrs_data) < 0 ) {
-	    dev_err(&fc->dev, "Failed to create data sysfs files.");
-		return -ENODEV;
-	}
-	if (sysfs_create_group(&fc->dev.kobj, &attrs_command) < 0 ) {
-	    dev_err(&fc->dev, "Failed to create command sysfs files.");
-		return -ENODEV;
-	}
-	return 0;
-}
-
-
-static int rmi_f21_config(struct rmi_function_container *fc)
-{
-	struct rmi_fn_21_data *data = fc->data;
-/* repeated register functions */
-
-	/* Write Control Register values back to device */
-	rmi_write_block(fc->rmi_dev, data->control.reg_0__3->address,
-				(u8 *)data->control.reg_0__3,
-				sizeof(data->control.reg_0__3->regs));
-	
-	rmi_write_block(fc->rmi_dev, data->control.reg_4->address,
-			(u8*) data->control.reg_4->regs,
-			data->query.max_force_sensor_count * sizeof(u8));
-
-	rmi_write_block(fc->rmi_dev, data->control.reg_5->address,
-			(u8*) data->control.reg_5->regs,
-			data->query.max_force_sensor_count * sizeof(u8));
-
-	rmi_write_block(fc->rmi_dev, data->control.reg_6->address,
-			(u8*) data->control.reg_6->regs,
-			data->query.max_force_sensor_count * sizeof(u8));
-
-	rmi_write_block(fc->rmi_dev, data->control.reg_7->address,
-			(u8*) data->control.reg_7->regs,
-			data->query.max_force_sensor_count * sizeof(u8));
-
-	rmi_write_block(fc->rmi_dev, data->control.reg_8->address,
-			(u8*) data->control.reg_8->regs,
-			data->query.max_force_sensor_count * sizeof(u8));
-
-
-	return 0;
-}
-
-static void rmi_f21_remove(struct rmi_function_container *fc)
-{
-
-	dev_info(&fc->dev, "Removing F21.");
-	rmi_f21_free_memory(fc);
-}
-
-/* sysfs functions */
-/* Query */
-simple_show_union_struct_unsigned(query, max_force_sensor_count)
-simple_show_union_struct_unsigned(query, has_high_resolution)
-
-/* Control */
-show_store_union_struct_unsigned(control, reg_0__3, reporting_mode)
-show_store_union_struct_unsigned(control, reg_0__3, no_rezero)
-
-show_store_union_struct_unsigned(control, reg_0__3, force_click_threshold)
-
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_0)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_1)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_2)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_3)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_4)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_5)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_force_6)
-show_store_union_struct_unsigned(control, reg_0__3, int_en_click)
-show_store_union_struct_unsigned(control, reg_0__3, force_interrupt_threshold)
-
-
-/* repeated register functions */
-show_store_repeated_union_struct_unsigned(control, reg_4, use_cfg_cal)
-show_store_repeated_union_struct_unsigned(control, reg_4, one_newton_calibration)
-show_store_repeated_union_struct_unsigned(control, reg_5, x_location)
-show_store_repeated_union_struct_unsigned(control, reg_6, y_location)
-show_store_repeated_union_struct_unsigned(control, reg_7, transmitter_force_sensor)
-show_store_repeated_union_struct_unsigned(control, reg_8, receiver_force_sensor)
-
-/* Data */
-static ssize_t rmi_fn_21_force_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf) {
-	struct rmi_function_container *fc;
-	struct FUNCTION_DATA *data;
-	int reg_length;
-	int result, size = 0;
-	char *temp;
-	int i;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	/* Read current regtype values */
-	reg_length = data->query.max_force_sensor_count;
-	result = rmi_read_block(fc->rmi_dev, data->data.reg_0__1.address,
-			data->data.reg_0__1.force_hi_lo,
-			2 *reg_length * sizeof(u8));
-
-	if (result < 0) {
-		dev_err(dev, "%s : Could not read regtype at 0x%x\nData may be outdated.", __func__,
-					data->data.reg_0__1.address);
-	}
-	temp = buf;
-	for (i = 0; i < reg_length; i++) {
-		result = snprintf(temp, PAGE_SIZE - size, "%d ",
-			data->data.reg_0__1.force_hi_lo[i] * (2 << 3)
-			+ data->data.reg_0__1.force_hi_lo[i + reg_length]);
-		if (result < 0) {
-			dev_err(dev, "%s : Could not write output.", __func__);
-			return result;
-		}
-		size += result;
-		temp += result;
-	}
-	result = snprintf(temp, PAGE_SIZE - size, "\n");
-	if (result < 0) {
-			dev_err(dev, "%s : Could not write output.", __func__);
-			return result;
-	}
-	return size + result;
-}
-
-show_union_struct_unsigned(data, reg_2, force_click)
-
-/* Command */
-
-static ssize_t rmi_fn_21_rezero_store(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count) {
-	unsigned long val;
-	int error, result;
-	struct rmi_function_container *fc;
-	struct rmi_fn_21_data *instance_data;
-	struct rmi_driver *driver;
-	u8 command;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	driver = fc->rmi_dev->driver;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-	if (error)
-		return error;
-	/* Do nothing if not set to 1. This prevents accidental commands. */
-	if (val != 1)
-		return count;
-
-	command = (unsigned char)F21_REZERO_CMD;
-
-	/* Write the command to the command register */
-	result = rmi_write_block(fc->rmi_dev, fc->fd.command_base_addr,
-						&command, 1);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write command to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return result;
-	}
-	return count;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x21,
-	.init = rmi_f21_init,
-	.config = rmi_f21_config,
-	.reset = NULL,
-	.attention = NULL,
-	.remove = rmi_f21_remove
-};
-
-static int __init rmi_f21_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-	return 0;
-}
-
-static void rmi_f21_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-module_init(rmi_f21_module_init);
-module_exit(rmi_f21_module_exit);
-
-MODULE_AUTHOR("Daniel Rosenberg <daniel.rosenberg@synaptics.com>");
-MODULE_DESCRIPTION("RMI F21 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_f34.c b/drivers/input/touchscreen/rmi4/rmi_f34.c
deleted file mode 100755
index 3a93a32b9a0b7..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f34.c
+++ /dev/null
@@ -1,962 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/mutex.h>
-#include <linux/rmi.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include "rmi_driver.h"
-
-/* define fn $34 commands */
-#define WRITE_FW_BLOCK            0x2
-#define ERASE_ALL                 0x3
-#define READ_CONFIG_BLOCK         0x5
-#define WRITE_CONFIG_BLOCK        0x6
-#define ERASE_CONFIG              0x7
-#define ENABLE_FLASH_PROG         0xf
-
-#define STATUS_IN_PROGRESS        0xff
-#define STATUS_IDLE		  0x80
-
-#define PDT_START_SCAN_LOCATION	0x00e9
-#define PDT_END_SCAN_LOCATION	0x0005
-
-#define BLK_SZ_OFF	3
-#define IMG_BLK_CNT_OFF	5
-#define CFG_BLK_CNT_OFF	7
-
-#define BLK_NUM_OFF 2
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 32)
-#define KERNEL_VERSION_ABOVE_2_6_32 1
-#endif
-
-/* data specific to fn $34 that needs to be kept around */
-struct rmi_fn_34_data {
-	unsigned char status;
-	unsigned char cmd;
-	unsigned short bootloaderid;
-	unsigned short blocksize;
-	unsigned short imageblockcount;
-	unsigned short configblockcount;
-	unsigned short blocknum;
-	bool inflashprogmode;
-	struct mutex attn_mutex;
-};
-
-static ssize_t rmi_fn_34_status_show(struct device *dev,
-				     struct device_attribute *attr, char *buf);
-
-
-static ssize_t rmi_fn_34_status_store(struct device *dev,
-				  struct device_attribute *attr,
-				  const char *buf, size_t count);
-
-static ssize_t rmi_fn_34_cmd_show(struct device *dev,
-				  struct device_attribute *attr, char *buf);
-
-static ssize_t rmi_fn_34_cmd_store(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count);
-
-#ifdef KERNEL_VERSION_ABOVE_2_6_32
-static ssize_t rmi_fn_34_data_read(struct file *data_file, struct kobject *kobj,
-				   struct bin_attribute *attributes,
-				   char *buf, loff_t pos, size_t count);
-
-static ssize_t rmi_fn_34_data_write(struct file *data_file,
-				    struct kobject *kobj,
-				    struct bin_attribute *attributes, char *buf,
-				    loff_t pos, size_t count);
-#else
-static ssize_t rmi_fn_34_data_read(struct kobject *kobj,
-				   struct bin_attribute *attributes,
-				   char *buf, loff_t pos, size_t count);
-
-static ssize_t rmi_fn_34_data_write(struct kobject *kobj,
-				    struct bin_attribute *attributes, char *buf,
-				    loff_t pos, size_t count);
-#endif
-
-static ssize_t rmi_fn_34_bootloaderid_show(struct device *dev,
-					   struct device_attribute *attr,
-					   char *buf);
-
-static ssize_t rmi_fn_34_bootloaderid_store(struct device *dev,
-					    struct device_attribute *attr,
-					    const char *buf, size_t count);
-
-static ssize_t rmi_fn_34_blocksize_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf);
-
-static ssize_t rmi_fn_34_imageblockcount_show(struct device *dev,
-					      struct device_attribute *attr,
-					      char *buf);
-
-static ssize_t rmi_fn_34_configblockcount_show(struct device *dev,
-					       struct device_attribute *attr,
-					       char *buf);
-
-static ssize_t rmi_fn_34_blocknum_show(struct device *dev,
-				       struct device_attribute *attr,
-				       char *buf);
-
-static ssize_t rmi_fn_34_blocknum_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count);
-
-static ssize_t rmi_fn_34_rescanPDT_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf, size_t count);
-
-
-static int rmi_f34_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f34_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f34_initialize(struct rmi_function_container *fc);
-
-static int rmi_f34_config(struct rmi_function_container *fc);
-
-static int rmi_f34_reset(struct rmi_function_container *fc);
-
-static int rmi_f34_create_sysfs(struct rmi_function_container *fc);
-
-
-
-static struct device_attribute attrs[] = {
-	__ATTR(status, RMI_RW_ATTR,
-	       rmi_fn_34_status_show, rmi_fn_34_status_store),
-
-	/* Also, sysfs will need to have a file set up to distinguish
-	 * between commands - like Config write/read, Image write/verify. */
-	__ATTR(cmd, RMI_RW_ATTR,
-	       rmi_fn_34_cmd_show, rmi_fn_34_cmd_store),
-	__ATTR(bootloaderid, RMI_RW_ATTR,
-	       rmi_fn_34_bootloaderid_show, rmi_fn_34_bootloaderid_store),
-	__ATTR(blocksize, RMI_RO_ATTR,
-	       rmi_fn_34_blocksize_show, rmi_store_error),
-	__ATTR(imageblockcount, RMI_RO_ATTR,
-	       rmi_fn_34_imageblockcount_show, rmi_store_error),
-	__ATTR(configblockcount, RMI_RO_ATTR,
-	       rmi_fn_34_configblockcount_show, rmi_store_error),
-	__ATTR(blocknum, RMI_RW_ATTR,
-	       rmi_fn_34_blocknum_show, rmi_fn_34_blocknum_store),
-	__ATTR(rescanPDT, RMI_WO_ATTR,
-	       rmi_show_error, rmi_fn_34_rescanPDT_store)
-};
-
-struct bin_attribute dev_attr_data = {
-	.attr = {
-		 .name = "data",
-		 .mode = 0666},
-	.size = 0,
-	.read = rmi_fn_34_data_read,
-	.write = rmi_fn_34_data_write,
-};
-
-
-static int rmi_f34_init(struct rmi_function_container *fc)
-{
-	int retval;
-
-	dev_info(&fc->dev, "Intializing f34 values.");
-
-	/* init instance data, fill in values and create any sysfs files */
-	retval = rmi_f34_alloc_memory(fc);
-	if (retval < 0)
-		goto exit_free_data;
-
-	retval = rmi_f34_initialize(fc);
-	if (retval < 0)
-		goto exit_free_data;
-
-	retval = rmi_f34_create_sysfs(fc);
-	if (retval < 0)
-		goto exit_free_data;
-
-	return 0;
-
-exit_free_data:
-	rmi_f34_free_memory(fc);
-
-	return retval;
-}
-
-static int rmi_f34_alloc_memory(struct rmi_function_container *fc)
-{
-	struct rmi_fn_34_data *f34;
-
-	f34 = kzalloc(sizeof(struct rmi_fn_34_data), GFP_KERNEL);
-	if (!f34) {
-		dev_err(&fc->dev, "Failed to allocate rmi_fn_34_data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f34;
-
-	return 0;
-}
-
-static void rmi_f34_free_memory(struct rmi_function_container *fc)
-{
-	kfree(fc->data);
-	fc->data = NULL;
-}
-
-static int rmi_f34_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_device *rmi_dev = fc->rmi_dev;
-	struct rmi_device_platform_data *pdata;
-	int retval = 0;
-	struct rmi_fn_34_data *f34 = fc->data;
-	u16 query_base_addr;
-	u16 control_base_addr;
-	unsigned char buf[2];
-
-	pdata = to_rmi_platform_data(rmi_dev);
-	dev_dbg(&fc->dev, "Initializing F34 values for %s.\n",
-		pdata->sensor_name);
-
-	mutex_init(&f34->attn_mutex);
-
-	/* get the Bootloader ID and Block Size. */
-	query_base_addr = fc->fd.query_base_addr;
-	control_base_addr = fc->fd.control_base_addr;
-
-	retval = rmi_read_block(fc->rmi_dev, query_base_addr, buf,
-			ARRAY_SIZE(buf));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not read bootloaderid from 0x%04x.\n",
-			query_base_addr);
-		return retval;
-	}
-
-	batohs(&f34->bootloaderid, buf);
-
-	retval = rmi_read_block(fc->rmi_dev, query_base_addr + BLK_SZ_OFF, buf,
-			ARRAY_SIZE(buf));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not read block size from 0x%04x, "
-			"error=%d.\n", query_base_addr + BLK_SZ_OFF, retval);
-		return retval;
-	}
-	batohs(&f34->blocksize, buf);
-
-	/* Get firmware image block count and store it in the instance data */
-	retval = rmi_read_block(fc->rmi_dev, query_base_addr + IMG_BLK_CNT_OFF,
-			buf, ARRAY_SIZE(buf));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Couldn't read image block count from 0x%x, "
-			"error=%d.\n", query_base_addr + IMG_BLK_CNT_OFF,
-			retval);
-		return retval;
-	}
-	batohs(&f34->imageblockcount, buf);
-
-	/* Get config block count and store it in the instance data */
-	retval = rmi_read_block(fc->rmi_dev, query_base_addr + 7, buf,
-			ARRAY_SIZE(buf));
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Couldn't read config block count from 0x%x, "
-			"error=%d.\n", query_base_addr + CFG_BLK_CNT_OFF,
-			retval);
-		return retval;
-	}
-	batohs(&f34->configblockcount, buf);
-
-	return 0;
-}
-
-static int rmi_f34_create_sysfs(struct rmi_function_container *fc)
-{
-	int attr_count = 0;
-	int rc;
-
-	dev_dbg(&fc->dev, "Creating sysfs files.");
-
-	/* We need a sysfs file for the image/config block to write or read.
-	 * Set up sysfs bin file for binary data block. Since the image is
-	 * already in our format there is no need to convert the data for
-	 * endianess. */
-	rc = sysfs_create_bin_file(&fc->dev.kobj,
-				&dev_attr_data);
-	if (rc < 0) {
-		dev_err(&fc->dev, "Failed to create sysfs file for F34 data "
-		     "(error = %d).\n", rc);
-		return -ENODEV;
-	}
-
-	/* Set up sysfs device attributes. */
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
-		if (sysfs_create_file
-		    (&fc->dev.kobj, &attrs[attr_count].attr) < 0) {
-			dev_err(&fc->dev, "Failed to create sysfs file for %s.",
-			     attrs[attr_count].attr.name);
-			rc = -ENODEV;
-			goto err_remove_sysfs;
-		}
-	}
-
-	return 0;
-
-err_remove_sysfs:
-	sysfs_remove_bin_file(&fc->dev.kobj, &dev_attr_data);
-
-	for (attr_count--; attr_count >= 0; attr_count--)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-	return rc;
-}
-
-static int rmi_f34_config(struct rmi_function_container *fc)
-{
-	/* for this function we should do nothing here */
-	return 0;
-}
-
-
-static int rmi_f34_reset(struct rmi_function_container *fc)
-{
-	struct  rmi_fn_34_data  *instance_data = fc->data;
-
-	instance_data->status = ECONNRESET;
-
-	return 0;
-}
-
-static void rmi_f34_remove(struct rmi_function_container *fc)
-{
-	int attr_count;
-
-	sysfs_remove_bin_file(&fc->dev.kobj,
-						  &dev_attr_data);
-
-	for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
-		sysfs_remove_file(&fc->dev.kobj,
-				  &attrs[attr_count].attr);
-
-	rmi_f34_free_memory(fc);
-}
-
-static int f34_read_status(struct rmi_function_container *fc)
-{
-	struct rmi_fn_34_data *instance_data = fc->data;
-	u16 data_base_addr = fc->fd.data_base_addr;
-	u8 status;
-	int retval;
-
-	if (instance_data->status == ECONNRESET)
-		return instance_data->status;
-
-	/* Read the Fn $34 status from F34_Flash_Data3 to see the previous
-	 * commands status. F34_Flash_Data3 will be the address after the
-	 * 2 block number registers plus blocksize Data registers.
-	 *  inform user space - through a sysfs param. */
-	retval = rmi_read(fc->rmi_dev,
-			  data_base_addr + instance_data->blocksize +
-			  BLK_NUM_OFF, &status);
-
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not read status from 0x%x\n",
-		       data_base_addr + instance_data->blocksize + BLK_NUM_OFF);
-		status = 0xff;	/* failure */
-	}
-
-	/* set a sysfs value that the user mode can read - only
-	 * upper 4 bits are the status. successful is $80, anything
-	 * else is failure */
-	instance_data->status = status & 0xf0;
-
-	/* put mode into Flash Prog Mode when we successfully do
-	 * an Enable Flash Prog cmd. */
-	if ((instance_data->status == STATUS_IDLE) &&
-		(instance_data->cmd == ENABLE_FLASH_PROG))
-		instance_data->inflashprogmode = true;
-
-	return retval;
-}
-
-int rmi_f34_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	int retval;
-	struct rmi_fn_34_data *data = fc->data;
-
-	mutex_lock(&data->attn_mutex);
-	retval = f34_read_status(fc);
-	mutex_unlock(&data->attn_mutex);
-	return retval;
-}
-
-static struct rmi_function_handler function_handler = {
-	.func = 0x34,
-	.init = rmi_f34_init,
-	.config = rmi_f34_config,
-	.reset = rmi_f34_reset,
-	.attention = rmi_f34_attention,
-	.remove = rmi_f34_remove
-};
-
-static ssize_t rmi_fn_34_bootloaderid_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->bootloaderid);
-}
-
-static ssize_t rmi_fn_34_bootloaderid_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf,
-					size_t count)
-{
-	int error;
-	unsigned long val;
-	unsigned char data[2];
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	u16 data_base_addr;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-
-	if (error)
-		return error;
-
-	instance_data->bootloaderid = val;
-
-	/* Write the Bootloader ID key data back to the first two Block
-	 * Data registers (F34_Flash_Data2.0 and F34_Flash_Data2.1). */
-	hstoba(data, (unsigned short)val);
-	data_base_addr = fc->fd.data_base_addr;
-
-	error = rmi_write_block(fc->rmi_dev,
-				data_base_addr + BLK_NUM_OFF,
-				data,
-				ARRAY_SIZE(data));
-
-	if (error < 0) {
-		dev_err(dev, "%s : Could not write bootloader id to 0x%x\n",
-		       __func__, data_base_addr + BLK_NUM_OFF);
-		return error;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_fn_34_blocksize_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->blocksize);
-}
-
-static ssize_t rmi_fn_34_imageblockcount_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->imageblockcount);
-}
-
-static ssize_t rmi_fn_34_configblockcount_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-			instance_data->configblockcount);
-}
-
-static ssize_t rmi_fn_34_status_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	int retval;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	mutex_lock(&instance_data->attn_mutex);
-	retval = f34_read_status(fc);
-	mutex_unlock(&instance_data->attn_mutex);
-
-	if (retval < 0)
-		return retval;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->status);
-}
-
-
-static ssize_t rmi_fn_34_status_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	instance_data->status = 0;
-
-	return 0;
-}
-
-
-static ssize_t rmi_fn_34_cmd_show(struct device *dev,
-				struct device_attribute *attr,
-				char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->cmd);
-}
-
-static ssize_t rmi_fn_34_cmd_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf,
-				size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	unsigned long val;
-	u16 data_base_addr;
-	int error;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	data_base_addr = fc->fd.data_base_addr;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-	if (error)
-		return error;
-
-	/* make sure we are in Flash Prog mode for all cmds except the
-	 * Enable Flash Programming cmd - otherwise we are in error */
-	if ((val != ENABLE_FLASH_PROG) && !instance_data->inflashprogmode) {
-		dev_err(dev, "%s: CANNOT SEND CMD %d TO SENSOR - "
-			"NOT IN FLASH PROG MODE\n"
-			, __func__, data_base_addr);
-		return -EINVAL;
-	}
-
-	instance_data->cmd = val;
-
-	/* Validate command value and (if necessary) write it to the command
-	 * register.
-	 */
-	switch (instance_data->cmd) {
-	case ENABLE_FLASH_PROG:
-	case ERASE_ALL:
-	case ERASE_CONFIG:
-	case WRITE_FW_BLOCK:
-	case READ_CONFIG_BLOCK:
-	case WRITE_CONFIG_BLOCK:
-		/* Reset the status to indicate we are in progress on a cmd. */
-		/* The status will change when the ATTN interrupt happens
-		   and the status of the cmd that was issued is read from
-		   the F34_Flash_Data3 register - result should be 0x80 for
-		   success - any other value indicates an error */
-
-		/* Issue the command to the device. */
-		error = rmi_write(fc->rmi_dev,
-				data_base_addr + instance_data->blocksize +
-				BLK_NUM_OFF, instance_data->cmd);
-
-		if (error < 0) {
-			dev_err(dev, "%s: Could not write command 0x%02x "
-				"to 0x%04x\n", __func__, instance_data->cmd,
-				data_base_addr + instance_data->blocksize +
-				BLK_NUM_OFF);
-			return error;
-		}
-
-		if (instance_data->cmd == ENABLE_FLASH_PROG)
-			instance_data->inflashprogmode = true;
-
-		/* set status to indicate we are in progress */
-		instance_data->status = STATUS_IN_PROGRESS;
-		break;
-	default:
-		dev_dbg(dev, "%s: RMI4 function $34 - "
-				"unknown command 0x%02lx.\n", __func__, val);
-		count = -EINVAL;
-		break;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_fn_34_blocknum_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->blocknum);
-}
-
-static ssize_t rmi_fn_34_blocknum_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf,
-					size_t count)
-{
-	int error;
-	unsigned long val;
-	unsigned char data[2];
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	u16 data_base_addr;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	data_base_addr = fc->fd.data_base_addr;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-
-	if (error)
-		return error;
-
-	instance_data->blocknum = val;
-
-	/* Write the Block Number data back to the first two Block
-	 * Data registers (F34_Flash_Data_0 and F34_Flash_Data_1). */
-	hstoba(data, (unsigned short)val);
-
-	error = rmi_write_block(fc->rmi_dev,
-				data_base_addr,
-				data,
-				ARRAY_SIZE(data));
-
-	if (error < 0) {
-		dev_err(dev, "%s : Could not write block number %u to 0x%x\n",
-		       __func__, instance_data->blocknum, data_base_addr);
-		return error;
-	}
-
-	return count;
-}
-
-static ssize_t rmi_fn_34_rescanPDT_store(struct device *dev,
-				     struct device_attribute *attr,
-				     const char *buf, size_t count)
-{
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	struct rmi_device *rmi_dev;
-	struct rmi_driver_data *driver_data;
-	struct pdt_entry pdt_entry;
-	bool fn01found = false;
-	bool fn34found = false;
-	unsigned int rescan;
-	int irq_count = 0;
-	int retval = 0;
-	int i;
-
-	/* Rescan of the PDT is needed since issuing the Flash Enable cmd
-	 * the device registers for Fn$01 and Fn$34 moving around because
-	 * of the change from Bootloader mode to Flash Programming mode
-	 * may change to a different PDT with only Fn$01 and Fn$34 that
-	 * could have addresses for query, control, data, command registers
-	 * that differ from the PDT scan done at device initialization. */
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	rmi_dev = fc->rmi_dev;
-	driver_data = rmi_get_driverdata(rmi_dev);
-
-	/* Make sure we are only in Flash Programming mode  - DON'T
-	 * ALLOW THIS IN UI MODE. */
-	if (instance_data->cmd != ENABLE_FLASH_PROG) {
-		dev_err(dev, "%s: NOT IN FLASH PROG MODE - CAN'T RESCAN PDT.\n"
-				, __func__);
-		return -EINVAL;
-	}
-
-	/* The only good value to write to this is 1, we allow 0, but with
-	 * no effect (this is consistent with the way the command bit works. */
-	if (sscanf(buf, "%u", &rescan) != 1)
-		return -EINVAL;
-	if (rescan < 0 || rescan > 1)
-		return -EINVAL;
-
-	/* 0 has no effect, so we skip it entirely. */
-	if (rescan) {
-		/* rescan the PDT - filling in Fn01 and Fn34 addresses -
-		 * this is only temporary - the device will need to be reset
-		 * to return the PDT to the normal values. */
-
-		/* mini-parse the PDT - we only have to get Fn$01 and Fn$34 and
-		   since we are Flash Programming mode we only have page 0. */
-		for (i = PDT_START_SCAN_LOCATION; i >= PDT_END_SCAN_LOCATION;
-			i -= sizeof(pdt_entry)) {
-			retval = rmi_read_block(rmi_dev, i, (u8 *)&pdt_entry,
-					       sizeof(pdt_entry));
-			if (retval != sizeof(pdt_entry)) {
-				dev_err(dev, "%s: err frm rmi_read_block pdt "
-					"entry data from PDT, "
-					"error = %d.", __func__, retval);
-				return retval;
-			}
-
-			if ((pdt_entry.function_number == 0x00) ||
-				(pdt_entry.function_number == 0xff))
-				break;
-
-			dev_dbg(dev, "%s: Found F%.2X\n",
-				__func__, pdt_entry.function_number);
-
-			/* f01 found - just fill in the new addresses in
-			 * the existing fc. */
-			if (pdt_entry.function_number == 0x01) {
-				struct rmi_function_container *f01_fc =
-					driver_data->f01_container;
-				fn01found = true;
-				f01_fc->fd.query_base_addr =
-					pdt_entry.query_base_addr;
-				f01_fc->fd.command_base_addr =
-				  pdt_entry.command_base_addr;
-				f01_fc->fd.control_base_addr =
-				  pdt_entry.control_base_addr;
-				f01_fc->fd.data_base_addr =
-				  pdt_entry.data_base_addr;
-				f01_fc->fd.function_number =
-				  pdt_entry.function_number;
-				f01_fc->fd.interrupt_source_count =
-				  pdt_entry.interrupt_source_count;
-				f01_fc->num_of_irqs =
-				  pdt_entry.interrupt_source_count;
-				f01_fc->irq_pos = irq_count;
-
-				irq_count += f01_fc->num_of_irqs;
-
-				if (fn34found)
-					break;
-			}
-
-			/* f34 found - just fill in the new addresses in
-			 * the existing fc. */
-			if (pdt_entry.function_number == 0x34) {
-				fn34found = true;
-				fc->fd.query_base_addr =
-				  pdt_entry.query_base_addr;
-				fc->fd.command_base_addr =
-				  pdt_entry.command_base_addr;
-				fc->fd.control_base_addr =
-				  pdt_entry.control_base_addr;
-				fc->fd.data_base_addr =
-				  pdt_entry.data_base_addr;
-				fc->fd.function_number =
-				  pdt_entry.function_number;
-				fc->fd.interrupt_source_count =
-				  pdt_entry.interrupt_source_count;
-				fc->num_of_irqs =
-				  pdt_entry.interrupt_source_count;
-				fc->irq_pos = irq_count;
-
-				irq_count += fc->num_of_irqs;
-
-				if (fn01found)
-					break;
-			}
-
-		}
-
-		if (!fn01found || !fn34found) {
-			dev_err(dev, "%s: failed to find fn$01 or fn$34 trying "
-				"to do rescan PDT.\n"
-				, __func__);
-			return -EINVAL;
-		}
-	}
-
-	return count;
-}
-
-#ifdef KERNEL_VERSION_ABOVE_2_6_32
-static ssize_t rmi_fn_34_data_read(struct file *data_file,
-				struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf,
-				loff_t pos,
-				size_t count)
-#else
-static ssize_t rmi_fn_34_data_read(struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf,
-				loff_t pos,
-				size_t count)
-#endif
-{
-	struct device *dev = container_of(kobj, struct device, kobj);
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	u16 data_base_addr;
-	int error;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	data_base_addr = fc->fd.data_base_addr;
-
-	if (count != instance_data->blocksize) {
-		dev_err(dev,
-			"%s : Incorrect F34 block size %d. "
-			"Expected size %d.\n",
-			__func__, count, instance_data->blocksize);
-		return -EINVAL;
-	}
-
-	/* Read the data from flash into buf.  The app layer will be blocked
-	 * at reading from the sysfs file.  When we return the count (or
-	 * error if we fail) the app will resume. */
-	error = rmi_read_block(fc->rmi_dev, data_base_addr + BLK_NUM_OFF,
-			(unsigned char *)buf, count);
-
-	if (error < 0) {
-		dev_err(dev, "%s : Could not read data from 0x%04x\n",
-		       __func__, data_base_addr + BLK_NUM_OFF);
-		return error;
-	}
-
-	return count;
-}
-
-#ifdef KERNEL_VERSION_ABOVE_2_6_32
-static ssize_t rmi_fn_34_data_write(struct file *data_file,
-				struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf,
-				loff_t pos,
-				size_t count)
-#else
-static ssize_t rmi_fn_34_data_write(struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf,
-				loff_t pos,
-				size_t count)
-#endif
-{
-	struct device *dev = container_of(kobj, struct device, kobj);
-	struct rmi_function_container *fc;
-	struct rmi_fn_34_data *instance_data;
-	u16 data_base_addr;
-	int error;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	data_base_addr = fc->fd.data_base_addr;
-
-	/* Write the data from buf to flash. The app layer will be
-	 * blocked at writing to the sysfs file.  When we return the
-	 * count (or error if we fail) the app will resume. */
-
-	if (count != instance_data->blocksize) {
-		dev_err(dev,
-			"%s : Incorrect F34 block size %d. "
-			"Expected size %d.\n",
-			__func__, count, instance_data->blocksize);
-		return -EINVAL;
-	}
-
-	/* Write the data block - only if the count is non-zero  */
-	if (count) {
-		error = rmi_write_block(fc->rmi_dev,
-				data_base_addr + BLK_NUM_OFF,
-				(unsigned char *)buf,
-				count);
-
-		if (error < 0) {
-			dev_err(dev, "%s : Could not write block data "
-				"to 0x%x\n", __func__,
-				data_base_addr + BLK_NUM_OFF);
-			return error;
-		}
-	}
-
-	return count;
-}
-
-static int __init rmi_f34_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s : register failed !\n", __func__);
-		return error;
-	}
-
-	return 0;
-}
-
-static void rmi_f34_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-module_init(rmi_f34_module_init);
-module_exit(rmi_f34_module_exit);
-
-MODULE_AUTHOR("William Manson <wmanson@synaptics.com");
-MODULE_DESCRIPTION("RMI F34 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
\ No newline at end of file
diff --git a/drivers/input/touchscreen/rmi4/rmi_f54.c b/drivers/input/touchscreen/rmi4/rmi_f54.c
deleted file mode 100755
index bae5e78549f10..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_f54.c
+++ /dev/null
@@ -1,2272 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/hrtimer.h>
-#include <linux/kernel.h>
-#include <linux/rmi.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include <linux/delay.h>
-#define FUNCTION_DATA rmi_fn_54_data
-#define FNUM 54
-
-#include "rmi_driver.h"
-
-/* Set this to 1 for raw hex dump of returned data. */
-#define RAW_HEX 0
-/* Set this to 1 for human readable dump of returned data. */
-#define HUMAN_READABLE 0
-/* The watchdog timer can be useful when debugging certain firmware related
- * issues.
- */
-#define F54_WATCHDOG 1
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 32)
-#define KERNEL_VERSION_ABOVE_2_6_32 1
-#endif
-
-/* define fn $54 commands */
-#define GET_REPORT                1
-#define FORCE_CAL                 2
-
-#define NO_AUTO_CAL_MASK 1
-/* status */
-#define BUSY 1
-#define IDLE 0
-
-/* Offsets for data */
-#define RMI_F54_REPORT_DATA_OFFSET	3
-#define RMI_F54_FIFO_OFFSET		1
-#define RMI_F54_NUM_TX_OFFSET		1
-#define RMI_F54_NUM_RX_OFFSET		0
-
-/* Fixed sizes of reports */
-#define RMI_54_FULL_RAW_CAP_MIN_MAX_SIZE 4
-#define RMI_54_HIGH_RESISTANCE_SIZE 6
-
-/* definitions for F54 Query Registers */
-union f54_ad_query {
-	struct {
-		/* query 0 */
-		u8 num_of_rx_electrodes;
-
-		/* query 1 */
-		u8 num_of_tx_electrodes;
-
-		/* query2 */
-		u8 f54_ad_query2_b0__1:2;
-		u8 has_baseline:1;
-		u8 has_image8:1;
-		u8 f54_ad_query2_b4__5:2;
-		u8 has_image16:1;
-		u8 f54_ad_query2_b7:1;
-		
-		/* query 3.0 and 3.1 */
-		u16 clock_rate;
-
-		/* query 4 */
-		u8 touch_controller_family;
-
-		/* query 5 */
-		u8 has_pixel_touch_threshold_adjustment:1;
-		u8 f54_ad_query5_b1__7:7;
-
-		/* query 6 */
-		u8 has_sensor_assignment:1;
-		u8 has_interference_metric:1;
-		u8 has_sense_frequency_control:1;
-		u8 has_firmware_noise_mitigation:1;
-		u8 f54_ad_query6_b4:1;
-		u8 has_two_byte_report_rate:1;
-		u8 has_one_byte_report_rate:1;
-		u8 has_relaxation_control:1;
-
-		/* query 7 */
-		u8 curve_compensation_mode:2;
-		u8 f54_ad_query7_b2__7:6;
-
-		/* query 8 */
-		u8 f54_ad_query2_b0:1;
-		u8 has_iir_filter:1;
-		u8 has_cmn_removal:1;
-		u8 has_cmn_maximum:1;
-		u8 has_touch_hysteresis:1;
-		u8 has_edge_compensation:1;
-		u8 has_per_frequency_noise_control:1;
-		u8 f54_ad_query8_b7:1;
-
-		u8 f54_ad_query9;
-		u8 f54_ad_query10;
-		u8 f54_ad_query11;
-
-		/* query 12 */
-		u8 number_of_sensing_frequencies:4;
-		u8 f54_ad_query12_b4__7:4;
-	};
-	struct {
-		u8 regs[14];
-		u16 address;
-	};
-};
-
-/* And now for the very large amount of control registers */
-
-/* Ctrl registers */
-
-union f54_ad_control_0 {
-	/* control 0 */
-	struct {
-		u8 no_relax:1;
-		u8 no_scan:1;
-		u8 f54_ad_ctrl0_b2__7:6;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_1 {
-	/* control 1 */
-	struct {
-		/* control 1 */
-		u8 bursts_per_cluster:4;
-		u8 f54_ad_ctrl1_b4__7:4;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_2 {
-	/* control 2 */
-	struct {
-		u16 saturation_cap;
-		u16 f54_ctrl2;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-union f54_ad_control_3 {
-	/* control 3 */
-	struct {
-		u16 pixel_touch_threshold;
-		u16 f54_ctrl3;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-union f54_ad_control_4__6 {
-	struct {
-		/* control 4 */
-		u8 rx_feedback_cap:2;
-		u8 f54_ad_ctrl4_b2__7:6;
-
-		/* control 5 */
-		u8 low_ref_cap:2;
-		u8 low_ref_feedback_cap:2;
-		u8 low_ref_polarity:1;
-		u8 f54_ad_ctrl5_b5__7:3;
-		
-		/* control 6 */
-			u8 high_ref_cap:2;
-		u8 high_ref_feedback_cap:2;
-		u8 high_ref_polarity:1;
-		u8 f54_ad_ctrl6_b5__7:3;
-	};
-	struct {
-		u8 regs[3];
-		u16 address;
-	};
-};
-
-union f54_ad_control_7 {
-	struct {
-		/* control 7 */
-		u8 cbc_cap:2;
-		u8 cbc_polarity:2;
-		u8 cbc_tx_carrier_selection:1;
-		u8 f54_ad_ctrl6_b5__7:3;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_8__9 {
-	struct {
-		/* control 8 */
-		u16 integration_duration:10;
-		u16 f54_ad_ctrl8_b10__15:6;
-		/* control 9 */
-		u8 reset_duration;
-		u8 f54_ctrl9;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-union f54_ad_control_10 {
-	struct {
-		/* control 10 */
-		u8 noise_sensing_bursts_per_image:4;
-		u8 f54_ad_ctrl10_b4__7:4;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_11 {
-	struct {
-		/* control 11 */
-		u8 reserved;
-		u8 f54_ctrl11;
-	};
-	struct {
-		u8 regs[2];
-		u16 address;
-	};
-};
-
-union f54_ad_control_12__13 {
-	struct {
-		/* control 12 */
-		u8 slow_relaxation_rate;
-		u8 f54_ctrl12;
-
-		/* control 13 */
-		u8 fast_relaxation_rate;
-		u8 f54_ctrl13;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-union f54_ad_control_14 {
-	struct {
-		/* control 14 */
-			u8 rxs_on_xaxis:1;
-			u8 curve_comp_on_txs:1;
-			u8 f54_ad_ctrl14b2__7:6;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-struct f54_ad_control_15n {
-	/*Control 15.* */
-	u8 sensor_rx_assignment;
-};
-
-struct f54_ad_control_15{
-		struct f54_ad_control_15n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_16n {
-	/*Control 16.* */
-	u8 sensor_tx_assignment;
-};
-
-struct f54_ad_control_16{
-		struct f54_ad_control_16n *regs;
-		u16 address;
-		u8 length;
-};
-
-
-/* control 17 */
-struct f54_ad_control_17n {
-	u8 burst_countb10__8:3;
-	u8 disable:1;
-	u8 f54_ad_ctrlb4:1;
-	u8 filter_bandwidth:3;
-};
-
-struct f54_ad_control_17{
-		struct f54_ad_control_17n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_18n {
-	/*Control 18.* */
-	u8 burst_countb7__0n;
-};
-
-struct f54_ad_control_18{
-		struct f54_ad_control_18n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_19n {
-	/*Control 19.* */
-	u8 stretch_duration;
-};
-
-struct f54_ad_control_19{
-		struct f54_ad_control_19n *regs;
-		u16 address;
-		u8 length;
-};
-
-union f54_ad_control_20 {
-	struct {
-		/* control 20 */
-		u8 disable_noise_mitigation:1;
-		u8 f54_ad_ctrl20b2__7:7;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_21 {
-	struct {
-		/* control 21 */
-		u16 freq_shift_noise_threshold;
-		u16 f54_ctrl21;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-union f54_ad_control_22__26 {
-	struct {
-		/* control 22 */
-		u8 noise_density_threshold;
-		u8 f54_ctrl22;
-
-		/* control 23 */
-		u16 medium_noise_threshold;
-		u8 f54_ctrl23;
-
-		/* control 24 */
-		u16 high_noise_threshold;
-		u16 f54_ctrl24;
-
-		/* control 25 */
-		u8 noise_density;
-		u8 f54_ctrl25;
-
-		/* control 26 */
-		u8 frame_count;
-		u8 f54_ctrl26;
-	};
-	struct {
-		u8 regs[13];
-		u16 address;
-	};
-};
-
-union f54_ad_control_27 {
-	struct {
-		/* control 27 */
-		u8 iir_filter_coef;
-		u8 f54_ctrl27;
-	};
-	struct {
-		u8 regs[2];
-		u16 address;
-	};
-};
-
-union f54_ad_control_28 {
-	struct {
-		/* control 28 */
-		u16 quiet_threshold;
-		u16 f54_ctrl28;
-	};
-	struct {
-		u8 regs[4];
-		u16 address;
-	};
-};
-
-
-union f54_ad_control_29 {
-	struct {
-		/* control 29 */
-		u8 f54_ad_ctrl20b0__6:7;
-		u8 cmn_filter_disable:1;
-	};
-	struct {
-		u8 regs[1];
-		u16 address;
-	};
-};
-
-union f54_ad_control_30 {
-	struct {
-		/* control 30 */
-		u8 cmn_filter_max;
-		u8 f54_ctrl30;
-	};
-	struct {
-		u8 regs[2];
-		u16 address;
-	};
-};
-
-union f54_ad_control_31 {
-	struct {
-		/* control 31 */
-		u8 touch_hysteresis;
-		u8 f54_ctrl31;
-	};
-	struct {
-		u8 regs[2];
-		u16 address;
-	};
-};
-
-union f54_ad_control_32__35 {
-	struct {
-		/* control 32 */
-		u16 rx_low_edge_comp;
-		u16 f54_ctrl32;
-
-		/* control 33 */
-		u16 rx_high_edge_comp;
-		u16 f54_ctrl33;
-
-		/* control 34 */
-		u16 tx_low_edge_comp;
-		u16 f54_ctrl34;
-
-		/* control 35 */
-		u16 tx_high_edge_comp;
-		u16 f54_ctrl35;
-	};
-	struct {
-		u8 regs[16];
-		u16 address;
-	};
-};
-
-struct f54_ad_control_36n {
-	/*Control 36.* */
-	u8 axis1_comp;
-};
-
-struct f54_ad_control_36{
-		struct f54_ad_control_36n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_37n {
-	/*Control 37.* */
-	u8 axis2_comp;
-};
-
-struct f54_ad_control_37{
-		struct f54_ad_control_37n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_38n {
-	/*Control 38.* */
-	u8 noise_control_1;
-};
-
-struct f54_ad_control_38{
-		struct f54_ad_control_38n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_39n {
-	/*Control 39.* */
-	u8 noise_control_2;
-};
-
-struct f54_ad_control_39{
-		struct f54_ad_control_39n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control_40n {
-	/*Control 40.* */
-	u8 noise_control_3;
-};
-
-struct f54_ad_control_40{
-		struct f54_ad_control_40n *regs;
-		u16 address;
-		u8 length;
-};
-
-struct f54_ad_control {
-	union f54_ad_control_0 *reg_0;
-	union f54_ad_control_1 *reg_1;
-	union f54_ad_control_2 *reg_2;
-	union f54_ad_control_3 *reg_3;
-	union f54_ad_control_4__6 *reg_4__6;
-	union f54_ad_control_7 *reg_7;
-	union f54_ad_control_8__9 *reg_8__9;
-	union f54_ad_control_10 *reg_10;
-	union f54_ad_control_11 *reg_11;
-	union f54_ad_control_12__13 *reg_12__13;
-	union f54_ad_control_14 *reg_14;
-	/* control 15 */
-	struct f54_ad_control_15 *reg_15;
-	/* control 16 */
-	struct f54_ad_control_16 *reg_16;
-
-	/* This register is n repetitions of f54_ad_control_17 */
-	struct f54_ad_control_17 *reg_17;
-
-	/* control 18 */
-	struct f54_ad_control_18 *reg_18;
-
-	/* control 19 */
-	struct f54_ad_control_19 *reg_19;
-	
-	union f54_ad_control_20 *reg_20;
-	union f54_ad_control_21 *reg_21;
-	union f54_ad_control_22__26 *reg_22__26;
-	union f54_ad_control_27 *reg_27;
-	union f54_ad_control_28 *reg_28;
-	union f54_ad_control_29 *reg_29;
-	union f54_ad_control_30 *reg_30;
-	union f54_ad_control_31 *reg_31;
-	union f54_ad_control_32__35 *reg_32__35;
-	/* control 36 */
-	struct f54_ad_control_36 *reg_36;
-
-	/* control 37 */
-	struct f54_ad_control_37 *reg_37;
-
-	/* control 38 */
-	struct f54_ad_control_38 *reg_38;
-
-	/* control 39 */
-	struct f54_ad_control_39 *reg_39;
-
-	/* control 40 */
-	struct f54_ad_control_40 *reg_40;
-};
-
-/* define report types */
-enum f54_report_types {
-	F54_8BIT_IMAGE = 1,
-	F54_16BIT_IMAGE = 2,
-	F54_RAW_16BIT_IMAGE = 3,
-	F54_HIGH_RESISTANCE = 4,
-	F54_TX_TO_TX_SHORT = 5,
-	F54_RX_TO_RX1 = 7,
-	F54_TRUE_BASELINE = 9,
-	F54_FULL_RAW_CAP_MIN_MAX = 13,
-	F54_RX_OPENS1 = 14,
-	F54_TX_OPEN = 15,
-	F54_TX_TO_GROUND = 16,
-	F54_RX_TO_RX2 = 17,
-	F54_RX_OPENS2 = 18,
-	F54_FULL_RAW_CAP = 19,
-	F54_FULL_RAW_CAP_RX_COUPLING_COMP = 20
-};
-
-/* data specific to fn $54 that needs to be kept around */
-struct rmi_fn_54_data {
-	union f54_ad_query query;
-	struct f54_ad_control control;
-	enum f54_report_types report_type;
-	u16 fifoindex;
-	signed char status;
-	bool no_auto_cal;
-	unsigned int report_size;
-	unsigned char *report_data;
-	unsigned int bufsize;
-	struct mutex data_mutex;
-	struct mutex status_mutex;
-	struct mutex control_mutex;
-#if F54_WATCHDOG
-	struct hrtimer watchdog;
-#endif
-	struct rmi_function_container *fc;
-	struct work_struct work;
-};
-
-/* sysfs functions */
-show_store_union_struct_prototype(report_type)
-
-store_union_struct_prototype(get_report)
-
-store_union_struct_prototype(force_cal)
-
-show_union_struct_prototype(status)
-
-#ifdef KERNEL_VERSION_ABOVE_2_6_32
-static ssize_t rmi_fn_54_data_read(struct file *data_file, struct kobject *kobj,
-					struct bin_attribute *attributes,
-					char *buf, loff_t pos, size_t count);
-#else
-static ssize_t rmi_fn_54_data_read(struct kobject *kobj,
-					struct bin_attribute *attributes,
-					char *buf, loff_t pos, size_t count);
-#endif
-
-show_union_struct_prototype(num_of_rx_electrodes)
-show_union_struct_prototype(num_of_tx_electrodes)
-show_union_struct_prototype(has_image16)
-show_union_struct_prototype(has_image8)
-show_union_struct_prototype(has_baseline)
-show_union_struct_prototype(clock_rate)
-show_union_struct_prototype(touch_controller_family)
-show_union_struct_prototype(has_pixel_touch_threshold_adjustment)
-show_union_struct_prototype(has_sensor_assignment)
-show_union_struct_prototype(has_interference_metric)
-show_union_struct_prototype(has_sense_frequency_control)
-show_union_struct_prototype(has_firmware_noise_mitigation)
-show_union_struct_prototype(has_two_byte_report_rate)
-show_union_struct_prototype(has_one_byte_report_rate)
-show_union_struct_prototype(has_relaxation_control)
-show_union_struct_prototype(curve_compensation_mode)
-show_union_struct_prototype(has_iir_filter)
-show_union_struct_prototype(has_cmn_removal)
-show_union_struct_prototype(has_cmn_maximum)
-show_union_struct_prototype(has_touch_hysteresis)
-show_union_struct_prototype(has_edge_compensation)
-show_union_struct_prototype(has_per_frequency_noise_control)
-show_union_struct_prototype(number_of_sensing_frequencies)
-show_store_union_struct_prototype(no_auto_cal)
-show_store_union_struct_prototype(fifoindex)
-
-/* Repeated Control Registers */
-show_union_struct_prototype(sensor_rx_assignment)
-show_union_struct_prototype(sensor_tx_assignment)
-show_union_struct_prototype(filter_bandwidth)
-show_union_struct_prototype(disable)
-show_union_struct_prototype(burst_count)
-show_union_struct_prototype(stretch_duration)
-show_store_union_struct_prototype(axis1_comp)
-show_store_union_struct_prototype(axis2_comp)
-show_union_struct_prototype(noise_control_1)
-show_union_struct_prototype(noise_control_2)
-show_union_struct_prototype(noise_control_3)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-show_store_union_struct_prototype(no_relax)
-show_store_union_struct_prototype(no_scan)
-show_store_union_struct_prototype(bursts_per_cluster)
-show_store_union_struct_prototype(saturation_cap)
-show_store_union_struct_prototype(pixel_touch_threshold)
-show_store_union_struct_prototype(rx_feedback_cap)
-show_store_union_struct_prototype(low_ref_cap)
-show_store_union_struct_prototype(low_ref_feedback_cap)
-show_store_union_struct_prototype(low_ref_polarity)
-show_store_union_struct_prototype(high_ref_cap)
-show_store_union_struct_prototype(high_ref_feedback_cap)
-show_store_union_struct_prototype(high_ref_polarity)
-show_store_union_struct_prototype(cbc_cap)
-show_store_union_struct_prototype(cbc_polarity)
-show_store_union_struct_prototype(cbc_tx_carrier_selection)
-show_store_union_struct_prototype(integration_duration)
-show_store_union_struct_prototype(reset_duration)
-show_store_union_struct_prototype(noise_sensing_bursts_per_image)
-show_store_union_struct_prototype(slow_relaxation_rate)
-show_store_union_struct_prototype(fast_relaxation_rate)
-show_store_union_struct_prototype(rxs_on_xaxis)
-show_store_union_struct_prototype(curve_comp_on_txs)
-show_store_union_struct_prototype(disable_noise_mitigation)
-show_store_union_struct_prototype(freq_shift_noise_threshold)
-show_store_union_struct_prototype(noise_density_threshold)
-show_store_union_struct_prototype(medium_noise_threshold)
-show_store_union_struct_prototype(high_noise_threshold)
-show_store_union_struct_prototype(noise_density)
-show_store_union_struct_prototype(frame_count)
-show_store_union_struct_prototype(iir_filter_coef)
-show_store_union_struct_prototype(quiet_threshold)
-show_store_union_struct_prototype(cmn_filter_disable)
-show_store_union_struct_prototype(cmn_filter_max)
-show_store_union_struct_prototype(touch_hysteresis)
-show_store_union_struct_prototype(rx_low_edge_comp)
-show_store_union_struct_prototype(rx_high_edge_comp)
-show_store_union_struct_prototype(tx_low_edge_comp)
-show_store_union_struct_prototype(tx_high_edge_comp)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-
-static struct attribute *attrs[] = {
-	attrify(report_type),
-	attrify(get_report),
-	attrify(force_cal),
-	attrify(status),
-	attrify(num_of_rx_electrodes),
-	attrify(num_of_tx_electrodes),
-	attrify(has_image16),
-	attrify(has_image8),
-	attrify(has_baseline),
-	attrify(clock_rate),
-	attrify(touch_controller_family),
-	attrify(has_pixel_touch_threshold_adjustment),
-	attrify(has_sensor_assignment),
-	attrify(has_interference_metric),
-	attrify(has_sense_frequency_control),
-	attrify(has_firmware_noise_mitigation),
-	attrify(has_two_byte_report_rate),
-	attrify(has_one_byte_report_rate),
-	attrify(has_relaxation_control),
-	attrify(curve_compensation_mode),
-	attrify(has_iir_filter),
-	attrify(has_cmn_removal),
-	attrify(has_cmn_maximum),
-	attrify(has_touch_hysteresis),
-	attrify(has_edge_compensation),
-	attrify(has_per_frequency_noise_control),
-	attrify(number_of_sensing_frequencies),
-	attrify(no_auto_cal),
-	attrify(fifoindex),
-	NULL
-};
-
-static struct attribute_group attrs_query = GROUP(attrs);
-
-struct bin_attribute dev_rep_data = {
-	.attr = {
-		 .name = "rep_data",
-		 .mode = RMI_RO_ATTR},
-	.size = 0,
-	.read = rmi_fn_54_data_read,
-};
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-
-static struct attribute *attrs_reg_0[] = {
-	attrify(no_relax),
-	attrify(no_scan),
-	NULL
-};
-
-static struct attribute *attrs_reg_1[] = {
-	attrify(bursts_per_cluster),
-	NULL
-};
-
-static struct attribute *attrs_reg_2[] = {
-	attrify(saturation_cap),
-	NULL
-};
-
-static struct attribute *attrs_reg_3[] = {
-	attrify(pixel_touch_threshold),
-	NULL
-};
-
-static struct attribute *attrs_reg_4__6[] = {
-	attrify(rx_feedback_cap),
-	attrify(low_ref_cap),
-	attrify(low_ref_feedback_cap),
-	attrify(low_ref_polarity),
-	attrify(high_ref_cap),
-	attrify(high_ref_feedback_cap),
-	attrify(high_ref_polarity),
-	NULL
-};
-
-static struct attribute *attrs_reg_7[] = {
-	attrify(cbc_cap),
-	attrify(cbc_polarity),
-	attrify(cbc_tx_carrier_selection),
-	NULL
-};
-
-static struct attribute *attrs_reg_8__9[] = {
-	attrify(integration_duration),
-	attrify(reset_duration),
-	NULL
-};
-
-static struct attribute *attrs_reg_10[] = {
-	attrify(noise_sensing_bursts_per_image),
-	NULL
-};
-
-static struct attribute *attrs_reg_12__13[] = {
-	attrify(slow_relaxation_rate),
-	attrify(fast_relaxation_rate),
-	NULL
-};
-
-static struct attribute *attrs_reg_14__16[] = {
-	attrify(rxs_on_xaxis),
-	attrify(curve_comp_on_txs),
-	attrify(sensor_rx_assignment),
-	attrify(sensor_tx_assignment),
-	NULL
-};
-
-static struct attribute *attrs_reg_17__19[] = {
-	attrify(filter_bandwidth),
-	attrify(disable),
-	attrify(burst_count),
-	attrify(stretch_duration),
-};
-
-static struct attribute *attrs_reg_20[] = {
-	attrify(disable_noise_mitigation),
-	NULL
-};
-
-static struct attribute *attrs_reg_21[] = {
-	attrify(freq_shift_noise_threshold),
-	NULL
-};
-
-static struct attribute *attrs_reg_22__26[] = {
-	attrify(noise_density_threshold),
-	attrify(medium_noise_threshold),
-	attrify(high_noise_threshold),
-	attrify(noise_density),
-	attrify(frame_count),
-	NULL
-};
-
-static struct attribute *attrs_reg_27[] = {
-	attrify(iir_filter_coef),
-	NULL
-};
-
-static struct attribute *attrs_reg_28[] = {
-	attrify(quiet_threshold),
-	NULL
-};
-
-static struct attribute *attrs_reg_29[] = {
-	attrify(cmn_filter_disable),
-	NULL
-};
-
-static struct attribute *attrs_reg_30[] = {
-	attrify(cmn_filter_max),
-	NULL
-};
-
-static struct attribute *attrs_reg_31[] = {
-	attrify(touch_hysteresis),
-	NULL
-};
-
-static struct attribute *attrs_reg_32__35[] = {
-	attrify(rx_low_edge_comp),
-	attrify(rx_high_edge_comp),
-	attrify(tx_low_edge_comp),
-	attrify(tx_high_edge_comp),
-	NULL
-};
-
-static struct attribute *attrs_reg_36[] = {
-	attrify(axis1_comp),
-	NULL
- };
- 
-static struct attribute *attrs_reg_37[] = {
-	attrify(axis2_comp),
-	NULL
- };
- 
-static struct attribute *attrs_reg_38__40[] = {
-	attrify(noise_control_1),
-	attrify(noise_control_2),
-	attrify(noise_control_3),
-	NULL
- };
-
-static struct attribute_group attrs_ctrl_regs[] = {
-	GROUP(attrs_reg_0),
-	GROUP(attrs_reg_1),
-	GROUP(attrs_reg_2),
-	GROUP(attrs_reg_3),
-	GROUP(attrs_reg_4__6),
-	GROUP(attrs_reg_7),
-	GROUP(attrs_reg_8__9),
-	GROUP(attrs_reg_10),
-	GROUP(attrs_reg_12__13),
-	GROUP(attrs_reg_14__16),
-	GROUP(attrs_reg_17__19),
-	GROUP(attrs_reg_20),
-	GROUP(attrs_reg_21),
-	GROUP(attrs_reg_22__26),
-	GROUP(attrs_reg_27),
-	GROUP(attrs_reg_28),
-	GROUP(attrs_reg_29),
-	GROUP(attrs_reg_30),
-	GROUP(attrs_reg_31),
-	GROUP(attrs_reg_32__35),
-	GROUP(attrs_reg_36),
-	GROUP(attrs_reg_37),
-	GROUP(attrs_reg_38__40)
-};
-
-bool attrs_ctrl_regs_exist[ARRAY_SIZE(attrs_ctrl_regs)];
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-#if F54_WATCHDOG
-static enum hrtimer_restart clear_status(struct hrtimer *timer);
-
-static void clear_status_worker(struct work_struct *work);
-#endif
-
-static int rmi_f54_alloc_memory(struct rmi_function_container *fc);
-
-static void rmi_f54_free_memory(struct rmi_function_container *fc);
-
-static int rmi_f54_initialize(struct rmi_function_container *fc);
-
-static int rmi_f54_reset(struct rmi_function_container *fc);
-
-static int rmi_f54_create_sysfs(struct rmi_function_container *fc);
-
-static int rmi_f54_init(struct rmi_function_container *fc)
-{
-	int retval = 0;
-	struct rmi_fn_54_data *f54;
-
-	dev_info(&fc->dev, "Intializing F54.");
-
-	retval = rmi_f54_alloc_memory(fc);
-	if (retval < 0)
-		goto error_exit;
-
-	retval = rmi_f54_initialize(fc);
-	if (retval < 0)
-		goto error_exit;
-
-	retval = rmi_f54_create_sysfs(fc);
-	if (retval < 0)
-		goto error_exit;
-	f54 = fc->data;
-	f54->status = IDLE;
-	return retval;
-
-error_exit:
-	rmi_f54_free_memory(fc);
-
-	return retval;
-}
-
-static int rmi_f54_alloc_memory(struct rmi_function_container *fc)
-{
-	struct rmi_fn_54_data *f54;
-
-	f54 = kzalloc(sizeof(struct rmi_fn_54_data), GFP_KERNEL);
-	if (!f54) {
-		dev_err(&fc->dev, "Failed to allocate rmi_fn_54_data.\n");
-		return -ENOMEM;
-	}
-	fc->data = f54;
-	f54->fc = fc;
-
-
-	return 0;
-}
-
-static void rmi_f54_free_memory(struct rmi_function_container *fc)
-{
-	int reg_num;
-	struct rmi_fn_54_data *f54 = fc->data;
-	sysfs_remove_group(&fc->dev.kobj, &attrs_query);
-	for (reg_num = 0; reg_num < ARRAY_SIZE(attrs_ctrl_regs); reg_num++)
-		sysfs_remove_group(&fc->dev.kobj, &attrs_ctrl_regs[reg_num]);
-	sysfs_remove_bin_file(&fc->dev.kobj, &dev_rep_data);
-	if (f54) {
-		kfree(f54->report_data);
-		kfree(f54);
-		fc->data = NULL;
-	}
-}
-
-static int rmi_f54_reset(struct rmi_function_container *fc)
-{
-	struct rmi_fn_54_data *data = fc->data;
-	struct rmi_driver *driver = fc->rmi_dev->driver;
-
-#if F54_WATCHDOG
-	hrtimer_cancel(&data->watchdog);
-#endif
-
-	mutex_lock(&data->status_mutex);
-	if (driver->restore_irq_mask) {
-		dev_dbg(&fc->dev, "Restoring interupts!\n");
-		driver->restore_irq_mask(fc->rmi_dev);
-	} else {
-		dev_err(&fc->dev, "No way to restore interrupts!\n");
-	}
-	data->status = -ECONNRESET;
-	mutex_unlock(&data->status_mutex);
-
-	return 0;
-}
-
-static void rmi_f54_remove(struct rmi_function_container *fc)
-{
-	struct rmi_fn_54_data *data = fc->data;
-
-	dev_info(&fc->dev, "Removing F54.");
-
-	#if F54_WATCHDOG
-	/* Stop timer */
-	hrtimer_cancel(&data->watchdog);
-	#endif
-
-	rmi_f54_free_memory(fc);
-}
-
-static int rmi_f54_create_sysfs(struct rmi_function_container *fc) {
-	int reg_num;
-	int retval;
-	dev_dbg(&fc->dev, "Creating sysfs files.");
-	/* Set up sysfs device attributes. */
-	
-	if (sysfs_create_group(&fc->dev.kobj, &attrs_query) < 0 ) {
-	    dev_err(&fc->dev, "Failed to create query sysfs files.");
-		return -ENODEV;
-	}
-	for (reg_num = 0; reg_num < ARRAY_SIZE(attrs_ctrl_regs);
-								reg_num++) {
-		if (attrs_ctrl_regs_exist[reg_num]) {
-			if (sysfs_create_group(&fc->dev.kobj,
-					&attrs_ctrl_regs[reg_num]) < 0) {
-				dev_err(&fc->dev,
-					"Failed to create "
-					"sysfs file group for reg"
-					"group %d.",
-					reg_num);
-				return -ENODEV;
-			}
-		}
-	}
-
-	/* Binary sysfs file to report the data back */
-	retval = sysfs_create_bin_file(&fc->dev.kobj, &dev_rep_data);
-	if (retval < 0) {
-		dev_err(&fc->dev, "Failed to create sysfs file for F54 data "
-					"(error = %d).\n", retval);
-		return -ENODEV;
-	}
-	return 0;
-}
-
-
-
-static int rmi_f54_initialize(struct rmi_function_container *fc)
-{
-	struct rmi_fn_54_data *instance_data= fc->data;
-	struct f54_ad_control *control;
-	int retval = 0;
-	u8 size = 0;
-	u16 next_loc;
-	u8 reg_num;
-
-	dev_info(&fc->dev, "Intializing F54.");
-	
-#if F54_WATCHDOG
-	/* Set up watchdog timer to catch unanswered get_report commands */
-	hrtimer_init(&instance_data->watchdog, CLOCK_MONOTONIC,
-							HRTIMER_MODE_REL);
-	instance_data->watchdog.function = clear_status;
-
-	/* work function to do unlocking */
-	INIT_WORK(&instance_data->work, clear_status_worker);
-#endif
-
-	/* Read F54 Query Data */
-	retval = rmi_read_block(fc->rmi_dev, fc->fd.query_base_addr,
-		(u8 *)&instance_data->query, sizeof(instance_data->query));
-	if (retval < 0) {
-		dev_err(&fc->dev, "Could not read query registers"
-			" from 0x%04x\n", fc->fd.query_base_addr);
-		return retval;
-	}
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-	/* Initialize the control registers */
-	next_loc = fc->fd.control_base_addr;
-	reg_num = 0;
-	control = &instance_data->control;
-
-	attrs_ctrl_regs_exist[reg_num] = true;
-	reg_num++;
-	control->reg_0 = kzalloc(sizeof(union f54_ad_control_0), GFP_KERNEL);
-	if (!control->reg_0) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	control->reg_0->address = next_loc;
-	next_loc++;
-
-	if (instance_data->query.touch_controller_family == 0
-			|| instance_data->query.touch_controller_family == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_1 = kzalloc(sizeof(union f54_ad_control_1),
-								GFP_KERNEL);
-		if (!control->reg_1) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_1->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	attrs_ctrl_regs_exist[reg_num] = true;
-	reg_num++;
-	control->reg_2 = kzalloc(sizeof(union f54_ad_control_2), GFP_KERNEL);
-	if (!control->reg_2) {
-		dev_err(&fc->dev, "Failed to allocate control registers.");
-		return -ENOMEM;
-	}
-	control->reg_2->address = next_loc += 2;
-
-	if (instance_data->query.has_pixel_touch_threshold_adjustment == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-
-		control->reg_3 = kzalloc(sizeof(union f54_ad_control_3),
-								GFP_KERNEL);
-		if (!control->reg_3) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_3->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.touch_controller_family == 0
-		|| instance_data->query.touch_controller_family == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_4__6 = kzalloc(sizeof(union f54_ad_control_4__6),
-								GFP_KERNEL);
-		if (!control->reg_4__6) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_4__6->address = next_loc;
-		next_loc+=3;
-	}
-	reg_num++;
-
-	if (instance_data->query.touch_controller_family == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_7 = kzalloc(sizeof(union f54_ad_control_7),
-								GFP_KERNEL);
-		if (!control->reg_7) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_7->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.touch_controller_family == 0
-		|| instance_data->query.touch_controller_family == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_8__9 = kzalloc(sizeof(union f54_ad_control_8__9),
-								GFP_KERNEL);
-		if (!control->reg_8__9) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_8__9->address = next_loc;
-		next_loc+=sizeof(control->reg_8__9->regs);
-	}
-	reg_num++;
-
-	if (instance_data->query.has_interference_metric == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_10 = kzalloc(sizeof(union f54_ad_control_10),
-								GFP_KERNEL);
-		if (!control->reg_10) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_10->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	/* F54 Control Register 11 is reserved */
-	next_loc++;
-
-	if (instance_data->query.has_relaxation_control == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_12__13 = kzalloc(
-			sizeof(union f54_ad_control_12__13), GFP_KERNEL);
-		if (!control->reg_12__13) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_12__13->address = next_loc;
-		next_loc+=sizeof(control->reg_12__13->regs);
-	}
-	reg_num++;
-
-	if (instance_data->query.has_sensor_assignment == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_14 = kzalloc(sizeof(union f54_ad_control_14),
-								GFP_KERNEL);
-		if (!control->reg_14) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_15 = 
-			kzalloc(sizeof(struct f54_ad_control_15), GFP_KERNEL);
-		if (!control->reg_15) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_15->length = instance_data->query.num_of_rx_electrodes;
-		control->reg_15->regs = 
-				kzalloc(control->reg_15->length
-				* sizeof(struct f54_ad_control_15n), GFP_KERNEL);
-		if (!control->reg_15->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_16 = 
-			kzalloc(sizeof(struct f54_ad_control_16), GFP_KERNEL);
-		if (!control->reg_16) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_16->length = instance_data->query.num_of_tx_electrodes;
-		control->reg_16->regs = 
-				kzalloc(control->reg_16->length
-				* sizeof(struct f54_ad_control_16n), GFP_KERNEL);
-		if (!control->reg_16->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_14->address = next_loc;
-		next_loc++;
-		control->reg_15->address = next_loc;
-		next_loc += control->reg_15->length;
-		control->reg_16->address = next_loc;
-		next_loc += control->reg_16->length;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_sense_frequency_control == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		size = instance_data->query.number_of_sensing_frequencies;
-		
-		control->reg_17 = 
-			kzalloc(sizeof(struct f54_ad_control_17), GFP_KERNEL);
-		if (!control->reg_17) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_17->length = size;
-		control->reg_17->regs = kzalloc(size * sizeof(struct f54_ad_control_17n), GFP_KERNEL);
-		if (!control->reg_17->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_18 = 
-			kzalloc(sizeof(struct f54_ad_control_18), GFP_KERNEL);
-		if (!control->reg_18) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_18->length = size;
-		control->reg_18->regs = kzalloc(size * sizeof(struct f54_ad_control_18n), GFP_KERNEL);
-		if (!control->reg_18->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_19 = 
-			kzalloc(sizeof(struct f54_ad_control_19), GFP_KERNEL);
-		if (!control->reg_19) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_19->length = size;
-		control->reg_19->regs = kzalloc(size * sizeof(struct f54_ad_control_19n), GFP_KERNEL);
-		if (!control->reg_19->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		
-		control->reg_17->address = next_loc;
-		next_loc += size;
-		control->reg_18->address = next_loc;
-		next_loc += size;
-		control->reg_19->address = next_loc;
-		next_loc += size;
-	}
-	reg_num++;
-
-	attrs_ctrl_regs_exist[reg_num] = true;
-	reg_num++;
-	control->reg_20 = kzalloc(sizeof(union f54_ad_control_20), GFP_KERNEL);
-	control->reg_20->address = next_loc;
-	next_loc++;
-
-	if (instance_data->query.has_sense_frequency_control == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_21 = kzalloc(sizeof(union f54_ad_control_21),
-								GFP_KERNEL);
-		control->reg_21->address = next_loc;
-		next_loc += sizeof(control->reg_21->regs);
-	}
-	reg_num++;
-
-	if (instance_data->query.has_sense_frequency_control == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_22__26 = kzalloc(
-			sizeof(union f54_ad_control_22__26), GFP_KERNEL);
-		control->reg_22__26->address = next_loc;
-		next_loc+=sizeof(control->reg_22__26->regs);
-	}
-	reg_num++;
-
-	if (instance_data->query.has_iir_filter == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_27 = kzalloc(sizeof(union f54_ad_control_27),
-								GFP_KERNEL);
-		control->reg_27->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_firmware_noise_mitigation == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_28 = kzalloc(sizeof(union f54_ad_control_28),
-								GFP_KERNEL);
-		control->reg_28->address = next_loc;
-		next_loc += sizeof(control->reg_28->regs);
-	}
-	reg_num++;
-
-	if (instance_data->query.has_cmn_removal == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_29 = kzalloc(sizeof(union f54_ad_control_29),
-								GFP_KERNEL);
-		control->reg_29->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_cmn_maximum == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_30 = kzalloc(sizeof(union f54_ad_control_30),
-								GFP_KERNEL);
-		control->reg_30->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_touch_hysteresis == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_31 = kzalloc(sizeof(union f54_ad_control_31),
-								GFP_KERNEL);
-		control->reg_31->address = next_loc;
-		next_loc++;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_interference_metric == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		control->reg_32__35 = kzalloc(
-			sizeof(union f54_ad_control_32__35), GFP_KERNEL);
-		control->reg_32__35->address = next_loc;
-		next_loc += 8;
-	}
-	reg_num++;
-
-	if (instance_data->query.curve_compensation_mode == 1) {
-		size = max(instance_data->query.num_of_rx_electrodes,
-				instance_data->query.num_of_tx_electrodes);
-	}
-	if (instance_data->query.curve_compensation_mode == 2)
-		size = instance_data->query.num_of_rx_electrodes;
-	if (instance_data->query.curve_compensation_mode == 1
-			|| instance_data->query.curve_compensation_mode == 2) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		
-		control->reg_36 = 
-			kzalloc(sizeof(struct f54_ad_control_36), GFP_KERNEL);
-		if (!control->reg_36) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_36->length = size;
-		control->reg_36->regs = kzalloc(size * sizeof(struct f54_ad_control_36n), GFP_KERNEL);
-		if (!control->reg_36->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-
-		control->reg_36->address = next_loc;
-		next_loc += size;
-	}
-	reg_num++;
-
-	if (instance_data->query.curve_compensation_mode == 2) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		
-		control->reg_37 = 
-			kzalloc(sizeof(struct f54_ad_control_37), GFP_KERNEL);
-		if (!control->reg_37) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_37->length = instance_data->query.num_of_tx_electrodes;
-		control->reg_37->regs = kzalloc(control->reg_37->length
-					* sizeof(struct f54_ad_control_37n), GFP_KERNEL);
-		if (!control->reg_37->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-
-		control->reg_37->address = next_loc;
-		next_loc += control->reg_37->length;
-	}
-	reg_num++;
-
-	if (instance_data->query.has_per_frequency_noise_control == 1) {
-		attrs_ctrl_regs_exist[reg_num] = true;
-		
-		control->reg_38 = 
-			kzalloc(sizeof(struct f54_ad_control_38), GFP_KERNEL);
-		if (!control->reg_38) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_38->length = instance_data->query.number_of_sensing_frequencies;
-		control->reg_38->regs = kzalloc(control->reg_38->length
-							* sizeof(struct f54_ad_control_38n), GFP_KERNEL);
-		if (!control->reg_38->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-
-		control->reg_39 = 
-			kzalloc(sizeof(struct f54_ad_control_39), GFP_KERNEL);
-		if (!control->reg_39) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_39->length = instance_data->query.number_of_sensing_frequencies;
-		control->reg_39->regs = kzalloc(control->reg_39->length
-					* sizeof(struct f54_ad_control_39n), GFP_KERNEL);
-		if (!control->reg_39->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-
-		control->reg_40 = 
-			kzalloc(sizeof(struct f54_ad_control_40), GFP_KERNEL);
-		if (!control->reg_40) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-		control->reg_40->length = instance_data->query.number_of_sensing_frequencies;
-		control->reg_40->regs = kzalloc(control->reg_40->length
-					* sizeof(struct f54_ad_control_40n), GFP_KERNEL);
-		if (!control->reg_40->regs) {
-			dev_err(&fc->dev, "Failed to allocate control registers.");
-			return -ENOMEM;
-		}
-
-		control->reg_38->address = next_loc;
-		next_loc += control->reg_38->length;
-		control->reg_39->address = next_loc;
-		next_loc += control->reg_39->length;
-		control->reg_40->address = next_loc;
-		next_loc += control->reg_40->length;
-	}
-	reg_num++;
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-	mutex_init(&instance_data->data_mutex);
-
-	mutex_init(&instance_data->status_mutex);
-
-	mutex_init(&instance_data->control_mutex);
-	
-	return retval;
-}
-
-static void set_report_size(struct rmi_fn_54_data *data)
-{
-	u8 rx = data->query.num_of_rx_electrodes;
-	u8 tx = data->query.num_of_tx_electrodes;
-	switch (data->report_type) {
-	case F54_8BIT_IMAGE:
-		data->report_size = rx * tx;
-		break;
-	case F54_16BIT_IMAGE:
-	case F54_RAW_16BIT_IMAGE:
-	case F54_TRUE_BASELINE:
-	case F54_FULL_RAW_CAP:
-	case F54_FULL_RAW_CAP_RX_COUPLING_COMP:
-		data->report_size = 2 * rx * tx;
-		break;
-	case F54_HIGH_RESISTANCE:
-		data->report_size = RMI_54_HIGH_RESISTANCE_SIZE;
-		break;
-	case F54_FULL_RAW_CAP_MIN_MAX:
-		data->report_size = RMI_54_FULL_RAW_CAP_MIN_MAX_SIZE;
-		break;
-	case F54_TX_TO_TX_SHORT:
-	case F54_TX_OPEN:
-	case F54_TX_TO_GROUND:
-		data->report_size =  (tx + 7) / 8;
-		break;
-	case F54_RX_TO_RX1:
-	case F54_RX_OPENS1:
-		if (rx < tx)
-			data->report_size = 2 * rx * rx;
-		else
-			data->report_size = 2 * rx * tx;
-		break;
-	case F54_RX_TO_RX2:
-	case F54_RX_OPENS2:
-		if (rx <= tx)
-			data->report_size = 0;
-		else
-			data->report_size = 2 * rx * (rx - tx);
-		break;
-	default:
-		data->report_size = 0;
-	}
-}
-
-int rmi_f54_attention(struct rmi_function_container *fc, u8 *irq_bits)
-{
-	struct rmi_driver *driver = fc->rmi_dev->driver;
-	char fifo[2];
-	struct rmi_fn_54_data *data = fc->data;
-	int error = 0;
-
-	set_report_size(data);
-	if (data->report_size == 0) {
-		dev_err(&fc->dev, "Invalid report type set in %s. "
-				"This should never happen.\n", __func__);
-		error = -EINVAL;
-		goto error_exit;
-	}
-	/*
-	 * We need to ensure the buffer is big enough. A Buffer size of 0 means
-	 * that the buffer has not been allocated.
-	 */
-	if (data->bufsize < data->report_size) {
-		mutex_lock(&data->data_mutex);
-		if (data->bufsize > 0)
-			kfree(data->report_data);
-		data->report_data = kzalloc(data->report_size, GFP_KERNEL);
-		if (!data->report_data) {
-			dev_err(&fc->dev, "Failed to allocate report_data.\n");
-			error = -ENOMEM;
-			data->bufsize = 0;
-			mutex_unlock(&data->data_mutex);
-			goto error_exit;
-		}
-		data->bufsize = data->report_size;
-		mutex_unlock(&data->data_mutex);
-	}
-	dev_vdbg(&fc->dev, "F54 Interrupt handler is running.\nSize: %d\n",
-		 data->report_size);
-	/* Write 0 to fifohi and fifolo. */
-	fifo[0] = 0;
-	fifo[1] = 0;
-	error = rmi_write_block(fc->rmi_dev, fc->fd.data_base_addr
-				+ RMI_F54_FIFO_OFFSET, fifo,	sizeof(fifo));
-	if (error < 0)
-		dev_err(&fc->dev, "Failed to write fifo to zero!\n");
-	else
-		error = rmi_read_block(fc->rmi_dev,
-			fc->fd.data_base_addr + RMI_F54_REPORT_DATA_OFFSET,
-			data->report_data, data->report_size);
-	if (error < 0)
-		dev_err(&fc->dev, "F54 data read failed. Code: %d.\n", error);
-	else if (error != data->report_size) {
-		error = -EINVAL;
-		goto error_exit;
-	}
-#if RAW_HEX
-	int l;
-	/* Debugging: Print out the file in hex. */
-	pr_info("Report data (raw hex):\n");
-	for (l = 0; l < data->report_size; l += 2) {
-		pr_info("%03d: 0x%02x%02x\n", l/2,
-			data->report_data[l+1], data->report_data[l]);
-	}
-#endif
-#if HUMAN_READABLE
-	/* Debugging: Print out file in human understandable image */
-	switch (data->report_type) {
-	case F54_16BIT_IMAGE:
-	case F54_RAW_16BIT_IMAGE:
-	case F54_TRUE_BASELINE:
-	case F54_FULL_RAW_CAP:
-	case F54_FULL_RAW_CAP_RX_COUPLING_COMP:
-		pr_info("Report data (Image):\n");
-		int i, j, k;
-		char c[2];
-		short s;
-		k = 0;
-		for (i = 0; i < data->query.num_of_tx_electrodes;
-									i++) {
-			for (j = 0; j <
-			     data->query.num_of_rx_electrodes; j++) {
-				c[0] = data->report_data[k];
-				c[1] = data->report_data[k+1];
-				memcpy(&s, &c, 2);
-				if (s < -64)
-					printk(".");
-				else if (s < 0)
-					printk("-");
-				else if (s > 64)
-					printk("*");
-				else if (s > 0)
-					printk("+");
-				else
-					printk("0");
-				k += 2;
-			}
-			pr_info("\n");
-		}
-		pr_info("EOF\n");
-		break;
-	default:
-		pr_info("Report type %d debug image not supported",
-							data->report_type);
-	}
-#endif
-	error = IDLE;
-error_exit:
-	mutex_lock(&data->status_mutex);
-	/* Turn back on other interupts, if it
-	 * appears that we turned them off. */
-	if (driver->restore_irq_mask) {
-		dev_dbg(&fc->dev, "Restoring interupts!\n");
-		driver->restore_irq_mask(fc->rmi_dev);
-	} else {
-		dev_err(&fc->dev, "No way to restore interrupts!\n");
-	}
-	data->status = error;
-	mutex_unlock(&data->status_mutex);
-	return data->status;
-}
-
-
-#if F54_WATCHDOG
-static void clear_status_worker(struct work_struct *work)
-{
-	struct rmi_fn_54_data *data = container_of(work,
-					struct rmi_fn_54_data, work);
-	struct rmi_function_container *fc = data->fc;
-	struct rmi_driver *driver = fc->rmi_dev->driver;
-	char command;
-	int result;
-
-	mutex_lock(&data->status_mutex);
-	if (data->status == BUSY) {
-		pr_info("F54 Timout Occured: Determining status.\n");
-		result = rmi_read_block(fc->rmi_dev, fc->fd.command_base_addr,
-								&command, 1);
-		if (result < 0) {
-			dev_err(&fc->dev, "Could not read get_report register "
-				"from 0x%04x\n", fc->fd.command_base_addr);
-			data->status = -ETIMEDOUT;
-		} else {
-			if (command & GET_REPORT) {
-				dev_warn(&fc->dev, "Report type unsupported!");
-				data->status = -EINVAL;
-			} else {
-				data->status = -ETIMEDOUT;
-			}
-		}
-		if (driver->restore_irq_mask) {
-			dev_dbg(&fc->dev, "Restoring interupts!\n");
-			driver->restore_irq_mask(fc->rmi_dev);
-		} else {
-			dev_err(&fc->dev, "No way to restore interrupts!\n");
-		}
-	}
-	mutex_unlock(&data->status_mutex);
-}
-
-static enum hrtimer_restart clear_status(struct hrtimer *timer)
-{
-	struct rmi_fn_54_data *data = container_of(timer,
-					struct rmi_fn_54_data, watchdog);
-	schedule_work(&(data->work));
-	return HRTIMER_NORESTART;
-}
-#endif
-
-/* Check if report_type is valid */
-static bool is_report_type_valid(enum f54_report_types reptype)
-{
-	/* Basic checks on report_type to ensure we write a valid type
-	 * to the sensor.
-	 * TODO: Check Query3 to see if some specific reports are
-	 * available. This is currently listed as a reserved register.
-	 */
-	switch (reptype) {
-	case F54_8BIT_IMAGE:
-	case F54_16BIT_IMAGE:
-	case F54_RAW_16BIT_IMAGE:
-	case F54_HIGH_RESISTANCE:
-	case F54_TX_TO_TX_SHORT:
-	case F54_RX_TO_RX1:
-	case F54_TRUE_BASELINE:
-	case F54_FULL_RAW_CAP_MIN_MAX:
-	case F54_RX_OPENS1:
-	case F54_TX_OPEN:
-	case F54_TX_TO_GROUND:
-	case F54_RX_TO_RX2:
-	case F54_RX_OPENS2:
-	case F54_FULL_RAW_CAP:
-	case F54_FULL_RAW_CAP_RX_COUPLING_COMP:
-		return true;
-		break;
-	default:
-		return false;
-	}
-}
-
-/* SYSFS file show/store functions */
-static ssize_t rmi_fn_54_report_type_show(struct device *dev,
-				struct device_attribute *attr, char *buf) {
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->report_type);
-}
-
-static ssize_t rmi_fn_54_report_type_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count) {
-	int result;
-	unsigned long val;
-	unsigned char data;
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	/* need to convert the string data to an actual value */
-	result = strict_strtoul(buf, 10, &val);
-	if (result)
-		return result;
-	if (!is_report_type_valid(val)) {
-		dev_err(dev, "%s : Report type %d is invalid.\n",
-					__func__, (u8) val);
-		return -EINVAL;
-	}
-	mutex_lock(&instance_data->status_mutex);
-	if (instance_data->status != BUSY) {
-		instance_data->report_type = (enum f54_report_types)val;
-		data = (char)val;
-		/* Write the Report Type back to the first Block
-		 * Data registers (F54_AD_Data0). */
-		result =
-		    rmi_write_block(fc->rmi_dev, fc->fd.data_base_addr,
-								&data, 1);
-		mutex_unlock(&instance_data->status_mutex);
-		if (result < 0) {
-			dev_err(dev, "%s : Could not write report type to"
-				" 0x%x\n", __func__, fc->fd.data_base_addr);
-			return result;
-		}
-		return count;
-	} else {
-		dev_err(dev, "%s : Report type cannot be changed in the middle"
-				" of command.\n", __func__);
-		mutex_unlock(&instance_data->status_mutex);
-		return -EINVAL;
-	}
-}
-
-static ssize_t rmi_fn_54_get_report_store(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count) {
-	unsigned long val;
-	int error, result;
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-	struct rmi_driver *driver;
-	u8 command;
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	driver = fc->rmi_dev->driver;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-	if (error)
-		return error;
-	/* Do nothing if not set to 1. This prevents accidental commands. */
-	if (val != 1)
-		return count;
-	command = (unsigned char)GET_REPORT;
-	/* Basic checks on report_type to ensure we write a valid type
-	 * to the sensor.
-	 * TODO: Check Query3 to see if some specific reports are
-	 * available. This is currently listed as a reserved register.
-	 */
-	if (!is_report_type_valid(instance_data->report_type)) {
-		dev_err(dev, "%s : Report type %d is invalid.\n",
-				__func__, instance_data->report_type);
-		return -EINVAL;
-	}
-	mutex_lock(&instance_data->status_mutex);
-	if (instance_data->status != IDLE) {
-		if (instance_data->status != BUSY) {
-			dev_err(dev, "F54 status is in an abnormal state: 0x%x",
-							instance_data->status);
-		}
-		mutex_unlock(&instance_data->status_mutex);
-		return count;
-	}
-	/* Store interrupts */
-	/* Do not exit if we fail to turn off interupts. We are likely
-	 * to still get useful data. The report data can, however, be
-	 * corrupted, and there may be unexpected behavior.
-	 */
-	dev_dbg(dev, "Storing and overriding interupts\n");
-	if (driver->store_irq_mask)
-		driver->store_irq_mask(fc->rmi_dev,
-					fc->irq_mask);
-	else
-		dev_err(dev, "No way to store interupts!\n");
-	instance_data->status = BUSY;
-
-	/* small delay to avoid race condition in firmare. This value is a bit
-	 * higher than absolutely necessary. Should be removed once issue is
-	 * resolved in firmware. */
-
-	mdelay(2);
-
-	/* Write the command to the command register */
-	result = rmi_write_block(fc->rmi_dev, fc->fd.command_base_addr,
-						&command, 1);
-	mutex_unlock(&instance_data->status_mutex);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write command to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return result;
-	}
-#if F54_WATCHDOG
-	/* start watchdog timer */
-	hrtimer_start(&instance_data->watchdog, ktime_set(1, 0),
-							HRTIMER_MODE_REL);
-#endif
-	return count;
-}
-
-static ssize_t rmi_fn_54_force_cal_store(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count) {
-	unsigned long val;
-	int error, result;
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-	struct rmi_driver *driver;
-	u8 command;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	driver = fc->rmi_dev->driver;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-	if (error)
-		return error;
-	/* Do nothing if not set to 1. This prevents accidental commands. */
-	if (val != 1)
-		return count;
-
-	command = (unsigned char)FORCE_CAL;
-
-	if (instance_data->status == BUSY)
-		return -EBUSY;
-	/* Write the command to the command register */
-	result = rmi_write_block(fc->rmi_dev, fc->fd.command_base_addr,
-						&command, 1);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write command to 0x%x\n",
-				__func__, fc->fd.command_base_addr);
-		return result;
-	}
-	return count;
-}
-
-static ssize_t rmi_fn_54_status_show(struct device *dev,
-				struct device_attribute *attr, char *buf) {
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%d\n", instance_data->status);
-}
-
-simple_show_union_struct_unsigned(query, num_of_rx_electrodes)
-simple_show_union_struct_unsigned(query, num_of_tx_electrodes)
-simple_show_union_struct_unsigned(query, has_image16)
-simple_show_union_struct_unsigned(query, has_image8)
-simple_show_union_struct_unsigned(query, has_baseline)
-simple_show_union_struct_unsigned(query, clock_rate)
-simple_show_union_struct_unsigned(query, touch_controller_family)
-simple_show_union_struct_unsigned(query, has_pixel_touch_threshold_adjustment)
-simple_show_union_struct_unsigned(query, has_sensor_assignment)
-simple_show_union_struct_unsigned(query, has_interference_metric)
-simple_show_union_struct_unsigned(query, has_sense_frequency_control)
-simple_show_union_struct_unsigned(query, has_firmware_noise_mitigation)
-simple_show_union_struct_unsigned(query, has_two_byte_report_rate)
-simple_show_union_struct_unsigned(query, has_one_byte_report_rate)
-simple_show_union_struct_unsigned(query, has_relaxation_control)
-simple_show_union_struct_unsigned(query, curve_compensation_mode)
-simple_show_union_struct_unsigned(query, has_iir_filter)
-simple_show_union_struct_unsigned(query, has_cmn_removal)
-simple_show_union_struct_unsigned(query, has_cmn_maximum)
-simple_show_union_struct_unsigned(query, has_touch_hysteresis)
-simple_show_union_struct_unsigned(query, has_edge_compensation)
-simple_show_union_struct_unsigned(query, has_per_frequency_noise_control)
-simple_show_union_struct_unsigned(query, number_of_sensing_frequencies)
-
-static ssize_t rmi_fn_54_no_auto_cal_show(struct device *dev,
-				struct device_attribute *attr, char *buf) {
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *data;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-
-	return snprintf(buf, PAGE_SIZE, "%u\n",
-				data->no_auto_cal ? 1 : 0);
-}
-
-static ssize_t rmi_fn_54_no_auto_cal_store(struct device *dev,
-				struct device_attribute *attr,
-				const char *buf, size_t count) {
-	int result;
-	unsigned long val;
-	unsigned char data;
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	/* need to convert the string data to an actual value */
-	result = strict_strtoul(buf, 10, &val);
-
-	/* if an error occured, return it */
-	if (result)
-		return result;
-	/* Do nothing if not 0 or 1. This prevents accidental commands. */
-	if (val > 1)
-		return -EINVAL;
-	/* Read current control values */
-	result =
-	    rmi_read_block(fc->rmi_dev, fc->fd.control_base_addr, &data, 1);
-
-	/* if the current control registers are already set as we want them, do
-	 * nothing to them */
-	if ((data & NO_AUTO_CAL_MASK) == val)
-		return count;
-	/* Write the control back to the control register (F54_AD_Ctrl0)
-	 * Ignores everything but bit 0 */
-	data = (data & ~NO_AUTO_CAL_MASK) | (val & NO_AUTO_CAL_MASK);
-	result =
-	    rmi_write_block(fc->rmi_dev, fc->fd.control_base_addr, &data, 1);
-	if (result < 0) {
-		dev_err(dev, "%s : Could not write control to 0x%x\n",
-		       __func__, fc->fd.control_base_addr);
-		return result;
-	}
-	/* update our internal representation iff the write succeeds */
-	instance_data->no_auto_cal = (val == 1);
-	return count;
-}
-
-static ssize_t rmi_fn_54_fifoindex_show(struct device *dev,
-				  struct device_attribute *attr, char *buf) {
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-	struct rmi_driver *driver;
-	unsigned char temp_buf[2];
-	int retval;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	driver = fc->rmi_dev->driver;
-
-	/* Read fifoindex from device */
-	retval = rmi_read_block(fc->rmi_dev,
-				fc->fd.data_base_addr + RMI_F54_FIFO_OFFSET,
-				temp_buf, ARRAY_SIZE(temp_buf));
-
-	if (retval < 0) {
-		dev_err(dev, "Could not read fifoindex from 0x%04x\n",
-		       fc->fd.data_base_addr + RMI_F54_FIFO_OFFSET);
-		return retval;
-	}
-	batohs(&instance_data->fifoindex, temp_buf);
-	return snprintf(buf, PAGE_SIZE, "%u\n", instance_data->fifoindex);
-}
-static ssize_t rmi_fn_54_fifoindex_store(struct device *dev,
-					struct device_attribute *attr,
-					const char *buf,
-					size_t count)
-{
-	int error;
-	unsigned long val;
-	unsigned char data[2];
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-
-	/* need to convert the string data to an actual value */
-	error = strict_strtoul(buf, 10, &val);
-
-	if (error)
-		return error;
-
-	instance_data->fifoindex = val;
-
-	/* Write the FifoIndex back to the first data registers. */
-	hstoba(data, (unsigned short)val);
-
-	error = rmi_write_block(fc->rmi_dev,
-				fc->fd.data_base_addr + RMI_F54_FIFO_OFFSET,
-				data,
-				ARRAY_SIZE(data));
-
-	if (error < 0) {
-		dev_err(dev, "%s : Could not write fifoindex to 0x%x\n",
-		       __func__, fc->fd.data_base_addr + RMI_F54_FIFO_OFFSET);
-		return error;
-	}
-	return count;
-}
-
-/* Provide access to last report */
-#ifdef KERNEL_VERSION_ABOVE_2_6_32
-static ssize_t rmi_fn_54_data_read(struct file *data_file, struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf, loff_t pos, size_t count)
-#else
-static ssize_t rmi_fn_54_data_read(struct kobject *kobj,
-				struct bin_attribute *attributes,
-				char *buf, loff_t pos, size_t count)
-#endif
-{
-	struct device *dev;
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *instance_data;
-
-	dev = container_of(kobj, struct device, kobj);
-	fc = to_rmi_function_container(dev);
-	instance_data = fc->data;
-	mutex_lock(&instance_data->data_mutex);
-	if (count < instance_data->report_size) {
-		dev_err(dev,
-			"%s: F54 report size too large for buffer: %d."
-				" Need at least: %d for Report type: %d.\n",
-			__func__, count, instance_data->report_size,
-			instance_data->report_type);
-		mutex_unlock(&instance_data->data_mutex);
-		return -EINVAL;
-	}
-	if (instance_data->report_data) {
-		/* Copy data from instance_data to buffer */
-		memcpy(buf, instance_data->report_data,
-					instance_data->report_size);
-		mutex_unlock(&instance_data->data_mutex);
-		dev_dbg(dev, "%s: Presumably successful.", __func__);
-		return instance_data->report_size;
-	} else {
-		dev_err(dev, "%s: F54 report_data does not exist!\n", __func__);
-		mutex_unlock(&instance_data->data_mutex);
-		return -EINVAL;
-	}
-}
-
-/* Repeated Register sysfs functions */
-show_repeated_union_struct_unsigned(control, reg_15, sensor_rx_assignment)
-show_repeated_union_struct_unsigned(control, reg_16, sensor_tx_assignment)
-
-show_repeated_union_struct_unsigned(control, reg_17, filter_bandwidth)
-show_repeated_union_struct_unsigned(control, reg_17, disable)
-
-
-static ssize_t rmi_fn_54_burst_count_show(struct device *dev,
-					struct device_attribute *attr,
-					char *buf) {
-	struct rmi_function_container *fc;
-	struct rmi_fn_54_data *data;
-	int result, size = 0;
-	char *temp;
-	int i;
-
-	fc = to_rmi_function_container(dev);
-	data = fc->data;
-	mutex_lock(&data->control_mutex);
-	/* Read current control values */
-	result = rmi_read_block(fc->rmi_dev, data->control.reg_17->address,
-			(u8 *) data->control.reg_17->regs,
-			data->control.reg_17->length * sizeof(u8));
-	if (result < 0) {
-		dev_err(dev, "%s : Could not read control at 0x%x\n"
-					"Data may be outdated.", __func__,
-					data->control.reg_17->address);
-	}
-
-	result = rmi_read_block(fc->rmi_dev, data->control.reg_18->address,
-			(u8 *)data->control.reg_18->regs,
-			data->control.reg_18->length * sizeof(u8));
-	if (result < 0) {
-		dev_err(dev, "%s : Could not read control at 0x%x\n"
-					"Data may be outdated.", __func__,
-					data->control.reg_18->address);
-	}
-	mutex_unlock(&data->control_mutex);
-	temp = buf;
-	for (i = 0; i < data->control.reg_17->length; i++) {
-		result = snprintf(temp, PAGE_SIZE - size, "%u ",
-			(1<<8) * data->control.reg_17->regs[i].burst_countb10__8
-				+ data->control.reg_18->regs[i].burst_countb7__0n);
-		size += result;
-		temp += result;
-	}
-	return size + snprintf(temp, PAGE_SIZE - size, "\n");
-}
-
-show_repeated_union_struct_unsigned(control, reg_19, stretch_duration)
-show_store_repeated_union_struct_unsigned(control, reg_36, axis1_comp)
-show_store_repeated_union_struct_unsigned(control, reg_37, axis2_comp)
-
-show_repeated_union_struct_unsigned(control, reg_38, noise_control_1)
-show_repeated_union_struct_unsigned(control, reg_39, noise_control_2)
-show_repeated_union_struct_unsigned(control, reg_40, noise_control_3)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-
-show_store_union_struct_unsigned(control, reg_0, no_relax)
-show_store_union_struct_unsigned(control, reg_0, no_scan)
-show_store_union_struct_unsigned(control, reg_1, bursts_per_cluster)
-show_store_union_struct_unsigned(control, reg_2, saturation_cap)
-show_store_union_struct_unsigned(control, reg_3, pixel_touch_threshold)
-show_store_union_struct_unsigned(control, reg_4__6, rx_feedback_cap)
-show_store_union_struct_unsigned(control, reg_4__6, low_ref_cap)
-show_store_union_struct_unsigned(control, reg_4__6, low_ref_feedback_cap)
-show_store_union_struct_unsigned(control, reg_4__6, low_ref_polarity)
-show_store_union_struct_unsigned(control, reg_4__6, high_ref_cap)
-show_store_union_struct_unsigned(control, reg_4__6, high_ref_feedback_cap)
-show_store_union_struct_unsigned(control, reg_4__6, high_ref_polarity)
-show_store_union_struct_unsigned(control, reg_7, cbc_cap)
-show_store_union_struct_unsigned(control, reg_7, cbc_polarity)
-show_store_union_struct_unsigned(control, reg_7, cbc_tx_carrier_selection)
-show_store_union_struct_unsigned(control, reg_8__9, integration_duration)
-show_store_union_struct_unsigned(control, reg_8__9, reset_duration)
-show_store_union_struct_unsigned(control, reg_10, noise_sensing_bursts_per_image)
-show_store_union_struct_unsigned(control, reg_12__13, slow_relaxation_rate)
-show_store_union_struct_unsigned(control, reg_12__13, fast_relaxation_rate)
-show_store_union_struct_unsigned(control, reg_14, rxs_on_xaxis)
-show_store_union_struct_unsigned(control, reg_14, curve_comp_on_txs)
-show_store_union_struct_unsigned(control, reg_20, disable_noise_mitigation)
-show_store_union_struct_unsigned(control, reg_21, freq_shift_noise_threshold)
-show_store_union_struct_unsigned(control, reg_22__26, noise_density_threshold)
-show_store_union_struct_unsigned(control, reg_22__26, medium_noise_threshold)
-show_store_union_struct_unsigned(control, reg_22__26, high_noise_threshold)
-show_store_union_struct_unsigned(control, reg_22__26, noise_density)
-show_store_union_struct_unsigned(control, reg_22__26, frame_count)
-show_store_union_struct_unsigned(control, reg_27, iir_filter_coef)
-show_store_union_struct_unsigned(control, reg_28, quiet_threshold)
-show_store_union_struct_unsigned(control, reg_29, cmn_filter_disable)
-show_store_union_struct_unsigned(control, reg_30, cmn_filter_max)
-show_store_union_struct_unsigned(control, reg_31, touch_hysteresis)
-show_store_union_struct_unsigned(control, reg_32__35, rx_low_edge_comp)
-show_store_union_struct_unsigned(control, reg_32__35, rx_high_edge_comp)
-show_store_union_struct_unsigned(control, reg_32__35, tx_low_edge_comp)
-show_store_union_struct_unsigned(control, reg_32__35, tx_high_edge_comp)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-static struct rmi_function_handler function_handler = {
-	.func = 0x54,
-	.init = rmi_f54_init,
-	.config = NULL,
-	.reset = rmi_f54_reset,
-	.attention = rmi_f54_attention,
-	.remove = rmi_f54_remove
-};
-
-static int __init rmi_f54_module_init(void)
-{
-	int error;
-
-	error = rmi_register_function_driver(&function_handler);
-	if (error < 0) {
-		pr_err("%s: register failed!\n", __func__);
-		return error;
-	}
-	return 0;
-}
-
-static void rmi_f54_module_exit(void)
-{
-	rmi_unregister_function_driver(&function_handler);
-}
-
-module_init(rmi_f54_module_init);
-module_exit(rmi_f54_module_exit);
-
-MODULE_AUTHOR("Daniel Rosenberg <daniel.rosenberg@synaptics.com>");
-MODULE_DESCRIPTION("RMI F54 module");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_i2c.c b/drivers/input/touchscreen/rmi4/rmi_i2c.c
deleted file mode 100755
index 52c308fd0f40f..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_i2c.c
+++ /dev/null
@@ -1,453 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#define COMMS_DEBUG 0
-
-#define IRQ_DEBUG 0
-
-#if COMMS_DEBUG || IRQ_DEBUG
-#define DEBUG
-#endif
-
-#include <linux/kernel.h>
-#include <linux/lockdep.h>
-#include <linux/module.h>
-#include <linux/i2c.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/pm.h>
-#include <linux/gpio.h>
-#include <linux/rmi.h>
-#include "rmi_driver.h"
-#define RMI_PAGE_SELECT_REGISTER 0xff
-#define RMI_I2C_PAGE(addr) (((addr) >> 8) & 0xff)
-#ifndef CONFIG_RMI4_I2C_SCL_RATE
-#define CONFIG_RMI4_I2C_SCL_RATE 100000  // 100kHz
-#endif
-
-
-static char *phys_proto_name = "i2c";
-
-struct rmi_i2c_data {
-	struct mutex page_mutex;
-	int page;
-	int enabled;
-	int irq;
-	int irq_flags;
-	struct rmi_phys_device *phys;
-};
-
-static irqreturn_t rmi_i2c_irq_thread(int irq, void *p)
-{
-	struct rmi_phys_device *phys = p;
-	struct rmi_device *rmi_dev = phys->rmi_dev;
-	struct rmi_driver *driver = rmi_dev->driver;
-	struct rmi_device_platform_data *pdata = phys->dev->platform_data;
-
-#if IRQ_DEBUG
-	dev_dbg(phys->dev, "ATTN gpio, value: %d.\n",
-			gpio_get_value(pdata->attn_gpio));
-#endif
-	if (gpio_get_value(pdata->attn_gpio) == pdata->attn_polarity) {
-		phys->info.attn_count++;
-		if (driver && driver->irq_handler && rmi_dev)
-			driver->irq_handler(rmi_dev, irq);
-	}
-
-	return IRQ_HANDLED;
-}
-
-/*
- * rmi_set_page - Set RMI page
- * @phys: The pointer to the rmi_phys_device struct
- * @page: The new page address.
- *
- * RMI devices have 16-bit addressing, but some of the physical
- * implementations (like SMBus) only have 8-bit addressing. So RMI implements
- * a page address at 0xff of every page so we can reliable page addresses
- * every 256 registers.
- *
- * The page_mutex lock must be held when this function is entered.
- *
- * Returns zero on success, non-zero on failure.
- */
-static int rmi_set_page(struct rmi_phys_device *phys, unsigned int page)
-{
-	struct i2c_client *client = to_i2c_client(phys->dev);
-	struct rmi_i2c_data *data = phys->data;
-	char txbuf[2] = {RMI_PAGE_SELECT_REGISTER, page};
-	int retval;
-
-#if COMMS_DEBUG
-	dev_dbg(&client->dev, "RMI4 I2C writes 3 bytes: %02x %02x\n",
-		txbuf[0], txbuf[1]);
-#endif
-	phys->info.tx_count++;
-	phys->info.tx_bytes += sizeof(txbuf);
-	retval = i2c_master_normal_send(client, txbuf, sizeof(txbuf), CONFIG_RMI4_I2C_SCL_RATE);
-	if (retval != sizeof(txbuf)) {
-		phys->info.tx_errs++;
-		dev_err(&client->dev,
-			"%s: set page failed: %d.", __func__, retval);
-		return (retval < 0) ? retval : -EIO;
-	}
-	data->page = page;
-	return 0;
-}
-
-int rmi_i2c_write_block(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			       int len)
-{
-	struct i2c_client *client = to_i2c_client(phys->dev);
-	struct rmi_i2c_data *data = phys->data;
-	u8 txbuf[len + 1];
-	int retval;
-#if	COMMS_DEBUG
-	int i;
-#endif
-
-	txbuf[0] = addr & 0xff;
-	memcpy(txbuf + 1, buf, len);
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_I2C_PAGE(addr) != data->page) {
-		retval = rmi_set_page(phys, RMI_I2C_PAGE(addr));
-		if (retval < 0)
-			goto exit;
-	}
-
-#if COMMS_DEBUG
-	dev_dbg(&client->dev, "RMI4 I2C writes %d bytes: ", sizeof(txbuf));
-	for (i = 0; i < sizeof(txbuf); i++)
-		dev_dbg(&client->dev, "%02x ", txbuf[i]);
-	dev_dbg(&client->dev, "\n");
-#endif
-
-	phys->info.tx_count++;
-	phys->info.tx_bytes += sizeof(txbuf);
-	retval = i2c_master_normal_send(client, txbuf, sizeof(txbuf), CONFIG_RMI4_I2C_SCL_RATE);
-	if (retval < 0)
-		phys->info.tx_errs++;
-	else
-		retval--; /* don't count the address byte */
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return retval;
-}
-
-static int rmi_i2c_write(struct rmi_phys_device *phys, u16 addr, u8 data)
-{
-	int retval = rmi_i2c_write_block(phys, addr, &data, 1);
-	return (retval < 0) ? retval : 0;
-}
-
-int rmi_i2c_read_block(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			      int len)
-{
-	struct i2c_client *client = to_i2c_client(phys->dev);
-	struct rmi_i2c_data *data = phys->data;
-	u8 txbuf[1] = {addr & 0xff};
-	int retval;
-#if	COMMS_DEBUG
-	int i;
-#endif
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_I2C_PAGE(addr) != data->page) {
-		retval = rmi_set_page(phys, RMI_I2C_PAGE(addr));
-		if (retval < 0)
-			goto exit;
-	}
-
-#if COMMS_DEBUG
-	dev_dbg(&client->dev, "RMI4 I2C writes 1 bytes: %02x\n", txbuf[0]);
-#endif
-	phys->info.tx_count++;
-	phys->info.tx_bytes += sizeof(txbuf);
-	retval = i2c_master_normal_send(client, txbuf, sizeof(txbuf), CONFIG_RMI4_I2C_SCL_RATE);
-	if (retval != sizeof(txbuf)) {
-		phys->info.tx_errs++;
-		retval = (retval < 0) ? retval : -EIO;
-		goto exit;
-	}
-
-	retval = i2c_master_normal_recv(client, buf, len, CONFIG_RMI4_I2C_SCL_RATE);
-
-	phys->info.rx_count++;
-	phys->info.rx_bytes += len;
-	if (retval < 0)
-		phys->info.rx_errs++;
-#if COMMS_DEBUG
-	else {
-		dev_dbg(&client->dev, "RMI4 I2C received %d bytes: ", len);
-		for (i = 0; i < len; i++)
-			dev_dbg(&client->dev, "%02x ", buf[i]);
-		dev_dbg(&client->dev, "\n");
-	}
-#endif
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return retval;
-}
-
-static int rmi_i2c_read(struct rmi_phys_device *phys, u16 addr, u8 *buf)
-{
-	int retval = rmi_i2c_read_block(phys, addr, buf, 1);
-	return (retval < 0) ? retval : 0;
-}
-
-static int acquire_attn_irq(struct rmi_i2c_data *data)
-{
-	return request_threaded_irq(data->irq, NULL, rmi_i2c_irq_thread,
-			data->irq_flags, dev_name(data->phys->dev), data->phys);
-}
-
-static int enable_device(struct rmi_phys_device *phys)
-{
-	int retval = 0;
-
-	struct rmi_i2c_data *data = phys->data;
-
-	if (data->enabled)
-		return 0;
-
-	retval = acquire_attn_irq(data);
-	if (retval)
-		goto error_exit;
-
-	data->enabled = true;
-	dev_dbg(phys->dev, "Physical device enabled.\n");
-	return 0;
-
-error_exit:
-	dev_err(phys->dev, "Failed to enable physical device. Code=%d.\n",
-		retval);
-	return retval;
-}
-
-static void disable_device(struct rmi_phys_device *phys)
-{
-	struct rmi_i2c_data *data = phys->data;
-
-	if (!data->enabled)
-		return;
-
-	disable_irq(data->irq);
-	free_irq(data->irq, data->phys);
-
-	dev_dbg(phys->dev, "Physical device disabled.\n");
-	data->enabled = false;
-}
-
-void CompleteReflash(struct rmi_phys_device *phys);
-
-static int __devinit rmi_i2c_probe(struct i2c_client *client,
-				  const struct i2c_device_id *id)
-{
-	struct rmi_phys_device *rmi_phys;
-	struct rmi_i2c_data *data;
-	struct rmi_device_platform_data *pdata = client->dev.platform_data;
-	int error;
-
-	if (!pdata) {
-		dev_err(&client->dev, "no platform data\n");
-		return -EINVAL;
-	}
-	pr_info("%s: Probing %s at %#02x (IRQ %d).\n", __func__,
-		pdata->sensor_name ? pdata->sensor_name : "-no name-",
-		client->addr, pdata->attn_gpio);
-
-	error = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
-	if (!error) {
-		dev_err(&client->dev, "i2c_check_functionality error %d.\n",
-			error);
-		return error;
-	}
-
-	rmi_phys = kzalloc(sizeof(struct rmi_phys_device), GFP_KERNEL);
-	if (!rmi_phys)
-		return -ENOMEM;
-
-	data = kzalloc(sizeof(struct rmi_i2c_data), GFP_KERNEL);
-	if (!data) {
-		error = -ENOMEM;
-		goto err_phys;
-	}
-
-	data->enabled = true;	/* We plan to come up enabled. */
-	data->irq = gpio_to_irq(pdata->attn_gpio);
-	if (pdata->level_triggered) {
-		data->irq_flags = IRQF_ONESHOT |
-			((pdata->attn_polarity == RMI_ATTN_ACTIVE_HIGH) ?
-			IRQF_TRIGGER_HIGH : IRQF_TRIGGER_LOW);
-	} else {
-		data->irq_flags =
-			(pdata->attn_polarity == RMI_ATTN_ACTIVE_HIGH) ?
-			IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
-	}
-	data->phys = rmi_phys;
-
-	rmi_phys->data = data;
-	rmi_phys->dev = &client->dev;
-
-	rmi_phys->write = rmi_i2c_write;
-	rmi_phys->write_block = rmi_i2c_write_block;
-	rmi_phys->read = rmi_i2c_read;
-	rmi_phys->read_block = rmi_i2c_read_block;
-	rmi_phys->enable_device = enable_device;
-	rmi_phys->disable_device = disable_device;
-
-	rmi_phys->info.proto = phys_proto_name;
-
-	mutex_init(&data->page_mutex);
-
-	/* Setting the page to zero will (a) make sure the PSR is in a
-	 * known state, and (b) make sure we can talk to the device.
-	 */
-	error = rmi_set_page(rmi_phys, 0);
-	if (error) {
-		dev_err(&client->dev, "Failed to set page select to 0.\n");
-		goto err_data;
-	}
-
-	if (pdata->gpio_config) {
-		error = pdata->gpio_config(pdata->gpio_data, true);
-		if (error < 0) {
-			dev_err(&client->dev, "failed to setup irq %d\n",
-				pdata->attn_gpio);
-			goto err_data;
-		}
-	}
-
-	error = rmi_register_phys_device(rmi_phys);
-	if (error) {
-		dev_err(&client->dev,
-			"failed to register physical driver at 0x%.2X.\n",
-			client->addr);
-		goto err_gpio;
-	}
-	i2c_set_clientdata(client, rmi_phys);
-
-	if (pdata->attn_gpio > 0) {
-		error = acquire_attn_irq(data);
-		if (error < 0) {
-			dev_err(&client->dev,
-				"request_threaded_irq failed %d\n",
-				pdata->attn_gpio);
-			goto err_unregister;
-		}
-	}
-
-#if defined(CONFIG_RMI4_DEV)
-	error = gpio_export(pdata->attn_gpio, false);
-	if (error) {
-		dev_warn(&client->dev, "%s: WARNING: Failed to "
-				 "export ATTN gpio!\n", __func__);
-		error = 0;
-	} else {
-		error = gpio_export_link(&(rmi_phys->rmi_dev->dev), "attn",
-					pdata->attn_gpio);
-		if (error) {
-			dev_warn(&(rmi_phys->rmi_dev->dev),
-				 "%s: WARNING: Failed to symlink ATTN gpio!\n",
-				 __func__);
-			error = 0;
-		} else {
-			dev_info(&(rmi_phys->rmi_dev->dev),
-				"%s: Exported GPIO %d.", __func__,
-				pdata->attn_gpio);
-		}
-	}
-#endif /* CONFIG_RMI4_DEV */
-
-	dev_info(&client->dev, "registered rmi i2c driver at 0x%.2X.\n",
-			client->addr);
-	//reflash the new firmware revision  hhb@rock-chips.com
-#ifdef	CONFIG_RMI4_REFLASH_WHEN_BOOT
-	CompleteReflash(rmi_phys);
-#endif
-	return 0;
-
-err_unregister:
-	rmi_unregister_phys_device(rmi_phys);
-err_gpio:
-	if (pdata->gpio_config)
-		pdata->gpio_config(pdata->gpio_data, false);
-err_data:
-	kfree(data);
-err_phys:
-	kfree(rmi_phys);
-	return error;
-}
-
-static int __devexit rmi_i2c_remove(struct i2c_client *client)
-{
-	struct rmi_phys_device *phys = i2c_get_clientdata(client);
-	struct rmi_device_platform_data *pd = client->dev.platform_data;
-
-	disable_device(phys);
-	rmi_unregister_phys_device(phys);
-	kfree(phys->data);
-	kfree(phys);
-
-	if (pd->gpio_config)
-		pd->gpio_config(&pd->gpio_data, false);
-
-	return 0;
-}
-
-static const struct i2c_device_id rmi_id[] = {
-	{ "rmi", 0 },
-	{ "rmi_i2c", 0 },
-	{ }
-};
-MODULE_DEVICE_TABLE(i2c, rmi_id);
-
-static struct i2c_driver rmi_i2c_driver = {
-	.driver = {
-		.owner	= THIS_MODULE,
-		.name	= "rmi_i2c"
-	},
-	.id_table	= rmi_id,
-	.probe		= rmi_i2c_probe,
-	.remove		= __devexit_p(rmi_i2c_remove),
-};
-
-static int __init rmi_i2c_init(void)
-{
-	return i2c_add_driver(&rmi_i2c_driver);
-}
-
-static void __exit rmi_i2c_exit(void)
-{
-	i2c_del_driver(&rmi_i2c_driver);
-}
-
-module_init(rmi_i2c_init);
-module_exit(rmi_i2c_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com>");
-MODULE_DESCRIPTION("RMI I2C driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
diff --git a/drivers/input/touchscreen/rmi4/rmi_reflash.c b/drivers/input/touchscreen/rmi4/rmi_reflash.c
deleted file mode 100644
index c10525f9174f8..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_reflash.c
+++ /dev/null
@@ -1,670 +0,0 @@
-/*
-   +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-   Copyright (c) 2011 Synaptics, Inc.
-
-   Permission is hereby granted, free of charge, to any person obtaining a copy of
-   this software and associated documentation files (the "Software"), to deal in
-   the Software without restriction, including without limitation the rights to use,
-   copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the
-   Software, and to permit persons to whom the Software is furnished to do so,
-   subject to the following conditions:
-
-   The above copyright notice and this permission notice shall be included in all
-   copies or substantial portions of the Software.
-
-   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-   AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-   LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-   OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-   SOFTWARE.
-
-
-   +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-*/
-
-// SynaFirmwareImage.h contains the data for both the entire image and the config block
-//#include "SynaFirmwareImage.h"
-//#include "config.h"
-
-#include <linux/string.h>
-//#include <linux/printk.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/i2c.h>
-#include <linux/rmi.h>
-#include "rmi_reflash.h"
-
-//need
-#define ASSERT 1
-#define  TOUCH_CONTROLLER  "s3202"
-#define FW_REVISION  "DS4 R3.0"
-
-void eraseConfigBlock(void);
-void SynaInitialize(void);
-void SynaReadConfigInfo(void);
-void SynaReadFirmwareInfo(void);
-int TouchControllerTypeCheck(void);
-void SynaEnableFlashing(void);
-int fimrwareRevisionCheck(void);
-void SynaBootloaderLock(void);
-void SynaProgramConfiguration(void);
-void SynaProgramFirmware(void);
-void SynaFinalizeReflash(void);
-void SynaWaitForATTN(void);
-void convertConfigBlockData(void);
-int rmi_i2c_read_block(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			      int len);
-int rmi_i2c_write_block(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			       int len);
-/* Variables for F34 functionality */
-unsigned short SynaF34DataBase;
-unsigned short SynaF34QueryBase;
-unsigned short SynaF01DataBase;
-unsigned short SynaF01CommandBase;
-unsigned short SynaF01QueryBase;
-
-unsigned short SynaF34Reflash_BlockNum;
-unsigned short SynaF34Reflash_BlockData;
-unsigned short SynaF34ReflashQuery_BootID;
-unsigned short SynaF34ReflashQuery_FlashPropertyQuery;
-unsigned short SynaF34ReflashQuery_FirmwareBlockSize;
-unsigned short SynaF34ReflashQuery_FirmwareBlockCount;
-unsigned short SynaF34ReflashQuery_ConfigBlockSize;
-unsigned short SynaF34ReflashQuery_ConfigBlockCount;
-
-unsigned short SynaFirmwareBlockSize;
-unsigned short SynaFirmwareBlockCount;
-unsigned long SynaImageSize;
-
-unsigned short SynaConfigBlockSize;
-unsigned short SynaConfigBlockCount;
-unsigned long SynaConfigImageSize;
-
-unsigned short SynaBootloadID;
-
-unsigned short SynaF34_FlashControl;
-
-unsigned char *SynafirmwareImgData;
-unsigned char *SynaconfigImgData;
-unsigned char *SynalockImgData;
-unsigned int SynafirmwareImgVersion;
-
-unsigned char *ConfigBlock;
-
-unsigned char *ConfigBlockData;
-struct rmi_phys_device *rmi_phys;
-
-
-
-int readRMI(u16 addr, u8 *buf, int len) {
-	rmi_i2c_read_block(rmi_phys, addr, buf, len);
-	return 0;
-}
-
-int writeRMI(u16 addr, u8 *buf, int len) {
-	rmi_i2c_write_block(rmi_phys, addr, buf, len);
-	return 0;
-}
-
-int waitATTN(u8 n, u16 delay) {
-#if 1
-	unsigned char uStatus;
-	do{
-		readRMI((SynaF01DataBase + 1), &uStatus, 1);
-	}while((uStatus & 0x01) == 0);
-#else
-	msleep(1);
-#endif
-	return 0;
-}
-
-/* End: Variables for F34 functionality */
-
-/* CompleteReflash reflashes the entire user image, including the configuration block and firmware
-*/
-void CompleteReflash(struct rmi_phys_device *phys)
-{
-	rmi_phys = phys;
-	SynaInitialize();
-
-	//if (TouchControllerTypeCheck())
-	{
-		if (fimrwareRevisionCheck())
-		{
-			printk("rmi find the current firmware revision is old, reflash now...");
-			SynaReadConfigInfo();
-			SynaReadFirmwareInfo();
-			SynaF34_FlashControl = SynaF34DataBase + SynaFirmwareBlockSize + 2;
-			SynaEnableFlashing();
-			SynaBootloaderLock();
-			SynaProgramFirmware();
-			SynaProgramConfiguration();
-			SynaFinalizeReflash();
-		}
-	}
-}
-
-/* SynaSetup scans the Page Description Table (PDT) and sets up the necessary variables
- * for the reflash process. This function is a "slim" version of the PDT scan function in
- * in PDT.c, since only F34 and F01 are needed for reflash.
- */
-void SynaSetup(void)
-{
-    unsigned char address;
-    unsigned char buffer[6] = {0};
-
-	for (address = 0xe9; address > 0xc0; address = address - 6)
-	{
-    	readRMI(address, buffer, 6);
-
-		switch (buffer[5])
-		{
-			case 0x34:
-				SynaF34DataBase = buffer[3];
-				SynaF34QueryBase = buffer[0];
-				break;
-			case 0x01:
-				SynaF01DataBase = buffer[3];
-				SynaF01CommandBase = buffer[1];
-				SynaF01QueryBase = buffer[0];
-				break;
-		}
-	}
-
-    SynaF34Reflash_BlockNum = SynaF34DataBase;
-	SynaF34Reflash_BlockData = SynaF34DataBase + 2;
-	SynaF34ReflashQuery_BootID = SynaF34QueryBase;
-	SynaF34ReflashQuery_FlashPropertyQuery = SynaF34QueryBase + 2;
-	SynaF34ReflashQuery_FirmwareBlockSize = SynaF34QueryBase + 3;
-	SynaF34ReflashQuery_FirmwareBlockCount = SynaF34QueryBase +5;
-	SynaF34ReflashQuery_ConfigBlockSize = SynaF34QueryBase + 3;
-	SynaF34ReflashQuery_ConfigBlockCount = SynaF34QueryBase + 7;
-
-	SynafirmwareImgData = (unsigned char *)((&SynaFirmware[0])+0x100);
-    SynaconfigImgData   = (unsigned char *)(SynafirmwareImgData+SynaImageSize);
-    SynafirmwareImgVersion = (unsigned int)(SynaFirmware[7]);
-    ConfigBlockData =  SynaconfigImgData;
-	switch (SynafirmwareImgVersion)
-	{
-	   case 2:
-	       SynalockImgData = (unsigned char *)((&SynaFirmware[0]) + 0xD0);
-		   break;
-       case 3:
-	   case 4:
-	       SynalockImgData = (unsigned char *)((&SynaFirmware[0]) + 0xC0);
-		   break;
-	   case 5:
-		   SynalockImgData = (unsigned char *)((&SynaFirmware[0]) + 0xB0);
-       default: break;
-	}
-}
-
-/* SynaInitialize sets up the reflahs process
- */
-void SynaInitialize(void)
-{
-	unsigned char uData[2];
-	unsigned char uStatus = 0;
-
-    //printk("\nInitializing Reflash Process...");
-    uData[0] = 0;
-	writeRMI(0xff, uData, 1); // switch to page0    //hhb
-
-	do {
-		readRMI(0, &uStatus, 1);
-
-		if (uStatus & 0x80)
-		{
-			break;
-		}
-	} while (uStatus & 0x40);
-	SynaSetup();
-
-	SynafirmwareImgData = 0;
-
-	SynaconfigImgData = 0;
-
-	readRMI(SynaF34ReflashQuery_FirmwareBlockSize, &uData[0], 2);
-
-	SynaFirmwareBlockSize = uData[0] | (uData[1] << 8);
-}
-
-/* SynaReadFirmwareInfo reads the F34 query registers and retrieves the block size and count
- * of the firmware section of the image to be reflashed
- */
-void SynaReadFirmwareInfo(void)
-{
-	unsigned char uData[2];
-
-    printk("Read Firmware Info\n");
-
-	readRMI(SynaF34ReflashQuery_FirmwareBlockSize, &uData[0], 2);
-	SynaFirmwareBlockSize = uData[0] | (uData[1] << 8);
-
-	readRMI(SynaF34ReflashQuery_FirmwareBlockCount, &uData[0], 2);
-	SynaFirmwareBlockCount = uData[0] | (uData[1] << 8);
-	SynaImageSize = SynaFirmwareBlockCount * SynaFirmwareBlockSize;
-	printk("SynaFirmwareBlockSize:%d,SynaFirmwareBlockCount:%d \n", SynaFirmwareBlockSize, SynaFirmwareBlockCount);
-}
-
-/* SynaReadConfigInfo reads the F34 query registers and retrieves the block size and count
- * of the configuration section of the image to be reflashed
- */
-void SynaReadConfigInfo(void)
-{
-	unsigned char uData[2];
-
-    printk("Read Config Info\n");
-
-	readRMI(SynaF34ReflashQuery_ConfigBlockSize, &uData[0], 2);
-	SynaConfigBlockSize = uData[0] | (uData[1] << 8);
-
-	readRMI(SynaF34ReflashQuery_ConfigBlockCount, &uData[0], 2);
-	SynaConfigBlockCount = uData[0] | (uData[1] << 8);
-	SynaConfigImageSize = SynaConfigBlockCount * SynaConfigBlockSize;
-	printk("SynaConfigBlockSize:%d,SynaConfigBlockCount:%d \n", SynaConfigBlockSize, SynaConfigBlockCount);
-}
-
-
-/* SynaReadBootloadID reads the F34 query registers and retrieves the bootloader ID of the firmware
- */
-void SynaReadBootloadID(void)
-{
-	unsigned char uData[2];
-
-	readRMI(SynaF34ReflashQuery_BootID, &uData[0], 2);
-	SynaBootloadID = uData[0] + uData[1] * 0x100;
-}
-
-/* SynaWriteBootloadID writes the bootloader ID to the F34 data register to unlock the reflash process
- */
-void SynaWriteBootloadID(void)
-{
-	unsigned char uData[2];
-
-	uData[0] = SynaBootloadID % 0x100;
-	uData[1] = SynaBootloadID / 0x100;
-
-	writeRMI(SynaF34Reflash_BlockData, &uData[0], 2);
-}
-
-/* SynaEnableFlashing kicks off the reflash process
- */
-void SynaEnableFlashing(void)
-{
-	unsigned char uData = 0;
-	unsigned char uStatus = 0;
-
-    printk("Enable Reflash...\n");
-
-	// Reflash is enabled by first reading the bootloader ID from the firmware and write it back
-	SynaReadBootloadID();
-	SynaWriteBootloadID();
-	// Make sure Reflash is not already enabled
-	do {
-		readRMI(SynaF34_FlashControl, &uData, 1);
-	} while (((uData & 0x0f) != 0x00));
-	// Clear ATTN
-    readRMI (SynaF01DataBase, &uStatus, 1);
-
-	if ((uStatus & 0x40) == 0)
-	{
-		// Write the "Enable Flash Programming command to F34 Control register
-		// Wait for ATTN and then clear the ATTN.
-		readRMI(SynaF34_FlashControl, &uData, 1);
-		uData &= 0xf0;
-		uData |= 0x0f;
-		writeRMI(SynaF34_FlashControl, &uData, 1);
-		SynaWaitForATTN();
-		readRMI((SynaF01DataBase + 1), &uStatus, 1);
-
-		// Scan the PDT again to ensure all register offsets are correct
-		SynaSetup();
-
-		// Read the "Program Enabled" bit of the F34 Control register, and proceed only if the
-		// bit is set.
-		readRMI(SynaF34_FlashControl, &uData, 1);
-
-		while (uData != 0x80)
-		{
-			// In practice, if uData!=0x80 happens for multiple counts, it indicates reflash
-			// is failed to be enabled, and program should quit
-			;
-		}
-	}
-}
-
-/* SynaWaitForATTN waits for ATTN to be asserted within a certain time threshold.
- */
-void SynaWaitForATTN(void)
-{
-    unsigned int error;
-
-	error = waitATTN(ASSERT, 300);
-}
-
-/* SynaWaitATTN waits for ATTN to be asserted within a certain time threshold.
- * The function also checks for the F34 "Program Enabled" bit and clear ATTN accordingly.
- */
-void SynaWaitATTN(void)
-{
-	unsigned char uData = 0;
-	unsigned char uStatus = 0;
-
-	waitATTN(ASSERT, 300);
-	do {
- 		readRMI(SynaF34_FlashControl, &uData, 1);
-		readRMI((SynaF01DataBase + 1), &uStatus, 1);
-	} while (uData != 0x80);
-}
-
-/* SynaProgramConfiguration writes the configuration section of the image block by block
- */
-void SynaProgramConfiguration(void)
-{
-	unsigned char uData[2];
-	unsigned char *puData = ConfigBlockData;
-	unsigned short blockNum;
-
-   // eraseConfigBlock();
-	for (blockNum = 0; blockNum < SynaConfigBlockCount; blockNum++)
-	{
-	    uData[0] = blockNum & 0xff;
-		uData[1] = (blockNum & 0xff00) >> 8;
-
-		//Block by blcok, write the block number and data to the corresponding F34 data registers
-		writeRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
-		writeRMI(SynaF34Reflash_BlockData, puData, SynaConfigBlockSize);
-		puData += SynaConfigBlockSize;
-
-		// Issue the "Write Configuration Block" command
-		readRMI(SynaF34_FlashControl, &uData[0], 1);
-		uData[0] &= 0xf0;
-		uData[0] |= 0x06;
-		writeRMI(SynaF34_FlashControl, &uData[0], 1);
-		SynaWaitATTN();
-		printk(".");
-	}
-	printk("\n");
-	readRMI(SynaF01DataBase, uData, 1);
-	printk("+++++++SynaProgramConfiguration++uData:%x+++++++%s:%d\n", uData[0], __func__, __LINE__);
-
-}
-
-/* SynaFinalizeReflash finalizes the reflash process
- */
-void SynaFinalizeReflash(void)
-{
-	unsigned char uData = 0;
-	unsigned char uStatus = 0;
-
-	printk("Finalizing Reflash...\n");
-
-	// Issue the "Reset" command to F01 command register to reset the chip
-	// This command will also test the new firmware image and check if its is valid
-	uData = 1;
-	writeRMI(SynaF01CommandBase, &uData, 1);
-	msleep(100);
-	//SynaWaitForATTN();
-	readRMI(SynaF01DataBase, &uData, 1);
-	printk("+++++++++uData:%x+++++++%s:%d\n", uData, __func__, __LINE__);
-	// Sanity check that the reflash process is still enabled
-	do {
-	   readRMI(SynaF34_FlashControl, &uStatus, 1);
-	} while ((uStatus & 0x0f) != 0x00);
-	printk("+++++++++uStatus:%x+++++++%s:%d\n", uStatus, __func__, __LINE__);
-	readRMI((SynaF01DataBase + 1), &uStatus, 1);
-
-	SynaSetup();
-
-    uData = 0;
-	// Check if the "Program Enabled" bit in F01 data register is cleared
-	// Reflash is completed, and the image passes testing when the bit is cleared
-	do {
-		readRMI(SynaF01DataBase, &uData, 1);
-	} while ((uData & 0x40) != 0);
-	// Rescan PDT the update any changed register offsets
-	SynaSetup();
-	printk("\nReflash Completed. Please reboot.");
-}
-
-/* SynaFlashFirmwareWrite writes the firmware section of the image block by block
- */
-void SynaFlashFirmwareWrite(void)
-{
-	unsigned char *puFirmwareData = (unsigned char *)(SynaFirmware+0x100); //SynafirmwareImgData; //hhb
-	unsigned char uData[2];
-	unsigned short blockNum;
-
-	for (blockNum = 0; blockNum < SynaFirmwareBlockCount; ++blockNum)
-	{
-		//Block by blcok, write the block number and data to the corresponding F34 data registers
-	    uData[0] = blockNum & 0xff;
-		uData[1] = (blockNum & 0xff00) >> 8;
-		writeRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
-		writeRMI(SynaF34Reflash_BlockData, puFirmwareData, SynaFirmwareBlockSize);
-		puFirmwareData += SynaFirmwareBlockSize;
-		// Issue the "Write Firmware Block" command
-		readRMI(SynaF34_FlashControl, &uData[0], 1);
-		uData[0] &= 0xf0;
-		uData[0] |= 0x02;
-		writeRMI(SynaF34_FlashControl, &uData[0], 1);
-		if(blockNum % 128 == 0)
-			printk(".");
-	    SynaWaitATTN();
-	}
-
-}
-
-/* SynaProgramFirmware prepares the firmware writing process
- */
-void SynaProgramFirmware(void)
-{
-    unsigned char uData;
-
-	printk("Program Firmware Section...\n");
-
-    SynaReadBootloadID();
-	SynaWriteBootloadID();
-	readRMI(SynaF34_FlashControl, &uData, 1);
-	uData &= 0xf0;
-	uData |= 0x03;
-	writeRMI(SynaF34_FlashControl, &uData, 1);
-	msleep(5000);
-	SynaWaitATTN();
-	SynaFlashFirmwareWrite();
-	readRMI(SynaF01DataBase, &uData, 1);
-	printk("+++++++SynaProgramFirmware++uData:%x+++++++%s:%d\n", uData, __func__, __LINE__);
-}
-
-/* SynaBootloaderLock locks down the bootloader
-*/
-void SynaBootloaderLock(void)
-{
-	unsigned short lockBlockCount;
-    unsigned char *puFirmwareData = SynalockImgData;
-    unsigned char uData[2];
-    unsigned short uBlockNum;
-
-	// Check if device is in unlocked state
-	readRMI((SynaF34QueryBase+ 2), &uData[0], 1);
-
-	//Device is unlocked
-    if (uData[0] & 0x02)
-	{
-		printk("Device unlocked. Lock it first...\n");
-		// Different bootloader version has different block count for the lockdown data
-		// Need to check the bootloader version from the image file being reflashed
-		switch (SynafirmwareImgVersion)
-		{
-			case 2:
-				lockBlockCount = 3;
-				break;
-			case 3:
-			case 4:
-				lockBlockCount = 4;
-				break;
-			case 5:
-				lockBlockCount = 5;
-				break;
-			default:
-				lockBlockCount = 0;
-				break;
-		}
-
-		// Write the lockdown info block by block
-		// This reference code of lockdown process does not check for bootloader version
-		// currently programmed on the ASIC against the bootloader version of the image to
-		// be reflashed. Such case should not happen in practice. Reflashing cross different
-		// bootloader versions is not supported.
-		for (uBlockNum = 0; uBlockNum < lockBlockCount; ++uBlockNum)
-		{
-			uData[0] = uBlockNum & 0xff;
-			uData[1] = (uBlockNum & 0xff00) >> 8;
-
-			/* Write Block Number */
-			readRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
-
-			/* Write Data Block */
-			writeRMI(SynaF34Reflash_BlockData, puFirmwareData, SynaFirmwareBlockSize);
-
-			/* Move to next data block */
-			puFirmwareData += SynaFirmwareBlockSize;
-
-			/* Issue Write Lockdown Block command */
-			readRMI(SynaF34_FlashControl, &uData[0], 1);
-			uData[0] &= 0xf0;
-			uData[0] |= 0x04;
-			writeRMI(SynaF34_FlashControl, &uData[0], 1);
-
-			/* Wait ATTN until device is done writing the block and is ready for the next. */
-			SynaWaitATTN();
-		}
-		printk("Device locking done.\n");
-
-		// Enable reflash again to finish the lockdown process.
-		// Since this lockdown process is part of the reflash process, we are enabling
-		// reflash instead, rather than resetting the device to finish the unlock procedure.
-		SynaEnableFlashing();
-	}
-	else printk("Device already locked.\n");
-}
-
-/* ConfigBlockReflash reflashes the config block only
-*/
-void ConfigBlockReflash(void)
-{
-    unsigned char uData[2];
-
-	convertConfigBlockData();
-
-    SynaInitialize();
-
-	SynaReadConfigInfo();
-
-	SynaReadFirmwareInfo();
-
-	SynaF34_FlashControl = SynaF34DataBase + SynaFirmwareBlockSize + 2;
-
-	SynaEnableFlashing();
-
-	SynaBootloaderLock();
-
-    // Check if device is in unlocked state
-	readRMI((SynaF34QueryBase + 2), &uData[0], 1);
-
-	//Device is unlocked
-    if (uData[0] & 0x02)
-	{
-	   SynaFinalizeReflash();
-	   return;
-	   // Do not reflash config block if not locked.
-	}
-
-    eraseConfigBlock();
-    SynaconfigImgData = (unsigned char *)ConfigBlock;
-
-    SynaProgramConfiguration();
-
-    SynaFinalizeReflash();
-}
-
-/* eraseConfigBlock erases the config block
-*/
-void eraseConfigBlock(void)
-{
-	unsigned char uData;
-
-	// Erase of config block is done by first entering into bootloader mode
-    SynaReadBootloadID();
-	SynaWriteBootloadID();
-
-	// Command 7 to erase config block
-	readRMI(SynaF34_FlashControl, &uData, 1);
-	uData &= 0xf0;
-	uData |= 0x07;
-	writeRMI(SynaF34_FlashControl, &uData, 1);
-
-	SynaWaitATTN();
-}
-
-// This function is intended to convert the config data struct output by DS4 (read config.h) into an array that
-// the reflash code uses (read SynaFirmwareImage.h)
-// DS4 will output the array format in the next release and this function will not be necessary
-void convertConfigBlockData(void)
-{
-#if 0
-	int i = 0;
-	char value[32];    //hhb
-	for (i = 0; value[i]!=NULL; i++)
-	{
-		ConfigBlock[i] = value[i].Value;
-	}
-#endif
-}
-
-// This function is to check the touch controller type of the touch controller matches with the firmware image
-int TouchControllerTypeCheck(void)
-{
-	unsigned char uData[4];
-	char buffer[4];
-
-	char controllerType[20];
-
-    int ID;
-	//int revision;
-
-	readRMI((SynaF01QueryBase + 43), &uData[0], 1);
-	if ((uData[0] & 0x0f) > 0)
-	{
-		readRMI((SynaF01QueryBase + 44), &uData[0], 1);
-		if (uData[0] & 0x01)
-		{
-			readRMI((SynaF01QueryBase + 17), &uData[0], 2);
-
-			ID = (int)(uData[1] & (uData[0] << 8));
-			sprintf(buffer, "%d", ID);
-			if (strstr(controllerType, TOUCH_CONTROLLER) != 0)
-				return true;
-			else
-				return false;
-		}
-		else
-			return false;
-	}
-	else
-		return false;
-}
-
-int fimrwareRevisionCheck(void)
-{
-	unsigned char uData[10];
-	readRMI((SynaF01QueryBase + 11), uData, 10);
-	return strcmp(uData, FW_REVISION);
-}
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_reflash.h b/drivers/input/touchscreen/rmi4/rmi_reflash.h
deleted file mode 100644
index aa51213618949..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_reflash.h
+++ /dev/null
@@ -1,2917 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-
-unsigned char SynaFirmware[46592] = {
-	0x9F, 0x45, 0x60, 0x37, 0x00, 0x00, 0x00, 0x05, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
-	0x53, 0x33, 0x32, 0x30, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x49, 0x32, 0x43, 0x00, 0x0B, 0x00, 0xFF, 0x00, 0x0C, 0x0D, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x49, 0x32, 0x43, 0x00, 0x0B, 0x00, 0xFF, 0x00, 0x0C, 0x0D, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x2A, 0x89, 0x34, 0x06, 0x57, 0x8E, 0xAF, 0x99, 0x1D, 0x93, 0xE1, 0x46, 0x6E, 0x54, 0x4E, 0xBF,
-	0x61, 0x8E, 0x56, 0x70, 0x30, 0x3F, 0x97, 0xC2, 0x8D, 0xD5, 0x9B, 0xB3, 0xCB, 0x3A, 0xB2, 0xAC,
-	0xCD, 0x8D, 0xF3, 0xF5, 0x66, 0x6C, 0xDB, 0xB5, 0x5C, 0xDA, 0xC3, 0xB0, 0xA0, 0x8D, 0x53, 0xA1,
-	0xD2, 0x5F, 0xBA, 0xB8, 0x02, 0xF1, 0x51, 0xA1, 0xC5, 0x23, 0xAF, 0x6E, 0x8B, 0x2D, 0x5E, 0x08,
-	0xBD, 0x91, 0xEC, 0x65, 0xBA, 0x7E, 0x40, 0x2E, 0x89, 0xEF, 0xA2, 0x8B, 0x37, 0x46, 0xC4, 0x1E,
-	0xDB, 0x20, 0x93, 0x98, 0x9B, 0xA3, 0x60, 0x34, 0x66, 0x6A, 0x69, 0xC2, 0x4B, 0x67, 0xFE, 0x79,
-	0x14, 0x15, 0x01, 0x83, 0x5C, 0xB4, 0xFB, 0x4D, 0x75, 0x63, 0xC4, 0x05, 0x16, 0x74, 0xCF, 0x65,
-	0x6E, 0xCC, 0xDC, 0xFE, 0x1A, 0xD0, 0xF6, 0x28, 0x4F, 0xE6, 0xD8, 0x2D, 0x90, 0xAA, 0x78, 0x1D,
-	0xD1, 0xDA, 0x89, 0x9C, 0x39, 0xF3, 0x1C, 0x4A, 0x6C, 0xD2, 0x99, 0xEA, 0x6C, 0xBE, 0x57, 0x53,
-	0x39, 0x92, 0x43, 0x4B, 0x4E, 0x17, 0x79, 0x0C, 0x3A, 0x20, 0xAA, 0xF8, 0xCE, 0x46, 0xD8, 0xEE,
-	0x28, 0x68, 0x11, 0x9B, 0xA0, 0xCA, 0x61, 0xC0, 0x46, 0x78, 0xE4, 0x6F, 0x73, 0xC7, 0x31, 0x14,
-	0x63, 0xE7, 0xEB, 0xC7, 0xB0, 0x8C, 0x96, 0xAD, 0x69, 0x0C, 0xFF, 0xFC, 0x0E, 0xAF, 0x0B, 0x1B,
-	0x19, 0x80, 0xFC, 0xE1, 0xBE, 0xFC, 0xC2, 0xBC, 0xC6, 0x9B, 0x55, 0xBC, 0xBA, 0x91, 0xFE, 0x84,
-	0x90, 0x4F, 0xE9, 0xE8, 0x6E, 0xDA, 0x1F, 0x65, 0x49, 0x7C, 0x5A, 0xE0, 0x06, 0x0D, 0x49, 0xB7,
-	0x92, 0x0F, 0x52, 0x01, 0x03, 0xC0, 0x88, 0x27, 0x48, 0xA0, 0x78, 0x83, 0x84, 0x40, 0x9B, 0xB0,
-	0x50, 0xAE, 0x0B, 0x29, 0xFC, 0x47, 0x22, 0xFC, 0x7A, 0x7B, 0xEA, 0xBC, 0x75, 0x5C, 0xC5, 0x7D,
-	0x10, 0xAC, 0xE1, 0x27, 0x3F, 0x59, 0x96, 0xE8, 0x9E, 0x0F, 0x04, 0x29, 0x25, 0xAC, 0x4A, 0x14,
-	0x7E, 0x14, 0x1D, 0xA5, 0x85, 0xDD, 0x1C, 0x40, 0xDA, 0xD2, 0x7E, 0x6D, 0x45, 0xE0, 0x0A, 0xEB,
-	0xF7, 0x88, 0x02, 0x7D, 0x97, 0x68, 0x14, 0x12, 0x45, 0x73, 0x1C, 0xD2, 0x56, 0x52, 0xD0, 0x60,
-	0x4E, 0x24, 0xA5, 0x61, 0x27, 0xC5, 0x34, 0x43, 0xEE, 0xDA, 0xA7, 0x83, 0xD5, 0x8A, 0xF2, 0x85,
-	0xCE, 0x7B, 0xC6, 0x9C, 0x15, 0xDE, 0x67, 0x9D, 0xC4, 0xC1, 0x9C, 0x00, 0xC7, 0xFF, 0x8E, 0x67,
-	0xEF, 0xDC, 0x9F, 0xF0, 0x43, 0xC9, 0x29, 0xD5, 0x9A, 0x13, 0x5B, 0xE6, 0xA4, 0x65, 0x76, 0x9A,
-	0xB7, 0xA1, 0x9B, 0x54, 0xC4, 0x69, 0x58, 0x1F, 0xC2, 0x28, 0x90, 0x11, 0xD1, 0x58, 0x50, 0x8B,
-	0xC6, 0x2D, 0x9D, 0x26, 0x90, 0xA2, 0x2F, 0xD5, 0x89, 0x31, 0x7F, 0x6C, 0x8A, 0xB7, 0x66, 0x78,
-	0x6D, 0x69, 0xBB, 0x2E, 0x21, 0xA0, 0xE7, 0x34, 0x85, 0xC4, 0xF6, 0xC3, 0x4B, 0x45, 0x9A, 0x58,
-	0xF9, 0x5D, 0x14, 0x4F, 0x78, 0xE0, 0x2A, 0x4D, 0xC2, 0xD8, 0x09, 0x0F, 0x9A, 0xB9, 0xB0, 0x00,
-	0x48, 0x6A, 0x9D, 0x20, 0x0D, 0x6A, 0xF1, 0x52, 0xEF, 0xCC, 0xC6, 0x17, 0x5C, 0x85, 0x29, 0x4B,
-	0x14, 0xD8, 0xA7, 0xA1, 0xDD, 0x96, 0x4C, 0x5A, 0x19, 0xB1, 0xAF, 0xB4, 0x0E, 0x13, 0x47, 0x08,
-	0xE1, 0xD0, 0x48, 0x09, 0x16, 0x73, 0xE9, 0x23, 0xBB, 0xDE, 0xBF, 0x67, 0x6F, 0x7C, 0xA7, 0xA2,
-	0xE7, 0x5B, 0xF5, 0xC4, 0x86, 0xF0, 0xB0, 0x11, 0x79, 0x13, 0x2A, 0xB2, 0xED, 0xCA, 0x06, 0x4C,
-	0x37, 0xFB, 0xB5, 0xE6, 0xAA, 0x5C, 0x6D, 0x31, 0x0D, 0x95, 0xCD, 0x19, 0xEA, 0xEC, 0x26, 0x2E,
-	0x4F, 0xE6, 0x69, 0x0D, 0x0D, 0x4A, 0x36, 0xAA, 0xD5, 0x69, 0xF0, 0xF4, 0x83, 0x78, 0x6A, 0xB1,
-	0x35, 0x95, 0xCF, 0x19, 0xBD, 0xCD, 0x3C, 0xAA, 0x47, 0x7D, 0xBD, 0xFD, 0x5B, 0xAE, 0xF6, 0x43,
-	0x31, 0xEB, 0x5D, 0x05, 0x9F, 0xE4, 0x42, 0xF5, 0xBA, 0xC4, 0xAF, 0x2A, 0x7D, 0x0E, 0xA7, 0x9E,
-	0xE4, 0xD6, 0xAA, 0x53, 0x97, 0x2A, 0xB4, 0x1A, 0x06, 0xCB, 0xE7, 0x05, 0x3B, 0x62, 0xF1, 0x17,
-	0x3B, 0x1E, 0x62, 0xCC, 0xE9, 0xFA, 0x32, 0x4F, 0xCC, 0x32, 0x58, 0x89, 0x42, 0x52, 0x32, 0x34,
-	0x8A, 0xE7, 0x88, 0x22, 0x43, 0x40, 0x6E, 0x20, 0xFB, 0x72, 0xD0, 0xCE, 0xD1, 0xED, 0x74, 0x38,
-	0x12, 0xE7, 0x37, 0x3F, 0x4A, 0x5D, 0x12, 0x8D, 0x9F, 0x23, 0x94, 0x93, 0x93, 0x9C, 0xDF, 0xB3,
-	0x21, 0x4B, 0xBF, 0x33, 0x58, 0xBF, 0x94, 0x51, 0x7C, 0x7F, 0xD8, 0x47, 0x98, 0xC8, 0x73, 0x1E,
-	0x81, 0x37, 0x1C, 0x5A, 0x3A, 0x78, 0xC3, 0x99, 0xBE, 0x2D, 0x76, 0x9A, 0x9E, 0xD1, 0x22, 0x62,
-	0xF7, 0x09, 0x0E, 0xC6, 0xEF, 0xC5, 0x50, 0x10, 0xF5, 0x26, 0x84, 0xA3, 0xD6, 0x3A, 0x34, 0xEC,
-	0x97, 0xC8, 0xC0, 0x90, 0x2B, 0xF8, 0xBF, 0x84, 0x88, 0xE1, 0xEC, 0x85, 0x31, 0x9A, 0xBC, 0x1F,
-	0xBC, 0xAD, 0x79, 0x6F, 0xEB, 0x15, 0x77, 0xDB, 0x2C, 0xAD, 0x93, 0xE1, 0x8C, 0x22, 0x9B, 0xE5,
-	0x19, 0x20, 0xB6, 0xC3, 0x7D, 0xB2, 0x31, 0xE0, 0x9A, 0x85, 0xD6, 0xD7, 0xFD, 0x1C, 0xBA, 0x59,
-	0xFA, 0x0F, 0x69, 0x4B, 0x9B, 0x6B, 0x9E, 0x0C, 0x34, 0xC1, 0xF5, 0xFC, 0x5C, 0x60, 0x58, 0x4A,
-	0xBB, 0xB7, 0xE2, 0x41, 0x44, 0x85, 0x1A, 0x78, 0x58, 0xE3, 0x49, 0x06, 0x6D, 0x5F, 0xA4, 0x6A,
-	0x93, 0xC7, 0x85, 0x72, 0x19, 0xEB, 0x20, 0xCA, 0xF7, 0x44, 0x12, 0x53, 0xB8, 0x99, 0xCC, 0xB3,
-	0x03, 0x02, 0x36, 0xB0, 0x3E, 0xE4, 0xDB, 0x79, 0x9F, 0x39, 0xAA, 0x3E, 0xDF, 0x84, 0x64, 0xA9,
-	0x08, 0xBF, 0x52, 0x59, 0x54, 0xBD, 0x08, 0x63, 0x52, 0x88, 0x55, 0x45, 0x8C, 0x9A, 0x5A, 0x69,
-	0xAA, 0x88, 0xF1, 0x43, 0x0D, 0xE9, 0xD8, 0x08, 0x7B, 0xC9, 0xE2, 0xA3, 0x4C, 0x2D, 0xC3, 0xA9,
-	0x24, 0x7D, 0xC3, 0xDB, 0x2C, 0xE0, 0x0B, 0x72, 0x19, 0xA7, 0xCF, 0x64, 0x58, 0x44, 0x91, 0xD9,
-	0xA1, 0x39, 0x76, 0x29, 0x01, 0xC7, 0x1A, 0x77, 0x92, 0x66, 0x68, 0xF7, 0x7E, 0xCD, 0x67, 0x52,
-	0x56, 0x19, 0xD8, 0x6C, 0x92, 0x36, 0x33, 0x1A, 0xD5, 0xCC, 0x56, 0x7F, 0xA2, 0x76, 0x00, 0x29,
-	0xFD, 0x41, 0xF1, 0x6A, 0xA4, 0xA7, 0x56, 0x1D, 0x14, 0x37, 0xB6, 0x67, 0x42, 0x9E, 0xAA, 0x28,
-	0x31, 0xFB, 0x63, 0x82, 0x2D, 0x37, 0x29, 0xB8, 0xEC, 0xDE, 0xF4, 0x28, 0x15, 0x99, 0xF7, 0x5E,
-	0x26, 0xCF, 0x1A, 0x12, 0x9E, 0xFC, 0x1C, 0x44, 0x86, 0x3C, 0x80, 0x71, 0x46, 0x77, 0x9C, 0xB2,
-	0x53, 0x02, 0x66, 0x81, 0xAD, 0x35, 0x74, 0x59, 0xC8, 0xB3, 0xFE, 0xF0, 0xB2, 0x5A, 0x62, 0x25,
-	0x41, 0xF2, 0xCE, 0x69, 0xE3, 0xBD, 0x7B, 0xB5, 0x80, 0x0D, 0x0D, 0xF1, 0x5F, 0xDC, 0xB6, 0xC4,
-	0xE9, 0xEF, 0x24, 0x18, 0xAD, 0x1C, 0x74, 0x2A, 0x80, 0x66, 0x42, 0x75, 0x2A, 0xB0, 0xF3, 0x33,
-	0xD9, 0x0F, 0x96, 0x89, 0xC9, 0x43, 0xFD, 0x64, 0xE1, 0x92, 0x52, 0xBC, 0xF1, 0xFF, 0xAB, 0xE3,
-	0x53, 0x82, 0x55, 0x0A, 0x90, 0x17, 0xDF, 0x46, 0x3D, 0xFD, 0x34, 0xE2, 0xA4, 0xF7, 0x48, 0x59,
-	0x19, 0x83, 0xC9, 0x37, 0x65, 0xD0, 0xEB, 0x4C, 0x51, 0xE5, 0x47, 0x04, 0x28, 0x49, 0xB9, 0x38,
-	0x4C, 0xEF, 0xD0, 0x41, 0xFE, 0x0B, 0x0E, 0xCA, 0x39, 0x33, 0xE6, 0xDC, 0x74, 0xE8, 0x1E, 0x57,
-	0x6F, 0x00, 0xE4, 0xE7, 0xA9, 0x4F, 0xAE, 0x74, 0x7F, 0x87, 0x04, 0x8C, 0xCC, 0x29, 0x97, 0xED,
-	0xE6, 0x74, 0x07, 0xAF, 0x25, 0x9C, 0x91, 0x9D, 0xC6, 0xCD, 0x8F, 0xEA, 0x8D, 0xFE, 0xEB, 0xE1,
-	0x0E, 0x6D, 0xE6, 0x5E, 0xC2, 0x1A, 0xA3, 0x43, 0x90, 0xD5, 0x1E, 0xC1, 0xE8, 0x17, 0x81, 0x8C,
-	0xF6, 0xF7, 0xB8, 0xBC, 0x3F, 0x6E, 0x96, 0xC5, 0x19, 0x6A, 0x5F, 0xBA, 0xBF, 0xA2, 0xAE, 0x88,
-	0x21, 0x0E, 0xAE, 0xB7, 0x14, 0xAB, 0xCB, 0x02, 0xFB, 0x50, 0xEF, 0x80, 0x87, 0x32, 0x8C, 0x0C,
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x3F, 0x03, 0x1E,
-	0x05, 0x20, 0xB1, 0x08, 0x0B, 0x19, 0x19, 0x00, 0x00, 0x4C, 0x04, 0x6C, 0x07, 0x02, 0x14, 0x1E,
-	0x05, 0x28, 0xF5, 0x28, 0x1E, 0x05, 0x01, 0x3C, 0x30, 0x00, 0x30, 0x00, 0x00, 0x48, 0x00, 0x48,
-	0xF0, 0xD2, 0xF0, 0xD2, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x19, 0x01, 0x00, 0x0A, 0x00, 0x08, 0xA2, 0x02, 0x32, 0x0A, 0x0A, 0x96, 0x1B,
-	0x10, 0x00, 0x00, 0x56, 0x35, 0x05, 0x10, 0x00, 0x00, 0x0B, 0x20, 0x00, 0x01, 0xE0, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x53, 0x33, 0x32, 0x30, 0x32, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x01, 0x02, 0x0F, 0x05, 0x00, 0x38, 0x15, 0x10, 0x1B, 0x2B, 0xC0, 0xD1, 0xFF, 0x0C, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xA2, 0x63,
-	0x15, 0x21, 0x11, 0xAC, 0xA1, 0x5C, 0x13, 0x01, 0x01, 0xA3, 0x00, 0x58, 0x00, 0x01, 0x34, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xF4, 0x01, 0x80,
-	0x03, 0x0E, 0x1F, 0x00, 0xDB, 0x01, 0x19, 0x04, 0x00, 0x00, 0x10, 0x0A, 0x00, 0x00, 0x01, 0x02,
-	0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12,
-	0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x01, 0x02, 0x04, 0x05, 0x06, 0x07, 0x08, 0x0A,
-	0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x12, 0x13, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x47, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0x00, 0xC0, 0x80,
-	0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-	0x80, 0x80, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x10, 0x0A,
-	0x00, 0x00, 0x00, 0x1B, 0x10, 0x44, 0x88, 0x13, 0x01, 0x01, 0xBF, 0x01, 0x7E, 0x3D, 0x00, 0x00,
-	0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB3, 0xB2, 0x0B, 0x00, 0x01, 0x54, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
diff --git a/drivers/input/touchscreen/rmi4/rmi_spi.c b/drivers/input/touchscreen/rmi4/rmi_spi.c
deleted file mode 100755
index a19e49aa9457c..0000000000000
--- a/drivers/input/touchscreen/rmi4/rmi_spi.c
+++ /dev/null
@@ -1,909 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/spi/spi.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/completion.h>
-#include <linux/sched.h>
-#include <linux/gpio.h>
-#include <linux/rmi.h>
-
-#define COMMS_DEBUG 0
-#define FF_DEBUG 0
-
-#define RMI_PROTOCOL_VERSION_ADDRESS	0xa0fd
-#define SPI_V2_UNIFIED_READ		0xc0
-#define SPI_V2_WRITE			0x40
-#define SPI_V2_PREPARE_SPLIT_READ	0xc8
-#define SPI_V2_EXECUTE_SPLIT_READ	0xca
-
-#define RMI_SPI_BLOCK_DELAY_US		65
-#define RMI_SPI_BYTE_DELAY_US		65
-#define RMI_SPI_WRITE_DELAY_US		0
-
-#define RMI_V1_READ_FLAG		0x80
-
-#define RMI_PAGE_SELECT_REGISTER 0x00FF
-#define RMI_SPI_PAGE(addr) (((addr) >> 8) & 0x80)
-
-#define DEFAULT_POLL_INTERVAL_MS	13
-
-static char *spi_v1_proto_name = "spi";
-static char *spi_v2_proto_name = "spiv2";
-
-struct rmi_spi_data {
-	struct mutex page_mutex;
-	int page;
-	int (*set_page) (struct rmi_phys_device *phys, u8 page);
-	bool split_read_pending;
-	int enabled;
-	int irq;
-	int irq_flags;
-	struct rmi_phys_device *phys;
-	struct completion irq_comp;
-
-	/* Following are used when polling. */
-	struct hrtimer poll_timer;
-	struct work_struct poll_work;
-	int poll_interval;
-
-};
-
-static irqreturn_t rmi_spi_hard_irq(int irq, void *p)
-{
-	struct rmi_phys_device *phys = p;
-	struct rmi_spi_data *data = phys->data;
-	struct rmi_device_platform_data *pdata = phys->dev->platform_data;
-
-	if (data->split_read_pending &&
-		      gpio_get_value(pdata->attn_gpio) ==
-		      pdata->attn_polarity) {
-		phys->info.attn_count++;
-		complete(&data->irq_comp);
-		return IRQ_HANDLED;
-	}
-
-	return IRQ_WAKE_THREAD;
-}
-
-static irqreturn_t rmi_spi_irq_thread(int irq, void *p)
-{
-	struct rmi_phys_device *phys = p;
-	struct rmi_device *rmi_dev = phys->rmi_dev;
-	struct rmi_driver *driver = rmi_dev->driver;
-	struct rmi_device_platform_data *pdata = phys->dev->platform_data;
-
-	if (gpio_get_value(pdata->attn_gpio) == pdata->attn_polarity) {
-		phys->info.attn_count++;
-		if (driver && driver->irq_handler)
-			driver->irq_handler(rmi_dev, irq);
-	}
-
-	return IRQ_HANDLED;
-}
-
-static void spi_poll_work(struct work_struct *work)
-{
-	struct rmi_spi_data *data =
-			container_of(work, struct rmi_spi_data, poll_work);
-	struct rmi_device *rmi_dev = data->phys->rmi_dev;
-	struct rmi_driver *driver = rmi_dev->driver;
-
-	if (driver && driver->irq_handler)
-		driver->irq_handler(rmi_dev, 0);
-}
-
-/* This is the timer function for polling - it simply has to schedule work
- * and restart the timer. */
-static enum hrtimer_restart spi_poll_timer(struct hrtimer *timer)
-{
-	struct rmi_spi_data *data =
-			container_of(timer, struct rmi_spi_data, poll_timer);
-
-	if (!work_pending(&data->poll_work))
-		schedule_work(&data->poll_work);
-	hrtimer_start(&data->poll_timer, ktime_set(0, data->poll_interval),
-		      HRTIMER_MODE_REL);
-	return HRTIMER_NORESTART;
-}
-
-
-
-static int rmi_spi_xfer(struct rmi_phys_device *phys,
-		    const u8 *txbuf, unsigned n_tx, u8 *rxbuf, unsigned n_rx)
-{
-	struct spi_device *client = to_spi_device(phys->dev);
-	struct rmi_spi_data *v2_data = phys->data;
-	struct rmi_device_platform_data *pdata = phys->dev->platform_data;
-	int status;
-	struct spi_message message;
-	struct spi_transfer *xfers;
-	int total_bytes = n_tx + n_rx;
-	u8 local_buf[total_bytes];
-	int xfer_count = 0;
-	int xfer_index = 0;
-	int block_delay = n_rx > 0 ? pdata->spi_data.block_delay_us : 0;
-	int byte_delay = n_rx > 1 ? pdata->spi_data.read_delay_us : 0;
-	int write_delay = n_tx > 1 ? pdata->spi_data.write_delay_us : 0;
-#if FF_DEBUG
-	bool bad_data = true;
-#endif
-#if COMMS_DEBUG || FF_DEBUG
-	int i;
-#endif
-
-	if (v2_data->split_read_pending) {
-		block_delay =
-		    n_rx > 0 ? pdata->spi_data.split_read_block_delay_us : 0;
-		byte_delay =
-		    n_rx > 1 ? pdata->spi_data.split_read_byte_delay_us : 0;
-		write_delay = 0;
-	}
-
-	if (n_tx) {
-		phys->info.tx_count++;
-		phys->info.tx_bytes += n_tx;
-		if (write_delay)
-			xfer_count += n_tx;
-		else
-			xfer_count += 1;
-	}
-
-	if (n_rx) {
-		phys->info.rx_count++;
-		phys->info.rx_bytes += n_rx;
-		if (byte_delay)
-			xfer_count += n_rx;
-		else
-			xfer_count += 1;
-	}
-
-	xfers = kcalloc(xfer_count,
-			    sizeof(struct spi_transfer), GFP_KERNEL);
-	if (!xfers)
-		return -ENOMEM;
-
-	spi_message_init(&message);
-
-	if (n_tx) {
-		if (write_delay) {
-			for (xfer_index = 0; xfer_index < n_tx;
-					xfer_index++) {
-				memset(&xfers[xfer_index], 0,
-				       sizeof(struct spi_transfer));
-				xfers[xfer_index].len = 1;
-				xfers[xfer_index].delay_usecs = write_delay;
-				xfers[xfer_index].tx_buf = txbuf + xfer_index;
-				spi_message_add_tail(&xfers[xfer_index],
-						     &message);
-			}
-		} else {
-			memset(&xfers[0], 0, sizeof(struct spi_transfer));
-			xfers[0].len = n_tx;
-			spi_message_add_tail(&xfers[0], &message);
-			memcpy(local_buf, txbuf, n_tx);
-			xfers[0].tx_buf = local_buf;
-			xfer_index++;
-		}
-		if (block_delay)
-			xfers[xfer_index-1].delay_usecs = block_delay;
-	}
-	if (n_rx) {
-		if (byte_delay) {
-			int buffer_offset = n_tx;
-			for (; xfer_index < xfer_count; xfer_index++) {
-				memset(&xfers[xfer_index], 0,
-				       sizeof(struct spi_transfer));
-				xfers[xfer_index].len = 1;
-				xfers[xfer_index].delay_usecs = byte_delay;
-				xfers[xfer_index].rx_buf =
-				    local_buf + buffer_offset;
-				buffer_offset++;
-				spi_message_add_tail(&xfers[xfer_index],
-						     &message);
-			}
-		} else {
-			memset(&xfers[xfer_index], 0,
-			       sizeof(struct spi_transfer));
-			xfers[xfer_index].len = n_rx;
-			xfers[xfer_index].rx_buf = local_buf + n_tx;
-			spi_message_add_tail(&xfers[xfer_index], &message);
-			xfer_index++;
-		}
-	}
-
-#if COMMS_DEBUG
-	if (n_tx) {
-		dev_dbg(&client->dev, "SPI sends %d bytes: ", n_tx);
-		for (i = 0; i < n_tx; i++)
-			pr_info("%02X ", txbuf[i]);
-		pr_info("\n");
-	}
-#endif
-
-	/* do the i/o */
-	if (pdata->spi_data.cs_assert) {
-		status = pdata->spi_data.cs_assert(
-			pdata->spi_data.cs_assert_data, true);
-		if (status) {
-			dev_err(phys->dev, "Failed to assert CS, code %d.\n",
-				status);
-			/* nonzero means error */
-			status = -1;
-			goto error_exit;
-		} else
-			status = 0;
-	}
-
-	if (pdata->spi_data.pre_delay_us)
-		udelay(pdata->spi_data.pre_delay_us);
-
-	status = spi_sync(client, &message);
-
-	if (pdata->spi_data.post_delay_us)
-		udelay(pdata->spi_data.post_delay_us);
-
-	if (pdata->spi_data.cs_assert) {
-		status = pdata->spi_data.cs_assert(
-			pdata->spi_data.cs_assert_data, false);
-		if (status) {
-			dev_err(phys->dev, "Failed to deassert CS. code %d.\n",
-				status);
-			/* nonzero means error */
-			status = -1;
-			goto error_exit;
-		} else
-			status = 0;
-	}
-
-	if (status == 0) {
-		memcpy(rxbuf, local_buf + n_tx, n_rx);
-		status = message.status;
-	} else {
-		if (n_tx) phys->info.tx_errs++;
-		if (n_rx) phys->info.rx_errs++;
-		dev_err(phys->dev, "spi_sync failed with error code %d.",
-		       status);
-		goto error_exit;
-	}
-
-#if COMMS_DEBUG
-	if (n_rx) {
-		dev_dbg(&client->dev, "SPI received %d bytes: ", n_rx);
-		for (i = 0; i < n_rx; i++)
-			pr_info("%02X ", rxbuf[i]);
-		pr_info("\n");
-	}
-#endif
-#if FF_DEBUG
-	if (n_rx) {
-		for (i = 0; i < n_rx; i++) {
-			if (rxbuf[i] != 0xFF) {
-				bad_data = false;
-				break;
-			}
-		}
-		if (bad_data) {
-			phys->info.rx_errs++;
-			dev_err(phys->dev, "BAD READ %lu out of %lu.\n",
-				phys->info.rx_errs, phys->info.rx_count);
-		}
-	}
-#endif
-
-error_exit:
-	kfree(xfers);
-	return status;
-}
-
-static int rmi_spi_v2_write_block(struct rmi_phys_device *phys, u16 addr,
-				  u8 *buf, int len)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[len + 4];
-	int error;
-
-	txbuf[0] = SPI_V2_WRITE;
-	txbuf[1] = (addr >> 8) & 0x00FF;
-	txbuf[2] = addr & 0x00FF;
-	txbuf[3] = len;
-
-	memcpy(&txbuf[4], buf, len);
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_SPI_PAGE(addr) != data->page) {
-		error = data->set_page(phys, RMI_SPI_PAGE(addr));
-		if (error < 0)
-			goto exit;
-	}
-
-	error = rmi_spi_xfer(phys, buf, len + 4, NULL, 0);
-	if (error < 0)
-		goto exit;
-	error = len;
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return error;
-}
-
-static int rmi_spi_v2_write(struct rmi_phys_device *phys, u16 addr, u8 data)
-{
-	int error = rmi_spi_v2_write_block(phys, addr, &data, 1);
-
-	return (error == 1) ? 0 : error;
-}
-
-static int rmi_spi_v1_write_block(struct rmi_phys_device *phys, u16 addr,
-				  u8 *buf, int len)
-{
-	struct rmi_spi_data *data = phys->data;
-	unsigned char txbuf[len + 2];
-	int error;
-
-	txbuf[0] = (addr >> 8) & ~RMI_V1_READ_FLAG;
-	txbuf[1] = addr;
-	memcpy(txbuf+2, buf, len);
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_SPI_PAGE(addr) != data->page) {
-		error = data->set_page(phys, RMI_SPI_PAGE(addr));
-		if (error < 0)
-			goto exit;
-	}
-
-	error = rmi_spi_xfer(phys, txbuf, len + 2, NULL, 0);
-	if (error < 0)
-		goto exit;
-	error = len;
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return error;
-}
-
-static int rmi_spi_v1_write(struct rmi_phys_device *phys, u16 addr, u8 data)
-{
-	int error = rmi_spi_v1_write_block(phys, addr, &data, 1);
-
-	return (error == 1) ? 0 : error;
-}
-
-static int rmi_spi_v2_split_read_block(struct rmi_phys_device *phys, u16 addr,
-				       u8 *buf, int len)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[4];
-	u8 rxbuf[len + 1]; /* one extra byte for read length */
-	int error;
-
-	txbuf[0] = SPI_V2_PREPARE_SPLIT_READ;
-	txbuf[1] = (addr >> 8) & 0x00FF;
-	txbuf[2] = addr & 0x00ff;
-	txbuf[3] = len;
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_SPI_PAGE(addr) != data->page) {
-		error = data->set_page(phys, RMI_SPI_PAGE(addr));
-		if (error < 0)
-			goto exit;
-	}
-
-	data->split_read_pending = true;
-
-	error = rmi_spi_xfer(phys, txbuf, 4, NULL, 0);
-	if (error < 0) {
-		data->split_read_pending = false;
-		goto exit;
-	}
-
-	wait_for_completion(&data->irq_comp);
-
-	txbuf[0] = SPI_V2_EXECUTE_SPLIT_READ;
-	txbuf[1] = 0;
-
-	error = rmi_spi_xfer(phys, txbuf, 2, rxbuf, len + 1);
-	data->split_read_pending = false;
-	if (error < 0)
-		goto exit;
-
-	/* first byte is length */
-	if (rxbuf[0] != len) {
-		error = -EIO;
-		goto exit;
-	}
-
-	memcpy(buf, rxbuf + 1, len);
-	error = len;
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return error;
-}
-
-static int rmi_spi_v2_read_block(struct rmi_phys_device *phys, u16 addr,
-				 u8 *buf, int len)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[4];
-	int error;
-
-	txbuf[0] = SPI_V2_UNIFIED_READ;
-	txbuf[1] = (addr >> 8) & 0x00FF;
-	txbuf[2] = addr & 0x00ff;
-	txbuf[3] = len;
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_SPI_PAGE(addr) != data->page) {
-		error = data->set_page(phys, RMI_SPI_PAGE(addr));
-		if (error < 0)
-			goto exit;
-	}
-
-	error = rmi_spi_xfer(phys, txbuf, 4, buf, len);
-	if (error < 0)
-		goto exit;
-	error = len;
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return error;
-}
-
-static int rmi_spi_v2_read(struct rmi_phys_device *phys, u16 addr, u8 *buf)
-{
-	int error = rmi_spi_v2_read_block(phys, addr, buf, 1);
-
-	return (error == 1) ? 0 : error;
-}
-
-static int rmi_spi_v1_read_block(struct rmi_phys_device *phys, u16 addr,
-				 u8 *buf, int len)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[2];
-	int error;
-
-	txbuf[0] = (addr >> 8) | RMI_V1_READ_FLAG;
-	txbuf[1] = addr;
-
-	mutex_lock(&data->page_mutex);
-
-	if (RMI_SPI_PAGE(addr) != data->page) {
-		error = data->set_page(phys, RMI_SPI_PAGE(addr));
-		if (error < 0)
-			goto exit;
-	}
-
-	error = rmi_spi_xfer(phys, txbuf, 2, buf, len);
-	if (error < 0)
-		goto exit;
-	error = len;
-
-exit:
-	mutex_unlock(&data->page_mutex);
-	return error;
-}
-
-static int rmi_spi_v1_read(struct rmi_phys_device *phys, u16 addr, u8 *buf)
-{
-	int error = rmi_spi_v1_read_block(phys, addr, buf, 1);
-
-	return (error == 1) ? 0 : error;
-}
-
-#define RMI_SPI_PAGE_SELECT_WRITE_LENGTH 1
-
-static int rmi_spi_v1_set_page(struct rmi_phys_device *phys, u8 page)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[] = {RMI_PAGE_SELECT_REGISTER >> 8,
-		RMI_PAGE_SELECT_REGISTER & 0xFF, page};
-	int error;
-
-	error = rmi_spi_xfer(phys, txbuf, sizeof(txbuf), NULL, 0);
-	if (error < 0) {
-		dev_err(phys->dev, "Failed to set page select, code: %d.\n",
-			error);
-		return error;
-	}
-
-	data->page = page;
-
-	return RMI_SPI_PAGE_SELECT_WRITE_LENGTH;
-}
-
-static int rmi_spi_v2_set_page(struct rmi_phys_device *phys, u8 page)
-{
-	struct rmi_spi_data *data = phys->data;
-	u8 txbuf[] = {SPI_V2_WRITE, RMI_PAGE_SELECT_REGISTER >> 8,
-		RMI_PAGE_SELECT_REGISTER & 0xFF,
-		RMI_SPI_PAGE_SELECT_WRITE_LENGTH, page};
-	int error;
-
-	error = rmi_spi_xfer(phys, txbuf, sizeof(txbuf), NULL, 0);
-	if (error < 0) {
-		dev_err(phys->dev, "Failed to set page select, code: %d.\n",
-			error);
-		return error;
-	}
-
-	data->page = page;
-
-	return RMI_SPI_PAGE_SELECT_WRITE_LENGTH;
-}
-
-
-static int acquire_attn_irq(struct rmi_spi_data *data)
-{
-	int retval;
-	struct rmi_phys_device *rmi_phys = data->phys;
-
-	retval = request_threaded_irq(data->irq, rmi_spi_hard_irq,
-				rmi_spi_irq_thread, data->irq_flags,
-				dev_name(rmi_phys->dev), rmi_phys);
-	if (retval < 0) {
-		dev_err(&(rmi_phys->rmi_dev->dev), "request_threaded_irq "
-			"failed, code: %d.\n", retval);
-	}
-	return retval;
-}
-
-static int setup_attn(struct rmi_spi_data *data)
-{
-	int retval;
-	struct rmi_phys_device *rmi_phys = data->phys;
-	struct rmi_device_platform_data *pdata = rmi_phys->dev->platform_data;
-
-	retval = acquire_attn_irq(data);
-	if (retval < 0)
-		return retval;
-
-#if defined(CONFIG_RMI4_DEV)
-	retval = gpio_export(pdata->attn_gpio, false);
-	if (retval) {
-		dev_warn(&(rmi_phys->rmi_dev->dev),
-			 "WARNING: Failed to export ATTN gpio!\n");
-		retval = 0;
-	} else {
-		retval = gpio_export_link(&(rmi_phys->rmi_dev->dev), "attn",
-					pdata->attn_gpio);
-		if (retval) {
-			dev_warn(&(rmi_phys->rmi_dev->dev), "WARNING: "
-				"Failed to symlink ATTN gpio!\n");
-			retval = 0;
-		} else {
-			dev_info(&(rmi_phys->rmi_dev->dev),
-				"%s: Exported GPIO %d.", __func__,
-				pdata->attn_gpio);
-		}
-	}
-#endif /* CONFIG_RMI4_DEV */
-
-	return retval;
-}
-
-static int setup_polling(struct rmi_spi_data *data)
-{
-	INIT_WORK(&data->poll_work, spi_poll_work);
-	hrtimer_init(&data->poll_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
-	data->poll_timer.function = spi_poll_timer;
-	hrtimer_start(&data->poll_timer, ktime_set(1, 0), HRTIMER_MODE_REL);
-
-	return 0;
-}
-
-static int enable_device(struct rmi_phys_device *phys)
-{
-	int retval = 0;
-
-	struct rmi_spi_data *data = phys->data;
-
-	if (data->enabled) {
-		dev_dbg(phys->dev, "Physical device already enabled.\n");
-		return 0;
-	}
-
-	retval = acquire_attn_irq(data);
-	if (retval)
-		goto error_exit;
-
-	data->enabled = true;
-	dev_dbg(phys->dev, "Physical device enabled.\n");
-	return 0;
-
-error_exit:
-	dev_err(phys->dev, "Failed to enable physical device. Code=%d.\n",
-		retval);
-	return retval;
-}
-
-static void disable_device(struct rmi_phys_device *phys)
-{
-	struct rmi_spi_data *data = phys->data;
-
-	if (!data->enabled) {
-		dev_warn(phys->dev, "Physical device already disabled.\n");
-		return;
-	}
-	disable_irq(data->irq);
-	free_irq(data->irq, data->phys);
-
-	dev_dbg(phys->dev, "Physical device disabled.\n");
-	data->enabled = false;
-}
-
-#define DUMMY_READ_SLEEP_US 10
-
-static int rmi_spi_check_device(struct rmi_phys_device *rmi_phys)
-{
-	u8 buf[6];
-	int error;
-	int i;
-
-	/* Some SPI subsystems return 0 for the very first read you do.  So
-	 * we use this dummy read to get that out of the way.
-	 */
-	error = rmi_spi_v1_read_block(rmi_phys, PDT_START_SCAN_LOCATION,
-				      buf, sizeof(buf));
-	if (error < 0) {
-		dev_err(rmi_phys->dev, "dummy read failed with %d.\n", error);
-		return error;
-	}
-	udelay(DUMMY_READ_SLEEP_US);
-
-	/* Force page select to 0.
-	 */
-	error = rmi_spi_v1_set_page(rmi_phys, 0x00);
-	if (error < 0)
-		return error;
-
-	/* Now read the first PDT entry.  We know where this is, and if the
-	 * RMI4 device is out there, these 6 bytes will be something other
-	 * than all 0x00 or 0xFF.  We need to check for 0x00 and 0xFF,
-	 * because many (maybe all) SPI implementations will return all 0x00
-	 * or all 0xFF on read if the device is not connected.
-	 */
-	error = rmi_spi_v1_read_block(rmi_phys, PDT_START_SCAN_LOCATION,
-				      buf, sizeof(buf));
-	if (error < 0) {
-		dev_err(rmi_phys->dev, "probe read failed with %d.\n", error);
-		return error;
-	}
-	for (i = 0; i < sizeof(buf); i++) {
-		if (buf[i] != 0x00 && buf[i] != 0xFF)
-			return error;
-	}
-
-	dev_err(rmi_phys->dev, "probe read returned invalid block.\n");
-	return -ENODEV;
-}
-
-
-static int __devinit rmi_spi_probe(struct spi_device *spi)
-{
-	struct rmi_phys_device *rmi_phys;
-	struct rmi_spi_data *data;
-	struct rmi_device_platform_data *pdata = spi->dev.platform_data;
-	u8 buf[2];
-	int retval;
-
-	if (!pdata) {
-		dev_err(&spi->dev, "no platform data\n");
-		return -EINVAL;
-	}
-
-	if (spi->master->flags & SPI_MASTER_HALF_DUPLEX)
-		return -EINVAL;
-
-	spi->bits_per_word = 8;
-	spi->mode = SPI_MODE_3;
-	retval = spi_setup(spi);
-	if (retval < 0) {
-		dev_err(&spi->dev, "spi_setup failed!\n");
-		return retval;
-	}
-
-	rmi_phys = kzalloc(sizeof(struct rmi_phys_device), GFP_KERNEL);
-	if (!rmi_phys)
-		return -ENOMEM;
-
-	data = kzalloc(sizeof(struct rmi_spi_data), GFP_KERNEL);
-	if (!data) {
-		retval = -ENOMEM;
-		goto err_phys;
-	}
-	data->enabled = true;	/* We plan to come up enabled. */
-	data->irq = gpio_to_irq(pdata->attn_gpio);
-	if (pdata->level_triggered) {
-		data->irq_flags = IRQF_ONESHOT |
-			((pdata->attn_polarity == RMI_ATTN_ACTIVE_HIGH) ?
-			IRQF_TRIGGER_HIGH : IRQF_TRIGGER_LOW);
-	} else {
-		data->irq_flags =
-			(pdata->attn_polarity == RMI_ATTN_ACTIVE_HIGH) ?
-			IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
-	}
-	data->phys = rmi_phys;
-
-	rmi_phys->data = data;
-	rmi_phys->dev = &spi->dev;
-
-	rmi_phys->write = rmi_spi_v1_write;
-	rmi_phys->write_block = rmi_spi_v1_write_block;
-	rmi_phys->read = rmi_spi_v1_read;
-	rmi_phys->read_block = rmi_spi_v1_read_block;
-	rmi_phys->enable_device = enable_device;
-	rmi_phys->disable_device = disable_device;
-	data->set_page = rmi_spi_v1_set_page;
-
-	rmi_phys->info.proto = spi_v1_proto_name;
-
-	mutex_init(&data->page_mutex);
-
-	dev_set_drvdata(&spi->dev, rmi_phys);
-
-	pdata->spi_data.block_delay_us = pdata->spi_data.block_delay_us ?
-			pdata->spi_data.block_delay_us : RMI_SPI_BLOCK_DELAY_US;
-	pdata->spi_data.read_delay_us = pdata->spi_data.read_delay_us ?
-			pdata->spi_data.read_delay_us : RMI_SPI_BYTE_DELAY_US;
-	pdata->spi_data.write_delay_us = pdata->spi_data.write_delay_us ?
-			pdata->spi_data.write_delay_us : RMI_SPI_BYTE_DELAY_US;
-	pdata->spi_data.split_read_block_delay_us =
-			pdata->spi_data.split_read_block_delay_us ?
-			pdata->spi_data.split_read_block_delay_us :
-			RMI_SPI_BLOCK_DELAY_US;
-	pdata->spi_data.split_read_byte_delay_us =
-			pdata->spi_data.split_read_byte_delay_us ?
-			pdata->spi_data.split_read_byte_delay_us :
-			RMI_SPI_BYTE_DELAY_US;
-
-	if (pdata->gpio_config) {
-		retval = pdata->gpio_config(pdata->gpio_data, true);
-		if (retval < 0) {
-			dev_err(&spi->dev, "Failed to setup GPIOs, code: %d.\n",
-				retval);
-			goto err_data;
-		}
-	}
-
-	retval = rmi_spi_check_device(rmi_phys);
-	if (retval < 0)
-		goto err_gpio;
-
-	/* check if this is an SPI v2 device */
-	retval = rmi_spi_v1_read_block(rmi_phys, RMI_PROTOCOL_VERSION_ADDRESS,
-				      buf, 2);
-	if (retval < 0) {
-		dev_err(&spi->dev, "failed to get SPI version number!\n");
-		goto err_gpio;
-	}
-	dev_dbg(&spi->dev, "SPI version is %d", buf[0]);
-
-	if (buf[0] == 1) {
-		/* SPIv2 */
-		rmi_phys->write		= rmi_spi_v2_write;
-		rmi_phys->write_block	= rmi_spi_v2_write_block;
-		rmi_phys->read		= rmi_spi_v2_read;
-		data->set_page		= rmi_spi_v2_set_page;
-
-		rmi_phys->info.proto = spi_v2_proto_name;
-
-		if (pdata->attn_gpio > 0) {
-			init_completion(&data->irq_comp);
-			rmi_phys->read_block = rmi_spi_v2_split_read_block;
-		} else {
-			dev_warn(&spi->dev, "WARNING: SPI V2 detected, but no "
-				"attention GPIO was specified. This is unlikely"
-				" to work well.\n");
-			rmi_phys->read_block = rmi_spi_v2_read_block;
-		}
-	} else if (buf[0] != 0) {
-		dev_err(&spi->dev, "Unrecognized SPI version %d.\n", buf[0]);
-		retval = -ENODEV;
-		goto err_gpio;
-	}
-
-	retval = rmi_register_phys_device(rmi_phys);
-	if (retval) {
-		dev_err(&spi->dev, "failed to register physical driver\n");
-		goto err_gpio;
-	}
-
-	if (pdata->attn_gpio > 0) {
-		retval = setup_attn(data);
-		if (retval < 0)
-			goto err_unregister;
-	} else {
-		retval = setup_polling(data);
-		if (retval < 0)
-			goto err_unregister;
-	}
-
-	dev_info(&spi->dev, "registered RMI SPI driver\n");
-	return 0;
-
-err_unregister:
-	rmi_unregister_phys_device(rmi_phys);
-err_gpio:
-	if (pdata->gpio_config)
-		pdata->gpio_config(pdata->gpio_data, false);
-err_data:
-	kfree(data);
-err_phys:
-	kfree(rmi_phys);
-	return retval;
-}
-
-static int __devexit rmi_spi_remove(struct spi_device *spi)
-{
-	struct rmi_phys_device *phys = dev_get_drvdata(&spi->dev);
-	struct rmi_device_platform_data *pd = spi->dev.platform_data;
-
-	disable_device(phys);
-	rmi_unregister_phys_device(phys);
-	kfree(phys->data);
-	kfree(phys);
-
-	if (pd->gpio_config)
-		pd->gpio_config(pdata->gpio_data, false);
-
-	return 0;
-}
-
-static const struct spi_device_id rmi_id[] = {
-	{ "rmi", 0 },
-	{ "rmi_spi", 0 },
-	{ }
-};
-MODULE_DEVICE_TABLE(spi, rmi_id);
-
-static struct spi_driver rmi_spi_driver = {
-	.driver = {
-		.owner	= THIS_MODULE,
-		.name	= "rmi_spi",
-	},
-	.id_table	= rmi_id,
-	.probe		= rmi_spi_probe,
-	.remove		= __devexit_p(rmi_spi_remove),
-};
-
-static int __init rmi_spi_init(void)
-{
-	return spi_register_driver(&rmi_spi_driver);
-}
-
-static void __exit rmi_spi_exit(void)
-{
-	spi_unregister_driver(&rmi_spi_driver);
-}
-
-module_init(rmi_spi_init);
-module_exit(rmi_spi_exit);
-
-MODULE_AUTHOR("Christopher Heiny <cheiny@synaptics.com>");
-MODULE_DESCRIPTION("RMI SPI driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RMI_DRIVER_VERSION);
\ No newline at end of file
diff --git a/include/linux/rmi.h b/include/linux/rmi.h
deleted file mode 100755
index 354eea9739a12..0000000000000
--- a/include/linux/rmi.h
+++ /dev/null
@@ -1,609 +0,0 @@
-/*
- * Copyright (c) 2011 Synaptics Incorporated
- * Copyright (c) 2011 Unixphere
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef _RMI_H
-#define _RMI_H
-#include <linux/kernel.h>
-#include <linux/lockdep.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/device.h>
-#include <linux/cdev.h>
-#include <linux/mutex.h>
-#include <linux/stat.h>
-#include <linux/wait.h>
-#include <linux/list.h>
-#include <linux/interrupt.h>
-
-#ifdef CONFIG_RMI_DEBUG
-#include <linux/debugfs.h>
-#endif
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-#include <linux/earlysuspend.h>
-#endif
-
-
-/* Permissions for sysfs attributes.  Since the permissions policy will change
- * on a global basis in the future, rather than edit all sysfs attrs everywhere
- * in the driver (and risk screwing that up in the process), we use this handy
- * set of #defines.  That way when we change the policy for sysfs permissions,
- * we only need to change them here.
- */
-#define RMI_RO_ATTR S_IRUGO
-#define RMI_RW_ATTR (S_IRUGO | S_IWUGO)
-#define RMI_WO_ATTR S_IWUGO
-
-#define PDT_START_SCAN_LOCATION 0x00e9
-
-enum rmi_attn_polarity {
-	RMI_ATTN_ACTIVE_LOW = 0,
-	RMI_ATTN_ACTIVE_HIGH = 1
-};
-
-/**
- * struct rmi_f11_axis_alignment - target axis alignment
- * @swap_axes: set to TRUE if desired to swap x- and y-axis
- * @flip_x: set to TRUE if desired to flip direction on x-axis
- * @flip_y: set to TRUE if desired to flip direction on y-axis
- */
-struct rmi_f11_2d_axis_alignment {
-	bool swap_axes;
-	bool flip_x;
-	bool flip_y;
-	int clip_X_low;
-	int clip_Y_low;
-	int clip_X_high;
-	int clip_Y_high;
-	int offset_X;
-	int offset_Y;
-	int rel_report_enabled;
-};
-
-/**
- * struct rmi_f01_power - override default power management settings.
- *
- */
-enum rmi_f01_nosleep {
-	RMI_F01_NOSLEEP_DEFAULT = 0,
-	RMI_F01_NOSLEEP_OFF = 1,
-	RMI_F01_NOSLEEP_ON = 2
-};
-
-struct rmi_f01_power_management {
-	enum rmi_f01_nosleep nosleep;
-	u8 wakeup_threshold;
-	u8 doze_holdoff;
-	u8 doze_interval;
-};
-
-struct rmi_f19_button_map {
-	unsigned char nbuttons;
-	unsigned char *map;
-};
-
-struct rmi_f1a_button_map {
-	unsigned char nbuttons;
-	unsigned char *map;
-};
-
-struct virtualbutton_map {
-	u16 x;
-	u16 y;
-	u16 width;
-	u16 height;
-	u16 code;
-};
-
-struct rmi_f11_virtualbutton_map {
-	u8 buttons;
-	struct virtualbutton_map *map;
-};
-struct rmi_device_platform_data_spi {
-	int block_delay_us;
-	int split_read_block_delay_us;
-	int read_delay_us;
-	int write_delay_us;
-	int split_read_byte_delay_us;
-	int pre_delay_us;
-	int post_delay_us;
-
-	void *cs_assert_data;
-	int (*cs_assert) (const void *cs_assert_data, const bool assert);
-};
-
-struct rmi_device_platform_data {
-	char *driver_name;
-	char *sensor_name;	/* Used for diagnostics. */
-
-	int attn_gpio;
-	enum rmi_attn_polarity attn_polarity;
-	bool level_triggered;
-	void *gpio_data;
-	int (*gpio_config)(void *gpio_data, bool configure);
-
-	int reset_delay_ms;
-
-	struct rmi_device_platform_data_spi spi_data;
-
-	/* function handler pdata */
-	struct rmi_f01_power_management power_management;
-	struct rmi_f11_2d_axis_alignment axis_align;
-	struct rmi_f19_button_map *button_map;
-	struct rmi_f1a_button_map *f1a_button_map;
-	struct rmi_f11_virtualbutton_map *virtualbutton_map;
-	int (*init_hw)(void);
-#ifdef	CONFIG_PM
-	void *pm_data;
-	int (*pre_suspend) (const void *pm_data);
-	int (*post_resume) (const void *pm_data);
-#endif
-};
-
-/**
- * struct rmi_function_descriptor - RMI function base addresses
- * @query_base_addr: The RMI Query base address
- * @command_base_addr: The RMI Command base address
- * @control_base_addr: The RMI Control base address
- * @data_base_addr: The RMI Data base address
- * @interrupt_source_count: The number of irqs this RMI function needs
- * @function_number: The RMI function number
- *
- * This struct is used when iterating the Page Description Table. The addresses
- * are 16-bit values to include the current page address.
- *
- */
-struct rmi_function_descriptor {
-	u16 query_base_addr;
-	u16 command_base_addr;
-	u16 control_base_addr;
-	u16 data_base_addr;
-	u8 interrupt_source_count;
-	u8 function_number;
-	u8 function_version;
-};
-
-struct rmi_function_container;
-struct rmi_device;
-
-/**
- * struct rmi_function_handler - an RMI function handler
- * @func: The RMI function number
- * @init: Callback for RMI function init
- * @attention: Callback for RMI function attention
- * @suspend: Callback for function suspend, returns 0 for success.
- * @resume: Callback for RMI function resume, returns 0 for success.
- * @remove: Callback for RMI function removal
- *
- * This struct describes the interface of an RMI function. These are
- * registered to the bus using the rmi_register_function_driver() call.
- *
- */
-struct rmi_function_handler {
-	int func;
-	int (*init)(struct rmi_function_container *fc);
-	int (*config)(struct rmi_function_container *fc);
-	int (*reset)(struct rmi_function_container *fc);
-	int (*attention)(struct rmi_function_container *fc, u8 *irq_bits);
-#ifdef CONFIG_PM
-	int (*suspend)(struct rmi_function_container *fc);
-	int (*resume)(struct rmi_function_container *fc);
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	int (*early_suspend)(struct rmi_function_container *fc);
-	int (*late_resume)(struct rmi_function_container *fc);
-#endif
-#endif
-	void (*remove)(struct rmi_function_container *fc);
-};
-
-/**
- * struct rmi_function_container - an element in a function handler list
- * @list: The list
- * @fd: The function descriptor of the RMI function
- * @rmi_dev: Pointer to the RMI device associated with this function container
- * @fh: The callbacks connected to this function
- * @num_of_irqs: The number of irqs needed by this function
- * @irq_pos: The position in the irq bitfield this function holds
- * @data: Private data pointer
- *
- */
-struct rmi_function_container {
-	struct list_head list;
-
-	struct rmi_function_descriptor fd;
-	struct rmi_device *rmi_dev;
-	struct rmi_function_handler *fh;
-	struct device dev;
-
-#ifdef CONFIG_RMI4_DEBUG
-	struct dentry *debugfs_root;
-#endif
-
-	int num_of_irqs;
-	int irq_pos;
-	u8 *irq_mask;
-
-	void *data;
-};
-#define to_rmi_function_container(d) \
-		container_of(d, struct rmi_function_container, dev);
-
-
-/**
- * struct rmi_driver - represents an RMI driver
- * @driver: Device driver model driver
- * @probe: Callback for device probe
- * @remove: Callback for device removal
- * @shutdown: Callback for device shutdown
- * @irq_handler: Callback for handling irqs
- * @fh_add: Callback for function handler add
- * @fh_remove: Callback for function handler remove
- * @get_func_irq_mask: Callback for calculating interrupt mask
- * @store_irq_mask: Callback for storing and replacing interrupt mask
- * @restore_irq_mask: Callback for restoring previously stored interrupt mask
- * @data: Private data pointer
- *
- * The RMI driver implements a driver on the RMI bus.
- *
- */
-struct rmi_driver {
-	struct device_driver driver;
-
-	int (*probe)(struct rmi_device *rmi_dev);
-	int (*remove)(struct rmi_device *rmi_dev);
-	void (*shutdown)(struct rmi_device *rmi_dev);
-	int (*irq_handler)(struct rmi_device *rmi_dev, int irq);
-	int (*reset_handler)(struct rmi_device *rmi_dev);
-	void (*fh_add)(struct rmi_device *rmi_dev,
-		       struct rmi_function_handler *fh);
-	void (*fh_remove)(struct rmi_device *rmi_dev,
-			  struct rmi_function_handler *fh);
-	u8* (*get_func_irq_mask)(struct rmi_device *rmi_dev,
-			    struct rmi_function_container *fc);
-	int (*store_irq_mask)(struct rmi_device *rmi_dev, u8* new_interupts);
-	int (*restore_irq_mask)(struct rmi_device *rmi_dev);
-	void *data;
-};
-#define to_rmi_driver(d) \
-	container_of(d, struct rmi_driver, driver);
-
-/** struct rmi_phys_info - diagnostic information about the RMI physical
- * device, used in the phys sysfs file.
- * @proto String indicating the protocol being used.
- * @tx_count Number of transmit operations.
- * @tx_bytes Number of bytes transmitted.
- * @tx_errs  Number of errors encountered during transmit operations.
- * @rx_count Number of receive operations.
- * @rx_bytes Number of bytes received.
- * @rx_errs  Number of errors encountered during receive operations.
- * @att_count Number of times ATTN assertions have been handled.
- */
-struct rmi_phys_info {
-	char *proto;
-	long tx_count;
-	long tx_bytes;
-	long tx_errs;
-	long rx_count;
-	long rx_bytes;
-	long rx_errs;
-	long attn_count;
-};
-
-/**
- * struct rmi_phys_device - represent an RMI physical device
- * @dev: Pointer to the communication device, e.g. i2c or spi
- * @rmi_dev: Pointer to the RMI device
- * @write: Callback for write
- * @write_block: Callback for writing a block of data
- * @read: Callback for read
- * @read_block: Callback for reading a block of data
- * @data: Private data pointer
- *
- * The RMI physical device implements the glue between different communication
- * buses such as I2C and SPI.
- *
- */
-struct rmi_phys_device {
-	struct device *dev;
-	struct rmi_device *rmi_dev;
-
-	int (*write)(struct rmi_phys_device *phys, u16 addr, u8 data);
-	int (*write_block)(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			   int len);
-	int (*read)(struct rmi_phys_device *phys, u16 addr, u8 *buf);
-	int (*read_block)(struct rmi_phys_device *phys, u16 addr, u8 *buf,
-			  int len);
-
-	int (*enable_device) (struct rmi_phys_device *phys);
-	void (*disable_device) (struct rmi_phys_device *phys);
-
-	void *data;
-
-	struct rmi_phys_info info;
-};
-
-/**
- * struct rmi_device - represents an RMI device
- * @dev: The device created for the RMI bus
- * @number: Unique number for the device on the bus.
- * @driver: Pointer to associated driver
- * @phys: Pointer to the physical interface
- * @early_suspend_handler: Pointers to early_suspend and late_resume, if
- * configured.
- *
- * This structs represent an RMI device.
- *
- */
-struct rmi_device {
-	struct device dev;
-	int number;
-
-	struct rmi_driver *driver;
-	struct rmi_phys_device *phys;
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	struct early_suspend early_suspend_handler;
-#endif
-#ifdef CONFIG_RMI4_DEBUG
-	struct dentry *debugfs_root;
-#endif
-};
-#define to_rmi_device(d) container_of(d, struct rmi_device, dev);
-#define to_rmi_platform_data(d) ((d)->phys->dev->platform_data);
-
-static inline void rmi_set_driverdata(struct rmi_device *d, void *data)
-{
-	dev_set_drvdata(&d->dev, data);
-}
-
-static inline void *rmi_get_driverdata(struct rmi_device *d)
-{
-	return dev_get_drvdata(&d->dev);
-}
-
-/**
- * rmi_read - RMI read byte
- * @d: Pointer to an RMI device
- * @addr: The address to read from
- * @buf: The read buffer
- *
- * Reads a byte of data using the underlaying physical protocol in to buf. It
- * returns zero or a negative error code.
- */
-static inline int rmi_read(struct rmi_device *d, u16 addr, u8 *buf)
-{
-	return d->phys->read(d->phys, addr, buf);
-}
-
-/**
- * rmi_read_block - RMI read block
- * @d: Pointer to an RMI device
- * @addr: The start address to read from
- * @buf: The read buffer
- * @len: Length of the read buffer
- *
- * Reads a block of byte data using the underlaying physical protocol in to buf.
- * It returns the amount of bytes read or a negative error code.
- */
-static inline int rmi_read_block(struct rmi_device *d, u16 addr, u8 *buf,
-				 int len)
-{
-	return d->phys->read_block(d->phys, addr, buf, len);
-}
-
-/**
- * rmi_write - RMI write byte
- * @d: Pointer to an RMI device
- * @addr: The address to write to
- * @data: The data to write
- *
- * Writes a byte from buf using the underlaying physical protocol. It
- * returns zero or a negative error code.
- */
-static inline int rmi_write(struct rmi_device *d, u16 addr, u8 data)
-{
-	return d->phys->write(d->phys, addr, data);
-}
-
-/**
- * rmi_write_block - RMI write block
- * @d: Pointer to an RMI device
- * @addr: The start address to write to
- * @buf: The write buffer
- * @len: Length of the write buffer
- *
- * Writes a block of byte data from buf using the underlaying physical protocol.
- * It returns the amount of bytes written or a negative error code.
- */
-static inline int rmi_write_block(struct rmi_device *d, u16 addr, u8 *buf,
-				  int len)
-{
-	return d->phys->write_block(d->phys, addr, buf, len);
-}
-
-/**
- * rmi_register_driver - register rmi driver
- * @driver: the driver to register
- *
- * This function registers an RMI driver to the RMI bus.
- */
-int rmi_register_driver(struct rmi_driver *driver);
-
-/**
- * rmi_unregister_driver - unregister rmi driver
- * @driver: the driver to unregister
- *
- * This function unregisters an RMI driver to the RMI bus.
- */
-void rmi_unregister_driver(struct rmi_driver *driver);
-
-/**
- * rmi_register_phys_device - register a physical device connection
- * @phys: the physical driver to register
- *
- * This function registers a physical driver to the RMI bus. These drivers
- * provide a communication layer for the drivers connected to the bus, e.g.
- * I2C, SPI and so on.
- */
-int rmi_register_phys_device(struct rmi_phys_device *phys);
-
-/**
- * rmi_unregister_phys_device - unregister a physical device connection
- * @phys: the physical driver to unregister
- *
- * This function unregisters a physical driver from the RMI bus.
- */
-void rmi_unregister_phys_device(struct rmi_phys_device *phys);
-
-/**
- * rmi_register_function_driver - register an RMI function driver
- * @fh: the function handler to register
- *
- * This function registers support for a new RMI function to the bus. All
- * drivers on the bus will be notified of the presence of the new function
- * driver.
- */
-int rmi_register_function_driver(struct rmi_function_handler *fh);
-
-/**
- * rmi_unregister_function_driver - unregister an RMI function driver
- * @fh: the function handler to unregister
- *
- * This function unregisters a RMI function from the RMI bus. All drivers on
- * the bus will be notified of the removal of a function driver.
- */
-void rmi_unregister_function_driver(struct rmi_function_handler *fh);
-
-/**
- * rmi_get_function_handler - get a pointer to specified RMI function
- * @id: the RMI function id
- *
- * This function gets the specified RMI function handler from the list of
- * supported functions.
- */
-struct rmi_function_handler *rmi_get_function_handler(int id);
-
-
-struct rmi_char_device;
-
-/**
- * rmi_char_driver - a general driver that doesn't handle specific functions,
- * operating outside the bus::sensor::functions
- * @match: returns 1 if the driver wants to talk to the specified rmi_dev.
- *
- * All of the above are optional except driver and init which are required.
- *
- */
-struct rmi_char_driver {
-	struct device_driver driver;
-
-	int (*match)(struct rmi_device *rmi_dev);
-	int (*init)(struct rmi_char_device *cd);
-	int (*attention)(struct rmi_char_device *cd, u8 *irq_bits);
-#ifdef CONFIG_PM
-	int (*suspend)(struct rmi_char_device *cd);
-	int (*resume)(struct rmi_char_device *cd);
-#ifdef CONFIG_HAS_EARLYSUSPEND
-	int (*early_suspend)(struct rmi_char_device *cd);
-	int (*late_resume)(struct rmi_char_device *cd);
-#endif
-#endif
-	void (*remove)(struct rmi_char_device *cd);
-
-	struct list_head devices;
-};
-
-struct rmi_char_device {
-	struct list_head list;
-
-	struct rmi_device *rmi_dev;
-	struct rmi_char_driver *driver;
-	struct device dev;
-
-#ifdef CONFIG_RMI4_DEBUG
-	struct dentry *debugfs_root;
-#endif
-
-	void *data;
-};
-#define to_rmi_char_device(d) \
-		container_of(d, struct rmi_char_device, dev)
-
-int rmi_register_character_driver(struct rmi_char_driver *char_driver);
-int rmi_unregister_character_driver(struct rmi_char_driver *char_driver);
-
-
-/* Helper fn to convert a byte array representing a short in the RMI
- * endian-ness to a short in the native processor's specific endianness.
- * We don't use ntohs/htons here because, well, we're not dealing with
- * a pair of shorts. And casting dest to short* wouldn't work, because
- * that would imply knowing the byte order of short in the first place.
- */
-static inline void batohs(unsigned short *dest, unsigned char *src)
-{
-	*dest = src[1] * 0x100 + src[0];
-}
-
-/* Helper function to convert a short (in host processor endianess) to
- * a byte array in the RMI endianess for shorts.  See above comment for
- * why we dont us htons or something like that.
- */
-static inline void hstoba(unsigned char *dest, unsigned short src)
-{
-	dest[0] = src % 0x100;
-	dest[1] = src / 0x100;
-}
-
-/* Utility routine to handle writes to read-only attributes.  Hopefully
- * this will never happen, but if the user does something stupid, we don't
- * want to accept it quietly (which is what can happen if you just put NULL
- * for the attribute's store function).
- */
-static inline ssize_t rmi_store_error(struct device *dev,
-			struct device_attribute *attr,
-			const char *buf, size_t count)
-{
-	dev_warn(dev,
-		 "RMI4 WARNING: Attempt to write %d characters to read-only "
-		 "attribute %s.", count, attr->attr.name);
-	return -EPERM;
-}
-
-/* Utility routine to handle reads of write-only attributes.  Hopefully
- * this will never happen, but if the user does something stupid, we don't
- * want to accept it quietly (which is what can happen if you just put NULL
- * for the attribute's show function).
- */
-static inline ssize_t rmi_show_error(struct device *dev,
-		       struct device_attribute *attr,
-		       char *buf)
-{
-	dev_warn(dev,
-		 "RMI4 WARNING: Attempt to read from write-only attribute %s.",
-		 attr->attr.name);
-	return -EPERM;
-}
-
-/* utility function for bit access of u8*'s */
-void u8_set_bit(u8 *target, int pos);
-void u8_clear_bit(u8 *target, int pos);
-bool u8_is_set(u8 *target, int pos);
-bool u8_is_any_set(u8 *target, int size);
-void u8_or(u8 *dest, u8* target1, u8* target2, int size);
-void u8_and(u8 *dest, u8* target1, u8* target2, int size);
-#endif

From a24c15fb77275f99d055b72f4005843da82e4321 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 7 Mar 2018 19:51:12 +0800
Subject: [PATCH 0608/1852] soc: rockchip: pvtm: Add support to show
 temperature

Change-Id: Ibdf09a5a043e7f1a6d203513a6f22172e9e24c09
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/soc/rockchip/rockchip_pvtm.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/rockchip/rockchip_pvtm.c b/drivers/soc/rockchip/rockchip_pvtm.c
index 2442baf885f5f..cb24b96cf501f 100644
--- a/drivers/soc/rockchip/rockchip_pvtm.c
+++ b/drivers/soc/rockchip/rockchip_pvtm.c
@@ -28,6 +28,7 @@
 #include <linux/reset.h>
 #include <linux/slab.h>
 #include <linux/soc/rockchip/pvtm.h>
+#include <linux/thermal.h>
 
 #define PX30_PVTM_CORE		0
 #define PX30_PVTM_PMU		1
@@ -93,6 +94,7 @@ struct rockchip_pvtm {
 	struct clk *clk;
 	struct reset_control *rst;
 	const struct rockchip_pvtm_channel *channel;
+	struct thermal_zone_device *tz;
 	u32 (*get_value)(struct rockchip_pvtm *pvtm, unsigned int sub_ch,
 			 unsigned int time_us);
 	void (*set_ring_sel)(struct rockchip_pvtm *pvtm, unsigned int sub_ch);
@@ -108,13 +110,21 @@ static int pvtm_value_show(struct seq_file *s, void *data)
 {
 	struct rockchip_pvtm *pvtm = (struct rockchip_pvtm *)s->private;
 	u32 value;
-	int i;
+	int i, ret, cur_temp;
 
 	if (!pvtm) {
 		pr_err("pvtm struct NULL\n");
 		return -EINVAL;
 	}
 
+	if (pvtm->tz && pvtm->tz->ops && pvtm->tz->ops->get_temp) {
+		ret = pvtm->tz->ops->get_temp(pvtm->tz, &cur_temp);
+		if (ret)
+			dev_err(pvtm->dev, "debug failed to get temp\n");
+		else
+			seq_printf(s, "temp: %d ", cur_temp);
+	}
+	seq_puts(s, "pvtm: ");
 	for (i = 0; i < pvtm->channel->num_sub; i++) {
 		value = pvtm->get_value(pvtm, i, 1000);
 		seq_printf(s, "%d ", value);
@@ -477,10 +487,13 @@ MODULE_DEVICE_TABLE(of, rockchip_pvtm_match);
 static int rockchip_pvtm_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *match;
 	const struct rockchip_pvtm_info *info;
 	struct rockchip_pvtm *pvtm;
 	struct regmap *grf;
+	struct thermal_zone_device *pvtm_tz = NULL;
+	const char *tz_name;
 	int i;
 
 	match = of_match_device(dev->driver->of_match_table, dev);
@@ -503,6 +516,14 @@ static int rockchip_pvtm_probe(struct platform_device *pdev)
 	if (!pvtm)
 		return -ENOMEM;
 
+	if (!of_property_read_string(np, "thermal-zone", &tz_name)) {
+		pvtm_tz = thermal_zone_get_zone_by_name(tz_name);
+		if (IS_ERR(pvtm_tz)) {
+			dev_err(dev, "debug failed to get pvtm_tz\n");
+			pvtm_tz = NULL;
+		}
+	}
+
 	for (i = 0; i < info->num_channels; i++) {
 		pvtm[i].dev = &pdev->dev;
 		pvtm[i].grf = grf;
@@ -510,6 +531,7 @@ static int rockchip_pvtm_probe(struct platform_device *pdev)
 		pvtm[i].sta = info->sta;
 		pvtm[i].get_value = info->get_value;
 		pvtm[i].channel = &info->channels[i];
+		pvtm[i].tz = pvtm_tz;
 		if (info->set_ring_sel)
 			pvtm[i].set_ring_sel = info->set_ring_sel;
 

From c3714cbbcfbf0f72179e611ee16bf040f5b1695d Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 18 Jul 2018 11:10:26 +0800
Subject: [PATCH 0609/1852] scripts: make gcc-wrapper.py compatible with python
 2.7 and 3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Python 3 requires parentheses in call to 'print', meanwhile
the 'line' could be bytes-like, let's decoding to str as utf-8.

This makes the gcc-wrapper.py compatible with both 2.7 and 3.

For example, a bytes-like string as below,
 b'kernel/reboot.c:47:13: error: function declaration isn\xe2\x80\x99t a
 prototype [-Werror=strict-prototypes]\n'
 b' static void no_use()\n'
 b'             ^~~~~~\n'

After decoding, it looks like,
 kernel/reboot.c:47:13: error: function declaration isn’t a prototype
 [-Werror=strict-prototypes]
  static void no_use()
              ^~~~~~

Change-Id: Icacdbe2ca7b7ab674ab90e54b79d3176e0061ac6
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/gcc-wrapper.py | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/scripts/gcc-wrapper.py b/scripts/gcc-wrapper.py
index 672b504b84e0b..3a4b766924c47 100755
--- a/scripts/gcc-wrapper.py
+++ b/scripts/gcc-wrapper.py
@@ -30,6 +30,7 @@
 # Invoke gcc, looking for warnings, and causing a failure if there are
 # non-whitelisted warnings.
 
+from __future__ import print_function
 import errno
 import re
 import os
@@ -58,13 +59,15 @@
 # Capture the name of the object file, can find it.
 ofile = None
 
+do_exit = False;
+
 warning_re = re.compile(r'''(.*/|)([^/]+\.[a-z]+:\d+):(\d+:)? warning:''')
 def interpret_warning(line):
     """Decode the message from gcc.  The messages we care about have a filename, and a warning"""
     line = line.rstrip('\n')
     m = warning_re.match(line)
     if m and m.group(2) not in allowed_warnings:
-        print "error, forbidden warning:", m.group(2)
+        print ("error, forbidden warning:" + m.group(2))
 
         # If there is a warning, remove any object if it exists.
         if ofile:
@@ -72,7 +75,8 @@ def interpret_warning(line):
                 os.remove(ofile)
             except OSError:
                 pass
-        sys.exit(1)
+        global do_exit
+        do_exit = True;
 
 def run_gcc():
     args = sys.argv[1:]
@@ -89,17 +93,19 @@ def run_gcc():
     try:
         proc = subprocess.Popen(args, stderr=subprocess.PIPE)
         for line in proc.stderr:
-            print line,
-            interpret_warning(line)
+            print (line.decode("utf-8"), end="")
+            interpret_warning(line.decode("utf-8"))
+        if do_exit:
+            sys.exit(1)
 
         result = proc.wait()
     except OSError as e:
         result = e.errno
         if result == errno.ENOENT:
-            print args[0] + ':',e.strerror
-            print 'Is your PATH set correctly?'
+            print (args[0] + ':' + e.strerror)
+            print ('Is your PATH set correctly?')
         else:
-            print ' '.join(args), str(e)
+            print (' '.join(args) + str(e))
 
     return result
 

From b68f6e8aeb22a282750a4f67d4b139dfb763e31b Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 15:31:23 +0800
Subject: [PATCH 0610/1852] media: rk-isp10: fix owned_by_drv_count is not 0
 when stop stream

Change-Id: Iec72be86e515c2f29dfb12a6004db443769edd9f
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_v4l2.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index 0e02a5793923d..94c55640451f6 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -1266,12 +1266,16 @@ static void cif_isp10_v4l2_requeue_bufs(
 			to_cif_isp10_device(q), stream_id, ispbuf))) {
 			spin_lock(&dev->vbreq_lock);
 			if ((buf->state == VB2_BUF_STATE_QUEUED) ||
-			    (buf->state == VB2_BUF_STATE_ACTIVE))
+			    (buf->state == VB2_BUF_STATE_DONE)) {
 				buf->state = VB2_BUF_STATE_ACTIVE;
-			else
+				atomic_inc(&q->owned_by_drv_count);
+			} else if (buf->state == VB2_BUF_STATE_ACTIVE) {
+				/* nothing */
+			} else {
 				cif_isp10_pltfrm_pr_err(NULL,
 					"skip state change for buf: %d, state: %d\n",
 					buf->index, buf->state);
+			}
 			spin_unlock(&dev->vbreq_lock);
 		} else {
 			cif_isp10_pltfrm_pr_err(NULL,

From 14b8415e98fc59b581fc26accb2eb0ad130ff491 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 15:35:51 +0800
Subject: [PATCH 0611/1852] media: rk-isp10: fix write fmt is not correct when
 setting mi_ctrl

Change-Id: I55b4c3ced65d690a2f27755e09c3933dfc265ee7
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c | 43 +++++++++++----------
 1 file changed, 23 insertions(+), 20 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 547739556b3eb..0995351ee508f 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -2182,13 +2182,14 @@ static int cif_isp10_config_mi_mp(
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
-	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL) |
-		CIF_MI_CTRL_MP_WRITE_FMT(writeformat) |
-		CIF_MI_CTRL_BURST_LEN_LUM_16 |
-		CIF_MI_CTRL_BURST_LEN_CHROM_16 |
-		CIF_MI_CTRL_INIT_BASE_EN |
-		CIF_MI_CTRL_INIT_OFFSET_EN |
-		CIF_MI_MP_AUTOUPDATE_ENABLE;
+	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL);
+	mi_ctrl &= ~(CIF_MI_CTRL_MP_WRITE_FMT(3));
+	mi_ctrl |= CIF_MI_CTRL_MP_WRITE_FMT(writeformat) |
+		   CIF_MI_CTRL_BURST_LEN_LUM_16 |
+		   CIF_MI_CTRL_BURST_LEN_CHROM_16 |
+		   CIF_MI_CTRL_INIT_BASE_EN |
+		   CIF_MI_CTRL_INIT_OFFSET_EN |
+		   CIF_MI_MP_AUTOUPDATE_ENABLE;
 
 	cif_iowrite32_verify(mi_ctrl,
 		dev->config.base_addr + CIF_MI_CTRL, ~0);
@@ -2423,14 +2424,15 @@ static int cif_isp10_config_mi_sp(
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
-	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL) |
-		CIF_MI_CTRL_SP_WRITE_FMT(writeformat) |
-		input_format |
-		output_format |
-		burst_len |
-		CIF_MI_CTRL_INIT_BASE_EN |
-		CIF_MI_CTRL_INIT_OFFSET_EN |
-		CIF_MI_SP_AUTOUPDATE_ENABLE;
+	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL);
+	mi_ctrl &= ~(CIF_MI_CTRL_SP_WRITE_FMT(3));
+	mi_ctrl |= CIF_MI_CTRL_SP_WRITE_FMT(writeformat) |
+		   input_format |
+		   output_format |
+		   burst_len |
+		   CIF_MI_CTRL_INIT_BASE_EN |
+		   CIF_MI_CTRL_INIT_OFFSET_EN |
+		   CIF_MI_SP_AUTOUPDATE_ENABLE;
 	cif_iowrite32_verify(mi_ctrl,
 		dev->config.base_addr + CIF_MI_CTRL, ~0);
 
@@ -2562,11 +2564,12 @@ static int cif_isp10_config_mi_dma(
 	cif_iowrite32_verify(llength,
 		dev->config.base_addr + CIF_MI_DMA_Y_LLENGTH, ~0x3);
 
-	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_DMA_CTRL) |
-		CIF_MI_DMA_CTRL_READ_FMT(readformat) |
-		output_format |
-		CIF_MI_DMA_CTRL_BURST_LEN_LUM_64 |
-		CIF_MI_DMA_CTRL_BURST_LEN_CHROM_64;
+	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_DMA_CTRL);
+	mi_ctrl &= ~(CIF_MI_DMA_CTRL_READ_FMT(3) & CIF_MI_DMA_CTRL_FMT_YUV444);
+	mi_ctrl |= CIF_MI_DMA_CTRL_READ_FMT(readformat) |
+		   output_format |
+		   CIF_MI_DMA_CTRL_BURST_LEN_LUM_64 |
+		   CIF_MI_DMA_CTRL_BURST_LEN_CHROM_64;
 	cif_iowrite32_verify(mi_ctrl,
 		dev->config.base_addr + CIF_MI_DMA_CTRL, ~0);
 

From c18f60674606e7bb08c6f30cac70298242f0c0ec Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 15:40:17 +0800
Subject: [PATCH 0612/1852] media: rk-isp10: modify for dumpsys tool

Change-Id: I53df81d70fb730634c7600e2a7a18f93b62191df
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../media/platform/rk-isp10/cif_isp10_v4l2.c  | 20 ++++++++-----------
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index 94c55640451f6..0ccfb0a9508cf 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -1088,14 +1088,13 @@ static int cif_isp10_v4l2_release(struct file *file)
 	return ret;
 }
 
-/*
-static unsigned int cif_isp10_v4l2_poll(
+static unsigned int __maybe_unused cif_isp10_v4l2_poll(
 	struct file *file,
 	struct poll_table_struct *wait)
 {
 	struct cif_isp10_v4l2_fh *fh = to_fh(file);
 	int ret = 0;
-	struct videobuf_queue *queue = to_videobuf_queue(file);
+	struct vb2_queue *queue = to_vb2_queue(file);
 	unsigned long req_events = poll_requested_events(wait);
 
 	cif_isp10_pltfrm_pr_dbg(NULL, "%s\n",
@@ -1109,20 +1108,18 @@ static unsigned int cif_isp10_v4l2_poll(
 	if (!(req_events & (POLLIN | POLLOUT | POLLRDNORM)))
 		return ret;
 
-	ret |= videobuf_poll_stream(file, queue, wait);
+	ret |= vb2_fop_poll(file, wait);
 	if (ret & POLLERR) {
 		cif_isp10_pltfrm_pr_err(NULL,
 			"videobuf_poll_stream failed with error 0x%x\n", ret);
 	}
 	return ret;
 }
-*/
 
 /*
  * VMA operations.
  */
-/*
-static void cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
+static void __maybe_unused cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
 {
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
@@ -1130,7 +1127,7 @@ static void cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
 	metadata->vmas++;
 }
 
-static void cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
+static void __maybe_unused cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
 {
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
@@ -1138,14 +1135,14 @@ static void cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
 	metadata->vmas--;
 }
 
-static const struct vm_operations_struct cif_isp10_vm_ops = {
+static const struct __maybe_unused vm_operations_struct cif_isp10_vm_ops = {
 	.open		= cif_isp10_v4l2_vm_open,
 	.close		= cif_isp10_v4l2_vm_close,
 };
 
-int cif_isp10_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
+int __maybe_unused cif_isp10_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
 {
-	struct videobuf_queue *queue = to_videobuf_queue(file);
+	struct vb2_queue *queue = to_vb2_queue(file);
 	struct cif_isp10_device *dev = to_cif_isp10_device(queue);
 	enum cif_isp10_stream_id strm = to_stream_id(file);
 	int retval;
@@ -1161,7 +1158,6 @@ int cif_isp10_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
 done:
 	return retval;
 }
-*/
 
 const struct v4l2_file_operations cif_isp10_v4l2_fops = {
 	.open = cif_isp10_v4l2_open,

From ef9ae9b998851aebf7046b87f0eee5fb940e5fe1 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 15:43:26 +0800
Subject: [PATCH 0613/1852] media: rk-isp10: remove "Measurement late" check

Change-Id: I6cbabc0faff7003c591142570270475e7afd8dde
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../media/platform/rk-isp10/cif_isp10_isp.c   | 20 -------------------
 1 file changed, 20 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.c b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
index a118303f30659..ea52525911b4a 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
@@ -3682,15 +3682,6 @@ static void cifisp_send_measurement(
 		container_of(isp_dev, struct cif_isp10_device, isp_dev);
 
 	spin_lock_irqsave(&isp_dev->irq_lock, lock_flags);
-	if (isp_dev->frame_id != meas_work->frame_id) {
-		spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
-		CIFISP_DPRINT(CIFISP_ERROR,
-			"Measurement late(%d, %d)\n",
-			isp_dev->frame_id,
-			meas_work->frame_id);
-		goto end;
-	}
-
 	if (!list_empty(&isp_dev->stat)) {
 		buf = list_first_entry(&isp_dev->stat,
 			struct cif_isp10_buffer, queue);
@@ -3702,7 +3693,6 @@ static void cifisp_send_measurement(
 			"Not enought measurement bufs\n");
 		goto end;
 	}
-
 	spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
 	vb->state = VB2_BUF_STATE_ACTIVE;
 
@@ -3726,17 +3716,7 @@ static void cifisp_send_measurement(
 		cifisp_get_hst_meas(isp_dev, stat_buf);
 
 	spin_lock_irqsave(&isp_dev->irq_lock, lock_flags);
-
-	if (isp_dev->frame_id != meas_work->frame_id) {
-		spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
-		CIFISP_DPRINT(CIFISP_ERROR,
-			"Measurement late(%d, %d)\n",
-			isp_dev->frame_id,
-			meas_work->frame_id);
-		goto end;
-	}
 	list_del(&buf->queue);
-
 	spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
 
 	if (active_meas & CIF_ISP_AWB_DONE) {

From 382eafeb61aadd47427fb2a4296f80a644b0033d Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 18:42:28 +0800
Subject: [PATCH 0614/1852] media: rk-isp10: modify for af function

add af funtion first time

Change-Id: I91fc8c532e47987cc63694b242f5bac7ef1bc59c
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c   | 45 +++++++++++++++++--
 drivers/media/platform/rk-isp10/cif_isp10.h   |  5 +++
 .../rk-isp10/cif_isp10_img_src_v4l2-subdev.c  |  5 ++-
 .../media/platform/rk-isp10/cif_isp10_isp.c   | 28 +++++++++---
 .../media/platform/rk-isp10/cif_isp10_isp.h   |  2 +
 .../linux/platform_data/rk_isp10_platform.h   | 11 +++++
 include/media/rk-isp10-config.h               | 19 ++++++++
 include/media/v4l2-config_rockchip.h          |  3 +-
 8 files changed, 104 insertions(+), 14 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 0995351ee508f..4723a106f7204 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -4917,11 +4917,23 @@ static int cif_isp10_start(
 		cif_isp10_img_src_ioctl(dev->img_src,
 			RK_VIDIOC_SENSOR_MODE_DATA,
 			&dev->img_src_exps.data[0].data);
-		cif_isp10_img_src_ioctl(dev->img_src,
-			RK_VIDIOC_SENSOR_MODE_DATA,
-			&dev->img_src_exps.data[1].data);
 		dev->img_src_exps.data[0].v_frame_id = 0;
 		dev->img_src_exps.data[1].v_frame_id = 0;
+		dev->img_src_exps.data[0].data.isp_input_width =
+			dev->config.isp_config.input->defrect.width;
+		dev->img_src_exps.data[0].data.isp_input_height =
+			dev->config.isp_config.input->defrect.height;
+		dev->img_src_exps.data[0].data.isp_input_horizontal_start =
+			dev->config.isp_config.input->defrect.left;
+		dev->img_src_exps.data[0].data.isp_input_vertical_start =
+			dev->config.isp_config.input->defrect.top;
+
+		dev->img_src_exps.data[0].data.isp_output_width =
+			dev->config.isp_config.output.width;
+		dev->img_src_exps.data[0].data.isp_output_height =
+			dev->config.isp_config.output.height;
+		memcpy(&dev->img_src_exps.data[1], &dev->img_src_exps.data[0],
+			sizeof(dev->img_src_exps.data[0]));
 		mutex_unlock(&dev->img_src_exps.mutex);
 
 		cif_isp10_pltfrm_rtrace_printf(dev->dev,
@@ -5257,6 +5269,19 @@ static void cif_isp10_vs_work(struct work_struct *work)
 		cif_isp10_img_src_ioctl(dev->img_src,
 			RK_VIDIOC_SENSOR_MODE_DATA,
 			&new_data->data);
+		new_data->data.isp_input_width =
+			dev->config.isp_config.input->defrect.width;
+		new_data->data.isp_input_height =
+			dev->config.isp_config.input->defrect.height;
+		new_data->data.isp_input_horizontal_start =
+			dev->config.isp_config.input->defrect.left;
+		new_data->data.isp_input_vertical_start =
+			dev->config.isp_config.input->defrect.top;
+
+		new_data->data.isp_output_width =
+			dev->config.isp_config.output.width;
+		new_data->data.isp_output_height =
+			dev->config.isp_config.output.height;
 		mutex_unlock(&dev->img_src_exps.mutex);
 
 		/*
@@ -6000,6 +6025,17 @@ int cif_isp10_s_exp(
 	return retval;
 }
 
+int cif_isp10_s_vcm(
+	struct cif_isp10_device *dev,
+	unsigned int id,
+	int val)
+{
+	if (dev->img_src != NULL)
+		cif_isp10_img_src_ioctl(dev->img_src,
+			PLTFRM_CIFCAM_SET_VCM_POS, &val);
+	return 0;
+}
+
 int cif_isp10_s_isp_metadata(
 	struct cif_isp10_device *dev,
 	struct cif_isp10_isp_readout_work *readout_work,
@@ -6363,7 +6399,6 @@ int cif_isp10_s_ctrl(
 	case CIF_ISP10_CID_ANALOG_GAIN:
 	case CIF_ISP10_CID_EXPOSURE_TIME:
 	case CIF_ISP10_CID_BLACK_LEVEL:
-	case CIF_ISP10_CID_FOCUS_ABSOLUTE:
 	case CIF_ISP10_CID_AUTO_N_PRESET_WHITE_BALANCE:
 	case CIF_ISP10_CID_SCENE_MODE:
 	case CIF_ISP10_CID_AUTO_FPS:
@@ -6371,6 +6406,8 @@ int cif_isp10_s_ctrl(
 	case CIF_ISP10_CID_VFLIP:
 		return cif_isp10_img_src_s_ctrl(dev->img_src,
 			id, val);
+	case CIF_ISP10_CID_FOCUS_ABSOLUTE:
+		return cif_isp10_s_vcm(dev, id, val);
 	default:
 		cif_isp10_pltfrm_pr_err(dev->dev,
 			"unknown/unsupported control %d\n", id);
diff --git a/drivers/media/platform/rk-isp10/cif_isp10.h b/drivers/media/platform/rk-isp10/cif_isp10.h
index d53ad7b6fc646..b97e2f41087f5 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10.h
@@ -794,6 +794,11 @@ int cif_isp10_s_exp(
 	struct cif_isp10_device *dev,
 	struct cif_isp10_img_src_ext_ctrl *exp_ctrl);
 
+int cif_isp10_s_vcm(
+	struct cif_isp10_device *dev,
+	unsigned int id,
+	int val);
+
 void cif_isp10_sensor_mode_data_sync(
 	struct cif_isp10_device *dev,
 	unsigned int frame_id,
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
index dce595f2d3e38..92ac9d5e7adf1 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
@@ -464,6 +464,9 @@ long cif_isp10_img_src_v4l2_subdev_ioctl(
 	case PLTFRM_CIFCAM_G_ITF_CFG:
 	case PLTFRM_CIFCAM_G_DEFRECT:
 	case PLTFRM_CIFCAM_ATTACH:
+	case PLTFRM_CIFCAM_SET_VCM_POS:
+	case PLTFRM_CIFCAM_GET_VCM_POS:
+	case PLTFRM_CIFCAM_GET_VCM_MOVE_RES:
 		ret = v4l2_subdev_call(subdev,
 			core,
 			ioctl,
@@ -475,7 +478,7 @@ long cif_isp10_img_src_v4l2_subdev_ioctl(
 		break;
 	}
 
-	if (IS_ERR_VALUE(ret))
+	if (IS_ERR_VALUE(ret) && cmd != PLTFRM_CIFCAM_GET_VCM_MOVE_RES)
 		pr_err("img_src.%s subdev call(cmd: 0x%x) failed with error %ld\n",
 		__func__, cmd, ret);
 
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.c b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
index ea52525911b4a..e6c645a88fe21 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
@@ -2245,14 +2245,14 @@ static void cifisp_afc_config(const struct cif_isp10_isp_dev *isp_dev)
 
 	for (i = 0; i < num_of_win; i++) {
 		cifisp_iowrite32(
-			CIFISP_AFC_WINDOW_X(pconfig->afm_win[0].h_offs) |
-			CIFISP_AFC_WINDOW_Y(pconfig->afm_win[0].v_offs),
+			CIFISP_AFC_WINDOW_X(pconfig->afm_win[i].h_offs) |
+			CIFISP_AFC_WINDOW_Y(pconfig->afm_win[i].v_offs),
 			CIF_ISP_AFM_LT_A + i * 8);
 		cifisp_iowrite32(
-			CIFISP_AFC_WINDOW_X(pconfig->afm_win[0].h_size +
-			pconfig->afm_win[0].h_offs) |
-			CIFISP_AFC_WINDOW_Y(pconfig->afm_win[0].v_size +
-			pconfig->afm_win[0].v_offs),
+			CIFISP_AFC_WINDOW_X(pconfig->afm_win[i].h_size +
+			pconfig->afm_win[i].h_offs) |
+			CIFISP_AFC_WINDOW_Y(pconfig->afm_win[i].v_size +
+			pconfig->afm_win[i].v_offs),
 			CIF_ISP_AFM_RB_A + i * 8);
 	}
 
@@ -2279,7 +2279,7 @@ static void cifisp_afc_end(struct cif_isp10_isp_dev *isp_dev)
 static void cifisp_get_afc_meas(struct cif_isp10_isp_dev *isp_dev,
 				struct cifisp_stat_buffer *pbuf)
 {
-	pbuf->meas_type = CIFISP_STAT_AFM_FIN;
+	pbuf->meas_type |= CIFISP_STAT_AFM_FIN;
 
 	pbuf->params.af.window[0].sum =
 		cifisp_ioread32(CIF_ISP_AFM_SUM_A);
@@ -3675,6 +3675,8 @@ static void cifisp_send_measurement(
 	struct cif_isp10_buffer *buf = NULL;
 	struct vb2_buffer *vb = NULL;
 	void *mem_addr;
+	struct pltfrm_cam_vcm_tim vcm_tim;
+	long ret;
 
 	unsigned int active_meas = isp_dev->active_meas;
 	struct cifisp_stat_buffer *stat_buf;
@@ -3719,6 +3721,7 @@ static void cifisp_send_measurement(
 	list_del(&buf->queue);
 	spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
 
+	isp_dev->meas_stats.stat.meas_type = 0;
 	if (active_meas & CIF_ISP_AWB_DONE) {
 		memcpy(&isp_dev->meas_stats.stat.params.awb,
 			&stat_buf->params.awb,
@@ -3752,6 +3755,17 @@ static void cifisp_send_measurement(
 	}
 	isp_dev->meas_stats.g_frame_id = meas_work->frame_id;
 
+	ret = cif_isp10_img_src_ioctl(cif_dev->img_src,
+			PLTFRM_CIFCAM_GET_VCM_MOVE_RES,
+			&vcm_tim);
+	if (ret == 0) {
+		stat_buf->subdev_stat.vcm.vcm_start_t = vcm_tim.vcm_start_t;
+		stat_buf->subdev_stat.vcm.vcm_end_t = vcm_tim.vcm_end_t;
+	}
+
+	stat_buf->vs_t = meas_work->vs_t;
+	stat_buf->fi_t = meas_work->fi_t;
+
 	vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
 	wake_up(&vb->vb2_queue->done_wq);
 
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.h b/drivers/media/platform/rk-isp10/cif_isp10_isp.h
index 2c97e6effd50f..006c808ffca5a 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.h
@@ -107,6 +107,8 @@ struct cif_isp10_isp_readout_work {
 	struct cif_isp10_isp_dev *isp_dev;
 
 	unsigned int frame_id;
+	struct timeval vs_t;
+	struct timeval fi_t;
 	enum cif_isp10_isp_readout_cmd readout;
 	struct vb2_buffer *vb;
 	unsigned int stream_id;
diff --git a/include/linux/platform_data/rk_isp10_platform.h b/include/linux/platform_data/rk_isp10_platform.h
index 78762b1922296..858d9959aadd7 100644
--- a/include/linux/platform_data/rk_isp10_platform.h
+++ b/include/linux/platform_data/rk_isp10_platform.h
@@ -125,6 +125,17 @@ struct pltfrm_cam_itf {
 				(PLTFRM_CIFCAM_IOCTL_INTERNAL_BASE + 2)
 #define PLTFRM_CIFCAM_ATTACH    \
 				(PLTFRM_CIFCAM_IOCTL_INTERNAL_BASE + 3)
+#define PLTFRM_CIFCAM_SET_VCM_POS    \
+				(PLTFRM_CIFCAM_IOCTL_INTERNAL_BASE + 4)
+#define PLTFRM_CIFCAM_GET_VCM_POS    \
+				(PLTFRM_CIFCAM_IOCTL_INTERNAL_BASE + 5)
+#define PLTFRM_CIFCAM_GET_VCM_MOVE_RES    \
+				(PLTFRM_CIFCAM_IOCTL_INTERNAL_BASE + 6)
+
+struct pltfrm_cam_vcm_tim {
+	struct timeval vcm_start_t;
+	struct timeval vcm_end_t;
+};
 
 struct pltfrm_cam_defrect {
 	unsigned int width;
diff --git a/include/media/rk-isp10-config.h b/include/media/rk-isp10-config.h
index e8e65b43f086f..f64af7f9f8f0e 100644
--- a/include/media/rk-isp10-config.h
+++ b/include/media/rk-isp10-config.h
@@ -219,6 +219,22 @@ struct cifisp_af_stat {
 	struct cifisp_af_meas_val window[CIFISP_AFM_MAX_WINDOWS];
 };
 
+enum cifisp_vcm_val {
+	CIFISP_VCM_INVAL = -1,
+	CIFISP_VCM_MOVE_START = 0,
+	CIFISP_VCM_MOVE_RUNNING = 1,
+	CIFISP_VCM_MOVE_END = 2
+};
+
+struct cifisp_vcm_tim {
+	struct timeval vcm_start_t;
+	struct timeval vcm_end_t;
+};
+
+struct cifisp_subdev_stat {
+	struct cifisp_vcm_tim vcm;
+};
+
 struct cifisp_stat {
 	struct cifisp_awb_stat awb;
 	struct cifisp_ae_stat ae;
@@ -230,6 +246,9 @@ struct cifisp_stat_buffer {
 	unsigned int meas_type;
 	struct cifisp_stat params;
 	struct isp_supplemental_sensor_mode_data sensor_mode;
+	struct cifisp_subdev_stat subdev_stat;
+	struct timeval vs_t;
+	struct timeval fi_t;
 };
 
 struct cifisp_dpcc_methods_config {
diff --git a/include/media/v4l2-config_rockchip.h b/include/media/v4l2-config_rockchip.h
index afb5a9bd7023a..b7dd7a7a8d7c3 100644
--- a/include/media/v4l2-config_rockchip.h
+++ b/include/media/v4l2-config_rockchip.h
@@ -46,8 +46,6 @@ struct isp_supplemental_sensor_mode_data {
 	unsigned char exposure_valid_frame[2];
 	int exp_time;
 	unsigned short gain;
-	unsigned short af_onoff;
-	unsigned int vcm_max_step;
 };
 
 struct camera_module_info_s {
@@ -64,6 +62,7 @@ struct camera_module_info_s {
 	bool iq_flip;
 	int flash_support;
 	int flash_exp_percent;
+	int af_support;
 };
 
 struct flash_timeinfo_s {

From 38b59fc5eac70be74645d41051a3b49c127ca6df Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 17 Jul 2018 12:58:38 +0800
Subject: [PATCH 0615/1852] ASoC: rockchip: i2s: add support
 'rockchip,clk-trcm' property

If there is only one lrck (tx or rx) by hardware, we need to
use 'rockchip,clk-trcm' specify which lrck can be used.

Change-Id: I3bf8d87a6bc8c45e183040012d87d8be21a4c133
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/rockchip/rockchip_i2s.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 504d79ef65546..b359639c10385 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -53,6 +53,7 @@ struct rk_i2s_dev {
 	bool is_master_mode;
 	const struct rk_i2s_pins *pins;
 	unsigned int bclk_fs;
+	unsigned int clk_trcm;
 };
 
 /* txctrl/rxctrl lock */
@@ -292,7 +293,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
 				  struct snd_soc_dai *dai)
 {
 	struct rk_i2s_dev *i2s = to_info(dai);
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	unsigned int val = 0;
 	unsigned int mclk_rate, bclk_rate, div_bclk, div_lrck;
 
@@ -392,13 +392,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
 	regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
 			   I2S_DMACR_RDL(16));
 
-	val = I2S_CKR_TRCM_TXRX;
-	if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates)
-		val = I2S_CKR_TRCM_TXONLY;
-
-	regmap_update_bits(i2s->regmap, I2S_CKR,
-			   I2S_CKR_TRCM_MASK,
-			   val);
 	return 0;
 }
 
@@ -488,7 +481,6 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = {
 			    SNDRV_PCM_FMTBIT_S32_LE),
 	},
 	.ops = &rockchip_i2s_dai_ops,
-	.symmetric_rates = 1,
 };
 
 static const struct snd_soc_component_driver rockchip_i2s_component = {
@@ -688,6 +680,18 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
 			i2s->bclk_fs = val;
 	}
 
+	i2s->clk_trcm = I2S_CKR_TRCM_TXRX;
+	if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) {
+		if (val >= 0 && val <= 2) {
+			i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT;
+			if (i2s->clk_trcm)
+				soc_dai->symmetric_rates = 1;
+		}
+	}
+
+	regmap_update_bits(i2s->regmap, I2S_CKR,
+			   I2S_CKR_TRCM_MASK, i2s->clk_trcm);
+
 	ret = devm_snd_soc_register_component(&pdev->dev,
 					      &rockchip_i2s_component,
 					      soc_dai, 1);

From 325b51cdedc02106725148e39ed7ca8f12705275 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 17 Jul 2018 19:27:21 +0800
Subject: [PATCH 0616/1852] ASoC: rockchip: i2s: add 'rockchip,clk-trcm'
 property

Change-Id: I0756185c677b5cb9512ff25b69ceba5b248ec031
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index 9ebd9df63d6c8..728553f4fa278 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -28,6 +28,10 @@ Required properties:
 - rockchip,playback-channels: max playback channels, if not set, 8 channels default.
 - rockchip,capture-channels: max capture channels, if not set, 2 channels default.
 - rockchip,bclk-fs: configure the i2s bclk fs.
+- rockchip,clk-trcm: tx and rx lrck/bclk common use.
+   - 0: both tx_lrck/bclk and rx_lrck/bclk are used
+   - 1: only tx_lrck/bclk is used
+   - 2: only rx_lrck/bclk is used
 - rockchip,no-dmaengine: This is a boolean property. If present, driver will do not
   register pcm dmaengine, only just register dai. if the dai is part of multi-dais,
   the property should be present. Please refer to rockchip,multidais.txt about

From 4725fe0a3d3e66ac60a5c1637baad7de3a02d90f Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Mon, 23 Apr 2018 21:19:52 +0800
Subject: [PATCH 0617/1852] arm64: dts: rockchip: add bluetooth pcm node for
 RK3308 EVB V10/V11

This patch using PCM rising late1 and slave mode for
Bluetooth HFP.

Change-Id: I4a0188134d7d0ef0690c6c7c9f94fc8ec50c1671
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../boot/dts/rockchip/rk3308-evb-v10.dtsi     | 21 +++++++++++++++++++
 .../boot/dts/rockchip/rk3308-evb-v11.dtsi     | 21 +++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 30f3cbea0a0d7..0e2c72f25259f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -111,6 +111,27 @@
 		rockchip,codec = <&acodec>;
 	};
 
+	bluetooth_sound: bluetooth-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "dsp_b";
+		simple-audio-card,name = "rockchip,rk3308-pcm";
+		simple-audio-card,mclk-fs = <128>;
+		simple-audio-card,bitclock-inversion = <0>;
+		simple-audio-card,bitclock-master = <&bt_codec>;
+		simple-audio-card,frame-master = <&bt_codec>;
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_2ch_0>;
+		};
+		bt_codec: simple-audio-card,codec {
+			/*
+			 * Using dummy_codec to supports CVSD(8K) and mSBC(16K)
+			 * for HFP.
+			 */
+			sound-dai = <&dummy_codec>;
+		};
+	};
+
 	spdif_tx_sound: spdif-tx-sound {
 		status = "disabled";
 		compatible = "simple-audio-card";
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 1c1dfd9b8ee07..f7785807bf5bc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -96,6 +96,27 @@
 		rockchip,codec = <&acodec>;
 	};
 
+	bluetooth_sound: bluetooth-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "dsp_b";
+		simple-audio-card,name = "rockchip,rk3308-pcm";
+		simple-audio-card,mclk-fs = <128>;
+		simple-audio-card,bitclock-inversion = <0>;
+		simple-audio-card,bitclock-master = <&bt_codec>;
+		simple-audio-card,frame-master = <&bt_codec>;
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_2ch_0>;
+		};
+		bt_codec: simple-audio-card,codec {
+			/*
+			 * Using dummy_codec to supports CVSD(8K) and mSBC(16K)
+			 * for HFP.
+			 */
+			sound-dai = <&dummy_codec>;
+		};
+	};
+
 	spdif_tx_sound: spdif-tx-sound {
 		status = "disabled";
 		compatible = "simple-audio-card";

From a2a4c13f6ff3e3bd42a1c5130266ec5d8654faa4 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 17 Jul 2018 12:47:39 +0800
Subject: [PATCH 0618/1852] arm64: dts: rockchip: enable Bluetooth PCM sound
 for RK3308 EVB Boards

By default, only using lrck_tx for PCM by hardware,
therefore, we need to use I2S_CKR_TRCM_TXONLY.

Change-Id: I6c4077e7e7e65b8a3a21416fd61d5900b3b72f42
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts   | 10 ++++++++++
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts   | 10 ++++++++++
 .../boot/dts/rockchip/rk3308-evb-dmic-i2s-v10.dts      |  9 +++++++--
 .../boot/dts/rockchip/rk3308-evb-dmic-i2s-v11.dts      |  9 +++++++--
 .../boot/dts/rockchip/rk3308-evb-dmic-pdm-v10.dts      |  9 +++++++--
 .../boot/dts/rockchip/rk3308-evb-dmic-pdm-v11.dts      |  9 +++++++--
 6 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
index 1546848258b44..a2ee26b73f730 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
@@ -23,6 +23,16 @@
 	};
 };
 
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
+};
+
 &is31fl3236 {
 	reg = <0x3f>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
index 30356481da9a6..387497f15e395 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
@@ -22,6 +22,16 @@
 	};
 };
 
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
+};
+
 &is31fl3236 {
 	reg = <0x3f>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v10.dts
index 94abbecba79a7..616ae24ed2252 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v10.dts
@@ -58,9 +58,14 @@
 	status = "disabled";
 };
 
-&dummy_codec {
-	status = "disabled";
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
 	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
 };
 
 &i2s_8ch_0 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v11.dts
index e7676ef61e795..fb66021313012 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-i2s-v11.dts
@@ -46,9 +46,14 @@
 	status = "disabled";
 };
 
-&dummy_codec {
-	status = "disabled";
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
 	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
 };
 
 &i2s_8ch_0 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v10.dts
index 7a2e837138cae..acd306428c49c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v10.dts
@@ -45,9 +45,14 @@
 	status = "disabled";
 };
 
-&dummy_codec {
-	status = "disabled";
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
 	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
 };
 
 &pdm_8ch {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v11.dts
index 7932d0a8545d9..8644d443f58c6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-dmic-pdm-v11.dts
@@ -45,9 +45,14 @@
 	status = "disabled";
 };
 
-&dummy_codec {
-	status = "disabled";
+&bluetooth_sound {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
 	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <1>;
 };
 
 &pdm_8ch {

From dd7587737393f19f6161aa7c37d95fc350add3fa Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 19 Jul 2018 10:34:28 +0800
Subject: [PATCH 0619/1852] usb: dwc3: Don't reset core in host mode

When do core init, only reset the core for device mode.
Becasue in host mode, xHCI driver will reset the core
and its host block via usbcmd.hcrst. If we do core reset
in dwc3_core_init() for host mode, it will reset both
the dwc3 core registers and xHCI registers, and cause
device to be reenumerated when usb suspend/resume.

Change-Id: If723ce8a771975e9757d28cb2c114d6269581677
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc3/core.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index b4d1d887be310..366738c582bf5 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -100,7 +100,10 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
 	 * XHCI driver will reset the host block. If dwc3 was configured for
 	 * host-only mode, then we can return early.
 	 */
-	if (dwc->dr_mode == USB_DR_MODE_HOST)
+	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+	if (dwc->dr_mode == USB_DR_MODE_HOST ||
+	    (dwc->dr_mode == USB_DR_MODE_OTG &&
+	    DWC3_GCTL_PRTCAP(reg) == DWC3_GCTL_PRTCAP_HOST))
 		return 0;
 
 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
@@ -127,6 +130,17 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
 	unsigned long timeout;
 	u32 reg;
 
+	/*
+	 * We're resetting only the device side because, if we're in host mode,
+	 * XHCI driver will reset the host block. If dwc3 was configured for
+	 * host-only mode, then we can return early.
+	 */
+	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
+	if (dwc->dr_mode == USB_DR_MODE_HOST ||
+	    (dwc->dr_mode == USB_DR_MODE_OTG &&
+	    DWC3_GCTL_PRTCAP(reg) == DWC3_GCTL_PRTCAP_HOST))
+		return 0;
+
 	timeout = jiffies + msecs_to_jiffies(500);
 	dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
 	do {

From 2fb3bf44947eaae4c0615be4dfdd94d2d216488a Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 19 Jul 2018 10:51:41 +0800
Subject: [PATCH 0620/1852] usb: dwc3: rockchip: Don't reset otg logic if
 device connect

During dwc3 resume, it shoudn't reset otg controller logic
if device is connecting with the otg port, because it will
cause device to be reenumerated. More seriously, it may
cause the otg_work to enter disconnect process and power
down usb3 controller power domain, at the same time, if
the xHCI driver is accessing the controller asynchronously,
it will cause system hang.

Change-Id: Id546277bd4082b7baeff830788643a800330ae8e
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc3/dwc3-rockchip.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-rockchip.c b/drivers/usb/dwc3/dwc3-rockchip.c
index afdb6cb1f437a..db482d37df566 100644
--- a/drivers/usb/dwc3/dwc3-rockchip.c
+++ b/drivers/usb/dwc3/dwc3-rockchip.c
@@ -969,9 +969,11 @@ static int __maybe_unused dwc3_rockchip_resume(struct device *dev)
 	struct dwc3_rockchip *rockchip = dev_get_drvdata(dev);
 	struct dwc3 *dwc = rockchip->dwc;
 
-	reset_control_assert(rockchip->otg_rst);
-	udelay(1);
-	reset_control_deassert(rockchip->otg_rst);
+	if (!rockchip->connected) {
+		reset_control_assert(rockchip->otg_rst);
+		udelay(1);
+		reset_control_deassert(rockchip->otg_rst);
+	}
 
 	rockchip->suspended = false;
 

From 2ef53cf8843f8914a6ef2269bc40119473d1ebcd Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 19 Jul 2018 16:01:57 +0800
Subject: [PATCH 0621/1852] USB: ehci-platform: support EHCIs with usic phy

Some EHCI controllers use usic phy (e.g rk3399/rk3288),
in order to enable these controllers, we need to set
some additional EHCI vendor-specific registers.

Support this feature in device tree when using the ehci
platform driver by adding a new property for it.

Change-Id: I279ccfdb5866df49828825bfd41b39fcd58a2832
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 .../devicetree/bindings/usb/usb-ehci.txt      |  1 +
 drivers/usb/host/ehci-platform.c              | 19 +++++++++++++++++++
 drivers/usb/host/ehci.h                       |  7 +++++++
 3 files changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/usb-ehci.txt b/Documentation/devicetree/bindings/usb/usb-ehci.txt
index a12d6012a40fd..11ff62e0de2d6 100644
--- a/Documentation/devicetree/bindings/usb/usb-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-ehci.txt
@@ -15,6 +15,7 @@ Optional properties:
  - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
  - has-transaction-translator : boolean, set this if EHCI have a Transaction
 				Translator built into the root hub.
+ - rockchip-has-usic : boolean, set this if EHCI use usic phy.
  - clocks : a list of phandle + clock specifier pairs
  - phys : phandle + phy specifier pair
  - phy-names : "usb"
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index 70e46ec734409..8617096facdf4 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -63,6 +63,18 @@ static void ehci_rockchip_relinquish_port(struct usb_hcd *hcd, int portnum)
 	ehci_writel(ehci, portsc, status_reg);
 }
 
+static void ehci_rockchip_usic_init(struct usb_hcd *hcd)
+{
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+
+	ehci_writel(ehci, USIC_ENABLE,
+		    hcd->regs + USIC_ENABLE_OFFSET);
+	ehci_writel(ehci, USIC_MICROFRAME_COUNT,
+		    hcd->regs + USIC_MICROFRAME_OFFSET);
+	ehci_writel(ehci, USIC_SCALE_DOWN,
+		    hcd->regs + USIC_SCALE_DOWN_OFFSET);
+}
+
 static int ehci_platform_reset(struct usb_hcd *hcd)
 {
 	struct platform_device *pdev = to_platform_device(hcd->self.controller);
@@ -222,6 +234,10 @@ static int ehci_platform_probe(struct platform_device *dev)
 			hcd->rk3288_relinquish_port_quirk = 1;
 		}
 
+		if (of_property_read_bool(dev->dev.of_node,
+					  "rockchip-has-usic"))
+			ehci->has_usic = 1;
+
 		priv->num_phys = of_count_phandle_with_args(dev->dev.of_node,
 				"phys", "#phy-cells");
 
@@ -313,6 +329,9 @@ static int ehci_platform_probe(struct platform_device *dev)
 	if (err)
 		goto err_power;
 
+	if (ehci->has_usic)
+		ehci_rockchip_usic_init(hcd);
+
 	device_wakeup_enable(hcd->self.controller);
 	platform_set_drvdata(dev, hcd);
 
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 46f62e41bcde9..26d4ed0fc6eac 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -227,6 +227,13 @@ struct ehci_hcd {			/* one per controller */
 	unsigned		frame_index_bug:1; /* MosChip (AKA NetMos) */
 	unsigned		need_oc_pp_cycle:1; /* MPC834X port power */
 	unsigned		imx28_write_fix:1; /* For Freescale i.MX28 */
+	unsigned		has_usic:1;
+	#define	USIC_MICROFRAME_OFFSET	0x90
+	#define USIC_SCALE_DOWN_OFFSET	0xa0
+	#define USIC_ENABLE_OFFSET	0xb0
+	#define USIC_ENABLE		BIT(0)
+	#define USIC_SCALE_DOWN		BIT(2)
+	#define USIC_MICROFRAME_COUNT	0x1d4d
 
 	/* required for usb32 quirk */
 	#define OHCI_CTRL_HCFS          (3 << 6)

From 4534b852908303872f6e3d063b2606f28267369c Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 19 Jul 2018 16:12:25 +0800
Subject: [PATCH 0622/1852] arm64: dts: rockchip: add usic node for rk3399

Add usic node for rk3399 USB 2.0 EHCI controller
with usic phy.

Change-Id: Ibb4179ff1479816daa3b8455b0229f8a7a05bbdf
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 406056aad9749..d180c6a1e07b1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -329,6 +329,17 @@
 		status = "disabled";
 	};
 
+	usic: usb@fe340000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfe340000 0x0 0x30000>;
+		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru HCLK_HSIC>, <&cru SCLK_HSICPHY>,
+			 <&cru PCLK_HSICPHY>;
+		clock-names = "hclk_hsic", "clk_hsicphy", "pclk_hsicphy";
+		rockchip-has-usic;
+		status = "disabled";
+	};
+
 	usb_host0_ehci: usb@fe380000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xfe380000 0x0 0x20000>;

From bd9d9639bd6edb54b5396ccfee33790ecce54f7e Mon Sep 17 00:00:00 2001
From: Yifeng Zhao <zyf@rock-chips.com>
Date: Wed, 18 Jul 2018 11:20:36 +0800
Subject: [PATCH 0623/1852] drivers: rk_nand: zftl: fix hynix F16 64Gb NAND
 multi plane prog error issue

3326: fix hynix F16 64Gb NAND multi plane prog error issue
bug:
[   15.257968] hynix RR 12 row=2000, count 12, status=-1
[   15.257985] flash_complete_page_read 0 2000 error_ecc -1 1
[   15.258000] blk= 20, page=0, ppa = 2000, status = ffffffff

Change-Id: I7e6b6d4dd966bd671b0dcd46f3ee9b6f6e8c8bff
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
---
 drivers/rk_nand/rk_zftl_arm64.S | 9222 ++++++++++++++++---------------
 1 file changed, 4647 insertions(+), 4575 deletions(-)

diff --git a/drivers/rk_nand/rk_zftl_arm64.S b/drivers/rk_nand/rk_zftl_arm64.S
index efe0577639814..f1af25e7078a1 100644
--- a/drivers/rk_nand/rk_zftl_arm64.S
+++ b/drivers/rk_nand/rk_zftl_arm64.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-06-15
+ * date: 2018-07-18
  * function: rk ftl v5 for rockchip soc base on arm v8 to support 3D/2D
  *	     TLC and MLC.
  */
@@ -1528,7 +1528,7 @@ flash_wait_device_ready_raw:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 599
+	mov	w2, 602
 	add	x1, x1, 240
 	add	x0, x0, :lo12:.LC0
 	bl	printk
@@ -1960,7 +1960,7 @@ flash_start_page_read:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 741
+	mov	w2, 744
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC0
 	bl	printk
@@ -2039,7 +2039,7 @@ flash_start_plane_read:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 836
+	mov	w2, 839
 	add	x1, x1, 712
 	add	x0, x0, :lo12:.LC0
 	bl	printk
@@ -2152,84 +2152,91 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp,32]
-	adrp	x21, .LANCHOR0
-	adrp	x22, .LC38
-	add	x21, x21, :lo12:.LANCHOR0
-	add	x22, x22, :lo12:.LC38
+	adrp	x22, .LANCHOR0
+	mov	x21, 0
 	stp	x23, x24, [sp,48]
-	stp	x19, x20, [sp,16]
+	add	x22, x22, :lo12:.LANCHOR0
+	adrp	x23, .LC38
 	stp	x25, x26, [sp,64]
-	mov	w24, w0
-	mov	x20, 0
-	add	x25, x21, 748
-	adrp	x23, .LANCHOR2
-.L408:
-	lsl	x0, x20, 3
-	ldr	x19, [x21,536]
-	ldrb	w1, [x0,x25]
-	cmp	w1, 44
-	cset	w26, eq
-	cmp	w1, 69
-	cset	w2, eq
-	cmp	w1, 152
-	cset	w0, eq
-	adrp	x1, .LANCHOR0
-	orr	w0, w2, w0
-	cbnz	w0, .L409
-	cbz	w26, .L399
-.L409:
-	add	x1, x1, :lo12:.LANCHOR0
-	cmp	w24, 1
-	ldrb	w1, [x1,780]
-	bne	.L401
-	tbz	x1, 0, .L399
-	ldr	w0, [x23,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L402
+	stp	x19, x20, [sp,16]
+	mov	w25, w0
+	add	x26, x22, 748
+	adrp	x24, .LANCHOR2
+	add	x23, x23, :lo12:.LC38
+.L411:
+	lsl	x0, x21, 3
+	ldr	x20, [x22,536]
+	ldrb	w19, [x0,x26]
+	adrp	x0, .LANCHOR0
+	cmp	w19, 152
+	beq	.L399
+	cmp	w19, 69
+	beq	.L399
+	cmp	w19, 44
+	beq	.L399
+	cmp	w19, 137
+	bne	.L400
+.L399:
+	add	x0, x0, :lo12:.LANCHOR0
+	cmp	w25, 1
+	ldrb	w1, [x0,780]
+	bne	.L402
+	tbz	x1, 0, .L400
+	ldr	w0, [x24,#:lo12:.LANCHOR2]
+	tbz	x0, 12, .L403
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printk
-.L402:
-	add	x1, x19, x20, lsl 8
+.L403:
+	add	x1, x20, x21, lsl 8
 	mov	w0, 239
+	cmp	w19, 137
 	str	w0, [x1,2056]
+	beq	.L412
+	cmp	w19, 44
+	bne	.L404
+.L412:
 	mov	w0, 1
-	cbz	w26, .L403
 	str	w0, [x1,2052]
 	mov	w0, 5
-	b	.L426
-.L403:
-	mov	w2, 128
-	str	w2, [x1,2052]
-.L426:
-	str	w0, [x1,2048]
-	b	.L407
-.L401:
-	tbz	x1, 2, .L399
-	ldr	w0, [x23,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L405
-	mov	x0, x22
+	b	.L431
+.L404:
+	mov	w0, 128
+	str	w0, [x1,2052]
+	mov	w0, 1
+	b	.L431
+.L402:
+	tbz	x1, 2, .L400
+	ldr	w0, [x24,#:lo12:.LANCHOR2]
+	tbz	x0, 12, .L407
+	mov	x0, x23
 	bl	printk
-.L405:
-	add	x1, x19, x20, lsl 8
+.L407:
+	add	x1, x20, x21, lsl 8
 	mov	w0, 239
+	cmp	w19, 137
 	str	w0, [x1,2056]
-	cbz	w26, .L406
+	beq	.L413
+	cmp	w19, 44
+	cset	w0, eq
+	cbz	w0, .L408
+.L413:
 	mov	w0, 1
 	str	w0, [x1,2052]
 	mov	w0, 35
-	b	.L426
-.L406:
-	mov	w0, 128
-	str	w0, [x1,2052]
-	str	w26, [x1,2048]
-.L407:
+	b	.L431
+.L408:
+	mov	w2, 128
+	str	w2, [x1,2052]
+.L431:
+	str	w0, [x1,2048]
 	str	wzr, [x1,2048]
 	str	wzr, [x1,2048]
 	str	wzr, [x1,2048]
-.L399:
-	add	x20, x20, 1
-	cmp	x20, 4
-	bne	.L408
+.L400:
+	add	x21, x21, 1
+	cmp	x21, 4
+	bne	.L411
 	bl	nandc_wait_flash_ready
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
@@ -2301,7 +2308,7 @@ flash_read_id:
 	sub	w0, w2, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bhi	.L428
+	bhi	.L434
 	adrp	x0, .LC39
 	ldrb	w3, [x19,1]
 	ldrb	w4, [x19,2]
@@ -2311,7 +2318,7 @@ flash_read_id:
 	ldrb	w6, [x19,4]
 	ldrb	w7, [x19,5]
 	bl	printk
-.L428:
+.L434:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -2356,27 +2363,27 @@ flash_read_spare:
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -48]!
 	adrp	x2, .LANCHOR0+536
 	uxtb	w0, w0
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
-	adrp	x20, .LANCHOR2
 	ldr	x19, [x2,#:lo12:.LANCHOR0+536]
-	add	x2, x20, :lo12:.LANCHOR2
-	str	x21, [sp,32]
-	ldrb	w3, [x2,405]
+	adrp	x2, .LANCHOR2
+	add	x3, x2, :lo12:.LANCHOR2
+	mov	x20, x2
 	sxtw	x2, w0
 	add	x2, x2, 8
+	ldrb	w3, [x3,405]
 	add	x2, x19, x2, lsl 8
-	cbnz	w3, .L445
+	cbnz	w3, .L447
 	mov	w3, 162
-.L445:
+.L447:
 	ubfiz	x0, x0, 8, 8
 	str	w3, [x2,8]
 	add	x19, x19, x0
 	mov	w0, 128
-	str	x1, [x29,56]
+	str	x1, [x29,40]
 	str	w0, [x19,2056]
 	and	w0, w1, 255
 	str	wzr, [x19,2052]
@@ -2395,24 +2402,18 @@ sandisk_prog_test_bad_block:
 	bl	timer_delay_ns
 	ldr	w2, [x19,2048]
 	mov	w0, 5
-	ldr	x1, [x29,56]
-	ands	w21, w2, w0
-	beq	.L434
+	ands	w19, w2, w0
+	beq	.L440
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L434
+	ldr	x1, [x29,40]
+	tbz	x0, 12, .L440
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
 	bl	printk
-.L434:
-	add	x20, x20, :lo12:.LANCHOR2
-	ldrb	w0, [x20,406]
-	cbz	w0, .L435
-	str	w0, [x19,2056]
-.L435:
-	mov	w0, w21
-	ldr	x21, [sp,32]
+.L440:
+	mov	w0, w19
 	ldp	x19, x20, [sp,16]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.align	2
@@ -2440,44 +2441,44 @@ nandc_bch_sel:
 	strb	w0, [x1,724]
 	cmp	w2, 9
 	ldr	x2, [x1,536]
-	bne	.L448
+	bne	.L450
 	str	w3, [x2,16]
 	cmp	w0, 70
 	mov	w1, 0
-	beq	.L449
+	beq	.L451
 	cmp	w0, 60
 	mov	w1, 3
-	beq	.L449
+	beq	.L451
 	cmp	w0, 40
 	mov	w1, 2
 	csel	w1, w1, w3, eq
-.L449:
+.L451:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2,32]
-	b	.L447
-.L448:
+	b	.L449
+.L450:
 	str	w3, [x2,8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L451
-.L454:
+	bne	.L453
+.L456:
 	and	w1, w1, -17
-	b	.L452
-.L451:
+	b	.L454
+.L453:
 	cmp	w0, 24
-	bne	.L453
+	bne	.L455
 	orr	w1, w1, 16
-	b	.L452
-.L453:
+	b	.L454
+.L455:
 	cmp	w0, 40
 	orr	w1, w1, 262144
 	orr	w1, w1, 16
-	beq	.L454
-.L452:
+	beq	.L456
+.L454:
 	orr	w1, w1, 1
 	str	w1, [x2,12]
-.L447:
+.L449:
 	ret
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.align	2
@@ -2501,7 +2502,7 @@ zftl_flash_resume:
 	str	w2, [x1,4]
 	ldr	x1, [x0,536]
 	ldr	w2, [x0,552]
-	bne	.L462
+	bne	.L464
 	str	w2, [x1,16]
 	ldr	w2, [x0,556]
 	str	w2, [x1,32]
@@ -2513,8 +2514,8 @@ zftl_flash_resume:
 	str	w2, [x1,520]
 	ldr	w0, [x0,572]
 	str	w0, [x1,8]
-	b	.L463
-.L462:
+	b	.L465
+.L464:
 	str	w2, [x1,8]
 	ldr	w2, [x0,556]
 	str	w2, [x1,12]
@@ -2526,18 +2527,18 @@ zftl_flash_resume:
 	str	w2, [x1,336]
 	ldr	w0, [x0,572]
 	str	w0, [x1,344]
-.L463:
+.L465:
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	x19, 0
 	add	x23, x22, 748
 	mov	w24, 2
-.L465:
+.L467:
 	lsl	x0, x19, 3
 	ldrb	w0, [x0,x23]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bhi	.L464
+	bhi	.L466
 	uxtb	w21, w19
 	mov	w0, w21
 	bl	flash_reset
@@ -2545,13 +2546,13 @@ zftl_flash_resume:
 	strb	w24, [x19,x0]
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L464:
+.L466:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L465
+	bne	.L467
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x20,672]
-	cbz	w0, .L466
+	cbz	w0, .L468
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	mov	w0, w19
@@ -2561,7 +2562,7 @@ zftl_flash_resume:
 	ldr	w0, [x20,560]
 	lsr	w0, w0, 8
 	bl	nandc_set_ddr_para
-.L466:
+.L468:
 	adrp	x0, .LANCHOR2+396
 	ldrb	w0, [x0,#:lo12:.LANCHOR2+396]
 	bl	nandc_bch_sel
@@ -2596,30 +2597,30 @@ nandc_iqr_wait_flash_ready:
 	ldrb	w1, [x19,516]
 	ldr	x0, [x19,536]
 	cmp	w1, 9
-	bne	.L473
+	bne	.L475
 	ldr	w1, [x0,292]
 	orr	w1, w1, 2
 	str	w1, [x0,292]
 	ldr	w1, [x0,288]
 	orr	w1, w1, 2
 	str	w1, [x0,288]
-	b	.L474
-.L473:
+	b	.L476
+.L475:
 	ldr	w1, [x0,368]
 	orr	w1, w1, 2
 	str	w1, [x0,368]
 	ldr	w1, [x0,364]
 	orr	w1, w1, 2
 	str	w1, [x0,364]
-.L474:
+.L476:
 	ldr	w1, [x0]
-	tbnz	x1, 9, .L475
+	tbnz	x1, 9, .L477
 	bl	wait_for_nand_flash_ready
-	b	.L472
-.L475:
+	b	.L474
+.L477:
 	mov	w1, 1
 	bl	nandc_irq_disable
-.L472:
+.L474:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2642,16 +2643,16 @@ flash_erase_duplane_block:
 	ldrb	w0, [x0,633]
 	mov	w24, w3
 	cmp	w0, w19
-	bhi	.L478
+	bhi	.L480
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 510
+	mov	w2, 513
 	add	x1, x1, 736
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L478:
+.L480:
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x19, x0, x19, sxtw
 	ldrb	w23, [x19,736]
@@ -2661,24 +2662,24 @@ flash_erase_duplane_block:
 	add	x23, x23, 8
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	add	x23, x19, x23, lsl 8
-	tbz	x0, 4, .L479
+	tbz	x0, 4, .L481
 	adrp	x0, .LC41
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC41
 	mov	w2, w22
 	mov	w3, w24
 	bl	printk
-.L479:
+.L481:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w25, .L480
+	cbnz	w25, .L482
 	bl	zftl_flash_enter_slc_mode
-	b	.L481
-.L480:
+	b	.L483
+.L482:
 	bl	zftl_flash_exit_slc_mode
-.L481:
+.L483:
 	ubfiz	x4, x21, 8, 8
 	mov	w0, 96
 	add	x19, x19, x4
@@ -2692,7 +2693,7 @@ flash_erase_duplane_block:
 	str	w0, [x19,2052]
 	ldrb	w0, [x20,781]
 	mov	w20, 0
-	cbnz	w0, .L482
+	cbnz	w0, .L484
 	mov	w0, 208
 	str	w0, [x19,2056]
 	mov	w20, 5
@@ -2700,7 +2701,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w20, w0, w20
-.L482:
+.L484:
 	mov	w0, 96
 	str	w0, [x19,2056]
 	and	w0, w24, 255
@@ -2723,12 +2724,12 @@ flash_erase_duplane_block:
 	ldr	x2, [x29,88]
 	and	w19, w2, w19
 	orr	w19, w19, w20
-	cbz	w19, .L483
+	cbz	w19, .L485
 	adrp	x0, .LC42
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC42
 	bl	printk
-.L483:
+.L485:
 	mov	w0, w19
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -2755,16 +2756,16 @@ flash_erase_block_en:
 	ldrb	w0, [x0,633]
 	and	w23, w2, 2097151
 	cmp	w0, w20
-	bhi	.L492
+	bhi	.L494
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 555
+	mov	w2, 558
 	add	x1, x1, 768
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L492:
+.L494:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x20, x0, x20, sxtw
 	ldrb	w21, [x20,736]
@@ -2774,23 +2775,23 @@ flash_erase_block_en:
 	add	x21, x21, 8
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	add	x21, x25, x21, lsl 8
-	tbz	x0, 4, .L493
+	tbz	x0, 4, .L495
 	adrp	x0, .LC43
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC43
 	mov	w2, w22
 	bl	printk
-.L493:
+.L495:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w24, .L494
+	cbnz	w24, .L496
 	bl	zftl_flash_enter_slc_mode
-	b	.L495
-.L494:
+	b	.L497
+.L496:
 	bl	zftl_flash_exit_slc_mode
-.L495:
+.L497:
 	ubfiz	x3, x20, 8, 8
 	mov	w0, 96
 	add	x3, x25, x3
@@ -2812,7 +2813,7 @@ flash_erase_block_en:
 	bl	nandc_de_cs
 	mov	w3, 5
 	ands	w20, w21, w3
-	beq	.L496
+	beq	.L498
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
@@ -2820,7 +2821,7 @@ flash_erase_block_en:
 	ldrh	w1, [x19,2]
 	udiv	w1, w22, w1
 	bl	printk
-.L496:
+.L498:
 	mov	w0, w20
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -2860,28 +2861,28 @@ flash_erase_all:
 	mov	x21, x0
 	mul	w20, w1, w20
 	uxth	w20, w20
-.L505:
+.L507:
 	ldrb	w0, [x23,633]
 	cmp	w0, w19
-	bls	.L509
+	bls	.L511
 	add	x0, x23, x19, sxtw
 	ldrb	w24, [x0,736]
 	mov	w22, 0
-.L506:
+.L508:
 	cmp	w20, w22, uxth
-	bls	.L510
+	bls	.L512
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0,2]
 	mov	w0, w24
 	mul	w1, w22, w1
 	add	w22, w22, 1
 	bl	flash_erase_block
-	b	.L506
-.L510:
+	b	.L508
+.L512:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L505
-.L509:
+	b	.L507
+.L511:
 	adrp	x0, .LC45
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC45
@@ -2927,7 +2928,7 @@ nandc_xfer_start:
 	cmp	w0, 9
 	ldr	x3, [x29,88]
 	ldr	x2, [x29,80]
-	bne	.L513
+	bne	.L515
 	ldr	w0, [x4,292]
 	ubfiz	w19, w24, 1, 1
 	orr	w19, w19, 8
@@ -2945,13 +2946,13 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L515
+	cbz	w0, .L517
 	ldrb	w1, [x21,720]
 	orr	w0, w19, 512
 	cmp	w1, wzr
 	csel	w19, w0, w19, ne
-	b	.L515
-.L513:
+	b	.L517
+.L515:
 	ldr	w0, [x4,368]
 	ubfiz	w19, w24, 1, 1
 	orr	w19, w19, 8
@@ -2972,7 +2973,7 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w24, .L527
+	cbz	w24, .L529
 	ldrb	w0, [x21,724]
 	ubfx	x23, x23, 1, 7
 	mov	w1, 64
@@ -2981,8 +2982,8 @@ nandc_xfer_start:
 	add	x23, x3, x23, lsl 2
 	csel	w4, w1, w4, cc
 	mov	w1, 0
-	b	.L520
-.L515:
+	b	.L522
+.L517:
 	add	x22, x22, :lo12:.LANCHOR0
 	ubfx	x21, x19, 22, 6
 	mov	x0, x2
@@ -3020,11 +3021,11 @@ nandc_xfer_start:
 	str	w19, [x3,16]
 	orr	w19, w19, 4
 	str	w19, [x3,16]
-	b	.L512
-.L520:
+	b	.L514
+.L522:
 	cmp	x3, x23
 	add	w0, w1, w4
-	beq	.L522
+	beq	.L524
 	ldrh	w5, [x3,2]
 	and	x1, x1, 4294967292
 	ldr	x6, [x21,680]
@@ -3032,11 +3033,11 @@ nandc_xfer_start:
 	orr	w5, w7, w5, lsl 16
 	str	w5, [x6,x1]
 	mov	w1, w0
-	b	.L520
-.L527:
+	b	.L522
+.L529:
 	ldr	x1, [x21,680]
 	str	w0, [x1]
-.L522:
+.L524:
 	add	x22, x22, :lo12:.LANCHOR0
 	and	w20, w20, 63
 	lsl	w1, w20, 10
@@ -3069,7 +3070,7 @@ nandc_xfer_start:
 	str	w19, [x3,8]
 	orr	w19, w19, 4
 	str	w19, [x3,8]
-.L512:
+.L514:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -3095,12 +3096,12 @@ nandc_set_seed:
 	ldrb	w2, [x0,516]
 	ldr	x0, [x0,536]
 	cmp	w2, 9
-	bne	.L530
+	bne	.L532
 	str	w1, [x0,520]
-	b	.L528
-.L530:
+	b	.L530
+.L532:
 	str	w1, [x0,336]
-.L528:
+.L530:
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
 	.align	2
@@ -3116,24 +3117,24 @@ zftl_flash_de_init:
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x20,672]
-	cbz	w0, .L535
+	cbz	w0, .L537
 	ldrb	w0, [x20,780]
-	tbz	x0, 0, .L535
+	tbz	x0, 0, .L537
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x20,672]
-.L535:
+.L537:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x19,720]
-	cbz	w0, .L536
+	cbz	w0, .L538
 	mov	w0, 0
 	strb	wzr, [x19,720]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x19,720]
-.L536:
+.L538:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -3171,7 +3172,7 @@ buf_init:
 	add	x19, x19, 784
 	mov	w21, 0
 	mov	x22, x0
-.L549:
+.L551:
 	add	x20, x22, :lo12:.LANCHOR0
 	uxtb	w0, w21
 	add	w1, w0, 1
@@ -3190,7 +3191,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19,-40]
 	cmp	w21, 32
-	bne	.L549
+	bne	.L551
 	strb	w21, [x20,2834]
 	mov	w0, -1
 	strb	wzr, [x20,2833]
@@ -3208,7 +3209,7 @@ buf_reinit:
 	mov	w2, 0
 	add	x1, x0, :lo12:.LANCHOR0
 	add	x1, x1, 784
-.L552:
+.L554:
 	uxtb	w3, w2
 	add	w2, w2, 1
 	add	w4, w3, 1
@@ -3218,7 +3219,7 @@ buf_reinit:
 	strb	wzr, [x1,2]
 	add	x1, x1, 64
 	str	xzr, [x1,-48]
-	bne	.L552
+	bne	.L554
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, -1
 	strb	wzr, [x0,2833]
@@ -3239,10 +3240,10 @@ buf_add_tail:
 	mov	x19, x1
 	ldrb	w1, [x20]
 	cmp	w1, 255
-	bne	.L560
+	bne	.L562
 	ldrb	w0, [x19,1]
 	cmp	w0, 255
-	bne	.L556
+	bne	.L558
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
@@ -3251,23 +3252,23 @@ buf_add_tail:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L556:
+.L558:
 	ldrb	w0, [x19,1]
 	strb	w0, [x20]
-	b	.L554
-.L560:
+	b	.L556
+.L562:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x0, x0, 784
-.L561:
+.L563:
 	mov	w20, w1
 	sbfiz	x1, x1, 6, 32
 	ldrb	w1, [x0,x1]
 	cmp	w1, 255
-	bne	.L561
+	bne	.L563
 	ldrb	w0, [x19,1]
 	cmp	w0, 255
-	bne	.L558
+	bne	.L560
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
@@ -3276,14 +3277,14 @@ buf_add_tail:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L558:
+.L560:
 	adrp	x0, .LANCHOR0
 	sbfiz	x20, x20, 6, 32
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w1, [x19,1]
 	add	x0, x0, 784
 	strb	w1, [x0,x20]
-.L554:
+.L556:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3324,22 +3325,22 @@ buf_free:
 	and	w1, w1, 8
 	uxtb	w1, w1
 	strb	w1, [x0,2]
-	cbz	w1, .L564
+	cbz	w1, .L566
 	ldr	w1, [x0,36]
 	cmn	w1, #1
-	beq	.L564
+	beq	.L566
 	mov	x1, x0
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 2833
 	bl	buf_add_tail
-	b	.L565
-.L564:
+	b	.L567
+.L566:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x1,2833]
 	strb	w2, [x0]
 	ldrb	w0, [x0,1]
 	strb	w0, [x1,2833]
-.L565:
+.L567:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x19,2834]
 	add	w0, w0, 1
@@ -3361,15 +3362,15 @@ buf_alloc:
 	uxtb	w21, w0
 	mov	x19, x1
 	ldrb	w0, [x20,2834]
-	cbz	w0, .L573
-.L576:
+	cbz	w0, .L575
+.L578:
 	add	x1, x19, :lo12:.LANCHOR0
 	add	x0, x1, 784
 	ldrb	w2, [x1,2833]
 	add	x0, x0, x2, lsl 6
-	cbz	w21, .L574
-	b	.L575
-.L573:
+	cbz	w21, .L576
+	b	.L577
+.L575:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
@@ -3379,15 +3380,15 @@ buf_alloc:
 	bl	printk
 	bl	dump_stack
 	ldrb	w1, [x20,2834]
-	cbnz	w1, .L576
-.L578:
+	cbnz	w1, .L578
+.L580:
 	mov	x0, 0
-	b	.L577
-.L574:
+	b	.L579
+.L576:
 	ldrb	w1, [x1,2834]
 	cmp	w1, 1
-	beq	.L578
-.L575:
+	beq	.L580
+.L577:
 	add	x1, x19, :lo12:.LANCHOR0
 	lsl	x2, x2, 6
 	add	x4, x1, 784
@@ -3407,7 +3408,7 @@ buf_alloc:
 	strb	wzr, [x3,56]
 	str	w1, [x3,36]
 	strb	wzr, [x3,57]
-.L577:
+.L579:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -3420,33 +3421,33 @@ buf_remove_buf:
 	ldrb	w4, [x1,1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L585
+	bne	.L587
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-	b	.L589
-.L585:
+	b	.L591
+.L587:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x0, x0, 784
-.L587:
+.L589:
 	cmp	w2, 255
-	beq	.L590
+	beq	.L592
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0,x2]
 	cmp	w2, w4
-	bne	.L587
+	bne	.L589
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0,x3]
 	mov	w0, -1
 	strb	w0, [x1]
-.L589:
+.L591:
 	mov	w0, 1
-	b	.L584
-.L590:
+	b	.L586
+.L592:
 	mov	w0, 0
-.L584:
+.L586:
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
 	.align	2
@@ -3460,7 +3461,7 @@ buf_remove_free:
 	mov	x20, x0
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2834]
-	cbnz	w0, .L592
+	cbnz	w0, .L594
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
@@ -3469,22 +3470,22 @@ buf_remove_free:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L592:
+.L594:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x19,2834]
-	cbz	w0, .L591
+	cbz	w0, .L593
 	add	x0, x19, 2833
 	mov	x1, x20
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L591
+	bne	.L593
 	ldrb	w0, [x19,2834]
 	sub	w0, w0, #1
 	strb	w0, [x19,2834]
 	ldrb	w0, [x20,2]
 	orr	w0, w0, 1
 	strb	w0, [x20,2]
-.L591:
+.L593:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3564,49 +3565,49 @@ flash_mask_bad_block:
 str2hex:
 	ldrb	w1, [x0]
 	cmp	w1, 48
-	bne	.L599
+	bne	.L601
 	ldrb	w1, [x0,1]
 	add	x2, x0, 2
 	and	w1, w1, -33
 	uxtb	w1, w1
 	cmp	w1, 88
 	csel	x0, x0, x2, ne
-.L599:
+.L601:
 	ldrb	w1, [x0]
 	and	w1, w1, -33
 	uxtb	w1, w1
 	cmp	w1, 88
 	mov	w1, 0
 	csinc	x0, x0, x0, ne
-.L601:
+.L603:
 	ldrb	w2, [x0]
-	cbz	w2, .L608
+	cbz	w2, .L610
 	sub	w3, w2, #48
 	uxtb	w3, w3
 	cmp	w3, 9
-	bhi	.L602
+	bhi	.L604
 	add	w1, w2, w1, lsl 4
 	sub	w1, w1, #48
-	b	.L603
-.L602:
+	b	.L605
+.L604:
 	sub	w3, w2, #97
 	uxtb	w3, w3
 	cmp	w3, 5
-	bhi	.L604
+	bhi	.L606
 	add	w1, w2, w1, lsl 4
 	sub	w1, w1, #87
-	b	.L603
-.L604:
+	b	.L605
+.L606:
 	sub	w3, w2, #65
 	uxtb	w3, w3
 	cmp	w3, 5
-	bhi	.L608
+	bhi	.L610
 	add	w1, w2, w1, lsl 4
 	sub	w1, w1, #55
-.L603:
+.L605:
 	add	x0, x0, 1
-	b	.L601
-.L608:
+	b	.L603
+.L610:
 	mov	w0, w1
 	ret
 	.size	str2hex, .-str2hex
@@ -3988,16 +3989,16 @@ gc_add_sblk:
 	uxth	w20, w2
 	ldrh	w0, [x0,576]
 	cmp	w0, w21
-	bhi	.L616
+	bhi	.L618
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 258
+	mov	w2, 259
 	add	x1, x1, 1312
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L616:
+.L618:
 	add	x6, x22, :lo12:.LANCHOR0
 	uxtw	x19, w21
 	lsl	x25, x19, 1
@@ -4005,7 +4006,7 @@ gc_add_sblk:
 	ldr	x0, [x6,600]
 	ldrh	w26, [x0,x25]
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L617
+	tbz	x0, 8, .L619
 	ldr	x0, [x6,584]
 	mov	w1, w21
 	ldrh	w5, [x6,2952]
@@ -4018,67 +4019,67 @@ gc_add_sblk:
 	add	x0, x0, :lo12:.LC84
 	ubfx	x3, x3, 5, 3
 	bl	printk
-.L617:
+.L619:
 	add	x3, x22, :lo12:.LANCHOR0
 	ldr	x0, [x3,584]
 	add	x0, x0, x19, lsl 2
 	ldrb	w19, [x0,2]
 	ands	w19, w19, 224
-	bne	.L618
-	cbz	w26, .L619
+	bne	.L620
+	cbz	w26, .L621
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 263
+	mov	w2, 264
 	add	x1, x1, 1312
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L619
-.L618:
+	b	.L621
+.L620:
 	ldrh	w1, [x3,2896]
 	add	x6, x3, 2896
 	mov	w19, 0
 	cmp	w1, w21
-	beq	.L619
+	beq	.L621
 	ldr	x3, [x3,608]
 	ldrh	w1, [x3,48]
 	cmp	w1, w21
-	beq	.L619
+	beq	.L621
 	ldrh	w1, [x3,16]
 	cmp	w1, w21
-	beq	.L619
+	beq	.L621
 	ldrh	w1, [x3,80]
 	cmp	w1, w21
-	beq	.L619
+	beq	.L621
 	ldrh	w5, [x6,56]
 	mov	x4, 0
-.L620:
+.L622:
 	cmp	w5, w4
-	bls	.L651
+	bls	.L653
 	add	x4, x4, 1
 	add	x1, x6, x4, lsl 1
 	ldrh	w1, [x1,56]
 	cmp	w1, w21
-	bne	.L620
+	bne	.L622
 	mov	w19, 0
-	b	.L619
-.L651:
-	cbnz	w23, .L622
+	b	.L621
+.L653:
+	cbnz	w23, .L624
 	add	x4, x22, :lo12:.LANCHOR0
 	mov	w19, w23
 	ldrh	w7, [x4,3224]
 	cmp	w7, w21
-	beq	.L619
+	beq	.L621
 	mov	x6, 0
-.L624:
+.L626:
 	add	x1, x4, 3232
 	ldrh	w1, [x6,x1]
 	cmp	w21, w1
-	bne	.L623
+	bne	.L625
 	ldr	w1, [x24,#:lo12:.LANCHOR2]
 	mov	w19, 0
-	tbz	x1, 8, .L619
+	tbz	x1, 8, .L621
 	ldr	x3, [x4,600]
 	mov	w1, w21
 	ldrb	w2, [x0,2]
@@ -4089,20 +4090,20 @@ gc_add_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC85
 	bl	printk
-	b	.L619
-.L623:
+	b	.L621
+.L625:
 	add	x6, x6, 2
 	cmp	x6, 16
-	bne	.L624
+	bne	.L626
 	sxtw	x4, w20
 	add	x3, x3, x4, lsl 7
 	add	x19, x3, 136
-	b	.L626
-.L622:
+	b	.L628
+.L624:
 	add	x19, x3, 392
-.L626:
+.L628:
 	ldr	w1, [x24,#:lo12:.LANCHOR2]
-	tbz	x1, 8, .L627
+	tbz	x1, 8, .L629
 	add	x6, x22, :lo12:.LANCHOR0
 	ldrb	w3, [x0,2]
 	adrp	x0, .LC84
@@ -4114,37 +4115,37 @@ gc_add_sblk:
 	ldrh	w6, [x6,2878]
 	ldrh	w4, [x4,x25]
 	bl	printk
-.L627:
+.L629:
 	mov	x3, x19
 	add	x0, x19, 128
 	mov	w1, 65535
-.L630:
+.L632:
 	ldrh	w2, [x3]
 	cmp	w2, w1
-	bne	.L628
+	bne	.L630
 	strh	w21, [x3]
 	add	x22, x22, :lo12:.LANCHOR0
-	cbz	w23, .L629
+	cbz	w23, .L631
 	ldr	x1, [x22,608]
 	ldrh	w0, [x1,124]
 	add	w0, w0, 1
 	strh	w0, [x1,124]
-	b	.L650
-.L629:
+	b	.L652
+.L631:
 	ldr	x0, [x22,608]
 	add	x2, x0, x20, uxth 1
 	ldrh	w0, [x2,120]
 	add	w0, w0, 1
 	strh	w0, [x2,120]
-.L650:
+.L652:
 	mov	w19, 1
-	b	.L619
-.L628:
+	b	.L621
+.L630:
 	add	x3, x3, 2
 	cmp	x3, x0
-	bne	.L630
-	b	.L650
-.L619:
+	bne	.L632
+	b	.L652
+.L621:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4180,11 +4181,11 @@ gc_write_completed:
 	str	x27, [sp,80]
 	add	x23, x21, 784
 	add	x22, x22, 1328
-.L654:
+.L656:
 	ldrb	w0, [x21,3256]
 	adrp	x19, .LANCHOR0
 	cmp	w0, 255
-	beq	.L676
+	beq	.L678
 	sxtw	x25, w0
 	lsl	x0, x25, 6
 	add	x2, x23, x0
@@ -4192,7 +4193,7 @@ gc_write_completed:
 	ldr	w1, [x2,52]
 	strb	w0, [x21,3256]
 	ldrh	w24, [x2,48]
-	cbz	w1, .L655
+	cbz	w1, .L657
 	ldr	w2, [x2,40]
 	adrp	x0, .LC86
 	mov	w3, 1
@@ -4202,25 +4203,25 @@ gc_write_completed:
 	bl	printk
 	adrp	x0, .LC0
 	mov	x1, x22
-	mov	w2, 544
+	mov	w2, 545
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L655:
+.L657:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w20, 1
 	ldrb	w1, [x0,3257]
 	cmp	w1, 3
-	bne	.L656
+	bne	.L658
 	ldr	x0, [x0,608]
 	ldrb	w20, [x0,89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L656:
+.L658:
 	adrp	x0, .LANCHOR2
 	uxth	x26, w24
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L657
+	tbz	x0, 8, .L659
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w24
 	add	x2, x0, x25, lsl 6
@@ -4231,43 +4232,43 @@ gc_write_completed:
 	add	x0, x0, :lo12:.LC87
 	ldrb	w4, [x4,x26]
 	bl	printk
-.L657:
+.L659:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x1, [x0,3264]
 	add	x0, x0, x25, lsl 6
 	ldrb	w1, [x1,x26]
 	ldrb	w0, [x0,785]
 	cmp	w1, w0
-	beq	.L658
+	beq	.L660
 	adrp	x0, .LC0
 	mov	x1, x22
-	mov	w2, 551
+	mov	w2, 552
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L658:
+.L660:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x1, x2, 784
 	add	x0, x1, x25, lsl 6
 	ldrb	w0, [x0,61]
 	cmp	w0, 3
-	beq	.L659
+	beq	.L661
 	ldrb	w0, [x2,3257]
 	cmp	w0, 3
-	bne	.L659
+	bne	.L661
 	ldrb	w0, [x2,3272]
-	cbnz	w0, .L659
+	cbnz	w0, .L661
 	ldr	x3, [x2,3264]
-	b	.L660
-.L659:
+	b	.L662
+.L661:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w25, 0
 	mov	w26, -1
 	add	x27, x19, 784
 	strh	w24, [x19,3212]
-.L661:
+.L663:
 	cmp	w20, w25, uxth
-	bls	.L654
+	bls	.L656
 	add	w1, w25, w24
 	ldr	x2, [x19,3264]
 	add	w25, w25, 1
@@ -4280,17 +4281,17 @@ gc_write_completed:
 	ldrb	w0, [x19,2903]
 	sub	w0, w0, #1
 	strb	w0, [x19,2903]
-	b	.L661
-.L660:
+	b	.L663
+.L662:
 	cmp	w20, w0, uxth
-	bls	.L654
+	bls	.L656
 	add	w2, w0, w24
 	add	w0, w0, 1
 	ldrb	w2, [x3,x2]
 	add	x2, x1, x2, lsl 6
 	strb	wzr, [x2,61]
-	b	.L660
-.L676:
+	b	.L662
+.L678:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -4308,48 +4309,48 @@ gc_get_src_blk:
 	ldr	x1, [x0,608]
 	ldrb	w0, [x0,3273]
 	ldrh	w4, [x1,124]
-	cbz	w4, .L678
+	cbz	w4, .L680
 	add	x1, x1, 392
 	mov	w2, 1
-	b	.L679
-.L678:
+	b	.L681
+.L680:
 	sxtw	x2, w0
 	add	x0, x1, x2, lsl 1
 	ldrh	w5, [x0,120]
 	mov	w0, 65535
-	cbz	w5, .L680
+	cbz	w5, .L682
 	add	x1, x1, x2, lsl 7
 	mov	w2, w4
 	add	x1, x1, 136
-.L679:
+.L681:
 	add	x4, x1, 128
 	mov	w5, 65535
-.L683:
+.L685:
 	ldrh	w0, [x1]
 	cmp	w0, w5
-	beq	.L681
+	beq	.L683
 	mov	w4, -1
 	strh	w4, [x1]
 	add	x3, x3, :lo12:.LANCHOR0
-	cbz	w2, .L682
+	cbz	w2, .L684
 	ldr	x2, [x3,608]
 	ldrh	w1, [x2,124]
 	sub	w1, w1, #1
 	strh	w1, [x2,124]
-	b	.L680
-.L682:
+	b	.L682
+.L684:
 	ldrb	w1, [x3,3273]
 	ldr	x2, [x3,608]
 	add	x1, x2, x1, lsl 1
 	ldrh	w2, [x1,120]
 	sub	w2, w2, #1
 	strh	w2, [x1,120]
-	b	.L680
-.L681:
+	b	.L682
+.L683:
 	add	x1, x1, 2
 	cmp	x1, x4
-	bne	.L683
-.L680:
+	bne	.L685
+.L682:
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
 	.align	2
@@ -4364,10 +4365,10 @@ gc_free_temp_buf:
 	str	x21, [sp,32]
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w3, [x2,2903]
-	cbz	w3, .L688
+	cbz	w3, .L690
 	ldrb	w3, [x2,2834]
 	cmp	w3, 1
-	bhi	.L688
+	bhi	.L690
 	ldrh	w4, [x2,3274]
 	mov	x20, x2
 	ldrb	w0, [x2,3276]
@@ -4378,29 +4379,29 @@ gc_free_temp_buf:
 	ldr	x4, [x2,2480]
 	cmp	w0, w3
 	csel	w3, w0, w3, ls
-.L689:
+.L691:
 	cmp	w1, w3
-	bcs	.L702
+	bcs	.L704
 	uxtw	x21, w1
 	ldrb	w0, [x4,x21]
 	cmp	w0, 255
-	beq	.L690
+	beq	.L692
 	sbfiz	x0, x0, 6, 32
 	add	x0, x2, x0
 	ldrb	w5, [x0,61]
-	cbnz	w5, .L690
+	cbnz	w5, .L692
 	str	x1, [x29,56]
 	bl	buf_free
 	adrp	x0, .LANCHOR2
 	ldr	x1, [x29,56]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L691
+	tbz	x0, 8, .L693
 	ldr	x2, [x20,3264]
 	adrp	x0, .LC88
 	add	x0, x0, :lo12:.LC88
 	ldrb	w2, [x2,x21]
 	bl	printk
-.L691:
+.L693:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	ldr	x0, [x19,3264]
@@ -4409,13 +4410,13 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x19,2903]
 	mov	w0, 1
-	b	.L688
-.L690:
+	b	.L690
+.L692:
 	add	w1, w1, 1
-	b	.L689
-.L702:
+	b	.L691
+.L704:
 	mov	w0, 0
-.L688:
+.L690:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 64
@@ -4450,23 +4451,23 @@ zftl_get_gc_node:
 	uxth	w2, w0
 	cmp	w1, 5
 	add	x29, sp, 0
-	bne	.L705
+	bne	.L707
 	adrp	x0, .LANCHOR0+3280
 	ldr	x0, [x0,#:lo12:.LANCHOR0+3280]
-	b	.L708
-.L705:
+	b	.L710
+.L707:
 	cmp	w1, 2
-	bne	.L707
+	bne	.L709
 	mov	w0, w2
 	bl	zftl_get_gc_node.part.12
-	b	.L709
-.L707:
+	b	.L711
+.L709:
 	adrp	x0, .LANCHOR0+3288
 	ldr	x0, [x0,#:lo12:.LANCHOR0+3288]
-.L708:
+.L710:
 	mov	w1, w2
 	bl	_list_get_gc_head_node.isra.5
-.L709:
+.L711:
 	uxth	w0, w0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4490,8 +4491,8 @@ gc_search_src_blk:
 	ldr	x1, [x0,608]
 	add	x1, x1, x21, sxtw 1
 	ldrh	w19, [x1,120]
-	cbnz	w19, .L757
-	cbnz	w21, .L713
+	cbnz	w19, .L759
+	cbnz	w21, .L715
 	adrp	x26, .LC90
 	strh	w21, [x0,3296]
 	mov	w19, w21
@@ -4500,9 +4501,9 @@ gc_search_src_blk:
 	mov	w27, 65535
 	adrp	x28, .LANCHOR2
 	add	x26, x26, :lo12:.LC90
-.L714:
+.L716:
 	cmp	w25, w23
-	bcs	.L719
+	bcs	.L721
 	add	x3, x20, :lo12:.LANCHOR0
 	mov	w1, 3
 	str	x3, [x29,96]
@@ -4518,10 +4519,10 @@ gc_search_src_blk:
 	add	w2, w2, 1
 	uxth	w2, w2
 	strh	w2, [x3,3296]
-	beq	.L715
+	beq	.L717
 	ldr	w0, [x28,#:lo12:.LANCHOR2]
 	uxtw	x5, w1
-	tbz	x0, 8, .L716
+	tbz	x0, 8, .L718
 	ldr	x3, [x3,600]
 	mov	x0, x26
 	str	x4, [x29,96]
@@ -4530,40 +4531,40 @@ gc_search_src_blk:
 	bl	printk
 	ldr	x4, [x29,96]
 	ldr	x5, [x29,104]
-.L716:
+.L718:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldr	x0, [x1,600]
 	ldrh	w2, [x0,x5,lsl 1]
 	ldrh	w0, [x1,2878]
 	cmp	w2, w0
-	bcs	.L717
+	bcs	.L719
 	mov	w1, 0
 	mov	w0, w4
 	mov	w2, w1
 	bl	gc_add_sblk
-	cbz	w0, .L718
+	cbz	w0, .L720
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w23
-	bls	.L718
-	b	.L719
-.L717:
+	bls	.L720
+	b	.L721
+.L719:
 	strh	wzr, [x1,3296]
-	b	.L719
-.L715:
+	b	.L721
+.L717:
 	strh	wzr, [x3,3296]
-	b	.L719
-.L718:
+	b	.L721
+.L720:
 	add	w25, w25, 1
 	uxth	w25, w25
-	b	.L714
-.L719:
-	tbz	x24, 1, .L721
+	b	.L716
+.L721:
+	tbz	x24, 1, .L723
 	mov	w26, 0
 	mov	w27, 65535
-.L722:
+.L724:
 	cmp	w26, w23
-	beq	.L726
+	beq	.L728
 	add	x25, x20, :lo12:.LANCHOR0
 	mov	w1, 5
 	ldrh	w28, [x25,3298]
@@ -4573,32 +4574,32 @@ gc_search_src_blk:
 	uxth	w1, w0
 	strh	w28, [x25,3298]
 	cmp	w1, w27
-	beq	.L723
+	beq	.L725
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x25,600]
 	ldrh	w2, [x2,x1]
 	ldrh	w1, [x25,2880]
 	cmp	w2, w1
-	bcs	.L723
+	bcs	.L725
 	mov	w1, 0
 	mov	w2, w1
 	bl	gc_add_sblk
-	cbz	w0, .L725
+	cbz	w0, .L727
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w23
-	bls	.L725
-	b	.L728
-.L723:
-	strh	wzr, [x25,3298]
-	b	.L726
+	bls	.L727
+	b	.L730
 .L725:
+	strh	wzr, [x25,3298]
+	b	.L728
+.L727:
 	add	w26, w26, 1
 	uxth	w26, w26
-	b	.L722
-.L726:
+	b	.L724
+.L728:
 	cmp	w19, w23
-	bcs	.L728
+	bcs	.L730
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0,3274]
 	ldrb	w4, [x0,3276]
@@ -4607,27 +4608,27 @@ gc_search_src_blk:
 	mul	w1, w1, w4
 	sub	w1, w1, w2, lsr 2
 	cmp	w3, w1
-	bge	.L721
+	bge	.L723
 	add	w2, w3, w2, lsr 3
 	strh	w2, [x0,2880]
-	b	.L721
-.L728:
+	b	.L723
+.L730:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x1,2880]
 	ldrh	w0, [x1,3300]
 	cmp	w2, w0
-	bls	.L721
+	bls	.L723
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x1,2880]
-.L721:
-	tbz	x24, 0, .L729
+.L723:
+	tbz	x24, 0, .L731
 	cmp	w19, w23
-	bcs	.L729
+	bcs	.L731
 	mov	w25, 0
 	mov	w27, 65535
-.L730:
+.L732:
 	cmp	w25, w23
-	beq	.L733
+	beq	.L735
 	add	x28, x20, :lo12:.LANCHOR0
 	ldrh	w26, [x28,3302]
 	mov	w0, w26
@@ -4635,57 +4636,57 @@ gc_search_src_blk:
 	bl	zftl_get_gc_node.part.12
 	strh	w26, [x28,3302]
 	cmp	w27, w0, uxth
-	beq	.L731
+	beq	.L733
 	mov	w1, 0
 	mov	w2, w1
 	bl	gc_add_sblk
-	cbz	w0, .L732
+	cbz	w0, .L734
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w23
-	bcc	.L732
-	b	.L735
-.L731:
+	bcc	.L734
+	b	.L737
+.L733:
 	strh	wzr, [x28,3302]
-	b	.L733
-.L732:
+	b	.L735
+.L734:
 	add	w25, w25, 1
 	uxth	w25, w25
-	b	.L730
-.L733:
+	b	.L732
+.L735:
 	cmp	w19, w23
-	bcs	.L735
+	bcs	.L737
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x20,2878]
 	ldrh	w0, [x20,3300]
 	cmp	w1, w0
-	bcs	.L729
+	bcs	.L731
 	add	w0, w1, w0, lsr 3
-	b	.L810
-.L735:
+	b	.L812
+.L737:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20,3300]
 	ldrh	w1, [x20,2878]
 	cmp	w1, w0, lsr 1
-	bls	.L729
+	bls	.L731
 	sub	w0, w1, w0, lsr 3
-.L810:
+.L812:
 	strh	w0, [x20,2878]
-	b	.L729
-.L713:
+	b	.L731
+.L715:
 	and	w1, w24, 1
 	strh	w19, [x0,3214]
 	strh	w19, [x0,3304]
 	str	w1, [x29,104]
-	tbz	x24, 0, .L736
+	tbz	x24, 0, .L738
 	ldrh	w2, [x0,3306]
 	ldrh	w1, [x0,2852]
 	cmp	w1, w2, lsr 2
-	bcc	.L737
+	bcc	.L739
 	ldrh	w0, [x0,2850]
 	cmp	w0, w1
-	bls	.L738
-.L737:
+	bls	.L740
+.L739:
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w19, 0
 	ldrh	w0, [x23,2850]
@@ -4696,24 +4697,24 @@ gc_search_src_blk:
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L739
+	beq	.L741
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x23,600]
 	ldrh	w2, [x23,3300]
 	ldrh	w1, [x3,x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L739
+	bcs	.L741
 	mov	w1, w19
 	mov	w2, w21
 	strh	w19, [x23,3302]
 	bl	gc_add_sblk
 	cmp	w0, w19
 	cset	w19, ne
-.L739:
+.L741:
 	mov	w23, 64
 	mov	w26, 65535
 	uxth	w27, w22
-.L741:
+.L743:
 	add	x25, x20, :lo12:.LANCHOR0
 	ldrh	w28, [x25,3302]
 	mov	w0, w28
@@ -4721,38 +4722,38 @@ gc_search_src_blk:
 	bl	zftl_get_gc_node.part.12
 	strh	w28, [x25,3302]
 	cmp	w26, w0, uxth
-	beq	.L738
+	beq	.L740
 	mov	w1, 0
 	mov	w2, w21
 	bl	gc_add_sblk
-	cbz	w0, .L740
+	cbz	w0, .L742
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w27
-	bcs	.L738
-.L740:
+	bcs	.L740
+.L742:
 	sub	w23, w23, #1
 	uxth	w23, w23
-	cbnz	w23, .L741
-.L738:
+	cbnz	w23, .L743
+.L740:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x0,3306]
 	ldrh	w1, [x0,2852]
 	cmp	w1, w2, lsr 3
-	bhi	.L758
+	bhi	.L760
 	ldrh	w0, [x0,2850]
 	add	w0, w0, 8
 	cmp	w1, w0
-	bgt	.L758
-.L736:
-	tbz	x24, 1, .L744
+	bgt	.L760
+.L738:
+	tbz	x24, 1, .L746
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w25, 64
 	mov	w26, 0
 	mov	w27, 65535
 	uxth	w28, w22
 	strh	wzr, [x0,3298]
-.L749:
+.L751:
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w1, 5
 	ldrh	w2, [x23,3298]
@@ -4764,51 +4765,51 @@ gc_search_src_blk:
 	cmp	w1, w27
 	add	w2, w2, 1
 	strh	w2, [x23,3298]
-	beq	.L745
+	beq	.L747
 	cmp	w22, 1
-	bne	.L746
+	bne	.L748
 	ldrh	w3, [x23,3274]
 	ldrb	w2, [x23,3276]
 	mul	w2, w2, w3
 	ldrh	w3, [x23,3300]
 	sub	w2, w2, w3, lsr 3
 	strh	w2, [x23,2874]
-.L746:
+.L748:
 	add	x2, x20, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2,600]
 	ldrh	w3, [x3,x1]
 	ldrh	w1, [x2,2874]
 	cmp	w3, w1
-	bcs	.L747
+	bcs	.L749
 	mov	w1, 0
 	mov	w2, w21
 	bl	gc_add_sblk
-	cbz	w0, .L748
+	cbz	w0, .L750
 	add	w19, w19, 1
 	add	w26, w26, 1
 	uxth	w19, w19
 	uxth	w26, w26
 	cmp	w19, w28
-	bcc	.L748
-	b	.L745
-.L747:
+	bcc	.L750
+	b	.L747
+.L749:
 	strh	wzr, [x2,3298]
-	b	.L745
-.L748:
+	b	.L747
+.L750:
 	sub	w0, w25, #1
 	uxth	w25, w0
-	cbnz	w25, .L749
-.L745:
+	cbnz	w25, .L751
+.L747:
 	cmp	w19, w22
-	bcc	.L750
-	cbnz	w26, .L751
+	bcc	.L752
+	cbnz	w26, .L753
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0,2854]
 	ldrh	w0, [x0,3308]
 	cmp	w1, w0
-	bls	.L751
-.L750:
+	bls	.L753
+.L752:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0,3274]
 	ldrb	w4, [x0,3276]
@@ -4818,29 +4819,29 @@ gc_search_src_blk:
 	lsr	w3, w3, 3
 	sub	w1, w1, w3
 	cmp	w2, w1
-	bge	.L744
+	bge	.L746
 	add	w2, w3, w2
 	strh	w2, [x0,2874]
-	b	.L744
-.L751:
+	b	.L746
+.L753:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0,3300]
 	ldrb	w2, [x0,3276]
 	ldrh	w3, [x0,2874]
 	mul	w2, w1, w2
 	cmp	w3, w2
-	ble	.L744
+	ble	.L746
 	sub	w1, w3, w1, lsr 3
 	strh	w1, [x0,2874]
-.L744:
+.L746:
 	ldr	w0, [x29,104]
-	cbz	w0, .L729
+	cbz	w0, .L731
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w25, 64
 	mov	w26, 65535
 	uxth	w27, w22
 	strh	wzr, [x0,3296]
-.L755:
+.L757:
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w1, 3
 	ldrh	w28, [x23,3296]
@@ -4850,57 +4851,57 @@ gc_search_src_blk:
 	uxth	w1, w0
 	strh	w28, [x23,3296]
 	cmp	w1, w26
-	beq	.L752
+	beq	.L754
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x23,600]
 	ldrh	w1, [x2,x1]
 	cmp	w1, 2
-	bls	.L753
+	bls	.L755
 	ldrh	w2, [x23,2876]
 	cmp	w2, w1
-	bls	.L753
+	bls	.L755
 	ldrh	w2, [x23,3306]
 	ldrh	w1, [x23,2852]
 	cmp	w1, w2, lsr 1
-	bls	.L752
-.L753:
+	bls	.L754
+.L755:
 	mov	w1, 0
 	mov	w2, w21
 	bl	gc_add_sblk
-	cbz	w0, .L754
+	cbz	w0, .L756
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w27
-	bcs	.L752
-.L754:
+	bcs	.L754
+.L756:
 	sub	w25, w25, #1
 	uxth	w25, w25
-	cbnz	w25, .L755
-.L752:
+	cbnz	w25, .L757
+.L754:
 	cmp	w19, w22
 	add	x20, x20, :lo12:.LANCHOR0
-	bcs	.L756
+	bcs	.L758
 	ldrh	w0, [x20,3300]
 	ldrh	w1, [x20,2876]
 	cmp	w1, w0, lsr 1
-	bls	.L729
+	bls	.L731
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x20,2876]
-	b	.L729
-.L756:
+	b	.L731
+.L758:
 	ldrh	w1, [x20,3300]
 	ldrb	w0, [x20,3276]
 	ldrh	w2, [x20,2876]
 	mul	w0, w1, w0
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L729
+	bge	.L731
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x20,2876]
-.L729:
+.L731:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L757
+	tbz	x0, 8, .L759
 	adrp	x0, .LC91
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC91
@@ -4908,7 +4909,7 @@ gc_search_src_blk:
 	mov	w3, w19
 	mov	w4, w22
 	bl	printk
-.L757:
+.L759:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -4917,13 +4918,13 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp,80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L758:
+.L760:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w23, 64
 	mov	w26, 65535
 	uxth	w27, w22
 	strh	wzr, [x0,3296]
-.L743:
+.L745:
 	add	x25, x20, :lo12:.LANCHOR0
 	mov	w1, 3
 	ldrh	w28, [x25,3296]
@@ -4932,20 +4933,20 @@ gc_search_src_blk:
 	bl	zftl_get_gc_node
 	strh	w28, [x25,3296]
 	cmp	w26, w0, uxth
-	beq	.L736
+	beq	.L738
 	mov	w1, 0
 	mov	w2, w21
 	bl	gc_add_sblk
-	cbz	w0, .L742
+	cbz	w0, .L744
 	add	w19, w19, 1
 	uxth	w19, w19
 	cmp	w19, w27
-	bcs	.L736
-.L742:
+	bcs	.L738
+.L744:
 	sub	w23, w23, #1
 	uxth	w23, w23
-	cbnz	w23, .L743
-	b	.L736
+	cbnz	w23, .L745
+	b	.L738
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.align	2
 	.global	zftl_insert_free_list
@@ -4960,20 +4961,20 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0,2]
 	ands	w0, w0, 24
-	bne	.L812
+	bne	.L814
 	add	x0, x2, 3312
 	add	x2, x2, 2844
-	b	.L815
-.L812:
+	b	.L817
+.L814:
 	cmp	w0, 16
-	bne	.L814
+	bne	.L816
 	add	x0, x2, 3320
 	add	x2, x2, 2846
-	b	.L815
-.L814:
+	b	.L817
+.L816:
 	add	x0, x2, 3328
 	add	x2, x2, 2848
-.L815:
+.L817:
 	bl	_insert_free_list
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4992,24 +4993,24 @@ zftl_insert_data_list:
 	ldrb	w3, [x0,2]
 	and	w3, w3, 224
 	cmp	w3, 64
-	bne	.L817
+	bne	.L819
 	add	x0, x2, 616
 	add	x2, x2, 2850
-	b	.L820
-.L817:
+	b	.L822
+.L819:
 	cmp	w3, 96
-	bne	.L819
+	bne	.L821
 	add	x0, x2, 3288
 	add	x2, x2, 2852
-	b	.L820
-.L819:
+	b	.L822
+.L821:
 	cmp	w3, 160
-	bne	.L816
+	bne	.L818
 	add	x0, x2, 3280
 	add	x2, x2, 2854
-.L820:
+.L822:
 	bl	_insert_data_list
-.L816:
+.L818:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
@@ -5028,10 +5029,10 @@ zftl_gc_get_free_sblk:
 	uxth	w22, w1
 	ldr	x0, [x23,608]
 	ldrh	w19, [x0,588]
-	cbnz	w21, .L822
+	cbnz	w21, .L824
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L822
+	beq	.L824
 	adrp	x0, .LC92
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC92
@@ -5039,13 +5040,13 @@ zftl_gc_get_free_sblk:
 	ldr	x0, [x23,608]
 	mov	w1, -1
 	strh	w1, [x0,588]
-	b	.L823
-.L822:
+	b	.L825
+.L824:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w3, [x0,2846]
 	ldrh	w1, [x0,2848]
 	cmp	w3, w1
-	bls	.L824
+	bls	.L826
 	mov	w1, 0
 	mov	x2, x0
 	lsr	w3, w3, 3
@@ -5053,25 +5054,25 @@ zftl_gc_get_free_sblk:
 	csel	w1, w3, w1, ne
 	add	x0, x0, 3320
 	add	x2, x2, 2846
-	b	.L842
-.L824:
+	b	.L844
+.L826:
 	lsr	w1, w1, 2
-	cbz	w21, .L828
+	cbz	w21, .L830
 	mov	w1, 7
 	mul	w3, w3, w1
 	mov	w1, 8
 	sdiv	w3, w3, w1
 	uxth	w1, w3
-.L828:
+.L830:
 	add	x2, x20, :lo12:.LANCHOR0
 	add	x0, x2, 3328
 	add	x2, x2, 2848
-.L842:
+.L844:
 	bl	_list_pop_index_node
 	uxth	w19, w0
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L829
+	bne	.L831
 	add	x5, x20, :lo12:.LANCHOR0
 	adrp	x0, .LC93
 	add	x0, x0, :lo12:.LC93
@@ -5081,11 +5082,11 @@ zftl_gc_get_free_sblk:
 	ldrh	w4, [x5,2844]
 	ldrh	w5, [x5,2848]
 	bl	printk
-.L829:
-	cbz	w21, .L823
+.L831:
+	cbz	w21, .L825
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L823
+	tbz	x0, 8, .L825
 	add	x20, x20, :lo12:.LANCHOR0
 	uxtw	x6, w19
 	lsl	x0, x6, 2
@@ -5104,7 +5105,7 @@ zftl_gc_get_free_sblk:
 	ubfx	x3, x3, 3, 2
 	and	w5, w5, 2047
 	bl	printk
-.L823:
+.L825:
 	mov	w0, w19
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -5124,36 +5125,36 @@ zftl_get_free_sblk:
 	stp	x19, x20, [sp,16]
 	cmp	w21, 5
 	adrp	x19, .LANCHOR0
-	bne	.L844
+	bne	.L846
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x0,2846]
 	ldrh	w1, [x0,2848]
 	cmp	w2, w1
-	bcc	.L845
+	bcc	.L847
 	ldrh	w0, [x0,2844]
 	cmp	w0, w2
-	bls	.L846
-	cbz	w1, .L846
-.L845:
+	bls	.L848
+	cbz	w1, .L848
+.L847:
 	add	x2, x19, :lo12:.LANCHOR0
 	lsr	w1, w1, 1
 	add	x0, x2, 3328
-	b	.L874
-.L846:
+	b	.L876
+.L848:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	add	x0, x2, 3320
 	add	x2, x2, 2846
-	b	.L873
-.L844:
+	b	.L875
+.L846:
 	add	x22, x19, :lo12:.LANCHOR0
 	cmp	w21, 1
 	ldr	x0, [x22,608]
 	ldrh	w20, [x0,590]
-	beq	.L848
+	beq	.L850
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L848
+	beq	.L850
 	adrp	x0, .LC95
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC95
@@ -5161,28 +5162,28 @@ zftl_get_free_sblk:
 	ldr	x0, [x22,608]
 	mov	w1, -1
 	strh	w1, [x0,590]
-	b	.L849
-.L848:
+	b	.L851
+.L850:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x2,2844]
 	ldrh	w1, [x2,2848]
 	cmp	w0, w1
-	bcc	.L850
+	bcc	.L852
 	ldrh	w2, [x2,2846]
 	cmp	w2, w0
-	bls	.L851
-	cbz	w1, .L851
-.L850:
+	bls	.L853
+	cbz	w1, .L853
+.L852:
 	lsr	w1, w1, 1
 	cmp	w21, 1
 	csel	w3, w1, w3, eq
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x0, x2, 3328
 	mov	w1, w3
-.L874:
+.L876:
 	add	x2, x2, 2848
-	b	.L873
-.L851:
+	b	.L875
+.L853:
 	lsr	w0, w0, 1
 	cmp	w21, 1
 	csel	w3, w0, w3, eq
@@ -5190,13 +5191,13 @@ zftl_get_free_sblk:
 	add	x0, x2, 3312
 	mov	w1, w3
 	add	x2, x2, 2844
-.L873:
+.L875:
 	bl	_list_pop_index_node
 	uxth	w0, w0
 	mov	w20, w0
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L849
+	bne	.L851
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC93
 	add	x0, x0, :lo12:.LC93
@@ -5206,7 +5207,7 @@ zftl_get_free_sblk:
 	ldrh	w4, [x19,2844]
 	ldrh	w5, [x19,2848]
 	bl	printk
-.L849:
+.L851:
 	mov	w0, w20
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -5227,24 +5228,24 @@ zftl_remove_data_node:
 	ldrb	w3, [x0,2]
 	and	w3, w3, 224
 	cmp	w3, 64
-	bne	.L876
+	bne	.L878
 	add	x0, x2, 616
 	add	x2, x2, 2850
-	b	.L879
-.L876:
+	b	.L881
+.L878:
 	cmp	w3, 96
-	bne	.L878
+	bne	.L880
 	add	x0, x2, 3288
 	add	x2, x2, 2852
-	b	.L879
-.L878:
+	b	.L881
+.L880:
 	cmp	w3, 160
-	bne	.L875
+	bne	.L877
 	add	x0, x2, 3280
 	add	x2, x2, 2854
-.L879:
+.L881:
 	bl	_list_remove_node
-.L875:
+.L877:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
@@ -5261,20 +5262,20 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0,2]
 	ands	w0, w0, 24
-	bne	.L881
+	bne	.L883
 	add	x0, x2, 3312
 	add	x2, x2, 2844
-	b	.L884
-.L881:
+	b	.L886
+.L883:
 	cmp	w0, 16
-	bne	.L883
+	bne	.L885
 	add	x0, x2, 3320
 	add	x2, x2, 2846
-	b	.L884
-.L883:
+	b	.L886
+.L885:
 	add	x0, x2, 3328
 	add	x2, x2, 2848
-.L884:
+.L886:
 	bl	_list_remove_node
 	ldp	x29, x30, [sp], 16
 	ret
@@ -5293,24 +5294,24 @@ zftl_list_update_data_list:
 	ldrb	w3, [x0,2]
 	and	w3, w3, 224
 	cmp	w3, 64
-	bne	.L886
+	bne	.L888
 	add	x0, x2, 616
 	add	x2, x2, 2850
-	b	.L889
-.L886:
+	b	.L891
+.L888:
 	cmp	w3, 96
-	bne	.L888
+	bne	.L890
 	add	x0, x2, 3288
 	add	x2, x2, 2852
-	b	.L889
-.L888:
+	b	.L891
+.L890:
 	cmp	w3, 160
-	bne	.L885
+	bne	.L887
 	add	x0, x2, 3280
 	add	x2, x2, 2854
-.L889:
+.L891:
 	bl	_list_update_data_list
-.L885:
+.L887:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
@@ -5332,7 +5333,7 @@ print_list_info:
 	ldr	x1, [x19]
 	bl	printk
 	ldr	x19, [x19]
-	cbz	x19, .L890
+	cbz	x19, .L892
 	mov	x22, -6148914691236517206
 	adrp	x23, .LC97
 	mov	w20, 0
@@ -5341,7 +5342,7 @@ print_list_info:
 	add	x23, x23, :lo12:.LC97
 	mov	w26, 65535
 	mov	w24, 6
-.L893:
+.L895:
 	add	x21, x25, :lo12:.LANCHOR0
 	ldrh	w3, [x19]
 	ldrh	w4, [x19,2]
@@ -5372,7 +5373,7 @@ print_list_info:
 	bl	printk
 	ldrh	w19, [x19]
 	cmp	w19, w26
-	beq	.L890
+	beq	.L892
 	ldr	x0, [x21,528]
 	add	w20, w20, 1
 	umull	x19, w19, w24
@@ -5380,8 +5381,8 @@ print_list_info:
 	add	x19, x0, x19
 	ldrh	w0, [x21,3336]
 	cmp	w0, w20
-	bcs	.L893
-.L890:
+	bcs	.L895
+.L892:
 	sub	sp, x29, #32
 	ldp	x19, x20, [sp,48]
 	ldp	x21, x22, [sp,64]
@@ -5430,44 +5431,44 @@ ftl_tmp_into_update:
 	ldr	x0, [x0,#:lo12:.LANCHOR0+2864]
 	ldr	w2, [x0,16]
 	cmp	w2, 2048
-	bls	.L896
+	bls	.L898
 	lsr	w1, w2, 11
 	ldr	w3, [x0,20]
 	add	w3, w3, w1
 	sub	w1, w2, w1, lsl 11
 	str	w3, [x0,20]
 	str	w1, [x0,16]
-.L896:
+.L898:
 	ldr	w2, [x0,24]
 	cmp	w2, 2048
-	bls	.L897
+	bls	.L899
 	lsr	w1, w2, 11
 	ldr	w3, [x0,28]
 	add	w3, w3, w1
 	sub	w1, w2, w1, lsl 11
 	str	w3, [x0,28]
 	str	w1, [x0,24]
-.L897:
+.L899:
 	ldr	w2, [x0,32]
 	cmp	w2, 1024
-	bls	.L898
+	bls	.L900
 	lsr	w1, w2, 10
 	ldr	w3, [x0,36]
 	add	w3, w3, w1
 	sub	w1, w2, w1, lsl 10
 	str	w3, [x0,36]
 	str	w1, [x0,32]
-.L898:
+.L900:
 	ldr	w2, [x0,40]
 	cmp	w2, 1024
-	bls	.L895
+	bls	.L897
 	lsr	w1, w2, 10
 	ldr	w3, [x0,44]
 	add	w3, w3, w1
 	sub	w1, w2, w1, lsl 10
 	str	w3, [x0,44]
 	str	w1, [x0,40]
-.L895:
+.L897:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.align	2
@@ -5483,13 +5484,13 @@ ftl_get_blk_list_in_sblk:
 	ldrb	w11, [x2,3]
 	mov	w2, 0
 	mov	w6, w2
-.L901:
+.L903:
 	add	x8, x7, :lo12:.LANCHOR0
 	ldrb	w3, [x8,3276]
 	cmp	w6, w3
-	bge	.L907
+	bge	.L909
 	asr	w3, w11, w6
-	tbnz	x3, 0, .L902
+	tbnz	x3, 0, .L904
 	ldrb	w5, [x8,3338]
 	sbfiz	x10, x2, 1, 32
 	ldrh	w3, [x8,3340]
@@ -5501,28 +5502,28 @@ ftl_get_blk_list_in_sblk:
 	strh	w4, [x1,x10]
 	ldrb	w3, [x8,3338]
 	cmp	w3, 1
-	bls	.L903
+	bls	.L905
 	sub	w3, w3, #1
 	and	w3, w6, w3
 	add	w3, w4, w3
 	strh	w3, [x1,x10]
-.L903:
+.L905:
 	add	w2, w2, 1
-.L902:
+.L904:
 	add	w6, w6, 1
-	b	.L901
-.L907:
+	b	.L903
+.L909:
 	mov	w0, w2
 	mov	w4, -1
-.L905:
+.L907:
 	add	x3, x7, :lo12:.LANCHOR0
 	ldrb	w3, [x3,3276]
 	cmp	w2, w3
-	bge	.L908
+	bge	.L910
 	strh	w4, [x1,w2,sxtw 1]
 	add	w2, w2, 1
-	b	.L905
-.L908:
+	b	.L907
+.L910:
 	ret
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.align	2
@@ -5542,7 +5543,7 @@ ftl_free_sblk:
 	ldr	x7, [x3,584]
 	add	x20, x7, x19
 	ldrb	w2, [x20,2]
-	tbz	x2, 3, .L911
+	tbz	x2, 3, .L913
 	ldr	x6, [x3,2864]
 	ldrh	w4, [x7,x19]
 	ldrh	w10, [x3,3342]
@@ -5559,14 +5560,14 @@ ftl_free_sblk:
 	udiv	w6, w8, w4
 	add	w6, w0, w6
 	cmp	w6, w10
-	ble	.L912
+	ble	.L914
 	ldrh	w0, [x3,2846]
 	ldrh	w6, [x3,2854]
 	add	w6, w6, w0
 	ldrh	w0, [x3,3308]
 	add	w0, w0, 8
 	cmp	w6, w0
-	blt	.L928
+	blt	.L930
 	ldrh	w0, [x3,2844]
 	ldrh	w6, [x3,2850]
 	add	w6, w6, w0
@@ -5575,13 +5576,13 @@ ftl_free_sblk:
 	ldrh	w0, [x3,3344]
 	add	w0, w0, 8
 	cmp	w6, w0
-	bge	.L928
-	b	.L917
-.L912:
+	bge	.L930
+	b	.L919
+.L914:
 	madd	w0, w0, w4, w8
 	ldrh	w6, [x3,3346]
 	cmp	w0, w6
-	ble	.L914
+	ble	.L916
 	ldrh	w0, [x3,2844]
 	ldrh	w6, [x3,2850]
 	add	w6, w6, w0
@@ -5590,26 +5591,26 @@ ftl_free_sblk:
 	ldrh	w0, [x3,3344]
 	add	w0, w0, 8
 	cmp	w6, w0
-	blt	.L917
+	blt	.L919
 	ldrh	w0, [x3,2846]
 	ldrh	w6, [x3,2854]
 	add	w6, w6, w0
 	ldrh	w0, [x3,3308]
 	add	w0, w0, 8
 	cmp	w6, w0
-	bge	.L917
-.L928:
+	bge	.L919
+.L930:
 	mov	w0, 2
 	bfi	w2, w0, 3, 2
-	b	.L926
-.L917:
+	b	.L928
+.L919:
 	and	w2, w2, -25
-.L926:
+.L928:
 	strb	w2, [x20,2]
-.L914:
+.L916:
 	ldrb	w0, [x20,2]
 	ands	w0, w0, 24
-	bne	.L918
+	bne	.L920
 	mul	w4, w9, w4
 	ldrh	w0, [x7,x19]
 	add	w4, w4, w4, lsl 1
@@ -5617,10 +5618,10 @@ ftl_free_sblk:
 	ubfx	x5, x4, 2, 9
 	bfi	w0, w5, 0, 11
 	strh	w0, [x7,x19]
-	b	.L911
-.L918:
+	b	.L913
+.L920:
 	cmp	w0, 16
-	bne	.L911
+	bne	.L913
 	sdiv	w4, w5, w4
 	ldr	w0, [x7,x19]
 	add	w4, w4, w4, lsl 1
@@ -5628,7 +5629,7 @@ ftl_free_sblk:
 	ubfx	x4, x4, 2, 6
 	bfi	w0, w4, 11, 8
 	str	w0, [x7,x19]
-.L911:
+.L913:
 	mov	w0, w1
 	str	x1, [x29,56]
 	bl	zftl_remove_data_node
@@ -5642,41 +5643,41 @@ ftl_free_sblk:
 	ldr	x2, [x0,600]
 	strh	wzr, [x2,x22,lsl 1]
 	ldrb	w2, [x20,2]
-	tbz	x2, 3, .L920
+	tbz	x2, 3, .L922
 	ldr	x2, [x0,608]
 	ldrh	w0, [x2,584]
 	cmp	w0, w1
-	bne	.L921
+	bne	.L923
 	mov	w0, -1
 	ldrh	w3, [x2,588]
 	strh	w0, [x2,584]
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L921
+	bne	.L922
 	adrp	x0, .LC98
 	strh	w1, [x2,588]
 	add	x0, x0, :lo12:.LC98
-	b	.L927
-.L921:
+	b	.L929
+.L923:
 	ldrh	w0, [x2,586]
 	cmp	w0, w1
-	bne	.L920
+	bne	.L922
 	mov	w0, -1
 	ldrh	w3, [x2,590]
 	strh	w0, [x2,586]
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L920
+	bne	.L922
 	adrp	x0, .LC99
 	strh	w1, [x2,590]
 	add	x0, x0, :lo12:.LC99
-.L927:
+.L929:
 	bl	printk
-	b	.L909
-.L920:
+	b	.L911
+.L922:
 	mov	w0, w1
 	bl	zftl_insert_free_list
-.L909:
+.L911:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 64
@@ -5699,129 +5700,129 @@ gc_free_src_blk:
 	mov	w20, 0
 	add	x24, x23, 2896
 	add	x21, x21, 1352
-.L930:
+.L932:
 	ldrh	w0, [x24,56]
 	adrp	x25, .LANCHOR0
 	cmp	w0, w20
-	bls	.L968
+	bls	.L970
 	add	x0, x24, x20, sxtw 1
 	ldrh	w22, [x0,58]
 	ldr	x0, [x23,600]
 	lsl	x26, x22, 1
 	mov	x19, x22
 	ldrh	w2, [x0,x26]
-	cbz	w2, .L931
+	cbz	w2, .L933
 	adrp	x0, .LC100
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC100
 	bl	printk
-.L931:
+.L933:
 	add	x0, x25, :lo12:.LANCHOR0
 	ldr	x1, [x0,600]
 	strh	wzr, [x1,x26]
 	ldr	x1, [x0,600]
 	ldrh	w1, [x1,x26]
-	cbnz	w1, .L932
+	cbnz	w1, .L934
 	ldr	x0, [x0,584]
 	add	x22, x0, x22, lsl 2
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L933
+	tbz	x0, 8, .L935
 	ldrb	w2, [x22,2]
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
 	mov	w1, w19
 	ubfx	x2, x2, 5, 3
 	bl	printk
-.L933:
+.L935:
 	ldrb	w0, [x22,2]
 	tst	w0, 192
-	beq	.L946
+	beq	.L948
 	and	w0, w0, 224
 	cmp	w0, 224
-	bne	.L934
-.L946:
+	bne	.L936
+.L948:
 	adrp	x0, .LC0
 	mov	x1, x21
-	mov	w2, 798
+	mov	w2, 799
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L934:
+.L936:
 	mov	w0, w19
 	add	x25, x25, :lo12:.LANCHOR0
 	bl	ftl_free_sblk
 	ldr	x2, [x25,608]
 	ldrh	w1, [x2,124]
-	cbz	w1, .L936
+	cbz	w1, .L938
 	mov	x0, 0
-.L938:
+.L940:
 	add	x4, x2, x0, lsl 1
 	mov	w3, w0
 	ldrh	w4, [x4,392]
 	cmp	w4, w19
-	bne	.L937
+	bne	.L939
 	add	x0, x2, x3, sxtw 1
 	mov	w3, -1
 	strh	w3, [x0,392]
 	sub	w1, w1, #1
 	strh	w1, [x2,124]
-	b	.L936
-.L937:
+	b	.L938
+.L939:
 	add	x0, x0, 1
 	cmp	x0, 64
-	bne	.L938
-.L936:
+	bne	.L940
+.L938:
 	ldrh	w1, [x2,120]
-	cbz	w1, .L939
+	cbz	w1, .L941
 	mov	x0, 0
-.L941:
+.L943:
 	add	x4, x2, x0, lsl 1
 	mov	w3, w0
 	ldrh	w4, [x4,136]
 	cmp	w4, w19
-	bne	.L940
+	bne	.L942
 	add	x0, x2, x3, sxtw 1
 	mov	w3, -1
 	strh	w3, [x0,136]
 	sub	w1, w1, #1
 	strh	w1, [x2,120]
-	b	.L939
-.L940:
+	b	.L941
+.L942:
 	add	x0, x0, 1
 	cmp	x0, 64
-	bne	.L941
-.L939:
+	bne	.L943
+.L941:
 	ldrh	w1, [x2,122]
-	cbz	w1, .L942
+	cbz	w1, .L944
 	mov	x0, 0
-.L944:
+.L946:
 	add	x4, x2, x0, lsl 1
 	mov	w3, w0
 	ldrh	w4, [x4,264]
 	cmp	w4, w19
-	bne	.L943
+	bne	.L945
 	add	x0, x2, x3, sxtw 1
 	mov	w3, -1
 	strh	w3, [x0,264]
 	sub	w1, w1, #1
 	strh	w1, [x2,122]
-	b	.L942
-.L943:
+	b	.L944
+.L945:
 	add	x0, x0, 1
 	cmp	x0, 64
-	bne	.L944
-	b	.L942
-.L932:
+	bne	.L946
+	b	.L944
+.L934:
 	mov	w0, w19
 	mov	w1, 1
 	mov	w2, 0
 	bl	gc_add_sblk
-.L942:
+.L944:
 	add	w20, w20, 1
 	uxth	w20, w20
-	b	.L930
-.L968:
+	b	.L932
+.L970:
 	strh	wzr, [x24,56]
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -5853,14 +5854,14 @@ ftl_erase_phy_blk:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	sxth	w19, w19
-	cbz	w0, .L970
+	cbz	w0, .L972
 	ldrh	w2, [x5,3350]
 	cmp	w1, wzr
 	mov	w0, w22
 	cset	w1, eq
 	mul	w2, w19, w2
 	bl	flash_erase_block_en
-.L970:
+.L972:
 	add	x3, x20, :lo12:.LANCHOR0
 	mov	w1, w21
 	mov	w0, w22
@@ -5891,11 +5892,11 @@ ftl_erase_sblk:
 	mov	w19, 0
 	add	x0, x0, x20
 	ldrb	w25, [x0,3]
-.L975:
+.L977:
 	add	x2, x23, :lo12:.LANCHOR0
 	ldrb	w0, [x2,3352]
 	cmp	w19, w0
-	bge	.L986
+	bge	.L988
 	ldrb	w3, [x2,3338]
 	mov	w21, 0
 	ldrh	w2, [x2,3350]
@@ -5903,75 +5904,75 @@ ftl_erase_sblk:
 	sub	w4, w3, #1
 	mul	w6, w19, w3
 	mul	w5, w24, w3
-.L987:
+.L989:
 	cmp	w1, w3
-	bge	.L1000
+	bge	.L1002
 	add	w0, w1, w6
 	asr	w0, w25, w0
-	tbnz	x0, 0, .L976
+	tbnz	x0, 0, .L978
 	and	w0, w1, w4
 	add	x7, x29, 80
 	add	w0, w5, w0
 	mul	w0, w0, w2
 	str	w0, [x7,w21,sxtw 2]
 	add	w21, w21, 1
-.L976:
+.L978:
 	add	w1, w1, 1
-	b	.L987
-.L1000:
+	b	.L989
+.L1002:
 	cmp	w3, 4
-	bne	.L999
+	bne	.L1001
 	mov	x26, 0
-.L978:
+.L980:
 	cmp	w21, w26
-	ble	.L981
+	ble	.L983
 	add	x2, x29, 80
 	mov	w0, w19
 	mov	w1, w22
 	ldr	w2, [x2,x26,lsl 2]
 	add	x26, x26, 1
 	bl	flash_erase_block_en
-	b	.L978
-.L999:
+	b	.L980
+.L1001:
 	cmp	w21, 2
-	bne	.L982
+	bne	.L984
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrb	w0, [x0,3348]
-	cbz	w0, .L983
+	cbz	w0, .L985
 	cmp	w22, wzr
 	ldr	w2, [x29,80]
 	ldr	w3, [x29,84]
 	mov	w0, w19
 	cset	w1, eq
 	bl	flash_erase_duplane_block
-.L983:
+.L985:
 	ldr	w2, [x29,80]
 	mov	w0, w19
 	ldr	w3, [x29,84]
 	mov	w1, w22
 	bl	flash_erase_duplane_block
-	b	.L981
-.L982:
+	b	.L983
+.L984:
 	cmp	w21, 1
-	bne	.L981
+	bne	.L983
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrb	w0, [x0,3348]
-	cbz	w0, .L985
+	cbz	w0, .L987
 	cmp	w22, wzr
 	ldr	w2, [x29,80]
 	mov	w0, w19
 	cset	w1, eq
 	bl	flash_erase_block_en
-.L985:
+.L987:
 	ldr	w2, [x29,80]
 	mov	w0, w19
 	mov	w1, w22
 	bl	flash_erase_block_en
-.L981:
+.L983:
 	add	w19, w19, 1
-	b	.L975
-.L986:
-	cbnz	w22, .L988
+	b	.L977
+.L988:
+	cbnz	w22, .L990
 	ldr	x1, [x2,584]
 	ldrh	w0, [x1,x20]
 	add	w3, w0, 1
@@ -5987,10 +5988,10 @@ ftl_erase_sblk:
 	ubfx	x1, x1, 0, 11
 	uxth	w2, w1
 	cmp	w3, w2
-	bge	.L990
+	bge	.L992
 	strh	w1, [x0,96]
-	b	.L990
-.L988:
+	b	.L992
+.L990:
 	ldr	x3, [x2,584]
 	ldr	w0, [x3,x20]
 	ubfx	x1, x0, 11, 8
@@ -6006,9 +6007,9 @@ ftl_erase_sblk:
 	ldr	w1, [x1,x20]
 	ubfx	x1, x1, 11, 8
 	cmp	w2, w1, uxtb
-	bcs	.L990
+	bcs	.L992
 	strh	w1, [x0,98]
-.L990:
+.L992:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -6030,39 +6031,39 @@ ftl_alloc_sys_blk:
 	ldr	x1, [x1,2864]
 	ldrh	w2, [x1,136]
 	cmp	w2, 63
-	bls	.L1002
+	bls	.L1004
 	strh	wzr, [x1,136]
-.L1002:
+.L1004:
 	ldrh	w0, [x1,112]
-	cbnz	w0, .L1003
+	cbnz	w0, .L1005
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1118
+	mov	w2, 1117
 	add	x1, x1, 1368
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1003:
+.L1005:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w4, 65535
 	ldr	x1, [x0,2864]
-.L1007:
+.L1009:
 	ldrh	w2, [x1,136]
-.L1004:
+.L1006:
 	cmp	w2, 63
-	bgt	.L1010
+	bgt	.L1012
 	sxtw	x3, w2
 	add	x3, x3, 80
 	ldrh	w0, [x1,x3,lsl 1]
 	cmp	w0, w4
-	bne	.L1009
+	bne	.L1011
 	add	w2, w2, 1
-	b	.L1004
-.L1010:
+	b	.L1006
+.L1012:
 	strh	wzr, [x1,136]
-	b	.L1007
-.L1009:
+	b	.L1009
+.L1011:
 	mov	w4, -1
 	strh	w4, [x1,x3,lsl 1]
 	strh	w2, [x1,136]
@@ -6087,34 +6088,34 @@ ftl_free_sys_blk:
 	ldr	x2, [x0,2864]
 	ldrh	w0, [x2,138]
 	cmp	w0, 63
-	bls	.L1012
+	bls	.L1014
 	strh	wzr, [x2,138]
-.L1012:
+.L1014:
 	ldrh	w0, [x2,112]
 	cmp	w0, 63
-	bls	.L1013
+	bls	.L1015
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1142
+	mov	w2, 1141
 	add	x1, x1, 1392
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1013:
+.L1015:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldr	x1, [x1,2864]
-.L1017:
+.L1019:
 	ldrh	w2, [x1,138]
-.L1014:
+.L1016:
 	cmp	w2, 63
-	bgt	.L1019
+	bgt	.L1021
 	sxtw	x3, w2
 	add	x3, x3, 80
 	ldrh	w4, [x1,x3,lsl 1]
 	cmp	w4, w0
-	bne	.L1015
+	bne	.L1017
 	strh	w20, [x1,x3,lsl 1]
 	strh	w2, [x1,138]
 	ldrh	w0, [x1,112]
@@ -6123,12 +6124,12 @@ ftl_free_sys_blk:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1015:
+.L1017:
 	add	w2, w2, 1
-	b	.L1014
-.L1019:
+	b	.L1016
+.L1021:
 	strh	wzr, [x1,138]
-	b	.L1017
+	b	.L1019
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.align	2
 	.global	ftl_info_data_recovery
@@ -6142,7 +6143,7 @@ ftl_info_data_recovery:
 	str	x23, [sp,48]
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1020
+	beq	.L1022
 	adrp	x19, .LANCHOR0
 	ubfiz	x20, x2, 2, 16
 	add	x23, x19, :lo12:.LANCHOR0
@@ -6150,36 +6151,36 @@ ftl_info_data_recovery:
 	add	x22, x21, x20
 	ldrb	w1, [x22,2]
 	tst	w1, 224
-	bne	.L1020
+	bne	.L1022
 	ldrb	w0, [x0,4]
 	bfi	w1, w0, 5, 3
 	mov	w0, w2
 	strb	w1, [x22,2]
 	bl	zftl_remove_free_node
 	ldrb	w0, [x22,2]
-	tbz	x0, 3, .L1024
+	tbz	x0, 3, .L1026
 	ldr	x1, [x23,2864]
 	ldrh	w0, [x1,116]
 	sub	w0, w0, #1
 	strh	w0, [x1,116]
-	b	.L1025
-.L1024:
+	b	.L1027
+.L1026:
 	tst	w0, 24
 	ldr	x1, [x23,2864]
-	bne	.L1026
+	bne	.L1028
 	ldrh	w0, [x1,114]
 	sub	w0, w0, #1
 	strh	w0, [x1,114]
-	b	.L1025
-.L1026:
+	b	.L1027
+.L1028:
 	ldrh	w0, [x1,118]
 	sub	w0, w0, #1
 	strh	w0, [x1,118]
-.L1025:
+.L1027:
 	ldrb	w0, [x22,2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1027
+	bne	.L1029
 	ldr	w0, [x21,x20]
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfx	x1, x0, 11, 8
@@ -6190,29 +6191,29 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1,120]
 	sub	w0, w0, #1
 	strh	w0, [x1,120]
-	b	.L1020
-.L1027:
+	b	.L1022
+.L1029:
 	ldrh	w1, [x21,x20]
 	cmp	w0, 64
 	add	w2, w1, 1
 	bfi	w1, w2, 0, 11
 	strh	w1, [x21,x20]
-	bne	.L1028
+	bne	.L1030
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldrh	w0, [x1,122]
 	sub	w0, w0, #1
 	strh	w0, [x1,122]
-	b	.L1020
-.L1028:
+	b	.L1022
+.L1030:
 	cmp	w0, 96
-	bne	.L1020
+	bne	.L1022
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldrh	w0, [x1,124]
 	sub	w0, w0, #1
 	strh	w0, [x1,124]
-.L1020:
+.L1022:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -6236,14 +6237,14 @@ ftl_get_ppa_from_index:
 	ldrb	w4, [x4,3276]
 	mul	w0, w0, w4
 	cmp	w1, w0
-	bge	.L1030
+	bge	.L1032
 	add	x3, x3, 16
-	b	.L1031
-.L1030:
+	b	.L1033
+.L1032:
 	sub	w1, w1, w0
 	add	x3, x3, 48
 	uxth	w1, w1
-.L1031:
+.L1033:
 	ldrb	w2, [x3,9]
 	mov	w0, 65535
 	sdiv	w20, w1, w2
@@ -6251,16 +6252,16 @@ ftl_get_ppa_from_index:
 	add	x1, x3, x1, uxth 1
 	ldrh	w21, [x1,16]
 	cmp	w21, w0
-	bne	.L1032
+	bne	.L1034
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1529
+	mov	w2, 1528
 	add	x1, x1, 1416
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1032:
+.L1034:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x2,3350]
 	madd	w0, w21, w0, w20
@@ -6282,22 +6283,22 @@ lpa_hash_get_ppa:
 	ldrh	w2, [x2,3360]
 	ldr	x4, [x1,3872]
 	ldr	x5, [x1,3880]
-.L1034:
+.L1036:
 	cmp	w2, w3
-	beq	.L1038
+	beq	.L1040
 	uxtw	x1, w2
 	ldr	w6, [x4,x1,lsl 2]
 	cmp	w6, w0
-	bne	.L1035
+	bne	.L1037
 	mov	w0, w2
 	bl	ftl_get_ppa_from_index
-	b	.L1036
-.L1035:
+	b	.L1038
+.L1037:
 	ldrh	w2, [x5,x1,lsl 1]
-	b	.L1034
-.L1038:
+	b	.L1036
+.L1040:
 	mov	w0, -1
-.L1036:
+.L1038:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
@@ -6312,67 +6313,67 @@ ftl_get_new_free_page:
 	ldrh	w1, [x0]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1040
+	bne	.L1042
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1644
+	mov	w2, 1643
 	add	x1, x1, 1440
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1040:
+.L1042:
 	adrp	x20, .LANCHOR0
 	ldrh	w1, [x19,2]
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0,3300]
 	cmp	w1, w0
-	bne	.L1041
+	bne	.L1043
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1645
+	mov	w2, 1644
 	add	x1, x1, 1440
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1041:
+.L1043:
 	ldrh	w0, [x19,6]
-	cbnz	w0, .L1042
+	cbnz	w0, .L1044
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1646
+	mov	w2, 1645
 	add	x1, x1, 1440
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1042:
+.L1044:
 	ldrb	w0, [x19,5]
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x0, 8
 	ldrb	w2, [x1,3276]
 	mov	w1, 65535
 	ldrh	w0, [x19,x0,lsl 1]
-.L1043:
+.L1045:
 	cmp	w0, w1
-	bne	.L1047
+	bne	.L1049
 	ldrb	w0, [x19,5]
 	add	w0, w0, 1
 	uxtb	w0, w0
 	strb	w0, [x19,5]
 	cmp	w0, w2
-	bne	.L1044
+	bne	.L1046
 	ldrh	w0, [x19,2]
 	strb	wzr, [x19,5]
 	add	w0, w0, 1
 	strh	w0, [x19,2]
-.L1044:
+.L1046:
 	ldrb	w0, [x19,5]
 	add	x0, x0, 8
 	ldrh	w0, [x19,x0,lsl 1]
-	b	.L1043
-.L1047:
+	b	.L1045
+.L1049:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x19,2]
 	ldrh	w1, [x20,3350]
@@ -6390,11 +6391,11 @@ ftl_get_new_free_page:
 	uxtb	w1, w1
 	strb	w1, [x19,5]
 	cmp	w3, w1
-	bne	.L1046
+	bne	.L1048
 	add	w2, w2, 1
 	strb	wzr, [x19,5]
 	strh	w2, [x19,2]
-.L1046:
+.L1048:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6412,16 +6413,16 @@ ftl_ext_alloc_new_blk:
 	mov	w1, 65533
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1049
+	bcs	.L1051
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 1677
+	mov	w2, 1676
 	add	x1, x1, 1464
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1049:
+.L1051:
 	adrp	x19, .LANCHOR0
 	mov	w1, 0
 	add	x19, x19, :lo12:.LANCHOR0
@@ -6445,13 +6446,13 @@ ftl_total_vpn_update:
 	adrp	x1, .LANCHOR0
 	add	x3, x1, :lo12:.LANCHOR0
 	ldrh	w2, [x3,3888]
-	cbnz	w0, .L1051
+	cbnz	w0, .L1053
 	cmp	w2, 4
-	bhi	.L1051
+	bhi	.L1053
 	add	w2, w2, 1
 	strh	w2, [x3,3888]
-	b	.L1050
-.L1051:
+	b	.L1052
+.L1053:
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w9, 65535
 	strh	wzr, [x0,3888]
@@ -6461,35 +6462,35 @@ ftl_total_vpn_update:
 	mov	x0, 0
 	mov	w2, w0
 	mov	w3, w0
-.L1053:
+.L1055:
 	cmp	w6, w0, uxth
-	bls	.L1061
+	bls	.L1063
 	ldrh	w4, [x7,x0,lsl 1]
 	cmp	w4, w9
-	beq	.L1054
+	beq	.L1056
 	add	x5, x8, x0, lsl 2
 	ldrb	w5, [x5,2]
 	and	w5, w5, 224
 	cmp	w5, 160
-	bne	.L1055
+	bne	.L1057
 	add	w2, w2, w4
-	b	.L1054
-.L1055:
+	b	.L1056
+.L1057:
 	add	w3, w3, w4
-.L1054:
+.L1056:
 	add	x0, x0, 1
-	b	.L1053
-.L1061:
+	b	.L1055
+.L1063:
 	add	x1, x1, :lo12:.LANCHOR0
 	ldr	x0, [x1,608]
 	ldr	x1, [x1,2864]
 	str	w3, [x0,524]
 	str	w2, [x0,528]
 	ldrh	w1, [x1,120]
-	cbz	w1, .L1050
+	cbz	w1, .L1052
 	udiv	w2, w2, w1
 	str	w2, [x0,532]
-.L1050:
+.L1052:
 	ret
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.align	2
@@ -6515,10 +6516,10 @@ ftl_vpn_update:
 	ldr	x0, [x1,600]
 	ldrh	w2, [x0,x19]
 	mov	w0, 0
-	cbnz	w2, .L1064
+	cbnz	w2, .L1066
 	mov	w0, 1
 	str	w0, [x1,2884]
-.L1064:
+.L1066:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6534,34 +6535,34 @@ ftl_vpn_decrement:
 	str	x19, [sp,16]
 	cmp	w1, w0
 	adrp	x2, .LANCHOR0
-	beq	.L1067
+	beq	.L1069
 	add	x0, x2, :lo12:.LANCHOR0
 	ubfiz	x3, x1, 1, 16
 	ldr	x0, [x0,600]
 	ldrh	w19, [x0,x3]
-	cbnz	w19, .L1068
+	cbnz	w19, .L1070
 	adrp	x0, .LC102
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC102
 	bl	printk
-	b	.L1074
-.L1068:
+	b	.L1076
+.L1070:
 	sub	w19, w19, #1
 	strh	w19, [x0,x3]
-.L1067:
+.L1069:
 	add	x19, x2, :lo12:.LANCHOR0
 	mov	w0, 0
 	ldrh	w2, [x19,3224]
 	cmp	w2, w1
-	beq	.L1069
+	beq	.L1071
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1070
+	bne	.L1072
 	strh	w1, [x19,3224]
-.L1074:
+.L1076:
 	mov	w0, 0
-	b	.L1069
-.L1070:
+	b	.L1071
+.L1072:
 	mov	w0, w2
 	str	x1, [x29,40]
 	bl	ftl_vpn_update
@@ -6578,7 +6579,7 @@ ftl_vpn_decrement:
 	strh	w3, [x19,3890]
 	add	x3, x19, x3, uxth 1
 	strh	w2, [x3,3232]
-.L1069:
+.L1071:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -6599,42 +6600,42 @@ lpa_hash_update_ppa:
 	mov	w6, 65535
 	ldrh	w4, [x4,w5,sxtw 1]
 	mov	w11, w6
-.L1076:
+.L1078:
 	cmp	w4, w11
-	beq	.L1080
+	beq	.L1082
 	uxtw	x9, w4
 	uxth	x7, w4
 	lsl	x10, x9, 2
 	add	x13, x8, x10
 	ldr	w10, [x8,x10]
 	cmp	w10, w0
-	bne	.L1077
+	bne	.L1079
 	mov	w4, -1
 	str	w4, [x13]
 	mov	w4, 65535
 	cmp	w6, w4
 	add	x4, x3, :lo12:.LANCHOR0
-	bne	.L1078
+	bne	.L1080
 	ldr	x6, [x4,3880]
 	add	x4, x4, 3360
 	ldrh	w6, [x6,x7,lsl 1]
 	strh	w6, [x4,w5,sxtw 1]
-	b	.L1079
-.L1078:
+	b	.L1081
+.L1080:
 	ldr	x4, [x4,3880]
 	ldrh	w8, [x4,x7,lsl 1]
 	strh	w8, [x4,w6,uxtw 1]
-.L1079:
+.L1081:
 	add	x4, x3, :lo12:.LANCHOR0
 	mov	w6, -1
 	ldr	x4, [x4,3880]
 	strh	w6, [x4,x7,lsl 1]
-	b	.L1080
-.L1077:
+	b	.L1082
+.L1079:
 	mov	w6, w4
 	ldrh	w4, [x12,x9,lsl 1]
-	b	.L1076
-.L1080:
+	b	.L1078
+.L1082:
 	add	x3, x3, :lo12:.LANCHOR0
 	uxtw	x4, w2
 	cmn	w1, #1
@@ -6645,7 +6646,7 @@ lpa_hash_update_ppa:
 	strh	w2, [x0,w5,sxtw 1]
 	ldr	x0, [x3,3880]
 	strh	w6, [x0,x4,lsl 1]
-	beq	.L1082
+	beq	.L1084
 	ldrh	w0, [x3,3340]
 	mov	w2, 21
 	mov	w4, 1
@@ -6657,7 +6658,7 @@ lpa_hash_update_ppa:
 	and	w1, w2, w1
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
-.L1082:
+.L1084:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
@@ -6687,17 +6688,17 @@ ftl_mask_bad_block:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	uxth	w20, w2
-	tbz	x0, 14, .L1087
+	tbz	x0, 14, .L1089
 	adrp	x0, .LC103
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC103
 	mov	w2, w20
 	bl	printk
-.L1087:
+.L1089:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0,576]
 	cmp	w1, w20
-	bls	.L1086
+	bls	.L1088
 	ldr	x0, [x0,584]
 	add	x20, x0, x20, uxth 2
 	mov	w0, 1
@@ -6705,7 +6706,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x20,3]
 	orr	w1, w1, w0
 	strb	w1, [x20,3]
-.L1086:
+.L1088:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -6793,47 +6794,47 @@ ftl_write_buf:
 	stp	x19, x20, [sp,16]
 	str	x21, [sp,32]
 	mov	x20, x0
-	cbnz	x0, .L1094
+	cbnz	x0, .L1096
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 661
+	mov	w2, 662
 	add	x1, x1, 1488
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
 	bl	print_ftl_debug_info
 	mov	w0, -1
-	b	.L1103
-.L1094:
+	b	.L1105
+.L1096:
 	adrp	x19, .LANCHOR0
 	ldrb	w1, [x20,56]
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w1, w0
-	bls	.L1099
+	bls	.L1101
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 666
+	mov	w2, 667
 	add	x1, x1, 1488
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1099:
+.L1101:
 	ldrb	w0, [x20,56]
-	cbz	w0, .L1096
+	cbz	w0, .L1098
 	add	x21, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x21,2832]
 	cmp	w1, w0
-	bcs	.L1097
-.L1096:
+	bcs	.L1099
+.L1098:
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	buf_free
 	ldrb	w0, [x19,2856]
-	b	.L1103
-.L1097:
+	b	.L1105
+.L1099:
 	add	x0, x21, 2888
 	mov	x1, x20
 	bl	buf_add_tail
@@ -6850,7 +6851,7 @@ ftl_write_buf:
 	add	w1, w1, 1
 	str	w1, [x0,32]
 	mov	w0, w2
-.L1103:
+.L1105:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -6873,10 +6874,10 @@ ftl_write_completed:
 	mov	w23, 21
 	mov	w24, 1
 	add	x21, x21, :lo12:.LC109
-.L1105:
+.L1107:
 	ldrb	w0, [x19,3892]
 	cmp	w0, 255
-	beq	.L1112
+	beq	.L1114
 	sbfiz	x0, x0, 6, 32
 	add	x20, x22, x0
 	add	x4, x20, 32
@@ -6884,7 +6885,7 @@ ftl_write_completed:
 	strb	w0, [x19,3892]
 	ldr	w0, [x20,52]
 	cmn	w0, #1
-	bne	.L1106
+	bne	.L1108
 	ldrh	w2, [x19,3340]
 	mov	x0, x21
 	ldr	w3, [x4,8]
@@ -6909,33 +6910,33 @@ ftl_write_completed:
 	str	w1, [x0,556]
 	ldrh	w1, [x0,16]
 	cmp	w1, w25
-	bne	.L1107
+	bne	.L1109
 	strh	wzr, [x0,22]
-	b	.L1108
-.L1107:
+	b	.L1110
+.L1109:
 	ldrh	w1, [x0,48]
 	cmp	w1, w25
-	bne	.L1108
+	bne	.L1110
 	strh	wzr, [x0,54]
-.L1108:
+.L1110:
 	mov	x0, x20
 	bl	ftl_write_buf
-	b	.L1105
-.L1106:
+	b	.L1107
+.L1108:
 	ldr	w0, [x4,4]
 	ldr	w1, [x4,12]
 	ldrh	w2, [x20,48]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x20,2]
-	tbz	x0, 2, .L1110
+	tbz	x0, 2, .L1112
 	and	w0, w0, -3
 	strb	w0, [x20,2]
-	b	.L1105
-.L1110:
+	b	.L1107
+.L1112:
 	mov	x0, x20
 	bl	buf_free
-	b	.L1105
-.L1112:
+	b	.L1107
+.L1114:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -6951,33 +6952,33 @@ zftl_add_read_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	mov	x20, x0
-	cbnz	x0, .L1114
+	cbnz	x0, .L1116
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 948
+	mov	w2, 949
 	add	x1, x1, 1504
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
 	bl	print_ftl_debug_info
-	b	.L1113
-.L1114:
+	b	.L1115
+.L1116:
 	adrp	x19, .LANCHOR0
 	ldrb	w1, [x20,56]
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w1, w0
-	bls	.L1117
+	bls	.L1119
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, 1504
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1117:
+.L1119:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	x1, x20
 	add	x0, x19, 3893
@@ -6985,7 +6986,7 @@ zftl_add_read_buf:
 	ldrb	w0, [x19,3894]
 	add	w0, w0, 1
 	strb	w0, [x19,3894]
-.L1113:
+.L1115:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -7010,13 +7011,13 @@ ftl_alloc_sblk:
 	uxth	w19, w0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1120
+	beq	.L1122
 	adrp	x0, .LANCHOR0+584
 	ldr	x21, [x0,#:lo12:.LANCHOR0+584]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21,2]
 	tst	w0, 224
-	beq	.L1121
+	beq	.L1123
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR1
@@ -7025,15 +7026,15 @@ ftl_alloc_sblk:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1121:
+.L1123:
 	ldrb	w1, [x21,2]
 	bfi	w1, w20, 5, 3
 	ubfx	x2, x1, 3, 2
 	orr	w0, w22, w2
 	bfi	w1, w0, 3, 2
 	strb	w1, [x21,2]
-	b	.L1127
-.L1120:
+	b	.L1129
+.L1122:
 	adrp	x21, .LC110
 	bl	print_ftl_debug_info
 	add	x21, x21, :lo12:.LC110
@@ -7058,7 +7059,7 @@ ftl_alloc_sblk:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1127:
+.L1129:
 	mov	w0, w19
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -7096,13 +7097,13 @@ dump_sblk_queue:
 	bl	printk
 	ldrb	w19, [x20,2835]
 	cmp	w19, 255
-	beq	.L1129
+	beq	.L1131
 	add	x20, x20, 784
 	sbfiz	x19, x19, 6, 32
 	adrp	x21, .LC112
 	add	x19, x20, x19
 	add	x21, x21, :lo12:.LC112
-.L1131:
+.L1133:
 	ldrb	w1, [x19,1]
 	mov	x0, x21
 	ldrb	w2, [x19,58]
@@ -7110,11 +7111,11 @@ dump_sblk_queue:
 	bl	printk
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1129
+	beq	.L1131
 	sbfiz	x19, x19, 6, 32
 	add	x19, x20, x19
-	b	.L1131
-.L1129:
+	b	.L1133
+.L1131:
 	ldp	x19, x20, [sp,16]
 	ldr	x21, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -7130,7 +7131,7 @@ queue_lun_state:
 	mov	w0, 0
 	ldrb	w2, [x3,2835]
 	cmp	w2, 255
-	beq	.L1139
+	beq	.L1141
 	ldrh	w8, [x3,3340]
 	mov	w4, 21
 	ldrb	w7, [x3,3338]
@@ -7142,60 +7143,60 @@ queue_lun_state:
 	sub	w4, w4, #1
 	asr	w5, w5, w8
 	uxth	w7, w7
-	adrp	x10, .L1142
+	adrp	x10, .L1144
 	uxth	w4, w4
 	and	w5, w5, w7
 	and	w5, w5, w4
 	add	x3, x3, 784
-	add	x10, x10, :lo12:.L1142
-.L1145:
+	add	x10, x10, :lo12:.L1144
+.L1147:
 	add	x0, x3, x2, lsl 6
 	ldr	w6, [x0,40]
 	ubfx	x11, x6, 21, 3
 	cmp	w11, w9
-	bne	.L1140
+	bne	.L1142
 	lsr	w6, w6, w8
 	ldrb	w0, [x0,58]
 	and	w6, w7, w6
 	and	w6, w4, w6
 	cmp	w6, w5
-	bne	.L1141
+	bne	.L1143
 	cmp	w1, 1
-	beq	.L1143
-	b	.L1139
-.L1141:
+	beq	.L1145
+	b	.L1141
+.L1143:
 	cmp	w1, 3
-	bhi	.L1140
+	bhi	.L1142
 	ldrb	w6, [x10,w1,uxtw]
-	adr	x11, .Lrtx1142
+	adr	x11, .Lrtx1144
 	add	x6, x11, w6, sxtb #2
 	br	x6
-.Lrtx1142:
+.Lrtx1144:
 	.section	.rodata
 	.align	0
 	.align	2
-.L1142:
-	.byte	(.L1139 - .Lrtx1142) / 4
-	.byte	(.L1143 - .Lrtx1142) / 4
-	.byte	(.L1144 - .Lrtx1142) / 4
-	.byte	(.L1139 - .Lrtx1142) / 4
+.L1144:
+	.byte	(.L1141 - .Lrtx1144) / 4
+	.byte	(.L1145 - .Lrtx1144) / 4
+	.byte	(.L1146 - .Lrtx1144) / 4
+	.byte	(.L1141 - .Lrtx1144) / 4
 	.text
-.L1143:
+.L1145:
 	sub	w6, w0, #6
 	and	w6, w6, -3
 	uxtb	w6, w6
-	cbz	w6, .L1140
-	b	.L1139
-.L1144:
+	cbz	w6, .L1142
+	b	.L1141
+.L1146:
 	cmp	w0, 10
-	bne	.L1139
-.L1140:
+	bne	.L1141
+.L1142:
 	lsl	x2, x2, 6
 	ldrb	w2, [x3,x2]
 	cmp	w2, 255
-	bne	.L1145
+	bne	.L1147
 	mov	w0, 0
-.L1139:
+.L1141:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.align	2
@@ -7213,9 +7214,9 @@ queue_remove_completed_req:
 	ldrb	w9, [x0,3895]
 	ldrb	w8, [x0,3256]
 	ldrb	w10, [x0,3892]
-.L1155:
+.L1157:
 	cmp	w7, 255
-	beq	.L1156
+	beq	.L1158
 	sbfiz	x6, x7, 6, 32
 	sxtw	x1, w7
 	add	x2, x4, x6
@@ -7223,64 +7224,64 @@ queue_remove_completed_req:
 	sub	w2, w2, #11
 	uxtb	w2, w2
 	cmp	w2, 1
-	bls	.L1157
-	cbz	w5, .L1154
+	bls	.L1159
+	cbz	w5, .L1156
 	strb	w7, [x0,2835]
-	b	.L1154
-.L1157:
+	b	.L1156
+.L1159:
 	lsl	x5, x1, 6
 	ldrb	w7, [x4,x6]
 	add	x2, x4, x5
 	strb	w11, [x4,x5]
 	ldrb	w5, [x2,59]
 	cmp	w5, 1
-	bne	.L1160
+	bne	.L1162
 	ldrh	w2, [x2,50]
-	cbnz	w2, .L1168
+	cbnz	w2, .L1170
 	mov	w2, w10
 	mov	x5, x13
-	b	.L1161
-.L1160:
-	cbz	w5, .L1178
+	b	.L1163
 .L1162:
+	cbz	w5, .L1180
+.L1164:
 	mov	w5, 1
-	b	.L1155
-.L1178:
+	b	.L1157
+.L1180:
 	ldr	w2, [x2,36]
 	cmn	w2, #1
-	beq	.L1162
+	beq	.L1164
 	mov	w2, w9
 	mov	x5, x12
-	b	.L1161
-.L1168:
+	b	.L1163
+.L1170:
 	mov	w2, w8
 	add	x5, x0, 3256
-.L1161:
+.L1163:
 	cmp	w2, 255
-	bne	.L1166
+	bne	.L1168
 	add	x3, x3, :lo12:.LANCHOR0
 	add	x1, x3, x1, lsl 6
 	strb	w7, [x3,2835]
 	ldrb	w0, [x1,785]
 	strb	w0, [x5]
-	b	.L1154
-.L1166:
+	b	.L1156
+.L1168:
 	mov	w5, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x4,x2]
 	cmp	w2, 255
-	bne	.L1166
+	bne	.L1168
 	add	x1, x4, x1, lsl 6
 	sbfiz	x5, x5, 6, 32
 	ldrb	w1, [x1,1]
 	strb	w1, [x4,x5]
-	b	.L1162
-.L1156:
-	cbz	w5, .L1154
+	b	.L1164
+.L1158:
+	cbz	w5, .L1156
 	add	x3, x3, :lo12:.LANCHOR0
 	mov	w0, -1
 	strb	w0, [x3,2835]
-.L1154:
+.L1156:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.align	2
@@ -7301,16 +7302,16 @@ pm_alloc_new_blk:
 	ldrb	w1, [x3,3276]
 	strh	w0, [x2,690]
 	cmp	w1, w0
-	bls	.L1180
+	bls	.L1182
 	add	x0, x2, x0, sxtw 1
 	ldrh	w1, [x0,672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1181
-.L1180:
+	bne	.L1183
+.L1182:
 	adrp	x22, .LC113
 	add	x22, x22, :lo12:.LC113
-.L1193:
+.L1195:
 	mov	w0, 1
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	ftl_alloc_sblk
@@ -7322,7 +7323,7 @@ pm_alloc_new_blk:
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	uxth	w0, w0
-	cbnz	w0, .L1182
+	cbnz	w0, .L1184
 	mov	w1, w21
 	mov	x0, x22
 	bl	printk
@@ -7331,23 +7332,23 @@ pm_alloc_new_blk:
 	ldrb	w2, [x1,2]
 	orr	w2, w2, -32
 	strb	w2, [x1,2]
-	b	.L1193
-.L1182:
+	b	.L1195
+.L1184:
 	ldr	x1, [x20,2864]
 	mov	w0, 1
 	mov	w2, 65535
 	str	w0, [x20,3896]
 	mov	x20, 0
 	strh	wzr, [x1,690]
-.L1184:
+.L1186:
 	add	x3, x1, x20, lsl 1
 	uxth	w0, w20
 	ldrh	w3, [x3,416]
 	cmp	w3, w2
-	beq	.L1183
+	beq	.L1185
 	add	x20, x20, 1
 	cmp	x20, 128
-	bne	.L1184
+	bne	.L1186
 	adrp	x0, .LC0
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
@@ -7356,7 +7357,7 @@ pm_alloc_new_blk:
 	bl	printk
 	bl	dump_stack
 	mov	w0, w20
-.L1183:
+.L1185:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x1, [x1,2864]
 	add	x0, x1, x0, sxtw 1
@@ -7364,7 +7365,7 @@ pm_alloc_new_blk:
 	ldrh	w0, [x1,688]
 	add	w0, w0, 1
 	strh	w0, [x1,688]
-.L1181:
+.L1183:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x1, [x0,2864]
 	ldrh	w0, [x1,690]
@@ -7373,7 +7374,7 @@ pm_alloc_new_blk:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L1186
+	bcs	.L1188
 	adrp	x0, .LC0
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
@@ -7381,7 +7382,7 @@ pm_alloc_new_blk:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1186:
+.L1188:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 21
 	ldr	x1, [x19,2864]
@@ -7393,7 +7394,7 @@ pm_alloc_new_blk:
 	strh	w4, [x1,694]
 	adrp	x1, .LANCHOR2
 	ldr	w1, [x1,#:lo12:.LANCHOR2]
-	tbz	x1, 12, .L1190
+	tbz	x1, 12, .L1192
 	mov	w2, 1
 	mov	w1, w20
 	lsl	w2, w2, w0
@@ -7403,7 +7404,7 @@ pm_alloc_new_blk:
 	mov	w3, w20
 	uxth	w4, w4
 	bl	printk
-.L1190:
+.L1192:
 	mov	w0, 0
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -7422,34 +7423,34 @@ pm_select_ram_region:
 	str	x19, [sp,16]
 	add	x2, x2, :lo12:.LANCHOR0
 	mov	x19, 0
-.L1197:
+.L1199:
 	add	x1, x2, 3904
 	lsl	x4, x19, 4
 	uxth	w0, w19
 	ldrh	w4, [x4,x1]
 	cmp	w4, w3
-	beq	.L1196
+	beq	.L1198
 	add	x19, x19, 1
 	cmp	x19, 32
-	bne	.L1197
+	bne	.L1199
 	mov	x0, 0
 	mov	w3, 32768
-.L1199:
+.L1201:
 	add	x2, x1, x0, lsl 4
 	uxth	w4, w0
 	ldrh	w2, [x2,2]
-	tbnz	x2, 15, .L1198
+	tbnz	x2, 15, .L1200
 	cmp	w2, w3
-	bcs	.L1198
+	bcs	.L1200
 	mov	w3, w2
 	mov	w19, w4
-.L1198:
+.L1200:
 	add	x0, x0, 1
 	cmp	x0, 32
-	bne	.L1199
+	bne	.L1201
 	cmp	w19, 32
 	mov	w0, w19
-	bne	.L1196
+	bne	.L1198
 	adrp	x0, .LANCHOR4+64
 	mov	w2, -1
 	mov	w1, 0
@@ -7457,23 +7458,23 @@ pm_select_ram_region:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x0, x0, 3904
-.L1201:
+.L1203:
 	ldrh	w5, [x0,2]
 	cmp	w5, w2
-	bcs	.L1200
+	bcs	.L1202
 	ldrh	w4, [x0]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	cmp	w4, w3
 	csel	w19, w19, w1, eq
-.L1200:
+.L1202:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	uxth	w1, w1
 	cmp	w1, 32
-	bne	.L1201
+	bne	.L1203
 	cmp	w19, 32
-	bne	.L1202
+	bne	.L1204
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -7482,9 +7483,9 @@ pm_select_ram_region:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1202:
+.L1204:
 	mov	w0, w19
-.L1196:
+.L1198:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -7508,16 +7509,16 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	adrp	x19, .LANCHOR0
-	cbnz	w0, .L1210
+	cbnz	w0, .L1212
 	mov	x0, 0
 	add	x2, x19, :lo12:.LANCHOR0
-.L1211:
+.L1213:
 	add	x1, x2, 4
 	strh	w0, [x1,x0,lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1211
-.L1217:
+	bne	.L1213
+.L1219:
 	adrp	x20, .LANCHOR4
 	mov	w1, 255
 	add	x20, x20, :lo12:.LANCHOR4
@@ -7526,39 +7527,39 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	ftl_memset
 	mov	x0, 0
-	b	.L1212
-.L1210:
+	b	.L1214
+.L1212:
 	cmp	w0, 1
-	bne	.L1213
+	bne	.L1215
 	mov	x0, 0
 	mov	w4, 3
 	mov	w5, 2
 	add	x3, x19, :lo12:.LANCHOR0
-.L1216:
+.L1218:
 	cmp	x0, 3
 	uxth	w2, w0
 	mov	w1, w2
-	bls	.L1214
+	bls	.L1216
 	ubfiz	w1, w2, 1, 15
 	and	w2, w2, 1
 	cmp	w2, wzr
 	csel	w2, w4, w5, ne
 	sub	w1, w1, w2
 	uxth	w1, w1
-.L1214:
+.L1216:
 	add	x2, x3, 4
 	strh	w1, [x2,x0,lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1216
-	b	.L1217
-.L1213:
-	cmp	w0, 2
 	bne	.L1218
+	b	.L1219
+.L1215:
+	cmp	w0, 2
+	bne	.L1220
 	mov	w1, 65535
 	mov	x0, 0
 	add	x4, x19, :lo12:.LANCHOR0
-.L1220:
+.L1222:
 	add	x3, x4, 4
 	cmp	x0, 1
 	uxth	w2, w0
@@ -7568,36 +7569,36 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	cmp	x0, 256
 	uxth	w1, w1
-	bne	.L1220
-	b	.L1217
-.L1218:
+	bne	.L1222
+	b	.L1219
+.L1220:
 	cmp	w0, 3
-	bne	.L1221
+	bne	.L1223
 	mov	x0, 0
 	mov	w4, 5
 	mov	w5, 4
 	add	x3, x19, :lo12:.LANCHOR0
-.L1224:
+.L1226:
 	cmp	x0, 5
 	uxth	w2, w0
 	mov	w1, w2
-	bls	.L1222
+	bls	.L1224
 	ubfiz	w1, w2, 1, 15
 	and	w2, w2, 1
 	cmp	w2, wzr
 	csel	w2, w4, w5, ne
 	sub	w1, w1, w2
 	uxth	w1, w1
-.L1222:
+.L1224:
 	add	x2, x3, 4
 	strh	w1, [x2,x0,lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1224
-	b	.L1217
-.L1221:
+	bne	.L1226
+	b	.L1219
+.L1223:
 	cmp	w0, 4
-	bne	.L1225
+	bne	.L1227
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w5, 7
 	add	x1, x2, 4
@@ -7617,7 +7618,7 @@ flash_lsb_page_tbl_build:
 	strh	w0, [x1,14]
 	mov	w0, 8
 	strh	w2, [x1,6]
-.L1227:
+.L1229:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w0, w0, 1
@@ -7628,48 +7629,48 @@ flash_lsb_page_tbl_build:
 	sub	w2, w2, w3
 	cmp	w0, 256
 	strh	w2, [x1,14]
-	bne	.L1227
-	b	.L1217
-.L1225:
+	bne	.L1229
+	b	.L1219
+.L1227:
 	cmp	w0, 5
-	bne	.L1228
+	bne	.L1230
 	mov	x0, 0
 	add	x2, x19, :lo12:.LANCHOR0
-.L1229:
+.L1231:
 	add	x1, x2, 4
 	strh	w0, [x1,x0,lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1229
+	bne	.L1231
 	mov	x0, 0
-.L1230:
+.L1232:
 	add	x2, x1, x0
 	add	w3, w0, 16
 	add	x0, x0, 2
 	cmp	x0, 480
 	strh	w3, [x2,32]
-	bne	.L1230
-	b	.L1217
-.L1228:
+	bne	.L1232
+	b	.L1219
+.L1230:
 	cmp	w0, 8
-	bne	.L1217
+	bne	.L1219
 	mov	x0, 0
 	add	x2, x19, :lo12:.LANCHOR0
-.L1231:
+.L1233:
 	add	x1, x2, 4
 	strh	w0, [x0,x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1231
-	b	.L1217
-.L1212:
+	bne	.L1233
+	b	.L1219
+.L1214:
 	add	x1, x19, 4
 	add	x2, x20, 68
 	ldrh	w1, [x0,x1]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x2,w1,sxtw 1]
-	bne	.L1212
+	bne	.L1214
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -7687,61 +7688,65 @@ flash_die_info_init:
 	ldr	w0, [x19,#:lo12:.LANCHOR2]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-	tbz	x0, 12, .L1248
+	tbz	x0, 12, .L1250
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC4
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC4
 	add	x1, x1, 48
 	bl	printk
-.L1248:
-	add	x25, x19, :lo12:.LANCHOR2
+.L1250:
+	add	x24, x19, :lo12:.LANCHOR2
 	adrp	x21, .LANCHOR0
 	add	x20, x21, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR4
-	add	x26, x22, :lo12:.LANCHOR4
+	add	x25, x22, :lo12:.LANCHOR4
 	mov	w2, 8
-	ldrh	w0, [x25,402]
-	mov	x24, 0
-	ldrb	w1, [x25,388]
-	add	x27, x20, 748
+	ldrh	w0, [x24,402]
+	mov	x23, 0
+	ldrb	w1, [x24,388]
+	mov	w26, 2
 	strh	w0, [x20,2]
-	add	x25, x25, 377
-	ldrh	w0, [x25,9]
+	add	x27, x24, 377
+	ldrh	w0, [x24,386]
+	add	x28, x20, 748
 	strb	wzr, [x20,633]
 	sdiv	w0, w0, w1
 	mov	w1, 0
-	strh	w0, [x26,1092]
+	strh	w0, [x25,1092]
 	add	x0, x20, 736
 	bl	ftl_memset
-	add	x0, x26, 1096
+	add	x0, x25, 1096
 	mov	w1, 0
 	mov	w2, 32
 	bl	ftl_memset
-	ldrb	w23, [x25,-1]
-.L1250:
-	mov	x0, x25
-	add	x1, x27, x24, lsl 3
-	mov	w2, w23
+.L1252:
+	add	x0, x20, 744
+	ldrb	w2, [x24,376]
+	add	x1, x28, x23, lsl 3
+	strb	w26, [x23,x0]
+	mov	x0, x27
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1249
+	cbnz	w0, .L1251
 	ldrb	w1, [x20,633]
-	add	x2, x26, 1096
+	add	x2, x25, 1096
 	str	w0, [x2,w1,sxtw 2]
 	add	w0, w1, 1
-	add	x1, x20, x1, sxtw
 	strb	w0, [x20,633]
-	strb	w24, [x1,736]
-.L1249:
-	add	x24, x24, 1
-	cmp	x24, 4
-	bne	.L1250
+	uxtb	w0, w23
+	add	x1, x20, x1, sxtw
+	strb	w0, [x1,736]
+	bl	zftl_flash_enter_slc_mode
+.L1251:
+	add	x23, x23, 1
+	cmp	x23, 4
+	bne	.L1252
 	add	x0, x19, :lo12:.LANCHOR2
 	add	x1, x0, 376
 	ldrb	w2, [x1,8]
 	cmp	w2, 2
-	beq	.L1251
-.L1255:
+	beq	.L1253
+.L1257:
 	add	x19, x19, :lo12:.LANCHOR2
 	add	x21, x21, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:.LANCHOR4
@@ -7758,44 +7763,45 @@ flash_die_info_init:
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1251:
-	add	x24, x21, :lo12:.LANCHOR0
+.L1253:
+	add	x23, x21, :lo12:.LANCHOR0
 	ldrh	w20, [x1,14]
-	ldrb	w27, [x1,23]
-	mov	x25, 0
+	ldrb	w26, [x0,376]
+	mov	x24, 0
 	and	w20, w20, 65280
-	add	x26, x0, 377
-	ldrh	w2, [x24,2]
-	add	x3, x24, 748
+	ldrb	w27, [x1,23]
+	ldrh	w2, [x23,2]
+	add	x25, x0, 377
+	add	x3, x23, 748
 	add	x4, x22, :lo12:.LANCHOR4
 	mul	w20, w20, w2
 	ldrb	w2, [x1,13]
 	mul	w20, w20, w2
 	lsl	w28, w20, 1
-.L1254:
-	add	x1, x3, x25, lsl 3
-	mov	x0, x26
-	mov	w2, w23
+.L1256:
+	add	x1, x3, x24, lsl 3
+	mov	x0, x25
+	mov	w2, w26
 	str	x4, [x29,96]
 	str	x3, [x29,104]
 	bl	flash_mem_cmp8
 	ldr	x3, [x29,104]
 	ldr	x4, [x29,96]
-	cbnz	w0, .L1252
-	ldrb	w1, [x24,633]
-	add	x0, x4, 1096
+	cbnz	w0, .L1254
+	ldrb	w0, [x23,633]
+	add	x1, x4, 1096
 	cmp	w27, wzr
 	csel	w2, w20, w28, eq
-	str	w2, [x0,w1,sxtw 2]
-	add	w0, w1, 1
-	add	x1, x24, x1, sxtw
-	strb	w0, [x24,633]
-	strb	w25, [x1,736]
-.L1252:
-	add	x25, x25, 1
-	cmp	x25, 4
-	bne	.L1254
-	b	.L1255
+	str	w2, [x1,w0,sxtw 2]
+	add	w1, w0, 1
+	add	x0, x23, x0, sxtw
+	strb	w1, [x23,633]
+	strb	w24, [x0,736]
+.L1254:
+	add	x24, x24, 1
+	cmp	x24, 4
+	bne	.L1256
+	b	.L1257
 	.size	flash_die_info_init, .-flash_die_info_init
 	.align	2
 	.global	lpa_hash_init
@@ -7830,7 +7836,7 @@ lpa_rebuild_hash:
 	add	x29, sp, 0
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	str	x19, [sp,16]
-	tbz	x0, 12, .L1266
+	tbz	x0, 12, .L1268
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC115
 	add	x1, x1, :lo12:.LANCHOR3
@@ -7839,7 +7845,7 @@ lpa_rebuild_hash:
 	mov	w2, 222
 	mov	w3, 0
 	bl	printk
-.L1266:
+.L1268:
 	adrp	x19, .LANCHOR0
 	mov	w1, 255
 	add	x19, x19, :lo12:.LANCHOR0
@@ -7854,28 +7860,28 @@ lpa_rebuild_hash:
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	mov	w0, 0
-.L1267:
+.L1269:
 	ldrh	w1, [x19,3300]
 	ldrb	w2, [x19,3276]
 	mul	w1, w1, w2
 	cmp	w0, w1, lsl 1
-	bge	.L1276
+	bge	.L1278
 	uxtw	x2, w0
 	ldr	x1, [x19,3872]
 	ldr	w1, [x1,x2,lsl 2]
 	cmn	w1, #1
-	beq	.L1268
+	beq	.L1270
 	uxtb	w1, w1
 	add	x3, x19, 3360
 	ldrh	w4, [x3,w1,sxtw 1]
 	strh	w0, [x3,w1,sxtw 1]
 	ldr	x1, [x19,3880]
 	strh	w4, [x1,x2,lsl 1]
-.L1268:
+.L1270:
 	add	w0, w0, 1
 	uxth	w0, w0
-	b	.L1267
-.L1276:
+	b	.L1269
+.L1278:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -7920,9 +7926,9 @@ zftl_read_flash_info:
 	strb	w1, [x19,9]
 	mov	x1, 0
 	strb	w2, [x19,8]
-.L1278:
+.L1280:
 	cmp	w4, w1, uxtb
-	bls	.L1280
+	bls	.L1282
 	add	x2, x0, 736
 	ldrb	w3, [x19,10]
 	ldrb	w2, [x1,x2]
@@ -7930,8 +7936,8 @@ zftl_read_flash_info:
 	lsl	w2, w5, w2
 	orr	w2, w2, w3
 	strb	w2, [x19,10]
-	b	.L1278
-.L1280:
+	b	.L1280
+.L1282:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8029,9 +8035,9 @@ gc_static_wearleveling:
 	ldr	w1, [x0,32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1283
+	bls	.L1285
 	bl	ftl_tmp_into_update
-.L1283:
+.L1285:
 	add	x3, x19, :lo12:.LANCHOR0
 	ldr	x0, [x3,608]
 	ldr	w1, [x0,568]
@@ -8039,14 +8045,14 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1284
+	bhi	.L1286
 	ldr	x3, [x3,2864]
 	ldr	w1, [x0,572]
 	ldr	w3, [x3,36]
 	add	w1, w1, 32
 	cmp	w3, w1
-	bls	.L1334
-.L1284:
+	bls	.L1336
+.L1286:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w22, 0
 	mov	w20, 65535
@@ -8067,11 +8073,11 @@ gc_static_wearleveling:
 	adrp	x10, .LANCHOR2
 	add	x8, x8, :lo12:.LC116
 	ldrh	w23, [x1,134]
-.L1286:
+.L1288:
 	add	x4, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x4,576]
 	cmp	w0, w23
-	bls	.L1395
+	bls	.L1397
 	uxtw	x7, w23
 	ldr	x0, [x4,584]
 	lsl	x1, x7, 2
@@ -8079,70 +8085,70 @@ gc_static_wearleveling:
 	ldrb	w2, [x6,2]
 	and	w3, w2, 224
 	cmp	w3, 224
-	beq	.L1287
-	tbz	x2, 3, .L1288
+	beq	.L1289
+	tbz	x2, 3, .L1290
 	ldrh	w3, [x0,x1]
 	ldr	w2, [x0,x1]
 	and	w3, w3, 2047
 	ubfx	x2, x2, 11, 8
-	b	.L1289
-.L1288:
+	b	.L1291
+.L1290:
 	tst	w2, 24
-	bne	.L1290
+	bne	.L1292
 	ldrh	w3, [x0,x1]
 	mov	w2, 65535
 	and	w3, w3, 2047
-	b	.L1289
-.L1290:
+	b	.L1291
+.L1292:
 	ldr	w2, [x0,x1]
 	mov	w3, 65535
 	ubfx	x2, x2, 11, 8
-	b	.L1291
-.L1289:
+	b	.L1293
+.L1291:
 	ldr	w4, [x29,136]
 	add	w26, w26, 1
 	cmp	w20, w3
 	add	w4, w4, w3
 	str	w4, [x29,136]
 	uxth	w26, w26
-	bls	.L1333
+	bls	.L1335
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w20, w3
 	ldr	x4, [x4,608]
 	strh	w23, [x4,586]
-.L1333:
+.L1335:
 	cmp	w25, w3
-	bcs	.L1292
+	bcs	.L1294
 	mov	w22, w23
 	mov	w25, w3
-.L1292:
+.L1294:
 	cmp	w2, w9
-	beq	.L1293
-.L1291:
+	beq	.L1295
+.L1293:
 	ldr	w4, [x29,140]
 	add	w27, w27, 1
 	cmp	w21, w2
 	add	w4, w4, w2
 	str	w4, [x29,140]
 	uxth	w27, w27
-	bls	.L1294
+	bls	.L1296
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w21, w2
 	ldr	x4, [x4,608]
 	strh	w23, [x4,584]
-.L1294:
+.L1296:
 	cmp	w24, w2
-	bcs	.L1293
+	bcs	.L1295
 	mov	w28, w23
 	mov	w24, w2
-.L1293:
+.L1295:
 	cmp	w3, 9
-	bls	.L1336
+	bls	.L1338
 	cmp	w2, 9
-	bhi	.L1287
-.L1336:
+	bhi	.L1289
+.L1338:
 	ldr	w2, [x10,#:lo12:.LANCHOR2]
-	tbz	x2, 8, .L1287
+	tbz	x2, 8, .L1289
 	ldrh	w2, [x0,x1]
 	ldr	w3, [x0,x1]
 	add	x0, x19, :lo12:.LANCHOR0
@@ -8163,11 +8169,11 @@ gc_static_wearleveling:
 	ldr	x10, [x29,112]
 	ldr	x9, [x29,120]
 	ldr	x8, [x29,128]
-.L1287:
+.L1289:
 	add	w23, w23, 1
 	uxth	w23, w23
-	b	.L1286
-.L1395:
+	b	.L1288
+.L1397:
 	ldr	x0, [x4,608]
 	mov	w1, 255
 	mov	w2, 128
@@ -8184,7 +8190,7 @@ gc_static_wearleveling:
 	lsl	x0, x7, 2
 	mov	x1, x7
 	add	x8, x3, x0
-	tbz	x2, 10, .L1297
+	tbz	x2, 10, .L1299
 	ldr	x9, [x4,600]
 	ldrh	w2, [x3,x0]
 	ldrb	w5, [x8,2]
@@ -8200,13 +8206,13 @@ gc_static_wearleveling:
 	str	x8, [x29,128]
 	bl	printk
 	ldr	x8, [x29,128]
-.L1297:
+.L1299:
 	ldrb	w0, [x8,2]
-	tbz	x0, 3, .L1298
+	tbz	x0, 3, .L1300
 	ldrb	w0, [x8,2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1299
+	bne	.L1301
 	add	x3, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	mov	w2, 1
@@ -8217,26 +8223,29 @@ gc_static_wearleveling:
 	ldr	x3, [x29,128]
 	mov	w0, 1
 	strh	w0, [x3,3214]
-	b	.L1298
-.L1299:
+	b	.L1300
+.L1301:
 	tst	w0, 224
-	bne	.L1298
-	add	x1, x19, :lo12:.LANCHOR0
-	mov	w2, 65535
-	ldr	x0, [x1,608]
-	ldrh	w3, [x0,590]
-	cmp	w3, w2
-	bne	.L1298
-	ldrh	w0, [x0,586]
-	str	x1, [x29,128]
+	bne	.L1300
+	add	x2, x19, :lo12:.LANCHOR0
+	mov	w0, 65535
+	ldr	x1, [x2,608]
+	ldrh	w3, [x1,590]
+	cmp	w3, w0
+	bne	.L1300
+	ldrh	w0, [x1,586]
+	ldrh	w1, [x1,588]
+	str	x2, [x29,128]
+	cmp	w1, w0
+	beq	.L1300
 	bl	zftl_remove_free_node
-	ldr	x1, [x29,128]
-	ldr	x0, [x1,608]
+	ldr	x2, [x29,128]
+	ldr	x0, [x2,608]
 	ldrh	w1, [x0,586]
 	strh	w1, [x0,590]
 	mov	w1, -1
 	strh	w1, [x0,586]
-.L1298:
+.L1300:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x23,#:lo12:.LANCHOR2]
 	ldr	x1, [x0,608]
@@ -8245,7 +8254,7 @@ gc_static_wearleveling:
 	lsl	x3, x7, 2
 	mov	x1, x7
 	add	x8, x4, x3
-	tbz	x2, 10, .L1300
+	tbz	x2, 10, .L1302
 	ldr	x9, [x0,600]
 	adrp	x0, .LC118
 	ldrh	w2, [x4,x3]
@@ -8261,13 +8270,13 @@ gc_static_wearleveling:
 	str	x8, [x29,128]
 	bl	printk
 	ldr	x8, [x29,128]
-.L1300:
+.L1302:
 	ldrb	w0, [x8,2]
-	tbz	x0, 3, .L1301
+	tbz	x0, 3, .L1303
 	ldrb	w0, [x8,2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1302
+	bne	.L1304
 	add	x3, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	mov	w2, 1
@@ -8278,30 +8287,33 @@ gc_static_wearleveling:
 	ldr	x3, [x29,128]
 	mov	w0, 1
 	strh	w0, [x3,3214]
-	b	.L1301
-.L1302:
+	b	.L1303
+.L1304:
 	tst	w0, 224
-	bne	.L1301
-	add	x1, x19, :lo12:.LANCHOR0
-	mov	w2, 65535
-	ldr	x0, [x1,608]
-	ldrh	w3, [x0,588]
-	cmp	w3, w2
-	bne	.L1301
-	ldrh	w0, [x0,584]
-	str	x1, [x29,128]
+	bne	.L1303
+	add	x2, x19, :lo12:.LANCHOR0
+	mov	w0, 65535
+	ldr	x1, [x2,608]
+	ldrh	w3, [x1,588]
+	cmp	w3, w0
+	bne	.L1303
+	ldrh	w0, [x1,584]
+	ldrh	w1, [x1,590]
+	str	x2, [x29,128]
+	cmp	w1, w0
+	beq	.L1303
 	bl	zftl_remove_free_node
-	ldr	x1, [x29,128]
-	ldr	x0, [x1,608]
+	ldr	x2, [x29,128]
+	ldr	x0, [x2,608]
 	ldrh	w1, [x0,584]
 	strh	w1, [x0,588]
 	mov	w1, -1
 	strh	w1, [x0,584]
-.L1301:
+.L1303:
 	add	x4, x19, :lo12:.LANCHOR0
 	ldr	w0, [x23,#:lo12:.LANCHOR2]
 	ldr	x1, [x4,584]
-	tbz	x0, 10, .L1303
+	tbz	x0, 10, .L1305
 	uxtw	x7, w22
 	ldr	x8, [x4,600]
 	lsl	x0, x7, 2
@@ -8319,11 +8331,11 @@ gc_static_wearleveling:
 	ubfx	x3, x3, 11, 8
 	ubfx	x5, x5, 5, 3
 	bl	printk
-.L1303:
+.L1305:
 	add	x4, x19, :lo12:.LANCHOR0
 	ldr	w0, [x23,#:lo12:.LANCHOR2]
 	ldr	x1, [x4,584]
-	tbz	x0, 10, .L1304
+	tbz	x0, 10, .L1306
 	uxtw	x7, w28
 	ldr	x8, [x4,600]
 	lsl	x0, x7, 2
@@ -8341,7 +8353,7 @@ gc_static_wearleveling:
 	ubfx	x3, x3, 11, 8
 	ubfx	x5, x5, 5, 3
 	bl	printk
-.L1304:
+.L1306:
 	ldr	w1, [x29,136]
 	add	x0, x19, :lo12:.LANCHOR0
 	udiv	w3, w1, w26
@@ -8355,7 +8367,7 @@ gc_static_wearleveling:
 	strh	w3, [x0,88]
 	strh	w4, [x0,90]
 	ldr	w0, [x23,#:lo12:.LANCHOR2]
-	tbz	x0, 10, .L1305
+	tbz	x0, 10, .L1307
 	adrp	x0, .LC121
 	mov	w1, w26
 	add	x0, x0, :lo12:.LC121
@@ -8363,10 +8375,10 @@ gc_static_wearleveling:
 	uxth	w3, w3
 	uxth	w4, w4
 	bl	printk
-.L1305:
+.L1307:
 	ldr	w0, [x23,#:lo12:.LANCHOR2]
 	adrp	x28, .LANCHOR4
-	tbz	x0, 10, .L1306
+	tbz	x0, 10, .L1308
 	add	x6, x28, :lo12:.LANCHOR4
 	adrp	x0, .LC122
 	add	x0, x0, :lo12:.LC122
@@ -8377,19 +8389,19 @@ gc_static_wearleveling:
 	mov	w4, w24
 	ldrh	w6, [x6,1162]
 	bl	printk
-.L1306:
+.L1308:
 	add	x1, x28, :lo12:.LANCHOR4
 	sub	w0, w24, w21
 	str	w0, [x29,140]
 	ldrh	w0, [x1,1162]
 	ldr	w2, [x29,140]
 	cmp	w2, w0
-	bgt	.L1307
+	bgt	.L1309
 	ldrh	w1, [x1,1160]
 	sub	w0, w25, w20
 	cmp	w0, w1
-	ble	.L1335
-.L1307:
+	ble	.L1337
+.L1309:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w26, 0
 	mov	w22, w26
@@ -8405,11 +8417,11 @@ gc_static_wearleveling:
 	str	x0, [x29,128]
 	add	x0, x25, :lo12:.LC123
 	str	x0, [x29,120]
-.L1309:
+.L1311:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1,576]
 	cmp	w27, w0
-	bcs	.L1318
+	bcs	.L1320
 	add	w7, w24, 1
 	ldr	x4, [x1,584]
 	uxth	w24, w7
@@ -8421,31 +8433,31 @@ gc_static_wearleveling:
 	ldrb	w0, [x0,2]
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1311
+	beq	.L1313
 	tst	w0, 192
-	beq	.L1311
+	beq	.L1313
 	ubfx	x0, x0, 3, 2
 	cmp	w2, 160
 	and	w1, w0, 1
-	tbnz	x0, 0, .L1393
+	tbnz	x0, 0, .L1395
 	cmp	w0, 2
-.L1393:
+.L1395:
 	add	x0, x28, :lo12:.LANCHOR4
-	bne	.L1314
+	bne	.L1316
 	ldrh	w0, [x0,1162]
 	ldr	w2, [x29,140]
 	cmp	w2, w0
-	ble	.L1315
+	ble	.L1317
 	ldr	w0, [x4,x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1316
-	cbz	w1, .L1315
+	bls	.L1318
+	cbz	w1, .L1317
 	ldrh	w0, [x4,x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1315
-.L1316:
+	bgt	.L1317
+.L1318:
 	mov	w1, 0
 	mov	w0, w24
 	mov	w2, 1
@@ -8460,7 +8472,7 @@ gc_static_wearleveling:
 	ldr	x4, [x29,104]
 	strh	w1, [x0,3214]
 	ldr	w1, [x23,#:lo12:.LANCHOR2]
-	tbz	x1, 10, .L1315
+	tbz	x1, 10, .L1317
 	ldr	x1, [x0,584]
 	ldr	x10, [x0,600]
 	add	x1, x1, x3
@@ -8468,24 +8480,24 @@ gc_static_wearleveling:
 	ldr	w6, [x4,x3]
 	ldr	x0, [x29,120]
 	ldrb	w2, [x1,2]
-	b	.L1394
-.L1314:
+	b	.L1396
+.L1316:
 	ldrh	w0, [x0,1160]
 	ldr	w2, [x29,136]
 	cmp	w2, w0
-	ble	.L1315
+	ble	.L1317
 	ldrh	w0, [x4,x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1317
-	cbz	w1, .L1315
+	ble	.L1319
+	cbz	w1, .L1317
 	ldr	w0, [x4,x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1315
-.L1317:
+	bgt	.L1317
+.L1319:
 	mov	w1, 0
 	mov	w0, w24
 	mov	w2, 1
@@ -8500,7 +8512,7 @@ gc_static_wearleveling:
 	ldr	x4, [x29,104]
 	strh	w1, [x0,3214]
 	ldr	w1, [x23,#:lo12:.LANCHOR2]
-	tbz	x1, 10, .L1315
+	tbz	x1, 10, .L1317
 	ldr	x1, [x0,584]
 	ldr	x10, [x0,600]
 	add	x1, x1, x3
@@ -8508,7 +8520,7 @@ gc_static_wearleveling:
 	ldr	w6, [x4,x3]
 	ldr	x0, [x29,128]
 	ldrb	w2, [x1,2]
-.L1394:
+.L1396:
 	ldrh	w3, [x10,x25,lsl 1]
 	mov	w1, w24
 	ldrh	w4, [x9,56]
@@ -8516,122 +8528,122 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ubfx	x6, x6, 11, 8
 	bl	printk
-.L1315:
+.L1317:
 	cmp	w26, 4
-	bhi	.L1318
+	bhi	.L1320
 	cmp	w22, 4
-	bhi	.L1318
-.L1311:
+	bhi	.L1320
+.L1313:
 	add	w27, w27, 1
 	uxth	w27, w27
-	b	.L1309
-.L1318:
+	b	.L1311
+.L1320:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,608]
 	str	w24, [x0,580]
-	b	.L1308
-.L1335:
+	b	.L1310
+.L1337:
 	mov	w26, 0
 	mov	w22, w26
-.L1308:
-	cbz	w21, .L1321
+.L1310:
+	cbz	w21, .L1323
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w0, [x0,134]
-.L1322:
+.L1324:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1,576]
 	cmp	w2, w0
-	bls	.L1396
+	bls	.L1398
 	ubfiz	x3, x0, 2, 16
 	ldr	x4, [x1,584]
 	add	x5, x4, x3
 	ldr	w1, [x4,x3]
 	ubfx	x2, x1, 11, 8
 	cmp	w2, w21
-	bcc	.L1323
+	bcc	.L1325
 	ldrb	w5, [x5,2]
 	tst	w5, 24
-	beq	.L1323
+	beq	.L1325
 	sub	w2, w2, w21
 	bfi	w1, w2, 11, 8
 	str	w1, [x4,x3]
-.L1323:
+.L1325:
 	add	w0, w0, 1
 	uxth	w0, w0
-	b	.L1322
-.L1396:
+	b	.L1324
+.L1398:
 	ldr	x0, [x1,2864]
 	ldrh	w1, [x0,72]
 	add	w1, w21, w1
 	strh	w1, [x0,72]
 	ldrh	w1, [x0,98]
 	cmp	w1, w21
-	bls	.L1321
+	bls	.L1323
 	sub	w21, w1, w21
 	strh	w21, [x0,98]
-.L1321:
-	cbz	w20, .L1327
+.L1323:
+	cbz	w20, .L1329
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w0, [x0,134]
-.L1328:
+.L1330:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1,576]
 	cmp	w2, w0
-	bls	.L1397
+	bls	.L1399
 	ubfiz	x3, x0, 2, 16
 	ldr	x4, [x1,584]
 	add	x5, x4, x3
 	ldrh	w1, [x4,x3]
 	and	w2, w1, 2047
 	cmp	w2, w20
-	blt	.L1329
+	blt	.L1331
 	ldrb	w5, [x5,2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1329
+	beq	.L1331
 	sub	w2, w2, w20
 	bfi	w1, w2, 0, 11
 	strh	w1, [x4,x3]
-.L1329:
+.L1331:
 	add	w0, w0, 1
 	uxth	w0, w0
-	b	.L1328
-.L1397:
+	b	.L1330
+.L1399:
 	ldr	x0, [x1,2864]
 	ldrh	w1, [x0,74]
 	add	w1, w20, w1
 	strh	w1, [x0,74]
 	ldrh	w1, [x0,96]
 	cmp	w1, w20
-	bls	.L1327
+	bls	.L1329
 	sub	w20, w1, w20
 	strh	w20, [x0,96]
-.L1327:
+.L1329:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1285
+	beq	.L1287
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x19,600]
 	ldrh	w2, [x2,x1]
 	ldrh	w1, [x19,3300]
 	cmp	w2, w1
-	bhi	.L1285
+	bhi	.L1287
 	mov	w1, 0
 	mov	w2, 1
 	add	w22, w22, 1
 	bl	gc_add_sblk
-	b	.L1285
-.L1334:
+	b	.L1287
+.L1336:
 	mov	w26, 0
 	mov	w22, w26
-.L1285:
+.L1287:
 	add	w0, w26, w22
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -8687,52 +8699,52 @@ zftl_sblk_list_init:
 	ldr	x0, [x19,2864]
 	ldrsh	w19, [x0,134]
 	strh	wzr, [x0,146]
-.L1399:
+.L1401:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0,576]
 	cmp	w19, w1
-	bge	.L1429
+	bge	.L1431
 	sxtw	x22, w19
 	ldr	x27, [x0,584]
 	ldr	w1, [x29,108]
 	add	x27, x27, x22, lsl 2
 	ldrb	w2, [x27,3]
-	cbz	w2, .L1400
+	cbz	w2, .L1402
 	ldrb	w5, [x0,3276]
 	ldrh	w6, [x0,3274]
 	ldr	x4, [x0,2864]
 	mov	w0, 0
 	mov	w1, w0
-.L1401:
+.L1403:
 	cmp	w0, w5
-	bge	.L1430
+	bge	.L1432
 	ldrb	w2, [x27,3]
 	asr	w2, w2, w0
-	tbnz	x2, 0, .L1402
+	tbnz	x2, 0, .L1404
 	add	w1, w6, w1
 	sxth	w1, w1
-	b	.L1403
-.L1402:
+	b	.L1405
+.L1404:
 	ldrh	w2, [x4,146]
 	add	w2, w2, 1
 	strh	w2, [x4,146]
-.L1403:
+.L1405:
 	add	w0, w0, 1
-	b	.L1401
-.L1430:
-	cbz	w1, .L1405
+	b	.L1403
+.L1432:
+	cbz	w1, .L1407
 	sdiv	w1, w23, w1
 	add	w1, w1, 1
 	sxth	w1, w1
-	b	.L1400
-.L1405:
+	b	.L1402
+.L1407:
 	ldrb	w0, [x27,2]
 	orr	w0, w0, -32
 	strb	w0, [x27,2]
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x0, [x0,600]
 	strh	w25, [x0,x22,lsl 1]
-.L1400:
+.L1402:
 	add	x20, x21, :lo12:.LANCHOR0
 	smull	x0, w19, w24
 	ldr	x2, [x20,528]
@@ -8745,101 +8757,101 @@ zftl_sblk_list_init:
 	ldrb	w1, [x27,2]
 	and	w0, w1, 224
 	cmp	w0, 224
-	beq	.L1408
+	beq	.L1410
 	cmp	w0, 32
 	cset	w28, eq
-	cbnz	w28, .L1408
+	cbnz	w28, .L1410
 	ldr	x2, [x20,608]
 	ldrh	w4, [x2,16]
 	cmp	w19, w4
-	beq	.L1408
+	beq	.L1410
 	ldrh	w4, [x2,48]
 	cmp	w19, w4
-	beq	.L1408
+	beq	.L1410
 	ldrh	w2, [x2,80]
 	cmp	w19, w2
-	beq	.L1408
+	beq	.L1410
 	cmp	w0, 64
-	bne	.L1410
+	bne	.L1412
 	uxth	w27, w19
 	add	x0, x20, 616
 	mov	w1, w27
 	add	x2, x20, 2850
-	b	.L1427
-.L1410:
+	b	.L1429
+.L1412:
 	cmp	w0, 96
-	bne	.L1411
+	bne	.L1413
 	uxth	w27, w19
 	add	x0, x20, 3288
 	mov	w1, w27
 	add	x2, x20, 2852
-	b	.L1427
-.L1411:
+	b	.L1429
+.L1413:
 	cmp	w0, 160
-	bne	.L1412
+	bne	.L1414
 	uxth	w27, w19
 	add	x0, x20, 3280
 	mov	w1, w27
 	add	x2, x20, 2854
-.L1427:
+.L1429:
 	bl	_insert_data_list
 	ldr	x0, [x20,600]
 	ldrh	w0, [x0,x22,lsl 1]
 	cmp	w0, 7
-	bhi	.L1408
+	bhi	.L1410
 	mov	w0, w27
 	mov	w1, 1
 	mov	w2, w28
-	b	.L1425
-.L1412:
-	cbnz	w0, .L1408
+	b	.L1427
+.L1414:
+	cbnz	w0, .L1410
 	ldr	x0, [x20,600]
 	ldrh	w2, [x0,x22,lsl 1]
-	cbz	w2, .L1413
+	cbz	w2, .L1415
 	mov	x0, x26
 	mov	w1, w19
 	bl	printk
 	ldrb	w0, [x27,2]
-	tbz	x0, 4, .L1414
+	tbz	x0, 4, .L1416
 	mov	w1, 5
-	b	.L1421
-.L1414:
+	b	.L1423
+.L1416:
 	mov	w1, 2
-.L1421:
+.L1423:
 	bfi	w0, w1, 5, 3
 	mov	w2, 0
 	strb	w0, [x27,2]
 	mov	w1, 1
 	mov	w0, w19
-.L1425:
+.L1427:
 	bl	gc_add_sblk
-	b	.L1408
-.L1413:
+	b	.L1410
+.L1415:
 	ands	w1, w1, 24
 	add	x2, x21, :lo12:.LANCHOR0
-	bne	.L1416
+	bne	.L1418
 	add	x0, x2, 3312
 	mov	w1, w19
 	add	x2, x2, 2844
-	b	.L1423
-.L1416:
+	b	.L1425
+.L1418:
 	cmp	w1, 16
-	bne	.L1417
+	bne	.L1419
 	add	x0, x2, 3320
 	mov	w1, w19
 	add	x2, x2, 2846
-	b	.L1423
-.L1417:
+	b	.L1425
+.L1419:
 	add	x0, x2, 3328
 	mov	w1, w19
 	add	x2, x2, 2848
-.L1423:
+.L1425:
 	bl	_insert_free_list
-.L1408:
+.L1410:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1399
-.L1429:
+	b	.L1401
+.L1431:
 	ldr	x1, [x0,2864]
 	ldrh	w2, [x0,2844]
 	strh	w2, [x1,114]
@@ -8880,8 +8892,8 @@ ftl_open_sblk_init:
 	mov	x26, x23
 	add	x20, x20, :lo12:.LC113
 	mov	w24, -1
-.L1432:
-.L1435:
+.L1434:
+.L1437:
 	mov	w0, w21
 	bl	ftl_alloc_sblk
 	uxth	w22, w0
@@ -8903,11 +8915,11 @@ ftl_open_sblk_init:
 	mul	w2, w1, w2
 	strh	w2, [x19,6]
 	strb	w21, [x19,4]
-	beq	.L1433
+	beq	.L1435
 	ldrb	w3, [x0,3276]
 	mul	w3, w1, w3
 	uxth	w3, w3
-.L1433:
+.L1435:
 	add	x27, x26, :lo12:.LANCHOR0
 	strh	w3, [x19,12]
 	ubfiz	x28, x22, 1, 16
@@ -8922,7 +8934,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19,6]
 	strh	w1, [x0,x28]
 	ldrb	w0, [x19,9]
-	cbnz	w0, .L1431
+	cbnz	w0, .L1433
 	mov	x0, x20
 	mov	w1, w22
 	bl	printk
@@ -8930,8 +8942,8 @@ ftl_open_sblk_init:
 	strh	w24, [x0,x28]
 	mov	w0, 7
 	strb	w0, [x19,4]
-	b	.L1435
-.L1431:
+	b	.L1437
+.L1433:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -8955,7 +8967,7 @@ pm_free_sblk:
 	stp	x27, x28, [sp,80]
 	ldrh	w0, [x0,1164]
 	cmp	w0, 128
-	bls	.L1438
+	bls	.L1440
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -8964,7 +8976,7 @@ pm_free_sblk:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1438:
+.L1440:
 	add	x28, x29, 112
 	mov	w1, 0
 	mov	w2, 256
@@ -8984,9 +8996,9 @@ pm_free_sblk:
 	ldrh	w7, [x4,698]
 	sub	w0, w0, #1
 	ldrh	w9, [x1,1164]
-.L1439:
+.L1441:
 	cmp	w7, w3, uxth
-	bls	.L1464
+	bls	.L1466
 	add	x1, x4, x3, lsl 2
 	mov	x2, 0
 	ldr	w1, [x1,704]
@@ -8994,23 +9006,23 @@ pm_free_sblk:
 	and	w1, w1, w0
 	udiv	w1, w1, w8
 	uxth	w1, w1
-.L1440:
+.L1442:
 	cmp	w9, w2, uxth
-	bls	.L1465
+	bls	.L1467
 	add	x5, x4, x2, lsl 1
 	ldrh	w5, [x5,416]
 	cmp	w5, w1
-	bne	.L1441
+	bne	.L1443
 	ldrh	w5, [x28,x2,lsl 1]
 	add	w5, w5, 1
 	strh	w5, [x28,x2,lsl 1]
-.L1441:
+.L1443:
 	add	x2, x2, 1
-	b	.L1440
-.L1465:
+	b	.L1442
+.L1467:
 	add	x3, x3, 1
-	b	.L1439
-.L1464:
+	b	.L1441
+.L1466:
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	w25, 0
 	adrp	x24, .LC126
@@ -9022,11 +9034,11 @@ pm_free_sblk:
 	ldrh	w20, [x1,3300]
 	mul	w20, w0, w20
 	uxth	w20, w20
-.L1444:
+.L1446:
 	add	x0, x23, :lo12:.LANCHOR4
 	ldrh	w0, [x0,1164]
 	cmp	w0, w19
-	bls	.L1466
+	bls	.L1468
 	add	x0, x21, :lo12:.LANCHOR0
 	sxtw	x22, w19
 	add	x1, x22, 208
@@ -9036,31 +9048,31 @@ pm_free_sblk:
 	ldrh	w1, [x4,692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1445
+	bne	.L1447
 	ldrb	w1, [x0,3276]
 	ldrh	w0, [x0,3300]
 	mul	w0, w1, w0
 	strh	w0, [x28,w19,sxtw 1]
-.L1445:
+.L1447:
 	ldrh	w0, [x28,x22,lsl 1]
 	cmp	w20, w0
-	bls	.L1446
+	bls	.L1448
 	cmp	w0, wzr
 	csel	w25, w25, w19, eq
 	csel	w20, w20, w0, eq
-.L1446:
-	cbnz	w0, .L1448
+.L1448:
+	cbnz	w0, .L1450
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1448
+	beq	.L1450
 	ldr	w0, [x26,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L1449
+	tbz	x0, 12, .L1451
 	ldrh	w4, [x4,688]
 	mov	x0, x24
 	mov	w1, w19
 	mov	w2, 0
 	bl	printk
-.L1449:
+.L1451:
 	add	x1, x21, :lo12:.LANCHOR0
 	add	x22, x22, 208
 	str	x1, [x29,104]
@@ -9073,11 +9085,11 @@ pm_free_sblk:
 	ldrh	w1, [x0,688]
 	sub	w1, w1, #1
 	strh	w1, [x0,688]
-.L1448:
+.L1450:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L1444
-.L1466:
+	b	.L1446
+.L1468:
 	mov	w0, w25
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -9099,16 +9111,16 @@ ftl_memcpy:
 	ret
 	.size	ftl_memcpy, .-ftl_memcpy
 	.align	2
-	.global	flash_into_data_init
-	.type	flash_into_data_init, %function
-flash_into_data_init:
+	.global	flash_info_data_init
+	.type	flash_info_data_init, %function
+flash_info_data_init:
 	adrp	x1, .LANCHOR2
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	w0, [x1,#:lo12:.LANCHOR2]
 	stp	x19, x20, [sp,16]
 	mov	x20, x1
-	tbz	x0, 12, .L1469
+	tbz	x0, 12, .L1471
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
@@ -9116,7 +9128,7 @@ flash_into_data_init:
 	mov	w1, 100
 	add	x2, x2, 112
 	bl	printk
-.L1469:
+.L1471:
 	adrp	x19, .LANCHOR0
 	mov	w1, 0
 	add	x19, x19, :lo12:.LANCHOR0
@@ -9145,20 +9157,20 @@ flash_into_data_init:
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
-	.size	flash_into_data_init, .-flash_into_data_init
+	.size	flash_info_data_init, .-flash_info_data_init
 	.align	2
 	.global	ftl_memcpy32
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1474:
+.L1476:
 	cmp	w2, w3
-	bls	.L1476
+	bls	.L1478
 	ldr	w4, [x1,x3,lsl 2]
 	str	w4, [x0,x3,lsl 2]
 	add	x3, x3, 1
-	b	.L1474
-.L1476:
+	b	.L1476
+.L1478:
 	ret
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.align	2
@@ -9180,17 +9192,17 @@ js_hash:
 	mov	w0, 42982
 	mov	x2, 0
 	movk	w0, 0x47c6, lsl 16
-.L1479:
+.L1481:
 	cmp	w1, w2
-	bls	.L1481
+	bls	.L1483
 	lsl	w3, w0, 5
 	ldrb	w4, [x5,x2]
 	add	w3, w3, w0, lsr 2
 	add	x2, x2, 1
 	add	w3, w3, w4
 	eor	w0, w0, w3
-	b	.L1479
-.L1481:
+	b	.L1481
+.L1483:
 	ret
 	.size	js_hash, .-js_hash
 	.align	2
@@ -9315,13 +9327,13 @@ flash_sram_load_store:
 	add	x29, sp, 0
 	ldr	x4, [x4,#:lo12:.LANCHOR4+1184]
 	add	x4, x4, 4096
-	cbnz	w2, .L1488
+	cbnz	w2, .L1490
 	add	x1, x4, x1
-	b	.L1490
-.L1488:
+	b	.L1492
+.L1490:
 	add	x0, x4, x1
 	mov	x1, x6
-.L1490:
+.L1492:
 	mov	w2, w3
 	bl	ftl_memcpy
 	ldp	x29, x30, [sp], 16
@@ -9520,42 +9532,42 @@ rknand_print_hex:
 	add	x23, x23, :lo12:.LC129
 	add	x21, x21, :lo12:.LC130
 	add	x24, x24, :lo12:.LC1
-.L1505:
+.L1507:
 	cmp	x19, x26
-	beq	.L1513
-	cbnz	w20, .L1506
+	beq	.L1515
+	cbnz	w20, .L1508
 	mov	x0, x23
 	mov	x1, x27
 	mov	x2, x22
 	mov	w3, w19
 	bl	printk
-.L1506:
+.L1508:
 	cmp	w25, 4
 	mov	x0, x21
-	bne	.L1507
+	bne	.L1509
 	ldr	w1, [x22,x19,lsl 2]
-	b	.L1512
-.L1507:
+	b	.L1514
+.L1509:
 	cmp	w25, 2
-	bne	.L1509
+	bne	.L1511
 	ldrsh	w1, [x22,x19,lsl 1]
-	b	.L1512
-.L1509:
+	b	.L1514
+.L1511:
 	ldrb	w1, [x22,x19]
-.L1512:
+.L1514:
 	bl	printk
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L1510
+	bls	.L1512
 	adrp	x1, .LC131
 	mov	x0, x24
 	add	x1, x1, :lo12:.LC131
 	mov	w20, 0
 	bl	printk
-.L1510:
+.L1512:
 	add	x19, x19, 1
-	b	.L1505
-.L1513:
+	b	.L1507
+.L1515:
 	adrp	x0, .LC1
 	adrp	x1, .LC131
 	add	x1, x1, :lo12:.LC131
@@ -9598,30 +9610,30 @@ hynix_get_read_retry_default:
 	add	x26, x27, 128
 	strb	w1, [x27,130]
 	strb	w0, [x27,131]
-	bne	.L1515
+	bne	.L1517
 	ldr	x1, [x29,136]
 	mov	w0, -89
 	strb	w0, [x1,16]
 	adrp	x0, .LANCHOR2+425
 	mov	w1, -9
 	strb	w1, [x0,#:lo12:.LANCHOR2+425]
-	b	.L1570
-.L1515:
+	b	.L1572
+.L1517:
 	cmp	w25, 3
-	bne	.L1517
+	bne	.L1519
 	mov	x4, 0
-.L1518:
+.L1520:
 	sub	w0, w4, #80
 	strb	w0, [x26,x4]
 	add	x4, x4, 1
 	cmp	x4, 8
-	bne	.L1518
+	bne	.L1520
 	mov	w21, w4
 	mov	w28, w4
-	b	.L1516
-.L1517:
+	b	.L1518
+.L1519:
 	cmp	w25, 4
-	bne	.L1519
+	bne	.L1521
 	mov	w4, -52
 	strb	w4, [x27,128]
 	mov	w4, -65
@@ -9637,10 +9649,10 @@ hynix_get_read_retry_default:
 	strb	w1, [x27,134]
 	strb	w4, [x27,132]
 	strb	w0, [x27,135]
-	b	.L1516
-.L1519:
+	b	.L1518
+.L1521:
 	cmp	w25, 5
-	bne	.L1520
+	bne	.L1522
 	mov	w0, 56
 	strb	w0, [x27,128]
 	mov	w0, 57
@@ -9650,10 +9662,10 @@ hynix_get_read_retry_default:
 	strb	w0, [x27,130]
 	mov	w0, 59
 	strb	w0, [x27,131]
-	b	.L1604
-.L1520:
+	b	.L1606
+.L1522:
 	cmp	w25, 6
-	bne	.L1521
+	bne	.L1523
 	mov	w0, 14
 	strb	w0, [x27,128]
 	mov	w0, 15
@@ -9663,32 +9675,32 @@ hynix_get_read_retry_default:
 	strb	w0, [x27,130]
 	mov	w0, 17
 	strb	w0, [x27,131]
-	b	.L1604
-.L1521:
+	b	.L1606
+.L1523:
 	cmp	w25, 7
-	bne	.L1570
+	bne	.L1572
 	mov	x0, 0
-.L1522:
+.L1524:
 	sub	w1, w0, #80
 	strb	w1, [x26,x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1522
+	bne	.L1524
 	mov	w0, -44
 	mov	w21, 12
 	strb	w0, [x27,136]
 	mov	w28, 10
 	mov	w0, -43
 	strb	w0, [x27,137]
-	b	.L1516
-.L1570:
+	b	.L1518
+.L1572:
 	mov	w21, 7
-.L1604:
+.L1606:
 	mov	w28, 4
-.L1516:
+.L1518:
 	sub	w0, w25, #1
 	cmp	w0, 1
-	bhi	.L1601
+	bhi	.L1603
 	ldr	x0, [x29,128]
 	adrp	x24, .LANCHOR2
 	add	x24, x24, :lo12:.LANCHOR2
@@ -9696,10 +9708,10 @@ hynix_get_read_retry_default:
 	add	x19, x0, :lo12:.LANCHOR0
 	mov	w27, 55
 	add	x24, x24, 408
-.L1523:
+.L1525:
 	ldrb	w0, [x19,633]
 	cmp	w0, w23
-	bls	.L1530
+	bls	.L1532
 	add	x0, x19, x23, sxtw
 	ldr	x2, [x29,136]
 	ldrb	w0, [x0,736]
@@ -9710,7 +9722,7 @@ hynix_get_read_retry_default:
 	madd	x20, x0, x20, x2
 	add	x22, x22, x1
 	add	x20, x20, 32
-.L1525:
+.L1527:
 	str	w27, [x22,2056]
 	ldrb	w0, [x26,x25]
 	str	w0, [x22,2052]
@@ -9720,12 +9732,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x20,x25]
 	add	x25, x25, 1
 	cmp	w28, w25, uxtb
-	bhi	.L1525
+	bhi	.L1527
 	mov	x0, 0
-.L1526:
+.L1528:
 	add	w2, w0, 8
 	mov	x1, 0
-.L1527:
+.L1529:
 	add	x3, x1, x0
 	add	x1, x1, 4
 	add	x3, x24, x3
@@ -9735,10 +9747,10 @@ hynix_get_read_retry_default:
 	add	w3, w5, w3
 	strb	w3, [x20,w2,sxtw]
 	add	w2, w2, 8
-	bne	.L1527
+	bne	.L1529
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1526
+	bne	.L1528
 	add	w23, w23, 1
 	strb	wzr, [x20,16]
 	strb	wzr, [x20,24]
@@ -9748,11 +9760,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x20,48]
 	strb	wzr, [x20,41]
 	strb	wzr, [x20,49]
-	b	.L1523
-.L1601:
+	b	.L1525
+.L1603:
 	sub	w0, w25, #3
 	cmp	w0, 4
-	bhi	.L1530
+	bhi	.L1532
 	mul	w0, w28, w21
 	sub	w23, w28, #1
 	mov	w20, 0
@@ -9766,13 +9778,13 @@ hynix_get_read_retry_default:
 	adrp	x26, .LANCHOR4
 	add	x0, x23, 1
 	str	x0, [x29,112]
-.L1531:
+.L1533:
 	ldr	x0, [x29,128]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldrb	w1, [x0,633]
-	cmp	w1, w20
-	bhi	.L1569
-.L1530:
+	add	x1, x0, :lo12:.LANCHOR0
+	ldrb	w0, [x1,633]
+	cmp	w0, w20
+	bhi	.L1571
+.L1532:
 	ldr	x0, [x29,136]
 	strb	w28, [x0,1]
 	strb	w21, [x0,2]
@@ -9783,46 +9795,51 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp,80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1569:
-	add	x1, x0, x20, sxtw
-	ldrb	w1, [x1,736]
-	ldr	x0, [x0,536]
+.L1571:
+	add	x0, x1, x20, sxtw
+	ldrb	w23, [x0,736]
+	str	x1, [x29,104]
 	mov	x24, 160
-	ubfiz	x2, x1, 8, 8
-	ldr	x3, [x29,136]
-	add	x23, x0, x2
-	madd	x24, x1, x24, x3
+	mov	w0, w23
+	bl	zftl_flash_exit_slc_mode
+	ldr	x1, [x29,136]
+	sxtw	x0, w23
+	ubfiz	x2, x23, 8, 8
+	madd	x24, x0, x24, x1
+	ldr	x1, [x29,104]
+	add	x24, x24, 32
+	ldr	x0, [x1,536]
 	mov	w1, 255
-	str	w1, [x23,2056]
 	str	x1, [x29,104]
-	add	x24, x24, 32
+	add	x23, x0, x2
+	str	w1, [x23,2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 54
 	cmp	w25, 4
 	str	w0, [x23,2056]
 	ldr	x1, [x29,104]
-	bne	.L1532
+	bne	.L1534
 	mov	w0, 64
 	str	w1, [x23,2052]
 	str	w0, [x23,2048]
 	mov	w0, 204
-	b	.L1605
-.L1532:
+	b	.L1607
+.L1534:
 	cmp	w19, 1
-	bhi	.L1534
+	bhi	.L1536
 	ldrb	w0, [x27,128]
 	str	w0, [x23,2052]
 	mov	w0, 82
-	b	.L1606
-.L1534:
+	b	.L1608
+.L1536:
 	mov	w0, 174
 	str	w0, [x23,2052]
 	str	wzr, [x23,2048]
 	mov	w0, 176
-.L1605:
+.L1607:
 	str	w0, [x23,2052]
 	mov	w0, 77
-.L1606:
+.L1608:
 	str	w0, [x23,2048]
 	mov	w0, 22
 	str	w0, [x23,2056]
@@ -9836,13 +9853,13 @@ hynix_get_read_retry_default:
 	str	wzr, [x23,2056]
 	str	wzr, [x23,2052]
 	str	wzr, [x23,2052]
-	bne	.L1535
+	bne	.L1537
 	mov	w0, 31
 	str	w0, [x23,2052]
-	b	.L1536
-.L1535:
+	b	.L1538
+.L1537:
 	str	wzr, [x23,2052]
-.L1536:
+.L1538:
 	mov	w7, 2
 	str	w7, [x23,2052]
 	str	wzr, [x23,2052]
@@ -9852,89 +9869,89 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w19, 1
 	mov	w1, 16
-	bls	.L1538
+	bls	.L1540
 	ldr	x7, [x29,104]
 	cmp	w25, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1538:
+.L1540:
 	adrp	x0, .LANCHOR4
 	mov	x7, 0
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	x0, [x0,1192]
-.L1539:
+.L1541:
 	ldr	w8, [x23,2048]
 	strb	w8, [x0,x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1539
+	bhi	.L1541
 	cmp	w25, 7
-	bne	.L1540
+	bne	.L1542
 	mov	w1, 0
-.L1542:
+.L1544:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1541
+	beq	.L1543
 	ldrb	w7, [x0,1]
 	cmp	w7, 10
-	beq	.L1541
+	beq	.L1543
 	add	w1, w1, 1
 	add	x0, x0, 4
 	uxtb	w1, w1
 	cmp	w1, 8
-	bne	.L1542
-	b	.L1543
-.L1541:
-	cmp	w1, 7
 	bne	.L1544
+	b	.L1545
 .L1543:
+	cmp	w1, 7
+	bne	.L1546
+.L1545:
 	adrp	x0, .LC132
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC132
 	bl	printk
-.L1545:
-	b	.L1545
-.L1540:
+.L1547:
+	b	.L1547
+.L1542:
 	cmp	w25, 6
-	bne	.L1544
+	bne	.L1546
 	mov	x1, 0
-.L1546:
+.L1548:
 	ldrb	w7, [x0,x1]
 	cmp	w7, 12
-	beq	.L1544
+	beq	.L1546
 	add	x7, x0, x1
 	ldrb	w7, [x7,8]
 	cmp	w7, 4
-	beq	.L1544
+	beq	.L1546
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1546
+	bne	.L1548
 	adrp	x0, .LC132
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC132
 	bl	printk
-.L1548:
-	b	.L1548
-.L1544:
+.L1550:
+	b	.L1550
+.L1546:
 	add	x0, x26, :lo12:.LANCHOR4
 	ldr	x9, [x0,1192]
 	mov	x0, 0
-.L1549:
+.L1551:
 	ldr	w1, [x29,120]
 	cmp	w1, w0
-	ble	.L1608
+	ble	.L1610
 	ldr	w1, [x23,2048]
 	strb	w1, [x9,x0]
 	add	x0, x0, 1
-	b	.L1549
-.L1608:
+	b	.L1551
+.L1610:
 	add	x0, x26, :lo12:.LANCHOR4
 	mov	w8, w22
 	mov	w7, 8
 	ldr	x11, [x0,1192]
-.L1552:
+.L1554:
 	mov	w0, 0
-.L1551:
+.L1553:
 	add	w1, w0, w8
 	add	w0, w0, 1
 	sbfiz	x1, x1, 2, 32
@@ -9942,54 +9959,54 @@ hynix_get_read_retry_default:
 	ldr	w10, [x11,x1]
 	mvn	w10, w10
 	str	w10, [x11,x1]
-	bne	.L1551
+	bne	.L1553
 	ldr	w0, [x29,124]
 	subs	w7, w7, #1
 	add	w8, w8, w0
-	bne	.L1552
+	bne	.L1554
 	mov	x7, 0
 	mov	w15, 1
-.L1553:
+.L1555:
 	add	x0, x26, :lo12:.LANCHOR4
 	mov	w1, 0
 	mov	w10, w1
 	ldr	x14, [x0,1192]
-.L1557:
+.L1559:
 	lsl	w8, w15, w10
 	mov	w12, w7
 	mov	w0, 16
 	mov	w11, 0
-.L1555:
+.L1557:
 	ldr	w13, [x14,w12,sxtw 2]
 	add	w12, w12, w22
 	and	w13, w8, w13
 	cmp	w13, w8
 	csinc	w11, w11, w11, ne
 	subs	w0, w0, #1
-	bne	.L1555
+	bne	.L1557
 	cmp	w11, 9
 	orr	w8, w1, w8
 	add	w10, w10, 1
 	csel	w1, w8, w1, cs
 	cmp	w10, 32
-	bne	.L1557
+	bne	.L1559
 	str	w1, [x14,x7,lsl 2]
 	add	x7, x7, 1
 	cmp	w22, w7
-	bgt	.L1553
+	bgt	.L1555
 	add	x1, x26, :lo12:.LANCHOR4
 	mov	x7, 0
 	mov	w8, w7
 	ldr	x1, [x1,1192]
-.L1560:
+.L1562:
 	ldr	w10, [x1,x7]
 	add	x7, x7, 4
 	cmp	w10, wzr
 	csinc	w8, w8, w8, ne
 	cmp	x7, 32
-	bne	.L1560
+	bne	.L1562
 	cmp	w8, 7
-	ble	.L1561
+	ble	.L1563
 	adrp	x0, .LC133
 	mov	w2, 1
 	add	x0, x0, :lo12:.LC133
@@ -9999,39 +10016,39 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC132
 	bl	printk
-.L1562:
-	b	.L1562
-.L1561:
+.L1564:
+	b	.L1564
+.L1563:
 	cmp	w25, 6
 	mov	w7, 4
-	beq	.L1563
+	beq	.L1565
 	cmp	w25, 7
 	mov	w7, 10
 	mov	w1, 8
 	csel	w7, w1, w7, ne
-.L1563:
+.L1565:
 	mov	w8, 0
-.L1564:
+.L1566:
 	mov	x1, 0
-.L1565:
+.L1567:
 	add	w10, w0, w1
 	ldrb	w11, [x9,x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
 	strb	w11, [x24,w10,sxtw]
-	bhi	.L1565
+	bhi	.L1567
 	add	w8, w8, 1
 	ldr	x1, [x29,112]
 	cmp	w8, w21
 	add	w0, w0, w7
 	add	x9, x9, x1
-	blt	.L1564
+	blt	.L1566
 	mov	w24, 255
 	str	w24, [x23,2056]
 	bl	nandc_wait_flash_ready
 	cmp	w19, 1
 	mov	w0, 56
-	bhi	.L1607
+	bhi	.L1609
 	mov	w0, 54
 	str	w0, [x23,2056]
 	ldrb	w0, [x27,128]
@@ -10046,12 +10063,12 @@ hynix_get_read_retry_default:
 	str	w24, [x23,2052]
 	str	w24, [x23,2052]
 	str	w24, [x23,2052]
-.L1607:
+.L1609:
 	str	w0, [x23,2056]
 	add	w20, w20, 1
 	bl	nandc_wait_flash_ready
 	uxtb	w20, w20
-	b	.L1531
+	b	.L1533
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.align	2
 	.global	flash_get_read_retry_tbl
@@ -10064,9 +10081,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	uxtb	w1, w1
 	cmp	w1, 6
-	bhi	.L1609
+	bhi	.L1611
 	bl	hynix_get_read_retry_default
-.L1609:
+.L1611:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
@@ -10089,51 +10106,51 @@ nandc_xfer_done:
 	strb	wzr, [x1,1200]
 	ldrb	w1, [x20,516]
 	cmp	w1, 9
-	bne	.L1612
+	bne	.L1614
 	ldr	x24, [x20,536]
 	ldr	w0, [x24,16]
 	str	w0, [x29,64]
 	ldr	w20, [x24,48]
 	ubfx	x20, x20, 1, 1
-	cbnz	w20, .L1632
+	cbnz	w20, .L1634
 	adrp	x21, .LC137
 	adrp	x23, .LC136
 	add	x21, x21, :lo12:.LC137
 	add	x23, x23, :lo12:.LC136
-	b	.L1614
-.L1632:
+	b	.L1616
+.L1634:
 	adrp	x21, .LC135
 	adrp	x22, .LC136
 	mov	w20, 0
 	add	x21, x21, :lo12:.LC135
 	add	x22, x22, :lo12:.LC136
-.L1613:
+.L1615:
 	ldr	w2, [x24,64]
 	ldr	w1, [x29,64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x1, x1, 22, 6
 	cmp	w2, w1
-	bge	.L1616
+	bge	.L1618
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,536]
 	ldr	w0, [x0]
 	str	w0, [x29,72]
 	ldr	w0, [x29,72]
-	tbz	x0, 13, .L1615
+	tbz	x0, 13, .L1617
 	ldr	w0, [x29,72]
-	tbz	x0, 17, .L1615
+	tbz	x0, 17, .L1617
 	ldr	w1, [x29,72]
 	adrp	x0, .LC134
 	add	x0, x0, :lo12:.LC134
 	ubfx	x1, x1, 17, 1
 	bl	printk
-	b	.L1616
-.L1615:
+	b	.L1618
+.L1617:
 	ldr	w0, [x29,64]
 	add	w20, w20, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w20, w0, lsl 12
-	bne	.L1613
+	bne	.L1615
 	ldr	w2, [x24,64]
 	mov	w1, w20
 	ldr	w3, [x29,64]
@@ -10148,15 +10165,15 @@ nandc_xfer_done:
 	ldr	x1, [x1,536]
 	bl	rknand_print_hex
 	ldr	w0, [x29,72]
-	tbz	x0, 13, .L1613
+	tbz	x0, 13, .L1615
 	add	x0, x23, :lo12:.LANCHOR4
 	mov	w1, 1
 	strb	w1, [x0,1200]
-.L1616:
+.L1618:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x20, x20, 680
 	ldr	w0, [x20,32]
-	cbz	w0, .L1620
+	cbz	w0, .L1622
 	ldr	w1, [x29,64]
 	mov	w2, 0
 	ldr	w0, [x20,24]
@@ -10167,15 +10184,15 @@ nandc_xfer_done:
 	ldr	w0, [x20,28]
 	ubfx	x1, x1, 22, 6
 	lsl	w1, w1, 2
-	b	.L1660
-.L1622:
+	b	.L1662
+.L1624:
 	add	x22, x19, :lo12:.LANCHOR0
 	add	w20, w20, 1
 	ldr	x0, [x22,536]
 	ldr	w0, [x0,16]
 	str	w0, [x29,64]
 	and	w0, w20, 16777215
-	cbnz	w0, .L1614
+	cbnz	w0, .L1616
 	ldr	w2, [x29,64]
 	mov	w1, w20
 	ldr	w3, [x24,64]
@@ -10187,13 +10204,13 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	w3, 64
 	bl	rknand_print_hex
-.L1614:
+.L1616:
 	ldr	w0, [x29,64]
-	tbz	x0, 20, .L1622
+	tbz	x0, 20, .L1624
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x20, x20, 680
 	ldr	w0, [x20,32]
-	cbz	w0, .L1620
+	cbz	w0, .L1622
 	ldr	w1, [x29,64]
 	mov	w2, 1
 	ldr	w0, [x20,24]
@@ -10204,49 +10221,49 @@ nandc_xfer_done:
 	ldr	w0, [x20,28]
 	ubfx	x1, x1, 22, 6
 	lsl	w1, w1, 2
-	b	.L1659
-.L1612:
+	b	.L1661
+.L1614:
 	ldr	x23, [x20,536]
 	ldr	w0, [x23,8]
 	str	w0, [x29,64]
 	ldr	w20, [x23,16]
 	ubfx	x20, x20, 1, 1
-	cbnz	w20, .L1633
+	cbnz	w20, .L1635
 	adrp	x21, .LC137
 	adrp	x24, .LC136
 	add	x21, x21, :lo12:.LC137
 	add	x24, x24, :lo12:.LC136
-	b	.L1625
-.L1633:
+	b	.L1627
+.L1635:
 	adrp	x21, .LC135
 	adrp	x22, .LC136
 	mov	w20, 0
 	add	x21, x21, :lo12:.LC135
 	add	x22, x22, :lo12:.LC136
-.L1624:
+.L1626:
 	ldr	w2, [x23,28]
 	ldr	w1, [x29,64]
 	ubfx	x2, x2, 16, 5
 	ubfx	x1, x1, 22, 6
 	cmp	w2, w1
-	bge	.L1627
+	bge	.L1629
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,536]
 	ldr	w0, [x0]
 	str	w0, [x29,72]
 	ldr	w0, [x29,72]
-	tbz	x0, 13, .L1626
+	tbz	x0, 13, .L1628
 	ldr	w0, [x29,72]
-	tbz	x0, 17, .L1626
+	tbz	x0, 17, .L1628
 	ldr	w1, [x29,72]
 	adrp	x0, .LC138
 	add	x0, x0, :lo12:.LC138
 	bl	printk
-	b	.L1627
-.L1626:
+	b	.L1629
+.L1628:
 	add	w20, w20, 1
 	and	w0, w20, 16777215
-	cbnz	w0, .L1624
+	cbnz	w0, .L1626
 	ldr	w2, [x23,28]
 	mov	w1, w20
 	ldr	w3, [x29,64]
@@ -10260,12 +10277,12 @@ nandc_xfer_done:
 	mov	w3, 64
 	ldr	x1, [x1,536]
 	bl	rknand_print_hex
-	b	.L1624
-.L1627:
+	b	.L1626
+.L1629:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x20, x20, 680
 	ldr	w0, [x20,32]
-	cbz	w0, .L1620
+	cbz	w0, .L1622
 	ldr	w1, [x29,64]
 	mov	w2, 0
 	ldr	w0, [x20,24]
@@ -10276,17 +10293,17 @@ nandc_xfer_done:
 	ldr	w0, [x20,28]
 	ubfx	x1, x1, 22, 6
 	lsl	w1, w1, 7
-.L1660:
+.L1662:
 	mov	w2, 0
-	b	.L1658
-.L1631:
+	b	.L1660
+.L1633:
 	add	x22, x19, :lo12:.LANCHOR0
 	add	w20, w20, 1
 	ldr	x0, [x22,536]
 	ldr	w0, [x0,8]
 	str	w0, [x29,64]
 	and	w0, w20, 16777215
-	cbnz	w0, .L1625
+	cbnz	w0, .L1627
 	ldr	w2, [x29,64]
 	mov	w1, w20
 	ldr	w3, [x23,28]
@@ -10298,13 +10315,13 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	w3, 64
 	bl	rknand_print_hex
-.L1625:
+.L1627:
 	ldr	w0, [x29,64]
-	tbz	x0, 20, .L1631
+	tbz	x0, 20, .L1633
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x20, x20, 680
 	ldr	w0, [x20,32]
-	cbz	w0, .L1620
+	cbz	w0, .L1622
 	ldr	w1, [x29,64]
 	mov	w2, 1
 	ldr	w0, [x20,24]
@@ -10315,11 +10332,11 @@ nandc_xfer_done:
 	ldr	w0, [x20,28]
 	ubfx	x1, x1, 22, 6
 	lsl	w1, w1, 7
-.L1659:
+.L1661:
 	mov	w2, 1
-.L1658:
+.L1660:
 	bl	rknand_dma_unmap_single
-.L1620:
+.L1622:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -10348,19 +10365,19 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	mov	w0, 0
-	cbnz	w20, .L1691
+	cbnz	w20, .L1693
 	adrp	x19, .LANCHOR0
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x2,516]
 	cmp	w1, 9
-	bne	.L1663
+	bne	.L1665
 	ldr	x5, [x2,536]
 	lsr	w22, w22, 2
 	mov	w4, 1
 	mov	w3, w0
-.L1664:
+.L1666:
 	cmp	w3, w22
-	bcs	.L1700
+	bcs	.L1702
 	uxtw	x1, w3
 	add	x1, x1, 84
 	ldr	w1, [x5,x1,lsl 2]
@@ -10372,30 +10389,30 @@ nandc_xfer:
 	and	w1, w1, w2
 	and	w4, w4, w1
 	ldr	w1, [x29,72]
-	tbnz	x1, 2, .L1683
+	tbnz	x1, 2, .L1685
 	ldr	w1, [x29,72]
-	tbnz	x1, 18, .L1683
+	tbnz	x1, 18, .L1685
 	ldr	w2, [x29,72]
 	ldr	w1, [x29,72]
 	ubfx	x2, x2, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w2, w1
 	ldr	w1, [x29,72]
-	ble	.L1666
+	ble	.L1668
 	ubfx	x1, x1, 3, 7
-	b	.L1667
-.L1666:
+	b	.L1669
+.L1668:
 	ubfx	x1, x1, 19, 7
-.L1667:
+.L1669:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-	b	.L1665
-.L1683:
+	b	.L1667
+.L1685:
 	mov	w0, -1
-.L1665:
+.L1667:
 	add	w3, w3, 1
-	b	.L1664
-.L1700:
+	b	.L1666
+.L1702:
 	add	x22, x19, :lo12:.LANCHOR0
 	cmp	w4, wzr
 	ldr	x1, [x22,536]
@@ -10406,7 +10423,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w20, w1
 	cmp	w1, 139264
-	bne	.L1670
+	bne	.L1672
 	adrp	x0, .LC139
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC139
@@ -10415,11 +10432,11 @@ nandc_xfer:
 	ldr	x0, [x22,536]
 	str	w20, [x0]
 	mov	w0, -1
-.L1670:
-	tbz	x20, 13, .L1671
+.L1672:
+	tbz	x20, 13, .L1673
 	adrp	x1, .LANCHOR4+1200
 	ldrb	w1, [x1,#:lo12:.LANCHOR4+1200]
-	cbz	w1, .L1671
+	cbz	w1, .L1673
 	adrp	x0, .LC140
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC140
@@ -10428,8 +10445,8 @@ nandc_xfer:
 	ldr	x0, [x19,536]
 	mov	w1, 1
 	str	w1, [x0,16]
-	b	.L1672
-.L1663:
+	b	.L1674
+.L1665:
 	ldrb	w0, [x2,724]
 	mov	w5, 128
 	lsr	w6, w22, 1
@@ -10439,10 +10456,10 @@ nandc_xfer:
 	csel	w5, w0, w5, cc
 	mov	w1, w20
 	mov	w4, w20
-.L1674:
+.L1676:
 	cmp	w4, w6
 	add	w7, w1, w5
-	bcs	.L1701
+	bcs	.L1703
 	ldr	x0, [x2,680]
 	and	x1, x1, 4294967292
 	ldr	w0, [x0,x1]
@@ -10459,24 +10476,24 @@ nandc_xfer:
 	add	w3, w3, 4
 	strb	w0, [x23,x1]
 	mov	w1, w7
-	b	.L1674
-.L1701:
+	b	.L1676
+.L1703:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 0
 	lsr	w22, w22, 2
 	ldr	x6, [x0,536]
 	mov	w0, w2
-.L1676:
+.L1678:
 	cmp	w2, w22
-	bcs	.L1702
+	bcs	.L1704
 	uxtw	x1, w2
 	add	x1, x1, 8
 	ldr	w1, [x6,x1,lsl 2]
 	str	w1, [x29,72]
 	ldr	w1, [x29,72]
-	tbnz	x1, 2, .L1686
+	tbnz	x1, 2, .L1688
 	ldr	w1, [x29,72]
-	tbnz	x1, 15, .L1686
+	tbnz	x1, 15, .L1688
 	ldr	w3, [x29,72]
 	ubfx	x5, x3, 3, 5
 	ldr	w3, [x29,72]
@@ -10489,26 +10506,26 @@ nandc_xfer:
 	orr	w1, w4, w1, lsl 5
 	cmp	w3, w1
 	ldr	w1, [x29,72]
-	bls	.L1678
+	bls	.L1680
 	ubfx	x3, x1, 3, 5
 	ldr	w1, [x29,72]
 	ubfx	x1, x1, 27, 1
-	b	.L1699
-.L1678:
+	b	.L1701
+.L1680:
 	ubfx	x3, x1, 16, 5
 	ldr	w1, [x29,72]
 	ubfx	x1, x1, 29, 1
-.L1699:
+.L1701:
 	orr	w1, w3, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-	b	.L1677
-.L1686:
+	b	.L1679
+.L1688:
 	mov	w0, -1
-.L1677:
+.L1679:
 	add	w2, w2, 1
-	b	.L1676
-.L1702:
+	b	.L1678
+.L1704:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,536]
 	str	wzr, [x1,16]
@@ -10517,7 +10534,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w20, w1
 	cmp	w1, 139264
-	bne	.L1671
+	bne	.L1673
 	adrp	x0, .LC141
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC141
@@ -10525,24 +10542,24 @@ nandc_xfer:
 	bl	printk
 	ldr	x0, [x19,536]
 	str	w20, [x0]
-	b	.L1672
-.L1671:
+	b	.L1674
+.L1673:
 	cmn	w0, #1
-	beq	.L1691
+	beq	.L1693
 	ldr	w1, [x23]
 	cmn	w1, #1
-	bne	.L1691
+	bne	.L1693
 	ldr	w1, [x23,4]
 	cmn	w1, #1
-	bne	.L1691
+	bne	.L1693
 	ldr	w1, [x21]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1691
-.L1672:
+	b	.L1693
+.L1674:
 	mov	w0, -1
-.L1691:
+.L1693:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldr	x23, [sp,48]
@@ -10572,36 +10589,36 @@ flash_read_page:
 	and	w20, w1, 2097151
 	ubfx	x24, x23, 24, 2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L1704
+	tbz	x0, 4, .L1706
 	adrp	x0, .LC142
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC142
 	mov	w2, w24
 	mov	w3, w23
 	bl	printk
-.L1704:
+.L1706:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w24, .L1705
+	cbnz	w24, .L1707
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1706
-.L1705:
+	b	.L1708
+.L1707:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,624]
 	ldrb	w0, [x0,12]
 	cmp	w0, 3
-	bne	.L1707
+	bne	.L1709
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w24, [x0,8]
-	b	.L1706
-.L1707:
+	b	.L1708
+.L1709:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-.L1706:
+.L1708:
 	ubfiz	x5, x21, 8, 8
 	and	w23, w23, 255
 	add	x19, x19, x5
@@ -10615,19 +10632,19 @@ flash_read_page:
 	str	w0, [x19,2052]
 	mov	w0, 48
 	str	w0, [x19,2056]
-	cbz	w24, .L1708
+	cbz	w24, .L1710
 	add	x22, x22, :lo12:.LANCHOR0
 	ldr	x0, [x22,624]
 	ldrb	w0, [x0,12]
 	cmp	w0, 3
-	bne	.L1708
+	bne	.L1710
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w24
-	b	.L1719
-.L1708:
+	b	.L1721
+.L1710:
 	mov	w0, w20
-.L1719:
+.L1721:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -10687,11 +10704,11 @@ micron_read_retrial:
 	adrp	x0, .LC143
 	add	x0, x0, :lo12:.LC143
 	str	x0, [x29,104]
-.L1721:
+.L1723:
 	add	x0, x23, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1216]
 	cmp	w20, w0
-	bcs	.L1725
+	bcs	.L1727
 	ldr	x0, [x29,112]
 	add	w27, w20, 1
 	add	x1, x22, x0
@@ -10716,7 +10733,7 @@ micron_read_retrial:
 	mov	w6, w0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L1722
+	tbz	x0, 12, .L1724
 	ldr	x0, [x29,104]
 	mov	w1, w20
 	mov	w2, w21
@@ -10725,9 +10742,9 @@ micron_read_retrial:
 	str	x6, [x29,96]
 	bl	printk
 	ldr	x6, [x29,96]
-.L1722:
+.L1724:
 	cmn	w6, #1
-	beq	.L1723
+	beq	.L1725
 	adrp	x0, .LANCHOR4
 	cmn	w28, #1
 	add	x0, x0, :lo12:.LANCHOR4
@@ -10736,13 +10753,13 @@ micron_read_retrial:
 	ldr	x26, [x0,1208]
 	ldr	w0, [x29,124]
 	cmp	w6, w0
-	bcc	.L1730
-.L1723:
+	bcc	.L1732
+.L1725:
 	mov	w20, w27
-	b	.L1721
-.L1730:
+	b	.L1723
+.L1732:
 	mov	w28, w6
-.L1725:
+.L1727:
 	add	x19, x22, x19, lsl 8
 	mov	w0, 239
 	str	w0, [x19,2056]
@@ -10756,16 +10773,16 @@ micron_read_retrial:
 	str	wzr, [x19,2048]
 	str	wzr, [x19,2048]
 	cmp	w28, w0
-	bcc	.L1727
+	bcc	.L1729
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1727:
+.L1729:
 	cmn	w28, #1
-	beq	.L1731
+	beq	.L1733
 	cmp	w28, 256
-	bne	.L1728
-.L1731:
+	bne	.L1730
+.L1733:
 	adrp	x0, .LC144
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC144
@@ -10773,7 +10790,7 @@ micron_read_retrial:
 	mov	w3, w20
 	mov	w4, w28
 	bl	printk
-.L1728:
+.L1730:
 	mov	w0, w28
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -10818,19 +10835,19 @@ toshiba_3d_read_retrial:
 	cmp	w1, 36
 	mov	w1, 26
 	csel	w21, w21, w1, ne
-	cbnz	w19, .L1745
+	cbnz	w19, .L1747
 	str	x0, [x29,112]
 	adrp	x0, .LC145
 	add	x0, x0, :lo12:.LC145
 	mov	w19, -1
 	mov	w28, 1
 	str	x0, [x29,104]
-.L1752:
+.L1754:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 36
 	mov	x0, x23
-	bne	.L1746
+	bne	.L1748
 	mov	w1, w28
 	mov	w2, 0
 	bl	toshiba_tlc_set_rr_para
@@ -10838,11 +10855,11 @@ toshiba_3d_read_retrial:
 	mov	w1, 93
 	add	x0, x25, x0
 	str	w1, [x0,8]
-	b	.L1747
-.L1746:
+	b	.L1749
+.L1748:
 	mov	w1, w28
 	bl	toshiba_3d_set_slc_rr_para
-.L1747:
+.L1749:
 	ldr	w4, [x29,124]
 	mov	w0, w22
 	mov	w1, w24
@@ -10852,7 +10869,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L1748
+	tbz	x0, 4, .L1750
 	ldr	x0, [x29,104]
 	mov	w3, w4
 	mov	w1, w28
@@ -10860,9 +10877,9 @@ toshiba_3d_read_retrial:
 	str	x4, [x29,96]
 	bl	printk
 	ldr	x4, [x29,96]
-.L1748:
+.L1750:
 	cmn	w4, #1
-	beq	.L1749
+	beq	.L1751
 	adrp	x0, .LANCHOR4
 	cmn	w19, #1
 	add	x0, x0, :lo12:.LANCHOR4
@@ -10873,53 +10890,53 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0,724]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1768
-.L1749:
+	bcc	.L1770
+.L1751:
 	add	w28, w28, 1
 	cmp	w28, w21
-	bne	.L1752
-	b	.L1751
-.L1768:
+	bne	.L1754
+	b	.L1753
+.L1770:
 	mov	w21, w28
 	mov	w19, w4
-.L1751:
+.L1753:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 36
 	mov	x0, x23
-	bne	.L1753
+	bne	.L1755
 	mov	w1, 0
 	mov	w2, w1
-	b	.L1791
-.L1753:
+	b	.L1793
+.L1755:
 	mov	w1, 0
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1754
-.L1745:
+	b	.L1756
+.L1747:
 	mov	x28, x0
 	adrp	x0, .LC146
 	add	x0, x0, :lo12:.LC146
 	mov	w19, -1
 	mov	w21, 1
 	str	x0, [x29,104]
-.L1761:
+.L1763:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 36
 	mov	x0, x23
-	bne	.L1755
+	bne	.L1757
 	mov	w1, w21
 	mov	w2, 1
 	bl	toshiba_tlc_set_rr_para
 	add	x0, x25, x28
 	mov	w1, 93
-	b	.L1790
-.L1755:
+	b	.L1792
+.L1757:
 	mov	w1, w21
 	bl	toshiba_3d_set_tlc_rr_para
 	add	x0, x25, x28
 	mov	w1, 38
-.L1790:
+.L1792:
 	str	w1, [x0,8]
 	mov	x2, x26
 	mov	w0, w22
@@ -10930,7 +10947,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L1757
+	tbz	x0, 4, .L1759
 	ldr	x0, [x29,104]
 	mov	w3, w4
 	mov	w1, w21
@@ -10938,9 +10955,9 @@ toshiba_3d_read_retrial:
 	str	x4, [x29,96]
 	bl	printk
 	ldr	x4, [x29,96]
-.L1757:
+.L1759:
 	cmn	w4, #1
-	beq	.L1758
+	beq	.L1760
 	adrp	x0, .LANCHOR4
 	cmn	w19, #1
 	add	x0, x0, :lo12:.LANCHOR4
@@ -10951,34 +10968,34 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0,724]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1769
-.L1758:
+	bcc	.L1771
+.L1760:
 	ldr	w0, [x29,112]
 	add	w21, w21, 1
 	cmp	w21, w0
-	bne	.L1761
-	b	.L1760
-.L1769:
+	bne	.L1763
+	b	.L1762
+.L1771:
 	mov	w19, w4
-.L1760:
+.L1762:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 36
 	mov	x0, x23
-	bne	.L1762
+	bne	.L1764
 	mov	w1, 0
 	mov	w2, 1
-.L1791:
+.L1793:
 	bl	toshiba_tlc_set_rr_para
-	b	.L1754
-.L1762:
+	b	.L1756
+.L1764:
 	mov	w1, 0
 	bl	toshiba_3d_set_tlc_rr_para
-.L1754:
+.L1756:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 36
-	bne	.L1763
+	bne	.L1765
 	ubfiz	x22, x22, 8, 8
 	mov	w0, 85
 	add	x25, x25, x22
@@ -10987,21 +11004,21 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25,2052]
 	str	wzr, [x25,2048]
 	str	w0, [x25,2056]
-.L1763:
+.L1765:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x20,724]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1764
+	bcc	.L1766
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1764:
+.L1766:
 	cmn	w19, #1
-	beq	.L1770
+	beq	.L1772
 	cmp	w19, 256
-	bne	.L1765
-.L1770:
+	bne	.L1767
+.L1772:
 	adrp	x0, .LC147
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC147
@@ -11009,7 +11026,7 @@ toshiba_3d_read_retrial:
 	mov	w3, w21
 	mov	w4, w19
 	bl	printk
-.L1765:
+.L1767:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
@@ -11049,20 +11066,20 @@ toshiba_read_retrial:
 	add	x21, x22, x21, lsl 8
 	uxtb	w0, w0
 	cmp	w0, 1
-	bls	.L1793
+	bls	.L1795
 	ldrb	w0, [x1,672]
-	cbz	w0, .L1794
+	cbz	w0, .L1796
 	mov	w0, 1
 	mov	w25, 1
 	bl	nandc_set_if_mode
-.L1794:
+.L1796:
 	ubfiz	x0, x23, 8, 8
 	mov	w1, 92
 	add	x0, x22, x0
 	str	w1, [x0,2056]
 	mov	w1, 197
 	str	w1, [x0,2056]
-.L1793:
+.L1795:
 	ldr	x0, [x29,112]
 	mov	w20, 1
 	mov	w24, -1
@@ -11071,13 +11088,13 @@ toshiba_read_retrial:
 	str	x0, [x29,104]
 	ubfiz	x0, x23, 8, 8
 	str	x0, [x29,96]
-.L1795:
+.L1797:
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1216]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcs	.L1826
+	bcs	.L1828
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w20
 	ldrb	w0, [x0,725]
@@ -11085,27 +11102,27 @@ toshiba_read_retrial:
 	uxtb	w0, w0
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1796
+	bhi	.L1798
 	bl	sandisk_set_rr_para
-	b	.L1797
-.L1796:
+	b	.L1799
+.L1798:
 	bl	toshiba_set_rr_para
-.L1797:
+.L1799:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	cmp	w0, 34
-	bne	.L1798
+	bne	.L1800
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1216]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1798
+	bne	.L1800
 	ldr	x0, [x29,104]
 	mov	w1, 179
 	add	x0, x22, x0
 	str	w1, [x0,8]
-.L1798:
+.L1800:
 	ldr	x0, [x29,96]
 	mov	w1, 38
 	ldr	w4, [x29,120]
@@ -11120,7 +11137,7 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	w28, w0
-	beq	.L1801
+	beq	.L1803
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR4
@@ -11131,13 +11148,13 @@ toshiba_read_retrial:
 	ldrb	w0, [x0,724]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1803
-.L1801:
+	bcc	.L1805
+.L1803:
 	add	w20, w20, 1
-	b	.L1795
-.L1826:
+	b	.L1797
+.L1828:
 	mov	w28, w24
-.L1803:
+.L1805:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w0, [x0,725]
@@ -11145,12 +11162,12 @@ toshiba_read_retrial:
 	uxtb	w0, w0
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1805
+	bhi	.L1807
 	bl	sandisk_set_rr_para
-	b	.L1806
-.L1805:
+	b	.L1808
+.L1807:
 	bl	toshiba_set_rr_para
-.L1806:
+.L1808:
 	ldr	x0, [x29,112]
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x0, x0, 8
@@ -11160,16 +11177,16 @@ toshiba_read_retrial:
 	ldrb	w0, [x19,724]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1807
+	bcc	.L1809
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1807:
+.L1809:
 	cmn	w28, #1
-	beq	.L1813
+	beq	.L1815
 	cmp	w28, 256
-	bne	.L1808
-.L1813:
+	bne	.L1810
+.L1815:
 	adrp	x0, .LC147
 	ldr	w2, [x29,124]
 	add	x0, x0, :lo12:.LC147
@@ -11177,12 +11194,12 @@ toshiba_read_retrial:
 	mov	w3, w20
 	mov	w4, w28
 	bl	printk
-.L1808:
+.L1810:
 	bl	nandc_wait_flash_ready
-	cbz	w25, .L1810
+	cbz	w25, .L1812
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1810:
+.L1812:
 	mov	w0, w28
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11220,9 +11237,9 @@ hynix_read_retrial:
 	bl	nandc_wait_flash_ready
 	mov	w6, 0
 	adrp	x7, .LANCHOR4
-.L1828:
+.L1830:
 	cmp	w6, w24
-	bcs	.L1832
+	bcs	.L1834
 	add	w20, w20, 1
 	mov	w0, w22
 	str	x7, [x29,104]
@@ -11241,7 +11258,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldr	x6, [x29,112]
 	ldr	x7, [x29,104]
-	beq	.L1830
+	beq	.L1832
 	add	x1, x7, :lo12:.LANCHOR4
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -11251,29 +11268,29 @@ hynix_read_retrial:
 	ldrb	w1, [x1,724]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1837
-.L1830:
+	bcc	.L1839
+.L1832:
 	add	w6, w6, 1
-	b	.L1828
-.L1837:
+	b	.L1830
+.L1839:
 	mov	w19, w0
-.L1832:
+.L1834:
 	add	x28, x28, :lo12:.LANCHOR0
 	add	x21, x27, x21
 	ldrb	w0, [x28,724]
 	strb	w20, [x21,8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1834
+	bcc	.L1836
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1834:
+.L1836:
 	cmn	w19, #1
-	beq	.L1838
+	beq	.L1840
 	cmp	w19, 256
-	bne	.L1835
-.L1838:
+	bne	.L1837
+.L1840:
 	adrp	x0, .LC148
 	mov	w1, w6
 	add	x0, x0, :lo12:.LC148
@@ -11281,7 +11298,7 @@ hynix_read_retrial:
 	mov	w3, w6
 	mov	w4, w19
 	bl	printk
-.L1835:
+.L1837:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11320,7 +11337,7 @@ flash_ddr_tuning_read:
 	mov	w21, 6
 	mov	w19, -1
 	str	x0, [x29,104]
-.L1853:
+.L1855:
 	mov	w0, w21
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29,116]
@@ -11332,7 +11349,7 @@ flash_ddr_tuning_read:
 	mov	w4, w0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L1848
+	tbz	x0, 4, .L1850
 	ldr	x0, [x29,104]
 	mov	w3, w4
 	mov	w1, w21
@@ -11340,10 +11357,10 @@ flash_ddr_tuning_read:
 	str	x4, [x29,96]
 	bl	printk
 	ldr	x4, [x29,96]
-.L1848:
+.L1850:
 	add	w0, w25, 1
 	cmp	w4, w0
-	bhi	.L1849
+	bhi	.L1851
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	x23, [x0,1192]
@@ -11352,62 +11369,62 @@ flash_ddr_tuning_read:
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrb	w0, [x0,724]
 	cmp	w4, w0, lsr 2
-	bcs	.L1858
+	bcs	.L1860
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1858
+	bls	.L1860
 	sub	w26, w21, w27
 	mov	w25, w4
 	mov	w19, 0
-	b	.L1851
-.L1849:
+	b	.L1853
+.L1851:
 	cmp	w28, w27
-	bcs	.L1859
+	bcs	.L1861
 	cmp	w27, 7
 	sub	w22, w26, w27
-	bhi	.L1852
+	bhi	.L1854
 	mov	w28, w27
-	b	.L1859
-.L1858:
+	b	.L1861
+.L1860:
 	mov	w26, w21
 	mov	w25, w4
 	mov	w19, 0
-	b	.L1850
-.L1859:
+	b	.L1852
+.L1861:
 	mov	w27, 0
-.L1850:
+.L1852:
 	add	w21, w21, 2
 	cmp	w21, 50
-	bne	.L1853
-.L1851:
+	bne	.L1855
+.L1853:
 	cmp	w28, w27
 	csel	w26, w26, w22, ls
-.L1852:
-	cbz	w26, .L1854
+.L1854:
+	cbz	w26, .L1856
 	adrp	x0, .LANCHOR0+724
 	mov	w1, 3
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+724]
 	udiv	w0, w0, w1
 	cmp	w25, w0
-	bcs	.L1854
+	bcs	.L1856
 	adrp	x0, .LC150
 	mov	w1, w26
 	add	x0, x0, :lo12:.LC150
 	bl	printk
 	mov	w0, w26
-	b	.L1867
-.L1854:
+	b	.L1869
+.L1856:
 	ldrb	w0, [x29,120]
-.L1867:
+.L1869:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1856
+	cbz	w19, .L1858
 	adrp	x0, .LC151
 	ldr	w1, [x29,124]
 	add	x0, x0, :lo12:.LC151
 	mov	w2, w20
 	mov	w25, w19
 	bl	printk
-.L1856:
+.L1858:
 	mov	w0, w25
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11438,53 +11455,53 @@ flash_read_page_en:
 	mov	w23, w4
 	ubfx	x26, x19, 24, 2
 	cmp	w0, w21
-	bhi	.L1869
+	bhi	.L1871
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 377
+	mov	w2, 380
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1869:
+.L1871:
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x0, x21, sxtw
 	ldrb	w22, [x1,736]
 	ldrb	w0, [x0,633]
 	cmp	w0, w21
-	bcs	.L1870
+	bcs	.L1872
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 6, .L1870
+	tbz	x0, 6, .L1872
 	adrp	x0, .LC152
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC152
 	mov	w2, w21
 	mov	w3, w19
 	bl	printk
-.L1870:
-	cbnz	w26, .L1871
+.L1872:
+	cbnz	w26, .L1873
 	ldrb	w1, [x20,#:lo12:.LANCHOR0]
 	add	x0, x20, :lo12:.LANCHOR0
-	cbz	w1, .L1872
+	cbz	w1, .L1874
 	ldrb	w0, [x0,1]
-	cbz	w0, .L1871
-.L1872:
+	cbz	w0, .L1873
+.L1874:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x1,2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	ldrb	w2, [x1,1]
 	sub	w19, w19, w0
-	cbz	w2, .L1873
+	cbz	w2, .L1875
 	add	w19, w0, w19, lsl 1
-	b	.L1871
-.L1873:
+	b	.L1873
+.L1875:
 	add	x1, x1, 4
 	ldrh	w19, [x1,w19,uxtw 1]
 	add	w19, w19, w0
-.L1871:
+.L1873:
 	mov	w0, w22
 	mov	w1, w19
 	mov	x2, x25
@@ -11493,16 +11510,16 @@ flash_read_page_en:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	w21, w0
-	bne	.L1880
+	bne	.L1882
 	add	x26, x20, :lo12:.LANCHOR0
 	ldrb	w27, [x26,720]
-	cbnz	w27, .L1875
-.L1878:
+	cbnz	w27, .L1877
+.L1880:
 	adrp	x0, .LANCHOR4+1224
 	ldr	x5, [x0,#:lo12:.LANCHOR4+1224]
-	cbnz	x5, .L1876
-	b	.L1877
-.L1875:
+	cbnz	x5, .L1878
+	b	.L1879
+.L1877:
 	mov	w0, w22
 	mov	w1, w19
 	mov	x2, x25
@@ -11512,9 +11529,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x26,720]
 	cmn	w0, #1
-	beq	.L1878
-	b	.L1896
-.L1876:
+	beq	.L1880
+	b	.L1898
+.L1878:
 	mov	w0, w22
 	mov	w1, w19
 	mov	x2, x25
@@ -11522,8 +11539,8 @@ flash_read_page_en:
 	mov	w4, w23
 	blr	x5
 	cmn	w0, #1
-	bne	.L1896
-.L1877:
+	bne	.L1898
+.L1879:
 	add	x20, x20, :lo12:.LANCHOR0
 	adrp	x0, .LC153
 	add	x0, x0, :lo12:.LC153
@@ -11533,16 +11550,16 @@ flash_read_page_en:
 	ldrb	w4, [x20,720]
 	bl	printk
 	ldrb	w0, [x20,672]
-	cbz	w0, .L1880
+	cbz	w0, .L1882
 	mov	w0, w22
 	mov	w1, w19
 	mov	x2, x25
 	mov	x3, x24
 	mov	w4, w23
 	bl	flash_ddr_tuning_read
-.L1896:
+.L1898:
 	mov	w21, w0
-.L1880:
+.L1882:
 	mov	w0, w21
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -11581,12 +11598,12 @@ flash_get_last_written_page:
 	add	w1, w26, w19
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1898
+	bne	.L1900
 	mov	w28, 0
 	mov	w5, 2
-.L1899:
+.L1901:
 	cmp	w28, w19
-	bgt	.L1898
+	bgt	.L1900
 	add	w0, w28, w19
 	mov	x2, x24
 	mov	x3, x21
@@ -11598,24 +11615,24 @@ flash_get_last_written_page:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ldr	x5, [x29,104]
-	bne	.L1900
+	bne	.L1902
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1899
-.L1900:
+	b	.L1901
+.L1902:
 	add	w20, w20, 1
 	sxth	w28, w20
-	b	.L1899
-.L1898:
+	b	.L1901
+.L1900:
 	ldr	w0, [x27,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L1903
+	tbz	x0, 12, .L1905
 	adrp	x0, .LC154
 	ldr	w3, [x21]
 	add	x0, x0, :lo12:.LC154
 	mov	w1, w22
 	mov	w2, w19
 	bl	printk
-.L1903:
+.L1905:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11662,7 +11679,7 @@ flash_info_blk_init:
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	adrp	x20, .LANCHOR0
-	tbz	x0, 12, .L1909
+	tbz	x0, 12, .L1911
 	add	x4, x20, :lo12:.LANCHOR0
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC155
@@ -11673,10 +11690,10 @@ flash_info_blk_init:
 	add	x2, x2, 160
 	mov	w3, 2048
 	bl	printk
-.L1909:
+.L1911:
 	mov	w22, 4
 	adrp	x24, .LANCHOR4
-.L1912:
+.L1914:
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x21, x24, :lo12:.LANCHOR4
 	mov	w0, 0
@@ -11688,21 +11705,21 @@ flash_info_blk_init:
 	mul	w1, w22, w1
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1910
+	beq	.L1912
 	ldr	x2, [x19,728]
 	mov	w0, 21321
 	movk	w0, 0x5359, lsl 16
 	ldr	w1, [x2]
 	cmp	w1, w0
-	beq	.L1911
-.L1910:
+	beq	.L1913
+.L1912:
 	add	w22, w22, 1
 	cmp	w22, 16
-	bne	.L1912
-.L1936:
+	bne	.L1914
+.L1938:
 	mov	w0, -1
-	b	.L1935
-.L1911:
+	b	.L1937
+.L1913:
 	ldrb	w1, [x2,36]
 	mov	w4, 4
 	ldrh	w3, [x19,2]
@@ -11715,16 +11732,16 @@ flash_info_blk_init:
 	mov	w21, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1914
+	beq	.L1916
 	ldr	x0, [x19,728]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w21, 0
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1914
+	bne	.L1916
 	ldr	w21, [x0,4]
-.L1914:
+.L1916:
 	add	x19, x23, :lo12:.LANCHOR4
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w0, 0
@@ -11736,21 +11753,21 @@ flash_info_blk_init:
 	ldr	x2, [x22,728]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1915
+	beq	.L1917
 	ldr	x0, [x22,728]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1915
+	bne	.L1917
 	ldr	w1, [x0,4]
 	cmp	w21, w1
-	bcs	.L1915
+	bcs	.L1917
 	ldrb	w1, [x0,37]
 	ldrb	w0, [x0,36]
 	strb	w1, [x19,1240]
 	strb	w0, [x19,1241]
-.L1915:
+.L1917:
 	add	x21, x23, :lo12:.LANCHOR4
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w0, 0
@@ -11765,8 +11782,8 @@ flash_info_blk_init:
 	ldrb	w0, [x21,1240]
 	ldrh	w21, [x22,2]
 	mul	w21, w0, w21
-.L1916:
-	tbnz	w19, #31, .L1937
+.L1918:
+	tbnz	w19, #31, .L1939
 	add	x22, x20, :lo12:.LANCHOR0
 	add	x3, x23, :lo12:.LANCHOR4
 	mov	w0, 0
@@ -11776,31 +11793,31 @@ flash_info_blk_init:
 	ldr	x3, [x3,1232]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1917
+	beq	.L1919
 	ldr	x0, [x22,728]
 	ldr	w1, [x0]
 	mov	w0, 21321
 	movk	w0, 0x5359, lsl 16
 	cmp	w1, w0
-	bne	.L1917
-.L1919:
+	bne	.L1919
+.L1921:
 	mov	w0, 0
-	b	.L1935
-.L1917:
+	b	.L1937
+.L1919:
 	sub	w19, w19, #1
 	sxth	w19, w19
-	b	.L1916
-.L1937:
+	b	.L1918
+.L1939:
 	cmn	w19, #1
-	bne	.L1919
+	bne	.L1921
 	add	x20, x20, :lo12:.LANCHOR0
 	adrp	x0, .LC156
 	add	x0, x0, :lo12:.LC156
 	ldr	x1, [x20,728]
 	ldr	w1, [x1]
 	bl	printk
-	b	.L1936
-.L1935:
+	b	.L1938
+.L1937:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -11841,20 +11858,20 @@ flash_ddr_para_scan:
 	mov	w4, 4
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1939
+	bne	.L1941
 	ldrb	w0, [x21,780]
-	tbz	x0, 0, .L1939
+	tbz	x0, 0, .L1941
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w22
 	bl	nandc_set_if_mode
 	strb	wzr, [x21,672]
-	b	.L1940
-.L1939:
+	b	.L1942
+.L1941:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	strb	w0, [x19,672]
-.L1940:
+.L1942:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -11901,9 +11918,9 @@ id_block_read_data.constprop.27:
 	adrp	x0, .LC157
 	add	x0, x0, :lo12:.LC157
 	str	x0, [x29,112]
-.L1945:
+.L1947:
 	cmp	w22, w27
-	bcs	.L1982
+	bcs	.L1984
 	ldr	w0, [x29,168]
 	adrp	x1, .LANCHOR4
 	add	x1, x1, :lo12:.LANCHOR4
@@ -11917,15 +11934,15 @@ id_block_read_data.constprop.27:
 	udiv	w20, w20, w23
 	and	w20, w20, 65535
 	ldrh	w0, [x0,w20,sxtw 1]
-	cbnz	w1, .L1946
+	cbnz	w1, .L1948
 	mov	w20, w0
-	b	.L1947
-.L1946:
+	b	.L1949
+.L1948:
 	ldrb	w1, [x19,1]
 	lsl	w0, w20, 1
 	cmp	w1, wzr
 	csel	w20, w0, w20, ne
-.L1947:
+.L1949:
 	ldr	w1, [x29,160]
 	ldr	w0, [x29,164]
 	ldrb	w28, [x19,632]
@@ -11940,7 +11957,7 @@ id_block_read_data.constprop.27:
 	str	w0, [x29,132]
 	mov	w0, w28
 	bl	nandc_bch_sel
-.L1948:
+.L1950:
 	mov	w0, 0
 	mov	w1, w24
 	mov	x2, x21
@@ -11949,16 +11966,16 @@ id_block_read_data.constprop.27:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	w20, w0
-	bne	.L1955
+	bne	.L1957
 	ldrb	w6, [x19,720]
-	cbnz	w6, .L1950
-.L1953:
+	cbnz	w6, .L1952
+.L1955:
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	x6, [x0,1224]
-	cbnz	x6, .L1951
-	b	.L1952
-.L1950:
+	cbnz	x6, .L1953
+	b	.L1954
+.L1952:
 	mov	w0, 0
 	mov	w1, w24
 	mov	x2, x21
@@ -11970,9 +11987,9 @@ id_block_read_data.constprop.27:
 	cmn	w0, #1
 	ldr	x6, [x29,104]
 	strb	w6, [x19,720]
-	beq	.L1953
-	b	.L1981
-.L1951:
+	beq	.L1955
+	b	.L1983
+.L1953:
 	mov	w0, 0
 	mov	w1, w24
 	mov	x2, x21
@@ -11980,28 +11997,28 @@ id_block_read_data.constprop.27:
 	mov	w4, w23
 	blr	x6
 	cmn	w0, #1
-	bne	.L1981
-.L1952:
+	bne	.L1983
+.L1954:
 	ldrb	w0, [x19,672]
-	cbz	w0, .L1955
+	cbz	w0, .L1957
 	mov	w0, 0
 	mov	w1, w24
 	mov	x2, x21
 	add	x3, x29, 176
 	mov	w4, w23
 	bl	flash_ddr_tuning_read
-.L1981:
+.L1983:
 	mov	w20, w0
-.L1955:
+.L1957:
 	cmn	w20, #1
-	bne	.L1956
+	bne	.L1958
 	cmp	w28, 16
-	beq	.L1956
+	beq	.L1958
 	mov	w0, 16
 	mov	w28, 16
 	bl	nandc_bch_sel
-	b	.L1948
-.L1956:
+	b	.L1950
+.L1958:
 	ldr	w0, [x29,132]
 	bl	nandc_bch_sel
 	cmn	w20, #1
@@ -12012,18 +12029,18 @@ id_block_read_data.constprop.27:
 	cmp	w0, w26
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1958
-	cbnz	w25, .L1958
+	beq	.L1960
+	cbnz	w25, .L1960
 	ldr	w1, [x21]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L1958
+	bne	.L1960
 	ldr	w0, [x29,144]
 	ldrb	w23, [x21,17]
 	add	w27, w27, w0
-	b	.L1959
-.L1958:
+	b	.L1961
+.L1960:
 	ldr	x0, [x29,144]
 	mov	w2, w22
 	ldr	w1, [x29,140]
@@ -12034,12 +12051,12 @@ id_block_read_data.constprop.27:
 	ldr	x0, [x29,112]
 	bl	printk
 	str	wzr, [x29,168]
-.L1959:
+.L1961:
 	ldr	w0, [x29,144]
 	add	w22, w0, w22
 	uxth	w22, w22
-	b	.L1945
-.L1982:
+	b	.L1947
+.L1984:
 	ldr	x0, [x29,120]
 	ldrb	w1, [x29,136]
 	add	x0, x0, :lo12:.LANCHOR0
@@ -12072,27 +12089,27 @@ flash_complete_plane_page_read:
 	mov	x23, x2
 	ldrb	w0, [x0,633]
 	cmp	w0, w22
-	bhi	.L1984
+	bhi	.L1986
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 782
+	mov	w2, 785
 	add	x1, x1, 184
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L1984:
+.L1986:
 	add	x0, x21, :lo12:.LANCHOR0
 	add	x22, x0, x22, sxtw
 	ldrb	w22, [x22,736]
 	ldr	x25, [x0,536]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w20, .L1985
+	cbnz	w20, .L1987
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1985:
+.L1987:
 	add	x3, x21, :lo12:.LANCHOR0
 	uxtb	x5, w22
 	and	w2, w19, 255
@@ -12100,26 +12117,26 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x3,656]
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1986
+	bne	.L1988
 	add	x5, x25, x5, lsl 8
 	mov	w3, 6
-	b	.L1999
-.L1986:
+	b	.L2001
+.L1988:
 	ldr	x3, [x3,624]
 	add	x5, x25, x5, lsl 8
 	ldrb	w3, [x3,12]
 	cmp	w3, 3
-	bne	.L1988
+	bne	.L1990
 	mov	w3, 5
-.L1999:
+.L2001:
 	str	w3, [x5,2056]
 	str	wzr, [x5,2052]
 	str	wzr, [x5,2052]
 	str	w2, [x5,2052]
 	str	w1, [x5,2052]
 	str	w0, [x5,2052]
-	b	.L1997
-.L1988:
+	b	.L1999
+.L1990:
 	str	wzr, [x5,2056]
 	str	wzr, [x5,2052]
 	str	wzr, [x5,2052]
@@ -12130,22 +12147,22 @@ flash_complete_plane_page_read:
 	str	w0, [x5,2056]
 	str	wzr, [x5,2052]
 	str	wzr, [x5,2052]
-.L1997:
+.L1999:
 	mov	w0, 224
 	str	w0, [x5,2056]
-	cbz	w20, .L1989
+	cbz	w20, .L1991
 	add	x21, x21, :lo12:.LANCHOR0
 	ldr	x0, [x21,624]
 	ldrb	w0, [x0,12]
 	cmp	w0, 3
-	bne	.L1989
+	bne	.L1991
 	sub	w20, w20, #1
 	add	w0, w19, w19, lsl 1
 	add	w0, w20, w0
-	b	.L1998
-.L1989:
+	b	.L2000
+.L1991:
 	mov	w0, w19
-.L1998:
+.L2000:
 	bl	nandc_set_seed
 	adrp	x2, .LANCHOR2+385
 	mov	x3, x24
@@ -12186,27 +12203,27 @@ flash_complete_page_read:
 	mov	x26, x2
 	ubfx	x22, x24, 24, 2
 	cmp	w0, w21
-	bhi	.L2001
+	bhi	.L2003
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 904
+	mov	w2, 907
 	add	x1, x1, 216
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2001:
+.L2003:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x21, x0, x21, sxtw
 	ldrb	w23, [x21,736]
 	ldr	x21, [x0,536]
 	mov	w0, w23
 	bl	nandc_cs
-	cbnz	w22, .L2002
+	cbnz	w22, .L2004
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
-.L2002:
+.L2004:
 	ubfiz	x0, x23, 8, 8
 	add	x5, x21, x0
 	mov	w0, 5
@@ -12221,19 +12238,19 @@ flash_complete_page_read:
 	str	w0, [x5,2052]
 	mov	w0, 224
 	str	w0, [x5,2056]
-	cbz	w22, .L2003
+	cbz	w22, .L2005
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,624]
 	ldrb	w0, [x0,12]
 	cmp	w0, 3
-	bne	.L2003
+	bne	.L2005
 	sub	w0, w22, #1
 	add	w1, w20, w20, lsl 1
 	add	w0, w0, w1
-	b	.L2035
-.L2003:
+	b	.L2037
+.L2005:
 	mov	w0, w20
-.L2035:
+.L2037:
 	adrp	x21, .LANCHOR2
 	bl	nandc_set_seed
 	add	x27, x21, :lo12:.LANCHOR2
@@ -12245,10 +12262,10 @@ flash_complete_page_read:
 	ldrb	w2, [x27,9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2005
+	bne	.L2007
 	add	x28, x19, :lo12:.LANCHOR0
 	ldrb	w5, [x28,720]
-	cbz	w5, .L2006
+	cbz	w5, .L2008
 	ldrb	w4, [x27,9]
 	mov	w0, w23
 	orr	w1, w20, w22, lsl 24
@@ -12259,15 +12276,15 @@ flash_complete_page_read:
 	bl	flash_read_page
 	ldr	x5, [x29,104]
 	strb	w5, [x28,720]
-	cbnz	w22, .L2007
-.L2014:
+	cbnz	w22, .L2009
+.L2016:
 	ldrb	w2, [x19,#:lo12:.LANCHOR0]
 	add	x1, x19, :lo12:.LANCHOR0
-	cbz	w2, .L2007
+	cbz	w2, .L2009
 	ldrb	w1, [x1,724]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2007
+	blt	.L2009
 	add	x21, x21, :lo12:.LANCHOR2
 	ldrb	w1, [x21,395]
 	sub	w1, w1, #4
@@ -12275,15 +12292,15 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-	b	.L2022
-.L2007:
+	b	.L2024
+.L2009:
 	cmn	w0, #1
-	bne	.L2022
-.L2015:
+	bne	.L2024
+.L2017:
 	adrp	x0, .LANCHOR4+1224
 	ldr	x5, [x0,#:lo12:.LANCHOR4+1224]
-	cbnz	x5, .L2010
-.L2013:
+	cbnz	x5, .L2012
+.L2015:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC158
 	add	x0, x0, :lo12:.LC158
@@ -12293,10 +12310,10 @@ flash_complete_page_read:
 	ldrb	w4, [x19,720]
 	bl	printk
 	ldrb	w0, [x19,672]
-	cbnz	w0, .L2011
+	cbnz	w0, .L2013
 	mov	w0, -1
-	b	.L2022
-.L2010:
+	b	.L2024
+.L2012:
 	add	x4, x21, :lo12:.LANCHOR2
 	mov	w0, w23
 	orr	w1, w20, w22, lsl 24
@@ -12305,9 +12322,9 @@ flash_complete_page_read:
 	ldrb	w4, [x4,385]
 	blr	x5
 	cmn	w0, #1
-	bne	.L2022
-	b	.L2013
-.L2011:
+	bne	.L2024
+	b	.L2015
+.L2013:
 	add	x21, x21, :lo12:.LANCHOR2
 	mov	w0, w23
 	orr	w1, w20, w22, lsl 24
@@ -12315,14 +12332,14 @@ flash_complete_page_read:
 	mov	x3, x26
 	ldrb	w4, [x21,385]
 	bl	flash_ddr_tuning_read
-	b	.L2022
-.L2005:
-	cbz	w22, .L2014
-	b	.L2022
-.L2006:
-	cbz	w22, .L2014
-	b	.L2015
-.L2022:
+	b	.L2024
+.L2007:
+	cbz	w22, .L2016
+	b	.L2024
+.L2008:
+	cbz	w22, .L2016
+	b	.L2017
+.L2024:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -12345,7 +12362,7 @@ queue_wait_first_req_completed:
 	stp	x27, x28, [sp,80]
 	ldrb	w21, [x0,2835]
 	cmp	w21, 255
-	beq	.L2120
+	beq	.L2122
 	add	x0, x0, 784
 	mov	w1, 0
 	add	x0, x0, x21, lsl 6
@@ -12353,45 +12370,45 @@ queue_wait_first_req_completed:
 	ldr	w20, [x0,40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L2038
-	adrp	x0, .L2040
-	add	x0, x0, :lo12:.L2040
+	bhi	.L2040
+	adrp	x0, .L2042
+	add	x0, x0, :lo12:.L2042
 	ldrh	w0, [x0,w3,uxtw #1]
-	adr	x1, .Lrtx2040
+	adr	x1, .Lrtx2042
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx2040:
+.Lrtx2042:
 	.section	.rodata
 	.align	0
 	.align	2
-.L2040:
-	.2byte	(.L2039 - .Lrtx2040) / 4
-	.2byte	(.L2041 - .Lrtx2040) / 4
-	.2byte	(.L2042 - .Lrtx2040) / 4
-	.2byte	(.L2042 - .Lrtx2040) / 4
-	.2byte	(.L2042 - .Lrtx2040) / 4
-	.2byte	(.L2043 - .Lrtx2040) / 4
-	.2byte	(.L2044 - .Lrtx2040) / 4
-	.2byte	(.L2045 - .Lrtx2040) / 4
-	.2byte	(.L2042 - .Lrtx2040) / 4
-	.2byte	(.L2045 - .Lrtx2040) / 4
+.L2042:
+	.2byte	(.L2041 - .Lrtx2042) / 4
+	.2byte	(.L2043 - .Lrtx2042) / 4
+	.2byte	(.L2044 - .Lrtx2042) / 4
+	.2byte	(.L2044 - .Lrtx2042) / 4
+	.2byte	(.L2044 - .Lrtx2042) / 4
+	.2byte	(.L2045 - .Lrtx2042) / 4
+	.2byte	(.L2046 - .Lrtx2042) / 4
+	.2byte	(.L2047 - .Lrtx2042) / 4
+	.2byte	(.L2044 - .Lrtx2042) / 4
+	.2byte	(.L2047 - .Lrtx2042) / 4
 	.text
-.L2039:
+.L2041:
 	mov	w0, w20
 	mov	w1, 64
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2120
+	tbz	x0, 6, .L2122
 	add	x3, x19, :lo12:.LANCHOR0
 	add	x0, x3, 784
 	add	x0, x0, x21, lsl 6
 	ldr	x2, [x0,16]
 	ldr	x1, [x0,8]
-	cbz	x2, .L2047
+	cbz	x2, .L2049
 	ldrb	w4, [x0,56]
 	ldrb	w0, [x3,2832]
 	cmp	w4, w0
 	csel	x1, x1, x2, ne
-.L2047:
+.L2049:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, w20
 	add	x19, x19, 784
@@ -12404,8 +12421,8 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19,2]
 	orr	w0, w0, 8
 	strb	w0, [x19,2]
-	b	.L2120
-.L2041:
+	b	.L2122
+.L2043:
 	mov	w0, w20
 	mov	w1, 64
 	bl	flash_wait_device_ready
@@ -12414,27 +12431,27 @@ queue_wait_first_req_completed:
 	add	x3, x2, 784
 	add	x1, x3, x4
 	ldrb	w20, [x3,x4]
-	tbz	x0, 6, .L2120
+	tbz	x0, 6, .L2122
 	add	x3, x3, x20, lsl 6
 	ldr	x0, [x1,16]
 	ldr	x27, [x1,8]
 	ldr	x23, [x3,8]
-	cbz	x0, .L2048
+	cbz	x0, .L2050
 	ldrb	w3, [x1,56]
 	ldrb	w1, [x2,2832]
 	cmp	w3, w1
 	csel	x27, x27, x0, ne
-.L2048:
+.L2050:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x0, x2, 784
 	add	x0, x0, x20, lsl 6
 	ldr	x1, [x0,16]
-	cbz	x1, .L2049
+	cbz	x1, .L2051
 	ldrb	w3, [x0,56]
 	ldrb	w0, [x2,2832]
 	cmp	w3, w0
 	csel	x23, x23, x1, ne
-.L2049:
+.L2051:
 	add	x24, x19, :lo12:.LANCHOR0
 	mov	x1, x27
 	add	x24, x24, 784
@@ -12452,15 +12469,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w22, #1
-	beq	.L2050
+	beq	.L2052
 	ldr	w0, [x28,4]
 	cmn	w0, #1
-	beq	.L2051
+	beq	.L2053
 	ldr	x1, [x26,8]
 	ldr	w1, [x1,4]
 	cmp	w0, w1
-	beq	.L2051
-.L2050:
+	beq	.L2053
+.L2052:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	x2, x27
 	add	x24, x4, 784
@@ -12476,30 +12493,30 @@ queue_wait_first_req_completed:
 	mov	w22, w0
 	ldr	w2, [x26,4]
 	cmn	w2, #1
-	beq	.L2052
+	beq	.L2054
 	ldr	x3, [x24,8]
 	ldr	w4, [x3,4]
 	cmp	w2, w4
-	beq	.L2052
+	beq	.L2054
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 6, .L2052
+	tbz	x0, 6, .L2054
 	adrp	x0, .LC159
 	ldr	w1, [x26,8]
 	ldr	w3, [x3]
 	add	x0, x0, :lo12:.LC159
 	bl	printk
-.L2052:
+.L2054:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 784
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0,36]
 	cmn	w1, #1
-	beq	.L2051
+	beq	.L2053
 	ldr	x0, [x0,24]
 	ldr	w0, [x0,4]
 	cmp	w1, w0
-	beq	.L2051
+	beq	.L2053
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -12508,7 +12525,7 @@ queue_wait_first_req_completed:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2051:
+.L2053:
 	add	x3, x19, :lo12:.LANCHOR0
 	mov	w1, 12
 	add	x3, x3, 784
@@ -12519,16 +12536,16 @@ queue_wait_first_req_completed:
 	orr	w0, w0, 8
 	strb	w1, [x21,58]
 	strb	w0, [x21,2]
-	beq	.L2053
+	beq	.L2055
 	add	x3, x3, x20, lsl 6
 	ldr	w0, [x3,36]
 	cmn	w0, #1
-	beq	.L2055
+	beq	.L2057
 	ldr	x1, [x3,24]
 	ldr	w1, [x1,4]
 	cmp	w0, w1
-	beq	.L2055
-.L2053:
+	beq	.L2057
+.L2055:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	x2, x23
 	add	x21, x4, 784
@@ -12543,30 +12560,30 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x24,4]
 	cmn	w2, #1
-	beq	.L2057
+	beq	.L2059
 	ldr	x3, [x21,8]
 	ldr	w4, [x3,4]
 	cmp	w2, w4
-	beq	.L2057
+	beq	.L2059
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 6, .L2057
+	tbz	x0, 6, .L2059
 	adrp	x0, .LC159
 	ldr	w1, [x24,8]
 	ldr	w3, [x3]
 	add	x0, x0, :lo12:.LC159
 	bl	printk
-.L2057:
+.L2059:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 784
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0,36]
 	cmn	w1, #1
-	beq	.L2055
+	beq	.L2057
 	ldr	x0, [x0,24]
 	ldr	w0, [x0,4]
 	cmp	w1, w0
-	beq	.L2055
+	beq	.L2057
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -12575,7 +12592,7 @@ queue_wait_first_req_completed:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2055:
+.L2057:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, 12
 	add	x19, x19, 784
@@ -12585,36 +12602,36 @@ queue_wait_first_req_completed:
 	orr	w0, w0, 8
 	strb	w1, [x20,58]
 	strb	w0, [x20,2]
-	b	.L2120
-.L2042:
+	b	.L2122
+.L2044:
 	bl	nandc_iqr_wait_flash_ready
 	mov	w0, w20
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w20, w0
-	tbz	x20, 6, .L2120
+	tbz	x20, 6, .L2122
 	mov	w1, 5
 	add	x19, x19, :lo12:.LANCHOR0
 	ands	w1, w20, w1
-	beq	.L2058
+	beq	.L2060
 	add	x19, x19, 784
 	mov	w0, 11
 	add	x19, x19, x21, lsl 6
+	mov	w2, w20
 	mov	w4, 11
 	strb	w0, [x19,58]
 	adrp	x0, .LC160
 	ldrb	w1, [x19,1]
 	add	x0, x0, :lo12:.LC160
-	ldr	w2, [x19,52]
 	ldr	w3, [x19,40]
 	bl	printk
 	mov	w0, -1
 	str	w0, [x19,52]
-	b	.L2121
-.L2058:
+	b	.L2123
+.L2060:
 	add	x19, x19, x21, lsl 6
-	b	.L2065
-.L2045:
+	b	.L2067
+.L2047:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 3
 	cmp	w2, 10
@@ -12623,40 +12640,40 @@ queue_wait_first_req_completed:
 	csel	w1, w0, w1, ne
 	ubfx	x3, x20, 21, 3
 	add	x0, x22, x21, lsl 6
-.L2060:
+.L2062:
 	ldrb	w23, [x0]
 	cmp	w23, 255
-	beq	.L2122
+	beq	.L2124
 	add	x0, x22, x23, lsl 6
 	ldrb	w2, [x0,58]
 	cmp	w2, w1
-	bne	.L2060
+	bne	.L2062
 	ldr	w2, [x0,40]
 	ubfx	x2, x2, 21, 3
 	cmp	w3, w2
-	bne	.L2060
+	bne	.L2062
 	bl	nandc_iqr_wait_flash_ready
 	mov	w0, w20
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w20, w0
 	and	w0, w0, 64
-	tbz	x20, 6, .L2068
+	tbz	x20, 6, .L2070
 	ands	w0, w20, 15
 	add	x22, x22, x21, lsl 6
-	beq	.L2063
-	adrp	x0, .LC160
+	beq	.L2065
+	adrp	x0, .LC161
 	ldrb	w1, [x22,1]
-	ldr	w2, [x22,52]
-	add	x0, x0, :lo12:.LC160
 	ldr	w3, [x22,40]
+	add	x0, x0, :lo12:.LC161
+	mov	w2, w20
 	mov	w4, 11
 	bl	printk
 	mov	w0, 11
 	strb	w0, [x22,58]
 	mov	w0, -1
 	str	w0, [x22,52]
-.L2062:
+.L2064:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x19, x19, 784
 	add	x21, x19, x21, lsl 6
@@ -12665,52 +12682,52 @@ queue_wait_first_req_completed:
 	strb	w0, [x23,58]
 	ldr	w0, [x21,52]
 	str	w0, [x23,52]
-.L2121:
+.L2123:
 	mov	w1, w20
-	b	.L2038
-.L2063:
+	b	.L2040
+.L2065:
 	mov	w1, 12
 	str	w0, [x22,52]
 	strb	w1, [x22,58]
-.L2068:
+.L2070:
 	mov	w20, w0
-	b	.L2062
-.L2122:
+	b	.L2064
+.L2124:
 	mov	w1, -1
-	b	.L2038
-.L2043:
+	b	.L2040
+.L2045:
 	mov	w1, 32
 	mov	w0, w20
 	bl	flash_wait_device_ready
-	tbz	x0, 5, .L2120
+	tbz	x0, 5, .L2122
 	ands	w1, w0, 15
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x19, x19, x21, lsl 6
-	beq	.L2065
+	beq	.L2067
 	mov	w1, 11
 	strb	w1, [x19,842]
 	mov	w1, -1
 	str	w1, [x19,836]
 	mov	w1, w0
-	b	.L2038
-.L2065:
+	b	.L2040
+.L2067:
 	mov	w0, 12
 	str	w1, [x19,836]
 	strb	w0, [x19,842]
-	b	.L2038
-.L2044:
+	b	.L2040
+.L2046:
 	mov	w1, 64
 	mov	w0, w20
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2120
+	tbz	x0, 6, .L2122
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x19, x19, x21, lsl 6
 	str	w0, [x19,836]
 	mov	w0, 6
 	strb	w0, [x19,842]
-.L2120:
+.L2122:
 	mov	w1, 0
-.L2038:
+.L2040:
 	mov	w0, w1
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -12728,15 +12745,15 @@ sblk_wait_write_queue_completed:
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	adrp	x19, .LANCHOR0
-.L2124:
+.L2126:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2835]
 	cmp	w0, 255
-	beq	.L2126
+	beq	.L2128
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2124
-.L2126:
+	b	.L2126
+.L2128:
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -12810,28 +12827,28 @@ sblk_read_page:
 	mov	w20, w21
 	add	x27, x22, 784
 	add	x23, x23, 280
-.L2130:
-	cbz	w20, .L2153
+.L2132:
+	cbz	w20, .L2155
 	ldrb	w28, [x19]
 	ldr	w26, [x19,40]
-.L2131:
+.L2133:
 	mov	w0, w26
 	mov	w1, 0
 	bl	queue_lun_state
-	cbz	w0, .L2154
+	cbz	w0, .L2156
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2131
-.L2154:
+	b	.L2133
+.L2156:
 	cmp	w20, 1
-	beq	.L2137
+	beq	.L2139
 	adrp	x0, .LANCHOR4+1265
 	ldrb	w0, [x0,#:lo12:.LANCHOR4+1265]
-	cbz	w0, .L2137
+	cbz	w0, .L2139
 	ldrb	w0, [x19]
 	ubfx	x3, x26, 21, 3
 	cmp	w0, 255
-	bne	.L2136
+	bne	.L2138
 	adrp	x0, .LC0
 	mov	x1, x23
 	mov	w2, 624
@@ -12840,18 +12857,18 @@ sblk_read_page:
 	bl	printk
 	bl	dump_stack
 	ldr	x3, [x29,120]
-.L2136:
+.L2138:
 	ldrb	w24, [x19]
 	lsl	x24, x24, 6
 	add	x2, x27, x24
 	ldr	w1, [x2,40]
 	ubfx	x0, x1, 21, 3
 	cmp	w3, w0
-	bne	.L2137
+	bne	.L2139
 	ldrh	w0, [x22,3350]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2137
+	bne	.L2139
 	ldr	w0, [x19,40]
 	add	x26, x22, 2835
 	str	x2, [x29,104]
@@ -12877,36 +12894,36 @@ sblk_read_page:
 	strb	wzr, [x2,59]
 	strb	w3, [x27,x24]
 	bl	buf_add_tail
-	b	.L2135
-.L2137:
+	b	.L2137
+.L2139:
 	mov	x0, x19
 	bl	queue_read_cmd
-.L2135:
+.L2137:
 	subs	w20, w20, #1
-	beq	.L2153
+	beq	.L2155
 	sbfiz	x19, x28, 6, 32
 	add	x19, x27, x19
-	b	.L2130
-.L2153:
+	b	.L2132
+.L2155:
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x19, x19, 784
-.L2141:
-	cbz	w21, .L2155
+.L2143:
+	cbz	w21, .L2157
 	ldrb	w0, [x25,58]
 	cmp	w0, 12
-	bne	.L2142
+	bne	.L2144
 	ldrb	w0, [x25]
 	sub	w21, w21, #1
 	cmp	w0, 255
-	beq	.L2142
+	beq	.L2144
 	sbfiz	x25, x0, 6, 32
 	add	x25, x19, x25
-.L2142:
+.L2144:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2141
-.L2155:
+	b	.L2143
+.L2157:
 	mov	w0, w21
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -12941,24 +12958,24 @@ flash_prog_page:
 	add	x22, x19, x22, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x27, x23, 24, 2
-	tbz	x0, 4, .L2157
-	adrp	x0, .LC161
+	tbz	x0, 4, .L2159
+	adrp	x0, .LC162
 	mov	w2, w27
-	add	x0, x0, :lo12:.LC161
+	add	x0, x0, :lo12:.LC162
 	bl	printk
-.L2157:
+.L2159:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w27, .L2158
+	cbnz	w27, .L2160
 	bl	zftl_flash_enter_slc_mode
-	b	.L2159
-.L2158:
+	b	.L2161
+.L2160:
 	bl	zftl_flash_exit_slc_mode
-.L2159:
+.L2161:
 	ubfiz	x4, x20, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12990,16 +13007,16 @@ flash_prog_page:
 	mov	w0, w20
 	and	w19, w21, 4
 	bl	nandc_de_cs
-	tbz	x21, 2, .L2160
+	tbz	x21, 2, .L2162
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2160
-	adrp	x0, .LC162
+	tbz	x0, 12, .L2162
+	adrp	x0, .LC163
 	mov	w1, w23
-	add	x0, x0, :lo12:.LC162
+	add	x0, x0, :lo12:.LC163
 	mov	w2, w19
 	bl	printk
-.L2160:
+.L2162:
 	mov	w0, w19
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -13014,77 +13031,69 @@ flash_prog_page:
 	.type	flash_test_blk, %function
 flash_test_blk:
 	stp	x29, x30, [sp, -48]!
+	mov	w2, 32
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
-	stp	x21, x22, [sp,32]
-	uxtb	w22, w0
-	uxth	w20, w1
 	adrp	x19, .LANCHOR4
-	cbnz	w22, .L2171
-	add	x0, x19, :lo12:.LANCHOR4
-	ldrb	w1, [x0,1266]
-	mov	w0, w22
-	cmp	w1, w20
-	bhi	.L2172
-.L2171:
+	uxth	w20, w1
 	add	x19, x19, :lo12:.LANCHOR4
 	mov	w1, 165
-	mov	w2, 32
-	ldr	x0, [x19,1256]
+	stp	x21, x22, [sp,32]
+	uxtb	w22, w0
+	ldr	x0, [x19,1192]
 	bl	ftl_memset
-	ldr	x0, [x19,1248]
+	ldr	x0, [x19,1208]
 	mov	w1, 90
 	mov	w2, 8
 	bl	ftl_memset
 	adrp	x0, .LANCHOR0+2
-	ldrh	w21, [x0,#:lo12:.LANCHOR0+2]
+	ldrh	w0, [x0,#:lo12:.LANCHOR0+2]
+	mul	w20, w20, w0
 	mov	w0, w22
-	mul	w21, w20, w21
-	mov	w1, w21
+	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2177
-	adrp	x20, .LANCHOR2
-	ldr	x2, [x19,1248]
-	add	x20, x20, :lo12:.LANCHOR2
-	ldr	x3, [x19,1256]
+	bne	.L2173
+.L2175:
+	mov	w19, -1
+	b	.L2174
+.L2173:
+	adrp	x21, .LANCHOR2
+	ldr	x2, [x19,1192]
+	add	x21, x21, :lo12:.LANCHOR2
+	ldr	x3, [x19,1208]
 	mov	w0, w22
-	mov	w1, w21
-	add	x20, x20, 376
-	ldrb	w4, [x20,9]
+	mov	w1, w20
+	add	x21, x21, 376
+	ldrb	w4, [x21,9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2177
-	ldrb	w4, [x20,9]
+	beq	.L2175
+	ldr	x2, [x19,1192]
 	mov	w0, w22
-	ldr	x2, [x19,1248]
-	mov	w1, w21
-	ldr	x3, [x19,1256]
+	ldr	x3, [x19,1208]
+	mov	w1, w20
+	ldrb	w4, [x21,9]
 	bl	flash_read_page
 	cmn	w0, #1
-	mov	w20, w0
-	beq	.L2177
-	ldr	x0, [x19,1248]
+	beq	.L2175
+	ldr	x0, [x19,1192]
 	ldr	w1, [x0]
-	mov	w0, 23130
+	mov	w0, 42405
 	bfi	w0, w0, 16, 16
 	cmp	w1, w0
-	bne	.L2177
-	ldr	x0, [x19,1256]
+	bne	.L2175
+	ldr	x0, [x19,1208]
 	ldr	w1, [x0]
-	mov	w0, 42405
+	mov	w0, 23130
 	bfi	w0, w0, 16, 16
 	cmp	w1, w0
-	csinv	w20, w20, wzr, eq
-	b	.L2174
-.L2177:
-	mov	w20, -1
+	csetm	w19, ne
 .L2174:
+	mov	w1, w20
 	mov	w0, w22
-	mov	w1, w21
 	bl	flash_erase_block
-	mov	w0, w20
-.L2172:
+	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -13146,28 +13155,28 @@ flash_start_tlc_page_prog:
 	mov	x23, x6
 	cmp	w0, w26
 	mov	x19, x4
-	bhi	.L2187
+	bhi	.L2184
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 648
+	mov	w2, 651
 	add	x1, x1, 296
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2187:
+.L2184:
 	add	x4, x19, :lo12:.LANCHOR0
 	add	x26, x4, x26, sxtw
 	ldrb	w26, [x26,736]
 	mov	w0, w26
 	ldr	x19, [x4,536]
 	bl	nandc_cs
-	cbz	w25, .L2188
+	cbz	w25, .L2185
 	sxtw	x1, w26
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 8
 	str	w25, [x1,8]
-.L2188:
+.L2185:
 	ubfiz	x7, x26, 8, 8
 	mov	w0, 128
 	add	x19, x19, x7
@@ -13273,16 +13282,16 @@ sblk_tlc_prog_one_page:
 	mov	x20, x0
 	ldr	x0, [x0]
 	ldr	w21, [x0,40]
-.L2194:
+.L2191:
 	mov	w0, w21
 	mov	w1, 1
 	bl	queue_lun_state
 	mov	w19, w0
-	cbz	w0, .L2196
+	cbz	w0, .L2193
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2194
-.L2196:
+	b	.L2191
+.L2193:
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	ldr	x21, [sp,32]
@@ -13305,17 +13314,17 @@ sblk_xlc_prog_pages:
 	ldr	x0, [x0]
 	mov	w24, w2
 	ldr	w20, [x0,40]
-.L2198:
+.L2195:
 	mov	w0, w20
 	mov	w1, 1
 	bl	queue_lun_state
-	cbz	w0, .L2202
+	cbz	w0, .L2199
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2198
-.L2202:
+	b	.L2195
+.L2199:
 	cmp	w24, 2
-	bne	.L2200
+	bne	.L2197
 	ldr	x6, [x19]
 	mov	w1, 1
 	ldr	x0, [x22]
@@ -13399,11 +13408,11 @@ sblk_xlc_prog_pages:
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x0, x0, 2835
 	bl	buf_add_tail
-	b	.L2201
-.L2200:
+	b	.L2198
+.L2197:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-.L2201:
+.L2198:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -13432,50 +13441,50 @@ flash_start_page_prog:
 	and	w20, w1, 2097151
 	ubfx	x23, x1, 24, 2
 	cmp	w0, w24
-	bhi	.L2204
+	bhi	.L2201
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 699
+	mov	w2, 702
 	add	x1, x1, 328
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2204:
+.L2201:
 	add	x28, x22, :lo12:.LANCHOR0
 	add	x0, x28, x24, sxtw
 	ldrb	w21, [x0,736]
 	ldr	x19, [x28,536]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2205
+	cbnz	w0, .L2202
 	ldrb	w0, [x28,633]
 	cmp	w0, 1
-	bne	.L2206
+	bne	.L2203
 	bl	nandc_wait_flash_ready
-	b	.L2205
-.L2206:
+	b	.L2202
+.L2203:
 	mov	w0, w24
 	mov	w1, w20
 	mov	w2, 64
 	bl	flash_wait_device_ready_raw
-.L2205:
+.L2202:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w23, .L2207
+	cbnz	w23, .L2204
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	ldrb	w0, [x22,#:lo12:.LANCHOR0]
-	cbz	w0, .L2208
+	cbz	w0, .L2205
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L2208
-.L2207:
+	b	.L2205
+.L2204:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-.L2208:
+.L2205:
 	ubfiz	x4, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -13525,28 +13534,28 @@ queue_prog_cmd:
 	add	x1, x0, :lo12:.LANCHOR0
 	ldrb	w2, [x1,2835]
 	cmp	w2, 255
-	beq	.L2213
+	beq	.L2210
 	ubfx	x4, x4, 21, 3
 	add	x1, x1, 784
-.L2215:
+.L2212:
 	add	x3, x1, x2, lsl 6
 	ldr	w5, [x3,40]
 	ubfx	x5, x5, 21, 3
 	cmp	w4, w5
-	bne	.L2214
+	bne	.L2211
 	ldrb	w5, [x3,58]
 	add	x3, x3, 48
 	cmp	w5, 6
-	bne	.L2214
+	bne	.L2211
 	mov	w1, 3
 	strb	w1, [x3,10]
-	b	.L2213
-.L2214:
+	b	.L2210
+.L2211:
 	lsl	x2, x2, 6
 	ldrb	w2, [x1,x2]
 	cmp	w2, 255
-	bne	.L2215
-.L2213:
+	bne	.L2212
+.L2210:
 	mov	w1, 3
 	strb	w1, [x19,58]
 	mov	w1, 1
@@ -13575,49 +13584,49 @@ sblk_prog_page:
 	mov	x19, x0
 	uxtb	w20, w1
 	ldrh	w0, [x0,50]
-	cbz	w0, .L2221
+	cbz	w0, .L2218
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2221
-	adrp	x0, .LC163
+	tbz	x0, 8, .L2218
+	adrp	x0, .LC164
 	ldr	w1, [x19,40]
-	add	x0, x0, :lo12:.LC163
+	add	x0, x0, :lo12:.LC164
 	mov	w2, w20
 	bl	printk
-.L2221:
+.L2218:
 	adrp	x24, .LANCHOR0
 	adrp	x25, .LC0
 	add	x23, x24, :lo12:.LANCHOR0
 	mov	w21, 0
 	add	x27, x23, 784
 	add	x25, x25, :lo12:.LC0
-.L2222:
-	cbz	w20, .L2252
+.L2219:
+	cbz	w20, .L2249
 	ldrb	w26, [x19]
 	ldr	w22, [x19,40]
-.L2223:
+.L2220:
 	mov	w0, w22
 	mov	w1, 1
 	bl	queue_lun_state
-	cbz	w0, .L2253
+	cbz	w0, .L2250
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2223
-.L2253:
+	b	.L2220
+.L2250:
 	cmp	w20, 1
-	beq	.L2225
+	beq	.L2222
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrb	w0, [x0,781]
-	cbnz	w0, .L2226
-.L2225:
+	cbnz	w0, .L2223
+.L2222:
 	mov	x0, x19
 	bl	queue_prog_cmd
-	b	.L2227
-.L2226:
+	b	.L2224
+.L2223:
 	ldrb	w0, [x19]
 	ubfx	x28, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2228
+	bne	.L2225
 	adrp	x1, .LANCHOR3
 	mov	w2, 546
 	add	x1, x1, :lo12:.LANCHOR3
@@ -13625,13 +13634,13 @@ sblk_prog_page:
 	add	x1, x1, 352
 	bl	printk
 	bl	dump_stack
-.L2228:
+.L2225:
 	ldrb	w0, [x19]
 	add	x0, x27, x0, lsl 6
 	ldr	w4, [x0,40]
 	ubfx	x0, x4, 21, 3
 	cmp	w28, w0
-	bne	.L2229
+	bne	.L2226
 	ldrh	w3, [x23,3340]
 	mov	w1, 21
 	ldrb	w6, [x23,3338]
@@ -13652,13 +13661,13 @@ sblk_prog_page:
 	and	w0, w1, w5
 	cmp	w0, w3
 	uxth	w2, w2
-	beq	.L2229
+	beq	.L2226
 	and	w22, w2, w22
 	and	w2, w2, w4
 	cmp	w22, w2
-	bne	.L2229
+	bne	.L2226
 	cmp	w21, w6
-	beq	.L2229
+	beq	.L2226
 	ldr	w1, [x19,40]
 	mov	w0, 17
 	ldr	x2, [x19,8]
@@ -13673,20 +13682,20 @@ sblk_prog_page:
 	strb	w0, [x19]
 	add	x0, x23, 2835
 	bl	buf_add_tail
-	b	.L2227
-.L2229:
+	b	.L2224
+.L2226:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-.L2227:
+.L2224:
 	subs	w20, w20, #1
-	beq	.L2252
+	beq	.L2249
 	add	x19, x24, :lo12:.LANCHOR0
 	sbfiz	x26, x26, 6, 32
 	add	x19, x19, 784
 	add	x19, x19, x26
-	b	.L2222
-.L2252:
+	b	.L2219
+.L2249:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -13708,18 +13717,18 @@ ftl_flush:
 	mov	x19, x2
 	adrp	x20, .LANCHOR4
 	ldrb	w1, [x0,2857]
-	cbz	w1, .L2255
+	cbz	w1, .L2252
 	add	x2, x20, :lo12:.LANCHOR4
 	add	x0, x0, 784
-	ldrb	w2, [x2,1267]
+	ldrb	w2, [x2,1266]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2255:
+.L2252:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR4
 	mov	w0, -1
 	strb	wzr, [x2,2857]
-	strb	w0, [x20,1267]
+	strb	w0, [x20,1266]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	w0, -1
@@ -13736,15 +13745,15 @@ zftl_cache_flush:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldrb	w0, [x0,#:lo12:.LANCHOR0+2857]
-	cbz	w0, .L2259
+	cbz	w0, .L2256
 	bl	timer_get_time
 	adrp	x1, .LANCHOR4+1268
 	ldr	w1, [x1,#:lo12:.LANCHOR4+1268]
 	add	w1, w1, 100
 	cmp	w0, w1
-	bls	.L2259
+	bls	.L2256
 	bl	ftl_flush
-.L2259:
+.L2256:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	zftl_cache_flush, .-zftl_cache_flush
@@ -13771,50 +13780,50 @@ flash_prog_page_en:
 	cmp	w0, w21
 	ubfx	x28, x20, 24, 2
 	mov	x19, x6
-	bhi	.L2264
+	bhi	.L2261
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 473
+	mov	w2, 476
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2264:
+.L2261:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w26, w20
 	add	x1, x0, x21, sxtw
 	ldrb	w27, [x1,736]
-	cbnz	w28, .L2265
+	cbnz	w28, .L2262
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1,#:lo12:.LANCHOR0]
-	cbz	w1, .L2266
+	cbz	w1, .L2263
 	ldrb	w0, [x0,1]
-	cbz	w0, .L2265
-.L2266:
+	cbz	w0, .L2262
+.L2263:
 	add	x6, x19, :lo12:.LANCHOR0
 	ldrh	w26, [x6,2]
 	ldrb	w1, [x6,1]
 	udiv	w2, w20, w26
 	mul	w26, w2, w26
 	sub	w0, w20, w26
-	cbz	w1, .L2267
+	cbz	w1, .L2264
 	add	w26, w26, w0, lsl 1
-	b	.L2265
-.L2267:
+	b	.L2262
+.L2264:
 	add	x6, x6, 4
 	ldrh	w0, [x6,w0,uxtw 1]
 	add	w26, w0, w26
-.L2265:
+.L2262:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 4, .L2268
-	adrp	x0, .LC164
+	tbz	x0, 4, .L2265
+	adrp	x0, .LC165
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC164
+	add	x0, x0, :lo12:.LC165
 	mov	w2, w20
 	bl	printk
-.L2268:
+.L2265:
 	mov	w1, w26
 	mov	w0, w27
 	mov	x2, x23
@@ -13822,7 +13831,7 @@ flash_prog_page_en:
 	mov	w4, w24
 	bl	flash_prog_page
 	mov	w26, w0
-	cbz	w25, .L2269
+	cbz	w25, .L2266
 	adrp	x19, .LANCHOR4
 	mov	w0, w21
 	add	x25, x19, :lo12:.LANCHOR4
@@ -13832,53 +13841,53 @@ flash_prog_page_en:
 	ldr	x3, [x25,1256]
 	bl	flash_read_page_en
 	cmp	w0, 512
-	beq	.L2270
+	beq	.L2267
 	cmn	w0, #1
-	beq	.L2270
+	beq	.L2267
 	ldr	x0, [x25,1248]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2270
+	bne	.L2267
 	ldr	x0, [x25,1256]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2269
-.L2270:
+	beq	.L2266
+.L2267:
 	add	x19, x19, :lo12:.LANCHOR4
 	mov	w2, 4
-	adrp	x0, .LC165
+	adrp	x0, .LC166
 	mov	w3, w2
-	add	x0, x0, :lo12:.LC165
+	add	x0, x0, :lo12:.LC166
 	ldr	x1, [x19,1256]
 	bl	rknand_print_hex
 	mov	w2, 4
-	adrp	x0, .LC166
+	adrp	x0, .LC167
 	ldr	x1, [x19,1248]
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC167
 	mov	w3, w2
 	bl	rknand_print_hex
-	b	.L2271
-.L2269:
+	b	.L2268
+.L2266:
 	cmn	w26, #1
 	mov	w0, w26
-	bne	.L2272
-.L2271:
-	adrp	x0, .LC167
+	bne	.L2269
+.L2268:
+	adrp	x0, .LC168
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	printk
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 499
+	mov	w2, 502
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
 	mov	w0, -1
-.L2272:
+.L2269:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -13909,20 +13918,20 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	cmn	w0, #1
 	mov	w19, w0
-	bne	.L2286
+	bne	.L2283
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
 	add	x1, x1, 392
-	mov	w2, 2151
+	mov	w2, 2150
 	bl	printk
 	bl	dump_stack
-	adrp	x0, .LC167
+	adrp	x0, .LC168
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	printk
-.L2286:
+.L2283:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 64
@@ -13947,15 +13956,15 @@ ftl_info_flush:
 	adrp	x23, .LANCHOR3
 	add	x19, x22, :lo12:.LANCHOR4
 	ldrb	w2, [x0,2832]
-	adrp	x24, .LC168
+	adrp	x24, .LC169
 	add	x23, x23, :lo12:.LANCHOR3
 	add	x0, x19, 1280
 	lsl	w2, w2, 1
 	mov	w25, 0
-	add	x24, x24, :lo12:.LC168
+	add	x24, x24, :lo12:.LC169
 	add	x23, x23, 408
 	bl	ftl_memset
-.L2288:
+.L2285:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w27, [x19,1536]
 	ldrh	w20, [x19,1538]
@@ -13970,29 +13979,29 @@ ftl_info_flush:
 	str	w0, [x19,1284]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2289
+	tbz	x0, 12, .L2286
 	ldr	w3, [x3,4]
 	mov	x0, x24
 	mov	w1, w27
 	mov	w2, w20
 	bl	printk
-.L2289:
+.L2286:
 	add	x1, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x19,1538]
 	ldrh	w1, [x1,3300]
 	cmp	w1, w0
-	bhi	.L2290
+	bhi	.L2287
 	adrp	x20, .LC0
 	add	x20, x20, :lo12:.LC0
-.L2295:
+.L2292:
 	ldrb	w1, [x19,1537]
 	add	w1, w1, 1
 	uxtb	w1, w1
 	strb	w1, [x19,1537]
 	cmp	w1, 7
-	bls	.L2291
+	bls	.L2288
 	mov	x1, 0
-.L2294:
+.L2291:
 	add	x0, x21, :lo12:.LANCHOR0
 	uxth	w25, w1
 	ldr	x2, [x0,728]
@@ -14002,24 +14011,24 @@ ftl_info_flush:
 	add	w0, w2, 127
 	uxtb	w0, w0
 	cmp	w0, 125
-	bhi	.L2292
+	bhi	.L2289
 	mov	x1, x23
 	mov	w2, 742
 	mov	x0, x20
 	bl	printk
 	bl	dump_stack
-	b	.L2293
-.L2292:
+	b	.L2290
+.L2289:
 	cmp	w2, 255
-	bne	.L2293
+	bne	.L2290
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L2294
+	bne	.L2291
 	mov	w25, w1
-.L2293:
+.L2290:
 	strb	w25, [x19,1537]
 	mov	w25, 1
-.L2291:
+.L2288:
 	add	x27, x21, :lo12:.LANCHOR0
 	ldrb	w1, [x19,1537]
 	ldr	x0, [x27,728]
@@ -14027,7 +14036,7 @@ ftl_info_flush:
 	ldrb	w2, [x1,40]
 	strb	w2, [x19,1536]
 	cmp	w2, 255
-	beq	.L2295
+	beq	.L2292
 	ldrh	w20, [x27,3350]
 	mov	w0, 0
 	mul	w20, w2, w20
@@ -14042,13 +14051,13 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19,1538]
-	b	.L2296
-.L2290:
+	b	.L2293
+.L2287:
 	madd	w20, w27, w28, w20
-	cbnz	w0, .L2296
+	cbnz	w0, .L2293
 	mov	w1, w20
 	bl	flash_erase_block
-.L2296:
+.L2293:
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w0, 0
@@ -14061,21 +14070,21 @@ ftl_info_flush:
 	adrp	x0, .LANCHOR5
 	add	w1, w1, 1
 	strh	w1, [x19,1538]
-	beq	.L2297
+	beq	.L2294
 	add	x1, x0, :lo12:.LANCHOR5
 	ldrb	w1, [x1,576]
-	cbz	w1, .L2298
-.L2297:
+	cbz	w1, .L2295
+.L2294:
 	add	x0, x0, :lo12:.LANCHOR5
 	strb	wzr, [x0,576]
-	b	.L2288
-.L2298:
-	cbnz	w25, .L2299
-.L2307:
+	b	.L2285
+.L2295:
+	cbnz	w25, .L2296
+.L2304:
 	add	x22, x22, :lo12:.LANCHOR4
 	ldrb	w0, [x22,1536]
 	cmp	w0, 255
-	bne	.L2301
+	bne	.L2298
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -14084,8 +14093,8 @@ ftl_info_flush:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L2301
-.L2299:
+	b	.L2298
+.L2296:
 	ldrb	w19, [x19,1537]
 	adrp	x20, .LANCHOR3
 	adrp	x23, .LC0
@@ -14093,9 +14102,9 @@ ftl_info_flush:
 	add	w19, w19, 1
 	add	x23, x23, :lo12:.LC0
 	add	x20, x20, 408
-.L2302:
+.L2299:
 	cmp	w19, 7
-	bhi	.L2307
+	bhi	.L2304
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x1, [x0,728]
 	add	w0, w19, 8
@@ -14104,27 +14113,27 @@ ftl_info_flush:
 	add	w0, w24, 127
 	uxtb	w0, w0
 	cmp	w0, 125
-	bhi	.L2303
+	bhi	.L2300
 	mov	x1, x20
 	mov	w2, 771
 	mov	x0, x23
 	bl	printk
 	bl	dump_stack
-	b	.L2304
-.L2303:
+	b	.L2301
+.L2300:
 	cmp	w24, 255
-	beq	.L2305
-.L2304:
+	beq	.L2302
+.L2301:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0,3350]
 	mov	w0, 0
 	mul	w1, w24, w1
 	bl	flash_erase_block
-.L2305:
+.L2302:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2302
-.L2301:
+	b	.L2299
+.L2298:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -14163,10 +14172,10 @@ ftl_info_blk_init:
 	str	x1, [x23,2864]
 	mov	w1, 0
 	str	x24, [x23,584]
-	adrp	x26, .LC169
+	adrp	x26, .LC170
 	adrp	x27, .LANCHOR2
 	bl	ftl_memset
-	add	x26, x26, :lo12:.LC169
+	add	x26, x26, :lo12:.LC170
 	add	x0, x20, 640
 	mov	w1, 0
 	mov	w2, 16384
@@ -14178,7 +14187,7 @@ ftl_info_blk_init:
 	strh	wzr, [x22,1538]
 	ldrb	w0, [x0,40]
 	strb	w0, [x22,1536]
-.L2325:
+.L2322:
 	add	x5, x19, :lo12:.LANCHOR0
 	add	w0, w20, 8
 	sxth	w25, w20
@@ -14186,7 +14195,7 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w1, [x0,32]
 	cmp	w1, 255
-	beq	.L2321
+	beq	.L2318
 	ldrh	w22, [x5,3350]
 	mov	w0, 0
 	ldrb	w4, [x5,2832]
@@ -14199,7 +14208,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	mov	w28, w0
 	ldr	x5, [x29,104]
-	bne	.L2322
+	bne	.L2319
 	ldrb	w4, [x5,2832]
 	mov	w0, 0
 	add	w1, w22, 1
@@ -14207,9 +14216,9 @@ ftl_info_blk_init:
 	mov	x3, x23
 	bl	ftl_read_page
 	mov	w28, w0
-.L2322:
+.L2319:
 	ldr	w0, [x27,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2323
+	tbz	x0, 12, .L2320
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w2, w28
@@ -14218,39 +14227,39 @@ ftl_info_blk_init:
 	mov	x0, x26
 	ldr	w4, [x4]
 	bl	printk
-.L2323:
+.L2320:
 	cmn	w28, #1
-	beq	.L2321
+	beq	.L2318
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldr	w1, [x0]
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	cmp	w1, w0
-	beq	.L2333
-.L2321:
+	beq	.L2330
+.L2318:
 	sub	w20, w20, #1
 	cmn	w20, #1
-	bne	.L2325
+	bne	.L2322
 	mov	w25, 0
-	b	.L2324
-.L2333:
+	b	.L2321
+.L2330:
 	mov	w20, w25
-.L2324:
+.L2321:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2326
+	tbz	x0, 12, .L2323
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w20
 	mov	w2, 4800
 	ldr	x3, [x0,2864]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	ldr	w3, [x3]
 	bl	printk
-.L2326:
+.L2323:
 	cmn	w20, #1
-	bne	.L2327
+	bne	.L2324
 	add	x0, x21, :lo12:.LANCHOR4
 	mov	w1, 0
 	add	x19, x19, :lo12:.LANCHOR0
@@ -14261,13 +14270,13 @@ ftl_info_blk_init:
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	str	w0, [x1]
-	mov	w0, 9
+	mov	w0, 17
 	movk	w0, 0x6, lsl 16
 	ldr	x1, [x19,2864]
 	str	w0, [x1,12]
 	mov	w0, w20
-	b	.L2328
-.L2327:
+	b	.L2325
+.L2324:
 	add	x26, x19, :lo12:.LANCHOR0
 	add	x23, x21, :lo12:.LANCHOR4
 	add	w0, w25, 8
@@ -14289,8 +14298,8 @@ ftl_info_blk_init:
 	ldrb	w0, [x23,1536]
 	ldrh	w23, [x26,3350]
 	mul	w23, w0, w23
-.L2329:
-	tbnz	w22, #31, .L2332
+.L2326:
+	tbnz	w22, #31, .L2329
 	add	x26, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	add	w1, w22, w23
@@ -14299,14 +14308,14 @@ ftl_info_blk_init:
 	ldrb	w4, [x26,2832]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2330
+	beq	.L2327
 	ldr	x0, [x26,2864]
 	ldr	w1, [x0]
 	mov	w0, 21574
 	movk	w0, 0x494c, lsl 16
 	cmp	w1, w0
-	bne	.L2330
-.L2332:
+	bne	.L2327
+.L2329:
 	add	x21, x21, :lo12:.LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR0
 	strh	w20, [x21,1538]
@@ -14320,12 +14329,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2328
-.L2330:
+	b	.L2325
+.L2327:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L2329
-.L2328:
+	b	.L2326
+.L2325:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -14352,17 +14361,17 @@ ftl_ext_info_flush:
 	ldr	x1, [x1,608]
 	ldr	w3, [x1,520]
 	cmp	w0, w3
-	bls	.L2351
+	bls	.L2348
 	ldr	w2, [x1,12]
 	sub	w2, w2, w3
 	add	w2, w2, w0
 	str	w2, [x1,12]
-	b	.L2364
-.L2351:
-	bcs	.L2352
-.L2364:
+	b	.L2361
+.L2348:
+	bcs	.L2349
+.L2361:
 	str	w0, [x1,520]
-.L2352:
+.L2349:
 	adrp	x23, .LANCHOR3
 	adrp	x19, .LANCHOR4
 	add	x23, x23, :lo12:.LANCHOR3
@@ -14371,11 +14380,11 @@ ftl_ext_info_flush:
 	add	x23, x23, 424
 	add	x19, x19, 1280
 	bl	ftl_total_vpn_update
-.L2353:
+.L2350:
 	adrp	x24, .LANCHOR5
 	add	x24, x24, :lo12:.LANCHOR5
 	add	x25, x24, 640
-.L2356:
+.L2353:
 	add	x2, x22, :lo12:.LANCHOR0
 	ldr	x0, [x2,2864]
 	ldr	w1, [x0,56]
@@ -14384,22 +14393,22 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0,140]
 	ldrh	w0, [x2,3300]
 	cmp	w1, w0
-	bcc	.L2354
+	bcc	.L2351
 	bl	ftl_ext_alloc_new_blk
-.L2354:
+.L2351:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2355
+	bne	.L2352
 	adrp	x0, .LC0
 	mov	x1, x23
-	mov	w2, 1747
+	mov	w2, 1746
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2355:
+.L2352:
 	add	x21, x22, :lo12:.LANCHOR0
 	mov	w0, 21
 	mov	w1, 1
@@ -14436,17 +14445,17 @@ ftl_ext_info_flush:
 	uxth	w1, w1
 	strh	w1, [x2,140]
 	cmp	w1, 1
-	beq	.L2356
+	beq	.L2353
 	cmn	w0, #1
-	beq	.L2357
+	beq	.L2354
 	ldrb	w0, [x24,578]
-	cbz	w0, .L2358
-.L2357:
+	cbz	w0, .L2355
+.L2354:
 	adrp	x0, .LANCHOR5
 	add	x0, x0, :lo12:.LANCHOR5
 	strb	wzr, [x0,578]
-	b	.L2353
-.L2358:
+	b	.L2350
+.L2355:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -14493,26 +14502,26 @@ ftl_ext_info_init:
 	adrp	x0, .LANCHOR2
 	mov	w23, w24
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2366
+	tbz	x0, 12, .L2363
 	ldr	x5, [x26,2864]
 	adrp	x1, .LANCHOR3
-	adrp	x0, .LC171
+	adrp	x0, .LC172
 	add	x1, x1, :lo12:.LANCHOR3
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC172
 	add	x1, x1, 448
 	ldrh	w5, [x5,130]
-	mov	w2, 1791
+	mov	w2, 1790
 	mov	w3, w24
 	uxth	w4, w27
 	bl	printk
-.L2366:
+.L2363:
 	add	x20, x20, :lo12:.LANCHOR5
 	add	x21, x21, :lo12:.LANCHOR4
 	mov	w26, w24
 	add	x20, x20, 640
 	add	x21, x21, 1280
-.L2367:
-	tbnz	w26, #31, .L2372
+.L2364:
+	tbnz	w26, #31, .L2369
 	add	x27, x19, :lo12:.LANCHOR0
 	mov	w0, w25
 	mov	x2, x20
@@ -14522,31 +14531,31 @@ ftl_ext_info_init:
 	madd	w1, w22, w1, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	beq	.L2368
+	beq	.L2365
 	cmn	w0, #1
-	beq	.L2368
+	beq	.L2365
 	ldr	x0, [x27,608]
 	ldr	w1, [x0]
 	mov	w0, 20038
 	movk	w0, 0x4549, lsl 16
 	cmp	w1, w0
-	bne	.L2368
-.L2372:
+	bne	.L2365
+.L2369:
 	bl	zftl_sblk_list_init
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,140]
 	cmp	w1, w24
-	bgt	.L2370
+	bgt	.L2367
 	add	w23, w23, 1
 	strh	w23, [x0,140]
 	bl	ftl_ext_info_flush
-	b	.L2370
-.L2368:
+	b	.L2367
+.L2365:
 	sub	w26, w26, #1
 	sxth	w26, w26
-	b	.L2367
-.L2370:
+	b	.L2364
+.L2367:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x20, [x19,608]
 	bl	timer_get_time
@@ -14607,13 +14616,13 @@ ftl_write_last_log_page:
 	ldrh	w24, [x0,12]
 	cmp	w1, 1
 	ldr	x22, [x19,3872]
-	bne	.L2384
+	bne	.L2381
 	mov	x20, x0
 	bl	ftl_get_new_free_page
 	cmn	w0, #1
 	mov	w23, w0
 	mov	w21, 0
-	beq	.L2384
+	beq	.L2381
 	ldrh	w0, [x20]
 	add	x22, x22, x24, uxth 2
 	bl	ftl_vpn_decrement
@@ -14638,7 +14647,7 @@ ftl_write_last_log_page:
 	str	w21, [x2,8]
 	str	w21, [x2,12]
 	bl	ftl_prog_ppa_page
-.L2384:
+.L2381:
 	mov	w0, w21
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -14661,34 +14670,34 @@ ftl_open_sblk_recovery:
 	stp	x21, x22, [sp,32]
 	stp	x25, x26, [sp,64]
 	mov	x27, x1
-	tbz	x0, 12, .L2389
-	adrp	x0, .LC172
-	ldrh	w1, [x19,2]
-	add	x0, x0, :lo12:.LC172
-	bl	printk
-.L2389:
-	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2390
+	tbz	x0, 12, .L2386
 	adrp	x0, .LC173
-	ldrb	w1, [x19,5]
+	ldrh	w1, [x19,2]
 	add	x0, x0, :lo12:.LC173
 	bl	printk
-.L2390:
+.L2386:
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2391
+	tbz	x0, 12, .L2387
 	adrp	x0, .LC174
-	ldrh	w1, [x19]
+	ldrb	w1, [x19,5]
 	add	x0, x0, :lo12:.LC174
 	bl	printk
-.L2391:
+.L2387:
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2392
+	tbz	x0, 12, .L2388
 	adrp	x0, .LC175
+	ldrh	w1, [x19]
+	add	x0, x0, :lo12:.LC175
+	bl	printk
+.L2388:
+	ldr	w0, [x24,#:lo12:.LANCHOR2]
+	tbz	x0, 12, .L2389
+	adrp	x0, .LC176
 	ldrh	w1, [x19,16]
 	ldrh	w2, [x19,18]
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC176
 	bl	printk
-.L2392:
+.L2389:
 	ldrh	w0, [x19,10]
 	adrp	x21, .LANCHOR0
 	strh	w0, [x19,14]
@@ -14696,7 +14705,7 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19]
 	ldrh	w0, [x0,576]
 	cmp	w1, w0
-	bcs	.L2388
+	bcs	.L2385
 	mov	w0, 1
 	adrp	x25, .LANCHOR4
 	adrp	x26, .LANCHOR3
@@ -14710,21 +14719,21 @@ ftl_open_sblk_recovery:
 	mov	w28, 0
 	add	x25, x25, 1280
 	str	x0, [x29,120]
-.L2395:
+.L2392:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0,3300]
 	cmp	w0, w23
-	bls	.L2398
+	bls	.L2395
 	ldrb	w22, [x19,5]
-.L2396:
+.L2393:
 	ldrb	w0, [x19,9]
 	cmp	w0, w22
-	bls	.L2472
+	bls	.L2469
 	add	x0, x19, x22, sxtw 1
 	ldrh	w0, [x0,16]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2397
+	beq	.L2394
 	add	x3, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20,24]
 	ldrh	w1, [x3,3350]
@@ -14734,21 +14743,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	mov	w26, w0
-	beq	.L2398
+	beq	.L2395
 	cmn	w0, #1
-	beq	.L2399
+	beq	.L2396
 	ldr	x0, [x20,24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2399
+	bne	.L2396
 	ldr	w0, [x0,4]
 	cmn	w0, #1
-	bne	.L2399
+	bne	.L2396
 	ldr	x0, [x20,8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2398
-.L2399:
+	beq	.L2395
+.L2396:
 	adrp	x0, .LANCHOR5+577
 	mov	w1, 1
 	strb	w1, [x0,#:lo12:.LANCHOR5+577]
@@ -14756,14 +14765,14 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19,10]
 	madd	w0, w23, w0, w22
 	cmp	w1, w0
-	beq	.L2400
+	beq	.L2397
 	adrp	x0, .LC0
 	ldr	x1, [x29,120]
-	mov	w2, 1396
+	mov	w2, 1395
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2400:
+.L2397:
 	ldrh	w0, [x19,10]
 	ldrh	w1, [x19,6]
 	ldrb	w2, [x19,9]
@@ -14772,28 +14781,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x0,3300]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2401
+	beq	.L2398
 	adrp	x0, .LC0
 	ldr	x1, [x29,120]
-	mov	w2, 1397
+	mov	w2, 1396
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2401:
+.L2398:
 	cmn	w26, #1
-	beq	.L2405
+	beq	.L2402
 	ldr	x0, [x20,24]
 	ldr	w0, [x0,4]
 	cmn	w0, #1
-	beq	.L2405
+	beq	.L2402
 	bl	lpa_hash_get_ppa
-	cbz	x27, .L2403
+	cbz	x27, .L2400
 	ldr	x2, [x20,24]
 	ldr	w3, [x2,8]
 	cmp	w0, w3
-	beq	.L2403
+	beq	.L2400
 	cmn	w0, #1
-	beq	.L2403
+	beq	.L2400
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w5, 21
 	mov	w28, 1
@@ -14807,7 +14816,7 @@ ftl_open_sblk_recovery:
 	udiv	w3, w3, w1
 	ldrh	w1, [x27]
 	cmp	w1, w3, uxth
-	bne	.L2403
+	bne	.L2400
 	ldr	w6, [x2]
 	mov	x2, x25
 	ldrb	w3, [x4,2832]
@@ -14821,11 +14830,11 @@ ftl_open_sblk_recovery:
 	ldr	x4, [x29,112]
 	cmp	w0, w6
 	ldr	x5, [x29,96]
-	bcc	.L2403
+	bcc	.L2400
 	ldr	x0, [x20,24]
 	ldr	w1, [x0,8]
 	cmn	w1, #1
-	beq	.L2405
+	beq	.L2402
 	ldrh	w0, [x4,3340]
 	sub	w5, w5, w0
 	lsr	w1, w1, w0
@@ -14835,22 +14844,22 @@ ftl_open_sblk_recovery:
 	and	w1, w28, w1
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
-	b	.L2405
-.L2403:
+	b	.L2402
+.L2400:
 	ldr	x2, [x20,24]
 	add	x1, x21, :lo12:.LANCHOR0
 	ldr	w3, [x2,4]
 	ldr	w0, [x1,2840]
 	cmp	w3, w0
-	bcs	.L2405
+	bcs	.L2402
 	ldrb	w0, [x19,9]
 	ldrh	w4, [x1,3300]
 	ldrh	w3, [x19,10]
 	mul	w0, w0, w4
 	sub	w0, w0, #1
 	cmp	w3, w0
-	blt	.L2473
-.L2405:
+	blt	.L2470
+.L2402:
 	ldrh	w0, [x19,6]
 	mov	w28, 1
 	sub	w0, w0, #1
@@ -14858,16 +14867,16 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x19,10]
 	add	w0, w0, 1
 	strh	w0, [x19,10]
-.L2397:
+.L2394:
 	add	w22, w22, 1
 	uxth	w22, w22
-	b	.L2396
-.L2472:
+	b	.L2393
+.L2469:
 	add	w23, w23, 1
 	strb	wzr, [x19,5]
 	uxth	w23, w23
-	b	.L2395
-.L2398:
+	b	.L2392
+.L2395:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x19,10]
 	ldrh	w1, [x19,6]
@@ -14878,35 +14887,35 @@ ftl_open_sblk_recovery:
 	strb	w22, [x19,5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2409
+	beq	.L2406
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1473
+	mov	w2, 1472
 	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2409:
+.L2406:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w3, [x19,10]
 	ldr	x4, [x0,3872]
 	mov	w0, 0
 	mov	w2, w0
-.L2410:
+.L2407:
 	cmp	w2, w3
-	bcs	.L2474
+	bcs	.L2471
 	ldrh	w1, [x19,12]
 	add	w1, w2, w1
 	ldr	w1, [x4,x1,lsl 2]
 	cmn	w1, #1
-	beq	.L2411
+	beq	.L2408
 	add	w1, w0, 1
 	uxth	w0, w1
-.L2411:
+.L2408:
 	add	w2, w2, 1
-	b	.L2410
-.L2474:
+	b	.L2407
+.L2471:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrb	w1, [x19,9]
 	sub	w0, w0, w3
@@ -14914,44 +14923,44 @@ ftl_open_sblk_recovery:
 	madd	w0, w1, w22, w0
 	uxth	w22, w0
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2413
+	tbz	x0, 12, .L2410
 	ldrh	w1, [x19]
-	adrp	x0, .LC176
+	adrp	x0, .LC177
 	ldr	x4, [x2,600]
-	add	x0, x0, :lo12:.LC176
+	add	x0, x0, :lo12:.LC177
 	ubfiz	x3, x1, 1, 16
 	mov	w2, w22
 	ldrh	w3, [x4,x3]
 	bl	printk
-.L2413:
+.L2410:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x19]
-	adrp	x23, .LC177
+	adrp	x23, .LC178
 	mov	w25, -1
-	add	x23, x23, :lo12:.LC177
+	add	x23, x23, :lo12:.LC178
 	ldr	x0, [x0,600]
 	strh	w22, [x0,x1,lsl 1]
 	mov	x0, x20
 	mov	w22, 0
 	bl	buf_free
-.L2414:
+.L2411:
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x2,3276]
 	cmp	w22, w0, lsl 1
-	bcs	.L2475
-	cbz	w28, .L2415
+	bcs	.L2472
+	cbz	w28, .L2412
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bls	.L2415
+	bls	.L2412
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w26, w0
 	ldr	w0, [x24,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2416
+	tbz	x0, 12, .L2413
 	mov	x0, x23
 	mov	w1, w26
 	bl	printk
-.L2416:
+.L2413:
 	add	x3, x21, :lo12:.LANCHOR0
 	ldr	x0, [x20,24]
 	ldr	x1, [x3,2864]
@@ -14972,10 +14981,10 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x19]
 	bl	ftl_vpn_decrement
-.L2415:
+.L2412:
 	add	w22, w22, 1
-	b	.L2414
-.L2475:
+	b	.L2411
+.L2472:
 	ldrh	w1, [x2,3300]
 	ldrh	w0, [x19,12]
 	ldrb	w3, [x19,9]
@@ -14985,30 +14994,30 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x2,3872]
 	ldr	w0, [x1,x0]
 	cmn	w0, #1
-	beq	.L2418
+	beq	.L2415
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1503
+	mov	w2, 1502
 	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2418:
+.L2415:
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bne	.L2388
+	bne	.L2385
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-	b	.L2388
-.L2473:
+	b	.L2385
+.L2470:
 	ldr	x0, [x1,2864]
 	ldr	w2, [x2]
 	ldr	w1, [x0,8]
 	cmp	w2, w1
-	bls	.L2406
+	bls	.L2403
 	str	w2, [x0,8]
-.L2406:
+.L2403:
 	ldr	x1, [x20,24]
 	ldrh	w0, [x19,10]
 	ldrh	w2, [x19,12]
@@ -15016,8 +15025,8 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x1,4]
 	ldr	w1, [x1,8]
 	bl	lpa_hash_update_ppa
-	b	.L2405
-.L2388:
+	b	.L2402
+.L2385:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -15045,7 +15054,7 @@ pm_write_page:
 	adrp	x25, .LANCHOR0
 	add	x23, x23, :lo12:.LC0
 	add	x22, x22, 496
-.L2477:
+.L2474:
 	add	x2, x25, :lo12:.LANCHOR0
 	adrp	x19, .LANCHOR0
 	ldr	x0, [x2,2864]
@@ -15055,28 +15064,28 @@ pm_write_page:
 	str	w1, [x0,48]
 	ldrh	w1, [x2,3300]
 	cmp	w3, w1
-	bcs	.L2478
+	bcs	.L2475
 	ldrh	w1, [x0,692]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2479
-.L2478:
+	bne	.L2476
+.L2475:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2479:
+.L2476:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,2864]
 	ldrh	w1, [x0,692]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2480
+	bne	.L2477
 	mov	x1, x22
 	mov	w2, 230
 	mov	x0, x23
 	bl	printk
 	bl	dump_stack
-.L2480:
+.L2477:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x20, .LANCHOR7
 	add	x27, x20, :lo12:.LANCHOR7
@@ -15108,28 +15117,28 @@ pm_write_page:
 	uxth	w2, w2
 	strh	w2, [x1,696]
 	cmp	w2, 1
-	beq	.L2481
+	beq	.L2478
 	ldrb	w2, [x27,-120]
-	cbz	w2, .L2482
-.L2481:
+	cbz	w2, .L2479
+.L2478:
 	add	x20, x20, :lo12:.LANCHOR7
 	strb	wzr, [x20,-120]
-	b	.L2477
-.L2482:
+	b	.L2474
+.L2479:
 	cmn	w0, #1
-	bne	.L2484
-	adrp	x0, .LC178
+	bne	.L2481
+	adrp	x0, .LC179
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC178
+	add	x0, x0, :lo12:.LC179
 	bl	printk
-	b	.L2477
-.L2484:
+	b	.L2474
+.L2481:
 	ldrh	w0, [x1,698]
 	cmp	w21, w0
-	bcs	.L2485
+	bcs	.L2482
 	add	x21, x1, x21, uxtw 2
 	str	w26, [x21,704]
-.L2485:
+.L2482:
 	mov	w0, 0
 	ldr	x27, [sp,80]
 	ldp	x19, x20, [sp,16]
@@ -15152,7 +15161,7 @@ flash_info_flush:
 	stp	x23, x24, [sp,48]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-	tbz	x0, 12, .L2490
+	tbz	x0, 12, .L2487
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
@@ -15160,23 +15169,23 @@ flash_info_flush:
 	mov	w1, 251
 	add	x2, x2, 512
 	bl	printk
-.L2490:
+.L2487:
 	adrp	x22, .LANCHOR4
 	adrp	x23, .LANCHOR0
 	add	x0, x22, :lo12:.LANCHOR4
 	mov	w1, 0
 	mov	w2, 64
 	add	x19, x23, :lo12:.LANCHOR0
-	adrp	x24, .LC180
-	adrp	x25, .LC181
+	adrp	x24, .LC181
+	adrp	x25, .LC182
 	ldr	x0, [x0,1232]
 	mov	w26, 0
-	add	x24, x24, :lo12:.LC180
-	add	x25, x25, :lo12:.LC181
+	add	x24, x24, :lo12:.LC181
+	add	x25, x25, :lo12:.LC182
 	bl	ftl_memset
 	ldr	x1, [x19,728]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	mov	w2, 4
 	mov	w3, 16
 	bl	rknand_print_hex
@@ -15185,7 +15194,7 @@ flash_info_flush:
 	ldr	w1, [x19,8]
 	bl	js_hash
 	str	w0, [x19,12]
-.L2491:
+.L2488:
 	add	x21, x22, :lo12:.LANCHOR4
 	add	x27, x23, :lo12:.LANCHOR0
 	mov	x0, x24
@@ -15199,7 +15208,7 @@ flash_info_flush:
 	ldrh	w0, [x21,1242]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L2492
+	blt	.L2489
 	ldr	x1, [x27,728]
 	ldrb	w19, [x21,1241]
 	strh	wzr, [x21,1242]
@@ -15220,14 +15229,14 @@ flash_info_flush:
 	ldrh	w0, [x27,2]
 	mul	w19, w19, w0
 	mov	w0, 0
-	b	.L2500
-.L2492:
+	b	.L2497
+.L2489:
 	madd	w19, w20, w28, w19
-	cbnz	w0, .L2493
-.L2500:
+	cbnz	w0, .L2490
+.L2497:
 	mov	w1, w19
 	bl	flash_erase_block
-.L2493:
+.L2490:
 	add	x2, x23, :lo12:.LANCHOR0
 	add	x20, x22, :lo12:.LANCHOR4
 	mov	w4, 4
@@ -15249,16 +15258,16 @@ flash_info_flush:
 	ldrh	w1, [x20,1242]
 	add	w1, w1, 1
 	strh	w1, [x20,1242]
-	bne	.L2494
+	bne	.L2491
 	mov	x0, x25
 	mov	w1, w19
 	bl	printk
-	b	.L2491
-.L2494:
-	cbnz	w26, .L2501
+	b	.L2488
+.L2491:
+	cbnz	w26, .L2498
 	mov	w26, 1
-	b	.L2491
-.L2501:
+	b	.L2488
+.L2498:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -15272,7 +15281,7 @@ flash_info_flush:
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp,16]
 	adrp	x20, .LANCHOR2
@@ -15280,23 +15289,22 @@ nand_flash_init:
 	stp	x21, x22, [sp,32]
 	stp	x23, x24, [sp,48]
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	stp	x25, x26, [sp,64]
-	str	x27, [sp,80]
-	tbz	x0, 12, .L2503
+	str	x25, [sp,64]
+	tbz	x0, 12, .L2500
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
-	mov	w1, 2209
+	mov	w1, 2220
 	add	x2, x2, 536
 	bl	printk
-.L2503:
+.L2500:
 	mov	x0, x19
 	adrp	x19, .LANCHOR0
 	add	x22, x19, :lo12:.LANCHOR0
 	adrp	x21, .LANCHOR4
 	bl	nandc_init
-	add	x24, x22, 748
+	mov	w23, 0
 	add	x0, x20, :lo12:.LANCHOR2
 	mov	w1, 0
 	add	x0, x0, 376
@@ -15305,84 +15313,82 @@ nand_flash_init:
 	mov	w2, 8
 	strb	w0, [x22,633]
 	add	x0, x22, 736
-	mov	x23, 0
-	mov	w26, 2
+	add	x22, x22, 748
+	mov	w25, 44
 	bl	ftl_memset
-	mov	x25, x24
+	mov	x24, x22
 	add	x0, x21, :lo12:.LANCHOR4
 	mov	w1, 0
 	add	x0, x0, 1096
 	mov	w2, 32
-	mov	w27, 44
 	bl	ftl_memset
-.L2509:
+.L2506:
 	mov	w0, w23
-	mov	x1, x24
+	mov	x1, x22
 	bl	flash_read_id
-	add	x0, x22, 744
-	strb	w26, [x23,x0]
-	cbnz	x23, .L2504
-	ldrb	w0, [x25]
+	cbnz	w23, .L2501
+	ldrb	w0, [x24]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 253
-	bls	.L2505
-.L2507:
+	bls	.L2502
+.L2504:
 	mov	w22, -2
-	b	.L2571
-.L2505:
-	ldrb	w0, [x25,1]
+	b	.L2573
+.L2502:
+	ldrb	w0, [x24,1]
 	cmp	w0, 255
-	beq	.L2507
-.L2504:
-	ldrb	w0, [x24]
+	beq	.L2504
+.L2501:
+	ldrb	w0, [x22]
 	cmp	w0, 181
-	bne	.L2508
-	strb	w27, [x24]
-.L2508:
-	add	x23, x23, 1
-	add	x24, x24, 8
-	cmp	x23, 4
-	bne	.L2509
+	bne	.L2505
+	strb	w25, [x22]
+.L2505:
+	add	w23, w23, 1
+	add	x22, x22, 8
+	uxtb	w23, w23
+	cmp	w23, 4
+	bne	.L2506
 	add	x23, x20, :lo12:.LANCHOR2
 	add	x24, x19, :lo12:.LANCHOR0
 	add	x23, x23, 440
 	mov	w22, 0
 	add	x24, x24, 748
-.L2512:
+.L2509:
 	ldrb	w2, [x23]
 	add	x0, x23, 1
 	mov	x1, x24
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2510
+	cbnz	w0, .L2507
 	add	x1, x20, :lo12:.LANCHOR2
 	ubfiz	x22, x22, 5, 32
 	add	x0, x1, 440
 	adds	x22, x0, x22
-	beq	.L2507
+	beq	.L2504
 	ldrb	w3, [x22,22]
 	mov	x0, 0
-	b	.L2514
-.L2510:
+	b	.L2511
+.L2507:
 	add	w22, w22, 1
 	add	x23, x23, 32
-	cmp	w22, 30
-	bne	.L2512
-	b	.L2507
-.L2514:
+	cmp	w22, 32
+	bne	.L2509
+	b	.L2504
+.L2511:
 	add	x4, x1, x0, lsl 5
 	mov	w2, w0
-	ldrb	w4, [x4,1400]
+	ldrb	w4, [x4,1464]
 	cmp	w4, w3
-	beq	.L2513
+	beq	.L2510
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2514
+	bne	.L2511
 	mov	w2, w0
-.L2513:
+.L2510:
 	add	x23, x20, :lo12:.LANCHOR2
 	add	x24, x19, :lo12:.LANCHOR0
-	add	x1, x23, 1400
+	add	x1, x23, 1464
 	ubfiz	x2, x2, 5, 32
 	add	x1, x1, x2
 	add	x0, x24, 640
@@ -15395,30 +15401,32 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24,516]
 	cmp	w0, 8
-	bhi	.L2515
+	bhi	.L2512
 	ldrb	w1, [x23,20]
 	cmp	w1, 60
-	bls	.L2516
+	bls	.L2513
 	mov	w1, 60
 	strb	w1, [x23,20]
-.L2516:
+.L2513:
 	cmp	w0, 8
-	bne	.L2515
+	bne	.L2512
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,748]
+	cmp	w0, 137
+	beq	.L2540
 	cmp	w0, 44
-	beq	.L2577
-.L2515:
+	beq	.L2540
+.L2512:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2517
+	tbz	x0, 12, .L2515
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
-	mov	w1, 2233
+	mov	w1, 2244
 	add	x2, x2, 536
 	bl	printk
-.L2517:
+.L2515:
 	add	x23, x21, :lo12:.LANCHOR4
 	mov	w0, 16384
 	add	x22, x19, :lo12:.LANCHOR0
@@ -15439,8 +15447,9 @@ nand_flash_init:
 	str	x0, [x23,1208]
 	mov	w0, 64
 	bl	ftl_malloc
-	strb	wzr, [x23,1266]
 	str	x0, [x23,1232]
+	adrp	x0, .LANCHOR7-119
+	strb	wzr, [x0,#:lo12:.LANCHOR7-119]
 	bl	flash_die_info_init
 	ldrb	w0, [x24,394]
 	bl	flash_lsb_page_tbl_build
@@ -15467,10 +15476,10 @@ nand_flash_init:
 	strb	w2, [x22,3348]
 	strb	w0, [x19,#:lo12:.LANCHOR0]
 	cmp	w1, 9
-	bne	.L2518
+	bne	.L2516
 	mov	w1, 70
 	strb	w1, [x22,632]
-.L2518:
+.L2516:
 	add	x2, x20, :lo12:.LANCHOR2
 	add	x1, x21, :lo12:.LANCHOR4
 	add	x2, x2, 376
@@ -15479,26 +15488,26 @@ nand_flash_init:
 	ldrb	w0, [x2,19]
 	ldrh	w2, [x2,16]
 	strb	w0, [x3,725]
-	tbz	x2, 6, .L2520
+	tbz	x2, 6, .L2518
 	sub	w2, w0, #17
 	uxtb	w2, w2
 	cmp	w2, 2
-	bhi	.L2521
+	bhi	.L2519
 	adrp	x2, micron_read_retrial
 	cmp	w0, 19
 	add	x2, x2, :lo12:micron_read_retrial
 	str	x2, [x1,1224]
-	bne	.L2573
+	bne	.L2575
 	mov	w0, 15
-	b	.L2574
-.L2521:
+	b	.L2576
+.L2519:
 	sub	w2, w0, #65
 	uxtb	w2, w2
 	cmp	w2, 1
-	bls	.L2542
+	bls	.L2541
 	cmp	w0, 33
-	bne	.L2524
-.L2542:
+	bne	.L2522
+.L2541:
 	add	x0, x21, :lo12:.LANCHOR4
 	adrp	x1, toshiba_read_retrial
 	add	x1, x1, :lo12:toshiba_read_retrial
@@ -15508,115 +15517,117 @@ nand_flash_init:
 	strb	w2, [x1,726]
 	mov	w1, 7
 	strb	w1, [x0,1216]
-	b	.L2520
-.L2524:
+	b	.L2518
+.L2522:
 	sub	w2, w0, #67
 	uxtb	w2, w2
 	cmp	w2, 1
 	sub	w2, w0, #34
 	cset	w3, ls
-	uxtb	w2, w2
-	cmp	w2, 1
-	bls	.L2543
-	cbz	w3, .L2526
-.L2543:
-	add	x2, x21, :lo12:.LANCHOR4
-	adrp	x1, toshiba_read_retrial
-	add	x1, x1, :lo12:toshiba_read_retrial
 	cmp	w0, 35
-	str	x1, [x2,1224]
-	beq	.L2528
+	cset	w4, eq
+	uxtb	w2, w2
 	cmp	w0, 68
-	beq	.L2528
+	cset	w5, eq
+	cmp	w2, 1
+	bls	.L2542
+	cbz	w3, .L2524
+.L2542:
+	add	x1, x21, :lo12:.LANCHOR4
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x1,1224]
+	cbnz	w5, .L2526
+	cbnz	w4, .L2526
 	mov	w0, 7
-	strb	w0, [x2,1216]
-	b	.L2529
-.L2528:
+	strb	w0, [x1,1216]
+	b	.L2527
+.L2526:
 	add	x0, x21, :lo12:.LANCHOR4
 	mov	w1, 17
 	strb	w1, [x0,1216]
-.L2529:
+.L2527:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 4
-	cbnz	w3, .L2575
+	cbnz	w3, .L2577
 	mov	w1, 5
-.L2575:
+.L2577:
 	strb	w1, [x0,726]
-	b	.L2520
-.L2526:
+	b	.L2518
+.L2524:
 	sub	w0, w0, #36
 	uxtb	w0, w0
 	cmp	w0, 1
-	bhi	.L2520
+	bhi	.L2518
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x1,1224]
-.L2573:
+.L2575:
 	mov	w0, 7
-.L2574:
+.L2576:
 	strb	w0, [x1,1216]
-.L2520:
+.L2518:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2531
+	tbz	x0, 12, .L2529
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
-	mov	w1, 2281
+	mov	w1, 2292
 	add	x2, x2, 536
 	bl	printk
-.L2531:
+.L2529:
 	add	x0, x19, :lo12:.LANCHOR0
 	strb	wzr, [x0,672]
 	ldrb	w0, [x0,780]
-	tbz	x0, 0, .L2532
+	tbz	x0, 0, .L2530
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-	b	.L2576
-.L2532:
+	b	.L2578
+.L2530:
 	mov	w0, 4
-.L2576:
+.L2578:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	cmn	w0, #1
 	mov	w22, w0
-	bne	.L2534
+	bne	.L2532
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2535
+	tbz	x0, 12, .L2533
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
-	mov	w1, 2301
+	mov	w1, 2313
 	add	x2, x2, 536
 	bl	printk
-.L2535:
+.L2533:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, 17
 	ldr	x0, [x19,728]
 	strb	w1, [x0,32]
-	b	.L2571
-.L2534:
+	b	.L2573
+.L2532:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,725]
 	sub	w0, w0, #1
 	uxtb	w0, w0
 	cmp	w0, 6
-	bhi	.L2536
+	bhi	.L2534
 	add	x0, x21, :lo12:.LANCHOR4
 	adrp	x1, hynix_read_retrial
 	add	x1, x1, :lo12:hynix_read_retrial
 	str	x1, [x0,1224]
-.L2536:
+.L2534:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x19,780]
-	tbz	x0, 2, .L2538
+	tbz	x0, 2, .L2536
 	ldr	x0, [x19,728]
 	ldrb	w0, [x0,19]
-	cbz	w0, .L2538
+	cbz	w0, .L2536
 	add	x21, x21, :lo12:.LANCHOR4
 	ldrh	w1, [x19,2]
 	mov	w0, 0
@@ -15624,40 +15635,39 @@ nand_flash_init:
 	mul	w1, w2, w1
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x19,672]
-	cbnz	w0, .L2538
+	cbnz	w0, .L2536
 	ldr	x1, [x19,728]
 	strb	w0, [x1,19]
 	bl	flash_info_flush
-.L2538:
+.L2536:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2540
+	tbz	x0, 12, .L2538
 	adrp	x2, .LANCHOR3
 	adrp	x0, .LC127
 	add	x2, x2, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC127
-	mov	w1, 2356
+	mov	w1, 2370
 	add	x2, x2, 536
 	bl	printk
-.L2540:
+.L2538:
 	bl	nand_flash_print_info
 	mov	w22, 0
-	b	.L2571
-.L2577:
+	b	.L2573
+.L2540:
 	add	x0, x20, :lo12:.LANCHOR2
 	add	x0, x0, 376
 	ldrb	w1, [x0,28]
 	cmp	w1, 3
-	bne	.L2515
+	bne	.L2512
 	strb	wzr, [x0,28]
-	b	.L2515
-.L2571:
+	b	.L2512
+.L2573:
 	mov	w0, w22
-	ldr	x27, [sp,80]
+	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
-	ldp	x25, x26, [sp,64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
 	.size	nand_flash_init, .-nand_flash_init
 	.align	2
@@ -15677,19 +15687,19 @@ ftl_sysblk_dump:
 	bl	buf_alloc
 	ldr	x24, [x0,8]
 	mov	w20, 0
-	adrp	x22, .LC182
-	adrp	x23, .LC183
+	adrp	x22, .LC183
+	adrp	x23, .LC184
 	mov	x27, x0
 	mov	w19, w20
 	adrp	x28, .LANCHOR0
-	add	x22, x22, :lo12:.LC182
-	add	x23, x23, :lo12:.LC183
+	add	x22, x22, :lo12:.LC183
+	add	x23, x23, :lo12:.LC184
 	add	x24, x24, 704
-.L2579:
+.L2580:
 	add	x3, x28, :lo12:.LANCHOR0
 	ldrh	w1, [x3,3300]
 	cmp	w1, w19
-	bls	.L2591
+	bls	.L2592
 	ldrh	w21, [x3,3350]
 	ldr	x1, [x27,8]
 	ldr	x2, [x27,24]
@@ -15725,28 +15735,28 @@ ftl_sysblk_dump:
 	mov	w3, 32
 	bl	rknand_print_hex
 	cmp	w26, 512
-	beq	.L2584
+	beq	.L2585
 	cmn	w26, #1
-	bne	.L2580
-.L2584:
+	bne	.L2581
+.L2585:
 	mov	w20, 1
-.L2580:
+.L2581:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2579
-.L2591:
+	b	.L2580
+.L2592:
 	mov	x0, x27
 	bl	buf_free
-	cbz	w20, .L2583
+	cbz	w20, .L2584
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1339
+	mov	w2, 1338
 	add	x1, x1, 552
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2583:
+.L2584:
 	sub	sp, x29, #48
 	mov	w0, w20
 	ldp	x19, x20, [sp,64]
@@ -15763,31 +15773,31 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LC184
+	adrp	x0, .LC185
 	add	x29, sp, 0
 	str	x19, [sp,16]
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC185
 	ldrb	w1, [x19,2834]
 	bl	printk
 	adrp	x3, .LANCHOR4
-	adrp	x0, .LC185
+	adrp	x0, .LC186
 	add	x3, x3, :lo12:.LANCHOR4
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC186
 	ldrb	w1, [x3,1536]
 	ldrb	w2, [x3,1537]
 	ldrh	w3, [x3,1538]
 	bl	printk
 	ldr	x2, [x19,2864]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	ldrh	w1, [x2,130]
 	ldrh	w2, [x2,140]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	add	x5, x1, 16
 	ldrh	w1, [x1,16]
 	ldrh	w2, [x5,2]
@@ -15796,8 +15806,8 @@ dump_ftl_info:
 	ldrh	w5, [x5,10]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	add	x5, x1, 48
 	ldrh	w1, [x1,48]
 	ldrh	w2, [x5,2]
@@ -15806,8 +15816,8 @@ dump_ftl_info:
 	ldrh	w5, [x5,10]
 	bl	printk
 	ldr	x1, [x19,608]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	add	x5, x1, 80
 	ldrh	w1, [x1,80]
 	ldrh	w4, [x5,6]
@@ -15820,32 +15830,32 @@ dump_ftl_info:
 	ldrb	w3, [x19,3276]
 	ldr	x1, [x19,3872]
 	mul	w3, w0, w3
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	lsl	w3, w3, 1
 	bl	rknand_print_hex
 	ldr	x1, [x19,600]
-	adrp	x0, .LC191
+	adrp	x0, .LC192
 	ldrh	w3, [x19,576]
-	add	x0, x0, :lo12:.LC191
+	add	x0, x0, :lo12:.LC192
 	mov	w2, 2
 	bl	rknand_print_hex
 	ldr	x3, [x19,2864]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	mov	w2, 4
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	ldr	x1, [x19,584]
-	adrp	x0, .LC192
+	adrp	x0, .LC193
 	ldrh	w3, [x19,576]
-	add	x0, x0, :lo12:.LC192
+	add	x0, x0, :lo12:.LC193
 	mov	w2, 4
 	bl	rknand_print_hex
-	adrp	x0, .LC193
+	adrp	x0, .LC194
 	add	x1, x19, 3360
-	add	x0, x0, :lo12:.LC193
+	add	x0, x0, :lo12:.LC194
 	mov	w2, 2
 	mov	w3, 256
 	bl	rknand_print_hex
@@ -15854,8 +15864,8 @@ dump_ftl_info:
 	ldrb	w3, [x19,3276]
 	ldr	x1, [x19,3880]
 	mul	w3, w0, w3
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	lsl	w3, w3, 1
 	bl	rknand_print_hex
 	ldr	x19, [sp,16]
@@ -15886,19 +15896,19 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 7
 	cset	w4, eq
-	cbnz	w4, .L2597
+	cbnz	w4, .L2598
 	cmp	w3, w7
-	bne	.L2594
-.L2597:
+	bne	.L2595
+.L2598:
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printk
 	bl	dump_ftl_info
 	mov	w4, -1
-.L2594:
+.L2595:
 	mov	w0, w4
 	ldp	x29, x30, [sp], 16
 	ret
@@ -15914,7 +15924,7 @@ load_l2p_region:
 	stp	x19, x20, [sp,16]
 	cmp	w22, 31
 	uxth	w20, w0
-	bls	.L2600
+	bls	.L2601
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -15923,17 +15933,17 @@ load_l2p_region:
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2600:
+.L2601:
 	adrp	x21, .LANCHOR0
 	adrp	x19, .LANCHOR7
 	add	x21, x21, :lo12:.LANCHOR0
 	ldr	x0, [x21,2864]
 	ldrh	w2, [x0,698]
 	cmp	w20, w2
-	bls	.L2601
-	adrp	x0, .LC196
+	bls	.L2602
+	adrp	x0, .LC197
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC196
+	add	x0, x0, :lo12:.LC197
 	add	x19, x19, :lo12:.LANCHOR7
 	bl	printk
 	mov	x0, 0
@@ -15944,15 +15954,15 @@ load_l2p_region:
 	ldr	x0, [x21,2864]
 	ldrh	w0, [x0,698]
 	cmp	w0, w20
-	bcs	.L2603
+	bcs	.L2604
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
 	add	x1, x1, 568
 	mov	w2, 35
-	b	.L2607
-.L2601:
+	b	.L2608
+.L2602:
 	add	x0, x0, x20, sxtw 2
 	sbfiz	x22, x22, 4, 32
 	ldr	w4, [x0,704]
@@ -15960,19 +15970,19 @@ load_l2p_region:
 	add	x23, x0, x22
 	strh	w20, [x0,x22]
 	strh	wzr, [x23,2]
-	cbnz	w4, .L2604
-	adrp	x0, .LC197
+	cbnz	w4, .L2605
+	adrp	x0, .LC198
 	mov	w1, w20
 	mov	w2, w4
 	add	x19, x19, :lo12:.LANCHOR7
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC198
 	bl	printk
 	ldr	x0, [x23,8]
 	mov	w1, 255
 	ldrh	w2, [x19,-118]
 	bl	ftl_memset
-	b	.L2603
-.L2604:
+	b	.L2604
+.L2605:
 	add	x22, x19, :lo12:.LANCHOR7
 	ldrb	w3, [x21,2832]
 	ldr	x1, [x23,8]
@@ -15985,47 +15995,47 @@ load_l2p_region:
 	ldr	x4, [x29,72]
 	ldr	w2, [x0]
 	cmp	w2, w20
-	beq	.L2605
-	adrp	x0, .LC198
+	beq	.L2606
+	adrp	x0, .LC199
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC199
 	bl	printk
 	ldr	x3, [x21,2864]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	mov	w2, 4
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	ldrb	w3, [x21,2832]
-	adrp	x0, .LC200
+	adrp	x0, .LC201
 	ldr	x1, [x23,8]
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC201
 	mov	w2, 4
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	adrp	x0, .LC201
+	adrp	x0, .LC202
 	ldr	x1, [x22,-128]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC202
 	mov	w2, 4
 	mov	w3, 16
 	bl	rknand_print_hex
-.L2605:
+.L2606:
 	add	x19, x19, :lo12:.LANCHOR7
 	ldr	x0, [x19,-128]
 	ldr	w0, [x0]
 	cmp	w0, w20
-	beq	.L2603
+	beq	.L2604
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC0
 	add	x1, x1, 568
 	mov	w2, 59
-.L2607:
+.L2608:
 	bl	printk
 	bl	dump_stack
-.L2603:
+.L2604:
 	mov	w0, 0
 	ldr	x23, [sp,48]
 	ldp	x19, x20, [sp,16]
@@ -16052,19 +16062,19 @@ pm_gc:
 	ldrh	w0, [x19,1164]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2610
+	blt	.L2611
 	bl	pm_free_sblk
 	ldr	x2, [x20,2864]
 	ldrh	w1, [x19,1164]
 	ldrh	w3, [x2,688]
 	sub	w1, w1, #1
 	cmp	w3, w1
-	blt	.L2610
+	blt	.L2611
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0,416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2612
+	bne	.L2613
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
@@ -16077,7 +16087,7 @@ pm_gc:
 	ldr	x1, [x20,2864]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0,416]
-.L2612:
+.L2613:
 	bl	pm_select_ram_region
 	uxth	x20, w0
 	add	x0, x23, :lo12:.LANCHOR0
@@ -16088,27 +16098,27 @@ pm_gc:
 	ldrh	w0, [x0,x1]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2613
+	beq	.L2614
 	ldr	x1, [x19,8]
-	cbz	x1, .L2613
+	cbz	x1, .L2614
 	ldrsh	w2, [x19,2]
-	tbz	w2, #31, .L2613
+	tbz	w2, #31, .L2614
 	bl	pm_write_page
 	ldrh	w0, [x19,2]
 	and	w0, w0, 32767
 	strh	w0, [x19,2]
-.L2613:
+.L2614:
 	add	x23, x23, :lo12:.LANCHOR0
 	mov	w19, 0
 	add	x0, x23, 3904
 	mov	w24, 21
 	mov	w25, 1
 	add	x20, x0, x20, lsl 4
-.L2614:
+.L2615:
 	ldr	x0, [x23,2864]
 	ldrh	w1, [x0,698]
 	cmp	w1, w19
-	bls	.L2620
+	bls	.L2621
 	ldrh	w1, [x23,3340]
 	add	x0, x0, x19, sxtw 2
 	ldr	w0, [x0,704]
@@ -16120,7 +16130,7 @@ pm_gc:
 	ldrb	w0, [x23,3338]
 	udiv	w1, w1, w0
 	cmp	w21, w1, uxth
-	bne	.L2615
+	bne	.L2616
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16129,13 +16139,13 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x20]
-.L2615:
+.L2616:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2614
-.L2620:
+	b	.L2615
+.L2621:
 	bl	pm_free_sblk
-.L2610:
+.L2611:
 	mov	w0, 0
 	ldr	x25, [sp,64]
 	ldp	x19, x20, [sp,16]
@@ -16163,10 +16173,10 @@ pm_flush_id:
 	and	w0, w0, 32767
 	strh	w0, [x20,2]
 	ldr	w0, [x19,3896]
-	cbz	w0, .L2622
+	cbz	w0, .L2623
 	bl	pm_gc
 	str	wzr, [x19,3896]
-.L2622:
+.L2623:
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -16183,16 +16193,16 @@ pm_flush:
 	mov	x19, 0
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x20, x20, 3904
-.L2628:
+.L2629:
 	add	x1, x20, x19, lsl 4
 	uxth	w0, w19
 	ldrsh	w1, [x1,2]
-	tbz	w1, #31, .L2627
+	tbz	w1, #31, .L2628
 	bl	pm_flush_id
-.L2627:
+.L2628:
 	add	x19, x19, 1
 	cmp	x19, 32
-	bne	.L2628
+	bne	.L2629
 	mov	w0, 0
 	ldp	x19, x20, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -16249,19 +16259,19 @@ pm_init:
 	mov	w24, -1
 	str	x0, [x22,-128]
 	add	x22, x20, 512
-.L2634:
+.L2635:
 	strh	w24, [x20]
 	strh	wzr, [x20,2]
-	cbz	w23, .L2633
+	cbz	w23, .L2634
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20,8]
-.L2633:
+.L2634:
 	add	x20, x20, 16
 	cmp	x20, x22
-	bne	.L2634
+	bne	.L2635
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR7
 	mov	w4, 4
@@ -16278,20 +16288,20 @@ pm_init:
 	mov	w24, w21
 	ldrh	w2, [x1,696]
 	cmp	w2, w21
-	bgt	.L2635
-	adrp	x0, .LC202
+	bgt	.L2636
+	adrp	x0, .LC203
 	ldrh	w1, [x1,692]
 	mov	w3, w21
-	add	x0, x0, :lo12:.LC202
-	adrp	x26, .LC203
+	add	x0, x0, :lo12:.LC203
+	adrp	x26, .LC204
 	add	w21, w21, 1
 	bl	printk
-	add	x26, x26, :lo12:.LC203
+	add	x26, x26, :lo12:.LC204
 	ldr	x0, [x20,2864]
 	ldrsh	w20, [x0,696]
-.L2636:
+.L2637:
 	cmp	w20, w21
-	bge	.L2649
+	bge	.L2650
 	add	x27, x19, :lo12:.LANCHOR0
 	mov	x2, x23
 	mov	x3, x25
@@ -16314,21 +16324,21 @@ pm_init:
 	ldr	w1, [x25]
 	bl	printk
 	cmp	w28, 512
-	beq	.L2637
+	beq	.L2638
 	cmn	w28, #1
-	beq	.L2637
+	beq	.L2638
 	ldr	x1, [x27,2864]
 	ldr	w0, [x25]
 	ldrh	w2, [x1,698]
 	cmp	w0, w2
-	bcs	.L2637
+	bcs	.L2638
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0,704]
-.L2637:
+.L2638:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L2636
-.L2649:
+	b	.L2637
+.L2650:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x0, .LANCHOR5+577
 	mov	w1, 1
@@ -16343,7 +16353,7 @@ pm_init:
 	ldr	x1, [x19,3912]
 	mov	w0, -1
 	bl	pm_write_page
-.L2635:
+.L2636:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16381,28 +16391,28 @@ pm_log2phys:
 	uxth	w25, w20
 	msub	w24, w25, w24, w0
 	uxth	x24, w24
-	bcc	.L2662
-	adrp	x0, .LC204
+	bcc	.L2663
+	adrp	x0, .LC205
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC205
 	bl	printk
 	mov	w0, -1
-	b	.L2652
-.L2666:
+	b	.L2653
+.L2667:
 	ldrh	w0, [x3]
 	cmp	w0, w25
-	beq	.L2654
-.L2653:
+	beq	.L2655
+.L2654:
 	add	w19, w19, 1
 	add	x3, x3, 16
 	uxth	x19, w19
 	cmp	w19, 32
-	beq	.L2665
-.L2662:
+	beq	.L2666
+.L2663:
 	ldr	x0, [x3,8]
-	cbnz	x0, .L2666
-	b	.L2653
-.L2665:
+	cbnz	x0, .L2667
+	b	.L2654
+.L2666:
 	bl	pm_select_ram_region
 	uxth	x19, w0
 	add	x2, x21, :lo12:.LANCHOR0
@@ -16413,21 +16423,21 @@ pm_log2phys:
 	ldrh	w3, [x2,x3]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L2667
-.L2658:
+	bne	.L2668
+.L2659:
 	adrp	x0, .LANCHOR7-116
 	strb	w19, [x0,#:lo12:.LANCHOR7-116]
 	mov	w0, w25
 	bl	load_l2p_region
-.L2654:
-	cbnz	w23, .L2655
+.L2655:
+	cbnz	w23, .L2656
 	add	x0, x21, :lo12:.LANCHOR0
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0,3912]
 	ldr	w0, [x0,x24,lsl 2]
 	str	w0, [x22]
-	b	.L2656
-.L2655:
+	b	.L2657
+.L2656:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w2, [x22]
 	add	x0, x0, 3904
@@ -16439,7 +16449,7 @@ pm_log2phys:
 	strh	w1, [x0,2]
 	adrp	x0, .LANCHOR4+64
 	strb	w20, [x0,#:lo12:.LANCHOR4+64]
-.L2656:
+.L2657:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w2, 32767
 	add	x21, x21, 3904
@@ -16448,18 +16458,18 @@ pm_log2phys:
 	ldrh	w1, [x19,2]
 	and	w3, w1, 32767
 	cmp	w3, w2
-	beq	.L2652
+	beq	.L2653
 	add	w1, w1, 1
 	strh	w1, [x19,2]
-	b	.L2652
-.L2667:
+	b	.L2653
+.L2668:
 	ldrsh	w2, [x4,2]
-	tbz	w2, #31, .L2658
+	tbz	w2, #31, .L2659
 	str	x1, [x29,88]
 	bl	pm_flush_id
 	ldr	x1, [x29,88]
-	b	.L2658
-.L2652:
+	b	.L2659
+.L2653:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -16493,7 +16503,7 @@ gc_recovery:
 	add	x22, x21, 80
 	cmp	w1, w0
 	ldr	x0, [x24,608]
-	beq	.L2669
+	beq	.L2670
 	mov	w1, -1
 	strh	w1, [x0,130]
 	mov	w0, 1
@@ -16508,37 +16518,37 @@ gc_recovery:
 	ldrb	w1, [x24,3257]
 	str	w0, [x29,152]
 	cmp	w1, 3
-	bne	.L2670
+	bne	.L2671
 	ldrh	w1, [x24,3300]
 	sub	w1, w1, #1
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-	b	.L2713
-.L2670:
+	b	.L2714
+.L2671:
 	cmp	w1, 2
-	bne	.L2671
+	bne	.L2672
 	ldrh	w1, [x24,3300]
 	add	w0, w0, w1, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-.L2713:
+.L2714:
 	str	w0, [x19,40]
-.L2671:
+.L2672:
 	mov	x0, x19
 	mov	w1, 1
 	bl	sblk_read_page
 	ldr	w0, [x19,52]
 	cmp	w0, 512
-	beq	.L2672
+	beq	.L2673
 	cmn	w0, #1
-	beq	.L2672
+	beq	.L2673
 	ldr	x0, [x19,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2673
-.L2672:
+	beq	.L2674
+.L2673:
 	mov	x0, x19
 	bl	buf_free
 	ldr	x7, [x19,24]
@@ -16549,8 +16559,8 @@ gc_recovery:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	ldr	w3, [x6]
 	ldr	w4, [x6,4]
 	ldr	w5, [x6,8]
@@ -16559,8 +16569,8 @@ gc_recovery:
 	ldr	w6, [x6,12]
 	ldr	w7, [x7]
 	bl	printk
-	b	.L2716
-.L2673:
+	b	.L2717
+.L2674:
 	add	x24, x20, :lo12:.LANCHOR0
 	ldr	x0, [x29,136]
 	ldr	x1, [x19,8]
@@ -16582,28 +16592,28 @@ gc_recovery:
 	ldrb	w26, [x24,3257]
 	ldrh	w25, [x24,3300]
 	cmp	w26, 2
-	bne	.L2675
+	bne	.L2676
 	lsl	w25, w25, 1
 	mov	w26, 1
-.L2675:
+.L2676:
 	mov	w23, 0
-	adrp	x24, .LC206
-	add	x0, x24, :lo12:.LC206
+	adrp	x24, .LC207
+	add	x0, x24, :lo12:.LC207
 	mov	w27, w23
 	str	x0, [x29,112]
-	b	.L2676
-.L2718:
+	b	.L2677
+.L2719:
 	ldr	x0, [x0,1144]
 	ldr	w1, [x0,x12]
 	ldr	w0, [x7,8]
 	cmp	w1, w0
-	bne	.L2680
-.L2703:
+	bne	.L2681
+.L2704:
 	add	w27, w27, 1
 	add	w28, w28, 1
-.L2684:
+.L2685:
 	cmp	w28, w26
-	bhi	.L2717
+	bhi	.L2718
 	ldr	x0, [x29,128]
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x0, 8
@@ -16613,10 +16623,10 @@ gc_recovery:
 	cmp	w1, 3
 	mul	w0, w0, w2
 	str	w0, [x29,152]
-	bne	.L2677
+	bne	.L2678
 	add	w0, w0, w23
 	orr	w0, w0, w28, lsl 24
-.L2714:
+.L2715:
 	str	w0, [x19,40]
 	mov	w1, 1
 	mov	x0, x19
@@ -16629,8 +16639,8 @@ gc_recovery:
 	ldr	x1, [x0,1136]
 	ldr	w3, [x1,x12]
 	cmp	w3, w6
-	beq	.L2718
-.L2680:
+	beq	.L2719
+.L2681:
 	ldr	x0, [x29,136]
 	str	x12, [x29,104]
 	add	x13, x0, :lo12:.LANCHOR4
@@ -16650,10 +16660,10 @@ gc_recovery:
 	ldr	x0, [x13,1136]
 	ldr	w0, [x0,x12]
 	cmn	w0, #1
-	beq	.L2703
+	beq	.L2704
 	mov	x0, x19
 	bl	buf_free
-.L2716:
+.L2717:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w2, [x21,80]
 	mov	w28, 0
@@ -16662,38 +16672,38 @@ gc_recovery:
 	ldr	x0, [x0,608]
 	ldrh	w1, [x21,80]
 	strh	w1, [x0,130]
-	b	.L2674
-.L2683:
+	b	.L2675
+.L2684:
 	add	w23, w23, 1
-.L2676:
+.L2677:
 	cmp	w23, w25
-	beq	.L2685
+	beq	.L2686
 	sub	w0, w23, #1
 	mov	w24, 0
 	str	w0, [x29,124]
-.L2686:
+.L2687:
 	ldrb	w0, [x22,9]
 	cmp	w24, w0
-	bge	.L2683
+	bge	.L2684
 	sxtw	x0, w24
 	mov	w28, 1
 	str	x0, [x29,128]
-	b	.L2684
-.L2677:
+	b	.L2685
+.L2678:
 	cmp	w1, 2
-	bne	.L2679
+	bne	.L2680
 	ldr	w1, [x29,124]
 	add	w0, w0, w1
 	add	w0, w0, w28
 	orr	w0, w0, 33554432
-	b	.L2714
-.L2679:
+	b	.L2715
+.L2680:
 	add	w0, w0, w23
-	b	.L2714
-.L2717:
+	b	.L2715
+.L2718:
 	add	w24, w24, 1
-	b	.L2686
-.L2685:
+	b	.L2687
+.L2686:
 	mov	x0, x19
 	mov	w28, 0
 	mov	w27, w28
@@ -16706,22 +16716,22 @@ gc_recovery:
 	ldrh	w0, [x0,3274]
 	mul	w0, w1, w0
 	strh	w0, [x2,x3,lsl 1]
-.L2687:
+.L2688:
 	cmp	w27, w25
-	beq	.L2698
+	beq	.L2699
 	sub	w0, w27, #1
 	mov	w24, 0
 	str	w0, [x29,104]
-.L2699:
+.L2700:
 	ldrb	w0, [x22,9]
 	cmp	w24, w0
-	bge	.L2696
+	bge	.L2697
 	sxtw	x0, w24
 	mov	w23, 1
 	str	x0, [x29,112]
-.L2697:
+.L2698:
 	cmp	w23, w26
-	bhi	.L2719
+	bhi	.L2720
 	ldr	x1, [x29,136]
 	ldr	w0, [x29,128]
 	add	x1, x1, :lo12:.LANCHOR4
@@ -16729,7 +16739,7 @@ gc_recovery:
 	ldr	x2, [x1,1136]
 	ldr	w6, [x2,x0]
 	cmn	w6, #1
-	beq	.L2688
+	beq	.L2689
 	ldr	x1, [x1,1144]
 	str	x6, [x29,96]
 	ldr	w0, [x1,x0]
@@ -16739,13 +16749,13 @@ gc_recovery:
 	str	w0, [x29,156]
 	cmn	w0, #1
 	ldr	x6, [x29,96]
-	bne	.L2689
+	bne	.L2690
 	mov	w0, w6
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	x6, [x29,96]
-.L2689:
+.L2690:
 	ldr	x0, [x29,112]
 	add	x0, x0, 8
 	ldrh	w1, [x22,x0,lsl 1]
@@ -16754,21 +16764,21 @@ gc_recovery:
 	ldrb	w0, [x0,3257]
 	cmp	w0, 3
 	mul	w1, w1, w2
-	bne	.L2690
+	bne	.L2691
 	add	w1, w1, w27
 	orr	w1, w1, w23, lsl 24
-	b	.L2715
-.L2690:
+	b	.L2716
+.L2691:
 	cmp	w0, 2
-	bne	.L2692
+	bne	.L2693
 	ldr	w0, [x29,104]
 	add	w1, w1, w0
 	add	w1, w1, w23
 	orr	w1, w1, 33554432
-	b	.L2715
-.L2692:
+	b	.L2716
+.L2693:
 	add	w1, w1, w27
-.L2715:
+.L2716:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w2, [x29,124]
 	str	w1, [x29,152]
@@ -16786,19 +16796,19 @@ gc_recovery:
 	ldr	w1, [x29,124]
 	cmp	w0, w1
 	uxth	x19, w19
-	bne	.L2693
+	bne	.L2694
 	mov	w0, w6
 	add	x1, x29, 152
 	add	w28, w28, 1
 	bl	pm_log2phys
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-	b	.L2694
-.L2693:
+	b	.L2695
+.L2694:
 	ldr	w1, [x29,152]
 	cmp	w0, w1
 	csinc	w28, w28, w28, ne
-.L2694:
+.L2695:
 	ldr	w0, [x29,128]
 	add	x1, x20, :lo12:.LANCHOR0
 	add	w0, w0, 1
@@ -16807,31 +16817,33 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0,2]
 	ands	w0, w0, 224
-	bne	.L2688
+	bne	.L2689
 	lsl	x19, x19, 1
 	ldr	x1, [x1,600]
 	ldrh	w2, [x1,x19]
-	cbz	w2, .L2688
+	cbz	w2, .L2689
 	strh	w0, [x1,x19]
-.L2688:
+.L2689:
 	add	w23, w23, 1
-	b	.L2697
-.L2719:
+	b	.L2698
+.L2720:
 	add	w24, w24, 1
-	b	.L2699
-.L2696:
+	b	.L2700
+.L2697:
 	add	w27, w27, 1
-	b	.L2687
-.L2698:
+	b	.L2688
+.L2699:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x21,80]
 	ldr	x0, [x0,600]
 	strh	w28, [x0,x1,lsl 1]
-.L2674:
+	ldrh	w0, [x21,80]
+	bl	zftl_insert_data_list
+.L2675:
 	ldrh	w1, [x21,80]
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	bl	printk
 	mov	w0, -1
 	strh	w0, [x21,80]
@@ -16842,9 +16854,9 @@ gc_recovery:
 	ldr	x0, [x0,608]
 	ldrh	w0, [x0,130]
 	cmp	w0, w1
-	beq	.L2700
+	beq	.L2701
 	bl	ftl_free_sblk
-.L2700:
+.L2701:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w0, -1
 	ldr	x1, [x20,2864]
@@ -16853,15 +16865,15 @@ gc_recovery:
 	strh	w0, [x1,130]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2668
-.L2669:
+	b	.L2669
+.L2670:
 	ldrh	w0, [x0,130]
 	cmp	w0, w1
-	beq	.L2668
+	beq	.L2669
 	ldr	x1, [x24,2864]
 	ldrh	w1, [x1,126]
 	cmp	w1, w0
-	bne	.L2702
+	bne	.L2703
 	bl	pm_flush
 	ldr	x0, [x24,608]
 	ldrh	w0, [x0,130]
@@ -16871,12 +16883,12 @@ gc_recovery:
 	strh	w1, [x0,126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2702:
+.L2703:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, -1
 	ldr	x0, [x20,608]
 	strh	w1, [x0,130]
-.L2668:
+.L2669:
 	sub	sp, x29, #32
 	ldp	x19, x20, [sp,48]
 	ldp	x21, x22, [sp,64]
@@ -16905,7 +16917,7 @@ zftl_init:
 	add	x23, x21, :lo12:.LANCHOR7
 	strb	w0, [x20,2888]
 	strb	w0, [x20,3893]
-	strb	w0, [x1,1267]
+	strb	w0, [x1,1266]
 	mov	w0, -1
 	adrp	x1, .LC2
 	str	w0, [x23,-112]
@@ -16942,14 +16954,14 @@ zftl_init:
 	strh	w7, [x20,576]
 	mov	x20, x11
 	strh	w10, [x23,-118]
-.L2721:
+.L2722:
 	cmp	w2, w4
-	bhi	.L2787
+	bhi	.L2788
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	uxth	w1, w1
-	b	.L2721
-.L2787:
+	b	.L2722
+.L2788:
 	mul	w3, w0, w3
 	add	x2, x19, :lo12:.LANCHOR0
 	sub	w1, w1, #1
@@ -16958,14 +16970,14 @@ zftl_init:
 	mov	w1, 1
 	lsr	w4, w5, 21
 	mov	w2, 0
-.L2723:
+.L2724:
 	cmp	w1, w4
-	bhi	.L2788
+	bhi	.L2789
 	add	w2, w2, 1
 	lsl	w1, w1, 1
 	uxth	w2, w2
-	b	.L2723
-.L2788:
+	b	.L2724
+.L2789:
 	mov	w1, 57344
 	mov	w4, 1
 	movk	w1, 0x1c, lsl 16
@@ -17002,10 +17014,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x4,3306]
 	cmp	w0, 79
-	bhi	.L2725
+	bhi	.L2726
 	mov	w0, 80
 	strh	w0, [x4,3306]
-.L2725:
+.L2726:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 2000
 	mov	w3, 256
@@ -17019,10 +17031,10 @@ zftl_init:
 	strh	w3, [x2,1162]
 	mov	w2, 32
 	strh	w2, [x0,592]
-	beq	.L2726
+	beq	.L2727
 	ldrb	w0, [x0,3272]
-	cbz	w0, .L2727
-.L2726:
+	cbz	w0, .L2728
+.L2727:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 150
 	mov	w3, 64
@@ -17032,26 +17044,18 @@ zftl_init:
 	mov	w3, 12
 	strh	w3, [x0,592]
 	ldrb	w3, [x19,#:lo12:.LANCHOR0]
-	cbnz	w3, .L2727
+	cbnz	w3, .L2728
 	mov	w3, 4
 	strh	w3, [x0,592]
 	mov	w3, 600
 	strh	w3, [x0,3346]
 	mov	w0, 128
 	strh	w0, [x2,1160]
-.L2727:
-	ldr	w0, [x20,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2729
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
-	bl	printk
-.L2729:
+.L2728:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	tbz	x0, 12, .L2730
-	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC209
 	add	x0, x0, :lo12:.LC209
-	ldr	w1, [x1,2836]
 	bl	printk
 .L2730:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
@@ -17059,15 +17063,15 @@ zftl_init:
 	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC210
 	add	x0, x0, :lo12:.LC210
-	ldr	w1, [x1,2840]
+	ldr	w1, [x1,2836]
 	bl	printk
 .L2731:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	tbz	x0, 12, .L2732
-	add	x1, x21, :lo12:.LANCHOR7
+	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC211
 	add	x0, x0, :lo12:.LC211
-	ldr	w1, [x1,-108]
+	ldr	w1, [x1,2840]
 	bl	printk
 .L2732:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
@@ -17075,7 +17079,7 @@ zftl_init:
 	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC212
 	add	x0, x0, :lo12:.LC212
-	ldrh	w1, [x1,-104]
+	ldr	w1, [x1,-108]
 	bl	printk
 .L2733:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
@@ -17083,23 +17087,23 @@ zftl_init:
 	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC213
 	add	x0, x0, :lo12:.LC213
-	ldrh	w1, [x1,-118]
+	ldrh	w1, [x1,-104]
 	bl	printk
 .L2734:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	tbz	x0, 12, .L2735
-	add	x22, x22, :lo12:.LANCHOR4
+	add	x1, x21, :lo12:.LANCHOR7
 	adrp	x0, .LC214
 	add	x0, x0, :lo12:.LC214
-	ldrh	w1, [x22,1164]
+	ldrh	w1, [x1,-118]
 	bl	printk
 .L2735:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	tbz	x0, 12, .L2736
-	add	x1, x19, :lo12:.LANCHOR0
+	add	x22, x22, :lo12:.LANCHOR4
 	adrp	x0, .LC215
 	add	x0, x0, :lo12:.LC215
-	ldrh	w1, [x1,3306]
+	ldrh	w1, [x22,1164]
 	bl	printk
 .L2736:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
@@ -17107,9 +17111,17 @@ zftl_init:
 	add	x1, x19, :lo12:.LANCHOR0
 	adrp	x0, .LC216
 	add	x0, x0, :lo12:.LC216
-	ldrh	w1, [x1,3308]
+	ldrh	w1, [x1,3306]
 	bl	printk
 .L2737:
+	ldr	w0, [x20,#:lo12:.LANCHOR2]
+	tbz	x0, 12, .L2738
+	add	x1, x19, :lo12:.LANCHOR0
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
+	ldrh	w1, [x1,3308]
+	bl	printk
+.L2738:
 	add	x22, x19, :lo12:.LANCHOR0
 	bl	buf_init
 	mov	w0, 6
@@ -17138,11 +17150,11 @@ zftl_init:
 	ldr	w0, [x20,#:lo12:.LANCHOR2]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x22,608]
-	tbz	x0, 12, .L2738
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	tbz	x0, 12, .L2739
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
 	bl	printk
-.L2738:
+.L2739:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x3, x21, :lo12:.LANCHOR7
 	ldrh	w0, [x2,3300]
@@ -17157,28 +17169,28 @@ zftl_init:
 	add	w24, w24, 704
 	lsl	w22, w22, 1
 	add	w22, w22, 632
-	tbz	x0, 12, .L2739
-	adrp	x0, .LC218
+	tbz	x0, 12, .L2740
+	adrp	x0, .LC219
 	ldrh	w3, [x3,-118]
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC219
 	mov	w1, w22
 	mov	w2, w24
 	bl	printk
-.L2739:
+.L2740:
 	add	x21, x21, :lo12:.LANCHOR7
 	ldrh	w0, [x21,-118]
 	cmp	w22, w0
-	bhi	.L2741
+	bhi	.L2742
 	cmp	w24, w0
-	bls	.L2740
-.L2741:
+	bls	.L2741
 .L2742:
-	b	.L2742
-.L2740:
+.L2743:
+	b	.L2743
+.L2741:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2743
+	beq	.L2744
 	bl	ftl_ext_info_init
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
@@ -17211,18 +17223,18 @@ zftl_init:
 	mov	w0, 1
 	bl	ftl_total_vpn_update
 	ldrb	w0, [x23,577]
-	cbz	w0, .L2744
+	cbz	w0, .L2745
 	ldr	x1, [x19,2864]
 	ldr	w0, [x1,68]
 	add	w0, w0, 1
 	str	w0, [x1,68]
-.L2744:
+.L2745:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2743:
+.L2744:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -17248,11 +17260,11 @@ rk_ftl_init:
 	strb	wzr, [x21,-102]
 	bl	ftl_malloc
 	str	x0, [x19,1176]
-	cbnz	x0, .L2790
-.L2792:
+	cbnz	x0, .L2791
+.L2793:
 	mov	w0, -1
-	b	.L2791
-.L2790:
+	b	.L2792
+.L2791:
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x21,-96]
@@ -17262,7 +17274,7 @@ rk_ftl_init:
 	str	xzr, [x1,-88]!
 	bl	rknand_get_reg_addr
 	ldr	x0, [x19,1184]
-	cbz	x0, .L2792
+	cbz	x0, .L2793
 	bl	rk_nandc_irq_init
 	mov	w1, 0
 	ldr	x0, [x21,-96]
@@ -17322,14 +17334,14 @@ rk_ftl_init:
 	ldr	x0, [x19,1184]
 	bl	nand_flash_init
 	mov	w22, w0
-	cbnz	w0, .L2793
+	cbnz	w0, .L2794
 	bl	zftl_init
 	mov	w19, w0
 	bl	zftl_proc_debug_init
 	mov	w0, 1
 	strb	w0, [x21,-102]
-	b	.L2794
-.L2793:
+	b	.L2795
+.L2794:
 	ldr	x1, [x19,1176]
 	adrp	x2, ftl_read_flash_info
 	add	x2, x2, :lo12:ftl_read_flash_info
@@ -17384,7 +17396,7 @@ rk_ftl_init:
 	bl	FlashInit
 	mov	w19, w0
 	cmn	w22, #2
-	bne	.L2795
+	bne	.L2796
 	add	x22, x21, :lo12:.LANCHOR2
 	adrp	x1, gNandParaInfo
 	add	x22, x22, 376
@@ -17394,22 +17406,22 @@ rk_ftl_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x22,18]
 	bl	flash_lsb_page_tbl_build
-.L2795:
+.L2796:
 	adrp	x0, g_nandc_version_data
 	ldr	w1, [x0,#:lo12:g_nandc_version_data]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
 	adrp	x1, .LANCHOR0
-	bne	.L2796
+	bne	.L2797
 	adrp	x0, gFlashSlcMode
 	ldrb	w0, [x0,#:lo12:gFlashSlcMode]
-	cbnz	w0, .L2797
-.L2796:
+	cbnz	w0, .L2798
+.L2797:
 	add	x0, x20, :lo12:.LANCHOR4
 	strb	wzr, [x1,#:lo12:.LANCHOR0]
 	strb	wzr, [x0,1264]
-.L2797:
+.L2798:
 	adrp	x2, gNandFlashIDBEccBits
 	add	x0, x1, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR2
@@ -17423,28 +17435,28 @@ rk_ftl_init:
 	strb	w2, [x0,724]
 	mov	w2, 1
 	mov	w0, 0
-.L2798:
+.L2799:
 	cmp	w2, w3
-	bhi	.L2803
+	bhi	.L2804
 	add	w0, w0, 1
 	lsl	w2, w2, 1
 	uxth	w0, w0
-	b	.L2798
-.L2803:
+	b	.L2799
+.L2804:
 	add	x1, x1, :lo12:.LANCHOR0
 	sub	w0, w0, #1
 	strb	wzr, [x1,672]
 	strh	w0, [x1,3340]
-	cbnz	w19, .L2794
+	cbnz	w19, .L2795
 	bl	FtlInit
 	mov	w19, w0
-.L2794:
-	adrp	x0, .LC219
+.L2795:
+	adrp	x0, .LC220
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC220
 	bl	printk
 	mov	w0, w19
-.L2791:
+.L2792:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -17472,12 +17484,12 @@ gc_update_l2p_map_new:
 	mul	w24, w24, w0
 	bl	timer_get_time
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2805
-	adrp	x0, .LC220
+	tbz	x0, 8, .L2806
+	adrp	x0, .LC221
 	ldrh	w1, [x20,80]
-	add	x0, x0, :lo12:.LC220
+	add	x0, x0, :lo12:.LC221
 	bl	printk
-.L2805:
+.L2806:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	sub	w2, w24, #1
@@ -17486,21 +17498,21 @@ gc_update_l2p_map_new:
 	adrp	x27, .LANCHOR4
 	ldr	x0, [x0,600]
 	strh	w2, [x0,x1,lsl 1]
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
+	str	x0, [x29,120]
 	adrp	x0, .LC222
 	add	x0, x0, :lo12:.LC222
-	str	x0, [x29,120]
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
 	str	x0, [x29,112]
-.L2806:
+.L2807:
 	cmp	w23, w24
-	beq	.L2838
+	beq	.L2839
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	ldr	x0, [x0,1136]
 	ldr	w2, [x0,w23,sxtw 2]
 	cmn	w2, #1
-	beq	.L2807
+	beq	.L2808
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 7
@@ -17508,27 +17520,27 @@ gc_update_l2p_map_new:
 	and	w0, w0, 65535
 	str	w0, [x29,140]
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2808
+	tbz	x0, 8, .L2809
 	ldr	x0, [x29,112]
 	mov	w3, w23
 	ldr	w1, [x29,140]
 	bl	printk
-.L2808:
+.L2809:
 	mov	w25, w23
-.L2814:
+.L2815:
 	add	x1, x27, :lo12:.LANCHOR4
 	sbfiz	x26, x25, 2, 32
 	ldr	x0, [x1,1136]
 	ldr	w4, [x0,x26]
 	cmn	w4, #1
-	beq	.L2809
+	beq	.L2810
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x29,140]
 	ldrb	w0, [x0,2832]
 	lsl	w0, w0, 7
 	udiv	w0, w4, w0
 	cmp	w2, w0, uxth
-	bne	.L2809
+	bne	.L2810
 	ldr	x0, [x1,1144]
 	str	x4, [x29,104]
 	ldr	w28, [x0,x26]
@@ -17537,16 +17549,16 @@ gc_update_l2p_map_new:
 	str	w0, [x29,156]
 	cmn	w0, #1
 	ldr	x4, [x29,104]
-	bne	.L2810
+	bne	.L2811
 	mov	w0, w4
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	x4, [x29,104]
-.L2810:
+.L2811:
 	ldr	w3, [x29,156]
 	cmp	w3, w28
-	bne	.L2811
+	bne	.L2812
 	add	x0, x27, :lo12:.LANCHOR4
 	add	x1, x29, 152
 	mov	w2, 1
@@ -17567,60 +17579,60 @@ gc_update_l2p_map_new:
 	and	w28, w0, w28
 	ldrb	w0, [x2,3338]
 	udiv	w0, w28, w0
-	b	.L2837
-.L2811:
+	b	.L2838
+.L2812:
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2813
+	tbz	x0, 8, .L2814
 	ldr	x0, [x29,120]
 	mov	w1, w4
 	mov	w2, w28
 	bl	printk
-.L2813:
+.L2814:
 	ldr	x0, [x29,128]
 	ldrh	w0, [x0]
-.L2837:
+.L2838:
 	bl	ftl_vpn_decrement
 	add	x0, x27, :lo12:.LANCHOR4
 	mov	w1, -1
 	ldr	x0, [x0,1136]
 	str	w1, [x0,x26]
 	bl	timer_get_time
-.L2809:
+.L2810:
 	add	w25, w25, 1
 	cmp	w25, w24
-	bne	.L2814
-.L2807:
+	bne	.L2815
+.L2808:
 	add	w23, w23, 1
-	b	.L2806
-.L2838:
+	b	.L2807
+.L2839:
 	ldr	w0, [x22,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2816
+	tbz	x0, 8, .L2817
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w3, [x20,80]
 	ldr	x1, [x0,608]
 	ldr	x2, [x0,600]
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
 	ldrh	w1, [x1,80]
 	ldrh	w2, [x2,x3,lsl 1]
 	mov	w3, w21
 	bl	printk
-.L2816:
+.L2817:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x1,lsl 1]
 	cmp	w0, w21
-	beq	.L2817
+	beq	.L2818
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 488
+	mov	w2, 489
 	add	x1, x1, 592
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2817:
+.L2818:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x20,80]
 	ldr	x0, [x19,600]
@@ -17655,48 +17667,48 @@ gc_scan_src_blk_one_page:
 	ldrb	w7, [x3,3276]
 	ldrh	w1, [x1,40]
 	ldrh	w3, [x2,2]
-.L2840:
+.L2841:
 	cmp	w1, w6
-	bne	.L2882
+	bne	.L2883
 	add	w0, w0, 1
 	uxtb	w0, w0
 	cmp	w0, w7
-	bne	.L2841
+	bne	.L2842
 	add	w3, w3, 1
 	mov	w4, 1
 	mov	w0, 0
 	uxth	w3, w3
-.L2841:
+.L2842:
 	add	x1, x2, x0, sxtw 1
 	mov	w5, 1
 	ldrh	w1, [x1,40]
-	b	.L2840
-.L2882:
-	cbz	w5, .L2843
+	b	.L2841
+.L2883:
+	cbz	w5, .L2844
 	add	x2, x19, :lo12:.LANCHOR0
 	strb	w0, [x2,2900]
-.L2843:
-	cbz	w4, .L2844
+.L2844:
+	cbz	w4, .L2845
 	add	x0, x19, :lo12:.LANCHOR0
 	strh	w3, [x0,2898]
-.L2844:
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x0,3257]
 	ldrh	w20, [x0,3350]
 	cmp	w2, 2
 	mul	w1, w1, w20
-	bne	.L2845
+	bne	.L2846
 	ldrb	w2, [x0,2902]
 	add	x0, x0, 2896
-	cbnz	w2, .L2845
+	cbnz	w2, .L2846
 	ldrh	w20, [x0,2]
 	add	w20, w1, w20, lsl 1
-	b	.L2846
-.L2845:
+	b	.L2847
+.L2846:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w20, [x0,2898]
 	add	w20, w1, w20
-.L2846:
+.L2847:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x1, x2, 2896
 	ldrb	w0, [x2,2900]
@@ -17705,26 +17717,26 @@ gc_scan_src_blk_one_page:
 	strb	w0, [x2,2900]
 	ldrb	w2, [x2,3276]
 	cmp	w2, w0
-	bne	.L2847
+	bne	.L2848
 	ldrh	w0, [x1,2]
 	strb	wzr, [x1,4]
 	add	w0, w0, 1
 	strh	w0, [x1,2]
-.L2847:
+.L2848:
 	mov	w0, 1
 	mov	w21, 0
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	buf_alloc
 	mov	x22, x0
-.L2858:
+.L2859:
 	ldrb	w0, [x19,2902]
-	cbnz	w21, .L2860
+	cbnz	w21, .L2861
 	cmp	w0, 3
-	beq	.L2848
-.L2860:
+	beq	.L2849
+.L2861:
 	cmp	w0, w21
-	bgt	.L2850
-.L2859:
+	bgt	.L2851
+.L2860:
 	mov	x0, x22
 	bl	buf_free
 	ldr	x23, [sp,48]
@@ -17732,56 +17744,56 @@ gc_scan_src_blk_one_page:
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2850:
+.L2851:
 	ldrb	w1, [x19,3257]
 	cmp	w1, 2
-	bne	.L2851
-	cbnz	w0, .L2851
+	bne	.L2852
+	cbnz	w0, .L2852
 	add	w0, w21, w20
 	orr	w0, w0, 33554432
-	b	.L2881
-.L2851:
+	b	.L2882
+.L2852:
 	orr	w0, w20, w21, lsl 24
-.L2881:
+.L2882:
 	str	w0, [x22,40]
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w0, [x22,52]
 	cmp	w0, 512
-	beq	.L2855
+	beq	.L2856
 	cmn	w0, #1
-	beq	.L2855
+	beq	.L2856
 	ldr	x0, [x22,24]
 	ldr	w23, [x0,4]
 	mov	w0, w23
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,76]
 	cmn	w0, #1
-	bne	.L2856
+	bne	.L2857
 	mov	w0, w23
 	add	x1, x29, 76
 	mov	w2, 0
 	bl	pm_log2phys
-.L2856:
+.L2857:
 	ldr	w0, [x29,76]
 	cmp	w20, w0
-	bne	.L2855
+	bne	.L2856
 	ldrh	w2, [x19,2920]
 	ldr	x1, [x19,3248]
 	str	w20, [x1,x2,lsl 2]
 	ldrh	w1, [x19,2920]
 	add	w1, w1, 1
 	strh	w1, [x19,2920]
-.L2855:
+.L2856:
 	ldrh	w0, [x19,2922]
 	add	w0, w0, 1
 	strh	w0, [x19,2922]
-.L2848:
+.L2849:
 	add	w21, w21, 1
 	cmp	w21, 4
-	bne	.L2858
-	b	.L2859
+	bne	.L2859
+	b	.L2860
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.align	2
 	.global	gc_scan_src_blk
@@ -17798,32 +17810,32 @@ gc_scan_src_blk:
 	ldrh	w1, [x0,2896]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2884
+	bne	.L2885
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 925
+	mov	w2, 926
 	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2884:
+.L2885:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w3, 65535
 	mov	w0, 0
 	ldrh	w1, [x2,2896]
 	cmp	w1, w3
-	beq	.L2885
+	beq	.L2886
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2886
+	tbz	x0, 8, .L2887
 	ubfiz	x3, x1, 1, 16
 	ldr	x2, [x2,600]
-	adrp	x0, .LC224
-	add	x0, x0, :lo12:.LC224
+	adrp	x0, .LC225
+	add	x0, x0, :lo12:.LC225
 	ldrh	w2, [x2,x3]
 	bl	printk
-.L2886:
+.L2887:
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	timer_get_time
 	add	x21, x20, 2896
@@ -17832,74 +17844,74 @@ gc_scan_src_blk:
 	bl	ftl_get_blk_list_in_sblk
 	uxtb	w1, w0
 	strb	w1, [x21,5]
-	cbnz	w1, .L2887
+	cbnz	w1, .L2888
 	mov	w0, -1
 	strh	w0, [x20,2896]
-	b	.L2913
-.L2887:
+	b	.L2914
+.L2888:
 	ldrh	w3, [x20,2896]
 	ldr	x2, [x20,584]
 	add	x2, x2, x3, lsl 2
 	ldrb	w2, [x2,2]
 	tst	w2, 192
 	and	w4, w2, 224
-	beq	.L2888
+	beq	.L2889
 	cmp	w4, 224
-	beq	.L2888
+	beq	.L2889
 	ldr	x2, [x20,608]
 	ldrh	w5, [x2,16]
 	cmp	w5, w3
-	beq	.L2888
+	beq	.L2889
 	ldrh	w5, [x2,48]
 	cmp	w5, w3
-	beq	.L2888
+	beq	.L2889
 	ldrh	w2, [x2,80]
 	cmp	w2, w3
-	bne	.L2889
-.L2888:
-	cbnz	w4, .L2890
+	bne	.L2890
+.L2889:
+	cbnz	w4, .L2891
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x3,lsl 1]
-	cbz	w0, .L2891
+	cbz	w0, .L2892
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 945
+	mov	w2, 946
 	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2891:
+.L2892:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0,2896]
 	ldr	x0, [x0,600]
 	strh	wzr, [x0,x1,lsl 1]
-.L2890:
+.L2891:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	wzr, [x19,2920]
 	strh	w0, [x19,2896]
-.L2913:
+.L2914:
 	mov	w0, 0
-	b	.L2885
-.L2889:
+	b	.L2886
+.L2890:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x21, x0, sxtw 1
 	ldrh	w20, [x0,40]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L2892
+	bne	.L2893
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2892:
+.L2893:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w24, 1
 	ldrh	w3, [x2,2896]
@@ -17913,16 +17925,16 @@ gc_scan_src_blk:
 	mul	w1, w20, w1
 	and	w3, w3, 224
 	cmp	w3, 160
-	bne	.L2893
+	bne	.L2894
 	ldrb	w3, [x2,3257]
 	cmp	w3, 2
 	uxth	w24, w3
 	orr	w1, w1, w3, lsl 24
-	bne	.L2893
+	bne	.L2894
 	ldrh	w0, [x2,3274]
 	sub	w0, w0, #1
 	uxth	w0, w0
-.L2893:
+.L2894:
 	add	x20, x19, :lo12:.LANCHOR0
 	orr	w23, w0, w1
 	mov	w0, 1
@@ -17945,29 +17957,29 @@ gc_scan_src_blk:
 	strh	wzr, [x20,2920]
 	ldr	w0, [x21,52]
 	cmp	w0, 512
-	beq	.L2914
+	beq	.L2915
 	cmn	w0, #1
-	beq	.L2914
+	beq	.L2915
 	ldr	x0, [x21,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2896
+	beq	.L2897
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 985
+	mov	w2, 986
 	add	x1, x1, 616
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2914:
+.L2915:
 	mov	x0, x21
 	bl	buf_free
 	mov	w0, -1
-	b	.L2885
-.L2896:
+	b	.L2886
+.L2897:
 	ldrb	w0, [x20,3276]
 	mov	x26, 0
 	ldrh	w22, [x20,3300]
@@ -17977,21 +17989,21 @@ gc_scan_src_blk:
 	mul	w22, w24, w22
 	mov	w24, 21
 	uxth	w22, w22
-.L2897:
+.L2898:
 	cmp	w22, w26
-	ble	.L2915
+	ble	.L2916
 	ldr	w0, [x23,x26,lsl 2]
 	cmn	w0, #1
-	beq	.L2899
+	beq	.L2900
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,92]
 	cmn	w0, #1
-	bne	.L2900
+	bne	.L2901
 	ldr	w0, [x23,x26,lsl 2]
 	add	x1, x29, 92
 	mov	w2, 0
 	bl	pm_log2phys
-.L2900:
+.L2901:
 	ldrh	w1, [x20,3340]
 	ldr	w2, [x29,92]
 	sub	w0, w24, w1
@@ -18003,18 +18015,18 @@ gc_scan_src_blk:
 	ldrb	w0, [x20,3338]
 	udiv	w1, w1, w0
 	cmp	w1, w3
-	bne	.L2899
+	bne	.L2900
 	ldrh	w3, [x20,2920]
 	ldr	x1, [x20,3248]
 	str	w2, [x1,x3,lsl 2]
 	ldrh	w1, [x20,2920]
 	add	w1, w1, 1
 	strh	w1, [x20,2920]
-.L2899:
+.L2900:
 	bl	timer_get_time
 	add	x26, x26, 1
-	b	.L2897
-.L2915:
+	b	.L2898
+.L2916:
 	mov	x0, x21
 	bl	buf_free
 	add	x0, x19, :lo12:.LANCHOR0
@@ -18024,11 +18036,11 @@ gc_scan_src_blk:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x0,2920]
 	cmp	w2, w3
-	beq	.L2903
-	adrp	x0, .LC225
-	add	x0, x0, :lo12:.LC225
+	beq	.L2904
+	adrp	x0, .LC226
+	add	x0, x0, :lo12:.LC226
 	bl	printk
-.L2903:
+.L2904:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x19,2896]
 	ldr	x1, [x19,600]
@@ -18036,7 +18048,7 @@ gc_scan_src_blk:
 	strh	w3, [x1,x2,lsl 1]
 	strh	wzr, [x19,2924]
 	ldrh	w0, [x19,2920]
-.L2885:
+.L2886:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18058,14 +18070,14 @@ gc_scan_static_data:
 	ldr	x0, [x3,608]
 	ldr	w1, [x0,544]
 	cmn	w1, #1
-	beq	.L2917
+	beq	.L2918
 	adrp	x21, .LANCHOR3
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w20, 11
 	add	x22, x22, :lo12:.LC0
 	add	x21, x21, 632
-.L2918:
+.L2919:
 	add	x24, x19, :lo12:.LANCHOR0
 	add	x1, x29, 76
 	mov	w2, 0
@@ -18074,7 +18086,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29,76]
 	cmn	w0, #1
-	beq	.L2919
+	beq	.L2920
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x23, x0
@@ -18084,7 +18096,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23,52]
 	cmp	w0, 256
-	bne	.L2920
+	bne	.L2921
 	ldrh	w0, [x24,3340]
 	mov	w2, 21
 	mov	w1, 1
@@ -18098,23 +18110,23 @@ gc_scan_static_data:
 	udiv	w0, w2, w0
 	mov	w2, 0
 	bl	gc_add_sblk
-.L2920:
+.L2921:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x1, [x23,24]
 	ldr	x0, [x0,608]
 	ldr	w1, [x1,4]
 	ldr	w0, [x0,544]
 	cmp	w1, w0
-	beq	.L2921
+	beq	.L2922
 	mov	x1, x21
-	mov	w2, 1424
+	mov	w2, 1425
 	mov	x0, x22
 	bl	printk
 	bl	dump_stack
-.L2921:
+.L2922:
 	mov	x0, x23
 	bl	buf_free
-.L2919:
+.L2920:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldr	x1, [x2,608]
 	ldr	w2, [x2,2840]
@@ -18122,7 +18134,7 @@ gc_scan_static_data:
 	add	w0, w0, 1
 	str	w0, [x1,544]
 	cmp	w0, w2
-	bcc	.L2922
+	bcc	.L2923
 	mov	w0, -1
 	str	w0, [x1,544]
 	ldr	w0, [x1,548]
@@ -18133,37 +18145,37 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2916
-.L2922:
+	b	.L2917
+.L2923:
 	ldr	w0, [x29,76]
 	cmn	w0, #1
-	bne	.L2916
+	bne	.L2917
 	sub	w20, w20, #1
 	uxth	w20, w20
-	cbnz	w20, .L2918
-	b	.L2916
-.L2917:
+	cbnz	w20, .L2919
+	b	.L2917
+.L2918:
 	ldr	w1, [x0,536]
 	ldr	w2, [x0,12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2927
+	bhi	.L2928
 	ldr	x3, [x3,2864]
 	ldr	w1, [x0,540]
 	ldr	w3, [x3,44]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w3, w1
-	bls	.L2916
-.L2927:
+	bls	.L2917
+.L2928:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldr	w1, [x1,44]
 	str	w1, [x0,540]
 	str	w2, [x0,536]
 	str	wzr, [x0,544]
-.L2916:
+.L2917:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18187,45 +18199,45 @@ gc_block_vpn_scan:
 	ldrh	w0, [x20,576]
 	ldr	w1, [x1,608]
 	cmp	w1, w0
-	bcs	.L2932
+	bcs	.L2933
 	bl	timer_get_time
 	ldr	x21, [x20,608]
 	ldr	w1, [x21,604]
 	add	w1, w1, 28672
 	add	w1, w1, 1328
 	cmp	w0, w1
-	bls	.L2932
+	bls	.L2933
 	bl	timer_get_time
 	str	w0, [x21,604]
 	ldr	x0, [x20,608]
 	ldrh	w2, [x20,576]
 	ldr	w1, [x0,600]
 	cmp	w1, w2
-	bcs	.L2936
+	bcs	.L2937
 	ldr	x2, [x20,2864]
 	ldrh	w2, [x2,134]
 	cmp	w1, w2
-	bcs	.L2937
-.L2936:
+	bcs	.L2938
+.L2937:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x1, [x1,2864]
 	ldrh	w1, [x1,134]
 	str	w1, [x0,600]
-.L2937:
+.L2938:
 	ldr	w25, [x0,600]
 	mov	w0, 65535
 	uxth	w20, w25
 	cmp	w20, w0
-	bne	.L2938
+	bne	.L2939
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1717
+	mov	w2, 1720
 	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2938:
+.L2939:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldr	x0, [x21,608]
 	ldr	w1, [x0,600]
@@ -18238,47 +18250,47 @@ gc_block_vpn_scan:
 	mov	w0, w20
 	bl	ftl_get_blk_list_in_sblk
 	uxth	w1, w0
-	cbz	w1, .L2932
+	cbz	w1, .L2933
 	uxtw	x22, w20
 	ldr	x24, [x21,584]
 	add	x24, x24, x22, lsl 2
 	ldrb	w1, [x24,2]
 	tst	w1, 192
 	and	w2, w1, 224
-	beq	.L2939
+	beq	.L2940
 	cmp	w2, 224
-	beq	.L2939
+	beq	.L2940
 	ldr	x1, [x21,608]
 	ldrh	w3, [x1,16]
 	cmp	w3, w20
-	beq	.L2939
+	beq	.L2940
 	ldrh	w3, [x1,48]
 	cmp	w3, w20
-	beq	.L2939
+	beq	.L2940
 	ldrh	w1, [x1,80]
 	cmp	w1, w20
-	bne	.L2940
-.L2939:
-	cbnz	w2, .L2932
+	bne	.L2941
+.L2940:
+	cbnz	w2, .L2933
 	add	x0, x19, :lo12:.LANCHOR0
 	lsl	x22, x22, 1
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x22]
-	cbz	w0, .L2941
+	cbz	w0, .L2942
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1733
+	mov	w2, 1736
 	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2941:
+.L2942:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x0, [x19,600]
 	strh	wzr, [x0,x22]
-	b	.L2932
-.L2940:
+	b	.L2933
+.L2941:
 	and	w0, w0, 65535
 	add	x1, x29, 144
 	sub	w0, w0, #1
@@ -18286,16 +18298,16 @@ gc_block_vpn_scan:
 	ldrh	w21, [x0,-16]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2943
+	bne	.L2944
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1739
+	mov	w2, 1742
 	add	x1, x1, 656
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2943:
+.L2944:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w3, [x24,2]
 	mov	w26, 1
@@ -18306,16 +18318,16 @@ gc_block_vpn_scan:
 	sub	w0, w0, #1
 	mul	w1, w21, w1
 	uxth	w0, w0
-	bne	.L2944
+	bne	.L2945
 	ldrb	w3, [x2,3257]
 	cmp	w3, 2
 	uxth	w26, w3
 	orr	w1, w1, w3, lsl 24
-	bne	.L2944
+	bne	.L2945
 	ldrh	w0, [x2,3274]
 	sub	w0, w0, #1
 	uxth	w0, w0
-.L2944:
+.L2945:
 	orr	w21, w0, w1
 	mov	w0, 1
 	bl	buf_alloc
@@ -18333,30 +18345,30 @@ gc_block_vpn_scan:
 	bl	ftl_memset
 	ldr	w0, [x23,52]
 	cmp	w0, 512
-	beq	.L2956
+	beq	.L2957
 	cmn	w0, #1
 	cset	w2, eq
-	cbz	w2, .L2945
-.L2956:
+	cbz	w2, .L2946
+.L2957:
 	mov	w0, w20
 	mov	w1, 1
 	mov	w2, 0
-	b	.L2969
-.L2945:
+	b	.L2970
+.L2946:
 	ldr	x0, [x23,24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2947
+	beq	.L2948
 	mov	w0, w20
 	mov	w1, 1
-.L2969:
+.L2970:
 	bl	gc_add_sblk
 	mov	x0, x23
 	bl	buf_free
-	b	.L2932
-.L2947:
+	b	.L2933
+.L2948:
 	ldrb	w0, [x21,3276]
 	mov	x27, 0
 	ldrh	w1, [x21,3300]
@@ -18367,22 +18379,22 @@ gc_block_vpn_scan:
 	uxth	w0, w26
 	ldr	x26, [x23,8]
 	str	w0, [x29,108]
-.L2948:
+.L2949:
 	ldr	w0, [x29,108]
 	cmp	w0, w27
-	ble	.L2970
+	ble	.L2971
 	ldr	w0, [x26,x27,lsl 2]
 	cmn	w0, #1
-	beq	.L2949
+	beq	.L2950
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,124]
 	cmn	w0, #1
-	bne	.L2950
+	bne	.L2951
 	ldr	w0, [x26,x27,lsl 2]
 	add	x1, x29, 124
 	mov	w2, 0
 	bl	pm_log2phys
-.L2950:
+.L2951:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w1, 21
 	ldrh	w0, [x4,3340]
@@ -18396,39 +18408,39 @@ gc_block_vpn_scan:
 	and	w0, w2, w0
 	udiv	w0, w0, w1
 	cmp	w0, w28
-	bne	.L2949
+	bne	.L2950
 	add	w21, w21, 1
 	uxth	w21, w21
-.L2949:
+.L2950:
 	add	x27, x27, 1
-	b	.L2948
-.L2970:
+	b	.L2949
+.L2971:
 	mov	x0, x23
 	bl	buf_free
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L2952
+	tbz	x0, 8, .L2953
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w4, [x24,2]
 	uxth	w1, w25
 	mov	w3, w21
 	ubfx	x4, x4, 5, 3
 	ldr	x2, [x0,600]
-	adrp	x0, .LC226
-	add	x0, x0, :lo12:.LC226
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	ldrh	w2, [x2,x22,lsl 1]
 	bl	printk
-.L2952:
+.L2953:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w21, 31
 	ldr	x0, [x19,600]
 	strh	w21, [x0,x22,lsl 1]
-	bhi	.L2932
+	bhi	.L2933
 	mov	w0, w20
 	mov	w1, 1
 	mov	w2, 0
 	bl	gc_add_sblk
-.L2932:
+.L2933:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -18460,9 +18472,9 @@ ftl_sblk_dump:
 	add	x1, x0, x25
 	ldrh	w4, [x0,x25]
 	ldr	w5, [x0,x25]
-	adrp	x0, .LC227
+	adrp	x0, .LC228
 	ldrb	w3, [x1,2]
-	add	x0, x0, :lo12:.LC227
+	add	x0, x0, :lo12:.LC228
 	mov	w1, w20
 	and	w4, w4, 2047
 	ubfx	x2, x3, 5, 3
@@ -18472,19 +18484,19 @@ ftl_sblk_dump:
 	mov	w1, 65535
 	mov	w0, 0
 	cmp	w20, w1
-	beq	.L2972
+	beq	.L2973
 	ldrh	w1, [x19,576]
 	cmp	w1, w20
-	bls	.L2972
+	bls	.L2973
 	ldr	x0, [x19,584]
 	mov	w26, 1
 	add	x0, x0, x25
 	ldrb	w0, [x0,2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2973
+	bne	.L2974
 	ldrb	w26, [x19,3257]
-.L2973:
+.L2974:
 	add	x1, x29, 192
 	mov	w0, w20
 	strh	w20, [x29,176]
@@ -18505,8 +18517,8 @@ ftl_sblk_dump:
 	mul	w1, w1, w2
 	strh	w1, [x29,182]
 	ldr	x1, [x0,584]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	adrp	x0, .LC229
+	add	x0, x0, :lo12:.LC229
 	add	x1, x1, x25
 	ldrb	w2, [x1,2]
 	mov	w1, w20
@@ -18515,56 +18527,56 @@ ftl_sblk_dump:
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x28, x0
-	adrp	x0, .LC182
+	adrp	x0, .LC183
 	str	w22, [x29,152]
-	add	x0, x0, :lo12:.LC182
+	add	x0, x0, :lo12:.LC183
 	str	x0, [x29,120]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	add	x0, x0, 680
 	str	x0, [x29,112]
-.L2974:
+.L2975:
 	add	x21, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x21,3300]
 	cmp	w0, w19
-	bls	.L2990
+	bls	.L2991
 	lsl	w0, w19, 1
 	str	wzr, [x29,156]
 	sub	w0, w0, #1
 	str	w0, [x29,132]
-.L2991:
+.L2992:
 	ldrb	w0, [x29,185]
 	ldr	w1, [x29,156]
 	cmp	w0, w1
-	bls	.L2988
+	bls	.L2989
 	mov	w24, 1
-.L2989:
+.L2990:
 	cmp	w24, w26
 	ldr	w0, [x29,156]
-	bhi	.L3008
+	bhi	.L3009
 	add	x1, x29, 176
 	add	x0, x1, x0, sxtw 1
 	ldrh	w2, [x0,16]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L2975
+	beq	.L2976
 	add	x1, x23, :lo12:.LANCHOR0
 	cmp	w26, 3
 	ldrh	w0, [x1,3350]
 	mul	w0, w2, w0
 	add	w21, w0, w19
-	bne	.L2976
+	bne	.L2977
 	orr	w21, w21, w24, lsl 24
-	b	.L2977
-.L2976:
+	b	.L2978
+.L2977:
 	cmp	w26, 2
-	bne	.L2977
+	bne	.L2978
 	ldr	w3, [x29,132]
 	ldrb	w21, [x1,3257]
 	add	w0, w0, w3
 	add	w0, w0, w24
 	orr	w21, w0, w21, lsl 24
-.L2977:
+.L2978:
 	mov	w1, 1
 	str	w21, [x28,40]
 	mov	x0, x28
@@ -18596,23 +18608,23 @@ ftl_sblk_dump:
 	bl	printk
 	ldr	x9, [x29,104]
 	cmp	w9, 512
-	beq	.L2995
+	beq	.L2996
 	cmn	w9, #1
-	bne	.L2979
-.L2995:
+	bne	.L2980
+.L2996:
 	mov	w0, 1
 	str	w0, [x29,152]
-.L2979:
+.L2980:
 	add	x0, x23, :lo12:.LANCHOR0
 	ldr	x0, [x0,584]
 	add	x0, x0, x25
 	ldrb	w0, [x0,2]
 	and	w0, w0, 224
 	cmp	w0, 32
-	beq	.L2975
+	beq	.L2976
 	cmp	w0, 224
 	cset	w2, eq
-	cbnz	w2, .L2975
+	cbnz	w2, .L2976
 	ldr	x0, [x28,24]
 	str	x2, [x29,104]
 	ldr	w0, [x0,4]
@@ -18620,82 +18632,82 @@ ftl_sblk_dump:
 	str	w0, [x29,172]
 	cmn	w0, #1
 	ldr	x2, [x29,104]
-	bne	.L2981
+	bne	.L2982
 	ldr	x0, [x28,24]
 	add	x1, x29, 172
 	ldr	w0, [x0,4]
 	bl	pm_log2phys
-.L2981:
+.L2982:
 	ldr	w0, [x29,172]
 	cmp	w0, w21
-	bne	.L2982
+	bne	.L2983
 	ldr	x2, [x28,24]
 	add	w22, w22, 1
-	adrp	x0, .LC229
+	adrp	x0, .LC230
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC229
+	add	x0, x0, :lo12:.LC230
 	mov	w3, w22
 	ldr	w2, [x2,4]
 	bl	printk
-.L2982:
+.L2983:
 	ldr	x0, [x29,144]
-	cbz	x0, .L2984
+	cbz	x0, .L2985
 	ubfiz	x21, x27, 2, 32
 	ldr	w2, [x0,x21]
 	ldr	x0, [x28,24]
 	ldr	w0, [x0,4]
 	cmp	w0, w2
-	beq	.L2985
+	beq	.L2986
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L2985
-	adrp	x0, .LC230
+	tbz	x0, 12, .L2986
+	adrp	x0, .LC231
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC230
+	add	x0, x0, :lo12:.LC231
 	bl	printk
-.L2985:
+.L2986:
 	ldr	x0, [x29,144]
 	ldr	x1, [x28,24]
 	ldr	w0, [x0,x21]
 	ldr	w1, [x1,4]
 	cmp	w1, w0
-	beq	.L2984
+	beq	.L2985
 	cmn	w0, #1
-	beq	.L2984
+	beq	.L2985
 	adrp	x0, .LC0
 	ldr	x1, [x29,112]
-	mov	w2, 1300
+	mov	w2, 1299
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L2984:
+.L2985:
 	add	w27, w27, 1
-.L2975:
+.L2976:
 	add	w24, w24, 1
 	uxth	w24, w24
-	b	.L2989
-.L3008:
+	b	.L2990
+.L3009:
 	add	w0, w0, 1
 	uxth	w0, w0
 	str	w0, [x29,156]
-	b	.L2991
-.L2988:
+	b	.L2992
+.L2989:
 	add	w19, w19, 1
 	uxth	w19, w19
-	b	.L2974
-.L2990:
+	b	.L2975
+.L2991:
 	mov	x0, x28
 	bl	buf_free
 	ldr	x3, [x29,136]
-	adrp	x0, .LC231
+	adrp	x0, .LC232
 	ldr	x2, [x21,600]
-	add	x0, x0, :lo12:.LC231
+	add	x0, x0, :lo12:.LC232
 	mov	w1, w20
 	ldrh	w2, [x2,x3,lsl 1]
 	mov	w3, w22
 	bl	printk
 	ldr	w0, [x29,152]
-.L2972:
+.L2973:
 	sub	sp, x29, #48
 	ldp	x19, x20, [sp,64]
 	ldp	x21, x22, [sp,80]
@@ -18723,30 +18735,30 @@ zftl_read:
 	stp	x27, x28, [sp,80]
 	mov	w25, w2
 	mov	x23, x3
-	tbz	x0, 12, .L3010
-	adrp	x0, .LC232
+	tbz	x0, 12, .L3011
+	adrp	x0, .LC233
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC232
+	add	x0, x0, :lo12:.LC233
 	mov	w2, w22
 	mov	w3, w25
 	bl	printk
-.L3010:
-	cbnz	w19, .L3011
+.L3011:
+	cbnz	w19, .L3012
 	adrp	x0, .LANCHOR0+520
 	mov	w19, 24576
 	ldr	w2, [x0,#:lo12:.LANCHOR0+520]
-	b	.L3012
-.L3011:
+	b	.L3013
+.L3012:
 	cmp	w19, 3
 	mov	w0, -1
-	bhi	.L3013
+	bhi	.L3014
 	lsl	w19, w19, 13
 	mov	w2, 8192
-.L3012:
+.L3013:
 	add	w1, w22, w25
 	mov	w0, -1
 	cmp	w1, w2
-	bhi	.L3013
+	bhi	.L3014
 	add	w22, w19, w22
 	adrp	x19, .LANCHOR0
 	add	x1, x19, :lo12:.LANCHOR0
@@ -18771,8 +18783,8 @@ zftl_read:
 	add	x0, x0, :lo12:.LANCHOR3
 	add	x0, x0, 696
 	str	x0, [x29,120]
-.L3014:
-	cbz	w24, .L3074
+.L3015:
+	cbz	w24, .L3075
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w1, [x29,136]
 	cmp	w20, w27
@@ -18781,12 +18793,12 @@ zftl_read:
 	ldrb	w0, [x0,2832]
 	cset	w26, eq
 	uxth	w21, w0
-	cbnz	w26, .L3044
-	cbz	w2, .L3015
-	b	.L3073
-.L3044:
-	cbz	w2, .L3017
-.L3073:
+	cbnz	w26, .L3045
+	cbz	w2, .L3016
+	b	.L3074
+.L3045:
+	cbz	w2, .L3018
+.L3074:
 	udiv	w26, w22, w0
 	msub	w26, w26, w0, w22
 	uxth	w0, w25
@@ -18795,21 +18807,21 @@ zftl_read:
 	uxth	w21, w21
 	cmp	w21, w25
 	csel	w21, w0, w21, hi
-	b	.L3015
-.L3017:
+	b	.L3016
+.L3018:
 	msub	w21, w0, w20, w28
 	mov	w26, w2
 	uxtb	w21, w21
-.L3015:
+.L3016:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	add	x1, x1, 784
-.L3020:
+.L3021:
 	ldr	w2, [x1,36]
 	cmp	w2, w20
-	bne	.L3018
+	bne	.L3019
 	ldrb	w2, [x1,2]
-	tbz	x2, 3, .L3018
+	tbz	x2, 3, .L3019
 	add	x2, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 6, 32
 	add	x0, x2, x1
@@ -18821,48 +18833,48 @@ zftl_read:
 	add	x23, x23, x21
 	add	x1, x1, x26
 	bl	ftl_memcpy
-	b	.L3019
-.L3018:
+	b	.L3020
+.L3019:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3020
+	bne	.L3021
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3021
+	bne	.L3022
 	mov	w0, w20
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
-.L3021:
+.L3022:
 	ldr	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3022
+	bne	.L3023
 	mov	w21, 0
-.L3023:
+.L3024:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w21, w0
-	bcs	.L3019
+	bcs	.L3020
 	madd	w0, w20, w0, w21
 	cmp	w0, w22
-	bcc	.L3024
+	bcc	.L3025
 	cmp	w0, w28
-	bcs	.L3024
+	bcs	.L3025
 	mov	x0, x23
 	mov	w1, 0
 	mov	w2, 512
 	add	x23, x23, 512
 	bl	ftl_memset
-.L3024:
+.L3025:
 	add	w21, w21, 1
-	b	.L3023
-.L3022:
+	b	.L3024
+.L3023:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3026
+	cbz	x0, .L3027
 	add	x2, x19, :lo12:.LANCHOR0
 	ldr	x3, [x2,2864]
 	ldr	w2, [x3,40]
@@ -18878,36 +18890,36 @@ zftl_read:
 	str	w20, [x0,36]
 	strb	w26, [x0,57]
 	bl	zftl_add_read_buf
-.L3019:
+.L3020:
 	add	w20, w20, 1
 	sub	w24, w24, #1
-.L3026:
-	cbz	w24, .L3045
+.L3027:
+	cbz	w24, .L3046
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2834]
 	cmp	w0, 2
-	bhi	.L3014
-.L3045:
+	bhi	.L3015
+.L3046:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x2,3894]
-	cbz	w1, .L3014
+	cbz	w1, .L3015
 	add	x0, x2, 784
 	ldrb	w2, [x2,3893]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-.L3029:
+.L3030:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x0,3894]
-	cbz	w1, .L3075
+	cbz	w1, .L3076
 	ldrb	w0, [x0,3893]
 	cmp	w0, 255
-	bne	.L3030
+	bne	.L3031
 	ldr	x1, [x29,120]
-	mov	w2, 1064
+	mov	w2, 1065
 	ldr	x0, [x29,128]
 	bl	printk
 	bl	dump_stack
-.L3030:
+.L3031:
 	add	x2, x19, :lo12:.LANCHOR0
 	add	x1, x2, 784
 	ldrb	w21, [x2,3893]
@@ -18917,16 +18929,16 @@ zftl_read:
 	ldr	w8, [x26,52]
 	strb	w0, [x2,3893]
 	cmn	w8, #1
-	bne	.L3031
+	bne	.L3032
 	ldr	x1, [x2,608]
 	str	w8, [x29,140]
 	ldr	w0, [x1,552]
 	add	w0, w0, 1
 	str	w0, [x1,552]
-	b	.L3032
-.L3031:
+	b	.L3033
+.L3032:
 	cmp	w8, 256
-	bne	.L3032
+	bne	.L3033
 	ldrh	w0, [x2,3340]
 	mov	w1, 21
 	mov	w5, 1
@@ -18941,8 +18953,8 @@ zftl_read:
 	ldrb	w4, [x2,3338]
 	ldr	w2, [x26,36]
 	udiv	w4, w0, w4
-	adrp	x0, .LC233
-	add	x0, x0, :lo12:.LC233
+	adrp	x0, .LC234
+	add	x0, x0, :lo12:.LC234
 	str	x4, [x29,112]
 	uxth	w1, w4
 	bl	printk
@@ -18953,7 +18965,7 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	x8, [x29,96]
-.L3032:
+.L3033:
 	add	x9, x19, :lo12:.LANCHOR0
 	add	x1, x9, 784
 	add	x1, x1, x21, lsl 6
@@ -18962,7 +18974,7 @@ zftl_read:
 	ldr	w3, [x0,4]
 	ldr	w0, [x1,36]
 	cmp	w3, w0
-	beq	.L3033
+	beq	.L3034
 	ldr	x3, [x9,608]
 	str	x8, [x29,96]
 	str	x9, [x29,104]
@@ -18970,9 +18982,9 @@ zftl_read:
 	str	x10, [x29,112]
 	add	w0, w0, 1
 	str	w0, [x3,552]
-	adrp	x0, .LC234
+	adrp	x0, .LC235
 	ldr	x7, [x1,24]
-	add	x0, x0, :lo12:.LC234
+	add	x0, x0, :lo12:.LC235
 	ldr	w2, [x10,4]
 	ldr	w3, [x10,8]
 	ldr	w4, [x7]
@@ -18997,7 +19009,7 @@ zftl_read:
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x8, [x29,96]
-.L3033:
+.L3034:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 784
 	add	x0, x0, x21, lsl 6
@@ -19005,35 +19017,35 @@ zftl_read:
 	ldr	w0, [x0,36]
 	ldr	w1, [x1,4]
 	cmp	w1, w0
-	bne	.L3046
+	bne	.L3047
 	cmn	w8, #1
-	bne	.L3034
-.L3046:
+	bne	.L3035
+.L3047:
 	ldr	x1, [x29,120]
-	mov	w2, 1085
+	mov	w2, 1086
 	ldr	x0, [x29,128]
 	bl	printk
 	bl	dump_stack
-.L3034:
+.L3035:
 	add	x1, x19, :lo12:.LANCHOR0
 	add	x0, x1, 784
 	add	x21, x0, x21, lsl 6
 	ldrb	w1, [x1,2832]
 	ldrb	w2, [x21,56]
 	cmp	w1, w2
-	bls	.L3036
+	bls	.L3037
 	ldrb	w3, [x21,57]
 	lsl	w2, w2, 9
 	ldr	x1, [x21,8]
 	ldr	x0, [x21,16]
 	add	x1, x1, x3, lsl 9
 	bl	ftl_memcpy
-	b	.L3037
-.L3036:
+	b	.L3038
+.L3037:
 	ldrb	w0, [x21,2]
 	and	w0, w0, -9
 	strb	w0, [x21,2]
-.L3037:
+.L3038:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	x1, x26
 	add	x0, x21, 3895
@@ -19043,18 +19055,18 @@ zftl_read:
 	ldrb	w0, [x21,3894]
 	sub	w0, w0, #1
 	strb	w0, [x21,3894]
-	b	.L3029
-.L3075:
+	b	.L3030
+.L3076:
 	mov	w2, -1
 	strb	w1, [x0,3894]
 	strb	w2, [x0,3893]
-	b	.L3014
-.L3074:
+	b	.L3015
+.L3075:
 	bl	timer_get_time
 	adrp	x1, .LANCHOR7-80
 	str	w0, [x1,#:lo12:.LANCHOR7-80]
 	ldr	w0, [x29,140]
-.L3013:
+.L3014:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -19109,34 +19121,34 @@ zftl_debug_proc_write:
 	stp	x23, x24, [sp,80]
 	stp	x25, x26, [sp,96]
 	mov	x21, x2
-	bhi	.L3079
+	bhi	.L3080
 	mov	x0, x19
 	bl	rk_copy_from_user
 	mov	x22, x0
 	mov	x0, -14
-	cbnz	x22, .L3079
-	adrp	x0, .LC235
+	cbnz	x22, .L3080
+	adrp	x0, .LC236
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC236
 	strb	w22, [x19,x21]
 	bl	printk
-	adrp	x0, .LC236
+	adrp	x0, .LC237
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC236
+	add	x0, x0, :lo12:.LC237
 	mov	w2, 1
 	mov	w3, 16
 	bl	rknand_print_hex
 	bl	rknand_device_lock
-	adrp	x1, .LC237
+	adrp	x1, .LC238
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC237
+	add	x1, x1, :lo12:.LC238
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3080
+	cbnz	w0, .L3081
 	adrp	x23, .LANCHOR0
-	adrp	x0, .LC238
+	adrp	x0, .LC239
 	add	x19, x23, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC238
+	add	x0, x0, :lo12:.LC239
 	mov	w2, 4
 	adrp	x20, .LANCHOR4
 	ldr	x3, [x19,2864]
@@ -19145,19 +19157,19 @@ zftl_debug_proc_write:
 	bl	rknand_print_hex
 	add	x3, x20, :lo12:.LANCHOR4
 	ldr	x1, [x19,2864]
-	adrp	x0, .LC239
+	adrp	x0, .LC240
 	mov	w2, 2
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC240
 	add	x1, x1, 416
 	ldrh	w3, [x3,1164]
 	mov	w19, w22
 	mov	w22, 65535
 	bl	rknand_print_hex
-.L3081:
+.L3082:
 	add	x0, x20, :lo12:.LANCHOR4
 	ldrh	w0, [x0,1164]
 	cmp	w19, w0
-	bge	.L3084
+	bge	.L3085
 	mov	w0, 300
 	bl	msleep
 	add	x0, x23, :lo12:.LANCHOR0
@@ -19165,63 +19177,63 @@ zftl_debug_proc_write:
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0,416]
 	cmp	w0, w22
-	beq	.L3082
+	beq	.L3083
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L3082:
+.L3083:
 	add	w19, w19, 1
-	b	.L3081
-.L3080:
-	adrp	x1, .LC240
+	b	.L3082
+.L3081:
+	adrp	x1, .LC241
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC240
+	add	x1, x1, :lo12:.LC241
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3085
+	cbnz	w0, .L3086
 	adrp	x23, .LANCHOR0
-	adrp	x0, .LC238
+	adrp	x0, .LC239
 	add	x20, x23, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC238
+	add	x0, x0, :lo12:.LC239
 	mov	w2, 4
 	add	x22, x29, 192
-	adrp	x24, .LC243
+	adrp	x24, .LC244
 	ldr	x3, [x20,2864]
-	add	x24, x24, :lo12:.LC243
+	add	x24, x24, :lo12:.LC244
 	add	x1, x3, 704
 	ldrh	w3, [x3,698]
 	bl	rknand_print_hex
 	adrp	x3, .LANCHOR4+1164
 	ldr	x1, [x20,2864]
-	adrp	x0, .LC239
+	adrp	x0, .LC240
 	mov	w2, 2
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC240
 	add	x1, x1, 416
 	ldrh	w3, [x3,#:lo12:.LANCHOR4+1164]
 	bl	rknand_print_hex
-	adrp	x0, .LC241
+	adrp	x0, .LC242
 	add	x1, x19, 7
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC242
 	str	x1, [x22,-88]!
 	add	x19, x20, 3904
 	mov	x20, x23
 	bl	printk
-	adrp	x23, .LC242
+	adrp	x23, .LC243
 	ldr	x0, [x29,104]
 	mov	x1, x22
 	add	x25, x19, 512
-	add	x23, x23, :lo12:.LC242
+	add	x23, x23, :lo12:.LC243
 	bl	rk_simple_strtoull.constprop.31
 	mov	w22, w0
 	str	w0, [x29,100]
 	uxth	w26, w0
-.L3087:
+.L3088:
 	ldrh	w1, [x19]
 	mov	x0, x23
 	ldrh	w2, [x19,2]
 	bl	printk
 	ldrh	w0, [x19]
 	cmp	w0, w26
-	bne	.L3086
+	bne	.L3087
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	x1, [x19,8]
 	mov	w2, 4
@@ -19229,10 +19241,10 @@ zftl_debug_proc_write:
 	mov	x0, x24
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-.L3086:
+.L3087:
 	add	x19, x19, 16
 	cmp	x19, x25
-	bne	.L3087
+	bne	.L3088
 	mov	w0, 300
 	add	x20, x20, :lo12:.LANCHOR0
 	bl	msleep
@@ -19255,8 +19267,8 @@ zftl_debug_proc_write:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	ldr	w3, [x6]
 	ldr	w2, [x19,52]
 	ldr	w4, [x6,4]
@@ -19265,28 +19277,28 @@ zftl_debug_proc_write:
 	ldr	w6, [x6,12]
 	bl	printk
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC244
-	add	x0, x0, :lo12:.LC244
+	adrp	x0, .LC245
+	add	x0, x0, :lo12:.LC245
 	ldr	x1, [x19,8]
 	mov	w2, 4
 	lsl	w3, w3, 7
-	b	.L3102
-.L3085:
-	adrp	x1, .LC245
+	b	.L3103
+.L3086:
+	adrp	x1, .LC246
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC245
+	add	x1, x1, :lo12:.LC246
 	mov	x2, 7
 	bl	memcmp
-	cbnz	w0, .L3088
+	cbnz	w0, .L3089
 	bl	dump_ftl_info
-	b	.L3084
-.L3088:
-	adrp	x1, .LC246
+	b	.L3085
+.L3089:
+	adrp	x1, .LC247
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC246
+	add	x1, x1, :lo12:.LC247
 	mov	x2, 9
 	bl	memcmp
-	cbnz	w0, .L3089
+	cbnz	w0, .L3090
 	add	x1, x29, 192
 	add	x0, x19, 9
 	str	x0, [x1,-88]!
@@ -19295,24 +19307,24 @@ zftl_debug_proc_write:
 	adrp	x1, .LANCHOR0+3336
 	strh	w0, [x1,#:lo12:.LANCHOR0+3336]
 	bl	dump_all_list_info
-	b	.L3084
-.L3089:
-	adrp	x1, .LC247
+	b	.L3085
+.L3090:
+	adrp	x1, .LC248
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC247
+	add	x1, x1, :lo12:.LC248
 	mov	x2, 8
 	bl	memcmp
-	cbz	w0, .L3084
-	adrp	x1, .LC248
+	cbz	w0, .L3085
+	adrp	x1, .LC249
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC248
+	add	x1, x1, :lo12:.LC249
 	mov	x2, 8
 	bl	memcmp
-	cbnz	w0, .L3091
+	cbnz	w0, .L3092
 	add	x20, x29, 192
-	adrp	x0, .LC241
+	adrp	x0, .LC242
 	add	x1, x19, 8
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC242
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19337,8 +19349,8 @@ zftl_debug_proc_write:
 	str	w0, [sp,8]
 	ldr	w0, [x7,12]
 	str	w0, [sp,16]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	ldr	w3, [x6]
 	ldr	w4, [x6,4]
 	ldr	w5, [x6,8]
@@ -19347,34 +19359,34 @@ zftl_debug_proc_write:
 	ldr	w7, [x7]
 	bl	printk
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC200
+	adrp	x0, .LC201
 	ldr	x1, [x19,8]
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC201
 	mov	w2, 4
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldrb	w3, [x20,2832]
-	adrp	x0, .LC201
+	adrp	x0, .LC202
 	ldr	x1, [x19,24]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC202
 	mov	w2, 4
 	lsl	w3, w3, 1
-.L3102:
+.L3103:
 	bl	rknand_print_hex
 	mov	x0, x19
 	bl	buf_free
-	b	.L3084
-.L3091:
-	adrp	x1, .LC249
+	b	.L3085
+.L3092:
+	adrp	x1, .LC250
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC249
+	add	x1, x1, :lo12:.LC250
 	mov	x2, 8
 	bl	memcmp
-	cbnz	w0, .L3092
+	cbnz	w0, .L3093
 	add	x20, x29, 192
-	adrp	x0, .LC241
+	adrp	x0, .LC242
 	add	x1, x19, 8
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC242
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19383,18 +19395,18 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	mov	x1, x22
 	bl	ftl_sblk_dump
-	b	.L3084
-.L3092:
-	adrp	x1, .LC250
+	b	.L3085
+.L3093:
+	adrp	x1, .LC251
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC250
+	add	x1, x1, :lo12:.LC251
 	mov	x2, 10
 	bl	memcmp
-	cbnz	w0, .L3093
+	cbnz	w0, .L3094
 	add	x20, x29, 192
-	adrp	x0, .LC241
+	adrp	x0, .LC242
 	add	x1, x19, 10
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC242
 	str	x1, [x20,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19403,20 +19415,20 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	adrp	x1, .LANCHOR2
 	str	w0, [x1,#:lo12:.LANCHOR2]
-	b	.L3084
-.L3093:
-	adrp	x1, .LC251
+	b	.L3085
+.L3094:
+	adrp	x1, .LC252
 	mov	x2, 8
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC251
+	add	x1, x1, :lo12:.LC252
 	bl	memcmp
 	mov	w2, w0
 	str	x2, [x29,88]
-	cbnz	w0, .L3094
+	cbnz	w0, .L3095
 	add	x1, x19, 8
-	adrp	x0, .LC241
+	adrp	x0, .LC242
 	add	x19, x29, 192
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC242
 	str	x1, [x19,-88]!
 	bl	printk
 	ldr	x0, [x29,104]
@@ -19427,21 +19439,18 @@ zftl_debug_proc_write:
 	str	w0, [x29,100]
 	cmn	w0, #1
 	ldr	x2, [x29,88]
-	bne	.L3095
+	bne	.L3096
 	mov	w0, w19
 	add	x1, x29, 100
 	bl	pm_log2phys
-.L3095:
-	adrp	x0, .LC252
+.L3096:
+	adrp	x0, .LC253
 	ldr	w2, [x29,100]
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC252
-	bl	printk
-	b	.L3084
-.L3094:
-	adrp	x0, .LC253
 	add	x0, x0, :lo12:.LC253
 	bl	printk
+	b	.L3085
+.L3095:
 	adrp	x0, .LC254
 	add	x0, x0, :lo12:.LC254
 	bl	printk
@@ -19466,10 +19475,13 @@ zftl_debug_proc_write:
 	adrp	x0, .LC261
 	add	x0, x0, :lo12:.LC261
 	bl	printk
-.L3084:
+	adrp	x0, .LC262
+	add	x0, x0, :lo12:.LC262
+	bl	printk
+.L3085:
 	bl	rknand_device_unlock
 	mov	x0, x21
-.L3079:
+.L3080:
 	sub	sp, x29, #32
 	ldp	x19, x20, [sp,48]
 	ldp	x21, x22, [sp,64]
@@ -19496,38 +19508,38 @@ gc_check_data_one_wl:
 	ldr	x0, [x20,2904]
 	ldr	x23, [x20,608]
 	add	x20, x20, 2896
-	cbnz	x0, .L3104
+	cbnz	x0, .L3105
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20,8]
-.L3104:
+.L3105:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x20, [x0,2904]
-	cbnz	x20, .L3105
+	cbnz	x20, .L3106
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 366
+	mov	w2, 367
 	add	x1, x1, 712
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3105:
+.L3106:
 	mov	w24, 0
 	add	x25, x23, 80
 	add	x21, x19, :lo12:.LANCHOR0
 	adrp	x27, .LANCHOR4
-.L3106:
+.L3107:
 	ldrb	w0, [x25,9]
 	cmp	w24, w0
-	bge	.L3129
+	bge	.L3130
 	mov	w22, 1
 	sxtw	x28, w24
-.L3115:
+.L3116:
 	add	x0, x21, 2896
 	ldrh	w1, [x0,20]
 	cmp	w22, w1
-	bgt	.L3130
+	bgt	.L3131
 	add	x1, x28, 8
 	ldrh	w2, [x21,3350]
 	ldrh	w0, [x0,16]
@@ -19535,28 +19547,28 @@ gc_check_data_one_wl:
 	mul	w1, w1, w2
 	ldrb	w2, [x21,3257]
 	cmp	w2, 3
-	bne	.L3107
+	bne	.L3108
 	add	w1, w1, w0
 	orr	w1, w1, w22, lsl 24
-	b	.L3128
-.L3107:
+	b	.L3129
+.L3108:
 	cmp	w2, 2
-	bne	.L3109
+	bne	.L3110
 	sub	w0, w0, #1
 	add	w1, w0, w1
 	add	w1, w1, w22
 	orr	w1, w1, 33554432
-	b	.L3128
-.L3109:
+	b	.L3129
+.L3110:
 	add	w1, w1, w0
-.L3128:
+.L3129:
 	str	w1, [x20,40]
 	mov	x0, x20
 	mov	w1, 1
 	bl	sblk_read_page
 	ldr	w0, [x20,52]
 	cmn	w0, #1
-	beq	.L3110
+	beq	.L3111
 	add	x2, x27, :lo12:.LANCHOR4
 	ldrh	w0, [x21,2918]
 	ldr	x1, [x20,24]
@@ -19565,32 +19577,32 @@ gc_check_data_one_wl:
 	ldr	w4, [x3,x0]
 	ldr	w3, [x1,4]
 	cmp	w4, w3
-	bne	.L3110
+	bne	.L3111
 	ldr	x2, [x2,1144]
 	ldr	w2, [x2,x0]
 	ldr	w0, [x1,8]
 	cmp	w2, w0
-	beq	.L3111
-.L3110:
+	beq	.L3112
+.L3111:
 	add	x26, x27, :lo12:.LANCHOR4
 	ldrh	w0, [x21,2918]
 	add	x4, x21, 2896
 	ldr	x1, [x26,1136]
 	ldr	w0, [x1,x0,lsl 2]
 	cmn	w0, #1
-	beq	.L3111
+	beq	.L3112
 	ldrb	w5, [x25,9]
-	adrp	x0, .LC262
+	adrp	x0, .LC263
 	ldrh	w3, [x21,3274]
-	add	x0, x0, :lo12:.LC262
+	add	x0, x0, :lo12:.LC263
 	mov	w2, 4
 	str	x4, [x29,104]
 	mul	w3, w5, w3
 	bl	rknand_print_hex
 	ldrb	w5, [x25,9]
-	adrp	x0, .LC263
+	adrp	x0, .LC264
 	ldrh	w3, [x21,3274]
-	add	x0, x0, :lo12:.LC263
+	add	x0, x0, :lo12:.LC264
 	ldr	x1, [x26,1144]
 	mov	w2, 4
 	mul	w3, w5, w3
@@ -19598,7 +19610,7 @@ gc_check_data_one_wl:
 	adrp	x0, .LANCHOR2
 	ldr	x4, [x29,104]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 10, .L3112
+	tbz	x0, 10, .L3113
 	ldr	x7, [x20,24]
 	ldrh	w4, [x4,22]
 	ldr	x5, [x26,1144]
@@ -19606,8 +19618,8 @@ gc_check_data_one_wl:
 	lsl	x4, x4, 2
 	ldr	x3, [x26,1136]
 	str	w0, [sp]
-	adrp	x0, .LC264
-	add	x0, x0, :lo12:.LC264
+	adrp	x0, .LC265
+	add	x0, x0, :lo12:.LC265
 	ldr	w3, [x3,x4]
 	ldr	w6, [x7,4]
 	ldr	w4, [x5,x4]
@@ -19616,7 +19628,7 @@ gc_check_data_one_wl:
 	ldr	w2, [x20,52]
 	ldr	w7, [x7,8]
 	bl	printk
-.L3112:
+.L3113:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	x1, 0
 	ldr	x0, [x19,608]
@@ -19626,27 +19638,27 @@ gc_check_data_one_wl:
 	ldrh	w1, [x23,80]
 	strh	wzr, [x0,x1,lsl 1]
 	mov	w0, -1
-	b	.L3113
-.L3111:
+	b	.L3114
+.L3112:
 	ldrh	w0, [x21,2918]
 	add	w22, w22, 1
 	add	w0, w0, 1
 	strh	w0, [x21,2918]
-	b	.L3115
-.L3130:
+	b	.L3116
+.L3131:
 	add	w24, w24, 1
-	b	.L3106
-.L3129:
+	b	.L3107
+.L3130:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19,2912]
 	ldrb	w3, [x19,3348]
 	add	w0, w1, 1
 	strh	w0, [x19,2912]
 	mov	w0, 0
-	cbz	w3, .L3113
+	cbz	w3, .L3114
 	add	w1, w1, 2
 	strh	w1, [x19,2912]
-.L3113:
+.L3114:
 	sub	sp, x29, #16
 	ldp	x19, x20, [sp,32]
 	ldp	x21, x22, [sp,48]
@@ -19680,33 +19692,33 @@ ftl_update_l2p_map:
 	add	x0, x20, x24, sxtw 2
 	ldr	w0, [x0,-4]
 	cmn	w0, #1
-	beq	.L3132
+	beq	.L3133
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1576
+	mov	w2, 1575
 	add	x1, x1, 736
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3132:
-	adrp	x0, .LC266
-	mov	x28, 0
-	add	x0, x0, :lo12:.LC266
-	adrp	x27, .LC265
-	str	x0, [x29,120]
+.L3133:
 	adrp	x0, .LC267
+	mov	x28, 0
 	add	x0, x0, :lo12:.LC267
+	adrp	x27, .LC266
+	str	x0, [x29,120]
+	adrp	x0, .LC268
+	add	x0, x0, :lo12:.LC268
 	mov	w22, w28
 	str	x0, [x29,112]
-	add	x27, x27, :lo12:.LC265
-.L3133:
+	add	x27, x27, :lo12:.LC266
+.L3134:
 	cmp	w28, w24
 	mov	w25, w28
-	bge	.L3160
+	bge	.L3161
 	ldr	w2, [x20,x28,lsl 2]
 	cmn	w2, #1
-	beq	.L3134
+	beq	.L3135
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w21, [x0,2832]
 	adrp	x0, .LANCHOR2
@@ -19714,22 +19726,22 @@ ftl_update_l2p_map:
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
 	udiv	w21, w2, w21
 	and	w21, w21, 65535
-	tbz	x0, 12, .L3138
+	tbz	x0, 12, .L3139
 	mov	x0, x27
 	mov	w1, w21
 	mov	w3, w28
 	bl	printk
-.L3138:
+.L3139:
 	sbfiz	x26, x25, 2, 32
 	ldr	w0, [x20,x26]
 	cmn	w0, #1
-	beq	.L3136
+	beq	.L3137
 	add	x3, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x3,2832]
 	lsl	w1, w1, 7
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3136
+	bne	.L3137
 	ldrb	w0, [x23,9]
 	ldrh	w2, [x3,3350]
 	str	x3, [x29,104]
@@ -19743,13 +19755,13 @@ ftl_update_l2p_map:
 	ldr	w1, [x20,x26]
 	bl	pm_ppa_update_check
 	ldr	x3, [x29,104]
-	cbz	w0, .L3137
+	cbz	w0, .L3138
 	ldr	x1, [x3,3872]
 	mov	w2, 4
 	ldr	x0, [x29,112]
 	mov	w3, w24
 	bl	rknand_print_hex
-.L3137:
+.L3138:
 	ldr	w0, [x20,x26]
 	add	x1, x29, 140
 	mov	w2, 1
@@ -19758,27 +19770,27 @@ ftl_update_l2p_map:
 	uxth	w22, w22
 	mov	w0, -1
 	str	w0, [x20,x26]
-.L3136:
+.L3137:
 	add	w25, w25, 1
 	cmp	w25, w24
-	bne	.L3138
-.L3134:
+	bne	.L3139
+.L3135:
 	add	x28, x28, 1
-	b	.L3133
-.L3160:
+	b	.L3134
+.L3161:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3140
+	tbz	x0, 12, .L3141
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x23]
 	mov	w2, w22
 	ubfiz	x3, x1, 1, 16
 	ldr	x4, [x0,600]
-	adrp	x0, .LC268
-	add	x0, x0, :lo12:.LC268
+	adrp	x0, .LC269
+	add	x0, x0, :lo12:.LC269
 	ldrh	w3, [x4,x3]
 	bl	printk
-.L3140:
+.L3141:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x23]
 	ldr	x0, [x19,600]
@@ -19804,9 +19816,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3162
+	beq	.L3163
 	bl	zftl_insert_data_list
-.L3162:
+.L3163:
 	adrp	x0, .LANCHOR0+608
 	mov	w2, 2
 	mov	w1, 3
@@ -19840,15 +19852,15 @@ ftl_write_commit:
 	add	x0, x0, :lo12:.LANCHOR4
 	str	x0, [x29,120]
 	stp	x19, x20, [sp,16]
-	add	x0, x0, 1267
+	add	x0, x0, 1266
 	str	x0, [x29,104]
 	stp	x21, x22, [sp,32]
 	stp	x25, x26, [sp,64]
 	stp	x27, x28, [sp,80]
-.L3166:
+.L3167:
 	ldrb	w0, [x24,2856]
 	adrp	x21, .LANCHOR0
-	cbz	w0, .L3168
+	cbz	w0, .L3169
 	ldrb	w1, [x24,2888]
 	sub	w0, w0, #1
 	ldr	x2, [x29,112]
@@ -19861,16 +19873,16 @@ ftl_write_commit:
 	strb	w1, [x24,2888]
 	ldr	w1, [x27,36]
 	cmp	w1, w0
-	bcc	.L3169
+	bcc	.L3170
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 495
+	mov	w2, 496
 	add	x1, x1, 760
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3169:
+.L3170:
 	ldr	x0, [x29,128]
 	add	x1, x21, :lo12:.LANCHOR0
 	add	x4, x1, 784
@@ -19878,32 +19890,32 @@ ftl_write_commit:
 	ldr	w2, [x1,2840]
 	ldr	w23, [x0,36]
 	cmp	w23, w2
-	bcc	.L3170
+	bcc	.L3171
 	mov	x0, x27
 	bl	buf_free
 	mov	w0, -1
-	b	.L3224
-.L3170:
+	b	.L3225
+.L3171:
 	ldr	x25, [x0,8]
 	ldr	x28, [x0,24]
 	ldrb	w22, [x0,57]
 	ldrb	w20, [x0,56]
 	ldrb	w0, [x1,2857]
-	cbz	w0, .L3172
+	cbz	w0, .L3173
 	ldr	x0, [x29,120]
-	ldrb	w3, [x0,1267]
+	ldrb	w3, [x0,1266]
 	add	x3, x4, x3, lsl 6
-.L3173:
+.L3174:
 	ldrb	w5, [x3]
 	cmp	w5, 255
-	beq	.L3226
+	beq	.L3227
 	sbfiz	x3, x5, 6, 32
 	add	x3, x4, x3
-	b	.L3173
-.L3226:
+	b	.L3174
+.L3227:
 	ldr	w0, [x3,36]
 	cmp	w0, w23
-	bne	.L3172
+	bne	.L3173
 	ldr	x0, [x3,8]
 	ubfiz	x1, x22, 9, 8
 	lsl	w2, w20, 9
@@ -19912,29 +19924,29 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	mov	x0, x27
 	bl	buf_free
-	b	.L3166
-.L3172:
+	b	.L3167
+.L3173:
 	mov	w0, w23
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,156]
 	cmn	w0, #1
-	bne	.L3176
+	bne	.L3177
 	mov	w0, w23
 	add	x1, x29, 156
 	mov	w2, 0
 	bl	pm_log2phys
-.L3176:
+.L3177:
 	add	x4, x21, :lo12:.LANCHOR0
 	mov	w3, 0
 	add	x4, x4, 784
 	ldr	x19, [x4,-176]
 	add	x19, x19, 16
-.L3179:
+.L3180:
 	ldr	w0, [x4,36]
 	cmp	w0, w23
-	bne	.L3177
+	bne	.L3178
 	ldrb	w5, [x4,2]
-	tbz	x5, 3, .L3177
+	tbz	x5, 3, .L3178
 	add	x0, x21, :lo12:.LANCHOR0
 	ubfiz	x3, x3, 6, 32
 	add	x0, x0, 784
@@ -19944,22 +19956,22 @@ ftl_write_commit:
 	strb	w5, [x3,2]
 	ldr	x26, [x3,8]
 	str	w0, [x29,156]
-	b	.L3178
-.L3177:
+	b	.L3179
+.L3178:
 	add	w3, w3, 1
 	add	x4, x4, 64
 	cmp	w3, 32
-	bne	.L3179
+	bne	.L3180
 	mov	x26, 0
-.L3178:
+.L3179:
 	add	x3, x21, :lo12:.LANCHOR0
 	str	wzr, [x29,136]
 	ldrb	w0, [x3,2832]
 	cmp	w20, w0
-	bcs	.L3180
+	bcs	.L3181
 	add	w20, w22, w20
-	cbz	x26, .L3181
-	cbz	w22, .L3182
+	cbz	x26, .L3182
+	cbz	w22, .L3183
 	mov	x0, x25
 	mov	x1, x26
 	lsl	w2, w22, 9
@@ -19968,28 +19980,28 @@ ftl_write_commit:
 	ldr	x3, [x29,136]
 	ldr	x19, [x3,608]
 	add	x19, x19, 48
-.L3182:
+.L3183:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w2, [x0,2832]
 	cmp	w20, w2
-	bcc	.L3183
+	bcc	.L3184
 	ldr	x19, [x0,608]
 	add	x19, x19, 16
-	b	.L3225
-.L3183:
+	b	.L3226
+.L3184:
 	ubfiz	x1, x20, 9, 9
 	sub	w2, w2, w20
 	add	x0, x25, x1
 	lsl	w2, w2, 9
 	add	x1, x26, x1
 	bl	ftl_memcpy
-.L3225:
+.L3226:
 	str	wzr, [x29,136]
-	b	.L3180
-.L3181:
+	b	.L3181
+.L3182:
 	ldr	w0, [x29,156]
 	cmn	w0, #1
-	beq	.L3184
+	beq	.L3185
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x26, x0
@@ -20004,11 +20016,11 @@ ftl_write_commit:
 	add	w1, w1, 1
 	str	w1, [x29,136]
 	cmp	w0, w23
-	bne	.L3185
+	bne	.L3186
 	ldr	w0, [x26,52]
 	cmn	w0, #1
-	bne	.L3186
-.L3185:
+	bne	.L3187
+.L3186:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w2, [x29,156]
 	mov	w3, w23
@@ -20016,83 +20028,83 @@ ftl_write_commit:
 	ldr	w0, [x1,552]
 	add	w0, w0, 1
 	str	w0, [x1,552]
-	adrp	x0, .LC269
+	adrp	x0, .LC270
 	ldrb	w1, [x26,1]
-	add	x0, x0, :lo12:.LC269
+	add	x0, x0, :lo12:.LC270
 	ldr	w4, [x26,52]
 	bl	printk
-	adrp	x0, .LC201
+	adrp	x0, .LC202
 	mov	w2, 4
 	ldr	x1, [x26,24]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC202
 	mov	w3, w2
 	bl	rknand_print_hex
-.L3186:
+.L3187:
 	ldr	x0, [x26,24]
 	ldr	w0, [x0,4]
 	cmp	w0, w23
-	bne	.L3187
+	bne	.L3188
 	ldr	w0, [x26,52]
 	cmn	w0, #1
-	bne	.L3188
-.L3187:
+	bne	.L3189
+.L3188:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 566
+	mov	w2, 567
 	add	x1, x1, 760
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3188:
-	cbz	w22, .L3189
+.L3189:
+	cbz	w22, .L3190
 	ldr	w0, [x29,156]
 	lsl	w2, w22, 9
 	cmn	w0, #1
-	beq	.L3190
+	beq	.L3191
 	ldr	x1, [x26,8]
 	mov	x0, x25
 	bl	ftl_memcpy
-	b	.L3191
-.L3184:
-	cbz	w22, .L3189
+	b	.L3192
+.L3185:
+	cbz	w22, .L3190
 	lsl	w2, w22, 9
-.L3190:
+.L3191:
 	mov	x0, x25
 	mov	w1, 0
 	bl	ftl_memset
-.L3191:
+.L3192:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x19, [x0,608]
 	add	x19, x19, 48
-.L3189:
+.L3190:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w2, [x0,2832]
 	cmp	w20, w2
-	bcc	.L3192
-	bls	.L3193
+	bcc	.L3193
+	bls	.L3194
 	ldr	x19, [x0,608]
 	add	x19, x19, 16
-	b	.L3193
-.L3192:
+	b	.L3194
+.L3193:
 	ldr	w0, [x29,156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3194
+	beq	.L3195
 	ldr	x1, [x26,8]
 	lsl	x20, x0, 2
 	add	x0, x25, x20
 	add	x1, x1, x20
 	bl	ftl_memcpy
-	b	.L3193
-.L3194:
+	b	.L3194
+.L3195:
 	add	x0, x25, x0, lsl 2
 	mov	w1, 0
 	bl	ftl_memset
-.L3193:
-	cbz	x26, .L3180
+.L3194:
+	cbz	x26, .L3181
 	ldrb	w0, [x26,2]
 	mov	x1, x26
 	and	w0, w0, -9
@@ -20102,13 +20114,13 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x26
 	bl	buf_free
-.L3180:
+.L3181:
 	ldrh	w0, [x19,6]
-	cbnz	w0, .L3195
+	cbnz	w0, .L3196
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3195:
+.L3196:
 	mov	x0, x19
 	add	x20, x21, :lo12:.LANCHOR0
 	bl	ftl_get_new_free_page
@@ -20148,11 +20160,11 @@ ftl_write_commit:
 	str	w0, [x1,1268]
 	cmp	w2, 2
 	adrp	x0, .LANCHOR4
-	bhi	.L3196
+	bhi	.L3197
 	ldrh	w1, [x19,6]
 	cmp	w1, 1
-	bne	.L3168
-.L3196:
+	bne	.L3169
+.L3197:
 	ldrb	w1, [x19,5]
 	mov	w4, 2
 	add	x6, x21, :lo12:.LANCHOR0
@@ -20163,22 +20175,22 @@ ftl_write_commit:
 	cmp	w1, 1
 	add	x1, x0, :lo12:.LANCHOR4
 	csel	w4, w4, w2, ne
-	ldrb	w5, [x1,1267]
+	ldrb	w5, [x1,1266]
 	mov	w1, 0
 	mov	w3, w5
-.L3200:
+.L3201:
 	cmp	w1, w4
-	beq	.L3227
+	beq	.L3228
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x6,x3]
-	b	.L3200
-.L3227:
+	b	.L3201
+.L3228:
 	add	x0, x0, :lo12:.LANCHOR4
 	uxtb	w1, w1
 	sub	w2, w2, w1
 	ubfiz	x5, x5, 6, 8
-	strb	w3, [x0,1267]
+	strb	w3, [x0,1266]
 	add	x0, x21, :lo12:.LANCHOR0
 	add	x0, x0, 784
 	strb	w2, [x0,2073]
@@ -20186,20 +20198,20 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19,6]
 	cmp	w0, 1
-	bne	.L3168
+	bne	.L3169
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3168:
+.L3169:
 	add	x21, x21, :lo12:.LANCHOR0
 	ldrb	w19, [x21,2856]
-	cbnz	w19, .L3166
+	cbnz	w19, .L3167
 	bl	ftl_write_completed
 	mov	w0, w19
-.L3224:
+.L3225:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -20224,10 +20236,10 @@ gc_do_copy_back:
 	stp	x27, x28, [sp,96]
 	ldrb	w0, [x21,3273]
 	ldr	x22, [x21,608]
-	cbnz	w0, .L3229
+	cbnz	w0, .L3230
 	bl	buf_alloc
 	mov	x20, x0
-	cbz	x0, .L3228
+	cbz	x0, .L3229
 	ldrh	w22, [x21,2922]
 	mov	w0, w22
 	add	w22, w22, 1
@@ -20240,60 +20252,60 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	w0, [x20,52]
 	cmp	w0, 512
-	beq	.L3282
+	beq	.L3283
 	cmn	w0, #1
-	bne	.L3231
-.L3282:
+	bne	.L3232
+.L3283:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 600
+	mov	w2, 601
 	add	x1, x1, 784
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3231:
+.L3232:
 	ldr	x0, [x20,24]
 	ldr	w21, [x0,4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,144]
 	cmn	w0, #1
-	bne	.L3233
+	bne	.L3234
 	mov	w0, w21
 	add	x1, x29, 144
 	mov	w2, 0
 	bl	pm_log2phys
-.L3233:
+.L3234:
 	ldr	w22, [x29,144]
 	cmp	w22, w23
-	bne	.L3234
+	bne	.L3235
 	add	x1, x19, :lo12:.LANCHOR0
 	add	x0, x1, 784
 	add	x1, x1, 2832
-.L3237:
+.L3238:
 	ldr	w2, [x0,36]
 	cmp	w2, w21
-	bne	.L3235
+	bne	.L3236
 	ldrb	w2, [x0,2]
-	tbz	x2, 1, .L3235
+	tbz	x2, 1, .L3236
 	mov	x0, x20
 	bl	buf_free
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3228
+	tbz	x0, 8, .L3229
 	add	x19, x19, :lo12:.LANCHOR0
-	adrp	x0, .LC270
+	adrp	x0, .LC271
 	mov	w1, w21
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC270
+	add	x0, x0, :lo12:.LC271
 	ldrh	w3, [x19,2922]
 	bl	printk
-	b	.L3228
-.L3235:
+	b	.L3229
+.L3236:
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3237
+	bne	.L3238
 	add	x23, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x20,2]
 	str	w21, [x20,36]
@@ -20308,20 +20320,20 @@ gc_do_copy_back:
 	str	w0, [x20,32]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3238
+	tbz	x0, 8, .L3239
 	ldr	w2, [x29,144]
 	mov	w0, w21
 	str	x2, [x29,136]
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	ldr	x2, [x29,136]
-	adrp	x0, .LC271
+	adrp	x0, .LC272
 	ldrh	w5, [x23,2922]
-	add	x0, x0, :lo12:.LC271
+	add	x0, x0, :lo12:.LC272
 	mov	w1, w21
 	mov	w4, w22
 	bl	printk
-.L3238:
+.L3239:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	x0, x20
 	bl	ftl_gc_write_buf
@@ -20333,34 +20345,34 @@ gc_do_copy_back:
 	ldrh	w0, [x19,2924]
 	add	w0, w0, 1
 	strh	w0, [x19,2924]
-	b	.L3228
-.L3234:
+	b	.L3229
+.L3235:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3240
+	tbz	x0, 8, .L3241
 	mov	w0, w21
 	add	x19, x19, :lo12:.LANCHOR0
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	ldrh	w5, [x19,2922]
-	adrp	x0, .LC271
-	add	x0, x0, :lo12:.LC271
+	adrp	x0, .LC272
+	add	x0, x0, :lo12:.LC272
 	mov	w1, w21
 	mov	w2, w22
 	mov	w4, w23
 	bl	printk
-.L3240:
+.L3241:
 	mov	x0, x20
 	bl	buf_free
-	b	.L3228
-.L3229:
+	b	.L3229
+.L3230:
 	ldrb	w24, [x21,3257]
 	add	x0, x21, 2896
 	add	x22, x22, 80
 	cmp	w24, 3
-	bne	.L3241
+	bne	.L3242
 	ldrb	w1, [x21,3272]
-	cbz	w1, .L3242
+	cbz	w1, .L3243
 	ldrb	w20, [x22,9]
 	ldrh	w21, [x0,314]
 	str	w24, [x29,136]
@@ -20369,13 +20381,13 @@ gc_do_copy_back:
 	sdiv	w23, w21, w23
 	madd	w20, w23, w20, w21
 	uxth	w20, w20
-	b	.L3244
-.L3242:
+	b	.L3245
+.L3243:
 	ldrh	w20, [x0,314]
 	adrp	x0, .LANCHOR2
 	ldrb	w21, [x22,9]
 	add	x0, x0, :lo12:.LANCHOR2
-	add	x0, x0, 1528
+	add	x0, x0, 1592
 	str	w24, [x29,136]
 	sdiv	w1, w20, w21
 	msub	w20, w1, w21, w20
@@ -20387,9 +20399,9 @@ gc_do_copy_back:
 	cmp	w25, 1
 	add	w21, w21, w21, lsl 1
 	uxth	w21, w21
-	bne	.L3245
-	b	.L3244
-.L3241:
+	bne	.L3246
+	b	.L3245
+.L3242:
 	ldrb	w20, [x22,9]
 	ldrb	w1, [x21,3348]
 	ldrh	w21, [x0,314]
@@ -20397,38 +20409,38 @@ gc_do_copy_back:
 	sdiv	w23, w21, w20
 	msub	w20, w23, w20, w21
 	uxth	w20, w20
-	cbz	w1, .L3323
+	cbz	w1, .L3324
 	mov	w0, 2
-.L3323:
+.L3324:
 	str	w0, [x29,136]
-.L3244:
+.L3245:
 	mov	w25, 0
 	add	x24, x19, :lo12:.LANCHOR0
 	adrp	x3, .LANCHOR4
-.L3247:
+.L3248:
 	ldrb	w1, [x22,9]
 	ldr	w0, [x29,136]
 	mul	w0, w0, w1
 	cmp	w25, w0
-	bge	.L3280
+	bge	.L3281
 	ldrh	w0, [x24,3274]
 	add	w26, w21, w25
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w26, w0
-	beq	.L3280
+	beq	.L3281
 	add	x0, x3, :lo12:.LANCHOR4
 	sbfiz	x26, x26, 2, 32
 	ldr	x1, [x0,1144]
 	ldr	w0, [x1,x26]
 	cmn	w0, #1
-	bne	.L3248
+	bne	.L3249
 	ldrh	w27, [x24,2922]
 	ldrh	w0, [x24,2920]
 	str	x3, [x29,120]
 	str	x1, [x29,128]
 	cmp	w0, w27
-	bls	.L3228
+	bls	.L3229
 	mov	w0, w27
 	add	w27, w27, 1
 	bl	gc_get_src_ppa_from_index
@@ -20436,17 +20448,17 @@ gc_do_copy_back:
 	ldr	x1, [x29,128]
 	ldr	x3, [x29,120]
 	str	w0, [x1,x26]
-.L3248:
+.L3249:
 	add	w25, w25, 1
 	uxth	w25, w25
-	b	.L3247
-.L3280:
+	b	.L3248
+.L3281:
 	mov	w25, 1
-.L3245:
+.L3246:
 	adrp	x0, .LANCHOR2
 	str	x0, [x29,120]
 	ldr	w1, [x0,#:lo12:.LANCHOR2]
-	tbz	x1, 8, .L3250
+	tbz	x1, 8, .L3251
 	adrp	x0, .LANCHOR4+1144
 	add	x4, x19, :lo12:.LANCHOR0
 	ubfiz	x5, x21, 2, 16
@@ -20454,13 +20466,13 @@ gc_do_copy_back:
 	mov	w2, w25
 	mov	w3, w20
 	ldr	x6, [x0,#:lo12:.LANCHOR4+1144]
-	adrp	x0, .LC272
+	adrp	x0, .LC273
 	ldrh	w4, [x4,3210]
-	add	x0, x0, :lo12:.LC272
+	add	x0, x0, :lo12:.LC273
 	ldr	w5, [x6,x5]
 	mov	w6, w21
 	bl	printk
-.L3250:
+.L3251:
 	adrp	x0, .LC0
 	mov	w27, 0
 	add	x0, x0, :lo12:.LC0
@@ -20469,12 +20481,12 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LANCHOR3
 	add	x0, x0, 784
 	str	x0, [x29,104]
-.L3251:
+.L3252:
 	ldrb	w0, [x22,9]
 	ldr	w1, [x29,136]
 	mul	w0, w1, w0
 	cmp	w27, w0
-	bge	.L3327
+	bge	.L3328
 	add	w26, w21, w27
 	sxtw	x0, w26
 	str	x0, [x29,128]
@@ -20483,11 +20495,11 @@ gc_do_copy_back:
 	ldr	x0, [x0,3264]
 	ldrb	w0, [x0,x1]
 	cmp	w0, 255
-	bne	.L3252
+	bne	.L3253
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x24, x0
-	cbnz	x0, .L3253
+	cbnz	x0, .L3254
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -20495,8 +20507,8 @@ gc_do_copy_back:
 	mov	w0, w24
 	bl	buf_alloc
 	mov	x24, x0
-	cbz	x0, .L3228
-.L3253:
+	cbz	x0, .L3229
+.L3254:
 	add	x28, x19, :lo12:.LANCHOR0
 	ldr	x2, [x29,128]
 	ldrb	w1, [x24,1]
@@ -20513,7 +20525,7 @@ gc_do_copy_back:
 	sub	w0, w0, #1
 	cmp	w26, w0
 	adrp	x26, .LANCHOR4
-	bne	.L3254
+	bne	.L3255
 	add	x26, x26, :lo12:.LANCHOR4
 	mov	w1, -1
 	ldr	x0, [x26,1136]
@@ -20553,8 +20565,8 @@ gc_do_copy_back:
 	ldr	x1, [x28,608]
 	ldr	x0, [x24,24]
 	ldr	w1, [x1,132]
-	b	.L3324
-.L3254:
+	b	.L3325
+.L3255:
 	ldr	x0, [x29,128]
 	mov	w1, 1
 	lsl	x28, x0, 2
@@ -20566,10 +20578,10 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3255
+	beq	.L3256
 	cmn	w0, #1
-	bne	.L3256
-.L3255:
+	bne	.L3257
+.L3256:
 	add	x4, x19, :lo12:.LANCHOR0
 	mov	w2, 21
 	mov	w1, 1
@@ -20586,35 +20598,35 @@ gc_do_copy_back:
 	bl	ftl_sblk_dump
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3283
+	beq	.L3284
 	cmn	w0, #1
-	bne	.L3256
-.L3283:
+	bne	.L3257
+.L3284:
 	ldr	x0, [x24,24]
 	mov	w1, -1
 	str	w1, [x0,4]
-.L3256:
+.L3257:
 	ldr	w0, [x24,52]
 	cmp	w0, 512
-	beq	.L3284
+	beq	.L3285
 	cmn	w0, #1
-	bne	.L3259
-.L3284:
+	bne	.L3260
+.L3285:
 	ldr	x1, [x29,104]
-	mov	w2, 715
+	mov	w2, 716
 	ldr	x0, [x29,112]
 	bl	printk
 	bl	dump_stack
-.L3259:
+.L3260:
 	ldr	x1, [x24,24]
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x1,4]
 	ldr	w0, [x0,2840]
 	cmp	w2, w0
-	bcc	.L3261
+	bcc	.L3262
 	mov	w0, -1
 	str	w0, [x1,4]
-.L3261:
+.L3262:
 	ldr	x0, [x24,24]
 	add	x26, x26, :lo12:.LANCHOR4
 	ldr	w1, [x0,4]
@@ -20622,9 +20634,9 @@ gc_do_copy_back:
 	str	w1, [x0,x28]
 	ldr	x0, [x24,24]
 	ldr	w1, [x24,40]
-.L3324:
+.L3325:
 	str	w1, [x0,8]
-.L3252:
+.L3253:
 	add	x3, x19, :lo12:.LANCHOR0
 	ldr	x2, [x29,128]
 	add	x1, x3, 784
@@ -20640,7 +20652,7 @@ gc_do_copy_back:
 	cmp	w0, 3
 	strb	w25, [x1,61]
 	adrp	x2, .LANCHOR4
-	bne	.L3262
+	bne	.L3263
 	udiv	w0, w27, w0
 	ldrh	w3, [x3,3350]
 	add	x2, x2, :lo12:.LANCHOR4
@@ -20658,30 +20670,30 @@ gc_do_copy_back:
 	add	w0, w0, 1
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x1,x4,lsl 2]
-	b	.L3263
-.L3262:
+	b	.L3264
+.L3263:
 	cmp	w0, 2
-	bne	.L3264
+	bne	.L3265
 	ldrb	w6, [x3,3348]
 	add	x1, x1, 32
 	ldrh	w0, [x3,3350]
-	cbnz	w6, .L3265
+	cbnz	w6, .L3266
 	add	w3, w27, w20
 	add	x3, x22, x3, sxtw 1
 	ldrh	w3, [x3,16]
 	madd	w0, w3, w0, w23
-	b	.L3326
-.L3265:
+	b	.L3327
+.L3266:
 	add	w3, w20, w27, lsr 1
 	add	x3, x22, x3, sxtw 1
 	ldrh	w3, [x3,16]
 	madd	w0, w3, w0, w23
 	and	w3, w27, 1
 	add	w0, w0, w3
-.L3326:
+.L3327:
 	orr	w0, w0, 33554432
 	str	w0, [x1,8]
-.L3264:
+.L3265:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR4
 	add	x0, x0, 784
@@ -20690,10 +20702,10 @@ gc_do_copy_back:
 	ldrh	w1, [x0,48]
 	ldr	x0, [x2,1152]
 	str	w3, [x0,x1,lsl 2]
-.L3263:
+.L3264:
 	ldr	x0, [x29,120]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3266
+	tbz	x0, 8, .L3267
 	add	x0, x29, 144
 	ldr	x1, [x29,128]
 	mov	w2, w25
@@ -20712,57 +20724,57 @@ gc_do_copy_back:
 	ldr	x0, [x5,24]
 	ldr	w0, [x0,4]
 	str	w0, [sp,8]
-	adrp	x0, .LC273
-	add	x0, x0, :lo12:.LC273
+	adrp	x0, .LC274
+	add	x0, x0, :lo12:.LC274
 	ldr	w5, [x5,40]
 	bl	printk
-.L3266:
+.L3267:
 	add	w8, w27, 1
 	uxth	w27, w8
-	b	.L3251
-.L3327:
+	b	.L3252
+.L3328:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w0, [x2,3257]
 	cmp	w0, 3
 	add	x0, x29, 144
-	bne	.L3310
+	bne	.L3311
 	ldrb	w1, [x2,3272]
-	cbz	w1, .L3269
-.L3272:
+	cbz	w1, .L3270
+.L3273:
 	ldr	x1, [x29,144]
 	strb	wzr, [x1,60]
-	b	.L3270
-.L3269:
+	b	.L3271
+.L3270:
 	cmp	w25, 1
 	mov	w2, 9
-	beq	.L3325
+	beq	.L3326
 	cmp	w25, 2
-	bne	.L3272
+	bne	.L3273
 	mov	w2, 13
-.L3325:
+.L3326:
 	ldr	x1, [x29,144]
 	strb	w2, [x1,60]
-.L3270:
+.L3271:
 	ldrb	w2, [x22,9]
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-	b	.L3273
-.L3310:
+	b	.L3274
+.L3311:
 	ldrb	w2, [x22,9]
 	ldr	w3, [x29,136]
 	mul	w2, w2, w3
 	sub	w2, w2, #1
 	cmp	w1, w2
-	bge	.L3328
+	bge	.L3329
 	ldr	x2, [x0,w1,sxtw 3]
 	add	w1, w1, 1
 	ldr	x3, [x0,w1,sxtw 3]
 	uxth	w1, w1
 	ldrb	w3, [x3,1]
 	strb	w3, [x2]
-	b	.L3310
-.L3328:
+	b	.L3311
+.L3329:
 	ldr	x0, [x0,w2,sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
@@ -20770,20 +20782,20 @@ gc_do_copy_back:
 	ldr	x0, [x29,144]
 	mul	w1, w3, w1
 	bl	sblk_prog_page
-.L3273:
+.L3274:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrb	w2, [x22,9]
 	ldrb	w3, [x1,3272]
-	cbz	w3, .L3275
+	cbz	w3, .L3276
 	add	w0, w2, w2, lsl 1
 	and	w2, w0, 1023
-	b	.L3276
-.L3275:
+	b	.L3277
+.L3276:
 	ldrb	w1, [x1,3348]
 	ubfiz	w0, w2, 1, 8
 	cmp	w1, wzr
 	csel	w2, w0, w2, ne
-.L3276:
+.L3277:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x1, [x19,2864]
 	ldr	w0, [x1,52]
@@ -20797,12 +20809,12 @@ gc_do_copy_back:
 	ldrb	w2, [x22,9]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	blt	.L3277
+	blt	.L3278
 	ldr	x0, [x19,608]
 	strh	wzr, [x0,86]
-.L3277:
+.L3278:
 	bl	gc_write_completed
-.L3228:
+.L3229:
 	sub	sp, x29, #16
 	ldp	x19, x20, [sp,32]
 	ldp	x21, x22, [sp,48]
@@ -20835,63 +20847,63 @@ zftl_do_gc:
 	add	w20, w0, w20
 	ldrh	w22, [x1,2846]
 	uxth	w20, w20
-	bne	.L3330
+	bne	.L3331
 	adrp	x21, .LANCHOR7
 	add	x1, x21, :lo12:.LANCHOR7
 	ldr	w23, [x1,-80]
-	cbnz	w23, .L3331
+	cbnz	w23, .L3332
 	ldr	w1, [x1,-76]
-	cbz	w1, .L3330
-.L3331:
+	cbz	w1, .L3331
+.L3332:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1,3306]
 	cmp	w20, w2, lsr 2
-	bls	.L3330
+	bls	.L3331
 	ldrh	w1, [x1,2872]
 	cmp	w1, w20
-	bcs	.L3330
+	bcs	.L3331
 	add	w23, w23, 20
 	bl	timer_get_time
 	cmp	w23, w0
-	bcs	.L3332
+	bcs	.L3333
 	add	x0, x21, :lo12:.LANCHOR7
 	str	wzr, [x0,-80]
-.L3332:
+.L3333:
 	add	x19, x21, :lo12:.LANCHOR7
 	ldr	w20, [x19,-76]
 	bl	timer_get_time
 	add	w20, w20, 20
 	cmp	w20, w0
-	bcs	.L3515
+	bcs	.L3516
 	str	wzr, [x19,-76]
-	b	.L3515
-.L3330:
+	b	.L3516
+.L3331:
 	adrp	x23, .LANCHOR4
 	add	x1, x23, :lo12:.LANCHOR4
 	ldrb	w2, [x1,1130]
 	mov	w1, 16
 	cmp	w2, 6
-	bhi	.L3488
-	adrp	x1, .L3336
-	add	x1, x1, :lo12:.L3336
+	bhi	.L3489
+	adrp	x1, .L3337
+	add	x1, x1, :lo12:.L3337
 	ldrh	w1, [x1,w2,uxtw #1]
-	adr	x2, .Lrtx3336
+	adr	x2, .Lrtx3337
 	add	x1, x2, w1, sxth #2
 	br	x1
-.Lrtx3336:
+.Lrtx3337:
 	.section	.rodata
 	.align	0
 	.align	2
-.L3336:
-	.2byte	(.L3335 - .Lrtx3336) / 4
-	.2byte	(.L3337 - .Lrtx3336) / 4
-	.2byte	(.L3338 - .Lrtx3336) / 4
-	.2byte	(.L3339 - .Lrtx3336) / 4
-	.2byte	(.L3340 - .Lrtx3336) / 4
-	.2byte	(.L3446 - .Lrtx3336) / 4
-	.2byte	(.L3342 - .Lrtx3336) / 4
+.L3337:
+	.2byte	(.L3336 - .Lrtx3337) / 4
+	.2byte	(.L3338 - .Lrtx3337) / 4
+	.2byte	(.L3339 - .Lrtx3337) / 4
+	.2byte	(.L3340 - .Lrtx3337) / 4
+	.2byte	(.L3341 - .Lrtx3337) / 4
+	.2byte	(.L3447 - .Lrtx3337) / 4
+	.2byte	(.L3343 - .Lrtx3337) / 4
 	.text
-.L3335:
+.L3336:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	w22, w22, w0
 	ldrh	w1, [x24,80]
@@ -20902,12 +20914,12 @@ zftl_do_gc:
 	mov	w0, 65535
 	cmp	w1, w0
 	uxth	w25, w25
-	beq	.L3343
-	cbnz	w26, .L3344
+	beq	.L3344
+	cbnz	w26, .L3345
 	ldrh	w0, [x21,2872]
 	cmp	w20, w0, lsl 1
-	bge	.L3515
-.L3344:
+	bge	.L3516
+.L3345:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w1, 5
 	ldrh	w0, [x21,3304]
@@ -20918,7 +20930,7 @@ zftl_do_gc:
 	uxth	w2, w0
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3346
+	beq	.L3347
 	add	x3, x23, :lo12:.LANCHOR4
 	ubfiz	x2, x2, 1, 16
 	ldr	w1, [x3,1132]
@@ -20928,112 +20940,112 @@ zftl_do_gc:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x21,3300]
 	cmp	w3, w2
-	bcs	.L3347
+	bcs	.L3348
 	ldrh	w3, [x21,576]
 	cmp	w1, w3, lsr 4
-	bls	.L3346
+	bls	.L3347
 	ldrh	w1, [x21,2874]
 	cmp	w1, w2
-	bls	.L3346
-.L3347:
+	bls	.L3347
+.L3348:
 	add	x2, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w2, [x2,3273]
 	bl	gc_add_sblk
-	cbz	w0, .L3348
+	cbz	w0, .L3349
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	str	wzr, [x23,1132]
 	strb	w0, [x23,1130]
-	b	.L3515
-.L3346:
+	b	.L3516
+.L3347:
 	add	x0, x19, :lo12:.LANCHOR0
 	strh	wzr, [x0,3304]
-.L3348:
+.L3349:
 	cmp	w22, 15
 	mov	w21, 2
-	bls	.L3349
-	cbz	w25, .L3448
+	bls	.L3350
+	cbz	w25, .L3449
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w21, 1
 	ldrh	w1, [x0,2854]
 	ldrh	w0, [x0,3308]
 	cmp	w1, w0
-	bls	.L3349
-.L3448:
+	bls	.L3350
+.L3449:
 	mov	w21, 2
-.L3349:
+.L3350:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3350
+	tbz	x0, 8, .L3351
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w3, w20
 	mov	w4, w22
 	ldr	x0, [x1,608]
 	ldrb	w2, [x1,3273]
-	mov	w1, 1853
+	mov	w1, 1856
 	ldrh	w5, [x0,124]
 	ldrh	w6, [x0,120]
 	ldrh	w7, [x0,122]
 	ldrh	w0, [x24,80]
 	str	w0, [sp]
-	adrp	x0, .LC274
-	add	x0, x0, :lo12:.LC274
+	adrp	x0, .LC275
+	add	x0, x0, :lo12:.LC275
 	bl	printk
-.L3350:
+.L3351:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, w21
 	mov	w2, 1
 	ldrb	w0, [x19,3273]
 	bl	gc_search_src_blk
 	cmp	w0, wzr
-	ble	.L3351
-.L3352:
+	ble	.L3352
+.L3353:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
-	b	.L3518
-.L3351:
+	b	.L3519
+.L3352:
 	ldrb	w0, [x19,3273]
 	mov	w1, 3
 	mov	w2, 1
 	bl	gc_search_src_blk
 	cmp	w0, wzr
-	bgt	.L3352
-	b	.L3515
-.L3343:
+	bgt	.L3353
+	b	.L3516
+.L3344:
 	cmp	w26, 1
-	bne	.L3353
+	bne	.L3354
 	bl	gc_scan_static_data
 	ldr	x0, [x21,608]
 	ldrh	w0, [x0,122]
-	cbz	w0, .L3354
-.L3355:
+	cbz	w0, .L3355
+.L3356:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	w0, [x19,3273]
-	b	.L3518
-.L3354:
+	b	.L3519
+.L3355:
 	bl	gc_static_wearleveling
-	cbnz	w0, .L3355
+	cbnz	w0, .L3356
 	bl	gc_block_vpn_scan
-	cbz	w22, .L3449
+	cbz	w22, .L3450
 	cmp	w20, w25
-	bcs	.L3358
+	bcs	.L3359
 	ldrh	w0, [x21,3306]
 	cmp	w20, w0, lsl 1
-	blt	.L3359
-.L3358:
+	blt	.L3360
+.L3359:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	w1, w20, w25
 	ldrh	w2, [x0,3306]
 	cmp	w1, w2, lsl 1
-	blt	.L3359
+	blt	.L3360
 	ldrh	w1, [x0,2854]
 	ldrh	w0, [x0,3308]
 	cmp	w1, w0
-	bcc	.L3449
-.L3359:
+	bcc	.L3450
+.L3360:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x27, x23, :lo12:.LANCHOR4
 	mov	w28, 1
@@ -21043,17 +21055,17 @@ zftl_do_gc:
 	strb	w28, [x21,3273]
 	str	w1, [x27,1132]
 	cmp	w1, w0, lsr 5
-	bls	.L3361
+	bls	.L3362
 	ldrh	w0, [x21,2854]
 	cmp	w0, w22
-	bls	.L3361
+	bls	.L3362
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	uxth	w1, w0
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3449
+	beq	.L3450
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x21,600]
 	ldrb	w2, [x21,3276]
@@ -21062,47 +21074,47 @@ zftl_do_gc:
 	ldrh	w1, [x21,3300]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	bgt	.L3357
+	bgt	.L3358
 	str	wzr, [x27,1132]
 	mov	w0, w28
 	mov	w1, 2
-	b	.L3508
-.L3361:
+	b	.L3509
+.L3362:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x0,2854]
 	ldrh	w1, [x0,3308]
 	cmp	w2, w1
-	bcc	.L3364
+	bcc	.L3365
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
-	b	.L3509
-.L3364:
+	b	.L3510
+.L3365:
 	ldrh	w24, [x0,2850]
-	cbnz	w24, .L3365
+	cbnz	w24, .L3366
 	ldrh	w0, [x0,2852]
 	cmp	w0, 8
-	bls	.L3357
-.L3365:
+	bls	.L3358
+.L3366:
 	mov	w0, 1
 	mov	w1, w0
-.L3508:
-	mov	w2, 4
 .L3509:
+	mov	w2, 4
+.L3510:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3352
-	b	.L3449
-.L3353:
+	cbnz	w0, .L3353
+	b	.L3450
+.L3354:
 	ldrh	w0, [x21,2872]
 	cmp	w0, w20
-	bcc	.L3515
-.L3449:
+	bcc	.L3516
+.L3450:
 	mov	w24, 16
-.L3357:
+.L3358:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldr	w0, [x21,2884]
-	cbz	w0, .L3366
+	cbz	w0, .L3367
 	mov	w0, 1
 	mov	w1, 5
 	strb	w0, [x21,3273]
@@ -21112,105 +21124,105 @@ zftl_do_gc:
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3367
+	beq	.L3368
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x21,600]
 	ldrh	w1, [x2,x1]
 	cmp	w1, 8
-	bhi	.L3367
+	bhi	.L3368
 	mov	w2, 1
 	mov	w1, 0
 	str	w2, [x21,2884]
 	bl	gc_add_sblk
-	cbnz	w0, .L3352
-.L3367:
+	cbnz	w0, .L3353
+.L3368:
 	mov	w1, 4
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3368
+	beq	.L3369
 	add	x3, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x3,600]
 	ldrh	w1, [x2,x1]
 	cmp	w1, 4
-	bhi	.L3368
+	bhi	.L3369
 	mov	w2, 1
 	mov	w1, 0
 	str	w2, [x3,2884]
 	bl	gc_add_sblk
-	cbnz	w0, .L3352
-.L3368:
+	cbnz	w0, .L3353
+.L3369:
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.12
 	uxth	w1, w0
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3366
+	beq	.L3367
 	add	x2, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2,600]
 	ldrh	w1, [x3,x1]
 	cmp	w1, 4
-	bhi	.L3366
+	bhi	.L3367
 	mov	w1, 1
 	str	w1, [x2,2884]
 	mov	w2, 0
 	bl	gc_add_sblk
-	cbnz	w0, .L3352
-.L3366:
+	cbnz	w0, .L3353
+.L3367:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	ldr	x7, [x21,608]
 	strb	w0, [x21,3273]
 	ldrh	w5, [x7,124]
-	cbz	w5, .L3369
+	cbz	w5, .L3370
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	wzr, [x21,3273]
 	strb	w0, [x23,1130]
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3370
+	tbz	x0, 8, .L3371
 	ldrh	w6, [x7,120]
-	adrp	x0, .LC275
+	adrp	x0, .LC276
 	ldrh	w7, [x7,122]
-	mov	w1, 1951
+	mov	w1, 1954
 	mov	w2, 0
 	mov	w3, w20
 	mov	w4, w22
-	add	x0, x0, :lo12:.LC275
+	add	x0, x0, :lo12:.LC276
 	bl	printk
-	b	.L3370
-.L3369:
+	b	.L3371
+.L3370:
 	ldrh	w2, [x21,2872]
 	cmp	w20, w2
-	bcs	.L3371
-	cbz	w22, .L3372
+	bcs	.L3372
+	cbz	w22, .L3373
 	cmp	w22, 16
-	bls	.L3373
+	bls	.L3374
 	ldrh	w2, [x21,2854]
 	ldrh	w1, [x21,3308]
 	cmp	w2, w1
-	bhi	.L3373
+	bhi	.L3374
 	mov	w1, w0
 	mov	w2, 4
 	str	x5, [x29,104]
 	bl	gc_search_src_blk
 	uxth	w0, w0
 	ldr	x5, [x29,104]
-	cbnz	w0, .L3374
+	cbnz	w0, .L3375
 	ldrb	w0, [x21,3273]
-	b	.L3517
-.L3374:
+	b	.L3518
+.L3375:
 	mov	w1, 5
 	mov	w0, w5
 	bl	zftl_get_gc_node
 	uxth	w2, w0
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3443
+	beq	.L3444
 	add	x3, x23, :lo12:.LANCHOR4
 	ubfiz	x2, x2, 1, 16
 	ldr	w1, [x3,1132]
@@ -21220,14 +21232,14 @@ zftl_do_gc:
 	ldrh	w2, [x3,x2]
 	ldrh	w3, [x21,3300]
 	cmp	w3, w2
-	bcs	.L3377
+	bcs	.L3378
 	ldrh	w3, [x21,576]
 	cmp	w1, w3, lsr 4
-	bls	.L3443
+	bls	.L3444
 	ldrh	w1, [x21,2874]
 	cmp	w1, w2
-	bls	.L3443
-.L3377:
+	bls	.L3444
+.L3378:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrb	w2, [x19,3273]
@@ -21236,71 +21248,71 @@ zftl_do_gc:
 	str	w0, [x19,2884]
 	add	x0, x23, :lo12:.LANCHOR4
 	str	wzr, [x0,1132]
-	b	.L3443
-.L3373:
+	b	.L3444
+.L3374:
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3443
+	cbnz	w0, .L3444
 	add	x19, x19, :lo12:.LANCHOR0
-.L3514:
+.L3515:
 	ldrb	w0, [x19,3273]
 	mov	w1, 3
 	mov	w2, 2
-.L3511:
+.L3512:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	b	.L3375
-.L3372:
+	b	.L3376
+.L3373:
 	adrp	x0, .LANCHOR2
 	strb	w22, [x21,3273]
 	ldr	w0, [x0,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3379
-	adrp	x0, .LC275
+	tbz	x0, 8, .L3380
+	adrp	x0, .LC276
 	ldrh	w6, [x7,120]
 	ldrh	w7, [x7,122]
-	add	x0, x0, :lo12:.LC275
-	mov	w1, 1981
+	add	x0, x0, :lo12:.LC276
+	mov	w1, 1984
 	mov	w2, w22
 	mov	w3, w20
 	mov	w4, w22
 	mov	w5, w22
 	bl	printk
-.L3379:
+.L3380:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w20, 16
 	ldrb	w0, [x19,3273]
-	bls	.L3380
-.L3517:
+	bls	.L3381
+.L3518:
 	mov	w1, 3
 	mov	w2, 4
-	b	.L3511
-.L3380:
+	b	.L3512
+.L3381:
 	mov	w1, 1
 	mov	w2, w1
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3443
-	b	.L3514
-.L3371:
+	cbnz	w0, .L3444
+	b	.L3515
+.L3372:
 	cmp	w26, 1
 	mov	w1, w24
-	bne	.L3488
+	bne	.L3489
 	cmp	w20, w2, lsl 1
-	bge	.L3381
+	bge	.L3382
 	cmp	w25, w22, lsr 1
-	bcs	.L3382
+	bcs	.L3383
 	ldrh	w2, [x21,2854]
 	ldrh	w0, [x21,3308]
 	cmp	w2, w0
-	bcs	.L3382
+	bcs	.L3383
 	ldrh	w0, [x21,3306]
 	lsr	w0, w0, 2
 	strh	w0, [x21,2872]
-	b	.L3488
-.L3382:
+	b	.L3489
+.L3383:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -21308,12 +21320,12 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w27, w21
 	cmp	w21, w1
-	bne	.L3383
-.L3388:
+	bne	.L3384
+.L3389:
 	cmp	w22, 1
-	bhi	.L3384
-	b	.L3385
-.L3383:
+	bhi	.L3385
+	b	.L3386
+.L3384:
 	add	x26, x23, :lo12:.LANCHOR4
 	add	x2, x19, :lo12:.LANCHOR0
 	uxtw	x21, w21
@@ -21322,94 +21334,94 @@ zftl_do_gc:
 	add	w1, w1, 1
 	str	w1, [x26,1132]
 	cmp	w1, w3, lsr 4
-	bls	.L3386
+	bls	.L3387
 	ldr	x1, [x2,600]
 	str	wzr, [x26,1132]
 	ldrh	w3, [x1,x21,lsl 1]
 	ldrh	w1, [x2,2874]
 	cmp	w3, w1
-	bcs	.L3386
+	bcs	.L3387
 	mov	w1, 0
 	mov	w2, 1
 	bl	gc_add_sblk
-	cbz	w0, .L3386
+	cbz	w0, .L3387
 	mov	w0, 1
 	strb	w0, [x26,1130]
-	b	.L3370
-.L3386:
+	b	.L3371
+.L3387:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x0, [x1,600]
 	ldrh	w2, [x0,x21,lsl 1]
 	ldrh	w0, [x1,3300]
 	cmp	w2, w0, lsr 1
-	bhi	.L3387
+	bhi	.L3388
 	mov	w0, w27
 	mov	w1, 1
 	mov	w2, 0
 	bl	gc_add_sblk
-	b	.L3443
-.L3387:
+	b	.L3444
+.L3388:
 	ldrh	w3, [x1,2850]
 	ldrh	w0, [x1,2852]
 	add	w0, w3, w0
 	ldrh	w3, [x1,3306]
 	cmp	w0, w3, lsl 1
-	ble	.L3388
+	ble	.L3389
 	ldrh	w0, [x1,2874]
 	cmp	w0, w2
-	bcc	.L3385
-	b	.L3388
-.L3384:
+	bcc	.L3386
+	b	.L3389
+.L3385:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	cmp	w22, 16
 	strb	w0, [x21,3273]
-	bls	.L3389
+	bls	.L3390
 	ldrh	w2, [x21,2854]
 	ldrh	w1, [x21,3308]
 	cmp	w2, w1
-	bhi	.L3389
+	bhi	.L3390
 	mov	w1, w0
 	mov	w2, 4
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3390
+	cbnz	w0, .L3391
 	ldrb	w0, [x21,3273]
 	mov	w1, 3
 	mov	w2, 4
-	b	.L3510
-.L3389:
+	b	.L3511
+.L3390:
 	mov	w0, 1
 	mov	w1, 2
 	mov	w2, w0
 	bl	gc_search_src_blk
 	uxth	w0, w0
-	cbnz	w0, .L3390
+	cbnz	w0, .L3391
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 3
 	mov	w2, 2
 	ldrb	w0, [x0,3273]
-.L3510:
+.L3511:
 	bl	gc_search_src_blk
 	uxth	w0, w0
-.L3390:
+.L3391:
 	add	x19, x19, :lo12:.LANCHOR0
 	cmp	w20, w25, lsr 1
 	ldrh	w1, [x19,3306]
-	bls	.L3512
+	bls	.L3513
 	lsr	w1, w1, 2
-	b	.L3513
-.L3385:
+	b	.L3514
+.L3386:
 	cmp	w20, w25
 	add	x19, x19, :lo12:.LANCHOR0
-	bcs	.L3392
+	bcs	.L3393
 	mov	w0, 4
 	strb	wzr, [x19,3273]
 	bl	zftl_get_gc_node.part.12
 	uxth	w0, w0
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3392
+	beq	.L3393
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x19,600]
 	ldrb	w2, [x19,3276]
@@ -21417,134 +21429,134 @@ zftl_do_gc:
 	ldrh	w0, [x19,3300]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	bgt	.L3392
+	bgt	.L3393
 	mov	w1, 3
 	mov	w0, 0
 	mov	w2, 4
 	bl	gc_search_src_blk
 	uxth	w0, w0
 	ldrh	w1, [x19,3306]
-.L3512:
-	lsr	w1, w1, 1
 .L3513:
+	lsr	w1, w1, 1
+.L3514:
 	strh	w1, [x19,2872]
-	b	.L3375
-.L3392:
+	b	.L3376
+.L3393:
 	ldrh	w0, [x19,3306]
 	lsr	w0, w0, 2
 	strh	w0, [x19,2872]
-	b	.L3370
-.L3381:
+	b	.L3371
+.L3382:
 	ldrh	w0, [x21,3306]
 	mov	w24, w5
 	lsr	w0, w0, 2
 	strh	w0, [x21,2872]
-	b	.L3370
-.L3375:
+	b	.L3371
+.L3376:
 	mov	w1, w24
-	cbz	w0, .L3488
-.L3443:
+	cbz	w0, .L3489
+.L3444:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	strb	w0, [x23,1130]
-	b	.L3370
-.L3337:
+	b	.L3371
+.L3338:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x20,2896]
 	cmp	w1, w0
-	bne	.L3395
+	bne	.L3396
 	bl	gc_get_src_blk
 	strh	w0, [x20,2896]
-.L3395:
+.L3396:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	add	x1, x0, 2896
 	ldrh	w3, [x0,2896]
 	cmp	w3, w2
-	beq	.L3516
+	beq	.L3517
 	ldrh	w5, [x1,56]
 	uxtw	x4, w3
 	ldr	x2, [x0,584]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3398
+	cbz	w5, .L3399
 	mov	x0, 0
-.L3397:
+.L3398:
 	cmp	w5, w0, uxth
-	bls	.L3398
+	bls	.L3399
 	add	x0, x0, 1
 	add	x6, x1, x0, lsl 1
 	ldrh	w6, [x6,56]
 	cmp	w6, w3
-	bne	.L3397
-.L3403:
+	bne	.L3398
+.L3404:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	w0, [x19,2896]
-	b	.L3515
-.L3398:
+	b	.L3516
+.L3399:
 	ldrb	w0, [x2,2]
 	tst	w0, 192
-	beq	.L3456
+	beq	.L3457
 	and	w0, w0, 224
 	cmp	w0, 224
-	bne	.L3400
-.L3456:
+	bne	.L3401
+.L3457:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x0, [x0,600]
 	ldrh	w0, [x0,x4,lsl 1]
-	cbz	w0, .L3403
+	cbz	w0, .L3404
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2214
+	mov	w2, 2217
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L3403
-.L3400:
+	b	.L3404
+.L3401:
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 2
-	b	.L3518
-.L3338:
+	b	.L3519
+.L3339:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3404
+	bne	.L3405
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 3
-.L3518:
+.L3519:
 	strb	w0, [x23,1130]
-	b	.L3515
-.L3404:
+	b	.L3516
+.L3405:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w3, 65535
 	ldrh	w0, [x1,2896]
 	cmp	w0, w3
-	beq	.L3352
+	beq	.L3353
 	ldrh	w3, [x1,2920]
 	add	x23, x23, :lo12:.LANCHOR4
-	cbz	w3, .L3405
+	cbz	w3, .L3406
 	mov	w0, 4
 	strh	wzr, [x1,2922]
 	strb	w0, [x23,1130]
-	b	.L3515
-.L3405:
+	b	.L3516
+.L3406:
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1,600]
 	mov	w2, 1
 	strb	w2, [x23,1130]
 	ldrh	w0, [x1,x0]
-	cbz	w0, .L3406
+	cbz	w0, .L3407
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2242
+	mov	w2, 2245
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3406:
+.L3407:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x20, 2896
 	ldrh	w0, [x20,2896]
@@ -21556,70 +21568,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	uxth	w0, w0
 	cmp	w0, 8
-	bhi	.L3407
+	bhi	.L3408
 	strh	w0, [x21,30]
-	b	.L3403
-.L3407:
+	b	.L3404
+.L3408:
 	strh	wzr, [x21,30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3403
-.L3339:
+	b	.L3404
+.L3340:
 	add	x21, x19, :lo12:.LANCHOR0
-.L3489:
+.L3490:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w2, [x21,2898]
 	add	x0, x21, 2896
 	ldrh	w1, [x21,3300]
 	cmp	w2, w1
-	bcs	.L3409
+	bcs	.L3410
 	cmp	w20, 7
-	bls	.L3489
-	b	.L3515
-.L3409:
+	bls	.L3490
+	b	.L3516
+.L3410:
 	ldrh	w3, [x0,24]
 	adrp	x2, .LANCHOR2
-	cbz	w3, .L3410
+	cbz	w3, .L3411
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w1, 4
 	strh	wzr, [x0,26]
 	strb	w1, [x23,1130]
 	ldr	w1, [x2,#:lo12:.LANCHOR2]
-	tbz	x1, 8, .L3411
+	tbz	x1, 8, .L3412
 	ldrh	w1, [x0]
-	adrp	x0, .LC276
+	adrp	x0, .LC277
 	ldr	x4, [x21,600]
-	add	x0, x0, :lo12:.LC276
+	add	x0, x0, :lo12:.LC277
 	ubfiz	x2, x1, 1, 16
 	ldrh	w2, [x4,x2]
 	bl	printk
-.L3411:
+.L3412:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x0,2896]
 	ldr	x1, [x0,600]
 	ldrh	w0, [x0,2920]
 	ldrh	w1, [x1,x2,lsl 1]
 	cmp	w1, w0
-	beq	.L3412
+	beq	.L3413
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2276
+	mov	w2, 2279
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3412:
+.L3413:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19,2896]
 	ldr	x0, [x19,600]
 	ldrh	w2, [x19,2920]
 	strh	w2, [x0,x1,lsl 1]
-	b	.L3515
-.L3410:
+	b	.L3516
+.L3411:
 	add	x23, x23, :lo12:.LANCHOR4
 	ldrh	w1, [x0]
 	mov	w0, 1
@@ -21627,29 +21639,29 @@ zftl_do_gc:
 	add	x20, x20, x1, uxth 2
 	strb	w0, [x23,1130]
 	ldr	w0, [x2,#:lo12:.LANCHOR2]
-	tbz	x0, 8, .L3413
+	tbz	x0, 8, .L3414
 	ldrb	w2, [x20,2]
-	adrp	x0, .LC277
-	add	x0, x0, :lo12:.LC277
+	adrp	x0, .LC278
+	add	x0, x0, :lo12:.LC278
 	ubfx	x2, x2, 5, 3
 	bl	printk
-.L3413:
+.L3414:
 	ldrb	w0, [x20,2]
 	tst	w0, 192
-	beq	.L3457
+	beq	.L3458
 	and	w0, w0, 224
 	cmp	w0, 224
-	bne	.L3414
-.L3457:
+	bne	.L3415
+.L3458:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2286
+	mov	w2, 2289
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3414:
+.L3415:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x20, x19, 2896
 	ldrh	w0, [x19,2896]
@@ -21660,59 +21672,59 @@ zftl_do_gc:
 	add	w0, w0, 1
 	uxth	w0, w0
 	cmp	w0, 8
-	bhi	.L3416
+	bhi	.L3417
 	strh	w0, [x20,30]
-	b	.L3515
-.L3416:
+	b	.L3516
+.L3417:
 	strh	wzr, [x20,30]
-	b	.L3519
-.L3340:
-	cbnz	w26, .L3417
+	b	.L3520
+.L3341:
+	cbnz	w26, .L3418
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0,2872]
 	cmp	w0, w20
-	bcc	.L3515
-.L3417:
+	bcc	.L3516
+.L3418:
 	ldrh	w1, [x24,80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3418
+	bne	.L3419
 	add	x22, x19, :lo12:.LANCHOR0
 	ldrb	w21, [x22,3273]
 	cmp	w21, 1
-	bne	.L3418
+	bne	.L3419
 	bl	ftl_flush
 	ldrh	w0, [x22,3214]
-	cbz	w0, .L3419
+	cbz	w0, .L3420
 	mov	w0, w21
-.L3419:
+.L3420:
 	mov	w1, 5
 	bl	zftl_gc_get_free_sblk
 	uxth	w20, w0
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3421
+	beq	.L3422
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	x21, [x0,584]
 	add	x21, x21, x20, uxth 2
 	ldrb	w0, [x21,2]
 	tst	w0, 224
-	beq	.L3422
+	beq	.L3423
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2315
+	mov	w2, 2318
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3422:
+.L3423:
 	ldrb	w0, [x21,2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21,2]
-.L3444:
+.L3445:
 	mov	w0, w20
 	mov	w1, 1
 	add	x19, x19, :lo12:.LANCHOR0
@@ -21769,75 +21781,77 @@ zftl_do_gc:
 	strh	wzr, [x19,3212]
 	strh	wzr, [x19,3216]
 	bl	ftl_info_flush
-	b	.L3515
-.L3418:
+	b	.L3516
+.L3419:
 	cmp	w26, 1
 	mov	w21, 4
 	csinc	w21, w21, wzr, eq
 	cmp	w20, 15
 	add	w0, w21, 4
-	add	x20, x19, :lo12:.LANCHOR0
+	add	x22, x19, :lo12:.LANCHOR0
 	csel	w21, w0, w21, ls
-.L3425:
+.L3426:
 	sub	w21, w21, #1
 	uxtb	w21, w21
 	cmp	w21, 255
-	beq	.L3515
+	beq	.L3516
 	bl	gc_do_copy_back
-	ldrb	w0, [x20,3273]
-	cbnz	w0, .L3426
-	ldrb	w0, [x20,2834]
+	ldrb	w0, [x22,3273]
+	cbnz	w0, .L3427
+	ldrb	w0, [x22,2834]
 	cmp	w0, 3
-	bhi	.L3427
+	bhi	.L3428
 	bl	ftl_write_commit
-.L3427:
-	ldrh	w1, [x20,2922]
-	ldrh	w0, [x20,2920]
+.L3428:
+	ldrh	w1, [x22,2922]
+	ldrh	w0, [x22,2920]
 	cmp	w1, w0
-	bcc	.L3425
+	bcc	.L3426
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 1
 	strb	w0, [x23,1130]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrh	w1, [x20,2896]
-	ldr	x0, [x20,600]
+	ldrh	w1, [x22,2896]
+	ldr	x0, [x22,600]
 	ldrh	w0, [x0,x1,lsl 1]
-	cbz	w0, .L3429
+	cbz	w0, .L3430
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2390
+	mov	w2, 2393
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3429:
+.L3430:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1,2896]
 	ldr	x3, [x1,600]
 	ubfiz	x2, x0, 1, 16
 	ldrh	w4, [x3,x2]
-	cbnz	w4, .L3430
+	cbnz	w4, .L3431
 	strh	w4, [x3,x2]
 	ldrh	w0, [x1,2896]
 	bl	ftl_free_sblk
-	b	.L3403
-.L3430:
+	b	.L3404
+.L3431:
 	mov	w1, 0
 	mov	w2, 1
 	bl	gc_add_sblk
-	b	.L3403
-.L3426:
-	add	x0, x20, 2896
-	ldrh	w1, [x0,320]
-	cbz	w1, .L3431
-	strh	wzr, [x0,320]
-	ldr	w0, [x0,324]
+	b	.L3404
+.L3427:
+	add	x20, x22, 2896
+	ldrh	w0, [x20,320]
+	cbz	w0, .L3432
+	strh	wzr, [x20,320]
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	w0, [x20,324]
 	cmn	w0, #1
-	beq	.L3432
+	beq	.L3433
 	bl	ftl_mask_bad_block
-.L3432:
+.L3433:
 	add	x20, x19, :lo12:.LANCHOR0
 	ldr	x0, [x20,608]
 	str	wzr, [x20,3220]
@@ -21851,9 +21865,9 @@ zftl_do_gc:
 	strh	w0, [x2,126]
 	strh	w0, [x1,130]
 	ldr	x0, [x20,2904]
-	cbz	x0, .L3433
+	cbz	x0, .L3434
 	bl	buf_free
-.L3433:
+.L3434:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x23, x23, :lo12:.LANCHOR4
 	str	xzr, [x19,2904]
@@ -21861,50 +21875,50 @@ zftl_do_gc:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2426
+	mov	w2, 2431
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	strb	wzr, [x23,1130]
 	bl	printk
 	bl	dump_stack
-	b	.L3515
-.L3431:
-	ldrh	w1, [x24,86]
-	cmp	w1, 1
-	bls	.L3434
-	ldrh	w2, [x0,26]
-	ldrh	w1, [x0,24]
-	cmp	w2, w1
-	bcc	.L3425
-	add	x23, x23, :lo12:.LANCHOR4
-	mov	w1, 1
-	strb	w1, [x23,1130]
-	ldrh	w1, [x0,56]
-	add	w2, w1, 1
-	add	x1, x0, x1, sxtw 1
-	strh	w2, [x0,56]
-	ldrh	w2, [x0]
-	strh	w2, [x1,58]
-	mov	w1, -1
-	strh	w1, [x0]
-	b	.L3515
-.L3434:
+	b	.L3516
+.L3432:
+	ldrh	w0, [x24,86]
+	cmp	w0, 1
+	bls	.L3435
+	ldrh	w1, [x20,26]
+	ldrh	w0, [x20,24]
+	cmp	w1, w0
+	bcc	.L3426
 	add	x23, x23, :lo12:.LANCHOR4
-	mov	w1, 5
-	ldrh	w2, [x0,26]
-	strb	w1, [x23,1130]
-	ldrh	w1, [x0,24]
-	cmp	w2, w1
-	bcc	.L3435
-	ldrh	w1, [x0,56]
-	add	w2, w1, 1
-	add	x1, x0, x1, sxtw 1
-	strh	w2, [x0,56]
-	ldrh	w2, [x0]
-	strh	w2, [x1,58]
-	mov	w1, -1
-	strh	w1, [x0]
+	mov	w0, 1
+	strb	w0, [x23,1130]
+	ldrh	w0, [x20,56]
+	add	w1, w0, 1
+	add	x0, x20, x0, sxtw 1
+	strh	w1, [x20,56]
+	ldrh	w1, [x20]
+	strh	w1, [x0,58]
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L3516
 .L3435:
+	add	x23, x23, :lo12:.LANCHOR4
+	mov	w0, 5
+	ldrh	w1, [x20,26]
+	strb	w0, [x23,1130]
+	ldrh	w0, [x20,24]
+	cmp	w1, w0
+	bcc	.L3436
+	ldrh	w0, [x20,56]
+	add	w1, w0, 1
+	add	x0, x20, x0, sxtw 1
+	strh	w1, [x20,56]
+	ldrh	w1, [x20]
+	strh	w1, [x0,58]
+	mov	w0, -1
+	strh	w0, [x20]
+.L3436:
 	add	x20, x19, :lo12:.LANCHOR0
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
@@ -21920,23 +21934,23 @@ zftl_do_gc:
 	strh	w1, [x20,2914]
 	cmp	w2, 2
 	strh	w2, [x20,2916]
-	bne	.L3437
+	bne	.L3438
 	lsl	w1, w1, 1
 	strh	w1, [x20,2914]
 	ldrb	w1, [x20,3348]
-	cbnz	w1, .L3437
+	cbnz	w1, .L3438
 	mov	w1, 1
 	strh	w1, [x20,2916]
-.L3437:
+.L3438:
 	add	x19, x19, :lo12:.LANCHOR0
 	strh	wzr, [x19,2918]
-	b	.L3515
-.L3446:
+	b	.L3516
+.L3447:
 	mov	w21, 0
 	add	x24, x19, :lo12:.LANCHOR0
-.L3341:
+.L3342:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3440
+	cbz	w0, .L3441
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x23, x23, :lo12:.LANCHOR4
 	ldr	x0, [x19,608]
@@ -21953,32 +21967,32 @@ zftl_do_gc:
 	bl	buf_free
 	str	xzr, [x19,2904]
 	strb	wzr, [x23,1130]
-.L3519:
+.L3520:
 	bl	flt_sys_flush
-	b	.L3515
-.L3440:
+	b	.L3516
+.L3441:
 	ldrh	w1, [x24,2912]
 	ldrh	w0, [x24,2914]
 	cmp	w1, w0
-	bcc	.L3441
+	bcc	.L3442
 	add	x23, x23, :lo12:.LANCHOR4
 	mov	w0, 6
 	strb	w0, [x23,1130]
 	ldr	x0, [x24,2904]
 	bl	buf_free
 	str	xzr, [x24,2904]
-	b	.L3515
-.L3441:
+	b	.L3516
+.L3442:
 	cmp	w20, 15
-	bls	.L3341
+	bls	.L3342
 	cmp	w26, 1
-	bne	.L3515
+	bne	.L3516
 	add	w21, w21, 1
 	uxtb	w21, w21
 	cmp	w21, 4
-	bls	.L3341
-	b	.L3515
-.L3342:
+	bls	.L3342
+	b	.L3516
+.L3343:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21991,26 +22005,26 @@ zftl_do_gc:
 	strh	w20, [x0,126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3516:
+.L3517:
 	add	x23, x23, :lo12:.LANCHOR4
 	strb	wzr, [x23,1130]
-.L3515:
+.L3516:
 	mov	w1, 16
-	b	.L3488
-.L3370:
+	b	.L3489
+.L3371:
 	mov	w1, w24
-	b	.L3488
-.L3421:
+	b	.L3489
+.L3422:
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 2321
+	mov	w2, 2324
 	add	x1, x1, 800
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-	b	.L3444
-.L3488:
+	b	.L3445
+.L3489:
 	sub	sp, x29, #16
 	mov	w0, w1
 	ldp	x19, x20, [sp,32]
@@ -22039,30 +22053,30 @@ zftl_write:
 	stp	x21, x22, [sp,32]
 	mov	w28, w1
 	mov	x25, x3
-	tbz	x0, 12, .L3521
-	adrp	x0, .LC278
+	tbz	x0, 12, .L3522
+	adrp	x0, .LC279
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC278
+	add	x0, x0, :lo12:.LC279
 	mov	w2, w28
 	mov	w3, w23
 	bl	printk
-.L3521:
-	cbnz	w19, .L3522
+.L3522:
+	cbnz	w19, .L3523
 	adrp	x0, .LANCHOR0+520
 	mov	w19, 24576
 	ldr	w2, [x0,#:lo12:.LANCHOR0+520]
-	b	.L3523
-.L3522:
+	b	.L3524
+.L3523:
 	cmp	w19, 3
 	mov	w0, -1
-	bhi	.L3524
+	bhi	.L3525
 	lsl	w19, w19, 13
 	mov	w2, 8192
-.L3523:
+.L3524:
 	add	w1, w28, w23
 	mov	w0, -1
 	cmp	w1, w2
-	bhi	.L3524
+	bhi	.L3525
 	add	w28, w19, w28
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
@@ -22075,15 +22089,15 @@ zftl_write:
 	udiv	w22, w22, w0
 	sub	w20, w22, w24
 	add	w20, w20, 1
-.L3525:
-	cbz	w20, .L3544
+.L3526:
+	cbz	w20, .L3545
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbnz	x0, .L3526
+	cbnz	x0, .L3527
 	bl	ftl_write_commit
-	b	.L3525
-.L3526:
+	b	.L3526
+.L3527:
 	strb	wzr, [x0,57]
 	add	x0, x19, :lo12:.LANCHOR0
 	cmp	w21, w24
@@ -22091,12 +22105,12 @@ zftl_write:
 	cset	w0, eq
 	strb	w4, [x27,56]
 	cmp	w21, w22
-	beq	.L3528
-	cbz	w0, .L3529
-	b	.L3538
-.L3528:
+	beq	.L3529
 	cbz	w0, .L3530
-.L3538:
+	b	.L3539
+.L3529:
+	cbz	w0, .L3531
+.L3539:
 	udiv	w0, w28, w4
 	msub	w0, w0, w4, w28
 	uxtb	w0, w0
@@ -22105,12 +22119,12 @@ zftl_write:
 	uxtb	w4, w4
 	cmp	w4, w23
 	csel	w4, w23, w4, hi
-	b	.L3542
-.L3530:
+	b	.L3543
+.L3531:
 	msub	w4, w4, w21, w26
-.L3542:
+.L3543:
 	strb	w4, [x27,56]
-.L3529:
+.L3530:
 	ldrb	w1, [x27,57]
 	sub	w20, w20, #1
 	ldr	x0, [x27,8]
@@ -22131,11 +22145,11 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	w0, [x27,56]
 	add	x25, x25, x0, lsl 9
-	b	.L3525
-.L3544:
+	b	.L3526
+.L3545:
 	bl	ftl_write_commit
 	mov	w0, w20
-.L3543:
+.L3544:
 	mov	w1, 1
 	bl	zftl_do_gc
 	add	x1, x19, :lo12:.LANCHOR0
@@ -22143,15 +22157,15 @@ zftl_write:
 	ldrh	w0, [x1,2848]
 	add	w0, w2, w0
 	cmp	w0, 7
-	bgt	.L3545
+	bgt	.L3546
 	mov	w0, 0
-	b	.L3543
-.L3545:
+	b	.L3544
+.L3546:
 	bl	timer_get_time
 	adrp	x1, .LANCHOR7-76
 	str	w0, [x1,#:lo12:.LANCHOR7-76]
 	mov	w0, 0
-.L3524:
+.L3525:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22209,7 +22223,7 @@ zftl_discard:
 	stp	x27, x28, [sp,80]
 	ldr	w1, [x1,520]
 	cmp	w2, w1
-	bhi	.L3549
+	bhi	.L3550
 	adrp	x23, .LANCHOR7
 	add	w24, w0, 24576
 	add	x0, x23, :lo12:.LANCHOR7
@@ -22218,14 +22232,14 @@ zftl_discard:
 	add	w1, w19, w1
 	str	w1, [x0,-72]
 	ldr	w0, [x25,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3550
-	adrp	x0, .LC279
+	tbz	x0, 12, .L3551
+	adrp	x0, .LC280
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC279
+	add	x0, x0, :lo12:.LC280
 	mov	w3, w19
 	mov	w4, 0
 	bl	printk
-.L3550:
+.L3551:
 	add	x20, x21, :lo12:.LANCHOR0
 	ldr	x0, [x20,2864]
 	ldr	w26, [x0,8]
@@ -22236,7 +22250,7 @@ zftl_discard:
 	ldrb	w22, [x20,2832]
 	udiv	w20, w24, w22
 	msub	w27, w20, w22, w24
-	cbz	w27, .L3551
+	cbz	w27, .L3552
 	sub	w22, w22, w27
 	mov	w0, w20
 	cmp	w22, w19
@@ -22244,20 +22258,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	bne	.L3552
+	bne	.L3553
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
-.L3552:
+.L3553:
 	ldr	w0, [x29,120]
 	and	w28, w22, 65535
 	cmn	w0, #1
-	beq	.L3554
+	beq	.L3555
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3554
+	cbz	x0, .L3555
 	strb	w27, [x0,57]
 	ubfiz	x27, x27, 9, 25
 	str	w20, [x0,36]
@@ -22278,31 +22292,31 @@ zftl_discard:
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3554:
+.L3555:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3551:
-	cbz	w19, .L3556
+.L3552:
+	cbz	w19, .L3557
 	bl	ftl_flush
-.L3556:
+.L3557:
 	mov	w0, -1
 	mov	w27, 1
 	str	w0, [x29,124]
 	mov	w28, 21
-.L3557:
+.L3558:
 	add	x22, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x22,2832]
 	cmp	w19, w0
-	bcc	.L3596
+	bcc	.L3597
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3558
+	beq	.L3559
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3560
+	cbz	x0, .L3561
 	ldrb	w2, [x22,2832]
 	mov	w1, 0
 	str	w20, [x0,36]
@@ -22317,15 +22331,15 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	b	.L3595
-.L3558:
+	b	.L3596
+.L3559:
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
 	ldr	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3560
+	beq	.L3561
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -22340,36 +22354,36 @@ zftl_discard:
 	and	w0, w2, w0
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-.L3595:
+.L3596:
 	ldr	x1, [x22,2864]
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3560:
+.L3561:
 	add	x0, x21, :lo12:.LANCHOR0
 	add	w20, w20, 1
 	ldrb	w0, [x0,2832]
 	sub	w19, w19, w0
-	b	.L3557
-.L3596:
-	cbz	w19, .L3564
+	b	.L3558
+.L3597:
+	cbz	w19, .L3565
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29,120]
 	cmn	w0, #1
-	bne	.L3565
+	bne	.L3566
 	mov	w0, w20
 	add	x1, x29, 120
 	mov	w2, 0
 	bl	pm_log2phys
-.L3565:
+.L3566:
 	ldr	w0, [x29,120]
 	cmn	w0, #1
-	beq	.L3564
+	beq	.L3565
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x22, x0
-	cbz	x0, .L3564
+	cbz	x0, .L3565
 	str	w20, [x0,36]
 	strb	wzr, [x0,57]
 	strb	w19, [x0,56]
@@ -22377,16 +22391,16 @@ zftl_discard:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w0, [x0,2832]
 	cmp	w19, w0
-	bcc	.L3567
+	bcc	.L3568
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR3
-	mov	w2, 1235
+	mov	w2, 1236
 	add	x1, x1, 816
 	add	x0, x0, :lo12:.LC0
 	bl	printk
 	bl	dump_stack
-.L3567:
+.L3568:
 	ldr	x0, [x22,8]
 	mov	w1, 0
 	lsl	w2, w19, 9
@@ -22399,20 +22413,20 @@ zftl_discard:
 	ldr	w0, [x1,76]
 	add	w0, w0, 1
 	str	w0, [x1,76]
-.L3564:
+.L3565:
 	add	x0, x23, :lo12:.LANCHOR7
 	mov	w4, 0
 	ldr	w1, [x0,-72]
 	cmp	w1, 8192
-	bls	.L3549
+	bls	.L3550
 	ldr	w0, [x25,#:lo12:.LANCHOR2]
-	tbz	x0, 12, .L3568
-	adrp	x0, .LC279
+	tbz	x0, 12, .L3569
+	adrp	x0, .LC280
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC279
+	add	x0, x0, :lo12:.LC280
 	mov	w3, w19
 	bl	printk
-.L3568:
+.L3569:
 	add	x23, x23, :lo12:.LANCHOR7
 	add	x21, x21, :lo12:.LANCHOR0
 	str	wzr, [x23,-72]
@@ -22420,7 +22434,7 @@ zftl_discard:
 	mov	w0, 1
 	mov	w4, 0
 	str	w0, [x21,2884]
-.L3549:
+.L3550:
 	mov	w0, w4
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -22450,29 +22464,29 @@ id_block_prog_msb_ff_data:
 	ldrb	w2, [x0,19]
 	add	x0, x20, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1264]
-	cbnz	w0, .L3597
+	cbnz	w0, .L3598
 	sub	w0, w2, #5
 	uxtb	w0, w0
 	cmp	w0, 2
-	bls	.L3599
+	bls	.L3600
 	cmp	w2, 68
-	beq	.L3599
+	beq	.L3600
 	sub	w2, w2, #19
 	and	w2, w2, -17
 	uxtb	w2, w2
-	cbnz	w2, .L3597
-.L3599:
-	adrp	x24, .LC280
+	cbnz	w2, .L3598
+.L3600:
+	adrp	x24, .LC281
 	mov	w25, w1
-	add	x24, x24, :lo12:.LC280
+	add	x24, x24, :lo12:.LC281
 	add	x20, x20, :lo12:.LANCHOR4
 	mov	w27, 65535
-.L3601:
+.L3602:
 	add	x28, x21, :lo12:.LANCHOR0
 	ldr	x0, [x28,624]
 	ldrh	w0, [x0,10]
 	cmp	w0, w19
-	bls	.L3597
+	bls	.L3598
 	add	x22, x20, 68
 	add	w26, w19, w25
 	mov	x0, x24
@@ -22482,7 +22496,7 @@ id_block_prog_msb_ff_data:
 	bl	printk
 	ldrh	w0, [x22,w19,sxtw 1]
 	cmp	w0, w27
-	bne	.L3597
+	bne	.L3598
 	ldr	x0, [x20,1192]
 	mov	w1, 255
 	mov	w2, 16384
@@ -22496,8 +22510,8 @@ id_block_prog_msb_ff_data:
 	ldrb	w4, [x4,9]
 	mov	x3, x2
 	bl	flash_prog_page
-	b	.L3601
-.L3597:
+	b	.L3602
+.L3598:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22530,17 +22544,17 @@ write_idblock:
 	bl	ftl_malloc
 	mov	x23, x0
 	mov	w0, -1
-	cbz	x23, .L3648
+	cbz	x23, .L3649
 	add	w19, w19, 511
 	lsr	w19, w19, 9
 	cmp	w19, 8
-	bls	.L3634
+	bls	.L3635
 	cmp	w19, 500
-	bhi	.L3648
-	b	.L3605
-.L3634:
+	bhi	.L3649
+	b	.L3606
+.L3635:
 	mov	w19, 8
-.L3605:
+.L3606:
 	mul	w20, w20, w21
 	add	x3, x26, 253952
 	mov	w2, 63999
@@ -22551,9 +22565,9 @@ write_idblock:
 	udiv	w0, w19, w0
 	str	w0, [x29,120]
 	mov	w0, 0
-.L3609:
+.L3610:
 	ldr	w1, [x3]
-	cbnz	w1, .L3606
+	cbnz	w1, .L3607
 	ldr	w1, [x26,w0,uxtw 2]
 	add	w0, w0, 1
 	cmp	w0, w4
@@ -22561,56 +22575,56 @@ write_idblock:
 	csel	w0, w0, wzr, cc
 	str	w1, [x3],-4
 	cmp	w2, 4096
-	bne	.L3609
-	b	.L3608
-.L3606:
-	adrp	x0, .LC281
-	add	x0, x0, :lo12:.LC281
-	bl	printk
-.L3608:
-	ldr	x1, [x29,128]
+	bne	.L3610
+	b	.L3609
+.L3607:
 	adrp	x0, .LC282
 	add	x0, x0, :lo12:.LC282
+	bl	printk
+.L3609:
+	ldr	x1, [x29,128]
+	adrp	x0, .LC283
+	add	x0, x0, :lo12:.LC283
 	mov	w2, 4
 	mov	w3, 5
 	mov	x21, 0
 	mov	w28, w21
 	bl	rknand_print_hex
-	adrp	x0, .LC283
+	adrp	x0, .LC284
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC283
+	add	x0, x0, :lo12:.LC284
 	mov	w2, w19
 	bl	printk
-.L3631:
+.L3632:
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	ldrb	w1, [x1,-102]
-	cbnz	w1, .L3610
+	cbnz	w1, .L3611
 	ldr	x1, [x29,128]
 	ldr	w2, [x29,152]
 	ldr	w1, [x1,x21,lsl 2]
 	mul	w20, w1, w2
-	cbz	w21, .L3611
+	cbz	w21, .L3612
 	ldr	w2, [x29,120]
 	cmp	w2, 1
-	bls	.L3611
+	bls	.L3612
 	sub	w0, w21, #1
 	ldr	x2, [x29,128]
 	ldr	w0, [x2,x0,lsl 2]
 	add	w0, w0, 1
 	cmp	w1, w0
-	bne	.L3611
-	b	.L3612
-.L3610:
+	bne	.L3612
+	b	.L3613
+.L3611:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x0, [x0,728]
 	add	x0, x0, x21, uxtw
 	ldrb	w20, [x0,32]
 	cmp	w20, 255
-	beq	.L3612
+	beq	.L3613
 	ldr	w0, [x29,152]
 	mul	w20, w20, w0
-.L3611:
+.L3612:
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x23
@@ -22629,12 +22643,12 @@ write_idblock:
 	bl	flash_erase_block
 	cmp	w19, w24
 	mov	w2, 1
-	bls	.L3613
+	bls	.L3614
 	mov	w0, 0
 	add	w1, w20, w24
 	bl	flash_erase_block
 	mov	w2, 2
-.L3613:
+.L3614:
 	add	x27, x22, :lo12:.LANCHOR0
 	ldr	x1, [x27,624]
 	ldrh	w0, [x1,10]
@@ -22649,10 +22663,10 @@ write_idblock:
 	sub	w0, w20, w0
 	str	w0, [x29,156]
 	cmp	w20, w0
-	bne	.L3638
+	bne	.L3639
 	ldrb	w0, [x27,516]
 	cmp	w0, 9
-	bne	.L3638
+	bne	.L3639
 	adrp	x0, .LANCHOR4
 	mov	w1, 0
 	add	x0, x0, :lo12:.LANCHOR4
@@ -22690,18 +22704,18 @@ write_idblock:
 	str	w0, [x3,8]
 	sub	w0, w19, #4
 	str	w0, [x29,144]
-	b	.L3614
-.L3638:
+	b	.L3615
+.L3639:
 	str	w19, [x29,144]
 	mov	x3, 0
-.L3614:
+.L3615:
 	str	x26, [x29,136]
 	mov	w24, 0
 	add	x27, x22, :lo12:.LANCHOR0
-.L3616:
+.L3617:
 	ldr	w0, [x29,112]
 	cmp	w24, w0
-	bcs	.L3657
+	bcs	.L3658
 	ldr	w0, [x29,124]
 	adrp	x2, .LANCHOR4
 	add	x2, x2, :lo12:.LANCHOR4
@@ -22711,34 +22725,34 @@ write_idblock:
 	add	w1, w4, 1
 	ldrb	w2, [x2,1264]
 	ldrh	w0, [x0,w1,sxtw 1]
-	cbz	w2, .L3618
+	cbz	w2, .L3619
 	ldrb	w6, [x27,1]
 	lsl	w0, w1, 1
 	cmp	w6, wzr
 	csel	w0, w0, w1, ne
-.L3618:
+.L3619:
 	ldrb	w1, [x27,516]
 	cmp	w1, 9
-	beq	.L3656
+	beq	.L3657
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-.L3656:
+.L3657:
 	str	w0, [x29,160]
 	mov	w0, 61424
 	str	w0, [x29,164]
 	add	x0, x27, 4
 	ldrh	w0, [x0,w4,sxtw 1]
-	cbnz	w2, .L3622
+	cbnz	w2, .L3623
 	mov	w4, w0
-	b	.L3623
-.L3622:
+	b	.L3624
+.L3623:
 	ldrb	w1, [x27,1]
 	lsl	w0, w4, 1
 	cmp	w1, wzr
 	csel	w4, w0, w4, ne
-.L3623:
+.L3624:
 	mul	w0, w4, w25
-	cbnz	x3, .L3624
+	cbnz	x3, .L3625
 	ldr	w1, [x29,156]
 	add	x2, x29, 160
 	str	x4, [x29,104]
@@ -22749,28 +22763,28 @@ write_idblock:
 	ldr	x4, [x29,104]
 	add	x0, x0, :lo12:.LANCHOR4
 	ldrb	w0, [x0,1264]
-	cbnz	w0, .L3625
+	cbnz	w0, .L3626
 	ldr	w1, [x29,156]
 	add	w2, w4, 1
 	udiv	w1, w1, w25
 	bl	id_block_prog_msb_ff_data
-.L3625:
+.L3626:
 	ldr	x0, [x29,136]
 	add	x0, x0, 2048
 	str	x0, [x29,136]
-	b	.L3626
-.L3624:
+	b	.L3627
+.L3625:
 	ldr	w1, [x29,156]
 	add	x2, x29, 160
 	add	w0, w0, w1
 	mov	x1, x3
 	bl	fw_flash_page_prog.constprop.28
-.L3626:
+.L3627:
 	add	w24, w24, 4
 	mov	x3, 0
 	uxth	w24, w24
-	b	.L3616
-.L3657:
+	b	.L3617
+.L3658:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x29,116]
 	mov	x2, x23
@@ -22781,15 +22795,15 @@ write_idblock:
 	ldr	w0, [x29,144]
 	mov	x1, 0
 	lsl	w0, w0, 7
-.L3628:
+.L3629:
 	cmp	w0, w1
-	bls	.L3658
+	bls	.L3659
 	ldr	w3, [x23,x1,lsl 2]
 	add	x1, x1, 1
 	add	x2, x26, x1, lsl 2
 	ldr	w2, [x2,-4]
 	cmp	w3, w2
-	beq	.L3628
+	beq	.L3629
 	mov	x0, x23
 	mov	w1, 0
 	mov	w2, 512
@@ -22797,21 +22811,21 @@ write_idblock:
 	mov	w1, w20
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L3612
-.L3658:
+	b	.L3613
+.L3659:
 	add	w28, w28, 1
 	cmp	w28, 5
-	bhi	.L3632
-.L3612:
+	bhi	.L3633
+.L3613:
 	add	x21, x21, 1
 	cmp	x21, 4
-	bne	.L3631
-.L3632:
+	bne	.L3632
+.L3633:
 	mov	x0, x23
 	bl	ftl_free
 	cmp	w28, wzr
 	csetm	w0, eq
-.L3648:
+.L3649:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x23, x24, [sp,48]
@@ -22829,17 +22843,17 @@ CRC_32:
 	mov	x5, x0
 	add	x3, x3, :lo12:.LANCHOR2
 	mov	w0, w2
-.L3660:
+.L3661:
 	cmp	w1, w2
-	bls	.L3662
+	bls	.L3663
 	ldrb	w4, [x5,x2]
-	add	x6, x3, 2296
+	add	x6, x3, 2360
 	add	x2, x2, 1
 	eor	w4, w4, w0, lsr 24
 	ldr	w4, [x6,w4,uxtw 2]
 	eor	w0, w4, w0, lsl 8
-	b	.L3660
-.L3662:
+	b	.L3661
+.L3663:
 	ret
 	.size	CRC_32, .-CRC_32
 	.align	2
@@ -22856,146 +22870,146 @@ rknand_sys_storage_ioctl:
 	stp	x21, x22, [sp,32]
 	mov	w19, w1
 	mov	x20, x2
-	beq	.L3665
+	beq	.L3666
 	mov	w0, 29187
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3666
+	bhi	.L3667
 	mov	w0, 25726
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3667
+	beq	.L3668
 	mov	w0, 25726
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3668
+	bhi	.L3669
 	mov	w0, 25601
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3669
+	beq	.L3670
 	mov	w0, 25601
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3670
+	bhi	.L3671
 	mov	w0, 25364
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bne	.L3727
+	bne	.L3728
 	bl	rknand_dev_flush
-	b	.L3761
-.L3670:
+	b	.L3762
+.L3671:
 	mov	w0, 25602
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3672
+	beq	.L3673
 	mov	w0, 25603
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3673
-	b	.L3727
-.L3668:
+	beq	.L3674
+	b	.L3728
+.L3669:
 	mov	w0, 27688
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3674
+	beq	.L3675
 	mov	w0, 27688
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3675
+	bhi	.L3676
 	mov	w0, 25727
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3676
-	b	.L3727
-.L3675:
+	beq	.L3677
+	b	.L3728
+.L3676:
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3674
+	beq	.L3675
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3674
-	b	.L3727
-.L3666:
+	beq	.L3675
+	b	.L3728
+.L3667:
 	mov	w0, 29267
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3677
+	beq	.L3678
 	mov	w0, 29267
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3678
+	bhi	.L3679
 	mov	w0, 29189
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3679
+	beq	.L3680
 	mov	w0, 29189
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bcc	.L3680
+	bcc	.L3681
 	mov	w0, 29210
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3681
+	beq	.L3682
 	mov	w0, 29266
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3682
-	b	.L3727
-.L3678:
+	beq	.L3683
+	b	.L3728
+.L3679:
 	mov	w0, 30225
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3683
+	beq	.L3684
 	mov	w0, 30225
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	bhi	.L3684
+	bhi	.L3685
 	mov	w0, 29268
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3685
+	beq	.L3686
 	mov	w0, 30224
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3686
-	b	.L3727
-.L3684:
+	beq	.L3687
+	b	.L3728
+.L3685:
 	mov	w0, 30226
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3686
+	beq	.L3687
 	mov	w0, 30227
 	movk	w0, 0x4004, lsl 16
 	cmp	w1, w0
-	beq	.L3683
-	b	.L3727
-.L3680:
-	adrp	x0, .LC284
-	add	x0, x0, :lo12:.LC284
+	beq	.L3684
+	b	.L3728
+.L3681:
+	adrp	x0, .LC285
+	add	x0, x0, :lo12:.LC285
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbnz	x0, .L3687
-.L3692:
+	cbnz	x0, .L3688
+.L3693:
 	mov	x0, -12
-	b	.L3664
-.L3687:
+	b	.L3665
+.L3688:
 	mov	x1, x20
 	mov	x2, 512
 	bl	rk_copy_from_user
-	cbnz	x0, .L3768
-	adrp	x0, .LC286
+	cbnz	x0, .L3769
+	adrp	x0, .LC287
 	ldr	w1, [x19]
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC286
+	add	x0, x0, :lo12:.LC287
 	bl	printk
 	ldr	w0, [x19,4]
 	str	w0, [x29,52]
 	cmp	w0, 8
-	bhi	.L3765
+	bhi	.L3766
 	bl	rknand_device_lock
 	ldr	w1, [x29,52]
 	mov	x2, x19
@@ -23007,106 +23021,106 @@ rknand_sys_storage_ioctl:
 	mov	x1, x19
 	ubfiz	x2, x2, 9, 23
 	bl	rk_copy_to_user
-	cbz	x0, .L3771
-	adrp	x0, .LC287
-	add	x0, x0, :lo12:.LC287
-.L3763:
+	cbz	x0, .L3772
+	adrp	x0, .LC288
+	add	x0, x0, :lo12:.LC288
+.L3764:
 	bl	printk
-.L3765:
-	mov	x0, x19
 .L3766:
+	mov	x0, x19
+.L3767:
 	bl	ftl_free
-.L3764:
+.L3765:
 	mov	x0, -14
-	b	.L3664
-.L3679:
-	adrp	x0, .LC288
-	add	x0, x0, :lo12:.LC288
+	b	.L3665
+.L3680:
+	adrp	x0, .LC289
+	add	x0, x0, :lo12:.LC289
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3692
+	cbz	x0, .L3693
 	mov	x1, x20
 	mov	x2, 4096
 	bl	rk_copy_from_user
-	cbnz	x0, .L3768
-	adrp	x0, .LC289
+	cbnz	x0, .L3769
+	adrp	x0, .LC290
 	ldr	w1, [x19]
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC289
+	add	x0, x0, :lo12:.LC290
 	bl	printk
 	adrp	x0, .LANCHOR7
 	add	x22, x0, :lo12:.LANCHOR7
 	mov	x20, x0
 	ldr	x21, [x22,-64]
-	cbnz	x21, .L3694
+	cbnz	x21, .L3695
 	mov	w0, 260096
 	bl	ftl_malloc
 	str	x0, [x22,-64]
-	cbz	x0, .L3765
+	cbz	x0, .L3766
 	mov	w1, w21
 	mov	x2, 260096
 	bl	memset
-.L3694:
+.L3695:
 	ldr	w2, [x19,4]
 	cmp	w2, 4088
-	bhi	.L3765
+	bhi	.L3766
 	ldr	w0, [x19]
 	mov	w1, 55296
 	movk	w1, 0x3, lsl 16
 	cmp	w0, w1
-	bhi	.L3765
+	bhi	.L3766
 	add	x20, x20, :lo12:.LANCHOR7
 	uxtw	x2, w2
 	ldr	x1, [x20,-64]
 	add	x0, x1, x0, uxtw
 	add	x1, x19, 8
 	bl	memcpy
-.L3771:
+.L3772:
 	mov	x0, x19
 	bl	ftl_free
-	b	.L3761
-.L3682:
-	adrp	x0, .LC290
-	add	x0, x0, :lo12:.LC290
+	b	.L3762
+.L3683:
+	adrp	x0, .LC291
+	add	x0, x0, :lo12:.LC291
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3692
+	cbz	x0, .L3693
 	mov	x1, x20
 	mov	x2, 28
 	bl	rk_copy_from_user
-	cbz	x0, .L3697
-.L3768:
-	adrp	x0, .LC285
-	add	x0, x0, :lo12:.LC285
-	b	.L3763
-.L3697:
+	cbz	x0, .L3698
+.L3769:
+	adrp	x0, .LC286
+	add	x0, x0, :lo12:.LC286
+	b	.L3764
+.L3698:
 	ldr	w1, [x19]
-	adrp	x0, .LC291
+	adrp	x0, .LC292
 	ldr	w2, [x19,4]
-	add	x0, x0, :lo12:.LC291
+	add	x0, x0, :lo12:.LC292
 	bl	printk
 	ldr	w1, [x19]
 	mov	w0, 59392
 	movk	w0, 0x3, lsl 16
 	cmp	w1, w0
-	bhi	.L3765
+	bhi	.L3766
 	adrp	x20, .LANCHOR7
 	add	x20, x20, :lo12:.LANCHOR7
 	ldr	x0, [x20,-64]
-	cbz	x0, .L3765
+	cbz	x0, .L3766
 	bl	CRC_32
 	ldr	w1, [x19,4]
 	cmp	w1, w0
-	beq	.L3700
+	beq	.L3701
 	mov	x0, x19
 	bl	ftl_free
 	mov	x0, -2
-	b	.L3664
-.L3700:
+	b	.L3665
+.L3701:
 	bl	rknand_device_lock
 	ldr	x1, [x20,-64]
 	add	x2, x19, 8
@@ -23116,39 +23130,39 @@ rknand_sys_storage_ioctl:
 	ldr	x0, [x20,-64]
 	bl	ftl_free
 	str	xzr, [x20,-64]
-	b	.L3771
-.L3681:
-	adrp	x0, .LC292
-	add	x0, x0, :lo12:.LC292
+	b	.L3772
+.L3682:
+	adrp	x0, .LC293
+	add	x0, x0, :lo12:.LC293
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3692
+	cbz	x0, .L3693
 	bl	ReadFlashInfo
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 11
-	b	.L3773
-.L3665:
-	adrp	x0, .LC293
-	add	x0, x0, :lo12:.LC293
+	b	.L3774
+.L3666:
+	adrp	x0, .LC294
+	add	x0, x0, :lo12:.LC294
 	bl	printk
 	bl	nand_blk_add_whole_disk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3692
+	cbz	x0, .L3693
 	mov	w1, 0
 	mov	w2, 64
 	bl	ftl_memset
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 64
-	b	.L3773
-.L3677:
-	adrp	x0, .LC294
-	add	x0, x0, :lo12:.LC294
+	b	.L3774
+.L3678:
+	adrp	x0, .LC295
+	add	x0, x0, :lo12:.LC295
 	bl	printk
 	adrp	x0, .LANCHOR7-56
 	add	x1, x29, 52
@@ -23157,18 +23171,18 @@ rknand_sys_storage_ioctl:
 	ldr	w0, [x0,20]
 	str	w0, [x29,52]
 	mov	x0, x20
-.L3756:
+.L3757:
 	bl	rk_copy_to_user
-	cbnz	x0, .L3764
-	b	.L3761
-.L3685:
-	adrp	x0, .LC295
-	add	x0, x0, :lo12:.LC295
+	cbnz	x0, .L3765
+	b	.L3762
+.L3686:
+	adrp	x0, .LC296
+	add	x0, x0, :lo12:.LC296
 	bl	printk
 	mov	w0, 4096
 	bl	ftl_malloc
 	mov	x21, x0
-	cbz	x0, .L3692
+	cbz	x0, .L3693
 	bl	rknand_device_lock
 	mov	w1, 264
 	mov	w2, 2
@@ -23179,41 +23193,41 @@ rknand_sys_storage_ioctl:
 	mov	x0, x20
 	mov	x1, x21
 	mov	x2, 1024
-.L3773:
+.L3774:
 	bl	rk_copy_to_user
 	mov	x19, x0
 	mov	x0, x21
-	cbnz	x19, .L3766
+	cbnz	x19, .L3767
 	bl	ftl_free
-	b	.L3691
-.L3669:
-	adrp	x0, .LC296
-	add	x0, x0, :lo12:.LC296
+	b	.L3692
+.L3670:
+	adrp	x0, .LC297
+	add	x0, x0, :lo12:.LC297
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
 	mov	x19, x0
-	cbz	x0, .L3705
-.L3710:
-	adrp	x0, .LC285
-	add	x0, x0, :lo12:.LC285
+	cbz	x0, .L3706
+.L3711:
+	adrp	x0, .LC286
+	add	x0, x0, :lo12:.LC286
 	bl	printk
-	b	.L3764
-.L3705:
+	b	.L3765
+.L3706:
 	ldr	w1, [x29,56]
 	mov	w0, 21060
 	movk	w0, 0x4b4d, lsl 16
 	cmp	w1, w0
-	beq	.L3706
-.L3707:
+	beq	.L3707
+.L3708:
 	mov	x19, -1
-	b	.L3691
-.L3706:
+	b	.L3692
+.L3707:
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3707
+	bhi	.L3708
 	adrp	x21, .LANCHOR7
 	add	x0, x29, 56
 	add	x21, x21, :lo12:.LANCHOR7
@@ -23224,37 +23238,37 @@ rknand_sys_storage_ioctl:
 	mov	w0, 5161
 	movk	w0, 0xc059, lsl 16
 	cmp	w1, w0
-	beq	.L3708
+	beq	.L3709
 	add	x0, x29, 120
 	mov	w1, w19
 	mov	x2, 128
 	str	w19, [x29,64]
 	str	w19, [x29,68]
 	bl	memset
-.L3708:
+.L3709:
 	add	x0, x29, 312
 	mov	w1, 0
 	mov	x2, 256
 	str	wzr, [x29,72]
 	bl	memset
-	b	.L3770
-.L3672:
-	adrp	x0, .LC297
-	add	x0, x0, :lo12:.LC297
+	b	.L3771
+.L3673:
+	adrp	x0, .LC298
+	add	x0, x0, :lo12:.LC298
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 21060
 	movk	w0, 0x4b4d, lsl 16
 	cmp	w1, w0
-	bne	.L3707
+	bne	.L3708
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3707
+	bhi	.L3708
 	adrp	x1, .LANCHOR7
 	mov	w2, 5161
 	add	x1, x1, :lo12:.LANCHOR7
@@ -23262,12 +23276,12 @@ rknand_sys_storage_ioctl:
 	mov	x0, -2
 	ldr	w3, [x1,-48]
 	cmp	w3, w2
-	bne	.L3664
+	bne	.L3665
 	ldr	w2, [x29,68]
 	mov	x0, -3
 	sub	w3, w2, #1
 	cmp	w3, 127
-	bhi	.L3664
+	bhi	.L3665
 	ldr	x19, [x1,-56]
 	add	x1, x29, 120
 	add	x0, x19, 64
@@ -23276,38 +23290,38 @@ rknand_sys_storage_ioctl:
 	bl	memcpy
 	mov	w0, 1
 	mov	x1, x19
-	b	.L3762
-.L3676:
-	adrp	x0, .LC298
-	add	x0, x0, :lo12:.LC298
+	b	.L3763
+.L3677:
+	adrp	x0, .LC299
+	add	x0, x0, :lo12:.LC299
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 17476
 	movk	w0, 0x4253, lsl 16
 	cmp	w1, w0
-	bne	.L3707
+	bne	.L3708
 	ldr	w0, [x29,60]
 	cmp	w0, 512
-	bhi	.L3707
+	bhi	.L3708
 	adrp	x19, .LANCHOR7
 	add	x0, x19, :lo12:.LANCHOR7
 	ldr	w1, [x0,-44]
-	cbnz	w1, .L3711
-.L3714:
+	cbnz	w1, .L3712
+.L3715:
 	mov	x0, 0
-	b	.L3664
-.L3711:
+	b	.L3665
+.L3712:
 	ldr	x1, [x0,-40]
 	mov	w2, 22867
 	movk	w2, 0x4453, lsl 16
 	ldr	w3, [x1]
 	cmp	w3, w2
-	beq	.L3712
+	beq	.L3713
 	mov	w2, 22867
 	movk	w2, 0x4453, lsl 16
 	str	w2, [x1]
@@ -23317,7 +23331,7 @@ rknand_sys_storage_ioctl:
 	ldr	x0, [x0,-40]
 	str	wzr, [x0,8]
 	str	wzr, [x0,12]
-.L3712:
+.L3713:
 	add	x20, x19, :lo12:.LANCHOR7
 	mov	w0, 0
 	ldr	x1, [x20,-40]
@@ -23328,7 +23342,7 @@ rknand_sys_storage_ioctl:
 	movk	w1, 0x4b4d, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	beq	.L3713
+	beq	.L3714
 	mov	w1, 21060
 	movk	w1, 0x4b4d, lsl 16
 	str	w1, [x0]
@@ -23337,7 +23351,7 @@ rknand_sys_storage_ioctl:
 	str	w1, [x0,4]
 	ldr	x0, [x20,-56]
 	str	wzr, [x0,8]
-.L3713:
+.L3714:
 	add	x19, x19, :lo12:.LANCHOR7
 	mov	w1, 0
 	mov	x2, 128
@@ -23350,35 +23364,35 @@ rknand_sys_storage_ioctl:
 	bl	StorageSysDataStore
 	str	wzr, [x19,-44]
 	str	wzr, [x19,-48]
-	b	.L3761
-.L3667:
-	adrp	x0, .LC299
-	add	x0, x0, :lo12:.LC299
+	b	.L3762
+.L3668:
+	adrp	x0, .LC300
+	add	x0, x0, :lo12:.LC300
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w2, [x29,56]
 	mov	w1, 20037
 	movk	w1, 0x4253, lsl 16
 	cmp	w2, w1
-	bne	.L3707
+	bne	.L3708
 	ldr	w1, [x29,60]
 	cmp	w1, 512
-	bhi	.L3707
+	bhi	.L3708
 	adrp	x19, .LANCHOR7
 	add	x1, x19, :lo12:.LANCHOR7
 	ldr	w2, [x1,-44]
 	cmp	w2, 1
-	beq	.L3714
+	beq	.L3715
 	ldr	x2, [x1,-40]
 	mov	w3, 22867
 	movk	w3, 0x4453, lsl 16
 	ldr	w4, [x2]
 	cmp	w4, w3
-	beq	.L3715
+	beq	.L3716
 	mov	w3, 22867
 	movk	w3, 0x4453, lsl 16
 	str	w3, [x2]
@@ -23388,7 +23402,7 @@ rknand_sys_storage_ioctl:
 	ldr	x1, [x1,-40]
 	str	w0, [x1,8]
 	str	w0, [x1,12]
-.L3715:
+.L3716:
 	add	x20, x19, :lo12:.LANCHOR7
 	mov	w0, 1
 	ldr	x1, [x20,-40]
@@ -23400,7 +23414,7 @@ rknand_sys_storage_ioctl:
 	movk	w1, 0x4b4d, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	beq	.L3716
+	beq	.L3717
 	mov	w1, 21060
 	movk	w1, 0x4b4d, lsl 16
 	str	w1, [x0]
@@ -23409,7 +23423,7 @@ rknand_sys_storage_ioctl:
 	str	w1, [x0,4]
 	ldr	x0, [x20,-56]
 	str	wzr, [x0,8]
-.L3716:
+.L3717:
 	add	x19, x19, :lo12:.LANCHOR7
 	mov	w1, 0
 	mov	x2, 128
@@ -23422,66 +23436,66 @@ rknand_sys_storage_ioctl:
 	bl	StorageSysDataStore
 	mov	w0, 1
 	str	w0, [x19,-44]
-	b	.L3761
-.L3673:
-	adrp	x0, .LC300
-	add	x0, x0, :lo12:.LC300
+	b	.L3762
+.L3674:
+	adrp	x0, .LC301
+	add	x0, x0, :lo12:.LC301
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 20051
 	movk	w0, 0x4144, lsl 16
 	cmp	w1, w0
-	bne	.L3707
+	bne	.L3708
 	ldr	w2, [x29,60]
 	cmp	w2, 512
-	bhi	.L3707
+	bhi	.L3708
 	adrp	x1, .LANCHOR7
 	add	x0, x29, 64
 	add	x1, x1, :lo12:.LANCHOR7
 	uxtw	x2, w2
 	sub	x1, x1, #32
-	b	.L3769
-.L3674:
+	b	.L3770
+.L3675:
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3717
-	adrp	x0, .LC301
-	add	x0, x0, :lo12:.LC301
-	b	.L3759
-.L3717:
+	bne	.L3718
+	adrp	x0, .LC302
+	add	x0, x0, :lo12:.LC302
+	b	.L3760
+.L3718:
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3719
-	adrp	x0, .LC302
-	add	x0, x0, :lo12:.LC302
-	b	.L3759
-.L3719:
+	bne	.L3720
 	adrp	x0, .LC303
 	add	x0, x0, :lo12:.LC303
-.L3759:
+	b	.L3760
+.L3720:
+	adrp	x0, .LC304
+	add	x0, x0, :lo12:.LC304
+.L3760:
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 17227
 	movk	w0, 0x4c4f, lsl 16
 	cmp	w1, w0
-	bne	.L3764
+	bne	.L3765
 	mov	w0, 27708
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
 	adrp	x0, .LANCHOR7
-	bne	.L3720
+	bne	.L3721
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x1, x29, 56
 	mov	x2, 16
@@ -23491,65 +23505,65 @@ rknand_sys_storage_ioctl:
 	strb	w0, [x29,64]
 	mov	x0, x20
 	bl	rk_copy_to_user
-	cbz	x0, .L3664
-	b	.L3764
-.L3720:
+	cbz	x0, .L3665
+	b	.L3765
+.L3721:
 	add	x20, x0, :lo12:.LANCHOR7
 	ldr	w1, [x20,480]
 	cmp	w1, 10
-	bhi	.L3764
+	bhi	.L3765
 	ldr	x1, [x20,-56]
 	ldr	w2, [x29,60]
 	ldr	w3, [x1,24]
 	cmp	w3, w2
-	beq	.L3721
-	cbz	w3, .L3721
-	adrp	x0, .LC304
+	beq	.L3722
+	cbz	w3, .L3722
+	adrp	x0, .LC305
 	mov	w1, w2
-	add	x0, x0, :lo12:.LC304
+	add	x0, x0, :lo12:.LC305
 	bl	printk
 	ldr	w0, [x20,480]
 	add	w0, w0, 1
 	str	w0, [x20,480]
-	b	.L3764
-.L3721:
+	b	.L3765
+.L3722:
 	add	x0, x0, :lo12:.LANCHOR7
 	str	wzr, [x0,480]
 	mov	w0, 27698
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
-	bne	.L3722
+	bne	.L3723
 	str	wzr, [x1,20]
 	str	wzr, [x1,24]
-	b	.L3723
-.L3722:
+	b	.L3724
+.L3723:
 	mov	w0, 1
 	str	w2, [x1,24]
 	str	w0, [x1,20]
-.L3723:
+.L3724:
 	mov	w0, 1
 	mov	x19, -2
 	bl	StorageSysDataStore
 	cmn	w0, #1
-	bne	.L3761
-	b	.L3691
-.L3686:
-	adrp	x0, .LC305
-	add	x0, x0, :lo12:.LC305
+	bne	.L3762
+	b	.L3692
+.L3687:
+	adrp	x0, .LC306
+	add	x0, x0, :lo12:.LC306
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 17750
 	movk	w0, 0x444e, lsl 16
 	cmp	w1, w0
-	bne	.L3707
+	bne	.L3708
 	ldr	w2, [x29,60]
 	cmp	w2, 504
-	bhi	.L3707
+	bhi	.L3708
 	mov	w0, 30224
 	adrp	x1, .LANCHOR7
 	movk	w0, 0x4004, lsl 16
@@ -23557,72 +23571,72 @@ rknand_sys_storage_ioctl:
 	cmp	w19, w0
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x29, 64
-	bne	.L3724
+	bne	.L3725
 	ldr	x1, [x1,488]
-	b	.L3760
-.L3724:
+	b	.L3761
+.L3725:
 	ldr	x1, [x1,496]
-.L3760:
+.L3761:
 	add	x1, x1, 8
-.L3769:
-	bl	memcpy
 .L3770:
+	bl	memcpy
+.L3771:
 	mov	x0, x20
 	add	x1, x29, 56
 	mov	x2, 520
-	b	.L3756
-.L3683:
-	adrp	x0, .LC306
-	add	x0, x0, :lo12:.LC306
+	b	.L3757
+.L3684:
+	adrp	x0, .LC307
+	add	x0, x0, :lo12:.LC307
 	bl	printk
 	add	x0, x29, 56
 	mov	x1, x20
 	mov	x2, 520
 	bl	rk_copy_from_user
-	cbnz	x0, .L3710
+	cbnz	x0, .L3711
 	ldr	w1, [x29,56]
 	mov	w0, 17750
 	movk	w0, 0x444e, lsl 16
 	cmp	w1, w0
-	bne	.L3707
+	bne	.L3708
 	ldr	w2, [x29,60]
 	cmp	w2, 504
-	bhi	.L3707
+	bhi	.L3708
 	mov	w0, 30225
 	add	w2, w2, 8
 	movk	w0, 0x4004, lsl 16
 	cmp	w19, w0
 	adrp	x19, .LANCHOR7
 	add	x19, x19, :lo12:.LANCHOR7
-	bne	.L3726
+	bne	.L3727
 	ldr	x0, [x19,488]
 	add	x1, x29, 56
 	bl	memcpy
 	mov	w0, 2
 	ldr	x1, [x19,488]
-	b	.L3762
-.L3726:
+	b	.L3763
+.L3727:
 	ldr	x0, [x19,496]
 	add	x1, x29, 56
 	bl	memcpy
 	ldr	x1, [x19,496]
 	mov	w0, 3
-.L3762:
+.L3763:
 	bl	StorageSysDataStore
 	uxtw	x19, w0
-	b	.L3691
-.L3761:
+	b	.L3692
+.L3762:
 	mov	x19, 0
-.L3691:
-	adrp	x0, .LC307
+.L3692:
+	adrp	x0, .LC308
 	mov	x1, x19
-	add	x0, x0, :lo12:.LC307
+	add	x0, x0, :lo12:.LC308
 	bl	printk
 	mov	x0, x19
-	b	.L3664
-.L3727:
+	b	.L3665
+.L3728:
 	mov	x0, -22
-.L3664:
+.L3665:
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
 	ldp	x29, x30, [sp], 48
@@ -23657,25 +23671,25 @@ rk_ftl_storage_sys_init:
 	ldr	w0, [x21,16]
 	ldr	w22, [x21,508]
 	str	w0, [x19,-44]
-	cbz	w22, .L3776
+	cbz	w22, .L3777
 	mov	x0, x21
 	mov	w1, 508
 	bl	js_hash
 	cmp	w22, w0
-	beq	.L3776
-	adrp	x0, .LC308
+	beq	.L3777
+	adrp	x0, .LC309
 	str	wzr, [x21,16]
-	add	x0, x0, :lo12:.LC308
+	add	x0, x0, :lo12:.LC309
 	str	wzr, [x19,-44]
 	bl	printk
-.L3776:
+.L3777:
 	add	x0, x20, :lo12:.LANCHOR7
 	ldr	w1, [x0,-44]
-	cbz	w1, .L3777
+	cbz	w1, .L3778
 	mov	w1, 5161
 	movk	w1, 0xc059, lsl 16
 	str	w1, [x0,-48]
-.L3777:
+.L3778:
 	add	x20, x20, :lo12:.LANCHOR7
 	mov	w0, 2
 	ldr	x1, [x20,488]
@@ -23711,19 +23725,19 @@ rk_ftl_vendor_storage_init:
 	add	x1, x21, :lo12:.LANCHOR7
 	mov	w19, -12
 	str	x0, [x1,504]
-	cbz	x0, .L3786
+	cbz	x0, .L3787
 	mov	w23, 0
-	adrp	x24, .LC309
+	adrp	x24, .LC310
 	mov	w19, w23
 	mov	w22, w23
-	add	x24, x24, :lo12:.LC309
-.L3790:
+	add	x24, x24, :lo12:.LC310
+.L3791:
 	add	x20, x21, :lo12:.LANCHOR7
 	lsl	w0, w22, 7
 	mov	w1, 128
 	ldr	x2, [x20,504]
 	bl	FlashBootVendorRead
-	cbnz	w0, .L3787
+	cbnz	w0, .L3788
 	ldr	x3, [x20,504]
 	mov	x0, x24
 	add	x2, x3, 61440
@@ -23736,29 +23750,29 @@ rk_ftl_vendor_storage_init:
 	movk	w0, 0x524b, lsl 16
 	ldr	w1, [x20]
 	cmp	w1, w0
-	bne	.L3788
+	bne	.L3789
 	ldr	w0, [x20,4]
 	cmp	w19, w0
-	bcs	.L3788
+	bcs	.L3789
 	add	x1, x20, 61440
 	ldr	w1, [x1,4092]
 	cmp	w1, w0
 	csel	w23, w23, w22, ne
 	csel	w19, w19, w0, ne
-.L3788:
-	cbnz	w22, .L3798
+.L3789:
+	cbnz	w22, .L3799
 	mov	w22, 1
-	b	.L3790
-.L3798:
-	cbz	w19, .L3791
+	b	.L3791
+.L3799:
+	cbz	w19, .L3792
 	lsl	w0, w23, 7
 	mov	w1, 128
 	mov	x2, x20
 	bl	FlashBootVendorRead
 	mov	w19, w0
-	cbz	w0, .L3786
-	b	.L3787
-.L3791:
+	cbz	w0, .L3787
+	b	.L3788
+.L3792:
 	mov	x0, x20
 	mov	w1, w19
 	mov	x2, 65536
@@ -23772,14 +23786,14 @@ rk_ftl_vendor_storage_init:
 	mov	w0, -1032
 	strh	w19, [x20,12]
 	strh	w0, [x20,14]
-	b	.L3786
-.L3787:
+	b	.L3787
+.L3788:
 	add	x21, x21, :lo12:.LANCHOR7
 	mov	w19, -1
 	ldr	x0, [x21,504]
 	bl	kfree
 	str	xzr, [x21,504]
-.L3786:
+.L3787:
 	mov	w0, w19
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -23797,18 +23811,18 @@ rk_ftl_vendor_read:
 	ldr	x5, [x3,#:lo12:.LANCHOR7+504]
 	mov	w3, -1
 	str	x19, [sp,16]
-	cbz	x5, .L3800
+	cbz	x5, .L3801
 	ldrh	w3, [x5,10]
 	mov	x4, 0
-.L3801:
+.L3802:
 	cmp	w4, w3
 	mov	w6, w4
-	bcs	.L3805
+	bcs	.L3806
 	add	x7, x5, x4, lsl 3
 	add	x4, x4, 1
 	ldrh	w7, [x7,16]
 	cmp	w7, w0
-	bne	.L3801
+	bne	.L3802
 	add	x6, x5, x6, uxtw 3
 	ldrh	w4, [x6,20]
 	mov	x0, x1
@@ -23820,10 +23834,10 @@ rk_ftl_vendor_read:
 	uxtw	x2, w19
 	bl	memcpy
 	mov	w3, w19
-	b	.L3800
-.L3805:
+	b	.L3801
+.L3806:
 	mov	w3, -1
-.L3800:
+.L3801:
 	mov	w0, w3
 	ldr	x19, [sp,16]
 	ldp	x29, x30, [sp], 32
@@ -23846,38 +23860,38 @@ rk_ftl_vendor_write:
 	mov	w26, w2
 	mov	x28, x1
 	mov	w2, -1
-	cbz	x19, .L3807
+	cbz	x19, .L3808
 	add	w20, w26, 63
 	ldrh	w3, [x19,10]
 	ldrh	w23, [x19,8]
 	and	w20, w20, -64
 	mov	x2, 0
-.L3808:
+.L3809:
 	cmp	w2, w3
 	mov	w4, w2
-	bcs	.L3823
+	bcs	.L3824
 	add	x0, x19, x2, lsl 3
 	add	x2, x2, 1
 	ldrh	w0, [x0,16]
 	cmp	w0, w6
-	bne	.L3808
+	bne	.L3809
 	add	x21, x19, x4, uxtw 3
 	ldrh	w24, [x21,20]
 	add	x5, x19, 1024
 	add	w24, w24, 63
 	and	w24, w24, -64
 	cmp	w26, w24
-	bls	.L3809
+	bls	.L3810
 	ldrh	w0, [x19,14]
 	mov	w2, -1
 	cmp	w0, w20
-	bcc	.L3807
+	bcc	.L3808
 	ldrh	w21, [x21,18]
 	add	w22, w3, w2
-.L3810:
+.L3811:
 	cmp	w4, w22
 	uxtw	x3, w4
-	bcs	.L3824
+	bcs	.L3825
 	add	x3, x19, x3, lsl 3
 	add	w25, w4, 1
 	add	x1, x19, x25, uxtw 3
@@ -23900,8 +23914,8 @@ rk_ftl_vendor_write:
 	mov	w4, w25
 	ldr	x6, [x29,96]
 	ldr	x5, [x29,104]
-	b	.L3810
-.L3824:
+	b	.L3811
+.L3825:
 	add	x3, x19, x3, lsl 3
 	uxth	w21, w21
 	mov	x1, x28
@@ -23918,20 +23932,20 @@ rk_ftl_vendor_write:
 	add	w24, w24, w0
 	sub	w24, w24, w20
 	strh	w24, [x19,14]
-	b	.L3822
-.L3809:
+	b	.L3823
+.L3810:
 	ldrh	w0, [x21,18]
 	mov	x1, x28
 	uxtw	x2, w26
 	add	x0, x5, x0
 	bl	memcpy
 	strh	w26, [x21,20]
-	b	.L3822
-.L3823:
+	b	.L3823
+.L3824:
 	ldrh	w4, [x19,14]
 	mov	w2, -1
 	cmp	w4, w20
-	bcc	.L3807
+	bcc	.L3808
 	add	x3, x19, x3, uxth 3
 	strh	w6, [x3,16]
 	uxth	w20, w20
@@ -23951,7 +23965,7 @@ rk_ftl_vendor_write:
 	ldrh	w0, [x19,10]
 	add	w0, w0, 1
 	strh	w0, [x19,10]
-.L3822:
+.L3823:
 	ldr	w0, [x19,4]
 	add	x1, x19, 61440
 	mov	x2, x19
@@ -23968,7 +23982,7 @@ rk_ftl_vendor_write:
 	lsl	w0, w23, 7
 	bl	FlashBootVendorWrite
 	mov	w2, 0
-.L3807:
+.L3808:
 	mov	w0, w2
 	ldp	x19, x20, [sp,16]
 	ldp	x21, x22, [sp,32]
@@ -23992,37 +24006,37 @@ rk_ftl_vendor_storage_ioctl:
 	mov	x21, x2
 	bl	ftl_malloc
 	mov	x19, x0
-	cbz	x0, .L3826
+	cbz	x0, .L3827
 	mov	w2, 30209
 	ldr	x1, [x29,56]
 	movk	w2, 0x4004, lsl 16
 	cmp	w1, w2
-	beq	.L3828
+	beq	.L3829
 	mov	w2, 30210
 	movk	w2, 0x4004, lsl 16
 	cmp	w1, w2
-	beq	.L3829
-	b	.L3840
-.L3828:
+	beq	.L3830
+	b	.L3841
+.L3829:
 	mov	x1, x21
 	mov	x2, 8
 	bl	rk_copy_from_user
-	cbnz	x0, .L3840
+	cbnz	x0, .L3841
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	beq	.L3831
-.L3832:
+	beq	.L3832
+.L3833:
 	mov	x20, -1
-	b	.L3827
-.L3831:
+	b	.L3828
+.L3832:
 	ldrh	w0, [x19,4]
 	add	x1, x19, 8
 	ldrh	w2, [x19,6]
 	bl	rk_ftl_vendor_read
 	cmn	w0, #1
-	beq	.L3832
+	beq	.L3833
 	uxth	x2, w0
 	strh	w0, [x19,6]
 	mov	x1, x19
@@ -24032,38 +24046,38 @@ rk_ftl_vendor_storage_ioctl:
 	bl	rk_copy_to_user
 	cmp	x0, xzr
 	csel	x20, xzr, x20, eq
-	b	.L3827
-.L3829:
+	b	.L3828
+.L3830:
 	mov	x1, x21
 	mov	x2, 8
 	bl	rk_copy_from_user
-	cbnz	x0, .L3840
+	cbnz	x0, .L3841
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	bne	.L3832
+	bne	.L3833
 	ldrh	w3, [x19,6]
 	cmp	w3, 4087
-	bhi	.L3832
+	bhi	.L3833
 	add	w2, w3, 8
 	mov	x0, x19
 	mov	x1, x21
 	sxtw	x2, w2
 	bl	rk_copy_from_user
-	cbnz	x0, .L3840
+	cbnz	x0, .L3841
 	ldrh	w0, [x19,4]
 	add	x1, x19, 8
 	ldrh	w2, [x19,6]
 	bl	rk_ftl_vendor_write
 	sxtw	x20, w0
-	b	.L3827
-.L3840:
+	b	.L3828
+.L3841:
 	mov	x20, -14
-.L3827:
+.L3828:
 	mov	x0, x19
 	bl	kfree
-.L3826:
+.L3827:
 	mov	x0, x20
 	ldr	x21, [sp,32]
 	ldp	x19, x20, [sp,16]
@@ -24242,24 +24256,24 @@ rk_ftl_vendor_storage_ioctl:
 	.section	.rodata
 	.align	3
 .LANCHOR1 = . + 0
-	.type	__func__.33878, %object
-	.size	__func__.33878, 18
-__func__.33878:
+	.type	__func__.33888, %object
+	.size	__func__.33888, 18
+__func__.33888:
 	.string	"_list_remove_node"
 	.zero	6
-	.type	__func__.33903, %object
-	.size	__func__.33903, 23
-__func__.33903:
+	.type	__func__.33913, %object
+	.size	__func__.33913, 23
+__func__.33913:
 	.string	"_list_update_data_list"
 	.zero	1
-	.type	__func__.18927, %object
-	.size	__func__.18927, 22
-__func__.18927:
+	.type	__func__.18934, %object
+	.size	__func__.18934, 22
+__func__.18934:
 	.string	"nand_flash_print_info"
 	.zero	2
-	.type	__func__.19012, %object
-	.size	__func__.19012, 11
-__func__.19012:
+	.type	__func__.19019, %object
+	.size	__func__.19019, 11
+__func__.19019:
 	.string	"nandc_init"
 	.zero	5
 	.type	toshiba_A19ref_value, %object
@@ -24421,9 +24435,9 @@ toshiba_ref_value:
 	.byte	8
 	.byte	12
 	.byte	112
-	.type	__func__.18515, %object
-	.size	__func__.18515, 28
-__func__.18515:
+	.type	__func__.18522, %object
+	.size	__func__.18522, 28
+__func__.18522:
 	.string	"flash_wait_device_ready_raw"
 	.zero	4
 	.type	toshiba_3D_tlc_value, %object
@@ -24844,24 +24858,24 @@ toshiba_3D_slc_value:
 	.byte	-56
 	.byte	56
 	.zero	5
-	.type	__func__.18568, %object
-	.size	__func__.18568, 22
-__func__.18568:
+	.type	__func__.18575, %object
+	.size	__func__.18575, 22
+__func__.18575:
 	.string	"flash_start_page_read"
 	.zero	2
-	.type	__func__.18593, %object
-	.size	__func__.18593, 23
-__func__.18593:
+	.type	__func__.18600, %object
+	.size	__func__.18600, 23
+__func__.18600:
 	.string	"flash_start_plane_read"
 	.zero	1
-	.type	__func__.18490, %object
-	.size	__func__.18490, 26
-__func__.18490:
+	.type	__func__.18497, %object
+	.size	__func__.18497, 26
+__func__.18497:
 	.string	"flash_erase_duplane_block"
 	.zero	6
-	.type	__func__.18501, %object
-	.size	__func__.18501, 21
-__func__.18501:
+	.type	__func__.18508, %object
+	.size	__func__.18508, 21
+__func__.18508:
 	.string	"flash_erase_block_en"
 	.zero	3
 	.type	random_seed, %object
@@ -24995,19 +25009,19 @@ random_seed:
 	.hword	28406
 	.hword	17598
 	.hword	28087
-	.type	__func__.19182, %object
-	.size	__func__.19182, 13
-__func__.19182:
+	.type	__func__.19189, %object
+	.size	__func__.19189, 13
+__func__.19189:
 	.string	"buf_add_tail"
 	.zero	3
-	.type	__func__.19195, %object
-	.size	__func__.19195, 10
-__func__.19195:
+	.type	__func__.19202, %object
+	.size	__func__.19202, 10
+__func__.19202:
 	.string	"buf_alloc"
 	.zero	6
-	.type	__func__.19209, %object
-	.size	__func__.19209, 16
-__func__.19209:
+	.type	__func__.19216, %object
+	.size	__func__.19216, 16
+__func__.19216:
 	.string	"buf_remove_free"
 	.type	zftl_debug_proc_fops, %object
 	.size	zftl_debug_proc_fops, 216
@@ -25021,249 +25035,249 @@ zftl_debug_proc_fops:
 	.zero	8
 	.xword	single_release
 	.zero	104
-	.type	__func__.33472, %object
-	.size	__func__.33472, 12
-__func__.33472:
+	.type	__func__.33482, %object
+	.size	__func__.33482, 12
+__func__.33482:
 	.string	"gc_add_sblk"
 	.zero	4
-	.type	__func__.33540, %object
-	.size	__func__.33540, 19
-__func__.33540:
+	.type	__func__.33550, %object
+	.size	__func__.33550, 19
+__func__.33550:
 	.string	"gc_write_completed"
 	.zero	5
-	.type	__func__.33591, %object
-	.size	__func__.33591, 16
-__func__.33591:
+	.type	__func__.33601, %object
+	.size	__func__.33601, 16
+__func__.33601:
 	.string	"gc_free_src_blk"
-	.type	__func__.34084, %object
-	.size	__func__.34084, 18
-__func__.34084:
-	.string	"ftl_alloc_sys_blk"
-	.zero	6
 	.type	__func__.34094, %object
-	.size	__func__.34094, 17
+	.size	__func__.34094, 18
 __func__.34094:
+	.string	"ftl_alloc_sys_blk"
+	.zero	6
+	.type	__func__.34104, %object
+	.size	__func__.34104, 17
+__func__.34104:
 	.string	"ftl_free_sys_blk"
 	.zero	7
-	.type	__func__.34198, %object
-	.size	__func__.34198, 23
-__func__.34198:
+	.type	__func__.34208, %object
+	.size	__func__.34208, 23
+__func__.34208:
 	.string	"ftl_get_ppa_from_index"
 	.zero	1
-	.type	__func__.34237, %object
-	.size	__func__.34237, 22
-__func__.34237:
+	.type	__func__.34247, %object
+	.size	__func__.34247, 22
+__func__.34247:
 	.string	"ftl_get_new_free_page"
 	.zero	2
-	.type	__func__.34248, %object
-	.size	__func__.34248, 22
-__func__.34248:
+	.type	__func__.34258, %object
+	.size	__func__.34258, 22
+__func__.34258:
 	.string	"ftl_ext_alloc_new_blk"
 	.zero	2
-	.type	__func__.33254, %object
-	.size	__func__.33254, 14
-__func__.33254:
+	.type	__func__.33264, %object
+	.size	__func__.33264, 14
+__func__.33264:
 	.string	"ftl_write_buf"
 	.zero	2
-	.type	__func__.33298, %object
-	.size	__func__.33298, 18
-__func__.33298:
+	.type	__func__.33308, %object
+	.size	__func__.33308, 18
+__func__.33308:
 	.string	"zftl_add_read_buf"
 	.zero	6
-	.type	__func__.34043, %object
-	.size	__func__.34043, 15
-__func__.34043:
+	.type	__func__.34053, %object
+	.size	__func__.34053, 15
+__func__.34053:
 	.string	"ftl_alloc_sblk"
 	.align	3
 .LANCHOR3 = . + 0
-	.type	__func__.34595, %object
-	.size	__func__.34595, 17
-__func__.34595:
+	.type	__func__.34605, %object
+	.size	__func__.34605, 17
+__func__.34605:
 	.string	"pm_alloc_new_blk"
 	.zero	7
-	.type	__func__.34623, %object
-	.size	__func__.34623, 21
-__func__.34623:
+	.type	__func__.34633, %object
+	.size	__func__.34633, 21
+__func__.34633:
 	.string	"pm_select_ram_region"
 	.zero	3
-	.type	__func__.18917, %object
-	.size	__func__.18917, 20
-__func__.18917:
+	.type	__func__.18924, %object
+	.size	__func__.18924, 20
+__func__.18924:
 	.string	"flash_die_info_init"
 	.zero	4
-	.type	__func__.33189, %object
-	.size	__func__.33189, 17
-__func__.33189:
+	.type	__func__.33199, %object
+	.size	__func__.33199, 17
+__func__.33199:
 	.string	"lpa_rebuild_hash"
 	.zero	7
-	.type	__func__.34559, %object
-	.size	__func__.34559, 13
-__func__.34559:
+	.type	__func__.34569, %object
+	.size	__func__.34569, 13
+__func__.34569:
 	.string	"pm_free_sblk"
 	.zero	3
-	.type	__func__.19232, %object
-	.size	__func__.19232, 21
-__func__.19232:
-	.string	"flash_into_data_init"
+	.type	__func__.19239, %object
+	.size	__func__.19239, 21
+__func__.19239:
+	.string	"flash_info_data_init"
 	.zero	3
-	.type	__func__.18446, %object
-	.size	__func__.18446, 19
-__func__.18446:
+	.type	__func__.18453, %object
+	.size	__func__.18453, 19
+__func__.18453:
 	.string	"flash_read_page_en"
 	.zero	5
-	.type	__func__.19221, %object
-	.size	__func__.19221, 20
-__func__.19221:
+	.type	__func__.19228, %object
+	.size	__func__.19228, 20
+__func__.19228:
 	.string	"flash_info_blk_init"
 	.zero	4
-	.type	__func__.18581, %object
-	.size	__func__.18581, 31
-__func__.18581:
+	.type	__func__.18588, %object
+	.size	__func__.18588, 31
+__func__.18588:
 	.string	"flash_complete_plane_page_read"
 	.zero	1
-	.type	__func__.18606, %object
-	.size	__func__.18606, 25
-__func__.18606:
+	.type	__func__.18613, %object
+	.size	__func__.18613, 25
+__func__.18613:
 	.string	"flash_complete_page_read"
 	.zero	7
-	.type	__func__.34426, %object
-	.size	__func__.34426, 31
-__func__.34426:
+	.type	__func__.34436, %object
+	.size	__func__.34436, 31
+__func__.34436:
 	.string	"queue_wait_first_req_completed"
 	.zero	1
-	.type	__func__.34506, %object
-	.size	__func__.34506, 15
-__func__.34506:
+	.type	__func__.34516, %object
+	.size	__func__.34516, 15
+__func__.34516:
 	.string	"sblk_read_page"
 	.zero	1
-	.type	__func__.18539, %object
-	.size	__func__.18539, 26
-__func__.18539:
+	.type	__func__.18546, %object
+	.size	__func__.18546, 26
+__func__.18546:
 	.string	"flash_start_tlc_page_prog"
 	.zero	6
-	.type	__func__.18557, %object
-	.size	__func__.18557, 22
-__func__.18557:
+	.type	__func__.18564, %object
+	.size	__func__.18564, 22
+__func__.18564:
 	.string	"flash_start_page_prog"
 	.zero	2
-	.type	__func__.34479, %object
-	.size	__func__.34479, 15
-__func__.34479:
+	.type	__func__.34489, %object
+	.size	__func__.34489, 15
+__func__.34489:
 	.string	"sblk_prog_page"
 	.zero	1
-	.type	__func__.18475, %object
-	.size	__func__.18475, 19
-__func__.18475:
+	.type	__func__.18482, %object
+	.size	__func__.18482, 19
+__func__.18482:
 	.string	"flash_prog_page_en"
 	.zero	5
-	.type	__func__.34309, %object
-	.size	__func__.34309, 14
-__func__.34309:
+	.type	__func__.34319, %object
+	.size	__func__.34319, 14
+__func__.34319:
 	.string	"ftl_prog_page"
 	.zero	2
-	.type	__func__.34011, %object
-	.size	__func__.34011, 15
-__func__.34011:
+	.type	__func__.34021, %object
+	.size	__func__.34021, 15
+__func__.34021:
 	.string	"ftl_info_flush"
 	.zero	1
-	.type	__func__.34273, %object
-	.size	__func__.34273, 19
-__func__.34273:
+	.type	__func__.34283, %object
+	.size	__func__.34283, 19
+__func__.34283:
 	.string	"ftl_ext_info_flush"
 	.zero	5
-	.type	__func__.34285, %object
-	.size	__func__.34285, 18
-__func__.34285:
+	.type	__func__.34295, %object
+	.size	__func__.34295, 18
+__func__.34295:
 	.string	"ftl_ext_info_init"
 	.zero	6
-	.type	__func__.34172, %object
-	.size	__func__.34172, 23
-__func__.34172:
+	.type	__func__.34182, %object
+	.size	__func__.34182, 23
+__func__.34182:
 	.string	"ftl_open_sblk_recovery"
 	.zero	1
-	.type	__func__.34605, %object
-	.size	__func__.34605, 14
-__func__.34605:
+	.type	__func__.34615, %object
+	.size	__func__.34615, 14
+__func__.34615:
 	.string	"pm_write_page"
 	.zero	2
-	.type	__func__.19254, %object
-	.size	__func__.19254, 17
-__func__.19254:
+	.type	__func__.19261, %object
+	.size	__func__.19261, 17
+__func__.19261:
 	.string	"flash_info_flush"
 	.zero	7
-	.type	__func__.18971, %object
-	.size	__func__.18971, 16
-__func__.18971:
+	.type	__func__.18978, %object
+	.size	__func__.18978, 16
+__func__.18978:
 	.string	"nand_flash_init"
-	.type	__func__.34153, %object
-	.size	__func__.34153, 16
-__func__.34153:
+	.type	__func__.34163, %object
+	.size	__func__.34163, 16
+__func__.34163:
 	.string	"ftl_sysblk_dump"
-	.type	__func__.34545, %object
-	.size	__func__.34545, 16
-__func__.34545:
+	.type	__func__.34555, %object
+	.size	__func__.34555, 16
+__func__.34555:
 	.string	"load_l2p_region"
-	.type	__func__.34579, %object
-	.size	__func__.34579, 6
-__func__.34579:
+	.type	__func__.34589, %object
+	.size	__func__.34589, 6
+__func__.34589:
 	.string	"pm_gc"
 	.zero	2
-	.type	__func__.33527, %object
-	.size	__func__.33527, 22
-__func__.33527:
+	.type	__func__.33537, %object
+	.size	__func__.33537, 22
+__func__.33537:
 	.string	"gc_update_l2p_map_new"
 	.zero	2
-	.type	__func__.33636, %object
-	.size	__func__.33636, 16
-__func__.33636:
+	.type	__func__.33646, %object
+	.size	__func__.33646, 16
+__func__.33646:
 	.string	"gc_scan_src_blk"
-	.type	__func__.33694, %object
-	.size	__func__.33694, 20
-__func__.33694:
+	.type	__func__.33704, %object
+	.size	__func__.33704, 20
+__func__.33704:
 	.string	"gc_scan_static_data"
 	.zero	4
-	.type	__func__.33757, %object
-	.size	__func__.33757, 18
-__func__.33757:
+	.type	__func__.33767, %object
+	.size	__func__.33767, 18
+__func__.33767:
 	.string	"gc_block_vpn_scan"
 	.zero	6
-	.type	__func__.34129, %object
-	.size	__func__.34129, 14
-__func__.34129:
+	.type	__func__.34139, %object
+	.size	__func__.34139, 14
+__func__.34139:
 	.string	"ftl_sblk_dump"
 	.zero	2
-	.type	__func__.33331, %object
-	.size	__func__.33331, 10
-__func__.33331:
+	.type	__func__.33341, %object
+	.size	__func__.33341, 10
+__func__.33341:
 	.string	"zftl_read"
 	.zero	6
-	.type	__func__.33493, %object
-	.size	__func__.33493, 21
-__func__.33493:
+	.type	__func__.33503, %object
+	.size	__func__.33503, 21
+__func__.33503:
 	.string	"gc_check_data_one_wl"
 	.zero	3
-	.type	__func__.34219, %object
-	.size	__func__.34219, 19
-__func__.34219:
+	.type	__func__.34229, %object
+	.size	__func__.34229, 19
+__func__.34229:
 	.string	"ftl_update_l2p_map"
 	.zero	5
-	.type	__func__.33236, %object
-	.size	__func__.33236, 17
-__func__.33236:
+	.type	__func__.33246, %object
+	.size	__func__.33246, 17
+__func__.33246:
 	.string	"ftl_write_commit"
 	.zero	7
-	.type	__func__.33569, %object
-	.size	__func__.33569, 16
-__func__.33569:
+	.type	__func__.33579, %object
+	.size	__func__.33579, 16
+__func__.33579:
 	.string	"gc_do_copy_back"
-	.type	__func__.33785, %object
-	.size	__func__.33785, 11
-__func__.33785:
+	.type	__func__.33795, %object
+	.size	__func__.33795, 11
+__func__.33795:
 	.string	"zftl_do_gc"
 	.zero	5
-	.type	__func__.33362, %object
-	.size	__func__.33362, 13
-__func__.33362:
+	.type	__func__.33372, %object
+	.size	__func__.33372, 13
+__func__.33372:
 	.string	"_ftl_discard"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
@@ -25271,7 +25285,7 @@ __func__.33362:
 .LC1:
 	.string	"%s\n"
 .LC2:
-	.string	"FTL version: 6.0.9 20180704"
+	.string	"FTL version: 6.0.11 20180718"
 .LC3:
 	.string	"zftl_debug:0x%x\n"
 .LC4:
@@ -25587,304 +25601,306 @@ __func__.33362:
 .LC159:
 	.string	"read: %x %x %x %x\n"
 .LC160:
-	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
 .LC161:
-	.string	"flash_prog_page %x %x %x\n"
+	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
 .LC162:
-	.string	"flash_prog_page page_addr = %x status = %x\n"
+	.string	"flash_prog_page %x %x %x\n"
 .LC163:
-	.string	"sblk_prog_page ppa = %x, count = %d\n"
+	.string	"flash_prog_page page_addr = %x status = %x\n"
 .LC164:
-	.string	"flash_prog_page_en:%x %x\n"
+	.string	"sblk_prog_page ppa = %x, count = %d\n"
 .LC165:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC166:
-	.string	"data"
+	.string	"spare"
 .LC167:
-	.string	"write error: %x\n"
+	.string	"data"
 .LC168:
-	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.string	"write error: %x\n"
 .LC169:
-	.string	"%d %x @%d %x\n"
+	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 .LC170:
-	.string	"ftl_info_blk_init %d %d %x\n"
+	.string	"%d %x @%d %x\n"
 .LC171:
-	.string	"%s %d %d %x %x\n"
+	.string	"ftl_info_blk_init %d %d %x\n"
 .LC172:
-	.string	"saved_active_page  = %x\n"
+	.string	"%s %d %d %x %x\n"
 .LC173:
-	.string	"saved_active_plane = %x\n"
+	.string	"saved_active_page  = %x\n"
 .LC174:
-	.string	"sblk = %x\n"
+	.string	"saved_active_plane = %x\n"
 .LC175:
-	.string	"phy_blk = %x %x\n"
+	.string	"sblk = %x\n"
 .LC176:
-	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"phy_blk = %x %x\n"
 .LC177:
-	.string	"dump write = %x\n"
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
 .LC178:
-	.string	"pm_write_page write error: %x\n"
+	.string	"dump write = %x\n"
 .LC179:
-	.string	"finfo:"
+	.string	"pm_write_page write error: %x\n"
 .LC180:
-	.string	"flash_info_flush id = %x, page = %x\n"
+	.string	"finfo:"
 .LC181:
-	.string	"sys_info_flush error:%x\n"
+	.string	"flash_info_flush id = %x, page = %x\n"
 .LC182:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+	.string	"sys_info_flush error:%x\n"
 .LC183:
-	.string	"l2p:"
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC184:
-	.string	"free_buf_count: %d\n"
+	.string	"l2p:"
 .LC185:
-	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+	.string	"free_buf_count: %d\n"
 .LC186:
-	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
 .LC187:
-	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
 .LC188:
-	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC189:
-	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC190:
-	.string	"lpa:"
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC191:
-	.string	"vpn:"
+	.string	"lpa:"
 .LC192:
-	.string	"sblk:"
+	.string	"vpn:"
 .LC193:
-	.string	"lpa_hash:"
+	.string	"sblk:"
 .LC194:
-	.string	"lpa_hash_index:"
+	.string	"lpa_hash:"
 .LC195:
-	.string	"%s w error lpn = %x, max ppa = %d\n"
+	.string	"lpa_hash_index:"
 .LC196:
-	.string	"region_id = %d, pm_max_region = %d\n"
+	.string	"%s w error lpn = %x, max ppa = %d\n"
 .LC197:
-	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+	.string	"region_id = %d, pm_max_region = %d\n"
 .LC198:
-	.string	"load_l2p_region = %x,%x,%x, %x\n"
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
 .LC199:
-	.string	"pm_ppa:"
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
 .LC200:
-	.string	"data:"
+	.string	"pm_ppa:"
 .LC201:
-	.string	"spare:"
+	.string	"data:"
 .LC202:
-	.string	"pm_init posr %x %x %x\n"
+	.string	"spare:"
 .LC203:
-	.string	"pm_init recovery %x %x %x\n"
+	.string	"pm_init posr %x %x %x\n"
 .LC204:
-	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
+	.string	"pm_init recovery %x %x %x\n"
 .LC205:
-	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 .LC206:
-	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC207:
-	.string	"gc_recovery: %x vpn = %x\n"
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 .LC208:
-	.string	"_c_user_data_density := %d\n"
+	.string	"gc_recovery: %x vpn = %x\n"
 .LC209:
-	.string	"_c_totle_phy_density := %d\n"
+	.string	"_c_user_data_density := %d\n"
 .LC210:
-	.string	"_c_totle_log_page := %d\n"
+	.string	"_c_totle_phy_density := %d\n"
 .LC211:
-	.string	"_c_totle_data_density := %d\n"
+	.string	"_c_totle_log_page := %d\n"
 .LC212:
-	.string	"_c_ftl_pm_page_num := %d\n"
+	.string	"_c_totle_data_density := %d\n"
 .LC213:
-	.string	"_c_ftl_byte_pre_page := %d\n"
+	.string	"_c_ftl_pm_page_num := %d\n"
 .LC214:
-	.string	"_c_max_pm_sblk := %d\n"
+	.string	"_c_ftl_byte_pre_page := %d\n"
 .LC215:
-	.string	"_min_slc_super_block := %d\n"
+	.string	"_c_max_pm_sblk := %d\n"
 .LC216:
-	.string	"_max_xlc_super_block := %d\n"
+	.string	"_min_slc_super_block := %d\n"
 .LC217:
-	.string	"gp_ftl_ext_info %p %p %p\n"
+	.string	"_max_xlc_super_block := %d\n"
 .LC218:
-	.string	"flash info size: %d %d %d\n"
+	.string	"gp_ftl_ext_info %p %p %p\n"
 .LC219:
-	.string	"ftl_init %x\n"
+	.string	"flash info size: %d %d %d\n"
 .LC220:
-	.string	"gc_update_l2p_map_new sblk %x\n"
+	.string	"ftl_init %x\n"
 .LC221:
-	.string	"gc_update_l2p_map_new: %x %x %x\n"
+	.string	"gc_update_l2p_map_new sblk %x\n"
 .LC222:
-	.string	"lpa: %x %x %x\n"
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
 .LC223:
-	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
+	.string	"lpa: %x %x %x\n"
 .LC224:
-	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 .LC225:
-	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
 .LC226:
-	.string	"gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:%d\n"
+	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 .LC227:
-	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
+	.string	"gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:%d\n"
 .LC228:
-	.string	"ftl_sblk_dump = %x %x %x %x\n"
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
 .LC229:
-	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
 .LC230:
-	.string	"index= %x, lpa=%x\n"
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
 .LC231:
-	.string	"block = %x, vpn=%x check vpn = %d\n"
+	.string	"index= %x, lpa=%x\n"
 .LC232:
-	.string	"ftl_read %x %x %x\n"
+	.string	"block = %x, vpn=%x check vpn = %d\n"
 .LC233:
-	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.string	"ftl_read %x %x %x\n"
 .LC234:
-	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
 .LC235:
-	.string	"zftl debug cmd: %s\n"
+	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 .LC236:
-	.string	"cmd:"
+	.string	"zftl debug cmd: %s\n"
 .LC237:
-	.string	"dumpl2p"
+	.string	"cmd:"
 .LC238:
-	.string	"pm l2p:"
+	.string	"dumpl2p"
 .LC239:
-	.string	"pm blk:"
+	.string	"pm l2p:"
 .LC240:
-	.string	"dumppm:"
+	.string	"pm blk:"
 .LC241:
-	.string	"p_cmd: %s\n"
+	.string	"dumppm:"
 .LC242:
-	.string	"pm ram = %x, %x\n"
+	.string	"p_cmd: %s\n"
 .LC243:
-	.string	"ram:"
+	.string	"pm ram = %x, %x\n"
 .LC244:
-	.string	"pm:"
+	.string	"ram:"
 .LC245:
-	.string	"dumpsys"
+	.string	"pm:"
 .LC246:
-	.string	"dumplist:"
+	.string	"dumpsys"
 .LC247:
-	.string	"vpncheck"
+	.string	"dumplist:"
 .LC248:
-	.string	"dumpppa:"
+	.string	"vpncheck"
 .LC249:
-	.string	"dumpblk:"
+	.string	"dumpppa:"
 .LC250:
-	.string	"setzdebug:"
+	.string	"dumpblk:"
 .LC251:
-	.string	"lpa2ppa:"
+	.string	"setzdebug:"
 .LC252:
-	.string	"lpa: %x--> ppa: %x\n"
+	.string	"lpa2ppa:"
 .LC253:
-	.string	"help:\n"
+	.string	"lpa: %x--> ppa: %x\n"
 .LC254:
-	.string	"1. echo dumpl2p > /proc/zftl_debug\n"
+	.string	"help:\n"
 .LC255:
-	.string	"2. echo dumppm:x > /proc/zftl_debug\n"
+	.string	"1. echo dumpl2p > /proc/zftl_debug\n"
 .LC256:
-	.string	"3. echo dumpsys > /proc/zftl_debug\n"
+	.string	"2. echo dumppm:x > /proc/zftl_debug\n"
 .LC257:
-	.string	"4. echo dumpppa:x > /proc/zftl_debug\n"
+	.string	"3. echo dumpsys > /proc/zftl_debug\n"
 .LC258:
-	.string	"5. echo vpncheck > /proc/zftl_debug\n"
+	.string	"4. echo dumpppa:x > /proc/zftl_debug\n"
 .LC259:
-	.string	"6. echo setzdebug:x > /proc/zftl_debug\n"
+	.string	"5. echo vpncheck > /proc/zftl_debug\n"
 .LC260:
-	.string	"7. echo dumplist > /proc/zftl_debug\n"
+	.string	"6. echo setzdebug:x > /proc/zftl_debug\n"
 .LC261:
-	.string	"8. echo lpa2ppa:x> /proc/zftl_debug\n"
+	.string	"7. echo dumplist > /proc/zftl_debug\n"
 .LC262:
-	.string	"gc_lpa:"
+	.string	"8. echo lpa2ppa:x> /proc/zftl_debug\n"
 .LC263:
-	.string	"gc_ppa:"
+	.string	"gc_lpa:"
 .LC264:
-	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.string	"gc_ppa:"
 .LC265:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 .LC266:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC267:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC268:
-	.string	"sblk %x vpn: %d %d\n"
+	.string	"lpa_tbl:"
 .LC269:
-	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
+	.string	"sblk %x vpn: %d %d\n"
 .LC270:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
+	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 .LC271:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC272:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC273:
-	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
 .LC274:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
+	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 .LC275:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC276:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC277:
-	.string	"gc free %x, %d\n"
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
 .LC278:
-	.string	"ftlwrite %x %x %x\n"
+	.string	"gc free %x, %d\n"
 .LC279:
-	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.string	"ftlwrite %x %x %x\n"
 .LC280:
-	.string	"id_block_prog_msb_ff_data slc page = %d pageadd=%x %x\n"
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 .LC281:
-	.string	"write_idblock fix data %x %x\n"
+	.string	"id_block_prog_msb_ff_data slc page = %d pageadd=%x %x\n"
 .LC282:
-	.string	"idblk:"
+	.string	"write_idblock fix data %x %x\n"
 .LC283:
-	.string	"write_idblock totle_sec %x %x\n"
+	.string	"idblk:"
 .LC284:
-	.string	"READ_SECTOR_IO\n"
+	.string	"write_idblock totle_sec %x %x\n"
 .LC285:
-	.string	"rk_copy_from_user error\n"
+	.string	"READ_SECTOR_IO\n"
 .LC286:
-	.string	"READ_SECTOR_IO %x %x\n"
+	.string	"rk_copy_from_user error\n"
 .LC287:
-	.string	"rk_copy_to_user error\n"
+	.string	"READ_SECTOR_IO %x %x\n"
 .LC288:
-	.string	"WRITE_SECTOR_IO\n"
+	.string	"rk_copy_to_user error\n"
 .LC289:
-	.string	"WRITE_SECTOR_IO %x %x\n"
+	.string	"WRITE_SECTOR_IO\n"
 .LC290:
-	.string	"END_WRITE_SECTOR_IO\n"
+	.string	"WRITE_SECTOR_IO %x %x\n"
 .LC291:
-	.string	"END_WRITE_SECTOR_IO %x %x\n"
+	.string	"END_WRITE_SECTOR_IO\n"
 .LC292:
-	.string	"GET_FLASH_INFO_IO\n"
+	.string	"END_WRITE_SECTOR_IO %x %x\n"
 .LC293:
-	.string	"GET_BAD_BLOCK_IO\n"
+	.string	"GET_FLASH_INFO_IO\n"
 .LC294:
-	.string	"GET_LOCK_FLAG_IO\n"
+	.string	"GET_BAD_BLOCK_IO\n"
 .LC295:
-	.string	"GET_PUBLIC_KEY_IO\n"
+	.string	"GET_LOCK_FLAG_IO\n"
 .LC296:
-	.string	"RKNAND_GET_DRM_KEY\n"
+	.string	"GET_PUBLIC_KEY_IO\n"
 .LC297:
-	.string	"RKNAND_STORE_DRM_KEY\n"
+	.string	"RKNAND_GET_DRM_KEY\n"
 .LC298:
-	.string	"RKNAND_DIASBLE_SECURE_BOOT\n"
+	.string	"RKNAND_STORE_DRM_KEY\n"
 .LC299:
-	.string	"RKNAND_ENASBLE_SECURE_BOOT\n"
+	.string	"RKNAND_DIASBLE_SECURE_BOOT\n"
 .LC300:
-	.string	"RKNAND_GET_SN_SECTOR\n"
+	.string	"RKNAND_ENASBLE_SECURE_BOOT\n"
 .LC301:
-	.string	"RKNAND_LOADER_UNLOCK\n"
+	.string	"RKNAND_GET_SN_SECTOR\n"
 .LC302:
-	.string	"RKNAND_LOADER_STATUS\n"
+	.string	"RKNAND_LOADER_UNLOCK\n"
 .LC303:
-	.string	"RKNAND_LOADER_LOCK\n"
+	.string	"RKNAND_LOADER_STATUS\n"
 .LC304:
-	.string	"LockKey not match %d\n"
+	.string	"RKNAND_LOADER_LOCK\n"
 .LC305:
-	.string	"RKNAND_GET_VENDOR_SECTOR\n"
+	.string	"LockKey not match %d\n"
 .LC306:
-	.string	"RKNAND_STORE_VENDOR_SECTOR\n"
+	.string	"RKNAND_GET_VENDOR_SECTOR\n"
 .LC307:
-	.string	"return ret = %lx\n"
+	.string	"RKNAND_STORE_VENDOR_SECTOR\n"
 .LC308:
-	.string	"secureBootEn check error\n"
+	.string	"return ret = %lx\n"
 .LC309:
+	.string	"secureBootEn check error\n"
+.LC310:
 	.string	"\0013vendor storage %x,%x,%x\n"
 	.data
 	.align	3
@@ -26320,7 +26336,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.zero	4
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 960
+	.size	zftl_nand_flash_para_tbl, 1024
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -27036,7 +27052,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1056
-	.hword	473
+	.hword	455
 	.byte	2
 	.byte	6
 	.byte	40
@@ -27162,6 +27178,62 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1024
+	.hword	455
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	455
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -28452,14 +28524,11 @@ g_idb_slc_mode_enable:
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
-	.zero	1
-	.type	g_flash_reversd_blks, %object
-	.size	g_flash_reversd_blks, 1
-g_flash_reversd_blks:
 	.zero	1
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
+	.zero	1
 	.zero	1
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
@@ -28508,6 +28577,9 @@ g_pm_spare:
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
 	.zero	1
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2

From e99d2eff81b3f3473c21b4771e5cf650e1f35742 Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Fri, 20 Jul 2018 09:13:26 +0800
Subject: [PATCH 0624/1852] power: rk817-battery: optimize charging curve

Change-Id: I3a11593324be523649f6c5b12872336fb24a5283
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
---
 drivers/power/rk817_battery.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/power/rk817_battery.c b/drivers/power/rk817_battery.c
index 69c132f6a4ca6..28275bccdc223 100644
--- a/drivers/power/rk817_battery.c
+++ b/drivers/power/rk817_battery.c
@@ -1299,6 +1299,13 @@ static int rk817_bat_get_charge_status(struct rk817_battery_device *battery)
 
 	status = rk817_bat_field_read(battery, CHG_STS);
 
+	if (status == CC_OR_CV_CHRG) {
+		if (battery->rsoc == 100 * 1000) {
+			DBG("charge to finish\n");
+			status = CHARGE_FINISH;
+		}
+	}
+
 	switch (status) {
 	case CHRG_OFF:
 		DBG("charge off...\n");

From 33dcc9ff5db9a231be31abaf86d934f36d173366 Mon Sep 17 00:00:00 2001
From: Cliff Chen <cliff.chen@rock-chips.com>
Date: Thu, 19 Jul 2018 16:27:16 +0800
Subject: [PATCH 0625/1852] f2fs: modify f_blocks for statfs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The f_blocks of statfs include file system overhead，it is not normal
usage of Posix.

Change-Id: If481626b08c05290626938586e2dc721690f1a91
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
---
 fs/f2fs/super.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index dcce72aa47a6c..d73e46d07ab32 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/super.c
@@ -1164,7 +1164,8 @@ static int f2fs_statfs(struct dentry *dentry, struct kstatfs *buf)
 	buf->f_type = F2FS_SUPER_MAGIC;
 	buf->f_bsize = sbi->blocksize;
 
-	buf->f_blocks = total_count - start_count;
+	/* f_blocks should not include overhead of filesystem */
+	buf->f_blocks = user_block_count;
 	buf->f_bfree = user_block_count - valid_user_blocks(sbi) -
 						sbi->current_reserved_blocks;
 	if (buf->f_bfree > F2FS_OPTION(sbi).root_reserved_blocks)

From dfab2d3a1bbeaa1a8cb8974f2b7f145ea54492d0 Mon Sep 17 00:00:00 2001
From: Zhen Chen <chenzhen@rock-chips.com>
Date: Sun, 8 Jul 2018 15:25:35 +0800
Subject: [PATCH 0626/1852] Mali: midgard: add an error handling pass in
 kbase_mmu_interrupt()

For RK redmine Defect #168230.

Change-Id: I3cd6544dd23b833138e4cc700a8f2cdd627ff592
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
---
 .../backend/gpu/mali_kbase_mmu_hw_direct.c        |  6 ++++++
 drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c    |  7 ++++++-
 drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h    |  5 ++++-
 drivers/gpu/arm/midgard/mali_kbase_js.c           | 15 ++++++++++-----
 4 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_mmu_hw_direct.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_mmu_hw_direct.c
index aa1817c8bca92..ba826184dd3fe 100644
--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_mmu_hw_direct.c
+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_mmu_hw_direct.c
@@ -14,6 +14,8 @@
  */
 
 
+/* #define ENABLE_DEBUG_LOG */
+#include "../../platform/rk/custom_log.h"
 
 #include <linux/bitops.h>
 
@@ -164,6 +166,10 @@ void kbase_mmu_interrupt(struct kbase_device *kbdev, u32 irq_stat)
 		 * the MMU is updated
 		 */
 		kctx = kbasep_js_runpool_lookup_ctx(kbdev, as_no);
+		if (!kctx) {
+			E("fail to lookup ctx, to break out.");
+			break;
+		}
 
 
 		/* find faulting address */
diff --git a/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c b/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c
index e2f7baabad43f..ce004841403f4 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c
@@ -131,16 +131,21 @@ int kbase_ctx_sched_retain_ctx(struct kbase_context *kctx)
 	return kctx->as_nr;
 }
 
-void kbase_ctx_sched_retain_ctx_refcount(struct kbase_context *kctx)
+int kbase_ctx_sched_retain_ctx_refcount(struct kbase_context *kctx)
 {
 	struct kbase_device *const kbdev = kctx->kbdev;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 	WARN_ON(atomic_read(&kctx->refcount) == 0);
+	if (atomic_read(&kctx->refcount) == 0)
+		return -1;
+
 	WARN_ON(kctx->as_nr == KBASEP_AS_NR_INVALID);
 	WARN_ON(kbdev->as_to_kctx[kctx->as_nr] != kctx);
 
 	atomic_inc(&kctx->refcount);
+
+	return 0;
 }
 
 void kbase_ctx_sched_release_ctx(struct kbase_context *kctx)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h b/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h
index e55152547c31a..47474fecc2a9d 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h
@@ -87,8 +87,11 @@ int kbase_ctx_sched_retain_ctx(struct kbase_context *kctx);
  * it doesn't get descheduled.
  *
  * The kbase_device::hwaccess_lock must be held whilst calling this function
+ * @return
+ *	若�功, 返回 0;
+ *	若 *kctx 状�异常, 返回 -1.
  */
-void kbase_ctx_sched_retain_ctx_refcount(struct kbase_context *kctx);
+int kbase_ctx_sched_retain_ctx_refcount(struct kbase_context *kctx);
 
 /* kbase_ctx_sched_release_ctx - Release a reference to the @ref kbase_context
  *
diff --git a/drivers/gpu/arm/midgard/mali_kbase_js.c b/drivers/gpu/arm/midgard/mali_kbase_js.c
index b053ce1f22a1d..10a1d5909bbe1 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_js.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_js.c
@@ -13,9 +13,8 @@
  *
  */
 
-
-
-
+/* #define ENABLE_DEBUG_LOG */
+#include "./platform/rk/custom_log.h"
 
 /*
  * Job Scheduler Implementation
@@ -1245,6 +1244,7 @@ bool kbasep_js_runpool_retain_ctx(struct kbase_device *kbdev,
 struct kbase_context *kbasep_js_runpool_lookup_ctx(struct kbase_device *kbdev,
 		int as_nr)
 {
+	int ret = 0;
 	unsigned long flags;
 	struct kbasep_js_device_data *js_devdata;
 	struct kbase_context *found_kctx = NULL;
@@ -1257,8 +1257,13 @@ struct kbase_context *kbasep_js_runpool_lookup_ctx(struct kbase_device *kbdev,
 
 	found_kctx = kbdev->as_to_kctx[as_nr];
 
-	if (found_kctx != NULL)
-		kbase_ctx_sched_retain_ctx_refcount(found_kctx);
+	if (found_kctx != NULL) {
+		ret = kbase_ctx_sched_retain_ctx_refcount(found_kctx);
+		if (ret != 0) {
+			E("fail to retain ctx_refcount, ret : %d.", ret);
+			found_kctx = NULL;
+		}
+	}
 
 	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
 

From 61f326ce1a3c359a3f54623b451711846cf72fd8 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Tue, 17 Jul 2018 14:27:05 +0800
Subject: [PATCH 0627/1852] drm/rockchip: vop: Fix grf_dclk_inv register field
 definitions

Fixes: c2b587fa35bc ("drm/rockchip: vop: config dclk invert from grf register")
Change-Id: I113f9d4c8c58389307d1e03eee2ccbba5c95b2c1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index beef9e3738cfb..5f517e193cc82 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -323,11 +323,11 @@ static const struct vop_intr rk3288_vop_intr = {
 };
 
 static const struct vop_grf_ctrl rk3288_vop_big_grf_ctrl = {
-	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 12),
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 13),
 };
 
 static const struct vop_grf_ctrl rk3288_vop_lit_grf_ctrl = {
-	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 14),
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 15),
 };
 
 static const struct vop_data rk3288_vop_big = {

From aacbb53f1f2eef2156715e6cf05b33dc191e77af Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Mon, 16 Jul 2018 19:49:50 +0800
Subject: [PATCH 0628/1852] media: i2c: add gc2155 driver

Change-Id: I8c7ab7abf9ca2b3d33b3bdae3593f727d61955dc
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/Kconfig  |    9 +
 drivers/media/i2c/Makefile |    1 +
 drivers/media/i2c/gc2155.c | 1379 ++++++++++++++++++++++++++++++++++++
 3 files changed, 1389 insertions(+)
 create mode 100644 drivers/media/i2c/gc2155.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 06f0ce851fa1c..08d350bc73985 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -713,6 +713,15 @@ config VIDEO_S5C73M3
 	  This is a V4L2 sensor-level driver for Samsung S5C73M3
 	  8 Mpixel camera.
 
+config VIDEO_GC2155
+	tristate "GalaxyCore GC2155 sensor support"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	help
+	  Support for the GalaxyCore GC2155 sensor.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gc2155.
+
 comment "Flash devices"
 
 config VIDEO_ADP1653
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index f871b6b42aefa..2fba2f69de33a 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -87,3 +87,4 @@ obj-$(CONFIG_VIDEO_OV2659)	+= ov2659.o
 obj-$(CONFIG_VIDEO_TC35874X)	+= tc35874x.o
 obj-$(CONFIG_VIDEO_OV5647)	+= ov5647.o
 obj-$(CONFIG_VIDEO_IMX219)	+= imx219.o
+obj-$(CONFIG_VIDEO_GC2155)	+= gc2155.o
diff --git a/drivers/media/i2c/gc2155.c b/drivers/media/i2c/gc2155.c
new file mode 100644
index 0000000000000..927c9462ac907
--- /dev/null
+++ b/drivers/media/i2c/gc2155.c
@@ -0,0 +1,1379 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * gc2155 driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+
+#define REG_CHIP_ID_H			0xf0
+#define REG_CHIP_ID_L			0xf1
+#define CHIP_ID_H			0x21
+#define CHIP_ID_L			0x55
+
+#define REG_NULL			0xFF
+
+#define GC2155_XVCLK_FREQ		24000000
+
+static const char * const gc2155_supply_names[] = {
+	"avdd",
+	"dovdd",
+	"dvdd",
+};
+
+#define GC2155_NUM_SUPPLIES ARRAY_SIZE(gc2155_supply_names)
+
+struct regval {
+	u8 addr;
+	u8 val;
+};
+
+struct gc2155_mode {
+	u32 width;
+	u32 height;
+	const struct regval *reg_list;
+};
+
+struct gc2155 {
+	struct i2c_client	*client;
+	struct clk		*xvclk;
+	struct gpio_desc	*reset_gpio;
+	struct gpio_desc	*pwdn_gpio;
+	struct regulator_bulk_data supplies[GC2155_NUM_SUPPLIES];
+
+	bool			streaming;
+	struct mutex		mutex; /* lock to serialize v4l2 callback */
+	struct v4l2_subdev	subdev;
+	struct media_pad	pad;
+
+	const struct gc2155_mode *cur_mode;
+};
+
+#define to_gc2155(sd) container_of(sd, struct gc2155, subdev)
+
+static struct regval gc2155_global_regs[] = {
+	{0xfe, 0xf0},
+	{0xfe, 0xf0},
+	{0xfe, 0xf0},
+	{0xfc, 0x06},
+	{0xf6, 0x00},
+	{0xf7, 0x1d},
+	{0xf8, 0x84},
+	{0xfa, 0x00},
+	{0xf9, 0xfe},
+	{0xf2, 0x00},
+	/* ISP reg */
+	{0xfe, 0x00},
+	{0x03, 0x04},
+	{0x04, 0xe2},
+	{0x09, 0x00},
+	{0x0a, 0x00},
+	{0x0b, 0x00},
+	{0x0c, 0x00},
+	{0x0d, 0x04},
+	{0x0e, 0xc0},
+	{0x0f, 0x06},
+	{0x10, 0x50},
+	{0x12, 0x2e},
+	{0x17, 0x14}, // mirror
+	{0x18, 0x02},
+	{0x19, 0x0e},
+	{0x1a, 0x01},
+	{0x1b, 0x4b},
+	{0x1c, 0x07},
+	{0x1d, 0x10},
+	{0x1e, 0x98},
+	{0x1f, 0x78},
+	{0x20, 0x05},
+	{0x21, 0x40},
+	{0x22, 0xf0},
+	{0x24, 0x16},
+	{0x25, 0x01},
+	{0x26, 0x10},
+	{0x2d, 0x40},
+	{0x30, 0x01},
+	{0x31, 0x90},
+	{0x33, 0x04},
+	{0x34, 0x01},
+	/* ISP reg */
+	{0xfe, 0x00},
+	{0x80, 0xff},
+	{0x81, 0x2c},
+	{0x82, 0xfa},
+	{0x83, 0x00},
+	{0x84, 0x00}, //yuv 01
+	{0x85, 0x08},
+	{0x86, 0x02},
+	{0x89, 0x03},
+	{0x8a, 0x00},
+	{0x8b, 0x00},
+	{0xb0, 0x55},
+	{0xc3, 0x11}, //00
+	{0xc4, 0x20},
+	{0xc5, 0x30},
+	{0xc6, 0x38},
+	{0xc7, 0x40},
+	{0xec, 0x02},
+	{0xed, 0x04},
+	{0xee, 0x60},
+	{0xef, 0x90},
+	{0xb6, 0x01},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	/*   BLK   */
+	{0xfe, 0x00},
+	{0x18, 0x02},
+	{0x40, 0x42},
+	{0x41, 0x00},
+	{0x43, 0x5b}, //0x54
+	{0x5e, 0x00},
+	{0x5f, 0x00},
+	{0x60, 0x00},
+	{0x61, 0x00},
+	{0x62, 0x00},
+	{0x63, 0x00},
+	{0x64, 0x00},
+	{0x65, 0x00},
+	{0x66, 0x20},
+	{0x67, 0x20},
+	{0x68, 0x20},
+	{0x69, 0x20},
+	{0x6a, 0x08},
+	{0x6b, 0x08},
+	{0x6c, 0x08},
+	{0x6d, 0x08},
+	{0x6e, 0x08},
+	{0x6f, 0x08},
+	{0x70, 0x08},
+	{0x71, 0x08},
+	{0x72, 0xf0},
+	{0x7e, 0x3c},
+	{0x7f, 0x00},
+	{0xfe, 0x00},
+	/*   AEC   */
+	{0xfe, 0x01},
+	{0x01, 0x08},
+	{0x02, 0xc0},
+	{0x03, 0x04},
+	{0x04, 0x90},
+	{0x05, 0x30},
+	{0x06, 0x98},
+	{0x07, 0x28},
+	{0x08, 0x6c},
+	{0x09, 0x00},
+	{0x0a, 0xc2},
+	{0x0b, 0x11},
+	{0x0c, 0x10},
+	{0x13, 0x2d},
+	{0x17, 0x00},
+	{0x1c, 0x11},
+	{0x1e, 0x61},
+	{0x1f, 0x30},
+	{0x20, 0x40},
+	{0x22, 0x80},
+	{0x23, 0x20},
+
+	{0x12, 0x35},
+	{0x15, 0x50},
+	{0x10, 0x31},
+	{0x3e, 0x28},
+	{0x3f, 0xe0},
+	{0x40, 0xe0},
+	{0x41, 0x08},
+
+	{0xfe, 0x02},
+	{0x0f, 0x05},
+	/*  INTPEE */
+	{0xfe, 0x02},
+	{0x90, 0x6c},
+	{0x91, 0x03},
+	{0x92, 0xc4},
+	{0x97, 0x64},
+	{0x98, 0x88},
+	{0x9d, 0x08},
+	{0xa2, 0x11},
+	{0xfe, 0x00},
+	/*   DNDD  */
+	{0xfe, 0x02},
+	{0x80, 0xc1},
+	{0x81, 0x08},
+	{0x82, 0x05},
+	{0x83, 0x04},
+	{0x84, 0x0a},
+	{0x86, 0x80},
+	{0x87, 0x30},
+	{0x88, 0x15},
+	{0x89, 0x80},
+	{0x8a, 0x60},
+	{0x8b, 0x30},
+	/*   ASDE  */
+	{0xfe, 0x01},
+	{0x21, 0x14},
+	{0xfe, 0x02},
+	{0x3c, 0x06},
+	{0x3d, 0x40},
+	{0x48, 0x30},
+	{0x49, 0x06},
+	{0x4b, 0x08},
+	{0x4c, 0x20},
+	{0xa3, 0x50},
+	{0xa4, 0x30},
+	{0xa5, 0x40},
+	{0xa6, 0x80},
+	{0xab, 0x40},
+	{0xae, 0x0c},
+	{0xb3, 0x42},
+	{0xb4, 0x24},
+	{0xb6, 0x50},
+	{0xb7, 0x01},
+	{0xb9, 0x28},
+	{0xfe, 0x00},
+	/*  gamma1 */
+	{0xfe, 0x02},
+	{0x10, 0x0d},
+	{0x11, 0x12},
+	{0x12, 0x17},
+	{0x13, 0x1c},
+	{0x14, 0x27},
+	{0x15, 0x34},
+	{0x16, 0x44},
+	{0x17, 0x55},
+	{0x18, 0x6e},
+	{0x19, 0x81},
+	{0x1a, 0x91},
+	{0x1b, 0x9c},
+	{0x1c, 0xaa},
+	{0x1d, 0xbb},
+	{0x1e, 0xca},
+	{0x1f, 0xd5},
+	{0x20, 0xe0},
+	{0x21, 0xe7},
+	{0x22, 0xed},
+	{0x23, 0xf6},
+	{0x24, 0xfb},
+	{0x25, 0xff},
+	/*  gamma2 */
+	{0xfe, 0x02},
+	{0x26, 0x0d},
+	{0x27, 0x12},
+	{0x28, 0x17},
+	{0x29, 0x1c},
+	{0x2a, 0x27},
+	{0x2b, 0x34},
+	{0x2c, 0x44},
+	{0x2d, 0x55},
+	{0x2e, 0x6e},
+	{0x2f, 0x81},
+	{0x30, 0x91},
+	{0x31, 0x9c},
+	{0x32, 0xaa},
+	{0x33, 0xbb},
+	{0x34, 0xca},
+	{0x35, 0xd5},
+	{0x36, 0xe0},
+	{0x37, 0xe7},
+	{0x38, 0xed},
+	{0x39, 0xf6},
+	{0x3a, 0xfb},
+	{0x3b, 0xff},
+	/*   YCP   */
+	{0xfe, 0x02},
+	{0xd1, 0x28},
+	{0xd2, 0x28},
+	{0xdd, 0x14},
+	{0xde, 0x88},
+	{0xed, 0x80},
+	/*   LSC   */
+	{0xfe, 0x01},
+	{0xc2, 0x1f},
+	{0xc3, 0x13},
+	{0xc4, 0x0e},
+	{0xc8, 0x16},
+	{0xc9, 0x0f},
+	{0xca, 0x0c},
+	{0xbc, 0x52},
+	{0xbd, 0x2c},
+	{0xbe, 0x27},
+	{0xb6, 0x47},
+	{0xb7, 0x32},
+	{0xb8, 0x30},
+	{0xc5, 0x00},
+	{0xc6, 0x00},
+	{0xc7, 0x00},
+	{0xcb, 0x00},
+	{0xcc, 0x00},
+	{0xcd, 0x00},
+	{0xbf, 0x0e},
+	{0xc0, 0x00},
+	{0xc1, 0x00},
+	{0xb9, 0x08},
+	{0xba, 0x00},
+	{0xbb, 0x00},
+	{0xaa, 0x0a},
+	{0xab, 0x0c},
+	{0xac, 0x0d},
+	{0xad, 0x02},
+	{0xae, 0x06},
+	{0xaf, 0x05},
+	{0xb0, 0x00},
+	{0xb1, 0x05},
+	{0xb2, 0x02},
+	{0xb3, 0x04},
+	{0xb4, 0x04},
+	{0xb5, 0x05},
+	{0xd0, 0x00},
+	{0xd1, 0x00},
+	{0xd2, 0x00},
+	{0xd6, 0x02},
+	{0xd7, 0x00},
+	{0xd8, 0x00},
+	{0xd9, 0x00},
+	{0xda, 0x00},
+	{0xdb, 0x00},
+	{0xd3, 0x00},
+	{0xd4, 0x00},
+	{0xd5, 0x00},
+	{0xa4, 0x04},
+	{0xa5, 0x00},
+	{0xa6, 0x77},
+	{0xa7, 0x77},
+	{0xa8, 0x77},
+	{0xa9, 0x77},
+	{0xa1, 0x80},
+	{0xa2, 0x80},
+
+	{0xfe, 0x01},
+	{0xdc, 0x35},
+	{0xdd, 0x28},
+	{0xdf, 0x0d},
+	{0xe0, 0x70},
+	{0xe1, 0x78},
+	{0xe2, 0x70},
+	{0xe3, 0x78},
+	{0xe6, 0x90},
+	{0xe7, 0x70},
+	{0xe8, 0x90},
+	{0xe9, 0x70},
+	{0xfe, 0x00},
+	/*   AWB   */
+	{0xfe, 0x01},
+	{0x4f, 0x00},
+	{0x4f, 0x00},
+	{0x4b, 0x01},
+	{0x4f, 0x00},
+	{0x4c, 0x01},
+	{0x4d, 0x71},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x91},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x50},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x70},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x90},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xb0},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xd0},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x4f},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x6f},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x8f},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xaf},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xcf},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x6e},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8e},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xae},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xce},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xad},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xcd},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xac},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xcc},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xec},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xab},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8a},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xaa},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xca},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xa9},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xc9},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xcb},
+	{0x4e, 0x05},
+	{0x4c, 0x01},
+	{0x4d, 0xeb},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x0b},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x2b},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x4b},
+	{0x4e, 0x05},
+	{0x4c, 0x01},
+	{0x4d, 0xea},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x0a},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x2a},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x6a},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x29},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x49},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x69},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x89},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0xa9},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0xc9},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x48},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x68},
+	{0x4e, 0x06},
+	{0x4c, 0x03},
+	{0x4d, 0x09},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xa8},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xc8},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xe8},
+	{0x4e, 0x07},
+	{0x4c, 0x03},
+	{0x4d, 0x08},
+	{0x4e, 0x07},
+	{0x4c, 0x03},
+	{0x4d, 0x28},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0x87},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xa7},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xc7},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xe7},
+	{0x4e, 0x07},
+	{0x4c, 0x03},
+	{0x4d, 0x07},
+	{0x4e, 0x07},
+	{0x4f, 0x01},
+	{0xfe, 0x01},
+
+	{0x50, 0x80},
+	{0x51, 0xa8},
+	{0x52, 0x57},
+	{0x53, 0x38},
+	{0x54, 0xc7},
+	{0x56, 0x0e},
+	{0x58, 0x08},
+	{0x5b, 0x00},
+	{0x5c, 0x74},
+	{0x5d, 0x8b},
+	{0x61, 0xd3},
+	{0x62, 0x90},
+	{0x63, 0xaa},
+	{0x65, 0x04},
+	{0x67, 0xb2},
+	{0x68, 0xac},
+	{0x69, 0x00},
+	{0x6a, 0xb2},
+	{0x6b, 0xac},
+	{0x6c, 0xdc},
+	{0x6d, 0xb0},
+	{0x6e, 0x30},
+	{0x6f, 0x40},
+	{0x70, 0x05},
+	{0x71, 0x80},
+	{0x72, 0x80},
+	{0x73, 0x30},
+	{0x74, 0x01},
+	{0x75, 0x01},
+	{0x7f, 0x08},
+	{0x76, 0x70},
+	{0x77, 0x48},
+	{0x78, 0xa0},
+	{0xfe, 0x00},
+	/*   CC    */
+	{0xfe, 0x02},
+	{0xc0, 0x01},
+	{0xc1, 0x4a},
+	{0xc2, 0xf3},
+	{0xc3, 0xfc},
+	{0xc4, 0xe4},
+	{0xc5, 0x48},
+	{0xc6, 0xec},
+	{0xc7, 0x45},
+	{0xc8, 0xf8},
+	{0xc9, 0x02},
+	{0xca, 0xfe},
+	{0xcb, 0x42},
+	{0xcc, 0x00},
+	{0xcd, 0x45},
+	{0xce, 0xf0},
+	{0xcf, 0x00},
+	{0xe3, 0xf0},
+	{0xe4, 0x45},
+	{0xe5, 0xe8},
+	/*   ABS   */
+	{0xfe, 0x01},
+	{0x9f, 0x42},
+	{0xfe, 0x00},
+	/* frame rate 50Hz */
+#if 1
+	{0xfe, 0x00},
+	{0x05, 0x01},
+	{0x06, 0x56},
+	{0x07, 0x00},
+	{0x08, 0x32},
+	{0xfe, 0x01},
+	{0x25, 0x00},
+	{0x26, 0xfa},
+	{0x27, 0x04},
+	{0x28, 0xe2}, //20fps
+	{0x29, 0x06},
+	{0x2a, 0xd6}, //16fps
+	{0x2b, 0x07},
+	{0x2c, 0xd0}, //12fps
+	{0x2d, 0x0b},
+	{0x2e, 0xb8}, //8fps
+	{0xfe, 0x00},
+#else
+	/* frame rate 50Hz */
+	{0xfe, 0x00},
+	{0x05, 0x02},
+	{0x06, 0x2d},
+	{0x07, 0x00},
+	{0x08, 0xa0},
+	{0xfe, 0x01},
+	{0x25, 0x00},
+	{0x26, 0xd4},
+	{0x27, 0x04},
+	{0x28, 0xf8},
+	{0x29, 0x08},
+	{0x2a, 0x48},
+	{0x2b, 0x0a},
+	{0x2c, 0xc4},
+	{0x2d, 0x0f},
+	{0x2e, 0xbc},
+	{0xfe, 0x00},
+#endif
+	/*   SVGA  */
+	{0xfe, 0x00},
+	{0xfa, 0x00},
+	{0xfd, 0x01},
+	/* crop window */
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	/*   AWB   */
+	{0xfe, 0x00},
+	{0xec, 0x01},
+	{0xed, 0x02},
+	{0xee, 0x30},
+	{0xef, 0x48},
+	{0xfe, 0x01},
+	{0x74, 0x00},
+	/*   AEC   */
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0x60},
+	{0x03, 0x02},
+	{0x04, 0x48},
+	{0x05, 0x18},
+	{0x06, 0x4c},
+	{0x07, 0x14},
+	{0x08, 0x36},
+	{0x0a, 0xc0},
+	{0x21, 0x14},
+	{0xfe, 0x00},
+	/*  gamma  */
+	{0xfe, 0x00},
+	{0xc3, 0x11},
+	{0xc4, 0x20},
+	{0xc5, 0x30},
+	{0xfe, 0x00},
+	/*  OUTPUT */
+	{0xfe, 0x00},
+	{0xf2, 0x0f},
+	{REG_NULL, 0x0},
+};
+
+static struct regval gc2155_800x600_15fps[] = {
+	{0xfe, 0x00},
+	{0xb6, 0x01},
+	{0xfa, 0x00},
+	{0xfd, 0x01},
+	/* window setting */
+	{0x09, 0x00},
+	{0x0a, 0x00},
+	{0x0b, 0x00},
+	{0x0c, 0x00},
+	{0x0d, 0x04},
+	{0x0e, 0xc0},
+	{0x0f, 0x06},
+	{0x10, 0x50},
+	/* crop window */
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	/*   AWB   */
+	{0xfe, 0x00},
+	{0xec, 0x01},
+	{0xed, 0x02},
+	{0xee, 0x30},
+	{0xef, 0x48},
+	{0xfe, 0x01},
+	{0x74, 0x00},
+	/*   AEC   */
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0x60},
+	{0x03, 0x02},
+	{0x04, 0x48},
+	{0x05, 0x18},
+	{0x06, 0x4c},
+	{0x07, 0x14},
+	{0x08, 0x36},
+	{0x0a, 0xc0},
+	{0x21, 0x14},
+	{0xfe, 0x00},
+	/*  gamma  */
+	{0xfe, 0x00},
+	{0xc3, 0x11},
+	{0xc4, 0x20},
+	{0xc5, 0x30},
+	{0xfe, 0x00},
+
+	/* frame rate 50Hz */
+#if 1
+	{0xfe, 0x00},
+	{0x05, 0x01},
+	{0x06, 0x56},
+	{0x07, 0x00},
+	{0x08, 0x32},
+	{0xfe, 0x01},
+	{0x25, 0x00},
+	{0x26, 0xfa},
+	{0x27, 0x04},
+	{0x28, 0xe2}, //20fps
+	{0x29, 0x06},
+	{0x2a, 0xd6}, //16fps
+	{0x2b, 0x07},
+	{0x2c, 0xd0}, //12fps
+	{0x2d, 0x0b},
+	{0x2e, 0xb8}, //8fps
+	{0xfe, 0x00},
+#else
+	/* frame rate 50Hz */
+	{0xfe, 0x00},
+	{0x05, 0x02},
+	{0x06, 0x2d},
+	{0x07, 0x00},
+	{0x08, 0xa0},
+	{0xfe, 0x01},
+	{0x25, 0x00},
+	{0x26, 0xd4},
+	{0x27, 0x04},
+	{0x28, 0xf8},
+	{0x29, 0x08},
+	{0x2a, 0x48},
+	{0x2b, 0x0a},
+	{0x2c, 0xc4},
+	{0x2d, 0x0f},
+	{0x2e, 0xbc},
+	{0xfe, 0x00},
+#endif
+	{REG_NULL, 0x0},
+};
+
+static struct regval gc2155_1600x1200_7fps[] = {
+	{0xfe, 0x00},
+	{0xb6, 0x00},
+	{0xfa, 0x11},
+	{0xfd, 0x00},
+	/* crop window */
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	/*   AWB   */
+	{0xfe, 0x00},
+	{0xec, 0x02},
+	{0xed, 0x04},
+	{0xee, 0x60},
+	{0xef, 0x90},
+	{0xfe, 0x01},
+	{0x74, 0x01},
+	/*   AEC   */
+	{0xfe, 0x01},
+	{0x01, 0x08},
+	{0x02, 0xc0},
+	{0x03, 0x04},
+	{0x04, 0x90},
+	{0x05, 0x30},
+	{0x06, 0x98},
+	{0x07, 0x28},
+	{0x08, 0x6c},
+	{0x0a, 0xc2},
+	{0x21, 0x15}, //if 0xfa=11,then 0x21=15;else if 0xfa=00,then 0x21=14
+	{0xfe, 0x00},
+	/*  gamma  */
+	{0xfe, 0x00},
+	{0xc3, 0x00}, //if shutter/2 when capture,then exp_gamma_th/2
+	{0xc4, 0x90},
+	{0xc5, 0x98},
+	{0xfe, 0x00},
+	{REG_NULL, 0x0},
+};
+
+static const struct gc2155_mode supported_modes[] = {
+	{
+		.width = 800,
+		.height = 600,
+		.reg_list = gc2155_800x600_15fps,
+	},
+	{
+		.width = 1600,
+		.height = 1200,
+		.reg_list = gc2155_1600x1200_7fps,
+	},
+};
+
+static int gc2155_write_reg(struct i2c_client *client, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = i2c_smbus_write_byte_data(client, reg, val);
+
+	if (ret < 0)
+		dev_err(&client->dev, "write reg error: %d\n", ret);
+
+	return ret;
+}
+
+static int gc2155_write_array(struct i2c_client *client,
+	const struct regval *regs)
+{
+	int i, ret = 0;
+
+	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+		ret = gc2155_write_reg(client, regs[i].addr, regs[i].val);
+
+	return ret;
+}
+
+static inline u8 gc2155_read_reg(struct i2c_client *client, u8 reg)
+{
+	return i2c_smbus_read_byte_data(client, reg);
+}
+
+static int gc2155_get_reso_dist(const struct gc2155_mode *mode,
+	struct v4l2_mbus_framefmt *framefmt)
+{
+	return abs(mode->width - framefmt->width) +
+		abs(mode->height - framefmt->height);
+}
+
+static const struct gc2155_mode *
+gc2155_find_best_fit(struct v4l2_subdev_format *fmt)
+{
+	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
+	int dist;
+	int cur_best_fit = 0;
+	int cur_best_fit_dist = -1;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
+		dist = gc2155_get_reso_dist(&supported_modes[i], framefmt);
+		if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
+			cur_best_fit_dist = dist;
+			cur_best_fit = i;
+		}
+	}
+
+	return &supported_modes[cur_best_fit];
+}
+
+static int gc2155_set_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct gc2155 *gc2155 = to_gc2155(sd);
+	const struct gc2155_mode *mode;
+
+	mutex_lock(&gc2155->mutex);
+
+	mode = gc2155_find_best_fit(fmt);
+	fmt->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
+	fmt->format.width = mode->width;
+	fmt->format.height = mode->height;
+	fmt->format.field = V4L2_FIELD_NONE;
+	fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
+#else
+		mutex_unlock(&gc2155->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		gc2155->cur_mode = mode;
+	}
+
+	mutex_unlock(&gc2155->mutex);
+
+	return 0;
+}
+
+static int gc2155_get_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct gc2155 *gc2155 = to_gc2155(sd);
+	const struct gc2155_mode *mode = gc2155->cur_mode;
+
+	mutex_lock(&gc2155->mutex);
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+#else
+		mutex_unlock(&gc2155->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		fmt->format.width = mode->width;
+		fmt->format.height = mode->height;
+		fmt->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
+		fmt->format.field = V4L2_FIELD_NONE;
+		fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
+	}
+	mutex_unlock(&gc2155->mutex);
+
+	return 0;
+}
+
+static int gc2155_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_pad_config *cfg,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+	return 0;
+}
+
+static int gc2155_enum_frame_sizes(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_pad_config *cfg,
+				    struct v4l2_subdev_frame_size_enum *fse)
+{
+	u32 index = fse->index;
+
+	if (index >= ARRAY_SIZE(supported_modes))
+		return -EINVAL;
+
+	fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+	fse->min_width  = supported_modes[index].width;
+	fse->max_width  = supported_modes[index].width;
+	fse->max_height = supported_modes[index].height;
+	fse->min_height = supported_modes[index].height;
+
+	return 0;
+}
+
+static int __gc2155_power_on(struct gc2155 *gc2155)
+{
+	int ret;
+	struct device *dev = &gc2155->client->dev;
+
+	if (!IS_ERR(gc2155->reset_gpio))
+		gpiod_set_value_cansleep(gc2155->reset_gpio, 0);
+
+	ret = regulator_bulk_enable(GC2155_NUM_SUPPLIES, gc2155->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators\n");
+		return ret;
+	}
+
+	if (!IS_ERR(gc2155->xvclk)) {
+		ret = clk_prepare_enable(gc2155->xvclk);
+		if (ret < 0) {
+			dev_err(dev, "Failed to enable xvclk\n");
+			return ret;
+		}
+	}
+
+	if (!IS_ERR(gc2155->pwdn_gpio))
+		gpiod_set_value_cansleep(gc2155->pwdn_gpio, 0);
+
+	if (!IS_ERR(gc2155->reset_gpio))
+		gpiod_set_value_cansleep(gc2155->reset_gpio, 1);
+
+	return 0;
+}
+
+static void __gc2155_power_off(struct gc2155 *gc2155)
+{
+	if (!IS_ERR(gc2155->reset_gpio))
+		gpiod_set_value_cansleep(gc2155->reset_gpio, 0);
+	if (!IS_ERR(gc2155->pwdn_gpio))
+		gpiod_set_value_cansleep(gc2155->pwdn_gpio, 1);
+
+	if (!IS_ERR(gc2155->xvclk))
+		clk_disable_unprepare(gc2155->xvclk);
+
+	regulator_bulk_disable(GC2155_NUM_SUPPLIES, gc2155->supplies);
+}
+
+static int gc2155_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct gc2155 *gc2155 = to_gc2155(sd);
+	struct i2c_client *client = gc2155->client;
+	int ret = 0;
+
+	mutex_lock(&gc2155->mutex);
+
+	on = !!on;
+	if (on == gc2155->streaming)
+		goto unlock_and_return;
+
+	if (on) {
+		ret = pm_runtime_get_sync(&gc2155->client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = gc2155_write_array(gc2155->client, gc2155_global_regs);
+		if (ret) {
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+
+		ret = gc2155_write_array(gc2155->client,
+					  gc2155->cur_mode->reg_list);
+		if (ret) {
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+
+	} else {
+		pm_runtime_put(&client->dev);
+	}
+
+	gc2155->streaming = on;
+
+unlock_and_return:
+	mutex_unlock(&gc2155->mutex);
+
+	return ret;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int gc2155_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct gc2155 *gc2155 = to_gc2155(sd);
+	struct v4l2_mbus_framefmt *try_fmt =
+		v4l2_subdev_get_try_format(sd, fh->pad, 0);
+	const struct gc2155_mode *def_mode = &supported_modes[0];
+
+	mutex_lock(&gc2155->mutex);
+
+	try_fmt->width = def_mode->width;
+	try_fmt->height = def_mode->height;
+	try_fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
+	try_fmt->field = V4L2_FIELD_NONE;
+	try_fmt->colorspace = V4L2_COLORSPACE_JPEG;
+
+	mutex_unlock(&gc2155->mutex);
+
+	return 0;
+}
+#endif
+
+static int gc2155_runtime_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc2155 *gc2155 = to_gc2155(sd);
+
+	return __gc2155_power_on(gc2155);
+}
+
+static int gc2155_runtime_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc2155 *gc2155 = to_gc2155(sd);
+
+	__gc2155_power_off(gc2155);
+
+	return 0;
+}
+
+static const struct dev_pm_ops gc2155_pm_ops = {
+	SET_RUNTIME_PM_OPS(gc2155_runtime_suspend,
+			   gc2155_runtime_resume, NULL)
+};
+
+static const struct v4l2_subdev_video_ops gc2155_video_ops = {
+	.s_stream = gc2155_s_stream,
+};
+
+static const struct v4l2_subdev_pad_ops gc2155_pad_ops = {
+	.enum_mbus_code = gc2155_enum_mbus_code,
+	.enum_frame_size = gc2155_enum_frame_sizes,
+	.get_fmt = gc2155_get_fmt,
+	.set_fmt = gc2155_set_fmt,
+};
+
+static const struct v4l2_subdev_ops gc2155_subdev_ops = {
+	.video	= &gc2155_video_ops,
+	.pad	= &gc2155_pad_ops,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops gc2155_internal_ops = {
+	.open = gc2155_open,
+};
+#endif
+
+static int gc2155_check_sensor_id(struct gc2155 *gc2155,
+				  struct i2c_client *client)
+{
+	struct device *dev = &gc2155->client->dev;
+	u8 id_h, id_l;
+
+	id_h = gc2155_read_reg(client, REG_CHIP_ID_H);
+	id_l = gc2155_read_reg(client, REG_CHIP_ID_L);
+	if (id_h != CHIP_ID_H && id_l != CHIP_ID_L) {
+		dev_err(dev, "Wrong camera sensor id(0x%02x%02x)\n",
+			id_h, id_l);
+		return -EINVAL;
+	}
+
+	dev_info(dev, "Detected GC2155 (0x%02x%02x) sensor\n",
+		CHIP_ID_H, CHIP_ID_L);
+
+	return 0;
+}
+
+static int gc2155_configure_regulators(struct gc2155 *gc2155)
+{
+	u32 i;
+
+	for (i = 0; i < GC2155_NUM_SUPPLIES; i++)
+		gc2155->supplies[i].supply = gc2155_supply_names[i];
+
+	return devm_regulator_bulk_get(&gc2155->client->dev,
+				       GC2155_NUM_SUPPLIES,
+				       gc2155->supplies);
+}
+
+static int gc2155_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct gc2155 *gc2155;
+	int ret;
+
+	gc2155 = devm_kzalloc(dev, sizeof(*gc2155), GFP_KERNEL);
+	if (!gc2155)
+		return -ENOMEM;
+
+	gc2155->client = client;
+	gc2155->cur_mode = &supported_modes[0];
+
+	gc2155->xvclk = devm_clk_get(dev, "xvclk");
+	if (IS_ERR(gc2155->xvclk)) {
+		dev_err(dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+	ret = clk_set_rate(gc2155->xvclk, GC2155_XVCLK_FREQ);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+		return ret;
+	}
+	if (clk_get_rate(gc2155->xvclk) != GC2155_XVCLK_FREQ)
+		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
+
+	gc2155->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(gc2155->reset_gpio))
+		dev_warn(dev, "Failed to get reset-gpios\n");
+
+	gc2155->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(gc2155->pwdn_gpio))
+		dev_warn(dev, "Failed to get gc2155-gpios\n");
+
+	ret = gc2155_configure_regulators(gc2155);
+	if (ret) {
+		dev_warn(dev, "Failed to get power regulators\n");
+		return ret;
+	}
+
+	mutex_init(&gc2155->mutex);
+	v4l2_i2c_subdev_init(&gc2155->subdev, client, &gc2155_subdev_ops);
+
+	ret = __gc2155_power_on(gc2155);
+	if (ret)
+		goto err_destroy_mutex;
+
+	ret = gc2155_check_sensor_id(gc2155, client);
+	if (ret)
+		goto err_power_off;
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	gc2155->subdev.internal_ops = &gc2155_internal_ops;
+	gc2155->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	gc2155->pad.flags = MEDIA_PAD_FL_SOURCE;
+	gc2155->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&gc2155->subdev.entity, 1, &gc2155->pad, 0);
+	if (ret < 0)
+		goto err_power_off;
+#endif
+
+	ret = v4l2_async_register_subdev(&gc2155->subdev);
+	if (ret) {
+		dev_err(dev, "v4l2 async register subdev failed\n");
+		goto err_clean_entity;
+	}
+
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+	pm_runtime_idle(dev);
+
+	return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&gc2155->subdev.entity);
+#endif
+err_power_off:
+	__gc2155_power_off(gc2155);
+err_destroy_mutex:
+	mutex_destroy(&gc2155->mutex);
+
+	return ret;
+}
+
+static int gc2155_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc2155 *gc2155 = to_gc2155(sd);
+
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc2155->mutex);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		__gc2155_power_off(gc2155);
+	pm_runtime_set_suspended(&client->dev);
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id gc2155_of_match[] = {
+	{ .compatible = "gc,gc2155" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, gc2155_of_match);
+#endif
+
+static const struct i2c_device_id gc2155_match_id[] = {
+	{"gc2155", 0},
+	{},
+};
+
+static struct i2c_driver gc2155_i2c_driver = {
+	.driver = {
+		.name = "gc2155",
+		.pm = &gc2155_pm_ops,
+		.of_match_table = of_match_ptr(gc2155_of_match),
+	},
+	.probe		= gc2155_probe,
+	.remove		= gc2155_remove,
+	.id_table	= gc2155_match_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&gc2155_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&gc2155_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("GalaxyCore gc2155 sensor driver");
+MODULE_LICENSE("GPL v2");

From fb11fe93997385150618e2553d57995cda7986f5 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Wed, 18 Jul 2018 21:48:51 +0800
Subject: [PATCH 0629/1852] rockchip: rkflash: adjust vendor part design for
 rkflash

1.Using internal vendor strategy for slc nand and spi nand storage;
2.Using outernal vendor strategy for spi nor;
3.Rejust rkflash_debug design.
4.Remove gcc -g

Change-Id: Ib5eca61a7a600f99d438448e4b7f03dd3dddb5f2
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/Makefile               |     4 +-
 drivers/rkflash/flash.h                |     2 -
 drivers/rkflash/ftl_flash_plat.c       |   132 -
 drivers/rkflash/ftl_include.h          |    51 -
 drivers/rkflash/nand_boot.c            |    15 +-
 drivers/rkflash/nandc.c                |     2 +-
 drivers/rkflash/rk_sftl.h              |    19 +-
 drivers/rkflash/rk_sftl_arm_v7.S       | 38510 +++--------------------
 drivers/rkflash/rk_sftl_arm_v7_thumb.S | 36868 +++-------------------
 drivers/rkflash/rk_sftl_arm_v8.S       | 34395 +++-----------------
 drivers/rkflash/rkflash_api.h          |     4 +
 drivers/rkflash/rkflash_blk.c          |    33 +-
 drivers/rkflash/rkflash_blk.h          |     3 +
 drivers/rkflash/rkflash_debug.c        |    11 +-
 drivers/rkflash/rkflash_debug.h        |    56 +-
 drivers/rkflash/sfc_nand.c             |     2 +-
 drivers/rkflash/sfc_nand.h             |     3 +
 drivers/rkflash/sfc_nand_boot.c        |    13 +-
 drivers/rkflash/sfc_nor_boot.c         |     1 -
 drivers/rkflash/typedef.h              |    11 -
 20 files changed, 13890 insertions(+), 96245 deletions(-)
 delete mode 100644 drivers/rkflash/ftl_flash_plat.c
 delete mode 100644 drivers/rkflash/ftl_include.h

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index cf11289493bc2..1316075e14358 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 
-obj-$(CONFIG_RK_NANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_debug.o nand_boot.o  flash.o nandc.o ftl_flash_plat.o
-obj-$(CONFIG_RK_SFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nand_boot.o sfc_nand.o sfc.o ftl_flash_plat.o
+obj-$(CONFIG_RK_NANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_debug.o nand_boot.o flash.o nandc.o
+obj-$(CONFIG_RK_SFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nand_boot.o sfc_nand.o sfc.o
 obj-$(CONFIG_RK_SFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nor_boot.o sfc_nor.o sfc.o
 obj-$(CONFIG_RK_SFC_NOR_MTD) += sfc_nor_mtd.o
 
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index ce8145794586e..4c5771219d71c 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -5,8 +5,6 @@
 #ifndef __FLASH_H
 #define __FLASH_H
 
-#include "typedef.h"
-
 #ifndef BIT
 #define BIT(nr)			(1 << (nr))
 #endif
diff --git a/drivers/rkflash/ftl_flash_plat.c b/drivers/rkflash/ftl_flash_plat.c
deleted file mode 100644
index 16a1d4fecb107..0000000000000
--- a/drivers/rkflash/ftl_flash_plat.c
+++ /dev/null
@@ -1,132 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-
-#include "flash_com.h"
-
-struct nand_phy_info	g_nand_phy_info;
-struct nand_ops		g_nand_ops;
-
-static u32 check_buf[MAX_FLASH_PAGE_SIZE / 4];
-static u32 check_spare_buf[MAX_FLASH_PAGE_SIZE / 8 / 4];
-static u32 pg_buf0[MAX_FLASH_PAGE_SIZE / 4];
-
-void *ftl_malloc(int size)
-{
-	return kmalloc(size, GFP_KERNEL | GFP_DMA);
-}
-
-void ftl_free(void *buf)
-{
-	kfree(buf);
-}
-
-static u32 l2p_addr_tran(struct nand_req *req, u32 *addr, u32 *p_die)
-{
-	u16 block_index, page_index;
-	u16 blk_per_die = g_nand_phy_info.blk_per_die;
-	u32 die_index;
-
-	block_index = (u16)((req[0].page_addr >> BLOCK_ADDR_BITS) &
-			    BLOCK_ADDR_MASK);
-	page_index = (u16)(req[0].page_addr & PAGE_ADDR_MASK);
-	die_index = (u16)((req[0].page_addr >> DIE_ADDR_BITS) &
-			  DIE_ADDR_MASK);
-	*p_die = die_index;
-	*addr = (block_index + blk_per_die * die_index) *
-		g_nand_phy_info.page_per_blk + page_index;
-	return 0;
-}
-
-s32 ftl_flash_prog_pages(void *request, u32 num_req, u32 flash_type, u32 check)
-{
-	u32 i, cs, status, addr;
-	struct nand_req *req = (struct nand_req *)request;
-
-	for (i = 0; i < num_req; i++) {
-		l2p_addr_tran(&req[i], &addr, &cs);
-		status = g_nand_ops.prog_page(cs,
-					      addr,
-					      req[i].p_data,
-					      req[i].p_spare);
-		req[i].status = status;
-		if (status != NAND_STS_OK)
-			req[i].status = NAND_STS_ECC_ERR;
-	}
-
-	if (check == 0)
-		return 0;
-	for (i = 0; i < num_req; i++) {
-		l2p_addr_tran(&req[i], &addr, &cs);
-		status = g_nand_ops.read_page(cs,
-					      addr,
-					      check_buf,
-					      check_spare_buf);
-		if (status != NAND_STS_ECC_ERR)
-			req[i].status = NAND_STS_OK;
-		if (check_buf[0] != req[i].p_data[0])
-			req[i].status = NAND_STS_ECC_ERR;
-	}
-	return 0;
-}
-
-s32 ftl_flash_read_pages(void *request, u32 num_req, u32 flash_type)
-{
-	u32 i, cs, status, addr;
-	struct nand_req *req = (struct nand_req *)request;
-
-	for (i = 0; i < num_req; i++) {
-		l2p_addr_tran(&req[i], &addr, &cs);
-		status = g_nand_ops.read_page(cs,
-					      addr,
-					      req[i].p_data,
-					      req[i].p_spare);
-		req[i].status = status;
-	}
-	return OK;
-}
-
-s32 ftl_flash_erase_blocks(void *request, u32 num_req)
-{
-	u32 i, cs, status, addr;
-	struct nand_req *req = (struct nand_req *)request;
-
-	for (i = 0; i < num_req; i++) {
-		l2p_addr_tran(&req[i], &addr, &cs);
-		status = g_nand_ops.erase_blk(cs, addr);
-		req[i].status = status;
-		if (status != NAND_STS_OK)
-			req[i].status = NAND_STS_ECC_ERR;
-	}
-	return OK;
-}
-
-s32 ftl_flash_get_bad_blk_list(u16 *table, u32 die)
-{
-	return g_nand_ops.get_bad_blk_list(table, die);
-}
-
-s32 ftl_flash_test_blk(u16 phy_block)
-{
-	s32 sts = 0;
-	u32 spare[16];
-	struct nand_req req;
-
-	req.p_data = pg_buf0;
-	req.p_spare = spare;
-	memset(spare, 0xA5, 32);
-	memset(pg_buf0, 0x5A, 8);
-	req.page_addr = phy_block << BLOCK_ADDR_BITS;
-	ftl_flash_erase_blocks((void *)&req, 1);
-	ftl_flash_prog_pages((void *)&req, 1, SLC, 1);
-	if (req.status == NAND_STS_ECC_ERR) {
-		PRINT_E("%s %x is bad block\n", __func__, phy_block);
-		sts = -1;
-	}
-	ftl_flash_erase_blocks((void *)&req, 1);
-
-	return sts;
-}
diff --git a/drivers/rkflash/ftl_include.h b/drivers/rkflash/ftl_include.h
deleted file mode 100644
index f9967e323f6df..0000000000000
--- a/drivers/rkflash/ftl_include.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-
-/* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
-
-#ifndef _FTL_INCLUDE_
-#define _FTL_INCLUDE_
-
-#include <linux/kernel.h>
-
-#include "flash_com.h"
-#include "typedef.h"
-
-#define ENABLE_LOW_FORMAT
-#define SYS_FTL_VERSION  "ftl_ver 1.2.2"
-
-/*
- * debug
- */
-#define FTL_DEBUG_LEVEL		D_INF
-#define FTL_DEBUG(level, format, arg...)	\
-	do {\
-		if ((level) <= FTL_DEBUG_LEVEL) {\
-			pr_info(format, ##arg);\
-		} \
-	} while (0)
-
-#define D_ERR	0
-#define D_WAN	1
-#define D_INF	2
-#define D_DBG	3
-
-/* For init, load, recovery, flush_all */
-#define FTL_DBG_GLB	D_DBG
-/* For open_blk, erase_blk, write_trace_page, get_trace_list */
-#define FTL_DBG_BLK	(FTL_DBG_GLB + 1)
-/* For flush 1 cache, write page */
-#define FTL_DBG_PAGE	(FTL_DBG_GLB + 2)
-/* For lookup/update l2p */
-#define FTL_DBG_MAP	(FTL_DBG_GLB + 3)
-
-#define FTL_DEBUG_BREAK(exp)		\
-	do {							\
-		if (exp) {					\
-			FTL_DEBUG(0, "FILE: %s:%d:\n", __FILE__, __LINE__);\
-			dump_ftl_info();\
-			while (1)\
-				;\
-		}	\
-	} while (0)
-
-#endif
diff --git a/drivers/rkflash/nand_boot.c b/drivers/rkflash/nand_boot.c
index 1a9abc99f79f9..864c2bdbaf2fe 100644
--- a/drivers/rkflash/nand_boot.c
+++ b/drivers/rkflash/nand_boot.c
@@ -8,7 +8,6 @@
 #include "flash.h"
 #include "rkflash_api.h"
 #include "rk_sftl.h"
-#include "typedef.h"
 
 int sftl_flash_init(void __iomem *reg_addr)
 {
@@ -33,14 +32,24 @@ unsigned int sftl_flash_get_capacity(void)
 	return sftl_get_density();
 }
 
+int sftl_flash_read(u32 sec, u32 n_sec, void *p_data)
+{
+	return sftl_read(sec, n_sec, p_data);
+}
+
 int sftl_flash_write(u32 sec, u32 n_sec, void *p_data)
 {
 	return sftl_write(sec, n_sec, p_data);
 }
 
-int sftl_flash_read(u32 sec, u32 n_sec, void *p_data)
+int sftl_flash_vendor_read(u32 sec, u32 n_sec, void *p_data)
 {
-	return sftl_read(sec, n_sec, p_data);
+	return sftl_vendor_read(sec, n_sec, p_data);
+}
+
+int sftl_flash_vendor_write(u32 sec, u32 n_sec, void *p_data)
+{
+	return sftl_vendor_write(sec, n_sec, p_data);
 }
 
 void sftl_flash_deinit(void)
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index 78a286e63829d..622db477c0cb2 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -8,7 +8,7 @@
 #include "flash.h"
 #include "flash_com.h"
 #include "nandc.h"
-#include "typedef.h"
+#include "rk_sftl.h"
 
 #define     CPU_DELAY_NS(n)	ndelay(n)
 
diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index 7412fd49db780..a5d8f9661eba1 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -12,5 +12,22 @@ int sftl_read(u32 index, u32 count, u8 *buf);
 int sftl_write(u32 index, u32 count, u8 *buf);
 u32 sftl_get_density(void);
 s32 sftl_gc(void);
-
+int sftl_vendor_read(u32 index, u32 count, u8 *buf);
+int sftl_vendor_write(u32 index, u32 count, u8 *buf);
+int rk_sftl_vendor_read(u32 index, u32 count, u8 *buf);
+int rk_sftl_vendor_write(u32 index, u32 count, u8 *buf);
+int rk_sftl_vendor_register(void);
+int rk_sftl_vendor_storage_init(void);
+int rk_sftl_vendor_dev_ops_register(int (*read)(u32 sec,
+						u32 n_sec,
+						void *p_data),
+				    int (*write)(u32 sec,
+						 u32 n_sec,
+						 void *p_data));
+void *ftl_malloc(int n_size);
+void ftl_free(void *p);
+void *ftl_memset(void *s, int c, unsigned int n);
+void *ftl_memcpy(void *pv_to,
+		 const void *pv_from,
+		 unsigned int size);
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index aa0bfb0d9e218..9332ff8827c25 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,92 +2,50 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-14
+ * date: 2018-07-19
  */
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
 	.global	__udivsi3
+	.text
 	.align	2
 	.syntax unified
 	.arm
 	.fpu softvfp
 	.type	l2p_addr_tran, %function
 l2p_addr_tran:
-.LFB271:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 18 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL0:
 	mov	ip, sp
-.LCFI0:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-.LCFI1:
 	sub	fp, ip, #4
-.LCFI2:
-	.loc 1 25 0
 	ldr	r3, .L3
-	.loc 1 18 0
 	mov	r8, r1
 	mov	r9, r2
-	.loc 1 32 0
 	ldr	r6, [r0, #4]
-.LVL1:
-	.loc 1 25 0
 	ldrh	r4, [r3, #8]
-.LVL2:
-	.loc 1 26 0
 	ldrh	r5, [r3, #10]
-.LVL3:
-	.loc 1 27 0
 	ldrh	r3, [r3, #14]
-	.loc 1 33 0
 	lsr	r7, r6, #10
-	.loc 1 37 0
 	ubfx	r6, r6, #0, #10
-.LVL4:
-	.loc 1 27 0
 	cmp	r3, #4
-	.loc 1 34 0
 	uxth	r0, r7
-.LVL5:
-	.loc 1 28 0
 	lsreq	r4, r4, #1
-	.loc 1 29 0
 	lsleq	r5, r5, #1
-.LVL6:
-	.loc 1 35 0
 	uxth	r7, r7
-	.loc 1 34 0
 	mov	r1, r4
-.LVL7:
-	.loc 1 29 0
 	uxtheq	r5, r5
-.LVL8:
-	.loc 1 34 0
 	bl	__udivsi3
-.LVL9:
 	uxth	r0, r0
-.LVL10:
-	.loc 1 35 0
 	mls	r4, r0, r4, r7
-.LVL11:
-	.loc 1 37 0
 	mla	r4, r5, r4, r6
-.LVL12:
 	str	r4, [r8]
-	.loc 1 38 0
 	str	r0, [r9]
-	.loc 1 41 0
 	mov	r0, #0
-.LVL13:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 .L4:
 	.align	2
 .L3:
-	.word	g_nand_phy_info
-.LFE271:
+	.word	.LANCHOR0
 	.size	l2p_addr_tran, .-l2p_addr_tran
 	.align	2
 	.syntax unified
@@ -95,25 +53,16 @@ l2p_addr_tran:
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-.LFB286:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL14:
 	mov	ip, sp
-.LCFI3:
 	push	{fp, ip, lr, pc}
-.LCFI4:
 	sub	fp, ip, #4
-.LCFI5:
-	.loc 2 1398 0
 	ldr	r3, .L6
 	lsr	r1, r0, #5
 	mov	ip, #1
 	and	r0, r0, #31
-.LVL15:
-	ldr	r2, [r3]
+	ldr	r2, [r3, #24]
 	ldr	r3, [r2, r1, lsl #2]
 	orr	r0, r3, ip, lsl r0
 	str	r0, [r2, r1, lsl #2]
@@ -122,7 +71,6 @@ ftl_set_blk_mode.part.6:
 	.align	2
 .L6:
 	.word	.LANCHOR0
-.LFE286:
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.align	2
 	.global	Ftl_log2
@@ -131,41 +79,24 @@ ftl_set_blk_mode.part.6:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB152:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 127 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL16:
 	mov	ip, sp
-.LCFI6:
 	push	{fp, ip, lr, pc}
-.LCFI7:
 	sub	fp, ip, #4
-.LCFI8:
-	.loc 3 131 0
 	mov	r1, #0
-	.loc 3 129 0
 	mov	r2, #1
-.LVL17:
 .L9:
-	.loc 3 131 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
 	bls	.L10
-	.loc 3 133 0
 	sub	r0, r3, #1
-.LVL18:
-	.loc 3 135 0
 	uxth	r0, r0
 	ldmfd	sp, {fp, sp, pc}
-.LVL19:
 .L10:
-	.loc 3 132 0 discriminator 3
 	lsl	r2, r2, #1
 	b	.L9
-.LFE152:
 	.size	Ftl_log2, .-Ftl_log2
 	.align	2
 	.global	FtlPrintInfo
@@ -174,19 +105,12 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB153:
-	.loc 3 159 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL20:
 	mov	ip, sp
-.LCFI9:
 	push	{fp, ip, lr, pc}
-.LCFI10:
 	sub	fp, ip, #4
-.LCFI11:
 	ldmfd	sp, {fp, sp, pc}
-.LFE153:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.align	2
 	.global	FtlSysBlkNumInit
@@ -195,53 +119,31 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB154:
-	.loc 3 165 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL21:
-	.loc 3 165 0
 	mov	ip, sp
-.LCFI12:
 	push	{fp, ip, lr, pc}
-.LCFI13:
 	sub	fp, ip, #4
-.LCFI14:
-	.loc 3 168 0
 	ldr	r3, .L13
-	.loc 3 165 0
 	uxth	r0, r0
-	.loc 3 169 0
-	ldrh	r2, [r3, #8]
+	ldrh	r2, [r3, #32]
 	cmp	r0, #24
-	.loc 3 170 0
-	ldrh	r1, [r3, #18]
+	ldrh	r1, [r3, #42]
 	movcc	r0, #24
-	.loc 3 168 0
-	str	r0, [r3, #4]
-	.loc 3 169 0
+	str	r0, [r3, #28]
 	mul	r2, r0, r2
-	.loc 3 170 0
 	sub	r0, r1, r0
-.LVL22:
-	.loc 3 171 0
-	ldr	r1, [r3, #24]
-	.loc 3 170 0
-	strh	r0, [r3, #16]	@ movhi
-	.loc 3 174 0
+	ldr	r1, [r3, #48]
+	strh	r0, [r3, #40]	@ movhi
 	mov	r0, #0
-	.loc 3 169 0
-	str	r2, [r3, #12]
-	.loc 3 171 0
+	str	r2, [r3, #36]
 	sub	r2, r1, r2
-	str	r2, [r3, #20]
-	.loc 3 174 0
+	str	r2, [r3, #44]
 	ldmfd	sp, {fp, sp, pc}
 .L14:
 	.align	2
 .L13:
 	.word	.LANCHOR0
-.LFE154:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__divsi3
 	.align	2
@@ -251,232 +153,131 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB155:
-	.loc 3 183 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL23:
 	mov	ip, sp
-.LCFI15:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI16:
 	sub	fp, ip, #4
-.LCFI17:
 	sub	sp, sp, #4
-	.loc 3 183 0
 	mov	r7, r0
-	.loc 3 191 0
 	ldrh	r2, [r7, #14]
-	.loc 3 188 0
 	ldr	r4, .L25
-	.loc 3 197 0
 	ldr	ip, .L25+4
-	.loc 3 191 0
 	cmp	r2, #4
-	.loc 3 188 0
 	ldrh	r1, [r0]
-	.loc 3 192 0
 	ldrheq	r2, [r7, #6]
-	.loc 3 189 0
 	ldrh	r6, [r0, #2]
-	.loc 3 190 0
 	ldrh	r0, [r0, #4]
-.LVL24:
-	.loc 3 188 0
-	strh	r1, [r4, #28]	@ movhi
-	.loc 3 192 0
+	strh	r1, [r4, #52]	@ movhi
 	lsreq	r2, r2, #1
-	.loc 3 189 0
-	strh	r6, [r4, #30]	@ movhi
-	.loc 3 190 0
-	strh	r0, [r4, #32]	@ movhi
-	.loc 3 192 0
-	strheq	r2, [r4, #18]	@ movhi
-	.loc 3 193 0
+	strh	r6, [r4, #54]	@ movhi
+	strh	r0, [r4, #56]	@ movhi
+	strheq	r2, [r4, #42]	@ movhi
 	moveq	r2, #8
-	strheq	r2, [r4, #34]	@ movhi
-	.loc 3 183 0
+	strheq	r2, [r4, #58]	@ movhi
 	mov	r2, #0
-.LVL25:
 .L17:
-	.loc 3 197 0 discriminator 3
 	strb	r2, [r2, ip]
-	.loc 3 196 0 discriminator 3
 	add	r2, r2, #1
 	cmp	r2, #32
 	bne	.L17
-	.loc 3 205 0
-	ldrh	r5, [r4, #18]
-	.loc 3 204 0
+	ldrh	r5, [r4, #42]
 	smulbb	r6, r6, r0
-	.loc 3 198 0
 	mov	r2, #5
-.LVL26:
-	.loc 3 200 0
 	cmp	r1, #1
-	.loc 3 202 0
 	mov	ip, #640
-	.loc 3 204 0
 	uxth	r6, r6
-	.loc 3 198 0
-	strh	r2, [r4, #68]	@ movhi
-	.loc 3 205 0
+	strh	r2, [r4, #92]	@ movhi
 	smulbb	r0, r0, r5
-	.loc 3 199 0
 	mov	r2, #0
-	.loc 3 201 0
-	strheq	r1, [r4, #68]	@ movhi
-	.loc 3 202 0
-	strh	ip, [r4, #72]	@ movhi
-	.loc 3 205 0
+	strheq	r1, [r4, #92]	@ movhi
+	strh	ip, [r4, #96]	@ movhi
 	uxth	r0, r0
-	.loc 3 202 0
 	str	ip, [fp, #-44]
-	.loc 3 199 0
-	strh	r2, [r4, #70]	@ movhi
-	.loc 3 204 0
-	strh	r6, [r4, #8]	@ movhi
-	.loc 3 205 0
-	strh	r0, [r4, #74]	@ movhi
-	.loc 3 206 0
+	strh	r2, [r4, #94]	@ movhi
+	strh	r6, [r4, #32]	@ movhi
+	strh	r0, [r4, #98]	@ movhi
 	bl	Ftl_log2
-.LVL27:
-	.loc 3 207 0
 	ldrh	r9, [r7, #12]
-	.loc 3 210 0
-	ldrh	r10, [r4, #34]
-	.loc 3 206 0
-	strh	r0, [r4, #76]	@ movhi
-	.loc 3 207 0
-	strh	r9, [r4, #78]	@ movhi
-	.loc 3 209 0
+	ldrh	r10, [r4, #58]
+	strh	r0, [r4, #100]	@ movhi
+	strh	r9, [r4, #102]	@ movhi
 	smulbb	r2, r6, r9
-	.loc 3 210 0
 	mov	r0, r10
-	.loc 3 208 0
-	strh	r9, [r4, #80]	@ movhi
-	.loc 3 209 0
-	strh	r2, [r4, #82]	@ movhi
-	.loc 3 210 0
+	strh	r9, [r4, #104]	@ movhi
+	strh	r2, [r4, #106]	@ movhi
 	bl	Ftl_log2
-.LVL28:
-	.loc 3 214 0
 	ldrh	r3, [r7, #20]
-	.loc 3 212 0
 	lsl	r2, r10, #9
-	.loc 3 210 0
 	mov	r8, r0
-	strh	r0, [r4, #84]	@ movhi
-	.loc 3 212 0
+	strh	r0, [r4, #108]	@ movhi
 	uxth	r2, r2
-	.loc 3 218 0
 	mul	r1, r9, r10
-	.loc 3 214 0
-	strh	r3, [r4, #90]	@ movhi
-	.loc 3 218 0
+	strh	r3, [r4, #114]	@ movhi
 	mov	r0, #5120
-	.loc 3 216 0
 	mul	r3, r5, r6
-	.loc 3 212 0
-	strh	r2, [r4, #86]	@ movhi
-	.loc 3 213 0
+	strh	r2, [r4, #110]	@ movhi
 	lsr	r2, r2, #8
-	.loc 3 223 0
 	lsl	r5, r5, #6
-	.loc 3 213 0
-	strh	r2, [r4, #88]	@ movhi
-	.loc 3 216 0
-	str	r3, [r4, #24]
-	.loc 3 217 0
+	strh	r2, [r4, #112]	@ movhi
+	str	r3, [r4, #48]
 	mul	r3, r10, r3
 	mul	r3, r9, r3
 	asr	r3, r3, #11
-	str	r3, [r4, #92]
-	.loc 3 218 0
+	str	r3, [r4, #116]
 	bl	__divsi3
-.LVL29:
 	ldr	ip, [fp, #-44]
 	uxth	r0, r0
-	.loc 3 226 0
 	mov	r1, r6
-	.loc 3 219 0
 	cmp	r0, #4
-	.loc 3 220 0
 	movls	r3, #4
-	.loc 3 218 0
-	strhhi	r0, [r4, #96]	@ movhi
-	.loc 3 221 0
+	strhhi	r0, [r4, #120]	@ movhi
 	asr	r7, ip, r8
-.LVL30:
-	.loc 3 223 0
 	add	r8, r8, #9
 	asr	r5, r5, r8
-	.loc 3 220 0
-	strhls	r3, [r4, #96]	@ movhi
-	.loc 3 221 0
+	strhls	r3, [r4, #120]	@ movhi
 	add	r7, r7, #2
-	.loc 3 226 0
-	ldrh	r0, [r4, #96]
-	.loc 3 223 0
-	strh	r5, [r4, #100]	@ movhi
+	ldrh	r0, [r4, #120]
+	strh	r5, [r4, #124]	@ movhi
 	uxth	r5, r5
-	.loc 3 221 0
-	strh	r7, [r4, #98]	@ movhi
-	.loc 3 224 0
+	strh	r7, [r4, #122]	@ movhi
 	mul	r3, r6, r5
-	.loc 3 226 0
 	add	r5, r5, #8
-	.loc 3 224 0
-	str	r3, [r4, #104]
-	.loc 3 226 0
+	str	r3, [r4, #128]
 	bl	__udivsi3
-.LVL31:
 	uxtah	r0, r5, r0
-	.loc 3 227 0
 	cmp	r6, #1
-	.loc 3 228 0
 	addeq	r0, r0, #4
-	str	r0, [r4, #4]
-	.loc 3 231 0
-	ldrh	r0, [r4, #4]
+	str	r0, [r4, #28]
+	ldrh	r0, [r4, #28]
 	bl	FtlSysBlkNumInit
-.LVL32:
-	.loc 3 232 0
-	ldr	r3, [r4, #4]
-	.loc 3 236 0
+	ldr	r3, [r4, #28]
 	mov	r0, #0
-	str	r0, [r4, #116]
-	.loc 3 232 0
-	str	r3, [r4, #108]
-	.loc 3 234 0
-	ldr	r3, [r4, #20]
+	str	r0, [r4, #140]
+	str	r3, [r4, #132]
+	ldr	r3, [r4, #44]
 	lsl	r2, r3, #2
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r4, #102]
 	mul	r3, r3, r2
-	ldrh	r2, [r4, #84]
+	ldrh	r2, [r4, #108]
 	add	r2, r2, #9
 	lsr	r3, r3, r2
 	add	r3, r3, #2
-	strh	r3, [r4, #112]	@ movhi
-	.loc 3 235 0
+	strh	r3, [r4, #136]	@ movhi
 	mov	r3, #32
-	strh	r3, [r4, #114]	@ movhi
-	.loc 3 237 0
-	ldrh	r3, [r4, #96]
+	strh	r3, [r4, #138]	@ movhi
+	ldrh	r3, [r4, #120]
 	add	r3, r3, #3
-	strh	r3, [r4, #96]	@ movhi
-	.loc 3 238 0
-	ldr	r3, [r4, #104]
+	strh	r3, [r4, #120]	@ movhi
+	ldr	r3, [r4, #128]
 	add	r3, r3, #3
-	str	r3, [r4, #104]
-	.loc 3 263 0
+	str	r3, [r4, #128]
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .L26:
 	.align	2
 .L25:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+36
-.LFE155:
+	.word	.LANCHOR0+60
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.align	2
 	.global	IsBlkInVendorPart
@@ -485,66 +286,36 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB158:
-	.loc 3 514 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL33:
 	mov	ip, sp
-.LCFI18:
 	push	{fp, ip, lr, pc}
-.LCFI19:
 	sub	fp, ip, #4
-.LCFI20:
-	.loc 3 517 0
 	ldr	r2, .L33
-	.loc 3 514 0
 	uxth	r1, r0
-.LVL34:
-	.loc 3 517 0
-	ldrh	r0, [r2, #120]
+	ldrh	r0, [r2, #144]
 	cmp	r0, #0
-.LBB222:
-.LBB223:
-	.loc 3 519 0
-	ldrne	r3, [r2, #124]
-	ldrhne	r2, [r2, #96]
+	ldrne	r3, [r2, #148]
+	ldrhne	r2, [r2, #120]
 	addne	r2, r3, r2, lsl #1
-.LBE223:
-.LBE222:
-	.loc 3 517 0
 	bne	.L29
 	ldmfd	sp, {fp, sp, pc}
 .L30:
-.LBB226:
-.LBB224:
-	.loc 3 519 0
 	ldrh	r0, [r3], #2
 	cmp	r1, r0
 	beq	.L32
 .L29:
-	.loc 3 518 0
 	cmp	r3, r2
 	bne	.L30
-.LBE224:
-.LBE226:
-	.loc 3 524 0
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
 .L32:
-.LBB227:
-.LBB225:
-	.loc 3 520 0
 	mov	r0, #1
-.LBE225:
-.LBE227:
-	.loc 3 525 0
 	ldmfd	sp, {fp, sp, pc}
 .L34:
 	.align	2
 .L33:
 	.word	.LANCHOR0
-.LFE158:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	2
 	.global	sftl_get_density
@@ -553,25 +324,18 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB171:
-	.loc 3 1214 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI21:
 	push	{fp, ip, lr, pc}
-.LCFI22:
 	sub	fp, ip, #4
-.LCFI23:
-	.loc 3 1216 0
 	ldr	r3, .L36
-	ldr	r0, [r3, #116]
+	ldr	r0, [r3, #140]
 	ldmfd	sp, {fp, sp, pc}
 .L37:
 	.align	2
 .L36:
 	.word	.LANCHOR0
-.LFE171:
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__umodsi3
 	.align	2
@@ -581,68 +345,46 @@ sftl_get_density:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB172:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL35:
 	mov	ip, sp
-.LCFI24:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI25:
 	sub	fp, ip, #4
-.LCFI26:
 	sub	sp, sp, #4
-	.loc 4 5 0
 	uxth	r5, r0
-.LVL36:
-	.loc 4 10 0
 	ldr	r4, .L39
 	mov	r0, r5
-	ldrh	r7, [r4, #74]
+	ldrh	r7, [r4, #98]
 	mov	r1, r7
 	bl	__udivsi3
-.LVL37:
 	uxth	r6, r0
-.LVL38:
 	mov	r1, r7
 	mov	r0, r5
 	bl	__umodsi3
-.LVL39:
-	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r0
-	.loc 4 15 0
-	ldr	r2, [r2, #156]
+	ldr	r2, [r2, #180]
 	lsr	r0, r3, #5
 	and	ip, r3, #31
 	mov	lr, #1
 	ldr	r1, [r2, r0, lsl #2]
 	orr	r1, r1, lr, lsl ip
 	str	r1, [r2, r0, lsl #2]
-	.loc 4 16 0
 	mov	r2, r6
 	str	r1, [sp]
 	mov	r1, r5
 	ldr	r0, .L39+4
 	bl	printk
-.LVL40:
-	.loc 4 17 0
-	ldrh	r3, [r4, #134]
-	.loc 4 19 0
+	ldrh	r3, [r4, #158]
 	mov	r0, #0
-	.loc 4 17 0
 	add	r3, r3, #1
-	strh	r3, [r4, #134]	@ movhi
-	.loc 4 19 0
+	strh	r3, [r4, #158]	@ movhi
 	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L40:
 	.align	2
 .L39:
 	.word	.LANCHOR0
 	.word	.LC0
-.LFE172:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.align	2
 	.global	FtlBbmIsBadBlock
@@ -651,59 +393,34 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB173:
-	.loc 4 24 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL41:
 	mov	ip, sp
-.LCFI27:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI28:
 	sub	fp, ip, #4
-.LCFI29:
-	.loc 4 30 0
 	ldr	r5, .L42
-	.loc 4 24 0
 	uxth	r6, r0
-.LVL42:
-	.loc 4 30 0
-	ldrh	r7, [r5, #74]
-	.loc 4 31 0
+	ldrh	r7, [r5, #98]
 	mov	r0, r6
 	mov	r1, r7
 	bl	__umodsi3
-.LVL43:
-	.loc 4 30 0
 	mov	r1, r7
-	.loc 4 31 0
 	uxth	r4, r0
-.LVL44:
-	.loc 4 30 0
 	mov	r0, r6
 	bl	__udivsi3
-.LVL45:
 	uxth	r0, r0
-.LVL46:
-	.loc 4 34 0
 	lsr	r2, r4, #5
-	.loc 4 33 0
 	add	r5, r5, r0, lsl #2
-	.loc 4 34 0
 	and	r4, r4, #31
-.LVL47:
-	ldr	r3, [r5, #156]
+	ldr	r3, [r5, #180]
 	ldr	r0, [r3, r2, lsl #2]
-.LVL48:
 	lsr	r0, r0, r4
-	.loc 4 36 0
 	and	r0, r0, #1
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L43:
 	.align	2
 .L42:
 	.word	.LANCHOR0
-.LFE173:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.align	2
 	.global	FtlBbtInfoPrint
@@ -712,18 +429,12 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB174:
-	.loc 4 39 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI30:
 	push	{fp, ip, lr, pc}
-.LCFI31:
 	sub	fp, ip, #4
-.LCFI32:
 	ldmfd	sp, {fp, sp, pc}
-.LFE174:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.align	2
 	.global	FtlBbtMemInit
@@ -732,50 +443,25 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB177:
-	.loc 4 149 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-	.loc 4 149 0
 	mov	ip, sp
-.LCFI33:
 	push	{fp, ip, lr, pc}
-.LCFI34:
 	sub	fp, ip, #4
-.LCFI35:
-	.loc 4 150 0
 	ldr	r0, .L46
 	mvn	r3, #0
-.LBB233:
-.LBB234:
-.LBB235:
-	.loc 1 202 0
 	mov	r2, #16
 	mov	r1, #255
-.LBE235:
-.LBE234:
-.LBE233:
-	.loc 4 150 0
-	strh	r3, [r0, #128]	@ movhi
-	.loc 4 151 0
+	strh	r3, [r0, #152]	@ movhi
 	mov	r3, #0
-	strh	r3, [r0, #134]	@ movhi
-.LBB238:
-.LBB237:
-.LBB236:
-	.loc 1 202 0
-	add	r0, r0, #140
+	strh	r3, [r0, #158]	@ movhi
+	add	r0, r0, #164
 	bl	memset
-.LVL49:
 	ldmfd	sp, {fp, sp, pc}
 .L47:
 	.align	2
 .L46:
 	.word	.LANCHOR0
-.LBE236:
-.LBE237:
-.LBE238:
-.LFE177:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.align	2
 	.global	FtlBbtCalcTotleCnt
@@ -784,40 +470,27 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB178:
-	.loc 4 157 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI36:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI37:
 	sub	fp, ip, #4
-.LCFI38:
-	.loc 4 160 0
 	ldr	r3, .L55
 	mov	r5, #0
-	.loc 4 159 0
 	mov	r4, r5
-	.loc 4 160 0
-	ldrh	r2, [r3, #74]
-	ldrh	r6, [r3, #30]
+	ldrh	r2, [r3, #98]
+	ldrh	r6, [r3, #54]
 	mul	r6, r6, r2
 .L49:
-	.loc 4 160 0 is_stmt 0 discriminator 1
 	uxth	r0, r5
 	cmp	r0, r6
 	blt	.L51
-	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
 .L51:
-	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL50:
 	cmp	r0, #0
 	add	r5, r5, #1
-	.loc 4 164 0
 	addne	r4, r4, #1
 	uxthne	r4, r4
 	b	.L49
@@ -825,7 +498,6 @@ FtlBbtCalcTotleCnt:
 	.align	2
 .L55:
 	.word	.LANCHOR0
-.LFE178:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.align	2
 	.global	V2P_block
@@ -834,48 +506,32 @@ FtlBbtCalcTotleCnt:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-.LFB182:
-	.loc 2 5 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL51:
 	mov	ip, sp
-.LCFI39:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI40:
 	sub	fp, ip, #4
-.LCFI41:
-	.loc 2 8 0
 	ldr	r4, .L58
-	.loc 2 5 0
 	uxth	r7, r0
-.LVL52:
 	uxth	r5, r1
-.LVL53:
-	.loc 2 8 0
-	ldrh	r6, [r4, #32]
+	ldrh	r6, [r4, #56]
 	mov	r0, r7
 	mov	r1, r6
 	bl	__udivsi3
-.LVL54:
-	ldrh	r4, [r4, #74]
+	ldrh	r4, [r4, #98]
 	smulbb	r5, r6, r5
-.LVL55:
 	mov	r1, r6
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__umodsi3
-.LVL56:
 	add	r0, r5, r0
 	add	r0, r4, r0
-	.loc 2 10 0
 	uxth	r0, r0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L59:
 	.align	2
 .L58:
 	.word	.LANCHOR0
-.LFE182:
 	.size	V2P_block, .-V2P_block
 	.align	2
 	.global	P2V_plane
@@ -884,42 +540,28 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB183:
-	.loc 2 13 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL57:
 	mov	ip, sp
-.LCFI42:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI43:
 	sub	fp, ip, #4
-.LCFI44:
-	.loc 2 16 0
 	ldr	r3, .L61
-	.loc 2 13 0
 	uxth	r5, r0
-.LVL58:
-	.loc 2 16 0
-	ldrh	r6, [r3, #32]
+	ldrh	r6, [r3, #56]
 	mov	r0, r5
-	ldrh	r1, [r3, #74]
+	ldrh	r1, [r3, #98]
 	bl	__udivsi3
-.LVL59:
 	mov	r1, r6
 	smulbb	r4, r0, r6
 	mov	r0, r5
 	bl	__umodsi3
-.LVL60:
 	add	r0, r4, r0
-	.loc 2 18 0
 	uxth	r0, r0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
 .L62:
 	.align	2
 .L61:
 	.word	.LANCHOR0
-.LFE183:
 	.size	P2V_plane, .-P2V_plane
 	.align	2
 	.global	P2V_block_in_plane
@@ -928,37 +570,24 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB184:
-	.loc 2 21 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL61:
 	mov	ip, sp
-.LCFI45:
 	push	{r4, fp, ip, lr, pc}
-.LCFI46:
 	sub	fp, ip, #4
-.LCFI47:
-	.loc 2 24 0
 	ldr	r4, .L64
 	uxth	r0, r0
-.LVL62:
-	ldrh	r1, [r4, #74]
+	ldrh	r1, [r4, #98]
 	bl	__umodsi3
-.LVL63:
-	.loc 2 25 0
-	ldrh	r1, [r4, #32]
+	ldrh	r1, [r4, #56]
 	uxth	r0, r0
 	bl	__udivsi3
-.LVL64:
-	.loc 2 27 0
 	uxth	r0, r0
 	ldmfd	sp, {r4, fp, sp, pc}
 .L65:
 	.align	2
 .L64:
 	.word	.LANCHOR0
-.LFE184:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.align	2
 	.global	ftl_cmp_data_ver
@@ -967,38 +596,24 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB185:
-	.loc 2 31 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL65:
 	mov	ip, sp
-.LCFI48:
 	push	{fp, ip, lr, pc}
-.LCFI49:
 	sub	fp, ip, #4
-.LCFI50:
-	.loc 2 34 0
 	cmp	r0, r1
 	bls	.L67
-	.loc 2 36 0
 	sub	r0, r0, r1
-.LVL66:
 	cmp	r0, #-2147483648
 	movhi	r0, #0
 	movls	r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.LVL67:
 .L67:
-	.loc 2 40 0
 	sub	r0, r1, r0
-.LVL68:
 	cmp	r0, #-2147483648
 	movls	r0, #0
 	movhi	r0, #1
-	.loc 2 44 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE185:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.align	2
 	.global	FtlFreeSysBlkQueueInit
@@ -1007,62 +622,26 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB187:
-	.loc 2 76 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL69:
 	mov	ip, sp
-.LCFI51:
 	push	{r4, fp, ip, lr, pc}
-.LCFI52:
 	sub	fp, ip, #4
-.LCFI53:
-	.loc 2 79 0
 	ldr	r3, .L70
 	mov	r4, #0
-.LBB244:
-.LBB245:
-.LBB246:
-	.loc 1 202 0
 	mov	r1, #2048
-.LBE246:
-.LBE245:
-.LBE244:
-	.loc 2 82 0
-	strh	r0, [r3, #188]	@ movhi
-.LBB251:
-.LBB249:
-.LBB247:
-	.loc 1 202 0
-	add	r0, r3, #196
-.LVL70:
-.LBE247:
-.LBE249:
-.LBE251:
-	.loc 2 79 0
-	strh	r4, [r3, #190]	@ movhi
-	.loc 2 80 0
-	strh	r4, [r3, #192]	@ movhi
-	.loc 2 81 0
-	strh	r4, [r3, #194]	@ movhi
-.LBB252:
-.LBB250:
-.LBB248:
-	.loc 1 202 0
+	strh	r0, [r3, #212]	@ movhi
+	add	r0, r3, #220
+	strh	r4, [r3, #214]	@ movhi
+	strh	r4, [r3, #216]	@ movhi
+	strh	r4, [r3, #218]	@ movhi
 	bl	__memzero
-.LVL71:
-.LBE248:
-.LBE250:
-.LBE252:
-	.loc 2 85 0
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
 .L71:
 	.align	2
 .L70:
 	.word	.LANCHOR0
-.LFE187:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.align	2
 	.global	FtlFreeSysBlkQueueEmpty
@@ -1071,20 +650,13 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB188:
-	.loc 2 88 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI54:
 	push	{fp, ip, lr, pc}
-.LCFI55:
 	sub	fp, ip, #4
-.LCFI56:
-	.loc 2 89 0
 	ldr	r3, .L73
-	ldrh	r0, [r3, #194]
-	.loc 2 90 0
+	ldrh	r0, [r3, #218]
 	clz	r0, r0
 	lsr	r0, r0, #5
 	ldmfd	sp, {fp, sp, pc}
@@ -1092,7 +664,6 @@ FtlFreeSysBlkQueueEmpty:
 	.align	2
 .L73:
 	.word	.LANCHOR0
-.LFE188:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.align	2
 	.global	FtlFreeSysBlkQueueFull
@@ -1101,20 +672,13 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB189:
-	.loc 2 93 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI57:
 	push	{fp, ip, lr, pc}
-.LCFI58:
 	sub	fp, ip, #4
-.LCFI59:
-	.loc 2 94 0
 	ldr	r3, .L76
-	ldrh	r0, [r3, #194]
-	.loc 2 95 0
+	ldrh	r0, [r3, #218]
 	sub	r0, r0, #1024
 	clz	r0, r0
 	lsr	r0, r0, #5
@@ -1123,7 +687,6 @@ FtlFreeSysBlkQueueFull:
 	.align	2
 .L76:
 	.word	.LANCHOR0
-.LFE189:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.align	2
 	.global	FtlFreeSysBLkSort
@@ -1132,55 +695,39 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB191:
-	.loc 2 118 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI60:
 	push	{r4, fp, ip, lr, pc}
-.LCFI61:
 	sub	fp, ip, #4
-.LCFI62:
-	.loc 2 123 0
 	ldr	r3, .L87
-	ldrh	r2, [r3, #194]
+	ldrh	r2, [r3, #218]
 	cmp	r2, #0
 	ldmfdeq	sp, {r4, fp, sp, pc}
-	.loc 2 119 0
 	ldr	r2, .L87+4
 	mov	r4, #0
-	ldrh	r1, [r3, #190]
+	ldrh	r1, [r3, #214]
 	mov	lr, r4
 	ldrh	ip, [r2, #28]
-	ldrh	r2, [r3, #192]
+	ldrh	r2, [r3, #216]
 	and	ip, ip, #31
-.LVL72:
 .L80:
-	.loc 2 124 0 discriminator 1
 	uxth	r0, r4
 	add	r4, r4, #1
 	cmp	ip, r0
 	bgt	.L81
 	cmp	lr, #0
-	strhne	r1, [r3, #190]	@ movhi
-	strhne	r2, [r3, #192]	@ movhi
+	strhne	r1, [r3, #214]	@ movhi
+	strhne	r2, [r3, #216]	@ movhi
 	ldmfd	sp, {r4, fp, sp, pc}
 .L81:
-	.loc 2 125 0 discriminator 3
 	add	r0, r3, r1, lsl #1
-	.loc 2 126 0 discriminator 3
 	add	r1, r1, #1
 	ubfx	r1, r1, #0, #10
-	.loc 2 125 0 discriminator 3
-	ldrh	lr, [r0, #196]
-.LVL73:
-	.loc 2 127 0 discriminator 3
+	ldrh	lr, [r0, #220]
 	add	r0, r3, r2, lsl #1
-	strh	lr, [r0, #196]	@ movhi
+	strh	lr, [r0, #220]	@ movhi
 	mov	lr, #1
-.LVL74:
-	.loc 2 128 0 discriminator 3
 	add	r2, r2, lr
 	ubfx	r2, r2, #0, #10
 	b	.L80
@@ -1188,8 +735,7 @@ FtlFreeSysBLkSort:
 	.align	2
 .L87:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2244
-.LFE191:
+	.word	.LANCHOR0+2268
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.align	2
 	.global	IsInFreeQueue
@@ -1198,71 +744,40 @@ FtlFreeSysBLkSort:
 	.fpu softvfp
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB192:
-	.loc 2 163 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL75:
 	mov	ip, sp
-.LCFI63:
 	push	{fp, ip, lr, pc}
-.LCFI64:
 	sub	fp, ip, #4
-.LCFI65:
-.LBB253:
-.LBB254:
-	.loc 2 94 0
 	ldr	r3, .L95
-.LBE254:
-.LBE253:
-	.loc 2 163 0
 	uxth	r0, r0
-.LBB256:
-.LBB255:
-	.loc 2 94 0
-	ldrh	ip, [r3, #194]
-.LBE255:
-.LBE256:
-	.loc 2 168 0
+	ldrh	ip, [r3, #218]
 	cmp	ip, #1024
-	.loc 2 171 0
-	ldrhne	lr, [r3, #190]
+	ldrhne	lr, [r3, #214]
 	movne	r1, #0
-.LVL76:
-	.loc 2 168 0
 	bne	.L91
 .L93:
-	.loc 2 164 0
 	mov	r0, #0
-.LVL77:
 	ldmfd	sp, {fp, sp, pc}
-.LVL78:
 .L92:
-	.loc 2 171 0
 	add	r2, r1, lr
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
-	ldrh	r2, [r2, #196]
+	ldrh	r2, [r2, #220]
 	cmp	r2, r0
 	beq	.L94
-	.loc 2 170 0 discriminator 2
 	add	r1, r1, #1
 .L91:
-	.loc 2 170 0 is_stmt 0 discriminator 1
 	cmp	r1, ip
 	bcc	.L92
 	b	.L93
 .L94:
-	.loc 2 172 0 is_stmt 1
 	mov	r0, #1
-.LVL79:
-	.loc 2 178 0
 	ldmfd	sp, {fp, sp, pc}
 .L96:
 	.align	2
 .L95:
 	.word	.LANCHOR0
-.LFE192:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	2
 	.global	insert_data_list
@@ -1271,205 +786,114 @@ IsInFreeQueue:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB196:
-	.loc 2 249 0
 	@ args = 0, pretend = 0, frame = 12
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL80:
 	mov	ip, sp
-.LCFI66:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI67:
 	sub	fp, ip, #4
-.LCFI68:
 	sub	sp, sp, #12
-	.loc 2 249 0
 	uxth	r0, r0
-	.loc 2 260 0
 	ldr	r1, .L113
-	ldrh	r3, [r1, #16]
+	ldrh	r3, [r1, #40]
 	mov	lr, r1
 	cmp	r3, r0
 	bls	.L99
-.LBB259:
-.LBB260:
-	.loc 2 265 0
-	ldr	r6, [r1, #2292]
+	ldr	r6, [r1, #2316]
 	lsl	r5, r0, #3
-	.loc 2 266 0
 	mvn	ip, #0
-	.loc 2 265 0
 	add	r2, r6, r5
-.LVL81:
-	.loc 2 266 0
 	strh	ip, [r2, #2]	@ movhi
 	strh	ip, [r6, r5]	@ movhi
-	.loc 2 268 0
-	ldr	r3, [r1, #2296]
-.LVL82:
+	ldr	r3, [r1, #2320]
 	cmp	r3, #0
 	bne	.L100
-.LVL83:
 .L112:
-	.loc 2 317 0
-	str	r2, [r1, #2296]
+	str	r2, [r1, #2320]
 	b	.L99
-.LVL84:
 .L100:
-	.loc 2 273 0
-	ldr	r7, [r1, #2300]
+	ldr	r7, [r1, #2324]
 	lsl	r4, r0, #1
-	.loc 2 274 0
 	ldrh	r1, [r2, #4]
-	.loc 2 279 0
-	ldr	r10, [lr, #2292]
-	.loc 2 273 0
+	ldr	r10, [lr, #2316]
 	ldrh	r8, [r7, r4]
-.LVL85:
-	.loc 2 275 0
 	cmp	r1, #0
-	.loc 2 276 0
 	streq	ip, [fp, #-44]
-	.loc 2 274 0
 	mulne	r1, r1, r8
-.LVL86:
-	.loc 2 282 0
-	ldrh	r8, [lr, #16]
-.LVL87:
+	ldrh	r8, [lr, #40]
 	str	r8, [fp, #-48]
-	.loc 2 294 0
-	ldr	r8, [lr, #2304]
-	.loc 2 274 0
+	ldr	r8, [lr, #2328]
 	strne	r1, [fp, #-44]
-	.loc 2 279 0
 	sub	r1, r3, r10
-.LVL88:
 	ubfx	r1, r1, #3, #16
-	.loc 2 294 0
 	add	lr, r8, r4
 	str	lr, [fp, #-52]
-	.loc 2 256 0
 	mov	lr, #0
-.LVL89:
 .L108:
-	.loc 2 282 0
 	ldr	r4, [fp, #-48]
-	.loc 2 281 0
 	add	lr, lr, #1
-.LVL90:
 	uxth	lr, lr
-.LVL91:
-	.loc 2 282 0
 	cmp	lr, r4
 	movls	r4, #0
 	movhi	r4, #1
-	.loc 2 285 0
 	cmp	r0, r1
 	orreq	r4, r4, #1
 	cmp	r4, #0
 	bne	.L99
-	.loc 2 288 0
 	lsl	r9, r1, #1
 	ldrh	r4, [r7, r9]
-.LVL92:
 	mov	ip, r4
-	.loc 2 289 0
 	ldrh	r4, [r3, #4]
-.LVL93:
-	.loc 2 290 0
 	cmp	r4, #0
-	.loc 2 289 0
 	mulne	r4, r4, ip
-.LVL94:
-	.loc 2 293 0
 	ldr	ip, [fp, #-44]
-.LVL95:
-	.loc 2 291 0
 	mvneq	r4, #0
-	.loc 2 293 0
 	cmp	ip, r4
 	bne	.L104
-	.loc 2 294 0
 	ldr	ip, [fp, #-52]
-.LVL96:
 	ldrh	r9, [r8, r9]
 	ldrh	r4, [ip]
-.LVL97:
 	cmp	r9, r4
 	bcc	.L106
-.LVL98:
 .L105:
-	.loc 2 312 0
 	strh	r1, [r6, r5]	@ movhi
-	.loc 2 313 0
 	ldrh	r1, [r3, #2]
 	strh	r1, [r2, #2]	@ movhi
-	.loc 2 315 0
 	ldr	r1, .L113
-	ldr	ip, [r1, #2296]
-.LVL99:
+	ldr	ip, [r1, #2320]
 	cmp	r3, ip
 	bne	.L109
-	.loc 2 316 0
 	strh	r0, [r3, #2]	@ movhi
 	b	.L112
-.LVL100:
 .L104:
-	.loc 2 298 0
 	bcc	.L105
 .L106:
-	.loc 2 301 0
 	ldrh	r4, [r3]
-.LVL101:
 	movw	ip, #65535
-.LVL102:
 	cmp	r4, ip
 	bne	.L107
-	.loc 2 302 0
 	strh	r1, [r2, #2]	@ movhi
-	.loc 2 303 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 304 0
 	ldr	r3, .L113
-.LVL103:
-	str	r2, [r3, #2308]
-.LVL104:
+	str	r2, [r3, #2332]
 .L99:
-.LBE260:
-.LBE259:
-	.loc 2 323 0
 	mov	r0, #0
-.LVL105:
 	sub	sp, fp, #40
-.LCFI69:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL106:
 .L107:
-.LCFI70:
-.LBB262:
-.LBB261:
-	.loc 2 309 0
 	add	r3, r10, r4, lsl #3
 	mov	r1, r4
 	b	.L108
-.LVL107:
 .L109:
-	.loc 2 319 0
 	ldrh	r2, [r3, #2]
-.LVL108:
-	ldr	r1, [r1, #2292]
+	ldr	r1, [r1, #2316]
 	lsl	r2, r2, #3
 	strh	r0, [r1, r2]	@ movhi
-	.loc 2 320 0
 	strh	r0, [r3, #2]	@ movhi
 	b	.L99
 .L114:
 	.align	2
 .L113:
 	.word	.LANCHOR0
-.LBE261:
-.LBE262:
-.LFE196:
 	.size	insert_data_list, .-insert_data_list
 	.align	2
 	.global	INSERT_DATA_LIST
@@ -1478,40 +902,26 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB195:
-	.loc 2 218 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL109:
 	mov	ip, sp
-.LCFI71:
 	push	{fp, ip, lr, pc}
-.LCFI72:
 	sub	fp, ip, #4
-.LCFI73:
-	.loc 2 219 0
 	uxth	r0, r0
-.LVL110:
 	bl	insert_data_list
-.LVL111:
-	.loc 2 220 0
 	ldr	r2, .L117
-	movw	r1, #2312
-	ldrh	r3, [r2, r1]
+	add	r1, r2, #2336
+	ldrh	r2, [r2, #40]
+	ldrh	r3, [r1]
 	add	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, r1]	@ movhi
-	.loc 2 221 0
-	ldrh	r2, [r2, #16]
 	cmp	r2, r3
+	strh	r3, [r1]	@ movhi
 	ldmfdcs	sp, {fp, sp, pc}
-.LBB265:
-.LBB266:
 	mov	r2, #221
 	ldr	r1, .L117+4
 	ldr	r0, .L117+8
 	bl	printk
-.LVL112:
 	ldmfd	sp, {fp, sp, pc}
 .L118:
 	.align	2
@@ -1519,9 +929,6 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
-.LBE266:
-.LBE265:
-.LFE195:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.align	2
 	.global	insert_free_list
@@ -1530,111 +937,69 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB197:
-	.loc 2 326 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL113:
 	mov	ip, sp
-.LCFI74:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-.LCFI75:
 	sub	fp, ip, #4
-.LCFI76:
-	.loc 2 326 0
 	uxth	r0, r0
-	.loc 2 332 0
 	movw	lr, #65535
 	cmp	r0, lr
 	beq	.L120
-	.loc 2 335 0
 	ldr	r2, .L126
 	lsl	r5, r0, #3
-	.loc 2 336 0
 	mvn	r3, #0
-	.loc 2 335 0
-	ldr	r6, [r2, #2292]
+	ldr	r6, [r2, #2316]
 	mov	r1, r2
 	add	ip, r6, r5
-.LVL114:
-	.loc 2 336 0
 	strh	r3, [ip, #2]	@ movhi
 	strh	r3, [r6, r5]	@ movhi
-	.loc 2 338 0
-	ldr	r3, [r2, #2316]
-.LVL115:
+	ldr	r3, [r2, #2340]
 	cmp	r3, #0
-	.loc 2 339 0
-	streq	ip, [r2, #2316]
-	.loc 2 338 0
+	streq	ip, [r2, #2340]
 	beq	.L120
-	.loc 2 343 0
-	ldr	r8, [r2, #2304]
+	ldr	r8, [r2, #2328]
 	lsl	r2, r0, #1
-	.loc 2 345 0
-	ldr	r7, [r1, #2292]
-	.loc 2 352 0
+	ldr	r7, [r1, #2316]
 	mov	r4, lr
-	.loc 2 343 0
 	ldrh	r9, [r8, r2]
-.LVL116:
-	.loc 2 345 0
 	sub	r2, r3, r7
 	ubfx	r2, r2, #3, #16
 .L124:
-	.loc 2 348 0
 	lsl	lr, r2, #1
-	.loc 2 349 0
 	ldrh	lr, [r8, lr]
 	cmp	lr, r9
 	bcs	.L122
-	.loc 2 352 0
 	ldrh	lr, [r3]
 	cmp	lr, r4
 	bne	.L123
-	.loc 2 353 0
 	strh	r2, [ip, #2]	@ movhi
-	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
 .L120:
-	.loc 2 372 0
 	mov	r0, #0
-.LVL117:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL118:
 .L123:
-	.loc 2 358 0
 	add	r3, r7, lr, lsl #3
-	.loc 2 348 0
 	mov	r2, lr
 	b	.L124
 .L122:
-	.loc 2 361 0
 	ldrh	lr, [r3, #2]
 	strh	lr, [ip, #2]	@ movhi
-	.loc 2 362 0
 	strh	r2, [r6, r5]	@ movhi
-	.loc 2 364 0
-	ldr	r2, [r1, #2316]
+	ldr	r2, [r1, #2340]
 	cmp	r3, r2
-	.loc 2 368 0
 	ldrhne	r2, [r3, #2]
-	ldrne	r1, [r1, #2292]
-	.loc 2 365 0
+	ldrne	r1, [r1, #2316]
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 366 0
-	streq	ip, [r1, #2316]
-	.loc 2 368 0
+	streq	ip, [r1, #2340]
 	lslne	r2, r2, #3
 	strhne	r0, [r1, r2]	@ movhi
-	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
 	b	.L120
 .L127:
 	.align	2
 .L126:
 	.word	.LANCHOR0
-.LFE197:
 	.size	insert_free_list, .-insert_free_list
 	.align	2
 	.global	INSERT_FREE_LIST
@@ -1643,44 +1008,26 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB194:
-	.loc 2 211 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL119:
 	mov	ip, sp
-.LCFI77:
 	push	{fp, ip, lr, pc}
-.LCFI78:
 	sub	fp, ip, #4
-.LCFI79:
-	.loc 2 212 0
 	uxth	r0, r0
-.LVL120:
 	bl	insert_free_list
-.LVL121:
-	.loc 2 213 0
 	ldr	r2, .L130
-	add	r1, r2, #2320
-	.loc 2 214 0
-	ldrh	r2, [r2, #16]
-	.loc 2 213 0
-	ldrh	r3, [r1]
+	movw	r1, #2344
+	ldrh	r3, [r2, r1]
 	add	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 214 0
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r2, [r2, #40]
 	cmp	r2, r3
-	.loc 2 213 0
-	strh	r3, [r1]	@ movhi
-	.loc 2 214 0
 	ldmfdcs	sp, {fp, sp, pc}
-.LBB269:
-.LBB270:
 	mov	r2, #214
 	ldr	r1, .L130+4
 	ldr	r0, .L130+8
 	bl	printk
-.LVL122:
 	ldmfd	sp, {fp, sp, pc}
 .L131:
 	.align	2
@@ -1688,9 +1035,6 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
-.LBE270:
-.LBE269:
-.LFE194:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.align	2
 	.global	List_remove_node
@@ -1699,107 +1043,67 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB198:
-	.loc 2 375 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL123:
 	mov	ip, sp
-.LCFI80:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI81:
 	sub	fp, ip, #4
-.LCFI82:
-	.loc 2 378 0
 	ldr	r4, .L139
-	.loc 2 375 0
 	uxth	r1, r1
-	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 378 0
-	ldr	r7, [r4, #2292]
+	ldr	r7, [r4, #2316]
 	lsl	r6, r1, #3
 	add	r5, r7, r6
-.LVL124:
-	.loc 2 379 0
 	ldrh	r2, [r5, #2]
 	cmp	r2, r3
 	bne	.L133
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r5, r3
 	beq	.L133
-	.loc 2 379 0 discriminator 2
 	movw	r2, #379
 	ldr	r1, .L139+4
-.LVL125:
 	ldr	r0, .L139+8
 	bl	printk
-.LVL126:
 .L133:
-	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	ldrh	r2, [r7, r6]
 	cmp	r5, r3
 	movw	r3, #65535
 	bne	.L134
-	.loc 2 382 0
 	cmp	r2, r3
-	.loc 2 385 0
-	ldrne	r3, [r4, #2292]
-	.loc 2 383 0
+	ldrne	r3, [r4, #2316]
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 385 0
 	addne	r2, r3, r2, lsl #3
-	.loc 2 386 0
 	mvnne	r3, #0
-	.loc 2 385 0
 	strne	r2, [r8]
-	.loc 2 386 0
 	strhne	r3, [r2, #2]	@ movhi
 .L136:
-	.loc 2 399 0
 	mvn	r3, #0
-	.loc 2 401 0
 	mov	r0, #0
-	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 401 0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 .L134:
-	.loc 2 388 0
 	cmp	r2, r3
 	ldrh	r3, [r5, #2]
 	bne	.L137
-	.loc 2 389 0
 	cmp	r3, r2
-	.loc 2 391 0
-	ldrne	r2, [r4, #2292]
+	ldrne	r2, [r4, #2316]
 	lslne	r3, r3, #3
 	mvnne	r1, #0
-.LVL127:
-	.loc 2 389 0
 	beq	.L136
 .L138:
-	.loc 2 397 0
 	strh	r1, [r2, r3]	@ movhi
 	b	.L136
-.LVL128:
 .L137:
-	.loc 2 395 0
-	ldr	r1, [r4, #2292]
-.LVL129:
+	ldr	r1, [r4, #2316]
 	add	r2, r1, r2, lsl #3
 	strh	r3, [r2, #2]	@ movhi
-	.loc 2 396 0
 	ldrh	r3, [r5, #2]
-	.loc 2 397 0
 	ldrh	r1, [r7, r6]
-	ldr	r2, [r4, #2292]
+	ldr	r2, [r4, #2316]
 	lsl	r3, r3, #3
 	b	.L138
 .L140:
@@ -1808,7 +1112,6 @@ List_remove_node:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
-.LFE198:
 	.size	List_remove_node, .-List_remove_node
 	.align	2
 	.global	List_pop_index_node
@@ -1817,73 +1120,42 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB199:
-	.loc 2 404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL130:
 	mov	ip, sp
-.LCFI83:
 	push	{r4, fp, ip, lr, pc}
-.LCFI84:
 	sub	fp, ip, #4
-.LCFI85:
-	.loc 2 408 0
 	ldr	r3, [r0]
-.LVL131:
-	.loc 2 404 0
 	uxth	r1, r1
-	.loc 2 408 0
 	cmp	r3, #0
-	.loc 2 409 0
 	movweq	r4, #65535
-	.loc 2 408 0
 	beq	.L141
-	.loc 2 413 0
 	ldr	r2, .L148
-	.loc 2 412 0
 	movw	ip, #65535
-	.loc 2 413 0
-	ldr	r4, [r2, #2292]
+	ldr	r4, [r2, #2316]
 .L143:
-	.loc 2 412 0
 	cmp	r1, #0
 	bne	.L144
 .L146:
-	.loc 2 416 0
 	sub	r3, r3, r4
-.LVL132:
 	ubfx	r4, r3, #3, #16
-	.loc 2 417 0
 	mov	r1, r4
-.LVL133:
 	bl	List_remove_node
-.LVL134:
 .L141:
-	.loc 2 420 0
 	mov	r0, r4
-.LVL135:
 	ldmfd	sp, {r4, fp, sp, pc}
-.LVL136:
 .L144:
-	.loc 2 412 0 discriminator 1
 	ldrh	r2, [r3]
 	cmp	r2, ip
 	beq	.L146
-	.loc 2 414 0
 	sub	r1, r1, #1
-.LVL137:
-	.loc 2 413 0
 	add	r3, r4, r2, lsl #3
-	.loc 2 414 0
 	uxth	r1, r1
-.LVL138:
 	b	.L143
 .L149:
 	.align	2
 .L148:
 	.word	.LANCHOR0
-.LFE199:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.align	2
 	.global	List_pop_head_node
@@ -1892,24 +1164,14 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB200:
-	.loc 2 423 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL139:
 	mov	ip, sp
-.LCFI86:
 	push	{fp, ip, lr, pc}
-.LCFI87:
 	sub	fp, ip, #4
-.LCFI88:
-	.loc 2 424 0
 	mov	r1, #0
 	bl	List_pop_index_node
-.LVL140:
-	.loc 2 425 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE200:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.align	2
 	.global	List_get_gc_head_node
@@ -1918,69 +1180,39 @@ List_pop_head_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB201:
-	.loc 2 428 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL141:
 	mov	ip, sp
-.LCFI89:
 	push	{fp, ip, lr, pc}
-.LCFI90:
 	sub	fp, ip, #4
-.LCFI91:
-	.loc 2 432 0
 	ldr	r1, .L157
-	.loc 2 428 0
 	uxth	r2, r0
-.LVL142:
-	.loc 2 432 0
-	ldr	r3, [r1, #2296]
-.LVL143:
+	ldr	r3, [r1, #2320]
 	cmp	r3, #0
-	.loc 2 437 0
-	ldrne	r1, [r1, #2292]
-	.loc 2 436 0
+	ldrne	r1, [r1, #2316]
 	movwne	r0, #65535
-	.loc 2 432 0
 	bne	.L153
-	.loc 2 433 0
 	movw	r0, #65535
 	ldmfd	sp, {fp, sp, pc}
-.LVL144:
 .L155:
-	.loc 2 438 0
 	sub	r2, r2, #1
-.LVL145:
-	.loc 2 437 0
 	add	r3, r1, r3, lsl #3
-.LVL146:
-	.loc 2 438 0
 	uxth	r2, r2
-.LVL147:
 .L153:
-	.loc 2 436 0
 	cmp	r2, #0
 	beq	.L154
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL148:
 	cmp	r3, r0
 	bne	.L155
 	ldmfd	sp, {fp, sp, pc}
-.LVL149:
 .L154:
-	.loc 2 442 0 is_stmt 1
 	sub	r3, r3, r1
-.LVL150:
 	ubfx	r0, r3, #3, #16
-	.loc 2 445 0
 	ldmfd	sp, {fp, sp, pc}
 .L158:
 	.align	2
 .L157:
 	.word	.LANCHOR0
-.LFE201:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.align	2
 	.global	List_update_data_list
@@ -1989,136 +1221,80 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB202:
-	.loc 2 448 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL151:
 	mov	ip, sp
-.LCFI92:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI93:
 	sub	fp, ip, #4
-.LCFI94:
-	.loc 2 457 0
 	ldr	r4, .L172
-	movw	r3, #2324
-	.loc 2 448 0
+	movw	r3, #2348
 	uxth	r5, r0
-.LVL152:
-	.loc 2 457 0
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
 	beq	.L161
-	.loc 2 457 0 is_stmt 0 discriminator 1
-	movw	r3, #2372
+	movw	r3, #2396
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
 	beq	.L161
-	.loc 2 457 0 discriminator 2
-	movw	r3, #2420
+	movw	r3, #2444
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
 	beq	.L161
-.LBB273:
-.LBB274:
-	.loc 2 460 0 is_stmt 1
-	ldr	r8, [r4, #2292]
-	.loc 2 462 0
-	ldr	r3, [r4, #2296]
-	.loc 2 460 0
+	ldr	r8, [r4, #2316]
+	ldr	r3, [r4, #2320]
 	add	r7, r8, r5, lsl #3
-.LVL153:
-	.loc 2 462 0
 	cmp	r7, r3
 	beq	.L161
-	.loc 2 465 0
-	ldr	r2, [r4, #2300]
+	ldr	r2, [r4, #2324]
 	lsl	r3, r5, #1
-	.loc 2 466 0
 	ldrh	r6, [r7, #4]
-	.loc 2 465 0
 	ldrh	r3, [r2, r3]
-.LVL154:
-	.loc 2 467 0
 	cmp	r6, #0
-	.loc 2 468 0
 	mvneq	r6, #0
-.LVL155:
-	.loc 2 466 0
 	mulne	r6, r6, r3
-.LVL156:
-	.loc 2 470 0
 	ldr	r3, [r8, r5, lsl #3]
-.LVL157:
 	cmn	r3, #1
 	bne	.L164
 	movw	r2, #470
 	ldr	r1, .L172+4
 	ldr	r0, .L172+8
 	bl	printk
-.LVL158:
 .L164:
-	.loc 2 471 0
 	ldr	r3, [r8, r5, lsl #3]
 	cmn	r3, #1
 	beq	.L161
-	.loc 2 473 0
 	ldrh	r2, [r7, #2]
-	.loc 2 475 0
-	ldr	r1, [r4, #2300]
-	.loc 2 473 0
+	ldr	r1, [r4, #2324]
 	lsl	r2, r2, #3
-	.loc 2 475 0
 	lsr	r3, r2, #2
 	ldrh	r0, [r1, r3]
-.LVL159:
-	.loc 2 476 0
-	ldr	r1, [r4, #2292]
+	ldr	r1, [r4, #2316]
 	add	r2, r1, r2
 	ldrh	r3, [r2, #4]
-	.loc 2 477 0
 	cmp	r3, #0
-	.loc 2 476 0
 	mulne	r3, r3, r0
-.LVL160:
-	.loc 2 478 0
 	mvneq	r3, #0
-	.loc 2 480 0
 	cmp	r6, r3
 	bcs	.L161
-	.loc 2 481 0
+	ldr	r4, .L172+12
 	mov	r1, r5
-	ldr	r0, .L172+12
-.LVL161:
+	ldr	r0, .L172+16
 	bl	List_remove_node
-.LVL162:
-	movw	r3, #2312
-	ldrh	r3, [r4, r3]
+	ldrh	r3, [r4]
 	cmp	r3, #0
 	bne	.L166
 	movw	r2, #481
 	ldr	r1, .L172+4
 	ldr	r0, .L172+8
 	bl	printk
-.LVL163:
 .L166:
-	movw	r2, #2312
-	.loc 2 482 0
+	ldrh	r3, [r4]
 	mov	r0, r5
-	.loc 2 481 0
-	ldrh	r3, [r4, r2]
 	sub	r3, r3, #1
-	strh	r3, [r4, r2]	@ movhi
-	.loc 2 482 0
+	strh	r3, [r4]	@ movhi
 	bl	INSERT_DATA_LIST
-.LVL164:
 .L161:
-.LBE274:
-.LBE273:
-	.loc 2 485 0
 	mov	r0, #0
-.LVL165:
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 .L173:
 	.align	2
@@ -2126,8 +1302,8 @@ List_update_data_list:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+51
 	.word	.LC1
-	.word	.LANCHOR0+2296
-.LFE202:
+	.word	.LANCHOR0+2336
+	.word	.LANCHOR0+2320
 	.size	List_update_data_list, .-List_update_data_list
 	.align	2
 	.global	select_l2p_ram_region
@@ -2136,98 +1312,73 @@ List_update_data_list:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB210:
-	.loc 2 749 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI95:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI96:
+	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI97:
-	.loc 2 754 0
-	ldr	r0, .L184
+	ldr	r3, .L184
 	mov	r1, #0
-	.loc 2 755 0
-	movw	ip, #65535
-	.loc 2 754 0
-	ldrh	r2, [r0, #114]
-	mov	lr, r0
-	.loc 2 755 0
-	ldr	r3, [r0, #2468]
 	mov	r0, #12
+	movw	ip, #65535
+	ldrh	r2, [r3, #138]
+	ldr	r3, [r3, #2492]
 .L175:
 	uxth	r4, r1
-	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
 	bcc	.L177
 	mov	r4, r2
 	mov	r1, #0
 	mov	r0, #-2147483648
-	.loc 2 765 0
-	mov	r6, #12
+	mov	r5, #12
 .L178:
-	uxth	r5, r1
-	.loc 2 764 0 discriminator 1
-	cmp	r5, r2
+	uxth	lr, r1
+	cmp	lr, r2
 	bcc	.L180
-	.loc 2 773 0
 	cmp	r4, r2
 	bcc	.L176
-	.loc 2 779 0
-	movw	r1, #2472
+	ldr	r1, .L184+4
 	mov	r4, r2
-	ldrh	r5, [lr, r1]
 	mvn	r0, #0
+	ldrh	r5, [r1]
 	mov	r1, #0
 .L181:
 	uxth	ip, r1
-	.loc 2 778 0 discriminator 1
 	cmp	ip, r2
 	bcc	.L183
-	.loc 2 784 0
 	cmp	r4, r2
 	bcc	.L176
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	r2, #784
-	ldr	r1, .L184+4
-	ldr	r0, .L184+8
+	ldr	r1, .L184+8
+	ldr	r0, .L184+12
 	bl	printk
-.LVL166:
 	b	.L176
 .L177:
 	add	r1, r1, #1
-	.loc 2 755 0 is_stmt 1
-	mla	r5, r0, r1, r3
-	ldrh	r5, [r5, #-12]
-	cmp	r5, ip
+	mla	lr, r0, r1, r3
+	ldrh	lr, [lr, #-12]
+	cmp	lr, ip
 	bne	.L175
 .L176:
-	.loc 2 786 0
 	mov	r0, r4
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
 .L180:
-	.loc 2 765 0
-	mla	ip, r6, r1, r3
+	mla	ip, r5, r1, r3
 	add	r1, r1, #1
 	ldr	ip, [ip, #4]
-	.loc 2 766 0
 	cmp	r0, ip
-	movls	r7, #0
-	movhi	r7, #1
+	movls	r6, #0
+	movhi	r6, #1
 	cmp	ip, #0
-	movlt	r7, #0
-	cmp	r7, #0
+	movlt	r6, #0
+	cmp	r6, #0
 	movne	r0, ip
-	movne	r4, r5
+	movne	r4, lr
 	b	.L178
 .L183:
-	.loc 2 779 0
 	ldr	lr, [r3, #4]
 	cmp	r0, lr
 	bls	.L182
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	r6, [r3]
 	cmp	r6, r5
 	movne	r0, lr
@@ -2240,9 +1391,9 @@ select_l2p_ram_region:
 	.align	2
 .L184:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+2496
 	.word	.LANCHOR1+73
 	.word	.LC1
-.LFE210:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.align	2
 	.global	FtlUpdateVaildLpn
@@ -2251,20 +1402,13 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB216:
-	.loc 2 931 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL167:
 	mov	ip, sp
-.LCFI98:
 	push	{fp, ip, lr, pc}
-.LCFI99:
 	sub	fp, ip, #4
-.LCFI100:
-	.loc 2 934 0
 	ldr	ip, .L192
-	movw	r1, #2474
+	movw	r1, #2498
 	ldrh	r2, [ip, r1]
 	mov	r3, ip
 	cmp	r2, #4
@@ -2272,49 +1416,30 @@ FtlUpdateVaildLpn:
 	bne	.L187
 	add	r2, r2, #1
 	strh	r2, [ip, r1]	@ movhi
-	.loc 2 943 0
 	ldmfd	sp, {fp, sp, pc}
 .L187:
-	.loc 2 935 0
 	mov	r2, #0
-.LBB277:
-.LBB278:
-	.loc 2 939 0
 	movw	lr, #65535
-.LBE278:
-.LBE277:
-	.loc 2 935 0
 	strh	r2, [ip, r1]	@ movhi
-	.loc 2 936 0
-	str	r2, [ip, #2476]
-	ldrh	r1, [ip, #16]
-.LBB280:
-.LBB279:
-	.loc 2 939 0
-	ldr	r2, [ip, #2300]
+	str	r2, [ip, #2500]
+	ldrh	r1, [ip, #40]
+	ldr	r2, [ip, #2324]
 	add	r1, r2, r1, lsl #1
 .L188:
-	.loc 2 937 0
 	cmp	r2, r1
 	bne	.L190
 	ldmfd	sp, {fp, sp, pc}
 .L190:
-	.loc 2 939 0
 	ldrh	ip, [r2], #2
 	cmp	ip, lr
-	.loc 2 940 0
-	ldrne	r0, [r3, #2476]
-.LVL168:
+	ldrne	r0, [r3, #2500]
 	addne	r0, r0, ip
-	strne	r0, [r3, #2476]
+	strne	r0, [r3, #2500]
 	b	.L188
 .L193:
 	.align	2
 .L192:
 	.word	.LANCHOR0
-.LBE279:
-.LBE280:
-.LFE216:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	2
 	.global	ftl_set_blk_mode
@@ -2323,36 +1448,22 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB222:
-	.loc 2 1396 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL169:
 	mov	ip, sp
-.LCFI101:
 	push	{fp, ip, lr, pc}
-.LCFI102:
 	sub	fp, ip, #4
-.LCFI103:
-	.loc 2 1397 0
 	cmp	r1, #0
-	.loc 2 1396 0
 	uxth	r0, r0
-	.loc 2 1397 0
 	beq	.L195
 	bl	ftl_set_blk_mode.part.6
-.LVL170:
 	ldmfd	sp, {fp, sp, pc}
-.LVL171:
 .L195:
-	.loc 2 1400 0
 	ldr	r3, .L197
 	lsr	r1, r0, #5
-.LVL172:
 	mov	ip, #1
 	and	r0, r0, #31
-.LVL173:
-	ldr	r2, [r3]
+	ldr	r2, [r3, #24]
 	ldr	r3, [r2, r1, lsl #2]
 	bic	r0, r3, ip, lsl r0
 	str	r0, [r2, r1, lsl #2]
@@ -2361,7 +1472,6 @@ ftl_set_blk_mode:
 	.align	2
 .L197:
 	.word	.LANCHOR0
-.LFE222:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.align	2
 	.global	ftl_get_blk_mode
@@ -2370,36 +1480,24 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB223:
-	.loc 2 1404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL174:
 	mov	ip, sp
-.LCFI104:
 	push	{fp, ip, lr, pc}
-.LCFI105:
 	sub	fp, ip, #4
-.LCFI106:
-	.loc 2 1405 0
 	ldr	r3, .L200
-	.loc 2 1404 0
 	uxth	r0, r0
-	.loc 2 1405 0
-	ldr	r3, [r3]
+	ldr	r3, [r3, #24]
 	lsr	r2, r0, #5
 	and	r0, r0, #31
-.LVL175:
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1406 0
 	and	r0, r0, #1
 	ldmfd	sp, {fp, sp, pc}
 .L201:
 	.align	2
 .L200:
 	.word	.LANCHOR0
-.LFE223:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.align	2
 	.global	ftl_sb_update_avl_pages
@@ -2408,77 +1506,48 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB229:
-	.loc 2 1657 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL176:
 	mov	ip, sp
-.LCFI107:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI108:
 	sub	fp, ip, #4
-.LCFI109:
-	.loc 2 1659 0
 	mov	r3, #0
-	.loc 2 1657 0
 	uxth	r2, r2
 	uxth	r5, r1
-.LVL177:
-	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1660 0
 	ldr	r3, .L209
 	add	ip, r0, r2, lsl #1
-	.loc 2 1662 0
 	movw	r1, #65535
 	add	ip, ip, #14
-	.loc 2 1660 0
-	ldrh	lr, [r3, #8]
+	ldrh	lr, [r3, #32]
 .L203:
-	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, lr
 	bcc	.L205
-	ldrh	r1, [r3, #78]
+	ldrh	r1, [r3, #102]
 	add	ip, r0, #16
-	.loc 2 1671 0 is_stmt 1
 	mov	r3, #0
-	.loc 2 1669 0
 	movw	r4, #65535
 	sub	r1, r1, #1
 	sub	r1, r1, r5
 	uxth	r1, r1
 .L206:
-	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
-.LVL178:
 	cmp	lr, r2
 	bhi	.L208
-	.loc 2 1674 0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.LVL179:
 .L205:
-	.loc 2 1662 0
 	ldrh	r4, [ip, #2]!
-	.loc 2 1660 0
 	add	r2, r2, #1
-.LVL180:
 	uxth	r2, r2
-.LVL181:
-	.loc 2 1662 0
 	cmp	r4, r1
-	.loc 2 1664 0
 	ldrhne	r4, [r0, #4]
 	addne	r4, r4, #1
 	strhne	r4, [r0, #4]	@ movhi
 	b	.L203
-.LVL182:
 .L208:
-	.loc 2 1669 0
 	ldrh	r2, [ip], #2
 	add	r3, r3, #1
 	cmp	r2, r4
-	.loc 2 1671 0
 	ldrhne	r2, [r0, #4]
 	addne	r2, r1, r2
 	strhne	r2, [r0, #4]	@ movhi
@@ -2487,7 +1556,6 @@ ftl_sb_update_avl_pages:
 	.align	2
 .L209:
 	.word	.LANCHOR0
-.LFE229:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	2
 	.global	FtlSlcSuperblockCheck
@@ -2496,62 +1564,39 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB232:
-	.loc 2 2062 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL183:
 	mov	ip, sp
-.LCFI110:
 	push	{fp, ip, lr, pc}
-.LCFI111:
 	sub	fp, ip, #4
-.LCFI112:
-	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
 	cmp	r3, #0
 	ldmfdeq	sp, {fp, sp, pc}
-	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	ldmfdeq	sp, {fp, sp, pc}
-.LBB283:
-.LBB284:
-	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2074 0
 	mov	lr, #0
-	.loc 2 2069 0
 	add	r2, r0, r2, lsl #1
 	ldrh	r1, [r2, #16]
-.LVL184:
-	.loc 2 2072 0
 	ldr	r2, .L217
-	ldrh	ip, [r2, #8]
-	.loc 2 2070 0
+	ldrh	ip, [r2, #32]
 	mov	r2, r3
 .L214:
 	cmp	r1, r2
 	beq	.L216
 	ldmfd	sp, {fp, sp, pc}
 .L216:
-	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	add	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2072 0
 	cmp	r3, ip
-	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2073 0
 	ldrheq	r3, [r0, #2]
-	.loc 2 2074 0
 	strbeq	lr, [r0, #6]
-	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	add	r3, r0, r3, lsl #1
 	ldrh	r1, [r3, #16]
@@ -2560,9 +1605,6 @@ FtlSlcSuperblockCheck:
 	.align	2
 .L217:
 	.word	.LANCHOR0
-.LBE284:
-.LBE283:
-.LFE232:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	2
 	.global	make_superblock
@@ -2571,83 +1613,54 @@ FtlSlcSuperblockCheck:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-.LFB234:
-	.loc 2 2094 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL185:
 	mov	ip, sp
-.LCFI113:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI114:
 	sub	fp, ip, #4
-.LCFI115:
 	sub	sp, sp, #4
-	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2097 0
 	ldr	r6, .L224
 	ldrh	r2, [r0]
-	ldrh	r3, [r6, #16]
+	ldrh	r3, [r6, #40]
 	cmp	r2, r3
 	bcc	.L220
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	movw	r2, #2097
 	ldr	r1, .L224+4
 	ldr	r0, .L224+8
 	bl	printk
-.LVL186:
 .L220:
-	.loc 2 2100 0 is_stmt 1
-	ldrh	r9, [r6, #8]
+	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
-	.loc 2 2101 0
 	ldr	r10, .L224+12
-	.loc 2 2102 0
 	mvn	r8, #0
-	.loc 2 2098 0
 	mov	r5, #0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2099 0
 	strb	r5, [r4, #7]
 .L221:
-	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r9, r3
 	bhi	.L223
-	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	.loc 2 2113 0
 	mov	r0, #0
-	.loc 2 2110 0
-	ldrh	r2, [r6, #78]
+	ldrh	r2, [r6, #102]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2111 0
 	mov	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2113 0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .L223:
-	.loc 2 2101 0
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	add	r7, r7, #2
 	ldrh	r1, [r4]
 	add	r5, r5, #1
 	bl	V2P_block
-.LVL187:
-	.loc 2 2102 0
 	strh	r8, [r7, #-2]	@ movhi
-	.loc 2 2101 0
 	str	r0, [fp, #-44]
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL188:
 	cmp	r0, #0
-	.loc 2 2104 0
 	ldreq	r3, [fp, #-44]
 	strheq	r3, [r7, #-2]	@ movhi
-	.loc 2 2105 0
 	ldrbeq	r3, [r4, #7]	@ zero_extendqisi2
 	addeq	r3, r3, #1
 	strbeq	r3, [r4, #7]
@@ -2658,8 +1671,7 @@ make_superblock:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+95
 	.word	.LC1
-	.word	.LANCHOR0+36
-.LFE234:
+	.word	.LANCHOR0+60
 	.size	make_superblock, .-make_superblock
 	.align	2
 	.global	update_multiplier_value
@@ -2668,66 +1680,42 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB243:
-	.loc 2 2451 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL189:
 	mov	ip, sp
-.LCFI116:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI117:
 	sub	fp, ip, #4
-.LCFI118:
-	.loc 2 2455 0
 	ldr	r3, .L232
 	mov	r5, #0
-	.loc 2 2451 0
 	uxth	r6, r0
-.LVL190:
-	.loc 2 2453 0
 	mov	r4, r5
-	.loc 2 2455 0
-	ldrh	r8, [r3, #8]
+	ldrh	r8, [r3, #32]
 	mov	r7, r3
-	.loc 2 2458 0
-	ldrh	r9, [r3, #78]
-	.loc 2 2456 0
-	add	r10, r3, #36
+	ldrh	r9, [r3, #102]
+	add	r10, r3, #60
 .L227:
-	.loc 2 2455 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
 	bhi	.L229
-	.loc 2 2460 0
 	cmp	r4, #0
 	moveq	r0, r4
 	beq	.L230
-	.loc 2 2461 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__divsi3
-.LVL191:
 .L230:
-	.loc 2 2462 0
-	ldr	r1, [r7, #2292]
+	ldr	r1, [r7, #2316]
 	add	r1, r1, r6, lsl #3
 	strh	r0, [r1, #4]	@ movhi
-	.loc 2 2464 0
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .L229:
-	.loc 2 2456 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL192:
-	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL193:
 	cmp	r0, #0
 	add	r5, r5, #1
-	.loc 2 2458 0
 	addeq	r4, r4, r9
 	uxtheq	r4, r4
 	b	.L227
@@ -2735,7 +1723,6 @@ update_multiplier_value:
 	.align	2
 .L232:
 	.word	.LANCHOR0
-.LFE243:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.align	2
 	.global	GetFreeBlockMinEraseCount
@@ -2744,34 +1731,25 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB244:
-	.loc 2 2467 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI119:
 	push	{fp, ip, lr, pc}
-.LCFI120:
 	sub	fp, ip, #4
-.LCFI121:
-	.loc 2 2470 0
 	ldr	r3, .L237
-	ldr	r0, [r3, #2316]
+	ldr	r0, [r3, #2340]
 	cmp	r0, #0
-	.loc 2 2471 0
-	ldrne	r2, [r3, #2292]
-	ldrne	r3, [r3, #2304]
+	ldrne	r2, [r3, #2316]
+	ldrne	r3, [r3, #2328]
 	subne	r0, r0, r2
 	ubfxne	r0, r0, #3, #16
 	lslne	r0, r0, #1
 	ldrhne	r0, [r3, r0]
-	.loc 2 2473 0
 	ldmfd	sp, {fp, sp, pc}
 .L238:
 	.align	2
 .L237:
 	.word	.LANCHOR0
-.LFE244:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.align	2
 	.global	GetFreeBlockMaxEraseCount
@@ -2780,59 +1758,38 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB245:
-	.loc 2 2476 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL194:
 	mov	ip, sp
-.LCFI122:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI123:
 	sub	fp, ip, #4
-.LCFI124:
-	.loc 2 2481 0
 	ldr	r2, .L247
-	.loc 2 2476 0
 	uxth	r4, r0
-.LVL195:
-	.loc 2 2481 0
-	ldr	r0, [r2, #2316]
+	ldr	r0, [r2, #2340]
 	cmp	r0, #0
 	ldmfdeq	sp, {r4, r5, fp, sp, pc}
-	.loc 2 2482 0
-	add	r3, r2, #2320
-	.loc 2 2484 0
-	ldr	ip, [r2, #2292]
-	.loc 2 2482 0
-	ldrh	r3, [r3]
-	.loc 2 2485 0
+	movw	r3, #2344
+	ldr	ip, [r2, #2316]
+	ldrh	r3, [r2, r3]
 	mov	r1, #0
-	.loc 2 2486 0
 	movw	r5, #65535
-	.loc 2 2482 0
 	rsb	r3, r3, r3, lsl #3
 	asr	r3, r3, #3
 	cmp	r4, r3
-	.loc 2 2483 0
 	uxthgt	r4, r3
-	.loc 2 2484 0
 	sub	r3, r0, ip
 	ubfx	r3, r3, #3, #16
 .L242:
-	.loc 2 2485 0 discriminator 1
 	uxth	r0, r1
 	cmp	r4, r0
 	bls	.L244
-	.loc 2 2486 0
 	lsl	r0, r3, #3
 	add	r1, r1, #1
 	ldrh	lr, [ip, r0]
 	cmp	lr, r5
 	bne	.L246
 .L244:
-	.loc 2 2490 0
-	ldr	r2, [r2, #2304]
+	ldr	r2, [r2, #2328]
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
@@ -2843,7 +1800,6 @@ GetFreeBlockMaxEraseCount:
 	.align	2
 .L247:
 	.word	.LANCHOR0
-.LFE245:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	2
 	.global	FtlPrintInfo2buf
@@ -2852,664 +1808,445 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB150:
-	.loc 3 11 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL196:
 	mov	ip, sp
-.LCFI125:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI126:
 	sub	fp, ip, #4
-.LCFI127:
 	sub	sp, sp, #12
-	.loc 3 11 0
 	mov	r7, r0
-	.loc 3 16 0
 	ldr	r6, .L261
-	.loc 3 15 0
 	add	r5, r7, #12
 	ldr	r1, .L261+4
-	.loc 3 49 0
-	movw	r4, #2324
-	.loc 3 15 0
+	movw	r9, #2344
 	bl	strcpy
-.LVL197:
-	.loc 3 16 0
-	ldr	r2, [r6, #92]
+	ldr	r2, [r6, #116]
 	mov	r0, r5
 	ldr	r1, .L261+8
-	.loc 3 31 0
-	add	r9, r6, #2320
-	.loc 3 16 0
 	bl	sprintf
-.LVL198:
 	add	r5, r5, r0
-	.loc 3 17 0
 	ldr	r1, .L261+12
 	mov	r0, r5
 	add	r5, r5, #10
 	bl	strcpy
-.LVL199:
-	.loc 3 18 0
-	ldr	r2, [r6, #2480]
+	ldr	r2, [r6, #2504]
 	mov	r0, r5
 	ldr	r1, .L261+16
-	.loc 3 66 0
-	movw	r8, #2564
-	.loc 3 18 0
 	bl	sprintf
-.LVL200:
 	add	r5, r5, r0
-	.loc 3 19 0
-	ldr	r2, [r6, #2476]
+	ldr	r2, [r6, #2500]
 	ldr	r1, .L261+20
 	mov	r0, r5
 	bl	sprintf
-.LVL201:
 	add	r5, r5, r0
-	.loc 3 20 0
-	ldr	r2, [r6, #2484]
+	ldr	r2, [r6, #2508]
 	ldr	r1, .L261+24
 	mov	r0, r5
 	bl	sprintf
-.LVL202:
 	add	r5, r5, r0
-	.loc 3 21 0
-	ldr	r2, [r6, #2488]
+	ldr	r2, [r6, #2512]
 	ldr	r1, .L261+28
 	mov	r0, r5
 	bl	sprintf
-.LVL203:
 	add	r5, r5, r0
-	.loc 3 22 0
-	ldr	r2, [r6, #2492]
+	ldr	r2, [r6, #2516]
 	ldr	r1, .L261+32
 	mov	r0, r5
 	bl	sprintf
-.LVL204:
 	add	r5, r5, r0
-	.loc 3 23 0
-	ldr	r2, [r6, #2496]
+	ldr	r2, [r6, #2520]
 	ldr	r1, .L261+36
 	mov	r0, r5
 	bl	sprintf
-.LVL205:
 	add	r5, r5, r0
-	.loc 3 24 0
-	ldr	r2, [r6, #2500]
+	ldr	r2, [r6, #2524]
 	ldr	r1, .L261+40
 	mov	r0, r5
 	bl	sprintf
-.LVL206:
 	add	r5, r5, r0
-	.loc 3 25 0
-	ldr	r2, [r6, #2504]
+	ldr	r2, [r6, #2528]
 	ldr	r1, .L261+44
 	mov	r0, r5
 	bl	sprintf
-.LVL207:
-	.loc 3 26 0
-	ldr	r2, [r6, #2508]
-	.loc 3 25 0
+	ldr	r2, [r6, #2532]
 	add	r5, r5, r0
-	.loc 3 26 0
 	ldr	r1, .L261+48
 	mov	r0, r5
+	ldr	r4, .L261+52
+	ldr	r8, .L261+56
 	lsr	r2, r2, #11
 	bl	sprintf
-.LVL208:
-	.loc 3 27 0
-	ldr	r2, [r6, #2512]
-	.loc 3 26 0
-	add	r5, r5, r0
-	.loc 3 27 0
-	ldr	r1, .L261+52
-	mov	r0, r5
-	lsr	r2, r2, #11
-	bl	sprintf
-.LVL209:
-	add	r5, r5, r0
-	.loc 3 28 0
-	ldr	r2, [r6, #2516]
-	ldr	r1, .L261+56
-	mov	r0, r5
-	bl	sprintf
-.LVL210:
+	ldr	r2, [r6, #2536]
 	add	r5, r5, r0
-	.loc 3 29 0
-	ldr	r2, [r6, #2520]
 	ldr	r1, .L261+60
 	mov	r0, r5
+	lsr	r2, r2, #11
 	bl	sprintf
-.LVL211:
 	add	r5, r5, r0
-	.loc 3 30 0
-	ldrh	r2, [r6, #134]
+	ldr	r2, [r6, #2540]
 	ldr	r1, .L261+64
 	mov	r0, r5
 	bl	sprintf
-.LVL212:
 	add	r5, r5, r0
-	.loc 3 31 0
-	ldrh	r2, [r9]
+	ldr	r2, [r6, #2544]
 	ldr	r1, .L261+68
 	mov	r0, r5
 	bl	sprintf
-.LVL213:
 	add	r5, r5, r0
-	.loc 3 32 0
-	ldr	r2, [r6, #2524]
+	ldrh	r2, [r6, #158]
 	ldr	r1, .L261+72
 	mov	r0, r5
 	bl	sprintf
-.LVL214:
 	add	r5, r5, r0
-	.loc 3 33 0
-	ldr	r2, [r6, #2528]
+	ldrh	r2, [r6, r9]
 	ldr	r1, .L261+76
 	mov	r0, r5
 	bl	sprintf
-.LVL215:
 	add	r5, r5, r0
-	.loc 3 34 0
-	ldr	r2, [r6, #2532]
+	ldr	r2, [r6, #2548]
 	ldr	r1, .L261+80
 	mov	r0, r5
 	bl	sprintf
-.LVL216:
 	add	r5, r5, r0
-	.loc 3 35 0
-	ldr	r2, [r6, #2536]
+	ldr	r2, [r6, #2552]
 	ldr	r1, .L261+84
 	mov	r0, r5
 	bl	sprintf
-.LVL217:
 	add	r5, r5, r0
-	.loc 3 36 0
-	ldr	r2, [r6, #2540]
+	ldr	r2, [r6, #2556]
 	ldr	r1, .L261+88
 	mov	r0, r5
 	bl	sprintf
-.LVL218:
 	add	r5, r5, r0
-	.loc 3 37 0
-	ldr	r2, [r6, #2544]
+	ldr	r2, [r6, #2560]
 	ldr	r1, .L261+92
 	mov	r0, r5
 	bl	sprintf
-.LVL219:
 	add	r5, r5, r0
-	.loc 3 38 0
-	ldrh	r2, [r9, #-46]
+	ldr	r2, [r6, #2564]
 	ldr	r1, .L261+96
 	mov	r0, r5
 	bl	sprintf
-.LVL220:
 	add	r5, r5, r0
-	.loc 3 39 0
-	ldrh	r2, [r9, #-48]
+	ldr	r2, [r6, #2568]
 	ldr	r1, .L261+100
 	mov	r0, r5
 	bl	sprintf
-.LVL221:
 	add	r5, r5, r0
-	.loc 3 40 0
-	ldr	r2, [r6, #116]
+	ldrh	r2, [r4, #30]
 	ldr	r1, .L261+104
 	mov	r0, r5
 	bl	sprintf
-.LVL222:
 	add	r5, r5, r0
-	.loc 3 41 0
-	ldr	r2, [r6, #108]
+	ldrh	r2, [r4, #28]
 	ldr	r1, .L261+108
 	mov	r0, r5
 	bl	sprintf
-.LVL223:
 	add	r5, r5, r0
-	.loc 3 42 0
-	ldr	r2, [r6, #4]
+	ldr	r2, [r6, #140]
 	ldr	r1, .L261+112
 	mov	r0, r5
 	bl	sprintf
-.LVL224:
 	add	r5, r5, r0
-	.loc 3 43 0
-	ldrh	r2, [r6, #194]
+	ldr	r2, [r6, #132]
 	ldr	r1, .L261+116
 	mov	r0, r5
 	bl	sprintf
-.LVL225:
 	add	r5, r5, r0
-	.loc 3 44 0
-	ldrh	r2, [r6, #16]
+	ldr	r2, [r6, #28]
 	ldr	r1, .L261+120
 	mov	r0, r5
 	bl	sprintf
-.LVL226:
-	.loc 3 45 0
-	movw	r3, #2548
-	.loc 3 44 0
 	add	r5, r5, r0
-	.loc 3 45 0
-	ldrh	r2, [r6, r3]
-	mov	r0, r5
+	ldrh	r2, [r6, #218]
 	ldr	r1, .L261+124
+	mov	r0, r5
 	bl	sprintf
-.LVL227:
 	add	r5, r5, r0
-	.loc 3 46 0
-	ldr	r2, [r6, #20]
+	ldrh	r2, [r6, #40]
 	ldr	r1, .L261+128
 	mov	r0, r5
 	bl	sprintf
-.LVL228:
-	.loc 3 47 0
-	movw	r3, #2552
-	.loc 3 46 0
+	movw	r3, #2572
 	add	r5, r5, r0
-	.loc 3 47 0
 	ldrh	r2, [r6, r3]
 	mov	r0, r5
 	ldr	r1, .L261+132
+	movw	r4, #2348
 	bl	sprintf
-.LVL229:
 	add	r5, r5, r0
-	.loc 3 48 0
-	ldrh	r2, [r6, #128]
+	ldr	r2, [r6, #44]
 	ldr	r1, .L261+136
 	mov	r0, r5
 	bl	sprintf
-.LVL230:
+	add	r3, r6, #2576
 	add	r5, r5, r0
-	.loc 3 49 0
-	ldrh	r2, [r9, #6]
-	ldr	r1, .L261+140
+	ldrh	r2, [r3]
 	mov	r0, r5
+	ldr	r1, .L261+140
 	bl	sprintf
-.LVL231:
 	add	r5, r5, r0
-	.loc 3 50 0
-	ldrb	r2, [r6, #2330]	@ zero_extendqisi2
+	ldrh	r2, [r6, #152]
 	ldr	r1, .L261+144
 	mov	r0, r5
 	bl	sprintf
-.LVL232:
 	add	r5, r5, r0
-	.loc 3 51 0
-	ldrh	r2, [r6, r4]
+	ldrh	r2, [r8, #2]
 	ldr	r1, .L261+148
 	mov	r0, r5
 	bl	sprintf
-.LVL233:
 	add	r5, r5, r0
-	.loc 3 52 0
-	ldrb	r2, [r6, #2332]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
 	ldr	r1, .L261+152
 	mov	r0, r5
 	bl	sprintf
-.LVL234:
 	add	r5, r5, r0
-	.loc 3 53 0
-	ldrh	r2, [r9, #8]
+	ldrh	r2, [r6, r4]
 	ldr	r1, .L261+156
 	mov	r0, r5
 	bl	sprintf
-.LVL235:
-	.loc 3 54 0
-	ldrh	r3, [r6, r4]
-	.loc 3 53 0
 	add	r5, r5, r0
-	.loc 3 54 0
-	ldr	r2, [r6, #2300]
-	mov	r0, r5
+	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
 	ldr	r1, .L261+160
-	.loc 3 55 0
-	movw	r4, #2372
-	.loc 3 54 0
-	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
+	mov	r0, r5
 	bl	sprintf
-.LVL236:
 	add	r5, r5, r0
-	.loc 3 55 0
-	ldrh	r2, [r9, #54]
+	ldrh	r2, [r8, #4]
 	ldr	r1, .L261+164
 	mov	r0, r5
 	bl	sprintf
-.LVL237:
+	ldrh	r3, [r6, r4]
 	add	r5, r5, r0
-	.loc 3 56 0
-	ldrb	r2, [r6, #2378]	@ zero_extendqisi2
-	ldr	r1, .L261+168
+	ldr	r2, [r6, #2324]
 	mov	r0, r5
+	ldr	r1, .L261+168
+	movw	r4, #2396
+	lsl	r3, r3, #1
+	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL238:
 	add	r5, r5, r0
-	.loc 3 57 0
-	ldrh	r2, [r6, r4]
+	ldrh	r2, [r8, #50]
 	ldr	r1, .L261+172
 	mov	r0, r5
 	bl	sprintf
-.LVL239:
 	add	r5, r5, r0
-	.loc 3 58 0
-	ldrb	r2, [r6, #2380]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
 	ldr	r1, .L261+176
 	mov	r0, r5
 	bl	sprintf
-.LVL240:
 	add	r5, r5, r0
-	.loc 3 59 0
-	ldrh	r2, [r9, #56]
+	ldrh	r2, [r6, r4]
 	ldr	r1, .L261+180
 	mov	r0, r5
 	bl	sprintf
-.LVL241:
-	.loc 3 60 0
-	ldrh	r3, [r6, r4]
-	.loc 3 59 0
 	add	r5, r5, r0
-	.loc 3 60 0
-	ldr	r2, [r6, #2300]
-	mov	r0, r5
+	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
 	ldr	r1, .L261+184
-	.loc 3 61 0
-	add	r4, r9, #100
-	.loc 3 60 0
-	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
+	mov	r0, r5
 	bl	sprintf
-.LVL242:
 	add	r5, r5, r0
-	.loc 3 61 0
-	ldrh	r2, [r9, #102]
+	ldrh	r2, [r8, #52]
 	ldr	r1, .L261+188
 	mov	r0, r5
 	bl	sprintf
-.LVL243:
+	ldrh	r3, [r6, r4]
 	add	r5, r5, r0
-	.loc 3 62 0
-	ldrb	r2, [r6, #2426]	@ zero_extendqisi2
-	ldr	r1, .L261+192
+	ldr	r2, [r6, #2324]
 	mov	r0, r5
+	ldr	r1, .L261+192
+	add	r4, r8, #96
+	lsl	r3, r3, #1
+	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL244:
-	.loc 3 63 0
-	movw	r3, #2420
-	.loc 3 62 0
 	add	r5, r5, r0
-	.loc 3 63 0
-	ldrh	r2, [r6, r3]
-	mov	r0, r5
+	ldrh	r2, [r8, #98]
 	ldr	r1, .L261+196
+	mov	r0, r5
 	bl	sprintf
-.LVL245:
 	add	r5, r5, r0
-	.loc 3 64 0
-	ldrb	r2, [r6, #2428]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
 	ldr	r1, .L261+200
 	mov	r0, r5
 	bl	sprintf
-.LVL246:
+	movw	r3, #2444
 	add	r5, r5, r0
-	.loc 3 65 0
-	ldrh	r2, [r9, #104]
-	ldr	r1, .L261+204
+	ldrh	r2, [r6, r3]
 	mov	r0, r5
+	ldr	r1, .L261+204
 	bl	sprintf
-.LVL247:
 	add	r5, r5, r0
-	.loc 3 66 0
-	ldrh	r2, [r4, #146]
+	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
 	ldr	r1, .L261+208
 	mov	r0, r5
 	bl	sprintf
-.LVL248:
 	add	r5, r5, r0
-	.loc 3 67 0
-	ldrb	r2, [r6, #2570]	@ zero_extendqisi2
+	ldrh	r2, [r8, #100]
 	ldr	r1, .L261+212
 	mov	r0, r5
 	bl	sprintf
-.LVL249:
 	add	r5, r5, r0
-	.loc 3 68 0
-	ldrh	r2, [r6, r8]
+	ldrh	r2, [r4, #146]
 	ldr	r1, .L261+216
 	mov	r0, r5
 	bl	sprintf
-.LVL250:
 	add	r5, r5, r0
-	.loc 3 69 0
-	ldrb	r2, [r6, #2572]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
 	ldr	r1, .L261+220
 	mov	r0, r5
 	bl	sprintf
-.LVL251:
+	movw	r8, #2588
 	add	r5, r5, r0
-	.loc 3 70 0
-	ldrh	r2, [r4, #148]
+	ldrh	r2, [r6, r8]
+	mov	r0, r5
 	ldr	r1, .L261+224
+	bl	sprintf
+	add	r5, r5, r0
+	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
+	ldr	r1, .L261+228
+	mov	r0, r5
+	bl	sprintf
+	add	r5, r5, r0
+	ldrh	r2, [r4, #148]
+	ldr	r1, .L261+232
 	mov	r0, r5
 	bl	sprintf
-.LVL252:
-	.loc 3 71 0
-	ldr	r3, [r6, #2688]
-	.loc 3 70 0
+	ldr	r3, [r6, #2712]
 	add	r5, r5, r0
-	.loc 3 71 0
-	ldr	r2, [r6, #2692]
+	ldr	r2, [r6, #2716]
 	mov	r0, r5
-	ldr	r1, .L261+228
+	ldr	r1, .L261+236
 	str	r3, [sp]
-	ldr	r3, [r6, #2696]
+	ldr	r3, [r6, #2720]
 	bl	sprintf
-.LVL253:
 	add	r4, r5, r0
-	.loc 3 72 0
-	ldr	r2, [r6, #2684]
-	ldr	r1, .L261+232
+	ldr	r2, [r6, #2708]
+	ldr	r1, .L261+240
 	mov	r0, r4
 	bl	sprintf
-.LVL254:
 	add	r4, r4, r0
-	.loc 3 73 0
-	ldr	r2, [r6, #2708]
-	ldr	r1, .L261+236
+	ldr	r2, [r6, #2732]
+	ldr	r1, .L261+244
 	mov	r0, r4
 	bl	sprintf
-.LVL255:
-	.loc 3 74 0
-	movw	r3, #3124
-	.loc 3 73 0
+	movw	r3, #3148
 	add	r4, r4, r0
-	.loc 3 74 0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+240
+	ldr	r1, .L261+248
 	bl	sprintf
-.LVL256:
-	.loc 3 75 0
-	movw	r3, #3126
-	.loc 3 74 0
+	movw	r3, #3150
 	add	r4, r4, r0
-	.loc 3 75 0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+244
+	ldr	r1, .L261+252
 	bl	sprintf
-.LVL257:
 	add	r4, r4, r0
-	.loc 3 76 0
-	ldr	r2, [r6, #3128]
-	ldr	r1, .L261+248
+	ldr	r2, [r6, #3152]
+	ldr	r1, .L261+256
 	mov	r0, r4
 	bl	sprintf
-.LVL258:
-	.loc 3 77 0
-	movw	r3, #3132
-	.loc 3 76 0
+	movw	r3, #3156
 	add	r4, r4, r0
-	.loc 3 77 0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+252
+	ldr	r1, .L261+260
 	bl	sprintf
-.LVL259:
 	add	r4, r4, r0
-	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
-.LVL260:
-	ldr	r1, .L261+256
+	ldr	r1, .L261+264
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL261:
 	add	r4, r4, r0
-	.loc 3 79 0
-	ldrh	r0, [r9]
+	ldrh	r0, [r6, r9]
 	bl	GetFreeBlockMaxEraseCount
-.LVL262:
-	ldr	r1, .L261+260
+	ldr	r1, .L261+268
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL263:
-	.loc 3 80 0
-	ldr	r3, .L261+264
-	.loc 3 79 0
+	ldr	r3, .L261+272
 	add	r4, r4, r0
-	.loc 3 80 0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L250
-.LVL264:
 .L255:
-	.loc 3 103 0
 	sub	r0, r4, r7
-	.loc 3 104 0
 	sub	sp, fp, #40
-.LCFI128:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL265:
 .L250:
-.LCFI129:
-	.loc 3 83 0
 	ldrh	r3, [r6, r8]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L252
-	.loc 3 84 0
-	ldr	r2, [r6, #2300]
+	ldr	r2, [r6, #2324]
 	lsl	r3, r3, #1
 	mov	r0, r4
-	ldr	r1, .L261+268
+	ldr	r1, .L261+276
 	ldrh	r2, [r2, r3]
 	bl	sprintf
-.LVL266:
 	add	r4, r4, r0
 .L252:
-.LBB285:
-	.loc 3 86 0
 	mov	r0, #0
-	.loc 3 90 0
-	ldr	r9, .L261+272
-	.loc 3 86 0
+	ldr	r9, .L261+280
 	bl	List_get_gc_head_node
-.LVL267:
 	uxth	r3, r0
-.LVL268:
-	.loc 3 87 0
 	mov	r5, #0
-	.loc 3 88 0
 	movw	r10, #65535
 .L254:
 	cmp	r3, r10
 	beq	.L253
-	.loc 3 90 0 discriminator 2
-	ldr	r2, [r6, #2304]
+	ldr	r2, [r6, #2328]
 	lsl	r1, r3, #1
 	lsl	r8, r3, #3
 	mov	r0, r4
 	ldrh	r2, [r2, r1]
 	str	r2, [sp, #8]
-	ldr	r2, [r6, #2292]
+	ldr	r2, [r6, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2300]
+	ldr	r2, [r6, #2324]
 	ldrh	r2, [r2, r1]
 	mov	r1, r9
 	str	r2, [sp]
 	mov	r2, r5
 	bl	sprintf
-.LVL269:
-	.loc 3 87 0 discriminator 2
 	add	r5, r5, #1
-	.loc 3 91 0 discriminator 2
-	ldr	r3, [r6, #2292]
-	.loc 3 87 0 discriminator 2
+	ldr	r3, [r6, #2316]
 	cmp	r5, #16
-	.loc 3 90 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 91 0 discriminator 2
 	ldrh	r3, [r3, r8]
-.LVL270:
-	.loc 3 87 0 discriminator 2
 	bne	.L254
 .L253:
-.LBE285:
-.LBB286:
-	.loc 3 95 0
-	ldr	r3, [r6, #2316]
-.LVL271:
-	.loc 3 96 0
+	ldr	r3, [r6, #2340]
 	mov	r5, #0
-	.loc 3 95 0
-	ldr	r2, [r6, #2292]
-	.loc 3 97 0
+	ldr	r2, [r6, #2316]
 	movw	r9, #65535
-	.loc 3 99 0
-	ldr	r10, .L261+276
-	.loc 3 95 0
+	ldr	r10, .L261+284
 	sub	r3, r3, r2
 	ubfx	r3, r3, #3, #16
-.LVL272:
 .L256:
-	.loc 3 97 0
 	cmp	r3, r9
 	beq	.L255
-	.loc 3 99 0 discriminator 2
-	ldr	r1, [r6, #2304]
+	ldr	r1, [r6, #2328]
 	lsl	r2, r3, #1
 	lsl	r8, r3, #3
 	mov	r0, r4
 	ldrh	r2, [r1, r2]
 	mov	r1, r10
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2292]
+	ldr	r2, [r6, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp]
 	mov	r2, r5
-	.loc 3 96 0 discriminator 2
 	add	r5, r5, #1
-	.loc 3 99 0 discriminator 2
 	bl	sprintf
-.LVL273:
-	.loc 3 96 0 discriminator 2
 	cmp	r5, #4
-	.loc 3 99 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 96 0 discriminator 2
 	beq	.L255
-	.loc 3 100 0
-	ldr	r3, [r6, #2292]
+	ldr	r3, [r6, #2316]
 	ldrh	r3, [r3, r8]
-.LVL274:
 	b	.L256
 .L262:
 	.align	2
@@ -3527,6 +2264,8 @@ FtlPrintInfo2buf:
 	.word	.LC11
 	.word	.LC12
 	.word	.LC13
+	.word	.LANCHOR0+2268
+	.word	.LANCHOR0+2348
 	.word	.LC14
 	.word	.LC15
 	.word	.LC16
@@ -3584,8 +2323,6 @@ FtlPrintInfo2buf:
 	.word	.LC67
 	.word	.LC68
 	.word	.LC69
-.LBE286:
-.LFE150:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.align	2
 	.global	rknand_proc_ftlread
@@ -3594,32 +2331,19 @@ FtlPrintInfo2buf:
 	.fpu softvfp
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB151:
-	.loc 3 113 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL275:
 	mov	ip, sp
-.LCFI130:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI131:
 	sub	fp, ip, #4
-.LCFI132:
-	.loc 3 119 0
 	ldr	r2, .L264
-	.loc 3 113 0
 	mov	r5, r0
-	.loc 3 119 0
 	ldr	r1, .L264+4
 	bl	sprintf
-.LVL276:
 	add	r4, r5, r0
-	.loc 3 121 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL277:
 	add	r0, r4, r0
-	.loc 3 123 0
 	sub	r0, r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
 .L265:
@@ -3627,7 +2351,6 @@ rknand_proc_ftlread:
 .L264:
 	.word	.LC70
 	.word	.LC71
-.LFE151:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.align	2
 	.global	GetSwlReplaceBlock
@@ -3636,251 +2359,167 @@ rknand_proc_ftlread:
 	.fpu softvfp
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB246:
-	.loc 2 2497 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI133:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI134:
 	sub	fp, ip, #4
-.LCFI135:
 	sub	sp, sp, #16
-	.loc 2 2507 0
 	ldr	r4, .L290
-	ldr	r2, [r4, #2532]
-	ldr	r3, [r4, #2544]
+	ldr	r2, [r4, #2556]
+	ldr	r3, [r4, #2568]
 	cmp	r2, r3
 	bcs	.L267
-	ldr	r2, [r4, #2304]
-	.loc 2 2509 0
+	ldr	r2, [r4, #2328]
 	mov	r3, #0
-	.loc 2 2510 0
-	ldrh	r1, [r4, #16]
-	.loc 2 2509 0
-	str	r3, [r4, #2524]
+	ldrh	r1, [r4, #40]
+	str	r3, [r4, #2548]
 	sub	r2, r2, #2
 .L268:
-	.loc 2 2510 0 discriminator 1
 	cmp	r3, r1
 	bcc	.L269
-	.loc 2 2512 0
-	ldr	r5, [r4, #2524]
+	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__udivsi3
-.LVL278:
-	str	r0, [r4, #2532]
-	.loc 2 2513 0
-	ldr	r0, [r4, #2528]
-	ldrh	r1, [r4, #68]
+	str	r0, [r4, #2556]
+	ldr	r0, [r4, #2552]
+	ldrh	r1, [r4, #92]
 	sub	r0, r5, r0
 	bl	__udivsi3
-.LVL279:
-	str	r0, [r4, #2524]
+	str	r0, [r4, #2548]
 .L270:
-	.loc 2 2519 0
-	ldr	r6, [r4, #2544]
-	ldr	r7, [r4, #2532]
+	ldr	r6, [r4, #2568]
+	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
 	bls	.L275
-	.loc 2 2519 0 is_stmt 0 discriminator 1
-	ldr	r2, [r4, #2540]
+	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
 	bls	.L275
-.LVL280:
 .L277:
-	.loc 2 2520 0 is_stmt 1
 	movw	r5, #65535
 .L276:
-	.loc 2 2566 0
 	mov	r0, r5
-.LVL281:
 	sub	sp, fp, #40
-.LCFI136:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL282:
 .L269:
-.LCFI137:
-	.loc 2 2511 0 discriminator 3
 	ldrh	r0, [r2, #2]!
-	.loc 2 2510 0 discriminator 3
 	add	r3, r3, #1
-	.loc 2 2511 0 discriminator 3
-	ldr	ip, [r4, #2524]
+	ldr	ip, [r4, #2548]
 	add	r0, r0, ip
-	str	r0, [r4, #2524]
+	str	r0, [r4, #2548]
 	b	.L268
 .L267:
-	.loc 2 2514 0
-	ldr	r3, [r4, #2540]
+	ldr	r3, [r4, #2564]
 	cmp	r2, r3
-	.loc 2 2515 0
 	addhi	r3, r3, #1
-	strhi	r3, [r4, #2540]
-	.loc 2 2516 0
+	strhi	r3, [r4, #2564]
 	movhi	r3, #0
-	.loc 2 2514 0
 	bls	.L270
 .L272:
-	.loc 2 2516 0 discriminator 1
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
 	bcs	.L270
-	.loc 2 2517 0 discriminator 3
-	ldr	r0, [r4, #2304]
+	ldr	r0, [r4, #2328]
 	lsl	r1, r3, #1
-	.loc 2 2516 0 discriminator 3
 	add	r3, r3, #1
-	.loc 2 2517 0 discriminator 3
 	ldrh	r2, [r0, r1]
 	add	r2, r2, #1
 	strh	r2, [r0, r1]	@ movhi
 	b	.L272
 .L275:
-	.loc 2 2522 0
-	ldr	r3, .L290+4
-	ldrh	r0, [r3]
+	movw	r3, #2344
+	ldrh	r0, [r4, r3]
 	add	r0, r0, r0, lsl #1
 	asr	r0, r0, #2
 	bl	GetFreeBlockMaxEraseCount
-.LVL283:
-	.loc 2 2523 0
 	add	r3, r6, #64
-	.loc 2 2522 0
 	mov	r9, r0
-.LVL284:
-	.loc 2 2523 0
 	cmp	r0, r3
 	bcc	.L277
-	.loc 2 2526 0
-	ldr	r3, [r4, #2296]
-.LVL285:
+	ldr	r3, [r4, #2320]
 	cmp	r3, #0
 	beq	.L277
-	.loc 2 2530 0
-	ldrh	r10, [r4, #16]
-	.loc 2 2534 0
+	ldrh	r10, [r4, #40]
 	movw	r1, #65535
-.LVL286:
-	.loc 2 2533 0
-	ldr	lr, [r4, #2292]
-	.loc 2 2534 0
+	ldr	lr, [r4, #2316]
 	mov	r0, #0
-.LVL287:
-	ldr	r8, [r4, #2304]
+	ldr	r8, [r4, #2328]
 	mov	r2, r1
 .L278:
-	.loc 2 2528 0
 	ldrh	ip, [r3]
 	movw	r5, #65535
 	cmp	ip, r5
 	bne	.L281
 	mov	r5, r2
 .L280:
-	.loc 2 2546 0
 	movw	r3, #65535
-.LVL288:
 	cmp	r5, r3
 	beq	.L277
-	.loc 2 2548 0
 	lsl	r3, r5, #1
 	ldrh	r10, [r8, r3]
-.LVL289:
-	.loc 2 2549 0
 	cmp	r6, r10
 	bcs	.L282
 	str	r3, [fp, #-44]
-	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL290:
 	ldr	r3, [fp, #-44]
 	cmp	r6, r0
-	.loc 2 2552 0
-	strcc	r1, [r4, #2544]
-.LVL291:
+	strcc	r1, [r4, #2568]
 .L282:
-	.loc 2 2554 0
 	cmp	r7, r10
 	bls	.L277
-	.loc 2 2554 0 is_stmt 0 discriminator 1
 	add	r2, r10, #128
 	cmp	r9, r2
 	ble	.L277
-	.loc 2 2556 0 is_stmt 1
 	add	r2, r10, #256
 	cmp	r7, r2
 	bhi	.L283
-	.loc 2 2556 0 is_stmt 0 discriminator 1
-	ldr	r2, [r4, #2540]
+	ldr	r2, [r4, #2564]
 	add	r10, r10, #768
-.LVL292:
 	cmp	r10, r2
 	bcs	.L277
-.LVL293:
 .L283:
-	.loc 2 2558 0 is_stmt 1
 	str	r9, [sp, #8]
 	mov	r1, r5
-.LVL294:
 	ldrh	r2, [r8, r3]
-	ldr	r0, .L290+8
-.LVL295:
+	ldr	r0, .L290+4
 	str	r2, [sp, #4]
-	ldr	r2, [r4, #2300]
+	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3]
 	mov	r2, r7
 	str	r3, [sp]
-	ldr	r3, [r4, #2540]
+	ldr	r3, [r4, #2564]
 	bl	printk
-.LVL296:
-	.loc 2 2559 0
 	mov	r3, #1
-	str	r3, [r4, #3136]
-	.loc 2 2560 0
+	str	r3, [r4, #3160]
 	b	.L276
-.LVL297:
 .L281:
-	.loc 2 2529 0
 	add	r0, r0, #1
-.LVL298:
 	uxth	r0, r0
-.LVL299:
-	.loc 2 2530 0
 	cmp	r0, r10
 	bhi	.L277
-	.loc 2 2532 0
 	ldrh	r5, [r3, #4]
 	cmp	r5, #0
 	beq	.L279
-	.loc 2 2533 0
 	sub	r3, r3, lr
-.LVL300:
 	asr	r3, r3, #3
 	uxth	r5, r3
-	.loc 2 2534 0
 	lsl	r3, r5, #1
 	ldrh	r3, [r8, r3]
 	cmp	r6, r3
 	bcs	.L280
-	.loc 2 2533 0
 	cmp	r1, r3
 	movhi	r1, r3
 	movhi	r2, r5
-.LVL301:
 .L279:
-	.loc 2 2543 0
 	add	r3, lr, ip, lsl #3
 	b	.L278
 .L291:
 	.align	2
 .L290:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2320
 	.word	.LC72
-.LFE246:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.align	2
 	.global	free_data_superblock
@@ -3889,46 +2528,28 @@ GetSwlReplaceBlock:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB247:
-	.loc 2 2570 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL302:
 	mov	ip, sp
-.LCFI138:
 	push	{fp, ip, lr, pc}
-.LCFI139:
 	sub	fp, ip, #4
-.LCFI140:
-	.loc 2 2570 0
 	uxth	r0, r0
-	.loc 2 2571 0
 	movw	r3, #65535
 	cmp	r0, r3
 	beq	.L293
-.LBB289:
-.LBB290:
-	.loc 2 2573 0
 	ldr	r3, .L294
 	mov	r1, #0
-	ldr	r2, [r3, #2300]
+	ldr	r2, [r3, #2324]
 	lsl	r3, r0, #1
 	strh	r1, [r2, r3]	@ movhi
-	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL303:
 .L293:
-.LBE290:
-.LBE289:
-	.loc 2 2576 0
 	mov	r0, #0
-.LVL304:
 	ldmfd	sp, {fp, sp, pc}
 .L295:
 	.align	2
 .L294:
 	.word	.LANCHOR0
-.LFE247:
 	.size	free_data_superblock, .-free_data_superblock
 	.align	2
 	.global	get_new_active_ppa
@@ -3937,146 +2558,96 @@ free_data_superblock:
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB250:
-	.loc 2 2703 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL305:
 	mov	ip, sp
-.LCFI141:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI142:
 	sub	fp, ip, #4
-.LCFI143:
-	.loc 2 2707 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
-	.loc 2 2703 0
 	mov	r4, r0
-	.loc 2 2707 0
 	cmp	r2, r3
 	bne	.L297
-	.loc 2 2707 0 is_stmt 0 discriminator 1
 	movw	r2, #2707
 	ldr	r1, .L310
 	ldr	r0, .L310+4
 	bl	printk
-.LVL306:
 .L297:
-	.loc 2 2708 0 is_stmt 1
 	ldr	r5, .L310+8
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	cmp	r2, r3
 	bne	.L298
-	.loc 2 2708 0 is_stmt 0 discriminator 1
 	movw	r2, #2708
 	ldr	r1, .L310
 	ldr	r0, .L310+4
 	bl	printk
-.LVL307:
 .L298:
-	.loc 2 2709 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
 	bne	.L299
-	.loc 2 2709 0 is_stmt 0 discriminator 1
 	movw	r2, #2709
 	ldr	r1, .L310
 	ldr	r0, .L310+4
 	bl	printk
-.LVL308:
 .L299:
-	.loc 2 2711 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2710 0
 	mov	r3, #0
-	.loc 2 2714 0
-	ldrh	r1, [r5, #8]
-	.loc 2 2712 0
+	ldrh	r1, [r5, #32]
 	movw	ip, #65535
-	.loc 2 2710 0
 	strb	r3, [r4, #10]
-	.loc 2 2711 0
 	add	r2, r4, r2, lsl #1
 	ldrh	r0, [r2, #16]
-.LVL309:
-	.loc 2 2716 0
 	mov	r2, r3
 .L300:
-	.loc 2 2712 0
 	cmp	r0, ip
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	beq	.L302
-	.loc 2 2721 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2720 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2721 0
 	sub	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2720 0
 	orr	r6, r6, r0, lsl #10
-	.loc 2 2728 0
 	movw	r0, #65535
-.LVL310:
-	.loc 2 2721 0
 	strh	r2, [r4, #4]	@ movhi
 .L304:
-	.loc 2 2723 0
 	add	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2724 0
 	cmp	r1, r3
-	.loc 2 2725 0
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2726 0
 	moveq	r3, #0
-	.loc 2 2728 0
 	add	ip, r4, r3, lsl #1
 	ldrh	ip, [ip, #16]
 	cmp	ip, r0
 	beq	.L304
 	strb	r3, [r4, #6]
-	.loc 2 2730 0
 	cmp	r2, #0
 	ldrh	r3, [r4, #2]
-	ldrh	r1, [r5, #78]
+	ldrh	r1, [r5, #102]
 	sub	r3, r3, r1
 	clz	r3, r3
 	lsr	r3, r3, #5
 	moveq	r3, #0
 	cmp	r3, #0
 	beq	.L296
-	.loc 2 2730 0 is_stmt 0 discriminator 2
 	movw	r2, #2730
 	ldr	r1, .L310
 	ldr	r0, .L310+4
 	bl	printk
-.LVL311:
 .L296:
-	.loc 2 2732 0 is_stmt 1
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.LVL312:
 .L302:
-	.loc 2 2713 0
 	add	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2714 0
 	cmp	r3, r1
-	.loc 2 2713 0
 	strb	r3, [r4, #6]
-	.loc 2 2715 0
 	ldrheq	r3, [r4, #2]
-	.loc 2 2716 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2715 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2718 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	add	r3, r4, r3, lsl #1
 	ldrh	r0, [r3, #16]
@@ -4087,7 +2658,6 @@ get_new_active_ppa:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
-.LFE250:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	2
 	.global	FtlGcBufInit
@@ -4096,112 +2666,88 @@ get_new_active_ppa:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB253:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI144:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI145:
 	sub	fp, ip, #4
-.LCFI146:
-	.loc 5 25 0
 	ldr	r3, .L317
-	.loc 5 27 0
 	mov	lr, #12
 	mov	r4, #1
-	.loc 5 30 0
 	mov	r5, #20
-	.loc 5 25 0
 	mov	r2, #0
-	str	r2, [r3, #3140]
+	str	r2, [r3, #3164]
 .L313:
-	.loc 5 26 0 discriminator 1
-	ldrh	r1, [r3, #8]
+	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	add	ip, r2, #1
 	cmp	r0, r1
 	bcc	.L314
-	.loc 5 35 0 discriminator 1
 	mov	ip, #12
 	mov	lr, #0
 .L315:
-	.loc 5 34 0 discriminator 1
-	ldr	r2, [r3, #3160]
+	ldr	r2, [r3, #3184]
 	cmp	r1, r2
 	bcc	.L316
-	.loc 5 39 0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 .L314:
 	uxth	r2, r2
-	.loc 5 27 0 discriminator 3
-	ldr	r6, [r3, #3144]
+	ldr	r6, [r3, #3168]
 	mul	r0, lr, r2
 	add	r1, r6, r0
 	str	r4, [r1, #8]
-	.loc 5 28 0 discriminator 3
-	ldrh	r1, [r3, #86]
+	ldrh	r1, [r3, #110]
 	mul	r1, r2, r1
 	add	r7, r1, #3
 	cmp	r1, #0
 	movlt	r1, r7
-	ldr	r7, [r3, #3148]
+	ldr	r7, [r3, #3172]
 	bic	r1, r1, #3
 	add	r1, r7, r1
 	str	r1, [r6, r0]
-	.loc 5 29 0 discriminator 3
-	ldrh	r1, [r3, #88]
-	ldr	r7, [r3, #3144]
+	ldrh	r1, [r3, #112]
+	ldr	r7, [r3, #3168]
 	mul	r1, r2, r1
 	add	r6, r7, r0
 	add	r8, r1, #3
 	cmp	r1, #0
 	movlt	r1, r8
-	ldr	r8, [r3, #3152]
+	ldr	r8, [r3, #3176]
 	bic	r1, r1, #3
 	add	r1, r8, r1
 	str	r1, [r6, #4]
-	.loc 5 30 0 discriminator 3
-	ldr	r1, [r3, #3156]
+	ldr	r1, [r3, #3180]
 	mla	r2, r5, r2, r1
 	ldr	r1, [r7, r0]
 	str	r1, [r2, #8]
-	.loc 5 31 0 discriminator 3
 	ldr	r1, [r6, #4]
 	str	r1, [r2, #12]
 	mov	r2, ip
 	b	.L313
 .L316:
-	.loc 5 35 0 discriminator 3
 	mul	r4, ip, r1
-	ldr	r5, [r3, #3144]
+	ldr	r5, [r3, #3168]
 	add	r2, r5, r4
 	str	lr, [r2, #8]
-	.loc 5 36 0 discriminator 3
-	ldrh	r2, [r3, #86]
+	ldrh	r2, [r3, #110]
 	mul	r2, r1, r2
 	add	r0, r2, #3
 	cmp	r2, #0
 	movlt	r2, r0
-	ldr	r0, [r3, #3148]
+	ldr	r0, [r3, #3172]
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r5, r4]
-	.loc 5 37 0 discriminator 3
-	ldrh	r2, [r3, #88]
-	ldr	r0, [r3, #3144]
+	ldrh	r2, [r3, #112]
+	ldr	r0, [r3, #3168]
 	mul	r2, r1, r2
 	add	r0, r0, r4
-	.loc 5 34 0 discriminator 3
 	add	r1, r1, #1
 	uxth	r1, r1
-	.loc 5 37 0 discriminator 3
 	add	r4, r2, #3
 	cmp	r2, #0
 	movlt	r2, r4
-	ldr	r4, [r3, #3152]
+	ldr	r4, [r3, #3176]
 	bic	r2, r2, #3
 	add	r2, r4, r2
 	str	r2, [r0, #4]
@@ -4210,7 +2756,6 @@ FtlGcBufInit:
 	.align	2
 .L317:
 	.word	.LANCHOR0
-.LFE253:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
 	.global	FtlGcBufFree
@@ -4219,44 +2764,28 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB254:
-	.loc 5 42 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL313:
 	mov	ip, sp
-.LCFI147:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI148:
 	sub	fp, ip, #4
-.LCFI149:
-	.loc 5 47 0
 	ldr	r3, .L326
-	.loc 5 46 0
 	mov	lr, #0
-	.loc 5 48 0
 	mov	r5, #20
 	mov	r7, #12
-	.loc 5 49 0
 	mov	r8, lr
-	.loc 5 47 0
-	ldr	r6, [r3, #3160]
-	.loc 5 48 0
-	ldr	r4, [r3, #3144]
+	ldr	r6, [r3, #3184]
+	ldr	r4, [r3, #3168]
 .L320:
 	uxth	r3, lr
-	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
 	ldmfdls	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-	.loc 5 48 0
 	mla	ip, r5, r3, r0
 	mov	r2, #0
 .L321:
 	uxth	r3, r2
-	.loc 5 47 0 discriminator 1
 	cmp	r6, r3
 	bls	.L322
-	.loc 5 48 0
 	mul	r3, r7, r3
 	add	r2, r2, #1
 	ldr	r10, [r4, r3]
@@ -4264,7 +2793,6 @@ FtlGcBufFree:
 	ldr	r3, [ip, #8]
 	cmp	r10, r3
 	bne	.L321
-	.loc 5 49 0
 	str	r8, [r9, #8]
 .L322:
 	add	lr, lr, #1
@@ -4273,7 +2801,6 @@ FtlGcBufFree:
 	.align	2
 .L326:
 	.word	.LANCHOR0
-.LFE254:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
 	.global	FtlGcBufAlloc
@@ -4282,59 +2809,38 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB255:
-	.loc 5 57 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL314:
 	mov	ip, sp
-.LCFI150:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-.LCFI151:
 	sub	fp, ip, #4
-.LCFI152:
-	.loc 5 62 0
 	ldr	r3, .L335
-	.loc 5 61 0
 	mov	ip, #0
-	.loc 5 63 0
 	mov	r6, #12
-	.loc 5 64 0
 	mov	r7, #1
-	.loc 5 65 0
 	mov	r8, #20
-	.loc 5 62 0
-	ldr	r4, [r3, #3160]
-	.loc 5 63 0
-	ldr	r5, [r3, #3144]
+	ldr	r4, [r3, #3184]
+	ldr	r5, [r3, #3168]
 .L329:
 	uxth	r2, ip
-	.loc 5 61 0 discriminator 1
 	cmp	r1, r2
 	bhi	.L333
-	.loc 5 71 0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 .L333:
 	mov	lr, #0
 .L330:
 	uxth	r3, lr
-	.loc 5 62 0 discriminator 1
 	cmp	r4, r3
 	bls	.L331
-	.loc 5 63 0
 	mla	r3, r6, r3, r5
 	add	lr, lr, #1
 	ldr	r9, [r3, #8]
 	cmp	r9, #0
 	bne	.L330
-	.loc 5 65 0
 	mla	r2, r8, r2, r0
 	ldr	lr, [r3]
-	.loc 5 64 0
 	str	r7, [r3, #8]
-	.loc 5 65 0
 	str	lr, [r2, #8]
-	.loc 5 66 0
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
 .L331:
@@ -4344,7 +2850,6 @@ FtlGcBufAlloc:
 	.align	2
 .L335:
 	.word	.LANCHOR0
-.LFE255:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
 	.global	IsBlkInGcList
@@ -4353,51 +2858,32 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB256:
-	.loc 5 74 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL315:
 	mov	ip, sp
-.LCFI153:
 	push	{fp, ip, lr, pc}
-.LCFI154:
 	sub	fp, ip, #4
-.LCFI155:
-	.loc 5 78 0
 	ldr	r2, .L342
-	.loc 5 74 0
+	movw	r1, #3192
 	uxth	r0, r0
-	.loc 5 78 0
-	ldr	r3, [r2, #3164]
-	.loc 5 77 0
-	add	r2, r2, #3168
-	ldrh	r2, [r2]
+	ldr	r3, [r2, #3188]
+	ldrh	r2, [r2, r1]
 	add	r2, r3, r2, lsl #1
 .L338:
-	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	r3, r2
 	bne	.L340
-	.loc 5 81 0 is_stmt 1
 	mov	r0, #0
-.LVL316:
 	ldmfd	sp, {fp, sp, pc}
-.LVL317:
 .L340:
-	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
 	bne	.L338
-	.loc 5 79 0
 	mov	r0, #1
-.LVL318:
-	.loc 5 82 0
 	ldmfd	sp, {fp, sp, pc}
 .L343:
 	.align	2
 .L342:
 	.word	.LANCHOR0
-.LFE256:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	2
 	.global	FtlGcUpdatePage
@@ -4406,85 +2892,57 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB257:
-	.loc 5 85 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL319:
 	mov	ip, sp
-.LCFI156:
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI157:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI158:
-	.loc 5 85 0
 	mov	r4, r0
-	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL320:
-	.loc 5 85 0
 	mov	r5, r1
 	mov	r6, r2
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL321:
-	.loc 5 91 0
-	ldr	r3, .L348
-	mov	ip, #0
-	add	lr, r3, #3168
-	.loc 5 92 0
-	ldr	r1, [r3, #3164]
-	.loc 5 91 0
-	ldrh	r7, [lr]
-	sub	r2, r1, #2
-.LVL322:
+	ldr	ip, .L348
+	movw	r3, #3192
+	ldr	r2, [ip, #3188]
+	ldrh	lr, [ip, r3]
+	mov	r3, #0
+	sub	r1, r2, #2
 .L345:
-	uxth	r8, ip
-.LVL323:
-	.loc 5 91 0 is_stmt 0 discriminator 1
-	cmp	r8, r7
+	uxth	r7, r3
+	cmp	r7, lr
 	bcc	.L347
-	.loc 5 97 0 is_stmt 1
-	moveq	ip, r8
-	lsleq	ip, ip, #1
-	strheq	r0, [r1, ip]	@ movhi
-	.loc 5 98 0
-	ldrheq	r2, [lr]
-	addeq	r2, r2, #1
-	strheq	r2, [lr]	@ movhi
+	bne	.L346
+	lsl	r3, r7, #1
+	strh	r0, [r2, r3]	@ movhi
+	movw	r2, #3192
+	ldrh	r3, [ip, r2]
+	add	r3, r3, #1
+	strh	r3, [ip, r2]	@ movhi
 	b	.L346
 .L347:
-	.loc 5 92 0
-	ldrh	r8, [r2, #2]!
-.LVL324:
-	add	ip, ip, #1
-	cmp	r8, r0
+	ldrh	r7, [r1, #2]!
+	add	r3, r3, #1
+	cmp	r7, r0
 	bne	.L345
-.LVL325:
 .L346:
-	.loc 5 101 0
-	movw	ip, #3176
-	mov	r0, #12
-.LVL326:
-	ldrh	r2, [r3, ip]
-	mul	r0, r0, r2
-	ldr	r2, [r3, #3172]
-	add	r1, r2, r0
-	.loc 5 102 0
+	ldr	r0, .L348+4
+	mov	r3, #12
+	ldrh	r2, [r0]
+	mul	r3, r3, r2
+	ldr	r2, [ip, #3196]
+	add	r1, r2, r3
 	stmib	r1, {r5, r6}
-.LVL327:
-	.loc 5 103 0
-	str	r4, [r2, r0]
-	.loc 5 107 0
-	ldrh	r2, [r3, ip]
-	add	r2, r2, #1
-	strh	r2, [r3, ip]	@ movhi
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+	str	r4, [r2, r3]
+	ldrh	r3, [r0]
+	add	r3, r3, #1
+	strh	r3, [r0]	@ movhi
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L349:
 	.align	2
 .L348:
 	.word	.LANCHOR0
-.LFE257:
+	.word	.LANCHOR0+3200
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.align	2
 	.global	FtlGcRefreshBlock
@@ -4493,49 +2951,31 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB264:
-	.loc 5 345 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL328:
 	mov	ip, sp
-.LCFI159:
 	push	{r4, fp, ip, lr, pc}
-.LCFI160:
 	sub	fp, ip, #4
-.LCFI161:
-	.loc 5 345 0
 	uxth	r4, r0
-.LVL329:
-	.loc 5 347 0
 	ldr	r0, .L353
 	mov	r1, r4
 	bl	printk
-.LVL330:
-	.loc 5 349 0
 	ldr	r3, .L353+4
-	movw	ip, #3178
+	movw	ip, #3202
 	ldrh	lr, [r3, ip]
 	cmp	r4, lr
 	beq	.L351
-	.loc 5 349 0 is_stmt 0 discriminator 1
-	movw	r2, #3180
+	movw	r2, #3204
 	ldrh	r0, [r3, r2]
 	cmp	r4, r0
 	beq	.L351
-	.loc 5 351 0 is_stmt 1
 	movw	r1, #65535
 	cmp	lr, r1
-	.loc 5 352 0
 	strheq	r4, [r3, ip]	@ movhi
-	.loc 5 351 0
 	beq	.L351
-	.loc 5 353 0
 	cmp	r0, r1
-	.loc 5 354 0
 	strheq	r4, [r3, r2]	@ movhi
 .L351:
-	.loc 5 356 0
 	mov	r0, #0
 	ldmfd	sp, {r4, fp, sp, pc}
 .L354:
@@ -4543,7 +2983,6 @@ FtlGcRefreshBlock:
 .L353:
 	.word	.LC73
 	.word	.LANCHOR0
-.LFE264:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
@@ -4552,55 +2991,32 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB265:
-	.loc 5 359 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL331:
 	mov	ip, sp
-.LCFI162:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI163:
 	sub	fp, ip, #4
-.LCFI164:
-	.loc 5 364 0
 	ldr	r4, .L359
-	.loc 5 359 0
 	uxth	r5, r0
-.LVL332:
-	.loc 5 364 0
-	movw	r6, #3182
-	.loc 5 361 0
+	movw	r6, #3206
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL333:
-	.loc 5 364 0
 	mov	r2, r5
-	.loc 5 361 0
 	mov	r7, r0
-	.loc 5 364 0
 	ldrh	r1, [r4, r6]
 	ldr	r0, .L359+4
 	bl	printk
-.LVL334:
-	.loc 5 366 0
 	mov	r0, r7
 	bl	FtlGcRefreshBlock
-.LVL335:
-	.loc 5 368 0
 	ldrh	r3, [r4, r6]
 	mov	r2, #0
-	.loc 5 369 0
-	add	r0, r4, #3184
+	ldr	r0, .L359+8
 .L356:
-	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
 	bhi	.L358
-	.loc 5 372 0
 	cmp	r3, #15
-	.loc 5 373 0
-	movwls	r2, #3182
+	movwls	r2, #3206
 	addls	r1, r3, #1
 	strhls	r1, [r4, r2]	@ movhi
 	lslls	r3, r3, #1
@@ -4609,13 +3025,11 @@ FtlGcMarkBadPhyBlk:
 	b	.L357
 .L358:
 	add	r2, r2, #1
-	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
 	bne	.L356
 .L357:
-	.loc 5 375 0
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
 .L360:
@@ -4623,8 +3037,7 @@ FtlGcMarkBadPhyBlk:
 .L359:
 	.word	.LANCHOR0
 	.word	.LC74
-	.word	.LANCHOR0+3184
-.LFE265:
+	.word	.LANCHOR0+3208
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.align	2
 	.global	FtlGcReFreshBadBlk
@@ -4633,209 +3046,197 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB266:
-	.loc 5 379 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI165:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI166:
 	sub	fp, ip, #4
-.LCFI167:
-	.loc 5 380 0
 	ldr	r4, .L367
-	movw	r3, #3182
+	movw	r3, #3206
 	ldrh	r2, [r4, r3]
 	cmp	r2, #0
 	beq	.L362
-	.loc 5 380 0 is_stmt 0 discriminator 1
-	movw	r3, #3178
+	movw	r3, #3202
 	ldrh	r1, [r4, r3]
 	movw	r3, #65535
 	cmp	r1, r3
 	bne	.L362
-	.loc 5 381 0 is_stmt 1
-	movw	r3, #3218
-.LBB293:
-.LBB294:
-	.loc 5 383 0
-	movw	r5, #3218
-.LBE294:
-.LBE293:
-	.loc 5 381 0
+	movw	r3, #3242
+	movw	r5, #3242
 	ldrh	r1, [r4, r3]
 	cmp	r1, r2
-	.loc 5 382 0
 	movcs	r2, #0
 	strhcs	r2, [r4, r3]	@ movhi
-.LBB296:
-.LBB295:
-	.loc 5 383 0
 	ldrh	r3, [r4, r5]
 	ldr	r2, .L367+4
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	bl	P2V_block_in_plane
-.LVL336:
 	bl	FtlGcRefreshBlock
-.LVL337:
-	.loc 5 384 0
 	ldrh	r3, [r4, r5]
 	add	r3, r3, #1
 	strh	r3, [r4, r5]	@ movhi
 .L362:
-.LBE295:
-.LBE296:
-	.loc 5 387 0
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
 .L368:
 	.align	2
 .L367:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3184
-.LFE266:
+	.word	.LANCHOR0+3208
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.align	2
+	.global	ftl_malloc
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r1, .L370
+	bl	__kmalloc
+	ldmfd	sp, {fp, sp, pc}
+.L371:
+	.align	2
+.L370:
+	.word	37748929
+	.size	ftl_malloc, .-ftl_malloc
+	.align	2
+	.global	ftl_free
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	bl	kfree
+	ldmfd	sp, {fp, sp, pc}
+	.size	ftl_free, .-ftl_free
+	.align	2
+	.global	rknand_print_hex
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	sub	sp, sp, #16
+	mul	r3, r2, r3
+	mov	ip, #0
+	str	r2, [sp]
+	str	ip, [sp, #12]
+	mov	r2, #2
+	stmib	sp, {r1, r3}
+	mov	r1, r0
+	mov	r3, #16
+	ldr	r0, .L374
+	bl	print_hex_dump
+	sub	sp, fp, #12
+	ldmfd	sp, {fp, sp, pc}
+.L375:
+	.align	2
+.L374:
+	.word	.LC75
+	.size	rknand_print_hex, .-rknand_print_hex
+	.align	2
 	.global	FlashReadPages
 	.syntax unified
 	.arm
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB272:
-	.loc 1 44 0
-	@ args = 0, pretend = 0, frame = 12
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL338:
 	mov	ip, sp
-.LCFI168:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI169:
 	sub	fp, ip, #4
-.LCFI170:
-	sub	sp, sp, #12
-	.loc 1 50 0
+	sub	sp, sp, #8
 	mov	r6, #0
-.LVL339:
-	.loc 1 46 0
-	ldr	r5, .L387
-	.loc 1 44 0
-	mov	r8, r1
-	.loc 1 51 0
-	ldr	r9, .L387+4
+	ldr	r5, .L394
+	mov	r7, r1
+	ldr	r9, .L394+4
 	mov	r4, r0
-	ldr	r10, .L387+8
-	.loc 1 46 0
-	ldrh	r3, [r5, #12]
-.LVL340:
-	str	r3, [fp, #-52]
-.LVL341:
-.L370:
-	.loc 1 50 0 discriminator 1
-	cmp	r6, r8
-	bne	.L377
-	.loc 1 71 0
+	ldr	r10, .L394+8
+	ldrh	r8, [r5, #12]
+.L377:
+	cmp	r6, r7
+	bne	.L384
 	mov	r0, #0
-.LVL342:
 	sub	sp, fp, #40
-.LCFI171:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL343:
-.L377:
-.LCFI172:
-	.loc 1 51 0
+.L384:
 	ldr	r3, [r4, #8]
-.LVL344:
 	cmp	r3, #0
-	beq	.L371
-	.loc 1 51 0 is_stmt 0 discriminator 2
+	beq	.L378
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	bne	.L372
-.L371:
-	.loc 1 51 0 discriminator 3
-	mov	r2, #51
-.LVL345:
+	bne	.L379
+.L378:
+	mov	r2, #76
 	mov	r1, r9
 	mov	r0, r10
-.LVL346:
 	bl	printk
-.LVL347:
-.L372:
-	.loc 1 53 0 is_stmt 1
-	ldr	r7, .L387+12
-	.loc 1 52 0
+.L379:
 	sub	r2, fp, #48
-.LVL348:
 	sub	r1, fp, #44
 	mov	r0, r4
-.LVL349:
 	bl	l2p_addr_tran
-.LVL350:
-	.loc 1 53 0
 	ldr	r3, [r4, #12]
-	ldr	ip, [r7, #12]
+	ldr	ip, [r5, #3256]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
 	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
 	blx	ip
-.LVL351:
-	.loc 1 57 0
 	str	r0, [r4]
-	.loc 1 58 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L374
-	.loc 1 59 0
-	ldr	r0, [fp, #-52]
-.LVL352:
+	bne	.L381
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
-	ldr	ip, [r7, #12]
+	ldr	ip, [r5, #3256]
 	add	r3, r3, #8
 	add	r2, r2, #2048
-	add	r1, r0, r1
 	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
-.LVL353:
+	add	r1, r8, r1
 	blx	ip
-.LVL354:
-	.loc 1 63 0
 	cmn	r0, #1
-	beq	.L375
-	.loc 1 64 0 discriminator 1
+	beq	.L382
 	ldr	r3, [r4, #12]
-	.loc 1 63 0 discriminator 1
 	ldr	r2, [r3, #12]
 	cmn	r2, #1
-	bne	.L374
-	.loc 1 64 0
+	bne	.L381
 	ldr	r2, [r3, #8]
 	cmn	r2, #1
-	bne	.L374
-	.loc 1 65 0
+	bne	.L381
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L374
-.L375:
-	.loc 1 67 0
+	beq	.L381
+.L382:
 	mvn	r3, #0
 	str	r3, [r4]
-.L374:
-	.loc 1 50 0 discriminator 2
+.L381:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L370
-.L388:
+	b	.L377
+.L395:
 	.align	2
-.L387:
-	.word	g_nand_phy_info
+.L394:
+	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
-	.word	g_nand_ops
-.LFE272:
 	.size	FlashReadPages, .-FlashReadPages
 	.align	2
 	.global	FtlLoadFactoryBbt
@@ -4844,95 +3245,59 @@ FlashReadPages:
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB180:
-	.loc 4 279 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI173:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI174:
 	sub	fp, ip, #4
-.LCFI175:
-	.loc 4 286 0
-	ldr	r4, .L399
-	.loc 4 289 0
+	ldr	r4, .L406
 	mov	r6, #0
-.LVL355:
-	.loc 4 290 0
 	mvn	r9, #0
-	.loc 4 294 0
-	ldr	r10, .L399+4
-	.loc 4 286 0
-	ldr	r3, [r4, #3240]
-	add	r7, r4, #138
-	.loc 4 287 0
-	ldr	r8, [r4, #3244]
-	.loc 4 286 0
-	str	r3, [r4, #3228]
-	.loc 4 287 0
-	str	r8, [r4, #3232]
-.LVL356:
-.L390:
-	.loc 4 289 0 discriminator 1
-	ldrh	r3, [r4, #30]
+	ldr	r10, .L406+4
+	ldr	r3, [r4, #3280]
+	add	r7, r4, #162
+	ldr	r8, [r4, #3284]
+	str	r3, [r4, #3268]
+	str	r8, [r4, #3272]
+.L397:
+	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L395
-	.loc 4 314 0
+	bcc	.L402
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L395:
-	.loc 4 291 0
-	ldrh	r5, [r4, #74]
-.LVL357:
-	.loc 4 290 0
+.L402:
+	ldrh	r5, [r4, #98]
 	strh	r9, [r7, #2]!	@ movhi
-.LVL358:
-.L392:
-	.loc 4 291 0 discriminator 2
-	ldrh	r3, [r4, #74]
+.L399:
+	ldrh	r3, [r4, #98]
 	sub	r5, r5, #1
-.LVL359:
 	uxth	r5, r5
-.LVL360:
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L393
-	.loc 4 292 0
+	ble	.L400
 	mla	r3, r6, r3, r5
-	.loc 4 294 0
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 292 0
 	lsl	r3, r3, #10
-.LVL361:
-	.loc 4 293 0
-	str	r3, [r4, #3224]
-	.loc 4 294 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL362:
-	.loc 4 295 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L392
-	.loc 4 301 0
+	beq	.L399
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L392
-	.loc 4 303 0
+	bne	.L399
 	strh	r5, [r7]	@ movhi
-.L393:
-	.loc 4 289 0 discriminator 2
-	add	r6, r6, #1
-	b	.L390
 .L400:
+	add	r6, r6, #1
+	b	.L397
+.L407:
 	.align	2
-.L399:
+.L406:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-.LFE180:
+	.word	.LANCHOR0+3260
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
@@ -4941,114 +3306,69 @@ FtlLoadFactoryBbt:
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB186:
-	.loc 2 47 0
 	@ args = 0, pretend = 0, frame = 84
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL363:
 	mov	ip, sp
-.LCFI176:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI177:
 	sub	fp, ip, #4
-.LCFI178:
 	sub	sp, sp, #84
-	.loc 2 51 0
 	cmp	r1, #1
-	ldr	r3, .L409
-	.loc 2 57 0
+	ldr	r3, .L416
 	lsl	r6, r0, #10
-	.loc 2 58 0
 	mov	r2, r1
-	.loc 2 47 0
 	mov	r7, r1
-	.loc 2 58 0
 	sub	r0, fp, #116
-.LVL364:
-	.loc 2 51 0
-	ldrheq	r4, [r3, #80]
-	.loc 2 58 0
+	ldrheq	r4, [r3, #104]
 	mov	r1, #1
-.LVL365:
-	.loc 2 51 0
-	ldrhne	r4, [r3, #78]
-	.loc 2 53 0
-	ldr	r3, .L409+4
-	.loc 2 56 0
+	ldrhne	r4, [r3, #102]
+	ldr	r3, .L416+4
 	sub	r4, r4, #1
 	sxth	r5, r4
-.LVL366:
-	.loc 2 53 0
 	str	r3, [fp, #-108]
-	.loc 2 54 0
 	sub	r3, fp, #96
 	str	r3, [fp, #-104]
-	.loc 2 57 0
 	orr	r3, r5, r6
 	str	r3, [fp, #-112]
-	.loc 2 58 0
 	bl	FlashReadPages
-.LVL367:
-	.loc 2 59 0
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
 	moveq	r8, #0
-.LVL368:
-	beq	.L405
-.L404:
-	.loc 2 73 0
+	beq	.L412
+.L411:
 	mov	r0, r5
 	sub	sp, fp, #32
-.LCFI179:
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL369:
-.L408:
-.LCFI180:
-	.loc 2 61 0
+.L415:
 	add	r4, r8, r5
-	.loc 2 63 0
 	mov	r2, r7
-	.loc 2 61 0
 	add	r4, r4, r4, lsr #31
-	.loc 2 63 0
 	mov	r1, #1
 	sub	r0, fp, #116
-	.loc 2 61 0
 	asr	r4, r4, #1
-	.loc 2 62 0
 	sxth	r3, r4
 	orr	r3, r3, r6
 	str	r3, [fp, #-112]
-	.loc 2 63 0
 	bl	FlashReadPages
-.LVL370:
-	.loc 2 65 0
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
-	bne	.L406
-	.loc 2 65 0 is_stmt 0 discriminator 1
+	bne	.L413
 	ldr	r3, [fp, #-92]
 	cmn	r3, #1
-	.loc 2 66 0 is_stmt 1 discriminator 1
 	subeq	r4, r4, #1
 	sxtheq	r5, r4
-	.loc 2 65 0 discriminator 1
-	beq	.L405
-.L406:
-	.loc 2 68 0
+	beq	.L412
+.L413:
 	add	r4, r4, #1
 	sxth	r8, r4
-.L405:
-	.loc 2 60 0
+.L412:
 	cmp	r8, r5
-	ble	.L408
-	b	.L404
-.L410:
+	ble	.L415
+	b	.L411
+.L417:
 	.align	2
-.L409:
+.L416:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LFE186:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	2
 	.global	FlashProgPages
@@ -5057,243 +3377,147 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB273:
-	.loc 1 74 0
-	@ args = 0, pretend = 0, frame = 36
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL371:
 	mov	ip, sp
-.LCFI181:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI182:
 	sub	fp, ip, #4
-.LCFI183:
-	sub	sp, sp, #36
-	.loc 1 74 0
-	mov	r8, r3
-	.loc 1 76 0
-	ldr	r3, .L441
-.LVL372:
-	.loc 1 74 0
-	mov	r7, r2
-	.loc 1 81 0
-	ldr	r10, .L441+4
-	.loc 1 74 0
-	mov	r9, r1
+	sub	sp, sp, #32
+	mov	r9, r3
+	ldr	r6, .L448
+	mov	r10, r1
+	mov	r8, r2
 	mov	r4, r0
-	.loc 1 80 0
 	mov	r5, r0
-.LVL373:
-	.loc 1 76 0
-	ldrh	r2, [r3, #12]
-.LVL374:
-	.loc 1 80 0
-	mov	r6, #0
-	str	r3, [fp, #-76]
-	.loc 1 76 0
-	str	r2, [fp, #-72]
-.LVL375:
-.L412:
-	.loc 1 80 0 discriminator 1
-	cmp	r6, r9
-	bne	.L420
-	.loc 1 101 0
-	cmp	r8, #0
+	mov	r7, #0
+	ldrh	r3, [r6, #12]
+	str	r3, [fp, #-72]
+.L419:
+	cmp	r7, r10
 	bne	.L427
-.L440:
-	.loc 1 131 0
+	cmp	r9, #0
+	bne	.L434
+.L447:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI184:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL376:
-.L420:
-.LCFI185:
-	.loc 1 81 0
+.L427:
 	ldr	r3, [r5, #8]
 	cmp	r3, #0
-	beq	.L413
-	.loc 1 81 0 is_stmt 0 discriminator 2
+	beq	.L420
 	ldr	r3, [r5, #12]
 	cmp	r3, #0
-	bne	.L414
-.L413:
-	.loc 1 81 0 discriminator 3
-	mov	r2, #81
-.LVL377:
-	ldr	r1, .L441+8
-	mov	r0, r10
+	bne	.L421
+.L420:
+	mov	r2, #106
+	ldr	r1, .L448+4
+	ldr	r0, .L448+8
 	bl	printk
-.LVL378:
-.L414:
-	.loc 1 82 0 is_stmt 1
+.L421:
 	sub	r2, fp, #68
-.LVL379:
 	sub	r1, fp, #64
 	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL380:
-	.loc 1 83 0
-	ldr	r3, .L441+12
+	ldr	r3, [r5, #12]
+	ldr	ip, [r6, #3252]
 	ldr	r2, [r5, #8]
 	ldr	r1, [fp, #-64]
-	ldr	ip, [r3, #8]
 	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
-	ldr	r3, [r5, #12]
 	blx	ip
-.LVL381:
-	.loc 1 88 0
 	cmp	r0, #0
-	.loc 1 89 0
 	mvnne	r3, #0
-	.loc 1 87 0
 	streq	r0, [r5]
-	.loc 1 89 0
 	strne	r3, [r5]
-	.loc 1 91 0
-	ldr	r3, [fp, #-76]
-	ldrh	r3, [r3, #14]
+	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L418
-	.loc 1 92 0
-	ldr	r1, .L441+12
+	bne	.L425
 	ldr	r0, [fp, #-72]
-.LVL382:
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
-	ldr	ip, [r1, #8]
 	ldr	r1, [fp, #-64]
 	add	r3, r3, #8
+	ldr	ip, [r6, #3252]
 	add	r2, r2, #2048
 	add	r1, r0, r1
 	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
-.LVL383:
 	blx	ip
-.LVL384:
-	.loc 1 96 0
 	cmp	r0, #0
-	.loc 1 97 0
 	mvnne	r3, #0
 	strne	r3, [r5]
-.L418:
-	.loc 1 80 0 discriminator 2
-	add	r6, r6, #1
-	add	r5, r5, #20
-	b	.L412
-.LVL385:
 .L425:
-.LBB297:
-	.loc 1 106 0
-	ldr	r9, .L441+16
-.LVL386:
+	add	r7, r7, #1
+	add	r5, r5, #20
+	b	.L419
+.L432:
 	mov	r3, #0
-	.loc 1 107 0
-	str	r3, [r8, #3248]
-	.loc 1 112 0
-	mov	r2, r7
-.LVL387:
+	mov	r2, r8
+	str	r3, [r9]
 	mov	r1, #1
-.LVL388:
+	str	r3, [r6, #3288]
 	sub	r0, fp, #60
-	.loc 1 106 0
-	str	r3, [r9]
-	.loc 1 108 0
 	ldr	r3, [r4, #4]
-	.loc 1 109 0
 	str	r9, [fp, #-52]
-	.loc 1 110 0
 	str	r10, [fp, #-48]
-	.loc 1 108 0
 	str	r3, [fp, #-56]
-	.loc 1 112 0
 	bl	FlashReadPages
-.LVL389:
-	.loc 1 113 0
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	bne	.L422
-	.loc 1 114 0
+	bne	.L429
 	ldr	r1, [r4, #4]
-	ldr	r0, .L441+20
+	ldr	r0, .L448+12
 	str	r3, [fp, #-72]
 	bl	printk
-.LVL390:
-	.loc 1 115 0
 	ldr	r3, [fp, #-72]
 	str	r3, [r4]
-.L422:
-	.loc 1 117 0
+.L429:
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L423
-	.loc 1 118 0
+	beq	.L430
 	ldr	r2, [r3]
-	ldr	r3, [r8, #3248]
+	ldr	r3, [r6, #3288]
 	cmp	r2, r3
-	beq	.L423
-	.loc 1 119 0
+	beq	.L430
 	ldr	r1, [r4, #4]
-	ldr	r0, .L441+24
+	ldr	r0, .L448+16
 	bl	printk
-.LVL391:
-	.loc 1 120 0
 	mvn	r3, #0
 	str	r3, [r4]
-.L423:
-	.loc 1 123 0
+.L430:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L424
-	.loc 1 124 0
+	beq	.L431
 	ldr	r2, [r3]
 	ldr	r3, [r9]
 	cmp	r2, r3
-	beq	.L424
-	.loc 1 125 0
+	beq	.L431
 	ldr	r1, [r4, #4]
-	ldr	r0, .L441+28
+	ldr	r0, .L448+20
 	bl	printk
-.LVL392:
-	.loc 1 126 0
 	mvn	r3, #0
 	str	r3, [r4]
-.L424:
-.LBE297:
-	.loc 1 103 0 discriminator 2
+.L431:
 	add	r5, r5, #1
 	add	r4, r4, #20
-.LVL393:
-.L421:
-	.loc 1 103 0 is_stmt 0 discriminator 1
-	cmp	r6, r5
-	bne	.L425
-	b	.L440
-.LVL394:
-.L427:
-.LBB298:
-	.loc 1 107 0 is_stmt 1
-	ldr	r8, .L441+32
-.LVL395:
-.LBE298:
+.L428:
+	cmp	r7, r5
+	bne	.L432
+	b	.L447
+.L434:
 	mov	r5, #0
-.LBB299:
-	.loc 1 110 0
-	add	r10, r8, #3248
-	b	.L421
-.L442:
-	.align	2
-.L441:
-	.word	g_nand_phy_info
-	.word	.LC1
+	ldr	r9, .L448+24
+	ldr	r10, .L448+28
+	b	.L428
+.L449:
+	.align	2
+.L448:
+	.word	.LANCHOR0
 	.word	.LANCHOR1+145
-	.word	g_nand_ops
-	.word	check_buf
-	.word	.LC75
+	.word	.LC1
 	.word	.LC76
 	.word	.LC77
-	.word	.LANCHOR0
-.LBE299:
-.LFE273:
+	.word	.LC78
+	.word	check_buf
+	.word	.LANCHOR0+3288
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
@@ -5302,95 +3526,55 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB274:
-	.loc 1 134 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL396:
 	mov	ip, sp
-.LCFI186:
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-.LCFI187:
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI188:
 	sub	sp, sp, #8
-	.loc 1 140 0
-	mov	r5, #0
-.LVL397:
-	.loc 1 137 0
-	ldr	r3, .L454
-	.loc 1 134 0
-	mov	r8, r2
-	.loc 1 142 0
-	ldr	r7, .L454+4
+	mov	r6, #0
+	ldr	r5, .L461
+	mov	r7, r2
 	mov	r4, r0
-	.loc 1 137 0
-	ldrh	r9, [r3, #12]
-.LVL398:
-	mov	r6, r3
-.LVL399:
-.L444:
-	.loc 1 140 0 discriminator 1
-	cmp	r5, r8
-	bne	.L450
-	.loc 1 153 0
+	ldrh	r8, [r5, #12]
+.L451:
+	cmp	r6, r7
+	bne	.L457
 	mov	r0, #0
-.LVL400:
-	sub	sp, fp, #36
-.LCFI189:
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.LVL401:
-.L450:
-.LCFI190:
-	.loc 1 141 0
-	sub	r2, fp, #44
-	sub	r1, fp, #40
-.LVL402:
+	sub	sp, fp, #32
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L457:
+	sub	r2, fp, #40
+	sub	r1, fp, #36
 	mov	r0, r4
-.LVL403:
 	bl	l2p_addr_tran
-.LVL404:
-	.loc 1 142 0
-	ldr	r3, [r7, #4]
-	ldr	r1, [fp, #-40]
-	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
+	ldr	r3, [r5, #3248]
+	ldr	r1, [fp, #-36]
+	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
 	blx	r3
-.LVL405:
-	.loc 1 144 0
 	cmp	r0, #0
-	.loc 1 145 0
 	mvnne	r3, #0
-	.loc 1 143 0
 	streq	r0, [r4]
-	.loc 1 145 0
 	strne	r3, [r4]
-	.loc 1 146 0
-	ldrh	r3, [r6, #14]
+	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L448
-	.loc 1 147 0
-	ldr	r1, [fp, #-40]
-	ldr	r3, [r7, #4]
-	ldrb	r0, [fp, #-44]	@ zero_extendqisi2
-	add	r1, r9, r1
+	bne	.L455
+	ldr	r1, [fp, #-36]
+	ldr	r3, [r5, #3248]
+	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
+	add	r1, r8, r1
 	blx	r3
-.LVL406:
-	.loc 1 148 0
 	cmp	r0, #0
-	.loc 1 149 0
 	mvnne	r3, #0
 	strne	r3, [r4]
-.L448:
-	.loc 1 140 0 discriminator 2
-	add	r5, r5, #1
-	add	r4, r4, #20
-	b	.L444
 .L455:
+	add	r6, r6, #1
+	add	r4, r4, #20
+	b	.L451
+.L462:
 	.align	2
-.L454:
-	.word	g_nand_phy_info
-	.word	g_nand_ops
-.LFE274:
+.L461:
+	.word	.LANCHOR0
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
@@ -5399,96 +3583,56 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB190:
-	.loc 2 98 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL407:
 	mov	ip, sp
-.LCFI191:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI192:
 	sub	fp, ip, #4
-.LCFI193:
-	.loc 2 98 0
 	uxth	r5, r0
-.LVL408:
-	.loc 2 99 0
 	movw	r2, #65533
-	.loc 2 98 0
 	uxth	r1, r1
-	.loc 2 99 0
 	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
 	ldmfdhi	sp, {r4, r5, r6, fp, sp, pc}
-.LBB308:
-.LBB309:
-	.loc 2 94 0
-	ldr	r4, .L465
-.LBE309:
-.LBE308:
-	.loc 2 101 0
-	ldrh	r3, [r4, #194]
+	ldr	r4, .L472
+	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-.LBB310:
-.LBB311:
-	.loc 2 103 0
 	cmp	r1, #0
-	beq	.L458
-.LBB312:
-	.loc 2 104 0
+	beq	.L465
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL409:
 	mov	r6, r0
-	.loc 2 105 0
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	lsl	r3, r5, #10
-	.loc 2 106 0
 	mov	r2, #1
 	mov	r1, r2
-	.loc 2 105 0
 	str	r3, [r0, #4]
-	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL410:
-	.loc 2 107 0
-	ldr	r2, [r4, #2304]
+	ldr	r2, [r4, #2328]
 	lsl	r0, r6, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-	.loc 2 108 0
-	ldr	r3, [r4, #2536]
+	ldr	r3, [r4, #2560]
 	add	r3, r3, #1
-	str	r3, [r4, #2536]
-.LVL411:
-.L458:
-.LBE312:
-	.loc 2 110 0
-	ldrh	r3, [r4, #194]
+	str	r3, [r4, #2560]
+.L465:
+	ldrh	r3, [r4, #218]
 	add	r3, r3, #1
-	strh	r3, [r4, #194]	@ movhi
-	.loc 2 111 0
-	ldrh	r3, [r4, #192]
+	strh	r3, [r4, #218]	@ movhi
+	ldrh	r3, [r4, #216]
 	add	r2, r4, r3, lsl #1
-	.loc 2 112 0
 	add	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 111 0
-	strh	r5, [r2, #196]	@ movhi
-	.loc 2 112 0
-	strh	r3, [r4, #192]	@ movhi
+	strh	r5, [r2, #220]	@ movhi
+	strh	r3, [r4, #216]	@ movhi
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L466:
+.L473:
 	.align	2
-.L465:
+.L472:
 	.word	.LANCHOR0
-.LBE311:
-.LBE310:
-.LFE190:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
 	.global	FtlLowFormatEraseBlock
@@ -5497,395 +3641,248 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB159:
-	.loc 3 528 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL412:
 	mov	ip, sp
-.LCFI194:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI195:
 	sub	fp, ip, #4
-.LCFI196:
 	sub	sp, sp, #24
-	.loc 3 528 0
 	uxth	r3, r0
-.LVL413:
-	.loc 3 539 0
 	mov	r10, #0
-	.loc 3 528 0
 	uxtb	r6, r1
-.LVL414:
 	str	r3, [fp, #-48]
-	.loc 3 536 0
 	mov	r5, r10
-	.loc 3 538 0
-	ldr	r3, .L509
-.LVL415:
-	.loc 3 537 0
+	ldr	r3, .L516
 	mov	r4, r10
-.LVL416:
-	.loc 3 538 0
 	ldr	r2, [fp, #-48]
-.LVL417:
-	.loc 3 540 0
 	mov	r9, #20
 	mov	r8, r3
-	.loc 3 538 0
-	str	r2, [r3, #3764]
-.L468:
-	.loc 3 539 0 discriminator 1
-	ldrh	r1, [r8, #8]
+	str	r2, [r3, #3804]
+.L475:
+	ldrh	r1, [r8, #32]
 	uxth	r2, r10
-.LVL418:
 	cmp	r1, r2
-	bhi	.L472
-	.loc 3 559 0
+	bhi	.L479
 	cmp	r5, #0
-	beq	.L467
-	.loc 3 563 0
+	beq	.L474
 	mov	r7, #0
-	.loc 3 564 0
 	mov	r9, #20
-	.loc 3 562 0
 	mov	r2, r5
 	mov	r1, #0
-	ldr	r0, [r8, #3760]
+	ldr	r0, [r8, #3800]
 	bl	FlashEraseBlocks
-.LVL419:
-.L475:
-	.loc 3 563 0 discriminator 1
+.L482:
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L477
-.L478:
-	.loc 3 571 0
+	bhi	.L484
+.L485:
 	cmp	r6, #0
-	.loc 3 573 0
-	ldrhne	r3, [r8, #80]
-.LVL420:
-	.loc 3 533 0
+	ldrhne	r3, [r8, #104]
 	moveq	r3, #6
-.LVL421:
-	.loc 3 578 0
-	ldr	r8, .L509
-	.loc 3 533 0
+	ldr	r8, .L516
 	streq	r3, [fp, #-60]
-	.loc 3 531 0
 	moveq	r3, #1
-.LVL422:
-	.loc 3 573 0
 	strne	r3, [fp, #-52]
-	.loc 3 574 0
 	lsrne	r3, r3, #2
-.LVL423:
 	mov	r10, r8
-.LVL424:
-	.loc 3 531 0
 	streq	r3, [fp, #-52]
-	.loc 3 574 0
 	strne	r3, [fp, #-60]
-	.loc 3 572 0
 	movne	r3, #1
-.LVL425:
 	strne	r3, [fp, #-56]
 	mov	r3, #0
-.LVL426:
-	.loc 3 534 0
 	streq	r6, [fp, #-56]
 	str	r3, [fp, #-44]
-.LVL427:
-.L487:
-	.loc 3 578 0
+.L494:
 	mov	r7, #0
-	.loc 3 577 0
 	mov	r5, r7
-.L479:
-	.loc 3 578 0 discriminator 1
-	ldrh	r1, [r8, #8]
+.L486:
+	ldrh	r1, [r8, #32]
 	uxth	r3, r7
-.LVL428:
 	cmp	r1, r3
-	bhi	.L482
-	.loc 3 593 0
+	bhi	.L489
 	cmp	r5, #0
-	beq	.L467
-	.loc 3 596 0
+	beq	.L474
 	ldr	r2, [fp, #-56]
-.LVL429:
 	mov	r3, #1
 	mov	r1, r5
-	ldr	r0, [r8, #3760]
+	ldr	r0, [r8, #3800]
 	bl	FlashProgPages
-.LVL430:
-	.loc 3 597 0
 	mov	r9, #0
-	.loc 3 598 0
 	mov	r2, #20
-.L484:
-	.loc 3 597 0 discriminator 1
+.L491:
 	uxth	r3, r9
 	cmp	r5, r3
-	bhi	.L486
-	.loc 3 604 0
+	bhi	.L493
 	ldr	r3, [fp, #-44]
-.LVL431:
 	ldr	r2, [fp, #-60]
-.LVL432:
 	add	r7, r3, r2
 	uxth	r3, r7
 	str	r3, [fp, #-44]
-	.loc 3 605 0
 	ldr	r2, [fp, #-44]
-.LVL433:
 	ldr	r3, [fp, #-52]
-.LVL434:
 	cmp	r3, r2
-	bhi	.L487
+	bhi	.L494
 	mov	r7, #0
-	.loc 3 611 0 discriminator 1
 	mov	r9, #20
-.L488:
-	.loc 3 610 0 discriminator 1
+.L495:
 	uxth	r3, r7
-.LVL435:
 	cmp	r5, r3
-	bhi	.L490
-	.loc 3 615 0
+	bhi	.L497
 	ldr	r3, [fp, #-48]
-.LVL436:
 	adds	r6, r6, #0
-.LVL437:
 	movne	r6, #1
 	cmp	r3, #63
 	movhi	r8, r6
 	orrls	r8, r6, #1
 	cmp	r8, #0
-	beq	.L467
-	.loc 3 616 0
+	beq	.L474
 	mov	r2, r5
-.LVL438:
 	ldr	r1, [fp, #-56]
-	ldr	r0, [r10, #3760]
+	ldr	r0, [r10, #3800]
 	bl	FlashEraseBlocks
-.LVL439:
-.L467:
-	.loc 3 619 0
+.L474:
 	mov	r0, r4
 	sub	sp, fp, #40
-.LCFI197:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL440:
-.L472:
-.LCFI198:
-	.loc 3 540 0
+.L479:
 	uxth	r2, r10
-	ldr	r0, [r8, #3760]
+	ldr	r0, [r8, #3800]
 	mov	r3, #0
 	mul	r1, r9, r2
-	.loc 3 541 0
 	add	r2, r8, r2
-	.loc 3 540 0
 	str	r3, [r0, r1]
-	.loc 3 541 0
 	ldr	r1, [fp, #-48]
-	ldrb	r0, [r2, #36]	@ zero_extendqisi2
+	ldrb	r0, [r2, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL441:
-	.loc 3 543 0
 	cmp	r6, #0
-	.loc 3 541 0
 	mov	r7, r0
-	.loc 3 543 0
-	beq	.L469
-	.loc 3 544 0
+	beq	.L476
 	bl	IsBlkInVendorPart
-.LVL442:
 	cmp	r0, #0
-	bne	.L470
-.L469:
-	.loc 3 548 0
+	bne	.L477
+.L476:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL443:
 	cmp	r0, #0
-	.loc 3 554 0
 	addne	r4, r4, #1
-.LVL444:
 	uxthne	r4, r4
-.LVL445:
-	.loc 3 548 0
-	bne	.L470
-	.loc 3 549 0
-	ldr	r1, [r8, #3760]
+	bne	.L477
+	ldr	r1, [r8, #3800]
 	lsl	r7, r7, #10
-	.loc 3 550 0
-	ldr	r2, [r8, #3768]
-	.loc 3 549 0
+	ldr	r2, [r8, #3808]
 	mla	r1, r9, r5, r1
-	.loc 3 550 0
 	str	r2, [r1, #8]
-	.loc 3 551 0
-	ldrh	r2, [r8, #88]
-	.loc 3 549 0
+	ldrh	r2, [r8, #112]
 	str	r7, [r1, #4]
-	.loc 3 551 0
 	mul	r2, r5, r2
-	.loc 3 552 0
 	add	r5, r5, #1
 	uxth	r5, r5
-	.loc 3 551 0
 	add	r0, r2, #3
 	cmp	r2, #0
 	movlt	r2, r0
-	ldr	r0, [r8, #3772]
+	ldr	r0, [r8, #3812]
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #12]
-.L470:
-	add	r10, r10, #1
-	b	.L468
 .L477:
-	.loc 3 564 0
+	add	r10, r10, #1
+	b	.L475
+.L484:
 	mul	r2, r9, r7
-	ldr	r1, [r8, #3760]
+	ldr	r1, [r8, #3800]
 	add	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cmn	r2, #1
-	bne	.L476
-	.loc 3 566 0
+	bne	.L483
 	ldr	r0, [r0, #4]
-	.loc 3 565 0
 	add	r4, r4, #1
-.LVL446:
 	uxth	r4, r4
-.LVL447:
-	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL448:
-.L476:
+.L483:
 	add	r7, r7, #1
-	b	.L475
-.LVL449:
-.L482:
-	.loc 3 579 0
+	b	.L482
+.L489:
 	uxth	r3, r7
 	mov	r2, #20
-.LVL450:
-	ldr	r0, [r8, #3760]
+	ldr	r0, [r8, #3800]
 	mul	r1, r2, r3
 	mov	r2, #0
-	.loc 3 580 0
 	add	r3, r8, r3
-	.loc 3 579 0
 	str	r2, [r0, r1]
-	.loc 3 580 0
 	ldr	r1, [fp, #-48]
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL451:
-	.loc 3 581 0
 	cmp	r6, #0
-	.loc 3 580 0
 	mov	r9, r0
-	.loc 3 581 0
-	beq	.L480
-	.loc 3 582 0
+	beq	.L487
 	bl	IsBlkInVendorPart
-.LVL452:
 	cmp	r0, #0
-	bne	.L481
-.L480:
-	.loc 3 585 0
+	bne	.L488
+.L487:
 	mov	r0, r9
 	bl	FtlBbmIsBadBlock
-.LVL453:
 	cmp	r0, #0
-	bne	.L481
-	.loc 3 586 0
-	ldr	r1, [r8, #3760]
+	bne	.L488
+	ldr	r1, [r8, #3800]
 	mov	r3, #20
 	mla	r1, r3, r5, r1
 	ldr	r3, [fp, #-44]
-.LVL454:
 	add	r9, r3, r9, lsl #10
-	.loc 3 587 0
-	ldr	r3, [r8, #3776]
-.LVL455:
-	.loc 3 586 0
+	ldr	r3, [r8, #3816]
 	str	r9, [r1, #4]
-	.loc 3 587 0
 	str	r3, [r1, #8]
-	.loc 3 588 0
-	ldrh	r3, [r8, #88]
+	ldrh	r3, [r8, #112]
 	mul	r3, r5, r3
-	.loc 3 589 0
 	add	r5, r5, #1
 	uxth	r5, r5
-	.loc 3 588 0
 	add	r0, r3, #3
 	cmp	r3, #0
 	movlt	r3, r0
-	ldr	r0, [r8, #3768]
+	ldr	r0, [r8, #3808]
 	bic	r3, r3, #3
 	add	r3, r0, r3
 	str	r3, [r1, #12]
-.L481:
+.L488:
 	add	r7, r7, #1
-	b	.L479
-.L486:
-	.loc 3 598 0
+	b	.L486
+.L493:
 	mul	r3, r2, r9
-	ldr	r1, [r10, #3760]
+	ldr	r1, [r10, #3800]
 	add	r0, r1, r3
 	ldr	r3, [r1, r3]
 	cmp	r3, #0
-	beq	.L485
-	.loc 3 600 0
+	beq	.L492
 	ldr	r0, [r0, #4]
-	.loc 3 599 0
 	add	r4, r4, #1
-.LVL456:
 	str	r2, [fp, #-64]
 	uxth	r4, r4
-.LVL457:
-	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL458:
 	ldr	r2, [fp, #-64]
-.L485:
+.L492:
 	add	r9, r9, #1
-	b	.L484
-.LVL459:
-.L490:
-	.loc 3 611 0
+	b	.L491
+.L497:
 	cmp	r6, #0
-	beq	.L489
-	.loc 3 611 0 is_stmt 0 discriminator 1
+	beq	.L496
 	mul	r3, r9, r7
-	ldr	r2, [r10, #3760]
-.LVL460:
+	ldr	r2, [r10, #3800]
 	add	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L489
-	.loc 3 612 0 is_stmt 1
+	bne	.L496
 	ldr	r0, [r1, #4]
 	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL461:
-.L489:
+.L496:
 	add	r7, r7, #1
-	b	.L488
-.L510:
+	b	.L495
+.L517:
 	.align	2
-.L509:
+.L516:
 	.word	.LANCHOR0
-.LFE159:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
@@ -5894,111 +3891,66 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB193:
-	.loc 2 181 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI199:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI200:
 	sub	fp, ip, #4
-.LCFI201:
-.LBB313:
-.LBB314:
-	.loc 2 89 0
-	ldr	r4, .L518
-.LBE314:
-.LBE313:
-	.loc 2 203 0
-	ldr	r6, .L518+4
-.L512:
-.LBB316:
-.LBB315:
-	.loc 2 89 0
-	ldrh	r1, [r4, #194]
-.LBE315:
-.LBE316:
-	.loc 2 186 0
+	ldr	r4, .L525
+	ldr	r6, .L525+4
+.L519:
+	ldrh	r1, [r4, #218]
 	cmp	r1, #0
-	beq	.L513
-	.loc 2 187 0
-	ldrh	r3, [r4, #190]
-	.loc 2 188 0
+	beq	.L520
+	ldrh	r3, [r4, #214]
 	sub	r1, r1, #1
-	strh	r1, [r4, #194]	@ movhi
-	.loc 2 187 0
+	strh	r1, [r4, #218]	@ movhi
 	add	r2, r4, r3, lsl #1
-	.loc 2 189 0
 	add	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 187 0
-	ldrh	r5, [r2, #196]
-	.loc 2 189 0
-	strh	r3, [r4, #190]	@ movhi
-.LBB317:
-	.loc 2 191 0
+	ldrh	r5, [r2, #220]
+	strh	r3, [r4, #214]	@ movhi
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL462:
 	mov	r7, r0
-	.loc 2 192 0
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	lsl	r3, r5, #10
-	.loc 2 193 0
 	mov	r2, #1
 	mov	r1, r2
-	.loc 2 192 0
 	str	r3, [r0, #4]
-	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL463:
-	.loc 2 194 0
-	ldr	r2, [r4, #2304]
+	ldr	r2, [r4, #2328]
 	lsl	r0, r7, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.LBE317:
-	.loc 2 202 0
 	movw	r2, #65533
-.LBB318:
-	.loc 2 195 0
-	ldr	r3, [r4, #2536]
+	ldr	r3, [r4, #2560]
 	add	r3, r3, #1
-	str	r3, [r4, #2536]
-.LBE318:
-	.loc 2 202 0
+	str	r3, [r4, #2560]
 	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L517
-	.loc 2 203 0
-	ldrh	r2, [r4, #194]
+	bls	.L524
+	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	printk
-.LVL464:
-	.loc 2 205 0
-	b	.L512
-.L513:
-	.loc 2 199 0
-	ldr	r0, .L518+8
+	b	.L519
+.L520:
+	ldr	r0, .L525+8
 	bl	printk
-.LVL465:
-.L516:
-	b	.L516
-.L517:
-	.loc 2 208 0
+.L523:
+	b	.L523
+.L524:
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L519:
+.L526:
 	.align	2
-.L518:
+.L525:
 	.word	.LANCHOR0
+	.word	.LC80
 	.word	.LC79
-	.word	.LC78
-.LFE193:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
@@ -6007,99 +3959,66 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB205:
-	.loc 2 562 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL466:
 	mov	ip, sp
-.LCFI202:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI203:
 	sub	fp, ip, #4
-.LCFI204:
-	.loc 2 566 0
 	ldrh	r1, [r0, #10]
-	.loc 2 562 0
 	mov	r4, r0
-	.loc 2 566 0
 	mov	r3, #0
 	ldr	r2, [r0, #12]
-.LVL467:
-.L521:
+.L528:
 	uxth	r5, r3
-	.loc 2 566 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcs	.L524
-	.loc 2 567 0 is_stmt 1
+	bcs	.L531
 	mov	r7, r2
 	add	r3, r3, #1
 	ldrh	r6, [r7]
 	add	r2, r2, #2
 	cmp	r6, #0
-	bne	.L521
-	.loc 2 568 0
+	bne	.L528
 	bl	FtlFreeSysBlkQueueOut
-.LVL468:
-	.loc 2 569 0
 	sub	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 568 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 2 569 0
 	cmp	r3, r2
-	bls	.L522
-	.loc 2 570 0
-	ldr	r3, .L528
-	ldr	r0, .L528+4
-	ldrh	r2, [r3, #194]
+	bls	.L529
+	ldr	r3, .L535
+	ldr	r0, .L535+4
+	ldrh	r2, [r3, #218]
 	bl	printk
-.LVL469:
-.L523:
-	b	.L523
-.L522:
-	.loc 2 576 0
+.L530:
+	b	.L530
+.L529:
 	ldr	r3, [r4, #28]
-	.loc 2 574 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 2 575 0
 	strh	r5, [r4]	@ movhi
-	.loc 2 576 0
 	add	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 2 577 0
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.LVL470:
-.L524:
-	.loc 2 581 0
+.L531:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L526
-.LBB321:
-.LBB322:
+	bhi	.L533
 	movw	r2, #581
-	ldr	r1, .L528+8
-	ldr	r0, .L528+12
+	ldr	r1, .L535+8
+	ldr	r0, .L535+12
 	bl	printk
-.LVL471:
-.L526:
-.LBE322:
-.LBE321:
-	.loc 2 583 0
+.L533:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L529:
+.L536:
 	.align	2
-.L528:
+.L535:
 	.word	.LANCHOR0
-	.word	.LC80
+	.word	.LC81
 	.word	.LANCHOR1+160
 	.word	.LC1
-.LFE205:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	2
 	.global	FlashTestBlk
@@ -6108,119 +4027,54 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB275:
-	.loc 1 156 0
 	@ args = 0, pretend = 0, frame = 84
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL472:
 	mov	ip, sp
-.LCFI205:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI206:
 	sub	fp, ip, #4
-.LCFI207:
 	sub	sp, sp, #84
-	.loc 1 156 0
 	uxth	r4, r0
-.LVL473:
-	.loc 1 161 0
 	cmp	r4, #11
-	.loc 1 162 0
 	movls	r4, #0
-.LVL474:
-	.loc 1 161 0
-	bls	.L530
-.LBB335:
-.LBB336:
-	.loc 1 165 0
-	ldr	r5, .L533
-	.loc 1 166 0
+	bls	.L537
+	ldr	r5, .L540
 	sub	r0, fp, #84
-.LBB337:
-.LBB338:
-.LBB339:
-	.loc 1 202 0
 	mov	r2, #32
 	mov	r1, #165
-.LBE339:
-.LBE338:
-.LBE337:
-	.loc 1 166 0
 	str	r0, [fp, #-92]
-.LVL475:
-	.loc 1 169 0
 	lsl	r4, r4, #10
-.LVL476:
-	.loc 1 165 0
 	str	r5, [fp, #-96]
-.LBB342:
-.LBB341:
-.LBB340:
-	.loc 1 202 0
 	bl	memset
-.LVL477:
-.LBE340:
-.LBE341:
-.LBE342:
-.LBB343:
-.LBB344:
-.LBB345:
-	ldr	r3, .L533+4
-.LBE345:
-.LBE344:
-.LBE343:
-	.loc 1 170 0
+	ldr	r3, .L540+4
 	mov	r2, #1
 	mov	r1, r2
 	sub	r0, fp, #104
-	.loc 1 169 0
 	str	r4, [fp, #-100]
-.LBB348:
-.LBB347:
-.LBB346:
-	.loc 1 202 0
 	str	r3, [r5]
 	str	r3, [r5, #4]
-.LBE346:
-.LBE347:
-.LBE348:
-	.loc 1 170 0
 	bl	FlashEraseBlocks
-.LVL478:
-	.loc 1 171 0
 	mov	r3, #1
 	sub	r0, fp, #104
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL479:
-	.loc 1 172 0
 	ldr	r4, [fp, #-104]
-	.loc 1 178 0
 	mov	r2, #1
 	mov	r1, #0
 	sub	r0, fp, #104
-	.loc 1 172 0
 	adds	r4, r4, #0
 	movne	r4, #1
 	rsb	r4, r4, #0
-	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL480:
-.L530:
-.LBE336:
-.LBE335:
-	.loc 1 180 0
+.L537:
 	mov	r0, r4
 	sub	sp, fp, #20
-.LCFI208:
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L534:
+.L541:
 	.align	2
-.L533:
+.L540:
 	.word	ftl_temp_buf
 	.word	1515870810
-.LFE275:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	2
 	.global	FlashGetBadBlockList
@@ -6229,104 +4083,48 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB276:
-	.loc 1 183 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL481:
 	mov	ip, sp
-.LCFI209:
-	push	{r4, r5, fp, ip, lr, pc}
-.LCFI210:
+	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI211:
-.LBB359:
-.LBB360:
-.LBB361:
-	.loc 1 202 0
+	ldr	r5, .L549
+	mov	r4, r0
+	mov	r6, r1
 	mov	r2, #256
-.LBE361:
-.LBE360:
-.LBE359:
-	.loc 1 183 0
-	mov	r5, r1
-.LBB366:
-.LBB364:
-.LBB362:
-	.loc 1 202 0
 	mov	r1, #255
-.LVL482:
-.LBE362:
-.LBE364:
-.LBE366:
-	.loc 1 183 0
-	mov	r4, r0
-.LBB367:
-.LBB365:
-.LBB363:
-	.loc 1 202 0
 	bl	memset
-.LVL483:
-.LBE363:
-.LBE365:
-.LBE367:
-	.loc 1 187 0
-	ldr	r3, .L542
-	mov	r1, r5
+	ldr	r3, [r5, #3244]
+	mov	r1, r6
 	mov	r0, r4
-	ldr	r3, [r3]
 	blx	r3
-.LVL484:
 	uxth	r0, r0
-.LVL485:
-	.loc 1 188 0
 	cmp	r0, #50
-	bls	.L536
-.LBB368:
-.LBB369:
-.LBB370:
-	.loc 1 202 0
+	bls	.L543
 	mov	r2, #256
 	mov	r1, #255
 	mov	r0, r4
-.LVL486:
 	bl	memset
-.LVL487:
-.LBE370:
-.LBE369:
-.LBE368:
-	.loc 1 190 0
 	mov	r0, #0
-.LVL488:
-.L536:
-	.loc 1 192 0
-	ldr	r3, .L542+4
-.LVL489:
-	ldrh	r3, [r3, #14]
+.L543:
+	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	moveq	r3, r4
-.LVL490:
 	addeq	r1, r3, r0, lsl #1
-	beq	.L538
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L539:
-	.loc 1 194 0 discriminator 3
+	beq	.L545
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L546:
 	ldrh	r2, [r3]
 	lsr	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-.L538:
-	.loc 1 193 0 discriminator 1
+.L545:
 	cmp	r3, r1
-	bne	.L539
-.LVL491:
-	.loc 1 198 0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L543:
+	bne	.L546
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L550:
 	.align	2
-.L542:
-	.word	g_nand_ops
-	.word	g_nand_phy_info
-.LFE276:
+.L549:
+	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
 	.global	ftl_memset
@@ -6335,38 +4133,18 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB277:
-	.loc 1 201 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL492:
 	mov	ip, sp
-.LCFI212:
 	push	{r4, fp, ip, lr, pc}
-.LCFI213:
 	sub	fp, ip, #4
-.LCFI214:
-.LBB375:
-	.loc 1 202 0
 	cmp	r2, #0
-.LBE375:
-	.loc 1 201 0
 	mov	r4, r0
-.LBB376:
-	.loc 1 202 0
-	beq	.L545
-.LBE376:
-.LBB377:
-.LBB378:
+	beq	.L552
 	bl	memset
-.LVL493:
-.L545:
-.LBE378:
-.LBE377:
-	.loc 1 203 0 discriminator 8
+.L552:
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
-.LFE277:
 	.size	ftl_memset, .-ftl_memset
 	.align	2
 	.global	FtlMemInit
@@ -6375,557 +4153,351 @@ ftl_memset:
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB156:
-	.loc 3 279 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI215:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI216:
 	sub	fp, ip, #4
-.LCFI217:
-	.loc 3 282 0
-	ldr	r4, .L650
-	.loc 3 297 0
+	ldr	r4, .L657
 	movw	r3, #65535
-	.loc 3 301 0
-	movw	r2, #3178
-	.loc 3 282 0
+	movw	r2, #3202
 	mov	r5, #0
-	.loc 3 311 0
 	mov	r6, #12
-	.loc 3 297 0
-	str	r3, [r4, #3784]
-	.loc 3 301 0
+	str	r3, [r4, #3824]
 	mvn	r3, #0
 	strh	r3, [r4, r2]	@ movhi
-	.loc 3 302 0
-	movw	r2, #3180
+	movw	r2, #3204
 	strh	r3, [r4, r2]	@ movhi
-	.loc 3 303 0
 	mov	r2, #32
-	movw	r3, #3124
-	.loc 3 310 0
-	ldrh	r0, [r4, #82]
-	.loc 3 303 0
+	movw	r3, #3148
+	ldrh	r0, [r4, #106]
 	strh	r2, [r4, r3]	@ movhi
-	.loc 3 304 0
 	mov	r2, #128
-	movw	r3, #3126
-	.loc 3 282 0
-	str	r5, [r4, #2516]
-	.loc 3 304 0
+	movw	r3, #3150
+	str	r5, [r4, #2540]
 	strh	r2, [r4, r3]	@ movhi
-	.loc 3 305 0
-	movw	r3, #3132
+	movw	r3, #3156
 	strh	r5, [r4, r3]	@ movhi
-	.loc 3 306 0
-	movw	r3, #3182
+	movw	r3, #3206
 	strh	r5, [r4, r3]	@ movhi
-	.loc 3 310 0
 	lsl	r0, r0, #1
-	.loc 3 307 0
-	movw	r3, #3218
-	.loc 3 283 0
-	str	r5, [r4, #2520]
-	.loc 3 307 0
+	movw	r3, #3242
+	str	r5, [r4, #2544]
 	strh	r5, [r4, r3]	@ movhi
-	.loc 3 312 0
 	mov	r7, #20
-	.loc 3 284 0
-	str	r5, [r4, #2504]
-	.loc 3 285 0
-	str	r5, [r4, #2492]
-	.loc 3 286 0
-	str	r5, [r4, #2488]
-	.loc 3 287 0
-	str	r5, [r4, #2496]
-	.loc 3 288 0
-	str	r5, [r4, #2500]
-	.loc 3 289 0
-	str	r5, [r4, #2484]
-	.loc 3 290 0
-	str	r5, [r4, #2524]
-	.loc 3 291 0
 	str	r5, [r4, #2528]
-	.loc 3 292 0
-	str	r5, [r4, #2536]
-	.loc 3 293 0
-	str	r5, [r4, #2540]
-	.loc 3 294 0
-	str	r5, [r4, #2544]
-	.loc 3 295 0
-	str	r5, [r4, #3780]
-	.loc 3 296 0
-	str	r5, [r4, #3136]
-	.loc 3 298 0
-	str	r5, [r4, #3788]
-	.loc 3 299 0
-	str	r5, [r4, #3128]
-	.loc 3 300 0
-	str	r5, [r4, #3764]
-	.loc 3 310 0
+	str	r5, [r4, #2516]
+	str	r5, [r4, #2512]
+	str	r5, [r4, #2520]
+	str	r5, [r4, #2524]
+	str	r5, [r4, #2508]
+	str	r5, [r4, #2548]
+	str	r5, [r4, #2552]
+	str	r5, [r4, #2560]
+	str	r5, [r4, #2564]
+	str	r5, [r4, #2568]
+	str	r5, [r4, #3820]
+	str	r5, [r4, #3160]
+	str	r5, [r4, #3828]
+	str	r5, [r4, #3152]
+	str	r5, [r4, #3804]
 	bl	ftl_malloc
-.LVL494:
-	str	r0, [r4, #3164]
-	.loc 3 311 0
-	ldrh	r0, [r4, #82]
+	str	r0, [r4, #3188]
+	ldrh	r0, [r4, #106]
 	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL495:
-	.loc 3 312 0
-	ldrh	r3, [r4, #8]
-	.loc 3 311 0
-	str	r0, [r4, #3172]
-	.loc 3 312 0
+	ldrh	r3, [r4, #32]
+	str	r0, [r4, #3196]
 	mul	r7, r7, r3
-	.loc 3 313 0
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL496:
-	str	r0, [r4, #3792]
-	.loc 3 314 0
+	str	r0, [r4, #3832]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL497:
-	str	r0, [r4, #3796]
-	.loc 3 315 0
+	str	r0, [r4, #3836]
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL498:
-	str	r0, [r4, #3800]
-	.loc 3 316 0
+	str	r0, [r4, #3840]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL499:
-	str	r0, [r4, #3760]
-	.loc 3 317 0
+	str	r0, [r4, #3800]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL500:
-	.loc 3 320 0
-	ldrh	r3, [r4, #8]
-	.loc 3 319 0
-	ldrh	r7, [r4, #86]
-	.loc 3 317 0
-	str	r0, [r4, #3156]
-	.loc 3 320 0
+	ldrh	r3, [r4, #32]
+	ldrh	r7, [r4, #110]
+	str	r0, [r4, #3180]
 	lsl	r3, r3, #1
-	.loc 3 321 0
 	mov	r0, r7
-	.loc 3 320 0
 	add	r3, r3, #1
-	str	r3, [r4, #3160]
-	.loc 3 321 0
+	str	r3, [r4, #3184]
 	bl	ftl_malloc
-.LVL501:
-	str	r0, [r4, #3240]
-	.loc 3 322 0
+	str	r0, [r4, #3280]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL502:
-	str	r0, [r4, #3804]
-	.loc 3 323 0
+	str	r0, [r4, #3844]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL503:
-	str	r0, [r4, #3808]
-	.loc 3 324 0
-	ldr	r0, [r4, #3160]
+	str	r0, [r4, #3848]
+	ldr	r0, [r4, #3184]
 	mul	r0, r0, r7
 	bl	ftl_malloc
-.LVL504:
-	str	r0, [r4, #3148]
-	.loc 3 325 0
+	str	r0, [r4, #3172]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL505:
-	str	r0, [r4, #3776]
-	.loc 3 326 0
+	str	r0, [r4, #3816]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL506:
-	str	r0, [r4, #3768]
-	.loc 3 327 0
-	ldr	r0, [r4, #3160]
+	str	r0, [r4, #3808]
+	ldr	r0, [r4, #3184]
 	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL507:
-	.loc 3 329 0
-	ldrh	r3, [r4, #88]
-	ldrh	r7, [r4, #8]
-	.loc 3 327 0
-	str	r0, [r4, #3144]
-	.loc 3 329 0
+	ldrh	r3, [r4, #112]
+	ldrh	r7, [r4, #32]
+	str	r0, [r4, #3168]
 	mul	r7, r7, r3
-	.loc 3 330 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL508:
-	str	r0, [r4, #3244]
-	.loc 3 331 0
+	str	r0, [r4, #3284]
 	lsl	r0, r7, #2
-	.loc 3 335 0
-	movw	r7, #3812
-	.loc 3 331 0
+	movw	r7, #3852
 	bl	ftl_malloc
-.LVL509:
-	.loc 3 332 0
-	ldrh	r3, [r4, #88]
-	.loc 3 331 0
-	str	r0, [r4, #3772]
-	.loc 3 332 0
-	ldr	r0, [r4, #3160]
+	ldrh	r3, [r4, #112]
+	str	r0, [r4, #3812]
+	ldr	r0, [r4, #3184]
 	mul	r0, r0, r3
 	bl	ftl_malloc
-.LVL510:
-	str	r0, [r4, #3152]
-	.loc 3 335 0
-	ldrh	r0, [r4, #18]
+	str	r0, [r4, #3176]
+	ldrh	r0, [r4, #42]
 	lsl	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r4, r7]	@ movhi
-	.loc 3 336 0
 	bl	ftl_malloc
-.LVL511:
-	str	r0, [r4, #3816]
-	.loc 3 337 0
+	str	r0, [r4, #3856]
 	ldrh	r0, [r4, r7]
-	.loc 3 338 0
-	ldr	r3, .L650+4
-	.loc 3 337 0
+	ldr	r3, .L657+4
 	add	r0, r0, #544
 	add	r0, r0, #3
 	lsr	r0, r0, #9
 	strh	r0, [r4, r7]	@ movhi
-	.loc 3 338 0
 	and	r0, r3, r0, lsl #9
 	bl	ftl_malloc
-.LVL512:
-	.loc 3 345 0
-	ldrh	r7, [r4, #18]
-	.loc 3 338 0
-	str	r0, [r4, #3820]
-	.loc 3 339 0
+	ldrh	r7, [r4, #42]
+	str	r0, [r4, #3860]
 	add	r0, r0, #32
-	str	r0, [r4, #2304]
-	.loc 3 345 0
+	str	r0, [r4, #2328]
 	lsl	r7, r7, #1
-	.loc 3 347 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL513:
-	str	r0, [r4, #3824]
-	.loc 3 349 0
+	str	r0, [r4, #3864]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL514:
-	.loc 3 350 0
-	ldr	r7, [r4, #104]
-	.loc 3 349 0
-	str	r0, [r4, #2300]
-	.loc 3 350 0
+	ldr	r7, [r4, #128]
+	str	r0, [r4, #2324]
 	lsl	r7, r7, #1
-	.loc 3 351 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL515:
-	str	r0, [r4, #3828]
-	.loc 3 352 0
+	str	r0, [r4, #3868]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL516:
-	str	r0, [r4, #3832]
-	.loc 3 353 0
-	ldrh	r0, [r4, #18]
+	str	r0, [r4, #3872]
+	ldrh	r0, [r4, #42]
 	lsr	r0, r0, #3
 	add	r0, r0, #4
 	bl	ftl_malloc
-.LVL517:
-	str	r0, [r4]
-	.loc 3 354 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #24]
+	ldrh	r0, [r4, #120]
 	lsl	r0, r0, #1
 	bl	ftl_malloc
-.LVL518:
-	str	r0, [r4, #124]
-	.loc 3 355 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #148]
+	ldrh	r0, [r4, #120]
 	lsl	r0, r0, #1
 	bl	ftl_malloc
-.LVL519:
-	str	r0, [r4, #3836]
-	.loc 3 356 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #3876]
+	ldrh	r0, [r4, #120]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL520:
-	str	r0, [r4, #3840]
-	.loc 3 357 0
-	ldrh	r0, [r4, #98]
+	str	r0, [r4, #3880]
+	ldrh	r0, [r4, #122]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL521:
-	.loc 3 358 0
-	ldrh	r2, [r4, #98]
+	ldrh	r2, [r4, #122]
 	mov	r1, r5
-	.loc 3 357 0
-	str	r0, [r4, #3844]
-	.loc 3 370 0
-	movw	r5, #3860
-	.loc 3 358 0
+	str	r0, [r4, #3884]
+	movw	r5, #3900
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL522:
-	.loc 3 360 0
-	ldrh	r0, [r4, #112]
-	.loc 3 361 0
+	ldrh	r0, [r4, #136]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL523:
-	str	r0, [r4, #3848]
-	.loc 3 362 0
-	ldr	r0, [r4, #104]
-	.loc 3 363 0
+	str	r0, [r4, #3888]
+	ldr	r0, [r4, #128]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL524:
-	str	r0, [r4, #3852]
-	.loc 3 364 0
-	ldrh	r0, [r4, #114]
-	.loc 3 365 0
+	str	r0, [r4, #3892]
+	ldrh	r0, [r4, #138]
 	mul	r0, r6, r0
 	bl	ftl_malloc
-.LVL525:
-	.loc 3 366 0
-	ldrh	r3, [r4, #114]
-	.loc 3 365 0
-	str	r0, [r4, #2468]
-	.loc 3 366 0
-	ldrh	r0, [r4, #86]
-	.loc 3 367 0
+	ldrh	r3, [r4, #138]
+	str	r0, [r4, #2492]
+	ldrh	r0, [r4, #110]
 	mul	r0, r0, r3
 	bl	ftl_malloc
-.LVL526:
-	str	r0, [r4, #3856]
-	.loc 3 368 0
-	ldrh	r0, [r4, #18]
-	.loc 3 369 0
+	str	r0, [r4, #3896]
+	ldrh	r0, [r4, #42]
 	lsl	r0, r0, #3
 	bl	ftl_malloc
-.LVL527:
-	str	r0, [r4, #2292]
-	.loc 3 370 0
-	ldrh	r0, [r4, #74]
-	.loc 3 371 0
-	ldrh	r3, [r4, #30]
-	.loc 3 370 0
+	str	r0, [r4, #2316]
+	ldrh	r0, [r4, #98]
+	ldrh	r3, [r4, #54]
 	add	r0, r0, #31
 	asr	r0, r0, #5
 	strh	r0, [r4, r5]	@ movhi
-	.loc 3 371 0
 	mul	r0, r0, r3
-	.loc 3 372 0
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-.LVL528:
-	.loc 3 374 0
 	ldrh	r2, [r4, r5]
-	add	ip, r4, #156
-	.loc 3 373 0
-	ldrh	lr, [r4, #30]
+	add	ip, r4, #180
+	ldrh	lr, [r4, #54]
 	mov	r3, #1
-.LVL529:
-	.loc 3 372 0
-	str	r0, [r4, #156]
+	str	r0, [r4, #180]
 	lsl	r2, r2, #2
-	.loc 3 373 0
 	mov	r1, r2
-.L550:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.L557:
 	cmp	r3, lr
-	bcc	.L551
-	ldr	r2, .L650+8
-	.loc 3 379 0 is_stmt 1
+	bcc	.L558
+	ldr	r2, .L657+8
 	mov	r1, #0
 	add	r3, r2, r3, lsl #2
-.LVL530:
 	add	r2, r2, #56
 	add	r3, r3, #24
-.L552:
-	.loc 3 377 0 discriminator 1
+.L559:
 	cmp	r2, r3
-	bne	.L553
-	.loc 3 383 0
-	ldr	r3, [r4, #3828]
+	bne	.L560
+	ldr	r3, [r4, #3868]
 	cmp	r3, #0
-	bne	.L554
-.L556:
-	.loc 3 385 0
-	ldr	r1, .L650+12
-	ldr	r0, .L650+16
+	bne	.L561
+.L563:
+	ldr	r1, .L657+12
+	ldr	r0, .L657+16
 	bl	printk
-.LVL531:
-	.loc 3 386 0
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL532:
-.L551:
-	.loc 3 374 0 discriminator 3
-	ldr	r0, [r4, #156]
-	.loc 3 373 0 discriminator 3
+.L558:
+	ldr	r0, [r4, #180]
 	add	r3, r3, #1
-	.loc 3 374 0 discriminator 3
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [ip, #4]!
-	b	.L550
-.LVL533:
-.L553:
-	.loc 3 379 0 discriminator 2
+	b	.L557
+.L560:
 	str	r1, [r3, #4]!
-	b	.L552
-.L554:
-	.loc 3 388 0
-	ldr	r3, [r4, #3832]
+	b	.L559
+.L561:
+	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 393 0
-	ldr	r3, [r4, #3848]
+	beq	.L563
+	ldr	r3, [r4, #3888]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 398 0
-	ldr	r3, [r4, #3852]
+	beq	.L563
+	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 404 0
-	ldr	r3, [r4, #2468]
+	beq	.L563
+	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 409 0
-	ldr	r3, [r4, #3856]
+	beq	.L563
+	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 414 0
-	ldr	r3, [r4, #2292]
+	beq	.L563
+	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 419 0
-	ldr	r3, [r4, #156]
+	beq	.L563
+	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 425 0
-	ldr	r3, [r4, #2300]
+	beq	.L563
+	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 430 0
-	ldr	r3, [r4, #3164]
+	beq	.L563
+	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3172]
+	beq	.L563
+	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 435 0 is_stmt 1
-	ldr	r3, [r4, #3792]
+	beq	.L563
+	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 435 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3800]
+	beq	.L563
+	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 435 0 discriminator 2
-	ldr	r3, [r4, #3760]
+	beq	.L563
+	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 435 0 discriminator 3
-	ldr	r3, [r4, #3156]
+	beq	.L563
+	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 435 0 discriminator 4
-	ldr	r3, [r4, #3796]
+	beq	.L563
+	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 440 0 is_stmt 1
-	ldr	r3, [r4, #3240]
+	beq	.L563
+	ldr	r3, [r4, #3280]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3804]
+	beq	.L563
+	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 440 0 discriminator 2
-	ldr	r3, [r4, #3808]
+	beq	.L563
+	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 440 0 discriminator 3
-	ldr	r3, [r4, #3148]
+	beq	.L563
+	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 441 0 is_stmt 1
-	ldr	r3, [r4, #3776]
+	beq	.L563
+	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3768]
+	beq	.L563
+	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 441 0 discriminator 2
-	ldr	r3, [r4, #3144]
+	beq	.L563
+	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 446 0 is_stmt 1
-	ldr	r3, [r4, #3244]
+	beq	.L563
+	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3772]
+	beq	.L563
+	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 446 0 discriminator 2
-	ldr	r3, [r4, #3152]
+	beq	.L563
+	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 452 0 is_stmt 1
-	ldr	r3, [r4, #2304]
+	beq	.L563
+	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3816]
+	beq	.L563
+	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 458 0 is_stmt 1
-	ldr	r3, [r4, #124]
+	beq	.L563
+	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 464 0
-	ldr	r3, .L650
-	ldr	r2, [r3, #3836]
+	beq	.L563
+	ldr	r3, .L657
+	ldr	r2, [r3, #3876]
 	cmp	r2, #0
-	beq	.L556
-	.loc 3 470 0
-	ldr	r2, [r3, #3840]
+	beq	.L563
+	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L556
-	.loc 3 476 0
-	ldr	r3, [r3, #3844]
+	beq	.L563
+	ldr	r3, [r3, #3884]
 	cmp	r3, #0
-	beq	.L556
-	.loc 3 483 0
+	beq	.L563
 	mov	r0, #0
-	.loc 3 484 0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L651:
+.L658:
 	.align	2
-.L650:
+.L657:
 	.word	.LANCHOR0
 	.word	33553920
-	.word	.LANCHOR0+128
+	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
-	.word	.LC81
-.LFE156:
+	.word	.LC82
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -6934,79 +4506,54 @@ FtlMemInit:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB175:
-	.loc 4 66 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL534:
 	mov	ip, sp
-.LCFI218:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
-.LCFI219:
 	sub	fp, ip, #4
-.LCFI220:
-	.loc 4 69 0
-	ldr	r6, .L658
-	movw	r3, #3860
-	.loc 4 66 0
+	ldr	r6, .L665
+	movw	r3, #3900
 	mov	r4, r0
-	.loc 4 74 0
-	ldr	r8, .L658+4
+	ldr	r8, .L665+4
 	sub	r5, r4, #2
-	.loc 4 69 0
 	ldrh	r2, [r6, r3]
 	add	r4, r4, #1020
-	.loc 4 74 0
-	ldr	r9, .L658+8
-	.loc 4 66 0
+	ldr	r9, .L665+8
 	mov	r7, r1
 	add	r4, r4, #2
-	.loc 4 69 0
 	mov	r1, #0
-.LVL535:
 	mov	r0, r7
-.LVL536:
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL537:
-.L655:
-	.loc 4 72 0
+.L662:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
 	ldmfdeq	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-	.loc 4 74 0
-	ldrh	r2, [r6, #74]
+	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L654
-	.loc 4 74 0 is_stmt 0 discriminator 1
+	bhi	.L661
 	mov	r2, #74
 	mov	r1, r8
 	mov	r0, r9
 	bl	printk
-.LVL538:
-.L654:
-	.loc 4 75 0 is_stmt 1 discriminator 2
+.L661:
 	ldrh	r3, [r5, #2]!
 	mov	r0, #1
-	.loc 4 70 0 discriminator 2
 	cmp	r4, r5
-	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r3, r2, r0, lsl r3
 	str	r3, [r7, r1, lsl #2]
-	.loc 4 70 0 discriminator 2
-	bne	.L655
+	bne	.L662
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L659:
+.L666:
 	.align	2
-.L658:
+.L665:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
-.LFE175:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.align	2
 	.global	load_l2p_region
@@ -7015,144 +4562,98 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB203:
-	.loc 2 488 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL539:
 	mov	ip, sp
-.LCFI221:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI222:
 	sub	fp, ip, #4
-.LCFI223:
-	.loc 2 492 0
-	ldr	r4, .L666
-	.loc 2 488 0
+	ldr	r4, .L673
 	uxth	r6, r0
-.LVL540:
 	uxth	r8, r1
-.LVL541:
-	.loc 2 492 0
-	ldrh	r3, [r4, #112]
+	ldrh	r3, [r4, #136]
 	cmp	r3, r6
-	bcs	.L661
-	.loc 2 492 0 is_stmt 0 discriminator 1
+	bcs	.L668
 	mov	r2, #492
-	ldr	r1, .L666+4
-	ldr	r0, .L666+8
+	ldr	r1, .L673+4
+	ldr	r0, .L673+8
 	bl	printk
-.LVL542:
-.L661:
-	.loc 2 493 0 is_stmt 1
-	ldr	r3, [r4, #3848]
+.L668:
+	ldr	r3, [r4, #3888]
 	mov	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-.LVL543:
-	.loc 2 495 0
 	cmp	r7, #0
-	bne	.L662
-	.loc 2 496 0
+	bne	.L669
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2468]
-	ldrh	r2, [r4, #86]
+	ldr	r3, [r4, #2492]
+	ldrh	r2, [r4, #110]
 	mov	r1, #255
 	add	r3, r3, r5
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL544:
-	.loc 2 497 0
-	ldr	r3, [r4, #2468]
+	ldr	r3, [r4, #2492]
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 498 0
-	ldr	r3, [r4, #2468]
+	ldr	r3, [r4, #2492]
 	add	r5, r3, r5
 	str	r7, [r5, #4]
-.LVL545:
-.L663:
-	.loc 2 519 0
+.L670:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL546:
-.L662:
-	.loc 2 502 0
+.L669:
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2468]
-	.loc 2 504 0
+	ldr	r3, [r4, #2492]
 	mov	r2, #1
-	ldr	r0, .L666+12
+	ldr	r0, .L673+12
 	mov	r1, r2
-	.loc 2 501 0
-	str	r7, [r4, #3224]
-	.loc 2 502 0
+	str	r7, [r4, #3264]
 	add	r3, r3, r5
 	ldr	r3, [r3, #8]
-	str	r3, [r4, #3228]
-	.loc 2 503 0
-	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3232]
-	.loc 2 504 0
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-.LVL547:
-	.loc 2 505 0
-	ldr	r8, [r4, #3232]
-.LVL548:
-	.loc 2 507 0
+	ldr	r8, [r4, #3272]
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L664
-	.loc 2 508 0
+	beq	.L671
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L666+16
+	ldr	r0, .L673+16
 	bl	printk
-.LVL549:
-	.loc 2 509 0
 	mov	r3, #4
-	ldr	r1, [r4, #3232]
+	ldr	r1, [r4, #3272]
 	mov	r2, r3
-	ldr	r0, .L666+20
+	ldr	r0, .L673+20
 	bl	rknand_print_hex
-.LVL550:
-	.loc 2 510 0
-	ldrh	r3, [r4, #112]
+	ldrh	r3, [r4, #136]
 	mov	r2, #4
-	ldr	r1, [r4, #3848]
-	ldr	r0, .L666+24
+	ldr	r1, [r4, #3888]
+	ldr	r0, .L673+24
 	bl	rknand_print_hex
-.LVL551:
-.L664:
-	.loc 2 513 0
+.L671:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L665
-	.loc 2 513 0 is_stmt 0 discriminator 1
+	beq	.L672
 	movw	r2, #513
-	ldr	r1, .L666+4
-	ldr	r0, .L666+8
+	ldr	r1, .L673+4
+	ldr	r0, .L673+8
 	bl	printk
-.LVL552:
-.L665:
-	.loc 2 516 0 is_stmt 1
-	ldr	r3, [r4, #2468]
+.L672:
+	ldr	r3, [r4, #2492]
 	mov	r1, #0
 	add	r2, r3, r5
 	str	r1, [r2, #4]
-	.loc 2 517 0
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 518 0
-	b	.L663
-.L667:
+	b	.L670
+.L674:
 	.align	2
-.L666:
+.L673:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
-	.word	.LANCHOR0+3220
-	.word	.LC82
+	.word	.LANCHOR0+3260
 	.word	.LC83
 	.word	.LC84
-.LFE203:
+	.word	.LC85
 	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_free_no_use_map_blk
@@ -7161,156 +4662,98 @@ load_l2p_region:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB204:
-	.loc 2 522 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL553:
 	mov	ip, sp
-.LCFI224:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI225:
 	sub	fp, ip, #4
-.LCFI226:
 	sub	sp, sp, #8
-	.loc 2 531 0
 	mov	r1, #0
 	ldrh	r2, [r0, #10]
-	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 525 0
 	ldr	r5, [r0, #20]
-.LVL554:
-	.loc 2 523 0
 	ldr	r9, [r0, #12]
-.LVL555:
-	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL556:
-	.loc 2 531 0
 	lsl	r2, r2, #1
 	mov	r0, r5
-.LVL557:
 	bl	ftl_memset
-.LVL558:
-	.loc 2 532 0
 	mov	r2, #0
-.LVL559:
-.L669:
-	.loc 2 532 0 is_stmt 0 discriminator 1
+.L676:
 	ldrh	r1, [r4, #6]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L673
-	.loc 2 540 0 is_stmt 1
+	bhi	.L680
 	ldrh	r2, [r5]
-.LVL560:
-	.loc 2 543 0
 	mov	r7, #0
-	.loc 2 544 0
-	ldr	ip, .L682
-	.loc 2 541 0
+	ldr	ip, .L689
 	mov	r10, r7
-.LVL561:
-.L674:
-	.loc 2 543 0 discriminator 1
+.L681:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L678
-	.loc 2 559 0
+	bhi	.L685
 	mov	r0, r10
-.LVL562:
 	sub	sp, fp, #40
-.LCFI227:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL563:
-.L673:
-.LCFI228:
-	.loc 2 533 0
+.L680:
 	uxth	r3, r2
-	.loc 2 534 0
 	mov	r1, #0
-	.loc 2 533 0
 	ldr	r0, [r6, r3, lsl #2]
-.LVL564:
 	ubfx	r0, r0, #10, #16
-.LVL565:
-.L670:
-	.loc 2 534 0 discriminator 1
+.L677:
 	ldrh	ip, [r4, #10]
 	uxth	r3, r1
 	cmp	ip, r3
 	addls	r2, r2, #1
-	bls	.L669
-.L672:
-	.loc 2 535 0
+	bls	.L676
+.L679:
 	uxth	r3, r1
 	add	r1, r1, #1
 	lsl	r3, r3, #1
 	ldrh	ip, [r9, r3]
 	cmp	ip, r0
-	.loc 2 536 0
 	ldrheq	ip, [r5, r3]
 	addeq	ip, ip, #1
 	strheq	ip, [r5, r3]	@ movhi
-	b	.L670
-.LVL566:
-.L678:
-	.loc 2 544 0
+	b	.L677
+.L685:
 	ldrh	r1, [r4]
 	uxth	r6, r7
-.LVL567:
 	cmp	r1, r3
-	bne	.L675
-	.loc 2 544 0 is_stmt 0 discriminator 1
+	bne	.L682
 	ldrh	r0, [r4, #2]
-.LVL568:
-	ldrh	r1, [ip, #80]
+	ldrh	r1, [ip, #104]
 	cmp	r0, r1
-	.loc 2 545 0 is_stmt 1 discriminator 1
 	lslcc	r0, r6, #1
 	strhcc	r1, [r5, r0]	@ movhi
-.LVL569:
-.L675:
-	.loc 2 546 0
+.L682:
 	lsl	r6, r6, #1
 	ldrh	r8, [r5, r6]
 	cmp	r2, r8
 	movhi	r10, r3
 	movhi	r2, r8
-	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L677
-	.loc 2 550 0 is_stmt 0 discriminator 1
+	bne	.L684
 	ldrh	r0, [r9, r6]
-.LVL570:
 	cmp	r0, #0
-	beq	.L677
-	.loc 2 552 0 is_stmt 1
+	beq	.L684
 	mov	r1, #1
 	str	ip, [fp, #-48]
 	str	r2, [fp, #-44]
 	bl	FtlFreeSysBlkQueueIn
-.LVL571:
-	.loc 2 553 0
 	strh	r8, [r9, r6]	@ movhi
-	.loc 2 554 0
 	ldr	ip, [fp, #-48]
 	ldrh	r3, [r4, #8]
 	ldr	r2, [fp, #-44]
-.LVL572:
 	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.LVL573:
-.L677:
+.L684:
 	add	r7, r7, #1
-	b	.L674
-.L683:
+	b	.L681
+.L690:
 	.align	2
-.L682:
+.L689:
 	.word	.LANCHOR0
-.LFE204:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
@@ -7319,170 +4762,105 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB207:
-	.loc 2 632 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL574:
 	mov	ip, sp
-.LCFI229:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI230:
 	sub	fp, ip, #4
-.LCFI231:
-	.loc 2 640 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
-	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL575:
-	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L685
-	.loc 2 641 0
+	bne	.L692
 	ldrh	r3, [r0, #8]
 	cmp	r3, #0
-	beq	.L686
-	.loc 2 641 0 is_stmt 0 discriminator 1
+	beq	.L693
 	movw	r2, #641
-	ldr	r1, .L694
-	ldr	r0, .L694+4
+	ldr	r1, .L701
+	ldr	r0, .L701+4
 	bl	printk
-.LVL576:
-.L686:
-	.loc 2 642 0 is_stmt 1
+.L693:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL577:
-	.loc 2 644 0
 	mov	r3, #0
-	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	add	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL578:
-.L687:
-	.loc 2 677 0
+.L694:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL579:
-.L685:
-	.loc 2 650 0
+.L692:
 	lsl	r3, r3, #1
-	.loc 2 656 0
 	ldr	r2, [r0, #28]
-	.loc 2 636 0
 	ldr	r6, [r0, #24]
-.LVL580:
-	.loc 2 661 0
 	mov	r1, #255
-	.loc 2 650 0
 	ldrh	r7, [r5, r3]
-	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L694+8
-.LVL581:
+	ldr	r5, .L701+8
 	orr	r3, r3, r7, lsl #10
-	str	r3, [r5, #3224]
-	.loc 2 652 0
-	ldr	r3, [r5, #3240]
-	str	r3, [r5, #3228]
-	.loc 2 653 0
-	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3232]
-	.loc 2 656 0
+	str	r3, [r5, #3264]
+	ldr	r3, [r5, #3280]
+	str	r3, [r5, #3268]
+	ldr	r3, [r5, #3284]
+	str	r3, [r5, #3272]
 	str	r2, [r3, #4]
-	.loc 2 657 0
-	ldr	r2, .L694+12
+	ldr	r2, .L701+12
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 658 0
 	ldrh	r2, [r0, #4]
-	.loc 2 659 0
 	strh	r7, [r3, #2]	@ movhi
-	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 661 0
-	ldrh	r2, [r5, #80]
-	ldr	r0, [r5, #3240]
-.LVL582:
+	ldrh	r2, [r5, #104]
+	ldr	r0, [r5, #3280]
 	lsl	r2, r2, #3
 	bl	ftl_memset
-.LVL583:
-	.loc 2 663 0
 	mov	r2, #0
-	.loc 2 662 0
 	mov	r3, r2
-.LVL584:
-.L688:
-	.loc 2 663 0 discriminator 1
+.L695:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L690
-	.loc 2 670 0
+	bhi	.L697
 	mov	r2, #1
 	mov	r3, #0
-.LVL585:
 	mov	r1, r2
-	ldr	r0, .L694+16
+	ldr	r0, .L701+16
 	bl	FlashProgPages
-.LVL586:
-	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 671 0
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL587:
-	.loc 2 676 0
-	b	.L687
-.LVL588:
-.L690:
+	b	.L694
+.L697:
 	uxth	r1, r2
-	.loc 2 664 0
 	ldr	r0, [r6, r1, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L689
-	.loc 2 666 0
-	ldr	r0, [r5, #3240]
-	.loc 2 665 0
+	bne	.L696
+	ldr	r0, [r5, #3280]
 	add	r3, r3, #1
-.LVL589:
 	uxth	r3, r3
-.LVL590:
-	.loc 2 666 0
 	str	r1, [r0, r3, lsl #3]
-	.loc 2 667 0
 	ldr	r0, [r6, r1, lsl #2]
-	ldr	r1, [r5, #3240]
+	ldr	r1, [r5, #3280]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L689:
+.L696:
 	add	r2, r2, #1
-	b	.L688
-.L695:
+	b	.L695
+.L702:
 	.align	2
-.L694:
+.L701:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
 	.word	-1291
-	.word	.LANCHOR0+3220
-.LFE207:
+	.word	.LANCHOR0+3260
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
@@ -7491,204 +4869,126 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB208:
-	.loc 2 680 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL591:
 	mov	ip, sp
-.LCFI232:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI233:
 	sub	fp, ip, #4
-.LCFI234:
-	.loc 2 686 0
-	ldr	r7, .L715
-	.loc 2 680 0
+	ldr	r7, .L722
 	mov	r4, r0
 	mov	r8, r1
 	mov	r9, r2
-	.loc 2 683 0
 	mov	r6, #0
-.LVL592:
 	mov	r5, r7
-.L697:
-	.loc 2 686 0
-	ldr	r3, [r7, #2500]
+.L704:
+	ldr	r3, [r7, #2524]
 	add	r3, r3, #1
-	str	r3, [r7, #2500]
-	.loc 2 687 0
-	ldrh	r3, [r7, #80]
+	str	r3, [r7, #2524]
+	ldrh	r3, [r7, #104]
 	ldrh	r2, [r4, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L698
-	.loc 2 687 0 is_stmt 0 discriminator 1
+	bge	.L705
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L699
-.L698:
-	.loc 2 688 0 is_stmt 1
+	bne	.L706
+.L705:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL593:
-.L699:
-	.loc 2 699 0
+.L706:
 	ldrh	r3, [r4]
 	ldr	r2, [r4, #12]
 	lsl	r3, r3, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L700
-	.loc 2 699 0 is_stmt 0 discriminator 1
+	bne	.L707
 	movw	r2, #699
-	ldr	r1, .L715+4
-	ldr	r0, .L715+8
+	ldr	r1, .L722+4
+	ldr	r0, .L722+8
 	bl	printk
-.LVL594:
-.L700:
-	.loc 2 700 0 is_stmt 1
+.L707:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L701
-	.loc 2 700 0 is_stmt 0 discriminator 1
+	bcc	.L708
 	mov	r2, #700
-	ldr	r1, .L715+4
-	ldr	r0, .L715+8
+	ldr	r1, .L722+4
+	ldr	r0, .L722+8
 	bl	printk
-.LVL595:
-.L701:
-	.loc 2 701 0 is_stmt 1
+.L708:
 	ldrh	r3, [r4]
-.LBB384:
-.LBB385:
-.LBB386:
-	.loc 1 202 0
 	mov	r1, #16
-.LBE386:
-.LBE385:
-.LBE384:
-	.loc 2 701 0
 	ldr	r2, [r4, #12]
-	.loc 2 705 0
-	ldr	r0, [r5, #3244]
-	.loc 2 701 0
+	ldr	r0, [r5, #3284]
 	lsl	r3, r3, #1
 	ldrh	r10, [r2, r3]
-	.loc 2 703 0
 	ldrh	r3, [r4, #2]
-	.loc 2 705 0
-	str	r0, [r5, #3232]
-	.loc 2 704 0
-	str	r9, [r5, #3228]
-	.loc 2 703 0
+	str	r0, [r5, #3272]
+	str	r9, [r5, #3268]
 	orr	r3, r3, r10, lsl #10
-	str	r3, [r5, #3224]
-.LBB389:
-.LBB388:
-.LBB387:
-	.loc 1 202 0
+	str	r3, [r5, #3264]
 	bl	__memzero
-.LVL596:
-.LBE387:
-.LBE388:
-.LBE389:
-	.loc 2 708 0
-	ldr	r3, [r5, #3232]
-.LVL597:
-	.loc 2 709 0
+	ldr	r3, [r5, #3272]
 	ldr	r2, [r4, #28]
-	.loc 2 713 0
-	ldr	r0, .L715+12
-	.loc 2 710 0
+	ldr	r0, .L722+12
 	strh	r8, [r3, #8]	@ movhi
-	.loc 2 709 0
 	str	r2, [r3, #4]
-	.loc 2 711 0
 	ldrh	r2, [r4, #4]
-	.loc 2 712 0
 	strh	r10, [r3, #2]	@ movhi
-	.loc 2 711 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 713 0
 	mov	r3, #1
-.LVL598:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL599:
-	.loc 2 714 0
 	ldrh	r3, [r4, #2]
 	add	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 716 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	bne	.L702
-	.loc 2 717 0
-	ldr	r1, [r5, #3224]
-	.loc 2 718 0
+	bne	.L709
+	ldr	r1, [r5, #3264]
 	add	r6, r6, #1
-.LVL600:
-	.loc 2 717 0
-	ldr	r0, .L715+16
-	.loc 2 718 0
+	ldr	r0, .L722+16
 	uxth	r6, r6
-.LVL601:
-	.loc 2 717 0
 	bl	printk
-.LVL602:
-	.loc 2 719 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
-	.loc 2 720 0
-	ldrhls	r3, [r5, #80]
+	ldrhls	r3, [r5, #104]
 	subls	r3, r3, #1
 	strhls	r3, [r4, #2]	@ movhi
-	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L704
-	.loc 2 723 0
+	bls	.L711
 	mov	r2, r6
-	ldr	r1, [r5, #3224]
-	ldr	r0, .L715+20
+	ldr	r1, [r5, #3264]
+	ldr	r0, .L722+20
 	bl	printk
-.LVL603:
-.L705:
-	b	.L705
-.L704:
-	.loc 2 727 0
+.L712:
+	b	.L712
+.L711:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L697
-.L714:
-	b	.L714
-.L702:
-	.loc 2 731 0
+	beq	.L704
+.L721:
+	b	.L721
+.L709:
 	cmp	r3, #1
-	beq	.L697
-	.loc 2 734 0
-	ldr	r2, [r5, #3224]
-	.loc 2 736 0
+	beq	.L704
+	ldr	r2, [r5, #3264]
 	mov	r0, #0
-	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	.loc 2 736 0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L716:
+.L723:
 	.align	2
-.L715:
+.L722:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+258
 	.word	.LC1
-	.word	.LANCHOR0+3220
-	.word	.LC85
+	.word	.LANCHOR0+3260
 	.word	.LC86
-.LFE208:
+	.word	.LC87
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
 	.global	ftl_map_blk_gc
@@ -7697,175 +4997,112 @@ FtlMapWritePage:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB206:
-	.loc 2 586 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL604:
 	mov	ip, sp
-.LCFI235:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI236:
 	sub	fp, ip, #4
-.LCFI237:
 	sub	sp, sp, #8
-	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 590 0
 	ldr	r6, [r0, #12]
-.LVL605:
-	.loc 2 591 0
 	ldr	r9, [r0, #24]
-.LVL606:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL607:
-	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L729
+	ldr	r5, .L736
 	sub	r3, r3, #4
 	cmp	r2, r3
-	blt	.L718
-	.loc 2 597 0
+	blt	.L725
 	uxth	r0, r0
 	lsl	r0, r0, #1
 	ldrh	r8, [r6, r0]
-.LVL608:
-	.loc 2 598 0
 	cmp	r8, #0
-	beq	.L718
-	.loc 2 598 0 is_stmt 0 discriminator 1
+	beq	.L725
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L718
-	.loc 2 599 0 is_stmt 1
+	bne	.L725
 	mov	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 600 0
 	strh	r3, [r6, r0]	@ movhi
-	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 601 0
 	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 602 0
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L719
-	.loc 2 603 0
+	bcc	.L726
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL609:
-.L719:
-	.loc 2 613 0 discriminator 1
-	ldr	r10, .L729+4
-	.loc 2 586 0 discriminator 1
+.L726:
+	ldr	r10, .L736+4
 	mov	r6, #0
-.LVL610:
-.L720:
-	.loc 2 605 0 discriminator 1
+.L727:
 	ldrh	r2, [r4, #6]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L724
-	.loc 2 621 0
+	bhi	.L731
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL611:
-	.loc 2 622 0
 	mov	r3, #0
 	str	r3, [r4, #32]
-.LVL612:
-.L718:
-	.loc 2 626 0
+.L725:
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L725
-	.loc 2 627 0
+	bcc	.L732
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL613:
-.L725:
-	.loc 2 629 0
+.L732:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI238:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL614:
-.L724:
-.LCFI239:
+.L731:
 	uxth	r7, r6
-	.loc 2 606 0
 	ldr	r2, [r9, r7, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L721
-	.loc 2 608 0
-	ldr	ip, [r5, #3244]
-	.loc 2 607 0
-	ldr	r2, [r5, #3804]
-	.loc 2 611 0
-	ldr	r0, .L729+8
-	.loc 2 608 0
-	str	ip, [r5, #3232]
-	.loc 2 607 0
-	str	r2, [r5, #3228]
-	.loc 2 609 0
+	bne	.L728
+	ldr	ip, [r5, #3284]
+	ldr	r2, [r5, #3844]
+	ldr	r0, .L736+8
+	str	ip, [r5, #3272]
+	str	r2, [r5, #3268]
 	ldr	r2, [r9, r7, lsl #2]
 	str	r3, [fp, #-48]
-	.loc 2 608 0
 	str	ip, [fp, #-44]
-	.loc 2 609 0
-	str	r2, [r5, #3224]
-	.loc 2 611 0
+	str	r2, [r5, #3264]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL615:
-	.loc 2 613 0
 	ldr	ip, [fp, #-44]
 	ldr	r3, [fp, #-48]
-.LVL616:
 	ldrh	r2, [ip, #8]
 	cmp	r2, r3
-	beq	.L722
-	.loc 2 613 0 is_stmt 0 discriminator 1
+	beq	.L729
 	movw	r2, #613
 	mov	r1, r10
-	ldr	r0, .L729+12
+	ldr	r0, .L736+12
 	bl	printk
-.LVL617:
-.L722:
-	.loc 2 614 0 is_stmt 1
-	ldr	r3, [r5, #3220]
-.LVL618:
+.L729:
+	ldr	r3, [r5, #3260]
 	cmn	r3, #1
-	.loc 2 615 0
 	moveq	r3, #0
 	streq	r3, [r9, r7, lsl #2]
-	.loc 2 614 0
-	beq	.L721
-	.loc 2 617 0
-	ldr	r2, [r5, #3228]
+	beq	.L728
+	ldr	r2, [r5, #3268]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL619:
-.L721:
+.L728:
 	add	r6, r6, #1
-	b	.L720
-.L730:
+	b	.L727
+.L737:
 	.align	2
-.L729:
+.L736:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+274
-	.word	.LANCHOR0+3220
+	.word	.LANCHOR0+3260
 	.word	.LC1
-.LFE206:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
 	.global	flush_l2p_region
@@ -7874,52 +5111,32 @@ ftl_map_blk_gc:
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB209:
-	.loc 2 739 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL620:
 	mov	ip, sp
-.LCFI240:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI241:
 	sub	fp, ip, #4
-.LCFI242:
-	.loc 2 742 0
-	ldr	r5, .L732
-	.loc 2 739 0
+	ldr	r5, .L739
 	uxth	r0, r0
-	.loc 2 742 0
 	mov	r4, #12
 	mul	r4, r4, r0
-	ldr	r3, [r5, #2468]
-	.loc 2 743 0
-	add	r0, r5, #3856
-.LVL621:
-	add	r0, r0, #8
-	.loc 2 742 0
+	ldr	r3, [r5, #2492]
+	add	r0, r5, #3904
 	add	r2, r3, r4
-	.loc 2 743 0
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL622:
-	.loc 2 744 0
-	ldr	r0, [r5, #2468]
+	ldr	r0, [r5, #2492]
 	add	r4, r0, r4
-	.loc 2 746 0
 	mov	r0, #0
-	.loc 2 744 0
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 746 0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L733:
+.L740:
 	.align	2
-.L732:
+.L739:
 	.word	.LANCHOR0
-.LFE209:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	2
 	.global	log2phys
@@ -7928,154 +5145,105 @@ flush_l2p_region:
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-.LFB212:
-	.loc 2 802 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL623:
 	mov	ip, sp
-.LCFI243:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI244:
 	sub	fp, ip, #4
-.LCFI245:
 	sub	sp, sp, #4
-	.loc 2 806 0
 	mvn	r6, #0
-	.loc 2 805 0
-	ldr	r4, .L748
-	.loc 2 802 0
+	ldr	r4, .L755
 	mov	r7, r1
 	mov	r10, r2
-	.loc 2 805 0
-	ldrh	r3, [r4, #84]
+	ldrh	r3, [r4, #108]
 	add	r3, r3, #7
 	lsr	r9, r0, r3
-	.loc 2 806 0
 	bic	r6, r0, r6, lsl r3
-	.loc 2 808 0
-	ldr	r3, [r4, #2480]
-	.loc 2 805 0
+	ldr	r3, [r4, #2504]
 	uxth	r8, r9
-.LVL624:
-	.loc 2 806 0
 	uxth	r6, r6
-.LVL625:
-	.loc 2 808 0
 	cmp	r0, r3
-	bcc	.L735
-	.loc 2 808 0 is_stmt 0 discriminator 1
+	bcc	.L742
 	mov	r2, #808
-	ldr	r1, .L748+4
-	ldr	r0, .L748+8
-.LVL626:
+	ldr	r1, .L755+4
+	ldr	r0, .L755+8
 	bl	printk
-.LVL627:
-.L735:
-	.loc 2 810 0 is_stmt 1
-	ldrh	r1, [r4, #114]
+.L742:
+	ldrh	r1, [r4, #138]
 	mov	r2, #0
-	.loc 2 811 0
-	ldr	r0, [r4, #2468]
-.LVL628:
+	ldr	r0, [r4, #2492]
 	mov	r3, #12
-.LVL629:
-.L736:
+.L743:
 	uxth	r5, r2
-	.loc 2 810 0 discriminator 1
 	cmp	r5, r1
-	bcc	.L741
+	bcc	.L748
 	str	r3, [fp, #-44]
-	.loc 2 825 0
 	bl	select_l2p_ram_region
-.LVL630:
-	.loc 2 826 0
 	ldr	r3, [fp, #-44]
-	.loc 2 825 0
 	mov	r5, r0
-	.loc 2 826 0
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	mul	r3, r3, r0
 	add	r1, r2, r3
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L742
-	.loc 2 826 0 is_stmt 0 discriminator 1
+	beq	.L749
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L742
-	.loc 2 827 0 is_stmt 1
+	bge	.L749
 	bl	flush_l2p_region
-.LVL631:
-.L742:
-	.loc 2 830 0
+.L749:
 	mov	r1, r5
 	uxth	r0, r9
 	bl	load_l2p_region
-.LVL632:
-	.loc 2 831 0
-	b	.L737
-.L741:
+	b	.L744
+.L748:
 	add	r2, r2, #1
-	.loc 2 811 0
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r8
-	bne	.L736
-.L737:
-	.loc 2 813 0
+	bne	.L743
+.L744:
 	cmp	r10, #0
 	mov	r3, #12
-	bne	.L738
-	.loc 2 814 0
-	ldr	r2, [r4, #2468]
+	bne	.L745
+	ldr	r2, [r4, #2492]
 	mla	r3, r3, r5, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r6, lsl #2]
 	str	r3, [r7]
-.L739:
-	.loc 2 820 0
-	ldr	r2, [r4, #2468]
+.L746:
+	ldr	r2, [r4, #2492]
 	mov	r3, #12
-	.loc 2 832 0
 	mov	r0, #0
-	.loc 2 820 0
 	mla	r5, r3, r5, r2
-.LVL633:
 	ldr	r3, [r5, #4]
 	cmn	r3, #1
-	.loc 2 821 0
 	addne	r3, r3, #1
 	strne	r3, [r5, #4]
-	.loc 2 832 0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL634:
-.L738:
-	.loc 2 816 0
+.L745:
 	mul	r3, r3, r5
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
 	add	r2, r2, r3
 	ldr	r2, [r2, #8]
 	str	r1, [r2, r6, lsl #2]
-	.loc 2 817 0
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	add	r3, r2, r3
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 818 0
-	movw	r3, #2472
-	strh	r8, [r4, r3]	@ movhi
-	b	.L739
-.L749:
+	ldr	r3, .L755+12
+	strh	r8, [r3]	@ movhi
+	b	.L746
+.L756:
 	.align	2
-.L748:
+.L755:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
-.LFE212:
+	.word	.LANCHOR0+2496
 	.size	log2phys, .-log2phys
 	.align	2
 	.global	FtlReUsePrevPpa
@@ -8084,129 +5252,80 @@ log2phys:
 	.fpu softvfp
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB230:
-	.loc 2 1677 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL635:
 	mov	ip, sp
-.LCFI246:
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI247:
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI248:
 	sub	sp, sp, #4
-	.loc 2 1677 0
-	mov	r7, r0
-	.loc 2 1680 0
-	ldr	r5, .L760
-	.loc 2 1678 0
+	mov	r6, r0
+	ldr	r7, .L767
 	ubfx	r0, r1, #10, #16
-.LVL636:
-	.loc 2 1677 0
-	str	r1, [fp, #-36]
-	.loc 2 1678 0
+	str	r1, [fp, #-32]
 	bl	P2V_block_in_plane
-.LVL637:
-	.loc 2 1680 0
-	ldr	r2, [r5, #2300]
-.LVL638:
-	lsl	r6, r0, #1
-	ldrh	r3, [r2, r6]
+	ldr	r2, [r7, #2324]
+	lsl	r5, r0, #1
+	ldrh	r3, [r2, r5]
 	cmp	r3, #0
-	bne	.L751
-	.loc 2 1681 0
-	ldr	r4, [r5, #2316]
+	bne	.L758
+	ldr	r4, [r7, #2340]
 	cmp	r4, #0
-	beq	.L752
-.LBB390:
-	.loc 2 1685 0
-	ldr	r2, [r5, #2292]
-	.loc 2 1684 0
-	add	r8, r5, #2320
-	ldrh	r1, [r8]
-.LVL639:
-	.loc 2 1693 0
+	beq	.L759
+	movw	r2, #2344
 	movw	lr, #65535
-	.loc 2 1685 0
+	ldrh	ip, [r7, r2]
+	ldr	r2, [r7, #2316]
 	sub	r4, r4, r2
 	ubfx	r4, r4, #3, #16
-.LVL640:
-.L753:
-	.loc 2 1686 0 discriminator 1
-	uxth	ip, r3
-	cmp	r1, ip
-	bls	.L752
-	.loc 2 1687 0
+.L760:
+	uxth	r1, r3
+	cmp	ip, r1
+	bls	.L759
 	cmp	r4, r0
-	bne	.L754
-	.loc 2 1688 0
+	bne	.L761
 	mov	r1, r4
-.LVL641:
-	ldr	r0, .L760+4
-.LVL642:
+	ldr	r0, .L767+4
 	bl	List_remove_node
-.LVL643:
-	ldrh	r3, [r8]
+	movw	r3, #2344
+	ldrh	r3, [r7, r3]
 	cmp	r3, #0
-	bne	.L755
-	.loc 2 1688 0 is_stmt 0 discriminator 1
+	bne	.L762
 	movw	r2, #1688
-	ldr	r1, .L760+8
-	ldr	r0, .L760+12
+	ldr	r1, .L767+8
+	ldr	r0, .L767+12
 	bl	printk
-.LVL644:
-.L755:
-	.loc 2 1688 0 discriminator 3
-	ldrh	r3, [r8]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
+.L762:
+	movw	r2, #2344
 	mov	r0, r4
-	.loc 2 1688 0 discriminator 3
+	ldrh	r3, [r7, r2]
 	sub	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 2 1689 0 discriminator 3
+	strh	r3, [r7, r2]	@ movhi
 	bl	INSERT_DATA_LIST
-.LVL645:
-	.loc 2 1690 0 discriminator 3
-	ldr	r2, [r5, #2300]
-	ldrh	r3, [r2, r6]
-.LVL646:
-.L751:
-.LBE390:
-	.loc 2 1699 0
+	ldr	r2, [r7, #2324]
+	ldrh	r3, [r2, r5]
+.L758:
 	add	r3, r3, #1
-	strh	r3, [r2, r6]	@ movhi
-	b	.L752
-.LVL647:
-.L754:
-.LBB391:
-	.loc 2 1693 0
+	strh	r3, [r2, r5]	@ movhi
+	b	.L759
+.L761:
 	lsl	r4, r4, #3
-.LVL648:
 	add	r3, r3, #1
 	ldrh	r4, [r2, r4]
-.LVL649:
 	cmp	r4, lr
-	bne	.L753
-.L752:
-.LBE391:
-	.loc 2 1701 0
+	bne	.L760
+.L759:
 	mov	r2, #1
-	sub	r1, fp, #36
-.LVL650:
-	mov	r0, r7
-.LVL651:
+	sub	r1, fp, #32
+	mov	r0, r6
 	bl	log2phys
-.LVL652:
-	ldmib	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L761:
+	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L768:
 	.align	2
-.L760:
+.L767:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2316
+	.word	.LANCHOR0+2340
 	.word	.LANCHOR1+298
 	.word	.LC1
-.LFE230:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	2
 	.global	ftl_scan_all_data
@@ -8215,98 +5334,62 @@ FtlReUsePrevPpa:
 	.fpu softvfp
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB241:
-	.loc 2 2325 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI249:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI250:
 	sub	fp, ip, #4
-.LCFI251:
 	sub	sp, sp, #24
-	.loc 2 2331 0
 	mov	r5, #0
-.LVL653:
-	ldr	r6, .L770
-	.loc 2 2330 0
+	ldr	r6, .L777
 	mov	r1, #0
-	ldr	r0, .L770+4
+	ldr	r0, .L777+4
 	bl	printk
-.LVL654:
 	mov	r4, r6
-.LVL655:
-.L763:
-	.loc 2 2331 0 discriminator 1
-	ldr	r3, [r6, #2480]
+.L770:
+	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L769
-	.loc 2 2353 0
+	bcc	.L776
 	sub	sp, fp, #28
-.LCFI252:
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL656:
-.L769:
-.LCFI253:
-	.loc 2 2332 0
+.L776:
 	mov	r2, #0
 	sub	r1, fp, #32
 	mov	r0, r5
 	bl	log2phys
-.LVL657:
-	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
 	cmp	r3, #0
-	bne	.L764
-	.loc 2 2334 0
+	bne	.L771
 	ldr	r2, [fp, #-32]
 	mov	r1, r5
-	ldr	r0, .L770+8
+	ldr	r0, .L777+8
 	bl	printk
-.LVL658:
-.L764:
-	.loc 2 2335 0
+.L771:
 	ldr	r3, [fp, #-32]
 	cmn	r3, #1
-	beq	.L766
-	.loc 2 2336 0
-	str	r3, [r4, #3224]
-	.loc 2 2340 0
+	beq	.L773
+	str	r3, [r4, #3264]
 	mov	r2, #0
-	.loc 2 2338 0
-	ldr	r3, [r4, #3240]
-	.loc 2 2342 0
+	ldr	r3, [r4, #3280]
 	mov	r1, #1
-	.loc 2 2339 0
-	ldr	r7, [r4, #3244]
-	.loc 2 2342 0
-	ldr	r0, .L770+12
-	.loc 2 2338 0
-	str	r3, [r4, #3228]
-	.loc 2 2337 0
-	str	r5, [r4, #3236]
-	.loc 2 2339 0
-	str	r7, [r4, #3232]
-	.loc 2 2340 0
-	str	r2, [r4, #3220]
-	.loc 2 2342 0
+	ldr	r7, [r4, #3284]
+	ldr	r0, .L777+12
+	str	r3, [r4, #3268]
+	str	r5, [r4, #3276]
+	str	r7, [r4, #3272]
+	str	r2, [r4, #3260]
 	bl	FlashReadPages
-.LVL659:
-	.loc 2 2343 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
 	cmpne	r3, #256
-	beq	.L767
-	.loc 2 2344 0
+	beq	.L774
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L766
-.L767:
-	.loc 2 2347 0
-	ldr	r2, [r4, #3228]
-	ldr	r3, [r4, #3232]
-	ldr	r0, .L770+16
+	beq	.L773
+.L774:
+	ldr	r2, [r4, #3268]
+	ldr	r3, [r4, #3272]
+	ldr	r0, .L777+16
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8319,22 +5402,19 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3224]
+	ldr	r2, [r4, #3264]
 	bl	printk
-.LVL660:
-.L766:
-	.loc 2 2331 0 discriminator 2
+.L773:
 	add	r5, r5, #1
-	b	.L763
-.L771:
+	b	.L770
+.L778:
 	.align	2
-.L770:
+.L777:
 	.word	.LANCHOR0
-	.word	.LC87
 	.word	.LC88
-	.word	.LANCHOR0+3220
 	.word	.LC89
-.LFE241:
+	.word	.LANCHOR0+3260
+	.word	.LC90
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -8343,162 +5423,99 @@ ftl_scan_all_data:
 	.fpu softvfp
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB268:
-	.loc 5 419 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI254:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI255:
 	sub	fp, ip, #4
-.LCFI256:
 	sub	sp, sp, #88
-	.loc 5 425 0
-	ldr	r3, .L785
-	ldr	r0, [r3, #2692]
+	ldr	r3, .L792
+	ldr	r0, [r3, #2716]
 	mov	r4, r3
 	cmp	r0, #0
-	beq	.L773
-	.loc 5 426 0
-	ldr	r1, [r3, #2696]
-	ldr	r2, [r3, #2480]
+	beq	.L780
+	ldr	r1, [r3, #2720]
+	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L774
+	bcs	.L781
 	mov	r5, #2048
-.LVL661:
-.L779:
-.LBB397:
-.LBB398:
-	.loc 5 428 0
-	ldr	r0, [r4, #2696]
-	ldr	r3, [r4, #2480]
+.L786:
+	ldr	r0, [r4, #2720]
+	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L776
-	.loc 5 430 0
+	bcs	.L783
 	mov	r2, #0
 	sub	r1, fp, #108
 	bl	log2phys
-.LVL662:
-	.loc 5 432 0
 	ldr	r2, [fp, #-108]
-	.loc 5 431 0
-	ldr	r3, [r4, #2696]
-	.loc 5 432 0
+	ldr	r3, [r4, #2720]
 	cmn	r2, #1
-	.loc 5 431 0
 	add	r3, r3, #1
-	str	r3, [r4, #2696]
-	.loc 5 432 0
-	beq	.L777
-.LBB399:
-	.loc 5 435 0
+	str	r3, [r4, #2720]
+	beq	.L784
 	str	r3, [fp, #-88]
-	.loc 5 438 0
 	sub	r0, fp, #20
-	.loc 5 436 0
-	ldr	r3, .L785+4
-	.loc 5 439 0
+	ldr	r3, .L792+4
 	mov	r1, #1
-	.loc 5 434 0
 	str	r2, [fp, #-100]
-	.loc 5 438 0
 	mov	r2, #0
 	str	r2, [r0, #-84]!
-	.loc 5 436 0
 	str	r3, [fp, #-96]
-	.loc 5 437 0
 	sub	r3, fp, #84
 	str	r3, [fp, #-92]
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL663:
-	.loc 5 440 0
 	ldr	r3, [fp, #-104]
 	cmp	r3, #256
-	bne	.L776
-	.loc 5 442 0
+	bne	.L783
 	ldr	r0, [fp, #-108]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL664:
 	bl	FtlGcRefreshBlock
-.LVL665:
-.L776:
-.LBE399:
+.L783:
 	mvn	r0, #0
-.L772:
-.LBE398:
-.LBE397:
-	.loc 5 466 0
+.L779:
 	sub	sp, fp, #20
-.LCFI257:
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L777:
-.LCFI258:
-.LBB401:
-.LBB400:
-	.loc 5 427 0
+.L784:
 	subs	r5, r5, #1
-	bne	.L779
-	b	.L776
-.LVL666:
-.L774:
-.LBE400:
-.LBE401:
-	.loc 5 451 0
-	ldr	r2, [r3, #2484]
-	.loc 5 449 0
+	bne	.L786
+	b	.L783
+.L781:
+	ldr	r2, [r3, #2508]
 	mov	r0, #0
-	str	r0, [r3, #2692]
-	.loc 5 450 0
-	str	r0, [r3, #2696]
-	.loc 5 451 0
-	str	r2, [r3, #2688]
-	b	.L772
-.L773:
-.LBB402:
-	.loc 5 456 0
-	ldr	r1, [r3, #2484]
-	ldr	r2, [r3, #2688]
+	str	r0, [r3, #2716]
+	str	r0, [r3, #2720]
+	str	r2, [r3, #2712]
+	b	.L779
+.L780:
+	ldr	r1, [r3, #2508]
+	ldr	r2, [r3, #2712]
 	add	ip, r1, #1048576
 	cmp	r2, ip
-	bhi	.L782
-	.loc 5 454 0
-	ldr	r3, [r3, #2540]
-	.loc 5 457 0
+	bhi	.L789
+	ldr	r3, [r3, #2564]
 	mov	ip, #33554432
-	.loc 5 454 0
 	lsr	r3, r3, #10
-	.loc 5 457 0
 	add	r2, r2, ip, asr r3
 	cmp	r1, r2
-	bhi	.L782
-	.loc 5 458 0
-	ldr	r3, .L785+8
+	bhi	.L789
+	ldr	r3, .L792+8
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L772
-.L782:
-	.loc 5 460 0
+	bne	.L779
+.L789:
 	mov	r3, #1
-	.loc 5 461 0
 	mov	r0, #0
-	.loc 5 460 0
-	str	r3, [r4, #2692]
-	.loc 5 461 0
-	str	r0, [r4, #2696]
-	.loc 5 462 0
-	str	r1, [r4, #2688]
-	b	.L772
-.L786:
+	str	r3, [r4, #2716]
+	str	r0, [r4, #2720]
+	str	r1, [r4, #2712]
+	b	.L779
+.L793:
 	.align	2
-.L785:
+.L792:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-	.word	.LANCHOR0+2244
-.LBE402:
-.LFE268:
+	.word	.LANCHOR0+2268
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
 	.global	ftl_check_vpc
@@ -8507,182 +5524,124 @@ FtlReadRefresh:
 	.fpu softvfp
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB240:
-	.loc 2 2273 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI259:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI260:
 	sub	fp, ip, #4
-.LCFI261:
 	sub	sp, sp, #4
-	.loc 2 2282 0
 	mov	r4, #0
-.LVL667:
-	ldr	r6, .L811
-	.loc 2 2279 0
-	ldr	r1, .L811+4
-	ldr	r0, .L811+8
+	ldr	r6, .L818
+	ldr	r1, .L818+4
+	ldr	r0, .L818+8
 	mov	r5, r6
 	bl	printk
-.LVL668:
-.LBB409:
-.LBB410:
-.LBB411:
-	.loc 1 202 0
 	mov	r1, #8192
-	ldr	r0, .L811+12
+	ldr	r0, .L818+12
 	bl	__memzero
-.LVL669:
-.L788:
-.LBE411:
-.LBE410:
-.LBE409:
-	.loc 2 2282 0 discriminator 1
-	ldr	r3, [r6, #2480]
+.L795:
+	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L790
-	.loc 2 2295 0 discriminator 1
-	ldr	r8, .L811+12
+	bcc	.L797
+	ldr	r8, .L818+12
 	mov	r4, #0
-.LVL670:
-	.loc 2 2297 0 discriminator 1
-	ldr	r9, .L811+16
+	ldr	r9, .L818+16
 	mov	r6, r4
-.LVL671:
-.L791:
-	.loc 2 2293 0 discriminator 1
-	ldrh	r2, [r5, #16]
+.L798:
+	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L793
-	.loc 2 2305 0
-	ldr	r4, [r5, #2316]
+	bhi	.L800
+	ldr	r4, [r5, #2340]
 	cmp	r4, #0
-	beq	.L794
-.LBB412:
-	.loc 2 2307 0
-	ldr	r3, .L811+20
-	.loc 2 2309 0
+	beq	.L801
+	movw	r3, #2344
+	ldr	r9, .L818+12
+	ldrh	r8, [r5, r3]
 	mov	r7, #0
-	.loc 2 2313 0
-	ldr	r9, .L811+12
-	ldr	r10, .L811+24
-	.loc 2 2307 0
-	ldrh	r8, [r3]
-.LVL672:
-	.loc 2 2308 0
-	ldr	r3, [r5, #2292]
+	ldr	r3, [r5, #2316]
+	ldr	r10, .L818+20
 	sub	r4, r4, r3
 	ubfx	r4, r4, #3, #16
-.L795:
-	.loc 2 2309 0 discriminator 1
+.L802:
 	uxth	r3, r7
 	cmp	r8, r3
-	bls	.L794
-	.loc 2 2311 0
-	ldr	r2, [r5, #2300]
+	bls	.L801
+	ldr	r2, [r5, #2324]
 	lsl	r3, r4, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	beq	.L796
-	.loc 2 2314 0
+	beq	.L803
 	mov	r6, #1
-	.loc 2 2313 0
 	ldrh	r3, [r9, r3]
 	mov	r1, r4
 	mov	r0, r10
 	bl	printk
-.LVL673:
-.L796:
-	.loc 2 2316 0
-	ldr	r3, [r5, #2292]
+.L803:
+	ldr	r3, [r5, #2316]
 	lsl	r4, r4, #3
 	add	r7, r7, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L795
-.L794:
-.LBE412:
-	.loc 2 2321 0
+	bne	.L802
+.L801:
 	cmp	r6, #0
 	ldmibeq	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-	.loc 2 2321 0 is_stmt 0 discriminator 1
 	movw	r2, #2321
-	ldr	r1, .L811+4
-	ldr	r0, .L811+28
+	ldr	r1, .L818+4
+	ldr	r0, .L818+24
 	bl	printk
-.LVL674:
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL675:
-.L790:
-	.loc 2 2284 0 is_stmt 1
+.L797:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL676:
-	.loc 2 2285 0
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L789
-	.loc 2 2287 0
+	beq	.L796
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL677:
-	.loc 2 2288 0
-	ldr	r2, .L811+12
+	ldr	r2, .L818+12
 	lsl	r0, r0, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L789:
-	.loc 2 2282 0 discriminator 2
+.L796:
 	add	r4, r4, #1
-	b	.L788
-.LVL678:
-.L793:
-	.loc 2 2295 0
+	b	.L795
+.L800:
 	uxth	r1, r4
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	lsl	r7, r1, #1
 	ldrh	r2, [r3, r7]
 	ldrh	r3, [r8, r7]
 	cmp	r2, r3
-	beq	.L792
-	.loc 2 2297 0
+	beq	.L799
 	mov	r0, r9
 	bl	printk
-.LVL679:
-	.loc 2 2298 0
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	movw	r2, #65535
 	ldrh	r3, [r3, r7]
 	cmp	r3, r2
-	beq	.L792
-	.loc 2 2298 0 is_stmt 0 discriminator 1
+	beq	.L799
 	ldrh	r2, [r8, r7]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	movhi	r6, #1
-.L792:
+.L799:
 	add	r4, r4, #1
-	b	.L791
-.L812:
+	b	.L798
+.L819:
 	.align	2
-.L811:
+.L818:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+314
-	.word	.LC90
-	.word	check_vpc_table
 	.word	.LC91
-	.word	.LANCHOR0+2320
+	.word	check_vpc_table
 	.word	.LC92
+	.word	.LC93
 	.word	.LC1
-.LFE240:
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
 	.global	FtlMapBlkWriteDump_data
@@ -8691,88 +5650,51 @@ ftl_check_vpc:
 	.fpu softvfp
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB217:
-	.loc 2 946 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL680:
 	mov	ip, sp
-.LCFI262:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI263:
 	sub	fp, ip, #4
-.LCFI264:
-	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 952 0
 	cmp	r3, #0
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-	.loc 2 954 0
 	mov	r3, #0
-	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 956 0
-	ldr	r3, .L820
-	.loc 2 949 0
+	ldr	r3, .L827
 	ldr	r2, [r0, #24]
-.LVL681:
-	.loc 2 948 0
 	sub	r5, r5, #1
-	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 956 0
-	ldr	r0, [r3, #3804]
-.LVL682:
+	ldr	r0, [r3, #3844]
 	mov	r4, r3
-	.loc 2 957 0
-	ldr	r1, [r3, #3244]
-	.loc 2 956 0
-	str	r0, [r3, #3228]
-	.loc 2 957 0
-	str	r1, [r3, #3232]
-	.loc 2 979 0
+	ldr	r1, [r3, #3284]
+	str	r0, [r3, #3268]
+	str	r1, [r3, #3272]
 	ldr	r2, [r2, r5, lsl #2]
-.LVL683:
-	.loc 2 981 0
 	cmp	r2, #0
-	.loc 2 980 0
-	str	r2, [r3, #3224]
-	.loc 2 981 0
-	beq	.L815
-	.loc 2 983 0
+	str	r2, [r3, #3264]
+	beq	.L822
 	mov	r2, #1
-.LVL684:
-	ldr	r0, .L820+4
+	ldr	r0, .L827+4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL685:
-.L816:
-	.loc 2 990 0
-	ldr	r2, [r4, #3228]
+.L823:
+	ldr	r2, [r4, #3268]
 	mov	r1, r5
 	mov	r0, r6
 	bl	FtlMapWritePage
-.LVL686:
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.LVL687:
-.L815:
-	.loc 2 987 0
-	ldrh	r2, [r3, #86]
-.LVL688:
+.L822:
+	ldrh	r2, [r3, #110]
 	mov	r1, #255
 	bl	ftl_memset
-.LVL689:
-	b	.L816
-.L821:
+	b	.L823
+.L828:
 	.align	2
-.L820:
+.L827:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-.LFE217:
+	.word	.LANCHOR0+3260
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
 	.global	FtlScanSysBlk
@@ -8781,129 +5703,79 @@ FtlMapBlkWriteDump_data:
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB220:
-	.loc 2 1144 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI265:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI266:
 	sub	fp, ip, #4
-.LCFI267:
 	sub	sp, sp, #24
-	.loc 2 1150 0
 	mov	r5, #0
-	ldr	r4, .L903
-	.loc 2 1152 0
+	ldr	r4, .L910
+	movw	r3, #3944
 	mov	r1, r5
-	ldr	r2, [r4, #104]
-	.loc 2 1150 0
-	add	r3, r4, #3904
-	.loc 2 1152 0
-	ldr	r0, [r4, #3852]
-	.loc 2 1158 0
+	ldr	r2, [r4, #128]
 	mov	r6, r4
-	.loc 2 1150 0
-	strh	r5, [r3]	@ movhi
-	.loc 2 1151 0
-	strh	r5, [r4, #120]	@ movhi
-	.loc 2 1152 0
+	ldr	r0, [r4, #3892]
+	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r4, #144]	@ movhi
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL690:
-	.loc 2 1153 0
-	ldr	r2, [r4, #104]
+	ldr	r2, [r4, #128]
 	mov	r1, r5
-	ldr	r0, [r4, #3828]
+	ldr	r0, [r4, #3868]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL691:
-	.loc 2 1154 0
-	ldrh	r2, [r4, #96]
+	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #3840]
+	ldr	r0, [r4, #3880]
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.LVL692:
-	.loc 2 1155 0
-	ldrh	r2, [r4, #96]
+	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #124]
+	ldr	r0, [r4, #148]
 	mov	r5, r4
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL693:
-.LBB418:
-.LBB419:
-.LBB420:
-	.loc 1 202 0
-	ldr	r2, .L903+4
 	mvn	r3, #0
-	str	r3, [r4, #2552]
-	str	r3, [r2, #4]
-	str	r3, [r2, #8]
-.LBE420:
-.LBE419:
-.LBE418:
-	.loc 2 1158 0
-	ldrh	r3, [r4, #16]
-.LVL694:
+	str	r3, [r4, #2576]
+	str	r3, [r4, #2580]
+	str	r3, [r4, #2584]
+	ldrh	r3, [r4, #40]
 	str	r3, [fp, #-44]
-.LVL695:
-.L823:
-	.loc 2 1158 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r6, #18]
-.LVL696:
+.L830:
+	ldrh	r3, [r6, #42]
 	ldr	r2, [fp, #-44]
-.LVL697:
 	cmp	r3, r2
-	bls	.L864
-	.loc 2 1169 0 is_stmt 1 discriminator 1
-	ldr	r1, [r6, #3152]
+	bls	.L871
+	ldr	r1, [r6, #3176]
 	mov	r7, #0
-.LVL698:
-	.loc 2 1162 0 discriminator 1
-	ldrh	r2, [r6, #8]
-.LVL699:
-	.loc 2 1169 0 discriminator 1
+	ldrh	r2, [r6, #32]
 	mov	r10, r7
-	.loc 2 1167 0 discriminator 1
-	ldr	r8, [r6, #3792]
-	.loc 2 1168 0 discriminator 1
-	ldr	r3, [r6, #3148]
-	.loc 2 1169 0 discriminator 1
+	ldr	r8, [r6, #3832]
+	ldr	r3, [r6, #3172]
 	str	r1, [fp, #-48]
-	ldrh	r9, [r6, #88]
-	.loc 2 1164 0 discriminator 1
-	ldr	ip, .L903+8
-	b	.L865
-.L825:
-	.loc 2 1164 0 is_stmt 0
+	ldrh	r9, [r6, #112]
+	ldr	ip, .L910+4
+	b	.L872
+.L832:
 	ldrb	r0, [ip, r7]	@ zero_extendqisi2
 	ldr	r1, [fp, #-44]
 	str	r3, [fp, #-64]
 	str	r2, [fp, #-60]
 	str	ip, [fp, #-56]
 	bl	V2P_block
-.LVL700:
 	str	r0, [fp, #-52]
-	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL701:
 	cmp	r0, #0
 	ldr	ip, [fp, #-56]
 	ldr	r2, [fp, #-60]
 	ldr	r3, [fp, #-64]
-	bne	.L824
-	.loc 2 1167 0
+	bne	.L831
 	mov	r1, #20
 	mla	r0, r1, r10, r8
 	ldr	r1, [fp, #-52]
 	lsl	r1, r1, #10
-	.loc 2 1168 0
 	stmib	r0, {r1, r3}
-	.loc 2 1169 0
 	mul	r1, r9, r10
 	add	lr, r1, #3
 	cmp	r1, #0
@@ -8912,173 +5784,131 @@ FtlScanSysBlk:
 	bic	r1, r1, #3
 	add	r1, lr, r1
 	str	r1, [r0, #12]
-	.loc 2 1170 0
 	add	r1, r10, #1
 	uxth	r10, r1
-.L824:
+.L831:
 	add	r7, r7, #1
-.L865:
-	.loc 2 1162 0 discriminator 1
+.L872:
 	uxth	r1, r7
 	cmp	r2, r1
-	bhi	.L825
-	.loc 2 1173 0
+	bhi	.L832
 	cmp	r10, #0
-	bne	.L826
-.LVL702:
-.L863:
-	.loc 2 1158 0
+	bne	.L833
+.L870:
 	ldr	r3, [fp, #-44]
-.LVL703:
 	add	r3, r3, #1
-.LVL704:
 	uxth	r3, r3
-.LVL705:
 	str	r3, [fp, #-44]
-	b	.L823
-.LVL706:
-.L826:
-	.loc 2 1176 0
+	b	.L830
+.L833:
 	mov	r2, #1
 	mov	r1, r10
 	mov	r0, r8
 	bl	FlashReadPages
-.LVL707:
-	.loc 2 1177 0
 	mov	r3, #0
-.LVL708:
-.L902:
+.L909:
 	str	r3, [fp, #-48]
-	.loc 2 1177 0 is_stmt 0 discriminator 2
 	ldrh	r3, [fp, #-48]
 	cmp	r10, r3
-	bls	.L863
+	bls	.L870
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
-	.loc 2 1178 0 is_stmt 1
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r4, #3832]
 	add	r2, r3, r9
-	.loc 2 1181 0
 	ldr	r3, [r3, r9]
-	.loc 2 1178 0
 	ldr	r1, [r2, #4]
-	.loc 2 1179 0
 	ldr	r7, [r2, #12]
-	.loc 2 1181 0
 	cmn	r3, #1
-	.loc 2 1178 0
 	lsr	ip, r1, #10
 	uxth	r8, ip
-	.loc 2 1181 0
-	bne	.L830
+	bne	.L837
 	mov	r3, #16
-.L832:
-	.loc 2 1183 0
-	ldr	r0, [r4, #3792]
+.L839:
+	ldr	r0, [r4, #3832]
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	add	r2, r2, #1
 	str	r2, [r0, #4]
-	.loc 2 1184 0
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL709:
-	.loc 2 1185 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	ldr	ip, [fp, #-56]
 	cmp	r2, r3
 	ldr	r3, [fp, #-52]
-	bne	.L829
-	.loc 2 1186 0
-	ldr	r3, [r4, #3792]
+	bne	.L836
+	ldr	r3, [r4, #3832]
 	mvn	r2, #0
 	str	r2, [r3, r9]
-	.loc 2 1194 0
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r9]
 	cmp	r3, r2
-	bne	.L830
-.L831:
-	.loc 2 1336 0
+	bne	.L837
+.L838:
 	mov	r1, #0
 	uxth	r0, ip
 	bl	FtlFreeSysBlkQueueIn
-.LVL710:
-	b	.L835
-.L829:
-	.loc 2 1188 0
-	ldr	r2, [r4, #3792]
+	b	.L842
+.L836:
+	ldr	r2, [r4, #3832]
 	ldr	r2, [r2, r9]
 	cmn	r2, #1
-	bne	.L830
+	bne	.L837
 	sub	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1182 0 discriminator 2
 	cmp	r3, #0
-	bne	.L832
-	b	.L831
-.L830:
-	.loc 2 1196 0
-	ldr	r2, [r6, #2516]
+	bne	.L839
+	b	.L838
+.L837:
+	ldr	r2, [r6, #2540]
 	ldr	r3, [r7, #4]
 	cmn	r2, #1
-	beq	.L833
-	.loc 2 1196 0 is_stmt 0 discriminator 1
+	beq	.L840
 	cmp	r2, r3
-	bhi	.L834
-.L833:
-	.loc 2 1198 0 is_stmt 1
+	bhi	.L841
+.L840:
 	cmn	r3, #1
-	.loc 2 1201 0
 	addne	r2, r3, #1
-	strne	r2, [r5, #2516]
-.L834:
-	.loc 2 1206 0
+	strne	r2, [r5, #2540]
+.L841:
 	ldrh	r2, [r7]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L836
-	bhi	.L837
+	beq	.L843
+	bhi	.L844
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L838
-.L835:
+	beq	.L845
+.L842:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L902
-.L837:
+	b	.L909
+.L844:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L839
+	beq	.L846
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L831
-	b	.L835
-.L839:
-	.loc 2 1211 0
-	ldr	r9, .L903+12
-	ldr	r3, [r4, #104]
+	beq	.L838
+	b	.L842
+.L846:
+	ldr	r9, .L910+8
+	ldr	r3, [r4, #128]
 	ldrh	r2, [r9]
 	cmp	r2, r3
-	bls	.L841
-	.loc 2 1211 0 is_stmt 0 discriminator 1
+	bls	.L848
 	movw	r2, #1211
-	ldr	r1, .L903+16
-	ldr	r0, .L903+20
+	ldr	r1, .L910+12
+	ldr	r0, .L910+16
 	bl	printk
-.LVL711:
-.L841:
-	.loc 2 1212 0 is_stmt 1
-	ldr	r0, [r4, #104]
+.L848:
+	ldr	r0, [r4, #128]
 	ldrh	r2, [r9]
-	.loc 2 1214 0
-	ldr	ip, [r4, #3852]
-	.loc 2 1212 0
+	ldr	ip, [r4, #3892]
 	uxth	r1, r0
 	sub	r3, r1, #1
 	sub	r1, r1, r2
@@ -9086,380 +5916,287 @@ FtlScanSysBlk:
 	sxth	r3, r3
 	sxth	r1, r1
 	str	r1, [fp, #-52]
-.L842:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
+.L849:
 	ldr	r1, [fp, #-52]
 	cmp	r3, r1
-	bgt	.L848
-	.loc 2 1235 0 is_stmt 1
+	bgt	.L855
 	cmp	r3, #0
-	bge	.L880
-	b	.L835
-.L848:
-	.loc 2 1214 0
+	bge	.L887
+	b	.L842
+.L855:
 	lsl	lr, r3, #2
 	ldr	r1, [r7, #4]
 	str	lr, [fp, #-56]
 	ldr	lr, [ip, r3, lsl #2]
 	cmp	r1, lr
-	bls	.L843
-	.loc 2 1216 0
+	bls	.L850
 	ldr	r1, [ip]
 	cmp	r1, #0
-	bne	.L844
-	.loc 2 1216 0 is_stmt 0 discriminator 1
+	bne	.L851
 	cmp	r0, r2
-	.loc 2 1221 0 is_stmt 1 discriminator 1
 	addne	r2, r2, #1
 	strhne	r2, [r9]	@ movhi
-.L844:
-	.loc 2 1224 0 discriminator 1
+.L851:
 	uxth	ip, r3
 	mov	r1, #0
-.L845:
+.L852:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L846
-	.loc 2 1229 0
+	bhi	.L853
 	ldr	r1, [r7, #4]
-	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1229 0
-	ldr	r2, [r5, #3852]
+	ldr	r2, [r5, #3892]
 	ldr	r0, [fp, #-56]
 	str	r1, [r2, r0]
-	.loc 2 1230 0
 	lsl	r2, r3, #1
-	ldr	r1, [r5, #3828]
+	ldr	r1, [r5, #3868]
 	strh	r8, [r1, r2]	@ movhi
-	.loc 2 1235 0
-	blt	.L835
-	.loc 2 1242 0
-	ldr	r2, .L903+12
-	ldr	r1, [r5, #104]
+	blt	.L842
+	ldr	r2, .L910+8
+	ldr	r1, [r5, #128]
 	ldrh	r2, [r2]
 	sub	r1, r1, r2
 	sub	r1, r1, #1
 	sxth	r1, r1
 	cmp	r3, r1
-	bgt	.L835
-.L880:
-	.loc 2 1244 0
+	bgt	.L842
+.L887:
 	add	r2, r2, #1
-	.loc 2 1245 0
 	ldr	r1, [r7, #4]
-	.loc 2 1244 0
 	strh	r2, [r9]	@ movhi
-	.loc 2 1245 0
-	ldr	r2, [r4, #3852]
+	ldr	r2, [r4, #3892]
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1246 0
 	lsl	r3, r3, #1
-	ldr	r2, [r4, #3828]
-.L900:
-	.loc 2 1290 0
+	ldr	r2, [r4, #3868]
+.L907:
 	strh	r8, [r2, r3]	@ movhi
-	b	.L835
-.L846:
-	.loc 2 1226 0 discriminator 3
-	ldr	r0, [r6, #3852]
+	b	.L842
+.L853:
+	ldr	r0, [r6, #3892]
 	add	r1, r1, #1
 	add	lr, r0, r2, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r2, lsl #2]
-	.loc 2 1227 0 discriminator 3
 	lsl	r2, r2, #1
-	ldr	r0, [r6, #3828]
+	ldr	r0, [r6, #3868]
 	add	lr, r0, r2
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r2]	@ movhi
-	b	.L845
-.L843:
+	b	.L852
+.L850:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L842
-.L838:
-	.loc 2 1252 0
-	ldrh	r2, [r4, #120]
-	ldrh	r3, [r4, #96]
+	b	.L849
+.L845:
+	ldrh	r2, [r4, #144]
+	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L851
-	.loc 2 1252 0 is_stmt 0 discriminator 1
+	bls	.L858
 	movw	r2, #1252
-	ldr	r1, .L903+16
-	ldr	r0, .L903+20
+	ldr	r1, .L910+12
+	ldr	r0, .L910+16
 	bl	printk
-.LVL712:
-.L851:
-	.loc 2 1253 0 is_stmt 1
-	ldrh	r2, [r4, #96]
-	ldrh	r1, [r4, #120]
-	.loc 2 1255 0
-	ldr	ip, [r4, #3840]
-	.loc 2 1253 0
+.L858:
+	ldrh	r2, [r4, #120]
+	ldrh	r1, [r4, #144]
+	ldr	ip, [r4, #3880]
 	sub	r0, r2, #1
 	sxth	r3, r0
 	sub	r0, r0, r1
 	str	r0, [fp, #-52]
-.L852:
-	.loc 2 1253 0 is_stmt 0 discriminator 1
+.L859:
 	ldr	r0, [fp, #-52]
 	cmp	r3, r0
-	ble	.L857
-	.loc 2 1255 0 is_stmt 1
+	ble	.L864
 	ldr	r9, [ip, r3, lsl #2]
 	lsl	lr, r3, #2
 	ldr	r0, [r7, #4]
 	cmp	r0, r9
-	bls	.L853
-	.loc 2 1257 0
+	bls	.L860
 	sub	r2, r2, r1
 	ldr	r0, [ip]
 	clz	r2, r2
-	.loc 2 1267 0
 	uxth	ip, r3
-	.loc 2 1257 0
 	lsr	r2, r2, #5
 	cmp	r0, #0
 	orrne	r2, r2, #1
 	cmp	r2, #0
-	.loc 2 1265 0
 	addeq	r1, r1, #1
-	strheq	r1, [r5, #120]	@ movhi
+	strheq	r1, [r5, #144]	@ movhi
 	mov	r1, #0
-.L855:
-	.loc 2 1267 0 discriminator 1
+.L862:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L856
-	.loc 2 1272 0
+	bhi	.L863
 	ldr	r1, [r7, #4]
-	ldr	r2, [r5, #3840]
+	ldr	r2, [r5, #3880]
 	str	r1, [r2, lr]
-	.loc 2 1273 0
 	lsl	r2, r3, #1
-	ldr	r1, [r5, #124]
+	ldr	r1, [r5, #148]
 	strh	r8, [r1, r2]	@ movhi
-.L857:
-	.loc 2 1278 0
+.L864:
 	cmp	r3, #0
-	blt	.L835
-	.loc 2 1286 0
-	ldrh	r2, [r5, #96]
-	ldrh	r1, [r5, #120]
+	blt	.L842
+	ldrh	r2, [r5, #120]
+	ldrh	r1, [r5, #144]
 	sub	r2, r2, #1
 	sub	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L835
-	.loc 2 1288 0
+	bgt	.L842
 	add	r1, r1, #1
-	.loc 2 1289 0
-	ldr	r2, [r5, #3840]
-	.loc 2 1288 0
-	strh	r1, [r5, #120]	@ movhi
-	.loc 2 1289 0
+	ldr	r2, [r5, #3880]
+	strh	r1, [r5, #144]	@ movhi
 	ldr	r1, [r7, #4]
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1290 0
 	lsl	r3, r3, #1
-	ldr	r2, [r5, #124]
-	b	.L900
-.L856:
-	.loc 2 1269 0 discriminator 3
-	ldr	r0, [r6, #3840]
+	ldr	r2, [r5, #148]
+	b	.L907
+.L863:
+	ldr	r0, [r6, #3880]
 	add	r1, r1, #1
 	add	r9, r0, r2, lsl #2
 	ldr	r9, [r9, #4]
 	str	r9, [r0, r2, lsl #2]
-	.loc 2 1270 0 discriminator 3
 	lsl	r2, r2, #1
-	ldr	r0, [r6, #124]
+	ldr	r0, [r6, #148]
 	add	r9, r0, r2
 	ldrh	r9, [r9, #2]
 	strh	r9, [r0, r2]	@ movhi
-	b	.L855
-.L853:
+	b	.L862
+.L860:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L852
-.L836:
-	.loc 2 1297 0
-	ldr	r9, .L903+4
+	b	.L859
+.L843:
+	ldr	r9, .L910+20
 	movw	r2, #65535
 	ldrh	r1, [r9]
 	cmp	r1, r2
-	.loc 2 1299 0
 	strheq	r8, [r9]	@ movhi
-	.loc 2 1297 0
-	beq	.L901
-	.loc 2 1304 0
+	beq	.L908
 	ldrh	r0, [r9, #4]
 	cmp	r0, r2
-	beq	.L860
-	.loc 2 1305 0
+	beq	.L867
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL713:
-.L860:
-	.loc 2 1306 0
+.L867:
 	ldr	r3, [r7, #4]
-	ldr	r2, [r4, #2560]
+	ldr	r2, [r4, #2584]
 	cmp	r2, r3
-	.loc 2 1314 0
 	strhcs	r8, [r9, #4]	@ movhi
-	.loc 2 1306 0
-	bcs	.L835
-	.loc 2 1308 0
+	bcs	.L842
 	ldrh	r3, [r9]
-	.loc 2 1309 0
 	strh	r8, [r9]	@ movhi
-	.loc 2 1308 0
 	strh	r3, [r9, #4]	@ movhi
-	.loc 2 1310 0
 	ldr	r3, [r7, #4]
-.L901:
-	str	r3, [r4, #2560]
-	b	.L835
-.LVL714:
-.L864:
-	.loc 2 1341 0
-	ldr	r2, [r6, #3828]
-.LVL715:
+.L908:
+	str	r3, [r4, #2584]
+	b	.L842
+.L871:
+	ldr	r2, [r6, #3868]
 	ldrh	r3, [r2]
 	cmp	r3, #0
-	beq	.L866
-.L869:
-	.loc 2 1359 0
-	ldr	r1, [r4, #124]
+	beq	.L873
+.L876:
+	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L867
-.L868:
-	.loc 2 1377 0
-	ldr	r3, .L903+12
-	ldrh	r2, [r3]
-	ldr	r3, [r4, #104]
+	beq	.L874
+.L875:
+	movw	r3, #3944
+	ldrh	r2, [r4, r3]
+	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L899
-	.loc 2 1377 0 is_stmt 0 discriminator 1
+	bls	.L906
 	movw	r2, #1377
-	ldr	r1, .L903+16
-	ldr	r0, .L903+20
+	ldr	r1, .L910+12
+	ldr	r0, .L910+16
 	bl	printk
-.LVL716:
-.L899:
-	.loc 2 1379 0 is_stmt 1
+.L906:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI268:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL717:
-.L866:
-.LCFI269:
-	.loc 2 1341 0 discriminator 1
-	ldr	r1, .L903+12
-	ldrh	r1, [r1]
+.L873:
+	movw	r1, #3944
+	ldrh	r1, [r6, r1]
 	cmp	r1, #0
-	.loc 2 1343 0 discriminator 1
-	ldrne	r1, [r6, #104]
-	.loc 2 1341 0 discriminator 1
-	beq	.L869
-.L870:
+	ldrne	r1, [r6, #128]
+	beq	.L876
+.L877:
 	sxth	ip, r3
-	.loc 2 1343 0 discriminator 1
 	cmp	ip, r1
-	bcs	.L869
-	.loc 2 1345 0
+	bcs	.L876
 	lsl	r0, ip, #1
 	add	r3, r3, #1
 	ldrh	r0, [r2, r0]
 	cmp	r0, #0
-	beq	.L870
+	beq	.L877
 	mov	r3, ip
-	.loc 2 1351 0 discriminator 1
 	mov	lr, #0
-.L871:
-	.loc 2 1347 0 discriminator 1
-	ldr	r2, [r5, #104]
+.L878:
+	ldr	r2, [r5, #128]
 	cmp	r3, r2
-	bcs	.L869
-	.loc 2 1349 0 discriminator 3
-	ldr	r1, [r5, #3828]
+	bcs	.L876
+	ldr	r1, [r5, #3868]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
 	lsl	r6, r0, #1
 	ldrh	r7, [r1, r2]
-.LVL718:
 	strh	r7, [r1, r6]	@ movhi
-	.loc 2 1350 0 discriminator 3
-	ldr	r1, [r5, #3852]
+	ldr	r1, [r5, #3892]
 	ldr	r6, [r1, r3, lsl #2]
 	add	r3, r3, #1
 	sxth	r3, r3
 	str	r6, [r1, r0, lsl #2]
-	.loc 2 1351 0 discriminator 3
-	ldr	r1, [r5, #3828]
+	ldr	r1, [r5, #3868]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L871
-.LVL719:
-.L867:
-	.loc 2 1359 0 discriminator 1
-	ldrh	r3, [r4, #120]
+	b	.L878
+.L874:
+	ldrh	r3, [r4, #144]
 	cmp	r3, #0
-	.loc 2 1361 0 discriminator 1
-	ldrhne	r0, [r4, #96]
-	.loc 2 1359 0 discriminator 1
-	beq	.L868
-.L876:
+	ldrhne	r0, [r4, #120]
+	beq	.L875
+.L883:
 	sxth	r3, r2
-	.loc 2 1361 0 discriminator 1
 	cmp	r3, r0
 	mov	ip, r3
-	bge	.L868
-	.loc 2 1363 0
+	bge	.L875
 	lsl	lr, r3, #1
 	add	r2, r2, #1
 	ldrh	lr, [r1, lr]
 	cmp	lr, #0
-	beq	.L876
-	.loc 2 1369 0 discriminator 1
+	beq	.L883
 	mov	lr, #0
-.L877:
-	.loc 2 1365 0 discriminator 1
-	ldrh	r2, [r5, #96]
+.L884:
+	ldrh	r2, [r5, #120]
 	cmp	r3, r2
-	bge	.L868
-	.loc 2 1367 0 discriminator 3
-	ldr	r1, [r5, #124]
+	bge	.L875
+	ldr	r1, [r5, #148]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
 	lsl	r6, r0, #1
 	ldrh	r7, [r1, r2]
-.LVL720:
 	strh	r7, [r1, r6]	@ movhi
-	.loc 2 1368 0 discriminator 3
-	ldr	r1, [r5, #3840]
+	ldr	r1, [r5, #3880]
 	ldr	r6, [r1, r3, lsl #2]
 	add	r3, r3, #1
 	sxth	r3, r3
 	str	r6, [r1, r0, lsl #2]
-	.loc 2 1369 0 discriminator 3
-	ldr	r1, [r5, #124]
+	ldr	r1, [r5, #148]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L877
-.L904:
+	b	.L884
+.L911:
 	.align	2
-.L903:
+.L910:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2552
-	.word	.LANCHOR0+36
-	.word	.LANCHOR0+3904
+	.word	.LANCHOR0+60
+	.word	.LANCHOR0+3944
 	.word	.LANCHOR1+328
 	.word	.LC1
-.LFE220:
+	.word	.LANCHOR0+2576
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	2
 	.global	FtlMapTblRecovery
@@ -9468,333 +6205,200 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB225:
-	.loc 2 1515 0
 	@ args = 0, pretend = 0, frame = 20
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL721:
 	mov	ip, sp
-.LCFI270:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI271:
 	sub	fp, ip, #4
-.LCFI272:
 	sub	sp, sp, #20
-	.loc 2 1526 0
 	mov	r1, #0
-	.loc 2 1519 0
 	ldr	r3, [r0, #24]
-.LVL722:
-	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1527 0
-	ldr	r6, .L932
-	.loc 2 1532 0
+	ldr	r6, .L939
 	mov	r7, #0
-	.loc 2 1520 0
 	ldr	r8, [r0, #12]
-.LVL723:
-	.loc 2 1519 0
 	str	r3, [fp, #-44]
-	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-.LVL724:
 	mov	r5, r6
 	str	r3, [fp, #-56]
-	.loc 2 1522 0
 	ldrh	r3, [r0, #6]
-.LVL725:
 	str	r3, [fp, #-48]
-	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-.LVL726:
-	.loc 2 1526 0
 	ldr	r0, [fp, #-44]
-.LVL727:
-	.loc 2 1523 0
 	str	r3, [fp, #-52]
-	.loc 2 1526 0
 	ldr	r3, [fp, #-48]
-.LVL728:
 	lsl	r2, r3, #2
 	bl	ftl_memset
-.LVL729:
-	.loc 2 1527 0
-	ldr	r3, [r6, #3240]
-	.loc 2 1530 0
+	ldr	r3, [r6, #3280]
 	mvn	r2, #0
-	.loc 2 1528 0
-	ldr	r9, [r6, #3244]
-	.loc 2 1532 0
+	ldr	r9, [r6, #3284]
 	str	r7, [r4, #32]
-	.loc 2 1527 0
-	str	r3, [r6, #3228]
-	.loc 2 1528 0
-	str	r9, [r6, #3232]
-	.loc 2 1530 0
+	str	r3, [r6, #3268]
+	str	r9, [r6, #3272]
 	strh	r2, [r4]	@ movhi
-	.loc 2 1531 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 1534 0
 	mov	r2, #1
-	.loc 2 1533 0
 	str	r7, [r4, #28]
-	.loc 2 1534 0
 	str	r2, [r4, #36]
-.LVL730:
-.L906:
-	.loc 2 1535 0 discriminator 1
+.L913:
 	ldr	r3, [fp, #-52]
-.LVL731:
 	sxth	r2, r7
-.LVL732:
 	cmp	r2, r3
-	bge	.L923
-	.loc 2 1537 0
+	bge	.L930
 	ldr	r3, [fp, #-52]
 	lsl	r0, r2, #1
 	sub	r1, r3, #1
 	cmp	r2, r1
-	bne	.L907
-	.loc 2 1539 0
+	bne	.L914
 	add	r10, r8, r0
 	mov	r1, #1
 	ldrh	r0, [r8, r0]
-	.loc 2 1543 0
 	mov	r8, #0
-.LVL733:
 	str	r2, [fp, #-52]
-	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL734:
-	.loc 2 1542 0
 	ldr	r3, [fp, #-56]
-.LVL735:
-	.loc 2 1539 0
 	sxth	r1, r0
-.LVL736:
-	.loc 2 1542 0
 	ldr	r2, [fp, #-52]
-.LVL737:
-	.loc 2 1540 0
 	add	r0, r0, #1
-	.loc 2 1546 0
-	ldr	ip, .L932+4
-	.loc 2 1541 0
+	ldr	ip, .L939+4
 	strh	r7, [r4]	@ movhi
-	.loc 2 1543 0
 	add	r7, r1, #1
-	.loc 2 1540 0
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1542 0
 	ldr	r2, [r3, r2, lsl #2]
-.LVL738:
 	str	r2, [r4, #28]
-.LVL739:
-.L908:
-	.loc 2 1543 0 discriminator 1
+.L915:
 	sxth	r2, r8
 	cmp	r2, r7
-	blt	.L910
-.LVL740:
-.L923:
-	.loc 2 1596 0
+	blt	.L917
+.L930:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL741:
-	.loc 2 1597 0
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L912
-	.loc 2 1599 0
+	bne	.L919
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL742:
-.L912:
-	.loc 2 1602 0
+.L919:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL743:
-	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL744:
-	.loc 2 1606 0
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI273:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL745:
-.L910:
-.LCFI274:
-	.loc 2 1545 0
+.L917:
 	ldrh	r1, [r10]
-.LVL746:
-	.loc 2 1546 0
 	mov	r0, ip
 	str	ip, [fp, #-52]
-	.loc 2 1545 0
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #3224]
-	.loc 2 1546 0
+	str	r2, [r6, #3264]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL747:
-	.loc 2 1549 0
-	ldr	r2, [r6, #3220]
+	ldr	r2, [r6, #3260]
 	ldr	ip, [fp, #-52]
 	cmn	r2, #1
-	beq	.L909
-	.loc 2 1551 0
+	beq	.L916
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
-.LVL748:
 	cmp	r3, r2
-	bls	.L909
-	.loc 2 1551 0 is_stmt 0 discriminator 1
+	bls	.L916
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
-	.loc 2 1553 0 is_stmt 1 discriminator 1
-	ldreq	r1, [r6, #3224]
+	ldreq	r1, [r6, #3264]
 	ldreq	r3, [fp, #-44]
-.LVL749:
 	streq	r1, [r3, r2, lsl #2]
-.LVL750:
-.L909:
+.L916:
 	add	r8, r8, #1
-	b	.L908
-.LVL751:
-.L907:
-	.loc 2 1559 0
-	ldr	r2, [r5, #3240]
-.LVL752:
-	.loc 2 1560 0
+	b	.L915
+.L914:
+	ldr	r2, [r5, #3280]
 	add	r3, r8, r0
-.LVL753:
 	str	r3, [fp, #-60]
-	.loc 2 1559 0
-	str	r2, [r5, #3228]
-	.loc 2 1560 0
-	ldrh	r2, [r5, #80]
+	str	r2, [r5, #3268]
+	ldrh	r2, [r5, #104]
 	ldrh	r1, [r8, r0]
-	.loc 2 1561 0
-	ldr	r0, .L932+4
-	.loc 2 1560 0
+	ldr	r0, .L939+4
 	sub	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3224]
-	.loc 2 1561 0
+	str	r2, [r5, #3264]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL754:
-	.loc 2 1564 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	beq	.L925
-	.loc 2 1564 0 is_stmt 0 discriminator 1
+	beq	.L932
 	ldrh	r1, [r9]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L925
-	.loc 2 1564 0 discriminator 2
+	bne	.L932
 	ldrh	r1, [r9, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L914
-.L925:
+	beq	.L921
+.L932:
 	mov	r10, #0
-.LVL755:
-.L915:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
-	ldrh	r1, [r5, #80]
+.L922:
+	ldrh	r1, [r5, #104]
 	sxth	r2, r10
 	cmp	r2, r1
-	bge	.L921
-	.loc 2 1581 0
+	bge	.L928
 	ldr	r3, [fp, #-60]
-.LVL756:
-	.loc 2 1582 0
-	ldr	r0, .L932+4
-	.loc 2 1581 0
+	ldr	r0, .L939+4
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3224]
-	.loc 2 1582 0
+	str	r2, [r5, #3264]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL757:
-	.loc 2 1585 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	beq	.L919
-	.loc 2 1587 0
+	beq	.L926
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
-.LVL758:
 	cmp	r3, r2
-	bls	.L919
-	.loc 2 1587 0 is_stmt 0 discriminator 1
+	bls	.L926
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
-	.loc 2 1589 0 is_stmt 1 discriminator 1
-	ldreq	r1, [r5, #3224]
+	ldreq	r1, [r5, #3264]
 	ldreq	r3, [fp, #-44]
-.LVL759:
 	streq	r1, [r3, r2, lsl #2]
-.LVL760:
-.L919:
+.L926:
 	add	r10, r10, #1
-	b	.L915
-.LVL761:
-.L914:
+	b	.L922
+.L921:
 	mov	r0, #0
-	.loc 2 1572 0 discriminator 1
 	mov	lr, #4
-.LVL762:
-.L916:
-	.loc 2 1567 0 discriminator 1
-	ldrh	r1, [r5, #80]
+.L923:
+	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	sub	r1, r1, #1
 	cmp	r2, r1
-	blt	.L918
-.LVL763:
-.L921:
+	blt	.L925
+.L928:
 	add	r7, r7, #1
-	b	.L906
-.LVL764:
-.L918:
-	.loc 2 1569 0
-	ldr	ip, [r5, #3240]
+	b	.L913
+.L925:
+	ldr	ip, [r5, #3280]
 	add	r0, r0, #1
-	.loc 2 1570 0
 	ldr	r3, [fp, #-48]
-.LVL765:
-	.loc 2 1569 0
 	ldr	r1, [ip, r2, lsl #3]
-	.loc 2 1570 0
 	uxth	r10, r1
 	cmp	r3, r10
-	.loc 2 1572 0
 	addhi	r2, lr, r2, lsl #3
 	ldrhi	r3, [fp, #-44]
-.LVL766:
 	movhi	r1, r10
 	ldrhi	r2, [ip, r2]
 	strhi	r2, [r3, r1, lsl #2]
-	b	.L916
-.L933:
+	b	.L923
+.L940:
 	.align	2
-.L932:
+.L939:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-.LFE225:
+	.word	.LANCHOR0+3260
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
@@ -9803,55 +6407,38 @@ FtlMapTblRecovery:
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB226:
-	.loc 2 1609 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI275:
 	push	{fp, ip, lr, pc}
-.LCFI276:
 	sub	fp, ip, #4
-.LCFI277:
-	.loc 2 1610 0
-	ldr	r3, .L935
-	ldrh	r2, [r3, #96]
-	add	r0, r3, #3904
-	add	r0, r0, #4
+	ldr	r3, .L942
+	ldrh	r2, [r3, #120]
+	add	r0, r3, #3936
+	add	r0, r0, #12
 	strh	r2, [r0, #10]	@ movhi
-	.loc 2 1611 0
-	ldr	r2, .L935+4
+	ldr	r2, .L942+4
 	strh	r2, [r0, #4]	@ movhi
-	.loc 2 1612 0
-	ldrh	r2, [r3, #120]
+	ldrh	r2, [r3, #144]
 	strh	r2, [r0, #8]	@ movhi
-	.loc 2 1613 0
-	ldrh	r2, [r3, #98]
+	ldrh	r2, [r3, #122]
 	strh	r2, [r0, #6]	@ movhi
-	.loc 2 1614 0
-	ldr	r2, [r3, #124]
-	str	r2, [r3, #3920]
-	.loc 2 1615 0
-	ldr	r2, [r3, #3840]
-	str	r2, [r3, #3924]
-	.loc 2 1616 0
-	ldr	r2, [r3, #3836]
-	str	r2, [r3, #3928]
-	.loc 2 1617 0
-	ldr	r2, [r3, #3844]
-	str	r2, [r3, #3932]
-	.loc 2 1619 0
+	ldr	r2, [r3, #148]
+	str	r2, [r3, #3960]
+	ldr	r2, [r3, #3880]
+	str	r2, [r3, #3964]
+	ldr	r2, [r3, #3876]
+	str	r2, [r3, #3968]
+	ldr	r2, [r3, #3884]
+	str	r2, [r3, #3972]
 	bl	FtlMapTblRecovery
-.LVL767:
-	.loc 2 1622 0
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L936:
+.L943:
 	.align	2
-.L935:
+.L942:
 	.word	.LANCHOR0
 	.word	-3962
-.LFE226:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.align	2
 	.global	FtlL2PDataInit
@@ -9860,108 +6447,79 @@ FtlLoadVonderInfo:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB227:
-	.loc 2 1625 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI278:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI279:
 	sub	fp, ip, #4
-.LCFI280:
-	.loc 2 1627 0
-	ldr	r4, .L940
+	ldr	r4, .L947
 	mov	r1, #0
-	.loc 2 1632 0
 	mvn	r5, #0
-	.loc 2 1627 0
-	ldr	r2, [r4, #104]
-	ldr	r0, [r4, #3832]
+	ldr	r2, [r4, #128]
+	ldr	r0, [r4, #3872]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL768:
-	.loc 2 1628 0
-	ldrh	r3, [r4, #86]
+	ldrh	r3, [r4, #110]
 	mov	r1, #255
-	ldrh	r2, [r4, #114]
-	ldr	r0, [r4, #3856]
+	ldrh	r2, [r4, #138]
+	ldr	r0, [r4, #3896]
 	mul	r2, r2, r3
 	bl	ftl_memset
-.LVL769:
-	.loc 2 1629 0
 	mov	r2, #0
 	mov	r3, r4
-	.loc 2 1631 0
 	mov	lr, #12
 	mov	r4, r2
-.L938:
-	.loc 2 1629 0 discriminator 1
-	ldrh	r0, [r3, #114]
+.L945:
+	ldrh	r0, [r3, #138]
 	uxth	r1, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bhi	.L939
-	.loc 2 1635 0
-	ldr	r2, .L940+4
+	bhi	.L946
+	ldr	r2, .L947+4
 	mvn	r1, #0
-	.loc 2 1636 0
-	movw	r0, #3864
-	strh	r1, [r3, r0]	@ movhi
-	.loc 2 1635 0
 	strh	r1, [r2, #2]	@ movhi
-	.loc 2 1637 0
-	ldr	r1, [r3, #104]
+	strh	r1, [r2]	@ movhi
+	ldr	r1, [r3, #128]
 	strh	r1, [r2, #10]	@ movhi
-	.loc 2 1638 0
-	ldr	r1, .L940+8
+	ldr	r1, .L947+8
 	strh	r1, [r2, #4]	@ movhi
-	.loc 2 1639 0
-	ldrh	r1, [r2, #40]
+	movw	r1, #3944
+	ldrh	r1, [r3, r1]
 	strh	r1, [r2, #8]	@ movhi
-	.loc 2 1640 0
-	ldrh	r1, [r3, #112]
+	ldrh	r1, [r3, #136]
 	strh	r1, [r2, #6]	@ movhi
-	.loc 2 1641 0
-	ldr	r2, [r3, #3828]
-	str	r2, [r3, #3876]
-	.loc 2 1642 0
-	ldr	r2, [r3, #3852]
-	str	r2, [r3, #3880]
-	.loc 2 1643 0
-	ldr	r2, [r3, #3832]
-	str	r2, [r3, #3884]
-	.loc 2 1644 0
-	ldr	r2, [r3, #3848]
-	str	r2, [r3, #3888]
+	ldr	r2, [r3, #3868]
+	str	r2, [r3, #3916]
+	ldr	r2, [r3, #3892]
+	str	r2, [r3, #3920]
+	ldr	r2, [r3, #3872]
+	str	r2, [r3, #3924]
+	ldr	r2, [r3, #3888]
+	str	r2, [r3, #3928]
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L939:
-	.loc 2 1631 0 discriminator 3
+.L946:
 	uxth	r2, r2
-	ldr	r1, [r3, #2468]
+	ldr	r1, [r3, #2492]
 	mul	r0, lr, r2
 	add	r6, r1, r0
 	str	r4, [r6, #4]
-	.loc 2 1632 0 discriminator 3
 	strh	r5, [r1, r0]	@ movhi
-	.loc 2 1633 0 discriminator 3
-	ldr	r1, [r3, #2468]
+	ldr	r1, [r3, #2492]
 	add	r1, r1, r0
-	ldrh	r0, [r3, #86]
+	ldrh	r0, [r3, #110]
 	mul	r2, r2, r0
-	ldr	r0, [r3, #3856]
+	ldr	r0, [r3, #3896]
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #8]
 	mov	r2, ip
-	b	.L938
-.L941:
+	b	.L945
+.L948:
 	.align	2
-.L940:
+.L947:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3864
+	.word	.LANCHOR0+3904
 	.word	-3902
-.LFE227:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
 	.global	FtlLoadMapInfo
@@ -9970,31 +6528,20 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB228:
-	.loc 2 1648 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI281:
 	push	{fp, ip, lr, pc}
-.LCFI282:
 	sub	fp, ip, #4
-.LCFI283:
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL770:
-	.loc 2 1651 0
-	ldr	r0, .L943
+	ldr	r0, .L950
 	bl	FtlMapTblRecovery
-.LVL771:
-	.loc 2 1654 0
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L944:
+.L951:
 	.align	2
-.L943:
-	.word	.LANCHOR0+3864
-.LFE228:
+.L950:
+	.word	.LANCHOR0+3904
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
 	.global	FtlVariablesInit
@@ -10003,98 +6550,52 @@ FtlLoadMapInfo:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB157:
-	.loc 3 493 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI284:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI285:
 	sub	fp, ip, #4
-.LCFI286:
-	.loc 3 496 0
-	ldr	r4, .L946
-	.loc 3 497 0
+	ldr	r4, .L953
 	mvn	r3, #0
-	.loc 3 496 0
+	movw	r2, #3992
 	mov	r5, #0
-	.loc 3 502 0
+	strh	r3, [r4, r2]	@ movhi
 	mov	r1, r5
-	.loc 3 497 0
-	add	r2, r4, #3952
-	.loc 3 502 0
-	ldr	r0, [r4, #124]
-	.loc 3 497 0
-	strh	r3, [r2]	@ movhi
-	.loc 3 502 0
-	ldrh	r2, [r4, #96]
-	.loc 3 500 0
-	str	r3, [r4, #3964]
-	.loc 3 496 0
-	str	r5, [r4, #3948]
-	.loc 3 498 0
-	str	r5, [r4, #3956]
-	.loc 3 502 0
+	ldrh	r2, [r4, #120]
+	ldr	r0, [r4, #148]
+	str	r3, [r4, #4004]
+	str	r5, [r4, #3988]
 	lsl	r2, r2, #1
-	.loc 3 499 0
-	str	r5, [r4, #3960]
-	.loc 3 501 0
-	strh	r5, [r4, #120]	@ movhi
-	.loc 3 502 0
+	str	r5, [r4, #3996]
+	str	r5, [r4, #4000]
+	strh	r5, [r4, #144]	@ movhi
 	bl	ftl_memset
-.LVL772:
-	.loc 3 503 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #2304]
+	ldr	r0, [r4, #2328]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL773:
-	.loc 3 504 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #3816]
+	ldr	r0, [r4, #3856]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL774:
-.LBB431:
-.LBB432:
-.LBB433:
-	.loc 1 202 0
-	add	r0, r4, #2240
+	add	r0, r4, #2256
 	mov	r1, #48
-	add	r0, r0, #4
+	add	r0, r0, #12
 	bl	__memzero
-.LVL775:
-.LBE433:
-.LBE432:
-.LBE431:
-.LBB434:
-.LBB435:
-.LBB436:
-	add	r0, r4, #2608
+	add	r0, r4, #2624
 	mov	r1, #512
-	add	r0, r0, #4
+	add	r0, r0, #12
 	bl	__memzero
-.LVL776:
-.LBE436:
-.LBE435:
-.LBE434:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL777:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL778:
-	.loc 3 510 0
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L947:
+.L954:
 	.align	2
-.L946:
+.L953:
 	.word	.LANCHOR0
-.LFE157:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	2
 	.global	SupperBlkListInit
@@ -10103,189 +6604,122 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB235:
-	.loc 2 2116 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI287:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI288:
 	sub	fp, ip, #4
-.LCFI289:
 	sub	sp, sp, #16
-	.loc 2 2121 0
 	mov	r5, #0
-	.loc 2 2120 0
-	ldr	r4, .L959
+	ldr	r4, .L966
 	mov	r1, #0
-	.loc 2 2126 0
 	mov	r8, r5
-.LVL779:
 	mov	r7, r5
-.LVL780:
-	.loc 2 2120 0
-	ldrh	r2, [r4, #18]
-	ldr	r0, [r4, #2292]
+	ldrh	r2, [r4, #42]
+	ldr	r0, [r4, #2316]
 	lsl	r2, r2, #3
 	bl	ftl_memset
-.LVL781:
-	.loc 2 2124 0
-	movw	r3, #2312
-	.loc 2 2121 0
-	str	r5, [r4, #2316]
-	.loc 2 2124 0
-	strh	r5, [r4, r3]	@ movhi
-	.loc 2 2125 0
-	add	r3, r4, #2320
-	.loc 2 2122 0
-	str	r5, [r4, #2296]
-	.loc 2 2123 0
-	str	r5, [r4, #2308]
-	.loc 2 2125 0
+	add	r3, r4, #2336
+	movw	r2, #2344
+	str	r5, [r4, #2340]
+	str	r5, [r4, #2320]
+	str	r5, [r4, #2332]
 	strh	r5, [r3]	@ movhi
+	strh	r5, [r4, r2]	@ movhi
 	str	r3, [fp, #-48]
-.LVL782:
-.L949:
-	.loc 2 2128 0 discriminator 1
-	ldrh	r3, [r4, #16]
+.L956:
+	ldrh	r3, [r4, #40]
 	uxth	r10, r5
 	cmp	r10, r3
-	bcs	.L955
-	.loc 2 2133 0
-	ldrh	r3, [r4, #78]
+	bcs	.L962
+	ldrh	r3, [r4, #102]
 	mov	r9, r10
-	.loc 2 2130 0
-	ldrh	ip, [r4, #8]
-	.loc 2 2133 0
+	ldrh	ip, [r4, #32]
 	str	r3, [fp, #-44]
 	mov	r3, #0
 	mov	r6, r3
-	b	.L956
-.L951:
-	.loc 2 2131 0
-	ldr	r2, .L959+4
+	b	.L963
+.L958:
+	ldr	r2, .L966+4
 	mov	r1, r9
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL783:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL784:
 	cmp	r0, #0
 	ldr	r3, [fp, #-52]
-	.loc 2 2133 0
 	ldreq	r2, [fp, #-44]
-	.loc 2 2132 0
 	ldr	ip, [fp, #-56]
 	add	r3, r3, #1
-	.loc 2 2133 0
 	addeq	r6, r6, r2
 	uxtheq	r6, r6
-.L956:
-	.loc 2 2130 0 discriminator 1
+.L963:
 	uxth	r1, r3
 	cmp	ip, r1
-	bhi	.L951
-	.loc 2 2135 0
+	bhi	.L958
 	cmp	r6, #0
 	moveq	r0, r6
-	beq	.L952
-	.loc 2 2136 0
+	beq	.L959
 	mov	r1, r6
 	mov	r0, #32768
 	bl	__divsi3
-.LVL785:
-.L952:
-	.loc 2 2137 0
-	ldr	r3, [r4, #2292]
+.L959:
+	ldr	r3, [r4, #2316]
 	add	r3, r3, r9, lsl #3
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2139 0
-	ldr	r3, .L959+8
+	ldr	r3, .L966+8
 	ldrh	r1, [r3]
 	cmp	r1, r10
-	beq	.L953
-	.loc 2 2139 0 is_stmt 0 discriminator 1
+	beq	.L960
 	ldrh	r1, [r3, #48]
 	cmp	r1, r10
-	beq	.L953
-	.loc 2 2140 0 is_stmt 1
+	beq	.L960
 	ldrh	r3, [r3, #96]
 	cmp	r3, r10
-	beq	.L953
-	.loc 2 2143 0
-	ldr	r2, [r4, #2300]
+	beq	.L960
+	ldr	r2, [r4, #2324]
 	lsl	r3, r9, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L954
-	.loc 2 2144 0
+	bne	.L961
 	add	r8, r8, #1
-.LVL786:
-	.loc 2 2145 0
 	mov	r0, r9
-	.loc 2 2144 0
 	uxth	r8, r8
-.LVL787:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL788:
-.L953:
+.L960:
 	add	r5, r5, #1
-	b	.L949
-.L954:
-	.loc 2 2147 0
+	b	.L956
+.L961:
 	add	r7, r7, #1
-.LVL789:
-	.loc 2 2148 0
 	mov	r0, r9
-	.loc 2 2147 0
 	uxth	r7, r7
-.LVL790:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL791:
-	b	.L953
-.L955:
-	.loc 2 2152 0
-	movw	r2, #2312
-	strh	r7, [r4, r2]	@ movhi
-	.loc 2 2154 0
-	add	r7, r7, r8
-.LVL792:
-	.loc 2 2153 0
+	b	.L960
+.L962:
 	ldr	r2, [fp, #-48]
-	.loc 2 2154 0
+	strh	r7, [r2]	@ movhi
+	add	r7, r7, r8
 	cmp	r7, r3
-	.loc 2 2153 0
-	strh	r8, [r2]	@ movhi
-	.loc 2 2154 0
-	ble	.L957
-	.loc 2 2154 0 is_stmt 0 discriminator 1
+	movw	r2, #2344
+	strh	r8, [r4, r2]	@ movhi
+	ble	.L964
 	movw	r2, #2154
-	ldr	r1, .L959+12
-	ldr	r0, .L959+16
+	ldr	r1, .L966+12
+	ldr	r0, .L966+16
 	bl	printk
-.LVL793:
-.L957:
-	.loc 2 2156 0 is_stmt 1
+.L964:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI290:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL794:
-.L960:
+.L967:
 	.align	2
-.L959:
+.L966:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+36
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+60
+	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+342
 	.word	.LC1
-.LFE235:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.align	2
 	.global	FtlGcPageVarInit
@@ -10294,52 +6728,34 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB259:
-	.loc 5 202 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI291:
 	push	{r4, fp, ip, lr, pc}
-.LCFI292:
 	sub	fp, ip, #4
-.LCFI293:
-	.loc 5 203 0
-	ldr	r4, .L962
+	ldr	r4, .L969
 	mov	r3, #0
-	.loc 5 205 0
+	movw	r2, #3192
 	mov	r1, #255
-	.loc 5 203 0
-	add	r2, r4, #3168
-	.loc 5 205 0
-	ldr	r0, [r4, #3164]
-	.loc 5 203 0
-	strh	r3, [r2]	@ movhi
-	.loc 5 204 0
-	movw	r2, #3176
 	strh	r3, [r4, r2]	@ movhi
-	.loc 5 205 0
-	ldrh	r2, [r4, #82]
+	add	r2, r4, #3200
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4, #106]
+	ldr	r0, [r4, #3188]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL795:
-	.loc 5 206 0
-	ldrh	r3, [r4, #82]
+	ldrh	r3, [r4, #106]
 	mov	r2, #12
 	mov	r1, #255
-	ldr	r0, [r4, #3172]
+	ldr	r0, [r4, #3196]
 	mul	r2, r2, r3
 	bl	ftl_memset
-.LVL796:
-	.loc 5 207 0
 	bl	FtlGcBufInit
-.LVL797:
 	ldmfd	sp, {r4, fp, sp, pc}
-.L963:
+.L970:
 	.align	2
-.L962:
+.L969:
 	.word	.LANCHOR0
-.LFE259:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	2
 	.global	FtlGcScanTempBlk
@@ -10348,144 +6764,89 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB260:
-	.loc 5 211 0
 	@ args = 0, pretend = 0, frame = 20
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL798:
 	mov	ip, sp
-.LCFI294:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI295:
 	sub	fp, ip, #4
-.LCFI296:
 	sub	sp, sp, #20
-	.loc 5 211 0
 	mov	r6, r0
-	.loc 5 220 0
-	ldr	r3, .L987
-	.loc 5 211 0
+	ldr	r3, .L994
 	mov	r10, r1
-	.loc 5 220 0
 	ldrh	r4, [r3, #4]
-.LVL799:
-	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L981
-	.loc 5 223 0
+	beq	.L988
 	cmp	r4, #0
-	bne	.L965
-.L966:
-	.loc 5 224 0
+	bne	.L972
+.L973:
 	bl	FtlGcPageVarInit
-.LVL800:
-	b	.L967
-.LVL801:
-.L981:
-	.loc 5 222 0
+	b	.L974
+.L988:
 	mov	r4, #0
-.L965:
-	.loc 5 223 0 discriminator 1
-	ldr	r3, .L987+4
-	ldrh	r3, [r3, #78]
+.L972:
+	ldr	r3, .L994+4
+	ldrh	r3, [r3, #102]
 	cmp	r3, r10
-	beq	.L966
-.L967:
-	.loc 5 231 0
-	ldr	r5, .L987+4
-	.loc 5 222 0
+	beq	.L973
+.L974:
+	ldr	r5, .L994+4
 	mov	r8, #0
-.LVL802:
-.L975:
-	.loc 5 228 0
+.L982:
 	ldrh	r2, [r6]
 	movw	r3, #65535
-	.loc 5 226 0
 	mov	r0, #0
 	strb	r0, [r6, #8]
-	.loc 5 228 0
 	cmp	r2, r3
-	beq	.L968
-.L978:
-	.loc 5 231 0
-	ldrh	r3, [r5, #8]
+	beq	.L975
+.L985:
+	ldrh	r3, [r5, #32]
 	mov	r2, #0
-	.loc 5 234 0
-	ldr	r0, [r5, #3792]
+	ldr	r0, [r5, #3832]
 	add	ip, r6, #16
-	.loc 5 230 0
 	mov	r7, r2
-	.loc 5 233 0
 	movw	r9, #65535
-	.loc 5 231 0
 	str	r3, [fp, #-44]
-	.loc 5 235 0
-	ldr	r3, [r5, #3148]
+	ldr	r3, [r5, #3172]
 	str	r3, [fp, #-48]
-	ldrh	r3, [r5, #86]
+	ldrh	r3, [r5, #110]
 	str	r3, [fp, #-52]
-	.loc 5 236 0
-	ldr	r3, [r5, #3152]
+	ldr	r3, [r5, #3176]
 	str	r3, [fp, #-56]
-	ldrh	r3, [r5, #88]
+	ldrh	r3, [r5, #112]
 	str	r3, [fp, #-60]
-.LVL803:
-.L969:
-	.loc 5 231 0 discriminator 1
+.L976:
 	ldr	r1, [fp, #-44]
 	uxth	r3, r2
-.LVL804:
 	cmp	r1, r3
-	bhi	.L971
-	.loc 5 241 0
+	bhi	.L978
 	mov	r9, #0
-	.loc 5 240 0
 	mov	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.LVL805:
-.L972:
-	.loc 5 241 0 discriminator 1
+.L979:
 	uxth	r3, r9
 	cmp	r7, r3
-	bhi	.L976
-	.loc 5 266 0
+	bhi	.L983
 	add	r8, r8, #1
-	.loc 5 264 0
 	add	r4, r4, #1
-.LVL806:
-	.loc 5 268 0
 	cmp	r10, r8
-	.loc 5 264 0
 	uxth	r4, r4
-.LVL807:
-	.loc 5 268 0
-	bls	.L977
-.L979:
-	.loc 5 274 0
-	ldrh	r3, [r5, #78]
+	bls	.L984
+.L986:
+	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L978
-	.loc 5 265 0
+	bhi	.L985
 	mov	r0, #0
-.LVL808:
-	b	.L968
-.LVL809:
-.L971:
-	.loc 5 232 0
+	b	.L975
+.L978:
 	ldrh	r3, [ip], #2
-.LVL810:
-	.loc 5 233 0
 	cmp	r3, r9
-	beq	.L970
-	.loc 5 234 0
+	beq	.L977
 	mov	r1, #20
 	orr	r3, r4, r3, lsl #10
-.LVL811:
 	mla	r1, r1, r7, r0
 	str	r3, [r1, #4]
-	.loc 5 235 0
 	ldr	r3, [fp, #-52]
 	mul	r3, r3, r7
 	add	lr, r3, #3
@@ -10495,15 +6856,10 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #8]
-	.loc 5 236 0
 	ldr	r3, [fp, #-60]
 	mul	r3, r3, r7
-	.loc 5 237 0
 	add	r7, r7, #1
-.LVL812:
 	uxth	r7, r7
-.LVL813:
-	.loc 5 236 0
 	add	lr, r3, #3
 	cmp	r3, #0
 	movlt	r3, lr
@@ -10511,129 +6867,84 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.LVL814:
-.L970:
+.L977:
 	add	r2, r2, #1
-	b	.L969
-.LVL815:
-.L976:
-	.loc 5 242 0
+	b	.L976
+.L983:
 	mov	r3, #20
-	ldr	r2, [r5, #3792]
+	ldr	r2, [r5, #3832]
 	mul	r3, r3, r9
 	str	r2, [fp, #-52]
 	add	ip, r2, r3
 	str	r3, [fp, #-56]
 	ldr	r1, [ip, #4]
-.LVL816:
 	str	ip, [fp, #-48]
-	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [fp, #-44]
 	bl	P2V_plane
-.LVL817:
-	.loc 5 245 0
 	ldr	r2, [fp, #-52]
 	ldr	r3, [fp, #-56]
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L973
-	.loc 5 247 0
+	bne	.L980
 	ldr	ip, [fp, #-48]
-	.loc 5 248 0
 	movw	r2, #65535
 	add	r9, r9, #1
 	ldr	r1, [fp, #-44]
-.LVL818:
-	.loc 5 247 0
 	ldr	r3, [ip, #12]
-.LVL819:
-	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L974
-	.loc 5 249 0
+	bne	.L981
 	mov	r3, #1
-.LVL820:
-	str	r3, [r5, #3960]
-.LVL821:
-.L968:
-	.loc 5 281 0
-	ldr	r3, .L987
+	str	r3, [r5, #4000]
+.L975:
+	ldr	r3, .L994
 	mvn	r2, #0
-	.loc 5 283 0
 	strb	r0, [r6, #6]
-	.loc 5 284 0
 	mov	r1, r4
-.LVL822:
-	.loc 5 282 0
 	strh	r4, [r6, #2]	@ movhi
-	.loc 5 281 0
 	strh	r2, [r3, #4]	@ movhi
-	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r6
-.LVL823:
 	bl	ftl_sb_update_avl_pages
-.LVL824:
-	.loc 5 285 0
-	b	.L980
-.LVL825:
-.L974:
-	.loc 5 252 0
+	b	.L987
+.L981:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL826:
-	b	.L972
-.L973:
-	.loc 5 256 0
+	b	.L979
+.L980:
 	ldrh	r3, [r6]
 	mov	r4, #0
-.LVL827:
-	ldr	r2, [r5, #2300]
+	ldr	r2, [r5, #2324]
 	lsl	r3, r3, #1
 	strh	r4, [r2, r3]	@ movhi
-	.loc 5 257 0
 	ldrh	r0, [r6]
 	bl	INSERT_FREE_LIST
-.LVL828:
-	.loc 5 258 0
 	mvn	r3, #0
 	strh	r3, [r6]	@ movhi
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL829:
-	.loc 5 261 0
-	b	.L975
-.LVL830:
-.L977:
-	.loc 5 268 0 discriminator 1
-	ldr	r2, .L987
+	b	.L982
+.L984:
+	ldr	r2, .L994
 	movw	r1, #65535
 	ldrh	r3, [r2, #4]
 	cmp	r3, r1
-	beq	.L979
-	.loc 5 269 0
+	beq	.L986
 	add	r3, r3, r8
 	strh	r3, [r2, #4]	@ movhi
-	.loc 5 270 0
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L979
-.L980:
-	.loc 5 286 0
+	bls	.L986
+.L987:
 	mvn	r0, #0
 	sub	sp, fp, #40
-.LCFI297:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL831:
-.L988:
+.L995:
 	.align	2
-.L987:
+.L994:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
-.LFE260:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.align	2
 	.global	ftl_memcpy
@@ -10642,23 +6953,13 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB278:
-	.loc 1 206 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL832:
 	mov	ip, sp
-.LCFI298:
 	push	{fp, ip, lr, pc}
-.LCFI299:
 	sub	fp, ip, #4
-.LCFI300:
-	.loc 1 207 0
 	bl	memcpy
-.LVL833:
-	.loc 1 208 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE278:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.align	2
 	.global	FtlBbmTblFlush
@@ -10667,253 +6968,144 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB176:
-	.loc 4 80 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI301:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI302:
 	sub	fp, ip, #4
-.LCFI303:
 	sub	sp, sp, #4
-	.loc 4 91 0
 	mov	r5, #0
-.LVL834:
-	.loc 4 87 0
-	ldr	r4, .L999
-	.loc 4 89 0
+	ldr	r4, .L1006
 	mov	r1, #0
-	.loc 4 92 0
-	ldr	r7, .L999+4
-	.loc 4 87 0
-	ldr	r0, [r4, #3240]
-	add	r6, r4, #152
-	.loc 4 88 0
-	ldr	r3, [r4, #3244]
-	.loc 4 89 0
-	ldrh	r2, [r4, #86]
-	.loc 4 87 0
-	str	r0, [r4, #3228]
-	.loc 4 88 0
-	str	r3, [r4, #3232]
-	.loc 4 89 0
+	ldr	r7, .L1006+4
+	ldr	r0, [r4, #3280]
+	add	r6, r4, #176
+	ldr	r3, [r4, #3284]
+	ldrh	r2, [r4, #110]
+	str	r0, [r4, #3268]
+	str	r3, [r4, #3272]
 	bl	ftl_memset
-.LVL835:
-.L991:
-	.loc 4 91 0 discriminator 1
-	ldrh	r3, [r4, #30]
+.L998:
+	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L992
-	.loc 4 94 0
-	ldr	r6, [r4, #3232]
-.LVL836:
-.LBB442:
-.LBB443:
-.LBB444:
-	.loc 1 202 0
+	blt	.L999
+	ldr	r6, [r4, #3272]
 	mov	r2, #16
 	mov	r1, #255
-.LBE444:
-.LBE443:
-.LBE442:
-	.loc 4 108 0
-	ldr	r9, .L999+8
-	.loc 4 109 0
-	ldr	r8, .L999+12
-	.loc 4 84 0
+	ldr	r9, .L1006+8
+	ldr	r8, .L1006+12
 	mov	r5, #0
-.LVL837:
-.LBB449:
-.LBB447:
-.LBB445:
-	.loc 1 202 0
 	mov	r0, r6
-.LBE445:
-.LBE447:
-.LBE449:
-	.loc 4 82 0
 	mov	r7, r5
-.LVL838:
-.LBB450:
-.LBB448:
-.LBB446:
-	.loc 1 202 0
 	bl	memset
-.LVL839:
-.LBE446:
-.LBE448:
-.LBE450:
-	.loc 4 97 0
-	ldr	r3, .L999+16
+	ldr	r3, .L1006+16
 	strh	r3, [r6]	@ movhi
-	.loc 4 98 0
-	ldr	r3, [r4, #136]
+	ldr	r3, [r4, #160]
 	str	r3, [r6, #4]
-	.loc 4 99 0
-	ldrh	r3, [r4, #128]
+	ldrh	r3, [r4, #152]
 	strh	r3, [r6, #2]	@ movhi
-	.loc 4 100 0
-	ldrh	r3, [r4, #132]
+	ldrh	r3, [r4, #156]
 	strh	r3, [r6, #8]	@ movhi
-	.loc 4 101 0
-	ldrh	r3, [r4, #134]
+	ldrh	r3, [r4, #158]
 	strh	r3, [r6, #10]	@ movhi
-	.loc 4 102 0
-	ldr	r3, [r4, #4]
+	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L993:
-	.loc 4 104 0
-	ldr	r3, [r4, #3240]
-	.loc 4 106 0
+.L1000:
+	ldr	r3, [r4, #3280]
 	mov	r10, #0
-	.loc 4 107 0
-	ldrh	r1, [r4, #128]
-	ldrh	r2, [r4, #130]
-	.loc 4 104 0
-	str	r3, [r4, #3228]
-	.loc 4 105 0
-	ldr	r3, [r4, #3244]
-	.loc 4 106 0
-	str	r10, [r4, #3220]
-	.loc 4 105 0
-	str	r3, [r4, #3232]
-	.loc 4 107 0
+	ldrh	r1, [r4, #152]
+	ldrh	r2, [r4, #154]
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r10, [r4, #3260]
+	str	r3, [r4, #3272]
 	orr	r3, r2, r1, lsl #10
-	.loc 4 108 0
 	ldrh	r0, [r6, #10]
-	.loc 4 107 0
-	str	r3, [r4, #3224]
-	.loc 4 108 0
-	ldrh	r3, [r4, #132]
+	str	r3, [r4, #3264]
+	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	printk
-.LVL840:
-	.loc 4 109 0
 	mov	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL841:
-	.loc 4 110 0
-	ldrh	r3, [r4, #80]
-	ldrh	r2, [r4, #130]
+	ldrh	r3, [r4, #104]
+	ldrh	r2, [r4, #154]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L994
-	.loc 4 113 0
-	ldr	r3, [r4, #136]
-	.loc 4 115 0
-	ldrh	r2, [r4, #128]
-	.loc 4 121 0
-	ldr	r0, [r4, #3760]
-	.loc 4 113 0
+	blt	.L1001
+	ldr	r3, [r4, #160]
+	ldrh	r2, [r4, #152]
+	ldr	r0, [r4, #3800]
 	add	r3, r3, #1
-	.loc 4 117 0
-	strh	r10, [r4, #130]	@ movhi
-	.loc 4 113 0
-	str	r3, [r4, #136]
-	.loc 4 114 0
+	strh	r10, [r4, #154]	@ movhi
+	str	r3, [r4, #160]
 	str	r3, [r6, #4]
-	.loc 4 116 0
-	ldrh	r3, [r4, #132]
-	.loc 4 115 0
+	ldrh	r3, [r4, #156]
 	strh	r2, [r6, #8]	@ movhi
-	.loc 4 118 0
-	strh	r2, [r4, #132]	@ movhi
-	.loc 4 122 0
+	strh	r2, [r4, #156]	@ movhi
 	mov	r2, #1
-	.loc 4 116 0
-	strh	r3, [r4, #128]	@ movhi
-	.loc 4 122 0
+	strh	r3, [r4, #152]	@ movhi
 	mov	r1, r2
-	.loc 4 119 0
 	lsl	r3, r3, #10
-	str	r3, [r4, #3224]
-	.loc 4 121 0
+	str	r3, [r4, #3264]
 	str	r3, [r0, #4]
-	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL842:
-	.loc 4 123 0
 	mov	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL843:
-.L994:
-	.loc 4 126 0
-	ldrh	r3, [r4, #130]
+.L1001:
+	ldrh	r3, [r4, #154]
 	add	r3, r3, #1
-	strh	r3, [r4, #130]	@ movhi
-	.loc 4 127 0
-	ldr	r3, [r4, #3220]
+	strh	r3, [r4, #154]	@ movhi
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	bne	.L995
-	.loc 4 130 0
+	bne	.L1002
 	add	r5, r5, #1
-.LVL844:
-	.loc 4 129 0
-	ldr	r1, [r4, #3224]
-	.loc 4 130 0
+	ldr	r1, [r4, #3264]
 	uxth	r5, r5
-.LVL845:
-	.loc 4 129 0
-	ldr	r0, .L999+20
+	ldr	r0, .L1006+20
 	bl	printk
-.LVL846:
-	.loc 4 131 0
 	cmp	r5, #3
-	bls	.L993
-	.loc 4 132 0
+	bls	.L1000
 	mov	r2, r5
-	ldr	r1, [r4, #3224]
-	ldr	r0, .L999+24
+	ldr	r1, [r4, #3264]
+	ldr	r0, .L1006+24
 	bl	printk
-.LVL847:
-.L997:
-	b	.L997
-.LVL848:
-.L992:
-	.loc 4 92 0 discriminator 3
+.L1004:
+	b	.L1004
+.L999:
 	ldrh	r2, [r7]
-	ldr	r3, [r4, #3228]
+	ldr	r3, [r4, #3268]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
 	lsl	r2, r2, #2
-	.loc 4 91 0 discriminator 3
 	add	r5, r5, #1
-	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL849:
-	b	.L991
-.LVL850:
-.L998:
+	b	.L998
+.L1005:
 	mov	r7, #1
-	b	.L993
-.L995:
-	.loc 4 139 0
+	b	.L1000
+.L1002:
 	cmp	r7, #0
-	beq	.L998
-	.loc 4 146 0
+	beq	.L1005
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1000:
+.L1007:
 	.align	2
-.L999:
+.L1006:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3860
-	.word	.LC93
-	.word	.LANCHOR0+3220
-	.word	-3887
+	.word	.LANCHOR0+3900
 	.word	.LC94
+	.word	.LANCHOR0+3260
+	.word	-3887
 	.word	.LC95
-.LFE176:
+	.word	.LC96
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	2
 	.global	allocate_data_superblock
@@ -10922,444 +7114,294 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB248:
-	.loc 2 2579 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL851:
 	mov	ip, sp
-.LCFI304:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI305:
 	sub	fp, ip, #4
-.LCFI306:
 	sub	sp, sp, #16
-	.loc 2 2579 0
 	mov	r5, r0
-	.loc 2 2585 0
-	ldr	r4, .L1036
-	add	r8, r4, #2320
-.LVL852:
-.L1002:
-	ldr	r7, .L1036+4
-.LVL853:
-	ldrh	r3, [r8]
-	ldrh	r2, [r7]
+	ldr	r4, .L1043
+	add	r9, r4, #2336
+.L1009:
+	ldr	r7, .L1043+4
+	ldrh	r2, [r9]
+	ldrh	r3, [r7]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1003
-	.loc 2 2585 0 is_stmt 0 discriminator 1
+	ble	.L1010
 	movw	r2, #2585
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL854:
-.L1003:
-	.loc 2 2587 0 is_stmt 1
-	ldr	r3, .L1036+16
+.L1010:
+	ldr	r3, .L1043+16
 	cmp	r5, r3
 	movne	r1, #0
-.LVL855:
-	bne	.L1004
-	.loc 2 2588 0
-	ldrh	r3, [r8]
-	ldr	r1, [r4, #3136]
-.LVL856:
+	bne	.L1011
+	ldrh	r3, [r7]
+	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
 	lsr	r1, r3, #1
 	add	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL857:
-	.loc 2 2592 0
 	cmp	r1, #0
-	.loc 2 2593 0
 	subne	r1, r1, #1
-.LVL858:
 	uxthne	r1, r1
-.LVL859:
-.L1004:
-	.loc 2 2594 0
-	ldr	r0, .L1036+20
+.L1011:
+	ldr	r0, .L1043+20
 	bl	List_pop_index_node
-.LVL860:
-	ldrh	r3, [r8]
+	ldrh	r3, [r7]
 	mov	r6, r0
-	uxth	r9, r0
+	uxth	r8, r0
 	cmp	r3, #0
-	bne	.L1005
-	.loc 2 2594 0 is_stmt 0 discriminator 1
+	bne	.L1012
 	movw	r2, #2594
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL861:
-.L1005:
-	.loc 2 2594 0 discriminator 3
-	ldrh	r3, [r8]
-	.loc 2 2598 0 is_stmt 1 discriminator 3
+.L1012:
+	ldrh	r3, [r7]
 	mov	r0, r5
-	.loc 2 2594 0 discriminator 3
 	sub	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 2 2597 0 discriminator 3
-	strh	r9, [r5]	@ movhi
-	.loc 2 2598 0 discriminator 3
+	strh	r3, [r7]	@ movhi
+	strh	r8, [r5]	@ movhi
 	bl	make_superblock
-.LVL862:
-	.loc 2 2599 0 discriminator 3
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1006
+	bne	.L1013
 	uxth	r0, r6
-	.loc 2 2603 0
-	ldr	r2, [r4, #2300]
+	ldr	r2, [r4, #2324]
 	mvn	r1, #0
 	lsl	r3, r0, #1
 	strh	r1, [r2, r3]	@ movhi
-	.loc 2 2604 0
 	bl	INSERT_DATA_LIST
-.LVL863:
-	.loc 2 2605 0
-	ldrh	r2, [r7]
-	ldrh	r3, [r8]
+	ldrh	r2, [r9]
+	ldrh	r3, [r7]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1002
-	.loc 2 2605 0 is_stmt 0 discriminator 1
+	ble	.L1009
 	movw	r2, #2605
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL864:
-	b	.L1002
-.L1006:
-	.loc 2 2608 0 is_stmt 1
-	ldrh	r2, [r7]
-	ldrh	r3, [r8]
+	b	.L1009
+.L1013:
+	ldrh	r2, [r9]
+	ldrh	r3, [r7]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1008
-	.loc 2 2608 0 is_stmt 0 discriminator 1
+	ble	.L1015
 	mov	r2, #2608
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL865:
-.L1008:
-	.loc 2 2612 0 is_stmt 1 discriminator 1
-	ldr	r0, [r4, #3760]
+.L1015:
+	ldr	r0, [r4, #3800]
 	mov	r2, #20
-	ldrh	r1, [r4, #8]
+	ldrh	r1, [r4, #32]
 	mov	r7, #0
-.LVL866:
 	add	ip, r5, #16
 	mov	lr, r7
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [fp, #-44]
-.L1009:
-	.loc 2 2611 0 discriminator 1
+.L1016:
 	ldr	r1, [fp, #-44]
 	cmp	r1, r3
-	bne	.L1011
-	.loc 2 2619 0
+	bne	.L1018
 	cmp	r7, #0
-	bne	.L1012
-	.loc 2 2619 0 is_stmt 0 discriminator 1
+	bne	.L1019
 	movw	r2, #2619
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL867:
-.L1012:
-	.loc 2 2621 0 is_stmt 1
-	ldr	r3, .L1036+24
+.L1019:
+	ldr	r3, .L1043+24
 	ldrh	r3, [r3]
-	cmp	r3, r9
-	bne	.L1013
-	.loc 2 2621 0 is_stmt 0 discriminator 1
+	cmp	r3, r8
+	bne	.L1020
 	movw	r2, #2621
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL868:
-.L1013:
-	.loc 2 2622 0 is_stmt 1
+.L1020:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	cmp	r3, #0
-	bne	.L1014
-	.loc 2 2623 0
-	ldr	r1, [r4, #2304]
+	bne	.L1021
+	ldr	r1, [r4, #2328]
 	lsl	r2, r6, #1
 	ldrh	r3, [r1, r2]
 	cmp	r3, #0
-	.loc 2 2624 0
-	ldrhne	r0, [r4, #68]
-	.loc 2 2626 0
+	ldrhne	r0, [r4, #92]
 	moveq	r3, #2
-	.loc 2 2624 0
 	addne	r3, r3, r0
-	.loc 2 2628 0
 	mov	r0, r6
-	.loc 2 2626 0
 	strh	r3, [r1, r2]	@ movhi
-	.loc 2 2628 0
 	mov	r1, #0
-	.loc 2 2627 0
-	ldr	r3, [r4, #2524]
+	ldr	r3, [r4, #2548]
 	add	r3, r3, #1
-	str	r3, [r4, #2524]
-	.loc 2 2628 0
+	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.LVL869:
-.L1017:
-	.loc 2 2635 0
-	ldr	r3, [r4, #2304]
+.L1024:
+	ldr	r3, [r4, #2328]
 	lsl	r10, r6, #1
-	ldr	r2, [r4, #2540]
-	.loc 2 2638 0
-	ldr	r0, [r4, #2524]
-	.loc 2 2635 0
+	ldr	r2, [r4, #2564]
+	ldr	r0, [r4, #2548]
 	ldrh	r3, [r3, r10]
-	.loc 2 2638 0
-	ldrh	r1, [r4, #16]
-	.loc 2 2635 0
+	ldrh	r1, [r4, #40]
 	cmp	r3, r2
-	.loc 2 2638 0
-	ldrh	r2, [r4, #68]
-	.loc 2 2636 0
-	strhi	r3, [r4, #2540]
-	.loc 2 2638 0
-	ldr	r3, [r4, #2528]
+	ldrh	r2, [r4, #92]
+	strhi	r3, [r4, #2564]
+	ldr	r3, [r4, #2552]
 	mla	r0, r0, r2, r3
 	bl	__udivsi3
-.LVL870:
-	.loc 2 2639 0
-	ldr	r2, [r4, #3820]
-	.loc 2 2642 0
-	ldr	r1, [r4, #3760]
-	.loc 2 2638 0
-	str	r0, [r4, #2532]
-	.loc 2 2639 0
+	ldr	r2, [r4, #3860]
+	ldr	r1, [r4, #3800]
+	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	.loc 2 2642 0
-	ldr	r0, .L1036+28
-	.loc 2 2639 0
+	ldr	r0, .L1043+28
 	add	r3, r3, #1
 	str	r3, [r2, #16]
 	mov	r2, #20
 	mla	r2, r2, r7, r1
 	add	r3, r1, #4
 	add	r2, r2, #24
-.L1019:
+.L1026:
 	add	r3, r3, #20
-	.loc 2 2641 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1020
-	.loc 2 2643 0
+	bne	.L1027
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	bl	FlashEraseBlocks
-.LVL871:
-	.loc 2 2645 0
 	mov	r3, #0
-	.loc 2 2646 0
 	mov	ip, #20
-	.loc 2 2644 0
 	mov	r1, r3
-.LVL872:
-.L1021:
-	.loc 2 2645 0 discriminator 1
+.L1028:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L1023
-	.loc 2 2656 0
+	bhi	.L1030
 	cmp	r1, #0
-	ble	.L1024
-	.loc 2 2657 0
+	ble	.L1031
 	mov	r0, r6
 	bl	update_multiplier_value
-.LVL873:
-	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL874:
-.L1024:
-	.loc 2 2661 0
+.L1031:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1025
-	.loc 2 2663 0
-	ldr	r3, [r4, #2300]
+	bne	.L1032
+	ldr	r3, [r4, #2324]
 	mvn	r2, #0
-	.loc 2 2664 0
 	mov	r0, r6
-	.loc 2 2663 0
 	strh	r2, [r3, r10]	@ movhi
-	.loc 2 2664 0
 	bl	INSERT_DATA_LIST
-.LVL875:
-	.loc 2 2665 0
-	b	.L1002
-.L1011:
-	.loc 2 2612 0
+	b	.L1009
+.L1018:
 	str	lr, [r3, #8]
-	.loc 2 2614 0
 	movw	r10, #65535
-	.loc 2 2613 0
 	str	lr, [r3, #12]
 	add	r3, r3, #20
-	.loc 2 2614 0
 	ldrh	r1, [ip], #2
 	cmp	r1, r10
-	.loc 2 2615 0
 	mlane	r10, r2, r7, r0
 	lslne	r1, r1, #10
-	.loc 2 2616 0
 	addne	r7, r7, #1
-.LVL876:
 	uxthne	r7, r7
-.LVL877:
-	.loc 2 2615 0
 	strne	r1, [r10, #4]
-	b	.L1009
-.L1014:
-	.loc 2 2630 0
-	ldr	r1, [r4, #2304]
+	b	.L1016
+.L1021:
+	ldr	r1, [r4, #2328]
 	lsl	r3, r6, #1
-.LBB451:
-.LBB452:
 	mov	r0, r6
-.LBE452:
-.LBE451:
 	ldrh	r2, [r1, r3]
 	add	r2, r2, #1
 	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2631 0
-	ldr	r3, [r4, #2528]
+	ldr	r3, [r4, #2552]
 	add	r3, r3, #1
-	str	r3, [r4, #2528]
-.LBB454:
-.LBB453:
+	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-.LVL878:
-	b	.L1017
-.L1020:
-.LBE453:
-.LBE454:
-	.loc 2 2642 0 discriminator 3
+	b	.L1024
+.L1027:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1019
-.LVL879:
-.L1023:
-	.loc 2 2646 0
+	b	.L1026
+.L1030:
 	mul	r2, ip, r3
-	ldr	lr, [r4, #3760]
+	ldr	lr, [r4, #3800]
 	add	r0, lr, r2
 	ldr	r2, [lr, r2]
 	cmn	r2, #1
-	bne	.L1022
-	.loc 2 2648 0
+	bne	.L1029
 	ldr	r0, [r0, #4]
-	.loc 2 2647 0
 	add	r1, r1, #1
 	str	ip, [fp, #-56]
 	str	r2, [fp, #-52]
-	.loc 2 2649 0
 	ubfx	r0, r0, #10, #16
 	str	r3, [fp, #-48]
-	.loc 2 2647 0
 	str	r1, [fp, #-44]
-	.loc 2 2649 0
 	bl	FtlBbmMapBadBlock
-.LVL880:
-	.loc 2 2650 0
 	ldr	r3, [fp, #-48]
 	ldr	r2, [fp, #-52]
-	.loc 2 2651 0
 	ldr	ip, [fp, #-56]
 	ldr	r1, [fp, #-44]
-.LVL881:
-	.loc 2 2650 0
 	add	r0, r5, r3, lsl #1
 	strh	r2, [r0, #16]	@ movhi
-	.loc 2 2651 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	sub	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1022:
+.L1029:
 	add	r3, r3, #1
-	b	.L1021
-.L1025:
-	.loc 2 2668 0
-	ldrh	r3, [r4, #78]
-	.loc 2 2669 0
-	strh	r9, [r5]	@ movhi
-	.loc 2 2668 0
+	b	.L1028
+.L1032:
+	ldrh	r3, [r4, #102]
+	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
-	.loc 2 2670 0
 	mov	r2, #0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2671 0
 	strb	r2, [r5, #6]
-	.loc 2 2672 0
-	ldr	r2, [r4, #2516]
-	.loc 2 2668 0
+	ldr	r2, [r4, #2540]
 	uxth	r3, r3
-	.loc 2 2673 0
-	ldr	r1, [r4, #2300]
-.LVL882:
-	.loc 2 2668 0
+	ldr	r1, [r4, #2324]
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 2672 0
 	str	r2, [r5, #12]
 	add	r2, r2, #1
-	str	r2, [r4, #2516]
-	.loc 2 2673 0
+	str	r2, [r4, #2540]
 	ldrh	r2, [r5]
 	lsl	r2, r2, #1
 	strh	r3, [r1, r2]	@ movhi
-	.loc 2 2674 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1026
-	.loc 2 2674 0 is_stmt 0 discriminator 2
+	beq	.L1033
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1027
-.L1026:
-	.loc 2 2674 0 discriminator 3
+	bne	.L1034
+.L1033:
 	movw	r2, #2674
-	ldr	r1, .L1036+8
-	ldr	r0, .L1036+12
+	ldr	r1, .L1043+8
+	ldr	r0, .L1043+12
 	bl	printk
-.LVL883:
-.L1027:
-	.loc 2 2676 0 is_stmt 1
+.L1034:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI307:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL884:
-.L1037:
+.L1044:
 	.align	2
-.L1036:
+.L1043:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2312
+	.word	.LANCHOR0+2344
 	.word	.LANCHOR1+360
 	.word	.LC1
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+2316
-	.word	.LANCHOR0+2564
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+2340
+	.word	.LANCHOR0+2588
 	.word	-1024
-.LFE248:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.align	2
 	.global	FtlGcFreeBadSuperBlk
@@ -11368,131 +7410,83 @@ allocate_data_superblock:
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB267:
-	.loc 5 390 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL885:
 	mov	ip, sp
-.LCFI308:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI309:
 	sub	fp, ip, #4
-.LCFI310:
 	sub	sp, sp, #8
-	.loc 5 390 0
 	uxth	r3, r0
-.LVL886:
-	.loc 5 395 0
-	ldr	r6, .L1050
-	.loc 5 390 0
+	ldr	r6, .L1057
 	str	r3, [fp, #-44]
-	.loc 5 395 0
-	movw	r3, #3182
-.LVL887:
+	movw	r3, #3206
 	ldrh	r3, [r6, r3]
 	cmp	r3, #0
 	movne	r7, #0
-.LBB457:
-.LBB458:
-	.loc 5 398 0
-	ldrne	r10, .L1050+4
-.LBE458:
-.LBE457:
-	.loc 5 395 0
-	bne	.L1040
-.LVL888:
-.L1039:
-	.loc 5 415 0
+	ldrne	r10, .L1057+4
+	bne	.L1047
+.L1046:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI311:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL889:
-.L1046:
-.LCFI312:
-.LBB460:
-.LBB459:
-	.loc 5 397 0
+.L1053:
 	uxtah	r3, r6, r7
 	ldr	r1, [fp, #-44]
 	mov	r8, #0
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL890:
 	mov	r9, r0
-.L1041:
-	.loc 5 398 0
+.L1048:
 	ldrh	r3, [r10]
 	uxth	r4, r8
 	cmp	r3, r4
-	bhi	.L1045
+	bhi	.L1052
 	add	r7, r7, #1
-.L1040:
-	.loc 5 396 0
-	ldrh	r2, [r6, #8]
+.L1047:
+	ldrh	r2, [r6, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1046
-	.loc 5 412 0
+	bhi	.L1053
 	bl	FtlGcReFreshBadBlk
-.LVL891:
-	b	.L1039
-.L1045:
-	.loc 5 399 0
+	b	.L1046
+.L1052:
 	uxth	r3, r8
-	ldr	r5, .L1050+8
+	ldr	r5, .L1057+8
 	lsl	r2, r3, #1
 	ldrh	r2, [r5, r2]
 	cmp	r2, r9
-	bne	.L1042
-	.loc 5 401 0
+	bne	.L1049
 	mov	r1, r9
-	ldr	r0, .L1050+12
+	ldr	r0, .L1057+12
 	str	r3, [fp, #-48]
 	bl	printk
-.LVL892:
-	.loc 5 403 0
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
-.LVL893:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL894:
 	ldr	r3, [fp, #-48]
-	.loc 5 405 0
 	ldrh	r2, [r10]
 	add	r3, r5, r3, lsl #1
-.L1043:
+.L1050:
 	cmp	r4, r2
-	bcc	.L1044
-	.loc 5 407 0
+	bcc	.L1051
 	sub	r2, r2, #1
 	strh	r2, [r10]	@ movhi
-.L1042:
+.L1049:
 	add	r8, r8, #1
-	b	.L1041
-.L1044:
-	.loc 5 406 0
+	b	.L1048
+.L1051:
 	ldrh	r1, [r3, #2]!
-	.loc 5 405 0
 	add	r4, r4, #1
-.LVL895:
 	uxth	r4, r4
-.LVL896:
-	.loc 5 406 0
 	strh	r1, [r3, #-2]	@ movhi
-	b	.L1043
-.L1051:
+	b	.L1050
+.L1058:
 	.align	2
-.L1050:
+.L1057:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3182
-	.word	.LANCHOR0+3184
-	.word	.LC96
-.LBE459:
-.LBE460:
-.LFE267:
+	.word	.LANCHOR0+3206
+	.word	.LANCHOR0+3208
+	.word	.LC97
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -11501,121 +7495,84 @@ FtlGcFreeBadSuperBlk:
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB251:
-	.loc 2 2735 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL897:
 	mov	ip, sp
-.LCFI313:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI314:
 	sub	fp, ip, #4
-.LCFI315:
-	.loc 2 2736 0
-	ldr	r3, .L1062
-	.loc 2 2735 0
+	ldr	r3, .L1069
 	uxth	r4, r0
-.LVL898:
-	.loc 2 2736 0
-	ldr	r1, [r3, #2300]
+	ldr	r1, [r3, #2324]
 	lsl	r2, r4, #1
-	mov	r5, r3
+	mov	r6, r3
 	ldrh	r0, [r1, r2]
 	cmp	r0, #0
-	bne	.L1053
-	.loc 2 2737 0
-	movw	r2, #2564
+	bne	.L1060
+	movw	r2, #2588
 	ldrh	r1, [r3, r2]
 	cmp	r1, r4
-	.loc 2 2739 0
 	mvneq	r3, #0
-	strheq	r3, [r5, r2]	@ movhi
-	.loc 2 2737 0
-	beq	.L1055
-	.loc 2 2740 0
-	movw	r2, #2324
+	strheq	r3, [r6, r2]	@ movhi
+	beq	.L1062
+	movw	r2, #2348
 	ldrh	r2, [r3, r2]
 	cmp	r2, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-	.loc 2 2740 0 is_stmt 0 discriminator 1
-	movw	r2, #2372
+	movw	r2, #2396
 	ldrh	r2, [r3, r2]
 	cmp	r2, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-	.loc 2 2740 0 discriminator 2
-	movw	r2, #2420
+	movw	r2, #2444
 	ldrh	r3, [r3, r2]
 	cmp	r3, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-.L1055:
-.LBB463:
-.LBB464:
-	.loc 2 2744 0 is_stmt 1
+.L1062:
+	ldr	r5, .L1069+4
 	mov	r1, r4
-	ldr	r0, .L1062+4
+	ldr	r0, .L1069+8
 	bl	List_remove_node
-.LVL899:
-	movw	r3, #2312
-	ldrh	r3, [r5, r3]
+	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L1057
+	bne	.L1064
 	movw	r2, #2744
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ldr	r1, .L1069+12
+	ldr	r0, .L1069+16
 	bl	printk
-.LVL900:
-.L1057:
-	movw	r6, #2312
-	.loc 2 2745 0
+.L1064:
+	ldrh	r3, [r5]
 	mov	r0, r4
-	.loc 2 2744 0
-	ldrh	r3, [r5, r6]
 	sub	r3, r3, #1
-	strh	r3, [r5, r6]	@ movhi
-	.loc 2 2745 0
+	strh	r3, [r5]	@ movhi
 	bl	free_data_superblock
-.LVL901:
-	.loc 2 2746 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL902:
-	.loc 2 2747 0
-	ldr	r3, .L1062+16
-	ldrh	r2, [r5, r6]
-	ldrh	r3, [r3]
+	movw	r3, #2344
+	ldrh	r2, [r5]
+	ldrh	r3, [r6, r3]
 	add	r3, r3, r2
-	ldrh	r2, [r5, #16]
+	ldrh	r2, [r6, #40]
 	cmp	r3, r2
-	ble	.L1061
+	ble	.L1068
 	movw	r2, #2747
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ldr	r1, .L1069+12
+	ldr	r0, .L1069+16
 	bl	printk
-.LVL903:
-.L1061:
+.L1068:
 	mov	r0, #1
-.LBE464:
-.LBE463:
-	.loc 2 2753 0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1053:
-	.loc 2 2750 0
+.L1060:
 	mov	r0, r4
 	bl	List_update_data_list
-.LVL904:
-	.loc 2 2752 0
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1063:
+.L1070:
 	.align	2
-.L1062:
+.L1069:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2296
+	.word	.LANCHOR0+2336
+	.word	.LANCHOR0+2320
 	.word	.LANCHOR1+385
 	.word	.LC1
-	.word	.LANCHOR0+2320
-.LFE251:
 	.size	update_vpc_list, .-update_vpc_list
 	.align	2
 	.global	decrement_vpc_count
@@ -11624,115 +7581,80 @@ update_vpc_list:
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB252:
-	.loc 2 2756 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL905:
 	mov	ip, sp
-.LCFI316:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI317:
 	sub	fp, ip, #4
-.LCFI318:
-	.loc 2 2756 0
-	uxth	r5, r0
-.LVL906:
-	.loc 2 2759 0
+	uxth	r6, r0
 	movw	r3, #65535
-	cmp	r5, r3
-	ldr	r6, .L1076
-	beq	.L1065
-	.loc 2 2760 0
-	ldr	r3, [r6, #2300]
-	lsl	r4, r5, #1
-	ldrh	r2, [r3, r4]
+	cmp	r6, r3
+	ldr	r4, .L1083
+	beq	.L1072
+	ldr	r3, [r4, #2324]
+	lsl	r5, r6, #1
+	ldrh	r2, [r3, r5]
 	cmp	r2, #0
-	.loc 2 2765 0
 	subne	r2, r2, #1
-	strhne	r2, [r3, r4]	@ movhi
-	.loc 2 2760 0
-	bne	.L1065
-	.loc 2 2761 0
-	mov	r1, r5
-	ldr	r0, .L1076+4
+	strhne	r2, [r3, r5]	@ movhi
+	bne	.L1072
+	mov	r1, r6
+	ldr	r0, .L1083+4
 	bl	printk
-.LVL907:
-	.loc 2 2762 0
-	ldr	r3, [r6, #2300]
-	ldrh	r4, [r3, r4]
-	cmp	r4, #0
-	beq	.L1067
-.L1074:
-	.loc 2 2771 0
-	mov	r4, #0
-.L1064:
-	.loc 2 2781 0
-	mov	r0, r4
+	ldr	r3, [r4, #2324]
+	ldrh	r5, [r3, r5]
+	cmp	r5, #0
+	beq	.L1074
+.L1081:
+	mov	r5, #0
+.L1071:
+	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1067:
-	.loc 2 2762 0 discriminator 1
+.L1074:
 	movw	r2, #2762
-.L1075:
-	.loc 2 2778 0 discriminator 2
-	ldr	r1, .L1076+8
-	ldr	r0, .L1076+12
+.L1082:
+	ldr	r1, .L1083+8
+	ldr	r0, .L1083+12
 	bl	printk
-.LVL908:
-	b	.L1064
-.L1065:
-	.loc 2 2769 0
-	ldr	r7, .L1076+16
+	b	.L1071
+.L1072:
+	movw	r7, #3992
 	movw	r3, #65535
-	ldrh	r0, [r7]
+	ldrh	r0, [r4, r7]
 	cmp	r0, r3
-	.loc 2 2770 0
-	strheq	r5, [r7]	@ movhi
-	beq	.L1074
-.L1069:
-	.loc 2 2772 0
-	cmp	r5, r0
-	beq	.L1074
-	.loc 2 2775 0
+	strheq	r6, [r4, r7]	@ movhi
+	beq	.L1081
+.L1076:
+	cmp	r6, r0
+	beq	.L1081
 	bl	update_vpc_list
-.LVL909:
-	.loc 2 2778 0
-	ldr	r2, [r6, #2292]
-	.loc 2 2775 0
-	adds	r4, r0, #0
-	.loc 2 2778 0
-	ldr	r3, [r6, #2296]
-	.loc 2 2775 0
-	movne	r4, #1
-	.loc 2 2778 0
-	ldr	r1, [r6, #2300]
-	.loc 2 2777 0
-	strh	r5, [r7]	@ movhi
-	.loc 2 2778 0
+	ldr	r2, [r4, #2316]
+	adds	r5, r0, #0
+	ldr	r3, [r4, #2320]
+	movne	r5, #1
+	ldr	r1, [r4, #2324]
+	strh	r6, [r4, r7]	@ movhi
 	sub	r3, r3, r2
 	asr	r3, r3, #3
 	uxth	r2, r3
 	uxth	r3, r3
 	lsl	r2, r2, #1
-	cmp	r3, r5
+	cmp	r3, r6
 	ldrh	r2, [r1, r2]
 	clz	r2, r2
 	lsr	r2, r2, #5
 	moveq	r2, #0
 	cmp	r2, #0
-	beq	.L1064
-	.loc 2 2778 0 is_stmt 0 discriminator 2
+	beq	.L1071
 	movw	r2, #2778
-	b	.L1075
-.L1077:
+	b	.L1082
+.L1084:
 	.align	2
-.L1076:
+.L1083:
 	.word	.LANCHOR0
-	.word	.LC97
+	.word	.LC98
 	.word	.LANCHOR1+401
 	.word	.LC1
-	.word	.LANCHOR0+3952
-.LFE252:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	2
 	.global	FtlWriteDump_data
@@ -11741,182 +7663,109 @@ decrement_vpc_count:
 	.fpu softvfp
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB218:
-	.loc 2 996 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 28
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI319:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI320:
 	sub	fp, ip, #4
-.LCFI321:
 	sub	sp, sp, #28
-	.loc 2 997 0
-	ldr	r6, .L1096
-	ldr	r4, .L1096+4
+	ldr	r6, .L1103
+	ldr	r4, .L1103+4
 	ldrh	r2, [r6, #4]
 	cmp	r2, #0
-	beq	.L1079
-	.loc 2 997 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
+	beq	.L1086
+	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1079
-	.loc 2 998 0 is_stmt 1
-	ldrb	r1, [r4, #2331]	@ zero_extendqisi2
-	ldrh	r3, [r4, #78]
+	bne	.L1086
+	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
+	ldrh	r3, [r4, #102]
 	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1079
-.LBB468:
-.LBB469:
-	.loc 2 1005 0
-	ldrb	r8, [r4, #2334]	@ zero_extendqisi2
+	beq	.L1086
+	ldrb	r8, [r4, #2358]	@ zero_extendqisi2
 	cmp	r8, #0
-	bne	.L1078
-	.loc 2 1000 0
-	ldr	r7, [r4, #2480]
-	.loc 2 1007 0
+	bne	.L1085
+	ldr	r7, [r4, #2504]
 	mov	r2, r8
 	sub	r1, fp, #64
-	.loc 2 1002 0
-	ldrh	r9, [r4, #8]
-	.loc 2 1000 0
+	ldrh	r9, [r4, #32]
 	sub	r7, r7, #1
-.LVL910:
-	.loc 2 1007 0
 	mov	r0, r7
 	bl	log2phys
-.LVL911:
-	.loc 2 1010 0
 	ldr	r3, [fp, #-64]
-	.loc 2 1013 0
-	ldr	r5, [r4, #3244]
-	.loc 2 1012 0
-	ldr	r0, [r4, #3240]
-	.loc 2 1016 0
+	ldr	r5, [r4, #3284]
+	ldr	r0, [r4, #3280]
 	cmn	r3, #1
-	.loc 2 1010 0
 	str	r3, [fp, #-56]
-	.loc 2 1011 0
 	str	r7, [fp, #-44]
-	.loc 2 1012 0
 	str	r0, [fp, #-52]
-	.loc 2 1013 0
 	str	r5, [fp, #-48]
-	.loc 2 1015 0
 	str	r8, [r5, #4]
-	.loc 2 1016 0
-	beq	.L1081
-	.loc 2 1018 0
+	beq	.L1088
 	mov	r2, r8
 	mov	r1, #1
 	sub	r0, fp, #60
 	bl	FlashReadPages
-.LVL912:
-.L1082:
-	.loc 2 1035 0
-	ldr	ip, .L1096
-	.loc 2 1024 0
+.L1089:
+	ldr	ip, .L1103
 	mov	r8, #0
-	ldr	r3, .L1096+8
-	.loc 2 1002 0
+	ldr	r3, .L1103+8
 	lsl	r9, r9, #2
-.LVL913:
-	.loc 2 1036 0
 	mov	r10, r8
-	.loc 2 1024 0
 	strh	r3, [r5]	@ movhi
-.L1083:
-	.loc 2 1025 0
+.L1090:
 	cmp	r9, r8
-	bne	.L1087
-.L1084:
-	.loc 2 1041 0
+	bne	.L1094
+.L1091:
 	mov	r3, #1
-.L1095:
-.LBE469:
-.LBE468:
-	.loc 2 1047 0
-	strb	r3, [r4, #2334]
-.L1078:
-	.loc 2 1049 0
+.L1102:
+	strb	r3, [r4, #2358]
+.L1085:
 	sub	sp, fp, #40
-.LCFI322:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL914:
-.L1081:
-.LCFI323:
-.LBB471:
-.LBB470:
-	.loc 2 1022 0
-	ldrh	r2, [r4, #86]
+.L1088:
+	ldrh	r2, [r4, #110]
 	mov	r1, #255
 	bl	ftl_memset
-.LVL915:
-	b	.L1082
-.LVL916:
-.L1087:
-	.loc 2 1027 0
+	b	.L1089
+.L1094:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1084
-	.loc 2 1032 0
+	beq	.L1091
 	ldr	r3, [fp, #-56]
-	.loc 2 1035 0
 	mov	r0, ip
-	.loc 2 1031 0
 	str	r7, [r5, #8]
 	add	r8, r8, #1
-	.loc 2 1035 0
 	str	ip, [fp, #-68]
-	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 1033 0
 	ldrh	r3, [r6]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL917:
-	.loc 2 1036 0
-	ldr	r3, [r4, #2520]
-	.loc 2 1037 0
+	ldr	r3, [r4, #2544]
 	mov	r1, #1
-	.loc 2 1035 0
 	str	r0, [fp, #-56]
-	.loc 2 1037 0
 	sub	r0, fp, #60
-	.loc 2 1036 0
 	str	r3, [r5, #4]
 	add	r3, r3, #1
 	cmn	r3, #1
 	moveq	r3, r10
-	str	r3, [r4, #2520]
-	.loc 2 1037 0
+	str	r3, [r4, #2544]
 	mov	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL918:
-	.loc 2 1039 0
 	ldrh	r0, [r6]
 	bl	decrement_vpc_count
-.LVL919:
 	ldr	ip, [fp, #-68]
-	b	.L1083
-.LVL920:
-.L1079:
-.LBE470:
-.LBE471:
-	.loc 2 1047 0
+	b	.L1090
+.L1086:
 	mov	r3, #0
-	b	.L1095
-.L1097:
+	b	.L1102
+.L1104:
 	.align	2
-.L1096:
-	.word	.LANCHOR0+2324
+.L1103:
+	.word	.LANCHOR0+2348
 	.word	.LANCHOR0
 	.word	-3947
-.LFE218:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	2
 	.global	l2p_flush
@@ -11925,52 +7774,37 @@ FtlWriteDump_data:
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB211:
-	.loc 2 789 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI324:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI325:
 	sub	fp, ip, #4
-.LCFI326:
-	.loc 2 795 0
-	ldr	r5, .L1102
+	ldr	r5, .L1109
 	mov	r4, #0
-	.loc 2 796 0
 	mov	r6, #12
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL921:
-.L1099:
-	.loc 2 795 0 discriminator 1
-	ldrh	r2, [r5, #114]
+.L1106:
+	ldrh	r2, [r5, #138]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1101
-	.loc 2 799 0
+	bhi	.L1108
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1101:
-	.loc 2 796 0
-	ldr	r3, [r5, #2468]
+.L1108:
+	ldr	r3, [r5, #2492]
 	uxth	r0, r4
 	mla	r3, r6, r0, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1100
-	.loc 2 797 0
+	bge	.L1107
 	bl	flush_l2p_region
-.LVL922:
-.L1100:
+.L1107:
 	add	r4, r4, #1
-	b	.L1099
-.L1103:
+	b	.L1106
+.L1110:
 	.align	2
-.L1102:
+.L1109:
 	.word	.LANCHOR0
-.LFE211:
 	.size	l2p_flush, .-l2p_flush
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -11979,1008 +7813,606 @@ l2p_flush:
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB231:
-	.loc 2 1705 0
 	@ args = 0, pretend = 0, frame = 44
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL923:
 	mov	ip, sp
-.LCFI327:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI328:
 	sub	fp, ip, #4
-.LCFI329:
 	sub	sp, sp, #44
-	.loc 2 1719 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 1705 0
-	mov	r4, r0
-	.loc 2 1719 0
+	mov	r10, r0
 	cmp	r3, r2
-	beq	.L1225
-	.loc 2 1724 0
+	beq	.L1232
 	ldrh	r3, [r0, #2]
-.LVL924:
-	.loc 2 1730 0
-	ldr	r6, .L1232
-	.loc 2 1724 0
+	ldr	r5, .L1239
 	str	r3, [fp, #-64]
-	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-.LVL925:
-	.loc 2 1730 0
 	ldr	r1, [fp, #-64]
-.LVL926:
-	.loc 2 1725 0
 	str	r3, [fp, #-80]
-	.loc 2 1730 0
-	ldrh	r3, [r6, #78]
-.LVL927:
+	ldrh	r3, [r5, #102]
 	cmp	r3, r1
 	mov	r3, #0
-	.loc 2 1731 0
 	strheq	r3, [r0, #4]	@ movhi
-	.loc 2 1738 0
 	ldrhne	r0, [r0, #16]
-.LVL928:
-	.loc 2 1730 0
-	bne	.L1108
-.LVL929:
-.L1230:
-	.loc 2 2038 0
-	strb	r3, [r4, #6]
-.L1225:
-	.loc 2 2059 0
+	bne	.L1115
+.L1237:
+	strb	r3, [r10, #6]
+.L1232:
 	mov	r0, #0
 	sub	sp, fp, #40
-.LCFI330:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL930:
-.L1109:
-.LCFI331:
-	.loc 2 1741 0
+.L1116:
 	uxth	r1, r3
-.LVL931:
-	add	r1, r4, r1, lsl #1
+	add	r1, r10, r1, lsl #1
 	ldrh	r0, [r1, #16]
-.LVL932:
-.L1108:
-	.loc 2 1739 0
+.L1115:
 	cmp	r0, r2
-	uxth	r7, r3
+	uxth	r6, r3
 	add	r3, r3, #1
-	beq	.L1109
-	.loc 2 1746 0
+	beq	.L1116
 	mov	r1, #1
-.LVL933:
 	bl	FtlGetLastWrittenPage
-.LVL934:
-	.loc 2 1754 0
 	cmn	r0, #1
-	.loc 2 1746 0
-	mov	r5, r0
-.LVL935:
-	.loc 2 1754 0
-	beq	.L1110
-	.loc 2 1766 0
-	ldrh	r3, [r6, #8]
-	.loc 2 1771 0
+	mov	r4, r0
+	beq	.L1117
+	ldrh	r3, [r5, #32]
 	mov	r2, #0
-	.loc 2 1769 0
-	ldr	r0, [r6, #3792]
-	.loc 2 1768 0
-	movw	r8, #65535
-	.loc 2 1771 0
-	ldr	lr, [r6, #3152]
-	.loc 2 1769 0
-	mov	r9, #20
-	.loc 2 1766 0
+	ldr	r0, [r5, #3832]
+	movw	r7, #65535
+	ldr	lr, [r5, #3176]
+	mov	r8, #20
 	str	r3, [fp, #-56]
-	.loc 2 1770 0
-	ldr	r3, [r6, #3148]
-	.loc 2 1771 0
-	ldrh	r7, [r6, #88]
-	.loc 2 1770 0
+	ldr	r3, [r5, #3172]
+	ldrh	r6, [r5, #112]
 	str	r3, [fp, #-60]
-	ldrh	r3, [r6, #86]
-	.loc 2 1771 0
-	mov	r6, r2
-	.loc 2 1770 0
+	ldrh	r3, [r5, #110]
+	mov	r5, r2
 	str	r3, [fp, #-68]
-	add	r3, r4, #16
-	.loc 2 1771 0
+	add	r3, r10, #16
 	mov	ip, r3
 	str	r3, [fp, #-76]
-.L1111:
-	.loc 2 1766 0 discriminator 1
+.L1118:
 	ldr	r1, [fp, #-56]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1115
-	.loc 2 1777 0
-	ldr	r7, .L1232
-	.loc 2 1776 0
+	bhi	.L1122
+	ldr	r6, .L1239
 	mov	r2, #0
-	mov	r1, r6
+	mov	r1, r5
+	movw	r8, #65535
 	bl	FlashReadPages
-.LVL936:
-	.loc 2 1777 0
-	ldr	r3, [r7, #2520]
-	.loc 2 1715 0
-	movw	r2, #65535
-	.loc 2 1779 0
-	ldr	r9, [r7, #3792]
-	.loc 2 1782 0
-	mov	r10, r7
-	.loc 2 1715 0
-	str	r2, [fp, #-72]
-	.loc 2 1791 0
-	uxth	r2, r5
-	.loc 2 1777 0
+	ldr	r3, [r6, #2544]
+	uxth	r2, r4
+	ldr	r9, [r6, #3832]
+	str	r2, [fp, #-60]
 	sub	r3, r3, #1
-.LVL937:
 	str	r3, [fp, #-56]
-	mov	r8, r9
-	.loc 2 1778 0
+	mov	r7, r9
 	mov	r3, #0
-.LVL938:
-	.loc 2 1791 0
-	str	r2, [fp, #-60]
-.L1116:
+.L1123:
 	uxth	r2, r3
-.LVL939:
-	.loc 2 1778 0 discriminator 1
-	cmp	r6, r2
-	bhi	.L1121
-	.loc 2 1796 0
-	addeq	r3, r5, #1
+	cmp	r5, r2
+	bhi	.L1128
+	addeq	r3, r4, #1
 	uxtheq	r3, r3
-.LVL940:
 	streq	r3, [fp, #-60]
-	.loc 2 1794 0
-	bne	.L1119
-.L1226:
-	.loc 2 1802 0
+	bne	.L1126
+.L1233:
 	ldr	r0, [r9, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL941:
-	.loc 2 1807 0
-	ldrh	r3, [r7, #78]
-	.loc 2 1813 0
+	ldrh	r3, [r6, #102]
 	sub	r1, fp, #68
-	.loc 2 1807 0
 	ldr	r2, [fp, #-60]
-.LVL942:
-	.loc 2 1802 0
 	str	r0, [fp, #-68]
-	.loc 2 1813 0
 	ldr	r0, [fp, #-80]
-.LVL943:
-	.loc 2 1807 0
 	cmp	r3, r2
-	.loc 2 1808 0
 	ldrheq	r3, [fp, #-60]
-	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 1809 0
+	strheq	r3, [r10, #2]	@ movhi
 	moveq	r3, #0
-	strbeq	r3, [r4, #6]
-	.loc 2 1810 0
-	strheq	r3, [r4, #4]	@ movhi
-	.loc 2 1813 0
+	strbeq	r3, [r10, #6]
+	strheq	r3, [r10, #4]	@ movhi
 	ldm	r1, {r1, r2, r3}
-.LVL944:
 	cmp	r3, r2
 	cmpeq	r1, r0
-	.loc 2 1814 0
 	moveq	r2, r1
-.LVL945:
 	moveq	r1, r3
-.LVL946:
-	.loc 2 1813 0
-	beq	.L1231
-	.loc 2 1819 0
-	ldr	r2, [fp, #-72]
+	beq	.L1238
 	movw	r3, #65535
-.LVL947:
-	cmp	r2, r3
-	bne	.L1125
-	.loc 2 1819 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r8, r3
+	bne	.L1132
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1126
-.L1125:
-.LBB472:
-	.loc 2 1824 0 is_stmt 1
-	ldr	r3, [r7, #3964]
-	.loc 2 1823 0
-	uxth	r8, r5
-	.loc 2 1827 0
-	uxth	r5, r5
-.LVL948:
-	.loc 2 1824 0
+	bne	.L1133
+.L1132:
+	ldr	r3, [r6, #4004]
+	uxth	r7, r4
+	uxth	r4, r4
 	cmn	r3, #1
-	.loc 2 1825 0
 	ldreq	r3, [fp, #-56]
-.LVL949:
-	streq	r3, [r7, #3964]
-	.loc 2 1827 0
+	streq	r3, [r6, #4004]
 	ldr	r3, [fp, #-64]
-.LVL950:
-	ldr	r7, .L1232
+	ldr	r6, .L1239
 	add	r3, r3, #7
-.LVL951:
-	cmp	r5, r3
-	.loc 2 1828 0
-	subgt	r5, r8, #7
-	ldrle	r5, [fp, #-64]
-	uxthgt	r5, r5
-.L1129:
-	.loc 2 1829 0 discriminator 1
-	cmp	r5, r8
-	bhi	.L1136
-	.loc 2 1834 0
+	cmp	r4, r3
+	subgt	r4, r7, #7
+	ldrle	r4, [fp, #-64]
+	uxthgt	r4, r4
+.L1136:
+	cmp	r4, r7
+	bhi	.L1143
 	mov	r3, #0
-	.loc 2 1831 0
-	ldrh	r9, [r7, #8]
-	.loc 2 1834 0
-	ldr	r0, [r7, #3792]
-.LVL952:
-	mov	r6, r3
+	ldrh	r8, [r6, #32]
+	ldr	r0, [r6, #3832]
+	mov	r5, r3
 	ldr	r1, [fp, #-76]
-	.loc 2 1833 0
 	movw	lr, #65535
-	.loc 2 1834 0
 	mov	ip, #20
-	b	.L1137
-.LVL953:
-.L1110:
-.LBE472:
-	.loc 2 1755 0
+	b	.L1144
+.L1117:
 	ldr	r3, [fp, #-64]
-.LVL954:
 	cmp	r3, #0
-	beq	.L1112
-	.loc 2 1755 0 is_stmt 0 discriminator 1
+	beq	.L1119
 	movw	r2, #1755
-	ldr	r1, .L1232+4
-	ldr	r0, .L1232+8
+	ldr	r1, .L1239+4
+	ldr	r0, .L1239+8
 	bl	printk
-.LVL955:
-.L1112:
-	.loc 2 1756 0 is_stmt 1
+.L1119:
 	ldr	r3, [fp, #-80]
-.LVL956:
 	cmp	r3, #0
-	cmpne	r7, r3
-	beq	.L1113
-	.loc 2 1756 0 is_stmt 0 discriminator 1
+	cmpne	r6, r3
+	beq	.L1120
 	movw	r2, #1756
-	ldr	r1, .L1232+4
-	ldr	r0, .L1232+8
+	ldr	r1, .L1239+4
+	ldr	r0, .L1239+8
 	bl	printk
-.LVL957:
-.L1113:
-	.loc 2 1757 0 is_stmt 1
+.L1120:
 	mov	r3, #0
-.LVL958:
-	strh	r3, [r4, #2]	@ movhi
-	b	.L1230
-.L1115:
-	.loc 2 1767 0
+	strh	r3, [r10, #2]	@ movhi
+	b	.L1237
+.L1122:
 	ldrh	r3, [ip], #2
-	.loc 2 1768 0
-	cmp	r3, r8
-	beq	.L1114
-	.loc 2 1769 0
-	mla	r1, r9, r6, r0
-	orr	r3, r5, r3, lsl #10
+	cmp	r3, r7
+	beq	.L1121
+	mla	r1, r8, r5, r0
+	orr	r3, r4, r3, lsl #10
 	str	r3, [r1, #4]
-	.loc 2 1770 0
 	ldr	r3, [fp, #-68]
-	mul	r3, r3, r6
-	add	r10, r3, #3
+	mul	r3, r3, r5
+	add	r9, r3, #3
 	cmp	r3, #0
-	movlt	r3, r10
-	ldr	r10, [fp, #-60]
+	movlt	r3, r9
+	ldr	r9, [fp, #-60]
 	bic	r3, r3, #3
-	add	r3, r10, r3
+	add	r3, r9, r3
 	str	r3, [r1, #8]
-	.loc 2 1771 0
-	mul	r3, r7, r6
-	.loc 2 1772 0
-	add	r6, r6, #1
-	uxth	r6, r6
-	.loc 2 1771 0
-	add	r10, r3, #3
+	mul	r3, r6, r5
+	add	r5, r5, #1
+	uxth	r5, r5
+	add	r9, r3, #3
 	cmp	r3, #0
-	movlt	r3, r10
+	movlt	r3, r9
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1114:
-	add	r2, r2, #1
-	b	.L1111
-.LVL959:
 .L1121:
-	.loc 2 1779 0
-	ldr	r2, [r8]
-.LVL960:
+	add	r2, r2, #1
+	b	.L1118
+.L1128:
+	ldr	r2, [r7]
 	cmp	r2, #0
-	bne	.L1117
-	.loc 2 1780 0
-	ldr	ip, [r8, #12]
-	.loc 2 1781 0
+	bne	.L1124
+	ldr	ip, [r7, #12]
 	ldr	r2, [ip, #4]
 	cmn	r2, #1
-	beq	.L1118
-	.loc 2 1782 0
-	ldr	r1, [r10, #2520]
+	beq	.L1125
+	ldr	r1, .L1239
 	mov	r0, r2
 	str	ip, [fp, #-68]
+	ldr	r1, [r1, #2544]
 	bl	ftl_cmp_data_ver
-.LVL961:
 	ldr	ip, [fp, #-68]
 	cmp	r0, #0
-	.loc 2 1784 0
+	ldrne	r1, .L1239
 	addne	r2, r2, #1
-	strne	r2, [r10, #2520]
-.L1118:
-	.loc 2 1787 0
+	strne	r2, [r1, #2544]
+.L1125:
 	ldr	r2, [ip]
 	cmn	r2, #1
-	bne	.L1120
-.LVL962:
-.L1119:
-	.loc 2 1801 0
-	uxth	r2, r5
-.LVL963:
-	.loc 2 1802 0
+	bne	.L1127
+.L1126:
+	uxth	r2, r4
 	uxth	r3, r3
-	.loc 2 1801 0
 	str	r2, [fp, #-60]
-	.loc 2 1802 0
 	mov	r2, #20
-.LVL964:
 	mla	r9, r2, r3, r9
-	b	.L1226
-.L1117:
-	.loc 2 1791 0
-	ldr	r2, [fp, #-60]
-	str	r2, [fp, #-72]
-.L1120:
+	b	.L1233
+.L1124:
+	ldr	r8, [fp, #-60]
+.L1127:
 	add	r3, r3, #1
-	add	r8, r8, #20
-	b	.L1116
-.LVL965:
-.L1131:
-.LBB473:
-	.loc 2 1832 0
+	add	r7, r7, #20
+	b	.L1123
+.L1138:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
-	.loc 2 1833 0
 	cmp	r2, lr
-	.loc 2 1834 0
-	mlane	r10, ip, r6, r0
-	.loc 2 1835 0
-	addne	r6, r6, #1
-	.loc 2 1834 0
-	orrne	r2, r5, r2, lsl #10
-	.loc 2 1835 0
-	uxthne	r6, r6
-	.loc 2 1834 0
-	strne	r2, [r10, #4]
-.L1137:
-	.loc 2 1831 0 discriminator 1
+	mlane	r9, ip, r5, r0
+	addne	r5, r5, #1
+	orrne	r2, r4, r2, lsl #10
+	uxthne	r5, r5
+	strne	r2, [r9, #4]
+.L1144:
 	uxth	r2, r3
-	cmp	r9, r2
-	bhi	.L1131
-	.loc 2 1838 0
-	mov	r1, r6
+	cmp	r8, r2
+	bhi	.L1138
+	mov	r1, r5
 	mov	r2, #0
 	bl	FlashReadPages
-.LVL966:
-	.loc 2 1840 0
-	ldr	r3, [r7, #3792]
+	ldr	r3, [r6, #3832]
 	mov	r2, #20
-	.loc 2 1842 0
 	movw	r1, #65535
-	mla	r6, r2, r6, r3
-.L1132:
-	.loc 2 1839 0 discriminator 1
-	cmp	r6, r3
-	.loc 2 1829 0
-	addeq	r5, r5, #1
-	uxtheq	r5, r5
-	beq	.L1129
-.L1135:
-	.loc 2 1840 0
+	mla	r5, r2, r5, r3
+.L1139:
+	cmp	r5, r3
+	addeq	r4, r4, #1
+	uxtheq	r4, r4
+	beq	.L1136
+.L1142:
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L1126
-	.loc 2 1841 0
+	bne	.L1133
 	ldr	r2, [r3, #12]
-	.loc 2 1842 0
 	ldrh	r0, [r2]
 	cmp	r0, r1
-	beq	.L1134
-	.loc 2 1844 0
+	beq	.L1141
 	ldr	r2, [r2, #4]
 	cmn	r2, #1
-	.loc 2 1846 0
-	strne	r2, [r7, #3964]
-.L1134:
+	strne	r2, [r6, #4004]
+.L1141:
 	add	r3, r3, #20
-	b	.L1132
-.LVL967:
-.L1136:
-	.loc 2 1858 0
+	b	.L1139
+.L1143:
 	mvn	r3, #0
-	str	r3, [r7, #3964]
-.LVL968:
-.L1126:
-.LBE473:
-	.loc 2 1863 0
-	ldr	r5, .L1232+12
-.LVL969:
-	mov	r3, #1
-	mov	r0, r5
-.LVL970:
-	.loc 2 1870 0
-	sub	r5, r5, #3968
-	.loc 2 1863 0
-	strh	r3, [r0], #-104	@ movhi
-	.loc 2 1864 0
+	str	r3, [r6, #4004]
+.L1133:
+	ldr	r1, .L1239
+	mov	r2, #1
+	movw	r3, #4008
+	ldr	r4, .L1239
+	add	r0, r1, #3904
+	strh	r2, [r1, r3]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-.LVL971:
-	ldr	r9, [fp, #-64]
-.LVL972:
-.L1138:
-	.loc 2 1870 0
-	ldrh	ip, [r5, #8]
+	ldr	r8, [fp, #-64]
+.L1145:
+	ldrh	ip, [r4, #32]
 	mov	r3, #0
-	.loc 2 1873 0
-	ldr	r0, [r5, #3792]
-	.loc 2 1869 0
-	mov	r10, r3
-	.loc 2 1870 0
+	ldr	r0, [r4, #3832]
+	mov	r9, r3
 	ldr	r1, [fp, #-76]
-	.loc 2 1872 0
 	movw	lr, #65535
-	.loc 2 1873 0
-	mov	r6, #20
-.LVL973:
-.L1139:
-	.loc 2 1870 0 discriminator 1
+	mov	r5, #20
+.L1146:
 	uxth	r2, r3
-.LVL974:
 	cmp	ip, r2
-	bhi	.L1141
-	.loc 2 1877 0
+	bhi	.L1148
 	mov	r2, #0
-	mov	r1, r10
+	mov	r1, r9
 	bl	FlashReadPages
-.LVL975:
-	.loc 2 1878 0
 	mov	r3, #0
-.LVL976:
-.L1229:
+.L1236:
 	str	r3, [fp, #-72]
-	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldrh	r3, [fp, #-72]
-	cmp	r10, r3
-	bhi	.L1169
-	.loc 2 2031 0 is_stmt 1
-	add	r9, r9, #1
-	.loc 2 2032 0
-	ldrh	r3, [r5, #78]
-	.loc 2 2031 0
-	uxth	r9, r9
-	.loc 2 2032 0
-	cmp	r3, r9
-	bne	.L1138
-	.loc 2 2035 0
-	ldrh	r2, [r5, #8]
-.LVL977:
-	.loc 2 2037 0
+	cmp	r9, r3
+	bhi	.L1176
+	add	r8, r8, #1
+	ldrh	r3, [r4, #102]
+	uxth	r8, r8
+	cmp	r3, r8
+	bne	.L1145
+	ldrh	r2, [r4, #32]
 	movw	r0, #65535
-	.loc 2 2034 0
 	mov	r3, #0
-	.loc 2 2033 0
-	strh	r9, [r4, #2]	@ movhi
-	.loc 2 2034 0
-	strh	r3, [r4, #4]	@ movhi
-.L1170:
-	.loc 2 2035 0 discriminator 1
+	strh	r8, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+.L1177:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1225
-	.loc 2 2036 0
+	bcs	.L1232
 	ldr	r1, [fp, #-76]
 	ldrh	ip, [r1], #2
-	.loc 2 2037 0
 	cmp	ip, r0
-	.loc 2 2036 0
 	str	r1, [fp, #-76]
 	add	r1, r3, #1
-	.loc 2 2037 0
-	bne	.L1230
+	bne	.L1237
 	mov	r3, r1
-	b	.L1170
-.LVL978:
-.L1141:
-	.loc 2 1871 0
+	b	.L1177
+.L1148:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
-	.loc 2 1872 0
 	cmp	r2, lr
-	.loc 2 1873 0
-	mlane	r7, r6, r10, r0
-	orrne	r2, r9, r2, lsl #10
-	.loc 2 1874 0
-	addne	r10, r10, #1
-	uxthne	r10, r10
-	.loc 2 1873 0
-	strne	r2, [r7, #4]
-	b	.L1139
-.LVL979:
-.L1169:
+	mlane	r6, r5, r9, r0
+	orrne	r2, r8, r2, lsl #10
+	addne	r9, r9, #1
+	uxthne	r9, r9
+	strne	r2, [r6, #4]
+	b	.L1146
+.L1176:
 	ldr	r3, [fp, #-72]
-	mov	r7, #20
-	.loc 2 1879 0
-	ldr	r2, [r5, #3792]
-.LVL980:
-	mul	r7, r7, r3
+	mov	r6, #20
+	ldr	r2, [r4, #3832]
+	mul	r6, r6, r3
 	str	r2, [fp, #-84]
-	add	r8, r2, r7
-	ldr	r6, [r8, #4]
-.LVL981:
-	.loc 2 1880 0
-	ubfx	r0, r6, #10, #16
-	.loc 2 1879 0
-	str	r6, [fp, #-44]
-	.loc 2 1880 0
+	add	r7, r2, r6
+	ldr	r5, [r7, #4]
+	ubfx	r0, r5, #10, #16
+	str	r5, [fp, #-44]
 	bl	P2V_plane
-.LVL982:
-	.loc 2 1882 0
 	ldr	r3, [fp, #-64]
-.LVL983:
-	cmp	r9, r3
-	bcc	.L1143
-	.loc 2 1882 0 is_stmt 0 discriminator 1
+	cmp	r8, r3
+	bcc	.L1150
 	ldr	r2, [fp, #-80]
-.LVL984:
-	.loc 2 1883 0 is_stmt 1 discriminator 1
 	moveq	r3, #1
-.LVL985:
 	movne	r3, #0
-	.loc 2 1882 0 discriminator 1
 	cmp	r2, r0
 	movls	r3, #0
 	andhi	r3, r3, #1
 	cmp	r3, #0
-	bne	.L1143
-	.loc 2 1886 0
+	bne	.L1150
 	ldr	r3, [fp, #-60]
-.LVL986:
 	ldr	r2, [fp, #-68]
-.LVL987:
-	cmp	r9, r3
+	cmp	r8, r3
 	cmpeq	r2, r0
-	beq	.L1144
-	.loc 2 1890 0
+	beq	.L1151
 	ldr	r2, [fp, #-84]
-.LVL988:
-	ldr	r3, [r2, r7]
-.LVL989:
+	ldr	r3, [r2, r6]
 	cmn	r3, #1
-	beq	.L1145
-	.loc 2 1891 0
-	ldr	r8, [r8, #12]
-	.loc 2 1892 0
+	beq	.L1152
+	ldr	r7, [r7, #12]
 	movw	r3, #61589
-	ldrh	r2, [r8]
+	ldrh	r2, [r7]
 	cmp	r2, r3
-	beq	.L1146
-.LVL990:
-.L1153:
-.LBB474:
-	.loc 2 1925 0
-	ldrh	r0, [r4]
-.LVL991:
-.L1228:
-.LBE474:
-	.loc 2 2009 0
+	beq	.L1153
+.L1160:
+	ldrh	r0, [r10]
+.L1235:
 	bl	decrement_vpc_count
-.LVL992:
-.L1143:
+.L1150:
 	ldr	r3, [fp, #-72]
-.LVL993:
 	add	r3, r3, #1
-	b	.L1229
-.LVL994:
-.L1146:
-	.loc 2 1898 0
-	ldr	r3, [r8, #4]
-.LVL995:
-	.loc 2 1899 0
+	b	.L1236
+.L1153:
+	ldr	r3, [r7, #4]
 	cmn	r3, #1
-	.loc 2 1898 0
 	str	r3, [fp, #-56]
-	.loc 2 1899 0
-	beq	.L1147
-	.loc 2 1900 0 discriminator 1
+	beq	.L1154
 	mov	r0, r3
-	ldr	r1, [r5, #2520]
+	ldr	r1, [r4, #2544]
 	bl	ftl_cmp_data_ver
-.LVL996:
-	.loc 2 1899 0 discriminator 1
 	cmp	r0, #0
-	.loc 2 1902 0 discriminator 1
 	ldrne	r3, [fp, #-56]
 	addne	r3, r3, #1
-.LVL997:
-	strne	r3, [r5, #2520]
-.LVL998:
-.L1147:
-	.loc 2 1905 0
-	ldrh	r2, [r8]
+	strne	r3, [r4, #2544]
+.L1154:
+	ldrh	r2, [r7]
 	movw	r3, #61589
-.LVL999:
 	cmp	r2, r3
-	beq	.L1148
-	.loc 2 1905 0 is_stmt 0 discriminator 1
+	beq	.L1155
 	movw	r2, #1905
-	ldr	r1, .L1232+4
-	ldr	r0, .L1232+8
+	ldr	r1, .L1239+4
+	ldr	r0, .L1239+8
 	bl	printk
-.LVL1000:
-.L1148:
-	.loc 2 1906 0 is_stmt 1
-	ldr	r6, [r8, #8]
-.LVL1001:
-	.loc 2 1908 0
+.L1155:
+	ldr	r5, [r7, #8]
 	sub	r1, fp, #48
-	.loc 2 1907 0
-	ldr	r3, [r8, #12]
-	.loc 2 1908 0
+	ldr	r3, [r7, #12]
 	mov	r2, #0
-	mov	r0, r6
-	.loc 2 1907 0
+	mov	r0, r5
 	str	r3, [fp, #-52]
-	.loc 2 1908 0
 	bl	log2phys
-.LVL1002:
-	.loc 2 1909 0
-	ldr	r1, [r5, #3964]
+	ldr	r1, [r4, #4004]
 	cmn	r1, #1
-	beq	.L1149
-	.loc 2 1910 0 discriminator 1
+	beq	.L1156
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
-.LVL1003:
-	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1149
-.LBB475:
-	.loc 2 1914 0
+	beq	.L1156
 	ldr	r2, [fp, #-52]
 	cmn	r2, #1
-	beq	.L1150
-	.loc 2 1915 0
-	ldr	r0, [r5, #3792]
-	.loc 2 1917 0
+	beq	.L1157
+	ldr	r0, [r4, #3832]
 	mov	r1, #1
-	.loc 2 1915 0
-	add	r0, r0, r7
-	.loc 2 1916 0
+	add	r0, r0, r6
 	str	r2, [r0, #4]
-	.loc 2 1917 0
 	mov	r2, #0
-	.loc 2 1915 0
-	ldr	r8, [r0, #12]
-	.loc 2 1917 0
+	ldr	r7, [r0, #12]
 	bl	FlashReadPages
-.LVL1004:
-	.loc 2 1930 0
-	ldr	r2, [r5, #3792]
-	ldr	r1, [r2, r7]
-	add	r3, r2, r7
+	ldr	r2, [r4, #3832]
+	ldr	r1, [r2, r6]
+	add	r3, r2, r6
 	cmn	r1, #1
-	bne	.L1151
-.LVL1005:
-.L1152:
-	.loc 2 1962 0
+	bne	.L1158
+.L1159:
 	mvn	r3, #0
-.LVL1006:
-	.loc 2 1963 0
-	ldrh	r0, [r4]
-	.loc 2 1962 0
+	ldrh	r0, [r10]
 	str	r3, [fp, #-52]
-	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1007:
-.L1160:
-.LBE475:
-	.loc 2 2003 0
-	ldr	r7, [fp, #-52]
-	cmn	r7, #1
-	beq	.L1143
-.L1173:
-	.loc 2 2005 0
-	ubfx	r0, r7, #10, #16
+.L1167:
+	ldr	r6, [fp, #-52]
+	cmn	r6, #1
+	beq	.L1150
+.L1180:
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-.LVL1008:
-	.loc 2 2006 0
-	ldrh	r3, [r5, #16]
-	.loc 2 2005 0
-	mov	r6, r0
-.LVL1009:
-	.loc 2 2006 0
+	ldrh	r3, [r4, #40]
+	mov	r5, r0
 	cmp	r3, r0
-	bhi	.L1165
-	.loc 2 2006 0 is_stmt 0 discriminator 1
+	bhi	.L1172
 	movw	r2, #2006
-	ldr	r1, .L1232+4
-	ldr	r0, .L1232+8
+	ldr	r1, .L1239+4
+	ldr	r0, .L1239+8
 	bl	printk
-.LVL1010:
-.L1165:
-	.loc 2 2007 0 is_stmt 1
-	ldr	r2, [r5, #2300]
-	lsl	r3, r6, #1
+.L1172:
+	ldr	r3, .L1239
+	ldr	r2, [r3, #2324]
+	lsl	r3, r5, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1166
-	.loc 2 2009 0
-	mov	r0, r6
-	b	.L1228
-.LVL1011:
-.L1150:
-.LBB476:
-	.loc 2 1921 0
+	beq	.L1173
+	mov	r0, r5
+	b	.L1235
+.L1157:
 	ldr	r3, [fp, #-44]
-.LVL1012:
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	bne	.L1153
-	.loc 2 1922 0
+	bne	.L1160
 	mov	r2, #1
 	sub	r1, fp, #52
-	mov	r0, r6
+	mov	r0, r5
 	bl	log2phys
-.LVL1013:
-	b	.L1153
-.L1151:
-	.loc 2 1930 0 discriminator 1
-	ldr	r1, [r8, #8]
-	cmp	r6, r1
-	bne	.L1152
-	.loc 2 1918 0 discriminator 2
-	ldr	r1, [r8, #4]
-.LVL1014:
-	.loc 2 1931 0 discriminator 2
-	ldr	r0, [r5, #3964]
-	.loc 2 1918 0 discriminator 2
+	b	.L1160
+.L1158:
+	ldr	r1, [r7, #8]
+	cmp	r5, r1
+	bne	.L1159
+	ldr	r1, [r7, #4]
+	ldr	r0, [r4, #4004]
 	str	r1, [fp, #-84]
-	.loc 2 1931 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1015:
-	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1152
-	.loc 2 1932 0
+	beq	.L1159
 	ldr	r1, [fp, #-48]
-.LVL1016:
 	ldr	r0, [fp, #-44]
-.LVL1017:
 	cmp	r1, r0
-	bne	.L1155
-.LVL1018:
-.L1158:
-	.loc 2 1958 0
+	bne	.L1162
+.L1165:
 	ldr	r1, [fp, #-52]
-	mov	r0, r6
+	mov	r0, r5
 	bl	FtlReUsePrevPpa
-.LVL1019:
-	b	.L1152
-.L1155:
-	.loc 2 1935 0
+	b	.L1159
+.L1162:
 	ldr	r0, [fp, #-52]
-.LVL1020:
 	cmp	r1, r0
-	beq	.L1152
-	.loc 2 1936 0
+	beq	.L1159
 	cmn	r1, #1
-	.loc 2 1941 0
-	streq	r1, [r2, r7]
-	.loc 2 1936 0
-	beq	.L1157
-	.loc 2 1938 0
+	streq	r1, [r2, r6]
+	beq	.L1164
 	str	r1, [r3, #4]
-	.loc 2 1939 0
 	mov	r2, #0
 	mov	r1, #1
 	mov	r0, r3
-	.loc 2 1937 0
-	ldr	r8, [r3, #12]
-	.loc 2 1939 0
+	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.LVL1021:
-.L1157:
-	.loc 2 1944 0
-	ldr	r2, [r5, #3792]
-	ldr	r2, [r2, r7]
+.L1164:
+	ldr	r2, [r4, #3832]
+	ldr	r2, [r2, r6]
 	cmn	r2, #1
-	beq	.L1158
-	.loc 2 1945 0
-	ldr	r3, [r8, #4]
-.LVL1022:
-	.loc 2 1946 0
-	ldr	r0, [r5, #3964]
+	beq	.L1165
+	ldr	r3, [r7, #4]
+	ldr	r0, [r4, #4004]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
-.LVL1023:
 	cmp	r0, #0
-	beq	.L1158
-	.loc 2 1947 0
+	beq	.L1165
 	mov	r1, r3
 	ldr	r0, [fp, #-84]
 	bl	ftl_cmp_data_ver
-.LVL1024:
 	cmp	r0, #0
-	beq	.L1152
-	b	.L1158
-.LVL1025:
-.L1149:
-.LBE476:
-	.loc 2 1964 0
+	beq	.L1159
+	b	.L1165
+.L1156:
 	ldr	r3, [fp, #-44]
-.LVL1026:
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	beq	.L1160
-	.loc 2 1966 0
+	beq	.L1167
 	mov	r2, #1
 	sub	r1, fp, #44
-	mov	r0, r6
+	mov	r0, r5
 	bl	log2phys
-.LVL1027:
-	.loc 2 1967 0
-	ldr	r7, [fp, #-48]
-	cmn	r7, #1
-	beq	.L1160
-	.loc 2 1967 0 is_stmt 0 discriminator 1
+	ldr	r6, [fp, #-48]
+	cmn	r6, #1
+	beq	.L1167
 	ldr	r3, [fp, #-52]
-	cmp	r7, r3
-	beq	.L1173
-	.loc 2 1968 0 is_stmt 1
-	ubfx	r0, r7, #10, #16
+	cmp	r6, r3
+	beq	.L1180
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-.LVL1028:
-	.loc 2 1970 0
-	ldr	r3, .L1232+16
+	ldr	r3, .L1239+12
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	beq	.L1164
-	.loc 2 1970 0 is_stmt 0 discriminator 1
+	beq	.L1171
 	ldrh	r2, [r3, #48]
 	cmp	r2, r0
-	beq	.L1164
-	.loc 2 1971 0 is_stmt 1
+	beq	.L1171
 	ldrh	r3, [r3, #96]
 	cmp	r3, r0
-	bne	.L1160
-.L1164:
-.LBB477:
-	.loc 2 1976 0
-	ldr	r0, [r5, #3792]
-	.loc 2 1979 0
+	bne	.L1167
+.L1171:
+	ldr	r0, [r4, #3832]
 	mov	r2, #0
 	mov	r1, #1
-	.loc 2 1978 0
-	str	r7, [r0, #4]
-	.loc 2 1976 0
-	ldr	r8, [r0, #12]
-	.loc 2 1979 0
+	str	r6, [r0, #4]
+	ldr	r7, [r0, #12]
 	bl	FlashReadPages
-.LVL1029:
-	.loc 2 1982 0
-	ldr	r3, [r5, #3792]
+	ldr	r3, [r4, #3832]
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L1160
-	.loc 2 1983 0
-	ldr	r1, [r8, #4]
+	beq	.L1167
+	ldr	r1, [r7, #4]
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
-.LVL1030:
 	cmp	r0, #0
-	bne	.L1160
-	.loc 2 1990 0
+	bne	.L1167
 	mov	r2, #1
 	sub	r1, fp, #48
-	mov	r0, r6
+	mov	r0, r5
 	bl	log2phys
-.LVL1031:
-	b	.L1160
-.LVL1032:
-.L1166:
-.LBE477:
-	.loc 2 2011 0
-	mov	r1, r6
-	ldr	r0, .L1232+20
+	b	.L1167
+.L1173:
+	mov	r1, r5
+	ldr	r0, .L1239+16
 	bl	printk
-.LVL1033:
-	b	.L1143
-.LVL1034:
-.L1145:
-	.loc 2 2018 0
-	ldr	r3, [r5, #3972]
+	b	.L1150
+.L1152:
+	ldr	r3, [r4, #4012]
 	cmp	r3, #31
-	.loc 2 2019 0
-	addls	r2, r5, r3, lsl #2
-	.loc 2 2020 0
+	addls	r2, r4, r3, lsl #2
 	addls	r3, r3, #1
-	strls	r3, [r5, #3972]
-	.loc 2 2019 0
-	strls	r6, [r2, #3976]
-	.loc 2 2022 0
-	ldrh	r0, [r4]
+	strls	r3, [r4, #4012]
+	strls	r5, [r2, #4016]
+	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-.LVL1035:
-	.loc 2 2024 0
-	ldr	r3, [r5, #3964]
+	ldr	r3, [r4, #4004]
 	cmn	r3, #1
-	.loc 2 2025 0
 	ldreq	r3, [fp, #-56]
-.LVL1036:
-	.loc 2 2024 0
-	beq	.L1227
-	.loc 2 2026 0
+	beq	.L1234
 	ldr	r2, [fp, #-56]
-.LVL1037:
 	cmp	r2, r3
-	bcs	.L1143
-	.loc 2 2027 0
+	bcs	.L1150
 	mov	r3, r2
-.LVL1038:
-.L1227:
-	str	r3, [r5, #3964]
-	b	.L1143
-.LVL1039:
-.L1144:
-	.loc 2 2051 0
+.L1234:
+	str	r3, [r4, #4004]
+	b	.L1150
+.L1151:
 	ldrb	r3, [fp, #-68]	@ zero_extendqisi2
-.LVL1040:
-	.loc 2 2053 0
 	ldr	r2, [fp, #-68]
-.LVL1041:
 	ldr	r1, [fp, #-60]
-	.loc 2 2051 0
-	strb	r3, [r4, #6]
-	.loc 2 2052 0
+	strb	r3, [r10, #6]
 	ldrh	r3, [fp, #-60]
-	strh	r3, [r4, #2]	@ movhi
-.LVL1042:
-.L1231:
-	.loc 2 2053 0
-	mov	r0, r4
-.LVL1043:
+	strh	r3, [r10, #2]	@ movhi
+.L1238:
+	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-.LVL1044:
-	b	.L1225
-.L1233:
+	b	.L1232
+.L1240:
 	.align	2
-.L1232:
+.L1239:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LANCHOR0+3968
-	.word	.LANCHOR0+2324
-	.word	.LC98
-.LFE231:
+	.word	.LANCHOR0+2348
+	.word	.LC99
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -12989,130 +8421,82 @@ FtlRecoverySuperblock:
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB238:
-	.loc 2 2205 0
 	@ args = 0, pretend = 0, frame = 20
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1045:
 	mov	ip, sp
-.LCFI332:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI333:
 	sub	fp, ip, #4
-.LCFI334:
 	sub	sp, sp, #20
-	.loc 2 2211 0
 	mvn	r3, #0
 	str	r3, [fp, #-36]
-	.loc 2 2219 0
 	mov	r7, #0
-	.loc 2 2212 0
-	ldr	r3, .L1245
-	.loc 2 2220 0
+	ldr	r3, .L1252
 	movw	r1, #61589
-	.loc 2 2205 0
 	mov	r4, r0
-	.loc 2 2223 0
 	mov	r6, #7
-	.loc 2 2212 0
-	ldr	r2, [r3, #3240]
+	ldr	r2, [r3, #3280]
 	mov	r8, r3
-	.loc 2 2213 0
-	ldr	r5, [r3, #3244]
-	.loc 2 2212 0
+	ldr	r5, [r3, #3284]
 	str	r2, [fp, #-44]
-	.loc 2 2216 0
 	mvn	r2, #2
-	.loc 2 2213 0
 	str	r5, [fp, #-40]
-	.loc 2 2216 0
 	str	r2, [r5, #8]
-	.loc 2 2217 0
 	mvn	r2, #1
 	str	r2, [r5, #12]
-	.loc 2 2218 0
 	ldrh	r2, [r0]
-	.loc 2 2219 0
 	strh	r7, [r5]	@ movhi
-	.loc 2 2218 0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2220 0
-	ldr	r2, [r3, #3240]
+	ldr	r2, [r3, #3280]
 	str	r1, [r2]
-	.loc 2 2221 0
-	ldr	r1, .L1245+4
-	ldr	r2, [r3, #3240]
+	ldr	r1, .L1252+4
+	ldr	r2, [r3, #3280]
 	str	r1, [r2, #4]
-.L1235:
-	.loc 2 2223 0
+.L1242:
 	subs	r6, r6, #1
-	beq	.L1237
-.LVL1046:
-	.loc 2 2224 0
+	beq	.L1244
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1236
-.L1237:
-	.loc 2 2234 0
+	bne	.L1243
+.L1244:
 	ldrh	r3, [r4]
-	ldr	r1, [r8, #2300]
+	ldr	r1, [r8, #2324]
 	ldrh	r0, [r4, #4]
 	lsl	r3, r3, #1
 	ldrh	r2, [r1, r3]
 	sub	r2, r2, r0
 	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2235 0
-	ldrh	r3, [r8, #78]
+	ldrh	r3, [r8, #102]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2236 0
 	mov	r3, #0
 	strb	r3, [r4, #6]
-	.loc 2 2237 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2238 0
 	sub	sp, fp, #32
-.LCFI335:
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL1047:
-.L1236:
-.LCFI336:
-	.loc 2 2226 0
+.L1243:
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1048:
-	.loc 2 2227 0
 	cmn	r0, #1
-	.loc 2 2226 0
 	str	r0, [fp, #-48]
-	.loc 2 2227 0
-	beq	.L1237
-	.loc 2 2229 0
-	ldr	r3, [r8, #2520]
-	.loc 2 2230 0
+	beq	.L1244
+	ldr	r3, [r8, #2544]
 	mov	r1, #1
 	sub	r0, fp, #52
-	.loc 2 2229 0
 	str	r3, [r5, #4]
 	add	r3, r3, #1
 	cmn	r3, #1
 	moveq	r3, r7
-	str	r3, [r8, #2520]
-	.loc 2 2230 0
+	str	r3, [r8, #2544]
 	mov	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1049:
-	.loc 2 2231 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1050:
-	b	.L1235
-.L1246:
+	b	.L1242
+.L1253:
 	.align	2
-.L1245:
+.L1252:
 	.word	.LANCHOR0
 	.word	305419896
-.LFE238:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLoadBbt
@@ -13121,264 +8505,171 @@ FtlSuperblockPowerLostFix:
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB179:
-	.loc 4 173 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI337:
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI338:
 	sub	fp, ip, #4
-.LCFI339:
-	.loc 4 180 0
-	ldr	r4, .L1279
-	.loc 4 186 0
-	ldr	r7, .L1279+4
-	.loc 4 180 0
-	ldr	r3, [r4, #3240]
-	.loc 4 181 0
-	ldr	r6, [r4, #3244]
-	.loc 4 180 0
-	str	r3, [r4, #3228]
-	.loc 4 181 0
-	str	r6, [r4, #3232]
-	.loc 4 183 0
+	ldr	r4, .L1286
+	ldr	r7, .L1286+4
+	ldr	r3, [r4, #3280]
+	ldr	r6, [r4, #3284]
+	str	r3, [r4, #3268]
+	str	r6, [r4, #3272]
 	bl	FtlBbtMemInit
-.LVL1051:
-	.loc 4 184 0
-	ldrh	r5, [r4, #74]
+	ldrh	r5, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
-.LVL1052:
-.L1248:
-	.loc 4 184 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #74]
+.L1255:
+	ldrh	r3, [r4, #98]
 	sub	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1251
-	.loc 4 185 0 is_stmt 1
+	ble	.L1258
 	lsl	r3, r5, #10
-	.loc 4 186 0
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 185 0
-	str	r3, [r4, #3224]
-	.loc 4 186 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1053:
-	.loc 4 187 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	bne	.L1249
-	.loc 4 188 0
-	ldr	r3, [r4, #3224]
-	.loc 4 189 0
+	bne	.L1256
+	ldr	r3, [r4, #3264]
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 188 0
 	add	r3, r3, #1
-	str	r3, [r4, #3224]
-	.loc 4 189 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1054:
-.L1249:
-	.loc 4 191 0
-	ldr	r3, [r4, #3220]
+.L1256:
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1250
-	.loc 4 196 0
+	beq	.L1257
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1250
-	.loc 4 199 0
+	bne	.L1257
 	ldr	r3, [r6, #4]
-	.loc 4 198 0
-	strh	r5, [r4, #128]	@ movhi
-	.loc 4 199 0
-	str	r3, [r4, #136]
-	.loc 4 200 0
+	strh	r5, [r4, #152]	@ movhi
+	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
-	strh	r3, [r4, #132]	@ movhi
-.L1251:
-	.loc 4 216 0
-	ldrh	r3, [r4, #128]
+	strh	r3, [r4, #156]	@ movhi
+.L1258:
+	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1265
-	.loc 4 222 0
-	ldrh	r3, [r4, #132]
+	beq	.L1272
+	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1255
-	.loc 4 224 0
+	beq	.L1262
 	lsl	r3, r3, #10
-	.loc 4 225 0
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1279+4
-	.loc 4 224 0
-	str	r3, [r4, #3224]
-	.loc 4 225 0
+	ldr	r0, .L1286+4
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1055:
-	.loc 4 226 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1255
-	.loc 4 229 0
+	beq	.L1262
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1255
-	.loc 4 229 0 is_stmt 0 discriminator 1
+	bne	.L1262
 	ldr	r3, [r6, #4]
-	ldr	r2, [r4, #136]
+	ldr	r2, [r4, #160]
 	cmp	r3, r2
-	.loc 4 231 0 is_stmt 1 discriminator 1
-	ldrhhi	r2, [r4, #132]
-	.loc 4 232 0 discriminator 1
-	strhi	r3, [r4, #136]
-	.loc 4 233 0 discriminator 1
+	ldrhhi	r2, [r4, #156]
+	strhi	r3, [r4, #160]
 	ldrhhi	r3, [r6, #8]
-	.loc 4 231 0 discriminator 1
-	strhhi	r2, [r4, #128]	@ movhi
-	.loc 4 233 0 discriminator 1
-	strhhi	r3, [r4, #132]	@ movhi
-.L1255:
-	.loc 4 245 0
-	ldr	r7, .L1279+4
-	.loc 4 238 0
+	strhhi	r2, [r4, #152]	@ movhi
+	strhhi	r3, [r4, #156]	@ movhi
+.L1262:
+	ldr	r7, .L1286+4
 	mov	r1, #1
-	ldrh	r0, [r4, #128]
+	ldrh	r0, [r4, #152]
 	bl	FtlGetLastWrittenPage
-.LVL1056:
 	sxth	r5, r0
-.LVL1057:
-	.loc 4 239 0
 	add	r0, r0, #1
-	strh	r0, [r4, #130]	@ movhi
-.L1257:
-	.loc 4 241 0
+	strh	r0, [r4, #154]	@ movhi
+.L1264:
 	cmp	r5, #0
-	bge	.L1260
-	.loc 4 254 0
+	bge	.L1267
 	mov	r2, #254
-	ldr	r1, .L1279+8
-	ldr	r0, .L1279+12
+	ldr	r1, .L1286+8
+	ldr	r0, .L1286+12
 	bl	printk
-.LVL1058:
-.L1259:
-	.loc 4 255 0
+.L1266:
 	ldrh	r3, [r6, #10]
-	.loc 4 257 0
 	ldrh	r0, [r6, #12]
-	.loc 4 255 0
-	strh	r3, [r4, #134]	@ movhi
-	.loc 4 257 0
+	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1262
-	.loc 4 259 0
-	ldr	r2, [r4, #4]
+	beq	.L1269
+	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1262
-	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #18]
+	beq	.L1269
+	ldrh	r3, [r4, #42]
 	lsr	r3, r3, #2
-	.loc 4 261 0 is_stmt 1 discriminator 1
 	cmp	r0, r3
 	cmpcc	r2, r3
-	bcs	.L1262
-	.loc 4 263 0
+	bcs	.L1269
 	bl	FtlSysBlkNumInit
-.LVL1059:
-.L1262:
-	ldr	r6, .L1279+16
-	.loc 4 173 0 discriminator 1
+.L1269:
+	ldr	r6, .L1286+16
 	mov	r5, #0
-.LVL1060:
-	.loc 4 269 0 discriminator 1
-	ldr	r7, .L1279+20
-.L1263:
-	.loc 4 268 0 discriminator 1
-	ldrh	r3, [r4, #30]
+	ldr	r7, .L1286+20
+.L1270:
+	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1264
-	.loc 4 275 0
+	bcc	.L1271
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.LVL1061:
-.L1250:
-	.loc 4 184 0 discriminator 2
+.L1257:
 	sub	r5, r5, #1
-.LVL1062:
 	uxth	r5, r5
-.LVL1063:
-	b	.L1248
-.LVL1064:
-.L1260:
-	.loc 4 243 0
-	ldrh	r3, [r4, #128]
-	.loc 4 245 0
+	b	.L1255
+.L1267:
+	ldrh	r3, [r4, #152]
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 243 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3224]
-	.loc 4 244 0
-	ldr	r3, [r4, #3240]
-	str	r3, [r4, #3228]
-	.loc 4 245 0
+	str	r3, [r4, #3264]
+	ldr	r3, [r4, #3280]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.LVL1065:
-	.loc 4 247 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1258
-	.loc 4 247 0 is_stmt 0 discriminator 1
+	beq	.L1265
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1259
-.L1258:
+	beq	.L1266
+.L1265:
 	sub	r5, r5, #1
-.LVL1066:
 	sxth	r5, r5
-.LVL1067:
-	b	.L1257
-.LVL1068:
-.L1264:
-	.loc 4 269 0 is_stmt 1 discriminator 3
+	b	.L1264
+.L1271:
 	ldrh	r2, [r7]
-	ldr	r1, [r4, #3228]
+	ldr	r1, [r4, #3268]
 	ldr	r0, [r6, #4]!
 	lsl	r2, r2, #2
 	mla	r1, r5, r2, r1
-	.loc 4 268 0 discriminator 3
 	add	r5, r5, #1
-	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1069:
-	b	.L1263
-.LVL1070:
-.L1265:
-	.loc 4 218 0
+	b	.L1270
+.L1272:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1280:
+.L1287:
 	.align	2
-.L1279:
+.L1286:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
+	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+443
 	.word	.LC1
-	.word	.LANCHOR0+152
-	.word	.LANCHOR0+3860
-.LFE179:
+	.word	.LANCHOR0+176
+	.word	.LANCHOR0+3900
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
@@ -13387,322 +8678,191 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB181:
-	.loc 4 317 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI340:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI341:
 	sub	fp, ip, #4
-.LCFI342:
 	sub	sp, sp, #4
-	.loc 4 327 0
 	mov	r7, #0
-.LVL1071:
-	ldr	r8, .L1300
-	.loc 4 325 0
+	ldr	r8, .L1307
 	bl	FtlBbtMemInit
-.LVL1072:
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1073:
-	.loc 4 327 0
-	sub	r5, r8, #156
+	sub	r5, r8, #180
 	sub	r9, r8, #18
 	mov	r4, r5
-.L1282:
-	.loc 4 327 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r5, #30]
+.L1289:
+	ldrh	r3, [r5, #54]
 	cmp	r7, r3
-	bcc	.L1288
+	bcc	.L1295
 	mov	r0, #0
-.L1289:
-	.loc 4 381 0 is_stmt 1 discriminator 1
-	ldrh	r2, [r4, #90]
+.L1296:
+	ldrh	r2, [r4, #114]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1290
-	.loc 4 387 0
-	ldrh	r5, [r4, #140]
-	.loc 4 396 0
+	bhi	.L1297
+	ldrh	r5, [r4, #164]
 	movw	r6, #65535
-	.loc 4 387 0
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1291:
-	.loc 4 387 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #140]
+.L1298:
+	ldrh	r3, [r4, #164]
 	sub	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1295
-	.loc 4 389 0 is_stmt 1
+	ble	.L1302
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1074:
 	cmp	r0, #1
-	beq	.L1292
-	.loc 4 391 0
+	beq	.L1299
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1075:
 	cmp	r0, #0
-	beq	.L1293
-	.loc 4 393 0
+	beq	.L1300
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1076:
-.L1292:
-	.loc 4 387 0 discriminator 2
+.L1299:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1291
-.L1288:
-	.loc 4 331 0
+	b	.L1298
+.L1295:
 	ldrh	r3, [r9, #2]!
 	movw	r2, #65535
-	.loc 4 328 0
-	ldr	r0, [r5, #3240]
-	.loc 4 329 0
-	ldr	r10, [r5, #3244]
-	.loc 4 331 0
+	ldr	r0, [r5, #3280]
+	ldr	r10, [r5, #3284]
 	cmp	r3, r2
-	.loc 4 328 0
-	str	r0, [r5, #3228]
-	.loc 4 329 0
-	str	r10, [r5, #3232]
-	.loc 4 331 0
-	beq	.L1283
-	.loc 4 333 0
-	ldrh	ip, [r5, #74]
-	.loc 4 335 0
+	str	r0, [r5, #3268]
+	str	r10, [r5, #3272]
+	beq	.L1290
+	ldrh	ip, [r5, #98]
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1300+4
-	.loc 4 333 0
+	ldr	r0, .L1307+4
 	mla	ip, r7, ip, r3
-.LVL1077:
-	.loc 4 334 0
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
-	str	r3, [r5, #3224]
-	.loc 4 335 0
+	str	r3, [r5, #3264]
 	bl	FlashReadPages
-.LVL1078:
-	.loc 4 336 0
-	ldrh	r2, [r5, #74]
-	ldr	r1, [r5, #3228]
+	ldrh	r2, [r5, #98]
+	ldr	r1, [r5, #3268]
 	ldr	r0, [r8]
 	add	r2, r2, #7
 	asr	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1079:
 	ldr	ip, [fp, #-44]
-.LVL1080:
-.L1284:
-	.loc 4 376 0 discriminator 2
+.L1291:
 	uxth	r0, ip
-	.loc 4 327 0 discriminator 2
 	add	r7, r7, #1
 	add	r8, r8, #4
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1081:
-	b	.L1282
-.L1283:
-	.loc 4 340 0
+	b	.L1289
+.L1290:
 	mov	r1, r7
 	bl	FlashGetBadBlockList
-.LVL1082:
-	.loc 4 341 0
 	ldr	r1, [r8]
-	ldr	r0, [r5, #3228]
+	ldr	r0, [r5, #3268]
 	bl	FtlBbt2Bitmap
-.LVL1083:
-	.loc 4 343 0
-	ldrh	r6, [r5, #74]
-.L1286:
-	.loc 4 347 0
+	ldrh	r6, [r5, #98]
+.L1293:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1285:
-	.loc 4 345 0
-	ldrh	r0, [r4, #74]
+.L1292:
+	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r7, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1084:
 	cmp	r0, #1
-	beq	.L1286
-.LBB488:
-.LBB489:
-.LBB490:
-	.loc 1 202 0
+	beq	.L1293
 	mov	r1, #16
-	ldr	r0, [r4, #3244]
-.LBE490:
-.LBE489:
-.LBE488:
-	.loc 4 349 0
+	ldr	r0, [r4, #3284]
 	strh	r6, [r9]	@ movhi
-.LBB493:
-.LBB492:
-.LBB491:
-	.loc 1 202 0
 	bl	__memzero
-.LVL1085:
-.LBE491:
-.LBE492:
-.LBE493:
-.LBB494:
-.LBB495:
-.LBB496:
 	mov	r1, #4096
-	ldr	r0, [r4, #3240]
+	ldr	r0, [r4, #3280]
 	bl	__memzero
-.LVL1086:
-.LBE496:
-.LBE495:
-.LBE494:
-	.loc 4 352 0
-	ldr	r3, .L1300+8
+	ldr	r3, .L1307+8
 	strh	r3, [r10]	@ movhi
-	.loc 4 353 0
 	mov	r3, #0
 	str	r3, [r10, #4]
-	.loc 4 354 0
 	ldrh	r3, [r9]
-	.loc 4 355 0
-	ldrh	ip, [r4, #74]
-	.loc 4 354 0
+	ldrh	ip, [r4, #98]
 	strh	r3, [r10, #2]	@ movhi
-	.loc 4 355 0
 	ldrh	r3, [r9]
-	.loc 4 357 0
 	ldr	r1, [r8]
-	ldr	r0, [r4, #3228]
-	.loc 4 355 0
+	ldr	r0, [r4, #3268]
 	mla	ip, r7, ip, r3
-.LVL1087:
-	.loc 4 356 0
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
-	str	r3, [r4, #3224]
-	.loc 4 357 0
-	ldr	r3, .L1300+12
+	str	r3, [r4, #3264]
+	ldr	r3, .L1307+12
 	ldrh	r2, [r3]
 	lsl	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1088:
-	.loc 4 358 0
 	mov	r2, #1
-	ldr	r0, .L1300+4
+	ldr	r0, .L1307+4
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1089:
-	.loc 4 359 0
 	mov	r3, #1
-	ldr	r0, .L1300+4
+	ldr	r0, .L1307+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1090:
-	.loc 4 360 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	ldr	ip, [fp, #-44]
-.LVL1091:
 	cmn	r3, #1
-	bne	.L1284
-	.loc 4 362 0
+	bne	.L1291
 	uxth	r0, ip
 	bl	FtlBbmMapBadBlock
-.LVL1092:
-	.loc 4 363 0
-	b	.L1285
-.L1290:
-	.loc 4 383 0 discriminator 3
+	b	.L1292
+.L1297:
 	uxth	r0, r0
 	bl	FtlBbmMapBadBlock
-.LVL1093:
 	mov	r0, r5
-	b	.L1289
-.L1293:
-	.loc 4 396 0
-	ldrh	r3, [r4, #128]
+	b	.L1296
+.L1300:
+	ldrh	r3, [r4, #152]
 	cmp	r3, r6
-	.loc 4 398 0
-	strheq	r5, [r4, #128]	@ movhi
-	beq	.L1292
-.L1294:
-	.loc 4 402 0
-	strh	r5, [r4, #132]	@ movhi
-.L1295:
-	.loc 4 414 0
-	ldrh	r3, [r4, #128]
-	.loc 4 411 0
+	strheq	r5, [r4, #152]	@ movhi
+	beq	.L1299
+.L1301:
+	strh	r5, [r4, #156]	@ movhi
+.L1302:
+	ldrh	r3, [r4, #152]
 	mov	r5, #0
-	.loc 4 414 0
-	ldr	r0, [r4, #3760]
-	.loc 4 416 0
+	ldr	r0, [r4, #3800]
 	mov	r1, #1
-	.loc 4 413 0
-	str	r5, [r4, #136]
-	.loc 4 416 0
+	str	r5, [r4, #160]
 	mov	r2, #2
-	.loc 4 411 0
-	strh	r5, [r4, #130]	@ movhi
-	.loc 4 414 0
+	strh	r5, [r4, #154]	@ movhi
 	lsl	r3, r3, #10
 	str	r3, [r0, #4]
-	.loc 4 415 0
-	ldrh	r3, [r4, #132]
+	ldrh	r3, [r4, #156]
 	lsl	r3, r3, #10
 	str	r3, [r0, #24]
-	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1094:
-	.loc 4 418 0
-	ldrh	r0, [r4, #128]
+	ldrh	r0, [r4, #152]
 	bl	FtlBbmMapBadBlock
-.LVL1095:
-	.loc 4 419 0
-	ldrh	r0, [r4, #132]
+	ldrh	r0, [r4, #156]
 	bl	FtlBbmMapBadBlock
-.LVL1096:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1097:
-	.loc 4 422 0
-	ldr	r3, [r4, #136]
-	.loc 4 425 0
-	ldrh	r2, [r4, #132]
-	.loc 4 426 0
-	strh	r5, [r4, #130]	@ movhi
-	.loc 4 422 0
+	ldr	r3, [r4, #160]
+	ldrh	r2, [r4, #156]
+	strh	r5, [r4, #154]	@ movhi
 	add	r3, r3, #1
-	str	r3, [r4, #136]
-	.loc 4 424 0
-	ldrh	r3, [r4, #128]
-	.loc 4 425 0
-	strh	r2, [r4, #128]	@ movhi
-	.loc 4 427 0
-	strh	r3, [r4, #132]	@ movhi
-	.loc 4 429 0
+	str	r3, [r4, #160]
+	ldrh	r3, [r4, #152]
+	strh	r2, [r4, #152]	@ movhi
+	strh	r3, [r4, #156]	@ movhi
 	bl	FtlBbmTblFlush
-.LVL1098:
-	.loc 4 432 0
 	mov	r0, r5
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1301:
+.L1308:
 	.align	2
-.L1300:
-	.word	.LANCHOR0+156
-	.word	.LANCHOR0+3220
+.L1307:
+	.word	.LANCHOR0+180
+	.word	.LANCHOR0+3260
 	.word	-3872
-	.word	.LANCHOR0+3860
-.LFE181:
+	.word	.LANCHOR0+3900
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.align	2
 	.global	FtlVendorPartWrite
@@ -13711,161 +8871,96 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB213:
-	.loc 2 835 0
 	@ args = 0, pretend = 0, frame = 100
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1099:
 	mov	ip, sp
-.LCFI343:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI344:
 	sub	fp, ip, #4
-.LCFI345:
 	sub	sp, sp, #100
-	.loc 2 835 0
 	mov	r7, r0
-	.loc 2 843 0
-	ldr	r4, .L1311
-	.loc 2 835 0
+	ldr	r4, .L1318
 	mov	r5, r1
 	str	r2, [fp, #-128]
-	.loc 2 843 0
 	add	r2, r0, r1
-.LVL1100:
-	ldrh	r3, [r4, #72]
+	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	.loc 2 844 0
 	mvnhi	r8, #0
-	.loc 2 843 0
-	bhi	.L1302
-	.loc 2 840 0
-	ldrh	r6, [r4, #84]
+	bhi	.L1309
+	ldrh	r6, [r4, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
-.LVL1101:
 	lsl	r10, r6, #2
-.LVL1102:
-.L1304:
-	.loc 2 846 0
+.L1311:
 	cmp	r5, #0
-	bne	.L1309
-.L1302:
-	.loc 2 869 0
+	bne	.L1316
+.L1309:
 	mov	r0, r8
 	sub	sp, fp, #40
-.LCFI346:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1103:
-.L1309:
-.LCFI347:
-	.loc 2 847 0
-	ldr	r3, [r4, #3844]
-.LVL1104:
-	.loc 2 848 0
+.L1316:
+	ldr	r3, [r4, #3884]
 	mov	r0, r7
-	ldrh	r2, [r4, #34]
-	.loc 2 847 0
+	ldrh	r2, [r4, #58]
 	ldr	ip, [r3, r10]
-.LVL1105:
-	.loc 2 848 0
 	mov	r1, r2
 	str	r2, [fp, #-136]
-	.loc 2 847 0
 	str	ip, [fp, #-140]
-	.loc 2 848 0
 	bl	__umodsi3
-.LVL1106:
-	.loc 2 849 0
 	ldr	r2, [fp, #-136]
-	.loc 2 850 0
 	ldr	ip, [fp, #-140]
-.LVL1107:
-	.loc 2 848 0
 	str	r0, [fp, #-132]
-	.loc 2 849 0
 	sub	r3, r2, r0
 	uxth	r9, r3
-	.loc 2 850 0
 	cmp	r5, r9
-	.loc 2 851 0
 	uxthcc	r9, r5
-	.loc 2 852 0
 	cmp	ip, #0
 	cmpne	r9, r2
 	movne	r1, #1
 	moveq	r1, #0
-	beq	.L1306
-	.loc 2 854 0
-	ldr	r2, [r4, #3808]
-	.loc 2 856 0
+	beq	.L1313
+	ldr	r2, [r4, #3848]
 	sub	r0, fp, #124
-	.loc 2 853 0
 	str	ip, [fp, #-120]
-	.loc 2 854 0
 	str	r2, [fp, #-116]
-	.loc 2 855 0
 	sub	r2, fp, #104
 	str	r2, [fp, #-112]
-	.loc 2 856 0
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1108:
-.L1307:
-	.loc 2 860 0
+.L1314:
 	ldr	r3, [fp, #-132]
 	lsl	ip, r9, #9
-	ldr	r0, [r4, #3808]
-	.loc 2 864 0
+	ldr	r0, [r4, #3848]
 	sub	r5, r5, r9
-	.loc 2 860 0
 	mov	r2, ip
 	ldr	r1, [fp, #-128]
 	str	ip, [fp, #-136]
-	.loc 2 865 0
 	add	r7, r7, r9
 	add	r10, r10, #4
-	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1109:
-	.loc 2 861 0
 	mov	r1, r6
-	ldr	r2, [r4, #3808]
-	ldr	r0, .L1311+4
-	.loc 2 863 0
+	ldr	r2, [r4, #3848]
+	ldr	r0, .L1318+4
 	add	r6, r6, #1
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1110:
-	.loc 2 866 0
 	ldr	r3, [fp, #-128]
-.LVL1111:
-	.loc 2 862 0
 	cmn	r0, #1
-	.loc 2 866 0
 	ldr	ip, [fp, #-136]
-	.loc 2 862 0
 	mvneq	r8, #0
-	.loc 2 866 0
 	add	r3, r3, ip
 	str	r3, [fp, #-128]
-	b	.L1304
-.LVL1112:
-.L1306:
-	.loc 2 858 0
-	ldrh	r2, [r4, #86]
-	ldr	r0, [r4, #3808]
+	b	.L1311
+.L1313:
+	ldrh	r2, [r4, #110]
+	ldr	r0, [r4, #3848]
 	bl	ftl_memset
-.LVL1113:
-	b	.L1307
-.L1312:
+	b	.L1314
+.L1319:
 	.align	2
-.L1311:
+.L1318:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3908
-.LFE213:
+	.word	.LANCHOR0+3948
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
@@ -13874,82 +8969,54 @@ FtlVendorPartWrite:
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB236:
-	.loc 2 2159 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI348:
 	push	{fp, ip, lr, pc}
-.LCFI349:
 	sub	fp, ip, #4
-.LCFI350:
-	.loc 2 2160 0
-	ldr	r3, .L1315
-	ldr	r2, .L1315+4
-	ldr	r1, [r3, #2612]
+	ldr	r3, .L1322
+	ldr	r2, .L1322+4
+	ldr	r1, [r3, #2636]
 	cmp	r1, r2
 	ldmfdne	sp, {fp, sp, pc}
-.LBB499:
-.LBB500:
-	.loc 2 2161 0
-	ldr	r2, .L1315+8
-	.loc 2 2174 0
+	ldr	r2, .L1322+8
 	mov	r1, #1
 	mov	r0, #0
-	.loc 2 2161 0
-	str	r2, [r3, #2616]
-	.loc 2 2162 0
-	ldr	r2, [r3, #2508]
-	str	r2, [r3, #2700]
-	.loc 2 2163 0
-	ldr	r2, [r3, #2512]
-	str	r2, [r3, #2704]
-	.loc 2 2164 0
-	ldr	r2, [r3, #2504]
-	str	r2, [r3, #2620]
-	.loc 2 2165 0
-	ldr	r2, [r3, #2492]
-	str	r2, [r3, #2624]
-	.loc 2 2166 0
-	ldr	r2, [r3, #2484]
-	str	r2, [r3, #2628]
-	.loc 2 2167 0
-	ldr	r2, [r3, #2500]
-	str	r2, [r3, #2632]
-	.loc 2 2168 0
-	ldr	r2, [r3, #2528]
 	str	r2, [r3, #2640]
-	.loc 2 2169 0
+	ldr	r2, [r3, #2532]
+	str	r2, [r3, #2724]
 	ldr	r2, [r3, #2536]
+	str	r2, [r3, #2728]
+	ldr	r2, [r3, #2528]
 	str	r2, [r3, #2644]
-	.loc 2 2170 0
-	ldr	r2, [r3, #2488]
+	ldr	r2, [r3, #2516]
 	str	r2, [r3, #2648]
-	.loc 2 2171 0
-	ldr	r2, [r3, #2496]
+	ldr	r2, [r3, #2508]
 	str	r2, [r3, #2652]
-	.loc 2 2172 0
-	ldr	r2, [r3, #2540]
+	ldr	r2, [r3, #2524]
 	str	r2, [r3, #2656]
-	.loc 2 2173 0
-	ldr	r2, [r3, #2544]
-	str	r2, [r3, #2660]
-	.loc 2 2174 0
-	ldr	r2, .L1315+12
+	ldr	r2, [r3, #2552]
+	str	r2, [r3, #2664]
+	ldr	r2, [r3, #2560]
+	str	r2, [r3, #2668]
+	ldr	r2, [r3, #2512]
+	str	r2, [r3, #2672]
+	ldr	r2, [r3, #2520]
+	str	r2, [r3, #2676]
+	ldr	r2, [r3, #2564]
+	str	r2, [r3, #2680]
+	ldr	r2, [r3, #2568]
+	str	r2, [r3, #2684]
+	ldr	r2, .L1322+12
 	bl	FtlVendorPartWrite
-.LVL1114:
 	ldmfd	sp, {fp, sp, pc}
-.L1316:
+.L1323:
 	.align	2
-.L1315:
+.L1322:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
-	.word	.LANCHOR0+2612
-.LBE500:
-.LBE499:
-.LFE236:
+	.word	.LANCHOR0+2636
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
 	.global	FtlEctTblFlush
@@ -13958,89 +9025,55 @@ Ftl_save_ext_data:
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB215:
-	.loc 2 910 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1115:
 	mov	ip, sp
-.LCFI351:
 	push	{fp, ip, lr, pc}
-.LCFI352:
 	sub	fp, ip, #4
-.LCFI353:
-	.loc 2 913 0
-	ldr	r2, .L1322
-	ldrh	r3, [r2]
+	ldr	r2, .L1329
+	ldrh	r3, [r2, #-8]
 	cmp	r3, #31
-	.loc 2 914 0
 	addls	r3, r3, #1
-	.loc 2 911 0
 	movhi	r2, #32
-.LVL1116:
-	.loc 2 914 0
-	strhls	r3, [r2]	@ movhi
-.LVL1117:
-	.loc 2 915 0
+	strhls	r3, [r2, #-8]	@ movhi
 	movls	r2, #1
-.LVL1118:
-	.loc 2 917 0
 	cmp	r0, #0
-	ldr	r3, .L1322+4
-	bne	.L1319
-	.loc 2 917 0 is_stmt 0 discriminator 1
-	ldr	r1, [r3, #3820]
+	ldr	r3, .L1329+4
+	bne	.L1326
+	ldr	r1, [r3, #3860]
 	ldr	r0, [r1, #20]
-.LVL1119:
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
-.LVL1120:
 	cmp	r1, r2
-	bcc	.L1320
-.LVL1121:
-.L1319:
-	.loc 2 919 0 is_stmt 1
-	ldr	r2, [r3, #3820]
-.LVL1122:
-	.loc 2 924 0
+	bcc	.L1327
+.L1326:
+	ldr	r2, [r3, #3860]
 	mov	r0, #64
-.LVL1123:
-	.loc 2 919 0
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	.loc 2 920 0
-	ldr	r1, .L1322+8
+	ldr	r1, .L1329+8
 	str	r1, [r2]
-	.loc 2 921 0
-	movw	r1, #3812
+	movw	r1, #3852
 	ldrh	r1, [r3, r1]
-	ldr	r2, [r3, #3820]
+	ldr	r2, [r3, #3860]
 	lsl	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	add	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 923 0
 	mov	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1124:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1125:
-.L1320:
-	.loc 2 927 0
+.L1327:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1323:
+.L1330:
 	.align	2
-.L1322:
-	.word	.LANCHOR3-4080
+.L1329:
+	.word	.LANCHOR3-4032
 	.word	.LANCHOR0
 	.word	1112818501
-.LFE215:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.align	2
 	.global	FtlVendorPartRead
@@ -14049,150 +9082,85 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB214:
-	.loc 2 872 0
 	@ args = 0, pretend = 0, frame = 92
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1126:
 	mov	ip, sp
-.LCFI354:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI355:
 	sub	fp, ip, #4
-.LCFI356:
 	sub	sp, sp, #92
-	.loc 2 872 0
 	mov	r9, r2
-	.loc 2 881 0
-	ldr	r5, .L1333
-	.loc 2 872 0
+	ldr	r5, .L1340
 	mov	r7, r1
-	.loc 2 881 0
 	add	r1, r0, r1
-.LVL1127:
-	.loc 2 872 0
 	mov	r10, r0
-	.loc 2 881 0
-	ldrh	r2, [r5, #72]
-.LVL1128:
+	ldrh	r2, [r5, #96]
 	cmp	r1, r2
-	.loc 2 882 0
 	mvnhi	r8, #0
-	.loc 2 881 0
-	bhi	.L1324
-	.loc 2 877 0
-	ldrh	r6, [r5, #84]
+	bhi	.L1331
+	ldrh	r6, [r5, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
-.LVL1129:
 	lsl	r6, r6, #2
-.LVL1130:
-.L1326:
-	.loc 2 883 0
+.L1333:
 	cmp	r7, #0
-	bne	.L1331
-.L1324:
-	.loc 2 906 0
+	bne	.L1338
+.L1331:
 	mov	r0, r8
 	sub	sp, fp, #40
-.LCFI357:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1131:
-.L1331:
-.LCFI358:
-	.loc 2 884 0
-	ldr	r2, [r5, #3844]
-	.loc 2 885 0
+.L1338:
+	ldr	r2, [r5, #3884]
 	mov	r0, r10
-	ldrh	r4, [r5, #34]
-.LVL1132:
-	.loc 2 884 0
+	ldrh	r4, [r5, #58]
 	ldr	ip, [r2, r6]
-.LVL1133:
-	.loc 2 885 0
 	mov	r1, r4
-	.loc 2 884 0
 	str	ip, [fp, #-128]
-	.loc 2 885 0
 	bl	__umodsi3
-.LVL1134:
-	.loc 2 886 0
 	sub	r4, r4, r0
-	.loc 2 887 0
 	ldr	ip, [fp, #-128]
-.LVL1135:
-	.loc 2 886 0
 	uxth	r4, r4
-.LVL1136:
 	str	r0, [fp, #-132]
-	.loc 2 887 0
 	cmp	r7, r4
-	.loc 2 888 0
 	uxthcc	r4, r7
-	.loc 2 889 0
 	cmp	ip, #0
 	lsl	r3, r4, #9
 	str	r3, [fp, #-128]
-	beq	.L1328
-	.loc 2 891 0
-	ldr	r2, [r5, #3808]
-	.loc 2 892 0
+	beq	.L1335
+	ldr	r2, [r5, #3848]
 	sub	r3, fp, #104
-	.loc 2 893 0
 	sub	r0, fp, #124
-	.loc 2 892 0
 	str	r3, [fp, #-112]
-	.loc 2 890 0
 	str	ip, [fp, #-120]
-	.loc 2 891 0
 	str	r2, [fp, #-116]
-	.loc 2 893 0
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1137:
-	.loc 2 896 0
-	ldr	r1, [r5, #3808]
+	ldr	r1, [r5, #3848]
 	mov	r0, r9
 	ldr	r3, [fp, #-132]
-	.loc 2 894 0
 	ldr	r2, [fp, #-124]
-	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
-	.loc 2 895 0
 	cmn	r2, #1
-	.loc 2 896 0
 	lsl	r2, r4, #9
-	.loc 2 895 0
 	mvneq	r8, #0
-	.loc 2 896 0
 	bl	ftl_memcpy
-.LVL1138:
-.L1330:
-	.loc 2 903 0
+.L1337:
 	ldr	r3, [fp, #-128]
-	.loc 2 901 0
 	sub	r7, r7, r4
-	.loc 2 902 0
 	add	r10, r10, r4
 	add	r6, r6, #4
-	.loc 2 903 0
 	add	r9, r9, r3
-	b	.L1326
-.LVL1139:
-.L1328:
-	.loc 2 898 0
+	b	.L1333
+.L1335:
 	lsl	r2, r4, #9
 	mov	r1, ip
 	mov	r0, r9
 	bl	ftl_memset
-.LVL1140:
-	b	.L1330
-.L1334:
+	b	.L1337
+.L1341:
 	.align	2
-.L1333:
+.L1340:
 	.word	.LANCHOR0
-.LFE214:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
@@ -14201,58 +9169,40 @@ FtlVendorPartRead:
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB221:
-	.loc 2 1383 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI359:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI360:
 	sub	fp, ip, #4
-.LCFI361:
-	.loc 2 1384 0
-	ldr	r4, .L1337
-	movw	r5, #3812
+	ldr	r4, .L1344
+	movw	r5, #3852
 	mov	r0, #64
-	ldr	r2, [r4, #3820]
+	ldr	r2, [r4, #3860]
 	ldrh	r1, [r4, r5]
 	bl	FtlVendorPartRead
-.LVL1141:
-	.loc 2 1385 0
-	ldr	r3, [r4, #3820]
+	ldr	r3, [r4, #3860]
 	ldr	r2, [r3]
-	ldr	r3, .L1337+4
+	ldr	r3, .L1344+4
 	cmp	r2, r3
-	beq	.L1336
-.LBB503:
-.LBB504:
-	.loc 2 1387 0
-	ldr	r1, .L1337+8
-	ldr	r0, .L1337+12
+	beq	.L1343
+	ldr	r1, .L1344+8
+	ldr	r0, .L1344+12
 	bl	printk
-.LVL1142:
-	.loc 2 1388 0
 	ldrh	r2, [r4, r5]
 	mov	r1, #0
-	ldr	r0, [r4, #3820]
+	ldr	r0, [r4, #3860]
 	lsl	r2, r2, #9
 	bl	ftl_memset
-.LVL1143:
-.L1336:
-.LBE504:
-.LBE503:
-	.loc 2 1393 0
+.L1343:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1338:
+.L1345:
 	.align	2
-.L1337:
+.L1344:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC99
+	.word	.LC100
 	.word	.LC71
-.LFE221:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.align	2
 	.global	Ftl_load_ext_data
@@ -14261,100 +9211,67 @@ FtlLoadEctTbl:
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB237:
-	.loc 2 2179 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI362:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI363:
 	sub	fp, ip, #4
-.LCFI364:
-	.loc 2 2180 0
-	ldr	r4, .L1342
+	ldr	r4, .L1349
 	mov	r1, #1
 	mov	r0, #0
-	ldr	r2, .L1342+4
+	ldr	r2, .L1349+4
 	bl	FtlVendorPartRead
-.LVL1144:
-	.loc 2 2181 0
-	ldr	r5, .L1342+8
-	ldr	r3, [r4, #2612]
+	ldr	r5, .L1349+8
+	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1340
-.LBB510:
-.LBB511:
-.LBB512:
-	.loc 1 202 0
+	beq	.L1347
 	mov	r1, #512
-	ldr	r0, .L1342+4
+	ldr	r0, .L1349+4
 	bl	__memzero
-.LVL1145:
-.LBE512:
-.LBE511:
-.LBE510:
-	.loc 2 2183 0
-	str	r5, [r4, #2612]
-.L1340:
-	.loc 2 2186 0
-	ldr	r3, [r4, #2612]
+	str	r5, [r4, #2636]
+.L1347:
+	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1341
-	.loc 2 2187 0
-	ldr	r3, [r4, #2700]
-	str	r3, [r4, #2508]
-	.loc 2 2188 0
-	ldr	r3, [r4, #2704]
-	str	r3, [r4, #2512]
-	.loc 2 2189 0
-	ldr	r3, [r4, #2620]
-	str	r3, [r4, #2504]
-	.loc 2 2190 0
-	ldr	r3, [r4, #2624]
-	str	r3, [r4, #2492]
-	.loc 2 2191 0
-	ldr	r3, [r4, #2628]
-	str	r3, [r4, #2484]
-	.loc 2 2192 0
-	ldr	r3, [r4, #2632]
-	str	r3, [r4, #2500]
-	.loc 2 2193 0
-	ldr	r3, [r4, #2640]
-	str	r3, [r4, #2528]
-	.loc 2 2194 0
-	ldr	r3, [r4, #2644]
+	bne	.L1348
+	ldr	r3, [r4, #2724]
+	str	r3, [r4, #2532]
+	ldr	r3, [r4, #2728]
 	str	r3, [r4, #2536]
-	.loc 2 2195 0
+	ldr	r3, [r4, #2644]
+	str	r3, [r4, #2528]
 	ldr	r3, [r4, #2648]
-	str	r3, [r4, #2488]
-	.loc 2 2196 0
+	str	r3, [r4, #2516]
 	ldr	r3, [r4, #2652]
-	str	r3, [r4, #2496]
-	.loc 2 2197 0
+	str	r3, [r4, #2508]
 	ldr	r3, [r4, #2656]
-	str	r3, [r4, #2540]
-	.loc 2 2198 0
-	ldr	r3, [r4, #2660]
-	str	r3, [r4, #2544]
-.L1341:
-	.loc 2 2201 0
-	ldrh	r2, [r4, #68]
-	ldr	r3, [r4, #2528]
-	ldr	r0, [r4, #2524]
-	ldrh	r1, [r4, #16]
+	str	r3, [r4, #2524]
+	ldr	r3, [r4, #2664]
+	str	r3, [r4, #2552]
+	ldr	r3, [r4, #2668]
+	str	r3, [r4, #2560]
+	ldr	r3, [r4, #2672]
+	str	r3, [r4, #2512]
+	ldr	r3, [r4, #2676]
+	str	r3, [r4, #2520]
+	ldr	r3, [r4, #2680]
+	str	r3, [r4, #2564]
+	ldr	r3, [r4, #2684]
+	str	r3, [r4, #2568]
+.L1348:
+	ldrh	r2, [r4, #92]
+	ldr	r3, [r4, #2552]
+	ldr	r0, [r4, #2548]
+	ldrh	r1, [r4, #40]
 	mla	r0, r0, r2, r3
 	bl	__udivsi3
-.LVL1146:
-	str	r0, [r4, #2532]
+	str	r0, [r4, #2556]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1343:
+.L1350:
 	.align	2
-.L1342:
+.L1349:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2612
+	.word	.LANCHOR0+2636
 	.word	1179929683
-.LFE237:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.align	2
 	.global	FtlVpcTblFlush
@@ -14363,145 +9280,88 @@ Ftl_load_ext_data:
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB219:
-	.loc 2 1053 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI365:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI366:
 	sub	fp, ip, #4
-.LCFI367:
-	.loc 2 1059 0
-	ldr	r4, .L1356
-	.loc 2 1065 0
+	ldr	r4, .L1363
 	mov	r6, #0
-	.loc 2 1096 0
 	mov	r1, #255
-	.loc 2 1062 0
-	ldr	r5, .L1356+4
-	.loc 2 1059 0
-	ldr	r3, [r4, #3240]
-	.loc 2 1060 0
-	ldr	r7, [r4, #3244]
-	.loc 2 1070 0
+	ldr	r10, .L1363+4
+	ldr	r3, [r4, #3280]
+	add	r5, r4, #2576
+	ldr	r7, [r4, #3284]
 	sub	r8, r5, #308
-	.loc 2 1124 0
-	ldr	r10, .L1356+8
-	.loc 2 1059 0
-	str	r3, [r4, #3228]
-	.loc 2 1062 0
-	movw	r3, #2552
-	ldrh	r3, [r4, r3]
-	.loc 2 1105 0
-	add	r9, r5, #668
-	.loc 2 1060 0
-	str	r7, [r4, #3232]
-	.loc 2 1066 0
+	add	r9, r5, #684
+	str	r3, [r4, #3268]
+	ldrh	r3, [r5]
+	str	r7, [r4, #3272]
 	str	r6, [r7, #12]
-	.loc 2 1062 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1063 0
-	ldr	r3, .L1356+12
+	ldr	r3, .L1363+8
 	strh	r3, [r7]	@ movhi
-	.loc 2 1064 0
-	ldr	r3, [r4, #2560]
-	.loc 2 1065 0
+	ldr	r3, [r4, #2584]
 	str	r6, [r7, #8]
-	.loc 2 1074 0
 	ldrh	r2, [r5, #-226]
-	.loc 2 1064 0
 	str	r3, [r7, #4]
-	.loc 2 1068 0
-	ldr	r3, .L1356+16
-	str	r3, [r4, #2244]
-	.loc 2 1069 0
-	ldr	r3, .L1356+20
-	str	r3, [r4, #2248]
-	.loc 2 1070 0
+	ldr	r3, .L1363+12
+	str	r3, [r4, #2268]
+	ldr	r3, .L1363+16
+	str	r3, [r4, #2272]
 	ldrh	r3, [r5, #6]
 	strh	r3, [r8, #8]	@ movhi
-	.loc 2 1071 0
-	ldrh	r3, [r4, #30]
-	strb	r3, [r4, #2254]
-	.loc 2 1073 0
-	movw	r3, #2324
+	ldrh	r3, [r4, #54]
+	strb	r3, [r4, #2278]
+	movw	r3, #2348
 	ldrh	r3, [r4, r3]
 	strh	r3, [r8, #14]	@ movhi
-	.loc 2 1074 0
-	ldrb	r3, [r4, #2330]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2354]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1078 0
 	ldrh	r2, [r5, #-178]
-	.loc 2 1074 0
 	strh	r3, [r8, #16]	@ movhi
-	.loc 2 1075 0
-	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
-	strb	r3, [r4, #2255]
-	.loc 2 1077 0
-	movw	r3, #2372
+	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
+	strb	r3, [r4, #2279]
+	movw	r3, #2396
 	ldrh	r3, [r4, r3]
 	strh	r3, [r8, #18]	@ movhi
-	.loc 2 1078 0
-	ldrb	r3, [r4, #2378]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2402]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
 	strh	r3, [r8, #20]	@ movhi
-	.loc 2 1079 0
-	ldrb	r3, [r4, #2380]	@ zero_extendqisi2
-	strb	r3, [r4, #2256]
-	.loc 2 1081 0
-	movw	r3, #2420
+	ldrb	r3, [r4, #2404]	@ zero_extendqisi2
+	strb	r3, [r4, #2280]
+	movw	r3, #2444
 	ldrh	r3, [r4, r3]
 	strh	r3, [r8, #22]	@ movhi
-	.loc 2 1082 0
 	ldrh	r2, [r5, #-130]
-	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
-	.loc 2 1096 0
-	ldr	r0, [r4, #3228]
-	.loc 2 1082 0
+	ldrb	r3, [r4, #2450]	@ zero_extendqisi2
+	ldr	r0, [r4, #3268]
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1096 0
-	ldrh	r2, [r4, #86]
-	.loc 2 1082 0
+	ldrh	r2, [r4, #110]
 	strh	r3, [r8, #24]	@ movhi
-	.loc 2 1083 0
-	ldrb	r3, [r4, #2428]	@ zero_extendqisi2
-	strb	r3, [r4, #2257]
-	.loc 2 1085 0
-	ldr	r3, [r4, #2524]
-	str	r3, [r4, #2276]
-	.loc 2 1090 0
-	ldr	r3, [r4, #2516]
-	str	r3, [r4, #2284]
-	.loc 2 1091 0
-	ldr	r3, [r4, #2520]
-	str	r3, [r4, #2280]
-	.loc 2 1096 0
+	ldrb	r3, [r4, #2452]	@ zero_extendqisi2
+	strb	r3, [r4, #2281]
+	ldr	r3, [r4, #2548]
+	str	r3, [r4, #2300]
+	ldr	r3, [r4, #2540]
+	str	r3, [r4, #2308]
+	ldr	r3, [r4, #2544]
+	str	r3, [r4, #2304]
 	bl	ftl_memset
-.LVL1147:
-	.loc 2 1097 0
 	mov	r1, r8
 	mov	r2, #48
-	ldr	r0, [r4, #3228]
-	.loc 2 1054 0
+	ldr	r0, [r4, #3268]
 	movw	r8, #65535
-.LVL1148:
-	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1149:
-	.loc 2 1098 0
-	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #3228]
-	ldr	r1, [r4, #2300]
+	ldrh	r2, [r4, #40]
+	ldr	r0, [r4, #3268]
+	ldr	r1, [r4, #2324]
 	lsl	r2, r2, #1
 	add	r0, r0, #48
 	bl	ftl_memcpy
-.LVL1150:
-	.loc 2 1099 0
-	ldrh	r0, [r4, #16]
-	ldr	r3, [r4, #3228]
-	ldr	r1, [r4]
+	ldrh	r0, [r4, #40]
+	ldr	r3, [r4, #3268]
+	ldr	r1, [r4, #24]
 	lsr	r2, r0, #3
 	add	r0, r0, #24
 	lsl	r0, r0, #1
@@ -14509,151 +9369,99 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r3, r0
 	bl	ftl_memcpy
-.LVL1151:
-	.loc 2 1100 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1152:
-.L1345:
-	.loc 2 1102 0
-	ldr	r3, [r4, #3240]
-	.loc 2 1105 0
+.L1352:
+	ldr	r3, [r4, #3280]
 	mov	r0, r9
-	.loc 2 1104 0
 	ldrh	r2, [r5]
-	.loc 2 1102 0
-	str	r3, [r4, #3228]
-	.loc 2 1103 0
-	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3232]
-	.loc 2 1104 0
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	ldrh	r3, [r5, #2]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3224]
-	.loc 2 1105 0
+	str	r3, [r4, #3264]
 	mov	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1153:
-	.loc 2 1106 0
-	ldrh	r3, [r4, #80]
+	ldrh	r3, [r4, #104]
 	ldrh	r2, [r5, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1346
-	.loc 2 1108 0
+	blt	.L1353
 	ldrh	r3, [r5]
-	.loc 2 1107 0
 	ldrh	r8, [r5, #4]
-	.loc 2 1108 0
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 1109 0
 	mov	r3, #0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1154:
-	.loc 2 1115 0
-	ldr	r3, [r4, #2516]
-	.loc 2 1110 0
+	ldr	r3, [r4, #2540]
 	strh	r0, [r5]	@ movhi
-	.loc 2 1115 0
 	add	r2, r3, #1
-	str	r3, [r4, #2560]
-	str	r2, [r4, #2516]
-	.loc 2 1116 0
+	str	r3, [r4, #2584]
+	str	r2, [r4, #2540]
 	lsl	r2, r0, #10
-	str	r2, [r4, #3224]
-	.loc 2 1117 0
+	str	r2, [r4, #3264]
 	str	r3, [r7, #4]
-	.loc 2 1119 0
 	mov	r3, #1
-	.loc 2 1118 0
 	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
 	mov	r0, r9
 	bl	FlashProgPages
-.LVL1155:
-.L1346:
-	.loc 2 1121 0
+.L1353:
 	ldrh	r3, [r5, #2]
-	.loc 2 1122 0
-	ldr	r2, [r4, #3220]
-	.loc 2 1121 0
+	ldr	r2, [r4, #3260]
 	add	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1122 0
 	cmn	r2, #1
-	.loc 2 1121 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1122 0
-	bne	.L1347
-	.loc 2 1124 0
+	bne	.L1354
 	cmp	r3, #1
-	bne	.L1348
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1355
 	movw	r2, #1124
 	mov	r1, r10
-	ldr	r0, .L1356+24
+	ldr	r0, .L1363+20
 	bl	printk
-.LVL1156:
-.L1348:
-	.loc 2 1125 0 is_stmt 1
+.L1355:
 	ldrh	r3, [r5, #2]
-	.loc 2 1127 0
 	add	r6, r6, #1
-.LVL1157:
 	uxth	r6, r6
-.LVL1158:
-	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1126 0
-	ldrheq	r3, [r4, #80]
+	ldrheq	r3, [r4, #104]
 	subeq	r3, r3, #1
 	strheq	r3, [r5, #2]	@ movhi
-	.loc 2 1128 0
 	cmp	r6, #3
-	bls	.L1345
-	.loc 2 1129 0
+	bls	.L1352
 	mov	r2, r6
-	ldr	r1, [r4, #3224]
-	ldr	r0, .L1356+28
+	ldr	r1, [r4, #3264]
+	ldr	r0, .L1363+24
 	bl	printk
-.LVL1159:
-.L1351:
-	b	.L1351
-.L1347:
-	.loc 2 1135 0
+.L1358:
+	b	.L1358
+.L1354:
 	cmp	r3, #1
-	beq	.L1345
-	.loc 2 1138 0
+	beq	.L1352
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1352
-	.loc 2 1139 0
+	beq	.L1359
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL1160:
-.L1352:
-	.loc 2 1141 0
+.L1359:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1357:
+.L1364:
 	.align	2
-.L1356:
+.L1363:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2552
 	.word	.LANCHOR1+454
 	.word	-3932
 	.word	1179929683
 	.word	1342177348
 	.word	.LC1
-	.word	.LC100
-.LFE219:
+	.word	.LC101
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -14662,141 +9470,97 @@ FtlVpcTblFlush:
 	.fpu softvfp
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB239:
-	.loc 2 2242 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI368:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI369:
 	sub	fp, ip, #4
-.LCFI370:
 	sub	sp, sp, #4
-	.loc 2 2249 0
 	mov	r5, #0
-.LVL1161:
-	.loc 2 2248 0
-	ldr	r4, .L1370
-	.loc 2 2247 0
-	ldr	r1, .L1370+4
-	ldr	r0, .L1370+8
+	ldr	r4, .L1377
+	ldr	r1, .L1377+4
+	ldr	r0, .L1377+8
 	bl	printk
-.LVL1162:
-	.loc 2 2248 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, #0
-	ldr	r0, [r4, #3824]
+	ldr	r0, [r4, #3864]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.LVL1163:
-.L1359:
-	.loc 2 2249 0 discriminator 1
-	ldr	r3, [r4, #2480]
+.L1366:
+	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1361
-	.loc 2 2259 0 discriminator 1
-	ldr	r9, .L1370+12
+	bcc	.L1368
+	ldr	r9, .L1377+12
 	mov	r6, #0
-	.loc 2 2260 0 discriminator 1
-	ldr	r10, .L1370+16
-.LVL1164:
-.L1362:
-	.loc 2 2256 0 discriminator 1
-	ldrh	r3, [r4, #16]
+	ldr	r10, .L1377+16
+.L1369:
+	ldrh	r3, [r4, #40]
 	uxth	r5, r6
-.LVL1165:
 	cmp	r3, r5
-	bhi	.L1366
-	.loc 2 2268 0
+	bhi	.L1373
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1166:
-.L1361:
-	.loc 2 2250 0
+.L1368:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r5
 	bl	log2phys
-.LVL1167:
-	.loc 2 2251 0
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L1360
-	.loc 2 2252 0
+	beq	.L1367
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1168:
-	.loc 2 2253 0
-	ldr	r2, [r4, #3824]
+	ldr	r2, [r4, #3864]
 	lsl	r0, r0, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L1360:
-	.loc 2 2249 0 discriminator 2
+.L1367:
 	add	r5, r5, #1
-	b	.L1359
-.LVL1169:
-.L1366:
-	.loc 2 2257 0
+	b	.L1366
+.L1373:
 	uxth	r8, r6
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	movw	r1, #65535
 	lsl	r7, r8, #1
 	ldrh	r2, [r3, r7]
-	ldr	r3, [r4, #3824]
+	ldr	r3, [r4, #3864]
 	ldrh	r3, [r3, r7]
 	cmp	r2, r1
 	cmpne	r2, r3
-	beq	.L1364
-	.loc 2 2259 0
+	beq	.L1371
 	mov	r1, r8
 	mov	r0, r9
 	bl	printk
-.LVL1170:
-	.loc 2 2260 0
 	ldrh	r3, [r10]
 	cmp	r3, r5
-	beq	.L1364
-	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1370+20
+	beq	.L1371
+	ldr	r3, .L1377+20
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1364
-	.loc 2 2260 0 discriminator 2
+	beq	.L1371
 	ldrh	r3, [r3, #-48]
 	cmp	r3, r5
-	beq	.L1364
-	.loc 2 2261 0 is_stmt 1
-	ldr	r3, [r4, #3824]
-	.loc 2 2262 0
+	beq	.L1371
+	ldr	r3, [r4, #3864]
 	mov	r0, r8
-	.loc 2 2261 0
 	ldrh	r2, [r3, r7]
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	strh	r2, [r3, r7]	@ movhi
-	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1171:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1172:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1173:
-.L1364:
-	add	r6, r6, #1
-	b	.L1362
 .L1371:
+	add	r6, r6, #1
+	b	.L1369
+.L1378:
 	.align	2
-.L1370:
+.L1377:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC90
-	.word	.LC101
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+2420
-.LFE239:
+	.word	.LC91
+	.word	.LC102
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2444
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	allocate_new_data_superblock
@@ -14805,112 +9569,71 @@ FtlVpcCheckAndModify:
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB249:
-	.loc 2 2679 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1174:
 	mov	ip, sp
-.LCFI371:
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
-.LCFI372:
+	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI373:
-	.loc 2 2681 0
-	ldr	r5, .L1382
-	.loc 2 2679 0
-	mov	r7, r0
-	.loc 2 2680 0
-	ldrh	r4, [r0]
-.LVL1175:
-	.loc 2 2681 0
-	ldrh	r3, [r5, #16]
-	cmp	r3, r4
-	bcs	.L1373
-	.loc 2 2681 0 is_stmt 0 discriminator 1
+	ldr	r4, .L1389
+	mov	r6, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r4, #40]
+	cmp	r3, r5
+	bcs	.L1380
 	movw	r2, #2681
-	ldr	r1, .L1382+4
-	ldr	r0, .L1382+8
+	ldr	r1, .L1389+4
+	ldr	r0, .L1389+8
 	bl	printk
-.LVL1176:
-.L1373:
-	.loc 2 2683 0 is_stmt 1
+.L1380:
 	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L1374
-	.loc 2 2684 0
-	ldr	r2, [r5, #2300]
-	lsl	r3, r4, #1
-	.loc 2 2685 0
-	mov	r0, r4
-	.loc 2 2684 0
+	cmp	r5, r3
+	beq	.L1381
+	ldr	r2, [r4, #2324]
+	lsl	r3, r5, #1
+	mov	r0, r5
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1375
-	.loc 2 2685 0
+	beq	.L1382
 	bl	INSERT_DATA_LIST
-.LVL1177:
-.L1374:
-	.loc 2 2689 0
+.L1381:
 	mov	r3, #1
-	.loc 2 2690 0
-	movw	r2, #65535
-	.loc 2 2689 0
-	strb	r3, [r7, #8]
-	.loc 2 2690 0
-	ldr	r3, .L1382+12
-	ldrh	r0, [r3]
-	mov	r6, r3
-	cmp	r0, r2
-	beq	.L1376
-	.loc 2 2691 0
-	cmp	r4, r0
-	bne	.L1377
-	.loc 2 2691 0 is_stmt 0 discriminator 1
-	ldr	r2, [r5, #2300]
+	strb	r3, [r6, #8]
+	movw	r3, #3992
+	ldrh	r0, [r4, r3]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1383
+	cmp	r5, r0
+	bne	.L1384
+	ldr	r2, [r4, #2324]
 	lsl	r3, r0, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1378
-.L1377:
-	.loc 2 2692 0 is_stmt 1
+	beq	.L1385
+.L1384:
 	bl	update_vpc_list
-.LVL1178:
-.L1378:
-	.loc 2 2693 0
-	mvn	r3, #0
-	strh	r3, [r6]	@ movhi
-.L1376:
-	.loc 2 2695 0
-	mov	r0, r7
+.L1385:
+	mvn	r2, #0
+	movw	r3, #3992
+	strh	r2, [r4, r3]	@ movhi
+.L1383:
+	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1179:
-	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1180:
-	.loc 2 2697 0
 	mov	r0, #0
 	bl	FtlEctTblFlush
-.LVL1181:
-	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1182:
-	.loc 2 2700 0
 	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1375:
-	.loc 2 2687 0
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1382:
 	bl	INSERT_FREE_LIST
-.LVL1183:
-	b	.L1374
-.L1383:
+	b	.L1381
+.L1390:
 	.align	2
-.L1382:
+.L1389:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
-	.word	.LANCHOR0+3952
-.LFE249:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
@@ -14919,202 +9642,127 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB165:
-	.loc 3 904 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1184:
 	mov	ip, sp
-.LCFI374:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI375:
 	sub	fp, ip, #4
-.LCFI376:
 	sub	sp, sp, #8
-	.loc 3 913 0
 	mov	r7, #0
-.LVL1185:
-	ldr	r6, .L1398
-	.loc 3 904 0
+	ldr	r6, .L1405
 	mov	r4, r3
-	.loc 3 933 0
-	ldr	r10, .L1398+4
-	.loc 3 911 0
+	ldr	r10, .L1405+4
 	mov	r2, #0
-.LVL1186:
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1187:
-	.loc 3 904 0
 	mov	r5, r0
 	mov	r9, r1
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1188:
-.L1385:
-	.loc 3 913 0 discriminator 1
+.L1392:
 	cmp	r7, r9
-	beq	.L1392
-	.loc 3 919 0
+	beq	.L1399
 	mov	r8, #0
-	b	.L1393
-.LVL1189:
-.L1388:
-	.loc 3 915 0
+	b	.L1400
+.L1395:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1190:
-	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1386
-	.loc 3 917 0
-	ldr	r1, [r6, #2300]
+	bne	.L1393
+	ldr	r1, [r6, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3]
 	sub	r2, r2, r0
 	strh	r2, [r1, r3]	@ movhi
-	.loc 3 918 0
-	ldrh	r3, [r6, #78]
-	.loc 3 919 0
+	ldrh	r3, [r6, #102]
 	strb	r8, [r4, #6]
-	.loc 3 920 0
 	strh	r8, [r4, #4]	@ movhi
-	.loc 3 918 0
 	strh	r3, [r4, #2]	@ movhi
-.L1386:
-	.loc 3 922 0
+.L1393:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1387
-	.loc 3 923 0
+	bne	.L1394
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1191:
-.L1387:
-	.loc 3 926 0
-	ldr	r3, [r6, #2708]
+.L1394:
+	ldr	r3, [r6, #2732]
 	add	r3, r3, #1
-	str	r3, [r6, #2708]
-	.loc 3 927 0
+	str	r3, [r6, #2732]
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1192:
-	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1193:
-	.loc 3 930 0
 	mov	r2, #0
-	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 928 0
 	str	r0, [fp, #-44]
-	.loc 3 930 0
 	mov	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1194:
-.L1393:
-	.loc 3 914 0
+.L1400:
 	ldr	r3, [r5]
-.LVL1195:
 	cmn	r3, #1
-	beq	.L1388
-	.loc 3 933 0
+	beq	.L1395
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6, #8]
+	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1389
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1396
 	movw	r2, #933
 	mov	r1, r10
-	ldr	r0, .L1398+8
+	ldr	r0, .L1405+8
 	bl	printk
-.LVL1196:
-.L1389:
-	.loc 3 934 0 is_stmt 1
+.L1396:
 	ldr	r3, [r5, #4]
 	sub	r1, fp, #40
-	.loc 3 935 0
 	mov	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 934 0
 	str	r3, [r1, #-4]!
-.LVL1197:
-	.loc 3 935 0
 	bl	log2phys
-.LVL1198:
-	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
-.LVL1199:
-	.loc 3 939 0
 	ubfx	r0, r3, #10, #16
 	str	r3, [fp, #-48]
 	bl	P2V_block_in_plane
-.LVL1200:
-	.loc 3 940 0
 	ldr	r3, [fp, #-48]
-.LVL1201:
-	.loc 3 939 0
 	mov	r8, r0
-	.loc 3 940 0
 	cmn	r3, #1
-	beq	.L1390
-	.loc 3 942 0
-	ldr	r2, [r6, #2300]
+	beq	.L1397
+	ldr	r2, [r6, #2324]
 	lsl	r3, r0, #1
-.LVL1202:
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	bne	.L1391
-	.loc 3 943 0
+	bne	.L1398
 	mov	r1, r0
-	ldr	r0, .L1398+12
+	ldr	r0, .L1405+12
 	bl	printk
-.LVL1203:
-.L1391:
-	.loc 3 944 0
+.L1398:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.LVL1204:
-.L1390:
-	.loc 3 913 0 discriminator 2
+.L1397:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L1385
-.LVL1205:
-.L1392:
-	.loc 3 948 0
+	b	.L1392
+.L1399:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6, #8]
-.LVL1206:
+	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1384
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1391
 	mov	r2, #948
-	ldr	r1, .L1398+4
-	ldr	r0, .L1398+8
+	ldr	r1, .L1405+4
+	ldr	r0, .L1405+8
 	bl	printk
-.LVL1207:
-.L1384:
-	.loc 3 949 0 is_stmt 1
+.L1391:
 	sub	sp, fp, #40
-.LCFI377:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1208:
-.L1399:
+.L1406:
 	.align	2
-.L1398:
+.L1405:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+519
 	.word	.LC1
-	.word	.LC102
-.LFE165:
+	.word	.LC103
 	.size	FtlProgPages, .-FtlProgPages
 	.align	2
 	.global	FtlCacheWriteBack
@@ -15123,41 +9771,30 @@ FtlProgPages:
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB166:
-	.loc 3 952 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI378:
 	push	{r4, fp, ip, lr, pc}
-.LCFI379:
 	sub	fp, ip, #4
-.LCFI380:
-	.loc 3 953 0
-	ldr	r4, .L1405
-	ldr	r0, [r4, #3948]
+	ldr	r4, .L1412
+	ldr	r0, [r4, #3988]
 	cmp	r0, #0
-	beq	.L1401
-	.loc 3 954 0
-	ldr	r3, .L1405+4
+	beq	.L1408
+	ldr	r3, .L1412+4
 	mov	r2, #0
 	mov	r1, #1
-	ldr	r3, [r3, #-4076]
+	ldr	r3, [r3, #-4036]
 	bl	FtlProgPages
-.LVL1209:
-	.loc 3 955 0
 	mov	r3, #0
-	str	r3, [r4, #3948]
-.L1401:
-	.loc 3 958 0
+	str	r3, [r4, #3988]
+.L1408:
 	mov	r0, #0
 	ldmfd	sp, {r4, fp, sp, pc}
-.L1406:
+.L1413:
 	.align	2
-.L1405:
+.L1412:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE166:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.align	2
 	.global	FtlSysFlush
@@ -15166,33 +9803,18 @@ FtlCacheWriteBack:
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB162:
-	.loc 3 797 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI381:
 	push	{fp, ip, lr, pc}
-.LCFI382:
 	sub	fp, ip, #4
-.LCFI383:
-	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1210:
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1211:
-	.loc 3 800 0
 	mov	r0, #1
 	bl	FtlEctTblFlush
-.LVL1212:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1213:
-	.loc 3 803 0
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.LFE162:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.align	2
 	.global	sftl_deinit
@@ -15201,33 +9823,23 @@ FtlSysFlush:
 	.fpu softvfp
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB163:
-	.loc 3 806 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI384:
 	push	{fp, ip, lr, pc}
-.LCFI385:
 	sub	fp, ip, #4
-.LCFI386:
-	.loc 3 807 0
-	ldr	r3, .L1410
+	ldr	r3, .L1417
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1409
-	.loc 3 808 0
+	bne	.L1416
 	bl	FtlSysFlush
-.LVL1214:
-.L1409:
-	.loc 3 810 0
+.L1416:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1411:
+.L1418:
 	.align	2
-.L1410:
+.L1417:
 	.word	.LANCHOR2
-.LFE163:
 	.size	sftl_deinit, .-sftl_deinit
 	.align	2
 	.global	FtlDiscard
@@ -15236,157 +9848,94 @@ sftl_deinit:
 	.fpu softvfp
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB168:
-	.loc 3 1157 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1215:
 	mov	ip, sp
-.LCFI387:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI388:
 	sub	fp, ip, #4
-.LCFI389:
 	sub	sp, sp, #8
-	.loc 3 1164 0
 	add	r2, r0, r1
-	ldr	r6, .L1427
-	.loc 3 1157 0
+	ldr	r6, .L1434
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1164 0
-	ldr	r3, [r6, #116]
+	ldr	r3, [r6, #140]
 	cmp	r2, r3
-	.loc 3 1165 0
 	mvnhi	r0, #0
-.LVL1216:
-	.loc 3 1164 0
-	bhi	.L1412
-	.loc 3 1167 0
+	bhi	.L1419
 	cmp	r1, #31
-	bhi	.L1414
-.LVL1217:
-.L1419:
-	.loc 3 1168 0
+	bhi	.L1421
+.L1426:
 	mov	r0, #0
-.L1412:
-	.loc 3 1201 0
+.L1419:
 	sub	sp, fp, #32
-.LCFI390:
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL1218:
-.L1414:
-.LCFI391:
-	.loc 3 1170 0
+.L1421:
 	bl	FtlCacheWriteBack
-.LVL1219:
-	.loc 3 1172 0
-	ldrh	r4, [r6, #34]
+	ldrh	r4, [r6, #58]
 	mov	r0, r7
 	mov	r1, r4
 	bl	__udivsi3
-.LVL1220:
-	.loc 3 1173 0
 	smulbb	r3, r0, r4
-	.loc 3 1172 0
 	mov	r8, r0
-.LVL1221:
-	.loc 3 1173 0
 	sub	r7, r7, r3
-.LVL1222:
 	uxth	r7, r7
-.LVL1223:
-	.loc 3 1174 0
 	cmp	r7, #0
-	beq	.L1415
-	.loc 3 1175 0
+	beq	.L1422
 	sub	r4, r4, r7
-	.loc 3 1176 0
 	add	r8, r0, #1
-	.loc 3 1175 0
 	cmp	r4, r5
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1177 0
 	sub	r5, r5, r4
-.L1415:
-	.loc 3 1184 0
-	ldr	r4, .L1427+4
-	.loc 3 1180 0
+.L1422:
+	ldr	r4, .L1434+4
 	mvn	r3, #0
 	str	r3, [fp, #-36]
-.LVL1224:
-.L1416:
-	.loc 3 1181 0
-	ldrh	r3, [r6, #34]
+.L1423:
+	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1418
-	.loc 3 1194 0
-	ldr	r3, .L1427+4
-	ldr	r2, [r3, #-4072]
+	bcs	.L1425
+	ldr	r3, .L1434+4
+	ldr	r2, [r3, #-4032]
 	cmp	r2, #32
-	bls	.L1419
-	.loc 3 1196 0
+	bls	.L1426
 	mov	r4, #0
-	str	r4, [r3, #-4072]
-	.loc 3 1197 0
+	str	r4, [r3, #-4032]
 	bl	l2p_flush
-.LVL1225:
-	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1226:
-	b	.L1419
-.L1418:
-	.loc 3 1182 0
+	b	.L1426
+.L1425:
 	mov	r2, #0
 	sub	r1, fp, #40
 	mov	r0, r8
 	bl	log2phys
-.LVL1227:
-	.loc 3 1183 0
 	ldr	r3, [fp, #-40]
 	cmn	r3, #1
-	beq	.L1417
-	.loc 3 1184 0
-	ldr	r3, [r4, #-4072]
-	.loc 3 1186 0
+	beq	.L1424
+	ldr	r3, [r4, #-4032]
 	mov	r2, #1
 	sub	r1, fp, #36
 	mov	r0, r8
-	.loc 3 1184 0
 	add	r3, r3, #1
-	str	r3, [r4, #-4072]
-	.loc 3 1185 0
-	ldr	r3, [r6, #2488]
+	str	r3, [r4, #-4032]
+	ldr	r3, [r6, #2512]
 	add	r3, r3, #1
-	str	r3, [r6, #2488]
-	.loc 3 1186 0
+	str	r3, [r6, #2512]
 	bl	log2phys
-.LVL1228:
-	.loc 3 1187 0
 	ldr	r0, [fp, #-40]
-.LVL1229:
 	ubfx	r0, r0, #10, #16
-.LVL1230:
 	bl	P2V_block_in_plane
-.LVL1231:
-	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1232:
-.L1417:
-	.loc 3 1191 0
-	ldrh	r3, [r6, #34]
-	.loc 3 1190 0
+.L1424:
+	ldrh	r3, [r6, #58]
 	add	r8, r8, #1
-	.loc 3 1191 0
 	sub	r5, r5, r3
-	b	.L1416
-.L1428:
+	b	.L1423
+.L1435:
 	.align	2
-.L1427:
+.L1434:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE168:
 	.size	FtlDiscard, .-FtlDiscard
 	.align	2
 	.global	FtlGcFreeTempBlock
@@ -15395,327 +9944,206 @@ FtlDiscard:
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB258:
-	.loc 5 112 0
 	@ args = 0, pretend = 0, frame = 4
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1233:
 	mov	ip, sp
-.LCFI392:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI393:
 	sub	fp, ip, #4
-.LCFI394:
 	sub	sp, sp, #4
-	.loc 5 119 0
-	movw	r3, #2420
-	.loc 5 115 0
-	ldr	r4, .L1455
-	.loc 5 119 0
+	movw	r3, #2444
+	ldr	r4, .L1462
 	movw	r2, #65535
 	ldrh	r5, [r4, r3]
-	.loc 5 115 0
-	ldrh	r1, [r4, #78]
-.LVL1234:
-	.loc 5 119 0
+	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1430
-.LVL1235:
-.L1440:
-	.loc 5 152 0
+	bne	.L1437
+.L1447:
 	mov	r3, #0
-	str	r3, [r4, #3960]
-	.loc 5 153 0
-	movw	r3, #2420
+	str	r3, [r4, #4000]
+	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1453
-.L1431:
-	.loc 5 154 0
+	bne	.L1460
+.L1438:
 	mov	r0, #0
-.LVL1236:
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1237:
-.L1430:
-	.loc 5 121 0
+.L1437:
 	cmp	r0, #0
-	beq	.L1433
-	.loc 5 123 0
-	ldr	r3, .L1455+4
+	beq	.L1440
+	ldr	r3, .L1462+4
 	ldrh	r0, [r3, #4]
-.LVL1238:
 	cmp	r0, r2
-	beq	.L1434
-.L1435:
-	.loc 5 122 0
+	beq	.L1441
+.L1442:
 	mov	r1, #2
-.LVL1239:
-.L1433:
-	.loc 5 131 0
-	ldr	r0, .L1455+8
-.LVL1240:
+.L1440:
+	ldr	r0, .L1462+8
 	bl	FtlGcScanTempBlk
-.LVL1241:
-	.loc 5 132 0
 	cmn	r0, #1
-	.loc 5 131 0
 	str	r0, [fp, #-44]
-.LVL1242:
-	.loc 5 132 0
-	beq	.L1436
-	.loc 5 135 0
-	ldr	r2, [r4, #2304]
+	beq	.L1443
+	ldr	r2, [r4, #2328]
 	lsl	r5, r5, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #4
-	bls	.L1437
-	.loc 5 136 0
+	bls	.L1444
 	sub	r3, r3, #5
-	.loc 5 137 0
 	mov	r0, #1
-	.loc 5 136 0
 	strh	r3, [r2, r5]	@ movhi
-	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1243:
-.L1437:
-	.loc 5 139 0
-	ldr	r3, [r4, #3960]
+.L1444:
+	ldr	r3, [r4, #4000]
 	cmp	r3, #0
-	bne	.L1438
-	.loc 5 140 0
-	ldr	r3, [r4, #2708]
-	.loc 5 141 0
+	bne	.L1445
+	ldr	r3, [r4, #2732]
 	ldr	r0, [fp, #-44]
-	.loc 5 140 0
 	add	r3, r3, #1
-	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 140 0
-	str	r3, [r4, #2708]
-	.loc 5 141 0
+	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
-.LVL1244:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1245:
-.L1438:
-	.loc 5 144 0
+.L1445:
 	mov	r3, #0
-	str	r3, [r4, #3960]
-.L1449:
-	.loc 5 149 0
+	str	r3, [r4, #4000]
+.L1456:
 	mov	r0, #1
-	.loc 5 199 0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1246:
-.L1434:
-	.loc 5 124 0
+.L1441:
 	mov	r2, #0
 	strh	r2, [r3, #4]	@ movhi
-	.loc 5 125 0
-	add	r3, r4, #2320
-	ldrh	r3, [r3]
+	movw	r3, #2344
+	ldrh	r3, [r4, r3]
 	cmp	r3, #17
-	bhi	.L1435
-	b	.L1433
-.LVL1247:
-.L1436:
-	.loc 5 148 0
-	ldr	r3, .L1455+4
+	bhi	.L1442
+	b	.L1440
+.L1443:
+	ldr	r3, .L1462+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1449
-	b	.L1440
-.LVL1248:
-.L1453:
-	.loc 5 160 0
+	bne	.L1456
+	b	.L1447
+.L1460:
 	bl	FtlCacheWriteBack
-.LVL1249:
-	.loc 5 162 0
-	movw	r3, #3176
-	ldrb	r1, [r4, #2427]	@ zero_extendqisi2
-	ldrh	r2, [r4, r3]
-	ldrh	r3, [r4, #78]
+	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
+	ldrh	r3, [r4, #102]
+	ldr	r6, .L1462+12
 	mul	r3, r3, r1
+	ldrh	r2, [r6]
 	cmp	r2, r3
-	beq	.L1441
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1448
 	mov	r2, #162
-	ldr	r1, .L1455+12
-	ldr	r0, .L1455+16
+	ldr	r1, .L1462+16
+	ldr	r0, .L1462+20
 	bl	printk
-.LVL1250:
-.L1441:
-	.loc 5 163 0 is_stmt 1
-	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
-	movw	r3, #2420
-	ldrh	r0, [r4, #78]
-	.loc 5 165 0
-	mov	r6, #0
-	.loc 5 163 0
+.L1448:
+	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
+	movw	r3, #2444
+	ldrh	r0, [r4, #102]
+	mov	r5, #0
 	ldrh	r3, [r4, r3]
-	ldr	r1, [r4, #2300]
-	.loc 5 165 0
-	ldr	r9, .L1455+20
-	.loc 5 163 0
+	ldr	r1, [r4, #2324]
+	ldr	r10, .L1462+20
 	smulbb	r2, r2, r0
-	.loc 5 168 0
-	ldr	r10, .L1455+12
-	.loc 5 163 0
 	lsl	r3, r3, #1
 	strh	r2, [r1, r3]	@ movhi
-	.loc 5 164 0
-	movw	r3, #3176
-	ldr	r2, [r4, #2504]
-	ldrh	r3, [r4, r3]
+	ldr	r2, [r4, #2528]
+	ldrh	r3, [r6]
 	add	r3, r3, r2
-	str	r3, [r4, #2504]
-.LVL1251:
-.L1442:
-	.loc 5 165 0 discriminator 1
-	ldrh	r2, [r9]
-	uxth	r3, r6
+	str	r3, [r4, #2528]
+.L1449:
+	ldrh	r2, [r6]
+	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L1446
-	.loc 5 181 0
+	bhi	.L1453
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1252:
-	.loc 5 182 0
-	movw	r3, #2420
-	ldr	r1, [r4, #2300]
+	movw	r3, #2444
+	ldr	r1, [r4, #2324]
 	ldrh	r0, [r4, r3]
 	mov	r5, r3
-.LVL1253:
 	lsl	r2, r0, #1
 	ldrh	r2, [r1, r2]
 	cmp	r2, #0
-	beq	.L1447
-	.loc 5 183 0
+	beq	.L1454
 	bl	INSERT_DATA_LIST
-.LVL1254:
-.L1448:
-	.loc 5 188 0
-	ldr	r6, .L1455+24
-	.loc 5 186 0
+.L1455:
 	mvn	r7, #0
-	.loc 5 187 0
-	movw	r3, #3176
-	.loc 5 186 0
+	movw	r3, #3192
 	strh	r7, [r4, r5]	@ movhi
-	.loc 5 187 0
 	mov	r5, #0
 	strh	r5, [r4, r3]	@ movhi
-	.loc 5 188 0
 	strh	r5, [r6]	@ movhi
-	.loc 5 191 0
-	sub	r6, r6, #848
-	.loc 5 189 0
 	bl	l2p_flush
-.LVL1255:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1256:
-	.loc 5 191 0
-	movw	r3, #2548
-	ldrh	r2, [r6]
+	movw	r3, #2344
+	ldrh	r2, [r4, r3]
+	movw	r3, #2572
 	ldrh	r3, [r4, r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	.loc 5 192 0
-	movwgt	r3, #2564
-	.loc 5 193 0
+	movwgt	r3, #2588
 	movgt	r2, #20
-	.loc 5 192 0
 	strhgt	r7, [r4, r3]	@ movhi
-	.loc 5 193 0
-	movwgt	r3, #3124
+	movwgt	r3, #3148
 	strhgt	r2, [r4, r3]	@ movhi
-	b	.L1431
-.LVL1257:
-.L1446:
-	.loc 5 166 0
-	uxth	r3, r6
+	b	.L1438
+.L1453:
+	uxth	r3, r5
 	mov	r7, #12
-	ldr	r8, [r4, #3172]
+	ldr	r8, [r4, #3196]
 	mul	r7, r7, r3
-	.loc 5 168 0
-	ldr	r3, [r4, #2480]
-	.loc 5 166 0
-	add	r5, r8, r7
-	.loc 5 168 0
-	ldr	r2, [r5, #8]
-	cmp	r2, r3
-	bcc	.L1443
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	ldr	r2, [r4, #2504]
+	add	r9, r8, r7
+	ldr	r1, [r9, #8]
+	cmp	r1, r2
+	bcc	.L1450
 	mov	r2, #168
-	mov	r1, r10
-	ldr	r0, .L1455+16
+	ldr	r1, .L1462+16
+	mov	r0, r10
 	bl	printk
-.LVL1258:
-.L1443:
-	.loc 5 169 0 is_stmt 1
+.L1450:
 	mov	r2, #0
 	sub	r1, fp, #44
-	ldr	r0, [r5, #8]
+	ldr	r0, [r9, #8]
 	bl	log2phys
-.LVL1259:
-	.loc 5 170 0
-	ldr	r3, [fp, #-44]
+	ldr	r2, [fp, #-44]
 	ldr	r0, [r8, r7]
-	cmp	r0, r3
-	bne	.L1444
-	.loc 5 171 0
+	cmp	r0, r2
+	bne	.L1451
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1260:
-	.loc 5 172 0
 	mov	r2, #1
-	.loc 5 171 0
 	mov	r7, r0
-	.loc 5 172 0
-	add	r1, r5, #4
-	ldr	r0, [r5, #8]
+	add	r1, r9, #4
+	ldr	r0, [r9, #8]
 	bl	log2phys
-.LVL1261:
-	.loc 5 173 0
 	mov	r0, r7
-.L1454:
-	.loc 5 177 0
+.L1461:
 	bl	decrement_vpc_count
-.LVL1262:
-.L1445:
-	add	r6, r6, #1
-	b	.L1442
-.L1444:
-	.loc 5 175 0
-	ldr	r2, [r5, #4]
-	cmp	r3, r2
-	beq	.L1445
-	.loc 5 177 0
-	ldr	r3, .L1455+8
+.L1452:
+	add	r5, r5, #1
+	b	.L1449
+.L1451:
+	ldr	r3, [r9, #4]
+	cmp	r2, r3
+	beq	.L1452
+	ldr	r3, .L1462+8
 	ldrh	r0, [r3]
-	b	.L1454
-.LVL1263:
-.L1447:
-	.loc 5 185 0
+	b	.L1461
+.L1454:
 	bl	INSERT_FREE_LIST
-.LVL1264:
-	b	.L1448
-.L1456:
+	b	.L1455
+.L1463:
 	.align	2
-.L1455:
+.L1462:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+3200
 	.word	.LANCHOR1+532
 	.word	.LC1
-	.word	.LANCHOR0+3176
-	.word	.LANCHOR0+3168
-.LFE258:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
 	.global	FtlGcPageRecovery
@@ -15724,51 +10152,32 @@ FtlGcFreeTempBlock:
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB261:
-	.loc 5 289 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI395:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI396:
 	sub	fp, ip, #4
-.LCFI397:
-	.loc 5 290 0
-	ldr	r4, .L1459
-	ldr	r5, .L1459+4
-	ldrh	r1, [r4, #78]
+	ldr	r4, .L1466
+	ldr	r5, .L1466+4
+	ldrh	r1, [r4, #102]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1265:
-	.loc 5 291 0
 	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r4, #102]
 	cmp	r2, r3
 	ldmfdcc	sp, {r4, r5, fp, sp, pc}
-.LBB515:
-.LBB516:
-	.loc 5 293 0
-	ldr	r0, .L1459+8
+	add	r0, r4, #3904
 	bl	FtlMapBlkWriteDump_data
-.LVL1266:
-	.loc 5 294 0
 	mov	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1267:
-	.loc 5 295 0
 	mov	r3, #0
-	str	r3, [r4, #3960]
+	str	r3, [r4, #4000]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1460:
+.L1467:
 	.align	2
-.L1459:
+.L1466:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+3864
-.LBE516:
-.LBE515:
-.LFE261:
+	.word	.LANCHOR0+2444
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.align	2
 	.global	FtlPowerLostRecovery
@@ -15777,61 +10186,35 @@ FtlGcPageRecovery:
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB233:
-	.loc 2 2081 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI398:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI399:
 	sub	fp, ip, #4
-.LCFI400:
-	.loc 2 2082 0
-	ldr	r4, .L1462
+	ldr	r4, .L1469
 	mov	r6, #0
-	.loc 2 2084 0
-	add	r5, r4, #2320
-	.loc 2 2082 0
-	str	r6, [r4, #3972]
-	.loc 2 2084 0
-	add	r5, r5, #4
-	.loc 2 2086 0
-	add	r4, r4, #2368
-	.loc 2 2084 0
+	add	r5, r4, #2336
+	str	r6, [r4, #4012]
+	add	r5, r5, #12
+	add	r4, r4, #2384
 	mov	r0, r5
-	.loc 2 2086 0
-	add	r4, r4, #4
-	.loc 2 2084 0
+	add	r4, r4, #12
 	bl	FtlRecoverySuperblock
-.LVL1268:
-	.loc 2 2085 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1269:
-	.loc 2 2086 0
 	mov	r0, r4
 	bl	FtlRecoverySuperblock
-.LVL1270:
-	.loc 2 2087 0
 	mov	r0, r4
 	bl	FtlSlcSuperblockCheck
-.LVL1271:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1272:
-	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1273:
-	.loc 2 2091 0
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1463:
+.L1470:
 	.align	2
-.L1462:
+.L1469:
 	.word	.LANCHOR0
-.LFE233:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	2
 	.global	Ftl_gc_temp_data_write_back
@@ -15840,111 +10223,75 @@ FtlPowerLostRecovery:
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB263:
-	.loc 5 316 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI401:
 	push	{r4, r5, r6, fp, ip, lr, pc}
-.LCFI402:
 	sub	fp, ip, #4
-.LCFI403:
-	.loc 5 320 0
-	ldr	r4, .L1471
+	ldr	r4, .L1478
 	mov	r3, #0
-	.loc 5 321 0
 	mov	r5, #0
-	.loc 5 322 0
 	mov	r6, #20
-	.loc 5 320 0
 	mov	r2, r3
-	ldr	r1, [r4, #3140]
-	ldr	r0, [r4, #3796]
+	ldr	r1, [r4, #3164]
+	ldr	r0, [r4, #3836]
 	bl	FlashProgPages
-.LVL1274:
-.L1465:
-	.loc 5 321 0 discriminator 1
-	ldr	r1, [r4, #3140]
+.L1472:
+	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1468
-	.loc 5 335 0
-	ldr	r0, [r4, #3796]
+	bhi	.L1475
+	ldr	r0, [r4, #3836]
 	bl	FtlGcBufFree
-.LVL1275:
-	.loc 5 337 0
-	ldr	r3, .L1471+4
-	.loc 5 336 0
+	ldr	r3, .L1478+4
 	mov	r0, #0
-	str	r0, [r4, #3140]
-	.loc 5 337 0
+	str	r0, [r4, #3164]
 	ldrh	r3, [r3, #4]
 	cmp	r3, r0
 	ldmfdne	sp, {r4, r5, r6, fp, sp, pc}
-	.loc 5 338 0
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1276:
-	b	.L1470
-.L1468:
-	.loc 5 322 0
+	b	.L1477
+.L1475:
 	mul	r3, r6, r3
-	ldr	r2, [r4, #3796]
+	ldr	r2, [r4, #3836]
 	add	r5, r5, #1
 	ldr	r0, [r2, r3]
 	add	r1, r2, r3
 	cmn	r0, #1
-	bne	.L1466
-	.loc 5 323 0
-	movw	r1, #2420
-	ldr	ip, [r4, #2300]
+	bne	.L1473
+	movw	r1, #2444
+	ldr	ip, [r4, #2324]
 	ldrh	r2, [r4, r1]
 	mov	lr, #0
 	lsl	r2, r2, #1
 	strh	lr, [ip, r2]	@ movhi
-	.loc 5 325 0
-	ldr	r2, [r4, #2708]
-	.loc 5 324 0
+	ldr	r2, [r4, #2732]
 	strh	r0, [r4, r1]	@ movhi
-	.loc 5 325 0
 	add	r2, r2, #1
-	str	r2, [r4, #2708]
-	.loc 5 326 0
-	ldr	r2, [r4, #3796]
+	str	r2, [r4, #2732]
+	ldr	r2, [r4, #3836]
 	add	r3, r2, r3
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL1277:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1278:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1279:
-.L1470:
-	.loc 5 339 0
+.L1477:
 	mov	r0, #1
-	.loc 5 342 0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1466:
-	.loc 5 331 0 discriminator 2
+.L1473:
 	ldr	r3, [r1, #12]
-.LVL1280:
-	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1281:
-	b	.L1465
-.L1472:
+	b	.L1472
+.L1479:
 	.align	2
-.L1471:
+.L1478:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2420
-.LFE263:
+	.word	.LANCHOR0+2444
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
 	.global	Ftl_get_new_temp_ppa
@@ -15953,76 +10300,47 @@ Ftl_gc_temp_data_write_back:
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB262:
-	.loc 5 300 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI404:
 	push	{r4, r5, fp, ip, lr, pc}
-.LCFI405:
 	sub	fp, ip, #4
-.LCFI406:
-	.loc 5 301 0
-	ldr	r4, .L1476
-	movw	r3, #2420
+	ldr	r4, .L1483
+	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1474
-	.loc 5 301 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1476+4
+	beq	.L1481
+	ldr	r3, .L1483+4
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L1475
-.L1474:
-	.loc 5 302 0 is_stmt 1
+	bne	.L1482
+.L1481:
 	bl	FtlCacheWriteBack
-.LVL1282:
-	.loc 5 303 0
 	mov	r0, #0
-	.loc 5 304 0
 	mov	r5, #0
-	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1283:
-	.loc 5 305 0
-	ldr	r0, .L1476+4
-	.loc 5 304 0
-	strb	r5, [r4, #2428]
-	.loc 5 305 0
+	ldr	r0, .L1483+4
+	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
-.LVL1284:
-	.loc 5 306 0
-	ldr	r3, .L1476+8
-	strh	r5, [r3]	@ movhi
-	.loc 5 307 0
-	movw	r3, #3176
+	movw	r3, #3192
 	strh	r5, [r4, r3]	@ movhi
-	.loc 5 308 0
+	ldr	r3, .L1483+8
+	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
-.LVL1285:
-	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1286:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1287:
-.L1475:
-	.loc 5 312 0
-	ldr	r0, .L1476+4
+.L1482:
+	ldr	r0, .L1483+4
 	bl	get_new_active_ppa
-.LVL1288:
-	.loc 5 313 0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1477:
+.L1484:
 	.align	2
-.L1476:
+.L1483:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+3168
-.LFE262:
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+3200
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.align	2
 	.global	rk_ftl_garbage_collect
@@ -16031,202 +10349,136 @@ Ftl_get_new_temp_ppa:
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB269:
-	.loc 5 470 0
 	@ args = 0, pretend = 0, frame = 28
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1289:
 	mov	ip, sp
-.LCFI407:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI408:
 	sub	fp, ip, #4
-.LCFI409:
 	sub	sp, sp, #36
-	.loc 5 470 0
 	mov	r6, r0
-	.loc 5 478 0
-	ldr	r3, .L1591
-	ldr	r0, [r3, #3780]
-.LVL1290:
+	ldr	r3, .L1598
+	ldr	r0, [r3, #3820]
 	mov	r5, r3
 	cmp	r0, #0
-	.loc 5 479 0
 	movne	r0, #0
-	.loc 5 478 0
-	bne	.L1478
-	.loc 5 481 0
-	movw	r2, #2312
-	ldrh	r2, [r3, r2]
+	bne	.L1485
+	add	r2, r3, #2336
+	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L1478
-	.loc 5 485 0
-	ldr	r2, .L1591+4
+	bls	.L1485
+	ldr	r2, .L1598+4
 	ldrh	r1, [r2, #4]
-.LVL1291:
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1480
-.L1483:
-.LBB520:
-.LBB521:
-	.loc 5 489 0
-	movw	r3, #3180
+	bne	.L1487
+.L1490:
+	movw	r3, #3204
 	movw	r0, #65535
 	ldrh	r1, [r5, r3]
 	cmp	r1, r0
-	bne	.L1481
-.L1482:
-	.loc 5 496 0
-	ldr	r3, [r5, #3128]
-	.loc 5 497 0
-	movw	r2, #2564
+	bne	.L1488
+.L1489:
+	ldr	r3, [r5, #3152]
+	movw	r2, #2588
 	ldrh	r2, [r5, r2]
 	movw	r4, #65535
-	.loc 5 496 0
 	add	r3, r3, #1
 	add	r3, r3, r6, lsl #7
-	.loc 5 497 0
 	cmp	r2, r4
-	.loc 5 496 0
-	str	r3, [r5, #3128]
-	.loc 5 497 0
-	bne	.L1484
-	movw	r1, #2420
+	str	r3, [r5, #3152]
+	bne	.L1491
+	movw	r1, #2444
 	ldrh	r4, [r5, r1]
 	cmp	r4, r2
-	.loc 5 473 0
 	movne	r4, r2
-	.loc 5 497 0
-	bne	.L1484
-	movw	r2, #3178
-	ldrh	r8, [r5, r2]
-	cmp	r8, r4
-	bne	.L1484
-	.loc 5 498 0
-	ldr	r7, .L1591+8
-	ldrh	r2, [r7]
+	bne	.L1491
+	movw	r2, #3202
+	ldrh	r7, [r5, r2]
+	cmp	r7, r4
+	bne	.L1491
+	movw	r10, #2344
+	ldrh	r2, [r5, r10]
 	cmp	r2, #24
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	.loc 5 473 0
-	movls	r4, r8
-	.loc 5 498 0
-	bls	.L1484
-.LBB522:
-	.loc 5 502 0
-	ldr	r3, .L1591+12
-	.loc 5 501 0
-	mov	r10, #0
-	str	r10, [r5, #3128]
-	.loc 5 502 0
-	strh	r10, [r3, #-4]	@ movhi
-	.loc 5 503 0
+	movls	r4, r7
+	bls	.L1491
+	ldr	r3, .L1598+8
+	mov	r9, #0
+	str	r9, [r5, #3152]
+	strh	r9, [r3, #-12]	@ movhi
 	bl	GetSwlReplaceBlock
-.LVL1292:
-	.loc 5 504 0
-	cmp	r0, r8
-	.loc 5 503 0
+	cmp	r0, r7
 	mov	r4, r0
-	.loc 5 504 0
-	movne	r8, r0
-	bne	.L1486
-	.loc 5 505 0
-	movw	r9, #3126
-	ldrh	r2, [r7]
-	ldrh	r3, [r5, r9]
+	movne	r7, r0
+	bne	.L1493
+	movw	r8, #3150
+	ldrh	r2, [r5, r10]
+	ldrh	r3, [r5, r8]
 	cmp	r2, r3
-	bcs	.L1487
-	.loc 5 506 0
+	bcs	.L1494
 	mov	r0, #64
 	bl	List_get_gc_head_node
-.LVL1293:
-	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r4
-	beq	.L1489
-	.loc 5 508 0
+	beq	.L1496
 	mov	r0, r3
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	lsl	r0, r0, #1
 	ldrh	r3, [r3, r0]
 	cmp	r3, #7
-	bhi	.L1490
-	.loc 5 509 0
-	mov	r0, r10
+	bhi	.L1497
+	mov	r0, r9
 	bl	List_get_gc_head_node
-.LVL1294:
-	uxth	r8, r0
-	.loc 5 510 0
+	uxth	r7, r0
 	mov	r3, #128
-	strh	r3, [r5, r9]	@ movhi
-	.loc 5 520 0
-	cmp	r8, r4
-	beq	.L1489
-.L1486:
-	.loc 5 521 0
-	movw	r0, #3124
-	ldr	r3, [r5, #2300]
+	strh	r3, [r5, r8]	@ movhi
+	cmp	r7, r4
+	beq	.L1496
+.L1493:
+	movw	r0, #3148
+	ldr	r3, [r5, #2324]
 	ldrh	r0, [r5, r0]
-	lsl	r1, r8, #1
-	ldrh	r2, [r7]
-	mov	r4, r8
+	lsl	r1, r7, #1
+	movw	r2, #2344
 	ldrh	r3, [r3, r1]
+	mov	r4, r7
+	ldrh	r2, [r5, r2]
 	str	r0, [sp, #4]
-	ldr	r0, [r5, #2304]
+	ldr	r0, [r5, #2328]
 	ldrh	r1, [r0, r1]
-	ldr	r0, .L1591+16
+	ldr	r0, .L1598+12
 	str	r1, [sp]
-	mov	r1, r8
+	mov	r1, r7
 	bl	printk
-.LVL1295:
-	b	.L1489
-.L1480:
-.LBE522:
-.LBE521:
-.LBE520:
-	.loc 5 485 0 discriminator 1
-	movw	r1, #2420
+	b	.L1496
+.L1487:
+	movw	r1, #2444
 	ldrh	r3, [r3, r1]
 	cmp	r3, r2
-	beq	.L1483
-	.loc 5 486 0
+	beq	.L1490
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1296:
 	cmp	r0, #0
-	beq	.L1483
-	.loc 5 487 0
+	beq	.L1490
 	mov	r0, #1
-	b	.L1478
-.L1481:
-.LBB527:
-.LBB525:
-	.loc 5 489 0
-	movw	r2, #3178
+	b	.L1485
+.L1488:
+	movw	r2, #3202
 	ldrh	ip, [r5, r2]
 	cmp	ip, r0
-	.loc 5 490 0
 	strheq	r1, [r5, r2]	@ movhi
-	.loc 5 491 0
 	mvneq	r2, #0
 	strheq	r2, [r5, r3]	@ movhi
-	b	.L1482
-.L1490:
-.LBB523:
-	.loc 5 512 0
+	b	.L1489
+.L1497:
 	mov	r3, #64
-.L1583:
-	.loc 5 516 0
-	strh	r3, [r5, r9]	@ movhi
-.L1489:
-	.loc 5 523 0
+.L1590:
+	strh	r3, [r5, r8]	@ movhi
+.L1496:
 	bl	FtlGcReFreshBadBlk
-.LVL1297:
-.L1484:
-.LBE523:
-	.loc 5 527 0
+.L1491:
 	movw	r2, #65535
 	sub	r3, r4, r2
 	clz	r3, r3
@@ -16234,854 +10486,584 @@ rk_ftl_garbage_collect:
 	cmp	r6, #0
 	movne	r6, #0
 	andeq	r6, r3, #1
-.LVL1298:
 	cmp	r6, #0
-	beq	.L1492
-	.loc 5 528 0
-	ldr	r3, .L1591+8
-	ldrh	r3, [r3]
+	beq	.L1499
+	movw	r3, #2344
+	ldrh	r3, [r5, r3]
 	cmp	r3, #24
-	.loc 5 529 0
 	movhi	r6, #1
-.LVL1299:
-	.loc 5 528 0
-	bhi	.L1493
-	ldrh	r6, [r5, #78]
-.LVL1300:
-	.loc 5 530 0
+	bhi	.L1500
+	ldrh	r6, [r5, #102]
 	cmp	r3, #16
-	.loc 5 531 0
 	lsrhi	r6, r6, #5
-.LVL1301:
-	.loc 5 530 0
-	bhi	.L1493
-	.loc 5 532 0
+	bhi	.L1500
 	cmp	r3, #12
-	.loc 5 533 0
 	lsrhi	r6, r6, #4
-.LVL1302:
-	.loc 5 532 0
-	bhi	.L1493
-	.loc 5 534 0
+	bhi	.L1500
 	cmp	r3, #8
-	.loc 5 535 0
 	lsrhi	r6, r6, #2
-.LVL1303:
-.L1493:
-	.loc 5 539 0
-	movw	r2, #3124
+.L1500:
+	movw	r2, #3148
 	ldrh	r1, [r5, r2]
 	cmp	r1, r3
-	bcs	.L1497
-	.loc 5 540 0
-	movw	r3, #2420
+	bcs	.L1504
+	movw	r3, #2444
 	movw	r1, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, r1
-	bne	.L1498
-	movw	r1, #3178
+	bne	.L1505
+	movw	r1, #3202
 	ldrh	r1, [r5, r1]
 	cmp	r1, r3
-	bne	.L1498
-	.loc 5 542 0
-	ldr	r3, .L1591+12
-	ldrh	r0, [r3, #-4]
+	bne	.L1505
+	ldr	r3, .L1598+8
+	ldrh	r0, [r3, #-12]
 	cmp	r0, #0
-	bne	.L1499
-	ldr	r3, [r5, #2480]
-	ldr	r1, [r5, #2476]
+	bne	.L1506
+	ldr	r3, [r5, #2504]
+	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
-	.loc 5 545 0
 	movcs	r3, #18
-	.loc 5 542 0
-	bcs	.L1584
-.L1499:
-	.loc 5 543 0
-	movw	r3, #2548
-	movw	r2, #3124
+	bcs	.L1591
+.L1506:
+	movw	r3, #2572
+	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1584:
-	.loc 5 545 0
+.L1591:
 	strh	r3, [r5, r2]	@ movhi
-	.loc 5 546 0
 	mov	r3, #0
-	str	r3, [r5, #3136]
-.LVL1304:
-.L1478:
-.LBE525:
-.LBE527:
-	.loc 5 754 0
+	str	r3, [r5, #3160]
+.L1485:
 	sub	sp, fp, #40
-.LCFI410:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1305:
-.L1487:
-.LCFI411:
-.LBB528:
-.LBB526:
-.LBB524:
-	.loc 5 516 0
+.L1494:
 	mov	r3, #80
-	b	.L1583
-.LVL1306:
-.L1498:
-.LBE524:
-	.loc 5 549 0
-	movw	r3, #2548
-	movw	r2, #3124
+	b	.L1590
+.L1505:
+	movw	r3, #2572
+	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
 	strh	r3, [r5, r2]	@ movhi
-.L1497:
-	.loc 5 551 0
-	movw	r3, #3182
+.L1504:
+	movw	r3, #3206
 	movw	r4, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
-	.loc 5 552 0
 	addne	r6, r6, #32
-.LVL1307:
 	uxthne	r6, r6
-.LVL1308:
-.L1503:
-	.loc 5 595 0
-	movw	r3, #2564
+.L1510:
+	movw	r3, #2588
 	ldrh	r2, [r5, r3]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1512
-	.loc 5 596 0
+	bne	.L1519
 	cmp	r4, r2
-	.loc 5 597 0
 	strhne	r4, [r5, r3]	@ movhi
-	.loc 5 596 0
-	bne	.L1514
-	.loc 5 598 0
-	movw	r2, #3178
+	bne	.L1521
+	movw	r2, #3202
 	ldrh	r3, [r5, r2]
 	cmp	r3, r4
-	beq	.L1514
-	.loc 5 600 0
-	ldr	r1, [r5, #2300]
+	beq	.L1521
+	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
 	cmp	r3, #0
-	.loc 5 601 0
 	mvneq	r3, #0
 	strheq	r3, [r5, r2]	@ movhi
-	.loc 5 602 0
-	movw	r3, #3178
+	movw	r3, #3202
 	ldrh	r1, [r5, r3]
-	movw	r2, #2564
+	movw	r2, #2588
 	strh	r1, [r5, r2]	@ movhi
-	.loc 5 603 0
 	mvn	r2, #0
 	strh	r2, [r5, r3]	@ movhi
-.L1514:
-	.loc 5 607 0
-	movw	r7, #2564
-	.loc 5 606 0
+.L1521:
+	movw	r7, #2588
 	mov	r3, #0
-	.loc 5 607 0
 	ldrh	r0, [r5, r7]
-	.loc 5 606 0
-	strb	r3, [r5, #2572]
-	.loc 5 607 0
+	strb	r3, [r5, #2596]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1512
-	.loc 5 608 0
+	beq	.L1519
 	bl	IsBlkInGcList
-.LVL1309:
 	cmp	r0, #0
-	.loc 5 611 0
-	ldr	r8, .L1591+20
-	.loc 5 609 0
+	ldr	r8, .L1598+16
 	mvnne	r3, #0
 	strhne	r3, [r5, r7]	@ movhi
-	.loc 5 611 0
-	movw	r7, #2564
+	movw	r7, #2588
 	ldrh	r2, [r5, r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1512
-	.loc 5 612 0
+	beq	.L1519
 	mov	r0, r8
 	bl	make_superblock
-.LVL1310:
-	.loc 5 615 0
-	ldr	r2, .L1591+12
-	.loc 5 613 0
+	ldr	r2, .L1598+8
 	mov	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	.loc 5 614 0
-	strb	r3, [r5, #2570]
-	.loc 5 615 0
-	strh	r3, [r2, #-2]	@ movhi
-	.loc 5 616 0
+	strb	r3, [r5, #2594]
+	strh	r3, [r2, #-10]	@ movhi
 	ldrh	r3, [r5, r7]
-	ldr	r1, [r5, #2300]
+	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
-	strh	r3, [r2]	@ movhi
-.L1512:
-	.loc 5 621 0
-	movw	r3, #2564
-	movw	r2, #2324
+	strh	r3, [r2, #-8]	@ movhi
+.L1519:
+	movw	r3, #2588
+	movw	r2, #2348
 	ldrh	r3, [r5, r3]
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1518
-	movw	r2, #2372
+	beq	.L1525
+	movw	r2, #2396
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	.loc 5 627 0
-	ldrne	r7, .L1591
+	ldrne	r7, .L1598
 	movne	r5, r7
-	.loc 5 621 0
-	bne	.L1519
-.L1518:
-	.loc 5 622 0
+	bne	.L1526
+.L1525:
 	mvn	r2, #0
-	movw	r3, #2564
-.LVL1311:
-.L1589:
-	.loc 5 647 0
+	movw	r3, #2588
+.L1596:
 	strh	r2, [r5, r3]	@ movhi
-	.loc 5 648 0
-	ldr	r3, .L1591+12
-.LVL1312:
-.L1590:
-	ldrh	r0, [r3, #-4]
-	b	.L1478
-.LVL1313:
-.L1492:
-	.loc 5 557 0
-	movw	r1, #2420
-	ldrh	r8, [r5, r1]
-	cmp	r8, r2
-	bne	.L1561
-	movw	r2, #3178
+	ldr	r3, .L1598+8
+.L1597:
+	ldrh	r0, [r3, #-12]
+	b	.L1485
+.L1499:
+	movw	r1, #2444
+	ldrh	r7, [r5, r1]
+	cmp	r7, r2
+	bne	.L1568
+	movw	r2, #3202
 	ldrh	r2, [r5, r2]
-	cmp	r2, r8
+	cmp	r2, r7
 	movne	r3, #0
 	andeq	r3, r3, #1
 	cmp	r3, #0
-	beq	.L1561
-	movw	r3, #2564
+	beq	.L1568
+	movw	r3, #2588
 	ldrh	r3, [r5, r3]
-	cmp	r3, r8
-	beq	.L1504
-.L1509:
-	.loc 5 556 0
-	mov	r4, r8
-.L1561:
+	cmp	r3, r7
+	beq	.L1511
+.L1516:
+	mov	r4, r7
+.L1568:
 	mov	r6, #1
-.LVL1314:
-	b	.L1503
-.LVL1315:
-.L1504:
-	.loc 5 560 0
-	ldr	r7, .L1591+8
-	movw	r2, #3124
+	b	.L1510
+.L1511:
+	movw	r3, #2344
+	movw	r2, #3148
+	ldrh	r8, [r5, r3]
 	ldrh	r3, [r5, r2]
-	.loc 5 558 0
-	str	r6, [r5, #3136]
-	.loc 5 560 0
-	ldrh	r9, [r7]
-	ldr	r4, .L1591+12
-	cmp	r3, r9
-	bcs	.L1505
-	.loc 5 561 0
-	ldrh	r3, [r4, #-4]
+	str	r6, [r5, #3160]
+	ldr	r4, .L1598+8
+	cmp	r3, r8
+	bcs	.L1512
+	ldrh	r3, [r4, #-12]
 	cmp	r3, #0
-	bne	.L1506
-	ldr	r3, [r5, #2480]
-	ldr	r1, [r5, #2476]
+	bne	.L1513
+	ldr	r3, [r5, #2504]
+	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
-	.loc 5 564 0
 	movcs	r3, #18
-	.loc 5 561 0
-	bcs	.L1585
-.L1506:
-	.loc 5 562 0
-	movw	r3, #2548
-	movw	r2, #3124
+	bcs	.L1592
+.L1513:
+	movw	r3, #2572
+	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1585:
-	.loc 5 564 0
+.L1592:
 	strh	r3, [r5, r2]	@ movhi
-.L1588:
-	.loc 5 578 0
+.L1595:
 	bl	FtlReadRefresh
-.LVL1316:
-	.loc 5 579 0
-	ldrh	r0, [r4, #-4]
-	b	.L1478
-.L1505:
-	.loc 5 572 0
-	ldrh	r0, [r4, #-4]
+	ldrh	r0, [r4, #-12]
+	b	.L1485
+.L1512:
+	ldrh	r0, [r4, #-12]
 	cmp	r0, #0
-	bne	.L1509
-	.loc 5 573 0
-	movw	r3, #2548
+	bne	.L1516
+	movw	r3, #2572
 	ldrh	r6, [r5, r3]
 	add	r3, r6, r6, lsl #1
 	asr	r3, r3, #2
 	strh	r3, [r5, r2]	@ movhi
-	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1317:
-	.loc 5 575 0
 	uxth	r0, r0
-	ldr	r3, [r5, #2300]
-	ldrh	r1, [r5, #80]
+	ldr	r3, [r5, #2324]
+	ldrh	r1, [r5, #104]
 	lsl	r0, r0, #1
 	ldrh	r2, [r3, r0]
-	ldrh	r3, [r5, #8]
+	ldrh	r3, [r5, #32]
 	mul	r3, r3, r1
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1510
-	.loc 5 576 0
+	ble	.L1517
 	sub	r6, r6, #1
-	.loc 5 575 0
-	cmp	r9, r6
-	bge	.L1588
-.L1510:
-	.loc 5 584 0
+	cmp	r8, r6
+	bge	.L1595
+.L1517:
 	cmp	r2, #0
-	bne	.L1509
-	.loc 5 585 0
+	bne	.L1516
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1318:
-	.loc 5 586 0
-	ldrh	r0, [r7]
+	movw	r3, #2344
+	ldrh	r0, [r5, r3]
 	add	r0, r0, #1
-	b	.L1478
-.LVL1319:
-.L1522:
+	b	.L1485
+.L1529:
 	uxth	r2, r0
 	str	r1, [fp, #-52]
 	add	r10, r10, #1
-	.loc 5 636 0
 	mov	r0, r2
 	str	r2, [fp, #-48]
 	bl	IsBlkInGcList
-.LVL1320:
 	cmp	r0, #0
 	ldr	r2, [fp, #-48]
 	ldr	r1, [fp, #-52]
-	.loc 5 637 0
 	strhne	r10, [r9]	@ movhi
-	.loc 5 636 0
-	bne	.L1521
-	.loc 5 641 0
-	ldrh	lr, [r5, #8]
-	.loc 5 640 0
+	bne	.L1528
+	ldrh	lr, [r5, #32]
 	uxth	r10, r10
-	.loc 5 641 0
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	lsl	r2, r2, #1
-	ldr	r0, [r5, #2300]
-	.loc 5 640 0
+	ldr	r0, [r5, #2324]
 	strh	r10, [r9]	@ movhi
-	.loc 5 641 0
 	mul	r3, lr, r3
 	ldrh	ip, [r0, r2]
 	add	lr, r3, r3, lsr #31
 	cmp	ip, lr, asr #1
-	bgt	.L1525
-	.loc 5 642 0
+	bgt	.L1532
 	cmp	ip, #8
 	cmphi	r10, #48
-	bls	.L1526
-	ldr	ip, .L1591+24
+	bls	.L1533
+	ldr	ip, .L1598+20
 	ldrh	ip, [ip]
 	cmp	ip, #35
-	bhi	.L1526
-.L1525:
-	.loc 5 643 0
-	ldr	lr, .L1591+28
+	bhi	.L1533
+.L1532:
+	ldr	lr, .L1598+24
 	mov	ip, #0
 	strh	ip, [lr]	@ movhi
-.L1526:
-	.loc 5 645 0
+.L1533:
 	ldrh	ip, [r0, r2]
 	movw	r0, #65535
 	cmp	r3, ip
 	cmple	r4, r0
 	moveq	r3, #1
 	movne	r3, #0
-	bne	.L1527
-	.loc 5 646 0
+	bne	.L1534
 	mvn	r2, #0
-	movw	r3, #2564
+	movw	r3, #2588
 	strh	r2, [r5, r3]	@ movhi
-	.loc 5 647 0
 	mov	r2, #0
-	movw	r3, #3132
-	b	.L1589
-.L1527:
-	.loc 5 651 0
+	movw	r3, #3156
+	b	.L1596
+.L1534:
 	cmp	ip, #0
-	bne	.L1528
-	.loc 5 652 0
+	bne	.L1535
 	bl	decrement_vpc_count
-.LVL1321:
-	.loc 5 653 0
-	ldr	r3, .L1591+28
-	ldr	r2, .L1591+28
+	ldr	r3, .L1598+24
+	ldr	r2, .L1598+24
 	ldrh	r3, [r3]
 	add	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1521
-.L1528:
-	.loc 5 656 0
-	strb	r3, [r5, #2572]
-	.loc 5 658 0
-	ldr	r3, .L1591+32
+	b	.L1528
+.L1535:
+	strb	r3, [r5, #2596]
+	ldr	r3, .L1598+28
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bne	.L1529
+	bne	.L1536
 	movw	r2, #658
-	ldr	r1, .L1591+36
-	ldr	r0, .L1591+40
+	ldr	r1, .L1598+32
+	ldr	r0, .L1598+36
 	bl	printk
-.LVL1322:
-.L1529:
-	.loc 5 659 0
-	ldr	r3, .L1591+44
+.L1536:
+	ldr	r3, .L1598+40
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1530
+	bne	.L1537
 	movw	r2, #659
-	ldr	r1, .L1591+36
-	ldr	r0, .L1591+40
+	ldr	r1, .L1598+32
+	ldr	r0, .L1598+36
 	bl	printk
-.LVL1323:
-.L1530:
-	.loc 5 660 0
-	ldr	r3, .L1591+48
+.L1537:
+	ldr	r3, .L1598+44
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1531
+	bne	.L1538
 	mov	r2, #660
-	ldr	r1, .L1591+36
-	ldr	r0, .L1591+40
+	ldr	r1, .L1598+32
+	ldr	r0, .L1598+36
 	bl	printk
-.LVL1324:
-.L1531:
-	.loc 5 661 0
-	ldr	r0, .L1591+20
+.L1538:
+	ldr	r0, .L1598+16
 	bl	make_superblock
-.LVL1325:
-	.loc 5 663 0
 	ldrh	r2, [r8]
-	.loc 5 662 0
 	mov	r3, #0
-	ldr	r1, .L1591+12
-	.loc 5 663 0
-	ldr	r0, [r5, #2300]
+	ldr	r1, .L1598+48
+	ldr	r0, [r5, #2324]
 	lsl	r2, r2, #1
-	.loc 5 662 0
-	strh	r3, [r1, #-2]	@ movhi
-	.loc 5 663 0
+	strh	r3, [r1]	@ movhi
 	ldrh	r2, [r0, r2]
-	.loc 5 664 0
 	strh	r3, [r8, #2]	@ movhi
-	.loc 5 665 0
-	strb	r3, [r5, #2570]
-	.loc 5 663 0
-	strh	r2, [r1]	@ movhi
-.LVL1326:
-.L1520:
-	.loc 5 671 0
+	strb	r3, [r5, #2594]
+	strh	r2, [r1, #2]	@ movhi
+.L1527:
 	bl	FtlReadRefresh
-.LVL1327:
-	.loc 5 674 0
 	mov	r3, #1
-	str	r3, [r5, #3780]
-	.loc 5 675 0
-	ldrh	r3, [r5, #78]
-.LVL1328:
+	str	r3, [r5, #3820]
+	ldrh	r3, [r5, #102]
 	str	r3, [fp, #-56]
-	.loc 5 676 0
 	ldrh	r3, [r8, #2]
-.LVL1329:
 	ldr	r1, [fp, #-56]
-.LVL1330:
 	add	r2, r3, r6
 	cmp	r2, r1
-	.loc 5 677 0
 	movgt	r2, r1
 	subgt	r6, r2, r3
-.LVL1331:
-	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 677 0
 	uxthgt	r6, r6
-.LVL1332:
-.L1587:
+.L1594:
 	str	r3, [fp, #-52]
-	.loc 5 679 0
 	ldrh	r3, [fp, #-52]
-	ldr	r8, .L1591+20
-.LVL1333:
+	ldr	r8, .L1598+16
 	cmp	r6, r3
-	bls	.L1541
-	.loc 5 684 0
+	bls	.L1548
 	ldrh	r9, [r8, #2]
 	mov	r2, #0
 	ldr	r3, [fp, #-52]
-	.loc 5 683 0
 	movw	r10, #65535
-.LVL1334:
-	.loc 5 681 0
-	ldrh	ip, [r7, #8]
-	.loc 5 684 0
-	ldr	r0, [r7, #3156]
+	ldrh	ip, [r7, #32]
+	ldr	r0, [r7, #3180]
 	add	r9, r9, r3
 	add	r3, r8, #14
 	mov	r8, r2
-.LVL1335:
-	b	.L1542
-.LVL1336:
-.L1535:
-	.loc 5 682 0
+	b	.L1549
+.L1542:
 	ldrh	r1, [r3, #2]!
-.LVL1337:
 	add	r2, r2, #1
-	.loc 5 683 0
 	cmp	r1, r10
-	.loc 5 684 0
 	movne	lr, #20
 	orrne	r1, r9, r1, lsl #10
-.LVL1338:
 	mlane	lr, lr, r8, r0
-	.loc 5 685 0
 	addne	r8, r8, #1
-.LVL1339:
 	uxthne	r8, r8
-.LVL1340:
-	.loc 5 684 0
 	strne	r1, [lr, #4]
-.LVL1341:
-.L1542:
-	.loc 5 681 0
+.L1549:
 	uxth	r1, r2
-.LVL1342:
 	cmp	ip, r1
-	bhi	.L1535
-	.loc 5 689 0
-	ldrb	r2, [r7, #2572]	@ zero_extendqisi2
+	bhi	.L1542
+	ldrb	r2, [r7, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.LVL1343:
 	mov	r3, #0
-.LVL1344:
-.L1586:
+.L1593:
 	str	r3, [fp, #-48]
-	.loc 5 691 0
 	ldrh	r3, [fp, #-48]
 	cmp	r3, r8
 	ldrcs	r3, [fp, #-52]
 	addcs	r3, r3, #1
-	bcs	.L1587
-.L1540:
+	bcs	.L1594
+.L1547:
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
-	.loc 5 692 0
-	ldr	r3, [r7, #3156]
+	ldr	r3, [r7, #3180]
 	add	r2, r3, r9
-	.loc 5 693 0
 	ldr	r3, [r3, r9]
 	cmn	r3, #1
-	beq	.L1537
-	.loc 5 692 0
+	beq	.L1544
 	ldr	r10, [r2, #12]
-	.loc 5 693 0
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1537
-	.loc 5 695 0
+	bne	.L1544
 	ldr	r3, [r10, #8]
-.LVL1345:
-	.loc 5 696 0
 	cmn	r3, #1
-	bne	.L1538
+	bne	.L1545
 	mov	r2, #696
-	ldr	r1, .L1591+36
-	ldr	r0, .L1591+40
+	ldr	r1, .L1598+32
+	ldr	r0, .L1598+36
 	str	r3, [fp, #-60]
 	bl	printk
-.LVL1346:
 	ldr	r3, [fp, #-60]
-.LVL1347:
-.L1538:
-	.loc 5 697 0
+.L1545:
 	mov	r2, #0
 	mov	r0, r3
 	sub	r1, fp, #44
 	bl	log2phys
-.LVL1348:
-	.loc 5 698 0
-	ldr	r0, [r5, #3156]
+	ldr	r0, [r5, #3180]
 	ldr	r3, [fp, #-44]
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1537
-	.loc 5 700 0
-	ldr	r3, .L1591+52
-	.loc 5 701 0
+	bne	.L1544
+	ldr	r3, .L1598+48
 	mov	r1, #20
-	ldr	lr, [r5, #3140]
+	ldr	lr, [r5, #3164]
 	ldr	r0, [r0, #16]
-	.loc 5 700 0
 	ldrh	r2, [r3]
-	.loc 5 701 0
 	str	r1, [fp, #-64]
-	.loc 5 700 0
 	add	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-	.loc 5 701 0
-	ldr	r2, [r5, #3796]
-	.loc 5 700 0
+	strh	r2, [r3], #10	@ movhi
+	ldr	r2, [r5, #3836]
 	str	r3, [fp, #-68]
-	.loc 5 701 0
 	mla	r2, r1, lr, r2
 	str	r0, [r2, #16]
 	str	r2, [fp, #-60]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1349:
 	ldr	r2, [fp, #-60]
-	.loc 5 703 0
 	ldr	r1, [fp, #-64]
-	.loc 5 702 0
 	str	r0, [r2, #4]
-	.loc 5 703 0
-	ldr	r0, [r5, #3140]
-	ldr	r2, [r5, #3796]
+	ldr	r0, [r5, #3164]
+	ldr	r2, [r5, #3836]
 	mla	r1, r1, r0, r2
-	ldr	r2, [r5, #3156]
+	ldr	r2, [r5, #3180]
 	add	r2, r2, r9
 	ldr	r0, [r2, #8]
 	str	r0, [r1, #8]
-	.loc 5 704 0
 	ldr	r2, [r2, #12]
 	str	r2, [r1, #12]
-	.loc 5 705 0
 	ldr	r2, [fp, #-44]
-.LVL1350:
 	str	r2, [r10, #12]
-	.loc 5 706 0
-	ldr	r2, .L1591+48
-.LVL1351:
+	ldr	r2, .L1598+44
 	ldrh	r1, [r2]
 	str	r2, [fp, #-60]
 	strh	r1, [r10, #2]	@ movhi
-	.loc 5 709 0
-	ldr	r1, [r5, #2520]
-	.loc 5 712 0
-	ldr	r0, [r5, #3156]
-	.loc 5 709 0
+	ldr	r1, [r5, #2544]
+	ldr	r0, [r5, #3180]
 	str	r1, [r10, #4]
-	.loc 5 711 0
-	ldr	r1, [r5, #3140]
-	.loc 5 712 0
+	ldr	r1, [r5, #3164]
 	add	r0, r0, r9
-	.loc 5 711 0
 	add	r1, r1, #1
-	str	r1, [r5, #3140]
-	.loc 5 712 0
+	str	r1, [r5, #3164]
 	mov	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1352:
-	.loc 5 713 0
-	ldrb	r0, [r5, #2427]	@ zero_extendqisi2
-	ldr	r1, [r5, #3140]
+	ldrb	r0, [r5, #2451]	@ zero_extendqisi2
+	ldr	r1, [r5, #3164]
 	ldr	r3, [fp, #-68]
 	cmp	r0, r1
-	beq	.L1539
+	beq	.L1546
 	ldr	r2, [fp, #-60]
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1537
-.L1539:
+	bne	.L1544
+.L1546:
 	str	r3, [fp, #-60]
-	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1353:
 	cmp	r0, #0
 	ldr	r3, [fp, #-60]
-	.loc 5 715 0
-	ldrne	r2, .L1591
+	ldrne	r2, .L1598
 	movne	r1, #0
-	strne	r1, [r2, #3780]
-	bne	.L1590
-.L1537:
+	strne	r1, [r2, #3820]
+	bne	.L1597
+.L1544:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L1586
-.LVL1354:
-.L1541:
-	.loc 5 723 0
+	b	.L1593
+.L1548:
 	ldrh	r3, [r8, #2]
 	add	r6, r6, r3
-.LVL1355:
-	.loc 5 725 0
 	ldr	r3, [fp, #-56]
-.LVL1356:
-	.loc 5 723 0
 	uxth	r6, r6
-	.loc 5 725 0
 	cmp	r3, r6
-	.loc 5 723 0
 	strh	r6, [r8, #2]	@ movhi
-	ldr	r6, .L1591+12
-	.loc 5 725 0
-	bls	.L1543
-	ldrh	r2, [r6, #-2]
-	ldrh	r3, [r6]
-.LVL1357:
+	ldr	r6, .L1598+8
+	bls	.L1550
+	ldrh	r2, [r6, #-10]
+	ldrh	r3, [r6, #-8]
 	cmp	r2, r3
-	bne	.L1544
-.LVL1358:
-.L1543:
-	.loc 5 727 0
-	ldr	r3, [r7, #3140]
-.LVL1359:
+	bne	.L1551
+.L1550:
+	ldr	r3, [r7, #3164]
 	cmp	r3, #0
-	beq	.L1545
-	.loc 5 728 0
+	beq	.L1552
 	bl	Ftl_gc_temp_data_write_back
-.LVL1360:
 	cmp	r0, #0
-	.loc 5 729 0
 	movne	r3, #0
-	.loc 5 730 0
-	ldrhne	r0, [r6, #-4]
-	.loc 5 729 0
-	strne	r3, [r7, #3780]
-	bne	.L1478
-.L1545:
-	.loc 5 733 0
-	ldrh	r1, [r6, #-2]
+	ldrhne	r0, [r6, #-12]
+	strne	r3, [r7, #3820]
+	bne	.L1485
+.L1552:
+	ldrh	r1, [r6, #-10]
 	cmp	r1, #0
-	bne	.L1546
+	bne	.L1553
 	ldrh	r3, [r8]
-	ldr	r2, [r7, #2300]
+	ldr	r2, [r7, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	cmp	r0, #0
-	beq	.L1546
-	.loc 5 735 0
+	beq	.L1553
 	strh	r1, [r2, r3]	@ movhi
-	.loc 5 736 0
 	ldrh	r0, [r8]
 	bl	update_vpc_list
-.LVL1361:
-	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1362:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1363:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1364:
-.L1546:
-	.loc 5 741 0
+.L1553:
 	mvn	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1544:
-	.loc 5 743 0
-	ldr	r3, .L1591+8
+.L1551:
+	ldr	r3, .L1598+52
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1547
-	.loc 5 745 0
-	ldrh	r6, [r7, #78]
-.LVL1365:
-.L1519:
-	.loc 5 627 0
-	ldr	r8, .L1591+20
+	bhi	.L1554
+	ldrh	r6, [r7, #102]
+.L1526:
+	ldr	r8, .L1598+16
 	movw	r3, #65535
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1520
-	.loc 5 631 0
+	bne	.L1527
 	add	r9, r8, #568
-	.loc 5 628 0
 	mov	r3, #0
-	str	r3, [r7, #3136]
-.L1521:
-	.loc 5 631 0
+	str	r3, [r7, #3160]
+.L1528:
 	ldrh	r10, [r9]
-.LVL1366:
 	mov	r0, r10
 	bl	List_get_gc_head_node
-.LVL1367:
-	ldr	r3, .L1591+20
+	ldr	r3, .L1598+16
 	uxth	r1, r0
 	strh	r1, [r3]	@ movhi
-	.loc 5 632 0
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L1522
-	.loc 5 633 0
+	bne	.L1529
 	mov	r3, #0
-	.loc 5 634 0
 	mov	r0, #8
-	.loc 5 633 0
 	strh	r3, [r9]	@ movhi
-	b	.L1478
-.LVL1368:
-.L1547:
-	.loc 5 750 0
-	ldrh	r0, [r6, #-4]
-	.loc 5 748 0
+	b	.L1485
+.L1554:
+	ldrh	r0, [r6, #-12]
 	mov	r2, #0
-	str	r2, [r7, #3780]
-	.loc 5 750 0
+	str	r2, [r7, #3820]
 	cmp	r0, r2
-	.loc 5 753 0
 	addeq	r0, r3, #1
-	b	.L1478
-.L1592:
+	b	.L1485
+.L1599:
 	.align	2
-.L1591:
+.L1598:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR0+2320
-	.word	.LANCHOR3-4064
-	.word	.LC103
-	.word	.LANCHOR0+2564
-	.word	.LANCHOR0+3168
-	.word	.LANCHOR0+3132
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR3-4016
+	.word	.LC104
+	.word	.LANCHOR0+2588
+	.word	.LANCHOR0+3192
+	.word	.LANCHOR0+3156
+	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+551
 	.word	.LC1
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR3-4066
-.LBE526:
-.LBE528:
-.LFE269:
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR3-4026
+	.word	.LANCHOR0+2344
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
 	.global	sftl_gc
@@ -17090,24 +11072,15 @@ rk_ftl_garbage_collect:
 	.fpu softvfp
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB270:
-	.loc 5 757 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI412:
 	push	{fp, ip, lr, pc}
-.LCFI413:
 	sub	fp, ip, #4
-.LCFI414:
-	.loc 5 758 0
 	mov	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
-.LVL1369:
-	.loc 5 759 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE270:
 	.size	sftl_gc, .-sftl_gc
 	.align	2
 	.global	FtlRead
@@ -17116,236 +11089,131 @@ sftl_gc:
 	.fpu softvfp
 	.type	FtlRead, %function
 FtlRead:
-.LFB164:
-	.loc 3 814 0
 	@ args = 0, pretend = 0, frame = 52
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1370:
 	mov	ip, sp
-.LCFI415:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI416:
 	sub	fp, ip, #4
-.LCFI417:
 	sub	sp, sp, #52
-	.loc 3 814 0
 	uxtb	r0, r0
 	mov	r6, r1
 	str	r2, [fp, #-68]
-	.loc 3 824 0
 	cmp	r0, #16
-	.loc 3 814 0
 	mov	r9, r3
-	.loc 3 824 0
-	bne	.L1595
-	.loc 3 825 0
+	bne	.L1602
 	mov	r2, r3
-.LVL1371:
 	ldr	r1, [fp, #-68]
 	add	r0, r6, #256
-.LVL1372:
 	bl	FtlVendorPartRead
-.LVL1373:
 	str	r0, [fp, #-48]
-.LVL1374:
-.L1594:
-	.loc 3 901 0
+.L1601:
 	ldr	r0, [fp, #-48]
-.LVL1375:
 	sub	sp, fp, #40
-.LCFI418:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1376:
-.L1595:
-.LCFI419:
-	.loc 3 830 0
+.L1602:
 	ldr	r3, [fp, #-68]
-.LVL1377:
-	ldr	r10, .L1628
+	ldr	r10, .L1635
 	add	r3, r1, r3
-.LVL1378:
 	str	r3, [fp, #-56]
 	ldr	r2, [fp, #-56]
-	ldr	r3, [r10, #116]
+	ldr	r3, [r10, #140]
 	cmp	r2, r3
-	.loc 3 831 0
 	mvnhi	r3, #0
 	strhi	r3, [fp, #-48]
-	.loc 3 830 0
-	bhi	.L1594
-	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1628+4
+	bhi	.L1601
+	ldr	r3, .L1635+4
 	ldr	r7, [r3]
 	cmn	r7, #1
-	.loc 3 831 0 is_stmt 1 discriminator 1
 	streq	r7, [fp, #-48]
-	.loc 3 830 0 discriminator 1
-	beq	.L1594
-	.loc 3 833 0
+	beq	.L1601
 	bl	FtlCacheWriteBack
-.LVL1379:
-	.loc 3 835 0
-	ldrh	r4, [r10, #34]
+	ldrh	r4, [r10, #58]
 	mov	r0, r6
-	.loc 3 828 0
 	mov	r8, #0
-.LVL1380:
-	.loc 3 851 0
 	mov	r7, r10
-	.loc 3 840 0
 	mov	r5, r8
-.LVL1381:
-	.loc 3 835 0
 	mov	r1, r4
 	bl	__udivsi3
-.LVL1382:
-	.loc 3 836 0
 	ldr	r3, [fp, #-56]
 	mov	r1, r4
-	.loc 3 835 0
 	str	r0, [fp, #-60]
-	.loc 3 836 0
 	sub	r0, r3, #1
 	bl	__udivsi3
-.LVL1383:
-	.loc 3 837 0
 	ldr	r3, [fp, #-60]
-.LVL1384:
-	.loc 3 835 0
 	ldr	r4, [fp, #-60]
-.LVL1385:
-	.loc 3 836 0
 	str	r0, [fp, #-64]
-	.loc 3 837 0
 	rsb	r3, r3, #1
-.LVL1386:
-	.loc 3 828 0
 	str	r8, [fp, #-76]
-.LVL1387:
-	.loc 3 837 0
 	add	r3, r3, r0
-.LVL1388:
-	.loc 3 820 0
 	str	r8, [fp, #-72]
-	.loc 3 837 0
 	str	r3, [fp, #-52]
-	.loc 3 841 0
 	ldr	r2, [fp, #-52]
-.LVL1389:
-	ldr	r3, [r10, #2484]
-	.loc 3 815 0
+	ldr	r3, [r10, #2508]
 	str	r8, [fp, #-48]
-	.loc 3 841 0
 	add	r3, r3, r2
-	str	r3, [r10, #2484]
-.LVL1390:
-.L1597:
-	.loc 3 842 0
+	str	r3, [r10, #2508]
+.L1604:
 	ldr	r3, [fp, #-52]
-.LVL1391:
 	cmp	r3, #0
-	bne	.L1613
-	.loc 3 898 0
-	ldr	r3, .L1628
-.LVL1392:
-	movw	r2, #3182
+	bne	.L1620
+	ldr	r3, .L1635
+	movw	r2, #3206
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	bne	.L1614
-	.loc 3 898 0 is_stmt 0 discriminator 1
-	add	r3, r3, #2320
-	ldrh	r3, [r3]
+	bne	.L1621
+	movw	r2, #2344
+	ldrh	r3, [r3, r2]
 	cmp	r3, #31
-	bhi	.L1594
-.L1614:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1601
+.L1621:
 	mov	r1, #1
 	mov	r0, #0
-.LVL1393:
 	bl	rk_ftl_garbage_collect
-.LVL1394:
-	b	.L1594
-.LVL1395:
-.L1613:
-	.loc 3 843 0
+	b	.L1601
+.L1620:
 	sub	r1, fp, #44
 	mov	r2, #0
 	mov	r0, r4
-.LVL1396:
 	bl	log2phys
-.LVL1397:
-	.loc 3 844 0
 	ldr	r1, [fp, #-44]
 	cmn	r1, #1
 	moveq	r10, #0
-.LVL1398:
-	beq	.L1599
-	.loc 3 851 0
-	ldr	r2, [r7, #3792]
+	beq	.L1606
+	ldr	r2, [r7, #3832]
 	mov	r0, #20
-	.loc 3 852 0
 	ldr	r3, [fp, #-60]
-.LVL1399:
-	ldrh	r10, [r7, #34]
-.LVL1400:
-	.loc 3 851 0
+	ldrh	r10, [r7, #58]
 	mla	r2, r0, r5, r2
-	.loc 3 852 0
 	cmp	r4, r3
-	.loc 3 851 0
 	str	r1, [r2, #4]
-	.loc 3 852 0
-	bne	.L1603
-	.loc 3 853 0
-	ldr	r1, [r7, #3776]
-	.loc 3 854 0
+	bne	.L1610
+	ldr	r1, [r7, #3816]
 	mov	r0, r6
-	.loc 3 853 0
 	str	r2, [fp, #-80]
 	str	r1, [r2, #8]
-	.loc 3 854 0
 	mov	r1, r10
 	bl	__umodsi3
-.LVL1401:
 	ldr	r3, [fp, #-68]
-.LVL1402:
-	.loc 3 855 0
 	sub	r1, r10, r0
-	.loc 3 857 0
 	ldr	r2, [fp, #-80]
-	.loc 3 854 0
 	str	r0, [fp, #-72]
-.LVL1403:
 	cmp	r3, r1
 	movcs	r3, r1
-.LVL1404:
-	.loc 3 857 0
 	cmp	r3, r10
 	str	r3, [fp, #-76]
-	.loc 3 858 0
 	streq	r9, [r2, #8]
-.LVL1405:
-.L1604:
-	.loc 3 867 0
-	ldrh	r1, [r7, #88]
-	ldr	r0, [r7, #3772]
-	.loc 3 868 0
+.L1611:
+	ldrh	r1, [r7, #112]
+	ldr	r0, [r7, #3812]
 	str	r4, [r2, #16]
-	.loc 3 867 0
 	mul	r1, r5, r1
-	.loc 3 869 0
 	add	r5, r5, #1
-	.loc 3 867 0
 	bic	r1, r1, #3
 	add	r1, r0, r1
 	str	r1, [r2, #12]
-	b	.L1602
-.LVL1406:
-.L1601:
-	.loc 3 846 0
+	b	.L1609
+.L1608:
 	mla	r0, r0, r4, r10
-.LVL1407:
-	.loc 3 847 0
 	ldr	r2, [fp, #-56]
 	cmp	r2, r0
 	movhi	r2, #1
@@ -17353,196 +11221,125 @@ FtlRead:
 	cmp	r6, r0
 	movhi	r2, #0
 	cmp	r2, #0
-	beq	.L1600
-	.loc 3 848 0
+	beq	.L1607
 	sub	r0, r0, r6
-.LVL1408:
-.LBB535:
-.LBB536:
-.LBB537:
-	.loc 1 202 0
 	mov	r1, #512
 	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.LVL1409:
-.L1600:
-.LBE537:
-.LBE536:
-.LBE535:
-	.loc 3 845 0 discriminator 2
+.L1607:
 	add	r10, r10, #1
-.L1599:
-	.loc 3 845 0 is_stmt 0 discriminator 1
-	ldrh	r0, [r7, #34]
-.LVL1410:
+.L1606:
+	ldrh	r0, [r7, #58]
 	cmp	r10, r0
-	bcc	.L1601
-.LVL1411:
-.L1602:
-	.loc 3 874 0 is_stmt 1
+	bcc	.L1608
+.L1609:
 	ldr	r3, [fp, #-52]
-.LVL1412:
-	.loc 3 872 0
 	add	r4, r4, #1
-	.loc 3 874 0
 	subs	r3, r3, #1
 	str	r3, [fp, #-52]
-	beq	.L1606
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r7, #8]
+	beq	.L1613
+	ldrh	r2, [r7, #32]
 	cmp	r5, r2, lsl #2
-	bne	.L1597
-.L1606:
-	.loc 3 875 0 is_stmt 1
+	bne	.L1604
+.L1613:
 	cmp	r5, #0
-	beq	.L1597
-	.loc 3 876 0
+	beq	.L1604
 	mov	r2, #0
 	mov	r1, r5
-	ldr	r0, [r7, #3792]
-	.loc 3 877 0
+	ldr	r0, [r7, #3832]
 	mov	r10, #0
-.LVL1413:
-	.loc 3 876 0
 	bl	FlashReadPages
-.LVL1414:
-	.loc 3 883 0
 	lsl	r3, r8, #9
 	str	r3, [fp, #-88]
-	.loc 3 880 0
 	ldr	r3, [fp, #-72]
-.LVL1415:
 	lsl	r3, r3, #9
-.LVL1416:
 	str	r3, [fp, #-80]
 	ldr	r3, [fp, #-76]
 	lsl	r3, r3, #9
 	str	r3, [fp, #-84]
-.LVL1417:
-.L1612:
+.L1619:
 	mov	r3, #20
-.LVL1418:
-	.loc 3 878 0
-	ldr	r2, [r7, #3792]
+	ldr	r2, [r7, #3832]
 	mul	ip, r3, r10
 	ldr	r3, [fp, #-60]
-.LVL1419:
 	add	r2, r2, ip
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1608
-	.loc 3 879 0
+	bne	.L1615
 	ldr	r1, [r2, #8]
-	ldr	r2, [r7, #3776]
+	ldr	r2, [r7, #3816]
 	cmp	r1, r2
-	bne	.L1609
-	.loc 3 880 0
+	bne	.L1616
 	ldr	r3, [fp, #-80]
-.LVL1420:
 	mov	r0, r9
 	ldr	r2, [fp, #-84]
 	str	ip, [fp, #-92]
 	add	r1, r1, r3
-.LVL1421:
-.L1627:
-	.loc 3 883 0
+.L1634:
 	bl	ftl_memcpy
-.LVL1422:
 	ldr	ip, [fp, #-92]
-.LVL1423:
-.L1609:
-	.loc 3 885 0
-	ldr	r2, [r7, #3792]
+.L1616:
+	ldr	r2, [r7, #3832]
 	ldr	r0, [r2, ip]
 	add	lr, r2, ip
 	cmn	r0, #1
-	.loc 3 886 0
-	ldreq	r1, [r7, #2684]
-	.loc 3 887 0
+	ldreq	r1, [r7, #2708]
 	streq	r0, [fp, #-48]
-	.loc 3 886 0
 	addeq	r1, r1, #1
-	streq	r1, [r7, #2684]
-	.loc 3 889 0
+	streq	r1, [r7, #2708]
 	ldr	r2, [r2, ip]
 	cmp	r2, #256
-	bne	.L1611
-.LBB538:
-	.loc 3 890 0
+	bne	.L1618
 	ldr	r0, [lr, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1424:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1425:
-.L1611:
-.LBE538:
-	.loc 3 877 0 discriminator 2
+.L1618:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1612
-	.loc 3 894 0
+	bne	.L1619
 	mov	r5, #0
-	b	.L1597
-.LVL1426:
-.L1603:
-	.loc 3 859 0
+	b	.L1604
+.L1610:
 	ldr	r3, [fp, #-64]
-.LVL1427:
 	cmp	r4, r3
-	bne	.L1605
-	.loc 3 860 0
-	ldr	r1, [r7, #3768]
-	.loc 3 861 0
+	bne	.L1612
+	ldr	r1, [r7, #3808]
 	ldr	r3, [fp, #-56]
-.LVL1428:
-	.loc 3 860 0
 	str	r1, [r2, #8]
-	.loc 3 861 0
 	mul	r1, r10, r4
 	sub	r8, r3, r1
-	.loc 3 862 0
 	cmp	r10, r8
-	.loc 3 863 0
 	subeq	r1, r1, r6
 	addeq	r1, r9, r1, lsl #9
 	streq	r1, [r2, #8]
-	b	.L1604
-.LVL1429:
-.L1605:
-	.loc 3 865 0
+	b	.L1611
+.L1612:
 	mul	r10, r4, r10
 	sub	r10, r10, r6
 	add	r10, r9, r10, lsl #9
 	str	r10, [r2, #8]
-	b	.L1604
-.LVL1430:
-.L1608:
-	.loc 3 881 0
+	b	.L1611
+.L1615:
 	ldr	r3, [fp, #-64]
-.LVL1431:
 	cmp	r3, r1
-	bne	.L1609
-	.loc 3 882 0
+	bne	.L1616
 	ldr	r1, [r2, #8]
-	ldr	r2, [r7, #3768]
+	ldr	r2, [r7, #3808]
 	cmp	r1, r2
-	bne	.L1609
-	.loc 3 883 0
-	ldrh	r0, [r7, #34]
+	bne	.L1616
+	ldrh	r0, [r7, #58]
 	str	ip, [fp, #-92]
 	ldr	r2, [fp, #-88]
 	mul	r0, r3, r0
 	sub	r0, r0, r6
 	add	r0, r9, r0, lsl #9
-	b	.L1627
-.L1629:
+	b	.L1634
+.L1636:
 	.align	2
-.L1628:
+.L1635:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-.LFE164:
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
@@ -17551,794 +11348,511 @@ FtlRead:
 	.fpu softvfp
 	.type	sftl_read, %function
 sftl_read:
-.LFB169:
-	.loc 3 1204 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1432:
 	mov	ip, sp
-.LCFI420:
 	push	{fp, ip, lr, pc}
-.LCFI421:
 	sub	fp, ip, #4
-.LCFI422:
-	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1433:
 	mov	r1, r0
-.LVL1434:
 	mov	r0, #0
-.LVL1435:
 	bl	FtlRead
-.LVL1436:
-	.loc 3 1206 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE169:
 	.size	sftl_read, .-sftl_read
 	.align	2
+	.global	sftl_vendor_read
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	mov	r0, #16
+	bl	FtlRead
+	ldmfd	sp, {fp, sp, pc}
+	.size	sftl_vendor_read, .-sftl_vendor_read
+	.align	2
 	.global	FtlWrite
 	.syntax unified
 	.arm
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB167:
-	.loc 3 962 0
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1437:
 	mov	ip, sp
-.LCFI423:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI424:
 	sub	fp, ip, #4
-.LCFI425:
 	sub	sp, sp, #64
-	.loc 3 962 0
 	uxtb	r0, r0
 	mov	r8, r1
 	str	r2, [fp, #-76]
-	.loc 3 970 0
 	cmp	r0, #16
-	.loc 3 962 0
 	str	r3, [fp, #-80]
-	.loc 3 970 0
-	bne	.L1632
-	.loc 3 971 0
+	bne	.L1640
 	mov	r2, r3
-.LVL1438:
 	ldr	r1, [fp, #-76]
 	add	r0, r8, #256
-.LVL1439:
 	bl	FtlVendorPartWrite
-.LVL1440:
-.L1631:
-	.loc 3 1153 0
+.L1639:
 	sub	sp, fp, #40
-.LCFI426:
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.LVL1441:
-.L1632:
-.LCFI427:
-	.loc 3 974 0
+.L1640:
 	ldr	r3, [fp, #-76]
-.LVL1442:
-	ldr	r9, .L1696
+	ldr	r9, .L1704
 	add	r6, r1, r3
-	ldr	r3, [r9, #116]
-.LVL1443:
+	ldr	r3, [r9, #140]
 	cmp	r6, r3
-	.loc 3 975 0
 	mvnhi	r0, #0
-.LVL1444:
-	.loc 3 974 0
-	bhi	.L1631
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r5, .L1696+4
+	bhi	.L1639
+	ldr	r5, .L1704+4
 	ldr	r0, [r5]
 	cmn	r0, #1
-	beq	.L1631
-	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1696+8
+	beq	.L1639
+	ldr	r3, .L1704+8
 	mov	r2, #2048
-	.loc 3 978 0
-	ldrh	r4, [r9, #34]
+	ldrh	r4, [r9, #58]
 	mov	r0, r8
-	.loc 3 977 0
-	str	r2, [r3, #-4060]
-	.loc 3 978 0
+	str	r2, [r3, #-4020]
 	mov	r1, r4
 	bl	__udivsi3
-.LVL1445:
-	.loc 3 979 0
 	mov	r1, r4
-	.loc 3 978 0
 	str	r0, [fp, #-68]
-	.loc 3 979 0
 	sub	r0, r6, #1
 	bl	__udivsi3
-.LVL1446:
-	.loc 3 980 0
 	ldr	r2, [fp, #-68]
-.LVL1447:
-	.loc 3 983 0
-	ldr	r10, [r9, #3948]
-	.loc 3 979 0
+	ldr	r10, [r9, #3988]
 	str	r0, [fp, #-88]
-.LVL1448:
-	.loc 3 980 0
 	sub	r6, r0, r2
 	add	r3, r6, #1
-.LVL1449:
-	.loc 3 982 0
 	add	r2, r6, #1
-.LVL1450:
-	.loc 3 980 0
 	str	r3, [fp, #-72]
-	.loc 3 983 0
 	cmp	r10, #0
-	.loc 3 982 0
-	ldr	r3, [r9, #2492]
+	ldr	r3, [r9, #2516]
 	add	r3, r3, r2
-	str	r3, [r9, #2492]
-	.loc 3 983 0
-	beq	.L1634
-	.loc 3 984 0
+	str	r3, [r9, #2516]
+	beq	.L1642
 	ldr	r3, [r10, #16]
 	ldr	r2, [fp, #-68]
-.LVL1451:
 	cmp	r2, r3
-	beq	.L1635
-	.loc 3 985 0
+	beq	.L1643
 	bl	FtlCacheWriteBack
-.LVL1452:
-.L1634:
-	.loc 3 1008 0
+.L1642:
 	ldr	r3, [r5, #8]
-	ldr	r4, .L1696+12
-.LVL1453:
+	ldr	r4, .L1704+12
 	cmp	r3, #0
-	beq	.L1637
-	.loc 3 1008 0 is_stmt 0 discriminator 1
+	beq	.L1645
 	ldrh	r3, [r4, #4]
-	.loc 3 1009 0 is_stmt 1 discriminator 1
 	add	r0, r4, #48
-.LVL1454:
 	cmp	r3, #0
 	moveq	r4, r0
-.LVL1455:
-.L1637:
-	.loc 3 1068 0
+.L1645:
 	ldr	r5, [fp, #-68]
-.LVL1456:
-	.loc 3 1012 0
-	ldr	r7, .L1696
-.LVL1457:
-.L1638:
-	.loc 3 1011 0
+	ldr	r7, .L1704
+.L1646:
 	ldr	r3, [fp, #-72]
-.LVL1458:
 	cmp	r3, #0
-	beq	.L1672
-	.loc 3 1012 0
+	beq	.L1680
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r7, #8]
-.LVL1459:
+	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1639
-	.loc 3 1012 0 is_stmt 0 discriminator 1
+	bcc	.L1647
 	mov	r2, #1012
-	ldr	r1, .L1696+16
-	ldr	r0, .L1696+20
-.LVL1460:
+	ldr	r1, .L1704+16
+	ldr	r0, .L1704+20
 	bl	printk
-.LVL1461:
-.L1639:
-	.loc 3 1013 0 is_stmt 1
+.L1647:
 	ldrh	r9, [r4, #4]
-.LVL1462:
 	cmp	r9, #0
-	bne	.L1640
-	.loc 3 1014 0
+	bne	.L1648
 	bl	FtlCacheWriteBack
-.LVL1463:
-	.loc 3 1016 0
-	ldr	r3, .L1696+12
-	ldr	r6, .L1696+4
+	ldr	r3, .L1704+12
+	ldr	r6, .L1704+4
 	cmp	r4, r3
-	bne	.L1641
-	.loc 3 1017 0
+	bne	.L1649
 	add	r0, r4, #48
 	ldrh	r9, [r0, #4]
 	cmp	r9, #0
-	bne	.L1642
-	.loc 3 1018 0
+	bne	.L1650
 	bl	allocate_new_data_superblock
-.LVL1464:
-	.loc 3 1019 0
 	str	r9, [r6, #8]
-.L1642:
-	.loc 3 1021 0
-	ldr	r0, .L1696+12
+.L1650:
+	ldr	r0, .L1704+12
 	bl	allocate_new_data_superblock
-.LVL1465:
-	.loc 3 1023 0
-	ldr	r4, .L1696+12
-.LVL1466:
-	.loc 3 1022 0
+	ldr	r4, .L1704+12
 	ldr	r3, [r6, #8]
-	.loc 3 1023 0
 	add	r0, r4, #48
 	cmp	r3, #0
 	movne	r4, r0
-.LVL1467:
-.L1643:
-	.loc 3 1033 0
+.L1651:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1640
-	.loc 3 1034 0
+	bne	.L1648
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1468:
-.L1640:
-	.loc 3 1043 0
+.L1648:
 	ldrh	r3, [r4, #4]
 	ldr	r2, [fp, #-72]
-.LVL1469:
 	cmp	r3, r2
 	movcs	r3, r2
-	.loc 3 1041 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-.LVL1470:
 	lsl	r2, r2, #2
 	cmp	r3, r2
 	movcs	r3, r2
-	.loc 3 1045 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	str	r3, [fp, #-104]
-	ldrh	r3, [r7, #8]
+	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1644
-	.loc 3 1045 0 is_stmt 0 discriminator 1
+	bcc	.L1652
 	movw	r2, #1045
-	ldr	r1, .L1696+16
-	ldr	r0, .L1696+20
-.LVL1471:
+	ldr	r1, .L1704+16
+	ldr	r0, .L1704+20
 	bl	printk
-.LVL1472:
-.L1644:
-	.loc 3 1068 0 is_stmt 1 discriminator 1
+.L1652:
 	mov	r9, #0
-.LVL1473:
-.L1645:
-	.loc 3 1046 0 discriminator 1
+.L1653:
 	ldr	r3, [fp, #-104]
 	cmp	r9, r3
-	bne	.L1666
-.L1646:
-	.loc 3 1127 0
-	ldr	r3, [r7, #3948]
+	bne	.L1674
+.L1654:
+	ldr	r3, [r7, #3988]
 	cmp	r3, #0
-	beq	.L1667
-	.loc 3 1129 0
+	beq	.L1675
 	ldr	r3, [fp, #-72]
-.LVL1474:
-	.loc 3 1130 0
 	subs	r9, r9, #1
-	.loc 3 1129 0
 	sub	r3, r3, #1
 	str	r3, [fp, #-72]
-	.loc 3 1130 0
-	bne	.L1667
-.L1672:
-	.loc 3 1137 0
+	bne	.L1675
+.L1680:
 	ldr	r3, [fp, #-88]
-.LVL1475:
 	mov	r0, #0
 	ldr	r2, [fp, #-68]
-.LVL1476:
-	.loc 3 1139 0
-	ldr	r4, .L1696+24
-.LVL1477:
-	.loc 3 1137 0
 	sub	r1, r3, r2
 	bl	rk_ftl_garbage_collect
-.LVL1478:
-	.loc 3 1139 0
-	ldrh	r3, [r4]
+	ldr	r2, .L1704
+	movw	r3, #2344
+	ldrh	r3, [r2, r3]
 	cmp	r3, #15
-	.loc 3 1141 0
-	addls	r5, r4, #244
-.LVL1479:
-	ldrls	r6, .L1696+28
-	.loc 3 1139 0
-	bhi	.L1669
-.L1692:
-	.loc 3 1141 0
-	ldrh	r3, [r5]
+	bhi	.L1677
+	ldr	r4, .L1704+24
+	ldr	r5, .L1704+28
+.L1700:
+	ldrh	r3, [r4]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1673
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
+	bne	.L1681
+	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1673
-	.loc 3 1142 0 is_stmt 1
+	bne	.L1681
 	mov	r0, #0
 	bl	List_get_gc_head_node
-.LVL1480:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1481:
-.L1673:
-	.loc 3 1143 0
-	ldr	r3, .L1696+32
-	.loc 3 1145 0
+.L1681:
+	ldr	r3, .L1704+32
 	mov	r1, #1
-	.loc 3 1143 0
 	mov	r2, #128
-	.loc 3 1145 0
 	mov	r0, r1
-	.loc 3 1143 0
 	strh	r2, [r3]	@ movhi
-	.loc 3 1144 0
 	strh	r2, [r3, #-2]	@ movhi
-	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1482:
-	.loc 3 1146 0
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1483:
-	.loc 3 1147 0
-	ldrh	r3, [r4]
+	ldr	r3, .L1704+36
+	ldrh	r3, [r3]
 	cmp	r3, #8
-	bls	.L1692
-	b	.L1669
-.LVL1484:
-.L1635:
-	.loc 3 987 0
-	ldr	r3, [r9, #2496]
-	.loc 3 988 0
+	bls	.L1700
+	b	.L1677
+.L1643:
+	ldr	r3, [r9, #2520]
 	mov	r1, r4
 	mov	r0, r8
-.LVL1485:
-	.loc 3 987 0
 	add	r3, r3, #1
-	str	r3, [r9, #2496]
-	.loc 3 988 0
+	str	r3, [r9, #2520]
 	bl	__umodsi3
-.LVL1486:
 	ldr	r3, [fp, #-76]
-.LVL1487:
-	.loc 3 989 0
 	sub	r4, r4, r0
-	.loc 3 992 0
 	ldr	r1, [fp, #-80]
 	cmp	r3, r4
 	movcc	r4, r3
 	ldr	r3, [r10, #8]
-.LVL1488:
 	lsl	r9, r4, #9
 	mov	r2, r9
 	add	r0, r3, r0, lsl #9
 	bl	ftl_memcpy
-.LVL1489:
-	.loc 3 994 0
 	cmp	r6, #0
-	bne	.L1636
-.LVL1490:
-.L1669:
-	.loc 3 995 0
+	bne	.L1644
+.L1677:
 	mov	r0, #0
-	b	.L1631
-.LVL1491:
-.L1636:
-	.loc 3 996 0
+	b	.L1639
+.L1644:
 	ldr	r3, [fp, #-76]
-.LVL1492:
-	.loc 3 997 0
 	add	r8, r8, r4
-	.loc 3 996 0
 	sub	r3, r3, r4
 	str	r3, [fp, #-76]
-	.loc 3 998 0
 	ldr	r3, [fp, #-80]
-.LVL1493:
 	add	r3, r3, r9
 	str	r3, [fp, #-80]
-	.loc 3 999 0
 	ldr	r3, [fp, #-68]
-.LVL1494:
 	add	r3, r3, #1
 	str	r3, [fp, #-68]
-	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1495:
 	str	r6, [fp, #-72]
-	b	.L1634
-.LVL1496:
-.L1641:
-	.loc 3 1028 0
+	b	.L1642
+.L1649:
 	ldrh	r2, [r3, #4]
-	.loc 3 1027 0
 	str	r9, [r6, #8]
-	.loc 3 1028 0
 	cmp	r2, #0
 	movne	r4, r3
-	bne	.L1640
-	.loc 3 1029 0
+	bne	.L1648
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1497:
-	b	.L1643
-.LVL1498:
-.L1666:
-	.loc 3 1047 0
+	b	.L1651
+.L1674:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1646
-	.loc 3 1051 0
+	beq	.L1654
 	mov	r2, #0
 	sub	r1, fp, #64
 	mov	r0, r5
-.LVL1499:
 	mov	r6, #20
 	bl	log2phys
-.LVL1500:
-	.loc 3 1052 0
 	mov	r0, r4
 	mul	r6, r6, r9
 	bl	get_new_active_ppa
-.LVL1501:
-	.loc 3 1055 0
-	ldrh	r2, [r7, #88]
-	.loc 3 1054 0
-	ldr	r3, [r7, #3800]
-	.loc 3 1055 0
+	ldrh	r2, [r7, #112]
+	ldr	r3, [r7, #3840]
 	mul	r1, r2, r9
-	.loc 3 1054 0
 	add	r3, r3, r6
 	str	r0, [r3, #4]
-	.loc 3 1056 0
 	str	r5, [r3, #16]
-	.loc 3 1055 0
 	bic	r1, r1, #3
 	str	r1, [fp, #-96]
 	ldr	r0, [fp, #-96]
-	ldr	r1, [r7, #3772]
+	ldr	r1, [r7, #3812]
 	add	r10, r1, r0
 	str	r1, [fp, #-100]
 	str	r10, [r3, #12]
-	.loc 3 1059 0
 	mov	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.LVL1502:
-	.loc 3 1061 0
 	ldr	r3, [fp, #-68]
-.LVL1503:
 	ldr	r2, [fp, #-88]
-.LVL1504:
 	cmp	r5, r2
 	cmpne	r5, r3
-	ldrh	r3, [r7, #34]
-.LVL1505:
-	bne	.L1647
-	.loc 3 1062 0
+	ldrh	r3, [r7, #58]
+	bne	.L1655
 	ldr	r2, [fp, #-68]
-.LVL1506:
 	cmp	r5, r2
-	bne	.L1648
-	.loc 3 1063 0
+	bne	.L1656
 	mov	r1, r3
 	mov	r0, r8
 	str	r3, [fp, #-84]
 	bl	__umodsi3
-.LVL1507:
-	.loc 3 1064 0
 	ldr	r3, [fp, #-84]
 	ldr	r2, [fp, #-76]
-.LVL1508:
-	.loc 3 1063 0
 	str	r0, [fp, #-92]
-	.loc 3 1064 0
 	sub	r3, r3, r0
 	cmp	r3, r2
 	movcs	r3, r2
 	str	r3, [fp, #-84]
-.L1649:
-	.loc 3 1072 0
-	ldrh	r3, [r7, #34]
+.L1657:
+	ldrh	r3, [r7, #58]
 	ldr	r2, [fp, #-84]
-.LVL1509:
 	cmp	r2, r3
-	.loc 3 1073 0
 	ldr	r3, [fp, #-68]
-.LVL1510:
-	.loc 3 1072 0
-	bne	.L1650
-	.loc 3 1073 0
+	bne	.L1658
 	cmp	r5, r3
-	.loc 3 1074 0
-	ldr	r3, [r7, #3800]
-.LVL1511:
+	ldr	r3, [r7, #3840]
 	add	r6, r3, r6
 	ldreq	r3, [fp, #-80]
-.LVL1512:
-	.loc 3 1073 0
-	beq	.L1694
-	.loc 3 1076 0
+	beq	.L1702
 	ldr	r3, [fp, #-84]
-.LVL1513:
 	mul	r2, r3, r5
 	ldr	r3, [fp, #-80]
-.LVL1514:
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r6, #8]
-.LVL1515:
-.L1652:
-	.loc 3 1119 0
+.L1660:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r7, #8]
-.LVL1516:
+	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1663
-	.loc 3 1119 0 is_stmt 0 discriminator 1
+	bcc	.L1671
 	movw	r2, #1119
-	ldr	r1, .L1696+16
-	ldr	r0, .L1696+20
+	ldr	r1, .L1704+16
+	ldr	r0, .L1704+20
 	bl	printk
-.LVL1517:
-.L1663:
-	.loc 3 1120 0 is_stmt 1
-	ldr	r3, .L1696+36
-	.loc 3 1046 0
+.L1671:
+	ldr	r3, .L1704+40
 	add	r9, r9, #1
-	.loc 3 1120 0
 	ldr	r2, [fp, #-100]
 	ldr	r1, [fp, #-96]
 	strh	r3, [r2, r1]	@ movhi
-	.loc 3 1121 0
-	ldr	r3, [r7, #2520]
-	.loc 3 1122 0
+	ldr	r3, [r7, #2544]
 	str	r5, [r10, #8]
-	.loc 3 1125 0
 	add	r5, r5, #1
-	.loc 3 1121 0
 	str	r3, [r10, #4]
 	add	r3, r3, #1
 	cmn	r3, #1
 	moveq	r3, #0
-	str	r3, [r7, #2520]
-	.loc 3 1123 0
+	str	r3, [r7, #2544]
 	ldr	r3, [fp, #-64]
-.LVL1518:
 	str	r3, [r10, #12]
-	.loc 3 1124 0
 	ldrh	r3, [r4]
-.LVL1519:
 	strh	r3, [r10, #2]	@ movhi
-	b	.L1645
-.LVL1520:
-.L1648:
-	.loc 3 1069 0
+	b	.L1653
+.L1656:
 	ldr	r2, [fp, #-76]
-.LVL1521:
 	smulbb	r3, r3, r5
 	add	r2, r8, r2
-.LVL1522:
 	sub	r2, r2, r3
 	uxth	r3, r2
 	str	r3, [fp, #-84]
-	.loc 3 1068 0
 	mov	r3, #0
 	str	r3, [fp, #-92]
-	b	.L1649
-.LVL1523:
-.L1650:
-	.loc 3 1079 0
+	b	.L1657
+.L1658:
 	cmp	r5, r3
-	.loc 3 1080 0
-	ldr	r3, [r7, #3800]
-.LVL1524:
-	ldreq	r2, [r7, #3776]
-	.loc 3 1082 0
-	ldrne	r2, [r7, #3768]
-	.loc 3 1080 0
+	ldr	r3, [r7, #3840]
+	ldreq	r2, [r7, #3816]
+	ldrne	r2, [r7, #3808]
 	add	r3, r3, r6
-	.loc 3 1082 0
 	str	r2, [r3, #8]
-	.loc 3 1084 0
 	ldr	r3, [fp, #-64]
 	cmn	r3, #1
-	beq	.L1655
-.LBB539:
-	.loc 3 1086 0
+	beq	.L1663
 	str	r3, [fp, #-56]
-	.loc 3 1090 0
 	mov	r1, #1
-	.loc 3 1088 0
-	ldr	r3, [r7, #3800]
-	.loc 3 1090 0
+	ldr	r3, [r7, #3840]
 	sub	r0, fp, #60
-	.loc 3 1087 0
 	str	r5, [fp, #-44]
-	.loc 3 1088 0
 	add	r3, r3, r6
 	ldr	r2, [r3, #8]
-	.loc 3 1089 0
 	ldr	r3, [r3, #12]
-	.loc 3 1088 0
 	str	r2, [fp, #-52]
-	.loc 3 1090 0
 	mov	r2, #0
-	.loc 3 1089 0
 	str	r3, [fp, #-48]
-	.loc 3 1090 0
 	bl	FlashReadPages
-.LVL1525:
-	.loc 3 1091 0
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	.loc 3 1092 0
-	ldreq	r3, [r7, #2684]
+	ldreq	r3, [r7, #2708]
 	addeq	r3, r3, #1
-	streq	r3, [r7, #2684]
-	.loc 3 1091 0
-	beq	.L1659
-	.loc 3 1094 0
+	streq	r3, [r7, #2708]
+	beq	.L1667
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1658
-	.loc 3 1095 0
-	ldr	r3, [r7, #2684]
-	.loc 3 1096 0
+	beq	.L1666
+	ldr	r3, [r7, #2708]
 	mov	r2, r5
-	ldr	r0, .L1696+40
-	.loc 3 1095 0
+	ldr	r0, .L1704+44
 	add	r3, r3, #1
-	str	r3, [r7, #2684]
-	.loc 3 1096 0
+	str	r3, [r7, #2708]
 	ldr	r1, [r10, #8]
 	bl	printk
-.LVL1526:
-.L1658:
-	.loc 3 1098 0
+.L1666:
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1659
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	beq	.L1667
 	movw	r2, #1098
-	ldr	r1, .L1696+16
-	ldr	r0, .L1696+20
+	ldr	r1, .L1704+16
+	ldr	r0, .L1704+20
 	bl	printk
-.LVL1527:
-.L1659:
-.LBE539:
-	.loc 3 1104 0 is_stmt 1
+.L1667:
 	ldr	r3, [fp, #-68]
-.LVL1528:
 	cmp	r5, r3
 	ldr	r3, [fp, #-84]
-.LVL1529:
 	lsl	r2, r3, #9
-	bne	.L1660
-	.loc 3 1105 0
-	ldr	r3, [r7, #3800]
+	bne	.L1668
+	ldr	r3, [r7, #3840]
 	ldr	r1, [fp, #-80]
 	add	r3, r3, r6
 	ldr	r0, [r3, #8]
 	ldr	r3, [fp, #-92]
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1530:
-	.loc 3 1109 0
 	ldr	r3, [fp, #-88]
-.LVL1531:
 	cmp	r5, r3
-	bne	.L1652
-.L1661:
-	.loc 3 1110 0
+	bne	.L1660
+.L1669:
 	ldrh	r3, [r4, #4]
-.LVL1532:
 	cmp	r3, #0
-	.loc 3 1111 0
-	ldrne	r3, [r7, #3800]
+	ldrne	r3, [r7, #3840]
 	addne	r6, r3, r6
-	.loc 3 1112 0
-	ldrne	r3, .L1696+8
-	.loc 3 1111 0
-	strne	r6, [r7, #3948]
-	.loc 3 1112 0
-	strne	r4, [r3, #-4076]
-	b	.L1652
-.L1655:
-	.loc 3 1101 0
-	ldr	r3, [r7, #3800]
+	ldrne	r3, .L1704+8
+	strne	r6, [r7, #3988]
+	strne	r4, [r3, #-4036]
+	b	.L1660
+.L1663:
+	ldr	r3, [r7, #3840]
 	mov	r1, #0
-	ldrh	r2, [r7, #86]
+	ldrh	r2, [r7, #110]
 	add	r3, r3, r6
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL1533:
-	b	.L1659
-.L1660:
-	.loc 3 1107 0
-	ldrh	r1, [r7, #34]
+	b	.L1667
+.L1668:
+	ldrh	r1, [r7, #58]
 	ldr	r0, [fp, #-80]
-.LVL1534:
-	ldr	r3, [r7, #3800]
+	ldr	r3, [r7, #3840]
 	mul	r1, r5, r1
 	add	r3, r3, r6
 	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-.LVL1535:
 	bl	ftl_memcpy
-.LVL1536:
-	b	.L1661
-.LVL1537:
-.L1647:
-	.loc 3 1117 0
-	ldr	r2, [r7, #3800]
-.LVL1538:
+	b	.L1669
+.L1655:
+	ldr	r2, [r7, #3840]
 	mul	r3, r5, r3
 	add	r6, r2, r6
 	ldr	r2, [fp, #-80]
-.LVL1539:
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-.L1694:
+.L1702:
 	str	r3, [r6, #8]
-	b	.L1652
-.LVL1540:
-.L1667:
-	.loc 3 1133 0
+	b	.L1660
+.L1675:
 	mov	r3, r4
-.LVL1541:
 	mov	r2, #0
 	mov	r1, r9
-	ldr	r0, [r7, #3800]
-.LVL1542:
+	ldr	r0, [r7, #3840]
 	bl	FtlProgPages
-.LVL1543:
-	.loc 3 1134 0
 	ldr	r3, [fp, #-72]
-.LVL1544:
 	cmp	r3, r9
-	bcs	.L1670
-	.loc 3 1134 0 is_stmt 0 discriminator 1
+	bcs	.L1678
 	movw	r2, #1134
-	ldr	r1, .L1696+16
-	ldr	r0, .L1696+20
+	ldr	r1, .L1704+16
+	ldr	r0, .L1704+20
 	bl	printk
-.LVL1545:
-.L1670:
-	.loc 3 1135 0 is_stmt 1
+.L1678:
 	ldr	r3, [fp, #-72]
 	sub	r3, r3, r9
 	str	r3, [fp, #-72]
-	b	.L1638
-.L1697:
+	b	.L1646
+.L1705:
 	.align	2
-.L1696:
+.L1704:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+574
 	.word	.LC1
-	.word	.LANCHOR0+2320
-	.word	.LANCHOR0+3178
-	.word	.LANCHOR0+3126
+	.word	.LANCHOR0+2588
+	.word	.LANCHOR0+3202
+	.word	.LANCHOR0+3150
+	.word	.LANCHOR0+2344
 	.word	-3947
-	.word	.LC104
-.LFE167:
+	.word	.LC105
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
@@ -18347,138 +11861,107 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-.LFB170:
-	.loc 3 1209 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1546:
 	mov	ip, sp
-.LCFI428:
 	push	{fp, ip, lr, pc}
-.LCFI429:
 	sub	fp, ip, #4
-.LCFI430:
-	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1547:
 	mov	r1, r0
-.LVL1548:
 	mov	r0, #0
-.LVL1549:
 	bl	FtlWrite
-.LVL1550:
-	.loc 3 1211 0
 	ldmfd	sp, {fp, sp, pc}
-.LFE170:
 	.size	sftl_write, .-sftl_write
 	.align	2
+	.global	sftl_vendor_write
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	mov	r0, #16
+	bl	FtlWrite
+	ldmfd	sp, {fp, sp, pc}
+	.size	sftl_vendor_write, .-sftl_vendor_write
+	.align	2
 	.global	FtlLoadSysInfo
 	.syntax unified
 	.arm
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB224:
-	.loc 2 1409 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI431:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI432:
 	sub	fp, ip, #4
-.LCFI433:
-	.loc 2 1414 0
-	ldr	r4, .L1720
-	.loc 2 1417 0
+	ldr	r4, .L1729
 	mov	r1, #0
-	ldr	r6, .L1720+4
-	.loc 2 1414 0
-	ldr	r3, [r4, #3240]
-	.loc 2 1417 0
-	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #2300]
-	.loc 2 1414 0
-	str	r3, [r4, #3228]
-	.loc 2 1415 0
-	ldr	r3, [r4, #3244]
-	.loc 2 1417 0
+	ldr	r3, [r4, #3280]
+	add	r6, r4, #2576
+	ldrh	r2, [r4, #40]
+	ldr	r0, [r4, #2324]
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
 	lsl	r2, r2, #1
-	.loc 2 1415 0
-	str	r3, [r4, #3232]
-	.loc 2 1417 0
+	str	r3, [r4, #3272]
 	bl	ftl_memset
-.LVL1551:
-	.loc 2 1418 0
-	movw	r3, #2552
-	ldrh	r0, [r4, r3]
+	ldrh	r0, [r6]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1700
-.L1708:
-	.loc 2 1419 0
+	bne	.L1709
+.L1717:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1700:
-	.loc 2 1427 0
-	ldr	r7, .L1720+8
-	.loc 2 1421 0
+.L1709:
+	ldr	r7, .L1729+4
 	mov	r1, #1
-	.loc 2 1430 0
-	ldr	r8, .L1720+12
-	.loc 2 1421 0
+	ldr	r8, .L1729+8
 	bl	FtlGetLastWrittenPage
-.LVL1552:
 	sxth	r5, r0
-.LVL1553:
-	.loc 2 1422 0
 	add	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1702:
-	.loc 2 1424 0
+.L1711:
 	cmp	r5, #0
-	bge	.L1705
-	.loc 2 1437 0
+	bge	.L1714
 	movw	r2, #1437
-	ldr	r1, .L1720+16
-	ldr	r0, .L1720+20
+	ldr	r1, .L1729+12
+	ldr	r0, .L1729+16
 	bl	printk
-.LVL1554:
-.L1704:
-	.loc 2 1439 0
-	ldrh	r3, [r4, #16]
-	ldrh	r2, [r4, #86]
+.L1713:
+	ldrh	r3, [r4, #40]
+	ldrh	r2, [r4, #110]
 	add	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1707
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1716
 	movw	r2, #1439
-	ldr	r1, .L1720+16
-	ldr	r0, .L1720+20
+	ldr	r1, .L1729+12
+	ldr	r0, .L1729+16
 	bl	printk
-.LVL1555:
-.L1707:
-	.loc 2 1441 0 is_stmt 1
-	ldr	r5, .L1720+24
-.LVL1556:
+.L1716:
+	ldr	r5, .L1729+20
 	mov	r2, #48
-	ldr	r1, [r4, #3228]
+	ldr	r1, [r4, #3268]
 	mov	r0, r5
 	bl	ftl_memcpy
-.LVL1557:
-	.loc 2 1442 0
-	ldrh	r2, [r4, #16]
-	ldr	r1, [r4, #3228]
-	ldr	r0, [r4, #2300]
+	ldrh	r2, [r4, #40]
+	ldr	r1, [r4, #3268]
+	ldr	r0, [r4, #2324]
 	lsl	r2, r2, #1
 	add	r1, r1, #48
 	bl	ftl_memcpy
-.LVL1558:
-	.loc 2 1443 0
-	ldrh	r1, [r4, #16]
-	ldr	r3, [r4, #3228]
-	ldr	r0, [r4]
+	ldrh	r1, [r4, #40]
+	ldr	r3, [r4, #3268]
+	ldr	r0, [r4, #24]
 	lsr	r2, r1, #3
 	add	r1, r1, #24
 	lsl	r1, r1, #1
@@ -18486,264 +11969,166 @@ FtlLoadSysInfo:
 	bic	r1, r1, #3
 	add	r1, r3, r1
 	bl	ftl_memcpy
-.LVL1559:
-	.loc 2 1445 0
-	ldr	r2, [r4, #2244]
-	ldr	r3, .L1720+12
+	ldr	r2, [r4, #2268]
+	ldr	r3, .L1729+8
 	cmp	r2, r3
-	bne	.L1708
-	.loc 2 1449 0
-	ldrb	r2, [r4, #2254]	@ zero_extendqisi2
-	ldrh	r3, [r4, #30]
-	.loc 2 1448 0
+	bne	.L1717
+	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
+	ldrh	r3, [r4, #54]
 	ldrh	r7, [r5, #8]
-	.loc 2 1449 0
 	cmp	r2, r3
-	.loc 2 1448 0
 	strh	r7, [r6, #6]	@ movhi
-	.loc 2 1449 0
-	bne	.L1708
-	.loc 2 1452 0
-	ldr	r3, .L1720+28
-	.loc 2 1454 0
-	ldrh	r2, [r4, #34]
-	.loc 2 1455 0
-	ldr	r6, [r4, #20]
-	.loc 2 1452 0
-	str	r7, [r3, #-4056]
-	.loc 2 1453 0
-	ldrh	r3, [r4, #78]
-	.loc 2 1455 0
-	ldrh	r0, [r4, #134]
-	ldrh	r1, [r4, #8]
-	.loc 2 1453 0
+	bne	.L1717
+	ldr	r3, .L1729+24
+	ldrh	r2, [r4, #58]
+	ldr	r6, [r4, #44]
+	str	r7, [r3, #-4016]
+	ldrh	r3, [r4, #102]
+	ldrh	r0, [r4, #158]
+	ldrh	r1, [r4, #32]
 	mul	r3, r7, r3
-	.loc 2 1455 0
 	sub	r0, r6, r0
 	sub	r0, r0, r7
-	.loc 2 1453 0
-	str	r3, [r4, #2480]
-	.loc 2 1454 0
+	str	r3, [r4, #2504]
 	mul	r3, r3, r2
-	str	r3, [r4, #116]
-	.loc 2 1455 0
+	str	r3, [r4, #140]
 	bl	__udivsi3
-.LVL1560:
-	.loc 2 1461 0
 	cmp	r7, r6
-	.loc 2 1455 0
-	movw	r3, #2548
+	movw	r3, #2572
 	strh	r0, [r4, r3]	@ movhi
-	.loc 2 1461 0
-	bls	.L1709
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	bls	.L1718
 	movw	r2, #1461
-	ldr	r1, .L1720+16
-	ldr	r0, .L1720+20
+	ldr	r1, .L1729+12
+	ldr	r0, .L1729+16
 	bl	printk
-.LVL1561:
-.L1709:
-	.loc 2 1463 0 is_stmt 1
+.L1718:
 	ldrh	r0, [r5, #14]
-	movw	r3, #2324
-	ldr	r1, .L1720+32
-	.loc 2 1468 0
+	movw	r3, #2348
+	ldr	r1, .L1729+28
 	mvn	ip, #0
-	.loc 2 1463 0
 	strh	r0, [r4, r3]	@ movhi
-	.loc 2 1464 0
 	ldrh	r3, [r5, #16]
 	lsr	r2, r3, #6
-	.loc 2 1465 0
 	and	r3, r3, #63
-	strb	r3, [r4, #2330]
-	.loc 2 1466 0
-	ldrb	r3, [r4, #2255]	@ zero_extendqisi2
-	.loc 2 1464 0
+	strb	r3, [r4, #2354]
+	ldrb	r3, [r4, #2279]	@ zero_extendqisi2
 	strh	r2, [r1, #2]	@ movhi
-	.loc 2 1473 0
-	movw	r2, #2372
-	.loc 2 1466 0
-	strb	r3, [r4, #2332]
-	.loc 2 1468 0
-	movw	r3, #2564
+	movw	r2, #2396
+	strb	r3, [r4, #2356]
+	movw	r3, #2588
 	strh	ip, [r4, r3]	@ movhi
-	.loc 2 1469 0
 	mov	r3, #0
-	.loc 2 1473 0
 	ldrh	ip, [r5, #18]
-	.loc 2 1469 0
 	strh	r3, [r1, #242]	@ movhi
-	.loc 2 1470 0
-	strb	r3, [r4, #2570]
-	.loc 2 1473 0
+	strb	r3, [r4, #2594]
 	strh	ip, [r4, r2]	@ movhi
-	.loc 2 1474 0
 	ldrh	r2, [r5, #20]
-	.loc 2 1471 0
-	strb	r3, [r4, #2572]
-	.loc 2 1483 0
-	str	r3, [r4, #2504]
-	.loc 2 1484 0
-	str	r3, [r4, #2492]
-	.loc 2 1474 0
+	strb	r3, [r4, #2596]
+	str	r3, [r4, #2528]
+	str	r3, [r4, #2516]
 	lsr	ip, r2, #6
-	.loc 2 1475 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2378]
-	.loc 2 1476 0
-	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
-	.loc 2 1474 0
+	strb	r2, [r4, #2402]
+	ldrb	r2, [r4, #2280]	@ zero_extendqisi2
 	strh	ip, [r1, #50]	@ movhi
-	.loc 2 1478 0
 	ldrh	ip, [r5, #22]
-	.loc 2 1476 0
-	strb	r2, [r4, #2380]
-	.loc 2 1478 0
-	movw	r2, #2420
-	.loc 2 1485 0
-	str	r3, [r4, #2484]
-	.loc 2 1478 0
+	strb	r2, [r4, #2404]
+	movw	r2, #2444
+	str	r3, [r4, #2508]
 	strh	ip, [r4, r2]	@ movhi
-	.loc 2 1479 0
 	ldrh	r2, [r5, #24]
-	.loc 2 1486 0
-	str	r3, [r4, #2500]
-	.loc 2 1489 0
-	str	r3, [r4, #2528]
-	.loc 2 1479 0
+	str	r3, [r4, #2524]
+	str	r3, [r4, #2552]
 	lsr	ip, r2, #6
-	.loc 2 1480 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2426]
-	.loc 2 1481 0
-	ldrb	r2, [r4, #2257]	@ zero_extendqisi2
-	.loc 2 1479 0
+	strb	r2, [r4, #2450]
+	ldrb	r2, [r4, #2281]	@ zero_extendqisi2
 	strh	ip, [r1, #98]	@ movhi
-	.loc 2 1481 0
-	strb	r2, [r4, #2428]
-	.loc 2 1488 0
-	ldr	r2, [r4, #2276]
-	str	r2, [r4, #2524]
-	.loc 2 1490 0
-	str	r3, [r4, #2540]
-	.loc 2 1493 0
-	ldr	r2, [r4, #2516]
-	.loc 2 1491 0
-	str	r3, [r4, #2496]
-	.loc 2 1493 0
-	ldr	r3, [r4, #2284]
+	strb	r2, [r4, #2452]
+	ldr	r2, [r4, #2300]
+	str	r2, [r4, #2548]
+	str	r3, [r4, #2564]
+	ldr	r2, [r4, #2540]
+	str	r3, [r4, #2520]
+	ldr	r3, [r4, #2308]
 	cmp	r3, r2
-	.loc 2 1496 0
-	ldr	r2, [r4, #2520]
-	.loc 2 1494 0
-	strhi	r3, [r4, #2516]
-	.loc 2 1496 0
-	ldr	r3, [r4, #2280]
+	ldr	r2, [r4, #2544]
+	strhi	r3, [r4, #2540]
+	ldr	r3, [r4, #2304]
 	cmp	r3, r2
-	.loc 2 1497 0
-	strhi	r3, [r4, #2520]
-	.loc 2 1499 0
+	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1712
-	.loc 2 1500 0
-	ldr	r0, .L1720+32
+	beq	.L1721
+	ldr	r0, .L1729+28
 	bl	make_superblock
-.LVL1562:
-.L1712:
-	.loc 2 1502 0
-	movw	r3, #2372
+.L1721:
+	movw	r3, #2396
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1713
-	.loc 2 1503 0
-	ldr	r0, .L1720+36
+	beq	.L1722
+	ldr	r0, .L1729+32
 	bl	make_superblock
-.LVL1563:
-.L1713:
-	.loc 2 1505 0
-	movw	r3, #2420
+.L1722:
+	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1714
-	.loc 2 1506 0
-	ldr	r0, .L1720+40
+	beq	.L1723
+	ldr	r0, .L1729+36
 	bl	make_superblock
-.LVL1564:
-.L1714:
-	.loc 2 1508 0
-	movw	r3, #2564
+.L1723:
+	movw	r3, #2588
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1715
-	.loc 2 1509 0
-	ldr	r0, .L1720+44
+	beq	.L1724
+	ldr	r0, .L1729+40
 	bl	make_superblock
-.LVL1565:
-.L1715:
-	.loc 2 1511 0
+.L1724:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.LVL1566:
-.L1705:
-	.loc 2 1425 0
+.L1714:
 	ldrh	r3, [r6]
-	.loc 2 1427 0
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 2 1425 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3224]
-	.loc 2 1426 0
-	ldr	r3, [r4, #3240]
-	str	r3, [r4, #3228]
-	.loc 2 1427 0
+	str	r3, [r4, #3264]
+	ldr	r3, [r4, #3280]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.LVL1567:
-	.loc 2 1430 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1703
-	.loc 2 1431 0 discriminator 1
-	ldr	r3, [r4, #3240]
-	.loc 2 1430 0 discriminator 1
+	beq	.L1712
+	ldr	r3, [r4, #3280]
 	ldr	r3, [r3]
 	cmp	r3, r8
-	bne	.L1703
-	.loc 2 1432 0
-	ldr	r3, [r4, #3244]
+	bne	.L1712
+	ldr	r3, [r4, #3284]
 	ldrh	r2, [r3]
-	.loc 2 1431 0
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1704
-.L1703:
+	beq	.L1713
+.L1712:
 	sub	r5, r5, #1
-.LVL1568:
 	sxth	r5, r5
-.LVL1569:
-	b	.L1702
-.L1721:
+	b	.L1711
+.L1730:
 	.align	2
-.L1720:
+.L1729:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2552
-	.word	.LANCHOR0+3220
+	.word	.LANCHOR0+3260
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
-	.word	.LANCHOR0+2244
+	.word	.LANCHOR0+2268
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+2564
-.LFE224:
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+2588
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	2
 	.global	FtlSysBlkInit
@@ -18752,242 +12137,145 @@ FtlLoadSysInfo:
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB242:
-	.loc 2 2356 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI434:
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-.LCFI435:
 	sub	fp, ip, #4
-.LCFI436:
-	.loc 2 2360 0
-	ldr	r4, .L1738
-	mov	r3, #0
-	add	r6, r4, #3968
-	.loc 2 2362 0
-	ldrh	r0, [r4, #12]
-	.loc 2 2360 0
-	strh	r3, [r6]	@ movhi
-	.loc 2 2362 0
+	ldr	r4, .L1747
+	mov	r2, #0
+	movw	r3, #4008
+	ldrh	r0, [r4, #36]
+	strh	r2, [r4, r3]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
-.LVL1570:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1571:
-	.loc 2 2364 0
-	movw	r3, #2552
-	ldrh	r2, [r4, r3]
+	add	r3, r4, #2576
+	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1723
-.L1725:
-	.loc 2 2365 0
+	bne	.L1732
+.L1734:
 	mvn	r8, #0
-.L1722:
-	.loc 2 2448 0
+.L1731:
 	mov	r0, r8
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1723:
-	.loc 2 2367 0
+.L1732:
 	bl	FtlLoadSysInfo
-.LVL1572:
 	subs	r8, r0, #0
-	bne	.L1725
-	.loc 2 2370 0
+	bne	.L1734
 	bl	FtlLoadMapInfo
-.LVL1573:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1574:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1575:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1576:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1577:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1578:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1579:
-	.loc 2 2380 0
 	mov	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1580:
-.LBB543:
-.LBB544:
-	.loc 2 2382 0
-	ldrh	r1, [r4, #114]
+	ldrh	r1, [r4, #138]
 	mov	r3, r8
-.LVL1581:
-	.loc 2 2383 0
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	mov	r0, #12
-.L1726:
-	.loc 2 2382 0
+.L1735:
 	cmp	r3, r1
-	bge	.L1731
-	.loc 2 2383 0
+	bge	.L1740
 	mla	ip, r0, r3, r2
 	ldr	ip, [ip, #4]
 	cmp	ip, #0
-	bge	.L1727
-.L1731:
-	.loc 2 2386 0
-	ldr	r5, .L1738+4
-	.loc 2 2388 0
+	bge	.L1736
+.L1740:
+	ldr	r5, .L1747+4
 	cmp	r3, r1
-	.loc 2 2386 0
 	ldrh	r2, [r5, #28]
 	add	r7, r5, #80
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	.loc 2 2388 0
-	bge	.L1737
-.L1728:
-	.loc 2 2390 0
-	ldr	r6, .L1738+8
-	.loc 2 2389 0
-	ldr	r0, .L1738+12
+	bge	.L1746
+.L1737:
+	ldr	r6, .L1747+8
+	ldr	r0, .L1747+12
 	bl	FtlSuperblockPowerLostFix
-.LVL1582:
-	.loc 2 2390 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1583:
-.LBB545:
-	.loc 2 2396 0
-	movw	r3, #2324
-	ldr	r1, [r4, #2300]
+	movw	r3, #2348
+	ldr	r1, [r4, #2324]
 	ldrh	r3, [r4, r3]
 	ldrh	r0, [r7, #4]
 	lsl	r3, r3, #1
 	ldrh	r2, [r1, r3]
 	sub	r2, r2, r0
 	strh	r2, [r1, r3]	@ movhi
-	.loc 2 2402 0
-	movw	r2, #2372
+	movw	r2, #2396
 	ldrh	r2, [r4, r2]
-	.loc 2 2397 0
-	ldrh	r3, [r4, #78]
-	.loc 2 2402 0
-	ldr	r0, [r4, #2300]
+	ldrh	r3, [r4, #102]
+	ldr	r0, [r4, #2324]
 	ldrh	ip, [r6, #4]
 	lsl	r2, r2, #1
-	.loc 2 2397 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 2398 0
 	mov	r3, #0
-	strb	r3, [r4, #2330]
-	.loc 2 2399 0
+	strb	r3, [r4, #2354]
 	strh	r3, [r7, #4]	@ movhi
-	.loc 2 2402 0
 	ldrh	r1, [r0, r2]
 	sub	r1, r1, ip
 	strh	r1, [r0, r2]	@ movhi
-	.loc 2 2403 0
-	ldrh	r2, [r4, #78]
-.LBE545:
-	.loc 2 2409 0
-	ldr	r0, .L1738+16
-.LBB546:
-	.loc 2 2404 0
-	strb	r3, [r4, #2378]
-	.loc 2 2403 0
+	ldrh	r2, [r4, #102]
+	ldr	r0, .L1747+16
+	strb	r3, [r4, #2402]
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2405 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE546:
-	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1584:
-	.loc 2 2410 0
-	add	r0, r6, #1536
+	add	r0, r6, #1552
 	bl	FtlMapBlkWriteDump_data
-.LVL1585:
-	.loc 2 2422 0
 	ldrh	r3, [r5, #30]
 	add	r3, r3, #1
 	strh	r3, [r5, #30]	@ movhi
-	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1586:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1587:
-	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1588:
-	b	.L1732
-.LVL1589:
-.L1727:
-	.loc 2 2382 0
+	b	.L1741
+.L1736:
 	add	r3, r3, #1
-	b	.L1726
-.L1737:
-	.loc 2 2388 0
-	ldrh	r3, [r6]
-.LVL1590:
+	b	.L1735
+.L1746:
+	movw	r3, #4008
+	ldrh	r3, [r4, r3]
 	cmp	r3, #0
-	bne	.L1728
-.L1732:
-	.loc 2 2429 0
-	movw	r3, #2324
+	bne	.L1737
+.L1741:
+	movw	r3, #2348
 	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1733
+	beq	.L1742
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	bne	.L1733
-	.loc 2 2431 0
-	ldr	r6, .L1738+8
-	.loc 2 2430 0
+	bne	.L1742
+	ldr	r6, .L1747+8
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	bne	.L1733
-	.loc 2 2432 0
+	bne	.L1742
 	bl	FtlGcRefreshBlock
-.LVL1591:
-	.loc 2 2433 0
-	movw	r3, #2372
+	movw	r3, #2396
 	ldrh	r0, [r4, r3]
 	bl	FtlGcRefreshBlock
-.LVL1592:
-	.loc 2 2434 0
 	sub	r0, r6, #48
 	bl	allocate_new_data_superblock
-.LVL1593:
-	.loc 2 2435 0
 	mov	r0, r6
 	bl	allocate_new_data_superblock
-.LVL1594:
-.L1733:
-	.loc 2 2440 0
+.L1742:
 	ldrh	r3, [r5, #28]
 	tst	r3, #31
-	bne	.L1722
-	.loc 2 2441 0
+	bne	.L1731
 	bl	FtlVpcCheckAndModify
-.LVL1595:
-	b	.L1722
-.L1739:
+	b	.L1731
+.L1748:
 	.align	2
-.L1738:
+.L1747:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2244
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+3864
-.LBE544:
-.LBE543:
-.LFE242:
+	.word	.LANCHOR0+2268
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+3904
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
@@ -18996,542 +12284,845 @@ FtlSysBlkInit:
 	.fpu softvfp
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB160:
-	.loc 3 623 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI437:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
-.LCFI438:
 	sub	fp, ip, #4
-.LCFI439:
-	.loc 3 629 0
-	ldr	r4, .L1764
+	ldr	r4, .L1773
 	mov	r3, #0
-	.loc 3 631 0
-	ldrh	r0, [r4, #12]
-	.loc 3 629 0
-	str	r3, [r4, #2516]
-	.loc 3 630 0
-	str	r3, [r4, #2520]
-	.loc 3 631 0
+	ldrh	r0, [r4, #36]
+	str	r3, [r4, #2540]
+	str	r3, [r4, #2544]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1596:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1597:
 	cmp	r0, #0
-	beq	.L1741
-	.loc 3 633 0
+	beq	.L1750
 	bl	FtlMakeBbt
-.LVL1598:
-.L1741:
-	.loc 3 637 0 discriminator 1
-	ldr	r0, .L1764+4
-	.loc 3 623 0 discriminator 1
+.L1750:
+	ldr	r0, .L1773+4
 	mov	r2, #0
-.L1742:
-	.loc 3 635 0 discriminator 1
-	ldrh	r1, [r4, #34]
+.L1751:
+	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	add	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1743
-	.loc 3 642 0
-	ldrh	r6, [r4, #16]
-	.loc 3 641 0
+	blt	.L1752
+	ldrh	r6, [r4, #40]
 	mov	r5, #0
-.LVL1599:
-.L1744:
-	.loc 3 642 0 discriminator 1
-	ldrh	r3, [r4, #18]
+.L1753:
+	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1745
-	.loc 3 645 0
-	ldrh	r1, [r4, #8]
+	bhi	.L1754
+	ldrh	r1, [r4, #32]
 	sub	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1746
-.L1750:
-	.loc 3 641 0
+	bge	.L1755
+.L1759:
 	mov	r0, #0
 	mov	r6, r0
-.LVL1600:
-.L1747:
-	.loc 3 656 0 discriminator 1
-	ldrh	r2, [r4, #16]
+.L1756:
+	ldrh	r2, [r4, #40]
 	uxth	r3, r0
 	add	r5, r0, #1
-.LVL1601:
 	cmp	r2, r3
-	bhi	.L1751
-	.loc 3 658 0
-	ldrh	r3, [r4, #18]
-	.loc 3 662 0
-	movw	r9, #2548
-	.loc 3 661 0
-	ldrh	r5, [r4, #8]
-	ldr	r10, [r4, #20]
-	.loc 3 658 0
-	str	r3, [r4, #3764]
-	.loc 3 661 0
+	bhi	.L1760
+	ldrh	r3, [r4, #42]
+	movw	r9, #2572
+	ldrh	r5, [r4, #32]
+	ldr	r10, [r4, #44]
+	str	r3, [r4, #3804]
 	mov	r1, r5
 	mov	r0, r10
 	bl	__udivsi3
-.LVL1602:
-	.loc 3 662 0
 	ubfx	r7, r0, #5, #16
-	.loc 3 661 0
 	mov	r8, r0
-	.loc 3 662 0
 	add	r3, r7, #36
-	.loc 3 661 0
-	str	r0, [r4, #2480]
-	.loc 3 662 0
+	str	r0, [r4, #2504]
 	strh	r3, [r4, r9]	@ movhi
-	.loc 3 663 0
 	mov	r3, #24
 	mul	r3, r3, r5
 	cmp	r6, r3
-	ble	.L1752
-	.loc 3 664 0
+	ble	.L1761
 	mov	r1, r5
 	sub	r0, r10, r6
 	bl	__udivsi3
-.LVL1603:
-	str	r0, [r4, #2480]
-	.loc 3 665 0
+	str	r0, [r4, #2504]
 	lsr	r0, r0, #5
 	add	r0, r0, #24
 	strh	r0, [r4, r9]	@ movhi
-.L1752:
-	.loc 3 668 0
-	ldrh	r3, [r4, #70]
+.L1761:
+	ldrh	r3, [r4, #94]
 	cmp	r3, #0
-	beq	.L1754
-	.loc 3 669 0
-	movw	r2, #2548
+	beq	.L1763
+	movw	r2, #2572
 	ldrh	r1, [r4, r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r4, r2]	@ movhi
-	.loc 3 670 0
 	mul	r1, r5, r3
 	cmp	r6, r1
-	.loc 3 672 0
 	addlt	r3, r3, #32
-	.loc 3 671 0
-	strlt	r8, [r4, #2480]
-	.loc 3 672 0
+	strlt	r8, [r4, #2504]
 	addlt	r3, r7, r3
 	strhlt	r3, [r4, r2]	@ movhi
-.L1754:
-	.loc 3 677 0
-	movw	r3, #2548
-	ldr	r6, .L1764+8
-.LVL1604:
+.L1763:
+	movw	r3, #2572
+	ldr	r6, .L1773+8
 	ldrh	r2, [r4, r3]
-	.loc 3 689 0
 	mvn	r7, #0
-	.loc 3 677 0
-	ldr	r3, [r4, #2480]
+	ldr	r3, [r4, #2504]
 	sub	r3, r3, r2
 	mul	r5, r5, r3
-	.loc 3 678 0
-	ldrh	r3, [r4, #78]
-	.loc 3 677 0
-	str	r5, [r6, #-4056]
-	.loc 3 678 0
+	ldrh	r3, [r4, #102]
+	str	r5, [r6, #-4016]
 	mul	r5, r5, r3
-	.loc 3 679 0
-	ldrh	r3, [r4, #34]
-	.loc 3 678 0
-	str	r5, [r4, #2480]
-	.loc 3 679 0
+	ldrh	r3, [r4, #58]
+	str	r5, [r4, #2504]
 	mul	r5, r5, r3
-	str	r5, [r4, #116]
-	.loc 3 684 0
+	str	r5, [r4, #140]
 	bl	FtlBbmTblFlush
-.LVL1605:
-	.loc 3 687 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, #0
-	ldr	r0, [r4, #2300]
-	.loc 3 689 0
-	ldr	r5, .L1764+12
-	.loc 3 687 0
+	ldr	r0, [r4, #2324]
+	ldr	r5, .L1773+12
 	lsl	r2, r2, #1
-	.loc 3 694 0
 	sub	r5, r5, #240
-	.loc 3 687 0
 	bl	ftl_memset
-.LVL1606:
-	.loc 3 689 0
-	movw	r2, #2564
-	.loc 3 688 0
+	movw	r2, #2588
 	mov	r3, #0
-	.loc 3 689 0
 	strh	r7, [r4, r2]	@ movhi
-	.loc 3 696 0
-	movw	r2, #2324
+	movw	r2, #2348
 	strh	r3, [r4, r2]	@ movhi
-	.loc 3 698 0
 	mov	r1, #255
-	ldrh	r2, [r4, #16]
-	.loc 3 690 0
+	ldrh	r2, [r4, #40]
 	strh	r3, [r5, #242]	@ movhi
-	.loc 3 701 0
 	mov	r8, r5
-	.loc 3 688 0
-	str	r3, [r4, #2476]
-	.loc 3 691 0
-	strb	r3, [r4, #2570]
-	.loc 3 692 0
-	strb	r3, [r4, #2572]
-	.loc 3 698 0
+	str	r3, [r4, #2500]
+	strb	r3, [r4, #2594]
+	strb	r3, [r4, #2596]
 	lsr	r2, r2, #3
-	.loc 3 694 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 3 695 0
-	strb	r3, [r4, #2330]
-	.loc 3 697 0
+	strb	r3, [r4, #2354]
 	mov	r3, #1
-	.loc 3 698 0
-	ldr	r0, [r4]
-	.loc 3 697 0
-	strb	r3, [r4, #2332]
-	.loc 3 698 0
+	ldr	r0, [r4, #24]
+	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.LVL1607:
-.L1756:
-	.loc 3 701 0
+.L1765:
 	mov	r0, r8
 	bl	make_superblock
-.LVL1608:
-	.loc 3 702 0
-	ldrb	r3, [r4, #2331]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1757
-	.loc 3 705 0
-	ldr	r2, [r4, #2300]
+	bne	.L1766
+	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
-	.loc 3 706 0
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 3 707 0
-	b	.L1756
-.L1743:
-	.loc 3 636 0 discriminator 3
-	ldr	ip, [r4, #3776]
+	b	.L1765
+.L1752:
+	ldr	ip, [r4, #3816]
 	mvn	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [ip, r3, lsl #2]
-	.loc 3 637 0 discriminator 3
-	ldr	r1, [r4, #3768]
+	ldr	r1, [r4, #3808]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1742
-.LVL1609:
-.L1745:
-	.loc 3 643 0 discriminator 3
+	b	.L1751
+.L1754:
 	mov	r0, r6
 	mov	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL1610:
-	.loc 3 642 0 discriminator 3
 	add	r6, r6, #1
-	.loc 3 643 0 discriminator 3
 	add	r5, r5, r0
-.LVL1611:
 	uxth	r5, r5
-.LVL1612:
-	.loc 3 642 0 discriminator 3
 	uxth	r6, r6
-	b	.L1744
-.L1746:
-	.loc 3 647 0
+	b	.L1753
+.L1755:
 	mov	r0, r5
 	bl	__udivsi3
-.LVL1613:
-	ldr	r3, [r4, #108]
+	ldr	r3, [r4, #132]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL1614:
-	.loc 3 648 0
-	ldrh	r0, [r4, #12]
+	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1615:
-	.loc 3 650 0
-	ldrh	r5, [r4, #16]
-.LVL1616:
-.L1748:
-	.loc 3 650 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #18]
+	ldrh	r5, [r4, #40]
+.L1757:
+	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1750
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1759
 	mov	r0, r5
 	mov	r1, #1
-	.loc 3 650 0 discriminator 3
 	add	r5, r5, #1
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1617:
-	.loc 3 650 0 discriminator 3
 	uxth	r5, r5
-	b	.L1748
-.LVL1618:
-.L1751:
-	.loc 3 657 0 discriminator 3
+	b	.L1757
+.L1760:
 	mov	r1, #0
 	uxth	r0, r0
 	bl	FtlLowFormatEraseBlock
-.LVL1619:
 	add	r6, r6, r0
-.LVL1620:
 	mov	r0, r5
 	uxth	r6, r6
-.LVL1621:
-	b	.L1747
-.LVL1622:
-.L1757:
-	.loc 3 709 0
-	ldr	r2, [r4, #2516]
-	.loc 3 710 0
+	b	.L1756
+.L1766:
+	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
-	.loc 3 721 0
 	mvn	r7, #0
-	.loc 3 709 0
-	str	r2, [r4, #2336]
+	str	r2, [r4, #2360]
 	add	r2, r2, #1
-	str	r2, [r4, #2516]
-	.loc 3 710 0
-	ldr	r2, [r4, #2300]
+	str	r2, [r4, #2540]
+	ldr	r2, [r4, #2324]
 	strh	r1, [r2, r3]	@ movhi
-	.loc 3 712 0
 	mov	r3, #0
-	ldr	r2, .L1764+16
-	.loc 3 714 0
-	movw	r1, #2372
-	.loc 3 713 0
-	strb	r3, [r4, #2378]
-	.loc 3 712 0
+	ldr	r2, .L1773+16
+	movw	r1, #2396
+	strb	r3, [r4, #2402]
 	strh	r3, [r2, #2]	@ movhi
-	.loc 3 717 0
 	mov	r8, r2
-	.loc 3 714 0
 	ldrh	r3, [r5]
 	mov	r5, r2
 	add	r3, r3, #1
 	strh	r3, [r4, r1]	@ movhi
-	.loc 3 715 0
 	mov	r3, #1
-	strb	r3, [r4, #2380]
-.L1758:
-	.loc 3 717 0
+	strb	r3, [r4, #2404]
+.L1767:
 	mov	r0, r8
 	bl	make_superblock
-.LVL1623:
-	.loc 3 718 0
-	ldrb	r3, [r4, #2379]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1759
-	.loc 3 721 0
-	ldr	r2, [r4, #2300]
+	bne	.L1768
+	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
-	.loc 3 722 0
 	ldrh	r3, [r5]
 	add	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	.loc 3 723 0
-	b	.L1758
-.L1759:
-	.loc 3 725 0
-	ldr	r2, [r4, #2516]
-	.loc 3 726 0
-	lsl	r3, r3, #1
-	ldrh	r1, [r5, #4]
-	.loc 3 727 0
-	mvn	r5, #0
-	.loc 3 725 0
-	str	r2, [r4, #2384]
-	add	r2, r2, #1
-	str	r2, [r4, #2516]
-	.loc 3 726 0
-	ldr	r2, [r4, #2300]
-	strh	r1, [r2, r3]	@ movhi
-	.loc 3 727 0
-	movw	r3, #2420
-	strh	r5, [r4, r3]	@ movhi
-	.loc 3 730 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL1624:
-	ldr	r3, .L1764+20
-	movw	r2, #2552
-	strh	r0, [r4, r2]	@ movhi
-	.loc 3 731 0
-	mov	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	.loc 3 733 0
-	ldr	r2, [r6, #-4056]
-	.loc 3 732 0
-	strh	r5, [r3, #4]	@ movhi
-	.loc 3 733 0
-	strh	r2, [r3, #6]	@ movhi
-	.loc 3 734 0
-	ldr	r3, [r4, #2516]
-	str	r3, [r4, #2560]
+	strh	r3, [r5]	@ movhi
+	b	.L1767
+.L1768:
+	ldr	r2, [r4, #2540]
+	lsl	r3, r3, #1
+	ldrh	r1, [r5, #4]
+	mvn	r5, #0
+	str	r2, [r4, #2408]
+	add	r2, r2, #1
+	str	r2, [r4, #2540]
+	ldr	r2, [r4, #2324]
+	strh	r1, [r2, r3]	@ movhi
+	movw	r3, #2444
+	strh	r5, [r4, r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L1773+20
+	mov	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6, #-4016]
+	strh	r5, [r3, #4]	@ movhi
+	strh	r0, [r3]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r3, [r4, #2540]
+	str	r3, [r4, #2584]
+	add	r3, r3, #1
+	str	r3, [r4, #2540]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	mov	r0, #0
+	ldreq	r3, .L1773+24
+	moveq	r2, #1
+	streq	r2, [r3]
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1774:
+	.align	2
+.L1773:
+	.word	.LANCHOR0
+	.word	168778952
+	.word	.LANCHOR3
+	.word	.LANCHOR0+2588
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+2576
+	.word	.LANCHOR2
+	.size	ftl_low_format, .-ftl_low_format
+	.align	2
+	.global	sftl_init
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	sftl_init, %function
+sftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r4, .L1781
+	mvn	r3, #0
+	ldr	r5, .L1781+4
+	ldr	r1, .L1781+8
+	ldr	r0, .L1781+12
+	str	r3, [r5]
+	bl	printk
+	mov	r0, r4
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldrh	r0, [r4, #36]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cmp	r0, #0
+	bne	.L1779
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	bne	.L1779
+	mov	r3, #1
+	str	r3, [r5]
+	movw	r3, #2344
+	ldrh	r3, [r4, r3]
+	cmp	r3, #15
+	bhi	.L1779
+	movw	r4, #8129
+.L1778:
+	mov	r1, #1
+	mov	r0, #0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1778
+.L1779:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1782:
+	.align	2
+.L1781:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC70
+	.word	.LC71
+	.size	sftl_init, .-sftl_init
+	.align	2
+	.global	ftl_memcmp
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	bl	memcmp
+	ldmfd	sp, {fp, sp, pc}
+	.size	ftl_memcmp, .-ftl_memcmp
+	.align	2
+	.global	rk_sftl_vendor_dev_ops_register
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	rk_sftl_vendor_dev_ops_register, %function
+rk_sftl_vendor_dev_ops_register:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r2, .L1787
+	ldr	r3, [r2, #-4012]
+	cmp	r3, #0
+	streq	r0, [r2, #-4012]
+	moveq	r0, r3
+	streq	r1, [r2, #-4008]
+	mvnne	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L1788:
+	.align	2
+.L1787:
+	.word	.LANCHOR3
+	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
+	.align	2
+	.global	rk_sftl_vendor_storage_init
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	rk_sftl_vendor_storage_init, %function
+rk_sftl_vendor_storage_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	mov	r0, #65536
+	ldr	r4, .L1798
+	bl	ftl_malloc
+	cmp	r0, #0
+	str	r0, [r4, #-4004]
+	mvneq	r9, #11
+	beq	.L1789
+	ldr	r8, .L1798+4
+	mov	r6, #0
+	mov	r5, r6
+	mov	r7, r6
+.L1793:
+	ldr	r3, [r4, #-4012]
+	mov	r1, #128
+	ldr	r2, [r4, #-4004]
+	lsl	r0, r7, #7
+	blx	r3
+	subs	r9, r0, #0
+	bne	.L1791
+	ldr	r1, [r4, #-4004]
+	ldr	r0, .L1798+8
+	add	r2, r1, #61440
+	ldr	r3, [r1, #4]
+	ldr	r2, [r2, #4092]
+	ldr	r1, [r1]
+	bl	printk
+	ldr	r2, [r4, #-4004]
+	ldr	r3, [r2]
+	cmp	r3, r8
+	bne	.L1792
+	add	r1, r2, #61440
+	ldr	r3, [r2, #4]
+	ldr	r1, [r1, #4092]
+	cmp	r3, r5
+	sub	r1, r1, r3
+	clz	r1, r1
+	lsr	r1, r1, #5
+	movls	r1, #0
+	cmp	r1, #0
+	movne	r6, r7
+	movne	r5, r3
+.L1792:
+	add	r7, r7, #1
+	cmp	r7, #2
+	bne	.L1793
+	cmp	r5, #0
+	beq	.L1794
+	ldr	r3, [r4, #-4012]
+	mov	r1, #128
+	lsl	r0, r6, #7
+	blx	r3
+	subs	r9, r0, #0
+	beq	.L1789
+.L1791:
+	ldr	r0, [r4, #-4004]
+	mvn	r9, #0
+	bl	kfree
+	mov	r3, #0
+	str	r3, [r4, #-4004]
+	b	.L1789
+.L1794:
+	mov	r1, #65536
+	mov	r0, r2
+	bl	__memzero
+	ldr	r3, [r4, #-4004]
+	mov	r2, #1
+	add	r1, r3, #61440
+	str	r2, [r3, #4]
+	str	r8, [r3]
+	str	r2, [r1, #4092]
+	ldr	r2, .L1798+12
+	strh	r5, [r3, #12]	@ movhi
+	strh	r2, [r3, #14]	@ movhi
+.L1789:
+	mov	r0, r9
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+.L1799:
+	.align	2
+.L1798:
+	.word	.LANCHOR3
+	.word	1380668996
+	.word	.LC106
+	.word	-1032
+	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
+	.align	2
+	.global	rk_sftl_vendor_read
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	rk_sftl_vendor_read, %function
+rk_sftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r3, .L1806
+	mov	r4, r0
+	mov	r0, r1
+	ldr	ip, [r3, #-4004]
+	cmp	ip, #0
+	ldrhne	lr, [ip, #10]
+	movne	r3, #0
+	bne	.L1802
+.L1805:
+	mvn	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1803:
+	add	r3, r3, #1
+.L1802:
+	cmp	r3, lr
+	bcs	.L1805
+	add	r1, ip, r3, lsl #3
+	ldrh	r5, [r1, #16]
+	cmp	r5, r4
+	bne	.L1803
+	ldrh	r4, [r1, #20]
+	ldrh	r1, [r1, #18]
+	cmp	r4, r2
+	movcs	r4, r2
+	add	r1, r1, #1024
+	mov	r2, r4
+	add	r1, ip, r1
+	bl	memcpy
+	mov	r0, r4
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L1807:
+	.align	2
+.L1806:
+	.word	.LANCHOR3
+	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
+	.align	2
+	.global	rk_sftl_vendor_write
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	rk_sftl_vendor_write, %function
+rk_sftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	sub	sp, sp, #24
+	mov	ip, r1
+	ldr	r8, .L1827
+	mov	r9, r2
+	ldr	r4, [r8, #-4004]
+	cmp	r4, #0
+	beq	.L1823
+	ldrh	r2, [r4, #10]
+	add	r7, r9, #63
+	ldrh	r3, [r4, #8]
+	bic	r7, r7, #63
+	mov	r5, #0
+	str	r3, [fp, #-44]
+.L1810:
+	cmp	r5, r2
+	bcc	.L1818
+	ldrh	r1, [r4, #14]
+	cmp	r7, r1
+	bhi	.L1823
+	add	r3, r4, r2, lsl #3
+	uxth	r7, r7
+	strh	r0, [r3, #16]	@ movhi
+	ldrh	r2, [r4, #12]
+	strh	r9, [r3, #20]	@ movhi
+	strh	r2, [r3, #18]	@ movhi
+	add	r2, r2, r7
+	sub	r7, r1, r7
+	strh	r2, [r4, #12]	@ movhi
+	strh	r7, [r4, #14]	@ movhi
+	mov	r2, r9
+	ldrh	r0, [r3, #18]
+	mov	r1, ip
+	add	r0, r0, #1024
+	add	r0, r4, r0
+	bl	memcpy
+	ldrh	r3, [r4, #10]
+	add	r2, r4, #61440
+	add	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	ldr	r3, [r4, #4]
 	add	r3, r3, #1
-	str	r3, [r4, #2516]
-	.loc 3 735 0
-	bl	FtlVpcTblFlush
-.LVL1625:
-	.loc 3 736 0
-	bl	FtlSysBlkInit
-.LVL1626:
-	cmp	r0, #0
-	.loc 3 739 0
+	str	r3, [r4, #4]
+	str	r3, [r2, #4092]
+	ldrh	r3, [r4, #8]
+	add	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	movhi	r3, #0
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, [r8, #-4008]
+	b	.L1826
+.L1818:
+	add	r6, r4, r5, lsl #3
+	ldrh	r3, [r6, #16]
+	cmp	r3, r0
+	str	r3, [fp, #-48]
+	bne	.L1811
+	ldrh	r1, [r6, #20]
+	add	r3, r4, #1024
+	add	r1, r1, #63
+	bic	r1, r1, #63
+	cmp	r9, r1
+	str	r1, [fp, #-52]
+	bls	.L1812
+	ldrh	r1, [r4, #14]
+	cmp	r7, r1
+	bhi	.L1823
+	ldrh	r8, [r6, #18]
+	sub	r2, r2, #1
+	str	r2, [fp, #-56]
+.L1813:
+	ldr	r2, [fp, #-56]
+	add	r6, r6, #8
+	cmp	r5, r2
+	bcc	.L1814
+	ldrh	r2, [fp, #-48]
+	add	r5, r4, r5, lsl #3
+	uxth	r8, r8
+	mov	r1, ip
+	strh	r9, [r5, #20]	@ movhi
+	add	r0, r3, r8
+	strh	r2, [r5, #16]	@ movhi
+	strh	r8, [r5, #18]	@ movhi
+	mov	r2, r9
+	bl	memcpy
+	uxth	r3, r7
+	ldrh	r7, [r4, #14]
+	add	r8, r8, r3
+	sub	r7, r7, r3
+	ldr	r3, [fp, #-52]
+	strh	r8, [r4, #12]	@ movhi
+	add	r7, r7, r3
+	strh	r7, [r4, #14]	@ movhi
+.L1815:
+	ldr	r3, [r4, #4]
+	add	r2, r4, #61440
+	add	r3, r3, #1
+	str	r3, [r4, #4]
+	str	r3, [r2, #4092]
+	ldrh	r3, [r4, #8]
+	add	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	movhi	r3, #0
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1827
+	ldr	r3, [r3, #-4008]
+.L1826:
+	ldr	r0, [fp, #-44]
+	mov	r2, r4
+	mov	r1, #128
+	lsl	r0, r0, #7
+	blx	r3
 	mov	r0, #0
-	.loc 3 737 0
-	ldreq	r3, .L1764+24
-	moveq	r2, #1
-	streq	r2, [r3]
-	.loc 3 739 0
+.L1808:
+	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1765:
+.L1814:
+	ldrh	r10, [r6, #20]
+	add	r0, r3, r8
+	ldrh	r2, [r6, #16]
+	add	r5, r5, #1
+	ldrh	r1, [r6, #18]
+	strh	r10, [r6, #12]	@ movhi
+	add	r10, r10, #63
+	bic	r10, r10, #63
+	strh	r2, [r6, #8]	@ movhi
+	strh	r8, [r6, #10]	@ movhi
+	add	r1, r3, r1
+	mov	r2, r10
+	str	ip, [fp, #-64]
+	str	r3, [fp, #-60]
+	add	r8, r8, r10
+	bl	memcpy
+	ldr	ip, [fp, #-64]
+	ldr	r3, [fp, #-60]
+	b	.L1813
+.L1812:
+	add	r5, r4, r5, lsl #3
+	mov	r2, r9
+	mov	r1, ip
+	ldrh	r0, [r5, #18]
+	add	r0, r3, r0
+	bl	memcpy
+	strh	r9, [r6, #20]	@ movhi
+	b	.L1815
+.L1811:
+	add	r5, r5, #1
+	b	.L1810
+.L1823:
+	mvn	r0, #0
+	b	.L1808
+.L1828:
 	.align	2
-.L1764:
-	.word	.LANCHOR0
-	.word	168778952
+.L1827:
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2564
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+2552
-	.word	.LANCHOR2
-.LFE160:
-	.size	ftl_low_format, .-ftl_low_format
+	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
-	.global	sftl_init
+	.global	rk_sftl_vendor_storage_ioctl
 	.syntax unified
 	.arm
 	.fpu softvfp
-	.type	sftl_init, %function
-sftl_init:
-.LFB161:
-	.loc 3 743 0
+	.type	rk_sftl_vendor_storage_ioctl, %function
+rk_sftl_vendor_storage_ioctl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-.LCFI440:
-	push	{r4, r5, fp, ip, lr, pc}
-.LCFI441:
+	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-.LCFI442:
-	.loc 3 746 0
-	ldr	r5, .L1772
-	mvn	r3, #0
-	.loc 3 753 0
-	ldr	r4, .L1772+4
-	.loc 3 749 0
-	ldr	r1, .L1772+8
-	ldr	r0, .L1772+12
-	.loc 3 746 0
-	str	r3, [r5]
-	.loc 3 749 0
-	bl	printk
-.LVL1627:
-	.loc 3 750 0
-	ldr	r0, .L1772+16
-	bl	FtlConstantsInit
-.LVL1628:
-	.loc 3 751 0
-	bl	FtlMemInit
-.LVL1629:
-	.loc 3 752 0
-	bl	FtlVariablesInit
-.LVL1630:
-	.loc 3 753 0
-	ldrh	r0, [r4, #12]
-	bl	FtlFreeSysBlkQueueInit
-.LVL1631:
-	.loc 3 756 0
-	bl	FtlLoadBbt
-.LVL1632:
+	mov	r0, #4096
+	mov	r5, r2
+	mov	r6, r1
+	bl	ftl_malloc
+	subs	r4, r0, #0
+	mvneq	r5, #0
+	beq	.L1829
+	ldr	r3, .L1854
+	cmp	r6, r3
+	beq	.L1832
+	add	r3, r3, #1
+	cmp	r6, r3
+	beq	.L1833
+.L1849:
+	mvn	r5, #13
+	b	.L1831
+.L1832:
+	ldr	r6, .L1854+4
+	mov	r3, sp
+	and	r3, r3, r6
+	ldr	r3, [r3, #72]
+	.syntax divided
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+@ 0 "" 2
+	.arm
+	.syntax unified
+	cmp	r3, #0
+	bne	.L1839
+	mov	r2, #8
+	mov	r1, r5
+	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1770
-	.loc 3 767 0
-	bl	FtlSysBlkInit
-.LVL1633:
+	bne	.L1849
+	ldr	r2, [r4]
+	ldr	r3, .L1854+8
+	cmp	r2, r3
+	beq	.L1837
+.L1838:
+	mvn	r5, #0
+.L1831:
+	mov	r0, r4
+	bl	kfree
+.L1829:
+	mov	r0, r5
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1837:
+	ldrh	r2, [r4, #6]
+	add	r1, r4, #8
+	ldrh	r0, [r4, #4]
+	bl	rk_sftl_vendor_read
+	cmn	r0, #1
+	beq	.L1838
+	mov	r3, sp
+	uxth	r2, r0
+	and	r6, r6, r3
+	strh	r0, [r4, #6]	@ movhi
+	add	r2, r2, #8
+	ldr	r3, [r6, #72]
+	.syntax divided
+@ 561 "./arch/arm/include/asm/uaccess.h" 1
+	adds r1, r5, r2; sbcccs r1, r1, r3; movcc r3, #0
+@ 0 "" 2
+	.arm
+	.syntax unified
+	cmp	r3, #0
+	bne	.L1849
+	mov	r0, r5
+	mov	r1, r4
+	bl	arm_copy_to_user
+	subs	r5, r0, #0
+	beq	.L1831
+	b	.L1849
+.L1833:
+	ldr	r6, .L1854+4
+	mov	r3, sp
+	and	r3, r3, r6
+	ldr	r3, [r3, #72]
+	.syntax divided
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+@ 0 "" 2
+	.arm
+	.syntax unified
+	cmp	r3, #0
+	bne	.L1839
+	mov	r2, #8
+	mov	r1, r5
+	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1770
-	.loc 3 779 0
-	mov	r3, #1
-	.loc 3 783 0
-	add	r4, r4, #2320
-	.loc 3 779 0
-	str	r3, [r5]
-	.loc 3 783 0
-	ldrh	r3, [r4]
-	cmp	r3, #15
-	bhi	.L1770
-	movw	r4, #8129
-.L1769:
-.LBB547:
-	.loc 3 786 0 discriminator 3
-	mov	r1, #1
-	mov	r0, #0
-	bl	rk_ftl_garbage_collect
-.LVL1634:
-	.loc 3 785 0 discriminator 3
-	subs	r4, r4, #1
-	bne	.L1769
-.L1770:
-.LBE547:
-	.loc 3 794 0
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1773:
+	bne	.L1849
+	ldr	r2, [r4]
+	ldr	r3, .L1854+8
+	cmp	r2, r3
+	bne	.L1838
+	ldrh	r2, [r4, #6]
+	movw	r3, #4087
+	cmp	r2, r3
+	bhi	.L1838
+	mov	r3, sp
+	add	r2, r2, #8
+	and	r6, r6, r3
+	ldr	r3, [r6, #72]
+	.syntax divided
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r1, r5, r2; sbcccs r1, r1, r3; movcc r3, #0
+@ 0 "" 2
+	.arm
+	.syntax unified
+	cmp	r3, #0
+	movne	r1, r2
+	movne	r0, r4
+	bne	.L1853
+	mov	r1, r5
+	mov	r0, r4
+	bl	arm_copy_from_user
+	cmp	r0, #0
+	bne	.L1849
+	ldrh	r2, [r4, #6]
+	add	r1, r4, #8
+	ldrh	r0, [r4, #4]
+	bl	rk_sftl_vendor_write
+	mov	r5, r0
+	b	.L1831
+.L1839:
+	mov	r1, #8
+.L1853:
+	bl	__memzero
+	b	.L1849
+.L1855:
 	.align	2
-.L1772:
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LC70
-	.word	.LC71
-	.word	g_nand_phy_info
-.LFE161:
-	.size	sftl_init, .-sftl_init
+.L1854:
+	.word	1074034177
+	.word	-8192
+	.word	1448232273
+	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
 	.align	2
-	.global	ftl_memcmp
+	.global	rk_sftl_vendor_register
 	.syntax unified
 	.arm
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-.LFB279:
-	.loc 1 211 0
+	.type	rk_sftl_vendor_register, %function
+rk_sftl_vendor_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL1635:
 	mov	ip, sp
-.LCFI443:
 	push	{fp, ip, lr, pc}
-.LCFI444:
 	sub	fp, ip, #4
-.LCFI445:
-	.loc 1 212 0
-	bl	memcmp
-.LVL1636:
-	.loc 1 213 0
+	ldr	r0, .L1857
+	bl	misc_register
 	ldmfd	sp, {fp, sp, pc}
-.LFE279:
-	.size	ftl_memcmp, .-ftl_memcmp
+.L1858:
+	.align	2
+.L1857:
+	.word	.LANCHOR2+12
+	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
 	.global	check_vpc_table
 	.global	FtlUpdateVaildLpnCount
@@ -19678,143 +13269,152 @@ ftl_memcmp:
 	.global	c_ftl_nand_die_num
 	.global	c_ftl_nand_type
 	.section	.rodata
+	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3871, %object
-	.size	__func__.3871, 17
-__func__.3871:
+	.type	__func__.3927, %object
+	.size	__func__.3927, 17
+__func__.3927:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.3866, %object
-	.size	__func__.3866, 17
-__func__.3866:
+	.type	__func__.3922, %object
+	.size	__func__.3922, 17
+__func__.3922:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.3902, %object
-	.size	__func__.3902, 17
-__func__.3902:
+	.type	__func__.3958, %object
+	.size	__func__.3958, 17
+__func__.3958:
 	.ascii	"List_remove_node\000"
-	.type	__func__.3934, %object
-	.size	__func__.3934, 22
-__func__.3934:
+	.type	__func__.3990, %object
+	.size	__func__.3990, 22
+__func__.3990:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.4040, %object
-	.size	__func__.4040, 22
-__func__.4040:
+	.type	__func__.4096, %object
+	.size	__func__.4096, 22
+__func__.4096:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.4363, %object
-	.size	__func__.4363, 16
-__func__.4363:
+	.type	__func__.4419, %object
+	.size	__func__.4419, 16
+__func__.4419:
 	.ascii	"make_superblock\000"
-	.type	__func__.4538, %object
-	.size	__func__.4538, 19
-__func__.4538:
+	.type	__func__.4594, %object
+	.size	__func__.4594, 19
+__func__.4594:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.4778, %object
-	.size	__func__.4778, 15
-__func__.4778:
+	.type	__func__.14923, %object
+	.size	__func__.14923, 15
+__func__.14923:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.4795, %object
-	.size	__func__.4795, 15
-__func__.4795:
+	.type	__func__.14940, %object
+	.size	__func__.14940, 15
+__func__.14940:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.3976, %object
-	.size	__func__.3976, 26
-__func__.3976:
+	.type	__func__.4032, %object
+	.size	__func__.4032, 26
+__func__.4032:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.3490, %object
-	.size	__func__.3490, 11
-__func__.3490:
+	.type	__func__.3536, %object
+	.size	__func__.3536, 11
+__func__.3536:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.3706, %object
-	.size	__func__.3706, 14
-__func__.3706:
+	.type	__func__.3762, %object
+	.size	__func__.3762, 14
+__func__.3762:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.3943, %object
-	.size	__func__.3943, 16
-__func__.3943:
+	.type	__func__.3999, %object
+	.size	__func__.3999, 16
+__func__.3999:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.4001, %object
-	.size	__func__.4001, 31
-__func__.4001:
+	.type	__func__.4057, %object
+	.size	__func__.4057, 31
+__func__.4057:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.4015, %object
-	.size	__func__.4015, 16
-__func__.4015:
+	.type	__func__.4071, %object
+	.size	__func__.4071, 16
+__func__.4071:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.3987, %object
-	.size	__func__.3987, 15
-__func__.3987:
+	.type	__func__.4043, %object
+	.size	__func__.4043, 15
+__func__.4043:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.4057, %object
-	.size	__func__.4057, 9
-__func__.4057:
+	.type	__func__.4113, %object
+	.size	__func__.4113, 9
+__func__.4113:
 	.ascii	"log2phys\000"
-	.type	__func__.4272, %object
-	.size	__func__.4272, 16
-__func__.4272:
+	.type	__func__.4328, %object
+	.size	__func__.4328, 16
+__func__.4328:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.4425, %object
-	.size	__func__.4425, 14
-__func__.4425:
+	.type	__func__.4481, %object
+	.size	__func__.4481, 14
+__func__.4481:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.4152, %object
-	.size	__func__.4152, 14
-__func__.4152:
+	.type	__func__.4208, %object
+	.size	__func__.4208, 14
+__func__.4208:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.4384, %object
-	.size	__func__.4384, 18
-__func__.4384:
+	.type	__func__.4440, %object
+	.size	__func__.4440, 18
+__func__.4440:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.4510, %object
-	.size	__func__.4510, 25
-__func__.4510:
+	.type	__func__.4566, %object
+	.size	__func__.4566, 25
+__func__.4566:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.4551, %object
-	.size	__func__.4551, 16
-__func__.4551:
+	.type	__func__.4607, %object
+	.size	__func__.4607, 16
+__func__.4607:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.4558, %object
-	.size	__func__.4558, 20
-__func__.4558:
+	.type	__func__.4614, %object
+	.size	__func__.4614, 20
+__func__.4614:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.4306, %object
-	.size	__func__.4306, 22
-__func__.4306:
+	.type	__func__.4362, %object
+	.size	__func__.4362, 22
+__func__.4362:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.3749, %object
-	.size	__func__.3749, 11
-__func__.3749:
+	.type	__func__.3805, %object
+	.size	__func__.3805, 11
+__func__.3805:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.4130, %object
-	.size	__func__.4130, 15
-__func__.4130:
+	.type	__func__.4186, %object
+	.size	__func__.4186, 15
+__func__.4186:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.4409, %object
-	.size	__func__.4409, 21
-__func__.4409:
+	.type	__func__.4465, %object
+	.size	__func__.4465, 21
+__func__.4465:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.4531, %object
-	.size	__func__.4531, 29
-__func__.4531:
+	.type	__func__.4587, %object
+	.size	__func__.4587, 29
+__func__.4587:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.3614, %object
-	.size	__func__.3614, 13
-__func__.3614:
+	.type	__func__.3660, %object
+	.size	__func__.3660, 13
+__func__.3660:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.4628, %object
-	.size	__func__.4628, 19
-__func__.4628:
+	.type	__func__.4684, %object
+	.size	__func__.4684, 19
+__func__.4684:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.4734, %object
-	.size	__func__.4734, 23
-__func__.4734:
+	.type	__func__.4790, %object
+	.size	__func__.4790, 23
+__func__.4790:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.3642, %object
-	.size	__func__.3642, 9
-__func__.3642:
+	.type	__func__.3688, %object
+	.size	__func__.3688, 9
+__func__.3688:
 	.ascii	"FtlWrite\000"
-	.type	__func__.4209, %object
-	.size	__func__.4209, 15
-__func__.4209:
+	.type	__func__.4265, %object
+	.size	__func__.4265, 15
+__func__.4265:
 	.ascii	"FtlLoadSysInfo\000"
+	.space	2
+	.type	rk_sftl_vendor_storage_fops, %object
+	.size	rk_sftl_vendor_storage_fops, 108
+rk_sftl_vendor_storage_fops:
+	.space	32
+	.word	rk_sftl_vendor_storage_ioctl
+	.word	rk_sftl_vendor_storage_ioctl
+	.space	68
 	.data
 	.align	2
 	.set	.LANCHOR2,. + 0
@@ -19831,10 +13431,21 @@ ftl_gc_temp_block_bops_scan_page_addr:
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
+	.type	rkflash_vender_storage_dev, %object
+	.size	rkflash_vender_storage_dev, 40
+rkflash_vender_storage_dev:
+	.word	255
+	.word	.LC107
+	.word	rk_sftl_vendor_storage_fops
+	.space	28
 	.bss
 	.align	2
 	.set	.LANCHOR0,. + 0
 	.set	.LANCHOR3,. + 8184
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.space	24
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -20223,6 +13834,10 @@ g_gc_bad_block_temp_tbl:
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 16
+g_nand_ops:
+	.space	16
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
@@ -20425,6 +14040,18 @@ g_ftl_nand_free_count:
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
+	.space	4
+	.type	_flash_read, %object
+	.size	_flash_read, 4
+_flash_read:
+	.space	4
+	.type	_flash_write, %object
+	.size	_flash_write, 4
+_flash_write:
+	.space	4
+	.type	g_vendor, %object
+	.size	g_vendor, 4
+g_vendor:
 	.space	4
 	.type	ftl_temp_buf, %object
 	.size	ftl_temp_buf, 4096
@@ -20592,22641 +14219,70 @@ check_vpc_table:
 .LC74:
 	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
 .LC75:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"\0014\000"
 .LC76:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"prog read error: = %x\012\000"
 .LC77:
-	.ascii	"prog read d error: = %x %x %x\012\000"
+	.ascii	"prog read s error: = %x %x %x\012\000"
 .LC78:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+	.ascii	"prog read d error: = %x %x %x\012\000"
 .LC79:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC80:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-.LC80:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC81:
-	.ascii	"%s error allocating memory. return -1\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC82:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"%s error allocating memory. return -1\012\000"
 .LC83:
-	.ascii	"spare:\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC84:
-	.ascii	"map_ppn:\000"
+	.ascii	"spare:\000"
 .LC85:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"map_ppn:\000"
 .LC86:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC87:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC88:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"ftl_scan_all_data = %x\012\000"
 .LC89:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC90:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC90:
-	.ascii	"...%s enter...\012\000"
 .LC91:
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+	.ascii	"...%s enter...\012\000"
 .LC92:
-	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
 .LC93:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
 .LC94:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
 .LC95:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
 .LC96:
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 .LC97:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 .LC98:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"decrement_vpc_count %x = %d\012\000"
 .LC99:
-	.ascii	"no ect\000"
+	.ascii	"spuer block %x vpn is 0\012 \000"
 .LC100:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.ascii	"no ect\000"
 .LC101:
-	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 .LC102:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 .LC103:
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 .LC104:
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+.LC105:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.debug_frame,"",%progbits
-.Lframe0:
-	.4byte	.LECIE0-.LSCIE0
-.LSCIE0:
-	.4byte	0xffffffff
-	.byte	0x3
-	.ascii	"\000"
-	.uleb128 0x1
-	.sleb128 -4
-	.uleb128 0xe
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0
-	.align	2
-.LECIE0:
-.LSFDE0:
-	.4byte	.LEFDE0-.LASFDE0
-.LASFDE0:
-	.4byte	.Lframe0
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.byte	0x4
-	.4byte	.LCFI0-.LFB271
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI1-.LCFI0
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI2-.LCFI1
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE0:
-.LSFDE2:
-	.4byte	.LEFDE2-.LASFDE2
-.LASFDE2:
-	.4byte	.Lframe0
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.byte	0x4
-	.4byte	.LCFI3-.LFB286
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI4-.LCFI3
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI5-.LCFI4
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE2:
-.LSFDE4:
-	.4byte	.LEFDE4-.LASFDE4
-.LASFDE4:
-	.4byte	.Lframe0
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
-	.byte	0x4
-	.4byte	.LCFI6-.LFB152
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI7-.LCFI6
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI8-.LCFI7
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE4:
-.LSFDE6:
-	.4byte	.LEFDE6-.LASFDE6
-.LASFDE6:
-	.4byte	.Lframe0
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
-	.byte	0x4
-	.4byte	.LCFI9-.LFB153
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI10-.LCFI9
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI11-.LCFI10
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE6:
-.LSFDE8:
-	.4byte	.LEFDE8-.LASFDE8
-.LASFDE8:
-	.4byte	.Lframe0
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
-	.byte	0x4
-	.4byte	.LCFI12-.LFB154
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI13-.LCFI12
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI14-.LCFI13
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE8:
-.LSFDE10:
-	.4byte	.LEFDE10-.LASFDE10
-.LASFDE10:
-	.4byte	.Lframe0
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
-	.byte	0x4
-	.4byte	.LCFI15-.LFB155
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI16-.LCFI15
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI17-.LCFI16
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE10:
-.LSFDE12:
-	.4byte	.LEFDE12-.LASFDE12
-.LASFDE12:
-	.4byte	.Lframe0
-	.4byte	.LFB158
-	.4byte	.LFE158-.LFB158
-	.byte	0x4
-	.4byte	.LCFI18-.LFB158
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI19-.LCFI18
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI20-.LCFI19
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE12:
-.LSFDE14:
-	.4byte	.LEFDE14-.LASFDE14
-.LASFDE14:
-	.4byte	.Lframe0
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
-	.byte	0x4
-	.4byte	.LCFI21-.LFB171
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI22-.LCFI21
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI23-.LCFI22
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE14:
-.LSFDE16:
-	.4byte	.LEFDE16-.LASFDE16
-.LASFDE16:
-	.4byte	.Lframe0
-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
-	.byte	0x4
-	.4byte	.LCFI24-.LFB172
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI25-.LCFI24
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI26-.LCFI25
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE16:
-.LSFDE18:
-	.4byte	.LEFDE18-.LASFDE18
-.LASFDE18:
-	.4byte	.Lframe0
-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
-	.byte	0x4
-	.4byte	.LCFI27-.LFB173
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI28-.LCFI27
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI29-.LCFI28
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE18:
-.LSFDE20:
-	.4byte	.LEFDE20-.LASFDE20
-.LASFDE20:
-	.4byte	.Lframe0
-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
-	.byte	0x4
-	.4byte	.LCFI30-.LFB174
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI31-.LCFI30
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI32-.LCFI31
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE20:
-.LSFDE22:
-	.4byte	.LEFDE22-.LASFDE22
-.LASFDE22:
-	.4byte	.Lframe0
-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
-	.byte	0x4
-	.4byte	.LCFI33-.LFB177
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI34-.LCFI33
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI35-.LCFI34
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE22:
-.LSFDE24:
-	.4byte	.LEFDE24-.LASFDE24
-.LASFDE24:
-	.4byte	.Lframe0
-	.4byte	.LFB178
-	.4byte	.LFE178-.LFB178
-	.byte	0x4
-	.4byte	.LCFI36-.LFB178
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI37-.LCFI36
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI38-.LCFI37
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE24:
-.LSFDE26:
-	.4byte	.LEFDE26-.LASFDE26
-.LASFDE26:
-	.4byte	.Lframe0
-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
-	.byte	0x4
-	.4byte	.LCFI39-.LFB182
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI40-.LCFI39
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI41-.LCFI40
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE26:
-.LSFDE28:
-	.4byte	.LEFDE28-.LASFDE28
-.LASFDE28:
-	.4byte	.Lframe0
-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
-	.byte	0x4
-	.4byte	.LCFI42-.LFB183
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI43-.LCFI42
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI44-.LCFI43
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE28:
-.LSFDE30:
-	.4byte	.LEFDE30-.LASFDE30
-.LASFDE30:
-	.4byte	.Lframe0
-	.4byte	.LFB184
-	.4byte	.LFE184-.LFB184
-	.byte	0x4
-	.4byte	.LCFI45-.LFB184
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI46-.LCFI45
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI47-.LCFI46
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE30:
-.LSFDE32:
-	.4byte	.LEFDE32-.LASFDE32
-.LASFDE32:
-	.4byte	.Lframe0
-	.4byte	.LFB185
-	.4byte	.LFE185-.LFB185
-	.byte	0x4
-	.4byte	.LCFI48-.LFB185
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI49-.LCFI48
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI50-.LCFI49
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE32:
-.LSFDE34:
-	.4byte	.LEFDE34-.LASFDE34
-.LASFDE34:
-	.4byte	.Lframe0
-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
-	.byte	0x4
-	.4byte	.LCFI51-.LFB187
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI52-.LCFI51
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI53-.LCFI52
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE34:
-.LSFDE36:
-	.4byte	.LEFDE36-.LASFDE36
-.LASFDE36:
-	.4byte	.Lframe0
-	.4byte	.LFB188
-	.4byte	.LFE188-.LFB188
-	.byte	0x4
-	.4byte	.LCFI54-.LFB188
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI55-.LCFI54
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI56-.LCFI55
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE36:
-.LSFDE38:
-	.4byte	.LEFDE38-.LASFDE38
-.LASFDE38:
-	.4byte	.Lframe0
-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
-	.byte	0x4
-	.4byte	.LCFI57-.LFB189
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI58-.LCFI57
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI59-.LCFI58
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE38:
-.LSFDE40:
-	.4byte	.LEFDE40-.LASFDE40
-.LASFDE40:
-	.4byte	.Lframe0
-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
-	.byte	0x4
-	.4byte	.LCFI60-.LFB191
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI61-.LCFI60
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI62-.LCFI61
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE40:
-.LSFDE42:
-	.4byte	.LEFDE42-.LASFDE42
-.LASFDE42:
-	.4byte	.Lframe0
-	.4byte	.LFB192
-	.4byte	.LFE192-.LFB192
-	.byte	0x4
-	.4byte	.LCFI63-.LFB192
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI64-.LCFI63
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI65-.LCFI64
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE42:
-.LSFDE44:
-	.4byte	.LEFDE44-.LASFDE44
-.LASFDE44:
-	.4byte	.Lframe0
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.byte	0x4
-	.4byte	.LCFI66-.LFB196
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI67-.LCFI66
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI68-.LCFI67
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI69-.LCFI68
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI70-.LCFI69
-	.byte	0xb
-	.align	2
-.LEFDE44:
-.LSFDE46:
-	.4byte	.LEFDE46-.LASFDE46
-.LASFDE46:
-	.4byte	.Lframe0
-	.4byte	.LFB195
-	.4byte	.LFE195-.LFB195
-	.byte	0x4
-	.4byte	.LCFI71-.LFB195
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI72-.LCFI71
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI73-.LCFI72
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE46:
-.LSFDE48:
-	.4byte	.LEFDE48-.LASFDE48
-.LASFDE48:
-	.4byte	.Lframe0
-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
-	.byte	0x4
-	.4byte	.LCFI74-.LFB197
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI75-.LCFI74
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI76-.LCFI75
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE48:
-.LSFDE50:
-	.4byte	.LEFDE50-.LASFDE50
-.LASFDE50:
-	.4byte	.Lframe0
-	.4byte	.LFB194
-	.4byte	.LFE194-.LFB194
-	.byte	0x4
-	.4byte	.LCFI77-.LFB194
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI78-.LCFI77
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI79-.LCFI78
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE50:
-.LSFDE52:
-	.4byte	.LEFDE52-.LASFDE52
-.LASFDE52:
-	.4byte	.Lframe0
-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
-	.byte	0x4
-	.4byte	.LCFI80-.LFB198
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI81-.LCFI80
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI82-.LCFI81
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE52:
-.LSFDE54:
-	.4byte	.LEFDE54-.LASFDE54
-.LASFDE54:
-	.4byte	.Lframe0
-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
-	.byte	0x4
-	.4byte	.LCFI83-.LFB199
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI84-.LCFI83
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI85-.LCFI84
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE54:
-.LSFDE56:
-	.4byte	.LEFDE56-.LASFDE56
-.LASFDE56:
-	.4byte	.Lframe0
-	.4byte	.LFB200
-	.4byte	.LFE200-.LFB200
-	.byte	0x4
-	.4byte	.LCFI86-.LFB200
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI87-.LCFI86
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI88-.LCFI87
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE56:
-.LSFDE58:
-	.4byte	.LEFDE58-.LASFDE58
-.LASFDE58:
-	.4byte	.Lframe0
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
-	.byte	0x4
-	.4byte	.LCFI89-.LFB201
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI90-.LCFI89
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI91-.LCFI90
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE58:
-.LSFDE60:
-	.4byte	.LEFDE60-.LASFDE60
-.LASFDE60:
-	.4byte	.Lframe0
-	.4byte	.LFB202
-	.4byte	.LFE202-.LFB202
-	.byte	0x4
-	.4byte	.LCFI92-.LFB202
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI93-.LCFI92
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI94-.LCFI93
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE60:
-.LSFDE62:
-	.4byte	.LEFDE62-.LASFDE62
-.LASFDE62:
-	.4byte	.Lframe0
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.byte	0x4
-	.4byte	.LCFI95-.LFB210
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI96-.LCFI95
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI97-.LCFI96
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE62:
-.LSFDE64:
-	.4byte	.LEFDE64-.LASFDE64
-.LASFDE64:
-	.4byte	.Lframe0
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.byte	0x4
-	.4byte	.LCFI98-.LFB216
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI99-.LCFI98
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI100-.LCFI99
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE64:
-.LSFDE66:
-	.4byte	.LEFDE66-.LASFDE66
-.LASFDE66:
-	.4byte	.Lframe0
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.byte	0x4
-	.4byte	.LCFI101-.LFB222
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI102-.LCFI101
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI103-.LCFI102
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE66:
-.LSFDE68:
-	.4byte	.LEFDE68-.LASFDE68
-.LASFDE68:
-	.4byte	.Lframe0
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.byte	0x4
-	.4byte	.LCFI104-.LFB223
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI105-.LCFI104
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI106-.LCFI105
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE68:
-.LSFDE70:
-	.4byte	.LEFDE70-.LASFDE70
-.LASFDE70:
-	.4byte	.Lframe0
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.byte	0x4
-	.4byte	.LCFI107-.LFB229
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI108-.LCFI107
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI109-.LCFI108
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE70:
-.LSFDE72:
-	.4byte	.LEFDE72-.LASFDE72
-.LASFDE72:
-	.4byte	.Lframe0
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.byte	0x4
-	.4byte	.LCFI110-.LFB232
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI111-.LCFI110
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI112-.LCFI111
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE72:
-.LSFDE74:
-	.4byte	.LEFDE74-.LASFDE74
-.LASFDE74:
-	.4byte	.Lframe0
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.byte	0x4
-	.4byte	.LCFI113-.LFB234
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI114-.LCFI113
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI115-.LCFI114
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE74:
-.LSFDE76:
-	.4byte	.LEFDE76-.LASFDE76
-.LASFDE76:
-	.4byte	.Lframe0
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.byte	0x4
-	.4byte	.LCFI116-.LFB243
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI117-.LCFI116
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI118-.LCFI117
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE76:
-.LSFDE78:
-	.4byte	.LEFDE78-.LASFDE78
-.LASFDE78:
-	.4byte	.Lframe0
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.byte	0x4
-	.4byte	.LCFI119-.LFB244
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI120-.LCFI119
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI121-.LCFI120
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE78:
-.LSFDE80:
-	.4byte	.LEFDE80-.LASFDE80
-.LASFDE80:
-	.4byte	.Lframe0
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.byte	0x4
-	.4byte	.LCFI122-.LFB245
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI123-.LCFI122
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI124-.LCFI123
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE80:
-.LSFDE82:
-	.4byte	.LEFDE82-.LASFDE82
-.LASFDE82:
-	.4byte	.Lframe0
-	.4byte	.LFB150
-	.4byte	.LFE150-.LFB150
-	.byte	0x4
-	.4byte	.LCFI125-.LFB150
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI126-.LCFI125
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI127-.LCFI126
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI128-.LCFI127
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI129-.LCFI128
-	.byte	0xb
-	.align	2
-.LEFDE82:
-.LSFDE84:
-	.4byte	.LEFDE84-.LASFDE84
-.LASFDE84:
-	.4byte	.Lframe0
-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
-	.byte	0x4
-	.4byte	.LCFI130-.LFB151
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI131-.LCFI130
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI132-.LCFI131
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE84:
-.LSFDE86:
-	.4byte	.LEFDE86-.LASFDE86
-.LASFDE86:
-	.4byte	.Lframe0
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.byte	0x4
-	.4byte	.LCFI133-.LFB246
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI134-.LCFI133
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI135-.LCFI134
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI136-.LCFI135
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI137-.LCFI136
-	.byte	0xb
-	.align	2
-.LEFDE86:
-.LSFDE88:
-	.4byte	.LEFDE88-.LASFDE88
-.LASFDE88:
-	.4byte	.Lframe0
-	.4byte	.LFB247
-	.4byte	.LFE247-.LFB247
-	.byte	0x4
-	.4byte	.LCFI138-.LFB247
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI139-.LCFI138
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI140-.LCFI139
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE88:
-.LSFDE90:
-	.4byte	.LEFDE90-.LASFDE90
-.LASFDE90:
-	.4byte	.Lframe0
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.byte	0x4
-	.4byte	.LCFI141-.LFB250
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI142-.LCFI141
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI143-.LCFI142
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE90:
-.LSFDE92:
-	.4byte	.LEFDE92-.LASFDE92
-.LASFDE92:
-	.4byte	.Lframe0
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.byte	0x4
-	.4byte	.LCFI144-.LFB253
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI145-.LCFI144
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI146-.LCFI145
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE92:
-.LSFDE94:
-	.4byte	.LEFDE94-.LASFDE94
-.LASFDE94:
-	.4byte	.Lframe0
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.byte	0x4
-	.4byte	.LCFI147-.LFB254
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI148-.LCFI147
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI149-.LCFI148
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE94:
-.LSFDE96:
-	.4byte	.LEFDE96-.LASFDE96
-.LASFDE96:
-	.4byte	.Lframe0
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
-	.byte	0x4
-	.4byte	.LCFI150-.LFB255
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI151-.LCFI150
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI152-.LCFI151
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE96:
-.LSFDE98:
-	.4byte	.LEFDE98-.LASFDE98
-.LASFDE98:
-	.4byte	.Lframe0
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.byte	0x4
-	.4byte	.LCFI153-.LFB256
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI154-.LCFI153
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI155-.LCFI154
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE98:
-.LSFDE100:
-	.4byte	.LEFDE100-.LASFDE100
-.LASFDE100:
-	.4byte	.Lframe0
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.byte	0x4
-	.4byte	.LCFI156-.LFB257
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI157-.LCFI156
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI158-.LCFI157
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE100:
-.LSFDE102:
-	.4byte	.LEFDE102-.LASFDE102
-.LASFDE102:
-	.4byte	.Lframe0
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.byte	0x4
-	.4byte	.LCFI159-.LFB264
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI160-.LCFI159
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI161-.LCFI160
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE102:
-.LSFDE104:
-	.4byte	.LEFDE104-.LASFDE104
-.LASFDE104:
-	.4byte	.Lframe0
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.byte	0x4
-	.4byte	.LCFI162-.LFB265
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI163-.LCFI162
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI164-.LCFI163
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE104:
-.LSFDE106:
-	.4byte	.LEFDE106-.LASFDE106
-.LASFDE106:
-	.4byte	.Lframe0
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.byte	0x4
-	.4byte	.LCFI165-.LFB266
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI166-.LCFI165
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI167-.LCFI166
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE106:
-.LSFDE108:
-	.4byte	.LEFDE108-.LASFDE108
-.LASFDE108:
-	.4byte	.Lframe0
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.byte	0x4
-	.4byte	.LCFI168-.LFB272
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI169-.LCFI168
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI170-.LCFI169
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI171-.LCFI170
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI172-.LCFI171
-	.byte	0xb
-	.align	2
-.LEFDE108:
-.LSFDE110:
-	.4byte	.LEFDE110-.LASFDE110
-.LASFDE110:
-	.4byte	.Lframe0
-	.4byte	.LFB180
-	.4byte	.LFE180-.LFB180
-	.byte	0x4
-	.4byte	.LCFI173-.LFB180
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI174-.LCFI173
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI175-.LCFI174
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE110:
-.LSFDE112:
-	.4byte	.LEFDE112-.LASFDE112
-.LASFDE112:
-	.4byte	.Lframe0
-	.4byte	.LFB186
-	.4byte	.LFE186-.LFB186
-	.byte	0x4
-	.4byte	.LCFI176-.LFB186
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI177-.LCFI176
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI178-.LCFI177
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI179-.LCFI178
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI180-.LCFI179
-	.byte	0xb
-	.align	2
-.LEFDE112:
-.LSFDE114:
-	.4byte	.LEFDE114-.LASFDE114
-.LASFDE114:
-	.4byte	.Lframe0
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.byte	0x4
-	.4byte	.LCFI181-.LFB273
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI182-.LCFI181
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI183-.LCFI182
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI184-.LCFI183
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI185-.LCFI184
-	.byte	0xb
-	.align	2
-.LEFDE114:
-.LSFDE116:
-	.4byte	.LEFDE116-.LASFDE116
-.LASFDE116:
-	.4byte	.Lframe0
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.byte	0x4
-	.4byte	.LCFI186-.LFB274
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI187-.LCFI186
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI188-.LCFI187
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI189-.LCFI188
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x28
-	.byte	0x4
-	.4byte	.LCFI190-.LCFI189
-	.byte	0xb
-	.align	2
-.LEFDE116:
-.LSFDE118:
-	.4byte	.LEFDE118-.LASFDE118
-.LASFDE118:
-	.4byte	.Lframe0
-	.4byte	.LFB190
-	.4byte	.LFE190-.LFB190
-	.byte	0x4
-	.4byte	.LCFI191-.LFB190
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI192-.LCFI191
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI193-.LCFI192
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE118:
-.LSFDE120:
-	.4byte	.LEFDE120-.LASFDE120
-.LASFDE120:
-	.4byte	.Lframe0
-	.4byte	.LFB159
-	.4byte	.LFE159-.LFB159
-	.byte	0x4
-	.4byte	.LCFI194-.LFB159
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI195-.LCFI194
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI196-.LCFI195
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI197-.LCFI196
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI198-.LCFI197
-	.byte	0xb
-	.align	2
-.LEFDE120:
-.LSFDE122:
-	.4byte	.LEFDE122-.LASFDE122
-.LASFDE122:
-	.4byte	.Lframe0
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
-	.byte	0x4
-	.4byte	.LCFI199-.LFB193
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI200-.LCFI199
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI201-.LCFI200
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE122:
-.LSFDE124:
-	.4byte	.LEFDE124-.LASFDE124
-.LASFDE124:
-	.4byte	.Lframe0
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.byte	0x4
-	.4byte	.LCFI202-.LFB205
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI203-.LCFI202
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI204-.LCFI203
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE124:
-.LSFDE126:
-	.4byte	.LEFDE126-.LASFDE126
-.LASFDE126:
-	.4byte	.Lframe0
-	.4byte	.LFB275
-	.4byte	.LFE275-.LFB275
-	.byte	0x4
-	.4byte	.LCFI205-.LFB275
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI206-.LCFI205
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI207-.LCFI206
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI208-.LCFI207
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x18
-	.align	2
-.LEFDE126:
-.LSFDE128:
-	.4byte	.LEFDE128-.LASFDE128
-.LASFDE128:
-	.4byte	.Lframe0
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.byte	0x4
-	.4byte	.LCFI209-.LFB276
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI210-.LCFI209
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI211-.LCFI210
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE128:
-.LSFDE130:
-	.4byte	.LEFDE130-.LASFDE130
-.LASFDE130:
-	.4byte	.Lframe0
-	.4byte	.LFB277
-	.4byte	.LFE277-.LFB277
-	.byte	0x4
-	.4byte	.LCFI212-.LFB277
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI213-.LCFI212
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI214-.LCFI213
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE130:
-.LSFDE132:
-	.4byte	.LEFDE132-.LASFDE132
-.LASFDE132:
-	.4byte	.Lframe0
-	.4byte	.LFB156
-	.4byte	.LFE156-.LFB156
-	.byte	0x4
-	.4byte	.LCFI215-.LFB156
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI216-.LCFI215
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI217-.LCFI216
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE132:
-.LSFDE134:
-	.4byte	.LEFDE134-.LASFDE134
-.LASFDE134:
-	.4byte	.Lframe0
-	.4byte	.LFB175
-	.4byte	.LFE175-.LFB175
-	.byte	0x4
-	.4byte	.LCFI218-.LFB175
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI219-.LCFI218
-	.byte	0x84
-	.uleb128 0xa
-	.byte	0x85
-	.uleb128 0x9
-	.byte	0x86
-	.uleb128 0x8
-	.byte	0x87
-	.uleb128 0x7
-	.byte	0x88
-	.uleb128 0x6
-	.byte	0x89
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI220-.LCFI219
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE134:
-.LSFDE136:
-	.4byte	.LEFDE136-.LASFDE136
-.LASFDE136:
-	.4byte	.Lframe0
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.byte	0x4
-	.4byte	.LCFI221-.LFB203
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI222-.LCFI221
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI223-.LCFI222
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE136:
-.LSFDE138:
-	.4byte	.LEFDE138-.LASFDE138
-.LASFDE138:
-	.4byte	.Lframe0
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.byte	0x4
-	.4byte	.LCFI224-.LFB204
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI225-.LCFI224
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI226-.LCFI225
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI227-.LCFI226
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI228-.LCFI227
-	.byte	0xb
-	.align	2
-.LEFDE138:
-.LSFDE140:
-	.4byte	.LEFDE140-.LASFDE140
-.LASFDE140:
-	.4byte	.Lframe0
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.byte	0x4
-	.4byte	.LCFI229-.LFB207
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI230-.LCFI229
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI231-.LCFI230
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE140:
-.LSFDE142:
-	.4byte	.LEFDE142-.LASFDE142
-.LASFDE142:
-	.4byte	.Lframe0
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.byte	0x4
-	.4byte	.LCFI232-.LFB208
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI233-.LCFI232
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI234-.LCFI233
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE142:
-.LSFDE144:
-	.4byte	.LEFDE144-.LASFDE144
-.LASFDE144:
-	.4byte	.Lframe0
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.byte	0x4
-	.4byte	.LCFI235-.LFB206
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI236-.LCFI235
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI237-.LCFI236
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI238-.LCFI237
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI239-.LCFI238
-	.byte	0xb
-	.align	2
-.LEFDE144:
-.LSFDE146:
-	.4byte	.LEFDE146-.LASFDE146
-.LASFDE146:
-	.4byte	.Lframe0
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.byte	0x4
-	.4byte	.LCFI240-.LFB209
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI241-.LCFI240
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI242-.LCFI241
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE146:
-.LSFDE148:
-	.4byte	.LEFDE148-.LASFDE148
-.LASFDE148:
-	.4byte	.Lframe0
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.byte	0x4
-	.4byte	.LCFI243-.LFB212
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI244-.LCFI243
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI245-.LCFI244
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE148:
-.LSFDE150:
-	.4byte	.LEFDE150-.LASFDE150
-.LASFDE150:
-	.4byte	.Lframe0
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.byte	0x4
-	.4byte	.LCFI246-.LFB230
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI247-.LCFI246
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI248-.LCFI247
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE150:
-.LSFDE152:
-	.4byte	.LEFDE152-.LASFDE152
-.LASFDE152:
-	.4byte	.Lframe0
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.byte	0x4
-	.4byte	.LCFI249-.LFB241
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI250-.LCFI249
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI251-.LCFI250
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI252-.LCFI251
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x20
-	.byte	0x4
-	.4byte	.LCFI253-.LCFI252
-	.byte	0xb
-	.align	2
-.LEFDE152:
-.LSFDE154:
-	.4byte	.LEFDE154-.LASFDE154
-.LASFDE154:
-	.4byte	.Lframe0
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.byte	0x4
-	.4byte	.LCFI254-.LFB268
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI255-.LCFI254
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI256-.LCFI255
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI257-.LCFI256
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x18
-	.byte	0x4
-	.4byte	.LCFI258-.LCFI257
-	.byte	0xb
-	.align	2
-.LEFDE154:
-.LSFDE156:
-	.4byte	.LEFDE156-.LASFDE156
-.LASFDE156:
-	.4byte	.Lframe0
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.byte	0x4
-	.4byte	.LCFI259-.LFB240
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI260-.LCFI259
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI261-.LCFI260
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE156:
-.LSFDE158:
-	.4byte	.LEFDE158-.LASFDE158
-.LASFDE158:
-	.4byte	.Lframe0
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.byte	0x4
-	.4byte	.LCFI262-.LFB217
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI263-.LCFI262
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI264-.LCFI263
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE158:
-.LSFDE160:
-	.4byte	.LEFDE160-.LASFDE160
-.LASFDE160:
-	.4byte	.Lframe0
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.byte	0x4
-	.4byte	.LCFI265-.LFB220
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI266-.LCFI265
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI267-.LCFI266
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI268-.LCFI267
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI269-.LCFI268
-	.byte	0xb
-	.align	2
-.LEFDE160:
-.LSFDE162:
-	.4byte	.LEFDE162-.LASFDE162
-.LASFDE162:
-	.4byte	.Lframe0
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.byte	0x4
-	.4byte	.LCFI270-.LFB225
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI271-.LCFI270
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI272-.LCFI271
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI273-.LCFI272
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
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-	.4byte	.LCFI274-.LCFI273
-	.byte	0xb
-	.align	2
-.LEFDE162:
-.LSFDE164:
-	.4byte	.LEFDE164-.LASFDE164
-.LASFDE164:
-	.4byte	.Lframe0
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.byte	0x4
-	.4byte	.LCFI275-.LFB226
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI276-.LCFI275
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
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-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE164:
-.LSFDE166:
-	.4byte	.LEFDE166-.LASFDE166
-.LASFDE166:
-	.4byte	.Lframe0
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.byte	0x4
-	.4byte	.LCFI278-.LFB227
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI279-.LCFI278
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI280-.LCFI279
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE166:
-.LSFDE168:
-	.4byte	.LEFDE168-.LASFDE168
-.LASFDE168:
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-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.byte	0x4
-	.4byte	.LCFI281-.LFB228
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI282-.LCFI281
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI283-.LCFI282
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE168:
-.LSFDE170:
-	.4byte	.LEFDE170-.LASFDE170
-.LASFDE170:
-	.4byte	.Lframe0
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
-	.byte	0x4
-	.4byte	.LCFI284-.LFB157
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI285-.LCFI284
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI286-.LCFI285
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE170:
-.LSFDE172:
-	.4byte	.LEFDE172-.LASFDE172
-.LASFDE172:
-	.4byte	.Lframe0
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.byte	0x4
-	.4byte	.LCFI287-.LFB235
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI288-.LCFI287
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI289-.LCFI288
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI290-.LCFI289
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.align	2
-.LEFDE172:
-.LSFDE174:
-	.4byte	.LEFDE174-.LASFDE174
-.LASFDE174:
-	.4byte	.Lframe0
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.byte	0x4
-	.4byte	.LCFI291-.LFB259
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI292-.LCFI291
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI293-.LCFI292
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE174:
-.LSFDE176:
-	.4byte	.LEFDE176-.LASFDE176
-.LASFDE176:
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-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.byte	0x4
-	.4byte	.LCFI294-.LFB260
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI295-.LCFI294
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI296-.LCFI295
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI297-.LCFI296
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.align	2
-.LEFDE176:
-.LSFDE178:
-	.4byte	.LEFDE178-.LASFDE178
-.LASFDE178:
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-	.4byte	.LFE278-.LFB278
-	.byte	0x4
-	.4byte	.LCFI298-.LFB278
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI299-.LCFI298
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI300-.LCFI299
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE178:
-.LSFDE180:
-	.4byte	.LEFDE180-.LASFDE180
-.LASFDE180:
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-	.4byte	.LFB176
-	.4byte	.LFE176-.LFB176
-	.byte	0x4
-	.4byte	.LCFI301-.LFB176
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI302-.LCFI301
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI303-.LCFI302
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
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-.LEFDE180:
-.LSFDE182:
-	.4byte	.LEFDE182-.LASFDE182
-.LASFDE182:
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-	.4byte	.LFE248-.LFB248
-	.byte	0x4
-	.4byte	.LCFI304-.LFB248
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI305-.LCFI304
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI306-.LCFI305
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI307-.LCFI306
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
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-.LEFDE182:
-.LSFDE184:
-	.4byte	.LEFDE184-.LASFDE184
-.LASFDE184:
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-	.4byte	.LFE267-.LFB267
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI309-.LCFI308
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
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-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI310-.LCFI309
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI311-.LCFI310
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI312-.LCFI311
-	.byte	0xb
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-.LEFDE184:
-.LSFDE186:
-	.4byte	.LEFDE186-.LASFDE186
-.LASFDE186:
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-	.4byte	.LFE251-.LFB251
-	.byte	0x4
-	.4byte	.LCFI313-.LFB251
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI314-.LCFI313
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI315-.LCFI314
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
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-.LEFDE186:
-.LSFDE188:
-	.4byte	.LEFDE188-.LASFDE188
-.LASFDE188:
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-	.4byte	.LFE252-.LFB252
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI317-.LCFI316
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
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-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
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-.LEFDE188:
-.LSFDE190:
-	.4byte	.LEFDE190-.LASFDE190
-.LASFDE190:
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
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-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
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-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
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-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
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-	.byte	0xb
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-.LASFDE192:
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI325-.LCFI324
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
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-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
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-.LEFDE192:
-.LSFDE194:
-	.4byte	.LEFDE194-.LASFDE194
-.LASFDE194:
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI328-.LCFI327
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
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-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI330-.LCFI329
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI331-.LCFI330
-	.byte	0xb
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-.LEFDE194:
-.LSFDE196:
-	.4byte	.LEFDE196-.LASFDE196
-.LASFDE196:
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-	.4byte	.LFE238-.LFB238
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-	.4byte	.LCFI332-.LFB238
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI333-.LCFI332
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI334-.LCFI333
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI335-.LCFI334
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI336-.LCFI335
-	.byte	0xb
-	.align	2
-.LEFDE196:
-.LSFDE198:
-	.4byte	.LEFDE198-.LASFDE198
-.LASFDE198:
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-	.4byte	.LFE179-.LFB179
-	.byte	0x4
-	.4byte	.LCFI337-.LFB179
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI338-.LCFI337
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI339-.LCFI338
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE198:
-.LSFDE200:
-	.4byte	.LEFDE200-.LASFDE200
-.LASFDE200:
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-	.4byte	.LFB181
-	.4byte	.LFE181-.LFB181
-	.byte	0x4
-	.4byte	.LCFI340-.LFB181
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI341-.LCFI340
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI342-.LCFI341
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE200:
-.LSFDE202:
-	.4byte	.LEFDE202-.LASFDE202
-.LASFDE202:
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-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
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-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI344-.LCFI343
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI345-.LCFI344
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
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-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI347-.LCFI346
-	.byte	0xb
-	.align	2
-.LEFDE202:
-.LSFDE204:
-	.4byte	.LEFDE204-.LASFDE204
-.LASFDE204:
-	.4byte	.Lframe0
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.byte	0x4
-	.4byte	.LCFI348-.LFB236
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI349-.LCFI348
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI350-.LCFI349
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE204:
-.LSFDE206:
-	.4byte	.LEFDE206-.LASFDE206
-.LASFDE206:
-	.4byte	.Lframe0
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.byte	0x4
-	.4byte	.LCFI351-.LFB215
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI352-.LCFI351
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI353-.LCFI352
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE206:
-.LSFDE208:
-	.4byte	.LEFDE208-.LASFDE208
-.LASFDE208:
-	.4byte	.Lframe0
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.byte	0x4
-	.4byte	.LCFI354-.LFB214
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI355-.LCFI354
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI356-.LCFI355
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI357-.LCFI356
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI358-.LCFI357
-	.byte	0xb
-	.align	2
-.LEFDE208:
-.LSFDE210:
-	.4byte	.LEFDE210-.LASFDE210
-.LASFDE210:
-	.4byte	.Lframe0
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.byte	0x4
-	.4byte	.LCFI359-.LFB221
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI360-.LCFI359
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI361-.LCFI360
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE210:
-.LSFDE212:
-	.4byte	.LEFDE212-.LASFDE212
-.LASFDE212:
-	.4byte	.Lframe0
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.byte	0x4
-	.4byte	.LCFI362-.LFB237
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI363-.LCFI362
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI364-.LCFI363
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE212:
-.LSFDE214:
-	.4byte	.LEFDE214-.LASFDE214
-.LASFDE214:
-	.4byte	.Lframe0
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.byte	0x4
-	.4byte	.LCFI365-.LFB219
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI366-.LCFI365
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI367-.LCFI366
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE214:
-.LSFDE216:
-	.4byte	.LEFDE216-.LASFDE216
-.LASFDE216:
-	.4byte	.Lframe0
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.byte	0x4
-	.4byte	.LCFI368-.LFB239
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI369-.LCFI368
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI370-.LCFI369
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE216:
-.LSFDE218:
-	.4byte	.LEFDE218-.LASFDE218
-.LASFDE218:
-	.4byte	.Lframe0
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.byte	0x4
-	.4byte	.LCFI371-.LFB249
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI372-.LCFI371
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI373-.LCFI372
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE218:
-.LSFDE220:
-	.4byte	.LEFDE220-.LASFDE220
-.LASFDE220:
-	.4byte	.Lframe0
-	.4byte	.LFB165
-	.4byte	.LFE165-.LFB165
-	.byte	0x4
-	.4byte	.LCFI374-.LFB165
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI375-.LCFI374
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI376-.LCFI375
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI377-.LCFI376
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.align	2
-.LEFDE220:
-.LSFDE222:
-	.4byte	.LEFDE222-.LASFDE222
-.LASFDE222:
-	.4byte	.Lframe0
-	.4byte	.LFB166
-	.4byte	.LFE166-.LFB166
-	.byte	0x4
-	.4byte	.LCFI378-.LFB166
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI379-.LCFI378
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI380-.LCFI379
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE222:
-.LSFDE224:
-	.4byte	.LEFDE224-.LASFDE224
-.LASFDE224:
-	.4byte	.Lframe0
-	.4byte	.LFB162
-	.4byte	.LFE162-.LFB162
-	.byte	0x4
-	.4byte	.LCFI381-.LFB162
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI382-.LCFI381
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI383-.LCFI382
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE224:
-.LSFDE226:
-	.4byte	.LEFDE226-.LASFDE226
-.LASFDE226:
-	.4byte	.Lframe0
-	.4byte	.LFB163
-	.4byte	.LFE163-.LFB163
-	.byte	0x4
-	.4byte	.LCFI384-.LFB163
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI385-.LCFI384
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI386-.LCFI385
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE226:
-.LSFDE228:
-	.4byte	.LEFDE228-.LASFDE228
-.LASFDE228:
-	.4byte	.Lframe0
-	.4byte	.LFB168
-	.4byte	.LFE168-.LFB168
-	.byte	0x4
-	.4byte	.LCFI387-.LFB168
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI388-.LCFI387
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI389-.LCFI388
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI390-.LCFI389
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI391-.LCFI390
-	.byte	0xb
-	.align	2
-.LEFDE228:
-.LSFDE230:
-	.4byte	.LEFDE230-.LASFDE230
-.LASFDE230:
-	.4byte	.Lframe0
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.byte	0x4
-	.4byte	.LCFI392-.LFB258
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI393-.LCFI392
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI394-.LCFI393
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE230:
-.LSFDE232:
-	.4byte	.LEFDE232-.LASFDE232
-.LASFDE232:
-	.4byte	.Lframe0
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.byte	0x4
-	.4byte	.LCFI395-.LFB261
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI396-.LCFI395
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI397-.LCFI396
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE232:
-.LSFDE234:
-	.4byte	.LEFDE234-.LASFDE234
-.LASFDE234:
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-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.byte	0x4
-	.4byte	.LCFI398-.LFB233
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI399-.LCFI398
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI400-.LCFI399
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE234:
-.LSFDE236:
-	.4byte	.LEFDE236-.LASFDE236
-.LASFDE236:
-	.4byte	.Lframe0
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.byte	0x4
-	.4byte	.LCFI401-.LFB263
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI402-.LCFI401
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI403-.LCFI402
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE236:
-.LSFDE238:
-	.4byte	.LEFDE238-.LASFDE238
-.LASFDE238:
-	.4byte	.Lframe0
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.byte	0x4
-	.4byte	.LCFI404-.LFB262
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI405-.LCFI404
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI406-.LCFI405
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE238:
-.LSFDE240:
-	.4byte	.LEFDE240-.LASFDE240
-.LASFDE240:
-	.4byte	.Lframe0
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.byte	0x4
-	.4byte	.LCFI407-.LFB269
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI408-.LCFI407
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI409-.LCFI408
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI410-.LCFI409
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI411-.LCFI410
-	.byte	0xb
-	.align	2
-.LEFDE240:
-.LSFDE242:
-	.4byte	.LEFDE242-.LASFDE242
-.LASFDE242:
-	.4byte	.Lframe0
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.byte	0x4
-	.4byte	.LCFI412-.LFB270
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI413-.LCFI412
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI414-.LCFI413
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE242:
-.LSFDE244:
-	.4byte	.LEFDE244-.LASFDE244
-.LASFDE244:
-	.4byte	.Lframe0
-	.4byte	.LFB164
-	.4byte	.LFE164-.LFB164
-	.byte	0x4
-	.4byte	.LCFI415-.LFB164
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI416-.LCFI415
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI417-.LCFI416
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI418-.LCFI417
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI419-.LCFI418
-	.byte	0xb
-	.align	2
-.LEFDE244:
-.LSFDE246:
-	.4byte	.LEFDE246-.LASFDE246
-.LASFDE246:
-	.4byte	.Lframe0
-	.4byte	.LFB169
-	.4byte	.LFE169-.LFB169
-	.byte	0x4
-	.4byte	.LCFI420-.LFB169
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI421-.LCFI420
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI422-.LCFI421
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE246:
-.LSFDE248:
-	.4byte	.LEFDE248-.LASFDE248
-.LASFDE248:
-	.4byte	.Lframe0
-	.4byte	.LFB167
-	.4byte	.LFE167-.LFB167
-	.byte	0x4
-	.4byte	.LCFI423-.LFB167
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI424-.LCFI423
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI425-.LCFI424
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.byte	0x4
-	.4byte	.LCFI426-.LCFI425
-	.byte	0xa
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0x2c
-	.byte	0x4
-	.4byte	.LCFI427-.LCFI426
-	.byte	0xb
-	.align	2
-.LEFDE248:
-.LSFDE250:
-	.4byte	.LEFDE250-.LASFDE250
-.LASFDE250:
-	.4byte	.Lframe0
-	.4byte	.LFB170
-	.4byte	.LFE170-.LFB170
-	.byte	0x4
-	.4byte	.LCFI428-.LFB170
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI429-.LCFI428
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI430-.LCFI429
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE250:
-.LSFDE252:
-	.4byte	.LEFDE252-.LASFDE252
-.LASFDE252:
-	.4byte	.Lframe0
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.byte	0x4
-	.4byte	.LCFI431-.LFB224
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI432-.LCFI431
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI433-.LCFI432
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE252:
-.LSFDE254:
-	.4byte	.LEFDE254-.LASFDE254
-.LASFDE254:
-	.4byte	.Lframe0
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.byte	0x4
-	.4byte	.LCFI434-.LFB242
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI435-.LCFI434
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI436-.LCFI435
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE254:
-.LSFDE256:
-	.4byte	.LEFDE256-.LASFDE256
-.LASFDE256:
-	.4byte	.Lframe0
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
-	.byte	0x4
-	.4byte	.LCFI437-.LFB160
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI438-.LCFI437
-	.byte	0x84
-	.uleb128 0xb
-	.byte	0x85
-	.uleb128 0xa
-	.byte	0x86
-	.uleb128 0x9
-	.byte	0x87
-	.uleb128 0x8
-	.byte	0x88
-	.uleb128 0x7
-	.byte	0x89
-	.uleb128 0x6
-	.byte	0x8a
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI439-.LCFI438
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE256:
-.LSFDE258:
-	.4byte	.LEFDE258-.LASFDE258
-.LASFDE258:
-	.4byte	.Lframe0
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
-	.byte	0x4
-	.4byte	.LCFI440-.LFB161
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI441-.LCFI440
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI442-.LCFI441
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE258:
-.LSFDE260:
-	.4byte	.LEFDE260-.LASFDE260
-.LASFDE260:
-	.4byte	.Lframe0
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.byte	0x4
-	.4byte	.LCFI443-.LFB279
-	.byte	0xd
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	.LCFI444-.LCFI443
-	.byte	0x8b
-	.uleb128 0x4
-	.byte	0x8d
-	.uleb128 0x3
-	.byte	0x8e
-	.uleb128 0x2
-	.byte	0x4
-	.4byte	.LCFI445-.LCFI444
-	.byte	0xc
-	.uleb128 0xb
-	.uleb128 0x4
-	.align	2
-.LEFDE260:
-	.text
-.Letext0:
-	.file 6 "include/asm-generic/int-ll64.h"
-	.file 7 "./include/uapi/asm-generic/posix_types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "./arch/arm/include/asm/hwcap.h"
-	.file 10 "include/linux/init.h"
-	.file 11 "include/linux/printk.h"
-	.file 12 "include/linux/kernel.h"
-	.file 13 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 14 "drivers/rkflash/rksftl/flash_com.h"
-	.file 15 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 16 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 17 "include/linux/string.h"
-	.file 18 "./arch/arm/include/asm/string.h"
-	.file 19 "drivers/rkflash/rksftl/typedef.h"
-	.file 20 "<built-in>"
-	.section	.debug_info,"",%progbits
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-	.2byte	0x4
-	.4byte	.Ldebug_abbrev0
-	.byte	0x4
-	.uleb128 0x1
-	.4byte	.LASF663
-	.byte	0x1
-	.4byte	.LASF664
-	.4byte	.LASF665
-	.4byte	.Ltext0
-	.4byte	.Letext0-.Ltext0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF0
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF1
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF2
-	.uleb128 0x3
-	.4byte	0x33
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF3
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x6
-	.4byte	.LASF4
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF5
-	.uleb128 0x2
-	.byte	0x2
-	.byte	0x5
-	.4byte	.LASF6
-	.uleb128 0x2
-	.byte	0x2
-	.byte	0x7
-	.4byte	.LASF7
-	.uleb128 0x4
-	.byte	0x4
-	.byte	0x5
-	.ascii	"int\000"
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF8
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF9
-	.uleb128 0x5
-	.ascii	"u8\000"
-	.byte	0x6
-	.byte	0x10
-	.4byte	0x4d
-	.uleb128 0x5
-	.ascii	"u16\000"
-	.byte	0x6
-	.byte	0x13
-	.4byte	0x5b
-	.uleb128 0x5
-	.ascii	"s32\000"
-	.byte	0x6
-	.byte	0x15
-	.4byte	0x62
-	.uleb128 0x5
-	.ascii	"u32\000"
-	.byte	0x6
-	.byte	0x16
-	.4byte	0x3f
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x5
-	.4byte	.LASF10
-	.uleb128 0x6
-	.4byte	.LASF11
-	.byte	0x7
-	.byte	0x43
-	.4byte	0x3f
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x33
-	.uleb128 0x6
-	.4byte	.LASF12
-	.byte	0x8
-	.byte	0x1d
-	.4byte	0xc5
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF13
-	.uleb128 0x6
-	.4byte	.LASF14
-	.byte	0x8
-	.byte	0x36
-	.4byte	0xa9
-	.uleb128 0x8
-	.4byte	.LASF15
-	.byte	0x9
-	.byte	0xd
-	.4byte	0x3f
-	.uleb128 0x8
-	.4byte	.LASF16
-	.byte	0x9
-	.byte	0xd
-	.4byte	0x3f
-	.uleb128 0x6
-	.4byte	.LASF17
-	.byte	0xa
-	.byte	0x83
-	.4byte	0xf8
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xfe
-	.uleb128 0x9
-	.4byte	0x62
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x109
-	.uleb128 0xa
-	.uleb128 0xb
-	.4byte	0xed
-	.4byte	0x115
-	.uleb128 0xc
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF18
-	.byte	0xa
-	.byte	0x86
-	.4byte	0x10a
-	.uleb128 0x8
-	.4byte	.LASF19
-	.byte	0xa
-	.byte	0x86
-	.4byte	0x10a
-	.uleb128 0x8
-	.4byte	.LASF20
-	.byte	0xa
-	.byte	0x87
-	.4byte	0x10a
-	.uleb128 0x8
-	.4byte	.LASF21
-	.byte	0xa
-	.byte	0x87
-	.4byte	0x10a
-	.uleb128 0xb
-	.4byte	0x33
-	.4byte	0x14c
-	.uleb128 0xc
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF22
-	.byte	0xa
-	.byte	0x8e
-	.4byte	0x141
-	.uleb128 0x8
-	.4byte	.LASF23
-	.byte	0xa
-	.byte	0x8f
-	.4byte	0xb4
-	.uleb128 0x8
-	.4byte	.LASF24
-	.byte	0xa
-	.byte	0x90
-	.4byte	0x3f
-	.uleb128 0x8
-	.4byte	.LASF25
-	.byte	0xa
-	.byte	0x9c
-	.4byte	0x103
-	.uleb128 0x8
-	.4byte	.LASF26
-	.byte	0xa
-	.byte	0x9e
-	.4byte	0xba
-	.uleb128 0xb
-	.4byte	0x3a
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-	.uleb128 0xc
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x183
-	.uleb128 0x8
-	.4byte	.LASF27
-	.byte	0xb
-	.byte	0xa
-	.4byte	0x18e
-	.uleb128 0x8
-	.4byte	.LASF28
-	.byte	0xb
-	.byte	0xb
-	.4byte	0x18e
-	.uleb128 0xb
-	.4byte	0x62
-	.4byte	0x1b4
-	.uleb128 0xc
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF29
-	.byte	0xb
-	.byte	0x2e
-	.4byte	0x1a9
-	.uleb128 0x8
-	.4byte	.LASF30
-	.byte	0xb
-	.byte	0x9f
-	.4byte	0x62
-	.uleb128 0x8
-	.4byte	.LASF31
-	.byte	0xb
-	.byte	0xa0
-	.4byte	0x62
-	.uleb128 0x8
-	.4byte	.LASF32
-	.byte	0xb
-	.byte	0xa1
-	.4byte	0x62
-	.uleb128 0xd
-	.4byte	.LASF34
-	.uleb128 0x3
-	.4byte	0x1e0
-	.uleb128 0xe
-	.4byte	.LASF33
-	.byte	0xb
-	.2byte	0x1a4
-	.4byte	0x1e5
-	.uleb128 0xd
-	.4byte	.LASF35
-	.uleb128 0xe
-	.4byte	.LASF36
-	.byte	0xc
-	.2byte	0x104
-	.4byte	0x1f6
-	.uleb128 0xf
-	.4byte	0xa2
-	.4byte	0x216
-	.uleb128 0x10
-	.4byte	0x62
-	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF37
-	.byte	0xc
-	.2byte	0x105
-	.4byte	0x222
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x207
-	.uleb128 0xe
-	.4byte	.LASF38
-	.byte	0xc
-	.2byte	0x1bf
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF39
-	.byte	0xc
-	.2byte	0x1c0
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF40
-	.byte	0xc
-	.2byte	0x1c1
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF41
-	.byte	0xc
-	.2byte	0x1c2
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF42
-	.byte	0xc
-	.2byte	0x1c3
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-	.uleb128 0xe
-	.4byte	.LASF43
-	.byte	0xc
-	.2byte	0x1c4
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF44
-	.byte	0xc
-	.2byte	0x1c5
-	.4byte	0x62
-	.uleb128 0xe
-	.4byte	.LASF45
-	.byte	0xc
-	.2byte	0x1c7
-	.4byte	0xba
-	.uleb128 0xe
-	.4byte	.LASF46
-	.byte	0xc
-	.2byte	0x1da
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-	.uleb128 0xe
-	.4byte	.LASF47
-	.byte	0xc
-	.2byte	0x1dc
-	.4byte	0xba
-	.uleb128 0x11
-	.4byte	.LASF666
-	.byte	0x4
-	.4byte	0x3f
-	.byte	0xc
-	.2byte	0x1df
-	.4byte	0x2d0
-	.uleb128 0x12
-	.4byte	.LASF48
-	.byte	0
-	.uleb128 0x12
-	.4byte	.LASF49
-	.byte	0x1
-	.uleb128 0x12
-	.4byte	.LASF50
-	.byte	0x2
-	.uleb128 0x12
-	.4byte	.LASF51
-	.byte	0x3
-	.uleb128 0x12
-	.4byte	.LASF52
-	.byte	0x4
-	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF53
-	.byte	0xc
-	.2byte	0x1e5
-	.4byte	0x2a0
-	.uleb128 0xe
-	.4byte	.LASF54
-	.byte	0xc
-	.2byte	0x1f8
-	.4byte	0x18e
-	.uleb128 0xe
-	.4byte	.LASF55
-	.byte	0xc
-	.2byte	0x203
-	.4byte	0x18e
-	.uleb128 0x6
-	.4byte	.LASF56
-	.byte	0xd
-	.byte	0x9
-	.4byte	0x4d
-	.uleb128 0x6
-	.4byte	.LASF57
-	.byte	0xd
-	.byte	0xa
-	.4byte	0x5b
-	.uleb128 0x6
-	.4byte	.LASF58
-	.byte	0xd
-	.byte	0xb
-	.4byte	0x3f
-	.uleb128 0x6
-	.4byte	.LASF59
-	.byte	0xd
-	.byte	0xc
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-	.uleb128 0x6
-	.4byte	.LASF60
-	.byte	0xd
-	.byte	0xd
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-	.uleb128 0x13
-	.4byte	.LASF65
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-	.4byte	0x374
-	.uleb128 0x14
-	.4byte	.LASF61
-	.byte	0xe
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-	.4byte	0x97
-	.byte	0
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-	.4byte	.LASF62
-	.byte	0xe
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-	.4byte	.LASF63
-	.byte	0xe
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-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF64
-	.byte	0xe
-	.byte	0x26
-	.4byte	0x374
-	.byte	0xc
-	.uleb128 0x15
-	.ascii	"lpa\000"
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-	.byte	0
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-	.byte	0x4
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-	.byte	0xe
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-	.byte	0
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-	.4byte	.LASF69
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-	.byte	0xe
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-	.4byte	0x81
-	.byte	0xa
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-	.uleb128 0x14
-	.4byte	.LASF76
-	.byte	0xe
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-	.4byte	0x81
-	.byte	0x12
-	.uleb128 0x14
-	.4byte	.LASF77
-	.byte	0xe
-	.byte	0x35
-	.4byte	0x81
-	.byte	0x14
-	.uleb128 0x14
-	.4byte	.LASF78
-	.byte	0xe
-	.byte	0x36
-	.4byte	0x77
-	.byte	0x16
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x37a
-	.uleb128 0x13
-	.4byte	.LASF79
-	.byte	0x10
-	.byte	0xe
-	.byte	0x39
-	.4byte	0x459
-	.uleb128 0x14
-	.4byte	.LASF80
-	.byte	0xe
-	.byte	0x3a
-	.4byte	0x473
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF81
-	.byte	0xe
-	.byte	0x3b
-	.4byte	0x48d
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF82
-	.byte	0xe
-	.byte	0x3c
-	.4byte	0x4b1
-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF83
-	.byte	0xe
-	.byte	0x3d
-	.4byte	0x4b1
-	.byte	0xc
-	.byte	0
-	.uleb128 0xf
-	.4byte	0x8c
-	.4byte	0x46d
-	.uleb128 0x10
-	.4byte	0x46d
-	.uleb128 0x10
-	.4byte	0x97
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x81
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x459
-	.uleb128 0xf
-	.4byte	0x97
-	.4byte	0x48d
-	.uleb128 0x10
-	.4byte	0x77
-	.uleb128 0x10
-	.4byte	0x97
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x479
-	.uleb128 0xf
-	.4byte	0x97
-	.4byte	0x4b1
-	.uleb128 0x10
-	.4byte	0x77
-	.uleb128 0x10
-	.4byte	0x97
-	.uleb128 0x10
-	.4byte	0x374
-	.uleb128 0x10
-	.4byte	0x374
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x493
-	.uleb128 0x13
-	.4byte	.LASF84
-	.byte	0x3c
-	.byte	0xf
-	.byte	0x2b
-	.4byte	0x517
-	.uleb128 0x15
-	.ascii	"id\000"
-	.byte	0xf
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-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF85
-	.byte	0xf
-	.byte	0x2e
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF86
-	.byte	0xf
-	.byte	0x2f
-	.4byte	0x2ff
-	.byte	0x4
-	.uleb128 0x15
-	.ascii	"cnt\000"
-	.byte	0xf
-	.byte	0x30
-	.4byte	0x2ff
-	.byte	0x6
-	.uleb128 0x14
-	.4byte	.LASF87
-	.byte	0xf
-	.byte	0x31
-	.4byte	0x30a
-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF88
-	.byte	0xf
-	.byte	0x32
-	.4byte	0x517
-	.byte	0xc
-	.uleb128 0x14
-	.4byte	.LASF89
-	.byte	0xf
-	.byte	0x33
-	.4byte	0x527
-	.byte	0x1c
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x2ff
-	.4byte	0x527
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x537
-	.4byte	0x537
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x7
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x30a
-	.uleb128 0x13
-	.4byte	.LASF90
-	.byte	0xc
-	.byte	0xf
-	.byte	0x3f
-	.4byte	0x585
-	.uleb128 0x15
-	.ascii	"id\000"
-	.byte	0xf
-	.byte	0x41
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF85
-	.byte	0xf
-	.byte	0x42
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF86
-	.byte	0xf
-	.byte	0x43
-	.4byte	0x2ff
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF91
-	.byte	0xf
-	.byte	0x44
-	.4byte	0x2ff
-	.byte	0x6
-	.uleb128 0x14
-	.4byte	.LASF87
-	.byte	0xf
-	.byte	0x45
-	.4byte	0x30a
-	.byte	0x8
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF92
-	.byte	0x28
-	.byte	0xf
-	.byte	0x48
-	.4byte	0x62e
-	.uleb128 0x14
-	.4byte	.LASF93
-	.byte	0xf
-	.byte	0x4a
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF85
-	.byte	0xf
-	.byte	0x4b
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF94
-	.byte	0xf
-	.byte	0x4d
-	.4byte	0x2ff
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF95
-	.byte	0xf
-	.byte	0x4e
-	.4byte	0x2ff
-	.byte	0x6
-	.uleb128 0x14
-	.4byte	.LASF96
-	.byte	0xf
-	.byte	0x50
-	.4byte	0x2ff
-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF97
-	.byte	0xf
-	.byte	0x51
-	.4byte	0x2ff
-	.byte	0xa
-	.uleb128 0x14
-	.4byte	.LASF98
-	.byte	0xf
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-	.4byte	0x62e
-	.byte	0xc
-	.uleb128 0x14
-	.4byte	.LASF99
-	.byte	0xf
-	.byte	0x54
-	.4byte	0x537
-	.byte	0x10
-	.uleb128 0x14
-	.4byte	.LASF100
-	.byte	0xf
-	.byte	0x55
-	.4byte	0x62e
-	.byte	0x14
-	.uleb128 0x14
-	.4byte	.LASF101
-	.byte	0xf
-	.byte	0x56
-	.4byte	0x537
-	.byte	0x18
-	.uleb128 0x14
-	.4byte	.LASF87
-	.byte	0xf
-	.byte	0x58
-	.4byte	0x30a
-	.byte	0x1c
-	.uleb128 0x14
-	.4byte	.LASF102
-	.byte	0xf
-	.byte	0x59
-	.4byte	0x30a
-	.byte	0x20
-	.uleb128 0x14
-	.4byte	.LASF103
-	.byte	0xf
-	.byte	0x5a
-	.4byte	0x30a
-	.byte	0x24
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x2ff
-	.uleb128 0x13
-	.4byte	.LASF104
-	.byte	0xc
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-	.uleb128 0x14
-	.4byte	.LASF105
-	.byte	0xf
-	.byte	0x5f
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-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF106
-	.byte	0xf
-	.byte	0x60
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x15
-	.ascii	"hit\000"
-	.byte	0xf
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-	.4byte	0x30a
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF107
-	.byte	0xf
-	.byte	0x62
-	.4byte	0x537
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-	.4byte	.LASF108
-	.byte	0x24
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-	.uleb128 0x14
-	.4byte	.LASF94
-	.byte	0xf
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-	.uleb128 0x14
-	.4byte	.LASF109
-	.byte	0xf
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-	.uleb128 0x14
-	.4byte	.LASF87
-	.byte	0xf
-	.byte	0x69
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-	.uleb128 0x15
-	.ascii	"len\000"
-	.byte	0xf
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-	.byte	0xc
-	.uleb128 0x14
-	.4byte	.LASF110
-	.byte	0xf
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-	.byte	0x10
-	.uleb128 0x14
-	.4byte	.LASF111
-	.byte	0xf
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-	.4byte	0x30a
-	.byte	0x14
-	.uleb128 0x14
-	.4byte	.LASF112
-	.byte	0xf
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-	.4byte	0x6de
-	.byte	0x18
-	.uleb128 0x15
-	.ascii	"tbl\000"
-	.byte	0xf
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-	.4byte	0x6ee
-	.byte	0x20
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x30a
-	.4byte	0x6ee
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x1
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-	.uleb128 0xb
-	.4byte	0x2ff
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-	.uleb128 0x16
-	.4byte	0x2c
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-	.uleb128 0x13
-	.4byte	.LASF113
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-	.uleb128 0x14
-	.4byte	.LASF94
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-	.uleb128 0x15
-	.ascii	"id\000"
-	.byte	0xf
-	.byte	0x75
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-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF87
-	.byte	0xf
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-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF86
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-	.4byte	.LASF114
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-	.4byte	.LASF115
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-	.byte	0x79
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-	.uleb128 0x14
-	.4byte	.LASF112
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-	.byte	0x7a
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-	.4byte	0x2f4
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-	.uleb128 0x16
-	.4byte	0x2c
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-	.uleb128 0x13
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-	.uleb128 0x14
-	.4byte	.LASF94
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-	.uleb128 0x15
-	.ascii	"id\000"
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-	.ascii	"lpa\000"
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-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF117
-	.byte	0xf
-	.byte	0x83
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-	.byte	0xc
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-	.uleb128 0x13
-	.4byte	.LASF118
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-	.4byte	.LASF94
-	.byte	0xf
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-	.ascii	"id\000"
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-	.4byte	.LASF87
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-	.uleb128 0x14
-	.4byte	.LASF119
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-	.uleb128 0x14
-	.4byte	.LASF112
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-	.ascii	"id\000"
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-	.uleb128 0x15
-	.ascii	"ver\000"
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-	.4byte	.LASF127
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-	.4byte	.LASF128
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-	.4byte	.LASF131
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-	.uleb128 0x14
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-	.uleb128 0x15
-	.ascii	"ver\000"
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-	.uleb128 0x14
-	.4byte	.LASF137
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-	.4byte	.LASF134
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-	.uleb128 0x14
-	.4byte	.LASF150
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-	.byte	0xd0
-	.4byte	0x30a
-	.byte	0x34
-	.uleb128 0x14
-	.4byte	.LASF151
-	.byte	0xf
-	.byte	0xd2
-	.4byte	0x30a
-	.byte	0x38
-	.uleb128 0x14
-	.4byte	.LASF152
-	.byte	0xf
-	.byte	0xd3
-	.4byte	0x30a
-	.byte	0x3c
-	.uleb128 0x14
-	.4byte	.LASF153
-	.byte	0xf
-	.byte	0xd4
-	.4byte	0x30a
-	.byte	0x40
-	.uleb128 0x14
-	.4byte	.LASF154
-	.byte	0xf
-	.byte	0xd5
-	.4byte	0x30a
-	.byte	0x44
-	.uleb128 0x14
-	.4byte	.LASF155
-	.byte	0xf
-	.byte	0xd7
-	.4byte	0x30a
-	.byte	0x48
-	.uleb128 0x14
-	.4byte	.LASF156
-	.byte	0xf
-	.byte	0xd8
-	.4byte	0x30a
-	.byte	0x4c
-	.uleb128 0x14
-	.4byte	.LASF157
-	.byte	0xf
-	.byte	0xd9
-	.4byte	0x30a
-	.byte	0x50
-	.uleb128 0x14
-	.4byte	.LASF158
-	.byte	0xf
-	.byte	0xda
-	.4byte	0x30a
-	.byte	0x54
-	.uleb128 0x14
-	.4byte	.LASF159
-	.byte	0xf
-	.byte	0xdc
-	.4byte	0x30a
-	.byte	0x58
-	.uleb128 0x14
-	.4byte	.LASF160
-	.byte	0xf
-	.byte	0xdd
-	.4byte	0x30a
-	.byte	0x5c
-	.uleb128 0x14
-	.4byte	.LASF161
-	.byte	0xf
-	.byte	0xde
-	.4byte	0x30a
-	.byte	0x60
-	.uleb128 0x14
-	.4byte	.LASF112
-	.byte	0xf
-	.byte	0xe0
-	.4byte	0xa99
-	.byte	0x64
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x30a
-	.4byte	0xaa9
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x66
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF162
-	.byte	0x8
-	.byte	0xf
-	.byte	0xe4
-	.4byte	0xada
-	.uleb128 0x14
-	.4byte	.LASF163
-	.byte	0xf
-	.byte	0xe6
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF164
-	.byte	0xf
-	.byte	0xe7
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF165
-	.byte	0xf
-	.byte	0xe8
-	.4byte	0x2ff
-	.byte	0x4
-	.byte	0
-	.uleb128 0x17
-	.4byte	.LASF166
-	.2byte	0x808
-	.byte	0xf
-	.byte	0xeb
-	.4byte	0xb24
-	.uleb128 0x15
-	.ascii	"max\000"
-	.byte	0xf
-	.byte	0xed
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF167
-	.byte	0xf
-	.byte	0xee
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF168
-	.byte	0xf
-	.byte	0xef
-	.4byte	0x2ff
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF114
-	.byte	0xf
-	.byte	0xf0
-	.4byte	0x2ff
-	.byte	0x6
-	.uleb128 0x15
-	.ascii	"arr\000"
-	.byte	0xf
-	.byte	0xf1
-	.4byte	0xb24
-	.byte	0x8
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x2ff
-	.4byte	0xb35
-	.uleb128 0x18
-	.4byte	0x2c
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF169
-	.byte	0x30
-	.byte	0xf
-	.byte	0xf5
-	.4byte	0xbc7
-	.uleb128 0x15
-	.ascii	"id\000"
-	.byte	0xf
-	.byte	0xf7
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x14
-	.4byte	.LASF170
-	.byte	0xf
-	.byte	0xf8
-	.4byte	0x2ff
-	.byte	0x2
-	.uleb128 0x14
-	.4byte	.LASF171
-	.byte	0xf
-	.byte	0xf9
-	.4byte	0x2ff
-	.byte	0x4
-	.uleb128 0x14
-	.4byte	.LASF172
-	.byte	0xf
-	.byte	0xfa
-	.4byte	0x2f4
-	.byte	0x6
-	.uleb128 0x14
-	.4byte	.LASF173
-	.byte	0xf
-	.byte	0xfb
-	.4byte	0x2f4
-	.byte	0x7
-	.uleb128 0x14
-	.4byte	.LASF174
-	.byte	0xf
-	.byte	0xfc
-	.4byte	0x2f4
-	.byte	0x8
-	.uleb128 0x14
-	.4byte	.LASF175
-	.byte	0xf
-	.byte	0xfd
-	.4byte	0x2f4
-	.byte	0x9
-	.uleb128 0x14
-	.4byte	.LASF176
-	.byte	0xf
-	.byte	0xfe
-	.4byte	0x2f4
-	.byte	0xa
-	.uleb128 0x14
-	.4byte	.LASF177
-	.byte	0xf
-	.byte	0xff
-	.4byte	0x2f4
-	.byte	0xb
-	.uleb128 0x19
-	.4byte	.LASF87
-	.byte	0xf
-	.2byte	0x100
-	.4byte	0x30a
-	.byte	0xc
-	.uleb128 0x19
-	.4byte	.LASF178
-	.byte	0xf
-	.2byte	0x101
-	.4byte	0xbc7
-	.byte	0x10
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x2ff
-	.4byte	0xbd7
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xf
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF179
-	.byte	0xc
-	.byte	0xf
-	.2byte	0x105
-	.4byte	0xc0c
-	.uleb128 0x19
-	.4byte	.LASF180
-	.byte	0xf
-	.2byte	0x107
-	.4byte	0x30a
-	.byte	0
-	.uleb128 0x19
-	.4byte	.LASF181
-	.byte	0xf
-	.2byte	0x108
-	.4byte	0x30a
-	.byte	0x4
-	.uleb128 0x1b
-	.ascii	"lpa\000"
-	.byte	0xf
-	.2byte	0x109
-	.4byte	0x30a
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF182
-	.byte	0xc
-	.byte	0xf
-	.2byte	0x10c
-	.4byte	0xc41
-	.uleb128 0x19
-	.4byte	.LASF63
-	.byte	0xf
-	.2byte	0x10e
-	.4byte	0x537
-	.byte	0
-	.uleb128 0x19
-	.4byte	.LASF64
-	.byte	0xf
-	.2byte	0x10f
-	.4byte	0x537
-	.byte	0x4
-	.uleb128 0x19
-	.4byte	.LASF183
-	.byte	0xf
-	.2byte	0x110
-	.4byte	0x30a
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF184
-	.byte	0x10
-	.byte	0x12
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x1c
-	.4byte	.LASF185
-	.byte	0x10
-	.byte	0x13
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x1c
-	.4byte	.LASF186
-	.byte	0x10
-	.byte	0x14
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x1c
-	.4byte	.LASF187
-	.byte	0x10
-	.byte	0x15
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x1c
-	.4byte	.LASF188
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x1c
-	.4byte	.LASF189
-	.byte	0x10
-	.byte	0x17
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x1c
-	.4byte	.LASF190
-	.byte	0x10
-	.byte	0x18
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x1c
-	.4byte	.LASF191
-	.byte	0x10
-	.byte	0x19
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x1c
-	.4byte	.LASF192
-	.byte	0x10
-	.byte	0x1a
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x1c
-	.4byte	.LASF193
-	.byte	0x10
-	.byte	0x1c
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x1c
-	.4byte	.LASF194
-	.byte	0x10
-	.byte	0x1d
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x1c
-	.4byte	.LASF195
-	.byte	0x10
-	.byte	0x1e
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x1c
-	.4byte	.LASF196
-	.byte	0x10
-	.byte	0x1f
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x1c
-	.4byte	.LASF197
-	.byte	0x10
-	.byte	0x20
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x1c
-	.4byte	.LASF198
-	.byte	0x10
-	.byte	0x24
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x1c
-	.4byte	.LASF199
-	.byte	0x10
-	.byte	0x25
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x1c
-	.4byte	.LASF200
-	.byte	0x10
-	.byte	0x26
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x1c
-	.4byte	.LASF201
-	.byte	0x10
-	.byte	0x27
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x1c
-	.4byte	.LASF202
-	.byte	0x10
-	.byte	0x29
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x1c
-	.4byte	.LASF203
-	.byte	0x10
-	.byte	0x2a
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x1c
-	.4byte	.LASF204
-	.byte	0x10
-	.byte	0x2c
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x1c
-	.4byte	.LASF205
-	.byte	0x10
-	.byte	0x2e
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x1c
-	.4byte	.LASF206
-	.byte	0x10
-	.byte	0x2f
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x1c
-	.4byte	.LASF207
-	.byte	0x10
-	.byte	0x30
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x1c
-	.4byte	.LASF208
-	.byte	0x10
-	.byte	0x31
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x1c
-	.4byte	.LASF209
-	.byte	0x10
-	.byte	0x32
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x1c
-	.4byte	.LASF210
-	.byte	0x10
-	.byte	0x33
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x1c
-	.4byte	.LASF211
-	.byte	0x10
-	.byte	0x34
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x1c
-	.4byte	.LASF212
-	.byte	0x10
-	.byte	0x35
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x1c
-	.4byte	.LASF213
-	.byte	0x10
-	.byte	0x36
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x1c
-	.4byte	.LASF214
-	.byte	0x10
-	.byte	0x37
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x1c
-	.4byte	.LASF215
-	.byte	0x10
-	.byte	0x38
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x1c
-	.4byte	.LASF216
-	.byte	0x10
-	.byte	0x3a
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x1c
-	.4byte	.LASF217
-	.byte	0x10
-	.byte	0x3b
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x1c
-	.4byte	.LASF218
-	.byte	0x10
-	.byte	0x3c
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x1c
-	.4byte	.LASF219
-	.byte	0x10
-	.byte	0x3d
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x1c
-	.4byte	.LASF220
-	.byte	0x10
-	.byte	0x3e
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x1c
-	.4byte	.LASF221
-	.byte	0x10
-	.byte	0x3f
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x1c
-	.4byte	.LASF222
-	.byte	0x10
-	.byte	0x41
-	.4byte	0x4b7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x1c
-	.4byte	.LASF223
-	.byte	0x10
-	.byte	0x42
-	.4byte	0x53d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x1c
-	.4byte	.LASF224
-	.byte	0x10
-	.byte	0x43
-	.4byte	0xada
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x1c
-	.4byte	.LASF225
-	.byte	0x10
-	.byte	0x44
-	.4byte	0x585
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x1c
-	.4byte	.LASF226
-	.byte	0x10
-	.byte	0x45
-	.4byte	0x585
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x1c
-	.4byte	.LASF227
-	.byte	0x10
-	.byte	0x46
-	.4byte	0x32b
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x1c
-	.4byte	.LASF228
-	.byte	0x10
-	.byte	0x47
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x32b
-	.uleb128 0x1c
-	.4byte	.LASF229
-	.byte	0x10
-	.byte	0x48
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x1c
-	.4byte	.LASF230
-	.byte	0x10
-	.byte	0x49
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x1c
-	.4byte	.LASF231
-	.byte	0x10
-	.byte	0x4a
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x1c
-	.4byte	.LASF232
-	.byte	0x10
-	.byte	0x4b
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0x1c
-	.4byte	.LASF233
-	.byte	0x10
-	.byte	0x4d
-	.4byte	0xf3e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
-	.uleb128 0xb
-	.4byte	0x2f4
-	.4byte	0xfa9
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF234
-	.byte	0x10
-	.byte	0x4f
-	.4byte	0xf99
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x1c
-	.4byte	.LASF235
-	.byte	0x10
-	.byte	0x51
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x1c
-	.4byte	.LASF236
-	.byte	0x10
-	.byte	0x52
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x1c
-	.4byte	.LASF237
-	.byte	0x10
-	.byte	0x53
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x1c
-	.4byte	.LASF238
-	.byte	0x10
-	.byte	0x54
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x1c
-	.4byte	.LASF239
-	.byte	0x10
-	.byte	0x55
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x1c
-	.4byte	.LASF240
-	.byte	0x10
-	.byte	0x56
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x1c
-	.4byte	.LASF241
-	.byte	0x10
-	.byte	0x57
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x1c
-	.4byte	.LASF242
-	.byte	0x10
-	.byte	0x58
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x1c
-	.4byte	.LASF243
-	.byte	0x10
-	.byte	0x59
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x1c
-	.4byte	.LASF244
-	.byte	0x10
-	.byte	0x5a
-	.4byte	0x1064
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xc0c
-	.uleb128 0x1c
-	.4byte	.LASF245
-	.byte	0x10
-	.byte	0x5b
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x1c
-	.4byte	.LASF246
-	.byte	0x10
-	.byte	0x5c
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x1c
-	.4byte	.LASF247
-	.byte	0x10
-	.byte	0x5d
-	.4byte	0x109d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x671
-	.uleb128 0x1c
-	.4byte	.LASF248
-	.byte	0x10
-	.byte	0x5e
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x1c
-	.4byte	.LASF249
-	.byte	0x10
-	.byte	0x5f
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x1c
-	.4byte	.LASF250
-	.byte	0x10
-	.byte	0x61
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x1c
-	.4byte	.LASF251
-	.byte	0x10
-	.byte	0x62
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x1c
-	.4byte	.LASF252
-	.byte	0x10
-	.byte	0x63
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x1c
-	.4byte	.LASF253
-	.byte	0x10
-	.byte	0x64
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x1c
-	.4byte	.LASF254
-	.byte	0x10
-	.byte	0x65
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x1c
-	.4byte	.LASF255
-	.byte	0x10
-	.byte	0x67
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x1c
-	.4byte	.LASF256
-	.byte	0x10
-	.byte	0x68
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x1c
-	.4byte	.LASF257
-	.byte	0x10
-	.byte	0x69
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x1c
-	.4byte	.LASF258
-	.byte	0x10
-	.byte	0x6a
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x1c
-	.4byte	.LASF259
-	.byte	0x10
-	.byte	0x6b
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x1c
-	.4byte	.LASF260
-	.byte	0x10
-	.byte	0x6d
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x1c
-	.4byte	.LASF261
-	.byte	0x10
-	.byte	0x6e
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x1c
-	.4byte	.LASF262
-	.byte	0x10
-	.byte	0x6f
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x1c
-	.4byte	.LASF263
-	.byte	0x10
-	.byte	0x70
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x1c
-	.4byte	.LASF264
-	.byte	0x10
-	.byte	0x71
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x1c
-	.4byte	.LASF265
-	.byte	0x10
-	.byte	0x73
-	.4byte	0x11d5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x634
-	.uleb128 0x1c
-	.4byte	.LASF266
-	.byte	0x10
-	.byte	0x74
-	.4byte	0x537
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x1c
-	.4byte	.LASF267
-	.byte	0x10
-	.byte	0x75
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x1c
-	.4byte	.LASF268
-	.byte	0x10
-	.byte	0x7c
-	.4byte	0x120e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xaa9
-	.uleb128 0x1c
-	.4byte	.LASF269
-	.byte	0x10
-	.byte	0x7d
-	.4byte	0x120e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x1c
-	.4byte	.LASF270
-	.byte	0x10
-	.byte	0x7f
-	.4byte	0x120e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x1c
-	.4byte	.LASF271
-	.byte	0x10
-	.byte	0x80
-	.4byte	0x120e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x1c
-	.4byte	.LASF272
-	.byte	0x10
-	.byte	0x81
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x1c
-	.4byte	.LASF273
-	.byte	0x10
-	.byte	0x82
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x1c
-	.4byte	.LASF274
-	.byte	0x10
-	.byte	0x83
-	.4byte	0xb35
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x1c
-	.4byte	.LASF275
-	.byte	0x10
-	.byte	0x84
-	.4byte	0xb35
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x1c
-	.4byte	.LASF276
-	.byte	0x10
-	.byte	0x85
-	.4byte	0xb35
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x1c
-	.4byte	.LASF277
-	.byte	0x10
-	.byte	0x86
-	.4byte	0xb35
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x1c
-	.4byte	.LASF278
-	.byte	0x10
-	.byte	0x87
-	.4byte	0x12be
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xb35
-	.uleb128 0x1c
-	.4byte	.LASF279
-	.byte	0x10
-	.byte	0x88
-	.4byte	0x856
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x1c
-	.4byte	.LASF280
-	.byte	0x10
-	.byte	0x89
-	.4byte	0x953
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x1c
-	.4byte	.LASF281
-	.byte	0x10
-	.byte	0x8b
-	.4byte	0x12f7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xbd7
-	.uleb128 0x1c
-	.4byte	.LASF282
-	.byte	0x10
-	.byte	0x8c
-	.4byte	0x62e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x1c
-	.4byte	.LASF283
-	.byte	0x10
-	.byte	0x8d
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x1c
-	.4byte	.LASF284
-	.byte	0x10
-	.byte	0x8e
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x1c
-	.4byte	.LASF285
-	.byte	0x10
-	.byte	0x8f
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x1c
-	.4byte	.LASF286
-	.byte	0x10
-	.byte	0x90
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x1c
-	.4byte	.LASF287
-	.byte	0x10
-	.byte	0x91
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x1c
-	.4byte	.LASF288
-	.byte	0x10
-	.byte	0x92
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x1c
-	.4byte	.LASF289
-	.byte	0x10
-	.byte	0x93
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x1c
-	.4byte	.LASF290
-	.byte	0x10
-	.byte	0x94
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0xb
-	.4byte	0x2ff
-	.4byte	0x13a6
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF291
-	.byte	0x10
-	.byte	0x95
-	.4byte	0x1396
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x1c
-	.4byte	.LASF292
-	.byte	0x10
-	.byte	0x97
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x1c
-	.4byte	.LASF293
-	.byte	0x10
-	.byte	0x98
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x1c
-	.4byte	.LASF294
-	.byte	0x10
-	.byte	0x99
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x1c
-	.4byte	.LASF295
-	.byte	0x10
-	.byte	0x9b
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x1c
-	.4byte	.LASF296
-	.byte	0x10
-	.byte	0x9c
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x1c
-	.4byte	.LASF297
-	.byte	0x10
-	.byte	0x9d
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x1c
-	.4byte	.LASF298
-	.byte	0x10
-	.byte	0x9e
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x1c
-	.4byte	.LASF299
-	.byte	0x10
-	.byte	0xa0
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x1c
-	.4byte	.LASF300
-	.byte	0x10
-	.byte	0xa1
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x1c
-	.4byte	.LASF301
-	.byte	0x10
-	.byte	0xa2
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x1c
-	.4byte	.LASF302
-	.byte	0x10
-	.byte	0xa3
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x1c
-	.4byte	.LASF303
-	.byte	0x10
-	.byte	0xa4
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x1c
-	.4byte	.LASF304
-	.byte	0x10
-	.byte	0xa6
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF305
-	.byte	0x10
-	.byte	0xa7
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF306
-	.byte	0x10
-	.byte	0xa8
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF307
-	.byte	0x10
-	.byte	0xa9
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF308
-	.byte	0x10
-	.byte	0xaa
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF309
-	.byte	0x10
-	.byte	0xab
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x1c
-	.4byte	.LASF310
-	.byte	0x10
-	.byte	0xac
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x1c
-	.4byte	.LASF311
-	.byte	0x10
-	.byte	0xad
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x1c
-	.4byte	.LASF312
-	.byte	0x10
-	.byte	0xae
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x1c
-	.4byte	.LASF313
-	.byte	0x10
-	.byte	0xaf
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x1c
-	.4byte	.LASF314
-	.byte	0x10
-	.byte	0xb0
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x1c
-	.4byte	.LASF315
-	.byte	0x10
-	.byte	0xb1
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x1c
-	.4byte	.LASF316
-	.byte	0x10
-	.byte	0xb2
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x1c
-	.4byte	.LASF317
-	.byte	0x10
-	.byte	0xb4
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x1c
-	.4byte	.LASF318
-	.byte	0x10
-	.byte	0xb5
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0xb
-	.4byte	0x30a
-	.4byte	0x1592
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF319
-	.byte	0x10
-	.byte	0xb6
-	.4byte	0x1582
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x1c
-	.4byte	.LASF320
-	.byte	0x10
-	.byte	0xb7
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x1c
-	.4byte	.LASF321
-	.byte	0x10
-	.byte	0xb8
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x8
-	.4byte	.LASF322
-	.byte	0xd
-	.byte	0x14
-	.4byte	0x37a
-	.uleb128 0x8
-	.4byte	.LASF323
-	.byte	0xd
-	.byte	0x15
-	.4byte	0x37a
-	.uleb128 0x8
-	.4byte	.LASF324
-	.byte	0xd
-	.byte	0x16
-	.4byte	0x41c
-	.uleb128 0xb
-	.4byte	0x97
-	.4byte	0x15f7
-	.uleb128 0x18
-	.4byte	0x2c
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF325
-	.byte	0xd
-	.byte	0x17
-	.4byte	0x15e6
-	.uleb128 0x1c
-	.4byte	.LASF326
-	.byte	0x3
-	.byte	0x5
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
-	.uleb128 0x1c
-	.4byte	.LASF327
-	.byte	0x3
-	.byte	0x6
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFtlInitStatus
-	.uleb128 0x8
-	.4byte	.LASF328
-	.byte	0x3
-	.byte	0x6c
-	.4byte	0x30a
-	.uleb128 0x8
-	.4byte	.LASF329
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0x30a
-	.uleb128 0x8
-	.4byte	.LASF330
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0x30a
-	.uleb128 0x8
-	.4byte	.LASF331
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0x30a
-	.uleb128 0x1d
-	.4byte	.LASF332
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0x62
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	power_up_flag
-	.uleb128 0x1e
-	.4byte	.LASF336
-	.byte	0x3
-	.2byte	0x483
-	.4byte	0x30a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_discard_updated
-	.uleb128 0x1d
-	.4byte	.LASF333
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x1d
-	.4byte	.LASF334
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0xb
-	.4byte	0x2ff
-	.4byte	0x16a9
-	.uleb128 0x18
-	.4byte	0x2c
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF335
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x1698
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_vpc_table
-	.uleb128 0x1f
-	.4byte	.LASF337
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x1d
-	.4byte	.LASF338
-	.byte	0x5
-	.2byte	0x1d4
-	.4byte	0x2ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_ink_free_return_value
-	.uleb128 0x1f
-	.4byte	.LASF339
-	.byte	0x1
-	.byte	0xe
-	.4byte	0x15e6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_buf
-	.uleb128 0x20
-	.4byte	0x15f7
-	.byte	0x1
-	.byte	0xf
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_temp_buf
-	.uleb128 0xb
-	.4byte	0x97
-	.4byte	0x170c
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x1f
-	.4byte	.LASF340
-	.byte	0x1
-	.byte	0x10
-	.4byte	0x16fc
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_spare_buf
-	.uleb128 0x21
-	.4byte	.LASF343
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x62
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x176d
-	.uleb128 0x22
-	.4byte	.LASF341
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x176d
-	.4byte	.LLST290
-	.uleb128 0x22
-	.4byte	.LASF342
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x176d
-	.4byte	.LLST291
-	.uleb128 0x22
-	.4byte	.LASF114
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x3f
-	.4byte	.LLST292
-	.uleb128 0x23
-	.4byte	.LVL1636
-	.4byte	0x67cf
-	.byte	0
-	.uleb128 0x24
-	.byte	0x4
-	.uleb128 0x21
-	.4byte	.LASF344
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x176d
-	.4byte	.LFB278
-	.4byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x17bf
-	.uleb128 0x22
-	.4byte	.LASF345
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x176d
-	.4byte	.LLST172
-	.uleb128 0x22
-	.4byte	.LASF346
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x17bf
-	.4byte	.LLST173
-	.uleb128 0x22
-	.4byte	.LASF347
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x3f
-	.4byte	.LLST174
-	.uleb128 0x23
-	.4byte	.LVL833
-	.4byte	0x67da
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x17c5
-	.uleb128 0x25
-	.uleb128 0x26
-	.4byte	.LASF350
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x176d
-	.byte	0x1
-	.4byte	0x180a
-	.uleb128 0x27
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x176d
-	.uleb128 0x27
-	.ascii	"c\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x62
-	.uleb128 0x27
-	.ascii	"n\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x3f
-	.uleb128 0x28
-	.uleb128 0x29
-	.ascii	"__p\000"
-	.byte	0x1
-	.byte	0xca
-	.4byte	0x176d
-	.uleb128 0x29
-	.ascii	"__n\000"
-	.byte	0x1
-	.byte	0xca
-	.4byte	0xcc
-	.byte	0
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF348
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x8c
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1900
-	.uleb128 0x22
-	.4byte	.LASF349
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x46d
-	.4byte	.LLST105
-	.uleb128 0x2b
-	.ascii	"die\000"
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x97
-	.4byte	.LLST106
-	.uleb128 0x2c
-	.4byte	.LASF114
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x81
-	.4byte	.LLST107
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x81
-	.uleb128 0x2d
-	.4byte	0x17c6
-	.4byte	.LBB359
-	.4byte	.Ldebug_ranges0+0x120
-	.byte	0x1
-	.byte	0xba
-	.4byte	0x18aa
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x120
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x120
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x23
-	.4byte	.LVL483
-	.4byte	0x67e3
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	0x17c6
-	.4byte	.LBB368
-	.4byte	.LBE368-.LBB368
-	.byte	0x1
-	.byte	0xbd
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB369
-	.4byte	.LBE369-.LBB369
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB370
-	.4byte	.LBE370-.LBB370
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x23
-	.4byte	.LVL487
-	.4byte	0x67e3
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF351
-	.byte	0x1
-	.byte	0x9b
-	.4byte	0x315
-	.byte	0x1
-	.4byte	0x1944
-	.uleb128 0x33
-	.4byte	.LASF352
-	.byte	0x1
-	.byte	0x9b
-	.4byte	0x2ff
-	.uleb128 0x29
-	.ascii	"sts\000"
-	.byte	0x1
-	.byte	0x9d
-	.4byte	0x315
-	.uleb128 0x34
-	.4byte	.LASF353
-	.byte	0x1
-	.byte	0x9e
-	.4byte	0x1944
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x9f
-	.4byte	0x32b
-	.uleb128 0x35
-	.ascii	"out\000"
-	.byte	0x1
-	.byte	0xb1
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x30a
-	.4byte	0x1954
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xf
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF354
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x8c
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x19ea
-	.uleb128 0x22
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x176d
-	.4byte	.LLST91
-	.uleb128 0x22
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x97
-	.4byte	.LLST92
-	.uleb128 0x22
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x97
-	.4byte	.LLST93
-	.uleb128 0x36
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x97
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x97
-	.uleb128 0x34
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x97
-	.uleb128 0x1f
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x97
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x88
-	.4byte	0xf3e
-	.uleb128 0x1f
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x89
-	.4byte	0x97
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x23
-	.4byte	.LVL404
-	.4byte	0x1ba9
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF360
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x8c
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ae4
-	.uleb128 0x22
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x176d
-	.4byte	.LLST86
-	.uleb128 0x22
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x97
-	.4byte	.LLST87
-	.uleb128 0x22
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x97
-	.4byte	.LLST88
-	.uleb128 0x22
-	.4byte	.LASF361
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x97
-	.4byte	.LLST89
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x97
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x97
-	.uleb128 0x34
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x97
-	.uleb128 0x1f
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x97
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x2c
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0x97
-	.4byte	.LLST90
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x4d
-	.4byte	0xf3e
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4795
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x1ad1
-	.uleb128 0x1f
-	.4byte	.LASF363
-	.byte	0x1
-	.byte	0x68
-	.4byte	0x32b
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x23
-	.4byte	.LVL389
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL390
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL391
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL392
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL378
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL380
-	.4byte	0x1ba9
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x1af4
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xe
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x1ae4
-	.uleb128 0x2a
-	.4byte	.LASF364
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x8c
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ba9
-	.uleb128 0x22
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x176d
-	.4byte	.LLST78
-	.uleb128 0x22
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x97
-	.4byte	.LLST79
-	.uleb128 0x22
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x97
-	.4byte	.LLST80
-	.uleb128 0x36
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x97
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x97
-	.uleb128 0x34
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x97
-	.uleb128 0x1f
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x97
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -48
-	.uleb128 0x2c
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x97
-	.4byte	.LLST81
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xf3e
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4778
-	.uleb128 0x23
-	.4byte	.LVL347
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL350
-	.4byte	0x1ba9
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF667
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x97
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1c51
-	.uleb128 0x2b
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x11
-	.4byte	0xf3e
-	.4byte	.LLST0
-	.uleb128 0x22
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x374
-	.4byte	.LLST1
-	.uleb128 0x22
-	.4byte	.LASF365
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x374
-	.4byte	.LLST2
-	.uleb128 0x34
-	.4byte	.LASF366
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x81
-	.uleb128 0x34
-	.4byte	.LASF367
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x81
-	.uleb128 0x2c
-	.4byte	.LASF71
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x81
-	.4byte	.LLST3
-	.uleb128 0x2c
-	.4byte	.LASF72
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x81
-	.4byte	.LLST4
-	.uleb128 0x2c
-	.4byte	.LASF368
-	.byte	0x1
-	.byte	0x15
-	.4byte	0x97
-	.4byte	.LLST5
-	.uleb128 0x2c
-	.4byte	.LASF62
-	.byte	0x1
-	.byte	0x16
-	.4byte	0x97
-	.4byte	.LLST6
-	.uleb128 0x2c
-	.4byte	.LASF369
-	.byte	0x1
-	.byte	0x17
-	.4byte	0x97
-	.4byte	.LLST7
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF370
-	.byte	0x5
-	.2byte	0x2f4
-	.4byte	0x97
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1c75
-	.uleb128 0x23
-	.4byte	.LVL1369
-	.4byte	0x1c75
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF371
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x1d42
-	.uleb128 0x3c
-	.4byte	.LASF372
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x30a
-	.uleb128 0x3c
-	.4byte	.LASF373
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF374
-	.byte	0x5
-	.2byte	0x1d7
-	.4byte	0x2ff
-	.uleb128 0x3e
-	.ascii	"lpa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0x30a
-	.uleb128 0x3e
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF375
-	.byte	0x5
-	.2byte	0x1d9
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF85
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF377
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF379
-	.byte	0x5
-	.2byte	0x1db
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x1d42
-	.uleb128 0x3f
-	.4byte	.LASF381
-	.byte	0x5
-	.2byte	0x272
-	.uleb128 0x3f
-	.4byte	.LASF382
-	.byte	0x5
-	.2byte	0x275
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x1d58
-	.4byte	.LASF371
-	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF383
-	.byte	0x5
-	.2byte	0x1f3
-	.4byte	0x2ff
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x76e
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x1d58
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x16
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x1d48
-	.uleb128 0x3b
-	.4byte	.LASF384
-	.byte	0x5
-	.2byte	0x1a2
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x1dbd
-	.uleb128 0x3e
-	.ascii	"ret\000"
-	.byte	0x5
-	.2byte	0x1a4
-	.4byte	0x62
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x1a5
-	.4byte	0x62
-	.uleb128 0x3e
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1a6
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF353
-	.byte	0x5
-	.2byte	0x1a7
-	.4byte	0x1944
-	.uleb128 0x41
-	.4byte	0x1dae
-	.uleb128 0x3d
-	.4byte	.LASF385
-	.byte	0x5
-	.2byte	0x1b1
-	.4byte	0x32b
-	.byte	0
-	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF386
-	.byte	0x5
-	.2byte	0x1c6
-	.4byte	0x30a
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF387
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x1e07
-	.uleb128 0x3c
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x5
-	.2byte	0x187
-	.4byte	0x2ff
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0x2ff
-	.uleb128 0x3e
-	.ascii	"j\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF497
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x62
-	.byte	0x1
-	.uleb128 0x3a
-	.4byte	.LASF389
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x62
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1e70
-	.uleb128 0x43
-	.4byte	.LASF178
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x2ff
-	.4byte	.LLST77
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF390
-	.byte	0x5
-	.2byte	0x169
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL333
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL334
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL335
-	.4byte	0x1e70
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF391
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x62
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ea4
-	.uleb128 0x43
-	.4byte	.LASF392
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x2ff
-	.4byte	.LLST76
-	.uleb128 0x23
-	.4byte	.LVL330
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF393
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0x30a
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1f18
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF380
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x1d42
-	.4byte	.LLST244
-	.uleb128 0x23
-	.4byte	.LVL1274
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1275
-	.4byte	0x22ce
-	.uleb128 0x23
-	.4byte	.LVL1276
-	.4byte	0x20c7
-	.uleb128 0x23
-	.4byte	.LVL1277
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1278
-	.4byte	0x493b
-	.uleb128 0x23
-	.4byte	.LVL1279
-	.4byte	0x2096
-	.uleb128 0x23
-	.4byte	.LVL1281
-	.4byte	0x21f0
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF394
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0x30a
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1f72
-	.uleb128 0x23
-	.4byte	.LVL1282
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1283
-	.4byte	0x20c7
-	.uleb128 0x23
-	.4byte	.LVL1284
-	.4byte	0x2508
-	.uleb128 0x23
-	.4byte	.LVL1285
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1286
-	.4byte	0x3736
-	.uleb128 0x23
-	.4byte	.LVL1287
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1288
-	.4byte	0x23e7
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF453
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x21
-	.4byte	.LASF395
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x30a
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2096
-	.uleb128 0x22
-	.4byte	.LASF396
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x12be
-	.4byte	.LLST163
-	.uleb128 0x22
-	.4byte	.LASF397
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x30a
-	.4byte	.LLST164
-	.uleb128 0x2c
-	.4byte	.LASF378
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0x2ff
-	.4byte	.LLST165
-	.uleb128 0x2c
-	.4byte	.LASF357
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x2ff
-	.4byte	.LLST166
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF376
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2ff
-	.uleb128 0x2c
-	.4byte	.LASF172
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2ff
-	.4byte	.LLST167
-	.uleb128 0x2c
-	.4byte	.LASF170
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2ff
-	.4byte	.LLST168
-	.uleb128 0x2c
-	.4byte	.LASF398
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0x30a
-	.4byte	.LLST169
-	.uleb128 0x2c
-	.4byte	.LASF399
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0x30a
-	.4byte	.LLST170
-	.uleb128 0x34
-	.4byte	.LASF400
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0x30a
-	.uleb128 0x2c
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xda
-	.4byte	0x1d42
-	.4byte	.LLST171
-	.uleb128 0x46
-	.4byte	.LASF401
-	.byte	0x5
-	.byte	0xe1
-	.uleb128 0x46
-	.4byte	.LASF402
-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x47
-	.4byte	.LASF471
-	.byte	0x5
-	.2byte	0x117
-	.4byte	.L968
-	.uleb128 0x23
-	.4byte	.LVL800
-	.4byte	0x2096
-	.uleb128 0x23
-	.4byte	.LVL805
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL817
-	.4byte	0x453b
-	.uleb128 0x23
-	.4byte	.LVL824
-	.4byte	0x3149
-	.uleb128 0x23
-	.4byte	.LVL826
-	.4byte	0x21f0
-	.uleb128 0x23
-	.4byte	.LVL828
-	.4byte	0x420f
-	.uleb128 0x23
-	.4byte	.LVL829
-	.4byte	0x2096
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF409
-	.byte	0x5
-	.byte	0xc9
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x20c7
-	.uleb128 0x23
-	.4byte	.LVL795
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL796
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL797
-	.4byte	0x2312
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF403
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x62
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x21db
-	.uleb128 0x22
-	.4byte	.LASF404
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x62
-	.4byte	.LLST240
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF405
-	.byte	0x5
-	.byte	0x71
-	.4byte	0x2ff
-	.uleb128 0x2c
-	.4byte	.LASF406
-	.byte	0x5
-	.byte	0x72
-	.4byte	0x30a
-	.4byte	.LLST241
-	.uleb128 0x2c
-	.4byte	.LASF407
-	.byte	0x5
-	.byte	0x73
-	.4byte	0x30a
-	.4byte	.LLST242
-	.uleb128 0x34
-	.4byte	.LASF396
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x12be
-	.uleb128 0x2c
-	.4byte	.LASF408
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x12f7
-	.4byte	.LLST243
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x21eb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4628
-	.uleb128 0x23
-	.4byte	.LVL1241
-	.4byte	0x1f7b
-	.uleb128 0x23
-	.4byte	.LVL1243
-	.4byte	0x3736
-	.uleb128 0x23
-	.4byte	.LVL1244
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1245
-	.4byte	0x493b
-	.uleb128 0x23
-	.4byte	.LVL1249
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1250
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1252
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1254
-	.4byte	0x41ea
-	.uleb128 0x23
-	.4byte	.LVL1255
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1256
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1258
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1259
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1260
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1261
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1262
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1264
-	.4byte	0x420f
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x21eb
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x12
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x21db
-	.uleb128 0x48
-	.4byte	.LASF410
-	.byte	0x5
-	.byte	0x54
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2258
-	.uleb128 0x22
-	.4byte	.LASF411
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30a
-	.4byte	.LLST71
-	.uleb128 0x22
-	.4byte	.LASF181
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30a
-	.4byte	.LLST72
-	.uleb128 0x2b
-	.ascii	"lpa\000"
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30a
-	.4byte	.LLST73
-	.uleb128 0x2c
-	.4byte	.LASF412
-	.byte	0x5
-	.byte	0x56
-	.4byte	0x2ff
-	.4byte	.LLST74
-	.uleb128 0x49
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0x2ff
-	.4byte	.LLST75
-	.uleb128 0x23
-	.4byte	.LVL321
-	.4byte	0x4507
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF413
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x30a
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x228a
-	.uleb128 0x2b
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x2ff
-	.4byte	.LLST70
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF414
-	.byte	0x5
-	.byte	0x38
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x22ce
-	.uleb128 0x4a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xf3e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4b
-	.4byte	.LASF415
-	.byte	0x5
-	.byte	0x38
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF416
-	.byte	0x5
-	.byte	0x3b
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF417
-	.byte	0x5
-	.byte	0x29
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2312
-	.uleb128 0x4a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xf3e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4b
-	.4byte	.LASF415
-	.byte	0x5
-	.byte	0x29
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x2b
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF416
-	.byte	0x5
-	.byte	0x2c
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF418
-	.byte	0x5
-	.byte	0x15
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2331
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x17
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF419
-	.byte	0x2
-	.2byte	0xac3
-	.4byte	0x62
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2392
-	.uleb128 0x43
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xac3
-	.4byte	0x2ff
-	.4byte	.LLST187
-	.uleb128 0x3e
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0xac5
-	.4byte	0x62
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x23a2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4558
-	.uleb128 0x23
-	.4byte	.LVL907
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL908
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL909
-	.4byte	0x23a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x23a2
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x13
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x2392
-	.uleb128 0x3b
-	.4byte	.LASF420
-	.byte	0x2
-	.2byte	0xaae
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x23d2
-	.uleb128 0x3c
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xaae
-	.4byte	0x2ff
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x23e2
-	.4byte	.LASF420
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x23e2
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xf
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x23d2
-	.uleb128 0x3a
-	.4byte	.LASF421
-	.byte	0x2
-	.2byte	0xa8e
-	.4byte	0x30a
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2463
-	.uleb128 0x43
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0xa8e
-	.4byte	0x12be
-	.4byte	.LLST68
-	.uleb128 0x44
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0xa90
-	.4byte	0x2ff
-	.4byte	.LLST69
-	.uleb128 0x1e
-	.4byte	.LASF423
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x21eb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4538
-	.uleb128 0x23
-	.4byte	.LVL306
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL307
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL308
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL311
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF424
-	.byte	0x2
-	.2byte	0xa76
-	.4byte	0x62
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x24f3
-	.uleb128 0x43
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0xa76
-	.4byte	0x12be
-	.4byte	.LLST226
-	.uleb128 0x1e
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xa78
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x2503
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4531
-	.uleb128 0x23
-	.4byte	.LVL1176
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1177
-	.4byte	0x41ea
-	.uleb128 0x23
-	.4byte	.LVL1178
-	.4byte	0x23a7
-	.uleb128 0x23
-	.4byte	.LVL1179
-	.4byte	0x2508
-	.uleb128 0x23
-	.4byte	.LVL1180
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1181
-	.4byte	0x3736
-	.uleb128 0x23
-	.4byte	.LVL1182
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1183
-	.4byte	0x420f
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x2503
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x24f3
-	.uleb128 0x4c
-	.4byte	.LASF425
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x62
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2662
-	.uleb128 0x4d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x12be
-	.4byte	.LLST179
-	.uleb128 0x44
-	.4byte	.LASF426
-	.byte	0x2
-	.2byte	0xa14
-	.4byte	0x2ff
-	.4byte	.LLST180
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2ff
-	.4byte	.LLST181
-	.uleb128 0x3e
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF427
-	.byte	0x2
-	.2byte	0xa16
-	.4byte	0x62
-	.4byte	.LLST182
-	.uleb128 0x44
-	.4byte	.LASF428
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0x2ff
-	.4byte	.LLST183
-	.uleb128 0x3f
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0xa18
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x2672
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4510
-	.uleb128 0x4e
-	.4byte	0x3416
-	.4byte	.LBB451
-	.4byte	.Ldebug_ranges0+0x1c0
-	.byte	0x2
-	.2byte	0xa48
-	.4byte	0x25d1
-	.uleb128 0x2e
-	.4byte	0x342f
-	.uleb128 0x2e
-	.4byte	0x3423
-	.uleb128 0x23
-	.4byte	.LVL878
-	.4byte	0x5c1e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL854
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL860
-	.4byte	0x4026
-	.uleb128 0x23
-	.4byte	.LVL861
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL862
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL863
-	.4byte	0x41ea
-	.uleb128 0x23
-	.4byte	.LVL864
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL865
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL867
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL868
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL869
-	.4byte	0x3416
-	.uleb128 0x23
-	.4byte	.LVL871
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL873
-	.4byte	0x27b7
-	.uleb128 0x23
-	.4byte	.LVL874
-	.4byte	0x493b
-	.uleb128 0x23
-	.4byte	.LVL875
-	.4byte	0x41ea
-	.uleb128 0x23
-	.4byte	.LVL880
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL883
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x2672
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x18
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x2662
-	.uleb128 0x3b
-	.4byte	.LASF430
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x2695
-	.uleb128 0x3c
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF431
-	.byte	0x2
-	.2byte	0x9c0
-	.4byte	0x2ff
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x273f
-	.uleb128 0x1e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x9c2
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3d
-	.4byte	.LASF433
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF434
-	.byte	0x2
-	.2byte	0x9c4
-	.4byte	0x2ff
-	.4byte	.LLST62
-	.uleb128 0x44
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0x120e
-	.4byte	.LLST63
-	.uleb128 0x44
-	.4byte	.LASF436
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0x2ff
-	.4byte	.LLST64
-	.uleb128 0x44
-	.4byte	.LASF437
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0x2ff
-	.4byte	.LLST65
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x30a
-	.uleb128 0x44
-	.4byte	.LASF114
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0x2ff
-	.4byte	.LLST66
-	.uleb128 0x23
-	.4byte	.LVL283
-	.4byte	0x273f
-	.uleb128 0x23
-	.4byte	.LVL290
-	.4byte	0x278e
-	.uleb128 0x23
-	.4byte	.LVL296
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF438
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x2ff
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x278e
-	.uleb128 0x43
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x2ff
-	.4byte	.LLST57
-	.uleb128 0x1e
-	.4byte	.LASF439
-	.byte	0x2
-	.2byte	0x9ad
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3d
-	.4byte	.LASF392
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0x2ff
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9af
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF440
-	.byte	0x2
-	.2byte	0x9a2
-	.4byte	0x2ff
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x27b7
-	.uleb128 0x1e
-	.4byte	.LASF434
-	.byte	0x2
-	.2byte	0x9a4
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF441
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x62
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2818
-	.uleb128 0x43
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x2ff
-	.4byte	.LLST56
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF165
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL192
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL193
-	.4byte	0x4a9e
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF442
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x2842
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x62
-	.uleb128 0x28
-	.uleb128 0x3d
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x12be
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x914
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x28ad
-	.uleb128 0x50
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x62
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x50
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x917
-	.4byte	0x30a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3d
-	.4byte	.LASF444
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x1d42
-	.uleb128 0x23
-	.4byte	.LVL654
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL657
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL658
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL659
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL660
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF445
-	.byte	0x2
-	.2byte	0x8e0
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29c6
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8e3
-	.4byte	0x30a
-	.4byte	.LLST144
-	.uleb128 0x1e
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0x30a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -48
-	.uleb128 0x3e
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2ff
-	.4byte	.LLST145
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x29d6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4425
-	.uleb128 0x52
-	.4byte	.LBB412
-	.4byte	.LBE412-.LBB412
-	.4byte	0x293e
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0x2ff
-	.4byte	.LLST146
-	.uleb128 0x23
-	.4byte	.LVL673
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB409
-	.4byte	.LBE409-.LBB409
-	.byte	0x2
-	.2byte	0x8e9
-	.4byte	0x2998
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB410
-	.4byte	.LBE410-.LBB410
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL669
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL668
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL674
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL676
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL677
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL679
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x29d6
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xd
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x29c6
-	.uleb128 0x4f
-	.4byte	.LASF448
-	.byte	0x2
-	.2byte	0x8c1
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2a82
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8c3
-	.4byte	0x2ff
-	.4byte	.LLST224
-	.uleb128 0x51
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0x30a
-	.4byte	.LLST225
-	.uleb128 0x1e
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0x30a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -48
-	.uleb128 0x3e
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8c6
-	.4byte	0x2ff
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x2a92
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4409
-	.uleb128 0x23
-	.4byte	.LVL1162
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1163
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1167
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1168
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1170
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1171
-	.4byte	0x23a7
-	.uleb128 0x23
-	.4byte	.LVL1172
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1173
-	.4byte	0x3593
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x2a92
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x14
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x2a82
-	.uleb128 0x4f
-	.4byte	.LASF449
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b0c
-	.uleb128 0x43
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x12be
-	.4byte	.LLST206
-	.uleb128 0x1e
-	.4byte	.LASF450
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0x32b
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x1d42
-	.uleb128 0x3d
-	.4byte	.LASF451
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x62
-	.uleb128 0x3d
-	.4byte	.LASF174
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0x30a
-	.uleb128 0x23
-	.4byte	.LVL1048
-	.4byte	0x23e7
-	.uleb128 0x23
-	.4byte	.LVL1049
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1050
-	.4byte	0x2331
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF452
-	.byte	0x2
-	.2byte	0x882
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b86
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB510
-	.4byte	.LBE510-.LBB510
-	.byte	0x2
-	.2byte	0x886
-	.4byte	0x2b7c
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB511
-	.4byte	.LBE511-.LBB511
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB512
-	.4byte	.LBE512-.LBB512
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL1145
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1144
-	.4byte	0x3783
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF454
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x4c
-	.4byte	.LASF455
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x62
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c43
-	.uleb128 0x44
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2ff
-	.4byte	.LLST160
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF165
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF456
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0x2ff
-	.4byte	.LLST161
-	.uleb128 0x44
-	.4byte	.LASF457
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0x2ff
-	.4byte	.LLST162
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x2c53
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4384
-	.uleb128 0x23
-	.4byte	.LVL781
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL783
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL784
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL788
-	.4byte	0x420f
-	.uleb128 0x23
-	.4byte	.LVL791
-	.4byte	0x41ea
-	.uleb128 0x23
-	.4byte	.LVL793
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x2c53
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x11
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x2c43
-	.uleb128 0x3a
-	.4byte	.LASF458
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x62
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2cc3
-	.uleb128 0x4d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x12be
-	.4byte	.LLST55
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x2ff
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x23e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4363
-	.uleb128 0x23
-	.4byte	.LVL186
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL187
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL188
-	.4byte	0x4a9e
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF459
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x62
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2d14
-	.uleb128 0x23
-	.4byte	.LVL1268
-	.4byte	0x2d3a
-	.uleb128 0x23
-	.4byte	.LVL1269
-	.4byte	0x2d14
-	.uleb128 0x23
-	.4byte	.LVL1270
-	.4byte	0x2d3a
-	.uleb128 0x23
-	.4byte	.LVL1271
-	.4byte	0x2d14
-	.uleb128 0x23
-	.4byte	.LVL1272
-	.4byte	0x1f72
-	.uleb128 0x23
-	.4byte	.LVL1273
-	.4byte	0x2331
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF495
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x2d3a
-	.uleb128 0x3c
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x12be
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF460
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x62
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x307d
-	.uleb128 0x43
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x12be
-	.4byte	.LLST191
-	.uleb128 0x44
-	.4byte	.LASF461
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x2ff
-	.4byte	.LLST192
-	.uleb128 0x44
-	.4byte	.LASF462
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x2ff
-	.4byte	.LLST193
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF172
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF170
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF463
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x2ff
-	.4byte	.LLST194
-	.uleb128 0x44
-	.4byte	.LASF464
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x2ff
-	.4byte	.LLST195
-	.uleb128 0x3d
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF465
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x62
-	.4byte	.LLST196
-	.uleb128 0x3d
-	.4byte	.LASF466
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x62
-	.uleb128 0x3d
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2ff
-	.4byte	.LLST197
-	.uleb128 0x3e
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30a
-	.4byte	.LLST198
-	.uleb128 0x44
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30a
-	.4byte	.LLST199
-	.uleb128 0x44
-	.4byte	.LASF406
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30a
-	.4byte	.LLST200
-	.uleb128 0x44
-	.4byte	.LASF398
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30a
-	.4byte	.LLST201
-	.uleb128 0x44
-	.4byte	.LASF412
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x2ff
-	.4byte	.LLST202
-	.uleb128 0x3d
-	.4byte	.LASF467
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF468
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0x30a
-	.4byte	.LLST203
-	.uleb128 0x3d
-	.4byte	.LASF469
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x1d42
-	.uleb128 0x3d
-	.4byte	.LASF470
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0x30a
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x308d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4306
-	.uleb128 0x47
-	.4byte	.LASF472
-	.byte	0x2
-	.2byte	0x744
-	.4byte	.L1126
-	.uleb128 0x47
-	.4byte	.LASF402
-	.byte	0x2
-	.2byte	0x74c
-	.4byte	.L1138
-	.uleb128 0x47
-	.4byte	.LASF473
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.L1144
-	.uleb128 0x3f
-	.4byte	.LASF474
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x208
-	.4byte	0x2f0c
-	.uleb128 0x3d
-	.4byte	.LASF475
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF476
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0x30a
-	.uleb128 0x23
-	.4byte	.LVL966
-	.4byte	0x1af9
-	.byte	0
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0x2f7e
-	.uleb128 0x44
-	.4byte	.LASF477
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0x30a
-	.4byte	.LLST204
-	.uleb128 0x44
-	.4byte	.LASF478
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0x30a
-	.4byte	.LLST205
-	.uleb128 0x23
-	.4byte	.LVL1004
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1007
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1013
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1015
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL1019
-	.4byte	0x3092
-	.uleb128 0x23
-	.4byte	.LVL1021
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1023
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL1024
-	.4byte	0x44c4
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LBB477
-	.4byte	.LBE477-.LBB477
-	.4byte	0x2fbf
-	.uleb128 0x3d
-	.4byte	.LASF479
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF478
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0x30a
-	.uleb128 0x23
-	.4byte	.LVL1029
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1030
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL1031
-	.4byte	0x392e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL934
-	.4byte	0x442c
-	.uleb128 0x23
-	.4byte	.LVL936
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL941
-	.4byte	0x453b
-	.uleb128 0x23
-	.4byte	.LVL955
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL957
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL961
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL971
-	.4byte	0x36a4
-	.uleb128 0x23
-	.4byte	.LVL975
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL982
-	.4byte	0x453b
-	.uleb128 0x23
-	.4byte	.LVL992
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL996
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL1000
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1002
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1003
-	.4byte	0x44c4
-	.uleb128 0x23
-	.4byte	.LVL1008
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1010
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1027
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1028
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1033
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1035
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1044
-	.4byte	0x3149
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x308d
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x15
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x307d
-	.uleb128 0x4f
-	.4byte	.LASF480
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3149
-	.uleb128 0x4d
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x30a
-	.4byte	.LLST138
-	.uleb128 0x43
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x30a
-	.4byte	.LLST139
-	.uleb128 0x44
-	.4byte	.LASF412
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0x2ff
-	.4byte	.LLST140
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x23e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4272
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x170
-	.4byte	0x3136
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF392
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0x2ff
-	.4byte	.LLST141
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0x2ff
-	.4byte	.LLST142
-	.uleb128 0x23
-	.4byte	.LVL643
-	.4byte	0x4086
-	.uleb128 0x23
-	.4byte	.LVL644
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL645
-	.4byte	0x41ea
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL637
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL652
-	.4byte	0x392e
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF481
-	.byte	0x2
-	.2byte	0x678
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x319a
-	.uleb128 0x56
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x12be
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF170
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x2ff
-	.4byte	.LLST53
-	.uleb128 0x43
-	.4byte	.LASF172
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x2ff
-	.4byte	.LLST54
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF482
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x62
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31c7
-	.uleb128 0x23
-	.4byte	.LVL770
-	.4byte	0x31c7
-	.uleb128 0x23
-	.4byte	.LVL771
-	.4byte	0x3220
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x658
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31fc
-	.uleb128 0x3d
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL768
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL769
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF484
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x62
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3220
-	.uleb128 0x23
-	.4byte	.LVL767
-	.4byte	0x3220
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF485
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x62
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3330
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x3330
-	.4byte	.LLST152
-	.uleb128 0x44
-	.4byte	.LASF487
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x320
-	.4byte	.LLST153
-	.uleb128 0x3d
-	.4byte	.LASF85
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x320
-	.uleb128 0x44
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0x320
-	.4byte	.LLST154
-	.uleb128 0x3d
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0x537
-	.4byte	.LLST155
-	.uleb128 0x44
-	.4byte	.LASF98
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x62e
-	.4byte	.LLST156
-	.uleb128 0x44
-	.4byte	.LASF99
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0x537
-	.4byte	.LLST157
-	.uleb128 0x44
-	.4byte	.LASF95
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0x2ff
-	.4byte	.LLST158
-	.uleb128 0x44
-	.4byte	.LASF490
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0x2ff
-	.4byte	.LLST159
-	.uleb128 0x3d
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x3336
-	.uleb128 0x23
-	.4byte	.LVL729
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL734
-	.4byte	0x442c
-	.uleb128 0x23
-	.4byte	.LVL741
-	.4byte	0x3dce
-	.uleb128 0x23
-	.4byte	.LVL742
-	.4byte	0x3d76
-	.uleb128 0x23
-	.4byte	.LVL743
-	.4byte	0x3ca9
-	.uleb128 0x23
-	.4byte	.LVL744
-	.4byte	0x3ca9
-	.uleb128 0x23
-	.4byte	.LVL747
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL754
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL757
-	.4byte	0x1af9
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x585
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x7b6
-	.uleb128 0x4c
-	.4byte	.LASF492
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x62
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x33eb
-	.uleb128 0x44
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0x320
-	.4byte	.LLST286
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4209
-	.uleb128 0x23
-	.4byte	.LVL1551
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1552
-	.4byte	0x442c
-	.uleb128 0x23
-	.4byte	.LVL1554
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1555
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1557
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1558
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1559
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1561
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1562
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1563
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1564
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1565
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1567
-	.4byte	0x1af9
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF493
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x62
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3416
-	.uleb128 0x43
-	.4byte	.LASF494
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x2ff
-	.4byte	.LLST52
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF496
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x343c
-	.uleb128 0x3c
-	.4byte	.LASF494
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x2ff
-	.uleb128 0x3c
-	.4byte	.LASF372
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x62
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF498
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x62
-	.byte	0x1
-	.uleb128 0x3a
-	.4byte	.LASF499
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x62
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3593
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF500
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x2ff
-	.4byte	.LLST150
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x2ff
-	.uleb128 0x1e
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x320
-	.uleb128 0x3e
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x320
-	.uleb128 0x44
-	.4byte	.LASF501
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x3336
-	.4byte	.LLST151
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x29d6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4152
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB418
-	.4byte	.LBE418-.LBB418
-	.byte	0x2
-	.2byte	0x484
-	.4byte	0x351d
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB419
-	.4byte	.LBE419-.LBB419
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB420
-	.4byte	.LBE420-.LBB420
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL690
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL691
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL692
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL693
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL700
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL701
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL707
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL709
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL710
-	.4byte	0x435a
-	.uleb128 0x23
-	.4byte	.LVL711
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL712
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL713
-	.4byte	0x435a
-	.uleb128 0x23
-	.4byte	.LVL716
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF502
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x62
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3652
-	.uleb128 0x1e
-	.4byte	.LASF86
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3d
-	.4byte	.LASF503
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x3652
-	.uleb128 0x44
-	.4byte	.LASF504
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0x2ff
-	.4byte	.LLST223
-	.uleb128 0x3f
-	.4byte	.LASF505
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4130
-	.uleb128 0x23
-	.4byte	.LVL1147
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1149
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1150
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1151
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1152
-	.4byte	0x3712
-	.uleb128 0x23
-	.4byte	.LVL1153
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1154
-	.4byte	0x4234
-	.uleb128 0x23
-	.4byte	.LVL1155
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1156
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1159
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1160
-	.4byte	0x435a
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x80e
-	.uleb128 0x55
-	.4byte	.LASF506
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x36a4
-	.uleb128 0x28
-	.uleb128 0x3e
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0x30a
-	.uleb128 0x3e
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF507
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF450
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0x32b
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x1d42
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF508
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3712
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x3330
-	.4byte	.LLST147
-	.uleb128 0x51
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0x30a
-	.4byte	.LLST148
-	.uleb128 0x3d
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0x537
-	.4byte	.LLST149
-	.uleb128 0x23
-	.4byte	.LVL685
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL686
-	.4byte	0x3ac5
-	.uleb128 0x23
-	.4byte	.LVL689
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF509
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x3736
-	.uleb128 0x3c
-	.4byte	.LASF183
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0x30a
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF510
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x62
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3783
-	.uleb128 0x43
-	.4byte	.LASF511
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x30a
-	.4byte	.LLST215
-	.uleb128 0x44
-	.4byte	.LASF512
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0x30a
-	.4byte	.LLST216
-	.uleb128 0x23
-	.4byte	.LVL1124
-	.4byte	0x3859
-	.uleb128 0x23
-	.4byte	.LVL1125
-	.4byte	0x2b86
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF513
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30a
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3853
-	.uleb128 0x43
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30a
-	.4byte	.LLST217
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30a
-	.4byte	.LLST218
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x3853
-	.4byte	.LLST219
-	.uleb128 0x51
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x2ff
-	.4byte	.LLST220
-	.uleb128 0x3d
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0x30a
-	.4byte	.LLST221
-	.uleb128 0x1e
-	.4byte	.LASF518
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x50
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0x32b
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -128
-	.uleb128 0x44
-	.4byte	.LASF519
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0x30a
-	.4byte	.LLST222
-	.uleb128 0x1e
-	.4byte	.LASF353
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x23
-	.4byte	.LVL1137
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1138
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1140
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x2f4
-	.uleb128 0x4c
-	.4byte	.LASF520
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30a
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x392e
-	.uleb128 0x43
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30a
-	.4byte	.LLST211
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30a
-	.4byte	.LLST212
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x3853
-	.4byte	.LLST213
-	.uleb128 0x50
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x3d
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0x30a
-	.4byte	.LLST214
-	.uleb128 0x1e
-	.4byte	.LASF518
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x50
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x347
-	.4byte	0x32b
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -128
-	.uleb128 0x1e
-	.4byte	.LASF519
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x1e
-	.4byte	.LASF353
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x23
-	.4byte	.LVL1108
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1109
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1110
-	.4byte	0x3ac5
-	.uleb128 0x23
-	.4byte	.LVL1113
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF521
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x62
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x39e4
-	.uleb128 0x4d
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x30a
-	.4byte	.LLST134
-	.uleb128 0x4d
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x537
-	.4byte	.LLST135
-	.uleb128 0x43
-	.4byte	.LASF522
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x62
-	.4byte	.LLST136
-	.uleb128 0x44
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2ff
-	.4byte	.LLST137
-	.uleb128 0x1e
-	.4byte	.LASF524
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x1e
-	.4byte	.LASF525
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x39f4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4057
-	.uleb128 0x47
-	.4byte	.LASF526
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	.L737
-	.uleb128 0x23
-	.4byte	.LVL627
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL630
-	.4byte	0x3a30
-	.uleb128 0x23
-	.4byte	.LVL631
-	.4byte	0x3a85
-	.uleb128 0x23
-	.4byte	.LVL632
-	.4byte	0x3e7f
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x39f4
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x8
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x39e4
-	.uleb128 0x3a
-	.4byte	.LASF527
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x62
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a30
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL921
-	.4byte	0x3658
-	.uleb128 0x23
-	.4byte	.LVL922
-	.4byte	0x3a85
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF528
-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0x2ff
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a85
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2ee
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF529
-	.byte	0x2
-	.2byte	0x2ef
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF530
-	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0x30a
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x308d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4040
-	.uleb128 0x23
-	.4byte	.LVL166
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF531
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x62
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ac5
-	.uleb128 0x43
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x2ff
-	.4byte	.LLST133
-	.uleb128 0x3d
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0x30a
-	.uleb128 0x23
-	.4byte	.LVL622
-	.4byte	0x3ac5
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF532
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x62
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3bd9
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x3330
-	.4byte	.LLST126
-	.uleb128 0x43
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x30a
-	.4byte	.LLST127
-	.uleb128 0x56
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x537
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x2a9
-	.4byte	0x30a
-	.uleb128 0x44
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x2aa
-	.4byte	0x3336
-	.4byte	.LLST128
-	.uleb128 0x44
-	.4byte	.LASF504
-	.byte	0x2
-	.2byte	0x2ab
-	.4byte	0x2ff
-	.4byte	.LLST129
-	.uleb128 0x3f
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x2ad
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x23e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4015
-	.uleb128 0x4e
-	.4byte	0x17c6
-	.4byte	.LBB384
-	.4byte	.Ldebug_ranges0+0x158
-	.byte	0x2
-	.2byte	0x2c3
-	.4byte	0x3ba2
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x158
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x158
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL596
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL593
-	.4byte	0x3bd9
-	.uleb128 0x23
-	.4byte	.LVL594
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL595
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL599
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL602
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL603
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF534
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x62
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3c94
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x3330
-	.4byte	.LLST122
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF535
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0x2ff
-	.4byte	.LLST123
-	.uleb128 0x44
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x62e
-	.4byte	.LLST124
-	.uleb128 0x44
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0x537
-	.4byte	.LLST125
-	.uleb128 0x3d
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x3336
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x3ca4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.4001
-	.uleb128 0x23
-	.4byte	.LVL576
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL577
-	.4byte	0x4234
-	.uleb128 0x23
-	.4byte	.LVL583
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL586
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL587
-	.4byte	0x3ca9
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x3ca4
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x3c94
-	.uleb128 0x3a
-	.4byte	.LASF537
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x62
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3d76
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x3330
-	.4byte	.LLST130
-	.uleb128 0x1e
-	.4byte	.LASF538
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3d
-	.4byte	.LASF539
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0x2ff
-	.4byte	.LLST131
-	.uleb128 0x44
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x62e
-	.4byte	.LLST132
-	.uleb128 0x1e
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0x537
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x3d
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x3336
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3987
-	.uleb128 0x23
-	.4byte	.LVL607
-	.4byte	0x3dce
-	.uleb128 0x23
-	.4byte	.LVL609
-	.4byte	0x3d76
-	.uleb128 0x23
-	.4byte	.LVL611
-	.4byte	0x435a
-	.uleb128 0x23
-	.4byte	.LVL613
-	.4byte	0x3d76
-	.uleb128 0x23
-	.4byte	.LVL615
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL617
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL619
-	.4byte	0x3ac5
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF540
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x3db9
-	.uleb128 0x3c
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x3330
-	.uleb128 0x3d
-	.4byte	.LASF541
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x62e
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x3dc9
-	.4byte	.LASF540
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x3dc9
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x19
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x3db9
-	.uleb128 0x3a
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x62
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3e7f
-	.uleb128 0x43
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x3330
-	.4byte	.LLST117
-	.uleb128 0x1e
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x62e
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x44
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0x537
-	.4byte	.LLST118
-	.uleb128 0x1e
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x62e
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x44
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x2ff
-	.4byte	.LLST119
-	.uleb128 0x3d
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF541
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0x2ff
-	.4byte	.LLST120
-	.uleb128 0x44
-	.4byte	.LASF539
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0x2ff
-	.4byte	.LLST121
-	.uleb128 0x23
-	.4byte	.LVL558
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL571
-	.4byte	0x435a
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF545
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x62
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f26
-	.uleb128 0x43
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x2ff
-	.4byte	.LLST114
-	.uleb128 0x43
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x2ff
-	.4byte	.LLST115
-	.uleb128 0x44
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x3336
-	.4byte	.LLST116
-	.uleb128 0x1e
-	.4byte	.LASF546
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x23e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3943
-	.uleb128 0x23
-	.4byte	.LVL542
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL544
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL547
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL549
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL550
-	.4byte	0x6804
-	.uleb128 0x23
-	.4byte	.LVL551
-	.4byte	0x6804
-	.uleb128 0x23
-	.4byte	.LVL552
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF547
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x3fa5
-	.uleb128 0x3c
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF548
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF549
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF550
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF551
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF552
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x120e
-	.uleb128 0x3d
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x120e
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x308d
-	.4byte	.LASF547
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF554
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x62
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3fec
-	.uleb128 0x43
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x2ff
-	.4byte	.LLST43
-	.uleb128 0x3d
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x120e
-	.4byte	.LLST44
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF555
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x62
-	.4byte	.LFB200
-	.4byte	.LFE200-.LFB200
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4020
-	.uleb128 0x43
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x4020
-	.4byte	.LLST42
-	.uleb128 0x23
-	.4byte	.LVL140
-	.4byte	0x4026
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x120e
-	.uleb128 0x3a
-	.4byte	.LASF557
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x62
-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4086
-	.uleb128 0x43
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x4020
-	.4byte	.LLST39
-	.uleb128 0x43
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x2ff
-	.4byte	.LLST40
-	.uleb128 0x3d
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x120e
-	.4byte	.LLST41
-	.uleb128 0x23
-	.4byte	.LVL134
-	.4byte	0x4086
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF558
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x62
-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x40f3
-	.uleb128 0x43
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x4020
-	.4byte	.LLST37
-	.uleb128 0x43
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x2ff
-	.4byte	.LLST38
-	.uleb128 0x1e
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x120e
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3d
-	.4byte	.LASF559
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x120e
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x4103
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3902
-	.uleb128 0x23
-	.4byte	.LVL126
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x4103
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0x10
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x40f3
-	.uleb128 0x3a
-	.4byte	.LASF560
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x62
-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4175
-	.uleb128 0x43
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x2ff
-	.4byte	.LLST35
-	.uleb128 0x1e
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x120e
-	.uleb128 0x1
-	.byte	0x5c
-	.uleb128 0x1e
-	.4byte	.LASF559
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x120e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1e
-	.4byte	.LASF561
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x3d
-	.4byte	.LASF562
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF563
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF564
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x41ea
-	.uleb128 0x33
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF435
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x120e
-	.uleb128 0x34
-	.4byte	.LASF559
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x120e
-	.uleb128 0x34
-	.4byte	.LASF565
-	.byte	0x2
-	.byte	0xfb
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF566
-	.byte	0x2
-	.byte	0xfc
-	.4byte	0x2ff
-	.uleb128 0x34
-	.4byte	.LASF550
-	.byte	0x2
-	.byte	0xfd
-	.4byte	0x30a
-	.uleb128 0x34
-	.4byte	.LASF567
-	.byte	0x2
-	.byte	0xfe
-	.4byte	0x30a
-	.uleb128 0x34
-	.4byte	.LASF563
-	.byte	0x2
-	.byte	0xff
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF114
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF568
-	.byte	0x2
-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x420f
-	.uleb128 0x33
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd9
-	.4byte	0x2ff
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x4103
-	.4byte	.LASF568
-	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF569
-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x4234
-	.uleb128 0x33
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0x2ff
-	.uleb128 0x40
-	.4byte	.LASF362
-	.4byte	0x4103
-	.4byte	.LASF569
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF570
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0x2ff
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x42b7
-	.uleb128 0x36
-	.ascii	"tmp\000"
-	.byte	0x2
-	.byte	0xb6
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xb7
-	.4byte	0x42b7
-	.uleb128 0x58
-	.4byte	.LASF571
-	.byte	0x2
-	.byte	0xb9
-	.4byte	.L512
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0xd8
-	.4byte	0x4295
-	.uleb128 0x34
-	.4byte	.LASF572
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL462
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL463
-	.4byte	0x1954
-	.byte	0
-	.uleb128 0x59
-	.4byte	0x43a1
-	.4byte	.LBB313
-	.4byte	.Ldebug_ranges0+0xc0
-	.byte	0x2
-	.byte	0xba
-	.uleb128 0x23
-	.4byte	.LVL464
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL465
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0xada
-	.uleb128 0x21
-	.4byte	.LASF573
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x62
-	.4byte	.LFB192
-	.4byte	.LFE192-.LFB192
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4316
-	.uleb128 0x2b
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x2ff
-	.4byte	.LLST25
-	.uleb128 0x36
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0xa4
-	.4byte	0x62
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x36
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0xa5
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xa6
-	.4byte	0x42b7
-	.uleb128 0x59
-	.4byte	0x4395
-	.4byte	.LBB253
-	.4byte	.Ldebug_ranges0+0x58
-	.byte	0x2
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF574
-	.byte	0x2
-	.byte	0x75
-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x435a
-	.uleb128 0x1f
-	.4byte	.LASF114
-	.byte	0x2
-	.byte	0x77
-	.4byte	0x315
-	.uleb128 0x1
-	.byte	0x5c
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x2ff
-	.uleb128 0x49
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x2ff
-	.4byte	.LLST24
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x79
-	.4byte	0x42b7
-	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF575
-	.byte	0x2
-	.byte	0x61
-	.byte	0x1
-	.4byte	0x4395
-	.uleb128 0x27
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x61
-	.4byte	0x2ff
-	.uleb128 0x33
-	.4byte	.LASF576
-	.byte	0x2
-	.byte	0x61
-	.4byte	0x2ff
-	.uleb128 0x28
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x66
-	.4byte	0x42b7
-	.uleb128 0x28
-	.uleb128 0x34
-	.4byte	.LASF572
-	.byte	0x2
-	.byte	0x68
-	.4byte	0x2ff
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF577
-	.byte	0x2
-	.byte	0x5c
-	.4byte	0x2ff
-	.byte	0x1
-	.uleb128 0x5a
-	.4byte	.LASF578
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x2ff
-	.byte	0x1
-	.uleb128 0x21
-	.4byte	.LASF579
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x2ff
-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x442c
-	.uleb128 0x2b
-	.ascii	"max\000"
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x2ff
-	.4byte	.LLST23
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x4d
-	.4byte	0x42b7
-	.uleb128 0x5b
-	.4byte	0x17c6
-	.4byte	.LBB244
-	.4byte	.Ldebug_ranges0+0x38
-	.byte	0x2
-	.byte	0x53
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x38
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x38
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x23
-	.4byte	.LVL71
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF580
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x62
-	.4byte	.LFB186
-	.4byte	.LFE186-.LFB186
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x44c4
-	.uleb128 0x22
-	.4byte	.LASF178
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x30a
-	.4byte	.LLST84
-	.uleb128 0x22
-	.4byte	.LASF356
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x62
-	.4byte	.LLST85
-	.uleb128 0x36
-	.ascii	"req\000"
-	.byte	0x2
-	.byte	0x30
-	.4byte	0x32b
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -120
-	.uleb128 0x36
-	.ascii	"low\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x320
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x1f
-	.4byte	.LASF581
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x320
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"mid\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x320
-	.uleb128 0x1f
-	.4byte	.LASF582
-	.byte	0x2
-	.byte	0x32
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x34
-	.4byte	.LASF583
-	.byte	0x2
-	.byte	0x33
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL367
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL370
-	.4byte	0x1af9
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF584
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30a
-	.4byte	.LFB185
-	.4byte	.LFE185-.LFB185
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4507
-	.uleb128 0x22
-	.4byte	.LASF585
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30a
-	.4byte	.LLST22
-	.uleb128 0x4b
-	.4byte	.LASF586
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x36
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0x20
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF587
-	.byte	0x2
-	.byte	0x14
-	.4byte	0x2ff
-	.4byte	.LFB184
-	.4byte	.LFE184-.LFB184
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x453b
-	.uleb128 0x22
-	.4byte	.LASF378
-	.byte	0x2
-	.byte	0x14
-	.4byte	0x2ff
-	.4byte	.LLST21
-	.uleb128 0x34
-	.4byte	.LASF500
-	.byte	0x2
-	.byte	0x16
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF588
-	.byte	0x2
-	.byte	0xc
-	.4byte	0x2ff
-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x456f
-	.uleb128 0x22
-	.4byte	.LASF378
-	.byte	0x2
-	.byte	0xc
-	.4byte	0x2ff
-	.4byte	.LLST20
-	.uleb128 0x34
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0xe
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF589
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x2ff
-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45b2
-	.uleb128 0x22
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x2ff
-	.4byte	.LLST18
-	.uleb128 0x22
-	.4byte	.LASF500
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x2ff
-	.4byte	.LLST19
-	.uleb128 0x34
-	.4byte	.LASF392
-	.byte	0x2
-	.byte	0x6
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF590
-	.byte	0x4
-	.2byte	0x13c
-	.4byte	0x315
-	.4byte	.LFB181
-	.4byte	.LFE181-.LFB181
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4774
-	.uleb128 0x50
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x13e
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x3e
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x13f
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF352
-	.byte	0x4
-	.2byte	0x140
-	.4byte	0x30a
-	.4byte	.LLST210
-	.uleb128 0x3d
-	.4byte	.LASF591
-	.byte	0x4
-	.2byte	0x142
-	.4byte	0x4774
-	.uleb128 0x3f
-	.4byte	.LASF592
-	.byte	0x4
-	.2byte	0x158
-	.uleb128 0x4e
-	.4byte	0x17c6
-	.4byte	.LBB488
-	.4byte	.Ldebug_ranges0+0x240
-	.byte	0x4
-	.2byte	0x15e
-	.4byte	0x465c
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL1085
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB494
-	.4byte	.LBE494-.LBB494
-	.byte	0x4
-	.2byte	0x15f
-	.4byte	0x46b6
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB495
-	.4byte	.LBE495-.LBB495
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB496
-	.4byte	.LBE496-.LBB496
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL1086
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1072
-	.4byte	0x48d8
-	.uleb128 0x23
-	.4byte	.LVL1073
-	.4byte	0x477a
-	.uleb128 0x23
-	.4byte	.LVL1074
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL1075
-	.4byte	0x1900
-	.uleb128 0x23
-	.4byte	.LVL1076
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1078
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1079
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1081
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1082
-	.4byte	0x180a
-	.uleb128 0x23
-	.4byte	.LVL1083
-	.4byte	0x4a38
-	.uleb128 0x23
-	.4byte	.LVL1084
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL1088
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1089
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL1090
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1092
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1093
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1094
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL1095
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1096
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL1097
-	.4byte	0x493b
-	.uleb128 0x23
-	.4byte	.LVL1098
-	.4byte	0x493b
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x6fe
-	.uleb128 0x3a
-	.4byte	.LASF593
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x62
-	.4byte	.LFB180
-	.4byte	.LFE180-.LFB180
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47d8
-	.uleb128 0x50
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x118
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x51
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0x2ff
-	.4byte	.LLST82
-	.uleb128 0x44
-	.4byte	.LASF594
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0x30a
-	.4byte	.LLST83
-	.uleb128 0x3d
-	.4byte	.LASF591
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x4774
-	.uleb128 0x23
-	.4byte	.LVL362
-	.4byte	0x1af9
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF595
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x62
-	.4byte	.LFB179
-	.4byte	.LFE179-.LFB179
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4888
-	.uleb128 0x49
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xae
-	.4byte	0x30a
-	.4byte	.LLST207
-	.uleb128 0x49
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0x2ff
-	.4byte	.LLST208
-	.uleb128 0x2c
-	.4byte	.LASF488
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0x320
-	.4byte	.LLST209
-	.uleb128 0x34
-	.4byte	.LASF591
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x4774
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x4898
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3749
-	.uleb128 0x23
-	.4byte	.LVL1051
-	.4byte	0x48d8
-	.uleb128 0x23
-	.4byte	.LVL1053
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1054
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1055
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1056
-	.4byte	0x442c
-	.uleb128 0x23
-	.4byte	.LVL1058
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1059
-	.4byte	0x5862
-	.uleb128 0x23
-	.4byte	.LVL1065
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1069
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x4898
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xa
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x4888
-	.uleb128 0x21
-	.4byte	.LASF596
-	.byte	0x4
-	.byte	0x9c
-	.4byte	0x2ff
-	.4byte	.LFB178
-	.4byte	.LFE178-.LFB178
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x48d8
-	.uleb128 0x29
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0x9e
-	.4byte	0x2ff
-	.uleb128 0x1f
-	.4byte	.LASF597
-	.byte	0x4
-	.byte	0x9f
-	.4byte	0x2ff
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x23
-	.4byte	.LVL50
-	.4byte	0x4a9e
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF598
-	.byte	0x4
-	.byte	0x94
-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x493b
-	.uleb128 0x5b
-	.4byte	0x17c6
-	.4byte	.LBB233
-	.4byte	.Ldebug_ranges0+0x20
-	.byte	0x4
-	.byte	0x98
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x20
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x20
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x23
-	.4byte	.LVL49
-	.4byte	0x67e3
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF599
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x62
-	.4byte	.LFB176
-	.4byte	.LFE176-.LFB176
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4a38
-	.uleb128 0x49
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x51
-	.4byte	0x62
-	.4byte	.LLST175
-	.uleb128 0x2c
-	.4byte	.LASF600
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x62
-	.4byte	.LLST176
-	.uleb128 0x2c
-	.4byte	.LASF591
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x4774
-	.4byte	.LLST177
-	.uleb128 0x2c
-	.4byte	.LASF504
-	.byte	0x4
-	.byte	0x54
-	.4byte	0x2ff
-	.4byte	.LLST178
-	.uleb128 0x46
-	.4byte	.LASF601
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x5c
-	.4byte	.LASF362
-	.4byte	0x1af4
-	.uleb128 0x2d
-	.4byte	0x17c6
-	.4byte	.LBB442
-	.4byte	.Ldebug_ranges0+0x1a0
-	.byte	0x4
-	.byte	0x5f
-	.4byte	0x49ef
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1a0
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1a0
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL839
-	.4byte	0x67e3
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL835
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL840
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL841
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL842
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL843
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL846
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL847
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL849
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF602
-	.byte	0x4
-	.byte	0x41
-	.4byte	.LFB175
-	.4byte	.LFE175-.LFB175
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4a96
-	.uleb128 0x22
-	.4byte	.LASF536
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x62e
-	.4byte	.LLST112
-	.uleb128 0x22
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x537
-	.4byte	.LLST113
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0x30a
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x29d6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3706
-	.uleb128 0x23
-	.4byte	.LVL537
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL538
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF604
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x2a
-	.4byte	.LASF605
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x62
-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4af9
-	.uleb128 0x22
-	.4byte	.LASF178
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x2ff
-	.4byte	.LLST15
-	.uleb128 0x49
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x19
-	.4byte	0x30a
-	.4byte	.LLST16
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0x30a
-	.uleb128 0x34
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0x537
-	.uleb128 0x2c
-	.4byte	.LASF369
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0x2ff
-	.4byte	.LLST17
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF606
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x62
-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b4e
-	.uleb128 0x22
-	.4byte	.LASF178
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x2ff
-	.4byte	.LLST14
-	.uleb128 0x36
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x34
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x537
-	.uleb128 0x34
-	.4byte	.LASF369
-	.byte	0x4
-	.byte	0x8
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL40
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x5e
-	.4byte	.LASF668
-	.byte	0x3
-	.2byte	0x4bd
-	.4byte	0x30a
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x3a
-	.4byte	.LASF607
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x62
-	.4byte	.LFB170
-	.4byte	.LFE170-.LFB170
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4bb8
-	.uleb128 0x43
-	.4byte	.LASF93
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x97
-	.4byte	.LLST283
-	.uleb128 0x43
-	.4byte	.LASF114
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x97
-	.4byte	.LLST284
-	.uleb128 0x4d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x4bb8
-	.4byte	.LLST285
-	.uleb128 0x23
-	.4byte	.LVL1550
-	.4byte	0x4ce4
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x77
-	.uleb128 0x3a
-	.4byte	.LASF608
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x62
-	.4byte	.LFB169
-	.4byte	.LFE169-.LFB169
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4c12
-	.uleb128 0x43
-	.4byte	.LASF93
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x97
-	.4byte	.LLST269
-	.uleb128 0x43
-	.4byte	.LASF114
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x97
-	.4byte	.LLST270
-	.uleb128 0x4d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x4bb8
-	.4byte	.LLST271
-	.uleb128 0x23
-	.4byte	.LVL1436
-	.4byte	0x506e
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF609
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x62
-	.4byte	.LFB168
-	.4byte	.LFE168-.LFB168
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4ce4
-	.uleb128 0x43
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x30a
-	.4byte	.LLST234
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x30a
-	.4byte	.LLST235
-	.uleb128 0x44
-	.4byte	.LASF517
-	.byte	0x3
-	.2byte	0x486
-	.4byte	0x2ff
-	.4byte	.LLST236
-	.uleb128 0x3e
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x487
-	.4byte	0x2ff
-	.uleb128 0x51
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x488
-	.4byte	0x30a
-	.4byte	.LLST237
-	.uleb128 0x44
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x30a
-	.4byte	.LLST238
-	.uleb128 0x44
-	.4byte	.LASF423
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x30a
-	.4byte	.LLST239
-	.uleb128 0x3d
-	.4byte	.LASF412
-	.byte	0x3
-	.2byte	0x48a
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL1219
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1225
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1226
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1227
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1228
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1231
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1232
-	.4byte	0x2331
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF610
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x62
-	.4byte	.LFB167
-	.4byte	.LFE167-.LFB167
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f11
-	.uleb128 0x4d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2f4
-	.4byte	.LLST272
-	.uleb128 0x43
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x30a
-	.4byte	.LLST273
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x30a
-	.4byte	.LLST274
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x3853
-	.4byte	.LLST275
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x1d42
-	.uleb128 0x51
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30a
-	.4byte	.LLST276
-	.uleb128 0x44
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30a
-	.4byte	.LLST277
-	.uleb128 0x44
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30a
-	.4byte	.LLST278
-	.uleb128 0x44
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x30a
-	.4byte	.LLST279
-	.uleb128 0x3e
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x30a
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30a
-	.4byte	.LLST280
-	.uleb128 0x44
-	.4byte	.LASF613
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30a
-	.4byte	.LLST281
-	.uleb128 0x3d
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF614
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x30a
-	.uleb128 0x3d
-	.4byte	.LASF615
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x30a
-	.uleb128 0x44
-	.4byte	.LASF422
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x12be
-	.4byte	.LLST282
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x39f4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3642
-	.uleb128 0x52
-	.4byte	.LBB539
-	.4byte	.LBE539-.LBB539
-	.4byte	0x4e2f
-	.uleb128 0x1e
-	.4byte	.LASF385
-	.byte	0x3
-	.2byte	0x43d
-	.4byte	0x32b
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x23
-	.4byte	.LVL1525
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1526
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1527
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1440
-	.4byte	0x3859
-	.uleb128 0x23
-	.4byte	.LVL1452
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1461
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1463
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1464
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1465
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1468
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1472
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1478
-	.4byte	0x1c75
-	.uleb128 0x23
-	.4byte	.LVL1480
-	.4byte	0x3fa5
-	.uleb128 0x23
-	.4byte	.LVL1481
-	.4byte	0x1e70
-	.uleb128 0x23
-	.4byte	.LVL1482
-	.4byte	0x1c75
-	.uleb128 0x23
-	.4byte	.LVL1483
-	.4byte	0x1c75
-	.uleb128 0x23
-	.4byte	.LVL1489
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1495
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1497
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1500
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1501
-	.4byte	0x23e7
-	.uleb128 0x23
-	.4byte	.LVL1502
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1517
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1530
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1533
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1536
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LVL1543
-	.4byte	0x4f35
-	.uleb128 0x23
-	.4byte	.LVL1545
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF616
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x62
-	.4byte	.LFB166
-	.4byte	.LFE166-.LFB166
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f35
-	.uleb128 0x23
-	.4byte	.LVL1209
-	.4byte	0x4f35
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF617
-	.byte	0x3
-	.2byte	0x387
-	.4byte	.LFB165
-	.4byte	.LFE165-.LFB165
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5059
-	.uleb128 0x4d
-	.ascii	"req\000"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xf3e
-	.4byte	.LLST227
-	.uleb128 0x43
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x30a
-	.4byte	.LLST228
-	.uleb128 0x43
-	.4byte	.LASF618
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x30a
-	.4byte	.LLST229
-	.uleb128 0x43
-	.4byte	.LASF422
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x12be
-	.4byte	.LLST230
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0x30a
-	.4byte	.LLST231
-	.uleb128 0x51
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x30a
-	.4byte	.LLST232
-	.uleb128 0x44
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x30a
-	.4byte	.LLST233
-	.uleb128 0x3d
-	.4byte	.LASF405
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF380
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x1d42
-	.uleb128 0x3d
-	.4byte	.LASF470
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0x30a
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x5069
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3614
-	.uleb128 0x23
-	.4byte	.LVL1188
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1190
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1191
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1192
-	.4byte	0x1e14
-	.uleb128 0x23
-	.4byte	.LVL1193
-	.4byte	0x23e7
-	.uleb128 0x23
-	.4byte	.LVL1194
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL1196
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1198
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1200
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1203
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1204
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1207
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x3a
-	.4byte	0x5069
-	.uleb128 0x16
-	.4byte	0x2c
-	.byte	0xc
-	.byte	0
-	.uleb128 0x3
-	.4byte	0x5059
-	.uleb128 0x4c
-	.4byte	.LASF619
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x62
-	.4byte	.LFB164
-	.4byte	.LFE164-.LFB164
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x524b
-	.uleb128 0x4d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2f4
-	.4byte	.LLST254
-	.uleb128 0x43
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x30a
-	.4byte	.LLST255
-	.uleb128 0x43
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x30a
-	.4byte	.LLST256
-	.uleb128 0x43
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x3853
-	.4byte	.LLST257
-	.uleb128 0x3e
-	.ascii	"ret\000"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x62
-	.uleb128 0x44
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30a
-	.4byte	.LLST258
-	.uleb128 0x44
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30a
-	.4byte	.LLST259
-	.uleb128 0x44
-	.4byte	.LASF620
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30a
-	.4byte	.LLST260
-	.uleb128 0x51
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x30a
-	.4byte	.LLST261
-	.uleb128 0x51
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x30a
-	.4byte	.LLST262
-	.uleb128 0x51
-	.ascii	"n\000"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30a
-	.4byte	.LLST263
-	.uleb128 0x44
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30a
-	.4byte	.LLST264
-	.uleb128 0x44
-	.4byte	.LASF613
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30a
-	.4byte	.LLST265
-	.uleb128 0x44
-	.4byte	.LASF621
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x30a
-	.4byte	.LLST266
-	.uleb128 0x3d
-	.4byte	.LASF622
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x30a
-	.uleb128 0x44
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0x30a
-	.4byte	.LLST267
-	.uleb128 0x44
-	.4byte	.LASF624
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0x30a
-	.4byte	.LLST268
-	.uleb128 0x52
-	.4byte	.LBB538
-	.4byte	.LBE538-.LBB538
-	.4byte	0x51ba
-	.uleb128 0x3d
-	.4byte	.LASF392
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0x2ff
-	.uleb128 0x23
-	.4byte	.LVL1424
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL1425
-	.4byte	0x1e70
-	.byte	0
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB535
-	.4byte	.LBE535-.LBB535
-	.byte	0x3
-	.2byte	0x350
-	.4byte	0x5214
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB536
-	.4byte	.LBE536-.LBB536
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB537
-	.4byte	.LBE537-.LBB537
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL1409
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1373
-	.4byte	0x3783
-	.uleb128 0x23
-	.4byte	.LVL1379
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1394
-	.4byte	0x1c75
-	.uleb128 0x23
-	.4byte	.LVL1397
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1414
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1422
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF625
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x62
-	.4byte	.LFB163
-	.4byte	.LFE163-.LFB163
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x526f
-	.uleb128 0x23
-	.4byte	.LVL1214
-	.4byte	0x526f
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF626
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x62
-	.4byte	.LFB162
-	.4byte	.LFE162-.LFB162
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x52ae
-	.uleb128 0x23
-	.4byte	.LVL1210
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1211
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1212
-	.4byte	0x3736
-	.uleb128 0x23
-	.4byte	.LVL1213
-	.4byte	0x3593
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF627
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x62
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x533d
-	.uleb128 0x3d
-	.4byte	.LASF628
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x533d
-	.uleb128 0x3f
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x2f3
-	.uleb128 0x52
-	.4byte	.LBB547
-	.4byte	.LBE547-.LBB547
-	.4byte	0x52fd
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0x30a
-	.uleb128 0x23
-	.4byte	.LVL1634
-	.4byte	0x1c75
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1627
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1628
-	.4byte	0x5811
-	.uleb128 0x23
-	.4byte	.LVL1629
-	.4byte	0x5689
-	.uleb128 0x23
-	.4byte	.LVL1630
-	.4byte	0x558d
-	.uleb128 0x23
-	.4byte	.LVL1631
-	.4byte	0x43ad
-	.uleb128 0x23
-	.4byte	.LVL1632
-	.4byte	0x47d8
-	.uleb128 0x23
-	.4byte	.LVL1633
-	.4byte	0x2818
-	.byte	0
-	.uleb128 0x7
-	.byte	0x4
-	.4byte	0x417
-	.uleb128 0x4c
-	.4byte	.LASF630
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x62
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x543c
-	.uleb128 0x3d
-	.4byte	.LASF500
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF631
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x2ff
-	.4byte	.LLST288
-	.uleb128 0x44
-	.4byte	.LASF632
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0x2ff
-	.4byte	.LLST289
-	.uleb128 0x3e
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0x2ff
-	.uleb128 0x47
-	.4byte	.LASF633
-	.byte	0x3
-	.2byte	0x2bc
-	.4byte	.L1756
-	.uleb128 0x47
-	.4byte	.LASF634
-	.byte	0x3
-	.2byte	0x2cc
-	.4byte	.L1758
-	.uleb128 0x23
-	.4byte	.LVL1596
-	.4byte	0x43ad
-	.uleb128 0x23
-	.4byte	.LVL1597
-	.4byte	0x47d8
-	.uleb128 0x23
-	.4byte	.LVL1598
-	.4byte	0x45b2
-	.uleb128 0x23
-	.4byte	.LVL1605
-	.4byte	0x493b
-	.uleb128 0x23
-	.4byte	.LVL1606
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1607
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL1608
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1610
-	.4byte	0x543c
-	.uleb128 0x23
-	.4byte	.LVL1614
-	.4byte	0x5862
-	.uleb128 0x23
-	.4byte	.LVL1615
-	.4byte	0x43ad
-	.uleb128 0x23
-	.4byte	.LVL1617
-	.4byte	0x543c
-	.uleb128 0x23
-	.4byte	.LVL1619
-	.4byte	0x543c
-	.uleb128 0x23
-	.4byte	.LVL1623
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1624
-	.4byte	0x4234
-	.uleb128 0x23
-	.4byte	.LVL1625
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1626
-	.4byte	0x2818
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF635
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x62
-	.4byte	.LFB159
-	.4byte	.LFE159-.LFB159
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5563
-	.uleb128 0x43
-	.4byte	.LASF500
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2ff
-	.4byte	.LLST96
-	.uleb128 0x43
-	.4byte	.LASF636
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2f4
-	.4byte	.LLST97
-	.uleb128 0x44
-	.4byte	.LASF631
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x2ff
-	.4byte	.LLST98
-	.uleb128 0x3d
-	.4byte	.LASF357
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF376
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x2ff
-	.uleb128 0x44
-	.4byte	.LASF637
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0x2ff
-	.4byte	.LLST99
-	.uleb128 0x44
-	.4byte	.LASF638
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0x2ff
-	.4byte	.LLST100
-	.uleb128 0x44
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0x2ff
-	.4byte	.LLST101
-	.uleb128 0x44
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0x2ff
-	.4byte	.LLST102
-	.uleb128 0x47
-	.4byte	.LASF641
-	.byte	0x3
-	.2byte	0x240
-	.4byte	.L478
-	.uleb128 0x23
-	.4byte	.LVL419
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL430
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL439
-	.4byte	0x1954
-	.uleb128 0x23
-	.4byte	.LVL441
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL442
-	.4byte	0x5563
-	.uleb128 0x23
-	.4byte	.LVL443
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL448
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL451
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL452
-	.4byte	0x5563
-	.uleb128 0x23
-	.4byte	.LVL453
-	.4byte	0x4a9e
-	.uleb128 0x23
-	.4byte	.LVL458
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL461
-	.4byte	0x435a
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF642
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x62
-	.byte	0x1
-	.4byte	0x558d
-	.uleb128 0x3c
-	.4byte	.LASF178
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x2ff
-	.uleb128 0x3d
-	.4byte	.LASF643
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0x2ff
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF644
-	.byte	0x3
-	.2byte	0x1ec
-	.4byte	0x62
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5689
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB431
-	.4byte	.LBE431-.LBB431
-	.byte	0x3
-	.2byte	0x1f9
-	.4byte	0x5601
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB432
-	.4byte	.LBE432-.LBB432
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB433
-	.4byte	.LBE433-.LBB433
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL775
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.4byte	0x17c6
-	.4byte	.LBB434
-	.4byte	.LBE434-.LBB434
-	.byte	0x3
-	.2byte	0x1fa
-	.4byte	0x565b
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB435
-	.4byte	.LBE435-.LBB435
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB436
-	.4byte	.LBE436-.LBB436
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL776
-	.4byte	0x67f9
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL772
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL773
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL774
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL777
-	.4byte	0x2312
-	.uleb128 0x23
-	.4byte	.LVL778
-	.4byte	0x31c7
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF645
-	.byte	0x3
-	.2byte	0x116
-	.4byte	0x62
-	.4byte	.LFB156
-	.4byte	.LFE156-.LFB156
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5811
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x118
-	.4byte	0x30a
-	.4byte	.LLST111
-	.uleb128 0x3d
-	.4byte	.LASF646
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0x30a
-	.uleb128 0x37
-	.4byte	.LASF362
-	.4byte	0x4898
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.3490
-	.uleb128 0x23
-	.4byte	.LVL494
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL495
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL496
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL497
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL498
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL499
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL500
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL501
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL502
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL503
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL504
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL505
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL506
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL507
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL508
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL509
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL510
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL511
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL512
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL513
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL514
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL515
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL516
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL517
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL518
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL519
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL520
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL521
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL522
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL523
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL524
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL525
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL526
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL527
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL528
-	.4byte	0x680f
-	.uleb128 0x23
-	.4byte	.LVL531
-	.4byte	0x67ee
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF647
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x62
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5862
-	.uleb128 0x22
-	.4byte	.LASF628
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x533d
-	.4byte	.LLST11
-	.uleb128 0x49
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xb8
-	.4byte	0x30a
-	.4byte	.LLST12
-	.uleb128 0x23
-	.4byte	.LVL27
-	.4byte	0x58a3
-	.uleb128 0x23
-	.4byte	.LVL28
-	.4byte	0x58a3
-	.uleb128 0x23
-	.4byte	.LVL32
-	.4byte	0x5862
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF648
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x62
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x588b
-	.uleb128 0x22
-	.4byte	.LASF649
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x2ff
-	.4byte	.LLST10
-	.byte	0
-	.uleb128 0x57
-	.4byte	.LASF650
-	.byte	0x3
-	.byte	0x9e
-	.byte	0x1
-	.4byte	0x58a3
-	.uleb128 0x33
-	.4byte	.LASF651
-	.byte	0x3
-	.byte	0x9e
-	.4byte	0x30a
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF652
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x2ff
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x58e2
-	.uleb128 0x2b
-	.ascii	"num\000"
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x30a
-	.4byte	.LLST9
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x80
-	.4byte	0x2ff
-	.uleb128 0x1f
-	.4byte	.LASF653
-	.byte	0x3
-	.byte	0x81
-	.4byte	0x30a
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF654
-	.byte	0x3
-	.byte	0x70
-	.4byte	0x62
-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5928
-	.uleb128 0x22
-	.4byte	.LASF85
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xb4
-	.4byte	.LLST61
-	.uleb128 0x29
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0x72
-	.4byte	0xb4
-	.uleb128 0x23
-	.4byte	.LVL276
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL277
-	.4byte	0x5928
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF655
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x62
-	.4byte	.LFB150
-	.4byte	.LFE150-.LFB150
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c1e
-	.uleb128 0x22
-	.4byte	.LASF85
-	.byte	0x3
-	.byte	0xa
-	.4byte	0xb4
-	.4byte	.LLST58
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xc
-	.4byte	0x62
-	.uleb128 0x29
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0xb4
-	.uleb128 0x52
-	.4byte	.LBB285
-	.4byte	.LBE285-.LBB285
-	.4byte	0x5993
-	.uleb128 0x2c
-	.4byte	.LASF392
-	.byte	0x3
-	.byte	0x56
-	.4byte	0x2ff
-	.4byte	.LLST59
-	.uleb128 0x23
-	.4byte	.LVL267
-	.4byte	0x3fa5
-	.uleb128 0x23
-	.4byte	.LVL269
-	.4byte	0x681a
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LBB286
-	.4byte	.LBE286-.LBB286
-	.4byte	0x59b9
-	.uleb128 0x2c
-	.4byte	.LASF392
-	.byte	0x3
-	.byte	0x5f
-	.4byte	0x2ff
-	.4byte	.LLST60
-	.uleb128 0x23
-	.4byte	.LVL273
-	.4byte	0x681a
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL197
-	.4byte	0x6826
-	.uleb128 0x23
-	.4byte	.LVL198
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL199
-	.4byte	0x6826
-	.uleb128 0x23
-	.4byte	.LVL200
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL201
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL202
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL203
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL204
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL205
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL206
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL207
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL208
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL209
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL210
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL211
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL212
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL213
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL214
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL215
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL216
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL217
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL218
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL219
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL220
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL221
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL222
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL223
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL224
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL225
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL226
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL227
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL228
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL229
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL230
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL231
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL232
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL233
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL234
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL235
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL236
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL237
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL238
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL239
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL240
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL241
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL242
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL243
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL244
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL245
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL246
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL247
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL248
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL249
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL250
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL251
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL252
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL253
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL254
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL255
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL256
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL257
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL258
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL259
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL260
-	.4byte	0x278e
-	.uleb128 0x23
-	.4byte	.LVL261
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL262
-	.4byte	0x273f
-	.uleb128 0x23
-	.4byte	.LVL263
-	.4byte	0x681a
-	.uleb128 0x23
-	.4byte	.LVL266
-	.4byte	0x681a
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x3416
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c40
-	.uleb128 0x60
-	.4byte	0x3423
-	.4byte	.LLST8
-	.uleb128 0x2e
-	.4byte	0x342f
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x588b
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c5b
-	.uleb128 0x61
-	.4byte	0x5897
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x5563
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-	.4byte	.LFE158-.LFB158
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c93
-	.uleb128 0x60
-	.4byte	0x5574
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-	.uleb128 0x30
-	.4byte	0x5580
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x2e
-	.4byte	0x5574
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x30
-	.4byte	0x5c77
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x62
-	.4byte	0x4a96
-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x62
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-	.4byte	.LFE188-.LFB188
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x62
-	.4byte	0x4395
-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x5f
-	.4byte	0x4175
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d5a
-	.uleb128 0x60
-	.4byte	0x4185
-	.4byte	.LLST26
-	.uleb128 0x30
-	.4byte	0x4190
-	.uleb128 0x30
-	.4byte	0x419b
-	.uleb128 0x30
-	.4byte	0x41a6
-	.uleb128 0x30
-	.4byte	0x41b1
-	.uleb128 0x30
-	.4byte	0x41bc
-	.uleb128 0x30
-	.4byte	0x41c7
-	.uleb128 0x30
-	.4byte	0x41d2
-	.uleb128 0x30
-	.4byte	0x41dd
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x70
-	.uleb128 0x2e
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-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x70
-	.uleb128 0x63
-	.4byte	0x5cdc
-	.4byte	.LLST27
-	.uleb128 0x63
-	.4byte	0x5ce1
-	.4byte	.LLST28
-	.uleb128 0x63
-	.4byte	0x5ce6
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-	.uleb128 0x63
-	.4byte	0x5ceb
-	.4byte	.LLST30
-	.uleb128 0x63
-	.4byte	0x5cf0
-	.4byte	.LLST31
-	.uleb128 0x63
-	.4byte	0x5cf5
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-	.uleb128 0x30
-	.4byte	0x5cfa
-	.uleb128 0x63
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-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x41ea
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-	.4byte	.LFE195-.LFB195
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5db0
-	.uleb128 0x60
-	.4byte	0x41f6
-	.4byte	.LLST34
-	.uleb128 0x30
-	.4byte	0x4201
-	.uleb128 0x52
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-	.4byte	.LBE265-.LBB265
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-	.uleb128 0x2e
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-	.uleb128 0x32
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-	.uleb128 0x30
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-	.uleb128 0x23
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-	.4byte	.LFE202-.LFB202
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-	.byte	0x9c
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-	.uleb128 0x60
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x30
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-	.uleb128 0x32
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-	.uleb128 0x63
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-	.uleb128 0x1
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-	.uleb128 0x30
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-	.uleb128 0x23
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-	.uleb128 0x23
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-	.byte	0
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-	.uleb128 0x60
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-	.uleb128 0x30
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-	.uleb128 0x2f
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-	.uleb128 0x2e
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-	.uleb128 0x2f
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-	.byte	0
-	.byte	0
-	.uleb128 0x5f
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-	.4byte	0x17e8
-	.4byte	.LLST110
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x140
-	.4byte	0x6207
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LBB377
-	.4byte	.LBE377-.LBB377
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x32
-	.4byte	.LBB378
-	.4byte	.LBE378-.LBB378
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x23
-	.4byte	.LVL493
-	.4byte	0x67e3
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x1d5d
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62d8
-	.uleb128 0x64
-	.4byte	0x1d6e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.4byte	0x1d7a
-	.uleb128 0x30
-	.4byte	0x1d84
-	.uleb128 0x30
-	.4byte	0x1d90
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x188
-	.4byte	0x62c8
-	.uleb128 0x30
-	.4byte	0x6251
-	.uleb128 0x30
-	.4byte	0x6258
-	.uleb128 0x63
-	.4byte	0x625d
-	.4byte	.LLST143
-	.uleb128 0x64
-	.4byte	0x6262
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x52
-	.4byte	.LBB399
-	.4byte	.LBE399-.LBB399
-	.4byte	0x62be
-	.uleb128 0x64
-	.4byte	0x1da1
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x23
-	.4byte	.LVL663
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL664
-	.4byte	0x4507
-	.uleb128 0x23
-	.4byte	.LVL665
-	.4byte	0x1e70
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL662
-	.4byte	0x392e
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LBB402
-	.4byte	.LBE402-.LBB402
-	.uleb128 0x30
-	.4byte	0x1daf
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x1dbd
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6363
-	.uleb128 0x60
-	.4byte	0x1dce
-	.4byte	.LLST184
-	.uleb128 0x30
-	.4byte	0x1dda
-	.uleb128 0x30
-	.4byte	0x1de6
-	.uleb128 0x30
-	.4byte	0x1df0
-	.uleb128 0x30
-	.4byte	0x1dfa
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1d8
-	.uleb128 0x2e
-	.4byte	0x1dce
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1d8
-	.uleb128 0x30
-	.4byte	0x62f4
-	.uleb128 0x64
-	.4byte	0x62f9
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x63
-	.4byte	0x62fe
-	.4byte	.LLST185
-	.uleb128 0x64
-	.4byte	0x6303
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x23
-	.4byte	.LVL890
-	.4byte	0x456f
-	.uleb128 0x23
-	.4byte	.LVL891
-	.4byte	0x1e07
-	.uleb128 0x23
-	.4byte	.LVL892
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL893
-	.4byte	0x4af9
-	.uleb128 0x23
-	.4byte	.LVL894
-	.4byte	0x493b
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x23a7
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x63dd
-	.uleb128 0x60
-	.4byte	0x23b8
-	.4byte	.LLST186
-	.uleb128 0x30
-	.4byte	0x23c4
-	.uleb128 0x52
-	.4byte	.LBB463
-	.4byte	.LBE463-.LBB463
-	.4byte	0x63d3
-	.uleb128 0x2e
-	.4byte	0x23b8
-	.uleb128 0x32
-	.4byte	.LBB464
-	.4byte	.LBE464-.LBB464
-	.uleb128 0x30
-	.4byte	0x637f
-	.uleb128 0x23
-	.4byte	.LVL899
-	.4byte	0x4086
-	.uleb128 0x23
-	.4byte	.LVL900
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL901
-	.4byte	0x2677
-	.uleb128 0x23
-	.4byte	.LVL902
-	.4byte	0x1dbd
-	.uleb128 0x23
-	.4byte	.LVL903
-	.4byte	0x67ee
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL904
-	.4byte	0x3f26
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x3658
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6455
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1f0
-	.uleb128 0x63
-	.4byte	0x3666
-	.4byte	.LLST188
-	.uleb128 0x63
-	.4byte	0x3672
-	.4byte	.LLST189
-	.uleb128 0x63
-	.4byte	0x367e
-	.4byte	.LLST190
-	.uleb128 0x64
-	.4byte	0x368a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x30
-	.4byte	0x3696
-	.uleb128 0x23
-	.4byte	.LVL911
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL912
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL915
-	.4byte	0x17c6
-	.uleb128 0x23
-	.4byte	.LVL917
-	.4byte	0x23e7
-	.uleb128 0x23
-	.4byte	.LVL918
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LVL919
-	.4byte	0x2331
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x2b86
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6472
-	.uleb128 0x23
-	.4byte	.LVL1114
-	.4byte	0x3859
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x343c
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x64a1
-	.uleb128 0x23
-	.4byte	.LVL1141
-	.4byte	0x3783
-	.uleb128 0x23
-	.4byte	.LVL1142
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1143
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x1f72
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x64d0
-	.uleb128 0x23
-	.4byte	.LVL1265
-	.4byte	0x1f7b
-	.uleb128 0x23
-	.4byte	.LVL1266
-	.4byte	0x36a4
-	.uleb128 0x23
-	.4byte	.LVL1267
-	.4byte	0x20c7
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x1c75
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x66c1
-	.uleb128 0x60
-	.4byte	0x1c86
-	.4byte	.LLST245
-	.uleb128 0x60
-	.4byte	0x1c92
-	.4byte	.LLST246
-	.uleb128 0x30
-	.4byte	0x1c9e
-	.uleb128 0x30
-	.4byte	0x1caa
-	.uleb128 0x30
-	.4byte	0x1cb6
-	.uleb128 0x30
-	.4byte	0x1cc2
-	.uleb128 0x30
-	.4byte	0x1cce
-	.uleb128 0x30
-	.4byte	0x1cda
-	.uleb128 0x30
-	.4byte	0x1ce6
-	.uleb128 0x30
-	.4byte	0x1cf2
-	.uleb128 0x30
-	.4byte	0x1cfe
-	.uleb128 0x30
-	.4byte	0x1d0a
-	.uleb128 0x30
-	.4byte	0x1d26
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x258
-	.4byte	0x66b7
-	.uleb128 0x2e
-	.4byte	0x1c92
-	.uleb128 0x2e
-	.4byte	0x1c86
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x258
-	.uleb128 0x63
-	.4byte	0x64f5
-	.4byte	.LLST247
-	.uleb128 0x63
-	.4byte	0x64fa
-	.4byte	.LLST248
-	.uleb128 0x63
-	.4byte	0x64ff
-	.4byte	.LLST249
-	.uleb128 0x30
-	.4byte	0x6504
-	.uleb128 0x30
-	.4byte	0x6509
-	.uleb128 0x30
-	.4byte	0x650e
-	.uleb128 0x63
-	.4byte	0x6513
-	.4byte	.LLST250
-	.uleb128 0x63
-	.4byte	0x6518
-	.4byte	.LLST251
-	.uleb128 0x63
-	.4byte	0x651d
-	.4byte	.LLST252
-	.uleb128 0x63
-	.4byte	0x6522
-	.4byte	.LLST253
-	.uleb128 0x66
-	.4byte	0x1d16
-	.uleb128 0x66
-	.4byte	0x1d1e
-	.uleb128 0x30
-	.4byte	0x6527
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x278
-	.4byte	0x65dd
-	.uleb128 0x30
-	.4byte	0x1d34
-	.uleb128 0x23
-	.4byte	.LVL1292
-	.4byte	0x2695
-	.uleb128 0x23
-	.4byte	.LVL1293
-	.4byte	0x3fa5
-	.uleb128 0x23
-	.4byte	.LVL1294
-	.4byte	0x3fa5
-	.uleb128 0x23
-	.4byte	.LVL1295
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1297
-	.4byte	0x1e07
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1309
-	.4byte	0x2258
-	.uleb128 0x23
-	.4byte	.LVL1310
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1316
-	.4byte	0x1d5d
-	.uleb128 0x23
-	.4byte	.LVL1317
-	.4byte	0x3fa5
-	.uleb128 0x23
-	.4byte	.LVL1318
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1320
-	.4byte	0x2258
-	.uleb128 0x23
-	.4byte	.LVL1321
-	.4byte	0x2331
-	.uleb128 0x23
-	.4byte	.LVL1322
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1323
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1324
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1325
-	.4byte	0x2c58
-	.uleb128 0x23
-	.4byte	.LVL1327
-	.4byte	0x1d5d
-	.uleb128 0x23
-	.4byte	.LVL1343
-	.4byte	0x1af9
-	.uleb128 0x23
-	.4byte	.LVL1346
-	.4byte	0x67ee
-	.uleb128 0x23
-	.4byte	.LVL1348
-	.4byte	0x392e
-	.uleb128 0x23
-	.4byte	.LVL1349
-	.4byte	0x1f18
-	.uleb128 0x23
-	.4byte	.LVL1352
-	.4byte	0x228a
-	.uleb128 0x23
-	.4byte	.LVL1353
-	.4byte	0x1ea4
-	.uleb128 0x23
-	.4byte	.LVL1360
-	.4byte	0x1ea4
-	.uleb128 0x23
-	.4byte	.LVL1361
-	.4byte	0x23a7
-	.uleb128 0x23
-	.4byte	.LVL1362
-	.4byte	0x4f11
-	.uleb128 0x23
-	.4byte	.LVL1363
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1364
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1367
-	.4byte	0x3fa5
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1296
-	.4byte	0x20c7
-	.byte	0
-	.uleb128 0x5f
-	.4byte	0x2818
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x67cf
-	.uleb128 0x30
-	.4byte	0x2829
-	.uleb128 0x52
-	.4byte	.LBB544
-	.4byte	.LBE544-.LBB544
-	.4byte	0x676b
-	.uleb128 0x63
-	.4byte	0x66d4
-	.4byte	.LLST287
-	.uleb128 0x38
-	.4byte	.Ldebug_ranges0+0x298
-	.4byte	0x66fe
-	.uleb128 0x30
-	.4byte	0x2834
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1582
-	.4byte	0x2a97
-	.uleb128 0x23
-	.4byte	.LVL1583
-	.4byte	0x2a97
-	.uleb128 0x23
-	.4byte	.LVL1584
-	.4byte	0x36a4
-	.uleb128 0x23
-	.4byte	.LVL1585
-	.4byte	0x36a4
-	.uleb128 0x23
-	.4byte	.LVL1586
-	.4byte	0x39f9
-	.uleb128 0x23
-	.4byte	.LVL1587
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1588
-	.4byte	0x3593
-	.uleb128 0x23
-	.4byte	.LVL1591
-	.4byte	0x1e70
-	.uleb128 0x23
-	.4byte	.LVL1592
-	.4byte	0x1e70
-	.uleb128 0x23
-	.4byte	.LVL1593
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1594
-	.4byte	0x2463
-	.uleb128 0x23
-	.4byte	.LVL1595
-	.4byte	0x29db
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LVL1570
-	.4byte	0x43ad
-	.uleb128 0x23
-	.4byte	.LVL1571
-	.4byte	0x3449
-	.uleb128 0x23
-	.4byte	.LVL1572
-	.4byte	0x333c
-	.uleb128 0x23
-	.4byte	.LVL1573
-	.4byte	0x319a
-	.uleb128 0x23
-	.4byte	.LVL1574
-	.4byte	0x31fc
-	.uleb128 0x23
-	.4byte	.LVL1575
-	.4byte	0x2b0c
-	.uleb128 0x23
-	.4byte	.LVL1576
-	.4byte	0x343c
-	.uleb128 0x23
-	.4byte	.LVL1577
-	.4byte	0x4316
-	.uleb128 0x23
-	.4byte	.LVL1578
-	.4byte	0x2b8f
-	.uleb128 0x23
-	.4byte	.LVL1579
-	.4byte	0x2cc3
-	.uleb128 0x23
-	.4byte	.LVL1580
-	.4byte	0x3712
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF656
-	.4byte	.LASF656
-	.byte	0x11
-	.byte	0x6f
-	.uleb128 0x68
-	.4byte	.LASF669
-	.4byte	.LASF669
-	.uleb128 0x67
-	.4byte	.LASF657
-	.4byte	.LASF657
-	.byte	0x12
-	.byte	0x19
-	.uleb128 0x67
-	.4byte	.LASF658
-	.4byte	.LASF658
-	.byte	0xb
-	.byte	0x8e
-	.uleb128 0x67
-	.4byte	.LASF659
-	.4byte	.LASF659
-	.byte	0x12
-	.byte	0x1b
-	.uleb128 0x67
-	.4byte	.LASF660
-	.4byte	.LASF660
-	.byte	0x13
-	.byte	0x27
-	.uleb128 0x67
-	.4byte	.LASF661
-	.4byte	.LASF661
-	.byte	0xd
-	.byte	0x18
-	.uleb128 0x69
-	.4byte	.LASF662
-	.4byte	.LASF662
-	.byte	0xc
-	.2byte	0x19b
-	.uleb128 0x6a
-	.4byte	.LASF670
-	.4byte	.LASF671
-	.byte	0x14
-	.byte	0
-	.4byte	.LASF670
-	.byte	0
-	.section	.debug_abbrev,"",%progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
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-.LASF504:
-	.ascii	"prog_error_count\000"
-.LASF336:
-	.ascii	"gc_discard_updated\000"
-.LASF412:
-	.ascii	"prev_superblock_id\000"
-.LASF638:
-	.ascii	"test_page_num\000"
-.LASF156:
-	.ascii	"last_refresh_read_count\000"
-.LASF478:
-	.ascii	"lookup_ppa_ver\000"
-.LASF490:
-	.ascii	"totleBlkNum\000"
-.LASF608:
-	.ascii	"sftl_read\000"
-.LASF577:
-	.ascii	"FtlFreeSysBlkQueueFull\000"
-.LASF409:
-	.ascii	"FtlGcPageVarInit\000"
-.LASF112:
-	.ascii	"padding\000"
-.LASF174:
-	.ascii	"flash_mode\000"
-.LASF468:
-	.ascii	"recovery_cur_page_ver\000"
-.LASF537:
-	.ascii	"ftl_map_blk_gc\000"
-.LASF607:
-	.ascii	"sftl_write\000"
-.LASF118:
-	.ascii	"ftl_map_blk_header\000"
-.LASF579:
-	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF25:
-	.ascii	"late_time_init\000"
-.LASF646:
-	.ascii	"mem_size\000"
-.LASF485:
-	.ascii	"FtlMapTblRecovery\000"
-.LASF423:
-	.ascii	"new_ppa\000"
-.LASF427:
-	.ascii	"num_bad_block\000"
-.LASF525:
-	.ascii	"lpn_index\000"
-.LASF203:
-	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF624:
-	.ascii	"sector\000"
-.LASF507:
-	.ascii	"num_page\000"
-.LASF617:
-	.ascii	"FtlProgPages\000"
-.LASF417:
-	.ascii	"FtlGcBufFree\000"
-.LASF271:
-	.ascii	"p_data_block_list_tail\000"
-.LASF398:
-	.ascii	"current_ppa\000"
-.LASF64:
-	.ascii	"p_spare\000"
-.LASF383:
-	.ascii	"tmp_blk\000"
-.LASF294:
-	.ascii	"g_gc_blk_index\000"
-.LASF500:
-	.ascii	"block_in_plane\000"
-.LASF111:
-	.ascii	"lastEc\000"
-.LASF352:
-	.ascii	"PhyBlk\000"
-.LASF106:
-	.ascii	"reserved\000"
-.LASF317:
-	.ascii	"g_recovery_page_num\000"
-.LASF549:
-	.ascii	"node_valid_page_count\000"
-.LASF179:
-	.ascii	"ftl_gc_page_item\000"
-.LASF143:
-	.ascii	"read_page_count\000"
-.LASF419:
-	.ascii	"decrement_vpc_count\000"
-.LASF7:
-	.ascii	"short unsigned int\000"
-.LASF539:
-	.ascii	"minValidPageIndex\000"
-.LASF331:
-	.ascii	"TotleReadBufferMatchCount\000"
-.LASF340:
-	.ascii	"check_spare_buf\000"
-.LASF315:
-	.ascii	"g_gc_skip_write_count\000"
-.LASF59:
-	.ascii	"int32\000"
-.LASF73:
-	.ascii	"page_per_slc_blk\000"
-.LASF318:
-	.ascii	"g_recovery_page_min_ver\000"
-.LASF227:
-	.ascii	"req_sys\000"
-.LASF162:
-	.ascii	"List_Node\000"
-.LASF652:
-	.ascii	"Ftl_log2\000"
-.LASF152:
-	.ascii	"all_blk_used_slc_mode\000"
-.LASF396:
-	.ascii	"pSuperblock\000"
-.LASF474:
-	.ascii	"function_exit\000"
-.LASF205:
-	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF17:
-	.ascii	"initcall_t\000"
-.LASF589:
-	.ascii	"V2P_block\000"
-.LASF115:
-	.ascii	"sysBlksPerPlane\000"
-.LASF454:
-	.ascii	"Ftl_save_ext_data\000"
-.LASF663:
-	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mapcs -mno-"
-	.ascii	"sched-prolog -mabi=apcs-gnu -mno-thumb-interwork -m"
-	.ascii	"arm -march=armv7-a -mfloat-abi=soft -mtune=cortex-a"
-	.ascii	"9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -std=gnu"
-	.ascii	"90 -fno-strict-aliasing -fno-common -fno-PIE -fno-d"
-	.ascii	"warf2-cfi-asm -fno-ipa-sra -fno-delete-null-pointer"
-	.ascii	"-checks -fno-stack-protector -fno-omit-frame-pointe"
-	.ascii	"r -fno-optimize-sibling-calls -fno-var-tracking-ass"
-	.ascii	"ignments -fno-strict-overflow -fno-merge-all-consta"
-	.ascii	"nts -fmerge-constants -fstack-check=no -fconserve-s"
-	.ascii	"tack --param allow-store-data-races=0\000"
-.LASF79:
-	.ascii	"nand_ops\000"
-.LASF629:
-	.ascii	"load_bbt\000"
-.LASF649:
-	.ascii	"blkNum\000"
-.LASF367:
-	.ascii	"page_index\000"
-.LASF502:
-	.ascii	"FtlVpcTblFlush\000"
-.LASF109:
-	.ascii	"hash\000"
-.LASF573:
-	.ascii	"IsInFreeQueue\000"
-.LASF471:
-	.ascii	"read_super_page_end\000"
-.LASF357:
-	.ascii	"num_req\000"
-.LASF320:
-	.ascii	"c_mlc_erase_count_value\000"
-.LASF553:
-	.ascii	"pPrev\000"
-.LASF138:
-	.ascii	"GlobalDataVersion\000"
-.LASF41:
-	.ascii	"panic_on_unrecovered_nmi\000"
-.LASF163:
-	.ascii	"next\000"
-.LASF128:
-	.ascii	"activeSuperblockId\000"
-.LASF376:
-	.ascii	"plane\000"
-.LASF43:
-	.ascii	"panic_on_warn\000"
-.LASF92:
-	.ascii	"ftl_l2p_map_info\000"
-.LASF164:
-	.ascii	"prev\000"
-.LASF57:
-	.ascii	"uint16\000"
-.LASF350:
-	.ascii	"ftl_memset\000"
-.LASF534:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-.LASF45:
-	.ascii	"crash_kexec_post_notifiers\000"
-.LASF289:
-	.ascii	"g_gc_bad_block_temp_num\000"
-.LASF123:
-	.ascii	"ftl_sys_save_info\000"
-.LASF278:
-	.ascii	"gp_last_act_superblock\000"
-.LASF576:
-	.ascii	"erase_flag\000"
-.LASF487:
-	.ascii	"blk_id\000"
-.LASF337:
-	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
+.LC106:
+	.ascii	"\0013vendor storage %x,%x,%x\012\000"
+.LC107:
+	.ascii	"vendor_storage\000"
\ No newline at end of file
diff --git a/drivers/rkflash/rk_sftl_arm_v7_thumb.S b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
index 6897c7ecd7062..0ea7136a78fc2 100644
--- a/drivers/rkflash/rk_sftl_arm_v7_thumb.S
+++ b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-13
+ * date: 2018-07-19
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -15,9 +15,8 @@
 	.eabi_attribute 34, 1
 	.eabi_attribute 18, 4
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
 	.global	__aeabi_uidiv
+	.text
 	.align	1
 	.syntax unified
 	.thumb
@@ -26,81 +25,40 @@
 	.type	l2p_addr_tran, %function
 l2p_addr_tran:
 	.fnstart
-.LFB271:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 18 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL0:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI0:
-	.loc 1 18 0
 	mov	r8, r1
-	.loc 1 25 0
 	ldr	r3, .L3
-	.loc 1 18 0
 	mov	r9, r2
-	.loc 1 32 0
 	ldr	r6, [r0, #4]
-.LVL1:
-	.loc 1 25 0
 	ldrh	r4, [r3, #8]
-.LVL2:
-	.loc 1 26 0
 	ldrh	r5, [r3, #10]
-.LVL3:
-	.loc 1 27 0
 	ldrh	r3, [r3, #14]
-	.loc 1 33 0
 	lsrs	r7, r6, #10
-	.loc 1 37 0
 	ubfx	r6, r6, #0, #10
-.LVL4:
-	.loc 1 27 0
 	cmp	r3, #4
-	.loc 1 34 0
 	uxth	r0, r7
-.LVL5:
-	.loc 1 28 0
 	itt	eq
 	lsreq	r4, r4, #1
-	.loc 1 29 0
 	lsleq	r5, r5, #1
-.LVL6:
-	.loc 1 35 0
 	uxth	r7, r7
-	.loc 1 34 0
 	mov	r1, r4
-.LVL7:
-	.loc 1 29 0
 	it	eq
 	uxtheq	r5, r5
-.LVL8:
-	.loc 1 34 0
 	bl	__aeabi_uidiv
-.LVL9:
 	uxth	r0, r0
-.LVL10:
-	.loc 1 35 0
 	mls	r4, r0, r4, r7
-.LVL11:
-	.loc 1 37 0
 	mla	r4, r5, r4, r6
-.LVL12:
 	str	r4, [r8]
-	.loc 1 38 0
 	str	r0, [r9]
-	.loc 1 41 0
 	movs	r0, #0
-.LVL13:
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.LVL14:
 .L4:
 	.align	2
 .L3:
-	.word	g_nand_phy_info
-.LFE271:
+	.word	.LANCHOR0
 	.fnend
 	.size	l2p_addr_tran, .-l2p_addr_tran
 	.align	1
@@ -111,19 +69,13 @@ l2p_addr_tran:
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
 	.fnstart
-.LFB286:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL15:
-	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL16:
-	ldr	r2, [r3]
+	ldr	r2, [r3, #24]
 	movs	r3, #1
 	lsl	r0, r3, r0
 	ldr	r3, [r2, r1, lsl #2]
@@ -134,7 +86,6 @@ ftl_set_blk_mode.part.6:
 	.align	2
 .L6:
 	.word	.LANCHOR0
-.LFE286:
 	.fnend
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.align	1
@@ -146,36 +97,22 @@ ftl_set_blk_mode.part.6:
 	.type	Ftl_log2, %function
 Ftl_log2:
 	.fnstart
-.LFB152:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 127 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL17:
-	.loc 3 131 0
 	movs	r1, #0
-	.loc 3 129 0
 	movs	r2, #1
-.LVL18:
 .L9:
-	.loc 3 131 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
 	bls	.L10
-	.loc 3 133 0
 	subs	r0, r3, #1
-.LVL19:
-	.loc 3 135 0
 	uxth	r0, r0
 	bx	lr
-.LVL20:
 .L10:
-	.loc 3 132 0 discriminator 3
 	lsls	r2, r2, #1
 	b	.L9
-.LFE152:
 	.fnend
 	.size	Ftl_log2, .-Ftl_log2
 	.align	1
@@ -187,14 +124,10 @@ Ftl_log2:
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 	.fnstart
-.LFB153:
-	.loc 3 159 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL21:
 	bx	lr
-.LFE153:
 	.fnend
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.align	1
@@ -206,46 +139,29 @@ FtlPrintInfo:
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 	.fnstart
-.LFB154:
-	.loc 3 165 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL22:
-	.loc 3 168 0
 	ldr	r3, .L13
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	.loc 3 169 0
-	ldrh	r2, [r3, #8]
-	.loc 3 170 0
-	ldrh	r1, [r3, #18]
-	.loc 3 168 0
-	str	r0, [r3, #4]
-	.loc 3 169 0
+	ldrh	r2, [r3, #32]
+	ldrh	r1, [r3, #42]
+	str	r0, [r3, #28]
 	muls	r2, r0, r2
-	.loc 3 170 0
 	subs	r0, r1, r0
-.LVL23:
-	.loc 3 171 0
-	ldr	r1, [r3, #24]
-	.loc 3 170 0
-	strh	r0, [r3, #16]	@ movhi
-	.loc 3 174 0
+	ldr	r1, [r3, #48]
+	strh	r0, [r3, #40]	@ movhi
 	movs	r0, #0
-	.loc 3 169 0
-	str	r2, [r3, #12]
-	.loc 3 171 0
+	str	r2, [r3, #36]
 	subs	r2, r1, r2
-	str	r2, [r3, #20]
-	.loc 3 174 0
+	str	r2, [r3, #44]
 	bx	lr
 .L14:
 	.align	2
 .L13:
 	.word	.LANCHOR0
-.LFE154:
 	.fnend
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
@@ -258,226 +174,132 @@ FtlSysBlkNumInit:
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 	.fnstart
-.LFB155:
-	.loc 3 183 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL24:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI1:
-	.loc 3 183 0
 	mov	fp, r0
-	.loc 3 191 0
 	ldrh	r3, [fp, #14]
-	.loc 3 188 0
 	ldrh	r2, [r0]
 	ldr	r4, .L25
-	.loc 3 191 0
 	cmp	r3, #4
-	.loc 3 189 0
 	ldrh	r6, [r0, #2]
-	.loc 3 190 0
 	ldrh	r0, [r0, #4]
-.LVL25:
-	.loc 3 188 0
-	strh	r2, [r4, #28]	@ movhi
-	.loc 3 189 0
-	strh	r6, [r4, #30]	@ movhi
-	.loc 3 190 0
-	strh	r0, [r4, #32]	@ movhi
-	.loc 3 191 0
+	strh	r2, [r4, #52]	@ movhi
+	strh	r6, [r4, #54]	@ movhi
+	strh	r0, [r4, #56]	@ movhi
 	bne	.L16
-	.loc 3 192 0
 	ldrh	r3, [fp, #6]
 	lsrs	r3, r3, #1
-	strh	r3, [r4, #18]	@ movhi
-	.loc 3 193 0
+	strh	r3, [r4, #42]	@ movhi
 	movs	r3, #8
-	strh	r3, [r4, #34]	@ movhi
+	strh	r3, [r4, #58]	@ movhi
 .L16:
-	.loc 3 197 0 discriminator 3
 	ldr	r1, .L25+4
-	.loc 3 183 0 discriminator 3
 	movs	r3, #0
-.LVL26:
 .L17:
-	.loc 3 197 0 discriminator 3
 	strb	r3, [r3, r1]
-	.loc 3 196 0 discriminator 3
 	adds	r3, r3, #1
 	cmp	r3, #32
 	bne	.L17
-	.loc 3 205 0
-	ldrh	r5, [r4, #18]
-	.loc 3 204 0
+	ldrh	r5, [r4, #42]
 	smulbb	r6, r6, r0
-	.loc 3 198 0
 	movs	r3, #5
-.LVL27:
-	.loc 3 200 0
 	cmp	r2, #1
-	.loc 3 198 0
-	strh	r3, [r4, #68]	@ movhi
-	.loc 3 204 0
+	strh	r3, [r4, #92]	@ movhi
 	uxth	r6, r6
-	.loc 3 199 0
 	mov	r3, #0
-	.loc 3 205 0
 	smulbb	r0, r0, r5
-	.loc 3 202 0
 	mov	r7, #640
-	.loc 3 201 0
 	it	eq
-	strheq	r2, [r4, #68]	@ movhi
-	.loc 3 199 0
-	strh	r3, [r4, #70]	@ movhi
-	.loc 3 205 0
+	strheq	r2, [r4, #92]	@ movhi
+	strh	r3, [r4, #94]	@ movhi
 	uxth	r0, r0
-	.loc 3 202 0
-	strh	r7, [r4, #72]	@ movhi
-	.loc 3 204 0
-	strh	r6, [r4, #8]	@ movhi
-	.loc 3 205 0
-	strh	r0, [r4, #74]	@ movhi
-	.loc 3 206 0
+	strh	r7, [r4, #96]	@ movhi
+	strh	r6, [r4, #32]	@ movhi
+	strh	r0, [r4, #98]	@ movhi
 	bl	Ftl_log2
-.LVL28:
-	.loc 3 207 0
 	ldrh	r9, [fp, #12]
-	.loc 3 210 0
-	ldrh	r10, [r4, #34]
-	.loc 3 206 0
-	strh	r0, [r4, #76]	@ movhi
-	.loc 3 207 0
-	strh	r9, [r4, #78]	@ movhi
-	.loc 3 209 0
+	ldrh	r10, [r4, #58]
+	strh	r0, [r4, #100]	@ movhi
+	strh	r9, [r4, #102]	@ movhi
 	smulbb	r3, r6, r9
-	.loc 3 210 0
 	mov	r0, r10
-	.loc 3 208 0
-	strh	r9, [r4, #80]	@ movhi
-	.loc 3 209 0
-	strh	r3, [r4, #82]	@ movhi
-	.loc 3 210 0
+	strh	r9, [r4, #104]	@ movhi
+	strh	r3, [r4, #106]	@ movhi
 	bl	Ftl_log2
-.LVL29:
-	.loc 3 212 0
 	lsl	r3, r10, #9
-	.loc 3 210 0
 	mov	r8, r0
-	strh	r0, [r4, #84]	@ movhi
-	.loc 3 218 0
+	strh	r0, [r4, #108]	@ movhi
 	mul	r1, r9, r10
-	.loc 3 212 0
 	uxth	r3, r3
-	.loc 3 218 0
 	mov	r0, #5120
-	.loc 3 221 0
 	asr	r7, r7, r8
-	.loc 3 212 0
-	strh	r3, [r4, #86]	@ movhi
-	.loc 3 213 0
+	strh	r3, [r4, #110]	@ movhi
 	lsrs	r3, r3, #8
-	.loc 3 223 0
 	add	r8, r8, #9
-	.loc 3 213 0
-	strh	r3, [r4, #88]	@ movhi
-	.loc 3 221 0
+	strh	r3, [r4, #112]	@ movhi
 	adds	r7, r7, #2
-	.loc 3 214 0
 	ldrh	r3, [fp, #20]
-	strh	r3, [r4, #90]	@ movhi
-	.loc 3 216 0
+	strh	r3, [r4, #114]	@ movhi
 	mul	r3, r5, r6
-	.loc 3 223 0
 	lsls	r5, r5, #6
 	asr	r5, r5, r8
-	.loc 3 216 0
-	str	r3, [r4, #24]
-	.loc 3 217 0
+	str	r3, [r4, #48]
 	mul	r3, r10, r3
 	mul	r3, r9, r3
 	asrs	r3, r3, #11
-	str	r3, [r4, #92]
-	.loc 3 218 0
+	str	r3, [r4, #116]
 	bl	__aeabi_idiv
-.LVL30:
 	uxth	r0, r0
-	.loc 3 223 0
-	strh	r5, [r4, #100]	@ movhi
+	strh	r5, [r4, #124]	@ movhi
 	uxth	r5, r5
-	.loc 3 226 0
 	mov	r1, r6
-	.loc 3 219 0
 	cmp	r0, #4
-	.loc 3 221 0
-	strh	r7, [r4, #98]	@ movhi
-	.loc 3 220 0
+	strh	r7, [r4, #122]	@ movhi
 	itet	ls
 	movls	r3, #4
-	.loc 3 218 0
-	strhhi	r0, [r4, #96]	@ movhi
-	.loc 3 220 0
-	strhls	r3, [r4, #96]	@ movhi
-	.loc 3 224 0
+	strhhi	r0, [r4, #120]	@ movhi
+	strhls	r3, [r4, #120]	@ movhi
 	mul	r3, r6, r5
-	.loc 3 226 0
-	ldrh	r0, [r4, #96]
+	ldrh	r0, [r4, #120]
 	adds	r5, r5, #8
-	.loc 3 224 0
-	str	r3, [r4, #104]
-	.loc 3 226 0
+	str	r3, [r4, #128]
 	bl	__aeabi_uidiv
-.LVL31:
 	uxtah	r0, r5, r0
-	.loc 3 227 0
 	cmp	r6, #1
-	.loc 3 228 0
 	it	eq
 	addeq	r0, r0, #4
-	str	r0, [r4, #4]
-	.loc 3 231 0
-	ldrh	r0, [r4, #4]
+	str	r0, [r4, #28]
+	ldrh	r0, [r4, #28]
 	bl	FtlSysBlkNumInit
-.LVL32:
-	.loc 3 232 0
-	ldr	r3, [r4, #4]
-	.loc 3 236 0
+	ldr	r3, [r4, #28]
 	movs	r0, #0
-	str	r0, [r4, #116]
-	.loc 3 232 0
-	str	r3, [r4, #108]
-	.loc 3 234 0
-	ldr	r3, [r4, #20]
+	str	r0, [r4, #140]
+	str	r3, [r4, #132]
+	ldr	r3, [r4, #44]
 	lsls	r2, r3, #2
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r4, #102]
 	muls	r3, r2, r3
-	ldrh	r2, [r4, #84]
+	ldrh	r2, [r4, #108]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
 	adds	r3, r3, #2
-	strh	r3, [r4, #112]	@ movhi
-	.loc 3 235 0
+	strh	r3, [r4, #136]	@ movhi
 	movs	r3, #32
-	strh	r3, [r4, #114]	@ movhi
-	.loc 3 237 0
-	ldrh	r3, [r4, #96]
+	strh	r3, [r4, #138]	@ movhi
+	ldrh	r3, [r4, #120]
 	adds	r3, r3, #3
-	strh	r3, [r4, #96]	@ movhi
-	.loc 3 238 0
-	ldr	r3, [r4, #104]
+	strh	r3, [r4, #120]	@ movhi
+	ldr	r3, [r4, #128]
 	adds	r3, r3, #3
-	str	r3, [r4, #104]
-	.loc 3 263 0
+	str	r3, [r4, #128]
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL33:
 .L26:
 	.align	2
 .L25:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+36
-.LFE155:
+	.word	.LANCHOR0+60
 	.fnend
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.align	1
@@ -489,53 +311,31 @@ FtlConstantsInit:
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
 	.fnstart
-.LFB158:
-	.loc 3 514 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL34:
-	.loc 3 517 0
 	ldr	r2, .L34
-	ldrh	r3, [r2, #120]
+	ldrh	r3, [r2, #144]
 	cbz	r3, .L33
-.LBB222:
-.LBB223:
-	.loc 3 519 0
-	ldr	r3, [r2, #124]
-	ldrh	r2, [r2, #96]
+	ldr	r3, [r2, #148]
+	ldrh	r2, [r2, #120]
 	add	r2, r3, r2, lsl #1
 .L29:
-	.loc 3 518 0
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE223:
-.LBE222:
-	.loc 3 524 0
 	movs	r0, #0
-.LVL35:
 	bx	lr
-.LVL36:
 .L30:
-.LBB225:
-.LBB224:
-	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
 	bne	.L29
-	.loc 3 520 0
 	movs	r0, #1
-.LVL37:
-.LBE224:
-.LBE225:
-	.loc 3 525 0
 	bx	lr
 .L35:
 	.align	2
 .L34:
 	.word	.LANCHOR0
-.LFE158:
 	.fnend
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	1
@@ -547,20 +347,16 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 	.fnstart
-.LFB171:
-	.loc 3 1214 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1216 0
 	ldr	r3, .L37
-	ldr	r0, [r3, #116]
+	ldr	r0, [r3, #140]
 	bx	lr
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR0
-.LFE171:
 	.fnend
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
@@ -573,36 +369,23 @@ sftl_get_density:
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 	.fnstart
-.LFB172:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL38:
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
-.LCFI2:
-.LVL39:
-	.loc 4 5 0
 	mov	r5, r0
-	.loc 4 10 0
 	ldr	r4, .L40
-	ldrh	r7, [r4, #74]
+	ldrh	r7, [r4, #98]
 	mov	r1, r7
 	bl	__aeabi_uidiv
-.LVL40:
 	uxth	r6, r0
-.LVL41:
 	mov	r1, r7
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL42:
-	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
-	.loc 4 15 0
-	ldr	r2, [r2, #156]
+	ldr	r2, [r2, #180]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
 	movs	r0, #1
@@ -610,32 +393,23 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
-	.loc 4 16 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
 	ldr	r0, .L40+4
 	bl	printk
-.LVL43:
-	.loc 4 17 0
-	ldrh	r3, [r4, #134]
-	.loc 4 19 0
+	ldrh	r3, [r4, #158]
 	movs	r0, #0
-	.loc 4 17 0
 	adds	r3, r3, #1
-	strh	r3, [r4, #134]	@ movhi
-	.loc 4 19 0
+	strh	r3, [r4, #158]	@ movhi
 	add	sp, sp, #12
-.LCFI3:
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL44:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR0
 	.word	.LC0
-.LFE172:
 	.fnend
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.align	1
@@ -647,54 +421,32 @@ FtlBbmMapBadBlock:
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
 	.fnstart
-.LFB173:
-	.loc 4 24 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL45:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI4:
-	.loc 4 24 0
 	mov	r7, r0
-	.loc 4 30 0
 	ldr	r5, .L43
-	ldrh	r6, [r5, #74]
-	.loc 4 31 0
+	ldrh	r6, [r5, #98]
 	mov	r1, r6
 	bl	__aeabi_uidivmod
-.LVL46:
-	.loc 4 30 0
 	mov	r0, r7
-	.loc 4 31 0
 	uxth	r4, r1
-.LVL47:
-	.loc 4 30 0
 	mov	r1, r6
 	bl	__aeabi_uidiv
-.LVL48:
 	uxth	r0, r0
-.LVL49:
-	.loc 4 34 0
 	lsrs	r2, r4, #5
-	.loc 4 33 0
 	add	r5, r5, r0, lsl #2
-	.loc 4 34 0
 	and	r4, r4, #31
-.LVL50:
-	ldr	r3, [r5, #156]
+	ldr	r3, [r5, #180]
 	ldr	r0, [r3, r2, lsl #2]
-.LVL51:
 	lsrs	r0, r0, r4
-	.loc 4 36 0
 	and	r0, r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL52:
 .L44:
 	.align	2
 .L43:
 	.word	.LANCHOR0
-.LFE173:
 	.fnend
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.align	1
@@ -706,13 +458,10 @@ FtlBbmIsBadBlock:
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
 	.fnstart
-.LFB174:
-	.loc 4 39 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-.LFE174:
 	.fnend
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.align	1
@@ -724,43 +473,22 @@ FtlBbtInfoPrint:
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
 	.fnstart
-.LFB177:
-	.loc 4 149 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 150 0
 	ldr	r0, .L47
 	movw	r3, #65535
-.LBB231:
-.LBB232:
-.LBB233:
-	.loc 1 202 0
 	movs	r2, #16
 	movs	r1, #255
-.LBE233:
-.LBE232:
-.LBE231:
-	.loc 4 150 0
-	strh	r3, [r0, #128]	@ movhi
-	.loc 4 151 0
+	strh	r3, [r0, #152]	@ movhi
 	movs	r3, #0
-	strh	r3, [r0, #134]	@ movhi
-.LBB236:
-.LBB235:
-.LBB234:
-	.loc 1 202 0
-	adds	r0, r0, #140
+	strh	r3, [r0, #158]	@ movhi
+	adds	r0, r0, #164
 	b	memset
-.LVL53:
 .L48:
 	.align	2
 .L47:
 	.word	.LANCHOR0
-.LBE234:
-.LBE235:
-.LBE236:
-.LFE177:
 	.fnend
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.align	1
@@ -772,40 +500,25 @@ FtlBbtMemInit:
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
 	.fnstart
-.LFB178:
-	.loc 4 157 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 160 0
 	ldr	r3, .L56
-	.loc 4 157 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI5:
-	.loc 4 160 0
 	movs	r5, #0
-	.loc 4 159 0
 	mov	r4, r5
-	.loc 4 160 0
-	ldrh	r2, [r3, #74]
-	ldrh	r6, [r3, #30]
+	ldrh	r2, [r3, #98]
+	ldrh	r6, [r3, #54]
 	muls	r6, r2, r6
 .L50:
 	uxth	r0, r5
-.LVL54:
-	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
-.LVL55:
 	blt	.L52
-	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
 .L52:
-	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL56:
 	cbz	r0, .L51
-	.loc 4 164 0
 	adds	r4, r4, #1
 	uxth	r4, r4
 .L51:
@@ -815,7 +528,6 @@ FtlBbtCalcTotleCnt:
 	.align	2
 .L56:
 	.word	.LANCHOR0
-.LFE178:
 	.fnend
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.align	1
@@ -827,45 +539,30 @@ FtlBbtCalcTotleCnt:
 	.type	V2P_block, %function
 V2P_block:
 	.fnstart
-.LFB182:
-	.loc 2 5 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL57:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI6:
-	.loc 2 5 0
 	mov	r5, r1
-	.loc 2 8 0
 	ldr	r4, .L59
-	.loc 2 5 0
 	mov	r7, r0
-	.loc 2 8 0
-	ldrh	r6, [r4, #32]
+	ldrh	r6, [r4, #56]
 	mov	r1, r6
-.LVL58:
 	bl	__aeabi_uidiv
-.LVL59:
-	ldrh	r4, [r4, #74]
+	ldrh	r4, [r4, #98]
 	smulbb	r5, r6, r5
-.LVL60:
 	mov	r1, r6
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL61:
 	adds	r0, r5, r1
 	add	r0, r0, r4
-	.loc 2 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL62:
 .L60:
 	.align	2
 .L59:
 	.word	.LANCHOR0
-.LFE182:
 	.fnend
 	.size	V2P_block, .-V2P_block
 	.align	1
@@ -877,39 +574,26 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	.fnstart
-.LFB183:
-	.loc 2 13 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL63:
-	.loc 2 16 0
 	ldr	r3, .L62
-	.loc 2 13 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI7:
-	.loc 2 13 0
 	mov	r6, r0
-	.loc 2 16 0
-	ldrh	r5, [r3, #32]
-	ldrh	r1, [r3, #74]
+	ldrh	r5, [r3, #56]
+	ldrh	r1, [r3, #98]
 	bl	__aeabi_uidiv
-.LVL64:
 	mov	r1, r5
 	smulbb	r4, r0, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL65:
 	add	r1, r1, r4
-	.loc 2 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.LVL66:
 .L63:
 	.align	2
 .L62:
 	.word	.LANCHOR0
-.LFE183:
 	.fnend
 	.size	P2V_plane, .-P2V_plane
 	.align	1
@@ -921,32 +605,22 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	.fnstart
-.LFB184:
-	.loc 2 21 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL67:
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI8:
-	.loc 2 24 0
 	ldr	r4, .L65
-	ldrh	r1, [r4, #74]
+	ldrh	r1, [r4, #98]
 	bl	__aeabi_uidivmod
-.LVL68:
 	uxth	r0, r1
-	.loc 2 25 0
-	ldrh	r1, [r4, #32]
+	ldrh	r1, [r4, #56]
 	bl	__aeabi_uidiv
-.LVL69:
-	.loc 2 27 0
 	uxth	r0, r0
 	pop	{r4, pc}
 .L66:
 	.align	2
 .L65:
 	.word	.LANCHOR0
-.LFE184:
 	.fnend
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.align	1
@@ -958,35 +632,24 @@ P2V_block_in_plane:
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
 	.fnstart
-.LFB185:
-	.loc 2 31 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL70:
-	.loc 2 34 0
 	cmp	r0, r1
 	bls	.L68
-	.loc 2 36 0
 	subs	r0, r0, r1
-.LVL71:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.LVL72:
 .L68:
-	.loc 2 40 0
 	subs	r0, r1, r0
-.LVL73:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
-	.loc 2 44 0
 	bx	lr
-.LFE185:
 	.fnend
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.align	1
@@ -998,61 +661,25 @@ ftl_cmp_data_ver:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	.fnstart
-.LFB187:
-	.loc 2 76 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL74:
-	.loc 2 79 0
 	ldr	r3, .L71
-.LBB242:
-.LBB243:
-.LBB244:
-	.loc 1 202 0
 	mov	r1, #2048
-.LBE244:
-.LBE243:
-.LBE242:
-	.loc 2 76 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI9:
-	.loc 2 79 0
 	movs	r4, #0
-	.loc 2 82 0
-	strh	r0, [r3, #188]	@ movhi
-.LBB249:
-.LBB247:
-.LBB245:
-	.loc 1 202 0
-	add	r0, r3, #196
-.LVL75:
-.LBE245:
-.LBE247:
-.LBE249:
-	.loc 2 79 0
-	strh	r4, [r3, #190]	@ movhi
-	.loc 2 80 0
-	strh	r4, [r3, #192]	@ movhi
-	.loc 2 81 0
-	strh	r4, [r3, #194]	@ movhi
-.LBB250:
-.LBB248:
-.LBB246:
-	.loc 1 202 0
+	strh	r0, [r3, #212]	@ movhi
+	add	r0, r3, #220
+	strh	r4, [r3, #214]	@ movhi
+	strh	r4, [r3, #216]	@ movhi
+	strh	r4, [r3, #218]	@ movhi
 	bl	__memzero
-.LVL76:
-.LBE246:
-.LBE248:
-.LBE250:
-	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
 .L72:
 	.align	2
 .L71:
 	.word	.LANCHOR0
-.LFE187:
 	.fnend
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.align	1
@@ -1064,15 +691,11 @@ FtlFreeSysBlkQueueInit:
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
 	.fnstart
-.LFB188:
-	.loc 2 88 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 89 0
 	ldr	r3, .L74
-	ldrh	r0, [r3, #194]
-	.loc 2 90 0
+	ldrh	r0, [r3, #218]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
@@ -1080,7 +703,6 @@ FtlFreeSysBlkQueueEmpty:
 	.align	2
 .L74:
 	.word	.LANCHOR0
-.LFE188:
 	.fnend
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.align	1
@@ -1092,15 +714,11 @@ FtlFreeSysBlkQueueEmpty:
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
 	.fnstart
-.LFB189:
-	.loc 2 93 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 94 0
 	ldr	r3, .L77
-	ldrh	r0, [r3, #194]
-	.loc 2 95 0
+	ldrh	r0, [r3, #218]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
@@ -1109,7 +727,6 @@ FtlFreeSysBlkQueueFull:
 	.align	2
 .L77:
 	.word	.LANCHOR0
-.LFE189:
 	.fnend
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.align	1
@@ -1121,54 +738,37 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 	.fnstart
-.LFB191:
-	.loc 2 118 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 2 123 0
 	ldr	r3, .L88
-	.loc 2 118 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI10:
-	.loc 2 123 0
-	ldrh	r2, [r3, #194]
+	ldrh	r2, [r3, #218]
 	cbz	r2, .L79
-	.loc 2 119 0
-	ldrh	r5, [r3, #2272]
+	ldrh	r5, [r3, #2296]
 	movs	r0, #0
-	ldrh	r1, [r3, #190]
+	ldrh	r1, [r3, #214]
 	mov	r6, r0
-	ldrh	r2, [r3, #192]
+	ldrh	r2, [r3, #216]
 	and	r5, r5, #31
-.LVL77:
 .L81:
-	.loc 2 124 0 discriminator 1
 	uxth	r4, r0
 	adds	r0, r0, #1
 	cmp	r5, r4
 	bgt	.L82
 	cbz	r6, .L79
-	strh	r1, [r3, #190]	@ movhi
-	strh	r2, [r3, #192]	@ movhi
+	strh	r1, [r3, #214]	@ movhi
+	strh	r2, [r3, #216]	@ movhi
 .L79:
 	pop	{r4, r5, r6, pc}
-.LVL78:
 .L82:
-	.loc 2 125 0 discriminator 3
 	add	r4, r3, r1, lsl #1
-	.loc 2 126 0 discriminator 3
 	adds	r1, r1, #1
 	ubfx	r1, r1, #0, #10
-	.loc 2 125 0 discriminator 3
-	ldrh	r6, [r4, #196]
-.LVL79:
-	.loc 2 127 0 discriminator 3
+	ldrh	r6, [r4, #220]
 	add	r4, r3, r2, lsl #1
-	strh	r6, [r4, #196]	@ movhi
+	strh	r6, [r4, #220]	@ movhi
 	movs	r6, #1
-.LVL80:
-	.loc 2 128 0 discriminator 3
 	add	r2, r2, r6
 	ubfx	r2, r2, #0, #10
 	b	.L81
@@ -1176,7 +776,6 @@ FtlFreeSysBLkSort:
 	.align	2
 .L88:
 	.word	.LANCHOR0
-.LFE191:
 	.fnend
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.align	1
@@ -1188,66 +787,38 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 	.fnstart
-.LFB192:
-	.loc 2 163 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL81:
-.LBB251:
-.LBB252:
-	.loc 2 94 0
 	ldr	r3, .L96
-.LBE252:
-.LBE251:
-	.loc 2 163 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI11:
-.LBB254:
-.LBB253:
-	.loc 2 94 0
-	ldrh	r4, [r3, #194]
-.LBE253:
-.LBE254:
-	.loc 2 168 0
+	ldrh	r4, [r3, #218]
 	cmp	r4, #1024
 	beq	.L94
-	.loc 2 171 0
-	ldrh	r5, [r3, #190]
+	ldrh	r5, [r3, #214]
 	movs	r1, #0
-.LVL82:
 .L92:
-	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
 	bcc	.L93
 .L94:
-	.loc 2 164 0
 	movs	r0, #0
-.LVL83:
 	pop	{r4, r5, pc}
-.LVL84:
 .L93:
-	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
-	ldrh	r2, [r2, #196]
+	ldrh	r2, [r2, #220]
 	cmp	r2, r0
 	beq	.L95
-	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
 	b	.L92
 .L95:
-	.loc 2 172 0
 	movs	r0, #1
-.LVL85:
-	.loc 2 178 0
 	pop	{r4, r5, pc}
 .L97:
 	.align	2
 .L96:
 	.word	.LANCHOR0
-.LFE192:
 	.fnend
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	1
@@ -1259,212 +830,119 @@ IsInFreeQueue:
 	.type	insert_data_list, %function
 insert_data_list:
 	.fnstart
-.LFB196:
-	.loc 2 249 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL86:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI12:
-.LVL87:
-	.loc 2 260 0
 	ldr	r2, .L113
-	ldrh	r3, [r2, #16]
+	ldrh	r3, [r2, #40]
 	mov	r5, r2
-.LVL88:
 	cmp	r3, r0
 	bls	.L100
-.LBB257:
-.LBB258:
-	.loc 2 265 0
 	movs	r4, #6
-	ldr	ip, [r2, #2292]
+	ldr	ip, [r2, #2316]
 	muls	r4, r0, r4
-	.loc 2 266 0
 	movw	r3, #65535
-	.loc 2 265 0
 	add	r1, ip, r4
-.LVL89:
-	.loc 2 266 0
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [ip, r4]	@ movhi
-	.loc 2 268 0
-	ldr	r3, [r2, #2296]
-.LVL90:
+	ldr	r3, [r2, #2320]
 	cbnz	r3, .L101
-	.loc 2 269 0
-	str	r1, [r2, #2296]
-.LVL91:
+	str	r1, [r2, #2320]
 .L100:
-.LBE258:
-.LBE257:
-	.loc 2 323 0
 	movs	r0, #0
-.LVL92:
 	add	sp, sp, #12
-.LCFI13:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL93:
 .L101:
-.LCFI14:
-.LBB260:
-.LBB259:
-	.loc 2 274 0
 	ldrh	r6, [r1, #4]
-	.loc 2 273 0
 	lsl	r10, r0, #1
-	ldr	r8, [r2, #2300]
+	ldr	r8, [r2, #2324]
 	ldrh	r2, [r8, r0, lsl #1]
-.LVL94:
-	.loc 2 275 0
 	cmp	r6, #0
 	beq	.L111
-	.loc 2 274 0
 	muls	r6, r2, r6
-.LVL95:
 .L102:
-	.loc 2 279 0
-	ldr	lr, [r5, #2292]
-	.loc 2 282 0
-	ldrh	r7, [r5, #16]
-	.loc 2 279 0
+	ldr	lr, [r5, #2316]
+	ldrh	r7, [r5, #40]
 	sub	r2, r3, lr
-.LVL96:
 	asr	r9, r2, #1
 	ldr	r2, .L113+4
-	.loc 2 282 0
 	str	r7, [sp]
-	.loc 2 279 0
 	mul	r2, r2, r9
-	.loc 2 294 0
-	ldr	r9, [r5, #2304]
+	ldr	r9, [r5, #2328]
 	add	r5, r9, r10
-	.loc 2 279 0
 	uxth	r2, r2
-	.loc 2 294 0
 	str	r5, [sp, #4]
-	.loc 2 256 0
 	movs	r5, #0
-.LVL97:
 .L109:
-	.loc 2 281 0
 	adds	r5, r5, #1
-.LVL98:
-	.loc 2 282 0
 	ldr	r7, [sp]
-	.loc 2 281 0
 	uxth	r5, r5
-.LVL99:
-	.loc 2 282 0
 	cmp	r5, r7
 	bhi	.L100
-	.loc 2 285 0
 	cmp	r0, r2
 	beq	.L100
-	.loc 2 289 0
 	ldrh	r7, [r3, #4]
-	.loc 2 288 0
 	lsl	r10, r2, #1
 	ldrh	fp, [r8, r2, lsl #1]
-	.loc 2 290 0
 	cbz	r7, .L112
-	.loc 2 289 0
 	mul	r7, r7, fp
-.LVL100:
 .L104:
-	.loc 2 293 0
 	cmp	r6, r7
 	bne	.L105
-	.loc 2 294 0
 	ldr	r7, [sp, #4]
-.LVL101:
 	ldrh	r10, [r9, r10]
 	ldrh	r7, [r7]
 	cmp	r10, r7
 	bcc	.L107
-.LVL102:
 .L106:
-	.loc 2 312 0
 	strh	r2, [ip, r4]	@ movhi
-	.loc 2 315 0
 	ldr	r4, .L113
-	.loc 2 313 0
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 2 315 0
-	ldr	r2, [r4, #2296]
+	ldr	r2, [r4, #2320]
 	cmp	r3, r2
-	.loc 2 319 0
 	ittte	ne
 	ldrhne	r5, [r3, #2]
-.LVL103:
 	movne	r2, #6
-	ldrne	r1, [r4, #2292]
-.LVL104:
-	.loc 2 316 0
+	ldrne	r1, [r4, #2316]
 	strheq	r0, [r3, #2]	@ movhi
-.LVL105:
-	.loc 2 317 0
 	iteee	eq
-	streq	r1, [r4, #2296]
-	.loc 2 319 0
+	streq	r1, [r4, #2320]
 	mulne	r2, r2, r5
 	strhne	r0, [r1, r2]	@ movhi
-.LVL106:
-	.loc 2 320 0
 	strhne	r0, [r3, #2]	@ movhi
 	b	.L100
-.LVL107:
 .L111:
-	.loc 2 276 0
 	mov	r6, #-1
-.LVL108:
 	b	.L102
-.LVL109:
 .L112:
-	.loc 2 291 0
 	mov	r7, #-1
-.LVL110:
 	b	.L104
 .L105:
-	.loc 2 298 0
 	bcc	.L106
 .L107:
-	.loc 2 301 0
 	ldrh	r7, [r3]
-.LVL111:
 	movw	r10, #65535
 	cmp	r7, r10
 	bne	.L108
-	.loc 2 302 0
 	strh	r2, [r1, #2]	@ movhi
-	.loc 2 303 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 304 0
 	ldr	r3, .L113
-.LVL112:
-	str	r1, [r3, #2308]
+	str	r1, [r3, #2332]
 	b	.L100
-.LVL113:
 .L108:
-	.loc 2 309 0
 	movs	r3, #6
-.LVL114:
 	mov	r2, r7
 	mla	r3, r3, r7, lr
-.LVL115:
 	b	.L109
 .L114:
 	.align	2
 .L113:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LBE259:
-.LBE260:
-.LFE196:
 	.fnend
 	.size	insert_data_list, .-insert_data_list
 	.align	1
@@ -1476,44 +954,25 @@ insert_data_list:
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 	.fnstart
-.LFB195:
-	.loc 2 218 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL116:
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI15:
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL117:
-	.loc 2 220 0
 	ldr	r2, .L117
-	ldrh	r3, [r2, #2312]
+	ldrh	r3, [r2, #2336]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #2312]	@ movhi
-	.loc 2 221 0
-	ldrh	r2, [r2, #16]
+	strh	r3, [r2, #2336]	@ movhi
+	ldrh	r2, [r2, #40]
 	cmp	r2, r3
 	bcs	.L115
-.LBB263:
-.LBB264:
 	movs	r2, #221
 	ldr	r1, .L117+4
 	ldr	r0, .L117+8
-.LBE264:
-.LBE263:
-	.loc 2 222 0
 	pop	{r3, lr}
-.LCFI16:
-.LBB266:
-.LBB265:
-	.loc 2 221 0
 	b	printk
-.LVL118:
 .L115:
-.LCFI17:
 	pop	{r3, pc}
 .L118:
 	.align	2
@@ -1521,9 +980,6 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
-.LBE265:
-.LBE266:
-.LFE195:
 	.fnend
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.align	1
@@ -1535,104 +991,66 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 	.fnstart
-.LFB197:
-	.loc 2 326 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL119:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI18:
-	.loc 2 332 0
 	movw	r4, #65535
 	cmp	r0, r4
 	beq	.L120
-	.loc 2 335 0
 	ldr	r2, .L126
 	movs	r1, #6
 	mul	r7, r1, r0
-	ldr	ip, [r2, #2292]
+	ldr	ip, [r2, #2316]
 	mov	r5, r2
 	add	r6, ip, r7
-.LVL120:
-	.loc 2 336 0
 	strh	r4, [r6, #2]	@ movhi
 	strh	r4, [ip, r7]	@ movhi
-	.loc 2 338 0
-	ldr	r3, [r2, #2316]
-.LVL121:
+	ldr	r3, [r2, #2340]
 	cbnz	r3, .L121
-	.loc 2 339 0
-	str	r6, [r2, #2316]
-.LVL122:
+	str	r6, [r2, #2340]
 .L120:
-	.loc 2 372 0
 	movs	r0, #0
-.LVL123:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL124:
 .L121:
-	.loc 2 345 0
-	ldr	lr, [r2, #2292]
-	.loc 2 343 0
-	ldr	r8, [r2, #2304]
-	.loc 2 345 0
+	ldr	lr, [r2, #2316]
+	ldr	r8, [r2, #2328]
 	sub	r2, r3, lr
 	asr	r10, r2, #1
 	ldr	r2, .L126+4
-	.loc 2 343 0
 	ldrh	r9, [r8, r0, lsl #1]
-.LVL125:
-	.loc 2 345 0
 	mul	r2, r2, r10
-	.loc 2 352 0
 	mov	r10, r4
-	.loc 2 345 0
 	uxth	r2, r2
 .L124:
-	.loc 2 349 0
 	ldrh	r4, [r8, r2, lsl #1]
 	cmp	r4, r9
 	bcs	.L122
-	.loc 2 352 0
 	ldrh	r4, [r3]
 	cmp	r4, r10
 	bne	.L123
-	.loc 2 353 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 355 0
 	b	.L120
 .L123:
-	.loc 2 358 0
 	mla	r3, r1, r4, lr
-	.loc 2 348 0
 	mov	r2, r4
 	b	.L124
 .L122:
-	.loc 2 361 0
 	ldrh	r1, [r3, #2]
 	strh	r1, [r6, #2]	@ movhi
-	.loc 2 362 0
 	strh	r2, [ip, r7]	@ movhi
-	.loc 2 364 0
-	ldr	r2, [r5, #2316]
+	ldr	r2, [r5, #2340]
 	cmp	r3, r2
-	.loc 2 368 0
 	ittte	ne
 	ldrhne	r4, [r3, #2]
 	movne	r2, #6
-	ldrne	r1, [r5, #2292]
-	.loc 2 365 0
+	ldrne	r1, [r5, #2316]
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 366 0
 	iteee	eq
-	streq	r6, [r5, #2316]
-	.loc 2 368 0
+	streq	r6, [r5, #2340]
 	mulne	r2, r2, r4
 	strhne	r0, [r1, r2]	@ movhi
-	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
 	b	.L120
 .L127:
@@ -1640,7 +1058,6 @@ insert_free_list:
 .L126:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE197:
 	.fnend
 	.size	insert_free_list, .-insert_free_list
 	.align	1
@@ -1652,44 +1069,25 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 	.fnstart
-.LFB194:
-	.loc 2 211 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL126:
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI19:
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL127:
-	.loc 2 213 0
 	ldr	r2, .L130
-	ldrh	r3, [r2, #2320]
+	ldrh	r3, [r2, #2344]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #2320]	@ movhi
-	.loc 2 214 0
-	ldrh	r2, [r2, #16]
+	strh	r3, [r2, #2344]	@ movhi
+	ldrh	r2, [r2, #40]
 	cmp	r2, r3
 	bcs	.L128
-.LBB269:
-.LBB270:
 	movs	r2, #214
 	ldr	r1, .L130+4
 	ldr	r0, .L130+8
-.LBE270:
-.LBE269:
-	.loc 2 215 0
 	pop	{r3, lr}
-.LCFI20:
-.LBB272:
-.LBB271:
-	.loc 2 214 0
 	b	printk
-.LVL128:
 .L128:
-.LCFI21:
 	pop	{r3, pc}
 .L131:
 	.align	2
@@ -1697,9 +1095,6 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
-.LBE271:
-.LBE272:
-.LFE194:
 	.fnend
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.align	1
@@ -1711,100 +1106,68 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 	.fnstart
-.LFB198:
-	.loc 2 375 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL129:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI22:
-	.loc 2 378 0
 	movs	r6, #6
 	ldr	r4, .L138
 	muls	r6, r1, r6
-	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 378 0
-	ldr	r7, [r4, #2292]
+	ldr	r7, [r4, #2316]
 	adds	r5, r7, r6
-.LVL130:
-	.loc 2 379 0
 	ldrh	r2, [r5, #2]
 	cmp	r2, r3
 	bne	.L133
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r5, r3
 	beq	.L133
-	.loc 2 379 0 discriminator 2
 	movw	r2, #379
 	ldr	r1, .L138+4
-.LVL131:
 	ldr	r0, .L138+8
 	bl	printk
-.LVL132:
 .L133:
-	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
-.LVL133:
 	cmp	r5, r3
 	ldrh	r3, [r7, r6]
 	bne	.L134
-	.loc 2 382 0
 	cmp	r3, r1
-	.loc 2 385 0
 	ittee	ne
-	ldrne	r0, [r4, #2292]
+	ldrne	r0, [r4, #2316]
 	movne	r2, #6
-	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 385 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 2 386 0
 	strhne	r1, [r3, #2]	@ movhi
 .L136:
-	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL134:
 .L134:
-	.loc 2 388 0
 	cmp	r3, r1
 	ldrh	r1, [r5, #2]
 	bne	.L137
-	.loc 2 389 0
 	cmp	r1, r3
 	beq	.L136
-	.loc 2 391 0
 	movs	r2, #6
-	ldr	r0, [r4, #2292]
+	ldr	r0, [r4, #2316]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
 	b	.L136
 .L137:
-	.loc 2 395 0
-	ldr	r0, [r4, #2292]
+	ldr	r0, [r4, #2316]
 	movs	r2, #6
 	mla	r3, r2, r3, r0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 396 0
 	ldrh	r0, [r5, #2]
-	.loc 2 397 0
 	ldrh	r1, [r7, r6]
-	ldr	r3, [r4, #2292]
+	ldr	r3, [r4, #2316]
 	muls	r2, r0, r2
 	strh	r1, [r3, r2]	@ movhi
 	b	.L136
@@ -1814,7 +1177,6 @@ List_remove_node:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
-.LFE198:
 	.fnend
 	.size	List_remove_node, .-List_remove_node
 	.align	1
@@ -1826,70 +1188,43 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	.fnstart
-.LFB199:
-	.loc 2 404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL135:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI23:
-	.loc 2 408 0
 	ldr	r3, [r0]
-.LVL136:
 	cbz	r3, .L146
-	.loc 2 413 0
 	ldr	r2, .L147
-	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 413 0
 	movs	r6, #6
-	ldr	r2, [r2, #2292]
+	ldr	r2, [r2, #2316]
 .L142:
-	.loc 2 412 0
 	cbnz	r1, .L143
 .L145:
-	.loc 2 416 0
 	ldr	r4, .L147+4
 	subs	r3, r3, r2
-.LVL137:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-	.loc 2 417 0
 	uxth	r1, r4
-.LVL138:
 	bl	List_remove_node
-.LVL139:
 	uxth	r0, r4
-	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL140:
 .L143:
-	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
 	beq	.L145
-	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL141:
-	.loc 2 413 0
 	mla	r3, r6, r4, r2
-	.loc 2 414 0
 	uxth	r1, r1
-.LVL142:
 	b	.L142
 .L146:
-	.loc 2 409 0
 	movw	r0, #65535
-.LVL143:
-	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
 .L148:
 	.align	2
 .L147:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE199:
 	.fnend
 	.size	List_pop_index_node, .-List_pop_index_node
 	.align	1
@@ -1901,17 +1236,11 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 	.fnstart
-.LFB200:
-	.loc 2 423 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL144:
-	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL145:
-.LFE200:
 	.fnend
 	.size	List_pop_head_node, .-List_pop_head_node
 	.align	1
@@ -1923,68 +1252,41 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	.fnstart
-.LFB201:
-	.loc 2 428 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL146:
-	.loc 2 432 0
 	ldr	r2, .L156
-	.loc 2 428 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI24:
-	.loc 2 432 0
-	ldr	r3, [r2, #2296]
-.LVL147:
+	ldr	r3, [r2, #2320]
 	cbz	r3, .L155
-	.loc 2 437 0
-	ldr	r1, [r2, #2292]
+	ldr	r1, [r2, #2316]
 	movs	r4, #6
-	.loc 2 436 0
 	movw	r2, #65535
 .L152:
 	cbz	r0, .L153
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL148:
 	cmp	r3, r2
 	bne	.L154
-.LVL149:
 .L155:
-	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL150:
 	pop	{r4, pc}
-.LVL151:
 .L154:
-	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL152:
-	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL153:
-	.loc 2 438 0
 	uxth	r0, r0
-.LVL154:
 	b	.L152
 .L153:
-	.loc 2 442 0
 	ldr	r0, .L156+4
-.LVL155:
 	subs	r3, r3, r1
-.LVL156:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 445 0
 	pop	{r4, pc}
 .L157:
 	.align	2
 .L156:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE201:
 	.fnend
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.align	1
@@ -1996,59 +1298,36 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 	.fnstart
-.LFB202:
-	.loc 2 448 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL157:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI25:
-	.loc 2 448 0
 	mov	r5, r0
-	.loc 2 457 0
 	ldr	r4, .L169
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
 	beq	.L160
-	.loc 2 457 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
+	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
 	beq	.L160
-	.loc 2 457 0 discriminator 2
-	ldrh	r3, [r4, #2420]
+	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
 	beq	.L160
-.LBB275:
-.LBB276:
-	.loc 2 460 0 is_stmt 1
 	movs	r7, #6
-	ldr	r9, [r4, #2292]
+	ldr	r9, [r4, #2316]
 	muls	r7, r0, r7
-	.loc 2 462 0
-	ldr	r3, [r4, #2296]
-	.loc 2 460 0
+	ldr	r3, [r4, #2320]
 	add	r8, r9, r7
-.LVL158:
-	.loc 2 462 0
 	cmp	r8, r3
 	beq	.L160
-	.loc 2 466 0
 	ldrh	r6, [r8, #4]
-	.loc 2 465 0
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
-.LVL159:
-	.loc 2 467 0
 	cmp	r6, #0
 	beq	.L167
-	.loc 2 466 0
 	muls	r6, r3, r6
-.LVL160:
 .L162:
-	.loc 2 470 0
 	ldrh	r3, [r8, #2]
-.LVL161:
 	movw	r2, #65535
 	cmp	r3, r2
 	bne	.L163
@@ -2059,9 +1338,7 @@ List_update_data_list:
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
 	bl	printk
-.LVL162:
 .L163:
-	.loc 2 471 0
 	ldrh	r3, [r8, #2]
 	movw	r2, #65535
 	cmp	r3, r2
@@ -2070,73 +1347,44 @@ List_update_data_list:
 	cmp	r2, r3
 	beq	.L160
 .L164:
-	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-	.loc 2 474 0
 	ldr	r3, .L169+12
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 475 0
-	ldr	r1, [r4, #2300]
+	ldr	r1, [r4, #2324]
 	ldrh	r0, [r1, r3, lsl #1]
-.LVL163:
-	.loc 2 476 0
-	ldr	r1, [r4, #2292]
+	ldr	r1, [r4, #2316]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	.loc 2 477 0
 	cbz	r3, .L168
-	.loc 2 476 0
 	muls	r3, r0, r3
-.LVL164:
 .L165:
-	.loc 2 480 0
 	cmp	r6, r3
 	bcs	.L160
-	.loc 2 481 0
 	mov	r1, r5
 	ldr	r0, .L169+16
-.LVL165:
 	bl	List_remove_node
-.LVL166:
-	ldrh	r3, [r4, #2312]
+	ldrh	r3, [r4, #2336]
 	cbnz	r3, .L166
 	movw	r2, #481
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
 	bl	printk
-.LVL167:
 .L166:
-	ldrh	r3, [r4, #2312]
-	.loc 2 482 0
+	ldrh	r3, [r4, #2336]
 	mov	r0, r5
-	.loc 2 481 0
 	subs	r3, r3, #1
-	strh	r3, [r4, #2312]	@ movhi
-	.loc 2 482 0
+	strh	r3, [r4, #2336]	@ movhi
 	bl	INSERT_DATA_LIST
-.LVL168:
 .L160:
-.LBE276:
-.LBE275:
-	.loc 2 485 0
 	movs	r0, #0
-.LVL169:
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.LVL170:
 .L167:
-.LBB278:
-.LBB277:
-	.loc 2 468 0
 	mov	r6, #-1
-.LVL171:
 	b	.L162
-.LVL172:
 .L168:
-	.loc 2 478 0
 	mov	r3, #-1
-.LVL173:
 	b	.L165
 .L170:
 	.align	2
@@ -2145,10 +1393,7 @@ List_update_data_list:
 	.word	.LANCHOR1+51
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR0+2296
-.LBE277:
-.LBE278:
-.LFE202:
+	.word	.LANCHOR0+2320
 	.fnend
 	.size	List_update_data_list, .-List_update_data_list
 	.align	1
@@ -2160,79 +1405,59 @@ List_update_data_list:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	.fnstart
-.LFB210:
-	.loc 2 749 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI26:
-	.loc 2 754 0
 	movs	r1, #0
 	ldr	r5, .L181
-	.loc 2 755 0
 	movs	r0, #12
 	movw	r6, #65535
-	.loc 2 754 0
-	ldrh	r2, [r5, #114]
-	.loc 2 755 0
-	ldr	r3, [r5, #2468]
+	ldrh	r2, [r5, #138]
+	ldr	r3, [r5, #2492]
 .L172:
 	uxth	r4, r1
-	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
 	bcc	.L174
 	mov	r4, r2
 	movs	r1, #0
 	mov	r7, #-2147483648
-	.loc 2 765 0
 	mov	ip, #12
 .L175:
 	uxth	r6, r1
-	.loc 2 764 0 discriminator 1
 	cmp	r6, r2
 	bcc	.L177
-	.loc 2 773 0
 	cmp	r4, r2
 	bcc	.L173
-	.loc 2 779 0
-	ldrh	r7, [r5, #2472]
+	ldrh	r7, [r5, #2496]
 	mov	r4, r2
 	movs	r1, #0
 	mov	r0, #-1
 .L178:
 	uxth	r5, r1
-	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L180
-	.loc 2 784 0
 	cmp	r4, r2
 	bcc	.L173
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	r2, #784
 	ldr	r1, .L181+4
 	ldr	r0, .L181+8
 	bl	printk
-.LVL174:
 	b	.L173
 .L174:
 	adds	r1, r1, #1
-	.loc 2 755 0 is_stmt 1
 	mla	r7, r0, r1, r3
 	ldrh	r7, [r7, #-12]
 	cmp	r7, r6
 	bne	.L172
 .L173:
-	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
 .L177:
-	.loc 2 765 0
 	mla	r0, ip, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
 	blt	.L176
-	.loc 2 766 0
 	cmp	r7, r0
 	itt	hi
 	movhi	r7, r0
@@ -2241,11 +1466,9 @@ select_l2p_ram_region:
 	adds	r1, r1, #1
 	b	.L175
 .L180:
-	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
 	bls	.L179
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
@@ -2261,7 +1484,6 @@ select_l2p_ram_region:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+73
 	.word	.LC1
-.LFE210:
 	.fnend
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.align	1
@@ -2273,70 +1495,43 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 	.fnstart
-.LFB216:
-	.loc 2 931 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL175:
-	.loc 2 934 0
 	ldr	r1, .L189
-	.loc 2 931 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI27:
 	mov	r3, r1
-	.loc 2 934 0
-	ldrh	r2, [r1, #2474]
+	ldrh	r2, [r1, #2498]
 	cmp	r2, #4
 	bhi	.L184
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	r0, .L184
-	.loc 2 934 0
 	adds	r2, r2, #1
-	strh	r2, [r1, #2474]	@ movhi
-	.loc 2 943 0 is_stmt 1
+	strh	r2, [r1, #2498]	@ movhi
 	pop	{r4, r5, pc}
 .L184:
-	.loc 2 935 0
 	movs	r2, #0
-	ldrh	r1, [r3, #16]
-	strh	r2, [r3, #2474]	@ movhi
-.LBB281:
-.LBB282:
-	.loc 2 939 0
+	ldrh	r1, [r3, #40]
+	strh	r2, [r3, #2498]	@ movhi
 	movw	r5, #65535
-.LBE282:
-.LBE281:
-	.loc 2 936 0
-	str	r2, [r3, #2476]
-.LBB284:
-.LBB283:
-	.loc 2 939 0
-	ldr	r2, [r3, #2300]
+	str	r2, [r3, #2500]
+	ldr	r2, [r3, #2324]
 	add	r1, r2, r1, lsl #1
 .L185:
-	.loc 2 937 0
 	cmp	r2, r1
 	bne	.L187
 	pop	{r4, r5, pc}
 .L187:
-	.loc 2 939 0
 	ldrh	r4, [r2], #2
 	cmp	r4, r5
-	.loc 2 940 0
 	ittt	ne
-	ldrne	r0, [r3, #2476]
-.LVL176:
+	ldrne	r0, [r3, #2500]
 	addne	r0, r0, r4
-	strne	r0, [r3, #2476]
+	strne	r0, [r3, #2500]
 	b	.L185
 .L190:
 	.align	2
 .L189:
 	.word	.LANCHOR0
-.LBE283:
-.LBE284:
-.LFE216:
 	.fnend
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	1
@@ -2348,26 +1543,17 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	.fnstart
-.LFB222:
-	.loc 2 1396 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL177:
-	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1397 0
 	cbz	r1, .L192
 	b	ftl_set_blk_mode.part.6
-.LVL178:
 .L192:
-	.loc 2 1400 0
 	ldr	r2, .L193
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
-.LVL179:
-	ldr	r1, [r2]
-.LVL180:
+	ldr	r1, [r2, #24]
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
@@ -2378,7 +1564,6 @@ ftl_set_blk_mode:
 	.align	2
 .L193:
 	.word	.LANCHOR0
-.LFE222:
 	.fnend
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.align	1
@@ -2390,28 +1575,21 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 	.fnstart
-.LFB223:
-	.loc 2 1404 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL181:
-	.loc 2 1405 0
 	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL182:
-	ldr	r3, [r3]
+	ldr	r3, [r3, #24]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR0
-.LFE223:
 	.fnend
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.align	1
@@ -2423,72 +1601,46 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 	.fnstart
-.LFB229:
-	.loc 2 1657 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL183:
-	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1657 0
 	push	{r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
-.LCFI28:
-	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
 	add	r4, r0, r2, lsl #1
-	.loc 2 1662 0
 	movw	r7, #65535
-	.loc 2 1660 0
 	ldr	r3, .L205
 	adds	r4, r4, #14
-	ldrh	r5, [r3, #8]
+	ldrh	r5, [r3, #32]
 .L199:
-	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r5
 	bcc	.L201
-	ldrh	r3, [r3, #78]
+	ldrh	r3, [r3, #102]
 	add	r4, r0, #16
-	.loc 2 1669 0 is_stmt 1
 	movw	r6, #65535
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL184:
-	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
 .L202:
-	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
-.LVL185:
 	cmp	r5, r2
 	bhi	.L204
-	.loc 2 1674 0
 	pop	{r4, r5, r6, r7, pc}
-.LVL186:
 .L201:
-	.loc 2 1662 0
 	ldrh	r6, [r4, #2]!
-	.loc 2 1660 0
 	adds	r2, r2, #1
-.LVL187:
 	uxth	r2, r2
-.LVL188:
-	.loc 2 1662 0
 	cmp	r6, r7
-	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r6, [r0, #4]
 	addne	r6, r6, #1
 	strhne	r6, [r0, #4]	@ movhi
 	b	.L199
-.LVL189:
 .L204:
-	.loc 2 1669 0
 	ldrh	r2, [r4], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
-	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
@@ -2498,7 +1650,6 @@ ftl_sb_update_avl_pages:
 	.align	2
 .L205:
 	.word	.LANCHOR0
-.LFE229:
 	.fnend
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	1
@@ -2510,38 +1661,22 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	.fnstart
-.LFB232:
-	.loc 2 2062 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL190:
-	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2062 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI29:
-	.loc 2 2065 0
 	cbz	r3, .L207
-	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L207
-.LBB287:
-.LBB288:
-	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-.LVL191:
-	.loc 2 2072 0
 	ldr	r2, .L213
-	ldrh	r4, [r2, #8]
-	.loc 2 2070 0
+	ldrh	r4, [r2, #32]
 	mov	r2, r3
 .L210:
 	cmp	r1, r2
@@ -2549,23 +1684,16 @@ FtlSlcSuperblockCheck:
 .L207:
 	pop	{r4, r5, pc}
 .L212:
-	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
@@ -2574,9 +1702,6 @@ FtlSlcSuperblockCheck:
 	.align	2
 .L213:
 	.word	.LANCHOR0
-.LBE288:
-.LBE287:
-.LFE232:
 	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	1
@@ -2588,77 +1713,49 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 	.fnstart
-.LFB234:
-	.loc 2 2094 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL192:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI30:
-	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2097 0
 	ldr	r6, .L220
 	ldrh	r2, [r0]
-	ldrh	r3, [r6, #16]
+	ldrh	r3, [r6, #40]
 	cmp	r2, r3
 	bcc	.L216
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	movw	r2, #2097
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
 	bl	printk
-.LVL193:
 .L216:
-	.loc 2 2100 0 is_stmt 1
-	ldrh	r9, [r6, #8]
+	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
-	.loc 2 2101 0
 	ldr	r10, .L220+12
-	.loc 2 2102 0
 	movw	r8, #65535
-	.loc 2 2098 0
 	movs	r5, #0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2099 0
 	strb	r5, [r4, #7]
 .L217:
-	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r9, r3
 	bhi	.L219
-	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2110 0
-	ldrh	r2, [r6, #78]
+	ldrh	r2, [r6, #102]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2113 0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL194:
 .L219:
-	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL195:
-	.loc 2 2102 0
 	strh	r8, [r7]	@ movhi
-	.loc 2 2101 0
 	mov	fp, r0
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL196:
 	cbnz	r0, .L218
-	.loc 2 2104 0
 	strh	fp, [r7]	@ movhi
-	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
@@ -2672,8 +1769,7 @@ make_superblock:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+95
 	.word	.LC1
-	.word	.LANCHOR0+36
-.LFE234:
+	.word	.LANCHOR0+60
 	.fnend
 	.size	make_superblock, .-make_superblock
 	.align	1
@@ -2685,60 +1781,38 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	.fnstart
-.LFB243:
-	.loc 2 2451 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL197:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI31:
-	.loc 2 2455 0
 	movs	r5, #0
 	ldr	r6, .L228
-	.loc 2 2451 0
 	mov	r7, r0
-	.loc 2 2453 0
 	mov	r4, r5
-	.loc 2 2455 0
-	ldrh	r8, [r6, #8]
-	.loc 2 2456 0
-	add	r10, r6, #36
-	.loc 2 2458 0
-	ldrh	r9, [r6, #78]
+	ldrh	r8, [r6, #32]
+	add	r10, r6, #60
+	ldrh	r9, [r6, #102]
 .L223:
-	.loc 2 2455 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
 	bhi	.L225
-	.loc 2 2460 0
 	cbz	r4, .L227
-	.loc 2 2461 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL198:
 .L226:
-	.loc 2 2462 0
-	ldr	r1, [r6, #2292]
+	ldr	r1, [r6, #2316]
 	movs	r3, #6
 	mla	r1, r3, r7, r1
 	strh	r0, [r1, #4]	@ movhi
-	.loc 2 2464 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL199:
 .L225:
-	.loc 2 2456 0
 	mov	r1, r7
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL200:
-	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL201:
 	cbnz	r0, .L224
-	.loc 2 2458 0
 	add	r4, r4, r9
 	uxth	r4, r4
 .L224:
@@ -2751,7 +1825,6 @@ update_multiplier_value:
 	.align	2
 .L228:
 	.word	.LANCHOR0
-.LFE243:
 	.fnend
 	.size	update_multiplier_value, .-update_multiplier_value
 	.align	1
@@ -2763,33 +1836,27 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 	.fnstart
-.LFB244:
-	.loc 2 2467 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2470 0
 	ldr	r2, .L233
-	ldr	r0, [r2, #2316]
+	ldr	r0, [r2, #2340]
 	cbz	r0, .L231
-	.loc 2 2471 0
-	ldr	r3, [r2, #2292]
+	ldr	r3, [r2, #2316]
 	subs	r0, r0, r3
 	ldr	r3, .L233+4
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, [r2, #2304]
+	ldr	r3, [r2, #2328]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
 .L231:
-	.loc 2 2473 0
 	bx	lr
 .L234:
 	.align	2
 .L233:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE244:
 	.fnend
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.align	1
@@ -2801,79 +1868,52 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 	.fnstart
-.LFB245:
-	.loc 2 2476 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL202:
-	.loc 2 2481 0
 	ldr	r1, .L243
-	.loc 2 2476 0
 	push	{r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
-.LCFI32:
-	.loc 2 2481 0
-	ldr	r3, [r1, #2316]
+	ldr	r3, [r1, #2340]
 	cbz	r3, .L241
-	.loc 2 2482 0
-	ldrh	r2, [r1, #2320]
-	.loc 2 2486 0
+	ldrh	r2, [r1, #2344]
 	movs	r6, #6
-	.loc 2 2484 0
-	ldr	r4, [r1, #2292]
-	.loc 2 2486 0
+	ldr	r4, [r1, #2316]
 	movw	r7, #65535
-	.loc 2 2482 0
 	rsb	r2, r2, r2, lsl #3
-	.loc 2 2484 0
 	subs	r3, r3, r4
 	asrs	r3, r3, #1
-	.loc 2 2482 0
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2483 0
 	it	gt
 	uxthgt	r0, r2
-	.loc 2 2484 0
 	ldr	r2, .L243+4
 	muls	r3, r2, r3
-	.loc 2 2485 0
 	movs	r2, #0
-	.loc 2 2484 0
 	uxth	r3, r3
 .L238:
-	.loc 2 2485 0 discriminator 1
 	uxth	r5, r2
 	cmp	r0, r5
 	bls	.L240
-	.loc 2 2486 0
 	mul	r5, r6, r3
 	adds	r2, r2, #1
 	ldrh	r5, [r4, r5]
 	cmp	r5, r7
 	bne	.L242
 .L240:
-	.loc 2 2490 0
-	ldr	r2, [r1, #2304]
+	ldr	r2, [r1, #2328]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL203:
 	pop	{r4, r5, r6, r7, pc}
-.LVL204:
 .L242:
 	mov	r3, r5
 	b	.L238
 .L241:
-	.loc 2 2477 0
 	mov	r0, r3
-.LVL205:
-	.loc 2 2493 0
 	pop	{r4, r5, r6, r7, pc}
 .L244:
 	.align	2
 .L243:
 	.word	.LANCHOR0
 	.word	-1431655765
-.LFE245:
 	.fnend
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	1
@@ -2885,466 +1925,326 @@ GetFreeBlockMaxEraseCount:
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
 	.fnstart
-.LFB150:
-	.loc 3 11 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL206:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI33:
 	mov	r7, r0
-	.loc 3 16 0
 	ldr	r6, .L257
-	.loc 3 11 0
+	add	r5, r7, #12
 	.pad #20
 	sub	sp, sp, #20
-.LCFI34:
-	.loc 3 15 0
-	add	r5, r7, #12
 	ldr	r1, .L257+4
 	bl	strcpy
-.LVL207:
-	.loc 3 16 0
-	ldr	r2, [r6, #92]
+	ldr	r2, [r6, #116]
 	mov	r0, r5
 	ldr	r1, .L257+8
 	bl	sprintf
-.LVL208:
 	add	r5, r5, r0
-	.loc 3 17 0
 	ldr	r1, .L257+12
 	mov	r0, r5
 	adds	r5, r5, #10
 	bl	strcpy
-.LVL209:
-	.loc 3 18 0
-	ldr	r2, [r6, #2480]
+	ldr	r2, [r6, #2504]
 	mov	r0, r5
 	ldr	r1, .L257+16
 	bl	sprintf
-.LVL210:
 	add	r5, r5, r0
-	.loc 3 19 0
-	ldr	r2, [r6, #2476]
+	ldr	r2, [r6, #2500]
 	ldr	r1, .L257+20
 	mov	r0, r5
 	bl	sprintf
-.LVL211:
 	add	r5, r5, r0
-	.loc 3 20 0
-	ldr	r2, [r6, #2484]
+	ldr	r2, [r6, #2508]
 	ldr	r1, .L257+24
 	mov	r0, r5
 	bl	sprintf
-.LVL212:
 	add	r5, r5, r0
-	.loc 3 21 0
-	ldr	r2, [r6, #2488]
+	ldr	r2, [r6, #2512]
 	ldr	r1, .L257+28
 	mov	r0, r5
 	bl	sprintf
-.LVL213:
 	add	r5, r5, r0
-	.loc 3 22 0
-	ldr	r2, [r6, #2492]
+	ldr	r2, [r6, #2516]
 	ldr	r1, .L257+32
 	mov	r0, r5
 	bl	sprintf
-.LVL214:
 	add	r5, r5, r0
-	.loc 3 23 0
-	ldr	r2, [r6, #2496]
+	ldr	r2, [r6, #2520]
 	ldr	r1, .L257+36
 	mov	r0, r5
 	bl	sprintf
-.LVL215:
 	add	r5, r5, r0
-	.loc 3 24 0
-	ldr	r2, [r6, #2500]
+	ldr	r2, [r6, #2524]
 	ldr	r1, .L257+40
 	mov	r0, r5
 	bl	sprintf
-.LVL216:
 	add	r5, r5, r0
-	.loc 3 25 0
-	ldr	r2, [r6, #2504]
+	ldr	r2, [r6, #2528]
 	ldr	r1, .L257+44
 	mov	r0, r5
 	bl	sprintf
-.LVL217:
-	.loc 3 26 0
-	ldr	r2, [r6, #2508]
-	.loc 3 25 0
+	ldr	r2, [r6, #2532]
 	add	r5, r5, r0
-	.loc 3 26 0
 	ldr	r1, .L257+48
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL218:
-	.loc 3 27 0
-	ldr	r2, [r6, #2512]
-	.loc 3 26 0
+	ldr	r2, [r6, #2536]
 	add	r5, r5, r0
-	.loc 3 27 0
 	ldr	r1, .L257+52
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL219:
 	add	r5, r5, r0
-	.loc 3 28 0
-	ldr	r2, [r6, #2516]
+	ldr	r2, [r6, #2540]
 	ldr	r1, .L257+56
 	mov	r0, r5
 	bl	sprintf
-.LVL220:
 	add	r5, r5, r0
-	.loc 3 29 0
-	ldr	r2, [r6, #2520]
+	ldr	r2, [r6, #2544]
 	ldr	r1, .L257+60
 	mov	r0, r5
 	bl	sprintf
-.LVL221:
 	add	r5, r5, r0
-	.loc 3 30 0
-	ldrh	r2, [r6, #134]
+	ldrh	r2, [r6, #158]
 	ldr	r1, .L257+64
 	mov	r0, r5
 	bl	sprintf
-.LVL222:
 	add	r5, r5, r0
-	.loc 3 31 0
-	ldrh	r2, [r6, #2320]
+	ldrh	r2, [r6, #2344]
 	ldr	r1, .L257+68
 	mov	r0, r5
 	bl	sprintf
-.LVL223:
 	add	r5, r5, r0
-	.loc 3 32 0
-	ldr	r2, [r6, #2524]
+	ldr	r2, [r6, #2548]
 	ldr	r1, .L257+72
 	mov	r0, r5
 	bl	sprintf
-.LVL224:
 	add	r5, r5, r0
-	.loc 3 33 0
-	ldr	r2, [r6, #2528]
+	ldr	r2, [r6, #2552]
 	ldr	r1, .L257+76
 	mov	r0, r5
 	bl	sprintf
-.LVL225:
 	add	r5, r5, r0
-	.loc 3 34 0
-	ldr	r2, [r6, #2532]
+	ldr	r2, [r6, #2556]
 	ldr	r1, .L257+80
 	mov	r0, r5
 	bl	sprintf
-.LVL226:
 	add	r5, r5, r0
-	.loc 3 35 0
-	ldr	r2, [r6, #2536]
+	ldr	r2, [r6, #2560]
 	ldr	r1, .L257+84
 	mov	r0, r5
 	bl	sprintf
-.LVL227:
 	add	r5, r5, r0
-	.loc 3 36 0
-	ldr	r2, [r6, #2540]
+	ldr	r2, [r6, #2564]
 	ldr	r1, .L257+88
 	mov	r0, r5
 	bl	sprintf
-.LVL228:
 	add	r5, r5, r0
-	.loc 3 37 0
-	ldr	r2, [r6, #2544]
+	ldr	r2, [r6, #2568]
 	ldr	r1, .L257+92
 	mov	r0, r5
 	bl	sprintf
-.LVL229:
 	add	r5, r5, r0
-	.loc 3 38 0
-	ldrh	r2, [r6, #2274]
+	ldrh	r2, [r6, #2298]
 	ldr	r1, .L257+96
 	mov	r0, r5
 	bl	sprintf
-.LVL230:
 	add	r5, r5, r0
-	.loc 3 39 0
-	ldrh	r2, [r6, #2272]
+	ldrh	r2, [r6, #2296]
 	ldr	r1, .L257+100
 	mov	r0, r5
 	bl	sprintf
-.LVL231:
 	add	r5, r5, r0
-	.loc 3 40 0
-	ldr	r2, [r6, #116]
+	ldr	r2, [r6, #140]
 	ldr	r1, .L257+104
 	mov	r0, r5
 	bl	sprintf
-.LVL232:
 	add	r5, r5, r0
-	.loc 3 41 0
-	ldr	r2, [r6, #108]
+	ldr	r2, [r6, #132]
 	ldr	r1, .L257+108
 	mov	r0, r5
 	bl	sprintf
-.LVL233:
 	add	r5, r5, r0
-	.loc 3 42 0
-	ldr	r2, [r6, #4]
+	ldr	r2, [r6, #28]
 	ldr	r1, .L257+112
 	mov	r0, r5
 	bl	sprintf
-.LVL234:
 	add	r5, r5, r0
-	.loc 3 43 0
-	ldrh	r2, [r6, #194]
+	ldrh	r2, [r6, #218]
 	ldr	r1, .L257+116
 	mov	r0, r5
 	bl	sprintf
-.LVL235:
 	add	r5, r5, r0
-	.loc 3 44 0
-	ldrh	r2, [r6, #16]
+	ldrh	r2, [r6, #40]
 	ldr	r1, .L257+120
 	mov	r0, r5
 	bl	sprintf
-.LVL236:
 	add	r5, r5, r0
-	.loc 3 45 0
-	ldrh	r2, [r6, #2548]
+	ldrh	r2, [r6, #2572]
 	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL237:
 	add	r5, r5, r0
-	.loc 3 46 0
-	ldr	r2, [r6, #20]
+	ldr	r2, [r6, #44]
 	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
-.LVL238:
 	add	r5, r5, r0
-	.loc 3 47 0
-	ldrh	r2, [r6, #2552]
+	ldrh	r2, [r6, #2576]
 	ldr	r1, .L257+132
 	mov	r0, r5
 	bl	sprintf
-.LVL239:
 	add	r5, r5, r0
-	.loc 3 48 0
-	ldrh	r2, [r6, #128]
+	ldrh	r2, [r6, #152]
 	ldr	r1, .L257+136
 	mov	r0, r5
 	bl	sprintf
-.LVL240:
 	add	r5, r5, r0
-	.loc 3 49 0
-	ldrh	r2, [r6, #2326]
+	ldrh	r2, [r6, #2350]
 	ldr	r1, .L257+140
 	mov	r0, r5
 	bl	sprintf
-.LVL241:
 	add	r5, r5, r0
-	.loc 3 50 0
-	ldrb	r2, [r6, #2330]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
 	ldr	r1, .L257+144
 	mov	r0, r5
 	bl	sprintf
-.LVL242:
 	add	r5, r5, r0
-	.loc 3 51 0
-	ldrh	r2, [r6, #2324]
+	ldrh	r2, [r6, #2348]
 	ldr	r1, .L257+148
 	mov	r0, r5
 	bl	sprintf
-.LVL243:
 	add	r5, r5, r0
-	.loc 3 52 0
-	ldrb	r2, [r6, #2332]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
 	ldr	r1, .L257+152
 	mov	r0, r5
 	bl	sprintf
-.LVL244:
 	add	r5, r5, r0
-	.loc 3 53 0
-	ldrh	r2, [r6, #2328]
+	ldrh	r2, [r6, #2352]
 	ldr	r1, .L257+156
 	mov	r0, r5
 	bl	sprintf
-.LVL245:
-	.loc 3 54 0
-	ldr	r3, [r6, #2300]
-	.loc 3 53 0
+	ldr	r3, [r6, #2324]
 	add	r5, r5, r0
-	.loc 3 54 0
-	ldrh	r2, [r6, #2324]
+	ldrh	r2, [r6, #2348]
 	mov	r0, r5
 	ldr	r1, .L257+160
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL246:
 	add	r5, r5, r0
-	.loc 3 55 0
-	ldrh	r2, [r6, #2374]
+	ldrh	r2, [r6, #2398]
 	ldr	r1, .L257+164
 	mov	r0, r5
 	bl	sprintf
-.LVL247:
 	add	r5, r5, r0
-	.loc 3 56 0
-	ldrb	r2, [r6, #2378]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
 	ldr	r1, .L257+168
 	mov	r0, r5
 	bl	sprintf
-.LVL248:
 	add	r5, r5, r0
-	.loc 3 57 0
-	ldrh	r2, [r6, #2372]
+	ldrh	r2, [r6, #2396]
 	ldr	r1, .L257+172
 	mov	r0, r5
 	bl	sprintf
-.LVL249:
 	add	r5, r5, r0
-	.loc 3 58 0
-	ldrb	r2, [r6, #2380]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
 	ldr	r1, .L257+176
 	mov	r0, r5
 	bl	sprintf
-.LVL250:
 	add	r5, r5, r0
-	.loc 3 59 0
-	ldrh	r2, [r6, #2376]
+	ldrh	r2, [r6, #2400]
 	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL251:
-	.loc 3 60 0
-	ldr	r3, [r6, #2300]
-	.loc 3 59 0
+	ldr	r3, [r6, #2324]
 	add	r5, r5, r0
-	.loc 3 60 0
-	ldrh	r2, [r6, #2372]
+	ldrh	r2, [r6, #2396]
 	mov	r0, r5
 	ldr	r1, .L257+184
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL252:
 	add	r5, r5, r0
-	.loc 3 61 0
-	ldrh	r2, [r6, #2422]
+	ldrh	r2, [r6, #2446]
 	ldr	r1, .L257+188
 	mov	r0, r5
 	bl	sprintf
-.LVL253:
 	add	r5, r5, r0
-	.loc 3 62 0
-	ldrb	r2, [r6, #2426]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
 	ldr	r1, .L257+192
 	mov	r0, r5
 	bl	sprintf
-.LVL254:
 	add	r5, r5, r0
-	.loc 3 63 0
-	ldrh	r2, [r6, #2420]
+	ldrh	r2, [r6, #2444]
 	ldr	r1, .L257+196
 	mov	r0, r5
 	bl	sprintf
-.LVL255:
 	add	r5, r5, r0
-	.loc 3 64 0
-	ldrb	r2, [r6, #2428]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
 	ldr	r1, .L257+200
 	mov	r0, r5
 	bl	sprintf
-.LVL256:
 	add	r5, r5, r0
-	.loc 3 65 0
-	ldrh	r2, [r6, #2424]
+	ldrh	r2, [r6, #2448]
 	ldr	r1, .L257+204
 	mov	r0, r5
 	bl	sprintf
-.LVL257:
 	add	r5, r5, r0
-	.loc 3 66 0
-	ldrh	r2, [r6, #2566]
+	ldrh	r2, [r6, #2590]
 	ldr	r1, .L257+208
 	mov	r0, r5
 	bl	sprintf
-.LVL258:
 	add	r5, r5, r0
-	.loc 3 67 0
-	ldrb	r2, [r6, #2570]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
 	ldr	r1, .L257+212
 	mov	r0, r5
 	bl	sprintf
-.LVL259:
 	add	r5, r5, r0
-	.loc 3 68 0
-	ldrh	r2, [r6, #2564]
+	ldrh	r2, [r6, #2588]
 	ldr	r1, .L257+216
 	mov	r0, r5
 	bl	sprintf
-.LVL260:
 	add	r5, r5, r0
-	.loc 3 69 0
-	ldrb	r2, [r6, #2572]	@ zero_extendqisi2
+	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
 	ldr	r1, .L257+220
 	mov	r0, r5
 	bl	sprintf
-.LVL261:
 	add	r5, r5, r0
-	.loc 3 70 0
-	ldrh	r2, [r6, #2568]
+	ldrh	r2, [r6, #2592]
 	ldr	r1, .L257+224
 	mov	r0, r5
 	bl	sprintf
-.LVL262:
-	.loc 3 71 0
-	ldr	r3, [r6, #2688]
-	.loc 3 70 0
+	ldr	r3, [r6, #2712]
 	add	r5, r5, r0
-	.loc 3 71 0
-	ldr	r2, [r6, #2692]
+	ldr	r2, [r6, #2716]
 	mov	r0, r5
 	ldr	r1, .L257+228
 	str	r3, [sp]
-	ldr	r3, [r6, #2696]
+	ldr	r3, [r6, #2720]
 	bl	sprintf
-.LVL263:
 	adds	r4, r5, r0
-	.loc 3 72 0
-	ldr	r2, [r6, #2684]
+	ldr	r2, [r6, #2708]
 	ldr	r1, .L257+232
 	mov	r0, r4
 	bl	sprintf
-.LVL264:
 	add	r4, r4, r0
-	.loc 3 73 0
-	ldr	r2, [r6, #2708]
+	ldr	r2, [r6, #2732]
 	ldr	r1, .L257+236
 	mov	r0, r4
 	bl	sprintf
-.LVL265:
 	add	r4, r4, r0
-	.loc 3 74 0
-	ldrh	r2, [r6, #3124]
+	ldrh	r2, [r6, #3148]
 	ldr	r1, .L257+240
 	mov	r0, r4
 	bl	sprintf
-.LVL266:
 	add	r4, r4, r0
-	.loc 3 75 0
-	ldrh	r2, [r6, #3126]
+	ldrh	r2, [r6, #3150]
 	ldr	r1, .L257+244
 	mov	r0, r4
 	bl	sprintf
-.LVL267:
 	add	r4, r4, r0
-	.loc 3 76 0
-	ldr	r2, [r6, #3128]
+	ldr	r2, [r6, #3152]
 	b	.L258
 .L259:
 	.align	2
@@ -3415,170 +2315,110 @@ FtlPrintInfo2buf:
 	ldr	r1, .L260
 	mov	r0, r4
 	bl	sprintf
-.LVL268:
 	add	r4, r4, r0
-	.loc 3 77 0
-	ldrh	r2, [r6, #3132]
+	ldrh	r2, [r6, #3156]
 	ldr	r1, .L260+4
 	mov	r0, r4
 	bl	sprintf
-.LVL269:
 	add	r4, r4, r0
-	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
-.LVL270:
 	ldr	r1, .L260+8
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL271:
 	add	r4, r4, r0
-	.loc 3 79 0
-	ldrh	r0, [r6, #2320]
+	ldrh	r0, [r6, #2344]
 	bl	GetFreeBlockMaxEraseCount
-.LVL272:
 	ldr	r1, .L260+12
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL273:
-	.loc 3 80 0
 	ldr	r3, .L260+16
-	.loc 3 79 0
 	add	r4, r4, r0
-	.loc 3 80 0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L246
-.LVL274:
 .L251:
-	.loc 3 103 0
 	subs	r0, r4, r7
-	.loc 3 104 0
 	add	sp, sp, #20
-.LCFI35:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL275:
 .L246:
-.LCFI36:
-	.loc 3 83 0
-	ldrh	r3, [r6, #2564]
+	ldrh	r3, [r6, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L248
-	.loc 3 84 0
-	ldr	r2, [r6, #2300]
+	ldr	r2, [r6, #2324]
 	mov	r0, r4
 	ldr	r1, .L260+20
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
-.LVL276:
 	add	r4, r4, r0
 .L248:
-.LBB289:
-	.loc 3 86 0
 	movs	r0, #0
-	.loc 3 90 0
 	ldr	r9, .L260+28
-	.loc 3 86 0
 	bl	List_get_gc_head_node
-.LVL277:
 	uxth	r3, r0
-.LVL278:
-	.loc 3 87 0
 	movs	r5, #0
-	.loc 3 88 0
 	movw	fp, #65535
-	.loc 3 90 0
 	mov	r10, #6
 .L250:
-	.loc 3 88 0
 	cmp	r3, fp
 	beq	.L249
-	.loc 3 90 0 discriminator 2
-	ldr	r2, [r6, #2304]
+	ldr	r2, [r6, #2328]
 	mul	r8, r10, r3
 	mov	r0, r4
 	mov	r1, r9
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #8]
-	ldr	r2, [r6, #2292]
+	ldr	r2, [r6, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2300]
+	ldr	r2, [r6, #2324]
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp]
 	mov	r2, r5
 	bl	sprintf
-.LVL279:
-	.loc 3 87 0 discriminator 2
 	adds	r5, r5, #1
-	.loc 3 91 0 discriminator 2
-	ldr	r3, [r6, #2292]
-	.loc 3 87 0 discriminator 2
+	ldr	r3, [r6, #2316]
 	cmp	r5, #16
-	.loc 3 90 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 91 0 discriminator 2
 	ldrh	r3, [r3, r8]
-.LVL280:
-	.loc 3 87 0 discriminator 2
 	bne	.L250
 .L249:
-.LBE289:
-.LBB290:
-	.loc 3 95 0
-	ldr	r2, [r6, #2292]
-	.loc 3 96 0
+	ldr	r2, [r6, #2316]
 	movs	r5, #0
-	.loc 3 95 0
-	ldr	r3, [r6, #2316]
-.LVL281:
-	.loc 3 97 0
+	ldr	r3, [r6, #2340]
 	movw	r9, #65535
-	.loc 3 99 0
 	ldr	fp, .L260+32
 	mov	r10, #6
-	.loc 3 95 0
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
 	ldr	r3, .L260+24
 	muls	r3, r2, r3
 	uxth	r3, r3
-.LVL282:
 .L252:
-	.loc 3 97 0
 	cmp	r3, r9
 	beq	.L251
-	.loc 3 99 0 discriminator 2
-	ldr	r2, [r6, #2304]
+	ldr	r2, [r6, #2328]
 	mul	r8, r10, r3
 	mov	r0, r4
 	mov	r1, fp
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #4]
-	ldr	r2, [r6, #2292]
+	ldr	r2, [r6, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
 	str	r2, [sp]
 	mov	r2, r5
-	.loc 3 96 0 discriminator 2
 	adds	r5, r5, #1
-	.loc 3 99 0 discriminator 2
 	bl	sprintf
-.LVL283:
-	.loc 3 96 0 discriminator 2
 	cmp	r5, #4
-	.loc 3 99 0 discriminator 2
 	add	r4, r4, r0
-	.loc 3 96 0 discriminator 2
 	beq	.L251
-	.loc 3 100 0
-	ldr	r3, [r6, #2292]
+	ldr	r3, [r6, #2316]
 	ldrh	r3, [r3, r8]
-.LVL284:
 	b	.L252
 .L261:
 	.align	2
@@ -3592,8 +2432,6 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LC68
 	.word	.LC69
-.LBE290:
-.LFE150:
 	.fnend
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.align	1
@@ -3605,37 +2443,25 @@ FtlPrintInfo2buf:
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
 	.fnstart
-.LFB151:
-	.loc 3 113 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL285:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI37:
-	.loc 3 113 0
 	mov	r5, r0
-	.loc 3 119 0
 	ldr	r2, .L263
 	ldr	r1, .L263+4
 	bl	sprintf
-.LVL286:
 	adds	r4, r5, r0
-	.loc 3 121 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL287:
 	add	r0, r0, r4
-	.loc 3 123 0
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
-.LVL288:
 .L264:
 	.align	2
 .L263:
 	.word	.LC70
 	.word	.LC71
-.LFE151:
 	.fnend
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.align	1
@@ -3647,248 +2473,161 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 	.fnstart
-.LFB246:
-	.loc 2 2497 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI38:
 	.pad #28
 	sub	sp, sp, #28
-.LCFI39:
-	.loc 2 2507 0
 	ldr	r4, .L289
-	ldr	r2, [r4, #2532]
-	ldr	r3, [r4, #2544]
+	ldr	r2, [r4, #2556]
+	ldr	r3, [r4, #2568]
 	cmp	r2, r3
 	bcs	.L266
-	.loc 2 2510 0
-	ldrh	r1, [r4, #16]
-	.loc 2 2509 0
+	ldrh	r1, [r4, #40]
 	movs	r3, #0
-	.loc 2 2511 0
-	ldr	r0, [r4, #2304]
-	.loc 2 2509 0
-	str	r3, [r4, #2524]
+	ldr	r0, [r4, #2328]
+	str	r3, [r4, #2548]
 .L267:
-	.loc 2 2510 0 discriminator 1
 	cmp	r3, r1
 	bcc	.L268
-	.loc 2 2512 0
-	ldr	r5, [r4, #2524]
+	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__aeabi_uidiv
-.LVL289:
-	str	r0, [r4, #2532]
-	.loc 2 2513 0
-	ldr	r0, [r4, #2528]
-	ldrh	r1, [r4, #68]
+	str	r0, [r4, #2556]
+	ldr	r0, [r4, #2552]
+	ldrh	r1, [r4, #92]
 	subs	r0, r5, r0
 	bl	__aeabi_uidiv
-.LVL290:
-	str	r0, [r4, #2524]
+	str	r0, [r4, #2548]
 .L269:
-	.loc 2 2519 0
-	ldr	r6, [r4, #2544]
-	ldr	r7, [r4, #2532]
+	ldr	r6, [r4, #2568]
+	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
 	bls	.L274
-	.loc 2 2519 0 is_stmt 0 discriminator 1
-	ldr	r2, [r4, #2540]
+	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
 	bls	.L274
-.LVL291:
 .L276:
-	.loc 2 2520 0 is_stmt 1
 	movw	r5, #65535
 .L275:
-	.loc 2 2566 0
 	mov	r0, r5
-.LVL292:
 	add	sp, sp, #28
-.LCFI40:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL293:
 .L268:
-.LCFI41:
-	.loc 2 2511 0 discriminator 3
 	ldrh	r2, [r0, r3, lsl #1]
-	.loc 2 2510 0 discriminator 3
 	adds	r3, r3, #1
-	.loc 2 2511 0 discriminator 3
-	ldr	r5, [r4, #2524]
+	ldr	r5, [r4, #2548]
 	add	r2, r2, r5
-	str	r2, [r4, #2524]
+	str	r2, [r4, #2548]
 	b	.L267
 .L266:
-	.loc 2 2514 0
-	ldr	r3, [r4, #2540]
+	ldr	r3, [r4, #2564]
 	cmp	r2, r3
 	bls	.L269
-	.loc 2 2515 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2540]
-	.loc 2 2516 0
+	str	r3, [r4, #2564]
 	movs	r3, #0
 .L271:
-	.loc 2 2516 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
 	bcs	.L269
-	.loc 2 2517 0 is_stmt 1 discriminator 3
-	ldr	r1, [r4, #2304]
+	ldr	r1, [r4, #2328]
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 2 2516 0 discriminator 3
 	adds	r3, r3, #1
 	b	.L271
 .L274:
-	.loc 2 2522 0
-	ldrh	r0, [r4, #2320]
+	ldrh	r0, [r4, #2344]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL294:
-	.loc 2 2523 0
 	add	r3, r6, #64
-	.loc 2 2522 0
 	mov	r9, r0
-.LVL295:
-	.loc 2 2523 0
 	cmp	r0, r3
 	bcc	.L276
-	.loc 2 2526 0
-	ldr	r3, [r4, #2296]
-.LVL296:
+	ldr	r3, [r4, #2320]
 	cmp	r3, #0
 	beq	.L276
-	.loc 2 2530 0
-	ldrh	r2, [r4, #16]
-	.loc 2 2534 0
+	ldrh	r2, [r4, #40]
 	movw	r1, #65535
-.LVL297:
-	.loc 2 2533 0
-	ldr	lr, [r4, #2292]
-	.loc 2 2534 0
+	ldr	lr, [r4, #2316]
 	movs	r0, #0
-.LVL298:
-	ldr	r8, [r4, #2304]
-	.loc 2 2528 0
+	ldr	r8, [r4, #2328]
 	mov	r10, r1
-	.loc 2 2530 0
 	str	r2, [sp, #20]
-	.loc 2 2543 0
 	mov	fp, #6
-	.loc 2 2534 0
 	mov	r2, r1
 .L277:
-	.loc 2 2528 0
 	ldrh	ip, [r3]
 	cmp	ip, r10
 	bne	.L280
 	mov	r5, r2
 .L279:
-	.loc 2 2546 0
 	movw	r3, #65535
-.LVL299:
 	cmp	r5, r3
 	beq	.L276
-	.loc 2 2548 0
 	ldrh	r10, [r8, r5, lsl #1]
-.LVL300:
 	lsl	fp, r5, #1
-	.loc 2 2549 0
 	cmp	r6, r10
 	bcs	.L281
-	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL301:
 	cmp	r6, r0
-	.loc 2 2552 0
 	it	cc
-	strcc	r1, [r4, #2544]
-.LVL302:
+	strcc	r1, [r4, #2568]
 .L281:
-	.loc 2 2554 0
 	cmp	r7, r10
 	bls	.L276
-	.loc 2 2554 0 is_stmt 0 discriminator 1
 	add	r3, r10, #128
 	cmp	r9, r3
 	ble	.L276
-	.loc 2 2556 0 is_stmt 1
 	add	r3, r10, #256
 	cmp	r7, r3
 	bhi	.L282
-	.loc 2 2556 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2540]
+	ldr	r3, [r4, #2564]
 	add	r10, r10, #768
-.LVL303:
 	cmp	r10, r3
 	bcs	.L276
-.LVL304:
 .L282:
-	.loc 2 2558 0 is_stmt 1
 	str	r9, [sp, #8]
 	mov	r2, r7
 	ldrh	r3, [r8, fp]
 	mov	r1, r5
-.LVL305:
 	ldr	r0, .L289+4
-.LVL306:
 	str	r3, [sp, #4]
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, fp]
 	str	r3, [sp]
-	ldr	r3, [r4, #2540]
+	ldr	r3, [r4, #2564]
 	bl	printk
-.LVL307:
-	.loc 2 2559 0
 	movs	r3, #1
-	str	r3, [r4, #3136]
-	.loc 2 2560 0
+	str	r3, [r4, #3160]
 	b	.L275
-.LVL308:
 .L280:
-	.loc 2 2529 0
 	adds	r0, r0, #1
-.LVL309:
-	.loc 2 2530 0
 	ldr	r5, [sp, #20]
-	.loc 2 2529 0
 	uxth	r0, r0
-.LVL310:
-	.loc 2 2530 0
 	cmp	r0, r5
 	bhi	.L276
-	.loc 2 2532 0
 	ldrh	r5, [r3, #4]
 	cbz	r5, .L278
-	.loc 2 2533 0
 	ldr	r5, .L289+8
 	sub	r3, r3, lr
-.LVL311:
 	asrs	r3, r3, #1
 	muls	r3, r5, r3
 	uxth	r5, r3
-	.loc 2 2534 0
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r6, r3
 	bcs	.L279
-	.loc 2 2538 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-	.loc 2 2533 0
 	movhi	r2, r5
-.LVL312:
 .L278:
-	.loc 2 2543 0
 	mla	r3, fp, ip, lr
 	b	.L277
 .L290:
@@ -3897,7 +2636,6 @@ GetSwlReplaceBlock:
 	.word	.LANCHOR0
 	.word	.LC72
 	.word	-1431655765
-.LFE246:
 	.fnend
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.align	1
@@ -3909,42 +2647,25 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 	.fnstart
-.LFB247:
-	.loc 2 2570 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL313:
-	.loc 2 2571 0
 	movw	r2, #65535
-	.loc 2 2570 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI42:
-	.loc 2 2571 0
 	cmp	r0, r2
 	beq	.L292
-.LBB293:
-.LBB294:
-	.loc 2 2573 0
 	ldr	r2, .L293
 	movs	r1, #0
-	ldr	r2, [r2, #2300]
+	ldr	r2, [r2, #2324]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL314:
 .L292:
-.LBE294:
-.LBE293:
-	.loc 2 2576 0
 	movs	r0, #0
-.LVL315:
 	pop	{r3, pc}
 .L294:
 	.align	2
 .L293:
 	.word	.LANCHOR0
-.LFE247:
 	.fnend
 	.size	free_data_superblock, .-free_data_superblock
 	.align	1
@@ -3956,141 +2677,92 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 	.fnstart
-.LFB250:
-	.loc 2 2703 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL316:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI43:
-	.loc 2 2707 0
 	movw	r3, #65535
 	ldrh	r2, [r0]
-	.loc 2 2703 0
 	mov	r4, r0
-	.loc 2 2707 0
 	cmp	r2, r3
 	bne	.L296
-	.loc 2 2707 0 is_stmt 0 discriminator 1
 	movw	r2, #2707
 	ldr	r1, .L309
 	ldr	r0, .L309+4
 	bl	printk
-.LVL317:
 .L296:
-	.loc 2 2708 0 is_stmt 1
 	ldr	r5, .L309+8
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	cmp	r2, r3
 	bne	.L297
-	.loc 2 2708 0 is_stmt 0 discriminator 1
 	movw	r2, #2708
 	ldr	r1, .L309
 	ldr	r0, .L309+4
 	bl	printk
-.LVL318:
 .L297:
-	.loc 2 2709 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L298
-	.loc 2 2709 0 is_stmt 0 discriminator 1
 	movw	r2, #2709
 	ldr	r1, .L309
 	ldr	r0, .L309+4
 	bl	printk
-.LVL319:
 .L298:
-	.loc 2 2711 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2710 0
 	movs	r3, #0
-	.loc 2 2714 0
-	ldrh	r1, [r5, #8]
-	.loc 2 2712 0
+	ldrh	r1, [r5, #32]
 	movw	r6, #65535
-	.loc 2 2710 0
 	strb	r3, [r4, #10]
-	.loc 2 2711 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL320:
-	.loc 2 2716 0
 	mov	r2, r3
 .L299:
-	.loc 2 2712 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	beq	.L301
-	.loc 2 2721 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2720 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2721 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2720 0
 	orr	r6, r6, r0, lsl #10
-	.loc 2 2728 0
 	movw	r0, #65535
-.LVL321:
-	.loc 2 2721 0
 	strh	r2, [r4, #4]	@ movhi
 .L303:
-	.loc 2 2723 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2724 0
 	cmp	r1, r3
-	.loc 2 2725 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2726 0
 	moveq	r3, #0
-	.loc 2 2728 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
 	beq	.L303
 	strb	r3, [r4, #6]
-	.loc 2 2730 0
 	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	cmp	r1, r3
 	bne	.L295
-	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cbz	r2, .L295
-	.loc 2 2730 0 discriminator 2
 	movw	r2, #2730
 	ldr	r1, .L309
 	ldr	r0, .L309+4
 	bl	printk
-.LVL322:
 .L295:
-	.loc 2 2732 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL323:
 .L301:
-	.loc 2 2713 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2714 0
 	cmp	r3, r1
-	.loc 2 2713 0
 	strb	r3, [r4, #6]
-	.loc 2 2715 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2716 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2715 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2718 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
@@ -4101,7 +2773,6 @@ get_new_active_ppa:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
-.LFE250:
 	.fnend
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	1
@@ -4113,67 +2784,48 @@ get_new_active_ppa:
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 	.fnstart
-.LFB253:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 25 0
 	ldr	r3, .L320
-	.loc 5 30 0
 	mov	ip, #20
-	.loc 5 22 0
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI44:
-	.loc 5 27 0
 	mov	r9, #12
 	movs	r6, #1
-	.loc 5 25 0
 	movs	r2, #0
-	.loc 5 29 0
 	mov	r7, r3
-	.loc 5 25 0
-	str	r2, [r3, #3140]
+	str	r2, [r3, #3164]
 .L312:
-	.loc 5 26 0 discriminator 1
-	ldrh	r1, [r3, #8]
+	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	adds	r4, r2, #1
 	cmp	r0, r1
 	bcc	.L315
-	.loc 5 37 0 discriminator 1
 	ldr	r7, .L320
-	.loc 5 35 0 discriminator 1
 	mov	ip, #12
 	movs	r6, #0
 .L316:
-	.loc 5 34 0 discriminator 1
-	ldr	r2, [r3, #3160]
+	ldr	r2, [r3, #3184]
 	cmp	r1, r2
 	bcc	.L319
-	.loc 5 39 0
 	pop	{r4, r5, r6, r7, r8, r9, pc}
 .L315:
 	uxth	r2, r2
-	.loc 5 27 0 discriminator 3
-	ldr	r8, [r3, #3144]
+	ldr	r8, [r3, #3168]
 	mul	lr, r9, r2
 	add	r1, r8, lr
 	str	r6, [r1, #8]
-	.loc 5 28 0 discriminator 3
-	ldrh	r1, [r3, #86]
+	ldrh	r1, [r3, #110]
 	muls	r1, r2, r1
 	it	mi
 	addmi	r1, r1, #3
 	bic	r0, r1, #3
-	ldr	r1, [r3, #3148]
+	ldr	r1, [r3, #3172]
 	add	r1, r1, r0
 	str	r1, [r8, lr]
-	.loc 5 29 0 discriminator 3
-	ldr	r5, [r7, #3152]
-	ldr	r0, [r3, #3144]
-	ldrh	r1, [r3, #88]
+	ldr	r5, [r7, #3176]
+	ldr	r0, [r3, #3168]
+	ldrh	r1, [r3, #112]
 	muls	r1, r2, r1
 	it	mi
 	addmi	r1, r1, #3
@@ -4181,56 +2833,44 @@ FtlGcBufInit:
 	add	r8, r0, lr
 	add	r1, r1, r5
 	str	r1, [r8, #4]
-	.loc 5 30 0 discriminator 3
-	ldr	r1, [r3, #3156]
+	ldr	r1, [r3, #3180]
 	mla	r2, ip, r2, r1
 	ldr	r1, [r0, lr]
 	str	r1, [r2, #8]
-	.loc 5 31 0 discriminator 3
 	ldr	r1, [r8, #4]
 	str	r1, [r2, #12]
 	mov	r2, r4
 	b	.L312
 .L319:
-	.loc 5 35 0 discriminator 3
 	mul	r0, ip, r1
-	ldr	r4, [r3, #3144]
-	.loc 5 36 0 discriminator 3
-	ldr	r5, [r3, #3148]
-	.loc 5 35 0 discriminator 3
+	ldr	r4, [r3, #3168]
+	ldr	r5, [r3, #3172]
 	adds	r2, r4, r0
 	str	r6, [r2, #8]
-	.loc 5 36 0 discriminator 3
-	ldrh	r2, [r3, #86]
+	ldrh	r2, [r3, #110]
 	muls	r2, r1, r2
 	it	mi
 	addmi	r2, r2, #3
 	bic	r2, r2, #3
 	add	r2, r2, r5
 	str	r2, [r4, r0]
-	.loc 5 37 0 discriminator 3
-	ldr	r2, [r3, #3144]
-	ldr	r4, [r7, #3152]
+	ldr	r2, [r3, #3168]
+	ldr	r4, [r7, #3176]
 	add	r0, r0, r2
-	ldrh	r2, [r3, #88]
+	ldrh	r2, [r3, #112]
 	muls	r2, r1, r2
 	it	mi
 	addmi	r2, r2, #3
 	bic	r2, r2, #3
-	.loc 5 34 0 discriminator 3
 	adds	r1, r1, #1
-	.loc 5 37 0 discriminator 3
 	add	r2, r2, r4
-	.loc 5 34 0 discriminator 3
 	uxth	r1, r1
-	.loc 5 37 0 discriminator 3
 	str	r2, [r0, #4]
 	b	.L316
 .L321:
 	.align	2
 .L320:
 	.word	.LANCHOR0
-.LFE253:
 	.fnend
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	1
@@ -4242,42 +2882,27 @@ FtlGcBufInit:
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
 	.fnstart
-.LFB254:
-	.loc 5 42 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL324:
-	.loc 5 47 0
 	ldr	r3, .L329
-	.loc 5 42 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI45:
-	.loc 5 46 0
 	movs	r5, #0
-	.loc 5 48 0
 	mov	r10, #20
 	mov	lr, #12
-	.loc 5 49 0
 	mov	r8, r5
-	.loc 5 47 0
-	ldr	ip, [r3, #3160]
-	.loc 5 48 0
-	ldr	r6, [r3, #3144]
+	ldr	ip, [r3, #3184]
+	ldr	r6, [r3, #3168]
 .L323:
 	uxth	r3, r5
-	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
 	bls	.L322
-	.loc 5 48 0
 	mla	r4, r10, r3, r0
 	movs	r2, #0
 .L324:
 	uxth	r3, r2
-	.loc 5 47 0 discriminator 1
 	cmp	ip, r3
 	bls	.L325
-	.loc 5 48 0
 	mul	r3, lr, r3
 	ldr	r7, [r4, #8]
 	adds	r2, r2, #1
@@ -4285,7 +2910,6 @@ FtlGcBufFree:
 	ldr	r3, [r6, r3]
 	cmp	r3, r7
 	bne	.L324
-	.loc 5 49 0
 	str	r8, [r9, #8]
 .L325:
 	adds	r5, r5, #1
@@ -4296,7 +2920,6 @@ FtlGcBufFree:
 	.align	2
 .L329:
 	.word	.LANCHOR0
-.LFE254:
 	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	1
@@ -4308,57 +2931,37 @@ FtlGcBufFree:
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
 	.fnstart
-.LFB255:
-	.loc 5 57 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL325:
-	.loc 5 62 0
 	ldr	r3, .L338
-	.loc 5 63 0
 	mov	ip, #12
-	.loc 5 57 0
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
-.LCFI46:
-	.loc 5 61 0
 	movs	r4, #0
-	.loc 5 64 0
 	mov	lr, #1
-	.loc 5 65 0
 	mov	r8, #20
-	.loc 5 62 0
-	ldr	r5, [r3, #3160]
-	.loc 5 63 0
-	ldr	r6, [r3, #3144]
+	ldr	r5, [r3, #3184]
+	ldr	r6, [r3, #3168]
 .L332:
 	uxth	r2, r4
-	.loc 5 61 0 discriminator 1
 	cmp	r1, r2
 	bhi	.L336
-	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r9, pc}
 .L336:
 	mov	r9, #0
 .L333:
 	uxth	r3, r9
-	.loc 5 62 0 discriminator 1
 	cmp	r5, r3
 	bls	.L334
-	.loc 5 63 0
 	mla	r3, ip, r3, r6
 	add	r9, r9, #1
 	ldr	r7, [r3, #8]
 	cmp	r7, #0
 	bne	.L333
-	.loc 5 65 0
 	mla	r2, r8, r2, r0
 	ldr	r7, [r3]
-	.loc 5 64 0
 	str	lr, [r3, #8]
-	.loc 5 65 0
 	str	r7, [r2, #8]
-	.loc 5 66 0
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
 .L334:
@@ -4368,7 +2971,6 @@ FtlGcBufAlloc:
 	.align	2
 .L338:
 	.word	.LANCHOR0
-.LFE255:
 	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	1
@@ -4380,41 +2982,28 @@ FtlGcBufAlloc:
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
 	.fnstart
-.LFB256:
-	.loc 5 74 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL326:
-	.loc 5 78 0
 	ldr	r2, .L345
-	ldr	r3, [r2, #3164]
-	ldrh	r2, [r2, #3168]
+	ldr	r3, [r2, #3188]
+	ldrh	r2, [r2, #3192]
 	add	r2, r3, r2, lsl #1
 .L341:
-	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
 	bne	.L343
-	.loc 5 81 0
 	movs	r0, #0
-.LVL327:
 	bx	lr
-.LVL328:
 .L343:
-	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
 	bne	.L341
-	.loc 5 79 0
 	movs	r0, #1
-.LVL329:
-	.loc 5 82 0
 	bx	lr
 .L346:
 	.align	2
 .L345:
 	.word	.LANCHOR0
-.LFE256:
 	.fnend
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	1
@@ -4426,84 +3015,52 @@ IsBlkInGcList:
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
 	.fnstart
-.LFB257:
-	.loc 5 85 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL330:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI47:
-	.loc 5 85 0
 	mov	r5, r0
-	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL331:
-	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 5 91 0
 	movs	r4, #0
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL332:
-	.loc 5 91 0
 	ldr	r3, .L351
-	ldrh	r1, [r3, #3168]
-	.loc 5 92 0
-	ldr	r2, [r3, #3164]
-.LVL333:
+	ldrh	r1, [r3, #3192]
+	ldr	r2, [r3, #3188]
 .L348:
 	uxth	ip, r4
-.LVL334:
-	.loc 5 91 0 discriminator 1
 	cmp	ip, r1
 	bcc	.L350
-	.loc 5 96 0
 	bne	.L349
-	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-.LVL335:
-	.loc 5 98 0
-	ldrh	r0, [r3, #3168]
-.LVL336:
+	ldrh	r0, [r3, #3192]
 	adds	r0, r0, #1
-	strh	r0, [r3, #3168]	@ movhi
+	strh	r0, [r3, #3192]	@ movhi
 	b	.L349
-.LVL337:
 .L350:
 	adds	r4, r4, #1
-	.loc 5 92 0
 	add	ip, r2, r4, lsl #1
-.LVL338:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
 	bne	.L348
-.LVL339:
 .L349:
-	.loc 5 101 0
-	ldrh	r2, [r3, #3176]
+	ldrh	r2, [r3, #3200]
 	movs	r0, #12
-.LVL340:
 	muls	r0, r2, r0
-	ldr	r2, [r3, #3172]
+	ldr	r2, [r3, #3196]
 	adds	r1, r2, r0
 	str	r6, [r1, #4]
-	.loc 5 102 0
 	str	r7, [r1, #8]
-	.loc 5 103 0
 	str	r5, [r2, r0]
-	.loc 5 107 0
-	ldrh	r2, [r3, #3176]
+	ldrh	r2, [r3, #3200]
 	adds	r2, r2, #1
-	strh	r2, [r3, #3176]	@ movhi
+	strh	r2, [r3, #3200]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL341:
 .L352:
 	.align	2
 .L351:
 	.word	.LANCHOR0
-.LFE257:
 	.fnend
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.align	1
@@ -4515,56 +3072,38 @@ FtlGcUpdatePage:
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
 	.fnstart
-.LFB264:
-	.loc 5 345 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL342:
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI48:
-	.loc 5 347 0
 	mov	r1, r0
-	.loc 5 345 0
 	mov	r4, r0
-	.loc 5 347 0
 	ldr	r0, .L356
-.LVL343:
 	bl	printk
-.LVL344:
-	.loc 5 349 0
 	ldr	r3, .L356+4
-	ldrh	r0, [r3, #3178]
+	ldrh	r0, [r3, #3202]
 	cmp	r4, r0
 	beq	.L354
-	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r3, #3180]
+	ldrh	r1, [r3, #3204]
 	cmp	r4, r1
 	beq	.L354
-	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r0, r2
 	bne	.L355
-	.loc 5 352 0
-	strh	r4, [r3, #3178]	@ movhi
+	strh	r4, [r3, #3202]	@ movhi
 .L354:
-	.loc 5 356 0
 	movs	r0, #0
 	pop	{r4, pc}
-.LVL345:
 .L355:
-	.loc 5 353 0
 	cmp	r1, r2
-	.loc 5 354 0
 	it	eq
-	strheq	r4, [r3, #3180]	@ movhi
+	strheq	r4, [r3, #3204]	@ movhi
 	b	.L354
 .L357:
 	.align	2
 .L356:
 	.word	.LC73
 	.word	.LANCHOR0
-.LFE264:
 	.fnend
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.align	1
@@ -4576,71 +3115,48 @@ FtlGcRefreshBlock:
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
 	.fnstart
-.LFB265:
-	.loc 5 359 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL346:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI49:
-	.loc 5 359 0
 	mov	r5, r0
-	.loc 5 364 0
 	ldr	r4, .L362
-	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL347:
-	.loc 5 364 0
 	mov	r2, r5
-	.loc 5 361 0
 	mov	r6, r0
-	.loc 5 364 0
-	ldrh	r1, [r4, #3182]
+	ldrh	r1, [r4, #3206]
 	ldr	r0, .L362+4
 	bl	printk
-.LVL348:
-	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL349:
-	.loc 5 368 0
-	ldrh	r3, [r4, #3182]
+	ldrh	r3, [r4, #3206]
 	movs	r2, #0
-	.loc 5 369 0
-	add	r0, r4, #3184
+	addw	r0, r4, #3208
 .L359:
-	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
 	bhi	.L361
-	.loc 5 372 0
 	cmp	r3, #15
-	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-	strhls	r2, [r4, #3182]	@ movhi
+	strhls	r2, [r4, #3206]	@ movhi
 	addls	r4, r4, r3, lsl #1
-	strhls	r5, [r4, #3184]	@ movhi
+	strhls	r5, [r4, #3208]	@ movhi
 	b	.L360
 .L361:
 	adds	r2, r2, #1
-	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
 	bne	.L359
 .L360:
-	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL350:
 .L363:
 	.align	2
 .L362:
 	.word	.LANCHOR0
 	.word	.LC74
-.LFE265:
 	.fnend
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.align	1
@@ -4652,57 +3168,109 @@ FtlGcMarkBadPhyBlk:
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
 	.fnstart
-.LFB266:
-	.loc 5 379 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI50:
-	.loc 5 380 0
 	ldr	r4, .L370
-	ldrh	r3, [r4, #3182]
+	ldrh	r3, [r4, #3206]
 	cbz	r3, .L365
-	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r4, #3178]
+	ldrh	r1, [r4, #3202]
 	movw	r2, #65535
 	cmp	r1, r2
 	bne	.L365
-	.loc 5 381 0 is_stmt 1
-	ldrh	r2, [r4, #3218]
+	ldrh	r2, [r4, #3242]
 	cmp	r2, r3
-	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
-	strhcs	r3, [r4, #3218]	@ movhi
-.LBB297:
-.LBB298:
-	.loc 5 383 0
-	ldrh	r3, [r4, #3218]
+	strhcs	r3, [r4, #3242]	@ movhi
+	ldrh	r3, [r4, #3242]
 	add	r3, r4, r3, lsl #1
-	ldrh	r0, [r3, #3184]
+	ldrh	r0, [r3, #3208]
 	bl	P2V_block_in_plane
-.LVL351:
 	bl	FtlGcRefreshBlock
-.LVL352:
-	.loc 5 384 0
-	ldrh	r3, [r4, #3218]
+	ldrh	r3, [r4, #3242]
 	adds	r3, r3, #1
-	strh	r3, [r4, #3218]	@ movhi
+	strh	r3, [r4, #3242]	@ movhi
 .L365:
-.LBE298:
-.LBE297:
-	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
 .L371:
 	.align	2
 .L370:
 	.word	.LANCHOR0
-.LFE266:
 	.fnend
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r1, .L373
+	b	__kmalloc
+.L374:
+	.align	2
+.L373:
+	.word	37748929
+	.fnend
+	.size	ftl_malloc, .-ftl_malloc
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	kfree
+	.fnend
+	.size	ftl_free, .-ftl_free
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, lr}
+	.save {r4, lr}
+	.pad #16
+	muls	r3, r2, r3
+	movs	r4, #0
+	str	r1, [sp, #4]
+	mov	r1, r0
+	str	r4, [sp, #12]
+	str	r3, [sp, #8]
+	movs	r3, #16
+	str	r2, [sp]
+	movs	r2, #2
+	ldr	r0, .L377
+	bl	print_hex_dump
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, pc}
+.L378:
+	.align	2
+.L377:
+	.word	.LC75
+	.fnend
+	.size	rknand_print_hex, .-rknand_print_hex
+	.align	1
 	.global	FlashReadPages
 	.syntax unified
 	.thumb
@@ -4711,135 +3279,84 @@ FtlGcReFreshBadBlk:
 	.type	FlashReadPages, %function
 FlashReadPages:
 	.fnstart
-.LFB272:
-	.loc 1 44 0
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL353:
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI51:
-	mov	r9, r1
-	.loc 1 46 0
-	ldr	r5, .L390
+	.pad #12
+	mov	r8, r1
+	ldr	r5, .L397
 	mov	r4, r0
-	.loc 1 50 0
 	movs	r6, #0
-.LVL354:
-	.loc 1 44 0
-	.pad #20
-	sub	sp, sp, #20
-.LCFI52:
-	.loc 1 51 0
-	ldr	r10, .L390+4
-	.loc 1 46 0
-	ldrh	r7, [r5, #12]
-.LVL355:
-	.loc 1 51 0
-	ldr	fp, .L390+8
-	.loc 1 53 0
-	ldr	r8, .L390+12
-	str	r5, [sp, #4]
-.LVL356:
-.L373:
-	.loc 1 50 0 discriminator 1
-	cmp	r6, r9
-	bne	.L380
-	.loc 1 71 0
+	ldr	r10, .L397+4
+	ldrh	r9, [r5, #12]
+	ldr	fp, .L397+8
+.L380:
+	cmp	r6, r8
+	bne	.L387
 	movs	r0, #0
-.LVL357:
-	add	sp, sp, #20
-.LCFI53:
+	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL358:
-.L380:
-.LCFI54:
-	.loc 1 51 0
+.L387:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L374
-	.loc 1 51 0 is_stmt 0 discriminator 2
+	cbz	r3, .L381
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L375
-.L374:
-	.loc 1 51 0 discriminator 3
-	movs	r2, #51
-.LVL359:
+	cbnz	r3, .L382
+.L381:
+	movs	r2, #76
 	mov	r1, r10
 	mov	r0, fp
-.LVL360:
 	bl	printk
-.LVL361:
-.L375:
-	.loc 1 52 0 is_stmt 1
-	add	r2, sp, #8
-.LVL362:
-	add	r1, sp, #12
+.L382:
+	mov	r2, sp
+	add	r1, sp, #4
 	mov	r0, r4
-.LVL363:
 	bl	l2p_addr_tran
-.LVL364:
-	.loc 1 53 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	ldr	r5, [r8, #12]
-	blx	r5
-.LVL365:
-	.loc 1 58 0
-	ldr	r3, [sp, #4]
-	.loc 1 57 0
+	ldr	r1, [sp, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
+	ldr	r7, [r5, #3256]
+	blx	r7
 	str	r0, [r4]
-	.loc 1 58 0
-	ldrh	r3, [r3, #14]
+	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L377
-	.loc 1 59 0
+	bne	.L384
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
-	ldr	r1, [sp, #12]
+	ldr	r1, [sp, #4]
 	adds	r3, r3, #8
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	ldr	r5, [r8, #12]
-	add	r1, r1, r7
-	blx	r5
-.LVL366:
-	.loc 1 63 0
+	ldr	r7, [r5, #3256]
+	add	r1, r1, r9
+	blx	r7
 	adds	r0, r0, #1
-	beq	.L378
-	.loc 1 64 0 discriminator 1
+	beq	.L385
 	ldr	r3, [r4, #12]
-	.loc 1 63 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L377
-	.loc 1 64 0
+	bne	.L384
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L377
-	.loc 1 65 0
+	bne	.L384
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L377
-.L378:
-	.loc 1 67 0
+	beq	.L384
+.L385:
 	mov	r3, #-1
 	str	r3, [r4]
-.L377:
-	.loc 1 50 0 discriminator 2
+.L384:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L373
-.L391:
+	b	.L380
+.L398:
 	.align	2
-.L390:
-	.word	g_nand_phy_info
+.L397:
+	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
-	.word	g_nand_ops
-.LFE272:
 	.fnend
 	.size	FlashReadPages, .-FlashReadPages
 	.align	1
@@ -4851,92 +3368,57 @@ FlashReadPages:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	.fnstart
-.LFB180:
-	.loc 4 279 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI55:
-	.loc 4 289 0
 	movs	r6, #0
-.LVL367:
-	.loc 4 286 0
-	ldr	r4, .L402
-	.loc 4 301 0
+	ldr	r4, .L409
 	movw	r10, #61664
-	.loc 4 286 0
-	ldr	r3, [r4, #3240]
-	add	r7, r4, #138
-	.loc 4 287 0
-	ldr	r8, [r4, #3244]
-	.loc 4 294 0
-	addw	r9, r4, #3220
-	.loc 4 286 0
-	str	r3, [r4, #3228]
-	.loc 4 287 0
-	str	r8, [r4, #3232]
-.LVL368:
-.L393:
-	.loc 4 289 0 discriminator 1
-	ldrh	r3, [r4, #30]
+	ldr	r3, [r4, #3280]
+	add	r7, r4, #162
+	ldr	r8, [r4, #3284]
+	addw	r9, r4, #3260
+	str	r3, [r4, #3268]
+	str	r8, [r4, #3272]
+.L400:
+	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L398
-	.loc 4 314 0
+	bcc	.L405
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL369:
-.L398:
-	.loc 4 291 0
-	ldrh	r5, [r4, #74]
-.LVL370:
-	.loc 4 290 0
+.L405:
+	ldrh	r5, [r4, #98]
 	movw	r3, #65535
 	strh	r3, [r7, #2]!	@ movhi
-.LVL371:
-.L395:
-	.loc 4 291 0 discriminator 2
-	ldrh	r3, [r4, #74]
+.L402:
+	ldrh	r3, [r4, #98]
 	subs	r5, r5, #1
-.LVL372:
 	uxth	r5, r5
-.LVL373:
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L396
-	.loc 4 292 0
+	ble	.L403
 	mla	r3, r6, r3, r5
-	.loc 4 294 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r9
-	.loc 4 292 0
 	lsls	r3, r3, #10
-.LVL374:
-	.loc 4 293 0
-	str	r3, [r4, #3224]
-	.loc 4 294 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL375:
-	.loc 4 295 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L395
-	.loc 4 301 0
+	beq	.L402
 	ldrh	r3, [r8]
 	cmp	r3, r10
-	bne	.L395
-	.loc 4 303 0
+	bne	.L402
 	strh	r5, [r7]	@ movhi
-.L396:
-	.loc 4 289 0 discriminator 2
-	adds	r6, r6, #1
-	b	.L393
 .L403:
+	adds	r6, r6, #1
+	b	.L400
+.L410:
 	.align	2
-.L402:
+.L409:
 	.word	.LANCHOR0
-.LFE180:
 	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	1
@@ -4948,118 +3430,73 @@ FtlLoadFactoryBbt:
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
 	.fnstart
-.LFB186:
-	.loc 2 47 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL376:
-	ldr	r3, .L412
-	.loc 2 51 0
+	ldr	r3, .L419
 	cmp	r1, #1
-	.loc 2 47 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI56:
-	.loc 2 57 0
 	lsl	r7, r0, #10
-	.loc 2 47 0
 	.pad #88
 	sub	sp, sp, #88
-.LCFI57:
-	.loc 2 58 0
 	mov	r2, r1
-	.loc 2 47 0
 	mov	r6, r1
-	.loc 2 51 0
 	it	eq
-	ldrheq	r4, [r3, #80]
-	.loc 2 58 0
+	ldrheq	r4, [r3, #104]
 	mov	r1, #1
-.LVL377:
-	.loc 2 51 0
 	it	ne
-	ldrhne	r4, [r3, #78]
-	.loc 2 58 0
+	ldrhne	r4, [r3, #102]
 	add	r0, sp, #4
-.LVL378:
-	.loc 2 53 0
-	ldr	r3, .L412+4
-	.loc 2 56 0
+	ldr	r3, .L419+4
 	subs	r4, r4, #1
 	sxth	r5, r4
-.LVL379:
-	.loc 2 53 0
 	str	r3, [sp, #12]
-	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
-	.loc 2 58 0
 	bl	FlashReadPages
-.LVL380:
-	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L407
+	bne	.L414
 	mov	r8, #0
-.LVL381:
-.L408:
-	.loc 2 60 0
+.L415:
 	cmp	r8, r5
-	ble	.L411
-.L407:
-	.loc 2 73 0
+	ble	.L418
+.L414:
 	mov	r0, r5
 	add	sp, sp, #88
-.LCFI58:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL382:
-.L411:
-.LCFI59:
-	.loc 2 61 0
+.L418:
 	add	r4, r8, r5
-	.loc 2 63 0
 	mov	r2, r6
-	.loc 2 61 0
 	add	r4, r4, r4, lsr #31
-	.loc 2 63 0
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 61 0
 	asrs	r4, r4, #1
-	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
-	.loc 2 63 0
 	bl	FlashReadPages
-.LVL383:
-	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L409
-	.loc 2 65 0 is_stmt 0 discriminator 1
+	bne	.L416
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L409
-	.loc 2 66 0 is_stmt 1
+	bne	.L416
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L408
-.L409:
-	.loc 2 68 0
+	b	.L415
+.L416:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L408
-.L413:
+	b	.L415
+.L420:
 	.align	2
-.L412:
+.L419:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LFE186:
 	.fnend
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	1
@@ -5071,232 +3508,147 @@ FtlGetLastWrittenPage:
 	.type	FlashProgPages, %function
 FlashProgPages:
 	.fnstart
-.LFB273:
-	.loc 1 74 0
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL384:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI60:
-	.pad #44
-	sub	sp, sp, #44
-.LCFI61:
-	.loc 1 74 0
-	str	r3, [sp]
 	mov	fp, r1
+	ldr	r6, .L451
 	mov	r9, r2
 	mov	r4, r0
-	.loc 1 76 0
-	ldr	r3, .L444
-.LVL385:
-	.loc 1 80 0
 	mov	r5, r0
-.LVL386:
-	.loc 1 83 0
-	ldr	r8, .L444+28
-	.loc 1 80 0
-	movs	r6, #0
-	.loc 1 76 0
-	ldrh	r10, [r3, #12]
-.LVL387:
+	mov	r8, #0
+	.pad #44
+	sub	sp, sp, #44
+	ldrh	r10, [r6, #12]
 	str	r3, [sp, #4]
-.LVL388:
-.L415:
-	.loc 1 80 0 discriminator 1
-	cmp	r6, fp
-	bne	.L423
-	.loc 1 101 0
-	ldr	r3, [sp]
-.LVL389:
-	cmp	r3, #0
+.L422:
+	cmp	r8, fp
 	bne	.L430
-.L443:
-	.loc 1 131 0
+	ldr	r3, [sp, #4]
+	cmp	r3, #0
+	bne	.L437
+.L450:
 	movs	r0, #0
 	add	sp, sp, #44
-.LCFI62:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL390:
-.L423:
-.LCFI63:
-	.loc 1 81 0
+.L430:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L416
-	.loc 1 81 0 is_stmt 0 discriminator 2
+	cbz	r3, .L423
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L417
-.L416:
-	.loc 1 81 0 discriminator 3
-	movs	r2, #81
-	ldr	r1, .L444+4
-	ldr	r0, .L444+8
+	cbnz	r3, .L424
+.L423:
+	movs	r2, #106
+	ldr	r1, .L451+4
+	ldr	r0, .L451+8
 	bl	printk
-.LVL391:
-.L417:
-	.loc 1 82 0 is_stmt 1
+.L424:
 	add	r2, sp, #12
 	add	r1, sp, #16
 	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL392:
-	.loc 1 83 0
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	ldr	r7, [r8, #8]
+	ldr	r7, [r6, #3252]
 	blx	r7
-.LVL393:
-	.loc 1 88 0
-	cbnz	r0, .L418
-	.loc 1 87 0
+	cbnz	r0, .L425
 	str	r0, [r5]
-.L419:
-	.loc 1 91 0
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #14]
+.L426:
+	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L421
-	.loc 1 92 0
+	bne	.L428
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	adds	r3, r3, #8
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	ldr	r7, [r8, #8]
+	ldr	r7, [r6, #3252]
 	add	r1, r1, r10
 	blx	r7
-.LVL394:
-	.loc 1 96 0
-	cbz	r0, .L421
-	.loc 1 97 0
+	cbz	r0, .L428
 	mov	r3, #-1
 	str	r3, [r5]
-.L421:
-	.loc 1 80 0 discriminator 2
-	adds	r6, r6, #1
+.L428:
+	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L415
-.L418:
-	.loc 1 89 0
+	b	.L422
+.L425:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L419
-.LVL395:
-.L428:
-.LBB299:
-	.loc 1 106 0
+	b	.L426
+.L435:
 	movs	r3, #0
-.LVL396:
-	.loc 1 112 0
 	mov	r2, r9
-	.loc 1 106 0
 	str	r3, [r7]
-	.loc 1 112 0
 	movs	r1, #1
-	.loc 1 107 0
-	str	r3, [r8, #3248]
-	.loc 1 112 0
+	str	r3, [r6, #3288]
 	add	r0, sp, #20
-	.loc 1 108 0
 	ldr	r3, [r4, #4]
-	.loc 1 109 0
 	str	r7, [sp, #28]
-	.loc 1 110 0
 	str	r10, [sp, #32]
-	.loc 1 108 0
 	str	r3, [sp, #24]
-	.loc 1 112 0
 	bl	FlashReadPages
-.LVL397:
-	.loc 1 113 0
-	ldr	fp, [sp, #20]
-.LVL398:
-	cmp	fp, #-1
-	bne	.L425
-	.loc 1 114 0
+	ldr	r3, [sp, #20]
+	adds	r2, r3, #1
+	bne	.L432
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+12
+	mov	r0, fp
+	str	r3, [sp, #4]
 	bl	printk
-.LVL399:
-	.loc 1 115 0
-	str	fp, [r4]
-.L425:
-	.loc 1 117 0
+	ldr	r3, [sp, #4]
+	str	r3, [r4]
+.L432:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L426
-	.loc 1 118 0
+	cbz	r3, .L433
 	ldr	r2, [r3]
-	ldr	r3, [r8, #3248]
+	ldr	r3, [r6, #3288]
 	cmp	r2, r3
-	beq	.L426
-	.loc 1 119 0
+	beq	.L433
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+16
+	ldr	r0, .L451+12
 	bl	printk
-.LVL400:
-	.loc 1 120 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L426:
-	.loc 1 123 0
+.L433:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L427
-	.loc 1 124 0
+	cbz	r3, .L434
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L427
-	.loc 1 125 0
+	beq	.L434
 	ldr	r1, [r4, #4]
-	ldr	r0, .L444+20
+	ldr	r0, .L451+16
 	bl	printk
-.LVL401:
-	.loc 1 126 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L427:
-.LBE299:
-	.loc 1 103 0 discriminator 2
+.L434:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-.LVL402:
-.L424:
-	.loc 1 103 0 is_stmt 0 discriminator 1
-	cmp	r6, r5
-	bne	.L428
-	b	.L443
-.LVL403:
-.L430:
-.LBB300:
-	.loc 1 107 0 is_stmt 1
-	ldr	r8, .L444+32
-.LBE300:
+.L431:
+	cmp	r8, r5
+	bne	.L435
+	b	.L450
+.L437:
 	movs	r5, #0
-.LBB301:
-	.loc 1 106 0
-	ldr	r7, .L444+24
-	.loc 1 110 0
-	add	r10, r8, #3248
-.LVL404:
-	b	.L424
-.L445:
+	ldr	r7, .L451+20
+	ldr	r10, .L451+24
+	ldr	fp, .L451+28
+	b	.L431
+.L452:
 	.align	2
-.L444:
-	.word	g_nand_phy_info
+.L451:
+	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
-	.word	.LC75
-	.word	.LC76
 	.word	.LC77
+	.word	.LC78
 	.word	check_buf
-	.word	g_nand_ops
-	.word	.LANCHOR0
-.LBE301:
-.LFE273:
+	.word	.LANCHOR0+3288
+	.word	.LC76
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
 	.align	1
@@ -5308,94 +3660,56 @@ FlashProgPages:
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
 	.fnstart
-.LFB274:
-	.loc 1 134 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL405:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
-.LCFI64:
-.LVL406:
-	.loc 1 134 0
-	mov	r8, r2
-	.loc 1 137 0
-	ldr	r5, .L457
-.LVL407:
-	mov	r4, r0
-	.loc 1 140 0
+	mov	r7, r2
+	ldr	r4, .L464
+	mov	r5, r0
 	movs	r6, #0
-.LVL408:
-	.loc 1 142 0
-	ldr	r7, .L457+4
-	.loc 1 137 0
-	ldrh	r9, [r5, #12]
-.LVL409:
-.L447:
-	.loc 1 140 0 discriminator 1
-	cmp	r6, r8
-	bne	.L453
-	.loc 1 153 0
+	mov	r9, #-1
+	ldrh	r8, [r4, #12]
+.L454:
+	cmp	r6, r7
+	bne	.L460
 	movs	r0, #0
-.LVL410:
 	add	sp, sp, #12
-.LCFI65:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL411:
-.L453:
-.LCFI66:
-	.loc 1 141 0
-	add	r1, sp, #4
+.L460:
 	mov	r2, sp
-	mov	r0, r4
-.LVL412:
+	add	r1, sp, #4
+	mov	r0, r5
 	bl	l2p_addr_tran
-.LVL413:
-	.loc 1 142 0
-	ldr	r3, [r7, #4]
+	ldr	r3, [r4, #3248]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL414:
-	.loc 1 144 0
-	cbnz	r0, .L448
-	.loc 1 143 0
-	str	r0, [r4]
-.L449:
-	.loc 1 146 0
-	ldrh	r3, [r5, #14]
+	cmp	r0, #0
+	mov	r3, r0
+	it	ne
+	movne	r3, r9
+	str	r3, [r5]
+	ldrh	r3, [r4, #14]
 	cmp	r3, #4
-	bne	.L451
-	.loc 1 147 0
+	bne	.L458
 	ldr	r1, [sp, #4]
-	ldr	r3, [r7, #4]
+	ldr	r3, [r4, #3248]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-	add	r1, r1, r9
+	add	r1, r1, r8
 	blx	r3
-.LVL415:
-	.loc 1 148 0
-	cbz	r0, .L451
-	.loc 1 149 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L451:
-	.loc 1 140 0 discriminator 2
-	adds	r6, r6, #1
-	adds	r4, r4, #20
-	b	.L447
-.L448:
-	.loc 1 145 0
-	mov	r3, #-1
-	str	r3, [r4]
-	b	.L449
+	cbz	r0, .L458
+	str	r9, [r5]
 .L458:
+	adds	r6, r6, #1
+	adds	r5, r5, #20
+	b	.L454
+.L465:
 	.align	2
-.L457:
-	.word	g_nand_phy_info
-	.word	g_nand_ops
-.LFE274:
+.L464:
+	.word	.LANCHOR0
 	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	1
@@ -5407,90 +3721,52 @@ FlashEraseBlocks:
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
 	.fnstart
-.LFB190:
-	.loc 2 98 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL416:
-	.loc 2 99 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 98 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI67:
-	.loc 2 98 0
 	mov	r5, r0
-	.loc 2 99 0
 	cmp	r3, r2
-	bhi	.L459
-.LBB310:
-.LBB311:
-	.loc 2 94 0
-	ldr	r4, .L468
-.LBE311:
-.LBE310:
-	.loc 2 101 0
-	ldrh	r3, [r4, #194]
+	bhi	.L466
+	ldr	r4, .L475
+	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
-	beq	.L459
-.LBB312:
-.LBB313:
-	.loc 2 103 0
-	cbz	r1, .L461
-.LBB314:
-	.loc 2 104 0
+	beq	.L466
+	cbz	r1, .L468
 	bl	P2V_block_in_plane
-.LVL417:
 	mov	r6, r0
-	.loc 2 105 0
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	lsls	r3, r5, #10
-	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 105 0
 	str	r3, [r0, #4]
-	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL418:
-	.loc 2 107 0
-	ldr	r2, [r4, #2304]
+	ldr	r2, [r4, #2328]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 108 0
-	ldr	r3, [r4, #2536]
+	ldr	r3, [r4, #2560]
 	adds	r3, r3, #1
-	str	r3, [r4, #2536]
-.LVL419:
-.L461:
-.LBE314:
-	.loc 2 110 0
-	ldrh	r3, [r4, #194]
+	str	r3, [r4, #2560]
+.L468:
+	ldrh	r3, [r4, #218]
 	adds	r3, r3, #1
-	strh	r3, [r4, #194]	@ movhi
-	.loc 2 111 0
-	ldrh	r3, [r4, #192]
+	strh	r3, [r4, #218]	@ movhi
+	ldrh	r3, [r4, #216]
 	add	r2, r4, r3, lsl #1
-	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 111 0
-	strh	r5, [r2, #196]	@ movhi
-	.loc 2 112 0
-	strh	r3, [r4, #192]	@ movhi
-.L459:
+	strh	r5, [r2, #220]	@ movhi
+	strh	r3, [r4, #216]	@ movhi
+.L466:
 	pop	{r4, r5, r6, pc}
-.LVL420:
-.L469:
+.L476:
 	.align	2
-.L468:
+.L475:
 	.word	.LANCHOR0
-.LBE313:
-.LBE312:
-.LFE190:
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	1
@@ -5502,365 +3778,227 @@ FtlFreeSysBlkQueueIn:
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
 	.fnstart
-.LFB159:
-	.loc 3 528 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL421:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI68:
-	.loc 3 539 0
 	mov	r10, #0
-	.loc 3 538 0
-	ldr	r4, .L515
-	.loc 3 528 0
+	ldr	r4, .L522
 	mov	r7, r1
-	.loc 3 536 0
 	mov	r6, r10
-	.loc 3 537 0
 	mov	r5, r10
-.LVL422:
-	.loc 3 540 0
 	mov	r9, #20
-	.loc 3 528 0
 	.pad #20
 	sub	sp, sp, #20
-.LCFI69:
-	.loc 3 551 0
 	mov	fp, r4
-	.loc 3 528 0
 	str	r0, [sp]
-	.loc 3 538 0
-	str	r0, [r4, #3764]
-.L471:
-	.loc 3 539 0 discriminator 1
-	ldrh	r1, [r4, #8]
+	str	r0, [r4, #3804]
+.L478:
+	ldrh	r1, [r4, #32]
 	uxth	r3, r10
 	cmp	r1, r3
-	bhi	.L476
-	.loc 3 559 0
+	bhi	.L483
 	cmp	r6, #0
-	beq	.L470
-	.loc 3 563 0
+	beq	.L477
 	mov	r8, #0
-	.loc 3 564 0
 	mov	r9, #20
-	.loc 3 562 0
 	mov	r2, r6
 	movs	r1, #0
-	ldr	r0, [r4, #3760]
-.LVL423:
+	ldr	r0, [r4, #3800]
 	bl	FlashEraseBlocks
-.LVL424:
-.L479:
-	.loc 3 563 0 discriminator 1
+.L486:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L481
-	.loc 3 571 0
+	bhi	.L488
 	cmp	r7, #0
-	beq	.L498
-	.loc 3 573 0
-	ldrh	r3, [r4, #80]
-.LVL425:
-	.loc 3 572 0
+	beq	.L505
+	ldrh	r3, [r4, #104]
 	mov	r10, #1
-.LVL426:
-	.loc 3 573 0
 	str	r3, [sp, #4]
-	.loc 3 574 0
 	lsrs	r3, r3, #2
-.LVL427:
 	str	r3, [sp, #8]
-.LVL428:
-.L482:
+.L489:
 	mov	r8, #0
-.LVL429:
-	.loc 3 579 0
 	mov	fp, #20
-.L492:
-	.loc 3 578 0
+.L499:
 	mov	r9, #0
-	.loc 3 577 0
 	mov	r6, r9
-.L483:
-	.loc 3 578 0 discriminator 1
-	ldrh	r1, [r4, #8]
+.L490:
+	ldrh	r1, [r4, #32]
 	uxth	r3, r9
-.LVL430:
 	cmp	r1, r3
-	bhi	.L487
-	.loc 3 593 0
-	cbz	r6, .L470
-	.loc 3 597 0
+	bhi	.L494
+	cbz	r6, .L477
 	mov	r9, #0
-	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r6
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	bl	FlashProgPages
-.LVL431:
-.L489:
-	.loc 3 597 0 discriminator 1
+.L496:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L491
-	.loc 3 604 0
+	bhi	.L498
 	ldr	r3, [sp, #8]
-.LVL432:
 	add	r8, r8, r3
-.LVL433:
-	.loc 3 605 0
 	ldr	r3, [sp, #4]
-.LVL434:
-	.loc 3 604 0
 	uxth	r8, r8
-.LVL435:
-	.loc 3 605 0
 	cmp	r3, r8
-	bhi	.L492
+	bhi	.L499
 	mov	r8, #0
-.LVL436:
-	.loc 3 611 0 discriminator 1
 	mov	r9, #20
-.L493:
-	.loc 3 610 0 discriminator 1
+.L500:
 	uxth	r3, r8
-.LVL437:
 	cmp	r6, r3
-	bhi	.L495
-	.loc 3 615 0
+	bhi	.L502
 	ldr	r3, [sp]
-.LVL438:
 	cmp	r3, #63
-	bls	.L496
-	.loc 3 615 0 is_stmt 0 discriminator 1
-	cbz	r7, .L470
-.L496:
-	.loc 3 616 0 is_stmt 1
+	bls	.L503
+	cbz	r7, .L477
+.L503:
 	mov	r2, r6
 	mov	r1, r10
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	bl	FlashEraseBlocks
-.LVL439:
-.L470:
-	.loc 3 619 0
+.L477:
 	mov	r0, r5
-.LVL440:
 	add	sp, sp, #20
-.LCFI70:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL441:
-.L476:
-.LCFI71:
-	.loc 3 540 0
+.L483:
 	uxth	r3, r10
-	ldr	r0, [r4, #3760]
-.LVL442:
+	ldr	r0, [r4, #3800]
 	movs	r2, #0
 	mul	r1, r9, r3
-	.loc 3 541 0
 	add	r3, r3, r4
-	.loc 3 540 0
 	str	r2, [r0, r1]
-	.loc 3 541 0
 	ldr	r1, [sp]
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL443:
 	mov	r8, r0
-	.loc 3 543 0
-	cbz	r7, .L472
-	.loc 3 544 0
+	cbz	r7, .L479
 	bl	IsBlkInVendorPart
-.LVL444:
-	cbnz	r0, .L473
-.L472:
-	.loc 3 548 0
+	cbnz	r0, .L480
+.L479:
 	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-.LVL445:
-	cbnz	r0, .L474
-	.loc 3 549 0
-	ldr	r1, [r4, #3760]
+	cbnz	r0, .L481
+	ldr	r1, [r4, #3800]
 	lsl	r3, r8, #10
-	.loc 3 551 0
-	ldr	r0, [fp, #3772]
-	.loc 3 549 0
+	ldr	r0, [fp, #3812]
 	mla	r1, r9, r6, r1
 	str	r3, [r1, #4]
-	.loc 3 550 0
-	ldr	r3, [r4, #3768]
+	ldr	r3, [r4, #3808]
 	str	r3, [r1, #8]
-	.loc 3 551 0
-	ldrh	r3, [r4, #88]
+	ldrh	r3, [r4, #112]
 	muls	r3, r6, r3
-	.loc 3 552 0
 	add	r6, r6, #1
-	.loc 3 551 0
 	it	mi
 	addmi	r3, r3, #3
-	.loc 3 552 0
 	uxth	r6, r6
-	.loc 3 551 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L473:
+.L480:
 	add	r10, r10, #1
-	b	.L471
-.L474:
-	.loc 3 554 0
+	b	.L478
+.L481:
 	adds	r5, r5, #1
-.LVL446:
 	uxth	r5, r5
-.LVL447:
-	b	.L473
-.L481:
-	.loc 3 564 0
+	b	.L480
+.L488:
 	mul	r3, r9, r8
-	ldr	r2, [r4, #3760]
+	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L480
-	.loc 3 566 0
+	bne	.L487
 	ldr	r0, [r1, #4]
-	.loc 3 565 0
 	adds	r5, r5, #1
-.LVL448:
 	uxth	r5, r5
-.LVL449:
-	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL450:
-.L480:
+.L487:
 	add	r8, r8, #1
-	b	.L479
-.L498:
-	.loc 3 533 0
+	b	.L486
+.L505:
 	movs	r3, #6
-.LVL451:
-	.loc 3 534 0
 	mov	r10, r7
-.LVL452:
-	.loc 3 533 0
 	str	r3, [sp, #8]
-	.loc 3 531 0
 	movs	r3, #1
-.LVL453:
 	str	r3, [sp, #4]
-	b	.L482
-.LVL454:
-.L487:
-	.loc 3 579 0
+	b	.L489
+.L494:
 	uxth	r3, r9
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	movs	r2, #0
 	mul	r1, fp, r3
-	.loc 3 580 0
 	add	r3, r3, r4
-	.loc 3 579 0
 	str	r2, [r0, r1]
-	.loc 3 580 0
 	ldr	r1, [sp]
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL455:
 	str	r0, [sp, #12]
-	.loc 3 581 0
-	cbz	r7, .L484
-	.loc 3 582 0
+	cbz	r7, .L491
 	bl	IsBlkInVendorPart
-.LVL456:
-	cbnz	r0, .L485
-.L484:
-	.loc 3 585 0
+	cbnz	r0, .L492
+.L491:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-.LVL457:
-	cbnz	r0, .L485
-	.loc 3 586 0
-	ldr	r1, [r4, #3760]
+	cbnz	r0, .L492
+	ldr	r1, [r4, #3800]
 	ldr	r3, [sp, #12]
-	.loc 3 588 0
-	ldr	r2, .L515
-	.loc 3 586 0
+	ldr	r2, .L522
 	mla	r1, fp, r6, r1
-	.loc 3 588 0
-	ldr	r0, [r2, #3768]
-	.loc 3 586 0
+	ldr	r0, [r2, #3808]
 	add	r3, r8, r3, lsl #10
 	str	r3, [r1, #4]
-	.loc 3 587 0
-	ldr	r3, [r4, #3776]
+	ldr	r3, [r4, #3816]
 	str	r3, [r1, #8]
-	.loc 3 588 0
-	ldrh	r3, [r4, #88]
+	ldrh	r3, [r4, #112]
 	muls	r3, r6, r3
-	.loc 3 589 0
 	add	r6, r6, #1
-	.loc 3 588 0
 	it	mi
 	addmi	r3, r3, #3
-	.loc 3 589 0
 	uxth	r6, r6
-	.loc 3 588 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L485:
+.L492:
 	add	r9, r9, #1
-	b	.L483
-.L491:
-	.loc 3 598 0
+	b	.L490
+.L498:
 	mul	r3, fp, r9
-	ldr	r2, [r4, #3760]
+	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L490
-	.loc 3 600 0
+	cbz	r3, .L497
 	ldr	r0, [r1, #4]
-	.loc 3 599 0
 	adds	r5, r5, #1
-.LVL458:
 	uxth	r5, r5
-.LVL459:
-	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL460:
-.L490:
+.L497:
 	add	r9, r9, #1
-	b	.L489
-.LVL461:
-.L495:
-	.loc 3 611 0
-	cbz	r7, .L494
-	.loc 3 611 0 is_stmt 0 discriminator 1
+	b	.L496
+.L502:
+	cbz	r7, .L501
 	mul	r3, r9, r8
-	ldr	r2, [r4, #3760]
+	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L494
-	.loc 3 612 0 is_stmt 1
+	cbnz	r3, .L501
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL462:
-.L494:
+.L501:
 	add	r8, r8, #1
-	b	.L493
-.L516:
+	b	.L500
+.L523:
 	.align	2
-.L515:
+.L522:
 	.word	.LANCHOR0
-.LFE159:
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	1
@@ -5872,106 +4010,63 @@ FtlLowFormatEraseBlock:
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
 	.fnstart
-.LFB193:
-	.loc 2 181 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI72:
-.LBB315:
-.LBB316:
-	.loc 2 89 0
-	ldr	r4, .L524
-.LBE316:
-.LBE315:
-	.loc 2 203 0
-	ldr	r6, .L524+4
-.L518:
-.LBB318:
-.LBB317:
-	.loc 2 89 0
-	ldrh	r1, [r4, #194]
-.LBE317:
-.LBE318:
-	.loc 2 186 0
-	cbz	r1, .L519
-	.loc 2 187 0
-	ldrh	r3, [r4, #190]
-	.loc 2 188 0
+	ldr	r4, .L531
+	ldr	r6, .L531+4
+.L525:
+	ldrh	r1, [r4, #218]
+	cbz	r1, .L526
+	ldrh	r3, [r4, #214]
 	subs	r1, r1, #1
-	strh	r1, [r4, #194]	@ movhi
-	.loc 2 187 0
+	strh	r1, [r4, #218]	@ movhi
 	add	r2, r4, r3, lsl #1
-	.loc 2 189 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 187 0
-	ldrh	r5, [r2, #196]
-	.loc 2 189 0
-	strh	r3, [r4, #190]	@ movhi
-.LBB319:
-	.loc 2 191 0
+	ldrh	r5, [r2, #220]
+	strh	r3, [r4, #214]	@ movhi
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL463:
 	mov	r7, r0
-	.loc 2 192 0
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	lsls	r3, r5, #10
-	.loc 2 193 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 192 0
 	str	r3, [r0, #4]
-	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL464:
-	.loc 2 194 0
-	ldr	r2, [r4, #2304]
+	ldr	r2, [r4, #2328]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-.LBE319:
-	.loc 2 202 0
 	movw	r2, #65533
-.LBB320:
-	.loc 2 195 0
-	ldr	r3, [r4, #2536]
+	ldr	r3, [r4, #2560]
 	adds	r3, r3, #1
-	str	r3, [r4, #2536]
-.LBE320:
-	.loc 2 202 0
+	str	r3, [r4, #2560]
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L523
-	.loc 2 203 0
-	ldrh	r2, [r4, #194]
+	bls	.L530
+	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	printk
-.LVL465:
-	.loc 2 205 0
-	b	.L518
-.L519:
-	.loc 2 199 0
-	ldr	r0, .L524+8
+	b	.L525
+.L526:
+	ldr	r0, .L531+8
 	bl	printk
-.LVL466:
-.L522:
-	b	.L522
-.L523:
-	.loc 2 208 0
+.L529:
+	b	.L529
+.L530:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L525:
+.L532:
 	.align	2
-.L524:
+.L531:
 	.word	.LANCHOR0
+	.word	.LC80
 	.word	.LC79
-	.word	.LC78
-.LFE193:
 	.fnend
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	1
@@ -5983,96 +4078,65 @@ FtlFreeSysBlkQueueOut:
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
 	.fnstart
-.LFB205:
-	.loc 2 562 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL467:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI73:
-	.loc 2 562 0
 	mov	r4, r0
-	.loc 2 566 0
 	ldrh	r1, [r0, #10]
 	movs	r3, #0
 	ldr	r2, [r0, #12]
-.LVL468:
-.L527:
+.L534:
 	uxth	r5, r3
-	.loc 2 566 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcs	.L530
-	.loc 2 567 0 is_stmt 1
+	bcs	.L537
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L527
-	.loc 2 568 0
+	bne	.L534
 	bl	FtlFreeSysBlkQueueOut
-.LVL469:
-	.loc 2 569 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 568 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 2 569 0
 	cmp	r3, r2
-	bls	.L528
-	.loc 2 570 0
-	ldr	r3, .L534
-	ldr	r0, .L534+4
-	ldrh	r2, [r3, #194]
+	bls	.L535
+	ldr	r3, .L541
+	ldr	r0, .L541+4
+	ldrh	r2, [r3, #218]
 	bl	printk
-.LVL470:
-.L529:
-	b	.L529
-.L528:
-	.loc 2 576 0
+.L536:
+	b	.L536
+.L535:
 	ldr	r3, [r4, #28]
-	.loc 2 574 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 2 575 0
 	strh	r5, [r4]	@ movhi
-	.loc 2 576 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 2 577 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.LVL471:
-.L530:
-	.loc 2 581 0
+.L537:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L532
-.LBB323:
-.LBB324:
+	bhi	.L539
 	movw	r2, #581
-	ldr	r1, .L534+8
-	ldr	r0, .L534+12
+	ldr	r1, .L541+8
+	ldr	r0, .L541+12
 	bl	printk
-.LVL472:
-.L532:
-.LBE324:
-.LBE323:
-	.loc 2 583 0
+.L539:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL473:
-.L535:
+.L542:
 	.align	2
-.L534:
+.L541:
 	.word	.LANCHOR0
-	.word	.LC80
+	.word	.LC81
 	.word	.LANCHOR1+160
 	.word	.LC1
-.LFE205:
 	.fnend
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	1
@@ -6084,124 +4148,57 @@ ftl_map_blk_alloc_new_blk:
 	.type	FlashTestBlk, %function
 FlashTestBlk:
 	.fnstart
-.LFB275:
-	.loc 1 156 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL474:
-	.loc 1 161 0
 	cmp	r0, #11
-	.loc 1 156 0
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-.LCFI74:
 	mov	r4, r0
 	.pad #92
 	sub	sp, sp, #92
-.LCFI75:
-	.loc 1 161 0
-	bls	.L538
-.LBB337:
-.LBB338:
-	.loc 1 165 0
-	ldr	r5, .L539
-	.loc 1 166 0
+	bls	.L545
+	ldr	r5, .L546
 	add	r0, sp, #24
-.LBB339:
-.LBB340:
-.LBB341:
-	.loc 1 202 0
 	movs	r2, #32
 	movs	r1, #165
-.LBE341:
-.LBE340:
-.LBE339:
-	.loc 1 169 0
 	lsls	r4, r4, #10
-.LVL475:
-	.loc 1 166 0
 	str	r0, [sp, #16]
-	.loc 1 165 0
 	str	r5, [sp, #12]
-.LBB344:
-.LBB343:
-.LBB342:
-	.loc 1 202 0
 	bl	memset
-.LVL476:
-.LBE342:
-.LBE343:
-.LBE344:
-	.loc 1 170 0
 	movs	r2, #1
-.LBB345:
-.LBB346:
-.LBB347:
-	.loc 1 202 0
 	mov	r3, #1515870810
-.LBE347:
-.LBE346:
-.LBE345:
-	.loc 1 170 0
 	mov	r1, r2
 	add	r0, sp, #4
-.LBB350:
-.LBB349:
-.LBB348:
-	.loc 1 202 0
 	str	r3, [r5]
 	str	r3, [r5, #4]
-.LBE348:
-.LBE349:
-.LBE350:
-	.loc 1 169 0
 	str	r4, [sp, #8]
-	.loc 1 170 0
 	bl	FlashEraseBlocks
-.LVL477:
-	.loc 1 171 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL478:
-	.loc 1 172 0
 	ldr	r4, [sp, #4]
-	.loc 1 178 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
-	.loc 1 172 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL479:
-.L536:
-.LBE338:
-.LBE337:
-	.loc 1 180 0
+.L543:
 	mov	r0, r4
-.LVL480:
 	add	sp, sp, #92
-.LCFI76:
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL481:
-.L538:
-.LCFI77:
-	.loc 1 162 0
+.L545:
 	movs	r4, #0
-.LVL482:
-	b	.L536
-.L540:
+	b	.L543
+.L547:
 	.align	2
-.L539:
+.L546:
 	.word	ftl_temp_buf
-.LFE275:
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	1
@@ -6213,102 +4210,48 @@ FlashTestBlk:
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
 	.fnstart
-.LFB276:
-	.loc 1 183 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL483:
-	push	{r3, r4, r5, lr}
-	.save {r3, r4, r5, lr}
-.LCFI78:
-.LBB361:
-.LBB362:
-.LBB363:
-	.loc 1 202 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 	mov	r2, #256
-.LBE363:
-.LBE362:
-.LBE361:
-	.loc 1 183 0
-	mov	r5, r1
-.LBB368:
-.LBB366:
-.LBB364:
-	.loc 1 202 0
-	movs	r1, #255
-.LVL484:
-.LBE364:
-.LBE366:
-.LBE368:
-	.loc 1 183 0
+	ldr	r5, .L555
 	mov	r4, r0
-.LBB369:
-.LBB367:
-.LBB365:
-	.loc 1 202 0
+	mov	r6, r1
+	movs	r1, #255
 	bl	memset
-.LVL485:
-.LBE365:
-.LBE367:
-.LBE369:
-	.loc 1 187 0
-	ldr	r3, .L548
-	mov	r1, r5
+	ldr	r3, [r5, #3244]
+	mov	r1, r6
 	mov	r0, r4
-	ldr	r3, [r3]
 	blx	r3
-.LVL486:
 	uxth	r0, r0
-.LVL487:
-	.loc 1 188 0
 	cmp	r0, #50
-	bls	.L542
-.LBB370:
-.LBB371:
-.LBB372:
-	.loc 1 202 0
+	bls	.L549
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL488:
 	bl	memset
-.LVL489:
-.LBE372:
-.LBE371:
-.LBE370:
-	.loc 1 190 0
 	movs	r0, #0
-.LVL490:
-.L542:
-	.loc 1 192 0
-	ldr	r3, .L548+4
-	ldrh	r3, [r3, #14]
+.L549:
+	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L547
+	bne	.L554
 	add	r1, r4, r0, lsl #1
-.LVL491:
 	mov	r3, r4
-.L544:
-	.loc 1 193 0 discriminator 1
+.L551:
 	cmp	r3, r1
-	bne	.L545
-.L547:
-.LVL492:
-	.loc 1 198 0
-	pop	{r3, r4, r5, pc}
-.LVL493:
-.L545:
-	.loc 1 194 0 discriminator 3
+	bne	.L552
+.L554:
+	pop	{r4, r5, r6, pc}
+.L552:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L544
-.L549:
+	b	.L551
+.L556:
 	.align	2
-.L548:
-	.word	g_nand_ops
-	.word	g_nand_phy_info
-.LFE276:
+.L555:
+	.word	.LANCHOR0
 	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	1
@@ -6320,31 +4263,16 @@ FlashGetBadBlockList:
 	.type	ftl_memset, %function
 ftl_memset:
 	.fnstart
-.LFB277:
-	.loc 1 201 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL494:
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI79:
-	.loc 1 201 0
 	mov	r4, r0
-.LBB377:
-	.loc 1 202 0
-	cbz	r2, .L551
-.LBE377:
-.LBB378:
-.LBB379:
+	cbz	r2, .L558
 	bl	memset
-.LVL495:
-.L551:
-.LBE379:
-.LBE378:
-	.loc 1 203 0 discriminator 8
+.L558:
 	mov	r0, r4
 	pop	{r4, pc}
-.LFE277:
 	.fnend
 	.size	ftl_memset, .-ftl_memset
 	.align	1
@@ -6356,544 +4284,343 @@ ftl_memset:
 	.type	FtlMemInit, %function
 FtlMemInit:
 	.fnstart
-.LFB156:
-	.loc 3 279 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI80:
-	.loc 3 297 0
 	movw	r3, #65535
-	.loc 3 282 0
-	ldr	r4, .L656
+	ldr	r4, .L663
 	movs	r5, #0
-	.loc 3 311 0
 	movs	r6, #12
-	.loc 3 312 0
 	movs	r7, #20
-	.loc 3 310 0
-	ldrh	r0, [r4, #82]
-	.loc 3 297 0
-	str	r3, [r4, #3784]
-	.loc 3 301 0
-	strh	r3, [r4, #3178]	@ movhi
-	.loc 3 302 0
-	strh	r3, [r4, #3180]	@ movhi
-	.loc 3 303 0
+	ldrh	r0, [r4, #106]
+	str	r3, [r4, #3824]
+	strh	r3, [r4, #3202]	@ movhi
+	strh	r3, [r4, #3204]	@ movhi
 	movs	r3, #32
-	strh	r3, [r4, #3124]	@ movhi
-	.loc 3 310 0
+	strh	r3, [r4, #3148]	@ movhi
 	lsls	r0, r0, #1
-	.loc 3 304 0
 	movs	r3, #128
-	.loc 3 282 0
+	str	r5, [r4, #2540]
+	strh	r3, [r4, #3150]	@ movhi
+	str	r5, [r4, #2544]
+	str	r5, [r4, #2528]
 	str	r5, [r4, #2516]
-	.loc 3 304 0
-	strh	r3, [r4, #3126]	@ movhi
-	.loc 3 283 0
+	str	r5, [r4, #2512]
 	str	r5, [r4, #2520]
-	.loc 3 284 0
-	str	r5, [r4, #2504]
-	.loc 3 285 0
-	str	r5, [r4, #2492]
-	.loc 3 286 0
-	str	r5, [r4, #2488]
-	.loc 3 287 0
-	str	r5, [r4, #2496]
-	.loc 3 288 0
-	str	r5, [r4, #2500]
-	.loc 3 289 0
-	str	r5, [r4, #2484]
-	.loc 3 290 0
 	str	r5, [r4, #2524]
-	.loc 3 291 0
-	str	r5, [r4, #2528]
-	.loc 3 292 0
-	str	r5, [r4, #2536]
-	.loc 3 293 0
-	str	r5, [r4, #2540]
-	.loc 3 294 0
-	str	r5, [r4, #2544]
-	.loc 3 295 0
-	str	r5, [r4, #3780]
-	.loc 3 296 0
-	str	r5, [r4, #3136]
-	.loc 3 298 0
-	str	r5, [r4, #3788]
-	.loc 3 299 0
-	str	r5, [r4, #3128]
-	.loc 3 300 0
-	str	r5, [r4, #3764]
-	.loc 3 305 0
-	strh	r5, [r4, #3132]	@ movhi
-	.loc 3 306 0
-	strh	r5, [r4, #3182]	@ movhi
-	.loc 3 307 0
-	strh	r5, [r4, #3218]	@ movhi
-	.loc 3 310 0
+	str	r5, [r4, #2508]
+	str	r5, [r4, #2548]
+	str	r5, [r4, #2552]
+	str	r5, [r4, #2560]
+	str	r5, [r4, #2564]
+	str	r5, [r4, #2568]
+	str	r5, [r4, #3820]
+	str	r5, [r4, #3160]
+	str	r5, [r4, #3828]
+	str	r5, [r4, #3152]
+	str	r5, [r4, #3804]
+	strh	r5, [r4, #3156]	@ movhi
+	strh	r5, [r4, #3206]	@ movhi
+	strh	r5, [r4, #3242]	@ movhi
 	bl	ftl_malloc
-.LVL496:
-	str	r0, [r4, #3164]
-	.loc 3 311 0
-	ldrh	r0, [r4, #82]
+	str	r0, [r4, #3188]
+	ldrh	r0, [r4, #106]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL497:
-	.loc 3 312 0
-	ldrh	r3, [r4, #8]
-	.loc 3 311 0
-	str	r0, [r4, #3172]
-	.loc 3 312 0
+	ldrh	r3, [r4, #32]
+	str	r0, [r4, #3196]
 	muls	r7, r3, r7
-	.loc 3 313 0
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL498:
-	str	r0, [r4, #3792]
-	.loc 3 314 0
+	str	r0, [r4, #3832]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL499:
-	str	r0, [r4, #3796]
-	.loc 3 315 0
+	str	r0, [r4, #3836]
 	mov	r0, r8
 	bl	ftl_malloc
-.LVL500:
-	str	r0, [r4, #3800]
-	.loc 3 316 0
+	str	r0, [r4, #3840]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL501:
-	str	r0, [r4, #3760]
-	.loc 3 317 0
+	str	r0, [r4, #3800]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL502:
-	.loc 3 320 0
-	ldrh	r3, [r4, #8]
-	.loc 3 319 0
-	ldrh	r7, [r4, #86]
-	.loc 3 317 0
-	str	r0, [r4, #3156]
-	.loc 3 320 0
+	ldrh	r3, [r4, #32]
+	ldrh	r7, [r4, #110]
+	str	r0, [r4, #3180]
 	lsls	r3, r3, #1
-	.loc 3 321 0
 	mov	r0, r7
-	.loc 3 320 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3160]
-	.loc 3 321 0
+	str	r3, [r4, #3184]
 	bl	ftl_malloc
-.LVL503:
-	str	r0, [r4, #3240]
-	.loc 3 322 0
+	str	r0, [r4, #3280]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL504:
-	str	r0, [r4, #3804]
-	.loc 3 323 0
+	str	r0, [r4, #3844]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL505:
-	str	r0, [r4, #3808]
-	.loc 3 324 0
-	ldr	r0, [r4, #3160]
+	str	r0, [r4, #3848]
+	ldr	r0, [r4, #3184]
 	muls	r0, r7, r0
 	bl	ftl_malloc
-.LVL506:
-	str	r0, [r4, #3148]
-	.loc 3 325 0
+	str	r0, [r4, #3172]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL507:
-	str	r0, [r4, #3776]
-	.loc 3 326 0
+	str	r0, [r4, #3816]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL508:
-	str	r0, [r4, #3768]
-	.loc 3 327 0
-	ldr	r0, [r4, #3160]
+	str	r0, [r4, #3808]
+	ldr	r0, [r4, #3184]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL509:
-	.loc 3 329 0
-	ldrh	r3, [r4, #88]
-	ldrh	r7, [r4, #8]
-	.loc 3 327 0
-	str	r0, [r4, #3144]
-	.loc 3 329 0
+	ldrh	r3, [r4, #112]
+	ldrh	r7, [r4, #32]
+	str	r0, [r4, #3168]
 	muls	r7, r3, r7
-	.loc 3 330 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL510:
-	str	r0, [r4, #3244]
-	.loc 3 331 0
+	str	r0, [r4, #3284]
 	lsls	r0, r7, #2
 	bl	ftl_malloc
-.LVL511:
-	.loc 3 332 0
-	ldrh	r3, [r4, #88]
-	.loc 3 331 0
-	str	r0, [r4, #3772]
-	.loc 3 332 0
-	ldr	r0, [r4, #3160]
+	ldrh	r3, [r4, #112]
+	str	r0, [r4, #3812]
+	ldr	r0, [r4, #3184]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL512:
-	str	r0, [r4, #3152]
-	.loc 3 335 0
-	ldrh	r0, [r4, #18]
+	str	r0, [r4, #3176]
+	ldrh	r0, [r4, #42]
 	lsls	r0, r0, #1
 	uxth	r0, r0
-	strh	r0, [r4, #3812]	@ movhi
-	.loc 3 336 0
+	strh	r0, [r4, #3852]	@ movhi
 	bl	ftl_malloc
-.LVL513:
-	.loc 3 337 0
-	ldrh	r3, [r4, #3812]
-	.loc 3 336 0
-	str	r0, [r4, #3816]
-	.loc 3 338 0
-	ldr	r0, .L656+4
-	.loc 3 337 0
+	ldrh	r3, [r4, #3852]
+	str	r0, [r4, #3856]
+	ldr	r0, .L663+4
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
-	.loc 3 338 0
 	and	r0, r0, r3, lsl #9
-	.loc 3 337 0
-	strh	r3, [r4, #3812]	@ movhi
-	.loc 3 338 0
+	strh	r3, [r4, #3852]	@ movhi
 	bl	ftl_malloc
-.LVL514:
-	.loc 3 345 0
-	ldrh	r7, [r4, #18]
-	.loc 3 338 0
-	str	r0, [r4, #3820]
-	.loc 3 339 0
+	ldrh	r7, [r4, #42]
+	str	r0, [r4, #3860]
 	adds	r0, r0, #32
-	str	r0, [r4, #2304]
-	.loc 3 345 0
+	str	r0, [r4, #2328]
 	lsls	r7, r7, #1
-	.loc 3 347 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL515:
-	str	r0, [r4, #3824]
-	.loc 3 349 0
+	str	r0, [r4, #3864]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL516:
-	.loc 3 350 0
-	ldr	r7, [r4, #104]
-	.loc 3 349 0
-	str	r0, [r4, #2300]
-	.loc 3 350 0
+	ldr	r7, [r4, #128]
+	str	r0, [r4, #2324]
 	lsls	r7, r7, #1
-	.loc 3 351 0
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL517:
-	str	r0, [r4, #3828]
-	.loc 3 352 0
+	str	r0, [r4, #3868]
 	mov	r0, r7
 	bl	ftl_malloc
-.LVL518:
-	str	r0, [r4, #3832]
-	.loc 3 353 0
-	ldrh	r0, [r4, #18]
+	str	r0, [r4, #3872]
+	ldrh	r0, [r4, #42]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL519:
-	str	r0, [r4]
-	.loc 3 354 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #24]
+	ldrh	r0, [r4, #120]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL520:
-	str	r0, [r4, #124]
-	.loc 3 355 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #148]
+	ldrh	r0, [r4, #120]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL521:
-	str	r0, [r4, #3836]
-	.loc 3 356 0
-	ldrh	r0, [r4, #96]
+	str	r0, [r4, #3876]
+	ldrh	r0, [r4, #120]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL522:
-	str	r0, [r4, #3840]
-	.loc 3 357 0
-	ldrh	r0, [r4, #98]
+	str	r0, [r4, #3880]
+	ldrh	r0, [r4, #122]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL523:
-	.loc 3 358 0
-	ldrh	r2, [r4, #98]
+	ldrh	r2, [r4, #122]
 	mov	r1, r5
-	.loc 3 357 0
-	str	r0, [r4, #3844]
-	add	r5, r4, #156
-	.loc 3 358 0
+	str	r0, [r4, #3884]
+	add	r5, r4, #180
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL524:
-	.loc 3 360 0
-	ldrh	r0, [r4, #112]
-	.loc 3 361 0
+	ldrh	r0, [r4, #136]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL525:
-	str	r0, [r4, #3848]
-	.loc 3 362 0
-	ldr	r0, [r4, #104]
-	.loc 3 363 0
+	str	r0, [r4, #3888]
+	ldr	r0, [r4, #128]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL526:
-	str	r0, [r4, #3852]
-	.loc 3 364 0
-	ldrh	r0, [r4, #114]
-	.loc 3 365 0
+	str	r0, [r4, #3892]
+	ldrh	r0, [r4, #138]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-.LVL527:
-	.loc 3 366 0
-	ldrh	r3, [r4, #114]
-	.loc 3 365 0
-	str	r0, [r4, #2468]
-	.loc 3 366 0
-	ldrh	r0, [r4, #86]
-	.loc 3 367 0
+	ldrh	r3, [r4, #138]
+	str	r0, [r4, #2492]
+	ldrh	r0, [r4, #110]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL528:
-	.loc 3 368 0
-	ldrh	r3, [r4, #18]
-	.loc 3 367 0
-	str	r0, [r4, #3856]
-	.loc 3 369 0
+	ldrh	r3, [r4, #42]
+	str	r0, [r4, #3896]
 	movs	r0, #6
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL529:
-	str	r0, [r4, #2292]
-	.loc 3 370 0
-	ldrh	r0, [r4, #74]
-	.loc 3 371 0
-	ldrh	r3, [r4, #30]
-	.loc 3 370 0
+	str	r0, [r4, #2316]
+	ldrh	r0, [r4, #98]
+	ldrh	r3, [r4, #54]
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
-	strh	r0, [r4, #3860]	@ movhi
-	.loc 3 371 0
+	strh	r0, [r4, #3900]	@ movhi
 	muls	r0, r3, r0
-	.loc 3 372 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL530:
-	.loc 3 374 0
-	ldrh	r2, [r4, #3860]
-	.loc 3 373 0
+	ldrh	r2, [r4, #3900]
 	movs	r3, #1
-.LVL531:
-	ldrh	r6, [r4, #30]
-	.loc 3 372 0
-	str	r0, [r4, #156]
+	ldrh	r6, [r4, #54]
+	str	r0, [r4, #180]
 	lsls	r2, r2, #2
-	.loc 3 373 0
 	mov	r1, r2
-.L556:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.L563:
 	cmp	r3, r6
-	bcc	.L557
-	ldr	r2, .L656+8
-	.loc 3 379 0 is_stmt 1
+	bcc	.L564
+	ldr	r2, .L663+8
 	movs	r1, #0
 	add	r3, r2, r3, lsl #2
-.LVL532:
 	adds	r2, r2, #56
 	adds	r3, r3, #24
-.L558:
-	.loc 3 377 0 discriminator 1
+.L565:
 	cmp	r2, r3
-	bne	.L559
-	.loc 3 383 0
-	ldr	r3, [r4, #3828]
-	cbnz	r3, .L560
-.L562:
-	.loc 3 385 0
-	ldr	r1, .L656+12
-	ldr	r0, .L656+16
+	bne	.L566
+	ldr	r3, [r4, #3868]
+	cbnz	r3, .L567
+.L569:
+	ldr	r1, .L663+12
+	ldr	r0, .L663+16
 	bl	printk
-.LVL533:
-	.loc 3 386 0
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL534:
-.L557:
-	.loc 3 374 0 discriminator 3
-	ldr	r0, [r4, #156]
-	.loc 3 373 0 discriminator 3
+.L564:
+	ldr	r0, [r4, #180]
 	adds	r3, r3, #1
-	.loc 3 374 0 discriminator 3
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [r5, #4]!
-	b	.L556
-.LVL535:
-.L559:
-	.loc 3 379 0 discriminator 2
+	b	.L563
+.L566:
 	str	r1, [r3, #4]!
-	b	.L558
-.L657:
+	b	.L565
+.L664:
 	.align	2
-.L656:
+.L663:
 	.word	.LANCHOR0
 	.word	33553920
-	.word	.LANCHOR0+128
+	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
-	.word	.LC81
-.L560:
-	.loc 3 388 0
-	ldr	r3, [r4, #3832]
+	.word	.LC82
+.L567:
+	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 393 0
-	ldr	r3, [r4, #3848]
+	beq	.L569
+	ldr	r3, [r4, #3888]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 398 0
-	ldr	r3, [r4, #3852]
+	beq	.L569
+	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 404 0
-	ldr	r3, [r4, #2468]
+	beq	.L569
+	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 409 0
-	ldr	r3, [r4, #3856]
+	beq	.L569
+	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 414 0
-	ldr	r3, [r4, #2292]
+	beq	.L569
+	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 419 0
-	ldr	r3, [r4, #156]
+	beq	.L569
+	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 425 0
-	ldr	r3, [r4, #2300]
+	beq	.L569
+	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 430 0
-	ldr	r3, [r4, #3164]
+	beq	.L569
+	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3172]
+	beq	.L569
+	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 435 0 is_stmt 1
-	ldr	r3, [r4, #3792]
+	beq	.L569
+	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 435 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3800]
+	beq	.L569
+	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 435 0 discriminator 2
-	ldr	r3, [r4, #3760]
+	beq	.L569
+	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 435 0 discriminator 3
-	ldr	r3, [r4, #3156]
+	beq	.L569
+	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 435 0 discriminator 4
-	ldr	r3, [r4, #3796]
+	beq	.L569
+	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 440 0 is_stmt 1
-	ldr	r3, [r4, #3240]
+	beq	.L569
+	ldr	r3, [r4, #3280]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3804]
+	beq	.L569
+	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 440 0 discriminator 2
-	ldr	r3, [r4, #3808]
+	beq	.L569
+	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 440 0 discriminator 3
-	ldr	r3, [r4, #3148]
+	beq	.L569
+	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 441 0 is_stmt 1
-	ldr	r3, [r4, #3776]
+	beq	.L569
+	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3768]
+	beq	.L569
+	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 441 0 discriminator 2
-	ldr	r3, [r4, #3144]
+	beq	.L569
+	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 446 0 is_stmt 1
-	ldr	r3, [r4, #3244]
+	beq	.L569
+	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3772]
+	beq	.L569
+	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 446 0 discriminator 2
-	ldr	r3, [r4, #3152]
+	beq	.L569
+	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 452 0 is_stmt 1
-	ldr	r3, [r4, #2304]
+	beq	.L569
+	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #3816]
+	beq	.L569
+	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 458 0 is_stmt 1
-	ldr	r3, [r4, #124]
+	beq	.L569
+	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 464 0
-	ldr	r3, .L658
-	ldr	r2, [r3, #3836]
+	beq	.L569
+	ldr	r3, .L665
+	ldr	r2, [r3, #3876]
 	cmp	r2, #0
-	beq	.L562
-	.loc 3 470 0
-	ldr	r2, [r3, #3840]
+	beq	.L569
+	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L562
-	.loc 3 476 0
-	ldr	r3, [r3, #3844]
+	beq	.L569
+	ldr	r3, [r3, #3884]
 	cmp	r3, #0
-	beq	.L562
-	.loc 3 483 0
+	beq	.L569
 	movs	r0, #0
-	.loc 3 484 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L659:
+.L666:
 	.align	2
-.L658:
+.L665:
 	.word	.LANCHOR0
-.LFE156:
 	.fnend
 	.size	FtlMemInit, .-FtlMemInit
 	.align	1
@@ -6905,78 +4632,53 @@ FtlMemInit:
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
 	.fnstart
-.LFB175:
-	.loc 4 66 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL536:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI81:
-	.loc 4 66 0
 	mov	r5, r0
-	.loc 4 69 0
-	ldr	r6, .L666
-	.loc 4 66 0
+	ldr	r6, .L673
 	mov	r7, r1
 	subs	r4, r5, #2
-	.loc 4 72 0
 	movw	r8, #65535
-	.loc 4 74 0
-	ldr	r9, .L666+4
+	ldr	r9, .L673+4
 	addw	r5, r5, #1022
-	.loc 4 69 0
-	ldrh	r2, [r6, #3860]
+	ldrh	r2, [r6, #3900]
 	movs	r1, #0
-.LVL537:
-	.loc 4 74 0
-	ldr	r10, .L666+8
-	.loc 4 69 0
+	ldr	r10, .L673+8
 	mov	r0, r7
-.LVL538:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL539:
-.L663:
-	.loc 4 72 0
+.L670:
 	ldrh	r3, [r4, #2]
 	cmp	r3, r8
-	beq	.L660
-	.loc 4 74 0
-	ldrh	r2, [r6, #74]
+	beq	.L667
+	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L662
-	.loc 4 74 0 is_stmt 0 discriminator 1
+	bhi	.L669
 	movs	r2, #74
 	mov	r1, r9
 	mov	r0, r10
 	bl	printk
-.LVL540:
-.L662:
-	.loc 4 75 0 is_stmt 1 discriminator 2
+.L669:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
-	.loc 4 70 0 discriminator 2
 	cmp	r5, r4
-	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r7, r1, lsl #2]
-	.loc 4 70 0 discriminator 2
-	bne	.L663
-.L660:
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL541:
+	bne	.L670
 .L667:
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.L674:
 	.align	2
-.L666:
+.L673:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
-.LFE175:
 	.fnend
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.align	1
@@ -6988,139 +4690,96 @@ FtlBbt2Bitmap:
 	.type	load_l2p_region, %function
 load_l2p_region:
 	.fnstart
-.LFB203:
-	.loc 2 488 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL542:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI82:
-	.loc 2 488 0
 	mov	r6, r0
-	.loc 2 492 0
-	ldr	r4, .L674
-	.loc 2 488 0
+	ldr	r4, .L681
 	mov	r8, r1
-	.loc 2 492 0
-	ldrh	r3, [r4, #112]
+	ldrh	r3, [r4, #136]
 	cmp	r3, r0
-	bcs	.L669
-	.loc 2 492 0 is_stmt 0 discriminator 1
+	bcs	.L676
 	mov	r2, #492
-	ldr	r1, .L674+4
-	ldr	r0, .L674+8
+	ldr	r1, .L681+4
+	ldr	r0, .L681+8
 	bl	printk
-.LVL543:
-.L669:
-	.loc 2 493 0 is_stmt 1
-	ldr	r3, [r4, #3848]
+.L676:
+	ldr	r3, [r4, #3888]
 	movs	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-.LVL544:
-	.loc 2 495 0
-	cbnz	r7, .L670
-	.loc 2 496 0
+	cbnz	r7, .L677
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2468]
-	ldrh	r2, [r4, #86]
+	ldr	r3, [r4, #2492]
+	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	add	r3, r3, r5
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL545:
-	.loc 2 497 0
-	ldr	r3, [r4, #2468]
+	ldr	r3, [r4, #2492]
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 498 0
-	ldr	r3, [r4, #2468]
+	ldr	r3, [r4, #2492]
 	add	r5, r5, r3
 	str	r7, [r5, #4]
-.LVL546:
-.L671:
-	.loc 2 519 0
+.L678:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL547:
-.L670:
-	.loc 2 502 0
+.L677:
 	mul	r5, r5, r8
-	ldr	r3, [r4, #2468]
-	.loc 2 504 0
+	ldr	r3, [r4, #2492]
 	movs	r2, #1
-	ldr	r0, .L674+12
+	ldr	r0, .L681+12
 	mov	r1, r2
-	.loc 2 501 0
-	str	r7, [r4, #3224]
-	.loc 2 502 0
+	str	r7, [r4, #3264]
 	add	r3, r3, r5
 	ldr	r3, [r3, #8]
-	str	r3, [r4, #3228]
-	.loc 2 503 0
-	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3232]
-	.loc 2 504 0
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-.LVL548:
-	.loc 2 505 0
-	ldr	r8, [r4, #3232]
-.LVL549:
-	.loc 2 507 0
+	ldr	r8, [r4, #3272]
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L672
-	.loc 2 508 0
+	beq	.L679
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L674+16
+	ldr	r0, .L681+16
 	bl	printk
-.LVL550:
-	.loc 2 509 0
 	movs	r3, #4
-	ldr	r1, [r4, #3232]
+	ldr	r1, [r4, #3272]
 	mov	r2, r3
-	ldr	r0, .L674+20
+	ldr	r0, .L681+20
 	bl	rknand_print_hex
-.LVL551:
-	.loc 2 510 0
-	ldrh	r3, [r4, #112]
+	ldrh	r3, [r4, #136]
 	movs	r2, #4
-	ldr	r1, [r4, #3848]
-	ldr	r0, .L674+24
+	ldr	r1, [r4, #3888]
+	ldr	r0, .L681+24
 	bl	rknand_print_hex
-.LVL552:
-.L672:
-	.loc 2 513 0
+.L679:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L673
-	.loc 2 513 0 is_stmt 0 discriminator 1
+	beq	.L680
 	movw	r2, #513
-	ldr	r1, .L674+4
-	ldr	r0, .L674+8
+	ldr	r1, .L681+4
+	ldr	r0, .L681+8
 	bl	printk
-.LVL553:
-.L673:
-	.loc 2 516 0 is_stmt 1
-	ldr	r3, [r4, #2468]
+.L680:
+	ldr	r3, [r4, #2492]
 	movs	r1, #0
 	adds	r2, r3, r5
 	str	r1, [r2, #4]
-	.loc 2 517 0
 	strh	r6, [r3, r5]	@ movhi
-	.loc 2 518 0
-	b	.L671
-.L675:
+	b	.L678
+.L682:
 	.align	2
-.L674:
+.L681:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
-	.word	.LANCHOR0+3220
-	.word	.LC82
+	.word	.LANCHOR0+3260
 	.word	.LC83
 	.word	.LC84
-.LFE203:
+	.word	.LC85
 	.fnend
 	.size	load_l2p_region, .-load_l2p_region
 	.align	1
@@ -7132,147 +4791,96 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 	.fnstart
-.LFB204:
-	.loc 2 522 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL554:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI83:
-.LVL555:
-	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 531 0
 	ldrh	r2, [r0, #10]
 	movs	r1, #0
-	.loc 2 525 0
 	ldr	r5, [r0, #20]
-.LVL556:
-	.loc 2 523 0
 	ldr	r9, [r0, #12]
-.LVL557:
-	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL558:
-	.loc 2 531 0
 	lsls	r2, r2, #1
 	mov	r0, r5
-.LVL559:
 	bl	ftl_memset
-.LVL560:
-	.loc 2 532 0
 	movs	r3, #0
-.LVL561:
-.L677:
-	.loc 2 532 0 is_stmt 0 discriminator 1
+.L684:
 	ldrh	r1, [r4, #6]
-.LVL562:
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L681
-	.loc 2 540 0 is_stmt 1
+	bhi	.L688
 	ldrh	fp, [r5]
-.LVL563:
-	.loc 2 543 0
 	movs	r6, #0
-.LVL564:
-	.loc 2 544 0
-	ldr	r2, .L690
-	.loc 2 541 0
+	ldr	r2, .L697
 	mov	r10, r6
-.LVL565:
-.L682:
-	.loc 2 543 0 discriminator 1
+.L689:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L686
-	.loc 2 559 0
+	bhi	.L693
 	mov	r0, r10
 	add	sp, sp, #12
-.LCFI84:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL566:
-.L681:
-.LCFI85:
-	.loc 2 533 0
+.L688:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL567:
-.L678:
-	.loc 2 534 0 discriminator 1
+.L685:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L680
+	bhi	.L687
 	adds	r3, r3, #1
-	b	.L677
-.L680:
-	.loc 2 535 0
+	b	.L684
+.L687:
 	uxth	r0, r2
 	adds	r2, r2, #1
 	ldrh	r7, [r9, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L678
-.LVL568:
-.L686:
-	.loc 2 544 0
+	b	.L685
+.L693:
 	ldrh	r1, [r4]
 	uxth	r7, r6
 	cmp	r1, r3
-	bne	.L683
-	.loc 2 544 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #80]
+	bne	.L690
+	ldrh	r1, [r2, #104]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
-	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L683:
-	.loc 2 546 0
+.L690:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	fp, r8
 	itt	hi
 	movhi	r10, r3
 	movhi	fp, r8
-	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L685
-	.loc 2 550 0 is_stmt 0 discriminator 1
+	bne	.L692
 	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L685
-	.loc 2 552 0 is_stmt 1
+	cbz	r0, .L692
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
-.LVL569:
-	.loc 2 553 0
 	strh	r8, [r9, r7, lsl #1]	@ movhi
-	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L685:
+.L692:
 	adds	r6, r6, #1
-	b	.L682
-.L691:
+	b	.L689
+.L698:
 	.align	2
-.L690:
+.L697:
 	.word	.LANCHOR0
-.LFE204:
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	1
@@ -7284,164 +4892,101 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 	.fnstart
-.LFB207:
-	.loc 2 632 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL570:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI86:
-	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL571:
-	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L693
-	.loc 2 641 0
+	bne	.L700
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L694
-	.loc 2 641 0 is_stmt 0 discriminator 1
+	cbz	r3, .L701
 	movw	r2, #641
-	ldr	r1, .L702
-	ldr	r0, .L702+4
+	ldr	r1, .L709
+	ldr	r0, .L709+4
 	bl	printk
-.LVL572:
-.L694:
-	.loc 2 642 0 is_stmt 1
+.L701:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL573:
-	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL574:
-.L695:
-	.loc 2 677 0
+.L702:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL575:
-.L693:
-	.loc 2 650 0
+.L700:
 	ldrh	r6, [r5, r3, lsl #1]
-	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L702+8
-.LVL576:
-	.loc 2 656 0
+	ldr	r5, .L709+8
 	ldr	r2, [r0, #28]
-	.loc 2 636 0
 	ldr	r7, [r0, #24]
-.LVL577:
-	.loc 2 651 0
 	orr	r3, r3, r6, lsl #10
-	str	r3, [r5, #3224]
-	.loc 2 652 0
-	ldr	r3, [r5, #3240]
-	str	r3, [r5, #3228]
-	.loc 2 653 0
-	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3232]
-	.loc 2 656 0
+	str	r3, [r5, #3264]
+	ldr	r3, [r5, #3280]
+	str	r3, [r5, #3268]
+	ldr	r3, [r5, #3284]
+	str	r3, [r5, #3272]
 	str	r2, [r3, #4]
-	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 658 0
 	ldrh	r2, [r0, #4]
-	.loc 2 659 0
 	strh	r6, [r3, #2]	@ movhi
-	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 661 0
-	ldrh	r2, [r5, #80]
-	ldr	r0, [r5, #3240]
-.LVL578:
+	ldrh	r2, [r5, #104]
+	ldr	r0, [r5, #3280]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL579:
-	.loc 2 663 0
 	movs	r2, #0
-	.loc 2 662 0
 	mov	r3, r2
-.LVL580:
-.L696:
-	.loc 2 663 0 discriminator 1
+.L703:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L698
-	.loc 2 670 0
+	bhi	.L705
 	movs	r2, #1
 	movs	r3, #0
-.LVL581:
 	mov	r1, r2
-	ldr	r0, .L702+12
+	ldr	r0, .L709+12
 	bl	FlashProgPages
-.LVL582:
-	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL583:
-	.loc 2 676 0
-	b	.L695
-.LVL584:
-.L698:
+	b	.L702
+.L705:
 	uxth	r1, r2
-	.loc 2 664 0
 	ldr	r0, [r7, r1, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L697
-	.loc 2 666 0
-	ldr	r0, [r5, #3240]
-	.loc 2 665 0
+	bne	.L704
+	ldr	r0, [r5, #3280]
 	adds	r3, r3, #1
-.LVL585:
 	uxth	r3, r3
-.LVL586:
-	.loc 2 666 0
 	str	r1, [r0, r3, lsl #3]
-	.loc 2 667 0
 	ldr	r0, [r7, r1, lsl #2]
-	ldr	r1, [r5, #3240]
+	ldr	r1, [r5, #3280]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L697:
+.L704:
 	adds	r2, r2, #1
-	b	.L696
-.L703:
+	b	.L703
+.L710:
 	.align	2
-.L702:
+.L709:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-.LFE207:
+	.word	.LANCHOR0+3260
 	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	1
@@ -7453,203 +4998,124 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 	.fnstart
-.LFB208:
-	.loc 2 680 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL587:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI87:
-	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 686 0
-	ldr	r7, .L723
-	.loc 2 680 0
+	ldr	r7, .L730
 	mov	r8, r1
 	mov	r10, r2
-	.loc 2 683 0
 	movs	r6, #0
-.LVL588:
-	.loc 2 699 0
-	ldr	r9, .L723+20
+	ldr	r9, .L730+20
 	mov	r5, r7
-.L705:
-	.loc 2 686 0
-	ldr	r3, [r7, #2500]
+.L712:
+	ldr	r3, [r7, #2524]
 	adds	r3, r3, #1
-	str	r3, [r7, #2500]
-	.loc 2 687 0
-	ldrh	r3, [r7, #80]
+	str	r3, [r7, #2524]
+	ldrh	r3, [r7, #104]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L706
-	.loc 2 687 0 is_stmt 0 discriminator 1
+	bge	.L713
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L707
-.L706:
-	.loc 2 688 0 is_stmt 1
+	bne	.L714
+.L713:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL589:
-.L707:
-	.loc 2 699 0
+.L714:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L708
-	.loc 2 699 0 is_stmt 0 discriminator 1
+	cbnz	r3, .L715
 	movw	r2, #699
 	mov	r1, r9
-	ldr	r0, .L723+4
+	ldr	r0, .L730+4
 	bl	printk
-.LVL590:
-.L708:
-	.loc 2 700 0 is_stmt 1
+.L715:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L709
-	.loc 2 700 0 is_stmt 0 discriminator 1
+	bcc	.L716
 	mov	r2, #700
 	mov	r1, r9
-	ldr	r0, .L723+4
+	ldr	r0, .L730+4
 	bl	printk
-.LVL591:
-.L709:
-	.loc 2 701 0 is_stmt 1
+.L716:
 	ldrh	r2, [r4]
-.LBB385:
-.LBB386:
-.LBB387:
-	.loc 1 202 0
 	movs	r1, #16
-.LBE387:
-.LBE386:
-.LBE385:
-	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 705 0
-	ldr	r0, [r5, #3244]
-	.loc 2 701 0
+	ldr	r0, [r5, #3284]
 	ldrh	fp, [r3, r2, lsl #1]
-	.loc 2 703 0
 	ldrh	r3, [r4, #2]
-	.loc 2 705 0
-	str	r0, [r5, #3232]
-	.loc 2 704 0
-	str	r10, [r5, #3228]
-	.loc 2 703 0
+	str	r0, [r5, #3272]
+	str	r10, [r5, #3268]
 	orr	r3, r3, fp, lsl #10
-	str	r3, [r5, #3224]
-.LBB390:
-.LBB389:
-.LBB388:
-	.loc 1 202 0
+	str	r3, [r5, #3264]
 	bl	__memzero
-.LVL592:
-.LBE388:
-.LBE389:
-.LBE390:
-	.loc 2 708 0
-	ldr	r3, [r5, #3232]
-.LVL593:
-	.loc 2 709 0
+	ldr	r3, [r5, #3272]
 	ldr	r2, [r4, #28]
-	.loc 2 713 0
-	ldr	r0, .L723+8
-	.loc 2 710 0
+	ldr	r0, .L730+8
 	strh	r8, [r3, #8]	@ movhi
-	.loc 2 709 0
 	str	r2, [r3, #4]
-	.loc 2 711 0
 	ldrh	r2, [r4, #4]
-	.loc 2 712 0
 	strh	fp, [r3, #2]	@ movhi
-	.loc 2 711 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 713 0
 	movs	r3, #1
-.LVL594:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL595:
-	.loc 2 714 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 716 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	adds	r2, r2, #1
-	bne	.L710
-	.loc 2 717 0
-	ldr	r1, [r5, #3224]
-	.loc 2 718 0
+	bne	.L717
+	ldr	r1, [r5, #3264]
 	adds	r6, r6, #1
-.LVL596:
-	.loc 2 717 0
-	ldr	r0, .L723+12
-	.loc 2 718 0
+	ldr	r0, .L730+12
 	uxth	r6, r6
-.LVL597:
-	.loc 2 717 0
 	bl	printk
-.LVL598:
-	.loc 2 719 0
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
-	.loc 2 720 0
 	ittt	ls
-	ldrhls	r3, [r5, #80]
+	ldrhls	r3, [r5, #104]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
-	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L712
-	.loc 2 723 0
+	bls	.L719
 	mov	r2, r6
-	ldr	r1, [r5, #3224]
-	ldr	r0, .L723+16
+	ldr	r1, [r5, #3264]
+	ldr	r0, .L730+16
 	bl	printk
-.LVL599:
-.L713:
-	b	.L713
-.L712:
-	.loc 2 727 0
+.L720:
+	b	.L720
+.L719:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L705
-.L722:
-	b	.L722
-.L710:
-	.loc 2 731 0
+	beq	.L712
+.L729:
+	b	.L729
+.L717:
 	cmp	r3, #1
-	beq	.L705
-	.loc 2 734 0
-	ldr	r2, [r5, #3224]
-	.loc 2 736 0
+	beq	.L712
+	ldr	r2, [r5, #3264]
 	movs	r0, #0
-	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	.loc 2 736 0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL600:
-.L724:
+.L731:
 	.align	2
-.L723:
+.L730:
 	.word	.LANCHOR0
 	.word	.LC1
-	.word	.LANCHOR0+3220
-	.word	.LC85
+	.word	.LANCHOR0+3260
 	.word	.LC86
+	.word	.LC87
 	.word	.LANCHOR1+258
-.LFE208:
 	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	1
@@ -7661,168 +5127,110 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 	.fnstart
-.LFB206:
-	.loc 2 586 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL601:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI88:
-.LVL602:
-	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 590 0
 	ldr	r6, [r0, #12]
-.LVL603:
-	.loc 2 591 0
 	ldr	r9, [r0, #24]
-.LVL604:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL605:
-	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L737
+	ldr	r5, .L744
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L726
-	.loc 2 597 0
+	blt	.L733
 	uxth	r0, r0
 	ldrh	r8, [r6, r0, lsl #1]
-.LVL606:
-	.loc 2 598 0
 	cmp	r8, #0
-	beq	.L726
-	.loc 2 598 0 is_stmt 0 discriminator 1
+	beq	.L733
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L726
-	.loc 2 599 0 is_stmt 1
+	cbnz	r3, .L733
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 600 0
 	strh	r3, [r6, r0, lsl #1]	@ movhi
-	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 602 0
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L727
-	.loc 2 603 0
+	bcc	.L734
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL607:
-.L727:
-	.loc 2 613 0 discriminator 1
-	ldr	fp, .L737+12
-	.loc 2 586 0 discriminator 1
+.L734:
+	ldr	fp, .L744+12
 	movs	r6, #0
-.LVL608:
-.L728:
-	.loc 2 605 0 discriminator 1
+.L735:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L732
-	.loc 2 621 0
+	bhi	.L739
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.LVL609:
-	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL610:
-.L726:
-	.loc 2 626 0
+.L733:
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L733
-	.loc 2 627 0
+	bcc	.L740
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL611:
-.L733:
-	.loc 2 629 0
+.L740:
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI89:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL612:
-.L732:
-.LCFI90:
+.L739:
 	uxth	r7, r6
-	.loc 2 606 0
 	ldr	r3, [r9, r7, lsl #2]
 	cmp	r8, r3, lsr #10
-	bne	.L729
-	.loc 2 607 0
-	ldr	r3, [r5, #3804]
-	.loc 2 611 0
-	ldr	r0, .L737+4
-	.loc 2 607 0
-	str	r3, [r5, #3228]
-	.loc 2 608 0
-	ldr	r3, [r5, #3244]
-	str	r3, [r5, #3232]
-	.loc 2 609 0
+	bne	.L736
+	ldr	r3, [r5, #3844]
+	ldr	r0, .L744+4
+	str	r3, [r5, #3268]
+	ldr	r3, [r5, #3284]
+	str	r3, [r5, #3272]
 	ldr	r2, [r9, r7, lsl #2]
-	.loc 2 608 0
 	str	r3, [sp, #4]
-	.loc 2 609 0
-	str	r2, [r5, #3224]
-	.loc 2 611 0
+	str	r2, [r5, #3264]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL613:
-	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L730
-	.loc 2 613 0 is_stmt 0 discriminator 1
+	beq	.L737
 	movw	r2, #613
-	ldr	r1, .L737+8
+	ldr	r1, .L744+8
 	mov	r0, fp
 	bl	printk
-.LVL614:
-.L730:
-	.loc 2 614 0 is_stmt 1
-	ldr	r3, [r5, #3220]
+.L737:
+	ldr	r3, [r5, #3260]
 	adds	r3, r3, #1
-	bne	.L731
-	.loc 2 615 0
+	bne	.L738
 	movs	r3, #0
 	str	r3, [r9, r7, lsl #2]
-.L729:
+.L736:
 	adds	r6, r6, #1
-	b	.L728
-.L731:
-	.loc 2 617 0
-	ldr	r2, [r5, #3228]
+	b	.L735
+.L738:
+	ldr	r2, [r5, #3268]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL615:
-	b	.L729
-.L738:
+	b	.L736
+.L745:
 	.align	2
-.L737:
+.L744:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
+	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+274
 	.word	.LC1
-.LFE206:
 	.fnend
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	1
@@ -7834,45 +5242,30 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 	.fnstart
-.LFB209:
-	.loc 2 739 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL616:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI91:
-	.loc 2 742 0
 	movs	r4, #12
-	ldr	r5, .L740
+	ldr	r5, .L747
 	muls	r4, r0, r4
-	ldr	r3, [r5, #2468]
-	.loc 2 743 0
-	addw	r0, r5, #3864
-.LVL617:
-	.loc 2 742 0
+	ldr	r3, [r5, #2492]
+	add	r0, r5, #3904
 	adds	r2, r3, r4
-	.loc 2 743 0
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL618:
-	.loc 2 744 0
-	ldr	r3, [r5, #2468]
-	.loc 2 746 0
+	ldr	r3, [r5, #2492]
 	movs	r0, #0
-	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
-.L741:
+.L748:
 	.align	2
-.L740:
+.L747:
 	.word	.LANCHOR0
-.LFE209:
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	1
@@ -7884,156 +5277,103 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 	.fnstart
-.LFB212:
-	.loc 2 802 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL619:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI92:
-	.loc 2 802 0
 	mov	r7, r1
-	.loc 2 805 0
-	ldr	r4, .L756
-	.loc 2 802 0
+	ldr	r4, .L763
 	mov	r9, r2
-	.loc 2 805 0
-	ldrh	r5, [r4, #84]
+	ldrh	r5, [r4, #108]
 	adds	r3, r5, #7
-	.loc 2 806 0
 	movs	r5, #1
-	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 806 0
 	lsls	r5, r5, r3
-	.loc 2 808 0
-	ldr	r3, [r4, #2480]
-	.loc 2 806 0
+	ldr	r3, [r4, #2504]
 	subs	r5, r5, #1
-	.loc 2 805 0
 	uxth	r8, r8
-.LVL620:
-	.loc 2 806 0
 	ands	r5, r5, r0
-	.loc 2 808 0
 	cmp	r0, r3
-	.loc 2 806 0
 	uxth	r5, r5
-.LVL621:
-	.loc 2 808 0
-	bcc	.L743
-	.loc 2 808 0 is_stmt 0 discriminator 1
+	bcc	.L750
 	mov	r2, #808
-	ldr	r1, .L756+4
-	ldr	r0, .L756+8
-.LVL622:
+	ldr	r1, .L763+4
+	ldr	r0, .L763+8
 	bl	printk
-.LVL623:
-.L743:
-	.loc 2 810 0 is_stmt 1
-	ldrh	r2, [r4, #114]
+.L750:
+	ldrh	r2, [r4, #138]
 	movs	r3, #0
-	.loc 2 811 0
-	ldr	r1, [r4, #2468]
+	ldr	r1, [r4, #2492]
 	mov	r10, #12
-.LVL624:
-.L744:
+.L751:
 	uxth	r6, r3
-	.loc 2 810 0 discriminator 1
 	cmp	r6, r2
-	bcc	.L749
-	.loc 2 825 0
+	bcc	.L756
 	bl	select_l2p_ram_region
-.LVL625:
-	.loc 2 826 0
 	mul	r10, r10, r0
-	ldr	r3, [r4, #2468]
-	.loc 2 825 0
+	ldr	r3, [r4, #2492]
 	mov	r6, r0
-	.loc 2 826 0
 	ldrh	r1, [r3, r10]
 	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L750
-	.loc 2 826 0 is_stmt 0 discriminator 1
+	beq	.L757
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L750
-	.loc 2 827 0 is_stmt 1
+	bge	.L757
 	bl	flush_l2p_region
-.LVL626:
-.L750:
-	.loc 2 830 0
+.L757:
 	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL627:
-	.loc 2 831 0
-	b	.L745
-.LVL628:
-.L749:
+	b	.L752
+.L756:
 	adds	r3, r3, #1
-	.loc 2 811 0
 	mla	r0, r10, r3, r1
-.LVL629:
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L744
-.L745:
+	bne	.L751
+.L752:
 	movs	r3, #12
-	.loc 2 813 0
 	cmp	r9, #0
-	bne	.L746
-	.loc 2 814 0
-	ldr	r2, [r4, #2468]
+	bne	.L753
+	ldr	r2, [r4, #2492]
 	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L747:
-	.loc 2 820 0
-	ldr	r2, [r4, #2468]
+.L754:
+	ldr	r2, [r4, #2492]
 	movs	r3, #12
 	mla	r6, r3, r6, r2
-.LVL630:
 	ldr	r3, [r6, #4]
 	adds	r2, r3, #1
-	beq	.L753
-	.loc 2 821 0
+	beq	.L760
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
-.L753:
-	.loc 2 832 0
+.L760:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL631:
-.L746:
-	.loc 2 816 0
+.L753:
 	muls	r3, r6, r3
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
 	add	r2, r2, r3
 	ldr	r2, [r2, #8]
 	str	r1, [r2, r5, lsl #2]
-	.loc 2 817 0
-	ldr	r2, [r4, #2468]
-	.loc 2 818 0
-	strh	r8, [r4, #2472]	@ movhi
-	.loc 2 817 0
+	ldr	r2, [r4, #2492]
+	strh	r8, [r4, #2496]	@ movhi
 	add	r3, r3, r2
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L747
-.L757:
+	b	.L754
+.L764:
 	.align	2
-.L756:
+.L763:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
-.LFE212:
 	.fnend
 	.size	log2phys, .-log2phys
 	.align	1
@@ -8045,135 +5385,80 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 	.fnstart
-.LFB230:
-	.loc 2 1677 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL632:
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
-.LCFI93:
-.LVL633:
-	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1680 0
-	ldr	r5, .L768
-.LVL634:
-	.loc 2 1678 0
+	ldr	r5, .L775
 	ubfx	r0, r1, #10, #16
-.LVL635:
-	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL636:
-	.loc 2 1680 0
-	ldr	r2, [r5, #2300]
-	.loc 2 1678 0
+	ldr	r2, [r5, #2324]
 	mov	r7, r0
-.LVL637:
-	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L759
-	.loc 2 1681 0
-	ldr	r4, [r5, #2316]
-	cbz	r4, .L760
-.LBB391:
-	.loc 2 1685 0
-	ldr	r1, [r5, #2292]
-	.loc 2 1693 0
+	cbnz	r3, .L766
+	ldr	r4, [r5, #2340]
+	cbz	r4, .L767
+	ldr	r1, [r5, #2316]
 	mov	ip, #6
-	.loc 2 1685 0
-	ldr	r2, .L768+4
-	.loc 2 1693 0
+	ldr	r2, .L775+4
 	movw	lr, #65535
-	.loc 2 1684 0
-	ldrh	r0, [r5, #2320]
-.LVL638:
-	.loc 2 1685 0
+	ldrh	r0, [r5, #2344]
 	subs	r4, r4, r1
 	asrs	r4, r4, #1
 	muls	r4, r2, r4
 	uxth	r4, r4
-.LVL639:
-.L761:
-	.loc 2 1686 0 discriminator 1
+.L768:
 	uxth	r2, r3
 	cmp	r0, r2
-	bls	.L760
-	.loc 2 1687 0
+	bls	.L767
 	cmp	r4, r7
-	bne	.L762
-	.loc 2 1688 0
+	bne	.L769
 	mov	r1, r4
-	ldr	r0, .L768+8
-.LVL640:
+	ldr	r0, .L775+8
 	bl	List_remove_node
-.LVL641:
-	ldrh	r3, [r5, #2320]
-	cbnz	r3, .L763
-	.loc 2 1688 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r5, #2344]
+	cbnz	r3, .L770
 	mov	r2, #1688
-	ldr	r1, .L768+12
-	ldr	r0, .L768+16
+	ldr	r1, .L775+12
+	ldr	r0, .L775+16
 	bl	printk
-.LVL642:
-.L763:
-	.loc 2 1688 0 discriminator 3
-	ldrh	r3, [r5, #2320]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
+.L770:
+	ldrh	r3, [r5, #2344]
 	mov	r0, r4
-	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
-	strh	r3, [r5, #2320]	@ movhi
-	.loc 2 1689 0 discriminator 3
+	strh	r3, [r5, #2344]	@ movhi
 	bl	INSERT_DATA_LIST
-.LVL643:
-	.loc 2 1690 0 discriminator 3
-	ldr	r2, [r5, #2300]
+	ldr	r2, [r5, #2324]
 	ldrh	r3, [r2, r7, lsl #1]
-.L759:
-.LBE391:
-	.loc 2 1699 0
+.L766:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L760
-.LVL644:
-.L762:
-.LBB392:
-	.loc 2 1693 0
+	b	.L767
+.L769:
 	mul	r4, ip, r4
-.LVL645:
 	adds	r3, r3, #1
 	ldrh	r4, [r1, r4]
-.LVL646:
 	cmp	r4, lr
-	bne	.L761
-.L760:
-.LBE392:
-	.loc 2 1701 0
+	bne	.L768
+.L767:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
-.LVL647:
 	bl	log2phys
-.LVL648:
-	.loc 2 1702 0
 	add	sp, sp, #12
-.LCFI94:
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL649:
-.L769:
+.L776:
 	.align	2
-.L768:
+.L775:
 	.word	.LANCHOR0
 	.word	-1431655765
-	.word	.LANCHOR0+2316
+	.word	.LANCHOR0+2340
 	.word	.LANCHOR1+298
 	.word	.LC1
-.LFE230:
 	.fnend
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	1
@@ -8185,102 +5470,64 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	.fnstart
-.LFB241:
-	.loc 2 2325 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI95:
-	.loc 2 2331 0
 	movs	r5, #0
-.LVL650:
-	ldr	r6, .L784
-	.loc 2 2325 0
+	ldr	r6, .L791
 	.pad #32
 	sub	sp, sp, #32
-.LCFI96:
-	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2334 0
-	ldr	r8, .L784+16
+	ldr	r8, .L791+16
 	mov	r4, r6
-	.loc 2 2330 0
-	ldr	r0, .L784+4
+	ldr	r0, .L791+4
 	bl	printk
-.LVL651:
-.L771:
-	.loc 2 2331 0 discriminator 1
-	ldr	r3, [r6, #2480]
+.L778:
+	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L777
-	.loc 2 2353 0
+	bcc	.L784
 	add	sp, sp, #32
-.LCFI97:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL652:
-.L777:
-.LCFI98:
-	.loc 2 2332 0
+.L784:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL653:
-	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L772
-	.loc 2 2334 0
+	cbnz	r3, .L779
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printk
-.LVL654:
-.L772:
-	.loc 2 2335 0
+.L779:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L774
-	.loc 2 2336 0
-	str	r3, [r4, #3224]
-	.loc 2 2340 0
+	beq	.L781
+	str	r3, [r4, #3264]
 	movs	r2, #0
-	.loc 2 2338 0
-	ldr	r3, [r4, #3240]
-	.loc 2 2342 0
+	ldr	r3, [r4, #3280]
 	movs	r1, #1
-	.loc 2 2339 0
-	ldr	r7, [r4, #3244]
-	.loc 2 2342 0
-	ldr	r0, .L784+8
-	.loc 2 2338 0
-	str	r3, [r4, #3228]
-	.loc 2 2337 0
-	str	r5, [r4, #3236]
-	.loc 2 2339 0
-	str	r7, [r4, #3232]
-	.loc 2 2340 0
-	str	r2, [r4, #3220]
-	.loc 2 2342 0
+	ldr	r7, [r4, #3284]
+	ldr	r0, .L791+8
+	str	r3, [r4, #3268]
+	str	r5, [r4, #3276]
+	str	r7, [r4, #3272]
+	str	r2, [r4, #3260]
 	bl	FlashReadPages
-.LVL655:
-	.loc 2 2343 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	cmp	r3, #256
-	beq	.L775
-	.loc 2 2343 0 is_stmt 0 discriminator 1
+	beq	.L782
 	adds	r3, r3, #1
-	beq	.L775
-	.loc 2 2344 0 is_stmt 1
+	beq	.L782
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L774
-.L775:
-	.loc 2 2347 0
-	ldr	r2, [r4, #3228]
-	ldr	r3, [r4, #3232]
-	ldr	r0, .L784+12
+	beq	.L781
+.L782:
+	ldr	r2, [r4, #3268]
+	ldr	r3, [r4, #3272]
+	ldr	r0, .L791+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8293,22 +5540,19 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3224]
+	ldr	r2, [r4, #3264]
 	bl	printk
-.LVL656:
-.L774:
-	.loc 2 2331 0 discriminator 2
+.L781:
 	adds	r5, r5, #1
-	b	.L771
-.L785:
+	b	.L778
+.L792:
 	.align	2
-.L784:
+.L791:
 	.word	.LANCHOR0
-	.word	.LC87
-	.word	.LANCHOR0+3220
-	.word	.LC89
 	.word	.LC88
-.LFE241:
+	.word	.LANCHOR0+3260
+	.word	.LC90
+	.word	.LC89
 	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	1
@@ -8320,163 +5564,99 @@ ftl_scan_all_data:
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
 	.fnstart
-.LFB268:
-	.loc 5 419 0
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 425 0
-	ldr	r3, .L799
-	.loc 5 419 0
+	ldr	r3, .L806
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI99:
 	.pad #88
 	sub	sp, sp, #88
-.LCFI100:
 	mov	r4, r3
-	.loc 5 425 0
-	ldr	r0, [r3, #2692]
+	ldr	r0, [r3, #2716]
 	cmp	r0, #0
-	beq	.L787
-	.loc 5 426 0
-	ldr	r1, [r3, #2696]
-	ldr	r2, [r3, #2480]
+	beq	.L794
+	ldr	r1, [r3, #2720]
+	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L788
+	bcs	.L795
 	mov	r5, #2048
-.LVL657:
-.L793:
-.LBB398:
-.LBB399:
-	.loc 5 428 0
-	ldr	r0, [r4, #2696]
-	ldr	r3, [r4, #2480]
+.L800:
+	ldr	r0, [r4, #2720]
+	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L790
-	.loc 5 430 0
+	bcs	.L797
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL658:
-	.loc 5 432 0
 	ldr	r2, [sp]
-	.loc 5 431 0
-	ldr	r3, [r4, #2696]
-	.loc 5 432 0
+	ldr	r3, [r4, #2720]
 	adds	r1, r2, #1
-	.loc 5 431 0
 	add	r3, r3, #1
-	str	r3, [r4, #2696]
-	.loc 5 432 0
-	beq	.L791
-.LBB400:
-	.loc 5 435 0
+	str	r3, [r4, #2720]
+	beq	.L798
 	str	r3, [sp, #20]
-	.loc 5 438 0
 	add	r0, sp, #88
-	.loc 5 436 0
-	ldr	r3, .L799+4
-	.loc 5 439 0
+	ldr	r3, .L806+4
 	movs	r1, #1
-	.loc 5 434 0
 	str	r2, [sp, #8]
-	.loc 5 438 0
 	movs	r2, #0
 	str	r2, [r0, #-84]!
-	.loc 5 436 0
 	str	r3, [sp, #12]
-	.loc 5 437 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL659:
-	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L790
-	.loc 5 442 0
+	bne	.L797
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL660:
 	bl	FtlGcRefreshBlock
-.LVL661:
-.L790:
-.LBE400:
+.L797:
 	mov	r0, #-1
-.L786:
-.LBE399:
-.LBE398:
-	.loc 5 466 0
+.L793:
 	add	sp, sp, #88
-.LCFI101:
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L791:
-.LCFI102:
-.LBB402:
-.LBB401:
-	.loc 5 427 0
+.L798:
 	subs	r5, r5, #1
-	bne	.L793
-	b	.L790
-.LVL662:
-.L788:
-.LBE401:
-.LBE402:
-	.loc 5 451 0
-	ldr	r2, [r3, #2484]
-	.loc 5 449 0
+	bne	.L800
+	b	.L797
+.L795:
+	ldr	r2, [r3, #2508]
 	movs	r0, #0
-	str	r0, [r3, #2692]
-	.loc 5 450 0
-	str	r0, [r3, #2696]
-	.loc 5 451 0
-	str	r2, [r3, #2688]
-	b	.L786
-.L787:
-.LBB403:
-	.loc 5 456 0
-	ldr	r1, [r3, #2484]
-	ldr	r6, [r3, #2688]
+	str	r0, [r3, #2716]
+	str	r0, [r3, #2720]
+	str	r2, [r3, #2712]
+	b	.L793
+.L794:
+	ldr	r1, [r3, #2508]
+	ldr	r6, [r3, #2712]
 	add	r2, r1, #1048576
 	cmp	r6, r2
-	bhi	.L796
-	.loc 5 454 0
-	ldr	r2, [r3, #2540]
+	bhi	.L803
+	ldr	r2, [r3, #2564]
 	lsrs	r5, r2, #10
 	mov	r2, #33554432
 	asrs	r2, r2, r5
-.LVL663:
-	.loc 5 457 0
 	add	r2, r2, r6
-.LVL664:
 	cmp	r1, r2
-	bhi	.L796
-	.loc 5 458 0
-	ldrb	r3, [r3, #2272]	@ zero_extendqisi2
+	bhi	.L803
+	ldrb	r3, [r3, #2296]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L786
-.L796:
-	.loc 5 460 0
+	bne	.L793
+.L803:
 	movs	r3, #1
-	.loc 5 461 0
 	movs	r0, #0
-	.loc 5 460 0
-	str	r3, [r4, #2692]
-	.loc 5 461 0
-	str	r0, [r4, #2696]
-	.loc 5 462 0
-	str	r1, [r4, #2688]
-	b	.L786
-.L800:
+	str	r3, [r4, #2716]
+	str	r0, [r4, #2720]
+	str	r1, [r4, #2712]
+	b	.L793
+.L807:
 	.align	2
-.L799:
+.L806:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
-.LBE403:
-.LFE268:
 	.fnend
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	1
@@ -8488,189 +5668,126 @@ FtlReadRefresh:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	.fnstart
-.LFB240:
-	.loc 2 2273 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI103:
-	.loc 2 2282 0
 	movs	r4, #0
-.LVL665:
-	ldr	r6, .L825
-	.loc 2 2288 0
-	ldr	r7, .L825+4
-	.loc 2 2279 0
-	ldr	r1, .L825+8
+	ldr	r6, .L832
+	ldr	r7, .L832+4
+	ldr	r1, .L832+8
 	mov	r5, r6
-	ldr	r0, .L825+12
+	ldr	r0, .L832+12
 	bl	printk
-.LVL666:
-.LBB410:
-.LBB411:
-.LBB412:
-	.loc 1 202 0
 	mov	r1, #8192
-	ldr	r0, .L825+4
+	ldr	r0, .L832+4
 	bl	__memzero
-.LVL667:
-.L802:
-.LBE412:
-.LBE411:
-.LBE410:
-	.loc 2 2282 0 discriminator 1
-	ldr	r3, [r6, #2480]
+.L809:
+	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L804
-	.loc 2 2295 0 discriminator 1
-	ldr	r8, .L825+4
+	bcc	.L811
+	ldr	r8, .L832+4
 	movs	r4, #0
-.LVL668:
-	.loc 2 2297 0 discriminator 1
-	ldr	r10, .L825+24
+	ldr	r10, .L832+24
 	mov	r7, r4
-.LVL669:
-	.loc 2 2295 0 discriminator 1
 	movw	r9, #65535
-.L805:
-	.loc 2 2293 0 discriminator 1
-	ldrh	r2, [r5, #16]
+.L812:
+	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L807
-	.loc 2 2305 0
-	ldr	r4, [r5, #2316]
-	cbz	r4, .L808
-.LBB413:
-	.loc 2 2308 0
-	ldr	r3, [r5, #2292]
-	.loc 2 2309 0
+	bhi	.L814
+	ldr	r4, [r5, #2340]
+	cbz	r4, .L815
+	ldr	r3, [r5, #2316]
 	movs	r6, #0
-	.loc 2 2307 0
-	ldrh	r8, [r5, #2320]
-.LVL670:
-	.loc 2 2316 0
+	ldrh	r8, [r5, #2344]
 	mov	fp, #6
-	.loc 2 2313 0
-	ldr	r9, .L825+4
-	.loc 2 2308 0
+	ldr	r9, .L832+4
 	subs	r4, r4, r3
-	ldr	r3, .L825+16
+	ldr	r3, .L832+16
 	asrs	r4, r4, #1
-	.loc 2 2313 0
-	ldr	r10, .L825+28
-	.loc 2 2308 0
+	ldr	r10, .L832+28
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L809:
-	.loc 2 2309 0 discriminator 1
+.L816:
 	uxth	r3, r6
 	cmp	r8, r3
-	bls	.L808
-	.loc 2 2311 0
-	ldr	r3, [r5, #2300]
+	bls	.L815
+	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L810
-	.loc 2 2314 0
+	cbz	r2, .L817
 	movs	r7, #1
-	.loc 2 2313 0
 	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
 	bl	printk
-.LVL671:
-.L810:
-	.loc 2 2316 0
+.L817:
 	mul	r4, fp, r4
-	ldr	r3, [r5, #2292]
+	ldr	r3, [r5, #2316]
 	adds	r6, r6, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L809
-.L808:
-.LBE413:
-	.loc 2 2321 0
-	cbz	r7, .L801
-	.loc 2 2321 0 is_stmt 0 discriminator 1
+	bne	.L816
+.L815:
+	cbz	r7, .L808
 	movw	r2, #2321
-	ldr	r1, .L825+8
-	ldr	r0, .L825+20
+	ldr	r1, .L832+8
+	ldr	r0, .L832+20
 	bl	printk
-.LVL672:
-.L801:
-	.loc 2 2322 0 is_stmt 1
+.L808:
 	add	sp, sp, #12
-.LCFI104:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL673:
-.L804:
-.LCFI105:
-	.loc 2 2284 0
+.L811:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL674:
-	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L803
-	.loc 2 2287 0
+	beq	.L810
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL675:
-	.loc 2 2288 0
 	ldrh	r3, [r7, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L803:
-	.loc 2 2282 0 discriminator 2
+.L810:
 	adds	r4, r4, #1
-	b	.L802
-.LVL676:
-.L807:
-	.loc 2 2295 0
-	ldr	r3, [r5, #2300]
+	b	.L809
+.L814:
+	ldr	r3, [r5, #2324]
 	uxth	r6, r4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L806
-	.loc 2 2297 0
+	beq	.L813
 	mov	r1, r6
 	mov	r0, r10
 	bl	printk
-.LVL677:
-	.loc 2 2298 0
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r9
-	beq	.L806
-	.loc 2 2298 0 is_stmt 0 discriminator 1
+	beq	.L813
 	ldrh	r2, [r8, r6, lsl #1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r7, #1
-.L806:
+.L813:
 	adds	r4, r4, #1
-	b	.L805
-.L826:
+	b	.L812
+.L833:
 	.align	2
-.L825:
+.L832:
 	.word	.LANCHOR0
 	.word	check_vpc_table
 	.word	.LANCHOR1+314
-	.word	.LC90
+	.word	.LC91
 	.word	-1431655765
 	.word	.LC1
-	.word	.LC91
 	.word	.LC92
-.LFE240:
+	.word	.LC93
 	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	1
@@ -8682,85 +5799,48 @@ ftl_check_vpc:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	.fnstart
-.LFB217:
-	.loc 2 946 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL678:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI106:
-	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	cbz	r3, .L827
-	.loc 2 948 0
+	cbz	r3, .L834
 	ldrh	r5, [r0, #6]
-	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 956 0
-	ldr	r4, .L831
-	.loc 2 949 0
+	ldr	r4, .L838
 	ldr	r2, [r0, #24]
-.LVL679:
-	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 956 0
-	ldr	r0, [r4, #3804]
-	.loc 2 979 0
+	ldr	r0, [r4, #3844]
 	uxth	r5, r5
-	.loc 2 957 0
-	ldr	r1, [r4, #3244]
-	.loc 2 956 0
-	str	r0, [r4, #3228]
-	.loc 2 957 0
-	str	r1, [r4, #3232]
-	.loc 2 979 0
+	ldr	r1, [r4, #3284]
+	str	r0, [r4, #3268]
+	str	r1, [r4, #3272]
 	ldr	r2, [r2, r5, lsl #2]
-.LVL680:
-	.loc 2 980 0
-	str	r2, [r4, #3224]
-	.loc 2 981 0
-	cbz	r2, .L829
-	.loc 2 983 0
+	str	r2, [r4, #3264]
+	cbz	r2, .L836
 	movs	r2, #1
-.LVL681:
-	addw	r0, r4, #3220
+	addw	r0, r4, #3260
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL682:
-.L830:
-	.loc 2 990 0
-	ldr	r2, [r4, #3228]
+.L837:
+	ldr	r2, [r4, #3268]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
-.LCFI107:
-.LVL683:
-	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL684:
-.L829:
-.LCFI108:
-	.loc 2 987 0
-	ldrh	r2, [r4, #86]
-.LVL685:
+.L836:
+	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-.LVL686:
-	b	.L830
-.LVL687:
-.L827:
+	b	.L837
+.L834:
 	pop	{r4, r5, r6, pc}
-.L832:
+.L839:
 	.align	2
-.L831:
+.L838:
 	.word	.LANCHOR0
-.LFE217:
 	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	1
@@ -8772,643 +5852,466 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 	.fnstart
-.LFB220:
-	.loc 2 1144 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI109:
-	.loc 2 1150 0
 	movs	r5, #0
-	ldr	r4, .L914
-	.loc 2 1144 0
+	ldr	r4, .L921
+	mov	r1, r5
 	.pad #20
 	sub	sp, sp, #20
-.LCFI110:
-	.loc 2 1152 0
-	mov	r1, r5
-	ldr	r2, [r4, #104]
-	ldr	r0, [r4, #3852]
-	.loc 2 1150 0
-	strh	r5, [r4, #3904]	@ movhi
-	.loc 2 1151 0
-	strh	r5, [r4, #120]	@ movhi
-	.loc 2 1152 0
+	ldr	r2, [r4, #128]
+	ldr	r0, [r4, #3892]
+	strh	r5, [r4, #3944]	@ movhi
+	strh	r5, [r4, #144]	@ movhi
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL688:
-	.loc 2 1153 0
-	ldr	r2, [r4, #104]
+	ldr	r2, [r4, #128]
 	mov	r1, r5
-	ldr	r0, [r4, #3828]
+	ldr	r0, [r4, #3868]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL689:
-	.loc 2 1154 0
-	ldrh	r2, [r4, #96]
+	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #3840]
+	ldr	r0, [r4, #3880]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL690:
-	.loc 2 1155 0
-	ldrh	r2, [r4, #96]
+	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #124]
+	ldr	r0, [r4, #148]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL691:
-	.loc 2 1158 0
-	ldrh	r8, [r4, #16]
-.LVL692:
-.LBB419:
-.LBB420:
-.LBB421:
-	.loc 1 202 0
+	ldrh	r8, [r4, #40]
 	mov	r3, #-1
-	str	r3, [r4, #2552]
-	str	r3, [r4, #2556]
-	str	r3, [r4, #2560]
-.LVL693:
-.L834:
-.LBE421:
-.LBE420:
-.LBE419:
-	.loc 2 1158 0 discriminator 1
-	ldrh	r3, [r4, #18]
+	str	r3, [r4, #2576]
+	str	r3, [r4, #2580]
+	str	r3, [r4, #2584]
+.L841:
+	ldrh	r3, [r4, #42]
 	cmp	r3, r8
-	bls	.L876
-	.loc 2 1169 0 discriminator 1
+	bls	.L883
 	movs	r5, #0
-	.loc 2 1162 0 discriminator 1
-	ldrh	fp, [r4, #8]
-	.loc 2 1167 0 discriminator 1
-	ldr	r9, [r4, #3792]
-	.loc 2 1169 0 discriminator 1
+	ldrh	fp, [r4, #32]
+	ldr	r9, [r4, #3832]
 	mov	r7, r5
-	.loc 2 1168 0 discriminator 1
-	ldr	r3, [r4, #3148]
-	.loc 2 1167 0 discriminator 1
+	ldr	r3, [r4, #3172]
 	mov	r10, #20
-	.loc 2 1169 0 discriminator 1
-	ldr	r2, [r4, #3152]
-	ldrh	r6, [r4, #88]
-.LVL694:
-	b	.L877
-.L837:
+	ldr	r2, [r4, #3176]
+	ldrh	r6, [r4, #112]
+	b	.L884
+.L844:
 	str	r3, [sp, #8]
-	.loc 2 1164 0
 	mov	r1, r8
-	ldr	r3, .L914+4
+	ldr	r3, .L921+4
 	str	r2, [sp, #12]
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL695:
 	str	r0, [sp, #4]
-	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL696:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L835
-	.loc 2 1167 0
+	cbnz	r0, .L842
 	ldr	r1, [sp, #4]
 	mla	r0, r10, r7, r9
 	lsls	r1, r1, #10
-	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1169 0
 	mov	r1, r6
 	muls	r1, r7, r1
-	.loc 2 1170 0
 	add	r7, r7, #1
-.LVL697:
-	.loc 2 1169 0
 	it	mi
 	addmi	r1, r1, #3
-	.loc 2 1170 0
 	uxth	r7, r7
-.LVL698:
-	.loc 2 1169 0
 	bic	r1, r1, #3
 	add	r1, r1, r2
 	str	r1, [r0, #12]
-.L835:
+.L842:
 	adds	r5, r5, #1
-.L877:
-	.loc 2 1162 0 discriminator 1
+.L884:
 	uxth	r1, r5
 	cmp	fp, r1
-	bhi	.L837
-	.loc 2 1173 0
-	cbnz	r7, .L838
-.LVL699:
-.L875:
-	.loc 2 1158 0
+	bhi	.L844
+	cbnz	r7, .L845
+.L882:
 	add	r8, r8, #1
-.LVL700:
 	uxth	r8, r8
-.LVL701:
-	b	.L834
-.LVL702:
-.L838:
-	.loc 2 1176 0
+	b	.L841
+.L845:
 	mov	r0, r9
-	.loc 2 1177 0
 	mov	r9, #0
-	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, r7
 	bl	FlashReadPages
-.LVL703:
-.L839:
-	.loc 2 1177 0 discriminator 1
+.L846:
 	uxth	r3, r9
 	cmp	r7, r3
-	bls	.L875
+	bls	.L882
 	movs	r3, #20
 	mul	r10, r3, r9
-	.loc 2 1178 0
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r4, #3832]
 	add	r2, r3, r10
-	.loc 2 1181 0
 	ldr	r3, [r3, r10]
-	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-	.loc 2 1181 0
-	bne	.L842
+	bne	.L849
 	mov	fp, #16
-	.loc 2 1185 0
 	movw	r3, #65535
-.L844:
-	.loc 2 1183 0
-	ldr	r0, [r4, #3792]
+.L851:
+	ldr	r0, [r4, #3832]
 	str	r3, [sp, #4]
 	add	r0, r0, r10
 	ldr	r2, [r0, #4]
 	adds	r2, r2, #1
 	str	r2, [r0, #4]
-	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL704:
-	.loc 2 1185 0
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L841
-	.loc 2 1186 0
-	ldr	r3, [r4, #3792]
+	bne	.L848
+	ldr	r3, [r4, #3832]
 	mov	r2, #-1
 	str	r2, [r3, r10]
-	.loc 2 1194 0
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L842
-.L843:
-	.loc 2 1336 0
+	bne	.L849
+.L850:
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-.LVL705:
-	b	.L847
-.L841:
-	.loc 2 1188 0
-	ldr	r2, [r4, #3792]
+	b	.L854
+.L848:
+	ldr	r2, [r4, #3832]
 	ldr	r2, [r2, r10]
 	adds	r2, r2, #1
-	bne	.L842
+	bne	.L849
 	add	fp, fp, #-1
 	uxth	fp, fp
-	.loc 2 1182 0 discriminator 2
 	cmp	fp, #0
-	bne	.L844
-	b	.L843
-.L842:
-	.loc 2 1196 0
-	ldr	r2, [r4, #2516]
+	bne	.L851
+	b	.L850
+.L849:
+	ldr	r2, [r4, #2540]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L845
-	.loc 2 1196 0 is_stmt 0 discriminator 1
+	beq	.L852
 	cmp	r2, r3
-	bhi	.L846
-.L845:
-	.loc 2 1198 0 is_stmt 1
+	bhi	.L853
+.L852:
 	adds	r2, r3, #1
-	.loc 2 1201 0
 	itt	ne
 	addne	r2, r3, #1
-	strne	r2, [r4, #2516]
-.L846:
-	.loc 2 1206 0
+	strne	r2, [r4, #2540]
+.L853:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L848
-	bhi	.L849
+	beq	.L855
+	bhi	.L856
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L850
-.L847:
+	beq	.L857
+.L854:
 	add	r9, r9, #1
-	b	.L839
-.L849:
+	b	.L846
+.L856:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L851
+	beq	.L858
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L843
-	b	.L847
-.L851:
-	.loc 2 1211 0
-	ldrh	r2, [r4, #3904]
-	ldr	r3, [r4, #104]
+	beq	.L850
+	b	.L854
+.L858:
+	ldrh	r2, [r4, #3944]
+	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L853
-	.loc 2 1211 0 is_stmt 0 discriminator 1
+	bls	.L860
 	movw	r2, #1211
-	ldr	r1, .L914+8
-	ldr	r0, .L914+12
+	ldr	r1, .L921+8
+	ldr	r0, .L921+12
 	bl	printk
-.LVL706:
-.L853:
-	.loc 2 1212 0 is_stmt 1
-	ldr	r1, [r4, #104]
-	ldrh	r0, [r4, #3904]
-	.loc 2 1214 0
-	ldr	r10, [r4, #3852]
-	.loc 2 1212 0
+.L860:
+	ldr	r1, [r4, #128]
+	ldrh	r0, [r4, #3944]
+	ldr	r10, [r4, #3892]
 	uxth	ip, r1
 	add	r3, ip, #-1
 	sub	ip, ip, r0
 	add	ip, ip, #-1
 	sxth	r3, r3
 	sxth	ip, ip
-.L854:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
+.L861:
 	cmp	r3, ip
-	bgt	.L860
-	.loc 2 1235 0 is_stmt 1
+	bgt	.L867
 	cmp	r3, #0
-	bge	.L892
-	b	.L847
-.L860:
-	.loc 2 1214 0
+	bge	.L899
+	b	.L854
+.L867:
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	mov	lr, r2
 	ldr	r2, [r10, r3, lsl #2]
 	cmp	lr, r2
-	bls	.L855
-	.loc 2 1216 0
+	bls	.L862
 	ldr	r2, [r10]
-	cbnz	r2, .L856
-	.loc 2 1216 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L863
 	cmp	r1, r0
-	.loc 2 1221 0 is_stmt 1 discriminator 1
 	itt	ne
 	addne	r0, r0, #1
-	strhne	r0, [r4, #3904]	@ movhi
-.L856:
-	.loc 2 1224 0 discriminator 1
+	strhne	r0, [r4, #3944]	@ movhi
+.L863:
 	uxth	ip, r3
 	movs	r2, #0
-.L857:
+.L864:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L858
-	.loc 2 1229 0
-	ldr	r2, [r4, #3852]
-	.loc 2 1235 0
+	bhi	.L865
+	ldr	r2, [r4, #3892]
 	cmp	r3, #0
-	.loc 2 1229 0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
-	.loc 2 1230 0
-	ldr	r2, [r4, #3828]
+	ldr	r2, [r4, #3868]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	.loc 2 1235 0
-	blt	.L847
-	.loc 2 1242 0
-	ldrh	r0, [r4, #3904]
-	ldr	r2, [r4, #104]
+	blt	.L854
+	ldrh	r0, [r4, #3944]
+	ldr	r2, [r4, #128]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L847
-.L892:
-	.loc 2 1245 0
-	ldr	r2, [r4, #3852]
-	.loc 2 1244 0
+	bgt	.L854
+.L899:
+	ldr	r2, [r4, #3892]
 	adds	r0, r0, #1
-	.loc 2 1245 0
 	ldr	r1, [r6, #4]
-	.loc 2 1244 0
-	strh	r0, [r4, #3904]	@ movhi
-	.loc 2 1245 0
+	strh	r0, [r4, #3944]	@ movhi
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1246 0
-	ldr	r2, [r4, #3828]
-.L912:
-	.loc 2 1290 0
+	ldr	r2, [r4, #3868]
+.L919:
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L847
-.L858:
-	.loc 2 1226 0 discriminator 3
-	ldr	r0, [r4, #3852]
+	b	.L854
+.L865:
+	ldr	r0, [r4, #3892]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r1, lsl #2]
-	.loc 2 1227 0 discriminator 3
-	ldr	r0, [r4, #3828]
+	ldr	r0, [r4, #3868]
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L857
-.L855:
+	b	.L864
+.L862:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L854
-.L915:
+	b	.L861
+.L922:
 	.align	2
-.L914:
+.L921:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+36
+	.word	.LANCHOR0+60
 	.word	.LANCHOR1+328
 	.word	.LC1
-.L850:
-	.loc 2 1252 0
-	ldrh	r2, [r4, #120]
-	ldrh	r3, [r4, #96]
+.L857:
+	ldrh	r2, [r4, #144]
+	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L863
-	.loc 2 1252 0 is_stmt 0 discriminator 1
+	bls	.L870
 	movw	r2, #1252
-	ldr	r1, .L916
-	ldr	r0, .L916+4
+	ldr	r1, .L923
+	ldr	r0, .L923+4
 	bl	printk
-.LVL707:
-.L863:
-	.loc 2 1253 0 is_stmt 1
-	ldrh	lr, [r4, #96]
-	ldrh	r0, [r4, #120]
-	.loc 2 1255 0
-	ldr	r10, [r4, #3840]
-	.loc 2 1253 0
+.L870:
+	ldrh	lr, [r4, #120]
+	ldrh	r0, [r4, #144]
+	ldr	r10, [r4, #3880]
 	add	ip, lr, #-1
 	sxth	r3, ip
 	sub	ip, ip, r0
-.L864:
-	.loc 2 1253 0 is_stmt 0 discriminator 1
+.L871:
 	cmp	r3, ip
-	ble	.L869
-	.loc 2 1255 0 is_stmt 1
+	ble	.L876
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	ldr	r1, [r10, r3, lsl #2]
 	cmp	r2, r1
-	bls	.L865
-	.loc 2 1257 0
+	bls	.L872
 	ldr	r2, [r10]
-	cbnz	r2, .L866
-	.loc 2 1257 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L873
 	cmp	lr, r0
-	.loc 2 1265 0 is_stmt 1 discriminator 1
 	itt	ne
 	addne	r0, r0, #1
-	strhne	r0, [r4, #120]	@ movhi
-.L866:
-	.loc 2 1267 0 discriminator 1
+	strhne	r0, [r4, #144]	@ movhi
+.L873:
 	uxth	ip, r3
 	movs	r2, #0
-.L867:
+.L874:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L868
-	.loc 2 1272 0
-	ldr	r2, [r4, #3840]
+	bhi	.L875
+	ldr	r2, [r4, #3880]
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
-	.loc 2 1273 0
-	ldr	r2, [r4, #124]
+	ldr	r2, [r4, #148]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L869:
-	.loc 2 1278 0
+.L876:
 	cmp	r3, #0
-	blt	.L847
-	.loc 2 1286 0
-	ldrh	r2, [r4, #96]
-	ldrh	r1, [r4, #120]
+	blt	.L854
+	ldrh	r2, [r4, #120]
+	ldrh	r1, [r4, #144]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L847
-	.loc 2 1288 0
+	bgt	.L854
 	adds	r1, r1, #1
-	.loc 2 1289 0
-	ldr	r2, [r4, #3840]
-	.loc 2 1288 0
-	strh	r1, [r4, #120]	@ movhi
-	.loc 2 1289 0
+	ldr	r2, [r4, #3880]
+	strh	r1, [r4, #144]	@ movhi
 	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
-	.loc 2 1290 0
-	ldr	r2, [r4, #124]
-	b	.L912
-.L868:
-	.loc 2 1269 0 discriminator 3
-	ldr	r0, [r4, #3840]
+	ldr	r2, [r4, #148]
+	b	.L919
+.L875:
+	ldr	r0, [r4, #3880]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r1, lsl #2]
-	.loc 2 1270 0 discriminator 3
-	ldr	r0, [r4, #124]
+	ldr	r0, [r4, #148]
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L867
-.L865:
+	b	.L874
+.L872:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L864
-.L848:
-	.loc 2 1297 0
-	ldrh	r1, [r4, #2552]
+	b	.L871
+.L855:
+	ldrh	r1, [r4, #2576]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L871
-	.loc 2 1299 0
-	strh	r5, [r4, #2552]	@ movhi
-.L913:
-	.loc 2 1310 0
-	str	r3, [r4, #2560]
-	b	.L847
-.L871:
-	.loc 2 1304 0
-	ldrh	r0, [r4, #2556]
+	bne	.L878
+	strh	r5, [r4, #2576]	@ movhi
+.L920:
+	str	r3, [r4, #2584]
+	b	.L854
+.L878:
+	ldrh	r0, [r4, #2580]
 	cmp	r0, r2
-	beq	.L872
-	.loc 2 1305 0
+	beq	.L879
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL708:
-.L872:
-	.loc 2 1306 0
-	ldr	r2, [r4, #2560]
+.L879:
+	ldr	r2, [r4, #2584]
 	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L873
-	.loc 2 1308 0
-	ldrh	r3, [r4, #2552]
-	.loc 2 1309 0
-	strh	r5, [r4, #2552]	@ movhi
-	.loc 2 1308 0
-	strh	r3, [r4, #2556]	@ movhi
-	.loc 2 1310 0
+	bcs	.L880
+	ldrh	r3, [r4, #2576]
+	strh	r5, [r4, #2576]	@ movhi
+	strh	r3, [r4, #2580]	@ movhi
 	ldr	r3, [r6, #4]
-	b	.L913
-.L873:
-	.loc 2 1314 0
-	strh	r5, [r4, #2556]	@ movhi
-	b	.L847
-.L876:
-	.loc 2 1341 0
-	ldr	r1, [r4, #3828]
+	b	.L920
+.L880:
+	strh	r5, [r4, #2580]	@ movhi
+	b	.L854
+.L883:
+	ldr	r1, [r4, #3868]
 	ldrh	r3, [r1]
-	cbz	r3, .L878
-.L881:
-	.loc 2 1359 0
-	ldr	r1, [r4, #124]
+	cbz	r3, .L885
+.L888:
+	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L879
-.L880:
-	.loc 2 1377 0
-	ldrh	r2, [r4, #3904]
-	ldr	r3, [r4, #104]
+	beq	.L886
+.L887:
+	ldrh	r2, [r4, #3944]
+	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L911
-	.loc 2 1377 0 is_stmt 0 discriminator 1
+	bls	.L918
 	movw	r2, #1377
-	ldr	r1, .L916
-	ldr	r0, .L916+4
+	ldr	r1, .L923
+	ldr	r0, .L923+4
 	bl	printk
-.LVL709:
-.L911:
-	.loc 2 1379 0 is_stmt 1
+.L918:
 	movs	r0, #0
 	add	sp, sp, #20
-.LCFI111:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL710:
-.L878:
-.LCFI112:
-	.loc 2 1341 0 discriminator 1
-	ldrh	r2, [r4, #3904]
+.L885:
+	ldrh	r2, [r4, #3944]
 	cmp	r2, #0
-	beq	.L881
-	.loc 2 1343 0 discriminator 1
-	ldr	r0, [r4, #104]
-.L882:
+	beq	.L888
+	ldr	r0, [r4, #128]
+.L889:
 	sxth	r2, r3
 	cmp	r2, r0
-	bcs	.L881
-	.loc 2 1345 0
+	bcs	.L888
 	ldrh	r5, [r1, r2, lsl #1]
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L882
+	beq	.L889
 	mov	r3, r2
-	.loc 2 1351 0 discriminator 1
 	movs	r5, #0
-.L883:
-	.loc 2 1347 0 discriminator 1
-	ldr	r1, [r4, #104]
+.L890:
+	ldr	r1, [r4, #128]
 	cmp	r3, r1
-	bcs	.L881
-	.loc 2 1349 0 discriminator 3
-	ldr	r1, [r4, #3828]
+	bcs	.L888
+	ldr	r1, [r4, #3868]
 	subs	r0, r3, r2
 	ldrh	r6, [r1, r3, lsl #1]
-.LVL711:
 	strh	r6, [r1, r0, lsl #1]	@ movhi
-	.loc 2 1350 0 discriminator 3
-	ldr	r1, [r4, #3852]
+	ldr	r1, [r4, #3892]
 	ldr	r6, [r1, r3, lsl #2]
 	str	r6, [r1, r0, lsl #2]
-	.loc 2 1351 0 discriminator 3
-	ldr	r1, [r4, #3828]
+	ldr	r1, [r4, #3868]
 	strh	r5, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L883
-.LVL712:
-.L879:
-	.loc 2 1359 0 discriminator 1
-	ldrh	r3, [r4, #120]
+	b	.L890
+.L886:
+	ldrh	r3, [r4, #144]
 	cmp	r3, #0
-	beq	.L880
-	.loc 2 1361 0 discriminator 1
-	ldrh	r0, [r4, #96]
-.L888:
+	beq	.L887
+	ldrh	r0, [r4, #120]
+.L895:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	r5, r3
-	bge	.L880
-	.loc 2 1363 0
+	bge	.L887
 	ldrh	r6, [r1, r3, lsl #1]
-.LVL713:
 	adds	r2, r2, #1
 	cmp	r6, #0
-	beq	.L888
-	.loc 2 1369 0 discriminator 1
+	beq	.L895
 	movs	r0, #0
-.L889:
-	.loc 2 1365 0 discriminator 1
-	ldrh	r2, [r4, #96]
+.L896:
+	ldrh	r2, [r4, #120]
 	cmp	r3, r2
-	bge	.L880
-	.loc 2 1367 0 discriminator 3
-	ldr	r2, [r4, #124]
+	bge	.L887
+	ldr	r2, [r4, #148]
 	subs	r1, r3, r5
 	ldrh	r6, [r2, r3, lsl #1]
 	strh	r6, [r2, r1, lsl #1]	@ movhi
-	.loc 2 1368 0 discriminator 3
-	ldr	r2, [r4, #3840]
+	ldr	r2, [r4, #3880]
 	ldr	r6, [r2, r3, lsl #2]
 	str	r6, [r2, r1, lsl #2]
-	.loc 2 1369 0 discriminator 3
-	ldr	r2, [r4, #124]
+	ldr	r2, [r4, #148]
 	strh	r0, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L889
-.L917:
+	b	.L896
+.L924:
 	.align	2
-.L916:
+.L923:
 	.word	.LANCHOR1+328
 	.word	.LC1
-.LFE220:
 	.fnend
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	1
@@ -9420,328 +6323,200 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 	.fnstart
-.LFB225:
-	.loc 2 1515 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL714:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI113:
 	.pad #28
 	sub	sp, sp, #28
-.LCFI114:
-	.loc 2 1519 0
 	ldr	r3, [r0, #24]
-.LVL715:
-	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1522 0
 	ldrh	r10, [r0, #6]
-.LVL716:
-	.loc 2 1519 0
 	str	r3, [sp, #4]
-	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-.LVL717:
-	.loc 2 1527 0
-	ldr	r5, .L945
-	.loc 2 1520 0
+	ldr	r5, .L952
 	ldr	r9, [r0, #12]
-.LVL718:
-	.loc 2 1526 0
 	lsl	r2, r10, #2
-	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-.LVL719:
-	.loc 2 1526 0
 	ldr	r0, [sp, #4]
-.LVL720:
-	.loc 2 1523 0
 	str	r3, [sp, #8]
-	.loc 2 1526 0
 	bl	ftl_memset
-.LVL721:
-	.loc 2 1527 0
-	ldr	r3, [r5, #3240]
-	.loc 2 1534 0
+	ldr	r3, [r5, #3280]
 	movs	r2, #1
-	.loc 2 1528 0
-	ldr	r6, [r5, #3244]
-	.loc 2 1534 0
+	ldr	r6, [r5, #3284]
 	str	r2, [r4, #36]
-	.loc 2 1527 0
-	str	r3, [r5, #3228]
-	.loc 2 1530 0
+	str	r3, [r5, #3268]
 	movw	r3, #65535
-	.loc 2 1528 0
-	str	r6, [r5, #3232]
-	.loc 2 1530 0
+	str	r6, [r5, #3272]
 	strh	r3, [r4]	@ movhi
-	.loc 2 1531 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1532 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-	.loc 2 1535 0
 	mov	r8, r3
-	.loc 2 1533 0
 	str	r3, [r4, #28]
-	.loc 2 1537 0
 	ldr	r3, [sp, #8]
-.LVL722:
 	add	fp, r3, #-1
-	.loc 2 1579 0
 	mov	r3, r5
-.LVL723:
-.L919:
-	.loc 2 1535 0 discriminator 1
+.L926:
 	ldr	r1, [sp, #8]
-.LVL724:
 	sxth	r2, r8
-.LVL725:
 	cmp	r2, r1
-	bge	.L936
-	.loc 2 1537 0
+	bge	.L943
 	cmp	r2, fp
 	lsl	r7, r2, #1
-.LVL726:
-	bne	.L920
-	.loc 2 1539 0
+	bne	.L927
 	ldrh	r0, [r9, fp, lsl #1]
-.LVL727:
 	movs	r1, #1
-.LVL728:
 	bl	FtlGetLastWrittenPage
-.LVL729:
-	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-.LVL730:
-	.loc 2 1539 0
 	add	r7, r7, r9
-	.loc 2 1541 0
 	strh	r8, [r4]	@ movhi
-	.loc 2 1539 0
 	sxth	r9, r0
-.LVL731:
-	.loc 2 1546 0
-	ldr	r8, .L945+4
-	.loc 2 1540 0
+	ldr	r8, .L952+4
 	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1543 0
 	add	r9, r9, #1
-.LVL732:
-	.loc 2 1542 0
 	ldr	r3, [r3, fp, lsl #2]
-.LVL733:
-	.loc 2 1543 0
 	mov	fp, #0
-	.loc 2 1542 0
 	str	r3, [r4, #28]
-.LVL734:
-.L921:
-	.loc 2 1543 0 discriminator 1
+.L928:
 	sxth	r2, fp
 	cmp	r2, r9
-	blt	.L923
-.LVL735:
-.L936:
-	.loc 2 1596 0
+	blt	.L930
+.L943:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL736:
-	.loc 2 1597 0
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5, #80]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L925
-	.loc 2 1599 0
+	bne	.L932
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL737:
-.L925:
-	.loc 2 1602 0
+.L932:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL738:
-	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL739:
-	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #28
-.LCFI115:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL740:
-.L923:
-.LCFI116:
-	.loc 2 1545 0
+.L930:
 	ldrh	r1, [r7]
-	.loc 2 1546 0
 	mov	r0, r8
-	.loc 2 1545 0
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3224]
-	.loc 2 1546 0
+	str	r2, [r5, #3264]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL741:
-	.loc 2 1549 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	adds	r2, r2, #1
-	beq	.L922
-	.loc 2 1551 0
+	beq	.L929
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L922
-	.loc 2 1551 0 is_stmt 0 discriminator 1
+	bls	.L929
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r6]
 	cmp	r0, r1
-	.loc 2 1553 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r5, #3224]
+	ldreq	r1, [r5, #3264]
 	ldreq	r3, [sp, #4]
-.LVL742:
 	streq	r1, [r3, r2, lsl #2]
-.L922:
+.L929:
 	add	fp, fp, #1
-	b	.L921
-.LVL743:
-.L920:
-	.loc 2 1559 0
-	ldr	r1, [r5, #3240]
-.LVL744:
+	b	.L928
+.L927:
+	ldr	r1, [r5, #3280]
 	str	r3, [sp, #20]
-	.loc 2 1560 0
 	add	r3, r9, r7
-	.loc 2 1561 0
-	ldr	r0, .L945+4
-.LVL745:
-	.loc 2 1559 0
-	str	r1, [r5, #3228]
-	.loc 2 1560 0
+	ldr	r0, .L952+4
+	str	r1, [r5, #3268]
 	ldrh	r1, [r9, r2, lsl #1]
-	ldrh	r2, [r5, #80]
-.LVL746:
+	ldrh	r2, [r5, #104]
 	str	r3, [sp, #16]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3224]
-	.loc 2 1561 0
+	str	r2, [r5, #3264]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL747:
-	.loc 2 1564 0
-	ldr	r2, [r5, #3220]
+	ldr	r2, [r5, #3260]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L938
-	.loc 2 1564 0 is_stmt 0 discriminator 1
+	beq	.L945
 	ldrh	r1, [r6]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L938
-	.loc 2 1564 0 discriminator 2
+	bne	.L945
 	ldrh	r1, [r6, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L927
-.L938:
+	beq	.L934
+.L945:
 	movs	r7, #0
-.LVL748:
-.L928:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
-	ldrh	r1, [r3, #80]
+.L935:
+	ldrh	r1, [r3, #104]
 	sxth	r2, r7
 	cmp	r2, r1
-	bge	.L934
-	.loc 2 1581 0
+	bge	.L941
 	ldr	r1, [sp, #16]
-	.loc 2 1582 0
-	ldr	r0, .L945+4
-.LVL749:
-	.loc 2 1581 0
+	ldr	r0, .L952+4
 	str	r3, [sp, #20]
 	ldrh	r1, [r1]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #3224]
-	.loc 2 1582 0
+	str	r2, [r3, #3264]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL750:
-	.loc 2 1585 0
 	ldr	r3, [sp, #20]
-	ldr	r2, [r3, #3220]
+	ldr	r2, [r3, #3260]
 	adds	r2, r2, #1
-	beq	.L932
-	.loc 2 1587 0
+	beq	.L939
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L932
-	.loc 2 1587 0 is_stmt 0 discriminator 1
+	bls	.L939
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	.loc 2 1589 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r3, #3224]
+	ldreq	r1, [r3, #3264]
 	ldreq	r0, [sp, #4]
-.LVL751:
 	streq	r1, [r0, r2, lsl #2]
-.L932:
+.L939:
 	adds	r7, r7, #1
-	b	.L928
-.LVL752:
-.L927:
+	b	.L935
+.L934:
 	movs	r0, #0
-	.loc 2 1572 0 discriminator 1
 	mov	ip, #4
-.LVL753:
-.L929:
-	.loc 2 1567 0 discriminator 1
-	ldrh	r1, [r5, #80]
+.L936:
+	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	subs	r1, r1, #1
 	cmp	r2, r1
-	blt	.L931
-.L934:
+	blt	.L938
+.L941:
 	add	r8, r8, #1
-	b	.L919
-.L931:
-	.loc 2 1569 0
-	ldr	r7, [r5, #3240]
-.LVL754:
+	b	.L926
+.L938:
+	ldr	r7, [r5, #3280]
 	ldr	r1, [r7, r2, lsl #3]
-	.loc 2 1570 0
 	uxth	lr, r1
 	cmp	r10, lr
-	bls	.L930
-	.loc 2 1572 0
+	bls	.L937
 	add	r2, ip, r2, lsl #3
 	ldr	r2, [r7, r2]
 	ldr	r7, [sp, #4]
-.LVL755:
 	str	r2, [r7, lr, lsl #2]
-.L930:
+.L937:
 	adds	r0, r0, #1
-	b	.L929
-.L946:
+	b	.L936
+.L953:
 	.align	2
-.L945:
+.L952:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-.LFE225:
+	.word	.LANCHOR0+3260
 	.fnend
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	1
@@ -9753,54 +6528,35 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	.fnstart
-.LFB226:
-	.loc 2 1609 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 2 1610 0
-	ldr	r0, .L948
-	.loc 2 1609 0
+	ldr	r0, .L955
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI117:
-	.loc 2 1610 0
-	ldrh	r3, [r0, #96]
-	strh	r3, [r0, #3918]	@ movhi
-	.loc 2 1611 0
-	movw	r3, #61574
-	strh	r3, [r0, #3912]	@ movhi
-	.loc 2 1612 0
 	ldrh	r3, [r0, #120]
-	strh	r3, [r0, #3916]	@ movhi
-	.loc 2 1613 0
-	ldrh	r3, [r0, #98]
-	strh	r3, [r0, #3914]	@ movhi
-	.loc 2 1614 0
-	ldr	r3, [r0, #124]
-	.loc 2 1619 0
-	addw	r0, r0, #3908
-	.loc 2 1614 0
+	strh	r3, [r0, #3958]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #3952]	@ movhi
+	ldrh	r3, [r0, #144]
+	strh	r3, [r0, #3956]	@ movhi
+	ldrh	r3, [r0, #122]
+	strh	r3, [r0, #3954]	@ movhi
+	ldr	r3, [r0, #148]
+	addw	r0, r0, #3948
 	str	r3, [r0, #12]
-	.loc 2 1615 0
 	ldr	r3, [r0, #-68]
 	str	r3, [r0, #16]
-	.loc 2 1616 0
 	ldr	r3, [r0, #-72]
 	str	r3, [r0, #20]
-	.loc 2 1617 0
 	ldr	r3, [r0, #-64]
 	str	r3, [r0, #24]
-	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL756:
-	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L949:
+.L956:
 	.align	2
-.L948:
+.L955:
 	.word	.LANCHOR0
-.LFE226:
 	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.align	1
@@ -9812,100 +6568,73 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 	.fnstart
-.LFB227:
-	.loc 2 1625 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI118:
-	.loc 2 1627 0
 	movs	r1, #0
-	ldr	r4, .L953
-	.loc 2 1631 0
+	ldr	r4, .L960
 	movs	r6, #12
-	.loc 2 1627 0
-	ldr	r2, [r4, #104]
-	ldr	r0, [r4, #3832]
+	ldr	r2, [r4, #128]
+	ldr	r0, [r4, #3872]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL757:
-	.loc 2 1628 0
-	ldrh	r3, [r4, #86]
+	ldrh	r3, [r4, #110]
 	movs	r1, #255
-	ldrh	r2, [r4, #114]
-	ldr	r0, [r4, #3856]
+	ldrh	r2, [r4, #138]
+	ldr	r0, [r4, #3896]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL758:
-	.loc 2 1629 0
 	movs	r2, #0
 	mov	r3, r4
 	movw	r1, #65535
-	.loc 2 1631 0
 	mov	r7, r2
-.L951:
-	.loc 2 1629 0 discriminator 1
-	ldrh	r4, [r3, #114]
+.L958:
+	ldrh	r4, [r3, #138]
 	uxth	r0, r2
 	adds	r5, r2, #1
 	cmp	r4, r0
-	bhi	.L952
-	.loc 2 1637 0
-	ldr	r2, [r3, #104]
-	.loc 2 1635 0
-	strh	r1, [r3, #3866]	@ movhi
-	.loc 2 1636 0
-	strh	r1, [r3, #3864]	@ movhi
-	.loc 2 1637 0
-	strh	r2, [r3, #3874]	@ movhi
-	.loc 2 1638 0
+	bhi	.L959
+	ldr	r2, [r3, #128]
+	strh	r1, [r3, #3906]	@ movhi
+	strh	r1, [r3, #3904]	@ movhi
+	strh	r2, [r3, #3914]	@ movhi
 	movw	r2, #61634
-	strh	r2, [r3, #3868]	@ movhi
-	.loc 2 1639 0
-	ldrh	r2, [r3, #3904]
-	strh	r2, [r3, #3872]	@ movhi
-	.loc 2 1640 0
-	ldrh	r2, [r3, #112]
-	strh	r2, [r3, #3870]	@ movhi
-	.loc 2 1641 0
-	ldr	r2, [r3, #3828]
-	str	r2, [r3, #3876]
-	.loc 2 1642 0
-	ldr	r2, [r3, #3852]
-	str	r2, [r3, #3880]
-	.loc 2 1643 0
-	ldr	r2, [r3, #3832]
-	str	r2, [r3, #3884]
-	.loc 2 1644 0
-	ldr	r2, [r3, #3848]
-	str	r2, [r3, #3888]
+	strh	r2, [r3, #3908]	@ movhi
+	ldrh	r2, [r3, #3944]
+	strh	r2, [r3, #3912]	@ movhi
+	ldrh	r2, [r3, #136]
+	strh	r2, [r3, #3910]	@ movhi
+	ldr	r2, [r3, #3868]
+	str	r2, [r3, #3916]
+	ldr	r2, [r3, #3892]
+	str	r2, [r3, #3920]
+	ldr	r2, [r3, #3872]
+	str	r2, [r3, #3924]
+	ldr	r2, [r3, #3888]
+	str	r2, [r3, #3928]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L952:
-	.loc 2 1631 0 discriminator 3
+.L959:
 	uxth	r2, r2
-	ldr	r0, [r3, #2468]
+	ldr	r0, [r3, #2492]
 	mul	r4, r6, r2
 	add	ip, r0, r4
 	str	r7, [ip, #4]
-	.loc 2 1632 0 discriminator 3
 	strh	r1, [r0, r4]	@ movhi
-	.loc 2 1633 0 discriminator 3
-	ldr	r0, [r3, #2468]
+	ldr	r0, [r3, #2492]
 	add	r0, r0, r4
-	ldrh	r4, [r3, #86]
+	ldrh	r4, [r3, #110]
 	muls	r2, r4, r2
-	ldr	r4, [r3, #3856]
+	ldr	r4, [r3, #3896]
 	bic	r2, r2, #3
 	add	r2, r2, r4
 	str	r2, [r0, #8]
 	mov	r2, r5
-	b	.L951
-.L954:
+	b	.L958
+.L961:
 	.align	2
-.L953:
+.L960:
 	.word	.LANCHOR0
-.LFE227:
 	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	1
@@ -9917,28 +6646,19 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 	.fnstart
-.LFB228:
-	.loc 2 1648 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI119:
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL759:
-	.loc 2 1651 0
-	ldr	r0, .L956
+	ldr	r0, .L963
 	bl	FtlMapTblRecovery
-.LVL760:
-	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L957:
+.L964:
 	.align	2
-.L956:
-	.word	.LANCHOR0+3864
-.LFE228:
+.L963:
+	.word	.LANCHOR0+3904
 	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	1
@@ -9950,91 +6670,49 @@ FtlLoadMapInfo:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	.fnstart
-.LFB157:
-	.loc 3 493 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI120:
-	.loc 3 496 0
 	movs	r5, #0
-	ldr	r4, .L959
-	.loc 3 497 0
+	ldr	r4, .L966
 	movw	r3, #65535
-	.loc 3 502 0
 	mov	r1, r5
-	ldrh	r2, [r4, #96]
-	.loc 3 497 0
-	strh	r3, [r4, #3952]	@ movhi
-	.loc 3 500 0
+	ldrh	r2, [r4, #120]
+	strh	r3, [r4, #3992]	@ movhi
 	mov	r3, #-1
-	.loc 3 502 0
-	ldr	r0, [r4, #124]
-	.loc 3 500 0
-	str	r3, [r4, #3964]
-	.loc 3 502 0
+	ldr	r0, [r4, #148]
+	str	r3, [r4, #4004]
 	lsls	r2, r2, #1
-	.loc 3 496 0
-	str	r5, [r4, #3948]
-	.loc 3 498 0
-	str	r5, [r4, #3956]
-	.loc 3 499 0
-	str	r5, [r4, #3960]
-	.loc 3 501 0
-	strh	r5, [r4, #120]	@ movhi
-	.loc 3 502 0
+	str	r5, [r4, #3988]
+	str	r5, [r4, #3996]
+	str	r5, [r4, #4000]
+	strh	r5, [r4, #144]	@ movhi
 	bl	ftl_memset
-.LVL761:
-	.loc 3 503 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #2304]
+	ldr	r0, [r4, #2328]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL762:
-	.loc 3 504 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #3816]
+	ldr	r0, [r4, #3856]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL763:
-.LBB432:
-.LBB433:
-.LBB434:
-	.loc 1 202 0
-	addw	r0, r4, #2244
+	addw	r0, r4, #2268
 	movs	r1, #48
 	bl	__memzero
-.LVL764:
-.LBE434:
-.LBE433:
-.LBE432:
-.LBB435:
-.LBB436:
-.LBB437:
-	addw	r0, r4, #2612
+	addw	r0, r4, #2636
 	mov	r1, #512
 	bl	__memzero
-.LVL765:
-.LBE437:
-.LBE436:
-.LBE435:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL766:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL767:
-	.loc 3 510 0
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L960:
+.L967:
 	.align	2
-.L959:
+.L966:
 	.word	.LANCHOR0
-.LFE157:
 	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	1
@@ -10046,173 +6724,112 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	.fnstart
-.LFB235:
-	.loc 2 2116 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI121:
-	.loc 2 2121 0
 	movs	r6, #0
-	.loc 2 2120 0
-	ldr	r4, .L972
+	ldr	r4, .L979
 	movs	r2, #6
-	.loc 2 2126 0
 	mov	r9, r6
-.LVL768:
 	mov	r7, r6
-.LVL769:
-	.loc 2 2120 0
 	movs	r1, #0
-	ldrh	r3, [r4, #18]
-	.loc 2 2131 0
-	add	fp, r4, #36
-	.loc 2 2120 0
-	ldr	r0, [r4, #2292]
+	ldrh	r3, [r4, #42]
+	add	fp, r4, #60
+	ldr	r0, [r4, #2316]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL770:
-	.loc 2 2121 0
-	str	r6, [r4, #2316]
-	.loc 2 2122 0
-	str	r6, [r4, #2296]
-	.loc 2 2123 0
-	str	r6, [r4, #2308]
-	.loc 2 2124 0
-	strh	r6, [r4, #2312]	@ movhi
-	.loc 2 2125 0
-	strh	r6, [r4, #2320]	@ movhi
-.LVL771:
-.L962:
-	.loc 2 2128 0 discriminator 1
-	ldrh	r3, [r4, #16]
+	str	r6, [r4, #2340]
+	str	r6, [r4, #2320]
+	str	r6, [r4, #2332]
+	strh	r6, [r4, #2336]	@ movhi
+	strh	r6, [r4, #2344]	@ movhi
+.L969:
+	ldrh	r3, [r4, #40]
 	uxth	r8, r6
 	cmp	r8, r3
-	bcs	.L968
-	.loc 2 2133 0
+	bcs	.L975
 	mov	r10, #0
-	.loc 2 2130 0
-	ldrh	r2, [r4, #8]
-	.loc 2 2133 0
-	ldrh	r3, [r4, #78]
+	ldrh	r2, [r4, #32]
+	ldrh	r3, [r4, #102]
 	mov	r5, r10
-	b	.L969
-.L964:
-	.loc 2 2131 0
+	b	.L976
+.L971:
 	mov	r1, r8
 	ldrb	r0, [fp, r10]	@ zero_extendqisi2
 	stm	sp, {r2, r3}
 	bl	V2P_block
-.LVL772:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL773:
 	ldm	sp, {r2, r3}
-	cbnz	r0, .L963
-	.loc 2 2133 0
+	cbnz	r0, .L970
 	add	r5, r5, r3
 	uxth	r5, r5
-.L963:
+.L970:
 	add	r10, r10, #1
-.L969:
-	.loc 2 2130 0 discriminator 1
+.L976:
 	uxth	r1, r10
 	cmp	r2, r1
-	bhi	.L964
-	.loc 2 2135 0
-	cbz	r5, .L971
-	.loc 2 2136 0
+	bhi	.L971
+	cbz	r5, .L978
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL774:
-.L965:
-	.loc 2 2137 0
-	ldr	r2, [r4, #2292]
+.L972:
+	ldr	r2, [r4, #2316]
 	uxth	r1, r6
 	movs	r3, #6
 	mla	r3, r3, r1, r2
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2139 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	cmp	r3, r8
-	beq	.L966
-	.loc 2 2139 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
+	beq	.L973
+	ldrh	r3, [r4, #2396]
 	cmp	r3, r8
-	beq	.L966
-	.loc 2 2140 0 is_stmt 1
-	ldrh	r3, [r4, #2420]
+	beq	.L973
+	ldrh	r3, [r4, #2444]
 	cmp	r3, r8
-	beq	.L966
-	.loc 2 2143 0
-	ldr	r3, [r4, #2300]
+	beq	.L973
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbnz	r3, .L967
-	.loc 2 2144 0
+	cbnz	r3, .L974
 	add	r9, r9, #1
-.LVL775:
-	.loc 2 2145 0
 	mov	r0, r8
-	.loc 2 2144 0
 	uxth	r9, r9
-.LVL776:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL777:
-.L966:
+.L973:
 	adds	r6, r6, #1
-	b	.L962
-.L971:
+	b	.L969
+.L978:
 	mov	r0, r5
-	b	.L965
-.L967:
-	.loc 2 2147 0
+	b	.L972
+.L974:
 	adds	r7, r7, #1
-.LVL778:
-	.loc 2 2148 0
 	mov	r0, r8
-	.loc 2 2147 0
 	uxth	r7, r7
-.LVL779:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL780:
-	b	.L966
-.L968:
-	.loc 2 2152 0
-	strh	r7, [r4, #2312]	@ movhi
-	.loc 2 2154 0
+	b	.L973
+.L975:
+	strh	r7, [r4, #2336]	@ movhi
 	add	r7, r7, r9
-.LVL781:
 	cmp	r7, r3
-	.loc 2 2153 0
-	strh	r9, [r4, #2320]	@ movhi
-	.loc 2 2154 0
-	ble	.L970
-	.loc 2 2154 0 is_stmt 0 discriminator 1
+	strh	r9, [r4, #2344]	@ movhi
+	ble	.L977
 	movw	r2, #2154
-	ldr	r1, .L972+4
-	ldr	r0, .L972+8
+	ldr	r1, .L979+4
+	ldr	r0, .L979+8
 	bl	printk
-.LVL782:
-.L970:
-	.loc 2 2156 0 is_stmt 1
+.L977:
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI122:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL783:
-.L973:
+.L980:
 	.align	2
-.L972:
+.L979:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+342
 	.word	.LC1
-.LFE235:
 	.fnend
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.align	1
@@ -10224,47 +6841,31 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	.fnstart
-.LFB259:
-	.loc 5 202 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI123:
-	.loc 5 203 0
 	movs	r3, #0
-	ldr	r4, .L975
-	.loc 5 205 0
+	ldr	r4, .L982
 	movs	r1, #255
-	ldrh	r2, [r4, #82]
-	ldr	r0, [r4, #3164]
-	.loc 5 203 0
-	strh	r3, [r4, #3168]	@ movhi
-	.loc 5 204 0
-	strh	r3, [r4, #3176]	@ movhi
-	.loc 5 205 0
+	ldrh	r2, [r4, #106]
+	ldr	r0, [r4, #3188]
+	strh	r3, [r4, #3192]	@ movhi
+	strh	r3, [r4, #3200]	@ movhi
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL784:
-	.loc 5 206 0
-	ldrh	r3, [r4, #82]
+	ldrh	r3, [r4, #106]
 	movs	r2, #12
-	ldr	r0, [r4, #3172]
+	ldr	r0, [r4, #3196]
 	movs	r1, #255
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL785:
-	.loc 5 208 0
 	pop	{r4, lr}
-.LCFI124:
-	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL786:
-.L976:
+.L983:
 	.align	2
-.L975:
+.L982:
 	.word	.LANCHOR0
-.LFE259:
 	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	1
@@ -10276,148 +6877,89 @@ FtlGcPageVarInit:
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
 	.fnstart
-.LFB260:
-	.loc 5 211 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL787:
-	.loc 5 220 0
-	ldr	r3, .L1002
-	.loc 5 211 0
+	ldr	r3, .L1009
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI125:
 	.pad #28
 	sub	sp, sp, #28
-.LCFI126:
-	.loc 5 211 0
 	mov	r7, r0
 	str	r1, [sp, #8]
-	.loc 5 220 0
 	ldrh	r4, [r3, #4]
-.LVL788:
-	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L996
-	.loc 5 223 0
-	cbnz	r4, .L978
-.LVL789:
-.L979:
-	.loc 5 224 0
+	beq	.L1003
+	cbnz	r4, .L985
+.L986:
 	bl	FtlGcPageVarInit
-.LVL790:
-	b	.L980
-.LVL791:
-.L996:
-	.loc 5 222 0
+	b	.L987
+.L1003:
 	movs	r4, #0
-.L978:
-	.loc 5 223 0 discriminator 1
-	ldr	r3, .L1002+4
+.L985:
+	ldr	r3, .L1009+4
 	ldr	r2, [sp, #8]
-.LVL792:
-	ldrh	r3, [r3, #78]
+	ldrh	r3, [r3, #102]
 	cmp	r3, r2
-	beq	.L979
-.L980:
-	.loc 5 222 0
+	beq	.L986
+.L987:
 	mov	fp, #0
-.LVL793:
-	.loc 5 228 0
 	movw	r8, #65535
-.LVL794:
-.L990:
+.L997:
 	ldrh	r3, [r7]
-	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r7, #8]
-	.loc 5 228 0
 	cmp	r3, r8
-	beq	.L981
-	.loc 5 231 0
-	ldr	r5, .L1002+4
-.L993:
-	.loc 5 234 0
-	ldr	r3, [r5, #3792]
-	.loc 5 231 0
+	beq	.L988
+	ldr	r5, .L1009+4
+.L1000:
+	ldr	r3, [r5, #3832]
 	movs	r2, #0
-.LVL795:
-	ldrh	ip, [r5, #8]
+	ldrh	ip, [r5, #32]
 	add	lr, r7, #16
-	.loc 5 236 0
-	ldr	r10, [r5, #3152]
-	.loc 5 230 0
+	ldr	r10, [r5, #3176]
 	mov	r6, r2
-	.loc 5 234 0
 	str	r3, [sp, #4]
 	mov	r9, #20
-	.loc 5 235 0
-	ldr	r3, [r5, #3148]
+	ldr	r3, [r5, #3172]
 	str	r3, [sp, #12]
-	ldrh	r3, [r5, #86]
+	ldrh	r3, [r5, #110]
 	str	r3, [sp, #16]
-	.loc 5 236 0
-	ldrh	r3, [r5, #88]
+	ldrh	r3, [r5, #112]
 	str	r3, [sp, #20]
-.LVL796:
-.L982:
-	.loc 5 231 0 discriminator 1
+.L989:
 	uxth	r3, r2
-.LVL797:
 	cmp	ip, r3
-	bhi	.L986
-	.loc 5 241 0
+	bhi	.L993
 	mov	r9, #0
-	.loc 5 240 0
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL798:
-.L987:
-	.loc 5 241 0 discriminator 1
+.L994:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L991
-	.loc 5 268 0
+	bhi	.L998
 	ldr	r3, [sp, #8]
-.LVL799:
-	.loc 5 266 0
 	add	fp, fp, #1
-	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL800:
 	uxth	r4, r4
-.LVL801:
-	.loc 5 268 0
 	cmp	r3, fp
-	bls	.L992
-.L994:
-	.loc 5 274 0
-	ldrh	r3, [r5, #78]
-.LVL802:
+	bls	.L999
+.L1001:
+	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L993
-	.loc 5 265 0
+	bhi	.L1000
 	movs	r0, #0
-.LVL803:
-	b	.L981
-.LVL804:
-.L986:
-	.loc 5 232 0
+	b	.L988
+.L993:
 	ldrh	r3, [lr], #2
-.LVL805:
-	.loc 5 233 0
 	cmp	r3, r8
-	beq	.L983
-	.loc 5 234 0
+	beq	.L990
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL806:
 	mla	r1, r9, r6, r1
 	str	r3, [r1, #4]
-	.loc 5 235 0
 	ldr	r3, [sp, #16]
 	muls	r3, r6, r3
 	it	mi
@@ -10426,144 +6968,88 @@ FtlGcScanTempBlk:
 	mov	r0, r3
 	ldr	r3, [sp, #12]
 	add	r0, r0, r3
-	.loc 5 236 0
 	ldr	r3, [sp, #20]
 	muls	r3, r6, r3
-	.loc 5 237 0
 	add	r6, r6, #1
-.LVL807:
-	.loc 5 236 0
 	it	mi
 	addmi	r3, r3, #3
-	.loc 5 237 0
 	uxth	r6, r6
-.LVL808:
-	.loc 5 236 0
 	bic	r3, r3, #3
-	.loc 5 235 0
 	str	r0, [r1, #8]
-	.loc 5 236 0
 	add	r3, r3, r10
 	str	r3, [r1, #12]
-.LVL809:
-.L983:
+.L990:
 	adds	r2, r2, #1
-	b	.L982
-.LVL810:
-.L991:
-	.loc 5 242 0
+	b	.L989
+.L998:
 	movs	r3, #20
-	ldr	r2, [r5, #3792]
+	ldr	r2, [r5, #3832]
 	mul	r10, r3, r9
 	str	r2, [sp, #16]
 	add	r3, r2, r10
 	ldr	r1, [r3, #4]
-.LVL811:
 	str	r3, [sp, #12]
-	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL812:
-	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L988
-	.loc 5 247 0
+	cbnz	r2, .L995
 	ldr	r3, [sp, #12]
 	add	r9, r9, #1
-	.loc 5 248 0
 	ldr	r1, [sp, #4]
-.LVL813:
-	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL814:
-	.loc 5 248 0
 	ldrh	r2, [r3]
 	cmp	r2, r8
-	bne	.L989
-	.loc 5 249 0
+	bne	.L996
 	movs	r3, #1
-.LVL815:
-	str	r3, [r5, #3960]
-.LVL816:
-.L981:
-	.loc 5 281 0
-	ldr	r3, .L1002
+	str	r3, [r5, #4000]
+.L988:
+	ldr	r3, .L1009
 	movw	r2, #65535
-.LVL817:
-	.loc 5 283 0
 	strb	r0, [r7, #6]
-	.loc 5 284 0
 	mov	r1, r4
-.LVL818:
-	.loc 5 282 0
 	strh	r4, [r7, #2]	@ movhi
-	.loc 5 281 0
 	strh	r2, [r3, #4]	@ movhi
-	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r7
-.LVL819:
 	bl	ftl_sb_update_avl_pages
-.LVL820:
-	.loc 5 285 0
-	b	.L995
-.LVL821:
-.L989:
-	.loc 5 252 0
+	b	.L1002
+.L996:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL822:
-	b	.L987
-.L988:
-	.loc 5 256 0
+	b	.L994
+.L995:
 	ldrh	r2, [r7]
 	movs	r4, #0
-.LVL823:
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 5 257 0
 	ldrh	r0, [r7]
 	bl	INSERT_FREE_LIST
-.LVL824:
-	.loc 5 258 0
 	strh	r8, [r7]	@ movhi
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL825:
-	.loc 5 261 0
-	b	.L990
-.LVL826:
-.L992:
-	.loc 5 268 0 discriminator 1
-	ldr	r2, .L1002
+	b	.L997
+.L999:
+	ldr	r2, .L1009
 	ldrh	r3, [r2, #4]
-.LVL827:
 	cmp	r3, r8
-	beq	.L994
-	.loc 5 269 0
+	beq	.L1001
 	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
-	.loc 5 270 0
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L994
-.L995:
-	.loc 5 286 0
+	bls	.L1001
+.L1002:
 	mov	r0, #-1
 	add	sp, sp, #28
-.LCFI127:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL828:
-.L1003:
+.L1010:
 	.align	2
-.L1002:
+.L1009:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
-.LFE260:
 	.fnend
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.align	1
@@ -10575,16 +7061,10 @@ FtlGcScanTempBlk:
 	.type	ftl_memcpy, %function
 ftl_memcpy:
 	.fnstart
-.LFB278:
-	.loc 1 206 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL829:
-	.loc 1 207 0
 	b	memcpy
-.LVL830:
-.LFE278:
 	.fnend
 	.size	ftl_memcpy, .-ftl_memcpy
 	.align	1
@@ -10596,253 +7076,143 @@ ftl_memcpy:
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
 	.fnstart
-.LFB176:
-	.loc 4 80 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI128:
-	.loc 4 91 0
 	movs	r5, #0
-.LVL831:
-	.loc 4 87 0
-	ldr	r4, .L1014
-	.loc 4 89 0
+	ldr	r4, .L1021
 	movs	r1, #0
-	.loc 4 87 0
-	ldr	r0, [r4, #3240]
-	add	r6, r4, #152
-	.loc 4 88 0
-	ldr	r3, [r4, #3244]
-	.loc 4 89 0
-	ldrh	r2, [r4, #86]
-	.loc 4 87 0
-	str	r0, [r4, #3228]
-	.loc 4 88 0
-	str	r3, [r4, #3232]
-	.loc 4 89 0
+	ldr	r0, [r4, #3280]
+	add	r6, r4, #176
+	ldr	r3, [r4, #3284]
+	ldrh	r2, [r4, #110]
+	str	r0, [r4, #3268]
+	str	r3, [r4, #3272]
 	bl	ftl_memset
-.LVL832:
-.L1006:
-	.loc 4 91 0 discriminator 1
-	ldrh	r3, [r4, #30]
+.L1013:
+	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1007
-	.loc 4 94 0
-	ldr	r6, [r4, #3232]
-.LVL833:
-.LBB443:
-.LBB444:
-.LBB445:
-	.loc 1 202 0
+	blt	.L1014
+	ldr	r6, [r4, #3272]
 	movs	r2, #16
 	movs	r1, #255
-.LBE445:
-.LBE444:
-.LBE443:
-	.loc 4 108 0
-	ldr	r9, .L1014+12
-	.loc 4 109 0
-	ldr	r8, .L1014+4
-	.loc 4 84 0
+	ldr	r9, .L1021+12
+	ldr	r8, .L1021+4
 	movs	r5, #0
-.LVL834:
-.LBB450:
-.LBB448:
-.LBB446:
-	.loc 1 202 0
 	mov	r0, r6
-.LBE446:
-.LBE448:
-.LBE450:
-	.loc 4 129 0
-	ldr	r10, .L1014+16
-.LBB451:
-.LBB449:
-.LBB447:
-	.loc 1 202 0
+	ldr	r10, .L1021+16
 	bl	memset
-.LVL835:
-.LBE447:
-.LBE449:
-.LBE451:
-	.loc 4 97 0
 	movw	r3, #61649
-	.loc 4 82 0
 	mov	r7, r5
-.LVL836:
-	.loc 4 97 0
 	strh	r3, [r6]	@ movhi
-	.loc 4 98 0
-	ldr	r3, [r4, #136]
+	ldr	r3, [r4, #160]
 	str	r3, [r6, #4]
-	.loc 4 99 0
-	ldrh	r3, [r4, #128]
+	ldrh	r3, [r4, #152]
 	strh	r3, [r6, #2]	@ movhi
-	.loc 4 100 0
-	ldrh	r3, [r4, #132]
+	ldrh	r3, [r4, #156]
 	strh	r3, [r6, #8]	@ movhi
-	.loc 4 101 0
-	ldrh	r3, [r4, #134]
+	ldrh	r3, [r4, #158]
 	strh	r3, [r6, #10]	@ movhi
-	.loc 4 102 0
-	ldr	r3, [r4, #4]
+	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1008:
-	.loc 4 104 0
-	ldr	r3, [r4, #3240]
-	.loc 4 106 0
+.L1015:
+	ldr	r3, [r4, #3280]
 	mov	fp, #0
-	.loc 4 107 0
-	ldrh	r1, [r4, #128]
-	ldrh	r2, [r4, #130]
-	.loc 4 104 0
-	str	r3, [r4, #3228]
-	.loc 4 105 0
-	ldr	r3, [r4, #3244]
-	.loc 4 106 0
-	str	fp, [r4, #3220]
-	.loc 4 105 0
-	str	r3, [r4, #3232]
-	.loc 4 107 0
+	ldrh	r1, [r4, #152]
+	ldrh	r2, [r4, #154]
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	fp, [r4, #3260]
+	str	r3, [r4, #3272]
 	orr	r3, r2, r1, lsl #10
-	.loc 4 108 0
 	ldrh	r0, [r6, #10]
-	.loc 4 107 0
-	str	r3, [r4, #3224]
-	.loc 4 108 0
-	ldrh	r3, [r4, #132]
+	str	r3, [r4, #3264]
+	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	printk
-.LVL837:
-	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1014+4
+	ldr	r0, .L1021+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL838:
-	.loc 4 110 0
-	ldrh	r3, [r4, #80]
-	ldrh	r2, [r4, #130]
+	ldrh	r3, [r4, #104]
+	ldrh	r2, [r4, #154]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1009
-	.loc 4 113 0
-	ldr	r3, [r4, #136]
-	.loc 4 115 0
-	ldrh	r2, [r4, #128]
-	.loc 4 121 0
-	ldr	r0, [r4, #3760]
-	.loc 4 113 0
+	blt	.L1016
+	ldr	r3, [r4, #160]
+	ldrh	r2, [r4, #152]
+	ldr	r0, [r4, #3800]
 	adds	r3, r3, #1
-	.loc 4 117 0
-	strh	fp, [r4, #130]	@ movhi
-	.loc 4 113 0
-	str	r3, [r4, #136]
-	.loc 4 114 0
+	strh	fp, [r4, #154]	@ movhi
+	str	r3, [r4, #160]
 	str	r3, [r6, #4]
-	.loc 4 116 0
-	ldrh	r3, [r4, #132]
-	.loc 4 115 0
+	ldrh	r3, [r4, #156]
 	strh	r2, [r6, #8]	@ movhi
-	.loc 4 118 0
-	strh	r2, [r4, #132]	@ movhi
-	.loc 4 122 0
+	strh	r2, [r4, #156]	@ movhi
 	movs	r2, #1
-	.loc 4 116 0
-	strh	r3, [r4, #128]	@ movhi
-	.loc 4 122 0
+	strh	r3, [r4, #152]	@ movhi
 	mov	r1, r2
-	.loc 4 119 0
 	lsls	r3, r3, #10
-	str	r3, [r4, #3224]
-	.loc 4 121 0
+	str	r3, [r4, #3264]
 	str	r3, [r0, #4]
-	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL839:
-	.loc 4 123 0
 	movs	r3, #1
 	mov	r0, r8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL840:
-.L1009:
-	.loc 4 126 0
-	ldrh	r3, [r4, #130]
+.L1016:
+	ldrh	r3, [r4, #154]
 	adds	r3, r3, #1
-	strh	r3, [r4, #130]	@ movhi
-	.loc 4 127 0
-	ldr	r3, [r4, #3220]
+	strh	r3, [r4, #154]	@ movhi
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1010
-	.loc 4 130 0
+	bne	.L1017
 	adds	r5, r5, #1
-.LVL841:
-	.loc 4 129 0
-	ldr	r1, [r4, #3224]
-	.loc 4 130 0
+	ldr	r1, [r4, #3264]
 	uxth	r5, r5
-.LVL842:
-	.loc 4 129 0
 	mov	r0, r10
 	bl	printk
-.LVL843:
-	.loc 4 131 0
 	cmp	r5, #3
-	bls	.L1008
-	.loc 4 132 0
+	bls	.L1015
 	mov	r2, r5
-	ldr	r1, [r4, #3224]
-	ldr	r0, .L1014+8
+	ldr	r1, [r4, #3264]
+	ldr	r0, .L1021+8
 	bl	printk
-.LVL844:
-.L1012:
-	b	.L1012
-.LVL845:
-.L1007:
-	.loc 4 92 0 discriminator 3
-	ldrh	r2, [r4, #3860]
-	ldr	r3, [r4, #3228]
+.L1019:
+	b	.L1019
+.L1014:
+	ldrh	r2, [r4, #3900]
+	ldr	r3, [r4, #3268]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
 	lsls	r2, r2, #2
-	.loc 4 91 0 discriminator 3
 	adds	r5, r5, #1
-	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL846:
-	b	.L1006
-.LVL847:
-.L1013:
+	b	.L1013
+.L1020:
 	movs	r7, #1
-	b	.L1008
-.L1010:
-	.loc 4 139 0
+	b	.L1015
+.L1017:
 	cmp	r7, #0
-	beq	.L1013
-	.loc 4 146 0
+	beq	.L1020
 	movs	r0, #0
 	add	sp, sp, #12
-.LCFI129:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL848:
-.L1015:
+.L1022:
 	.align	2
-.L1014:
+.L1021:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
-	.word	.LC95
-	.word	.LC93
+	.word	.LANCHOR0+3260
+	.word	.LC96
 	.word	.LC94
-.LFE176:
+	.word	.LC95
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	1
@@ -10854,139 +7224,98 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 	.fnstart
-.LFB248:
-	.loc 2 2579 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL849:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI130:
 	mov	r5, r0
-	ldr	r4, .L1051
+	ldr	r4, .L1058
 	.pad #20
 	sub	sp, sp, #20
-.LCFI131:
-	.loc 2 2585 0
-	ldr	r9, .L1051+20
-.LVL850:
-.L1017:
-	ldr	r3, .L1051
-	ldr	r2, .L1051
-	ldrh	r3, [r3, #2320]
-	ldrh	r2, [r2, #2312]
+	ldr	r9, .L1058+20
+.L1024:
+	ldr	r3, .L1058
+	ldr	r2, .L1058
+	ldrh	r3, [r3, #2344]
+	ldrh	r2, [r2, #2336]
 	add	r3, r3, r2
-	ldr	r2, .L1051
-	ldrh	r2, [r2, #16]
+	ldr	r2, .L1058
+	ldrh	r2, [r2, #40]
 	cmp	r3, r2
-	ble	.L1018
-	.loc 2 2585 0 is_stmt 0 discriminator 1
+	ble	.L1025
 	movw	r2, #2585
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL851:
-.L1018:
-	.loc 2 2587 0 is_stmt 1
-	ldr	r3, .L1051+8
+.L1025:
+	ldr	r3, .L1058+8
 	cmp	r5, r3
-	bne	.L1043
-	.loc 2 2588 0
-	ldrh	r3, [r4, #2320]
-	ldr	r1, [r4, #3136]
+	bne	.L1050
+	ldrh	r3, [r4, #2344]
+	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
 	lsrs	r1, r3, #1
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL852:
-	.loc 2 2592 0
-	cbz	r1, .L1019
-	.loc 2 2593 0
+	cbz	r1, .L1026
 	subs	r1, r1, #1
-.LVL853:
 	uxth	r1, r1
-.LVL854:
-.L1019:
-	.loc 2 2594 0
-	ldr	r0, .L1051+12
+.L1026:
+	ldr	r0, .L1058+12
 	bl	List_pop_index_node
-.LVL855:
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4, #2344]
 	mov	r6, r0
 	uxth	r8, r0
-	cbnz	r3, .L1020
-	.loc 2 2594 0 is_stmt 0 discriminator 1
+	cbnz	r3, .L1027
 	movw	r2, #2594
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL856:
-.L1020:
-	.loc 2 2594 0 discriminator 3
-	ldrh	r3, [r4, #2320]
-	.loc 2 2598 0 is_stmt 1 discriminator 3
+.L1027:
+	ldrh	r3, [r4, #2344]
 	mov	r0, r5
-	.loc 2 2594 0 discriminator 3
 	subs	r3, r3, #1
-	strh	r3, [r4, #2320]	@ movhi
-	.loc 2 2597 0 discriminator 3
+	strh	r3, [r4, #2344]	@ movhi
 	strh	r8, [r5]	@ movhi
-	.loc 2 2598 0 discriminator 3
 	bl	make_superblock
-.LVL857:
-	.loc 2 2599 0 discriminator 3
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1021
-	.loc 2 2603 0
-	ldr	r3, [r4, #2300]
+	cbnz	r3, .L1028
+	ldr	r3, [r4, #2324]
 	uxth	r6, r6
 	movw	r2, #65535
-	.loc 2 2604 0
 	mov	r0, r8
-	.loc 2 2603 0
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2604 0
 	bl	INSERT_DATA_LIST
-.LVL858:
-	.loc 2 2605 0
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	ldrh	r2, [r4, #2336]
+	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1017
-	.loc 2 2605 0 is_stmt 0 discriminator 1
+	ble	.L1024
 	movw	r2, #2605
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL859:
-	b	.L1017
-.L1043:
+	b	.L1024
+.L1050:
 	movs	r1, #0
-.LVL860:
-	b	.L1019
-.LVL861:
-.L1021:
-	.loc 2 2608 0 is_stmt 1
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	b	.L1026
+.L1028:
+	ldrh	r2, [r4, #2336]
+	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1023
-	.loc 2 2608 0 is_stmt 0 discriminator 1
+	ble	.L1030
 	mov	r2, #2608
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL862:
-.L1023:
-	.loc 2 2612 0 is_stmt 1 discriminator 1
-	ldr	r1, [r4, #3760]
+.L1030:
+	ldr	r1, [r4, #3800]
 	mov	r10, #20
-	ldrh	r2, [r4, #8]
+	ldrh	r2, [r4, #32]
 	add	fp, r5, #16
 	movs	r7, #0
 	mov	r0, fp
@@ -10994,304 +7323,193 @@ allocate_data_superblock:
 	mov	ip, r7
 	mla	r2, r10, r2, r1
 	str	r2, [sp, #4]
-.L1024:
-	.loc 2 2611 0 discriminator 1
+.L1031:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bne	.L1026
-	.loc 2 2619 0
-	cbnz	r7, .L1027
-	.loc 2 2619 0 is_stmt 0 discriminator 1
+	bne	.L1033
+	cbnz	r7, .L1034
 	movw	r2, #2619
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL863:
-.L1027:
-	.loc 2 2621 0 is_stmt 1
-	ldrh	r3, [r4, #2564]
+.L1034:
+	ldrh	r3, [r4, #2588]
 	cmp	r3, r8
-	bne	.L1028
-	.loc 2 2621 0 is_stmt 0 discriminator 1
+	bne	.L1035
 	movw	r2, #2621
 	mov	r1, r9
-	ldr	r0, .L1051+4
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL864:
-.L1028:
-	.loc 2 2622 0 is_stmt 1
+.L1035:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
-	.loc 2 2623 0
-	ldr	r2, [r4, #2304]
-	.loc 2 2622 0
+	ldr	r2, [r4, #2328]
 	cmp	r3, #0
-	bne	.L1029
-	.loc 2 2623 0
+	bne	.L1036
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1030
-	.loc 2 2624 0
-	ldrh	r1, [r4, #68]
+	beq	.L1037
+	ldrh	r1, [r4, #92]
 	add	r3, r3, r1
-.L1050:
-	.loc 2 2626 0
+.L1057:
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 2628 0
 	movs	r1, #0
-	.loc 2 2627 0
-	ldr	r3, [r4, #2524]
-	.loc 2 2628 0
+	ldr	r3, [r4, #2548]
 	mov	r0, r8
-	.loc 2 2627 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2524]
-	.loc 2 2628 0
+	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.LVL865:
-.L1032:
-	.loc 2 2635 0
-	ldr	r3, [r4, #2304]
-	ldr	r2, [r4, #2540]
-	.loc 2 2638 0
-	ldrh	r0, [r4, #68]
-	.loc 2 2635 0
+.L1039:
+	ldr	r3, [r4, #2328]
+	ldr	r2, [r4, #2564]
+	ldrh	r0, [r4, #92]
 	ldrh	r3, [r3, r6, lsl #1]
-	.loc 2 2638 0
-	ldrh	r1, [r4, #16]
-	.loc 2 2635 0
+	ldrh	r1, [r4, #40]
 	cmp	r3, r2
-	.loc 2 2638 0
-	ldr	r2, [r4, #2524]
-	.loc 2 2636 0
+	ldr	r2, [r4, #2548]
 	it	hi
-	strhi	r3, [r4, #2540]
-	.loc 2 2638 0
-	ldr	r3, [r4, #2528]
+	strhi	r3, [r4, #2564]
+	ldr	r3, [r4, #2552]
 	mla	r0, r2, r0, r3
 	bl	__aeabi_uidiv
-.LVL866:
-	.loc 2 2639 0
-	ldr	r2, [r4, #3820]
-	.loc 2 2642 0
-	ldr	r1, [r4, #3760]
-	.loc 2 2638 0
-	str	r0, [r4, #2532]
-	.loc 2 2639 0
+	ldr	r2, [r4, #3860]
+	ldr	r1, [r4, #3800]
+	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	.loc 2 2642 0
-	ldr	r0, .L1051+16
-	.loc 2 2639 0
+	ldr	r0, .L1058+16
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
 	mla	r2, r2, r7, r1
 	adds	r3, r1, #4
 	adds	r2, r2, #24
-.L1034:
+.L1041:
 	adds	r3, r3, #20
-	.loc 2 2641 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1035
-	.loc 2 2643 0
+	bne	.L1042
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
-	ldr	r0, [r4, #3760]
-	.loc 2 2645 0
+	ldr	r0, [r4, #3800]
 	mov	r10, #0
-	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL867:
-	.loc 2 2644 0
 	mov	r3, r10
-.LVL868:
-	.loc 2 2646 0
 	movs	r1, #20
-.L1036:
-	.loc 2 2645 0 discriminator 1
+.L1043:
 	uxth	r2, r10
 	cmp	r7, r2
-	bhi	.L1038
-	.loc 2 2656 0
+	bhi	.L1045
 	cmp	r3, #0
-	ble	.L1039
-	.loc 2 2657 0
+	ble	.L1046
 	mov	r0, r8
 	bl	update_multiplier_value
-.LVL869:
-	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL870:
-.L1039:
-	.loc 2 2661 0
+.L1046:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1040
-	.loc 2 2663 0
-	ldr	r3, [r4, #2300]
-.LVL871:
+	bne	.L1047
+	ldr	r3, [r4, #2324]
 	movw	r2, #65535
-	.loc 2 2664 0
 	mov	r0, r8
-	.loc 2 2663 0
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2664 0
 	bl	INSERT_DATA_LIST
-.LVL872:
-	.loc 2 2665 0
-	b	.L1017
-.L1026:
-	.loc 2 2612 0
+	b	.L1024
+.L1033:
 	str	ip, [r3, #8]
-	.loc 2 2614 0
 	movw	lr, #65535
-	.loc 2 2613 0
 	str	ip, [r3, #12]
-	.loc 2 2614 0
 	ldrh	r2, [r0], #2
 	cmp	r2, lr
-	beq	.L1025
-	.loc 2 2615 0
+	beq	.L1032
 	mla	lr, r10, r7, r1
-	.loc 2 2616 0
 	adds	r7, r7, #1
-.LVL873:
-	.loc 2 2615 0
 	lsls	r2, r2, #10
-	.loc 2 2616 0
 	uxth	r7, r7
-.LVL874:
-	.loc 2 2615 0
 	str	r2, [lr, #4]
-.L1025:
+.L1032:
 	adds	r3, r3, #20
-	b	.L1024
-.L1030:
-	.loc 2 2626 0
+	b	.L1031
+.L1037:
 	movs	r3, #2
-	b	.L1050
-.L1029:
-	.loc 2 2630 0
+	b	.L1057
+.L1036:
 	ldrh	r3, [r2, r6, lsl #1]
-.LBB452:
-.LBB453:
 	mov	r0, r8
-.LBE453:
-.LBE452:
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 2631 0
-	ldr	r3, [r4, #2528]
+	ldr	r3, [r4, #2552]
 	adds	r3, r3, #1
-	str	r3, [r4, #2528]
-.LBB455:
-.LBB454:
+	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-.LVL875:
-	b	.L1032
-.L1035:
-.LBE454:
-.LBE455:
-	.loc 2 2642 0 discriminator 3
+	b	.L1039
+.L1042:
 	ldr	r1, [r3, #-20]
 	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1034
-.LVL876:
-.L1038:
-	.loc 2 2646 0
+	b	.L1041
+.L1045:
 	mul	r2, r1, r10
-	ldr	r0, [r4, #3760]
+	ldr	r0, [r4, #3800]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1037
-	.loc 2 2648 0
+	bne	.L1044
 	ldr	r0, [ip, #4]
-	.loc 2 2647 0
 	adds	r3, r3, #1
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2649 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2647 0
 	str	r3, [sp, #4]
-	.loc 2 2649 0
 	bl	FtlBbmMapBadBlock
-.LVL877:
-	.loc 2 2650 0
 	ldr	r2, [sp, #8]
-	.loc 2 2651 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-.LVL878:
-	.loc 2 2650 0
 	strh	r2, [fp]	@ movhi
-	.loc 2 2651 0
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1037:
+.L1044:
 	add	r10, r10, #1
 	add	fp, fp, #2
-	b	.L1036
-.L1040:
-	.loc 2 2668 0
-	ldrh	r3, [r4, #78]
-.LVL879:
-	.loc 2 2669 0
+	b	.L1043
+.L1047:
+	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
-	.loc 2 2668 0
 	smulbb	r3, r3, r2
-	.loc 2 2670 0
 	movs	r2, #0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2671 0
 	strb	r2, [r5, #6]
-	.loc 2 2672 0
-	ldr	r2, [r4, #2516]
-	.loc 2 2668 0
+	ldr	r2, [r4, #2540]
 	uxth	r3, r3
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 2672 0
 	str	r2, [r5, #12]
 	adds	r2, r2, #1
-	str	r2, [r4, #2516]
-	.loc 2 2673 0
-	ldr	r2, [r4, #2300]
+	str	r2, [r4, #2540]
+	ldr	r2, [r4, #2324]
 	ldrh	r1, [r5]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2674 0
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1041
-	.loc 2 2674 0 is_stmt 0 discriminator 2
+	cbz	r3, .L1048
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1042
-.L1041:
-	.loc 2 2674 0 discriminator 3
+	cbnz	r3, .L1049
+.L1048:
 	movw	r2, #2674
-	ldr	r1, .L1051+20
-	ldr	r0, .L1051+4
+	ldr	r1, .L1058+20
+	ldr	r0, .L1058+4
 	bl	printk
-.LVL880:
-.L1042:
-	.loc 2 2676 0 is_stmt 1
+.L1049:
 	movs	r0, #0
 	add	sp, sp, #20
-.LCFI132:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL881:
-.L1052:
+.L1059:
 	.align	2
-.L1051:
+.L1058:
 	.word	.LANCHOR0
 	.word	.LC1
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+2316
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+2340
 	.word	-1024
 	.word	.LANCHOR1+360
-.LFE248:
 	.fnend
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.align	1
@@ -11303,110 +7521,72 @@ allocate_data_superblock:
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
 	.fnstart
-.LFB267:
-	.loc 5 390 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL882:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI133:
-	.loc 5 390 0
 	mov	r8, r0
-	.loc 5 395 0
-	ldr	r4, .L1065
-	ldrh	r3, [r4, #3182]
-	cbz	r3, .L1054
+	ldr	r4, .L1072
+	ldrh	r3, [r4, #3206]
+	cbz	r3, .L1061
 	movs	r7, #0
-	add	r10, r4, #3184
-.LVL883:
-.L1055:
-.LBB458:
-.LBB459:
-	.loc 5 396 0
-	ldrh	r2, [r4, #8]
+	addw	r10, r4, #3208
+.L1062:
+	ldrh	r2, [r4, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1061
-	.loc 5 412 0
+	bhi	.L1068
 	bl	FtlGcReFreshBadBlk
-.LVL884:
-.L1054:
-.LBE459:
-.LBE458:
-	.loc 5 415 0
+.L1061:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL885:
-.L1061:
-.LBB461:
-.LBB460:
-	.loc 5 397 0
+.L1068:
 	uxtah	r3, r4, r7
 	mov	r1, r8
 	mov	fp, #0
-	ldrb	r0, [r3, #36]	@ zero_extendqisi2
+	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL886:
 	mov	r9, r0
-.L1056:
-	.loc 5 398 0
-	ldrh	r3, [r4, #3182]
+.L1063:
+	ldrh	r3, [r4, #3206]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1060
+	bhi	.L1067
 	adds	r7, r7, #1
-	b	.L1055
-.L1060:
-	.loc 5 399 0
+	b	.L1062
+.L1067:
 	uxth	r6, fp
 	add	r3, r4, r6, lsl #1
-	ldrh	r3, [r3, #3184]
+	ldrh	r3, [r3, #3208]
 	cmp	r3, r9
-	bne	.L1057
-	.loc 5 401 0
+	bne	.L1064
 	mov	r1, r9
-	ldr	r0, .L1065+4
+	ldr	r0, .L1072+4
 	bl	printk
-.LVL887:
-	.loc 5 403 0
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
-.LVL888:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL889:
-	.loc 5 405 0
-	ldrh	r1, [r4, #3182]
+	ldrh	r1, [r4, #3206]
 	add	r3, r10, r6, lsl #1
-.L1058:
+.L1065:
 	cmp	r5, r1
-	bcc	.L1059
-	.loc 5 407 0
+	bcc	.L1066
 	subs	r1, r1, #1
-	strh	r1, [r4, #3182]	@ movhi
-.L1057:
+	strh	r1, [r4, #3206]	@ movhi
+.L1064:
 	add	fp, fp, #1
-	b	.L1056
-.L1059:
-	.loc 5 406 0
+	b	.L1063
+.L1066:
 	ldrh	r0, [r3, #2]!
-	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL890:
 	uxth	r5, r5
-.LVL891:
-	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1058
-.L1066:
+	b	.L1065
+.L1073:
 	.align	2
-.L1065:
+.L1072:
 	.word	.LANCHOR0
-	.word	.LC96
-.LBE460:
-.LBE461:
-.LFE267:
+	.word	.LC97
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	1
@@ -11418,113 +7598,77 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	.fnstart
-.LFB251:
-	.loc 2 2735 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL892:
-	.loc 2 2736 0
-	ldr	r2, .L1077
-	.loc 2 2735 0
+	ldr	r2, .L1084
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI134:
-	.loc 2 2735 0
 	mov	r5, r0
 	mov	r4, r2
-	.loc 2 2736 0
-	ldr	r3, [r2, #2300]
+	ldr	r3, [r2, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1068
-	.loc 2 2737 0
-	ldrh	r1, [r2, #2564]
+	bne	.L1075
+	ldrh	r1, [r2, #2588]
 	cmp	r1, r0
-	bne	.L1069
-	.loc 2 2739 0
+	bne	.L1076
 	movw	r3, #65535
-	strh	r3, [r2, #2564]	@ movhi
-.L1070:
-.LVL893:
-.LBB464:
-.LBB465:
-	.loc 2 2744 0
+	strh	r3, [r2, #2588]	@ movhi
+.L1077:
 	mov	r1, r5
-	ldr	r0, .L1077+4
+	ldr	r0, .L1084+4
 	bl	List_remove_node
-.LVL894:
-	ldrh	r3, [r4, #2312]
-	cbnz	r3, .L1072
+	ldrh	r3, [r4, #2336]
+	cbnz	r3, .L1079
 	movw	r2, #2744
-	ldr	r1, .L1077+8
-	ldr	r0, .L1077+12
+	ldr	r1, .L1084+8
+	ldr	r0, .L1084+12
 	bl	printk
-.LVL895:
-.L1072:
-	ldrh	r3, [r4, #2312]
-	.loc 2 2745 0
+.L1079:
+	ldrh	r3, [r4, #2336]
 	mov	r0, r5
-	.loc 2 2744 0
 	subs	r3, r3, #1
-	strh	r3, [r4, #2312]	@ movhi
-	.loc 2 2745 0
+	strh	r3, [r4, #2336]	@ movhi
 	bl	free_data_superblock
-.LVL896:
-	.loc 2 2746 0
 	mov	r0, r5
 	bl	FtlGcFreeBadSuperBlk
-.LVL897:
-	.loc 2 2747 0
-	ldrh	r2, [r4, #2312]
-	ldrh	r3, [r4, #2320]
+	ldrh	r2, [r4, #2336]
+	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
-	ldrh	r2, [r4, #16]
+	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1076
+	ble	.L1083
 	movw	r2, #2747
-	ldr	r1, .L1077+8
-	ldr	r0, .L1077+12
+	ldr	r1, .L1084+8
+	ldr	r0, .L1084+12
 	bl	printk
-.LVL898:
-.L1076:
+.L1083:
 	movs	r3, #1
-	b	.L1067
-.LVL899:
-.L1069:
-.LBE465:
-.LBE464:
-	.loc 2 2740 0
-	ldrh	r1, [r2, #2324]
+	b	.L1074
+.L1076:
+	ldrh	r1, [r2, #2348]
 	cmp	r1, r0
-	beq	.L1067
-	.loc 2 2740 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r2, #2372]
+	beq	.L1074
+	ldrh	r1, [r2, #2396]
 	cmp	r1, r0
-	beq	.L1067
-	.loc 2 2740 0 discriminator 2
-	ldrh	r2, [r2, #2420]
+	beq	.L1074
+	ldrh	r2, [r2, #2444]
 	cmp	r2, r0
-	bne	.L1070
-.L1067:
-	.loc 2 2753 0 is_stmt 1
+	bne	.L1077
+.L1074:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL900:
-.L1068:
-	.loc 2 2750 0
+.L1075:
 	bl	List_update_data_list
-.LVL901:
-	.loc 2 2752 0
 	movs	r3, #0
-	b	.L1067
-.L1078:
+	b	.L1074
+.L1085:
 	.align	2
-.L1077:
+.L1084:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2296
+	.word	.LANCHOR0+2320
 	.word	.LANCHOR1+385
 	.word	.LC1
-.LFE251:
 	.fnend
 	.size	update_vpc_list, .-update_vpc_list
 	.align	1
@@ -11536,112 +7680,77 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 	.fnstart
-.LFB252:
-	.loc 2 2756 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL902:
-	.loc 2 2759 0
 	movw	r3, #65535
-	.loc 2 2756 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI135:
-	.loc 2 2759 0
 	cmp	r0, r3
-	.loc 2 2756 0
 	mov	r4, r0
-	ldr	r5, .L1088
-	.loc 2 2759 0
-	beq	.L1080
-	.loc 2 2760 0
-	ldr	r3, [r5, #2300]
+	ldr	r5, .L1095
+	beq	.L1087
+	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1081
-	.loc 2 2761 0
+	cbnz	r2, .L1088
 	mov	r1, r0
-	ldr	r0, .L1088+4
+	ldr	r0, .L1095+4
 	bl	printk
-.LVL903:
-	.loc 2 2762 0
-	ldr	r3, [r5, #2300]
+	ldr	r3, [r5, #2324]
 	ldrh	r6, [r3, r4, lsl #1]
-	cbz	r6, .L1082
-.L1086:
-	.loc 2 2771 0
+	cbz	r6, .L1089
+.L1093:
 	movs	r6, #0
-.L1079:
-	.loc 2 2781 0
+.L1086:
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.LVL904:
-.L1082:
-	.loc 2 2762 0 discriminator 1
+.L1089:
 	movw	r2, #2762
-.L1087:
-	.loc 2 2778 0 discriminator 2
-	ldr	r1, .L1088+8
-	ldr	r0, .L1088+12
+.L1094:
+	ldr	r1, .L1095+8
+	ldr	r0, .L1095+12
 	bl	printk
-.LVL905:
-	b	.L1079
-.LVL906:
-.L1081:
-	.loc 2 2765 0
+	b	.L1086
+.L1088:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1080:
-	.loc 2 2769 0
-	ldrh	r0, [r5, #3952]
+.L1087:
+	ldrh	r0, [r5, #3992]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1084
-	.loc 2 2770 0
-	strh	r4, [r5, #3952]	@ movhi
-	b	.L1086
-.L1084:
-	.loc 2 2772 0
+	bne	.L1091
+	strh	r4, [r5, #3992]	@ movhi
+	b	.L1093
+.L1091:
 	cmp	r4, r0
-	beq	.L1086
-	.loc 2 2775 0
+	beq	.L1093
 	bl	update_vpc_list
-.LVL907:
-	.loc 2 2778 0
-	ldr	r2, [r5, #2292]
-	.loc 2 2775 0
+	ldr	r2, [r5, #2316]
 	adds	r6, r0, #0
-	.loc 2 2778 0
-	ldr	r3, [r5, #2296]
-	.loc 2 2775 0
+	ldr	r3, [r5, #2320]
 	it	ne
 	movne	r6, #1
-	.loc 2 2777 0
-	strh	r4, [r5, #3952]	@ movhi
-	.loc 2 2778 0
+	strh	r4, [r5, #3992]	@ movhi
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1088+16
+	ldr	r3, .L1095+16
 	muls	r3, r2, r3
-	ldr	r2, [r5, #2300]
+	ldr	r2, [r5, #2324]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1079
-	.loc 2 2778 0 is_stmt 0 discriminator 1
+	bne	.L1086
 	cmp	r4, r1
-	beq	.L1079
-	.loc 2 2778 0 discriminator 2
+	beq	.L1086
 	movw	r2, #2778
-	b	.L1087
-.L1089:
+	b	.L1094
+.L1096:
 	.align	2
-.L1088:
+.L1095:
 	.word	.LANCHOR0
-	.word	.LC97
+	.word	.LC98
 	.word	.LANCHOR1+401
 	.word	.LC1
 	.word	-1431655765
-.LFE252:
 	.fnend
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	1
@@ -11653,177 +7762,106 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 	.fnstart
-.LFB218:
-	.loc 2 996 0 is_stmt 1
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI136:
 	.pad #24
 	sub	sp, sp, #24
-.LCFI137:
-	.loc 2 997 0
-	ldr	r4, .L1108
-	ldrh	r2, [r4, #2328]
+	ldr	r4, .L1115
+	ldrh	r2, [r4, #2352]
 	cmp	r2, #0
-	beq	.L1091
-	.loc 2 997 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
+	beq	.L1098
+	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1091
-	.loc 2 998 0 is_stmt 1
-	ldrb	r1, [r4, #2331]	@ zero_extendqisi2
-	ldrh	r3, [r4, #78]
+	bne	.L1098
+	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
+	ldrh	r3, [r4, #102]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1091
-.LBB469:
-.LBB470:
-	.loc 2 1005 0
-	ldrb	r7, [r4, #2334]	@ zero_extendqisi2
-	cbnz	r7, .L1090
-	.loc 2 1000 0
-	ldr	r6, [r4, #2480]
-	.loc 2 1007 0
+	beq	.L1098
+	ldrb	r7, [r4, #2358]	@ zero_extendqisi2
+	cbnz	r7, .L1097
+	ldr	r6, [r4, #2504]
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 1002 0
-	ldrh	r8, [r4, #8]
-	.loc 2 1000 0
+	ldrh	r8, [r4, #32]
 	subs	r6, r6, #1
-.LVL908:
-	.loc 2 1007 0
 	mov	r0, r6
 	bl	log2phys
-.LVL909:
-	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 1013 0
-	ldr	r5, [r4, #3244]
-	.loc 2 1012 0
-	ldr	r0, [r4, #3240]
-	.loc 2 1010 0
+	ldr	r5, [r4, #3284]
+	ldr	r0, [r4, #3280]
 	str	r3, [sp, #8]
-	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 1013 0
 	str	r5, [sp, #16]
-	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 1016 0
-	beq	.L1093
-	.loc 2 1018 0
+	beq	.L1100
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL910:
-.L1094:
-	.loc 2 1035 0
-	ldr	r9, .L1108+4
-	.loc 2 1024 0
+.L1101:
+	ldr	r9, .L1115+4
 	movs	r7, #0
-	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL911:
-	.loc 2 1036 0
 	mov	r10, r7
-	.loc 2 1024 0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1095:
-	.loc 2 1025 0
+.L1102:
 	cmp	r8, r7
-	bne	.L1099
-.L1096:
-	.loc 2 1041 0
+	bne	.L1106
+.L1103:
 	movs	r3, #1
-.L1107:
-.LBE470:
-.LBE469:
-	.loc 2 1047 0
-	strb	r3, [r4, #2334]
-.L1090:
-	.loc 2 1049 0
+.L1114:
+	strb	r3, [r4, #2358]
+.L1097:
 	add	sp, sp, #24
-.LCFI138:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL912:
-.L1093:
-.LCFI139:
-.LBB472:
-.LBB471:
-	.loc 2 1022 0
-	ldrh	r2, [r4, #86]
+.L1100:
+	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-.LVL913:
-	b	.L1094
-.LVL914:
-.L1099:
-	.loc 2 1027 0
-	ldrh	r3, [r4, #2328]
+	b	.L1101
+.L1106:
+	ldrh	r3, [r4, #2352]
 	cmp	r3, #0
-	beq	.L1096
-	.loc 2 1032 0
+	beq	.L1103
 	ldr	r3, [sp, #8]
-	.loc 2 1035 0
 	mov	r0, r9
-	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 1033 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL915:
-	.loc 2 1036 0
-	ldr	r3, [r4, #2520]
-	.loc 2 1037 0
+	ldr	r3, [r4, #2544]
 	movs	r1, #1
-	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r10
-	str	r3, [r4, #2520]
-	.loc 2 1037 0
+	str	r3, [r4, #2544]
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL916:
-	.loc 2 1039 0
-	ldrh	r0, [r4, #2324]
+	ldrh	r0, [r4, #2348]
 	bl	decrement_vpc_count
-.LVL917:
-	b	.L1095
-.LVL918:
-.L1091:
-.LBE471:
-.LBE472:
-	.loc 2 1047 0
+	b	.L1102
+.L1098:
 	movs	r3, #0
-	b	.L1107
-.L1109:
+	b	.L1114
+.L1116:
 	.align	2
-.L1108:
+.L1115:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2324
-.LFE218:
+	.word	.LANCHOR0+2348
 	.fnend
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	1
@@ -11835,51 +7873,36 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 	.fnstart
-.LFB211:
-	.loc 2 789 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI140:
-	.loc 2 795 0
 	movs	r4, #0
-	ldr	r5, .L1114
-	.loc 2 796 0
+	ldr	r5, .L1121
 	movs	r6, #12
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL919:
-.L1111:
-	.loc 2 795 0 discriminator 1
-	ldrh	r3, [r5, #114]
+.L1118:
+	ldrh	r3, [r5, #138]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1113
-	.loc 2 799 0
+	bhi	.L1120
 	movs	r0, #0
-.LVL920:
 	pop	{r4, r5, r6, pc}
-.LVL921:
-.L1113:
-	.loc 2 796 0
-	ldr	r2, [r5, #2468]
+.L1120:
+	ldr	r2, [r5, #2492]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1112
-	.loc 2 797 0
+	bge	.L1119
 	bl	flush_l2p_region
-.LVL922:
-.L1112:
+.L1119:
 	adds	r4, r4, #1
-	b	.L1111
-.L1115:
+	b	.L1118
+.L1122:
 	.align	2
-.L1114:
+.L1121:
 	.word	.LANCHOR0
-.LFE211:
 	.fnend
 	.size	l2p_flush, .-l2p_flush
 	.align	1
@@ -11891,252 +7914,148 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 	.fnstart
-.LFB231:
-	.loc 2 1705 0
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL923:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI141:
-	.loc 2 1719 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 1705 0
 	.pad #52
 	sub	sp, sp, #52
-.LCFI142:
-	.loc 2 1705 0
 	mov	fp, r0
-	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1241
-	.loc 2 1724 0
+	beq	.L1248
 	ldrh	r3, [r0, #2]
-.LVL924:
-	.loc 2 1730 0
-	ldr	r4, .L1248
-	.loc 2 1724 0
+	ldr	r4, .L1255
 	str	r3, [sp, #8]
-	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-.LVL925:
-	.loc 2 1730 0
 	ldr	r1, [sp, #8]
-.LVL926:
-	.loc 2 1725 0
 	str	r3, [sp, #24]
-	.loc 2 1730 0
-	ldrh	r3, [r4, #78]
-.LVL927:
+	ldrh	r3, [r4, #102]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1119
-	.loc 2 1731 0
+	bne	.L1126
 	strh	r3, [r0, #4]	@ movhi
-.LVL928:
-.L1246:
-	.loc 2 2038 0
+.L1253:
 	strb	r3, [fp, #6]
-.L1241:
-	.loc 2 2059 0
+.L1248:
 	movs	r0, #0
 	add	sp, sp, #52
-.LCFI143:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL929:
-.L1119:
-.LCFI144:
-	.loc 2 1738 0
+.L1126:
 	ldrh	r0, [r0, #16]
-.LVL930:
-.L1120:
-	.loc 2 1739 0
+.L1127:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1121
-	.loc 2 1746 0
+	beq	.L1128
 	movs	r1, #1
-.LVL931:
 	bl	FtlGetLastWrittenPage
-.LVL932:
-	.loc 2 1754 0
 	adds	r7, r0, #1
-	.loc 2 1746 0
 	mov	r6, r0
-.LVL933:
-	.loc 2 1754 0
-	beq	.L1122
-	.loc 2 1770 0
-	ldr	r3, [r4, #3148]
-	.loc 2 1771 0
+	beq	.L1129
+	ldr	r3, [r4, #3172]
 	movs	r2, #0
-	.loc 2 1766 0
-	ldrh	lr, [r4, #8]
-	.loc 2 1768 0
+	ldrh	lr, [r4, #32]
 	movw	r9, #65535
-	.loc 2 1769 0
-	ldr	r0, [r4, #3792]
+	ldr	r0, [r4, #3832]
 	mov	r10, #20
-	.loc 2 1770 0
 	str	r3, [sp, #4]
-	ldrh	r3, [r4, #86]
-	.loc 2 1771 0
-	ldr	r8, [r4, #3152]
-	ldrh	r7, [r4, #88]
+	ldrh	r3, [r4, #110]
+	ldr	r8, [r4, #3176]
+	ldrh	r7, [r4, #112]
 	mov	r4, r2
-	.loc 2 1770 0
 	str	r3, [sp, #12]
 	add	r3, fp, #16
-	.loc 2 1771 0
 	mov	ip, r3
 	str	r3, [sp, #20]
-.L1123:
-	.loc 2 1766 0 discriminator 1
+.L1130:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L1129
-	.loc 2 1777 0
-	ldr	r5, .L1248
-	.loc 2 1776 0
+	bhi	.L1136
+	ldr	r5, .L1255
 	movs	r2, #0
 	mov	r1, r4
-	.loc 2 1715 0
 	movw	r9, #65535
-	.loc 2 1776 0
 	bl	FlashReadPages
-.LVL934:
-	.loc 2 1777 0
-	ldr	r3, [r5, #2520]
-	.loc 2 1791 0
+	ldr	r3, [r5, #2544]
 	uxth	r2, r6
-	.loc 2 1779 0
-	ldr	r8, [r5, #3792]
-	.loc 2 1791 0
+	ldr	r8, [r5, #3832]
 	str	r2, [sp, #12]
-	.loc 2 1777 0
 	subs	r3, r3, #1
-.LVL935:
 	str	r3, [sp, #4]
 	mov	r7, r8
-	.loc 2 1778 0
 	movs	r3, #0
-.LVL936:
-.L1130:
+.L1137:
 	uxth	r2, r3
-.LVL937:
-	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r4, r2
-	bhi	.L1135
-	.loc 2 1794 0 is_stmt 1
-	bne	.L1133
-	.loc 2 1796 0
+	bhi	.L1142
+	bne	.L1140
 	adds	r3, r6, #1
 	uxth	r3, r3
-.LVL938:
 	str	r3, [sp, #16]
-.L1242:
-	.loc 2 1802 0
+.L1249:
 	ldr	r0, [r8, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL939:
-	.loc 2 1807 0
-	ldrh	r3, [r5, #78]
+	ldrh	r3, [r5, #102]
 	ldr	r2, [sp, #16]
-.LVL940:
-	.loc 2 1802 0
 	str	r0, [sp, #12]
-	.loc 2 1807 0
 	cmp	r3, r2
-	bne	.L1137
-	.loc 2 1808 0
+	bne	.L1144
 	ldrh	r3, [sp, #16]
 	strh	r3, [fp, #2]	@ movhi
-	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [fp, #6]
-	.loc 2 1810 0
 	strh	r3, [fp, #4]	@ movhi
-.L1137:
-	.loc 2 1813 0
+.L1144:
 	ldr	r3, [sp, #16]
-.LVL941:
 	ldr	r2, [sp, #8]
-.LVL942:
 	cmp	r3, r2
-	bne	.L1138
-	.loc 2 1813 0 is_stmt 0 discriminator 1
+	bne	.L1145
 	ldr	r3, [sp, #12]
-.LVL943:
 	ldr	r2, [sp, #24]
-.LVL944:
 	cmp	r3, r2
-	bne	.L1138
-	.loc 2 1814 0 is_stmt 1
+	bne	.L1145
 	ldr	r1, [sp, #16]
 	mov	r2, r3
-.LVL945:
-.L1247:
-	.loc 2 2053 0
+.L1254:
 	mov	r0, fp
-.LVL946:
 	bl	ftl_sb_update_avl_pages
-.LVL947:
-	b	.L1241
-.LVL948:
-.L1121:
-	.loc 2 1741 0
+	b	.L1248
+.L1128:
 	uxth	r1, r3
-.LVL949:
 	adds	r1, r1, #8
 	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1120
-.LVL950:
-.L1122:
-	.loc 2 1755 0
+	b	.L1127
+.L1129:
 	ldr	r3, [sp, #8]
-.LVL951:
-	cbz	r3, .L1124
-	.loc 2 1755 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1131
 	movw	r2, #1755
-	ldr	r1, .L1248+4
-	ldr	r0, .L1248+8
+	ldr	r1, .L1255+4
+	ldr	r0, .L1255+8
 	bl	printk
-.LVL952:
-.L1124:
-	.loc 2 1756 0 is_stmt 1
+.L1131:
 	ldr	r3, [sp, #24]
-.LVL953:
-	cbz	r3, .L1125
-	.loc 2 1756 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1132
 	cmp	r5, r3
-	beq	.L1125
-	.loc 2 1756 0 discriminator 2
+	beq	.L1132
 	movw	r2, #1756
-	ldr	r1, .L1248+4
-	ldr	r0, .L1248+8
+	ldr	r1, .L1255+4
+	ldr	r0, .L1255+8
 	bl	printk
-.LVL954:
-.L1125:
-	.loc 2 1757 0 is_stmt 1
+.L1132:
 	movs	r3, #0
-.LVL955:
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1246
-.L1129:
-	.loc 2 1767 0
+	b	.L1253
+.L1136:
 	ldrh	r3, [ip], #2
-	.loc 2 1768 0
 	cmp	r3, r9
-	beq	.L1126
-	.loc 2 1769 0
+	beq	.L1133
 	mla	r1, r10, r4, r0
 	orr	r3, r6, r3, lsl #10
 	str	r3, [r1, #4]
-	.loc 2 1770 0
 	ldr	r3, [sp, #12]
 	muls	r3, r4, r3
 	it	mi
@@ -12145,763 +8064,467 @@ FtlRecoverySuperblock:
 	mov	r5, r3
 	ldr	r3, [sp, #4]
 	add	r5, r5, r3
-	.loc 2 1771 0
 	mov	r3, r7
 	muls	r3, r4, r3
-	.loc 2 1772 0
 	add	r4, r4, #1
-	.loc 2 1771 0
 	it	mi
 	addmi	r3, r3, #3
-	.loc 2 1772 0
 	uxth	r4, r4
-	.loc 2 1771 0
 	bic	r3, r3, #3
-	.loc 2 1770 0
 	str	r5, [r1, #8]
-	.loc 2 1771 0
 	add	r3, r3, r8
 	str	r3, [r1, #12]
-.L1126:
+.L1133:
 	adds	r2, r2, #1
-	b	.L1123
-.LVL956:
-.L1135:
-	.loc 2 1779 0
+	b	.L1130
+.L1142:
 	ldr	r2, [r7]
-.LVL957:
-	cbnz	r2, .L1131
-	.loc 2 1780 0
+	cbnz	r2, .L1138
 	ldr	r10, [r7, #12]
-	.loc 2 1781 0
 	ldr	r2, [r10, #4]
 	adds	r0, r2, #1
-	beq	.L1132
-	.loc 2 1782 0
-	ldr	r1, [r5, #2520]
+	beq	.L1139
+	ldr	r1, [r5, #2544]
 	mov	r0, r2
 	bl	ftl_cmp_data_ver
-.LVL958:
-	cbz	r0, .L1132
-	.loc 2 1784 0
+	cbz	r0, .L1139
 	adds	r2, r2, #1
-	str	r2, [r5, #2520]
-.L1132:
-	.loc 2 1787 0
+	str	r2, [r5, #2544]
+.L1139:
 	ldr	r2, [r10]
 	adds	r2, r2, #1
-	bne	.L1134
-.LVL959:
-.L1133:
-	.loc 2 1801 0
+	bne	.L1141
+.L1140:
 	uxth	r2, r6
-.LVL960:
-	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1801 0
 	str	r2, [sp, #16]
-	.loc 2 1802 0
 	movs	r2, #20
-.LVL961:
 	mla	r8, r2, r3, r8
-	b	.L1242
-.L1131:
-	.loc 2 1791 0
+	b	.L1249
+.L1138:
 	ldr	r9, [sp, #12]
-.L1134:
+.L1141:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1130
-.LVL962:
-.L1138:
-	.loc 2 1819 0
+	b	.L1137
+.L1145:
 	movw	r3, #65535
-.LVL963:
 	cmp	r9, r3
-	bne	.L1139
-	.loc 2 1819 0 is_stmt 0 discriminator 1
+	bne	.L1146
 	ldrb	r3, [fp, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1140
-.L1139:
-.LBB473:
-	.loc 2 1824 0 is_stmt 1
-	ldr	r3, [r5, #3964]
-	.loc 2 1823 0
+	bne	.L1147
+.L1146:
+	ldr	r3, [r5, #4004]
 	uxth	r8, r6
-	.loc 2 1827 0
 	uxth	r6, r6
-.LVL964:
-	ldr	r7, .L1248
-	.loc 2 1833 0
+	ldr	r7, .L1255
 	movw	r9, #65535
-	.loc 2 1824 0
 	adds	r3, r3, #1
-	.loc 2 1825 0
 	itt	eq
 	ldreq	r3, [sp, #4]
-.LVL965:
-	streq	r3, [r5, #3964]
-	.loc 2 1827 0
+	streq	r3, [r5, #4004]
 	ldr	r3, [sp, #8]
-.LVL966:
 	adds	r3, r3, #7
-.LVL967:
 	cmp	r6, r3
-	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r8, #7
 	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L1143:
-	.loc 2 1829 0 discriminator 1
+.L1150:
 	cmp	r4, r8
-	bhi	.L1150
-	.loc 2 1834 0
+	bhi	.L1157
 	movs	r3, #0
-	.loc 2 1831 0
-	ldrh	lr, [r7, #8]
-	.loc 2 1834 0
-	ldr	r0, [r7, #3792]
+	ldrh	lr, [r7, #32]
+	ldr	r0, [r7, #3832]
 	mov	r6, r3
 	ldr	r1, [sp, #20]
 	mov	ip, #20
-	b	.L1151
-.LVL968:
-.L1145:
-	.loc 2 1832 0
+	b	.L1158
+.L1152:
 	ldrh	r2, [r1], #2
-	.loc 2 1833 0
 	cmp	r2, r9
-	beq	.L1144
-	.loc 2 1834 0
+	beq	.L1151
 	mla	r10, ip, r6, r0
-	.loc 2 1835 0
 	adds	r6, r6, #1
-	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-	.loc 2 1835 0
 	uxth	r6, r6
-	.loc 2 1834 0
 	str	r2, [r10, #4]
-.L1144:
-	adds	r3, r3, #1
-.LVL969:
 .L1151:
-	.loc 2 1831 0 discriminator 1
+	adds	r3, r3, #1
+.L1158:
 	uxth	r2, r3
-.LVL970:
 	cmp	r2, lr
-	bcc	.L1145
-	.loc 2 1838 0
+	bcc	.L1152
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.LVL971:
-	.loc 2 1840 0
-	ldr	r3, [r7, #3792]
+	ldr	r3, [r7, #3832]
 	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1146:
-	.loc 2 1839 0 discriminator 1
+.L1153:
 	cmp	r6, r3
-	bne	.L1149
-	.loc 2 1829 0
+	bne	.L1156
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1143
-.L1149:
-	.loc 2 1840 0
+	b	.L1150
+.L1156:
 	ldr	r2, [r3]
-	cbnz	r2, .L1140
-	.loc 2 1841 0
+	cbnz	r2, .L1147
 	ldr	r2, [r3, #12]
-	.loc 2 1842 0
 	ldrh	r1, [r2]
 	cmp	r1, r9
-	beq	.L1148
-	.loc 2 1844 0
+	beq	.L1155
 	ldr	r2, [r2, #4]
 	adds	r1, r2, #1
-	.loc 2 1846 0
 	it	ne
-	strne	r2, [r7, #3964]
-.L1148:
+	strne	r2, [r7, #4004]
+.L1155:
 	adds	r3, r3, #20
-	b	.L1146
-.LVL972:
-.L1150:
-	.loc 2 1858 0
+	b	.L1153
+.L1157:
 	mov	r3, #-1
-	str	r3, [r7, #3964]
-.LVL973:
-.L1140:
-.LBE473:
-	.loc 2 1863 0
+	str	r3, [r7, #4004]
+.L1147:
 	movs	r3, #1
-	.loc 2 1864 0
-	ldr	r0, .L1248+12
-	.loc 2 1863 0
-	strh	r3, [r5, #3968]	@ movhi
-	.loc 2 1870 0
-	ldr	r4, .L1248
-	.loc 2 1864 0
+	ldr	r0, .L1255+12
+	strh	r3, [r5, #4008]	@ movhi
+	ldr	r4, .L1255
 	bl	FtlMapBlkWriteDump_data
-.LVL974:
 	ldr	r5, [sp, #8]
-.LVL975:
-.L1152:
-	.loc 2 1870 0
-	ldrh	r6, [r4, #8]
-.LVL976:
+.L1159:
+	ldrh	r6, [r4, #32]
 	movs	r3, #0
-	.loc 2 1873 0
-	ldr	r0, [r4, #3792]
-.LVL977:
-	.loc 2 1869 0
+	ldr	r0, [r4, #3832]
 	mov	r10, r3
-	.loc 2 1870 0
 	ldr	r1, [sp, #20]
-	.loc 2 1872 0
 	movw	r7, #65535
-	.loc 2 1873 0
 	mov	ip, #20
-.L1153:
-	.loc 2 1870 0 discriminator 1
+.L1160:
 	uxth	r2, r3
-.LVL978:
 	cmp	r6, r2
-	bhi	.L1155
-	.loc 2 1877 0
+	bhi	.L1162
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.LVL979:
-	.loc 2 1878 0
 	movs	r3, #0
-.LVL980:
-.L1245:
+.L1252:
 	str	r3, [sp, #28]
-	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldrh	r3, [sp, #28]
 	cmp	r10, r3
-	bhi	.L1185
-	.loc 2 2031 0 is_stmt 1
+	bhi	.L1192
 	adds	r5, r5, #1
-	.loc 2 2032 0
-	ldrh	r3, [r4, #78]
-	.loc 2 2031 0
+	ldrh	r3, [r4, #102]
 	uxth	r5, r5
-	.loc 2 2032 0
 	cmp	r3, r5
-	bne	.L1152
-	.loc 2 2035 0
-	ldrh	r2, [r4, #8]
-.LVL981:
-	.loc 2 2037 0
+	bne	.L1159
+	ldrh	r2, [r4, #32]
 	movw	r0, #65535
-.LVL982:
-	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 2033 0
 	strh	r5, [fp, #2]	@ movhi
-	.loc 2 2034 0
 	strh	r3, [fp, #4]	@ movhi
-.L1186:
-	.loc 2 2035 0 discriminator 1
+.L1193:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1241
-	.loc 2 2036 0
+	bcs	.L1248
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
-	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 2036 0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	.loc 2 2037 0
-	bne	.L1246
+	bne	.L1253
 	mov	r3, r1
-	b	.L1186
-.LVL983:
-.L1155:
-	.loc 2 1871 0
+	b	.L1193
+.L1162:
 	ldrh	r2, [r1], #2
-	.loc 2 1872 0
 	cmp	r2, r7
-	beq	.L1154
-	.loc 2 1873 0
+	beq	.L1161
 	mla	lr, ip, r10, r0
-	.loc 2 1874 0
 	add	r10, r10, #1
-	.loc 2 1873 0
 	orr	r2, r5, r2, lsl #10
-	.loc 2 1874 0
 	uxth	r10, r10
-	.loc 2 1873 0
 	str	r2, [lr, #4]
-.L1154:
+.L1161:
 	adds	r3, r3, #1
-	b	.L1153
-.L1249:
+	b	.L1160
+.L1256:
 	.align	2
-.L1248:
+.L1255:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LANCHOR0+3864
-.LVL984:
-.L1185:
+	.word	.LANCHOR0+3904
+.L1192:
 	ldr	r3, [sp, #28]
 	movs	r7, #20
-	.loc 2 1879 0
-	ldr	r9, [r4, #3792]
-.LVL985:
+	ldr	r9, [r4, #3832]
 	muls	r7, r3, r7
 	add	r8, r9, r7
 	ldr	r6, [r8, #4]
-.LVL986:
-	.loc 2 1880 0
 	ubfx	r0, r6, #10, #16
-.LVL987:
-	.loc 2 1879 0
 	str	r6, [sp, #44]
-	.loc 2 1880 0
 	bl	P2V_plane
-.LVL988:
-	.loc 2 1882 0
 	ldr	r3, [sp, #8]
-.LVL989:
 	cmp	r5, r3
-	bcc	.L1157
-	.loc 2 1882 0 is_stmt 0 discriminator 1
-	bne	.L1158
-	.loc 2 1883 0 is_stmt 1
+	bcc	.L1164
+	bne	.L1165
 	ldr	r3, [sp, #24]
-.LVL990:
 	cmp	r3, r0
-	bhi	.L1157
-.LVL991:
-.L1158:
-	.loc 2 1886 0
+	bhi	.L1164
+.L1165:
 	ldr	r3, [sp, #16]
-.LVL992:
 	cmp	r5, r3
-	bne	.L1159
-	.loc 2 1886 0 is_stmt 0 discriminator 1
+	bne	.L1166
 	ldr	r3, [sp, #12]
-.LVL993:
 	cmp	r3, r0
-	beq	.L1160
-.LVL994:
-.L1159:
-	.loc 2 1890 0 is_stmt 1
+	beq	.L1167
+.L1166:
 	ldr	r3, [r9, r7]
-.LVL995:
 	adds	r3, r3, #1
-	beq	.L1161
-	.loc 2 1891 0
+	beq	.L1168
 	ldr	r8, [r8, #12]
-	.loc 2 1892 0
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1162
-.LVL996:
-.L1169:
-.LBB474:
-	.loc 2 1925 0
+	beq	.L1169
+.L1176:
 	ldrh	r0, [fp]
-.LVL997:
-.L1244:
-.LBE474:
-	.loc 2 2009 0
+.L1251:
 	bl	decrement_vpc_count
-.LVL998:
-.L1157:
+.L1164:
 	ldr	r3, [sp, #28]
-.LVL999:
 	adds	r3, r3, #1
-	b	.L1245
-.LVL1000:
-.L1162:
-	.loc 2 1898 0
+	b	.L1252
+.L1169:
 	ldr	r3, [r8, #4]
-.LVL1001:
-	.loc 2 1899 0
 	adds	r6, r3, #1
-	.loc 2 1898 0
 	str	r3, [sp, #4]
-	.loc 2 1899 0
-	beq	.L1163
-	.loc 2 1900 0 discriminator 1
-	ldr	r1, [r4, #2520]
+	beq	.L1170
+	ldr	r1, [r4, #2544]
 	mov	r0, r3
-.LVL1002:
 	bl	ftl_cmp_data_ver
-.LVL1003:
-	.loc 2 1899 0 discriminator 1
-	cbz	r0, .L1163
-	.loc 2 1902 0
+	cbz	r0, .L1170
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-.LVL1004:
-	str	r3, [r4, #2520]
-.LVL1005:
-.L1163:
-	.loc 2 1905 0
+	str	r3, [r4, #2544]
+.L1170:
 	ldrh	r2, [r8]
 	movw	r3, #61589
-.LVL1006:
 	cmp	r2, r3
-	beq	.L1164
-	.loc 2 1905 0 is_stmt 0 discriminator 1
+	beq	.L1171
 	movw	r2, #1905
-	ldr	r1, .L1250
-	ldr	r0, .L1250+4
-.LVL1007:
+	ldr	r1, .L1257
+	ldr	r0, .L1257+4
 	bl	printk
-.LVL1008:
-.L1164:
-	.loc 2 1906 0 is_stmt 1
+.L1171:
 	ldr	r6, [r8, #8]
-.LVL1009:
-	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1907 0
 	ldr	r3, [r8, #12]
-	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r6
-.LVL1010:
-	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1908 0
 	bl	log2phys
-.LVL1011:
-	.loc 2 1909 0
-	ldr	r1, [r4, #3964]
+	ldr	r1, [r4, #4004]
 	adds	r0, r1, #1
-	beq	.L1165
-	.loc 2 1910 0 discriminator 1
+	beq	.L1172
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
-.LVL1012:
-	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1165
-.LBB475:
-	.loc 2 1914 0
+	beq	.L1172
 	ldr	r3, [sp, #36]
 	adds	r2, r3, #1
-	beq	.L1166
-	.loc 2 1915 0
-	ldr	r0, [r4, #3792]
-	.loc 2 1917 0
+	beq	.L1173
+	ldr	r0, [r4, #3832]
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1915 0
 	add	r0, r0, r7
-	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1915 0
 	ldr	r8, [r0, #12]
-	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1013:
-	.loc 2 1930 0
-	ldr	r2, [r4, #3792]
+	ldr	r2, [r4, #3832]
 	ldr	r1, [r2, r7]
 	adds	r3, r2, r7
 	adds	r1, r1, #1
-	bne	.L1167
-.LVL1014:
-.L1168:
-	.loc 2 1962 0
+	bne	.L1174
+.L1175:
 	mov	r3, #-1
-.LVL1015:
-	.loc 2 1963 0
 	ldrh	r0, [fp]
-	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1016:
-.L1176:
-.LBE475:
-	.loc 2 2003 0
+.L1183:
 	ldr	r0, [sp, #36]
 	adds	r1, r0, #1
-	beq	.L1157
-.L1189:
-	.loc 2 2005 0
+	beq	.L1164
+.L1196:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1017:
-	.loc 2 2006 0
-	ldrh	r3, [r4, #16]
-	.loc 2 2005 0
+	ldrh	r3, [r4, #40]
 	mov	r6, r0
-.LVL1018:
-	.loc 2 2006 0
 	cmp	r3, r0
-	bhi	.L1181
-	.loc 2 2006 0 is_stmt 0 discriminator 1
+	bhi	.L1188
 	movw	r2, #2006
-	ldr	r1, .L1250
-	ldr	r0, .L1250+4
+	ldr	r1, .L1257
+	ldr	r0, .L1257+4
 	bl	printk
-.LVL1019:
-.L1181:
-	.loc 2 2007 0 is_stmt 1
-	ldr	r3, [r4, #2300]
+.L1188:
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1182
-	.loc 2 2009 0
+	beq	.L1189
 	mov	r0, r6
-	b	.L1244
-.LVL1020:
-.L1166:
-.LBB476:
-	.loc 2 1921 0
+	b	.L1251
+.L1173:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1169
-	.loc 2 1922 0
+	bne	.L1176
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-.LVL1021:
-	b	.L1169
-.L1167:
-	.loc 2 1930 0 discriminator 1
+	b	.L1176
+.L1174:
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1168
-	.loc 2 1918 0 discriminator 2
+	bne	.L1175
 	ldr	r9, [r8, #4]
-.LVL1022:
-	.loc 2 1931 0 discriminator 2
-	ldr	r0, [r4, #3964]
+	ldr	r0, [r4, #4004]
 	mov	r1, r9
 	bl	ftl_cmp_data_ver
-.LVL1023:
-	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1168
-	.loc 2 1932 0
+	beq	.L1175
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1171
-.LVL1024:
-.L1174:
-	.loc 2 1958 0
+	bne	.L1178
+.L1181:
 	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-.LVL1025:
-	b	.L1168
-.LVL1026:
-.L1171:
-	.loc 2 1935 0
+	b	.L1175
+.L1178:
 	ldr	r0, [sp, #36]
-.LVL1027:
 	cmp	r1, r0
-	beq	.L1168
-	.loc 2 1936 0
+	beq	.L1175
 	adds	r0, r1, #1
-	beq	.L1172
-	.loc 2 1938 0
+	beq	.L1179
 	str	r1, [r3, #4]
-	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1937 0
 	ldr	r8, [r3, #12]
-	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1028:
-.L1173:
-	.loc 2 1944 0
-	ldr	r3, [r4, #3792]
+.L1180:
+	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1174
-	.loc 2 1945 0
+	beq	.L1181
 	ldr	r3, [r8, #4]
-.LVL1029:
-	.loc 2 1946 0
-	ldr	r0, [r4, #3964]
+	ldr	r0, [r4, #4004]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
-.LVL1030:
 	cmp	r0, #0
-	beq	.L1174
-	.loc 2 1947 0
+	beq	.L1181
 	mov	r1, r3
 	mov	r0, r9
 	bl	ftl_cmp_data_ver
-.LVL1031:
 	cmp	r0, #0
-	beq	.L1168
-	b	.L1174
-.LVL1032:
-.L1172:
-	.loc 2 1941 0
+	beq	.L1175
+	b	.L1181
+.L1179:
 	str	r1, [r2, r7]
-	b	.L1173
-.LVL1033:
-.L1165:
-.LBE476:
-	.loc 2 1964 0
+	b	.L1180
+.L1172:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1176
-	.loc 2 1966 0
+	beq	.L1183
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r6
 	bl	log2phys
-.LVL1034:
-	.loc 2 1967 0
 	ldr	r8, [sp, #40]
 	cmp	r8, #-1
-	beq	.L1176
-	.loc 2 1967 0 is_stmt 0 discriminator 1
+	beq	.L1183
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1179
-	.loc 2 1968 0 is_stmt 1
+	beq	.L1186
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
-.LVL1035:
-	.loc 2 1970 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
-	beq	.L1180
-	.loc 2 1970 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2372]
+	beq	.L1187
+	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
-	beq	.L1180
-	.loc 2 1971 0 is_stmt 1
-	ldrh	r3, [r4, #2420]
+	beq	.L1187
+	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
-	bne	.L1176
-.L1180:
-.LBB477:
-	.loc 2 1976 0
-	ldr	r0, [r4, #3792]
-	.loc 2 1979 0
+	bne	.L1183
+.L1187:
+	ldr	r0, [r4, #3832]
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1978 0
 	str	r8, [r0, #4]
-	.loc 2 1976 0
 	ldr	r7, [r0, #12]
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1036:
-	.loc 2 1982 0
-	ldr	r3, [r4, #3792]
+	ldr	r3, [r4, #3832]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1176
-	.loc 2 1983 0
+	beq	.L1183
 	ldr	r1, [r7, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
-.LVL1037:
 	cmp	r0, #0
-	bne	.L1176
-	.loc 2 1990 0
+	bne	.L1183
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-.LVL1038:
-	b	.L1176
-.LVL1039:
-.L1182:
-.LBE477:
-	.loc 2 2011 0
+	b	.L1183
+.L1189:
 	mov	r1, r6
-	ldr	r0, .L1250+8
+	ldr	r0, .L1257+8
 	bl	printk
-.LVL1040:
-	b	.L1157
-.LVL1041:
-.L1161:
-	.loc 2 2018 0
-	ldr	r3, [r4, #3972]
+	b	.L1164
+.L1168:
+	ldr	r3, [r4, #4012]
 	cmp	r3, #31
-	.loc 2 2019 0
 	itttt	ls
 	addls	r2, r4, r3, lsl #2
-	.loc 2 2020 0
 	addls	r3, r3, #1
-	strls	r3, [r4, #3972]
-	.loc 2 2019 0
-	strls	r6, [r2, #3976]
-	.loc 2 2022 0
+	strls	r3, [r4, #4012]
+	strls	r6, [r2, #4016]
 	ldrh	r0, [fp]
-.LVL1042:
 	bl	decrement_vpc_count
-.LVL1043:
-	.loc 2 2024 0
-	ldr	r3, [r4, #3964]
+	ldr	r3, [r4, #4004]
 	adds	r2, r3, #1
-	bne	.L1184
-	.loc 2 2025 0
+	bne	.L1191
 	ldr	r3, [sp, #4]
-.LVL1044:
-.L1243:
-	.loc 2 2027 0
-	str	r3, [r4, #3964]
-	b	.L1157
-.LVL1045:
-.L1184:
-	.loc 2 2026 0
+.L1250:
+	str	r3, [r4, #4004]
+	b	.L1164
+.L1191:
 	ldr	r2, [sp, #4]
-.LVL1046:
 	cmp	r2, r3
-	bcs	.L1157
-	.loc 2 2027 0
+	bcs	.L1164
 	mov	r3, r2
-.LVL1047:
-	b	.L1243
-.LVL1048:
-.L1160:
-	.loc 2 2051 0
+	b	.L1250
+.L1167:
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-.LVL1049:
-	.loc 2 2053 0
 	mov	r1, r5
-	.loc 2 2052 0
 	strh	r5, [fp, #2]	@ movhi
-	.loc 2 2053 0
 	ldr	r2, [sp, #12]
-	.loc 2 2051 0
 	strb	r3, [fp, #6]
-	b	.L1247
-.LVL1050:
-.L1179:
-	.loc 2 2003 0
+	b	.L1254
+.L1186:
 	mov	r0, r8
-	b	.L1189
-.L1251:
+	b	.L1196
+.L1258:
 	.align	2
-.L1250:
+.L1257:
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LC98
-.LFE231:
+	.word	.LC99
 	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	1
@@ -12913,128 +8536,82 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	.fnstart
-.LFB238:
-	.loc 2 2205 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1051:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI145:
 	.pad #24
 	sub	sp, sp, #24
-.LCFI146:
-	.loc 2 2212 0
-	ldr	r4, .L1263
-	.loc 2 2211 0
+	ldr	r4, .L1270
 	mov	r3, #-1
-	.loc 2 2219 0
 	mov	r8, #0
-	.loc 2 2220 0
 	movw	r1, #61589
-	.loc 2 2211 0
 	str	r3, [sp, #20]
-	.loc 2 2205 0
 	mov	r5, r0
-	.loc 2 2212 0
-	ldr	r2, [r4, #3240]
-	.loc 2 2223 0
+	ldr	r2, [r4, #3280]
 	movs	r7, #7
-	.loc 2 2213 0
-	ldr	r6, [r4, #3244]
-	.loc 2 2212 0
+	ldr	r6, [r4, #3284]
 	str	r2, [sp, #12]
-	.loc 2 2216 0
 	mvn	r2, #2
-	.loc 2 2213 0
 	str	r6, [sp, #16]
-	.loc 2 2216 0
 	str	r2, [r6, #8]
-	.loc 2 2217 0
 	mvn	r2, #1
 	str	r2, [r6, #12]
-	.loc 2 2218 0
 	ldrh	r2, [r0]
-	.loc 2 2219 0
 	strh	r8, [r6]	@ movhi
-	.loc 2 2218 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2220 0
-	ldr	r2, [r4, #3240]
+	ldr	r2, [r4, #3280]
 	str	r1, [r2]
-	.loc 2 2221 0
 	add	r1, r1, #304087040
-	ldr	r2, [r4, #3240]
+	ldr	r2, [r4, #3280]
 	add	r1, r1, #1269760
 	addw	r1, r1, #1507
 	str	r1, [r2, #4]
-.L1253:
-	.loc 2 2223 0
+.L1260:
 	subs	r7, r7, #1
-	beq	.L1255
-.LVL1052:
-	.loc 2 2224 0
+	beq	.L1262
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1254
-.L1255:
-	.loc 2 2234 0
-	ldr	r2, [r4, #2300]
+	cbnz	r3, .L1261
+.L1262:
+	ldr	r2, [r4, #2324]
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2235 0
-	ldrh	r3, [r4, #78]
+	ldrh	r3, [r4, #102]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 2236 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
-	.loc 2 2237 0
 	strh	r3, [r5, #4]	@ movhi
-	.loc 2 2238 0
 	add	sp, sp, #24
-.LCFI147:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1053:
-.L1254:
-.LCFI148:
-	.loc 2 2226 0
+.L1261:
 	mov	r0, r5
 	bl	get_new_active_ppa
-.LVL1054:
 	str	r0, [sp, #8]
-	.loc 2 2227 0
 	adds	r0, r0, #1
-	beq	.L1255
-	.loc 2 2229 0
-	ldr	r3, [r4, #2520]
-	.loc 2 2230 0
+	beq	.L1262
+	ldr	r3, [r4, #2544]
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 2229 0
 	str	r3, [r6, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r8
-	str	r3, [r4, #2520]
-	.loc 2 2230 0
+	str	r3, [r4, #2544]
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1055:
-	.loc 2 2231 0
 	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-.LVL1056:
-	b	.L1253
-.L1264:
+	b	.L1260
+.L1271:
 	.align	2
-.L1263:
+.L1270:
 	.word	.LANCHOR0
-.LFE238:
 	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	1
@@ -13046,263 +8623,170 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
 	.fnstart
-.LFB179:
-	.loc 4 173 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-.LCFI149:
-	.loc 4 196 0
 	movw	r8, #61649
-	.loc 4 180 0
-	ldr	r4, .L1294
-	ldr	r3, [r4, #3240]
-	.loc 4 186 0
-	addw	r7, r4, #3220
-	.loc 4 181 0
-	ldr	r6, [r4, #3244]
-	.loc 4 180 0
-	str	r3, [r4, #3228]
-	.loc 4 181 0
-	str	r6, [r4, #3232]
-	.loc 4 183 0
+	ldr	r4, .L1301
+	ldr	r3, [r4, #3280]
+	addw	r7, r4, #3260
+	ldr	r6, [r4, #3284]
+	str	r3, [r4, #3268]
+	str	r6, [r4, #3272]
 	bl	FtlBbtMemInit
-.LVL1057:
-	.loc 4 184 0
-	ldrh	r5, [r4, #74]
+	ldrh	r5, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1058:
-.L1266:
-	.loc 4 184 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #74]
+.L1273:
+	ldrh	r3, [r4, #98]
 	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1269
-	.loc 4 185 0 is_stmt 1
+	ble	.L1276
 	lsls	r3, r5, #10
-	.loc 4 186 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 185 0
-	str	r3, [r4, #3224]
-	.loc 4 186 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1059:
-	.loc 4 187 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1267
-	.loc 4 188 0
-	ldr	r3, [r4, #3224]
-	.loc 4 189 0
+	bne	.L1274
+	ldr	r3, [r4, #3264]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 188 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3224]
-	.loc 4 189 0
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1060:
-.L1267:
-	.loc 4 191 0
-	ldr	r3, [r4, #3220]
+.L1274:
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1268
-	.loc 4 196 0
+	beq	.L1275
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	bne	.L1268
-	.loc 4 199 0
+	bne	.L1275
 	ldr	r3, [r6, #4]
-	.loc 4 198 0
-	strh	r5, [r4, #128]	@ movhi
-	.loc 4 199 0
-	str	r3, [r4, #136]
-	.loc 4 200 0
+	strh	r5, [r4, #152]	@ movhi
+	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
-	strh	r3, [r4, #132]	@ movhi
-.L1269:
-	.loc 4 216 0
-	ldrh	r3, [r4, #128]
+	strh	r3, [r4, #156]	@ movhi
+.L1276:
+	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1283
-	.loc 4 222 0
-	ldrh	r3, [r4, #132]
+	beq	.L1290
+	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1273
-	.loc 4 224 0
+	beq	.L1280
 	lsls	r3, r3, #10
-	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1294+4
-	.loc 4 224 0
-	str	r3, [r4, #3224]
-	.loc 4 225 0
+	ldr	r0, .L1301+4
+	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.LVL1061:
-	.loc 4 226 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1273
-	.loc 4 229 0
+	beq	.L1280
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1273
-	.loc 4 229 0 is_stmt 0 discriminator 1
+	bne	.L1280
 	ldr	r3, [r6, #4]
-	ldr	r2, [r4, #136]
+	ldr	r2, [r4, #160]
 	cmp	r3, r2
-	bls	.L1273
-	.loc 4 231 0 is_stmt 1
-	ldrh	r2, [r4, #132]
-	.loc 4 232 0
-	str	r3, [r4, #136]
-	.loc 4 233 0
+	bls	.L1280
+	ldrh	r2, [r4, #156]
+	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
-	.loc 4 231 0
-	strh	r2, [r4, #128]	@ movhi
-	.loc 4 233 0
-	strh	r3, [r4, #132]	@ movhi
-.L1273:
-	.loc 4 245 0
-	ldr	r7, .L1294+4
-	.loc 4 238 0
+	strh	r2, [r4, #152]	@ movhi
+	strh	r3, [r4, #156]	@ movhi
+.L1280:
+	ldr	r7, .L1301+4
 	movs	r1, #1
-	ldrh	r0, [r4, #128]
-	.loc 4 247 0
+	ldrh	r0, [r4, #152]
 	movw	r8, #61649
-	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1062:
 	sxth	r5, r0
-.LVL1063:
-	.loc 4 239 0
 	adds	r0, r0, #1
-	strh	r0, [r4, #130]	@ movhi
-.L1275:
-	.loc 4 241 0
+	strh	r0, [r4, #154]	@ movhi
+.L1282:
 	cmp	r5, #0
-	bge	.L1278
-	.loc 4 254 0
+	bge	.L1285
 	movs	r2, #254
-	ldr	r1, .L1294+8
-	ldr	r0, .L1294+12
+	ldr	r1, .L1301+8
+	ldr	r0, .L1301+12
 	bl	printk
-.LVL1064:
-.L1277:
-	.loc 4 255 0
+.L1284:
 	ldrh	r3, [r6, #10]
-	.loc 4 257 0
 	ldrh	r0, [r6, #12]
-	.loc 4 255 0
-	strh	r3, [r4, #134]	@ movhi
-	.loc 4 257 0
+	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1280
-	.loc 4 259 0
-	ldr	r2, [r4, #4]
+	beq	.L1287
+	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1280
-	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #18]
+	beq	.L1287
+	ldrh	r3, [r4, #42]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1280
-	.loc 4 261 0 is_stmt 1
+	bcs	.L1287
 	cmp	r0, r3
-	bcs	.L1280
-	.loc 4 263 0
+	bcs	.L1287
 	bl	FtlSysBlkNumInit
-.LVL1065:
-.L1280:
-	ldr	r6, .L1294+16
-	.loc 4 173 0 discriminator 1
+.L1287:
+	ldr	r6, .L1301+16
 	movs	r5, #0
-.LVL1066:
-.L1281:
-	.loc 4 268 0 discriminator 1
-	ldrh	r3, [r4, #30]
+.L1288:
+	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1282
-	.loc 4 275 0
+	bcc	.L1289
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1067:
-.L1268:
-	.loc 4 184 0 discriminator 2
+.L1275:
 	subs	r5, r5, #1
-.LVL1068:
 	uxth	r5, r5
-.LVL1069:
-	b	.L1266
-.LVL1070:
-.L1278:
-	.loc 4 243 0
-	ldrh	r3, [r4, #128]
-	.loc 4 245 0
+	b	.L1273
+.L1285:
+	ldrh	r3, [r4, #152]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	.loc 4 243 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3224]
-	.loc 4 244 0
-	ldr	r3, [r4, #3240]
-	str	r3, [r4, #3228]
-	.loc 4 245 0
+	str	r3, [r4, #3264]
+	ldr	r3, [r4, #3280]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.LVL1071:
-	.loc 4 247 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1276
-	.loc 4 247 0 is_stmt 0 discriminator 1
+	beq	.L1283
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	beq	.L1277
-.L1276:
+	beq	.L1284
+.L1283:
 	subs	r5, r5, #1
-.LVL1072:
 	sxth	r5, r5
-.LVL1073:
-	b	.L1275
-.LVL1074:
-.L1282:
-	.loc 4 269 0 is_stmt 1 discriminator 3
-	ldrh	r2, [r4, #3860]
-	ldr	r1, [r4, #3228]
+	b	.L1282
+.L1289:
+	ldrh	r2, [r4, #3900]
+	ldr	r1, [r4, #3268]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
-	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1075:
-	b	.L1281
-.LVL1076:
-.L1283:
-	.loc 4 218 0
+	b	.L1288
+.L1290:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1077:
-.L1295:
+.L1302:
 	.align	2
-.L1294:
+.L1301:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3220
+	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+443
 	.word	.LC1
-	.word	.LANCHOR0+152
-.LFE179:
+	.word	.LANCHOR0+176
 	.fnend
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	1
@@ -13314,312 +8798,181 @@ FtlLoadBbt:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	.fnstart
-.LFB181:
-	.loc 4 317 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI150:
-	.loc 4 327 0
 	mov	r8, #0
-.LVL1078:
-	ldr	r9, .L1315+4
-	.loc 4 325 0
+	ldr	r9, .L1322+4
 	bl	FtlBbtMemInit
-.LVL1079:
-	.loc 4 327 0
-	sub	r5, r9, #156
+	sub	r5, r9, #180
 	sub	r10, r9, #18
 	mov	r4, r5
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1080:
-.L1297:
-	.loc 4 327 0 discriminator 1
-	ldrh	r3, [r5, #30]
+.L1304:
+	ldrh	r3, [r5, #54]
 	cmp	r8, r3
-	bcc	.L1303
+	bcc	.L1310
 	movs	r5, #0
-.L1304:
-	.loc 4 381 0 discriminator 1
-	ldrh	r3, [r4, #90]
+.L1311:
+	ldrh	r3, [r4, #114]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1305
-	.loc 4 387 0
-	ldrh	r5, [r4, #140]
-	.loc 4 396 0
+	bhi	.L1312
+	ldrh	r5, [r4, #164]
 	movw	r6, #65535
-	.loc 4 387 0
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1306:
-	.loc 4 387 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #140]
+.L1313:
+	ldrh	r3, [r4, #164]
 	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1310
-	.loc 4 389 0 is_stmt 1
+	ble	.L1317
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1081:
 	cmp	r0, #1
-	beq	.L1307
-	.loc 4 391 0
+	beq	.L1314
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1082:
 	cmp	r0, #0
-	beq	.L1308
-	.loc 4 393 0
+	beq	.L1315
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1083:
-.L1307:
-	.loc 4 387 0 discriminator 2
+.L1314:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1306
-.L1303:
-	.loc 4 331 0
+	b	.L1313
+.L1310:
 	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
-	.loc 4 328 0
-	ldr	r0, [r5, #3240]
-	.loc 4 329 0
-	ldr	fp, [r5, #3244]
-	.loc 4 331 0
+	ldr	r0, [r5, #3280]
+	ldr	fp, [r5, #3284]
 	cmp	r3, r2
-	.loc 4 328 0
-	str	r0, [r5, #3228]
-	.loc 4 329 0
-	str	fp, [r5, #3232]
-	.loc 4 331 0
-	beq	.L1298
-	.loc 4 333 0
-	ldrh	r7, [r5, #74]
-.LVL1084:
-	.loc 4 335 0
+	str	r0, [r5, #3268]
+	str	fp, [r5, #3272]
+	beq	.L1305
+	ldrh	r7, [r5, #98]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1315
-	.loc 4 333 0
+	ldr	r0, .L1322
 	mla	r7, r8, r7, r3
-.LVL1085:
-	.loc 4 334 0
 	lsls	r3, r7, #10
-	str	r3, [r5, #3224]
-	.loc 4 335 0
+	str	r3, [r5, #3264]
 	bl	FlashReadPages
-.LVL1086:
-	.loc 4 336 0
-	ldrh	r2, [r5, #74]
-	ldr	r1, [r5, #3228]
+	ldrh	r2, [r5, #98]
+	ldr	r1, [r5, #3268]
 	ldr	r0, [r9]
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1087:
-.L1299:
-	.loc 4 376 0 discriminator 2
+.L1306:
 	uxth	r0, r7
-	.loc 4 327 0 discriminator 2
 	add	r8, r8, #1
 	add	r9, r9, #4
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1088:
-	b	.L1297
-.L1298:
-	.loc 4 340 0
+	b	.L1304
+.L1305:
 	mov	r1, r8
 	bl	FlashGetBadBlockList
-.LVL1089:
-	.loc 4 341 0
 	ldr	r1, [r9]
-	ldr	r0, [r5, #3228]
+	ldr	r0, [r5, #3268]
 	bl	FtlBbt2Bitmap
-.LVL1090:
-	.loc 4 343 0
-	ldrh	r6, [r5, #74]
-.L1301:
-	.loc 4 347 0
+	ldrh	r6, [r5, #98]
+.L1308:
 	subs	r6, r6, #1
 	uxth	r6, r6
-.L1300:
-	.loc 4 345 0
-	ldrh	r0, [r4, #74]
+.L1307:
+	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1091:
 	cmp	r0, #1
-	beq	.L1301
-.LBB488:
-.LBB489:
-.LBB490:
-	.loc 1 202 0
+	beq	.L1308
 	movs	r1, #16
-	ldr	r0, [r4, #3244]
-.LBE490:
-.LBE489:
-.LBE488:
-	.loc 4 349 0
+	ldr	r0, [r4, #3284]
 	strh	r6, [r10]	@ movhi
-.LBB493:
-.LBB492:
-.LBB491:
-	.loc 1 202 0
 	bl	__memzero
-.LVL1092:
-.LBE491:
-.LBE492:
-.LBE493:
-.LBB494:
-.LBB495:
-.LBB496:
 	mov	r1, #4096
-	ldr	r0, [r4, #3240]
+	ldr	r0, [r4, #3280]
 	bl	__memzero
-.LVL1093:
-.LBE496:
-.LBE495:
-.LBE494:
-	.loc 4 352 0
 	movw	r3, #61664
 	strh	r3, [fp]	@ movhi
-	.loc 4 353 0
 	movs	r3, #0
 	str	r3, [fp, #4]
-	.loc 4 354 0
 	ldrh	r3, [r10]
-	.loc 4 355 0
-	ldrh	r7, [r4, #74]
-.LVL1094:
-	.loc 4 357 0
-	ldrh	r2, [r4, #3860]
-	.loc 4 354 0
+	ldrh	r7, [r4, #98]
+	ldrh	r2, [r4, #3900]
 	strh	r3, [fp, #2]	@ movhi
-	.loc 4 355 0
 	ldrh	r3, [r10]
-	.loc 4 357 0
 	ldr	r1, [r9]
 	lsls	r2, r2, #2
-	ldr	r0, [r4, #3228]
-	.loc 4 355 0
+	ldr	r0, [r4, #3268]
 	mla	r7, r8, r7, r3
-.LVL1095:
-	.loc 4 356 0
 	lsls	r3, r7, #10
-	str	r3, [r4, #3224]
-	.loc 4 357 0
+	str	r3, [r4, #3264]
 	bl	ftl_memcpy
-.LVL1096:
-	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1315
+	ldr	r0, .L1322
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1097:
-	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1315
+	ldr	r0, .L1322
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1098:
-	.loc 4 360 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1299
-	.loc 4 362 0
+	bne	.L1306
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-.LVL1099:
-	.loc 4 363 0
-	b	.L1300
-.L1305:
-	.loc 4 383 0 discriminator 3
+	b	.L1307
+.L1312:
 	bl	FtlBbmMapBadBlock
-.LVL1100:
-	b	.L1304
-.L1308:
-	.loc 4 396 0
-	ldrh	r3, [r4, #128]
+	b	.L1311
+.L1315:
+	ldrh	r3, [r4, #152]
 	cmp	r3, r6
-	bne	.L1309
-	.loc 4 398 0
-	strh	r5, [r4, #128]	@ movhi
-	b	.L1307
-.L1309:
-	.loc 4 402 0
-	strh	r5, [r4, #132]	@ movhi
-.L1310:
-	.loc 4 414 0
-	ldrh	r3, [r4, #128]
-	.loc 4 411 0
+	bne	.L1316
+	strh	r5, [r4, #152]	@ movhi
+	b	.L1314
+.L1316:
+	strh	r5, [r4, #156]	@ movhi
+.L1317:
+	ldrh	r3, [r4, #152]
 	movs	r5, #0
-	.loc 4 414 0
-	ldr	r0, [r4, #3760]
-	.loc 4 416 0
+	ldr	r0, [r4, #3800]
 	movs	r1, #1
-	.loc 4 413 0
-	str	r5, [r4, #136]
-	.loc 4 416 0
+	str	r5, [r4, #160]
 	movs	r2, #2
-	.loc 4 411 0
-	strh	r5, [r4, #130]	@ movhi
-	.loc 4 414 0
+	strh	r5, [r4, #154]	@ movhi
 	lsls	r3, r3, #10
 	str	r3, [r0, #4]
-	.loc 4 415 0
-	ldrh	r3, [r4, #132]
+	ldrh	r3, [r4, #156]
 	lsls	r3, r3, #10
 	str	r3, [r0, #24]
-	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1101:
-	.loc 4 418 0
-	ldrh	r0, [r4, #128]
+	ldrh	r0, [r4, #152]
 	bl	FtlBbmMapBadBlock
-.LVL1102:
-	.loc 4 419 0
-	ldrh	r0, [r4, #132]
+	ldrh	r0, [r4, #156]
 	bl	FtlBbmMapBadBlock
-.LVL1103:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1104:
-	.loc 4 422 0
-	ldr	r3, [r4, #136]
-	.loc 4 425 0
-	ldrh	r2, [r4, #132]
-	.loc 4 426 0
-	strh	r5, [r4, #130]	@ movhi
-	.loc 4 422 0
+	ldr	r3, [r4, #160]
+	ldrh	r2, [r4, #156]
+	strh	r5, [r4, #154]	@ movhi
 	adds	r3, r3, #1
-	str	r3, [r4, #136]
-	.loc 4 424 0
-	ldrh	r3, [r4, #128]
-	.loc 4 425 0
-	strh	r2, [r4, #128]	@ movhi
-	.loc 4 427 0
-	strh	r3, [r4, #132]	@ movhi
-	.loc 4 429 0
+	str	r3, [r4, #160]
+	ldrh	r3, [r4, #152]
+	strh	r2, [r4, #152]	@ movhi
+	strh	r3, [r4, #156]	@ movhi
 	bl	FtlBbmTblFlush
-.LVL1105:
-	.loc 4 432 0
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1106:
-.L1316:
+.L1323:
 	.align	2
-.L1315:
-	.word	.LANCHOR0+3220
-	.word	.LANCHOR0+156
-.LFE181:
+.L1322:
+	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+180
 	.fnend
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.align	1
@@ -13631,162 +8984,97 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 	.fnstart
-.LFB213:
-	.loc 2 835 0
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1107:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI151:
 	mov	r10, r2
-	.loc 2 843 0
-	ldr	r4, .L1329
+	ldr	r4, .L1336
 	adds	r2, r0, r1
-.LVL1108:
-	.loc 2 835 0
 	.pad #108
 	sub	sp, sp, #108
-.LCFI152:
-	.loc 2 835 0
 	mov	r8, r0
 	mov	r6, r1
-	.loc 2 843 0
-	ldrh	r3, [r4, #72]
+	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1325
-	.loc 2 840 0
-	ldrh	r7, [r4, #84]
+	bhi	.L1332
+	ldrh	r7, [r4, #108]
 	mov	r9, #0
 	lsr	r7, r0, r7
-.LVL1109:
 	lsl	fp, r7, #2
-.LVL1110:
-.L1319:
-	.loc 2 846 0
-	cbnz	r6, .L1324
-.L1317:
-	.loc 2 869 0
+.L1326:
+	cbnz	r6, .L1331
+.L1324:
 	mov	r0, r9
 	add	sp, sp, #108
-.LCFI153:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1111:
-.L1324:
-.LCFI154:
-	.loc 2 847 0
-	ldr	r3, [r4, #3844]
-	.loc 2 848 0
+.L1331:
+	ldr	r3, [r4, #3884]
 	mov	r0, r8
-	.loc 2 847 0
 	ldr	r2, [r3, fp]
-.LVL1112:
-	.loc 2 848 0
-	ldrh	r3, [r4, #34]
-	.loc 2 847 0
+	ldrh	r3, [r4, #58]
 	str	r2, [sp, #12]
-	.loc 2 848 0
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1113:
-	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 850 0
 	ldr	r2, [sp, #12]
-.LVL1114:
-	.loc 2 848 0
 	str	r1, [sp, #4]
-	.loc 2 849 0
 	subs	r5, r3, r1
-.LVL1115:
 	uxth	r5, r5
-.LVL1116:
-	.loc 2 850 0
 	cmp	r6, r5
-	.loc 2 851 0
 	it	cc
 	uxthcc	r5, r6
-	.loc 2 852 0
-	cbz	r2, .L1321
-	.loc 2 852 0 is_stmt 0 discriminator 1
+	cbz	r2, .L1328
 	cmp	r5, r3
-	beq	.L1321
-	.loc 2 854 0 is_stmt 1
-	ldr	r3, [r4, #3808]
-	.loc 2 856 0
+	beq	.L1328
+	ldr	r3, [r4, #3848]
 	add	r0, sp, #20
-	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 856 0
 	movs	r2, #1
-.LVL1117:
 	mov	r1, r2
-	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1118:
-.L1322:
-	.loc 2 860 0
+.L1329:
 	lsls	r3, r5, #9
-	ldr	r0, [r4, #3808]
+	ldr	r0, [r4, #3848]
 	mov	r1, r10
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #4]
-	.loc 2 864 0
 	subs	r6, r6, r5
-	.loc 2 865 0
 	add	r8, r8, r5
 	add	fp, fp, #4
-	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1119:
-	.loc 2 861 0
 	mov	r1, r7
-	ldr	r2, [r4, #3808]
-	ldr	r0, .L1329+4
-	.loc 2 863 0
+	ldr	r2, [r4, #3848]
+	ldr	r0, .L1336+4
 	adds	r7, r7, #1
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1120:
-	.loc 2 866 0
 	ldr	r3, [sp, #8]
-	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r9, #-1
-	.loc 2 866 0
 	add	r10, r10, r3
-	b	.L1319
-.LVL1121:
-.L1321:
-	.loc 2 858 0
-	ldrh	r2, [r4, #86]
-.LVL1122:
+	b	.L1326
+.L1328:
+	ldrh	r2, [r4, #110]
 	movs	r1, #0
-	ldr	r0, [r4, #3808]
+	ldr	r0, [r4, #3848]
 	bl	ftl_memset
-.LVL1123:
-	b	.L1322
-.LVL1124:
-.L1325:
-	.loc 2 844 0
+	b	.L1329
+.L1332:
 	mov	r9, #-1
-	b	.L1317
-.L1330:
+	b	.L1324
+.L1337:
 	.align	2
-.L1329:
+.L1336:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3908
-.LFE213:
+	.word	.LANCHOR0+3948
 	.fnend
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	1
@@ -13798,77 +9086,52 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 	.fnstart
-.LFB236:
-	.loc 2 2159 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2160 0
-	ldr	r2, .L1333
-	ldr	r3, .L1333+4
-	ldr	r1, [r2, #2612]
+	ldr	r2, .L1340
+	ldr	r3, .L1340+4
+	ldr	r1, [r2, #2636]
 	cmp	r1, r3
-	bne	.L1331
-.LBB499:
-.LBB500:
-	.loc 2 2161 0
-	ldr	r3, .L1333+8
-	.loc 2 2174 0
-	addw	r2, r2, #2612
+	bne	.L1338
+	ldr	r3, .L1340+8
+	addw	r2, r2, #2636
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2162 0
 	ldr	r3, [r2, #-104]
 	str	r3, [r2, #88]
-	.loc 2 2163 0
 	ldr	r3, [r2, #-100]
 	str	r3, [r2, #92]
-	.loc 2 2164 0
 	ldr	r3, [r2, #-108]
 	str	r3, [r2, #8]
-	.loc 2 2165 0
 	ldr	r3, [r2, #-120]
 	str	r3, [r2, #12]
-	.loc 2 2166 0
 	ldr	r3, [r2, #-128]
 	str	r3, [r2, #16]
-	.loc 2 2167 0
 	ldr	r3, [r2, #-112]
 	str	r3, [r2, #20]
-	.loc 2 2168 0
 	ldr	r3, [r2, #-84]
 	str	r3, [r2, #28]
-	.loc 2 2169 0
 	ldr	r3, [r2, #-76]
 	str	r3, [r2, #32]
-	.loc 2 2170 0
 	ldr	r3, [r2, #-124]
 	str	r3, [r2, #36]
-	.loc 2 2171 0
 	ldr	r3, [r2, #-116]
 	str	r3, [r2, #40]
-	.loc 2 2172 0
 	ldr	r3, [r2, #-72]
 	str	r3, [r2, #44]
-	.loc 2 2173 0
 	ldr	r3, [r2, #-68]
 	str	r3, [r2, #48]
-	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1125:
-.L1331:
+.L1338:
 	bx	lr
-.L1334:
+.L1341:
 	.align	2
-.L1333:
+.L1340:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
-.LBE500:
-.LBE499:
-.LFE236:
 	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	1
@@ -13880,90 +9143,72 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 	.fnstart
-.LFB215:
-	.loc 2 910 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1126:
-	.loc 2 913 0
-	ldr	r2, .L1340
-	.loc 2 910 0
+	ldr	r2, .L1347
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI155:
-	.loc 2 913 0
-	ldrh	r3, [r2, #-240]
+	ldrh	r3, [r2, #-200]
 	cmp	r3, #31
-	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 911 0
 	movhi	r2, #32
-.LVL1127:
-	.loc 2 914 0
-	strhls	r3, [r2, #-240]	@ movhi
-.LVL1128:
-	.loc 2 915 0
+	strhls	r3, [r2, #-200]	@ movhi
 	movls	r2, #1
-.LVL1129:
-	ldr	r3, .L1340+4
-	.loc 2 917 0
-	cbnz	r0, .L1337
-	.loc 2 917 0 is_stmt 0 discriminator 1
-	ldr	r1, [r3, #3820]
+	ldr	r3, .L1347+4
+	cbnz	r0, .L1344
+	ldr	r1, [r3, #3860]
 	ldr	r0, [r1, #20]
-.LVL1130:
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
-.LVL1131:
 	cmp	r1, r2
-	bcc	.L1338
-.LVL1132:
-.L1337:
-	.loc 2 919 0 is_stmt 1
-	ldr	r2, [r3, #3820]
-.LVL1133:
-	.loc 2 924 0
+	bcc	.L1345
+.L1344:
+	ldr	r2, [r3, #3860]
 	movs	r0, #64
-.LVL1134:
-	.loc 2 919 0
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	.loc 2 920 0
-	ldr	r1, .L1340+8
+	ldr	r1, .L1347+8
 	str	r1, [r2]
-	.loc 2 921 0
-	ldrh	r1, [r3, #3812]
-	ldr	r2, [r3, #3820]
+	ldrh	r1, [r3, #3852]
+	ldr	r2, [r3, #3860]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1135:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1136:
-.L1338:
-	.loc 2 927 0
+.L1345:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1341:
+.L1348:
 	.align	2
-.L1340:
+.L1347:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
-.LFE215:
 	.fnend
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.align	1
+	.global	sftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartWrite
+	.fnend
+	.size	sftl_vendor_write, .-sftl_vendor_write
+	.align	1
 	.global	FtlVendorPartRead
 	.syntax unified
 	.thumb
@@ -13972,147 +9217,86 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 	.fnstart
-.LFB214:
-	.loc 2 872 0
 	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1137:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI156:
 	mov	r10, r2
-	.loc 2 881 0
-	ldr	r5, .L1351
+	ldr	r5, .L1359
 	adds	r2, r0, r1
-.LVL1138:
-	.loc 2 872 0
 	.pad #100
 	sub	sp, sp, #100
-.LCFI157:
-	.loc 2 872 0
 	mov	r8, r0
 	mov	r7, r1
-	.loc 2 881 0
-	ldrh	r3, [r5, #72]
+	ldrh	r3, [r5, #96]
 	cmp	r2, r3
-	bhi	.L1350
-	.loc 2 877 0
-	ldrh	r6, [r5, #84]
+	bhi	.L1358
+	ldrh	r6, [r5, #108]
 	mov	r9, #0
 	lsr	r6, r0, r6
-.LVL1139:
 	lsls	r6, r6, #2
-.LVL1140:
-.L1344:
-	.loc 2 883 0
-	cbnz	r7, .L1349
-.L1342:
-	.loc 2 906 0
+.L1352:
+	cbnz	r7, .L1357
+.L1350:
 	mov	r0, r9
 	add	sp, sp, #100
-.LCFI158:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1141:
-.L1349:
-.LCFI159:
-	.loc 2 884 0
-	ldr	r3, [r5, #3844]
-	.loc 2 885 0
+.L1357:
+	ldr	r3, [r5, #3884]
 	mov	r0, r8
-	ldrh	r4, [r5, #34]
-.LVL1142:
-	.loc 2 884 0
+	ldrh	r4, [r5, #58]
 	ldr	r3, [r3, r6]
-.LVL1143:
-	.loc 2 885 0
 	mov	r1, r4
-	.loc 2 884 0
 	str	r3, [sp, #4]
-	.loc 2 885 0
 	bl	__aeabi_uidivmod
-.LVL1144:
-	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 887 0
 	ldr	r3, [sp, #4]
-.LVL1145:
-	.loc 2 886 0
 	uxth	r4, r4
-.LVL1146:
-	.loc 2 885 0
 	str	r1, [sp]
-	.loc 2 887 0
 	cmp	r7, r4
-	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r7
 	lsl	fp, r4, #9
-	.loc 2 889 0
-	cbz	r3, .L1346
-	.loc 2 890 0
+	cbz	r3, .L1354
 	str	r3, [sp, #16]
-	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 891 0
-	ldr	r3, [r5, #3808]
-.LVL1147:
-	.loc 2 893 0
+	ldr	r3, [r5, #3848]
 	mov	r1, r2
 	add	r0, sp, #12
-	.loc 2 891 0
 	str	r3, [sp, #20]
-	.loc 2 892 0
 	add	r3, sp, #32
 	str	r3, [sp, #24]
-	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1148:
-	.loc 2 894 0
 	ldr	r3, [sp, #12]
-	.loc 2 896 0
 	mov	r2, fp
-	ldr	r1, [r5, #3808]
+	ldr	r1, [r5, #3848]
 	mov	r0, r10
-	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 896 0
 	ldr	r3, [sp]
-	.loc 2 895 0
 	it	eq
 	moveq	r9, #-1
-	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1149:
-.L1348:
-	.loc 2 901 0
+.L1356:
 	subs	r7, r7, r4
-	.loc 2 902 0
 	add	r8, r8, r4
-	.loc 2 903 0
 	add	r10, r10, fp
 	adds	r6, r6, #4
-	b	.L1344
-.LVL1150:
-.L1346:
-	.loc 2 898 0
+	b	.L1352
+.L1354:
 	mov	r2, fp
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-.LVL1151:
-	b	.L1348
-.LVL1152:
-.L1350:
-	.loc 2 882 0
+	b	.L1356
+.L1358:
 	mov	r9, #-1
-	b	.L1342
-.L1352:
+	b	.L1350
+.L1360:
 	.align	2
-.L1351:
+.L1359:
 	.word	.LANCHOR0
-.LFE214:
 	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	1
@@ -14124,54 +9308,38 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 	.fnstart
-.LFB221:
-	.loc 2 1383 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI160:
-	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1355
-	ldr	r2, [r4, #3820]
-	ldrh	r1, [r4, #3812]
+	ldr	r4, .L1363
+	ldr	r2, [r4, #3860]
+	ldrh	r1, [r4, #3852]
 	bl	FtlVendorPartRead
-.LVL1153:
-	.loc 2 1385 0
-	ldr	r3, [r4, #3820]
+	ldr	r3, [r4, #3860]
 	ldr	r2, [r3]
-	ldr	r3, .L1355+4
+	ldr	r3, .L1363+4
 	cmp	r2, r3
-	beq	.L1354
-.LBB503:
-.LBB504:
-	.loc 2 1387 0
-	ldr	r1, .L1355+8
-	ldr	r0, .L1355+12
+	beq	.L1362
+	ldr	r1, .L1363+8
+	ldr	r0, .L1363+12
 	bl	printk
-.LVL1154:
-	.loc 2 1388 0
-	ldrh	r2, [r4, #3812]
+	ldrh	r2, [r4, #3852]
 	movs	r1, #0
-	ldr	r0, [r4, #3820]
+	ldr	r0, [r4, #3860]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1155:
-.L1354:
-.LBE504:
-.LBE503:
-	.loc 2 1393 0
+.L1362:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1356:
+.L1364:
 	.align	2
-.L1355:
+.L1363:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC99
+	.word	.LC100
 	.word	.LC71
-.LFE221:
 	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.align	1
@@ -14183,101 +9351,84 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 	.fnstart
-.LFB237:
-	.loc 2 2179 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI161:
-	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1360
+	ldr	r4, .L1368
 	movs	r0, #0
-	.loc 2 2181 0
-	ldr	r5, .L1360+4
-	.loc 2 2180 0
-	addw	r2, r4, #2612
+	ldr	r5, .L1368+4
+	addw	r2, r4, #2636
 	bl	FtlVendorPartRead
-.LVL1156:
-	.loc 2 2181 0
-	ldr	r3, [r4, #2612]
+	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1358
-.LBB510:
-.LBB511:
-.LBB512:
-	.loc 1 202 0
+	beq	.L1366
 	mov	r1, #512
-	addw	r0, r4, #2612
+	addw	r0, r4, #2636
 	bl	__memzero
-.LVL1157:
-.LBE512:
-.LBE511:
-.LBE510:
-	.loc 2 2183 0
-	str	r5, [r4, #2612]
-.L1358:
-	.loc 2 2186 0
-	ldr	r3, [r4, #2612]
+	str	r5, [r4, #2636]
+.L1366:
+	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1359
-	.loc 2 2187 0
-	ldr	r3, [r4, #2700]
-	str	r3, [r4, #2508]
-	.loc 2 2188 0
-	ldr	r3, [r4, #2704]
-	str	r3, [r4, #2512]
-	.loc 2 2189 0
-	ldr	r3, [r4, #2620]
-	str	r3, [r4, #2504]
-	.loc 2 2190 0
-	ldr	r3, [r4, #2624]
-	str	r3, [r4, #2492]
-	.loc 2 2191 0
-	ldr	r3, [r4, #2628]
-	str	r3, [r4, #2484]
-	.loc 2 2192 0
-	ldr	r3, [r4, #2632]
-	str	r3, [r4, #2500]
-	.loc 2 2193 0
-	ldr	r3, [r4, #2640]
-	str	r3, [r4, #2528]
-	.loc 2 2194 0
-	ldr	r3, [r4, #2644]
+	bne	.L1367
+	ldr	r3, [r4, #2724]
+	str	r3, [r4, #2532]
+	ldr	r3, [r4, #2728]
 	str	r3, [r4, #2536]
-	.loc 2 2195 0
+	ldr	r3, [r4, #2644]
+	str	r3, [r4, #2528]
 	ldr	r3, [r4, #2648]
-	str	r3, [r4, #2488]
-	.loc 2 2196 0
+	str	r3, [r4, #2516]
 	ldr	r3, [r4, #2652]
-	str	r3, [r4, #2496]
-	.loc 2 2197 0
+	str	r3, [r4, #2508]
 	ldr	r3, [r4, #2656]
-	str	r3, [r4, #2540]
-	.loc 2 2198 0
-	ldr	r3, [r4, #2660]
-	str	r3, [r4, #2544]
-.L1359:
-	.loc 2 2201 0
-	ldrh	r2, [r4, #68]
-	ldr	r3, [r4, #2528]
-	ldr	r0, [r4, #2524]
-	ldrh	r1, [r4, #16]
+	str	r3, [r4, #2524]
+	ldr	r3, [r4, #2664]
+	str	r3, [r4, #2552]
+	ldr	r3, [r4, #2668]
+	str	r3, [r4, #2560]
+	ldr	r3, [r4, #2672]
+	str	r3, [r4, #2512]
+	ldr	r3, [r4, #2676]
+	str	r3, [r4, #2520]
+	ldr	r3, [r4, #2680]
+	str	r3, [r4, #2564]
+	ldr	r3, [r4, #2684]
+	str	r3, [r4, #2568]
+.L1367:
+	ldrh	r2, [r4, #92]
+	ldr	r3, [r4, #2552]
+	ldr	r0, [r4, #2548]
+	ldrh	r1, [r4, #40]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1158:
-	str	r0, [r4, #2532]
+	str	r0, [r4, #2556]
 	pop	{r3, r4, r5, pc}
-.L1361:
+.L1369:
 	.align	2
-.L1360:
+.L1368:
 	.word	.LANCHOR0
 	.word	1179929683
-.LFE237:
 	.fnend
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.align	1
+	.global	sftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartRead
+	.fnend
+	.size	sftl_vendor_read, .-sftl_vendor_read
+	.align	1
 	.global	FtlVpcTblFlush
 	.syntax unified
 	.thumb
@@ -14286,136 +9437,83 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	.fnstart
-.LFB219:
-	.loc 2 1053 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
-.LCFI162:
-	.loc 2 1065 0
 	movs	r5, #0
-	.loc 2 1059 0
-	ldr	r4, .L1374
-	.loc 2 1096 0
+	ldr	r4, .L1383
 	movs	r1, #255
-	.loc 2 1054 0
 	movw	r7, #65535
-.LVL1159:
-	.loc 2 1124 0
-	ldr	r9, .L1374+16
-	.loc 2 1059 0
-	ldr	r3, [r4, #3240]
-	.loc 2 1105 0
-	addw	r8, r4, #3220
-	.loc 2 1060 0
-	ldr	r6, [r4, #3244]
-	.loc 2 1124 0
-	ldr	r10, .L1374+20
-	.loc 2 1059 0
-	str	r3, [r4, #3228]
-	.loc 2 1062 0
-	ldrh	r3, [r4, #2552]
-	.loc 2 1060 0
-	str	r6, [r4, #3232]
-	.loc 2 1066 0
+	ldr	r9, .L1383+16
+	ldr	r3, [r4, #3280]
+	addw	r8, r4, #3260
+	ldr	r6, [r4, #3284]
+	ldr	r10, .L1383+20
+	str	r3, [r4, #3268]
+	ldrh	r3, [r4, #2576]
+	str	r6, [r4, #3272]
 	str	r5, [r6, #12]
-	.loc 2 1062 0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 2 1063 0
 	movw	r3, #61604
 	strh	r3, [r6]	@ movhi
-	.loc 2 1064 0
-	ldr	r3, [r4, #2560]
-	.loc 2 1065 0
+	ldr	r3, [r4, #2584]
 	str	r5, [r6, #8]
-	.loc 2 1074 0
-	ldrh	r2, [r4, #2326]
-	.loc 2 1064 0
+	ldrh	r2, [r4, #2350]
 	str	r3, [r6, #4]
-	.loc 2 1068 0
-	ldr	r3, .L1374+4
-	str	r3, [r4, #2244]
-	.loc 2 1069 0
-	ldr	r3, .L1374+8
-	str	r3, [r4, #2248]
-	.loc 2 1070 0
-	ldrh	r3, [r4, #2558]
-	strh	r3, [r4, #2252]	@ movhi
-	.loc 2 1071 0
-	ldrh	r3, [r4, #30]
-	strb	r3, [r4, #2254]
-	.loc 2 1073 0
-	ldrh	r3, [r4, #2324]
-	strh	r3, [r4, #2258]	@ movhi
-	.loc 2 1074 0
-	ldrb	r3, [r4, #2330]	@ zero_extendqisi2
+	ldr	r3, .L1383+4
+	str	r3, [r4, #2268]
+	ldr	r3, .L1383+8
+	str	r3, [r4, #2272]
+	ldrh	r3, [r4, #2582]
+	strh	r3, [r4, #2276]	@ movhi
+	ldrh	r3, [r4, #54]
+	strb	r3, [r4, #2278]
+	ldrh	r3, [r4, #2348]
+	strh	r3, [r4, #2282]	@ movhi
+	ldrb	r3, [r4, #2354]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1078 0
-	ldrh	r2, [r4, #2374]
-	.loc 2 1074 0
-	strh	r3, [r4, #2260]	@ movhi
-	.loc 2 1075 0
-	ldrb	r3, [r4, #2332]	@ zero_extendqisi2
-	strb	r3, [r4, #2255]
-	.loc 2 1077 0
-	ldrh	r3, [r4, #2372]
-	strh	r3, [r4, #2262]	@ movhi
-	.loc 2 1078 0
-	ldrb	r3, [r4, #2378]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2398]
+	strh	r3, [r4, #2284]	@ movhi
+	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
+	strb	r3, [r4, #2279]
+	ldrh	r3, [r4, #2396]
+	strh	r3, [r4, #2286]	@ movhi
+	ldrb	r3, [r4, #2402]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	strh	r3, [r4, #2264]	@ movhi
-	.loc 2 1079 0
-	ldrb	r3, [r4, #2380]	@ zero_extendqisi2
-	strb	r3, [r4, #2256]
-	.loc 2 1081 0
-	ldrh	r3, [r4, #2420]
-	.loc 2 1082 0
-	ldrh	r2, [r4, #2422]
-	.loc 2 1096 0
-	ldr	r0, [r4, #3228]
-	.loc 2 1081 0
-	strh	r3, [r4, #2266]	@ movhi
-	.loc 2 1082 0
-	ldrb	r3, [r4, #2426]	@ zero_extendqisi2
+	strh	r3, [r4, #2288]	@ movhi
+	ldrb	r3, [r4, #2404]	@ zero_extendqisi2
+	strb	r3, [r4, #2280]
+	ldrh	r3, [r4, #2444]
+	ldrh	r2, [r4, #2446]
+	ldr	r0, [r4, #3268]
+	strh	r3, [r4, #2290]	@ movhi
+	ldrb	r3, [r4, #2450]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	.loc 2 1096 0
-	ldrh	r2, [r4, #86]
-	.loc 2 1082 0
-	strh	r3, [r4, #2268]	@ movhi
-	.loc 2 1083 0
-	ldrb	r3, [r4, #2428]	@ zero_extendqisi2
-	strb	r3, [r4, #2257]
-	.loc 2 1085 0
-	ldr	r3, [r4, #2524]
-	str	r3, [r4, #2276]
-	.loc 2 1090 0
-	ldr	r3, [r4, #2516]
-	str	r3, [r4, #2284]
-	.loc 2 1091 0
-	ldr	r3, [r4, #2520]
-	str	r3, [r4, #2280]
-	.loc 2 1096 0
+	ldrh	r2, [r4, #110]
+	strh	r3, [r4, #2292]	@ movhi
+	ldrb	r3, [r4, #2452]	@ zero_extendqisi2
+	strb	r3, [r4, #2281]
+	ldr	r3, [r4, #2548]
+	str	r3, [r4, #2300]
+	ldr	r3, [r4, #2540]
+	str	r3, [r4, #2308]
+	ldr	r3, [r4, #2544]
+	str	r3, [r4, #2304]
 	bl	ftl_memset
-.LVL1160:
-	.loc 2 1097 0
 	movs	r2, #48
-	addw	r1, r4, #2244
-	ldr	r0, [r4, #3228]
+	addw	r1, r4, #2268
+	ldr	r0, [r4, #3268]
 	bl	ftl_memcpy
-.LVL1161:
-	.loc 2 1098 0
-	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #3228]
-	ldr	r1, [r4, #2300]
+	ldrh	r2, [r4, #40]
+	ldr	r0, [r4, #3268]
+	ldr	r1, [r4, #2324]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
-.LVL1162:
-	.loc 2 1099 0
-	ldrh	r0, [r4, #16]
-	ldr	r3, [r4, #3228]
-	ldr	r1, [r4]
+	ldrh	r0, [r4, #40]
+	ldr	r3, [r4, #3268]
+	ldr	r1, [r4, #24]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -14423,151 +9521,99 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-.LVL1163:
-	.loc 2 1100 0
 	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.LVL1164:
-.L1363:
-	.loc 2 1102 0
-	ldr	r3, [r4, #3240]
-	.loc 2 1105 0
+.L1372:
+	ldr	r3, [r4, #3280]
 	mov	r0, r8
-	.loc 2 1104 0
-	ldrh	r2, [r4, #2552]
-	.loc 2 1102 0
-	str	r3, [r4, #3228]
-	.loc 2 1103 0
-	ldr	r3, [r4, #3244]
-	str	r3, [r4, #3232]
-	.loc 2 1104 0
-	ldrh	r3, [r4, #2554]
+	ldrh	r2, [r4, #2576]
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
+	ldrh	r3, [r4, #2578]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3224]
-	.loc 2 1105 0
+	str	r3, [r4, #3264]
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1165:
-	.loc 2 1106 0
-	ldrh	r3, [r4, #80]
-	ldrh	r2, [r4, #2554]
+	ldrh	r3, [r4, #104]
+	ldrh	r2, [r4, #2578]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1364
-	.loc 2 1108 0
-	ldrh	r3, [r4, #2552]
-	.loc 2 1107 0
-	ldrh	r7, [r4, #2556]
-	.loc 2 1108 0
-	strh	r3, [r4, #2556]	@ movhi
-	.loc 2 1109 0
+	blt	.L1373
+	ldrh	r3, [r4, #2576]
+	ldrh	r7, [r4, #2580]
+	strh	r3, [r4, #2580]	@ movhi
 	movs	r3, #0
-	strh	r3, [r4, #2554]	@ movhi
-	.loc 2 1110 0
+	strh	r3, [r4, #2578]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-.LVL1166:
-	.loc 2 1115 0
-	ldr	r3, [r4, #2516]
-	.loc 2 1110 0
-	strh	r0, [r4, #2552]	@ movhi
-	.loc 2 1115 0
+	ldr	r3, [r4, #2540]
+	strh	r0, [r4, #2576]	@ movhi
 	adds	r2, r3, #1
-	str	r3, [r4, #2560]
-	str	r2, [r4, #2516]
-	.loc 2 1116 0
+	str	r3, [r4, #2584]
+	str	r2, [r4, #2540]
 	lsls	r2, r0, #10
-	str	r2, [r4, #3224]
-	.loc 2 1117 0
+	str	r2, [r4, #3264]
 	str	r3, [r6, #4]
-	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1118 0
 	strh	r0, [r6, #2]	@ movhi
-	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
 	mov	r0, r8
 	bl	FlashProgPages
-.LVL1167:
-.L1364:
-	.loc 2 1121 0
-	ldrh	r3, [r4, #2554]
-	.loc 2 1122 0
-	ldr	r2, [r4, #3220]
-	.loc 2 1121 0
+.L1373:
+	ldrh	r3, [r4, #2578]
+	ldr	r2, [r4, #3260]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1121 0
-	strh	r3, [r4, #2554]	@ movhi
-	.loc 2 1122 0
-	bne	.L1365
-	.loc 2 1124 0
+	strh	r3, [r4, #2578]	@ movhi
+	bne	.L1374
 	cmp	r3, #1
-	bne	.L1366
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1375
 	movw	r2, #1124
 	mov	r1, r9
 	mov	r0, r10
 	bl	printk
-.LVL1168:
-.L1366:
-	.loc 2 1125 0 is_stmt 1
-	ldrh	r3, [r4, #2554]
-	.loc 2 1127 0
+.L1375:
+	ldrh	r3, [r4, #2578]
 	adds	r5, r5, #1
-.LVL1169:
 	uxth	r5, r5
-.LVL1170:
-	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1126 0
 	ittt	eq
-	ldrheq	r3, [r4, #80]
+	ldrheq	r3, [r4, #104]
 	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2554]	@ movhi
-	.loc 2 1128 0
+	strheq	r3, [r4, #2578]	@ movhi
 	cmp	r5, #3
-	bls	.L1363
-	.loc 2 1129 0
+	bls	.L1372
 	mov	r2, r5
-	ldr	r1, [r4, #3224]
-	ldr	r0, .L1374+12
+	ldr	r1, [r4, #3264]
+	ldr	r0, .L1383+12
 	bl	printk
-.LVL1171:
-.L1369:
-	b	.L1369
-.L1365:
-	.loc 2 1135 0
+.L1378:
+	b	.L1378
+.L1374:
 	cmp	r3, #1
-	beq	.L1363
-	.loc 2 1138 0
+	beq	.L1372
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1370
-	.loc 2 1139 0
+	beq	.L1379
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL1172:
-.L1370:
-	.loc 2 1141 0
+.L1379:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.LVL1173:
-.L1375:
+.L1384:
 	.align	2
-.L1374:
+.L1383:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
-	.word	.LC100
+	.word	.LC101
 	.word	.LANCHOR1+454
 	.word	.LC1
-.LFE219:
 	.fnend
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	1
@@ -14579,138 +9625,93 @@ FtlVpcTblFlush:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 	.fnstart
-.LFB239:
-	.loc 2 2242 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
-.LCFI163:
-	.loc 2 2249 0
 	movs	r5, #0
-.LVL1174:
-	.loc 2 2248 0
-	ldr	r4, .L1388
-	.loc 2 2247 0
-	ldr	r1, .L1388+4
-	ldr	r0, .L1388+8
+	ldr	r4, .L1397
+	ldr	r1, .L1397+4
+	ldr	r0, .L1397+8
 	bl	printk
-.LVL1175:
-	.loc 2 2248 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	movs	r1, #0
-	ldr	r0, [r4, #3824]
+	ldr	r0, [r4, #3864]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1176:
-.L1377:
-	.loc 2 2249 0 discriminator 1
-	ldr	r3, [r4, #2480]
+.L1386:
+	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1379
-	.loc 2 2259 0 discriminator 1
-	ldr	r9, .L1388+12
+	bcc	.L1388
+	ldr	r9, .L1397+12
 	movs	r7, #0
-	.loc 2 2257 0 discriminator 1
 	movw	r8, #65535
-.LVL1177:
-.L1380:
-	.loc 2 2256 0 discriminator 1
-	ldrh	r3, [r4, #16]
+.L1389:
+	ldrh	r3, [r4, #40]
 	uxth	r5, r7
-.LVL1178:
 	cmp	r3, r5
-	bhi	.L1384
-	.loc 2 2268 0
+	bhi	.L1393
 	add	sp, sp, #12
-.LCFI164:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.LVL1179:
-.L1379:
-.LCFI165:
-	.loc 2 2250 0
+.L1388:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1180:
-	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1378
-	.loc 2 2252 0
+	beq	.L1387
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1181:
-	.loc 2 2253 0
-	ldr	r2, [r4, #3824]
+	ldr	r2, [r4, #3864]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1378:
-	.loc 2 2249 0 discriminator 2
+.L1387:
 	adds	r5, r5, #1
-	b	.L1377
-.LVL1182:
-.L1384:
-	.loc 2 2257 0
-	ldr	r3, [r4, #2300]
+	b	.L1386
+.L1393:
+	ldr	r3, [r4, #2324]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4, #3824]
+	ldr	r3, [r4, #3864]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1382
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1391
 	cmp	r2, r8
-	beq	.L1382
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1391
 	mov	r1, r6
 	mov	r0, r9
 	bl	printk
-.LVL1183:
-	.loc 2 2260 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	cmp	r3, r5
-	beq	.L1382
-	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2420]
+	beq	.L1391
+	ldrh	r3, [r4, #2444]
 	cmp	r3, r5
-	beq	.L1382
-	.loc 2 2260 0 discriminator 2
-	ldrh	r3, [r4, #2372]
+	beq	.L1391
+	ldrh	r3, [r4, #2396]
 	cmp	r3, r5
-	beq	.L1382
-	.loc 2 2261 0 is_stmt 1
-	ldr	r3, [r4, #3824]
-	.loc 2 2262 0
+	beq	.L1391
+	ldr	r3, [r4, #3864]
 	mov	r0, r5
-	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1184:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1185:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1186:
-.L1382:
+.L1391:
 	adds	r7, r7, #1
-	b	.L1380
-.L1389:
+	b	.L1389
+.L1398:
 	.align	2
-.L1388:
+.L1397:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC90
-	.word	.LC101
-.LFE239:
+	.word	.LC91
+	.word	.LC102
 	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	1
@@ -14722,102 +9723,64 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 	.fnstart
-.LFB249:
-	.loc 2 2679 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1187:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI166:
-	.loc 2 2679 0
 	mov	r6, r0
-	.loc 2 2681 0
-	ldr	r4, .L1400
-	.loc 2 2680 0
+	ldr	r4, .L1409
 	ldrh	r5, [r0]
-.LVL1188:
-	.loc 2 2681 0
-	ldrh	r3, [r4, #16]
+	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bcs	.L1391
-	.loc 2 2681 0 is_stmt 0 discriminator 1
+	bcs	.L1400
 	movw	r2, #2681
-	ldr	r1, .L1400+4
-	ldr	r0, .L1400+8
+	ldr	r1, .L1409+4
+	ldr	r0, .L1409+8
 	bl	printk
-.LVL1189:
-.L1391:
-	.loc 2 2683 0 is_stmt 1
+.L1400:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1392
-	.loc 2 2684 0
-	ldr	r3, [r4, #2300]
-	.loc 2 2685 0
+	beq	.L1401
+	ldr	r3, [r4, #2324]
 	mov	r0, r5
-	.loc 2 2684 0
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1393
-	.loc 2 2685 0
+	cbz	r3, .L1402
 	bl	INSERT_DATA_LIST
-.LVL1190:
-.L1392:
-	.loc 2 2690 0
-	ldrh	r0, [r4, #3952]
-	.loc 2 2689 0
+.L1401:
+	ldrh	r0, [r4, #3992]
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2690 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1394
-	.loc 2 2691 0
+	beq	.L1403
 	cmp	r5, r0
-	bne	.L1395
-	.loc 2 2691 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #2300]
+	bne	.L1404
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1396
-.L1395:
-	.loc 2 2692 0 is_stmt 1
+	cbz	r3, .L1405
+.L1404:
 	bl	update_vpc_list
-.LVL1191:
-.L1396:
-	.loc 2 2693 0
+.L1405:
 	movw	r3, #65535
-	strh	r3, [r4, #3952]	@ movhi
-.L1394:
-	.loc 2 2695 0
+	strh	r3, [r4, #3992]	@ movhi
+.L1403:
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1192:
-	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1193:
-	.loc 2 2697 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1194:
-	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1195:
-	.loc 2 2700 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1196:
-.L1393:
-	.loc 2 2687 0
+.L1402:
 	bl	INSERT_FREE_LIST
-.LVL1197:
-	b	.L1392
-.L1401:
+	b	.L1401
+.L1410:
 	.align	2
-.L1400:
+.L1409:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
-.LFE249:
 	.fnend
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	1
@@ -14829,202 +9792,125 @@ allocate_new_data_superblock:
 	.type	FtlProgPages, %function
 FtlProgPages:
 	.fnstart
-.LFB165:
-	.loc 3 904 0
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1198:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI167:
-	.loc 3 913 0
 	movs	r7, #0
-.LVL1199:
-	ldr	r6, .L1416
-	.loc 3 904 0
+	ldr	r6, .L1425
 	.pad #20
 	sub	sp, sp, #20
-.LCFI168:
-	.loc 3 904 0
 	mov	r4, r3
-	.loc 3 911 0
 	movs	r2, #0
-.LVL1200:
-	.loc 3 933 0
-	ldr	r10, .L1416+8
-	.loc 3 904 0
+	ldr	r10, .L1425+8
 	mov	r5, r0
-	.loc 3 933 0
-	ldr	fp, .L1416+12
-	.loc 3 904 0
+	ldr	fp, .L1425+12
 	mov	r9, r1
-	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1201:
 	bl	FlashProgPages
-.LVL1202:
-.L1403:
-	.loc 3 913 0 discriminator 1
+.L1412:
 	cmp	r7, r9
-	beq	.L1410
-	.loc 3 919 0
+	beq	.L1419
 	mov	r8, #0
-	b	.L1411
-.LVL1203:
-.L1406:
-	.loc 3 915 0
+	b	.L1420
+.L1415:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1204:
-	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1404
-	.loc 3 917 0
-	ldr	r1, [r6, #2300]
+	bne	.L1413
+	ldr	r1, [r6, #2324]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 3 918 0
-	ldrh	r3, [r6, #78]
-	.loc 3 919 0
+	ldrh	r3, [r6, #102]
 	strb	r8, [r4, #6]
-	.loc 3 920 0
 	strh	r8, [r4, #4]	@ movhi
-	.loc 3 918 0
 	strh	r3, [r4, #2]	@ movhi
-.L1404:
-	.loc 3 922 0
+.L1413:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1405
-	.loc 3 923 0
+	cbnz	r3, .L1414
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1205:
-.L1405:
-	.loc 3 926 0
-	ldr	r3, [r6, #2708]
+.L1414:
+	ldr	r3, [r6, #2732]
 	adds	r3, r3, #1
-	str	r3, [r6, #2708]
-	.loc 3 927 0
+	str	r3, [r6, #2732]
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1206:
-	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1207:
-	.loc 3 930 0
 	movs	r2, #0
-	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 928 0
 	str	r0, [sp, #12]
-	.loc 3 930 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1208:
-.L1411:
-	.loc 3 914 0
+.L1420:
 	ldr	r3, [r5]
-.LVL1209:
 	adds	r3, r3, #1
-	beq	.L1406
-	.loc 3 933 0
+	beq	.L1415
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6, #8]
+	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1407
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1416
 	movw	r2, #933
 	mov	r1, r10
 	mov	r0, fp
 	bl	printk
-.LVL1210:
-.L1407:
-	.loc 3 934 0 is_stmt 1
+.L1416:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #16
-	.loc 3 935 0
 	movs	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 934 0
 	str	r3, [r1, #-4]!
-.LVL1211:
-	.loc 3 935 0
 	bl	log2phys
-.LVL1212:
-	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
-.LVL1213:
-	.loc 3 939 0
 	ubfx	r0, r3, #10, #16
 	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
-.LVL1214:
-	.loc 3 940 0
 	ldr	r3, [sp, #4]
-.LVL1215:
-	.loc 3 939 0
 	mov	r8, r0
-	.loc 3 940 0
 	adds	r3, r3, #1
-	beq	.L1408
-	.loc 3 942 0
-	ldr	r3, [r6, #2300]
-.LVL1216:
+	beq	.L1417
+	ldr	r3, [r6, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1409
-	.loc 3 943 0
+	cbnz	r2, .L1418
 	mov	r1, r0
-	ldr	r0, .L1416+4
+	ldr	r0, .L1425+4
 	bl	printk
-.LVL1217:
-.L1409:
-	.loc 3 944 0
+.L1418:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.LVL1218:
-.L1408:
-	.loc 3 913 0 discriminator 2
+.L1417:
 	adds	r7, r7, #1
 	adds	r5, r5, #20
-	b	.L1403
-.LVL1219:
-.L1410:
-	.loc 3 948 0
+	b	.L1412
+.L1419:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6, #8]
-.LVL1220:
+	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1402
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1411
 	mov	r2, #948
-	ldr	r1, .L1416+8
-	ldr	r0, .L1416+12
+	ldr	r1, .L1425+8
+	ldr	r0, .L1425+12
 	bl	printk
-.LVL1221:
-.L1402:
-	.loc 3 949 0 is_stmt 1
+.L1411:
 	add	sp, sp, #20
-.LCFI169:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1222:
-.L1417:
+.L1426:
 	.align	2
-.L1416:
+.L1425:
 	.word	.LANCHOR0
-	.word	.LC102
+	.word	.LC103
 	.word	.LANCHOR1+519
 	.word	.LC1
-.LFE165:
 	.fnend
 	.size	FtlProgPages, .-FtlProgPages
 	.align	1
@@ -15036,37 +9922,28 @@ FtlProgPages:
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
 	.fnstart
-.LFB166:
-	.loc 3 952 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI170:
-	.loc 3 953 0
-	ldr	r4, .L1423
-	ldr	r0, [r4, #3948]
-	cbz	r0, .L1419
-	.loc 3 954 0
-	ldr	r3, .L1423+4
+	ldr	r4, .L1432
+	ldr	r0, [r4, #3988]
+	cbz	r0, .L1428
+	ldr	r3, .L1432+4
 	movs	r2, #0
 	movs	r1, #1
-	ldr	r3, [r3, #-236]
+	ldr	r3, [r3, #-196]
 	bl	FtlProgPages
-.LVL1223:
-	.loc 3 955 0
 	movs	r3, #0
-	str	r3, [r4, #3948]
-.L1419:
-	.loc 3 958 0
+	str	r3, [r4, #3988]
+.L1428:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1424:
+.L1433:
 	.align	2
-.L1423:
+.L1432:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE166:
 	.fnend
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.align	1
@@ -15078,30 +9955,17 @@ FtlCacheWriteBack:
 	.type	FtlSysFlush, %function
 FtlSysFlush:
 	.fnstart
-.LFB162:
-	.loc 3 797 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI171:
-	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1224:
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1225:
-	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1226:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1227:
-	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
-.LFE162:
 	.fnend
 	.size	FtlSysFlush, .-FtlSysFlush
 	.align	1
@@ -15113,30 +9977,22 @@ FtlSysFlush:
 	.type	sftl_deinit, %function
 sftl_deinit:
 	.fnstart
-.LFB163:
-	.loc 3 806 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-.LCFI172:
-	.loc 3 807 0
-	ldr	r3, .L1428
+	ldr	r3, .L1437
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1427
-	.loc 3 808 0
+	bne	.L1436
 	bl	FtlSysFlush
-.LVL1228:
-.L1427:
-	.loc 3 810 0
+.L1436:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1429:
+.L1438:
 	.align	2
-.L1428:
+.L1437:
 	.word	.LANCHOR2
-.LFE163:
 	.fnend
 	.size	sftl_deinit, .-sftl_deinit
 	.align	1
@@ -15148,158 +10004,96 @@ sftl_deinit:
 	.type	FtlDiscard, %function
 FtlDiscard:
 	.fnstart
-.LFB168:
-	.loc 3 1157 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1229:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #8
-.LCFI173:
-.LVL1230:
-	.loc 3 1164 0
 	adds	r2, r0, r1
-	ldr	r6, .L1445
-	.loc 3 1157 0
+	ldr	r6, .L1454
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1164 0
-	ldr	r3, [r6, #116]
+	ldr	r3, [r6, #140]
 	cmp	r2, r3
-	bhi	.L1438
-	.loc 3 1167 0
+	bhi	.L1447
 	cmp	r1, #31
-	bhi	.L1432
-.LVL1231:
-.L1437:
-	.loc 3 1168 0
+	bhi	.L1441
+.L1446:
 	movs	r0, #0
-.L1430:
-	.loc 3 1201 0
+.L1439:
 	add	sp, sp, #8
-.LCFI174:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1232:
-.L1432:
-.LCFI175:
-	.loc 3 1170 0
+.L1441:
 	bl	FtlCacheWriteBack
-.LVL1233:
-	.loc 3 1172 0
-	ldrh	r4, [r6, #34]
+	ldrh	r4, [r6, #58]
 	mov	r0, r7
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1234:
-	.loc 3 1173 0
 	smulbb	r3, r0, r4
-	.loc 3 1172 0
 	mov	r8, r0
-.LVL1235:
-	.loc 3 1173 0
 	subs	r7, r7, r3
-.LVL1236:
 	uxth	r7, r7
-.LVL1237:
-	.loc 3 1174 0
-	cbz	r7, .L1433
-	.loc 3 1175 0
+	cbz	r7, .L1442
 	subs	r4, r4, r7
-	.loc 3 1176 0
 	add	r8, r0, #1
-	.loc 3 1175 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1177 0
 	subs	r5, r5, r4
-.L1433:
-	.loc 3 1184 0
-	ldr	r4, .L1445+4
-	.loc 3 1180 0
+.L1442:
+	ldr	r4, .L1454+4
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.LVL1238:
-.L1434:
-	.loc 3 1181 0
-	ldrh	r3, [r6, #34]
+.L1443:
+	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1436
-	.loc 3 1194 0
-	ldr	r3, .L1445+4
-	ldr	r2, [r3, #-232]
+	bcs	.L1445
+	ldr	r3, .L1454+4
+	ldr	r2, [r3, #-192]
 	cmp	r2, #32
-	bls	.L1437
-	.loc 3 1196 0
+	bls	.L1446
 	movs	r4, #0
-	str	r4, [r3, #-232]
-	.loc 3 1197 0
+	str	r4, [r3, #-192]
 	bl	l2p_flush
-.LVL1239:
-	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1240:
-	b	.L1437
-.L1436:
-	.loc 3 1182 0
+	b	.L1446
+.L1445:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r8
 	bl	log2phys
-.LVL1241:
-	.loc 3 1183 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-.LVL1242:
-	beq	.L1435
-	.loc 3 1184 0
-	ldr	r3, [r4, #-232]
-.LVL1243:
-	.loc 3 1186 0
+	beq	.L1444
+	ldr	r3, [r4, #-192]
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r8
-	.loc 3 1184 0
 	adds	r3, r3, #1
-	str	r3, [r4, #-232]
-	.loc 3 1185 0
-	ldr	r3, [r6, #2488]
+	str	r3, [r4, #-192]
+	ldr	r3, [r6, #2512]
 	adds	r3, r3, #1
-	str	r3, [r6, #2488]
-	.loc 3 1186 0
+	str	r3, [r6, #2512]
 	bl	log2phys
-.LVL1244:
-	.loc 3 1187 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1245:
-	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1246:
-.L1435:
-	.loc 3 1191 0
-	ldrh	r3, [r6, #34]
-.LVL1247:
-	.loc 3 1190 0
+.L1444:
+	ldrh	r3, [r6, #58]
 	add	r8, r8, #1
-	.loc 3 1191 0
 	subs	r5, r5, r3
-	b	.L1434
-.LVL1248:
-.L1438:
-	.loc 3 1165 0
+	b	.L1443
+.L1447:
 	mov	r0, #-1
-	b	.L1430
-.L1446:
+	b	.L1439
+.L1455:
 	.align	2
-.L1445:
+.L1454:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
-.LFE168:
 	.fnend
 	.size	FtlDiscard, .-FtlDiscard
 	.align	1
@@ -15311,304 +10105,191 @@ FtlDiscard:
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
 	.fnstart
-.LFB258:
-	.loc 5 112 0
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1249:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-.LCFI176:
-.LVL1250:
-	.loc 5 119 0
 	movw	r2, #65535
-	.loc 5 115 0
-	ldr	r4, .L1473
-	.loc 5 119 0
-	ldrh	r5, [r4, #2420]
-	.loc 5 115 0
-	ldrh	r1, [r4, #78]
-.LVL1251:
-	.loc 5 119 0
+	ldr	r4, .L1482
+	ldrh	r5, [r4, #2444]
+	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1448
-.LVL1252:
-.L1458:
-	.loc 5 153 0
-	ldrh	r2, [r4, #2420]
-	.loc 5 152 0
+	bne	.L1457
+.L1467:
+	ldrh	r2, [r4, #2444]
 	movs	r3, #0
-	str	r3, [r4, #3960]
-	.loc 5 153 0
+	str	r3, [r4, #4000]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1471
-.L1449:
-	.loc 5 154 0
+	bne	.L1480
+.L1458:
 	movs	r0, #0
-.L1447:
-	.loc 5 199 0
+.L1456:
 	add	sp, sp, #12
-.LCFI177:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1253:
-.L1448:
-.LCFI178:
-	.loc 5 121 0
-	cbz	r0, .L1451
-	.loc 5 123 0
-	ldr	r3, .L1473+4
+.L1457:
+	cbz	r0, .L1460
+	ldr	r3, .L1482+4
 	ldrh	r0, [r3, #4]
-.LVL1254:
 	cmp	r0, r2
-	beq	.L1452
-.L1453:
-	.loc 5 122 0
+	beq	.L1461
+.L1462:
 	movs	r1, #2
-.LVL1255:
-.L1451:
-	.loc 5 131 0
-	ldr	r0, .L1473+8
-.LVL1256:
+.L1460:
+	ldr	r0, .L1482+8
 	bl	FtlGcScanTempBlk
-.LVL1257:
 	str	r0, [sp, #4]
-.LVL1258:
-	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1454
-	.loc 5 135 0
-	ldr	r2, [r4, #2304]
+	beq	.L1463
+	ldr	r2, [r4, #2328]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1455
-	.loc 5 136 0
+	bls	.L1464
 	subs	r3, r3, #5
-	.loc 5 137 0
 	movs	r0, #1
-	.loc 5 136 0
 	strh	r3, [r2, r5, lsl #1]	@ movhi
-	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1259:
-.L1455:
-	.loc 5 139 0
-	ldr	r3, [r4, #3960]
-	cbnz	r3, .L1456
-	.loc 5 140 0
-	ldr	r3, [r4, #2708]
-	.loc 5 141 0
+.L1464:
+	ldr	r3, [r4, #4000]
+	cbnz	r3, .L1465
+	ldr	r3, [r4, #2732]
 	ldr	r0, [sp, #4]
-	.loc 5 140 0
 	adds	r3, r3, #1
-	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 140 0
-	str	r3, [r4, #2708]
-	.loc 5 141 0
+	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
-.LVL1260:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1261:
-.L1456:
-	.loc 5 144 0
+.L1465:
 	movs	r3, #0
-	str	r3, [r4, #3960]
-.L1467:
-	.loc 5 149 0
+	str	r3, [r4, #4000]
+.L1476:
 	movs	r0, #1
-	b	.L1447
-.LVL1262:
-.L1452:
-	.loc 5 124 0
+	b	.L1456
+.L1461:
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
-	.loc 5 125 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #17
-	bhi	.L1453
-	b	.L1451
-.LVL1263:
-.L1454:
-	.loc 5 148 0
-	ldr	r3, .L1473+4
+	bhi	.L1462
+	b	.L1460
+.L1463:
+	ldr	r3, .L1482+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1467
-	b	.L1458
-.LVL1264:
-.L1471:
-	.loc 5 160 0
+	bne	.L1476
+	b	.L1467
+.L1480:
 	bl	FtlCacheWriteBack
-.LVL1265:
-	.loc 5 162 0
-	ldrb	r1, [r4, #2427]	@ zero_extendqisi2
-	ldrh	r3, [r4, #78]
-	ldrh	r2, [r4, #3176]
+	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
+	ldrh	r3, [r4, #102]
+	ldrh	r2, [r4, #3200]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1459
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1468
 	movs	r2, #162
-	ldr	r1, .L1473+12
-	ldr	r0, .L1473+16
+	ldr	r1, .L1482+12
+	ldr	r0, .L1482+16
 	bl	printk
-.LVL1266:
-.L1459:
-	.loc 5 163 0 is_stmt 1
-	ldrb	r3, [r4, #2427]	@ zero_extendqisi2
-	.loc 5 165 0
+.L1468:
+	ldrb	r3, [r4, #2451]	@ zero_extendqisi2
 	movs	r6, #0
-	.loc 5 163 0
-	ldrh	r0, [r4, #78]
-	.loc 5 166 0
+	ldrh	r0, [r4, #102]
 	mov	r9, #12
-	.loc 5 163 0
-	ldr	r2, [r4, #2300]
-	ldrh	r1, [r4, #2420]
-	.loc 5 168 0
-	ldr	r10, .L1473+12
-	.loc 5 163 0
+	ldr	r2, [r4, #2324]
+	ldrh	r1, [r4, #2444]
+	ldr	r10, .L1482+12
 	smulbb	r3, r3, r0
-	.loc 5 168 0
-	ldr	fp, .L1473+16
-	.loc 5 163 0
+	ldr	fp, .L1482+16
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 5 164 0
-	ldr	r2, [r4, #2504]
-	ldrh	r3, [r4, #3176]
+	ldr	r2, [r4, #2528]
+	ldrh	r3, [r4, #3200]
 	add	r3, r3, r2
-	str	r3, [r4, #2504]
-.LVL1267:
-.L1460:
-	.loc 5 165 0 discriminator 1
-	ldrh	r2, [r4, #3176]
+	str	r3, [r4, #2528]
+.L1469:
+	ldrh	r2, [r4, #3200]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1464
-	.loc 5 181 0
+	bhi	.L1473
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1268:
-	.loc 5 182 0
-	ldrh	r0, [r4, #2420]
-	ldr	r3, [r4, #2300]
+	ldrh	r0, [r4, #2444]
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1465
-	.loc 5 183 0
+	beq	.L1474
 	bl	INSERT_DATA_LIST
-.LVL1269:
-.L1466:
-	.loc 5 187 0
+.L1475:
 	movs	r5, #0
-.LVL1270:
-	.loc 5 186 0
 	movw	r6, #65535
-	strh	r6, [r4, #2420]	@ movhi
-	.loc 5 187 0
-	strh	r5, [r4, #3176]	@ movhi
-	.loc 5 188 0
-	strh	r5, [r4, #3168]	@ movhi
-	.loc 5 189 0
+	strh	r6, [r4, #2444]	@ movhi
+	strh	r5, [r4, #3200]	@ movhi
+	strh	r5, [r4, #3192]	@ movhi
 	bl	l2p_flush
-.LVL1271:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1272:
-	.loc 5 191 0
-	ldrh	r3, [r4, #2548]
-	ldrh	r2, [r4, #2320]
+	ldrh	r3, [r4, #2572]
+	ldrh	r2, [r4, #2344]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1449
-	.loc 5 193 0
+	ble	.L1458
 	movs	r3, #20
-	.loc 5 192 0
-	strh	r6, [r4, #2564]	@ movhi
-	.loc 5 193 0
-	strh	r3, [r4, #3124]	@ movhi
-	b	.L1449
-.LVL1273:
-.L1464:
-	.loc 5 166 0
+	strh	r6, [r4, #2588]	@ movhi
+	strh	r3, [r4, #3148]	@ movhi
+	b	.L1458
+.L1473:
 	uxth	r7, r6
-	ldr	r8, [r4, #3172]
-	.loc 5 168 0
-	ldr	r3, [r4, #2480]
-	.loc 5 166 0
+	ldr	r8, [r4, #3196]
+	ldr	r3, [r4, #2504]
 	mul	r7, r9, r7
 	add	r5, r8, r7
-	.loc 5 168 0
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1461
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1470
 	movs	r2, #168
 	mov	r1, r10
 	mov	r0, fp
 	bl	printk
-.LVL1274:
-.L1461:
-	.loc 5 169 0 is_stmt 1
+.L1470:
 	movs	r2, #0
 	add	r1, sp, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1275:
-	.loc 5 170 0
-	ldr	r3, [sp, #4]
 	ldr	r0, [r8, r7]
+	ldr	r3, [sp, #4]
 	cmp	r0, r3
-	bne	.L1462
-	.loc 5 171 0
+	bne	.L1471
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1276:
-	.loc 5 172 0
 	movs	r2, #1
-	.loc 5 171 0
 	mov	r7, r0
-	.loc 5 172 0
 	adds	r1, r5, #4
 	ldr	r0, [r5, #8]
 	bl	log2phys
-.LVL1277:
-	.loc 5 173 0
 	mov	r0, r7
-.L1472:
-	.loc 5 177 0
+.L1481:
 	bl	decrement_vpc_count
-.LVL1278:
-.L1463:
+.L1472:
 	adds	r6, r6, #1
-	b	.L1460
-.L1462:
-	.loc 5 175 0
+	b	.L1469
+.L1471:
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1463
-	.loc 5 177 0
-	ldrh	r0, [r4, #2420]
-	b	.L1472
-.L1465:
-	.loc 5 185 0
-	bl	INSERT_FREE_LIST
-.LVL1279:
-	b	.L1466
+	beq	.L1472
+	ldrh	r0, [r4, #2444]
+	b	.L1481
 .L1474:
+	bl	INSERT_FREE_LIST
+	b	.L1475
+.L1483:
 	.align	2
-.L1473:
+.L1482:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR0+2420
+	.word	.LANCHOR0+2444
 	.word	.LANCHOR1+532
 	.word	.LC1
-.LFE258:
 	.fnend
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	1
@@ -15620,46 +10301,30 @@ FtlGcFreeTempBlock:
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
 	.fnstart
-.LFB261:
-	.loc 5 289 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-.LCFI179:
-	.loc 5 290 0
-	ldr	r4, .L1477
-	ldrh	r1, [r4, #78]
-	addw	r0, r4, #2420
+	ldr	r4, .L1486
+	ldrh	r1, [r4, #102]
+	addw	r0, r4, #2444
 	bl	FtlGcScanTempBlk
-.LVL1280:
-	.loc 5 291 0
-	ldrh	r2, [r4, #2422]
-	ldrh	r3, [r4, #78]
+	ldrh	r2, [r4, #2446]
+	ldrh	r3, [r4, #102]
 	cmp	r2, r3
-	bcc	.L1475
-.LBB515:
-.LBB516:
-	.loc 5 293 0
-	addw	r0, r4, #3864
+	bcc	.L1484
+	add	r0, r4, #3904
 	bl	FtlMapBlkWriteDump_data
-.LVL1281:
-	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1282:
-	.loc 5 295 0
 	movs	r3, #0
-	str	r3, [r4, #3960]
-.L1475:
+	str	r3, [r4, #4000]
+.L1484:
 	pop	{r4, pc}
-.L1478:
+.L1487:
 	.align	2
-.L1477:
+.L1486:
 	.word	.LANCHOR0
-.LBE516:
-.LBE515:
-.LFE261:
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.align	1
@@ -15671,54 +10336,32 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	.fnstart
-.LFB233:
-	.loc 2 2081 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI180:
-	.loc 2 2082 0
 	movs	r5, #0
-	ldr	r4, .L1480
-	.loc 2 2084 0
-	addw	r6, r4, #2324
-	.loc 2 2082 0
-	str	r5, [r4, #3972]
-	.loc 2 2084 0
+	ldr	r4, .L1489
+	addw	r6, r4, #2348
+	str	r5, [r4, #4012]
 	mov	r0, r6
-	.loc 2 2086 0
-	addw	r4, r4, #2372
-	.loc 2 2084 0
+	addw	r4, r4, #2396
 	bl	FtlRecoverySuperblock
-.LVL1283:
-	.loc 2 2085 0
 	mov	r0, r6
 	bl	FtlSlcSuperblockCheck
-.LVL1284:
-	.loc 2 2086 0
 	mov	r0, r4
 	bl	FtlRecoverySuperblock
-.LVL1285:
-	.loc 2 2087 0
 	mov	r0, r4
 	bl	FtlSlcSuperblockCheck
-.LVL1286:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1287:
-	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1288:
-	.loc 2 2091 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1481:
+.L1490:
 	.align	2
-.L1480:
+.L1489:
 	.word	.LANCHOR0
-.LFE233:
 	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	1
@@ -15730,103 +10373,70 @@ FtlPowerLostRecovery:
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
 	.fnstart
-.LFB263:
-	.loc 5 316 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI181:
-	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1489
-	.loc 5 321 0
+	ldr	r4, .L1498
 	movs	r5, #0
-	.loc 5 322 0
 	movs	r6, #20
-	.loc 5 320 0
 	mov	r2, r3
-	ldr	r1, [r4, #3140]
-	ldr	r0, [r4, #3796]
+	ldr	r1, [r4, #3164]
+	ldr	r0, [r4, #3836]
 	bl	FlashProgPages
-.LVL1289:
-.L1483:
-	.loc 5 321 0 discriminator 1
-	ldr	r1, [r4, #3140]
+.L1492:
+	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1486
-	.loc 5 335 0
-	ldr	r0, [r4, #3796]
+	bhi	.L1495
+	ldr	r0, [r4, #3836]
 	bl	FtlGcBufFree
-.LVL1290:
-	.loc 5 337 0
-	ldrh	r3, [r4, #2424]
-	.loc 5 336 0
+	ldrh	r3, [r4, #2448]
 	movs	r0, #0
-	str	r0, [r4, #3140]
-	.loc 5 337 0
-	cbnz	r3, .L1482
-	.loc 5 338 0
+	str	r0, [r4, #3164]
+	cbnz	r3, .L1491
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1291:
-	b	.L1488
-.L1486:
-	.loc 5 322 0
+	b	.L1497
+.L1495:
 	muls	r3, r6, r3
-	ldr	r2, [r4, #3796]
+	ldr	r2, [r4, #3836]
 	adds	r5, r5, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r0, r2, #1
-	bne	.L1484
-	.loc 5 323 0
-	ldrh	r0, [r4, #2420]
+	bne	.L1493
+	ldrh	r0, [r4, #2444]
 	movs	r5, #0
-	ldr	r1, [r4, #2300]
+	ldr	r1, [r4, #2324]
 	strh	r5, [r1, r0, lsl #1]	@ movhi
-	.loc 5 324 0
-	strh	r2, [r4, #2420]	@ movhi
-	.loc 5 325 0
-	ldr	r2, [r4, #2708]
+	strh	r2, [r4, #2444]	@ movhi
+	ldr	r2, [r4, #2732]
 	adds	r2, r2, #1
-	str	r2, [r4, #2708]
-	.loc 5 326 0
-	ldr	r2, [r4, #3796]
+	str	r2, [r4, #2732]
+	ldr	r2, [r4, #3836]
 	add	r3, r3, r2
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL1292:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1293:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1294:
-.L1488:
-	.loc 5 339 0
+.L1497:
 	movs	r0, #1
-.L1482:
-	.loc 5 342 0
+.L1491:
 	pop	{r4, r5, r6, pc}
-.L1484:
-	.loc 5 331 0 discriminator 2
+.L1493:
 	ldr	r3, [r1, #12]
-.LVL1295:
-	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1296:
-	b	.L1483
-.L1490:
+	b	.L1492
+.L1499:
 	.align	2
-.L1489:
+.L1498:
 	.word	.LANCHOR0
-.LFE263:
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	1
@@ -15838,69 +10448,40 @@ Ftl_gc_temp_data_write_back:
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	.fnstart
-.LFB262:
-	.loc 5 300 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI182:
-	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1494
-	ldrh	r2, [r4, #2420]
+	ldr	r4, .L1503
+	ldrh	r2, [r4, #2444]
 	cmp	r2, r3
-	beq	.L1492
-	.loc 5 301 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2424]
-	cbnz	r3, .L1493
-.L1492:
-	.loc 5 302 0 is_stmt 1
+	beq	.L1501
+	ldrh	r3, [r4, #2448]
+	cbnz	r3, .L1502
+.L1501:
 	bl	FtlCacheWriteBack
-.LVL1297:
-	.loc 5 303 0
 	movs	r0, #0
-	.loc 5 304 0
 	movs	r5, #0
-	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1298:
-	.loc 5 305 0
-	ldr	r0, .L1494+4
-	.loc 5 304 0
-	strb	r5, [r4, #2428]
-	.loc 5 305 0
+	ldr	r0, .L1503+4
+	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
-.LVL1299:
-	.loc 5 306 0
-	strh	r5, [r4, #3168]	@ movhi
-	.loc 5 307 0
-	strh	r5, [r4, #3176]	@ movhi
-	.loc 5 308 0
+	strh	r5, [r4, #3192]	@ movhi
+	strh	r5, [r4, #3200]	@ movhi
 	bl	l2p_flush
-.LVL1300:
-	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1301:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1302:
-.L1493:
-	.loc 5 312 0
-	ldr	r0, .L1494+4
-	.loc 5 313 0
+.L1502:
+	ldr	r0, .L1503+4
 	pop	{r3, r4, r5, lr}
-.LCFI183:
-	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1303:
-.L1495:
+.L1504:
 	.align	2
-.L1494:
+.L1503:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2420
-.LFE262:
+	.word	.LANCHOR0+2444
 	.fnend
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.align	1
@@ -15912,1006 +10493,669 @@ Ftl_get_new_temp_ppa:
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
 	.fnstart
-.LFB269:
-	.loc 5 470 0
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1304:
-	.loc 5 478 0
-	ldr	r3, .L1615
-	.loc 5 470 0
+	ldr	r3, .L1624
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI184:
 	mov	r7, r0
 	.pad #36
 	sub	sp, sp, #36
-.LCFI185:
 	mov	r4, r3
-	.loc 5 478 0
-	ldr	r0, [r3, #3780]
-.LVL1305:
+	ldr	r0, [r3, #3820]
 	cmp	r0, #0
-	bne	.L1571
-	.loc 5 481 0
-	ldrh	r2, [r3, #2312]
+	bne	.L1580
+	ldrh	r2, [r3, #2336]
 	cmp	r2, #47
-	bls	.L1496
-	.loc 5 485 0
-	ldr	r2, .L1615+4
+	bls	.L1505
+	ldr	r2, .L1624+4
 	ldrh	r1, [r2, #4]
-.LVL1306:
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1498
-.L1501:
-.LBB520:
-.LBB521:
-	.loc 5 489 0
-	ldrh	r2, [r4, #3180]
+	bne	.L1507
+.L1510:
+	ldrh	r2, [r4, #3204]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1499
-.L1500:
-	.loc 5 496 0
-	ldr	r3, [r4, #3128]
-	.loc 5 497 0
+	bne	.L1508
+.L1509:
+	ldr	r3, [r4, #3152]
 	movw	r5, #65535
-	ldrh	r1, [r4, #2564]
-	.loc 5 496 0
+	ldrh	r1, [r4, #2588]
 	adds	r3, r3, #1
 	add	r3, r3, r7, lsl #7
-	.loc 5 497 0
 	cmp	r1, r5
-	.loc 5 496 0
-	str	r3, [r4, #3128]
-	.loc 5 497 0
-	bne	.L1502
-	ldrh	r2, [r4, #2420]
+	str	r3, [r4, #3152]
+	bne	.L1511
+	ldrh	r2, [r4, #2444]
 	cmp	r2, r1
-	bne	.L1503
-	ldrh	r8, [r4, #3178]
+	bne	.L1512
+	ldrh	r8, [r4, #3202]
 	cmp	r8, r2
-	bne	.L1504
-	.loc 5 498 0
-	ldrh	r2, [r4, #2320]
+	bne	.L1513
+	ldrh	r2, [r4, #2344]
 	cmp	r2, #24
 	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1504
-.LBB522:
-	.loc 5 502 0
-	ldr	r3, .L1615+8
-	.loc 5 501 0
+	bls	.L1513
+	ldr	r3, .L1624+8
 	movs	r6, #0
-	str	r6, [r4, #3128]
-	.loc 5 502 0
-	strh	r6, [r3, #-228]	@ movhi
-	.loc 5 503 0
+	str	r6, [r4, #3152]
+	strh	r6, [r3, #-188]	@ movhi
 	bl	GetSwlReplaceBlock
-.LVL1307:
-	.loc 5 504 0
 	cmp	r0, r8
-	.loc 5 503 0
 	mov	r5, r0
-	.loc 5 504 0
-	bne	.L1575
-	.loc 5 505 0
-	ldrh	r2, [r4, #2320]
-	ldrh	r3, [r4, #3126]
+	bne	.L1584
+	ldrh	r2, [r4, #2344]
+	ldrh	r3, [r4, #3150]
 	cmp	r2, r3
-	bcs	.L1507
-	.loc 5 506 0
+	bcs	.L1516
 	movs	r0, #64
 	bl	List_get_gc_head_node
-.LVL1308:
-	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1509
-	.loc 5 508 0
+	beq	.L1518
 	mov	r0, r3
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1510
-	.loc 5 509 0
+	bhi	.L1519
 	mov	r0, r6
 	bl	List_get_gc_head_node
-.LVL1309:
 	uxth	r6, r0
-	.loc 5 510 0
 	movs	r3, #128
-	strh	r3, [r4, #3126]	@ movhi
-	.loc 5 520 0
+	strh	r3, [r4, #3150]	@ movhi
 	cmp	r6, r5
-	beq	.L1509
-.L1506:
-	.loc 5 521 0
-	ldr	r3, [r4, #2300]
+	beq	.L1518
+.L1515:
+	ldr	r3, [r4, #2324]
 	mov	r5, r6
-	ldrh	r1, [r4, #3124]
-	ldrh	r2, [r4, #2320]
+	ldrh	r1, [r4, #3148]
+	ldrh	r2, [r4, #2344]
 	ldrh	r3, [r3, r6, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, [r4, #2304]
-	ldr	r0, .L1615+12
+	ldr	r1, [r4, #2328]
+	ldr	r0, .L1624+12
 	ldrh	r1, [r1, r6, lsl #1]
 	str	r1, [sp]
 	mov	r1, r6
 	bl	printk
-.LVL1310:
-	b	.L1509
-.L1498:
-.LBE522:
-.LBE521:
-.LBE520:
-	.loc 5 485 0 discriminator 1
-	ldrh	r3, [r3, #2420]
+	b	.L1518
+.L1507:
+	ldrh	r3, [r3, #2444]
 	cmp	r3, r2
-	beq	.L1501
-	.loc 5 486 0
+	beq	.L1510
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1311:
 	cmp	r0, #0
-	beq	.L1501
-	.loc 5 487 0
+	beq	.L1510
 	movs	r0, #1
-	b	.L1496
-.L1499:
-.LBB528:
-.LBB525:
-	.loc 5 489 0
-	ldrh	r3, [r4, #3178]
+	b	.L1505
+.L1508:
+	ldrh	r3, [r4, #3202]
 	cmp	r3, r1
-	.loc 5 490 0
 	itt	eq
-	strheq	r2, [r4, #3178]	@ movhi
-	.loc 5 491 0
-	strheq	r3, [r4, #3180]	@ movhi
-	b	.L1500
-.L1510:
-.LBB523:
-	.loc 5 512 0
+	strheq	r2, [r4, #3202]	@ movhi
+	strheq	r3, [r4, #3204]	@ movhi
+	b	.L1509
+.L1519:
 	movs	r3, #64
-.L1608:
-	.loc 5 516 0
-	strh	r3, [r4, #3126]	@ movhi
-.L1509:
-	.loc 5 523 0
+.L1617:
+	strh	r3, [r4, #3150]	@ movhi
+.L1518:
 	bl	FtlGcReFreshBadBlk
-.LVL1312:
-.LBE523:
-	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1512
+	bne	.L1521
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1512
-.L1569:
-	.loc 5 528 0
-	ldrh	r3, [r4, #2320]
+	bne	.L1521
+.L1578:
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #24
-	bhi	.L1576
-	.loc 5 530 0
+	bhi	.L1585
 	cmp	r3, #16
-	ldrh	r6, [r4, #78]
-	bls	.L1514
-	.loc 5 531 0
+	ldrh	r6, [r4, #102]
+	bls	.L1523
 	lsrs	r6, r6, #5
-.LVL1313:
-.L1513:
-	.loc 5 539 0
-	ldrh	r2, [r4, #3124]
+.L1522:
+	ldrh	r2, [r4, #3148]
 	cmp	r2, r3
-	bcs	.L1517
-	.loc 5 540 0
-	ldrh	r3, [r4, #2420]
+	bcs	.L1526
+	ldrh	r3, [r4, #2444]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1518
-	ldrh	r2, [r4, #3178]
+	bne	.L1527
+	ldrh	r2, [r4, #3202]
 	cmp	r2, r3
-	bne	.L1518
-	.loc 5 542 0
-	ldr	r3, .L1615+8
-	ldrh	r0, [r3, #-228]
-	cbnz	r0, .L1519
-	ldr	r3, [r4, #2480]
-	ldr	r2, [r4, #2476]
+	bne	.L1527
+	ldr	r3, .L1624+8
+	ldrh	r0, [r3, #-188]
+	cbnz	r0, .L1528
+	ldr	r3, [r4, #2504]
+	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1520
-.L1519:
-	.loc 5 543 0
-	ldrh	r3, [r4, #2548]
+	bcs	.L1529
+.L1528:
+	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1609:
-	.loc 5 545 0
-	strh	r3, [r4, #3124]	@ movhi
-	.loc 5 546 0
+.L1618:
+	strh	r3, [r4, #3148]	@ movhi
 	movs	r3, #0
-	str	r3, [r4, #3136]
-.LVL1314:
-.L1496:
-.LBE525:
-.LBE528:
-	.loc 5 754 0
+	str	r3, [r4, #3160]
+.L1505:
 	add	sp, sp, #36
-.LCFI186:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1315:
-.L1507:
-.LCFI187:
-.LBB529:
-.LBB526:
-.LBB524:
-	.loc 5 516 0
+.L1516:
 	movs	r3, #80
-	b	.L1608
-.L1575:
-	.loc 5 504 0
+	b	.L1617
+.L1584:
 	mov	r6, r0
-	b	.L1506
-.L1514:
-.LBE524:
-	.loc 5 532 0
+	b	.L1515
+.L1523:
 	cmp	r3, #12
-	bls	.L1515
-	.loc 5 533 0
+	bls	.L1524
 	lsrs	r6, r6, #4
-.LVL1316:
-	b	.L1513
-.LVL1317:
-.L1515:
-	.loc 5 534 0
+	b	.L1522
+.L1524:
 	cmp	r3, #8
-	bls	.L1513
-	.loc 5 535 0
+	bls	.L1522
 	lsrs	r6, r6, #2
-.LVL1318:
-	b	.L1513
-.LVL1319:
-.L1576:
-	.loc 5 529 0
+	b	.L1522
+.L1585:
 	movs	r6, #1
-.LVL1320:
-	b	.L1513
-.L1520:
-	.loc 5 545 0
+	b	.L1522
+.L1529:
 	movs	r3, #18
-	b	.L1609
-.L1518:
-	.loc 5 549 0
-	ldrh	r3, [r4, #2548]
+	b	.L1618
+.L1527:
+	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r4, #3124]	@ movhi
-.L1517:
-	.loc 5 551 0
-	ldrh	r3, [r4, #3182]
-	cbz	r3, .L1577
-	.loc 5 552 0
+	strh	r3, [r4, #3148]	@ movhi
+.L1526:
+	ldrh	r3, [r4, #3206]
+	cbz	r3, .L1586
 	adds	r6, r6, #32
-.LVL1321:
 	uxth	r6, r6
-.LVL1322:
-.L1577:
-	.loc 5 551 0
+.L1586:
 	movw	r5, #65535
-.L1523:
-	.loc 5 595 0
-	ldrh	r3, [r4, #2564]
+.L1532:
+	ldrh	r3, [r4, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1532
-	.loc 5 596 0
+	bne	.L1541
 	cmp	r5, r3
-	beq	.L1533
-	.loc 5 597 0
-	strh	r5, [r4, #2564]	@ movhi
-.L1534:
-	.loc 5 607 0
-	ldrh	r0, [r4, #2564]
+	beq	.L1542
+	strh	r5, [r4, #2588]	@ movhi
+.L1543:
+	ldrh	r0, [r4, #2588]
 	movw	r7, #65535
-.LVL1323:
-	.loc 5 606 0
 	movs	r3, #0
-	strb	r3, [r4, #2572]
-	.loc 5 607 0
+	strb	r3, [r4, #2596]
 	cmp	r0, r7
-	beq	.L1532
-	.loc 5 608 0
+	beq	.L1541
 	bl	IsBlkInGcList
-.LVL1324:
-	cbz	r0, .L1537
-	.loc 5 609 0
-	strh	r7, [r4, #2564]	@ movhi
-.L1537:
-	.loc 5 611 0
-	ldrh	r2, [r4, #2564]
+	cbz	r0, .L1546
+	strh	r7, [r4, #2588]	@ movhi
+.L1546:
+	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1532
-	.loc 5 612 0
-	ldr	r0, .L1615+16
+	beq	.L1541
+	ldr	r0, .L1624+16
 	bl	make_superblock
-.LVL1325:
-	.loc 5 615 0
-	ldr	r2, .L1615+8
-	.loc 5 613 0
+	ldr	r2, .L1624+8
 	movs	r3, #0
-	strh	r3, [r4, #2566]	@ movhi
-	.loc 5 614 0
-	strb	r3, [r4, #2570]
-	.loc 5 615 0
-	strh	r3, [r2, #-226]	@ movhi
-	.loc 5 616 0
-	ldrh	r1, [r4, #2564]
-	ldr	r3, [r4, #2300]
+	strh	r3, [r4, #2590]	@ movhi
+	strb	r3, [r4, #2594]
+	strh	r3, [r2, #-186]	@ movhi
+	ldrh	r1, [r4, #2588]
+	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
-	strh	r3, [r2, #-224]	@ movhi
-.LVL1326:
-.L1532:
-	.loc 5 621 0
-	ldrh	r3, [r4, #2564]
-	ldrh	r2, [r4, #2324]
+	strh	r3, [r2, #-184]	@ movhi
+.L1541:
+	ldrh	r3, [r4, #2588]
+	ldrh	r2, [r4, #2348]
 	cmp	r2, r3
-	beq	.L1538
-	ldrh	r2, [r4, #2372]
+	beq	.L1547
+	ldrh	r2, [r4, #2396]
 	cmp	r2, r3
-	beq	.L1538
-	.loc 5 662 0
-	ldr	r7, .L1615+8
-.LVL1327:
-.L1539:
-	.loc 5 627 0
-	ldrh	r9, [r4, #2564]
+	beq	.L1547
+	ldr	r7, .L1624+8
+.L1548:
+	ldrh	r9, [r4, #2588]
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1540
-	.loc 5 628 0
+	bne	.L1549
 	movs	r3, #0
-	.loc 5 643 0
 	mov	r10, r3
-.LVL1328:
-	.loc 5 628 0
-	str	r3, [r4, #3136]
-.L1541:
-	.loc 5 631 0
-	ldrh	r8, [r4, #3132]
-.LVL1329:
+	str	r3, [r4, #3160]
+.L1550:
+	ldrh	r8, [r4, #3156]
 	mov	r0, r8
 	bl	List_get_gc_head_node
-.LVL1330:
 	uxth	fp, r0
-	.loc 5 632 0
 	cmp	fp, r9
-	.loc 5 631 0
-	strh	fp, [r4, #2564]	@ movhi
-	.loc 5 632 0
-	bne	.L1542
-	.loc 5 633 0
+	strh	fp, [r4, #2588]	@ movhi
+	bne	.L1551
 	movs	r3, #0
-	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 633 0
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1496
-.LVL1331:
-.L1524:
-	.loc 5 558 0
+	strh	r3, [r4, #3156]	@ movhi
+	b	.L1505
+.L1533:
 	movs	r3, #0
-	.loc 5 560 0
-	ldrh	r7, [r4, #2320]
-.LVL1332:
-	.loc 5 558 0
-	str	r3, [r4, #3136]
-	.loc 5 560 0
-	ldrh	r3, [r4, #3124]
-	ldr	r5, .L1615+8
+	ldrh	r7, [r4, #2344]
+	str	r3, [r4, #3160]
+	ldrh	r3, [r4, #3148]
+	ldr	r5, .L1624+8
 	cmp	r3, r7
-	bcs	.L1525
-	.loc 5 561 0
-	ldrh	r3, [r5, #-228]
-	cbnz	r3, .L1526
-	ldr	r3, [r4, #2480]
-	ldr	r2, [r4, #2476]
+	bcs	.L1534
+	ldrh	r3, [r5, #-188]
+	cbnz	r3, .L1535
+	ldr	r3, [r4, #2504]
+	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1527
-.L1526:
-	.loc 5 562 0
-	ldrh	r3, [r4, #2548]
+	bcs	.L1536
+.L1535:
+	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1610:
-	.loc 5 564 0
-	strh	r3, [r4, #3124]	@ movhi
-.L1612:
-	.loc 5 578 0
+.L1619:
+	strh	r3, [r4, #3148]	@ movhi
+.L1621:
 	bl	FtlReadRefresh
-.LVL1333:
-	.loc 5 579 0
-	ldrh	r0, [r5, #-228]
-	b	.L1496
-.L1527:
-	.loc 5 564 0
+	ldrh	r0, [r5, #-188]
+	b	.L1505
+.L1536:
 	movs	r3, #18
-	b	.L1610
-.L1525:
-	.loc 5 572 0
-	ldrh	r0, [r5, #-228]
+	b	.L1619
+.L1534:
+	ldrh	r0, [r5, #-188]
 	cmp	r0, #0
-	bne	.L1529
-	.loc 5 573 0
-	ldrh	r6, [r4, #2548]
+	bne	.L1538
+	ldrh	r6, [r4, #2572]
 	add	r3, r6, r6, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r4, #3124]	@ movhi
-	.loc 5 574 0
+	strh	r3, [r4, #3148]	@ movhi
 	bl	List_get_gc_head_node
-.LVL1334:
-	.loc 5 575 0
-	ldr	r3, [r4, #2300]
+	ldr	r3, [r4, #2324]
 	uxth	r0, r0
-	ldrh	r1, [r4, #80]
+	ldrh	r1, [r4, #104]
 	ldrh	r2, [r3, r0, lsl #1]
-	ldrh	r3, [r4, #8]
+	ldrh	r3, [r4, #32]
 	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1530
-	.loc 5 576 0
+	ble	.L1539
 	subs	r6, r6, #1
-	.loc 5 575 0
 	cmp	r7, r6
-	bge	.L1612
-.L1530:
-	.loc 5 584 0
+	bge	.L1621
+.L1539:
 	cmp	r2, #0
-	bne	.L1529
-	.loc 5 585 0
+	bne	.L1538
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1335:
-	.loc 5 586 0
-	ldrh	r0, [r4, #2320]
+	ldrh	r0, [r4, #2344]
 	adds	r0, r0, #1
-	b	.L1496
-.LVL1336:
-.L1533:
-	.loc 5 598 0
-	ldrh	r3, [r4, #3178]
+	b	.L1505
+.L1542:
+	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	beq	.L1534
-	.loc 5 600 0
-	ldr	r2, [r4, #2300]
+	beq	.L1543
+	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1535
-	.loc 5 601 0
-	strh	r5, [r4, #3178]	@ movhi
-.L1535:
-	.loc 5 602 0
-	ldrh	r3, [r4, #3178]
-	strh	r3, [r4, #2564]	@ movhi
-	.loc 5 603 0
+	cbnz	r3, .L1544
+	strh	r5, [r4, #3202]	@ movhi
+.L1544:
+	ldrh	r3, [r4, #3202]
+	strh	r3, [r4, #2588]	@ movhi
 	movw	r3, #65535
-	strh	r3, [r4, #3178]	@ movhi
-	b	.L1534
-.L1616:
+	strh	r3, [r4, #3202]	@ movhi
+	b	.L1543
+.L1625:
 	.align	2
-.L1615:
+.L1624:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LC103
-	.word	.LANCHOR0+2564
-.L1538:
-	.loc 5 622 0
+	.word	.LC104
+	.word	.LANCHOR0+2588
+.L1547:
 	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
-.LVL1337:
-.L1613:
-	.loc 5 648 0
-	ldr	r3, .L1617
-	ldrh	r0, [r3, #-228]
-	b	.L1496
-.LVL1338:
-.L1542:
+	strh	r3, [r4, #2588]	@ movhi
+.L1622:
+	ldr	r3, .L1626
+	ldrh	r0, [r3, #-188]
+	b	.L1505
+.L1551:
 	str	r0, [sp, #8]
-	.loc 5 636 0
 	mov	r0, fp
 	bl	IsBlkInGcList
-.LVL1339:
 	add	r8, r8, #1
 	ldr	r3, [sp, #8]
-	cbz	r0, .L1543
-	.loc 5 637 0
-	strh	r8, [r4, #3132]	@ movhi
-	b	.L1541
-.L1543:
-	.loc 5 641 0
+	cbz	r0, .L1552
+	strh	r8, [r4, #3156]	@ movhi
+	b	.L1550
+.L1552:
 	uxth	r0, r3
-	ldrh	ip, [r4, #8]
-	ldrh	r3, [r4, #78]
-	.loc 5 640 0
+	ldrh	ip, [r4, #32]
+	ldrh	r3, [r4, #102]
 	uxth	r8, r8
-	.loc 5 641 0
-	ldr	r2, [r4, #2300]
-	.loc 5 640 0
-	strh	r8, [r4, #3132]	@ movhi
-	.loc 5 641 0
+	ldr	r2, [r4, #2324]
+	strh	r8, [r4, #3156]	@ movhi
 	mul	r3, ip, r3
 	ldrh	r1, [r2, r0, lsl #1]
 	add	ip, r3, r3, lsr #31
 	cmp	r1, ip, asr #1
-	bgt	.L1545
-	.loc 5 642 0
+	bgt	.L1554
 	cmp	r8, #48
-	bls	.L1546
+	bls	.L1555
 	cmp	r1, #8
-	bls	.L1546
-	ldrh	r1, [r4, #3168]
+	bls	.L1555
+	ldrh	r1, [r4, #3192]
 	cmp	r1, #35
-	bhi	.L1546
-.L1545:
-	.loc 5 643 0
-	strh	r10, [r4, #3132]	@ movhi
-.L1546:
-	.loc 5 645 0
+	bhi	.L1555
+.L1554:
+	strh	r10, [r4, #3156]	@ movhi
+.L1555:
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r3, r2
-	bgt	.L1547
+	bgt	.L1556
 	cmp	r5, r9
-	bne	.L1547
-	.loc 5 647 0
+	bne	.L1556
 	movs	r3, #0
-	.loc 5 646 0
-	strh	r5, [r4, #2564]	@ movhi
-	.loc 5 647 0
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1613
-.L1547:
-	.loc 5 651 0
-	cbnz	r2, .L1548
-	.loc 5 652 0
+	strh	r5, [r4, #2588]	@ movhi
+	strh	r3, [r4, #3156]	@ movhi
+	b	.L1622
+.L1556:
+	cbnz	r2, .L1557
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1340:
-	.loc 5 653 0
-	ldrh	r3, [r4, #3132]
+	ldrh	r3, [r4, #3156]
 	adds	r3, r3, #1
-	strh	r3, [r4, #3132]	@ movhi
-	b	.L1541
-.L1548:
-	.loc 5 656 0
+	strh	r3, [r4, #3156]	@ movhi
+	b	.L1550
+.L1557:
 	movs	r3, #0
-	strb	r3, [r4, #2572]
-	.loc 5 658 0
-	ldrh	r3, [r4, #2324]
+	strb	r3, [r4, #2596]
+	ldrh	r3, [r4, #2348]
 	cmp	r3, fp
-	bne	.L1549
+	bne	.L1558
 	movw	r2, #658
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1626+4
+	ldr	r0, .L1626+8
 	bl	printk
-.LVL1341:
-.L1549:
-	.loc 5 659 0
-	ldrh	r2, [r4, #2564]
-	ldrh	r3, [r4, #2372]
+.L1558:
+	ldrh	r2, [r4, #2588]
+	ldrh	r3, [r4, #2396]
 	cmp	r2, r3
-	bne	.L1550
+	bne	.L1559
 	movw	r2, #659
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1626+4
+	ldr	r0, .L1626+8
 	bl	printk
-.LVL1342:
-.L1550:
-	.loc 5 660 0
-	ldrh	r2, [r4, #2564]
-	ldrh	r3, [r4, #2420]
+.L1559:
+	ldrh	r2, [r4, #2588]
+	ldrh	r3, [r4, #2444]
 	cmp	r2, r3
-	bne	.L1551
+	bne	.L1560
 	mov	r2, #660
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1626+4
+	ldr	r0, .L1626+8
 	bl	printk
-.LVL1343:
-.L1551:
-	.loc 5 661 0
-	ldr	r0, .L1617+12
+.L1560:
+	ldr	r0, .L1626+12
 	bl	make_superblock
-.LVL1344:
-	.loc 5 663 0
-	ldrh	r1, [r4, #2564]
-	.loc 5 662 0
+	ldrh	r1, [r4, #2588]
 	movs	r3, #0
-	.loc 5 663 0
-	ldr	r2, [r4, #2300]
-	.loc 5 662 0
-	strh	r3, [r7, #-226]	@ movhi
-	.loc 5 663 0
+	ldr	r2, [r4, #2324]
+	strh	r3, [r7, #-186]	@ movhi
 	ldrh	r2, [r2, r1, lsl #1]
-	.loc 5 664 0
-	strh	r3, [r4, #2566]	@ movhi
-	.loc 5 665 0
-	strb	r3, [r4, #2570]
-	.loc 5 663 0
-	strh	r2, [r7, #-224]	@ movhi
-.LVL1345:
-.L1540:
-	.loc 5 671 0
+	strh	r3, [r4, #2590]	@ movhi
+	strb	r3, [r4, #2594]
+	strh	r2, [r7, #-184]	@ movhi
+.L1549:
 	bl	FtlReadRefresh
-.LVL1346:
-	.loc 5 674 0
 	movs	r3, #1
-	str	r3, [r4, #3780]
-	.loc 5 675 0
-	ldrh	r3, [r4, #78]
-.LVL1347:
+	str	r3, [r4, #3820]
+	ldrh	r3, [r4, #102]
 	str	r3, [sp, #12]
-	.loc 5 676 0
-	ldrh	r3, [r4, #2566]
-.LVL1348:
+	ldrh	r3, [r4, #2590]
 	ldr	r1, [sp, #12]
-.LVL1349:
 	adds	r2, r3, r6
 	cmp	r2, r1
-	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r6, r2, r3
-.LVL1350:
-	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 677 0
 	it	gt
 	uxthgt	r6, r6
-.LVL1351:
-.L1611:
+.L1620:
 	str	r3, [sp, #8]
-	.loc 5 679 0
 	ldrh	r3, [sp, #8]
 	cmp	r6, r3
-	bls	.L1561
-	.loc 5 684 0
+	bls	.L1570
 	ldr	r3, [sp, #8]
-	.loc 5 683 0
 	movw	r10, #65535
-.LVL1352:
-	.loc 5 684 0
-	ldrh	r1, [r4, #2566]
+	ldrh	r1, [r4, #2590]
 	mov	fp, #20
-	.loc 5 681 0
-	ldrh	lr, [r4, #8]
-	.loc 5 684 0
-	ldr	r0, [r4, #3156]
+	ldrh	lr, [r4, #32]
+	ldr	r0, [r4, #3180]
 	add	r1, r1, r3
 	movs	r3, #0
-	ldr	ip, .L1617+16
+	ldr	ip, .L1626+16
 	mov	r8, r3
-	b	.L1562
-.LVL1353:
-.L1555:
-	.loc 5 682 0
+	b	.L1571
+.L1564:
 	ldrh	r2, [ip, #2]!
-.LVL1354:
-	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1554
-	.loc 5 684 0
+	beq	.L1563
 	mla	r9, fp, r8, r0
-	.loc 5 685 0
 	add	r8, r8, #1
-.LVL1355:
-	.loc 5 684 0
 	orr	r2, r1, r2, lsl #10
-.LVL1356:
-	.loc 5 685 0
 	uxth	r8, r8
-.LVL1357:
-	.loc 5 684 0
 	str	r2, [r9, #4]
-.LVL1358:
-.L1554:
+.L1563:
 	adds	r3, r3, #1
-.LVL1359:
-.L1562:
-	.loc 5 681 0
+.L1571:
 	uxth	r2, r3
-.LVL1360:
 	cmp	lr, r2
-	bhi	.L1555
-	.loc 5 689 0
+	bhi	.L1564
 	mov	fp, #0
-	ldrb	r2, [r4, #2572]	@ zero_extendqisi2
+	ldrb	r2, [r4, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.LVL1361:
-.L1556:
-	.loc 5 691 0
+.L1565:
 	uxth	r3, fp
 	cmp	r8, r3
-	bhi	.L1560
+	bhi	.L1569
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1611
-.L1560:
+	b	.L1620
+.L1569:
 	mov	r9, #20
-	.loc 5 692 0
-	ldr	r3, [r4, #3156]
+	ldr	r3, [r4, #3180]
 	mul	r9, r9, fp
 	add	r2, r3, r9
-	.loc 5 693 0
 	ldr	r3, [r3, r9]
 	adds	r3, r3, #1
-	beq	.L1557
-	.loc 5 692 0
+	beq	.L1566
 	ldr	r10, [r2, #12]
-	.loc 5 693 0
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1557
-	.loc 5 695 0
+	bne	.L1566
 	ldr	r3, [r10, #8]
-.LVL1362:
-	.loc 5 696 0
 	adds	r2, r3, #1
-	bne	.L1558
+	bne	.L1567
 	mov	r2, #696
-	ldr	r1, .L1617+4
-	ldr	r0, .L1617+8
+	ldr	r1, .L1626+4
+	ldr	r0, .L1626+8
 	str	r3, [sp, #16]
 	bl	printk
-.LVL1363:
 	ldr	r3, [sp, #16]
-.LVL1364:
-.L1558:
-	.loc 5 697 0
+.L1567:
 	movs	r2, #0
 	mov	r0, r3
 	add	r1, sp, #28
 	bl	log2phys
-.LVL1365:
-	.loc 5 698 0
-	ldr	r0, [r4, #3156]
+	ldr	r0, [r4, #3180]
 	ldr	r3, [sp, #28]
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1557
-	.loc 5 700 0
-	ldrh	r3, [r7, #-226]
-	.loc 5 701 0
+	bne	.L1566
+	ldrh	r3, [r7, #-186]
 	movs	r2, #20
-	ldr	r1, [r4, #3140]
+	ldr	r1, [r4, #3164]
 	str	r2, [sp, #20]
-	.loc 5 700 0
 	adds	r3, r3, #1
-	strh	r3, [r7, #-226]	@ movhi
-	.loc 5 701 0
-	ldr	r3, [r4, #3796]
+	strh	r3, [r7, #-186]	@ movhi
+	ldr	r3, [r4, #3836]
 	mla	r3, r2, r1, r3
 	ldr	r1, [r0, #16]
 	str	r1, [r3, #16]
 	str	r3, [sp, #16]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1366:
 	ldr	r3, [sp, #16]
-	.loc 5 703 0
-	ldr	r1, [r4, #3796]
+	ldr	r1, [r4, #3836]
 	ldr	r2, [sp, #20]
-	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 703 0
-	ldr	r3, [r4, #3140]
+	ldr	r3, [r4, #3164]
 	mla	r3, r2, r3, r1
-	ldr	r2, [r4, #3156]
+	ldr	r2, [r4, #3180]
 	add	r2, r2, r9
 	ldr	r1, [r2, #8]
 	str	r1, [r3, #8]
-	.loc 5 712 0
 	movs	r1, #1
-	.loc 5 704 0
 	ldr	r2, [r2, #12]
 	str	r2, [r3, #12]
-	.loc 5 705 0
 	ldr	r3, [sp, #28]
-.LVL1367:
 	str	r3, [r10, #12]
-	.loc 5 706 0
-	ldrh	r3, [r4, #2420]
-.LVL1368:
+	ldrh	r3, [r4, #2444]
 	strh	r3, [r10, #2]	@ movhi
-	.loc 5 709 0
-	ldr	r3, [r4, #2520]
-	.loc 5 712 0
-	ldr	r0, [r4, #3156]
-	.loc 5 709 0
+	ldr	r3, [r4, #2544]
+	ldr	r0, [r4, #3180]
 	str	r3, [r10, #4]
-	.loc 5 711 0
-	ldr	r3, [r4, #3140]
-	.loc 5 712 0
+	ldr	r3, [r4, #3164]
 	add	r0, r0, r9
-	.loc 5 711 0
 	adds	r3, r3, #1
-	str	r3, [r4, #3140]
-	.loc 5 712 0
+	str	r3, [r4, #3164]
 	bl	FtlGcBufAlloc
-.LVL1369:
-	.loc 5 713 0
-	ldrb	r2, [r4, #2427]	@ zero_extendqisi2
-	ldr	r3, [r4, #3140]
+	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
+	ldr	r3, [r4, #3164]
 	cmp	r2, r3
-	beq	.L1559
-	ldrh	r3, [r4, #2424]
-	cbnz	r3, .L1557
-.L1559:
-	.loc 5 714 0
+	beq	.L1568
+	ldrh	r3, [r4, #2448]
+	cbnz	r3, .L1566
+.L1568:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1370:
-	cbz	r0, .L1557
-.L1614:
-	.loc 5 729 0
+	cbz	r0, .L1566
+.L1623:
 	movs	r3, #0
-	.loc 5 730 0
-	ldrh	r0, [r7, #-228]
-	.loc 5 729 0
-	str	r3, [r4, #3780]
-	b	.L1496
-.L1557:
+	ldrh	r0, [r7, #-188]
+	str	r3, [r4, #3820]
+	b	.L1505
+.L1566:
 	add	fp, fp, #1
-	b	.L1556
-.LVL1371:
-.L1561:
-	.loc 5 723 0
-	ldrh	r3, [r4, #2566]
+	b	.L1565
+.L1570:
+	ldrh	r3, [r4, #2590]
 	add	r6, r6, r3
-.LVL1372:
-	.loc 5 725 0
 	ldr	r3, [sp, #12]
-.LVL1373:
-	.loc 5 723 0
 	uxth	r6, r6
-	.loc 5 725 0
 	cmp	r3, r6
-	.loc 5 723 0
-	strh	r6, [r4, #2566]	@ movhi
-	.loc 5 725 0
-	bls	.L1563
-	ldrh	r2, [r7, #-226]
-	ldrh	r3, [r7, #-224]
-.LVL1374:
+	strh	r6, [r4, #2590]	@ movhi
+	bls	.L1572
+	ldrh	r2, [r7, #-186]
+	ldrh	r3, [r7, #-184]
 	cmp	r2, r3
-	bne	.L1564
-.LVL1375:
-.L1563:
-	.loc 5 727 0
-	ldr	r3, [r4, #3140]
-.LVL1376:
-	cbz	r3, .L1565
-	.loc 5 728 0
+	bne	.L1573
+.L1572:
+	ldr	r3, [r4, #3164]
+	cbz	r3, .L1574
 	bl	Ftl_gc_temp_data_write_back
-.LVL1377:
 	cmp	r0, #0
-	bne	.L1614
-.L1565:
-	.loc 5 733 0
-	ldrh	r1, [r7, #-226]
-	cbnz	r1, .L1566
-	ldrh	r2, [r4, #2564]
-	ldr	r3, [r4, #2300]
+	bne	.L1623
+.L1574:
+	ldrh	r1, [r7, #-186]
+	cbnz	r1, .L1575
+	ldrh	r2, [r4, #2588]
+	ldr	r3, [r4, #2324]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1566
-	.loc 5 735 0
+	cbz	r0, .L1575
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 736 0
-	ldrh	r0, [r4, #2564]
+	ldrh	r0, [r4, #2588]
 	bl	update_vpc_list
-.LVL1378:
-	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1379:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1380:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1381:
-.L1566:
-	.loc 5 741 0
+.L1575:
 	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
-.L1564:
-	.loc 5 743 0
-	ldrh	r3, [r4, #2320]
+	strh	r3, [r4, #2588]	@ movhi
+.L1573:
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #2
-	bhi	.L1567
-	.loc 5 745 0
-	ldrh	r6, [r4, #78]
-.LVL1382:
-	b	.L1539
-.LVL1383:
-.L1567:
-	.loc 5 750 0
-	ldrh	r0, [r7, #-228]
-	.loc 5 748 0
+	bhi	.L1576
+	ldrh	r6, [r4, #102]
+	b	.L1548
+.L1576:
+	ldrh	r0, [r7, #-188]
 	movs	r2, #0
-	str	r2, [r4, #3780]
-	.loc 5 750 0
+	str	r2, [r4, #3820]
 	cmp	r0, #0
-	bne	.L1496
-	.loc 5 753 0
+	bne	.L1505
 	adds	r0, r3, #1
-	b	.L1496
-.LVL1384:
-.L1571:
-.LBE526:
-.LBE529:
-	.loc 5 479 0
+	b	.L1505
+.L1580:
 	movs	r0, #0
-	b	.L1496
-.L1618:
+	b	.L1505
+.L1627:
 	.align	2
-.L1617:
+.L1626:
 	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
-	.word	.LANCHOR0+2564
-	.word	.LANCHOR0+2578
-.LVL1385:
-.L1502:
-.LBB530:
-.LBB527:
-	.loc 5 527 0
+	.word	.LANCHOR0+2588
+	.word	.LANCHOR0+2602
+.L1511:
 	cmp	r7, #0
-	beq	.L1569
-.L1512:
-	.loc 5 557 0
-	ldrh	r2, [r4, #2420]
+	beq	.L1578
+.L1521:
+	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1580
-.L1570:
-	ldrh	r3, [r4, #3178]
+	bne	.L1589
+.L1579:
+	ldrh	r3, [r4, #3202]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1580
+	bne	.L1589
 	cmp	r5, r3
-	bne	.L1580
-	ldrh	r3, [r4, #2564]
+	bne	.L1589
+	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	beq	.L1524
-.L1529:
-	.loc 5 556 0
+	beq	.L1533
+.L1538:
 	movw	r5, #65535
-.L1580:
+.L1589:
 	movs	r6, #1
-.LVL1386:
-	b	.L1523
-.LVL1387:
-.L1504:
-	.loc 5 527 0
+	b	.L1532
+.L1513:
 	cmp	r7, #0
-	beq	.L1569
+	beq	.L1578
 	movw	r5, #65535
-	b	.L1570
-.L1503:
+	b	.L1579
+.L1512:
 	cmp	r7, #0
-	bne	.L1529
-	b	.L1569
-.LBE527:
-.LBE530:
-.LFE269:
+	bne	.L1538
+	b	.L1578
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	1
@@ -16923,17 +11167,12 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 	.fnstart
-.LFB270:
-	.loc 5 757 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1388:
-.LFE270:
 	.fnend
 	.size	sftl_gc, .-sftl_gc
 	.align	1
@@ -16945,428 +11184,258 @@ sftl_gc:
 	.type	FtlRead, %function
 FtlRead:
 	.fnstart
-.LFB164:
-	.loc 3 814 0
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1389:
-	.loc 3 824 0
 	cmp	r0, #16
-	.loc 3 814 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI188:
 	.pad #60
 	sub	sp, sp, #60
-.LCFI189:
-	.loc 3 814 0
 	mov	r7, r1
 	mov	r10, r3
 	str	r2, [sp, #28]
-	.loc 3 824 0
-	bne	.L1621
-	.loc 3 825 0
+	bne	.L1630
 	mov	r2, r3
-.LVL1390:
 	ldr	r1, [sp, #28]
 	add	r0, r7, #256
-.LVL1391:
 	bl	FtlVendorPartRead
-.LVL1392:
 	mov	r8, r0
-.LVL1393:
-.L1620:
-	.loc 3 901 0
+.L1629:
 	mov	r0, r8
-.LVL1394:
 	add	sp, sp, #60
-.LCFI190:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1395:
-.L1621:
-.LCFI191:
-	.loc 3 830 0
+.L1630:
 	ldr	r3, [sp, #28]
-.LVL1396:
-	ldr	r4, .L1652
+	ldr	r4, .L1661
 	adds	r3, r1, r3
-.LVL1397:
 	str	r3, [sp, #8]
 	ldr	r2, [sp, #8]
-	ldr	r3, [r4, #116]
+	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	bhi	.L1641
-	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1652+4
+	bhi	.L1650
+	ldr	r3, .L1661+4
 	ldr	r3, [r3]
 	adds	r5, r3, #1
-	beq	.L1642
-	.loc 3 833 0 is_stmt 1
+	beq	.L1651
 	bl	FtlCacheWriteBack
-.LVL1398:
-	.loc 3 835 0
-	ldrh	r5, [r4, #34]
+	ldrh	r5, [r4, #58]
 	mov	r0, r7
-	.loc 3 828 0
 	mov	r9, #0
-.LVL1399:
-	.loc 3 840 0
 	mov	r6, r9
-.LVL1400:
-	.loc 3 815 0
 	mov	r8, r9
-	.loc 3 835 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL1401:
-	.loc 3 836 0
 	ldr	r3, [sp, #8]
 	mov	r1, r5
-	.loc 3 835 0
 	str	r0, [sp, #12]
-	.loc 3 836 0
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
-.LVL1402:
-	.loc 3 837 0
 	ldr	r3, [sp, #12]
-.LVL1403:
-	.loc 3 835 0
 	ldr	r5, [sp, #12]
-.LVL1404:
-	.loc 3 836 0
 	str	r0, [sp, #16]
-	.loc 3 837 0
 	rsb	r3, r3, #1
-.LVL1405:
-	.loc 3 828 0
 	str	r9, [sp, #24]
-.LVL1406:
-	.loc 3 837 0
 	add	r3, r3, r0
-.LVL1407:
-	.loc 3 820 0
 	str	r9, [sp, #20]
-	.loc 3 837 0
 	str	r3, [sp, #4]
-	.loc 3 841 0
 	ldr	r2, [sp, #4]
-.LVL1408:
-	ldr	r3, [r4, #2484]
+	ldr	r3, [r4, #2508]
 	add	r3, r3, r2
-	str	r3, [r4, #2484]
-.LVL1409:
-.L1623:
-	.loc 3 842 0
+	str	r3, [r4, #2508]
+.L1632:
 	ldr	r3, [sp, #4]
-.LVL1410:
-	cbnz	r3, .L1639
-	.loc 3 898 0
-	ldr	r3, .L1652
-.LVL1411:
-	ldrh	r2, [r3, #3182]
-	cbnz	r2, .L1640
-	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r3, #2320]
+	cbnz	r3, .L1648
+	ldr	r3, .L1661
+	ldrh	r2, [r3, #3206]
+	cbnz	r2, .L1649
+	ldrh	r3, [r3, #2344]
 	cmp	r3, #31
-	bhi	.L1620
-.L1640:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1629
+.L1649:
 	movs	r1, #1
 	movs	r0, #0
-.LVL1412:
 	bl	rk_ftl_garbage_collect
-.LVL1413:
-	b	.L1620
-.LVL1414:
-.L1639:
-	.loc 3 843 0
+	b	.L1629
+.L1648:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r5
-.LVL1415:
 	bl	log2phys
-.LVL1416:
-	.loc 3 844 0
 	ldr	r2, [sp, #52]
 	adds	r0, r2, #1
-	bne	.L1624
+	bne	.L1633
 	mov	fp, #0
-.LVL1417:
-.L1625:
-	.loc 3 845 0 discriminator 1
-	ldrh	r0, [r4, #34]
-.LVL1418:
+.L1634:
+	ldrh	r0, [r4, #58]
 	cmp	fp, r0
-	bcc	.L1627
-.L1628:
-	.loc 3 874 0
+	bcc	.L1636
+.L1637:
 	ldr	r3, [sp, #4]
-.LVL1419:
-	.loc 3 872 0
 	adds	r5, r5, #1
-	.loc 3 874 0
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1632
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #8]
-.LVL1420:
+	beq	.L1641
+	ldrh	r3, [r4, #32]
 	cmp	r6, r3, lsl #2
-	bne	.L1623
-.LVL1421:
-.L1632:
-	.loc 3 875 0 is_stmt 1
+	bne	.L1632
+.L1641:
 	cmp	r6, #0
-	beq	.L1623
-	.loc 3 876 0
+	beq	.L1632
 	movs	r2, #0
 	mov	r1, r6
-	ldr	r0, [r4, #3792]
-	.loc 3 877 0
+	ldr	r0, [r4, #3832]
 	mov	fp, #0
-.LVL1422:
-	.loc 3 876 0
 	bl	FlashReadPages
-.LVL1423:
-	.loc 3 883 0
 	lsl	r3, r9, #9
 	str	r3, [sp, #40]
-	.loc 3 880 0
 	ldr	r3, [sp, #20]
-.LVL1424:
 	lsls	r3, r3, #9
-.LVL1425:
 	str	r3, [sp, #32]
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-.L1638:
+.L1647:
 	movs	r3, #20
-	.loc 3 878 0
-	ldr	r2, [r4, #3792]
+	ldr	r2, [r4, #3832]
 	mul	r3, r3, fp
 	ldr	r0, [sp, #12]
-.LVL1426:
 	add	r2, r2, r3
 	ldr	r1, [r2, #16]
 	cmp	r0, r1
-	bne	.L1634
-	.loc 3 879 0
+	bne	.L1643
 	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3776]
+	ldr	r2, [r4, #3816]
 	cmp	r1, r2
-	bne	.L1635
+	bne	.L1644
 	str	r3, [sp, #44]
-	.loc 3 880 0
 	mov	r0, r10
-.LVL1427:
 	ldr	r3, [sp, #32]
 	ldr	r2, [sp, #36]
 	add	r1, r1, r3
-.LVL1428:
-.L1651:
-	.loc 3 883 0
+.L1660:
 	bl	ftl_memcpy
-.LVL1429:
 	ldr	r3, [sp, #44]
-.LVL1430:
-.L1635:
-	.loc 3 885 0
-	ldr	r2, [r4, #3792]
+.L1644:
+	ldr	r2, [r4, #3832]
 	ldr	r0, [r2, r3]
-.LVL1431:
 	add	ip, r2, r3
 	adds	r1, r0, #1
-	.loc 3 886 0
 	itttt	eq
-	ldreq	r1, [r4, #2684]
-	.loc 3 887 0
+	ldreq	r1, [r4, #2708]
 	moveq	r8, r0
-	.loc 3 886 0
 	addeq	r1, r1, #1
-	streq	r1, [r4, #2684]
-	.loc 3 889 0
+	streq	r1, [r4, #2708]
 	ldr	r3, [r2, r3]
 	cmp	r3, #256
-	bne	.L1637
-.LBB537:
-	.loc 3 890 0
+	bne	.L1646
 	ldr	r0, [ip, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1432:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1433:
-.L1637:
-.LBE537:
-	.loc 3 877 0 discriminator 2
+.L1646:
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L1638
-	.loc 3 894 0
+	bne	.L1647
 	movs	r6, #0
-	b	.L1623
-.LVL1434:
-.L1627:
-	.loc 3 846 0
+	b	.L1632
+.L1636:
 	mla	r0, r0, r5, fp
-.LVL1435:
-	.loc 3 847 0
 	cmp	r7, r0
-	bhi	.L1626
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1635
 	ldr	r3, [sp, #8]
 	cmp	r3, r0
-	bls	.L1626
-	.loc 3 848 0 is_stmt 1
+	bls	.L1635
 	subs	r0, r0, r7
-.LVL1436:
-.LBB538:
-.LBB539:
-.LBB540:
-	.loc 1 202 0
 	mov	r1, #512
 	add	r0, r10, r0, lsl #9
 	bl	__memzero
-.LVL1437:
-.L1626:
-.LBE540:
-.LBE539:
-.LBE538:
-	.loc 3 845 0 discriminator 2
+.L1635:
 	add	fp, fp, #1
-	b	.L1625
-.LVL1438:
-.L1624:
-	.loc 3 851 0
-	ldr	r3, [r4, #3792]
+	b	.L1634
+.L1633:
+	ldr	r3, [r4, #3832]
 	movs	r1, #20
-	ldrh	fp, [r4, #34]
-.LVL1439:
+	ldrh	fp, [r4, #58]
 	mla	r3, r1, r6, r3
 	str	r2, [r3, #4]
-	.loc 3 852 0
 	ldr	r2, [sp, #12]
-.LVL1440:
 	cmp	r5, r2
-	bne	.L1629
-	.loc 3 853 0
-	ldr	r2, [r4, #3776]
-.LVL1441:
-	.loc 3 854 0
+	bne	.L1638
+	ldr	r2, [r4, #3816]
 	mov	r1, fp
 	mov	r0, r7
-	.loc 3 853 0
 	str	r3, [sp, #32]
 	str	r2, [r3, #8]
-	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1442:
-	.loc 3 855 0
 	sub	r2, fp, r1
-	.loc 3 854 0
 	str	r1, [sp, #20]
-.LVL1443:
 	ldr	r1, [sp, #28]
-.LVL1444:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
-	.loc 3 857 0
 	cmp	r3, fp
 	str	r3, [sp, #24]
 	ldr	r3, [sp, #32]
-	bne	.L1630
-	.loc 3 858 0
+	bne	.L1639
 	str	r10, [r3, #8]
-.L1630:
-	.loc 3 867 0
-	ldrh	r2, [r4, #88]
-	ldr	r1, [r4, #3772]
-.LVL1445:
-	.loc 3 868 0
+.L1639:
+	ldrh	r2, [r4, #112]
+	ldr	r1, [r4, #3812]
 	str	r5, [r3, #16]
-	.loc 3 867 0
 	muls	r2, r6, r2
-	.loc 3 869 0
 	adds	r6, r6, #1
-	.loc 3 867 0
 	bic	r2, r2, #3
 	add	r2, r2, r1
 	str	r2, [r3, #12]
-	b	.L1628
-.LVL1446:
-.L1629:
-	.loc 3 859 0
+	b	.L1637
+.L1638:
 	ldr	r2, [sp, #16]
-.LVL1447:
 	cmp	r5, r2
-	bne	.L1631
-	.loc 3 860 0
-	ldr	r2, [r4, #3768]
-.LVL1448:
-	.loc 3 861 0
+	bne	.L1640
+	ldr	r2, [r4, #3808]
 	ldr	r1, [sp, #8]
-	.loc 3 860 0
 	str	r2, [r3, #8]
-	.loc 3 861 0
 	mul	r2, fp, r5
 	sub	r9, r1, r2
-	.loc 3 862 0
 	cmp	fp, r9
-	bne	.L1630
-.L1650:
-	.loc 3 865 0
+	bne	.L1639
+.L1659:
 	subs	r2, r2, r7
 	add	r2, r10, r2, lsl #9
 	str	r2, [r3, #8]
-	b	.L1630
-.LVL1449:
-.L1631:
+	b	.L1639
+.L1640:
 	mul	r2, r5, fp
-.LVL1450:
-	b	.L1650
-.LVL1451:
-.L1634:
-	.loc 3 881 0
+	b	.L1659
+.L1643:
 	ldr	r0, [sp, #16]
-.LVL1452:
 	cmp	r0, r1
-	bne	.L1635
-	.loc 3 882 0
+	bne	.L1644
 	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3768]
+	ldr	r2, [r4, #3808]
 	cmp	r1, r2
-	bne	.L1635
+	bne	.L1644
 	str	r3, [sp, #44]
-	.loc 3 883 0
-	ldrh	r0, [r4, #34]
-.LVL1453:
+	ldrh	r0, [r4, #58]
 	ldr	r3, [sp, #16]
-.LVL1454:
 	ldr	r2, [sp, #40]
 	muls	r0, r3, r0
 	subs	r0, r0, r7
 	add	r0, r10, r0, lsl #9
-	b	.L1651
-.LVL1455:
-.L1641:
-	.loc 3 831 0
+	b	.L1660
+.L1650:
 	mov	r8, #-1
-	b	.L1620
-.L1642:
+	b	.L1629
+.L1651:
 	mov	r8, r3
-	b	.L1620
-.L1653:
+	b	.L1629
+.L1662:
 	.align	2
-.L1652:
+.L1661:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-.LFE164:
 	.fnend
 	.size	FtlRead, .-FtlRead
 	.align	1
@@ -17378,23 +11447,14 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 	.fnstart
-.LFB169:
-	.loc 3 1204 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1456:
-	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1457:
 	mov	r1, r0
-.LVL1458:
 	movs	r0, #0
-.LVL1459:
 	b	FtlRead
-.LVL1460:
-.LFE169:
 	.fnend
 	.size	sftl_read, .-sftl_read
 	.align	1
@@ -17406,205 +11466,120 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 	.fnstart
-.LFB167:
-	.loc 3 962 0
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1461:
-	.loc 3 970 0
 	cmp	r0, #16
-	.loc 3 962 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-.LCFI192:
 	.pad #68
 	sub	sp, sp, #68
-.LCFI193:
-	.loc 3 962 0
 	mov	r8, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	.loc 3 970 0
-	bne	.L1656
-	.loc 3 971 0
+	bne	.L1665
 	mov	r2, r3
-.LVL1462:
 	ldr	r1, [sp, #12]
 	add	r0, r8, #256
-.LVL1463:
 	bl	FtlVendorPartWrite
-.LVL1464:
-.L1655:
-	.loc 3 1153 0
+.L1664:
 	add	sp, sp, #68
-.LCFI194:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.LVL1465:
-.L1656:
-.LCFI195:
-	.loc 3 974 0
+.L1665:
 	ldr	r3, [sp, #12]
-.LVL1466:
-	ldr	r4, .L1722
+	ldr	r4, .L1731
 	adds	r7, r1, r3
-	ldr	r3, [r4, #116]
-.LVL1467:
+	ldr	r3, [r4, #140]
 	cmp	r7, r3
-	bhi	.L1698
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r6, .L1722+4
+	bhi	.L1707
+	ldr	r6, .L1731+4
 	ldr	r0, [r6]
-.LVL1468:
 	adds	r5, r0, #1
-	beq	.L1655
-	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1722+8
+	beq	.L1664
+	ldr	r3, .L1731+8
 	mov	r2, #2048
-	.loc 3 978 0
-	ldrh	r5, [r4, #34]
+	ldrh	r5, [r4, #58]
 	mov	r0, r8
-	.loc 3 977 0
-	str	r2, [r3, #-220]
-	.loc 3 978 0
+	str	r2, [r3, #-180]
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL1469:
-	.loc 3 979 0
 	mov	r1, r5
-	.loc 3 978 0
 	mov	r10, r0
-.LVL1470:
-	.loc 3 979 0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-.LVL1471:
-	.loc 3 980 0
 	sub	r7, r0, r10
-	.loc 3 983 0
-	ldr	fp, [r4, #3948]
-	.loc 3 980 0
+	ldr	fp, [r4, #3988]
 	adds	r3, r7, #1
-.LVL1472:
-	.loc 3 982 0
 	adds	r2, r7, #1
-.LVL1473:
-	.loc 3 980 0
 	str	r3, [sp, #8]
-	.loc 3 982 0
-	ldr	r3, [r4, #2492]
-	.loc 3 979 0
+	ldr	r3, [r4, #2516]
 	str	r0, [sp, #20]
-.LVL1474:
-	.loc 3 982 0
 	add	r3, r3, r2
-	str	r3, [r4, #2492]
-	.loc 3 983 0
+	str	r3, [r4, #2516]
 	cmp	fp, #0
-	beq	.L1658
-	.loc 3 984 0
+	beq	.L1667
 	ldr	r3, [fp, #16]
 	cmp	r10, r3
-	beq	.L1659
-	.loc 3 985 0
+	beq	.L1668
 	bl	FtlCacheWriteBack
-.LVL1475:
-.L1658:
-	.loc 3 1008 0
+.L1667:
 	ldr	r3, [r6, #8]
 	cmp	r3, #0
-	beq	.L1700
-	.loc 3 1009 0 discriminator 1
-	ldr	r5, .L1722+12
-	.loc 3 1008 0 discriminator 1
-	ldrh	r2, [r4, #2328]
-.LVL1476:
-	.loc 3 1009 0 discriminator 1
+	beq	.L1709
+	ldr	r5, .L1731+12
+	ldrh	r2, [r4, #2352]
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.LVL1477:
-.L1661:
-	.loc 3 1012 0
-	ldr	r4, .L1722
-	.loc 3 1068 0
+.L1670:
+	ldr	r4, .L1731
 	mov	r6, r10
-.LVL1478:
-.L1662:
-	.loc 3 1011 0
+.L1671:
 	ldr	r3, [sp, #8]
-.LVL1479:
 	cmp	r3, #0
-	beq	.L1696
-	.loc 3 1012 0
+	beq	.L1705
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r4, #8]
-.LVL1480:
+	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1663
-	.loc 3 1012 0 is_stmt 0 discriminator 1
+	bcc	.L1672
 	mov	r2, #1012
-	ldr	r1, .L1722+16
-	ldr	r0, .L1722+20
+	ldr	r1, .L1731+16
+	ldr	r0, .L1731+20
 	bl	printk
-.LVL1481:
-.L1663:
-	.loc 3 1013 0 is_stmt 1
+.L1672:
 	ldrh	r9, [r5, #4]
-.LVL1482:
 	cmp	r9, #0
-	bne	.L1664
-	.loc 3 1014 0
+	bne	.L1673
 	bl	FtlCacheWriteBack
-.LVL1483:
-	.loc 3 1016 0
-	ldr	r3, .L1722+12
-	ldr	r7, .L1722+4
+	ldr	r3, .L1731+12
+	ldr	r7, .L1731+4
 	cmp	r5, r3
-	bne	.L1665
-	.loc 3 1017 0
-	ldrh	r9, [r4, #2376]
+	bne	.L1674
+	ldrh	r9, [r4, #2400]
 	cmp	r9, #0
-	bne	.L1666
-	.loc 3 1018 0
+	bne	.L1675
 	add	r0, r5, #48
 	bl	allocate_new_data_superblock
-.LVL1484:
-	.loc 3 1019 0
 	str	r9, [r7, #8]
-.L1666:
-	.loc 3 1023 0
-	ldr	r5, .L1722+12
-.LVL1485:
-	.loc 3 1021 0
-	ldr	r0, .L1722+12
+.L1675:
+	ldr	r5, .L1731+12
+	ldr	r0, .L1731+12
 	bl	allocate_new_data_superblock
-.LVL1486:
-	.loc 3 1022 0
 	ldr	r2, [r7, #8]
-	.loc 3 1023 0
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.LVL1487:
-.L1667:
-	.loc 3 1033 0
+.L1676:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1664
-	.loc 3 1034 0
+	cbnz	r3, .L1673
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1488:
-.L1664:
-	.loc 3 1041 0
+.L1673:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	.loc 3 1043 0
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp, #8]
-.LVL1489:
-	.loc 3 1041 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -17612,122 +11587,76 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1045 0
-	ldrh	r3, [r4, #8]
+	ldrh	r3, [r4, #32]
 	str	r2, [sp, #36]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1668
-	.loc 3 1045 0 is_stmt 0 discriminator 1
+	bcc	.L1677
 	movw	r2, #1045
-	ldr	r1, .L1722+16
-.LVL1490:
-	ldr	r0, .L1722+20
+	ldr	r1, .L1731+16
+	ldr	r0, .L1731+20
 	bl	printk
-.LVL1491:
-.L1668:
-	.loc 3 1068 0 is_stmt 1 discriminator 1
+.L1677:
 	mov	r9, #0
-.LVL1492:
-.L1669:
-	.loc 3 1046 0 discriminator 1
+.L1678:
 	ldr	r3, [sp, #36]
 	cmp	r9, r3
-	bne	.L1690
-.L1670:
-	.loc 3 1127 0
-	ldr	r3, [r4, #3948]
+	bne	.L1699
+.L1679:
+	ldr	r3, [r4, #3988]
 	cmp	r3, #0
-	beq	.L1691
-	.loc 3 1129 0
+	beq	.L1700
 	ldr	r3, [sp, #8]
-.LVL1493:
-	.loc 3 1130 0
 	subs	r9, r9, #1
-	.loc 3 1129 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-	.loc 3 1130 0
-	bne	.L1691
-.L1696:
-	.loc 3 1137 0
+	bne	.L1700
+.L1705:
 	ldr	r3, [sp, #20]
-.LVL1494:
 	movs	r0, #0
-	.loc 3 1139 0
-	ldr	r4, .L1722
-	.loc 3 1137 0
+	ldr	r4, .L1731
 	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
-.LVL1495:
-	.loc 3 1139 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1693
-	.loc 3 1141 0
+	bhi	.L1702
 	movw	r5, #65535
-.LVL1496:
-.L1717:
-	ldrh	r3, [r4, #2564]
+.L1726:
+	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	bne	.L1697
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #3178]
+	bne	.L1706
+	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	bne	.L1697
-	.loc 3 1142 0 is_stmt 1
+	bne	.L1706
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1497:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1498:
-.L1697:
-	.loc 3 1145 0
+.L1706:
 	movs	r1, #1
-	.loc 3 1143 0
 	movs	r3, #128
-	.loc 3 1145 0
 	mov	r0, r1
-	.loc 3 1143 0
-	strh	r3, [r4, #3126]	@ movhi
-	.loc 3 1144 0
-	strh	r3, [r4, #3124]	@ movhi
-	.loc 3 1145 0
+	strh	r3, [r4, #3150]	@ movhi
+	strh	r3, [r4, #3148]	@ movhi
 	bl	rk_ftl_garbage_collect
-.LVL1499:
-	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1500:
-	.loc 3 1147 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #8
-	bls	.L1717
-	b	.L1693
-.LVL1501:
-.L1659:
-	.loc 3 987 0
-	ldr	r3, [r4, #2496]
-	.loc 3 988 0
+	bls	.L1726
+	b	.L1702
+.L1668:
+	ldr	r3, [r4, #2520]
 	mov	r1, r5
 	mov	r0, r8
-	.loc 3 987 0
 	adds	r3, r3, #1
-	str	r3, [r4, #2496]
-	.loc 3 988 0
+	str	r3, [r4, #2520]
 	bl	__aeabi_uidivmod
-.LVL1502:
 	ldr	r2, [sp, #12]
-.LVL1503:
-	.loc 3 989 0
 	subs	r5, r5, r1
-	.loc 3 992 0
 	ldr	r0, [fp, #8]
-	.loc 3 988 0
 	mov	r3, r1
-	.loc 3 992 0
 	ldr	r1, [sp, #4]
 	cmp	r5, r2
 	it	cs
@@ -17735,430 +11664,280 @@ FtlWrite:
 	lsl	r9, r5, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r9
-.LVL1504:
 	bl	ftl_memcpy
-.LVL1505:
-	.loc 3 994 0
-	cbnz	r7, .L1660
-.LVL1506:
-.L1693:
-	.loc 3 995 0
+	cbnz	r7, .L1669
+.L1702:
 	movs	r0, #0
-	b	.L1655
-.LVL1507:
-.L1660:
-	.loc 3 996 0
+	b	.L1664
+.L1669:
 	ldr	r3, [sp, #12]
-.LVL1508:
-	.loc 3 997 0
 	add	r8, r8, r5
-	.loc 3 999 0
 	add	r10, r10, #1
-	.loc 3 996 0
 	subs	r3, r3, r5
 	str	r3, [sp, #12]
-	.loc 3 998 0
 	ldr	r3, [sp, #4]
-.LVL1509:
 	add	r3, r3, r9
 	str	r3, [sp, #4]
-	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1510:
 	str	r7, [sp, #8]
-	b	.L1658
-.LVL1511:
-.L1700:
-	.loc 3 1006 0
-	ldr	r5, .L1722+12
-.LVL1512:
-	b	.L1661
-.LVL1513:
-.L1665:
-	.loc 3 1028 0
-	ldrh	r2, [r4, #2328]
-	.loc 3 1027 0
+	b	.L1667
+.L1709:
+	ldr	r5, .L1731+12
+	b	.L1670
+.L1674:
+	ldrh	r2, [r4, #2352]
 	str	r9, [r7, #8]
-	.loc 3 1028 0
-	cbnz	r2, .L1703
-	.loc 3 1029 0
+	cbnz	r2, .L1712
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1514:
-	b	.L1667
-.L1703:
+	b	.L1676
+.L1712:
 	mov	r5, r3
-	b	.L1664
-.LVL1515:
-.L1690:
-	.loc 3 1047 0
+	b	.L1673
+.L1699:
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1670
-	.loc 3 1051 0
+	beq	.L1679
 	movs	r2, #0
 	add	r1, sp, #40
-.LVL1516:
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1517:
-	.loc 3 1052 0
 	mov	r0, r5
 	mul	r7, r7, r9
 	bl	get_new_active_ppa
-.LVL1518:
-	.loc 3 1055 0
-	ldrh	r2, [r4, #88]
-	.loc 3 1054 0
-	ldr	r3, [r4, #3800]
-	.loc 3 1055 0
+	ldrh	r2, [r4, #112]
+	ldr	r3, [r4, #3840]
 	mul	r1, r2, r9
-	.loc 3 1054 0
 	add	r3, r3, r7
 	str	r0, [r3, #4]
-	.loc 3 1056 0
 	str	r6, [r3, #16]
-	.loc 3 1055 0
 	bic	r1, r1, #3
 	str	r1, [sp, #28]
 	ldr	r0, [sp, #28]
-	ldr	r1, [r4, #3772]
+	ldr	r1, [r4, #3812]
 	add	fp, r1, r0
 	str	r1, [sp, #32]
 	str	fp, [r3, #12]
-	.loc 3 1059 0
 	movs	r1, #0
 	mov	r0, fp
 	bl	ftl_memset
-.LVL1519:
-	.loc 3 1061 0
 	cmp	r6, r10
-	beq	.L1671
-	.loc 3 1061 0 is_stmt 0 discriminator 1
+	beq	.L1680
 	ldr	r3, [sp, #20]
-.LVL1520:
 	cmp	r6, r3
-	bne	.L1716
-	.loc 3 1069 0 is_stmt 1
+	bne	.L1725
 	ldr	r3, [sp, #12]
-.LVL1521:
 	add	r2, r8, r3
-	ldrh	r3, [r4, #34]
-.LVL1522:
+	ldrh	r3, [r4, #58]
 	smulbb	r3, r3, r6
 	subs	r2, r2, r3
 	uxth	r3, r2
 	str	r3, [sp, #16]
-	.loc 3 1068 0
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L1674
-.L1671:
-	.loc 3 1063 0
-	ldrh	r2, [r4, #34]
+	b	.L1683
+.L1680:
+	ldrh	r2, [r4, #58]
 	mov	r0, r8
 	mov	r1, r2
 	str	r2, [sp, #16]
 	bl	__aeabi_uidivmod
-.LVL1523:
-	.loc 3 1064 0
 	ldr	r2, [sp, #16]
-	.loc 3 1063 0
 	str	r1, [sp, #24]
-	.loc 3 1064 0
 	subs	r2, r2, r1
 	ldr	r1, [sp, #12]
-.LVL1524:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #16]
-.L1674:
-	.loc 3 1072 0
-	ldrh	r3, [r4, #34]
+.L1683:
+	ldrh	r3, [r4, #58]
 	ldr	r2, [sp, #16]
 	cmp	r2, r3
-	.loc 3 1074 0
-	ldr	r3, [r4, #3800]
-	.loc 3 1072 0
-	bne	.L1675
-	.loc 3 1073 0
+	ldr	r3, [r4, #3840]
+	bne	.L1684
 	cmp	r6, r10
-	.loc 3 1074 0
 	add	r7, r7, r3
-	.loc 3 1073 0
-	bne	.L1676
-	.loc 3 1074 0
+	bne	.L1685
 	ldr	r3, [sp, #4]
-.LVL1525:
-.L1720:
-	.loc 3 1117 0
+.L1729:
 	str	r3, [r7, #8]
-.LVL1526:
-	b	.L1677
-.LVL1527:
-.L1676:
-	.loc 3 1076 0
+	b	.L1686
+.L1685:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #4]
-.LVL1528:
 	muls	r2, r6, r2
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-.LVL1529:
-.L1677:
-	.loc 3 1119 0
+.L1686:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r4, #8]
-.LVL1530:
+	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1687
-	.loc 3 1119 0 is_stmt 0 discriminator 1
+	bcc	.L1696
 	movw	r2, #1119
-	ldr	r1, .L1722+16
-.LVL1531:
-	ldr	r0, .L1722+20
+	ldr	r1, .L1731+16
+	ldr	r0, .L1731+20
 	bl	printk
-.LVL1532:
-.L1687:
-	.loc 3 1120 0 is_stmt 1
+.L1696:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
-.LVL1533:
-	.loc 3 1046 0
 	add	r9, r9, #1
-	.loc 3 1120 0
 	strh	r3, [r2, r1]	@ movhi
-	.loc 3 1121 0
-	ldr	r3, [r4, #2520]
-	.loc 3 1122 0
+	ldr	r3, [r4, #2544]
 	str	r6, [fp, #8]
-	.loc 3 1125 0
 	adds	r6, r6, #1
-	.loc 3 1121 0
 	str	r3, [fp, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
-	str	r3, [r4, #2520]
-	.loc 3 1123 0
+	str	r3, [r4, #2544]
 	ldr	r3, [sp, #40]
-.LVL1534:
 	str	r3, [fp, #12]
-	.loc 3 1124 0
 	ldrh	r3, [r5]
-.LVL1535:
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1669
-.L1723:
+	b	.L1678
+.L1732:
 	.align	2
-.L1722:
+.L1731:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
+	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+574
 	.word	.LC1
-.LVL1536:
-.L1675:
-	.loc 3 1079 0
+.L1684:
 	cmp	r6, r10
-	.loc 3 1080 0
 	add	r3, r3, r7
 	ite	eq
-	ldreq	r2, [r4, #3776]
-	.loc 3 1082 0
-	ldrne	r2, [r4, #3768]
+	ldreq	r2, [r4, #3816]
+	ldrne	r2, [r4, #3808]
 	str	r2, [r3, #8]
-	.loc 3 1084 0
 	ldr	r3, [sp, #40]
 	adds	r1, r3, #1
-.LVL1537:
-	beq	.L1680
-.LBB541:
-	.loc 3 1086 0
+	beq	.L1689
 	str	r3, [sp, #48]
-	.loc 3 1090 0
 	movs	r1, #1
-	.loc 3 1088 0
-	ldr	r3, [r4, #3800]
-	.loc 3 1090 0
+	ldr	r3, [r4, #3840]
 	add	r0, sp, #44
-	.loc 3 1087 0
 	str	r6, [sp, #60]
-	.loc 3 1088 0
 	add	r3, r3, r7
 	ldr	r2, [r3, #8]
-	.loc 3 1089 0
 	ldr	r3, [r3, #12]
-	.loc 3 1088 0
 	str	r2, [sp, #52]
-	.loc 3 1090 0
 	movs	r2, #0
-	.loc 3 1089 0
 	str	r3, [sp, #56]
-	.loc 3 1090 0
 	bl	FlashReadPages
-.LVL1538:
-	.loc 3 1091 0
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1681
-	.loc 3 1092 0
-	ldr	r3, [r4, #2684]
+	bne	.L1690
+	ldr	r3, [r4, #2708]
 	adds	r3, r3, #1
-	str	r3, [r4, #2684]
-.L1684:
+	str	r3, [r4, #2708]
+.L1693:
 	ldr	r3, [sp, #16]
-.LBE541:
-	.loc 3 1104 0
 	cmp	r6, r10
 	lsl	r2, r3, #9
-	bne	.L1685
-	.loc 3 1105 0
-	ldr	r3, [r4, #3800]
+	bne	.L1694
+	ldr	r3, [r4, #3840]
 	ldr	r1, [sp, #4]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #24]
 	add	r0, r0, r3, lsl #9
-.L1719:
-	.loc 3 1107 0
+.L1728:
 	bl	ftl_memcpy
-.LVL1539:
-	.loc 3 1109 0
 	ldr	r3, [sp, #20]
-.LVL1540:
 	cmp	r6, r3
-	bne	.L1677
-	.loc 3 1110 0
+	bne	.L1686
 	ldrh	r3, [r5, #4]
-.LVL1541:
 	cmp	r3, #0
-	beq	.L1677
-	.loc 3 1111 0
-	ldr	r3, [r4, #3800]
+	beq	.L1686
+	ldr	r3, [r4, #3840]
 	add	r7, r7, r3
-	.loc 3 1112 0
-	ldr	r3, .L1724
-	.loc 3 1111 0
-	str	r7, [r4, #3948]
-	.loc 3 1112 0
-	str	r5, [r3, #-236]
-	b	.L1677
-.L1681:
-.LBB542:
-	.loc 3 1094 0
+	ldr	r3, .L1733
+	str	r7, [r4, #3988]
+	str	r5, [r3, #-196]
+	b	.L1686
+.L1690:
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1683
-	.loc 3 1095 0
-	ldr	r3, [r4, #2684]
-	.loc 3 1096 0
+	beq	.L1692
+	ldr	r3, [r4, #2708]
 	mov	r2, r6
-	ldr	r0, .L1724+4
-	.loc 3 1095 0
+	ldr	r0, .L1733+4
 	adds	r3, r3, #1
-	str	r3, [r4, #2684]
-	.loc 3 1096 0
+	str	r3, [r4, #2708]
 	ldr	r1, [fp, #8]
 	bl	printk
-.LVL1542:
-.L1683:
-	.loc 3 1098 0
+.L1692:
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1684
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	beq	.L1693
 	movw	r2, #1098
-	ldr	r1, .L1724+8
-	ldr	r0, .L1724+12
+	ldr	r1, .L1733+8
+	ldr	r0, .L1733+12
 	bl	printk
-.LVL1543:
-	b	.L1684
-.L1680:
-.LBE542:
-	.loc 3 1101 0 is_stmt 1
-	ldr	r3, [r4, #3800]
+	b	.L1693
+.L1689:
+	ldr	r3, [r4, #3840]
 	movs	r1, #0
-	ldrh	r2, [r4, #86]
+	ldrh	r2, [r4, #110]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-.LVL1544:
-	b	.L1684
-.L1685:
-	.loc 3 1107 0
-	ldrh	r1, [r4, #34]
+	b	.L1693
+.L1694:
+	ldrh	r1, [r4, #58]
 	ldr	r0, [sp, #4]
-.LVL1545:
-	ldr	r3, [r4, #3800]
+	ldr	r3, [r4, #3840]
 	muls	r1, r6, r1
 	add	r3, r3, r7
 	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-.LVL1546:
-	b	.L1719
-.LVL1547:
-.L1716:
-	.loc 3 1117 0
-	ldr	r3, [r4, #3800]
-.LVL1548:
+	b	.L1728
+.L1725:
+	ldr	r3, [r4, #3840]
 	ldr	r2, [sp, #4]
-.LVL1549:
 	add	r7, r7, r3
-	ldrh	r3, [r4, #34]
+	ldrh	r3, [r4, #58]
 	muls	r3, r6, r3
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-	b	.L1720
-.LVL1550:
-.L1691:
-	.loc 3 1133 0
+	b	.L1729
+.L1700:
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, r9
-.LVL1551:
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3840]
 	bl	FtlProgPages
-.LVL1552:
-	.loc 3 1134 0
 	ldr	r3, [sp, #8]
-.LVL1553:
 	cmp	r3, r9
-	bcs	.L1694
-	.loc 3 1134 0 is_stmt 0 discriminator 1
+	bcs	.L1703
 	movw	r2, #1134
-	ldr	r1, .L1724+8
-	ldr	r0, .L1724+12
+	ldr	r1, .L1733+8
+	ldr	r0, .L1733+12
 	bl	printk
-.LVL1554:
-.L1694:
-	.loc 3 1135 0 is_stmt 1
+.L1703:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, r9
 	str	r3, [sp, #8]
-	b	.L1662
-.LVL1555:
-.L1698:
-	.loc 3 975 0
+	b	.L1671
+.L1707:
 	mov	r0, #-1
-.LVL1556:
-	b	.L1655
-.L1725:
+	b	.L1664
+.L1734:
 	.align	2
-.L1724:
+.L1733:
 	.word	.LANCHOR3
-	.word	.LC104
+	.word	.LC105
 	.word	.LANCHOR1+574
 	.word	.LC1
-.LFE167:
 	.fnend
 	.size	FtlWrite, .-FtlWrite
 	.align	1
@@ -18170,23 +11949,14 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 	.fnstart
-.LFB170:
-	.loc 3 1209 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1557:
-	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1558:
 	mov	r1, r0
-.LVL1559:
 	movs	r0, #0
-.LVL1560:
 	b	FtlWrite
-.LVL1561:
-.LFE170:
 	.fnend
 	.size	sftl_write, .-sftl_write
 	.align	1
@@ -18198,100 +11968,66 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 	.fnstart
-.LFB224:
-	.loc 2 1409 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-.LCFI196:
-	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1414 0
-	ldr	r4, .L1748
-	ldr	r3, [r4, #3240]
-	.loc 2 1417 0
-	ldrh	r2, [r4, #16]
-	ldr	r0, [r4, #2300]
-	.loc 2 1414 0
-	str	r3, [r4, #3228]
-	.loc 2 1415 0
-	ldr	r3, [r4, #3244]
-	.loc 2 1417 0
+	ldr	r4, .L1757
+	ldr	r3, [r4, #3280]
+	ldrh	r2, [r4, #40]
+	ldr	r0, [r4, #2324]
+	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
 	lsls	r2, r2, #1
-	.loc 2 1415 0
-	str	r3, [r4, #3232]
-	.loc 2 1417 0
+	str	r3, [r4, #3272]
 	bl	ftl_memset
-.LVL1562:
-	.loc 2 1418 0
-	ldrh	r0, [r4, #2552]
+	ldrh	r0, [r4, #2576]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1728
-.LVL1563:
-.L1736:
-	.loc 2 1419 0
+	bne	.L1737
+.L1745:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1564:
-.L1728:
-	.loc 2 1430 0
-	ldr	r7, .L1748+4
-	.loc 2 1421 0
+.L1737:
+	ldr	r7, .L1757+4
 	movs	r1, #1
-	.loc 2 1427 0
-	addw	r6, r4, #3220
-	.loc 2 1421 0
+	addw	r6, r4, #3260
 	bl	FtlGetLastWrittenPage
-.LVL1565:
 	sxth	r5, r0
-.LVL1566:
-	.loc 2 1422 0
 	adds	r0, r0, #1
-	strh	r0, [r4, #2554]	@ movhi
-.L1730:
-	.loc 2 1424 0
+	strh	r0, [r4, #2578]	@ movhi
+.L1739:
 	cmp	r5, #0
-	bge	.L1733
-	.loc 2 1437 0
+	bge	.L1742
 	movw	r2, #1437
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1757+8
+	ldr	r0, .L1757+12
 	bl	printk
-.LVL1567:
-.L1732:
-	.loc 2 1439 0
-	ldrh	r3, [r4, #16]
-	ldrh	r2, [r4, #86]
+.L1741:
+	ldrh	r3, [r4, #40]
+	ldrh	r2, [r4, #110]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1735
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1744
 	movw	r2, #1439
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1757+8
+	ldr	r0, .L1757+12
 	bl	printk
-.LVL1568:
-.L1735:
-	.loc 2 1441 0 is_stmt 1
+.L1744:
 	movs	r2, #48
-	ldr	r1, [r4, #3228]
-	ldr	r0, .L1748+16
+	ldr	r1, [r4, #3268]
+	ldr	r0, .L1757+16
 	bl	ftl_memcpy
-.LVL1569:
-	.loc 2 1442 0
-	ldrh	r2, [r4, #16]
-	ldr	r1, [r4, #3228]
-	ldr	r0, [r4, #2300]
+	ldrh	r2, [r4, #40]
+	ldr	r1, [r4, #3268]
+	ldr	r0, [r4, #2324]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	bl	ftl_memcpy
-.LVL1570:
-	.loc 2 1443 0
-	ldrh	r1, [r4, #16]
-	ldr	r3, [r4, #3228]
-	ldr	r0, [r4]
+	ldrh	r1, [r4, #40]
+	ldr	r3, [r4, #3268]
+	ldr	r0, [r4, #24]
 	lsrs	r2, r1, #3
 	adds	r1, r1, #24
 	lsls	r1, r1, #1
@@ -18299,253 +12035,158 @@ FtlLoadSysInfo:
 	bic	r1, r1, #3
 	add	r1, r1, r3
 	bl	ftl_memcpy
-.LVL1571:
-	.loc 2 1445 0
-	ldr	r2, [r4, #2244]
-	ldr	r3, .L1748+4
+	ldr	r2, [r4, #2268]
+	ldr	r3, .L1757+4
 	cmp	r2, r3
-	bne	.L1736
-	.loc 2 1449 0
-	ldrb	r2, [r4, #2254]	@ zero_extendqisi2
-	ldrh	r3, [r4, #30]
-	.loc 2 1448 0
-	ldrh	r5, [r4, #2252]
-.LVL1572:
-	.loc 2 1449 0
+	bne	.L1745
+	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
+	ldrh	r3, [r4, #54]
+	ldrh	r5, [r4, #2276]
 	cmp	r2, r3
-	.loc 2 1448 0
-	strh	r5, [r4, #2558]	@ movhi
-	.loc 2 1449 0
-	bne	.L1736
-	.loc 2 1452 0
-	ldr	r3, .L1748+20
-	.loc 2 1454 0
-	ldrh	r2, [r4, #34]
-	.loc 2 1455 0
-	ldr	r6, [r4, #20]
-	.loc 2 1452 0
-	str	r5, [r3, #-216]
-	.loc 2 1453 0
-	ldrh	r3, [r4, #78]
-	.loc 2 1455 0
-	ldrh	r0, [r4, #134]
-	ldrh	r1, [r4, #8]
-	.loc 2 1453 0
+	strh	r5, [r4, #2582]	@ movhi
+	bne	.L1745
+	ldr	r3, .L1757+20
+	ldrh	r2, [r4, #58]
+	ldr	r6, [r4, #44]
+	str	r5, [r3, #-176]
+	ldrh	r3, [r4, #102]
+	ldrh	r0, [r4, #158]
+	ldrh	r1, [r4, #32]
 	muls	r3, r5, r3
-	.loc 2 1455 0
 	subs	r0, r6, r0
 	subs	r0, r0, r5
-	.loc 2 1453 0
-	str	r3, [r4, #2480]
-	.loc 2 1454 0
+	str	r3, [r4, #2504]
 	muls	r3, r2, r3
-	str	r3, [r4, #116]
-	.loc 2 1455 0
+	str	r3, [r4, #140]
 	bl	__aeabi_uidiv
-.LVL1573:
-	.loc 2 1461 0
 	cmp	r5, r6
-	.loc 2 1455 0
-	strh	r0, [r4, #2548]	@ movhi
-	.loc 2 1461 0
-	bls	.L1737
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	strh	r0, [r4, #2572]	@ movhi
+	bls	.L1746
 	movw	r2, #1461
-	ldr	r1, .L1748+8
-	ldr	r0, .L1748+12
+	ldr	r1, .L1757+8
+	ldr	r0, .L1757+12
 	bl	printk
-.LVL1574:
-.L1737:
-	.loc 2 1464 0 is_stmt 1
-	ldrh	r3, [r4, #2260]
-	.loc 2 1463 0
-	ldrh	r1, [r4, #2258]
-	.loc 2 1464 0
+.L1746:
+	ldrh	r3, [r4, #2284]
+	ldrh	r1, [r4, #2282]
 	lsrs	r2, r3, #6
-	.loc 2 1465 0
 	and	r3, r3, #63
-	strb	r3, [r4, #2330]
-	.loc 2 1464 0
-	strh	r2, [r4, #2326]	@ movhi
-	.loc 2 1473 0
-	ldrh	r2, [r4, #2262]
-	.loc 2 1466 0
-	ldrb	r3, [r4, #2255]	@ zero_extendqisi2
-	.loc 2 1463 0
-	strh	r1, [r4, #2324]	@ movhi
-	.loc 2 1473 0
-	strh	r2, [r4, #2372]	@ movhi
-	.loc 2 1474 0
-	ldrh	r2, [r4, #2264]
-	.loc 2 1466 0
-	strb	r3, [r4, #2332]
-	.loc 2 1468 0
+	strb	r3, [r4, #2354]
+	strh	r2, [r4, #2350]	@ movhi
+	ldrh	r2, [r4, #2286]
+	ldrb	r3, [r4, #2279]	@ zero_extendqisi2
+	strh	r1, [r4, #2348]	@ movhi
+	strh	r2, [r4, #2396]	@ movhi
+	ldrh	r2, [r4, #2288]
+	strb	r3, [r4, #2356]
 	movw	r3, #65535
-	strh	r3, [r4, #2564]	@ movhi
-	.loc 2 1469 0
+	strh	r3, [r4, #2588]	@ movhi
 	movs	r3, #0
-	strh	r3, [r4, #2566]	@ movhi
-	.loc 2 1474 0
+	strh	r3, [r4, #2590]	@ movhi
 	lsrs	r0, r2, #6
-	.loc 2 1475 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2378]
-	.loc 2 1476 0
-	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
-	.loc 2 1474 0
-	strh	r0, [r4, #2374]	@ movhi
-	.loc 2 1470 0
-	strb	r3, [r4, #2570]
-	.loc 2 1476 0
-	strb	r2, [r4, #2380]
-	.loc 2 1478 0
-	ldrh	r2, [r4, #2266]
-	.loc 2 1471 0
-	strb	r3, [r4, #2572]
-	.loc 2 1483 0
-	str	r3, [r4, #2504]
-	.loc 2 1478 0
-	strh	r2, [r4, #2420]	@ movhi
-	.loc 2 1479 0
-	ldrh	r2, [r4, #2268]
-	.loc 2 1484 0
-	str	r3, [r4, #2492]
-	.loc 2 1485 0
-	str	r3, [r4, #2484]
-	.loc 2 1486 0
-	str	r3, [r4, #2500]
-	.loc 2 1479 0
+	strb	r2, [r4, #2402]
+	ldrb	r2, [r4, #2280]	@ zero_extendqisi2
+	strh	r0, [r4, #2398]	@ movhi
+	strb	r3, [r4, #2594]
+	strb	r2, [r4, #2404]
+	ldrh	r2, [r4, #2290]
+	strb	r3, [r4, #2596]
+	str	r3, [r4, #2528]
+	strh	r2, [r4, #2444]	@ movhi
+	ldrh	r2, [r4, #2292]
+	str	r3, [r4, #2516]
+	str	r3, [r4, #2508]
+	str	r3, [r4, #2524]
 	lsrs	r0, r2, #6
-	.loc 2 1480 0
 	and	r2, r2, #63
-	strb	r2, [r4, #2426]
-	.loc 2 1481 0
-	ldrb	r2, [r4, #2257]	@ zero_extendqisi2
-	.loc 2 1489 0
-	str	r3, [r4, #2528]
-	.loc 2 1479 0
-	strh	r0, [r4, #2422]	@ movhi
-	.loc 2 1481 0
-	strb	r2, [r4, #2428]
-	.loc 2 1488 0
-	ldr	r2, [r4, #2276]
-	str	r2, [r4, #2524]
-	.loc 2 1490 0
-	str	r3, [r4, #2540]
-	.loc 2 1493 0
-	ldr	r2, [r4, #2516]
-	.loc 2 1491 0
-	str	r3, [r4, #2496]
-	.loc 2 1493 0
-	ldr	r3, [r4, #2284]
+	strb	r2, [r4, #2450]
+	ldrb	r2, [r4, #2281]	@ zero_extendqisi2
+	str	r3, [r4, #2552]
+	strh	r0, [r4, #2446]	@ movhi
+	strb	r2, [r4, #2452]
+	ldr	r2, [r4, #2300]
+	str	r2, [r4, #2548]
+	str	r3, [r4, #2564]
+	ldr	r2, [r4, #2540]
+	str	r3, [r4, #2520]
+	ldr	r3, [r4, #2308]
 	cmp	r3, r2
-	.loc 2 1496 0
-	ldr	r2, [r4, #2520]
-	.loc 2 1494 0
+	ldr	r2, [r4, #2544]
 	it	hi
-	strhi	r3, [r4, #2516]
-	.loc 2 1496 0
-	ldr	r3, [r4, #2280]
+	strhi	r3, [r4, #2540]
+	ldr	r3, [r4, #2304]
 	cmp	r3, r2
-	.loc 2 1497 0
 	it	hi
-	strhi	r3, [r4, #2520]
-	.loc 2 1499 0
+	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L1740
-	.loc 2 1500 0
-	ldr	r0, .L1748+24
+	beq	.L1749
+	ldr	r0, .L1757+24
 	bl	make_superblock
-.LVL1575:
-.L1740:
-	.loc 2 1502 0
-	ldrh	r2, [r4, #2372]
+.L1749:
+	ldrh	r2, [r4, #2396]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1741
-	.loc 2 1503 0
-	ldr	r0, .L1748+28
+	beq	.L1750
+	ldr	r0, .L1757+28
 	bl	make_superblock
-.LVL1576:
-.L1741:
-	.loc 2 1505 0
-	ldrh	r2, [r4, #2420]
+.L1750:
+	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1742
-	.loc 2 1506 0
-	ldr	r0, .L1748+32
+	beq	.L1751
+	ldr	r0, .L1757+32
 	bl	make_superblock
-.LVL1577:
-.L1742:
-	.loc 2 1508 0
-	ldrh	r2, [r4, #2564]
+.L1751:
+	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1743
-	.loc 2 1509 0
-	ldr	r0, .L1748+36
+	beq	.L1752
+	ldr	r0, .L1757+36
 	bl	make_superblock
-.LVL1578:
-.L1743:
-	.loc 2 1511 0
+.L1752:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL1579:
-.L1733:
-	.loc 2 1425 0
-	ldrh	r3, [r4, #2552]
-	.loc 2 1427 0
+.L1742:
+	ldrh	r3, [r4, #2576]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r6
-	.loc 2 1425 0
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3224]
-	.loc 2 1426 0
-	ldr	r3, [r4, #3240]
-	str	r3, [r4, #3228]
-	.loc 2 1427 0
+	str	r3, [r4, #3264]
+	ldr	r3, [r4, #3280]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.LVL1580:
-	.loc 2 1430 0
-	ldr	r3, [r4, #3220]
+	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1731
-	.loc 2 1431 0 discriminator 1
-	ldr	r3, [r4, #3240]
-	.loc 2 1430 0 discriminator 1
+	beq	.L1740
+	ldr	r3, [r4, #3280]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	bne	.L1731
-	.loc 2 1432 0
-	ldr	r3, [r4, #3244]
+	bne	.L1740
+	ldr	r3, [r4, #3284]
 	ldrh	r2, [r3]
-	.loc 2 1431 0
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1732
-.L1731:
+	beq	.L1741
+.L1740:
 	subs	r5, r5, #1
-.LVL1581:
 	sxth	r5, r5
-.LVL1582:
-	b	.L1730
-.L1749:
+	b	.L1739
+.L1758:
 	.align	2
-.L1748:
+.L1757:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
-	.word	.LANCHOR0+2244
+	.word	.LANCHOR0+2268
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+2420
-	.word	.LANCHOR0+2564
-.LFE224:
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+2588
 	.fnend
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	1
@@ -18557,223 +12198,130 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	.fnstart
-.LFB242:
-	.loc 2 2356 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
-.LCFI197:
-	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r4, .L1766
-	.loc 2 2362 0
-	ldrh	r0, [r4, #12]
-	.loc 2 2360 0
-	strh	r3, [r4, #3968]	@ movhi
-	.loc 2 2362 0
+	ldr	r4, .L1775
+	ldrh	r0, [r4, #36]
+	strh	r3, [r4, #4008]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
-.LVL1583:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1584:
-	.loc 2 2364 0
-	ldrh	r2, [r4, #2552]
+	ldrh	r2, [r4, #2576]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1751
-.L1753:
-	.loc 2 2365 0
+	bne	.L1760
+.L1762:
 	mov	r5, #-1
-.L1750:
-	.loc 2 2448 0
+.L1759:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1751:
-	.loc 2 2367 0
+.L1760:
 	bl	FtlLoadSysInfo
-.LVL1585:
 	mov	r5, r0
 	cmp	r0, #0
-	bne	.L1753
-	.loc 2 2370 0
+	bne	.L1762
 	bl	FtlLoadMapInfo
-.LVL1586:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1587:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1588:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1589:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1590:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1591:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1592:
-	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1593:
-.LBB546:
-.LBB547:
-	.loc 2 2382 0
-	ldrh	r1, [r4, #114]
+	ldrh	r1, [r4, #138]
 	mov	r3, r5
-.LVL1594:
-	.loc 2 2383 0
-	ldr	r2, [r4, #2468]
+	ldr	r2, [r4, #2492]
 	movs	r0, #12
-.L1754:
-	.loc 2 2382 0
+.L1763:
 	cmp	r3, r1
-	bge	.L1759
-	.loc 2 2383 0
+	bge	.L1768
 	mla	r6, r0, r3, r2
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	bge	.L1755
-.L1759:
-	.loc 2 2386 0
-	ldrh	r2, [r4, #2272]
-	.loc 2 2388 0
+	bge	.L1764
+.L1768:
+	ldrh	r2, [r4, #2296]
 	cmp	r3, r1
-	.loc 2 2386 0
 	add	r2, r2, #1
-	strh	r2, [r4, #2272]	@ movhi
-	.loc 2 2388 0
-	bge	.L1765
-.L1756:
-	.loc 2 2389 0
-	ldr	r0, .L1766+4
+	strh	r2, [r4, #2296]	@ movhi
+	bge	.L1774
+.L1765:
+	ldr	r0, .L1775+4
 	bl	FtlSuperblockPowerLostFix
-.LVL1595:
-	.loc 2 2390 0
-	ldr	r0, .L1766+8
+	ldr	r0, .L1775+8
 	bl	FtlSuperblockPowerLostFix
-.LVL1596:
-.LBB548:
-	.loc 2 2396 0
-	ldrh	r1, [r4, #2324]
-	ldr	r2, [r4, #2300]
-	ldrh	r0, [r4, #2328]
+	ldrh	r1, [r4, #2348]
+	ldr	r2, [r4, #2324]
+	ldrh	r0, [r4, #2352]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2397 0
-	ldrh	r3, [r4, #78]
-	.loc 2 2402 0
-	ldr	r1, [r4, #2300]
-	ldrh	r0, [r4, #2372]
-	.loc 2 2397 0
-	strh	r3, [r4, #2326]	@ movhi
-	.loc 2 2398 0
+	ldrh	r3, [r4, #102]
+	ldr	r1, [r4, #2324]
+	ldrh	r0, [r4, #2396]
+	strh	r3, [r4, #2350]	@ movhi
 	movs	r3, #0
-	strb	r3, [r4, #2330]
-	.loc 2 2399 0
-	strh	r3, [r4, #2328]	@ movhi
-	.loc 2 2402 0
-	ldrh	r6, [r4, #2376]
+	strb	r3, [r4, #2354]
+	strh	r3, [r4, #2352]	@ movhi
+	ldrh	r6, [r4, #2400]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r6
 	strh	r2, [r1, r0, lsl #1]	@ movhi
-	.loc 2 2403 0
-	ldrh	r2, [r4, #78]
-.LBE548:
-	.loc 2 2409 0
-	ldr	r0, .L1766+12
-.LBB549:
-	.loc 2 2404 0
-	strb	r3, [r4, #2378]
-	.loc 2 2403 0
-	strh	r2, [r4, #2374]	@ movhi
-	.loc 2 2405 0
-	strh	r3, [r4, #2376]	@ movhi
-.LBE549:
-	.loc 2 2409 0
+	ldrh	r2, [r4, #102]
+	ldr	r0, .L1775+12
+	strb	r3, [r4, #2402]
+	strh	r2, [r4, #2398]	@ movhi
+	strh	r3, [r4, #2400]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-.LVL1597:
-	.loc 2 2410 0
-	ldr	r0, .L1766+16
+	ldr	r0, .L1775+16
 	bl	FtlMapBlkWriteDump_data
-.LVL1598:
-	.loc 2 2422 0
-	ldrh	r3, [r4, #2274]
+	ldrh	r3, [r4, #2298]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2274]	@ movhi
-	.loc 2 2423 0
+	strh	r3, [r4, #2298]	@ movhi
 	bl	l2p_flush
-.LVL1599:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1600:
-	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1601:
-	b	.L1760
-.LVL1602:
-.L1755:
-	.loc 2 2382 0
+	b	.L1769
+.L1764:
 	adds	r3, r3, #1
-	b	.L1754
-.L1765:
-	.loc 2 2388 0
-	ldrh	r3, [r4, #3968]
-.LVL1603:
+	b	.L1763
+.L1774:
+	ldrh	r3, [r4, #4008]
 	cmp	r3, #0
-	bne	.L1756
-.L1760:
-	.loc 2 2429 0
-	ldrh	r0, [r4, #2324]
+	bne	.L1765
+.L1769:
+	ldrh	r0, [r4, #2348]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1761
-	ldrh	r3, [r4, #2328]
-	cbnz	r3, .L1761
-	.loc 2 2430 0
-	ldrh	r3, [r4, #2376]
-	cbnz	r3, .L1761
-	.loc 2 2432 0
+	beq	.L1770
+	ldrh	r3, [r4, #2352]
+	cbnz	r3, .L1770
+	ldrh	r3, [r4, #2400]
+	cbnz	r3, .L1770
 	bl	FtlGcRefreshBlock
-.LVL1604:
-	.loc 2 2433 0
-	ldrh	r0, [r4, #2372]
+	ldrh	r0, [r4, #2396]
 	bl	FtlGcRefreshBlock
-.LVL1605:
-	.loc 2 2434 0
-	ldr	r0, .L1766+4
+	ldr	r0, .L1775+4
 	bl	allocate_new_data_superblock
-.LVL1606:
-	.loc 2 2435 0
-	ldr	r0, .L1766+8
+	ldr	r0, .L1775+8
 	bl	allocate_new_data_superblock
-.LVL1607:
-.L1761:
-	.loc 2 2440 0
-	ldrh	r3, [r4, #2272]
+.L1770:
+	ldrh	r3, [r4, #2296]
 	lsls	r3, r3, #27
-	bne	.L1750
-	.loc 2 2441 0
+	bne	.L1759
 	bl	FtlVpcCheckAndModify
-.LVL1608:
-	b	.L1750
-.L1767:
+	b	.L1759
+.L1776:
 	.align	2
-.L1766:
+.L1775:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+2372
-	.word	.LANCHOR0+3864
-	.word	.LANCHOR0+3908
-.LBE547:
-.LBE546:
-.LFE242:
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2396
+	.word	.LANCHOR0+3904
+	.word	.LANCHOR0+3948
 	.fnend
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	1
@@ -18785,396 +12333,246 @@ FtlSysBlkInit:
 	.type	ftl_low_format, %function
 ftl_low_format:
 	.fnstart
-.LFB160:
-	.loc 3 623 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
-.LCFI198:
-	.loc 3 629 0
 	movs	r3, #0
-	ldr	r4, .L1792
-	.loc 3 631 0
-	ldrh	r0, [r4, #12]
-	.loc 3 629 0
-	str	r3, [r4, #2516]
-	.loc 3 630 0
-	str	r3, [r4, #2520]
-	.loc 3 631 0
+	ldr	r4, .L1801
+	ldrh	r0, [r4, #36]
+	str	r3, [r4, #2540]
+	str	r3, [r4, #2544]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1609:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1610:
-	cbz	r0, .L1769
-	.loc 3 633 0
+	cbz	r0, .L1778
 	bl	FtlMakeBbt
-.LVL1611:
-.L1769:
-	.loc 3 637 0 discriminator 1
-	ldr	r0, .L1792+4
-	.loc 3 623 0 discriminator 1
+.L1778:
+	ldr	r0, .L1801+4
 	movs	r2, #0
-.L1770:
-	.loc 3 635 0 discriminator 1
-	ldrh	r1, [r4, #34]
+.L1779:
+	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1771
-	.loc 3 642 0
-	ldrh	r6, [r4, #16]
-	.loc 3 641 0
+	blt	.L1780
+	ldrh	r6, [r4, #40]
 	movs	r5, #0
-.LVL1612:
-.L1772:
-	.loc 3 642 0 discriminator 1
-	ldrh	r3, [r4, #18]
+.L1781:
+	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1773
-	.loc 3 645 0
-	ldrh	r1, [r4, #8]
+	bhi	.L1782
+	ldrh	r1, [r4, #32]
 	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1774
-.L1778:
-	.loc 3 641 0
+	bge	.L1783
+.L1787:
 	movs	r5, #0
-.LVL1613:
 	mov	r6, r5
-.LVL1614:
-.L1775:
-	.loc 3 656 0 discriminator 1
-	ldrh	r3, [r4, #16]
+.L1784:
+	ldrh	r3, [r4, #40]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1779
-	.loc 3 658 0
-	ldrh	r3, [r4, #18]
-	.loc 3 661 0
-	ldrh	r5, [r4, #8]
-	ldr	r9, [r4, #20]
-	.loc 3 658 0
-	str	r3, [r4, #3764]
-	.loc 3 661 0
+	bhi	.L1788
+	ldrh	r3, [r4, #42]
+	ldrh	r5, [r4, #32]
+	ldr	r9, [r4, #44]
+	str	r3, [r4, #3804]
 	mov	r1, r5
 	mov	r0, r9
 	bl	__aeabi_uidiv
-.LVL1615:
-	.loc 3 662 0
 	ubfx	r7, r0, #5, #16
-	.loc 3 661 0
 	mov	r8, r0
-	.loc 3 662 0
 	add	r3, r7, #36
-	.loc 3 661 0
-	str	r0, [r4, #2480]
-	.loc 3 662 0
-	strh	r3, [r4, #2548]	@ movhi
-	.loc 3 663 0
+	str	r0, [r4, #2504]
+	strh	r3, [r4, #2572]	@ movhi
 	movs	r3, #24
 	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1780
-	.loc 3 664 0
+	ble	.L1789
 	mov	r1, r5
 	sub	r0, r9, r6
 	bl	__aeabi_uidiv
-.LVL1616:
-	str	r0, [r4, #2480]
-	.loc 3 665 0
+	str	r0, [r4, #2504]
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
-	strh	r0, [r4, #2548]	@ movhi
-.L1780:
-	.loc 3 668 0
-	ldrh	r3, [r4, #70]
-	cbz	r3, .L1782
-	.loc 3 669 0
-	ldrh	r2, [r4, #2548]
+	strh	r0, [r4, #2572]	@ movhi
+.L1789:
+	ldrh	r3, [r4, #94]
+	cbz	r3, .L1791
+	ldrh	r2, [r4, #2572]
 	add	r2, r2, r3, lsr #1
-	strh	r2, [r4, #2548]	@ movhi
-	.loc 3 670 0
+	strh	r2, [r4, #2572]	@ movhi
 	mul	r2, r5, r3
 	cmp	r6, r2
-	.loc 3 672 0
 	itttt	lt
 	addlt	r3, r3, #32
-	.loc 3 671 0
-	strlt	r8, [r4, #2480]
-	.loc 3 672 0
+	strlt	r8, [r4, #2504]
 	addlt	r3, r3, r7
-	strhlt	r3, [r4, #2548]	@ movhi
-.L1782:
-	.loc 3 677 0
-	ldrh	r2, [r4, #2548]
-	.loc 3 689 0
+	strhlt	r3, [r4, #2572]	@ movhi
+.L1791:
+	ldrh	r2, [r4, #2572]
 	movw	r6, #65535
-.LVL1617:
-	.loc 3 677 0
-	ldr	r3, [r4, #2480]
-	ldr	r7, .L1792+8
+	ldr	r3, [r4, #2504]
+	ldr	r7, .L1801+8
 	subs	r3, r3, r2
 	muls	r5, r3, r5
-	.loc 3 678 0
-	ldrh	r3, [r4, #78]
-	.loc 3 677 0
-	str	r5, [r7, #-216]
-	.loc 3 678 0
+	ldrh	r3, [r4, #102]
+	str	r5, [r7, #-176]
 	muls	r5, r3, r5
-	.loc 3 679 0
-	ldrh	r3, [r4, #34]
-	.loc 3 678 0
-	str	r5, [r4, #2480]
-	.loc 3 679 0
+	ldrh	r3, [r4, #58]
+	str	r5, [r4, #2504]
 	muls	r5, r3, r5
-	str	r5, [r4, #116]
+	str	r5, [r4, #140]
 	mov	r5, r7
-	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL1618:
-	.loc 3 687 0
-	ldrh	r2, [r4, #18]
+	ldrh	r2, [r4, #42]
 	movs	r1, #0
-	ldr	r0, [r4, #2300]
-	.loc 3 701 0
-	ldr	r7, .L1792+12
-	.loc 3 687 0
+	ldr	r0, [r4, #2324]
+	ldr	r7, .L1801+12
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1619:
-	.loc 3 698 0
-	ldrh	r2, [r4, #16]
-	.loc 3 688 0
+	ldrh	r2, [r4, #40]
 	movs	r3, #0
-	str	r3, [r4, #2476]
-	.loc 3 698 0
+	str	r3, [r4, #2500]
 	movs	r1, #255
-	.loc 3 690 0
-	strh	r3, [r4, #2566]	@ movhi
-	.loc 3 691 0
-	strb	r3, [r4, #2570]
-	.loc 3 692 0
-	strb	r3, [r4, #2572]
-	.loc 3 698 0
+	strh	r3, [r4, #2590]	@ movhi
+	strb	r3, [r4, #2594]
+	strb	r3, [r4, #2596]
 	lsrs	r2, r2, #3
-	.loc 3 694 0
-	strh	r3, [r4, #2326]	@ movhi
-	.loc 3 695 0
-	strb	r3, [r4, #2330]
-	.loc 3 696 0
-	strh	r3, [r4, #2324]	@ movhi
-	.loc 3 697 0
+	strh	r3, [r4, #2350]	@ movhi
+	strb	r3, [r4, #2354]
+	strh	r3, [r4, #2348]	@ movhi
 	movs	r3, #1
-	.loc 3 698 0
-	ldr	r0, [r4]
-	.loc 3 689 0
-	strh	r6, [r4, #2564]	@ movhi
-	.loc 3 697 0
-	strb	r3, [r4, #2332]
-	.loc 3 698 0
+	ldr	r0, [r4, #24]
+	strh	r6, [r4, #2588]	@ movhi
+	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.LVL1620:
-.L1784:
-	.loc 3 701 0
+.L1793:
 	mov	r0, r7
 	bl	make_superblock
-.LVL1621:
-	.loc 3 702 0
-	ldrb	r3, [r4, #2331]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2324]
+	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2348]
 	cmp	r3, #0
-	bne	.L1785
-	.loc 3 705 0
-	ldr	r3, [r4, #2300]
+	bne	.L1794
+	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
-	.loc 3 706 0
-	ldrh	r3, [r4, #2324]
+	ldrh	r3, [r4, #2348]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2324]	@ movhi
-	.loc 3 707 0
-	b	.L1784
-.L1771:
-	.loc 3 636 0 discriminator 3
-	ldr	r5, [r4, #3776]
+	strh	r3, [r4, #2348]	@ movhi
+	b	.L1793
+.L1780:
+	ldr	r5, [r4, #3816]
 	mvns	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [r5, r3, lsl #2]
-	.loc 3 637 0 discriminator 3
-	ldr	r1, [r4, #3768]
+	ldr	r1, [r4, #3808]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1770
-.LVL1622:
-.L1773:
-	.loc 3 643 0 discriminator 3
+	b	.L1779
+.L1782:
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL1623:
-	.loc 3 642 0 discriminator 3
 	adds	r6, r6, #1
-	.loc 3 643 0 discriminator 3
 	add	r5, r5, r0
-.LVL1624:
 	uxth	r5, r5
-.LVL1625:
-	.loc 3 642 0 discriminator 3
 	uxth	r6, r6
-	b	.L1772
-.L1774:
-	.loc 3 647 0
+	b	.L1781
+.L1783:
 	mov	r0, r5
 	bl	__aeabi_uidiv
-.LVL1626:
-	ldr	r3, [r4, #108]
+	ldr	r3, [r4, #132]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL1627:
-	.loc 3 648 0
-	ldrh	r0, [r4, #12]
+	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1628:
-	.loc 3 650 0
-	ldrh	r5, [r4, #16]
-.LVL1629:
-.L1776:
-	.loc 3 650 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #18]
+	ldrh	r5, [r4, #40]
+.L1785:
+	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1778
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1787
 	mov	r0, r5
 	movs	r1, #1
-	.loc 3 650 0 discriminator 3
 	adds	r5, r5, #1
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1630:
-	.loc 3 650 0 discriminator 3
 	uxth	r5, r5
-	b	.L1776
-.LVL1631:
-.L1779:
-	.loc 3 657 0 discriminator 3
+	b	.L1785
+.L1788:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL1632:
 	add	r6, r6, r0
-.LVL1633:
 	uxth	r6, r6
-.LVL1634:
-	b	.L1775
-.LVL1635:
-.L1785:
-	.loc 3 709 0
-	ldr	r3, [r4, #2516]
-	.loc 3 721 0
+	b	.L1784
+.L1794:
+	ldr	r3, [r4, #2540]
 	movw	r6, #65535
-	.loc 3 710 0
-	ldrh	r1, [r4, #2328]
-	.loc 3 717 0
-	ldr	r7, .L1792+16
-	.loc 3 709 0
-	str	r3, [r4, #2336]
+	ldrh	r1, [r4, #2352]
+	ldr	r7, .L1801+16
+	str	r3, [r4, #2360]
 	adds	r3, r3, #1
-	str	r3, [r4, #2516]
-	.loc 3 710 0
-	ldr	r3, [r4, #2300]
+	str	r3, [r4, #2540]
+	ldr	r3, [r4, #2324]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 712 0
 	movs	r3, #0
-	strh	r3, [r4, #2374]	@ movhi
-	.loc 3 713 0
-	strb	r3, [r4, #2378]
-	.loc 3 714 0
-	ldrh	r3, [r4, #2324]
+	strh	r3, [r4, #2398]	@ movhi
+	strb	r3, [r4, #2402]
+	ldrh	r3, [r4, #2348]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2372]	@ movhi
-	.loc 3 715 0
+	strh	r3, [r4, #2396]	@ movhi
 	movs	r3, #1
-	strb	r3, [r4, #2380]
-.L1786:
-	.loc 3 717 0
+	strb	r3, [r4, #2404]
+.L1795:
 	mov	r0, r7
 	bl	make_superblock
-.LVL1636:
-	.loc 3 718 0
-	ldrb	r3, [r4, #2379]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2372]
-	cbnz	r3, .L1787
-	.loc 3 721 0
-	ldr	r3, [r4, #2300]
+	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2396]
+	cbnz	r3, .L1796
+	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
-	.loc 3 722 0
-	ldrh	r3, [r4, #2372]
+	ldrh	r3, [r4, #2396]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2372]	@ movhi
-	.loc 3 723 0
-	b	.L1786
-.L1787:
-	.loc 3 725 0
-	ldr	r3, [r4, #2516]
-	.loc 3 727 0
+	strh	r3, [r4, #2396]	@ movhi
+	b	.L1795
+.L1796:
+	ldr	r3, [r4, #2540]
 	movw	r6, #65535
-	.loc 3 726 0
-	ldrh	r1, [r4, #2376]
-	.loc 3 725 0
-	str	r3, [r4, #2384]
+	ldrh	r1, [r4, #2400]
+	str	r3, [r4, #2408]
 	adds	r3, r3, #1
-	str	r3, [r4, #2516]
-	.loc 3 726 0
-	ldr	r3, [r4, #2300]
+	str	r3, [r4, #2540]
+	ldr	r3, [r4, #2324]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 727 0
-	strh	r6, [r4, #2420]	@ movhi
-	.loc 3 730 0
+	strh	r6, [r4, #2444]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-.LVL1637:
-	.loc 3 731 0
 	movs	r3, #0
-	.loc 3 730 0
-	strh	r0, [r4, #2552]	@ movhi
-	.loc 3 731 0
-	strh	r3, [r4, #2554]	@ movhi
-	.loc 3 733 0
-	ldr	r3, [r5, #-216]
-	.loc 3 732 0
-	strh	r6, [r4, #2556]	@ movhi
-	.loc 3 733 0
-	strh	r3, [r4, #2558]	@ movhi
-	.loc 3 734 0
-	ldr	r3, [r4, #2516]
-	str	r3, [r4, #2560]
+	strh	r0, [r4, #2576]	@ movhi
+	strh	r3, [r4, #2578]	@ movhi
+	ldr	r3, [r5, #-176]
+	strh	r6, [r4, #2580]	@ movhi
+	strh	r3, [r4, #2582]	@ movhi
+	ldr	r3, [r4, #2540]
+	str	r3, [r4, #2584]
 	adds	r3, r3, #1
-	str	r3, [r4, #2516]
-	.loc 3 735 0
+	str	r3, [r4, #2540]
 	bl	FtlVpcTblFlush
-.LVL1638:
-	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL1639:
-	cbnz	r0, .L1788
-	.loc 3 737 0
-	ldr	r3, .L1792+20
+	cbnz	r0, .L1797
+	ldr	r3, .L1801+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1788:
-	.loc 3 739 0
+.L1797:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1793:
+.L1802:
 	.align	2
-.L1792:
+.L1801:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
-	.word	.LANCHOR0+2324
-	.word	.LANCHOR0+2372
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2396
 	.word	.LANCHOR2
-.LFE160:
 	.fnend
 	.size	ftl_low_format, .-ftl_low_format
 	.align	1
@@ -19186,104 +12584,591 @@ ftl_low_format:
 	.type	sftl_init, %function
 sftl_init:
 	.fnstart
-.LFB161:
-	.loc 3 743 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-.LCFI199:
-	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r5, .L1800
-	.loc 3 753 0
-	ldr	r4, .L1800+4
-	.loc 3 749 0
-	ldr	r1, .L1800+8
-	ldr	r0, .L1800+12
-	.loc 3 746 0
+	ldr	r4, .L1809
+	ldr	r5, .L1809+4
+	ldr	r1, .L1809+8
+	ldr	r0, .L1809+12
 	str	r3, [r5]
-	.loc 3 749 0
 	bl	printk
-.LVL1640:
-	.loc 3 750 0
-	ldr	r0, .L1800+16
+	mov	r0, r4
 	bl	FtlConstantsInit
-.LVL1641:
-	.loc 3 751 0
 	bl	FtlMemInit
-.LVL1642:
-	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL1643:
-	.loc 3 753 0
-	ldrh	r0, [r4, #12]
+	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1644:
-	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL1645:
-	cbnz	r0, .L1798
-	.loc 3 767 0
+	cbnz	r0, .L1807
 	bl	FtlSysBlkInit
-.LVL1646:
-	cbnz	r0, .L1798
-	.loc 3 779 0
+	cbnz	r0, .L1807
 	movs	r3, #1
 	str	r3, [r5]
-	.loc 3 783 0
-	ldrh	r3, [r4, #2320]
+	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1798
+	bhi	.L1807
 	movw	r4, #8129
-.L1797:
-.LBB550:
-	.loc 3 786 0 discriminator 3
+.L1806:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1647:
-	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-	bne	.L1797
-.L1798:
-.LBE550:
-	.loc 3 794 0
+	bne	.L1806
+.L1807:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1801:
+.L1810:
+	.align	2
+.L1809:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LC70
+	.word	.LC71
+	.fnend
+	.size	sftl_init, .-sftl_init
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.fnend
+	.size	ftl_memcmp, .-ftl_memcmp
+	.align	1
+	.global	rk_sftl_vendor_dev_ops_register
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_sftl_vendor_dev_ops_register, %function
+rk_sftl_vendor_dev_ops_register:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L1815
+	ldr	r3, [r2, #-172]
+	cbnz	r3, .L1814
+	str	r0, [r2, #-172]
+	mov	r0, r3
+	str	r1, [r2, #-168]
+	bx	lr
+.L1814:
+	mov	r0, #-1
+	bx	lr
+.L1816:
+	.align	2
+.L1815:
+	.word	.LANCHOR3
+	.fnend
+	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
+	.align	1
+	.global	rk_sftl_vendor_storage_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_sftl_vendor_storage_init, %function
+rk_sftl_vendor_storage_init:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	mov	r0, #65536
+	ldr	r4, .L1825
+	bl	ftl_malloc
+	str	r0, [r4, #-164]
+	cmp	r0, #0
+	beq	.L1823
+	ldr	fp, .L1825+4
+	mov	r8, #0
+	ldr	r9, .L1825+8
+	mov	r7, r8
+	mov	r6, r8
+.L1821:
+	ldr	r3, [r4, #-172]
+	movs	r1, #128
+	ldr	r2, [r4, #-164]
+	lsls	r0, r6, #7
+	blx	r3
+	mov	r5, r0
+	cbnz	r0, .L1819
+	ldr	r1, [r4, #-164]
+	movw	r10, #65532
+	mov	r0, fp
+	ldr	r3, [r1, #4]
+	ldr	r2, [r1, r10]
+	ldr	r1, [r1]
+	bl	printk
+	ldr	r2, [r4, #-164]
+	ldr	r3, [r2]
+	cmp	r3, r9
+	bne	.L1820
+	ldr	r3, [r2, r10]
+	ldr	r1, [r2, #4]
+	cmp	r3, r1
+	bne	.L1820
+	cmp	r3, r7
+	itt	hi
+	movhi	r8, r6
+	movhi	r7, r3
+.L1820:
+	adds	r6, r6, #1
+	cmp	r6, #2
+	bne	.L1821
+	cbz	r7, .L1822
+	ldr	r3, [r4, #-172]
+	movs	r1, #128
+	lsl	r0, r8, #7
+	blx	r3
+	mov	r5, r0
+	cbz	r0, .L1817
+.L1819:
+	ldr	r0, [r4, #-164]
+	mov	r5, #-1
+	bl	kfree
+	movs	r3, #0
+	str	r3, [r4, #-164]
+	b	.L1817
+.L1822:
+	mov	r1, #65536
+	mov	r0, r2
+	bl	__memzero
+	ldr	r3, [r4, #-164]
+	movs	r2, #1
+	movw	r1, #65532
+	str	r2, [r3, #4]
+	str	r9, [r3]
+	str	r2, [r3, r1]
+	movw	r2, #64504
+	strh	r7, [r3, #12]	@ movhi
+	strh	r2, [r3, #14]	@ movhi
+.L1817:
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L1823:
+	mvn	r5, #11
+	b	.L1817
+.L1826:
+	.align	2
+.L1825:
+	.word	.LANCHOR3
+	.word	.LC106
+	.word	1380668996
+	.fnend
+	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
+	.align	1
+	.global	rk_sftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_sftl_vendor_read, %function
+rk_sftl_vendor_read:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.save {r3, r4, r5, r6, r7, lr}
+	mov	r7, r0
+	ldr	r3, .L1833
+	mov	r0, r1
+	ldr	r5, [r3, #-164]
+	cbz	r5, .L1832
+	ldrh	r6, [r5, #10]
+	movs	r3, #0
+.L1829:
+	cmp	r3, r6
+	bcc	.L1831
+.L1832:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1831:
+	add	r1, r5, r3, lsl #3
+	ldrh	r4, [r1, #16]
+	cmp	r4, r7
+	bne	.L1830
+	ldrh	r4, [r1, #20]
+	ldrh	r1, [r1, #18]
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+	add	r1, r1, #1024
+	mov	r2, r4
+	add	r1, r1, r5
+	bl	memcpy
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1830:
+	adds	r3, r3, #1
+	b	.L1829
+.L1834:
+	.align	2
+.L1833:
+	.word	.LANCHOR3
+	.fnend
+	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
+	.align	1
+	.global	rk_sftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_sftl_vendor_write, %function
+rk_sftl_vendor_write:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	mov	r8, r2
+	ldr	r2, .L1854
+	.pad #28
+	sub	sp, sp, #28
+	mov	r3, r1
+	ldr	r4, [r2, #-164]
+	mov	r9, r2
+	cmp	r4, #0
+	beq	.L1850
+	ldrh	r2, [r4, #10]
+	add	r6, r8, #63
+	ldrh	r1, [r4, #8]
+	bic	r6, r6, #63
+	movs	r7, #0
+	str	r1, [sp, #4]
+.L1837:
+	cmp	r7, r2
+	bcc	.L1845
+	ldrh	r1, [r4, #14]
+	cmp	r6, r1
+	bhi	.L1850
+	add	r2, r4, r2, lsl #3
+	uxth	r6, r6
+	strh	r0, [r2, #16]	@ movhi
+	ldrh	r0, [r4, #12]
+	strh	r8, [r2, #20]	@ movhi
+	strh	r0, [r2, #18]	@ movhi
+	add	r0, r0, r6
+	subs	r6, r1, r6
+	strh	r0, [r4, #12]	@ movhi
+	strh	r6, [r4, #14]	@ movhi
+	mov	r1, r3
+	ldrh	r0, [r2, #18]
+	mov	r2, r8
+	add	r0, r0, #1024
+	add	r0, r0, r4
+	bl	memcpy
+	ldrh	r3, [r4, #10]
+	movw	r2, #65532
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	ldr	r3, [r4, #4]
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	str	r3, [r4, r2]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	it	hi
+	movhi	r3, #0
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, [r9, #-168]
+	b	.L1853
+.L1845:
+	add	r5, r4, r7, lsl #3
+	ldrh	r1, [r5, #16]
+	cmp	r1, r0
+	str	r1, [sp, #8]
+	bne	.L1838
+	ldrh	r1, [r5, #20]
+	add	fp, r4, #1024
+	adds	r1, r1, #63
+	bic	r1, r1, #63
+	cmp	r8, r1
+	str	r1, [sp, #12]
+	bls	.L1839
+	ldrh	r1, [r4, #14]
+	cmp	r6, r1
+	bhi	.L1850
+	ldrh	r10, [r5, #18]
+	subs	r2, r2, #1
+	str	r2, [sp, #16]
+.L1840:
+	ldr	r2, [sp, #16]
+	adds	r5, r5, #8
+	cmp	r7, r2
+	bcc	.L1841
+	ldrh	r2, [sp, #8]
+	add	r7, r4, r7, lsl #3
+	uxth	r5, r10
+	mov	r1, r3
+	strh	r8, [r7, #20]	@ movhi
+	uxtah	r0, fp, r10
+	strh	r2, [r7, #16]	@ movhi
+	mov	r2, r8
+	strh	r5, [r7, #18]	@ movhi
+	bl	memcpy
+	uxth	r3, r6
+	ldrh	r6, [r4, #14]
+	add	r5, r5, r3
+	subs	r6, r6, r3
+	ldr	r3, [sp, #12]
+	strh	r5, [r4, #12]	@ movhi
+	add	r6, r6, r3
+	strh	r6, [r4, #14]	@ movhi
+.L1842:
+	ldr	r3, [r4, #4]
+	movw	r2, #65532
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	str	r3, [r4, r2]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	it	hi
+	movhi	r3, #0
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1854
+	ldr	r3, [r3, #-168]
+.L1853:
+	ldr	r0, [sp, #4]
+	mov	r2, r4
+	movs	r1, #128
+	lsls	r0, r0, #7
+	blx	r3
+	movs	r0, #0
+.L1835:
+	add	sp, sp, #28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L1841:
+	ldrh	r9, [r5, #20]
+	add	r0, fp, r10
+	ldrh	r2, [r5, #16]
+	adds	r7, r7, #1
+	ldrh	r1, [r5, #18]
+	strh	r9, [r5, #12]	@ movhi
+	add	r9, r9, #63
+	bic	r9, r9, #63
+	strh	r2, [r5, #8]	@ movhi
+	strh	r10, [r5, #10]	@ movhi
+	mov	r2, r9
+	add	r1, r1, fp
+	str	r3, [sp, #20]
+	add	r10, r10, r9
+	bl	memcpy
+	ldr	r3, [sp, #20]
+	b	.L1840
+.L1839:
+	ldrh	r0, [r5, #18]
+	mov	r2, r8
+	mov	r1, r3
+	add	r0, r0, fp
+	bl	memcpy
+	strh	r8, [r5, #20]	@ movhi
+	b	.L1842
+.L1838:
+	adds	r7, r7, #1
+	b	.L1837
+.L1850:
+	mov	r0, #-1
+	b	.L1835
+.L1855:
+	.align	2
+.L1854:
+	.word	.LANCHOR3
+	.fnend
+	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
+	.align	1
+	.global	rk_sftl_vendor_storage_ioctl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_sftl_vendor_storage_ioctl, %function
+rk_sftl_vendor_storage_ioctl:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
+	mov	r0, #4096
+	mov	r6, r1
+	mov	r5, r2
+	bl	ftl_malloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L1870
+	ldr	r3, .L1882
+	cmp	r6, r3
+	beq	.L1859
+	adds	r3, r3, #1
+	cmp	r6, r3
+	beq	.L1860
+.L1881:
+	mvn	r5, #13
+	b	.L1858
+.L1859:
+	ldr	r6, .L1882+4
+	mov	r3, sp
+	ands	r3, r3, r6
+	ldr	r3, [r3, #72]
+	.syntax unified
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	cmp	r3, #0
+	bne	.L1866
+	movs	r2, #8
+	mov	r1, r5
+	bl	arm_copy_from_user
+	cmp	r0, #0
+	bne	.L1881
+	ldr	r2, [r4]
+	ldr	r3, .L1882+8
+	cmp	r2, r3
+	beq	.L1864
+.L1865:
+	mov	r5, #-1
+.L1858:
+	mov	r0, r4
+	bl	kfree
+.L1856:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1864:
+	ldrh	r2, [r4, #6]
+	add	r1, r4, #8
+	ldrh	r0, [r4, #4]
+	bl	rk_sftl_vendor_read
+	adds	r3, r0, #1
+	beq	.L1865
+	mov	r3, sp
+	uxth	r2, r0
+	ands	r6, r6, r3
+	strh	r0, [r4, #6]	@ movhi
+	adds	r2, r2, #8
+	ldr	r3, [r6, #72]
+	.syntax unified
+@ 561 "./arch/arm/include/asm/uaccess.h" 1
+	adds r1, r5, r2; sbcccs r1, r1, r3; movcc r3, #0
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	cmp	r3, #0
+	bne	.L1881
+	mov	r1, r4
+	mov	r0, r5
+	bl	arm_copy_to_user
+	cmp	r0, #0
+	bne	.L1881
+.L1872:
+	mov	r5, r0
+	b	.L1858
+.L1860:
+	ldr	r6, .L1882+4
+	mov	r3, sp
+	ands	r3, r3, r6
+	ldr	r3, [r3, #72]
+	.syntax unified
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	cbnz	r3, .L1866
+	movs	r2, #8
+	mov	r1, r5
+	bl	arm_copy_from_user
+	cmp	r0, #0
+	bne	.L1881
+	ldr	r2, [r4]
+	ldr	r3, .L1882+8
+	cmp	r2, r3
+	bne	.L1865
+	ldrh	r2, [r4, #6]
+	movw	r3, #4087
+	cmp	r2, r3
+	bhi	.L1865
+	mov	r3, sp
+	adds	r2, r2, #8
+	ands	r6, r6, r3
+	ldr	r3, [r6, #72]
+	.syntax unified
+@ 552 "./arch/arm/include/asm/uaccess.h" 1
+	adds r1, r5, r2; sbcccs r1, r1, r3; movcc r3, #0
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	cbnz	r3, .L1868
+	mov	r1, r5
+	mov	r0, r4
+	bl	arm_copy_from_user
+	cmp	r0, #0
+	bne	.L1881
+	ldrh	r2, [r4, #6]
+	add	r1, r4, #8
+	ldrh	r0, [r4, #4]
+	bl	rk_sftl_vendor_write
+	b	.L1872
+.L1866:
+	movs	r1, #8
+.L1880:
+	bl	__memzero
+	b	.L1881
+.L1868:
+	mov	r1, r2
+	mov	r0, r4
+	b	.L1880
+.L1870:
+	mov	r5, #-1
+	b	.L1856
+.L1883:
 	.align	2
-.L1800:
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LC70
-	.word	.LC71
-	.word	g_nand_phy_info
-.LFE161:
+.L1882:
+	.word	1074034177
+	.word	-8192
+	.word	1448232273
 	.fnend
-	.size	sftl_init, .-sftl_init
+	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
 	.align	1
-	.global	ftl_memcmp
+	.global	rk_sftl_vendor_register
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.type	rk_sftl_vendor_register, %function
+rk_sftl_vendor_register:
 	.fnstart
-.LFB279:
-	.loc 1 211 0
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1648:
-	.loc 1 212 0
-	b	memcmp
-.LVL1649:
-.LFE279:
+	ldr	r0, .L1885
+	b	misc_register
+.L1886:
+	.align	2
+.L1885:
+	.word	.LANCHOR2+12
 	.fnend
-	.size	ftl_memcmp, .-ftl_memcmp
+	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
 	.global	check_vpc_table
 	.global	FtlUpdateVaildLpnCount
@@ -19430,143 +13315,152 @@ ftl_memcmp:
 	.global	c_ftl_nand_die_num
 	.global	c_ftl_nand_type
 	.section	.rodata
+	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6616, %object
-	.size	__func__.6616, 17
-__func__.6616:
+	.type	__func__.6666, %object
+	.size	__func__.6666, 17
+__func__.6666:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6611, %object
-	.size	__func__.6611, 17
-__func__.6611:
+	.type	__func__.6661, %object
+	.size	__func__.6661, 17
+__func__.6661:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6647, %object
-	.size	__func__.6647, 17
-__func__.6647:
+	.type	__func__.6697, %object
+	.size	__func__.6697, 17
+__func__.6697:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6679, %object
-	.size	__func__.6679, 22
-__func__.6679:
+	.type	__func__.6729, %object
+	.size	__func__.6729, 22
+__func__.6729:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6785, %object
-	.size	__func__.6785, 22
-__func__.6785:
+	.type	__func__.6835, %object
+	.size	__func__.6835, 22
+__func__.6835:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7108, %object
-	.size	__func__.7108, 16
-__func__.7108:
+	.type	__func__.7158, %object
+	.size	__func__.7158, 16
+__func__.7158:
 	.ascii	"make_superblock\000"
-	.type	__func__.7283, %object
-	.size	__func__.7283, 19
-__func__.7283:
+	.type	__func__.7333, %object
+	.size	__func__.7333, 19
+__func__.7333:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.7523, %object
-	.size	__func__.7523, 15
-__func__.7523:
+	.type	__func__.17662, %object
+	.size	__func__.17662, 15
+__func__.17662:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.7540, %object
-	.size	__func__.7540, 15
-__func__.7540:
+	.type	__func__.17679, %object
+	.size	__func__.17679, 15
+__func__.17679:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6721, %object
-	.size	__func__.6721, 26
-__func__.6721:
+	.type	__func__.6771, %object
+	.size	__func__.6771, 26
+__func__.6771:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6235, %object
-	.size	__func__.6235, 11
-__func__.6235:
+	.type	__func__.6275, %object
+	.size	__func__.6275, 11
+__func__.6275:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6451, %object
-	.size	__func__.6451, 14
-__func__.6451:
+	.type	__func__.6501, %object
+	.size	__func__.6501, 14
+__func__.6501:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6688, %object
-	.size	__func__.6688, 16
-__func__.6688:
+	.type	__func__.6738, %object
+	.size	__func__.6738, 16
+__func__.6738:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6746, %object
-	.size	__func__.6746, 31
-__func__.6746:
+	.type	__func__.6796, %object
+	.size	__func__.6796, 31
+__func__.6796:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6760, %object
-	.size	__func__.6760, 16
-__func__.6760:
+	.type	__func__.6810, %object
+	.size	__func__.6810, 16
+__func__.6810:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6732, %object
-	.size	__func__.6732, 15
-__func__.6732:
+	.type	__func__.6782, %object
+	.size	__func__.6782, 15
+__func__.6782:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6802, %object
-	.size	__func__.6802, 9
-__func__.6802:
+	.type	__func__.6852, %object
+	.size	__func__.6852, 9
+__func__.6852:
 	.ascii	"log2phys\000"
-	.type	__func__.7017, %object
-	.size	__func__.7017, 16
-__func__.7017:
+	.type	__func__.7067, %object
+	.size	__func__.7067, 16
+__func__.7067:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7170, %object
-	.size	__func__.7170, 14
-__func__.7170:
+	.type	__func__.7220, %object
+	.size	__func__.7220, 14
+__func__.7220:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6897, %object
-	.size	__func__.6897, 14
-__func__.6897:
+	.type	__func__.6947, %object
+	.size	__func__.6947, 14
+__func__.6947:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7129, %object
-	.size	__func__.7129, 18
-__func__.7129:
+	.type	__func__.7179, %object
+	.size	__func__.7179, 18
+__func__.7179:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7255, %object
-	.size	__func__.7255, 25
-__func__.7255:
+	.type	__func__.7305, %object
+	.size	__func__.7305, 25
+__func__.7305:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7296, %object
-	.size	__func__.7296, 16
-__func__.7296:
+	.type	__func__.7346, %object
+	.size	__func__.7346, 16
+__func__.7346:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7303, %object
-	.size	__func__.7303, 20
-__func__.7303:
+	.type	__func__.7353, %object
+	.size	__func__.7353, 20
+__func__.7353:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7051, %object
-	.size	__func__.7051, 22
-__func__.7051:
+	.type	__func__.7101, %object
+	.size	__func__.7101, 22
+__func__.7101:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6494, %object
-	.size	__func__.6494, 11
-__func__.6494:
+	.type	__func__.6544, %object
+	.size	__func__.6544, 11
+__func__.6544:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6875, %object
-	.size	__func__.6875, 15
-__func__.6875:
+	.type	__func__.6925, %object
+	.size	__func__.6925, 15
+__func__.6925:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7154, %object
-	.size	__func__.7154, 21
-__func__.7154:
+	.type	__func__.7204, %object
+	.size	__func__.7204, 21
+__func__.7204:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7276, %object
-	.size	__func__.7276, 29
-__func__.7276:
+	.type	__func__.7326, %object
+	.size	__func__.7326, 29
+__func__.7326:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6359, %object
-	.size	__func__.6359, 13
-__func__.6359:
+	.type	__func__.6399, %object
+	.size	__func__.6399, 13
+__func__.6399:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7373, %object
-	.size	__func__.7373, 19
-__func__.7373:
+	.type	__func__.7423, %object
+	.size	__func__.7423, 19
+__func__.7423:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7479, %object
-	.size	__func__.7479, 23
-__func__.7479:
+	.type	__func__.7529, %object
+	.size	__func__.7529, 23
+__func__.7529:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6387, %object
-	.size	__func__.6387, 9
-__func__.6387:
+	.type	__func__.6427, %object
+	.size	__func__.6427, 9
+__func__.6427:
 	.ascii	"FtlWrite\000"
-	.type	__func__.6954, %object
-	.size	__func__.6954, 15
-__func__.6954:
+	.type	__func__.7004, %object
+	.size	__func__.7004, 15
+__func__.7004:
 	.ascii	"FtlLoadSysInfo\000"
+	.space	2
+	.type	rk_sftl_vendor_storage_fops, %object
+	.size	rk_sftl_vendor_storage_fops, 108
+rk_sftl_vendor_storage_fops:
+	.space	32
+	.word	rk_sftl_vendor_storage_ioctl
+	.word	rk_sftl_vendor_storage_ioctl
+	.space	68
 	.data
 	.align	2
 	.set	.LANCHOR2,. + 0
@@ -19583,10 +13477,21 @@ ftl_gc_temp_block_bops_scan_page_addr:
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
+	.type	rkflash_vender_storage_dev, %object
+	.size	rkflash_vender_storage_dev, 40
+rkflash_vender_storage_dev:
+	.word	255
+	.word	.LC107
+	.word	rk_sftl_vendor_storage_fops
+	.space	28
 	.bss
 	.align	2
 	.set	.LANCHOR0,. + 0
 	.set	.LANCHOR3,. + 4344
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.space	24
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -19975,6 +13880,10 @@ g_gc_bad_block_temp_tbl:
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 16
+g_nand_ops:
+	.space	16
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
@@ -20177,6 +14086,18 @@ g_ftl_nand_free_count:
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
+	.space	4
+	.type	_flash_read, %object
+	.size	_flash_read, 4
+_flash_read:
+	.space	4
+	.type	_flash_write, %object
+	.size	_flash_write, 4
+_flash_write:
+	.space	4
+	.type	g_vendor, %object
+	.size	g_vendor, 4
+g_vendor:
 	.space	4
 	.type	ftl_temp_buf, %object
 	.size	ftl_temp_buf, 4096
@@ -20344,21541 +14265,70 @@ check_vpc_table:
 .LC74:
 	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
 .LC75:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"\0014\000"
 .LC76:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"prog read error: = %x\012\000"
 .LC77:
-	.ascii	"prog read d error: = %x %x %x\012\000"
+	.ascii	"prog read s error: = %x %x %x\012\000"
 .LC78:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+	.ascii	"prog read d error: = %x %x %x\012\000"
 .LC79:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC80:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-.LC80:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC81:
-	.ascii	"%s error allocating memory. return -1\012\000"
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 .LC82:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"%s error allocating memory. return -1\012\000"
 .LC83:
-	.ascii	"spare:\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC84:
-	.ascii	"map_ppn:\000"
+	.ascii	"spare:\000"
 .LC85:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"map_ppn:\000"
 .LC86:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC87:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC88:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"ftl_scan_all_data = %x\012\000"
 .LC89:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC90:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC90:
-	.ascii	"...%s enter...\012\000"
 .LC91:
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+	.ascii	"...%s enter...\012\000"
 .LC92:
-	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
 .LC93:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
 .LC94:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
 .LC95:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
 .LC96:
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 .LC97:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 .LC98:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"decrement_vpc_count %x = %d\012\000"
 .LC99:
-	.ascii	"no ect\000"
+	.ascii	"spuer block %x vpn is 0\012 \000"
 .LC100:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.ascii	"no ect\000"
 .LC101:
-	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 .LC102:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 .LC103:
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 .LC104:
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+.LC105:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.debug_frame,"",%progbits
-.Lframe0:
-	.4byte	.LECIE0-.LSCIE0
-.LSCIE0:
-	.4byte	0xffffffff
-	.byte	0x3
-	.ascii	"\000"
-	.uleb128 0x1
-	.sleb128 -4
-	.uleb128 0xe
-	.byte	0xc
-	.uleb128 0xd
-	.uleb128 0
-	.align	2
-.LECIE0:
-.LSFDE0:
-	.4byte	.LEFDE0-.LASFDE0
-.LASFDE0:
-	.4byte	.Lframe0
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.byte	0x4
-	.4byte	.LCFI0-.LFB271
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x87
-	.uleb128 0x4
-	.byte	0x88
-	.uleb128 0x3
-	.byte	0x89
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE0:
-.LSFDE2:
-	.4byte	.LEFDE2-.LASFDE2
-.LASFDE2:
-	.4byte	.Lframe0
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.align	2
-.LEFDE2:
-.LSFDE4:
-	.4byte	.LEFDE4-.LASFDE4
-.LASFDE4:
-	.4byte	.Lframe0
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
-	.align	2
-.LEFDE4:
-.LSFDE6:
-	.4byte	.LEFDE6-.LASFDE6
-.LASFDE6:
-	.4byte	.Lframe0
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
-	.align	2
-.LEFDE6:
-.LSFDE8:
-	.4byte	.LEFDE8-.LASFDE8
-.LASFDE8:
-	.4byte	.Lframe0
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
-	.align	2
-.LEFDE8:
-.LSFDE10:
-	.4byte	.LEFDE10-.LASFDE10
-.LASFDE10:
-	.4byte	.Lframe0
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
-	.byte	0x4
-	.4byte	.LCFI1-.LFB155
-	.byte	0xe
-	.uleb128 0x28
-	.byte	0x83
-	.uleb128 0xa
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE10:
-.LSFDE12:
-	.4byte	.LEFDE12-.LASFDE12
-.LASFDE12:
-	.4byte	.Lframe0
-	.4byte	.LFB158
-	.4byte	.LFE158-.LFB158
-	.align	2
-.LEFDE12:
-.LSFDE14:
-	.4byte	.LEFDE14-.LASFDE14
-.LASFDE14:
-	.4byte	.Lframe0
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
-	.align	2
-.LEFDE14:
-.LSFDE16:
-	.4byte	.LEFDE16-.LASFDE16
-.LASFDE16:
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-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
-	.byte	0x4
-	.4byte	.LCFI2-.LFB172
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI3-.LCFI2
-	.byte	0xe
-	.uleb128 0x14
-	.align	2
-.LEFDE16:
-.LSFDE18:
-	.4byte	.LEFDE18-.LASFDE18
-.LASFDE18:
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-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
-	.byte	0x4
-	.4byte	.LCFI4-.LFB173
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE18:
-.LSFDE20:
-	.4byte	.LEFDE20-.LASFDE20
-.LASFDE20:
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-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
-	.align	2
-.LEFDE20:
-.LSFDE22:
-	.4byte	.LEFDE22-.LASFDE22
-.LASFDE22:
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-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
-	.align	2
-.LEFDE22:
-.LSFDE24:
-	.4byte	.LEFDE24-.LASFDE24
-.LASFDE24:
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-	.4byte	.LFB178
-	.4byte	.LFE178-.LFB178
-	.byte	0x4
-	.4byte	.LCFI5-.LFB178
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE26:
-	.4byte	.LEFDE26-.LASFDE26
-.LASFDE26:
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-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
-	.byte	0x4
-	.4byte	.LCFI6-.LFB182
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE28:
-	.4byte	.LEFDE28-.LASFDE28
-.LASFDE28:
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-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
-	.byte	0x4
-	.4byte	.LCFI7-.LFB183
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE30:
-	.4byte	.LEFDE30-.LASFDE30
-.LASFDE30:
-	.4byte	.Lframe0
-	.4byte	.LFB184
-	.4byte	.LFE184-.LFB184
-	.byte	0x4
-	.4byte	.LCFI8-.LFB184
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-.LSFDE32:
-	.4byte	.LEFDE32-.LASFDE32
-.LASFDE32:
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-	.4byte	.LFB185
-	.4byte	.LFE185-.LFB185
-	.align	2
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-.LSFDE34:
-	.4byte	.LEFDE34-.LASFDE34
-.LASFDE34:
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-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
-	.byte	0x4
-	.4byte	.LCFI9-.LFB187
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE36:
-	.4byte	.LEFDE36-.LASFDE36
-.LASFDE36:
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-	.4byte	.LFB188
-	.4byte	.LFE188-.LFB188
-	.align	2
-.LEFDE36:
-.LSFDE38:
-	.4byte	.LEFDE38-.LASFDE38
-.LASFDE38:
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-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
-	.align	2
-.LEFDE38:
-.LSFDE40:
-	.4byte	.LEFDE40-.LASFDE40
-.LASFDE40:
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-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
-	.byte	0x4
-	.4byte	.LCFI10-.LFB191
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE42:
-	.4byte	.LEFDE42-.LASFDE42
-.LASFDE42:
-	.4byte	.Lframe0
-	.4byte	.LFB192
-	.4byte	.LFE192-.LFB192
-	.byte	0x4
-	.4byte	.LCFI11-.LFB192
-	.byte	0xe
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE44:
-	.4byte	.LEFDE44-.LASFDE44
-.LASFDE44:
-	.4byte	.Lframe0
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.byte	0x4
-	.4byte	.LCFI12-.LFB196
-	.byte	0xe
-	.uleb128 0x30
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI13-.LCFI12
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI14-.LCFI13
-	.byte	0xb
-	.align	2
-.LEFDE44:
-.LSFDE46:
-	.4byte	.LEFDE46-.LASFDE46
-.LASFDE46:
-	.4byte	.Lframe0
-	.4byte	.LFB195
-	.4byte	.LFE195-.LFB195
-	.byte	0x4
-	.4byte	.LCFI15-.LFB195
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI16-.LCFI15
-	.byte	0xa
-	.byte	0xce
-	.byte	0xc3
-	.byte	0xe
-	.uleb128 0
-	.byte	0x4
-	.4byte	.LCFI17-.LCFI16
-	.byte	0xb
-	.align	2
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-.LSFDE48:
-	.4byte	.LEFDE48-.LASFDE48
-.LASFDE48:
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-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
-	.byte	0x4
-	.4byte	.LCFI18-.LFB197
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x88
-	.uleb128 0x4
-	.byte	0x89
-	.uleb128 0x3
-	.byte	0x8a
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE50:
-	.4byte	.LEFDE50-.LASFDE50
-.LASFDE50:
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-	.4byte	.LFB194
-	.4byte	.LFE194-.LFB194
-	.byte	0x4
-	.4byte	.LCFI19-.LFB194
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x83
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI20-.LCFI19
-	.byte	0xa
-	.byte	0xce
-	.byte	0xc3
-	.byte	0xe
-	.uleb128 0
-	.byte	0x4
-	.4byte	.LCFI21-.LCFI20
-	.byte	0xb
-	.align	2
-.LEFDE50:
-.LSFDE52:
-	.4byte	.LEFDE52-.LASFDE52
-.LASFDE52:
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-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
-	.byte	0x4
-	.4byte	.LCFI22-.LFB198
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x86
-	.uleb128 0x4
-	.byte	0x87
-	.uleb128 0x3
-	.byte	0x88
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE54:
-	.4byte	.LEFDE54-.LASFDE54
-.LASFDE54:
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-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
-	.byte	0x4
-	.4byte	.LCFI23-.LFB199
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-.LSFDE56:
-	.4byte	.LEFDE56-.LASFDE56
-.LASFDE56:
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-	.4byte	.LFE200-.LFB200
-	.align	2
-.LEFDE56:
-.LSFDE58:
-	.4byte	.LEFDE58-.LASFDE58
-.LASFDE58:
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-	.4byte	.LFE201-.LFB201
-	.byte	0x4
-	.4byte	.LCFI24-.LFB201
-	.byte	0xe
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-	.4byte	.LEFDE60-.LASFDE60
-.LASFDE60:
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-	.4byte	.LFE202-.LFB202
-	.byte	0x4
-	.4byte	.LCFI25-.LFB202
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x7
-	.byte	0x85
-	.uleb128 0x6
-	.byte	0x86
-	.uleb128 0x5
-	.byte	0x87
-	.uleb128 0x4
-	.byte	0x88
-	.uleb128 0x3
-	.byte	0x89
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LEFDE62-.LASFDE62
-.LASFDE62:
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-	.4byte	.LFE210-.LFB210
-	.byte	0x4
-	.4byte	.LCFI26-.LFB210
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x83
-	.uleb128 0x6
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LFE216-.LFB216
-	.byte	0x4
-	.4byte	.LCFI27-.LFB216
-	.byte	0xe
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LEFDE66-.LASFDE66
-.LASFDE66:
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-	.4byte	.LFE222-.LFB222
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-	.4byte	.LEFDE68-.LASFDE68
-.LASFDE68:
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-	.4byte	.LFE223-.LFB223
-	.align	2
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-	.4byte	.LEFDE70-.LASFDE70
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-	.4byte	.LFE229-.LFB229
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-	.4byte	.LCFI28-.LFB229
-	.byte	0xe
-	.uleb128 0x14
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-.LASFDE72:
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-	.4byte	.LFE232-.LFB232
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-	.4byte	.LCFI29-.LFB232
-	.byte	0xe
-	.uleb128 0xc
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LFE234-.LFB234
-	.byte	0x4
-	.4byte	.LCFI30-.LFB234
-	.byte	0xe
-	.uleb128 0x28
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-	.uleb128 0xa
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LEFDE76-.LASFDE76
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-	.4byte	.LFE243-.LFB243
-	.byte	0x4
-	.4byte	.LCFI31-.LFB243
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x88
-	.uleb128 0x4
-	.byte	0x89
-	.uleb128 0x3
-	.byte	0x8a
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LFE244-.LFB244
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-.LASFDE80:
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-	.4byte	.LFE245-.LFB245
-	.byte	0x4
-	.4byte	.LCFI32-.LFB245
-	.byte	0xe
-	.uleb128 0x14
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LASFDE82:
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-	.4byte	.LFE150-.LFB150
-	.byte	0x4
-	.4byte	.LCFI33-.LFB150
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xe
-	.uleb128 0x38
-	.byte	0x4
-	.4byte	.LCFI35-.LCFI34
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI36-.LCFI35
-	.byte	0xb
-	.align	2
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-.LSFDE84:
-	.4byte	.LEFDE84-.LASFDE84
-.LASFDE84:
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-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
-	.byte	0x4
-	.4byte	.LCFI37-.LFB151
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
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-.LSFDE86:
-	.4byte	.LEFDE86-.LASFDE86
-.LASFDE86:
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-	.4byte	.LFE246-.LFB246
-	.byte	0x4
-	.4byte	.LCFI38-.LFB246
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xe
-	.uleb128 0x40
-	.byte	0x4
-	.4byte	.LCFI40-.LCFI39
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI41-.LCFI40
-	.byte	0xb
-	.align	2
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-.LSFDE88:
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-.LASFDE88:
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-	.4byte	.LFE247-.LFB247
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-	.4byte	.LCFI42-.LFB247
-	.byte	0xe
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-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xa
-	.byte	0xe
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-	.byte	0x4
-	.4byte	.LCFI90-.LCFI89
-	.byte	0xb
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-.LSFDE146:
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-.LASFDE146:
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-	.4byte	.LFE209-.LFB209
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-	.byte	0xe
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-	.byte	0x83
-	.uleb128 0x4
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
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-	.4byte	.LFE212-.LFB212
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-	.4byte	.LCFI92-.LFB212
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x84
-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x88
-	.uleb128 0x4
-	.byte	0x89
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-	.uleb128 0x2
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-	.4byte	.LEFDE150-.LASFDE150
-.LASFDE150:
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-	.4byte	.LFE230-.LFB230
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-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x84
-	.uleb128 0x5
-	.byte	0x85
-	.uleb128 0x4
-	.byte	0x86
-	.uleb128 0x3
-	.byte	0x87
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.byte	0xe
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-.LSFDE152:
-	.4byte	.LEFDE152-.LASFDE152
-.LASFDE152:
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-	.4byte	.LFE241-.LFB241
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-	.4byte	.LCFI95-.LFB241
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x84
-	.uleb128 0x6
-	.byte	0x85
-	.uleb128 0x5
-	.byte	0x86
-	.uleb128 0x4
-	.byte	0x87
-	.uleb128 0x3
-	.byte	0x88
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xe
-	.uleb128 0x38
-	.byte	0x4
-	.4byte	.LCFI97-.LCFI96
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x18
-	.byte	0x4
-	.4byte	.LCFI98-.LCFI97
-	.byte	0xb
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-.LSFDE154:
-	.4byte	.LEFDE154-.LASFDE154
-.LASFDE154:
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-	.4byte	.LFE268-.LFB268
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-	.4byte	.LCFI99-.LFB268
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI100-.LCFI99
-	.byte	0xe
-	.uleb128 0x68
-	.byte	0x4
-	.4byte	.LCFI101-.LCFI100
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x4
-	.4byte	.LCFI102-.LCFI101
-	.byte	0xb
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-.LEFDE154:
-.LSFDE156:
-	.4byte	.LEFDE156-.LASFDE156
-.LASFDE156:
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-	.4byte	.LFE240-.LFB240
-	.byte	0x4
-	.4byte	.LCFI103-.LFB240
-	.byte	0xe
-	.uleb128 0x30
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
-	.4byte	.LCFI104-.LCFI103
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI105-.LCFI104
-	.byte	0xb
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-.LSFDE158:
-	.4byte	.LEFDE158-.LASFDE158
-.LASFDE158:
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-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
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-	.4byte	.LCFI106-.LFB217
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xa
-	.byte	0xce
-	.byte	0xc6
-	.byte	0xc5
-	.byte	0xc4
-	.byte	0xe
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-.LSFDE160:
-	.4byte	.LEFDE160-.LASFDE160
-.LASFDE160:
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-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
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-	.uleb128 0x1
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-	.byte	0xe
-	.uleb128 0x38
-	.byte	0x4
-	.4byte	.LCFI111-.LCFI110
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
-	.4byte	.LCFI112-.LCFI111
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-.LSFDE162:
-	.4byte	.LEFDE162-.LASFDE162
-.LASFDE162:
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-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
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-	.uleb128 0x8
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-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
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-	.byte	0x89
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-	.byte	0x8b
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-	.uleb128 0x1
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-	.byte	0xe
-	.uleb128 0x40
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-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x4
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-.LSFDE164:
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-.LASFDE164:
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-	.uleb128 0x18
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-	.uleb128 0x6
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-	.uleb128 0x5
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-	.uleb128 0x10
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-	.uleb128 0x4
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-	.uleb128 0x30
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-	.uleb128 0x8
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-	.byte	0x89
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-	.byte	0xe
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-	.uleb128 0x8
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-	.byte	0x8b
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-	.uleb128 0x1
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-	.byte	0xe
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-	.uleb128 0x30
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-	.uleb128 0x9
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-	.uleb128 0x8
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-	.uleb128 0x7
-	.byte	0x87
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-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
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-	.uleb128 0x1
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-	.uleb128 0x9
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-	.uleb128 0x8
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-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
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-	.uleb128 0x1
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-	.byte	0xe
-	.uleb128 0x38
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-	.byte	0xe
-	.uleb128 0x24
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-	.uleb128 0xa
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-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
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-	.byte	0x89
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-	.byte	0x8a
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-	.byte	0xe
-	.uleb128 0x10
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-	.uleb128 0x4
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
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-	.uleb128 0x1
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-	.byte	0xe
-	.uleb128 0x10
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-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
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-	.uleb128 0x1
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-	.byte	0xe
-	.uleb128 0x20
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-	.uleb128 0x8
-	.byte	0x85
-	.uleb128 0x7
-	.byte	0x86
-	.uleb128 0x6
-	.byte	0x87
-	.uleb128 0x5
-	.byte	0x88
-	.uleb128 0x4
-	.byte	0x89
-	.uleb128 0x3
-	.byte	0x8a
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xe
-	.uleb128 0x38
-	.byte	0x4
-	.4byte	.LCFI138-.LCFI137
-	.byte	0xa
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x4
-	.4byte	.LCFI139-.LCFI138
-	.byte	0xb
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-.LASFDE192:
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-	.4byte	.LFE211-.LFB211
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-	.4byte	.LCFI140-.LFB211
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
-	.byte	0x86
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
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-	.4byte	.LCFI141-.LFB231
-	.byte	0xe
-	.uleb128 0x24
-	.byte	0x84
-	.uleb128 0x9
-	.byte	0x85
-	.uleb128 0x8
-	.byte	0x86
-	.uleb128 0x7
-	.byte	0x87
-	.uleb128 0x6
-	.byte	0x88
-	.uleb128 0x5
-	.byte	0x89
-	.uleb128 0x4
-	.byte	0x8a
-	.uleb128 0x3
-	.byte	0x8b
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.byte	0x4
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-	.byte	0xe
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-	.byte	0xa
-	.byte	0xe
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-	.byte	0x4
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-	.byte	0xb
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-.LSFDE196:
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-	.byte	0x84
-	.uleb128 0x4
-	.byte	0x85
-	.uleb128 0x3
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-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE254:
-.LSFDE256:
-	.4byte	.LEFDE256-.LASFDE256
-.LASFDE256:
-	.4byte	.Lframe0
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
-	.byte	0x4
-	.4byte	.LCFI198-.LFB160
-	.byte	0xe
-	.uleb128 0x20
-	.byte	0x83
-	.uleb128 0x8
-	.byte	0x84
-	.uleb128 0x7
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-	.uleb128 0x6
-	.byte	0x86
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-	.byte	0x87
-	.uleb128 0x4
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-	.uleb128 0x3
-	.byte	0x89
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE256:
-.LSFDE258:
-	.4byte	.LEFDE258-.LASFDE258
-.LASFDE258:
-	.4byte	.Lframe0
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
-	.byte	0x4
-	.4byte	.LCFI199-.LFB161
-	.byte	0xe
-	.uleb128 0x10
-	.byte	0x83
-	.uleb128 0x4
-	.byte	0x84
-	.uleb128 0x3
-	.byte	0x85
-	.uleb128 0x2
-	.byte	0x8e
-	.uleb128 0x1
-	.align	2
-.LEFDE258:
-.LSFDE260:
-	.4byte	.LEFDE260-.LASFDE260
-.LASFDE260:
-	.4byte	.Lframe0
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.align	2
-.LEFDE260:
-	.text
-.Letext0:
-	.file 6 "include/asm-generic/int-ll64.h"
-	.file 7 "./include/uapi/asm-generic/posix_types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "./arch/arm/include/asm/hwcap.h"
-	.file 10 "include/linux/init.h"
-	.file 11 "include/linux/printk.h"
-	.file 12 "include/linux/kernel.h"
-	.file 13 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 14 "drivers/rkflash/rksftl/flash_com.h"
-	.file 15 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 16 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 17 "include/linux/string.h"
-	.file 18 "./arch/arm/include/asm/string.h"
-	.file 19 "drivers/rkflash/rksftl/typedef.h"
-	.file 20 "<built-in>"
-	.section	.debug_info,"",%progbits
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-	.4byte	.Ldebug_abbrev0
-	.byte	0x4
-	.uleb128 0x1
-	.4byte	.LASF663
-	.byte	0x1
-	.4byte	.LASF664
-	.4byte	.LASF665
-	.4byte	.Ltext0
-	.4byte	.Letext0-.Ltext0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.byte	0x4
-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF0
-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF1
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF2
-	.uleb128 0x4
-	.4byte	0x35
-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF3
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x6
-	.4byte	.LASF4
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF5
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x5
-	.4byte	.LASF6
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x7
-	.4byte	.LASF7
-	.uleb128 0x5
-	.byte	0x4
-	.byte	0x5
-	.ascii	"int\000"
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-	.byte	0x5
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-	.uleb128 0x3
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-	.4byte	.LASF9
-	.uleb128 0x6
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-	.uleb128 0x6
-	.ascii	"u16\000"
-	.byte	0x6
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-	.4byte	0x5d
-	.uleb128 0x6
-	.ascii	"s32\000"
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-	.4byte	0x64
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-	.ascii	"u32\000"
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-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x5
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-	.uleb128 0x7
-	.4byte	.LASF11
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-	.uleb128 0x8
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-	.uleb128 0x7
-	.4byte	.LASF12
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-	.byte	0x1d
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-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF13
-	.uleb128 0x7
-	.4byte	.LASF14
-	.byte	0x8
-	.byte	0x36
-	.4byte	0xab
-	.uleb128 0x9
-	.4byte	.LASF15
-	.byte	0x9
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-	.byte	0x9
-	.byte	0xd
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-	.uleb128 0x7
-	.4byte	.LASF17
-	.byte	0xa
-	.byte	0x83
-	.4byte	0xfa
-	.uleb128 0x8
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-	.4byte	0x100
-	.uleb128 0xa
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-	.byte	0x4
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-	.uleb128 0xb
-	.uleb128 0xc
-	.4byte	0xef
-	.4byte	0x117
-	.uleb128 0xd
-	.byte	0
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-	.byte	0xa
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-	.4byte	.LASF19
-	.byte	0xa
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-	.uleb128 0x9
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-	.byte	0xa
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-	.uleb128 0xd
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-	.4byte	.LASF24
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-	.4byte	.LASF26
-	.byte	0xa
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-	.uleb128 0xd
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-	.4byte	0x64
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-	.uleb128 0x4
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-	.uleb128 0xf
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-	.uleb128 0xe
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-	.uleb128 0xf
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-	.4byte	0xa4
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-	.byte	0
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-	.uleb128 0x15
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-	.uleb128 0x15
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-	.4byte	0x2f6
-	.byte	0x8
-	.uleb128 0x15
-	.4byte	.LASF175
-	.byte	0xf
-	.byte	0xfd
-	.4byte	0x2f6
-	.byte	0x9
-	.uleb128 0x15
-	.4byte	.LASF176
-	.byte	0xf
-	.byte	0xfe
-	.4byte	0x2f6
-	.byte	0xa
-	.uleb128 0x15
-	.4byte	.LASF177
-	.byte	0xf
-	.byte	0xff
-	.4byte	0x2f6
-	.byte	0xb
-	.uleb128 0x1a
-	.4byte	.LASF87
-	.byte	0xf
-	.2byte	0x100
-	.4byte	0x30c
-	.byte	0xc
-	.uleb128 0x1a
-	.4byte	.LASF178
-	.byte	0xf
-	.2byte	0x101
-	.4byte	0xbc9
-	.byte	0x10
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0xbd9
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xf
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF179
-	.byte	0xc
-	.byte	0xf
-	.2byte	0x105
-	.4byte	0xc0e
-	.uleb128 0x1a
-	.4byte	.LASF180
-	.byte	0xf
-	.2byte	0x107
-	.4byte	0x30c
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF181
-	.byte	0xf
-	.2byte	0x108
-	.4byte	0x30c
-	.byte	0x4
-	.uleb128 0x1c
-	.ascii	"lpa\000"
-	.byte	0xf
-	.2byte	0x109
-	.4byte	0x30c
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF182
-	.byte	0xc
-	.byte	0xf
-	.2byte	0x10c
-	.4byte	0xc43
-	.uleb128 0x1a
-	.4byte	.LASF63
-	.byte	0xf
-	.2byte	0x10e
-	.4byte	0x539
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF64
-	.byte	0xf
-	.2byte	0x10f
-	.4byte	0x539
-	.byte	0x4
-	.uleb128 0x1a
-	.4byte	.LASF183
-	.byte	0xf
-	.2byte	0x110
-	.4byte	0x30c
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF184
-	.byte	0x10
-	.byte	0x12
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x1d
-	.4byte	.LASF185
-	.byte	0x10
-	.byte	0x13
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x1d
-	.4byte	.LASF186
-	.byte	0x10
-	.byte	0x14
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x1d
-	.4byte	.LASF187
-	.byte	0x10
-	.byte	0x15
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x1d
-	.4byte	.LASF188
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x1d
-	.4byte	.LASF189
-	.byte	0x10
-	.byte	0x17
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x1d
-	.4byte	.LASF190
-	.byte	0x10
-	.byte	0x18
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x1d
-	.4byte	.LASF191
-	.byte	0x10
-	.byte	0x19
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x1d
-	.4byte	.LASF192
-	.byte	0x10
-	.byte	0x1a
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x1d
-	.4byte	.LASF193
-	.byte	0x10
-	.byte	0x1c
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x1d
-	.4byte	.LASF194
-	.byte	0x10
-	.byte	0x1d
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x1d
-	.4byte	.LASF195
-	.byte	0x10
-	.byte	0x1e
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x1d
-	.4byte	.LASF196
-	.byte	0x10
-	.byte	0x1f
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x1d
-	.4byte	.LASF197
-	.byte	0x10
-	.byte	0x20
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x1d
-	.4byte	.LASF198
-	.byte	0x10
-	.byte	0x24
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x1d
-	.4byte	.LASF199
-	.byte	0x10
-	.byte	0x25
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x1d
-	.4byte	.LASF200
-	.byte	0x10
-	.byte	0x26
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x1d
-	.4byte	.LASF201
-	.byte	0x10
-	.byte	0x27
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x1d
-	.4byte	.LASF202
-	.byte	0x10
-	.byte	0x29
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x1d
-	.4byte	.LASF203
-	.byte	0x10
-	.byte	0x2a
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x1d
-	.4byte	.LASF204
-	.byte	0x10
-	.byte	0x2c
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x1d
-	.4byte	.LASF205
-	.byte	0x10
-	.byte	0x2e
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x1d
-	.4byte	.LASF206
-	.byte	0x10
-	.byte	0x2f
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x1d
-	.4byte	.LASF207
-	.byte	0x10
-	.byte	0x30
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x1d
-	.4byte	.LASF208
-	.byte	0x10
-	.byte	0x31
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x1d
-	.4byte	.LASF209
-	.byte	0x10
-	.byte	0x32
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x1d
-	.4byte	.LASF210
-	.byte	0x10
-	.byte	0x33
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x1d
-	.4byte	.LASF211
-	.byte	0x10
-	.byte	0x34
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x1d
-	.4byte	.LASF212
-	.byte	0x10
-	.byte	0x35
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x1d
-	.4byte	.LASF213
-	.byte	0x10
-	.byte	0x36
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x1d
-	.4byte	.LASF214
-	.byte	0x10
-	.byte	0x37
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x1d
-	.4byte	.LASF215
-	.byte	0x10
-	.byte	0x38
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x1d
-	.4byte	.LASF216
-	.byte	0x10
-	.byte	0x3a
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x1d
-	.4byte	.LASF217
-	.byte	0x10
-	.byte	0x3b
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x1d
-	.4byte	.LASF218
-	.byte	0x10
-	.byte	0x3c
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x1d
-	.4byte	.LASF219
-	.byte	0x10
-	.byte	0x3d
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x1d
-	.4byte	.LASF220
-	.byte	0x10
-	.byte	0x3e
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x1d
-	.4byte	.LASF221
-	.byte	0x10
-	.byte	0x3f
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x1d
-	.4byte	.LASF222
-	.byte	0x10
-	.byte	0x41
-	.4byte	0x4b9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x1d
-	.4byte	.LASF223
-	.byte	0x10
-	.byte	0x42
-	.4byte	0x53f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x1d
-	.4byte	.LASF224
-	.byte	0x10
-	.byte	0x43
-	.4byte	0xadc
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x1d
-	.4byte	.LASF225
-	.byte	0x10
-	.byte	0x44
-	.4byte	0x587
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x1d
-	.4byte	.LASF226
-	.byte	0x10
-	.byte	0x45
-	.4byte	0x587
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x1d
-	.4byte	.LASF227
-	.byte	0x10
-	.byte	0x46
-	.4byte	0x32d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x1d
-	.4byte	.LASF228
-	.byte	0x10
-	.byte	0x47
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x32d
-	.uleb128 0x1d
-	.4byte	.LASF229
-	.byte	0x10
-	.byte	0x48
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x1d
-	.4byte	.LASF230
-	.byte	0x10
-	.byte	0x49
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x1d
-	.4byte	.LASF231
-	.byte	0x10
-	.byte	0x4a
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x1d
-	.4byte	.LASF232
-	.byte	0x10
-	.byte	0x4b
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0x1d
-	.4byte	.LASF233
-	.byte	0x10
-	.byte	0x4d
-	.4byte	0xf40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
-	.uleb128 0xc
-	.4byte	0x2f6
-	.4byte	0xfab
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF234
-	.byte	0x10
-	.byte	0x4f
-	.4byte	0xf9b
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x1d
-	.4byte	.LASF235
-	.byte	0x10
-	.byte	0x51
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x1d
-	.4byte	.LASF236
-	.byte	0x10
-	.byte	0x52
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x1d
-	.4byte	.LASF237
-	.byte	0x10
-	.byte	0x53
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x1d
-	.4byte	.LASF238
-	.byte	0x10
-	.byte	0x54
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x1d
-	.4byte	.LASF239
-	.byte	0x10
-	.byte	0x55
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x1d
-	.4byte	.LASF240
-	.byte	0x10
-	.byte	0x56
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x1d
-	.4byte	.LASF241
-	.byte	0x10
-	.byte	0x57
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x1d
-	.4byte	.LASF242
-	.byte	0x10
-	.byte	0x58
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x1d
-	.4byte	.LASF243
-	.byte	0x10
-	.byte	0x59
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x1d
-	.4byte	.LASF244
-	.byte	0x10
-	.byte	0x5a
-	.4byte	0x1066
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xc0e
-	.uleb128 0x1d
-	.4byte	.LASF245
-	.byte	0x10
-	.byte	0x5b
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x1d
-	.4byte	.LASF246
-	.byte	0x10
-	.byte	0x5c
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x1d
-	.4byte	.LASF247
-	.byte	0x10
-	.byte	0x5d
-	.4byte	0x109f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x673
-	.uleb128 0x1d
-	.4byte	.LASF248
-	.byte	0x10
-	.byte	0x5e
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x1d
-	.4byte	.LASF249
-	.byte	0x10
-	.byte	0x5f
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x1d
-	.4byte	.LASF250
-	.byte	0x10
-	.byte	0x61
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x1d
-	.4byte	.LASF251
-	.byte	0x10
-	.byte	0x62
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x1d
-	.4byte	.LASF252
-	.byte	0x10
-	.byte	0x63
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x1d
-	.4byte	.LASF253
-	.byte	0x10
-	.byte	0x64
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x1d
-	.4byte	.LASF254
-	.byte	0x10
-	.byte	0x65
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x1d
-	.4byte	.LASF255
-	.byte	0x10
-	.byte	0x67
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x1d
-	.4byte	.LASF256
-	.byte	0x10
-	.byte	0x68
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x1d
-	.4byte	.LASF257
-	.byte	0x10
-	.byte	0x69
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x1d
-	.4byte	.LASF258
-	.byte	0x10
-	.byte	0x6a
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x1d
-	.4byte	.LASF259
-	.byte	0x10
-	.byte	0x6b
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x1d
-	.4byte	.LASF260
-	.byte	0x10
-	.byte	0x6d
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x1d
-	.4byte	.LASF261
-	.byte	0x10
-	.byte	0x6e
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x1d
-	.4byte	.LASF262
-	.byte	0x10
-	.byte	0x6f
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x1d
-	.4byte	.LASF263
-	.byte	0x10
-	.byte	0x70
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x1d
-	.4byte	.LASF264
-	.byte	0x10
-	.byte	0x71
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x1d
-	.4byte	.LASF265
-	.byte	0x10
-	.byte	0x73
-	.4byte	0x11d7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x636
-	.uleb128 0x1d
-	.4byte	.LASF266
-	.byte	0x10
-	.byte	0x74
-	.4byte	0x539
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x1d
-	.4byte	.LASF267
-	.byte	0x10
-	.byte	0x75
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x1d
-	.4byte	.LASF268
-	.byte	0x10
-	.byte	0x7c
-	.4byte	0x1210
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xaab
-	.uleb128 0x1d
-	.4byte	.LASF269
-	.byte	0x10
-	.byte	0x7d
-	.4byte	0x1210
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x1d
-	.4byte	.LASF270
-	.byte	0x10
-	.byte	0x7f
-	.4byte	0x1210
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x1d
-	.4byte	.LASF271
-	.byte	0x10
-	.byte	0x80
-	.4byte	0x1210
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x1d
-	.4byte	.LASF272
-	.byte	0x10
-	.byte	0x81
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x1d
-	.4byte	.LASF273
-	.byte	0x10
-	.byte	0x82
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x1d
-	.4byte	.LASF274
-	.byte	0x10
-	.byte	0x83
-	.4byte	0xb37
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x1d
-	.4byte	.LASF275
-	.byte	0x10
-	.byte	0x84
-	.4byte	0xb37
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x1d
-	.4byte	.LASF276
-	.byte	0x10
-	.byte	0x85
-	.4byte	0xb37
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x1d
-	.4byte	.LASF277
-	.byte	0x10
-	.byte	0x86
-	.4byte	0xb37
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x1d
-	.4byte	.LASF278
-	.byte	0x10
-	.byte	0x87
-	.4byte	0x12c0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xb37
-	.uleb128 0x1d
-	.4byte	.LASF279
-	.byte	0x10
-	.byte	0x88
-	.4byte	0x858
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x1d
-	.4byte	.LASF280
-	.byte	0x10
-	.byte	0x89
-	.4byte	0x955
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x1d
-	.4byte	.LASF281
-	.byte	0x10
-	.byte	0x8b
-	.4byte	0x12f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xbd9
-	.uleb128 0x1d
-	.4byte	.LASF282
-	.byte	0x10
-	.byte	0x8c
-	.4byte	0x630
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x1d
-	.4byte	.LASF283
-	.byte	0x10
-	.byte	0x8d
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x1d
-	.4byte	.LASF284
-	.byte	0x10
-	.byte	0x8e
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x1d
-	.4byte	.LASF285
-	.byte	0x10
-	.byte	0x8f
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x1d
-	.4byte	.LASF286
-	.byte	0x10
-	.byte	0x90
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x1d
-	.4byte	.LASF287
-	.byte	0x10
-	.byte	0x91
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x1d
-	.4byte	.LASF288
-	.byte	0x10
-	.byte	0x92
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x1d
-	.4byte	.LASF289
-	.byte	0x10
-	.byte	0x93
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x1d
-	.4byte	.LASF290
-	.byte	0x10
-	.byte	0x94
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x13a8
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF291
-	.byte	0x10
-	.byte	0x95
-	.4byte	0x1398
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x1d
-	.4byte	.LASF292
-	.byte	0x10
-	.byte	0x97
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x1d
-	.4byte	.LASF293
-	.byte	0x10
-	.byte	0x98
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x1d
-	.4byte	.LASF294
-	.byte	0x10
-	.byte	0x99
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x1d
-	.4byte	.LASF295
-	.byte	0x10
-	.byte	0x9b
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x1d
-	.4byte	.LASF296
-	.byte	0x10
-	.byte	0x9c
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x1d
-	.4byte	.LASF297
-	.byte	0x10
-	.byte	0x9d
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x1d
-	.4byte	.LASF298
-	.byte	0x10
-	.byte	0x9e
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x1d
-	.4byte	.LASF299
-	.byte	0x10
-	.byte	0xa0
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x1d
-	.4byte	.LASF300
-	.byte	0x10
-	.byte	0xa1
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x1d
-	.4byte	.LASF301
-	.byte	0x10
-	.byte	0xa2
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x1d
-	.4byte	.LASF302
-	.byte	0x10
-	.byte	0xa3
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x1d
-	.4byte	.LASF303
-	.byte	0x10
-	.byte	0xa4
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x1d
-	.4byte	.LASF304
-	.byte	0x10
-	.byte	0xa6
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF305
-	.byte	0x10
-	.byte	0xa7
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF306
-	.byte	0x10
-	.byte	0xa8
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF307
-	.byte	0x10
-	.byte	0xa9
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF308
-	.byte	0x10
-	.byte	0xaa
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF309
-	.byte	0x10
-	.byte	0xab
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF310
-	.byte	0x10
-	.byte	0xac
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x1d
-	.4byte	.LASF311
-	.byte	0x10
-	.byte	0xad
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x1d
-	.4byte	.LASF312
-	.byte	0x10
-	.byte	0xae
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x1d
-	.4byte	.LASF313
-	.byte	0x10
-	.byte	0xaf
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x1d
-	.4byte	.LASF314
-	.byte	0x10
-	.byte	0xb0
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x1d
-	.4byte	.LASF315
-	.byte	0x10
-	.byte	0xb1
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x1d
-	.4byte	.LASF316
-	.byte	0x10
-	.byte	0xb2
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x1d
-	.4byte	.LASF317
-	.byte	0x10
-	.byte	0xb4
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x1d
-	.4byte	.LASF318
-	.byte	0x10
-	.byte	0xb5
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x1594
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF319
-	.byte	0x10
-	.byte	0xb6
-	.4byte	0x1584
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x1d
-	.4byte	.LASF320
-	.byte	0x10
-	.byte	0xb7
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x1d
-	.4byte	.LASF321
-	.byte	0x10
-	.byte	0xb8
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x9
-	.4byte	.LASF322
-	.byte	0xd
-	.byte	0x14
-	.4byte	0x37c
-	.uleb128 0x9
-	.4byte	.LASF323
-	.byte	0xd
-	.byte	0x15
-	.4byte	0x37c
-	.uleb128 0x9
-	.4byte	.LASF324
-	.byte	0xd
-	.byte	0x16
-	.4byte	0x41e
-	.uleb128 0xc
-	.4byte	0x99
-	.4byte	0x15f9
-	.uleb128 0x19
-	.4byte	0x2e
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF325
-	.byte	0xd
-	.byte	0x17
-	.4byte	0x15e8
-	.uleb128 0x1d
-	.4byte	.LASF326
-	.byte	0x3
-	.byte	0x5
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
-	.uleb128 0x1d
-	.4byte	.LASF327
-	.byte	0x3
-	.byte	0x6
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFtlInitStatus
-	.uleb128 0x9
-	.4byte	.LASF328
-	.byte	0x3
-	.byte	0x6c
-	.4byte	0x30c
-	.uleb128 0x9
-	.4byte	.LASF329
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0x30c
-	.uleb128 0x9
-	.4byte	.LASF330
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0x30c
-	.uleb128 0x9
-	.4byte	.LASF331
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0x30c
-	.uleb128 0x1e
-	.4byte	.LASF332
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0x64
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	power_up_flag
-	.uleb128 0x1f
-	.4byte	.LASF336
-	.byte	0x3
-	.2byte	0x483
-	.4byte	0x30c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_discard_updated
-	.uleb128 0x1e
-	.4byte	.LASF333
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x1e
-	.4byte	.LASF334
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0xc
-	.4byte	0x301
-	.4byte	0x16ab
-	.uleb128 0x19
-	.4byte	0x2e
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x1e
-	.4byte	.LASF335
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x169a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_vpc_table
-	.uleb128 0x20
-	.4byte	.LASF337
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x1e
-	.4byte	.LASF338
-	.byte	0x5
-	.2byte	0x1d4
-	.4byte	0x301
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_ink_free_return_value
-	.uleb128 0x20
-	.4byte	.LASF339
-	.byte	0x1
-	.byte	0xe
-	.4byte	0x15e8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_buf
-	.uleb128 0x21
-	.4byte	0x15f9
-	.byte	0x1
-	.byte	0xf
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_temp_buf
-	.uleb128 0xc
-	.4byte	0x99
-	.4byte	0x170e
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x20
-	.4byte	.LASF340
-	.byte	0x1
-	.byte	0x10
-	.4byte	0x16fe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_spare_buf
-	.uleb128 0x22
-	.4byte	.LASF343
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x64
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x176f
-	.uleb128 0x23
-	.4byte	.LASF341
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x25
-	.4byte	.LLST301
-	.uleb128 0x23
-	.4byte	.LASF342
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x25
-	.4byte	.LLST302
-	.uleb128 0x23
-	.4byte	.LASF114
-	.byte	0x1
-	.byte	0xd2
-	.4byte	0x41
-	.4byte	.LLST303
-	.uleb128 0x24
-	.4byte	.LVL1649
-	.4byte	0x67d3
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF344
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x25
-	.4byte	.LFB278
-	.4byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x17bf
-	.uleb128 0x23
-	.4byte	.LASF345
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x25
-	.4byte	.LLST177
-	.uleb128 0x23
-	.4byte	.LASF346
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x17bf
-	.4byte	.LLST178
-	.uleb128 0x23
-	.4byte	.LASF347
-	.byte	0x1
-	.byte	0xcd
-	.4byte	0x41
-	.4byte	.LLST179
-	.uleb128 0x24
-	.4byte	.LVL830
-	.4byte	0x67de
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x17c5
-	.uleb128 0x25
-	.uleb128 0x26
-	.4byte	.LASF350
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x25
-	.byte	0x1
-	.4byte	0x180a
-	.uleb128 0x27
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x25
-	.uleb128 0x27
-	.ascii	"c\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x64
-	.uleb128 0x27
-	.ascii	"n\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0x41
-	.uleb128 0x28
-	.uleb128 0x29
-	.ascii	"__p\000"
-	.byte	0x1
-	.byte	0xca
-	.4byte	0x25
-	.uleb128 0x29
-	.ascii	"__n\000"
-	.byte	0x1
-	.byte	0xca
-	.4byte	0xce
-	.byte	0
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF348
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x8e
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1900
-	.uleb128 0x23
-	.4byte	.LASF349
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x46f
-	.4byte	.LLST109
-	.uleb128 0x2b
-	.ascii	"die\000"
-	.byte	0x1
-	.byte	0xb6
-	.4byte	0x99
-	.4byte	.LLST110
-	.uleb128 0x2c
-	.4byte	.LASF114
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x83
-	.4byte	.LLST111
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x83
-	.uleb128 0x2d
-	.4byte	0x17c6
-	.4byte	.LBB361
-	.4byte	.Ldebug_ranges0+0x160
-	.byte	0x1
-	.byte	0xba
-	.4byte	0x18aa
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x160
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x160
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL485
-	.4byte	0x67e7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	0x17c6
-	.4byte	.LBB370
-	.4byte	.LBE370-.LBB370
-	.byte	0x1
-	.byte	0xbd
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB371
-	.4byte	.LBE371-.LBB371
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB372
-	.4byte	.LBE372-.LBB372
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL489
-	.4byte	0x67e7
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF351
-	.byte	0x1
-	.byte	0x9b
-	.4byte	0x317
-	.byte	0x1
-	.4byte	0x1944
-	.uleb128 0x34
-	.4byte	.LASF352
-	.byte	0x1
-	.byte	0x9b
-	.4byte	0x301
-	.uleb128 0x29
-	.ascii	"sts\000"
-	.byte	0x1
-	.byte	0x9d
-	.4byte	0x317
-	.uleb128 0x35
-	.4byte	.LASF353
-	.byte	0x1
-	.byte	0x9e
-	.4byte	0x1944
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x9f
-	.4byte	0x32d
-	.uleb128 0x36
-	.ascii	"out\000"
-	.byte	0x1
-	.byte	0xb1
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x30c
-	.4byte	0x1954
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xf
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF354
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x8e
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x19ea
-	.uleb128 0x23
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x25
-	.4byte	.LLST94
-	.uleb128 0x23
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x99
-	.4byte	.LLST95
-	.uleb128 0x23
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x85
-	.4byte	0x99
-	.4byte	.LLST96
-	.uleb128 0x37
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x35
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x20
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x87
-	.4byte	0x99
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x88
-	.4byte	0xf40
-	.uleb128 0x20
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x89
-	.4byte	0x99
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x31
-	.4byte	.LVL413
-	.4byte	0x1ba6
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF360
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x8e
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ae3
-	.uleb128 0x23
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x25
-	.4byte	.LLST89
-	.uleb128 0x23
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST90
-	.uleb128 0x23
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST91
-	.uleb128 0x23
-	.4byte	.LASF361
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x99
-	.4byte	.LLST92
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x35
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x20
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x99
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x2c
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0x99
-	.4byte	.LLST93
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x4d
-	.4byte	0xf40
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7540
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0xe0
-	.4byte	0x1ad0
-	.uleb128 0x20
-	.4byte	.LASF363
-	.byte	0x1
-	.byte	0x68
-	.4byte	0x32d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x31
-	.4byte	.LVL397
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL399
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL400
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL401
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL391
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL392
-	.4byte	0x1ba6
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x1af3
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xe
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x1ae3
-	.uleb128 0x2a
-	.4byte	.LASF364
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x8e
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ba6
-	.uleb128 0x23
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x25
-	.4byte	.LLST82
-	.uleb128 0x23
-	.4byte	.LASF357
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x99
-	.4byte	.LLST83
-	.uleb128 0x23
-	.4byte	.LASF356
-	.byte	0x1
-	.byte	0x2b
-	.4byte	0x99
-	.4byte	.LLST84
-	.uleb128 0x37
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x29
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x35
-	.4byte	.LASF61
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x20
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x99
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x20
-	.4byte	.LASF359
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x99
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xf40
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7523
-	.uleb128 0x31
-	.4byte	.LVL361
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL364
-	.4byte	0x1ba6
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF667
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x99
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1c4e
-	.uleb128 0x2b
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x11
-	.4byte	0xf40
-	.4byte	.LLST0
-	.uleb128 0x23
-	.4byte	.LASF358
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x376
-	.4byte	.LLST1
-	.uleb128 0x23
-	.4byte	.LASF365
-	.byte	0x1
-	.byte	0x11
-	.4byte	0x376
-	.4byte	.LLST2
-	.uleb128 0x35
-	.4byte	.LASF366
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x83
-	.uleb128 0x35
-	.4byte	.LASF367
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x83
-	.uleb128 0x2c
-	.4byte	.LASF71
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x83
-	.4byte	.LLST3
-	.uleb128 0x2c
-	.4byte	.LASF72
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x83
-	.4byte	.LLST4
-	.uleb128 0x2c
-	.4byte	.LASF368
-	.byte	0x1
-	.byte	0x15
-	.4byte	0x99
-	.4byte	.LLST5
-	.uleb128 0x2c
-	.4byte	.LASF62
-	.byte	0x1
-	.byte	0x16
-	.4byte	0x99
-	.4byte	.LLST6
-	.uleb128 0x2c
-	.4byte	.LASF369
-	.byte	0x1
-	.byte	0x17
-	.4byte	0x99
-	.4byte	.LLST7
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF370
-	.byte	0x5
-	.2byte	0x2f4
-	.4byte	0x99
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1c72
-	.uleb128 0x24
-	.4byte	.LVL1388
-	.4byte	0x1c72
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF371
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x1d3f
-	.uleb128 0x3d
-	.4byte	.LASF372
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x30c
-	.uleb128 0x3d
-	.4byte	.LASF373
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF374
-	.byte	0x5
-	.2byte	0x1d7
-	.4byte	0x301
-	.uleb128 0x3f
-	.ascii	"lpa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0x30c
-	.uleb128 0x3f
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF375
-	.byte	0x5
-	.2byte	0x1d9
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF85
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF377
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF379
-	.byte	0x5
-	.2byte	0x1db
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x1d3f
-	.uleb128 0x40
-	.4byte	.LASF381
-	.byte	0x5
-	.2byte	0x272
-	.uleb128 0x40
-	.4byte	.LASF382
-	.byte	0x5
-	.2byte	0x275
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x1d55
-	.4byte	.LASF371
-	.uleb128 0x28
-	.uleb128 0x3e
-	.4byte	.LASF383
-	.byte	0x5
-	.2byte	0x1f3
-	.4byte	0x301
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x770
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x1d55
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x16
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x1d45
-	.uleb128 0x3c
-	.4byte	.LASF384
-	.byte	0x5
-	.2byte	0x1a2
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x1dba
-	.uleb128 0x3f
-	.ascii	"ret\000"
-	.byte	0x5
-	.2byte	0x1a4
-	.4byte	0x64
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x1a5
-	.4byte	0x64
-	.uleb128 0x3f
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1a6
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF353
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-	.2byte	0x1a7
-	.4byte	0x1944
-	.uleb128 0x42
-	.4byte	0x1dab
-	.uleb128 0x3e
-	.4byte	.LASF385
-	.byte	0x5
-	.2byte	0x1b1
-	.4byte	0x32d
-	.byte	0
-	.uleb128 0x28
-	.uleb128 0x3e
-	.4byte	.LASF386
-	.byte	0x5
-	.2byte	0x1c6
-	.4byte	0x30c
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF387
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x1e04
-	.uleb128 0x3d
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x5
-	.2byte	0x187
-	.4byte	0x301
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0x301
-	.uleb128 0x3f
-	.ascii	"j\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF178
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF497
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x64
-	.byte	0x1
-	.uleb128 0x3b
-	.4byte	.LASF389
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x64
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1e6d
-	.uleb128 0x44
-	.4byte	.LASF178
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x301
-	.4byte	.LLST81
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF390
-	.byte	0x5
-	.2byte	0x169
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL347
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL348
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL349
-	.4byte	0x1e6d
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF391
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x64
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1ea1
-	.uleb128 0x44
-	.4byte	.LASF392
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x301
-	.4byte	.LLST80
-	.uleb128 0x31
-	.4byte	.LVL344
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF393
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0x30c
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1f15
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF380
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x1d3f
-	.4byte	.LLST255
-	.uleb128 0x31
-	.4byte	.LVL1289
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1290
-	.4byte	0x22cb
-	.uleb128 0x31
-	.4byte	.LVL1291
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL1292
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1293
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1294
-	.4byte	0x2093
-	.uleb128 0x31
-	.4byte	.LVL1296
-	.4byte	0x21ed
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF394
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0x30c
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1f6f
-	.uleb128 0x31
-	.4byte	.LVL1297
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1298
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL1299
-	.4byte	0x2505
-	.uleb128 0x31
-	.4byte	.LVL1300
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1301
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1302
-	.4byte	0x3598
-	.uleb128 0x24
-	.4byte	.LVL1303
-	.4byte	0x23e4
-	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF453
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x22
-	.4byte	.LASF395
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x30c
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2093
-	.uleb128 0x23
-	.4byte	.LASF396
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x12c0
-	.4byte	.LLST168
-	.uleb128 0x23
-	.4byte	.LASF397
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x30c
-	.4byte	.LLST169
-	.uleb128 0x2c
-	.4byte	.LASF378
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0x301
-	.4byte	.LLST170
-	.uleb128 0x2c
-	.4byte	.LASF357
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x301
-	.4byte	.LLST171
-	.uleb128 0x29
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF376
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x301
-	.uleb128 0x2c
-	.4byte	.LASF172
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x301
-	.4byte	.LLST172
-	.uleb128 0x2c
-	.4byte	.LASF170
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x301
-	.4byte	.LLST173
-	.uleb128 0x2c
-	.4byte	.LASF398
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0x30c
-	.4byte	.LLST174
-	.uleb128 0x2c
-	.4byte	.LASF399
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0x30c
-	.4byte	.LLST175
-	.uleb128 0x35
-	.4byte	.LASF400
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0x30c
-	.uleb128 0x2c
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xda
-	.4byte	0x1d3f
-	.4byte	.LLST176
-	.uleb128 0x47
-	.4byte	.LASF401
-	.byte	0x5
-	.byte	0xe1
-	.uleb128 0x47
-	.4byte	.LASF402
-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x48
-	.4byte	.LASF471
-	.byte	0x5
-	.2byte	0x117
-	.4byte	.L981
-	.uleb128 0x31
-	.4byte	.LVL790
-	.4byte	0x2093
-	.uleb128 0x31
-	.4byte	.LVL798
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL812
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL820
-	.4byte	0x314e
-	.uleb128 0x31
-	.4byte	.LVL822
-	.4byte	0x21ed
-	.uleb128 0x31
-	.4byte	.LVL824
-	.4byte	0x4222
-	.uleb128 0x31
-	.4byte	.LVL825
-	.4byte	0x2093
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF409
-	.byte	0x5
-	.byte	0xc9
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x20c4
-	.uleb128 0x31
-	.4byte	.LVL784
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL785
-	.4byte	0x17c6
-	.uleb128 0x24
-	.4byte	.LVL786
-	.4byte	0x230f
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF403
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x64
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x21d8
-	.uleb128 0x23
-	.4byte	.LASF404
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x64
-	.4byte	.LLST251
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF405
-	.byte	0x5
-	.byte	0x71
-	.4byte	0x301
-	.uleb128 0x2c
-	.4byte	.LASF406
-	.byte	0x5
-	.byte	0x72
-	.4byte	0x30c
-	.4byte	.LLST252
-	.uleb128 0x2c
-	.4byte	.LASF407
-	.byte	0x5
-	.byte	0x73
-	.4byte	0x30c
-	.4byte	.LLST253
-	.uleb128 0x35
-	.4byte	.LASF396
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x12c0
-	.uleb128 0x2c
-	.4byte	.LASF408
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x12f9
-	.4byte	.LLST254
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x21e8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7373
-	.uleb128 0x31
-	.4byte	.LVL1257
-	.4byte	0x1f78
-	.uleb128 0x31
-	.4byte	.LVL1259
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1260
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1261
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1265
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1266
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1268
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1269
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL1271
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1272
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1274
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1275
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1276
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1277
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1278
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1279
-	.4byte	0x4222
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x21e8
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x12
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x21d8
-	.uleb128 0x49
-	.4byte	.LASF410
-	.byte	0x5
-	.byte	0x54
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2255
-	.uleb128 0x23
-	.4byte	.LASF411
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST75
-	.uleb128 0x23
-	.4byte	.LASF181
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST76
-	.uleb128 0x2b
-	.ascii	"lpa\000"
-	.byte	0x5
-	.byte	0x54
-	.4byte	0x30c
-	.4byte	.LLST77
-	.uleb128 0x2c
-	.4byte	.LASF412
-	.byte	0x5
-	.byte	0x56
-	.4byte	0x301
-	.4byte	.LLST78
-	.uleb128 0x4a
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0x301
-	.4byte	.LLST79
-	.uleb128 0x31
-	.4byte	.LVL332
-	.4byte	0x451a
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF413
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x30c
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2287
-	.uleb128 0x2b
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x301
-	.4byte	.LLST74
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF414
-	.byte	0x5
-	.byte	0x38
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x22cb
-	.uleb128 0x4b
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xf40
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4c
-	.4byte	.LASF415
-	.byte	0x5
-	.byte	0x38
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF416
-	.byte	0x5
-	.byte	0x3b
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF417
-	.byte	0x5
-	.byte	0x29
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x230f
-	.uleb128 0x4b
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xf40
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4c
-	.4byte	.LASF415
-	.byte	0x5
-	.byte	0x29
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x2b
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF416
-	.byte	0x5
-	.byte	0x2c
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF418
-	.byte	0x5
-	.byte	0x15
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x232e
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x17
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF419
-	.byte	0x2
-	.2byte	0xac3
-	.4byte	0x64
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x238f
-	.uleb128 0x44
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xac3
-	.4byte	0x301
-	.4byte	.LLST192
-	.uleb128 0x3f
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0xac5
-	.4byte	0x64
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x239f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7303
-	.uleb128 0x31
-	.4byte	.LVL903
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL905
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL907
-	.4byte	0x23a4
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x239f
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x13
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x238f
-	.uleb128 0x3c
-	.4byte	.LASF420
-	.byte	0x2
-	.2byte	0xaae
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x23cf
-	.uleb128 0x3d
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xaae
-	.4byte	0x301
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x23df
-	.4byte	.LASF420
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x23df
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xf
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x23cf
-	.uleb128 0x3b
-	.4byte	.LASF421
-	.byte	0x2
-	.2byte	0xa8e
-	.4byte	0x30c
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2460
-	.uleb128 0x44
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0xa8e
-	.4byte	0x12c0
-	.4byte	.LLST72
-	.uleb128 0x45
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0xa90
-	.4byte	0x301
-	.4byte	.LLST73
-	.uleb128 0x1f
-	.4byte	.LASF423
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x21e8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7283
-	.uleb128 0x31
-	.4byte	.LVL317
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL318
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL319
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL322
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF424
-	.byte	0x2
-	.2byte	0xa76
-	.4byte	0x64
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x24f0
-	.uleb128 0x44
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0xa76
-	.4byte	0x12c0
-	.4byte	.LLST237
-	.uleb128 0x1f
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xa78
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x2500
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7276
-	.uleb128 0x31
-	.4byte	.LVL1189
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1190
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL1191
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1192
-	.4byte	0x2505
-	.uleb128 0x31
-	.4byte	.LVL1193
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1194
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1195
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1197
-	.4byte	0x4222
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2500
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x24f0
-	.uleb128 0x4d
-	.4byte	.LASF425
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x64
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x265f
-	.uleb128 0x4e
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x12c0
-	.4byte	.LLST184
-	.uleb128 0x45
-	.4byte	.LASF426
-	.byte	0x2
-	.2byte	0xa14
-	.4byte	0x301
-	.4byte	.LLST185
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x301
-	.4byte	.LLST186
-	.uleb128 0x3f
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF427
-	.byte	0x2
-	.2byte	0xa16
-	.4byte	0x64
-	.4byte	.LLST187
-	.uleb128 0x45
-	.4byte	.LASF428
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0x301
-	.4byte	.LLST188
-	.uleb128 0x40
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0xa18
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x266f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7255
-	.uleb128 0x4f
-	.4byte	0x3419
-	.4byte	.LBB452
-	.4byte	.Ldebug_ranges0+0x1e8
-	.byte	0x2
-	.2byte	0xa48
-	.4byte	0x25ce
-	.uleb128 0x2e
-	.4byte	0x3432
-	.uleb128 0x2e
-	.4byte	0x3426
-	.uleb128 0x31
-	.4byte	.LVL875
-	.4byte	0x5c2e
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL851
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL855
-	.4byte	0x4037
-	.uleb128 0x31
-	.4byte	.LVL856
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL857
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL858
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL859
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL862
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL863
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL864
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL865
-	.4byte	0x3419
-	.uleb128 0x31
-	.4byte	.LVL867
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL869
-	.4byte	0x27b4
-	.uleb128 0x31
-	.4byte	.LVL870
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL872
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL877
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL880
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x266f
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x18
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x265f
-	.uleb128 0x3c
-	.4byte	.LASF430
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x2692
-	.uleb128 0x3d
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF431
-	.byte	0x2
-	.2byte	0x9c0
-	.4byte	0x301
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x273c
-	.uleb128 0x1f
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x9c2
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3e
-	.4byte	.LASF433
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF434
-	.byte	0x2
-	.2byte	0x9c4
-	.4byte	0x301
-	.4byte	.LLST66
-	.uleb128 0x45
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0x1210
-	.4byte	.LLST67
-	.uleb128 0x45
-	.4byte	.LASF436
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0x301
-	.4byte	.LLST68
-	.uleb128 0x45
-	.4byte	.LASF437
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0x301
-	.4byte	.LLST69
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x30c
-	.uleb128 0x45
-	.4byte	.LASF114
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0x301
-	.4byte	.LLST70
-	.uleb128 0x31
-	.4byte	.LVL294
-	.4byte	0x273c
-	.uleb128 0x31
-	.4byte	.LVL301
-	.4byte	0x278b
-	.uleb128 0x31
-	.4byte	.LVL307
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF438
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x301
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x278b
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x301
-	.4byte	.LLST61
-	.uleb128 0x1f
-	.4byte	.LASF439
-	.byte	0x2
-	.2byte	0x9ad
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3e
-	.4byte	.LASF392
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0x301
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9af
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF440
-	.byte	0x2
-	.2byte	0x9a2
-	.4byte	0x301
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x27b4
-	.uleb128 0x1f
-	.4byte	.LASF434
-	.byte	0x2
-	.2byte	0x9a4
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF441
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x64
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2815
-	.uleb128 0x44
-	.4byte	.LASF405
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x301
-	.4byte	.LLST60
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF165
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL200
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL201
-	.4byte	0x4ab7
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF442
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x283f
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x64
-	.uleb128 0x28
-	.uleb128 0x3e
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x12c0
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x914
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x28aa
-	.uleb128 0x51
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x64
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x51
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x917
-	.4byte	0x30c
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x3e
-	.4byte	.LASF444
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x1d3f
-	.uleb128 0x31
-	.4byte	.LVL651
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL653
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL654
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL655
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL656
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF445
-	.byte	0x2
-	.2byte	0x8e0
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29c3
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8e3
-	.4byte	0x30c
-	.4byte	.LLST149
-	.uleb128 0x1f
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0x30c
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x301
-	.4byte	.LLST150
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x29d3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7170
-	.uleb128 0x53
-	.4byte	.LBB413
-	.4byte	.LBE413-.LBB413
-	.4byte	0x293b
-	.uleb128 0x45
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0x301
-	.4byte	.LLST151
-	.uleb128 0x31
-	.4byte	.LVL671
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB410
-	.4byte	.LBE410-.LBB410
-	.byte	0x2
-	.2byte	0x8e9
-	.4byte	0x2995
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB412
-	.4byte	.LBE412-.LBB412
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL667
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL666
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL672
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL674
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL675
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL677
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x29d3
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xd
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x29c3
-	.uleb128 0x50
-	.4byte	.LASF448
-	.byte	0x2
-	.2byte	0x8c1
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2a7f
-	.uleb128 0x52
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8c3
-	.4byte	0x301
-	.4byte	.LLST235
-	.uleb128 0x52
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0x30c
-	.4byte	.LLST236
-	.uleb128 0x1f
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0x30c
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8c6
-	.4byte	0x301
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x2a8f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7154
-	.uleb128 0x31
-	.4byte	.LVL1175
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1176
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1180
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1181
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1183
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1184
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1185
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1186
-	.4byte	0x3598
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2a8f
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x14
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x2a7f
-	.uleb128 0x50
-	.4byte	.LASF449
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b09
-	.uleb128 0x44
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x12c0
-	.4byte	.LLST213
-	.uleb128 0x1f
-	.4byte	.LASF450
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0x32d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x1d3f
-	.uleb128 0x3e
-	.4byte	.LASF451
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x64
-	.uleb128 0x3e
-	.4byte	.LASF174
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1054
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1055
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1056
-	.4byte	0x232e
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF452
-	.byte	0x2
-	.2byte	0x882
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b83
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB510
-	.4byte	.LBE510-.LBB510
-	.byte	0x2
-	.2byte	0x886
-	.4byte	0x2b79
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB511
-	.4byte	.LBE511-.LBB511
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB512
-	.4byte	.LBE512-.LBB512
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1157
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1156
-	.4byte	0x378a
-	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF454
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x4d
-	.4byte	.LASF455
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x64
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c40
-	.uleb128 0x45
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x301
-	.4byte	.LLST165
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF165
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF456
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0x301
-	.4byte	.LLST166
-	.uleb128 0x45
-	.4byte	.LASF457
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0x301
-	.4byte	.LLST167
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x2c50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7129
-	.uleb128 0x31
-	.4byte	.LVL770
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL772
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL773
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL777
-	.4byte	0x4222
-	.uleb128 0x31
-	.4byte	.LVL780
-	.4byte	0x41fd
-	.uleb128 0x31
-	.4byte	.LVL782
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x2c50
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x11
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x2c40
-	.uleb128 0x3b
-	.4byte	.LASF458
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x64
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2cc0
-	.uleb128 0x4e
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x12c0
-	.4byte	.LLST59
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x301
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x23df
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7108
-	.uleb128 0x31
-	.4byte	.LVL193
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL195
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL196
-	.4byte	0x4ab7
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF459
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x64
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1283
-	.4byte	0x2d37
-	.uleb128 0x31
-	.4byte	.LVL1284
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1285
-	.4byte	0x2d37
-	.uleb128 0x31
-	.4byte	.LVL1286
-	.4byte	0x2d11
-	.uleb128 0x31
-	.4byte	.LVL1287
-	.4byte	0x1f6f
-	.uleb128 0x31
-	.4byte	.LVL1288
-	.4byte	0x232e
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF495
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x2d37
-	.uleb128 0x3d
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x12c0
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF460
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x64
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3082
-	.uleb128 0x44
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x12c0
-	.4byte	.LLST197
-	.uleb128 0x45
-	.4byte	.LASF461
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x301
-	.4byte	.LLST198
-	.uleb128 0x45
-	.4byte	.LASF462
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x301
-	.4byte	.LLST199
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF172
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x301
-	.4byte	.LLST200
-	.uleb128 0x3e
-	.4byte	.LASF170
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF463
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x301
-	.4byte	.LLST201
-	.uleb128 0x45
-	.4byte	.LASF464
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x301
-	.4byte	.LLST202
-	.uleb128 0x3e
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF465
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x64
-	.4byte	.LLST203
-	.uleb128 0x3e
-	.4byte	.LASF466
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x64
-	.uleb128 0x3e
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x301
-	.4byte	.LLST204
-	.uleb128 0x3f
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST205
-	.uleb128 0x45
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST206
-	.uleb128 0x45
-	.4byte	.LASF406
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST207
-	.uleb128 0x45
-	.4byte	.LASF398
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x30c
-	.4byte	.LLST208
-	.uleb128 0x45
-	.4byte	.LASF412
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x301
-	.4byte	.LLST209
-	.uleb128 0x3e
-	.4byte	.LASF467
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF468
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0x30c
-	.4byte	.LLST210
-	.uleb128 0x3e
-	.4byte	.LASF469
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x1d3f
-	.uleb128 0x3e
-	.4byte	.LASF470
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0x30c
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x3092
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7051
-	.uleb128 0x48
-	.4byte	.LASF472
-	.byte	0x2
-	.2byte	0x744
-	.4byte	.L1140
-	.uleb128 0x48
-	.4byte	.LASF402
-	.byte	0x2
-	.2byte	0x74c
-	.4byte	.L1152
-	.uleb128 0x48
-	.4byte	.LASF473
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.L1160
-	.uleb128 0x40
-	.4byte	.LASF474
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x53
-	.4byte	.LBB473
-	.4byte	.LBE473-.LBB473
-	.4byte	0x2f11
-	.uleb128 0x3e
-	.4byte	.LASF475
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF476
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL971
-	.4byte	0x1af8
-	.byte	0
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x230
-	.4byte	0x2f83
-	.uleb128 0x45
-	.4byte	.LASF477
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0x30c
-	.4byte	.LLST211
-	.uleb128 0x45
-	.4byte	.LASF478
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0x30c
-	.4byte	.LLST212
-	.uleb128 0x31
-	.4byte	.LVL1013
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1016
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1021
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1023
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1025
-	.4byte	0x3097
-	.uleb128 0x31
-	.4byte	.LVL1028
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1030
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1031
-	.4byte	0x44d7
-	.byte	0
-	.uleb128 0x53
-	.4byte	.LBB477
-	.4byte	.LBE477-.LBB477
-	.4byte	0x2fc4
-	.uleb128 0x3e
-	.4byte	.LASF479
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF478
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1036
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1037
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1038
-	.4byte	0x3939
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL932
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL934
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL939
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL947
-	.4byte	0x314e
-	.uleb128 0x31
-	.4byte	.LVL952
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL954
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL958
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL974
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL979
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL988
-	.4byte	0x454e
-	.uleb128 0x31
-	.4byte	.LVL998
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1003
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1008
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1011
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1012
-	.4byte	0x44d7
-	.uleb128 0x31
-	.4byte	.LVL1017
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1019
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1034
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1035
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1040
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1043
-	.4byte	0x232e
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3092
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x15
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x3082
-	.uleb128 0x50
-	.4byte	.LASF480
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x314e
-	.uleb128 0x4e
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x30c
-	.4byte	.LLST142
-	.uleb128 0x44
-	.4byte	.LASF446
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x30c
-	.4byte	.LLST143
-	.uleb128 0x45
-	.4byte	.LASF412
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0x301
-	.4byte	.LLST144
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x23df
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.7017
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x198
-	.4byte	0x313b
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF392
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0x301
-	.4byte	.LLST145
-	.uleb128 0x45
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0x301
-	.4byte	.LLST146
-	.uleb128 0x31
-	.4byte	.LVL641
-	.4byte	0x4097
-	.uleb128 0x31
-	.4byte	.LVL642
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL643
-	.4byte	0x41fd
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL636
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL648
-	.4byte	0x3939
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF481
-	.byte	0x2
-	.2byte	0x678
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x319f
-	.uleb128 0x57
-	.4byte	.LASF396
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x12c0
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x44
-	.4byte	.LASF170
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x301
-	.4byte	.LLST57
-	.uleb128 0x44
-	.4byte	.LASF172
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x301
-	.4byte	.LLST58
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF482
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x64
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31cc
-	.uleb128 0x31
-	.4byte	.LVL759
-	.4byte	0x31cc
-	.uleb128 0x31
-	.4byte	.LVL760
-	.4byte	0x3225
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x658
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3201
-	.uleb128 0x3e
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL757
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL758
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF484
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x64
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3225
-	.uleb128 0x31
-	.4byte	.LVL756
-	.4byte	0x3225
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF485
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x64
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3333
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x3333
-	.4byte	.LLST158
-	.uleb128 0x45
-	.4byte	.LASF487
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x322
-	.4byte	.LLST159
-	.uleb128 0x3e
-	.4byte	.LASF85
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x322
-	.uleb128 0x45
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0x322
-	.4byte	.LLST160
-	.uleb128 0x3e
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0x539
-	.4byte	.LLST161
-	.uleb128 0x45
-	.4byte	.LASF98
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x630
-	.4byte	.LLST162
-	.uleb128 0x45
-	.4byte	.LASF99
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0x539
-	.4byte	.LLST163
-	.uleb128 0x1f
-	.4byte	.LASF95
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x45
-	.4byte	.LASF490
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0x301
-	.4byte	.LLST164
-	.uleb128 0x3e
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x3339
-	.uleb128 0x31
-	.4byte	.LVL721
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL729
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL736
-	.4byte	0x3ddf
-	.uleb128 0x31
-	.4byte	.LVL737
-	.4byte	0x3d87
-	.uleb128 0x31
-	.4byte	.LVL738
-	.4byte	0x3cbc
-	.uleb128 0x31
-	.4byte	.LVL739
-	.4byte	0x3cbc
-	.uleb128 0x31
-	.4byte	.LVL741
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL747
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL750
-	.4byte	0x1af8
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x587
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x7b8
-	.uleb128 0x4d
-	.4byte	.LASF492
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x64
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x33ee
-	.uleb128 0x45
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0x322
-	.4byte	.LLST297
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6954
-	.uleb128 0x31
-	.4byte	.LVL1562
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1565
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL1567
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1568
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1569
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1570
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1571
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1574
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1575
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1576
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1577
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1578
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1580
-	.4byte	0x1af8
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF493
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x64
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3419
-	.uleb128 0x44
-	.4byte	.LASF494
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x301
-	.4byte	.LLST56
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF496
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x343f
-	.uleb128 0x3d
-	.4byte	.LASF494
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x301
-	.uleb128 0x3d
-	.4byte	.LASF372
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x64
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF498
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x64
-	.byte	0x1
-	.uleb128 0x3b
-	.4byte	.LASF499
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x64
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3598
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF500
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x301
-	.4byte	.LLST155
-	.uleb128 0x3e
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF357
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x301
-	.4byte	.LLST156
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x322
-	.uleb128 0x3f
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x322
-	.uleb128 0x45
-	.4byte	.LASF501
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x3339
-	.4byte	.LLST157
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x29d3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6897
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB419
-	.4byte	.LBE419-.LBB419
-	.byte	0x2
-	.2byte	0x484
-	.4byte	0x3522
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB420
-	.4byte	.LBE420-.LBB420
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB421
-	.4byte	.LBE421-.LBB421
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL688
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL689
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL690
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL691
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL695
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL696
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL703
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL704
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL705
-	.4byte	0x436d
-	.uleb128 0x31
-	.4byte	.LVL706
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL707
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL708
-	.4byte	0x436d
-	.uleb128 0x31
-	.4byte	.LVL709
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF502
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x64
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3659
-	.uleb128 0x45
-	.4byte	.LASF86
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0x301
-	.4byte	.LLST233
-	.uleb128 0x3e
-	.4byte	.LASF503
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x3659
-	.uleb128 0x45
-	.4byte	.LASF504
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0x301
-	.4byte	.LLST234
-	.uleb128 0x40
-	.4byte	.LASF505
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6875
-	.uleb128 0x31
-	.4byte	.LVL1160
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1161
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1162
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1163
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1164
-	.4byte	0x3719
-	.uleb128 0x31
-	.4byte	.LVL1165
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1166
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL1167
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1168
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1171
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1172
-	.4byte	0x436d
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x810
-	.uleb128 0x56
-	.4byte	.LASF506
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x36ab
-	.uleb128 0x28
-	.uleb128 0x3f
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0x30c
-	.uleb128 0x3f
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF507
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF450
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0x32d
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x1d3f
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF508
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3719
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x3333
-	.4byte	.LLST152
-	.uleb128 0x52
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0x30c
-	.4byte	.LLST153
-	.uleb128 0x3e
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0x539
-	.4byte	.LLST154
-	.uleb128 0x31
-	.4byte	.LVL682
-	.4byte	0x1af8
-	.uleb128 0x24
-	.4byte	.LVL684
-	.4byte	0x3ad6
-	.uleb128 0x31
-	.4byte	.LVL686
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF509
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x373d
-	.uleb128 0x3d
-	.4byte	.LASF183
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0x30c
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF510
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x64
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x378a
-	.uleb128 0x44
-	.4byte	.LASF511
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x30c
-	.4byte	.LLST225
-	.uleb128 0x45
-	.4byte	.LASF512
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0x30c
-	.4byte	.LLST226
-	.uleb128 0x31
-	.4byte	.LVL1135
-	.4byte	0x3860
-	.uleb128 0x31
-	.4byte	.LVL1136
-	.4byte	0x2b83
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF513
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30c
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x385a
-	.uleb128 0x44
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30c
-	.4byte	.LLST227
-	.uleb128 0x44
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x30c
-	.4byte	.LLST228
-	.uleb128 0x44
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x385a
-	.4byte	.LLST229
-	.uleb128 0x52
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x301
-	.4byte	.LLST230
-	.uleb128 0x3e
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0x30c
-	.4byte	.LLST231
-	.uleb128 0x1f
-	.4byte	.LASF518
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x51
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0x32d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x45
-	.4byte	.LASF519
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0x30c
-	.4byte	.LLST232
-	.uleb128 0x1f
-	.4byte	.LASF353
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -104
-	.uleb128 0x31
-	.4byte	.LVL1148
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1149
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1151
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x2f6
-	.uleb128 0x4d
-	.4byte	.LASF520
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30c
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3939
-	.uleb128 0x44
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30c
-	.4byte	.LLST219
-	.uleb128 0x44
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x30c
-	.4byte	.LLST220
-	.uleb128 0x44
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x385a
-	.4byte	.LLST221
-	.uleb128 0x52
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x301
-	.4byte	.LLST222
-	.uleb128 0x3e
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0x30c
-	.4byte	.LLST223
-	.uleb128 0x1f
-	.4byte	.LASF518
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x51
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x347
-	.4byte	0x32d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x45
-	.4byte	.LASF519
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0x30c
-	.4byte	.LLST224
-	.uleb128 0x1f
-	.4byte	.LASF353
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -104
-	.uleb128 0x31
-	.4byte	.LVL1118
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1119
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1120
-	.4byte	0x3ad6
-	.uleb128 0x31
-	.4byte	.LVL1123
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF521
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x64
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x39ef
-	.uleb128 0x4e
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x30c
-	.4byte	.LLST138
-	.uleb128 0x4e
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x539
-	.4byte	.LLST139
-	.uleb128 0x44
-	.4byte	.LASF522
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x64
-	.4byte	.LLST140
-	.uleb128 0x45
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x301
-	.4byte	.LLST141
-	.uleb128 0x1f
-	.4byte	.LASF524
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x1f
-	.4byte	.LASF525
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x39ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6802
-	.uleb128 0x48
-	.4byte	.LASF526
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	.L745
-	.uleb128 0x31
-	.4byte	.LVL623
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL625
-	.4byte	0x3a3f
-	.uleb128 0x31
-	.4byte	.LVL626
-	.4byte	0x3a96
-	.uleb128 0x31
-	.4byte	.LVL627
-	.4byte	0x3e90
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x39ff
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x8
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x39ef
-	.uleb128 0x3b
-	.4byte	.LASF527
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x64
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a3f
-	.uleb128 0x52
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0x301
-	.4byte	.LLST196
-	.uleb128 0x31
-	.4byte	.LVL919
-	.4byte	0x365f
-	.uleb128 0x31
-	.4byte	.LVL922
-	.4byte	0x3a96
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF528
-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0x301
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a96
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2ee
-	.4byte	0x301
-	.uleb128 0x1f
-	.4byte	.LASF529
-	.byte	0x2
-	.2byte	0x2ef
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3e
-	.4byte	.LASF530
-	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0x30c
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x3092
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6785
-	.uleb128 0x31
-	.4byte	.LVL174
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF531
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x64
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ad6
-	.uleb128 0x44
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x301
-	.4byte	.LLST137
-	.uleb128 0x3e
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL618
-	.4byte	0x3ad6
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF532
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x64
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3bec
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x3333
-	.4byte	.LLST130
-	.uleb128 0x44
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x30c
-	.4byte	.LLST131
-	.uleb128 0x44
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x539
-	.4byte	.LLST132
-	.uleb128 0x3e
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x2a9
-	.4byte	0x30c
-	.uleb128 0x45
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x2aa
-	.4byte	0x3339
-	.4byte	.LLST133
-	.uleb128 0x45
-	.4byte	.LASF504
-	.byte	0x2
-	.2byte	0x2ab
-	.4byte	0x301
-	.4byte	.LLST134
-	.uleb128 0x40
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x2ad
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x23df
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6760
-	.uleb128 0x4f
-	.4byte	0x17c6
-	.4byte	.LBB385
-	.4byte	.Ldebug_ranges0+0x180
-	.byte	0x2
-	.2byte	0x2c3
-	.4byte	0x3bb5
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x180
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x180
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL592
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL589
-	.4byte	0x3bec
-	.uleb128 0x31
-	.4byte	.LVL590
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL591
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL595
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL598
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL599
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF534
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x64
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ca7
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x3333
-	.4byte	.LLST126
-	.uleb128 0x3e
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF535
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0x301
-	.4byte	.LLST127
-	.uleb128 0x45
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x630
-	.4byte	.LLST128
-	.uleb128 0x45
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0x539
-	.4byte	.LLST129
-	.uleb128 0x3e
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x3339
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x3cb7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6746
-	.uleb128 0x31
-	.4byte	.LVL572
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL573
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL579
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL582
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL583
-	.4byte	0x3cbc
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3cb7
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x3ca7
-	.uleb128 0x3b
-	.4byte	.LASF537
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x64
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3d87
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x3333
-	.4byte	.LLST135
-	.uleb128 0x1f
-	.4byte	.LASF538
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3e
-	.4byte	.LASF539
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x301
-	.uleb128 0x1f
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x45
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x630
-	.4byte	.LLST136
-	.uleb128 0x1f
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0x539
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x3e
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x3339
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6732
-	.uleb128 0x31
-	.4byte	.LVL605
-	.4byte	0x3ddf
-	.uleb128 0x31
-	.4byte	.LVL607
-	.4byte	0x3d87
-	.uleb128 0x31
-	.4byte	.LVL609
-	.4byte	0x436d
-	.uleb128 0x31
-	.4byte	.LVL611
-	.4byte	0x3d87
-	.uleb128 0x31
-	.4byte	.LVL613
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL614
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL615
-	.4byte	0x3ad6
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF540
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x3dca
-	.uleb128 0x3d
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x3333
-	.uleb128 0x3e
-	.4byte	.LASF541
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x630
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x3dda
-	.4byte	.LASF540
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x3dda
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x19
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x3dca
-	.uleb128 0x3b
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x64
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3e90
-	.uleb128 0x44
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x3333
-	.4byte	.LLST121
-	.uleb128 0x1f
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x630
-	.uleb128 0x1
-	.byte	0x59
-	.uleb128 0x45
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0x539
-	.4byte	.LLST122
-	.uleb128 0x1f
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x630
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x45
-	.4byte	.LASF178
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x301
-	.4byte	.LLST123
-	.uleb128 0x3e
-	.4byte	.LASF119
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF541
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0x301
-	.4byte	.LLST124
-	.uleb128 0x45
-	.4byte	.LASF539
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0x301
-	.4byte	.LLST125
-	.uleb128 0x31
-	.4byte	.LVL560
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL569
-	.4byte	0x436d
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF545
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x64
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f37
-	.uleb128 0x44
-	.4byte	.LASF105
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x301
-	.4byte	.LLST118
-	.uleb128 0x44
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x301
-	.4byte	.LLST119
-	.uleb128 0x45
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x3339
-	.4byte	.LLST120
-	.uleb128 0x1f
-	.4byte	.LASF546
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x23df
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6688
-	.uleb128 0x31
-	.4byte	.LVL543
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL545
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL548
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL550
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL551
-	.4byte	0x6808
-	.uleb128 0x31
-	.4byte	.LVL552
-	.4byte	0x6808
-	.uleb128 0x31
-	.4byte	.LVL553
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF547
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x3fb6
-	.uleb128 0x3d
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF548
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF549
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF550
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF551
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF552
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1210
-	.uleb128 0x3e
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1210
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x3092
-	.4byte	.LASF547
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF554
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x64
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ffd
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x301
-	.4byte	.LLST46
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x1210
-	.4byte	.LLST47
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF555
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x64
-	.4byte	.LFB200
-	.4byte	.LFE200-.LFB200
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4031
-	.uleb128 0x44
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x4031
-	.4byte	.LLST45
-	.uleb128 0x24
-	.4byte	.LVL145
-	.4byte	0x4037
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1210
-	.uleb128 0x3b
-	.4byte	.LASF557
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x64
-	.4byte	.LFB199
-	.4byte	.LFE199-.LFB199
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4097
-	.uleb128 0x44
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x4031
-	.4byte	.LLST42
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x301
-	.4byte	.LLST43
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x1210
-	.4byte	.LLST44
-	.uleb128 0x31
-	.4byte	.LVL139
-	.4byte	0x4097
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF558
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x64
-	.4byte	.LFB198
-	.4byte	.LFE198-.LFB198
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4104
-	.uleb128 0x44
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x4031
-	.4byte	.LLST40
-	.uleb128 0x44
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x301
-	.4byte	.LLST41
-	.uleb128 0x1f
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1210
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3e
-	.4byte	.LASF559
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1210
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x4114
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6647
-	.uleb128 0x31
-	.4byte	.LVL132
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x4114
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0x10
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x4104
-	.uleb128 0x3b
-	.4byte	.LASF560
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x64
-	.4byte	.LFB197
-	.4byte	.LFE197-.LFB197
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4188
-	.uleb128 0x44
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x301
-	.4byte	.LLST37
-	.uleb128 0x1f
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1210
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x1f
-	.4byte	.LASF559
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1210
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x45
-	.4byte	.LASF561
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0x301
-	.4byte	.LLST38
-	.uleb128 0x3e
-	.4byte	.LASF562
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF563
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF564
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x41fd
-	.uleb128 0x34
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF435
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1210
-	.uleb128 0x35
-	.4byte	.LASF559
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1210
-	.uleb128 0x35
-	.4byte	.LASF565
-	.byte	0x2
-	.byte	0xfb
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF566
-	.byte	0x2
-	.byte	0xfc
-	.4byte	0x301
-	.uleb128 0x35
-	.4byte	.LASF550
-	.byte	0x2
-	.byte	0xfd
-	.4byte	0x30c
-	.uleb128 0x35
-	.4byte	.LASF567
-	.byte	0x2
-	.byte	0xfe
-	.4byte	0x30c
-	.uleb128 0x35
-	.4byte	.LASF563
-	.byte	0x2
-	.byte	0xff
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF114
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x58
-	.4byte	.LASF568
-	.byte	0x2
-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x4222
-	.uleb128 0x34
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd9
-	.4byte	0x301
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x4114
-	.4byte	.LASF568
-	.byte	0
-	.uleb128 0x58
-	.4byte	.LASF569
-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x4247
-	.uleb128 0x34
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0x301
-	.uleb128 0x41
-	.4byte	.LASF362
-	.4byte	0x4114
-	.4byte	.LASF569
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF570
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0x301
-	.4byte	.LFB193
-	.4byte	.LFE193-.LFB193
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x42ca
-	.uleb128 0x37
-	.ascii	"tmp\000"
-	.byte	0x2
-	.byte	0xb6
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xb7
-	.4byte	0x42ca
-	.uleb128 0x59
-	.4byte	.LASF571
-	.byte	0x2
-	.byte	0xb9
-	.4byte	.L518
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x118
-	.4byte	0x42a8
-	.uleb128 0x35
-	.4byte	.LASF572
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL463
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL464
-	.4byte	0x1954
-	.byte	0
-	.uleb128 0x5a
-	.4byte	0x43b4
-	.4byte	.LBB315
-	.4byte	.Ldebug_ranges0+0x100
-	.byte	0x2
-	.byte	0xba
-	.uleb128 0x31
-	.4byte	.LVL465
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL466
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xadc
-	.uleb128 0x22
-	.4byte	.LASF573
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x64
-	.4byte	.LFB192
-	.4byte	.LFE192-.LFB192
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4329
-	.uleb128 0x2b
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x301
-	.4byte	.LLST27
-	.uleb128 0x37
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0xa4
-	.4byte	0x64
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x37
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0xa5
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xa6
-	.4byte	0x42ca
-	.uleb128 0x5a
-	.4byte	0x43a8
-	.4byte	.LBB251
-	.4byte	.Ldebug_ranges0+0x50
-	.byte	0x2
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF574
-	.byte	0x2
-	.byte	0x75
-	.4byte	.LFB191
-	.4byte	.LFE191-.LFB191
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x436d
-	.uleb128 0x20
-	.4byte	.LASF114
-	.byte	0x2
-	.byte	0x77
-	.4byte	0x317
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x301
-	.uleb128 0x4a
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x301
-	.4byte	.LLST26
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x79
-	.4byte	0x42ca
-	.byte	0
-	.uleb128 0x58
-	.4byte	.LASF575
-	.byte	0x2
-	.byte	0x61
-	.byte	0x1
-	.4byte	0x43a8
-	.uleb128 0x27
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x61
-	.4byte	0x301
-	.uleb128 0x34
-	.4byte	.LASF576
-	.byte	0x2
-	.byte	0x61
-	.4byte	0x301
-	.uleb128 0x28
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x66
-	.4byte	0x42ca
-	.uleb128 0x28
-	.uleb128 0x35
-	.4byte	.LASF572
-	.byte	0x2
-	.byte	0x68
-	.4byte	0x301
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF577
-	.byte	0x2
-	.byte	0x5c
-	.4byte	0x301
-	.byte	0x1
-	.uleb128 0x5b
-	.4byte	.LASF578
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x301
-	.byte	0x1
-	.uleb128 0x22
-	.4byte	.LASF579
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x301
-	.4byte	.LFB187
-	.4byte	.LFE187-.LFB187
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x443f
-	.uleb128 0x2b
-	.ascii	"max\000"
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x301
-	.4byte	.LLST25
-	.uleb128 0x29
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x4d
-	.4byte	0x42ca
-	.uleb128 0x5c
-	.4byte	0x17c6
-	.4byte	.LBB242
-	.4byte	.Ldebug_ranges0+0x30
-	.byte	0x2
-	.byte	0x53
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x31
-	.4byte	.LVL76
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF580
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x64
-	.4byte	.LFB186
-	.4byte	.LFE186-.LFB186
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x44d7
-	.uleb128 0x23
-	.4byte	.LASF178
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x30c
-	.4byte	.LLST87
-	.uleb128 0x23
-	.4byte	.LASF356
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x64
-	.4byte	.LLST88
-	.uleb128 0x37
-	.ascii	"req\000"
-	.byte	0x2
-	.byte	0x30
-	.4byte	0x32d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x37
-	.ascii	"low\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x322
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x20
-	.4byte	.LASF581
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x322
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x29
-	.ascii	"mid\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0x322
-	.uleb128 0x20
-	.4byte	.LASF582
-	.byte	0x2
-	.byte	0x32
-	.4byte	0x1944
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x35
-	.4byte	.LASF583
-	.byte	0x2
-	.byte	0x33
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL380
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL383
-	.4byte	0x1af8
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF584
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30c
-	.4byte	.LFB185
-	.4byte	.LFE185-.LFB185
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x451a
-	.uleb128 0x23
-	.4byte	.LASF585
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30c
-	.4byte	.LLST24
-	.uleb128 0x4c
-	.4byte	.LASF586
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x37
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0x20
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF587
-	.byte	0x2
-	.byte	0x14
-	.4byte	0x301
-	.4byte	.LFB184
-	.4byte	.LFE184-.LFB184
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x454e
-	.uleb128 0x23
-	.4byte	.LASF378
-	.byte	0x2
-	.byte	0x14
-	.4byte	0x301
-	.4byte	.LLST23
-	.uleb128 0x35
-	.4byte	.LASF500
-	.byte	0x2
-	.byte	0x16
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF588
-	.byte	0x2
-	.byte	0xc
-	.4byte	0x301
-	.4byte	.LFB183
-	.4byte	.LFE183-.LFB183
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4582
-	.uleb128 0x23
-	.4byte	.LASF378
-	.byte	0x2
-	.byte	0xc
-	.4byte	0x301
-	.4byte	.LLST22
-	.uleb128 0x35
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0xe
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF589
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x301
-	.4byte	.LFB182
-	.4byte	.LFE182-.LFB182
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45c5
-	.uleb128 0x23
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x301
-	.4byte	.LLST20
-	.uleb128 0x23
-	.4byte	.LASF500
-	.byte	0x2
-	.byte	0x4
-	.4byte	0x301
-	.4byte	.LLST21
-	.uleb128 0x35
-	.4byte	.LASF392
-	.byte	0x2
-	.byte	0x6
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF590
-	.byte	0x4
-	.2byte	0x13c
-	.4byte	0x317
-	.4byte	.LFB181
-	.4byte	.LFE181-.LFB181
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4789
-	.uleb128 0x52
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x13e
-	.4byte	0x30c
-	.4byte	.LLST217
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x13f
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF352
-	.byte	0x4
-	.2byte	0x140
-	.4byte	0x30c
-	.4byte	.LLST218
-	.uleb128 0x3e
-	.4byte	.LASF591
-	.byte	0x4
-	.2byte	0x142
-	.4byte	0x4789
-	.uleb128 0x40
-	.4byte	.LASF592
-	.byte	0x4
-	.2byte	0x158
-	.uleb128 0x4f
-	.4byte	0x17c6
-	.4byte	.LBB488
-	.4byte	.Ldebug_ranges0+0x250
-	.byte	0x4
-	.2byte	0x15e
-	.4byte	0x4671
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x250
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x250
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1092
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB494
-	.4byte	.LBE494-.LBB494
-	.byte	0x4
-	.2byte	0x15f
-	.4byte	0x46cb
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB495
-	.4byte	.LBE495-.LBB495
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB496
-	.4byte	.LBE496-.LBB496
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1093
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1079
-	.4byte	0x48f1
-	.uleb128 0x31
-	.4byte	.LVL1080
-	.4byte	0x478f
-	.uleb128 0x31
-	.4byte	.LVL1081
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL1082
-	.4byte	0x1900
-	.uleb128 0x31
-	.4byte	.LVL1083
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1086
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1087
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1088
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1089
-	.4byte	0x180a
-	.uleb128 0x31
-	.4byte	.LVL1090
-	.4byte	0x4a51
-	.uleb128 0x31
-	.4byte	.LVL1091
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL1096
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1097
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL1098
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1099
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1100
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1101
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL1102
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1103
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL1104
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1105
-	.4byte	0x4954
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x700
-	.uleb128 0x3b
-	.4byte	.LASF593
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x64
-	.4byte	.LFB180
-	.4byte	.LFE180-.LFB180
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47ed
-	.uleb128 0x51
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x118
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x52
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0x301
-	.4byte	.LLST85
-	.uleb128 0x45
-	.4byte	.LASF594
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0x30c
-	.4byte	.LLST86
-	.uleb128 0x3e
-	.4byte	.LASF591
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x4789
-	.uleb128 0x31
-	.4byte	.LVL375
-	.4byte	0x1af8
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF595
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x64
-	.4byte	.LFB179
-	.4byte	.LFE179-.LFB179
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x489d
-	.uleb128 0x4a
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xae
-	.4byte	0x30c
-	.4byte	.LLST214
-	.uleb128 0x4a
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0x301
-	.4byte	.LLST215
-	.uleb128 0x2c
-	.4byte	.LASF488
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0x322
-	.4byte	.LLST216
-	.uleb128 0x35
-	.4byte	.LASF591
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x4789
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x48ad
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6494
-	.uleb128 0x31
-	.4byte	.LVL1057
-	.4byte	0x48f1
-	.uleb128 0x31
-	.4byte	.LVL1059
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1060
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1061
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1062
-	.4byte	0x443f
-	.uleb128 0x31
-	.4byte	.LVL1064
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1065
-	.4byte	0x5872
-	.uleb128 0x31
-	.4byte	.LVL1071
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1075
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x48ad
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xa
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x489d
-	.uleb128 0x22
-	.4byte	.LASF596
-	.byte	0x4
-	.byte	0x9c
-	.4byte	0x301
-	.4byte	.LFB178
-	.4byte	.LFE178-.LFB178
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x48f1
-	.uleb128 0x4a
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0x9e
-	.4byte	0x301
-	.4byte	.LLST19
-	.uleb128 0x20
-	.4byte	.LASF597
-	.byte	0x4
-	.byte	0x9f
-	.4byte	0x301
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x31
-	.4byte	.LVL56
-	.4byte	0x4ab7
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF598
-	.byte	0x4
-	.byte	0x94
-	.4byte	.LFB177
-	.4byte	.LFE177-.LFB177
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4954
-	.uleb128 0x5c
-	.4byte	0x17c6
-	.4byte	.LBB231
-	.4byte	.Ldebug_ranges0+0x18
-	.byte	0x4
-	.byte	0x98
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x18
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x18
-	.uleb128 0x30
-	.4byte	0x17f2
-	.uleb128 0x30
-	.4byte	0x17fd
-	.uleb128 0x24
-	.4byte	.LVL53
-	.4byte	0x67e7
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF599
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x64
-	.4byte	.LFB176
-	.4byte	.LFE176-.LFB176
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4a51
-	.uleb128 0x4a
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x51
-	.4byte	0x64
-	.4byte	.LLST180
-	.uleb128 0x2c
-	.4byte	.LASF600
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x64
-	.4byte	.LLST181
-	.uleb128 0x2c
-	.4byte	.LASF591
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x4789
-	.4byte	.LLST182
-	.uleb128 0x2c
-	.4byte	.LASF504
-	.byte	0x4
-	.byte	0x54
-	.4byte	0x301
-	.4byte	.LLST183
-	.uleb128 0x47
-	.4byte	.LASF601
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x5d
-	.4byte	.LASF362
-	.4byte	0x1af3
-	.uleb128 0x2d
-	.4byte	0x17c6
-	.4byte	.LBB443
-	.4byte	.Ldebug_ranges0+0x1c8
-	.byte	0x4
-	.byte	0x5f
-	.4byte	0x4a08
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1c8
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1c8
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL835
-	.4byte	0x67e7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL832
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL837
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL838
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL839
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL840
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL843
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL844
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL846
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF602
-	.byte	0x4
-	.byte	0x41
-	.4byte	.LFB175
-	.4byte	.LFE175-.LFB175
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4aaf
-	.uleb128 0x23
-	.4byte	.LASF536
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x630
-	.4byte	.LLST116
-	.uleb128 0x23
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x539
-	.4byte	.LLST117
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0x30c
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x29d3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6451
-	.uleb128 0x31
-	.4byte	.LVL539
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL540
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x5e
-	.4byte	.LASF604
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x2a
-	.4byte	.LASF605
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x64
-	.4byte	.LFB173
-	.4byte	.LFE173-.LFB173
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b12
-	.uleb128 0x23
-	.4byte	.LASF178
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x301
-	.4byte	.LLST16
-	.uleb128 0x4a
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x19
-	.4byte	0x30c
-	.4byte	.LLST17
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0x30c
-	.uleb128 0x35
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0x539
-	.uleb128 0x2c
-	.4byte	.LASF369
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0x301
-	.4byte	.LLST18
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF606
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x64
-	.4byte	.LFB172
-	.4byte	.LFE172-.LFB172
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b69
-	.uleb128 0x23
-	.4byte	.LASF178
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x301
-	.4byte	.LLST14
-	.uleb128 0x4a
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0x30c
-	.4byte	.LLST15
-	.uleb128 0x35
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x539
-	.uleb128 0x35
-	.4byte	.LASF369
-	.byte	0x4
-	.byte	0x8
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL43
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF668
-	.byte	0x3
-	.2byte	0x4bd
-	.4byte	0x30c
-	.4byte	.LFB171
-	.4byte	.LFE171-.LFB171
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x3b
-	.4byte	.LASF607
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x64
-	.4byte	.LFB170
-	.4byte	.LFE170-.LFB170
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4bd3
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x99
-	.4byte	.LLST294
-	.uleb128 0x44
-	.4byte	.LASF114
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x99
-	.4byte	.LLST295
-	.uleb128 0x4e
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x4bd3
-	.4byte	.LLST296
-	.uleb128 0x24
-	.4byte	.LVL1561
-	.4byte	0x4cff
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x79
-	.uleb128 0x3b
-	.4byte	.LASF608
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x64
-	.4byte	.LFB169
-	.4byte	.LFE169-.LFB169
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4c2d
-	.uleb128 0x44
-	.4byte	.LASF93
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x99
-	.4byte	.LLST280
-	.uleb128 0x44
-	.4byte	.LASF114
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x99
-	.4byte	.LLST281
-	.uleb128 0x4e
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x4bd3
-	.4byte	.LLST282
-	.uleb128 0x24
-	.4byte	.LVL1460
-	.4byte	0x507c
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF609
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x64
-	.4byte	.LFB168
-	.4byte	.LFE168-.LFB168
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4cff
-	.uleb128 0x44
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x30c
-	.4byte	.LLST245
-	.uleb128 0x44
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x30c
-	.4byte	.LLST246
-	.uleb128 0x45
-	.4byte	.LASF517
-	.byte	0x3
-	.2byte	0x486
-	.4byte	0x301
-	.4byte	.LLST247
-	.uleb128 0x3f
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x487
-	.4byte	0x301
-	.uleb128 0x52
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x488
-	.4byte	0x30c
-	.4byte	.LLST248
-	.uleb128 0x45
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x30c
-	.4byte	.LLST249
-	.uleb128 0x45
-	.4byte	.LASF423
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x30c
-	.4byte	.LLST250
-	.uleb128 0x3e
-	.4byte	.LASF412
-	.byte	0x3
-	.2byte	0x48a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL1233
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1239
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1240
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1241
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1244
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1245
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1246
-	.4byte	0x232e
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF610
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x64
-	.4byte	.LFB167
-	.4byte	.LFE167-.LFB167
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f1f
-	.uleb128 0x4e
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2f6
-	.4byte	.LLST283
-	.uleb128 0x44
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x30c
-	.4byte	.LLST284
-	.uleb128 0x44
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x30c
-	.4byte	.LLST285
-	.uleb128 0x44
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x385a
-	.4byte	.LLST286
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x1d3f
-	.uleb128 0x52
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST287
-	.uleb128 0x45
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST288
-	.uleb128 0x45
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x30c
-	.4byte	.LLST289
-	.uleb128 0x45
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x30c
-	.4byte	.LLST290
-	.uleb128 0x3f
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x30c
-	.uleb128 0x52
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30c
-	.4byte	.LLST291
-	.uleb128 0x45
-	.4byte	.LASF613
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30c
-	.4byte	.LLST292
-	.uleb128 0x3e
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF614
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x30c
-	.uleb128 0x3e
-	.4byte	.LASF615
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x30c
-	.uleb128 0x45
-	.4byte	.LASF422
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x12c0
-	.4byte	.LLST293
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x39ff
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6387
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x2b0
-	.4byte	0x4e46
-	.uleb128 0x1f
-	.4byte	.LASF385
-	.byte	0x3
-	.2byte	0x43d
-	.4byte	0x32d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x31
-	.4byte	.LVL1538
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1542
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1543
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1464
-	.4byte	0x3860
-	.uleb128 0x31
-	.4byte	.LVL1475
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1481
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1483
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1484
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1486
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1488
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1491
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1495
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1497
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1498
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1499
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1500
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1505
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1510
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1514
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1517
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1518
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1519
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1532
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1539
-	.4byte	0x176f
-	.uleb128 0x31
-	.4byte	.LVL1544
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1552
-	.4byte	0x4f43
-	.uleb128 0x31
-	.4byte	.LVL1554
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF616
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x64
-	.4byte	.LFB166
-	.4byte	.LFE166-.LFB166
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f43
-	.uleb128 0x31
-	.4byte	.LVL1223
-	.4byte	0x4f43
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF617
-	.byte	0x3
-	.2byte	0x387
-	.4byte	.LFB165
-	.4byte	.LFE165-.LFB165
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5067
-	.uleb128 0x4e
-	.ascii	"req\000"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xf40
-	.4byte	.LLST238
-	.uleb128 0x44
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x30c
-	.4byte	.LLST239
-	.uleb128 0x44
-	.4byte	.LASF618
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x30c
-	.4byte	.LLST240
-	.uleb128 0x44
-	.4byte	.LASF422
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x12c0
-	.4byte	.LLST241
-	.uleb128 0x52
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0x30c
-	.4byte	.LLST242
-	.uleb128 0x52
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x30c
-	.4byte	.LLST243
-	.uleb128 0x45
-	.4byte	.LASF446
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x30c
-	.4byte	.LLST244
-	.uleb128 0x3e
-	.4byte	.LASF405
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF380
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x1d3f
-	.uleb128 0x3e
-	.4byte	.LASF470
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0x30c
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x5077
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6359
-	.uleb128 0x31
-	.4byte	.LVL1202
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1204
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1205
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1206
-	.4byte	0x1e11
-	.uleb128 0x31
-	.4byte	.LVL1207
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL1208
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL1210
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1212
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1214
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1217
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1218
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1221
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0xc
-	.4byte	0x3c
-	.4byte	0x5077
-	.uleb128 0x17
-	.4byte	0x2e
-	.byte	0xc
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5067
-	.uleb128 0x4d
-	.4byte	.LASF619
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x64
-	.4byte	.LFB164
-	.4byte	.LFE164-.LFB164
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x525b
-	.uleb128 0x4e
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2f6
-	.4byte	.LLST265
-	.uleb128 0x44
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x30c
-	.4byte	.LLST266
-	.uleb128 0x44
-	.4byte	.LASF515
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x30c
-	.4byte	.LLST267
-	.uleb128 0x44
-	.4byte	.LASF516
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x385a
-	.4byte	.LLST268
-	.uleb128 0x51
-	.ascii	"ret\000"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x64
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x45
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST269
-	.uleb128 0x45
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST270
-	.uleb128 0x45
-	.4byte	.LASF620
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x30c
-	.4byte	.LLST271
-	.uleb128 0x52
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x30c
-	.4byte	.LLST272
-	.uleb128 0x52
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x30c
-	.4byte	.LLST273
-	.uleb128 0x52
-	.ascii	"n\000"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST274
-	.uleb128 0x45
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST275
-	.uleb128 0x45
-	.4byte	.LASF613
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x30c
-	.4byte	.LLST276
-	.uleb128 0x45
-	.4byte	.LASF621
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x30c
-	.4byte	.LLST277
-	.uleb128 0x3e
-	.4byte	.LASF622
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x30c
-	.uleb128 0x45
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0x30c
-	.4byte	.LLST278
-	.uleb128 0x45
-	.4byte	.LASF624
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0x30c
-	.4byte	.LLST279
-	.uleb128 0x53
-	.4byte	.LBB537
-	.4byte	.LBE537-.LBB537
-	.4byte	0x51ca
-	.uleb128 0x3e
-	.4byte	.LASF392
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0x301
-	.uleb128 0x31
-	.4byte	.LVL1432
-	.4byte	0x451a
-	.uleb128 0x31
-	.4byte	.LVL1433
-	.4byte	0x1e6d
-	.byte	0
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB538
-	.4byte	.LBE538-.LBB538
-	.byte	0x3
-	.2byte	0x350
-	.4byte	0x5224
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB539
-	.4byte	.LBE539-.LBB539
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB540
-	.4byte	.LBE540-.LBB540
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL1437
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1392
-	.4byte	0x378a
-	.uleb128 0x31
-	.4byte	.LVL1398
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1413
-	.4byte	0x1c72
-	.uleb128 0x31
-	.4byte	.LVL1416
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1423
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1429
-	.4byte	0x176f
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF625
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x64
-	.4byte	.LFB163
-	.4byte	.LFE163-.LFB163
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x527f
-	.uleb128 0x31
-	.4byte	.LVL1228
-	.4byte	0x527f
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF626
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x64
-	.4byte	.LFB162
-	.4byte	.LFE162-.LFB162
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x52be
-	.uleb128 0x31
-	.4byte	.LVL1224
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1225
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1226
-	.4byte	0x373d
-	.uleb128 0x31
-	.4byte	.LVL1227
-	.4byte	0x3598
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF627
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x64
-	.4byte	.LFB161
-	.4byte	.LFE161-.LFB161
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x534d
-	.uleb128 0x3e
-	.4byte	.LASF628
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x534d
-	.uleb128 0x40
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x2f3
-	.uleb128 0x53
-	.4byte	.LBB550
-	.4byte	.LBE550-.LBB550
-	.4byte	0x530d
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0x30c
-	.uleb128 0x31
-	.4byte	.LVL1647
-	.4byte	0x1c72
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1640
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1641
-	.4byte	0x5821
-	.uleb128 0x31
-	.4byte	.LVL1642
-	.4byte	0x5699
-	.uleb128 0x31
-	.4byte	.LVL1643
-	.4byte	0x559d
-	.uleb128 0x31
-	.4byte	.LVL1644
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1645
-	.4byte	0x47ed
-	.uleb128 0x31
-	.4byte	.LVL1646
-	.4byte	0x2815
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x419
-	.uleb128 0x4d
-	.4byte	.LASF630
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x64
-	.4byte	.LFB160
-	.4byte	.LFE160-.LFB160
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x544c
-	.uleb128 0x3e
-	.4byte	.LASF500
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF631
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x301
-	.4byte	.LLST299
-	.uleb128 0x45
-	.4byte	.LASF632
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0x301
-	.4byte	.LLST300
-	.uleb128 0x3f
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0x301
-	.uleb128 0x48
-	.4byte	.LASF633
-	.byte	0x3
-	.2byte	0x2bc
-	.4byte	.L1784
-	.uleb128 0x48
-	.4byte	.LASF634
-	.byte	0x3
-	.2byte	0x2cc
-	.4byte	.L1786
-	.uleb128 0x31
-	.4byte	.LVL1609
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1610
-	.4byte	0x47ed
-	.uleb128 0x31
-	.4byte	.LVL1611
-	.4byte	0x45c5
-	.uleb128 0x31
-	.4byte	.LVL1618
-	.4byte	0x4954
-	.uleb128 0x31
-	.4byte	.LVL1619
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1620
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL1621
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1623
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1627
-	.4byte	0x5872
-	.uleb128 0x31
-	.4byte	.LVL1628
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1630
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1632
-	.4byte	0x544c
-	.uleb128 0x31
-	.4byte	.LVL1636
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1637
-	.4byte	0x4247
-	.uleb128 0x31
-	.4byte	.LVL1638
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1639
-	.4byte	0x2815
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF635
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x64
-	.4byte	.LFB159
-	.4byte	.LFE159-.LFB159
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5573
-	.uleb128 0x44
-	.4byte	.LASF500
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x301
-	.4byte	.LLST99
-	.uleb128 0x44
-	.4byte	.LASF636
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2f6
-	.4byte	.LLST100
-	.uleb128 0x45
-	.4byte	.LASF631
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x301
-	.4byte	.LLST101
-	.uleb128 0x3e
-	.4byte	.LASF357
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF376
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF178
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x301
-	.uleb128 0x45
-	.4byte	.LASF637
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0x301
-	.4byte	.LLST102
-	.uleb128 0x45
-	.4byte	.LASF638
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0x301
-	.4byte	.LLST103
-	.uleb128 0x45
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0x301
-	.4byte	.LLST104
-	.uleb128 0x45
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0x301
-	.4byte	.LLST105
-	.uleb128 0x48
-	.4byte	.LASF641
-	.byte	0x3
-	.2byte	0x240
-	.4byte	.L482
-	.uleb128 0x31
-	.4byte	.LVL424
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL431
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL439
-	.4byte	0x1954
-	.uleb128 0x31
-	.4byte	.LVL443
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL444
-	.4byte	0x5573
-	.uleb128 0x31
-	.4byte	.LVL445
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL450
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL455
-	.4byte	0x4582
-	.uleb128 0x31
-	.4byte	.LVL456
-	.4byte	0x5573
-	.uleb128 0x31
-	.4byte	.LVL457
-	.4byte	0x4ab7
-	.uleb128 0x31
-	.4byte	.LVL460
-	.4byte	0x4b12
-	.uleb128 0x31
-	.4byte	.LVL462
-	.4byte	0x436d
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LASF642
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x64
-	.byte	0x1
-	.4byte	0x559d
-	.uleb128 0x3d
-	.4byte	.LASF178
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x301
-	.uleb128 0x3e
-	.4byte	.LASF643
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0x301
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF644
-	.byte	0x3
-	.2byte	0x1ec
-	.4byte	0x64
-	.4byte	.LFB157
-	.4byte	.LFE157-.LFB157
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5699
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB432
-	.4byte	.LBE432-.LBB432
-	.byte	0x3
-	.2byte	0x1f9
-	.4byte	0x5611
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB433
-	.4byte	.LBE433-.LBB433
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB434
-	.4byte	.LBE434-.LBB434
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL764
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	0x17c6
-	.4byte	.LBB435
-	.4byte	.LBE435-.LBB435
-	.byte	0x3
-	.2byte	0x1fa
-	.4byte	0x566b
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB436
-	.4byte	.LBE436-.LBB436
-	.uleb128 0x2e
-	.4byte	0x17e8
-	.uleb128 0x2e
-	.4byte	0x17df
-	.uleb128 0x2e
-	.4byte	0x17d6
-	.uleb128 0x33
-	.4byte	.LBB437
-	.4byte	.LBE437-.LBB437
-	.uleb128 0x30
-	.4byte	0x61fc
-	.uleb128 0x30
-	.4byte	0x6201
-	.uleb128 0x31
-	.4byte	.LVL765
-	.4byte	0x67fd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL761
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL762
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL763
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL766
-	.4byte	0x230f
-	.uleb128 0x31
-	.4byte	.LVL767
-	.4byte	0x31cc
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF645
-	.byte	0x3
-	.2byte	0x116
-	.4byte	0x64
-	.4byte	.LFB156
-	.4byte	.LFE156-.LFB156
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5821
-	.uleb128 0x52
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x118
-	.4byte	0x30c
-	.4byte	.LLST115
-	.uleb128 0x3e
-	.4byte	.LASF646
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0x30c
-	.uleb128 0x38
-	.4byte	.LASF362
-	.4byte	0x48ad
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.6235
-	.uleb128 0x31
-	.4byte	.LVL496
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL497
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL498
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL499
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL500
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL501
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL502
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL503
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL504
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL505
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL506
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL507
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL508
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL509
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL510
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL511
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL512
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL513
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL514
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL515
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL516
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL517
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL518
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL519
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL520
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL521
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL522
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL523
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL524
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL525
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL526
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL527
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL528
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL529
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL530
-	.4byte	0x6813
-	.uleb128 0x31
-	.4byte	.LVL533
-	.4byte	0x67f2
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF647
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x64
-	.4byte	.LFB155
-	.4byte	.LFE155-.LFB155
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5872
-	.uleb128 0x23
-	.4byte	.LASF628
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x534d
-	.4byte	.LLST11
-	.uleb128 0x4a
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xb8
-	.4byte	0x30c
-	.4byte	.LLST12
-	.uleb128 0x31
-	.4byte	.LVL28
-	.4byte	0x58b3
-	.uleb128 0x31
-	.4byte	.LVL29
-	.4byte	0x58b3
-	.uleb128 0x31
-	.4byte	.LVL32
-	.4byte	0x5872
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF648
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x64
-	.4byte	.LFB154
-	.4byte	.LFE154-.LFB154
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x589b
-	.uleb128 0x23
-	.4byte	.LASF649
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x301
-	.4byte	.LLST10
-	.byte	0
-	.uleb128 0x58
-	.4byte	.LASF650
-	.byte	0x3
-	.byte	0x9e
-	.byte	0x1
-	.4byte	0x58b3
-	.uleb128 0x34
-	.4byte	.LASF651
-	.byte	0x3
-	.byte	0x9e
-	.4byte	0x30c
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF652
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x301
-	.4byte	.LFB152
-	.4byte	.LFE152-.LFB152
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x58f2
-	.uleb128 0x2b
-	.ascii	"num\000"
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x30c
-	.4byte	.LLST9
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x80
-	.4byte	0x301
-	.uleb128 0x20
-	.4byte	.LASF653
-	.byte	0x3
-	.byte	0x81
-	.4byte	0x30c
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF654
-	.byte	0x3
-	.byte	0x70
-	.4byte	0x64
-	.4byte	.LFB151
-	.4byte	.LFE151-.LFB151
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5938
-	.uleb128 0x23
-	.4byte	.LASF85
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xb6
-	.4byte	.LLST65
-	.uleb128 0x29
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0x72
-	.4byte	0xb6
-	.uleb128 0x31
-	.4byte	.LVL286
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL287
-	.4byte	0x5938
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF655
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x64
-	.4byte	.LFB150
-	.4byte	.LFE150-.LFB150
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c2e
-	.uleb128 0x23
-	.4byte	.LASF85
-	.byte	0x3
-	.byte	0xa
-	.4byte	0xb6
-	.4byte	.LLST62
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xc
-	.4byte	0x64
-	.uleb128 0x29
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0xb6
-	.uleb128 0x53
-	.4byte	.LBB289
-	.4byte	.LBE289-.LBB289
-	.4byte	0x59a3
-	.uleb128 0x2c
-	.4byte	.LASF392
-	.byte	0x3
-	.byte	0x56
-	.4byte	0x301
-	.4byte	.LLST63
-	.uleb128 0x31
-	.4byte	.LVL277
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL279
-	.4byte	0x681e
-	.byte	0
-	.uleb128 0x53
-	.4byte	.LBB290
-	.4byte	.LBE290-.LBB290
-	.4byte	0x59c9
-	.uleb128 0x2c
-	.4byte	.LASF392
-	.byte	0x3
-	.byte	0x5f
-	.4byte	0x301
-	.4byte	.LLST64
-	.uleb128 0x31
-	.4byte	.LVL283
-	.4byte	0x681e
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL207
-	.4byte	0x682a
-	.uleb128 0x31
-	.4byte	.LVL208
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL209
-	.4byte	0x682a
-	.uleb128 0x31
-	.4byte	.LVL210
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL211
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL212
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL213
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL214
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL215
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL216
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL217
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL218
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL219
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL220
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL221
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL222
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL223
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL224
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL225
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL226
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL227
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL228
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL229
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL230
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL231
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL232
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL233
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL234
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL235
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL236
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL237
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL238
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL239
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL240
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL241
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL242
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL243
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL244
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL245
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL246
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL247
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL248
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL249
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL250
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL251
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL252
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL253
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL254
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL255
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL256
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL257
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL258
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL259
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL260
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL261
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL262
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL263
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL264
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL265
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL266
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL267
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL268
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL269
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL270
-	.4byte	0x278b
-	.uleb128 0x31
-	.4byte	.LVL271
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL272
-	.4byte	0x273c
-	.uleb128 0x31
-	.4byte	.LVL273
-	.4byte	0x681e
-	.uleb128 0x31
-	.4byte	.LVL276
-	.4byte	0x681e
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x3419
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c50
-	.uleb128 0x61
-	.4byte	0x3426
-	.4byte	.LLST8
-	.uleb128 0x2e
-	.4byte	0x3432
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x589b
-	.4byte	.LFB153
-	.4byte	.LFE153-.LFB153
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c6b
-	.uleb128 0x62
-	.4byte	0x58a7
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x5573
-	.4byte	.LFB158
-	.4byte	.LFE158-.LFB158
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5ca3
-	.uleb128 0x61
-	.4byte	0x5584
-	.4byte	.LLST13
-	.uleb128 0x30
-	.4byte	0x5590
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x2e
-	.4byte	0x5584
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x30
-	.4byte	0x5c87
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.4byte	0x4aaf
-	.4byte	.LFB174
-	.4byte	.LFE174-.LFB174
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x63
-	.4byte	0x43b4
-	.4byte	.LFB188
-	.4byte	.LFE188-.LFB188
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x63
-	.4byte	0x43a8
-	.4byte	.LFB189
-	.4byte	.LFE189-.LFB189
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x60
-	.4byte	0x4188
-	.4byte	.LFB196
-	.4byte	.LFE196-.LFB196
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d6a
-	.uleb128 0x61
-	.4byte	0x4198
-	.4byte	.LLST28
-	.uleb128 0x30
-	.4byte	0x41a3
-	.uleb128 0x30
-	.4byte	0x41ae
-	.uleb128 0x30
-	.4byte	0x41b9
-	.uleb128 0x30
-	.4byte	0x41c4
-	.uleb128 0x30
-	.4byte	0x41cf
-	.uleb128 0x30
-	.4byte	0x41da
-	.uleb128 0x30
-	.4byte	0x41e5
-	.uleb128 0x30
-	.4byte	0x41f0
-	.uleb128 0x2f
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-	.4byte	.Ldebug_ranges0+0x218
-	.uleb128 0x64
-	.4byte	0x366d
-	.4byte	.LLST193
-	.uleb128 0x64
-	.4byte	0x3679
-	.4byte	.LLST194
-	.uleb128 0x64
-	.4byte	0x3685
-	.4byte	.LLST195
-	.uleb128 0x65
-	.4byte	0x3691
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x30
-	.4byte	0x369d
-	.uleb128 0x31
-	.4byte	.LVL909
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL910
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL913
-	.4byte	0x17c6
-	.uleb128 0x31
-	.4byte	.LVL915
-	.4byte	0x23e4
-	.uleb128 0x31
-	.4byte	.LVL916
-	.4byte	0x19ea
-	.uleb128 0x31
-	.4byte	.LVL917
-	.4byte	0x232e
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x2b83
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6476
-	.uleb128 0x24
-	.4byte	.LVL1125
-	.4byte	0x3860
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x343f
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x64a5
-	.uleb128 0x31
-	.4byte	.LVL1153
-	.4byte	0x378a
-	.uleb128 0x31
-	.4byte	.LVL1154
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1155
-	.4byte	0x17c6
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x1f6f
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x64d4
-	.uleb128 0x31
-	.4byte	.LVL1280
-	.4byte	0x1f78
-	.uleb128 0x31
-	.4byte	.LVL1281
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1282
-	.4byte	0x20c4
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x1c72
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x66c5
-	.uleb128 0x61
-	.4byte	0x1c83
-	.4byte	.LLST256
-	.uleb128 0x61
-	.4byte	0x1c8f
-	.4byte	.LLST257
-	.uleb128 0x30
-	.4byte	0x1c9b
-	.uleb128 0x30
-	.4byte	0x1ca7
-	.uleb128 0x30
-	.4byte	0x1cb3
-	.uleb128 0x30
-	.4byte	0x1cbf
-	.uleb128 0x30
-	.4byte	0x1ccb
-	.uleb128 0x30
-	.4byte	0x1cd7
-	.uleb128 0x30
-	.4byte	0x1ce3
-	.uleb128 0x30
-	.4byte	0x1cef
-	.uleb128 0x30
-	.4byte	0x1cfb
-	.uleb128 0x30
-	.4byte	0x1d07
-	.uleb128 0x30
-	.4byte	0x1d23
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x268
-	.4byte	0x66bb
-	.uleb128 0x2e
-	.4byte	0x1c8f
-	.uleb128 0x2e
-	.4byte	0x1c83
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x268
-	.uleb128 0x64
-	.4byte	0x64f9
-	.4byte	.LLST258
-	.uleb128 0x64
-	.4byte	0x64fe
-	.4byte	.LLST259
-	.uleb128 0x64
-	.4byte	0x6503
-	.4byte	.LLST260
-	.uleb128 0x30
-	.4byte	0x6508
-	.uleb128 0x30
-	.4byte	0x650d
-	.uleb128 0x30
-	.4byte	0x6512
-	.uleb128 0x64
-	.4byte	0x6517
-	.4byte	.LLST261
-	.uleb128 0x64
-	.4byte	0x651c
-	.4byte	.LLST262
-	.uleb128 0x64
-	.4byte	0x6521
-	.4byte	.LLST263
-	.uleb128 0x64
-	.4byte	0x6526
-	.4byte	.LLST264
-	.uleb128 0x67
-	.4byte	0x1d13
-	.uleb128 0x67
-	.4byte	0x1d1b
-	.uleb128 0x30
-	.4byte	0x652b
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x290
-	.4byte	0x65e1
-	.uleb128 0x30
-	.4byte	0x1d31
-	.uleb128 0x31
-	.4byte	.LVL1307
-	.4byte	0x2692
-	.uleb128 0x31
-	.4byte	.LVL1308
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1309
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1310
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1312
-	.4byte	0x1e04
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1324
-	.4byte	0x2255
-	.uleb128 0x31
-	.4byte	.LVL1325
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1330
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1333
-	.4byte	0x1d5a
-	.uleb128 0x31
-	.4byte	.LVL1334
-	.4byte	0x3fb6
-	.uleb128 0x31
-	.4byte	.LVL1335
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1339
-	.4byte	0x2255
-	.uleb128 0x31
-	.4byte	.LVL1340
-	.4byte	0x232e
-	.uleb128 0x31
-	.4byte	.LVL1341
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1342
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1343
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1344
-	.4byte	0x2c55
-	.uleb128 0x31
-	.4byte	.LVL1346
-	.4byte	0x1d5a
-	.uleb128 0x31
-	.4byte	.LVL1361
-	.4byte	0x1af8
-	.uleb128 0x31
-	.4byte	.LVL1363
-	.4byte	0x67f2
-	.uleb128 0x31
-	.4byte	.LVL1365
-	.4byte	0x3939
-	.uleb128 0x31
-	.4byte	.LVL1366
-	.4byte	0x1f15
-	.uleb128 0x31
-	.4byte	.LVL1369
-	.4byte	0x2287
-	.uleb128 0x31
-	.4byte	.LVL1370
-	.4byte	0x1ea1
-	.uleb128 0x31
-	.4byte	.LVL1377
-	.4byte	0x1ea1
-	.uleb128 0x31
-	.4byte	.LVL1378
-	.4byte	0x23a4
-	.uleb128 0x31
-	.4byte	.LVL1379
-	.4byte	0x4f1f
-	.uleb128 0x31
-	.4byte	.LVL1380
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1381
-	.4byte	0x3598
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1311
-	.4byte	0x20c4
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x2815
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x67d3
-	.uleb128 0x30
-	.4byte	0x2826
-	.uleb128 0x53
-	.4byte	.LBB547
-	.4byte	.LBE547-.LBB547
-	.4byte	0x676f
-	.uleb128 0x64
-	.4byte	0x66d8
-	.4byte	.LLST298
-	.uleb128 0x39
-	.4byte	.Ldebug_ranges0+0x2c8
-	.4byte	0x6702
-	.uleb128 0x30
-	.4byte	0x2831
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1595
-	.4byte	0x2a94
-	.uleb128 0x31
-	.4byte	.LVL1596
-	.4byte	0x2a94
-	.uleb128 0x31
-	.4byte	.LVL1597
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1598
-	.4byte	0x36ab
-	.uleb128 0x31
-	.4byte	.LVL1599
-	.4byte	0x3a04
-	.uleb128 0x31
-	.4byte	.LVL1600
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1601
-	.4byte	0x3598
-	.uleb128 0x31
-	.4byte	.LVL1604
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1605
-	.4byte	0x1e6d
-	.uleb128 0x31
-	.4byte	.LVL1606
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1607
-	.4byte	0x2460
-	.uleb128 0x31
-	.4byte	.LVL1608
-	.4byte	0x29d8
-	.byte	0
-	.uleb128 0x31
-	.4byte	.LVL1583
-	.4byte	0x43c0
-	.uleb128 0x31
-	.4byte	.LVL1584
-	.4byte	0x344c
-	.uleb128 0x31
-	.4byte	.LVL1585
-	.4byte	0x333f
-	.uleb128 0x31
-	.4byte	.LVL1586
-	.4byte	0x319f
-	.uleb128 0x31
-	.4byte	.LVL1587
-	.4byte	0x3201
-	.uleb128 0x31
-	.4byte	.LVL1588
-	.4byte	0x2b09
-	.uleb128 0x31
-	.4byte	.LVL1589
-	.4byte	0x343f
-	.uleb128 0x31
-	.4byte	.LVL1590
-	.4byte	0x4329
-	.uleb128 0x31
-	.4byte	.LVL1591
-	.4byte	0x2b8c
-	.uleb128 0x31
-	.4byte	.LVL1592
-	.4byte	0x2cc0
-	.uleb128 0x31
-	.4byte	.LVL1593
-	.4byte	0x3719
-	.byte	0
-	.uleb128 0x68
-	.4byte	.LASF656
-	.4byte	.LASF656
-	.byte	0x11
-	.byte	0x6f
-	.uleb128 0x69
-	.4byte	.LASF669
-	.4byte	.LASF669
-	.uleb128 0x68
-	.4byte	.LASF657
-	.4byte	.LASF657
-	.byte	0x12
-	.byte	0x19
-	.uleb128 0x68
-	.4byte	.LASF658
-	.4byte	.LASF658
-	.byte	0xb
-	.byte	0x8e
-	.uleb128 0x68
-	.4byte	.LASF659
-	.4byte	.LASF659
-	.byte	0x12
-	.byte	0x1b
-	.uleb128 0x68
-	.4byte	.LASF660
-	.4byte	.LASF660
-	.byte	0x13
-	.byte	0x27
-	.uleb128 0x68
-	.4byte	.LASF661
-	.4byte	.LASF661
-	.byte	0xd
-	.byte	0x18
-	.uleb128 0x6a
-	.4byte	.LASF662
-	.4byte	.LASF662
-	.byte	0xc
-	.2byte	0x19b
-	.uleb128 0x6b
-	.4byte	.LASF670
-	.4byte	.LASF671
-	.byte	0x14
-	.byte	0
-	.4byte	.LASF670
-	.byte	0
-	.section	.debug_abbrev,"",%progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.uleb128 0x15
-	.byte	0
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0x15
-	.byte	0
-	.uleb128 0x27
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xd
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
-	.uleb128 0x13
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xf
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x12
-	.uleb128 0x4
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x13
-	.uleb128 0x28
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1c
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x14
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x15
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x16
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x17
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x18
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x19
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x1a
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x1b
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1c
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x1d
-	.uleb128 0x34
-	.byte	0
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-.LASF240:
-	.ascii	"p_io_data_buf_1\000"
-.LASF137:
-	.ascii	"mlc_erase_count\000"
-.LASF178:
-	.ascii	"phyBlk\000"
-.LASF625:
-	.ascii	"sftl_deinit\000"
-.LASF486:
-	.ascii	"pMapBlockInfo\000"
-.LASF151:
-	.ascii	"last_refresh_data_times\000"
-.LASF666:
-	.ascii	"system_states\000"
-.LASF159:
-	.ascii	"totle_write_sector\000"
-.LASF229:
-	.ascii	"req_prgm\000"
-.LASF590:
-	.ascii	"FtlMakeBbt\000"
-.LASF102:
-	.ascii	"in_gc_mode\000"
-.LASF434:
-	.ascii	"min_ec\000"
-.LASF60:
-	.ascii	"int16\000"
-.LASF281:
-	.ascii	"p_gc_page_info\000"
-.LASF211:
-	.ascii	"c_ftl_nand_max_sys_blks\000"
-.LASF439:
-	.ascii	"max_ec\000"
-.LASF238:
-	.ascii	"p_sys_spare_buf\000"
-.LASF669:
-	.ascii	"memcpy\000"
-.LASF504:
-	.ascii	"prog_error_count\000"
-.LASF336:
-	.ascii	"gc_discard_updated\000"
-.LASF412:
-	.ascii	"prev_superblock_id\000"
-.LASF638:
-	.ascii	"test_page_num\000"
-.LASF156:
-	.ascii	"last_refresh_read_count\000"
-.LASF478:
-	.ascii	"lookup_ppa_ver\000"
-.LASF490:
-	.ascii	"totleBlkNum\000"
-.LASF608:
-	.ascii	"sftl_read\000"
-.LASF577:
-	.ascii	"FtlFreeSysBlkQueueFull\000"
-.LASF409:
-	.ascii	"FtlGcPageVarInit\000"
-.LASF112:
-	.ascii	"padding\000"
-.LASF174:
-	.ascii	"flash_mode\000"
-.LASF468:
-	.ascii	"recovery_cur_page_ver\000"
-.LASF537:
-	.ascii	"ftl_map_blk_gc\000"
-.LASF607:
-	.ascii	"sftl_write\000"
-.LASF118:
-	.ascii	"ftl_map_blk_header\000"
-.LASF579:
-	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF25:
-	.ascii	"late_time_init\000"
-.LASF646:
-	.ascii	"mem_size\000"
-.LASF485:
-	.ascii	"FtlMapTblRecovery\000"
-.LASF423:
-	.ascii	"new_ppa\000"
-.LASF427:
-	.ascii	"num_bad_block\000"
-.LASF525:
-	.ascii	"lpn_index\000"
-.LASF203:
-	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF624:
-	.ascii	"sector\000"
-.LASF507:
-	.ascii	"num_page\000"
-.LASF617:
-	.ascii	"FtlProgPages\000"
-.LASF417:
-	.ascii	"FtlGcBufFree\000"
-.LASF271:
-	.ascii	"p_data_block_list_tail\000"
-.LASF398:
-	.ascii	"current_ppa\000"
-.LASF64:
-	.ascii	"p_spare\000"
-.LASF383:
-	.ascii	"tmp_blk\000"
-.LASF294:
-	.ascii	"g_gc_blk_index\000"
-.LASF500:
-	.ascii	"block_in_plane\000"
-.LASF111:
-	.ascii	"lastEc\000"
-.LASF352:
-	.ascii	"PhyBlk\000"
-.LASF106:
-	.ascii	"reserved\000"
-.LASF317:
-	.ascii	"g_recovery_page_num\000"
-.LASF549:
-	.ascii	"node_valid_page_count\000"
-.LASF179:
-	.ascii	"ftl_gc_page_item\000"
-.LASF143:
-	.ascii	"read_page_count\000"
-.LASF419:
-	.ascii	"decrement_vpc_count\000"
-.LASF7:
-	.ascii	"short unsigned int\000"
-.LASF539:
-	.ascii	"minValidPageIndex\000"
-.LASF331:
-	.ascii	"TotleReadBufferMatchCount\000"
-.LASF340:
-	.ascii	"check_spare_buf\000"
-.LASF315:
-	.ascii	"g_gc_skip_write_count\000"
-.LASF59:
-	.ascii	"int32\000"
-.LASF73:
-	.ascii	"page_per_slc_blk\000"
-.LASF318:
-	.ascii	"g_recovery_page_min_ver\000"
-.LASF227:
-	.ascii	"req_sys\000"
-.LASF162:
-	.ascii	"List_Node\000"
-.LASF652:
-	.ascii	"Ftl_log2\000"
-.LASF152:
-	.ascii	"all_blk_used_slc_mode\000"
-.LASF396:
-	.ascii	"pSuperblock\000"
-.LASF474:
-	.ascii	"function_exit\000"
-.LASF205:
-	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF17:
-	.ascii	"initcall_t\000"
-.LASF589:
-	.ascii	"V2P_block\000"
-.LASF115:
-	.ascii	"sysBlksPerPlane\000"
-.LASF454:
-	.ascii	"Ftl_save_ext_data\000"
-.LASF616:
-	.ascii	"FtlCacheWriteBack\000"
-.LASF79:
-	.ascii	"nand_ops\000"
-.LASF629:
-	.ascii	"load_bbt\000"
-.LASF649:
-	.ascii	"blkNum\000"
-.LASF367:
-	.ascii	"page_index\000"
-.LASF502:
-	.ascii	"FtlVpcTblFlush\000"
-.LASF109:
-	.ascii	"hash\000"
-.LASF573:
-	.ascii	"IsInFreeQueue\000"
-.LASF471:
-	.ascii	"read_super_page_end\000"
-.LASF357:
-	.ascii	"num_req\000"
-.LASF320:
-	.ascii	"c_mlc_erase_count_value\000"
-.LASF553:
-	.ascii	"pPrev\000"
-.LASF138:
-	.ascii	"GlobalDataVersion\000"
-.LASF41:
-	.ascii	"panic_on_unrecovered_nmi\000"
-.LASF163:
-	.ascii	"next\000"
-.LASF128:
-	.ascii	"activeSuperblockId\000"
-.LASF376:
-	.ascii	"plane\000"
-.LASF43:
-	.ascii	"panic_on_warn\000"
-.LASF92:
-	.ascii	"ftl_l2p_map_info\000"
-.LASF164:
-	.ascii	"prev\000"
-.LASF57:
-	.ascii	"uint16\000"
-.LASF350:
-	.ascii	"ftl_memset\000"
-.LASF534:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-.LASF45:
-	.ascii	"crash_kexec_post_notifiers\000"
-.LASF289:
-	.ascii	"g_gc_bad_block_temp_num\000"
-.LASF123:
-	.ascii	"ftl_sys_save_info\000"
-.LASF278:
-	.ascii	"gp_last_act_superblock\000"
-.LASF576:
-	.ascii	"erase_flag\000"
-.LASF487:
-	.ascii	"blk_id\000"
-.LASF337:
-	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
+.LC106:
+	.ascii	"\0013vendor storage %x,%x,%x\012\000"
+.LC107:
+	.ascii	"vendor_storage\000"
\ No newline at end of file
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 182764fb4a987..add0746980252 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,13 +2,10 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-13
+ * date: 2018-07-19
  */
 	.arch armv8-a
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 #APP
 	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
 	.equ	.L__reg_num_x\num, \num
@@ -24,510 +21,281 @@
 	.endm
 
 #NO_APP
+	.text
 	.align	2
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB269:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 17 0
-	.cfi_startproc
-.LVL0:
-	.loc 1 25 0
-	adrp	x4, g_nand_phy_info
-	add	x4, x4, :lo12:g_nand_phy_info
+	adrp	x4, .LANCHOR0
+	add	x4, x4, :lo12:.LANCHOR0
 	ldrh	w3, [x4, 8]
-.LVL1:
-	.loc 1 26 0
 	ldrh	w6, [x4, 10]
-.LVL2:
-	.loc 1 27 0
 	ldrh	w4, [x4, 14]
 	cmp	w4, 4
 	bne	.L2
-	.loc 1 28 0
 	lsr	w3, w3, 1
-	.loc 1 29 0
 	ubfiz	w6, w6, 1, 15
 .L2:
-	.loc 1 33 0
 	lsr	w5, w0, 10
-	.loc 1 37 0
 	and	w0, w0, 1023
-	.loc 1 34 0
 	and	w4, w5, 65535
-	.loc 1 35 0
 	and	w5, w5, 65535
-	.loc 1 34 0
 	udiv	w4, w4, w3
-.LVL3:
-	.loc 1 35 0
 	msub	w3, w3, w4, w5
-.LVL4:
-	.loc 1 37 0
 	madd	w3, w3, w6, w0
-.LVL5:
-	.loc 1 41 0
 	mov	w0, 0
-	.loc 1 37 0
 	str	w3, [x1]
-	.loc 1 38 0
 	str	w4, [x2]
-	.loc 1 41 0
 	ret
-	.cfi_endproc
-.LFE269:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.align	2
 	.type	ftl_set_blk_mode.part.7, %function
 ftl_set_blk_mode.part.7:
-.LFB276:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
-	.cfi_startproc
-.LVL6:
-	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1398 0
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR0+24
 	ubfx	x1, x0, 5, 11
-	ldr	x3, [x2, #:lo12:.LANCHOR0]
+	ldr	x3, [x2, #:lo12:.LANCHOR0+24]
 	lsl	x1, x1, 2
 	mov	w2, 1
 	lsl	w2, w2, w0
 	ldr	w0, [x3, x1]
-.LVL7:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.cfi_endproc
-.LFE276:
 	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
 	.align	2
 	.global	Ftl_log2
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB141:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 127 0
-	.cfi_startproc
-.LVL8:
-	.loc 3 129 0
 	mov	w2, 1
-.LVL9:
-	.loc 3 131 0
 	mov	w1, 0
 .L5:
-	.loc 3 131 0 is_stmt 0 discriminator 1
 	cmp	w2, w0
 	bls	.L6
-	.loc 3 133 0 is_stmt 1
 	sub	w0, w1, #1
-.LVL10:
-	.loc 3 135 0
 	ret
-.LVL11:
 .L6:
-	.loc 3 131 0 discriminator 3
 	add	w1, w1, 1
-	.loc 3 132 0 discriminator 3
 	lsl	w2, w2, 1
-	.loc 3 131 0 discriminator 3
 	and	w1, w1, 65535
 	b	.L5
-	.cfi_endproc
-.LFE141:
 	.size	Ftl_log2, .-Ftl_log2
 	.align	2
 	.global	FtlPrintInfo
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB142:
-	.loc 3 159 0
-	.cfi_startproc
-.LVL12:
 	ret
-	.cfi_endproc
-.LFE142:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.align	2
 	.global	FtlSysBlkNumInit
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB143:
-	.loc 3 165 0
-	.cfi_startproc
-.LVL13:
-	.loc 3 165 0
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
 	csel	w0, w0, w1, cs
-.LVL14:
-	.loc 3 168 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	and	w0, w0, 65535
-.LVL15:
-	.loc 3 169 0
-	ldrh	w2, [x1, 12]
-	.loc 3 170 0
-	ldrh	w3, [x1, 22]
-	.loc 3 168 0
-	str	w0, [x1, 8]
-	.loc 3 169 0
+	ldrh	w2, [x1, 36]
+	ldrh	w3, [x1, 46]
+	str	w0, [x1, 32]
 	mul	w2, w2, w0
-	.loc 3 170 0
 	sub	w0, w3, w0
-.LVL16:
-	strh	w0, [x1, 20]
-	.loc 3 171 0
-	ldr	w0, [x1, 28]
-	.loc 3 169 0
-	str	w2, [x1, 16]
-	.loc 3 171 0
+	strh	w0, [x1, 44]
+	ldr	w0, [x1, 52]
+	str	w2, [x1, 40]
 	sub	w2, w0, w2
-	.loc 3 174 0
 	mov	w0, 0
-	.loc 3 171 0
-	str	w2, [x1, 24]
-	.loc 3 174 0
+	str	w2, [x1, 48]
 	ret
-	.cfi_endproc
-.LFE143:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.align	2
 	.global	FtlConstantsInit
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB144:
-	.loc 3 183 0
-	.cfi_startproc
-.LVL17:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	x7, x0
-	.loc 3 188 0
 	adrp	x4, .LANCHOR0
 	add	x1, x4, :lo12:.LANCHOR0
-	.loc 3 183 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 188 0
 	ldrh	w3, [x0]
-	.loc 3 189 0
 	ldrh	w6, [x0, 2]
-	.loc 3 190 0
 	ldrh	w0, [x0, 4]
-.LVL18:
-	.loc 3 191 0
 	ldrh	w2, [x7, 14]
-	.loc 3 188 0
-	strh	w3, [x1, 32]
-	.loc 3 189 0
-	strh	w6, [x1, 34]
-	.loc 3 191 0
+	strh	w3, [x1, 56]
+	strh	w6, [x1, 58]
 	cmp	w2, 4
-	.loc 3 190 0
-	strh	w0, [x1, 36]
-	.loc 3 191 0
+	strh	w0, [x1, 60]
 	bne	.L10
-	.loc 3 192 0
 	ldrh	w2, [x7, 6]
 	lsr	w2, w2, 1
-	strh	w2, [x1, 22]
-	.loc 3 193 0
+	strh	w2, [x1, 46]
 	mov	w2, 8
-	strh	w2, [x1, 38]
+	strh	w2, [x1, 62]
 .L10:
-	.loc 3 197 0 discriminator 3
 	add	x2, x4, :lo12:.LANCHOR0
-	.loc 3 183 0 discriminator 3
 	mov	x1, 0
-	.loc 3 197 0 discriminator 3
-	add	x5, x2, 40
+	add	x5, x2, 64
 .L11:
 	strb	w1, [x1, x5]
 	add	x1, x1, 1
-	.loc 3 196 0 discriminator 3
 	cmp	x1, 32
 	bne	.L11
-	.loc 3 198 0
 	mov	w1, 5
-	.loc 3 199 0
-	strh	wzr, [x2, 74]
-	.loc 3 198 0
-	strh	w1, [x2, 72]
-	.loc 3 200 0
+	strh	wzr, [x2, 98]
+	strh	w1, [x2, 96]
 	cmp	w3, 1
 	bne	.L12
-	.loc 3 201 0
-	strh	w3, [x2, 72]
+	strh	w3, [x2, 96]
 .L12:
-	.loc 3 202 0
 	add	x3, x4, :lo12:.LANCHOR0
-	.loc 3 204 0
 	mul	w6, w6, w0
-	.loc 3 202 0
 	mov	w1, 640
-	.loc 3 204 0
 	and	w6, w6, 65535
-	.loc 3 205 0
-	ldrh	w5, [x3, 22]
-	.loc 3 202 0
-	strh	w1, [x3, 76]
-	.loc 3 204 0
-	strh	w6, [x3, 12]
-	.loc 3 205 0
+	ldrh	w5, [x3, 46]
+	strh	w1, [x3, 100]
+	strh	w6, [x3, 36]
 	mul	w0, w0, w5
 	and	w0, w0, 65535
-	strh	w0, [x3, 78]
-	.loc 3 206 0
+	strh	w0, [x3, 102]
 	bl	Ftl_log2
-.LVL19:
-	.loc 3 207 0
 	ldrh	w9, [x7, 12]
-	.loc 3 210 0
-	ldrh	w8, [x3, 38]
-	.loc 3 206 0
-	strh	w0, [x3, 80]
-	.loc 3 207 0
-	strh	w9, [x3, 82]
-	.loc 3 209 0
+	ldrh	w8, [x3, 62]
+	strh	w0, [x3, 104]
+	strh	w9, [x3, 106]
 	mul	w0, w6, w9
-	.loc 3 208 0
-	strh	w9, [x3, 84]
-	.loc 3 209 0
-	strh	w0, [x3, 86]
-	.loc 3 210 0
+	strh	w9, [x3, 108]
+	strh	w0, [x3, 110]
 	mov	w0, w8
 	bl	Ftl_log2
-.LVL20:
 	and	w2, w0, 65535
-	strh	w0, [x3, 88]
-	.loc 3 212 0
+	strh	w0, [x3, 112]
 	ubfiz	w0, w8, 9, 7
-	strh	w0, [x3, 90]
-	.loc 3 213 0
+	strh	w0, [x3, 114]
 	ubfx	w0, w0, 8, 8
-	strh	w0, [x3, 92]
-	.loc 3 214 0
+	strh	w0, [x3, 116]
 	ldrh	w0, [x7, 20]
-	strh	w0, [x3, 94]
-	.loc 3 216 0
+	strh	w0, [x3, 118]
 	mul	w0, w6, w5
-	str	w0, [x3, 28]
-	.loc 3 217 0
+	str	w0, [x3, 52]
 	mul	w0, w0, w8
-	.loc 3 218 0
 	mul	w8, w8, w9
-	.loc 3 217 0
 	mul	w0, w0, w9
 	asr	w0, w0, 11
-	str	w0, [x3, 96]
-	.loc 3 218 0
+	str	w0, [x3, 120]
 	mov	w0, 5120
 	sdiv	w0, w0, w8
 	and	w0, w0, 65535
-	.loc 3 219 0
 	cmp	w0, 4
 	bls	.L13
 .L19:
-	.loc 3 221 0
 	add	x1, x4, :lo12:.LANCHOR0
-	.loc 3 220 0
-	strh	w0, [x3, 100]
-	.loc 3 221 0
+	strh	w0, [x3, 124]
 	mov	w0, 640
-	.loc 3 223 0
 	lsl	w5, w5, 6
-	.loc 3 221 0
 	asr	w0, w0, w2
-	.loc 3 223 0
 	add	w2, w2, 9
-	.loc 3 221 0
 	add	w0, w0, 2
-	strh	w0, [x1, 102]
-	.loc 3 223 0
+	strh	w0, [x1, 126]
 	asr	w5, w5, w2
-	strh	w5, [x1, 104]
+	strh	w5, [x1, 128]
 	and	w5, w5, 65535
-	.loc 3 227 0
 	cmp	w6, 1
-	.loc 3 224 0
 	mul	w0, w5, w6
-	.loc 3 226 0
 	add	w5, w5, 8
-	.loc 3 224 0
-	str	w0, [x1, 108]
-	.loc 3 226 0
-	ldrh	w0, [x1, 100]
+	str	w0, [x1, 132]
+	ldrh	w0, [x1, 124]
 	udiv	w0, w0, w6
 	add	w5, w0, w5
-	.loc 3 227 0
 	beq	.L15
 .L20:
-	.loc 3 231 0
 	add	x4, x4, :lo12:.LANCHOR0
-	.loc 3 228 0
-	str	w5, [x1, 8]
-	.loc 3 231 0
-	ldrh	w0, [x4, 8]
+	str	w5, [x1, 32]
+	ldrh	w0, [x4, 32]
 	bl	FtlSysBlkNumInit
-.LVL21:
-	.loc 3 232 0
-	ldr	w0, [x4, 8]
-	str	w0, [x4, 112]
-	.loc 3 234 0
-	ldr	w0, [x4, 24]
-	ldrh	w1, [x4, 82]
-	.loc 3 236 0
-	str	wzr, [x4, 120]
-	.loc 3 234 0
+	ldr	w0, [x4, 32]
+	str	w0, [x4, 136]
+	ldr	w0, [x4, 48]
+	ldrh	w1, [x4, 106]
+	str	wzr, [x4, 144]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x4, 88]
+	ldrh	w1, [x4, 112]
 	add	w1, w1, 9
 	lsr	w0, w0, w1
 	add	w0, w0, 2
-	strh	w0, [x4, 116]
-	.loc 3 235 0
+	strh	w0, [x4, 140]
 	mov	w0, 32
-	strh	w0, [x4, 118]
-	.loc 3 237 0
-	ldrh	w0, [x4, 100]
+	strh	w0, [x4, 142]
+	ldrh	w0, [x4, 124]
 	add	w0, w0, 3
-	strh	w0, [x4, 100]
-	.loc 3 238 0
-	ldr	w0, [x4, 108]
+	strh	w0, [x4, 124]
+	ldr	w0, [x4, 132]
 	add	w0, w0, 3
-	str	w0, [x4, 108]
-	.loc 3 263 0
+	str	w0, [x4, 132]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
 .L13:
-	.cfi_restore_state
-	.loc 3 220 0
 	mov	w0, 4
 	b	.L19
 .L15:
-	.loc 3 228 0
 	add	w5, w5, 4
 	b	.L20
-	.cfi_endproc
-.LFE144:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB147:
-	.loc 3 514 0
-	.cfi_startproc
-.LVL22:
-	.loc 3 517 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 3 514 0
 	and	w0, w0, 65535
-	.loc 3 517 0
-	ldrh	w2, [x1, 124]
+	ldrh	w2, [x1, 148]
 	cbz	w2, .L25
-.LBB168:
-.LBB169:
-	.loc 3 518 0
-	ldrh	w2, [x1, 100]
-	.loc 3 519 0
-	ldr	x3, [x1, 128]
+	ldrh	w2, [x1, 124]
+	ldr	x3, [x1, 152]
 	mov	x1, 0
 .L23:
-	.loc 3 518 0
 	cmp	w2, w1, uxth
 	bhi	.L24
 .L25:
-.LBE169:
-.LBE168:
-	.loc 3 524 0
 	mov	w0, 0
-.LVL23:
 	ret
-.LVL24:
 .L24:
 	add	x1, x1, 1
-.LBB171:
-.LBB170:
-	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L23
-	.loc 3 520 0
 	mov	w0, 1
-.LVL25:
-.LBE170:
-.LBE171:
-	.loc 3 525 0
 	ret
-	.cfi_endproc
-.LFE147:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB160:
-	.loc 3 1214 0
-	.cfi_startproc
-	.loc 3 1216 0
-	adrp	x0, .LANCHOR0+120
-	ldr	w0, [x0, #:lo12:.LANCHOR0+120]
+	adrp	x0, .LANCHOR0+144
+	ldr	w0, [x0, #:lo12:.LANCHOR0+144]
 	ret
-	.cfi_endproc
-.LFE160:
 	.size	sftl_get_density, .-sftl_get_density
 	.align	2
 	.global	FtlBbmMapBadBlock
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB161:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
-	.cfi_startproc
-.LVL26:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	and	w1, w0, 65535
-.LVL27:
-	.loc 4 15 0
 	mov	w4, 1
-	.loc 4 5 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 4 10 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 4 13 0
-	add	x19, x19, 136
-	.loc 4 10 0
+	add	x19, x19, 160
 	ldrh	w0, [x19, -58]
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
-.LVL28:
 	msub	w3, w3, w0, w1
-	.loc 4 13 0
 	add	x0, x19, x2, uxth 3
 	and	w3, w3, 65535
-	.loc 4 15 0
 	ldr	x0, [x0, 32]
 	ubfx	x5, x3, 5, 11
 	lsl	x5, x5, 2
@@ -535,804 +303,445 @@ FtlBbmMapBadBlock:
 	ldr	w6, [x0, x5]
 	orr	w4, w4, w6
 	str	w4, [x0, x5]
-	.loc 4 16 0
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printk
-.LVL29:
-	.loc 4 17 0
 	ldrh	w0, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 6]
-	.loc 4 19 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE161:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.align	2
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB162:
-	.loc 4 24 0
-	.cfi_startproc
-.LVL30:
-	.loc 4 30 0
 	adrp	x2, .LANCHOR0
 	add	x3, x2, :lo12:.LANCHOR0
-	.loc 4 24 0
 	and	w0, w0, 65535
-	.loc 4 30 0
-	ldrh	w1, [x3, 78]
-	.loc 4 31 0
+	ldrh	w1, [x3, 102]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-.LVL31:
-	.loc 4 33 0
 	add	x2, x3, x2, uxth 3
-	.loc 4 31 0
 	and	w0, w0, 65535
-.LVL32:
-	.loc 4 34 0
-	ldr	x1, [x2, 168]
+	ldr	x1, [x2, 192]
 	ubfx	x3, x0, 5, 11
 	ldr	w1, [x1, x3, lsl 2]
 	lsr	w0, w1, w0
-.LVL33:
-	.loc 4 36 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE162:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.align	2
 	.global	FtlBbtInfoPrint
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB163:
-	.loc 4 39 0
-	.cfi_startproc
 	ret
-	.cfi_endproc
-.LFE163:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.align	2
 	.global	FtlBbtCalcTotleCnt
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB167:
-	.loc 4 157 0
-	.cfi_startproc
-	.loc 4 160 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w4, 0
-.LVL34:
-	.loc 4 159 0
 	mov	w5, 0
-.LVL35:
-	.loc 4 160 0
-	ldrh	w6, [x0, 78]
-	ldrh	w0, [x0, 34]
+	ldrh	w6, [x0, 102]
+	ldrh	w0, [x0, 58]
 	mul	w6, w6, w0
 	cmp	w4, w6
 	blt	.L42
-	.loc 4 169 0
 	mov	w0, w5
 	ret
 .L42:
-	.loc 4 157 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L35:
-	.loc 4 162 0
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
-.LVL36:
 	cbz	w0, .L34
-	.loc 4 164 0
 	add	w5, w5, 1
-.LVL37:
 	and	w5, w5, 65535
-.LVL38:
 .L34:
-	.loc 4 160 0 discriminator 2
 	add	w4, w4, 1
-.LVL39:
 	and	w4, w4, 65535
-.LVL40:
 	cmp	w4, w6
 	blt	.L35
-	.loc 4 169 0
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE167:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.align	2
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-.LFB171:
-	.loc 2 5 0
-	.cfi_startproc
-.LVL41:
-	.loc 2 8 0
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
-	.loc 2 5 0
 	and	w0, w0, 65535
 	and	w1, w1, 65535
-	.loc 2 8 0
-	ldrh	w2, [x4, 36]
-	ldrh	w4, [x4, 78]
+	ldrh	w2, [x4, 60]
+	ldrh	w4, [x4, 102]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
-.LVL42:
 	madd	w2, w2, w1, w0
 	madd	w0, w3, w4, w2
-	.loc 2 10 0
 	ret
-	.cfi_endproc
-.LFE171:
 	.size	V2P_block, .-V2P_block
 	.align	2
 	.global	P2V_plane
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB172:
-	.loc 2 13 0
-	.cfi_startproc
-.LVL43:
-	.loc 2 16 0
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
-	.loc 2 13 0
 	and	w3, w0, 65535
-.LVL44:
-	.loc 2 16 0
-	ldrh	w1, [x2, 36]
-	ldrh	w2, [x2, 78]
+	ldrh	w1, [x2, 60]
+	ldrh	w2, [x2, 102]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
 	madd	w0, w1, w2, w0
-	.loc 2 18 0
 	ret
-	.cfi_endproc
-.LFE172:
 	.size	P2V_plane, .-P2V_plane
 	.align	2
 	.global	P2V_block_in_plane
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB173:
-	.loc 2 21 0
-	.cfi_startproc
-.LVL45:
-	.loc 2 24 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 2 21 0
 	and	w3, w0, 65535
-.LVL46:
-	.loc 2 24 0
-	ldrh	w2, [x1, 78]
-	.loc 2 25 0
-	ldrh	w1, [x1, 36]
-	.loc 2 24 0
+	ldrh	w2, [x1, 102]
+	ldrh	w1, [x1, 60]
 	udiv	w0, w3, w2
 	msub	w0, w0, w2, w3
 	and	w0, w0, 65535
-	.loc 2 27 0
 	udiv	w0, w0, w1
 	ret
-	.cfi_endproc
-.LFE173:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.align	2
 	.global	ftl_cmp_data_ver
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB174:
-	.loc 2 31 0
-	.cfi_startproc
-.LVL47:
-	.loc 2 34 0
 	cmp	w0, w1
 	mov	w2, -2147483648
 	bls	.L47
-	.loc 2 36 0
 	sub	w1, w0, w1
-.LVL48:
 	cmp	w1, w2
 	cset	w0, ls
-.LVL49:
 	ret
-.LVL50:
 .L47:
-	.loc 2 40 0
 	sub	w1, w1, w0
-.LVL51:
 	cmp	w1, w2
 	cset	w0, hi
-.LVL52:
-	.loc 2 44 0
 	ret
-	.cfi_endproc
-.LFE174:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.align	2
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB177:
-	.loc 2 88 0
-	.cfi_startproc
-	.loc 2 89 0
-	adrp	x0, .LANCHOR0+238
-	ldrh	w0, [x0, #:lo12:.LANCHOR0+238]
+	adrp	x0, .LANCHOR0+262
+	ldrh	w0, [x0, #:lo12:.LANCHOR0+262]
 	cmp	w0, 0
-	.loc 2 90 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE177:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.align	2
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB178:
-	.loc 2 93 0
-	.cfi_startproc
-	.loc 2 94 0
-	adrp	x0, .LANCHOR0+238
-	ldrh	w0, [x0, #:lo12:.LANCHOR0+238]
+	adrp	x0, .LANCHOR0+262
+	ldrh	w0, [x0, #:lo12:.LANCHOR0+262]
 	cmp	w0, 1024
-	.loc 2 95 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE178:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.align	2
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB180:
-	.loc 2 118 0
-	.cfi_startproc
-	.loc 2 123 0
 	adrp	x0, .LANCHOR0
 	add	x2, x0, :lo12:.LANCHOR0
-	add	x1, x2, 232
+	add	x1, x2, 256
 	ldrh	w3, [x1, 6]
 	cbz	w3, .L51
-	.loc 2 119 0
-	ldrh	w5, [x2, 2316]
+	ldrh	w5, [x2, 2340]
 	mov	w6, 0
 	ldrh	w3, [x1, 2]
 	mov	w4, 0
-.LVL53:
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.LVL54:
 .L53:
-	.loc 2 124 0 discriminator 1
 	cmp	w5, w4
 	bgt	.L54
 	cbz	w6, .L51
 	add	x0, x0, :lo12:.LANCHOR0
-	strh	w3, [x0, 234]
-	strh	w2, [x0, 236]
+	strh	w3, [x0, 258]
+	strh	w2, [x0, 260]
 .L51:
 	ret
 .L54:
-	.loc 2 125 0 discriminator 3
 	add	x6, x1, x3, sxtw 1
-	.loc 2 124 0 discriminator 3
 	add	w4, w4, 1
-.LVL55:
-	.loc 2 126 0 discriminator 3
 	add	w3, w3, 1
-	.loc 2 124 0 discriminator 3
 	and	w4, w4, 65535
-.LVL56:
-	.loc 2 126 0 discriminator 3
 	and	w3, w3, 1023
-	.loc 2 125 0 discriminator 3
 	ldrh	w7, [x6, 8]
-	.loc 2 127 0 discriminator 3
 	add	x6, x1, x2, sxtw 1
 	strh	w7, [x6, 8]
 	mov	w6, 1
-	.loc 2 128 0 discriminator 3
 	add	w2, w2, w6
 	and	w2, w2, 1023
 	b	.L53
-	.cfi_endproc
-.LFE180:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.align	2
 	.global	IsInFreeQueue
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB181:
-	.loc 2 163 0
-	.cfi_startproc
-.LVL57:
-.LBB172:
-.LBB173:
-	.loc 2 94 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	add	x1, x1, 232
-.LBE173:
-.LBE172:
-	.loc 2 163 0
+	add	x1, x1, 256
 	and	w0, w0, 65535
-.LBB175:
-.LBB174:
-	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE174:
-.LBE175:
-	.loc 2 168 0
 	cmp	w4, 1024
 	beq	.L64
-	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.LVL58:
 .L62:
-	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
 	bcc	.L63
 .L64:
-	.loc 2 164 0
 	mov	w0, 0
-.LVL59:
 	ret
-.LVL60:
 .L63:
-	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
 	beq	.L65
-	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
 	b	.L62
 .L65:
-	.loc 2 172 0
 	mov	w0, 1
-.LVL61:
-	.loc 2 178 0
 	ret
-	.cfi_endproc
-.LFE181:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB185:
-	.loc 2 249 0
-	.cfi_startproc
-.LVL62:
-	.loc 2 260 0
 	adrp	x2, .LANCHOR0
 	add	x3, x2, :lo12:.LANCHOR0
-	.loc 2 249 0
 	and	w0, w0, 65535
-	.loc 2 260 0
-	ldrh	w1, [x3, 20]
+	ldrh	w1, [x3, 44]
 	cmp	w1, w0
 	bls	.L82
-.LBB178:
-.LBB179:
-	.loc 2 265 0
 	mov	w7, 6
-	ldr	x12, [x3, 2336]
-	.loc 2 266 0
+	ldr	x12, [x3, 2360]
 	mov	w1, -1
-	.loc 2 265 0
 	umull	x11, w0, w7
 	add	x5, x12, x11
-.LVL63:
-	.loc 2 266 0
 	strh	w1, [x5, 2]
 	strh	w1, [x12, x11]
-	.loc 2 268 0
-	ldr	x1, [x3, 2344]
-.LVL64:
+	ldr	x1, [x3, 2368]
 	cbnz	x1, .L69
-	.loc 2 269 0
-	str	x5, [x3, 2344]
+	str	x5, [x3, 2368]
 .L82:
-.LBE179:
-.LBE178:
-	.loc 2 323 0
 	mov	w0, 0
-.LVL65:
 	ret
-.LVL66:
 .L69:
-	.loc 2 249 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LBB183:
-.LBB180:
-	.loc 2 273 0
 	ubfiz	x8, x0, 1, 16
 	mov	x4, x2
-	.loc 2 279 0
 	mov	x9, -6148914691236517206
-.LBE180:
-.LBE183:
-	.loc 2 249 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.LBB184:
-.LBB181:
-	.loc 2 273 0
-	ldr	x14, [x3, 2352]
-	.loc 2 279 0
+	ldr	x14, [x3, 2376]
 	movk	x9, 0xaaab, lsl 0
-	.loc 2 274 0
 	ldrh	w2, [x5, 4]
 	mov	w10, -1
-	.loc 2 279 0
-	ldr	x13, [x3, 2336]
-	.loc 2 301 0
+	ldr	x13, [x3, 2360]
 	mov	w30, 65535
-	.loc 2 274 0
 	cmp	w2, 0
-	.loc 2 294 0
-	ldr	x15, [x3, 2360]
-	.loc 2 273 0
+	ldr	x15, [x3, 2384]
 	ldrh	w6, [x14, x8]
-.LVL67:
-	.loc 2 282 0
-	ldrh	w18, [x3, 20]
-	.loc 2 256 0
+	ldrh	w18, [x3, 44]
 	mov	w3, 0
-.LVL68:
-	.loc 2 274 0
 	mul	w6, w6, w2
-.LVL69:
-	.loc 2 279 0
 	sub	x2, x1, x13
 	asr	x2, x2, 1
-	.loc 2 274 0
 	csel	w6, w6, w10, ne
-.LVL70:
-	.loc 2 279 0
 	mul	x2, x2, x9
-	.loc 2 294 0
 	add	x9, x15, x8
-	.loc 2 309 0
 	mov	w8, w7
-	.loc 2 279 0
 	and	w2, w2, 65535
 .L77:
-	.loc 2 281 0
 	add	w3, w3, 1
-.LVL71:
 	and	w3, w3, 65535
-.LVL72:
-	.loc 2 282 0
 	cmp	w3, w18
 	bhi	.L68
-	.loc 2 285 0
 	cmp	w0, w2
 	beq	.L68
-	.loc 2 288 0
 	ubfiz	x16, x2, 1, 16
-	.loc 2 289 0
 	ldrh	w17, [x1, 4]
 	cmp	w17, 0
-	.loc 2 288 0
 	ldrh	w7, [x14, x16]
-.LVL73:
-	.loc 2 289 0
 	mul	w7, w7, w17
-.LVL74:
 	csel	w7, w7, w10, ne
-.LVL75:
-	.loc 2 293 0
 	cmp	w6, w7
 	bne	.L73
-	.loc 2 294 0
 	ldrh	w16, [x15, x16]
 	ldrh	w7, [x9]
-.LVL76:
 	cmp	w16, w7
 	bcc	.L75
-.LVL77:
 .L74:
-	.loc 2 312 0
 	strh	w2, [x12, x11]
-	.loc 2 313 0
 	ldrh	w2, [x1, 2]
 	strh	w2, [x5, 2]
-	.loc 2 315 0
 	add	x2, x4, :lo12:.LANCHOR0
-	ldr	x3, [x2, 2344]
-.LVL78:
+	ldr	x3, [x2, 2368]
 	cmp	x1, x3
 	bne	.L78
-	.loc 2 316 0
 	strh	w0, [x1, 2]
-	.loc 2 317 0
-	str	x5, [x2, 2344]
+	str	x5, [x2, 2368]
 	b	.L68
-.LVL79:
 .L73:
-	.loc 2 298 0
 	bcc	.L74
 .L75:
-	.loc 2 301 0
 	ldrh	w7, [x1]
-.LVL80:
 	cmp	w7, w30
 	bne	.L76
-	.loc 2 302 0
 	strh	w2, [x5, 2]
-	.loc 2 304 0
 	add	x2, x4, :lo12:.LANCHOR0
-	.loc 2 303 0
 	strh	w0, [x1]
-	.loc 2 304 0
-	str	x5, [x2, 2368]
-.LVL81:
+	str	x5, [x2, 2392]
 .L68:
-.LBE181:
-.LBE184:
-	.loc 2 323 0
 	mov	w0, 0
-.LVL82:
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL83:
 .L76:
-	.cfi_restore_state
-.LBB185:
-.LBB182:
-	.loc 2 309 0
 	umaddl	x1, w7, w8, x13
 	mov	w2, w7
 	b	.L77
-.LVL84:
 .L78:
-	.loc 2 319 0
 	ldrh	w3, [x1, 2]
 	mov	w4, 6
-	ldr	x2, [x2, 2336]
+	ldr	x2, [x2, 2360]
 	umull	x3, w3, w4
 	strh	w0, [x2, x3]
-	.loc 2 320 0
 	strh	w0, [x1, 2]
 	b	.L68
-.LBE182:
-.LBE185:
-	.cfi_endproc
-.LFE185:
 	.size	insert_data_list, .-insert_data_list
 	.align	2
 	.global	INSERT_DATA_LIST
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB184:
-	.loc 2 218 0
-	.cfi_startproc
-.LVL85:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL86:
-	.loc 2 220 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2376]
+	ldrh	w0, [x1, 2400]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, 2376]
-	.loc 2 221 0
-	ldrh	w1, [x1, 20]
+	strh	w0, [x1, 2400]
+	ldrh	w1, [x1, 44]
 	cmp	w1, w0
 	bcs	.L84
-.LBB188:
-.LBB189:
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 221
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL87:
 .L84:
-.LBE189:
-.LBE188:
-	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE184:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.align	2
 	.global	insert_free_list
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB186:
-	.loc 2 326 0
-	.cfi_startproc
-.LVL88:
-	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
 	beq	.L88
-	.loc 2 335 0
 	adrp	x2, .LANCHOR0
 	add	x5, x2, :lo12:.LANCHOR0
 	mov	w6, 6
-	.loc 2 336 0
 	mov	w1, -1
 	mov	x3, x2
-	.loc 2 335 0
-	ldr	x9, [x5, 2336]
+	ldr	x9, [x5, 2360]
 	umull	x8, w0, w6
 	add	x4, x9, x8
-.LVL89:
-	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x9, x8]
-	.loc 2 338 0
-	ldr	x1, [x5, 2384]
-.LVL90:
+	ldr	x1, [x5, 2408]
 	cbnz	x1, .L89
-	.loc 2 339 0
-	str	x4, [x5, 2384]
-.LVL91:
+	str	x4, [x5, 2408]
 .L88:
-	.loc 2 372 0
 	mov	w0, 0
-.LVL92:
 	ret
-.LVL93:
 .L89:
-	.loc 2 343 0
-	ldr	x11, [x5, 2360]
+	ldr	x11, [x5, 2384]
 	ubfiz	x2, x0, 1, 16
-	.loc 2 345 0
-	ldr	x10, [x5, 2336]
+	ldr	x10, [x5, 2360]
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 343 0
 	ldrh	w12, [x11, x2]
-.LVL94:
-	.loc 2 345 0
 	sub	x2, x1, x10
 	asr	x2, x2, 1
 	mul	x2, x2, x5
 	and	w2, w2, 65535
 .L92:
-	.loc 2 348 0
 	ubfiz	x5, x2, 1, 16
-	.loc 2 349 0
 	ldrh	w5, [x11, x5]
 	cmp	w5, w12
 	bcs	.L90
-	.loc 2 352 0
 	ldrh	w5, [x1]
 	cmp	w5, w7
 	bne	.L91
-	.loc 2 353 0
 	strh	w2, [x4, 2]
-	.loc 2 354 0
 	strh	w0, [x1]
-	.loc 2 355 0
 	b	.L88
 .L91:
-	.loc 2 358 0
 	umaddl	x1, w5, w6, x10
-	.loc 2 348 0
 	mov	w2, w5
 	b	.L92
 .L90:
-	.loc 2 361 0
 	ldrh	w5, [x1, 2]
 	strh	w5, [x4, 2]
-	.loc 2 362 0
 	strh	w2, [x9, x8]
-	.loc 2 364 0
 	add	x2, x3, :lo12:.LANCHOR0
-	ldr	x3, [x2, 2384]
+	ldr	x3, [x2, 2408]
 	cmp	x1, x3
 	bne	.L93
-	.loc 2 365 0
 	strh	w0, [x1, 2]
-	.loc 2 366 0
-	str	x4, [x2, 2384]
+	str	x4, [x2, 2408]
 	b	.L88
 .L93:
-	.loc 2 368 0
 	ldrh	w3, [x1, 2]
 	mov	w4, 6
-.LVL95:
-	ldr	x2, [x2, 2336]
+	ldr	x2, [x2, 2360]
 	umull	x3, w3, w4
 	strh	w0, [x2, x3]
-	.loc 2 369 0
 	strh	w0, [x1, 2]
 	b	.L88
-	.cfi_endproc
-.LFE186:
 	.size	insert_free_list, .-insert_free_list
 	.align	2
 	.global	INSERT_FREE_LIST
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB183:
-	.loc 2 211 0
-	.cfi_startproc
-.LVL96:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL97:
-	.loc 2 213 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2392]
+	ldrh	w0, [x1, 2416]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, 2392]
-	.loc 2 214 0
-	ldrh	w1, [x1, 20]
+	strh	w0, [x1, 2416]
+	ldrh	w1, [x1, 44]
 	cmp	w1, w0
 	bcs	.L94
-.LBB192:
-.LBB193:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -1340,71 +749,34 @@ INSERT_FREE_LIST:
 	add	x1, x1, 24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL98:
 .L94:
-.LBE193:
-.LBE192:
-	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE183:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.align	2
 	.global	List_remove_node
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB187:
-	.loc 2 375 0
-	.cfi_startproc
-.LVL99:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	and	w1, w1, 65535
-	.loc 2 378 0
 	mov	w2, 6
-	.loc 2 375 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 378 0
 	adrp	x19, .LANCHOR0
-	.loc 2 375 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
 	mov	x23, x0
-	.loc 2 378 0
 	add	x0, x19, :lo12:.LANCHOR0
-.LVL100:
-	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 378 0
 	umull	x21, w1, w2
-	ldr	x22, [x0, 2336]
-	.loc 2 379 0
+	ldr	x22, [x0, 2360]
 	mov	w0, 65535
-	.loc 2 378 0
 	add	x20, x22, x21
-.LVL101:
-	.loc 2 379 0
 	ldrh	w1, [x20, 2]
-.LVL102:
 	cmp	w1, w0
 	bne	.L98
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23]
 	cmp	x20, x0
 	beq	.L98
-	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -1412,349 +784,184 @@ List_remove_node:
 	add	x1, x1, 48
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL103:
 .L98:
-	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x23]
 	mov	w1, 65535
 	cmp	x20, x0
 	ldrh	w0, [x22, x21]
 	bne	.L99
-	.loc 2 382 0
 	cmp	w0, w1
 	bne	.L100
-	.loc 2 383 0
 	str	xzr, [x23]
 .L101:
-	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x22, x21]
 	strh	w0, [x20, 2]
-	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL104:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
-.LVL105:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL106:
 .L100:
-	.cfi_restore_state
-	.loc 2 385 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w2, 6
-	ldr	x1, [x19, 2336]
+	ldr	x1, [x19, 2360]
 	umaddl	x0, w0, w2, x1
-	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 385 0
 	str	x0, [x23]
-	.loc 2 386 0
 	strh	w1, [x0, 2]
 	b	.L101
 .L99:
-	.loc 2 388 0
 	cmp	w0, w1
 	ldrh	w1, [x20, 2]
 	bne	.L102
-	.loc 2 389 0
 	cmp	w1, w0
 	beq	.L101
-	.loc 2 390 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 6
-	.loc 2 391 0
 	mov	w2, -1
-	.loc 2 390 0
 	umull	x1, w1, w0
-	.loc 2 391 0
-	ldr	x0, [x19, 2336]
+	ldr	x0, [x19, 2360]
 	strh	w2, [x0, x1]
 	b	.L101
 .L102:
-	.loc 2 394 0
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w2, 6
-	.loc 2 395 0
-	ldr	x3, [x19, 2336]
+	ldr	x3, [x19, 2360]
 	umaddl	x0, w0, w2, x3
 	strh	w1, [x0, 2]
-	.loc 2 396 0
 	ldrh	w0, [x20, 2]
-	.loc 2 397 0
-	ldr	x1, [x19, 2336]
+	ldr	x1, [x19, 2360]
 	ldrh	w3, [x22, x21]
-	.loc 2 396 0
 	umull	x0, w0, w2
-	.loc 2 397 0
 	strh	w3, [x1, x0]
 	b	.L101
-	.cfi_endproc
-.LFE187:
 	.size	List_remove_node, .-List_remove_node
 	.align	2
 	.global	List_pop_index_node
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB188:
-	.loc 2 404 0
-	.cfi_startproc
-.LVL107:
-	.loc 2 408 0
 	ldr	x2, [x0]
-.LVL108:
 	cbz	x2, .L110
-	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 413 0
-	adrp	x3, .LANCHOR0+2336
+	adrp	x3, .LANCHOR0+2360
 	and	w1, w1, 65535
-	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 404 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 413 0
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR0+2336]
+	ldr	x19, [x3, #:lo12:.LANCHOR0+2360]
 .L106:
-	.loc 2 412 0
 	cbnz	w1, .L107
 .L109:
-	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL109:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL110:
-	.loc 2 417 0
 	mov	w1, w19
-.LVL111:
 	bl	List_remove_node
-.LVL112:
-	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL113:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL114:
 .L107:
-	.cfi_restore_state
-	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
 	beq	.L109
-	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL115:
-	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL116:
 	b	.L106
 .L110:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 29
-	.cfi_restore 30
-	.loc 2 409 0
 	mov	w0, 65535
-.LVL117:
 	ret
-	.cfi_endproc
-.LFE188:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.align	2
 	.global	List_pop_head_node
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB189:
-	.loc 2 423 0
-	.cfi_startproc
-.LVL118:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 424 0
 	mov	w1, 0
-	.loc 2 423 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 424 0
 	bl	List_pop_index_node
-.LVL119:
-	.loc 2 425 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE189:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.align	2
 	.global	List_get_gc_head_node
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB190:
-	.loc 2 428 0
-	.cfi_startproc
-.LVL120:
-	.loc 2 428 0
 	and	w2, w0, 65535
-.LVL121:
-	.loc 2 432 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x1, [x0, 2344]
-.LVL122:
+	ldr	x1, [x0, 2368]
 	cbz	x1, .L122
-	.loc 2 437 0
-	ldr	x3, [x0, 2336]
+	ldr	x3, [x0, 2360]
 	mov	w4, 6
-	.loc 2 436 0
 	mov	w0, 65535
 .L119:
 	cbz	w2, .L120
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL123:
 	cmp	w1, w0
 	bne	.L121
 	ret
 .L121:
-	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL124:
-	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL125:
-	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL126:
 	b	.L119
 .L122:
-	.loc 2 433 0
 	mov	w0, 65535
 	ret
 .L120:
-	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL127:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 445 0
 	ret
-	.cfi_endproc
-.LFE190:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.align	2
 	.global	List_update_data_list
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB191:
-	.loc 2 448 0
-	.cfi_startproc
-.LVL128:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
 	and	w20, w0, 65535
-.LVL129:
-	.loc 2 457 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 457 0
-	ldrh	w1, [x0, 2400]
+	ldrh	w1, [x0, 2424]
 	cmp	w1, w20
 	beq	.L125
-	.loc 2 457 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x0, 2448]
+	ldrh	w1, [x0, 2472]
 	cmp	w1, w20
 	beq	.L125
-	.loc 2 457 0 discriminator 2
-	ldrh	w1, [x0, 2496]
+	ldrh	w1, [x0, 2520]
 	cmp	w1, w20
 	beq	.L125
-.LBB196:
-.LBB197:
-	.loc 2 460 0 is_stmt 1
 	mov	w22, 6
-	ldr	x24, [x0, 2336]
-	.loc 2 462 0
-	ldr	x1, [x0, 2344]
-	.loc 2 460 0
+	ldr	x24, [x0, 2360]
+	ldr	x1, [x0, 2368]
 	umull	x22, w20, w22
 	add	x23, x24, x22
-.LVL130:
-	.loc 2 462 0
 	cmp	x23, x1
 	beq	.L125
-	.loc 2 465 0
-	ldr	x2, [x0, 2352]
+	ldr	x2, [x0, 2376]
 	ubfiz	x1, x20, 1, 16
-	.loc 2 466 0
 	ldrh	w0, [x23, 4]
 	cmp	w0, 0
-	.loc 2 465 0
 	ldrh	w21, [x2, x1]
-.LVL131:
-	.loc 2 470 0
 	mov	w1, 65535
-	.loc 2 466 0
 	mul	w21, w21, w0
-.LVL132:
-	.loc 2 470 0
 	ldrh	w0, [x23, 2]
-	.loc 2 466 0
 	csinv	w21, w21, wzr, ne
-.LVL133:
-	.loc 2 470 0
 	cmp	w0, w1
 	bne	.L128
 	ldrh	w1, [x24, x22]
@@ -1767,9 +974,7 @@ List_update_data_list:
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL134:
 .L128:
-	.loc 2 471 0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	cmp	w0, w1
@@ -1778,41 +983,27 @@ List_update_data_list:
 	cmp	w1, w0
 	beq	.L125
 .L129:
-	.loc 2 473 0
 	mov	w1, 6
-	.loc 2 475 0
 	add	x22, x19, :lo12:.LANCHOR0
-	.loc 2 474 0
 	mov	x2, -6148914691236517206
-	.loc 2 473 0
 	umull	x0, w0, w1
-	.loc 2 474 0
 	movk	x2, 0xaaab, lsl 0
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	.loc 2 475 0
-	ldr	x2, [x22, 2352]
+	ldr	x2, [x22, 2376]
 	ldrh	w1, [x2, x1, lsl 1]
-.LVL135:
-	.loc 2 476 0
-	ldr	x2, [x22, 2336]
+	ldr	x2, [x22, 2360]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
-.LVL136:
-	.loc 2 480 0
 	cmp	w21, w0
 	bcs	.L125
-	.loc 2 481 0
 	mov	w1, w20
-.LVL137:
-	add	x0, x22, 2344
-.LVL138:
+	add	x0, x22, 2368
 	bl	List_remove_node
-.LVL139:
-	ldrh	w0, [x22, 2376]
+	ldrh	w0, [x22, 2400]
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
@@ -1821,100 +1012,57 @@ List_update_data_list:
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL140:
 .L131:
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x19, 2376]
+	ldrh	w0, [x19, 2400]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2376]
-	.loc 2 482 0
+	strh	w0, [x19, 2400]
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL141:
 .L125:
-.LBE197:
-.LBE196:
-	.loc 2 485 0
 	mov	w0, 0
-.LVL142:
 	ldp	x19, x20, [sp, 16]
-.LVL143:
 	ldp	x21, x22, [sp, 32]
-.LVL144:
 	ldp	x23, x24, [sp, 48]
-.LVL145:
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE191:
 	.size	List_update_data_list, .-List_update_data_list
 	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB199:
-	.loc 2 749 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 754 0
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	x3, 0
-	.loc 2 749 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 755 0
 	mov	w4, 65535
-	.loc 2 754 0
-	ldrh	w2, [x0, 118]
-	.loc 2 755 0
-	ldr	x0, [x0, 2544]
-.LVL146:
+	ldrh	w2, [x0, 142]
+	ldr	x0, [x0, 2568]
 .L136:
 	and	w19, w3, 65535
-	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
 	bcc	.L138
 	add	x4, x0, 4
-	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
 	mov	w6, -2147483648
 	mov	w3, 0
 .L139:
-	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w3, w2
 	bne	.L141
-	.loc 2 773 0
 	cmp	w19, w2
 	bcc	.L137
-	.loc 2 779 0
 	add	x1, x1, :lo12:.LANCHOR0
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, 2552]
+	ldrh	w4, [x1, 2576]
 	mov	w1, 0
 .L142:
-	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
 	bne	.L144
-	.loc 2 784 0
 	cmp	w19, w1
 	bcc	.L137
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 784
@@ -1922,247 +1070,149 @@ select_l2p_ram_region:
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL147:
 	b	.L137
 .L138:
 	add	x3, x3, 1
-	.loc 2 755 0 is_stmt 1
 	add	x5, x0, x3, lsl 4
 	ldrh	w5, [x5, -16]
 	cmp	w5, w4
 	bne	.L136
 .L137:
-	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
-.LVL148:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL149:
 .L141:
-	.cfi_restore_state
-	.loc 2 765 0
 	ldr	w5, [x4]
 	tbnz	w5, #31, .L140
-	.loc 2 766 0
 	cmp	w6, w5
 	bls	.L140
 	mov	w6, w5
 	mov	w19, w3
 .L140:
-	.loc 2 764 0 discriminator 2
 	add	w3, w3, 1
 	add	x4, x4, 16
 	and	w3, w3, 65535
 	b	.L139
 .L144:
-	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
 	bls	.L143
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
 .L143:
-	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	b	.L142
-	.cfi_endproc
-.LFE199:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB205:
-	.loc 2 931 0
-	.cfi_startproc
-.LVL150:
-	.loc 2 934 0
 	adrp	x1, .LANCHOR0
 	add	x3, x1, :lo12:.LANCHOR0
-	ldrh	w2, [x3, 2554]
+	ldrh	w2, [x3, 2578]
 	cmp	w2, 4
 	bhi	.L147
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	w0, .L147
-	.loc 2 934 0
 	add	w2, w2, 1
-	strh	w2, [x3, 2554]
-	.loc 2 943 0 is_stmt 1
+	strh	w2, [x3, 2578]
 	ret
 .L147:
-	.loc 2 935 0
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL151:
-.LBB200:
-.LBB201:
-	.loc 2 939 0
 	mov	w6, 65535
 	mov	x1, 0
-	.loc 2 937 0
-	ldrh	w4, [x0, 20]
-	.loc 2 939 0
-	ldr	x5, [x0, 2352]
-.LBE201:
-.LBE200:
-	.loc 2 935 0
-	strh	wzr, [x0, 2554]
-	.loc 2 936 0
-	str	wzr, [x0, 2556]
+	ldrh	w4, [x0, 44]
+	ldr	x5, [x0, 2376]
+	strh	wzr, [x0, 2578]
+	str	wzr, [x0, 2580]
 .L148:
-.LBB203:
-.LBB202:
-	.loc 2 937 0
 	cmp	w4, w1, uxth
 	bhi	.L150
 	ret
 .L150:
-	.loc 2 939 0
 	ldrh	w3, [x5, x1, lsl 1]
 	cmp	w3, w6
 	beq	.L149
-	.loc 2 940 0
-	ldr	w2, [x0, 2556]
+	ldr	w2, [x0, 2580]
 	add	w2, w2, w3
-	str	w2, [x0, 2556]
+	str	w2, [x0, 2580]
 .L149:
 	add	x1, x1, 1
 	b	.L148
-.LBE202:
-.LBE203:
-	.cfi_endproc
-.LFE205:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	2
 	.global	ftl_set_blk_mode
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB211:
-	.loc 2 1396 0
-	.cfi_startproc
-.LVL152:
 	and	w0, w0, 65535
-	.loc 2 1397 0
 	cbz	w1, .L153
-	.loc 2 1396 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	bl	ftl_set_blk_mode.part.7
-.LVL153:
-	.loc 2 1401 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL154:
 .L153:
-	.loc 2 1400 0
-	adrp	x1, .LANCHOR0
-.LVL155:
+	adrp	x1, .LANCHOR0+24
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
-	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	ldr	x3, [x1, #:lo12:.LANCHOR0+24]
 	mov	w1, 1
 	lsl	w0, w1, w0
-.LVL156:
 	ldr	w1, [x3, x2]
 	bic	w0, w1, w0
 	str	w0, [x3, x2]
-	.loc 2 1401 0
 	ret
-	.cfi_endproc
-.LFE211:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.align	2
 	.global	ftl_get_blk_mode
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB212:
-	.loc 2 1404 0
-	.cfi_startproc
-.LVL157:
-	.loc 2 1404 0
 	and	w1, w0, 65535
-.LVL158:
-	.loc 2 1405 0
-	adrp	x0, .LANCHOR0
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR0+24
+	ldr	x0, [x0, #:lo12:.LANCHOR0+24]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE212:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.align	2
 	.global	ftl_sb_update_avl_pages
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB218:
-	.loc 2 1657 0
-	.cfi_startproc
-.LVL159:
-	.loc 2 1657 0
 	and	w6, w1, 65535
-.LVL160:
-	.loc 2 1660 0
 	adrp	x4, .LANCHOR0
 	add	x1, x4, :lo12:.LANCHOR0
 	and	w2, w2, 65535
-.LVL161:
-	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-	.loc 2 1660 0
-	ldrh	w3, [x1, 12]
-	.loc 2 1662 0
+	ldrh	w3, [x1, 36]
 	mov	w1, 65535
 .L161:
-	.loc 2 1660 0 discriminator 1
 	cmp	w3, w2, uxth
 	bhi	.L163
-	.loc 2 1671 0
 	add	x4, x4, :lo12:.LANCHOR0
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
 	add	x3, x0, x3
-	.loc 2 1669 0
 	mov	w5, 65535
-	ldrh	w1, [x4, 82]
+	ldrh	w1, [x4, 106]
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1671 0
 	sub	w1, w1, w6
 .L164:
-	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
 	bne	.L166
-	.loc 2 1674 0
 	ret
 .L163:
-	.loc 2 1662 0
 	add	x5, x0, x2, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w1
 	beq	.L162
-	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
@@ -2170,47 +1220,31 @@ ftl_sb_update_avl_pages:
 	add	w2, w2, 1
 	b	.L161
 .L166:
-	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
 	beq	.L165
-	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
 .L165:
 	add	x2, x2, 2
 	b	.L164
-	.cfi_endproc
-.LFE218:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	2
 	.global	FtlSlcSuperblockCheck
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB221:
-	.loc 2 2062 0
-	.cfi_startproc
-.LVL162:
-	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
 	cbz	w1, .L167
-	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
 	beq	.L167
-.LBB206:
-.LBB207:
-	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL163:
-	.loc 2 2072 0
-	adrp	x2, .LANCHOR0+12
-	ldrh	w4, [x2, #:lo12:.LANCHOR0+12]
-	.loc 2 2070 0
+	adrp	x2, .LANCHOR0+36
+	ldrh	w4, [x2, #:lo12:.LANCHOR0+36]
 	mov	w2, w1
 .L170:
 	cmp	w3, w2
@@ -2218,60 +1252,36 @@ FtlSlcSuperblockCheck:
 .L167:
 	ret
 .L172:
-	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2072 0
 	cmp	w1, w4
 	bne	.L171
-	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
 .L171:
-	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
 	b	.L170
-.LBE207:
-.LBE206:
-	.cfi_endproc
-.LFE221:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	2
 	.global	make_superblock
 	.type	make_superblock, %function
 make_superblock:
-.LFB223:
-	.loc 2 2094 0
-	.cfi_startproc
-.LVL164:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2097 0
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL165:
 	ldrh	w1, [x19]
-	ldrh	w0, [x0, 20]
+	ldrh	w0, [x0, 44]
 	cmp	w1, w0
 	bcc	.L174
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -2279,65 +1289,38 @@ make_superblock:
 	add	x1, x1, 120
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL166:
 .L174:
-	.loc 2 2100 0 is_stmt 1
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x6, x19, 16
-	.loc 2 2101 0
-	add	x7, x0, 40
-	.loc 2 2098 0
+	add	x7, x0, 64
 	strh	wzr, [x19, 4]
-	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-	.loc 2 2100 0
 	mov	x5, 0
-	ldrh	w8, [x0, 12]
-	.loc 2 2102 0
+	ldrh	w8, [x0, 36]
 	mov	w9, -1
 .L175:
-	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
 	bhi	.L177
-	.loc 2 2110 0
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x19, 7]
-	ldrh	w1, [x20, 82]
+	ldrh	w1, [x20, 106]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2113 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL167:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL168:
 .L177:
-	.cfi_restore_state
-	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL169:
 	mov	w4, w0
-	.loc 2 2102 0
 	strh	w9, [x6]
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL170:
 	cbnz	w0, .L176
-	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
@@ -2345,132 +1328,77 @@ make_superblock:
 	add	x5, x5, 1
 	add	x6, x6, 2
 	b	.L175
-	.cfi_endproc
-.LFE223:
 	.size	make_superblock, .-make_superblock
 	.align	2
 	.global	update_multiplier_value
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB232:
-	.loc 2 2451 0
-	.cfi_startproc
-.LVL171:
 	and	w8, w0, 65535
-.LVL172:
-	.loc 2 2455 0
 	adrp	x0, .LANCHOR0
 	add	x1, x0, :lo12:.LANCHOR0
 	mov	x9, 0
-	.loc 2 2453 0
 	mov	w6, 0
 	mov	x5, x0
-	.loc 2 2456 0
-	add	x7, x1, 40
-	.loc 2 2455 0
-	ldrh	w10, [x1, 12]
-	.loc 2 2458 0
-	ldrh	w11, [x1, 82]
-	.loc 2 2455 0
+	add	x7, x1, 64
+	ldrh	w10, [x1, 36]
+	ldrh	w11, [x1, 106]
 	cmp	w10, w9, uxth
 	bhi	.L191
-	.loc 2 2460 0
 	cbz	w6, .L189
-	.loc 2 2461 0
 	mov	w0, 32768
 	sdiv	w6, w0, w6
 .L190:
-	.loc 2 2462 0
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
-	ldr	x0, [x0, 2336]
+	ldr	x0, [x0, 2360]
 	umaddl	x8, w8, w1, x0
-.LVL173:
-	.loc 2 2464 0
 	mov	w0, 0
-	.loc 2 2462 0
 	strh	w6, [x8, 4]
-	.loc 2 2464 0
 	ret
-.LVL174:
 .L184:
-	.cfi_def_cfa 29, 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	w6, 0
 	b	.L183
 .L189:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 29
-	.cfi_restore 30
 	mov	w6, 0
 	b	.L190
 .L191:
-	.loc 2 2451 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L182:
-	.loc 2 2456 0
 	ldrb	w0, [x7, x9]
 	mov	w1, w8
 	bl	V2P_block
-.LVL175:
-	.loc 2 2457 0
 	bl	FtlBbmIsBadBlock
-.LVL176:
 	cbnz	w0, .L181
-	.loc 2 2458 0
 	add	w6, w6, w11
 	and	w6, w6, 65535
 .L181:
 	add	x9, x9, 1
-	.loc 2 2455 0 discriminator 2
 	cmp	w10, w9, uxth
 	bhi	.L182
-	.loc 2 2460 0
 	cbz	w6, .L184
-	.loc 2 2461 0
 	mov	w0, 32768
 	sdiv	w6, w0, w6
 .L183:
-	.loc 2 2462 0
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
-	ldr	x0, [x0, 2336]
+	ldr	x0, [x0, 2360]
 	umaddl	x8, w8, w1, x0
-.LVL177:
-	.loc 2 2464 0
 	mov	w0, 0
-	.loc 2 2462 0
 	strh	w6, [x8, 4]
-	.loc 2 2464 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE232:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.align	2
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB233:
-	.loc 2 2467 0
-	.cfi_startproc
-	.loc 2 2470 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	ldr	x0, [x1, 2384]
+	ldr	x0, [x1, 2408]
 	cbz	x0, .L194
-	.loc 2 2471 0
-	ldr	x2, [x1, 2336]
-	ldr	x1, [x1, 2360]
+	ldr	x2, [x1, 2360]
+	ldr	x1, [x1, 2384]
 	sub	x0, x0, x2
 	mov	x2, -6148914691236517206
 	asr	x0, x0, 1
@@ -2478,756 +1406,514 @@ GetFreeBlockMinEraseCount:
 	mul	x0, x0, x2
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL178:
-.LVL179:
 	ret
 .L194:
-	.loc 2 2468 0
 	mov	w0, 0
-.LVL180:
-.LVL181:
-	.loc 2 2473 0
 	ret
-	.cfi_endproc
-.LFE233:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.align	2
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB234:
-	.loc 2 2476 0
-	.cfi_startproc
-.LVL182:
-	.loc 2 2481 0
 	adrp	x2, .LANCHOR0
 	add	x4, x2, :lo12:.LANCHOR0
-	.loc 2 2476 0
 	and	w0, w0, 65535
-	.loc 2 2481 0
-	ldr	x1, [x4, 2384]
+	ldr	x1, [x4, 2408]
 	cbz	x1, .L202
-	.loc 2 2482 0
-	ldrh	w3, [x4, 2392]
+	ldrh	w3, [x4, 2416]
 	mov	w5, 7
-	.loc 2 2484 0
-	ldr	x4, [x4, 2336]
-	.loc 2 2486 0
+	ldr	x4, [x4, 2360]
 	mov	w6, 6
 	mov	w7, 65535
-	.loc 2 2484 0
 	sub	x1, x1, x4
-	.loc 2 2482 0
 	mul	w3, w3, w5
-	.loc 2 2484 0
 	asr	x1, x1, 1
-	.loc 2 2482 0
 	asr	w3, w3, 3
-	.loc 2 2483 0
 	cmp	w0, w3
 	csel	w0, w3, w0, gt
-	.loc 2 2484 0
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	mul	x1, x1, x3
-	.loc 2 2485 0
 	mov	w3, 0
-.LVL183:
-	.loc 2 2484 0
 	and	w1, w1, 65535
 .L198:
-	.loc 2 2485 0 discriminator 1
 	cmp	w0, w3
 	beq	.L201
-	.loc 2 2486 0
 	umull	x5, w1, w6
 	ldrh	w5, [x4, x5]
 	cmp	w5, w7
 	bne	.L199
 .L201:
-	.loc 2 2490 0
 	add	x2, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x2, 2360]
-.LVL184:
+	ldr	x0, [x2, 2384]
 	ldrh	w0, [x0, x1]
-.LVL185:
-.LVL186:
 	ret
-.LVL187:
 .L199:
-	.loc 2 2485 0 discriminator 2
 	add	w3, w3, 1
-.LVL188:
 	mov	w1, w5
 	and	w3, w3, 65535
-.LVL189:
 	b	.L198
-.LVL190:
 .L202:
-	.loc 2 2477 0
 	mov	w0, 0
-.LVL191:
-.LVL192:
-	.loc 2 2493 0
 	ret
-	.cfi_endproc
-.LFE234:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	2
 	.global	FtlPrintInfo2buf
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB139:
-	.loc 3 11 0
-	.cfi_startproc
-.LVL193:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 15 0
 	adrp	x1, .LC2
 	add	x1, x1, :lo12:.LC2
-	.loc 3 11 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x22, x0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 3 16 0
 	adrp	x23, .LANCHOR0
 	add	x21, x23, :lo12:.LANCHOR0
-	.loc 3 11 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 3 15 0
 	add	x20, x0, 12
-	.loc 3 11 0
 	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 3 15 0
 	bl	strcpy
-.LVL194:
-	.loc 3 16 0
-	ldr	w2, [x21, 96]
+	ldr	w2, [x21, 120]
 	mov	x0, x20
 	adrp	x1, .LC3
 	add	x1, x1, :lo12:.LC3
 	bl	sprintf
-.LVL195:
 	add	x20, x20, x0, sxtw
-	.loc 3 17 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	strcpy
-.LVL196:
-	.loc 3 18 0
-	ldr	w2, [x21, 2560]
-	.loc 3 17 0
+	ldr	w2, [x21, 2584]
 	add	x20, x20, 10
-	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
 	bl	sprintf
-.LVL197:
 	add	x20, x20, x0, sxtw
-	.loc 3 19 0
-	ldr	w2, [x21, 2556]
+	ldr	w2, [x21, 2580]
 	mov	x0, x20
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
 	bl	sprintf
-.LVL198:
 	add	x20, x20, x0, sxtw
-	.loc 3 20 0
-	ldr	w2, [x21, 2564]
+	ldr	w2, [x21, 2588]
 	mov	x0, x20
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
 	bl	sprintf
-.LVL199:
 	add	x20, x20, x0, sxtw
-	.loc 3 21 0
-	ldr	w2, [x21, 2568]
+	ldr	w2, [x21, 2592]
 	mov	x0, x20
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
 	bl	sprintf
-.LVL200:
 	add	x20, x20, x0, sxtw
-	.loc 3 22 0
-	ldr	w2, [x21, 2572]
+	ldr	w2, [x21, 2596]
 	mov	x0, x20
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
 	bl	sprintf
-.LVL201:
 	add	x20, x20, x0, sxtw
-	.loc 3 23 0
-	ldr	w2, [x21, 2576]
+	ldr	w2, [x21, 2600]
 	mov	x0, x20
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
 	bl	sprintf
-.LVL202:
 	add	x20, x20, x0, sxtw
-	.loc 3 24 0
-	ldr	w2, [x21, 2580]
+	ldr	w2, [x21, 2604]
 	mov	x0, x20
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
 	bl	sprintf
-.LVL203:
 	add	x20, x20, x0, sxtw
-	.loc 3 25 0
-	ldr	w2, [x21, 2584]
+	ldr	w2, [x21, 2608]
 	mov	x0, x20
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
 	bl	sprintf
-.LVL204:
 	add	x20, x20, x0, sxtw
-	.loc 3 26 0
-	ldr	w2, [x21, 2588]
+	ldr	w2, [x21, 2612]
 	mov	x0, x20
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL205:
-	.loc 3 27 0
-	ldr	w2, [x21, 2592]
-	.loc 3 26 0
+	ldr	w2, [x21, 2616]
 	add	x20, x20, x0, sxtw
-	.loc 3 27 0
 	mov	x0, x20
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL206:
-	.loc 3 28 0
-	ldr	w2, [x21, 2596]
-	.loc 3 27 0
+	ldr	w2, [x21, 2620]
 	add	x20, x20, x0, sxtw
-	.loc 3 28 0
 	mov	x0, x20
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
 	bl	sprintf
-.LVL207:
 	add	x20, x20, x0, sxtw
-	.loc 3 29 0
-	ldr	w2, [x21, 2600]
+	ldr	w2, [x21, 2624]
 	mov	x0, x20
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
 	bl	sprintf
-.LVL208:
 	add	x20, x20, x0, sxtw
-	.loc 3 30 0
-	ldrh	w2, [x21, 142]
+	ldrh	w2, [x21, 166]
 	mov	x0, x20
 	adrp	x1, .LC17
 	add	x1, x1, :lo12:.LC17
 	bl	sprintf
-.LVL209:
 	add	x20, x20, x0, sxtw
-	.loc 3 31 0
-	ldrh	w2, [x21, 2392]
+	ldrh	w2, [x21, 2416]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL210:
 	add	x20, x20, x0, sxtw
-	.loc 3 32 0
-	ldr	w2, [x21, 2604]
+	ldr	w2, [x21, 2628]
 	mov	x0, x20
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
 	bl	sprintf
-.LVL211:
 	add	x20, x20, x0, sxtw
-	.loc 3 33 0
-	ldr	w2, [x21, 2608]
+	ldr	w2, [x21, 2632]
 	mov	x0, x20
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
 	bl	sprintf
-.LVL212:
 	add	x20, x20, x0, sxtw
-	.loc 3 34 0
-	ldr	w2, [x21, 2612]
+	ldr	w2, [x21, 2636]
 	mov	x0, x20
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
 	bl	sprintf
-.LVL213:
 	add	x20, x20, x0, sxtw
-	.loc 3 35 0
-	ldr	w2, [x21, 2616]
+	ldr	w2, [x21, 2640]
 	mov	x0, x20
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
 	bl	sprintf
-.LVL214:
 	add	x20, x20, x0, sxtw
-	.loc 3 36 0
-	ldr	w2, [x21, 2620]
+	ldr	w2, [x21, 2644]
 	mov	x0, x20
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
 	bl	sprintf
-.LVL215:
 	add	x20, x20, x0, sxtw
-	.loc 3 37 0
-	ldr	w2, [x21, 2624]
+	ldr	w2, [x21, 2648]
 	mov	x0, x20
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
 	bl	sprintf
-.LVL216:
 	add	x20, x20, x0, sxtw
-	.loc 3 38 0
-	ldrh	w2, [x21, 2318]
+	ldrh	w2, [x21, 2342]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL217:
 	add	x20, x20, x0, sxtw
-	.loc 3 39 0
-	ldrh	w2, [x21, 2316]
+	ldrh	w2, [x21, 2340]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
 	bl	sprintf
-.LVL218:
 	add	x20, x20, x0, sxtw
-	.loc 3 40 0
-	ldr	w2, [x21, 120]
+	ldr	w2, [x21, 144]
 	mov	x0, x20
 	adrp	x1, .LC27
 	add	x1, x1, :lo12:.LC27
 	bl	sprintf
-.LVL219:
 	add	x20, x20, x0, sxtw
-	.loc 3 41 0
-	ldr	w2, [x21, 112]
+	ldr	w2, [x21, 136]
 	mov	x0, x20
 	adrp	x1, .LC28
 	add	x1, x1, :lo12:.LC28
 	bl	sprintf
-.LVL220:
 	add	x20, x20, x0, sxtw
-	.loc 3 42 0
-	ldr	w2, [x21, 8]
+	ldr	w2, [x21, 32]
 	mov	x0, x20
 	adrp	x1, .LC29
 	add	x1, x1, :lo12:.LC29
 	bl	sprintf
-.LVL221:
 	add	x20, x20, x0, sxtw
-	.loc 3 43 0
-	ldrh	w2, [x21, 238]
+	ldrh	w2, [x21, 262]
 	mov	x0, x20
 	adrp	x1, .LC30
 	add	x1, x1, :lo12:.LC30
 	bl	sprintf
-.LVL222:
 	add	x20, x20, x0, sxtw
-	.loc 3 44 0
-	ldrh	w2, [x21, 20]
+	ldrh	w2, [x21, 44]
 	mov	x0, x20
 	adrp	x1, .LC31
 	add	x1, x1, :lo12:.LC31
 	bl	sprintf
-.LVL223:
 	add	x20, x20, x0, sxtw
-	.loc 3 45 0
-	ldrh	w2, [x21, 2628]
+	ldrh	w2, [x21, 2652]
 	mov	x0, x20
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
 	bl	sprintf
-.LVL224:
 	add	x20, x20, x0, sxtw
-	.loc 3 46 0
-	ldr	w2, [x21, 24]
+	ldr	w2, [x21, 48]
 	mov	x0, x20
 	adrp	x1, .LC33
 	add	x1, x1, :lo12:.LC33
 	bl	sprintf
-.LVL225:
 	add	x20, x20, x0, sxtw
-	.loc 3 47 0
-	ldrh	w2, [x21, 2632]
+	ldrh	w2, [x21, 2656]
 	mov	x0, x20
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
 	bl	sprintf
-.LVL226:
 	add	x20, x20, x0, sxtw
-	.loc 3 48 0
-	ldrh	w2, [x21, 136]
+	ldrh	w2, [x21, 160]
 	mov	x0, x20
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL227:
 	add	x20, x20, x0, sxtw
-	.loc 3 49 0
-	ldrh	w2, [x21, 2402]
+	ldrh	w2, [x21, 2426]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL228:
 	add	x20, x20, x0, sxtw
-	.loc 3 50 0
-	ldrb	w2, [x21, 2406]
+	ldrb	w2, [x21, 2430]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL229:
 	add	x20, x20, x0, sxtw
-	.loc 3 51 0
-	ldrh	w2, [x21, 2400]
+	ldrh	w2, [x21, 2424]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL230:
 	add	x20, x20, x0, sxtw
-	.loc 3 52 0
-	ldrb	w2, [x21, 2408]
+	ldrb	w2, [x21, 2432]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL231:
 	add	x20, x20, x0, sxtw
-	.loc 3 53 0
-	ldrh	w2, [x21, 2404]
+	ldrh	w2, [x21, 2428]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL232:
 	add	x20, x20, x0, sxtw
-	.loc 3 54 0
-	ldrh	w1, [x21, 2400]
-	ldr	x0, [x21, 2352]
+	ldrh	w1, [x21, 2424]
+	ldr	x0, [x21, 2376]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL233:
 	add	x20, x20, x0, sxtw
-	.loc 3 55 0
-	ldrh	w2, [x21, 2450]
+	ldrh	w2, [x21, 2474]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL234:
 	add	x20, x20, x0, sxtw
-	.loc 3 56 0
-	ldrb	w2, [x21, 2454]
+	ldrb	w2, [x21, 2478]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL235:
 	add	x20, x20, x0, sxtw
-	.loc 3 57 0
-	ldrh	w2, [x21, 2448]
+	ldrh	w2, [x21, 2472]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL236:
 	add	x20, x20, x0, sxtw
-	.loc 3 58 0
-	ldrb	w2, [x21, 2456]
+	ldrb	w2, [x21, 2480]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL237:
 	add	x20, x20, x0, sxtw
-	.loc 3 59 0
-	ldrh	w2, [x21, 2452]
+	ldrh	w2, [x21, 2476]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL238:
 	add	x20, x20, x0, sxtw
-	.loc 3 60 0
-	ldrh	w1, [x21, 2448]
-	ldr	x0, [x21, 2352]
+	ldrh	w1, [x21, 2472]
+	ldr	x0, [x21, 2376]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL239:
 	add	x20, x20, x0, sxtw
-	.loc 3 61 0
-	ldrh	w2, [x21, 2498]
+	ldrh	w2, [x21, 2522]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL240:
 	add	x20, x20, x0, sxtw
-	.loc 3 62 0
-	ldrb	w2, [x21, 2502]
+	ldrb	w2, [x21, 2526]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL241:
 	add	x20, x20, x0, sxtw
-	.loc 3 63 0
-	ldrh	w2, [x21, 2496]
+	ldrh	w2, [x21, 2520]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
 	bl	sprintf
-.LVL242:
 	add	x20, x20, x0, sxtw
-	.loc 3 64 0
-	ldrb	w2, [x21, 2504]
+	ldrb	w2, [x21, 2528]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL243:
 	add	x20, x20, x0, sxtw
-	.loc 3 65 0
-	ldrh	w2, [x21, 2500]
+	ldrh	w2, [x21, 2524]
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL244:
 	add	x20, x20, x0, sxtw
-	.loc 3 66 0
-	ldrh	w2, [x21, 2650]
+	ldrh	w2, [x21, 2674]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL245:
 	add	x20, x20, x0, sxtw
-	.loc 3 67 0
-	ldrb	w2, [x21, 2654]
+	ldrb	w2, [x21, 2678]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL246:
 	add	x20, x20, x0, sxtw
-	.loc 3 68 0
-	ldrh	w2, [x21, 2648]
+	ldrh	w2, [x21, 2672]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL247:
 	add	x20, x20, x0, sxtw
-	.loc 3 69 0
-	ldrb	w2, [x21, 2656]
+	ldrb	w2, [x21, 2680]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL248:
 	add	x20, x20, x0, sxtw
-	.loc 3 70 0
-	ldrh	w2, [x21, 2652]
+	ldrh	w2, [x21, 2676]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL249:
 	add	x20, x20, x0, sxtw
-	.loc 3 71 0
-	ldr	w4, [x21, 2772]
+	ldr	w4, [x21, 2796]
 	adrp	x1, .LC58
-	ldr	w3, [x21, 2780]
+	ldr	w3, [x21, 2804]
 	add	x1, x1, :lo12:.LC58
-	ldr	w2, [x21, 2776]
+	ldr	w2, [x21, 2800]
 	mov	x0, x20
 	bl	sprintf
-.LVL250:
 	add	x19, x20, x0, sxtw
-	.loc 3 72 0
-	ldr	w2, [x21, 2768]
+	ldr	w2, [x21, 2792]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL251:
 	add	x19, x19, x0, sxtw
-	.loc 3 73 0
-	ldr	w2, [x21, 2792]
+	ldr	w2, [x21, 2816]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL252:
 	add	x19, x19, x0, sxtw
-	.loc 3 74 0
-	ldrh	w2, [x21, 3208]
+	ldrh	w2, [x21, 3232]
 	mov	x0, x19
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
 	bl	sprintf
-.LVL253:
 	add	x19, x19, x0, sxtw
-	.loc 3 75 0
-	ldrh	w2, [x21, 3210]
+	ldrh	w2, [x21, 3234]
 	mov	x0, x19
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
 	bl	sprintf
-.LVL254:
 	add	x19, x19, x0, sxtw
-	.loc 3 76 0
-	ldr	w2, [x21, 3212]
+	ldr	w2, [x21, 3236]
 	mov	x0, x19
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
 	bl	sprintf
-.LVL255:
 	add	x19, x19, x0, sxtw
-	.loc 3 77 0
-	ldrh	w2, [x21, 3216]
+	ldrh	w2, [x21, 3240]
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
 	mov	x0, x19
 	bl	sprintf
-.LVL256:
 	add	x19, x19, x0, sxtw
-	.loc 3 78 0
 	bl	GetFreeBlockMinEraseCount
-.LVL257:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL258:
 	add	x19, x19, x0, sxtw
-	.loc 3 79 0
-	ldrh	w0, [x21, 2392]
+	ldrh	w0, [x21, 2416]
 	bl	GetFreeBlockMaxEraseCount
-.LVL259:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL260:
 	add	x19, x19, x0, sxtw
-	.loc 3 80 0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
 	beq	.L204
-.LVL261:
 .L209:
-	.loc 3 103 0
 	sub	w0, w19, w22
-	.loc 3 104 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL262:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL263:
 .L204:
-	.cfi_restore_state
-	.loc 3 83 0
-	ldrh	w0, [x21, 2648]
+	ldrh	w0, [x21, 2672]
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L206
-	.loc 3 84 0
-	ldr	x1, [x21, 2352]
+	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
 	mov	x0, x19
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL264:
 	add	x19, x19, x0, sxtw
 .L206:
-.LBB208:
-	.loc 3 86 0
 	mov	w0, 0
-	.loc 3 90 0
 	adrp	x24, .LC68
-	.loc 3 86 0
 	bl	List_get_gc_head_node
-.LVL265:
-	.loc 3 90 0
 	add	x21, x23, :lo12:.LANCHOR0
-	.loc 3 86 0
 	and	w3, w0, 65535
-.LVL266:
-	.loc 3 90 0
 	add	x24, x24, :lo12:.LC68
-	.loc 3 87 0
 	mov	w20, 0
-	.loc 3 88 0
 	mov	w27, 65535
-	.loc 3 90 0
 	mov	w26, 6
 .L208:
-	.loc 3 88 0
 	cmp	w3, w27
 	beq	.L207
-	.loc 3 90 0 discriminator 2
 	umull	x25, w3, w26
-	ldr	x0, [x21, 2336]
-	ldr	x2, [x21, 2352]
+	ldr	x0, [x21, 2360]
+	ldr	x2, [x21, 2376]
 	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x21, 2360]
+	ldr	x4, [x21, 2384]
 	add	x0, x0, x25
 	ldrh	w5, [x0, 4]
 	mov	x0, x19
@@ -3235,54 +1921,34 @@ FtlPrintInfo2buf:
 	ldrh	w4, [x2, x1]
 	mov	w2, w20
 	mov	x1, x24
-	.loc 3 87 0 discriminator 2
 	add	w20, w20, 1
-	.loc 3 90 0 discriminator 2
 	bl	sprintf
-.LVL267:
 	add	x19, x19, x0, sxtw
-	.loc 3 91 0 discriminator 2
-	ldr	x0, [x21, 2336]
-	.loc 3 87 0 discriminator 2
+	ldr	x0, [x21, 2360]
 	cmp	w20, 16
-	.loc 3 91 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL268:
-	.loc 3 87 0 discriminator 2
 	bne	.L208
 .L207:
-.LBE208:
-.LBB209:
-	.loc 3 95 0
 	add	x23, x23, :lo12:.LANCHOR0
-	.loc 3 99 0
 	adrp	x21, .LC69
 	add	x21, x21, :lo12:.LC69
-	.loc 3 96 0
 	mov	w20, 0
-	.loc 3 97 0
 	mov	w25, 65535
-	.loc 3 99 0
 	mov	w26, 6
-	.loc 3 95 0
-	ldr	x0, [x23, 2336]
-	ldr	x3, [x23, 2384]
-.LVL269:
+	ldr	x0, [x23, 2360]
+	ldr	x3, [x23, 2408]
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
 	asr	x3, x3, 1
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL270:
 .L210:
-	.loc 3 97 0
 	cmp	w3, w25
 	beq	.L209
-	.loc 3 99 0 discriminator 2
 	umull	x24, w3, w26
-	ldr	x0, [x23, 2336]
-	ldr	x2, [x23, 2360]
+	ldr	x0, [x23, 2360]
+	ldr	x2, [x23, 2384]
 	ubfiz	x1, x3, 1, 16
 	add	x0, x0, x24
 	ldrh	w5, [x2, x1]
@@ -3290,413 +1956,235 @@ FtlPrintInfo2buf:
 	ldrh	w4, [x0, 4]
 	mov	x1, x21
 	mov	x0, x19
-	.loc 3 96 0 discriminator 2
 	add	w20, w20, 1
-	.loc 3 99 0 discriminator 2
 	bl	sprintf
-.LVL271:
 	add	x19, x19, x0, sxtw
-	.loc 3 96 0 discriminator 2
 	cmp	w20, 4
 	beq	.L209
-	.loc 3 100 0
-	ldr	x0, [x23, 2336]
+	ldr	x0, [x23, 2360]
 	ldrh	w3, [x0, x24]
-.LVL272:
 	b	.L210
-.LBE209:
-	.cfi_endproc
-.LFE139:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.align	2
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB140:
-	.loc 3 113 0
-	.cfi_startproc
-.LVL273:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 119 0
 	adrp	x2, .LC70
 	adrp	x1, .LC71
 	add	x2, x2, :lo12:.LC70
-	.loc 3 113 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 119 0
 	add	x1, x1, :lo12:.LC71
-	.loc 3 113 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 3 113 0
 	mov	x20, x0
-	.loc 3 119 0
 	bl	sprintf
-.LVL274:
 	add	x19, x20, x0, sxtw
-	.loc 3 121 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL275:
 	add	x0, x19, x0, sxtw
-	.loc 3 123 0
 	sub	w0, w0, w20
 	ldp	x19, x20, [sp, 16]
-.LVL276:
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE140:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.align	2
 	.global	GetSwlReplaceBlock
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB235:
-	.loc 2 2497 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2507 0
 	adrp	x8, .LANCHOR0
 	add	x0, x8, :lo12:.LANCHOR0
-	.loc 2 2497 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 2507 0
-	ldr	w2, [x0, 2612]
-	ldr	w1, [x0, 2624]
+	ldr	w2, [x0, 2636]
+	ldr	w1, [x0, 2648]
 	cmp	w2, w1
 	bcs	.L219
-	.loc 2 2510 0
-	ldrh	w2, [x0, 20]
+	ldrh	w2, [x0, 44]
 	mov	x1, 0
-	.loc 2 2511 0
-	ldr	x4, [x0, 2360]
-	.loc 2 2509 0
-	str	wzr, [x0, 2604]
+	ldr	x4, [x0, 2384]
+	str	wzr, [x0, 2628]
 .L220:
-	.loc 2 2510 0 discriminator 1
 	cmp	w2, w1
 	bhi	.L221
-	.loc 2 2512 0
 	add	x1, x8, :lo12:.LANCHOR0
-	ldr	w0, [x1, 2604]
+	ldr	w0, [x1, 2628]
 	udiv	w2, w0, w2
-	str	w2, [x1, 2612]
-	.loc 2 2513 0
-	ldr	w2, [x1, 2608]
+	str	w2, [x1, 2636]
+	ldr	w2, [x1, 2632]
 	sub	w0, w0, w2
-	ldrh	w2, [x1, 72]
+	ldrh	w2, [x1, 96]
 	udiv	w0, w0, w2
-	str	w0, [x1, 2604]
+	str	w0, [x1, 2628]
 .L222:
-	.loc 2 2519 0
 	add	x1, x8, :lo12:.LANCHOR0
-	ldr	w9, [x1, 2624]
-	ldr	w11, [x1, 2612]
+	ldr	w9, [x1, 2648]
+	ldr	w11, [x1, 2636]
 	add	w0, w9, 256
 	cmp	w0, w11
 	bls	.L227
-	.loc 2 2519 0 is_stmt 0 discriminator 1
-	ldr	w1, [x1, 2620]
+	ldr	w1, [x1, 2644]
 	add	w0, w9, 768
 	cmp	w0, w1
 	bls	.L227
-.LVL277:
 .L229:
-	.loc 2 2520 0 is_stmt 1
 	mov	w20, 65535
 .L228:
-	.loc 2 2566 0
 	mov	w0, w20
-.LVL278:
 	ldp	x19, x20, [sp, 16]
-.LVL279:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL280:
 .L221:
-	.cfi_restore_state
-	.loc 2 2511 0 discriminator 3
 	ldrh	w3, [x4, x1, lsl 1]
 	add	x1, x1, 1
-	ldr	w5, [x0, 2604]
+	ldr	w5, [x0, 2628]
 	add	w3, w3, w5
-	str	w3, [x0, 2604]
+	str	w3, [x0, 2628]
 	b	.L220
 .L219:
-	.loc 2 2514 0
-	ldr	w1, [x0, 2620]
+	ldr	w1, [x0, 2644]
 	cmp	w2, w1
 	bls	.L222
-	.loc 2 2515 0
 	add	w1, w1, 1
-	str	w1, [x0, 2620]
-	.loc 2 2516 0
+	str	w1, [x0, 2644]
 	mov	w1, 0
 .L224:
-	.loc 2 2516 0 is_stmt 0 discriminator 1
-	ldrh	w2, [x0, 20]
+	ldrh	w2, [x0, 44]
 	cmp	w1, w2
 	bcs	.L222
-	.loc 2 2517 0 is_stmt 1 discriminator 3
-	ldr	x4, [x0, 2360]
+	ldr	x4, [x0, 2384]
 	ubfiz	x3, x1, 1, 32
-	.loc 2 2516 0 discriminator 3
 	add	w1, w1, 1
-	.loc 2 2517 0 discriminator 3
 	ldrh	w2, [x4, x3]
 	add	w2, w2, 1
 	strh	w2, [x4, x3]
 	b	.L224
 .L227:
-	.loc 2 2522 0
 	add	x10, x8, :lo12:.LANCHOR0
-	ldrh	w0, [x10, 2392]
+	ldrh	w0, [x10, 2416]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL281:
 	and	w6, w0, 65535
-.LVL282:
-	.loc 2 2523 0
 	add	w0, w9, 64
 	cmp	w6, w0
 	bcc	.L229
-	.loc 2 2526 0
-	ldr	x0, [x10, 2344]
-.LVL283:
+	ldr	x0, [x10, 2368]
 	cbz	x0, .L229
-	.loc 2 2534 0
 	mov	w4, 65535
-.LVL284:
-	.loc 2 2530 0
-	ldrh	w12, [x10, 20]
-	.loc 2 2533 0
+	ldrh	w12, [x10, 44]
 	mov	x13, -6148914691236517206
-	ldr	x7, [x10, 2336]
-	.loc 2 2534 0
-	ldr	x5, [x10, 2360]
+	ldr	x7, [x10, 2360]
+	ldr	x5, [x10, 2384]
 	mov	w2, w4
-	.loc 2 2528 0
 	mov	w10, w4
-	.loc 2 2534 0
 	mov	w1, 0
-.LVL285:
-	.loc 2 2533 0
 	movk	x13, 0xaaab, lsl 0
-	.loc 2 2543 0
 	mov	w14, 6
-.LVL286:
 .L230:
-	.loc 2 2528 0
 	ldrh	w3, [x0]
 	cmp	w3, w10
 	bne	.L233
 	mov	w20, w2
 .L232:
-	.loc 2 2546 0
 	mov	w0, 65535
-.LVL287:
 	cmp	w20, w0
 	beq	.L229
-	.loc 2 2548 0
 	ubfiz	x7, x20, 1, 32
 	ldrh	w3, [x5, x7]
-.LVL288:
-	.loc 2 2549 0
 	cmp	w9, w3
 	bcs	.L234
-	.loc 2 2551 0
 	bl	GetFreeBlockMinEraseCount
-.LVL289:
 	cmp	w9, w0, uxth
 	bcs	.L234
-	.loc 2 2552 0
 	add	x0, x8, :lo12:.LANCHOR0
-	str	w4, [x0, 2624]
-.LVL290:
+	str	w4, [x0, 2648]
 .L234:
-	.loc 2 2554 0
 	cmp	w11, w3
 	bls	.L229
-	.loc 2 2554 0 is_stmt 0 discriminator 1
 	add	w0, w3, 128
 	cmp	w6, w0
 	ble	.L229
-	.loc 2 2556 0 is_stmt 1
 	add	w0, w3, 256
 	cmp	w11, w0
 	bhi	.L235
-	.loc 2 2556 0 is_stmt 0 discriminator 1
 	add	x0, x8, :lo12:.LANCHOR0
 	add	w3, w3, 768
-.LVL291:
-	ldr	w0, [x0, 2620]
+	ldr	w0, [x0, 2644]
 	cmp	w3, w0
 	bcs	.L229
-.LVL292:
 .L235:
-	.loc 2 2558 0 is_stmt 1
 	add	x19, x8, :lo12:.LANCHOR0
 	ldrh	w5, [x5, x7]
 	mov	w2, w11
 	mov	w1, w20
-.LVL293:
-	ldr	x0, [x19, 2352]
-	ldr	w3, [x19, 2620]
-.LVL294:
+	ldr	x0, [x19, 2376]
+	ldr	w3, [x19, 2644]
 	ldrh	w4, [x0, x7]
-.LVL295:
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printk
-.LVL296:
-	.loc 2 2559 0
 	mov	w0, 1
-	str	w0, [x19, 3220]
-	.loc 2 2560 0
+	str	w0, [x19, 3244]
 	b	.L228
-.LVL297:
 .L233:
-	.loc 2 2529 0
 	add	w1, w1, 1
-.LVL298:
 	and	w1, w1, 65535
-.LVL299:
-	.loc 2 2530 0
 	cmp	w1, w12
 	bhi	.L229
-	.loc 2 2532 0
 	ldrh	w15, [x0, 4]
 	cbz	w15, .L231
-	.loc 2 2533 0
 	sub	x0, x0, x7
-.LVL300:
 	asr	x0, x0, 1
 	mul	x0, x0, x13
 	and	w20, w0, 65535
-	.loc 2 2534 0
 	and	x0, x0, 65535
 	ldrh	w0, [x5, x0, lsl 1]
 	cmp	w9, w0
 	bcs	.L232
-	.loc 2 2538 0
 	cmp	w4, w0
 	bls	.L231
 	mov	w4, w0
-	.loc 2 2533 0
 	mov	w2, w20
-.LVL301:
 .L231:
-	.loc 2 2543 0
 	umaddl	x0, w3, w14, x7
 	b	.L230
-	.cfi_endproc
-.LFE235:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.align	2
 	.global	free_data_superblock
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB236:
-	.loc 2 2570 0
-	.cfi_startproc
-.LVL302:
 	and	w0, w0, 65535
-	.loc 2 2571 0
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L246
-	.loc 2 2570 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LBB212:
-.LBB213:
-	.loc 2 2573 0
-	adrp	x2, .LANCHOR0+2352
+	adrp	x2, .LANCHOR0+2376
 	ubfiz	x1, x0, 1, 16
-.LBE213:
-.LBE212:
-	.loc 2 2570 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.LBB215:
-.LBB214:
-	.loc 2 2573 0
-	ldr	x2, [x2, #:lo12:.LANCHOR0+2352]
+	ldr	x2, [x2, #:lo12:.LANCHOR0+2376]
 	strh	wzr, [x2, x1]
-	.loc 2 2574 0
 	bl	INSERT_FREE_LIST
-.LVL303:
-.LBE214:
-.LBE215:
-	.loc 2 2576 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL304:
 .L246:
 	mov	w0, 0
-.LVL305:
 	ret
-	.cfi_endproc
-.LFE236:
 	.size	free_data_superblock, .-free_data_superblock
 	.align	2
 	.global	get_new_active_ppa
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB239:
-	.loc 2 2703 0
-	.cfi_startproc
-.LVL306:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2707 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL307:
 	cmp	w1, w0
 	bne	.L250
-	.loc 2 2707 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -3704,16 +2192,13 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL308:
 .L250:
-	.loc 2 2708 0 is_stmt 1
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, 82]
+	ldrh	w0, [x0, 106]
 	cmp	w1, w0
 	bne	.L251
-	.loc 2 2708 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -3721,12 +2206,9 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL309:
 .L251:
-	.loc 2 2709 0 is_stmt 1
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L252
-	.loc 2 2709 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -3734,70 +2216,46 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL310:
 .L252:
-	.loc 2 2711 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2714 0
 	add	x1, x20, :lo12:.LANCHOR0
-	.loc 2 2710 0
 	strb	wzr, [x19, 10]
-	.loc 2 2711 0
 	add	x0, x0, 8
-	.loc 2 2714 0
-	ldrh	w2, [x1, 12]
-	.loc 2 2712 0
+	ldrh	w2, [x1, 36]
 	mov	w1, 65535
-	.loc 2 2711 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL311:
 .L253:
-	.loc 2 2712 0
 	cmp	w0, w1
 	beq	.L255
-	.loc 2 2720 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2728 0
 	mov	w3, 65535
-	.loc 2 2721 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2720 0
 	orr	w21, w21, w0, lsl 10
 	ldrb	w0, [x19, 6]
-.LVL312:
-	.loc 2 2721 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
 .L257:
-	.loc 2 2723 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2724 0
 	cmp	w2, w0
 	bne	.L256
-	.loc 2 2725 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2726 0
 	mov	w0, 0
 .L256:
-	.loc 2 2728 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
 	beq	.L257
-	.loc 2 2730 0
 	add	x20, x20, :lo12:.LANCHOR0
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x20, 82]
+	ldrh	w0, [x20, 106]
 	cmp	w2, w0
 	bne	.L249
-	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cbz	w1, .L249
-	.loc 2 2730 0 discriminator 2
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -3805,2120 +2263,1212 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL313:
 .L249:
-	.loc 2 2732 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL314:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL315:
 .L255:
-	.cfi_restore_state
-	.loc 2 2713 0
 	ldrb	w0, [x19, 6]
-.LVL316:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2714 0
 	cmp	w0, w2
 	bne	.L254
-	.loc 2 2715 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2716 0
 	strb	wzr, [x19, 6]
-	.loc 2 2715 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 .L254:
-	.loc 2 2718 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL317:
 	b	.L253
-	.cfi_endproc
-.LFE239:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB242:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
-	.cfi_startproc
-	.loc 5 25 0
 	adrp	x0, .LANCHOR0
 	add	x1, x0, :lo12:.LANCHOR0
-	.loc 5 26 0
 	mov	w3, 0
-	.loc 5 27 0
 	mov	w8, 24
 	mov	w9, 1
-	.loc 5 28 0
 	mov	w5, 4
-	.loc 5 25 0
-	str	wzr, [x1, 3224]
+	str	wzr, [x1, 3248]
 .L265:
-	.loc 5 26 0 discriminator 1
-	ldrh	w2, [x1, 12]
+	ldrh	w2, [x1, 36]
 	cmp	w3, w2
 	bcc	.L266
-	.loc 5 34 0 discriminator 1
 	add	x0, x0, :lo12:.LANCHOR0
-	.loc 5 35 0 discriminator 1
 	mov	w6, 24
-	.loc 5 36 0 discriminator 1
 	mov	w5, 4
 .L267:
-	.loc 5 34 0 discriminator 1
-	ldr	w1, [x0, 3264]
+	ldr	w1, [x0, 3288]
 	cmp	w2, w1
 	bcc	.L268
-	.loc 5 39 0
 	ret
 .L266:
-	.loc 5 27 0 discriminator 3
 	umull	x4, w3, w8
-	ldr	x6, [x1, 3232]
-	.loc 5 28 0 discriminator 3
-	ldr	x7, [x1, 3240]
-	.loc 5 27 0 discriminator 3
+	ldr	x6, [x1, 3256]
+	ldr	x7, [x1, 3264]
 	add	x2, x6, x4
 	str	w9, [x2, 16]
-	.loc 5 28 0 discriminator 3
-	ldrh	w2, [x1, 90]
+	ldrh	w2, [x1, 114]
 	mul	w2, w2, w3
 	sdiv	w2, w2, w5
 	add	x2, x7, x2, sxtw 2
 	str	x2, [x6, x4]
-	.loc 5 29 0 discriminator 3
-	ldrh	w2, [x1, 92]
-	ldr	x7, [x1, 3232]
-	ldr	x10, [x1, 3248]
+	ldrh	w2, [x1, 116]
+	ldr	x7, [x1, 3256]
+	ldr	x10, [x1, 3272]
 	add	x6, x7, x4
 	mul	w2, w2, w3
 	sdiv	w2, w2, w5
 	add	x2, x10, x2, sxtw 2
 	str	x2, [x6, 8]
-	.loc 5 30 0 discriminator 3
-	ldr	x2, [x1, 3256]
+	ldr	x2, [x1, 3280]
 	ubfiz	x10, x3, 5, 16
 	ldr	x4, [x7, x4]
-	.loc 5 26 0 discriminator 3
 	add	w3, w3, 1
-	.loc 5 30 0 discriminator 3
 	add	x2, x2, x10
-	.loc 5 26 0 discriminator 3
 	and	w3, w3, 65535
-	.loc 5 30 0 discriminator 3
 	str	x4, [x2, 8]
-	.loc 5 31 0 discriminator 3
 	ldr	x4, [x6, 8]
 	str	x4, [x2, 16]
 	b	.L265
 .L268:
-	.loc 5 35 0 discriminator 3
 	umull	x4, w2, w6
-	ldr	x3, [x0, 3232]
-	.loc 5 36 0 discriminator 3
-	ldr	x7, [x0, 3240]
-	.loc 5 35 0 discriminator 3
+	ldr	x3, [x0, 3256]
+	ldr	x7, [x0, 3264]
 	add	x1, x3, x4
 	str	wzr, [x1, 16]
-	.loc 5 36 0 discriminator 3
-	ldrh	w1, [x0, 90]
+	ldrh	w1, [x0, 114]
 	mul	w1, w1, w2
 	sdiv	w1, w1, w5
 	add	x1, x7, x1, sxtw 2
 	str	x1, [x3, x4]
-	.loc 5 37 0 discriminator 3
-	ldrh	w1, [x0, 92]
-	ldr	x3, [x0, 3232]
+	ldrh	w1, [x0, 116]
+	ldr	x3, [x0, 3256]
 	add	x3, x3, x4
-	ldr	x4, [x0, 3248]
+	ldr	x4, [x0, 3272]
 	mul	w1, w1, w2
-	.loc 5 34 0 discriminator 3
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	.loc 5 37 0 discriminator 3
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
 	b	.L267
-	.cfi_endproc
-.LFE242:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB243:
-	.loc 5 42 0
-	.cfi_startproc
-.LVL318:
-	.loc 5 47 0
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
-	.loc 5 46 0
 	mov	w3, 0
-.LVL319:
-	.loc 5 48 0
 	mov	w8, 24
-	.loc 5 47 0
-	ldr	w7, [x2, 3264]
-	.loc 5 48 0
-	ldr	x5, [x2, 3232]
-.LVL320:
+	ldr	w7, [x2, 3288]
+	ldr	x5, [x2, 3256]
 .L270:
-	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L269
-	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
 	b	.L275
 .L271:
-	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL321:
 	and	w2, w2, 65535
-.LVL322:
 .L275:
-	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
 	bcs	.L272
-	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x9, x5, x6
 	ldr	x10, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x10, x6
 	bne	.L271
-	.loc 5 49 0
 	str	wzr, [x9, 16]
 .L272:
-	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL323:
 	and	w3, w3, 65535
-.LVL324:
 	b	.L270
 .L269:
 	ret
-	.cfi_endproc
-.LFE243:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB244:
-	.loc 5 57 0
-	.cfi_startproc
-.LVL325:
-	.loc 5 62 0
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
-	.loc 5 61 0
 	mov	w3, 0
-.LVL326:
-	.loc 5 63 0
 	mov	w7, 24
-	.loc 5 64 0
 	mov	w8, 1
-	.loc 5 62 0
-	ldr	w5, [x2, 3264]
-	.loc 5 63 0
-	ldr	x6, [x2, 3232]
-.LVL327:
+	ldr	w5, [x2, 3288]
+	ldr	x6, [x2, 3256]
 .L277:
-	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L276
 	mov	w2, 0
 	b	.L282
 .L278:
-	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL328:
 	and	w2, w2, 65535
-.LVL329:
 .L282:
-	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
 	bcs	.L279
-	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w9, [x4, 16]
 	cbnz	w9, .L278
-	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL330:
 	ldr	x9, [x4]
 	add	x2, x0, x2
-	.loc 5 64 0
 	str	w8, [x4, 16]
-	.loc 5 65 0
 	str	x9, [x2, 8]
-	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	str	x4, [x2, 16]
-.LVL331:
 .L279:
-	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL332:
 	and	w3, w3, 65535
-.LVL333:
 	b	.L277
 .L276:
 	ret
-	.cfi_endproc
-.LFE244:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB245:
-	.loc 5 74 0
-	.cfi_startproc
-.LVL334:
-	.loc 5 77 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 5 74 0
 	and	w0, w0, 65535
-	.loc 5 77 0
-	ldrh	w2, [x1, 3268]
-	.loc 5 78 0
-	ldr	x3, [x1, 3272]
-	.loc 5 77 0
+	ldrh	w2, [x1, 3292]
+	ldr	x3, [x1, 3296]
 	mov	x1, 0
 .L284:
-	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
 	bhi	.L286
-	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL335:
 	ret
-.LVL336:
 .L286:
 	add	x1, x1, 1
-	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L284
-	.loc 5 79 0
 	mov	w0, 1
-.LVL337:
-	.loc 5 82 0
 	ret
-	.cfi_endproc
-.LFE245:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	2
 	.global	FtlGcUpdatePage
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB246:
-	.loc 5 85 0
-	.cfi_startproc
-.LVL338:
 	mov	w5, w0
 	mov	w8, w1
 	mov	w7, w2
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL339:
-	.loc 5 85 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL340:
 	and	w9, w0, 65535
-.LVL341:
-	.loc 5 91 0
 	adrp	x3, .LANCHOR0
 	add	x4, x3, :lo12:.LANCHOR0
-	ldrh	w1, [x4, 3268]
-	.loc 5 92 0
-	ldr	x6, [x4, 3272]
-	.loc 5 91 0
+	ldrh	w1, [x4, 3292]
+	ldr	x6, [x4, 3296]
 	mov	x4, 0
 .L289:
 	and	w2, w4, 65535
-.LVL342:
-	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	w2, w1
 	bcc	.L291
-	.loc 5 96 0 is_stmt 1
 	bne	.L290
-	.loc 5 97 0
 	and	x4, x4, 65535
 	strh	w0, [x6, x4, lsl 1]
-	.loc 5 98 0
 	add	x4, x3, :lo12:.LANCHOR0
-	ldrh	w0, [x4, 3268]
+	ldrh	w0, [x4, 3292]
 	add	w0, w0, 1
-	strh	w0, [x4, 3268]
+	strh	w0, [x4, 3292]
 	b	.L290
 .L291:
 	add	x4, x4, 1
-	.loc 5 92 0
 	add	x2, x6, x4, lsl 1
-.LVL343:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w9
 	bne	.L289
-.LVL344:
 .L290:
-	.loc 5 101 0
 	add	x0, x3, :lo12:.LANCHOR0
 	mov	w1, 12
-	ldrh	w3, [x0, 3280]
-	ldr	x4, [x0, 3288]
+	ldrh	w3, [x0, 3304]
+	ldr	x4, [x0, 3312]
 	umull	x3, w3, w1
 	add	x4, x4, x3
 	str	w8, [x4, 4]
-	.loc 5 102 0
-	ldr	x1, [x0, 3288]
+	ldr	x1, [x0, 3312]
 	add	x4, x1, x3
 	str	w7, [x4, 8]
-	.loc 5 103 0
 	str	w5, [x1, x3]
-	.loc 5 107 0
-	ldrh	w1, [x0, 3280]
+	ldrh	w1, [x0, 3304]
 	add	w1, w1, 1
-	strh	w1, [x0, 3280]
-	.loc 5 108 0
+	strh	w1, [x0, 3304]
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE246:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB253:
-	.loc 5 345 0
-	.cfi_startproc
-.LVL345:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 345 0
 	and	w19, w0, 65535
-.LVL346:
-	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printk
-.LVL347:
-	.loc 5 349 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w3, [x0, 3296]
+	ldrh	w3, [x0, 3320]
 	cmp	w19, w3
 	beq	.L294
-	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldrh	w2, [x0, 3298]
+	ldrh	w2, [x0, 3322]
 	cmp	w19, w2
 	beq	.L294
-	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w3, w1
 	bne	.L295
-	.loc 5 352 0
-	strh	w19, [x0, 3296]
+	strh	w19, [x0, 3320]
 .L294:
-	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL348:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL349:
 .L295:
-	.cfi_restore_state
-	.loc 5 353 0
 	cmp	w2, w1
 	bne	.L294
-	.loc 5 354 0
-	strh	w19, [x0, 3298]
+	strh	w19, [x0, 3322]
 	b	.L294
-	.cfi_endproc
-.LFE253:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB254:
-	.loc 5 359 0
-	.cfi_startproc
-.LVL350:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 5 364 0
 	adrp	x19, .LANCHOR0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 5 359 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 5 359 0
 	and	w21, w0, 65535
-.LVL351:
-	.loc 5 369 0
-	add	x20, x20, 3304
-	.loc 5 361 0
+	add	x20, x20, 3328
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL352:
-	.loc 5 364 0
 	ldrh	w1, [x20, -4]
 	mov	w2, w21
-	.loc 5 361 0
 	mov	w22, w0
-	.loc 5 364 0
 	adrp	x0, .LC74
 	add	x0, x0, :lo12:.LC74
 	bl	printk
-.LVL353:
-	.loc 5 366 0
 	mov	w0, w22
 	bl	FtlGcRefreshBlock
-.LVL354:
-	.loc 5 368 0
 	ldrh	w0, [x20, -4]
 	mov	x1, 0
 .L298:
-	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
 	bhi	.L300
-	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
 	bhi	.L299
-	.loc 5 373 0
 	add	x19, x19, :lo12:.LANCHOR0
 	add	w1, w0, 1
-	add	x19, x19, 3304
+	add	x19, x19, 3328
 	strh	w1, [x19, -4]
 	strh	w21, [x19, w0, sxtw 1]
 	b	.L299
 .L300:
 	add	x1, x1, 1
-	.loc 5 369 0
 	add	x2, x20, x1, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w21
 	bne	.L298
 .L299:
-	.loc 5 375 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL355:
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE254:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.align	2
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB255:
-	.loc 5 379 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 380 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3300]
+	ldrh	w1, [x0, 3324]
 	cbz	w1, .L303
-	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldrh	w3, [x0, 3296]
+	ldrh	w3, [x0, 3320]
 	mov	w2, 65535
 	cmp	w3, w2
 	bne	.L303
-	.loc 5 381 0 is_stmt 1
-	ldrh	w2, [x0, 3338]
+	ldrh	w2, [x0, 3362]
 	cmp	w2, w1
 	bcc	.L304
-	.loc 5 382 0
-	strh	wzr, [x0, 3338]
+	strh	wzr, [x0, 3362]
 .L304:
-.LBB218:
-.LBB219:
-	.loc 5 383 0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x0, x19, 3304
-	ldrh	w1, [x19, 3338]
+	add	x0, x19, 3328
+	ldrh	w1, [x19, 3362]
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL356:
 	bl	FtlGcRefreshBlock
-.LVL357:
-	.loc 5 384 0
-	ldrh	w0, [x19, 3338]
+	ldrh	w0, [x19, 3362]
 	add	w0, w0, 1
-	strh	w0, [x19, 3338]
+	strh	w0, [x19, 3362]
 .L303:
-.LBE219:
-.LBE218:
-	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE255:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 193
+	movk	w1, 0x240, lsl 16
+	sxtw	x0, w0
+	add	x29, sp, 0
+	bl	__kmalloc
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	ftl_malloc, .-ftl_malloc
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	kfree
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	ftl_free, .-ftl_free
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -16]!
+	mul	w3, w3, w2
+	mov	x5, x1
+	mov	w4, w2
+	add	x29, sp, 0
+	mov	x1, x0
+	sxtw	x6, w3
+	mov	w7, 0
+	mov	w3, 16
+	mov	w2, 2
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	bl	print_hex_dump
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	rknand_print_hex, .-rknand_print_hex
+	.align	2
 	.global	FlashReadPages
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB261:
-	.loc 1 44 0
-	.cfi_startproc
-.LVL358:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	ubfiz	x1, x1, 5, 32
-.LVL359:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 1 46 0
-	adrp	x23, g_nand_phy_info
-	add	x2, x23, :lo12:g_nand_phy_info
-.LVL360:
-	.loc 1 44 0
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 1 51 0
+	adrp	x22, .LANCHOR0
+	add	x2, x22, :lo12:.LANCHOR0
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR1
-	.loc 1 44 0
-	str	x25, [sp, 64]
-	.cfi_offset 25, -32
-	.loc 1 51 0
+	stp	x25, x26, [sp, 64]
 	add	x20, x20, :lo12:.LANCHOR1
-	adrp	x22, .LC1
+	adrp	x21, .LC1
 	mov	x19, x0
-	.loc 1 46 0
 	ldrh	w25, [x2, 12]
-.LVL361:
-	add	x24, x0, x1
-.LVL362:
-	.loc 1 51 0
+	add	x23, x0, x1
 	add	x20, x20, 160
-	add	x22, x22, :lo12:.LC1
-.LVL363:
-.L310:
-	.loc 1 50 0 discriminator 1
-	cmp	x19, x24
-	bne	.L317
-	.loc 1 71 0
+	add	x21, x21, :lo12:.LC1
+.L316:
+	cmp	x19, x23
+	bne	.L323
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-.LVL364:
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL365:
-.L317:
-	.cfi_restore_state
-	.loc 1 51 0
+.L323:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L311
-	.loc 1 51 0 is_stmt 0 discriminator 2
+	cbz	x0, .L317
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L312
-.L311:
-	.loc 1 51 0 discriminator 3
-	mov	w2, 51
+	cbnz	x0, .L318
+.L317:
+	mov	w2, 76
 	mov	x1, x20
-	mov	x0, x22
+	mov	x0, x21
 	bl	printk
-.LVL366:
-.L312:
-	.loc 1 52 0 is_stmt 1
+.L318:
 	ldr	w0, [x19, 4]
-	.loc 1 53 0
-	adrp	x21, g_nand_ops
-	add	x21, x21, :lo12:g_nand_ops
-	.loc 1 52 0
+	add	x26, x22, :lo12:.LANCHOR0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL367:
-	.loc 1 53 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x21, 24]
+	ldr	x4, [x26, 3392]
 	blr	x4
-.LVL368:
-	.loc 1 57 0
 	str	w0, [x19]
-	.loc 1 58 0
-	add	x0, x23, :lo12:g_nand_phy_info
-	ldrh	w0, [x0, 14]
+	ldrh	w0, [x26, 14]
 	cmp	w0, 4
-	bne	.L314
-	.loc 1 59 0
+	bne	.L320
 	ldrb	w0, [x29, 88]
-	ldr	x4, [x21, 24]
+	ldr	x4, [x26, 3392]
 	ldp	x2, x3, [x19, 8]
 	ldr	w1, [x29, 92]
 	add	x3, x3, 8
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL369:
-	.loc 1 63 0
 	cmn	w0, #1
-	beq	.L315
-	.loc 1 64 0 discriminator 1
+	beq	.L321
 	ldr	x0, [x19, 16]
-	.loc 1 63 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L314
-	.loc 1 64 0
+	bne	.L320
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L314
-	.loc 1 65 0
+	bne	.L320
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L314
-.L315:
-	.loc 1 67 0
+	beq	.L320
+.L321:
 	mov	w0, -1
 	str	w0, [x19]
-.L314:
+.L320:
 	add	x19, x19, 32
-	b	.L310
-	.cfi_endproc
-.LFE261:
+	b	.L316
 	.size	FlashReadPages, .-FlashReadPages
 	.align	2
 	.global	FtlLoadFactoryBbt
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB169:
-	.loc 4 279 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 4 286 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	.loc 4 279 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	add	x22, x0, 148
+	add	x22, x0, 172
 	stp	x25, x26, [sp, 64]
-	.loc 4 289 0
 	mov	w21, 0
-.LVL370:
-	.loc 4 279 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 4 289 0
 	mov	x19, x0
-	.loc 4 279 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 4 286 0
-	add	x23, x0, 3344
-	.loc 4 293 0
+	add	x23, x0, 3400
 	mov	x25, x23
-	.loc 4 301 0
 	mov	w26, 61664
-	.loc 4 286 0
-	ldr	x1, [x0, 3376]
-	.loc 4 287 0
-	ldr	x24, [x0, 3384]
+	ldr	x1, [x0, 3432]
+	ldr	x24, [x0, 3440]
 	stp	x1, x24, [x23, 8]
-.LVL371:
-.L329:
-	.loc 4 289 0 discriminator 1
-	ldrh	w0, [x19, 34]
+.L335:
+	ldrh	w0, [x19, 58]
 	cmp	w21, w0
-	bcc	.L334
-	.loc 4 314 0
+	bcc	.L340
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL372:
 	ldp	x21, x22, [sp, 32]
-.LVL373:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL374:
-.L334:
-	.cfi_restore_state
-	.loc 4 291 0
-	ldrh	w20, [x19, 78]
-.LVL375:
-	.loc 4 290 0
+.L340:
+	ldrh	w20, [x19, 102]
 	mov	w0, -1
 	strh	w0, [x22]
-.LVL376:
-.L331:
-	.loc 4 291 0 discriminator 2
-	ldrh	w0, [x19, 78]
+.L337:
+	ldrh	w0, [x19, 102]
 	sub	w20, w20, #1
-.LVL377:
 	and	w20, w20, 65535
-.LVL378:
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L332
-	.loc 4 292 0
+	ble	.L338
 	madd	w0, w0, w21, w20
-	.loc 4 294 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 292 0
 	lsl	w0, w0, 10
-.LVL379:
-	.loc 4 293 0
 	str	w0, [x25, 4]
-	.loc 4 294 0
 	mov	x0, x23
-.LVL380:
 	bl	FlashReadPages
-.LVL381:
-	.loc 4 295 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L331
-	.loc 4 301 0
+	beq	.L337
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L331
-	.loc 4 303 0
+	bne	.L337
 	strh	w20, [x22]
-.L332:
-	.loc 4 289 0 discriminator 2
+.L338:
 	add	w21, w21, 1
 	add	x22, x22, 2
-	b	.L329
-	.cfi_endproc
-.LFE169:
+	b	.L335
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB175:
-	.loc 2 47 0
-	.cfi_startproc
-.LVL382:
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
-	.loc 2 51 0
 	cmp	w1, 1
-	.loc 2 47 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	adrp	x1, .LANCHOR0
-.LVL383:
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	.loc 2 51 0
 	add	x1, x1, :lo12:.LANCHOR0
-	bne	.L340
-	.loc 2 51 0 is_stmt 0 discriminator 1
-	ldrh	w19, [x1, 84]
-.L341:
-	.loc 2 56 0 is_stmt 1 discriminator 4
+	bne	.L346
+	ldrh	w19, [x1, 108]
+.L347:
 	sub	w19, w19, #1
-	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
-	.loc 2 56 0 discriminator 4
 	sxth	w19, w19
-.LVL384:
-	.loc 2 53 0 discriminator 4
 	add	x1, x1, :lo12:ftl_temp_buf
-	.loc 2 57 0 discriminator 4
 	lsl	w21, w0, 10
-	.loc 2 53 0 discriminator 4
 	str	x1, [x29, 72]
-	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL385:
-	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
-	.loc 2 57 0 discriminator 4
 	str	w0, [x29, 68]
-	.loc 2 58 0 discriminator 4
 	mov	w2, w23
-	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL386:
-	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L342
+	bne	.L348
 	mov	w22, 0
-.LVL387:
-	.loc 2 61 0
 	mov	w24, 2
-.L343:
-	.loc 2 60 0
+.L349:
 	cmp	w22, w19
-	ble	.L346
-.L342:
-	.loc 2 73 0
+	ble	.L352
+.L348:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL388:
 	ldp	x21, x22, [sp, 32]
-.LVL389:
 	ldp	x23, x24, [sp, 48]
-.LVL390:
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL391:
-.L340:
-	.cfi_restore_state
-	.loc 2 51 0 discriminator 2
-	ldrh	w19, [x1, 82]
-	b	.L341
-.LVL392:
 .L346:
-	.loc 2 61 0
+	ldrh	w19, [x1, 106]
+	b	.L347
+.L352:
 	add	w20, w22, w19
-	.loc 2 63 0
 	mov	w2, w23
 	mov	w1, 1
-	.loc 2 61 0
 	sdiv	w20, w20, w24
-	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
 	str	w0, [x29, 68]
-	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL393:
-	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L344
-	.loc 2 65 0 is_stmt 0 discriminator 1
+	bne	.L350
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L344
-	.loc 2 66 0 is_stmt 1
+	bne	.L350
 	sub	w19, w20, #1
-.LVL394:
 	sxth	w19, w19
-.LVL395:
-	b	.L343
-.L344:
-	.loc 2 68 0
+	b	.L349
+.L350:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L343
-	.cfi_endproc
-.LFE175:
+	b	.L349
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	2
 	.global	FlashProgPages
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB262:
-	.loc 1 74 0
-	.cfi_startproc
-.LVL396:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL397:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.loc 1 76 0
-	adrp	x23, g_nand_phy_info
-	.loc 1 74 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	mov	w26, w2
-	.loc 1 76 0
-	add	x2, x23, :lo12:g_nand_phy_info
-.LVL398:
-	.loc 1 74 0
+	mov	w25, w2
+	add	x2, x21, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 1 81 0
+	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR1
-	.loc 1 74 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	.loc 1 81 0
+	str	x27, [sp, 80]
 	add	x22, x22, :lo12:.LANCHOR1
-	adrp	x25, .LC1
-	.loc 1 74 0
-	mov	w27, w3
-	.loc 1 76 0
-	ldrh	w28, [x2, 12]
-.LVL399:
+	adrp	x23, .LC1
+	mov	w26, w3
+	ldrh	w27, [x2, 12]
 	mov	x20, x0
 	add	x24, x0, x1
-.LVL400:
-	.loc 1 80 0
 	mov	x19, x0
-	.loc 1 81 0
 	add	x22, x22, 176
-	add	x25, x25, :lo12:.LC1
-.LVL401:
-.L349:
-	.loc 1 80 0 discriminator 1
+	add	x23, x23, :lo12:.LC1
+.L355:
 	cmp	x19, x24
-	bne	.L357
-	.loc 1 101 0
-	cbnz	w27, .L358
-.L376:
-	.loc 1 131 0
+	bne	.L363
+	cbnz	w26, .L364
+.L382:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL402:
-	ldp	x27, x28, [sp, 80]
-.LVL403:
+	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL404:
-.L357:
-	.cfi_restore_state
-	.loc 1 81 0
+.L363:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L350
-	.loc 1 81 0 is_stmt 0 discriminator 2
+	cbz	x0, .L356
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L351
-.L350:
-	.loc 1 81 0 discriminator 3
-	mov	w2, 81
+	cbnz	x0, .L357
+.L356:
+	mov	w2, 106
 	mov	x1, x22
-	mov	x0, x25
+	mov	x0, x23
 	bl	printk
-.LVL405:
-.L351:
-	.loc 1 82 0 is_stmt 1
+.L357:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
-	.loc 1 83 0
-	adrp	x21, g_nand_ops
-	.loc 1 82 0
 	bl	l2p_addr_tran.isra.0
-.LVL406:
-	.loc 1 83 0
-	add	x0, x21, :lo12:g_nand_ops
+	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x0, 16]
+	ldr	x4, [x0, 3384]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL407:
-	.loc 1 88 0
-	cbnz	w0, .L352
-	.loc 1 87 0
+	cbnz	w0, .L358
 	str	wzr, [x19]
-.L353:
-	.loc 1 91 0
-	add	x0, x23, :lo12:g_nand_phy_info
-	ldrh	w0, [x0, 14]
-	cmp	w0, 4
-	bne	.L355
-	.loc 1 92 0
-	add	x21, x21, :lo12:g_nand_ops
+.L359:
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w1, [x0, 14]
+	cmp	w1, 4
+	bne	.L361
+	ldr	x4, [x0, 3384]
 	ldrb	w0, [x29, 104]
 	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x21, 16]
 	ldr	w1, [x29, 108]
 	add	x3, x3, 8
 	add	x2, x2, 2048
-	add	w1, w28, w1
+	add	w1, w27, w1
 	blr	x4
-.LVL408:
-	.loc 1 96 0
-	cbz	w0, .L355
-	.loc 1 97 0
+	cbz	w0, .L361
 	mov	w0, -1
 	str	w0, [x19]
-.L355:
+.L361:
 	add	x19, x19, 32
-	b	.L349
-.L352:
-	.loc 1 89 0
+	b	.L355
+.L358:
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L353
-.L362:
-.LBB220:
-	.loc 1 107 0
+	b	.L359
+.L368:
 	str	wzr, [x21]
-	.loc 1 112 0
-	mov	w2, w26
-	.loc 1 106 0
+	mov	w2, w25
 	str	wzr, [x23]
-	.loc 1 112 0
 	mov	w1, 1
-	.loc 1 110 0
 	stp	x23, x21, [x29, 120]
-	.loc 1 108 0
 	ldr	w0, [x20, 4]
 	str	w0, [x29, 116]
-	.loc 1 112 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL409:
-	.loc 1 113 0
-	ldr	w25, [x29, 112]
-	cmn	w25, #1
-	bne	.L359
-	.loc 1 114 0
+	ldr	w24, [x29, 112]
+	cmn	w24, #1
+	bne	.L365
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	bl	printk
-.LVL410:
-	.loc 1 115 0
-	str	w25, [x20]
-.L359:
-	.loc 1 117 0
+	str	w24, [x20]
+.L365:
 	ldr	x0, [x20, 16]
-	cbz	x0, .L360
-	.loc 1 118 0
+	cbz	x0, .L366
 	ldr	w2, [x0]
-	add	x0, x24, :lo12:.LANCHOR0
-	ldr	w3, [x0, 3392]
+	ldr	w3, [x21]
 	cmp	w2, w3
-	beq	.L360
-	.loc 1 119 0
+	beq	.L366
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	bl	printk
-.LVL411:
-	.loc 1 120 0
 	mov	w0, -1
 	str	w0, [x20]
-.L360:
-	.loc 1 123 0
+.L366:
 	ldr	x0, [x20, 8]
-	cbz	x0, .L361
-	.loc 1 124 0
+	cbz	x0, .L367
 	ldr	w3, [x22, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L361
-	.loc 1 125 0
+	beq	.L367
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
 	bl	printk
-.LVL412:
-	.loc 1 126 0
 	mov	w0, -1
 	str	w0, [x20]
-.L361:
+.L367:
 	add	x20, x20, 32
-.L377:
-.LBE220:
-	.loc 1 103 0 discriminator 1
+.L383:
 	cmp	x20, x19
-	bne	.L362
-	b	.L376
-.L358:
-.LBB221:
-	.loc 1 107 0 discriminator 1
-	adrp	x24, .LANCHOR0
-	add	x21, x24, :lo12:.LANCHOR0
-	.loc 1 106 0 discriminator 1
+	bne	.L368
+	b	.L382
+.L364:
+	add	x21, x21, :lo12:.LANCHOR0
 	adrp	x22, check_buf
-	.loc 1 107 0 discriminator 1
-	add	x21, x21, 3392
-	.loc 1 106 0 discriminator 1
+	add	x21, x21, 3448
 	add	x23, x22, :lo12:check_buf
-	b	.L377
-.LBE221:
-	.cfi_endproc
-.LFE262:
+	b	.L383
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB263:
-	.loc 1 134 0
-	.cfi_startproc
-.LVL413:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 1 137 0
-	adrp	x1, g_nand_phy_info
-.LVL414:
-	add	x3, x1, :lo12:g_nand_phy_info
 	ubfiz	x2, x2, 5, 32
-.LVL415:
-	.loc 1 134 0
+	add	x2, x2, 4
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	add	x2, x2, 4
+	adrp	x19, .LANCHOR0
+	add	x19, x19, :lo12:.LANCHOR0
+	str	x23, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	add	x19, x0, 4
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 1 142 0
-	adrp	x21, g_nand_ops
+	add	x20, x0, 4
 	add	x22, x0, x2
-	mov	x20, x1
-	.loc 1 137 0
-	ldrh	w23, [x3, 12]
-.LVL416:
-	.loc 1 147 0
-	add	x24, x21, :lo12:g_nand_ops
-.LVL417:
-.L380:
-	.loc 1 140 0 discriminator 1
-	cmp	x19, x22
-	bne	.L386
-	.loc 1 153 0
+	mov	w21, -1
+	ldrh	w23, [x19, 12]
+.L386:
+	cmp	x20, x22
+	bne	.L392
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
-.LVL418:
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-.LVL419:
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL420:
-.L386:
-	.cfi_restore_state
-	.loc 1 141 0
-	ldr	w0, [x19]
-.LVL421:
+.L392:
+	ldr	w0, [x20]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL422:
-	.loc 1 142 0
-	add	x0, x21, :lo12:g_nand_ops
-	ldr	w1, [x29, 76]
-	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
+	ldr	w1, [x29, 76]
+	ldr	x2, [x19, 3376]
 	blr	x2
-.LVL423:
-	.loc 1 144 0
-	cbnz	w0, .L381
-	.loc 1 143 0
-	str	wzr, [x19, -4]
-.L382:
-	.loc 1 146 0
-	add	x0, x20, :lo12:g_nand_phy_info
-	ldrh	w0, [x0, 14]
+	cmp	w0, 0
+	csel	w0, w21, wzr, ne
+	str	w0, [x20, -4]
+	ldrh	w0, [x19, 14]
 	cmp	w0, 4
-	bne	.L384
-	.loc 1 147 0
+	bne	.L390
 	ldrb	w0, [x29, 72]
-	ldr	x2, [x24, 8]
+	ldr	x2, [x19, 3376]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL424:
-	.loc 1 148 0
-	cbz	w0, .L384
-	.loc 1 149 0
-	mov	w0, -1
-	str	w0, [x19, -4]
-.L384:
-	add	x19, x19, 32
-	b	.L380
-.L381:
-	.loc 1 145 0
-	mov	w0, -1
-	str	w0, [x19, -4]
-	b	.L382
-	.cfi_endproc
-.LFE263:
+	cbz	w0, .L390
+	str	w21, [x20, -4]
+.L390:
+	add	x20, x20, 32
+	b	.L386
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB179:
-	.loc 2 98 0
-	.cfi_startproc
-.LVL425:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
 	and	w21, w0, 65535
-.LVL426:
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 99 0
 	sub	w2, w21, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L391
-.LBB230:
-.LBB231:
-	.loc 2 94 0
+	bcc	.L397
 	adrp	x0, .LANCHOR0
 	add	x20, x0, :lo12:.LANCHOR0
 	mov	x19, x0
-.LBE231:
-.LBE230:
-	.loc 2 101 0
-	ldrh	w2, [x20, 238]
+	ldrh	w2, [x20, 262]
 	cmp	w2, 1024
-	beq	.L391
+	beq	.L397
 	and	w1, w1, 65535
-.LBB232:
-.LBB233:
-	.loc 2 103 0
-	cbz	w1, .L393
-.LBB234:
-	.loc 2 104 0
+	cbz	w1, .L399
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL427:
 	and	w22, w0, 65535
-.LVL428:
-	.loc 2 105 0
-	ldr	x0, [x20, 3904]
+	ldr	x0, [x20, 3960]
 	lsl	w1, w21, 10
-	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 105 0
 	str	w1, [x0, 4]
-	.loc 2 106 0
 	mov	w1, w2
-	ldr	x0, [x20, 3904]
+	ldr	x0, [x20, 3960]
 	bl	FlashEraseBlocks
-.LVL429:
-	.loc 2 107 0
-	ldr	x2, [x20, 2360]
+	ldr	x2, [x20, 2384]
 	ubfiz	x0, x22, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 108 0
-	ldr	w0, [x20, 2616]
+	ldr	w0, [x20, 2640]
 	add	w0, w0, 1
-	str	w0, [x20, 2616]
-.LVL430:
-.L393:
-.LBE234:
-	.loc 2 110 0
+	str	w0, [x20, 2640]
+.L399:
 	add	x0, x19, :lo12:.LANCHOR0
-	add	x0, x0, 232
+	add	x0, x0, 256
 	ldrh	w1, [x0, 6]
-.LVL431:
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 111 0
 	strh	w21, [x2, 8]
-.LVL432:
-.L391:
-.LBE233:
-.LBE232:
-	.loc 2 115 0
+.L397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL433:
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE179:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
 	.global	FtlLowFormatEraseBlock
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB148:
-	.loc 3 528 0
-	.cfi_startproc
-.LVL434:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
-	.loc 3 539 0
 	mov	w10, 0
-	.loc 3 551 0
 	mov	w9, 4
-	.loc 3 528 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 3 538 0
 	adrp	x20, .LANCHOR0
 	add	x5, x20, :lo12:.LANCHOR0
-	.loc 3 528 0
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
 	and	w23, w1, 255
-.LVL435:
 	stp	x25, x26, [sp, 64]
-	.loc 3 541 0
-	add	x8, x5, 40
-	.loc 3 528 0
+	add	x8, x5, 64
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 3 528 0
 	and	w24, w0, 65535
-.LVL436:
-	.loc 3 536 0
 	mov	w21, 0
-	.loc 3 537 0
 	mov	w19, 0
-.LVL437:
-	.loc 3 538 0
-	str	w24, [x5, 3912]
-.L402:
-	.loc 3 539 0 discriminator 1
-	ldrh	w0, [x5, 12]
+	str	w24, [x5, 3968]
+.L408:
+	ldrh	w0, [x5, 36]
 	cmp	w0, w10
-	bhi	.L406
-	.loc 3 559 0
-	cbz	w21, .L401
-	.loc 3 562 0
-	ldr	x0, [x5, 3904]
+	bhi	.L412
+	cbz	w21, .L407
+	ldr	x0, [x5, 3960]
 	mov	w2, w21
 	mov	w1, 0
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
-	.loc 3 564 0
 	add	x25, x20, :lo12:.LANCHOR0
-	.loc 3 562 0
 	bl	FlashEraseBlocks
-.LVL438:
-.L410:
-	.loc 3 564 0
-	ldr	x0, [x25, 3904]
+.L416:
+	ldr	x0, [x25, 3960]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L409
-	.loc 3 566 0
+	bne	.L415
 	ldr	w0, [x1, 4]
-	.loc 3 565 0
 	add	w19, w19, 1
-.LVL439:
 	and	w19, w19, 65535
-.LVL440:
-	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL441:
-.L409:
+.L415:
 	add	x22, x22, 32
-	.loc 3 563 0 discriminator 2
 	cmp	x22, x21
-	bne	.L410
-	.loc 3 571 0
-	cbz	w23, .L423
-	.loc 3 573 0
+	bne	.L416
+	cbz	w23, .L429
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 3 572 0
 	mov	w25, 1
-.LVL442:
-	.loc 3 573 0
-	ldrh	w26, [x0, 84]
-.LVL443:
-	.loc 3 574 0
+	ldrh	w26, [x0, 108]
 	lsr	w0, w26, 2
-.LVL444:
 	str	w0, [x29, 124]
-.L411:
-	.loc 3 578 0
+.L417:
 	add	x27, x20, :lo12:.LANCHOR0
 	mov	w22, 0
-.LVL445:
-	.loc 3 580 0
-	add	x0, x27, 40
-.LVL446:
+	add	x0, x27, 64
 	str	x0, [x29, 112]
-.LVL447:
-.L419:
-	.loc 3 578 0
+.L425:
 	mov	w5, 0
-	.loc 3 577 0
 	mov	w21, 0
-.L412:
-	.loc 3 578 0 discriminator 1
-	ldrh	w0, [x27, 12]
-.LVL448:
+.L418:
+	ldrh	w0, [x27, 36]
 	cmp	w0, w5
-	bhi	.L415
-	.loc 3 593 0
-	cbz	w21, .L401
-	.loc 3 596 0
-	ldr	x0, [x27, 3904]
+	bhi	.L421
+	cbz	w21, .L407
+	ldr	x0, [x27, 3960]
 	mov	w1, w21
 	mov	w3, 1
 	mov	w2, w25
 	mov	x28, 0
 	bl	FlashProgPages
-.LVL449:
 	ubfiz	x1, x21, 5, 16
-.L418:
-	.loc 3 598 0
-	ldr	x0, [x27, 3904]
+.L424:
+	ldr	x0, [x27, 3960]
 	add	x3, x0, x28
 	ldr	w0, [x0, x28]
-	cbz	w0, .L417
-	.loc 3 600 0
+	cbz	w0, .L423
 	ldr	w0, [x3, 4]
-	.loc 3 599 0
 	add	w19, w19, 1
-.LVL450:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL451:
-	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL452:
 	ldr	x1, [x29, 104]
-.L417:
+.L423:
 	add	x28, x28, 32
-	.loc 3 597 0 discriminator 2
 	cmp	x1, x28
-	bne	.L418
-	.loc 3 604 0
+	bne	.L424
 	ldr	w0, [x29, 124]
-.LVL453:
 	add	w22, w22, w0
-.LVL454:
 	and	w22, w22, 65535
-.LVL455:
-	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L419
-	.loc 3 611 0
+	bhi	.L425
 	add	x26, x20, :lo12:.LANCHOR0
-.LVL456:
 	mov	x22, 0
-.LVL457:
-.L421:
-	cbz	w23, .L420
-	.loc 3 611 0 is_stmt 0 discriminator 1
-	ldr	x0, [x26, 3904]
-.LVL458:
+.L427:
+	cbz	w23, .L426
+	ldr	x0, [x26, 3960]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L420
-	.loc 3 612 0 is_stmt 1
+	cbnz	w0, .L426
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL459:
-.L420:
+.L426:
 	add	x22, x22, 32
-	.loc 3 610 0 discriminator 2
 	cmp	x22, x28
-	bne	.L421
-	.loc 3 615 0
+	bne	.L427
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L401
-	.loc 3 616 0
+	beq	.L407
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w2, w21
 	mov	w1, w25
-	ldr	x0, [x20, 3904]
-.LVL460:
+	ldr	x0, [x20, 3960]
 	bl	FlashEraseBlocks
-.LVL461:
-.L401:
-	.loc 3 619 0
+.L407:
 	mov	w0, w19
-.LVL462:
 	ldp	x19, x20, [sp, 16]
-.LVL463:
 	ldp	x21, x22, [sp, 32]
-.LVL464:
 	ldp	x23, x24, [sp, 48]
-.LVL465:
 	ldp	x25, x26, [sp, 64]
-.LVL466:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL467:
-.L406:
-	.cfi_restore_state
-	.loc 3 540 0
-	ldr	x1, [x5, 3904]
+.L412:
+	ldr	x1, [x5, 3960]
 	ubfiz	x0, x10, 5, 16
 	str	wzr, [x1, x0]
-	.loc 3 541 0
 	mov	w1, w24
 	ldrb	w0, [x8, w10, sxtw]
 	bl	V2P_block
-.LVL468:
 	and	w6, w0, 65535
 	mov	w7, w6
-	.loc 3 543 0
-	cbz	w23, .L403
-	.loc 3 544 0
+	cbz	w23, .L409
 	bl	IsBlkInVendorPart
-.LVL469:
-	cbnz	w0, .L404
-.L403:
-	.loc 3 548 0
+	cbnz	w0, .L410
+.L409:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-.LVL470:
-	cbnz	w0, .L405
-	.loc 3 549 0
-	ldr	x0, [x5, 3904]
+	cbnz	w0, .L411
+	ldr	x0, [x5, 3960]
 	ubfiz	x2, x21, 5, 16
 	lsl	w6, w6, 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
-	.loc 3 550 0
-	ldr	x1, [x5, 3904]
-	ldr	x0, [x5, 3920]
+	ldr	x1, [x5, 3960]
+	ldr	x0, [x5, 3976]
 	add	x1, x1, x2
-	.loc 3 551 0
-	ldr	x2, [x5, 3928]
-	.loc 3 550 0
+	ldr	x2, [x5, 3984]
 	str	x0, [x1, 8]
-	.loc 3 551 0
-	ldrh	w0, [x5, 92]
+	ldrh	w0, [x5, 116]
 	mul	w0, w0, w21
-	.loc 3 552 0
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 3 551 0
 	sdiv	w0, w0, w9
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L404:
-	.loc 3 539 0 discriminator 2
+.L410:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L402
-.L405:
-	.loc 3 554 0
+	b	.L408
+.L411:
 	add	w19, w19, 1
-.LVL471:
 	and	w19, w19, 65535
-.LVL472:
-	b	.L404
-.L423:
-	.loc 3 533 0
+	b	.L410
+.L429:
 	mov	w0, 6
-.LVL473:
-	.loc 3 534 0
 	mov	w25, 0
-.LVL474:
-	.loc 3 531 0
 	mov	w26, 1
-.LVL475:
-	.loc 3 533 0
 	str	w0, [x29, 124]
-	b	.L411
-.LVL476:
-.L415:
-	.loc 3 579 0
-	ldr	x1, [x27, 3904]
+	b	.L417
+.L421:
+	ldr	x1, [x27, 3960]
 	ubfiz	x0, x5, 5, 16
 	str	wzr, [x1, x0]
-	.loc 3 580 0
 	mov	w1, w24
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, w5, sxtw]
 	bl	V2P_block
-.LVL477:
 	and	w6, w0, 65535
 	mov	w7, w6
-	.loc 3 581 0
-	cbz	w23, .L413
-	.loc 3 582 0
+	cbz	w23, .L419
 	bl	IsBlkInVendorPart
-.LVL478:
-	cbnz	w0, .L414
-.L413:
-	.loc 3 585 0
+	cbnz	w0, .L420
+.L419:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-.LVL479:
-	cbnz	w0, .L414
-	.loc 3 586 0
-	ldr	x0, [x27, 3904]
+	cbnz	w0, .L420
+	ldr	x0, [x27, 3960]
 	ubfiz	x2, x21, 5, 16
 	add	w6, w22, w6, lsl 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
-	.loc 3 587 0
-	ldr	x1, [x27, 3904]
-	ldr	x0, [x27, 3936]
+	ldr	x1, [x27, 3960]
+	ldr	x0, [x27, 3992]
 	add	x1, x1, x2
-	.loc 3 588 0
 	mov	w2, 4
-	.loc 3 587 0
 	str	x0, [x1, 8]
-	.loc 3 588 0
-	ldrh	w0, [x27, 92]
+	ldrh	w0, [x27, 116]
 	mul	w0, w0, w21
-	.loc 3 589 0
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 3 588 0
 	sdiv	w0, w0, w2
-	ldr	x2, [x27, 3920]
+	ldr	x2, [x27, 3976]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L414:
-	.loc 3 578 0 discriminator 2
+.L420:
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L412
-	.cfi_endproc
-.LFE148:
+	b	.L418
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB182:
-	.loc 2 181 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-.LBB235:
-.LBB236:
-	.loc 2 89 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-.LBE236:
-.LBE235:
-	.loc 2 181 0
 	str	x23, [sp, 48]
-.LBB239:
-.LBB237:
-	.loc 2 89 0
-	add	x20, x19, 232
-	.cfi_offset 23, -16
-.LBE237:
-.LBE239:
-	.loc 2 203 0
-	adrp	x23, .LC79
-	add	x23, x23, :lo12:.LC79
-	.loc 2 181 0
+	add	x20, x19, 256
+	adrp	x23, .LC80
+	add	x23, x23, :lo12:.LC80
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-.LVL480:
-.L445:
-.LBB240:
-.LBB238:
-	.loc 2 89 0
+.L451:
 	ldrh	w1, [x20, 6]
-.LBE238:
-.LBE240:
-	.loc 2 186 0
-	cbz	w1, .L446
-	.loc 2 187 0
+	cbz	w1, .L452
 	ldrh	w0, [x20, 2]
-	.loc 2 188 0
 	sub	w1, w1, #1
 	strh	w1, [x20, 6]
-	.loc 2 187 0
 	add	x2, x20, x0, sxtw 1
-	.loc 2 189 0
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x20, 2]
-	.loc 2 187 0
 	ldrh	w21, [x2, 8]
-.LBB241:
-	.loc 2 191 0
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL481:
 	and	w22, w0, 65535
-	.loc 2 192 0
-	ldr	x0, [x19, 3904]
+	ldr	x0, [x19, 3960]
 	lsl	w1, w21, 10
-	.loc 2 193 0
 	mov	w2, 1
-	.loc 2 192 0
 	str	w1, [x0, 4]
-	.loc 2 193 0
 	mov	w1, w2
-	ldr	x0, [x19, 3904]
+	ldr	x0, [x19, 3960]
 	bl	FlashEraseBlocks
-.LVL482:
-	.loc 2 194 0
-	ldr	x2, [x19, 2360]
+	ldr	x2, [x19, 2384]
 	ubfiz	x0, x22, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.LBE241:
-	.loc 2 202 0
 	sub	w1, w21, #1
-.LBB242:
-	.loc 2 195 0
-	ldr	w0, [x19, 2616]
+	ldr	w0, [x19, 2640]
 	add	w0, w0, 1
-	str	w0, [x19, 2616]
-.LBE242:
-	.loc 2 202 0
+	str	w0, [x19, 2640]
 	mov	w0, 65533
 	cmp	w0, w1, uxth
-	bcs	.L450
-	.loc 2 203 0
+	bcs	.L456
 	ldrh	w2, [x20, 6]
 	mov	w1, w21
 	mov	x0, x23
 	bl	printk
-.LVL483:
-	.loc 2 205 0
-	b	.L445
-.L446:
-	.loc 2 199 0
-	adrp	x0, .LC78
+	b	.L451
+.L452:
+	adrp	x0, .LC79
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC79
 	bl	printk
-.LVL484:
-.L449:
-	b	.L449
-.L450:
-	.loc 2 208 0
+.L455:
+	b	.L455
+.L456:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL485:
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE182:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB194:
-	.loc 2 562 0
-	.cfi_startproc
-.LVL486:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 566 0
 	mov	w20, 0
-.LVL487:
 	ldrh	w1, [x0, 10]
 	ldr	x0, [x0, 16]
-.LVL488:
-.L453:
-	.loc 2 566 0 is_stmt 0 discriminator 1
+.L459:
 	cmp	w20, w1
-	beq	.L457
-	.loc 2 567 0 is_stmt 1
+	beq	.L463
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L454
-	.loc 2 568 0
+	cbnz	w2, .L460
 	bl	FtlFreeSysBlkQueueOut
-.LVL489:
 	and	w1, w0, 65535
 	strh	w0, [x21]
-	.loc 2 569 0
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L455
-	.loc 2 570 0
-	adrp	x0, .LANCHOR0+238
-	ldrh	w2, [x0, #:lo12:.LANCHOR0+238]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	bcs	.L461
+	adrp	x0, .LANCHOR0+262
+	ldrh	w2, [x0, #:lo12:.LANCHOR0+262]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	printk
-.LVL490:
-.L456:
-	b	.L456
-.L455:
-	.loc 2 576 0
+.L462:
+	b	.L462
+.L461:
 	ldr	w0, [x19, 48]
-	.loc 2 574 0
 	strh	wzr, [x19, 2]
-	.loc 2 576 0
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-	.loc 2 577 0
 	ldrh	w0, [x19, 8]
-	.loc 2 575 0
 	strh	w20, [x19]
-	.loc 2 577 0
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L457:
-	.loc 2 581 0
+.L463:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L459
-.LBB245:
-.LBB246:
+	bhi	.L465
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -5926,941 +3476,529 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, 192
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL491:
-.L459:
-.LBE246:
-.LBE245:
-	.loc 2 583 0
+.L465:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL492:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL493:
-.L454:
-	.cfi_restore_state
-	.loc 2 566 0 discriminator 2
+.L460:
 	add	w20, w20, 1
-.LVL494:
 	and	w20, w20, 65535
-.LVL495:
-	b	.L453
-	.cfi_endproc
-.LFE194:
+	b	.L459
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	2
 	.global	ftl_memset
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB266:
-	.loc 1 201 0
-	.cfi_startproc
-.LVL496:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 1 202 0
 	uxtw	x2, w2
-.LVL497:
-	.loc 1 201 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 1 202 0
 	bl	memset
-.LVL498:
-	.loc 1 203 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE266:
 	.size	ftl_memset, .-ftl_memset
 	.align	2
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB145:
-	.loc 3 279 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 3 297 0
 	mov	w0, 65535
-	.loc 3 279 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 3 282 0
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 3 279 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 287 0
 	add	x1, x19, 2560
-	.loc 3 291 0
 	add	x2, x19, 2560
-	.loc 3 305 0
-	strh	wzr, [x19, 3216]
-	.loc 3 306 0
-	strh	wzr, [x19, 3300]
-	.loc 3 287 0
-	stp	wzr, wzr, [x1, 4]
-	stp	wzr, wzr, [x1, 12]
-	.loc 3 288 0
-	str	wzr, [x19, 2580]
-	.loc 3 284 0
-	str	wzr, [x19, 2584]
-	.loc 3 291 0
-	stp	wzr, wzr, [x2, 36]
-	stp	wzr, wzr, [x2, 44]
-	.loc 3 297 0
-	str	w0, [x19, 3948]
-	.loc 3 301 0
+	strh	wzr, [x19, 3240]
+	strh	wzr, [x19, 3324]
+	stp	wzr, wzr, [x1, 28]
+	stp	wzr, wzr, [x1, 36]
+	str	wzr, [x19, 2604]
+	str	wzr, [x19, 2608]
+	stp	wzr, wzr, [x2, 60]
+	stp	wzr, wzr, [x2, 68]
+	str	w0, [x19, 4004]
 	mov	w0, -1
-	strh	w0, [x19, 3296]
-	.loc 3 302 0
-	strh	w0, [x19, 3298]
-	.loc 3 303 0
+	strh	w0, [x19, 3320]
+	strh	w0, [x19, 3322]
 	mov	w0, 32
-	.loc 3 292 0
-	str	wzr, [x19, 2616]
-	.loc 3 303 0
-	strh	w0, [x19, 3208]
-	.loc 3 304 0
+	str	wzr, [x19, 2640]
+	strh	w0, [x19, 3232]
 	mov	w0, 128
-	.loc 3 293 0
-	str	wzr, [x19, 2620]
-	.loc 3 304 0
-	strh	w0, [x19, 3210]
-	.loc 3 294 0
-	str	wzr, [x19, 2624]
-	.loc 3 299 0
-	str	wzr, [x19, 3212]
-	.loc 3 296 0
-	str	wzr, [x19, 3220]
-	.loc 3 300 0
-	str	wzr, [x19, 3912]
-	.loc 3 295 0
-	str	wzr, [x19, 3944]
-	.loc 3 298 0
-	str	wzr, [x19, 3952]
-	.loc 3 307 0
-	strh	wzr, [x19, 3338]
-	.loc 3 310 0
-	ldrh	w0, [x19, 86]
+	str	wzr, [x19, 2644]
+	strh	w0, [x19, 3234]
+	str	wzr, [x19, 2648]
+	str	wzr, [x19, 3236]
+	str	wzr, [x19, 3244]
+	str	wzr, [x19, 3968]
+	str	wzr, [x19, 4000]
+	str	wzr, [x19, 4008]
+	strh	wzr, [x19, 3362]
+	ldrh	w0, [x19, 110]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL499:
-	.loc 3 311 0
-	ldrh	w1, [x19, 86]
-	.loc 3 310 0
-	str	x0, [x19, 3272]
-	.loc 3 311 0
+	ldrh	w1, [x19, 110]
+	str	x0, [x19, 3296]
 	mov	w0, 12
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL500:
-	.loc 3 312 0
-	ldrh	w21, [x19, 12]
-	.loc 3 311 0
-	str	x0, [x19, 3288]
-	.loc 3 312 0
+	ldrh	w21, [x19, 36]
+	str	x0, [x19, 3312]
 	lsl	w22, w21, 5
-	.loc 3 313 0
 	lsl	w21, w21, 7
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL501:
-	str	x0, [x19, 3960]
-	.loc 3 314 0
+	str	x0, [x19, 4016]
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL502:
-	str	x0, [x19, 3968]
-	.loc 3 315 0
+	str	x0, [x19, 4024]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL503:
-	str	x0, [x19, 3976]
-	.loc 3 316 0
+	str	x0, [x19, 4032]
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL504:
-	str	x0, [x19, 3904]
-	.loc 3 317 0
+	str	x0, [x19, 3960]
 	mov	w0, w22
 	bl	ftl_malloc
-.LVL505:
-	str	x0, [x19, 3256]
-	.loc 3 320 0
-	ldrh	w0, [x19, 12]
-	.loc 3 319 0
-	ldrh	w21, [x19, 90]
-	.loc 3 320 0
+	str	x0, [x19, 3280]
+	ldrh	w0, [x19, 36]
+	ldrh	w21, [x19, 114]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x19, 3264]
-	.loc 3 321 0
+	str	w0, [x19, 3288]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL506:
-	str	x0, [x19, 3376]
-	.loc 3 322 0
+	str	x0, [x19, 3432]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL507:
-	str	x0, [x19, 3984]
-	.loc 3 323 0
+	str	x0, [x19, 4040]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL508:
-	str	x0, [x19, 3992]
-	.loc 3 324 0
-	ldr	w0, [x19, 3264]
+	str	x0, [x19, 4048]
+	ldr	w0, [x19, 3288]
 	mul	w0, w21, w0
 	bl	ftl_malloc
-.LVL509:
-	str	x0, [x19, 3240]
-	.loc 3 325 0
+	str	x0, [x19, 3264]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL510:
-	str	x0, [x19, 3936]
-	.loc 3 326 0
+	str	x0, [x19, 3992]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL511:
-	str	x0, [x19, 3920]
-	.loc 3 327 0
-	ldr	w1, [x19, 3264]
+	str	x0, [x19, 3976]
+	ldr	w1, [x19, 3288]
 	mov	w0, 24
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL512:
-	.loc 3 329 0
-	ldrh	w21, [x19, 92]
-	.loc 3 327 0
-	str	x0, [x19, 3232]
-	.loc 3 329 0
-	ldrh	w0, [x19, 12]
+	ldrh	w21, [x19, 116]
+	str	x0, [x19, 3256]
+	ldrh	w0, [x19, 36]
 	mul	w21, w21, w0
-	.loc 3 330 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL513:
-	str	x0, [x19, 3384]
-	.loc 3 331 0
+	str	x0, [x19, 3440]
 	lsl	w0, w21, 2
 	bl	ftl_malloc
-.LVL514:
-	str	x0, [x19, 3928]
-	.loc 3 332 0
-	ldrh	w1, [x19, 92]
-	ldr	w0, [x19, 3264]
+	str	x0, [x19, 3984]
+	ldrh	w1, [x19, 116]
+	ldr	w0, [x19, 3288]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL515:
-	str	x0, [x19, 3248]
-	.loc 3 335 0
-	ldrh	w0, [x19, 22]
+	str	x0, [x19, 3272]
+	ldrh	w0, [x19, 46]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x19, 4000]
-	.loc 3 336 0
+	strh	w0, [x19, 4056]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL516:
-	str	x0, [x19, 4008]
-	.loc 3 337 0
-	ldrh	w0, [x19, 4000]
+	str	x0, [x19, 4064]
+	ldrh	w0, [x19, 4056]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x19, 4000]
-	.loc 3 338 0
+	strh	w0, [x19, 4056]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL517:
-	.loc 3 345 0
-	ldrh	w21, [x19, 22]
-	.loc 3 338 0
-	str	x0, [x19, 4016]
-	.loc 3 339 0
+	ldrh	w21, [x19, 46]
+	str	x0, [x19, 4072]
 	add	x0, x0, 32
-	str	x0, [x19, 2360]
-	.loc 3 345 0
+	str	x0, [x19, 2384]
 	lsl	w21, w21, 1
-	.loc 3 347 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL518:
-	str	x0, [x19, 4024]
-	.loc 3 349 0
+	str	x0, [x19, 4080]
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL519:
-	.loc 3 350 0
-	ldr	w21, [x19, 108]
-	.loc 3 349 0
-	str	x0, [x19, 2352]
-	.loc 3 350 0
+	ldr	w21, [x19, 132]
+	str	x0, [x19, 2376]
 	lsl	w21, w21, 1
-	.loc 3 351 0
 	mov	w0, w21
 	bl	ftl_malloc
-.LVL520:
-	str	x0, [x19, 4032]
-	.loc 3 352 0
+	str	x0, [x19, 4088]
 	mov	w0, w21
-	bl	ftl_malloc
-.LVL521:
-	str	x0, [x19, 4040]
-	.loc 3 353 0
-	ldrh	w0, [x19, 22]
-	.loc 3 370 0
 	adrp	x21, .LANCHOR3
-	add	x21, x21, :lo12:.LANCHOR3
-	.loc 3 353 0
+	add	x22, x21, :lo12:.LANCHOR3
+	bl	ftl_malloc
+	str	x0, [x22, -256]
+	ldrh	w0, [x19, 46]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL522:
-	str	x0, [x20, #:lo12:.LANCHOR0]
-	.loc 3 354 0
-	ldrh	w0, [x19, 100]
+	str	x0, [x19, 24]
+	ldrh	w0, [x19, 124]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL523:
-	str	x0, [x19, 128]
-	.loc 3 355 0
-	ldrh	w0, [x19, 100]
+	str	x0, [x19, 152]
+	ldrh	w0, [x19, 124]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL524:
-	str	x0, [x19, 4048]
-	.loc 3 356 0
-	ldrh	w0, [x19, 100]
+	str	x0, [x22, -248]
+	ldrh	w0, [x19, 124]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL525:
-	str	x0, [x19, 4056]
-	.loc 3 357 0
-	ldrh	w0, [x19, 102]
+	str	x0, [x22, -240]
+	ldrh	w0, [x19, 126]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL526:
-	.loc 3 358 0
-	ldrh	w2, [x19, 102]
+	ldrh	w2, [x19, 126]
 	mov	w1, 0
-	.loc 3 357 0
-	str	x0, [x19, 4064]
-	.loc 3 358 0
+	str	x0, [x22, -232]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL527:
-	.loc 3 360 0
-	ldrh	w0, [x19, 116]
-	.loc 3 361 0
+	ldrh	w0, [x19, 140]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL528:
-	str	x0, [x19, 4072]
-	.loc 3 362 0
-	ldr	w0, [x19, 108]
-	.loc 3 363 0
+	str	x0, [x22, -224]
+	ldr	w0, [x19, 132]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL529:
-	str	x0, [x19, 4080]
-	.loc 3 364 0
-	ldrh	w0, [x19, 118]
-	.loc 3 365 0
+	str	x0, [x22, -216]
+	ldrh	w0, [x19, 142]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-.LVL530:
-	.loc 3 366 0
-	ldrh	w1, [x19, 118]
-	.loc 3 365 0
-	str	x0, [x19, 2544]
-	.loc 3 366 0
-	ldrh	w0, [x19, 90]
-	.loc 3 367 0
+	ldrh	w1, [x19, 142]
+	str	x0, [x19, 2568]
+	ldrh	w0, [x19, 114]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL531:
-	str	x0, [x19, 4088]
-	.loc 3 368 0
-	ldrh	w1, [x19, 22]
-	.loc 3 369 0
+	str	x0, [x22, -208]
+	ldrh	w1, [x19, 46]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL532:
-	str	x0, [x19, 2336]
-	.loc 3 370 0
-	ldrh	w0, [x19, 78]
-	.loc 3 371 0
-	ldrh	w1, [x19, 34]
-	.loc 3 370 0
+	str	x0, [x19, 2360]
+	ldrh	w0, [x19, 102]
+	ldrh	w1, [x19, 58]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x21, -256]
-	.loc 3 371 0
+	strh	w0, [x22, -200]
 	mul	w0, w1, w0
-	.loc 3 372 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL533:
-	.loc 3 374 0
-	ldrh	w4, [x21, -256]
-	add	x5, x19, 176
-	.loc 3 373 0
-	ldrh	w6, [x19, 34]
+	ldrh	w4, [x22, -200]
+	add	x5, x19, 200
+	ldrh	w6, [x19, 58]
 	mov	x1, 1
-	.loc 3 372 0
-	str	x0, [x19, 168]
-	.loc 3 373 0
+	str	x0, [x19, 192]
 	mov	w2, w4
 	mov	x0, x20
-.L464:
-.LVL534:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.L470:
 	cmp	w1, w6
-	bcc	.L465
+	bcc	.L471
 	mov	w2, 8
-	.loc 3 379 0 is_stmt 1
 	add	x4, x0, :lo12:.LANCHOR0
 	sub	w2, w2, w1
-	add	x4, x4, 136
+	add	x4, x4, 160
 	add	x2, x2, 1
-	.loc 3 373 0
 	mov	x3, 0
-.L466:
+.L472:
 	add	x3, x3, 1
-	.loc 3 377 0 discriminator 1
 	cmp	x3, x2
-	bne	.L467
-	.loc 3 383 0
-	add	x1, x0, :lo12:.LANCHOR0
-.LVL535:
-	ldr	x2, [x1, 4032]
-	cbnz	x2, .L468
-.L470:
-	.loc 3 385 0
+	bne	.L473
+	add	x2, x0, :lo12:.LANCHOR0
+	ldr	x1, [x2, 4088]
+	cbnz	x1, .L474
+.L476:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 224
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printk
-.LVL536:
-	.loc 3 386 0
 	mov	w0, -1
-.L463:
-	.loc 3 484 0
+.L469:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL537:
-.L465:
-	.cfi_restore_state
-	.loc 3 374 0 discriminator 3
-	ldr	x3, [x19, 168]
-	.loc 3 373 0 discriminator 3
+.L471:
+	ldr	x3, [x19, 192]
 	add	w1, w1, 1
-.LVL538:
-	.loc 3 374 0 discriminator 3
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x5], 8
-	b	.L464
-.LVL539:
-.L467:
-	.loc 3 379 0 discriminator 2
+	b	.L470
+.L473:
 	add	x5, x1, x3
 	add	x5, x4, x5, lsl 3
 	str	xzr, [x5, 24]
-	b	.L466
-.LVL540:
-.L468:
-	.loc 3 388 0
-	ldr	x2, [x1, 4040]
-	cbz	x2, .L470
-	.loc 3 393 0
-	ldr	x2, [x1, 4072]
-	cbz	x2, .L470
-	.loc 3 398 0
-	ldr	x2, [x1, 4080]
-	cbz	x2, .L470
-	.loc 3 404 0
-	ldr	x2, [x1, 2544]
-	cbz	x2, .L470
-	.loc 3 409 0
-	ldr	x2, [x1, 4088]
-	cbz	x2, .L470
-	.loc 3 414 0
-	ldr	x2, [x1, 2336]
-	cbz	x2, .L470
-	.loc 3 419 0
-	ldr	x2, [x1, 168]
-	cbz	x2, .L470
-	.loc 3 425 0
-	ldr	x1, [x1, 2352]
-	cbz	x1, .L470
-	.loc 3 430 0
+	b	.L472
+.L474:
+	add	x1, x21, :lo12:.LANCHOR3
+	ldr	x3, [x1, -256]
+	cbz	x3, .L476
+	ldr	x3, [x1, -224]
+	cbz	x3, .L476
+	ldr	x3, [x1, -216]
+	cbz	x3, .L476
+	ldr	x3, [x2, 2568]
+	cbz	x3, .L476
+	ldr	x1, [x1, -208]
+	cbz	x1, .L476
+	ldr	x1, [x2, 2360]
+	cbz	x1, .L476
+	ldr	x1, [x2, 192]
+	cbz	x1, .L476
+	ldr	x1, [x2, 2376]
+	cbz	x1, .L476
 	add	x1, x0, :lo12:.LANCHOR0
-	ldr	x2, [x1, 3272]
-	cbz	x2, .L470
-	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3288]
-	cbz	x2, .L470
-	.loc 3 435 0 is_stmt 1
+	ldr	x2, [x1, 3296]
+	cbz	x2, .L476
+	ldr	x2, [x1, 3312]
+	cbz	x2, .L476
+	ldr	x2, [x1, 4016]
+	cbz	x2, .L476
+	ldr	x2, [x1, 4032]
+	cbz	x2, .L476
 	ldr	x2, [x1, 3960]
-	cbz	x2, .L470
-	.loc 3 435 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3976]
-	cbz	x2, .L470
-	.loc 3 435 0 discriminator 2
-	ldr	x2, [x1, 3904]
-	cbz	x2, .L470
-	.loc 3 435 0 discriminator 3
-	ldr	x2, [x1, 3256]
-	cbz	x2, .L470
-	.loc 3 435 0 discriminator 4
-	ldr	x2, [x1, 3968]
-	cbz	x2, .L470
-	.loc 3 440 0 is_stmt 1
-	ldr	x2, [x1, 3376]
-	cbz	x2, .L470
-	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	x2, [x1, 3984]
-	cbz	x2, .L470
-	.loc 3 440 0 discriminator 2
-	ldr	x1, [x1, 3992]
-	cbz	x1, .L470
-	.loc 3 441 0 is_stmt 1 discriminator 3
-	add	x0, x0, :lo12:.LANCHOR0
-	.loc 3 440 0 discriminator 3
-	ldr	x1, [x0, 3240]
-	cbz	x1, .L470
-	.loc 3 441 0
-	ldr	x1, [x0, 3936]
-	cbz	x1, .L470
-	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 3920]
-	cbz	x1, .L470
-	.loc 3 441 0 discriminator 2
-	ldr	x1, [x0, 3232]
-	cbz	x1, .L470
-	.loc 3 446 0 is_stmt 1
-	ldr	x1, [x0, 3384]
-	cbz	x1, .L470
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 3928]
-	cbz	x1, .L470
-	.loc 3 446 0 discriminator 2
-	ldr	x1, [x0, 3248]
-	cbz	x1, .L470
-	.loc 3 452 0 is_stmt 1
-	ldr	x1, [x0, 2360]
-	cbz	x1, .L470
-	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	x1, [x0, 4008]
-	cbz	x1, .L470
-	.loc 3 458 0 is_stmt 1
-	ldr	x0, [x0, 128]
-	cbz	x0, .L470
-	.loc 3 464 0
-	adrp	x0, .LANCHOR0
+	cbz	x2, .L476
+	ldr	x2, [x1, 3280]
+	cbz	x2, .L476
+	ldr	x2, [x1, 4024]
+	cbz	x2, .L476
+	ldr	x2, [x1, 3432]
+	cbz	x2, .L476
+	ldr	x2, [x1, 4040]
+	cbz	x2, .L476
+	ldr	x1, [x1, 4048]
+	cbz	x1, .L476
 	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x1, [x0, 4048]
-	cbz	x1, .L470
-	.loc 3 470 0
-	ldr	x1, [x0, 4056]
-	cbz	x1, .L470
-	.loc 3 476 0
-	ldr	x0, [x0, 4064]
-	cbz	x0, .L470
-	.loc 3 483 0
+	ldr	x1, [x0, 3264]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3992]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3976]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3256]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3440]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3984]
+	cbz	x1, .L476
+	ldr	x1, [x0, 3272]
+	cbz	x1, .L476
+	ldr	x1, [x0, 2384]
+	cbz	x1, .L476
+	ldr	x1, [x0, 4064]
+	cbz	x1, .L476
+	ldr	x0, [x0, 152]
+	cbz	x0, .L476
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldr	x1, [x0, -248]
+	cbz	x1, .L476
+	ldr	x1, [x0, -240]
+	cbz	x1, .L476
+	ldr	x0, [x0, -232]
+	cbz	x0, .L476
 	mov	w0, 0
-	b	.L463
-	.cfi_endproc
-.LFE145:
+	b	.L469
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB164:
-	.loc 4 66 0
-	.cfi_startproc
-.LVL541:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 4 69 0
-	adrp	x0, .LANCHOR3-256
-.LVL542:
-	.loc 4 66 0
+	adrp	x0, .LANCHOR3-200
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 4 74 0
 	adrp	x20, .LANCHOR1
 	add	x20, x20, :lo12:.LANCHOR1
-	.loc 4 69 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR3-256]
-	.loc 4 74 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR3-200]
 	add	x20, x20, 240
-	.loc 4 66 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 4 74 0
 	adrp	x23, .LANCHOR0
 	add	x23, x23, :lo12:.LANCHOR0
-	.loc 4 69 0
 	mov	x19, 0
-	.loc 4 66 0
 	mov	x21, x1
-	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL543:
 	mov	x0, x21
 	bl	ftl_memset
-.LVL544:
-.L568:
-	.loc 4 72 0
+.L574:
 	ldrh	w0, [x22, x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L565
-	.loc 4 74 0
-	ldrh	w1, [x23, 78]
+	beq	.L571
+	ldrh	w1, [x23, 102]
 	cmp	w1, w0
-	bhi	.L567
-	.loc 4 74 0 is_stmt 0 discriminator 1
+	bhi	.L573
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL545:
-.L567:
-	.loc 4 75 0 is_stmt 1 discriminator 2
+.L573:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
-	.loc 4 70 0 discriminator 2
 	cmp	x19, 1024
-	.loc 4 75 0 discriminator 2
 	ubfx	x0, x2, 5, 11
 	lsl	w2, w1, w2
 	lsl	x0, x0, 2
 	ldr	w1, [x21, x0]
 	orr	w1, w1, w2
 	str	w1, [x21, x0]
-	.loc 4 70 0 discriminator 2
-	bne	.L568
-.L565:
-	.loc 4 77 0
+	bne	.L574
+.L571:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL546:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE164:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.align	2
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB166:
-	.loc 4 149 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 4 150 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, -1
-	.loc 4 149 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 4 152 0
 	mov	w2, 16
-	add	x0, x0, 148
-	.loc 4 150 0
+	add	x0, x0, 172
 	strh	w1, [x0, -12]
-	.loc 4 152 0
 	mov	w1, 255
-	.loc 4 151 0
 	strh	wzr, [x0, -6]
-	.loc 4 152 0
 	bl	ftl_memset
-.LVL547:
-	.loc 4 153 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE166:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.align	2
 	.global	FtlFreeSysBlkQueueInit
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB176:
-	.loc 2 76 0
-	.cfi_startproc
-.LVL548:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 79 0
 	adrp	x3, .LANCHOR0
 	add	x3, x3, :lo12:.LANCHOR0
-	.loc 2 83 0
 	mov	w2, 2048
-	.loc 2 76 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 83 0
 	mov	w1, 0
-	.loc 2 82 0
-	strh	w0, [x3, 232]
-	.loc 2 83 0
-	add	x0, x3, 240
-.LVL549:
-	.loc 2 79 0
-	strh	wzr, [x3, 234]
-	.loc 2 80 0
-	strh	wzr, [x3, 236]
-	.loc 2 81 0
-	strh	wzr, [x3, 238]
-	.loc 2 83 0
+	strh	w0, [x3, 256]
+	add	x0, x3, 264
+	strh	wzr, [x3, 258]
+	strh	wzr, [x3, 260]
+	strh	wzr, [x3, 262]
 	bl	ftl_memset
-.LVL550:
-	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE176:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.align	2
 	.global	load_l2p_region
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB192:
-	.loc 2 488 0
-	.cfi_startproc
-.LVL551:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 492 0
-	adrp	x21, .LANCHOR0
-	.loc 2 488 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	and	w23, w0, 65535
-.LVL552:
-	.loc 2 492 0
-	add	x0, x21, :lo12:.LANCHOR0
-	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
-	str	x25, [sp, 64]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 25, -16
-	.loc 2 488 0
+	and	w20, w0, 65535
 	and	x19, x1, 65535
-	.loc 2 492 0
-	ldrh	w0, [x0, 116]
-	cmp	w0, w23
-	bcs	.L577
-	.loc 2 492 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR0
+	add	x1, x0, :lo12:.LANCHOR0
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	mov	x24, x0
+	stp	x25, x26, [sp, 64]
+	ldrh	w1, [x1, 140]
+	cmp	w1, w20
+	bcs	.L583
 	adrp	x1, .LANCHOR1
-.LVL553:
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 492
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL554:
-.L577:
-	.loc 2 493 0 is_stmt 1
-	add	x20, x21, :lo12:.LANCHOR0
-	ubfiz	x0, x23, 2, 16
-	ldr	x1, [x20, 4072]
-.LVL555:
-	ldr	w24, [x1, x0]
-.LVL556:
-	.loc 2 495 0
-	cbnz	w24, .L578
-	.loc 2 496 0
-	ldr	x0, [x20, 2544]
-.LVL557:
+.L583:
+	adrp	x22, .LANCHOR3
+	add	x22, x22, :lo12:.LANCHOR3
+	ubfiz	x0, x20, 2, 16
+	ldr	x1, [x22, -224]
+	ldr	w25, [x1, x0]
+	cbnz	w25, .L584
+	add	x24, x24, :lo12:.LANCHOR0
 	lsl	x19, x19, 4
-.LVL558:
-	ldrh	w2, [x20, 90]
 	mov	w1, 255
+	ldr	x0, [x24, 2568]
+	ldrh	w2, [x24, 114]
 	add	x0, x0, x19
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL559:
-	.loc 2 497 0
-	ldr	x0, [x20, 2544]
-	strh	w23, [x0, x19]
-	.loc 2 498 0
-	ldr	x0, [x20, 2544]
+	ldr	x0, [x24, 2568]
+	strh	w20, [x0, x19]
+	ldr	x0, [x24, 2568]
 	add	x19, x0, x19
 	str	wzr, [x19, 4]
-.LVL560:
-.L579:
-	.loc 2 519 0
+.L585:
 	mov	w0, 0
-	ldr	x25, [sp, 64]
-.LVL561:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL562:
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL563:
-.L578:
-	.cfi_restore_state
-	.loc 2 502 0
-	ldr	x0, [x20, 2544]
-.LVL564:
+.L584:
+	add	x23, x24, :lo12:.LANCHOR0
 	lsl	x19, x19, 4
-.LVL565:
-	.loc 2 501 0
-	add	x22, x20, 3344
-	.loc 2 504 0
+	add	x21, x23, 3400
 	mov	w2, 1
-	.loc 2 502 0
-	add	x0, x0, x19
-	.loc 2 504 0
 	mov	w1, w2
-	.loc 2 501 0
-	str	w24, [x20, 3348]
-	.loc 2 502 0
+	ldr	x0, [x23, 2568]
+	str	w25, [x23, 3404]
+	add	x0, x0, x19
 	ldr	x0, [x0, 8]
-	str	x0, [x20, 3352]
-	.loc 2 503 0
-	ldr	x0, [x20, 3384]
-	str	x0, [x20, 3360]
-	.loc 2 504 0
-	mov	x0, x22
+	str	x0, [x23, 3408]
+	ldr	x0, [x23, 3440]
+	str	x0, [x23, 3416]
+	mov	x0, x21
 	bl	FlashReadPages
-.LVL566:
-	.loc 2 505 0
-	ldr	x25, [x20, 3360]
-.LVL567:
-	.loc 2 507 0
-	ldrh	w0, [x25, 8]
-	cmp	w0, w23
-	beq	.L580
-	.loc 2 508 0
-	mov	w2, w24
-	mov	w1, w23
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	ldr	x26, [x23, 3416]
+	ldrh	w0, [x26, 8]
+	cmp	w0, w20
+	beq	.L586
+	mov	w2, w25
+	mov	w1, w20
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printk
-.LVL568:
-	.loc 2 509 0
-	ldr	x1, [x20, 3360]
+	ldr	x1, [x23, 3416]
 	mov	w3, 4
-	adrp	x0, .LC83
+	adrp	x0, .LC84
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC84
 	bl	rknand_print_hex
-.LVL569:
-	.loc 2 510 0
-	ldrh	w3, [x20, 116]
-	adrp	x0, .LC84
-	ldr	x1, [x20, 4072]
+	ldrh	w3, [x23, 140]
+	adrp	x0, .LC85
+	ldr	x1, [x22, -224]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC85
 	bl	rknand_print_hex
-.LVL570:
-.L580:
-	.loc 2 513 0
-	ldrh	w0, [x25, 8]
-	cmp	w0, w23
-	beq	.L581
-	.loc 2 513 0 is_stmt 0 discriminator 1
+.L586:
+	ldrh	w0, [x26, 8]
+	cmp	w0, w20
+	beq	.L587
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6868,238 +4006,127 @@ load_l2p_region:
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL571:
-.L581:
-	.loc 2 516 0 is_stmt 1
-	add	x21, x21, :lo12:.LANCHOR0
-	ldr	x0, [x21, 2544]
-	add	x0, x0, x19
-	str	wzr, [x0, 4]
-	.loc 2 517 0
-	ldr	x0, [x21, 2544]
-	strh	w23, [x0, x19]
-	.loc 2 518 0
-	b	.L579
-	.cfi_endproc
-.LFE192:
+.L587:
+	add	x0, x24, :lo12:.LANCHOR0
+	ldr	x1, [x0, 2568]
+	add	x1, x1, x19
+	str	wzr, [x1, 4]
+	ldr	x0, [x0, 2568]
+	strh	w20, [x0, x19]
+	b	.L585
 	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_free_no_use_map_blk
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB193:
-	.loc 2 522 0
-	.cfi_startproc
-.LVL572:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 522 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-.LVL573:
-	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL574:
-	.loc 2 531 0
 	lsl	w2, w2, 1
 	mov	x0, x21
-.LVL575:
 	bl	ftl_memset
-.LVL576:
-	.loc 2 532 0
 	mov	w0, 0
-.LVL577:
-.L584:
-	.loc 2 532 0 is_stmt 0 discriminator 1
+.L590:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L588
-	.loc 2 540 0 is_stmt 1
+	bhi	.L594
 	ldrh	w26, [x21]
-.LVL578:
-	.loc 2 544 0
 	adrp	x24, .LANCHOR0
 	add	x24, x24, :lo12:.LANCHOR0
-	.loc 2 541 0
 	mov	w25, 0
-.LVL579:
-	.loc 2 543 0
 	mov	w20, 0
-.LVL580:
-.L589:
-	.loc 2 543 0 is_stmt 0 discriminator 1
+.L595:
 	ldrh	w0, [x19, 10]
-.LVL581:
 	cmp	w0, w20
-	bhi	.L593
-	.loc 2 559 0 is_stmt 1
+	bhi	.L599
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL582:
 	ldp	x21, x22, [sp, 32]
-.LVL583:
 	ldp	x23, x24, [sp, 48]
-.LVL584:
 	ldp	x25, x26, [sp, 64]
-.LVL585:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL586:
-.L588:
-	.cfi_restore_state
-	.loc 2 533 0
+.L594:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-.LVL587:
-	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL588:
-.L585:
-	.loc 2 534 0 discriminator 1
+.L591:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L587
-	.loc 2 532 0 discriminator 2
+	bhi	.L593
 	add	w0, w0, 1
-.LVL589:
 	and	w0, w0, 65535
-.LVL590:
-	b	.L584
-.L587:
-	.loc 2 535 0
+	b	.L590
+.L593:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L586
-	.loc 2 536 0
+	bne	.L592
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L586:
-	.loc 2 534 0 discriminator 2
+.L592:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L585
-.LVL591:
-.L593:
-	.loc 2 544 0
+	b	.L591
+.L599:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L590
-	.loc 2 544 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x24, 84]
+	bne	.L596
+	ldrh	w0, [x24, 108]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L590
-	.loc 2 545 0 is_stmt 1
+	bcs	.L596
 	strh	w0, [x21, x22, lsl 1]
-.L590:
-	.loc 2 546 0
+.L596:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L591
+	bls	.L597
 	mov	w25, w20
 	mov	w26, w0
-.L591:
-	.loc 2 550 0
-	cbnz	w0, .L592
-	.loc 2 550 0 is_stmt 0 discriminator 1
+.L597:
+	cbnz	w0, .L598
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L592
-	.loc 2 552 0 is_stmt 1
+	cbz	w0, .L598
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL592:
-	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.LVL593:
-.L592:
-	.loc 2 543 0 discriminator 2
+.L598:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L589
-	.cfi_endproc
-.LFE193:
+	b	.L595
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB196:
-	.loc 2 632 0
-	.cfi_startproc
-.LVL594:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 632 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL595:
-	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL596:
 	cmp	w0, w1
-	bne	.L599
-	.loc 2 641 0
+	bne	.L605
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L600
-	.loc 2 641 0 is_stmt 0 discriminator 1
+	cbz	w0, .L606
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7107,911 +4134,508 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, 272
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL597:
-.L600:
-	.loc 2 642 0 is_stmt 1
+.L606:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL598:
 	strh	w0, [x20]
-	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 646 0
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-.LVL599:
-.L601:
-	.loc 2 677 0
+.L607:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
-.LVL600:
 	ldp	x19, x20, [sp, 16]
-.LVL601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL602:
-.L599:
-	.cfi_restore_state
-	.loc 2 650 0
+.L605:
 	ubfiz	x0, x0, 1, 16
-	.loc 2 651 0
 	adrp	x21, .LANCHOR0
-	.loc 2 656 0
 	ldr	w1, [x19, 48]
-	.loc 2 636 0
 	ldr	x23, [x19, 40]
-.LVL603:
-	.loc 2 650 0
 	ldrh	w22, [x20, x0]
-	.loc 2 651 0
 	add	x20, x21, :lo12:.LANCHOR0
-.LVL604:
 	ldrh	w0, [x19, 2]
 	orr	w0, w0, w22, lsl 10
-	str	w0, [x20, 3348]
-	.loc 2 652 0
-	ldr	x0, [x20, 3376]
-	str	x0, [x20, 3352]
-	.loc 2 653 0
-	ldr	x0, [x20, 3384]
-	str	x0, [x20, 3360]
-	.loc 2 656 0
+	str	w0, [x20, 3404]
+	ldr	x0, [x20, 3432]
+	str	x0, [x20, 3408]
+	ldr	x0, [x20, 3440]
+	str	x0, [x20, 3416]
 	str	w1, [x0, 4]
-	.loc 2 657 0
 	mov	w1, -1291
 	strh	w1, [x0, 8]
-	.loc 2 658 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 659 0
 	strh	w22, [x0, 2]
-	.loc 2 661 0
 	mov	w1, 255
-	ldrh	w2, [x20, 84]
-	ldr	x0, [x20, 3376]
+	ldrh	w2, [x20, 108]
+	ldr	x0, [x20, 3432]
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL605:
-	.loc 2 662 0
 	mov	w0, 0
-.LVL606:
-	.loc 2 663 0
 	mov	w1, 0
-.LVL607:
-.L602:
-	.loc 2 663 0 is_stmt 0 discriminator 1
+.L608:
 	ldrh	w2, [x19, 6]
 	cmp	w2, w1
-	bhi	.L604
-	.loc 2 670 0 is_stmt 1
+	bhi	.L610
 	add	x0, x21, :lo12:.LANCHOR0
-.LVL608:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-.LVL609:
-	add	x0, x0, 3344
+	add	x0, x0, 3400
 	bl	FlashProgPages
-.LVL610:
-	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL611:
-	.loc 2 676 0
-	b	.L601
-.LVL612:
-.L604:
-	.loc 2 664 0
+	b	.L607
+.L610:
 	ubfiz	x2, x1, 2, 16
 	ldr	w3, [x23, x2]
 	cmp	w22, w3, lsr 10
-	bne	.L603
-	.loc 2 665 0
+	bne	.L609
 	add	w0, w0, 1
-.LVL613:
-	.loc 2 666 0
-	ldr	x4, [x20, 3376]
-	.loc 2 665 0
+	ldr	x4, [x20, 3432]
 	and	w0, w0, 65535
-.LVL614:
-	.loc 2 666 0
 	ubfiz	x3, x0, 3, 16
 	str	w1, [x4, x3]
-	.loc 2 667 0
 	ldr	w4, [x23, x2]
-	ldr	x2, [x20, 3376]
+	ldr	x2, [x20, 3432]
 	add	x2, x2, x3
 	str	w4, [x2, 4]
-.L603:
-	.loc 2 663 0 discriminator 2
+.L609:
 	add	w1, w1, 1
-.LVL615:
 	and	w1, w1, 65535
-.LVL616:
-	b	.L602
-	.cfi_endproc
-.LFE196:
+	b	.L608
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB197:
-	.loc 2 680 0
-	.cfi_startproc
-.LVL617:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 2 686 0
 	adrp	x23, .LANCHOR0
-	.loc 2 703 0
 	add	x24, x23, :lo12:.LANCHOR0
-	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	.loc 2 699 0
 	adrp	x22, .LANCHOR1
-	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 680 0
 	mov	w26, w1
 	mov	x27, x2
 	mov	x25, x23
-	.loc 2 699 0
 	add	x22, x22, :lo12:.LANCHOR1
-	.loc 2 703 0
-	add	x20, x24, 3344
-	.loc 2 683 0
+	add	x20, x24, 3400
 	mov	w21, 0
-.LVL618:
-.L610:
-	.loc 2 686 0
+.L616:
 	add	x0, x23, :lo12:.LANCHOR0
-	ldr	w1, [x0, 2580]
+	ldr	w1, [x0, 2604]
 	add	w1, w1, 1
-	str	w1, [x0, 2580]
-	.loc 2 687 0
-	ldrh	w0, [x0, 84]
+	str	w1, [x0, 2604]
+	ldrh	w0, [x0, 108]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L611
-	.loc 2 687 0 is_stmt 0 discriminator 1
+	bge	.L617
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L612
-.L611:
-	.loc 2 688 0 is_stmt 1
+	bne	.L618
+.L617:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL619:
-.L612:
-	.loc 2 699 0
+.L618:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L613
-	.loc 2 699 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L619
 	adrp	x0, .LC1
 	mov	w2, 699
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL620:
-.L613:
-	.loc 2 700 0 is_stmt 1
+.L619:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L614
-	.loc 2 700 0 is_stmt 0 discriminator 1
+	bcc	.L620
 	adrp	x0, .LC1
 	mov	w2, 700
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL621:
-.L614:
-	.loc 2 701 0 is_stmt 1
+.L620:
 	ldrh	w1, [x19]
-	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 701 0
 	ldr	x0, [x19, 16]
 	ldrh	w28, [x0, x1, lsl 1]
-	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 703 0
 	ldrh	w0, [x19, 2]
-	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 703 0
 	orr	w0, w0, w28, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 705 0
-	ldr	x0, [x24, 3384]
+	ldr	x0, [x24, 3440]
 	str	x0, [x20, 16]
-	.loc 2 707 0
 	bl	ftl_memset
-.LVL622:
-	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL623:
-	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 713 0
 	mov	w2, w3
-	.loc 2 710 0
 	strh	w26, [x0, 8]
-	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 713 0
 	mov	w1, w3
-	.loc 2 712 0
 	strh	w28, [x0, 2]
-	.loc 2 713 0
 	mov	x0, x20
-.LVL624:
 	bl	FlashProgPages
-.LVL625:
-	.loc 2 714 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 716 0
 	ldr	w1, [x20]
 	cmn	w1, #1
-	bne	.L615
-	.loc 2 717 0
+	bne	.L621
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
-	.loc 2 718 0
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	add	w21, w21, 1
-.LVL626:
 	and	w21, w21, 65535
-.LVL627:
-	.loc 2 717 0
 	bl	printk
-.LVL628:
-	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L616
-	.loc 2 720 0
-	ldrh	w0, [x24, 84]
+	bhi	.L622
+	ldrh	w0, [x24, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L616:
-	.loc 2 722 0
+.L622:
 	cmp	w21, 3
-	bls	.L617
-	.loc 2 723 0
+	bls	.L623
 	add	x25, x25, :lo12:.LANCHOR0
-	adrp	x0, .LC86
+	adrp	x0, .LC87
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC86
-	ldr	w1, [x25, 3348]
+	add	x0, x0, :lo12:.LC87
+	ldr	w1, [x25, 3404]
 	bl	printk
-.LVL629:
-.L618:
-	b	.L618
-.L617:
-	.loc 2 727 0
+.L624:
+	b	.L624
+.L623:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L610
-.L627:
-	b	.L627
-.L615:
-	.loc 2 731 0
+	cbz	w0, .L616
+.L633:
+	b	.L633
+.L621:
 	cmp	w0, 1
-	beq	.L610
-	.loc 2 734 0
+	beq	.L616
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w26, uxtw 2]
-	.loc 2 736 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL630:
 	ldp	x21, x22, [sp, 32]
-.LVL631:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL632:
 	ldp	x27, x28, [sp, 80]
-.LVL633:
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE197:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB195:
-	.loc 2 586 0
-	.cfi_startproc
-.LVL634:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	adrp	x22, .LANCHOR0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL635:
-	.loc 2 591 0
 	ldr	x25, [x0, 40]
-.LVL636:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL637:
-	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L630
-	.loc 2 597 0
+	blt	.L636
 	ubfiz	x0, x0, 1, 16
 	ldrh	w24, [x20, x0]
-.LVL638:
-	.loc 2 598 0
-	cbz	w24, .L630
-	.loc 2 598 0 is_stmt 0 discriminator 1
+	cbz	w24, .L636
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L630
-	.loc 2 599 0 is_stmt 1
+	cbnz	w1, .L636
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 602 0
 	add	x0, x22, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 84]
+	ldrh	w0, [x0, 108]
 	cmp	w1, w0
-	bcc	.L631
-	.loc 2 603 0
+	bcc	.L637
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL639:
-.L631:
-	.loc 2 607 0 discriminator 1
+.L637:
 	add	x26, x22, :lo12:.LANCHOR0
-	.loc 2 613 0 discriminator 1
 	adrp	x23, .LANCHOR1
 	add	x23, x23, :lo12:.LANCHOR1
-	.loc 2 607 0 discriminator 1
-	add	x21, x26, 3344
-	.loc 2 613 0 discriminator 1
+	add	x21, x26, 3400
 	add	x23, x23, 320
-	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL640:
-.L632:
-	.loc 2 605 0 discriminator 1
+.L638:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L636
-	.loc 2 621 0
+	bhi	.L642
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.LVL641:
-	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL642:
-.L630:
-	.loc 2 626 0
+.L636:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x22, 84]
+	ldrh	w0, [x22, 108]
 	cmp	w1, w0
-	bcc	.L637
-	.loc 2 627 0
+	bcc	.L643
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL643:
-.L637:
-	.loc 2 629 0
+.L643:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL644:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL645:
 	ldp	x25, x26, [sp, 64]
-.LVL646:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL647:
-.L636:
-	.cfi_restore_state
-	.loc 2 606 0
+.L642:
 	ubfiz	x27, x20, 2, 16
 	ldr	w0, [x25, x27]
 	cmp	w24, w0, lsr 10
-	bne	.L633
-	.loc 2 608 0
-	ldr	x28, [x26, 3384]
-	.loc 2 611 0
+	bne	.L639
+	ldr	x28, [x26, 3440]
 	mov	w2, 1
-	.loc 2 607 0
-	ldr	x0, [x26, 3984]
-	.loc 2 611 0
+	ldr	x0, [x26, 4040]
 	mov	w1, w2
-	.loc 2 608 0
 	stp	x0, x28, [x21, 8]
-	.loc 2 609 0
 	ldr	w0, [x25, x27]
 	str	w0, [x21, 4]
-	.loc 2 611 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL648:
-	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L634
-	.loc 2 613 0 is_stmt 0 discriminator 1
+	beq	.L640
 	adrp	x0, .LC1
 	mov	w2, 613
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL649:
-.L634:
-	.loc 2 614 0 is_stmt 1
+.L640:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L635
-	.loc 2 615 0
+	bne	.L641
 	str	wzr, [x25, x27]
-.L633:
-	.loc 2 605 0 discriminator 2
+.L639:
 	add	w20, w20, 1
-.LVL650:
 	and	w20, w20, 65535
-.LVL651:
-	b	.L632
-.L635:
-	.loc 2 617 0
+	b	.L638
+.L641:
 	ldr	x2, [x21, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL652:
-	b	.L633
-	.cfi_endproc
-.LFE195:
+	b	.L639
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
 	.global	flush_l2p_region
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB198:
-	.loc 2 739 0
-	.cfi_startproc
-.LVL653:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 742 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x20, x0, 4, 16
-	ldr	x0, [x19, 2544]
-.LVL654:
+	ldr	x0, [x19, 2568]
 	add	x1, x0, x20
-	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #248
+	sub	x0, x0, #192
 	bl	FtlMapWritePage
-.LVL655:
-	.loc 2 744 0
-	ldr	x0, [x19, 2544]
+	ldr	x0, [x19, 2568]
 	add	x0, x0, x20
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 746 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE198:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	2
 	.global	log2phys
 	.type	log2phys, %function
 log2phys:
-.LFB201:
-	.loc 2 802 0
-	.cfi_startproc
-.LVL656:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
 	mov	w23, w2
-	.loc 2 805 0
 	adrp	x24, .LANCHOR0
 	add	x2, x24, :lo12:.LANCHOR0
-.LVL657:
-	.loc 2 802 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	mov	x22, x1
 	stp	x19, x20, [sp, 16]
 	str	x25, [sp, 64]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 25, -16
-	.loc 2 805 0
-	ldrh	w19, [x2, 88]
+	ldrh	w19, [x2, 112]
 	add	w1, w19, 7
-.LVL658:
-	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 805 0
 	lsr	w21, w0, w1
 	and	w21, w21, 65535
-.LVL659:
-	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 808 0
-	ldr	w1, [x2, 2560]
-	.loc 2 806 0
+	ldr	w1, [x2, 2584]
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	.loc 2 808 0
 	cmp	w0, w1
-	.loc 2 806 0
 	and	x19, x19, 65535
-	.loc 2 808 0
-	bcc	.L645
-	.loc 2 808 0 is_stmt 0 discriminator 1
+	bcc	.L651
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL660:
 	mov	w2, 808
 	add	x1, x1, 336
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL661:
-.L645:
-	.loc 2 810 0 is_stmt 1
+.L651:
 	add	x0, x24, :lo12:.LANCHOR0
-.LVL662:
-	ldrh	w1, [x0, 118]
-	.loc 2 811 0
-	ldr	x2, [x0, 2544]
-	.loc 2 810 0
+	ldrh	w1, [x0, 142]
+	ldr	x2, [x0, 2568]
 	mov	x0, 0
-.LVL663:
-.L646:
+.L652:
 	and	x20, x0, 65535
-.LVL664:
-	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L651
-	.loc 2 825 0 is_stmt 1
+	bcc	.L657
 	bl	select_l2p_ram_region
-.LVL665:
 	and	x20, x0, 65535
-.LVL666:
-	.loc 2 826 0
 	add	x2, x24, :lo12:.LANCHOR0
-.LVL667:
 	ubfiz	x1, x20, 4, 16
-	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 826 0
-	ldr	x2, [x2, 2544]
+	ldr	x2, [x2, 2568]
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L652
-	.loc 2 826 0 is_stmt 0 discriminator 1
+	beq	.L658
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L652
-	.loc 2 827 0 is_stmt 1
+	tbz	w1, #31, .L658
 	bl	flush_l2p_region
-.LVL668:
-.L652:
-	.loc 2 830 0
+.L658:
 	mov	w1, w25
 	mov	w0, w21
 	bl	load_l2p_region
-.LVL669:
-	.loc 2 831 0
-	b	.L647
-.L651:
+	b	.L653
+.L657:
 	add	x0, x0, 1
-	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w21
-	bne	.L646
-.L647:
-	.loc 2 813 0
-	cbnz	w23, .L648
-	.loc 2 814 0
+	bne	.L652
+.L653:
+	cbnz	w23, .L654
 	add	x0, x24, :lo12:.LANCHOR0
-	ldr	x0, [x0, 2544]
+	ldr	x0, [x0, 2568]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
-.LVL670:
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x22]
-.L649:
-	.loc 2 820 0
+.L655:
 	add	x24, x24, :lo12:.LANCHOR0
-	ldr	x0, [x24, 2544]
+	ldr	x0, [x24, 2568]
 	add	x20, x0, x20, lsl 4
-.LVL671:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L654
-	.loc 2 821 0
+	beq	.L660
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L654:
-	.loc 2 832 0
+.L660:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL672:
 	ldp	x21, x22, [sp, 32]
-.LVL673:
 	ldp	x23, x24, [sp, 48]
-.LVL674:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL675:
-.L648:
-	.cfi_restore_state
-	.loc 2 816 0
+.L654:
 	add	x2, x24, :lo12:.LANCHOR0
 	lsl	x0, x20, 4
 	mov	x1, x0
 	ldr	w4, [x22]
-	ldr	x3, [x2, 2544]
+	ldr	x3, [x2, 2568]
 	add	x0, x3, x0
 	ldr	x0, [x0, 8]
-.LVL676:
 	str	w4, [x0, x19, lsl 2]
-	.loc 2 818 0
-	strh	w21, [x2, 2552]
-	.loc 2 817 0
-	ldr	x0, [x2, 2544]
+	strh	w21, [x2, 2576]
+	ldr	x0, [x2, 2568]
 	add	x0, x0, x1
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	b	.L649
-	.cfi_endproc
-.LFE201:
+	b	.L655
 	.size	log2phys, .-log2phys
 	.align	2
 	.global	FtlReUsePrevPpa
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB219:
-	.loc 2 1677 0
-	.cfi_startproc
-.LVL677:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	mov	w21, w0
 	stp	x19, x20, [sp, 16]
-	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL678:
-	.loc 2 1677 0
 	str	w1, [x29, 76]
-	.loc 2 1680 0
 	adrp	x22, .LANCHOR0
-	.loc 2 1677 0
 	str	x23, [sp, 48]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 23, -32
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL679:
-	.loc 2 1680 0
 	add	x2, x22, :lo12:.LANCHOR0
-	.loc 2 1678 0
 	and	w0, w0, 65535
-.LVL680:
-	.loc 2 1680 0
 	ubfiz	x20, x0, 1, 16
-	ldr	x3, [x2, 2352]
+	ldr	x3, [x2, 2376]
 	ldrh	w1, [x3, x20]
-.LVL681:
-	cbnz	w1, .L660
-	.loc 2 1681 0
-	ldr	x19, [x2, 2384]
-	cbz	x19, .L661
-.LBB247:
-	.loc 2 1684 0
-	ldrh	w3, [x2, 2392]
-.LVL682:
-	.loc 2 1685 0
+	cbnz	w1, .L666
+	ldr	x19, [x2, 2408]
+	cbz	x19, .L667
+	ldrh	w3, [x2, 2416]
 	mov	x4, -6148914691236517206
-	ldr	x2, [x2, 2336]
+	ldr	x2, [x2, 2360]
 	movk	x4, 0xaaab, lsl 0
-	.loc 2 1693 0
 	mov	w5, 65535
-	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x4
-	.loc 2 1693 0
 	mov	w4, 6
-	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL683:
-.L662:
-	.loc 2 1686 0 discriminator 1
+.L668:
 	cmp	w1, w3
-	beq	.L661
-	.loc 2 1687 0
+	beq	.L667
 	cmp	w19, w0
-	bne	.L663
-	.loc 2 1688 0
+	bne	.L669
 	add	x23, x22, :lo12:.LANCHOR0
 	mov	w1, w19
-.LVL684:
-	add	x0, x23, 2384
-.LVL685:
+	add	x0, x23, 2408
 	bl	List_remove_node
-.LVL686:
-	ldrh	w0, [x23, 2392]
-	cbnz	w0, .L664
-	.loc 2 1688 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x23, 2416]
+	cbnz	w0, .L670
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -8019,1056 +4643,651 @@ FtlReUsePrevPpa:
 	add	x1, x1, 352
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL687:
-.L664:
-	.loc 2 1688 0 discriminator 3
+.L670:
 	add	x22, x22, :lo12:.LANCHOR0
-	ldrh	w0, [x22, 2392]
+	ldrh	w0, [x22, 2416]
 	sub	w0, w0, #1
-	strh	w0, [x22, 2392]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
+	strh	w0, [x22, 2416]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL688:
-	.loc 2 1690 0 discriminator 3
-	ldr	x1, [x22, 2352]
+	ldr	x1, [x22, 2376]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL689:
-.L661:
-.LBE247:
-	.loc 2 1701 0
+.L667:
 	add	x1, x29, 76
-.LVL690:
 	mov	w2, 1
 	mov	w0, w21
-.LVL691:
 	bl	log2phys
-.LVL692:
-	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
-.LVL693:
 	ldp	x21, x22, [sp, 32]
-.LVL694:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL695:
-.L663:
-	.cfi_restore_state
-.LBB248:
-	.loc 2 1693 0
+.L669:
 	umull	x19, w19, w4
-.LVL696:
 	ldrh	w19, [x2, x19]
-.LVL697:
 	cmp	w19, w5
-	beq	.L661
-	.loc 2 1686 0 discriminator 2
+	beq	.L667
 	add	w1, w1, 1
-.LVL698:
 	and	w1, w1, 65535
-.LVL699:
-	b	.L662
-.LVL700:
-.L660:
-.LBE248:
-	.loc 2 1699 0
+	b	.L668
+.L666:
 	add	w1, w1, 1
-.LVL701:
 	strh	w1, [x3, x20]
-	b	.L661
-	.cfi_endproc
-.LFE219:
+	b	.L667
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	2
 	.global	ftl_scan_all_data
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB230:
-	.loc 2 2325 0
-	.cfi_startproc
 	sub	sp, sp, #96
-	.cfi_def_cfa_offset 96
-	.loc 2 2330 0
-	adrp	x0, .LC87
+	adrp	x0, .LC88
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC87
-	.loc 2 2325 0
+	add	x0, x0, :lo12:.LC88
 	stp	x29, x30, [sp, 16]
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 16
-	.cfi_def_cfa 29, 80
 	stp	x21, x22, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 2331 0
 	adrp	x22, .LANCHOR0
-	.loc 2 2336 0
 	add	x21, x22, :lo12:.LANCHOR0
-	.loc 2 2325 0
 	stp	x19, x20, [sp, 32]
 	str	x23, [sp, 64]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 23, -32
-	.loc 2 2331 0
 	mov	w20, 0
-.LVL702:
-	.loc 2 2336 0
-	add	x19, x21, 3344
-	.loc 2 2330 0
+	add	x19, x21, 3400
 	bl	printk
-.LVL703:
-.L671:
-	.loc 2 2331 0 discriminator 1
+.L677:
 	add	x0, x22, :lo12:.LANCHOR0
-	ldr	w0, [x0, 2560]
+	ldr	w0, [x0, 2584]
 	cmp	w20, w0
-	bcc	.L677
-	.loc 2 2353 0
+	bcc	.L683
 	ldp	x19, x20, [sp, 32]
-.LVL704:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
-	.cfi_remember_state
-	.cfi_restore 29
-	.cfi_restore 30
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL705:
-.L677:
-	.cfi_restore_state
-	.loc 2 2332 0
+.L683:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w20
 	bl	log2phys
-.LVL706:
-	.loc 2 2333 0
 	tst	x20, 2047
-	bne	.L672
-	.loc 2 2334 0
+	bne	.L678
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC88
+	adrp	x0, .LC89
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC88
+	add	x0, x0, :lo12:.LC89
 	bl	printk
-.LVL707:
-.L672:
-	.loc 2 2335 0
+.L678:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L674
-	.loc 2 2339 0
-	ldr	x23, [x21, 3384]
-	.loc 2 2342 0
+	beq	.L680
+	ldr	x23, [x21, 3440]
 	mov	w2, 0
-	.loc 2 2336 0
 	stp	wzr, w0, [x19]
-	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2338 0
-	ldr	x0, [x21, 3376]
+	ldr	x0, [x21, 3432]
 	str	x0, [x19, 8]
-	.loc 2 2342 0
 	mov	x0, x19
-	.loc 2 2339 0
 	str	x23, [x19, 16]
-	.loc 2 2337 0
 	str	w20, [x19, 24]
-	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL708:
-	.loc 2 2343 0
 	ldr	w0, [x19]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L675
-	.loc 2 2344 0
+	beq	.L681
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L674
-.L675:
-	.loc 2 2347 0
+	beq	.L680
+.L681:
 	ldp	x1, x0, [x19, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC89
+	adrp	x0, .LC90
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC89
+	add	x0, x0, :lo12:.LC90
 	ldr	w2, [x19, 4]
 	mov	w1, w20
 	bl	printk
-.LVL709:
-.L674:
-	.loc 2 2331 0 discriminator 2
+.L680:
 	add	w20, w20, 1
-	b	.L671
-	.cfi_endproc
-.LFE230:
+	b	.L677
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB257:
-	.loc 5 419 0
-	.cfi_startproc
-	.loc 5 425 0
 	adrp	x0, .LANCHOR0
 	add	x1, x0, :lo12:.LANCHOR0
-	add	x2, x1, 2696
+	add	x2, x1, 2720
 	ldr	w3, [x2, 80]
-	cbz	w3, .L680
-	.loc 5 426 0
-	ldr	w0, [x1, 2560]
+	cbz	w3, .L686
+	ldr	w0, [x1, 2584]
 	ldr	w3, [x2, 84]
 	cmp	w3, w0
-	bcs	.L681
-	.loc 5 419 0
+	bcs	.L687
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-.LBB254:
-.LBB255:
-	.loc 5 428 0
 	mov	x19, x1
-.LBE255:
-.LBE254:
 	mov	w20, 2048
-	.loc 5 419 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -128
-.LVL710:
-.L686:
-.LBB260:
-.LBB257:
-	.loc 5 428 0
-	ldr	w1, [x19, 2560]
-	ldr	w0, [x19, 2780]
+.L692:
+	ldr	w1, [x19, 2584]
+	ldr	w0, [x19, 2804]
 	cmp	w0, w1
-	bcs	.L683
-	.loc 5 430 0
+	bcs	.L689
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL711:
-	.loc 5 431 0
-	ldr	w0, [x19, 2780]
-	.loc 5 432 0
+	ldr	w0, [x19, 2804]
 	ldr	w1, [x29, 60]
-	.loc 5 431 0
 	add	w0, w0, 1
-	str	w0, [x19, 2780]
-	.loc 5 432 0
+	str	w0, [x19, 2804]
 	cmn	w1, #1
-	beq	.L684
-.LBB256:
-	.loc 5 435 0
+	beq	.L690
 	str	w0, [x29, 88]
-	.loc 5 436 0
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
 	str	x0, [x29, 72]
-	.loc 5 437 0
 	add	x0, x29, 96
 	str	x0, [x29, 80]
-	.loc 5 438 0
 	add	x0, x29, 160
-	.loc 5 434 0
 	str	w1, [x29, 68]
-	.loc 5 439 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 5 438 0
 	str	wzr, [x0, -96]!
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL712:
-	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L683
-	.loc 5 442 0
+	bne	.L689
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL713:
 	bl	FtlGcRefreshBlock
-.LVL714:
-.L683:
-.LBE256:
-.LBE257:
-.LBE260:
-	.loc 5 466 0
+.L689:
 	ldp	x19, x20, [sp, 16]
-.LBB261:
-.LBB258:
 	mov	w0, -1
-.LBE258:
-.LBE261:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L684:
-	.cfi_restore_state
-.LBB262:
-.LBB259:
-	.loc 5 427 0
+.L690:
 	subs	w20, w20, #1
-	bne	.L686
-	b	.L683
-.LVL715:
-.L681:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
-.LBE259:
-.LBE262:
-	.loc 5 451 0
-	ldr	w0, [x1, 2564]
-	.loc 5 449 0
+	bne	.L692
+	b	.L689
+.L687:
+	ldr	w0, [x1, 2588]
 	stp	w0, wzr, [x2, 76]
-	.loc 5 450 0
 	str	wzr, [x2, 84]
-.L690:
-	.loc 5 420 0
+.L696:
 	mov	w0, 0
-	.loc 5 465 0
 	ret
-.L680:
-.LBB263:
-	.loc 5 456 0
-	ldr	w3, [x1, 2564]
+.L686:
+	ldr	w3, [x1, 2588]
 	ldr	w5, [x2, 76]
 	add	w2, w3, 1048576
 	cmp	w5, w2
-	bhi	.L689
-	.loc 5 454 0
-	ldr	w2, [x1, 2620]
+	bhi	.L695
+	ldr	w2, [x1, 2644]
 	lsr	w4, w2, 10
 	mov	w2, 33554432
 	asr	w2, w2, w4
-.LVL716:
-	.loc 5 457 0
 	add	w2, w2, w5
-.LVL717:
 	cmp	w3, w2
-	bhi	.L689
-	.loc 5 458 0
-	ldrb	w1, [x1, 2316]
-	cbnz	w1, .L690
-.L689:
-	.loc 5 460 0
+	bhi	.L695
+	ldrb	w1, [x1, 2340]
+	cbnz	w1, .L696
+.L695:
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 1
-	.loc 5 462 0
-	str	w3, [x0, 2772]
-	.loc 5 460 0
-	str	w1, [x0, 2776]
-	.loc 5 461 0
-	str	wzr, [x0, 2780]
-	b	.L690
-.LBE263:
-	.cfi_endproc
-.LFE257:
+	str	w3, [x0, 2796]
+	str	w1, [x0, 2800]
+	str	wzr, [x0, 2804]
+	b	.L696
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB206:
-	.loc 2 946 0
-	.cfi_startproc
-.LVL718:
-	.loc 2 952 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L704
-	.loc 2 946 0
+	cbz	w1, .L710
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 2 956 0
 	adrp	x1, .LANCHOR0
 	add	x2, x1, :lo12:.LANCHOR0
-	.loc 2 946 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 956 0
-	add	x0, x2, 3344
-.LVL719:
+	add	x0, x2, 3400
 	mov	x21, x1
-	.loc 2 948 0
 	ldrh	w20, [x19, 6]
-	.loc 2 957 0
-	ldr	x4, [x2, 3384]
-	.loc 2 948 0
+	ldr	x4, [x2, 3440]
 	sub	w20, w20, #1
-	.loc 2 956 0
-	ldr	x3, [x2, 3984]
-	.loc 2 948 0
+	ldr	x3, [x2, 4040]
 	and	w20, w20, 65535
-.LVL720:
-	.loc 2 949 0
 	ldr	x5, [x19, 40]
-.LVL721:
-	.loc 2 957 0
 	stp	x3, x4, [x0, 8]
-	.loc 2 979 0
 	ubfiz	x4, x20, 2, 16
-	.loc 2 954 0
 	str	wzr, [x19, 56]
-	.loc 2 979 0
 	ldr	w4, [x5, x4]
-.LVL722:
-	.loc 2 980 0
 	str	w4, [x0, 4]
-	.loc 2 981 0
-	cbz	w4, .L698
-	.loc 2 983 0
+	cbz	w4, .L704
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL723:
-.L699:
-	.loc 2 990 0
+.L705:
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	x0, x19
-	ldr	x2, [x1, 3352]
+	ldr	x2, [x1, 3408]
 	mov	w1, w20
 	bl	FtlMapWritePage
-.LVL724:
-	.loc 2 992 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL725:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL726:
-.L698:
-	.cfi_restore_state
-	.loc 2 987 0
-	ldrh	w2, [x2, 90]
+.L704:
+	ldrh	w2, [x2, 114]
 	mov	w1, 255
 	mov	x0, x3
 	bl	ftl_memset
-.LVL727:
-	b	.L699
-.LVL728:
-.L704:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
+	b	.L705
+.L710:
 	ret
-	.cfi_endproc
-.LFE206:
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
 	.global	FtlScanSysBlk
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB209:
-	.loc 2 1144 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1144 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 2 1150 0
 	adrp	x20, .LANCHOR3
-	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1150 0
-	add	x0, x20, :lo12:.LANCHOR3
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 1151 0
-	adrp	x21, .LANCHOR0
-	add	x19, x21, :lo12:.LANCHOR0
-	.loc 2 1144 0
+	add	x21, x20, :lo12:.LANCHOR3
 	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 2 1211 0
-	adrp	x25, .LANCHOR1
-	.loc 2 1144 0
+	add	x19, x22, :lo12:.LANCHOR0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 1211 0
+	adrp	x25, .LANCHOR1
+	strh	wzr, [x21, -128]
 	add	x25, x25, :lo12:.LANCHOR1
-	.loc 2 1150 0
-	strh	wzr, [x0, -184]
-	.loc 2 1211 0
+	ldr	x0, [x21, -216]
 	add	x25, x25, 368
-	.loc 2 1152 0
-	ldr	x0, [x19, 4080]
-	ldr	w2, [x19, 108]
-	.loc 2 1151 0
-	strh	wzr, [x19, 124]
-	.loc 2 1152 0
+	ldr	w2, [x19, 132]
+	strh	wzr, [x19, 148]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL729:
-	.loc 2 1153 0
-	ldr	x0, [x19, 4032]
+	ldr	x0, [x19, 4088]
 	mov	w1, 0
-	ldr	w2, [x19, 108]
+	ldr	w2, [x19, 132]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL730:
-	.loc 2 1154 0
-	ldr	x0, [x19, 4056]
+	ldr	x0, [x21, -240]
 	mov	w1, 0
-	ldrh	w2, [x19, 100]
+	ldrh	w2, [x19, 124]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL731:
-	.loc 2 1155 0
-	ldr	x0, [x19, 128]
+	ldr	x0, [x19, 152]
 	mov	w1, 0
-	ldrh	w2, [x19, 100]
+	ldrh	w2, [x19, 124]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL732:
-	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x19, 2632
+	add	x0, x19, 2656
 	bl	ftl_memset
-.LVL733:
-	.loc 2 1158 0
-	ldrh	w24, [x19, 20]
-.LVL734:
-.L708:
-	.loc 2 1158 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x19, 22]
+	ldrh	w24, [x19, 44]
+.L714:
+	ldrh	w0, [x19, 46]
 	cmp	w0, w24
-	bls	.L748
-	.loc 2 1162 0 is_stmt 1 discriminator 1
-	ldrh	w9, [x19, 12]
-	.loc 2 1169 0 discriminator 1
+	bls	.L754
+	ldrh	w9, [x19, 36]
 	mov	x5, 0
-	ldrh	w8, [x19, 92]
-	mov	w22, 0
-	.loc 2 1164 0 discriminator 1
-	add	x7, x19, 40
-	.loc 2 1169 0 discriminator 1
+	ldrh	w8, [x19, 116]
+	mov	w21, 0
+	add	x7, x19, 64
 	mov	w6, 4
-	b	.L749
-.L710:
-	.loc 2 1164 0
+	b	.L755
+.L716:
 	ldrb	w0, [x7, x5]
 	mov	w1, w24
 	bl	V2P_block
-.LVL735:
 	and	w4, w0, 65535
-	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL736:
-	cbnz	w0, .L709
-	.loc 2 1167 0
-	ldr	x0, [x19, 3960]
-	ubfiz	x2, x22, 5, 16
+	cbnz	w0, .L715
+	ldr	x0, [x19, 4016]
+	ubfiz	x2, x21, 5, 16
 	lsl	w4, w4, 10
 	add	x0, x0, x2
 	str	w4, [x0, 4]
-	.loc 2 1168 0
-	ldr	x1, [x19, 3960]
-	ldr	x0, [x19, 3240]
+	ldr	x1, [x19, 4016]
+	ldr	x0, [x19, 3264]
 	add	x1, x1, x2
-	.loc 2 1169 0
-	ldr	x2, [x19, 3248]
-	.loc 2 1168 0
+	ldr	x2, [x19, 3272]
 	str	x0, [x1, 8]
-	.loc 2 1169 0
-	mul	w0, w22, w8
-	.loc 2 1170 0
-	add	w22, w22, 1
-.LVL737:
-	and	w22, w22, 65535
-.LVL738:
-	.loc 2 1169 0
+	mul	w0, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
 	sdiv	w0, w0, w6
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L709:
+.L715:
 	add	x5, x5, 1
-.L749:
-	.loc 2 1162 0 discriminator 1
+.L755:
 	cmp	w9, w5, uxth
-	bhi	.L710
-	.loc 2 1173 0
-	cbnz	w22, .L711
-.L747:
-	.loc 2 1158 0
+	bhi	.L716
+	cbnz	w21, .L717
+.L753:
 	add	w24, w24, 1
-.LVL739:
 	and	w24, w24, 65535
-.LVL740:
-	b	.L708
-.L711:
-	.loc 2 1176 0
-	ldr	x0, [x19, 3960]
-	mov	w1, w22
+	b	.L714
+.L717:
+	ldr	x0, [x19, 4016]
+	mov	w1, w21
 	mov	w2, 1
-	ubfiz	x22, x22, 5, 16
-.LVL741:
+	ubfiz	x21, x21, 5, 16
 	mov	x23, 0
-	.loc 2 1297 0
-	add	x28, x19, 2632
-	.loc 2 1176 0
+	add	x28, x19, 2656
 	bl	FlashReadPages
-.LVL742:
-.L746:
-	.loc 2 1178 0
-	ldr	x0, [x19, 3960]
+.L752:
+	ldr	x0, [x19, 4016]
 	add	x1, x0, x23
-	.loc 2 1181 0
 	ldr	w0, [x0, x23]
-	.loc 2 1178 0
 	ldr	w26, [x1, 4]
-	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1178 0
 	ubfx	x26, x26, 10, 16
-	.loc 2 1181 0
-	bne	.L714
+	bne	.L720
 	mov	w3, 16
-	.loc 2 1185 0
 	mov	w4, 65535
-.L716:
-	.loc 2 1183 0
-	ldr	x0, [x19, 3960]
-	.loc 2 1184 0
+.L722:
+	ldr	x0, [x19, 4016]
 	mov	w2, 1
 	stp	w4, w3, [x29, 104]
-	.loc 2 1183 0
 	add	x0, x0, x23
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1184 0
 	mov	w1, w2
-	ldr	x0, [x19, 3960]
+	ldr	x0, [x19, 4016]
 	add	x0, x0, x23
 	bl	FlashReadPages
-.LVL743:
-	.loc 2 1185 0
 	ldp	w4, w3, [x29, 104]
 	ldrh	w0, [x27]
 	cmp	w0, w4
-	.loc 2 1186 0
-	ldr	x0, [x19, 3960]
-	.loc 2 1185 0
-	bne	.L713
-	.loc 2 1186 0
+	ldr	x0, [x19, 4016]
+	bne	.L719
 	mov	w1, -1
 	str	w1, [x0, x23]
-	.loc 2 1194 0
-	ldr	x0, [x19, 3960]
+	ldr	x0, [x19, 4016]
 	ldr	w0, [x0, x23]
 	cmp	w0, w1
-	bne	.L714
-.L715:
-	.loc 2 1336 0
+	bne	.L720
+.L721:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL744:
-	b	.L719
-.L713:
-	.loc 2 1188 0
+	b	.L725
+.L719:
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	bne	.L714
+	bne	.L720
 	sub	w3, w3, #1
-	.loc 2 1182 0 discriminator 2
 	ands	w3, w3, 65535
-	bne	.L716
-	b	.L715
-.L714:
-	.loc 2 1196 0
-	ldr	w1, [x19, 2596]
+	bne	.L722
+	b	.L721
+.L720:
+	ldr	w1, [x19, 2620]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L717
-	.loc 2 1196 0 is_stmt 0 discriminator 1
+	beq	.L723
 	cmp	w1, w0
-	bhi	.L718
-.L717:
-	.loc 2 1198 0 is_stmt 1
+	bhi	.L724
+.L723:
 	cmn	w0, #1
-	beq	.L718
-	.loc 2 1201 0
+	beq	.L724
 	add	w1, w0, 1
-	str	w1, [x19, 2596]
-.L718:
-	.loc 2 1206 0
+	str	w1, [x19, 2620]
+.L724:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L720
-	bhi	.L721
+	beq	.L726
+	bhi	.L727
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L722
-.L719:
+	beq	.L728
+.L725:
 	add	x23, x23, 32
-	.loc 2 1177 0 discriminator 2
-	cmp	x22, x23
-	bne	.L746
-	b	.L747
-.L721:
-	.loc 2 1206 0
+	cmp	x21, x23
+	bne	.L752
+	b	.L753
+.L727:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L723
+	beq	.L729
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L715
-	b	.L719
-.L723:
-	.loc 2 1211 0
+	beq	.L721
+	b	.L725
+.L729:
 	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w1, [x0, -184]
-	ldr	w0, [x19, 108]
+	ldrh	w1, [x0, -128]
+	ldr	w0, [x19, 132]
 	cmp	w1, w0
-	bls	.L725
-	.loc 2 1211 0 is_stmt 0 discriminator 1
+	bls	.L731
 	adrp	x0, .LC1
 	mov	w2, 1211
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL745:
-.L725:
-	.loc 2 1212 0 is_stmt 1
-	add	x1, x20, :lo12:.LANCHOR3
-	ldr	w3, [x19, 108]
-	.loc 2 1214 0
-	ldr	x4, [x19, 4080]
-	.loc 2 1212 0
+.L731:
+	add	x4, x20, :lo12:.LANCHOR3
+	ldr	w3, [x19, 132]
 	and	w2, w3, 65535
-	ldrh	w1, [x1, -184]
+	ldrh	w1, [x4, -128]
 	sub	w0, w2, #1
+	ldr	x4, [x4, -216]
 	sxth	x0, w0
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	sxth	w2, w2
-.L726:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
-	cmp	w0, w2
-	bgt	.L732
-	.loc 2 1235 0 is_stmt 1
-	tbz	w0, #31, .L766
-	b	.L719
 .L732:
-	.loc 2 1214 0
+	cmp	w0, w2
+	bgt	.L738
+	tbz	w0, #31, .L772
+	b	.L725
+.L738:
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L727
-	.loc 2 1216 0
+	bls	.L733
 	ldr	w2, [x4]
-	cbnz	w2, .L728
-	.loc 2 1216 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L734
 	cmp	w3, w1
-	beq	.L728
-	.loc 2 1221 0 is_stmt 1
+	beq	.L734
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
-	strh	w1, [x2, -184]
-.L728:
+	strh	w1, [x2, -128]
+.L734:
+	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L729:
-	.loc 2 1224 0 discriminator 1
+.L735:
 	cmp	w1, w0
-	bne	.L730
-	.loc 2 1229 0
-	ldr	x1, [x19, 4080]
-	ldr	w2, [x27, 4]
-	str	w2, [x1, x6]
-	.loc 2 1230 0
-	ldr	x1, [x19, 4032]
-	strh	w26, [x1, x5, lsl 1]
-	.loc 2 1235 0
-	tbnz	w0, #31, .L719
-	.loc 2 1242 0
+	bne	.L736
 	add	x1, x20, :lo12:.LANCHOR3
-	ldr	w2, [x19, 108]
-	ldrh	w1, [x1, -184]
+	ldr	w3, [x27, 4]
+	ldr	x2, [x1, -216]
+	str	w3, [x2, x6]
+	ldr	x2, [x19, 4088]
+	strh	w26, [x2, x5, lsl 1]
+	tbnz	w0, #31, .L725
+	ldrh	w1, [x1, -128]
+	ldr	w2, [x19, 132]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L719
-.L766:
-	.loc 2 1244 0
+	bgt	.L725
+.L772:
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
-	strh	w1, [x2, -184]
-	.loc 2 1245 0
-	ldr	x1, [x19, 4080]
-	ldr	w2, [x27, 4]
-	str	w2, [x1, x0, lsl 2]
-	.loc 2 1246 0
-	ldr	x1, [x19, 4032]
-.L784:
-	.loc 2 1290 0
+	ldr	w3, [x27, 4]
+	strh	w1, [x2, -128]
+	ldr	x1, [x2, -216]
+	str	w3, [x1, x0, lsl 2]
+	ldr	x1, [x19, 4088]
+.L790:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L719
-.L730:
-	.loc 2 1226 0 discriminator 3
-	ldr	x4, [x19, 4080]
+	b	.L725
+.L736:
+	ldr	x4, [x7, -216]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
-	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1226 0 discriminator 3
-	add	x7, x4, x3
+	add	x8, x4, x3
 	add	w1, w1, 1
 	sxth	w1, w1
-	ldr	w7, [x7, 4]
-	str	w7, [x4, x3]
-	.loc 2 1227 0 discriminator 3
-	ldr	x3, [x19, 4032]
+	ldr	w8, [x8, 4]
+	str	w8, [x4, x3]
+	ldr	x3, [x19, 4088]
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L729
-.L727:
+	b	.L735
+.L733:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L726
-.L722:
-	.loc 2 1252 0
-	ldrh	w1, [x19, 124]
-	ldrh	w0, [x19, 100]
+	b	.L732
+.L728:
+	ldrh	w1, [x19, 148]
+	ldrh	w0, [x19, 124]
 	cmp	w1, w0
-	bls	.L735
-	.loc 2 1252 0 is_stmt 0 discriminator 1
+	bls	.L741
 	adrp	x0, .LC1
 	mov	w2, 1252
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL746:
-.L735:
-	.loc 2 1253 0 is_stmt 1
-	ldrh	w3, [x19, 100]
-	ldrh	w1, [x19, 124]
+.L741:
+	add	x4, x20, :lo12:.LANCHOR3
+	ldrh	w3, [x19, 124]
+	ldrh	w1, [x19, 148]
 	sub	w2, w3, #1
-	.loc 2 1255 0
-	ldr	x4, [x19, 4056]
-	.loc 2 1253 0
+	ldr	x4, [x4, -240]
 	sxth	x0, w2
 	sub	w2, w2, w1
-.L736:
-	.loc 2 1253 0 is_stmt 0 discriminator 1
+.L742:
 	cmp	w0, w2
-	ble	.L741
-	.loc 2 1255 0 is_stmt 1
+	ble	.L747
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L737
-	.loc 2 1257 0
+	bls	.L743
 	ldr	w2, [x4]
-	cbnz	w2, .L738
-	.loc 2 1257 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L744
 	cmp	w3, w1
-	beq	.L738
-	.loc 2 1265 0 is_stmt 1
+	beq	.L744
 	add	w1, w1, 1
-	strh	w1, [x19, 124]
-.L738:
+	strh	w1, [x19, 148]
+.L744:
+	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L739:
-	.loc 2 1267 0 discriminator 1
+.L745:
 	cmp	w1, w0
-	bne	.L740
-	.loc 2 1272 0
-	ldr	x1, [x19, 4056]
+	bne	.L746
+	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w2, [x27, 4]
+	ldr	x1, [x1, -240]
 	str	w2, [x1, x6]
-	.loc 2 1273 0
-	ldr	x1, [x19, 128]
+	ldr	x1, [x19, 152]
 	strh	w26, [x1, x5, lsl 1]
-.L741:
-	.loc 2 1278 0
-	tbnz	w0, #31, .L719
-	.loc 2 1286 0
-	ldrh	w1, [x19, 100]
-	ldrh	w2, [x19, 124]
+.L747:
+	tbnz	w0, #31, .L725
+	ldrh	w1, [x19, 124]
+	ldrh	w2, [x19, 148]
 	sub	w1, w1, #1
 	sub	w1, w1, w2
 	cmp	w0, w1, sxth
-	bgt	.L719
-	.loc 2 1289 0
-	ldr	x1, [x19, 4056]
-	.loc 2 1288 0
+	bgt	.L725
+	add	x1, x20, :lo12:.LANCHOR3
 	add	w2, w2, 1
-	strh	w2, [x19, 124]
-	.loc 2 1289 0
+	strh	w2, [x19, 148]
 	ldr	w2, [x27, 4]
+	ldr	x1, [x1, -240]
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1290 0
-	ldr	x1, [x19, 128]
-	b	.L784
-.L740:
-	.loc 2 1269 0 discriminator 3
-	ldr	x4, [x19, 4056]
+	ldr	x1, [x19, 152]
+	b	.L790
+.L746:
+	ldr	x4, [x7, -240]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
-	.loc 2 1270 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1269 0 discriminator 3
-	add	x7, x4, x3
+	add	x8, x4, x3
 	add	w1, w1, 1
 	sxth	w1, w1
-	ldr	w7, [x7, 4]
-	str	w7, [x4, x3]
-	.loc 2 1270 0 discriminator 3
-	ldr	x3, [x19, 128]
+	ldr	w8, [x8, 4]
+	str	w8, [x4, x3]
+	ldr	x3, [x19, 152]
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L739
-.L737:
+	b	.L745
+.L743:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L736
-.L720:
-	.loc 2 1297 0
+	b	.L742
+.L726:
 	ldrh	w2, [x28]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L743
-	.loc 2 1299 0
+	bne	.L749
 	strh	w26, [x28]
-.L785:
-	.loc 2 1310 0
+.L791:
 	str	w0, [x28, 8]
-	b	.L719
-.L743:
-	.loc 2 1304 0
+	b	.L725
+.L749:
 	ldrh	w0, [x28, 4]
 	cmp	w0, w1
-	beq	.L744
-	.loc 2 1305 0
+	beq	.L750
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL747:
-.L744:
-	.loc 2 1306 0
+.L750:
 	ldr	w0, [x27, 4]
 	ldr	w1, [x28, 8]
 	cmp	w1, w0
-	bcs	.L745
-	.loc 2 1308 0
+	bcs	.L751
 	ldrh	w0, [x28]
 	strh	w0, [x28, 4]
-	.loc 2 1309 0
 	strh	w26, [x28]
-	.loc 2 1310 0
 	ldr	w0, [x27, 4]
-	b	.L785
-.L745:
-	.loc 2 1314 0
+	b	.L791
+.L751:
 	strh	w26, [x28, 4]
-	b	.L719
-.LVL748:
-.L748:
-	.loc 2 1341 0
-	ldr	x1, [x19, 4032]
+	b	.L725
+.L754:
+	ldr	x1, [x19, 4088]
 	ldrh	w0, [x1]
-	cbz	w0, .L750
-.L753:
-	.loc 2 1359 0
-	add	x0, x21, :lo12:.LANCHOR0
-	ldr	x1, [x0, 128]
+	cbz	w0, .L756
+.L759:
+	add	x0, x22, :lo12:.LANCHOR0
+	ldr	x1, [x0, 152]
 	ldrh	w2, [x1]
-	cbz	w2, .L751
-.L752:
-	.loc 2 1377 0
+	cbz	w2, .L757
+.L758:
 	add	x20, x20, :lo12:.LANCHOR3
-	add	x21, x21, :lo12:.LANCHOR0
-	ldrh	w1, [x20, -184]
-	ldr	w0, [x21, 108]
+	add	x22, x22, :lo12:.LANCHOR0
+	ldrh	w1, [x20, -128]
+	ldr	w0, [x22, 132]
 	cmp	w1, w0
-	bls	.L782
-	.loc 2 1377 0 is_stmt 0 discriminator 1
+	bls	.L788
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -9076,938 +5295,549 @@ FtlScanSysBlk:
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL749:
-.L782:
-	.loc 2 1379 0 is_stmt 1
+.L788:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL750:
 	ldp	x23, x24, [sp, 48]
-.LVL751:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL752:
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL753:
-.L750:
-	.cfi_restore_state
-	.loc 2 1341 0 discriminator 1
+.L756:
 	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w0, [x0, -184]
-	cbz	w0, .L753
-	.loc 2 1343 0 discriminator 1
-	ldr	w2, [x19, 108]
+	ldrh	w0, [x0, -128]
+	cbz	w0, .L759
+	ldr	w2, [x19, 132]
 	mov	w0, 0
-.L754:
+.L760:
 	cmp	w0, w2
-	bcs	.L753
-	.loc 2 1345 0
+	bcs	.L759
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L755
+	cbz	w3, .L761
 	mov	w1, w0
-	.loc 2 1347 0 discriminator 1
-	add	x2, x21, :lo12:.LANCHOR0
-.L756:
-	ldr	w3, [x2, 108]
-	cmp	w1, w3
-	bcs	.L753
-	.loc 2 1349 0 discriminator 3
-	ldr	x5, [x2, 4032]
+	add	x3, x22, :lo12:.LANCHOR0
+	add	x7, x20, :lo12:.LANCHOR3
+.L762:
+	ldr	w2, [x3, 132]
+	cmp	w1, w2
+	bcs	.L759
+	ldr	x5, [x3, 4088]
 	sxtw	x6, w1
 	lsl	x4, x6, 1
-	sub	w3, w1, w0
-	sxtw	x3, w3
+	sub	w2, w1, w0
+	sxtw	x2, w2
 	add	w1, w1, 1
 	sxth	w1, w1
-	ldrh	w7, [x5, x4]
-	strh	w7, [x5, x3, lsl 1]
-	.loc 2 1350 0 discriminator 3
-	ldr	x5, [x2, 4080]
+	ldrh	w8, [x5, x4]
+	strh	w8, [x5, x2, lsl 1]
+	ldr	x5, [x7, -216]
 	ldr	w6, [x5, x6, lsl 2]
-	str	w6, [x5, x3, lsl 2]
-	.loc 2 1351 0 discriminator 3
-	ldr	x3, [x2, 4032]
-	strh	wzr, [x3, x4]
-	b	.L756
-.L755:
+	str	w6, [x5, x2, lsl 2]
+	ldr	x2, [x3, 4088]
+	strh	wzr, [x2, x4]
+	b	.L762
+.L761:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L754
-.L751:
-	.loc 2 1359 0 discriminator 1
+	b	.L760
+.L757:
+	ldrh	w2, [x0, 148]
+	cbz	w2, .L758
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L752
-	.loc 2 1361 0 discriminator 1
-	ldrh	w2, [x0, 100]
 	mov	w0, 0
-.L761:
+.L767:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L752
-	.loc 2 1363 0
+	bge	.L758
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L762
-	.loc 2 1365 0 discriminator 1
-	add	x1, x21, :lo12:.LANCHOR0
-.L763:
-	ldrh	w2, [x1, 100]
-	cmp	w0, w2
-	bge	.L752
-	.loc 2 1367 0 discriminator 3
-	ldr	x4, [x1, 128]
+	cbz	w3, .L768
+	add	x2, x22, :lo12:.LANCHOR0
+	add	x7, x20, :lo12:.LANCHOR3
+.L769:
+	ldrh	w1, [x2, 124]
+	cmp	w0, w1
+	bge	.L758
+	ldr	x4, [x2, 152]
 	sxtw	x5, w0
 	lsl	x3, x5, 1
-	sub	w2, w0, w6
-	sxtw	x2, w2
+	sub	w1, w0, w6
+	sxtw	x1, w1
 	add	w0, w0, 1
 	sxth	w0, w0
-	ldrh	w7, [x4, x3]
-	strh	w7, [x4, x2, lsl 1]
-	.loc 2 1368 0 discriminator 3
-	ldr	x4, [x1, 4056]
+	ldrh	w8, [x4, x3]
+	strh	w8, [x4, x1, lsl 1]
+	ldr	x4, [x7, -240]
 	ldr	w5, [x4, x5, lsl 2]
-	str	w5, [x4, x2, lsl 2]
-	.loc 2 1369 0 discriminator 3
-	ldr	x2, [x1, 128]
-	strh	wzr, [x2, x3]
-	b	.L763
-.L762:
+	str	w5, [x4, x1, lsl 2]
+	ldr	x1, [x2, 152]
+	strh	wzr, [x1, x3]
+	b	.L769
+.L768:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L761
-	.cfi_endproc
-.LFE209:
+	b	.L767
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB214:
-	.loc 2 1515 0
-	.cfi_startproc
-.LVL754:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
-	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1515 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.loc 2 1527 0
 	adrp	x21, .LANCHOR0
-	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 2 1535 0
 	mov	w27, 0
-.LVL755:
-	.loc 2 1515 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.loc 2 1522 0
 	ldrh	w24, [x0, 6]
-.LVL756:
-	.loc 2 1519 0
 	ldr	x0, [x0, 40]
-.LVL757:
 	str	x0, [x29, 120]
-	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL758:
-	.loc 2 1526 0
 	lsl	w2, w24, 2
-	.loc 2 1523 0
 	str	w0, [x29, 116]
-	.loc 2 1526 0
 	ldr	x0, [x29, 120]
-.LVL759:
-	.loc 2 1521 0
 	ldp	x23, x26, [x19, 16]
-.LVL760:
-	.loc 2 1526 0
 	bl	ftl_memset
-.LVL761:
-	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1527 0
 	add	x3, x21, :lo12:.LANCHOR0
-	add	x20, x3, 3344
-	.loc 2 1559 0
+	add	x20, x3, 3400
 	mov	x25, x3
-	.loc 2 1527 0
-	ldr	x0, [x3, 3376]
-	.loc 2 1528 0
-	ldr	x22, [x3, 3384]
+	ldr	x0, [x3, 3432]
+	ldr	x22, [x3, 3440]
 	stp	x0, x22, [x20, 8]
-	.loc 2 1530 0
 	mov	w0, -1
 	strh	w0, [x19]
-	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-	.loc 2 1537 0
 	ldr	w0, [x29, 116]
-.LVL762:
 	sub	w0, w0, #1
-.LVL763:
 	str	w0, [x29, 112]
-.LVL764:
-.L787:
-	.loc 2 1535 0 discriminator 1
+.L793:
 	ldr	w0, [x29, 116]
-.LVL765:
 	cmp	w27, w0
-	bge	.L804
-	.loc 2 1537 0
+	bge	.L810
 	ldr	w0, [x29, 112]
-.LVL766:
 	sxtw	x28, w27
-.LVL767:
 	cmp	w27, w0
-	bne	.L788
-	.loc 2 1539 0
+	bne	.L794
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x20, x23, x0
-	.loc 2 1545 0
 	add	x25, x21, :lo12:.LANCHOR0
-	add	x25, x25, 3344
-	.loc 2 1539 0
+	add	x25, x25, 3400
 	ldrh	w0, [x23, x0]
-	.loc 2 1543 0
 	mov	w23, 0
-.LVL768:
-	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL769:
-	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1539 0
 	sxth	w1, w0
-.LVL770:
-	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1542 0
 	ldr	w0, [x26, x28, lsl 2]
-	.loc 2 1543 0
 	add	w26, w1, 1
-.LVL771:
-	.loc 2 1542 0
 	str	w0, [x19, 48]
-.LVL772:
-.L789:
-	.loc 2 1543 0 discriminator 1
+.L795:
 	cmp	w23, w26
-	blt	.L791
-.LVL773:
-.L804:
-	.loc 2 1597 0
+	blt	.L797
+.L810:
 	add	x21, x21, :lo12:.LANCHOR0
-	.loc 2 1596 0
 	mov	x0, x19
-.LVL774:
 	bl	ftl_free_no_use_map_blk
-.LVL775:
-	.loc 2 1597 0
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, 84]
+	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bne	.L793
-	.loc 2 1599 0
+	bne	.L799
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL776:
-.L793:
-	.loc 2 1602 0
+.L799:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL777:
-	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL778:
-	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL779:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL780:
 	ldp	x25, x26, [sp, 64]
-.LVL781:
 	ldp	x27, x28, [sp, 80]
-.LVL782:
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL783:
-.L791:
-	.cfi_restore_state
-	.loc 2 1545 0
+.L797:
 	ldrh	w0, [x20]
-	.loc 2 1546 0
 	mov	w2, 1
-.LVL784:
 	mov	w1, w2
-.LVL785:
-	.loc 2 1545 0
 	orr	w0, w23, w0, lsl 10
 	str	w0, [x25, 4]
-	.loc 2 1546 0
 	mov	x0, x25
 	bl	FlashReadPages
-.LVL786:
-	.loc 2 1549 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L790
-	.loc 2 1551 0
+	beq	.L796
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L790
-	.loc 2 1551 0 is_stmt 0 discriminator 1
+	bls	.L796
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L790
-	.loc 2 1553 0 is_stmt 1
+	bne	.L796
 	ldr	x2, [x29, 120]
-.LVL787:
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x25, 4]
 	str	w1, [x2, x0]
-.L790:
+.L796:
 	add	w23, w23, 1
 	sxth	w23, w23
-	b	.L789
-.LVL788:
-.L788:
-	.loc 2 1559 0
-	ldr	x0, [x25, 3376]
-	.loc 2 1561 0
+	b	.L795
+.L794:
+	ldr	x0, [x25, 3432]
 	mov	w2, 1
-	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1560 0
 	lsl	x0, x28, 1
-	ldrh	w1, [x25, 84]
+	ldrh	w1, [x25, 108]
 	add	x28, x23, x0
-.LVL789:
 	ldrh	w0, [x23, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL790:
-	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L806
-	.loc 2 1564 0 is_stmt 0 discriminator 1
+	beq	.L812
 	ldrh	w1, [x22]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L806
-	.loc 2 1564 0 discriminator 2
+	bne	.L812
 	ldrh	w1, [x22, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L795
-.L806:
+	beq	.L801
+.L812:
 	mov	w5, 0
-.LVL791:
-.L796:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
-	ldrh	w0, [x25, 84]
+.L802:
+	ldrh	w0, [x25, 108]
 	cmp	w5, w0
-	bge	.L802
-	.loc 2 1581 0
+	bge	.L808
 	ldrh	w0, [x28]
-	.loc 2 1582 0
 	mov	w2, 1
-.LVL792:
-	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL793:
-	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L800
-	.loc 2 1587 0
+	beq	.L806
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L800
-	.loc 2 1587 0 is_stmt 0 discriminator 1
+	bls	.L806
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L800
-	.loc 2 1589 0 is_stmt 1
+	bne	.L806
 	ldr	x2, [x29, 120]
-.LVL794:
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x2, x0]
-.L800:
+.L806:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L796
-.LVL795:
-.L795:
+	b	.L802
+.L801:
 	mov	w0, 0
-.LVL796:
-.L797:
-	.loc 2 1567 0 discriminator 1
-	ldrh	w1, [x25, 84]
-.LVL797:
+.L803:
+	ldrh	w1, [x25, 108]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L799
-.L802:
+	blt	.L805
+.L808:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L787
-.L799:
-	.loc 2 1569 0
-	ldr	x2, [x25, 3376]
+	b	.L793
+.L805:
+	ldr	x2, [x25, 3432]
 	sbfiz	x5, x0, 3, 32
 	ldrh	w1, [x2, x5]
-.LVL798:
-	.loc 2 1570 0
 	cmp	w24, w1
-	bls	.L798
-	.loc 2 1572 0
+	bls	.L804
 	add	x2, x2, x5
 	ldr	x3, [x29, 120]
 	ubfiz	x1, x1, 2, 16
-.LVL799:
 	ldr	w2, [x2, 4]
 	str	w2, [x3, x1]
-.LVL800:
-.L798:
+.L804:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L797
-	.cfi_endproc
-.LFE214:
+	b	.L803
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB215:
-	.loc 2 1609 0
-	.cfi_startproc
-	.loc 2 1610 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 2 1609 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 1610 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 2 1609 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1610 0
-	ldrh	w2, [x1, 100]
-	strh	w2, [x0, -166]
-	.loc 2 1611 0
-	mov	w2, -3962
-	strh	w2, [x0, -172]
-	.loc 2 1612 0
 	ldrh	w2, [x1, 124]
-	strh	w2, [x0, -168]
-	.loc 2 1613 0
-	ldrh	w2, [x1, 102]
-	strh	w2, [x0, -170]
-	.loc 2 1614 0
-	ldr	x2, [x1, 128]
-	str	x2, [x0, -160]
-	.loc 2 1615 0
-	ldr	x2, [x1, 4056]
-	str	x2, [x0, -152]
-	.loc 2 1616 0
-	ldr	x2, [x1, 4048]
-	.loc 2 1617 0
-	ldr	x1, [x1, 4064]
-	stp	x2, x1, [x0, -144]
-	.loc 2 1619 0
-	sub	x0, x0, #176
+	sub	x0, x0, #120
+	strh	w2, [x0, 10]
+	mov	w2, -3962
+	strh	w2, [x0, 4]
+	ldrh	w2, [x1, 148]
+	strh	w2, [x0, 8]
+	ldrh	w2, [x1, 126]
+	ldr	x1, [x1, 152]
+	str	x1, [x0, 16]
+	ldr	x1, [x0, -120]
+	str	x1, [x0, 24]
+	ldr	x1, [x0, -128]
+	str	x1, [x0, 32]
+	ldr	x1, [x0, -112]
+	strh	w2, [x0, 6]
+	str	x1, [x0, 40]
 	bl	FtlMapTblRecovery
-.LVL801:
-	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE215:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.align	2
 	.global	FtlL2PDataInit
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB216:
-	.loc 2 1625 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 1627 0
-	adrp	x0, .LANCHOR0
-	mov	w1, 0
-	.loc 2 1625 0
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 1627 0
-	add	x19, x0, :lo12:.LANCHOR0
-	ldr	x0, [x19, 4040]
-	ldr	w2, [x19, 108]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR3
+	str	x21, [sp, 32]
+	add	x21, x19, :lo12:.LANCHOR3
+	add	x20, x1, :lo12:.LANCHOR0
+	mov	w1, 0
+	ldr	x0, [x21, -256]
+	ldr	w2, [x20, 132]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL802:
-	.loc 2 1628 0
-	ldrh	w0, [x19, 118]
+	ldrh	w0, [x20, 142]
 	mov	w1, 255
-	ldrh	w2, [x19, 90]
+	ldrh	w2, [x20, 114]
 	mul	w2, w2, w0
-	ldr	x0, [x19, 4088]
+	ldr	x0, [x21, -208]
 	bl	ftl_memset
-.LVL803:
-	.loc 2 1629 0
-	mov	x0, x19
-	mov	w1, 0
-.LVL804:
-	.loc 2 1632 0
+	mov	x1, x20
+	mov	w0, 0
 	mov	w5, -1
-.L817:
-	.loc 2 1629 0 discriminator 1
-	ldrh	w2, [x0, 118]
-	cmp	w2, w1
-	bhi	.L818
-	.loc 2 1635 0
-	adrp	x1, .LANCHOR3
-.LVL805:
-	add	x1, x1, :lo12:.LANCHOR3
+.L823:
+	ldrh	w2, [x1, 142]
+	cmp	w2, w0
+	bhi	.L824
+	add	x0, x19, :lo12:.LANCHOR3
 	mov	w2, -1
-	strh	w2, [x1, -246]
-	.loc 2 1636 0
-	strh	w2, [x1, -248]
-	.loc 2 1637 0
-	ldr	w2, [x0, 108]
-	strh	w2, [x1, -238]
-	.loc 2 1638 0
+	strh	w2, [x0, -190]
+	strh	w2, [x0, -192]
+	ldr	w2, [x1, 132]
+	strh	w2, [x0, -182]
 	mov	w2, -3902
-	strh	w2, [x1, -244]
-	.loc 2 1639 0
-	ldrh	w2, [x1, -184]
-	strh	w2, [x1, -240]
-	.loc 2 1640 0
-	ldrh	w2, [x0, 116]
-	strh	w2, [x1, -242]
-	.loc 2 1641 0
-	ldr	x2, [x0, 4032]
-	str	x2, [x1, -232]
-	.loc 2 1642 0
-	ldr	x2, [x0, 4080]
-	str	x2, [x1, -224]
-	.loc 2 1643 0
-	ldr	x2, [x0, 4040]
-	.loc 2 1644 0
-	ldr	x0, [x0, 4072]
-	stp	x2, x0, [x1, -216]
-	.loc 2 1645 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
+	strh	w2, [x0, -188]
+	ldrh	w2, [x0, -128]
+	strh	w2, [x0, -184]
+	ldrh	w2, [x1, 140]
+	ldr	x1, [x1, 4088]
+	str	x1, [x0, -176]
+	ldr	x1, [x0, -216]
+	str	x1, [x0, -168]
+	ldr	x1, [x0, -256]
+	str	x1, [x0, -160]
+	ldr	x1, [x0, -224]
+	strh	w2, [x0, -186]
+	str	x1, [x0, -152]
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.LVL806:
-.L818:
-	.cfi_restore_state
-	.loc 2 1631 0 discriminator 3
-	ldr	x3, [x0, 2544]
-	ubfiz	x2, x1, 4, 16
+.L824:
+	ldr	x3, [x1, 2568]
+	ubfiz	x2, x0, 4, 16
 	add	x3, x3, x2
 	str	wzr, [x3, 4]
-	.loc 2 1632 0 discriminator 3
-	ldr	x3, [x0, 2544]
+	ldr	x3, [x1, 2568]
 	strh	w5, [x3, x2]
-	.loc 2 1633 0 discriminator 3
-	ldr	x3, [x0, 2544]
-	ldr	x4, [x0, 4088]
+	ldr	x3, [x1, 2568]
+	ldr	x4, [x21, -208]
 	add	x3, x3, x2
-	ldrh	w2, [x0, 90]
-	mul	w2, w2, w1
-	.loc 2 1629 0 discriminator 3
-	add	w1, w1, 1
-.LVL807:
-	and	w1, w1, 65535
-.LVL808:
-	.loc 2 1633 0 discriminator 3
+	ldrh	w2, [x1, 114]
+	mul	w2, w2, w0
+	add	w0, w0, 1
+	and	w0, w0, 65535
 	sxtw	x2, w2
 	and	x2, x2, -4
 	add	x2, x4, x2
 	str	x2, [x3, 8]
-	b	.L817
-	.cfi_endproc
-.LFE216:
+	b	.L823
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
 	.global	FtlLoadMapInfo
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB217:
-	.loc 2 1648 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL809:
-	.loc 2 1651 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #248
+	sub	x0, x0, #192
 	bl	FtlMapTblRecovery
-.LVL810:
-	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE217:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
 	.global	FtlVariablesInit
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB146:
-	.loc 3 493 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 496 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 3 497 0
 	mov	w1, -1
-	.loc 3 493 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 501 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 3 497 0
-	strh	w1, [x0, -104]
-	.loc 3 496 0
-	str	xzr, [x0, -112]
-	.loc 3 500 0
+	strh	w1, [x0, -48]
+	str	xzr, [x0, -56]
 	mov	w1, -1
-	.loc 3 499 0
-	stp	wzr, wzr, [x0, -100]
-	.loc 3 500 0
-	str	w1, [x0, -92]
-	.loc 3 502 0
+	stp	wzr, wzr, [x0, -44]
+	str	w1, [x0, -36]
 	mov	w1, 0
-	ldr	x0, [x19, 128]
-	ldrh	w2, [x19, 100]
-	.loc 3 501 0
-	strh	wzr, [x19, 124]
-	.loc 3 502 0
+	ldr	x0, [x19, 152]
+	ldrh	w2, [x19, 124]
+	strh	wzr, [x19, 148]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL811:
-	.loc 3 503 0
-	ldr	x0, [x19, 2360]
+	ldr	x0, [x19, 2384]
 	mov	w1, 0
-	ldrh	w2, [x19, 22]
+	ldrh	w2, [x19, 46]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL812:
-	.loc 3 504 0
-	ldr	x0, [x19, 4008]
+	ldr	x0, [x19, 4064]
 	mov	w1, 0
-	ldrh	w2, [x19, 22]
+	ldrh	w2, [x19, 46]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL813:
-	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
-	add	x0, x19, 2288
+	add	x0, x19, 2312
 	bl	ftl_memset
-.LVL814:
-	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
-	add	x0, x19, 2696
+	add	x0, x19, 2720
 	bl	ftl_memset
-.LVL815:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL816:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL817:
-	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE146:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	2
 	.global	SupperBlkListInit
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB224:
-	.loc 2 2116 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 2120 0
 	mov	w0, 6
 	mov	w1, 0
-	.loc 2 2116 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 2120 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 2 2116 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 2 2131 0
-	add	x23, x19, 40
-	.loc 2 2116 0
+	add	x23, x19, 64
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 2128 0
 	mov	w20, 0
-.LVL818:
-	.loc 2 2126 0
 	mov	w22, 0
-.LVL819:
-	.loc 2 2120 0
-	ldrh	w2, [x19, 22]
-	.loc 2 2126 0
+	ldrh	w2, [x19, 46]
 	mov	w21, 0
-.LVL820:
-	.loc 2 2120 0
 	mul	w2, w2, w0
-	ldr	x0, [x19, 2336]
+	ldr	x0, [x19, 2360]
 	bl	ftl_memset
-.LVL821:
-	.loc 2 2124 0
-	strh	wzr, [x19, 2376]
-	.loc 2 2125 0
-	strh	wzr, [x19, 2392]
-	.loc 2 2122 0
-	str	xzr, [x19, 2344]
-	.loc 2 2123 0
+	strh	wzr, [x19, 2400]
+	strh	wzr, [x19, 2416]
 	str	xzr, [x19, 2368]
-	.loc 2 2121 0
-	str	xzr, [x19, 2384]
-.L825:
-	.loc 2 2128 0 discriminator 1
-	ldrh	w0, [x19, 20]
+	str	xzr, [x19, 2392]
+	str	xzr, [x19, 2408]
+.L831:
+	ldrh	w0, [x19, 44]
 	cmp	w20, w0
-	bcs	.L831
-	.loc 2 2130 0
-	ldrh	w8, [x19, 12]
-	.loc 2 2133 0
+	bcs	.L837
+	ldrh	w8, [x19, 36]
 	mov	x6, 0
-	ldrh	w7, [x19, 82]
+	ldrh	w7, [x19, 106]
 	mov	w5, 0
-	b	.L832
-.L827:
-	.loc 2 2131 0
+	b	.L838
+.L833:
 	ldrb	w0, [x23, x6]
 	mov	w1, w20
 	bl	V2P_block
-.LVL822:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL823:
-	cbnz	w0, .L826
-	.loc 2 2133 0
+	cbnz	w0, .L832
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L826:
-	add	x6, x6, 1
 .L832:
-	.loc 2 2130 0 discriminator 1
+	add	x6, x6, 1
+.L838:
 	cmp	w8, w6, uxth
-	bhi	.L827
-	.loc 2 2135 0
-	cbz	w5, .L834
-	.loc 2 2136 0
+	bhi	.L833
+	cbz	w5, .L840
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L828:
-	.loc 2 2137 0
-	ldr	x1, [x19, 2336]
+.L834:
+	ldr	x1, [x19, 2360]
 	mov	w0, 6
 	umaddl	x0, w20, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2139 0
-	ldrh	w0, [x19, 2400]
+	ldrh	w0, [x19, 2424]
 	cmp	w0, w20
-	beq	.L829
-	.loc 2 2139 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x19, 2448]
+	beq	.L835
+	ldrh	w0, [x19, 2472]
 	cmp	w0, w20
-	beq	.L829
-	.loc 2 2140 0 is_stmt 1
-	ldrh	w0, [x19, 2496]
+	beq	.L835
+	ldrh	w0, [x19, 2520]
 	cmp	w0, w20
-	beq	.L829
-	.loc 2 2143 0
-	ldr	x1, [x19, 2352]
+	beq	.L835
+	ldr	x1, [x19, 2376]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L830
-	.loc 2 2144 0
+	cbnz	w0, .L836
 	add	w22, w22, 1
-.LVL824:
-	.loc 2 2145 0
 	mov	w0, w20
-	.loc 2 2144 0
 	and	w22, w22, 65535
-.LVL825:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL826:
-.L829:
-	.loc 2 2128 0 discriminator 2
+.L835:
 	add	w20, w20, 1
-.LVL827:
 	and	w20, w20, 65535
-.LVL828:
-	b	.L825
-.L834:
+	b	.L831
+.L840:
 	mov	w5, 0
-	b	.L828
-.L830:
-	.loc 2 2147 0
+	b	.L834
+.L836:
 	add	w21, w21, 1
-.LVL829:
-	.loc 2 2148 0
 	mov	w0, w20
-	.loc 2 2147 0
 	and	w21, w21, 65535
-.LVL830:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL831:
-	b	.L829
-.L831:
-	.loc 2 2152 0
-	strh	w21, [x19, 2376]
-	.loc 2 2154 0
+	b	.L835
+.L837:
+	strh	w21, [x19, 2400]
 	add	w21, w21, w22
-.LVL832:
-	.loc 2 2153 0
-	strh	w22, [x19, 2392]
-	.loc 2 2154 0
+	strh	w22, [x19, 2416]
 	cmp	w21, w0
-	ble	.L833
-	.loc 2 2154 0 is_stmt 0 discriminator 1
+	ble	.L839
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -10015,1143 +5845,617 @@ SupperBlkListInit:
 	add	x1, x1, 384
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL833:
-.L833:
-	.loc 2 2156 0 is_stmt 1
+.L839:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL834:
 	ldp	x21, x22, [sp, 32]
-.LVL835:
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE224:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.align	2
 	.global	ftl_check_vpc
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB229:
-	.loc 2 2273 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
-	.loc 2 2279 0
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	.loc 2 2273 0
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 2 2282 0
 	adrp	x20, .LANCHOR0
-	.loc 2 2273 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.loc 2 2282 0
 	add	x24, x20, :lo12:.LANCHOR0
-	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2282 0
 	mov	w23, 0
-.LVL836:
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.loc 2 2279 0
 	adrp	x21, .LANCHOR1
 	add	x1, x21, :lo12:.LANCHOR1
 	add	x1, x1, 408
-	.loc 2 2273 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 2 2281 0
 	adrp	x22, check_vpc_table
-	.loc 2 2279 0
 	bl	printk
-.LVL837:
-	.loc 2 2281 0
 	add	x19, x22, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL838:
-.L837:
-	.loc 2 2282 0 discriminator 1
-	ldr	w0, [x24, 2560]
+.L843:
+	ldr	w0, [x24, 2584]
 	cmp	w23, w0
-	bcc	.L839
-	.loc 2 2297 0 discriminator 1
-	adrp	x25, .LC91
-	.loc 2 2293 0 discriminator 1
+	bcc	.L845
+	adrp	x25, .LC92
 	add	x23, x20, :lo12:.LANCHOR0
-.LVL839:
-	.loc 2 2295 0 discriminator 1
 	add	x26, x22, :lo12:check_vpc_table
-	.loc 2 2297 0 discriminator 1
-	add	x25, x25, :lo12:.LC91
+	add	x25, x25, :lo12:.LC92
 	mov	w24, 0
-.LVL840:
 	mov	w19, 0
-	.loc 2 2298 0 discriminator 1
 	mov	w4, 65535
-.L840:
-	.loc 2 2293 0 discriminator 1
-	ldrh	w0, [x23, 20]
+.L846:
+	ldrh	w0, [x23, 44]
 	cmp	w0, w19
-	bhi	.L842
-	.loc 2 2305 0
-	ldr	x19, [x23, 2384]
-	cbz	x19, .L843
-.LBB264:
-	.loc 2 2308 0
-	ldr	x0, [x23, 2336]
-	.loc 2 2313 0
-	adrp	x25, .LC92
-	.loc 2 2311 0
+	bhi	.L848
+	ldr	x19, [x23, 2408]
+	cbz	x19, .L849
+	ldr	x0, [x23, 2360]
+	adrp	x25, .LC93
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 2313 0
 	add	x22, x22, :lo12:check_vpc_table
-	.loc 2 2308 0
 	sub	x19, x19, x0
 	mov	x0, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x0, 0xaaab, lsl 0
-	.loc 2 2313 0
-	add	x25, x25, :lo12:.LC92
-	.loc 2 2307 0
-	ldrh	w26, [x23, 2392]
-.LVL841:
-	.loc 2 2316 0
+	add	x25, x25, :lo12:.LC93
+	ldrh	w26, [x23, 2416]
 	mov	w27, 6
-	.loc 2 2309 0
 	mov	w23, 0
-	.loc 2 2308 0
 	mul	x19, x19, x0
 	and	w19, w19, 65535
-.L844:
-	.loc 2 2309 0 discriminator 1
+.L850:
 	cmp	w23, w26
-	bne	.L846
-.L843:
-.LBE264:
-	.loc 2 2321 0
-	cbz	w24, .L836
-	.loc 2 2321 0 is_stmt 0 discriminator 1
+	bne	.L852
+.L849:
+	cbz	w24, .L842
 	add	x1, x21, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2321
 	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL842:
-.L836:
-	.loc 2 2322 0 is_stmt 1
+.L842:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL843:
 	ldp	x25, x26, [sp, 64]
-.LVL844:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL845:
-.L839:
-	.cfi_restore_state
-	.loc 2 2284 0
+.L845:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w23
 	bl	log2phys
-.LVL846:
-	.loc 2 2285 0
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L838
-	.loc 2 2287 0
+	beq	.L844
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL847:
-	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L838:
-	.loc 2 2282 0 discriminator 2
+.L844:
 	add	w23, w23, 1
-	b	.L837
-.LVL848:
-.L842:
-	.loc 2 2295 0
-	ldr	x0, [x23, 2352]
+	b	.L843
+.L848:
+	ldr	x0, [x23, 2376]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L841
+	beq	.L847
 	str	w4, [x29, 108]
-	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printk
-.LVL849:
-	.loc 2 2298 0
-	ldr	x0, [x23, 2352]
+	ldr	x0, [x23, 2376]
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L841
-	.loc 2 2298 0 is_stmt 0 discriminator 1
+	beq	.L847
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w24, w24, wzr, ls
-.L841:
-	.loc 2 2293 0 discriminator 2
+.L847:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L840
-.LVL850:
-.L846:
-.LBB265:
-	.loc 2 2311 0
-	ldr	x1, [x20, 2352]
+	b	.L846
+.L852:
+	ldr	x1, [x20, 2376]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L845
-	.loc 2 2313 0
+	cbz	w2, .L851
 	ldrh	w3, [x22, w19, sxtw 1]
-	.loc 2 2314 0
 	mov	w24, 1
-	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printk
-.LVL851:
-.L845:
-	.loc 2 2316 0
-	ldr	x0, [x20, 2336]
+.L851:
+	ldr	x0, [x20, 2360]
 	umull	x19, w19, w27
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L843
-	.loc 2 2309 0 discriminator 2
+	beq	.L849
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L844
-.LBE265:
-	.cfi_endproc
-.LFE229:
+	b	.L850
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
 	.global	FtlGcPageVarInit
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB248:
-	.loc 5 202 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 205 0
 	mov	w1, 255
-	.loc 5 202 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 203 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 5 205 0
-	ldr	x0, [x19, 3272]
-	ldrh	w2, [x19, 86]
-	.loc 5 203 0
-	strh	wzr, [x19, 3268]
-	.loc 5 204 0
-	strh	wzr, [x19, 3280]
-	.loc 5 205 0
+	ldr	x0, [x19, 3296]
+	ldrh	w2, [x19, 110]
+	strh	wzr, [x19, 3292]
+	strh	wzr, [x19, 3304]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL852:
-	.loc 5 206 0
-	ldrh	w2, [x19, 86]
+	ldrh	w2, [x19, 110]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	ldr	x0, [x19, 3288]
+	ldr	x0, [x19, 3312]
 	bl	ftl_memset
-.LVL853:
-	.loc 5 207 0
 	bl	FtlGcBufInit
-.LVL854:
-	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE248:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	2
 	.global	FtlGcScanTempBlk
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB249:
-	.loc 5 211 0
-	.cfi_startproc
-.LVL855:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	mov	x21, x0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 5 220 0
 	adrp	x23, .LANCHOR2
 	add	x0, x23, :lo12:.LANCHOR2
-.LVL856:
-	.loc 5 211 0
 	stp	x25, x26, [sp, 64]
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 5 211 0
 	mov	w25, w1
-	.loc 5 220 0
 	ldrh	w19, [x0, 4]
-.LVL857:
-	.loc 5 221 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L880
-	.loc 5 223 0
-	cbnz	w19, .L864
-.L865:
-	.loc 5 224 0
+	beq	.L886
+	cbnz	w19, .L870
+.L871:
 	bl	FtlGcPageVarInit
-.LVL858:
-	b	.L866
-.LVL859:
-.L880:
-	.loc 5 222 0
+	b	.L872
+.L886:
 	mov	w19, 0
-.L864:
-	.loc 5 223 0 discriminator 1
-	adrp	x0, .LANCHOR0+82
-	ldrh	w0, [x0, #:lo12:.LANCHOR0+82]
+.L870:
+	adrp	x0, .LANCHOR0+106
+	ldrh	w0, [x0, #:lo12:.LANCHOR0+106]
 	cmp	w0, w25
-	beq	.L865
-.L866:
-	.loc 5 235 0
+	beq	.L871
+.L872:
 	adrp	x26, .LANCHOR0
-	.loc 5 234 0
 	add	x22, x26, :lo12:.LANCHOR0
-	.loc 5 222 0
 	mov	w24, 0
-.LVL860:
-.L874:
-	.loc 5 228 0
+.L880:
 	ldrh	w1, [x21]
 	mov	w0, 65535
-	.loc 5 226 0
 	strb	wzr, [x21, 8]
-	.loc 5 228 0
 	cmp	w1, w0
-	beq	.L881
-.L877:
-	.loc 5 235 0
+	beq	.L887
+.L883:
 	add	x0, x26, :lo12:.LANCHOR0
 	add	x2, x21, 16
-	.loc 5 230 0
 	mov	w20, 0
-.LVL861:
-	.loc 5 233 0
 	mov	w9, 65535
-	.loc 5 235 0
 	mov	w5, 4
-	ldrh	w7, [x0, 90]
-	.loc 5 236 0
-	ldrh	w8, [x0, 92]
-	ldrh	w0, [x0, 12]
+	ldrh	w7, [x0, 114]
+	ldrh	w8, [x0, 116]
+	ldrh	w0, [x0, 36]
 	add	x0, x0, 8
 	add	x0, x21, x0, lsl 1
-.LVL862:
-.L868:
-	.loc 5 231 0 discriminator 1
+.L874:
 	cmp	x0, x2
-	bne	.L870
-	.loc 5 240 0
-	ldr	x0, [x22, 3960]
+	bne	.L876
+	ldr	x0, [x22, 4016]
 	mov	w1, w20
-.LVL863:
 	mov	w2, 0
 	ubfiz	x20, x20, 5, 16
-.LVL864:
 	bl	FlashReadPages
-.LVL865:
-	.loc 5 241 0
 	mov	x10, 0
-	.loc 5 248 0
 	mov	w11, 65535
-.L871:
-	.loc 5 241 0 discriminator 1
+.L877:
 	cmp	x10, x20
-	bne	.L875
-	.loc 5 264 0
+	bne	.L881
 	add	w19, w19, 1
-.LVL866:
-	.loc 5 266 0
 	add	w24, w24, 1
-	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL867:
-	.loc 5 268 0
 	cmp	w25, w24
-	bls	.L876
-.L878:
-	.loc 5 274 0
-	ldrh	w0, [x22, 82]
+	bls	.L882
+.L884:
+	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bhi	.L877
-.L881:
-	.loc 5 227 0
+	bhi	.L883
+.L887:
 	mov	w2, 0
-.LVL868:
-	b	.L867
-.LVL869:
-.L870:
-	.loc 5 232 0
+	b	.L873
+.L876:
 	ldrh	w1, [x2]
-	.loc 5 233 0
 	cmp	w1, w9
-	beq	.L869
-	.loc 5 234 0
-	ldr	x4, [x22, 3960]
+	beq	.L875
+	ldr	x4, [x22, 4016]
 	ubfiz	x6, x20, 5, 16
 	orr	w1, w19, w1, lsl 10
-.LVL870:
 	add	x4, x4, x6
 	str	w1, [x4, 4]
-	.loc 5 235 0
 	mul	w1, w20, w7
-	ldr	x3, [x22, 3960]
-	ldr	x4, [x22, 3240]
+	ldr	x3, [x22, 4016]
+	ldr	x4, [x22, 3264]
 	sdiv	w1, w1, w5
 	add	x3, x3, x6
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
-	.loc 5 236 0
 	mul	w1, w20, w8
-	ldr	x4, [x22, 3248]
-	.loc 5 237 0
+	ldr	x4, [x22, 3272]
 	add	w20, w20, 1
-.LVL871:
 	and	w20, w20, 65535
-.LVL872:
-	.loc 5 236 0
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 16]
-.LVL873:
-.L869:
-	add	x2, x2, 2
-	b	.L868
-.LVL874:
 .L875:
-	.loc 5 242 0
-	ldr	x6, [x22, 3960]
+	add	x2, x2, 2
+	b	.L874
+.L881:
+	ldr	x6, [x22, 4016]
 	add	x5, x6, x10
 	ldr	w4, [x5, 4]
-.LVL875:
-	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL876:
 	and	w2, w0, 65535
-.LVL877:
-	.loc 5 245 0
 	ldr	w0, [x6, x10]
-	cbnz	w0, .L872
-	.loc 5 247 0
+	cbnz	w0, .L878
 	ldr	x0, [x5, 16]
-.LVL878:
 	add	x10, x10, 32
-	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w11
-	bne	.L873
-	.loc 5 249 0
-	adrp	x0, .LANCHOR3-96
-.LVL879:
+	bne	.L879
+	adrp	x0, .LANCHOR3-40
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR3-96]
-.L867:
-	.loc 5 281 0
+	str	w1, [x0, #:lo12:.LANCHOR3-40]
+.L873:
 	add	x23, x23, :lo12:.LANCHOR2
-	.loc 5 282 0
 	strh	w19, [x21, 2]
-	.loc 5 283 0
 	strb	w2, [x21, 6]
-	.loc 5 281 0
 	mov	w0, -1
-	.loc 5 284 0
 	mov	w1, w19
-	.loc 5 281 0
 	strh	w0, [x23, 4]
-	.loc 5 284 0
 	mov	x0, x21
 	bl	ftl_sb_update_avl_pages
-.LVL880:
-	.loc 5 285 0
-	b	.L879
-.LVL881:
-.L873:
-	.loc 5 252 0
+	b	.L885
+.L879:
 	ldp	w2, w0, [x0, 8]
-.LVL882:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL883:
-	b	.L871
-.LVL884:
-.L872:
-	.loc 5 256 0
-	ldr	x0, [x22, 2352]
-	.loc 5 259 0
+	b	.L877
+.L878:
+	ldr	x0, [x22, 2376]
 	mov	w19, 0
-	.loc 5 256 0
 	ldrh	w1, [x21]
 	strh	wzr, [x0, x1, lsl 1]
-	.loc 5 257 0
 	ldrh	w0, [x21]
 	bl	INSERT_FREE_LIST
-.LVL885:
-	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x21]
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL886:
-	.loc 5 261 0
-	b	.L874
-.L876:
-	.loc 5 268 0 discriminator 1
+	b	.L880
+.L882:
 	add	x1, x23, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x1, 4]
 	cmp	w0, w2
-	beq	.L878
-	.loc 5 269 0
+	beq	.L884
 	add	w0, w0, w24
 	strh	w0, [x1, 4]
-	.loc 5 270 0
-	ldrh	w0, [x22, 82]
+	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bls	.L878
-.L879:
-	.loc 5 286 0
+	bls	.L884
+.L885:
 	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
-.LVL887:
 	ldp	x21, x22, [sp, 32]
-.LVL888:
 	ldp	x23, x24, [sp, 48]
-.LVL889:
 	ldp	x25, x26, [sp, 64]
-.LVL890:
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE249:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.align	2
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB264:
-	.loc 1 156 0
-	.cfi_startproc
-.LVL891:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 1 156 0
 	and	w19, w0, 65535
-.LVL892:
-	.loc 1 161 0
 	cmp	w19, 11
-	bls	.L889
-.LBB268:
-.LBB269:
-	.loc 1 166 0
+	bls	.L895
 	add	x0, x29, 64
-	.loc 1 167 0
 	mov	w2, 32
 	mov	w1, 165
-	.loc 1 165 0
 	adrp	x20, ftl_temp_buf
 	add	x20, x20, :lo12:ftl_temp_buf
-	.loc 1 166 0
 	stp	x20, x0, [x29, 40]
-	.loc 1 167 0
 	bl	ftl_memset
-.LVL893:
-	.loc 1 169 0
 	lsl	w19, w19, 10
-.LVL894:
-	.loc 1 168 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL895:
-	.loc 1 170 0
 	mov	w2, 1
-	.loc 1 169 0
 	str	w19, [x29, 36]
-	.loc 1 170 0
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL896:
-	.loc 1 171 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL897:
-	.loc 1 172 0
 	ldr	w0, [x29, 32]
-	.loc 1 178 0
 	mov	w2, 1
 	mov	w1, 0
-	.loc 1 172 0
 	cmp	w0, 0
-	.loc 1 178 0
 	add	x0, x29, 32
-	.loc 1 172 0
 	csetm	w19, ne
-	.loc 1 178 0
 	bl	FlashEraseBlocks
-.LVL898:
-.L887:
-.LBE269:
-.LBE268:
-	.loc 1 180 0
+.L893:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL899:
-.L889:
-	.cfi_restore_state
-	.loc 1 162 0
+.L895:
 	mov	w19, 0
-.LVL900:
-	b	.L887
-	.cfi_endproc
-.LFE264:
+	b	.L893
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	2
 	.global	FlashGetBadBlockList
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB265:
-	.loc 1 183 0
-	.cfi_startproc
-.LVL901:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 186 0
+	stp	x29, x30, [sp, -48]!
 	mov	w2, 256
-	.loc 1 183 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 1 183 0
-	mov	x19, x0
-	mov	w20, w1
-	.loc 1 186 0
+	mov	x20, x0
+	str	x21, [sp, 32]
+	mov	w21, w1
 	mov	w1, 255
-.LVL902:
 	bl	ftl_memset
-.LVL903:
-	.loc 1 187 0
-	adrp	x0, g_nand_ops
-	mov	w1, w20
-	ldr	x2, [x0, #:lo12:g_nand_ops]
-	mov	x0, x19
+	adrp	x19, .LANCHOR0
+	add	x0, x19, :lo12:.LANCHOR0
+	mov	w1, w21
+	ldr	x2, [x0, 3368]
+	mov	x0, x20
 	blr	x2
-.LVL904:
 	and	w0, w0, 65535
-.LVL905:
-	.loc 1 188 0
 	cmp	w0, 50
-	bls	.L892
-	.loc 1 189 0
+	bls	.L898
 	mov	w2, 256
 	mov	w1, 255
-	mov	x0, x19
-.LVL906:
+	mov	x0, x20
 	bl	ftl_memset
-.LVL907:
-	.loc 1 190 0
 	mov	w0, 0
-.LVL908:
-.L892:
-	.loc 1 192 0
-	adrp	x1, g_nand_phy_info+14
-	ldrh	w1, [x1, #:lo12:g_nand_phy_info+14]
+.L898:
+	add	x19, x19, :lo12:.LANCHOR0
+	ldrh	w1, [x19, 14]
 	cmp	w1, 4
-	bne	.L896
+	bne	.L902
 	mov	x1, 0
-.L894:
-	.loc 1 193 0 discriminator 1
+.L900:
 	cmp	w0, w1, uxth
-	bhi	.L895
-.L896:
-	.loc 1 198 0
+	bhi	.L901
+.L902:
 	ldp	x19, x20, [sp, 16]
-.LVL909:
-.LVL910:
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.LVL911:
-.L895:
-	.cfi_restore_state
-	.loc 1 194 0 discriminator 3
-	ldrh	w2, [x19, x1, lsl 1]
+.L901:
+	ldrh	w2, [x20, x1, lsl 1]
 	lsr	w2, w2, 1
-	strh	w2, [x19, x1, lsl 1]
+	strh	w2, [x20, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L894
-	.cfi_endproc
-.LFE265:
+	b	.L900
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
 	.global	ftl_memcpy
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB267:
-	.loc 1 206 0
-	.cfi_startproc
-.LVL912:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 1 207 0
 	uxtw	x2, w2
-.LVL913:
-	.loc 1 206 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 1 207 0
 	bl	memcpy
-.LVL914:
-	.loc 1 208 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE267:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.align	2
 	.global	FtlBbmTblFlush
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB165:
-	.loc 4 80 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 4 89 0
 	mov	w1, 0
-	.loc 4 80 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	str	x25, [sp, 64]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 25, -16
-	.loc 4 87 0
 	adrp	x25, .LANCHOR0
 	add	x19, x25, :lo12:.LANCHOR0
-	.loc 4 80 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 4 92 0
 	adrp	x22, .LANCHOR3
-	.loc 4 91 0
 	mov	w21, 0
-.LVL915:
-	.loc 4 92 0
 	add	x22, x22, :lo12:.LANCHOR3
-	.loc 4 88 0
-	ldr	x2, [x19, 3384]
-	add	x23, x19, 168
-	.loc 4 87 0
-	ldr	x0, [x19, 3376]
-	.loc 4 88 0
-	str	x2, [x19, 3360]
-	.loc 4 89 0
-	ldrh	w2, [x19, 90]
-	.loc 4 87 0
-	str	x0, [x19, 3352]
-	.loc 4 89 0
+	ldr	x2, [x19, 3440]
+	add	x23, x19, 192
+	ldr	x0, [x19, 3432]
+	str	x2, [x19, 3416]
+	ldrh	w2, [x19, 114]
+	str	x0, [x19, 3408]
 	bl	ftl_memset
-.LVL916:
-.L901:
-	.loc 4 91 0 discriminator 1
-	ldrh	w0, [x19, 34]
-	add	x20, x19, 3344
+.L907:
+	ldrh	w0, [x19, 58]
+	add	x20, x19, 3400
 	cmp	w21, w0
-	blt	.L902
-	.loc 4 94 0
+	blt	.L908
 	ldr	x24, [x20, 16]
-.LVL917:
-	.loc 4 95 0
 	mov	w1, 255
 	mov	w2, 16
-	.loc 4 108 0
-	adrp	x22, .LC93
-	.loc 4 95 0
+	adrp	x22, .LC94
 	mov	x0, x24
 	bl	ftl_memset
-.LVL918:
-	.loc 4 97 0
 	mov	w0, -3887
-	.loc 4 98 0
-	add	x1, x19, 136
-	.loc 4 97 0
+	add	x1, x19, 160
 	strh	w0, [x24]
-	.loc 4 104 0
 	add	x25, x25, :lo12:.LANCHOR0
-	.loc 4 108 0
-	add	x22, x22, :lo12:.LC93
-	.loc 4 84 0
+	add	x22, x22, :lo12:.LC94
 	mov	w21, 0
-.LVL919:
-	.loc 4 98 0
-	ldr	w0, [x19, 144]
-	.loc 4 82 0
+	ldr	w0, [x19, 168]
 	mov	w23, 0
-.LVL920:
-	.loc 4 98 0
 	str	w0, [x24, 4]
-	.loc 4 99 0
-	ldrh	w0, [x19, 136]
+	ldrh	w0, [x19, 160]
 	strh	w0, [x24, 2]
-	.loc 4 100 0
-	ldrh	w0, [x19, 140]
+	ldrh	w0, [x19, 164]
 	strh	w0, [x24, 8]
-	.loc 4 101 0
-	ldrh	w0, [x19, 142]
+	ldrh	w0, [x19, 166]
 	strh	w0, [x24, 10]
-	.loc 4 102 0
-	ldr	w0, [x19, 8]
-	.loc 4 107 0
+	ldr	w0, [x19, 32]
 	mov	x19, x1
-	.loc 4 102 0
 	strh	w0, [x24, 12]
-.L903:
-	.loc 4 104 0
-	ldr	x0, [x25, 3376]
+.L909:
+	ldr	x0, [x25, 3432]
 	str	x0, [x20, 8]
-	.loc 4 105 0
-	ldr	x0, [x25, 3384]
+	ldr	x0, [x25, 3440]
 	str	x0, [x20, 16]
-	.loc 4 107 0
 	ldrh	w1, [x19]
 	ldrh	w2, [x19, 2]
-	.loc 4 108 0
 	ldrh	w3, [x19, 4]
 	ldrh	w4, [x24, 10]
-	.loc 4 107 0
 	orr	w0, w2, w1, lsl 10
-	.loc 4 106 0
 	str	wzr, [x20]
-	.loc 4 107 0
 	str	w0, [x20, 4]
-	.loc 4 108 0
 	mov	x0, x22
 	bl	printk
-.LVL921:
-	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL922:
-	.loc 4 110 0
-	ldrh	w0, [x25, 84]
+	ldrh	w0, [x25, 108]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L904
-	.loc 4 113 0
+	blt	.L910
 	ldr	w0, [x19, 8]
-	.loc 4 122 0
 	mov	w2, 1
-	.loc 4 115 0
 	ldrh	w1, [x19]
-	.loc 4 113 0
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	.loc 4 114 0
 	str	w0, [x24, 4]
-	.loc 4 115 0
 	strh	w1, [x24, 8]
-	.loc 4 116 0
 	ldrh	w0, [x19, 4]
-	.loc 4 118 0
 	strh	w1, [x19, 4]
-	.loc 4 121 0
-	ldr	x1, [x25, 3904]
-	.loc 4 116 0
+	ldr	x1, [x25, 3960]
 	strh	w0, [x19]
-	.loc 4 119 0
 	lsl	w0, w0, 10
 	str	w0, [x20, 4]
-	.loc 4 117 0
 	strh	wzr, [x19, 2]
-	.loc 4 121 0
 	str	w0, [x1, 4]
-	.loc 4 122 0
 	mov	w1, w2
-	ldr	x0, [x25, 3904]
+	ldr	x0, [x25, 3960]
 	bl	FlashEraseBlocks
-.LVL923:
-	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL924:
-.L904:
-	.loc 4 126 0
+.L910:
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 4 127 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L905
-	.loc 4 129 0
+	bne	.L911
 	ldr	w1, [x20, 4]
-	.loc 4 130 0
 	add	w21, w21, 1
-.LVL925:
-	.loc 4 129 0
-	adrp	x0, .LC94
-	.loc 4 130 0
+	adrp	x0, .LC95
 	and	w21, w21, 65535
-.LVL926:
-	.loc 4 129 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC95
 	bl	printk
-.LVL927:
-	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L903
-	.loc 4 132 0
+	bls	.L909
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC95
+	adrp	x0, .LC96
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC96
 	bl	printk
-.LVL928:
-.L907:
-	b	.L907
-.LVL929:
-.L902:
-	.loc 4 92 0 discriminator 3
-	ldrh	w2, [x22, -256]
+.L913:
+	b	.L913
+.L908:
+	ldrh	w2, [x22, -200]
 	ldr	x1, [x23], 8
 	ldr	x0, [x20, 8]
 	mul	w3, w21, w2
 	lsl	w2, w2, 2
-	.loc 4 91 0 discriminator 3
 	add	w21, w21, 1
-	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL930:
-	b	.L901
-.LVL931:
-.L908:
+	b	.L907
+.L914:
 	mov	w23, 1
-	b	.L903
-.L905:
-	.loc 4 139 0
-	cbz	w23, .L908
-	.loc 4 146 0
+	b	.L909
+.L911:
+	cbz	w23, .L914
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL932:
 	ldp	x23, x24, [sp, 48]
-.LVL933:
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE165:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB237:
-	.loc 2 2579 0
-	.cfi_startproc
-.LVL934:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 2585 0
 	adrp	x21, .LANCHOR0
 	add	x22, x21, :lo12:.LANCHOR0
-	.loc 2 2579 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
 	mov	x20, x0
-	.loc 2 2587 0
 	mov	x19, x22
-	add	x23, x22, 2496
-	.loc 2 2579 0
+	add	x23, x22, 2520
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-.LVL935:
-.L911:
-	.loc 2 2585 0
-	ldrh	w1, [x22, 2376]
-	ldrh	w0, [x22, 2392]
+.L917:
+	ldrh	w1, [x22, 2400]
+	ldrh	w0, [x22, 2416]
 	add	w0, w0, w1
-	ldrh	w1, [x22, 20]
+	ldrh	w1, [x22, 44]
 	cmp	w0, w1
-	ble	.L912
-	.loc 2 2585 0 is_stmt 0 discriminator 1
+	ble	.L918
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11159,36 +6463,25 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL936:
-.L912:
-	.loc 2 2587 0 is_stmt 1
+.L918:
 	cmp	x20, x23
-	bne	.L937
-	.loc 2 2588 0
-	ldrh	w0, [x19, 2392]
-	ldr	w1, [x19, 3220]
+	bne	.L943
+	ldrh	w0, [x19, 2416]
+	ldr	w1, [x19, 3244]
 	mul	w1, w0, w1
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-	.loc 2 2592 0
 	ands	w1, w1, 65535
-.LVL937:
-	beq	.L913
-	.loc 2 2593 0
+	beq	.L919
 	sub	w1, w1, #1
-.LVL938:
 	and	w1, w1, 65535
-.LVL939:
-.L913:
-	.loc 2 2594 0
-	add	x0, x19, 2384
+.L919:
+	add	x0, x19, 2408
 	bl	List_pop_index_node
-.LVL940:
 	and	w24, w0, 65535
-	ldrh	w0, [x19, 2392]
-	cbnz	w0, .L914
-	.loc 2 2594 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 2416]
+	cbnz	w0, .L920
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11196,38 +6489,27 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL941:
-.L914:
-	.loc 2 2594 0 discriminator 3
-	ldrh	w0, [x19, 2392]
+.L920:
+	ldrh	w0, [x19, 2416]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2392]
-	.loc 2 2597 0 is_stmt 1 discriminator 3
+	strh	w0, [x19, 2416]
 	strh	w24, [x20]
-	.loc 2 2598 0 discriminator 3
 	mov	x0, x20
 	bl	make_superblock
-.LVL942:
-	.loc 2 2599 0 discriminator 3
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L915
-	.loc 2 2603 0
-	ldr	x1, [x19, 2352]
+	cbnz	w0, .L921
+	ldr	x1, [x19, 2376]
 	ubfiz	x0, x24, 1, 16
 	mov	w2, -1
 	strh	w2, [x1, x0]
-	.loc 2 2604 0
 	mov	w0, w24
 	bl	INSERT_DATA_LIST
-.LVL943:
-	.loc 2 2605 0
-	ldrh	w1, [x19, 2376]
-	ldrh	w0, [x19, 2392]
+	ldrh	w1, [x19, 2400]
+	ldrh	w0, [x19, 2416]
 	add	w0, w0, w1
-	ldrh	w1, [x19, 20]
+	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L911
-	.loc 2 2605 0 is_stmt 0 discriminator 1
+	ble	.L917
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2605
@@ -11235,22 +6517,17 @@ allocate_data_superblock:
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL944:
-	b	.L911
-.L937:
+	b	.L917
+.L943:
 	mov	w1, 0
-.LVL945:
-	b	.L913
-.LVL946:
-.L915:
-	.loc 2 2608 0 is_stmt 1
-	ldrh	w1, [x19, 2376]
-	ldrh	w0, [x19, 2392]
+	b	.L919
+.L921:
+	ldrh	w1, [x19, 2400]
+	ldrh	w0, [x19, 2416]
 	add	w0, w0, w1
-	ldrh	w1, [x19, 20]
+	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L917
-	.loc 2 2608 0 is_stmt 0 discriminator 1
+	ble	.L923
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11258,23 +6535,17 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL947:
-.L917:
+.L923:
 	add	x27, x20, 16
-	.loc 2 2611 0 is_stmt 1 discriminator 1
-	ldrh	w4, [x19, 12]
+	ldrh	w4, [x19, 36]
 	mov	x3, x27
 	mov	x0, 0
 	mov	w25, 0
-	.loc 2 2614 0 discriminator 1
 	mov	w5, 65535
-.L918:
-	.loc 2 2611 0 discriminator 1
+.L924:
 	cmp	w4, w0, uxth
-	bhi	.L920
-	.loc 2 2619 0
-	cbnz	w25, .L921
-	.loc 2 2619 0 is_stmt 0 discriminator 1
+	bhi	.L926
+	cbnz	w25, .L927
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11282,13 +6553,10 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL948:
-.L921:
-	.loc 2 2621 0 is_stmt 1
-	ldrh	w0, [x19, 2648]
+.L927:
+	ldrh	w0, [x19, 2672]
 	cmp	w0, w24
-	bne	.L922
-	.loc 2 2621 0 is_stmt 0 discriminator 1
+	bne	.L928
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11296,241 +6564,154 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL949:
-.L922:
-	.loc 2 2622 0 is_stmt 1
+.L928:
 	ldrb	w0, [x20, 8]
 	uxtw	x26, w24
-.LVL950:
-	cbnz	w0, .L923
-	.loc 2 2623 0
-	ldr	x2, [x19, 2360]
+	cbnz	w0, .L929
+	ldr	x2, [x19, 2384]
 	lsl	x1, x26, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L924
-	.loc 2 2624 0
-	ldrh	w3, [x19, 72]
+	cbz	w0, .L930
+	ldrh	w3, [x19, 96]
 	add	w0, w0, w3
-.L945:
-	.loc 2 2626 0
+.L951:
 	strh	w0, [x2, x1]
-	.loc 2 2628 0
 	mov	w1, 0
-	.loc 2 2627 0
-	ldr	w0, [x19, 2604]
+	ldr	w0, [x19, 2628]
 	add	w0, w0, 1
-	str	w0, [x19, 2604]
-.LVL951:
-	.loc 2 2628 0
+	str	w0, [x19, 2628]
 	mov	w0, w24
 	bl	ftl_set_blk_mode
-.LVL952:
-.L926:
-	.loc 2 2635 0
-	ldr	x0, [x19, 2360]
-.LVL953:
+.L932:
+	ldr	x0, [x19, 2384]
 	lsl	x26, x26, 1
-.LVL954:
-	ldr	w1, [x19, 2620]
+	ldr	w1, [x19, 2644]
 	ldrh	w0, [x0, x26]
 	cmp	w0, w1
-	bls	.L927
-	.loc 2 2636 0
-	str	w0, [x19, 2620]
-.L927:
-	.loc 2 2638 0
-	ldr	w1, [x19, 2608]
+	bls	.L933
+	str	w0, [x19, 2644]
+.L933:
+	ldr	w1, [x19, 2632]
 	ubfiz	x3, x25, 5, 16
-	ldrh	w0, [x19, 72]
-	ldr	w2, [x19, 2604]
+	ldrh	w0, [x19, 96]
+	ldr	w2, [x19, 2628]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x19, 20]
+	ldrh	w1, [x19, 44]
 	udiv	w0, w0, w1
-	.loc 2 2639 0
-	ldr	x1, [x19, 4016]
-	.loc 2 2638 0
-	str	w0, [x19, 2612]
-	.loc 2 2639 0
+	ldr	x1, [x19, 4072]
+	str	w0, [x19, 2636]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-	.loc 2 2641 0
 	mov	x0, 0
-.L928:
-	.loc 2 2641 0 is_stmt 0 discriminator 1
+.L934:
 	cmp	x3, x0
-	bne	.L929
-	.loc 2 2643 0 is_stmt 1
+	bne	.L935
 	ldrb	w1, [x20, 8]
 	mov	w2, w25
-	ldr	x0, [x19, 3904]
-	.loc 2 2645 0
+	ldr	x0, [x19, 3960]
 	mov	x28, 0
-	.loc 2 2643 0
 	bl	FlashEraseBlocks
-.LVL955:
-	.loc 2 2644 0
 	mov	w1, 0
-.LVL956:
-.L930:
-	.loc 2 2645 0 discriminator 1
+.L936:
 	cmp	w25, w28, uxth
-	bhi	.L932
-	.loc 2 2656 0
+	bhi	.L938
 	cmp	w1, 0
-	ble	.L933
-	.loc 2 2657 0
+	ble	.L939
 	mov	w0, w24
 	bl	update_multiplier_value
-.LVL957:
-	.loc 2 2658 0
 	bl	FtlBbmTblFlush
-.LVL958:
-.L933:
-	.loc 2 2661 0
+.L939:
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L934
-	.loc 2 2663 0
-	ldr	x0, [x19, 2352]
+	cbnz	w0, .L940
+	ldr	x0, [x19, 2376]
 	mov	w1, -1
-.LVL959:
 	strh	w1, [x0, x26]
-	.loc 2 2664 0
 	mov	w0, w24
 	bl	INSERT_DATA_LIST
-.LVL960:
-	.loc 2 2665 0
-	b	.L911
-.L920:
-	.loc 2 2612 0
-	ldr	x1, [x19, 3904]
+	b	.L917
+.L926:
+	ldr	x1, [x19, 3960]
 	add	x2, x1, x0, lsl 5
-	.loc 2 2613 0
 	stp	xzr, xzr, [x2, 8]
-	.loc 2 2614 0
 	ldrh	w2, [x3]
 	cmp	w2, w5
-	beq	.L919
-	.loc 2 2615 0
+	beq	.L925
 	ubfiz	x6, x25, 5, 16
-	.loc 2 2616 0
 	add	w25, w25, 1
-.LVL961:
-	.loc 2 2615 0
 	add	x1, x1, x6
-	.loc 2 2616 0
 	and	w25, w25, 65535
-.LVL962:
-	.loc 2 2615 0
 	lsl	w2, w2, 10
 	str	w2, [x1, 4]
-.L919:
+.L925:
 	add	x0, x0, 1
 	add	x3, x3, 2
-	b	.L918
-.LVL963:
-.L924:
-	.loc 2 2626 0
+	b	.L924
+.L930:
 	mov	w0, 2
-	b	.L945
-.L923:
-	.loc 2 2630 0
-	ldr	x2, [x19, 2360]
+	b	.L951
+.L929:
+	ldr	x2, [x19, 2384]
 	lsl	x0, x26, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2631 0
-	ldr	w0, [x19, 2608]
+	ldr	w0, [x19, 2632]
 	add	w0, w0, 1
-	str	w0, [x19, 2608]
-.LBB270:
-.LBB271:
+	str	w0, [x19, 2632]
 	mov	w0, w24
 	bl	ftl_set_blk_mode.part.7
-.LVL964:
-	b	.L926
-.LVL965:
-.L929:
-.LBE271:
-.LBE270:
-	.loc 2 2642 0 discriminator 3
-	ldr	x1, [x19, 3904]
+	b	.L932
+.L935:
+	ldr	x1, [x19, 3960]
 	add	x1, x1, x0
 	add	x0, x0, 32
 	ldr	w2, [x1, 4]
 	and	w2, w2, -1024
 	str	w2, [x1, 4]
-	b	.L928
-.LVL966:
-.L932:
-	.loc 2 2646 0
-	ldr	x2, [x19, 3904]
+	b	.L934
+.L938:
+	ldr	x2, [x19, 3960]
 	lsl	x0, x28, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L931
-	.loc 2 2647 0
+	bne	.L937
 	add	w1, w1, 1
-	.loc 2 2648 0
 	ldr	w0, [x3, 4]
-	.loc 2 2647 0
 	stp	w2, w1, [x29, 104]
-	.loc 2 2649 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL967:
-	.loc 2 2651 0
 	ldp	w2, w1, [x29, 104]
-	.loc 2 2650 0
 	strh	w2, [x27]
-	.loc 2 2651 0
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-.LVL968:
-.L931:
+.L937:
 	add	x28, x28, 1
 	add	x27, x27, 2
-	b	.L930
-.L934:
-	.loc 2 2668 0
+	b	.L936
+.L940:
 	add	x21, x21, :lo12:.LANCHOR0
-	.loc 2 2670 0
 	strh	wzr, [x20, 2]
-	.loc 2 2671 0
 	strb	wzr, [x20, 6]
-	.loc 2 2668 0
-	ldrh	w1, [x21, 82]
-.LVL969:
-	.loc 2 2669 0
+	ldrh	w1, [x21, 106]
 	strh	w24, [x20]
-	.loc 2 2668 0
 	mul	w0, w0, w1
-	.loc 2 2672 0
-	ldr	w1, [x21, 2596]
+	ldr	w1, [x21, 2620]
 	str	w1, [x20, 12]
-	.loc 2 2668 0
 	and	w0, w0, 65535
-	.loc 2 2672 0
 	add	w1, w1, 1
-	.loc 2 2668 0
 	strh	w0, [x20, 4]
-	.loc 2 2672 0
-	str	w1, [x21, 2596]
-	.loc 2 2673 0
-	ldr	x1, [x21, 2352]
+	str	w1, [x21, 2620]
+	ldr	x1, [x21, 2376]
 	ldrh	w2, [x20]
 	strh	w0, [x1, x2, lsl 1]
-	.loc 2 2674 0
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L935
-	.loc 2 2674 0 is_stmt 0 discriminator 2
+	cbz	w0, .L941
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L936
-.L935:
-	.loc 2 2674 0 discriminator 3
+	cbnz	w0, .L942
+.L941:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11538,251 +6719,121 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL970:
-.L936:
-	.loc 2 2676 0 is_stmt 1
+.L942:
 	ldp	x19, x20, [sp, 16]
-.LVL971:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL972:
 	ldp	x25, x26, [sp, 64]
-.LVL973:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE237:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.align	2
 	.global	FtlGcFreeBadSuperBlk
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB256:
-	.loc 5 390 0
-	.cfi_startproc
-.LVL974:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 5 395 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 5 390 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	and	w22, w0, 65535
-.LVL975:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 5 395 0
-	ldrh	w0, [x19, 3300]
-	.loc 5 390 0
+	ldrh	w0, [x19, 3324]
 	str	x27, [sp, 80]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.loc 5 395 0
-	cbz	w0, .L947
-.LBB274:
-.LBB275:
-	.loc 5 397 0
-	add	x23, x19, 40
-	.loc 5 399 0
-	add	x24, x19, 3304
-.LBE275:
-.LBE274:
+	cbz	w0, .L953
+	add	x23, x19, 64
+	add	x24, x19, 3328
 	mov	w21, 0
-.LVL976:
-.L948:
-.LBB278:
-.LBB276:
-	.loc 5 396 0
-	ldrh	w0, [x19, 12]
+.L954:
+	ldrh	w0, [x19, 36]
 	cmp	w0, w21
-	bhi	.L954
-	.loc 5 412 0
+	bhi	.L960
 	bl	FtlGcReFreshBadBlk
-.LVL977:
-.L947:
-.LBE276:
-.LBE278:
-	.loc 5 415 0
+.L953:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL978:
 	ldp	x21, x22, [sp, 32]
-.LVL979:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL980:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL981:
-.L954:
-	.cfi_restore_state
-.LBB279:
-.LBB277:
-	.loc 5 397 0
+.L960:
 	ldrb	w0, [x23, w21, sxtw]
 	mov	w1, w22
-	.loc 5 401 0
-	adrp	x26, .LC96
-	add	x26, x26, :lo12:.LC96
-	.loc 5 398 0
+	adrp	x26, .LC97
+	add	x26, x26, :lo12:.LC97
 	mov	w20, 0
-	.loc 5 397 0
 	bl	V2P_block
-.LVL982:
 	and	w25, w0, 65535
-.L949:
-	.loc 5 398 0
-	ldrh	w0, [x19, 3300]
+.L955:
+	ldrh	w0, [x19, 3324]
 	cmp	w0, w20
-	bhi	.L953
-	.loc 5 396 0
+	bhi	.L959
 	add	w21, w21, 1
-.LVL983:
 	and	w21, w21, 65535
-.LVL984:
-	b	.L948
-.L953:
-	.loc 5 399 0
+	b	.L954
+.L959:
 	ldrh	w0, [x24, w20, sxtw 1]
 	add	w27, w20, 1
 	cmp	w0, w25
-	bne	.L950
-	.loc 5 401 0
+	bne	.L956
 	mov	w1, w25
 	mov	x0, x26
 	bl	printk
-.LVL985:
-	.loc 5 403 0
 	mov	w0, w25
 	bl	FtlBbmMapBadBlock
-.LVL986:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL987:
-	.loc 5 405 0
-	ldrh	w0, [x19, 3300]
+	ldrh	w0, [x19, 3324]
 	mov	w1, w27
-.LVL988:
-.L951:
+.L957:
 	cmp	w20, w0
-	bcc	.L952
-	.loc 5 407 0
+	bcc	.L958
 	sub	w0, w0, #1
-	strh	w0, [x19, 3300]
-.L950:
-	.loc 5 398 0
+	strh	w0, [x19, 3324]
+.L956:
 	and	w20, w27, 65535
-.LVL989:
-	b	.L949
-.LVL990:
-.L952:
-	.loc 5 406 0
+	b	.L955
+.L958:
 	sub	w2, w1, #1
 	ldrh	w3, [x24, w1, sxtw 1]
-	.loc 5 405 0
 	add	w20, w20, 1
-.LVL991:
 	add	w1, w1, 1
 	and	w20, w20, 65535
-.LVL992:
-	.loc 5 406 0
 	strh	w3, [x24, w2, sxtw 1]
-	b	.L951
-.LBE277:
-.LBE279:
-	.cfi_endproc
-.LFE256:
+	b	.L957
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB240:
-	.loc 2 2735 0
-	.cfi_startproc
-.LVL993:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w19, w0, 65535
-.LVL994:
-	.loc 2 2736 0
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 2 2735 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2736 0
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, 2352]
+	ldr	x2, [x0, 2376]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L960
-	.loc 2 2737 0
-	ldrh	w1, [x0, 2648]
+	cbnz	w1, .L966
+	ldrh	w1, [x0, 2672]
 	cmp	w1, w19
-	bne	.L961
-	.loc 2 2739 0
+	bne	.L967
 	mov	w1, -1
-	strh	w1, [x0, 2648]
-.L962:
-.LBB282:
-.LBB283:
-	.loc 2 2744 0
+	strh	w1, [x0, 2672]
+.L968:
 	add	x21, x20, :lo12:.LANCHOR0
 	mov	w1, w19
-	add	x0, x21, 2344
+	add	x0, x21, 2368
 	bl	List_remove_node
-.LVL995:
-	ldrh	w0, [x21, 2376]
-	cbnz	w0, .L964
+	ldrh	w0, [x21, 2400]
+	cbnz	w0, .L970
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11790,29 +6841,22 @@ update_vpc_list:
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL996:
-.L964:
+.L970:
 	add	x20, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x20, 2376]
+	ldrh	w0, [x20, 2400]
 	sub	w0, w0, #1
-	strh	w0, [x20, 2376]
-	.loc 2 2745 0
+	strh	w0, [x20, 2400]
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL997:
-	.loc 2 2746 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL998:
-	.loc 2 2747 0
-	ldrh	w1, [x20, 2376]
+	ldrh	w1, [x20, 2400]
 	mov	w19, 1
-.LVL999:
-	ldrh	w0, [x20, 2392]
+	ldrh	w0, [x20, 2416]
 	add	w0, w0, w1
-	ldrh	w1, [x20, 20]
+	ldrh	w1, [x20, 44]
 	cmp	w0, w1
-	ble	.L959
+	ble	.L965
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11820,118 +6864,65 @@ update_vpc_list:
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1000:
-.L959:
-.LBE283:
-.LBE282:
-	.loc 2 2753 0
+.L965:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1001:
-.L961:
-	.cfi_restore_state
-	.loc 2 2740 0
-	ldrh	w1, [x0, 2400]
+.L967:
+	ldrh	w1, [x0, 2424]
 	cmp	w1, w19
-	beq	.L967
-	.loc 2 2740 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x0, 2448]
+	beq	.L973
+	ldrh	w1, [x0, 2472]
 	cmp	w1, w19
-	beq	.L967
-	.loc 2 2740 0 discriminator 2
-	ldrh	w0, [x0, 2496]
+	beq	.L973
+	ldrh	w0, [x0, 2520]
 	cmp	w0, w19
-	bne	.L962
-.L967:
-	.loc 2 2742 0 is_stmt 1
+	bne	.L968
+.L973:
 	mov	w19, 0
-.LVL1002:
-	b	.L959
-.LVL1003:
-.L960:
-	.loc 2 2750 0
+	b	.L965
+.L966:
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1004:
-	b	.L967
-	.cfi_endproc
-.LFE240:
+	b	.L973
 	.size	update_vpc_list, .-update_vpc_list
 	.align	2
 	.global	decrement_vpc_count
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB241:
-	.loc 2 2756 0
-	.cfi_startproc
-.LVL1005:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w19, w0, 65535
-.LVL1006:
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2759 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L971
-	.loc 2 2760 0
+	beq	.L977
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, 2352]
+	ldr	x1, [x20, 2376]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L972
-	.loc 2 2761 0
+	cbnz	w0, .L978
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
 	bl	printk
-.LVL1007:
-	.loc 2 2762 0
-	ldr	x0, [x20, 2352]
+	ldr	x0, [x20, 2376]
 	ldrh	w0, [x0, x21]
-	cbz	w0, .L973
-.L978:
-	.loc 2 2763 0 discriminator 1
+	cbz	w0, .L979
+.L984:
 	mov	w21, 0
-.L970:
-	.loc 2 2781 0
+.L976:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1008:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1009:
-.L973:
-	.cfi_restore_state
-	.loc 2 2762 0 discriminator 1
+.L979:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2762
@@ -11939,42 +6930,31 @@ decrement_vpc_count:
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1010:
-	b	.L978
-.L972:
-	.loc 2 2765 0
+	b	.L984
+.L978:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L971:
-	.loc 2 2769 0
+.L977:
 	adrp	x20, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w1, 65535
-	ldrh	w0, [x20, -104]
+	ldrh	w0, [x20, -48]
 	cmp	w0, w1
-	bne	.L975
-	.loc 2 2770 0
-	strh	w19, [x20, -104]
-	b	.L978
-.L975:
-	.loc 2 2772 0
+	bne	.L981
+	strh	w19, [x20, -48]
+	b	.L984
+.L981:
 	cmp	w19, w0
-	beq	.L978
-	.loc 2 2775 0
+	beq	.L984
 	bl	update_vpc_list
-.LVL1011:
 	cmp	w0, 0
-	.loc 2 2778 0
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
-	.loc 2 2777 0
-	strh	w19, [x20, -104]
-	.loc 2 2775 0
+	strh	w19, [x20, -48]
 	cset	w21, ne
-	.loc 2 2778 0
-	ldr	x2, [x1, 2336]
-	ldr	x0, [x1, 2344]
-	ldr	x1, [x1, 2352]
+	ldr	x2, [x1, 2360]
+	ldr	x0, [x1, 2368]
+	ldr	x1, [x1, 2376]
 	sub	x0, x0, x2
 	mov	x2, -6148914691236517206
 	asr	x0, x0, 1
@@ -11982,11 +6962,9 @@ decrement_vpc_count:
 	mul	x0, x0, x2
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L970
-	.loc 2 2778 0 is_stmt 0 discriminator 1
+	cbnz	w1, .L976
 	cmp	w19, w0, uxth
-	beq	.L970
-	.loc 2 2778 0 discriminator 2
+	beq	.L976
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2778
@@ -11994,675 +6972,379 @@ decrement_vpc_count:
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1012:
-	b	.L970
-	.cfi_endproc
-.LFE241:
+	b	.L976
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	2
 	.global	FtlWriteDump_data
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB207:
-	.loc 2 996 0 is_stmt 1
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 2 997 0
 	adrp	x19, .LANCHOR0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.loc 2 997 0
-	ldrh	w2, [x20, 2404]
-	cbz	w2, .L980
-	.loc 2 997 0 is_stmt 0 discriminator 1
-	ldrb	w1, [x20, 2408]
-	cbnz	w1, .L980
-	.loc 2 998 0 is_stmt 1
-	ldrb	w1, [x20, 2407]
-	ldrh	w3, [x20, 82]
+	ldrh	w2, [x20, 2428]
+	cbz	w2, .L986
+	ldrb	w1, [x20, 2432]
+	cbnz	w1, .L986
+	ldrb	w1, [x20, 2431]
+	ldrh	w3, [x20, 106]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L980
-.LBB287:
-.LBB288:
-	.loc 2 1005 0
-	ldrb	w0, [x20, 2410]
-	cbnz	w0, .L979
-	.loc 2 1000 0
-	ldr	w22, [x20, 2560]
-	.loc 2 1007 0
+	beq	.L986
+	ldrb	w0, [x20, 2434]
+	cbnz	w0, .L985
+	ldr	w22, [x20, 2584]
 	add	x1, x29, 92
-	.loc 2 1002 0
-	ldrh	w24, [x20, 12]
-	.loc 2 1007 0
+	ldrh	w24, [x20, 36]
 	mov	w2, 0
-	.loc 2 1000 0
 	sub	w22, w22, #1
-.LVL1013:
-	.loc 2 1007 0
 	mov	w0, w22
 	bl	log2phys
-.LVL1014:
-	.loc 2 1013 0
-	ldr	x21, [x20, 3384]
-.LVL1015:
-	.loc 2 1010 0
+	ldr	x21, [x20, 3440]
 	ldr	w0, [x29, 92]
-	.loc 2 1012 0
-	ldr	x1, [x20, 3376]
-	.loc 2 1010 0
+	ldr	x1, [x20, 3432]
 	str	w0, [x29, 100]
-	.loc 2 1016 0
 	cmn	w0, #1
-	.loc 2 1013 0
 	stp	x1, x21, [x29, 104]
-	.loc 2 1011 0
 	str	w22, [x29, 120]
-	.loc 2 1015 0
 	str	wzr, [x21, 4]
-	.loc 2 1016 0
-	beq	.L982
-	.loc 2 1018 0
+	beq	.L988
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1016:
-.L983:
-	.loc 2 1027 0
+.L989:
 	add	x25, x19, :lo12:.LANCHOR0
-	.loc 2 1002 0
 	lsl	w24, w24, 2
-.LVL1017:
-	.loc 2 1027 0
-	add	x20, x25, 2400
-	.loc 2 1024 0
+	add	x20, x25, 2424
 	mov	w0, -3947
 	mov	w23, 0
 	strh	w0, [x21]
-.L984:
-	.loc 2 1025 0
+.L990:
 	cmp	w24, w23
-	bne	.L988
-.L985:
-	.loc 2 1041 0
+	bne	.L994
+.L991:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
-	strb	w0, [x19, 2410]
-.L979:
-.LBE288:
-.LBE287:
-	.loc 2 1049 0
+	strb	w0, [x19, 2434]
+.L985:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1018:
 	ldp	x23, x24, [sp, 48]
-.LVL1019:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1020:
-.L982:
-	.cfi_restore_state
-.LBB290:
-.LBB289:
-	.loc 2 1022 0
-	ldrh	w2, [x20, 90]
+.L988:
+	ldrh	w2, [x20, 114]
 	mov	w1, 255
-	ldr	x0, [x20, 3376]
+	ldr	x0, [x20, 3432]
 	bl	ftl_memset
-.LVL1021:
-	b	.L983
-.LVL1022:
-.L988:
-	.loc 2 1027 0
+	b	.L989
+.L994:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L985
-	.loc 2 1032 0
+	cbz	w0, .L991
 	ldr	w0, [x29, 100]
 	add	w23, w23, 1
 	stp	w22, w0, [x21, 8]
-	.loc 2 1033 0
 	ldrh	w0, [x20]
 	strh	w0, [x21, 2]
-	.loc 2 1035 0
 	mov	x0, x20
 	bl	get_new_active_ppa
-.LVL1023:
 	str	w0, [x29, 100]
-	.loc 2 1036 0
-	ldr	w0, [x25, 2600]
-	.loc 2 1037 0
+	ldr	w0, [x25, 2624]
 	mov	w3, 0
-	.loc 2 1036 0
 	str	w0, [x21, 4]
-	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x25, 2600]
-	.loc 2 1037 0
+	str	w0, [x25, 2624]
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1024:
-	.loc 2 1039 0
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-.LVL1025:
-	b	.L984
-.LVL1026:
-.L980:
-.LBE289:
-.LBE290:
-	.loc 2 1047 0
+	b	.L990
+.L986:
 	add	x19, x19, :lo12:.LANCHOR0
-	strb	wzr, [x19, 2410]
-	.loc 2 1049 0
-	b	.L979
-	.cfi_endproc
-.LFE207:
+	strb	wzr, [x19, 2434]
+	b	.L985
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	2
 	.global	l2p_flush
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB200:
-	.loc 2 789 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 795 0
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w19, 0
-.LVL1027:
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1028:
-.L998:
-	.loc 2 795 0 discriminator 1
-	ldrh	w0, [x20, 118]
+.L1004:
+	ldrh	w0, [x20, 142]
 	cmp	w0, w19
-	bhi	.L1000
-	.loc 2 799 0
+	bhi	.L1006
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1029:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1030:
-.L1000:
-	.cfi_restore_state
-	.loc 2 796 0
-	ldr	x1, [x20, 2544]
+.L1006:
+	ldr	x1, [x20, 2568]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L999
-	.loc 2 797 0
+	tbz	w0, #31, .L1005
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1031:
-.L999:
-	.loc 2 795 0 discriminator 2
+.L1005:
 	add	w19, w19, 1
-.LVL1032:
 	and	w19, w19, 65535
-.LVL1033:
-	b	.L998
-	.cfi_endproc
-.LFE200:
+	b	.L1004
 	.size	l2p_flush, .-l2p_flush
 	.align	2
 	.global	FtlRecoverySuperblock
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB220:
-	.loc 2 1705 0
-	.cfi_startproc
-.LVL1034:
 	stp	x29, x30, [sp, -176]!
-	.cfi_def_cfa_offset 176
-	.cfi_offset 29, -176
-	.cfi_offset 30, -168
-	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1705 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -160
-	.cfi_offset 20, -152
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -144
-	.cfi_offset 22, -136
-	.cfi_offset 23, -128
-	.cfi_offset 24, -120
-	.cfi_offset 25, -112
-	.cfi_offset 26, -104
-	.cfi_offset 27, -96
-	.cfi_offset 28, -88
-	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1035:
 	cmp	w0, w1
-	beq	.L1120
-	.loc 2 1725 0
+	beq	.L1126
 	ldrb	w0, [x19, 6]
-.LVL1036:
-	.loc 2 1730 0
 	adrp	x20, .LANCHOR0
-	.loc 2 1725 0
 	str	w0, [x29, 156]
-	.loc 2 1730 0
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL1037:
-	.loc 2 1724 0
 	ldrh	w27, [x19, 2]
-.LVL1038:
-	.loc 2 1730 0
-	ldrh	w0, [x0, 82]
+	ldrh	w0, [x0, 106]
 	cmp	w0, w27
-	bne	.L1005
-	.loc 2 1731 0
+	bne	.L1011
 	strh	wzr, [x19, 4]
-.LVL1039:
-.L1126:
-	.loc 2 1758 0
+.L1132:
 	strb	wzr, [x19, 6]
-.LVL1040:
-.L1120:
-	.loc 2 2059 0
+.L1126:
 	ldp	x19, x20, [sp, 16]
-.LVL1041:
 	mov	w0, 0
-.LVL1042:
 	ldp	x21, x22, [sp, 32]
-.LVL1043:
 	ldp	x23, x24, [sp, 48]
-.LVL1044:
 	ldp	x25, x26, [sp, 64]
-.LVL1045:
 	ldp	x27, x28, [sp, 80]
-.LVL1046:
 	ldp	x29, x30, [sp], 176
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1047:
-.L1005:
-	.cfi_restore_state
-	.loc 2 1738 0
+.L1011:
 	ldrh	w0, [x19, 16]
-	.loc 2 1737 0
 	mov	w21, 0
-.L1006:
-	.loc 2 1739 0
+.L1012:
 	cmp	w0, w1
-	beq	.L1007
-	.loc 2 1746 0
+	beq	.L1013
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1048:
 	mov	w24, w0
-.LVL1049:
-	.loc 2 1754 0
 	cmn	w0, #1
-	beq	.L1008
-	.loc 2 1770 0
+	beq	.L1014
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x19, 16
 	str	x1, [x29, 144]
-	.loc 2 1771 0
 	add	x5, x19, 16
 	mov	w21, 0
-	.loc 2 1768 0
 	mov	w10, 65535
-	ldrh	w1, [x0, 12]
-	.loc 2 1770 0
+	ldrh	w1, [x0, 36]
 	mov	w6, 4
-	ldrh	w8, [x0, 90]
+	ldrh	w8, [x0, 114]
 	add	x1, x1, 8
-	.loc 2 1771 0
-	ldrh	w9, [x0, 92]
+	ldrh	w9, [x0, 116]
 	add	x1, x19, x1, lsl 1
-.L1009:
-	.loc 2 1766 0 discriminator 1
+.L1015:
 	cmp	x5, x1
-	bne	.L1013
-	.loc 2 1776 0
+	bne	.L1019
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w1, w21
-	ldr	x0, [x23, 3960]
+	ldr	x0, [x23, 4016]
 	bl	FlashReadPages
-.LVL1050:
-	.loc 2 1777 0
-	ldr	w22, [x23, 2600]
-	.loc 2 1779 0
-	ldr	x4, [x23, 3960]
-	.loc 2 1791 0
+	ldr	w22, [x23, 2624]
+	ldr	x4, [x23, 4016]
 	and	w9, w24, 65535
-	.loc 2 1777 0
 	sub	w22, w22, #1
-.LVL1051:
-	.loc 2 1715 0
 	mov	w7, 65535
 	mov	x6, x4
-	.loc 2 1778 0
 	mov	w3, 0
-.LVL1052:
-.L1014:
-	.loc 2 1778 0 is_stmt 0 discriminator 1
+.L1020:
 	cmp	w21, w3
-	bne	.L1019
-	.loc 2 1796 0 is_stmt 1
+	bne	.L1025
 	add	w23, w24, 1
-	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1796 0
 	and	w23, w23, 65535
-.LVL1053:
-.L1122:
-	.loc 2 1802 0
+.L1128:
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1054:
 	and	w28, w0, 65535
-.LVL1055:
-	.loc 2 1807 0
 	add	x0, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 82]
+	ldrh	w0, [x0, 106]
 	cmp	w0, w23
-	bne	.L1021
-	.loc 2 1808 0
+	bne	.L1027
 	strh	w23, [x19, 2]
-	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1810 0
 	strh	wzr, [x19, 4]
-.L1021:
-	.loc 2 1813 0
+.L1027:
 	ldr	w0, [x29, 156]
 	cmp	w23, w27
-.LVL1056:
 	ccmp	w28, w0, 0, eq
-	bne	.L1022
-.LVL1057:
-.L1127:
-	.loc 2 2053 0
+	bne	.L1028
+.L1133:
 	mov	w2, w28
 	mov	w1, w23
 	mov	x0, x19
-.LVL1058:
 	bl	ftl_sb_update_avl_pages
-.LVL1059:
-	b	.L1120
-.LVL1060:
-.L1007:
-	.loc 2 1740 0
+	b	.L1126
+.L1013:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 2 1741 0
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1006
-.LVL1061:
-.L1008:
-	.loc 2 1755 0
-	cbz	w27, .L1010
-	.loc 2 1755 0 is_stmt 0 discriminator 1
+	b	.L1012
+.L1014:
+	cbz	w27, .L1016
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL1062:
 	mov	w2, 1755
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1063:
-.L1010:
-	.loc 2 1756 0 is_stmt 1
+.L1016:
 	ldr	w0, [x29, 156]
-.LVL1064:
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L1011
-	.loc 2 1756 0 is_stmt 0 discriminator 1
+	beq	.L1017
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-.LVL1065:
 	mov	w2, 1756
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1066:
-.L1011:
-	.loc 2 1757 0 is_stmt 1
+.L1017:
 	strh	wzr, [x19, 2]
-	b	.L1126
-.LVL1067:
-.L1013:
-	.loc 2 1767 0
+	b	.L1132
+.L1019:
 	ldrh	w2, [x5]
-	.loc 2 1768 0
 	cmp	w2, w10
-	beq	.L1012
-	.loc 2 1769 0
-	ldr	x4, [x0, 3960]
+	beq	.L1018
+	ldr	x4, [x0, 4016]
 	ubfiz	x7, x21, 5, 16
 	orr	w2, w24, w2, lsl 10
 	add	x4, x4, x7
 	str	w2, [x4, 4]
-	.loc 2 1770 0
 	mul	w2, w21, w8
-	ldr	x3, [x0, 3960]
-	ldr	x4, [x0, 3240]
+	ldr	x3, [x0, 4016]
+	ldr	x4, [x0, 3264]
 	sdiv	w2, w2, w6
 	add	x3, x3, x7
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 8]
-	.loc 2 1771 0
 	mul	w2, w21, w9
-	ldr	x4, [x0, 3248]
-	.loc 2 1772 0
+	ldr	x4, [x0, 3272]
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	.loc 2 1771 0
 	sdiv	w2, w2, w6
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 16]
-.L1012:
+.L1018:
 	add	x5, x5, 2
-	b	.L1009
-.LVL1068:
-.L1019:
-	.loc 2 1779 0
+	b	.L1015
+.L1025:
 	ldr	w0, [x6]
-	cbnz	w0, .L1015
-	.loc 2 1780 0
+	cbnz	w0, .L1021
 	ldr	x8, [x6, 16]
-	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1016
-	.loc 2 1782 0
-	ldr	w1, [x23, 2600]
+	beq	.L1022
+	ldr	w1, [x23, 2624]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1069:
-	cbz	w0, .L1016
-	.loc 2 1784 0
+	cbz	w0, .L1022
 	add	w5, w5, 1
-	str	w5, [x23, 2600]
-.L1016:
-	.loc 2 1787 0
+	str	w5, [x23, 2624]
+.L1022:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1018
-	.loc 2 1802 0
+	bne	.L1024
 	ubfiz	x3, x3, 5, 16
-.LVL1070:
-	.loc 2 1801 0
 	and	w23, w24, 65535
-.LVL1071:
-	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1122
-.LVL1072:
-.L1015:
-	.loc 2 1791 0
+	b	.L1128
+.L1021:
 	mov	w7, w9
-.L1018:
-	.loc 2 1778 0 discriminator 2
+.L1024:
 	add	w3, w3, 1
-.LVL1073:
 	add	x6, x6, 32
 	and	w3, w3, 65535
-.LVL1074:
-	b	.L1014
-.LVL1075:
-.L1022:
-	.loc 2 1819 0
+	b	.L1020
+.L1028:
 	mov	w0, 65535
-.LVL1076:
 	adrp	x21, .LANCHOR3
 	cmp	w7, w0
-	bne	.L1023
-	.loc 2 1819 0 is_stmt 0 discriminator 1
+	bne	.L1029
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1024
-.L1023:
-.LBB291:
-	.loc 2 1824 0 is_stmt 1
+	cbnz	w0, .L1030
+.L1029:
 	add	x0, x21, :lo12:.LANCHOR3
-	.loc 2 1823 0
 	and	w3, w24, 65535
-	.loc 2 1824 0
-	ldr	w1, [x0, -92]
+	ldr	w1, [x0, -36]
 	cmn	w1, #1
-	bne	.L1025
-	.loc 2 1825 0
-	str	w22, [x0, -92]
-.L1025:
-	.loc 2 1827 0
+	bne	.L1031
+	str	w22, [x0, -36]
+.L1031:
 	add	w0, w27, 7
 	cmp	w0, w24, uxth
-	bge	.L1073
-	.loc 2 1828 0
+	bge	.L1079
 	sub	w25, w3, #7
 	and	w25, w25, 65535
-.L1026:
-	.loc 2 1831 0 discriminator 1
+.L1032:
 	add	x26, x20, :lo12:.LANCHOR0
-	.loc 2 1833 0 discriminator 1
 	mov	w4, 65535
-.L1027:
-	.loc 2 1829 0 discriminator 1
+.L1033:
 	cmp	w25, w3
-	bhi	.L1034
-	ldrh	w0, [x26, 12]
-	.loc 2 1831 0
+	bhi	.L1040
+	ldrh	w0, [x26, 36]
 	mov	w24, 0
-.LVL1077:
 	ldr	x1, [x29, 144]
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-	b	.L1035
-.LVL1078:
-.L1073:
+	b	.L1041
+.L1079:
 	mov	w25, w27
-	b	.L1026
-.LVL1079:
-.L1029:
-	.loc 2 1832 0
+	b	.L1032
+.L1035:
 	ldrh	w2, [x1]
-	.loc 2 1833 0
 	cmp	w2, w4
-	beq	.L1028
-	.loc 2 1834 0
-	ldr	x5, [x26, 3960]
+	beq	.L1034
+	ldr	x5, [x26, 4016]
 	ubfiz	x6, x24, 5, 16
-	.loc 2 1835 0
 	add	w24, w24, 1
-	.loc 2 1834 0
 	orr	w2, w25, w2, lsl 10
 	add	x5, x5, x6
-	.loc 2 1835 0
 	and	w24, w24, 65535
-	.loc 2 1834 0
 	str	w2, [x5, 4]
-.L1028:
+.L1034:
 	add	x1, x1, 2
-.L1035:
-	.loc 2 1831 0 discriminator 1
+.L1041:
 	cmp	x0, x1
-	bne	.L1029
-	.loc 2 1838 0
-	ldr	x0, [x26, 3960]
+	bne	.L1035
+	ldr	x0, [x26, 4016]
 	mov	w1, w24
 	mov	w2, 0
 	str	w4, [x29, 128]
@@ -12670,897 +7352,546 @@ FtlRecoverySuperblock:
 	ubfiz	x24, x24, 5, 16
 	add	x24, x24, 16
 	bl	FlashReadPages
-.LVL1080:
-	.loc 2 1840 0
-	ldr	x1, [x26, 3960]
-	.loc 2 1846 0
+	ldr	x1, [x26, 4016]
 	add	x2, x21, :lo12:.LANCHOR3
-	.loc 2 1839 0
 	ldr	w4, [x29, 128]
 	ldr	w3, [x29, 136]
 	add	x0, x1, 16
 	add	x24, x1, x24
-.L1030:
-	.loc 2 1839 0 is_stmt 0 discriminator 1
+.L1036:
 	cmp	x24, x0
-	bne	.L1033
-	.loc 2 1829 0 is_stmt 1
+	bne	.L1039
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1027
-.L1033:
-	.loc 2 1840 0
+	b	.L1033
+.L1039:
 	ldr	w1, [x0, -16]
-	cbnz	w1, .L1024
-	.loc 2 1841 0
+	cbnz	w1, .L1030
 	ldr	x1, [x0]
-	.loc 2 1842 0
 	ldrh	w5, [x1]
 	cmp	w5, w4
-	beq	.L1032
-	.loc 2 1844 0
+	beq	.L1038
 	ldr	w1, [x1, 4]
 	cmn	w1, #1
-	beq	.L1032
-	.loc 2 1846 0
-	str	w1, [x2, -92]
-.L1032:
+	beq	.L1038
+	str	w1, [x2, -36]
+.L1038:
 	add	x0, x0, 32
-	b	.L1030
-.LVL1081:
-.L1034:
-	.loc 2 1858 0
+	b	.L1036
+.L1040:
 	add	x0, x21, :lo12:.LANCHOR3
 	mov	w1, -1
-	str	w1, [x0, -92]
-.L1024:
-.LBE291:
-	.loc 2 1863 0
+	str	w1, [x0, -36]
+.L1030:
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, 1
-	.loc 2 1864 0
 	mov	w25, w27
-	.loc 2 1870 0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 1863 0
-	strh	w0, [x21, -88]
-	.loc 2 1864 0
-	sub	x0, x21, #248
+	strh	w0, [x21, -32]
+	sub	x0, x21, #192
 	bl	FtlMapBlkWriteDump_data
-.LVL1082:
-	.loc 2 2019 0
-	sub	x0, x21, #80
+	sub	x0, x21, #24
 	str	x0, [x29, 112]
-.LVL1083:
-.L1036:
-	ldrh	w0, [x20, 12]
-	.loc 2 1869 0
+.L1042:
+	ldrh	w0, [x20, 36]
 	mov	w24, 0
-.LVL1084:
-	.loc 2 1870 0
 	ldr	x1, [x29, 144]
-.LVL1085:
-	.loc 2 1872 0
 	mov	w4, 65535
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-.L1037:
-	.loc 2 1870 0 discriminator 1
+.L1043:
 	cmp	x0, x1
-	bne	.L1039
-	.loc 2 1877 0
-	ldr	x0, [x20, 3960]
+	bne	.L1045
+	ldr	x0, [x20, 4016]
 	mov	w1, w24
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1086:
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 120]
-	.loc 2 2006 0
 	adrp	x0, .LANCHOR1
 	add	x0, x0, :lo12:.LANCHOR1
 	add	x0, x0, 496
-	.loc 2 1878 0
 	mov	x24, 0
-	.loc 2 2006 0
 	str	x0, [x29, 128]
-.LVL1087:
-.L1040:
-	.loc 2 1878 0 discriminator 1
+.L1046:
 	ldr	x0, [x29, 120]
-.LVL1088:
 	cmp	x0, x24
-	bne	.L1067
-	.loc 2 2031 0
+	bne	.L1073
 	add	w25, w25, 1
-	.loc 2 2032 0
-	ldrh	w0, [x20, 82]
-	.loc 2 2031 0
+	ldrh	w0, [x20, 106]
 	and	w25, w25, 65535
-	.loc 2 2032 0
 	cmp	w0, w25
-	bne	.L1036
-	.loc 2 2035 0
-	ldrh	w1, [x20, 12]
-.LVL1089:
+	bne	.L1042
+	ldrh	w1, [x20, 36]
 	mov	w0, 0
-	.loc 2 2033 0
 	strh	w25, [x19, 2]
-	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.L1068:
-	.loc 2 2035 0 discriminator 1
+.L1074:
 	cmp	w0, w1
-	beq	.L1120
-	.loc 2 2037 0
+	beq	.L1126
 	ldr	x4, [x29, 144]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 144]
 	cmp	w3, w2
-	beq	.L1069
-	.loc 2 2038 0
+	beq	.L1075
 	strb	w0, [x19, 6]
-	.loc 2 2039 0
-	b	.L1120
-.L1039:
-	.loc 2 1871 0
+	b	.L1126
+.L1045:
 	ldrh	w2, [x1]
-	.loc 2 1872 0
 	cmp	w2, w4
-	beq	.L1038
-	.loc 2 1873 0
-	ldr	x3, [x20, 3960]
+	beq	.L1044
+	ldr	x3, [x20, 4016]
 	ubfiz	x5, x24, 5, 16
-	.loc 2 1874 0
 	add	w24, w24, 1
-	.loc 2 1873 0
 	orr	w2, w25, w2, lsl 10
 	add	x3, x3, x5
-	.loc 2 1874 0
 	and	w24, w24, 65535
-	.loc 2 1873 0
 	str	w2, [x3, 4]
-.L1038:
+.L1044:
 	add	x1, x1, 2
-	b	.L1037
-.LVL1090:
-.L1067:
-	.loc 2 1879 0
-	ldr	x4, [x20, 3960]
+	b	.L1043
+.L1073:
+	ldr	x4, [x20, 4016]
 	add	x4, x4, x24
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 172]
-	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1091:
 	and	w0, w0, 65535
-.LVL1092:
-	.loc 2 1882 0
 	cmp	w25, w27
-	bcc	.L1041
-	.loc 2 1882 0 is_stmt 0 discriminator 1
+	bcc	.L1047
 	ldr	w1, [x29, 156]
-.LVL1093:
 	ccmp	w1, w0, 0, eq
-	bhi	.L1041
-	.loc 2 1886 0 is_stmt 1
+	bhi	.L1047
 	cmp	w25, w23
 	ccmp	w28, w0, 0, eq
-	beq	.L1042
-	.loc 2 1890 0
+	beq	.L1048
 	ldr	w0, [x4]
-.LVL1094:
 	cmn	w0, #1
-	beq	.L1043
-	.loc 2 1891 0
+	beq	.L1049
 	ldr	x3, [x4, 16]
-	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
-.LVL1095:
 	cmp	w1, w0
-	beq	.L1044
-.L1051:
-.LBB292:
-	.loc 2 1925 0
+	beq	.L1050
+.L1057:
 	ldrh	w0, [x19]
-.L1125:
-.LBE292:
-	.loc 2 2009 0
+.L1131:
 	bl	decrement_vpc_count
-.LVL1096:
-.L1041:
+.L1047:
 	add	x24, x24, 32
-	b	.L1040
-.LVL1097:
-.L1044:
-	.loc 2 1898 0
+	b	.L1046
+.L1050:
 	ldr	w22, [x3, 4]
-.LVL1098:
-	.loc 2 1899 0
 	cmn	w22, #1
-	beq	.L1045
-	.loc 2 1900 0 discriminator 1
-	ldr	w1, [x20, 2600]
+	beq	.L1051
+	ldr	w1, [x20, 2624]
 	mov	w0, w22
 	str	x3, [x29, 136]
 	bl	ftl_cmp_data_ver
-.LVL1099:
-	.loc 2 1899 0 discriminator 1
 	ldr	x3, [x29, 136]
-	cbz	w0, .L1045
-	.loc 2 1902 0
+	cbz	w0, .L1051
 	add	w0, w22, 1
-	str	w0, [x20, 2600]
-.L1045:
-	.loc 2 1905 0
+	str	w0, [x20, 2624]
+.L1051:
 	ldrh	w1, [x3]
 	mov	w0, 61589
 	cmp	w1, w0
-	beq	.L1046
-	.loc 2 1905 0 is_stmt 0 discriminator 1
+	beq	.L1052
 	ldr	x1, [x29, 128]
 	mov	w2, 1905
 	str	x3, [x29, 136]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1100:
 	ldr	x3, [x29, 136]
-.L1046:
-	.loc 2 1907 0 is_stmt 1
+.L1052:
 	ldp	w26, w0, [x3, 8]
-.LVL1101:
-	.loc 2 1908 0
 	add	x1, x29, 168
-	.loc 2 1907 0
 	str	w0, [x29, 164]
-	.loc 2 1908 0
 	mov	w2, 0
-.LVL1102:
 	mov	w0, w26
 	bl	log2phys
-.LVL1103:
-	.loc 2 1909 0
-	ldr	w1, [x21, -92]
+	ldr	w1, [x21, -36]
 	cmn	w1, #1
-	beq	.L1047
-	.loc 2 1910 0 discriminator 1
+	beq	.L1053
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-.LVL1104:
-	.loc 2 1909 0 discriminator 1
-	cbz	w0, .L1047
-.LBB293:
-	.loc 2 1914 0
+	cbz	w0, .L1053
 	ldr	w1, [x29, 164]
 	cmn	w1, #1
-	beq	.L1048
-	.loc 2 1915 0
-	ldr	x0, [x20, 3960]
-	.loc 2 1917 0
+	beq	.L1054
+	ldr	x0, [x20, 4016]
 	mov	w2, 0
-	.loc 2 1915 0
 	add	x0, x0, x24
 	ldr	x4, [x0, 16]
-	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1915 0
 	str	x4, [x29, 136]
-	.loc 2 1917 0
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 4016]
 	add	x0, x0, x24
 	bl	FlashReadPages
-.LVL1105:
-	.loc 2 1930 0
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 4016]
 	ldr	x4, [x29, 136]
 	add	x3, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L1049
-.LVL1106:
-.L1050:
-	.loc 2 1962 0
+	bne	.L1055
+.L1056:
 	mov	w0, -1
 	str	w0, [x29, 164]
-	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1107:
-.L1058:
-.LBE293:
-	.loc 2 2003 0
+.L1064:
 	ldr	w4, [x29, 164]
 	cmn	w4, #1
-	beq	.L1041
-.L1072:
-	.loc 2 2005 0
+	beq	.L1047
+.L1078:
 	lsr	w0, w4, 10
-.LVL1108:
 	bl	P2V_block_in_plane
-.LVL1109:
 	and	w26, w0, 65535
-.LVL1110:
-	.loc 2 2006 0
-	ldrh	w0, [x20, 20]
-	.loc 2 2005 0
+	ldrh	w0, [x20, 44]
 	mov	w3, w26
-.LVL1111:
-	.loc 2 2006 0
 	cmp	w0, w26
-	bhi	.L1063
-	.loc 2 2006 0 is_stmt 0 discriminator 1
+	bhi	.L1069
 	ldr	x1, [x29, 128]
 	mov	w2, 2006
 	adrp	x0, .LC1
 	str	w26, [x29, 136]
-.LVL1112:
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1113:
 	ldr	w3, [x29, 136]
-.LVL1114:
-.L1063:
-	.loc 2 2007 0 is_stmt 1
-	ldr	x1, [x20, 2352]
+.L1069:
+	ldr	x1, [x20, 2376]
 	ubfiz	x0, x26, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1064
-	.loc 2 2009 0
+	cbz	w0, .L1070
 	mov	w0, w3
-	b	.L1125
-.LVL1115:
-.L1048:
-.LBB294:
-	.loc 2 1921 0
+	b	.L1131
+.L1054:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	bne	.L1051
-	.loc 2 1922 0
+	bne	.L1057
 	mov	w2, 1
 	add	x1, x29, 164
 	mov	w0, w26
 	bl	log2phys
-.LVL1116:
-	b	.L1051
-.L1049:
-	.loc 2 1930 0 discriminator 1
+	b	.L1057
+.L1055:
 	ldr	w0, [x4, 8]
 	cmp	w26, w0
-	bne	.L1050
-	.loc 2 1918 0 discriminator 2
+	bne	.L1056
 	ldr	w0, [x4, 4]
-.LVL1117:
 	str	w0, [x29, 136]
 	str	x4, [x29, 104]
-	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
-.LVL1118:
-	ldr	w0, [x21, -92]
+	ldr	w0, [x21, -36]
 	bl	ftl_cmp_data_ver
-.LVL1119:
-	.loc 2 1930 0 discriminator 2
-	cbz	w0, .L1050
-	.loc 2 1932 0
+	cbz	w0, .L1056
 	ldp	w0, w1, [x29, 168]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
-	.loc 2 1934 0
 	ldr	w1, [x29, 164]
-	.loc 2 1932 0
-	bne	.L1053
-.LVL1120:
-.L1123:
-	.loc 2 1958 0
+	bne	.L1059
+.L1129:
 	mov	w0, w26
 	bl	FtlReUsePrevPpa
-.LVL1121:
-	b	.L1050
-.L1053:
-	.loc 2 1935 0
+	b	.L1056
+.L1059:
 	cmp	w0, w1
-	beq	.L1050
-	.loc 2 1936 0
+	beq	.L1056
 	cmn	w0, #1
-	beq	.L1054
-	.loc 2 1937 0
+	beq	.L1060
 	ldr	x4, [x3, 16]
-	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1938 0
 	str	w0, [x3, 4]
-	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1937 0
 	str	x4, [x29, 104]
-	.loc 2 1939 0
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 4016]
 	add	x0, x0, x24
 	bl	FlashReadPages
-.LVL1122:
 	ldr	x4, [x29, 104]
-.L1055:
-	.loc 2 1944 0
-	adrp	x0, .LANCHOR0+3960
-	ldr	x0, [x0, #:lo12:.LANCHOR0+3960]
+.L1061:
+	adrp	x0, .LANCHOR0+4016
+	ldr	x0, [x0, #:lo12:.LANCHOR0+4016]
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	beq	.L1056
-	.loc 2 1945 0
+	beq	.L1062
 	ldr	w3, [x4, 4]
-	.loc 2 1946 0
-	ldr	w0, [x21, -92]
-.LVL1123:
+	ldr	w0, [x21, -36]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1124:
-	cbz	w0, .L1056
-	.loc 2 1947 0
+	cbz	w0, .L1062
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1125:
-	cbz	w0, .L1050
-.L1056:
-	.loc 2 1958 0
+	cbz	w0, .L1056
+.L1062:
 	ldr	w1, [x29, 164]
-	b	.L1123
-.LVL1126:
-.L1054:
-	.loc 2 1941 0
+	b	.L1129
+.L1060:
 	str	w0, [x3]
-	b	.L1055
-.LVL1127:
-.L1047:
-.LBE294:
-	.loc 2 1964 0
+	b	.L1061
+.L1053:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	beq	.L1058
-	.loc 2 1966 0
+	beq	.L1064
 	mov	w2, 1
 	add	x1, x29, 172
 	mov	w0, w26
 	bl	log2phys
-.LVL1128:
-	.loc 2 1967 0
 	ldr	w4, [x29, 168]
 	cmn	w4, #1
-	beq	.L1058
-	.loc 2 1967 0 is_stmt 0 discriminator 1
+	beq	.L1064
 	ldr	w0, [x29, 164]
 	cmp	w4, w0
-	beq	.L1072
-	.loc 2 1968 0 is_stmt 1
+	beq	.L1078
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
-.LVL1129:
-	.loc 2 1970 0
-	ldrh	w1, [x20, 2400]
-	.loc 2 1968 0
+	ldrh	w1, [x20, 2424]
 	and	w0, w0, 65535
-.LVL1130:
-	.loc 2 1970 0
 	cmp	w1, w0
-	beq	.L1062
-	.loc 2 1970 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x20, 2448]
+	beq	.L1068
+	ldrh	w1, [x20, 2472]
 	cmp	w1, w0
-	beq	.L1062
-	.loc 2 1971 0 is_stmt 1
-	ldrh	w1, [x20, 2496]
+	beq	.L1068
+	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1058
-.L1062:
-.LBB295:
-	.loc 2 1976 0
-	ldr	x0, [x20, 3960]
-.LVL1131:
-	.loc 2 1979 0
+	bne	.L1064
+.L1068:
+	ldr	x0, [x20, 4016]
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1978 0
 	str	w4, [x0, 4]
-	.loc 2 1976 0
 	ldr	x3, [x0, 16]
-	.loc 2 1979 0
-	ldr	x0, [x20, 3960]
-	.loc 2 1976 0
+	ldr	x0, [x20, 4016]
 	str	x3, [x29, 136]
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1132:
-	.loc 2 1982 0
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 4016]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1058
-	.loc 2 1983 0
+	beq	.L1064
 	ldr	x3, [x29, 136]
 	mov	w0, w22
 	ldr	w1, [x3, 4]
 	bl	ftl_cmp_data_ver
-.LVL1133:
-	cbnz	w0, .L1058
-	.loc 2 1990 0
+	cbnz	w0, .L1064
 	mov	w2, 1
 	add	x1, x29, 168
 	mov	w0, w26
 	bl	log2phys
-.LVL1134:
-	b	.L1058
-.LVL1135:
-.L1064:
-.LBE295:
-	.loc 2 2011 0
+	b	.L1064
+.L1070:
 	mov	w1, w26
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printk
-.LVL1136:
-	b	.L1041
-.LVL1137:
-.L1043:
-	.loc 2 2018 0
-	ldr	w0, [x21, -84]
+	b	.L1047
+.L1049:
+	ldr	w0, [x21, -28]
 	cmp	w0, 31
-	bhi	.L1065
-	.loc 2 2019 0
+	bhi	.L1071
 	ldr	x1, [x29, 112]
-.LVL1138:
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 2020 0
 	add	w0, w0, 1
-	str	w0, [x21, -84]
-.LVL1139:
-.L1065:
-	.loc 2 2022 0
+	str	w0, [x21, -28]
+.L1071:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1140:
-	.loc 2 2024 0
-	ldr	w0, [x21, -92]
+	ldr	w0, [x21, -36]
 	cmn	w0, #1
-	bne	.L1066
-.L1124:
-	.loc 2 2027 0
-	str	w22, [x21, -92]
-	b	.L1041
-.L1066:
-	.loc 2 2026 0
+	bne	.L1072
+.L1130:
+	str	w22, [x21, -36]
+	b	.L1047
+.L1072:
 	cmp	w22, w0
-	bcs	.L1041
-	b	.L1124
-.L1069:
-	.loc 2 2035 0 discriminator 2
+	bcs	.L1047
+	b	.L1130
+.L1075:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1068
-.LVL1141:
-.L1042:
-	.loc 2 2051 0
+	b	.L1074
+.L1048:
 	strb	w28, [x19, 6]
-	.loc 2 2052 0
 	strh	w23, [x19, 2]
-	b	.L1127
-	.cfi_endproc
-.LFE220:
+	b	.L1133
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB227:
-	.loc 2 2205 0
-	.cfi_startproc
-.LVL1142:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 2212 0
 	adrp	x2, .LANCHOR0
-	.loc 2 2220 0
 	mov	w3, 61589
-	.loc 2 2205 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x0
-	.loc 2 2211 0
 	mov	w0, -1
-.LVL1143:
-	.loc 2 2205 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2211 0
 	str	w0, [x29, 88]
-	.loc 2 2212 0
 	add	x0, x2, :lo12:.LANCHOR0
-	.loc 2 2205 0
 	str	x23, [sp, 48]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 23, -48
-	.loc 2 2229 0
 	mov	x20, x0
 	mov	x23, x2
-	.loc 2 2223 0
 	mov	w22, 7
-	.loc 2 2213 0
-	ldr	x21, [x0, 3384]
-	.loc 2 2212 0
-	ldr	x1, [x0, 3376]
-	.loc 2 2213 0
+	ldr	x21, [x0, 3440]
+	ldr	x1, [x0, 3432]
 	stp	x1, x21, [x29, 72]
-	.loc 2 2216 0
 	mov	w1, -3
 	str	w1, [x21, 8]
-	.loc 2 2217 0
 	mov	w1, -2
 	str	w1, [x21, 12]
-	.loc 2 2218 0
 	ldrh	w1, [x19]
 	strh	w1, [x21, 2]
-	.loc 2 2219 0
 	strh	wzr, [x21]
-	.loc 2 2220 0
-	ldr	x1, [x0, 3376]
+	ldr	x1, [x0, 3432]
 	str	w3, [x1]
-	.loc 2 2221 0
 	mov	w3, 22136
 	movk	w3, 0x1234, lsl 16
-	ldr	x1, [x0, 3376]
+	ldr	x1, [x0, 3432]
 	str	w3, [x1, 4]
-.L1129:
-	.loc 2 2223 0
+.L1135:
 	subs	w22, w22, #1
-	beq	.L1131
-	.loc 2 2224 0
+	beq	.L1137
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1130
-.L1131:
-	.loc 2 2234 0
+	cbnz	w0, .L1136
+.L1137:
 	add	x2, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x19]
 	ldrh	w4, [x19, 4]
-	ldr	x3, [x2, 2352]
+	ldr	x3, [x2, 2376]
 	lsl	x0, x0, 1
 	ldrh	w1, [x3, x0]
 	sub	w1, w1, w4
 	strh	w1, [x3, x0]
-	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2235 0
-	ldrh	w0, [x2, 82]
+	ldrh	w0, [x2, 106]
 	strh	w0, [x19, 2]
-	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2238 0
 	ldp	x19, x20, [sp, 16]
-.LVL1144:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1145:
-.L1130:
-	.cfi_restore_state
-	.loc 2 2226 0
+.L1136:
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1146:
 	str	w0, [x29, 68]
-	.loc 2 2227 0
 	cmn	w0, #1
-	beq	.L1131
-	.loc 2 2229 0
-	ldr	w0, [x20, 2600]
-	.loc 2 2230 0
+	beq	.L1137
+	ldr	w0, [x20, 2624]
 	mov	w3, 0
-	.loc 2 2229 0
 	str	w0, [x21, 4]
-	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2229 0
 	add	w0, w0, 1
-	.loc 2 2230 0
 	mov	w1, 1
-	.loc 2 2229 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x20, 2600]
-	.loc 2 2230 0
+	str	w0, [x20, 2624]
 	add	x0, x29, 64
 	bl	FlashProgPages
-.LVL1147:
-	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1148:
-	b	.L1129
-	.cfi_endproc
-.LFE227:
+	b	.L1135
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLoadBbt
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB168:
-	.loc 4 173 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 4 180 0
 	adrp	x19, .LANCHOR0
-	.loc 4 173 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 4 180 0
 	add	x23, x19, :lo12:.LANCHOR0
-	.loc 4 173 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 4 180 0
-	add	x21, x23, 3344
-	.loc 4 196 0
+	add	x21, x23, 3400
 	mov	w24, 61649
-	.loc 4 180 0
-	ldr	x0, [x23, 3376]
-	.loc 4 181 0
-	ldr	x22, [x23, 3384]
+	ldr	x0, [x23, 3432]
+	ldr	x22, [x23, 3440]
 	stp	x0, x22, [x21, 8]
-	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1149:
-	.loc 4 184 0
-	ldrh	w20, [x23, 78]
+	ldrh	w20, [x23, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-.LVL1150:
-.L1141:
-	.loc 4 184 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x23, 78]
+.L1147:
+	ldrh	w0, [x23, 102]
 	sub	w0, w0, #16
 	cmp	w20, w0
-	ble	.L1144
-	.loc 4 185 0 is_stmt 1
+	ble	.L1150
 	lsl	w0, w20, 10
-	.loc 4 186 0
 	mov	w2, 1
-	.loc 4 185 0
 	str	w0, [x21, 4]
-	.loc 4 186 0
 	mov	w1, w2
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1151:
-	.loc 4 187 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1142
-	.loc 4 188 0
+	bne	.L1148
 	ldr	w0, [x21, 4]
-	.loc 4 189 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 188 0
 	add	w0, w0, 1
 	str	w0, [x21, 4]
-	.loc 4 189 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1152:
-.L1142:
-	.loc 4 191 0
+.L1148:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1143
-	.loc 4 196 0
+	beq	.L1149
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1143
-	.loc 4 199 0
+	bne	.L1149
 	ldr	w1, [x22, 4]
-	str	w1, [x23, 144]
-	.loc 4 198 0
-	strh	w20, [x23, 136]
-	.loc 4 200 0
+	str	w1, [x23, 168]
+	strh	w20, [x23, 160]
 	ldrh	w1, [x22, 8]
-	strh	w1, [x23, 140]
-.L1144:
-	.loc 4 216 0
+	strh	w1, [x23, 164]
+.L1150:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
-	ldrh	w1, [x21, 136]
+	ldrh	w1, [x21, 160]
 	cmp	w1, w0
-	beq	.L1158
-	.loc 4 222 0
-	ldrh	w1, [x21, 140]
+	beq	.L1164
+	ldrh	w1, [x21, 164]
 	cmp	w1, w0
-	beq	.L1148
-	.loc 4 224 0
-	add	x0, x21, 3344
+	beq	.L1154
+	add	x0, x21, 3400
 	lsl	w1, w1, 10
-	.loc 4 225 0
 	mov	w2, 1
-	.loc 4 224 0
 	str	w1, [x0, 4]
-	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1153:
-	.loc 4 226 0
-	ldr	w0, [x21, 3344]
+	ldr	w0, [x21, 3400]
 	cmn	w0, #1
-	beq	.L1148
-	.loc 4 229 0
+	beq	.L1154
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1148
-	.loc 4 229 0 is_stmt 0 discriminator 1
-	ldr	w1, [x21, 144]
+	bne	.L1154
+	ldr	w1, [x21, 168]
 	ldr	w0, [x22, 4]
 	cmp	w0, w1
-	bls	.L1148
-	.loc 4 232 0 is_stmt 1
-	str	w0, [x21, 144]
-	.loc 4 231 0
-	ldrh	w1, [x21, 140]
-	.loc 4 233 0
+	bls	.L1154
+	str	w0, [x21, 168]
+	ldrh	w1, [x21, 164]
 	ldrh	w0, [x22, 8]
-	.loc 4 231 0
-	strh	w1, [x21, 136]
-	.loc 4 233 0
-	strh	w0, [x21, 140]
-.L1148:
-	.loc 4 238 0
+	strh	w1, [x21, 160]
+	strh	w0, [x21, 164]
+.L1154:
 	add	x20, x19, :lo12:.LANCHOR0
-.LVL1154:
 	mov	w1, 1
-	.loc 4 243 0
-	add	x23, x20, 3344
-	.loc 4 247 0
+	add	x23, x20, 3400
 	mov	w24, 61649
-	.loc 4 238 0
-	ldrh	w0, [x20, 136]
+	ldrh	w0, [x20, 160]
 	bl	FtlGetLastWrittenPage
-.LVL1155:
 	sxth	w21, w0
-.LVL1156:
-	.loc 4 239 0
 	add	w0, w0, 1
-	strh	w0, [x20, 138]
-.L1150:
-	.loc 4 241 0
-	tbz	w21, #31, .L1153
-	.loc 4 254 0
+	strh	w0, [x20, 162]
+.L1156:
+	tbz	w21, #31, .L1159
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -13568,1382 +7899,770 @@ FtlLoadBbt:
 	add	x1, x1, 520
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1157:
-.L1152:
-	.loc 4 255 0
+.L1158:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 10]
-	.loc 4 257 0
 	mov	w2, 65535
-	.loc 4 255 0
-	strh	w0, [x1, 142]
-	.loc 4 257 0
+	strh	w0, [x1, 166]
 	ldrh	w0, [x22, 12]
 	cmp	w0, w2
-	beq	.L1155
-	.loc 4 259 0
-	ldr	w2, [x1, 8]
+	beq	.L1161
+	ldr	w2, [x1, 32]
 	cmp	w0, w2
-	beq	.L1155
-	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x1, 22]
+	beq	.L1161
+	ldrh	w1, [x1, 46]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1155
-	.loc 4 261 0 is_stmt 1
+	bcs	.L1161
 	cmp	w0, w1
-	bcs	.L1155
-	.loc 4 263 0
+	bcs	.L1161
 	bl	FtlSysBlkNumInit
-.LVL1158:
-.L1155:
+.L1161:
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 4 269 0 discriminator 1
 	adrp	x21, .LANCHOR3
-.LVL1159:
-	add	x22, x19, 168
+	add	x22, x19, 192
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1160:
-.L1156:
-	.loc 4 268 0 discriminator 1
-	ldrh	w0, [x19, 34]
+.L1162:
+	ldrh	w0, [x19, 58]
 	cmp	w20, w0
-	bcc	.L1157
-	.loc 4 275 0
+	bcc	.L1163
 	mov	w0, 0
-.LVL1161:
-.L1140:
-	.loc 4 276 0
+.L1146:
 	ldp	x19, x20, [sp, 16]
-.LVL1162:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1163:
-.L1143:
-	.cfi_restore_state
-	.loc 4 184 0 discriminator 2
+.L1149:
 	sub	w20, w20, #1
-.LVL1164:
 	and	w20, w20, 65535
-.LVL1165:
-	b	.L1141
-.LVL1166:
-.L1153:
-	.loc 4 243 0
-	ldrh	w0, [x20, 136]
-	.loc 4 245 0
+	b	.L1147
+.L1159:
+	ldrh	w0, [x20, 160]
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 243 0
 	orr	w0, w21, w0, lsl 10
 	str	w0, [x23, 4]
-	.loc 4 244 0
-	ldr	x0, [x20, 3376]
+	ldr	x0, [x20, 3432]
 	str	x0, [x23, 8]
-	.loc 4 245 0
 	mov	x0, x23
 	bl	FlashReadPages
-.LVL1167:
-	.loc 4 247 0
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1151
-	.loc 4 247 0 is_stmt 0 discriminator 1
+	beq	.L1157
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	beq	.L1152
-.L1151:
+	beq	.L1158
+.L1157:
 	sub	w21, w21, #1
-.LVL1168:
 	sxth	w21, w21
-.LVL1169:
-	b	.L1150
-.LVL1170:
-.L1157:
-	.loc 4 269 0 is_stmt 1 discriminator 3
-	ldrh	w2, [x21, -256]
-	ldr	x0, [x19, 3352]
+	b	.L1156
+.L1163:
+	ldrh	w2, [x21, -200]
+	ldr	x0, [x19, 3408]
 	mul	w1, w2, w20
 	lsl	w2, w2, 2
-	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x22], 8
 	bl	ftl_memcpy
-.LVL1171:
-	b	.L1156
-.LVL1172:
-.L1158:
-	.loc 4 218 0
+	b	.L1162
+.L1164:
 	mov	w0, -1
-	b	.L1140
-	.cfi_endproc
-.LFE168:
+	b	.L1146
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB170:
-	.loc 4 317 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	adrp	x19, .LANCHOR0
 	stp	x25, x26, [sp, 64]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x21, x19
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 4 327 0
 	mov	w24, 0
-.LVL1173:
-	.loc 4 317 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1174:
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1175:
-	.loc 4 357 0
 	adrp	x28, .LANCHOR3
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x28, x28, :lo12:.LANCHOR3
-	add	x26, x0, 168
-	add	x25, x0, 148
-	.loc 4 327 0
+	add	x26, x0, 192
+	add	x25, x0, 172
 	mov	x19, x0
-	.loc 4 328 0
-	add	x20, x0, 3344
-.LVL1176:
-.L1171:
-	.loc 4 327 0 discriminator 1
-	ldrh	w0, [x19, 34]
+	add	x20, x0, 3400
+.L1177:
+	ldrh	w0, [x19, 58]
 	cmp	w24, w0
-	bcc	.L1177
-	.loc 4 381 0 discriminator 1
+	bcc	.L1183
 	add	x20, x21, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1178:
-	ldrh	w0, [x20, 94]
+.L1184:
+	ldrh	w0, [x20, 118]
 	cmp	w0, w19
-	bhi	.L1179
-	.loc 4 387 0
-	add	x20, x20, 136
+	bhi	.L1185
+	add	x20, x20, 160
 	ldrh	w19, [x20, 12]
-	.loc 4 396 0
 	mov	w22, 65535
-	.loc 4 387 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1180:
-	.loc 4 387 0 is_stmt 0 discriminator 1
+.L1186:
 	ldrh	w0, [x20, 12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1184
-	.loc 4 389 0 is_stmt 1
+	ble	.L1190
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1177:
 	cmp	w0, 1
-	beq	.L1181
-	.loc 4 391 0
+	beq	.L1187
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1178:
-	cbz	w0, .L1182
-	.loc 4 393 0
+	cbz	w0, .L1188
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1179:
-.L1181:
-	.loc 4 387 0 discriminator 2
+.L1187:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1180
-.L1177:
-	.loc 4 328 0
-	ldr	x0, [x19, 3376]
-	.loc 4 331 0
+	b	.L1186
+.L1183:
+	ldr	x0, [x19, 3432]
 	mov	w2, 65535
-	.loc 4 329 0
-	ldr	x27, [x19, 3384]
-	.loc 4 331 0
+	ldr	x27, [x19, 3440]
 	ldrh	w1, [x25]
-	.loc 4 329 0
 	stp	x0, x27, [x20, 8]
-	.loc 4 331 0
 	cmp	w1, w2
-	beq	.L1172
-	.loc 4 333 0
-	ldrh	w23, [x19, 78]
-.LVL1180:
-	.loc 4 335 0
+	beq	.L1178
+	ldrh	w23, [x19, 102]
 	mov	w2, 1
-	.loc 4 333 0
 	madd	w23, w23, w24, w1
-.LVL1181:
-	.loc 4 335 0
 	mov	w1, w2
-	.loc 4 334 0
 	lsl	w0, w23, 10
 	str	w0, [x20, 4]
-	.loc 4 335 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1182:
-	.loc 4 336 0
 	ldr	x1, [x20, 8]
 	ldr	x0, [x26]
-	ldrh	w2, [x19, 78]
+	ldrh	w2, [x19, 102]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1183:
-.L1173:
-	.loc 4 376 0 discriminator 2
+.L1179:
 	mov	w0, w23
-	.loc 4 327 0 discriminator 2
 	add	w24, w24, 1
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1184:
 	add	x26, x26, 8
 	add	x25, x25, 2
-	b	.L1171
-.L1172:
-	.loc 4 340 0
+	b	.L1177
+.L1178:
 	mov	w1, w24
 	bl	FlashGetBadBlockList
-.LVL1185:
-	.loc 4 341 0
 	ldr	x0, [x20, 8]
 	ldr	x1, [x26]
 	bl	FtlBbt2Bitmap
-.LVL1186:
-	.loc 4 343 0
-	ldrh	w22, [x19, 78]
-.L1175:
-	.loc 4 347 0
+	ldrh	w22, [x19, 102]
+.L1181:
 	sub	w22, w22, #1
 	and	w22, w22, 65535
-.L1174:
-	.loc 4 345 0
-	ldrh	w0, [x19, 78]
+.L1180:
+	ldrh	w0, [x19, 102]
 	madd	w0, w24, w0, w22
 	bl	FtlBbmIsBadBlock
-.LVL1187:
 	cmp	w0, 1
-	beq	.L1175
-	.loc 4 350 0
-	ldr	x0, [x19, 3384]
+	beq	.L1181
+	ldr	x0, [x19, 3440]
 	mov	w2, 16
-	.loc 4 349 0
 	strh	w22, [x25]
-	.loc 4 350 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1188:
-	.loc 4 351 0
-	ldr	x0, [x19, 3376]
+	ldr	x0, [x19, 3432]
 	mov	w2, 4096
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1189:
-	.loc 4 353 0
 	str	wzr, [x27, 4]
-	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x27]
-	.loc 4 354 0
 	ldrh	w0, [x25]
 	strh	w0, [x27, 2]
-	.loc 4 355 0
-	ldrh	w23, [x19, 78]
-.LVL1190:
+	ldrh	w23, [x19, 102]
 	ldrh	w0, [x25]
-	.loc 4 357 0
 	ldr	x1, [x26]
-	ldrh	w2, [x28, -256]
-	.loc 4 355 0
+	ldrh	w2, [x28, -200]
 	madd	w23, w23, w24, w0
-.LVL1191:
-	.loc 4 357 0
 	lsl	w2, w2, 2
-	.loc 4 356 0
 	lsl	w0, w23, 10
 	str	w0, [x20, 4]
-	.loc 4 357 0
 	ldr	x0, [x20, 8]
 	bl	ftl_memcpy
-.LVL1192:
-	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x20
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1193:
-	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1194:
-	.loc 4 360 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1173
-	.loc 4 362 0
+	bne	.L1179
 	mov	w0, w23
 	bl	FtlBbmMapBadBlock
-.LVL1195:
-	.loc 4 363 0
-	b	.L1174
-.L1179:
-	.loc 4 383 0 discriminator 3
+	b	.L1180
+.L1185:
 	mov	w0, w19
-	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1196:
-	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-	b	.L1178
-.L1182:
-	.loc 4 396 0
+	b	.L1184
+.L1188:
 	ldrh	w0, [x20]
 	cmp	w0, w22
-	bne	.L1183
-	.loc 4 398 0
+	bne	.L1189
 	strh	w19, [x20]
-	b	.L1181
-.L1183:
-	.loc 4 402 0
+	b	.L1187
+.L1189:
 	strh	w19, [x20, 4]
-.L1184:
-	.loc 4 411 0
+.L1190:
 	add	x21, x21, :lo12:.LANCHOR0
-	.loc 4 416 0
 	mov	w2, 2
-	.loc 4 414 0
-	ldr	x1, [x21, 3904]
-	ldrh	w0, [x21, 136]
-	.loc 4 413 0
-	str	wzr, [x21, 144]
-	.loc 4 411 0
-	strh	wzr, [x21, 138]
-	.loc 4 414 0
+	ldr	x1, [x21, 3960]
+	ldrh	w0, [x21, 160]
+	str	wzr, [x21, 168]
+	strh	wzr, [x21, 162]
 	lsl	w0, w0, 10
 	str	w0, [x1, 4]
-	.loc 4 415 0
-	ldr	x0, [x21, 3904]
-	ldrh	w1, [x21, 140]
+	ldr	x0, [x21, 3960]
+	ldrh	w1, [x21, 164]
 	lsl	w1, w1, 10
 	str	w1, [x0, 36]
-	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1197:
-	.loc 4 418 0
-	ldrh	w0, [x21, 136]
+	ldrh	w0, [x21, 160]
 	bl	FtlBbmMapBadBlock
-.LVL1198:
-	.loc 4 419 0
-	ldrh	w0, [x21, 140]
+	ldrh	w0, [x21, 164]
 	bl	FtlBbmMapBadBlock
-.LVL1199:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1200:
-	.loc 4 426 0
-	strh	wzr, [x21, 138]
-	.loc 4 422 0
-	ldr	w0, [x21, 144]
-	.loc 4 425 0
-	ldrh	w1, [x21, 140]
-	.loc 4 422 0
+	strh	wzr, [x21, 162]
+	ldr	w0, [x21, 168]
+	ldrh	w1, [x21, 164]
 	add	w0, w0, 1
-	str	w0, [x21, 144]
-	.loc 4 424 0
-	ldrh	w0, [x21, 136]
-	.loc 4 427 0
-	strh	w0, [x21, 140]
-	.loc 4 425 0
-	strh	w1, [x21, 136]
-	.loc 4 429 0
+	str	w0, [x21, 168]
+	ldrh	w0, [x21, 160]
+	strh	w0, [x21, 164]
+	strh	w1, [x21, 160]
 	bl	FtlBbmTblFlush
-.LVL1201:
-	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1202:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE170:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.align	2
 	.global	FtlVendorPartWrite
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB202:
-	.loc 2 835 0
-	.cfi_startproc
-.LVL1203:
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.loc 2 843 0
-	adrp	x23, .LANCHOR0
-	.loc 2 835 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	mov	x26, x2
 	stp	x27, x28, [sp, 80]
-	.loc 2 843 0
-	add	w2, w0, w1
-.LVL1204:
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 2 835 0
-	mov	w28, w0
-	.loc 2 843 0
-	add	x0, x23, :lo12:.LANCHOR0
-.LVL1205:
-	.loc 2 835 0
+	mov	w27, w0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	mov	w21, w1
+	adrp	x22, .LANCHOR0
+	stp	x23, x24, [sp, 48]
+	mov	x24, x2
+	add	w2, w0, w1
+	add	x0, x22, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
-	.loc 2 843 0
-	ldrh	w1, [x0, 76]
-.LVL1206:
+	mov	w28, w1
+	stp	x25, x26, [sp, 64]
+	ldrh	w1, [x0, 100]
 	cmp	w2, w1
-	bhi	.L1198
-	.loc 2 840 0
-	ldrh	w22, [x0, 88]
-	.loc 2 861 0
-	adrp	x24, .LANCHOR3
-	add	x24, x24, :lo12:.LANCHOR3
-	.loc 2 855 0
-	add	x27, x29, 144
-	.loc 2 861 0
-	sub	x24, x24, #176
-	.loc 2 840 0
-	mov	w25, 0
-	lsr	w22, w28, w22
-.LVL1207:
-.L1192:
-	.loc 2 846 0
-	cbnz	w21, .L1197
-.L1190:
-	.loc 2 869 0
-	mov	w0, w25
-	ldp	x19, x20, [sp, 16]
-.LVL1208:
-	ldp	x21, x22, [sp, 32]
-.LVL1209:
+	bhi	.L1204
+	ldrh	w21, [x0, 112]
+	adrp	x26, .LANCHOR3
+	add	x25, x26, :lo12:.LANCHOR3
+	mov	w23, 0
+	sub	x25, x25, #120
+	lsr	w21, w27, w21
+.L1198:
+	cbnz	w28, .L1203
+.L1196:
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1210:
 	ldp	x27, x28, [sp, 80]
-.LVL1211:
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1212:
-.L1197:
-	.cfi_restore_state
-	.loc 2 847 0
-	add	x2, x23, :lo12:.LANCHOR0
-	.loc 2 848 0
-	ldrh	w1, [x2, 38]
-	.loc 2 847 0
-	ldr	x0, [x2, 4064]
-	.loc 2 848 0
-	udiv	w20, w28, w1
-	.loc 2 847 0
-	ldr	w3, [x0, w22, uxtw 2]
-	.loc 2 851 0
-	and	w0, w21, 65535
-.LVL1213:
-	.loc 2 848 0
-	msub	w20, w20, w1, w28
-	.loc 2 849 0
+.L1203:
+	add	x2, x22, :lo12:.LANCHOR0
+	add	x0, x26, :lo12:.LANCHOR3
+	ldrh	w1, [x2, 62]
+	ldr	x0, [x0, -232]
+	udiv	w20, w27, w1
+	ldr	w4, [x0, w21, uxtw 2]
+	and	w0, w28, 65535
+	msub	w20, w20, w1, w27
 	sub	w19, w1, w20
-.LVL1214:
 	and	w19, w19, 65535
-.LVL1215:
-	.loc 2 851 0
-	cmp	w21, w19
+	cmp	w28, w19
 	csel	w19, w0, w19, cc
-.LVL1216:
-	.loc 2 852 0
-	cbz	w3, .L1194
-	.loc 2 852 0 is_stmt 0 discriminator 1
+	cbz	w4, .L1200
 	cmp	w19, w1
-	beq	.L1194
-	.loc 2 854 0 is_stmt 1
-	ldr	x0, [x2, 3992]
-	.loc 2 856 0
+	beq	.L1200
+	ldr	x0, [x2, 4048]
 	mov	w2, 1
-	.loc 2 855 0
-	stp	x0, x27, [x29, 120]
-	.loc 2 856 0
+	str	x0, [x29, 120]
+	add	x0, x29, 144
 	mov	w1, w2
-	.loc 2 853 0
-	str	w3, [x29, 116]
-	.loc 2 856 0
+	str	x0, [x29, 128]
+	str	w4, [x29, 116]
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL1217:
-.L1195:
-	.loc 2 860 0
-	add	x4, x23, :lo12:.LANCHOR0
-	lsl	w3, w19, 9
+.L1201:
+	add	x5, x22, :lo12:.LANCHOR0
+	lsl	w4, w19, 9
 	lsl	w20, w20, 9
-	mov	w2, w3
+	mov	w2, w4
 	asr	w20, w20, 2
-	mov	x1, x26
-	ldr	x0, [x4, 3992]
-	.loc 2 864 0
-	sub	w21, w21, w19
-	.loc 2 860 0
-	str	w3, [x29, 108]
-	.loc 2 865 0
-	add	w28, w28, w19
-	.loc 2 860 0
-	str	x4, [x29, 96]
+	mov	x1, x24
+	ldr	x0, [x5, 4048]
+	sub	w28, w28, w19
+	str	w4, [x29, 108]
+	add	w27, w27, w19
+	str	x5, [x29, 96]
 	add	x0, x0, x20, sxtw 2
 	bl	ftl_memcpy
-.LVL1218:
-	.loc 2 861 0
-	ldr	x4, [x29, 96]
-	mov	w1, w22
-	mov	x0, x24
-	.loc 2 863 0
-	add	w22, w22, 1
-	.loc 2 861 0
-	ldr	x2, [x4, 3992]
+	ldr	x5, [x29, 96]
+	mov	w1, w21
+	mov	x0, x25
+	add	w21, w21, 1
+	ldr	x2, [x5, 4048]
 	bl	FtlMapWritePage
-.LVL1219:
-	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 866 0
-	ldr	w3, [x29, 108]
-	.loc 2 862 0
-	csinv	w25, w25, wzr, ne
-	.loc 2 866 0
-	add	x26, x26, x3, sxtw
-	b	.L1192
-.LVL1220:
-.L1194:
-	.loc 2 858 0
-	add	x0, x23, :lo12:.LANCHOR0
-.LVL1221:
+	ldr	w4, [x29, 108]
+	csinv	w23, w23, wzr, ne
+	add	x24, x24, x4, sxtw
+	b	.L1198
+.L1200:
+	add	x0, x22, :lo12:.LANCHOR0
 	mov	w1, 0
-	ldrh	w2, [x0, 90]
-	ldr	x0, [x0, 3992]
+	ldrh	w2, [x0, 114]
+	ldr	x0, [x0, 4048]
 	bl	ftl_memset
-.LVL1222:
-	b	.L1195
-.LVL1223:
-.L1198:
-	.loc 2 844 0
-	mov	w25, -1
-	b	.L1190
-	.cfi_endproc
-.LFE202:
+	b	.L1201
+.L1204:
+	mov	w23, -1
+	b	.L1196
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB225:
-	.loc 2 2159 0
-	.cfi_startproc
-	.loc 2 2160 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	ldr	w3, [x0, 2696]
+	ldr	w3, [x0, 2720]
 	cmp	w3, w1
-	bne	.L1206
-	.loc 2 2159 0
+	bne	.L1212
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	add	x2, x0, 2696
-.LBB298:
-.LBB299:
-	.loc 2 2161 0
+	add	x2, x0, 2720
 	mov	w1, 68
-.LBE299:
-.LBE298:
-	.loc 2 2159 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.LBB302:
-.LBB300:
-	.loc 2 2161 0
 	movk	w1, 0x5000, lsl 16
-.LBE300:
-.LBE302:
-	.loc 2 2159 0
-.LBB303:
-.LBB301:
-	.loc 2 2161 0
 	str	w1, [x2, 4]
-	.loc 2 2162 0
-	ldr	w1, [x0, 2588]
+	ldr	w1, [x0, 2612]
 	str	w1, [x2, 88]
-	.loc 2 2163 0
-	ldr	w1, [x0, 2592]
+	ldr	w1, [x0, 2616]
 	str	w1, [x2, 92]
-	.loc 2 2164 0
-	ldr	w1, [x0, 2584]
+	ldr	w1, [x0, 2608]
 	str	w1, [x2, 8]
-	.loc 2 2165 0
-	ldr	w1, [x0, 2572]
+	ldr	w1, [x0, 2596]
 	str	w1, [x2, 12]
-	.loc 2 2166 0
-	ldr	w1, [x0, 2564]
+	ldr	w1, [x0, 2588]
 	str	w1, [x2, 16]
-	.loc 2 2167 0
-	ldr	w1, [x0, 2580]
+	ldr	w1, [x0, 2604]
 	str	w1, [x2, 20]
-	.loc 2 2168 0
-	ldr	w1, [x0, 2608]
+	ldr	w1, [x0, 2632]
 	str	w1, [x2, 28]
-	.loc 2 2169 0
-	ldr	w1, [x0, 2616]
+	ldr	w1, [x0, 2640]
 	str	w1, [x2, 32]
-	.loc 2 2170 0
-	ldr	w1, [x0, 2568]
+	ldr	w1, [x0, 2592]
 	str	w1, [x2, 36]
-	.loc 2 2171 0
-	ldr	w1, [x0, 2576]
+	ldr	w1, [x0, 2600]
 	str	w1, [x2, 40]
-	.loc 2 2172 0
-	ldr	w1, [x0, 2620]
-	.loc 2 2173 0
-	ldr	w0, [x0, 2624]
+	ldr	w1, [x0, 2644]
+	ldr	w0, [x0, 2648]
 	stp	w1, w0, [x2, 44]
-	.loc 2 2174 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	FtlVendorPartWrite
-.LVL1224:
-.LBE301:
-.LBE303:
-	.loc 2 2176 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.L1206:
+.L1212:
 	ret
-	.cfi_endproc
-.LFE225:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB204:
-	.loc 2 910 0
-	.cfi_startproc
-.LVL1225:
-	.loc 2 913 0
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
-	ldrh	w2, [x1, 48]
+	ldrh	w2, [x1, 104]
 	cmp	w2, 31
-	bhi	.L1213
-	.loc 2 914 0
+	bhi	.L1219
 	add	w2, w2, 1
-	strh	w2, [x1, 48]
-	.loc 2 915 0
+	strh	w2, [x1, 104]
 	mov	w2, 1
-.LVL1226:
-.L1210:
+.L1216:
 	adrp	x1, .LANCHOR0
-	.loc 2 917 0
-	cbnz	w0, .L1211
-	.loc 2 917 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L1217
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL1227:
-	ldr	x0, [x0, 4016]
+	ldr	x0, [x0, 4072]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w2, w2, w3
-.LVL1228:
 	cmp	w0, w2
-	bcc	.L1215
-.LVL1229:
-.L1211:
-	.loc 2 919 0 is_stmt 1
+	bcc	.L1221
+.L1217:
 	add	x0, x1, :lo12:.LANCHOR0
-.LVL1230:
-	.loc 2 910 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 919 0
-	ldr	x1, [x0, 4016]
+	ldr	x1, [x0, 4072]
 	ldr	w2, [x1, 16]
-.LVL1231:
 	str	w2, [x1, 20]
-	.loc 2 920 0
 	mov	w2, 17221
 	movk	w2, 0x4254, lsl 16
 	str	w2, [x1]
-	.loc 2 921 0
-	ldr	x2, [x0, 4016]
-	ldrh	w1, [x0, 4000]
+	ldr	x2, [x0, 4072]
+	ldrh	w1, [x0, 4056]
 	lsl	w3, w1, 9
-	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 921 0
 	str	w3, [x2, 12]
-	.loc 2 922 0
 	ldr	w3, [x2, 8]
 	add	w3, w3, 1
 	str	w3, [x2, 8]
-	.loc 2 924 0
-	ldr	x2, [x0, 4016]
+	ldr	x2, [x0, 4072]
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1232:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1233:
-	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1234:
-.L1213:
-	.loc 2 911 0
+.L1219:
 	mov	w2, 32
-.LVL1235:
-	b	.L1210
-.LVL1236:
-.L1215:
-	.loc 2 927 0
+	b	.L1216
+.L1221:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE204:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.align	2
+	.global	sftl_vendor_write
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	stp	x29, x30, [sp, -16]!
+	add	w0, w0, 256
+	add	x29, sp, 0
+	bl	FtlVendorPartWrite
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	sftl_vendor_write, .-sftl_vendor_write
+	.align	2
 	.global	FtlVendorPartRead
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB203:
-	.loc 2 872 0
-	.cfi_startproc
-.LVL1237:
 	stp	x29, x30, [sp, -192]!
-	.cfi_def_cfa_offset 192
-	.cfi_offset 29, -192
-	.cfi_offset 30, -184
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -176
-	.cfi_offset 20, -168
-	.loc 2 881 0
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 872 0
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 27, -112
-	.cfi_offset 28, -104
-	.cfi_offset 21, -160
-	.cfi_offset 22, -152
 	mov	w28, w0
 	mov	w27, w1
 	stp	x23, x24, [sp, 48]
-	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1238:
-	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -144
-	.cfi_offset 24, -136
-	.cfi_offset 25, -128
-	.cfi_offset 26, -120
-	.loc 2 881 0
-	ldrh	w0, [x20, 76]
-.LVL1239:
+	ldrh	w0, [x20, 100]
 	cmp	w1, w0
-	bhi	.L1225
-	.loc 2 877 0
-	ldrh	w3, [x20, 88]
+	bhi	.L1233
+	ldrh	w3, [x20, 112]
+	adrp	x24, .LANCHOR3
 	mov	x23, x2
+	add	x24, x24, :lo12:.LANCHOR3
 	mov	w22, 0
-	.loc 2 895 0
-	mov	w25, -1
-	.loc 2 877 0
-	lsr	w24, w28, w3
-.LVL1240:
-.L1219:
-	.loc 2 883 0
-	cbnz	w27, .L1224
-.L1217:
-	.loc 2 906 0
+	lsr	w25, w28, w3
+.L1227:
+	cbnz	w27, .L1232
+.L1225:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1241:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1242:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1243:
 	ldp	x29, x30, [sp], 192
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1244:
-.L1224:
-	.cfi_restore_state
-	.loc 2 885 0
-	ldrh	w19, [x20, 38]
-.LVL1245:
-	.loc 2 884 0
-	ldr	x0, [x20, 4064]
-	.loc 2 885 0
+.L1232:
+	ldrh	w19, [x20, 62]
+	ldr	x0, [x24, -232]
 	udiv	w21, w28, w19
-	.loc 2 884 0
-	ldr	w1, [x0, w24, uxtw 2]
-	.loc 2 888 0
+	ldr	w1, [x0, w25, uxtw 2]
 	and	w0, w27, 65535
-.LVL1246:
-	.loc 2 885 0
 	msub	w21, w21, w19, w28
-	.loc 2 886 0
 	sub	w19, w19, w21
 	and	w19, w19, 65535
-.LVL1247:
-	.loc 2 888 0
 	cmp	w27, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-.LVL1248:
-	.loc 2 889 0
-	cbz	w1, .L1221
-	.loc 2 891 0
-	ldr	x0, [x20, 3992]
-	.loc 2 893 0
+	cbz	w1, .L1229
+	ldr	x0, [x20, 4048]
 	mov	w2, 1
-	.loc 2 891 0
 	str	x0, [x29, 104]
-	.loc 2 892 0
 	add	x0, x29, 128
-	.loc 2 890 0
 	str	w1, [x29, 100]
-	.loc 2 893 0
 	mov	w1, w2
-.LVL1249:
-	.loc 2 892 0
 	str	x0, [x29, 112]
-	.loc 2 893 0
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1250:
-	.loc 2 896 0
 	lsl	w21, w21, 9
-	.loc 2 894 0
 	ldr	w0, [x29, 96]
-	.loc 2 896 0
 	asr	w21, w21, 2
-	ldr	x1, [x20, 3992]
+	ldr	x1, [x20, 4048]
 	mov	w2, w26
-	.loc 2 895 0
 	cmn	w0, #1
-	.loc 2 896 0
 	mov	x0, x23
-	.loc 2 895 0
-	csel	w22, w22, w25, ne
-	.loc 2 896 0
+	csinv	w22, w22, wzr, ne
 	add	x1, x1, x21, sxtw 2
 	bl	ftl_memcpy
-.LVL1251:
-.L1223:
-	.loc 2 900 0
-	add	w24, w24, 1
-	.loc 2 901 0
+.L1231:
+	add	w25, w25, 1
 	sub	w27, w27, w19
-	.loc 2 902 0
 	add	w28, w28, w19
-	.loc 2 903 0
 	add	x23, x23, x26, sxtw
-	b	.L1219
-.LVL1252:
-.L1221:
-	.loc 2 898 0
+	b	.L1227
+.L1229:
 	mov	w2, w26
 	mov	w1, 0
-.LVL1253:
 	mov	x0, x23
-.LVL1254:
 	bl	ftl_memset
-.LVL1255:
-	b	.L1223
-.LVL1256:
-.L1225:
-	.loc 2 882 0
+	b	.L1231
+.L1233:
 	mov	w22, -1
-	b	.L1217
-	.cfi_endproc
-.LFE203:
+	b	.L1225
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB210:
-	.loc 2 1383 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1383 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 1384 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x19, 4000]
-	ldr	x2, [x19, 4016]
+	ldrh	w1, [x19, 4056]
+	ldr	x2, [x19, 4072]
 	bl	FtlVendorPartRead
-.LVL1257:
-	.loc 2 1385 0
-	ldr	x0, [x19, 4016]
+	ldr	x0, [x19, 4072]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1228
-.LBB306:
-.LBB307:
-	.loc 2 1387 0
-	adrp	x1, .LC99
+	beq	.L1236
+	adrp	x1, .LC100
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC99
+	add	x1, x1, :lo12:.LC100
 	add	x0, x0, :lo12:.LC71
 	bl	printk
-.LVL1258:
-	.loc 2 1388 0
-	ldr	x0, [x19, 4016]
+	ldr	x0, [x19, 4072]
 	mov	w1, 0
-	ldrh	w2, [x19, 4000]
+	ldrh	w2, [x19, 4056]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1259:
-.L1228:
-.LBE307:
-.LBE306:
-	.loc 2 1393 0
+.L1236:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE210:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.align	2
 	.global	Ftl_load_ext_data
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB226:
-	.loc 2 2179 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2179 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2180 0
 	adrp	x19, .LANCHOR0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 2 2179 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 2 2180 0
-	add	x22, x20, 2696
-	.loc 2 2181 0
+	add	x22, x20, 2720
 	mov	w21, 19539
-	.loc 2 2180 0
 	mov	x2, x22
 	bl	FtlVendorPartRead
-.LVL1260:
-	.loc 2 2181 0
-	ldr	w0, [x20, 2696]
+	ldr	w0, [x20, 2720]
 	movk	w21, 0x4654, lsl 16
 	cmp	w0, w21
-	beq	.L1231
-	.loc 2 2182 0
+	beq	.L1239
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x22
 	bl	ftl_memset
-.LVL1261:
-	.loc 2 2183 0
-	str	w21, [x20, 2696]
-.L1231:
-	.loc 2 2186 0
+	str	w21, [x20, 2720]
+.L1239:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
-	ldr	w3, [x0, 2696]
+	ldr	w3, [x0, 2720]
 	cmp	w3, w2
-	bne	.L1232
-	.loc 2 2187 0
-	ldr	w2, [x0, 2784]
-	str	w2, [x0, 2588]
-	.loc 2 2188 0
-	ldr	w2, [x0, 2788]
-	str	w2, [x0, 2592]
-	.loc 2 2189 0
-	ldr	w2, [x0, 2704]
-	str	w2, [x0, 2584]
-	.loc 2 2190 0
-	ldr	w2, [x0, 2708]
-	str	w2, [x0, 2572]
-	.loc 2 2191 0
-	ldr	w2, [x0, 2712]
-	str	w2, [x0, 2564]
-	.loc 2 2192 0
-	ldr	w2, [x0, 2716]
-	str	w2, [x0, 2580]
-	.loc 2 2193 0
-	ldr	w2, [x0, 2724]
-	str	w2, [x0, 2608]
-	.loc 2 2194 0
-	ldr	w2, [x0, 2728]
+	bne	.L1240
+	ldr	w2, [x0, 2808]
+	str	w2, [x0, 2612]
+	ldr	w2, [x0, 2812]
 	str	w2, [x0, 2616]
-	.loc 2 2195 0
+	ldr	w2, [x0, 2728]
+	str	w2, [x0, 2608]
 	ldr	w2, [x0, 2732]
-	str	w2, [x0, 2568]
-	.loc 2 2196 0
+	str	w2, [x0, 2596]
 	ldr	w2, [x0, 2736]
-	.loc 2 2198 0
-	ldr	w1, [x0, 2744]
-	.loc 2 2196 0
-	str	w2, [x0, 2576]
-	.loc 2 2197 0
+	str	w2, [x0, 2588]
 	ldr	w2, [x0, 2740]
-	.loc 2 2198 0
-	str	w1, [x0, 2624]
-	.loc 2 2197 0
-	str	w2, [x0, 2620]
-.L1232:
-	.loc 2 2201 0
+	str	w2, [x0, 2604]
+	ldr	w2, [x0, 2748]
+	str	w2, [x0, 2632]
+	ldr	w2, [x0, 2752]
+	str	w2, [x0, 2640]
+	ldr	w2, [x0, 2756]
+	str	w2, [x0, 2592]
+	ldr	w2, [x0, 2760]
+	ldr	w1, [x0, 2768]
+	str	w2, [x0, 2600]
+	ldr	w2, [x0, 2764]
+	str	w1, [x0, 2648]
+	str	w2, [x0, 2644]
+.L1240:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldr	w2, [x0, 2608]
-	ldrh	w1, [x0, 72]
-	ldr	w3, [x0, 2604]
+	ldr	w2, [x0, 2632]
+	ldrh	w1, [x0, 96]
+	ldr	w3, [x0, 2628]
 	madd	w1, w1, w3, w2
-	ldrh	w2, [x0, 20]
+	ldrh	w2, [x0, 44]
 	udiv	w1, w1, w2
-	str	w1, [x0, 2612]
-	.loc 2 2202 0
+	str	w1, [x0, 2636]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE226:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.align	2
+	.global	sftl_vendor_read
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	stp	x29, x30, [sp, -16]!
+	add	w0, w0, 256
+	add	x29, sp, 0
+	bl	FtlVendorPartRead
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	sftl_vendor_read, .-sftl_vendor_read
+	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB208:
-	.loc 2 1053 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 1059 0
-	adrp	x22, .LANCHOR0
-	add	x19, x22, :lo12:.LANCHOR0
-	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR0
+	add	x19, x23, :lo12:.LANCHOR0
+	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 1068 0
-	add	x20, x19, 2288
-	.loc 2 1059 0
-	add	x25, x19, 3344
-	.loc 2 1056 0
-	mov	w23, 0
-.LVL1262:
-	.loc 2 1060 0
-	ldr	x21, [x19, 3384]
-	.loc 2 1054 0
+	add	x20, x19, 2312
+	add	x25, x19, 3400
+	mov	w22, 0
+	ldr	x21, [x19, 3440]
 	mov	w24, 65535
-.LVL1263:
-	.loc 2 1059 0
-	ldr	x0, [x19, 3376]
-	.loc 2 1062 0
-	ldrh	w1, [x19, 2632]
-	.loc 2 1059 0
-	str	x0, [x19, 3352]
-	.loc 2 1060 0
-	str	x21, [x19, 3360]
-	.loc 2 1062 0
+	ldr	x0, [x19, 3432]
+	ldrh	w1, [x19, 2656]
+	str	x0, [x19, 3408]
+	str	x21, [x19, 3416]
 	strh	w1, [x21, 2]
-	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1064 0
-	ldr	w1, [x19, 2640]
-	.loc 2 1065 0
+	ldr	w1, [x19, 2664]
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1068 0
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	str	w1, [x19, 2288]
-	.loc 2 1069 0
+	str	w1, [x19, 2312]
 	mov	w1, 68
-	.loc 2 1074 0
-	ldrb	w2, [x19, 2406]
-	.loc 2 1069 0
+	ldrb	w2, [x19, 2430]
 	movk	w1, 0x5000, lsl 16
-	str	w1, [x19, 2292]
-	.loc 2 1073 0
-	ldrh	w1, [x19, 2400]
-	strh	w1, [x19, 2302]
-	.loc 2 1074 0
-	ldrh	w1, [x19, 2402]
-	.loc 2 1070 0
-	ldrh	w0, [x19, 2638]
-	strh	w0, [x19, 2296]
-	.loc 2 1071 0
-	ldrh	w0, [x19, 34]
-	.loc 2 1074 0
+	str	w1, [x19, 2316]
+	ldrh	w1, [x19, 2424]
+	strh	w1, [x19, 2326]
+	ldrh	w1, [x19, 2426]
+	ldrh	w0, [x19, 2662]
+	strh	w0, [x19, 2320]
+	ldrh	w0, [x19, 58]
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1071 0
-	strb	w0, [x19, 2298]
-	.loc 2 1074 0
-	strh	w1, [x19, 2304]
-	.loc 2 1077 0
-	ldrh	w1, [x19, 2448]
-	.loc 2 1078 0
-	ldrb	w2, [x19, 2454]
-	.loc 2 1077 0
-	strh	w1, [x19, 2306]
-	.loc 2 1078 0
-	ldrh	w1, [x19, 2450]
-	.loc 2 1075 0
-	ldrb	w0, [x19, 2408]
-	strb	w0, [x19, 2299]
-	.loc 2 1078 0
+	strb	w0, [x19, 2322]
+	strh	w1, [x19, 2328]
+	ldrh	w1, [x19, 2472]
+	ldrb	w2, [x19, 2478]
+	strh	w1, [x19, 2330]
+	ldrh	w1, [x19, 2474]
+	ldrb	w0, [x19, 2432]
+	strb	w0, [x19, 2323]
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1079 0
-	ldrb	w0, [x19, 2456]
-	.loc 2 1078 0
-	strh	w1, [x19, 2308]
-	.loc 2 1079 0
-	strb	w0, [x19, 2300]
-	.loc 2 1081 0
-	ldrh	w1, [x19, 2496]
-	.loc 2 1083 0
-	ldrb	w0, [x19, 2504]
-	.loc 2 1082 0
-	ldrb	w2, [x19, 2502]
-	.loc 2 1081 0
-	strh	w1, [x19, 2310]
-	.loc 2 1083 0
-	strb	w0, [x19, 2301]
-	.loc 2 1082 0
-	ldrh	w1, [x19, 2498]
-	.loc 2 1085 0
-	ldr	w0, [x19, 2604]
-	str	w0, [x19, 2320]
-	.loc 2 1090 0
-	ldr	w0, [x19, 2596]
-	.loc 2 1082 0
+	ldrb	w0, [x19, 2480]
+	strh	w1, [x19, 2332]
+	strb	w0, [x19, 2324]
+	ldrh	w1, [x19, 2520]
+	ldrb	w0, [x19, 2528]
+	ldrb	w2, [x19, 2526]
+	strh	w1, [x19, 2334]
+	strb	w0, [x19, 2325]
+	ldrh	w1, [x19, 2522]
+	ldr	w0, [x19, 2628]
+	str	w0, [x19, 2344]
+	ldr	w0, [x19, 2620]
 	orr	w1, w2, w1, lsl 6
-	.loc 2 1090 0
-	str	w0, [x19, 2328]
-	.loc 2 1091 0
-	ldr	w0, [x19, 2600]
-	.loc 2 1096 0
-	ldrh	w2, [x19, 90]
-	.loc 2 1091 0
-	str	w0, [x19, 2324]
-	.loc 2 1096 0
-	ldr	x0, [x19, 3352]
-	.loc 2 1082 0
-	strh	w1, [x19, 2312]
-	.loc 2 1096 0
+	str	w0, [x19, 2352]
+	ldr	w0, [x19, 2624]
+	ldrh	w2, [x19, 114]
+	str	w0, [x19, 2348]
+	ldr	x0, [x19, 3408]
+	strh	w1, [x19, 2336]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1264:
-	.loc 2 1097 0
-	ldr	x0, [x19, 3352]
+	ldr	x0, [x19, 3408]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1102 0
 	mov	x20, x25
-	.loc 2 1124 0
 	adrp	x25, .LANCHOR1
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x25, x25, 536
-	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1265:
-	.loc 2 1098 0
-	ldr	x1, [x19, 2352]
-	ldrh	w2, [x19, 20]
-	ldr	x0, [x19, 3352]
+	ldr	x1, [x19, 2376]
+	ldrh	w2, [x19, 44]
+	ldr	x0, [x19, 3408]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1266:
-	.loc 2 1099 0
-	ldrh	w0, [x19, 20]
-	ldr	x3, [x19, 3352]
-	ldr	x1, [x22, #:lo12:.LANCHOR0]
+	ldrh	w0, [x19, 44]
+	ldr	x3, [x19, 3408]
+	ldr	x1, [x19, 24]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
 	add	x0, x0, 48
@@ -14951,367 +8670,208 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1267:
-	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1268:
-.L1235:
-	.loc 2 1102 0
-	ldr	x0, [x19, 3376]
-	.loc 2 1105 0
+.L1245:
+	ldr	x0, [x19, 3432]
 	mov	w3, 1
-	.loc 2 1102 0
 	str	x0, [x20, 8]
-	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1103 0
-	ldr	x0, [x19, 3384]
-	.loc 2 1104 0
-	ldrh	w1, [x19, 2634]
-	.loc 2 1103 0
+	ldr	x0, [x19, 3440]
+	ldrh	w1, [x19, 2658]
 	str	x0, [x20, 16]
-	.loc 2 1104 0
-	ldrh	w0, [x19, 2632]
+	ldrh	w0, [x19, 2656]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1104 0
 	str	w0, [x20, 4]
-	.loc 2 1105 0
 	mov	x0, x20
 	bl	FlashProgPages
-.LVL1269:
-	.loc 2 1106 0
-	ldrh	w0, [x19, 84]
-	ldrh	w1, [x19, 2634]
+	ldrh	w0, [x19, 108]
+	ldrh	w1, [x19, 2658]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1236
-	.loc 2 1108 0
-	ldrh	w0, [x19, 2632]
-	.loc 2 1107 0
-	ldrh	w24, [x19, 2636]
-	.loc 2 1109 0
-	strh	wzr, [x19, 2634]
-	.loc 2 1108 0
-	strh	w0, [x19, 2636]
-	.loc 2 1110 0
+	blt	.L1246
+	ldrh	w0, [x19, 2656]
+	ldrh	w24, [x19, 2660]
+	strh	wzr, [x19, 2658]
+	strh	w0, [x19, 2660]
 	bl	FtlFreeSysBlkQueueOut
-.LVL1270:
-	strh	w0, [x19, 2632]
-	.loc 2 1115 0
-	ldr	w1, [x19, 2596]
-	.loc 2 1119 0
+	strh	w0, [x19, 2656]
+	ldr	w1, [x19, 2620]
 	mov	w3, 1
-	.loc 2 1115 0
-	str	w1, [x19, 2640]
+	str	w1, [x19, 2664]
 	add	w2, w1, 1
-	str	w2, [x19, 2596]
-	.loc 2 1116 0
+	str	w2, [x19, 2620]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x20, 4]
-	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1119 0
 	mov	x0, x20
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1271:
-.L1236:
-	.loc 2 1121 0
-	ldrh	w0, [x19, 2634]
-	.loc 2 1122 0
+.L1246:
+	ldrh	w0, [x19, 2658]
 	ldr	w1, [x20]
-	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2634]
-	.loc 2 1122 0
+	strh	w0, [x19, 2658]
 	cmn	w1, #1
-	bne	.L1237
-	.loc 2 1124 0
+	bne	.L1247
 	cmp	w0, 1
-	bne	.L1238
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1248
 	adrp	x0, .LC1
 	mov	w2, 1124
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1272:
-.L1238:
-	.loc 2 1125 0 is_stmt 1
-	ldrh	w0, [x19, 2634]
+.L1248:
+	ldrh	w0, [x19, 2658]
 	cmp	w0, 1
-	bne	.L1239
-	.loc 2 1126 0
-	ldrh	w0, [x19, 84]
+	bne	.L1249
+	ldrh	w0, [x19, 108]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2634]
-.L1239:
-	.loc 2 1127 0
-	add	w23, w23, 1
-.LVL1273:
-	and	w23, w23, 65535
-.LVL1274:
-	.loc 2 1128 0
-	cmp	w23, 3
-	bls	.L1235
-	.loc 2 1129 0
-	add	x22, x22, :lo12:.LANCHOR0
-	adrp	x0, .LC100
-	mov	w2, w23
-	add	x0, x0, :lo12:.LC100
-	ldr	w1, [x22, 3348]
+	strh	w0, [x19, 2658]
+.L1249:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	cmp	w22, 3
+	bls	.L1245
+	add	x23, x23, :lo12:.LANCHOR0
+	adrp	x0, .LC101
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC101
+	ldr	w1, [x23, 3404]
 	bl	printk
-.LVL1275:
-.L1241:
-	b	.L1241
-.L1237:
-	.loc 2 1135 0
+.L1251:
+	b	.L1251
+.L1247:
 	cmp	w0, 1
-	beq	.L1235
-	.loc 2 1138 0
+	beq	.L1245
 	mov	w0, 65535
 	cmp	w24, w0
-	beq	.L1242
-	.loc 2 1139 0
+	beq	.L1252
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.LVL1276:
-.L1242:
-	.loc 2 1141 0
+.L1252:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1277:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE208:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB228:
-	.loc 2 2242 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 2247 0
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC90
-	.loc 2 2242 0
+	adrp	x0, .LC91
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 2 2248 0
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2247 0
 	add	x1, x1, 552
-	add	x0, x0, :lo12:.LC90
-	.loc 2 2242 0
+	add	x0, x0, :lo12:.LC91
 	str	x23, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.loc 2 2247 0
 	bl	printk
-.LVL1278:
-	.loc 2 2248 0
-	ldr	x0, [x19, 4024]
-	.loc 2 2249 0
+	ldr	x0, [x19, 4080]
 	mov	w21, 0
-.LVL1279:
-	.loc 2 2248 0
-	ldrh	w2, [x19, 22]
+	ldrh	w2, [x19, 46]
 	mov	w1, 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1280:
-.L1248:
-	.loc 2 2249 0 discriminator 1
-	ldr	w0, [x19, 2560]
+.L1258:
+	ldr	w0, [x19, 2584]
 	cmp	w21, w0
-	bcc	.L1250
-	.loc 2 2259 0 discriminator 1
-	adrp	x22, .LC101
-	.loc 2 2256 0 discriminator 1
+	bcc	.L1260
+	adrp	x22, .LC102
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 2 2259 0 discriminator 1
-	add	x22, x22, :lo12:.LC101
+	add	x22, x22, :lo12:.LC102
 	mov	w19, 0
-.LVL1281:
-	.loc 2 2257 0 discriminator 1
 	mov	w23, 65535
-.L1251:
-	.loc 2 2256 0 discriminator 1
-	ldrh	w0, [x20, 20]
+.L1261:
+	ldrh	w0, [x20, 44]
 	cmp	w0, w19
-	bhi	.L1255
-	.loc 2 2268 0
+	bhi	.L1265
 	ldp	x19, x20, [sp, 16]
-.LVL1282:
 	ldp	x21, x22, [sp, 32]
-.LVL1283:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1284:
-.L1250:
-	.cfi_restore_state
-	.loc 2 2250 0
+.L1260:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	log2phys
-.LVL1285:
-	.loc 2 2251 0
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1249
-	.loc 2 2252 0
+	beq	.L1259
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1286:
-	.loc 2 2253 0
-	ldr	x2, [x19, 4024]
+	ldr	x2, [x19, 4080]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1249:
-	.loc 2 2249 0 discriminator 2
+.L1259:
 	add	w21, w21, 1
-	b	.L1248
-.LVL1287:
-.L1255:
-	.loc 2 2257 0
-	ldr	x0, [x20, 2352]
+	b	.L1258
+.L1265:
+	ldr	x0, [x20, 2376]
 	ubfiz	x21, x19, 1, 16
-.LVL1288:
 	ldrh	w2, [x0, x21]
-	ldr	x0, [x20, 4024]
+	ldr	x0, [x20, 4080]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1253
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1263
 	cmp	w2, w23
-	beq	.L1253
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1263
 	mov	w1, w19
 	mov	x0, x22
 	bl	printk
-.LVL1289:
-	.loc 2 2260 0
-	ldrh	w0, [x20, 2400]
+	ldrh	w0, [x20, 2424]
 	cmp	w0, w19
-	beq	.L1253
-	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x20, 2496]
+	beq	.L1263
+	ldrh	w0, [x20, 2520]
 	cmp	w0, w19
-	beq	.L1253
-	.loc 2 2260 0 discriminator 2
-	ldrh	w0, [x20, 2448]
+	beq	.L1263
+	ldrh	w0, [x20, 2472]
 	cmp	w0, w19
-	beq	.L1253
-	.loc 2 2261 0 is_stmt 1
-	ldr	x0, [x20, 4024]
+	beq	.L1263
+	ldr	x0, [x20, 4080]
 	ldrh	w1, [x0, x21]
-	ldr	x0, [x20, 2352]
+	ldr	x0, [x20, 2376]
 	strh	w1, [x0, x21]
-	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1290:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1291:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1292:
-.L1253:
-	.loc 2 2256 0 discriminator 2
+.L1263:
 	add	w19, w19, 1
-.LVL1293:
 	and	w19, w19, 65535
-.LVL1294:
-	b	.L1251
-	.cfi_endproc
-.LFE228:
+	b	.L1261
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	allocate_new_data_superblock
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB238:
-	.loc 2 2679 0
-	.cfi_startproc
-.LVL1295:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2681 0
 	adrp	x19, .LANCHOR0
-	.loc 2 2679 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 2 2679 0
 	mov	x22, x0
-	.loc 2 2680 0
 	ldrh	w21, [x0]
-.LVL1296:
-	.loc 2 2681 0
 	add	x0, x19, :lo12:.LANCHOR0
-.LVL1297:
-	ldrh	w0, [x0, 20]
+	ldrh	w0, [x0, 44]
 	cmp	w0, w21
-	bcs	.L1261
-	.loc 2 2681 0 is_stmt 0 discriminator 1
+	bcs	.L1271
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -15319,278 +8879,171 @@ allocate_new_data_superblock:
 	add	x1, x1, 576
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1298:
-.L1261:
-	.loc 2 2683 0 is_stmt 1
+.L1271:
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L1262
-	.loc 2 2684 0
+	beq	.L1272
 	add	x1, x19, :lo12:.LANCHOR0
 	ubfiz	x0, x21, 1, 16
-	ldr	x1, [x1, 2352]
+	ldr	x1, [x1, 2376]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1263
-	.loc 2 2685 0
+	cbz	w0, .L1273
 	mov	w0, w21
 	bl	INSERT_DATA_LIST
-.LVL1299:
-.L1262:
-	.loc 2 2689 0
+.L1272:
 	mov	w0, 1
-	.loc 2 2690 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2689 0
 	strb	w0, [x22, 8]
-	.loc 2 2690 0
 	add	x0, x1, :lo12:.LANCHOR3
 	mov	w2, 65535
 	mov	x20, x1
-	ldrh	w0, [x0, -104]
+	ldrh	w0, [x0, -48]
 	cmp	w0, w2
-	beq	.L1264
-	.loc 2 2691 0
+	beq	.L1274
 	cmp	w21, w0
-	bne	.L1265
-	.loc 2 2691 0 is_stmt 0 discriminator 1
+	bne	.L1275
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x19, 2352]
+	ldr	x2, [x19, 2376]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1266
-.L1265:
-	.loc 2 2692 0 is_stmt 1
+	cbz	w1, .L1276
+.L1275:
 	bl	update_vpc_list
-.LVL1300:
-.L1266:
-	.loc 2 2693 0
+.L1276:
 	add	x1, x20, :lo12:.LANCHOR3
 	mov	w0, -1
-	strh	w0, [x1, -104]
-.L1264:
-	.loc 2 2695 0
+	strh	w0, [x1, -48]
+.L1274:
 	mov	x0, x22
 	bl	allocate_data_superblock
-.LVL1301:
-	.loc 2 2696 0
 	bl	l2p_flush
-.LVL1302:
-	.loc 2 2697 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1303:
-	.loc 2 2698 0
 	bl	FtlVpcTblFlush
-.LVL1304:
-	.loc 2 2700 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1305:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1306:
-.L1263:
-	.cfi_restore_state
-	.loc 2 2687 0
+.L1273:
 	mov	w0, w21
 	bl	INSERT_FREE_LIST
-.LVL1307:
-	b	.L1262
-	.cfi_endproc
-.LFE238:
+	b	.L1272
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB154:
-	.loc 3 904 0
-	.cfi_startproc
-.LVL1308:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 911 0
 	mov	w2, 0
-.LVL1309:
-	.loc 3 904 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x3
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	w21, w1
 	stp	x23, x24, [sp, 48]
 	ubfiz	x21, x21, 5, 32
 	str	x25, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
 	add	x21, x21, 4
 	add	x24, x0, x21
 	adrp	x22, .LANCHOR0
-	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1310:
-	.loc 3 933 0
 	adrp	x25, .LANCHOR1
-	.loc 3 917 0
 	add	x21, x22, :lo12:.LANCHOR0
-	.loc 3 933 0
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x20, x0, 4
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1311:
-.L1272:
-	.loc 3 913 0 discriminator 1
+.L1282:
 	cmp	x20, x24
-	beq	.L1279
+	beq	.L1289
 	sub	x23, x20, #4
-	b	.L1280
-.LVL1312:
-.L1275:
-	.loc 3 915 0
+	b	.L1290
+.L1285:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1313:
-	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1273
-	.loc 3 917 0
-	ldr	x2, [x21, 2352]
+	bne	.L1283
+	ldr	x2, [x21, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
-	.loc 3 919 0
 	strb	wzr, [x19, 6]
-	.loc 3 918 0
-	ldrh	w0, [x21, 82]
+	ldrh	w0, [x21, 106]
 	strh	w0, [x19, 2]
-	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1273:
-	.loc 3 922 0
+.L1283:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1274
-	.loc 3 923 0
+	cbnz	w0, .L1284
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1314:
-.L1274:
-	.loc 3 926 0
-	ldr	w0, [x21, 2792]
+.L1284:
+	ldr	w0, [x21, 2816]
 	add	w0, w0, 1
-	str	w0, [x21, 2792]
-	.loc 3 927 0
+	str	w0, [x21, 2816]
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1315:
-	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1316:
-	.loc 3 929 0
 	str	w0, [x20]
-	.loc 3 930 0
 	mov	w2, 0
-	.loc 3 928 0
 	str	w0, [x29, 92]
-	.loc 3 930 0
 	mov	w1, 1
 	ldrb	w3, [x19, 9]
 	mov	x0, x23
 	bl	FlashProgPages
-.LVL1317:
-.L1280:
-	.loc 3 914 0
+.L1290:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1275
-	.loc 3 933 0
+	beq	.L1285
 	ldrb	w1, [x19, 6]
-	ldrh	w0, [x21, 12]
+	ldrh	w0, [x21, 36]
 	cmp	w1, w0
-	bcc	.L1276
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1286
 	adrp	x0, .LC1
 	mov	w2, 933
 	add	x1, x25, 608
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1318:
-.L1276:
-	.loc 3 934 0 is_stmt 1
+.L1286:
 	add	x1, x29, 96
 	ldr	w0, [x23, 4]
-	.loc 3 935 0
 	mov	w2, 1
-	.loc 3 934 0
 	str	w0, [x1, -4]!
-.LVL1319:
-	.loc 3 935 0
 	ldr	w0, [x23, 24]
 	bl	log2phys
-.LVL1320:
-	.loc 3 937 0
 	ldr	x0, [x23, 16]
 	ldr	w4, [x0, 12]
-.LVL1321:
-	.loc 3 939 0
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
-.LVL1322:
 	and	w1, w0, 65535
 	mov	w23, w1
-	.loc 3 940 0
 	cmn	w4, #1
-	beq	.L1277
-	.loc 3 942 0
-	ldr	x2, [x21, 2352]
+	beq	.L1287
+	ldr	x2, [x21, 2376]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1278
-	.loc 3 943 0
-	adrp	x0, .LC102
+	cbnz	w0, .L1288
+	adrp	x0, .LC103
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC103
 	bl	printk
-.LVL1323:
-.L1278:
-	.loc 3 944 0
+.L1288:
 	mov	w0, w23
 	bl	decrement_vpc_count
-.LVL1324:
-.L1277:
+.L1287:
 	add	x20, x20, 32
-	b	.L1272
-.L1279:
-	.loc 3 948 0
+	b	.L1282
+.L1289:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
-	ldrh	w0, [x22, 12]
+	ldrh	w0, [x22, 36]
 	cmp	w1, w0
-	bcc	.L1271
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1281
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -15598,492 +9051,257 @@ FtlProgPages:
 	add	x1, x1, 608
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1325:
-.L1271:
-	.loc 3 949 0 is_stmt 1
+.L1281:
 	ldp	x19, x20, [sp, 16]
-.LVL1326:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE154:
 	.size	FtlProgPages, .-FtlProgPages
 	.align	2
 	.global	FtlCacheWriteBack
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB155:
-	.loc 3 952 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 953 0
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
-	ldr	x0, [x19, -112]
-	cbz	x0, .L1287
-	.loc 3 954 0
-	ldr	x3, [x19, 56]
+	ldr	x0, [x19, -56]
+	cbz	x0, .L1297
+	ldr	x3, [x19, 112]
 	mov	w2, 0
 	mov	w1, 1
 	bl	FtlProgPages
-.LVL1327:
-	.loc 3 955 0
-	str	xzr, [x19, -112]
-.L1287:
-	.loc 3 958 0
+	str	xzr, [x19, -56]
+.L1297:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE155:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.align	2
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB151:
-	.loc 3 797 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1328:
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1329:
-	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1330:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1331:
-	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE151:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.align	2
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB152:
-	.loc 3 806 0
-	.cfi_startproc
-	.loc 3 807 0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	bne	.L1297
-	.loc 3 806 0
+	bne	.L1307
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1332:
-	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.L1297:
+.L1307:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE152:
 	.size	sftl_deinit, .-sftl_deinit
 	.align	2
 	.global	FtlDiscard
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB157:
-	.loc 3 1157 0
-	.cfi_startproc
-.LVL1333:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 3 1164 0
 	adrp	x20, .LANCHOR0
-	.loc 3 1157 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 3 1164 0
 	add	x22, x20, :lo12:.LANCHOR0
-	.loc 3 1157 0
 	mov	w21, w0
 	mov	w19, w1
-	.loc 3 1164 0
 	add	w1, w0, w1
-.LVL1334:
-	ldr	w0, [x22, 120]
-.LVL1335:
+	ldr	w0, [x22, 144]
 	cmp	w1, w0
-	bhi	.L1308
-	.loc 3 1167 0
+	bhi	.L1318
 	cmp	w19, 31
-	bhi	.L1302
-.LVL1336:
-.L1316:
-	.loc 3 1200 0
+	bhi	.L1312
+.L1326:
 	mov	w0, 0
-.L1300:
-	.loc 3 1201 0
+.L1310:
 	ldp	x19, x20, [sp, 16]
-.LVL1337:
 	ldp	x21, x22, [sp, 32]
-.LVL1338:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1339:
-.L1302:
-	.cfi_restore_state
-	.loc 3 1170 0
+.L1312:
 	bl	FtlCacheWriteBack
-.LVL1340:
-	.loc 3 1172 0
-	ldrh	w1, [x22, 38]
+	ldrh	w1, [x22, 62]
 	udiv	w22, w21, w1
-.LVL1341:
-	.loc 3 1173 0
 	msub	w21, w1, w22, w21
-.LVL1342:
-	.loc 3 1174 0
 	ands	w21, w21, 65535
-.LVL1343:
-	beq	.L1303
-	.loc 3 1175 0
+	beq	.L1313
 	sub	w1, w1, w21
-	.loc 3 1176 0
 	add	w22, w22, 1
-	.loc 3 1175 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
-	.loc 3 1177 0
 	sub	w19, w19, w1, uxth
-.L1303:
-	.loc 3 1184 0
+.L1313:
 	adrp	x21, .LANCHOR3
-.LVL1344:
-	.loc 3 1181 0
 	add	x20, x20, :lo12:.LANCHOR0
-	.loc 3 1184 0
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 3 1180 0
 	mov	w0, -1
 	str	w0, [x29, 60]
-.LVL1345:
-.L1304:
-	.loc 3 1181 0
-	ldrh	w0, [x20, 38]
+.L1314:
+	ldrh	w0, [x20, 62]
 	cmp	w19, w0
-	bcs	.L1306
-	.loc 3 1194 0
+	bcs	.L1316
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldr	w1, [x0, 64]
+	ldr	w1, [x0, 120]
 	cmp	w1, 32
-	bls	.L1316
-	.loc 3 1196 0
-	str	wzr, [x0, 64]
-	.loc 3 1197 0
+	bls	.L1326
+	str	wzr, [x0, 120]
 	bl	l2p_flush
-.LVL1346:
-	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1347:
-	b	.L1316
-.L1306:
-	.loc 3 1182 0
+	b	.L1326
+.L1316:
 	mov	w2, 0
 	add	x1, x29, 56
 	mov	w0, w22
 	bl	log2phys
-.LVL1348:
-	.loc 3 1183 0
 	ldr	w0, [x29, 56]
 	cmn	w0, #1
-	beq	.L1305
-	.loc 3 1184 0
-	ldr	w0, [x21, 64]
-	.loc 3 1186 0
+	beq	.L1315
+	ldr	w0, [x21, 120]
 	mov	w2, 1
 	add	x1, x29, 60
-	.loc 3 1184 0
 	add	w0, w0, 1
-	str	w0, [x21, 64]
-	.loc 3 1185 0
-	ldr	w0, [x20, 2568]
+	str	w0, [x21, 120]
+	ldr	w0, [x20, 2592]
 	add	w0, w0, 1
-	str	w0, [x20, 2568]
-	.loc 3 1186 0
+	str	w0, [x20, 2592]
 	mov	w0, w22
 	bl	log2phys
-.LVL1349:
-	.loc 3 1187 0
 	ldr	w0, [x29, 56]
-.LVL1350:
 	lsr	w0, w0, 10
-.LVL1351:
 	bl	P2V_block_in_plane
-.LVL1352:
-	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1353:
-.L1305:
-	.loc 3 1191 0
-	ldrh	w0, [x20, 38]
-	.loc 3 1190 0
+.L1315:
+	ldrh	w0, [x20, 62]
 	add	w22, w22, 1
-	.loc 3 1191 0
 	sub	w19, w19, w0
-	b	.L1304
-.LVL1354:
-.L1308:
-	.loc 3 1165 0
+	b	.L1314
+.L1318:
 	mov	w0, -1
-	b	.L1300
-	.cfi_endproc
-.LFE157:
+	b	.L1310
 	.size	FtlDiscard, .-FtlDiscard
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB247:
-	.loc 5 112 0
-	.cfi_startproc
-.LVL1355:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 5 119 0
 	mov	w3, 65535
-	.loc 5 112 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 5 115 0
 	adrp	x19, .LANCHOR0
 	add	x2, x19, :lo12:.LANCHOR0
-	.loc 5 112 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 5 119 0
-	ldrh	w20, [x2, 2496]
-	.loc 5 115 0
-	ldrh	w1, [x2, 82]
-.LVL1356:
-	.loc 5 119 0
+	ldrh	w20, [x2, 2520]
+	ldrh	w1, [x2, 106]
 	cmp	w20, w3
-	bne	.L1318
-.LVL1357:
-.L1328:
-	.loc 5 153 0
+	bne	.L1328
+.L1338:
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 5 152 0
-	adrp	x0, .LANCHOR3-96
-.LVL1358:
-	.loc 5 153 0
-	add	x21, x20, 2496
-	.loc 5 152 0
-	str	wzr, [x0, #:lo12:.LANCHOR3-96]
-	.loc 5 153 0
+	adrp	x0, .LANCHOR3-40
+	add	x21, x20, 2520
+	str	wzr, [x0, #:lo12:.LANCHOR3-40]
 	mov	w0, 65535
-	ldrh	w1, [x20, 2496]
-.LVL1359:
+	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1341
-.LVL1360:
-.L1344:
-	.loc 5 198 0
+	bne	.L1351
+.L1354:
 	mov	w0, 0
-.L1317:
-	.loc 5 199 0
+.L1327:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1361:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1362:
-.L1318:
-	.cfi_restore_state
-	.loc 5 121 0
-	cbz	w0, .L1321
-	.loc 5 123 0
+.L1328:
+	cbz	w0, .L1331
 	adrp	x0, .LANCHOR2
-.LVL1363:
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w4, [x0, 4]
 	cmp	w4, w3
-	beq	.L1322
-.L1323:
-	.loc 5 122 0
+	beq	.L1332
+.L1333:
 	mov	w1, 2
-.LVL1364:
-.L1321:
-	.loc 5 131 0
+.L1331:
 	add	x21, x19, :lo12:.LANCHOR0
-	add	x0, x21, 2496
-.LVL1365:
+	add	x0, x21, 2520
 	bl	FtlGcScanTempBlk
-.LVL1366:
 	str	w0, [x29, 92]
-.LVL1367:
-	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1324
-	.loc 5 135 0
-	ldr	x1, [x21, 2360]
+	beq	.L1334
+	ldr	x1, [x21, 2384]
 	ubfiz	x20, x20, 1, 16
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1325
-	.loc 5 136 0
+	bls	.L1335
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
-	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1368:
-.L1325:
-	.loc 5 139 0
+.L1335:
 	adrp	x0, .LANCHOR3
 	add	x1, x0, :lo12:.LANCHOR3
 	mov	x20, x0
-	ldr	w1, [x1, -96]
-	cbnz	w1, .L1326
-	.loc 5 140 0
+	ldr	w1, [x1, -40]
+	cbnz	w1, .L1336
 	add	x19, x19, :lo12:.LANCHOR0
-	ldr	w0, [x19, 2792]
+	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
-	str	w0, [x19, 2792]
-	.loc 5 141 0
+	str	w0, [x19, 2816]
 	ldr	w0, [x29, 92]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1369:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1370:
-.L1326:
-	.loc 5 144 0
+.L1336:
 	add	x0, x20, :lo12:.LANCHOR3
-	str	wzr, [x0, -96]
-.L1337:
-	.loc 5 149 0
+	str	wzr, [x0, -40]
+.L1347:
 	mov	w0, 1
-	b	.L1317
-.LVL1371:
-.L1322:
-	.loc 5 124 0
+	b	.L1327
+.L1332:
 	strh	wzr, [x0, 4]
-	.loc 5 125 0
-	ldrh	w0, [x2, 2392]
+	ldrh	w0, [x2, 2416]
 	cmp	w0, 17
-	bhi	.L1323
-	b	.L1321
-.LVL1372:
-.L1324:
-	.loc 5 148 0
+	bhi	.L1333
+	b	.L1331
+.L1334:
 	adrp	x0, .LANCHOR2+4
 	ldrh	w1, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1337
-	b	.L1328
-.L1341:
-	.loc 5 160 0
+	bne	.L1347
+	b	.L1338
+.L1351:
 	bl	FtlCacheWriteBack
-.LVL1373:
-	.loc 5 162 0
 	ldrb	w0, [x21, 7]
-	ldrh	w2, [x20, 82]
-	ldrh	w1, [x20, 3280]
+	ldrh	w2, [x20, 106]
+	ldrh	w1, [x20, 3304]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1329
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1339
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -16091,2211 +9309,1347 @@ FtlGcFreeTempBlock:
 	add	x1, x1, 624
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1374:
-.L1329:
-	.loc 5 163 0 is_stmt 1
+.L1339:
 	add	x0, x19, :lo12:.LANCHOR0
-	.loc 5 168 0
 	adrp	x22, .LANCHOR1
 	add	x22, x22, :lo12:.LANCHOR1
 	adrp	x25, .LC1
 	add	x22, x22, 624
 	add	x25, x25, :lo12:.LC1
-	.loc 5 163 0
-	ldrb	w1, [x0, 2503]
-	.loc 5 165 0
+	ldrb	w1, [x0, 2527]
 	mov	w20, 0
-.LVL1375:
-	.loc 5 163 0
-	ldrh	w4, [x0, 82]
-	ldr	x2, [x0, 2352]
-	ldrh	w3, [x0, 2496]
+	ldrh	w4, [x0, 106]
+	ldr	x2, [x0, 2376]
+	ldrh	w3, [x0, 2520]
 	mul	w1, w1, w4
 	strh	w1, [x2, x3, lsl 1]
-	.loc 5 164 0
-	ldr	w2, [x0, 2584]
-	ldrh	w1, [x0, 3280]
+	ldr	w2, [x0, 2608]
+	ldrh	w1, [x0, 3304]
 	add	w1, w1, w2
-	str	w1, [x0, 2584]
-.LVL1376:
-.L1330:
-	.loc 5 165 0 discriminator 1
+	str	w1, [x0, 2608]
+.L1340:
 	add	x21, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x21, 3280]
+	ldrh	w0, [x21, 3304]
 	cmp	w0, w20
-	bhi	.L1334
-	.loc 5 181 0
+	bhi	.L1344
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1377:
-	.loc 5 182 0
-	ldrh	w0, [x21, 2496]
-	ldr	x2, [x21, 2352]
+	ldrh	w0, [x21, 2520]
+	ldr	x2, [x21, 2376]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1335
-	.loc 5 183 0
+	cbz	w1, .L1345
 	bl	INSERT_DATA_LIST
-.LVL1378:
-.L1336:
-	.loc 5 186 0
+.L1346:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w20, -1
-.LVL1379:
-	.loc 5 187 0
-	strh	wzr, [x19, 3280]
-	.loc 5 186 0
-	strh	w20, [x19, 2496]
-	.loc 5 188 0
-	strh	wzr, [x19, 3268]
-	.loc 5 189 0
+	strh	wzr, [x19, 3304]
+	strh	w20, [x19, 2520]
+	strh	wzr, [x19, 3292]
 	bl	l2p_flush
-.LVL1380:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1381:
-	.loc 5 191 0
-	ldrh	w0, [x19, 2628]
-	ldrh	w1, [x19, 2392]
+	ldrh	w0, [x19, 2652]
+	ldrh	w1, [x19, 2416]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1344
-	.loc 5 193 0
+	ble	.L1354
 	mov	w0, 20
-	.loc 5 192 0
-	strh	w20, [x19, 2648]
-	.loc 5 193 0
-	strh	w0, [x19, 3208]
-	b	.L1344
-.LVL1382:
-.L1334:
-	.loc 5 166 0
+	strh	w20, [x19, 2672]
+	strh	w0, [x19, 3232]
+	b	.L1354
+.L1344:
 	mov	w24, 12
-	ldr	x26, [x21, 3288]
-	.loc 5 168 0
-	ldr	w0, [x21, 2560]
-	.loc 5 166 0
+	ldr	x26, [x21, 3312]
+	ldr	w0, [x21, 2584]
 	umull	x24, w20, w24
 	add	x23, x26, x24
-	.loc 5 168 0
 	ldr	w1, [x23, 8]
 	cmp	w1, w0
-	bcc	.L1331
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1341
 	mov	w2, 168
 	mov	x1, x22
 	mov	x0, x25
 	bl	printk
-.LVL1383:
-.L1331:
-	.loc 5 169 0 is_stmt 1
+.L1341:
 	ldr	w0, [x23, 8]
 	add	x1, x29, 92
 	mov	w2, 0
 	bl	log2phys
-.LVL1384:
-	.loc 5 170 0
 	ldr	w0, [x26, x24]
 	ldr	w1, [x29, 92]
 	cmp	w0, w1
-	bne	.L1332
-	.loc 5 171 0
+	bne	.L1342
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1385:
 	mov	w21, w0
-	.loc 5 172 0
 	ldr	w0, [x23, 8]
 	mov	w2, 1
 	add	x1, x23, 4
 	bl	log2phys
-.LVL1386:
-	.loc 5 173 0
 	mov	w0, w21
-.L1343:
-	.loc 5 177 0
+.L1353:
 	bl	decrement_vpc_count
-.LVL1387:
-.L1333:
-	.loc 5 165 0 discriminator 2
+.L1343:
 	add	w20, w20, 1
-.LVL1388:
 	and	w20, w20, 65535
-.LVL1389:
-	b	.L1330
-.L1332:
-	.loc 5 175 0
+	b	.L1340
+.L1342:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	beq	.L1333
-	.loc 5 177 0
+	beq	.L1343
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 2496]
-	b	.L1343
-.L1335:
-	.loc 5 185 0
+	ldrh	w0, [x0, 2520]
+	b	.L1353
+.L1345:
 	bl	INSERT_FREE_LIST
-.LVL1390:
-	b	.L1336
-	.cfi_endproc
-.LFE247:
+	b	.L1346
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
 	.global	FtlGcPageRecovery
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB250:
-	.loc 5 289 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 290 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x20, x19, 2496
+	add	x20, x19, 2520
 	mov	x0, x20
-	ldrh	w1, [x19, 82]
+	ldrh	w1, [x19, 106]
 	bl	FtlGcScanTempBlk
-.LVL1391:
-	.loc 5 291 0
-	ldrh	w1, [x19, 2498]
-	ldrh	w0, [x19, 82]
+	ldrh	w1, [x19, 2522]
+	ldrh	w0, [x19, 106]
 	cmp	w1, w0
-	bcc	.L1345
-.LBB310:
-.LBB311:
-	.loc 5 293 0
+	bcc	.L1355
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
-	sub	x0, x19, #248
+	sub	x0, x19, #192
 	bl	FtlMapBlkWriteDump_data
-.LVL1392:
-	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1393:
-	.loc 5 295 0
-	str	wzr, [x19, -96]
-.L1345:
-.LBE311:
-.LBE310:
-	.loc 5 297 0
+	str	wzr, [x19, -40]
+.L1355:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE250:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.align	2
 	.global	FtlPowerLostRecovery
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB222:
-	.loc 2 2081 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2082 0
-	adrp	x0, .LANCHOR3-84
-	.loc 2 2081 0
+	adrp	x0, .LANCHOR3-28
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 2084 0
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 2 2082 0
-	str	wzr, [x0, #:lo12:.LANCHOR3-84]
-	.loc 2 2084 0
-	add	x20, x19, 2400
-	.loc 2 2086 0
-	add	x19, x19, 2448
-	.loc 2 2084 0
+	str	wzr, [x0, #:lo12:.LANCHOR3-28]
+	add	x20, x19, 2424
+	add	x19, x19, 2472
 	mov	x0, x20
 	bl	FtlRecoverySuperblock
-.LVL1394:
-	.loc 2 2085 0
 	mov	x0, x20
 	bl	FtlSlcSuperblockCheck
-.LVL1395:
-	.loc 2 2086 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1396:
-	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1397:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1398:
-	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1399:
-	.loc 2 2091 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE222:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	2
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB252:
-	.loc 5 316 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 320 0
 	adrp	x11, .LANCHOR0
 	mov	w3, 0
 	mov	w2, 0
-	.loc 5 316 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 320 0
 	add	x19, x11, :lo12:.LANCHOR0
-	ldr	w1, [x19, 3224]
-	ldr	x0, [x19, 3968]
+	ldr	w1, [x19, 3248]
+	ldr	x0, [x19, 4024]
 	bl	FlashProgPages
-.LVL1400:
-	.loc 5 321 0
 	mov	w10, 0
-.LVL1401:
-.L1351:
-	.loc 5 321 0 is_stmt 0 discriminator 1
-	ldr	w1, [x19, 3224]
+.L1361:
+	ldr	w1, [x19, 3248]
 	cmp	w10, w1
-	bcc	.L1354
-	.loc 5 335 0 is_stmt 1
-	ldr	x0, [x19, 3968]
+	bcc	.L1364
+	ldr	x0, [x19, 4024]
 	bl	FtlGcBufFree
-.LVL1402:
-	.loc 5 336 0
-	str	wzr, [x19, 3224]
-	.loc 5 337 0
-	ldrh	w0, [x19, 2500]
-	cbnz	w0, .L1355
-	.loc 5 338 0
+	str	wzr, [x19, 3248]
+	ldrh	w0, [x19, 2524]
+	cbnz	w0, .L1365
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1403:
-	b	.L1357
-.LVL1404:
-.L1354:
-	.loc 5 322 0
-	ldr	x0, [x19, 3968]
+	b	.L1367
+.L1364:
+	ldr	x0, [x19, 4024]
 	ubfiz	x1, x10, 5, 16
 	add	x3, x0, x1
 	ldr	w0, [x0, x1]
 	cmn	w0, #1
-	bne	.L1352
-	.loc 5 323 0
-	ldrh	w3, [x19, 2496]
-	ldr	x2, [x19, 2352]
+	bne	.L1362
+	ldrh	w3, [x19, 2520]
+	ldr	x2, [x19, 2376]
 	strh	wzr, [x2, x3, lsl 1]
-	.loc 5 324 0
-	strh	w0, [x19, 2496]
-	.loc 5 325 0
-	ldr	w0, [x19, 2792]
+	strh	w0, [x19, 2520]
+	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
-	str	w0, [x19, 2792]
-	.loc 5 326 0
-	ldr	x0, [x19, 3968]
+	str	w0, [x19, 2816]
+	ldr	x0, [x19, 4024]
 	add	x0, x0, x1
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1405:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1406:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1407:
-.L1357:
-	.loc 5 339 0
+.L1367:
 	mov	w0, 1
-.L1350:
-	.loc 5 342 0
+.L1360:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1408:
-.L1352:
-	.cfi_restore_state
-	.loc 5 331 0 discriminator 2
+.L1362:
 	ldr	x0, [x3, 16]
-.LVL1409:
-	.loc 5 332 0 discriminator 2
 	ldr	w1, [x3, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1410:
 	bl	FtlGcUpdatePage
-.LVL1411:
-	.loc 5 321 0 discriminator 2
 	add	w10, w10, 1
-.LVL1412:
 	and	w10, w10, 65535
-.LVL1413:
-	b	.L1351
-.LVL1414:
-.L1355:
-	.loc 5 341 0
+	b	.L1361
+.L1365:
 	mov	w0, 0
-	b	.L1350
-	.cfi_endproc
-.LFE252:
+	b	.L1360
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB251:
-	.loc 5 300 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 301 0
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	add	x1, x0, 2496
-	ldrh	w2, [x0, 2496]
+	add	x1, x0, 2520
+	ldrh	w2, [x0, 2520]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L1359
-	.loc 5 301 0 is_stmt 0 discriminator 1
+	beq	.L1369
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1360
-.L1359:
-	.loc 5 302 0 is_stmt 1
+	cbnz	w0, .L1370
+.L1369:
 	bl	FtlCacheWriteBack
-.LVL1415:
-	.loc 5 304 0
 	add	x20, x19, :lo12:.LANCHOR0
-	.loc 5 303 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1416:
-	.loc 5 304 0
-	add	x0, x20, 2496
+	add	x0, x20, 2520
 	strb	wzr, [x0, 8]
-	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1417:
-	.loc 5 306 0
-	strh	wzr, [x20, 3268]
-	.loc 5 307 0
-	strh	wzr, [x20, 3280]
-	.loc 5 308 0
+	strh	wzr, [x20, 3292]
+	strh	wzr, [x20, 3304]
 	bl	l2p_flush
-.LVL1418:
-	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1419:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1420:
-.L1360:
-	.loc 5 312 0
+.L1370:
 	add	x0, x19, :lo12:.LANCHOR0
-	add	x0, x0, 2496
+	add	x0, x0, 2520
 	bl	get_new_active_ppa
-.LVL1421:
-	.loc 5 313 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE251:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB258:
-	.loc 5 470 0
-	.cfi_startproc
-.LVL1422:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 5 478 0
 	adrp	x19, .LANCHOR0
 	add	x1, x19, :lo12:.LANCHOR0
-.LVL1423:
-	.loc 5 470 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 5 478 0
-	ldr	w2, [x1, 3944]
-	cbnz	w2, .L1434
-	.loc 5 481 0
-	ldrh	w2, [x1, 2376]
+	ldr	w2, [x1, 4000]
+	cbnz	w2, .L1444
+	ldrh	w2, [x1, 2400]
 	cmp	w2, 47
-	bls	.L1434
+	bls	.L1444
 	mov	w23, w0
-	.loc 5 485 0
 	adrp	x0, .LANCHOR2+4
-.LVL1424:
 	ldrh	w2, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1364
-.L1367:
-.LBB315:
-.LBB316:
-	.loc 5 489 0
+	bne	.L1374
+.L1377:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
-	ldrh	w1, [x0, 3298]
+	ldrh	w1, [x0, 3322]
 	cmp	w1, w2
-	bne	.L1365
-.L1366:
-	.loc 5 496 0
+	bne	.L1375
+.L1376:
 	add	x21, x19, :lo12:.LANCHOR0
-	.loc 5 497 0
 	mov	w20, 65535
-	.loc 5 496 0
-	ldr	w1, [x21, 3212]
-	.loc 5 497 0
-	ldrh	w0, [x21, 2648]
-	.loc 5 496 0
+	ldr	w1, [x21, 3236]
+	ldrh	w0, [x21, 2672]
 	add	w1, w1, 1
 	add	w1, w1, w23, lsl 7
-	str	w1, [x21, 3212]
-	.loc 5 497 0
+	str	w1, [x21, 3236]
 	cmp	w0, w20
-	bne	.L1368
-	ldrh	w20, [x21, 2496]
+	bne	.L1378
+	ldrh	w20, [x21, 2520]
 	cmp	w20, w0
-	bne	.L1437
-	ldrh	w22, [x21, 3296]
+	bne	.L1447
+	ldrh	w22, [x21, 3320]
 	cmp	w22, w20
-	bne	.L1368
-	.loc 5 498 0
-	ldrh	w0, [x21, 2392]
+	bne	.L1378
+	ldrh	w0, [x21, 2416]
 	mov	w2, 1024
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L1440
-.LBB317:
-	.loc 5 502 0
-	adrp	x0, .LANCHOR3+68
-	.loc 5 501 0
-	str	wzr, [x21, 3212]
-	.loc 5 502 0
-	strh	wzr, [x0, #:lo12:.LANCHOR3+68]
-	.loc 5 503 0
+	bls	.L1450
+	adrp	x0, .LANCHOR3+124
+	str	wzr, [x21, 3236]
+	strh	wzr, [x0, #:lo12:.LANCHOR3+124]
 	bl	GetSwlReplaceBlock
-.LVL1425:
 	and	w20, w0, 65535
-	.loc 5 504 0
 	cmp	w20, w22
-	bne	.L1441
-	.loc 5 505 0
-	ldrh	w1, [x21, 2392]
-	ldrh	w0, [x21, 3210]
+	bne	.L1451
+	ldrh	w1, [x21, 2416]
+	ldrh	w0, [x21, 3234]
 	cmp	w1, w0
-	bcs	.L1371
-	.loc 5 506 0
+	bcs	.L1381
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1426:
 	and	w0, w0, 65535
-.LVL1427:
-	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1373
-	.loc 5 508 0
-	ldr	x1, [x21, 2352]
+	beq	.L1383
+	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
-.LVL1428:
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1374
-	.loc 5 509 0
+	bhi	.L1384
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1429:
 	and	w22, w0, 65535
-	.loc 5 510 0
 	mov	w0, 128
-	strh	w0, [x21, 3210]
-	.loc 5 520 0
+	strh	w0, [x21, 3234]
 	cmp	w22, w20
-	beq	.L1373
-.L1370:
-	.loc 5 521 0
+	beq	.L1383
+.L1380:
 	add	x0, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x22, 1, 32
 	mov	w20, w22
-	ldr	x2, [x0, 2352]
-	ldr	x3, [x0, 2360]
-	ldrh	w5, [x0, 3208]
+	ldr	x2, [x0, 2376]
+	ldr	x3, [x0, 2384]
+	ldrh	w5, [x0, 3232]
 	ldrh	w4, [x3, x1]
 	ldrh	w3, [x2, x1]
 	mov	w1, w22
-	ldrh	w2, [x0, 2392]
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	ldrh	w2, [x0, 2416]
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	bl	printk
-.LVL1430:
-	b	.L1373
-.L1364:
-.LBE317:
-.LBE316:
-.LBE315:
-	.loc 5 485 0 discriminator 1
-	ldrh	w1, [x1, 2496]
+	b	.L1383
+.L1374:
+	ldrh	w1, [x1, 2520]
 	cmp	w1, w0
-	beq	.L1367
-	.loc 5 486 0
+	beq	.L1377
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1431:
-	cbz	w0, .L1367
-	.loc 5 487 0
+	cbz	w0, .L1377
 	mov	w0, 1
-	b	.L1362
-.L1365:
-.LBB322:
-.LBB320:
-	.loc 5 489 0
-	ldrh	w3, [x0, 3296]
+	b	.L1372
+.L1375:
+	ldrh	w3, [x0, 3320]
 	cmp	w3, w2
-	bne	.L1366
-	.loc 5 490 0
-	strh	w1, [x0, 3296]
-	.loc 5 491 0
+	bne	.L1376
+	strh	w1, [x0, 3320]
 	mov	w1, -1
-	strh	w1, [x0, 3298]
-	b	.L1366
-.L1374:
-.LBB318:
-	.loc 5 512 0
+	strh	w1, [x0, 3322]
+	b	.L1376
+.L1384:
 	mov	w0, 64
-.L1466:
-	.loc 5 516 0
-	strh	w0, [x21, 3210]
-.LVL1432:
-.L1373:
-	.loc 5 523 0
+.L1476:
+	strh	w0, [x21, 3234]
+.L1383:
 	bl	FtlGcReFreshBadBlk
-.LVL1433:
-.L1368:
-.LBE318:
-	.loc 5 527 0
+.L1378:
 	cmp	w23, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1376
-	.loc 5 528 0
+	bne	.L1386
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2392]
+	ldrh	w0, [x1, 2416]
 	cmp	w0, 24
-	bhi	.L1442
-	.loc 5 530 0
+	bhi	.L1452
 	cmp	w0, 16
-	ldrh	w21, [x1, 82]
-	bls	.L1378
-	.loc 5 531 0
+	ldrh	w21, [x1, 106]
+	bls	.L1388
 	lsr	w21, w21, 5
-.LVL1434:
-.L1377:
-	.loc 5 539 0
+.L1387:
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w2, [x1, 3208]
+	ldrh	w2, [x1, 3232]
 	cmp	w2, w0
-	bcs	.L1381
-	.loc 5 540 0
-	ldrh	w0, [x1, 2496]
+	bcs	.L1391
+	ldrh	w0, [x1, 2520]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1382
-	ldrh	w2, [x1, 3296]
+	bne	.L1392
+	ldrh	w2, [x1, 3320]
 	cmp	w2, w0
-	bne	.L1382
-	.loc 5 542 0
-	adrp	x0, .LANCHOR3+68
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+68]
-	cbnz	w0, .L1383
-	ldr	w2, [x1, 2560]
-	ldr	w3, [x1, 2556]
+	bne	.L1392
+	adrp	x0, .LANCHOR3+124
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
+	cbnz	w0, .L1393
+	ldr	w2, [x1, 2584]
+	ldr	w3, [x1, 2580]
 	add	w2, w2, w2, lsl 1
 	cmp	w3, w2, lsr 2
-	bcs	.L1384
-.L1383:
-	.loc 5 543 0
+	bcs	.L1394
+.L1393:
 	add	x2, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x2, 2628]
+	ldrh	w1, [x2, 2652]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x2, 3208]
-.L1385:
-	.loc 5 546 0
+	strh	w1, [x2, 3232]
+.L1395:
 	add	x19, x19, :lo12:.LANCHOR0
-	str	wzr, [x19, 3220]
-.LVL1435:
-.L1362:
-.LBE320:
-.LBE322:
-	.loc 5 754 0
+	str	wzr, [x19, 3244]
+.L1372:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1436:
 	ldp	x23, x24, [sp, 48]
-.LVL1437:
 	ldp	x25, x26, [sp, 64]
-.LVL1438:
 	ldp	x27, x28, [sp, 80]
-.LVL1439:
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1440:
-.L1371:
-	.cfi_restore_state
-.LBB323:
-.LBB321:
-.LBB319:
-	.loc 5 516 0
+.L1381:
 	mov	w0, 80
-	b	.L1466
-.L1441:
-	.loc 5 504 0
+	b	.L1476
+.L1451:
 	mov	w22, w20
-	b	.L1370
-.L1437:
-.LBE319:
-	.loc 5 473 0
+	b	.L1380
+.L1447:
 	mov	w20, w0
-	b	.L1368
-.L1440:
+	b	.L1378
+.L1450:
 	mov	w20, w22
-	b	.L1368
-.L1378:
-	.loc 5 532 0
+	b	.L1378
+.L1388:
 	cmp	w0, 12
-	bls	.L1379
-	.loc 5 533 0
+	bls	.L1389
 	lsr	w21, w21, 4
-.LVL1441:
-	b	.L1377
-.LVL1442:
-.L1379:
-	.loc 5 535 0
+	b	.L1387
+.L1389:
 	mov	w1, w21
 	cmp	w0, 9
 	lsr	w21, w21, 2
 	csel	w21, w21, w1, cs
-.LVL1443:
-	b	.L1377
-.LVL1444:
-.L1442:
-	.loc 5 529 0
+	b	.L1387
+.L1452:
 	mov	w21, 1
-.LVL1445:
-	b	.L1377
-.L1384:
-	.loc 5 545 0
+	b	.L1387
+.L1394:
 	mov	w2, 18
-	strh	w2, [x1, 3208]
-	b	.L1385
-.L1382:
-	.loc 5 549 0
+	strh	w2, [x1, 3232]
+	b	.L1395
+.L1392:
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2628]
+	ldrh	w0, [x1, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, 3208]
-.L1381:
-	.loc 5 551 0
+	strh	w0, [x1, 3232]
+.L1391:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 3300]
-	cbz	w0, .L1443
-	.loc 5 552 0
+	ldrh	w0, [x0, 3324]
+	cbz	w0, .L1453
 	add	w21, w21, 32
-.LVL1446:
 	and	w21, w21, 65535
-.LVL1447:
-.L1443:
-	.loc 5 551 0
+.L1453:
 	mov	w20, 65535
-.L1387:
-	.loc 5 595 0
+.L1397:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
-	ldrh	w1, [x0, 2648]
+	ldrh	w1, [x0, 2672]
 	cmp	w1, w2
-	bne	.L1396
-	.loc 5 596 0
+	bne	.L1406
 	cmp	w20, w1
-	beq	.L1397
-	.loc 5 597 0
-	strh	w20, [x0, 2648]
-.L1398:
-	.loc 5 606 0
+	beq	.L1407
+	strh	w20, [x0, 2672]
+.L1408:
 	add	x5, x19, :lo12:.LANCHOR0
-	.loc 5 607 0
 	mov	w1, 65535
-	ldrh	w0, [x5, 2648]
-	.loc 5 606 0
-	strb	wzr, [x5, 2656]
-	.loc 5 607 0
+	ldrh	w0, [x5, 2672]
+	strb	wzr, [x5, 2680]
 	cmp	w0, w1
-	beq	.L1396
-	.loc 5 608 0
+	beq	.L1406
 	bl	IsBlkInGcList
-.LVL1448:
-	cbz	w0, .L1401
-	.loc 5 609 0
+	cbz	w0, .L1411
 	mov	w0, -1
-	strh	w0, [x5, 2648]
-.L1401:
-	.loc 5 611 0
+	strh	w0, [x5, 2672]
+.L1411:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
-	add	x23, x22, 2648
-.LVL1449:
-	ldrh	w1, [x22, 2648]
+	add	x23, x22, 2672
+	ldrh	w1, [x22, 2672]
 	cmp	w1, w0
-	beq	.L1396
-	.loc 5 612 0
+	beq	.L1406
 	mov	x0, x23
 	bl	make_superblock
-.LVL1450:
-	.loc 5 615 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 5 616 0
-	ldrh	w2, [x22, 2648]
-	ldr	x1, [x22, 2352]
-	.loc 5 613 0
-	strh	wzr, [x22, 2650]
-	.loc 5 614 0
-	strb	wzr, [x22, 2654]
-	.loc 5 615 0
-	strh	wzr, [x0, 70]
-	.loc 5 616 0
+	ldrh	w2, [x22, 2672]
+	ldr	x1, [x22, 2376]
+	strh	wzr, [x22, 2674]
+	strb	wzr, [x22, 2678]
+	strh	wzr, [x0, 126]
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 72]
-.LVL1451:
-.L1396:
-	.loc 5 621 0
+	strh	w1, [x0, 128]
+.L1406:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2648]
-	ldrh	w2, [x0, 2400]
+	ldrh	w1, [x0, 2672]
+	ldrh	w2, [x0, 2424]
 	cmp	w2, w1
-	beq	.L1402
-	ldrh	w0, [x0, 2448]
+	beq	.L1412
+	ldrh	w0, [x0, 2472]
 	cmp	w0, w1
-	beq	.L1402
-	.loc 5 660 0
+	beq	.L1412
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x24, x24, 648
-.LVL1452:
-.L1403:
-	.loc 5 627 0
+.L1413:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
-	ldrh	w23, [x22, 2648]
-.LVL1453:
+	ldrh	w23, [x22, 2672]
 	cmp	w23, w0
-	bne	.L1404
-	.loc 5 641 0
+	bne	.L1414
 	mov	w25, 2
-	.loc 5 628 0
-	str	wzr, [x22, 3220]
-.L1405:
-	.loc 5 631 0
-	ldrh	w5, [x22, 3216]
+	str	wzr, [x22, 3244]
+.L1415:
+	ldrh	w5, [x22, 3240]
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1454:
 	and	w6, w0, 65535
-	strh	w6, [x22, 2648]
-	.loc 5 632 0
+	strh	w6, [x22, 2672]
 	cmp	w6, w23
-	bne	.L1406
-	.loc 5 633 0
-	strh	wzr, [x22, 3216]
-	.loc 5 634 0
+	bne	.L1416
+	strh	wzr, [x22, 3240]
 	mov	w0, 8
-	b	.L1362
-.LVL1455:
-.L1376:
-	.loc 5 557 0
+	b	.L1372
+.L1386:
 	add	x5, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x5, 2496]
+	ldrh	w1, [x5, 2520]
 	cmp	w1, w0
-	bne	.L1446
-	ldrh	w0, [x5, 3296]
+	bne	.L1456
+	ldrh	w0, [x5, 3320]
 	cmp	w0, w1
-	bne	.L1446
+	bne	.L1456
 	cmp	w20, w0
-	bne	.L1446
-	ldrh	w0, [x5, 2648]
+	bne	.L1456
+	ldrh	w0, [x5, 2672]
 	cmp	w0, w20
-	beq	.L1388
-.L1446:
-	.loc 5 556 0
+	beq	.L1398
+.L1456:
 	mov	w21, 1
-.LVL1456:
-	b	.L1387
-.LVL1457:
-.L1388:
-	.loc 5 560 0
-	ldrh	w7, [x5, 2392]
+	b	.L1397
+.L1398:
+	ldrh	w7, [x5, 2416]
 	adrp	x21, .LANCHOR3
-	ldrh	w0, [x5, 3208]
-	.loc 5 558 0
-	str	wzr, [x5, 3220]
-	.loc 5 560 0
+	ldrh	w0, [x5, 3232]
+	str	wzr, [x5, 3244]
 	cmp	w0, w7
-	bcs	.L1389
-	.loc 5 561 0
+	bcs	.L1399
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 68]
-	cbnz	w0, .L1390
-	ldr	w0, [x5, 2560]
-	ldr	w1, [x5, 2556]
+	ldrh	w0, [x0, 124]
+	cbnz	w0, .L1400
+	ldr	w0, [x5, 2584]
+	ldr	w1, [x5, 2580]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1391
-.L1390:
-	.loc 5 562 0
+	bcs	.L1401
+.L1400:
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x19, 2628]
+	ldrh	w0, [x19, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x19, 3208]
-.L1392:
-	.loc 5 566 0
+	strh	w0, [x19, 3232]
+.L1402:
 	bl	FtlReadRefresh
-.LVL1458:
-.L1467:
-	.loc 5 730 0
+.L1477:
 	add	x21, x21, :lo12:.LANCHOR3
-	b	.L1468
-.LVL1459:
-.L1391:
-	.loc 5 564 0
+	b	.L1478
+.L1401:
 	mov	w0, 18
-	strh	w0, [x5, 3208]
-	b	.L1392
-.L1389:
-	.loc 5 572 0
+	strh	w0, [x5, 3232]
+	b	.L1402
+.L1399:
 	add	x21, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x21, 68]
-	cbnz	w0, .L1446
-	.loc 5 573 0
-	ldrh	w6, [x5, 2628]
+	ldrh	w0, [x21, 124]
+	cbnz	w0, .L1456
+	ldrh	w6, [x5, 2652]
 	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x5, 3208]
-	.loc 5 574 0
+	strh	w0, [x5, 3232]
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1460:
-	.loc 5 575 0
-	ldr	x1, [x5, 2352]
+	ldr	x1, [x5, 2376]
 	ubfiz	x0, x0, 1, 16
-	ldrh	w2, [x5, 12]
+	ldrh	w2, [x5, 36]
 	ldrh	w1, [x1, x0]
-	ldrh	w0, [x5, 84]
+	ldrh	w0, [x5, 108]
 	mul	w0, w0, w2
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L1394
-	.loc 5 576 0
+	ble	.L1404
 	sub	w6, w6, #1
-	.loc 5 575 0
 	cmp	w7, w6
-	blt	.L1394
-	.loc 5 578 0
+	blt	.L1404
 	bl	FtlReadRefresh
-.LVL1461:
-.L1468:
-	.loc 5 730 0
-	ldrh	w0, [x21, 68]
-	b	.L1362
-.LVL1462:
-.L1394:
-	.loc 5 584 0
-	cbnz	w1, .L1446
-	.loc 5 586 0
+.L1478:
+	ldrh	w0, [x21, 124]
+	b	.L1372
+.L1404:
+	cbnz	w1, .L1456
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1463:
-	.loc 5 586 0
-	ldrh	w0, [x19, 2392]
+	ldrh	w0, [x19, 2416]
 	add	w0, w0, 1
-	b	.L1362
-.LVL1464:
-.L1397:
-	.loc 5 598 0
-	ldrh	w1, [x0, 3296]
+	b	.L1372
+.L1407:
+	ldrh	w1, [x0, 3320]
 	cmp	w1, w20
-	beq	.L1398
-	.loc 5 600 0
-	ldr	x2, [x0, 2352]
+	beq	.L1408
+	ldr	x2, [x0, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1399
-	.loc 5 601 0
+	cbnz	w1, .L1409
 	mov	w1, -1
-	strh	w1, [x0, 3296]
-.L1399:
-	.loc 5 602 0
+	strh	w1, [x0, 3320]
+.L1409:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3296]
-	strh	w1, [x0, 2648]
-	.loc 5 603 0
+	ldrh	w1, [x0, 3320]
+	strh	w1, [x0, 2672]
 	mov	w1, -1
-	strh	w1, [x0, 3296]
-	b	.L1398
-.L1402:
-	.loc 5 622 0
+	strh	w1, [x0, 3320]
+	b	.L1408
+.L1412:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
-	strh	w0, [x19, 2648]
-.LVL1465:
-.L1469:
-	.loc 5 648 0
-	adrp	x0, .LANCHOR3+68
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+68]
-	b	.L1362
-.LVL1466:
-.L1406:
-	.loc 5 636 0
+	strh	w0, [x19, 2672]
+.L1479:
+	adrp	x0, .LANCHOR3+124
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
+	b	.L1372
+.L1416:
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1467:
 	add	w5, w5, 1
-	cbz	w0, .L1407
-	.loc 5 637 0
-	strh	w5, [x22, 3216]
-	b	.L1405
-.L1407:
-	.loc 5 641 0
-	ldrh	w4, [x22, 12]
+	cbz	w0, .L1417
+	strh	w5, [x22, 3240]
+	b	.L1415
+.L1417:
+	ldrh	w4, [x22, 36]
 	ubfiz	x1, x6, 1, 16
-	ldrh	w0, [x22, 82]
-	.loc 5 640 0
+	ldrh	w0, [x22, 106]
 	and	w5, w5, 65535
-	.loc 5 641 0
-	ldr	x2, [x22, 2352]
-	.loc 5 640 0
-	strh	w5, [x22, 3216]
-	.loc 5 641 0
+	ldr	x2, [x22, 2376]
+	strh	w5, [x22, 3240]
 	mul	w0, w0, w4
 	ldrh	w3, [x2, x1]
 	sdiv	w4, w0, w25
 	cmp	w3, w4
-	bgt	.L1409
-	.loc 5 642 0
+	bgt	.L1419
 	cmp	w5, 48
-	bls	.L1410
+	bls	.L1420
 	cmp	w3, 8
-	bls	.L1410
-	ldrh	w3, [x22, 3268]
+	bls	.L1420
+	ldrh	w3, [x22, 3292]
 	cmp	w3, 35
-	bhi	.L1410
-.L1409:
-	.loc 5 643 0
-	strh	wzr, [x22, 3216]
-.L1410:
-	.loc 5 645 0
+	bhi	.L1420
+.L1419:
+	strh	wzr, [x22, 3240]
+.L1420:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1411
+	bgt	.L1421
 	cmp	w20, w23
-	bne	.L1411
-	.loc 5 646 0
+	bne	.L1421
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
-	.loc 5 647 0
-	strh	wzr, [x19, 3216]
-	.loc 5 646 0
-	strh	w0, [x19, 2648]
-	b	.L1469
-.L1411:
-	.loc 5 651 0
-	cbnz	w1, .L1412
-	.loc 5 652 0
+	strh	wzr, [x19, 3240]
+	strh	w0, [x19, 2672]
+	b	.L1479
+.L1421:
+	cbnz	w1, .L1422
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1468:
-	.loc 5 653 0
-	ldrh	w0, [x22, 3216]
+	ldrh	w0, [x22, 3240]
 	add	w0, w0, 1
-	strh	w0, [x22, 3216]
-	b	.L1405
-.L1412:
-	.loc 5 656 0
+	strh	w0, [x22, 3240]
+	b	.L1415
+.L1422:
 	add	x0, x19, :lo12:.LANCHOR0
-	strb	wzr, [x0, 2656]
-	.loc 5 658 0
-	ldrh	w0, [x0, 2400]
+	strb	wzr, [x0, 2680]
+	ldrh	w0, [x0, 2424]
 	cmp	w0, w6
-	bne	.L1413
+	bne	.L1423
 	adrp	x0, .LC1
 	mov	w2, 658
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1469:
-.L1413:
-	.loc 5 659 0
+.L1423:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2648]
-	ldrh	w0, [x0, 2448]
+	ldrh	w1, [x0, 2672]
+	ldrh	w0, [x0, 2472]
 	cmp	w1, w0
-	bne	.L1414
+	bne	.L1424
 	adrp	x0, .LC1
 	mov	w2, 659
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1470:
-.L1414:
-	.loc 5 660 0
+.L1424:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 2648]
-	ldrh	w0, [x0, 2496]
+	ldrh	w1, [x0, 2672]
+	ldrh	w0, [x0, 2520]
 	cmp	w1, w0
-	bne	.L1415
+	bne	.L1425
 	adrp	x0, .LC1
 	mov	w2, 660
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1471:
-.L1415:
-	.loc 5 661 0
+.L1425:
 	add	x23, x19, :lo12:.LANCHOR0
-	add	x22, x23, 2648
+	add	x22, x23, 2672
 	mov	x0, x22
 	bl	make_superblock
-.LVL1472:
-	.loc 5 662 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	.loc 5 663 0
-	ldrh	w2, [x23, 2648]
-	ldr	x1, [x23, 2352]
-	.loc 5 662 0
-	strh	wzr, [x0, 70]
-	.loc 5 663 0
+	ldrh	w2, [x23, 2672]
+	ldr	x1, [x23, 2376]
+	strh	wzr, [x0, 126]
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 72]
-	.loc 5 664 0
-	strh	wzr, [x23, 2650]
-	.loc 5 665 0
-	strb	wzr, [x23, 2654]
-.L1404:
-	.loc 5 671 0
+	strh	w1, [x0, 128]
+	strh	wzr, [x23, 2674]
+	strb	wzr, [x23, 2678]
+.L1414:
 	bl	FtlReadRefresh
-.LVL1473:
-	.loc 5 674 0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 1
-	.loc 5 675 0
-	ldrh	w26, [x0, 82]
-	.loc 5 674 0
-	str	w1, [x0, 3944]
-	.loc 5 676 0
-	ldrh	w0, [x0, 2650]
+	ldrh	w26, [x0, 106]
+	str	w1, [x0, 4000]
+	ldrh	w0, [x0, 2674]
 	add	w1, w0, w21
 	cmp	w1, w26
-	ble	.L1416
-	.loc 5 677 0
+	ble	.L1426
 	sub	w21, w26, w0
-.LVL1474:
 	and	w21, w21, 65535
-.LVL1475:
-.L1416:
-	.loc 5 689 0
+.L1426:
 	mov	w25, 0
-.LVL1476:
-.L1417:
-	.loc 5 679 0
+.L1427:
 	cmp	w21, w25, uxth
-	bls	.L1425
-	.loc 5 681 0
+	bls	.L1435
 	add	x0, x19, :lo12:.LANCHOR0
-	.loc 5 684 0
 	mov	w23, 0
-.LVL1477:
-	add	x3, x0, 2664
+	add	x3, x0, 2688
 	mov	w1, 0
-.LVL1478:
-	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 684 0
-	ldrh	w4, [x0, 2650]
-	.loc 5 681 0
-	ldrh	w7, [x0, 12]
-	.loc 5 684 0
+	ldrh	w4, [x0, 2674]
+	ldrh	w7, [x0, 36]
 	add	w4, w4, w25
-	b	.L1426
-.LVL1479:
-.L1419:
-	.loc 5 682 0
+	b	.L1436
+.L1429:
 	ldrh	w2, [x3]
-	.loc 5 683 0
 	cmp	w2, w6
-	beq	.L1418
-	.loc 5 684 0
-	ldr	x5, [x0, 3256]
+	beq	.L1428
+	ldr	x5, [x0, 3280]
 	ubfiz	x8, x23, 5, 16
-	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1480:
-	.loc 5 684 0
 	orr	w2, w4, w2, lsl 10
-.LVL1481:
 	add	x5, x5, x8
-	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1482:
-	.loc 5 684 0
 	str	w2, [x5, 4]
-.LVL1483:
-.L1418:
-	.loc 5 681 0
+.L1428:
 	add	w1, w1, 1
-.LVL1484:
 	add	x3, x3, 2
 	and	w1, w1, 65535
-.LVL1485:
-.L1426:
+.L1436:
 	cmp	w1, w7
-	bne	.L1419
-	.loc 5 689 0
+	bne	.L1429
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w1, w23
-.LVL1486:
 	mov	x27, 0
-	ldrb	w2, [x22, 2656]
-.LVL1487:
-	ldr	x0, [x22, 3256]
+	ldrb	w2, [x22, 2680]
+	ldr	x0, [x22, 3280]
 	bl	FlashReadPages
-.LVL1488:
 	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 104]
-.LVL1489:
-.L1420:
-	.loc 5 691 0
+.L1430:
 	ldr	x0, [x29, 104]
 	cmp	x27, x0
-	bne	.L1424
+	bne	.L1434
 	add	w25, w25, 1
-	b	.L1417
-.L1424:
-	.loc 5 692 0
-	ldr	x0, [x22, 3256]
+	b	.L1427
+.L1434:
+	ldr	x0, [x22, 3280]
 	add	x1, x0, x27
-	.loc 5 693 0
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	beq	.L1421
-	.loc 5 692 0
+	beq	.L1431
 	ldr	x23, [x1, 16]
-.LVL1490:
-	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1421
-	.loc 5 695 0
+	bne	.L1431
 	ldr	w28, [x23, 8]
-.LVL1491:
-	.loc 5 696 0
 	cmn	w28, #1
-	bne	.L1422
+	bne	.L1432
 	adrp	x0, .LC1
 	mov	w2, 696
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1492:
-.L1422:
-	.loc 5 697 0
+.L1432:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w28
 	bl	log2phys
-.LVL1493:
-	.loc 5 698 0
-	ldr	x0, [x22, 3256]
+	ldr	x0, [x22, 3280]
 	ldr	w1, [x29, 124]
 	add	x0, x0, x27
 	ldr	w2, [x0, 4]
-.LVL1494:
 	cmp	w2, w1
-	bne	.L1421
-	.loc 5 700 0
+	bne	.L1431
 	adrp	x28, .LANCHOR3
-.LVL1495:
 	add	x2, x28, :lo12:.LANCHOR3
-	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 700 0
-	ldrh	w1, [x2, 70]
+	ldrh	w1, [x2, 126]
 	add	w1, w1, 1
-	strh	w1, [x2, 70]
-	.loc 5 701 0
-	ldr	x2, [x22, 3968]
-	ldr	w1, [x22, 3224]
+	strh	w1, [x2, 126]
+	ldr	x2, [x22, 4024]
+	ldr	w1, [x22, 3248]
 	add	x1, x2, x1, lsl 5
 	str	x1, [x29, 96]
 	str	w0, [x1, 24]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1496:
 	ldr	x1, [x29, 96]
 	str	w0, [x1, 4]
-	.loc 5 703 0
-	ldr	w0, [x22, 3224]
-	ldr	x1, [x22, 3968]
+	ldr	w0, [x22, 3248]
+	ldr	x1, [x22, 4024]
 	add	x0, x1, x0, lsl 5
-	ldr	x1, [x22, 3256]
+	ldr	x1, [x22, 3280]
 	add	x1, x1, x27
 	ldr	x2, [x1, 8]
 	str	x2, [x0, 8]
-	.loc 5 704 0
 	ldr	x1, [x1, 16]
 	str	x1, [x0, 16]
-	.loc 5 705 0
 	ldr	w0, [x29, 124]
-	.loc 5 712 0
 	mov	w1, 1
-.LVL1497:
-	.loc 5 705 0
 	str	w0, [x23, 12]
-	.loc 5 706 0
-	ldrh	w0, [x22, 2496]
-.LVL1498:
+	ldrh	w0, [x22, 2520]
 	strh	w0, [x23, 2]
-	.loc 5 709 0
-	ldr	w0, [x22, 2600]
+	ldr	w0, [x22, 2624]
 	str	w0, [x23, 4]
-	.loc 5 711 0
-	ldr	w0, [x22, 3224]
+	ldr	w0, [x22, 3248]
 	add	w0, w0, 1
-	str	w0, [x22, 3224]
-	.loc 5 712 0
-	ldr	x0, [x22, 3256]
+	str	w0, [x22, 3248]
+	ldr	x0, [x22, 3280]
 	add	x0, x0, x27
 	bl	FtlGcBufAlloc
-.LVL1499:
-	.loc 5 713 0
-	ldrb	w1, [x22, 2503]
-	ldr	w0, [x22, 3224]
+	ldrb	w1, [x22, 2527]
+	ldr	w0, [x22, 3248]
 	cmp	w1, w0
-	beq	.L1423
-	ldrh	w0, [x22, 2500]
-	cbnz	w0, .L1421
-.L1423:
-	.loc 5 714 0
+	beq	.L1433
+	ldrh	w0, [x22, 2524]
+	cbnz	w0, .L1431
+.L1433:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1500:
-	cbz	w0, .L1421
-	.loc 5 715 0
+	cbz	w0, .L1431
 	add	x19, x19, :lo12:.LANCHOR0
-	.loc 5 716 0
 	add	x28, x28, :lo12:.LANCHOR3
-	.loc 5 715 0
-	str	wzr, [x19, 3944]
-	.loc 5 716 0
-	ldrh	w0, [x28, 68]
-	b	.L1362
-.LVL1501:
-.L1421:
+	str	wzr, [x19, 4000]
+	ldrh	w0, [x28, 124]
+	b	.L1372
+.L1431:
 	add	x27, x27, 32
-	b	.L1420
-.L1425:
-	.loc 5 723 0
+	b	.L1430
+.L1435:
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2650]
+	ldrh	w0, [x1, 2674]
 	add	w21, w21, w0
-.LVL1502:
 	and	w21, w21, 65535
-	strh	w21, [x1, 2650]
-	.loc 5 725 0
+	strh	w21, [x1, 2674]
 	cmp	w26, w21
 	adrp	x21, .LANCHOR3
-	bls	.L1427
+	bls	.L1437
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w1, [x0, 70]
-	ldrh	w0, [x0, 72]
+	ldrh	w1, [x0, 126]
+	ldrh	w0, [x0, 128]
 	cmp	w1, w0
-	bne	.L1428
-.L1427:
-	.loc 5 727 0
+	bne	.L1438
+.L1437:
 	add	x22, x19, :lo12:.LANCHOR0
-	ldr	w0, [x22, 3224]
-	cbz	w0, .L1429
-	.loc 5 728 0
+	ldr	w0, [x22, 3248]
+	cbz	w0, .L1439
 	bl	Ftl_gc_temp_data_write_back
-.LVL1503:
-	cbz	w0, .L1429
-	.loc 5 729 0
-	str	wzr, [x22, 3944]
-	b	.L1467
-.L1429:
-	.loc 5 733 0
+	cbz	w0, .L1439
+	str	wzr, [x22, 4000]
+	b	.L1477
+.L1439:
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 70]
-	cbnz	w0, .L1430
+	ldrh	w0, [x0, 126]
+	cbnz	w0, .L1440
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2648]
-	ldr	x2, [x1, 2352]
+	ldrh	w0, [x1, 2672]
+	ldr	x2, [x1, 2376]
 	lsl	x0, x0, 1
 	ldrh	w3, [x2, x0]
-	cbz	w3, .L1430
-	.loc 5 735 0
+	cbz	w3, .L1440
 	strh	wzr, [x2, x0]
-	.loc 5 736 0
-	ldrh	w0, [x1, 2648]
+	ldrh	w0, [x1, 2672]
 	bl	update_vpc_list
-.LVL1504:
-	.loc 5 737 0
 	bl	FtlCacheWriteBack
-.LVL1505:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1506:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1507:
-.L1430:
-	.loc 5 741 0
+.L1440:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
-	strh	w1, [x0, 2648]
-.L1428:
-	.loc 5 743 0
+	strh	w1, [x0, 2672]
+.L1438:
 	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2392]
+	ldrh	w0, [x1, 2416]
 	cmp	w0, 2
-	bhi	.L1431
-	.loc 5 745 0
-	ldrh	w21, [x1, 82]
-.LVL1508:
-	b	.L1403
-.LVL1509:
-.L1431:
-	.loc 5 750 0
+	bhi	.L1441
+	ldrh	w21, [x1, 106]
+	b	.L1413
+.L1441:
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 5 748 0
-	str	wzr, [x1, 3944]
-	.loc 5 750 0
-	ldrh	w1, [x21, 68]
-	.loc 5 751 0
+	str	wzr, [x1, 4000]
+	ldrh	w1, [x21, 124]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1362
-.LVL1510:
-.L1434:
-.LBE321:
-.LBE323:
-	.loc 5 479 0
+	b	.L1372
+.L1444:
 	mov	w0, 0
-.LVL1511:
-	b	.L1362
-	.cfi_endproc
-.LFE258:
+	b	.L1372
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
 	.global	sftl_gc
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB259:
-	.loc 5 757 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
-	.loc 5 757 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 758 0
 	bl	rk_ftl_garbage_collect
-.LVL1512:
-	.loc 5 759 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE259:
 	.size	sftl_gc, .-sftl_gc
 	.align	2
 	.global	FtlRead
 	.type	FtlRead, %function
 FtlRead:
-.LFB153:
-	.loc 3 814 0
-	.cfi_startproc
-.LVL1513:
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
 	and	w0, w0, 255
-	.loc 3 824 0
 	cmp	w0, 16
-	.loc 3 814 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
 	mov	w19, w1
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -80
-	.cfi_offset 28, -72
 	mov	w27, w2
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	.cfi_offset 25, -96
-	.cfi_offset 26, -88
-	.loc 3 824 0
-	bne	.L1473
-	.loc 3 825 0
+	bne	.L1483
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
-.LVL1514:
 	bl	FtlVendorPartRead
-.LVL1515:
 	mov	w21, w0
-.LVL1516:
-.L1472:
-	.loc 3 901 0
+.L1482:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1517:
 	ldp	x21, x22, [sp, 32]
-.LVL1518:
 	ldp	x23, x24, [sp, 48]
-.LVL1519:
 	ldp	x25, x26, [sp, 64]
-.LVL1520:
 	ldp	x27, x28, [sp, 80]
-.LVL1521:
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1522:
-.L1473:
-	.cfi_restore_state
-	.loc 3 830 0
+.L1483:
 	add	w0, w1, w2
-.LVL1523:
 	str	w0, [x29, 128]
 	adrp	x0, .LANCHOR0
 	add	x25, x0, :lo12:.LANCHOR0
 	add	w2, w1, w2
 	str	x0, [x29, 96]
-	ldr	w1, [x25, 120]
+	ldr	w1, [x25, 144]
 	cmp	w2, w1
-	bhi	.L1493
-	.loc 3 830 0 is_stmt 0 discriminator 1
+	bhi	.L1503
 	adrp	x0, .LANCHOR2
 	ldr	w21, [x0, #:lo12:.LANCHOR2]
 	cmn	w21, #1
-	beq	.L1472
-	.loc 3 833 0 is_stmt 1
+	beq	.L1482
 	bl	FtlCacheWriteBack
-.LVL1524:
-	.loc 3 840 0
 	mov	w28, 0
-.LVL1525:
-	.loc 3 835 0
-	ldrh	w0, [x25, 38]
-	.loc 3 836 0
+	ldrh	w0, [x25, 62]
 	add	w1, w19, w27
 	sub	w24, w1, #1
-	.loc 3 815 0
 	mov	w21, 0
-	.loc 3 828 0
 	stp	wzr, wzr, [x29, 132]
-	.loc 3 820 0
 	str	wzr, [x29, 140]
-	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1526:
-	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1527:
-	.loc 3 841 0
-	ldr	w0, [x25, 2564]
-	.loc 3 835 0
+	ldr	w0, [x25, 2588]
 	mov	w20, w26
-.LVL1528:
-	.loc 3 837 0
 	sub	w22, w24, w26
 	add	w22, w22, 1
-.LVL1529:
-	.loc 3 841 0
 	add	w0, w0, w22
-	str	w0, [x25, 2564]
-.LVL1530:
-.L1475:
-	.loc 3 842 0
-	cbnz	w22, .L1491
-	.loc 3 898 0
+	str	w0, [x25, 2588]
+.L1485:
+	cbnz	w22, .L1501
 	ldr	x0, [x29, 96]
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3300]
-	cbnz	w1, .L1492
-	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x0, 2392]
+	ldrh	w1, [x0, 3324]
+	cbnz	w1, .L1502
+	ldrh	w0, [x0, 2416]
 	cmp	w0, 31
-	bhi	.L1472
-.L1492:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1482
+.L1502:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1531:
-	b	.L1472
-.LVL1532:
-.L1491:
-	.loc 3 843 0
+	b	.L1482
+.L1501:
 	add	x1, x29, 156
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1533:
-	.loc 3 844 0
 	ldr	w1, [x29, 156]
 	cmn	w1, #1
-	bne	.L1476
+	bne	.L1486
 	mov	w5, 0
-.LVL1534:
-.L1477:
-	.loc 3 845 0 discriminator 1
-	ldrh	w0, [x25, 38]
-.LVL1535:
+.L1487:
+	ldrh	w0, [x25, 62]
 	cmp	w5, w0
-	bcc	.L1479
-.LVL1536:
-.L1480:
-	.loc 3 872 0
+	bcc	.L1489
+.L1490:
 	add	w20, w20, 1
-	.loc 3 874 0
 	subs	w22, w22, #1
-	beq	.L1484
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x25, 12]
+	beq	.L1494
+	ldrh	w0, [x25, 36]
 	cmp	w28, w0, lsl 2
-	bne	.L1475
-.L1484:
-	.loc 3 875 0 is_stmt 1
-	cbz	w28, .L1475
-	.loc 3 876 0
-	ldr	x0, [x25, 3960]
+	bne	.L1485
+.L1494:
+	cbz	w28, .L1485
+	ldr	x0, [x25, 4016]
 	mov	w1, w28
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1537:
-	.loc 3 883 0
 	ldr	w0, [x29, 132]
-.LVL1538:
 	lsl	w0, w0, 9
-.LVL1539:
 	str	w0, [x29, 112]
-	.loc 3 880 0
 	ldr	w0, [x29, 140]
-.LVL1540:
 	lsl	w0, w0, 9
-.LVL1541:
 	str	x0, [x29, 120]
 	ldr	w0, [x29, 136]
 	lsl	w0, w0, 9
 	str	w0, [x29, 116]
 	ubfiz	x0, x28, 5, 32
 	mov	x28, 0
-.LVL1542:
 	str	x0, [x29, 104]
-.L1490:
-	.loc 3 878 0
-	ldr	x0, [x25, 3960]
+.L1500:
+	ldr	x0, [x25, 4016]
 	add	x0, x0, x28
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1486
-	.loc 3 879 0
+	bne	.L1496
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3936]
+	ldr	x0, [x25, 3992]
 	cmp	x1, x0
-	bne	.L1487
-	.loc 3 880 0
+	bne	.L1497
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 116]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1503:
-	.loc 3 883 0
+.L1513:
 	bl	ftl_memcpy
-.LVL1543:
-.L1487:
-	.loc 3 885 0
-	ldr	x0, [x25, 3960]
+.L1497:
+	ldr	x0, [x25, 4016]
 	add	x1, x0, x28
 	ldr	w2, [x0, x28]
 	cmn	w2, #1
-	bne	.L1488
-	.loc 3 886 0
-	ldr	w0, [x25, 2768]
-	.loc 3 887 0
+	bne	.L1498
+	ldr	w0, [x25, 2792]
 	mov	w21, w2
-	.loc 3 886 0
 	add	w0, w0, 1
-	str	w0, [x25, 2768]
-.L1488:
-	.loc 3 889 0
+	str	w0, [x25, 2792]
+.L1498:
 	ldr	w0, [x1]
 	cmp	w0, 256
-	bne	.L1489
-.LBB324:
-	.loc 3 890 0
+	bne	.L1499
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1544:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1545:
-.L1489:
-.LBE324:
-	.loc 3 877 0 discriminator 2
+.L1499:
 	ldr	x0, [x29, 104]
 	add	x28, x28, 32
 	cmp	x0, x28
-	bne	.L1490
-	.loc 3 894 0
+	bne	.L1500
 	mov	w28, 0
-.LVL1546:
-	b	.L1475
-.LVL1547:
-.L1479:
-	.loc 3 846 0
+	b	.L1485
+.L1489:
 	madd	w0, w20, w0, w5
-.LVL1548:
-	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1478
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1488
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bls	.L1478
-	.loc 3 848 0 is_stmt 1
+	bls	.L1488
 	sub	w0, w0, w19
-.LVL1549:
 	str	w5, [x29, 120]
 	lsl	w0, w0, 9
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1550:
 	ldr	w5, [x29, 120]
-.LVL1551:
-.L1478:
-	.loc 3 845 0 discriminator 2
+.L1488:
 	add	w5, w5, 1
-	b	.L1477
-.LVL1552:
-.L1476:
-	.loc 3 851 0
-	ldr	x0, [x25, 3960]
+	b	.L1487
+.L1486:
+	ldr	x0, [x25, 4016]
 	ubfiz	x2, x28, 5, 32
-	.loc 3 852 0
 	cmp	w20, w26
-	.loc 3 851 0
 	add	x0, x0, x2
 	str	w1, [x0, 4]
-	ldrh	w0, [x25, 38]
-	.loc 3 852 0
-	bne	.L1481
-	.loc 3 853 0
-	ldr	x1, [x25, 3960]
-	ldr	x5, [x25, 3936]
+	ldrh	w0, [x25, 62]
+	bne	.L1491
+	ldr	x1, [x25, 4016]
+	ldr	x5, [x25, 3992]
 	add	x1, x1, x2
 	str	x5, [x1, 8]
-	.loc 3 854 0
 	udiv	w5, w19, w0
 	msub	w3, w5, w0, w19
-.LVL1553:
 	str	w3, [x29, 140]
-	.loc 3 855 0
 	sub	w5, w0, w3
 	cmp	w27, w5
 	csel	w3, w27, w5, ls
-.LVL1554:
 	str	w3, [x29, 136]
-	.loc 3 857 0
 	cmp	w3, w0
-	bne	.L1482
-	.loc 3 858 0
+	bne	.L1492
 	str	x23, [x1, 8]
-.LVL1555:
-.L1482:
-	.loc 3 867 0
-	ldr	x0, [x25, 3960]
-	ldr	x1, [x25, 3928]
+.L1492:
+	ldr	x0, [x25, 4016]
+	ldr	x1, [x25, 3984]
 	add	x2, x0, x2
-	ldrh	w0, [x25, 92]
-	.loc 3 868 0
+	ldrh	w0, [x25, 116]
 	str	w20, [x2, 24]
-	.loc 3 867 0
 	mul	w0, w0, w28
-	.loc 3 869 0
 	add	w28, w28, 1
-	.loc 3 867 0
 	and	x0, x0, 4294967292
 	add	x0, x1, x0
 	str	x0, [x2, 16]
-	b	.L1480
-.LVL1556:
-.L1481:
-	.loc 3 859 0
+	b	.L1490
+.L1491:
 	cmp	w20, w24
-	bne	.L1483
-	.loc 3 860 0
-	ldr	x5, [x25, 3960]
-	ldr	x1, [x25, 3920]
+	bne	.L1493
+	ldr	x5, [x25, 4016]
+	ldr	x1, [x25, 3976]
 	add	x5, x5, x2
-	.loc 3 861 0
 	ldr	w3, [x29, 128]
-	.loc 3 860 0
 	str	x1, [x5, 8]
-	.loc 3 861 0
 	mul	w1, w20, w0
 	sub	w3, w3, w1
-.LVL1557:
 	str	w3, [x29, 132]
-	.loc 3 862 0
 	cmp	w0, w3
-	bne	.L1482
-	.loc 3 863 0
+	bne	.L1492
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x5, 8]
-	b	.L1482
-.LVL1558:
-.L1483:
-	.loc 3 865 0
-	ldr	x1, [x25, 3960]
+	b	.L1492
+.L1493:
+	ldr	x1, [x25, 4016]
 	mul	w0, w0, w20
 	add	x1, x1, x2
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
 	str	x0, [x1, 8]
-	b	.L1482
-.LVL1559:
-.L1486:
-	.loc 3 881 0
+	b	.L1492
+.L1496:
 	cmp	w24, w1
-	bne	.L1487
-	.loc 3 882 0
+	bne	.L1497
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3920]
+	ldr	x0, [x25, 3976]
 	cmp	x1, x0
-	bne	.L1487
-	.loc 3 883 0
-	ldrh	w0, [x25, 38]
+	bne	.L1497
+	ldrh	w0, [x25, 62]
 	ldr	w2, [x29, 112]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1503
-.LVL1560:
-.L1493:
-	.loc 3 831 0
+	b	.L1513
+.L1503:
 	mov	w21, -1
-	b	.L1472
-	.cfi_endproc
-.LFE153:
+	b	.L1482
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
 	.type	sftl_read, %function
 sftl_read:
-.LFB158:
-	.loc 3 1204 0
-	.cfi_startproc
-.LVL1561:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 3 1205 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1562:
 	mov	w1, w0
-.LVL1563:
-	.loc 3 1204 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 1205 0
 	mov	w0, 0
-.LVL1564:
-	.loc 3 1204 0
-	.loc 3 1205 0
 	bl	FtlRead
-.LVL1565:
-	.loc 3 1206 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE158:
 	.size	sftl_read, .-sftl_read
 	.align	2
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB156:
-	.loc 3 962 0
-	.cfi_startproc
-.LVL1566:
 	stp	x29, x30, [sp, -224]!
-	.cfi_def_cfa_offset 224
-	.cfi_offset 29, -224
-	.cfi_offset 30, -216
 	and	w0, w0, 255
-	.loc 3 970 0
 	cmp	w0, 16
-	.loc 3 962 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -176
-	.cfi_offset 24, -168
 	mov	w23, w1
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -160
-	.cfi_offset 26, -152
 	mov	w26, w2
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -144
-	.cfi_offset 28, -136
 	mov	x27, x3
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -208
-	.cfi_offset 20, -200
-	.cfi_offset 21, -192
-	.cfi_offset 22, -184
-	.loc 3 970 0
-	bne	.L1507
-	.loc 3 971 0
+	bne	.L1517
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w23, 256
-.LVL1567:
 	bl	FtlVendorPartWrite
-.LVL1568:
-.L1506:
-	.loc 3 1153 0
+.L1516:
 	ldp	x19, x20, [sp, 16]
-.LVL1569:
 	ldp	x21, x22, [sp, 32]
-.LVL1570:
 	ldp	x23, x24, [sp, 48]
-.LVL1571:
 	ldp	x25, x26, [sp, 64]
-.LVL1572:
 	ldp	x27, x28, [sp, 80]
-.LVL1573:
 	ldp	x29, x30, [sp], 224
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1574:
-.L1507:
-	.cfi_restore_state
-	.loc 3 974 0
+.L1517:
 	add	w3, w1, w2
 	adrp	x20, .LANCHOR0
 	add	x2, x20, :lo12:.LANCHOR0
-	ldr	w0, [x2, 120]
-.LVL1575:
+	ldr	w0, [x2, 144]
 	cmp	w3, w0
-	bhi	.L1549
-	.loc 3 974 0 is_stmt 0 discriminator 1
+	bhi	.L1559
 	adrp	x1, .LANCHOR2
 	str	x1, [x29, 136]
 	ldr	w0, [x1, #:lo12:.LANCHOR2]
 	cmn	w0, #1
-	beq	.L1506
-	.loc 3 978 0 is_stmt 1
-	ldrh	w1, [x2, 38]
-	.loc 3 977 0
+	beq	.L1516
+	ldrh	w1, [x2, 62]
 	adrp	x4, .LANCHOR3
-	.loc 3 979 0
 	sub	w3, w3, #1
-	.loc 3 977 0
 	add	x5, x4, :lo12:.LANCHOR3
 	mov	w0, 2048
 	str	x4, [x29, 104]
-	.loc 3 978 0
 	udiv	w22, w23, w1
-.LVL1576:
-	.loc 3 977 0
-	str	w0, [x5, 76]
-	.loc 3 979 0
+	str	w0, [x5, 132]
 	udiv	w0, w3, w1
-.LVL1577:
-	.loc 3 983 0
-	ldr	x3, [x5, -112]
-	.loc 3 980 0
+	ldr	x3, [x5, -56]
 	sub	w24, w0, w22
-	.loc 3 979 0
 	str	w0, [x29, 148]
-	.loc 3 982 0
-	ldr	w0, [x2, 2572]
-.LVL1578:
-	.loc 3 980 0
+	ldr	w0, [x2, 2596]
 	add	w25, w24, 1
-.LVL1579:
-	.loc 3 982 0
 	add	w0, w0, w25
-	str	w0, [x2, 2572]
-	.loc 3 983 0
-	cbz	x3, .L1509
-	.loc 3 984 0
+	str	w0, [x2, 2596]
+	cbz	x3, .L1519
 	ldr	w0, [x3, 24]
 	cmp	w22, w0
-	beq	.L1510
-	.loc 3 985 0
+	beq	.L1520
 	bl	FtlCacheWriteBack
-.LVL1580:
-.L1509:
-	.loc 3 1008 0
+.L1519:
 	ldr	x0, [x29, 136]
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
-	cbz	w0, .L1551
-	.loc 3 1008 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x19, 2404]
-	add	x0, x19, 2400
-	.loc 3 1009 0 is_stmt 1 discriminator 1
-	add	x19, x19, 2448
+	cbz	w0, .L1561
+	ldrh	w1, [x19, 2428]
+	add	x0, x19, 2424
+	add	x19, x19, 2472
 	cmp	w1, 0
 	csel	x19, x19, x0, eq
-.LVL1581:
-.L1512:
-	.loc 3 1012 0
+.L1522:
 	adrp	x0, .LANCHOR1
 	mov	w21, w22
-.LVL1582:
 	add	x0, x0, :lo12:.LANCHOR1
 	add	x0, x0, 672
 	str	x0, [x29, 160]
-.LVL1583:
-.L1513:
-	.loc 3 1011 0
-	cbz	w25, .L1547
-	.loc 3 1012 0
+.L1523:
+	cbz	w25, .L1557
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
-	ldrh	w0, [x0, 12]
+	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1514
-	.loc 3 1012 0 is_stmt 0 discriminator 1
+	bcc	.L1524
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1012
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1584:
-.L1514:
-	.loc 3 1013 0 is_stmt 1
+.L1524:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1515
-	.loc 3 1014 0
+	cbnz	w0, .L1525
 	bl	FtlCacheWriteBack
-.LVL1585:
-	.loc 3 1016 0
 	add	x0, x20, :lo12:.LANCHOR0
-	add	x1, x0, 2400
+	add	x1, x0, 2424
 	cmp	x19, x1
-	bne	.L1516
-	.loc 3 1017 0
-	add	x0, x0, 2448
+	bne	.L1526
+	add	x0, x0, 2472
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1517
-	.loc 3 1018 0
+	cbnz	w1, .L1527
 	bl	allocate_new_data_superblock
-.LVL1586:
-	.loc 3 1019 0
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-.L1517:
-	.loc 3 1021 0
+.L1527:
 	add	x19, x20, :lo12:.LANCHOR0
-.LVL1587:
-	add	x24, x19, 2400
-	.loc 3 1023 0
-	add	x19, x19, 2448
-	.loc 3 1021 0
+	add	x24, x19, 2424
+	add	x19, x19, 2472
 	mov	x0, x24
 	bl	allocate_new_data_superblock
-.LVL1588:
-	.loc 3 1022 0
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
-	.loc 3 1023 0
 	cmp	w0, 0
 	csel	x19, x19, x24, ne
-.LVL1589:
-.L1518:
-	.loc 3 1033 0
+.L1528:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1515
-	.loc 3 1034 0
+	cbnz	w0, .L1525
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1590:
-.L1515:
-	.loc 3 1043 0
+.L1525:
 	ldrh	w0, [x19, 4]
-	.loc 3 1041 0
 	ldrb	w1, [x19, 7]
 	cmp	w0, w25
 	csel	w0, w0, w25, ls
@@ -18303,116 +10657,74 @@ FtlWrite:
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 132]
-	.loc 3 1045 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
-	ldrh	w0, [x0, 12]
+	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1519
-	.loc 3 1045 0 is_stmt 0 discriminator 1
+	bcc	.L1529
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1045
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1591:
-.L1519:
-	.loc 3 1068 0 is_stmt 1 discriminator 1
+.L1529:
 	str	xzr, [x29, 168]
-.L1520:
-	.loc 3 1046 0 discriminator 1
+.L1530:
 	ldr	w1, [x29, 132]
 	ldr	w28, [x29, 168]
-.LVL1592:
 	cmp	w28, w1
-	bcc	.L1541
+	bcc	.L1551
 	mov	x28, x1
-.L1521:
-	.loc 3 1127 0
+.L1531:
 	ldr	x0, [x29, 104]
 	add	x0, x0, :lo12:.LANCHOR3
-	ldr	x0, [x0, -112]
-	cbz	x0, .L1542
-	.loc 3 1129 0
+	ldr	x0, [x0, -56]
+	cbz	x0, .L1552
 	sub	w25, w25, #1
-.LVL1593:
-	.loc 3 1130 0
 	subs	w28, w28, #1
-	bne	.L1542
-.L1547:
-	.loc 3 1137 0
+	bne	.L1552
+.L1557:
 	ldr	w0, [x29, 148]
-	.loc 3 1139 0
 	add	x20, x20, :lo12:.LANCHOR0
-.LVL1594:
-	.loc 3 1137 0
 	sub	w1, w0, w22
 	mov	w0, 0
-.LVL1595:
 	bl	rk_ftl_garbage_collect
-.LVL1596:
-	.loc 3 1139 0
-	ldrh	w0, [x20, 2392]
+	ldrh	w0, [x20, 2416]
 	cmp	w0, 15
-	bhi	.L1544
-	.loc 3 1141 0
+	bhi	.L1554
 	mov	w21, 65535
-.LVL1597:
-	.loc 3 1143 0
 	mov	w19, 128
-.LVL1598:
-.L1567:
-	.loc 3 1141 0
-	ldrh	w0, [x20, 2648]
+.L1577:
+	ldrh	w0, [x20, 2672]
 	cmp	w0, w21
-	bne	.L1548
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x20, 3296]
+	bne	.L1558
+	ldrh	w0, [x20, 3320]
 	cmp	w0, w21
-	bne	.L1548
-	.loc 3 1142 0 is_stmt 1
+	bne	.L1558
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1599:
 	bl	FtlGcRefreshBlock
-.LVL1600:
-.L1548:
-	.loc 3 1145 0
+.L1558:
 	mov	w1, 1
-	.loc 3 1143 0
-	strh	w19, [x20, 3210]
-	.loc 3 1145 0
+	strh	w19, [x20, 3234]
 	mov	w0, w1
-	.loc 3 1144 0
-	strh	w19, [x20, 3208]
-	.loc 3 1145 0
+	strh	w19, [x20, 3232]
 	bl	rk_ftl_garbage_collect
-.LVL1601:
-	.loc 3 1146 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1602:
-	.loc 3 1147 0
-	ldrh	w0, [x20, 2392]
+	ldrh	w0, [x20, 2416]
 	cmp	w0, 8
-	bls	.L1567
-	b	.L1544
-.LVL1603:
-.L1510:
-	.loc 3 987 0
-	ldr	w0, [x2, 2576]
-	.loc 3 992 0
+	bls	.L1577
+	b	.L1554
+.L1520:
+	ldr	w0, [x2, 2600]
 	ldr	x3, [x3, 8]
-	.loc 3 987 0
 	add	w0, w0, 1
-	str	w0, [x2, 2576]
-	.loc 3 988 0
+	str	w0, [x2, 2600]
 	msub	w0, w22, w1, w23
-	.loc 3 989 0
 	sub	w1, w1, w0
 	cmp	w26, w1
-	.loc 3 992 0
 	lsl	w0, w0, 9
 	csel	w19, w26, w1, ls
 	add	x0, x3, x0
@@ -18420,267 +10732,175 @@ FtlWrite:
 	mov	x1, x27
 	mov	w2, w21
 	bl	ftl_memcpy
-.LVL1604:
-	.loc 3 994 0
-	cbnz	w24, .L1511
-.LVL1605:
-.L1544:
-	.loc 3 995 0
+	cbnz	w24, .L1521
+.L1554:
 	mov	w0, 0
-	b	.L1506
-.LVL1606:
-.L1511:
-	.loc 3 996 0
+	b	.L1516
+.L1521:
 	sub	w26, w26, w19
-	.loc 3 997 0
 	add	w23, w23, w19
-	.loc 3 998 0
 	add	x27, x27, x21
-	.loc 3 999 0
 	add	w22, w22, 1
-	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1607:
 	mov	w25, w24
-	b	.L1509
-.L1551:
-	.loc 3 1006 0
-	add	x19, x19, 2400
-.LVL1608:
-	b	.L1512
-.LVL1609:
-.L1516:
-	.loc 3 1027 0
+	b	.L1519
+.L1561:
+	add	x19, x19, 2424
+	b	.L1522
+.L1526:
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-	.loc 3 1028 0
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1554
-	.loc 3 1029 0
+	cbnz	w0, .L1564
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1610:
-	b	.L1518
-.L1554:
+	b	.L1528
+.L1564:
 	mov	x19, x1
-	b	.L1515
-.LVL1611:
-.L1541:
-	.loc 3 1047 0
+	b	.L1525
+.L1551:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1521
-	.loc 3 1051 0
+	cbz	w0, .L1531
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1612:
-	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1613:
-	.loc 3 1054 0
 	add	x3, x20, :lo12:.LANCHOR0
 	ldr	x1, [x29, 168]
-	.loc 3 1055 0
 	str	x3, [x29, 152]
 	lsl	x24, x1, 5
-	.loc 3 1054 0
-	ldr	x1, [x3, 3976]
-	.loc 3 1055 0
-	ldrh	w2, [x3, 92]
-	.loc 3 1054 0
+	ldr	x1, [x3, 4032]
+	ldrh	w2, [x3, 116]
 	add	x1, x1, x24
 	str	w0, [x1, 4]
-.LVL1614:
-	.loc 3 1055 0
 	mul	w28, w28, w2
-.LVL1615:
-	ldr	x0, [x3, 3976]
+	ldr	x0, [x3, 4032]
 	and	x1, x28, 4294967292
 	str	x1, [x29, 120]
 	add	x0, x0, x24
-	ldr	x1, [x3, 3928]
+	ldr	x1, [x3, 3984]
 	ldr	x3, [x29, 120]
 	str	x1, [x29, 112]
 	add	x28, x1, x3
-	.loc 3 1056 0
 	str	w21, [x0, 24]
-	.loc 3 1055 0
 	str	x28, [x0, 16]
-	.loc 3 1059 0
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-.LVL1616:
-	.loc 3 1061 0
 	ldr	w0, [x29, 148]
 	cmp	w21, w22
 	ldr	x3, [x29, 152]
-.LVL1617:
 	ccmp	w21, w0, 4, ne
-	bne	.L1522
-	.loc 3 1062 0
+	bne	.L1532
 	cmp	w21, w22
-	bne	.L1523
-	.loc 3 1063 0
-	ldrh	w2, [x3, 38]
+	bne	.L1533
+	ldrh	w2, [x3, 62]
 	udiv	w0, w23, w2
-.LVL1618:
 	msub	w0, w0, w2, w23
 	str	w0, [x29, 144]
-	.loc 3 1064 0
 	sub	w2, w2, w0
 	cmp	w2, w26
 	csel	w0, w2, w26, ls
 	str	w0, [x29, 152]
-.L1524:
-	.loc 3 1072 0
+.L1534:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w2, [x29, 152]
-	ldrh	w1, [x0, 38]
+	ldrh	w1, [x0, 62]
 	cmp	w2, w1
-	bne	.L1525
-	.loc 3 1074 0
-	ldr	x0, [x0, 3976]
-	.loc 3 1073 0
+	bne	.L1535
+	ldr	x0, [x0, 4032]
 	cmp	w21, w22
-	.loc 3 1074 0
 	add	x24, x0, x24
-	.loc 3 1073 0
-	bne	.L1526
-	.loc 3 1074 0
+	bne	.L1536
 	str	x27, [x24, 8]
-.LVL1619:
-.L1527:
-	.loc 3 1119 0
+.L1537:
 	add	x0, x20, :lo12:.LANCHOR0
-.LVL1620:
 	ldrb	w1, [x19, 6]
-	ldrh	w0, [x0, 12]
+	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1538
-	.loc 3 1119 0 is_stmt 0 discriminator 1
+	bcc	.L1548
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1119
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1621:
-.L1538:
-	.loc 3 1120 0 is_stmt 1
+.L1548:
 	ldp	x1, x2, [x29, 112]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1121 0
 	add	x1, x20, :lo12:.LANCHOR0
-	ldr	w0, [x1, 2600]
-	.loc 3 1122 0
+	ldr	w0, [x1, 2624]
 	stp	w0, w21, [x28, 4]
-	.loc 3 1125 0
 	add	w21, w21, 1
-	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, 2600]
-	.loc 3 1123 0
+	str	w0, [x1, 2624]
 	ldr	w0, [x29, 188]
-.LVL1622:
 	str	w0, [x28, 12]
-	.loc 3 1124 0
 	ldrh	w0, [x19]
-.LVL1623:
 	strh	w0, [x28, 2]
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1520
-.LVL1624:
-.L1523:
-	.loc 3 1069 0
-	ldrh	w0, [x3, 38]
-.LVL1625:
+	b	.L1530
+.L1533:
+	ldrh	w0, [x3, 62]
 	add	w2, w23, w26
-	.loc 3 1068 0
 	str	wzr, [x29, 144]
-	.loc 3 1069 0
 	msub	w2, w21, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 152]
-	b	.L1524
-.L1526:
-	.loc 3 1076 0
+	b	.L1534
+.L1536:
 	ldr	w0, [x29, 152]
-.L1570:
-	.loc 3 1117 0
+.L1580:
 	mul	w0, w0, w21
 	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x27, x0
 	str	x0, [x24, 8]
-	b	.L1527
-.L1525:
-	.loc 3 1080 0
-	ldr	x1, [x0, 3976]
-	.loc 3 1079 0
+	b	.L1537
+.L1535:
+	ldr	x1, [x0, 4032]
 	cmp	w21, w22
-	.loc 3 1080 0
 	add	x1, x1, x24
-	.loc 3 1079 0
-	bne	.L1528
-	.loc 3 1080 0
-	ldr	x0, [x0, 3936]
-.L1569:
-	.loc 3 1082 0
+	bne	.L1538
+	ldr	x0, [x0, 3992]
+.L1579:
 	str	x0, [x1, 8]
-	.loc 3 1084 0
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1530
-.LBB325:
-	.loc 3 1088 0
+	beq	.L1540
 	add	x3, x20, :lo12:.LANCHOR0
-	.loc 3 1086 0
 	str	w0, [x29, 196]
-	.loc 3 1087 0
 	str	w21, [x29, 216]
-	.loc 3 1090 0
 	mov	w2, 0
-	.loc 3 1088 0
 	str	x3, [x29, 96]
-	ldr	x0, [x3, 3976]
+	ldr	x0, [x3, 4032]
 	add	x0, x0, x24
-	.loc 3 1089 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 200]
-	.loc 3 1090 0
 	mov	w1, 1
 	add	x0, x29, 192
 	bl	FlashReadPages
-.LVL1626:
-	.loc 3 1091 0
 	ldr	w0, [x29, 192]
 	ldr	x3, [x29, 96]
 	cmn	w0, #1
-	bne	.L1531
-	.loc 3 1092 0
-	ldr	w0, [x3, 2768]
+	bne	.L1541
+	ldr	w0, [x3, 2792]
 	add	w0, w0, 1
-	str	w0, [x3, 2768]
-.L1534:
+	str	w0, [x3, 2792]
+.L1544:
 	ldr	w0, [x29, 152]
-.LBE325:
-	.loc 3 1104 0
 	cmp	w21, w22
 	lsl	w2, w0, 9
-	.loc 3 1105 0
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 3 1104 0
-	bne	.L1535
-	.loc 3 1105 0
-	ldr	x1, [x0, 3976]
+	bne	.L1545
+	ldr	x1, [x0, 4032]
 	ldr	w0, [x29, 144]
 	add	x1, x1, x24
 	lsl	w0, w0, 9
@@ -18688,80 +10908,57 @@ FtlWrite:
 	mov	x1, x27
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1627:
-	.loc 3 1109 0
 	ldr	w0, [x29, 148]
-.LVL1628:
 	cmp	w21, w0
-	bne	.L1527
-.L1536:
-	.loc 3 1110 0
+	bne	.L1537
+.L1546:
 	ldrh	w0, [x19, 4]
-.LVL1629:
-	cbz	w0, .L1527
-	.loc 3 1111 0
+	cbz	w0, .L1537
 	ldr	x0, [x29, 104]
 	add	x1, x0, :lo12:.LANCHOR3
 	add	x0, x20, :lo12:.LANCHOR0
-	ldr	x0, [x0, 3976]
-	.loc 3 1112 0
-	str	x19, [x1, 56]
-	.loc 3 1111 0
+	ldr	x0, [x0, 4032]
+	str	x19, [x1, 112]
 	add	x24, x0, x24
-	str	x24, [x1, -112]
-	b	.L1527
-.L1528:
-	.loc 3 1082 0
-	ldr	x0, [x0, 3920]
-	b	.L1569
-.L1531:
-.LBB326:
-	.loc 3 1094 0
+	str	x24, [x1, -56]
+	b	.L1537
+.L1538:
+	ldr	x0, [x0, 3976]
+	b	.L1579
+.L1541:
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1533
-	.loc 3 1095 0
-	ldr	w0, [x3, 2768]
-	.loc 3 1096 0
+	beq	.L1543
+	ldr	w0, [x3, 2792]
 	mov	w2, w21
-	.loc 3 1095 0
 	add	w0, w0, 1
-	str	w0, [x3, 2768]
-	.loc 3 1096 0
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	str	w0, [x3, 2792]
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	ldr	w1, [x28, 8]
 	bl	printk
-.LVL1630:
-.L1533:
-	.loc 3 1098 0
+.L1543:
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1534
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	beq	.L1544
 	ldr	x1, [x29, 160]
 	mov	w2, 1098
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1631:
-	b	.L1534
-.L1530:
-.LBE326:
-	.loc 3 1101 0 is_stmt 1
+	b	.L1544
+.L1540:
 	add	x1, x20, :lo12:.LANCHOR0
-	ldr	x0, [x1, 3976]
-	ldrh	w2, [x1, 90]
+	ldr	x0, [x1, 4032]
+	ldrh	w2, [x1, 114]
 	mov	w1, 0
 	add	x0, x0, x24
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL1632:
-	b	.L1534
-.L1535:
-	.loc 3 1107 0
-	ldrh	w1, [x0, 38]
-	ldr	x0, [x0, 3976]
+	b	.L1544
+.L1545:
+	ldrh	w1, [x0, 62]
+	ldr	x0, [x0, 4032]
 	add	x0, x0, x24
 	mul	w1, w1, w21
 	ldr	x0, [x0, 8]
@@ -18769,178 +10966,92 @@ FtlWrite:
 	lsl	w1, w1, 9
 	add	x1, x27, x1
 	bl	ftl_memcpy
-.LVL1633:
-	b	.L1536
-.LVL1634:
-.L1522:
-	.loc 3 1117 0
-	ldr	x0, [x3, 3976]
-.LVL1635:
+	b	.L1546
+.L1532:
+	ldr	x0, [x3, 4032]
 	add	x24, x0, x24
-	ldrh	w0, [x3, 38]
-	b	.L1570
-.LVL1636:
-.L1542:
-	.loc 3 1133 0
+	ldrh	w0, [x3, 62]
+	b	.L1580
+.L1552:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w28
-	ldr	x0, [x0, 3976]
+	ldr	x0, [x0, 4032]
 	bl	FtlProgPages
-.LVL1637:
-	.loc 3 1134 0
 	cmp	w25, w28
-	bcs	.L1545
-	.loc 3 1134 0 is_stmt 0 discriminator 1
+	bcs	.L1555
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1134
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1638:
-.L1545:
-	.loc 3 1135 0 is_stmt 1
+.L1555:
 	sub	w25, w25, w28
-	b	.L1513
-.LVL1639:
-.L1549:
-	.loc 3 975 0
+	b	.L1523
+.L1559:
 	mov	w0, -1
-	b	.L1506
-	.cfi_endproc
-.LFE156:
+	b	.L1516
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-.LFB159:
-	.loc 3 1209 0
-	.cfi_startproc
-.LVL1640:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1641:
 	mov	w1, w0
-.LVL1642:
-	.loc 3 1209 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 1210 0
 	mov	w0, 0
-.LVL1643:
-	.loc 3 1209 0
-	.loc 3 1210 0
 	bl	FtlWrite
-.LVL1644:
-	.loc 3 1211 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE159:
 	.size	sftl_write, .-sftl_write
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB213:
-	.loc 2 1409 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1409 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 1414 0
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 1414 0
-	add	x21, x19, 3344
-	.loc 2 1409 0
+	add	x21, x19, 3400
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 1414 0
-	ldr	x0, [x19, 3376]
+	ldr	x0, [x19, 3432]
 	str	x0, [x21, 8]
-	.loc 2 1415 0
-	ldr	x0, [x19, 3384]
+	ldr	x0, [x19, 3440]
 	str	x0, [x21, 16]
-	.loc 2 1417 0
-	ldr	x0, [x19, 2352]
-	ldrh	w2, [x19, 20]
+	ldr	x0, [x19, 2376]
+	ldrh	w2, [x19, 44]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1645:
-	.loc 2 1418 0
-	ldrh	w0, [x19, 2632]
+	ldrh	w0, [x19, 2656]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1574
-.LVL1646:
-.L1582:
-	.loc 2 1419 0
+	bne	.L1584
+.L1592:
 	mov	w0, -1
-.L1573:
-	.loc 2 1512 0
+.L1583:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1647:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1574:
-	.cfi_restore_state
-	add	x23, x19, 2632
-	.loc 2 1421 0
+.L1584:
+	add	x23, x19, 2656
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1648:
 	sxth	w22, w0
-.LVL1649:
-	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1431 0
 	mov	w24, 61604
-	.loc 2 1422 0
 	strh	w0, [x23, 2]
-	.loc 2 1430 0
 	mov	w23, 19539
 	movk	w23, 0x4654, lsl 16
-.L1576:
-	.loc 2 1424 0
-	tbz	w22, #31, .L1579
-	.loc 2 1437 0
+.L1586:
+	tbz	w22, #31, .L1589
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -18948,16 +11059,13 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1650:
-.L1578:
-	.loc 2 1439 0
+.L1588:
 	add	x1, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 20]
-	ldrh	w1, [x1, 90]
+	ldrh	w0, [x1, 44]
+	ldrh	w1, [x1, 114]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1581
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1591
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -18965,82 +11073,57 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1651:
-.L1581:
-	.loc 2 1441 0 is_stmt 1
+.L1591:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w2, 48
-	add	x21, x19, 2288
+	add	x21, x19, 2312
 	mov	x0, x21
-	ldr	x1, [x19, 3352]
+	ldr	x1, [x19, 3408]
 	bl	ftl_memcpy
-.LVL1652:
-	.loc 2 1442 0
-	ldr	x0, [x19, 2352]
-	ldrh	w2, [x19, 20]
-	ldr	x1, [x19, 3352]
+	ldr	x0, [x19, 2376]
+	ldrh	w2, [x19, 44]
+	ldr	x1, [x19, 3408]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL1653:
-	.loc 2 1443 0
-	ldrh	w1, [x19, 20]
-	ldr	x0, [x19, 3352]
+	ldrh	w1, [x19, 44]
+	ldr	x0, [x19, 3408]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
 	add	x1, x1, 48
 	add	w2, w2, 4
 	and	x1, x1, -4
 	add	x1, x0, x1
-	ldr	x0, [x20, #:lo12:.LANCHOR0]
+	ldr	x0, [x19, 24]
 	bl	ftl_memcpy
-.LVL1654:
-	.loc 2 1445 0
-	ldr	w1, [x19, 2288]
+	ldr	w1, [x19, 2312]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1582
-	.loc 2 1448 0
-	ldrh	w1, [x19, 2296]
-	.loc 2 1449 0
-	ldrb	w2, [x19, 2298]
-	ldrh	w0, [x19, 34]
-	.loc 2 1448 0
-	strh	w1, [x19, 2638]
-	.loc 2 1449 0
+	bne	.L1592
+	ldrh	w1, [x19, 2320]
+	ldrb	w2, [x19, 2322]
+	ldrh	w0, [x19, 58]
+	strh	w1, [x19, 2662]
 	cmp	w2, w0
-	bne	.L1582
-	.loc 2 1452 0
-	adrp	x0, .LANCHOR3+80
-	.loc 2 1454 0
-	ldrh	w2, [x19, 38]
-	.loc 2 1455 0
-	ldrh	w3, [x19, 12]
-	.loc 2 1452 0
-	str	w1, [x0, #:lo12:.LANCHOR3+80]
-	.loc 2 1453 0
-	ldrh	w0, [x19, 82]
+	bne	.L1592
+	adrp	x0, .LANCHOR3+136
+	ldrh	w2, [x19, 62]
+	ldrh	w3, [x19, 36]
+	str	w1, [x0, #:lo12:.LANCHOR3+136]
+	ldrh	w0, [x19, 106]
 	mul	w0, w0, w1
-	str	w0, [x19, 2560]
-	.loc 2 1454 0
+	str	w0, [x19, 2584]
 	mul	w0, w2, w0
-	.loc 2 1455 0
-	ldr	w2, [x19, 24]
-	.loc 2 1454 0
-	str	w0, [x19, 120]
-	.loc 2 1455 0
-	ldrh	w0, [x19, 142]
-	.loc 2 1461 0
+	ldr	w2, [x19, 48]
+	str	w0, [x19, 144]
+	ldrh	w0, [x19, 166]
 	cmp	w1, w2
-	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	strh	w0, [x19, 2628]
-	.loc 2 1461 0
-	bls	.L1583
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	strh	w0, [x19, 2652]
+	bls	.L1593
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -19048,986 +11131,1023 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	printk
-.LVL1655:
-.L1583:
-	.loc 2 1463 0 is_stmt 1
+.L1593:
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 2 1468 0
 	mov	w3, -1
-	.loc 2 1464 0
-	ldrh	w2, [x0, 2304]
-	.loc 2 1463 0
-	ldrh	w4, [x0, 2302]
-	strh	w4, [x0, 2400]
-	.loc 2 1464 0
+	ldrh	w2, [x0, 2328]
+	ldrh	w4, [x0, 2326]
+	strh	w4, [x0, 2424]
 	lsr	w5, w2, 6
-	.loc 2 1465 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2406]
-	.loc 2 1466 0
-	ldrb	w2, [x0, 2299]
-	strb	w2, [x0, 2408]
-	.loc 2 1473 0
-	ldrh	w2, [x0, 2306]
-	strh	w2, [x0, 2448]
-	.loc 2 1474 0
-	ldrh	w2, [x0, 2308]
-	.loc 2 1464 0
-	strh	w5, [x0, 2402]
-	.loc 2 1468 0
-	strh	w3, [x0, 2648]
-	.loc 2 1474 0
+	strb	w2, [x0, 2430]
+	ldrb	w2, [x0, 2323]
+	strb	w2, [x0, 2432]
+	ldrh	w2, [x0, 2330]
+	strh	w2, [x0, 2472]
+	ldrh	w2, [x0, 2332]
+	strh	w5, [x0, 2426]
+	strh	w3, [x0, 2672]
 	lsr	w5, w2, 6
-	.loc 2 1475 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2454]
-	.loc 2 1476 0
-	ldrb	w2, [x0, 2300]
-	strb	w2, [x0, 2456]
-	.loc 2 1478 0
-	ldrh	w2, [x0, 2310]
-	strh	w2, [x0, 2496]
-	.loc 2 1479 0
-	ldrh	w2, [x0, 2312]
-	.loc 2 1474 0
-	strh	w5, [x0, 2450]
-	.loc 2 1469 0
-	strh	wzr, [x0, 2650]
-	.loc 2 1479 0
+	strb	w2, [x0, 2478]
+	ldrb	w2, [x0, 2324]
+	strb	w2, [x0, 2480]
+	ldrh	w2, [x0, 2334]
+	strh	w2, [x0, 2520]
+	ldrh	w2, [x0, 2336]
+	strh	w5, [x0, 2474]
+	strh	wzr, [x0, 2674]
 	lsr	w5, w2, 6
-	.loc 2 1480 0
 	and	w2, w2, 63
-	strb	w2, [x0, 2502]
-	.loc 2 1481 0
-	ldrb	w2, [x0, 2301]
-	strb	w2, [x0, 2504]
-	.loc 2 1488 0
-	ldr	w2, [x0, 2320]
-	str	w2, [x0, 2604]
-	.loc 2 1470 0
-	strb	wzr, [x0, 2654]
-	.loc 2 1471 0
-	strb	wzr, [x0, 2656]
-	.loc 2 1479 0
-	strh	w5, [x0, 2498]
-	.loc 2 1485 0
-	str	wzr, [x0, 2564]
-	.loc 2 1484 0
-	str	wzr, [x0, 2572]
-	.loc 2 1486 0
-	str	wzr, [x0, 2580]
-	.loc 2 1483 0
-	str	wzr, [x0, 2584]
-	.loc 2 1489 0
+	strb	w2, [x0, 2526]
+	ldrb	w2, [x0, 2325]
+	strb	w2, [x0, 2528]
+	ldr	w2, [x0, 2344]
+	str	w2, [x0, 2628]
+	strb	wzr, [x0, 2678]
+	strb	wzr, [x0, 2680]
+	strh	w5, [x0, 2522]
+	str	wzr, [x0, 2588]
+	str	wzr, [x0, 2596]
+	str	wzr, [x0, 2604]
 	str	wzr, [x0, 2608]
-	.loc 2 1490 0
-	str	wzr, [x0, 2620]
-	.loc 2 1493 0
-	ldr	w1, [x0, 2328]
-	ldr	w2, [x0, 2596]
-	.loc 2 1491 0
-	str	wzr, [x0, 2576]
-	.loc 2 1493 0
+	str	wzr, [x0, 2632]
+	str	wzr, [x0, 2644]
+	ldr	w1, [x0, 2352]
+	ldr	w2, [x0, 2620]
+	str	wzr, [x0, 2600]
 	cmp	w1, w2
-	bls	.L1584
-	.loc 2 1494 0
-	str	w1, [x0, 2596]
-.L1584:
-	.loc 2 1496 0
+	bls	.L1594
+	str	w1, [x0, 2620]
+.L1594:
 	add	x0, x20, :lo12:.LANCHOR0
-	ldr	w1, [x0, 2324]
-	ldr	w2, [x0, 2600]
+	ldr	w1, [x0, 2348]
+	ldr	w2, [x0, 2624]
 	cmp	w1, w2
-	bls	.L1585
-	.loc 2 1497 0
-	str	w1, [x0, 2600]
-.L1585:
-	.loc 2 1499 0
+	bls	.L1595
+	str	w1, [x0, 2624]
+.L1595:
 	mov	w0, 65535
 	cmp	w4, w0
-	beq	.L1586
-	.loc 2 1500 0
+	beq	.L1596
 	add	x0, x20, :lo12:.LANCHOR0
-	add	x0, x0, 2400
+	add	x0, x0, 2424
 	bl	make_superblock
-.LVL1656:
-.L1586:
-	.loc 2 1502 0
+.L1596:
 	add	x1, x20, :lo12:.LANCHOR0
-	add	x0, x1, 2448
-	ldrh	w2, [x1, 2448]
+	add	x0, x1, 2472
+	ldrh	w2, [x1, 2472]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1587
-	.loc 2 1503 0
+	beq	.L1597
 	bl	make_superblock
-.LVL1657:
-.L1587:
-	.loc 2 1505 0
+.L1597:
 	add	x1, x20, :lo12:.LANCHOR0
-	add	x0, x1, 2496
-	ldrh	w2, [x1, 2496]
+	add	x0, x1, 2520
+	ldrh	w2, [x1, 2520]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1588
-	.loc 2 1506 0
+	beq	.L1598
 	bl	make_superblock
-.LVL1658:
-.L1588:
-	.loc 2 1508 0
+.L1598:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
-	add	x0, x20, 2648
-	ldrh	w2, [x20, 2648]
+	add	x0, x20, 2672
+	ldrh	w2, [x20, 2672]
 	cmp	w2, w1
-	beq	.L1589
-	.loc 2 1509 0
+	beq	.L1599
 	bl	make_superblock
-.LVL1659:
-.L1589:
-	.loc 2 1511 0
+.L1599:
 	mov	w0, 0
-	b	.L1573
-.L1579:
-	.loc 2 1425 0
-	ldrh	w0, [x19, 2632]
-	.loc 2 1427 0
+	b	.L1583
+.L1589:
+	ldrh	w0, [x19, 2656]
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1426 0
-	ldr	x0, [x19, 3376]
+	ldr	x0, [x19, 3432]
 	str	x0, [x21, 8]
-	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL1660:
-	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1577
-	.loc 2 1431 0 discriminator 1
-	ldr	x0, [x19, 3376]
-	.loc 2 1430 0 discriminator 1
+	beq	.L1587
+	ldr	x0, [x19, 3432]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1577
-	.loc 2 1432 0
-	ldr	x0, [x19, 3384]
+	bne	.L1587
+	ldr	x0, [x19, 3440]
 	ldrh	w0, [x0]
-	.loc 2 1431 0
 	cmp	w0, w24
-	beq	.L1578
-.L1577:
+	beq	.L1588
+.L1587:
 	sub	w22, w22, #1
-.LVL1661:
 	sxth	w22, w22
-.LVL1662:
-	b	.L1576
-	.cfi_endproc
-.LFE213:
+	b	.L1586
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	2
 	.global	FtlSysBlkInit
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB231:
-	.loc 2 2356 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 2362 0
 	adrp	x20, .LANCHOR0
-	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2362 0
 	add	x19, x20, :lo12:.LANCHOR0
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 2360 0
 	adrp	x21, .LANCHOR3
 	add	x0, x21, :lo12:.LANCHOR3
-	.loc 2 2356 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 2360 0
-	strh	wzr, [x0, -88]
-	.loc 2 2362 0
-	ldrh	w0, [x19, 16]
+	strh	wzr, [x0, -32]
+	ldrh	w0, [x19, 40]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1663:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1664:
-	.loc 2 2364 0
-	ldrh	w1, [x19, 2632]
+	ldrh	w1, [x19, 2656]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1596
-.L1598:
-	.loc 2 2365 0
+	bne	.L1606
+.L1608:
 	mov	w24, -1
-.L1595:
-	.loc 2 2448 0
+.L1605:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1596:
-	.cfi_restore_state
-	.loc 2 2367 0
+.L1606:
 	bl	FtlLoadSysInfo
-.LVL1665:
 	mov	w24, w0
-	cbnz	w0, .L1598
-	.loc 2 2370 0
+	cbnz	w0, .L1608
 	bl	FtlLoadMapInfo
-.LVL1666:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1667:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1668:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1669:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1670:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1671:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1672:
-	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL1673:
-	ldr	x1, [x19, 2544]
-.LBB330:
-.LBB331:
-	.loc 2 2382 0
+	ldr	x1, [x19, 2568]
 	mov	w0, 0
-.LVL1674:
-	ldrh	w3, [x19, 118]
+	ldrh	w3, [x19, 142]
 	add	x1, x1, 4
-.L1599:
+.L1609:
 	cmp	w0, w3
-	bge	.L1604
-	.loc 2 2383 0
+	bge	.L1614
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L1600
-.L1604:
-	.loc 2 2386 0
+	tbz	w2, #31, .L1610
+.L1614:
 	add	x1, x20, :lo12:.LANCHOR0
-	.loc 2 2388 0
 	cmp	w0, w3
-	.loc 2 2386 0
-	ldrh	w2, [x1, 2316]
+	ldrh	w2, [x1, 2340]
 	add	w2, w2, 1
-	strh	w2, [x1, 2316]
-	.loc 2 2388 0
-	bge	.L1610
-.L1601:
-	.loc 2 2389 0
+	strh	w2, [x1, 2340]
+	bge	.L1620
+.L1611:
 	add	x19, x20, :lo12:.LANCHOR0
-	.loc 2 2409 0
 	add	x21, x21, :lo12:.LANCHOR3
-	.loc 2 2389 0
-	add	x23, x19, 2400
-	.loc 2 2390 0
-	add	x22, x19, 2448
-	.loc 2 2389 0
+	add	x23, x19, 2424
+	add	x22, x19, 2472
 	mov	x0, x23
-.LVL1675:
 	bl	FtlSuperblockPowerLostFix
-.LVL1676:
-	.loc 2 2390 0
 	mov	x0, x22
 	bl	FtlSuperblockPowerLostFix
-.LVL1677:
-.LBB332:
-	.loc 2 2396 0
-	ldrh	w0, [x19, 2400]
-	ldr	x2, [x19, 2352]
-	ldrh	w3, [x19, 2404]
+	ldrh	w0, [x19, 2424]
+	ldr	x2, [x19, 2376]
+	ldrh	w3, [x19, 2428]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2398 0
-	strb	wzr, [x19, 2406]
-	.loc 2 2397 0
-	ldrh	w0, [x19, 82]
-	strh	w0, [x19, 2402]
-	.loc 2 2402 0
-	ldrh	w0, [x19, 2448]
-	ldr	x2, [x19, 2352]
-	.loc 2 2399 0
-	strh	wzr, [x19, 2404]
-	.loc 2 2402 0
+	strb	wzr, [x19, 2430]
+	ldrh	w0, [x19, 106]
+	strh	w0, [x19, 2426]
+	ldrh	w0, [x19, 2472]
+	ldr	x2, [x19, 2376]
+	strh	wzr, [x19, 2428]
 	lsl	x0, x0, 1
-	ldrh	w3, [x19, 2452]
+	ldrh	w3, [x19, 2476]
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2404 0
-	strb	wzr, [x19, 2454]
-	.loc 2 2403 0
-	ldrh	w0, [x19, 82]
-	strh	w0, [x19, 2450]
-.LBE332:
-	.loc 2 2409 0
-	sub	x0, x21, #248
-.LBB333:
-	.loc 2 2405 0
-	strh	wzr, [x19, 2452]
-.LBE333:
-	.loc 2 2409 0
+	strb	wzr, [x19, 2478]
+	ldrh	w0, [x19, 106]
+	strh	w0, [x19, 2474]
+	sub	x0, x21, #192
+	strh	wzr, [x19, 2476]
 	bl	FtlMapBlkWriteDump_data
-.LVL1678:
-	.loc 2 2410 0
-	sub	x0, x21, #176
+	sub	x0, x21, #120
 	bl	FtlMapBlkWriteDump_data
-.LVL1679:
-	.loc 2 2422 0
-	ldrh	w0, [x19, 2318]
+	ldrh	w0, [x19, 2342]
 	add	w0, w0, 1
-	strh	w0, [x19, 2318]
-	.loc 2 2423 0
+	strh	w0, [x19, 2342]
 	bl	l2p_flush
-.LVL1680:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1681:
-	.loc 2 2425 0
 	bl	FtlVpcTblFlush
-.LVL1682:
-	b	.L1605
-.LVL1683:
-.L1600:
-	.loc 2 2382 0
-	add	w0, w0, 1
-	b	.L1599
+	b	.L1615
 .L1610:
-	.loc 2 2388 0
+	add	w0, w0, 1
+	b	.L1609
+.L1620:
 	add	x0, x21, :lo12:.LANCHOR3
-.LVL1684:
-	ldrh	w0, [x0, -88]
-	cbnz	w0, .L1601
-.L1605:
-	.loc 2 2429 0
+	ldrh	w0, [x0, -32]
+	cbnz	w0, .L1611
+.L1615:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
-	add	x22, x19, 2400
-	ldrh	w0, [x19, 2400]
+	add	x22, x19, 2424
+	ldrh	w0, [x19, 2424]
 	cmp	w0, w1
-	beq	.L1606
-	ldrh	w1, [x19, 2404]
-	cbnz	w1, .L1606
-	.loc 2 2430 0
-	ldrh	w1, [x19, 2452]
-	.loc 2 2431 0
-	add	x21, x19, 2448
-	.loc 2 2430 0
-	cbnz	w1, .L1606
-	.loc 2 2432 0
+	beq	.L1616
+	ldrh	w1, [x19, 2428]
+	cbnz	w1, .L1616
+	ldrh	w1, [x19, 2476]
+	add	x21, x19, 2472
+	cbnz	w1, .L1616
 	bl	FtlGcRefreshBlock
-.LVL1685:
-	.loc 2 2433 0
-	ldrh	w0, [x19, 2448]
+	ldrh	w0, [x19, 2472]
 	bl	FtlGcRefreshBlock
-.LVL1686:
-	.loc 2 2434 0
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.LVL1687:
-	.loc 2 2435 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL1688:
-.L1606:
-	.loc 2 2440 0
+.L1616:
 	add	x20, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x20, 2316]
+	ldrh	w0, [x20, 2340]
 	tst	x0, 31
-	bne	.L1595
-	.loc 2 2441 0
+	bne	.L1605
 	bl	FtlVpcCheckAndModify
-.LVL1689:
-	b	.L1595
-.LBE331:
-.LBE330:
-	.cfi_endproc
-.LFE231:
+	b	.L1605
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB149:
-	.loc 3 623 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 3 629 0
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
-	.loc 3 623 0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.loc 3 629 0
-	str	wzr, [x0, 2596]
-	.loc 3 630 0
-	str	wzr, [x0, 2600]
-	.loc 3 631 0
-	ldrh	w0, [x0, 16]
+	str	wzr, [x0, 2620]
+	str	wzr, [x0, 2624]
+	ldrh	w0, [x0, 40]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1690:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL1691:
-	cbz	w0, .L1613
-	.loc 3 633 0
+	cbz	w0, .L1623
 	bl	FtlMakeBbt
-.LVL1692:
-.L1613:
-	.loc 3 637 0 discriminator 1
+.L1623:
 	mov	w4, 23752
-	.loc 3 635 0 discriminator 1
 	add	x1, x20, :lo12:.LANCHOR0
-	.loc 3 623 0 discriminator 1
 	mov	w0, 0
-.LVL1693:
-	.loc 3 637 0 discriminator 1
 	movk	w4, 0xa0f, lsl 16
-.L1614:
-	.loc 3 635 0 discriminator 1
-	ldrh	w2, [x1, 38]
+.L1624:
+	ldrh	w2, [x1, 62]
 	cmp	w0, w2, lsl 7
-	blt	.L1615
-	.loc 3 642 0
-	ldrh	w21, [x1, 20]
+	blt	.L1625
+	ldrh	w21, [x1, 44]
 	add	x22, x20, :lo12:.LANCHOR0
-	.loc 3 641 0
 	mov	w19, 0
-.LVL1694:
-.L1616:
-	.loc 3 642 0 discriminator 1
-	ldrh	w0, [x22, 22]
-.LVL1695:
+.L1626:
+	ldrh	w0, [x22, 46]
 	cmp	w0, w21
-	bhi	.L1617
-	.loc 3 645 0
-	ldrh	w0, [x22, 12]
+	bhi	.L1627
+	ldrh	w0, [x22, 36]
 	sub	w1, w19, #3
 	cmp	w1, w0, lsl 1
-	bge	.L1618
-.L1622:
-	.loc 3 656 0
+	bge	.L1628
+.L1632:
 	add	x19, x20, :lo12:.LANCHOR0
-.LVL1696:
-	.loc 3 641 0
 	mov	w21, 0
-.LVL1697:
 	mov	w22, 0
-.L1619:
-	.loc 3 656 0 discriminator 1
-	ldrh	w0, [x19, 20]
+.L1629:
+	ldrh	w0, [x19, 44]
 	cmp	w0, w22
-	bhi	.L1623
-	.loc 3 661 0
-	ldrh	w2, [x19, 12]
-	ldr	w1, [x19, 24]
-	.loc 3 658 0
-	ldrh	w0, [x19, 22]
-	str	w0, [x19, 3912]
-	.loc 3 661 0
+	bhi	.L1633
+	ldrh	w2, [x19, 36]
+	ldr	w1, [x19, 48]
+	ldrh	w0, [x19, 46]
+	str	w0, [x19, 3968]
 	udiv	w4, w1, w2
-	.loc 3 662 0
 	ubfx	x3, x4, 5, 16
-	.loc 3 661 0
-	str	w4, [x19, 2560]
-	.loc 3 662 0
+	str	w4, [x19, 2584]
 	add	w0, w3, 36
-	strh	w0, [x19, 2628]
-	.loc 3 663 0
+	strh	w0, [x19, 2652]
 	mov	w0, 24
 	mul	w0, w2, w0
 	cmp	w21, w0
-	ble	.L1624
-	.loc 3 664 0
+	ble	.L1634
 	sub	w1, w1, w21
 	udiv	w1, w1, w2
-	str	w1, [x19, 2560]
-	.loc 3 665 0
+	str	w1, [x19, 2584]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x19, 2628]
-.L1624:
-	.loc 3 668 0
+	strh	w1, [x19, 2652]
+.L1634:
 	add	x0, x20, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 74]
-	cbz	w1, .L1626
-	.loc 3 669 0
-	ldrh	w5, [x0, 2628]
+	ldrh	w1, [x0, 98]
+	cbz	w1, .L1636
+	ldrh	w5, [x0, 2652]
 	add	w5, w5, w1, lsr 1
-	strh	w5, [x0, 2628]
-	.loc 3 670 0
+	strh	w5, [x0, 2652]
 	mul	w5, w1, w2
 	cmp	w21, w5
-	bge	.L1626
-	.loc 3 672 0
+	bge	.L1636
 	add	w1, w1, 32
-	.loc 3 671 0
-	str	w4, [x0, 2560]
-	.loc 3 672 0
+	str	w4, [x0, 2584]
 	add	w1, w3, w1
-	strh	w1, [x0, 2628]
-.L1626:
-	.loc 3 677 0
+	strh	w1, [x0, 2652]
+.L1636:
 	add	x19, x20, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR3
-	.loc 3 694 0
-	add	x21, x19, 2400
-.LVL1698:
-	.loc 3 689 0
+	add	x21, x19, 2424
 	mov	w23, -1
-	.loc 3 677 0
-	ldrh	w1, [x19, 2628]
-	ldr	w0, [x19, 2560]
+	ldrh	w1, [x19, 2652]
+	ldr	w0, [x19, 2584]
 	sub	w0, w0, w1
 	add	x1, x22, :lo12:.LANCHOR3
 	mul	w0, w0, w2
-	str	w0, [x1, 80]
-	.loc 3 678 0
-	ldrh	w1, [x19, 82]
+	str	w0, [x1, 136]
+	ldrh	w1, [x19, 106]
 	mul	w0, w1, w0
-	.loc 3 679 0
-	ldrh	w1, [x19, 38]
-	.loc 3 678 0
-	str	w0, [x19, 2560]
-	.loc 3 679 0
+	ldrh	w1, [x19, 62]
+	str	w0, [x19, 2584]
 	mul	w0, w1, w0
-	str	w0, [x19, 120]
-	.loc 3 684 0
+	str	w0, [x19, 144]
 	bl	FtlBbmTblFlush
-.LVL1699:
-	.loc 3 687 0
-	ldr	x0, [x19, 2352]
+	ldr	x0, [x19, 2376]
 	mov	w1, 0
-	ldrh	w2, [x19, 22]
+	ldrh	w2, [x19, 46]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1700:
-	.loc 3 697 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
-	.loc 3 698 0
-	ldr	x0, [x20, #:lo12:.LANCHOR0]
+	ldr	x0, [x19, 24]
 	mov	w1, 255
-	ldrh	w2, [x19, 20]
-	.loc 3 689 0
-	strh	w23, [x19, 2648]
-	.loc 3 690 0
-	strh	wzr, [x19, 2650]
-	.loc 3 691 0
-	strb	wzr, [x19, 2654]
-	.loc 3 698 0
+	ldrh	w2, [x19, 44]
+	strh	w23, [x19, 2672]
+	strh	wzr, [x19, 2674]
+	strb	wzr, [x19, 2678]
 	lsr	w2, w2, 3
-	.loc 3 692 0
-	strb	wzr, [x19, 2656]
-	.loc 3 694 0
+	strb	wzr, [x19, 2680]
 	strh	wzr, [x21, 2]
-	.loc 3 695 0
 	strb	wzr, [x21, 6]
-	.loc 3 696 0
-	strh	wzr, [x19, 2400]
-	.loc 3 688 0
-	str	wzr, [x19, 2556]
-	.loc 3 698 0
+	strh	wzr, [x19, 2424]
+	str	wzr, [x19, 2580]
 	bl	ftl_memset
-.LVL1701:
-.L1628:
-	.loc 3 701 0
+.L1638:
 	mov	x0, x21
 	bl	make_superblock
-.LVL1702:
-	.loc 3 702 0
 	ldrb	w1, [x21, 7]
 	ldrh	w0, [x21]
-	cbnz	w1, .L1629
-	.loc 3 705 0
-	ldr	x1, [x19, 2352]
+	cbnz	w1, .L1639
+	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
-	.loc 3 706 0
 	ldrh	w0, [x21]
 	add	w0, w0, 1
 	strh	w0, [x21]
-	.loc 3 707 0
-	b	.L1628
-.LVL1703:
-.L1615:
-	.loc 3 636 0 discriminator 3
-	ldr	x5, [x1, 3936]
+	b	.L1638
+.L1625:
+	ldr	x5, [x1, 3992]
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
-	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL1704:
 	and	w0, w0, 65535
-.LVL1705:
-	.loc 3 636 0 discriminator 3
 	str	w2, [x5, x3]
-	.loc 3 637 0 discriminator 3
-	ldr	x2, [x1, 3920]
+	ldr	x2, [x1, 3976]
 	str	w4, [x2, x3]
-	b	.L1614
-.LVL1706:
-.L1617:
-	.loc 3 643 0 discriminator 3
+	b	.L1624
+.L1627:
 	mov	w0, w21
 	mov	w1, 1
-	.loc 3 642 0 discriminator 3
 	add	w21, w21, 1
-	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1707:
 	add	w19, w19, w0
-.LVL1708:
-	.loc 3 642 0 discriminator 3
 	and	w21, w21, 65535
-	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1709:
-	b	.L1616
-.L1618:
-	.loc 3 647 0
+	b	.L1626
+.L1628:
 	udiv	w0, w19, w0
-	ldr	w19, [x22, 112]
-.LVL1710:
-	.loc 3 650 0
+	ldr	w19, [x22, 136]
 	add	x21, x20, :lo12:.LANCHOR0
-	.loc 3 647 0
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL1711:
-	.loc 3 648 0
-	ldrh	w0, [x22, 16]
+	ldrh	w0, [x22, 40]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1712:
-	.loc 3 650 0
-	ldrh	w19, [x22, 20]
-.L1620:
-	.loc 3 650 0 is_stmt 0 discriminator 1
-	ldrh	w0, [x21, 22]
+	ldrh	w19, [x22, 44]
+.L1630:
+	ldrh	w0, [x21, 46]
 	cmp	w0, w19
-	bls	.L1622
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1632
 	mov	w0, w19
-	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-	.loc 3 651 0 discriminator 3
 	mov	w1, 1
-	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1713:
-	b	.L1620
-.LVL1714:
-.L1623:
-	.loc 3 657 0 discriminator 3
+	b	.L1630
+.L1633:
 	mov	w0, w22
 	mov	w1, 0
-	.loc 3 656 0 discriminator 3
 	add	w22, w22, 1
-	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL1715:
 	add	w21, w21, w0
-.LVL1716:
-	.loc 3 656 0 discriminator 3
 	and	w22, w22, 65535
-	.loc 3 657 0 discriminator 3
 	and	w21, w21, 65535
-.LVL1717:
-	b	.L1619
-.LVL1718:
-.L1629:
-	.loc 3 709 0
-	ldr	w1, [x19, 2596]
-	.loc 3 710 0
-	ubfiz	x0, x0, 1, 16
-	.loc 3 709 0
-	str	w1, [x21, 12]
-	add	w1, w1, 1
-	str	w1, [x19, 2596]
-	.loc 3 710 0
-	ldr	x1, [x19, 2352]
-	ldrh	w2, [x21, 4]
-	strh	w2, [x1, x0]
-	.loc 3 712 0
-	add	x0, x19, 2448
-	strh	wzr, [x19, 2450]
-	.loc 3 714 0
-	ldrh	w1, [x21]
-	.loc 3 721 0
-	mov	w21, -1
-	.loc 3 713 0
-	strb	wzr, [x19, 2454]
-	.loc 3 714 0
-	add	w1, w1, 1
-	strh	w1, [x19, 2448]
-	.loc 3 715 0
-	mov	w1, 1
-	strb	w1, [x19, 2456]
-	.loc 3 717 0
-	add	x19, x20, :lo12:.LANCHOR0
-	mov	x20, x0
-.L1630:
-	mov	x0, x20
-	bl	make_superblock
-.LVL1719:
-	.loc 3 718 0
-	ldrb	w1, [x20, 7]
-	ldrh	w0, [x20]
-	cbnz	w1, .L1631
-	.loc 3 721 0
-	ldr	x1, [x19, 2352]
-	ubfiz	x0, x0, 1, 16
-	strh	w21, [x1, x0]
-	.loc 3 722 0
-	ldrh	w0, [x20]
+	b	.L1629
+.L1639:
+	ldr	w1, [x19, 2620]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x21, 12]
+	add	w1, w1, 1
+	str	w1, [x19, 2620]
+	ldr	x1, [x19, 2376]
+	ldrh	w2, [x21, 4]
+	strh	w2, [x1, x0]
+	add	x0, x19, 2472
+	strh	wzr, [x19, 2474]
+	ldrh	w1, [x21]
+	mov	w21, -1
+	strb	wzr, [x19, 2478]
+	add	w1, w1, 1
+	strh	w1, [x19, 2472]
+	mov	w1, 1
+	strb	w1, [x19, 2480]
+	add	x19, x20, :lo12:.LANCHOR0
+	mov	x20, x0
+.L1640:
+	mov	x0, x20
+	bl	make_superblock
+	ldrb	w1, [x20, 7]
+	ldrh	w0, [x20]
+	cbnz	w1, .L1641
+	ldr	x1, [x19, 2376]
+	ubfiz	x0, x0, 1, 16
+	strh	w21, [x1, x0]
+	ldrh	w0, [x20]
+	add	w0, w0, 1
+	strh	w0, [x20]
+	b	.L1640
+.L1641:
+	ldr	w1, [x19, 2620]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x20, 12]
+	add	x22, x22, :lo12:.LANCHOR3
+	add	w1, w1, 1
+	str	w1, [x19, 2620]
+	ldr	x1, [x19, 2376]
+	ldrh	w2, [x20, 4]
+	mov	w20, -1
+	strh	w2, [x1, x0]
+	strh	w20, [x19, 2520]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x19, 2656]
+	ldr	w0, [x22, 136]
+	strh	w0, [x19, 2662]
+	ldr	w0, [x19, 2620]
+	str	w0, [x19, 2664]
+	add	w0, w0, 1
+	strh	wzr, [x19, 2658]
+	strh	w20, [x19, 2660]
+	str	w0, [x19, 2620]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1642
+	adrp	x0, .LANCHOR2
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR2]
+.L1642:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_low_format, .-ftl_low_format
+	.align	2
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC70
+	add	x1, x1, :lo12:.LC70
+	mov	w0, -1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR2
+	adrp	x19, .LANCHOR0
+	add	x19, x19, :lo12:.LANCHOR0
+	str	w0, [x20, #:lo12:.LANCHOR2]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printk
+	mov	x0, x19
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldrh	w0, [x19, 40]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	w0, .L1651
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1651
+	mov	w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR2]
+	ldrh	w0, [x19, 2416]
+	cmp	w0, 15
+	bhi	.L1651
+	mov	w19, 8129
+.L1650:
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L1650
+.L1651:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	sftl_init, .-sftl_init
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	stp	x29, x30, [sp, -16]!
+	uxtw	x2, w2
+	add	x29, sp, 0
+	bl	memcmp
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	ftl_memcmp, .-ftl_memcmp
+	.align	2
+	.global	rk_sftl_vendor_dev_ops_register
+	.type	rk_sftl_vendor_dev_ops_register, %function
+rk_sftl_vendor_dev_ops_register:
+	adrp	x2, .LANCHOR3
+	add	x2, x2, :lo12:.LANCHOR3
+	ldr	x3, [x2, 144]
+	cbnz	x3, .L1658
+	stp	x0, x1, [x2, 144]
+	mov	w0, 0
+	ret
+.L1658:
+	mov	w0, -1
+	ret
+	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
+	.align	2
+	.global	rk_sftl_vendor_storage_init
+	.type	rk_sftl_vendor_storage_init, %function
+rk_sftl_vendor_storage_init:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65536
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR3
+	stp	x21, x22, [sp, 32]
+	add	x21, x20, :lo12:.LANCHOR3
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	bl	ftl_malloc
+	str	x0, [x21, 160]
+	cbz	x0, .L1665
+	adrp	x25, .LC106
+	mov	w27, 22084
+	add	x25, x25, :lo12:.LC106
+	mov	w26, 0
+	mov	w24, 0
+	mov	w23, 0
+	movk	w27, 0x524b, lsl 16
+.L1663:
+	ldr	x3, [x21, 144]
+	mov	w1, 128
+	ldr	x2, [x21, 160]
+	lsl	w0, w23, 7
+	blr	x3
+	mov	w22, w0
+	cbnz	w0, .L1661
+	ldr	x0, [x21, 160]
+	add	x1, x0, 61440
+	ldr	w3, [x0, 4]
+	ldr	w2, [x1, 4092]
+	ldr	w1, [x0]
+	mov	x0, x25
+	bl	printk
+	ldr	x19, [x21, 160]
+	ldr	w0, [x19]
+	cmp	w0, w27
+	bne	.L1662
+	add	x0, x19, 61440
+	ldr	w1, [x19, 4]
+	ldr	w0, [x0, 4092]
+	cmp	w0, w1
+	bne	.L1662
+	cmp	w0, w24
+	bls	.L1662
+	mov	w26, w23
+	mov	w24, w0
+.L1662:
+	add	w23, w23, 1
+	cmp	w23, 2
+	bne	.L1663
+	cbz	w24, .L1664
+	add	x0, x20, :lo12:.LANCHOR3
+	mov	x2, x19
+	mov	w1, 128
+	ldr	x3, [x0, 144]
+	lsl	w0, w26, 7
+	blr	x3
+	mov	w22, w0
+	cbz	w0, .L1659
+.L1661:
+	add	x20, x20, :lo12:.LANCHOR3
+	mov	w22, -1
+	ldr	x0, [x20, 160]
+	bl	kfree
+	str	xzr, [x20, 160]
+	b	.L1659
+.L1664:
+	mov	w1, 0
+	mov	x2, 65536
+	mov	x0, x19
+	bl	memset
+	mov	w1, 22084
+	mov	w0, 1
+	movk	w1, 0x524b, lsl 16
+	stp	w1, w0, [x19]
+	add	x1, x19, 61440
+	str	w0, [x1, 4092]
+	mov	w0, -1032
+	strh	w0, [x19, 14]
+.L1659:
+	mov	w0, w22
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1665:
+	mov	w22, -12
+	b	.L1659
+	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
+	.align	2
+	.global	rk_sftl_vendor_read
+	.type	rk_sftl_vendor_read, %function
+rk_sftl_vendor_read:
+	adrp	x3, .LANCHOR3+160
+	ldr	x4, [x3, #:lo12:.LANCHOR3+160]
+	cbz	x4, .L1673
+	ldrh	w6, [x4, 10]
+	add	x5, x4, 16
+	mov	w3, 0
+.L1670:
+	cmp	w3, w6
+	bcc	.L1672
+.L1673:
+	mov	w0, -1
+	ret
+.L1672:
+	ldrh	w7, [x5], 8
+	cmp	w7, w0
+	bne	.L1671
+	stp	x29, x30, [sp, -32]!
+	add	x3, x4, x3, uxtw 3
+	mov	x0, x1
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	ldrh	w19, [x3, 20]
+	ldrh	w1, [x3, 18]
+	cmp	w19, w2
+	csel	w19, w19, w2, ls
+	add	x1, x1, 1024
+	uxtw	x2, w19
+	add	x1, x4, x1
+	bl	memcpy
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1671:
+	add	w3, w3, 1
+	b	.L1670
+	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
+	.align	2
+	.global	rk_sftl_vendor_write
+	.type	rk_sftl_vendor_write, %function
+rk_sftl_vendor_write:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR3
+	add	x3, x23, :lo12:.LANCHOR3
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	x19, [x3, 160]
+	cbz	x19, .L1693
+	add	w21, w2, 63
+	ldrh	w3, [x19, 10]
+	ldrh	w24, [x19, 8]
+	mov	x4, x1
+	mov	w28, w2
+	and	w21, w21, -64
+	add	x1, x19, 16
+	mov	w20, 0
+.L1680:
+	cmp	w20, w3
+	bcc	.L1688
+	ldrh	w1, [x19, 14]
+	cmp	w21, w1
+	bhi	.L1693
+	add	x3, x19, x3, uxth 3
+	and	w21, w21, 65535
+	uxtw	x2, w28
+	strh	w0, [x3, 16]
+	ldrh	w0, [x19, 12]
+	strh	w0, [x3, 18]
+	strh	w28, [x3, 20]
+	add	w0, w0, w21
+	sub	w21, w1, w21
+	strh	w0, [x19, 12]
+	strh	w21, [x19, 14]
+	mov	x1, x4
+	ldrh	w0, [x3, 18]
+	add	x0, x0, 1024
+	add	x0, x19, x0
+	bl	memcpy
+	ldrh	w0, [x19, 10]
+	add	w0, w0, 1
+	strh	w0, [x19, 10]
+	b	.L1695
+.L1688:
+	ldrh	w6, [x1], 8
+	cmp	w6, w0
+	bne	.L1681
+	uxtw	x27, w20
+	add	x5, x19, 1024
+	add	x22, x19, x27, lsl 3
+	ldrh	w25, [x22, 20]
+	add	w25, w25, 63
+	and	w25, w25, -64
+	cmp	w28, w25
+	bls	.L1682
+	ldrh	w0, [x19, 14]
+	cmp	w21, w0
+	bhi	.L1693
+	add	x27, x27, 2
+	ldrh	w22, [x22, 18]
+	add	x27, x19, x27, lsl 3
+	sub	w26, w3, #1
+.L1683:
+	cmp	w20, w26
+	bcc	.L1684
+	add	x20, x19, x20, uxtw 3
+	and	w22, w22, 65535
+	add	x0, x5, x22, uxth
+	uxtw	x2, w28
+	mov	x1, x4
+	and	w21, w21, 65535
+	strh	w22, [x20, 18]
+	add	w22, w22, w21
+	strh	w6, [x20, 16]
+	strh	w28, [x20, 20]
+	bl	memcpy
+	strh	w22, [x19, 12]
+	ldrh	w0, [x19, 14]
+	sub	w21, w0, w21
+	add	w25, w21, w25
+	strh	w25, [x19, 14]
+.L1695:
+	ldr	w0, [x19, 4]
+	add	x1, x19, 61440
+	add	x23, x23, :lo12:.LANCHOR3
+	mov	x2, x19
 	add	w0, w0, 1
-	strh	w0, [x20]
-	.loc 3 723 0
-	b	.L1630
-.L1631:
-	.loc 3 725 0
-	ldr	w1, [x19, 2596]
-	.loc 3 726 0
-	ubfiz	x0, x0, 1, 16
-	.loc 3 725 0
-	str	w1, [x20, 12]
-	.loc 3 733 0
-	add	x22, x22, :lo12:.LANCHOR3
-	.loc 3 725 0
-	add	w1, w1, 1
-	str	w1, [x19, 2596]
-	.loc 3 726 0
-	ldr	x1, [x19, 2352]
-	ldrh	w2, [x20, 4]
-	.loc 3 727 0
-	mov	w20, -1
-	.loc 3 726 0
-	strh	w2, [x1, x0]
-	.loc 3 727 0
-	strh	w20, [x19, 2496]
-	.loc 3 730 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL1720:
-	strh	w0, [x19, 2632]
-	.loc 3 733 0
-	ldr	w0, [x22, 80]
-	strh	w0, [x19, 2638]
-	.loc 3 734 0
-	ldr	w0, [x19, 2596]
-	str	w0, [x19, 2640]
+	str	w0, [x19, 4]
+	str	w0, [x1, 4092]
+	mov	w1, 128
+	ldr	x3, [x23, 152]
+	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
-	.loc 3 731 0
-	strh	wzr, [x19, 2634]
-	.loc 3 732 0
-	strh	w20, [x19, 2636]
-	.loc 3 734 0
-	str	w0, [x19, 2596]
-	.loc 3 735 0
-	bl	FtlVpcTblFlush
-.LVL1721:
-	.loc 3 736 0
-	bl	FtlSysBlkInit
-.LVL1722:
-	cbnz	w0, .L1632
-	.loc 3 737 0
-	adrp	x0, .LANCHOR2
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR2]
-.L1632:
-	.loc 3 739 0
+	and	w0, w0, 65535
+	cmp	w0, 1
+	csel	w0, w0, wzr, ls
+	strh	w0, [x19, 8]
+	lsl	w0, w24, 7
+	blr	x3
 	mov	w0, 0
-	ldr	x23, [sp, 48]
+.L1678:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-	.cfi_endproc
-.LFE149:
-	.size	ftl_low_format, .-ftl_low_format
-	.align	2
-	.global	sftl_init
-	.type	sftl_init, %function
-sftl_init:
-.LFB150:
-	.loc 3 743 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 749 0
-	adrp	x1, .LC70
-	add	x1, x1, :lo12:.LC70
-	.loc 3 746 0
+.L1684:
+	add	w20, w20, 1
+	str	x4, [x29, 104]
+	add	x0, x19, x20, uxtw 3
+	str	x5, [x29, 120]
+	add	x27, x27, 8
+	ldrh	w1, [x0, 16]
+	strh	w1, [x27, -8]
+	ldrh	w1, [x0, 20]
+	strh	w1, [x27, -4]
+	strh	w22, [x27, -6]
+	ldrh	w3, [x0, 20]
+	ldrh	w1, [x0, 18]
+	add	x0, x5, x22, uxtw
+	add	w3, w3, 63
+	and	w3, w3, -64
+	add	x1, x5, x1
+	and	x2, x3, 131008
+	stp	w6, w3, [x29, 112]
+	bl	memcpy
+	ldp	w6, w3, [x29, 112]
+	ldr	x4, [x29, 104]
+	add	w22, w22, w3
+	ldr	x5, [x29, 120]
+	b	.L1683
+.L1682:
+	ldrh	w0, [x22, 18]
+	uxtw	x2, w28
+	mov	x1, x4
+	add	x0, x5, x0
+	bl	memcpy
+	strh	w28, [x22, 20]
+	b	.L1695
+.L1681:
+	add	w20, w20, 1
+	b	.L1680
+.L1693:
 	mov	w0, -1
-	.loc 3 743 0
+	b	.L1678
+	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
+	.align	2
+	.global	rk_sftl_vendor_storage_ioctl
+	.type	rk_sftl_vendor_storage_ioctl, %function
+rk_sftl_vendor_storage_ioctl:
+	stp	x29, x30, [sp, -48]!
+	mov	w0, 4096
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 3 746 0
-	adrp	x20, .LANCHOR2
-	.loc 3 753 0
-	adrp	x19, .LANCHOR0
-	add	x19, x19, :lo12:.LANCHOR0
-	.loc 3 746 0
-	str	w0, [x20, #:lo12:.LANCHOR2]
-	.loc 3 749 0
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printk
-.LVL1723:
-	.loc 3 750 0
-	adrp	x0, g_nand_phy_info
-	add	x0, x0, :lo12:g_nand_phy_info
-	bl	FtlConstantsInit
-.LVL1724:
-	.loc 3 751 0
-	bl	FtlMemInit
-.LVL1725:
-	.loc 3 752 0
-	bl	FtlVariablesInit
-.LVL1726:
-	.loc 3 753 0
-	ldrh	w0, [x19, 16]
-	bl	FtlFreeSysBlkQueueInit
-.LVL1727:
-	.loc 3 756 0
-	bl	FtlLoadBbt
-.LVL1728:
-	cbnz	w0, .L1641
-	.loc 3 767 0
-	bl	FtlSysBlkInit
-.LVL1729:
-	cbnz	w0, .L1641
-	.loc 3 779 0
-	mov	w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR2]
-	.loc 3 783 0
-	ldrh	w0, [x19, 2392]
-	cmp	w0, 15
-	bhi	.L1641
-	mov	w19, 8129
-.L1640:
-.LBB334:
-	.loc 3 786 0 discriminator 3
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL1730:
-	.loc 3 785 0 discriminator 3
-	subs	w19, w19, #1
-	bne	.L1640
-.L1641:
-.LBE334:
-	.loc 3 794 0
-	mov	w0, 0
+	mov	x20, x2
+	str	x21, [sp, 32]
+	mov	w21, w1
+	bl	ftl_malloc
+	cbz	x0, .L1710
+	mov	w1, 30209
+	mov	x19, x0
+	movk	w1, 0x4004, lsl 16
+	cmp	w21, w1
+	beq	.L1699
+	add	w1, w1, 1
+	cmp	w21, w1
+	beq	.L1700
+.L1720:
+	mov	x20, -14
+	b	.L1698
+.L1699:
+#APP
+// 21 "./arch/arm64/include/asm/current.h" 1
+	mrs x21, sp_el0
+// 0 "" 2
+#NO_APP
+	mov	x1, x20
+	ldr	x2, [x21, 8]
+#APP
+// 410 "./arch/arm64/include/asm/uaccess.h" 1
+	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
+// 0 "" 2
+#NO_APP
+	cbz	x3, .L1706
+	mov	x2, 8
+	mov	x1, x20
+	bl	__arch_copy_from_user
+	cbnz	x0, .L1720
+	ldr	w1, [x19]
+	mov	w0, 17745
+	movk	w0, 0x5652, lsl 16
+	cmp	w1, w0
+	beq	.L1704
+.L1705:
+	mov	x20, -1
+.L1698:
+	mov	x0, x19
+	bl	kfree
+.L1696:
+	mov	x0, x20
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
+	ldp	x29, x30, [sp], 48
 	ret
-	.cfi_endproc
-.LFE150:
-	.size	sftl_init, .-sftl_init
-	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-.LFB268:
-	.loc 1 211 0
-	.cfi_startproc
-.LVL1731:
+.L1704:
+	ldrh	w2, [x19, 6]
+	add	x1, x19, 8
+	ldrh	w0, [x19, 4]
+	bl	rk_sftl_vendor_read
+	cmn	w0, #1
+	beq	.L1705
+	strh	w0, [x19, 6]
+	and	x2, x0, 65535
+	add	x2, x2, 8
+	mov	x0, x20
+	ldr	x1, [x21, 8]
+#APP
+// 420 "./arch/arm64/include/asm/uaccess.h" 1
+	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
+// 0 "" 2
+#NO_APP
+	cbz	x3, .L1720
+	mov	x0, x20
+	mov	x1, x19
+	mov	x20, 0
+	bl	__arch_copy_to_user
+	cbz	x0, .L1698
+	b	.L1720
+.L1700:
+#APP
+// 21 "./arch/arm64/include/asm/current.h" 1
+	mrs x21, sp_el0
+// 0 "" 2
+#NO_APP
+	mov	x1, x20
+	ldr	x2, [x21, 8]
+#APP
+// 410 "./arch/arm64/include/asm/uaccess.h" 1
+	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
+// 0 "" 2
+#NO_APP
+	cbz	x3, .L1706
+	mov	x2, 8
+	mov	x1, x20
+	bl	__arch_copy_from_user
+	cbnz	x0, .L1720
+	ldr	w1, [x19]
+	mov	w0, 17745
+	movk	w0, 0x5652, lsl 16
+	cmp	w1, w0
+	bne	.L1705
+	ldrh	w2, [x19, 6]
+	cmp	w2, 4087
+	bhi	.L1705
+	add	w2, w2, 8
+	mov	x0, x20
+	sxtw	x2, w2
+	ldr	x1, [x21, 8]
+#APP
+// 410 "./arch/arm64/include/asm/uaccess.h" 1
+	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
+// 0 "" 2
+#NO_APP
+	cbz	x3, .L1708
+	mov	x1, x20
+	mov	x0, x19
+	bl	__arch_copy_from_user
+	cbnz	x0, .L1720
+	ldrh	w2, [x19, 6]
+	add	x1, x19, 8
+	ldrh	w0, [x19, 4]
+	bl	rk_sftl_vendor_write
+	sxtw	x20, w0
+	b	.L1698
+.L1706:
+	str	xzr, [x19]
+	b	.L1720
+.L1708:
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+	b	.L1720
+.L1710:
+	mov	x20, -1
+	b	.L1696
+	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
+	.align	2
+	.global	rk_sftl_vendor_register
+	.type	rk_sftl_vendor_register, %function
+rk_sftl_vendor_register:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 1 212 0
-	uxtw	x2, w2
-.LVL1732:
-	.loc 1 211 0
+	adrp	x0, .LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR2
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 1 212 0
-	bl	memcmp
-.LVL1733:
-	.loc 1 213 0
+	add	x0, x0, 16
+	bl	misc_register
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE268:
-	.size	ftl_memcmp, .-ftl_memcmp
+	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
 	.global	check_vpc_table
 	.global	FtlUpdateVaildLpnCount
@@ -20176,172 +12296,180 @@ ftl_memcmp:
 	.section	.rodata
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3769, %object
-	.size	__func__.3769, 17
-__func__.3769:
+	.type	__func__.3767, %object
+	.size	__func__.3767, 17
+__func__.3767:
 	.string	"INSERT_DATA_LIST"
 	.zero	7
-	.type	__func__.3764, %object
-	.size	__func__.3764, 17
-__func__.3764:
+	.type	__func__.3762, %object
+	.size	__func__.3762, 17
+__func__.3762:
 	.string	"INSERT_FREE_LIST"
 	.zero	7
-	.type	__func__.3800, %object
-	.size	__func__.3800, 17
-__func__.3800:
+	.type	__func__.3798, %object
+	.size	__func__.3798, 17
+__func__.3798:
 	.string	"List_remove_node"
 	.zero	7
-	.type	__func__.3832, %object
-	.size	__func__.3832, 22
-__func__.3832:
+	.type	__func__.3830, %object
+	.size	__func__.3830, 22
+__func__.3830:
 	.string	"List_update_data_list"
 	.zero	2
-	.type	__func__.3938, %object
-	.size	__func__.3938, 22
-__func__.3938:
+	.type	__func__.3936, %object
+	.size	__func__.3936, 22
+__func__.3936:
 	.string	"select_l2p_ram_region"
 	.zero	2
-	.type	__func__.4261, %object
-	.size	__func__.4261, 16
-__func__.4261:
+	.type	__func__.4259, %object
+	.size	__func__.4259, 16
+__func__.4259:
 	.string	"make_superblock"
-	.type	__func__.4436, %object
-	.size	__func__.4436, 19
-__func__.4436:
+	.type	__func__.4434, %object
+	.size	__func__.4434, 19
+__func__.4434:
 	.string	"get_new_active_ppa"
 	.zero	5
-	.type	__func__.4676, %object
-	.size	__func__.4676, 15
-__func__.4676:
+	.type	__func__.16008, %object
+	.size	__func__.16008, 15
+__func__.16008:
 	.string	"FlashReadPages"
 	.zero	1
-	.type	__func__.4693, %object
-	.size	__func__.4693, 15
-__func__.4693:
+	.type	__func__.16025, %object
+	.size	__func__.16025, 15
+__func__.16025:
 	.string	"FlashProgPages"
 	.zero	1
-	.type	__func__.3874, %object
-	.size	__func__.3874, 26
-__func__.3874:
+	.type	__func__.3872, %object
+	.size	__func__.3872, 26
+__func__.3872:
 	.string	"ftl_map_blk_alloc_new_blk"
 	.zero	6
-	.type	__func__.3388, %object
-	.size	__func__.3388, 11
-__func__.3388:
+	.type	__func__.3376, %object
+	.size	__func__.3376, 11
+__func__.3376:
 	.string	"FtlMemInit"
 	.zero	5
-	.type	__func__.3604, %object
-	.size	__func__.3604, 14
-__func__.3604:
+	.type	__func__.3602, %object
+	.size	__func__.3602, 14
+__func__.3602:
 	.string	"FtlBbt2Bitmap"
 	.zero	2
-	.type	__func__.3841, %object
-	.size	__func__.3841, 16
-__func__.3841:
+	.type	__func__.3839, %object
+	.size	__func__.3839, 16
+__func__.3839:
 	.string	"load_l2p_region"
-	.type	__func__.3899, %object
-	.size	__func__.3899, 31
-__func__.3899:
+	.type	__func__.3897, %object
+	.size	__func__.3897, 31
+__func__.3897:
 	.string	"Ftl_write_map_blk_to_last_page"
 	.zero	1
-	.type	__func__.3913, %object
-	.size	__func__.3913, 16
-__func__.3913:
+	.type	__func__.3911, %object
+	.size	__func__.3911, 16
+__func__.3911:
 	.string	"FtlMapWritePage"
-	.type	__func__.3885, %object
-	.size	__func__.3885, 15
-__func__.3885:
+	.type	__func__.3883, %object
+	.size	__func__.3883, 15
+__func__.3883:
 	.string	"ftl_map_blk_gc"
 	.zero	1
-	.type	__func__.3955, %object
-	.size	__func__.3955, 9
-__func__.3955:
+	.type	__func__.3953, %object
+	.size	__func__.3953, 9
+__func__.3953:
 	.string	"log2phys"
 	.zero	7
-	.type	__func__.4170, %object
-	.size	__func__.4170, 16
-__func__.4170:
+	.type	__func__.4168, %object
+	.size	__func__.4168, 16
+__func__.4168:
 	.string	"FtlReUsePrevPpa"
-	.type	__func__.4050, %object
-	.size	__func__.4050, 14
-__func__.4050:
+	.type	__func__.4048, %object
+	.size	__func__.4048, 14
+__func__.4048:
 	.string	"FtlScanSysBlk"
 	.zero	2
-	.type	__func__.4282, %object
-	.size	__func__.4282, 18
-__func__.4282:
+	.type	__func__.4280, %object
+	.size	__func__.4280, 18
+__func__.4280:
 	.string	"SupperBlkListInit"
 	.zero	6
-	.type	__func__.4323, %object
-	.size	__func__.4323, 14
-__func__.4323:
+	.type	__func__.4321, %object
+	.size	__func__.4321, 14
+__func__.4321:
 	.string	"ftl_check_vpc"
 	.zero	2
-	.type	__func__.4408, %object
-	.size	__func__.4408, 25
-__func__.4408:
+	.type	__func__.4406, %object
+	.size	__func__.4406, 25
+__func__.4406:
 	.string	"allocate_data_superblock"
 	.zero	7
-	.type	__func__.4449, %object
-	.size	__func__.4449, 16
-__func__.4449:
+	.type	__func__.4447, %object
+	.size	__func__.4447, 16
+__func__.4447:
 	.string	"update_vpc_list"
-	.type	__func__.4456, %object
-	.size	__func__.4456, 20
-__func__.4456:
+	.type	__func__.4454, %object
+	.size	__func__.4454, 20
+__func__.4454:
 	.string	"decrement_vpc_count"
 	.zero	4
-	.type	__func__.4204, %object
-	.size	__func__.4204, 22
-__func__.4204:
+	.type	__func__.4202, %object
+	.size	__func__.4202, 22
+__func__.4202:
 	.string	"FtlRecoverySuperblock"
 	.zero	2
-	.type	__func__.3647, %object
-	.size	__func__.3647, 11
-__func__.3647:
+	.type	__func__.3645, %object
+	.size	__func__.3645, 11
+__func__.3645:
 	.string	"FtlLoadBbt"
 	.zero	5
-	.type	__func__.4028, %object
-	.size	__func__.4028, 15
-__func__.4028:
+	.type	__func__.4026, %object
+	.size	__func__.4026, 15
+__func__.4026:
 	.string	"FtlVpcTblFlush"
 	.zero	1
-	.type	__func__.4307, %object
-	.size	__func__.4307, 21
-__func__.4307:
+	.type	__func__.4305, %object
+	.size	__func__.4305, 21
+__func__.4305:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.4429, %object
-	.size	__func__.4429, 29
-__func__.4429:
+	.type	__func__.4427, %object
+	.size	__func__.4427, 29
+__func__.4427:
 	.string	"allocate_new_data_superblock"
 	.zero	3
-	.type	__func__.3512, %object
-	.size	__func__.3512, 13
-__func__.3512:
+	.type	__func__.3500, %object
+	.size	__func__.3500, 13
+__func__.3500:
 	.string	"FtlProgPages"
 	.zero	3
-	.type	__func__.4526, %object
-	.size	__func__.4526, 19
-__func__.4526:
+	.type	__func__.4524, %object
+	.size	__func__.4524, 19
+__func__.4524:
 	.string	"FtlGcFreeTempBlock"
 	.zero	5
-	.type	__func__.4632, %object
-	.size	__func__.4632, 23
-__func__.4632:
+	.type	__func__.4630, %object
+	.size	__func__.4630, 23
+__func__.4630:
 	.string	"rk_ftl_garbage_collect"
 	.zero	1
-	.type	__func__.3540, %object
-	.size	__func__.3540, 9
-__func__.3540:
+	.type	__func__.3528, %object
+	.size	__func__.3528, 9
+__func__.3528:
 	.string	"FtlWrite"
 	.zero	7
-	.type	__func__.4107, %object
-	.size	__func__.4107, 15
-__func__.4107:
+	.type	__func__.4105, %object
+	.size	__func__.4105, 15
+__func__.4105:
 	.string	"FtlLoadSysInfo"
+	.zero	1
+	.type	rk_sftl_vendor_storage_fops, %object
+	.size	rk_sftl_vendor_storage_fops, 216
+rk_sftl_vendor_storage_fops:
+	.zero	64
+	.xword	rk_sftl_vendor_storage_ioctl
+	.xword	rk_sftl_vendor_storage_ioctl
+	.zero	136
 	.data
-	.align	2
+	.align	3
 	.set	.LANCHOR2,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
@@ -20356,10 +12484,23 @@ ftl_gc_temp_block_bops_scan_page_addr:
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
+	.zero	4
+	.type	rkflash_vender_storage_dev, %object
+	.size	rkflash_vender_storage_dev, 80
+rkflash_vender_storage_dev:
+	.word	255
+	.zero	4
+	.xword	.LC107
+	.xword	rk_sftl_vendor_storage_fops
+	.zero	56
 	.bss
 	.align	3
 	.set	.LANCHOR0,. + 0
 	.set	.LANCHOR3,. + 4352
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.zero	24
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 8
 p_blk_mode_table:
@@ -20753,6 +12894,10 @@ g_gc_bad_block_temp_tbl:
 g_gc_bad_block_gc_index:
 	.zero	2
 	.zero	4
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 32
+g_nand_ops:
+	.zero	32
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
@@ -20959,6 +13104,18 @@ g_ftl_nand_free_count:
 g_MaxLbn:
 	.zero	4
 	.zero	4
+	.type	_flash_read, %object
+	.size	_flash_read, 8
+_flash_read:
+	.zero	8
+	.type	_flash_write, %object
+	.size	_flash_write, 8
+_flash_write:
+	.zero	8
+	.type	g_vendor, %object
+	.size	g_vendor, 8
+g_vendor:
+	.zero	8
 	.type	ftl_temp_buf, %object
 	.size	ftl_temp_buf, 4096
 ftl_temp_buf:
@@ -21123,17968 +13280,68 @@ check_vpc_table:
 .LC74:
 	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
 .LC75:
-	.string	"prog read error: = %x\n"
+	.string	"\0014"
 .LC76:
-	.string	"prog read s error: = %x %x %x\n"
+	.string	"prog read error: = %x\n"
 .LC77:
-	.string	"prog read d error: = %x %x %x\n"
+	.string	"prog read s error: = %x %x %x\n"
 .LC78:
-	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+	.string	"prog read d error: = %x %x %x\n"
 .LC79:
-	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
 .LC80:
-	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 .LC81:
-	.string	"%s error allocating memory. return -1\n"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 .LC82:
-	.string	"region_id = %x phyAddr = %x\n"
+	.string	"%s error allocating memory. return -1\n"
 .LC83:
-	.string	"spare:"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC84:
-	.string	"map_ppn:"
+	.string	"spare:"
 .LC85:
-	.string	"FtlMapWritePage error = %x \n"
+	.string	"map_ppn:"
 .LC86:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.string	"FtlMapWritePage error = %x \n"
 .LC87:
-	.string	"ftl_scan_all_data = %x\n"
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 .LC88:
-	.string	"scan lpa = %x ppa= %x\n"
+	.string	"ftl_scan_all_data = %x\n"
 .LC89:
-	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"scan lpa = %x ppa= %x\n"
 .LC90:
-	.string	"...%s enter...\n"
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC91:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"...%s enter...\n"
 .LC92:
-	.string	"free blk vpc error %x = %x  %x\n"
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC93:
-	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+	.string	"free blk vpc error %x = %x  %x\n"
 .LC94:
-	.string	"FtlBbmTblFlush error:%x\n"
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
 .LC95:
-	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.string	"FtlBbmTblFlush error:%x\n"
 .LC96:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 .LC97:
-	.string	"decrement_vpc_count %x = %d\n"
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 .LC98:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"decrement_vpc_count %x = %d\n"
 .LC99:
-	.string	"no ect"
+	.string	"spuer block %x vpn is 0\n "
 .LC100:
-	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.string	"no ect"
 .LC101:
-	.string	"FtlCheckVpc %x = %x  %x\n"
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 .LC102:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.string	"FtlCheckVpc %x = %x  %x\n"
 .LC103:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 .LC104:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+.LC105:
 	.string	"FtlWrite: lpa error:%x %x\n"
-	.text
-.Letext0:
-	.file 6 "include/asm-generic/int-ll64.h"
-	.file 7 "include/linux/types.h"
-	.file 8 "include/linux/init.h"
-	.file 9 "./arch/arm64/include/asm/cachetype.h"
-	.file 10 "include/linux/printk.h"
-	.file 11 "include/linux/kernel.h"
-	.file 12 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 13 "drivers/rkflash/rksftl/flash_com.h"
-	.file 14 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 15 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 16 "./arch/arm64/include/asm/string.h"
-	.file 17 "drivers/rkflash/rksftl/typedef.h"
-	.file 18 "<built-in>"
-	.section	.debug_info,"",@progbits
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-	.uleb128 0x1a
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-	.byte	0x4
-	.uleb128 0x1c
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-	.uleb128 0x1b
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-	.byte	0xe
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-	.uleb128 0x1a
-	.4byte	.LASF60
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-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF61
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-	.uleb128 0x1a
-	.4byte	.LASF180
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-	.4byte	.LASF181
-	.byte	0xf
-	.byte	0x12
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_type
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-	.4byte	.LASF182
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-	.byte	0x13
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
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-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
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-	.4byte	.LASF184
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-	.uleb128 0x1d
-	.4byte	.LASF185
-	.byte	0xf
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-	.4byte	0x2e8
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-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die_shift
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-	.4byte	.LASF186
-	.byte	0xf
-	.byte	0x17
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_num
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-	.uleb128 0x9
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-	.8byte	c_ftl_nand_blk_pre_plane
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-	.8byte	c_ftl_nand_ext_blk_pre_plane
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-	.4byte	.LASF189
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-	.byte	0x3
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-	.byte	0x5f
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_erase_count_table
-	.uleb128 0x1d
-	.4byte	.LASF247
-	.byte	0xf
-	.byte	0x61
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_swl_mul_table
-	.uleb128 0x1d
-	.4byte	.LASF248
-	.byte	0xf
-	.byte	0x62
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_swl_count
-	.uleb128 0x1d
-	.4byte	.LASF249
-	.byte	0xf
-	.byte	0x63
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.uleb128 0x1d
-	.4byte	.LASF250
-	.byte	0xf
-	.byte	0x64
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_check_table
-	.uleb128 0x1d
-	.4byte	.LASF251
-	.byte	0xf
-	.byte	0x65
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_blk_mode_table
-	.uleb128 0x1d
-	.4byte	.LASF252
-	.byte	0xf
-	.byte	0x67
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_table
-	.uleb128 0x1d
-	.4byte	.LASF253
-	.byte	0xf
-	.byte	0x68
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_valid_page_count
-	.uleb128 0x1d
-	.4byte	.LASF254
-	.byte	0xf
-	.byte	0x69
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_ver_table
-	.uleb128 0x1d
-	.4byte	.LASF255
-	.byte	0xf
-	.byte	0x6a
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_region_ppn_table
-	.uleb128 0x1d
-	.4byte	.LASF256
-	.byte	0xf
-	.byte	0x6b
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_map_block
-	.uleb128 0x1d
-	.4byte	.LASF257
-	.byte	0xf
-	.byte	0x6d
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_table
-	.uleb128 0x1d
-	.4byte	.LASF258
-	.byte	0xf
-	.byte	0x6e
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_valid_page_count
-	.uleb128 0x1d
-	.4byte	.LASF259
-	.byte	0xf
-	.byte	0x6f
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_ver_table
-	.uleb128 0x1d
-	.4byte	.LASF260
-	.byte	0xf
-	.byte	0x70
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.uleb128 0x1d
-	.4byte	.LASF261
-	.byte	0xf
-	.byte	0x71
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_vendor_block
-	.uleb128 0x1d
-	.4byte	.LASF262
-	.byte	0xf
-	.byte	0x73
-	.4byte	0x1306
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_ram_map
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x61d
-	.uleb128 0x1d
-	.4byte	.LASF263
-	.byte	0xf
-	.byte	0x74
-	.4byte	0x520
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_map_buf
-	.uleb128 0x1d
-	.4byte	.LASF264
-	.byte	0xf
-	.byte	0x75
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_l2p_last_update_region_id
-	.uleb128 0x1d
-	.4byte	.LASF265
-	.byte	0xf
-	.byte	0x7c
-	.4byte	0x134b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0xa92
-	.uleb128 0x1d
-	.4byte	.LASF266
-	.byte	0xf
-	.byte	0x7d
-	.4byte	0x134b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_free_data_block_list_head
-	.uleb128 0x1d
-	.4byte	.LASF267
-	.byte	0xf
-	.byte	0x7f
-	.4byte	0x134b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_head
-	.uleb128 0x1d
-	.4byte	.LASF268
-	.byte	0xf
-	.byte	0x80
-	.4byte	0x134b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_tail
-	.uleb128 0x1d
-	.4byte	.LASF269
-	.byte	0xf
-	.byte	0x81
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.uleb128 0x1d
-	.4byte	.LASF270
-	.byte	0xf
-	.byte	0x82
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_data_superblocks
-	.uleb128 0x1d
-	.4byte	.LASF271
-	.byte	0xf
-	.byte	0x83
-	.4byte	0xb1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_active_superblock
-	.uleb128 0x1d
-	.4byte	.LASF272
-	.byte	0xf
-	.byte	0x84
-	.4byte	0xb1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_buffer_superblock
-	.uleb128 0x1d
-	.4byte	.LASF273
-	.byte	0xf
-	.byte	0x85
-	.4byte	0xb1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_temp_superblock
-	.uleb128 0x1d
-	.4byte	.LASF274
-	.byte	0xf
-	.byte	0x86
-	.4byte	0xb1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_superblock
-	.uleb128 0x1d
-	.4byte	.LASF275
-	.byte	0xf
-	.byte	0x87
-	.4byte	0x1423
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gp_last_act_superblock
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0xb1e
-	.uleb128 0x1d
-	.4byte	.LASF276
-	.byte	0xf
-	.byte	0x88
-	.4byte	0x83f
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_save_data
-	.uleb128 0x1d
-	.4byte	.LASF277
-	.byte	0xf
-	.byte	0x89
-	.4byte	0x93c
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_ext_data
-	.uleb128 0x1d
-	.4byte	.LASF278
-	.byte	0xf
-	.byte	0x8b
-	.4byte	0x1468
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_page_info
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0xbc0
-	.uleb128 0x1d
-	.4byte	.LASF279
-	.byte	0xf
-	.byte	0x8c
-	.4byte	0x617
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_blk_tbl
-	.uleb128 0x1d
-	.4byte	.LASF280
-	.byte	0xf
-	.byte	0x8d
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_num
-	.uleb128 0x1d
-	.4byte	.LASF281
-	.byte	0xf
-	.byte	0x8e
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_page_offset
-	.uleb128 0x1d
-	.4byte	.LASF282
-	.byte	0xf
-	.byte	0x8f
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x1d
-	.4byte	.LASF283
-	.byte	0xf
-	.byte	0x90
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x1d
-	.4byte	.LASF284
-	.byte	0xf
-	.byte	0x91
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk
-	.uleb128 0x1d
-	.4byte	.LASF285
-	.byte	0xf
-	.byte	0x92
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk_1
-	.uleb128 0x1d
-	.4byte	.LASF286
-	.byte	0xf
-	.byte	0x93
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_num
-	.uleb128 0x1d
-	.4byte	.LASF287
-	.byte	0xf
-	.byte	0x94
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_gc_index
-	.uleb128 0xb
-	.4byte	0x2e8
-	.4byte	0x153b
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF288
-	.byte	0xf
-	.byte	0x95
-	.4byte	0x152b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x1d
-	.4byte	.LASF289
-	.byte	0xf
-	.byte	0x97
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_free_blk_threshold
-	.uleb128 0x1d
-	.4byte	.LASF290
-	.byte	0xf
-	.byte	0x98
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x1d
-	.4byte	.LASF291
-	.byte	0xf
-	.byte	0x99
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_index
-	.uleb128 0x1d
-	.4byte	.LASF292
-	.byte	0xf
-	.byte	0x9b
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_gc_page_count
-	.uleb128 0x1d
-	.4byte	.LASF293
-	.byte	0xf
-	.byte	0x9c
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_page_count
-	.uleb128 0x1d
-	.4byte	.LASF294
-	.byte	0xf
-	.byte	0x9d
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_sector
-	.uleb128 0x1d
-	.4byte	.LASF295
-	.byte	0xf
-	.byte	0x9e
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_sector
-	.uleb128 0x1d
-	.4byte	.LASF296
-	.byte	0xf
-	.byte	0xa0
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_discard_page_count
-	.uleb128 0x1d
-	.4byte	.LASF297
-	.byte	0xf
-	.byte	0xa1
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_page_count
-	.uleb128 0x1d
-	.4byte	.LASF298
-	.byte	0xf
-	.byte	0xa2
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_tmp_data_superblock_id
-	.uleb128 0x1d
-	.4byte	.LASF299
-	.byte	0xf
-	.byte	0xa3
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_cache_write_count
-	.uleb128 0x1d
-	.4byte	.LASF300
-	.byte	0xf
-	.byte	0xa4
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_l2p_write_count
-	.uleb128 0x1d
-	.4byte	.LASF301
-	.byte	0xf
-	.byte	0xa6
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_mlc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF302
-	.byte	0xf
-	.byte	0xa7
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_avg_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF303
-	.byte	0xf
-	.byte	0xa8
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_min_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF304
-	.byte	0xf
-	.byte	0xa9
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_slc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF305
-	.byte	0xf
-	.byte	0xaa
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_sys_slc_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF306
-	.byte	0xf
-	.byte	0xab
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_max_erase_count
-	.uleb128 0x1d
-	.4byte	.LASF307
-	.byte	0xf
-	.byte	0xac
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_gc_progress
-	.uleb128 0x1d
-	.4byte	.LASF308
-	.byte	0xf
-	.byte	0xad
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_swl_replace
-	.uleb128 0x1d
-	.4byte	.LASF309
-	.byte	0xf
-	.byte	0xae
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ftl_nand_free_count
-	.uleb128 0x1d
-	.4byte	.LASF310
-	.byte	0xf
-	.byte	0xaf
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block
-	.uleb128 0x1d
-	.4byte	.LASF311
-	.byte	0xf
-	.byte	0xb0
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block_count
-	.uleb128 0x1d
-	.4byte	.LASF312
-	.byte	0xf
-	.byte	0xb1
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_skip_write_count
-	.uleb128 0x1d
-	.4byte	.LASF313
-	.byte	0xf
-	.byte	0xb2
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_cur_erase_blk
-	.uleb128 0x1d
-	.4byte	.LASF314
-	.byte	0xf
-	.byte	0xb4
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_num
-	.uleb128 0x1d
-	.4byte	.LASF315
-	.byte	0xf
-	.byte	0xb5
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_min_ver
-	.uleb128 0xb
-	.4byte	0x2f3
-	.4byte	0x1797
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF316
-	.byte	0xf
-	.byte	0xb6
-	.4byte	0x1787
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_ppa_tbl
-	.uleb128 0x1d
-	.4byte	.LASF317
-	.byte	0xf
-	.byte	0xb7
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_mlc_erase_count_value
-	.uleb128 0x1d
-	.4byte	.LASF318
-	.byte	0xf
-	.byte	0xb8
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_power_lost_recovery_flag
-	.uleb128 0xd
-	.4byte	.LASF319
-	.byte	0xc
-	.byte	0x14
-	.4byte	0x363
-	.uleb128 0xd
-	.4byte	.LASF320
-	.byte	0xc
-	.byte	0x15
-	.4byte	0x363
-	.uleb128 0xd
-	.4byte	.LASF321
-	.byte	0xc
-	.byte	0x16
-	.4byte	0x405
-	.uleb128 0xb
-	.4byte	0xa1
-	.4byte	0x1808
-	.uleb128 0x19
-	.4byte	0x3d
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0xd
-	.4byte	.LASF322
-	.byte	0xc
-	.byte	0x17
-	.4byte	0x17f7
-	.uleb128 0x1d
-	.4byte	.LASF323
-	.byte	0x3
-	.byte	0x5
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	DeviceCapacity
-	.uleb128 0x1d
-	.4byte	.LASF324
-	.byte	0x3
-	.byte	0x6
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gFtlInitStatus
-	.uleb128 0xd
-	.4byte	.LASF325
-	.byte	0x3
-	.byte	0x6c
-	.4byte	0x2f3
-	.uleb128 0xd
-	.4byte	.LASF326
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0x2f3
-	.uleb128 0xd
-	.4byte	.LASF327
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0x2f3
-	.uleb128 0xd
-	.4byte	.LASF328
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0x2f3
-	.uleb128 0x1e
-	.4byte	.LASF329
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0x2f
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	power_up_flag
-	.uleb128 0x1f
-	.4byte	.LASF333
-	.byte	0x3
-	.2byte	0x483
-	.4byte	0x2f3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gc_discard_updated
-	.uleb128 0x1e
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ect_tbl_power_up_flush
-	.uleb128 0x1e
-	.4byte	.LASF331
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x2e8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	FtlUpdateVaildLpnCount
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-	.byte	0x5
-	.2byte	0x188
-	.4byte	0x2e8
-	.uleb128 0x36
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-	.2byte	0x188
-	.4byte	0x2e8
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-	.4byte	.LASF175
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF494
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x2f
-	.byte	0x1
-	.uleb128 0x32
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-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x2f
-	.8byte	.LFB254
-	.8byte	.LFE254-.LFB254
-	.uleb128 0x1
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-	.4byte	0x208d
-	.uleb128 0x3c
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-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x2e8
-	.4byte	.LLST82
-	.uleb128 0x36
-	.string	"i"
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-	.2byte	0x168
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF387
-	.byte	0x5
-	.2byte	0x169
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-	.uleb128 0x24
-	.8byte	.LVL352
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL353
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL354
-	.4byte	0x208d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x2f
-	.8byte	.LFB253
-	.8byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x20cd
-	.uleb128 0x3c
-	.4byte	.LASF389
-	.byte	0x5
-	.2byte	0x158
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-	.uleb128 0x24
-	.8byte	.LVL347
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF390
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0x2f3
-	.8byte	.LFB252
-	.8byte	.LFE252-.LFB252
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-	.byte	0x9c
-	.4byte	0x2169
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0x2e8
-	.4byte	.LLST286
-	.uleb128 0x3e
-	.4byte	.LASF377
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x1f4b
-	.4byte	.LLST287
-	.uleb128 0x24
-	.8byte	.LVL1400
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1402
-	.4byte	0x25f1
-	.uleb128 0x24
-	.8byte	.LVL1403
-	.4byte	0x2378
-	.uleb128 0x24
-	.8byte	.LVL1405
-	.4byte	0x52c4
-	.uleb128 0x24
-	.8byte	.LVL1406
-	.4byte	0x510a
-	.uleb128 0x24
-	.8byte	.LVL1407
-	.4byte	0x2333
-	.uleb128 0x24
-	.8byte	.LVL1411
-	.4byte	0x24f1
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF391
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0x2f3
-	.8byte	.LFB251
-	.8byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x21e7
-	.uleb128 0x24
-	.8byte	.LVL1415
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1416
-	.4byte	0x2378
-	.uleb128 0x24
-	.8byte	.LVL1417
-	.4byte	0x28b2
-	.uleb128 0x24
-	.8byte	.LVL1418
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1419
-	.4byte	0x3d9f
-	.uleb128 0x24
-	.8byte	.LVL1420
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1421
-	.4byte	0x2747
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF450
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x22
-	.4byte	.LASF392
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x2f3
-	.8byte	.LFB249
-	.8byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2333
-	.uleb128 0x23
-	.4byte	.LASF393
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x1423
-	.4byte	.LLST190
-	.uleb128 0x23
-	.4byte	.LASF394
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x2f3
-	.4byte	.LLST191
-	.uleb128 0x28
-	.4byte	.LASF375
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0x2e8
-	.4byte	.LLST192
-	.uleb128 0x28
-	.4byte	.LASF352
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x2e8
-	.4byte	.LLST193
-	.uleb128 0x29
-	.string	"req"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0x2e8
-	.uleb128 0x2c
-	.4byte	.LASF373
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2e8
-	.uleb128 0x28
-	.4byte	.LASF169
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2e8
-	.4byte	.LLST194
-	.uleb128 0x28
-	.4byte	.LASF167
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0x2e8
-	.4byte	.LLST195
-	.uleb128 0x28
-	.4byte	.LASF395
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0x2f3
-	.4byte	.LLST196
-	.uleb128 0x28
-	.4byte	.LASF396
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0x2f3
-	.4byte	.LLST197
-	.uleb128 0x2c
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-	.byte	0xd9
-	.4byte	0x2f3
-	.uleb128 0x28
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-	.byte	0x5
-	.byte	0xda
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-	.4byte	.LLST198
-	.uleb128 0x40
-	.4byte	.LASF398
-	.byte	0x5
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-	.uleb128 0x40
-	.4byte	.LASF399
-	.byte	0x5
-	.byte	0xe5
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-	.4byte	.LASF468
-	.byte	0x5
-	.2byte	0x117
-	.8byte	.L867
-	.uleb128 0x24
-	.8byte	.LVL858
-	.4byte	0x2333
-	.uleb128 0x24
-	.8byte	.LVL865
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL876
-	.4byte	0x4d18
-	.uleb128 0x24
-	.8byte	.LVL880
-	.4byte	0x36b2
-	.uleb128 0x24
-	.8byte	.LVL883
-	.4byte	0x24f1
-	.uleb128 0x24
-	.8byte	.LVL885
-	.4byte	0x49c3
-	.uleb128 0x24
-	.8byte	.LVL886
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-	.uleb128 0x42
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-	.uleb128 0x1
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-	.uleb128 0x24
-	.8byte	.LVL852
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL853
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL854
-	.4byte	0x2645
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-	.byte	0x5
-	.byte	0x6f
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-	.string	"i"
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-	.uleb128 0x28
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-	.uleb128 0x28
-	.4byte	.LASF404
-	.byte	0x5
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-	.4byte	.LLST284
-	.uleb128 0x2c
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-	.4byte	0x1423
-	.uleb128 0x28
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-	.4byte	0x1468
-	.4byte	.LLST285
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x24ec
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4526
-	.uleb128 0x24
-	.8byte	.LVL1366
-	.4byte	0x21f0
-	.uleb128 0x24
-	.8byte	.LVL1368
-	.4byte	0x3d9f
-	.uleb128 0x24
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-	.uleb128 0x24
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-	.uleb128 0x24
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-	.uleb128 0x24
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-	.uleb128 0x24
-	.8byte	.LVL1378
-	.4byte	0x499e
-	.uleb128 0x24
-	.8byte	.LVL1380
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1381
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1383
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1384
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1385
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1386
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1387
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1390
-	.4byte	0x49c3
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-	.uleb128 0xb
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-	.4byte	0x3d
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-	.8byte	.LFE246-.LFB246
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-	.string	"lpa"
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-	.byte	0x59
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-	.4byte	0x4cdc
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-	.string	"i"
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-	.uleb128 0x43
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-	.uleb128 0x43
-	.string	"i"
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-	.uleb128 0x29
-	.string	"i"
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-	.8byte	.LFE241-.LFB241
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-	.string	"ret"
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4456
-	.uleb128 0x24
-	.8byte	.LVL1007
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1010
-	.4byte	0x75a7
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-	.uleb128 0x24
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-	.byte	0xf
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-	.uleb128 0x32
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-	.8byte	.LFE239-.LFB239
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-	.2byte	0xa8e
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-	.4byte	.LLST70
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-	.8byte	__func__.4436
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-	.uleb128 0x24
-	.8byte	.LVL309
-	.4byte	0x75a7
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-	.4byte	0x75a7
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-	.uleb128 0x9
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-	.8byte	__func__.4429
-	.uleb128 0x24
-	.8byte	.LVL1298
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1299
-	.4byte	0x499e
-	.uleb128 0x24
-	.8byte	.LVL1300
-	.4byte	0x2707
-	.uleb128 0x24
-	.8byte	.LVL1301
-	.4byte	0x28b2
-	.uleb128 0x24
-	.8byte	.LVL1302
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1303
-	.4byte	0x3d9f
-	.uleb128 0x24
-	.8byte	.LVL1304
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1307
-	.4byte	0x49c3
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x28ad
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x289d
-	.uleb128 0x32
-	.4byte	.LASF422
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x2f
-	.8byte	.LFB237
-	.8byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2a64
-	.uleb128 0x46
-	.string	"p"
-	.byte	0x2
-	.2byte	0xa12
-	.4byte	0x1423
-	.4byte	.LLST210
-	.uleb128 0x3e
-	.4byte	.LASF423
-	.byte	0x2
-	.2byte	0xa14
-	.4byte	0x2e8
-	.4byte	.LLST211
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF352
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2e8
-	.4byte	.LLST212
-	.uleb128 0x36
-	.string	"n"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF424
-	.byte	0x2
-	.2byte	0xa16
-	.4byte	0x2f
-	.4byte	.LLST213
-	.uleb128 0x3e
-	.4byte	.LASF425
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0x2e8
-	.4byte	.LLST214
-	.uleb128 0x37
-	.4byte	.LASF426
-	.byte	0x2
-	.2byte	0xa18
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2a74
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4408
-	.uleb128 0x47
-	.4byte	0x3a2f
-	.8byte	.LBB270
-	.8byte	.LBE270-.LBB270
-	.byte	0x2
-	.2byte	0xa48
-	.4byte	0x2993
-	.uleb128 0x48
-	.4byte	0x3a48
-	.uleb128 0x48
-	.4byte	0x3a3c
-	.uleb128 0x24
-	.8byte	.LVL964
-	.4byte	0x679c
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL936
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL940
-	.4byte	0x47ac
-	.uleb128 0x24
-	.8byte	.LVL941
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL942
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL943
-	.4byte	0x499e
-	.uleb128 0x24
-	.8byte	.LVL944
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL947
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL948
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL949
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL952
-	.4byte	0x3a2f
-	.uleb128 0x24
-	.8byte	.LVL955
-	.4byte	0x1b39
-	.uleb128 0x24
-	.8byte	.LVL957
-	.4byte	0x2be7
-	.uleb128 0x24
-	.8byte	.LVL958
-	.4byte	0x510a
-	.uleb128 0x24
-	.8byte	.LVL960
-	.4byte	0x499e
-	.uleb128 0x24
-	.8byte	.LVL967
-	.4byte	0x52c4
-	.uleb128 0x24
-	.8byte	.LVL970
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x2a74
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x18
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x2a64
-	.uleb128 0x33
-	.4byte	.LASF427
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x2a97
-	.uleb128 0x34
-	.4byte	.LASF402
-	.byte	0x2
-	.2byte	0xa09
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF428
-	.byte	0x2
-	.2byte	0x9c0
-	.4byte	0x2e8
-	.8byte	.LFB235
-	.8byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b57
-	.uleb128 0x3e
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x9c2
-	.4byte	0x2e8
-	.4byte	.LLST63
-	.uleb128 0x35
-	.4byte	.LASF430
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF431
-	.byte	0x2
-	.2byte	0x9c4
-	.4byte	0x2e8
-	.4byte	.LLST64
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0x134b
-	.4byte	.LLST65
-	.uleb128 0x3e
-	.4byte	.LASF433
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0x2e8
-	.4byte	.LLST66
-	.uleb128 0x3e
-	.4byte	.LASF434
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0x2e8
-	.4byte	.LLST67
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x2f3
-	.uleb128 0x3e
-	.4byte	.LASF111
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0x2e8
-	.4byte	.LLST68
-	.uleb128 0x24
-	.8byte	.LVL281
-	.4byte	0x2b57
-	.uleb128 0x24
-	.8byte	.LVL289
-	.4byte	0x2bb4
-	.uleb128 0x24
-	.8byte	.LVL296
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF435
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x2e8
-	.8byte	.LFB234
-	.8byte	.LFE234-.LFB234
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2bb4
-	.uleb128 0x3c
-	.4byte	.LASF90
-	.byte	0x2
-	.2byte	0x9ab
-	.4byte	0x2e8
-	.4byte	.LLST56
-	.uleb128 0x3e
-	.4byte	.LASF436
-	.byte	0x2
-	.2byte	0x9ad
-	.4byte	0x2e8
-	.4byte	.LLST57
-	.uleb128 0x35
-	.4byte	.LASF389
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9af
-	.4byte	0x2e8
-	.4byte	.LLST58
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF437
-	.byte	0x2
-	.2byte	0x9a2
-	.4byte	0x2e8
-	.8byte	.LFB233
-	.8byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2be7
-	.uleb128 0x3e
-	.4byte	.LASF431
-	.byte	0x2
-	.2byte	0x9a4
-	.4byte	0x2e8
-	.4byte	.LLST55
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF438
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x2f
-	.8byte	.LFB232
-	.8byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c58
-	.uleb128 0x3c
-	.4byte	.LASF402
-	.byte	0x2
-	.2byte	0x992
-	.4byte	0x2e8
-	.4byte	.LLST54
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x994
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF162
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x2e8
-	.uleb128 0x24
-	.8byte	.LVL175
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL176
-	.4byte	0x5265
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LASF439
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x2c82
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x2f
-	.uleb128 0x39
-	.uleb128 0x35
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x1423
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x2
-	.2byte	0x914
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
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-	.byte	0x9c
-	.4byte	0x2d0b
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x2f
-	.4byte	.LLST164
-	.uleb128 0x4a
-	.string	"ppa"
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-	.2byte	0x917
-	.4byte	0x2f3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 44
-	.uleb128 0x35
-	.4byte	.LASF441
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x1f4b
-	.uleb128 0x24
-	.8byte	.LVL703
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL706
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL707
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL708
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL709
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF442
-	.byte	0x2
-	.2byte	0x8e0
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
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-	.byte	0x9c
-	.4byte	0x2df8
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"lpn"
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-	.2byte	0x8e3
-	.4byte	0x2f3
-	.4byte	.LLST187
-	.uleb128 0x1f
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0x2f3
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 92
-	.uleb128 0x36
-	.string	"blk"
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-	.2byte	0x8e5
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF444
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2e8
-	.4byte	.LLST188
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2e08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4323
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x230
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-	.uleb128 0x3e
-	.4byte	.LASF90
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-	.2byte	0x903
-	.4byte	0x2e8
-	.4byte	.LLST189
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-	.8byte	.LVL851
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL837
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL838
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL842
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL846
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL847
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL849
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x2e08
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0xd
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x2df8
-	.uleb128 0x49
-	.4byte	.LASF445
-	.byte	0x2
-	.2byte	0x8c1
-	.8byte	.LFB228
-	.8byte	.LFE228-.LFB228
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-	.byte	0x9c
-	.4byte	0x2ee0
-	.uleb128 0x3d
-	.string	"i"
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-	.2byte	0x8c3
-	.4byte	0x2e8
-	.4byte	.LLST265
-	.uleb128 0x3d
-	.string	"lpn"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0x2f3
-	.4byte	.LLST266
-	.uleb128 0x1f
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0x2f3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 44
-	.uleb128 0x36
-	.string	"blk"
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-	.2byte	0x8c6
-	.4byte	0x2e8
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2ef0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4307
-	.uleb128 0x24
-	.8byte	.LVL1278
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1280
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1285
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1286
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1289
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1290
-	.4byte	0x2707
-	.uleb128 0x24
-	.8byte	.LVL1291
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1292
-	.4byte	0x3baa
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x2ef0
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x14
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x2ee0
-	.uleb128 0x49
-	.4byte	.LASF446
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-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
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-	.byte	0x9c
-	.4byte	0x2f7e
-	.uleb128 0x3c
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x1423
-	.4byte	.LLST243
-	.uleb128 0x1f
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0x314
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x35
-	.4byte	.LASF377
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-	.2byte	0x89f
-	.4byte	0x1f4b
-	.uleb128 0x35
-	.4byte	.LASF448
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-	.2byte	0x8a0
-	.4byte	0x2f
-	.uleb128 0x35
-	.4byte	.LASF171
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL1146
-	.4byte	0x2747
-	.uleb128 0x24
-	.8byte	.LVL1147
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1148
-	.4byte	0x266c
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF449
-	.byte	0x2
-	.2byte	0x882
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-	.8byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2fb7
-	.uleb128 0x24
-	.8byte	.LVL1260
-	.4byte	0x3dfc
-	.uleb128 0x24
-	.8byte	.LVL1261
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF451
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x32
-	.4byte	.LASF452
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x2f
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-	.8byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3098
-	.uleb128 0x3e
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2e8
-	.4byte	.LLST184
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF375
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-	.4byte	0x2e8
-	.uleb128 0x35
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-	.2byte	0x845
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF453
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-	.2byte	0x846
-	.4byte	0x2e8
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-	.4byte	.LASF454
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-	.4byte	0x2e8
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-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x30a8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4282
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-	.8byte	.LVL821
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL822
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL823
-	.4byte	0x5265
-	.uleb128 0x24
-	.8byte	.LVL826
-	.4byte	0x49c3
-	.uleb128 0x24
-	.8byte	.LVL831
-	.4byte	0x499e
-	.uleb128 0x24
-	.8byte	.LVL833
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x30a8
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x11
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x3098
-	.uleb128 0x32
-	.4byte	.LASF455
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x2f
-	.8byte	.LFB223
-	.8byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3130
-	.uleb128 0x46
-	.string	"p"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x1423
-	.4byte	.LLST53
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x2e8
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2742
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4261
-	.uleb128 0x24
-	.8byte	.LVL166
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL169
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL170
-	.4byte	0x5265
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF456
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x2f
-	.8byte	.LFB222
-	.8byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31a1
-	.uleb128 0x24
-	.8byte	.LVL1394
-	.4byte	0x31c7
-	.uleb128 0x24
-	.8byte	.LVL1395
-	.4byte	0x31a1
-	.uleb128 0x24
-	.8byte	.LVL1396
-	.4byte	0x31c7
-	.uleb128 0x24
-	.8byte	.LVL1397
-	.4byte	0x31a1
-	.uleb128 0x24
-	.8byte	.LVL1398
-	.4byte	0x21e7
-	.uleb128 0x24
-	.8byte	.LVL1399
-	.4byte	0x266c
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF492
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x31c7
-	.uleb128 0x34
-	.4byte	.LASF419
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x1423
-	.uleb128 0x35
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF457
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x2f
-	.8byte	.LFB220
-	.8byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x35c2
-	.uleb128 0x3c
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x1423
-	.4byte	.LLST226
-	.uleb128 0x3e
-	.4byte	.LASF458
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x2e8
-	.4byte	.LLST227
-	.uleb128 0x3e
-	.4byte	.LASF459
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0x2e8
-	.4byte	.LLST228
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF169
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2e8
-	.4byte	.LLST229
-	.uleb128 0x35
-	.4byte	.LASF167
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF460
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x2e8
-	.4byte	.LLST230
-	.uleb128 0x3e
-	.4byte	.LASF461
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0x2e8
-	.4byte	.LLST231
-	.uleb128 0x35
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF462
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x2f
-	.4byte	.LLST232
-	.uleb128 0x35
-	.4byte	.LASF463
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x2f
-	.uleb128 0x35
-	.4byte	.LASF352
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"n"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2e8
-	.4byte	.LLST233
-	.uleb128 0x36
-	.string	"req"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x2f3
-	.4byte	.LLST234
-	.uleb128 0x3e
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x2f3
-	.4byte	.LLST235
-	.uleb128 0x3e
-	.4byte	.LASF403
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x2f3
-	.4byte	.LLST236
-	.uleb128 0x3e
-	.4byte	.LASF395
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0x2f3
-	.4byte	.LLST237
-	.uleb128 0x3e
-	.4byte	.LASF409
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x2e8
-	.4byte	.LLST238
-	.uleb128 0x3e
-	.4byte	.LASF464
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0x2e8
-	.4byte	.LLST239
-	.uleb128 0x3e
-	.4byte	.LASF465
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0x2f3
-	.4byte	.LLST240
-	.uleb128 0x35
-	.4byte	.LASF466
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF377
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x1f4b
-	.uleb128 0x35
-	.4byte	.LASF467
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0x2f3
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x35d2
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4204
-	.uleb128 0x41
-	.4byte	.LASF469
-	.byte	0x2
-	.2byte	0x744
-	.8byte	.L1024
-	.uleb128 0x41
-	.4byte	.LASF399
-	.byte	0x2
-	.2byte	0x74c
-	.8byte	.L1036
-	.uleb128 0x41
-	.4byte	.LASF470
-	.byte	0x2
-	.2byte	0x7ff
-	.8byte	.L1042
-	.uleb128 0x37
-	.4byte	.LASF471
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x4c
-	.8byte	.LBB291
-	.8byte	.LBE291-.LBB291
-	.4byte	0x33c9
-	.uleb128 0x35
-	.4byte	.LASF472
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF473
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL1080
-	.4byte	0x1d0d
-	.byte	0
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0x345b
-	.uleb128 0x3e
-	.4byte	.LASF474
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0x2f3
-	.4byte	.LLST241
-	.uleb128 0x3e
-	.4byte	.LASF475
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0x2f3
-	.4byte	.LLST242
-	.uleb128 0x24
-	.8byte	.LVL1105
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1107
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1116
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1119
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1121
-	.4byte	0x35d7
-	.uleb128 0x24
-	.8byte	.LVL1122
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1124
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1125
-	.4byte	0x4c8f
-	.byte	0
-	.uleb128 0x4c
-	.8byte	.LBB295
-	.8byte	.LBE295-.LBB295
-	.4byte	0x34b0
-	.uleb128 0x35
-	.4byte	.LASF476
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF475
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL1132
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1133
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1134
-	.4byte	0x3fd5
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1048
-	.4byte	0x4be4
-	.uleb128 0x24
-	.8byte	.LVL1050
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1054
-	.4byte	0x4d18
-	.uleb128 0x24
-	.8byte	.LVL1059
-	.4byte	0x36b2
-	.uleb128 0x24
-	.8byte	.LVL1063
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1066
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1069
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1082
-	.4byte	0x3cf5
-	.uleb128 0x24
-	.8byte	.LVL1086
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1091
-	.4byte	0x4d18
-	.uleb128 0x24
-	.8byte	.LVL1096
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1099
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1100
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1103
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1104
-	.4byte	0x4c8f
-	.uleb128 0x24
-	.8byte	.LVL1109
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1113
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1128
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1129
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1136
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1140
-	.4byte	0x266c
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x35d2
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x15
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x35c2
-	.uleb128 0x49
-	.4byte	.LASF477
-	.byte	0x2
-	.2byte	0x68c
-	.8byte	.LFB219
-	.8byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x36b2
-	.uleb128 0x46
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x2f3
-	.4byte	.LLST158
-	.uleb128 0x3c
-	.4byte	.LASF443
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0x2f3
-	.4byte	.LLST159
-	.uleb128 0x3e
-	.4byte	.LASF409
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0x2e8
-	.4byte	.LLST160
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2742
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4170
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1b0
-	.4byte	0x3697
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0x2e8
-	.4byte	.LLST161
-	.uleb128 0x3e
-	.4byte	.LASF389
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0x2e8
-	.4byte	.LLST162
-	.uleb128 0x3e
-	.4byte	.LASF90
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0x2e8
-	.4byte	.LLST163
-	.uleb128 0x24
-	.8byte	.LVL686
-	.4byte	0x481c
-	.uleb128 0x24
-	.8byte	.LVL687
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL688
-	.4byte	0x499e
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL679
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL692
-	.4byte	0x3fd5
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF478
-	.byte	0x2
-	.2byte	0x678
-	.8byte	.LFB218
-	.8byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x370b
-	.uleb128 0x4d
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x1423
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3c
-	.4byte	.LASF167
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x2e8
-	.4byte	.LLST51
-	.uleb128 0x3c
-	.4byte	.LASF169
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x2e8
-	.4byte	.LLST52
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF479
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x2f
-	.8byte	.LFB217
-	.8byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3748
-	.uleb128 0x24
-	.8byte	.LVL809
-	.4byte	0x3748
-	.uleb128 0x24
-	.8byte	.LVL810
-	.4byte	0x37c1
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF480
-	.byte	0x2
-	.2byte	0x658
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3791
-	.uleb128 0x3e
-	.4byte	.LASF116
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0x2e8
-	.4byte	.LLST183
-	.uleb128 0x24
-	.8byte	.LVL802
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL803
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF481
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x2f
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x37c1
-	.uleb128 0x24
-	.8byte	.LVL801
-	.4byte	0x37c1
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF482
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x2f
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3901
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x3901
-	.4byte	.LLST174
-	.uleb128 0x3e
-	.4byte	.LASF484
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x309
-	.4byte	.LLST175
-	.uleb128 0x35
-	.4byte	.LASF82
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0x309
-	.uleb128 0x3e
-	.4byte	.LASF485
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0x309
-	.4byte	.LLST176
-	.uleb128 0x3e
-	.4byte	.LASF116
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0x2e8
-	.4byte	.LLST177
-	.uleb128 0x3e
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0x520
-	.4byte	.LLST178
-	.uleb128 0x3e
-	.4byte	.LASF95
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x617
-	.4byte	.LLST179
-	.uleb128 0x3e
-	.4byte	.LASF96
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0x520
-	.4byte	.LLST180
-	.uleb128 0x3e
-	.4byte	.LASF92
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0x2e8
-	.4byte	.LLST181
-	.uleb128 0x3e
-	.4byte	.LASF487
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0x2e8
-	.4byte	.LLST182
-	.uleb128 0x35
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x3907
-	.uleb128 0x24
-	.8byte	.LVL761
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL769
-	.4byte	0x4be4
-	.uleb128 0x24
-	.8byte	.LVL775
-	.4byte	0x44fe
-	.uleb128 0x24
-	.8byte	.LVL776
-	.4byte	0x44a6
-	.uleb128 0x24
-	.8byte	.LVL777
-	.4byte	0x43ad
-	.uleb128 0x24
-	.8byte	.LVL778
-	.4byte	0x43ad
-	.uleb128 0x24
-	.8byte	.LVL786
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL790
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL793
-	.4byte	0x1d0d
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x56e
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x79f
-	.uleb128 0x32
-	.4byte	.LASF489
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x2f
-	.8byte	.LFB213
-	.8byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x39fc
-	.uleb128 0x3e
-	.4byte	.LASF485
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0x309
-	.4byte	.LLST330
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x1d08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4107
-	.uleb128 0x24
-	.8byte	.LVL1645
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1648
-	.4byte	0x4be4
-	.uleb128 0x24
-	.8byte	.LVL1650
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1651
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1652
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1653
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1654
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1655
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1656
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1657
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1658
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1659
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1660
-	.4byte	0x1d0d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF490
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x2f
-	.8byte	.LFB212
-	.8byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a2f
-	.uleb128 0x3c
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x2e8
-	.4byte	.LLST50
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF493
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x3a55
-	.uleb128 0x34
-	.4byte	.LASF491
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x2e8
-	.uleb128 0x34
-	.4byte	.LASF369
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x2f
-	.byte	0
-	.uleb128 0x3b
-	.4byte	.LASF495
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x2f
-	.byte	0x1
-	.uleb128 0x32
-	.4byte	.LASF496
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x2f
-	.8byte	.LFB209
-	.8byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3baa
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF497
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0x2e8
-	.4byte	.LLST171
-	.uleb128 0x35
-	.4byte	.LASF175
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF352
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0x2e8
-	.4byte	.LLST172
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x309
-	.uleb128 0x36
-	.string	"j"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0x309
-	.uleb128 0x3e
-	.4byte	.LASF498
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x3907
-	.4byte	.LLST173
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2e08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4050
-	.uleb128 0x24
-	.8byte	.LVL729
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL730
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL731
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL732
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL733
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL735
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL736
-	.4byte	0x5265
-	.uleb128 0x24
-	.8byte	.LVL742
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL743
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL744
-	.4byte	0x4b4a
-	.uleb128 0x24
-	.8byte	.LVL745
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL746
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL747
-	.4byte	0x4b4a
-	.uleb128 0x24
-	.8byte	.LVL749
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF499
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x2f
-	.8byte	.LFB208
-	.8byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ca3
-	.uleb128 0x3e
-	.4byte	.LASF83
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0x2e8
-	.4byte	.LLST263
-	.uleb128 0x35
-	.4byte	.LASF500
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x3ca3
-	.uleb128 0x3e
-	.4byte	.LASF501
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0x2e8
-	.4byte	.LLST264
-	.uleb128 0x37
-	.4byte	.LASF502
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x1d08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.4028
-	.uleb128 0x24
-	.8byte	.LVL1264
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1265
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1266
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1267
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1268
-	.4byte	0x3d7b
-	.uleb128 0x24
-	.8byte	.LVL1269
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1270
-	.4byte	0x49e8
-	.uleb128 0x24
-	.8byte	.LVL1271
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1272
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1275
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1276
-	.4byte	0x4b4a
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x7f7
-	.uleb128 0x4b
-	.4byte	.LASF503
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x3cf5
-	.uleb128 0x39
-	.uleb128 0x36
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0x2f3
-	.uleb128 0x36
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF504
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF447
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0x314
-	.uleb128 0x35
-	.4byte	.LASF377
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x1f4b
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF505
-	.byte	0x2
-	.2byte	0x3b1
-	.8byte	.LFB206
-	.8byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3d7b
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x3901
-	.4byte	.LLST167
-	.uleb128 0x3d
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0x2f3
-	.4byte	.LLST168
-	.uleb128 0x3e
-	.4byte	.LASF102
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0x2e8
-	.4byte	.LLST169
-	.uleb128 0x3e
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0x520
-	.4byte	.LLST170
-	.uleb128 0x24
-	.8byte	.LVL723
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL724
-	.4byte	0x41c4
-	.uleb128 0x24
-	.8byte	.LVL727
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF506
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x3d9f
-	.uleb128 0x34
-	.4byte	.LASF180
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0x2f3
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF507
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x2f
-	.8byte	.LFB204
-	.8byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3dfc
-	.uleb128 0x3c
-	.4byte	.LASF508
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x2f3
-	.4byte	.LLST255
-	.uleb128 0x3e
-	.4byte	.LASF509
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0x2f3
-	.4byte	.LLST256
-	.uleb128 0x24
-	.8byte	.LVL1232
-	.4byte	0x3ee5
-	.uleb128 0x24
-	.8byte	.LVL1233
-	.4byte	0x2fb7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF510
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x2f3
-	.8byte	.LFB203
-	.8byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3edf
-	.uleb128 0x3c
-	.4byte	.LASF511
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x2f3
-	.4byte	.LLST257
-	.uleb128 0x3c
-	.4byte	.LASF512
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x2f3
-	.4byte	.LLST258
-	.uleb128 0x3c
-	.4byte	.LASF513
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x3edf
-	.4byte	.LLST259
-	.uleb128 0x3d
-	.string	"len"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x2e8
-	.4byte	.LLST260
-	.uleb128 0x35
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"ppn"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0x2f3
-	.4byte	.LLST261
-	.uleb128 0x1f
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0x2f3
-	.uleb128 0x1
-	.byte	0x66
-	.uleb128 0x4a
-	.string	"req"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0x314
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x3e
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0x2f3
-	.4byte	.LLST262
-	.uleb128 0x1f
-	.4byte	.LASF348
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x1b29
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x24
-	.8byte	.LVL1250
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1251
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1255
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x2dd
-	.uleb128 0x32
-	.4byte	.LASF517
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x2f3
-	.8byte	.LFB202
-	.8byte	.LFE202-.LFB202
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3fd5
-	.uleb128 0x3c
-	.4byte	.LASF511
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x2f3
-	.4byte	.LLST249
-	.uleb128 0x3c
-	.4byte	.LASF512
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x2f3
-	.4byte	.LLST250
-	.uleb128 0x3c
-	.4byte	.LASF513
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x3edf
-	.4byte	.LLST251
-	.uleb128 0x3d
-	.string	"len"
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x2e8
-	.4byte	.LLST252
-	.uleb128 0x35
-	.4byte	.LASF514
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"ppn"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0x2f3
-	.4byte	.LLST253
-	.uleb128 0x1f
-	.4byte	.LASF515
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0x2f3
-	.uleb128 0x1
-	.byte	0x69
-	.uleb128 0x4a
-	.string	"req"
-	.byte	0x2
-	.2byte	0x347
-	.4byte	0x314
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x3e
-	.4byte	.LASF516
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0x2f3
-	.4byte	.LLST254
-	.uleb128 0x1f
-	.4byte	.LASF348
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x1b29
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x24
-	.8byte	.LVL1217
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1218
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1219
-	.4byte	0x41c4
-	.uleb128 0x24
-	.8byte	.LVL1222
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF518
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x2f
-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x40af
-	.uleb128 0x46
-	.string	"lpn"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x2f3
-	.4byte	.LLST152
-	.uleb128 0x46
-	.string	"ppn"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x520
-	.4byte	.LLST153
-	.uleb128 0x3c
-	.4byte	.LASF519
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x2f
-	.4byte	.LLST154
-	.uleb128 0x3e
-	.4byte	.LASF520
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2e8
-	.4byte	.LLST155
-	.uleb128 0x3e
-	.4byte	.LASF521
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2e8
-	.4byte	.LLST156
-	.uleb128 0x3e
-	.4byte	.LASF522
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0x2e8
-	.4byte	.LLST157
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x40bf
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3955
-	.uleb128 0x41
-	.4byte	.LASF523
-	.byte	0x2
-	.2byte	0x32c
-	.8byte	.L647
-	.uleb128 0x24
-	.8byte	.LVL661
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL665
-	.4byte	0x410f
-	.uleb128 0x24
-	.8byte	.LVL668
-	.4byte	0x4178
-	.uleb128 0x24
-	.8byte	.LVL669
-	.4byte	0x45c7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x40bf
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x8
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x40af
-	.uleb128 0x32
-	.4byte	.LASF524
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x2f
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x410f
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0x2e8
-	.4byte	.LLST225
-	.uleb128 0x24
-	.8byte	.LVL1028
-	.4byte	0x3ca9
-	.uleb128 0x24
-	.8byte	.LVL1031
-	.4byte	0x4178
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF525
-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0x2e8
-	.8byte	.LFB199
-	.8byte	.LFE199-.LFB199
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4178
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x2
-	.2byte	0x2ee
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF526
-	.byte	0x2
-	.2byte	0x2ef
-	.4byte	0x2e8
-	.4byte	.LLST46
-	.uleb128 0x35
-	.4byte	.LASF527
-	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0x2f3
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x35d2
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3938
-	.uleb128 0x24
-	.8byte	.LVL147
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF528
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x2f
-	.8byte	.LFB198
-	.8byte	.LFE198-.LFB198
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x41c4
-	.uleb128 0x3c
-	.4byte	.LASF520
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x2e8
-	.4byte	.LLST151
-	.uleb128 0x35
-	.4byte	.LASF102
-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL655
-	.4byte	0x41c4
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF529
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x2f
-	.8byte	.LFB197
-	.8byte	.LFE197-.LFB197
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x42b9
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x3901
-	.4byte	.LLST141
-	.uleb128 0x3c
-	.4byte	.LASF102
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x2f3
-	.4byte	.LLST142
-	.uleb128 0x3c
-	.4byte	.LASF513
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x520
-	.4byte	.LLST143
-	.uleb128 0x35
-	.4byte	.LASF175
-	.byte	0x2
-	.2byte	0x2a9
-	.4byte	0x2f3
-	.uleb128 0x3e
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x2aa
-	.4byte	0x3907
-	.4byte	.LLST144
-	.uleb128 0x3e
-	.4byte	.LASF501
-	.byte	0x2
-	.2byte	0x2ab
-	.4byte	0x2e8
-	.4byte	.LLST145
-	.uleb128 0x37
-	.4byte	.LASF530
-	.byte	0x2
-	.2byte	0x2ad
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2742
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3913
-	.uleb128 0x24
-	.8byte	.LVL619
-	.4byte	0x42b9
-	.uleb128 0x24
-	.8byte	.LVL620
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL621
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL622
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL625
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL628
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL629
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF531
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x2f
-	.8byte	.LFB196
-	.8byte	.LFE196-.LFB196
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4398
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x3901
-	.4byte	.LLST136
-	.uleb128 0x35
-	.4byte	.LASF175
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF116
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0x2e8
-	.4byte	.LLST137
-	.uleb128 0x3e
-	.4byte	.LASF532
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0x2e8
-	.4byte	.LLST138
-	.uleb128 0x3e
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x617
-	.4byte	.LLST139
-	.uleb128 0x3e
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0x520
-	.4byte	.LLST140
-	.uleb128 0x35
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x3907
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x43a8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3899
-	.uleb128 0x24
-	.8byte	.LVL597
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL598
-	.4byte	0x49e8
-	.uleb128 0x24
-	.8byte	.LVL605
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL610
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL611
-	.4byte	0x43ad
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x43a8
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x4398
-	.uleb128 0x32
-	.4byte	.LASF534
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x2f
-	.8byte	.LFB195
-	.8byte	.LFE195-.LFB195
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x44a6
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x3901
-	.4byte	.LLST146
-	.uleb128 0x3e
-	.4byte	.LASF535
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0x2e8
-	.4byte	.LLST147
-	.uleb128 0x35
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF116
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0x2e8
-	.4byte	.LLST148
-	.uleb128 0x3e
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x617
-	.4byte	.LLST149
-	.uleb128 0x3e
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0x520
-	.4byte	.LLST150
-	.uleb128 0x35
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x3907
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x1d08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3885
-	.uleb128 0x24
-	.8byte	.LVL637
-	.4byte	0x44fe
-	.uleb128 0x24
-	.8byte	.LVL639
-	.4byte	0x44a6
-	.uleb128 0x24
-	.8byte	.LVL641
-	.4byte	0x4b4a
-	.uleb128 0x24
-	.8byte	.LVL643
-	.4byte	0x44a6
-	.uleb128 0x24
-	.8byte	.LVL648
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL649
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL652
-	.4byte	0x41c4
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LASF537
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x44e9
-	.uleb128 0x34
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x3901
-	.uleb128 0x35
-	.4byte	.LASF538
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x617
-	.uleb128 0x38
-	.4byte	.LASF357
-	.4byte	0x44f9
-	.4byte	.LASF537
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x44f9
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x19
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x44e9
-	.uleb128 0x32
-	.4byte	.LASF539
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x2f
-	.8byte	.LFB193
-	.8byte	.LFE193-.LFB193
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45c7
-	.uleb128 0x3c
-	.4byte	.LASF483
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x3901
-	.4byte	.LLST128
-	.uleb128 0x3e
-	.4byte	.LASF533
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x617
-	.4byte	.LLST129
-	.uleb128 0x3e
-	.4byte	.LASF486
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0x520
-	.4byte	.LLST130
-	.uleb128 0x3e
-	.4byte	.LASF540
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x617
-	.4byte	.LLST131
-	.uleb128 0x3e
-	.4byte	.LASF175
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x2e8
-	.4byte	.LLST132
-	.uleb128 0x3e
-	.4byte	.LASF116
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0x2e8
-	.4byte	.LLST133
-	.uleb128 0x35
-	.4byte	.LASF538
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF541
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0x2e8
-	.4byte	.LLST134
-	.uleb128 0x3e
-	.4byte	.LASF536
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0x2e8
-	.4byte	.LLST135
-	.uleb128 0x24
-	.8byte	.LVL576
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL592
-	.4byte	0x4b4a
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x2f
-	.8byte	.LFB192
-	.8byte	.LFE192-.LFB192
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4698
-	.uleb128 0x3c
-	.4byte	.LASF102
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x2e8
-	.4byte	.LLST124
-	.uleb128 0x3c
-	.4byte	.LASF520
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x2e8
-	.4byte	.LLST125
-	.uleb128 0x3e
-	.4byte	.LASF488
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x3907
-	.4byte	.LLST126
-	.uleb128 0x3e
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x2f3
-	.4byte	.LLST127
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2742
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3841
-	.uleb128 0x24
-	.8byte	.LVL554
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL559
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL566
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL568
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL569
-	.4byte	0x75b2
-	.uleb128 0x24
-	.8byte	.LVL570
-	.4byte	0x75b2
-	.uleb128 0x24
-	.8byte	.LVL571
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x4717
-	.uleb128 0x34
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF545
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF546
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF547
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF548
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF549
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x134b
-	.uleb128 0x35
-	.4byte	.LASF550
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x134b
-	.uleb128 0x38
-	.4byte	.LASF357
-	.4byte	0x35d2
-	.4byte	.LASF544
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF551
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x2f
-	.8byte	.LFB190
-	.8byte	.LFE190-.LFB190
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4766
-	.uleb128 0x3c
-	.4byte	.LASF90
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x2e8
-	.4byte	.LLST38
-	.uleb128 0x35
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x134b
-	.4byte	.LLST39
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF552
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x2f
-	.8byte	.LFB189
-	.8byte	.LFE189-.LFB189
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47a6
-	.uleb128 0x3c
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x47a6
-	.4byte	.LLST37
-	.uleb128 0x24
-	.8byte	.LVL119
-	.4byte	0x47ac
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x134b
-	.uleb128 0x32
-	.4byte	.LASF554
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x2f
-	.8byte	.LFB188
-	.8byte	.LFE188-.LFB188
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x481c
-	.uleb128 0x3c
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x47a6
-	.4byte	.LLST33
-	.uleb128 0x3c
-	.4byte	.LASF90
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x2e8
-	.4byte	.LLST34
-	.uleb128 0x3e
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0x2e8
-	.4byte	.LLST35
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x134b
-	.4byte	.LLST36
-	.uleb128 0x24
-	.8byte	.LVL112
-	.4byte	0x481c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF555
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x2f
-	.8byte	.LFB187
-	.8byte	.LFE187-.LFB187
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x489b
-	.uleb128 0x3c
-	.4byte	.LASF553
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x47a6
-	.4byte	.LLST30
-	.uleb128 0x3c
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x2e8
-	.4byte	.LLST31
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x134b
-	.4byte	.LLST32
-	.uleb128 0x35
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x134b
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x48ab
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3800
-	.uleb128 0x24
-	.8byte	.LVL103
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x48ab
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0x10
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x489b
-	.uleb128 0x32
-	.4byte	.LASF557
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x2f
-	.8byte	.LFB186
-	.8byte	.LFE186-.LFB186
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4929
-	.uleb128 0x3c
-	.4byte	.LASF429
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x2e8
-	.4byte	.LLST26
-	.uleb128 0x3e
-	.4byte	.LASF432
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x134b
-	.4byte	.LLST27
-	.uleb128 0x1f
-	.4byte	.LASF556
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x134b
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3e
-	.4byte	.LASF558
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0x2e8
-	.4byte	.LLST28
-	.uleb128 0x35
-	.4byte	.LASF559
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF560
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF561
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x499e
-	.uleb128 0x2b
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x2e8
-	.uleb128 0x2c
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x134b
-	.uleb128 0x2c
-	.4byte	.LASF556
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x134b
-	.uleb128 0x2c
-	.4byte	.LASF562
-	.byte	0x2
-	.byte	0xfb
-	.4byte	0x2e8
-	.uleb128 0x2c
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-	.byte	0x2
-	.byte	0xfc
-	.4byte	0x2e8
-	.uleb128 0x2c
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-	.byte	0x2
-	.byte	0xfd
-	.4byte	0x2f3
-	.uleb128 0x2c
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-	.byte	0x2
-	.byte	0xfe
-	.4byte	0x2f3
-	.uleb128 0x2c
-	.4byte	.LASF560
-	.byte	0x2
-	.byte	0xff
-	.4byte	0x2e8
-	.uleb128 0x35
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-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF565
-	.byte	0x2
-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x49c3
-	.uleb128 0x2b
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0xd9
-	.4byte	0x2e8
-	.uleb128 0x38
-	.4byte	.LASF357
-	.4byte	0x48ab
-	.4byte	.LASF565
-	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF566
-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x49e8
-	.uleb128 0x2b
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0x2e8
-	.uleb128 0x38
-	.4byte	.LASF357
-	.4byte	0x48ab
-	.4byte	.LASF566
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF567
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0x2e8
-	.8byte	.LFB182
-	.8byte	.LFE182-.LFB182
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-	.byte	0x9c
-	.4byte	0x4a91
-	.uleb128 0x43
-	.string	"tmp"
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-	.byte	0xb6
-	.4byte	0x2e8
-	.4byte	.LLST113
-	.uleb128 0x29
-	.string	"Q"
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-	.byte	0xb7
-	.4byte	0x4a91
-	.uleb128 0x4f
-	.4byte	.LASF568
-	.byte	0x2
-	.byte	0xb9
-	.8byte	.L445
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x4a63
-	.uleb128 0x28
-	.4byte	.LASF569
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0x2e8
-	.4byte	.LLST114
-	.uleb128 0x24
-	.8byte	.LVL481
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL482
-	.4byte	0x1b39
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x4b91
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-	.4byte	.Ldebug_ranges0+0x140
-	.byte	0x2
-	.byte	0xba
-	.uleb128 0x24
-	.8byte	.LVL483
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL484
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0xac3
-	.uleb128 0x22
-	.4byte	.LASF570
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x2f
-	.8byte	.LFB181
-	.8byte	.LFE181-.LFB181
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4afc
-	.uleb128 0x26
-	.string	"blk"
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-	.byte	0xa2
-	.4byte	0x2e8
-	.4byte	.LLST19
-	.uleb128 0x51
-	.string	"ret"
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-	.byte	0xa4
-	.4byte	0x2f
-	.uleb128 0x1
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-	.uleb128 0x51
-	.string	"i"
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-	.byte	0xa5
-	.4byte	0x2f3
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x29
-	.string	"Q"
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-	.byte	0xa6
-	.4byte	0x4a91
-	.uleb128 0x50
-	.4byte	0x4b85
-	.8byte	.LBB172
-	.4byte	.Ldebug_ranges0+0x30
-	.byte	0x2
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF571
-	.byte	0x2
-	.byte	0x75
-	.8byte	.LFB180
-	.8byte	.LFE180-.LFB180
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-	.byte	0x9c
-	.4byte	0x4b4a
-	.uleb128 0x20
-	.4byte	.LASF111
-	.byte	0x2
-	.byte	0x77
-	.4byte	0x2fe
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x43
-	.string	"i"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0x2e8
-	.4byte	.LLST18
-	.uleb128 0x51
-	.string	"blk"
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-	.byte	0x78
-	.4byte	0x2e8
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x29
-	.string	"Q"
-	.byte	0x2
-	.byte	0x79
-	.4byte	0x4a91
-	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF572
-	.byte	0x2
-	.byte	0x61
-	.byte	0x1
-	.4byte	0x4b85
-	.uleb128 0x31
-	.string	"blk"
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-	.byte	0x61
-	.4byte	0x2e8
-	.uleb128 0x2b
-	.4byte	.LASF573
-	.byte	0x2
-	.byte	0x61
-	.4byte	0x2e8
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-	.uleb128 0x29
-	.string	"Q"
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-	.byte	0x66
-	.4byte	0x4a91
-	.uleb128 0x39
-	.uleb128 0x2c
-	.4byte	.LASF569
-	.byte	0x2
-	.byte	0x68
-	.4byte	0x2e8
-	.byte	0
-	.byte	0
-	.byte	0
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-	.4byte	.LASF574
-	.byte	0x2
-	.byte	0x5c
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-	.byte	0x1
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-	.byte	0x2
-	.byte	0x57
-	.4byte	0x2e8
-	.byte	0x1
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-	.4byte	.LASF576
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x2e8
-	.8byte	.LFB176
-	.8byte	.LFE176-.LFB176
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-	.byte	0x9c
-	.4byte	0x4be4
-	.uleb128 0x26
-	.string	"max"
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0x2e8
-	.4byte	.LLST123
-	.uleb128 0x29
-	.string	"Q"
-	.byte	0x2
-	.byte	0x4d
-	.4byte	0x4a91
-	.uleb128 0x24
-	.8byte	.LVL550
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF577
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x2f
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-	.8byte	.LFE175-.LFB175
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-	.byte	0x9c
-	.4byte	0x4c8f
-	.uleb128 0x23
-	.4byte	.LASF175
-	.byte	0x2
-	.byte	0x2e
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-	.byte	0x2
-	.byte	0x2e
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-	.uleb128 0x51
-	.string	"req"
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-	.byte	0x91
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-	.byte	0x2
-	.byte	0x31
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-	.string	"mid"
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-	.byte	0x2
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-	.uleb128 0x28
-	.4byte	.LASF597
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x2f
-	.4byte	.LLST207
-	.uleb128 0x28
-	.4byte	.LASF588
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x4f2b
-	.4byte	.LLST208
-	.uleb128 0x28
-	.4byte	.LASF501
-	.byte	0x4
-	.byte	0x54
-	.4byte	0x2e8
-	.4byte	.LLST209
-	.uleb128 0x40
-	.4byte	.LASF598
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x53
-	.4byte	.LASF357
-	.4byte	0x1d08
-	.uleb128 0x24
-	.8byte	.LVL916
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL918
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL921
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL922
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL923
-	.4byte	0x1b39
-	.uleb128 0x24
-	.8byte	.LVL924
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL927
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL928
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL930
-	.4byte	0x19ba
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF599
-	.byte	0x4
-	.byte	0x41
-	.8byte	.LFB164
-	.8byte	.LFE164-.LFB164
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x525d
-	.uleb128 0x23
-	.4byte	.LASF533
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x617
-	.4byte	.LLST121
-	.uleb128 0x23
-	.4byte	.LASF600
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x520
-	.4byte	.LLST122
-	.uleb128 0x29
-	.string	"i"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0x2f3
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x2e08
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3604
-	.uleb128 0x24
-	.8byte	.LVL544
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL545
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF601
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x22
-	.4byte	.LASF602
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x2f
-	.8byte	.LFB162
-	.8byte	.LFE162-.LFB162
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x52c4
-	.uleb128 0x23
-	.4byte	.LASF175
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x2e8
-	.4byte	.LLST9
-	.uleb128 0x29
-	.string	"die"
-	.byte	0x4
-	.byte	0x19
-	.4byte	0x2f3
-	.uleb128 0x29
-	.string	"i"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0x2f3
-	.uleb128 0x2c
-	.4byte	.LASF600
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0x520
-	.uleb128 0x28
-	.4byte	.LASF365
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0x2e8
-	.4byte	.LLST10
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF603
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x2f
-	.8byte	.LFB161
-	.8byte	.LFE161-.LFB161
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5327
-	.uleb128 0x23
-	.4byte	.LASF175
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x2e8
-	.4byte	.LLST7
-	.uleb128 0x43
-	.string	"die"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0x2f3
-	.4byte	.LLST8
-	.uleb128 0x2c
-	.4byte	.LASF600
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x520
-	.uleb128 0x2c
-	.4byte	.LASF365
-	.byte	0x4
-	.byte	0x8
-	.4byte	0x2e8
-	.uleb128 0x24
-	.8byte	.LVL29
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF664
-	.byte	0x3
-	.2byte	0x4bd
-	.4byte	0x2f3
-	.8byte	.LFB160
-	.8byte	.LFE160-.LFB160
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x32
-	.4byte	.LASF604
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x2f
-	.8byte	.LFB159
-	.8byte	.LFE159-.LFB159
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53a5
-	.uleb128 0x3c
-	.4byte	.LASF90
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0xa1
-	.4byte	.LLST327
-	.uleb128 0x3c
-	.4byte	.LASF111
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0xa1
-	.4byte	.LLST328
-	.uleb128 0x46
-	.string	"buf"
-	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x53a5
-	.4byte	.LLST329
-	.uleb128 0x24
-	.8byte	.LVL1644
-	.4byte	0x5501
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x81
-	.uleb128 0x32
-	.4byte	.LASF605
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x2f
-	.8byte	.LFB158
-	.8byte	.LFE158-.LFB158
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x540b
-	.uleb128 0x3c
-	.4byte	.LASF90
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0xa1
-	.4byte	.LLST313
-	.uleb128 0x3c
-	.4byte	.LASF111
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0xa1
-	.4byte	.LLST314
-	.uleb128 0x46
-	.string	"buf"
-	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x53a5
-	.4byte	.LLST315
-	.uleb128 0x24
-	.8byte	.LVL1565
-	.4byte	0x5947
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF606
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x2f
-	.8byte	.LFB157
-	.8byte	.LFE157-.LFB157
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5501
-	.uleb128 0x3c
-	.4byte	.LASF511
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x2f3
-	.4byte	.LLST275
-	.uleb128 0x3c
-	.4byte	.LASF512
-	.byte	0x3
-	.2byte	0x484
-	.4byte	0x2f3
-	.4byte	.LLST276
-	.uleb128 0x3e
-	.4byte	.LASF514
-	.byte	0x3
-	.2byte	0x486
-	.4byte	0x2e8
-	.4byte	.LLST277
-	.uleb128 0x36
-	.string	"tmp"
-	.byte	0x3
-	.2byte	0x487
-	.4byte	0x2e8
-	.uleb128 0x3d
-	.string	"lpa"
-	.byte	0x3
-	.2byte	0x488
-	.4byte	0x2f3
-	.4byte	.LLST278
-	.uleb128 0x3e
-	.4byte	.LASF443
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x2f3
-	.4byte	.LLST279
-	.uleb128 0x3e
-	.4byte	.LASF420
-	.byte	0x3
-	.2byte	0x489
-	.4byte	0x2f3
-	.4byte	.LLST280
-	.uleb128 0x35
-	.4byte	.LASF409
-	.byte	0x3
-	.2byte	0x48a
-	.4byte	0x2e8
-	.uleb128 0x24
-	.8byte	.LVL1340
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1346
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1347
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1348
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1349
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1352
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1353
-	.4byte	0x266c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF607
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2f
-	.8byte	.LFB156
-	.8byte	.LFE156-.LFB156
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x57a6
-	.uleb128 0x46
-	.string	"LUN"
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2dd
-	.4byte	.LLST316
-	.uleb128 0x3c
-	.4byte	.LASF511
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2f3
-	.4byte	.LLST317
-	.uleb128 0x3c
-	.4byte	.LASF512
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x2f3
-	.4byte	.LLST318
-	.uleb128 0x3c
-	.4byte	.LASF513
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x3edf
-	.4byte	.LLST319
-	.uleb128 0x35
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x1f4b
-	.uleb128 0x3d
-	.string	"lpa"
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x2f3
-	.4byte	.LLST320
-	.uleb128 0x3e
-	.4byte	.LASF608
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x2f3
-	.4byte	.LLST321
-	.uleb128 0x3e
-	.4byte	.LASF609
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x2f3
-	.4byte	.LLST322
-	.uleb128 0x3e
-	.4byte	.LASF443
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x2f3
-	.4byte	.LLST323
-	.uleb128 0x36
-	.string	"ppa"
-	.byte	0x3
-	.2byte	0x3c5
-	.4byte	0x2f3
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x2f3
-	.4byte	.LLST324
-	.uleb128 0x3e
-	.4byte	.LASF610
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x2f3
-	.4byte	.LLST325
-	.uleb128 0x35
-	.4byte	.LASF374
-	.byte	0x3
-	.2byte	0x3c6
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF611
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x2f3
-	.uleb128 0x35
-	.4byte	.LASF612
-	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0x2f3
-	.uleb128 0x3e
-	.4byte	.LASF419
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x1423
-	.4byte	.LLST326
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x40bf
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3540
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x390
-	.4byte	0x5660
-	.uleb128 0x1f
-	.4byte	.LASF382
-	.byte	0x3
-	.2byte	0x43d
-	.4byte	0x314
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x24
-	.8byte	.LVL1626
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1630
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1631
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1568
-	.4byte	0x3ee5
-	.uleb128 0x24
-	.8byte	.LVL1580
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1584
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1585
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1586
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1588
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1590
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1591
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1596
-	.4byte	0x1e7e
-	.uleb128 0x24
-	.8byte	.LVL1599
-	.4byte	0x4717
-	.uleb128 0x24
-	.8byte	.LVL1600
-	.4byte	0x208d
-	.uleb128 0x24
-	.8byte	.LVL1601
-	.4byte	0x1e7e
-	.uleb128 0x24
-	.8byte	.LVL1602
-	.4byte	0x1e7e
-	.uleb128 0x24
-	.8byte	.LVL1604
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1607
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1610
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1612
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1613
-	.4byte	0x2747
-	.uleb128 0x24
-	.8byte	.LVL1616
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1621
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1627
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1632
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1633
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1637
-	.4byte	0x57d6
-	.uleb128 0x24
-	.8byte	.LVL1638
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF613
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x2f
-	.8byte	.LFB155
-	.8byte	.LFE155-.LFB155
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x57d6
-	.uleb128 0x24
-	.8byte	.LVL1327
-	.4byte	0x57d6
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF614
-	.byte	0x3
-	.2byte	0x387
-	.8byte	.LFB154
-	.8byte	.LFE154-.LFB154
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5932
-	.uleb128 0x46
-	.string	"req"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xfdb
-	.4byte	.LLST269
-	.uleb128 0x3c
-	.4byte	.LASF374
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x2f3
-	.4byte	.LLST270
-	.uleb128 0x3c
-	.4byte	.LASF615
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x2f3
-	.4byte	.LLST271
-	.uleb128 0x3c
-	.4byte	.LASF419
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1423
-	.4byte	.LLST272
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0x2f3
-	.uleb128 0x3d
-	.string	"ppa"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x2f3
-	.4byte	.LLST273
-	.uleb128 0x3e
-	.4byte	.LASF443
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0x2f3
-	.4byte	.LLST274
-	.uleb128 0x35
-	.4byte	.LASF402
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF377
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x1f4b
-	.uleb128 0x35
-	.4byte	.LASF467
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0x2f3
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x5942
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3512
-	.uleb128 0x24
-	.8byte	.LVL1311
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1313
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1314
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1315
-	.4byte	0x201d
-	.uleb128 0x24
-	.8byte	.LVL1316
-	.4byte	0x2747
-	.uleb128 0x24
-	.8byte	.LVL1317
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1318
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1320
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1322
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1323
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1324
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1325
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0xb
-	.4byte	0x4b
-	.4byte	0x5942
-	.uleb128 0x17
-	.4byte	0x3d
-	.byte	0xc
-	.byte	0
-	.uleb128 0x5
-	.4byte	0x5932
-	.uleb128 0x32
-	.4byte	.LASF616
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2f
-	.8byte	.LFB153
-	.8byte	.LFE153-.LFB153
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b05
-	.uleb128 0x46
-	.string	"LUN"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2dd
-	.4byte	.LLST299
-	.uleb128 0x3c
-	.4byte	.LASF511
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2f3
-	.4byte	.LLST300
-	.uleb128 0x3c
-	.4byte	.LASF512
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x2f3
-	.4byte	.LLST301
-	.uleb128 0x3c
-	.4byte	.LASF513
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x3edf
-	.4byte	.LLST302
-	.uleb128 0x4a
-	.string	"ret"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x2f
-	.uleb128 0x1
-	.byte	0x65
-	.uleb128 0x3e
-	.4byte	.LASF608
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x2f3
-	.4byte	.LLST303
-	.uleb128 0x3e
-	.4byte	.LASF609
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x2f3
-	.4byte	.LLST304
-	.uleb128 0x3e
-	.4byte	.LASF617
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0x2f3
-	.4byte	.LLST305
-	.uleb128 0x3d
-	.string	"lpa"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x2f3
-	.4byte	.LLST306
-	.uleb128 0x3d
-	.string	"ppa"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x2f3
-	.4byte	.LLST307
-	.uleb128 0x36
-	.string	"n"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x2f3
-	.uleb128 0x3e
-	.4byte	.LASF374
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x2f3
-	.4byte	.LLST308
-	.uleb128 0x3e
-	.4byte	.LASF610
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x2f3
-	.4byte	.LLST309
-	.uleb128 0x3e
-	.4byte	.LASF618
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x2f3
-	.4byte	.LLST310
-	.uleb128 0x35
-	.4byte	.LASF619
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0x2f3
-	.uleb128 0x3e
-	.4byte	.LASF620
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0x2f3
-	.4byte	.LLST311
-	.uleb128 0x3e
-	.4byte	.LASF621
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0x2f3
-	.4byte	.LLST312
-	.uleb128 0x4c
-	.8byte	.LBB324
-	.8byte	.LBE324-.LBB324
-	.4byte	0x5aa9
-	.uleb128 0x35
-	.4byte	.LASF389
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0x2e8
-	.uleb128 0x24
-	.8byte	.LVL1544
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL1545
-	.4byte	0x208d
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1515
-	.4byte	0x3dfc
-	.uleb128 0x24
-	.8byte	.LVL1524
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1531
-	.4byte	0x1e7e
-	.uleb128 0x24
-	.8byte	.LVL1533
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1537
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1543
-	.4byte	0x19ba
-	.uleb128 0x24
-	.8byte	.LVL1550
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF622
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x2f
-	.8byte	.LFB152
-	.8byte	.LFE152-.LFB152
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b35
-	.uleb128 0x24
-	.8byte	.LVL1332
-	.4byte	0x5b35
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x2f
-	.8byte	.LFB151
-	.8byte	.LFE151-.LFB151
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b8c
-	.uleb128 0x24
-	.8byte	.LVL1328
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1329
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1330
-	.4byte	0x3d9f
-	.uleb128 0x24
-	.8byte	.LVL1331
-	.4byte	0x3baa
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF624
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x2f
-	.8byte	.LFB150
-	.8byte	.LFE150-.LFB150
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c4b
-	.uleb128 0x35
-	.4byte	.LASF625
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x5c4b
-	.uleb128 0x37
-	.4byte	.LASF626
-	.byte	0x3
-	.2byte	0x2f3
-	.uleb128 0x4c
-	.8byte	.LBB334
-	.8byte	.LBE334-.LBB334
-	.4byte	0x5bef
-	.uleb128 0x36
-	.string	"i"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL1730
-	.4byte	0x1e7e
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1723
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1724
-	.4byte	0x61cd
-	.uleb128 0x24
-	.8byte	.LVL1725
-	.4byte	0x5fa9
-	.uleb128 0x24
-	.8byte	.LVL1726
-	.4byte	0x5f2b
-	.uleb128 0x24
-	.8byte	.LVL1727
-	.4byte	0x4b9d
-	.uleb128 0x24
-	.8byte	.LVL1728
-	.4byte	0x4f9d
-	.uleb128 0x24
-	.8byte	.LVL1729
-	.4byte	0x2c58
-	.byte	0
-	.uleb128 0x7
-	.byte	0x8
-	.4byte	0x400
-	.uleb128 0x32
-	.4byte	.LASF627
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x2f
-	.8byte	.LFB149
-	.8byte	.LFE149-.LFB149
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d9e
-	.uleb128 0x35
-	.4byte	.LASF497
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF628
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0x2e8
-	.4byte	.LLST332
-	.uleb128 0x3e
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0x2e8
-	.4byte	.LLST333
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0x2e8
-	.4byte	.LLST334
-	.uleb128 0x41
-	.4byte	.LASF630
-	.byte	0x3
-	.2byte	0x2bc
-	.8byte	.L1628
-	.uleb128 0x41
-	.4byte	.LASF631
-	.byte	0x3
-	.2byte	0x2cc
-	.8byte	.L1630
-	.uleb128 0x24
-	.8byte	.LVL1690
-	.4byte	0x4b9d
-	.uleb128 0x24
-	.8byte	.LVL1691
-	.4byte	0x4f9d
-	.uleb128 0x24
-	.8byte	.LVL1692
-	.4byte	0x4d9d
-	.uleb128 0x24
-	.8byte	.LVL1699
-	.4byte	0x510a
-	.uleb128 0x24
-	.8byte	.LVL1700
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1701
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1702
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1707
-	.4byte	0x5d9e
-	.uleb128 0x24
-	.8byte	.LVL1711
-	.4byte	0x622e
-	.uleb128 0x24
-	.8byte	.LVL1712
-	.4byte	0x4b9d
-	.uleb128 0x24
-	.8byte	.LVL1713
-	.4byte	0x5d9e
-	.uleb128 0x24
-	.8byte	.LVL1715
-	.4byte	0x5d9e
-	.uleb128 0x24
-	.8byte	.LVL1719
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1720
-	.4byte	0x49e8
-	.uleb128 0x24
-	.8byte	.LVL1721
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1722
-	.4byte	0x2c58
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF632
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2f
-	.8byte	.LFB148
-	.8byte	.LFE148-.LFB148
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5f01
-	.uleb128 0x3c
-	.4byte	.LASF497
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2e8
-	.4byte	.LLST106
-	.uleb128 0x3c
-	.4byte	.LASF633
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x2dd
-	.4byte	.LLST107
-	.uleb128 0x3e
-	.4byte	.LASF628
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x2e8
-	.4byte	.LLST108
-	.uleb128 0x35
-	.4byte	.LASF352
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF373
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF175
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0x2e8
-	.uleb128 0x3e
-	.4byte	.LASF634
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0x2e8
-	.4byte	.LLST109
-	.uleb128 0x3e
-	.4byte	.LASF635
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0x2e8
-	.4byte	.LLST110
-	.uleb128 0x3e
-	.4byte	.LASF636
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0x2e8
-	.4byte	.LLST111
-	.uleb128 0x3e
-	.4byte	.LASF637
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0x2e8
-	.4byte	.LLST112
-	.uleb128 0x41
-	.4byte	.LASF638
-	.byte	0x3
-	.2byte	0x240
-	.8byte	.L411
-	.uleb128 0x24
-	.8byte	.LVL438
-	.4byte	0x1b39
-	.uleb128 0x24
-	.8byte	.LVL441
-	.4byte	0x52c4
-	.uleb128 0x24
-	.8byte	.LVL449
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL452
-	.4byte	0x52c4
-	.uleb128 0x24
-	.8byte	.LVL459
-	.4byte	0x4b4a
-	.uleb128 0x24
-	.8byte	.LVL461
-	.4byte	0x1b39
-	.uleb128 0x24
-	.8byte	.LVL468
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL469
-	.4byte	0x5f01
-	.uleb128 0x24
-	.8byte	.LVL470
-	.4byte	0x5265
-	.uleb128 0x24
-	.8byte	.LVL477
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL478
-	.4byte	0x5f01
-	.uleb128 0x24
-	.8byte	.LVL479
-	.4byte	0x5265
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x2f
-	.byte	0x1
-	.4byte	0x5f2b
-	.uleb128 0x34
-	.4byte	.LASF175
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x2e8
-	.uleb128 0x35
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0x2e8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF641
-	.byte	0x3
-	.2byte	0x1ec
-	.4byte	0x2f
-	.8byte	.LFB146
-	.8byte	.LFE146-.LFB146
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5fa9
-	.uleb128 0x24
-	.8byte	.LVL811
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL812
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL813
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL814
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL815
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL816
-	.4byte	0x2645
-	.uleb128 0x24
-	.8byte	.LVL817
-	.4byte	0x3748
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LASF642
-	.byte	0x3
-	.2byte	0x116
-	.4byte	0x2f
-	.8byte	.LFB145
-	.8byte	.LFE145-.LFB145
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x61cd
-	.uleb128 0x3d
-	.string	"i"
-	.byte	0x3
-	.2byte	0x118
-	.4byte	0x2f3
-	.4byte	.LLST120
-	.uleb128 0x35
-	.4byte	.LASF643
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0x2f3
-	.uleb128 0x2e
-	.4byte	.LASF357
-	.4byte	0x508d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.3388
-	.uleb128 0x24
-	.8byte	.LVL499
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL500
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL501
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL502
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL503
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL504
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL505
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL506
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL507
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL508
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL509
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL510
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL511
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL512
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL513
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL514
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL515
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL516
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL517
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL518
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL519
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL520
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL521
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL522
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL523
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL524
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL525
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL526
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL527
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL528
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL529
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL530
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL531
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL532
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL533
-	.4byte	0x75bd
-	.uleb128 0x24
-	.8byte	.LVL536
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF644
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x2f
-	.8byte	.LFB144
-	.8byte	.LFE144-.LFB144
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x622e
-	.uleb128 0x23
-	.4byte	.LASF625
-	.byte	0x3
-	.byte	0xb6
-	.4byte	0x5c4b
-	.4byte	.LLST5
-	.uleb128 0x29
-	.string	"i"
-	.byte	0x3
-	.byte	0xb8
-	.4byte	0x2f3
-	.uleb128 0x24
-	.8byte	.LVL19
-	.4byte	0x6277
-	.uleb128 0x24
-	.8byte	.LVL20
-	.4byte	0x6277
-	.uleb128 0x24
-	.8byte	.LVL21
-	.4byte	0x622e
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF645
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x2f
-	.8byte	.LFB143
-	.8byte	.LFE143-.LFB143
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x625f
-	.uleb128 0x23
-	.4byte	.LASF646
-	.byte	0x3
-	.byte	0xa4
-	.4byte	0x2e8
-	.4byte	.LLST4
-	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF647
-	.byte	0x3
-	.byte	0x9e
-	.byte	0x1
-	.4byte	0x6277
-	.uleb128 0x2b
-	.4byte	.LASF648
-	.byte	0x3
-	.byte	0x9e
-	.4byte	0x2f3
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF649
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x2e8
-	.8byte	.LFB141
-	.8byte	.LFE141-.LFB141
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62be
-	.uleb128 0x26
-	.string	"num"
-	.byte	0x3
-	.byte	0x7e
-	.4byte	0x2f3
-	.4byte	.LLST3
-	.uleb128 0x29
-	.string	"i"
-	.byte	0x3
-	.byte	0x80
-	.4byte	0x2e8
-	.uleb128 0x20
-	.4byte	.LASF650
-	.byte	0x3
-	.byte	0x81
-	.4byte	0x2f3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF651
-	.byte	0x3
-	.byte	0x70
-	.4byte	0x2f
-	.8byte	.LFB140
-	.8byte	.LFE140-.LFB140
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6314
-	.uleb128 0x23
-	.4byte	.LASF82
-	.byte	0x3
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-	.uleb128 0x5b
-	.4byte	0x4b61
-	.4byte	.LLST104
-	.uleb128 0x5f
-	.4byte	0x4b85
-	.8byte	.LBB230
-	.8byte	.LBE230-.LBB230
-	.byte	0x2
-	.byte	0x65
-	.uleb128 0x5e
-	.8byte	.LBB232
-	.8byte	.LBE232-.LBB232
-	.uleb128 0x48
-	.4byte	0x4b61
-	.uleb128 0x48
-	.4byte	0x4b56
-	.uleb128 0x5e
-	.8byte	.LBB233
-	.8byte	.LBE233-.LBB233
-	.uleb128 0x58
-	.4byte	0x4b6d
-	.uleb128 0x5e
-	.8byte	.LBB234
-	.8byte	.LBE234-.LBB234
-	.uleb128 0x59
-	.4byte	0x4b77
-	.4byte	.LLST105
-	.uleb128 0x24
-	.8byte	.LVL427
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL429
-	.4byte	0x1b39
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x44a6
-	.8byte	.LFB194
-	.8byte	.LFE194-.LFB194
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6d6a
-	.uleb128 0x5b
-	.4byte	0x44b7
-	.4byte	.LLST115
-	.uleb128 0x59
-	.4byte	0x44c3
-	.4byte	.LLST116
-	.uleb128 0x58
-	.4byte	0x44cf
-	.uleb128 0x58
-	.4byte	0x44db
-	.uleb128 0x4c
-	.8byte	.LBB245
-	.8byte	.LBE245-.LBB245
-	.4byte	0x6d4f
-	.uleb128 0x48
-	.4byte	0x44b7
-	.uleb128 0x5e
-	.8byte	.LBB246
-	.8byte	.LBE246-.LBB246
-	.uleb128 0x58
-	.4byte	0x6cf3
-	.uleb128 0x58
-	.4byte	0x6cfc
-	.uleb128 0x58
-	.4byte	0x6d01
-	.uleb128 0x24
-	.8byte	.LVL491
-	.4byte	0x75a7
-	.byte	0
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL489
-	.4byte	0x49e8
-	.uleb128 0x24
-	.8byte	.LVL490
-	.4byte	0x75a7
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x1f66
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e2f
-	.uleb128 0x5a
-	.4byte	0x1f77
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x58
-	.4byte	0x1f83
-	.uleb128 0x58
-	.4byte	0x1f8d
-	.uleb128 0x58
-	.4byte	0x1f99
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x1e0
-	.4byte	0x6e13
-	.uleb128 0x58
-	.4byte	0x6d85
-	.uleb128 0x58
-	.4byte	0x6d8c
-	.uleb128 0x59
-	.4byte	0x6d91
-	.4byte	.LLST165
-	.uleb128 0x5a
-	.4byte	0x6d96
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x4c
-	.8byte	.LBB256
-	.8byte	.LBE256-.LBB256
-	.4byte	0x6e05
-	.uleb128 0x5a
-	.4byte	0x1faa
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x24
-	.8byte	.LVL712
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL713
-	.4byte	0x4cdc
-	.uleb128 0x24
-	.8byte	.LVL714
-	.4byte	0x208d
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL711
-	.4byte	0x3fd5
-	.byte	0
-	.uleb128 0x5e
-	.8byte	.LBB263
-	.8byte	.LBE263-.LBB263
-	.uleb128 0x59
-	.4byte	0x1fb8
-	.4byte	.LLST166
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x1ae5
-	.8byte	.LFB264
-	.8byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6ee8
-	.uleb128 0x5b
-	.4byte	0x1af5
-	.4byte	.LLST199
-	.uleb128 0x58
-	.4byte	0x1b00
-	.uleb128 0x58
-	.4byte	0x1b0b
-	.uleb128 0x58
-	.4byte	0x1b16
-	.uleb128 0x5e
-	.8byte	.LBB268
-	.8byte	.LBE268-.LBB268
-	.uleb128 0x48
-	.4byte	0x1af5
-	.uleb128 0x5e
-	.8byte	.LBB269
-	.8byte	.LBE269-.LBB269
-	.uleb128 0x58
-	.4byte	0x6e53
-	.uleb128 0x5a
-	.4byte	0x6e58
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x5a
-	.4byte	0x6e5d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x60
-	.4byte	0x1b21
-	.uleb128 0x24
-	.8byte	.LVL893
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL895
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL896
-	.4byte	0x1b39
-	.uleb128 0x24
-	.8byte	.LVL897
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL898
-	.4byte	0x1b39
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x1fc6
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6f97
-	.uleb128 0x5b
-	.4byte	0x1fd7
-	.4byte	.LLST215
-	.uleb128 0x58
-	.4byte	0x1fe3
-	.uleb128 0x58
-	.4byte	0x1fef
-	.uleb128 0x58
-	.4byte	0x1ff9
-	.uleb128 0x58
-	.4byte	0x2003
-	.uleb128 0x5c
-	.4byte	.Ldebug_ranges0+0x260
-	.uleb128 0x48
-	.4byte	0x1fd7
-	.uleb128 0x5c
-	.4byte	.Ldebug_ranges0+0x260
-	.uleb128 0x59
-	.4byte	0x6f0c
-	.4byte	.LLST216
-	.uleb128 0x59
-	.4byte	0x6f11
-	.4byte	.LLST217
-	.uleb128 0x59
-	.4byte	0x6f16
-	.4byte	.LLST218
-	.uleb128 0x59
-	.4byte	0x6f1b
-	.4byte	.LLST219
-	.uleb128 0x24
-	.8byte	.LVL977
-	.4byte	0x2010
-	.uleb128 0x24
-	.8byte	.LVL982
-	.4byte	0x4d54
-	.uleb128 0x24
-	.8byte	.LVL985
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL986
-	.4byte	0x52c4
-	.uleb128 0x24
-	.8byte	.LVL987
-	.4byte	0x510a
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x2707
-	.8byte	.LFB240
-	.8byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7041
-	.uleb128 0x5b
-	.4byte	0x2718
-	.4byte	.LLST220
-	.uleb128 0x58
-	.4byte	0x2724
-	.uleb128 0x4c
-	.8byte	.LBB282
-	.8byte	.LBE282-.LBB282
-	.4byte	0x7033
-	.uleb128 0x48
-	.4byte	0x2718
-	.uleb128 0x5e
-	.8byte	.LBB283
-	.8byte	.LBE283-.LBB283
-	.uleb128 0x58
-	.4byte	0x6fbb
-	.uleb128 0x24
-	.8byte	.LVL995
-	.4byte	0x481c
-	.uleb128 0x24
-	.8byte	.LVL996
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL997
-	.4byte	0x2a79
-	.uleb128 0x24
-	.8byte	.LVL998
-	.4byte	0x1fc6
-	.uleb128 0x24
-	.8byte	.LVL1000
-	.4byte	0x75a7
-	.byte	0
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1004
-	.4byte	0x4698
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x3ca9
-	.8byte	.LFB207
-	.8byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x70d9
-	.uleb128 0x5c
-	.4byte	.Ldebug_ranges0+0x2a0
-	.uleb128 0x59
-	.4byte	0x3cb7
-	.4byte	.LLST222
-	.uleb128 0x59
-	.4byte	0x3cc3
-	.4byte	.LLST223
-	.uleb128 0x59
-	.4byte	0x3ccf
-	.4byte	.LLST224
-	.uleb128 0x5a
-	.4byte	0x3cdb
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x58
-	.4byte	0x3ce7
-	.uleb128 0x24
-	.8byte	.LVL1014
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1016
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1021
-	.4byte	0x1a1d
-	.uleb128 0x24
-	.8byte	.LVL1023
-	.4byte	0x2747
-	.uleb128 0x24
-	.8byte	.LVL1024
-	.4byte	0x1bdb
-	.uleb128 0x24
-	.8byte	.LVL1025
-	.4byte	0x266c
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x2fb7
-	.8byte	.LFB225
-	.8byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7102
-	.uleb128 0x24
-	.8byte	.LVL1224
-	.4byte	0x3ee5
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x3a55
-	.8byte	.LFB210
-	.8byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7145
-	.uleb128 0x24
-	.8byte	.LVL1257
-	.4byte	0x3dfc
-	.uleb128 0x24
-	.8byte	.LVL1258
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1259
-	.4byte	0x1a1d
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x21e7
-	.8byte	.LFB250
-	.8byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7188
-	.uleb128 0x24
-	.8byte	.LVL1391
-	.4byte	0x21f0
-	.uleb128 0x24
-	.8byte	.LVL1392
-	.4byte	0x3cf5
-	.uleb128 0x24
-	.8byte	.LVL1393
-	.4byte	0x2378
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x1e7e
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x740e
-	.uleb128 0x5b
-	.4byte	0x1e8f
-	.4byte	.LLST288
-	.uleb128 0x5b
-	.4byte	0x1e9b
-	.4byte	.LLST289
-	.uleb128 0x58
-	.4byte	0x1ea7
-	.uleb128 0x58
-	.4byte	0x1eb3
-	.uleb128 0x58
-	.4byte	0x1ebf
-	.uleb128 0x58
-	.4byte	0x1ecb
-	.uleb128 0x58
-	.4byte	0x1ed7
-	.uleb128 0x58
-	.4byte	0x1ee3
-	.uleb128 0x58
-	.4byte	0x1eef
-	.uleb128 0x58
-	.4byte	0x1efb
-	.uleb128 0x58
-	.4byte	0x1f07
-	.uleb128 0x58
-	.4byte	0x1f13
-	.uleb128 0x58
-	.4byte	0x1f2f
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x310
-	.4byte	0x7400
-	.uleb128 0x48
-	.4byte	0x1e9b
-	.uleb128 0x48
-	.4byte	0x1e8f
-	.uleb128 0x5c
-	.4byte	.Ldebug_ranges0+0x310
-	.uleb128 0x59
-	.4byte	0x71b5
-	.4byte	.LLST290
-	.uleb128 0x59
-	.4byte	0x71ba
-	.4byte	.LLST291
-	.uleb128 0x59
-	.4byte	0x71bf
-	.4byte	.LLST292
-	.uleb128 0x58
-	.4byte	0x71c4
-	.uleb128 0x58
-	.4byte	0x71c9
-	.uleb128 0x59
-	.4byte	0x71ce
-	.4byte	.LLST293
-	.uleb128 0x59
-	.4byte	0x71d3
-	.4byte	.LLST294
-	.uleb128 0x59
-	.4byte	0x71d8
-	.4byte	.LLST295
-	.uleb128 0x59
-	.4byte	0x71dd
-	.4byte	.LLST296
-	.uleb128 0x59
-	.4byte	0x71e2
-	.4byte	.LLST297
-	.uleb128 0x60
-	.4byte	0x1f1f
-	.uleb128 0x60
-	.4byte	0x1f27
-	.uleb128 0x58
-	.4byte	0x71e7
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x350
-	.4byte	0x72b9
-	.uleb128 0x59
-	.4byte	0x1f3d
-	.4byte	.LLST298
-	.uleb128 0x24
-	.8byte	.LVL1425
-	.4byte	0x2a97
-	.uleb128 0x24
-	.8byte	.LVL1426
-	.4byte	0x4717
-	.uleb128 0x24
-	.8byte	.LVL1429
-	.4byte	0x4717
-	.uleb128 0x24
-	.8byte	.LVL1430
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1433
-	.4byte	0x2010
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1448
-	.4byte	0x2563
-	.uleb128 0x24
-	.8byte	.LVL1450
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1454
-	.4byte	0x4717
-	.uleb128 0x24
-	.8byte	.LVL1458
-	.4byte	0x1f66
-	.uleb128 0x24
-	.8byte	.LVL1460
-	.4byte	0x4717
-	.uleb128 0x24
-	.8byte	.LVL1461
-	.4byte	0x1f66
-	.uleb128 0x24
-	.8byte	.LVL1463
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1467
-	.4byte	0x2563
-	.uleb128 0x24
-	.8byte	.LVL1468
-	.4byte	0x266c
-	.uleb128 0x24
-	.8byte	.LVL1469
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1470
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1471
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1472
-	.4byte	0x30ad
-	.uleb128 0x24
-	.8byte	.LVL1473
-	.4byte	0x1f66
-	.uleb128 0x24
-	.8byte	.LVL1488
-	.4byte	0x1d0d
-	.uleb128 0x24
-	.8byte	.LVL1492
-	.4byte	0x75a7
-	.uleb128 0x24
-	.8byte	.LVL1493
-	.4byte	0x3fd5
-	.uleb128 0x24
-	.8byte	.LVL1496
-	.4byte	0x2169
-	.uleb128 0x24
-	.8byte	.LVL1499
-	.4byte	0x259d
-	.uleb128 0x24
-	.8byte	.LVL1500
-	.4byte	0x20cd
-	.uleb128 0x24
-	.8byte	.LVL1503
-	.4byte	0x20cd
-	.uleb128 0x24
-	.8byte	.LVL1504
-	.4byte	0x2707
-	.uleb128 0x24
-	.8byte	.LVL1505
-	.4byte	0x57a6
-	.uleb128 0x24
-	.8byte	.LVL1506
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1507
-	.4byte	0x3baa
-	.byte	0
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1431
-	.4byte	0x2378
-	.byte	0
-	.uleb128 0x56
-	.4byte	0x2c58
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7588
-	.uleb128 0x58
-	.4byte	0x2c69
-	.uleb128 0x4c
-	.8byte	.LBB331
-	.8byte	.LBE331-.LBB331
-	.4byte	0x74f8
-	.uleb128 0x59
-	.4byte	0x7429
-	.4byte	.LLST331
-	.uleb128 0x2f
-	.4byte	.Ldebug_ranges0+0x3c0
-	.4byte	0x745b
-	.uleb128 0x58
-	.4byte	0x2c74
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1676
-	.4byte	0x2ef5
-	.uleb128 0x24
-	.8byte	.LVL1677
-	.4byte	0x2ef5
-	.uleb128 0x24
-	.8byte	.LVL1678
-	.4byte	0x3cf5
-	.uleb128 0x24
-	.8byte	.LVL1679
-	.4byte	0x3cf5
-	.uleb128 0x24
-	.8byte	.LVL1680
-	.4byte	0x40c4
-	.uleb128 0x24
-	.8byte	.LVL1681
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1682
-	.4byte	0x3baa
-	.uleb128 0x24
-	.8byte	.LVL1685
-	.4byte	0x208d
-	.uleb128 0x24
-	.8byte	.LVL1686
-	.4byte	0x208d
-	.uleb128 0x24
-	.8byte	.LVL1687
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1688
-	.4byte	0x27df
-	.uleb128 0x24
-	.8byte	.LVL1689
-	.4byte	0x2e0d
-	.byte	0
-	.uleb128 0x24
-	.8byte	.LVL1663
-	.4byte	0x4b9d
-	.uleb128 0x24
-	.8byte	.LVL1664
-	.4byte	0x3a62
-	.uleb128 0x24
-	.8byte	.LVL1665
-	.4byte	0x390d
-	.uleb128 0x24
-	.8byte	.LVL1666
-	.4byte	0x370b
-	.uleb128 0x24
-	.8byte	.LVL1667
-	.4byte	0x3791
-	.uleb128 0x24
-	.8byte	.LVL1668
-	.4byte	0x2f7e
-	.uleb128 0x24
-	.8byte	.LVL1669
-	.4byte	0x3a55
-	.uleb128 0x24
-	.8byte	.LVL1670
-	.4byte	0x4afc
-	.uleb128 0x24
-	.8byte	.LVL1671
-	.4byte	0x2fc0
-	.uleb128 0x24
-	.8byte	.LVL1672
-	.4byte	0x3130
-	.uleb128 0x24
-	.8byte	.LVL1673
-	.4byte	0x3d7b
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF653
-	.4byte	.LASF653
-	.byte	0x10
-	.byte	0x35
-	.uleb128 0x62
-	.4byte	.LASF665
-	.4byte	.LASF665
-	.uleb128 0x61
-	.4byte	.LASF654
-	.4byte	.LASF654
-	.byte	0x10
-	.byte	0x31
-	.uleb128 0x61
-	.4byte	.LASF655
-	.4byte	.LASF655
-	.byte	0xa
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-	.string	"req_read_temp"
-.LASF66:
-	.string	"plane_per_die"
-.LASF55:
-	.string	"uint32"
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-	.string	"FtlSuperblockPowerLostFix"
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-	.string	"gL2pMapInfo"
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-	.string	"pMapHeader"
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-	.string	"__func__"
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-	.string	"prev_ppa_ver"
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-	.string	"prev_id"
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-	.string	"dump_write_en"
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-	.string	"max_erase_count"
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-	.string	"req_read"
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-	.string	"FtlGcScanTempBlk"
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-	.string	"BOPS_EN"
-.LASF418:
-	.string	"get_new_active_ppa"
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-	.string	"g_nand_phy_info"
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-	.string	"FtlGcFreeTempBlock"
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-	.string	"g_totle_swl_count"
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-	.string	"tmp_id"
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-	.string	"sign"
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-	.string	"req_gc_dst"
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-	.string	"FtlSysBlkInit"
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-	.string	"lookup_superblock_id"
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-	.string	"gc_page_count"
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-	.string	"tmp_data_count"
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-	.string	"c_ftl_nand_blk_pre_plane"
-.LASF72:
-	.string	"sec_per_blk"
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-	.string	"sftl_gc"
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-	.string	"get_new_gc_superblock"
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-	.string	"tmp_erase_count"
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-	.string	"allocate_new_data_superblock"
-.LASF378:
-	.string	"gc_next_superblock"
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-	.string	"boot_command_line"
-.LASF530:
-	.string	"update_map_block"
-.LASF603:
-	.string	"FtlBbmMapBadBlock"
-.LASF601:
-	.string	"FtlBbtInfoPrint"
-.LASF52:
-	.string	"hex_asc_upper"
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-	.string	"saved_active_page"
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-	.string	"re_save_vpndata"
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-	.string	"region_num"
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-	.string	"re_save_bbmdata"
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-	.string	"first_lpa_sctidx"
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-	.string	"__security_initcall_start"
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-	.string	"g_totle_slc_erase_count"
-.LASF592:
-	.string	"FtlLoadBbt"
-.LASF172:
-	.string	"check_en"
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-	.string	"g_MaxLbn"
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-	.string	"page_addr"
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-	.string	"totle_num"
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-	.string	"g_nand_ops"
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-	.string	"ver2"
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-	.string	"c_ftl_nand_max_data_blks"
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-	.string	"c_ftl_nand_data_op_blks_per_plane"
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-	.string	"FtlFreeSysBlkQueueOut"
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-	.string	"ftl_data_blk_header"
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-	.string	"req_erase"
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-	.string	"num_lpa"
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-	.string	"c_ftl_nand_byte_pre_oob"
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-	.string	"FtlEctTblFlush"
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-	.string	"ftl_sys_blk_header"
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-	.string	"ftl_memcpy"
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-	.string	"g_totle_read_page_count"
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-	.string	"p_sys_data_buf_1"
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-	.string	"sysctl_panic_on_stackoverflow"
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-	.string	"c_ftl_nand_map_region_num"
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-	.string	"SYSTEM_RESTART"
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-	.string	"activeFlashMode"
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-	.string	"read_req"
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-	.string	"p_vendor_block_table"
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-	.string	"discard_page_count"
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-	.string	"vpcTbl"
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-	.string	"g_buffer_superblock"
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-	.string	"long int"
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-	.string	"create_first_buffer_superblock"
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-	.string	"p_data"
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-	.string	"c_gc_page_buf_num"
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-	.string	"Index"
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-	.string	"gSysFreeQueue"
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-	.string	"l2p_write_count"
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-	.string	"absolute_sector"
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-	.string	"pHead"
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-	.string	"nand_phy_info"
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-	.string	"c_ftl_nand_type"
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-	.string	"FtlUpdateVaildLpnCount"
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-	.string	"FlashTestBlk"
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-	.string	"__builtin_strcpy"
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-	.string	"g_gc_bad_block_gc_index"
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-	.string	"p_free_data_block_list_head"
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-	.string	"pBlkVpcTbl"
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-	.string	"high"
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-	.string	"is_sys_blk"
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-	.string	"p_vendor_region_ppn_table"
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-	.string	"load_l2p_region"
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-	.string	"flush_l2p_region"
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-	.string	"panic_blink"
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-	.string	"num_free_node"
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-	.string	"block_size"
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-	.string	"pvForm"
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-	.string	"c_ftl_vendor_part_size"
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-	.string	"pTmp"
-.LASF386:
-	.string	"FtlGcMarkBadPhyBlk"
-.LASF110:
-	.string	"ftl_bbt_blk_header"
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-	.string	"ftl_scan_all_data"
-.LASF348:
-	.string	"spare"
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-	.string	"INSERT_FREE_LIST"
-.LASF51:
-	.string	"hex_asc"
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-	.string	"signed char"
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-	.string	"g_totle_read_sector"
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-	.string	"nand_req"
-.LASF259:
-	.string	"p_vendor_block_ver_table"
-.LASF319:
-	.string	"gNandPhyInfo"
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-	.string	"FtlL2PDataInit"
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-	.string	"action"
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-	.string	"superblock_id"
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-	.string	"g_gc_head_data_block"
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-	.string	"system_state"
-.LASF616:
-	.string	"FtlRead"
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-	.string	"g_num_free_superblocks"
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-	.string	"pBbtHeader"
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-	.string	"unsigned char"
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-	.string	"pvTo"
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-	.string	"early_boot_irqs_disabled"
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-	.string	"c_ftl_nand_vendor_region_num"
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-	.string	"next_free_active_plane"
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-	.string	"FtlVendorPartWrite"
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-	.string	"SYSTEM_BOOTING"
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-	.string	"regionId"
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-	.string	"start_lpa"
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-	.string	"g_in_gc_progress"
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-	.string	"__con_initcall_start"
-.LASF80:
-	.string	"read_page"
-.LASF280:
-	.string	"g_gc_blk_num"
-.LASF428:
-	.string	"GetSwlReplaceBlock"
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-	.string	"ftl_sys_info"
-.LASF155:
-	.string	"refresh_start_lpa"
-.LASF456:
-	.string	"FtlPowerLostRecovery"
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-	.string	"insert_free_list"
-.LASF12:
-	.string	"_Bool"
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-	.string	"FtlRecoverySuperblock"
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-	.string	"linux_proc_banner"
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-	.string	"get_new_id"
-.LASF313:
-	.string	"g_cur_erase_blk"
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-	.string	"table"
-.LASF162:
-	.string	"value"
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-	.string	"gSysInfo"
-.LASF371:
-	.string	"gc_page_num"
-.LASF346:
-	.string	"FlashGetBadBlockList"
-.LASF86:
-	.string	"BbtMap"
-.LASF2:
-	.string	"char"
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-	.string	"FtlSysBlkNumInit"
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-	.string	"memset"
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-	.string	"TotleReadBufferCount1"
-.LASF157:
-	.string	"totle_read_sector"
-.LASF327:
-	.string	"TotleReadBufferCount3"
-.LASF623:
-	.string	"FtlSysFlush"
-.LASF254:
-	.string	"p_map_block_ver_table"
-.LASF128:
-	.string	"bufferPageOffset"
-.LASF521:
-	.string	"l2p_region_id"
-.LASF407:
-	.string	"FtlGcUpdatePage"
-.LASF433:
-	.string	"maxFreeBlockEraseCount"
-.LASF638:
-	.string	"re_test_next_page"
-.LASF39:
-	.string	"panic_on_io_nmi"
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-	.string	"allocate_data_superblock"
-.LASF572:
-	.string	"FtlFreeSysBlkQueueIn"
-.LASF488:
-	.string	"pMapBlkHeader"
-.LASF68:
-	.string	"blk_per_die"
-.LASF326:
-	.string	"TotleReadBufferCount2"
-.LASF374:
-	.string	"num_io"
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-	.string	"pagePreBlk"
-.LASF126:
-	.string	"activePageOffset"
-.LASF74:
-	.string	"reserved_blk"
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-	.string	"FtlLoadMapInfo"
-.LASF362:
-	.string	"block_index"
-.LASF647:
-	.string	"FtlPrintInfo"
-.LASF477:
-	.string	"FtlReUsePrevPpa"
-.LASF247:
-	.string	"p_swl_mul_table"
-.LASF561:
-	.string	"insert_data_list"
-.LASF641:
-	.string	"FtlVariablesInit"
-.LASF265:
-	.string	"p_data_block_list_table"
-.LASF509:
-	.string	"ec_mod_count"
-.LASF432:
-	.string	"pNode"
-.LASF301:
-	.string	"g_totle_mlc_erase_count"
-.LASF581:
-	.string	"ftl_cmp_data_ver"
-.LASF273:
-	.string	"g_gc_temp_superblock"
-.LASF258:
-	.string	"p_vendor_block_valid_page_count"
-.LASF496:
-	.string	"FtlScanSysBlk"
-.LASF663:
-	.string	"l2p_addr_tran"
-.LASF306:
-	.string	"g_max_erase_count"
-.LASF207:
-	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF179:
-	.string	"ftl_gc_page_buffer"
-.LASF230:
-	.string	"g_req_cache"
-.LASF644:
-	.string	"FtlConstantsInit"
-.LASF448:
-	.string	"pages"
-.LASF417:
-	.string	"update_vpc_list"
-.LASF656:
-	.string	"rknand_print_hex"
-.LASF405:
-	.string	"p_gc_page"
-.LASF650:
-	.string	"limit"
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-	.string	"Ftl_get_new_temp_ppa"
-.LASF133:
-	.string	"PowerLostTimes"
-.LASF569:
-	.string	"blk_Id"
-.LASF290:
-	.string	"g_gc_merge_free_blk_threshold"
-.LASF35:
-	.string	"oops_in_progress"
-.LASF429:
-	.string	"node_id"
-.LASF131:
-	.string	"cache_write_count"
-.LASF256:
-	.string	"g_totle_map_block"
-.LASF655:
-	.string	"printk"
-.LASF543:
-	.string	"phyAddr"
-.LASF183:
-	.string	"c_ftl_nand_planes_per_die"
-.LASF486:
-	.string	"ppnTbl"
-.LASF372:
-	.string	"gc_blk"
-.LASF481:
-	.string	"FtlLoadVonderInfo"
-.LASF551:
-	.string	"List_get_gc_head_node"
-.LASF500:
-	.string	"pSysHeader"
-.LASF177:
-	.string	"scr_ppa"
-.LASF206:
-	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF571:
-	.string	"FtlFreeSysBLkSort"
-.LASF263:
-	.string	"p_l2p_map_buf"
-.LASF639:
-	.string	"IsBlkInVendorPart"
-.LASF595:
-	.string	"FtlBbtMemInit"
-.LASF241:
-	.string	"gp_gc_page_buf_info"
-.LASF164:
-	.string	"front"
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-	.string	"p_sys_data_buf"
-.LASF90:
-	.string	"index"
-.LASF535:
-	.string	"lastMapBlk"
-.LASF620:
-	.string	"last_lpa_nscts"
-.LASF298:
-	.string	"g_tmp_data_superblock_id"
-.LASF244:
-	.string	"gp_ect_tbl_info"
-.LASF651:
-	.string	"rknand_proc_ftlread"
-.LASF539:
-	.string	"ftl_free_no_use_map_blk"
-.LASF661:
-	.string	"/home/ldq/rk-linux/kernel-debug"
-.LASF32:
-	.string	"atomic_notifier_head"
-.LASF381:
-	.string	"FtlReadRefresh"
-.LASF184:
-	.string	"c_ftl_nand_blks_per_die"
-.LASF562:
-	.string	"node_data_count"
-.LASF597:
-	.string	"write_count"
-.LASF238:
-	.string	"p_io_spare_buf"
-.LASF476:
-	.string	"current_ppa_ver"
-.LASF0:
-	.string	"long unsigned int"
-.LASF170:
-	.string	"num_planes"
-.LASF118:
-	.string	"res32_0"
-.LASF119:
-	.string	"res32_1"
-.LASF430:
-	.string	"min_ec_id"
-.LASF356:
-	.string	"check"
-.LASF26:
-	.string	"console_printk"
-.LASF666:
-	.string	"strcpy"
-.LASF58:
-	.string	"status"
-.LASF65:
-	.string	"die_num"
-.LASF624:
-	.string	"sftl_init"
-.LASF289:
-	.string	"g_gc_free_blk_threshold"
-.LASF29:
-	.string	"kptr_restrict"
-.LASF590:
-	.string	"FtlLoadFactoryBbt"
-.LASF404:
-	.string	"scan_page_num"
-.LASF146:
-	.string	"min_erase_count"
-.LASF182:
-	.string	"c_ftl_nand_die_num"
-.LASF303:
-	.string	"g_min_erase_count"
-.LASF478:
-	.string	"ftl_sb_update_avl_pages"
-.LASF102:
-	.string	"region_id"
-.LASF627:
-	.string	"ftl_low_format"
-.LASF339:
-	.string	"str2"
-.LASF92:
-	.string	"maxRegion"
-.LASF322:
-	.string	"ftl_temp_buf"
-.LASF158:
-	.string	"progErrorCount"
-.LASF520:
-	.string	"ram_region_id"
-.LASF332:
-	.string	"check_vpc_table"
-.LASF450:
-	.string	"FtlGcPageRecovery"
-.LASF27:
-	.string	"printk_delay_msec"
-.LASF490:
-	.string	"ftl_get_blk_mode"
-.LASF24:
-	.string	"linux_banner"
-.LASF658:
-	.string	"sprintf"
-.LASF105:
-	.string	"ftl_ect_tbl_info"
-.LASF537:
-	.string	"ftl_map_blk_alloc_new_blk"
-.LASF510:
-	.string	"FtlVendorPartRead"
-.LASF607:
-	.string	"FtlWrite"
-.LASF71:
-	.string	"sec_per_page"
-.LASF67:
-	.string	"blk_per_plane"
-.LASF398:
-	.string	"ReInit"
-.LASF515:
-	.string	"result"
-.LASF96:
-	.string	"pBlkVerTbl"
-.LASF447:
-	.string	"req_temp"
-.LASF114:
-	.string	"lastPpa"
-.LASF318:
-	.string	"g_power_lost_recovery_flag"
-.LASF599:
-	.string	"FtlBbt2Bitmap"
-.LASF69:
-	.string	"page_per_blk"
-.LASF469:
-	.string	"recovery_super_page"
-.LASF309:
-	.string	"g_ftl_nand_free_count"
-.LASF364:
-	.string	"die_index"
-.LASF412:
-	.string	"numREQ"
-.LASF75:
-	.string	"ecc_bits"
-.LASF629:
-	.string	"sys_bad_block_cnt"
-.LASF192:
-	.string	"c_ftl_nand_page_pre_super_blk"
-.LASF174:
-	.string	"reversed"
-.LASF399:
-	.string	"read_super_page"
-.LASF36:
-	.string	"panic_timeout"
-.LASF124:
-	.string	"gcTempFlashMode"
-.LASF292:
-	.string	"g_totle_gc_page_count"
-.LASF234:
-	.string	"p_vendor_data_buf"
-.LASF596:
-	.string	"FtlBbmTblFlush"
-.LASF564:
-	.string	"tmp_multiplier_value"
-.LASF403:
-	.string	"lookup_ppa"
-.LASF8:
-	.string	"long long int"
-.LASF302:
-	.string	"g_totle_avg_erase_count"
-.LASF212:
-	.string	"ftl_gc_temp_power_lost_recovery_flag"
-.LASF548:
-	.string	"prev_valid_page_count"
-.LASF384:
-	.string	"FtlGcFreeBadSuperBlk"
-.LASF219:
-	.string	"gBbtInfo"
-.LASF223:
-	.string	"gVendorBlkInfo"
-.LASF419:
-	.string	"p_superblock"
-.LASF267:
-	.string	"p_data_block_list_head"
-.LASF472:
-	.string	"last_page_version"
-.LASF228:
-	.string	"req_gc"
-.LASF606:
-	.string	"FtlDiscard"
-.LASF33:
-	.string	"panic_notifier_list"
-.LASF284:
-	.string	"g_gc_next_blk"
-.LASF383:
-	.string	"add_count"
-.LASF151:
-	.string	"inkDie_write_and_check_en"
-.LASF577:
-	.string	"FtlGetLastWrittenPage"
-.LASF462:
-	.string	"detected_active_page"
-.LASF506:
-	.string	"FtlUpdateVaildLpn"
-.LASF20:
-	.string	"reset_devices"
-.LASF154:
-	.string	"refresh_enable_mode"
-.LASF602:
-	.string	"FtlBbmIsBadBlock"
-.LASF23:
-	.string	"__icache_flags"
-.LASF388:
-	.string	"FtlGcRefreshBlock"
-.LASF85:
-	.string	"fBbtBlk"
-.LASF533:
-	.string	"blkTbl"
-.LASF377:
-	.string	"p_dataHeader"
-.LASF459:
-	.string	"saved_active_plane"
-.LASF123:
-	.string	"bufferFlashMode"
-.LASF111:
-	.string	"count"
-.LASF130:
-	.string	"gcTempPageOffset"
-.LASF353:
-	.string	"addr"
-.LASF136:
-	.string	"GlobalSysVersion"
-.LASF408:
-	.string	"src_ppa"
-.LASF554:
-	.string	"List_pop_index_node"
-.LASF270:
-	.string	"g_num_data_superblocks"
-.LASF444:
-	.string	"error_flag"
-.LASF660:
-	.string	"drivers/rkflash/rksftl/rk_sftl.c"
-.LASF308:
-	.string	"g_in_swl_replace"
-.LASF166:
-	.string	"ftl_superblock_info"
-.LASF3:
-	.string	"unsigned int"
-.LASF95:
-	.string	"pBlkTbl"
-.LASF165:
-	.string	"rear"
-.LASF189:
-	.string	"c_ftl_nand_bbm_buf_size"
-.LASF216:
-	.string	"g_MaxLpn"
-.LASF538:
-	.string	"blk_index"
-.LASF453:
-	.string	"num_data_node"
-.LASF47:
-	.string	"SYSTEM_HALT"
-.LASF288:
-	.string	"g_gc_bad_block_temp_tbl"
-.LASF30:
-	.string	"kmsg_fops"
-.LASF565:
-	.string	"INSERT_DATA_LIST"
-.LASF611:
-	.string	"sctidx"
-.LASF387:
-	.string	"superBlk"
-.LASF180:
-	.string	"flag"
-.LASF281:
-	.string	"g_gc_page_offset"
-.LASF637:
-	.string	"test_mode"
-.LASF296:
-	.string	"g_totle_discard_page_count"
-.LASF214:
-	.string	"g_GlobalDataVersion"
-.LASF648:
-	.string	"debug_flag"
-.LASF324:
-	.string	"gFtlInitStatus"
-.LASF527:
-	.string	"hit_count"
-.LASF79:
-	.string	"prog_page"
-.LASF127:
-	.string	"bufferSuperblockId"
-.LASF489:
-	.string	"FtlLoadSysInfo"
-.LASF152:
-	.string	"readErrorCount"
-.LASF169:
-	.string	"current_plane"
-.LASF396:
-	.string	"page_count"
-.LASF274:
-	.string	"g_gc_superblock"
-.LASF271:
-	.string	"g_active_superblock"
-.LASF514:
-	.string	"offset"
-.LASF249:
-	.string	"p_valid_page_count_table"
-.LASF194:
-	.string	"c_ftl_nand_sec_pre_page_shift"
-.LASF22:
-	.string	"initcall_debug"
-.LASF389:
-	.string	"block"
-.LASF349:
-	.string	"FlashEraseBlocks"
-.LASF82:
-	.string	"page"
-.LASF410:
-	.string	"IsBlkInGcList"
-.LASF338:
-	.string	"str1"
-.LASF64:
-	.string	"nand_type"
-.LASF612:
-	.string	"nscts"
-.LASF101:
-	.string	"ftl_l2p_ram_map_info"
-.LASF294:
-	.string	"g_totle_write_sector"
-.LASF443:
-	.string	"prev_ppa"
-.LASF77:
-	.string	"get_bad_blk_list"
-.LASF293:
-	.string	"g_totle_write_page_count"
-.LASF642:
-	.string	"FtlMemInit"
-.LASF300:
-	.string	"g_totle_l2p_write_count"
-.LASF585:
-	.string	"P2V_plane"
-.LASF11:
-	.string	"bool"
-.LASF253:
-	.string	"p_map_block_valid_page_count"
-.LASF336:
-	.string	"check_buf"
-.LASF558:
-	.string	"node_erase_count"
-.LASF552:
-	.string	"List_pop_head_node"
-.LASF142:
-	.string	"slc_erase_count"
-.LASF541:
-	.string	"minValidPageCount"
-.LASF640:
-	.string	"ven_blk"
-.LASF190:
-	.string	"c_ftl_nand_page_pre_blk"
-.LASF104:
-	.string	"L2PMap"
-.LASF344:
-	.string	"size"
-.LASF544:
-	.string	"List_update_data_list"
-.LASF305:
-	.string	"g_totle_sys_slc_erase_count"
-.LASF121:
-	.string	"maxDieNum"
-.LASF243:
-	.string	"g_gc_num_req"
-.LASF88:
-	.string	"maxLogicBlk"
-.LASF147:
-	.string	"totle_power_on_run_times"
-.LASF518:
-	.string	"log2phys"
-.LASF466:
-	.string	"detected_error_page"
-.LASF579:
-	.string	"spareBuf"
-.LASF185:
-	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF137:
-	.string	"ftl_sys_ext_info"
-.LASF262:
-	.string	"p_l2p_ram_map"
-.LASF94:
-	.string	"maxBlkNum"
-.LASF657:
-	.string	"ftl_malloc"
-.LASF441:
-	.string	"pDataHeader"
-.LASF167:
-	.string	"current_page"
-.LASF78:
-	.string	"erase_blk"
-.LASF452:
-	.string	"SupperBlkListInit"
-.LASF630:
-	.string	"create_first_active_superblock"
-.LASF163:
-	.string	"sys_blk_queue"
-.LASF31:
-	.string	"file_operations"
-.LASF355:
-	.string	"FlashProgPages"
-.LASF516:
-	.string	"ppn_index"
-.LASF9:
-	.string	"long long unsigned int"
-.LASF217:
-	.string	"g_VaildLpn"
-.LASF246:
-	.string	"p_erase_count_table"
-.LASF525:
-	.string	"select_l2p_ram_region"
-.LASF435:
-	.string	"GetFreeBlockMaxEraseCount"
-.LASF549:
-	.string	"prev_multiplier_value"
-.LASF17:
-	.string	"__security_initcall_end"
-.LASF37:
-	.string	"panic_on_oops"
-.LASF264:
-	.string	"g_l2p_last_update_region_id"
-.LASF198:
-	.string	"c_ftl_nand_totle_phy_blks"
-.LASF632:
-	.string	"FtlLowFormatEraseBlock"
-.LASF73:
-	.string	"byte_per_sec"
-.LASF178:
-	.string	"des_ppa"
-.LASF252:
-	.string	"p_map_block_table"
-.LASF545:
-	.string	"prev_node_id"
-.LASF240:
-	.string	"p_gc_data_buf"
-.LASF529:
-	.string	"FtlMapWritePage"
-.LASF251:
-	.string	"p_blk_mode_table"
-.LASF282:
-	.string	"g_gc_cur_blk_valid_pages"
-.LASF575:
-	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF191:
-	.string	"c_ftl_nand_page_pre_slc_blk"
-.LASF512:
-	.string	"nSec"
-.LASF593:
-	.string	"FtlBbtCalcTotleCnt"
-.LASF193:
-	.string	"c_ftl_nand_sec_pre_page"
-.LASF492:
-	.string	"FtlSlcSuperblockCheck"
-.LASF582:
-	.string	"ver1"
-.LASF150:
-	.string	"SlcPartLbaEndSector"
-.LASF203:
-	.string	"c_ftl_nand_max_map_blks"
-.LASF494:
-	.string	"FtlGcReFreshBadBlk"
-.LASF473:
-	.string	"last_mlc_page_version"
-.LASF505:
-	.string	"FtlMapBlkWriteDump_data"
-.LASF245:
-	.string	"g_ect_tbl_info_size"
-.LASF107:
-	.string	"totleEc"
-.LASF437:
-	.string	"GetFreeBlockMinEraseCount"
-.LASF434:
-	.string	"minDataBlockEraseCount"
-.LASF48:
-	.string	"SYSTEM_POWER_OFF"
-.LASF215:
-	.string	"g_MaxLbaSector"
-.LASF84:
-	.string	"version"
-.LASF28:
-	.string	"dmesg_restrict"
-.LASF461:
-	.string	"next_free_active_page"
-.LASF129:
-	.string	"gcTempSuperblockId"
-.LASF619:
-	.string	"first_lpa_nscts"
-.LASF299:
-	.string	"g_totle_cache_write_count"
-.LASF493:
-	.string	"ftl_set_blk_mode"
-.LASF449:
-	.string	"Ftl_load_ext_data"
-.LASF503:
-	.string	"FtlWriteDump_data"
-.LASF634:
-	.string	"max_test_page_num"
-.LASF390:
-	.string	"Ftl_gc_temp_data_write_back"
-.LASF365:
-	.string	"block_in_die"
-.LASF415:
-	.string	"FtlGcBufInit"
-.LASF231:
-	.string	"p_plane_order_table"
-.LASF98:
-	.string	"pMapPpnTbl"
-.LASF427:
-	.string	"free_data_superblock"
-.LASF143:
-	.string	"sys_slc_erase_count"
-.LASF204:
-	.string	"c_ftl_nand_max_vendor_blks"
-.LASF375:
-	.string	"physical_block"
-.LASF445:
-	.string	"FtlVpcCheckAndModify"
-.LASF276:
-	.string	"g_sys_save_data"
-.LASF81:
-	.string	"ftl_bbt_info"
-.LASF425:
-	.string	"free_blk_index"
-.LASF250:
-	.string	"p_valid_page_count_check_table"
-.LASF209:
-	.string	"c_ftl_nand_data_blks_per_plane"
-.LASF368:
-	.string	"rk_ftl_garbage_collect"
-.LASF653:
-	.string	"memcmp"
-.LASF370:
-	.string	"numPages"
-.LASF311:
-	.string	"g_gc_head_data_block_count"
-.LASF255:
-	.string	"p_map_region_ppn_table"
-.LASF524:
-	.string	"l2p_flush"
-.LASF455:
-	.string	"make_superblock"
-.LASF15:
-	.string	"__con_initcall_end"
-.LASF628:
-	.string	"bad_block_cnt"
-.LASF547:
-	.string	"node_multiplier_value"
-.LASF330:
-	.string	"g_ect_tbl_power_up_flush"
-.LASF316:
-	.string	"g_recovery_ppa_tbl"
-.LASF523:
-	.string	"found_lpa"
-.LASF277:
-	.string	"g_sys_ext_data"
-.LASF351:
-	.string	"flash_type"
-.LASF413:
-	.string	"req_num"
-.LASF568:
-	.string	"remalloc"
-.LASF508:
-	.string	"forceFlush"
-.LASF53:
-	.string	"uint8"
-.LASF329:
-	.string	"power_up_flag"
-.LASF279:
-	.string	"p_gc_blk_tbl"
-.LASF411:
-	.string	"FtlGcBufAlloc"
-.LASF188:
-	.string	"c_ftl_nand_ext_blk_pre_plane"
-.LASF376:
-	.string	"max_gc_page_num"
-.LASF195:
-	.string	"c_ftl_nand_byte_pre_page"
-.LASF438:
-	.string	"update_multiplier_value"
-.LASF615:
-	.string	"flashType"
-.LASF6:
-	.string	"short int"
-.LASF239:
-	.string	"p_gc_spare_buf"
-.LASF491:
-	.string	"sblk"
-.LASF369:
-	.string	"mode"
-.LASF423:
-	.string	"new_id"
-.LASF625:
-	.string	"pNand"
-.LASF46:
-	.string	"SYSTEM_RUNNING"
-.LASF513:
-	.string	"pBuf"
-.LASF139:
-	.string	"write_page_count"
-.LASF600:
-	.string	"bitmap"
-.LASF197:
-	.string	"c_ftl_nand_reserved_blks"
-.LASF664:
-	.string	"sftl_get_density"
-.LASF636:
-	.string	"test_page_step"
-.LASF591:
-	.string	"blkAddr"
-.LASF283:
-	.string	"g_gc_cur_blk_max_valid_pages"
-.LASF285:
-	.string	"g_gc_next_blk_1"
-.LASF526:
-	.string	"target_region"
-.LASF609:
-	.string	"end_lpa"
-.LASF470:
-	.string	"scan_completed"
-.LASF652:
-	.string	"FtlPrintInfo2buf"
-.LASF361:
-	.string	"p_die"
-.LASF236:
-	.string	"p_io_data_buf_0"
-.LASF237:
-	.string	"p_io_data_buf_1"
-.LASF134:
-	.string	"mlc_erase_count"
-.LASF175:
-	.string	"phyBlk"
-.LASF622:
-	.string	"sftl_deinit"
-.LASF483:
-	.string	"pMapBlockInfo"
-.LASF148:
-	.string	"last_refresh_data_times"
-.LASF662:
-	.string	"system_states"
-.LASF156:
-	.string	"totle_write_sector"
-.LASF226:
-	.string	"req_prgm"
-.LASF587:
-	.string	"FtlMakeBbt"
-.LASF99:
-	.string	"in_gc_mode"
-.LASF431:
-	.string	"min_ec"
-.LASF57:
-	.string	"int16"
-.LASF278:
-	.string	"p_gc_page_info"
-.LASF208:
-	.string	"c_ftl_nand_max_sys_blks"
-.LASF436:
-	.string	"max_ec"
-.LASF235:
-	.string	"p_sys_spare_buf"
-.LASF665:
-	.string	"memcpy"
-.LASF501:
-	.string	"prog_error_count"
-.LASF333:
-	.string	"gc_discard_updated"
-.LASF409:
-	.string	"prev_superblock_id"
-.LASF635:
-	.string	"test_page_num"
-.LASF153:
-	.string	"last_refresh_read_count"
-.LASF475:
-	.string	"lookup_ppa_ver"
-.LASF487:
-	.string	"totleBlkNum"
-.LASF605:
-	.string	"sftl_read"
-.LASF574:
-	.string	"FtlFreeSysBlkQueueFull"
-.LASF406:
-	.string	"FtlGcPageVarInit"
-.LASF109:
-	.string	"padding"
-.LASF171:
-	.string	"flash_mode"
-.LASF465:
-	.string	"recovery_cur_page_ver"
-.LASF534:
-	.string	"ftl_map_blk_gc"
-.LASF604:
-	.string	"sftl_write"
-.LASF115:
-	.string	"ftl_map_blk_header"
-.LASF576:
-	.string	"FtlFreeSysBlkQueueInit"
-.LASF21:
-	.string	"late_time_init"
-.LASF643:
-	.string	"mem_size"
-.LASF482:
-	.string	"FtlMapTblRecovery"
-.LASF420:
-	.string	"new_ppa"
-.LASF424:
-	.string	"num_bad_block"
-.LASF522:
-	.string	"lpn_index"
-.LASF200:
-	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF659:
-	.ascii	"GNU C89 6.3.1 20170404 -mlittle-endian -mgeneral-regs-only -"
-	.ascii	"mpc-relative-literal-loads -march=armv8-a -mabi=lp64 -g -Os "
-	.ascii	"-std=gnu90 -fno-strict-aliasing -fno-common -fno-pic -fno-as"
-	.ascii	"ynchronous-unwind-tables -fno-dele"
-	.string	"te-null-pointer-checks -fno-stack-protector -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-var-tracking-assignments -fno-strict-overflow -fno-merge-all-constants -fmerge-constants -fstack-check=no -fconserve-stack --param allow-store-data-races=0"
-.LASF621:
-	.string	"sector"
-.LASF504:
-	.string	"num_page"
-.LASF614:
-	.string	"FtlProgPages"
-.LASF414:
-	.string	"FtlGcBufFree"
-.LASF268:
-	.string	"p_data_block_list_tail"
-.LASF395:
-	.string	"current_ppa"
-.LASF61:
-	.string	"p_spare"
-.LASF380:
-	.string	"tmp_blk"
-.LASF291:
-	.string	"g_gc_blk_index"
-.LASF497:
-	.string	"block_in_plane"
-.LASF108:
-	.string	"lastEc"
-.LASF360:
-	.string	"PhyBlk"
-.LASF103:
-	.string	"reserved"
-.LASF314:
-	.string	"g_recovery_page_num"
-.LASF546:
-	.string	"node_valid_page_count"
-.LASF176:
-	.string	"ftl_gc_page_item"
-.LASF140:
-	.string	"read_page_count"
-.LASF416:
-	.string	"decrement_vpc_count"
-.LASF7:
-	.string	"short unsigned int"
-.LASF536:
-	.string	"minValidPageIndex"
-.LASF328:
-	.string	"TotleReadBufferMatchCount"
-.LASF337:
-	.string	"check_spare_buf"
-.LASF312:
-	.string	"g_gc_skip_write_count"
-.LASF56:
-	.string	"int32"
-.LASF70:
-	.string	"page_per_slc_blk"
-.LASF315:
-	.string	"g_recovery_page_min_ver"
-.LASF224:
-	.string	"req_sys"
-.LASF159:
-	.string	"List_Node"
-.LASF649:
-	.string	"Ftl_log2"
-.LASF149:
-	.string	"all_blk_used_slc_mode"
-.LASF393:
-	.string	"pSuperblock"
-.LASF471:
-	.string	"function_exit"
-.LASF202:
-	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF13:
-	.string	"initcall_t"
-.LASF586:
-	.string	"V2P_block"
-.LASF112:
-	.string	"sysBlksPerPlane"
-.LASF451:
-	.string	"Ftl_save_ext_data"
-.LASF613:
-	.string	"FtlCacheWriteBack"
-.LASF76:
-	.string	"nand_ops"
-.LASF626:
-	.string	"load_bbt"
-.LASF646:
-	.string	"blkNum"
-.LASF363:
-	.string	"page_index"
-.LASF499:
-	.string	"FtlVpcTblFlush"
-.LASF106:
-	.string	"hash"
-.LASF570:
-	.string	"IsInFreeQueue"
-.LASF468:
-	.string	"read_super_page_end"
-.LASF352:
-	.string	"num_req"
-.LASF317:
-	.string	"c_mlc_erase_count_value"
-.LASF550:
-	.string	"pPrev"
-.LASF135:
-	.string	"GlobalDataVersion"
-.LASF38:
-	.string	"panic_on_unrecovered_nmi"
-.LASF160:
-	.string	"next"
-.LASF125:
-	.string	"activeSuperblockId"
-.LASF373:
-	.string	"plane"
-.LASF40:
-	.string	"panic_on_warn"
-.LASF89:
-	.string	"ftl_l2p_map_info"
-.LASF161:
-	.string	"prev"
-.LASF54:
-	.string	"uint16"
-.LASF345:
-	.string	"ftl_memset"
-.LASF531:
-	.string	"Ftl_write_map_blk_to_last_page"
-.LASF42:
-	.string	"crash_kexec_post_notifiers"
-.LASF286:
-	.string	"g_gc_bad_block_temp_num"
-.LASF120:
-	.string	"ftl_sys_save_info"
-.LASF275:
-	.string	"gp_last_act_superblock"
-.LASF573:
-	.string	"erase_flag"
-.LASF484:
-	.string	"blk_id"
-.LASF173:
-	.string	"dump_writed"
-.LASF334:
-	.string	"ftl_gc_temp_block_bops_scan_page_addr"
+.LC106:
+	.string	"\0013vendor storage %x,%x,%x\n"
+.LC107:
+	.string	"vendor_storage"
\ No newline at end of file
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
index 7f9a03d920e80..35722fc0ab130 100644
--- a/drivers/rkflash/rkflash_api.h
+++ b/drivers/rkflash/rkflash_api.h
@@ -10,6 +10,8 @@ int sftl_flash_init(void __iomem *reg_addr);
 void sftl_flash_read_id(u8 chip_sel, void *buf);
 int sftl_flash_read(unsigned int sec, unsigned int n_sec, void *p_data);
 int sftl_flash_write(unsigned int sec, unsigned int n_sec, void *p_data);
+int sftl_flash_vendor_read(unsigned int sec, unsigned int n_sec, void *p_data);
+int sftl_flash_vendor_write(unsigned int sec, unsigned int n_sec, void *p_data);
 unsigned int sftl_flash_get_capacity(void);
 void sftl_flash_deinit(void);
 int sftl_flash_resume(void __iomem *reg_addr);
@@ -32,6 +34,8 @@ int snor_vendor_write(unsigned int sec, unsigned int n_sec, void *p_data);
 int snand_init(void __iomem *reg_addr);
 int snand_read(unsigned int sec, unsigned int n_sec, void *p_data);
 int snand_write(unsigned int sec, unsigned int n_sec, void *p_data);
+int snand_vendor_read(unsigned int sec, unsigned int n_sec, void *p_data);
+int snand_vendor_write(unsigned int sec, unsigned int n_sec, void *p_data);
 unsigned int snand_get_capacity(void);
 void snand_deinit(void);
 int snand_resume(void __iomem *reg_addr);
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index ce107c6a31859..16bc33826aa02 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -25,9 +25,11 @@
 #include <linux/timer.h>
 #include <linux/wait.h>
 #include <linux/version.h>
+#include <linux/soc/rockchip/rk_vendor_storage.h>
 
 #include "rkflash_api.h"
 #include "rkflash_blk.h"
+#include "rk_sftl.h"
 
 #include "../soc/rockchip/flash_vendor_storage.h"
 
@@ -40,8 +42,8 @@ static struct flash_boot_ops nandc_nand_ops = {
 	sftl_flash_get_capacity,
 	sftl_flash_deinit,
 	sftl_flash_resume,
-	sftl_flash_read,
-	sftl_flash_write,
+	sftl_flash_vendor_read,
+	sftl_flash_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -72,8 +74,8 @@ static struct flash_boot_ops sfc_nand_ops = {
 	snand_get_capacity,
 	snand_deinit,
 	snand_resume,
-	snand_read,
-	snand_write,
+	snand_vendor_read,
+	snand_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -106,7 +108,7 @@ static char *mtd_read_temp_buffer;
 #define MTD_RW_SECTORS (512)
 static DEFINE_MUTEX(g_flash_ops_mutex);
 
-static int vendor_read(u32 sec, u32 n_sec, void *p_data)
+int rkflash_vendor_read(u32 sec, u32 n_sec, void *p_data)
 {
 	int ret;
 
@@ -121,7 +123,7 @@ static int vendor_read(u32 sec, u32 n_sec, void *p_data)
 	return ret;
 }
 
-static int vendor_write(u32 sec, u32 n_sec, void *p_data)
+int rkflash_vendor_write(u32 sec, u32 n_sec, void *p_data)
 {
 	int ret;
 
@@ -679,8 +681,23 @@ int rkflash_dev_init(void __iomem *reg_addr, enum flash_con_type con_type)
 	pr_info("rkflash[%d] init success\n", tmp_id);
 	g_flash_type = tmp_id;
 	mytr.quit = 1;
-	flash_vendor_dev_ops_register(&vendor_read,
-				      &vendor_write);
+	if (g_flash_type == FLASH_TYPE_SFC_NOR) {
+		flash_vendor_dev_ops_register(rkflash_vendor_read,
+					      rkflash_vendor_write);
+	} else {
+#if defined(CONFIG_RK_NANDC_NAND) || defined(CONFIG_RK_SFC_NAND)
+		rk_sftl_vendor_dev_ops_register(rkflash_vendor_read,
+						rkflash_vendor_write);
+		ret = rk_sftl_vendor_storage_init();
+		if (!ret) {
+			rk_vendor_register(sftl_vendor_read, sftl_vendor_write);
+			rk_sftl_vendor_register();
+			pr_info("rkflashd vendor storage init ok !\n");
+		} else {
+			pr_info("rkflash vendor storage init failed !\n");
+		}
+#endif
+	}
 #ifdef CONFIG_RK_SFC_NOR_MTD
 	if (g_flash_type == FLASH_TYPE_SFC_NOR) {
 		pr_info("sfc_nor flash registered as a mtd device\n");
diff --git a/drivers/rkflash/rkflash_blk.h b/drivers/rkflash/rkflash_blk.h
index 7735910ec2f28..90de34f7581ee 100644
--- a/drivers/rkflash/rkflash_blk.h
+++ b/drivers/rkflash/rkflash_blk.h
@@ -123,4 +123,7 @@ void rkflash_dev_shutdown(void);
 void rkflash_dev_flush(void);
 int rkflash_dev_init(void __iomem *reg_addr, enum flash_con_type type);
 int rkflash_dev_exit(void);
+int rkflash_vendor_read(u32 sec, u32 n_sec, void *p_data);
+int rkflash_vendor_write(u32 sec, u32 n_sec, void *p_data);
+
 #endif
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 8d8e7d6e3b20c..e49d73f6c0fd0 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -2,15 +2,6 @@
 
 /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
 
-#include <linux/kernel.h>
-
 #include "rkflash_debug.h"
-#include "sfc_nor.h"
-#include "typedef.h"
-
-void rknand_print_hex(char *s, void *buf, int width, int len)
-{
-	print_hex_dump(KERN_WARNING, s, DUMP_PREFIX_OFFSET,
-		       16, width, buf, len * width, 0);
-}
 
+unsigned int rkflash_debug = PRINT_BIT_SFC | PRINT_BIT_NANDC;
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
index 4ae471834b308..6f41f530eb7bc 100644
--- a/drivers/rkflash/rkflash_debug.h
+++ b/drivers/rkflash/rkflash_debug.h
@@ -5,65 +5,91 @@
 #ifndef _RKFLASH_DEBUG_H
 #define _RKFLASH_DEBUG_H
 
+#include <linux/kernel.h>
+
 /*
- * Test switch
+ * Debug control center
+ * 1. Set Printing-adding-macro to 1 to allow print code being compiled in.
+ * 2. Set variable 'rkflash_debug' to control debug print to enable print.
  */
-#define BLK_STRESS_TEST_EN	0
 
 /*
- * Print switch, set to 1 if needed
- * I - info
- * E - error
- * HEX - multiline print
+ * Printing-adding
  */
+extern unsigned int rkflash_debug;
 
-#define	PRINT_SWI_SFC_I		0
+#define	PRINT_SWI_SFC_I		1
 #define	PRINT_SWI_SFC_E		1
 #define PRINT_SWI_SFC_HEX	1
 
-#define	PRINT_SWI_NANDC_I	0
+#define	PRINT_SWI_NANDC_I	1
 #define	PRINT_SWI_NANDC_E	1
 #define PRINT_SWI_NANDC_HEX	1
 
+/*
+ * Print switch, set var rkflash_debug corresponding bit to
+ * 1 if needed.
+ * I - info
+ * E - error
+ * HEX - multiline print
+ */
+#define	PRINT_BIT_SFC_I		BIT(0)
+#define	PRINT_BIT_SFC_E		BIT(1)
+#define PRINT_BIT_SFC_HEX	BIT(2)
+#define	PRINT_BIT_SFC\
+		(PRINT_BIT_SFC_I | PRINT_BIT_SFC_E | PRINT_BIT_SFC_HEX)
+
+#define	PRINT_BIT_NANDC_I	BIT(4)
+#define	PRINT_BIT_NANDC_E	BIT(5)
+#define PRINT_BIT_NANDC_HEX	BIT(5)
+#define	PRINT_BIT_NANDC\
+		(PRINT_BIT_NANDC_I | PRINT_BIT_NANDC_E | PRINT_BIT_NANDC_HEX)
+
 #if (PRINT_SWI_SFC_I)
-#define PRINT_SFC_I(...) pr_info(__VA_ARGS__)
+#define PRINT_SFC_I(...) {if (rkflash_debug & PRINT_BIT_SFC_I)\
+				pr_info(__VA_ARGS__); }
 #else
 #define PRINT_SFC_I(...)
 #endif
 
 #if (PRINT_SWI_SFC_E)
-#define PRINT_SFC_E(...) pr_info(__VA_ARGS__)
+#define PRINT_SFC_E(...) {if (rkflash_debug & PRINT_BIT_SFC_E)\
+				pr_info(__VA_ARGS__); }
 #else
 #define PRINT_SFC_E(...)
 #endif
 
 #if (PRINT_SWI_SFC_HEX)
 #define PRINT_SFC_HEX(s, buf, width, len)\
-		rknand_print_hex(s, buf, width, len)
+		rkflash_print_hex(s, buf, width, len)
 #else
 #define PRINT_SFC_HEX(s, buf, width, len)
 #endif
 
 #if (PRINT_SWI_NANDC_I)
-#define PRINT_NANDC_I(...) pr_info(__VA_ARGS__)
+#define PRINT_NANDC_I(...) {if (rkflash_debug & PRINT_BIT_NANDC_I)\
+				pr_info(__VA_ARGS__); }
 #else
 #define PRINT_NANDC_I(...)
 #endif
 
 #if (PRINT_SWI_NANDC_E)
-#define PRINT_NANDC_E(...) pr_info(__VA_ARGS__)
+#define PRINT_NANDC_E(...) {if (rkflash_debug & PRINT_BIT_NANDC_I)\
+				pr_info(__VA_ARGS__); }
 #else
 #define PRINT_NANDC_E(...)
 #endif
 
 #if (PRINT_SWI_NANDC_HEX)
 #define PRINT_NANDC_HEX(s, buf, width, len)\
-		rknand_print_hex(s, buf, width, len)
+		(rkflash_print_hex(s, buf, width, len))
 #else
 #define PRINT_NANDC_HEX(s, buf, width, len)
 #endif
 
-void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
+#define rkflash_print_hex(s, buf, w, len)\
+		print_hex_dump(KERN_WARNING, s, DUMP_PREFIX_OFFSET,\
+			       4, w, buf, (len) * w, 0)
 
 #endif
 
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 6bc8727fa956b..83d1fe89b241f 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -6,9 +6,9 @@
 #include <linux/delay.h>
 #include <linux/kernel.h>
 
-#include "flash.h"
 #include "flash_com.h"
 #include "rkflash_debug.h"
+#include "rk_sftl.h"
 #include "sfc.h"
 #include "sfc_nand.h"
 
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 8e01801f32a10..c4d92a02bd1d3 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -115,6 +115,9 @@ struct nand_info {
 	u32 (*ecc_status)(void);
 };
 
+extern struct nand_phy_info	g_nand_phy_info;
+extern struct nand_ops		g_nand_ops;
+
 u32 sfc_nand_init(void);
 void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
diff --git a/drivers/rkflash/sfc_nand_boot.c b/drivers/rkflash/sfc_nand_boot.c
index 60e033efcddea..b981ded2299fa 100644
--- a/drivers/rkflash/sfc_nand_boot.c
+++ b/drivers/rkflash/sfc_nand_boot.c
@@ -5,11 +5,10 @@
 #include <linux/kernel.h>
 #include <linux/mutex.h>
 
-#include "rk_sftl.h"
 #include "rkflash_api.h"
+#include "rk_sftl.h"
 #include "sfc.h"
 #include "sfc_nand.h"
-#include "typedef.h"
 
 int snand_init(void __iomem *reg_addr)
 {
@@ -39,6 +38,16 @@ int snand_read(u32 sec, u32 n_sec, void *p_data)
 	return sftl_read(sec, n_sec, p_data);
 }
 
+int snand_vendor_read(u32 sec, u32 n_sec, void *p_data)
+{
+	return sftl_vendor_read(sec, n_sec, p_data);
+}
+
+int snand_vendor_write(u32 sec, u32 n_sec, void *p_data)
+{
+	return sftl_vendor_write(sec, n_sec, p_data);
+}
+
 void snand_deinit(void)
 {
 	sftl_deinit();
diff --git a/drivers/rkflash/sfc_nor_boot.c b/drivers/rkflash/sfc_nor_boot.c
index ba00b3acf9901..2bc2da22ad924 100644
--- a/drivers/rkflash/sfc_nor_boot.c
+++ b/drivers/rkflash/sfc_nor_boot.c
@@ -8,7 +8,6 @@
 #include "sfc.h"
 #include "sfc_nor.h"
 #include "rkflash_api.h"
-#include "typedef.h"
 
 #define VENDOR_PART_NUM			4
 
diff --git a/drivers/rkflash/typedef.h b/drivers/rkflash/typedef.h
index bafc85775397e..5808ec281fa22 100644
--- a/drivers/rkflash/typedef.h
+++ b/drivers/rkflash/typedef.h
@@ -27,15 +27,4 @@
 #define INVALID_UINT16	((u16)0xFFFF)
 #define INVALID_UINT32	((u32)0xFFFFFFFFL)
 
-#define PRINT_E	pr_info
-#define PRINT_I	pr_info
-
-void *ftl_malloc(int n_size);
-void *ftl_memset(void *s, int c, unsigned int n);
-void *ftl_memcpy(void *pv_to,
-		 const void *pv_from,
-		 unsigned int size);
-void ftl_free(void *p);
-void rknand_print_hex(char *s, void *buf, int width, int len);
-
 #endif  /*__TYPEDEF_H */

From e131e1bb5ef3e9c4bc00d83a506061337d850195 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Tue, 17 Jul 2018 11:09:22 +0800
Subject: [PATCH 0630/1852] dt-bindings: Document add px30 to Rockchip CIF
 bindings

Change-Id: I63c267a738d5fc23d989c686045d76db09f95ef6
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../bindings/media/rockchip-cif.txt           | 23 ++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/rockchip-cif.txt b/Documentation/devicetree/bindings/media/rockchip-cif.txt
index c34cee0de0697..8494cf749a8bf 100644
--- a/Documentation/devicetree/bindings/media/rockchip-cif.txt
+++ b/Documentation/devicetree/bindings/media/rockchip-cif.txt
@@ -2,11 +2,12 @@ Rockchip SoC Camera Interface
 ----------------------------------------------
 
 Rockchip CIF is a camera interface for the Rockchip series of SoCs
-like rk3288, rk312x, RV1108 to receive frame data from camera or CCIR656 encoder,
+like px30, rk3288, rk312x, RV1108 to receive frame data from camera or CCIR656 encoder,
 and transfer the data into system main memory by AXI bus.
 
 Required properties:
 - compatible: value should be one of the following
+	"rockchip,px30-cif";
 	"rockchip,rk3128-cif";
 	"rockchip,rk3288-cif";
 - reg : offset and length of the register set for the device.
@@ -37,6 +38,26 @@ two sensors work at a time, they are supposed to work asynchronously.
 Device node example
 -------------------
 
+	cif: cif@ff490000 {
+		compatible = "rockchip,px30-cif";
+		reg = <0x0 0xff490000 0x0 0x200>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>, <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif", "hclk_cif", "pclk_cif", "cif_out";
+		resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;
+		reset-names = "rst_cif_a", "rst_cif_h", "rst_cif_pclkin";
+		power-domains = <&power PX30_PD_VI>;
+		iommus = <&vip_mmu>;
+		status = "okay";
+		port {
+			cif_in: endpoint {
+				remote-endpoint = <&gc2155_out>;
+				vsync-active = <0>;
+				hsync-active = <1>;
+			};
+		};
+	};
+
 	cif: cif@1010a000 {
 		compatible = "rockchip,rk3128-cif";
 		reg = <0x1010a000 0x200>;

From 3f0db3b0a9a6ce381961cce27ffd4537e14e4e96 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Mon, 16 Jul 2018 16:46:32 +0800
Subject: [PATCH 0631/1852] ARM64: dts: rockchip: add a new cif node for px30

Change-Id: Ibfe9412ebaaede23168c1afe0104fad32a9d7882
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 3f85e8abc4ed2..6d72cb4f3ca8b 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1515,6 +1515,19 @@
 		status = "disabled";
 	};
 
+	cif_new: cif-new@ff490000 {
+		compatible = "rockchip,px30-cif";
+		reg = <0x0 0xff490000 0x0 0x200>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>, <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif", "hclk_cif", "pclk_cif", "cif_out";
+		resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;
+		reset-names = "rst_cif_a", "rst_cif_h", "rst_cif_pclkin";
+		power-domains = <&power PX30_PD_VI>;
+		iommus = <&vip_mmu>;
+		status = "disabled";
+	};
+
 	vip_mmu: iommu@ff490800{
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff490800 0x0 0x100>;

From 4de24491737773418a78e16fd37a6acf7eb11522 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Tue, 17 Jul 2018 18:15:29 +0800
Subject: [PATCH 0632/1852] arm: dts: rockchip: add dot v10 dts for rk3308

Change-Id: I0acc3c964183db0bdcbeacd3abf9c7885f0b9584
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/boot/dts/Makefile                   |   1 +
 arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts | 303 +++++++++++++++++++
 2 files changed, 304 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 438a703d88252..d08e27d71aa54 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -565,6 +565,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-pinky.dtb \
 	rk3288-veyron-speedy.dtb \
 	rk3288-x7811-rk818-dual-dsi.dtb \
+	rk3308-dot-v10-aarch32.dtb \
 	rk3308-evb-dmic-i2s-v10-aarch32.dtb \
 	rk3308-voice-module-board-v10-aarch32.dtb \
 	rk3308-voice-module-amic-mainboard-v10-aarch32.dtb \
diff --git a/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
new file mode 100644
index 0000000000000..57124b97caeeb
--- /dev/null
+++ b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "arm64/rockchip/rk3308.dtsi"
+
+/ {
+	model = "Rockchip RK3308 Dot V10 (AArch32)";
+	compatible = "rockchip,rk3308-dot-v10-aarch32", "rockchip,rk3308";
+
+	chosen {
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+	};
+
+	acodec_sound: acodec-sound {
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-acodec";
+		rockchip,codec-hp-det;
+		rockchip,mclk-fs = <256>;
+		rockchip,cpu = <&i2s_8ch_2>;
+		rockchip,codec = <&acodec>;
+		status = "okay";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		esc-key {
+			linux,code = <KEY_MICMUTE>;
+			label = "micmute";
+			press-threshold-microvolt = <1130000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_PLAY>;
+			label = "play";
+			press-threshold-microvolt = <624000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+	dummy_codec: dummy-codec {
+		compatible = "rockchip,dummy-codec";
+		#sound-dai-cells = <0>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+	};
+
+	spdif_tx_sound: spdif-tx-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "rockchip,spdif-tx-sound";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif_tx>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+
+	vad-sound {
+		status = "disabled";
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-vad";
+		rockchip,codec-hp-det;
+		rockchip,cpu = <&i2s_8ch_2>;
+		rockchip,codec = <&acodec>, <&vad>;
+	};
+
+	vdd_log: vdd_core: vdd-core {
+		compatible = "pwm-regulator";
+		pwms = <&pwm0 0 5000 1>;
+		regulator-name = "vdd_core";
+		regulator-min-microvolt = <827000>;
+		regulator-max-microvolt = <1340000>;
+		regulator-init-microvolt = <1015000>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-settling-time-up-us = <250>;
+		status = "okay";
+	};
+
+	vdd_1v0: vdd-1v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_1v0";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1000000>;
+	};
+
+	vcc_1v8: vcc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_ddr: vcc-ddr {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_ddr";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+	};
+
+	vccio_sdio: vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_io";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		uart_rts_gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		pinctrl-0 = <&uart4_rts>;
+		pinctrl-1 = <&uart4_rts_gpio>;
+		BT,power_gpio    = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_WIFI>;
+		clock-names = "clk_wifi";
+		ext_clk_freq = <24000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_wake_host>;
+		wifi_chip_type = "rtl8723ds";
+		WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+		status = "okay";
+	};
+};
+
+&acodec {
+	status = "okay";
+	rockchip,no-deep-low-power;
+	rockchip,no-hp-det;
+	rockchip,loopback-grp = <1>;
+	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+	/* ADC5-8 for 4ch capture, loopback to ADC3-4 */
+	rockchip,adc-grps-route = <2 3 1 0>;
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_core>;
+};
+
+&dmc {
+	center-supply = <&vdd_log>;
+	status = "okay";
+};
+
+&fiq_debugger {
+	status = "okay";
+};
+
+&i2s_8ch_2 {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio0-supply = <&vcc_io>;
+	vccio1-supply = <&vcc_io>;
+	vccio2-supply = <&vcc_1v8>;
+	vccio3-supply = <&vcc_io>;
+	vccio4-supply = <&vccio_sdio>;
+	vccio5-supply = <&vcc_io>;
+};
+
+&nandc {
+	status = "okay";
+};
+
+&pinctrl {
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wireless-wlan {
+		wifi_wake_host: wifi-wake-host {
+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm0_pin_pull_down>;
+};
+
+&ramoops_mem {
+	reg = <0x0 0x30000 0x0 0x20000>;
+};
+
+&ramoops {
+	record-size = <0x0 0x00000>;
+	console-size = <0x0 0x20000>;
+};
+
+&rockchip_suspend {
+	rockchip,pwm-regulator-config = <
+		(0
+		| RKPM_PWM_REGULATOR
+		)
+	>;
+
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc_1v8>;
+};
+
+&sdio {
+	max-frequency = <110000000>;
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sfc {
+	status = "okay";
+};
+
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+	u2phy_otg: otg-port {
+		status = "okay";
+	};
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&vad {
+	status = "disabled";
+	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,det-channel = <0>;
+	rockchip,mode = <1>;
+	rockchip,buffer-time-ms = <500>;
+	#sound-dai-cells = <0>;
+};

From 2ba922eaacd3add8ea369b4a19693b6d93aa9452 Mon Sep 17 00:00:00 2001
From: Zhang Yunlong <dalon.zhang@rock-chips.com>
Date: Mon, 23 Jul 2018 11:31:44 +0800
Subject: [PATCH 0633/1852] camera: rockchip: camsys_drv: v0.0x30.0

rk3326 and other platform power management implementation

Change-Id: I34b9c773cfee1e684e833cdbcf687ac54cd8d88a
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
---
 drivers/media/video/rk_camsys/camsys_internal.h | 4 +++-
 drivers/media/video/rk_camsys/camsys_marvin.c   | 8 +++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/media/video/rk_camsys/camsys_internal.h b/drivers/media/video/rk_camsys/camsys_internal.h
index c5030d0653ea7..e4bd2433deae8 100644
--- a/drivers/media/video/rk_camsys/camsys_internal.h
+++ b/drivers/media/video/rk_camsys/camsys_internal.h
@@ -212,9 +212,11 @@
 	   CSIHOST_PHY_SHUTDOWNZ and CSIHOST_DPHY_RSTZ is
 	   csi host control interface;so DPHY_RX1_SRC_SEL_MASK
 	   should be set DPHY_RX1_SRC_SEL_CSI.
+*v0.0x30.0:
+       1) rk3326 and other platform power management implementation.
 */
 
-#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0, 0x29, 0)
+#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0, 0x30, 0)
 
 #define CAMSYS_PLATFORM_DRV_NAME                "RockChip-CamSys"
 #define CAMSYS_PLATFORM_MARVIN_NAME             "Platform_MarvinDev"
diff --git a/drivers/media/video/rk_camsys/camsys_marvin.c b/drivers/media/video/rk_camsys/camsys_marvin.c
index 1307d0b121622..a8860fc6a0f3c 100644
--- a/drivers/media/video/rk_camsys/camsys_marvin.c
+++ b/drivers/media/video/rk_camsys/camsys_marvin.c
@@ -652,13 +652,14 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
 			clk_prepare_enable(clk->clk_mipi_24m);
 		}
 		clk->in_on = true;
-
+		pm_runtime_get_sync(&camsys_dev->pdev->dev);
 		camsys_trace(1, "%s clock(f: %ld Hz) in turn on",
 			dev_name(camsys_dev->miscdev.this_device), isp_clk);
 		camsys_mrv_reset_cb(ptr, 1);
 		udelay(100);
 		camsys_mrv_reset_cb(ptr, 0);
 		} else if (!on && clk->in_on) {
+		pm_runtime_put_sync(&camsys_dev->pdev->dev);
 		clk_disable_unprepare(clk->aclk_isp);
 		clk_disable_unprepare(clk->hclk_isp);
 		clk_disable_unprepare(clk->isp);
@@ -929,8 +930,7 @@ static int camsys_mrv_remove_cb(struct platform_device *pdev)
 		if (!IS_ERR_OR_NULL(mrv_clk->pclkin_isp1)) {
 			devm_clk_put(&pdev->dev, mrv_clk->pclkin_isp1);
 		}
-		if (CHIP_TYPE == 3399)
-			pm_runtime_disable(&pdev->dev);
+		pm_runtime_disable(&pdev->dev);
 		kfree(mrv_clk);
 		mrv_clk = NULL;
 	}
@@ -975,6 +975,7 @@ int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
 	}
 	if (CHIP_TYPE == 3368 || CHIP_TYPE == 3366 ||
 	    CHIP_TYPE == 3326) {
+		pm_runtime_enable(&pdev->dev);
 		/* mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp"); */
 		mrv_clk->aclk_isp	 = devm_clk_get(&pdev->dev, "aclk_isp");
 		mrv_clk->hclk_isp	 = devm_clk_get(&pdev->dev, "hclk_isp");
@@ -1081,6 +1082,7 @@ int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
 			}
 		}
 	} else{
+		pm_runtime_enable(&pdev->dev);
 		/*mrv_clk->pd_isp	  =                */
 		/*	devm_clk_get(&pdev->dev, "pd_isp");*/
 		mrv_clk->aclk_isp	  =

From dcaac430fd1143b01a46fe136a32233d48b2ef5e Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 18 Jul 2018 09:32:08 +0800
Subject: [PATCH 0634/1852] soc: rockchip: pm_test: Add support for
 dvfs_table_scan

Change-Id: Ie03ed876661286d19b57029f32fe5365c0b60415
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/soc/rockchip/pm_test.c | 96 ++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)

diff --git a/drivers/soc/rockchip/pm_test.c b/drivers/soc/rockchip/pm_test.c
index db839d16f0ba8..211bde78cc5e5 100644
--- a/drivers/soc/rockchip/pm_test.c
+++ b/drivers/soc/rockchip/pm_test.c
@@ -29,6 +29,7 @@
 #define CLK_NR_CLKS 550
 
 static int cpu_usage_run;
+static struct file *wdt_filp;
 
 static DEFINE_PER_CPU(struct work_struct, work_cpu_usage);
 static DEFINE_PER_CPU(struct workqueue_struct *, workqueue_cpu_usage);
@@ -583,10 +584,105 @@ static ssize_t cpu_usage_store(struct kobject *kobj,
 	return n;
 }
 
+static ssize_t dvfs_table_scan_show(struct kobject *kobj,
+				    struct kobj_attribute *attr,
+				    char *buf)
+{
+	char *str = buf;
+
+	str += sprintf(str, "start: start scan dvfs table\n");
+	str += sprintf(str, "alive: send alive\n");
+	str += sprintf(str, "stop: stop scan dvfs table\n");
+	if (str != buf)
+		*(str - 1) = '\n';
+
+	return (str - buf);
+}
+
+static int wdt_start(void)
+{
+	if (wdt_filp)
+		return 0;
+
+	wdt_filp = filp_open("/dev/watchdog", O_WRONLY, 0);
+	if (IS_ERR(wdt_filp)) {
+		pr_err("%s: failed to open /dev/watchdog\n", __func__);
+		wdt_filp = NULL;
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int wdt_keepalive(void)
+{
+	mm_segment_t old_fs;
+
+	if (!wdt_filp) {
+		pr_err("%s: /dev/watchdog filp error\n", __func__);
+		return -EINVAL;
+	}
+	old_fs = get_fs();
+	set_fs(KERNEL_DS);
+	if (wdt_filp->f_op->write(wdt_filp, "\0", 1, &wdt_filp->f_pos) <= 0)
+		pr_err("%s: write 0 error\n", __func__);
+	set_fs(old_fs);
+
+	return 0;
+}
+
+static int wdt_stop(void)
+{
+	mm_segment_t old_fs;
+
+	if (!wdt_filp) {
+		pr_err("%s: /dev/watchdog filp error\n", __func__);
+		return -EINVAL;
+	}
+	old_fs = get_fs();
+	set_fs(KERNEL_DS);
+	if (wdt_filp->f_op->write(wdt_filp, "V", 1, &wdt_filp->f_pos) <= 0)
+		pr_err("%s: write V error\n", __func__);
+	set_fs(old_fs);
+	filp_close(wdt_filp, NULL);
+
+	return 0;
+}
+
+static ssize_t dvfs_table_scan_store(struct kobject *kobj,
+				     struct kobj_attribute *attr,
+				     const char *buf, size_t n)
+{
+	char cmd[20];
+	int ret;
+
+	ret = sscanf(buf, "%s", cmd);
+	if (ret != 1)
+		return -EINVAL;
+
+	if (!strcmp(cmd, "start")) {
+		ret = wdt_start();
+		if (ret)
+			return ret;
+	} else if (!strcmp(cmd, "alive")) {
+		ret = wdt_keepalive();
+		if (ret)
+			return ret;
+	} else if (!strcmp(cmd, "stop")) {
+		ret = wdt_stop();
+		if (ret)
+			return ret;
+	}
+
+	return n;
+}
+
 static struct pm_attribute pm_attrs[] = {
 	__ATTR(clk_rate, 0644, clk_rate_show, clk_rate_store),
 	__ATTR(clk_volt, 0644, clk_volt_show, clk_volt_store),
 	__ATTR(cpu_usage, 0644, cpu_usage_show, cpu_usage_store),
+	__ATTR(dvfs_table_scan, 0644, dvfs_table_scan_show,
+	       dvfs_table_scan_store),
 };
 
 static int __init pm_test_init(void)

From 8b9d3cf80877cf74fd76daf51cd34490c05e5154 Mon Sep 17 00:00:00 2001
From: Alex Zhao <zzc@rock-chips.com>
Date: Mon, 23 Jul 2018 10:20:44 +0800
Subject: [PATCH 0635/1852] net: wireless: rockchip_wlan: fix bcmdhd driver
 crash when doing recovery test

kernel log:
<6>[50762.063251] Task dump for CPU 3:
<6>[50762.063256] dhd_eventd      R running      0   966      2 0x00000002
<4>[50762.063284] [<c0a5015c>] (__schedule) from [<c110394c>] (__stack_chk_guard+0x0/0x4)

Change-Id: I552df4a8cd9ee2da2a93d2d38a9f85b458ac866a
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
---
 .../rockchip_wlan/rkwifi/bcmdhd/dhd_linux.c   |  3 +-
 .../rockchip_wlan/rkwifi/bcmdhd/wl_cfg80211.c | 66 +++++++++----------
 .../rkwifi/bcmdhd/wl_linux_mon.c              |  4 +-
 3 files changed, 34 insertions(+), 39 deletions(-)
 mode change 100755 => 100644 drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_linux_mon.c

diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_linux.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_linux.c
index ef17fe10d0d6d..233c1f77c1227 100644
--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_linux.c
+++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_linux.c
@@ -19180,7 +19180,8 @@ static void dhd_sysfs_exit(dhd_info_t *dhd)
 	}
 
 	/* Releae the kobject */
-	kobject_put(&dhd->dhd_kobj);
+	if (dhd->dhd_kobj.state_initialized)
+		kobject_put(&dhd->dhd_kobj);
 }
 
 #ifdef DHD_DEBUG_UART
diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_cfg80211.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_cfg80211.c
index c935304d9e91a..aad697d70b097 100644
--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_cfg80211.c
+++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_cfg80211.c
@@ -14050,6 +14050,7 @@ static s32 wl_create_event_handler(struct bcm_cfg80211 *cfg)
 	}
 
 	if (!cfg->event_workq) {
+		WL_ERR(("event_workq alloc_workqueue failed\n"));
 		ret = -ENOMEM;
 	} else {
 		INIT_WORK(&cfg->event_work, wl_event_handler);
@@ -15245,20 +15246,21 @@ static s32 wl_init_priv(struct bcm_cfg80211 *cfg)
 	init_waitqueue_head(&cfg->netif_change_event);
 	init_completion(&cfg->send_af_done);
 	init_completion(&cfg->iface_disable);
-	wl_init_eq(cfg);
-	err = wl_init_priv_mem(cfg);
-	if (err)
-		return err;
-	if (wl_create_event_handler(cfg))
-		return -ENOMEM;
-	wl_init_event_handler(cfg);
 	mutex_init(&cfg->usr_sync);
 	mutex_init(&cfg->event_sync);
 	mutex_init(&cfg->scan_complete);
 	mutex_init(&cfg->if_sync);
+	mutex_init(&cfg->pm_sync);
 #ifdef WLTDLS
 	mutex_init(&cfg->tdls_sync);
 #endif /* WLTDLS */
+	wl_init_eq(cfg);
+	err = wl_init_priv_mem(cfg);
+	if (err)
+		return err;
+	if (wl_create_event_handler(cfg))
+		return -ENOMEM;
+	wl_init_event_handler(cfg);
 	err = wl_init_scan(cfg);
 	if (err)
 		return err;
@@ -15285,9 +15287,11 @@ static void wl_deinit_priv(struct bcm_cfg80211 *cfg)
 	wl_destroy_event_handler(cfg);
 	wl_flush_eq(cfg);
 	wl_link_down(cfg);
-	del_timer_sync(&cfg->scan_timeout);
+	if (cfg->scan_timeout.function)
+		del_timer_sync(&cfg->scan_timeout);
 #ifdef DHD_LOSSLESS_ROAMING
-	del_timer_sync(&cfg->roam_timeout);
+	if (cfg->roam_timeout.function)
+		del_timer_sync(&cfg->roam_timeout);
 #endif
 	wl_deinit_priv_mem(cfg);
 	if (wl_cfg80211_netdev_notifier_registered) {
@@ -15398,7 +15402,7 @@ struct bcm_cfg80211 *wl_get_cfg(struct net_device *ndev)
 {
 	struct wireless_dev *wdev = ndev->ieee80211_ptr;
 
-	if (!wdev)
+	if (!wdev || !wdev->wiphy)
 		return NULL;
 
 	return wiphy_priv(wdev->wiphy);
@@ -15443,14 +15447,14 @@ s32 wl_cfg80211_attach(struct net_device *ndev, void *context)
 	SET_NETDEV_DEV(ndev, wiphy_dev(wdev->wiphy));
 	wdev->netdev = ndev;
 	cfg->state_notifier = wl_notifier_change_state;
-	err = wl_alloc_netinfo(cfg, ndev, wdev, WL_MODE_BSS, PM_ENABLE, 0);
+	err = wl_init_priv(cfg);
 	if (err) {
-		WL_ERR(("Failed to alloc net_info (%d)\n", err));
+		WL_ERR(("Failed to init iwm_priv (%d)\n", err));
 		goto cfg80211_attach_out;
 	}
-	err = wl_init_priv(cfg);
+	err = wl_alloc_netinfo(cfg, ndev, wdev, wdev->iftype, PM_ENABLE, 0);
 	if (err) {
-		WL_ERR(("Failed to init iwm_priv (%d)\n", err));
+		WL_ERR(("Failed to alloc net_info (%d)\n", err));
 		goto cfg80211_attach_out;
 	}
 
@@ -15495,7 +15499,6 @@ s32 wl_cfg80211_attach(struct net_device *ndev, void *context)
 #endif 
 
 	INIT_DELAYED_WORK(&cfg->pm_enable_work, wl_cfg80211_work_handler);
-	mutex_init(&cfg->pm_sync);
 
 #if defined(STAT_REPORT)
 	err = wl_attach_stat_report(cfg);
@@ -15506,8 +15509,7 @@ s32 wl_cfg80211_attach(struct net_device *ndev, void *context)
 	return err;
 
 cfg80211_attach_out:
-	wl_setup_rfkill(cfg, FALSE);
-	wl_free_wdev(cfg);
+	wl_cfg80211_detach(cfg);
 	return err;
 }
 
@@ -16298,12 +16300,14 @@ static s32 __wl_cfg80211_up(struct bcm_cfg80211 *cfg)
 
 	WL_DBG(("In\n"));
 
-	err = wl_create_event_handler(cfg);
-	if (err) {
-		WL_ERR(("wl_create_event_handler failed\n"));
-		return err;
+	if (!dhd_download_fw_on_driverload) {
+		err = wl_create_event_handler(cfg);
+		if (err) {
+			WL_ERR(("wl_create_event_handler failed\n"));
+			return err;
+		}
+		wl_init_event_handler(cfg);
 	}
-	wl_init_event_handler(cfg);
 
 	err = dhd_config_dongle(cfg);
 	if (unlikely(err))
@@ -16331,19 +16335,7 @@ static s32 __wl_cfg80211_up(struct bcm_cfg80211 *cfg)
 			return err;
 		}
 	}
-	if (!dhd_download_fw_on_driverload) {
-		err = wl_create_event_handler(cfg);
-		if (err) {
-			WL_ERR(("wl_create_event_handler failed\n"));
-			return err;
-		}
-		wl_init_event_handler(cfg);
-	}
-	err = wl_init_scan(cfg);
-	if (err) {
-		WL_ERR(("wl_init_scan failed\n"));
-		return err;
-	}
+
 #ifdef DHD_LOSSLESS_ROAMING
 	if (timer_pending(&cfg->roam_timeout)) {
 		del_timer_sync(&cfg->roam_timeout);
@@ -16680,9 +16672,11 @@ int wl_cfg80211_hang(struct net_device *dev, u16 reason)
 s32 wl_cfg80211_down(struct net_device *dev)
 {
 	struct bcm_cfg80211 *cfg = wl_get_cfg(dev);
-	s32 err;
+	s32 err = 0;
 
 	WL_DBG(("In\n"));
+	if (cfg == NULL)
+		return err;
 	mutex_lock(&cfg->usr_sync);
 #if defined(RSSIAVG)
 	wl_free_rssi_cache(&g_rssi_cache_ctrl);
diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_linux_mon.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_linux_mon.c
old mode 100755
new mode 100644
index e90fa5d1679ae..75a417ba905c4
--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_linux_mon.c
+++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/wl_linux_mon.c
@@ -388,8 +388,8 @@ int dhd_monitor_uninit(void)
 {
 	int i;
 	struct net_device *ndev;
-	mutex_lock(&g_monitor.lock);
 	if (g_monitor.monitor_state != MONITOR_STATE_DEINIT) {
+		mutex_lock(&g_monitor.lock);
 		for (i = 0; i < DHD_MAX_IFS; i++) {
 			ndev = g_monitor.mon_if[i].mon_ndev;
 			if (ndev) {
@@ -400,7 +400,7 @@ int dhd_monitor_uninit(void)
 			}
 		}
 		g_monitor.monitor_state = MONITOR_STATE_DEINIT;
+		mutex_unlock(&g_monitor.lock);
 	}
-	mutex_unlock(&g_monitor.lock);
 	return 0;
 }

From 017e30ba75e19834b310c2c15acd1d62c5a1978a Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 22 May 2018 18:42:45 +0800
Subject: [PATCH 0636/1852] camera: rockchip: modify for af function

Change-Id: I0d4b0d2059c8cbf173dd337b0e6e92b3be44a8b0
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../soc_camera/rockchip/rk_camera_module.c    | 83 +++++++++++--------
 1 file changed, 48 insertions(+), 35 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
index 3463229189641..4ac9eaab06eaa 100644
--- a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
@@ -124,6 +124,7 @@ struct pltfrm_camera_module_info_s {
 	int flash_exp_percent;
 	int flash_turn_on_time;
 	int flash_on_timeout;
+	int af_support;
 };
 
 struct pltfrm_camera_module_mipi {
@@ -169,7 +170,7 @@ static int pltfrm_camera_module_set_pinctrl_state(
 
 	if (!IS_ERR_OR_NULL(state)) {
 		ret = pinctrl_select_state(pdata->pinctrl, state);
-		if (IS_ERR_VALUE(ret))
+		if (ret < 0)
 			pltfrm_camera_module_pr_debug(sd,
 				"could not set pins\n");
 	}
@@ -184,10 +185,10 @@ static int pltfrm_camera_module_init_gpio(
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	struct pltfrm_camera_module_data *pdata =
 		dev_get_platdata(&client->dev);
-	int i = 0;
+	unsigned int i = 0;
 
 	ret = pltfrm_camera_module_set_pinctrl_state(sd, pdata->pins_default);
-	if (IS_ERR_VALUE(ret))
+	if (ret < 0)
 		goto err;
 
 	for (i = 0; i < ARRAY_SIZE(pdata->gpios); i++) {
@@ -216,7 +217,7 @@ static int pltfrm_camera_module_init_gpio(
 				pdata->gpios[i].pltfrm_gpio,
 				GPIOF_DIR_OUT,
 				pdata->gpios[i].label);
-			if (IS_ERR_VALUE(ret)) {
+			if (ret) {
 				if ((pdata->gpios[i].label ==
 					PLTFRM_CAMERA_MODULE_PIN_RESET) ||
 					(pdata->gpios[i].label ==
@@ -358,6 +359,7 @@ static struct pltfrm_camera_module_data *pltfrm_camera_module_get_data(
 		}
 	}
 
+	pdata->info.af_support = 0;
 	af_ctrl_node = of_parse_phandle(np, "rockchip,af-ctrl", 0);
 	if (!IS_ERR_OR_NULL(af_ctrl_node)) {
 		af_ctrl_client = of_find_i2c_device_by_node(af_ctrl_node);
@@ -375,6 +377,7 @@ static struct pltfrm_camera_module_data *pltfrm_camera_module_get_data(
 			ret = -EPROBE_DEFER;
 			goto err;
 		}
+		pdata->info.af_support = 1;
 		pltfrm_camera_module_pr_info(sd,
 			"camera module has auto focus controller %s\n",
 			pltfrm_dev_string(pdata->af_ctrl));
@@ -404,8 +407,7 @@ static struct pltfrm_camera_module_data *pltfrm_camera_module_get_data(
 		np,
 		OF_CAMERA_MODULE_REGULATORS,
 		NULL);
-	if (!IS_ERR_VALUE(elem_size) &&
-		!IS_ERR_OR_NULL(prop)) {
+	if (elem_size > 0 && !IS_ERR_OR_NULL(prop)) {
 		struct pltfrm_camera_module_regulator *regulator;
 
 		pdata->regulators.regulator = devm_kzalloc(&client->dev,
@@ -713,7 +715,8 @@ static int pltfrm_camera_module_config_matches(
 	struct property *prop;
 	const char *of_pix_fmt;
 	bool match = true;
-	u32 min, min2, max, max2;
+	u32 min, max;
+	u32 min2 = 1, max2 = 1;
 	u32 numerator, denominator;
 
 	pltfrm_camera_module_pr_debug(sd,
@@ -744,20 +747,20 @@ static int pltfrm_camera_module_config_matches(
 		if (ret == -EINVAL) {
 			min = 0;
 			max = UINT_MAX;
-		} else if (IS_ERR_VALUE(ret)) {
+		} else if (ret) {
 			pltfrm_camera_module_pr_err(sd,
 					"malformed property 'rockchip,frm-width-range'\n");
 			goto err;
 		} else {
 			ret = of_property_read_u32_index(config,
 					"rockchip,frm-width-range", 1, &max);
-			if (IS_ERR_VALUE(ret)) {
+			if (ret) {
 				pltfrm_camera_module_pr_err(sd,
 				"malformed property 'rockchip,frm-width-range'\n");
 				goto err;
 			}
 		}
-	} else if (IS_ERR_VALUE(ret)) {
+	} else if (!ret) {
 		pltfrm_camera_module_pr_err(sd,
 				"malformed property 'rockchip,frm-width'\n");
 		goto err;
@@ -775,20 +778,20 @@ static int pltfrm_camera_module_config_matches(
 		if (ret == -EINVAL) {
 			min = 0;
 			max = UINT_MAX;
-		} else if (IS_ERR_VALUE(ret)) {
+		} else if (ret) {
 			pltfrm_camera_module_pr_err(sd,
 				"malformed property 'rockchip,frm-height-range'\n");
 			goto err;
 		} else {
 			ret = of_property_read_u32_index(config,
 					"rockchip,frm-height-range", 1, &max);
-			if (IS_ERR_VALUE(ret)) {
+			if (ret) {
 				pltfrm_camera_module_pr_err(sd,
 					"malformed property 'rockchip,frm-height-range'\n");
 				goto err;
 			}
 		}
-	} else if (IS_ERR_VALUE(ret)) {
+	} else if (!ret) {
 		pltfrm_camera_module_pr_err(sd,
 				"malformed property 'rockchip,frm-height'\n");
 		goto err;
@@ -807,7 +810,7 @@ static int pltfrm_camera_module_config_matches(
 		if (ret == -EINVAL) {
 			min = 0;
 			max = UINT_MAX;
-		} else if (IS_ERR_VALUE(ret)) {
+		} else if (ret) {
 			pltfrm_camera_module_pr_err(sd,
 					"malformed property 'rockchip,frm-interval-range'\n");
 			goto err;
@@ -818,20 +821,20 @@ static int pltfrm_camera_module_config_matches(
 				"rockchip,frm-interval-range", 2, &max);
 			ret |= of_property_read_u32_index(config,
 				"rockchip,frm-interval-range", 3, &max2);
-			if (IS_ERR_VALUE(ret)) {
+			if (ret) {
 				pltfrm_camera_module_pr_err(sd,
 					"malformed property 'rockchip,frm-interval-range'\n");
 				goto err;
 			}
 		}
-	} else if (IS_ERR_VALUE(ret)) {
+	} else if (!ret) {
 		pltfrm_camera_module_pr_err(sd,
 			"malformed property 'rockchip,frm-interval'\n");
 		goto err;
 	} else {
 		ret = of_property_read_u32_index(config,
 			"rockchip,frm-interval", 1, &min2);
-		if (IS_ERR_VALUE(ret)) {
+		if (ret) {
 			pltfrm_camera_module_pr_err(sd,
 				"malformed property 'rockchip,frm-interval'\n");
 			goto err;
@@ -911,7 +914,7 @@ static int pltfrm_camera_module_write_reglist_node(
 				config_node, "rockchip,reg-table",
 				3 * i + 2, &val);
 			reg_table[i].val = val;
-			if (IS_ERR_VALUE(ret)) {
+			if (ret) {
 				pltfrm_camera_module_pr_err(sd,
 					"error while reading property %s at index %d\n",
 					"rockchip,reg-table", i);
@@ -920,7 +923,7 @@ static int pltfrm_camera_module_write_reglist_node(
 		}
 		ret = pltfrm_camera_module_write_reglist(
 			sd, reg_table, reg_table_num_entries);
-		if (IS_ERR_VALUE(ret))
+		if (ret)
 			goto err;
 		kfree(reg_table);
 		reg_table = NULL;
@@ -1183,7 +1186,7 @@ int pltfrm_camera_module_write_reglist(
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	int ret = 0;
 	unsigned int k = 0, j = 0;
-	int i = 0;
+	unsigned int i = 0;
 	struct i2c_msg *msg;
 	unsigned char *data;
 	unsigned int max_entries = len;
@@ -1470,7 +1473,7 @@ int pltfrm_camera_module_set_pin_state(
 	struct pltfrm_camera_module_data *pdata =
 		dev_get_platdata(&client->dev);
 	int gpio_val;
-	int i;
+	unsigned int i;
 
 	for (i = 0; i < ARRAY_SIZE(pdata->gpios); i++) {
 		if (pin == pdata->gpios[i].label) {
@@ -1507,7 +1510,7 @@ int pltfrm_camera_module_get_pin_state(
 	struct pltfrm_camera_module_data *pdata =
 		dev_get_platdata(&client->dev);
 	int gpio_val;
-	int i;
+	unsigned int i;
 
 	for (i = 0; i < ARRAY_SIZE(pdata->gpios); i++) {
 		if (pin == pdata->gpios[i].label) {
@@ -1546,7 +1549,7 @@ int pltfrm_camera_module_s_power(
 	if (on) {
 		/* Enable clock and voltage to Secondary Camera Sensor */
 		ret = pltfrm_camera_module_set_pm_state(sd, on);
-		if (IS_ERR_VALUE(ret))
+		if (ret)
 			pltfrm_camera_module_pr_err(sd,
 				"set PM state failed (%d), could not power on camera\n",
 				ret);
@@ -1561,10 +1564,10 @@ int pltfrm_camera_module_s_power(
 		/* Disable clock and voltage to Secondary Camera Sensor  */
 		ret = pltfrm_camera_module_set_pinctrl_state(
 			sd, pdata->pins_sleep);
-		if (!IS_ERR_VALUE(ret)) {
+		if (ret >= 0) {
 			ret = pltfrm_camera_module_set_pm_state(
 				sd, on);
-			if (IS_ERR_VALUE(ret))
+			if (ret)
 				pltfrm_camera_module_pr_err(sd,
 					"set PM state failed (%d), could not power off camera\n",
 					ret);
@@ -1632,10 +1635,9 @@ int pltfrm_camera_module_patch_config(
 			if (IS_ERR_VALUE(ret))
 				goto err;
 			if (ret) {
-				ret =
-					pltfrm_camera_module_write_reglist_node(
-						sd, child_node);
-				if (!IS_ERR_VALUE(ret))
+				ret = pltfrm_camera_module_write_reglist_node(
+					sd, child_node);
+				if (ret)
 					goto err;
 			}
 		}
@@ -1673,15 +1675,13 @@ int pltfrm_camera_module_init(
 	}
 
 	ret = pltfrm_camera_module_init_gpio(sd);
-	if (IS_ERR_VALUE(ret)) {
+	if (ret) {
 		pltfrm_camera_module_pr_err(sd,
 			"GPIO initialization failed (%d)\n", ret);
-	}
-
-	if (IS_ERR_VALUE(ret))
 		devm_kfree(&client->dev, pdata);
-	else
+	} else {
 		*(struct pltfrm_camera_module_data **)pldata = pdata;
+	}
 
 	return ret;
 }
@@ -1692,7 +1692,7 @@ void pltfrm_camera_module_release(
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	struct pltfrm_camera_module_data *pdata =
 		dev_get_platdata(&client->dev);
-	int i;
+	unsigned int i;
 
 	/* GPIOs also needs to be freed for other sensors to use */
 	for (i = 0; i < ARRAY_SIZE(pdata->gpios); i++) {
@@ -1722,6 +1722,7 @@ long pltfrm_camera_module_ioctl(struct v4l2_subdev *sd,
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	struct pltfrm_camera_module_data *pdata =
 		dev_get_platdata(&client->dev);
+	struct v4l2_subdev *af_ctrl;
 	int ret = 0;
 
 	pltfrm_camera_module_pr_debug(sd, "cmd: 0x%x\n", cmd);
@@ -1775,6 +1776,7 @@ long pltfrm_camera_module_ioctl(struct v4l2_subdev *sd,
 		p_camera_module->flash_support = pdata->info.flash_support;
 		p_camera_module->flash_exp_percent =
 			pdata->info.flash_exp_percent;
+		p_camera_module->af_support = pdata->info.af_support;
 
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_DEFRECT) {
@@ -1799,6 +1801,17 @@ long pltfrm_camera_module_ioctl(struct v4l2_subdev *sd,
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
 		return pltfrm_camera_module_init_pm(sd,
 			(struct pltfrm_soc_cfg *)arg);
+	} else if ((cmd == PLTFRM_CIFCAM_SET_VCM_POS) ||
+		   (cmd == PLTFRM_CIFCAM_GET_VCM_POS) ||
+		   (cmd == PLTFRM_CIFCAM_GET_VCM_MOVE_RES)) {
+		af_ctrl = pltfrm_camera_module_get_af_ctrl(sd);
+		if (!IS_ERR_OR_NULL(af_ctrl)) {
+			ret = v4l2_subdev_call(af_ctrl,
+				core, ioctl, cmd, arg);
+			return ret;
+		} else {
+			return -EINVAL;
+		}
 	}
 
 	return ret;

From daf3764bcb6f86aa6312057425a66e3f63885103 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 23 May 2018 17:30:17 +0800
Subject: [PATCH 0637/1852] camera: rockchip: Add VTS when setting exposure

Change-Id: Ia06631238bd99d8736ccfed9cb98e3f8fcb319d8
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../soc_camera/rockchip/adv_camera_module.c   |  4 +++
 .../soc_camera/rockchip/adv_camera_module.h   |  2 ++
 .../rockchip/aptina_camera_module.c           |  4 +++
 .../rockchip/aptina_camera_module.h           |  2 ++
 .../rockchip/imx323_v4l2-i2c-subdev.c         | 30 +++++++++++++++++-
 .../soc_camera/rockchip/imx_camera_module.c   |  6 +++-
 .../soc_camera/rockchip/imx_camera_module.h   |  2 ++
 .../rockchip/ov13850_v4l2-i2c-subdev.c        | 30 +++++++++++++++++-
 .../rockchip/ov2710_v4l2-i2c-subdev.c         | 31 ++++++++++++++++++-
 .../rockchip/ov4689_v4l2-i2c-subdev.c         | 30 +++++++++++++++++-
 .../rockchip/ov7675_v4l2-i2c-subdev.c         |  2 +-
 .../rockchip/ov7750_v4l2-i2c-subdev.c         | 31 ++++++++++++++++++-
 .../rockchip/ov8858_v4l2-i2c-subdev.c         | 31 ++++++++++++++++++-
 .../soc_camera/rockchip/ov_camera_module.c    |  4 +++
 .../soc_camera/rockchip/ov_camera_module.h    |  2 ++
 .../rockchip/tc358749xbg_v4l2-i2c-subdev.c    |  2 +-
 .../soc_camera/rockchip/tc_camera_module.c    |  4 +++
 .../soc_camera/rockchip/tc_camera_module.h    |  2 ++
 include/media/v4l2-controls_rockchip.h        |  1 +
 19 files changed, 211 insertions(+), 9 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
index cbc9a7d4d3bd1..034c121430155 100644
--- a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
@@ -740,6 +740,10 @@ int adv_camera_module_s_ext_ctrls(
 			"V4L2_CID_EXPOSURE %d\n",
 			ctrl->value);
 			break;
+		case RK_V4L2_CID_VTS:
+			ctrl_updt = ADV_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE;
+			cam_mod->exp_config.vts_value = ctrl->value;
+			break;
 		case V4L2_CID_WHITE_BALANCE_TEMPERATURE:
 			ctrl_updt = ADV_CAMERA_MODULE_CTRL_UPDT_WB_TEMPERATURE;
 			cam_mod->wb_config.temperature = ctrl->value;
diff --git a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
index 5f505ee16379e..85b7442ff2242 100644
--- a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
@@ -41,6 +41,7 @@
 #define ADV_CAMERA_MODULE_CTRL_UPDT_AUTO_EXP			0x20
 #define ADV_CAMERA_MODULE_CTRL_UPDT_FOCUS_ABSOLUTE		0x40
 #define ADV_CAMERA_MODULE_CTRL_UPDT_PRESET_WB			0x80
+#define ADV_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE			0x100
 
 enum adv_camera_module_state {
 	ADV_CAMERA_MODULE_POWER_OFF = 0,
@@ -100,6 +101,7 @@ struct adv_camera_module_exp_config {
 	u16 gain_percent;
 	bool auto_gain;
 	enum v4l2_flash_led_mode flash_mode;
+	u32 vts_value;
 };
 
 struct adv_camera_module_wb_config {
diff --git a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
index dd20bdf5d4c5e..79a63caa7bbba 100644
--- a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
@@ -971,6 +971,10 @@ int aptina_camera_module_s_ext_ctrls(
 			"V4L2_CID_EXPOSURE %d\n",
 			ctrl->value);
 			break;
+		case RK_V4L2_CID_VTS:
+			ctrl_updt = APTINA_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE;
+			cam_mod->exp_config.vts_value = ctrl->value;
+			break;
 		case V4L2_CID_WHITE_BALANCE_TEMPERATURE:
 			ctrl_updt =
 			APTINA_CAMERA_MODULE_CTRL_UPDT_WB_TEMPERATURE;
diff --git a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
index 5bd1b92e6c793..9f053051cb9c5 100644
--- a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
@@ -42,6 +42,7 @@
 #define APTINA_CAMERA_MODULE_CTRL_UPDT_AUTO_EXP 0x20
 #define APTINA_CAMERA_MODULE_CTRL_UPDT_FOCUS_ABSOLUTE 0x40
 #define APTINA_CAMERA_MODULE_CTRL_UPDT_PRESET_WB 0x80
+#define APTINA_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE 0x100
 
 enum aptina_camera_module_state {
 	APTINA_CAMERA_MODULE_POWER_OFF = 0,
@@ -97,6 +98,7 @@ struct aptina_camera_module_exp_config {
 	u16 gain_percent;
 	bool auto_gain;
 	enum v4l2_flash_led_mode flash_mode;
+	u32 vts_value;
 };
 
 struct aptina_camera_module_wb_config {
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
index 4df5f00e34a38..b39afa63851b1 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
@@ -191,6 +191,31 @@ static int imx323_auto_adjust_fps(struct imx_camera_module *cam_mod,
 	return ret;
 }
 
+static int imx323_set_vts(struct imx_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = imx_camera_module_write_reg(cam_mod,
+				IMX323_TIMING_VTS_LOW_REG, vts & 0xFF);
+	ret |= imx_camera_module_write_reg(cam_mod,
+				IMX323_TIMING_VTS_HIGH_REG, (vts >> 8) & 0xFF);
+
+	if (IS_ERR_VALUE(ret)) {
+		imx_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		imx_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 /*--------------------------------------------------------------------------*/
 
 static int imx323_write_aec(struct imx_camera_module *cam_mod)
@@ -230,6 +255,9 @@ static int imx323_write_aec(struct imx_camera_module *cam_mod)
 		ret |= imx_camera_module_write_reg(cam_mod,
 				IMX323_AEC_PK_EXPO_LOW_REG,
 				IMX323_FETCH_LOW_BYTE_EXP(exp_time));
+
+		if (!cam_mod->auto_adjust_fps)
+			ret |= imx323_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -418,7 +446,7 @@ static int imx323_s_ext_ctrls(struct imx_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = imx323_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
index ad0ba0f1aa17a..2171518269034 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
@@ -714,6 +714,10 @@ int imx_camera_module_s_ext_ctrls(
 			"V4L2_CID_EXPOSURE %d\n",
 			ctrl->value);
 			break;
+		case RK_V4L2_CID_VTS:
+			ctrl_updt = IMX_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE;
+			cam_mod->exp_config.vts_value = ctrl->value;
+			break;
 		case V4L2_CID_WHITE_BALANCE_TEMPERATURE:
 			ctrl_updt = IMX_CAMERA_MODULE_CTRL_UPDT_WB_TEMPERATURE;
 			cam_mod->wb_config.temperature = ctrl->value;
@@ -913,7 +917,7 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 			imx_timings.fine_integration_time_min;
 
 		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame =
+			timings->exposure_valid_frame[0] =
 				cam_mod->custom.g_exposure_valid_frame(cam_mod);
 		timings->exp_time = cam_mod->exp_config.exp_time;
 		timings->gain = cam_mod->exp_config.gain;
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
index 787beecd0a5dc..ffd135ab672f8 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
@@ -41,6 +41,7 @@
 #define IMX_CAMERA_MODULE_CTRL_UPDT_AUTO_EXP 0x20
 #define IMX_CAMERA_MODULE_CTRL_UPDT_FOCUS_ABSOLUTE 0x40
 #define IMX_CAMERA_MODULE_CTRL_UPDT_PRESET_WB 0x80
+#define IMX_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE 0x100
 
 enum imx_camera_module_state {
 	IMX_CAMERA_MODULE_POWER_OFF = 0,
@@ -97,6 +98,7 @@ struct imx_camera_module_exp_config {
 	u16 gain_percent;
 	bool auto_gain;
 	enum v4l2_flash_led_mode flash_mode;
+	u32 vts_value;
 };
 
 struct imx_camera_module_wb_config {
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
index b30c42ff5ecee..a16a520fd9931 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
@@ -1418,6 +1418,32 @@ static int ov13850_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	return ret;
 }
 
+static int ov13850_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		ov13850_TIMING_VTS_LOW_REG, vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		ov13850_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0xFF);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 static int ov13850_write_aec(struct ov_camera_module *cam_mod)
 {
 	int ret = 0;
@@ -1464,6 +1490,8 @@ static int ov13850_write_aec(struct ov_camera_module *cam_mod)
 		ret |= ov_camera_module_write_reg(cam_mod,
 			ov13850_AEC_PK_LONG_EXPO_1ST_REG,
 			ov13850_FETCH_1ST_BYTE_EXP(exp_time));
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov13850_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov13850_AEC_GROUP_UPDATE_ADDRESS,
@@ -1745,7 +1773,7 @@ static int ov13850_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov13850_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
index c749fceb5a62b..3a1b7878885ac 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
@@ -360,6 +360,33 @@ static int OV2710_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	return ret;
 }
 
+static int ov2710_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		OV2710_TIMING_VTS_LOW_REG,
+		vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		OV2710_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0x0F);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 static int ov2710_write_aec(struct ov_camera_module *cam_mod)
 {
 	int ret = 0;
@@ -404,6 +431,8 @@ static int ov2710_write_aec(struct ov_camera_module *cam_mod)
 		ret |= ov_camera_module_write_reg(cam_mod,
 			OV2710_AEC_PK_LONG_EXPO_1ST_REG,
 			OV2710_FETCH_1ST_BYTE_EXP(exp_time));
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov2710_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
 			ret = ov_camera_module_write_reg(cam_mod,
 				OV2710_AEC_GROUP_UPDATE_ADDRESS,
@@ -683,7 +712,7 @@ static int ov2710_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov2710_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		(ctrls->ctrls[0].id == V4L2_CID_GAIN ||
 		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
 		ctrls->ctrls[1].id == V4L2_CID_GAIN ||
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
index 1d01997a4bec9..12c554e6fb6ab 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
@@ -426,6 +426,32 @@ static int ov4689_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	return ret;
 }
 
+static int ov4689_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		ov4689_TIMING_VTS_LOW_REG, vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		ov4689_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0xFF);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 static int ov4689_write_aec(struct ov_camera_module *cam_mod)
 {
 	int ret = 0;
@@ -470,6 +496,8 @@ static int ov4689_write_aec(struct ov_camera_module *cam_mod)
 		ret |= ov_camera_module_write_reg(cam_mod,
 			ov4689_AEC_PK_LONG_EXPO_1ST_REG,
 			ov4689_FETCH_1ST_BYTE_EXP(exp_time));
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov4689_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov4689_AEC_GROUP_UPDATE_ADDRESS,
@@ -752,7 +780,7 @@ static int ov4689_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov4689_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
index 6f9837f5d702e..a3b0a12a7a1b3 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
@@ -374,7 +374,7 @@ static int ov7675_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov7675_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
index 22f3c33000c01..190df0f1792ac 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
@@ -398,6 +398,33 @@ static int ov7750_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	return ret;
 }
 
+static int ov7750_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		ov7750_TIMING_VTS_LOW_REG,
+		vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		ov7750_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0xFF);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 static int ov7750_write_aec(struct ov_camera_module *cam_mod)
 {
 	int ret = 0;
@@ -443,6 +470,8 @@ static int ov7750_write_aec(struct ov_camera_module *cam_mod)
 		ret |= ov_camera_module_write_reg(cam_mod,
 			ov7750_AEC_PK_LONG_EXPO_1ST_REG,
 			ov7750_FETCH_1ST_BYTE_EXP(exp_time));
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov7750_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov7750_AEC_GROUP_UPDATE_ADDRESS,
@@ -709,7 +738,7 @@ static int ov7750_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov7750_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
index 51fee5e516d15..60bd0ea5e2f29 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
@@ -1239,6 +1239,33 @@ static int ov8858_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	return ret;
 }
 
+static int ov8858_set_vts(struct ov_camera_module *cam_mod,
+	u32 vts)
+{
+	int ret = 0;
+
+	if (vts < cam_mod->vts_min)
+		return ret;
+
+	if (vts > 0xfff)
+		vts = 0xfff;
+
+	ret = ov_camera_module_write_reg(cam_mod,
+		ov8858_TIMING_VTS_LOW_REG,
+		vts & 0xFF);
+	ret |= ov_camera_module_write_reg(cam_mod,
+		ov8858_TIMING_VTS_HIGH_REG,
+		(vts >> 8) & 0xFF);
+
+	if (IS_ERR_VALUE(ret)) {
+		ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
+	} else {
+		ov_camera_module_pr_info(cam_mod, "updated vts=%d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
+	return ret;
+}
+
 /*--------------------------------------------------------------------------*/
 static int ov8858_write_aec(struct ov_camera_module *cam_mod)
 {
@@ -1285,6 +1312,8 @@ static int ov8858_write_aec(struct ov_camera_module *cam_mod)
 		ret |= ov_camera_module_write_reg(cam_mod,
 			ov8858_AEC_PK_LONG_EXPO_1ST_REG,
 			ov8858_FETCH_1ST_BYTE_EXP(exp_time));
+		if (!cam_mod->auto_adjust_fps)
+			ret |= ov8858_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov8858_AEC_GROUP_UPDATE_ADDRESS,
@@ -1558,7 +1587,7 @@ static int ov8858_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = ov8858_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
 		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
 		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
index 9e8110e5636c3..f58c0a84b78c8 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
@@ -738,6 +738,10 @@ int ov_camera_module_s_ext_ctrls(
 			"V4L2_CID_EXPOSURE %d\n",
 			ctrl->value);
 			break;
+		case RK_V4L2_CID_VTS:
+			ctrl_updt = OV_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE;
+			cam_mod->exp_config.vts_value = ctrl->value;
+			break;
 		case V4L2_CID_WHITE_BALANCE_TEMPERATURE:
 			ctrl_updt = OV_CAMERA_MODULE_CTRL_UPDT_WB_TEMPERATURE;
 			cam_mod->wb_config.temperature = ctrl->value;
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
index ffce8134fbb23..139406248cd5d 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
@@ -41,6 +41,7 @@
 #define OV_CAMERA_MODULE_CTRL_UPDT_AUTO_EXP			0x20
 #define OV_CAMERA_MODULE_CTRL_UPDT_FOCUS_ABSOLUTE	0x40
 #define OV_CAMERA_MODULE_CTRL_UPDT_PRESET_WB		0x80
+#define OV_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE	0x100
 
 enum ov_camera_module_state {
 	OV_CAMERA_MODULE_POWER_OFF = 0,
@@ -100,6 +101,7 @@ struct ov_camera_module_exp_config {
 	u16 gain_percent;
 	bool auto_gain;
 	enum v4l2_flash_led_mode flash_mode;
+	u32 vts_value;
 };
 
 struct ov_camera_module_wb_config {
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
index f6408b8c753fa..e93961638c61c 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
@@ -707,7 +707,7 @@ static int tc358749xbg_s_ext_ctrls(
 	/* Handles only exposure and gain together special case. */
 	if (ctrls->count == 1)
 		ret = tc358749xbg_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count == 3) &&
+	else if ((ctrls->count >= 3) &&
 		 (ctrls->ctrls[0].id == V4L2_CID_GAIN ||
 		  ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
 		  ctrls->ctrls[1].id == V4L2_CID_GAIN ||
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
index f862b67995910..229444c1eed56 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
@@ -755,6 +755,10 @@ int tc_camera_module_s_ext_ctrls(
 				"V4L2_CID_EXPOSURE %d\n",
 				ctrl->value);
 			break;
+		case RK_V4L2_CID_VTS:
+			ctrl_updt = TC_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE;
+			cam_mod->exp_config.vts_value = ctrl->value;
+			break;
 		case V4L2_CID_WHITE_BALANCE_TEMPERATURE:
 			ctrl_updt = TC_CAMERA_MODULE_CTRL_UPDT_WB_TEMPERATURE;
 			cam_mod->wb_config.temperature = ctrl->value;
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
index c4c1d25df2506..2cb594df2cad6 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
@@ -45,6 +45,7 @@
 #define TC_CAMERA_MODULE_CTRL_UPDT_AUTO_EXP			0x20
 #define TC_CAMERA_MODULE_CTRL_UPDT_FOCUS_ABSOLUTE		0x40
 #define TC_CAMERA_MODULE_CTRL_UPDT_PRESET_WB			0x80
+#define TC_CAMERA_MODULE_CTRL_UPDT_VTS_VALUE			0x100
 
 enum tc_camera_module_state {
 	TC_CAMERA_MODULE_POWER_OFF = 0,
@@ -111,6 +112,7 @@ struct tc_camera_module_exp_config {
 	u16 gain_percent;
 	bool auto_gain;
 	enum v4l2_flash_led_mode flash_mode;
+	u32 vts_value;
 };
 
 struct tc_camera_module_wb_config {
diff --git a/include/media/v4l2-controls_rockchip.h b/include/media/v4l2-controls_rockchip.h
index a30d1569d7bd8..010ddf4696b40 100644
--- a/include/media/v4l2-controls_rockchip.h
+++ b/include/media/v4l2-controls_rockchip.h
@@ -29,4 +29,5 @@
 #define RK_V4L2_CID_VBLANKING (V4L2_CID_USER_RK_BASE + 1)
 #define RK_V4L2_CID_GAIN_PERCENT (V4L2_CID_USER_RK_BASE + 2)
 #define RK_V4L2_CID_AUTO_FPS (V4L2_CID_USER_RK_BASE + 3)
+#define RK_V4L2_CID_VTS (V4L2_CID_USER_RK_BASE + 4)
 #endif

From 2b146f747c5c4f5c682588bec2bc2739ad36465c Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 31 May 2018 16:46:24 +0800
Subject: [PATCH 0638/1852] media: rk-isp10: add module parameter for dumpsys

Change-Id: I7ab56cbdcc5a0ce1441c972a1daa044593e6eb9f
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../media/platform/rk-isp10/cif_isp10_v4l2.c  | 48 ++++++++++++-------
 1 file changed, 32 insertions(+), 16 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index 0ccfb0a9508cf..ae04c07e10b51 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -1088,14 +1088,26 @@ static int cif_isp10_v4l2_release(struct file *file)
 	return ret;
 }
 
-static unsigned int __maybe_unused cif_isp10_v4l2_poll(
+static bool cifisp10_meta_mmap;
+module_param_named(meta_mmap, cifisp10_meta_mmap, bool, 0644);
+MODULE_PARM_DESC(meta_mmap, "Meta mmap onoff (N-Y)");
+
+static unsigned int cif_isp10_v4l2_poll(
 	struct file *file,
 	struct poll_table_struct *wait)
 {
-	struct cif_isp10_v4l2_fh *fh = to_fh(file);
-	int ret = 0;
-	struct vb2_queue *queue = to_vb2_queue(file);
-	unsigned long req_events = poll_requested_events(wait);
+	struct cif_isp10_v4l2_fh *fh;
+	int ret;
+	struct vb2_queue *queue;
+	unsigned long req_events;
+
+	if (!cifisp10_meta_mmap)
+		return vb2_fop_poll(file, wait);
+
+	ret = 0;
+	fh = to_fh(file);
+	queue = to_vb2_queue(file);
+	req_events = poll_requested_events(wait);
 
 	cif_isp10_pltfrm_pr_dbg(NULL, "%s\n",
 		cif_isp10_v4l2_buf_type_string(queue->type));
@@ -1119,7 +1131,7 @@ static unsigned int __maybe_unused cif_isp10_v4l2_poll(
 /*
  * VMA operations.
  */
-static void __maybe_unused cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
+static void cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
 {
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
@@ -1127,7 +1139,7 @@ static void __maybe_unused cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
 	metadata->vmas++;
 }
 
-static void __maybe_unused cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
+static void cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
 {
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
@@ -1135,18 +1147,24 @@ static void __maybe_unused cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
 	metadata->vmas--;
 }
 
-static const struct __maybe_unused vm_operations_struct cif_isp10_vm_ops = {
+static const struct vm_operations_struct cif_isp10_vm_ops = {
 	.open		= cif_isp10_v4l2_vm_open,
 	.close		= cif_isp10_v4l2_vm_close,
 };
 
-int __maybe_unused cif_isp10_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
+int cif_isp10_v4l2_mmap(struct file *file, struct vm_area_struct *vma)
 {
-	struct vb2_queue *queue = to_vb2_queue(file);
-	struct cif_isp10_device *dev = to_cif_isp10_device(queue);
-	enum cif_isp10_stream_id strm = to_stream_id(file);
+	struct vb2_queue *queue;
+	struct cif_isp10_device *dev;
+	enum cif_isp10_stream_id strm;
 	int retval;
 
+	if (!cifisp10_meta_mmap)
+		return vb2_fop_mmap(file, vma);
+
+	queue = to_vb2_queue(file);
+	dev = to_cif_isp10_device(queue);
+	strm = to_stream_id(file);
 	retval = cif_isp10_mmap(dev, strm, vma);
 	if (retval < 0)
 		goto done;
@@ -1166,10 +1184,8 @@ const struct v4l2_file_operations cif_isp10_v4l2_fops = {
 	.compat_ioctl32 = video_ioctl2,
 #endif
 	.release = cif_isp10_v4l2_release,
-	//.poll = cif_isp10_v4l2_poll,
-	//.mmap = cif_isp10_v4l2_mmap,
-	.poll = vb2_fop_poll,
-	.mmap = vb2_fop_mmap,
+	.poll = cif_isp10_v4l2_poll,
+	.mmap = cif_isp10_v4l2_mmap,
 };
 
 /*TBD: clean up code below this line******************************************/

From d40d7f2b1708b371cbf7c0d27e265a36d455551d Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 19 Jul 2018 09:25:31 +0800
Subject: [PATCH 0639/1852] media: rk-isp10: update to v0.1.e

Change-Id: I84abcfb5f49c0acd0c16616321d49d01ad1c89aa
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_version.h | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_version.h b/drivers/media/platform/rk-isp10/cif_isp10_version.h
index 493f1f2ce791b..c13ba690285ba 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_version.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_version.h
@@ -94,8 +94,17 @@
  *
  *v0.1.0xd
  *1. Support RGB24(xRGB8888) format of SP Path.
+ *
+ *v0.1.0xe
+ *1. fix owned_by_drv_count is not 0 when stop stream.
+ *2. fix write fmt is not correct when setting mi_ctrl.
+ *3. modify for dumpsys tool.
+ *4. remove "Measurement late" check.
+ *5. modify for af function.
+ *6. add module parameter for dumpsys.
+ *
  */
 
-#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 1, 0xd)
+#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 1, 0xe)
 
 #endif

From 6dbfbaebac50b87bd4cc59195106949324abcead Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 24 Jul 2018 16:47:07 +0800
Subject: [PATCH 0640/1852] ASoC: rk3308_codec: increase de-pop loop delay

There is a bit of headphone pop during power on, we
need to increase delay time (200us per loop step).

It looks fine that it may take 200us*128=25.6ms here.

Change-Id: Idbc5b235fd55c26cd71f4693cce98fccce60368f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 25afb4e0c95d9..fb92c353599e4 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -1651,13 +1651,13 @@ static int rk3308_codec_power_on(struct rk3308_codec_priv *rk3308)
 	/*
 	 * 6. Change the register ACODEC_ADC_ANA_CON10[6:0] from the 0x1 to
 	 *    0x7f step by step or configure the ACODEC_ADC_ANA_CON10[6:0] to
-	 *    0x7f directly. The suggestion slot time of the step is 20ms.
+	 *    0x7f directly. Here the slot time of the step is 200us.
 	 */
 	for (v = 0x1; v <= 0x7f; v++) {
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON10(0),
 				   RK3308_ADC_CURRENT_CHARGE_MSK,
 				   v);
-		udelay(50);
+		udelay(200);
 	}
 
 	/* 7. Wait until the voltage of VCM keeps stable at the AVDD/2 */
@@ -1697,13 +1697,13 @@ static int rk3308_codec_power_off(struct rk3308_codec_priv *rk3308)
 	/*
 	 * 4.Change the register ACODEC_ADC_ANA_CON10[6:0] from the 0x1 to 0x7f
 	 *   step by step or configure the ACODEC_ADC_ANA_CON10[6:0] to 0x7f
-	 *   directly. The suggestion slot time of the step is 20ms
+	 *   directly. Here the slot time of the step is 200us.
 	 */
 	for (v = 0x1; v <= 0x7f; v++) {
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON10(0),
 				   RK3308_ADC_CURRENT_CHARGE_MSK,
 				   v);
-		udelay(50);
+		udelay(200);
 	}
 
 	/* 5. Wait until the voltage of VCM keeps stable at the AGND */

From 91ce6ea9211ebf229f26831c63699aac15531dc5 Mon Sep 17 00:00:00 2001
From: Alberto Panizzo <alberto@amarulasolutions.com>
Date: Fri, 6 Jul 2018 15:18:51 +0200
Subject: [PATCH 0641/1852] UPSTREAM: clk: rockchip: fix clk_i2sout parent
 selection bits on rk3399

Register, shift and mask were wrong according to datasheet.

Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Cc: stable@vger.kernel.org
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit a64ad008980c65d38e6cf6858429c78e6b740c41)

Change-Id: I5d26dd7073cc14125a37cd02bdf964548248c60b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 6dea2bdd711cd..39039121ef5e1 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -715,7 +715,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	MUX(0, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,
 			RK3399_CLKSEL_CON(31), 0, 2, MFLAGS),
 	COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_p, CLK_SET_RATE_PARENT,
-			RK3399_CLKSEL_CON(30), 8, 2, MFLAGS,
+			RK3399_CLKSEL_CON(31), 2, 1, MFLAGS,
 			RK3399_CLKGATE_CON(8), 12, GFLAGS),
 
 	/* uart */

From f7a120f71d43336950518fa8d77cef7259f3c8f1 Mon Sep 17 00:00:00 2001
From: Derek Basehore <dbasehore@chromium.org>
Date: Tue, 13 Mar 2018 13:37:19 -0700
Subject: [PATCH 0642/1852] UPSTREAM: clk: rockchip: Add 1.6GHz PLL rate for
 rk3399

We need this rate to generate 100, 200, and 228.57MHz from the same
PLL. 228.57MHz is useful for a pixel clock when the VPLL is used for
an external display.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 4ee3fd4abeca30d530fe67972f1964f7454259d6)

Change-Id: I118c877882d694b358697470225d8d94cb1271b5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 39039121ef5e1..51c18538f59e7 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -57,6 +57,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
 	RK3036_PLL_RATE(1656000000, 1, 69, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1632000000, 1, 68, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1608000000, 1, 67, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1584000000, 1, 66, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1560000000, 1, 65, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1536000000, 1, 64, 1, 1, 1, 0),

From 69bcbc3aebbe9e9c13edf121a4450c7bcb16b479 Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Tue, 14 Feb 2017 13:01:14 -0800
Subject: [PATCH 0643/1852] UPSTREAM: clk: rockchip: Set "ignore unused" for
 PMU M0 clocks on rk3399

The PMU Cortex M0 on rk3399 is intended to be used for things like
DDRFreq transitions, suspend/resume, and other things that are the
purview of ARM Trusted Firmware and not the kernel.  As such, the
kernel shouldn't be messing with the clocks.  Add CLK_IGNORE_UNUSED to
these clocks.

Without this change, the following was observed on a Chromebook with a
rk3399 (using not-yet-upstream ARM Trusted Firmware code and
not-yet-upstream kernel code based on kernel-4.4):

1. We init the clock framework.

2. We start up "DDRFreq", which causes ATF to occasionally fire up the
   M0 for transitions.  Each time ATF fires up the M0 it will turn on
   these clocks and each time it is done it will turn them off.

3. We finally get to the the part of the kernel that calls
   clk_disable_unused() and we disables the clocks.

You can see the race above.  Basically everything is fine as long as
ARM Trusted Firmware isn't starting up the M0 at exactly the same time
that the kernel is disabling unused clocks.  ...but if the race
happens then we go boom.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 60aadea57ed98e734a7e9edb3076b5a72eff0b0d)

Change-Id: I2a78c74edc9bc5d5b4f26224ebdb34eb83afb022
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 51c18538f59e7..173cdcd4ce3ed 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1580,10 +1580,10 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
 	GATE(PCLK_UART4_PMU, "pclk_uart4_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 14, GFLAGS),
 	GATE(PCLK_WDT_M0_PMU, "pclk_wdt_m0_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 15, GFLAGS),
 
-	GATE(FCLK_CM0S_PMU, "fclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 0, GFLAGS),
-	GATE(SCLK_CM0S_PMU, "sclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 1, GFLAGS),
-	GATE(HCLK_CM0S_PMU, "hclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 2, GFLAGS),
-	GATE(DCLK_CM0S_PMU, "dclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 3, GFLAGS),
+	GATE(FCLK_CM0S_PMU, "fclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 0, GFLAGS),
+	GATE(SCLK_CM0S_PMU, "sclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 1, GFLAGS),
+	GATE(HCLK_CM0S_PMU, "hclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 2, GFLAGS),
+	GATE(DCLK_CM0S_PMU, "dclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 3, GFLAGS),
 	GATE(HCLK_NOC_PMU, "hclk_noc_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 5, GFLAGS),
 };
 

From 85885d2e49853237099a5b29ac08b5285cb62dd9 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 18 Jan 2017 12:20:56 +0800
Subject: [PATCH 0644/1852] UPSTREAM: clk: rockchip: fix the incorrect pclk_edp
 div width for RK3399

The range of the  pclk_edp_div_con is [13:8] and 6 bits, not 5.

Reported-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Tested-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 3e1531dbc333997ae19324993119c42436d3e6b6)

Change-Id: Ieffcad3f6d44c71d83b7ed00dd30a4bd45995bb2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 173cdcd4ce3ed..db9fbdc0a0cfc 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1218,7 +1218,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKGATE_CON(11), 8, GFLAGS),
 
 	COMPOSITE(PCLK_EDP, "pclk_edp", mux_pll_src_cpll_gpll_p, 0,
-			RK3399_CLKSEL_CON(44), 15, 1, MFLAGS, 8, 5, DFLAGS,
+			RK3399_CLKSEL_CON(44), 15, 1, MFLAGS, 8, 6, DFLAGS,
 			RK3399_CLKGATE_CON(11), 11, GFLAGS),
 	GATE(PCLK_EDP_NOC, "pclk_edp_noc", "pclk_edp", CLK_IGNORE_UNUSED,
 			RK3399_CLKGATE_CON(32), 12, GFLAGS),

From c8792dc4f6b7a27bb3794d4d2890bc445e3d9838 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 1 Nov 2016 11:22:06 +0800
Subject: [PATCH 0645/1852] UPSTREAM: clk: rockchip: optimize 800MHz and 1GHz
 pll rates on RK3399

Usually, the 800MHz and 1GHz are supplied for CPLL and NPLL in the RK3399.
But dues to the carelessly copying from RK3036 when the RK3399 bringing up,
the refdiv == 6, it will increase the lock time, and it is not an optimal
configuration.

Let's fix them for the lock time and jitter are lower:
800 MHz:
- FVCO == 2.4 GHz, revdiv == 1.
1 GHz:
- FVCO == 3 GHz, revdiv == 1.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 1dfbec3905548a0cbc820a62e1d8adee1c80bd41)

Change-Id: I725e8cb542afa7caf7cbb5ff6f747f65d48c5ced
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index db9fbdc0a0cfc..40855164622c1 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -78,7 +78,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
 	RK3036_PLL_RATE(1104000000, 1, 46, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
-	RK3036_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 1, 125, 3, 1, 1, 0),
 	RK3036_PLL_RATE( 984000000, 1, 82, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 960000000, 1, 80, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 936000000, 1, 78, 2, 1, 1, 0),
@@ -88,7 +88,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
 	RK3036_PLL_RATE( 864000000, 1, 72, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 840000000, 1, 70, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 816000000, 1, 68, 2, 1, 1, 0),
-	RK3036_PLL_RATE( 800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE( 800000000, 1, 100, 3, 1, 1, 0),
 	RK3036_PLL_RATE( 700000000, 6, 350, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 696000000, 1, 58, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 676000000, 3, 169, 2, 1, 1, 0),

From 5a093b480002240699aef4e563561127d32e0ae8 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 21 Oct 2016 12:03:40 +0800
Subject: [PATCH 0646/1852] UPSTREAM: clk: rockchip: add 533.25MHz to rk3399
 clock rates table

We need to get the accurate 533.25MHz for the DP display.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5c1c63f6345b9e1600875f3122166c0af434158e)

Change-Id: Ib945c80451d52081683488fe410c5200622fb1c3
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 40855164622c1..6aabccb6cc24d 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -94,6 +94,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
 	RK3036_PLL_RATE( 676000000, 3, 169, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 600000000, 1, 75, 3, 1, 1, 0),
 	RK3036_PLL_RATE( 594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE( 533250000, 8, 711, 4, 1, 1, 0),
 	RK3036_PLL_RATE( 504000000, 1, 63, 3, 1, 1, 0),
 	RK3036_PLL_RATE( 500000000, 6, 250, 2, 1, 1, 0),
 	RK3036_PLL_RATE( 408000000, 1, 68, 2, 2, 1, 0),

From 45df5dbe37af0af23a0c25faa32577381559745d Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Thu, 1 Sep 2016 20:26:23 -0700
Subject: [PATCH 0647/1852] UPSTREAM: clk: rockchip: drop CLK_SET_RATE_PARENT
 from rk3399 fractional dividers

Currently the fractional divider clock time can't handle the
CLK_SET_RATE_PARENT flag. This is because, unlike normal dividers,
there is no clk_divider_bestdiv() function to try speeding up the parent
to see if it helps things.

Eventually someone could try to figure out how to make fractional
dividers able to use CLK_SET_RATE_PARENT, but until they do let's not
confuse the common clock framework (and anyone using it) by setting the
flag.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 29edeccb4445123a0457a308d3ff67ddd0e34f97)

Change-Id: Ic7fa067ed80767c937dd9c8506d2d1e86ee1c93a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 6aabccb6cc24d..edc4222ed0cca 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -673,7 +673,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_SPDIF_DIV, "clk_spdif_div", mux_pll_src_cpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(8), 13, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_spdif_frac", "clk_spdif_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_spdif_frac", "clk_spdif_div", 0,
 			RK3399_CLKSEL_CON(99), 0,
 			RK3399_CLKGATE_CON(8), 14, GFLAGS,
 			&rk3399_spdif_fracmux, 0),
@@ -687,7 +687,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_I2S0_DIV, "clk_i2s0_div", mux_pll_src_cpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(28), 7, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(8), 3, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_i2s0_frac", "clk_i2s0_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_i2s0_frac", "clk_i2s0_div", 0,
 			RK3399_CLKSEL_CON(96), 0,
 			RK3399_CLKGATE_CON(8), 4, GFLAGS,
 			&rk3399_i2s0_fracmux, 0),
@@ -697,7 +697,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_I2S1_DIV, "clk_i2s1_div", mux_pll_src_cpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(29), 7, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(8), 6, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_i2s1_frac", "clk_i2s1_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_i2s1_frac", "clk_i2s1_div", 0,
 			RK3399_CLKSEL_CON(97), 0,
 			RK3399_CLKGATE_CON(8), 7, GFLAGS,
 			&rk3399_i2s1_fracmux, 0),
@@ -707,7 +707,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_I2S2_DIV, "clk_i2s2_div", mux_pll_src_cpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(30), 7, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(8), 9, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_i2s2_frac", "clk_i2s2_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_i2s2_frac", "clk_i2s2_div", 0,
 			RK3399_CLKSEL_CON(98), 0,
 			RK3399_CLKGATE_CON(8), 10, GFLAGS,
 			&rk3399_i2s2_fracmux, 0),
@@ -726,7 +726,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE_NOMUX(0, "clk_uart0_div", "clk_uart0_src", 0,
 			RK3399_CLKSEL_CON(33), 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(9), 0, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_uart0_frac", "clk_uart0_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_uart0_frac", "clk_uart0_div", 0,
 			RK3399_CLKSEL_CON(100), 0,
 			RK3399_CLKGATE_CON(9), 1, GFLAGS,
 			&rk3399_uart0_fracmux, 0),
@@ -736,7 +736,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE_NOMUX(0, "clk_uart1_div", "clk_uart_src", 0,
 			RK3399_CLKSEL_CON(34), 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(9), 2, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_uart1_frac", "clk_uart1_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_uart1_frac", "clk_uart1_div", 0,
 			RK3399_CLKSEL_CON(101), 0,
 			RK3399_CLKGATE_CON(9), 3, GFLAGS,
 			&rk3399_uart1_fracmux, 0),
@@ -744,7 +744,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE_NOMUX(0, "clk_uart2_div", "clk_uart_src", 0,
 			RK3399_CLKSEL_CON(35), 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(9), 4, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_uart2_frac", "clk_uart2_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_uart2_frac", "clk_uart2_div", 0,
 			RK3399_CLKSEL_CON(102), 0,
 			RK3399_CLKGATE_CON(9), 5, GFLAGS,
 			&rk3399_uart2_fracmux, 0),
@@ -752,7 +752,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	COMPOSITE_NOMUX(0, "clk_uart3_div", "clk_uart_src", 0,
 			RK3399_CLKSEL_CON(36), 0, 7, DFLAGS,
 			RK3399_CLKGATE_CON(9), 6, GFLAGS),
-	COMPOSITE_FRACMUX(0, "clk_uart3_frac", "clk_uart3_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_uart3_frac", "clk_uart3_div", 0,
 			RK3399_CLKSEL_CON(103), 0,
 			RK3399_CLKGATE_CON(9), 7, GFLAGS,
 			&rk3399_uart3_fracmux, 0),
@@ -1263,7 +1263,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 #endif
 
 	/* The VOP0 is main screen, it is able to re-set parent rate. */
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop0_frac", "dclk_vop0_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop0_frac", "dclk_vop0_div", 0,
 			RK3399_CLKSEL_CON(106), 0,
 			&rk3399_dclk_vop0_fracmux, 0),
 
@@ -1300,7 +1300,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKGATE_CON(10), 13, GFLAGS),
 #endif
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop1_frac", "dclk_vop1_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop1_frac", "dclk_vop1_div", 0,
 			RK3399_CLKSEL_CON(107), 0,
 			&rk3399_dclk_vop1_fracmux, 0),
 
@@ -1414,7 +1414,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	/* testout */
 	MUX(0, "clk_test_pre", mux_pll_src_cpll_gpll_p, CLK_SET_RATE_PARENT,
 			RK3399_CLKSEL_CON(58), 7, 1, MFLAGS),
-	COMPOSITE_FRAC(0, "clk_test_frac", "clk_test_pre", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRAC(0, "clk_test_frac", "clk_test_pre", 0,
 			RK3399_CLKSEL_CON(105), 0,
 			RK3399_CLKGATE_CON(13), 9, GFLAGS, 0),
 
@@ -1519,7 +1519,7 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
 			RK3399_PMU_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS,
 			RK3399_PMU_CLKGATE_CON(0), 8, GFLAGS),
 
-	COMPOSITE_FRACMUX_NOGATE(0, "clk_wifi_frac", "clk_wifi_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX_NOGATE(0, "clk_wifi_frac", "clk_wifi_div", 0,
 			RK3399_PMU_CLKSEL_CON(7), 0,
 			&rk3399_pmuclk_wifi_fracmux, 0),
 
@@ -1550,7 +1550,7 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
 			RK3399_PMU_CLKSEL_CON(5), 0, 7, DFLAGS,
 			RK3399_PMU_CLKGATE_CON(0), 5, GFLAGS),
 
-	COMPOSITE_FRACMUX(0, "clk_uart4_frac", "clk_uart4_div", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(0, "clk_uart4_frac", "clk_uart4_div", 0,
 			RK3399_PMU_CLKSEL_CON(6), 0,
 			RK3399_PMU_CLKGATE_CON(0), 6, GFLAGS,
 			&rk3399_uart4_pmu_fracmux, 0),

From f0a11bb04c1a513ece0b6d30391ac1d303c877cb Mon Sep 17 00:00:00 2001
From: Yakir Yang <ykk@rock-chips.com>
Date: Thu, 1 Sep 2016 20:26:24 -0700
Subject: [PATCH 0648/1852] UPSTREAM: clk: rockchip: add dclk_vop_frac ids for
 rk3399 vop

Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit e33075db73ca24f6107594a054680a90c4a8d64f)

Change-Id: I3d47c6aecc338de45b48414f0d0327c17e6d2b15
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 include/dt-bindings/clock/rk3399-cru.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 19376df465523..d923a2fc17d08 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -150,6 +150,8 @@
 #define DCLK_VOP0_DIV			182
 #define DCLK_VOP1_DIV			183
 #define DCLK_M0_PERILP			184
+#define DCLK_VOP0_FRAC			185
+#define DCLK_VOP1_FRAC			186
 
 #define FCLK_CM0S 			190
 

From da3f6951c46f5d394f9efa253873b6734d1d8855 Mon Sep 17 00:00:00 2001
From: Yakir Yang <ykk@rock-chips.com>
Date: Thu, 1 Sep 2016 20:26:25 -0700
Subject: [PATCH 0649/1852] UPSTREAM: clk: rockchip: use the dclk_vop_frac
 clock ids on rk3399

Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 7b0f9e357ac838f640b10fb3db1ac35d9a5fa8de)

Change-Id: I08686f8ecbcfb5de7bc99aadd314f6e35ac22995
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index edc4222ed0cca..be102e22f6e62 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1263,7 +1263,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 #endif
 
 	/* The VOP0 is main screen, it is able to re-set parent rate. */
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop0_frac", "dclk_vop0_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP0_FRAC, "dclk_vop0_frac", "dclk_vop0_div", 0,
 			RK3399_CLKSEL_CON(106), 0,
 			&rk3399_dclk_vop0_fracmux, 0),
 
@@ -1300,7 +1300,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKGATE_CON(10), 13, GFLAGS),
 #endif
 
-	COMPOSITE_FRACMUX_NOGATE(0, "dclk_vop1_frac", "dclk_vop1_div", 0,
+	COMPOSITE_FRACMUX_NOGATE(DCLK_VOP1_FRAC, "dclk_vop1_frac", "dclk_vop1_div", 0,
 			RK3399_CLKSEL_CON(107), 0,
 			&rk3399_dclk_vop1_fracmux, 0),
 

From 0ebeb1a972e8e99ba1cf0f85eeeab7b8883a153c Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Tue, 9 Aug 2016 11:02:33 -0700
Subject: [PATCH 0650/1852] UPSTREAM: clk: rockchip: fix rk3399 aclk_vio gate
 bit

Fix incorrect rk3399 aclk_vio gating bit, it should be 0, not 10.

Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit a3f457d9636b3f5ae4fc6502cb0c95f60f5e342b)

Change-Id: I6e962f61a7f918e7945ac93dca6a039e90a0df3c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index be102e22f6e62..2ec6bf0514d9d 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1166,8 +1166,8 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	/* vio */
 	COMPOSITE(ACLK_VIO, "aclk_vio", mux_pll_src_cpll_gpll_ppll_p, CLK_IGNORE_UNUSED,
 			RK3399_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
-			RK3399_CLKGATE_CON(11), 10, GFLAGS),
-	COMPOSITE_NOMUX(PCLK_VIO, "pclk_vio", "aclk_vio", CLK_IGNORE_UNUSED,
+			RK3399_CLKGATE_CON(11), 0, GFLAGS),
+	COMPOSITE_NOMUX(PCLK_VIO, "pclk_vio", "aclk_vio", 0,
 			RK3399_CLKSEL_CON(43), 0, 5, DFLAGS,
 			RK3399_CLKGATE_CON(11), 1, GFLAGS),
 

From 65731116f5561586ca421f3001cf9c69adbfc9fc Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Tue, 25 Apr 2017 14:41:09 +0800
Subject: [PATCH 0651/1852] UPSTREAM: clk: rockchip: add ids for camera on
 rk3399

we use SCLK_TESTCLKOUT1 and SCLK_TESTCLKOUT2 for camera, so add those ids.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit f22e4359cd73fc335df4b13e85dbcda8bf1f25f0)

Change-Id: Ibbdb8e9dabd8c955ef3745c0f49c20f4c763e870
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 include/dt-bindings/clock/rk3399-cru.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index d923a2fc17d08..d0b4740ca92e9 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -136,7 +136,7 @@
 #define SCLK_USBPHY0_480M_SRC		168
 #define SCLK_USBPHY1_480M_SRC		169
 #define SCLK_DDRCLK			170
-#define SCLK_TESTOUT2			171
+#define SCLK_TESTCLKOUT2		171
 #define SCLK_UART0_SRC			172
 #define SCLK_UART_SRC			173
 #define SCLK_I2S0_DIV			174
@@ -144,6 +144,7 @@
 #define SCLK_I2S2_DIV			176
 #define SCLK_SPDIF_DIV			177
 #define SCLK_CIF_OUT_SRC		178
+#define SCLK_TESTCLKOUT1		179
 
 #define DCLK_VOP0			180
 #define DCLK_VOP1			181

From f10262dd4b6779ed040580f7dc225774be2dec69 Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Tue, 25 Apr 2017 14:41:10 +0800
Subject: [PATCH 0652/1852] UPSTREAM: clk: rockchip: add ids for rk3399
 testclks used for camera handling

clk_testout1 and clk_testout2 are used for camera handling, so add their ids.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 25fb42b1cfde85f905dd1d61ea1e089c16e1ad77)

Change-Id: I8000e84264b032835cc3d11a6810264967f4248e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 2ec6bf0514d9d..8717e57fe7a67 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1153,13 +1153,13 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	/* cif_testout */
 	MUX(0, "clk_testout1_pll_src", mux_pll_src_cpll_gpll_npll_p, 0,
 			RK3399_CLKSEL_CON(38), 6, 2, MFLAGS),
-	COMPOSITE(0, "clk_testout1", mux_clk_testout1_p, 0,
+	COMPOSITE(SCLK_TESTCLKOUT1, "clk_testout1", mux_clk_testout1_p, 0,
 			RK3399_CLKSEL_CON(38), 5, 1, MFLAGS, 0, 5, DFLAGS,
 			RK3399_CLKGATE_CON(13), 14, GFLAGS),
 
 	MUX(0, "clk_testout2_pll_src", mux_pll_src_cpll_gpll_npll_p, 0,
 			RK3399_CLKSEL_CON(38), 14, 2, MFLAGS),
-	COMPOSITE(SCLK_TESTOUT2, "clk_testout2", mux_clk_testout2_p, 0,
+	COMPOSITE(SCLK_TESTCLKOUT2, "clk_testout2", mux_clk_testout2_p, 0,
 			RK3399_CLKSEL_CON(38), 13, 1, MFLAGS, 8, 5, DFLAGS,
 			RK3399_CLKGATE_CON(13), 15, GFLAGS),
 

From b2ea8f0bb2ba99920f6ff678c09cf1115f531886 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 5 Jun 2018 10:00:29 +0800
Subject: [PATCH 0653/1852] media: rk-isp10: update to v0.1.f

fix MI_CTRL and MI_XTD_FORMAT_CTRL register is not correct
merge isp11: rockchip: v0.2.4 and isp11: rockchip: v0.2.5
merge isp11: Support Y8 for AEC
merge isp11: rockchip: v0.2.7
merge isp11: rockchip: v0.2.9 & v0.2.8
merge isp11: print version
merge isp11: rockchip: v0.2.b
merge isp11: rockchip: v0.2.c
merge isp11: rockchip: v0.3.2
merge isp11: rockchip: v0.3.4
merge isp11: rockchip: modify for debugfs
merge isp11: rockchip: v0.1.7
merge isp11: rockchip: v0.1.8
merge isp11: rockchip: v0.1.9
merge isp11: rockchip: v0.1.d
merge isp11: send afm meas data alone

Change-Id: I00c9181849addf5dd44c0deea2bb39ac02ff999d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c   |  488 +-
 drivers/media/platform/rk-isp10/cif_isp10.h   |   21 +-
 .../platform/rk-isp10/cif_isp10_img_src.c     |   32 +
 .../platform/rk-isp10/cif_isp10_img_src.h     |   12 +
 .../platform/rk-isp10/cif_isp10_img_src_ops.h |   12 +-
 .../rk-isp10/cif_isp10_img_src_v4l2-subdev.c  |   56 +
 .../rk-isp10/cif_isp10_img_src_v4l2-subdev.h  |    8 +
 .../media/platform/rk-isp10/cif_isp10_isp.c   | 4048 +++++++++--------
 .../media/platform/rk-isp10/cif_isp10_isp.h   |   42 +-
 .../platform/rk-isp10/cif_isp10_pltfrm.c      |  385 +-
 .../media/platform/rk-isp10/cif_isp10_v4l2.c  |  172 +-
 .../platform/rk-isp10/cif_isp10_version.h     |    5 +-
 include/media/rk-isp10-config.h               |   59 +-
 include/media/rk-isp10-ioctl.h                |   39 +-
 include/media/v4l2-config_rockchip.h          |   29 +
 include/media/v4l2-controls_rockchip.h        |    4 +
 16 files changed, 2872 insertions(+), 2540 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 4723a106f7204..2adfce69eb8fd 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -685,6 +685,8 @@ static const char *cif_isp10_pix_fmt_string(int pixfmt)
 		return "DATA";
 	case CIF_JPEG:
 		return "JPEG";
+	case CIF_Y10:
+		return "Y10";
 	default:
 		return "unknown/unsupported";
 	}
@@ -1550,14 +1552,21 @@ static int cif_isp10_config_img_src(
 	ret = (int)cif_isp10_img_src_ioctl(dev->img_src,
 		RK_VIDIOC_SENSOR_MODE_DATA, &sensor_mode);
 	if (IS_ERR_VALUE(ret)) {
-		dev->img_src_exps.exp_valid_frms = 2;
+		dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] = 4;
+		dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX] = 4;
 	} else {
-		if ((sensor_mode.exposure_valid_frame[0] < 2) ||
-			(sensor_mode.exposure_valid_frame[0] > 6))
-			dev->img_src_exps.exp_valid_frms = 2;
+		if ((sensor_mode.exposure_valid_frame[VALID_FR_EXP_T_INDEX] < 2) ||
+			(sensor_mode.exposure_valid_frame[VALID_FR_EXP_T_INDEX] > 6))
+			dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] = 4;
 		else
-			dev->img_src_exps.exp_valid_frms =
-				sensor_mode.exposure_valid_frame[0];
+			dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] =
+				sensor_mode.exposure_valid_frame[VALID_FR_EXP_T_INDEX];
+		if ((sensor_mode.exposure_valid_frame[VALID_FR_EXP_G_INDEX] < 2) ||
+			(sensor_mode.exposure_valid_frame[VALID_FR_EXP_G_INDEX] > 6))
+			dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX] = 2;
+		else
+			dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX] =
+				sensor_mode.exposure_valid_frame[VALID_FR_EXP_G_INDEX];
 	}
 	cif_isp10_pltfrm_pr_dbg(dev->dev,
 		"cam_itf: (type: 0x%x, dphy: %d, vc: %d, nb_lanes: %d, bitrate: %d)",
@@ -1610,7 +1619,8 @@ static int cif_isp10_config_isp(
 	output = &dev->config.isp_config.output;
 	cam_itf = &dev->config.cam_itf;
 
-	if (CIF_ISP10_PIX_FMT_IS_RAW_BAYER(in_pix_fmt)) {
+	if (CIF_ISP10_PIX_FMT_IS_RAW_BAYER(in_pix_fmt) ||
+		(in_pix_fmt == CIF_Y10)) {
 		if (!dev->config.mi_config.raw_enable) {
 			output->pix_fmt = CIF_YUV422I;
 
@@ -1635,15 +1645,23 @@ static int cif_isp10_config_isp(
 			if (dev->sp_stream.state == CIF_ISP10_STATE_READY) {
 				output->quantization =
 				dev->config.mi_config.sp.output.quantization;
+
+				if (in_pix_fmt == CIF_Y10)
+					output->pix_fmt = CIF_YUV400;
 			}
 
 			if (dev->mp_stream.state == CIF_ISP10_STATE_READY) {
 				output->quantization =
-				dev->config.mi_config.sp.output.quantization;
+				dev->config.mi_config.mp.output.quantization;
 			}
 
-			cif_iowrite32(0xc,
-				dev->config.base_addr + CIF_ISP_DEMOSAIC);
+			if (in_pix_fmt == CIF_Y10) {
+				cif_iowrite32(0x40c,
+					dev->config.base_addr + CIF_ISP_DEMOSAIC);
+			} else {
+				cif_iowrite32(0xc,
+					dev->config.base_addr + CIF_ISP_DEMOSAIC);
+			}
 
 			if (PLTFRM_CAM_ITF_IS_BT656(dev->config.cam_itf.type)) {
 				cif_iowrite32(
@@ -1882,7 +1900,11 @@ static int cif_isp10_config_isp(
 		CIF_ISP_FRAME |
 		CIF_ISP_PIC_SIZE_ERROR |
 		CIF_ISP_FRAME_IN |
-		CIF_ISP_V_START;
+		CIF_ISP_V_START |
+		CIF_ISP_AWB_DONE |
+		CIF_ISP_AFM_FIN |
+		CIF_ISP_EXP_END |
+		CIF_ISP_HIST_MEASURE_RDY;
 	cif_iowrite32(irq_mask,
 		dev->config.base_addr + CIF_ISP_IMSC);
 
@@ -1998,6 +2020,8 @@ static int cif_isp10_config_mipi(
 			(CIF_ISP10_PIX_FMT_YUV_GET_Y_SUBS(in_pix_fmt) == 4) &&
 			(CIF_ISP10_PIX_FMT_GET_BPP(in_pix_fmt) == 20))
 			data_type = CSI2_DT_YUV422_10b;
+		else if (in_pix_fmt == CIF_Y10)
+			data_type = CSI2_DT_RAW10;
 		else {
 			cif_isp10_pltfrm_pr_err(dev->dev,
 				"unsupported format %s\n",
@@ -2178,7 +2202,10 @@ static int cif_isp10_config_mi_mp(
 		CIF_MI_IMSC, ~0);
 
 	if (swap_cb_cr) {
-		cif_iowrite32OR(swap_cb_cr,
+		cif_iowrite32OR(CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP,
+			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
+	} else {
+		cif_iowrite32AND(~CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP,
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
@@ -2199,7 +2226,8 @@ static int cif_isp10_config_mi_mp(
 		"  MI_STATUS 0x%08x\n"
 		"  MI_MP_Y_SIZE %d\n"
 		"  MI_MP_CB_SIZE %d\n"
-		"  MI_MP_CR_SIZE %d\n",
+		"  MI_MP_CR_SIZE %d\n"
+		"  MI_XTD_FORMAT_CTRL %d\n",
 		cif_ioread32(dev->config.base_addr +
 			CIF_MI_CTRL),
 		cif_ioread32(dev->config.base_addr +
@@ -2209,7 +2237,9 @@ static int cif_isp10_config_mi_mp(
 		cif_ioread32(dev->config.base_addr +
 			CIF_MI_MP_CB_SIZE_INIT),
 		cif_ioread32(dev->config.base_addr +
-			CIF_MI_MP_CR_SIZE_INIT));
+			CIF_MI_MP_CR_SIZE_INIT),
+		cif_ioread32(dev->config.base_addr +
+			CIF_MI_XTD_FORMAT_CTRL));
 
 	return 0;
 }
@@ -2287,6 +2317,8 @@ static int cif_isp10_config_mi_sp(
 			CIF_ISP10_PIX_FMT_YUV_GET_NUM_CPLANES(out_pix_fmt);
 		if (num_cplanes == 0) {
 			writeformat = CIF_ISP10_BUFF_FMT_INTERLEAVED;
+			if (out_pix_fmt == CIF_YUV400)
+				writeformat = CIF_ISP10_BUFF_FMT_PLANAR;
 		} else {
 			dev->config.mi_config.sp.y_size =
 				(dev->config.mi_config.sp.y_size * 4) /
@@ -2420,19 +2452,26 @@ static int cif_isp10_config_mi_sp(
 		CIF_MI_IMSC, ~0);
 
 	if (swap_cb_cr) {
-		cif_iowrite32OR(swap_cb_cr,
+		cif_iowrite32OR(CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP,
+			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
+	} else {
+		cif_iowrite32AND(~CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP,
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
 	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL);
-	mi_ctrl &= ~(CIF_MI_CTRL_SP_WRITE_FMT(3));
-	mi_ctrl |= CIF_MI_CTRL_SP_WRITE_FMT(writeformat) |
-		   input_format |
-		   output_format |
-		   burst_len |
-		   CIF_MI_CTRL_INIT_BASE_EN |
-		   CIF_MI_CTRL_INIT_OFFSET_EN |
-		   CIF_MI_SP_AUTOUPDATE_ENABLE;
+	mi_ctrl &= ~(CIF_MI_CTRL_SP_WRITE_FMT(3) |/* SP_WRITE_FMT */
+		(0x7 << 28) |	/* SP_OUTPUT_FMT */
+		(0x3 << 26) |	/* SP_INPUT_FMT */
+		(0xF << 16));	/* burst_len_chrom &  burst_len_lum */
+	mi_ctrl = mi_ctrl |
+		CIF_MI_CTRL_SP_WRITE_FMT(writeformat) |
+		input_format |
+		output_format |
+		burst_len |
+		CIF_MI_CTRL_INIT_BASE_EN |
+		CIF_MI_CTRL_INIT_OFFSET_EN |
+		CIF_MI_SP_AUTOUPDATE_ENABLE;
 	cif_iowrite32_verify(mi_ctrl,
 		dev->config.base_addr + CIF_MI_CTRL, ~0);
 
@@ -2445,7 +2484,8 @@ static int cif_isp10_config_mi_sp(
 		"  MI_SP_PIC_WIDTH %d\n"
 		"  MI_SP_PIC_HEIGHT %d\n"
 		"  MI_SP_PIC_LLENGTH %d\n"
-		"  MI_SP_PIC_SIZE %d\n",
+		"  MI_SP_PIC_SIZE %d\n"
+		"  MI_XTD_FORMAT_CTRL %d\n",
 		cif_ioread32(dev->config.base_addr + CIF_MI_CTRL),
 		cif_ioread32(dev->config.base_addr + CIF_MI_STATUS),
 		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_SIZE_INIT),
@@ -2454,7 +2494,8 @@ static int cif_isp10_config_mi_sp(
 		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_PIC_WIDTH),
 		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_PIC_HEIGHT),
 		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_LLENGTH),
-		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_PIC_SIZE));
+		cif_ioread32(dev->config.base_addr + CIF_MI_SP_Y_PIC_SIZE),
+		cif_ioread32(dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL));
 
 	return 0;
 err:
@@ -3349,6 +3390,9 @@ static int cif_isp10_config_cif(
 
 		cif_isp10_config_clk(dev);
 
+		cifisp_frame_id_reset(&dev->isp_dev);
+		dev->isp_dev.frame_id_setexp = 0;
+
 		/* Decide when to switch to asynchronous mode */
 		/*
 		 * TODO: remove dev->isp_dev.ycflt_en check for
@@ -3551,6 +3595,7 @@ static void cif_isp10_init_stream(
 	stream->curr_buf = NULL;
 	stream->stop = false;
 	stream->stall = false;
+	spin_lock_init(&stream->metadata.spinlock);
 
 	cif_isp10_pltfrm_event_clear(dev->dev, &stream->done);
 
@@ -3940,6 +3985,18 @@ static int cif_isp10_s_fmt_mp(
 		strm_fmt->frm_fmt.quantization);
 
 	/* TBD: check whether format is a valid format for MP */
+	if (strm_fmt->frm_fmt.pix_fmt == CIF_YUV400) {
+		cif_isp10_pltfrm_pr_err(dev->dev,
+			"format %s %dx%d@%d/%dfps, stride = %d not supported on MP\n",
+			cif_isp10_pix_fmt_string(strm_fmt->frm_fmt.pix_fmt),
+			strm_fmt->frm_fmt.width,
+			strm_fmt->frm_fmt.height,
+			strm_fmt->frm_intrvl.numerator,
+			strm_fmt->frm_intrvl.denominator,
+			stride);
+		ret = -EINVAL;
+		goto err;
+	}
 
 	if (PLTFRM_CAM_ITF_INTERLACE(dev->config.cam_itf.type)) {
 		ret = -EINVAL;
@@ -4301,16 +4358,25 @@ static int cif_isp10_mi_frame_end(
 			vb2_buffer_done(vb2_buf, VB2_BUF_STATE_DONE);
 			wake_now = false;
 
+			spin_lock(&stream->metadata.spinlock);
 			if (stream->metadata.d && dev->isp_dev.streamon) {
 				struct v4l2_buffer_metadata_s *metadata;
+				unsigned int meta_read_id;
 
 				metadata = (struct v4l2_buffer_metadata_s *)
 					(stream->metadata.d +
 					stream->curr_buf->vb.vb2_buf.index *
 					CAMERA_METADATA_LEN);
-				metadata->frame_id = dev->isp_dev.frame_id;
-				metadata->frame_t.vs_t = dev->isp_dev.vs_t;
-				metadata->frame_t.fi_t = dev->isp_dev.fi_t;
+				meta_read_id = dev->isp_dev.meta_info.read_id;
+				metadata->frame_id = dev->isp_dev.meta_info.frame_id[meta_read_id];
+				metadata->frame_t.vs_t = dev->isp_dev.meta_info.vs_t[meta_read_id];
+				metadata->frame_t.fi_t = dev->isp_dev.meta_info.fi_t[meta_read_id];
+				dev->isp_dev.meta_info.read_cnt++;
+				if (dev->isp_dev.meta_info.read_cnt >= dev->isp_dev.meta_info.read_max) {
+					dev->isp_dev.meta_info.read_cnt = 0;
+					dev->isp_dev.meta_info.read_id = (meta_read_id + 1) % CIF_ISP10_META_INFO_NUM;
+				}
+				spin_unlock(&stream->metadata.spinlock);
 
 				work = (struct cif_isp10_isp_readout_work *)
 					kmalloc(
@@ -4325,10 +4391,12 @@ static int cif_isp10_mi_frame_end(
 					work->isp_dev =
 						&dev->isp_dev;
 					work->frame_id =
-						dev->isp_dev.frame_id;
+						metadata->frame_id;
 					work->vb =
 						&stream->curr_buf->vb.vb2_buf;
 					work->stream_id = stream->id;
+					work->isp_metadata =
+						(struct cifisp_isp_metadata *)metadata->isp;
 					if (!queue_work(dev->isp_dev.readout_wq,
 						(struct work_struct *)work)) {
 						cif_isp10_pltfrm_pr_err(
@@ -4343,6 +4411,7 @@ static int cif_isp10_mi_frame_end(
 					wake_now = true;
 				}
 			} else {
+				spin_unlock(&stream->metadata.spinlock);
 				wake_now = true;
 			}
 
@@ -4452,14 +4521,78 @@ static int cif_isp10_mi_frame_end(
 	return 0;
 }
 
+static int cif_isp10_update_mi_immediate(
+	struct cif_isp10_device *dev,
+	enum cif_isp10_stream_id stream_id)
+{
+	struct cif_isp10_stream *stream;
+	u32 *next_buff_addr;
+	CIF_ISP10_PLTFRM_MEM_IO_ADDR y_base_addr;
+#ifdef CIF_ISP10_MODE_DMA_SG
+	struct sg_table *sgt = NULL;
+#endif
+	int (*update_mi)(
+		struct cif_isp10_device *dev);
+
+	if (stream_id == CIF_ISP10_STREAM_MP) {
+		stream = &dev->mp_stream;
+		y_base_addr =
+			dev->config.base_addr + CIF_MI_MP_Y_BASE_AD_SHD;
+		next_buff_addr = &dev->config.mi_config.mp.next_buff_addr;
+		update_mi = cif_isp10_update_mi_mp;
+	} else if (stream_id == CIF_ISP10_STREAM_SP) {
+		stream = &dev->sp_stream;
+		y_base_addr =
+			dev->config.base_addr + CIF_MI_SP_Y_BASE_AD_SHD;
+		next_buff_addr = &dev->config.mi_config.sp.next_buff_addr;
+		update_mi = cif_isp10_update_mi_sp;
+	} else {
+		BUG();
+	}
+
+	if (stream->state != CIF_ISP10_STATE_STREAMING)
+		return 0;
+
+	if (stream->next_buf)
+		return 0;
+
+	if (!list_empty(&stream->buf_queue)) {
+		stream->next_buf =
+			list_first_entry(&stream->buf_queue,
+				struct cif_isp10_buffer, queue);
+		list_del(&stream->next_buf->queue);
+#ifdef CIF_ISP10_MODE_DMA_CONTIG
+		*next_buff_addr = vb2_dma_contig_plane_dma_addr(
+			&stream->next_buf->vb.vb2_buf, 0);
+#endif
+#ifdef CIF_ISP10_MODE_DMA_SG
+		sgt = vb2_dma_sg_plane_desc(
+			&stream->next_buf->vb.vb2_buf, 0);
+		*next_buff_addr = sg_dma_address(sgt->sgl);
+#endif
+	}
+
+	update_mi(dev);
+
+	cif_isp10_pltfrm_pr_dbg(dev->dev,
+		"%s curr_buff: %d, next_buf: %d, 0x%x\n",
+		cif_isp10_stream_id_string(stream_id),
+		(stream->curr_buf) ? stream->curr_buf->vb.vb2_buf.index : -1,
+		(stream->next_buf) ? stream->next_buf->vb.vb2_buf.index : -1,
+		*next_buff_addr);
+	return 0;
+}
+
 static void cif_isp10_stream_metadata_reset(
 	struct cif_isp10_stream *stream_dev
 )
 {
 	unsigned int i;
+	unsigned long flags = 0;
 	struct v4l2_buffer_metadata_s *metadata;
 	struct cifisp_isp_metadata *isp_metadata;
 
+	spin_lock_irqsave(&stream_dev->metadata.spinlock, flags);
 	if (stream_dev->metadata.d) {
 		for (i = 0; i < stream_dev->metadata.cnt; i++) {
 			metadata = (struct v4l2_buffer_metadata_s *)
@@ -4471,6 +4604,7 @@ static void cif_isp10_stream_metadata_reset(
 			isp_metadata->meas_cfg.s_frame_id = 0xffffffff;
 		}
 	}
+	spin_unlock_irqrestore(&stream_dev->metadata.spinlock, flags);
 }
 
 static void cif_isp10_start_mi(
@@ -4765,6 +4899,8 @@ static int cif_isp10_stop(
 			spin_unlock_irqrestore(&dev->isp_state_lock, flags);
 		}
 
+		cifisp_clr_readout_wq(&dev->isp_dev);
+
 		if (!CIF_ISP10_INP_IS_DMA(dev->config.input_sel)) {
 			if (IS_ERR_VALUE(cif_isp10_img_src_set_state(dev,
 				CIF_ISP10_IMG_SRC_STATE_SW_STNDBY)))
@@ -4900,7 +5036,7 @@ static int cif_isp10_start(
 		 */
 		mdelay(1);
 		/* start sensor output! */
-		dev->isp_dev.frame_id = 0;
+		cifisp_frame_id_reset(&dev->isp_dev);
 		dev->isp_dev.frame_id_setexp = 0;
 
 		list_for_each_entry_safe(
@@ -4950,6 +5086,13 @@ static int cif_isp10_start(
 		cif_isp10_dma_next_buff(dev);
 	}
 
+	dev->isp_dev.meta_info.read_cnt = 0;
+	dev->isp_dev.meta_info.read_max = 0;
+	if (dev->sp_stream.state == CIF_ISP10_STATE_STREAMING)
+		dev->isp_dev.meta_info.read_max++;
+	if (dev->mp_stream.state == CIF_ISP10_STATE_STREAMING)
+		dev->isp_dev.meta_info.read_max++;
+
 	cif_isp10_pltfrm_pr_dbg(dev->dev,
 		"SP state = %s, MP state = %s, DMA state = %s, img_src state = %s\n"
 		"  MI_CTRL 0x%08x\n"
@@ -5243,12 +5386,13 @@ static void cif_isp10_vs_work(struct work_struct *work)
 	struct cif_isp10_isp_vs_work *vs_wk =
 		container_of(work, struct cif_isp10_isp_vs_work, work);
 	struct cif_isp10_device *dev = vs_wk->dev;
+	unsigned int v_frame_id;
 
 	switch (vs_wk->cmd) {
 	case CIF_ISP10_VS_EXP: {
 		struct cif_isp10_img_src_exp *exp =
 			(struct cif_isp10_img_src_exp *)vs_wk->param;
-		struct cif_isp10_img_src_ext_ctrl *exp_ctrl = exp->exp;
+		struct cif_isp10_img_src_ext_ctrl *exp_ctrl = &exp->exp;
 		struct cif_isp10_img_src_data *new_data;
 
 		if (dev->img_src)
@@ -5264,8 +5408,19 @@ static void cif_isp10_vs_work(struct work_struct *work)
 			new_data = &dev->img_src_exps.data[1];
 
 		mutex_lock(&dev->img_src_exps.mutex);
-		new_data->v_frame_id = dev->isp_dev.frame_id +
-			dev->img_src_exps.exp_valid_frms;
+		if (exp_ctrl->ctrls->id == V4L2_CID_EXPOSURE)
+			v_frame_id = dev->isp_dev.frame_id +
+				dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX];
+		else
+			v_frame_id = dev->isp_dev.frame_id +
+				dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX];
+
+		if (v_frame_id == dev->img_src_exps.data[0].v_frame_id)
+			new_data = &dev->img_src_exps.data[0];
+		if (v_frame_id == dev->img_src_exps.data[1].v_frame_id)
+			new_data = &dev->img_src_exps.data[1];
+		new_data->v_frame_id = v_frame_id;
+
 		cif_isp10_img_src_ioctl(dev->img_src,
 			RK_VIDIOC_SENSOR_MODE_DATA,
 			&new_data->data);
@@ -5293,10 +5448,8 @@ static void cif_isp10_vs_work(struct work_struct *work)
 		 * new_data->v_frame_id);
 		 */
 
-		kfree(exp->exp->ctrls);
-		exp->exp->ctrls = NULL;
-		kfree(exp->exp);
-		exp->exp = NULL;
+		kfree(exp->exp.ctrls);
+		exp->exp.ctrls = NULL;
 		kfree(exp);
 		exp = NULL;
 		break;
@@ -5309,6 +5462,38 @@ static void cif_isp10_vs_work(struct work_struct *work)
 	vs_wk = NULL;
 }
 
+static int cif_isp10_vs_work_cmd(
+	struct cif_isp10_device *dev,
+	enum cif_isp10_isp_vs_cmd cmd,
+	void *para)
+{
+	struct cif_isp10_isp_vs_work *vs_wk;
+
+	if (cmd == CIF_ISP10_VS_EXP)
+		vs_wk = kmalloc(sizeof(struct cif_isp10_isp_vs_work),
+			GFP_ATOMIC);
+	else
+		vs_wk = kmalloc(sizeof(struct cif_isp10_isp_vs_work),
+			GFP_KERNEL);
+
+	if (vs_wk) {
+		vs_wk->cmd = cmd;
+		vs_wk->dev = dev;
+		vs_wk->param = (void *)para;
+		INIT_WORK((struct work_struct *)&vs_wk->work,
+			cif_isp10_vs_work);
+		if (!queue_work(dev->vs_wq,
+			(struct work_struct *)&vs_wk->work)) {
+			cif_isp10_pltfrm_pr_err(dev->dev,
+				"%s: queue work failed\n", __func__);
+			kfree(vs_wk);
+		}
+		return 0;
+	} else {
+		return -ENOMEM;
+	}
+}
+
 /* Public Functions */
 void cif_isp10_sensor_mode_data_sync(
 	struct cif_isp10_device *dev,
@@ -5452,6 +5637,7 @@ int cif_isp10_streamoff(
 	bool streamoff_mp = stream_ids & CIF_ISP10_STREAM_MP;
 	bool streamoff_dma = stream_ids & CIF_ISP10_STREAM_DMA;
 	unsigned int streamoff_all = 0;
+	unsigned long lock_flags;
 
 	cif_isp10_pltfrm_pr_dbg(dev->dev,
 		"SP state = %s, MP state = %s, DMA state = %s, streamoff SP = %d, streamoff MP = %d, streamoff DMA = %d\n",
@@ -5484,8 +5670,20 @@ int cif_isp10_streamoff(
 	} else {
 		streamoff_all |= CIF_ISP10_STREAM_MP;
 	}
-	if (streamoff_all == (CIF_ISP10_STREAM_MP | CIF_ISP10_STREAM_SP))
+	if (streamoff_all == (CIF_ISP10_STREAM_MP | CIF_ISP10_STREAM_SP)) {
+		struct cif_isp10_img_src_exp *exp;
+		spin_lock_irqsave(&dev->img_src_exps.lock, lock_flags);
+		if (!list_empty(&dev->img_src_exps.list)) {
+			exp = list_first_entry(&dev->img_src_exps.list,
+				struct cif_isp10_img_src_exp,
+				list);
+			list_del(&exp->list);
+			kfree(exp->exp.ctrls);
+			kfree(exp);
+		}
+		spin_unlock_irqrestore(&dev->img_src_exps.lock, lock_flags);
 		drain_workqueue(dev->vs_wq);
+	}
 
 	ret = cif_isp10_stop(dev, streamoff_sp, streamoff_mp);
 	if (IS_ERR_VALUE(ret))
@@ -5685,6 +5883,8 @@ int cif_isp10_release(
 	int stream_ids)
 {
 	int ret;
+	unsigned char *meta_addr = NULL;
+	unsigned long flags = 0;
 	struct cif_isp10_stream *strm_dev;
 
 	cif_isp10_pltfrm_pr_dbg(NULL, "0x%08x\n", stream_ids);
@@ -5710,11 +5910,15 @@ int cif_isp10_release(
 		strm_dev = NULL;
 
 	if (strm_dev) {
+		spin_lock_irqsave(&strm_dev->metadata.spinlock, flags);
 		if (strm_dev->metadata.d) {
-			vfree(strm_dev->metadata.d);
+			meta_addr = strm_dev->metadata.d;
 			strm_dev->metadata.d = NULL;
 			strm_dev->metadata.cnt = 0;
 		}
+		spin_unlock_irqrestore(&strm_dev->metadata.spinlock, flags);
+		if (meta_addr)
+			vfree(meta_addr);
 	}
 
 	if (stream_ids & CIF_ISP10_STREAM_SP) {
@@ -5819,7 +6023,8 @@ struct cif_isp10_device *cif_isp10_create(
 	cif_isp10_pltfrm_event_init(dev->dev, &dev->sp_stream.done);
 	cif_isp10_pltfrm_event_init(dev->dev, &dev->mp_stream.done);
 
-	dev->img_src_exps.exp_valid_frms = 2;
+	dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] = 4;
+	dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX] = 4;
 	mutex_init(&dev->img_src_exps.mutex);
 	memset(&dev->img_src_exps.data, 0x00, sizeof(dev->img_src_exps.data));
 	spin_lock_init(&dev->img_src_exps.lock);
@@ -5944,9 +6149,11 @@ int cif_isp10_qbuf(
 	switch (stream) {
 	case CIF_ISP10_STREAM_SP:
 		list_add_tail(&buf->queue, &dev->sp_stream.buf_queue);
+		cif_isp10_update_mi_immediate(dev, CIF_ISP10_STREAM_SP);
 		break;
 	case CIF_ISP10_STREAM_MP:
 		list_add_tail(&buf->queue, &dev->mp_stream.buf_queue);
+		cif_isp10_update_mi_immediate(dev, CIF_ISP10_STREAM_MP);
 		break;
 	case CIF_ISP10_STREAM_DMA:
 		list_add_tail(&buf->queue, &dev->dma_stream.buf_queue);
@@ -5976,6 +6183,7 @@ int cif_isp10_reqbufs(
 	enum cif_isp10_stream_id strm,
 	struct v4l2_requestbuffers *req)
 {
+	unsigned long flags = 0;
 	struct cif_isp10_stream *strm_dev = NULL;
 
 	switch (strm) {
@@ -5991,7 +6199,9 @@ int cif_isp10_reqbufs(
 		break;
 	}
 
+	spin_lock_irqsave(&strm_dev->metadata.spinlock, flags);
 	strm_dev->metadata.cnt = req->count;
+	spin_unlock_irqrestore(&strm_dev->metadata.spinlock, flags);
 
 	return 0;
 }
@@ -6000,28 +6210,112 @@ int cif_isp10_s_exp(
 	struct cif_isp10_device *dev,
 	struct cif_isp10_img_src_ext_ctrl *exp_ctrl)
 {
-	struct cif_isp10_img_src_exp *exp = NULL;
+	struct cif_isp10_img_src_ctrl  *ctrl_exp_t = NULL, *ctrl_exp_g = NULL;
+	struct cif_isp10_img_src_exp *exp = NULL, *exp_t = NULL, *exp_g = NULL;
 	unsigned long lock_flags;
-	int retval;
+	int retval, i, exp_cnt;
 
 	if (!dev->vs_wq)
 		return -ENODEV;
 
-	exp = kmalloc(sizeof(*exp), GFP_KERNEL);
-	if (!exp) {
-		retval = -ENOMEM;
-		goto failed;
-	}
+	if (dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] ==
+		dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX]) {
+		exp = kmalloc(sizeof(struct cif_isp10_img_src_exp), GFP_KERNEL);
+		if (!exp) {
+			retval = -ENOMEM;
+			goto failed;
+		}
+		exp->exp = *exp_ctrl;
 
-	exp->exp = exp_ctrl;
+		spin_lock_irqsave(&dev->img_src_exps.lock, lock_flags);
+		list_add_tail(&exp->list, &dev->img_src_exps.list);
+		spin_unlock_irqrestore(&dev->img_src_exps.lock, lock_flags);
+	} else {
+		exp_t = kmalloc(sizeof(struct cif_isp10_img_src_exp), GFP_KERNEL);
+		if (!exp_t) {
+			retval = -ENOMEM;
+			goto failed;
+		}
+		ctrl_exp_t = kmalloc(sizeof(struct cif_isp10_img_src_ctrl) * 2, GFP_KERNEL);
+		if (!ctrl_exp_t) {
+			retval = -ENOMEM;
+			goto failed;
+		}
 
-	spin_lock_irqsave(&dev->img_src_exps.lock, lock_flags);
-	list_add_tail(&exp->list, &dev->img_src_exps.list);
-	spin_unlock_irqrestore(&dev->img_src_exps.lock, lock_flags);
+		exp_g = kmalloc(sizeof(struct cif_isp10_img_src_exp), GFP_KERNEL);
+		if (!exp_g) {
+			retval = -ENOMEM;
+			goto failed;
+		}
+		ctrl_exp_g = kmalloc(sizeof(struct cif_isp10_img_src_ctrl)*2, GFP_KERNEL);
+		if (!ctrl_exp_g) {
+			retval = -ENOMEM;
+			goto failed;
+		}
 
+		exp_cnt = 0;
+		for (i = 0; i < exp_ctrl->cnt; i++) {
+			if (exp_ctrl->ctrls[i].id == V4L2_CID_EXPOSURE) {
+				*ctrl_exp_t = exp_ctrl->ctrls[i];
+				exp_cnt++;
+			}
+			if (exp_ctrl->ctrls[i].id == RK_V4L2_CID_VTS) {
+				*(ctrl_exp_t + 1) = exp_ctrl->ctrls[i];
+				exp_cnt++;
+			}
+			if (exp_ctrl->ctrls[i].id == V4L2_CID_GAIN) {
+				*ctrl_exp_g = exp_ctrl->ctrls[i];
+			}
+			if (exp_ctrl->ctrls[i].id == RK_V4L2_CID_GAIN_PERCENT) {
+				*(ctrl_exp_g+1) = exp_ctrl->ctrls[i];
+			}
+		}
+		kfree(exp_ctrl->ctrls);
+		exp_ctrl->ctrls = NULL;
+
+		exp_t->exp.cnt = exp_cnt;
+		exp_t->exp.class = exp_ctrl->class;
+		exp_t->exp.ctrls = ctrl_exp_t;
+		exp_g->exp.cnt = 2;
+		exp_g->exp.class = exp_ctrl->class;
+		exp_g->exp.ctrls = ctrl_exp_g;
+
+		if (dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_T_INDEX] <
+			dev->img_src_exps.exp_valid_frms[VALID_FR_EXP_G_INDEX]) {
+			spin_lock_irqsave(&dev->img_src_exps.lock, lock_flags);
+			list_add_tail(&exp_g->list, &dev->img_src_exps.list);
+			list_add_tail(&exp_t->list, &dev->img_src_exps.list);
+			spin_unlock_irqrestore(&dev->img_src_exps.lock, lock_flags);
+		} else {
+			spin_lock_irqsave(&dev->img_src_exps.lock, lock_flags);
+			list_add_tail(&exp_t->list, &dev->img_src_exps.list);
+			list_add_tail(&exp_g->list, &dev->img_src_exps.list);
+			spin_unlock_irqrestore(&dev->img_src_exps.lock, lock_flags);
+		}
+	}
 	return 0;
 
 failed:
+	if (exp) {
+		kfree(exp);
+		exp = NULL;
+	}
+	if (exp_t) {
+		kfree(exp_t);
+		exp_t = NULL;
+	}
+	if (exp_g) {
+		kfree(exp_g);
+		exp_g = NULL;
+	}
+	if (ctrl_exp_t) {
+		kfree(ctrl_exp_t);
+		ctrl_exp_t = NULL;
+	}
+	if (ctrl_exp_g) {
+		kfree(ctrl_exp_g);
+		ctrl_exp_g = NULL;
+	}
 	return retval;
 }
 
@@ -6036,20 +6330,18 @@ int cif_isp10_s_vcm(
 	return 0;
 }
 
-int cif_isp10_s_isp_metadata(
+int cif_isp10_s_vb_metadata(
 	struct cif_isp10_device *dev,
-	struct cif_isp10_isp_readout_work *readout_work,
-	struct cifisp_isp_other_cfg *new_other,
-	struct cifisp_isp_meas_cfg *new_meas,
-	struct cifisp_stat_buffer *new_stats)
+	struct cif_isp10_isp_readout_work *readout_work)
 {
+	unsigned long flags = 0;
 	unsigned int stream_id =
 		readout_work->stream_id;
 	struct vb2_buffer *vb =
 		readout_work->vb;
 	struct cif_isp10_stream *strm_dev = NULL;
 	struct v4l2_buffer_metadata_s *metadata;
-	struct cifisp_isp_metadata *isp_last;
+	struct isp_supplemental_sensor_mode_data sensor_mode;
 
 	switch (stream_id) {
 	case CIF_ISP10_STREAM_MP:
@@ -6061,50 +6353,39 @@ int cif_isp10_s_isp_metadata(
 	default:
 		cif_isp10_pltfrm_pr_err(dev->dev,
 			"unknown stream id%d\n", stream_id);
-		break;
+		return -1;
 	}
 
+	if (strm_dev->state != CIF_ISP10_STATE_STREAMING) {
+		cif_isp10_pltfrm_pr_err(dev->dev,
+			"stream id%d is not streaming\n", stream_id);
+		return -1;
+	}
+
+	cif_isp10_sensor_mode_data_sync(dev,
+		readout_work->frame_id,
+		&sensor_mode);
+
+	spin_lock_irqsave(&strm_dev->metadata.spinlock, flags);
 	if (vb && strm_dev->metadata.d) {
+		if (vb->index >= strm_dev->metadata.cnt) {
+			cif_isp10_pltfrm_pr_err(dev->dev,
+				"vb->index %d is bigger than metadata.cnt %d\n",
+				vb->index, strm_dev->metadata.cnt);
+			spin_unlock_irqrestore(&strm_dev->metadata.spinlock, flags);
+			return -1;
+		}
 		metadata = (struct v4l2_buffer_metadata_s *)
 			(strm_dev->metadata.d +
 			vb->index * CAMERA_METADATA_LEN);
 
 		metadata->frame_id = readout_work->frame_id;
-		isp_last =
-			(struct cifisp_isp_metadata *)metadata->isp;
-
-		if (new_meas) {
-			if ((isp_last->meas_cfg.s_frame_id == 0xffffffff) ||
-				(isp_last->meas_cfg.s_frame_id <
-				new_meas->s_frame_id)) {
-				memcpy(&isp_last->meas_cfg,
-					new_meas,
-					sizeof(struct cifisp_isp_meas_cfg));
-			}
-		}
-
-		if (new_other) {
-			if ((isp_last->other_cfg.s_frame_id == 0xffffffff) ||
-				(isp_last->other_cfg.s_frame_id <
-				new_other->s_frame_id)) {
-				memcpy(&isp_last->other_cfg,
-					new_other,
-					sizeof(struct cifisp_isp_other_cfg));
-			}
-		}
-
-		if (new_stats) {
-			memcpy(&isp_last->meas_stat,
-				new_stats,
-				sizeof(struct cifisp_stat_buffer));
-			metadata->sensor.exp_time =
-				new_stats->sensor_mode.exp_time;
-			metadata->sensor.gain =
-				new_stats->sensor_mode.gain;
-		} else {
-			isp_last->meas_stat.meas_type = 0x00;
-		}
+		metadata->sensor.exp_time =
+			sensor_mode.exp_time;
+		metadata->sensor.gain =
+			sensor_mode.gain;
 	}
+	spin_unlock_irqrestore(&strm_dev->metadata.spinlock, flags);
 
 	if (vb) {
 		cif_isp10_pltfrm_pr_dbg(NULL,
@@ -6124,6 +6405,7 @@ int cif_isp10_mmap(
 	void *mem_vaddr;
 	int retval = 0, pages;
 	unsigned long mem_size;
+	unsigned long flags = 0;
 
 	switch (stream_id) {
 	case CIF_ISP10_STREAM_MP:
@@ -6169,7 +6451,9 @@ int cif_isp10_mmap(
 		goto done;
 	}
 
+	spin_lock_irqsave(&strm_dev->metadata.spinlock, flags);
 	strm_dev->metadata.d = (unsigned char *)mem_vaddr;
+	spin_unlock_irqrestore(&strm_dev->metadata.spinlock, flags);
 
 	vma->vm_private_data = (void *)&strm_dev->metadata;
 
@@ -6578,7 +6862,6 @@ int cif_isp10_isp_isr(unsigned int isp_mis, void *cntxt)
 	}
 
 	if (isp_mis & CIF_ISP_V_START) {
-		struct cif_isp10_isp_vs_work *vs_wk;
 		struct cif_isp10_img_src_exp *exp;
 
 		do_gettimeofday(&tv);
@@ -6620,23 +6903,8 @@ int cif_isp10_isp_isr(unsigned int isp_mis, void *cntxt)
 		}
 		spin_unlock(&dev->img_src_exps.lock);
 
-		if (exp) {
-			vs_wk = kmalloc(sizeof(*vs_wk),
-				GFP_KERNEL);
-			if (vs_wk) {
-				vs_wk->cmd = CIF_ISP10_VS_EXP;
-				vs_wk->dev = dev;
-				vs_wk->param = (void *)exp;
-				INIT_WORK((struct work_struct *)&vs_wk->work,
-					cif_isp10_vs_work);
-				if (!queue_work(dev->vs_wq,
-					(struct work_struct *)&vs_wk->work)) {
-					cif_isp10_pltfrm_pr_err(dev->dev,
-					"%s: queue work failed\n", __func__);
-					kfree(vs_wk);
-				}
-			}
-		}
+		if (exp)
+			cif_isp10_vs_work_cmd(dev, CIF_ISP10_VS_EXP, (void *)exp);
 	}
 
 	if (isp_mis & CIF_ISP_FRAME_IN) {
diff --git a/drivers/media/platform/rk-isp10/cif_isp10.h b/drivers/media/platform/rk-isp10/cif_isp10.h
index b97e2f41087f5..e34d1df007b10 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10.h
@@ -246,6 +246,7 @@ enum cif_isp10_pix_fmt {
 	/* YUV */
 	CIF_YUV400			= 0x10008000,
 	CIF_YVU400			= 0x10008004,
+	CIF_Y10				= 0x1000a000,
 
 	CIF_YUV420I			= 0x1000c220,
 	CIF_YUV420SP			= 0x1000c221,	/* NV12 */
@@ -469,6 +470,7 @@ struct cif_isp10_buffer {
 struct cif_isp10_metadata_s {
 	unsigned int cnt;
 	unsigned int vmas;
+	spinlock_t spinlock;
 	unsigned char *d;
 };
 
@@ -552,7 +554,7 @@ struct cif_isp10_mi_state {
 
 struct cif_isp10_img_src_exp {
 	struct list_head list;
-	struct cif_isp10_img_src_ext_ctrl *exp;
+	struct cif_isp10_img_src_ext_ctrl exp;
 };
 
 struct cif_isp10_img_src_data {
@@ -566,11 +568,12 @@ struct cif_isp10_img_src_exps {
 
 	struct mutex mutex;	/* protect frm_exp */
 	struct cif_isp10_img_src_data data[2];
-	unsigned char exp_valid_frms;
+	unsigned char exp_valid_frms[2];
 };
 
 enum cif_isp10_isp_vs_cmd {
-	CIF_ISP10_VS_EXP = 0,
+	CIF_ISP10_VS_EXIT = 0,
+	CIF_ISP10_VS_EXP = 1
 };
 
 struct cif_isp10_isp_vs_work {
@@ -778,17 +781,9 @@ int cif_isp10_s_ctrl(
 	const enum cif_isp10_cid id,
 	int val);
 
-void cif_isp10_dbgfs_fill_sensor_aec_para(
-	struct cif_isp10_device *cif_isp10_dev,
-	s32 exp_time,
-	u16 gain);
-
-int cif_isp10_s_isp_metadata(
+int cif_isp10_s_vb_metadata(
 	struct cif_isp10_device *dev,
-	struct cif_isp10_isp_readout_work *readout_work,
-	struct cifisp_isp_other_cfg *new_other,
-	struct cifisp_isp_meas_cfg *new_meas,
-	struct cifisp_stat_buffer *new_stats);
+	struct cif_isp10_isp_readout_work *readout_work);
 
 int cif_isp10_s_exp(
 	struct cif_isp10_device *dev,
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src.c b/drivers/media/platform/rk-isp10/cif_isp10_img_src.c
index 7d8a18c30578e..d9edf2bf43892 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src.c
@@ -173,3 +173,35 @@ const char *cif_isp10_img_src_g_name(
 	return img_src->ops->g_name(img_src->img_src);
 }
 
+void *cif_isp10_img_src_g_img_src(
+	struct cif_isp10_img_src *img_src)
+{
+	if (img_src) {
+		return img_src->img_src;
+	}
+
+	return NULL;
+}
+
+int cif_isp10_img_src_s_frame_interval(
+       struct cif_isp10_img_src *img_src,
+       struct cif_isp10_frm_intrvl *frm_intrvl)
+{
+	if (img_src)
+		return img_src->ops->s_frame_interval(
+			img_src->img_src,
+			frm_intrvl);
+	return -EINVAL;
+}
+
+int cif_isp10_img_src_g_frame_interval(
+       struct cif_isp10_img_src *img_src,
+       struct cif_isp10_frm_intrvl *frm_intrvl)
+{
+	if (img_src)
+		return img_src->ops->g_frame_interval(
+			img_src->img_src,
+			frm_intrvl);
+	return -EINVAL;
+}
+
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src.h b/drivers/media/platform/rk-isp10/cif_isp10_img_src.h
index 0ef90b0369548..48bb4c7405aac 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src.h
@@ -23,6 +23,7 @@ struct cif_isp10_strm_fmt;
 struct cif_isp10_csi_config;
 enum cif_isp10_pix_fmt;
 
+struct cif_isp10_frm_intrvl;
 struct cif_isp10_img_src;
 struct pltfrm_soc_cfg;
 
@@ -80,4 +81,15 @@ long cif_isp10_img_src_ioctl(
 	unsigned int cmd,
 	void *arg);
 
+void *cif_isp10_img_src_g_img_src(
+	struct cif_isp10_img_src *img_src);
+
+int cif_isp10_img_src_s_frame_interval(
+	struct cif_isp10_img_src *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl);
+
+int cif_isp10_img_src_g_frame_interval(
+	struct cif_isp10_img_src *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl);
+
 #endif
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src_ops.h b/drivers/media/platform/rk-isp10/cif_isp10_img_src_ops.h
index 130af3b6eb1c5..a82d18ccbdae5 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src_ops.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src_ops.h
@@ -53,6 +53,12 @@ struct cif_isp10_img_src_ops {
 		void *img_src,
 		unsigned int cmd,
 		void *arg);
+	int (*s_frame_interval)(
+		void *img_src,
+		struct cif_isp10_frm_intrvl *frm_intrvl);
+	int (*g_frame_interval)(
+		void *img_src,
+		struct cif_isp10_frm_intrvl *frm_intrvl);
 };
 
 const struct {
@@ -81,7 +87,11 @@ const struct {
 			.s_ext_ctrls =
 				cif_isp10_img_src_v4l2_subdev_s_ext_ctrls,
 			.ioctl =
-				cif_isp10_img_src_v4l2_subdev_ioctl
+				cif_isp10_img_src_v4l2_subdev_ioctl,
+			.s_frame_interval =
+				cif_isp10_img_src_v4l2_subdev_s_frame_interval,
+			.g_frame_interval =
+				cif_isp10_img_src_v4l2_subdev_g_frame_interval,
 		}
 	},
 };
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
index 92ac9d5e7adf1..da677e2f89cee 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.c
@@ -64,6 +64,10 @@ static enum cif_isp10_pix_fmt img_src_v4l2_subdev_pix_fmt2cif_isp10_pix_fmt(
 	int img_src_pix_fmt)
 {
 	switch (img_src_pix_fmt) {
+	case MEDIA_BUS_FMT_Y8_1X8:
+		return CIF_YUV400;
+	case MEDIA_BUS_FMT_Y10_1X10:
+		return CIF_Y10;
 	case MEDIA_BUS_FMT_YUYV8_1_5X8:
 	case MEDIA_BUS_FMT_YUYV8_2X8:
 	case MEDIA_BUS_FMT_YUYV10_2X10:
@@ -136,6 +140,10 @@ static int cif_isp10_pix_fmt2img_src_v4l2_subdev_pix_fmt(
 	enum cif_isp10_pix_fmt cif_isp10_pix_fmt)
 {
 	switch (cif_isp10_pix_fmt) {
+	case CIF_Y10:
+		return MEDIA_BUS_FMT_Y10_1X10;
+	case CIF_YUV400:
+		return MEDIA_BUS_FMT_Y8_1X8;
 	case CIF_YUV422I:
 		return MEDIA_BUS_FMT_YUYV8_2X8;
 	case CIF_YVU422I:
@@ -460,6 +468,8 @@ long cif_isp10_img_src_v4l2_subdev_ioctl(
 	switch (cmd) {
 	case RK_VIDIOC_SENSOR_MODE_DATA:
 	case RK_VIDIOC_CAMERA_MODULEINFO:
+	case RK_VIDIOC_SENSOR_CONFIGINFO:
+	case RK_VIDIOC_SENSOR_REG_ACCESS:
 
 	case PLTFRM_CIFCAM_G_ITF_CFG:
 	case PLTFRM_CIFCAM_G_DEFRECT:
@@ -484,3 +494,49 @@ long cif_isp10_img_src_v4l2_subdev_ioctl(
 
 	return ret;
 }
+
+int cif_isp10_img_src_v4l2_subdev_s_frame_interval(
+	void *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl)
+{
+	int ret = 0;
+	struct v4l2_subdev *subdev = img_src;
+	struct v4l2_subdev_frame_interval interval;
+
+	interval.interval.numerator = frm_intrvl->numerator;
+	interval.interval.denominator = frm_intrvl->denominator;
+
+	ret = v4l2_subdev_call(subdev, video, s_frame_interval, &interval);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	return 0;
+err:
+	pr_err("img_src.%s ERR: failed with error %d\n", __func__, ret);
+	return ret;
+}
+
+int cif_isp10_img_src_v4l2_subdev_g_frame_interval(
+	void *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl)
+{
+	int ret = 0;
+	struct v4l2_subdev *subdev = img_src;
+	struct v4l2_subdev_frame_interval interval;
+
+	interval.interval.numerator = 0;
+	interval.interval.denominator = 0;
+
+	ret = v4l2_subdev_call(subdev, video, g_frame_interval, &interval);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	frm_intrvl->denominator = interval.interval.denominator;
+	frm_intrvl->numerator = interval.interval.numerator;
+
+	return 0;
+err:
+	pr_err("img_src.%s ERR: failed with error %d\n", __func__, ret);
+	return ret;
+}
+
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.h b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.h
index a5ba17e4b7c83..c2697e4ac81f1 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_img_src_v4l2-subdev.h
@@ -62,4 +62,12 @@ long cif_isp10_img_src_v4l2_subdev_ioctl(
 	unsigned int cmd,
 	void *arg);
 
+int cif_isp10_img_src_v4l2_subdev_s_frame_interval(
+	void *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl);
+
+int cif_isp10_img_src_v4l2_subdev_g_frame_interval(
+	void *img_src,
+	struct cif_isp10_frm_intrvl *frm_intrvl);
+
 #endif
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.c b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
index e6c645a88fe21..3bf900622b733 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
@@ -31,6 +31,8 @@
 #include "cif_isp10_pltfrm.h"
 #include "cif_isp10.h"
 
+#define CIFISP_MEAS_SEND_ALONE (CIF_ISP_AFM_FIN)
+
 #define _GET_ 0
 #define _SET_ 1
 #define CIFISP_MODULE_EN(v, m)             ((v) |= (m))
@@ -40,6 +42,10 @@
 #define CIFISP_MODULE_CLR_UPDATE(v, m)     ((v) &= ~(m))
 #define CIFISP_MODULE_IS_UPDATE(v, m)      (((v) & (m)) == (m))
 
+#define CIFISP_MODULE_UNACTIVE(v, m)		((v) |= (m))
+#define CIFISP_MODULE_ACTIVE(v, m)		((v) &= ~(m))
+#define CIFISP_MODULE_IS_UNACTIVE(v, m)	        (((v) & (m)) == (m))
+
 /* Demosaic */
 #define CIFISP_BDM_BYPASS_EN(val)          ((val) << 10)
 /* HIST */
@@ -314,44 +320,63 @@ static void cifisp_reg_dump(const struct cif_isp10_isp_dev *isp_dev,
 static void cifisp_reg_dump_capture(const struct cif_isp10_isp_dev *isp_dev);
 #endif
 
+static bool cifisp_isp_isr_other_config(
+	struct cif_isp10_isp_dev *isp_dev,
+	unsigned int *time_left);
+
+static bool cifisp_isp_isr_meas_config(
+	struct cif_isp10_isp_dev *isp_dev,
+	unsigned int *time_left);
+
 static struct cif_isp10_buffer *to_cif_isp10_vb(struct vb2_v4l2_buffer *vb)
 {
 	return container_of(vb, struct cif_isp10_buffer, vb);
 }
 
 static int cifisp_module_enable(struct cif_isp10_isp_dev *isp_dev,
-	bool flag, __s32 *value, unsigned int module)
+				bool flag, __s32 *value, unsigned int module)
 {
-	unsigned int *curr_ens, *updates, *new_ens;
+	unsigned int curr_id, new_id;
+	unsigned int *updates, *curr_ens, *new_ens, *actives;
 	unsigned long lock_flags = 0;
 
+	if (module >= CIFISP_MODULE_MAX)
+		return -EINVAL;
+
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
-	if (module & (CIFISP_MODULE_AWB |
-		CIFISP_MODULE_AEC |
-		CIFISP_MODULE_AFC |
-		CIFISP_MODULE_HST)) {
-		curr_ens = &isp_dev->meas_cfgs.curr->module_ens;
-		new_ens = &isp_dev->meas_cfgs.last_or_new->module_ens;
+	if (module >= CIFISP_MEAS_ID) {
+		curr_id = isp_dev->meas_cfgs.log[module].curr_id;
+		new_id = isp_dev->meas_cfgs.log[module].new_id;
 		updates = &isp_dev->meas_cfgs.module_updates;
+		actives = &isp_dev->meas_cfgs.module_actives;
+		curr_ens = &isp_dev->meas_cfgs.cfgs[curr_id].module_ens;
+		new_ens = &isp_dev->meas_cfgs.cfgs[new_id].module_ens;
 	} else {
-		curr_ens = &isp_dev->other_cfgs.curr->module_ens;
-		new_ens = &isp_dev->other_cfgs.last_or_new->module_ens;
+		curr_id = isp_dev->other_cfgs.log[module].curr_id;
+		new_id = isp_dev->other_cfgs.log[module].new_id;
 		updates = &isp_dev->other_cfgs.module_updates;
+		actives = &isp_dev->other_cfgs.module_actives;
+		curr_ens = &isp_dev->other_cfgs.cfgs[curr_id].module_ens;
+		new_ens = &isp_dev->other_cfgs.cfgs[new_id].module_ens;
 	}
 
 	if (flag == _GET_) {
-		*value = CIFISP_MODULE_IS_EN(*curr_ens, module);
+		*value = CIFISP_MODULE_IS_EN(
+			*curr_ens, (1 << module));
 		goto end;
 	}
 
-	if (CIFISP_MODULE_IS_EN(*curr_ens, module) != *value) {
+	if (CIFISP_MODULE_IS_UNACTIVE(*actives, (1 << module)) && *value)
+		goto end;
+
+	if ((CIFISP_MODULE_IS_EN(*curr_ens, (1 << module)) != *value) ||
+	    (CIFISP_MODULE_IS_UPDATE(*updates, (1 << module)))) {
 		if (*value)
-			CIFISP_MODULE_EN(*new_ens, module);
+			CIFISP_MODULE_EN(*new_ens, (1 << module));
 		else
-			CIFISP_MODULE_DIS(*new_ens, module);
-
-		CIFISP_MODULE_UPDATE(*updates, module);
+			CIFISP_MODULE_DIS(*new_ens, (1 << module));
+		CIFISP_MODULE_UPDATE(*updates, (1 << module));
 	}
 
 end:
@@ -362,11 +387,13 @@ static int cifisp_module_enable(struct cif_isp10_isp_dev *isp_dev,
 
 /* ISP BP interface function */
 static int cifisp_dpcc_param(struct cif_isp10_isp_dev *isp_dev,
-			    bool flag, struct cifisp_dpcc_config *arg)
+			     bool flag, struct cifisp_dpcc_config *arg)
 {
 	unsigned long lock_flags = 0;
 	unsigned int i;
 	struct cifisp_dpcc_methods_config *method;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_dpcc_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg) {
@@ -378,18 +405,28 @@ static int cifisp_dpcc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_DPCC_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].dpcc_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].dpcc_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->dpcc_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_DPCC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_DPCC);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->dpcc_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_DPCC) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -409,16 +446,16 @@ static int cifisp_dpcc_param(struct cif_isp10_isp_dev *isp_dev,
 	method = &arg->methods[i];
 	for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
 		if ((method->method &
-			CIFISP_DPCC_METHODS_SET_RESERVED) ||
-			(method->line_thresh &
-			CIFISP_DPCC_LINE_THRESH_RESERVED) ||
-			(method->line_mad_fac &
-			CIFISP_DPCC_LINE_MAD_FAC_RESERVED) ||
-			(method->pg_fac &
-			CIFISP_DPCC_PG_FAC_RESERVED) ||
-			(method->rnd_thresh &
-			CIFISP_DPCC_RND_THRESH_RESERVED) ||
-			(method->rg_fac & CIFISP_DPCC_RG_FAC_RESERVED)) {
+		    CIFISP_DPCC_METHODS_SET_RESERVED) ||
+		    (method->line_thresh &
+		    CIFISP_DPCC_LINE_THRESH_RESERVED) ||
+		    (method->line_mad_fac &
+		    CIFISP_DPCC_LINE_MAD_FAC_RESERVED) ||
+		    (method->pg_fac &
+		    CIFISP_DPCC_PG_FAC_RESERVED) ||
+		    (method->rnd_thresh &
+		    CIFISP_DPCC_RND_THRESH_RESERVED) ||
+		    (method->rg_fac & CIFISP_DPCC_RG_FAC_RESERVED)) {
 			CIFISP_DPRINT(CIFISP_ERROR,
 			      "incompatible param in function: %s\n", __func__);
 			retval = -EINVAL;
@@ -427,9 +464,7 @@ static int cifisp_dpcc_param(struct cif_isp10_isp_dev *isp_dev,
 		method++;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->dpcc_config,
-		arg,
-		sizeof(struct cifisp_dpcc_config));
+	memcpy(new_cfg, arg, sizeof(struct cifisp_dpcc_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_DPCC);
@@ -444,6 +479,8 @@ static int cifisp_bls_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_bls_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_bls_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -451,18 +488,28 @@ static int cifisp_bls_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_BLS_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].bls_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].bls_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->bls_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_BLS)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_BLS);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->bls_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_BLS) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -491,9 +538,9 @@ static int cifisp_bls_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->bls_config,
-		arg,
-		sizeof(struct cifisp_bls_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_bls_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_BLS);
@@ -509,6 +556,8 @@ static int cifisp_lsc_param(struct cif_isp10_isp_dev *isp_dev,
 {
 	int i;
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_lsc_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -516,18 +565,28 @@ static int cifisp_lsc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_LSC_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].lsc_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].lsc_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->lsc_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_LSC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_LSC);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->lsc_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_LSC) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -567,19 +626,19 @@ static int cifisp_lsc_param(struct cif_isp10_isp_dev *isp_dev,
 			(*(arg->b_data_tbl + i) &
 			CIFISP_LSC_SAMPLE_RESERVED)) {
 			CIFISP_DPRINT(CIFISP_ERROR,
-					"incompatible sample r 0x%x gr 0x%x gb 0x%x b 0x%x in function: %s\n",
-					*(arg->r_data_tbl + i),
-					*(arg->gr_data_tbl + i),
-					*(arg->gb_data_tbl + i),
-					*(arg->b_data_tbl + i), __func__);
+				      "incompatible sample r 0x%x gr 0x%x gb 0x%x b 0x%x in function: %s\n",
+				      *(arg->r_data_tbl + i),
+				      *(arg->gr_data_tbl + i),
+				      *(arg->gb_data_tbl + i),
+				      *(arg->b_data_tbl + i), __func__);
 			retval = -EINVAL;
 			goto end;
 		}
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->lsc_config,
-		arg,
-		sizeof(struct cifisp_lsc_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_lsc_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_LSC);
@@ -594,6 +653,8 @@ static int cifisp_flt_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_flt_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_flt_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -601,18 +662,28 @@ static int cifisp_flt_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_FLT_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].flt_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].flt_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->flt_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_FLT)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_FLT);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->flt_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_FLT) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -620,28 +691,28 @@ static int cifisp_flt_param(struct cif_isp10_isp_dev *isp_dev,
 
 	/* Parameter check */
 	if (arg->mode > CIFISP_FLT_MODE_MAX ||
-		arg->grn_stage1 > CIFISP_FLT_GREEN_STAGE1_MAX ||
-		arg->chr_v_mode > CIFISP_FLT_CHROMA_MODE_MAX ||
-		arg->chr_h_mode > CIFISP_FLT_CHROMA_MODE_MAX ||
-		arg->thresh_sh0 & CIFISP_FLT_THREAD_RESERVED ||
-		arg->thresh_sh1 & CIFISP_FLT_THREAD_RESERVED ||
-		arg->thresh_bl0 & CIFISP_FLT_THREAD_RESERVED ||
-		arg->thresh_bl1 & CIFISP_FLT_THREAD_RESERVED ||
-		arg->fac_bl0 & CIFISP_FLT_FAC_RESERVED ||
-		arg->fac_bl1 & CIFISP_FLT_FAC_RESERVED ||
-		arg->fac_sh0 & CIFISP_FLT_FAC_RESERVED ||
-		arg->fac_sh1 & CIFISP_FLT_FAC_RESERVED ||
-		arg->fac_mid & CIFISP_FLT_FAC_RESERVED ||
-		arg->lum_weight & CIFISP_FLT_LUM_WEIGHT_RESERVED) {
+	    arg->grn_stage1 > CIFISP_FLT_GREEN_STAGE1_MAX ||
+	    arg->chr_v_mode > CIFISP_FLT_CHROMA_MODE_MAX ||
+	    arg->chr_h_mode > CIFISP_FLT_CHROMA_MODE_MAX ||
+	    arg->thresh_sh0 & CIFISP_FLT_THREAD_RESERVED ||
+	    arg->thresh_sh1 & CIFISP_FLT_THREAD_RESERVED ||
+	    arg->thresh_bl0 & CIFISP_FLT_THREAD_RESERVED ||
+	    arg->thresh_bl1 & CIFISP_FLT_THREAD_RESERVED ||
+	    arg->fac_bl0 & CIFISP_FLT_FAC_RESERVED ||
+	    arg->fac_bl1 & CIFISP_FLT_FAC_RESERVED ||
+	    arg->fac_sh0 & CIFISP_FLT_FAC_RESERVED ||
+	    arg->fac_sh1 & CIFISP_FLT_FAC_RESERVED ||
+	    arg->fac_mid & CIFISP_FLT_FAC_RESERVED ||
+	    arg->lum_weight & CIFISP_FLT_LUM_WEIGHT_RESERVED) {
 		CIFISP_DPRINT(CIFISP_ERROR,
 			      "incompatible param in function: %s\n", __func__);
 		retval = -EINVAL;
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->flt_config,
-		arg,
-		sizeof(struct cifisp_flt_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_flt_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_FLT);
@@ -656,6 +727,8 @@ static int cifisp_bdm_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_bdm_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_bdm_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -663,26 +736,36 @@ static int cifisp_bdm_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_BDM_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].bdm_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].bdm_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->bdm_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_BDM)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_BDM);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->bdm_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_BDM) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->bdm_config,
-		arg,
-		sizeof(struct cifisp_bdm_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_bdm_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_BDM);
@@ -698,6 +781,8 @@ static int cifisp_sdg_param(struct cif_isp10_isp_dev *isp_dev,
 {
 	unsigned long lock_flags = 0;
 	unsigned int i;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_sdg_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -705,18 +790,28 @@ static int cifisp_sdg_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_SDG_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].sdg_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].sdg_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->sdg_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_SDG)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_SDG);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->sdg_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_SDG) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -732,8 +827,8 @@ static int cifisp_sdg_param(struct cif_isp10_isp_dev *isp_dev,
 
 	for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
 		if ((arg->curve_b.gamma_y[i] & CIFISP_DEGAMMA_Y_RESERVED) ||
-			(arg->curve_r.gamma_y[i] & CIFISP_DEGAMMA_Y_RESERVED) ||
-			(arg->curve_g.gamma_y[i] & CIFISP_DEGAMMA_Y_RESERVED)) {
+		    (arg->curve_r.gamma_y[i] & CIFISP_DEGAMMA_Y_RESERVED) ||
+		    (arg->curve_g.gamma_y[i] & CIFISP_DEGAMMA_Y_RESERVED)) {
 			CIFISP_DPRINT(CIFISP_ERROR,
 			      "incompatible param in function: %s\n", __func__);
 			retval = -EINVAL;
@@ -741,9 +836,9 @@ static int cifisp_sdg_param(struct cif_isp10_isp_dev *isp_dev,
 		}
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->sdg_config,
-		arg,
-		sizeof(struct cifisp_sdg_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_sdg_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_SDG);
@@ -758,6 +853,8 @@ static int cifisp_goc_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_goc_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_goc_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -765,18 +862,28 @@ static int cifisp_goc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_GOC_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].goc_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].goc_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->goc_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_GOC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_GOC);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->goc_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_GOC) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -784,15 +891,15 @@ static int cifisp_goc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	if (arg->mode > CIFISP_GOC_MODE_MAX) {
 		CIFISP_DPRINT(CIFISP_ERROR,
-				      "incompatible param 0x%x in  function: %s\n",
-				      arg->mode, __func__);
+			      "incompatible param 0x%x in  function: %s\n",
+			      arg->mode, __func__);
 		retval = -EINVAL;
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->goc_config,
-		arg,
-		sizeof(struct cifisp_goc_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_goc_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_GOC);
@@ -807,6 +914,8 @@ static int cifisp_ctk_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_ctk_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_ctk_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -814,18 +923,28 @@ static int cifisp_ctk_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_CTK_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].ctk_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].ctk_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->ctk_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_CTK)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_CTK);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->ctk_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_CTK) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -850,9 +969,9 @@ static int cifisp_ctk_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->ctk_config,
-		arg,
-		sizeof(struct cifisp_ctk_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_ctk_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_CTK);
@@ -867,6 +986,8 @@ static int cifisp_awb_meas_param(struct cif_isp10_isp_dev *isp_dev,
 				 bool flag, struct cifisp_awb_meas_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_awb_meas_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -874,18 +995,28 @@ static int cifisp_awb_meas_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->meas_cfgs.log[CIFISP_AWB_ID];
+	curr_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].awb_meas_config;
+	new_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->new_id].awb_meas_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->meas_cfgs.curr->awb_meas_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->meas_cfgs.module_actives,
+		CIFISP_MODULE_AWB)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_AWB);
 
-	if (memcmp(arg,
-		&isp_dev->meas_cfgs.curr->awb_meas_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_AWB) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -903,9 +1034,9 @@ static int cifisp_awb_meas_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->meas_cfgs.last_or_new->awb_meas_config,
-		arg,
-		sizeof(struct cifisp_awb_meas_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_awb_meas_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->meas_cfgs.module_updates,
 		CIFISP_MODULE_AWB);
@@ -919,6 +1050,8 @@ static int cifisp_awb_gain_param(struct cif_isp10_isp_dev *isp_dev,
 				 bool flag, struct cifisp_awb_gain_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_awb_gain_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -926,18 +1059,28 @@ static int cifisp_awb_gain_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_AWB_GAIN_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].awb_gain_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].awb_gain_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->awb_gain_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_AWB_GAIN)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_AWB_GAIN);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->awb_gain_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_AWB_GAIN) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -953,9 +1096,9 @@ static int cifisp_awb_gain_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->awb_gain_config,
-		arg,
-		sizeof(struct cifisp_awb_gain_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_awb_gain_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_AWB_GAIN);
@@ -969,6 +1112,8 @@ static int cifisp_aec_param(struct cif_isp10_isp_dev *isp_dev,
 			    bool flag, struct cifisp_aec_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_aec_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -976,39 +1121,36 @@ static int cifisp_aec_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->meas_cfgs.log[CIFISP_AEC_ID];
+	curr_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].aec_config;
+	new_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->new_id].aec_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->meas_cfgs.curr->aec_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->meas_cfgs.module_actives,
+		CIFISP_MODULE_AEC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_AEC);
 
-	if (memcmp(arg,
-		&isp_dev->meas_cfgs.curr->aec_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+	    isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].module_ens,
+	    CIFISP_MODULE_AEC) &&
+	    memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
 	}
 
-	if (arg->meas_window.h_offs > CIFISP_EXP_MAX_HOFFS ||
-		arg->meas_window.h_size > CIFISP_EXP_MAX_HSIZE ||
-		arg->meas_window.h_size < CIFISP_EXP_MIN_HSIZE ||
-		arg->meas_window.v_offs > CIFISP_EXP_MAX_VOFFS ||
-		arg->meas_window.v_size > CIFISP_EXP_MAX_VSIZE ||
-		arg->meas_window.v_size < CIFISP_EXP_MIN_VSIZE ||
-		arg->mode > CIFISP_EXP_MEASURING_MODE_1) {
-		CIFISP_DPRINT(CIFISP_ERROR,
-			      "incompatible param in function: %s\n", __func__);
-		retval = -EINVAL;
-		goto end;
-	}
-
-	memcpy(&isp_dev->meas_cfgs.last_or_new->aec_config,
-		arg,
-		sizeof(struct cifisp_aec_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_aec_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->meas_cfgs.module_updates,
 		CIFISP_MODULE_AEC);
@@ -1022,6 +1164,8 @@ static int cifisp_cproc_param(struct cif_isp10_isp_dev *isp_dev,
 			      bool flag, struct cifisp_cproc_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_cproc_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1029,18 +1173,28 @@ static int cifisp_cproc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_CPROC_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].cproc_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].cproc_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->cproc_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_CPROC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_CPROC);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->cproc_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_CPROC) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -1059,9 +1213,9 @@ static int cifisp_cproc_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->cproc_config,
-		arg,
-		sizeof(struct cifisp_cproc_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_cproc_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_CPROC);
@@ -1076,6 +1230,8 @@ static int cifisp_hst_param(struct cif_isp10_isp_dev *isp_dev,
 {
 	unsigned long lock_flags = 0;
 	unsigned int i;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_hst_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1083,32 +1239,42 @@ static int cifisp_hst_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->meas_cfgs.log[CIFISP_HST_ID];
+	curr_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].hst_config;
+	new_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->new_id].hst_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->meas_cfgs.curr->hst_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->meas_cfgs.module_actives,
+		CIFISP_MODULE_HST)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
-	if (memcmp(arg,
-		&isp_dev->meas_cfgs.curr->hst_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_HST) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
 	}
 
 	if (arg->mode > CIFISP_HISTOGRAM_MODE_Y_HISTOGRAM ||
-		arg->histogram_predivider > CIFISP_MAX_HIST_PREDIVIDER ||
-		arg->meas_window.v_offs & CIFISP_HIST_WINDOW_OFFSET_RESERVED ||
-		arg->meas_window.h_offs & CIFISP_HIST_WINDOW_OFFSET_RESERVED ||
-		(arg->meas_window.v_size / (CIFISP_HIST_ROW_NUM - 1)) &
-			CIFISP_HIST_WINDOW_SIZE_RESERVED ||
-		(arg->meas_window.h_size / (CIFISP_HIST_COLUMN_NUM - 1)) &
-			CIFISP_HIST_WINDOW_SIZE_RESERVED) {
+	    arg->histogram_predivider > CIFISP_MAX_HIST_PREDIVIDER ||
+	    arg->meas_window.v_offs & CIFISP_HIST_WINDOW_OFFSET_RESERVED ||
+	    arg->meas_window.h_offs & CIFISP_HIST_WINDOW_OFFSET_RESERVED ||
+	    (arg->meas_window.v_size / (CIFISP_HIST_ROW_NUM - 1)) &
+		CIFISP_HIST_WINDOW_SIZE_RESERVED ||
+	    (arg->meas_window.h_size / (CIFISP_HIST_COLUMN_NUM - 1)) &
+		CIFISP_HIST_WINDOW_SIZE_RESERVED) {
 		CIFISP_DPRINT(CIFISP_ERROR,
-		"incompatible param in function: %s line: %d\n",
-		__func__, __LINE__);
+			"incompatible param in function: %s line: %d\n",
+			__func__, __LINE__);
 		retval = -EINVAL;
 		goto end;
 	}
@@ -1116,16 +1282,16 @@ static int cifisp_hst_param(struct cif_isp10_isp_dev *isp_dev,
 	for (i = 0; i < CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE; i++) {
 		if (arg->hist_weight[i] & CIFISP_HIST_WEIGHT_RESERVED) {
 			CIFISP_DPRINT(CIFISP_ERROR,
-			"incompatible param in function: %s line: %d\n",
-			__func__, __LINE__);
+				"incompatible param in function: %s line: %d\n",
+				__func__, __LINE__);
 			retval = -EINVAL;
 			goto end;
 		}
 	}
 
-	memcpy(&isp_dev->meas_cfgs.last_or_new->hst_config,
-		arg,
-		sizeof(struct cifisp_hst_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_hst_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->meas_cfgs.module_updates,
 		CIFISP_MODULE_HST);
@@ -1140,6 +1306,8 @@ static int cifisp_afc_param(struct cif_isp10_isp_dev *isp_dev,
 {
 	unsigned long lock_flags = 0;
 	int i;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_afc_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1147,18 +1315,28 @@ static int cifisp_afc_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->meas_cfgs.log[CIFISP_AFC_ID];
+	curr_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].afc_config;
+	new_cfg = &isp_dev->meas_cfgs.cfgs[cfg_log->new_id].afc_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->meas_cfgs.curr->afc_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->meas_cfgs.module_actives,
+		CIFISP_MODULE_AFC)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_AFC);
 
-	if (memcmp(arg,
-		&isp_dev->meas_cfgs.curr->afc_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->meas_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_AFC) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -1188,9 +1366,9 @@ static int cifisp_afc_param(struct cif_isp10_isp_dev *isp_dev,
 		}
 	}
 
-	memcpy(&isp_dev->meas_cfgs.last_or_new->afc_config,
-		arg,
-		sizeof(struct cifisp_afc_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_afc_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->meas_cfgs.module_updates,
 		CIFISP_MODULE_AFC);
@@ -1201,9 +1379,11 @@ static int cifisp_afc_param(struct cif_isp10_isp_dev *isp_dev,
 }
 
 static int cifisp_ie_param(struct cif_isp10_isp_dev *isp_dev,
-			    bool flag, struct cifisp_ie_config *arg)
+			   bool flag, struct cifisp_ie_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_ie_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1211,40 +1391,50 @@ static int cifisp_ie_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_IE_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].ie_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].ie_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->ie_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_IE)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_IE);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->ie_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_IE) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
 	}
 
 	if (arg->effect != V4L2_COLORFX_NONE &&
-			arg->effect != V4L2_COLORFX_BW &&
-			arg->effect != V4L2_COLORFX_SEPIA &&
-			arg->effect != V4L2_COLORFX_NEGATIVE &&
-			arg->effect != V4L2_COLORFX_EMBOSS &&
-			arg->effect != V4L2_COLORFX_SKETCH &&
-			arg->effect != V4L2_COLORFX_AQUA &&
-			arg->effect != V4L2_COLORFX_SET_CBCR) {
+	    arg->effect != V4L2_COLORFX_BW &&
+	    arg->effect != V4L2_COLORFX_SEPIA &&
+	    arg->effect != V4L2_COLORFX_NEGATIVE &&
+	    arg->effect != V4L2_COLORFX_EMBOSS &&
+	    arg->effect != V4L2_COLORFX_SKETCH &&
+	    arg->effect != V4L2_COLORFX_AQUA &&
+	    arg->effect != V4L2_COLORFX_SET_CBCR) {
 		CIFISP_DPRINT(CIFISP_ERROR,
 			      "incompatible param in function: %s\n", __func__);
 		retval = -EINVAL;
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->ie_config,
-		arg,
-		sizeof(struct cifisp_ie_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_ie_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_IE);
@@ -1260,6 +1450,8 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 {
 	unsigned long lock_flags = 0;
 	unsigned int i;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_dpf_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1267,18 +1459,28 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_DPF_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].dpf_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].dpf_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->dpf_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_DPF)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_DPF);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->dpf_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_DPF) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
@@ -1286,24 +1488,24 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 
 	/* Parameter check */
 	if ((arg->gain.mode >= CIFISP_DPF_GAIN_USAGE_MAX) ||
-		(arg->gain.mode < CIFISP_DPF_GAIN_USAGE_DISABLED) ||
-		(arg->gain.nf_b_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
-		(arg->gain.nf_r_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
-		(arg->gain.nf_gr_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
-		(arg->gain.nf_gb_gain & CIFISP_DPF_NF_GAIN_RESERVED)) {
+	    (arg->gain.mode < CIFISP_DPF_GAIN_USAGE_DISABLED) ||
+	    (arg->gain.nf_b_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
+	    (arg->gain.nf_r_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
+	    (arg->gain.nf_gr_gain & CIFISP_DPF_NF_GAIN_RESERVED) ||
+	    (arg->gain.nf_gb_gain & CIFISP_DPF_NF_GAIN_RESERVED)) {
 		CIFISP_DPRINT(CIFISP_ERROR,
-		"incompatible DPF GAIN param in function: %s\n",
-		__func__);
+			"incompatible DPF GAIN param in function: %s\n",
+			__func__);
 		retval = -EINVAL;
 		goto end;
 	}
 
 	for (i = 0; i < CIFISP_DPF_MAX_SPATIAL_COEFFS; i++) {
 		if ((arg->g_flt.spatial_coeff[i] >
-			CIFISP_DPF_SPATIAL_COEFF_MAX)) {
+		    CIFISP_DPF_SPATIAL_COEFF_MAX)) {
 			CIFISP_DPRINT(CIFISP_ERROR,
-			"incompatible DPF G Spatial param in function: %s\n",
-			__func__);
+				"incompatible DPF G Spatial param in function: %s\n",
+				__func__);
 			retval = -EINVAL;
 			goto end;
 		}
@@ -1311,15 +1513,15 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 		if (arg->rb_flt.spatial_coeff[i] >
 			CIFISP_DPF_SPATIAL_COEFF_MAX) {
 			CIFISP_DPRINT(CIFISP_ERROR,
-			"incompatible DPF RB Spatial param in function: %s\n",
-			__func__);
+				"incompatible DPF RB Spatial param in function: %s\n",
+				__func__);
 			retval = -EINVAL;
 			goto end;
 		}
 	}
 
 	if ((arg->rb_flt.fltsize != CIFISP_DPF_RB_FILTERSIZE_9x9) &&
-		(arg->rb_flt.fltsize != CIFISP_DPF_RB_FILTERSIZE_13x9)) {
+	    (arg->rb_flt.fltsize != CIFISP_DPF_RB_FILTERSIZE_13x9)) {
 		CIFISP_DPRINT(CIFISP_ERROR,
 			"incompatible DPF RB filter size param in function: %s\n",
 			__func__);
@@ -1338,7 +1540,7 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 	}
 
 	if ((arg->nll.scale_mode != CIFISP_NLL_SCALE_LINEAR) &&
-		(arg->nll.scale_mode != CIFISP_NLL_SCALE_LOGARITHMIC)) {
+	    (arg->nll.scale_mode != CIFISP_NLL_SCALE_LOGARITHMIC)) {
 		CIFISP_DPRINT(CIFISP_ERROR,
 			"incompatible DPF NLL scale mode param in function: %s\n",
 			__func__);
@@ -1346,9 +1548,9 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->dpf_config,
-		arg,
-		sizeof(struct cifisp_dpf_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_dpf_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_DPF);
@@ -1359,9 +1561,11 @@ static int cifisp_dpf_param(struct cif_isp10_isp_dev *isp_dev,
 }
 
 static int cifisp_dpf_strength_param(struct cif_isp10_isp_dev *isp_dev,
-			    bool flag, struct cifisp_dpf_strength_config *arg)
+				     bool flag, struct cifisp_dpf_strength_config *arg)
 {
 	unsigned long lock_flags = 0;
+	struct cif_isp10_isp_cfgs_log *cfg_log;
+	struct cifisp_dpf_strength_config *curr_cfg, *new_cfg;
 	int retval = 0;
 
 	if (!arg)
@@ -1369,26 +1573,36 @@ static int cifisp_dpf_strength_param(struct cif_isp10_isp_dev *isp_dev,
 
 	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
 
+	cfg_log = &isp_dev->other_cfgs.log[CIFISP_DPF_STRENGTH_ID];
+	curr_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->curr_id].dpf_strength_config;
+	new_cfg = &isp_dev->other_cfgs.cfgs[cfg_log->new_id].dpf_strength_config;
+
 	if (flag == _GET_) {
-		memcpy(arg,
-			&isp_dev->other_cfgs.curr->dpf_strength_config,
-			sizeof(*arg));
+		memcpy(arg, curr_cfg, sizeof(*arg));
+		goto end;
+	}
+
+	if (CIFISP_MODULE_IS_UNACTIVE(isp_dev->other_cfgs.module_actives,
+		CIFISP_MODULE_DPF_STRENGTH)) {
+		CIFISP_DPRINT(CIFISP_ERROR,
+			      "module is unactive in function: %s\n", __func__);
 		goto end;
 	}
 
 	cifisp_param_dump(arg, CIFISP_MODULE_DPF_STRENGTH);
 
-	if (memcmp(arg,
-		&isp_dev->other_cfgs.curr->dpf_strength_config,
-		sizeof(*arg)) == 0) {
+	if (CIFISP_MODULE_IS_EN(
+		isp_dev->other_cfgs.cfgs[cfg_log->curr_id].module_ens,
+		CIFISP_MODULE_DPF_STRENGTH) &&
+		memcmp(arg, curr_cfg, sizeof(*arg)) == 0) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			      "same param in function: %s\n", __func__);
 		goto end;
 	}
 
-	memcpy(&isp_dev->other_cfgs.last_or_new->dpf_strength_config,
-		arg,
-		sizeof(struct cifisp_dpf_strength_config));
+	memcpy(new_cfg,
+	       arg,
+	       sizeof(struct cifisp_dpf_strength_config));
 	CIFISP_MODULE_UPDATE(
 		isp_dev->other_cfgs.module_updates,
 		CIFISP_MODULE_DPF_STRENGTH);
@@ -1415,31 +1629,33 @@ static int cifisp_last_capture_config(struct cifisp_last_capture_config *arg)
 /* DPCC */
 static void cifisp_dpcc_config(const struct cif_isp10_isp_dev *isp_dev)
 {
-	const struct cifisp_dpcc_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->dpcc_config;
 	unsigned int i;
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_DPCC_ID].new_id;
+	const struct cifisp_dpcc_config *pconfig =
+		&isp_dev->other_cfgs.cfgs[new_id].dpcc_config;
 
 	cifisp_iowrite32(pconfig->mode, CIF_ISP_DPCC_MODE);
 	cifisp_iowrite32(pconfig->output_mode, CIF_ISP_DPCC_OUTPUT_MODE);
 	cifisp_iowrite32(pconfig->set_use, CIF_ISP_DPCC_SET_USE);
 
 	cifisp_iowrite32(pconfig->methods[0].method,
-			CIF_ISP_DPCC_METHODS_SET_1);
+			 CIF_ISP_DPCC_METHODS_SET_1);
 	cifisp_iowrite32(pconfig->methods[1].method,
-			CIF_ISP_DPCC_METHODS_SET_2);
+			 CIF_ISP_DPCC_METHODS_SET_2);
 	cifisp_iowrite32(pconfig->methods[2].method,
-			CIF_ISP_DPCC_METHODS_SET_3);
+			 CIF_ISP_DPCC_METHODS_SET_3);
 	for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
 		cifisp_iowrite32(pconfig->methods[i].line_thresh,
-			CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 * i);
+				 CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 * i);
 		cifisp_iowrite32(pconfig->methods[i].line_mad_fac,
-			CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 * i);
+				 CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 * i);
 		cifisp_iowrite32(pconfig->methods[i].pg_fac,
-			CIF_ISP_DPCC_PG_FAC_1 + 0x14 * i);
+				 CIF_ISP_DPCC_PG_FAC_1 + 0x14 * i);
 		cifisp_iowrite32(pconfig->methods[i].rnd_thresh,
-			CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * i);
+				 CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * i);
 		cifisp_iowrite32(pconfig->methods[i].rg_fac,
-			CIF_ISP_DPCC_RG_FAC_1 + 0x14 * i);
+				 CIF_ISP_DPCC_RG_FAC_1 + 0x14 * i);
 	}
 
 	cifisp_iowrite32(pconfig->rnd_offs, CIF_ISP_DPCC_RND_OFFS);
@@ -1469,8 +1685,10 @@ static bool cifisp_lsc_correct_matrix_config(struct cif_isp10_isp_dev *isp_dev)
 	int i, n;
 	unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
 	unsigned int data;
-	struct cifisp_lsc_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->lsc_config;
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_LSC_ID].new_id;
+	const struct cifisp_lsc_config *pconfig =
+		&isp_dev->other_cfgs.cfgs[new_id].lsc_config;
 
 	isp_lsc_status = cifisp_ioread32(CIF_ISP_LSC_STATUS);
 	sram_addr = (isp_lsc_status & 0x2U) ? 0U : 153U; /* ( 17 * 18 ) >> 1 */
@@ -1489,7 +1707,8 @@ static bool cifisp_lsc_correct_matrix_config(struct cif_isp10_isp_dev *isp_dev)
 		 * DWORDs (8 steps + 1 outside loop)
 		 */
 		for (i = 0; i < (CIFISP_LSC_SECTORS_MAX); i += 2) {
-			data = CIFISP_LSC_TABLE_DATA(pconfig->r_data_tbl[n + i],
+			data = CIFISP_LSC_TABLE_DATA(
+				pconfig->r_data_tbl[n + i],
 				pconfig->r_data_tbl[n + i + 1]);
 			cifisp_iowrite32(data, CIF_ISP_LSC_R_TABLE_DATA);
 
@@ -1503,7 +1722,8 @@ static bool cifisp_lsc_correct_matrix_config(struct cif_isp10_isp_dev *isp_dev)
 				pconfig->gb_data_tbl[n + i + 1]);
 			cifisp_iowrite32(data, CIF_ISP_LSC_GB_TABLE_DATA);
 
-			data = CIFISP_LSC_TABLE_DATA(pconfig->b_data_tbl[n + i],
+			data = CIFISP_LSC_TABLE_DATA(
+				pconfig->b_data_tbl[n + i],
 				pconfig->b_data_tbl[n + i + 1]);
 			cifisp_iowrite32(data, CIF_ISP_LSC_B_TABLE_DATA);
 		}
@@ -1539,11 +1759,13 @@ static bool cifisp_lsc_config(struct cif_isp10_isp_dev *isp_dev)
 {
 	int i;
 	unsigned int data;
-	struct cifisp_lsc_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->lsc_config;
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_LSC_ID].new_id;
+	const struct cifisp_lsc_config *pconfig =
+		&isp_dev->other_cfgs.cfgs[new_id].lsc_config;
 
 	if (pconfig->config_width != isp_dev->input_width ||
-		pconfig->config_height != isp_dev->input_height) {
+	    pconfig->config_height != isp_dev->input_height) {
 		CIFISP_DPRINT(CIFISP_DEBUG,
 			"LSC config: lsc_w %d lsc_h %d act_w %d act_h %d\n",
 			pconfig->config_width,
@@ -1554,49 +1776,44 @@ static bool cifisp_lsc_config(struct cif_isp10_isp_dev *isp_dev)
 	}
 
 	CIFISP_DPRINT(CIFISP_DEBUG,
-		"LSC config: lsc_w %d lsc_h %d\n",
-		pconfig->config_width,
-		pconfig->config_height);
+		      "LSC config: lsc_w %d lsc_h %d\n",
+		      pconfig->config_width,
+		      pconfig->config_height);
 
 	/* To config must be off */
 	cifisp_iowrite32(0, CIF_ISP_LSC_CTRL);
 
 	cifisp_lsc_correct_matrix_config(isp_dev);
 
-	if (isp_dev->active_lsc_width !=
-		pconfig->config_width ||
-		isp_dev->active_lsc_height !=
-		pconfig->config_height) {
-		for (i = 0; i < 4; i++) {
-			/* program x size tables */
-			data = CIFISP_LSC_SECT_SIZE(
-					pconfig->x_size_tbl[i * 2],
-					pconfig->x_size_tbl[i * 2 + 1]);
-			cifisp_iowrite32(data, CIF_ISP_LSC_XSIZE_01 + i * 4);
-
-			/* program x grad tables */
-			data = CIFISP_LSC_SECT_SIZE(
-					pconfig->x_grad_tbl[i * 2],
-					pconfig->x_grad_tbl[i * 2 + 1]);
-			cifisp_iowrite32(data, CIF_ISP_LSC_XGRAD_01 + i * 4);
-
-			/* program y size tables */
-			data = CIFISP_LSC_SECT_SIZE(
-					pconfig->y_size_tbl[i * 2],
-					pconfig->y_size_tbl[i * 2 + 1]);
-			cifisp_iowrite32(data, CIF_ISP_LSC_YSIZE_01 + i * 4);
-
-			/* program y grad tables */
-			data = CIFISP_LSC_SECT_SIZE(
-					pconfig->y_grad_tbl[i * 2],
-					pconfig->y_grad_tbl[i * 2 + 1]);
-			cifisp_iowrite32(data, CIF_ISP_LSC_YGRAD_01 + i * 4);
-		}
-
-		isp_dev->active_lsc_width = pconfig->config_width;
-		isp_dev->active_lsc_height = pconfig->config_height;
+	for (i = 0; i < 4; i++) {
+		/* program x size tables */
+		data = CIFISP_LSC_SECT_SIZE(
+				pconfig->x_size_tbl[i*2],
+				pconfig->x_size_tbl[i*2 + 1]);
+		cifisp_iowrite32(data, CIF_ISP_LSC_XSIZE_01 + i * 4);
+
+		/* program x grad tables */
+		data = CIFISP_LSC_SECT_SIZE(
+				pconfig->x_grad_tbl[i*2],
+				pconfig->x_grad_tbl[i*2 + 1]);
+		cifisp_iowrite32(data, CIF_ISP_LSC_XGRAD_01 + i * 4);
+
+		/* program y size tables */
+		data = CIFISP_LSC_SECT_SIZE(
+				pconfig->y_size_tbl[i*2],
+				pconfig->y_size_tbl[i*2 + 1]);
+		cifisp_iowrite32(data, CIF_ISP_LSC_YSIZE_01 + i * 4);
+
+		/* program y grad tables */
+		data = CIFISP_LSC_SECT_SIZE(
+				pconfig->y_grad_tbl[i*2],
+				pconfig->y_grad_tbl[i*2 + 1]);
+		cifisp_iowrite32(data, CIF_ISP_LSC_YGRAD_01 + i * 4);
 	}
 
+	isp_dev->active_lsc_width = pconfig->config_width;
+	isp_dev->active_lsc_height = pconfig->config_height;
+
 	cifisp_iowrite32(1, CIF_ISP_LSC_CTRL);
 
 	return true;
@@ -1612,7 +1829,7 @@ static void cifisp_lsc_config_read(const struct cif_isp10_isp_dev *isp_dev,
 
 /*****************************************************************************/
 static void cifisp_bls_get_meas(const struct cif_isp10_isp_dev *isp_dev,
-	struct cifisp_stat_buffer *pbuf)
+				struct cifisp_stat_buffer *pbuf)
 {
 	const struct cif_isp10_device *cif_dev =
 		container_of(isp_dev, struct cif_isp10_device, isp_dev);
@@ -1661,8 +1878,10 @@ static void cifisp_bls_get_meas(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_bls_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_BLS_ID].new_id;
 	const struct cifisp_bls_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->bls_config;
+		&isp_dev->other_cfgs.cfgs[new_id].bls_config;
 	u32 new_control = 0;
 	const struct cif_isp10_device *cif_dev =
 		container_of(isp_dev, struct cif_isp10_device, isp_dev);
@@ -1673,7 +1892,7 @@ static void cifisp_bls_config(const struct cif_isp10_isp_dev *isp_dev)
 	/* fixed subtraction values */
 	if (!pconfig->enable_auto) {
 		const struct cifisp_bls_fixed_val *pval =
-		    &isp_dev->other_cfgs.last_or_new->bls_config.fixed_val;
+			&pconfig->fixed_val;
 
 		if (CIF_ISP10_PIX_FMT_BAYER_PAT_IS_BGGR(in_pix_fmt)) {
 			cifisp_iowrite32(pval->r, CIF_ISP_BLS_D_FIXED);
@@ -1702,25 +1921,25 @@ static void cifisp_bls_config(const struct cif_isp10_isp_dev *isp_dev)
 	} else {
 		if (pconfig->en_windows & 2) {
 			cifisp_iowrite32(pconfig->bls_window2.h_offs,
-				      CIF_ISP_BLS_H2_START);
+					 CIF_ISP_BLS_H2_START);
 			cifisp_iowrite32(pconfig->bls_window2.h_size,
-				      CIF_ISP_BLS_H2_STOP);
+					 CIF_ISP_BLS_H2_STOP);
 			cifisp_iowrite32(pconfig->bls_window2.v_offs,
-				      CIF_ISP_BLS_V2_START);
+					 CIF_ISP_BLS_V2_START);
 			cifisp_iowrite32(pconfig->bls_window2.v_size,
-				      CIF_ISP_BLS_V2_STOP);
+					 CIF_ISP_BLS_V2_STOP);
 			new_control |= CIFISP_BLS_WINDOW_2;
 		}
 
 		if (pconfig->en_windows & 1) {
 			cifisp_iowrite32(pconfig->bls_window1.h_offs,
-				      CIF_ISP_BLS_H1_START);
+					 CIF_ISP_BLS_H1_START);
 			cifisp_iowrite32(pconfig->bls_window1.h_size,
-				      CIF_ISP_BLS_H1_STOP);
+					 CIF_ISP_BLS_H1_STOP);
 			cifisp_iowrite32(pconfig->bls_window1.v_offs,
-				      CIF_ISP_BLS_V1_START);
+					 CIF_ISP_BLS_V1_START);
 			cifisp_iowrite32(pconfig->bls_window1.v_size,
-				      CIF_ISP_BLS_V1_STOP);
+					 CIF_ISP_BLS_V1_STOP);
 			new_control |= CIFISP_BLS_WINDOW_1;
 		}
 
@@ -1748,8 +1967,10 @@ static void cifisp_bls_end(const struct cif_isp10_isp_dev *isp_dev)
 /*****************************************************************************/
 static void cifisp_sdg_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_SDG_ID].new_id;
 	const struct cifisp_sdg_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->sdg_config;
+		&isp_dev->other_cfgs.cfgs[new_id].sdg_config;
 	unsigned int i;
 
 	cifisp_iowrite32(pconfig->xa_pnts.gamma_dx0, CIF_ISP_GAMMA_DX_LO);
@@ -1757,11 +1978,11 @@ static void cifisp_sdg_config(const struct cif_isp10_isp_dev *isp_dev)
 
 	for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
 		cifisp_iowrite32(pconfig->curve_r.gamma_y[i],
-			CIF_ISP_GAMMA_R_Y0 + i * 4);
+				 CIF_ISP_GAMMA_R_Y0 + i * 4);
 		cifisp_iowrite32(pconfig->curve_g.gamma_y[i],
-			CIF_ISP_GAMMA_G_Y0 + i * 4);
+				 CIF_ISP_GAMMA_G_Y0 + i * 4);
 		cifisp_iowrite32(pconfig->curve_b.gamma_y[i],
-			CIF_ISP_GAMMA_B_Y0 + i * 4);
+				 CIF_ISP_GAMMA_B_Y0 + i * 4);
 	}
 }
 
@@ -1788,15 +2009,17 @@ static void cifisp_sdg_end(const struct cif_isp10_isp_dev *isp_dev)
 static void cifisp_goc_config(const struct cif_isp10_isp_dev *isp_dev)
 {
 	int i;
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_GOC_ID].new_id;
 	const struct cifisp_goc_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->goc_config;
+		&isp_dev->other_cfgs.cfgs[new_id].goc_config;
 
 	cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA, CIF_ISP_CTRL);
 
 	cifisp_iowrite32(pconfig->mode, CIF_ISP_GAMMA_OUT_MODE);
 	for (i = 0; i < CIFISP_GAMMA_OUT_MAX_SAMPLES; i++)
 		cifisp_iowrite32(pconfig->gamma_y[i],
-		CIF_ISP_GAMMA_OUT_Y_0 + i * 4);
+				 CIF_ISP_GAMMA_OUT_Y_0 + i * 4);
 }
 
 #ifdef LOG_CAPTURE_PARAMS
@@ -1821,8 +2044,10 @@ static void cifisp_goc_end(const struct cif_isp10_isp_dev *isp_dev)
 /*****************************************************************************/
 static void cifisp_bdm_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_BDM_ID].new_id;
 	const struct cifisp_bdm_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->bdm_config;
+		&isp_dev->other_cfgs.cfgs[new_id].bdm_config;
 
 	/*set demosaic threshold */
 	cifisp_iowrite32(pconfig->demosaic_th, CIF_ISP_DEMOSAIC);
@@ -1843,29 +2068,31 @@ static void cifisp_bdm_end(const struct cif_isp10_isp_dev *isp_dev)
 /*****************************************************************************/
 static void cifisp_flt_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_FLT_ID].new_id;
 	const struct cifisp_flt_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->flt_config;
+		&isp_dev->other_cfgs.cfgs[new_id].flt_config;
 
 	cifisp_iowrite32(pconfig->thresh_bl0,
-		CIF_ISP_FILT_THRESH_BL0);
+			 CIF_ISP_FILT_THRESH_BL0);
 	cifisp_iowrite32(pconfig->thresh_bl1,
-		CIF_ISP_FILT_THRESH_BL1);
+			 CIF_ISP_FILT_THRESH_BL1);
 	cifisp_iowrite32(pconfig->thresh_sh0,
-		CIF_ISP_FILT_THRESH_SH0);
+			 CIF_ISP_FILT_THRESH_SH0);
 	cifisp_iowrite32(pconfig->thresh_sh1,
-		CIF_ISP_FILT_THRESH_SH1);
+			 CIF_ISP_FILT_THRESH_SH1);
 	cifisp_iowrite32(pconfig->fac_bl0,
-		CIF_ISP_FILT_FAC_BL0);
+			 CIF_ISP_FILT_FAC_BL0);
 	cifisp_iowrite32(pconfig->fac_bl1,
-		CIF_ISP_FILT_FAC_BL1);
+			 CIF_ISP_FILT_FAC_BL1);
 	cifisp_iowrite32(pconfig->fac_mid,
-		CIF_ISP_FILT_FAC_MID);
+			 CIF_ISP_FILT_FAC_MID);
 	cifisp_iowrite32(pconfig->fac_sh0,
-		CIF_ISP_FILT_FAC_SH0);
+			 CIF_ISP_FILT_FAC_SH0);
 	cifisp_iowrite32(pconfig->fac_sh1,
-		CIF_ISP_FILT_FAC_SH1);
+			 CIF_ISP_FILT_FAC_SH1);
 	cifisp_iowrite32(pconfig->lum_weight,
-		CIF_ISP_FILT_LUM_WEIGHT);
+			 CIF_ISP_FILT_LUM_WEIGHT);
 
 	cifisp_iowrite32(CIFISP_FLT_MODE(pconfig->mode) |
 		CIFISP_FLT_CHROMA_V_MODE(pconfig->chr_v_mode) |
@@ -1897,14 +2124,22 @@ static void cifisp_flt_end(const struct cif_isp10_isp_dev *isp_dev)
 /*****************************************************************************/
 static void cifisp_awb_gain_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_AWB_GAIN_ID].new_id;
+	unsigned int new_ens =
+		isp_dev->other_cfgs.cfgs[new_id].module_ens;
 	const struct cifisp_awb_gain_config *pconfig =
-	    &isp_dev->other_cfgs.last_or_new->awb_gain_config;
-
-	cifisp_iowrite32(CIFISP_AWB_GAIN_R_SET(pconfig->gain_green_r) |
-		      pconfig->gain_green_b, CIF_ISP_AWB_GAIN_G);
+		&isp_dev->other_cfgs.cfgs[new_id].awb_gain_config;
 
-	cifisp_iowrite32(CIFISP_AWB_GAIN_R_SET(pconfig->gain_red) |
-		      pconfig->gain_blue, CIF_ISP_AWB_GAIN_RB);
+	if (CIFISP_MODULE_IS_EN(new_ens, CIFISP_MODULE_AWB_GAIN)) {
+		cifisp_iowrite32(CIFISP_AWB_GAIN_R_SET(pconfig->gain_green_r) |
+			pconfig->gain_green_b, CIF_ISP_AWB_GAIN_G);
+		cifisp_iowrite32(CIFISP_AWB_GAIN_R_SET(pconfig->gain_red) |
+			pconfig->gain_blue, CIF_ISP_AWB_GAIN_RB);
+	} else {
+		cifisp_iowrite32(0x01000100, CIF_ISP_AWB_GAIN_G);
+		cifisp_iowrite32(0x01000100, CIF_ISP_AWB_GAIN_RB);
+	}
 }
 
 #ifdef LOG_CAPTURE_PARAMS
@@ -1924,8 +2159,10 @@ static void cifisp_awb_gain_config_read(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_awb_meas_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_AWB_ID].new_id;
 	const struct cifisp_awb_meas_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->awb_meas_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].awb_meas_config;
 	unsigned int awb_prob = 0;
 
 	/* based on the mode,configure the awb module */
@@ -1949,9 +2186,9 @@ static void cifisp_awb_meas_config(const struct cif_isp10_isp_dev *isp_dev)
 	cifisp_iowrite32(awb_prob, CIF_ISP_AWB_PROP);
 	/* window offset */
 	cifisp_iowrite32(pconfig->awb_wnd.v_offs,
-		CIF_ISP_AWB_WND_V_OFFS);
+			 CIF_ISP_AWB_WND_V_OFFS);
 	cifisp_iowrite32(pconfig->awb_wnd.h_offs,
-		CIF_ISP_AWB_WND_H_OFFS);
+			 CIF_ISP_AWB_WND_H_OFFS);
 	/* AWB window size */
 	cifisp_iowrite32(pconfig->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE);
 	cifisp_iowrite32(pconfig->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE);
@@ -1969,8 +2206,10 @@ static void cifisp_awb_meas_config_read(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_awb_meas_en(struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_AWB_ID].new_id;
 	const struct cifisp_awb_meas_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->awb_meas_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].awb_meas_config;
 	u32 reg_val = cifisp_ioread32(CIF_ISP_AWB_PROP);
 
 	/* switch off */
@@ -2001,37 +2240,20 @@ static void cifisp_awb_meas_end(struct cif_isp10_isp_dev *isp_dev)
 
 	isp_dev->active_meas &= ~CIF_ISP_AWB_DONE;
 
-	if (!CIFISP_MODULE_IS_EN(
-		isp_dev->meas_cfgs.last_or_new->module_ens,
-		CIFISP_MODULE_AWB))
-		cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_AWB_ENA,
-		CIF_ISP_CTRL);
-}
-
-/*****************************************************************************/
-static void cifisp_awb_gain_en(const struct cif_isp10_isp_dev *isp_dev)
-{
-	cifisp_iowrite32OR(CIF_ISP_CTRL_ISP_AWB_ENA, CIF_ISP_CTRL);
-}
-
-/*****************************************************************************/
-static void cifisp_awb_gain_end(const struct cif_isp10_isp_dev *isp_dev)
-{
-	if (!CIFISP_MODULE_IS_EN(
-		isp_dev->meas_cfgs.last_or_new->module_ens,
-		CIFISP_MODULE_AWB))
-		cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_AWB_ENA,
-		CIF_ISP_CTRL);
+	cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_AWB_ENA,
+			    CIF_ISP_CTRL);
 }
 
 /*****************************************************************************/
 static void cifisp_get_awb_meas(struct cif_isp10_isp_dev *isp_dev,
-	struct cifisp_stat_buffer *pbuf)
+				struct cifisp_stat_buffer *pbuf)
 {
 	/* Protect against concurrent access from ISR? */
 	u32 reg_val;
+	unsigned int curr_id =
+		isp_dev->meas_cfgs.log[CIFISP_AWB_ID].curr_id;
 	const struct cifisp_awb_meas_config *pconfig =
-		&isp_dev->meas_cfgs.curr->awb_meas_config;
+		&isp_dev->meas_cfgs.cfgs[curr_id].awb_meas_config;
 
 	pbuf->meas_type |= CIFISP_STAT_AWB;
 	reg_val = cifisp_ioread32(CIF_ISP_AWB_WHITE_CNT);
@@ -2060,8 +2282,10 @@ static void cifisp_get_awb_meas(struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_aec_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_AEC_ID].new_id;
 	const struct cifisp_aec_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->aec_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].aec_config;
 	unsigned int block_hsize, block_vsize;
 
 	cifisp_iowrite32(CIFISP_EXP_CTRL_AUTOSTOP(pconfig->autostop) |
@@ -2138,8 +2362,10 @@ static void cifisp_ctk_config_read(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_ctk_en(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_CTK_ID].new_id;
 	const struct cifisp_ctk_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->ctk_config;
+		&isp_dev->other_cfgs.cfgs[new_id].ctk_config;
 
 	cifisp_iowrite32(pconfig->coeff0, CIF_ISP_CT_COEFF_0);
 	cifisp_iowrite32(pconfig->coeff1, CIF_ISP_CT_COEFF_1);
@@ -2179,10 +2405,14 @@ static void cifisp_ctk_end(const struct cif_isp10_isp_dev *isp_dev)
 static void cifisp_cproc_config(const struct cif_isp10_isp_dev *isp_dev,
 	enum cif_isp10_pix_fmt_quantization quantization)
 {
+	unsigned int new_id_cproc =
+		isp_dev->other_cfgs.log[CIFISP_CPROC_ID].new_id;
 	const struct cifisp_cproc_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->cproc_config;
+		&isp_dev->other_cfgs.cfgs[new_id_cproc].cproc_config;
+	unsigned int curr_id =
+		isp_dev->other_cfgs.log[CIFISP_IE_ID].curr_id;
 	const struct cifisp_ie_config *ie_pconfig =
-		&isp_dev->other_cfgs.last_or_new->ie_config;
+		&isp_dev->other_cfgs.cfgs[curr_id].ie_config;
 
 	cifisp_iowrite32(pconfig->contrast, CIF_C_PROC_CONTRAST);
 	cifisp_iowrite32(pconfig->hue, CIF_C_PROC_HUE);
@@ -2190,7 +2420,7 @@ static void cifisp_cproc_config(const struct cif_isp10_isp_dev *isp_dev,
 	cifisp_iowrite32(pconfig->brightness, CIF_C_PROC_BRIGHTNESS);
 
 	if ((quantization != CIF_ISP10_QUANTIZATION_FULL_RANGE) ||
-		 (ie_pconfig->effect != V4L2_COLORFX_NONE)) {
+	    (ie_pconfig->effect != V4L2_COLORFX_NONE)) {
 		cifisp_iowrite32(
 			~(CIF_C_PROC_YOUT_FULL |
 			CIF_C_PROC_YIN_FULL |
@@ -2236,8 +2466,10 @@ static void cifisp_cproc_end(const struct cif_isp10_isp_dev *isp_dev)
 
 static void cifisp_afc_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_AFC_ID].new_id;
 	const struct cifisp_afc_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->afc_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].afc_config;
 	int num_of_win = pconfig->num_afm_win, i;
 
 	/* Switch off to configure. Enabled during normal flow in frame isr. */
@@ -2299,12 +2531,14 @@ static void cifisp_get_afc_meas(struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_hst_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_HST_ID].new_id;
 	const struct cifisp_hst_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->hst_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].hst_config;
 	unsigned int block_hsize, block_vsize;
 
 	cifisp_iowrite32(CIFISP_HIST_PREDIV_SET(pconfig->histogram_predivider),
-		      CIF_ISP_HIST_PROP);
+			 CIF_ISP_HIST_PROP);
 	cifisp_iowrite32(pconfig->meas_window.h_offs, CIF_ISP_HIST_H_OFFS);
 	cifisp_iowrite32(pconfig->meas_window.v_offs, CIF_ISP_HIST_V_OFFS);
 
@@ -2317,36 +2551,38 @@ static void cifisp_hst_config(const struct cif_isp10_isp_dev *isp_dev)
 	cifisp_iowrite32(block_vsize, CIF_ISP_HIST_V_SIZE);
 
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[0],
-		pconfig->hist_weight[1], pconfig->hist_weight[2],
-		pconfig->hist_weight[3]), CIF_ISP_HIST_WEIGHT_00TO30);
+			 pconfig->hist_weight[1], pconfig->hist_weight[2],
+			 pconfig->hist_weight[3]), CIF_ISP_HIST_WEIGHT_00TO30);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[4],
-		pconfig->hist_weight[5], pconfig->hist_weight[6],
-		pconfig->hist_weight[7]), CIF_ISP_HIST_WEIGHT_40TO21);
+			 pconfig->hist_weight[5], pconfig->hist_weight[6],
+			 pconfig->hist_weight[7]), CIF_ISP_HIST_WEIGHT_40TO21);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[8],
-		pconfig->hist_weight[9], pconfig->hist_weight[10],
-		pconfig->hist_weight[11]), CIF_ISP_HIST_WEIGHT_31TO12);
+			 pconfig->hist_weight[9], pconfig->hist_weight[10],
+			 pconfig->hist_weight[11]), CIF_ISP_HIST_WEIGHT_31TO12);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[12],
-		pconfig->hist_weight[13], pconfig->hist_weight[14],
-		pconfig->hist_weight[15]), CIF_ISP_HIST_WEIGHT_22TO03);
+			 pconfig->hist_weight[13], pconfig->hist_weight[14],
+			 pconfig->hist_weight[15]), CIF_ISP_HIST_WEIGHT_22TO03);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[16],
-		pconfig->hist_weight[17], pconfig->hist_weight[18],
-		pconfig->hist_weight[19]), CIF_ISP_HIST_WEIGHT_13TO43);
+			 pconfig->hist_weight[17], pconfig->hist_weight[18],
+			 pconfig->hist_weight[19]), CIF_ISP_HIST_WEIGHT_13TO43);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[20],
-		pconfig->hist_weight[21], pconfig->hist_weight[22],
-		pconfig->hist_weight[23]), CIF_ISP_HIST_WEIGHT_04TO34);
+			 pconfig->hist_weight[21], pconfig->hist_weight[22],
+			 pconfig->hist_weight[23]), CIF_ISP_HIST_WEIGHT_04TO34);
 	cifisp_iowrite32(CIFISP_HIST_WEIGHT_SET(pconfig->hist_weight[24],
-		0, 0, 0), CIF_ISP_HIST_WEIGHT_44);
+			 0, 0, 0), CIF_ISP_HIST_WEIGHT_44);
 }
 
 static void cifisp_hst_en(struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->meas_cfgs.log[CIFISP_HST_ID].new_id;
 	const struct cifisp_hst_config *pconfig =
-		&isp_dev->meas_cfgs.last_or_new->hst_config;
+		&isp_dev->meas_cfgs.cfgs[new_id].hst_config;
 
 	isp_dev->active_meas |= CIF_ISP_HIST_MEASURE_RDY;
 
 	cifisp_iowrite32OR(pconfig->mode,
-		CIF_ISP_HIST_PROP);
+			   CIF_ISP_HIST_PROP);
 }
 
 /*****************************************************************************/
@@ -2354,7 +2590,7 @@ static void cifisp_hst_end(struct cif_isp10_isp_dev *isp_dev)
 {
 	/* Disable measurement */
 	cifisp_iowrite32(CIFISP_HISTOGRAM_MODE_DISABLE,
-		CIF_ISP_HIST_PROP);
+			 CIF_ISP_HIST_PROP);
 
 	isp_dev->active_meas &= ~CIF_ISP_HIST_MEASURE_RDY;
 }
@@ -2376,8 +2612,10 @@ static void cifisp_get_hst_meas(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_ie_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_IE_ID].new_id;
 	const struct cifisp_ie_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->ie_config;
+		&isp_dev->other_cfgs.cfgs[new_id].ie_config;
 
 	switch (pconfig->effect) {
 	case V4L2_COLORFX_SET_CBCR:
@@ -2407,8 +2645,10 @@ static void cifisp_ie_config(const struct cif_isp10_isp_dev *isp_dev)
 
 static void cifisp_ie_en(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_IE_ID].new_id;
 	const struct cifisp_ie_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->ie_config;
+		&isp_dev->other_cfgs.cfgs[new_id].ie_config;
 	enum cif_isp10_image_effect effect;
 
 	switch (pconfig->effect) {
@@ -2456,15 +2696,21 @@ static void cifisp_ie_end(const struct cif_isp10_isp_dev *isp_dev)
 }
 
 static void cifisp_csm_config(const struct cif_isp10_isp_dev *isp_dev,
-	enum cif_isp10_pix_fmt_quantization quantization)
+			      enum cif_isp10_pix_fmt_quantization quantization)
 {
-	const struct cifisp_ie_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->ie_config;
+	unsigned int curr_id_ie =
+		isp_dev->other_cfgs.log[CIFISP_IE_ID].curr_id;
+	const struct cifisp_ie_config *ie_pconfig =
+		&isp_dev->other_cfgs.cfgs[curr_id_ie].ie_config;
+	unsigned int curr_id_cproc =
+		isp_dev->other_cfgs.log[CIFISP_CPROC_ID].curr_id;
+	unsigned int curr_cproc_en =
+		isp_dev->other_cfgs.cfgs[curr_id_cproc].module_ens;
 
 	if ((quantization != CIF_ISP10_QUANTIZATION_FULL_RANGE) ||
-		((pconfig->effect != V4L2_COLORFX_NONE) &&
+	    ((ie_pconfig->effect != V4L2_COLORFX_NONE) &&
 		CIFISP_MODULE_IS_EN(
-		isp_dev->other_cfgs.last_or_new->module_ens,
+		curr_cproc_en,
 		CIFISP_MODULE_CPROC))) {
 		/* Limit range conversion */
 		cifisp_iowrite32(0x21, CIF_ISP_CC_COEFF_0);
@@ -2477,9 +2723,9 @@ static void cifisp_csm_config(const struct cif_isp10_isp_dev *isp_dev,
 		cifisp_iowrite32(0x1d1, CIF_ISP_CC_COEFF_7);
 		cifisp_iowrite32(0x1f7, CIF_ISP_CC_COEFF_8);
 		cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA,
-			CIF_ISP_CTRL);
+				    CIF_ISP_CTRL);
 		cifisp_iowrite32AND(~CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA,
-			CIF_ISP_CTRL);
+				    CIF_ISP_CTRL);
 	} else {
 		cifisp_iowrite32(0x26, CIF_ISP_CC_COEFF_0);
 		cifisp_iowrite32(0x4b, CIF_ISP_CC_COEFF_1);
@@ -2491,9 +2737,9 @@ static void cifisp_csm_config(const struct cif_isp10_isp_dev *isp_dev,
 		cifisp_iowrite32(0x1ca, CIF_ISP_CC_COEFF_7);
 		cifisp_iowrite32(0x1f6, CIF_ISP_CC_COEFF_8);
 		cifisp_iowrite32OR(CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA,
-			CIF_ISP_CTRL);
+				   CIF_ISP_CTRL);
 		cifisp_iowrite32OR(CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA,
-			CIF_ISP_CTRL);
+				   CIF_ISP_CTRL);
 	}
 }
 
@@ -2501,13 +2747,16 @@ static void cifisp_csm_config(const struct cif_isp10_isp_dev *isp_dev,
 /*****************************************************************************/
 static void cifisp_dpf_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_DPF_ID].new_id;
 	const struct cifisp_dpf_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->dpf_config;
+		&isp_dev->other_cfgs.cfgs[new_id].dpf_config;
 	unsigned int isp_dpf_mode;
 	unsigned int i;
 	unsigned int spatial_coeff;
 
-	isp_dpf_mode = 0x00;
+	isp_dpf_mode =
+		cifisp_ioread32(CIF_ISP_DPF_MODE) & CIFISP_DPF_MODE_EN;
 
 	switch (pconfig->gain.mode) {
 	case CIFISP_DPF_GAIN_USAGE_DISABLED:
@@ -2557,7 +2806,7 @@ static void cifisp_dpf_config(const struct cif_isp10_isp_dev *isp_dev)
 
 	for (i = 0; i < CIFISP_DPF_MAX_NLF_COEFFS; i++) {
 		cifisp_iowrite32(pconfig->nll.coeff[i],
-			CIF_ISP_DPF_NULL_COEFF_0 + i * 4);
+				 CIF_ISP_DPF_NULL_COEFF_0 + i * 4);
 	}
 
 	spatial_coeff = pconfig->g_flt.spatial_coeff[0] |
@@ -2580,8 +2829,10 @@ static void cifisp_dpf_config(const struct cif_isp10_isp_dev *isp_dev)
 
 static void cifisp_dpf_strength_config(const struct cif_isp10_isp_dev *isp_dev)
 {
+	unsigned int new_id =
+		isp_dev->other_cfgs.log[CIFISP_DPF_STRENGTH_ID].new_id;
 	const struct cifisp_dpf_strength_config *pconfig =
-		&isp_dev->other_cfgs.last_or_new->dpf_strength_config;
+		&isp_dev->other_cfgs.cfgs[new_id].dpf_strength_config;
 
 	cifisp_iowrite32(pconfig->b, CIF_ISP_DPF_STRENGTH_B);
 	cifisp_iowrite32(pconfig->g, CIF_ISP_DPF_STRENGTH_G);
@@ -2591,13 +2842,13 @@ static void cifisp_dpf_strength_config(const struct cif_isp10_isp_dev *isp_dev)
 static void cifisp_dpf_en(struct cif_isp10_isp_dev *isp_dev)
 {
 	cifisp_iowrite32OR(CIFISP_DPF_MODE_EN,
-		CIF_ISP_DPF_MODE);
+			   CIF_ISP_DPF_MODE);
 }
 
 static void cifisp_dpf_end(struct cif_isp10_isp_dev *isp_dev)
 {
 	cifisp_iowrite32AND(~CIFISP_DPF_MODE_EN,
-		CIF_ISP_DPF_MODE);
+			    CIF_ISP_DPF_MODE);
 }
 
 /* ================== IOCTL implementation ========================= */
@@ -2605,8 +2856,8 @@ static int cifisp_reqbufs(struct file *file, void *priv,
 			  struct v4l2_requestbuffers *p)
 {
 	CIFISP_DPRINT(CIFISP_DEBUG,
-			" %s: %s: p->type %d p->count %d\n",
-			ISP_VDEV_NAME, __func__, p->type, p->count);
+		      " %s: %s: p->type %d p->count %d\n",
+		      ISP_VDEV_NAME, __func__, p->type, p->count);
 	return vb2_ioctl_reqbufs(file, priv, p);
 }
 
@@ -2659,14 +2910,12 @@ static int cifisp_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
 	struct cif_isp10_isp_dev *isp_dev =
 		video_get_drvdata(video_devdata(file));
 
-	drain_workqueue(isp_dev->readout_wq);
 	ret = vb2_ioctl_streamoff(file, priv, i);
-
 	if (ret == 0)
 		isp_dev->streamon = false;
 
 	CIFISP_DPRINT(CIFISP_DEBUG,
-		" %s: %s: ret %d\n", ISP_VDEV_NAME, __func__, ret);
+		      " %s: %s: ret %d\n", ISP_VDEV_NAME, __func__, ret);
 
 	return ret;
 }
@@ -2684,112 +2933,112 @@ static int cifisp_g_ctrl(struct file *file, void *priv, struct v4l2_control *vc)
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_DPCC);
+			CIFISP_DPCC_ID);
 		break;
 	case V4L2_CID_CIFISP_BLS:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_BLS);
+			CIFISP_BLS_ID);
 		break;
 	case V4L2_CID_CIFISP_SDG:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_SDG);
+			CIFISP_SDG_ID);
 		break;
 	case V4L2_CID_CIFISP_LSC:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_LSC);
+			CIFISP_LSC_ID);
 		break;
 	case V4L2_CID_CIFISP_AWB_MEAS:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_AWB);
+			CIFISP_AWB_ID);
 		break;
 	case V4L2_CID_CIFISP_AWB_GAIN:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_AWB_GAIN);
+			CIFISP_AWB_GAIN_ID);
 		break;
 	case V4L2_CID_CIFISP_FLT:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_FLT);
+			CIFISP_FLT_ID);
 		break;
 	case V4L2_CID_CIFISP_BDM:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_BDM);
+			CIFISP_BDM_ID);
 		break;
 	case V4L2_CID_CIFISP_CTK:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_CTK);
+			CIFISP_CTK_ID);
 		break;
 	case V4L2_CID_CIFISP_GOC:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_GOC);
+			CIFISP_GOC_ID);
 		break;
 	case V4L2_CID_CIFISP_HST:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_HST);
+			CIFISP_HST_ID);
 		break;
 	case V4L2_CID_CIFISP_AEC:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_AEC);
+			CIFISP_AEC_ID);
 		break;
 	case V4L2_CID_CIFISP_CPROC:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_CPROC);
+			CIFISP_CPROC_ID);
 		break;
 	case V4L2_CID_CIFISP_AFC:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_AFC);
+			CIFISP_AFC_ID);
 		break;
 	case V4L2_CID_CIFISP_IE:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_IE);
+			CIFISP_IE_ID);
 		break;
 	case V4L2_CID_CIFISP_DPF:
 		ret = cifisp_module_enable(
 			isp_dev,
 			_GET_,
 			&vc->value,
-			CIFISP_MODULE_DPF);
+			CIFISP_DPF_ID);
 		break;
 	default:
 		ret = -EINVAL;
@@ -2802,130 +3051,16 @@ static int cifisp_s_ctrl(struct file *file, void *priv, struct v4l2_control *vc)
 {
 	struct cif_isp10_isp_dev *isp_dev =
 		video_get_drvdata(video_devdata(file));
-	int ret;
 
-	switch (vc->id) {
-	case V4L2_CID_CIFISP_DPCC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_DPCC);
-		break;
-	case V4L2_CID_CIFISP_BLS:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_BLS);
-		break;
-	case V4L2_CID_CIFISP_SDG:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_SDG);
-		break;
-	case V4L2_CID_CIFISP_LSC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_LSC);
-		break;
-	case V4L2_CID_CIFISP_AWB_MEAS:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_AWB);
-		break;
-	case V4L2_CID_CIFISP_AWB_GAIN:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_AWB_GAIN);
-		break;
-	case V4L2_CID_CIFISP_FLT:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_FLT);
-		break;
-	case V4L2_CID_CIFISP_BDM:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_BDM);
-		break;
-	case V4L2_CID_CIFISP_CTK:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_CTK);
-		break;
-	case V4L2_CID_CIFISP_GOC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_GOC);
-		break;
-	case V4L2_CID_CIFISP_HST:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_HST);
-			break;
-	case V4L2_CID_CIFISP_AEC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_AEC);
-		break;
-	case V4L2_CID_CIFISP_CPROC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_CPROC);
-		break;
-	case V4L2_CID_CIFISP_AFC:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_AFC);
-		break;
-	case V4L2_CID_CIFISP_IE:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_IE);
-		break;
-	case V4L2_CID_CIFISP_DPF:
-		ret = cifisp_module_enable(
-			isp_dev,
-			_SET_,
-			&vc->value,
-			CIFISP_MODULE_DPF);
-		break;
-	default:
-		ret = -EINVAL;
-		break;
-	}
-	return ret;
+	return cifisp_module_enable(
+		isp_dev,
+		_SET_,
+		&vc->value,
+		vc->id - V4L2_CID_PRIVATE_BASE);
 }
 
-static long cifisp_ioctl_default(struct file *file,
-	 void *fh, bool valid_prio, unsigned int cmd, void *arg)
+static long cifisp_ioctl_default(struct file *file, void *fh,
+				 bool valid_prio, unsigned int cmd, void *arg)
 {
 	struct cif_isp10_isp_dev *isp = video_get_drvdata(video_devdata(file));
 	long ret;
@@ -3053,8 +3188,8 @@ static int cifisp_g_fmt_vid_cap(struct file *file, void *fh,
 	return 0;
 }
 
-static int cifisp_querycap(struct file *file,
-			 void *priv, struct v4l2_capability *cap)
+static int cifisp_querycap(struct file *file, void *priv,
+			   struct v4l2_capability *cap)
 {
 	struct video_device *vdev = video_devdata(file);
 	struct cif_isp10_isp_dev *isp_dev = video_get_drvdata(vdev);
@@ -3062,8 +3197,8 @@ static int cifisp_querycap(struct file *file,
 	strcpy(cap->driver, DRIVER_NAME);
 	strlcpy(cap->card, vdev->name, sizeof(cap->card));
 	snprintf(cap->bus_info, sizeof(cap->bus_info),
-		"platform:" DRIVER_NAME "-%03i",
-		*isp_dev->dev_id);
+		 "platform:" DRIVER_NAME "-%03i",
+		 *isp_dev->dev_id);
 
 	cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_DEVICE_CAPS;
 	cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_DEVICE_CAPS;
@@ -3112,15 +3247,10 @@ static int cifisp_reset(struct file *file)
 	struct cif_isp10_isp_dev *isp_dev =
 		video_get_drvdata(video_devdata(file));
 
-	memset(isp_dev->other_cfgs.cfgs, 0, sizeof(isp_dev->other_cfgs.cfgs));
-	memset(isp_dev->meas_cfgs.cfgs, 0, sizeof(isp_dev->meas_cfgs.cfgs));
-
-	isp_dev->other_cfgs.last_or_new = &isp_dev->other_cfgs.cfgs[0];
-	isp_dev->other_cfgs.curr = &isp_dev->other_cfgs.cfgs[1];
+	memset(&isp_dev->other_cfgs, 0, sizeof(struct cifisp_isp_other_cfg));
+	memset(&isp_dev->meas_cfgs, 0, sizeof(struct cifisp_isp_meas_cfg));
 	isp_dev->other_cfgs.module_updates = 0;
 
-	isp_dev->meas_cfgs.last_or_new = &isp_dev->meas_cfgs.cfgs[0];
-	isp_dev->meas_cfgs.curr = &isp_dev->meas_cfgs.cfgs[1];
 	isp_dev->meas_cfgs.module_updates = 0;
 	isp_dev->active_lsc_width = 0;
 	isp_dev->active_lsc_height = 0;
@@ -3129,6 +3259,15 @@ static int cifisp_reset(struct file *file)
 	isp_dev->active_meas = 0;
 	isp_dev->frame_id = 0;
 	isp_dev->cif_ism_cropping = false;
+
+	isp_dev->meas_send_alone = CIFISP_MEAS_SEND_ALONE;
+	isp_dev->awb_meas_ready = false;
+	isp_dev->afm_meas_ready = false;
+	isp_dev->aec_meas_ready = false;
+	isp_dev->hst_meas_ready = false;
+
+	isp_dev->meta_info.write_id = 0;
+	isp_dev->meta_info.read_id = 0;
 	return 0;
 }
 
@@ -3151,8 +3290,52 @@ static int cifisp_close(struct file *file)
 	return 0;
 }
 
-struct v4l2_file_operations cifisp_fops = {
-	.mmap = cifisp_mmap,
+static int cifisp_meas_queue_work(struct cif_isp10_isp_dev *isp_dev, unsigned int send_meas)
+{
+	unsigned int module_updates = 0;
+	struct cif_isp10_isp_readout_work *work;
+
+	if (send_meas & CIF_ISP_AWB_DONE)
+		module_updates |= CIFISP_MODULE_AWB;
+	if (send_meas & CIF_ISP_AFM_FIN)
+		module_updates |= CIFISP_MODULE_AFC;
+	if (send_meas & CIF_ISP_EXP_END)
+		module_updates |= CIFISP_MODULE_AEC;
+	if (send_meas & CIF_ISP_HIST_MEASURE_RDY)
+		module_updates |= CIFISP_MODULE_HST;
+
+	if ((isp_dev->meas_cfgs.module_updates & module_updates) == 0 &&
+		(isp_dev->active_meas & send_meas)) {
+		work = kmalloc(sizeof(*work), GFP_ATOMIC);
+		if (work) {
+			INIT_WORK((struct work_struct *)work,
+				cifisp_isp_readout_work);
+			work->readout = CIF_ISP10_ISP_READOUT_MEAS;
+			work->isp_dev = isp_dev;
+			work->frame_id = isp_dev->frame_id;
+			work->active_meas = send_meas;
+			work->vs_t = isp_dev->vs_t;
+			work->fi_t = isp_dev->fi_t;
+
+			if (!queue_work(isp_dev->readout_wq,
+				(struct work_struct *)work)) {
+				CIFISP_DPRINT(CIFISP_ERROR,
+					"Could not schedule work\n");
+				kfree((void *)work);
+			}
+
+			CIFISP_DPRINT(CIFISP_DEBUG,
+				"Send 0x%x Packet\n", send_meas);
+		} else {
+			CIFISP_DPRINT(CIFISP_ERROR,
+				"Could not allocate work\n");
+		}
+	}
+	return 0;
+}
+
+struct v4l2_file_operations cifisp_fops = {
+	.mmap = cifisp_mmap,
 	.unlocked_ioctl = video_ioctl2,
 #ifdef CONFIG_COMPAT
 	.compat_ioctl32 = video_ioctl2,
@@ -3173,9 +3356,11 @@ static void cifisp_release(struct video_device *vdev)
 
 /************************************************************/
 static int cif_isp10_vb2_queue_setup(struct vb2_queue *vq,
-			const void *parg,
-			unsigned int *count, unsigned int *num_planes,
-			unsigned int sizes[], void *alloc_ctxs[])
+				     const void *parg,
+				     unsigned int *count,
+				     unsigned int *num_planes,
+				     unsigned int sizes[],
+				     void *alloc_ctxs[])
 {
 	sizes[0] = sizeof(struct cifisp_stat_buffer);
 	*num_planes = 1;
@@ -3240,9 +3425,9 @@ static int cif_isp10_init_vb2_queue(struct vb2_queue *q,
 
 /************************************************************/
 int register_cifisp_device(struct cif_isp10_isp_dev *isp_dev,
-	struct video_device *vdev_cifisp,
-	struct v4l2_device *v4l2_dev,
-	void __iomem *cif_reg_baseaddress)
+			   struct video_device *vdev_cifisp,
+			   struct v4l2_device *v4l2_dev,
+			   void __iomem *cif_reg_baseaddress)
 {
 	isp_dev->base_addr = cif_reg_baseaddress;
 	WARN_ON(!(isp_dev->base_addr));
@@ -3273,24 +3458,23 @@ int register_cifisp_device(struct cif_isp10_isp_dev *isp_dev,
 
 	vdev_cifisp->queue = &isp_dev->vb2_vidq;
 
-
 	if (video_register_device(vdev_cifisp, VFL_TYPE_GRABBER, -1) < 0) {
 		dev_err(&vdev_cifisp->dev,
 			"could not register Video for Linux device\n");
 		return -ENODEV;
 	} else {
 		dev_info(&vdev_cifisp->dev,
-			"successfully registered video device for cifisp(video%d)\n",
-			vdev_cifisp->minor);
+			 "successfully registered video device for cifisp(video%d)\n",
+			 vdev_cifisp->minor);
 	}
 
 	CIFISP_DPRINT(CIFISP_DEBUG,
-		"%s: CIFISP vdev minor =  %d\n",
-		__func__, vdev_cifisp->minor);
+		      "%s: CIFISP vdev minor =  %d\n",
+		      __func__, vdev_cifisp->minor);
 
 	isp_dev->readout_wq =
 		alloc_workqueue("measurement_queue",
-			WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
+				WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
 
 	if (!isp_dev->readout_wq)
 		return -ENOMEM;
@@ -3350,28 +3534,44 @@ static void cifisp_dump_reg(struct cif_isp10_isp_dev *isp_dev, int level)
 #endif
 }
 
-static inline void cifisp_meas_config_swap(
-	struct cif_isp10_isp_dev *isp_dev)
+static void cifisp_set_isp_modules_actives(struct cif_isp10_isp_dev *isp_dev,
+	enum cif_isp10_pix_fmt in_pix_fmt)
 {
-	struct cifisp_isp_meas_cfg *new_cfg;
-
-	new_cfg = isp_dev->meas_cfgs.last_or_new;
-	new_cfg->s_frame_id = isp_dev->frame_id;
-	isp_dev->meas_cfgs.last_or_new =
-		isp_dev->meas_cfgs.curr;
-	isp_dev->meas_cfgs.curr = new_cfg;
-}
+	isp_dev->other_cfgs.module_actives = 0;
+	isp_dev->meas_cfgs.module_actives = 0;
+	if (CIF_ISP10_PIX_FMT_IS_RAW_BAYER(in_pix_fmt)) {
+		/* unlimited */
+	} else if (in_pix_fmt == CIF_Y10) {
+		CIFISP_MODULE_UNACTIVE(
+			isp_dev->other_cfgs.module_actives,
+			CIFISP_MODULE_LSC |
+			CIFISP_MODULE_AWB_GAIN |
+			CIFISP_MODULE_BDM |
+			CIFISP_MODULE_CTK);
 
-static inline void cifisp_other_config_swap(
-	struct cif_isp10_isp_dev *isp_dev)
-{
-	struct cifisp_isp_other_cfg *new_cfg;
+		CIFISP_MODULE_UNACTIVE(
+			isp_dev->meas_cfgs.module_actives,
+			CIFISP_MODULE_AWB);
+	} else {
+		CIFISP_MODULE_UNACTIVE(
+			isp_dev->other_cfgs.module_actives,
+			CIFISP_MODULE_DPCC |
+			CIFISP_MODULE_BLS |
+			CIFISP_MODULE_SDG |
+			CIFISP_MODULE_LSC |
+			CIFISP_MODULE_FLT |
+			CIFISP_MODULE_BDM |
+			CIFISP_MODULE_CTK |
+			CIFISP_MODULE_GOC |
+			CIFISP_MODULE_DPF);
 
-	new_cfg = isp_dev->other_cfgs.last_or_new;
-	new_cfg->s_frame_id = isp_dev->frame_id;
-	isp_dev->other_cfgs.last_or_new =
-		isp_dev->other_cfgs.curr;
-	isp_dev->other_cfgs.curr = new_cfg;
+		CIFISP_MODULE_UNACTIVE(
+			isp_dev->meas_cfgs.module_actives,
+			CIFISP_MODULE_HST |
+			CIFISP_MODULE_AFC |
+			CIFISP_MODULE_AWB |
+			CIFISP_MODULE_AEC);
+	}
 }
 
 /* Not called when the camera active, thus not isr protection. */
@@ -3380,221 +3580,74 @@ void cifisp_configure_isp(
 	enum cif_isp10_pix_fmt in_pix_fmt,
 	enum cif_isp10_pix_fmt_quantization quantization)
 {
-	unsigned int *other_ens, *other_updates;
-	unsigned int *meas_ens, *meas_updates;
+	unsigned int time_left = 3000;
+	unsigned int i, curr_id;
 
 	CIFISP_DPRINT(CIFISP_DEBUG, "%s\n", __func__);
 
 	mutex_lock(&isp_dev->mutex);
 	spin_lock(&isp_dev->config_lock);
 
-	other_ens = &isp_dev->other_cfgs.last_or_new->module_ens;
-	other_updates = &isp_dev->other_cfgs.module_updates;
-	meas_ens = &isp_dev->meas_cfgs.last_or_new->module_ens;
-	meas_updates = &isp_dev->meas_cfgs.module_updates;
 	isp_dev->quantization = quantization;
-	if (CIF_ISP10_PIX_FMT_IS_RAW_BAYER(in_pix_fmt)) {
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_DPCC)) {
-			cifisp_dpcc_config(isp_dev);
-			cifisp_dpcc_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_DPCC);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_LSC)) {
-			if (cifisp_lsc_config(isp_dev))
-				CIFISP_MODULE_CLR_UPDATE(*other_updates,
-					CIFISP_MODULE_LSC);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_BLS)) {
-			cifisp_bls_config(isp_dev);
-			cifisp_bls_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_BLS);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_SDG)) {
-			cifisp_sdg_config(isp_dev);
-			cifisp_sdg_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_SDG);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_GOC)) {
-			cifisp_goc_config(isp_dev);
-			cifisp_goc_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_GOC);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_BDM)) {
-			cifisp_bdm_config(isp_dev);
-			cifisp_bdm_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_BDM);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_FLT)) {
-			cifisp_flt_config(isp_dev);
-			cifisp_flt_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_FLT);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_AWB_GAIN)) {
-			cifisp_awb_gain_config(isp_dev);
-			cifisp_awb_gain_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_AWB_GAIN);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_CTK)) {
-			cifisp_ctk_config(isp_dev);
-			cifisp_ctk_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_CTK);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_CPROC)) {
-			cifisp_cproc_config(isp_dev, quantization);
-			cifisp_cproc_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_CPROC);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_IE)) {
-			cifisp_ie_config(isp_dev);
-			cifisp_ie_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_IE);
-		}
-
-		cifisp_csm_config(isp_dev, quantization);
-
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_DPF)) {
-			cifisp_dpf_config(isp_dev);
-			cifisp_dpf_strength_config(isp_dev);
-			cifisp_dpf_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_DPF | CIFISP_MODULE_DPF_STRENGTH);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*meas_ens, CIFISP_MODULE_AFC)) {
-			cifisp_afc_config(isp_dev);
-			cifisp_afc_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AFC);
-		}
-
-		if (CIFISP_MODULE_IS_EN(*meas_ens, CIFISP_MODULE_AWB)) {
-			cifisp_awb_meas_config(isp_dev);
-			cifisp_awb_meas_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AWB);
-		}
+	cifisp_set_isp_modules_actives(isp_dev, in_pix_fmt);
+	/*
+	 * Must config isp, Hardware may has been reset.
+	 */
+	for (i = 0; i < CIFISP_MEAS_ID; i++) {
+		if (CIFISP_MODULE_IS_UNACTIVE(
+			isp_dev->other_cfgs.module_actives,
+			(1 << i)))
+			continue;
 
-		if (CIFISP_MODULE_IS_EN(*meas_ens, CIFISP_MODULE_AEC)) {
-			cifisp_aec_config(isp_dev);
-			cifisp_aec_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AEC);
-		}
+		if (CIFISP_MODULE_IS_UPDATE(
+			isp_dev->other_cfgs.module_updates,
+			(1 << i)))
+			continue;
+
+		curr_id = isp_dev->other_cfgs.log[i].curr_id;
+		if (CIFISP_MODULE_IS_EN(
+			isp_dev->other_cfgs.cfgs[curr_id].module_ens,
+			(1 << i))) {
+			isp_dev->other_cfgs.log[i].new_id = curr_id;
+			CIFISP_MODULE_UPDATE(
+				isp_dev->other_cfgs.module_updates,
+				(1 << i));
 
-		if (CIFISP_MODULE_IS_EN(*meas_ens, CIFISP_MODULE_HST)) {
-			cifisp_hst_config(isp_dev);
-			cifisp_hst_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_HST);
-		}
-	} else {
-		/* Disable modules for yuv */
-		cifisp_dpcc_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_DPCC);
-
-		cifisp_lsc_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_LSC);
-
-		cifisp_bls_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_BLS);
-
-		cifisp_sdg_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_SDG);
-
-		cifisp_goc_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_GOC);
-
-		cifisp_bdm_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_BDM);
-
-		cifisp_flt_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_FLT);
-
-		cifisp_awb_meas_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AWB);
-
-		cifisp_awb_gain_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_AWB_GAIN);
-
-		cifisp_aec_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AEC);
-
-		cifisp_ctk_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_CTK);
-
-		cifisp_dpf_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_DPF);
-
-		/* cproc can be used for yuv in reduced range */
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_CPROC)) {
-			cifisp_cproc_config(isp_dev, false);
-			cifisp_cproc_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_CPROC);
+			if (i == CIFISP_DPF_ID) {
+				isp_dev->other_cfgs.log[CIFISP_DPF_STRENGTH_ID].new_id = curr_id;
+				CIFISP_MODULE_UPDATE(
+					isp_dev->other_cfgs.module_updates,
+					(1 << CIFISP_DPF_STRENGTH_ID));
+			}
 		}
+	}
+	for (i = CIFISP_MEAS_ID; i < CIFISP_MODULE_MAX; i++) {
+		if (CIFISP_MODULE_IS_UNACTIVE(
+			isp_dev->meas_cfgs.module_actives,
+			(1 << i)))
+			continue;
 
-		cifisp_hst_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_HST);
-
-		cifisp_afc_end(isp_dev);
-		CIFISP_MODULE_CLR_UPDATE(*meas_updates,
-				CIFISP_MODULE_AFC);
-		/* ie can be used for yuv */
-		if (CIFISP_MODULE_IS_EN(*other_ens, CIFISP_MODULE_IE)) {
-			cifisp_ie_config(isp_dev);
-			cifisp_ie_en(isp_dev);
-			CIFISP_MODULE_CLR_UPDATE(*other_updates,
-				CIFISP_MODULE_IE);
-		} else {
-			cifisp_ie_end(isp_dev);
+		if (CIFISP_MODULE_IS_UPDATE(
+			isp_dev->meas_cfgs.module_updates,
+			(1 << i)))
+			continue;
+
+		curr_id = isp_dev->meas_cfgs.log[i].curr_id;
+		if (CIFISP_MODULE_IS_EN(
+			isp_dev->meas_cfgs.cfgs[curr_id].module_ens,
+			(1 << i))) {
+			isp_dev->meas_cfgs.log[i].new_id = curr_id;
+			CIFISP_MODULE_UPDATE(
+				isp_dev->meas_cfgs.module_updates,
+				(1 << i));
 		}
 	}
+	cifisp_isp_isr_other_config(isp_dev, &time_left);
+	cifisp_csm_config(isp_dev, quantization);
+	cifisp_isp_isr_meas_config(isp_dev, &time_left);
 
 	cifisp_dump_reg(isp_dev, CIFISP_DEBUG);
 
-	cifisp_meas_config_swap(isp_dev);
-	cifisp_other_config_swap(isp_dev);
-
-	memcpy(isp_dev->other_cfgs.last_or_new,
-		isp_dev->other_cfgs.curr,
-		sizeof(struct cifisp_isp_other_cfg));
-	memcpy(isp_dev->meas_cfgs.last_or_new,
-		isp_dev->meas_cfgs.curr,
-		sizeof(struct cifisp_isp_meas_cfg));
-
 	spin_unlock(&isp_dev->config_lock);
 	mutex_unlock(&isp_dev->mutex);
 }
@@ -3603,17 +3656,48 @@ void cifisp_frame_in(
 	struct cif_isp10_isp_dev *isp_dev,
 	const struct timeval *fi_t)
 {
+	unsigned int write_id;
 	/* Called in an interrupt context. */
 	isp_dev->fi_t = *fi_t;
+
+	write_id = isp_dev->meta_info.write_id;
+	isp_dev->meta_info.fi_t[write_id] = *fi_t;
+	isp_dev->meta_info.write_id = (write_id + 1) % CIF_ISP10_META_INFO_NUM;
 }
 
 void cifisp_v_start(
 	struct cif_isp10_isp_dev *isp_dev,
 	const struct timeval *vs_t)
 {
+	unsigned int write_id;
 	/* Called in an interrupt context. */
 	isp_dev->frame_id += 2;
 	isp_dev->vs_t = *vs_t;
+
+	write_id = isp_dev->meta_info.write_id;
+	isp_dev->meta_info.frame_id[write_id] = isp_dev->frame_id;
+	isp_dev->meta_info.vs_t[write_id] = *vs_t;
+}
+
+void cifisp_frame_id_reset(
+	struct cif_isp10_isp_dev *isp_dev)
+{
+	unsigned int i;
+
+	isp_dev->frame_id = 0;
+	for (i = 0; i < CIFISP_MEAS_ID; i++) {
+		memset(isp_dev->other_cfgs.log[i].s_frame_id,
+		       0x00,
+		       sizeof(isp_dev->other_cfgs.log[i].s_frame_id));
+	}
+	for (i = CIFISP_MEAS_ID; i < CIFISP_MODULE_MAX; i++) {
+		memset(isp_dev->meas_cfgs.log[i].s_frame_id,
+		       0x00,
+		       sizeof(isp_dev->meas_cfgs.log[i].s_frame_id));
+	}
+
+	isp_dev->meta_info.read_id = 0;
+	isp_dev->meta_info.write_id = 0;
 }
 
 /* Not called when the camera active, thus not isr protection. */
@@ -3631,7 +3715,6 @@ void cifisp_disable_isp(struct cif_isp10_isp_dev *isp_dev)
 	cifisp_bdm_end(isp_dev);
 	cifisp_flt_end(isp_dev);
 	cifisp_awb_meas_end(isp_dev);
-	cifisp_awb_gain_end(isp_dev);
 	cifisp_aec_end(isp_dev);
 	cifisp_ctk_end(isp_dev);
 	cifisp_cproc_end(isp_dev);
@@ -3645,25 +3728,11 @@ void cifisp_disable_isp(struct cif_isp10_isp_dev *isp_dev)
 	 */
 	spin_lock(&isp_dev->config_lock);
 
-	isp_dev->other_cfgs.last_or_new->module_ens = 0;
-	isp_dev->meas_cfgs.last_or_new->module_ens = 0;
-
-	/*
-	 * 1. Swap last_or_new and curr pointer;
-	 * 2. Sync last_or_new and curr configuration;
-	 */
-	cifisp_meas_config_swap(isp_dev);
-	cifisp_other_config_swap(isp_dev);
-
-	memcpy(isp_dev->other_cfgs.last_or_new,
-		isp_dev->other_cfgs.curr,
-		sizeof(struct cifisp_isp_other_cfg));
-	memcpy(isp_dev->meas_cfgs.last_or_new,
-		isp_dev->meas_cfgs.curr,
-		sizeof(struct cifisp_isp_meas_cfg));
-
+	memset(&isp_dev->other_cfgs, 0, sizeof(struct cifisp_isp_other_cfg));
+	memset(&isp_dev->meas_cfgs, 0, sizeof(struct cifisp_isp_meas_cfg));
+	isp_dev->other_cfgs.module_updates = 0;
+	isp_dev->meas_cfgs.module_updates = 0;
 	spin_unlock(&isp_dev->config_lock);
-
 	mutex_unlock(&isp_dev->mutex);
 }
 
@@ -3675,24 +3744,23 @@ static void cifisp_send_measurement(
 	struct cif_isp10_buffer *buf = NULL;
 	struct vb2_buffer *vb = NULL;
 	void *mem_addr;
-	struct pltfrm_cam_vcm_tim vcm_tim;
-	long ret;
-
-	unsigned int active_meas = isp_dev->active_meas;
+	unsigned int active_meas = meas_work->active_meas;
 	struct cifisp_stat_buffer *stat_buf;
 	struct cif_isp10_device *cif_dev =
 		container_of(isp_dev, struct cif_isp10_device, isp_dev);
+	struct pltfrm_cam_vcm_tim vcm_tim;
+	long ret;
 
 	spin_lock_irqsave(&isp_dev->irq_lock, lock_flags);
 	if (!list_empty(&isp_dev->stat)) {
 		buf = list_first_entry(&isp_dev->stat,
-			struct cif_isp10_buffer, queue);
+				       struct cif_isp10_buffer, queue);
 
 		vb = &buf->vb.vb2_buf;
 	} else {
 		spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
 		CIFISP_DPRINT(CIFISP_DEBUG,
-			"Not enought measurement bufs\n");
+			      "Not enought measurement bufs\n");
 		goto end;
 	}
 	spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
@@ -3703,61 +3771,44 @@ static void cifisp_send_measurement(
 	stat_buf = (struct cifisp_stat_buffer *)mem_addr;
 	memset(stat_buf, 0x00, sizeof(struct cifisp_stat_buffer));
 
-	if (active_meas & CIF_ISP_AWB_DONE)
-		cifisp_get_awb_meas(isp_dev, stat_buf);
-
-	if (active_meas & CIF_ISP_AFM_FIN)
-		cifisp_get_afc_meas(isp_dev, stat_buf);
-
-	if (active_meas & CIF_ISP_EXP_END) {
-		cifisp_get_aec_meas(isp_dev, stat_buf);
-		cifisp_bls_get_meas(isp_dev, stat_buf);
-	}
-
-	if (active_meas & CIF_ISP_HIST_MEASURE_RDY)
-		cifisp_get_hst_meas(isp_dev, stat_buf);
-
 	spin_lock_irqsave(&isp_dev->irq_lock, lock_flags);
 	list_del(&buf->queue);
 	spin_unlock_irqrestore(&isp_dev->irq_lock, lock_flags);
 
-	isp_dev->meas_stats.stat.meas_type = 0;
+	stat_buf->meas_type = 0;
 	if (active_meas & CIF_ISP_AWB_DONE) {
-		memcpy(&isp_dev->meas_stats.stat.params.awb,
-			&stat_buf->params.awb,
-			sizeof(struct cifisp_awb_stat));
-		isp_dev->meas_stats.stat.meas_type |= CIFISP_STAT_AWB;
+		memcpy(&stat_buf->params.awb,
+		       &isp_dev->meas_stats.stat.params.awb,
+		       sizeof(struct cifisp_awb_stat));
+		stat_buf->meas_type |= CIFISP_STAT_AWB;
 	}
 	if (active_meas & CIF_ISP_AFM_FIN) {
-		memcpy(&isp_dev->meas_stats.stat.params.af,
-			&stat_buf->params.af,
-			sizeof(struct cifisp_af_stat));
-		isp_dev->meas_stats.stat.meas_type |= CIFISP_STAT_AFM_FIN;
+		memcpy(&stat_buf->params.af,
+		       &isp_dev->meas_stats.stat.params.af,
+		       sizeof(struct cifisp_af_stat));
+		stat_buf->meas_type |= CIFISP_STAT_AFM_FIN;
 	}
 	if (active_meas & CIF_ISP_EXP_END) {
+		memcpy(&stat_buf->params.ae,
+		       &isp_dev->meas_stats.stat.params.ae,
+		       sizeof(struct cifisp_ae_stat));
+
 		cif_isp10_sensor_mode_data_sync(cif_dev,
 			meas_work->frame_id,
 			&stat_buf->sensor_mode);
-		memcpy(&isp_dev->meas_stats.stat.params.ae,
-			&stat_buf->params.ae,
-			sizeof(struct cifisp_ae_stat));
-		memcpy(&isp_dev->meas_stats.stat.sensor_mode,
-			&stat_buf->sensor_mode,
-			sizeof(struct isp_supplemental_sensor_mode_data));
 
-		isp_dev->meas_stats.stat.meas_type |= CIFISP_STAT_AUTOEXP;
+		stat_buf->meas_type |= CIFISP_STAT_AUTOEXP;
 	}
 	if (active_meas & CIF_ISP_HIST_MEASURE_RDY) {
-		memcpy(&isp_dev->meas_stats.stat.params.hist,
-			&stat_buf->params.hist,
-			sizeof(struct cifisp_hist_stat));
-		isp_dev->meas_stats.stat.meas_type |= CIFISP_STAT_HIST;
+		memcpy(&stat_buf->params.hist,
+		       &isp_dev->meas_stats.stat.params.hist,
+		       sizeof(struct cifisp_hist_stat));
+		stat_buf->meas_type |= CIFISP_STAT_HIST;
 	}
-	isp_dev->meas_stats.g_frame_id = meas_work->frame_id;
 
 	ret = cif_isp10_img_src_ioctl(cif_dev->img_src,
-			PLTFRM_CIFCAM_GET_VCM_MOVE_RES,
-			&vcm_tim);
+				      PLTFRM_CIFCAM_GET_VCM_MOVE_RES,
+				      &vcm_tim);
 	if (ret == 0) {
 		stat_buf->subdev_stat.vcm.vcm_start_t = vcm_tim.vcm_start_t;
 		stat_buf->subdev_stat.vcm.vcm_end_t = vcm_tim.vcm_end_t;
@@ -3770,7 +3821,7 @@ static void cifisp_send_measurement(
 	wake_up(&vb->vb2_queue->done_wq);
 
 	CIFISP_DPRINT(CIFISP_DEBUG,
-		"Measurement done\n");
+		      "Measurement done\n");
 	vb = NULL;
 end:
 
@@ -3778,15 +3829,228 @@ static void cifisp_send_measurement(
 		vb->state = VB2_BUF_STATE_QUEUED;
 }
 
+static int cifisp_s_vb_metadata(
+	struct cif_isp10_isp_dev *isp_dev,
+	struct cif_isp10_isp_readout_work *readout_work)
+{
+	struct cif_isp10_device *cif_dev =
+		container_of(isp_dev, struct cif_isp10_device, isp_dev);
+	struct cifisp_isp_metadata *isp_metadata =
+		readout_work->isp_metadata;
+	struct cifisp_isp_other_cfg *other_cfg =
+		&isp_metadata->other_cfg;
+	struct cifisp_isp_meas_cfg *meas_cfg =
+		&isp_metadata->meas_cfg;
+	struct cifisp_stat_buffer *stat_new =
+		&isp_metadata->meas_stat;
+	unsigned int i, j, match_id;
+	unsigned long int lock_flags;
+
+	cif_isp10_sensor_mode_data_sync(cif_dev,
+		readout_work->frame_id,
+		&isp_dev->meas_stats.stat.sensor_mode);
+
+	spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
+	other_cfg->module_ens = 0;
+	for (i = 0; i < CIFISP_MEAS_ID; i++) {
+		match_id = 0xff;
+		for (j = 0; j < 3; j++) {
+			if (readout_work->frame_id >=
+				isp_dev->other_cfgs.log[i].s_frame_id[j]) {
+				if (match_id == 0xff)
+					match_id = j;
+				else if (isp_dev->other_cfgs.log[i].s_frame_id[match_id] <
+					isp_dev->other_cfgs.log[i].s_frame_id[j])
+					match_id = j;
+			}
+		}
+
+		if (match_id == 0xff) {
+			CIFISP_DPRINT(CIFISP_ERROR,
+				"%s: FrameID:%d isp other config haven't found! s_frame_id:%d, %d,%d\n",
+				__func__,
+				readout_work->frame_id,
+				isp_dev->other_cfgs.log[i].s_frame_id[0],
+				isp_dev->other_cfgs.log[i].s_frame_id[1],
+				isp_dev->other_cfgs.log[i].s_frame_id[2]);
+			match_id = isp_dev->other_cfgs.log[i].curr_id;
+		}
+
+		other_cfg->module_ens |=
+			(isp_dev->other_cfgs.cfgs[match_id].module_ens &
+			(1 << i));
+
+		switch (i) {
+		case CIFISP_DPCC_ID:
+			memcpy(&other_cfg->dpcc_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].dpcc_config,
+			       sizeof(other_cfg->dpcc_config));
+			break;
+		case CIFISP_BLS_ID:
+			memcpy(&other_cfg->bls_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].bls_config,
+			       sizeof(other_cfg->bls_config));
+			break;
+		case CIFISP_SDG_ID:
+			memcpy(&other_cfg->sdg_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].sdg_config,
+			       sizeof(other_cfg->sdg_config));
+			break;
+		case CIFISP_LSC_ID:
+			memcpy(&other_cfg->lsc_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].lsc_config,
+			       sizeof(other_cfg->lsc_config));
+			break;
+		case CIFISP_AWB_GAIN_ID:
+			if (CIFISP_MODULE_IS_EN(other_cfg->module_ens,
+						CIFISP_MODULE_AWB_GAIN)) {
+				memcpy(&other_cfg->awb_gain_config,
+				       &isp_dev->other_cfgs.cfgs[match_id].awb_gain_config,
+				       sizeof(other_cfg->awb_gain_config));
+			} else {
+				unsigned int reg = cifisp_ioread32(CIF_ISP_AWB_GAIN_RB);
+
+				other_cfg->awb_gain_config.gain_red =
+					(unsigned short)CIFISP_AWB_GAIN_R_READ(reg);
+				other_cfg->awb_gain_config.gain_blue =
+					(unsigned short)CIFISP_AWB_GAIN_B_READ(reg);
+				reg = cifisp_ioread32(CIF_ISP_AWB_GAIN_RB);
+				other_cfg->awb_gain_config.gain_green_r =
+					(unsigned short)CIFISP_AWB_GAIN_R_READ(reg);
+				other_cfg->awb_gain_config.gain_green_b =
+					(unsigned short)CIFISP_AWB_GAIN_B_READ(reg);
+			}
+			break;
+		case CIFISP_FLT_ID:
+			memcpy(&other_cfg->flt_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].flt_config,
+			       sizeof(other_cfg->flt_config));
+			break;
+		case CIFISP_BDM_ID:
+			memcpy(&other_cfg->bdm_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].bdm_config,
+			       sizeof(other_cfg->bdm_config));
+			break;
+		case CIFISP_CTK_ID:
+			if (CIFISP_MODULE_IS_EN(other_cfg->module_ens,
+						CIFISP_MODULE_CTK)) {
+				memcpy(&other_cfg->ctk_config,
+				       &isp_dev->other_cfgs.cfgs[match_id].ctk_config,
+				       sizeof(other_cfg->ctk_config));
+			} else {
+				other_cfg->ctk_config.coeff0 = cifisp_ioread32(CIF_ISP_CT_COEFF_0);
+				other_cfg->ctk_config.coeff1 = cifisp_ioread32(CIF_ISP_CT_COEFF_1);
+				other_cfg->ctk_config.coeff2 = cifisp_ioread32(CIF_ISP_CT_COEFF_2);
+				other_cfg->ctk_config.coeff3 = cifisp_ioread32(CIF_ISP_CT_COEFF_3);
+				other_cfg->ctk_config.coeff4 = cifisp_ioread32(CIF_ISP_CT_COEFF_4);
+				other_cfg->ctk_config.coeff5 = cifisp_ioread32(CIF_ISP_CT_COEFF_5);
+				other_cfg->ctk_config.coeff6 = cifisp_ioread32(CIF_ISP_CT_COEFF_6);
+				other_cfg->ctk_config.coeff7 = cifisp_ioread32(CIF_ISP_CT_COEFF_7);
+				other_cfg->ctk_config.coeff8 = cifisp_ioread32(CIF_ISP_CT_COEFF_8);
+			}
+			break;
+		case CIFISP_GOC_ID:
+			memcpy(&other_cfg->goc_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].goc_config,
+			       sizeof(other_cfg->goc_config));
+			break;
+		case CIFISP_CPROC_ID:
+			memcpy(&other_cfg->cproc_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].cproc_config,
+			       sizeof(other_cfg->cproc_config));
+			break;
+		case CIFISP_IE_ID:
+			memcpy(&other_cfg->ie_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].ie_config,
+			       sizeof(other_cfg->ie_config));
+			break;
+		case CIFISP_DPF_ID:
+			memcpy(&other_cfg->dpf_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].dpf_config,
+			       sizeof(other_cfg->dpf_config));
+			break;
+		case CIFISP_DPF_STRENGTH_ID:
+			memcpy(&other_cfg->dpf_strength_config,
+			       &isp_dev->other_cfgs.cfgs[match_id].dpf_strength_config,
+			       sizeof(other_cfg->dpf_strength_config));
+			break;
+		default:
+			break;
+		}
+	}
+
+	meas_cfg->module_ens = 0;
+	for (i = CIFISP_MEAS_ID; i < CIFISP_MODULE_MAX; i++) {
+		match_id = 0xff;
+		for (j = 0; j < 3; j++) {
+			if (readout_work->frame_id >=
+				isp_dev->meas_cfgs.log[i].s_frame_id[j]) {
+				if (match_id == 0xff)
+					match_id = j;
+				else if (isp_dev->meas_cfgs.log[i].s_frame_id[match_id] <
+					 isp_dev->meas_cfgs.log[i].s_frame_id[j])
+					match_id = j;
+			}
+		}
+
+		if (match_id == 0xff) {
+			CIFISP_DPRINT(CIFISP_ERROR,
+				"%s: FrameID:%d isp meas config haven't found! s_frame_id:%d, %d,%d\n",
+				__func__,
+				readout_work->frame_id,
+				isp_dev->meas_cfgs.log[i].s_frame_id[0],
+				isp_dev->meas_cfgs.log[i].s_frame_id[1],
+				isp_dev->meas_cfgs.log[i].s_frame_id[2]);
+			match_id = isp_dev->meas_cfgs.log[i].curr_id;
+		}
+		switch (i) {
+		case CIFISP_AFC_ID:
+			memcpy(&meas_cfg->afc_config,
+			       &isp_dev->meas_cfgs.cfgs[match_id].afc_config,
+			       sizeof(meas_cfg->afc_config));
+			break;
+		case CIFISP_AEC_ID:
+			memcpy(&meas_cfg->aec_config,
+			       &isp_dev->meas_cfgs.cfgs[match_id].aec_config,
+			       sizeof(meas_cfg->aec_config));
+			break;
+		case CIFISP_AWB_ID:
+			memcpy(&meas_cfg->awb_meas_config,
+			       &isp_dev->meas_cfgs.cfgs[match_id].awb_meas_config,
+			       sizeof(meas_cfg->awb_meas_config));
+			break;
+		case CIFISP_HST_ID:
+			memcpy(&meas_cfg->hst_config,
+			       &isp_dev->meas_cfgs.cfgs[match_id].hst_config,
+			       sizeof(meas_cfg->hst_config));
+			break;
+		default:
+			break;
+		}
+
+		meas_cfg->module_ens |=
+			(isp_dev->meas_cfgs.cfgs[match_id].module_ens &
+			(1 << i));
+	}
+
+	if (isp_dev->meas_stats.g_frame_id >=
+		readout_work->frame_id) {
+		memcpy(stat_new,
+		       &isp_dev->meas_stats.stat,
+		       sizeof(*stat_new));
+	}
+	spin_unlock_irqrestore(&isp_dev->config_lock, lock_flags);
+
+	cif_isp10_s_vb_metadata(cif_dev, readout_work);
+	return 0;
+}
+
 void cifisp_isp_readout_work(struct work_struct *work)
 {
 	struct cif_isp10_isp_readout_work *readout_work =
 		(struct cif_isp10_isp_readout_work *)work;
 	struct cif_isp10_isp_dev *isp_dev =
 		readout_work->isp_dev;
-	struct cif_isp10_device *cif_dev =
-		container_of(isp_dev, struct cif_isp10_device, isp_dev);
-	unsigned long int lock_flags;
 
 	if (!isp_dev->streamon)
 		return;
@@ -3797,51 +4061,10 @@ void cifisp_isp_readout_work(struct work_struct *work)
 		break;
 
 	case CIF_ISP10_ISP_READOUT_META: {
-		struct cifisp_isp_other_cfg *other_new = NULL;
-		struct cifisp_isp_meas_cfg *meas_new = NULL;
-		struct cifisp_stat_buffer *stat_new = NULL;
-
-		spin_lock_irqsave(&isp_dev->config_lock, lock_flags);
-
-		if (isp_dev->other_cfgs.module_updates == 0) {
-			if (readout_work->frame_id ==
-				isp_dev->other_cfgs.curr->s_frame_id)
-				other_new = isp_dev->other_cfgs.last_or_new;
-			else if (readout_work->frame_id >
-				isp_dev->other_cfgs.curr->s_frame_id)
-				other_new = isp_dev->other_cfgs.curr;
-			else
-				other_new = NULL;
-		}
-
-		if (isp_dev->meas_cfgs.module_updates == 0) {
-			if (readout_work->frame_id ==
-				isp_dev->meas_cfgs.curr->s_frame_id)
-				meas_new = isp_dev->meas_cfgs.last_or_new;
-			else if (readout_work->frame_id >
-				isp_dev->meas_cfgs.curr->s_frame_id)
-				meas_new = isp_dev->meas_cfgs.curr;
-			else
-				meas_new = NULL;
-		}
-
-		if ((isp_dev->meas_stats.g_frame_id ==
-			readout_work->frame_id) &&
-			isp_dev->meas_stats.stat.meas_type)
-			stat_new = &isp_dev->meas_stats.stat;
-		else
-			stat_new = NULL;
-
-		cif_isp10_s_isp_metadata(
-			cif_dev,
-			readout_work,
-			other_new,
-			meas_new,
-			stat_new);
-		spin_unlock_irqrestore(&isp_dev->config_lock, lock_flags);
-
+		cifisp_s_vb_metadata(isp_dev, readout_work);
 		break;
 	}
+
 	default:
 		break;
 	}
@@ -3849,458 +4072,327 @@ void cifisp_isp_readout_work(struct work_struct *work)
 	kfree((void *)work);
 }
 
-static inline bool cifisp_isp_isr_other_config(
+static bool cifisp_isp_isr_other_config(
 	struct cif_isp10_isp_dev *isp_dev,
 	unsigned int *time_left)
 {
 	unsigned int time_in = *time_left;
 	bool config_chk;
+	unsigned int new_id;
+	unsigned int i, j;
 	unsigned int *ens;
+	unsigned int *actives = &isp_dev->other_cfgs.module_actives;
 
-	ens = &isp_dev->other_cfgs.last_or_new->module_ens;
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_DPCC)) {
-		/*update dpc config */
-		cifisp_dpcc_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_DPCC))
-			cifisp_dpcc_en(isp_dev);
-		else
-			cifisp_dpcc_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_DPCC);
-
-		*time_left -= CIFISP_MODULE_DPCC_PROC_TIME;
-
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"dpcc time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_BLS) &&
-		*time_left >= CIFISP_MODULE_BLS_PROC_TIME) {
-		/* update bls config */
-		cifisp_bls_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_BLS))
-			cifisp_bls_en(isp_dev);
-		else
-			cifisp_bls_end(isp_dev);
+	for (i = 0; i < CIFISP_MEAS_ID; i++) {
+		if (CIFISP_MODULE_IS_UNACTIVE(*actives, (1 << i)))
+			continue;
 
-		CIFISP_MODULE_CLR_UPDATE(
+		if (CIFISP_MODULE_IS_UPDATE(
 			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_BLS);
+			(1 << i))) {
+			new_id = isp_dev->other_cfgs.log[i].new_id;
+			ens = &isp_dev->other_cfgs.cfgs[new_id].module_ens;
+
+			switch (i) {
+			case CIFISP_DPCC_ID:
+				/*update dpc config */
+				cifisp_dpcc_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_dpcc_en(isp_dev);
+				else
+					cifisp_dpcc_end(isp_dev);
+				*time_left -= CIFISP_MODULE_DPCC_PROC_TIME;
+				break;
+			case CIFISP_BLS_ID:
+				/*update bls config */
+				cifisp_bls_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_bls_en(isp_dev);
+				else
+					cifisp_bls_end(isp_dev);
+				*time_left -= CIFISP_MODULE_BLS_PROC_TIME;
+				break;
+			case CIFISP_SDG_ID:
+				/*update sdg config */
+				cifisp_sdg_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_sdg_en(isp_dev);
+				else
+					cifisp_sdg_end(isp_dev);
+				*time_left -= CIFISP_MODULE_SDG_PROC_TIME;
+				break;
+			case CIFISP_LSC_ID: {
+				bool res = true;
+
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i))) {
+					if (!cifisp_lsc_config(isp_dev))
+						res = false;
+				} else {
+					cifisp_lsc_end(isp_dev);
+				}
+				*time_left -= CIFISP_MODULE_LSC_PROC_TIME;
+				break;
+			}
+			case CIFISP_AWB_GAIN_ID:
+				/*update awb gains */
+				cifisp_awb_gain_config(isp_dev);
+				*time_left -= CIFISP_MODULE_AWB_GAIN_PROC_TIME;
+				break;
+			case CIFISP_BDM_ID:
+				/*update bdm config */
+				cifisp_bdm_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_bdm_en(isp_dev);
+				else
+					cifisp_bdm_end(isp_dev);
+				*time_left -= CIFISP_MODULE_BDM_PROC_TIME;
+				break;
+			case CIFISP_FLT_ID:
+				/*update filter config */
+				cifisp_flt_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_flt_en(isp_dev);
+				else
+					cifisp_flt_end(isp_dev);
+				*time_left -= CIFISP_MODULE_FLT_PROC_TIME;
+				break;
+			case CIFISP_CTK_ID:
+				/*update ctk config */
+				cifisp_ctk_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_ctk_en(isp_dev);
+				else
+					cifisp_ctk_end(isp_dev);
+				*time_left -= CIFISP_MODULE_CTK_PROC_TIME;
+				break;
+			case CIFISP_GOC_ID:
+				/*update goc config */
+				cifisp_goc_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_goc_en(isp_dev);
+				else
+					cifisp_goc_end(isp_dev);
+				*time_left -= CIFISP_MODULE_GOC_PROC_TIME;
+				break;
+			case CIFISP_CPROC_ID:
+				/*update cprc config */
+				cifisp_cproc_config(
+					isp_dev,
+					isp_dev->quantization);
+				cifisp_csm_config(
+					isp_dev,
+					isp_dev->quantization);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_cproc_en(isp_dev);
+				else
+					cifisp_cproc_end(isp_dev);
+
+				*time_left -= CIFISP_MODULE_CPROC_PROC_TIME;
+				break;
+			case CIFISP_IE_ID:
+				/*update ie config */
+				cifisp_ie_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_ie_en(isp_dev);
+				else
+					cifisp_ie_end(isp_dev);
+				*time_left -= CIFISP_MODULE_IE_PROC_TIME;
+				break;
+			case CIFISP_DPF_ID:
+				/*update dpf  config */
+				cifisp_dpf_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_dpf_en(isp_dev);
+				else
+					cifisp_dpf_end(isp_dev);
+				*time_left -= CIFISP_MODULE_DPF_TIME;
+				break;
+			case CIFISP_DPF_STRENGTH_ID:
+				/*update dpf strength config */
+				cifisp_dpf_strength_config(isp_dev);
+				*time_left -= CIFISP_MODULE_DPF_STRENGTH_TIME;
+				break;
+			default:
+				break;
+			}
 
-		*time_left -= CIFISP_MODULE_BLS_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"bls time-left :%d\n",
-			*time_left);
+			isp_dev->other_cfgs.log[i].s_frame_id[new_id] =
+				isp_dev->frame_id;
+			isp_dev->other_cfgs.log[i].curr_id = new_id;
+			new_id = 0;
+			for (j = 0; j < 3; j++) {
+				if (isp_dev->other_cfgs.log[i].s_frame_id[new_id] >
+				    isp_dev->other_cfgs.log[i].s_frame_id[j])
+					new_id = j;
+			}
+			isp_dev->other_cfgs.log[i].new_id = new_id;
+			CIFISP_MODULE_CLR_UPDATE(
+				isp_dev->other_cfgs.module_updates,
+				(1 << i));
+		}
 	}
 
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_SDG) &&
-		*time_left >= CIFISP_MODULE_SDG_PROC_TIME) {
-		/* update sdg config */
-		cifisp_sdg_config(isp_dev);
+	config_chk = time_in > *time_left;
 
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_SDG))
-			cifisp_sdg_en(isp_dev);
-		else
-			cifisp_sdg_end(isp_dev);
+	return config_chk;
+}
 
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_SDG);
+static bool cifisp_isp_isr_meas_config(
+	struct cif_isp10_isp_dev *isp_dev,
+	unsigned int *time_left)
+{
+	unsigned int time_in = *time_left;
+	bool config_chk;
+	unsigned int new_id;
+	unsigned int i, j;
+	unsigned int *ens;
+	unsigned int *actives = &isp_dev->meas_cfgs.module_actives;
 
-		*time_left -= CIFISP_MODULE_SDG_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"sdg time-left :%d\n",
-			*time_left);
-	}
+	for (i = CIFISP_MEAS_ID; i < CIFISP_MODULE_MAX; i++) {
+		if (CIFISP_MODULE_IS_UNACTIVE(*actives, (1 << i)))
+			continue;
 
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_LSC) &&
-		*time_left >= CIFISP_MODULE_LSC_PROC_TIME) {
-		/* update lsc config */
-		bool res = true;
+		if (CIFISP_MODULE_IS_UPDATE(
+			isp_dev->meas_cfgs.module_updates,
+			(1 << i))) {
+			new_id = isp_dev->meas_cfgs.log[i].new_id;
+			ens = &isp_dev->meas_cfgs.cfgs[new_id].module_ens;
+
+			switch (i) {
+			case CIFISP_AWB_ID:
+				/*update dpc config */
+				cifisp_awb_meas_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_awb_meas_en(isp_dev);
+				else
+					cifisp_awb_meas_end(isp_dev);
+				*time_left -= CIFISP_MODULE_AWB_PROC_TIME;
+				break;
+			case CIFISP_AEC_ID:
+				/*update aec config */
+				cifisp_aec_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_aec_en(isp_dev);
+				else
+					cifisp_aec_end(isp_dev);
+				*time_left -= CIFISP_MODULE_AEC_PROC_TIME;
+				break;
+			case CIFISP_AFC_ID:
+				/*update afc config */
+				cifisp_afc_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_afc_en(isp_dev);
+				else
+					cifisp_afc_end(isp_dev);
+				*time_left -= CIFISP_MODULE_AFC_PROC_TIME;
+				break;
+			case CIFISP_HST_ID:
+				/*update hst config */
+				cifisp_hst_config(isp_dev);
+				if (CIFISP_MODULE_IS_EN(*ens, (1 << i)))
+					cifisp_hst_en(isp_dev);
+				else
+					cifisp_hst_end(isp_dev);
+				*time_left -= CIFISP_MODULE_HST_PROC_TIME;
+				break;
+			default:
+				break;
+			}
 
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_LSC)) {
-			if (!cifisp_lsc_config(isp_dev))
-				res = false;
-		} else {
-			cifisp_lsc_end(isp_dev);
+			isp_dev->meas_cfgs.log[i].s_frame_id[new_id] =
+				isp_dev->frame_id;
+			isp_dev->meas_cfgs.log[i].curr_id = new_id;
+			new_id = 0;
+			for (j = 0; j < 3; j++) {
+				if (isp_dev->meas_cfgs.log[i].s_frame_id[new_id] >
+					isp_dev->meas_cfgs.log[i].s_frame_id[j])
+					new_id = j;
+			}
+			isp_dev->meas_cfgs.log[i].new_id = new_id;
+			CIFISP_MODULE_CLR_UPDATE(
+				isp_dev->meas_cfgs.module_updates,
+				(1 << i));
 		}
+	}
 
-		if (res)
-			CIFISP_MODULE_CLR_UPDATE(
-				isp_dev->other_cfgs.module_updates,
-				CIFISP_MODULE_LSC);
+	config_chk = time_in > *time_left;
 
-		*time_left -= CIFISP_MODULE_LSC_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"lsc time-left :%d\n",
-			*time_left);
-	}
+	return config_chk;
+}
 
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_AWB_GAIN) &&
-		*time_left >= CIFISP_MODULE_AWB_GAIN_PROC_TIME) {
-		/* update awb gains */
-		cifisp_awb_gain_config(isp_dev);
+int cifisp_isp_isr(struct cif_isp10_isp_dev *isp_dev, u32 isp_mis)
+{
+	unsigned int isp_mis_tmp = 0;
+	unsigned int time_left = isp_dev->v_blanking_us;
+	unsigned int active_meas = 0;
 
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_AWB_GAIN))
-			cifisp_awb_gain_en(isp_dev);
-		else
-			cifisp_awb_gain_end(isp_dev);
+#ifdef LOG_ISR_EXE_TIME
+	ktime_t in_t = ktime_get();
+#endif
+	if (isp_mis & (CIF_ISP_DATA_LOSS | CIF_ISP_PIC_SIZE_ERROR))
+		return 0;
 
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_AWB_GAIN);
+	cifisp_iowrite32(
+		(isp_mis & (CIF_ISP_AWB_DONE | CIF_ISP_AFM_FIN |
+		CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY)),
+		CIF_ISP_ICR);
+	isp_mis_tmp = cifisp_ioread32(CIF_ISP_MIS);
+	if (isp_mis_tmp &
+		(isp_mis & (CIF_ISP_AWB_DONE | CIF_ISP_AFM_FIN |
+		CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY)))
+		CIFISP_DPRINT(CIFISP_ERROR,
+			"isp icr 3A info err: 0x%x\n",
+			isp_mis_tmp);
 
-		*time_left -= CIFISP_MODULE_AWB_GAIN_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"awb-g time-left :%d\n",
-			*time_left);
+	if (isp_mis & CIF_ISP_AWB_DONE) {
+		isp_dev->awb_meas_ready = true;
+		cifisp_get_awb_meas(isp_dev, &isp_dev->meas_stats.stat);
+	}
+	if (isp_mis & CIF_ISP_AFM_FIN) {
+		isp_dev->afm_meas_ready = true;
+		cifisp_get_afc_meas(isp_dev, &isp_dev->meas_stats.stat);
+	}
+	if (isp_mis & CIF_ISP_EXP_END) {
+		isp_dev->aec_meas_ready = true;
+		cifisp_get_aec_meas(isp_dev, &isp_dev->meas_stats.stat);
+		cifisp_bls_get_meas(isp_dev, &isp_dev->meas_stats.stat);
+		isp_dev->meas_stats.g_frame_id = isp_dev->frame_id;
 	}
 
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_BDM) &&
-		*time_left >= CIFISP_MODULE_BDM_PROC_TIME) {
-		/* update bdm config */
-		cifisp_bdm_config(isp_dev);
+	if (isp_mis & CIF_ISP_HIST_MEASURE_RDY) {
+		isp_dev->hst_meas_ready = true;
+		cifisp_get_hst_meas(isp_dev, &isp_dev->meas_stats.stat);
+	}
 
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_BDM))
-			cifisp_bdm_en(isp_dev);
-		else
-			cifisp_bdm_end(isp_dev);
+	if ((isp_dev->meas_send_alone & CIF_ISP_AWB_DONE) && isp_dev->awb_meas_ready) {
+		isp_dev->awb_meas_ready = false;
+		cifisp_meas_queue_work(isp_dev, CIF_ISP_AWB_DONE);
+	}
+	if ((isp_dev->meas_send_alone & CIF_ISP_AFM_FIN) && isp_dev->afm_meas_ready) {
+		isp_dev->afm_meas_ready = false;
+		cifisp_meas_queue_work(isp_dev, CIF_ISP_AFM_FIN);
+	}
+	if ((isp_dev->meas_send_alone & (CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY)) &&
+		isp_dev->aec_meas_ready && isp_dev->hst_meas_ready) {
+		isp_dev->aec_meas_ready = false;
+		isp_dev->hst_meas_ready = false;
+		cifisp_meas_queue_work(isp_dev, CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY);
+	}
 
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_BDM);
+	if (isp_mis & CIF_ISP_FRAME) {
+		active_meas = isp_dev->active_meas;
+		active_meas &= ~isp_dev->meas_send_alone;
 
-		*time_left -= CIFISP_MODULE_BDM_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"bdm time-left :%d\n",
-			*time_left);
-	}
+		if (!(isp_dev->meas_send_alone & CIF_ISP_AWB_DONE))
+			isp_dev->awb_meas_ready = false;
+		if (!(isp_dev->meas_send_alone & CIF_ISP_AFM_FIN))
+			isp_dev->afm_meas_ready = false;
+		if (!(isp_dev->meas_send_alone & CIF_ISP_EXP_END))
+			isp_dev->aec_meas_ready = false;
+		if (!(isp_dev->meas_send_alone & CIF_ISP_HIST_MEASURE_RDY))
+			isp_dev->hst_meas_ready = false;
 
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_FLT) &&
-		*time_left >= CIFISP_MODULE_FLT_PROC_TIME) {
-		/* update filter config */
-		cifisp_flt_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_FLT))
-			cifisp_flt_en(isp_dev);
-		else
-			cifisp_flt_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_FLT);
-
-		*time_left -= CIFISP_MODULE_FLT_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"flt time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_CTK) &&
-		*time_left >= CIFISP_MODULE_CTK_PROC_TIME) {
-		/* update ctk config */
-		cifisp_ctk_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_CTK))
-			cifisp_ctk_en(isp_dev);
-		else
-			cifisp_ctk_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_CTK);
-
-		*time_left -= CIFISP_MODULE_CTK_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"ctk time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_GOC) &&
-		*time_left >= CIFISP_MODULE_GOC_PROC_TIME) {
-		/* update goc config */
-		cifisp_goc_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_GOC))
-			cifisp_goc_en(isp_dev);
-		else
-			cifisp_goc_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_IE);
-
-		*time_left -= CIFISP_MODULE_GOC_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"goc time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_CPROC) &&
-		*time_left >= CIFISP_MODULE_CPROC_PROC_TIME) {
-		/* update cprc config */
-		cifisp_cproc_config(
-			isp_dev,
-			isp_dev->quantization);
-
-		cifisp_csm_config(isp_dev,
-			isp_dev->quantization);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_CPROC))
-			cifisp_cproc_en(isp_dev);
-		else
-			cifisp_cproc_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_CPROC);
-
-		*time_left -= CIFISP_MODULE_CPROC_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"cproc time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_IE) &&
-		*time_left >= CIFISP_MODULE_IE_PROC_TIME) {
-		/* update ie config */
-		cifisp_ie_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_IE))
-			cifisp_ie_en(isp_dev);
-		else
-			cifisp_ie_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_IE);
-
-		*time_left -= CIFISP_MODULE_IE_PROC_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"ie time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_DPF) &&
-		*time_left >= CIFISP_MODULE_DPF_TIME) {
-		/* update dpf  config */
-		cifisp_dpf_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_DPF))
-			cifisp_dpf_en(isp_dev);
-		else
-			cifisp_dpf_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_DPF);
-
-		*time_left -= CIFISP_MODULE_DPF_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"dpf time-left :%d\n",
-			*time_left);
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->other_cfgs.module_updates,
-		CIFISP_MODULE_DPF_STRENGTH) &&
-		*time_left >= CIFISP_MODULE_DPF_STRENGTH_TIME) {
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_DPF)) {
-			/* update dpf strength config */
-			cifisp_dpf_strength_config(isp_dev);
-			cifisp_dpf_en(isp_dev);
-		} else {
-			cifisp_dpf_end(isp_dev);
-		}
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->other_cfgs.module_updates,
-			CIFISP_MODULE_DPF_STRENGTH);
-
-		*time_left -= CIFISP_MODULE_DPF_STRENGTH_TIME;
-		CIFISP_DPRINT(CIFISP_DEBUG,
-			"dpf strength time-left :%d\n",
-			*time_left);
-	}
-
-	config_chk = time_in > *time_left;
-	if (config_chk)
-		cifisp_other_config_swap(isp_dev);
-
-	return config_chk;
-}
-
-static inline bool cifisp_isp_isr_meas_config(
-	struct cif_isp10_isp_dev *isp_dev,
-	unsigned int *time_left)
-{
-	unsigned int time_in = *time_left;
-	bool config_chk;
-	unsigned int *ens;
-
-	ens = &isp_dev->meas_cfgs.last_or_new->module_ens;
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->meas_cfgs.module_updates,
-		CIFISP_MODULE_AWB)) {
-		/* update awb config */
-		cifisp_awb_meas_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_AWB))
-			cifisp_awb_meas_en(isp_dev);
-		else
-			cifisp_awb_meas_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->meas_cfgs.module_updates,
-			CIFISP_MODULE_AWB);
-		*time_left -= CIFISP_MODULE_AWB_PROC_TIME;
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->meas_cfgs.module_updates,
-		CIFISP_MODULE_AFC)) {
-		/* update afc config */
-		cifisp_afc_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_AFC))
-			cifisp_afc_en(isp_dev);
-		else
-			cifisp_afc_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->meas_cfgs.module_updates,
-			CIFISP_MODULE_AFC);
-		*time_left -= CIFISP_MODULE_AFC_PROC_TIME;
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->meas_cfgs.module_updates,
-		CIFISP_MODULE_HST)) {
-		/* update hst config */
-		cifisp_hst_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_HST))
-			cifisp_hst_en(isp_dev);
-		else
-			cifisp_hst_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->meas_cfgs.module_updates,
-			CIFISP_MODULE_HST);
-		*time_left -= CIFISP_MODULE_HST_PROC_TIME;
-	}
-
-	if (CIFISP_MODULE_IS_UPDATE(
-		isp_dev->meas_cfgs.module_updates,
-		CIFISP_MODULE_AEC)) {
-		/* update aec config */
-		cifisp_aec_config(isp_dev);
-
-		if (CIFISP_MODULE_IS_EN(*ens, CIFISP_MODULE_AEC))
-			cifisp_aec_en(isp_dev);
-		else
-			cifisp_aec_end(isp_dev);
-
-		CIFISP_MODULE_CLR_UPDATE(
-			isp_dev->meas_cfgs.module_updates,
-			CIFISP_MODULE_AEC);
-		*time_left -= CIFISP_MODULE_AEC_PROC_TIME;
-	}
-
-	config_chk = time_in > *time_left;
-	if (config_chk)
-		cifisp_meas_config_swap(isp_dev);
-
-	return config_chk;
-}
-
-int cifisp_isp_isr(struct cif_isp10_isp_dev *isp_dev, u32 isp_mis)
-{
-	unsigned int isp_mis_tmp = 0;
-	struct cif_isp10_isp_readout_work *work;
-	unsigned int time_left = isp_dev->v_blanking_us;
-#ifdef LOG_ISR_EXE_TIME
-	ktime_t in_t = ktime_get();
-#endif
-	if (isp_mis & (CIF_ISP_DATA_LOSS | CIF_ISP_PIC_SIZE_ERROR))
-		return 0;
-
-	if (isp_mis & CIF_ISP_FRAME) {
-		u32 isp_ris = cifisp_ioread32(CIF_ISP_RIS);
-
-		cifisp_iowrite32(
-			(CIF_ISP_AWB_DONE | CIF_ISP_AFM_FIN |
-			CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY),
-			CIF_ISP_ICR);
-		isp_mis_tmp = cifisp_ioread32(CIF_ISP_MIS);
-		if (isp_mis_tmp &
-			(CIF_ISP_AWB_DONE | CIF_ISP_AFM_FIN |
-			CIF_ISP_EXP_END | CIF_ISP_HIST_MEASURE_RDY))
-			CIFISP_DPRINT(CIFISP_ERROR,
-				      "isp icr 3A info err: 0x%x\n",
-				      isp_mis_tmp);
-
-		CIFISP_DPRINT(CIFISP_DEBUG, "isp_ris 0x%x\n", isp_ris);
-
-		if (((isp_dev->meas_cfgs.module_updates &
-			(CIFISP_MODULE_AWB |
-			CIFISP_MODULE_AEC |
-			CIFISP_MODULE_AFC)) == 0) &&
-			isp_dev->active_meas &&
-			((isp_dev->active_meas & isp_ris) ==
-			isp_dev->active_meas)) {
-			work = (struct cif_isp10_isp_readout_work *)
-				kmalloc(sizeof(
-				struct cif_isp10_isp_readout_work),
-				GFP_ATOMIC);
-			if (work) {
-				INIT_WORK((struct work_struct *)work,
-					cifisp_isp_readout_work);
-				work->readout = CIF_ISP10_ISP_READOUT_MEAS;
-				work->isp_dev = isp_dev;
-				work->frame_id = isp_dev->frame_id;
-				if (!queue_work(isp_dev->readout_wq,
-					(struct work_struct *)work)) {
-					CIFISP_DPRINT(CIFISP_ERROR,
-					"Could not schedule work\n");
-					kfree((void *)work);
-				}
-			} else {
-				CIFISP_DPRINT(CIFISP_ERROR,
-				"Could not allocate work\n");
-			}
-		}
+		cifisp_meas_queue_work(isp_dev, active_meas);
 
 		/*
 		 * Then update  changed configs. Some of them involve
@@ -4330,27 +4422,32 @@ int cifisp_isp_isr(struct cif_isp10_isp_dev *isp_dev, u32 isp_mis)
 	return 0;
 }
 
+void cifisp_clr_readout_wq(struct cif_isp10_isp_dev *isp_dev)
+{
+	drain_workqueue(isp_dev->readout_wq);
+}
+
 static void cifisp_param_dump(const void *config, unsigned int module)
 {
 #ifdef CIFISP_DEBUG_PARAM
 	switch (module) {
 	case CIFISP_MODULE_AWB_GAIN:{
-			struct cifisp_awb_gain_config *pconfig =
-			    (struct cifisp_awb_gain_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AWB Gain Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, "g_g: %d\n",
-				      pconfig->gain_green_r);
-			CIFISP_DPRINT(CIFISP_DEBUG, "g_b: %d\n",
-				      pconfig->gain_green_b);
-			CIFISP_DPRINT(CIFISP_DEBUG, "r: %d\n",
-				      pconfig->gain_red);
-			CIFISP_DPRINT(CIFISP_DEBUG, "b: %d\n",
-				      pconfig->gain_blue);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AWB Gain Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_awb_gain_config *pconfig =
+		    (struct cifisp_awb_gain_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AWB Gain Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, "g_g: %d\n",
+			      pconfig->gain_green_r);
+		CIFISP_DPRINT(CIFISP_DEBUG, "g_b: %d\n",
+			      pconfig->gain_green_b);
+		CIFISP_DPRINT(CIFISP_DEBUG, "r: %d\n",
+			      pconfig->gain_red);
+		CIFISP_DPRINT(CIFISP_DEBUG, "b: %d\n",
+			      pconfig->gain_blue);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AWB Gain Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		}
 		break;
 	case CIFISP_MODULE_DPCC:{
@@ -4358,414 +4455,413 @@ static void cifisp_param_dump(const void *config, unsigned int module)
 		break;
 
 	case CIFISP_MODULE_BLS:{
-			struct cifisp_bls_config *pconfig =
-			    (struct cifisp_bls_config *)config;
-			struct cifisp_bls_fixed_val *pval = &pconfig->fixed_val;
+		struct cifisp_bls_config *pconfig =
+		    (struct cifisp_bls_config *)config;
+		struct cifisp_bls_fixed_val *pval = &pconfig->fixed_val;
 
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: BLS Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " enable_auto: %d\n",
-				      pconfig->enable_auto);
-			CIFISP_DPRINT(CIFISP_DEBUG, " en_windows: %d\n",
-				      pconfig->en_windows);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window1.h_offs: %d\n",
-				      pconfig->bls_window1.h_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window1.v_offs: %d\n",
-				      pconfig->bls_window1.v_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window1.h_size: %d\n",
-				      pconfig->bls_window1.h_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window1.v_size: %d\n",
-				      pconfig->bls_window1.v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window2.h_offs: %d\n",
-				      pconfig->bls_window2.h_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window2.v_offs: %d\n",
-				      pconfig->bls_window2.v_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window2.h_size: %d\n",
-				      pconfig->bls_window2.h_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " bls_window2.v_size: %d\n",
-				      pconfig->bls_window2.v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG, " bls_samples: %d\n",
-				      pconfig->bls_samples);
-			CIFISP_DPRINT(CIFISP_DEBUG, " fixed_A: %d\n",
-				      pval->fixed_a);
-			CIFISP_DPRINT(CIFISP_DEBUG, " fixed_B: %d\n",
-				      pval->fixed_b);
-			CIFISP_DPRINT(CIFISP_DEBUG, " fixed_C: %d\n",
-				      pval->fixed_c);
-			CIFISP_DPRINT(CIFISP_DEBUG, " fixed_D: %d\n",
-				      pval->fixed_d);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: BLS Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: BLS Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " enable_auto: %d\n",
+			      pconfig->enable_auto);
+		CIFISP_DPRINT(CIFISP_DEBUG, " en_windows: %d\n",
+			      pconfig->en_windows);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window1.h_offs: %d\n",
+			      pconfig->bls_window1.h_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window1.v_offs: %d\n",
+			      pconfig->bls_window1.v_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window1.h_size: %d\n",
+			      pconfig->bls_window1.h_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window1.v_size: %d\n",
+			      pconfig->bls_window1.v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window2.h_offs: %d\n",
+			      pconfig->bls_window2.h_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window2.v_offs: %d\n",
+			      pconfig->bls_window2.v_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window2.h_size: %d\n",
+			      pconfig->bls_window2.h_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " bls_window2.v_size: %d\n",
+			      pconfig->bls_window2.v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG, " bls_samples: %d\n",
+			      pconfig->bls_samples);
+		CIFISP_DPRINT(CIFISP_DEBUG, " fixed_A: %d\n",
+			      pval->fixed_a);
+		CIFISP_DPRINT(CIFISP_DEBUG, " fixed_B: %d\n",
+			      pval->fixed_b);
+		CIFISP_DPRINT(CIFISP_DEBUG, " fixed_C: %d\n",
+			      pval->fixed_c);
+		CIFISP_DPRINT(CIFISP_DEBUG, " fixed_D: %d\n",
+			      pval->fixed_d);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: BLS Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 	case CIFISP_MODULE_LSC:{
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### LSC Parameters - BEGIN ####\n");
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### LSC Parameters - END ####\n");
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### LSC Parameters - BEGIN ####\n");
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### LSC Parameters - END ####\n");
 		}
 		break;
 	case CIFISP_MODULE_FLT:{
-			struct cifisp_flt_config *pconfig =
-			    (struct cifisp_flt_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: FLT Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_mask_sharp0: %d\n",
-				      pconfig->flt_mask_sharp0);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_mask_sharp1: %d\n",
-				      pconfig->flt_mask_sharp1);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_diag: %d\n",
-				      pconfig->flt_mask_diag);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_mask_blur_max: %d\n",
-				      pconfig->flt_mask_blur_max);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_blur: %d\n",
-				      pconfig->flt_mask_blur);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_lin: %d\n",
-				      pconfig->flt_mask_lin);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_orth: %d\n",
-				      pconfig->flt_mask_orth);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_mask_v_diag: %d\n",
-				      pconfig->flt_mask_v_diag);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_mask_h_diag: %d\n",
-				      pconfig->flt_mask_h_diag);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_lum_weight: %d\n",
-				      pconfig->flt_lum_weight);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_blur_th0: %d\n",
-				      pconfig->flt_blur_th0);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_blur_th1: %d\n",
-				      pconfig->flt_blur_th1);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_sharp0_th: %d\n",
-				      pconfig->flt_sharp0_th);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_sharp1_th: %d\n",
-				      pconfig->flt_sharp1_th);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_chrom_h_mode: %d\n",
-				      pconfig->flt_chrom_h_mode);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_chrom_v_mode: %d\n",
-				      pconfig->flt_chrom_v_mode);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " flt_diag_sharp_mode: %d\n",
-				      pconfig->flt_diag_sharp_mode);
-			CIFISP_DPRINT(CIFISP_DEBUG, " flt_mode: %d\n",
-				      pconfig->flt_mode);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: FLT Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_flt_config *pconfig =
+		    (struct cifisp_flt_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: FLT Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_mask_sharp0: %d\n",
+			      pconfig->flt_mask_sharp0);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_mask_sharp1: %d\n",
+			      pconfig->flt_mask_sharp1);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_diag: %d\n",
+			      pconfig->flt_mask_diag);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_mask_blur_max: %d\n",
+			      pconfig->flt_mask_blur_max);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_blur: %d\n",
+			      pconfig->flt_mask_blur);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_lin: %d\n",
+			      pconfig->flt_mask_lin);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_mask_orth: %d\n",
+			      pconfig->flt_mask_orth);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_mask_v_diag: %d\n",
+			      pconfig->flt_mask_v_diag);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_mask_h_diag: %d\n",
+			      pconfig->flt_mask_h_diag);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_lum_weight: %d\n",
+			      pconfig->flt_lum_weight);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_blur_th0: %d\n",
+			      pconfig->flt_blur_th0);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_blur_th1: %d\n",
+			      pconfig->flt_blur_th1);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_sharp0_th: %d\n",
+			      pconfig->flt_sharp0_th);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_sharp1_th: %d\n",
+			      pconfig->flt_sharp1_th);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_chrom_h_mode: %d\n",
+			      pconfig->flt_chrom_h_mode);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_chrom_v_mode: %d\n",
+			      pconfig->flt_chrom_v_mode);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " flt_diag_sharp_mode: %d\n",
+			      pconfig->flt_diag_sharp_mode);
+		CIFISP_DPRINT(CIFISP_DEBUG, " flt_mode: %d\n",
+			      pconfig->flt_mode);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: FLT Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_BDM:{
-			struct cifisp_bdm_config *pconfig =
-			    (struct cifisp_bdm_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: BDM Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " demosaic_th: %d\n",
-				      pconfig->demosaic_th);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: BDM Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_bdm_config *pconfig =
+		    (struct cifisp_bdm_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: BDM Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " demosaic_th: %d\n",
+			      pconfig->demosaic_th);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: BDM Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_SDG:{
-			struct cifisp_sdg_config *pconfig =
-			    (struct cifisp_sdg_config *)config;
-			unsigned int i;
+		struct cifisp_sdg_config *pconfig =
+		    (struct cifisp_sdg_config *)config;
+		unsigned int i;
 
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: SDG Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " RED -Curve parameters\n");
+		for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
 			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: SDG Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " RED -Curve parameters\n");
-			for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
-				CIFISP_DPRINT(CIFISP_DEBUG,
-					" gamma_y[%d]: %d\n",
-					pconfig->curve_r.gamma_y[i]);
-			}
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " GREEN -Curve parameters\n");
-			for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
-				CIFISP_DPRINT(CIFISP_DEBUG,
-					" gamma_y[%d]: %d\n",
-					pconfig->curve_g.gamma_y[i]);
-			}
+				      " gamma_y[%d]: %d\n",
+				      pconfig->curve_r.gamma_y[i]);
+		}
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " GREEN -Curve parameters\n");
+		for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
 			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " BLUE -Curve parameters\n");
-			for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
-				CIFISP_DPRINT(CIFISP_DEBUG,
-					" gamma_y[%d]: %d\n",
-					pconfig->curve_b.gamma_y[i]);
-			}
+				      " gamma_y[%d]: %d\n",
+				p      config->curve_g.gamma_y[i]);
+		}
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " BLUE -Curve parameters\n");
+		for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
 			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: SDG Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+				      " gamma_y[%d]: %d\n",
+				      pconfig->curve_b.gamma_y[i]);
+		}
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: SDG Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_GOC:{
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: GOC Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: GOC Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: GOC Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: GOC Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_CTK:{
-			struct cifisp_ctk_config *pconfig =
-			    (struct cifisp_ctk_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: CTK Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff0: %d\n",
-				      pconfig->coeff0);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff1: %d\n",
-				      pconfig->coeff1);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff2: %d\n",
-				      pconfig->coeff2);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff3: %d\n",
-				      pconfig->coeff3);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff4: %d\n",
-				      pconfig->coeff4);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff5: %d\n",
-				      pconfig->coeff5);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff6: %d\n",
-				      pconfig->coeff6);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff7: %d\n",
-				      pconfig->coeff7);
-			CIFISP_DPRINT(CIFISP_DEBUG, " coeff8: %d\n",
-				      pconfig->coeff8);
-			CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_r: %d\n",
-				      pconfig->ct_offset_r);
-			CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_g: %d\n",
-				      pconfig->ct_offset_g);
-			CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_b: %d\n",
-				      pconfig->ct_offset_b);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: CTK Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_ctk_config *pconfig =
+			(struct cifisp_ctk_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: CTK Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff0: %d\n",
+			      pconfig->coeff0);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff1: %d\n",
+			      pconfig->coeff1);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff2: %d\n",
+			      pconfig->coeff2);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff3: %d\n",
+			      pconfig->coeff3);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff4: %d\n",
+			      pconfig->coeff4);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff5: %d\n",
+			      pconfig->coeff5);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff6: %d\n",
+			      pconfig->coeff6);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff7: %d\n",
+			      pconfig->coeff7);
+		CIFISP_DPRINT(CIFISP_DEBUG, " coeff8: %d\n",
+			      pconfig->coeff8);
+		CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_r: %d\n",
+			      pconfig->ct_offset_r);
+		CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_g: %d\n",
+			      pconfig->ct_offset_g);
+		CIFISP_DPRINT(CIFISP_DEBUG, " ct_offset_b: %d\n",
+			      pconfig->ct_offset_b);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: CTK Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_AWB:{
-			struct cifisp_awb_meas_config *pconfig =
-			    (struct cifisp_awb_meas_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AWB Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " awb_mode: %d\n",
-				      pconfig->awb_mode);
-			CIFISP_DPRINT(CIFISP_DEBUG, " max_y: %d\n",
-				      pconfig->max_y);
-			CIFISP_DPRINT(CIFISP_DEBUG, " min_y: %d\n",
-				      pconfig->min_y);
-			CIFISP_DPRINT(CIFISP_DEBUG, " max_csum: %d\n",
-				      pconfig->max_csum);
-			CIFISP_DPRINT(CIFISP_DEBUG, " min_c: %d\n",
-				      pconfig->min_c);
-			CIFISP_DPRINT(CIFISP_DEBUG, " frames: %d\n",
-				      pconfig->frames);
-			CIFISP_DPRINT(CIFISP_DEBUG, " awb_ref_cr: %d\n",
-				      pconfig->awb_ref_cr);
-			CIFISP_DPRINT(CIFISP_DEBUG, " awb_ref_cb: %d\n",
-				      pconfig->awb_ref_cb);
-			CIFISP_DPRINT(CIFISP_DEBUG, " gb_sat: %d\n",
-				      pconfig->gb_sat);
-			CIFISP_DPRINT(CIFISP_DEBUG, " gr_sat: %d\n",
-				      pconfig->gr_sat);
-			CIFISP_DPRINT(CIFISP_DEBUG, " r_sat: %d\n",
-				      pconfig->b_sat);
-			CIFISP_DPRINT(CIFISP_DEBUG, " grid_h_dim: %d\n",
-				      pconfig->grid_h_dim);
-			CIFISP_DPRINT(CIFISP_DEBUG, " grid_v_dim: %d\n",
-				      pconfig->grid_v_dim);
-			CIFISP_DPRINT(CIFISP_DEBUG, " grid_h_dist: %d\n",
-				      pconfig->grid_h_dist);
-			CIFISP_DPRINT(CIFISP_DEBUG, " grid_v_dist: %d\n",
-				      pconfig->grid_v_dist);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " enable_ymax_cmp: %d\n",
-				      pconfig->enable_ymax_cmp);
-			CIFISP_DPRINT(CIFISP_DEBUG, " rgb_meas_pnt: %d\n",
-				      pconfig->rgb_meas_pnt);
-			CIFISP_DPRINT(CIFISP_DEBUG, " AWB Window size\n");
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
-				      pconfig->awb_wnd.h_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
-				      pconfig->awb_wnd.v_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
-				      pconfig->awb_wnd.h_size);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
-				      pconfig->awb_wnd.v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AWB Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_awb_meas_config *pconfig =
+			(struct cifisp_awb_meas_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AWB Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " awb_mode: %d\n",
+			      pconfig->awb_mode);
+		CIFISP_DPRINT(CIFISP_DEBUG, " max_y: %d\n",
+			      pconfig->max_y);
+		CIFISP_DPRINT(CIFISP_DEBUG, " min_y: %d\n",
+			      pconfig->min_y);
+		CIFISP_DPRINT(CIFISP_DEBUG, " max_csum: %d\n",
+			      pconfig->max_csum);
+		CIFISP_DPRINT(CIFISP_DEBUG, " min_c: %d\n",
+			      pconfig->min_c);
+		CIFISP_DPRINT(CIFISP_DEBUG, " frames: %d\n",
+			      pconfig->frames);
+		CIFISP_DPRINT(CIFISP_DEBUG, " awb_ref_cr: %d\n",
+			      pconfig->awb_ref_cr);
+		CIFISP_DPRINT(CIFISP_DEBUG, " awb_ref_cb: %d\n",
+			      pconfig->awb_ref_cb);
+		CIFISP_DPRINT(CIFISP_DEBUG, " gb_sat: %d\n",
+			      pconfig->gb_sat);
+		CIFISP_DPRINT(CIFISP_DEBUG, " gr_sat: %d\n",
+			      pconfig->gr_sat);
+		CIFISP_DPRINT(CIFISP_DEBUG, " r_sat: %d\n",
+			      pconfig->b_sat);
+		CIFISP_DPRINT(CIFISP_DEBUG, " grid_h_dim: %d\n",
+			      pconfig->grid_h_dim);
+		CIFISP_DPRINT(CIFISP_DEBUG, " grid_v_dim: %d\n",
+			      pconfig->grid_v_dim);
+		CIFISP_DPRINT(CIFISP_DEBUG, " grid_h_dist: %d\n",
+			      pconfig->grid_h_dist);
+		CIFISP_DPRINT(CIFISP_DEBUG, " grid_v_dist: %d\n",
+			      pconfig->grid_v_dist);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " enable_ymax_cmp: %d\n",
+			      pconfig->enable_ymax_cmp);
+		CIFISP_DPRINT(CIFISP_DEBUG, " rgb_meas_pnt: %d\n",
+			      pconfig->rgb_meas_pnt);
+		CIFISP_DPRINT(CIFISP_DEBUG, " AWB Window size\n");
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
+			      pconfig->awb_wnd.h_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
+			      pconfig->awb_wnd.v_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
+			      pconfig->awb_wnd.h_size);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
+			      pconfig->awb_wnd.v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AWB Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_HST:{
-			struct cifisp_hst_config *pconfig =
-			    (struct cifisp_hst_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: HST Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " mode: %d\n",
-				      pconfig->mode);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " histogram_predivider: %d\n",
-				      pconfig->histogram_predivider);
-			CIFISP_DPRINT(CIFISP_DEBUG, " HST Window size\n");
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
-				      pconfig->meas_window.h_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
-				      pconfig->meas_window.v_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
-				      pconfig->meas_window.h_size);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
-				      pconfig->meas_window.v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: HST Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_hst_config *pconfig =
+			(struct cifisp_hst_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: HST Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " mode: %d\n",
+			      pconfig->mode);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " histogram_predivider: %d\n",
+			      pconfig->histogram_predivider);
+		CIFISP_DPRINT(CIFISP_DEBUG, " HST Window size\n");
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
+			      pconfig->meas_window.h_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
+			      pconfig->meas_window.v_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
+			      pconfig->meas_window.h_size);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
+			      pconfig->meas_window.v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: HST Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 
 		} break;
 
 	case CIFISP_MODULE_AEC:{
-			struct cifisp_aec_config *pconfig =
-			    (struct cifisp_aec_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AEC Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " autostop: %d\n",
-				      pconfig->autostop);
-			CIFISP_DPRINT(CIFISP_DEBUG, " AEC Window size\n");
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
-				      pconfig->meas_window.h_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
-				      pconfig->meas_window.v_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
-				      pconfig->meas_window.h_size);
-			CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
-				      pconfig->meas_window.v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AEC Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_aec_config *pconfig =
+			(struct cifisp_aec_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AEC Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " autostop: %d\n",
+			      pconfig->autostop);
+		CIFISP_DPRINT(CIFISP_DEBUG, " AEC Window size\n");
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_offs: %d\n",
+			      pconfig->meas_window.h_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_offs: %d\n",
+			      pconfig->meas_window.v_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " h_size: %d\n",
+			      pconfig->meas_window.h_size);
+		CIFISP_DPRINT(CIFISP_DEBUG, " v_size: %d\n",
+			      pconfig->meas_window.v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AEC Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 
 	case CIFISP_MODULE_CPROC:{
-			struct cifisp_cproc_config *pconfig =
-			    (struct cifisp_cproc_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: CPROC Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " contrast: %d\n",
-				      pconfig->contrast);
-			CIFISP_DPRINT(CIFISP_DEBUG, " hue: %d\n",
-				      pconfig->hue);
-			CIFISP_DPRINT(CIFISP_DEBUG, " sat: %d\n",
-				      pconfig->sat);
-			CIFISP_DPRINT(CIFISP_DEBUG, " brightness: %d\n",
-				      pconfig->brightness);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: CPROC Parameters - END ####\n",
-				      ISP_VDEV_NAME);
+		struct cifisp_cproc_config *pconfig =
+			(struct cifisp_cproc_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: CPROC Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " contrast: %d\n",
+			      pconfig->contrast);
+		CIFISP_DPRINT(CIFISP_DEBUG, " hue: %d\n",
+			      pconfig->hue);
+		CIFISP_DPRINT(CIFISP_DEBUG, " sat: %d\n",
+			      pconfig->sat);
+		CIFISP_DPRINT(CIFISP_DEBUG, " brightness: %d\n",
+			      pconfig->brightness);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: CPROC Parameters - END ####\n",
+			      ISP_VDEV_NAME);
 		} break;
 	case CIFISP_MODULE_YCFLT:{
-			struct cifisp_ycflt_config *pconfig =
-			    (struct cifisp_ycflt_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: YCFLT Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_ctrl: %d\n",
-			CIFISP_DPRINT(CIFISP_DEBUG, " ctrl: %d\n",
-					pconfig->ctrl);
-			CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_ctrl: %d\n",
-				      pconfig->chr_ss_ctrl);
-			CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_fac: %d\n",
-				      pconfig->chr_ss_fac);
-			CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_offs: %d\n",
-				      pconfig->chr_ss_offs);
-			CIFISP_DPRINT(CIFISP_DEBUG, " chr_nr_ctrl: %d\n",
-				      pconfig->chr_nr_ctrl);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_edge_gain: %d\n",
-				      pconfig->lum_eenr_edge_gain);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_corner_gain: %d\n",
-				      pconfig->lum_eenr_corner_gain);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_fc_crop_neg: %d\n",
-				      pconfig->lum_eenr_fc_crop_neg);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_fc_crop_pos: %d\n",
-				      pconfig->lum_eenr_fc_crop_pos);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_fc_gain_neg: %d\n",
-				      pconfig->lum_eenr_fc_gain_neg);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " lum_eenr_fc_gain_pos: %d\n",
-				      pconfig->lum_eenr_fc_gain_pos);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: YCFLT Parameters - END ####\n",
-				      ISP_VDEV_NAME);
-			break;
+		struct cifisp_ycflt_config *pconfig =
+			(struct cifisp_ycflt_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: YCFLT Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG, " ctrl: %d\n",
+			      pconfig->ctrl);
+		CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_ctrl: %d\n",
+			      pconfig->chr_ss_ctrl);
+		CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_fac: %d\n",
+			      pconfig->chr_ss_fac);
+		CIFISP_DPRINT(CIFISP_DEBUG, " chr_ss_offs: %d\n",
+			      pconfig->chr_ss_offs);
+		CIFISP_DPRINT(CIFISP_DEBUG, " chr_nr_ctrl: %d\n",
+			      pconfig->chr_nr_ctrl);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_edge_gain: %d\n",
+			      pconfig->lum_eenr_edge_gain);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_corner_gain: %d\n",
+			      pconfig->lum_eenr_corner_gain);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_fc_crop_neg: %d\n",
+			      pconfig->lum_eenr_fc_crop_neg);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_fc_crop_pos: %d\n",
+			      pconfig->lum_eenr_fc_crop_pos);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_fc_gain_neg: %d\n",
+			      pconfig->lum_eenr_fc_gain_neg);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " lum_eenr_fc_gain_pos: %d\n",
+			      pconfig->lum_eenr_fc_gain_pos);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: YCFLT Parameters - END ####\n",
+			      ISP_VDEV_NAME);
+		break;
 		}
 	case CIFISP_MODULE_AFC:{
-			struct cifisp_afc_config *pconfig =
-			    (struct cifisp_afc_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      "#### %s: AFC Parameters - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " window A %d %d %d %d\n",
-				      pconfig->afm_win[0].h_offs,
-				      pconfig->afm_win[0].v_offs,
-				      pconfig->afm_win[0].h_size,
-				      pconfig->afm_win[0].v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " window B %d %d %d %d\n",
-				      pconfig->afm_win[1].h_offs,
-				      pconfig->afm_win[1].v_offs,
-				      pconfig->afm_win[1].h_size,
-				      pconfig->afm_win[1].v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				      " window C %d %d %d %d\n",
-				      pconfig->afm_win[2].h_offs,
-				      pconfig->afm_win[2].v_offs,
-				      pconfig->afm_win[2].h_size,
-				      pconfig->afm_win[2].v_size);
-			CIFISP_DPRINT(CIFISP_DEBUG, " thres: %d\n",
-				      pconfig->thres);
-			CIFISP_DPRINT(CIFISP_DEBUG, " var_shift: %d\n",
-				      pconfig->var_shift);
-			break;
+		struct cifisp_afc_config *pconfig =
+			(struct cifisp_afc_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "#### %s: AFC Parameters - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " window A %d %d %d %d\n",
+			      pconfig->afm_win[0].h_offs,
+			      pconfig->afm_win[0].v_offs,
+			      pconfig->afm_win[0].h_size,
+			      pconfig->afm_win[0].v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " window B %d %d %d %d\n",
+			      pconfig->afm_win[1].h_offs,
+			      pconfig->afm_win[1].v_offs,
+			      pconfig->afm_win[1].h_size,
+			      pconfig->afm_win[1].v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      " window C %d %d %d %d\n",
+			      pconfig->afm_win[2].h_offs,
+			      pconfig->afm_win[2].v_offs,
+			      pconfig->afm_win[2].h_size,
+			      pconfig->afm_win[2].v_size);
+		CIFISP_DPRINT(CIFISP_DEBUG, " thres: %d\n",
+			      pconfig->thres);
+		CIFISP_DPRINT(CIFISP_DEBUG, " var_shift: %d\n",
+			      pconfig->var_shift);
+		break;
 		}
 	case CIFISP_MODULE_IE: {
-			struct cifisp_ie_config *pconfig =
-			    (struct cifisp_ie_config *)config;
-			CIFISP_DPRINT(CIFISP_DEBUG,
-				"effect %d, %x, %x, %x, %x, %x, %x %d\n",
-				pconfig->effect, pconfig->color_sel,
-				pconfig->eff_mat_1, pconfig->eff_mat_2,
-				pconfig->eff_mat_3, pconfig->eff_mat_4,
-				pconfig->eff_mat_5, pconfig->eff_tint);
-			break;
+		struct cifisp_ie_config *pconfig =
+			(struct cifisp_ie_config *)config;
+		CIFISP_DPRINT(CIFISP_DEBUG,
+			      "effect %d, %x, %x, %x, %x, %x, %x %d\n",
+			      pconfig->effect, pconfig->color_sel,
+			      pconfig->eff_mat_1, pconfig->eff_mat_2,
+			      pconfig->eff_mat_3, pconfig->eff_mat_4,
+			      pconfig->eff_mat_5, pconfig->eff_tint);
+		break;
 		}
 	default:
 		CIFISP_DPRINT(CIFISP_DEBUG,
-		"####%s: Invalid Module ID ####\n", ISP_VDEV_NAME);
+			      "####%s: Invalid Module ID ####\n", ISP_VDEV_NAME);
 		break;
 	}
 #endif
@@ -4858,304 +4954,294 @@ static void cifisp_reg_dump(const struct cif_isp10_isp_dev *isp_dev,
 		CIFISP_DPRINT(level, "#### LSC Registers - BEGIN ####\n");
 		CIFISP_DPRINT(level, "#### LSC Registers - END ####\n");
 		break;
-	case CIFISP_MODULE_FLT:{
-			CIFISP_DPRINT(level,
-				"#### %s: FLT Registers - BEGIN ####\n",
-				ISP_VDEV_NAME);
-			CIFISP_DPRINT(level,
-				" CIF_ISP_FILT_MODE: %d\n",
-				cifisp_ioread32(CIF_ISP_FILT_MODE));
-			CIFISP_DPRINT(level,
-				" CIF_ISP_FILT_LUM_WEIGHT: %d\n",
-				cifisp_ioread32(CIF_ISP_FILT_LUM_WEIGHT));
-			CIFISP_DPRINT(level,
-				"#### %s: FLT Registers - END ####\n",
-				ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_FLT:
+		CIFISP_DPRINT(level,
+			      "#### %s: FLT Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level,
+			      " CIF_ISP_FILT_MODE: %d\n",
+			      cifisp_ioread32(CIF_ISP_FILT_MODE));
+		CIFISP_DPRINT(level,
+			      " CIF_ISP_FILT_LUM_WEIGHT: %d\n",
+			      cifisp_ioread32(CIF_ISP_FILT_LUM_WEIGHT));
+		CIFISP_DPRINT(level,
+			      "#### %s: FLT Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_BDM:{
-			CIFISP_DPRINT(level,
-				      "#### %s: BDM Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_DEMOSAIC: %d\n",
-				      cifisp_ioread32(CIF_ISP_DEMOSAIC));
-			CIFISP_DPRINT(level,
-				      "#### %s: BDM Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_BDM:
+		CIFISP_DPRINT(level,
+			      "#### %s: BDM Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_DEMOSAIC: %d\n",
+			      cifisp_ioread32(CIF_ISP_DEMOSAIC));
+		CIFISP_DPRINT(level,
+			      "#### %s: BDM Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_SDG:{
-			CIFISP_DPRINT(level,
-				      "#### %s: SDG Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_DX_LO: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_DX_LO));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_DX_HI: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_DX_HI));
-
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y0: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y0));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y1: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y1));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y2: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y2));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y3: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y3));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y4: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y4));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y5: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y5));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y6: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y6));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y7: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y7));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y8: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y8));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y9: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y9));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y10: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y10));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y11: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y11));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y12: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y12));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y13: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y13));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y14: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y14));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y15: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y15));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y16: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_R_Y16));
-
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y0: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y0));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y1: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y1));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y2: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y2));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y3: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y3));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y4: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y4));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y5: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y5));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y6: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y6));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y7: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y7));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y8: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y8));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y9: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y9));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y10: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y10));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y11: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y11));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y12: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y12));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y13: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y13));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y14: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y14));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y15: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y15));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y16: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_G_Y16));
-
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y0: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y0));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y1: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y1));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y2: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y2));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y3: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y3));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y4: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y4));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y5: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y5));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y6: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y6));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y7: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y7));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y8: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y8));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y9: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y9));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y10: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y10));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y11: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y11));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y12: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y12));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y13: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y13));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y14: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y14));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y15: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y15));
-			CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y16: %d\n",
-				      cifisp_ioread32(CIF_ISP_GAMMA_B_Y16));
-			CIFISP_DPRINT(level,
-				      "#### %s: SDG Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_SDG:
+		CIFISP_DPRINT(level,
+			      "#### %s: SDG Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_DX_LO: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_DX_LO));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_DX_HI: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_DX_HI));
+
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y0: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y0));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y1: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y1));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y2: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y2));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y3: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y3));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y4: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y4));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y5: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y5));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y6: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y6));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y7: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y7));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y8: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y8));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y9: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y9));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y10: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y10));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y11: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y11));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y12: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y12));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y13: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y13));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y14: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y14));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y15: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y15));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_R_Y16: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_R_Y16));
+
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y0: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y0));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y1: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y1));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y2: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y2));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y3: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y3));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y4: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y4));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y5: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y5));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y6: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y6));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y7: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y7));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y8: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y8));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y9: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y9));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y10: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y10));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y11: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y11));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y12: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y12));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y13: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y13));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y14: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y14));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y15: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y15));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_G_Y16: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_G_Y16));
+
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y0: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y0));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y1: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y1));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y2: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y2));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y3: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y3));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y4: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y4));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y5: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y5));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y6: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y6));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y7: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y7));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y8: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y8));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y9: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y9));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y10: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y10));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y11: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y11));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y12: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y12));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y13: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y13));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y14: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y14));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y15: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y15));
+		CIFISP_DPRINT(level, " CIF_ISP_GAMMA_B_Y16: %d\n",
+			      cifisp_ioread32(CIF_ISP_GAMMA_B_Y16));
+		CIFISP_DPRINT(level,
+			      "#### %s: SDG Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_GOC:{
-			CIFISP_DPRINT(level,
-				      "#### %s: GOC Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level,
-				      "#### %s: GOC registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_GOC:
+		CIFISP_DPRINT(level,
+			      "#### %s: GOC Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level,
+			      "#### %s: GOC registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_CTK:{
-			CIFISP_DPRINT(level,
-				      "#### %s: CTK Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_0: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_0));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_1: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_1));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_2: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_2));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_3: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_3));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_4: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_4));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_5: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_5));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_6: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_6));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_7: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_7));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_8: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_COEFF_8));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_R: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_OFFSET_R));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_G: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_OFFSET_G));
-			CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_B: %d\n",
-				      cifisp_ioread32(CIF_ISP_CT_OFFSET_B));
-			CIFISP_DPRINT(level,
-				      "#### %s: CTK Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_CTK:
+		CIFISP_DPRINT(level,
+			      "#### %s: CTK Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_0: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_0));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_1: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_1));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_2: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_2));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_3: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_3));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_4: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_4));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_5: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_5));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_6: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_6));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_7: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_7));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_COEFF_8: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_COEFF_8));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_R: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_OFFSET_R));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_G: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_OFFSET_G));
+		CIFISP_DPRINT(level, " CIF_ISP_CT_OFFSET_B: %d\n",
+			      cifisp_ioread32(CIF_ISP_CT_OFFSET_B));
+		CIFISP_DPRINT(level,
+			      "#### %s: CTK Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_AWB:{
-			CIFISP_DPRINT(level,
-				      "#### %s: AWB Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_PROP: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_PROP));
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_G: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_GAIN_G));
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_RB: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_GAIN_RB));
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_REF: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_REF));
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_RB: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_PROP));
-			CIFISP_DPRINT(level, " CIF_ISP_AWB_FRAMES: %x\n",
-				      cifisp_ioread32(CIF_ISP_AWB_FRAMES));
-			CIFISP_DPRINT(level,
-				      "#### %s: AWB Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_AWB:
+		CIFISP_DPRINT(level,
+			      "#### %s: AWB Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_PROP: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_PROP));
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_G: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_GAIN_G));
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_RB: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_GAIN_RB));
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_REF: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_REF));
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_GAIN_RB: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_PROP));
+		CIFISP_DPRINT(level, " CIF_ISP_AWB_FRAMES: %x\n",
+			      cifisp_ioread32(CIF_ISP_AWB_FRAMES));
+		CIFISP_DPRINT(level,
+			      "#### %s: AWB Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_HST:{
-			CIFISP_DPRINT(level,
-				      "#### %s: HST Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_HIST_PROP: %d\n",
-				      cifisp_ioread32(CIF_ISP_HIST_PROP));
-			CIFISP_DPRINT(level, " CIF_ISP_HIST_H_OFFS: %d\n",
-				      cifisp_ioread32(CIF_ISP_HIST_H_OFFS));
-			CIFISP_DPRINT(level, " CIF_ISP_HIST_H_SIZE: %d\n",
-				      cifisp_ioread32(CIF_ISP_HIST_H_SIZE));
-			CIFISP_DPRINT(level, " CIF_ISP_HIST_V_OFFS: %d\n",
-				      cifisp_ioread32(CIF_ISP_HIST_V_OFFS));
-			CIFISP_DPRINT(level, " CIF_ISP_HIST_V_SIZE: %d\n",
-				      cifisp_ioread32(CIF_ISP_HIST_V_SIZE));
-			CIFISP_DPRINT(level,
-				      "#### %s: HST Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_HST:
+		CIFISP_DPRINT(level,
+			      "#### %s: HST Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_HIST_PROP: %d\n",
+			      cifisp_ioread32(CIF_ISP_HIST_PROP));
+		CIFISP_DPRINT(level, " CIF_ISP_HIST_H_OFFS: %d\n",
+			      cifisp_ioread32(CIF_ISP_HIST_H_OFFS));
+		CIFISP_DPRINT(level, " CIF_ISP_HIST_H_SIZE: %d\n",
+			      cifisp_ioread32(CIF_ISP_HIST_H_SIZE));
+		CIFISP_DPRINT(level, " CIF_ISP_HIST_V_OFFS: %d\n",
+			      cifisp_ioread32(CIF_ISP_HIST_V_OFFS));
+		CIFISP_DPRINT(level, " CIF_ISP_HIST_V_SIZE: %d\n",
+			      cifisp_ioread32(CIF_ISP_HIST_V_SIZE));
+		CIFISP_DPRINT(level,
+			      "#### %s: HST Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_AEC:{
-			CIFISP_DPRINT(level,
-				      "#### %s: AEC Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " CIF_ISP_EXP_CTRL: %d\n",
-				      cifisp_ioread32(CIF_ISP_EXP_CTRL));
-			CIFISP_DPRINT(level, " CIF_ISP_EXP_H_OFFSET: %d\n",
-				      cifisp_ioread32(CIF_ISP_EXP_H_OFFSET));
-			CIFISP_DPRINT(level, " CIF_ISP_EXP_V_OFFSET: %d\n",
-				      cifisp_ioread32(CIF_ISP_EXP_V_OFFSET));
-			CIFISP_DPRINT(level, " CIF_ISP_EXP_H_SIZE: %d\n",
-				      cifisp_ioread32(CIF_ISP_EXP_H_SIZE));
-			CIFISP_DPRINT(level, " CIF_ISP_EXP_V_SIZE: %d\n",
-				      cifisp_ioread32(CIF_ISP_EXP_V_SIZE));
-			CIFISP_DPRINT(level,
-				      "#### %s: AEC Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_AEC:
+		CIFISP_DPRINT(level,
+			      "#### %s: AEC Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " CIF_ISP_EXP_CTRL: %d\n",
+			      cifisp_ioread32(CIF_ISP_EXP_CTRL));
+		CIFISP_DPRINT(level, " CIF_ISP_EXP_H_OFFSET: %d\n",
+			      cifisp_ioread32(CIF_ISP_EXP_H_OFFSET));
+		CIFISP_DPRINT(level, " CIF_ISP_EXP_V_OFFSET: %d\n",
+			      cifisp_ioread32(CIF_ISP_EXP_V_OFFSET));
+		CIFISP_DPRINT(level, " CIF_ISP_EXP_H_SIZE: %d\n",
+			      cifisp_ioread32(CIF_ISP_EXP_H_SIZE));
+		CIFISP_DPRINT(level, " CIF_ISP_EXP_V_SIZE: %d\n",
+			      cifisp_ioread32(CIF_ISP_EXP_V_SIZE));
+		CIFISP_DPRINT(level,
+			      "#### %s: AEC Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 
-	case CIFISP_MODULE_CPROC:{
-			CIFISP_DPRINT(level,
-				      "#### %s: CPROC Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " ctrl: %d\n",
-				      cifisp_ioread32(CIF_C_PROC_CTRL));
-			CIFISP_DPRINT(level, " contrast: %d\n",
-				      cifisp_ioread32(CIF_C_PROC_CONTRAST));
-			CIFISP_DPRINT(level, " hue: %d\n",
-				      cifisp_ioread32(CIF_C_PROC_HUE));
-			CIFISP_DPRINT(level, " sat: %d\n",
-				      cifisp_ioread32(CIF_C_PROC_SATURATION));
-			CIFISP_DPRINT(level, " brightness: %d\n",
-				      cifisp_ioread32(CIF_C_PROC_BRIGHTNESS));
-			CIFISP_DPRINT(level,
-				      "#### %s: CPROC Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_CPROC:
+		CIFISP_DPRINT(level,
+			      "#### %s: CPROC Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " ctrl: %d\n",
+			      cifisp_ioread32(CIF_C_PROC_CTRL));
+		CIFISP_DPRINT(level, " contrast: %d\n",
+			      cifisp_ioread32(CIF_C_PROC_CONTRAST));
+		CIFISP_DPRINT(level, " hue: %d\n",
+			      cifisp_ioread32(CIF_C_PROC_HUE));
+		CIFISP_DPRINT(level, " sat: %d\n",
+			      cifisp_ioread32(CIF_C_PROC_SATURATION));
+		CIFISP_DPRINT(level, " brightness: %d\n",
+			      cifisp_ioread32(CIF_C_PROC_BRIGHTNESS));
+		CIFISP_DPRINT(level,
+			      "#### %s: CPROC Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
-	case CIFISP_MODULE_AFC:{
-			CIFISP_DPRINT(level,
-				      "#### %s: AFC Registers - BEGIN ####\n",
-				      ISP_VDEV_NAME);
-			CIFISP_DPRINT(level, " afm_ctr: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_CTRL));
-			CIFISP_DPRINT(level, " afm_lt_a: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_LT_A));
-			CIFISP_DPRINT(level, " afm_rb_a: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_RB_A));
-			CIFISP_DPRINT(level, " afm_lt_b: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_LT_B));
-			CIFISP_DPRINT(level, " afm_rb_b: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_RB_B));
-			CIFISP_DPRINT(level, " afm_lt_c: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_LT_C));
-			CIFISP_DPRINT(level, " afm_rb_c: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_RB_C));
-			CIFISP_DPRINT(level, " afm_thres: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_THRES));
-			CIFISP_DPRINT(level, " afm_var_shift: %d\n",
-				      cifisp_ioread32(CIF_ISP_AFM_VAR_SHIFT));
-			CIFISP_DPRINT(level,
-				      "#### %s: YCFLT Registers - END ####\n",
-				      ISP_VDEV_NAME);
-		}
+	case CIFISP_MODULE_AFC:
+		CIFISP_DPRINT(level,
+			      "#### %s: AFC Registers - BEGIN ####\n",
+			      ISP_VDEV_NAME);
+		CIFISP_DPRINT(level, " afm_ctr: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_CTRL));
+		CIFISP_DPRINT(level, " afm_lt_a: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_LT_A));
+		CIFISP_DPRINT(level, " afm_rb_a: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_RB_A));
+		CIFISP_DPRINT(level, " afm_lt_b: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_LT_B));
+		CIFISP_DPRINT(level, " afm_rb_b: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_RB_B));
+		CIFISP_DPRINT(level, " afm_lt_c: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_LT_C));
+		CIFISP_DPRINT(level, " afm_rb_c: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_RB_C));
+		CIFISP_DPRINT(level, " afm_thres: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_THRES));
+		CIFISP_DPRINT(level, " afm_var_shift: %d\n",
+			      cifisp_ioread32(CIF_ISP_AFM_VAR_SHIFT));
+		CIFISP_DPRINT(level,
+			      "#### %s: YCFLT Registers - END ####\n",
+			      ISP_VDEV_NAME);
 		break;
 	default:
 		CIFISP_DPRINT(level, "####%s: Invalid Module ID ####\n",
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.h b/drivers/media/platform/rk-isp10/cif_isp10_isp.h
index 006c808ffca5a..2b3867bb389fa 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.h
@@ -25,6 +25,8 @@
 /*
  * ISP device struct
  */
+#define CIF_ISP10_META_INFO_NUM                2
+
 enum cif_isp10_pix_fmt;
 
 enum cif_isp10_pix_fmt_quantization {
@@ -33,18 +35,34 @@ enum cif_isp10_pix_fmt_quantization {
 	CIF_ISP10_QUANTIZATION_LIM_RANGE = 2
 };
 
+struct cif_isp10_isp_meta_info {
+	unsigned int write_id;
+	unsigned int read_id;
+	unsigned int read_cnt;
+	unsigned int read_max;
+	unsigned int frame_id[CIF_ISP10_META_INFO_NUM];
+	struct timeval vs_t[CIF_ISP10_META_INFO_NUM];
+	struct timeval fi_t[CIF_ISP10_META_INFO_NUM];
+};
+
+struct cif_isp10_isp_cfgs_log {
+	unsigned int s_frame_id[3];
+	unsigned int new_id;
+	unsigned int curr_id;
+};
+
 struct cif_isp10_isp_other_cfgs {
-	struct cifisp_isp_other_cfg *last_or_new;
-	struct cifisp_isp_other_cfg *curr;
-	struct cifisp_isp_other_cfg cfgs[2];
+	struct cif_isp10_isp_cfgs_log log[CIFISP_MODULE_MAX];
+	struct cifisp_isp_other_cfg cfgs[3];
 	unsigned int module_updates;
+	unsigned int module_actives;
 };
 
 struct cif_isp10_isp_meas_cfgs {
-	struct cifisp_isp_meas_cfg *last_or_new;
-	struct cifisp_isp_meas_cfg *curr;
-	struct cifisp_isp_meas_cfg cfgs[2];
+	struct cif_isp10_isp_cfgs_log log[CIFISP_MODULE_MAX];
+	struct cifisp_isp_meas_cfg cfgs[3];
 	unsigned int module_updates;
+	unsigned int module_actives;
 };
 
 struct cif_isp10_isp_meas_stats {
@@ -87,10 +105,17 @@ struct cif_isp10_isp_dev {
 	unsigned int frame_id;
 	unsigned int frame_id_setexp;
 	unsigned int active_meas;
+	unsigned int meas_send_alone;
+
+	bool awb_meas_ready;
+	bool afm_meas_ready;
+	bool aec_meas_ready;
+	bool hst_meas_ready;
 
 	struct timeval vs_t;	/* updated each frame */
 	struct timeval fi_t;	/* updated each frame */
 	struct workqueue_struct *readout_wq;
+	struct cif_isp10_isp_meta_info meta_info;
 
 	unsigned int *dev_id;
 
@@ -107,11 +132,13 @@ struct cif_isp10_isp_readout_work {
 	struct cif_isp10_isp_dev *isp_dev;
 
 	unsigned int frame_id;
+	unsigned int active_meas;
 	struct timeval vs_t;
 	struct timeval fi_t;
 	enum cif_isp10_isp_readout_cmd readout;
 	struct vb2_buffer *vb;
 	unsigned int stream_id;
+	struct cifisp_isp_metadata *isp_metadata;
 };
 
 int register_cifisp_device(
@@ -126,11 +153,14 @@ void cifisp_configure_isp(
 	enum cif_isp10_pix_fmt_quantization quantization);
 void cifisp_disable_isp(struct cif_isp10_isp_dev *isp_dev);
 int cifisp_isp_isr(struct cif_isp10_isp_dev *isp_dev, u32 isp_mis);
+void cifisp_clr_readout_wq(struct cif_isp10_isp_dev *isp_dev);
 void cifisp_v_start(struct cif_isp10_isp_dev *isp_dev,
 	const struct timeval *timestamp);
 void cifisp_frame_in(
 	struct cif_isp10_isp_dev *isp_dev,
 	const struct timeval *fi_t);
+void cifisp_frame_id_reset(
+	struct cif_isp10_isp_dev *isp_dev);
 void cifisp_isp_readout_work(struct work_struct *work);
 
 #endif
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
index 66d694ef81408..98a865a97cd40 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
@@ -29,7 +29,7 @@
 #include "cif_isp10.h"
 #include <linux/platform_data/rk_isp10_platform.h>
 #include "cif_isp10_regs.h"
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 #include <linux/fs.h>
 #include <media/v4l2-controls_rockchip.h>
@@ -67,12 +67,8 @@ struct cif_isp10_pltfrm_data {
 		int mis;
 		int (*isr)(unsigned int mis, void *cntxt);
 	} irq_handlers[4];
-	struct list_head csi0_configs;
-	struct list_head csi1_configs;
-	s32 exp_time;
-	u16 gain;
 
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 	struct {
 		struct dentry *dir;
 		struct dentry *cif_isp10_file;
@@ -91,7 +87,7 @@ void cif_isp10_pltfrm_debug_register_print_cb(
 	struct device *dev,
 	void (*print)(void *cntxt, const char *block),
 	void *cntxt) {
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 	struct cif_isp10_pltfrm_data *pdata = dev->platform_data;
 
 	pdata->dbgfs.print_cntxt = cntxt;
@@ -99,334 +95,9 @@ void cif_isp10_pltfrm_debug_register_print_cb(
 #endif
 }
 
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 #define CIF_ISP10_DBGFS_BUF_SIZE 1024
 static char cif_isp10_dbgfs_buf[CIF_ISP10_DBGFS_BUF_SIZE];
-
-static int cif_isp10_dbgfs_fill_csi_config_from_string(
-	struct device *dev,
-	struct cif_isp10_csi_config *csi_config,
-	char *strp)
-{
-	char *token;
-
-	token = strsep(&strp, " ");
-	if (IS_ERR_OR_NULL(token))
-		goto missing_token;
-	if (IS_ERR_VALUE(kstrtou32(token, 10,
-			&csi_config->vc)))
-		goto wrong_token_format;
-	token = strsep(&strp, " ");
-	if (IS_ERR_OR_NULL(token))
-		goto missing_token;
-	if (IS_ERR_VALUE(kstrtou32(token, 10,
-			&csi_config->nb_lanes)))
-		goto wrong_token_format;
-	token = strsep(&strp, " ");
-	if (IS_ERR_OR_NULL(token))
-		goto missing_token;
-	if (IS_ERR_VALUE(kstrtou32(token, 16,
-			&csi_config->dphy1)))
-		goto wrong_token_format;
-	token = strsep(&strp, " ");
-	if (IS_ERR_OR_NULL(token))
-		goto missing_token;
-	if (IS_ERR_VALUE(kstrtou32(token, 16,
-			&csi_config->dphy2)))
-		goto wrong_token_format;
-	token = strsep(&strp, " ");
-	if (!IS_ERR_OR_NULL(token)) {
-		if (IS_ERR_VALUE(kstrtou32(token, 10,
-				&csi_config->ana_bandgab_bias)))
-			goto wrong_token_format;
-	} else {
-		csi_config->ana_bandgab_bias = (u32)-1;
-	}
-
-	return 0;
-missing_token:
-	cif_isp10_pltfrm_pr_err(dev,
-		"missing token, command format is 'push <pps> <vc> <#lanes> <HEX dphy1> <HEX dphy2> <analog bandgap bias>'\n");
-	return -EINVAL;
-wrong_token_format:
-	cif_isp10_pltfrm_pr_err(dev,
-		"wrong token format, command format is 'push <pps> <vc> <#lanes> <HEX dphy1> <HEX dphy2> <analog bandgap bias>'\n");
-	return -EINVAL;
-}
-
-static int cif_isp10_dbgfs_csi_configs_init(
-	struct device *dev,
-	enum cif_isp10_inp inp,
-	struct list_head *csi_configs)
-{
-	int ret = 0;
-	struct device *img_src_dev = NULL;
-	struct device_node *parent_node = NULL;
-	struct device_node *child_node = NULL, *prev_node = NULL;
-	struct cif_isp10_pltfrm_csi_config *cfg = NULL;
-	u32 pps;
-
-	img_src_dev = cif_isp10_pltfrm_get_img_src_device(dev, inp);
-	if (IS_ERR_OR_NULL(img_src_dev)) {
-		ret = -EFAULT;
-		goto err;
-	}
-	parent_node = of_node_get(img_src_dev->of_node);
-	put_device(img_src_dev);
-	img_src_dev = NULL;
-
-	while (!IS_ERR_OR_NULL(child_node =
-		of_get_next_child(parent_node, prev_node))) {
-		if (!strncasecmp(child_node->name,
-			"intel,camera-module-csi-config",
-			strlen("intel,camera-module-csi-config"))) {
-			ret = of_property_read_u32(child_node,
-				"intel,csi-pixels-per-second", &pps);
-			if (IS_ERR_VALUE(ret)) {
-				cif_isp10_pltfrm_pr_err(dev,
-					"reading property 'intel,csi-pixels-per-second'\n");
-				goto err;
-			}
-			cfg = kmalloc(
-				sizeof(struct cif_isp10_pltfrm_csi_config),
-			GFP_KERNEL);
-			if (!cfg) {
-				cif_isp10_pltfrm_pr_err(dev,
-					"memory allocation failed\n");
-				ret = -ENOMEM;
-				goto err;
-			}
-			cfg->pps = pps;
-			ret = cif_isp10_pltfrm_fill_csi_config_from_node(
-					dev, &cfg->csi_config, child_node);
-			if (IS_ERR_VALUE(ret))
-				goto err;
-			list_add_tail(&cfg->list, csi_configs);
-			cfg = NULL;
-		}
-		of_node_put(prev_node);
-		prev_node = child_node;
-	}
-	of_node_put(prev_node);
-	of_node_put(parent_node);
-
-	return 0;
-err:
-	of_node_put(prev_node);
-	of_node_put(child_node);
-	of_node_put(parent_node);
-	kfree(cfg);
-	if (!IS_ERR_OR_NULL(img_src_dev))
-		put_device(img_src_dev);
-	return ret;
-}
-
-static ssize_t cif_isp10_dbgfs_csi_read(
-	struct file *f,
-	char __user *out,
-	size_t count,
-	loff_t *pos)
-{
-	u32 out_size = 0;
-	u32 str_len;
-	struct cif_isp10_pltfrm_csi_config *cfg;
-	u32 index = 0;
-	struct list_head *list_pos;
-	struct device *dev = f->f_inode->i_private;
-	struct cif_isp10_pltfrm_data *pdata = dev->platform_data;
-	struct list_head *csi_configs;
-	enum cif_isp10_inp inp;
-
-	if (f->f_inode == pdata->dbgfs.csi0_file->d_inode) {
-		csi_configs = &pdata->csi0_configs;
-		inp = CIF_ISP10_INP_CSI_0;
-	} else if (f->f_inode == pdata->dbgfs.csi1_file->d_inode) {
-		csi_configs = &pdata->csi1_configs;
-		inp = CIF_ISP10_INP_CSI_1;
-	} else {
-		cif_isp10_pltfrm_pr_err(dev, "wrong file handle\n");
-		return -EINVAL;
-	}
-
-	if (list_empty(csi_configs))
-		if (IS_ERR_VALUE(cif_isp10_dbgfs_csi_configs_init(
-		dev, inp, csi_configs)))
-			return -EFAULT;
-
-	if (*pos)
-		return 0;
-
-	list_for_each(list_pos, csi_configs) {
-		cfg = list_entry(list_pos,
-			struct cif_isp10_pltfrm_csi_config, list);
-		sprintf(cif_isp10_dbgfs_buf,
-			"csi-config-%d:\n"
-			"   pps = %d\n"
-			"   vc = %d\n"
-			"   nb_lanes = %d\n"
-			"   dphy1 = 0x%08x\n"
-			"   dphy2 = 0x%08x\n"
-			"   ana_bandgap_bias = %d\n",
-			index,
-			cfg->pps, cfg->csi_config.vc, cfg->csi_config.nb_lanes,
-			cfg->csi_config.dphy1, cfg->csi_config.dphy2,
-			cfg->csi_config.ana_bandgab_bias);
-		index++;
-		str_len = strnlen(cif_isp10_dbgfs_buf,
-			CIF_ISP10_DBGFS_BUF_SIZE);
-		if (str_len > count) {
-			*pos += out_size;
-			return 0;
-		}
-		*pos = 0;
-		if (IS_ERR_VALUE(simple_read_from_buffer(
-			out + out_size, str_len, pos,
-			cif_isp10_dbgfs_buf, str_len)))
-			break;
-		out_size += strnlen(cif_isp10_dbgfs_buf,
-			CIF_ISP10_DBGFS_BUF_SIZE);
-		count -= str_len;
-	}
-
-	*pos += out_size;
-	return out_size;
-}
-
-static ssize_t cif_isp10_dbgfs_csi_write(
-	struct file *f,
-	const char __user *in,
-	size_t count,
-	loff_t *pos)
-{
-	ssize_t ret;
-	char *strp = cif_isp10_dbgfs_buf;
-	char *token;
-	struct device *dev = f->f_inode->i_private;
-	struct cif_isp10_pltfrm_data *pdata = dev->platform_data;
-	struct list_head *csi_configs;
-	enum cif_isp10_inp inp;
-
-	if (count > CIF_ISP10_DBGFS_BUF_SIZE) {
-		cif_isp10_pltfrm_pr_err(dev, "command line too large\n");
-		return -EINVAL;
-	}
-
-	if (f->f_inode == pdata->dbgfs.csi0_file->d_inode) {
-		csi_configs = &pdata->csi0_configs;
-		inp = CIF_ISP10_INP_CSI_0;
-	} else if (f->f_inode == pdata->dbgfs.csi1_file->d_inode) {
-		csi_configs = &pdata->csi1_configs;
-		inp = CIF_ISP10_INP_CSI_1;
-	} else {
-		cif_isp10_pltfrm_pr_err(dev, "wrong file handle\n");
-		return -EINVAL;
-	}
-
-	if (list_empty(csi_configs))
-		if (IS_ERR_VALUE(cif_isp10_dbgfs_csi_configs_init(
-		dev, inp, csi_configs)))
-			return -EFAULT;
-
-	memset(cif_isp10_dbgfs_buf, 0, CIF_ISP10_DBGFS_BUF_SIZE);
-	ret = simple_write_to_buffer(strp,
-		CIF_ISP10_DBGFS_BUF_SIZE, pos, in, count);
-	if (IS_ERR_VALUE(ret))
-		return ret;
-
-	token = strsep(&strp, " ");
-	if (!strcmp(token, "push")) {
-		struct cif_isp10_pltfrm_csi_config cfg;
-
-		token = strsep(&strp, " ");
-		if (IS_ERR_OR_NULL(token)) {
-			cif_isp10_pltfrm_pr_err(dev,
-				"missing token, command format is 'push <pps> <vc> <#lanes> <HEX dphy1> <HEX dphy2> <analog bandgap bias>'\n");
-			return -EINVAL;
-		}
-		if (IS_ERR_VALUE(kstrtou32(token, 10,
-				&cfg.pps))) {
-			cif_isp10_pltfrm_pr_err(dev,
-				"missing token, command format is 'push <pps> <vc> <#lanes> <HEX dphy1> <HEX dphy2> <analog bandgap bias>'\n");
-			return -EINVAL;
-		}
-		ret = cif_isp10_dbgfs_fill_csi_config_from_string(
-			dev, &cfg.csi_config, strp);
-		if (IS_ERR_VALUE(ret))
-			return ret;
-		ret = cif_isp10_pltfrm_l_s_csi_config(
-			dev, inp, cfg.pps, &cfg.csi_config);
-		if (IS_ERR_VALUE(ret))
-			return ret;
-	} else if (!strncmp(token, "reset", 5)) {
-	} else {
-		cif_isp10_pltfrm_pr_err(dev, "unknown command %s\n", token);
-		return -EINVAL;
-	}
-
-	return count;
-}
-
-void cif_isp10_dbgfs_fill_sensor_aec_para(
-	struct cif_isp10_device *cif_isp10_dev,
-	s32 exp_time,
-	u16 gain)
-{
-	struct cif_isp10_pltfrm_data *pdata;
-
-	pdata = (struct cif_isp10_pltfrm_data *)
-			cif_isp10_dev->dev->platform_data;
-	pdata->exp_time = exp_time;
-	pdata->gain = gain;
-}
-
-static ssize_t cif_isp10_dbgfs_sensor_read(
-	struct file *f,
-	char __user *out,
-	size_t count,
-	loff_t *pos)
-{
-	u32 out_size = 0;
-	u32 str_len;
-	struct device *dev = f->f_inode->i_private;
-	struct cif_isp10_pltfrm_data *pdata = dev->platform_data;
-
-	if (*pos)
-		return 0;
-
-	sprintf(cif_isp10_dbgfs_buf,
-		"sensor current exp_time: %d\n"
-		"               gain = %d\n",
-		pdata->exp_time,
-		pdata->gain);
-	str_len = strnlen(cif_isp10_dbgfs_buf,
-			  CIF_ISP10_DBGFS_BUF_SIZE);
-	if (str_len > count) {
-		*pos += out_size;
-		return 0;
-	}
-	*pos = 0;
-	if (IS_ERR_VALUE(simple_read_from_buffer(
-		out + out_size, str_len, pos,
-		cif_isp10_dbgfs_buf, str_len)))
-		goto ERR;
-	out_size += strnlen(cif_isp10_dbgfs_buf,
-		CIF_ISP10_DBGFS_BUF_SIZE);
-	count -= str_len;
-
-	*pos += out_size;
-ERR:
-	return out_size;
-}
-
-static ssize_t cif_isp10_dbgfs_sensor_write(
-	struct file *f,
-	const char __user *in,
-	size_t count,
-	loff_t *pos)
-{
-	return 0;
-}
-
 static ssize_t cif_isp10_dbgfs_write(
 	struct file *f,
 	const char __user *in,
@@ -497,7 +168,7 @@ static ssize_t cif_isp10_dbgfs_write(
 		}
 		if (!strncmp(token, "on", 2)) {
 			if (IS_ERR_VALUE(cif_isp10_pltfrm_pm_set_state(dev,
-				CIF_ISP10_PM_STATE_SW_STNDBY, NULL)))
+				CIF_ISP10_PM_STATE_SW_STNDBY)))
 				cif_isp10_pltfrm_pr_err(dev,
 					"power on failed\n");
 			else
@@ -505,7 +176,7 @@ static ssize_t cif_isp10_dbgfs_write(
 					"switched on\n");
 		} else if (!strncmp(token, "off", 3)) {
 			if (IS_ERR_VALUE(cif_isp10_pltfrm_pm_set_state(dev,
-				CIF_ISP10_PM_STATE_OFF, NULL)))
+				CIF_ISP10_PM_STATE_OFF)))
 				cif_isp10_pltfrm_pr_err(dev,
 					"power off failed\n");
 			else
@@ -556,20 +227,10 @@ static ssize_t cif_isp10_dbgfs_write(
 	return count;
 }
 
-static const struct file_operations cif_isp10_dbgfs_csi_fops = {
-	.read = cif_isp10_dbgfs_csi_read,
-	.write = cif_isp10_dbgfs_csi_write
-};
-
 static const struct file_operations cif_isp10_dbgfs_fops = {
 	.write = cif_isp10_dbgfs_write
 };
 
-static const struct file_operations cif_isp10_dbgfs_sensor_fops = {
-	.read = cif_isp10_dbgfs_sensor_read,
-	.write = cif_isp10_dbgfs_sensor_write
-};
-
 #ifdef CONFIG_CIF_ISP10_REG_TRACE
 
 static inline int cif_isp10_pltfrm_trace_printf(
@@ -614,7 +275,7 @@ static inline int cif_isp10_pltfrm_trace_printf(
 	return i;
 }
 
-inline int cif_isp10_pltfrm_rtrace_printf(
+int cif_isp10_pltfrm_rtrace_printf(
 	struct device *dev,
 	const char *fmt,
 	...)
@@ -629,7 +290,7 @@ inline int cif_isp10_pltfrm_rtrace_printf(
 	return i;
 }
 
-inline int cif_isp10_pltfrm_ftrace_printf(
+int cif_isp10_pltfrm_ftrace_printf(
 	struct device *dev,
 	const char *fmt,
 	...)
@@ -1290,35 +951,15 @@ int cif_isp10_pltfrm_dev_init(
 
 	dev->platform_data = pdata;
 
-	INIT_LIST_HEAD(&pdata->csi0_configs);
-	INIT_LIST_HEAD(&pdata->csi1_configs);
-
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 	pdata->dbgfs.dir = debugfs_create_dir("cif_isp10", NULL);
-	pdata->dbgfs.csi0_file = debugfs_create_file(
-		"csi-0",
-		0644,
-		pdata->dbgfs.dir,
-		dev,
-		&cif_isp10_dbgfs_csi_fops);
-	pdata->dbgfs.csi1_file = debugfs_create_file(
-		"csi-1",
-		0644,
-		pdata->dbgfs.dir,
-		dev,
-		&cif_isp10_dbgfs_csi_fops);
 	pdata->dbgfs.cif_isp10_file = debugfs_create_file(
 		"cif_isp20",
 		0200,
 		pdata->dbgfs.dir,
 		dev,
 		&cif_isp10_dbgfs_fops);
-	pdata->dbgfs.cif_isp10_file = debugfs_create_file(
-		"sensor",
-		0644,
-		pdata->dbgfs.dir,
-		dev,
-		&cif_isp10_dbgfs_sensor_fops);
+
 #ifdef CONFIG_CIF_ISP10_REG_TRACE
 	pdata->dbgfs.reg_trace_file = debugfs_create_file(
 		"reg_trace",
@@ -1450,7 +1091,7 @@ int cif_isp10_pltfrm_g_interface_config(
 			PLTFRM_CIFCAM_G_ITF_CFG, (void *)cam_itf);
 	if (IS_ERR_VALUE(ret)) {
 		cif_isp10_pltfrm_pr_err(
-			dev,
+			NULL,
 			"cif_isp10_img_src_ioctl PLTFRM_CIFCAM_G_ITF_CFG failed!\n");
 		return ret;
 	}
@@ -1669,8 +1310,6 @@ int cif_isp10_pltfrm_get_img_src_device(
 					array_len);
 				break;
 			}
-		} else {
-			continue;
 		}
 	}
 
@@ -1691,7 +1330,7 @@ void cif_isp10_pltfrm_dev_release(
 		cif_isp10_drm_iommu_cb(dev, cif_isp10_dev, false);
 #endif
 
-#ifndef CONFIG_DEBUG_FS
+#ifdef CONFIG_DEBUG_FS
 	{
 		struct cif_isp10_pltfrm_data *pdata =
 			dev->platform_data;
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index ae04c07e10b51..e97fa4c20fdab 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -30,10 +30,10 @@
 #include <linux/pagemap.h>
 #include <linux/slab.h>
 
-#define CIF_ISP10_V4L2_SP_DEV_MAJOR 0
-#define CIF_ISP10_V4L2_ISP_DEV_MAJOR 1
-#define CIF_ISP10_V4L2_MP_DEV_MAJOR 2
-#define CIF_ISP10_V4L2_DMA_DEV_MAJOR 3
+#define CIF_ISP10_V4L2_SP_DEV_MAJOR -1
+#define CIF_ISP10_V4L2_ISP_DEV_MAJOR -1
+#define CIF_ISP10_V4L2_MP_DEV_MAJOR -1
+#define CIF_ISP10_V4L2_DMA_DEV_MAJOR -1
 
 #define SP_DEV 0
 #define MP_DEV 1
@@ -330,6 +330,8 @@ static enum cif_isp10_pix_fmt cif_isp10_v4l2_pix_fmt2cif_isp10_pix_fmt(
 	switch (v4l2_pix_fmt) {
 	case V4L2_PIX_FMT_GREY:
 		return CIF_YUV400;
+	case V4L2_PIX_FMT_Y10:
+		return CIF_Y10;
 	case V4L2_PIX_FMT_YUV420:
 		return CIF_YUV420P;
 	case V4L2_PIX_FMT_YVU420:
@@ -506,6 +508,31 @@ static int cif_isp10_v4l2_register_video_device(
 	return ret;
 }
 
+static int cif_isp10_v4l2_register_imgsrc_subdev(
+	struct cif_isp10_device *dev)
+{
+	unsigned int i;
+	struct v4l2_subdev *sd;
+
+	for (i = 0; i < dev->img_src_cnt; i++) {
+		if (dev->img_src_array[i] != NULL) {
+			sd = (struct v4l2_subdev *)
+				cif_isp10_img_src_g_img_src(
+					dev->img_src_array[i]);
+			if (sd) {
+				if (v4l2_device_register_subdev(
+					&dev->v4l2_dev,
+					sd) < 0)
+					cif_isp10_pltfrm_pr_err(dev->dev,
+						"register subdev(%s) failed!",
+						cif_isp10_img_src_g_name(dev->img_src_array[i]));
+			}
+		}
+	}
+
+	return v4l2_device_register_subdev_nodes(&dev->v4l2_dev);
+}
+
 static int cif_isp10_v4l2_streamon(
 	struct file *file,
 	void *priv,
@@ -1133,18 +1160,24 @@ static unsigned int cif_isp10_v4l2_poll(
  */
 static void cif_isp10_v4l2_vm_open(struct vm_area_struct *vma)
 {
+	unsigned long flags = 0;
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
 
+	spin_lock_irqsave(&metadata->spinlock, flags);
 	metadata->vmas++;
+	spin_unlock_irqrestore(&metadata->spinlock, flags);
 }
 
 static void cif_isp10_v4l2_vm_close(struct vm_area_struct *vma)
 {
+	unsigned long flags = 0;
 	struct cif_isp10_metadata_s *metadata =
 		(struct cif_isp10_metadata_s *)vma->vm_private_data;
 
+	spin_lock_irqsave(&metadata->spinlock, flags);
 	metadata->vmas--;
+	spin_unlock_irqrestore(&metadata->spinlock, flags);
 }
 
 static const struct vm_operations_struct cif_isp10_vm_ops = {
@@ -1348,6 +1381,30 @@ static long v4l2_default_ioctl(struct file *file, void *fh,
 				"failed to get camera module information\n");
 			return ret;
 		}
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *p_sensor_config =
+		(struct sensor_config_info_s *)arg;
+
+		ret = (int)cif_isp10_img_src_ioctl(dev->img_src,
+			RK_VIDIOC_SENSOR_CONFIGINFO, p_sensor_config);
+
+		if (ret < 0) {
+			cif_isp10_pltfrm_pr_err(dev->dev,
+				"failed to get camera module information\n");
+			return ret;
+		}
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *p_sensor_rw =
+		(struct sensor_reg_rw_s *)arg;
+
+		ret = (int)cif_isp10_img_src_ioctl(dev->img_src,
+			RK_VIDIOC_SENSOR_REG_ACCESS, p_sensor_rw);
+
+		 if (ret < 0) {
+			cif_isp10_pltfrm_pr_err(dev->dev,
+				"failed to get camera module information\n");
+			return ret;
+		}
 	}
 
 	return ret;
@@ -1511,9 +1568,9 @@ static int v4l2_s_ext_ctrls(struct file *file, void *priv,
 	struct v4l2_ext_controls *vc_ext)
 {
 	struct cif_isp10_img_src_ctrl *ctrls;
-	struct cif_isp10_img_src_ext_ctrl *ctrl;
 	struct vb2_queue *queue = to_vb2_queue(file);
 	struct cif_isp10_device *dev = to_cif_isp10_device(queue);
+	struct cif_isp10_img_src_ext_ctrl ctrl;
 	int ret = -EINVAL;
 	unsigned int i;
 
@@ -1526,30 +1583,24 @@ static int v4l2_s_ext_ctrls(struct file *file, void *priv,
 	if (vc_ext->count == 0)
 		return ret;
 
-	ctrl = kmalloc(sizeof(*ctrl), GFP_KERNEL);
-	if (!ctrl)
-		return -ENOMEM;
-
 	ctrls = kmalloc(vc_ext->count *
 		sizeof(struct cif_isp10_img_src_ctrl), GFP_KERNEL);
-	if (!ctrls) {
-		kfree(ctrl);
+	if (!ctrls)
 		return -ENOMEM;
-	}
 
-	ctrl->cnt = vc_ext->count;
+	ctrl.cnt = vc_ext->count;
 	/*current kernel version don't define
 	 *this member for struct v4l2_ext_control.
 	 */
-	/*ctrl->class = vc_ext->ctrl_class;*/
-	ctrl->ctrls = ctrls;
+	/*ctrl.class = vc_ext->ctrl_class;*/
+	ctrl.ctrls = ctrls;
 
 	for (i = 0; i < vc_ext->count; i++) {
 		ctrls[i].id = vc_ext->controls[i].id;
 		ctrls[i].val = vc_ext->controls[i].value;
 	}
 
-	ret = cif_isp10_s_exp(dev, ctrl);
+	ret = cif_isp10_s_exp(dev, &ctrl);
 	return ret;
 }
 
@@ -1768,7 +1819,8 @@ static const struct of_device_id cif_isp10_v4l2_of_match[] = {
 	{},
 };
 
-static unsigned int cif_isp10_v4l2_dev_cnt;
+static unsigned int g_cif_isp10_v4l2_dev_cnt;
+static struct cif_isp10_v4l2_device *g_cif_isp10_v4l2_dev[4];
 static int cif_isp10_v4l2_drv_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *match;
@@ -1777,7 +1829,10 @@ static int cif_isp10_v4l2_drv_probe(struct platform_device *pdev)
 	struct cif_isp10_v4l2_device *cif_isp10_v4l2_dev;
 	int ret;
 
-	cif_isp10_pltfrm_pr_info(NULL, "probing...\n");
+	cif_isp10_pltfrm_pr_info(NULL, "CIF ISP10 driver version: v%x.%x.%x\n",
+		CONFIG_CIFISP10_DRIVER_VERSION >> 16,
+		(CONFIG_CIFISP10_DRIVER_VERSION & 0xff00) >> 8,
+		CONFIG_CIFISP10_DRIVER_VERSION & 0x00ff);
 
 	cif_isp10_v4l2_dev = devm_kzalloc(
 				&pdev->dev,
@@ -1798,7 +1853,7 @@ static int cif_isp10_v4l2_drv_probe(struct platform_device *pdev)
 		goto err;
 	}
 
-	dev->dev_id = cif_isp10_v4l2_dev_cnt;
+	dev->dev_id = g_cif_isp10_v4l2_dev_cnt;
 	dev->isp_dev.dev_id = &dev->dev_id;
 	dev->nodes = (void *)cif_isp10_v4l2_dev;
 	dev->isp_state = CIF_ISP10_STATE_IDLE;
@@ -1855,9 +1910,14 @@ static int cif_isp10_v4l2_drv_probe(struct platform_device *pdev)
 	if (ret)
 		goto err;
 
+	cif_isp10_v4l2_register_imgsrc_subdev(
+		dev);
+
 	pm_runtime_enable(&pdev->dev);
 
-	cif_isp10_v4l2_dev_cnt++;
+	g_cif_isp10_v4l2_dev[g_cif_isp10_v4l2_dev_cnt] =
+		cif_isp10_v4l2_dev;
+	g_cif_isp10_v4l2_dev_cnt++;
 	return 0;
 err:
 	cif_isp10_destroy(dev);
@@ -1886,7 +1946,8 @@ static int cif_isp10_v4l2_drv_remove(struct platform_device *pdev)
 	cif_isp10_pltfrm_dev_release(&pdev->dev, cif_isp10_dev);
 	cif_isp10_destroy(cif_isp10_dev);
 
-	cif_isp10_v4l2_dev_cnt--;
+	g_cif_isp10_v4l2_dev_cnt--;
+	g_cif_isp10_v4l2_dev[g_cif_isp10_v4l2_dev_cnt] = NULL;
 	return 0;
 }
 
@@ -1976,6 +2037,7 @@ static int cif_isp10_v4l2_init(void)
 {
 	int ret;
 
+	g_cif_isp10_v4l2_dev_cnt = 0;
 	ret = platform_driver_register(&cif_isp10_v4l2_plat_drv);
 	if (ret) {
 		cif_isp10_pltfrm_pr_err(NULL,
@@ -1993,6 +2055,74 @@ static void __exit cif_isp10_v4l2_exit(void)
 	platform_driver_unregister(&cif_isp10_v4l2_plat_drv);
 }
 
+/* ======================================================================== */
+void cif_isp10_v4l2_s_frame_interval(
+	unsigned int numerator,
+	unsigned int denominator)
+{
+	struct cif_isp10_v4l2_device *cif_isp10_v4l2_dev;
+	struct cif_isp10_device *cif_isp10_dev;
+	struct vb2_queue *queue;
+	struct cif_isp10_frm_intrvl frm_intrvl;
+	unsigned int i;
+
+	for (i = 0; i < g_cif_isp10_v4l2_dev_cnt; i++) {
+		if (g_cif_isp10_v4l2_dev[i] == NULL)
+			continue;
+
+		cif_isp10_v4l2_dev =
+			g_cif_isp10_v4l2_dev[i];
+		queue = (struct vb2_queue *)
+			&cif_isp10_v4l2_dev->node[SP_DEV].buf_queue;
+		cif_isp10_dev = to_cif_isp10_device(queue);
+
+		if (cif_isp10_dev->img_src == NULL)
+			continue;
+
+		frm_intrvl.numerator = numerator;
+		frm_intrvl.denominator = denominator;
+		cif_isp10_img_src_s_frame_interval(
+			cif_isp10_dev->img_src,
+			&frm_intrvl);
+	}
+}
+
+int cif_isp10_v4l2_g_frame_interval(
+	unsigned int *numerator,
+	unsigned int *denominator)
+{
+	struct cif_isp10_v4l2_device *cif_isp10_v4l2_dev;
+	struct cif_isp10_device *cif_isp10_dev;
+	struct vb2_queue *queue;
+	struct cif_isp10_frm_intrvl frm_intrvl;
+	unsigned int i;
+	int ret = -EFAULT;
+
+	for (i = 0; i < g_cif_isp10_v4l2_dev_cnt; i++) {
+		if (g_cif_isp10_v4l2_dev[i] == NULL)
+			continue;
+
+		cif_isp10_v4l2_dev =
+			g_cif_isp10_v4l2_dev[i];
+		queue = (struct vb2_queue *)
+			&cif_isp10_v4l2_dev->node[SP_DEV].buf_queue;
+		cif_isp10_dev = to_cif_isp10_device(queue);
+
+		if (cif_isp10_dev->img_src == NULL)
+			continue;
+
+		ret = cif_isp10_img_src_g_frame_interval(
+			cif_isp10_dev->img_src,
+			&frm_intrvl);
+		if (ret == 0) {
+			*numerator = frm_intrvl.numerator;
+			*denominator = frm_intrvl.denominator;
+		}
+	}
+
+	return ret;
+}
+
 device_initcall_sync(cif_isp10_v4l2_init);
 module_exit(cif_isp10_v4l2_exit);
 
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_version.h b/drivers/media/platform/rk-isp10/cif_isp10_version.h
index c13ba690285ba..31c95cf827304 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_version.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_version.h
@@ -103,8 +103,11 @@
  *5. modify for af function.
  *6. add module parameter for dumpsys.
  *
+ *v0.1.0xf
+ *1. merge modification from rv1108 project.
+ *
  */
 
-#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 1, 0xe)
+#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 1, 0xf)
 
 #endif
diff --git a/include/media/rk-isp10-config.h b/include/media/rk-isp10-config.h
index f64af7f9f8f0e..63e02e7e93f48 100644
--- a/include/media/rk-isp10-config.h
+++ b/include/media/rk-isp10-config.h
@@ -18,24 +18,47 @@
 
 #include <media/v4l2-config_rockchip.h>
 
-#define CIFISP_MODULE_DPCC              BIT(0)
-#define CIFISP_MODULE_BLS               BIT(1)
-#define CIFISP_MODULE_SDG               BIT(2)
-#define CIFISP_MODULE_HST               BIT(3)
-#define CIFISP_MODULE_LSC               BIT(4)
-#define CIFISP_MODULE_AWB_GAIN          BIT(5)
-#define CIFISP_MODULE_FLT               BIT(6)
-#define CIFISP_MODULE_BDM               BIT(7)
-#define CIFISP_MODULE_CTK               BIT(8)
-#define CIFISP_MODULE_GOC               BIT(9)
-#define CIFISP_MODULE_CPROC             BIT(10)
-#define CIFISP_MODULE_AFC               BIT(11)
-#define CIFISP_MODULE_AWB               BIT(12)
-#define CIFISP_MODULE_IE                BIT(13)
-#define CIFISP_MODULE_AEC               BIT(14)
-#define CIFISP_MODULE_WDR               BIT(15)
-#define CIFISP_MODULE_DPF               BIT(16)
-#define CIFISP_MODULE_DPF_STRENGTH      BIT(17)
+#define CIFISP_MODULE_MAX 18
+/* ISP Other module ID */
+#define CIFISP_DPCC_ID                 0
+#define CIFISP_BLS_ID                  1
+#define CIFISP_SDG_ID                  2
+#define CIFISP_LSC_ID                  3
+#define CIFISP_AWB_GAIN_ID             4
+#define CIFISP_FLT_ID                  5
+#define CIFISP_BDM_ID                  6
+#define CIFISP_CTK_ID                  7
+#define CIFISP_GOC_ID                  8
+#define CIFISP_CPROC_ID                9
+#define CIFISP_IE_ID                   10
+#define CIFISP_WDR_ID                  11
+#define CIFISP_DPF_ID                  12
+#define CIFISP_DPF_STRENGTH_ID         13
+/* ISP Meas module ID, It must be after other id */
+#define CIFISP_MEAS_ID                 14
+#define CIFISP_AEC_ID                  (CIFISP_MEAS_ID + 0)
+#define CIFISP_AFC_ID                  (CIFISP_MEAS_ID + 1)
+#define CIFISP_AWB_ID                  (CIFISP_MEAS_ID + 2)
+#define CIFISP_HST_ID                  (CIFISP_MEAS_ID + 3)
+
+#define CIFISP_MODULE_DPCC             (1 << CIFISP_DPCC_ID)
+#define CIFISP_MODULE_BLS              (1 << CIFISP_BLS_ID)
+#define CIFISP_MODULE_SDG              (1 << CIFISP_SDG_ID)
+#define CIFISP_MODULE_HST              (1 << CIFISP_HST_ID)
+#define CIFISP_MODULE_LSC              (1 << CIFISP_LSC_ID)
+#define CIFISP_MODULE_AWB_GAIN         (1 << CIFISP_AWB_GAIN_ID)
+#define CIFISP_MODULE_FLT              (1 << CIFISP_FLT_ID)
+#define CIFISP_MODULE_BDM              (1 << CIFISP_BDM_ID)
+#define CIFISP_MODULE_CTK              (1 << CIFISP_CTK_ID)
+#define CIFISP_MODULE_GOC              (1 << CIFISP_GOC_ID)
+#define CIFISP_MODULE_CPROC            (1 << CIFISP_CPROC_ID)
+#define CIFISP_MODULE_AFC              (1 << CIFISP_AFC_ID)
+#define CIFISP_MODULE_AWB              (1 << CIFISP_AWB_ID)
+#define CIFISP_MODULE_IE               (1 << CIFISP_IE_ID)
+#define CIFISP_MODULE_AEC              (1 << CIFISP_AEC_ID)
+#define CIFISP_MODULE_WDR              (1 << CIFISP_WDR_ID)
+#define CIFISP_MODULE_DPF              (1 << CIFISP_DPF_ID)
+#define CIFISP_MODULE_DPF_STRENGTH     (1 << CIFISP_DPF_STRENGTH_ID)
 
 #define CIFISP_CTK_COEFF_MAX            0x100
 #define CIFISP_CTK_OFFSET_MAX           0x800
diff --git a/include/media/rk-isp10-ioctl.h b/include/media/rk-isp10-ioctl.h
index 22e2e6e8d8a57..367e28003d9e0 100644
--- a/include/media/rk-isp10-ioctl.h
+++ b/include/media/rk-isp10-ioctl.h
@@ -106,22 +106,22 @@
 	_IOR('v', BASE_VIDIOC_PRIVATE + 35, struct cifisp_last_capture_config)
 
 /* CIF-ISP Private control IDs */
-#define V4L2_CID_CIFISP_DPCC    (V4L2_CID_PRIVATE_BASE + 0)
-#define V4L2_CID_CIFISP_BLS    (V4L2_CID_PRIVATE_BASE + 1)
-#define V4L2_CID_CIFISP_SDG    (V4L2_CID_PRIVATE_BASE + 2)
-#define V4L2_CID_CIFISP_LSC    (V4L2_CID_PRIVATE_BASE + 3)
-#define V4L2_CID_CIFISP_AWB_MEAS    (V4L2_CID_PRIVATE_BASE + 4)
-#define V4L2_CID_CIFISP_FLT    (V4L2_CID_PRIVATE_BASE + 5)
-#define V4L2_CID_CIFISP_BDM    (V4L2_CID_PRIVATE_BASE + 6)
-#define V4L2_CID_CIFISP_CTK    (V4L2_CID_PRIVATE_BASE + 7)
-#define V4L2_CID_CIFISP_GOC    (V4L2_CID_PRIVATE_BASE + 8)
-#define V4L2_CID_CIFISP_HST    (V4L2_CID_PRIVATE_BASE + 9)
-#define V4L2_CID_CIFISP_AEC    (V4L2_CID_PRIVATE_BASE + 10)
-#define V4L2_CID_CIFISP_AWB_GAIN    (V4L2_CID_PRIVATE_BASE + 11)
-#define V4L2_CID_CIFISP_CPROC    (V4L2_CID_PRIVATE_BASE + 12)
-#define V4L2_CID_CIFISP_AFC    (V4L2_CID_PRIVATE_BASE + 13)
-#define V4L2_CID_CIFISP_IE    (V4L2_CID_PRIVATE_BASE + 14)
-#define V4L2_CID_CIFISP_DPF    (V4L2_CID_PRIVATE_BASE + 15)
+#define V4L2_CID_CIFISP_DPCC    (V4L2_CID_PRIVATE_BASE + CIFISP_DPCC_ID)
+#define V4L2_CID_CIFISP_BLS    (V4L2_CID_PRIVATE_BASE + CIFISP_BLS_ID)
+#define V4L2_CID_CIFISP_SDG    (V4L2_CID_PRIVATE_BASE + CIFISP_SDG_ID)
+#define V4L2_CID_CIFISP_HST    (V4L2_CID_PRIVATE_BASE + CIFISP_HST_ID)
+#define V4L2_CID_CIFISP_LSC    (V4L2_CID_PRIVATE_BASE + CIFISP_LSC_ID)
+#define V4L2_CID_CIFISP_AWB_GAIN    (V4L2_CID_PRIVATE_BASE + CIFISP_AWB_GAIN_ID)
+#define V4L2_CID_CIFISP_FLT    (V4L2_CID_PRIVATE_BASE + CIFISP_FLT_ID)
+#define V4L2_CID_CIFISP_BDM    (V4L2_CID_PRIVATE_BASE + CIFISP_BDM_ID)
+#define V4L2_CID_CIFISP_CTK    (V4L2_CID_PRIVATE_BASE + CIFISP_CTK_ID)
+#define V4L2_CID_CIFISP_GOC    (V4L2_CID_PRIVATE_BASE + CIFISP_GOC_ID)
+#define V4L2_CID_CIFISP_CPROC    (V4L2_CID_PRIVATE_BASE + CIFISP_CPROC_ID)
+#define V4L2_CID_CIFISP_AFC    (V4L2_CID_PRIVATE_BASE + CIFISP_AFC_ID)
+#define V4L2_CID_CIFISP_AWB_MEAS    (V4L2_CID_PRIVATE_BASE + CIFISP_AWB_ID)
+#define V4L2_CID_CIFISP_IE    (V4L2_CID_PRIVATE_BASE + CIFISP_IE_ID)
+#define V4L2_CID_CIFISP_AEC    (V4L2_CID_PRIVATE_BASE + CIFISP_AEC_ID)
+#define V4L2_CID_CIFISP_DPF    (V4L2_CID_PRIVATE_BASE + CIFISP_DPF_ID)
 
 /* Camera Sensors' running modes */
 #define CI_MODE_PREVIEW	0x8000
@@ -130,4 +130,11 @@
 #define CI_MODE_CONTINUOUS	0x1000
 #define CI_MODE_NONE	0x0000
 
+/* Kernel API */
+void cif_isp11_v4l2_s_frame_interval(
+	unsigned int numerator,
+	unsigned int denominator);
+int cif_isp11_v4l2_g_frame_interval(
+	unsigned int *numerator,
+	unsigned int *denominator);
 #endif
diff --git a/include/media/v4l2-config_rockchip.h b/include/media/v4l2-config_rockchip.h
index b7dd7a7a8d7c3..0f2cfb6b3c5ad 100644
--- a/include/media/v4l2-config_rockchip.h
+++ b/include/media/v4l2-config_rockchip.h
@@ -19,6 +19,11 @@
 
 #define CAMERA_STRLEN         32
 #define CAMERA_METADATA_LEN   (2 * PAGE_SIZE)
+#define VALID_FR_EXP_T_INDEX   0
+#define VALID_FR_EXP_G_INDEX   1
+#define SENSOR_CONFIG_NUM      4
+#define SENSOR_READ_MODE       0
+#define SENSOR_WRITE_MODE      1
 
 /* Sensor resolution specific data for AE calculation.*/
 struct isp_supplemental_sensor_mode_data {
@@ -43,6 +48,11 @@ struct isp_supplemental_sensor_mode_data {
 	unsigned int isp_output_height;
 	unsigned char binning_factor_x; /* horizontal binning factor used */
 	unsigned char binning_factor_y; /* vertical binning factor used */
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
 	unsigned char exposure_valid_frame[2];
 	int exp_time;
 	unsigned short gain;
@@ -65,6 +75,25 @@ struct camera_module_info_s {
 	int af_support;
 };
 
+struct sensor_resolution_s {
+	unsigned short width;
+	unsigned short height;
+};
+
+struct sensor_config_info_s {
+	unsigned char config_num;
+	unsigned char sensor_fmt[SENSOR_CONFIG_NUM];
+	struct sensor_resolution_s reso[SENSOR_CONFIG_NUM];
+};
+
+struct sensor_reg_rw_s {
+	unsigned char reg_access_mode;
+	unsigned char reg_addr_len;
+	unsigned char reg_data_len;
+	unsigned short addr;
+	unsigned short data;
+};
+
 struct flash_timeinfo_s {
 	struct timeval preflash_start_t;
 	struct timeval preflash_end_t;
diff --git a/include/media/v4l2-controls_rockchip.h b/include/media/v4l2-controls_rockchip.h
index 010ddf4696b40..c185a58e33dac 100644
--- a/include/media/v4l2-controls_rockchip.h
+++ b/include/media/v4l2-controls_rockchip.h
@@ -24,6 +24,10 @@
 	_IOWR('v', BASE_VIDIOC_PRIVATE + 10, struct camera_module_info_s)
 #define RK_VIDIOC_SENSOR_MODE_DATA \
 	_IOR('v', BASE_VIDIOC_PRIVATE, struct isp_supplemental_sensor_mode_data)
+#define RK_VIDIOC_SENSOR_CONFIGINFO \
+	_IOR('v', BASE_VIDIOC_PRIVATE + 1, struct sensor_config_info_s)
+#define RK_VIDIOC_SENSOR_REG_ACCESS \
+	_IOWR('v', BASE_VIDIOC_PRIVATE + 2, struct sensor_reg_rw_s)
 
 #define V4L2_CID_USER_RK_BASE (V4L2_CID_USER_BASE + 0x1080)
 #define RK_V4L2_CID_VBLANKING (V4L2_CID_USER_RK_BASE + 1)

From 37e9c7bfa2c45523f52d111853a9101204732330 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 11 Jun 2018 16:19:08 +0800
Subject: [PATCH 0654/1852] camera: rockchip: merge modification of rv1108
 isp11

camera: rockchip: add sensor ioctl and max gain.
1. add RK_VIDIOC_SENSOR_CONFIGINFO;
2. add RK_VIDIOC_SENSOR_REG_ACCESS;
3. add max_exp_gain_h/max_exp_gain_l;

camera: rockchip: merge isp11: rockchip: v0.1.7
isp11: rockchip: v0.1.7
1. Direct config isp lsc table size in cifisp_lsc_config.
   Because active_lsc_width is not same with isp register
   after isp reset.
2. Support separate config sensor gain and shutter time
   for some sensor which gain and shutter isn't valid at
   the same time. for example ov2710.
   ov4689:v0.1.0;
   ov2710:v0.1.1;
   imx323:v0.1.0;

camera: rockchip: Support v4l2 subdev api
ov2710: v0.1.2
ov4689: v0.1.1
imx323: v0.1.2

camera: rockchip: add lock for stream/aec
hold reg in AEC will affect stream reg, if asynchronous.

camera: rockchip: fix sensor timing
if fps changed, vts changed, update to timing.

camera: rockchip: support set flip api

camera: rockchip: support get flip api

camera: rockchip: fix release bug
should be free pdata at the end

camera: rockchip: imx323
fix s_fmt failed for imx323 v0.1.2;

camera: rockchip: fix s_frame_interval failed

fix s_frame_interval failed when frame interval is match
active config frame interval.

camera: rockchip: imx,aptina,ov
Check xxx_camera_module_init return value in PLTFRM_CIFCAM_ATTACH

camera: rockchip: release sensor if init fail

camera: rockchip: imx,aptina,ov
support mirror/flip conifg in dts for imx323/ov4689

camera: rockchip: add s_frame_interval/g_frame_interval
camera: rockchip: ov, aptina, imx
add s_frame_interval/g_frame_interval

camera: rockchip: imx,ov,aptina
1.imx,ov: fix g_timing error if s_frame_interval before stream_on,
  because vts_cur is update in stream_on;
2.aptina: fix compile error;

camera: rockchip: imx,ov,aptina
1. fix calc vts wrong in xxx_camera_module_s_stream

Change-Id: I5a6e75f2ce3c50d69c51af9792232c60b6982128
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../rockchip/adv7181_v4l2-i2c-subdev.c        |  15 +-
 .../soc_camera/rockchip/adv_camera_module.c   | 237 ++++++++++++--
 .../soc_camera/rockchip/adv_camera_module.h   |  17 +-
 .../rockchip/aptina_camera_module.c           | 298 ++++++++++++++----
 .../rockchip/aptina_camera_module.h           |  20 +-
 .../rockchip/imx323_v4l2-i2c-subdev.c         |  73 +++--
 .../soc_camera/rockchip/imx_camera_module.c   | 239 ++++++++++++--
 .../soc_camera/rockchip/imx_camera_module.h   |  20 +-
 .../rockchip/nt99230_v4l2-i2c-subdev.c        |  29 +-
 .../rockchip/ov13850_v4l2-i2c-subdev.c        |  63 ++--
 .../rockchip/ov2710_v4l2-i2c-subdev.c         |  51 +--
 .../rockchip/ov4689_v4l2-i2c-subdev.c         |  60 ++--
 .../rockchip/ov7675_v4l2-i2c-subdev.c         |  21 +-
 .../rockchip/ov7750_v4l2-i2c-subdev.c         |  44 ++-
 .../rockchip/ov8858_v4l2-i2c-subdev.c         |  54 ++--
 .../soc_camera/rockchip/ov_camera_module.c    | 235 ++++++++++++--
 .../soc_camera/rockchip/ov_camera_module.h    |  17 +-
 .../soc_camera/rockchip/rk_camera_module.c    | 167 +++++++++-
 .../rockchip/tc358749xbg_v4l2-i2c-subdev.c    |  23 +-
 .../soc_camera/rockchip/tc_camera_module.c    | 242 ++++++++++++--
 .../soc_camera/rockchip/tc_camera_module.h    |  17 +-
 .../rk_isp10_platform_camera_module.h         |   9 +
 include/media/v4l2-config_rockchip.h          |   2 +
 23 files changed, 1602 insertions(+), 351 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/adv7181_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/adv7181_v4l2-i2c-subdev.c
index 5908294b73e78..332521bb330e8 100644
--- a/drivers/media/i2c/soc_camera/rockchip/adv7181_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/adv7181_v4l2-i2c-subdev.c
@@ -132,6 +132,8 @@ static struct adv_camera_module_config adv7181_configs[] = {
 			/
 			sizeof(adv7180_cvbs_30fps[0]),
 		.v_blanking_time_us		= 0,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		.ignore_measurement_check = 1,
 		PLTFRM_CAM_ITF_DVP_CFG(
 			PLTFRM_CAM_ITF_BT656_8I,
@@ -160,6 +162,8 @@ static struct adv_camera_module_config adv7181_configs[] = {
 			/
 			sizeof(adv7180_cvbs_30fps[0]),
 		.v_blanking_time_us		= 0,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		.ignore_measurement_check = 1,
 		PLTFRM_CAM_ITF_DVP_CFG(
 			PLTFRM_CAM_ITF_BT656_8I,
@@ -228,6 +232,8 @@ static int adv7181_g_timings(struct adv_camera_module *cam_mod,
 		cam_mod->active_config->frm_intrvl.interval.denominator *
 		vts * timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
+
 	return ret;
 err:
 	adv_camera_module_pr_err(cam_mod,
@@ -397,6 +403,7 @@ static struct v4l2_subdev_core_ops adv7181_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops adv7181_camera_module_video_ops = {
 	.s_frame_interval = adv_camera_module_s_frame_interval,
+	.g_frame_interval = adv_camera_module_g_frame_interval,
 	.s_stream = adv_camera_module_s_stream
 };
 
@@ -425,7 +432,13 @@ static struct adv_camera_module_custom_config adv7181_custom_config = {
 	.check_camera_id = adv7181_check_camera_id,
 	.configs = adv7181_configs,
 	.num_configs = ARRAY_SIZE(adv7181_configs),
-	.power_up_delays_ms = {5, 30, 30}
+	.power_up_delays_ms = {5, 30, 30},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static ssize_t adv7181_debugfs_reg_write(
diff --git a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
index 034c121430155..96ba4f824e31c 100644
--- a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.c
@@ -47,8 +47,6 @@ static void adv_camera_module_reset(
 	cam_mod->exp_config.auto_exp = false;
 	cam_mod->exp_config.auto_gain = false;
 	cam_mod->wb_config.auto_wb = false;
-	cam_mod->hflip = false;
-	cam_mod->vflip = false;
 	cam_mod->auto_adjust_fps = true;
 	cam_mod->rotation = 0;
 	cam_mod->ctrl_updt = 0;
@@ -306,6 +304,10 @@ int adv_camera_module_s_fmt(struct v4l2_subdev *sd,
 		adv_camera_module_set_active_config(cam_mod,
 			adv_camera_module_find_config(cam_mod,
 				fmt, &cam_mod->frm_intrvl));
+	} else {
+		adv_camera_module_set_active_config(cam_mod,
+			adv_camera_module_find_config(cam_mod,
+				fmt, NULL));
 	}
 	return 0;
 err:
@@ -346,6 +348,8 @@ int adv_camera_module_s_frame_interval(
 	struct adv_camera_module *cam_mod = to_adv_camera_module(sd);
 	unsigned long gcdiv;
 	struct v4l2_subdev_frame_interval norm_interval;
+	struct adv_camera_module_config *config;
+	unsigned int vts;
 	int ret = 0;
 
 	if ((interval->interval.denominator == 0) ||
@@ -372,22 +376,62 @@ int adv_camera_module_s_frame_interval(
 	norm_interval.interval.denominator =
 		interval->interval.denominator / gcdiv;
 
-	if (IS_ERR_OR_NULL(adv_camera_module_find_config(cam_mod,
-			NULL, &norm_interval))) {
-		pltfrm_camera_module_pr_err(&cam_mod->sd,
-			"frame interval %d/%d not supported\n",
-			interval->interval.numerator,
-			interval->interval.denominator);
-		ret = -EINVAL;
-		goto err;
+	if (!cam_mod->frm_fmt_valid)
+		goto end;
+	config = adv_camera_module_find_config(
+			cam_mod,
+			&cam_mod->active_config->frm_fmt,
+			&norm_interval);
+
+	if (!IS_ERR_OR_NULL(config) && (config != cam_mod->active_config)) {
+		adv_camera_module_set_active_config(cam_mod, config);
+		if (cam_mod->state == ADV_CAMERA_MODULE_STREAMING) {
+			cam_mod->custom.stop_streaming(cam_mod);
+			adv_camera_module_write_config(cam_mod);
+			cam_mod->custom.start_streaming(cam_mod);
+		}
+	} else {
+		if (IS_ERR_OR_NULL(cam_mod->active_config)) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"no active sensor configuration");
+			ret = -EFAULT;
+			goto err;
+		}
+		if (cam_mod->active_config->frm_intrvl.interval.denominator <
+			norm_interval.interval.denominator) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"%dx%d@%dfps isn't support!",
+				cam_mod->active_config->frm_fmt.width,
+				cam_mod->active_config->frm_fmt.height,
+				norm_interval.interval.denominator);
+			ret = -EFAULT;
+			goto err;
+		}
+		if (!cam_mod->custom.s_vts) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"custom.s_vts isn't support!");
+			ret = -EFAULT;
+			goto err;
+		}
+
+		vts = cam_mod->active_config->timings.frame_length_lines;
+		vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+		vts /= norm_interval.interval.denominator;
+		cam_mod->vts_cur = vts;
+
+		if (cam_mod->state != ADV_CAMERA_MODULE_STREAMING)
+			goto end;
+
+		cam_mod->custom.s_vts(cam_mod, vts);
 	}
+
+end:
 	cam_mod->frm_intrvl_valid = true;
 	cam_mod->frm_intrvl = norm_interval;
-	if (cam_mod->frm_fmt_valid) {
-		adv_camera_module_set_active_config(cam_mod,
-			adv_camera_module_find_config(cam_mod,
-				&cam_mod->frm_fmt, interval));
-	}
+	cam_mod->auto_adjust_fps = false;
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
@@ -395,12 +439,34 @@ int adv_camera_module_s_frame_interval(
 	return ret;
 }
 
+int adv_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval)
+{
+	struct adv_camera_module *cam_mod = to_adv_camera_module(sd);
+
+	if (cam_mod->active_config) {
+		if (cam_mod->state == ADV_CAMERA_MODULE_STREAMING) {
+			if (cam_mod->frm_intrvl_valid) {
+				*interval = cam_mod->frm_intrvl;
+				return 0;
+			} else {
+				*interval = cam_mod->active_config->frm_intrvl;
+				return 0;
+			}
+		}
+	}
+
+	return -EFAULT;
+}
+
 /* ======================================================================== */
 
 int adv_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 {
 	int ret = 0;
 	struct adv_camera_module *cam_mod =  to_adv_camera_module(sd);
+	unsigned int vts;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "%d\n", enable);
 
@@ -429,6 +495,29 @@ int adv_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		ret = cam_mod->custom.start_streaming(cam_mod);
 		if (IS_ERR_VALUE(ret))
 			goto err;
+
+		if (cam_mod->frm_intrvl_valid) {
+			if ((cam_mod->frm_intrvl.interval.numerator !=
+				cam_mod->active_config->frm_intrvl.interval.numerator) ||
+				(cam_mod->frm_intrvl.interval.denominator !=
+				cam_mod->active_config->frm_intrvl.interval.denominator)) {
+				if (cam_mod->frm_intrvl.interval.denominator >
+					cam_mod->active_config->frm_intrvl.interval.denominator) {
+					pltfrm_camera_module_pr_warn(&cam_mod->sd,
+						"sensor is not support stream: %dx%d@(%d/%d)fps!\n",
+						cam_mod->active_config->frm_fmt.width,
+						cam_mod->active_config->frm_fmt.height,
+						cam_mod->frm_intrvl.interval.denominator,
+						cam_mod->frm_intrvl.interval.numerator);
+					goto end;
+				}
+				vts = cam_mod->active_config->timings.frame_length_lines;
+				vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+				vts /= cam_mod->frm_intrvl.interval.denominator;
+				cam_mod->custom.s_vts(cam_mod, vts);
+			}
+		}
+
 		if (!cam_mod->inited && cam_mod->update_config)
 			cam_mod->inited = true;
 		cam_mod->update_config = false;
@@ -473,6 +562,7 @@ int adv_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		msleep(wait_ms + 1);
 	}
 
+end:
 	cam_mod->state_before_suspend = cam_mod->state;
 
 	return 0;
@@ -584,6 +674,22 @@ int adv_camera_module_g_ctrl(struct v4l2_subdev *sd,
 		return 0;
 	}
 
+	if (ctrl->id == V4L2_CID_HFLIP) {
+		ctrl->value = cam_mod->hflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_HFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
+	if (ctrl->id == V4L2_CID_VFLIP) {
+		ctrl->value = cam_mod->vflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_VFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
 	if (IS_ERR_OR_NULL(cam_mod->active_config)) {
 		pltfrm_camera_module_pr_err(&cam_mod->sd,
 			"no active configuration\n");
@@ -670,10 +776,6 @@ int adv_camera_module_g_ctrl(struct v4l2_subdev *sd,
 			"V4L2_CID_FOCUS_ABSOLUTE %d\n",
 			ctrl->value);
 		break;
-	case V4L2_CID_HFLIP:
-	case V4L2_CID_VFLIP:
-		/* TBD */
-		/* fallthrough */
 	default:
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
 			"failed, unknown ctrl %d\n", ctrl->id);
@@ -813,12 +915,14 @@ int adv_camera_module_s_ext_ctrls(
 				cam_mod->hflip = true;
 			else
 				cam_mod->hflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		case V4L2_CID_VFLIP:
 			if (ctrl->value)
 				cam_mod->vflip = true;
 			else
 				cam_mod->vflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		default:
 			pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -896,7 +1000,8 @@ long adv_camera_module_ioctl(struct v4l2_subdev *sd,
 	void *arg)
 {
 	struct adv_camera_module *cam_mod =  to_adv_camera_module(sd);
-	int ret;
+	int ret, i;
+	unsigned int flag, val;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "cmd: 0x%x\n", cmd);
 
@@ -937,9 +1042,10 @@ long adv_camera_module_ioctl(struct v4l2_subdev *sd,
 		timings->fine_integration_time_min =
 			adv_timings.fine_integration_time_min;
 
-		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame[0] =
-				cam_mod->custom.g_exposure_valid_frame(cam_mod);
+		timings->exposure_valid_frame[0] =
+			cam_mod->custom.exposure_valid_frame[0];
+		timings->exposure_valid_frame[1] =
+			cam_mod->custom.exposure_valid_frame[1];
 		if (cam_mod->exp_config.exp_time)
 			timings->exp_time = cam_mod->exp_config.exp_time;
 		else
@@ -948,7 +1054,52 @@ long adv_camera_module_ioctl(struct v4l2_subdev *sd,
 			timings->gain = cam_mod->exp_config.gain;
 		else
 			timings->gain = adv_timings.gain;
+
+		if (cam_mod->active_config) {
+			timings->max_exp_gain_h = cam_mod->active_config->max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->active_config->max_exp_gain_l;
+		} else {
+			timings->max_exp_gain_h = cam_mod->custom.configs[0].max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->custom.configs[0].max_exp_gain_l;
+		}
 		return ret;
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *sensor_config = (struct sensor_config_info_s *)arg;
+
+		sensor_config->config_num = cam_mod->custom.num_configs;
+		for (i = 0; i < cam_mod->custom.num_configs; i++) {
+			if (i >= SENSOR_CONFIG_NUM)
+				break;
+			sensor_config->sensor_fmt[i] =
+				pltfrm_camera_module_pix_fmt2csi2_dt(cam_mod->custom.configs[i].frm_fmt.code);
+			sensor_config->reso[i].width = cam_mod->custom.configs[i].frm_fmt.width;
+			sensor_config->reso[i].height = cam_mod->custom.configs[i].frm_fmt.height;
+		}
+		return 0;
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *sensor_rw = (struct sensor_reg_rw_s *)arg;
+
+		if (sensor_rw->reg_access_mode == SENSOR_READ_MODE) {
+			for (i = 0; i < cam_mod->custom.configs[0].reg_table_num_entries; i++) {
+				flag = cam_mod->custom.configs[0].reg_table[i].flag;
+				if (flag != PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT)
+					break;
+			}
+			if (flag == PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT) {
+				pltfrm_camera_module_pr_err(&cam_mod->sd,
+					"Can not get sensor reg type.\n");
+				return -EINVAL;
+			}
+			sensor_rw->reg_addr_len = PLTFRM_CAMERA_MODULE_REG_LEN(flag);
+			sensor_rw->reg_data_len = PLTFRM_CAMERA_MODULE_DATA_LEN(flag);
+			pltfrm_camera_module_read_reg_ex(&cam_mod->sd, 1, flag, sensor_rw->addr, &val);
+			sensor_rw->data = val;
+		} else {
+			flag = (sensor_rw->reg_addr_len << PLTFRM_CAMERA_MODULE_REG_LEN_BIT);
+			flag |= (sensor_rw->reg_data_len << PLTFRM_CAMERA_MODULE_DATA_LEN_BIT);
+			pltfrm_camera_module_write_reg_ex(&cam_mod->sd, flag, sensor_rw->addr, sensor_rw->data);
+		}
+		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_ITF_CFG) {
 		struct pltfrm_cam_itf *itf_cfg = (struct pltfrm_cam_itf *)arg;
 		struct adv_camera_module_config *config;
@@ -969,10 +1120,14 @@ long adv_camera_module_ioctl(struct v4l2_subdev *sd,
 		pltfrm_camera_module_ioctl(sd, PLTFRM_CIFCAM_G_ITF_CFG, arg);
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
-		adv_camera_module_init(cam_mod, &cam_mod->custom);
-		pltfrm_camera_module_pr_err(&cam_mod->sd, "test\n");
-		pltfrm_camera_module_ioctl(sd, cmd, arg);
-		return adv_camera_module_attach(cam_mod);
+		ret = adv_camera_module_init(cam_mod, &cam_mod->custom);
+		if (!IS_ERR_VALUE(ret)) {
+			pltfrm_camera_module_ioctl(sd, cmd, arg);
+			return adv_camera_module_attach(cam_mod);
+		} else {
+			adv_camera_module_release(cam_mod);
+			return ret;
+		}
 	}
 
 	ret = pltfrm_camera_module_ioctl(sd, cmd, arg);
@@ -984,7 +1139,22 @@ long adv_camera_module_ioctl(struct v4l2_subdev *sd,
 int adv_camera_module_get_flip_mirror(
 	struct adv_camera_module *cam_mod)
 {
-	return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	int mode = 0;
+
+	if (!cam_mod->flip_flg)
+		return -1;
+
+	if (cam_mod->hflip)
+		mode |= ADV_MIRROR_BIT_MASK;
+	else
+		mode &= ~ADV_MIRROR_BIT_MASK;
+
+	if (cam_mod->vflip)
+		mode |= ADV_FLIP_BIT_MASK;
+	else
+		mode &= ~ADV_FLIP_BIT_MASK;
+
+	return mode;
 }
 
 /* ======================================================================== */
@@ -1156,9 +1326,13 @@ int adv_camera_module_init(struct adv_camera_module *cam_mod,
 	struct adv_camera_module_custom_config *custom)
 {
 	int ret = 0;
+	int mode = 0;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
+	cam_mod->hflip = false;
+	cam_mod->vflip = false;
+	cam_mod->flip_flg = false;
 	adv_camera_module_reset(cam_mod);
 
 	if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1186,6 +1360,13 @@ int adv_camera_module_init(struct adv_camera_module *cam_mod,
 		goto err;
 	}
 
+	mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	if (mode != -1) {
+		cam_mod->hflip = mode & ADV_MIRROR_BIT_MASK ? true : false;
+		cam_mod->vflip = mode & ADV_FLIP_BIT_MASK ? true : false;
+		cam_mod->flip_flg = true;
+	}
+
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
diff --git a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
index 85b7442ff2242..392ba60be313c 100644
--- a/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/adv_camera_module.h
@@ -30,8 +30,8 @@
 #define ADV_CAMERA_MODULE_REG_TYPE_TIMEOUT PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT
 #define adv_camera_module_csi_config
 #define adv_camera_module_reg pltfrm_camera_module_reg
-#define ADV_FLIP_BIT_MASK					0x2
-#define ADV_MIRROR_BIT_MASK					0x1
+#define ADV_FLIP_BIT_MASK					(1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
+#define ADV_MIRROR_BIT_MASK					(1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
 
 #define ADV_CAMERA_MODULE_CTRL_UPDT_GAIN			0x01
 #define ADV_CAMERA_MODULE_CTRL_UPDT_EXP_TIME			0x02
@@ -90,7 +90,8 @@ struct adv_camera_module_config {
 	struct adv_camera_module_timings timings;
 	bool soft_reset;
 	bool ignore_measurement_check;
-
+	u8 max_exp_gain_h;
+	u8 max_exp_gain_l;
 	struct pltfrm_cam_itf itf_cfg;
 };
 
@@ -156,7 +157,8 @@ struct adv_camera_module_custom_config {
 	int (*g_ctrl)(struct adv_camera_module *cam_mod, u32 ctrl_id);
 	int (*g_timings)(struct adv_camera_module *cam_mod,
 		struct adv_camera_module_timings *timings);
-	int (*g_exposure_valid_frame)(struct adv_camera_module *cam_mod);
+	int (*s_vts)(struct adv_camera_module *cam_mod,
+		u32 vts);
 	int (*s_ext_ctrls)(struct adv_camera_module *cam_mod,
 		struct adv_camera_module_ext_ctrls *ctrls);
 	int (*set_flip)(
@@ -168,6 +170,7 @@ struct adv_camera_module_custom_config {
 	struct adv_camera_module_config *configs;
 	u32 num_configs;
 	u32 power_up_delays_ms[3];
+	unsigned short exposure_valid_frame[2];
 	void *priv;
 };
 
@@ -199,9 +202,11 @@ struct adv_camera_module {
 	bool frm_intrvl_valid;
 	bool hflip;
 	bool vflip;
+	bool flip_flg;
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
+	struct mutex lock;
 };
 
 #define adv_camera_module_pr_info(cam_mod, fmt, arg...) \
@@ -245,6 +250,10 @@ int adv_camera_module_s_frame_interval(
 	struct v4l2_subdev *sd,
 	struct v4l2_subdev_frame_interval *interval);
 
+int adv_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval);
+
 int adv_camera_module_s_stream(
 	struct v4l2_subdev *sd,
 	int enable);
diff --git a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
index 79a63caa7bbba..2aed92387b2d3 100644
--- a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.c
@@ -51,8 +51,6 @@ void aptina_camera_module_reset(
 	cam_mod->exp_config.auto_exp = false;
 	cam_mod->exp_config.auto_gain = false;
 	cam_mod->wb_config.auto_wb = false;
-	cam_mod->hflip = false;
-	cam_mod->vflip = false;
 	cam_mod->auto_adjust_fps = true;
 	cam_mod->rotation = 0;
 	cam_mod->ctrl_updt = 0;
@@ -484,6 +482,10 @@ int aptina_camera_module_s_fmt(struct v4l2_subdev *sd,
 		aptina_camera_module_set_active_config(cam_mod,
 			aptina_camera_module_find_config(cam_mod,
 				fmt, &cam_mod->frm_intrvl));
+	} else {
+		aptina_camera_module_set_active_config(cam_mod,
+			aptina_camera_module_find_config(cam_mod,
+				fmt, NULL));
 	}
 	return 0;
 err:
@@ -525,6 +527,9 @@ int aptina_camera_module_s_frame_interval(
 	unsigned long gcdiv;
 	struct v4l2_subdev_frame_interval norm_interval;
 	int ret = 0;
+	struct aptina_camera_module_config *config;
+	unsigned int vts;
+
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 	if ((interval->interval.denominator == 0) ||
@@ -551,22 +556,63 @@ int aptina_camera_module_s_frame_interval(
 	norm_interval.interval.denominator =
 		interval->interval.denominator / gcdiv;
 
-	if (IS_ERR_OR_NULL(aptina_camera_module_find_config(cam_mod,
-			NULL, &norm_interval))) {
-		pltfrm_camera_module_pr_err(&cam_mod->sd,
-			"frame interval %d/%d not supported\n",
-			interval->interval.numerator,
-			interval->interval.denominator);
-		ret = -EINVAL;
-		goto err;
+	if (!cam_mod->frm_fmt_valid)
+		goto end;
+
+	config = aptina_camera_module_find_config(
+			cam_mod,
+			&cam_mod->active_config->frm_fmt,
+			&norm_interval);
+
+	if (!IS_ERR_OR_NULL(config) && (config != cam_mod->active_config)) {
+		aptina_camera_module_set_active_config(cam_mod, config);
+		if (cam_mod->state == APTINA_CAMERA_MODULE_STREAMING) {
+			cam_mod->custom.stop_streaming(cam_mod);
+			aptina_camera_module_write_config(cam_mod);
+			cam_mod->custom.start_streaming(cam_mod);
+		}
+	} else {
+		if (IS_ERR_OR_NULL(cam_mod->active_config)) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"no active sensor configuration");
+			ret = -EFAULT;
+			goto err;
+		}
+		if (cam_mod->active_config->frm_intrvl.interval.denominator <
+			norm_interval.interval.denominator) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"%dx%d@%dfps isn't support!",
+				cam_mod->active_config->frm_fmt.width,
+				cam_mod->active_config->frm_fmt.height,
+				norm_interval.interval.denominator);
+			ret = -EFAULT;
+			goto err;
+		}
+		if (!cam_mod->custom.s_vts) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"custom.s_vts isn't support!");
+			ret = -EFAULT;
+			goto err;
+		}
+
+		vts = cam_mod->active_config->timings.frame_length_lines;
+		vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+		vts /= norm_interval.interval.denominator;
+		cam_mod->vts_cur = vts;
+
+		if (cam_mod->state != APTINA_CAMERA_MODULE_STREAMING)
+			goto end;
+
+		cam_mod->custom.s_vts(cam_mod, vts);
 	}
+
+end:
 	cam_mod->frm_intrvl_valid = true;
 	cam_mod->frm_intrvl = norm_interval;
-	if (cam_mod->frm_fmt_valid) {
-		aptina_camera_module_set_active_config(cam_mod,
-			aptina_camera_module_find_config(cam_mod,
-				&cam_mod->frm_fmt, interval));
-	}
+	cam_mod->auto_adjust_fps = false;
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
@@ -574,12 +620,34 @@ int aptina_camera_module_s_frame_interval(
 	return ret;
 }
 
+int aptina_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval)
+{
+	struct aptina_camera_module *cam_mod = to_aptina_camera_module(sd);
+
+	if (cam_mod->active_config) {
+		if (cam_mod->state == APTINA_CAMERA_MODULE_STREAMING) {
+			if (cam_mod->frm_intrvl_valid) {
+				*interval = cam_mod->frm_intrvl;
+				return 0;
+			} else {
+				*interval = cam_mod->active_config->frm_intrvl;
+				return 0;
+			}
+		}
+	}
+
+	return -EFAULT;
+}
+
 /* ======================================================================== */
 
 int aptina_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 {
 	int ret = 0;
 	struct aptina_camera_module *cam_mod =  to_aptina_camera_module(sd);
+	unsigned int vts;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "%d\n", enable);
 
@@ -600,9 +668,6 @@ int aptina_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 			goto err;
 		}
 
-		if (!IS_ERR_OR_NULL(cam_mod->custom.set_flip))
-			cam_mod->custom.set_flip(cam_mod);
-
 		if (cam_mod->update_config) {
 			ret = aptina_camera_module_write_config(cam_mod);
 			if (IS_ERR_VALUE(ret))
@@ -612,6 +677,29 @@ int aptina_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		ret = cam_mod->custom.start_streaming(cam_mod);
 		if (IS_ERR_VALUE(ret))
 			goto err;
+
+		if (cam_mod->frm_intrvl_valid) {
+			if ((cam_mod->frm_intrvl.interval.numerator !=
+				cam_mod->active_config->frm_intrvl.interval.numerator) ||
+				(cam_mod->frm_intrvl.interval.denominator !=
+				cam_mod->active_config->frm_intrvl.interval.denominator)) {
+				if (cam_mod->frm_intrvl.interval.denominator >
+					cam_mod->active_config->frm_intrvl.interval.denominator) {
+					pltfrm_camera_module_pr_warn(&cam_mod->sd,
+						"sensor is not support stream: %dx%d@(%d/%d)fps!\n",
+						cam_mod->active_config->frm_fmt.width,
+						cam_mod->active_config->frm_fmt.height,
+						cam_mod->frm_intrvl.interval.denominator,
+						cam_mod->frm_intrvl.interval.numerator);
+					goto end;
+				}
+				vts = cam_mod->active_config->timings.frame_length_lines;
+				vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+				vts /= cam_mod->frm_intrvl.interval.denominator;
+				cam_mod->custom.s_vts(cam_mod, vts);
+			}
+		}
+
 		cam_mod->update_config = false;
 		cam_mod->ctrl_updt = 0;
 		mdelay(cam_mod->custom.power_up_delays_ms[2]);
@@ -644,6 +732,7 @@ int aptina_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		msleep(wait_ms + 1);
 	}
 
+end:
 	cam_mod->state_before_suspend = cam_mod->state;
 
 	return 0;
@@ -674,43 +763,43 @@ int aptina_camera_module_s_power(struct v4l2_subdev *sd, int on)
 		}
 		if (cam_mod->state == APTINA_CAMERA_MODULE_HW_STANDBY) {
 			ret = pltfrm_camera_module_set_pin_state(&cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PWR,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+				PLTFRM_CAMERA_MODULE_PIN_PWR,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 			msleep(20);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PD,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_PD,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 			msleep(20);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_RESET,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_RESET,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 			msleep(20);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_RESET,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_RESET,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
 			msleep(20);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_RESET,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_RESET,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 			msleep(20);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PD,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_PD,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
 			msleep(20);
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PD,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_PD,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 			msleep(20);
 
 			if (!IS_ERR_VALUE(ret)) {
@@ -742,19 +831,19 @@ int aptina_camera_module_s_power(struct v4l2_subdev *sd, int on)
 		}
 		if (cam_mod->state == APTINA_CAMERA_MODULE_SW_STANDBY) {
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PD,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_PD,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_RESET,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_RESET,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
 
 			ret = pltfrm_camera_module_set_pin_state(
-			    &cam_mod->sd,
-			    PLTFRM_CAMERA_MODULE_PIN_PWR,
-			    PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+				&cam_mod->sd,
+				PLTFRM_CAMERA_MODULE_PIN_PWR,
+				PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
 
 			if (!IS_ERR_VALUE(ret))
 				cam_mod->state =
@@ -805,6 +894,22 @@ int aptina_camera_module_g_ctrl(struct v4l2_subdev *sd,
 		return 0;
 	}
 
+	if (ctrl->id == V4L2_CID_HFLIP) {
+		ctrl->value = cam_mod->hflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_HFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
+	if (ctrl->id == V4L2_CID_VFLIP) {
+		ctrl->value = cam_mod->vflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_VFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
 	if (IS_ERR_OR_NULL(cam_mod->active_config)) {
 		pltfrm_camera_module_pr_err(&cam_mod->sd,
 			"no active configuration\n");
@@ -897,10 +1002,6 @@ int aptina_camera_module_g_ctrl(struct v4l2_subdev *sd,
 			"V4L2_CID_FOCUS_ABSOLUTE %d\n",
 			ctrl->value);
 		break;
-	case V4L2_CID_HFLIP:
-	case V4L2_CID_VFLIP:
-		/* TBD */
-		/* fallthrough */
 	default:
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
 			"failed, unknown ctrl %d\n", ctrl->id);
@@ -1038,12 +1139,14 @@ int aptina_camera_module_s_ext_ctrls(
 				cam_mod->hflip = true;
 			else
 				cam_mod->hflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		case V4L2_CID_VFLIP:
 			if (ctrl->value)
 				cam_mod->vflip = true;
 			else
 				cam_mod->vflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		default:
 			pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1124,7 +1227,8 @@ long aptina_camera_module_ioctl(struct v4l2_subdev *sd,
 	void *arg)
 {
 	struct aptina_camera_module *cam_mod =  to_aptina_camera_module(sd);
-	int ret;
+	int ret, i;
+	unsigned int flag, val;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
@@ -1176,16 +1280,60 @@ long aptina_camera_module_ioctl(struct v4l2_subdev *sd,
 		timings->fine_integration_time_min =
 			aptina_timings.fine_integration_time_min;
 
-		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame =
-				cam_mod->custom.g_exposure_valid_frame(cam_mod);
+		timings->exposure_valid_frame[0] =
+			cam_mod->custom.exposure_valid_frame[0];
+		timings->exposure_valid_frame[1] =
+			cam_mod->custom.exposure_valid_frame[1];
 
 		/*
 		 *timings->exp_time = cam_mod->exp_config.exp_time;
 		 *timings->gain = cam_mod->exp_config.gain;
 		 */
-
+		if (cam_mod->active_config) {
+			timings->max_exp_gain_h = cam_mod->active_config->max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->active_config->max_exp_gain_l;
+		} else {
+			timings->max_exp_gain_h = cam_mod->custom.configs[0].max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->custom.configs[0].max_exp_gain_l;
+		}
 		return ret;
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *sensor_config = (struct sensor_config_info_s *)arg;
+
+		sensor_config->config_num = cam_mod->custom.num_configs;
+		for (i = 0; i < cam_mod->custom.num_configs; i++) {
+			if (i >= SENSOR_CONFIG_NUM)
+				break;
+			sensor_config->sensor_fmt[i] =
+				pltfrm_camera_module_pix_fmt2csi2_dt(cam_mod->custom.configs[i].frm_fmt.code);
+			sensor_config->reso[i].width = cam_mod->custom.configs[i].frm_fmt.width;
+			sensor_config->reso[i].height = cam_mod->custom.configs[i].frm_fmt.height;
+		}
+		return 0;
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *sensor_rw = (struct sensor_reg_rw_s *)arg;
+
+		if (sensor_rw->reg_access_mode == SENSOR_READ_MODE) {
+			for (i = 0; i < cam_mod->custom.configs[0].reg_table_num_entries; i++) {
+				flag = cam_mod->custom.configs[0].reg_table[i].flag;
+				if (flag != PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT)
+					break;
+			}
+			if (flag == PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT) {
+				pltfrm_camera_module_pr_err(&cam_mod->sd,
+					"Can not get sensor reg type.\n");
+				return -EINVAL;
+			}
+			sensor_rw->reg_addr_len = PLTFRM_CAMERA_MODULE_REG_LEN(flag);
+			sensor_rw->reg_data_len = PLTFRM_CAMERA_MODULE_DATA_LEN(flag);
+			pltfrm_camera_module_read_reg_ex(&cam_mod->sd, 1, flag, sensor_rw->addr, &val);
+			sensor_rw->data = val;
+		} else {
+			flag = (sensor_rw->reg_addr_len << PLTFRM_CAMERA_MODULE_REG_LEN_BIT);
+			flag |= (sensor_rw->reg_data_len << PLTFRM_CAMERA_MODULE_DATA_LEN_BIT);
+			pltfrm_camera_module_write_reg_ex(&cam_mod->sd, flag, sensor_rw->addr, sensor_rw->data);
+		}
+		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_ITF_CFG) {
 		struct pltfrm_cam_itf *itf_cfg = (struct pltfrm_cam_itf *)arg;
 		struct aptina_camera_module_config *config;
@@ -1205,9 +1353,14 @@ long aptina_camera_module_ioctl(struct v4l2_subdev *sd,
 		pltfrm_camera_module_ioctl(sd, PLTFRM_CIFCAM_G_ITF_CFG, arg);
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
-		aptina_camera_module_init(cam_mod, &cam_mod->custom);
-		pltfrm_camera_module_ioctl(sd, cmd, arg);
-		return aptina_camera_module_attach(cam_mod);
+		ret = aptina_camera_module_init(cam_mod, &cam_mod->custom);
+		if (!IS_ERR_VALUE(ret)) {
+			pltfrm_camera_module_ioctl(sd, cmd, arg);
+			return aptina_camera_module_attach(cam_mod);
+		} else {
+			aptina_camera_module_release(cam_mod);
+			return ret;
+		}
 	}
 
 	ret = pltfrm_camera_module_ioctl(sd, cmd, arg);
@@ -1276,7 +1429,22 @@ static int aptina_camera_module_s_flip(struct aptina_camera_module *cam_mod)
 int aptina_camera_module_get_flip_mirror(
 	struct aptina_camera_module *cam_mod)
 {
-	return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	int mode = 0;
+
+	if (!cam_mod->flip_flg)
+		return -1;
+
+	if (cam_mod->hflip)
+		mode |= APTINA_MIRROR_BIT_MASK;
+	else
+		mode &= ~APTINA_MIRROR_BIT_MASK;
+
+	if (cam_mod->vflip)
+		mode |= APTINA_FLIP_BIT_MASK;
+	else
+		mode &= ~APTINA_FLIP_BIT_MASK;
+
+	return mode;
 }
 
 int aptina_camera_module_enum_frameintervals(
@@ -1373,9 +1541,13 @@ int aptina_camera_module_init(struct aptina_camera_module *cam_mod,
 	struct aptina_camera_module_custom_config *custom)
 {
 	int ret = 0;
+	int mode = 0;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
+	cam_mod->hflip = false;
+	cam_mod->vflip = false;
+	cam_mod->flip_flg = false;
 	aptina_camera_module_reset(cam_mod);
 
 	if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1415,6 +1587,12 @@ int aptina_camera_module_init(struct aptina_camera_module *cam_mod,
  *}
  */
 
+	mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	if (mode != -1) {
+		cam_mod->hflip = mode & APTINA_MIRROR_BIT_MASK ? true : false;
+		cam_mod->vflip = mode & APTINA_FLIP_BIT_MASK ? true : false;
+		cam_mod->flip_flg = true;
+	}
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
diff --git a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
index 9f053051cb9c5..415f74d464af7 100644
--- a/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/aptina_camera_module.h
@@ -31,8 +31,8 @@
 				PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT
 #define aptina_camera_module_csi_config
 #define aptina_camera_module_reg pltfrm_camera_module_reg
-#define APTINA_FLIP_BIT_MASK 0x2
-#define APTINA_MIRROR_BIT_MASK 0x1
+#define APTINA_FLIP_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
+#define APTINA_MIRROR_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
 
 #define APTINA_CAMERA_MODULE_CTRL_UPDT_GAIN 0x01
 #define APTINA_CAMERA_MODULE_CTRL_UPDT_EXP_TIME 0x02
@@ -88,6 +88,8 @@ struct aptina_camera_module_config {
 	struct aptina_camera_module_timings timings;
 	bool soft_reset;
 	bool ignore_measurement_check;
+	u8 max_exp_gain_h;
+	u8 max_exp_gain_l;
 	struct pltfrm_cam_itf itf_cfg;
 };
 
@@ -153,14 +155,19 @@ struct aptina_camera_module_custom_config {
 	int (*g_ctrl)(struct aptina_camera_module *cam_mod, u32 ctrl_id);
 	int (*g_timings)(struct aptina_camera_module *cam_mod,
 		struct aptina_camera_module_timings *timings);
+	int (*s_vts)(struct aptina_camera_module *cam_mod,
+		u32 vts);
 	int (*s_ext_ctrls)(struct aptina_camera_module *cam_mod,
 		struct aptina_camera_module_ext_ctrls *ctrls);
-	int (*set_flip)(struct aptina_camera_module *cam_mod);
+	int (*set_flip)(struct aptina_camera_module *cam_mod,
+		struct pltfrm_camera_module_reg reglist[],
+		int len);
 	struct aptina_camera_module_config *configs;
 	int (*init_common)(struct aptina_camera_module *cam_mod);
 	int (*g_exposure_valid_frame)(struct aptina_camera_module *cam_mod);
 	u32 num_configs;
 	u32 power_up_delays_ms[3];
+	unsigned short exposure_valid_frame[2];
 	void *priv;
 	struct aptina_camera_module_timings timings;
 };
@@ -178,6 +185,7 @@ struct aptina_camera_module {
 	enum aptina_camera_module_state state_before_suspend;
 	struct aptina_camera_module_config *active_config;
 	u32 ctrl_updt;
+	u32 vts_cur;
 	u32 vts_min;
 	bool auto_adjust_fps;
 	bool update_config;
@@ -185,9 +193,11 @@ struct aptina_camera_module {
 	bool frm_intrvl_valid;
 	bool hflip;
 	bool vflip;
+	bool flip_flg;
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
+	struct mutex lock;
 };
 
 #define aptina_camera_module_pr_info(cam_mod, fmt, arg...) \
@@ -238,6 +248,10 @@ int aptina_camera_module_s_frame_interval(
 	struct v4l2_subdev *sd,
 	struct v4l2_subdev_frame_interval *interval);
 
+int aptina_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval);
+
 int aptina_camera_module_s_stream(
 	struct v4l2_subdev *sd,
 	int enable);
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
index b39afa63851b1..94c4283574115 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/imx323_v4l2-i2c-subdev.c
@@ -124,6 +124,8 @@ static struct imx_camera_module_config imx323_configs[] = {
 			sizeof(imx323_init_tab_1920_1080_30fps) /
 			sizeof(imx323_init_tab_1920_1080_30fps[0]),
 		.v_blanking_time_us = 5000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_DVP_CFG(
 			PLTFRM_CAM_ITF_BT601_12,
 			PLTFRM_CAM_SIGNAL_HIGH_LEVEL,
@@ -170,10 +172,9 @@ static int imx323_auto_adjust_fps(struct imx_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time + IMX323_COARSE_INTG_TIME_MAX_MARGIN)
+	if ((exp_time + IMX323_COARSE_INTG_TIME_MAX_MARGIN)
 		> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-					IMX323_COARSE_INTG_TIME_MAX_MARGIN;
+		vts = exp_time + IMX323_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 	ret = imx_camera_module_write_reg(cam_mod,
@@ -181,12 +182,14 @@ static int imx323_auto_adjust_fps(struct imx_camera_module *cam_mod,
 	ret |= imx_camera_module_write_reg(cam_mod,
 				IMX323_TIMING_VTS_HIGH_REG, (vts >> 8) & 0xFF);
 
-	if (IS_ERR_VALUE(ret))
+	if (IS_ERR_VALUE(ret)) {
 		imx_camera_module_pr_err(cam_mod,
 			"failed with error (%d)\n", ret);
-	else
-		imx_camera_module_pr_debug(cam_mod,
+	} else {
+		imx_camera_module_pr_info(cam_mod,
 			"updated vts = %d,vts_min=%d\n", vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
 
 	return ret;
 }
@@ -240,6 +243,7 @@ static int imx323_write_aec(struct imx_camera_module *cam_mod)
 
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 
+		mutex_lock(&cam_mod->lock);
 		if (!IS_ERR_VALUE(ret) && cam_mod->auto_adjust_fps)
 			ret = imx323_auto_adjust_fps(cam_mod,
 					cam_mod->exp_config.exp_time);
@@ -258,6 +262,7 @@ static int imx323_write_aec(struct imx_camera_module *cam_mod)
 
 		if (!cam_mod->auto_adjust_fps)
 			ret |= imx323_set_vts(cam_mod, cam_mod->exp_config.vts_value);
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -373,6 +378,8 @@ static int imx323_g_timings(struct imx_camera_module *cam_mod,
 			* vts
 			* timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
+
 	return ret;
 err:
 	imx_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
@@ -381,9 +388,12 @@ static int imx323_g_timings(struct imx_camera_module *cam_mod,
 
 /*--------------------------------------------------------------------------*/
 
-static int imx323_set_flip(struct imx_camera_module *cam_mod)
+static int imx323_set_flip(
+	struct imx_camera_module *cam_mod,
+	struct pltfrm_camera_module_reg reglist[],
+	int len)
 {
-	int mode = 0;
+	int i, mode = 0;
 	u16 orientation = 0;
 
 	mode = imx_camera_module_get_flip_mirror(cam_mod);
@@ -394,15 +404,14 @@ static int imx323_set_flip(struct imx_camera_module *cam_mod)
 	}
 
 	if (!IS_ERR_OR_NULL(cam_mod->active_config)) {
-		if (mode == IMX_FLIP_BIT_MASK)
-			orientation = IMX323_ORIENTATION_V;
-		else if (mode == IMX_MIRROR_BIT_MASK)
-			orientation = IMX323_ORIENTATION_H;
-		else if (mode == (IMX_MIRROR_BIT_MASK | IMX_FLIP_BIT_MASK))
-			orientation = IMX323_ORIENTATION_H |
-					IMX323_ORIENTATION_V;
-		else
-			orientation = 0;
+		if (PLTFRM_CAMERA_MODULE_IS_MIRROR(mode))
+			orientation |= 0x01;
+		if (PLTFRM_CAMERA_MODULE_IS_FLIP(mode))
+			orientation |= 0x02;
+		for (i = 0; i < len; i++) {
+			if (reglist[i].reg == IMX323_ORIENTATION_REG)
+				reglist[i].val = orientation;
+		}
 	}
 
 	return 0;
@@ -443,14 +452,8 @@ static int imx323_s_ext_ctrls(struct imx_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = imx323_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = imx323_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -474,7 +477,10 @@ static int imx323_start_streaming(struct imx_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
-	if (IS_ERR_VALUE(imx_camera_module_write_reg(cam_mod, 0x0100, 1)))
+	mutex_lock(&cam_mod->lock);
+	ret = imx_camera_module_write_reg(cam_mod, 0x0100, 1);
+	mutex_unlock(&cam_mod->lock);
+	if (IS_ERR_VALUE(ret))
 		goto err;
 
 	msleep(25);
@@ -494,7 +500,9 @@ static int imx323_stop_streaming(struct imx_camera_module *cam_mod)
 
 	imx_camera_module_pr_debug(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = imx_camera_module_write_reg(cam_mod, 0x0100, 0);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -553,6 +561,7 @@ static struct v4l2_subdev_core_ops imx323_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops imx323_camera_module_video_ops = {
 	.s_frame_interval = imx_camera_module_s_frame_interval,
+	.g_frame_interval = imx_camera_module_g_frame_interval,
 	.s_stream = imx_camera_module_s_stream
 };
 
@@ -577,9 +586,16 @@ static struct imx_camera_module_custom_config imx323_custom_config = {
 	.g_timings = imx323_g_timings,
 	.check_camera_id = imx323_check_camera_id,
 	.set_flip = imx323_set_flip,
+	.s_vts = imx323_auto_adjust_fps,
 	.configs = imx323_configs,
 	.num_configs =  ARRAY_SIZE(imx323_configs),
-	.power_up_delays_ms = {5, 20, 0}
+	.power_up_delays_ms = {5, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int imx323_probe(
@@ -590,8 +606,10 @@ static int imx323_probe(
 
 	imx323_filltimings(&imx323_custom_config);
 	v4l2_i2c_subdev_init(&imx323.sd, client, &imx323_camera_module_ops);
+	imx323.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	imx323.custom = imx323_custom_config;
 
+	mutex_init(&imx323.lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -605,6 +623,7 @@ static int imx323_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	imx_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
index 2171518269034..8cccfe425de38 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.c
@@ -45,8 +45,6 @@ static void imx_camera_module_reset(
 	cam_mod->exp_config.auto_exp = false;
 	cam_mod->exp_config.auto_gain = false;
 	cam_mod->wb_config.auto_wb = false;
-	cam_mod->hflip = false;
-	cam_mod->vflip = false;
 	cam_mod->auto_adjust_fps = true;
 	cam_mod->rotation = 0;
 	cam_mod->ctrl_updt = 0;
@@ -194,7 +192,8 @@ static int imx_camera_module_write_config(
 	}
 
 	if (!IS_ERR_OR_NULL(cam_mod->custom.set_flip))
-		cam_mod->custom.set_flip(cam_mod);
+		cam_mod->custom.set_flip(cam_mod,
+			reg_table, reg_table_num_entries);
 
 	ret = pltfrm_camera_module_write_reglist(&cam_mod->sd,
 		reg_table, reg_table_num_entries);
@@ -284,6 +283,10 @@ int imx_camera_module_s_fmt(struct v4l2_subdev *sd,
 		imx_camera_module_set_active_config(cam_mod,
 			imx_camera_module_find_config(cam_mod,
 				fmt, &cam_mod->frm_intrvl));
+	} else {
+		imx_camera_module_set_active_config(cam_mod,
+			imx_camera_module_find_config(cam_mod,
+				fmt, NULL));
 	}
 	return 0;
 err:
@@ -324,6 +327,8 @@ int imx_camera_module_s_frame_interval(
 	struct imx_camera_module *cam_mod = to_imx_camera_module(sd);
 	unsigned long gcdiv;
 	struct v4l2_subdev_frame_interval norm_interval;
+	struct imx_camera_module_config *config;
+	unsigned int vts;
 	int ret = 0;
 
 	if ((interval->interval.denominator == 0) ||
@@ -350,22 +355,62 @@ int imx_camera_module_s_frame_interval(
 	norm_interval.interval.denominator =
 		interval->interval.denominator / gcdiv;
 
-	if (IS_ERR_OR_NULL(imx_camera_module_find_config(cam_mod,
-			NULL, &norm_interval))) {
-		pltfrm_camera_module_pr_err(&cam_mod->sd,
-			"frame interval %d/%d not supported\n",
-			interval->interval.numerator,
-			interval->interval.denominator);
-		ret = -EINVAL;
-		goto err;
+	if (!cam_mod->frm_fmt_valid)
+		goto end;
+	config = imx_camera_module_find_config(
+			cam_mod,
+			&cam_mod->active_config->frm_fmt,
+			&norm_interval);
+	if (!IS_ERR_OR_NULL(config) && (config != cam_mod->active_config)) {
+		imx_camera_module_set_active_config(cam_mod, config);
+		if (cam_mod->state == IMX_CAMERA_MODULE_STREAMING) {
+			cam_mod->custom.stop_streaming(cam_mod);
+			imx_camera_module_write_config(cam_mod);
+			cam_mod->custom.start_streaming(cam_mod);
+		}
+	} else {
+		if (IS_ERR_OR_NULL(cam_mod->active_config)) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"no active sensor configuration");
+			ret = -EFAULT;
+			goto err;
+		}
+		if (cam_mod->active_config->frm_intrvl.interval.denominator <
+			norm_interval.interval.denominator) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"%dx%d@%dfps isn't support!",
+				cam_mod->active_config->frm_fmt.width,
+				cam_mod->active_config->frm_fmt.height,
+				norm_interval.interval.denominator);
+			ret = -EFAULT;
+			goto err;
+		}
+
+		if (!cam_mod->custom.s_vts) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"custom.s_vts isn't support!");
+			ret = -EFAULT;
+			goto err;
+		}
+
+		vts = cam_mod->active_config->timings.frame_length_lines;
+		vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+		vts /= norm_interval.interval.denominator;
+		cam_mod->vts_cur = vts;
+
+		if (cam_mod->state != IMX_CAMERA_MODULE_STREAMING)
+			goto end;
+
+		cam_mod->custom.s_vts(cam_mod, vts);
 	}
+
+end:
 	cam_mod->frm_intrvl_valid = true;
 	cam_mod->frm_intrvl = norm_interval;
-	if (cam_mod->frm_fmt_valid) {
-		imx_camera_module_set_active_config(cam_mod,
-			imx_camera_module_find_config(cam_mod,
-				&cam_mod->frm_fmt, interval));
-	}
+	cam_mod->auto_adjust_fps = false;
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
@@ -373,12 +418,34 @@ int imx_camera_module_s_frame_interval(
 	return ret;
 }
 
+int imx_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval)
+{
+	struct imx_camera_module *cam_mod = to_imx_camera_module(sd);
+
+	if (cam_mod->active_config) {
+		if (cam_mod->state == IMX_CAMERA_MODULE_STREAMING) {
+			if (cam_mod->frm_intrvl_valid) {
+				*interval = cam_mod->frm_intrvl;
+				return 0;
+			} else {
+				*interval = cam_mod->active_config->frm_intrvl;
+				return 0;
+			}
+		}
+	}
+
+	return -EFAULT;
+}
+
 /* ======================================================================== */
 
 int imx_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 {
 	int ret = 0;
 	struct imx_camera_module *cam_mod =  to_imx_camera_module(sd);
+	unsigned int vts;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "%d\n", enable);
 
@@ -407,12 +474,36 @@ int imx_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		ret = cam_mod->custom.start_streaming(cam_mod);
 		if (IS_ERR_VALUE(ret))
 			goto err;
+
+		if (cam_mod->frm_intrvl_valid) {
+			if ((cam_mod->frm_intrvl.interval.numerator !=
+				cam_mod->active_config->frm_intrvl.interval.numerator) ||
+				(cam_mod->frm_intrvl.interval.denominator !=
+				cam_mod->active_config->frm_intrvl.interval.denominator)) {
+				if (cam_mod->frm_intrvl.interval.denominator >
+					cam_mod->active_config->frm_intrvl.interval.denominator) {
+					pltfrm_camera_module_pr_warn(&cam_mod->sd,
+						"sensor is not support stream: %dx%d@(%d/%d)fps!\n",
+						cam_mod->active_config->frm_fmt.width,
+						cam_mod->active_config->frm_fmt.height,
+						cam_mod->frm_intrvl.interval.denominator,
+						cam_mod->frm_intrvl.interval.numerator);
+					goto end;
+				}
+				vts = cam_mod->active_config->timings.frame_length_lines;
+				vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+				vts /= cam_mod->frm_intrvl.interval.denominator;
+				cam_mod->custom.s_vts(cam_mod, vts);
+			}
+		}
+
 		if (!cam_mod->inited && cam_mod->update_config)
 			cam_mod->inited = true;
 		cam_mod->update_config = false;
 		cam_mod->ctrl_updt = 0;
 		mdelay(cam_mod->custom.power_up_delays_ms[2]);
 		cam_mod->state = IMX_CAMERA_MODULE_STREAMING;
+
 	} else {
 		int pclk;
 		int wait_ms;
@@ -451,6 +542,7 @@ int imx_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		msleep(wait_ms + 1);
 	}
 
+end:
 	cam_mod->state_before_suspend = cam_mod->state;
 
 	return 0;
@@ -558,6 +650,22 @@ int imx_camera_module_g_ctrl(struct v4l2_subdev *sd,
 		return 0;
 	}
 
+	if (ctrl->id == V4L2_CID_HFLIP) {
+		ctrl->value = cam_mod->hflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_HFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
+	if (ctrl->id == V4L2_CID_VFLIP) {
+		ctrl->value = cam_mod->vflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_VFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
 	if (IS_ERR_OR_NULL(cam_mod->active_config)) {
 		pltfrm_camera_module_pr_err(&cam_mod->sd,
 			"no active configuration\n");
@@ -644,10 +752,6 @@ int imx_camera_module_g_ctrl(struct v4l2_subdev *sd,
 			"V4L2_CID_FOCUS_ABSOLUTE %d\n",
 			ctrl->value);
 		break;
-	case V4L2_CID_HFLIP:
-	case V4L2_CID_VFLIP:
-		/* TBD */
-		/* fallthrough */
 	default:
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
 			"failed, unknown ctrl %d\n", ctrl->id);
@@ -787,12 +891,14 @@ int imx_camera_module_s_ext_ctrls(
 				cam_mod->hflip = true;
 			else
 				cam_mod->hflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		case V4L2_CID_VFLIP:
 			if (ctrl->value)
 				cam_mod->vflip = true;
 			else
 				cam_mod->vflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		default:
 			pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -871,7 +977,8 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 	void *arg)
 {
 	struct imx_camera_module *cam_mod =  to_imx_camera_module(sd);
-	int ret;
+	int ret, i;
+	unsigned int flag, val;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "cmd: 0x%x\n", cmd);
 
@@ -916,9 +1023,10 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 		timings->fine_integration_time_min =
 			imx_timings.fine_integration_time_min;
 
-		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame[0] =
-				cam_mod->custom.g_exposure_valid_frame(cam_mod);
+		timings->exposure_valid_frame[0] =
+			cam_mod->custom.exposure_valid_frame[0];
+		timings->exposure_valid_frame[1] =
+			cam_mod->custom.exposure_valid_frame[1];
 		timings->exp_time = cam_mod->exp_config.exp_time;
 		timings->gain = cam_mod->exp_config.gain;
 
@@ -931,7 +1039,52 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 			timings->gain = cam_mod->exp_config.gain;
 		else
 			timings->gain = imx_timings.gain;
+
+		if (cam_mod->active_config) {
+			timings->max_exp_gain_h = cam_mod->active_config->max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->active_config->max_exp_gain_l;
+		} else {
+			timings->max_exp_gain_h = cam_mod->custom.configs[0].max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->custom.configs[0].max_exp_gain_l;
+		}
 		return ret;
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *sensor_config = (struct sensor_config_info_s *)arg;
+
+		sensor_config->config_num = cam_mod->custom.num_configs;
+		for (i = 0; i < cam_mod->custom.num_configs; i++) {
+			if (i >= SENSOR_CONFIG_NUM)
+				break;
+			sensor_config->sensor_fmt[i] =
+				pltfrm_camera_module_pix_fmt2csi2_dt(cam_mod->custom.configs[i].frm_fmt.code);
+			sensor_config->reso[i].width = cam_mod->custom.configs[i].frm_fmt.width;
+			sensor_config->reso[i].height = cam_mod->custom.configs[i].frm_fmt.height;
+		}
+		return 0;
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *sensor_rw = (struct sensor_reg_rw_s *)arg;
+
+		if (sensor_rw->reg_access_mode == SENSOR_READ_MODE) {
+			for (i = 0; i < cam_mod->custom.configs[0].reg_table_num_entries; i++) {
+				flag = cam_mod->custom.configs[0].reg_table[i].flag;
+				if (flag != PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT)
+					break;
+			}
+			if (flag == PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT) {
+				pltfrm_camera_module_pr_err(&cam_mod->sd,
+					"Can not get sensor reg type.\n");
+				return -EINVAL;
+			}
+			sensor_rw->reg_addr_len = PLTFRM_CAMERA_MODULE_REG_LEN(flag);
+			sensor_rw->reg_data_len = PLTFRM_CAMERA_MODULE_DATA_LEN(flag);
+			pltfrm_camera_module_read_reg_ex(&cam_mod->sd, 1, flag, sensor_rw->addr, &val);
+			sensor_rw->data = val;
+		} else {
+			flag = (sensor_rw->reg_addr_len << PLTFRM_CAMERA_MODULE_REG_LEN_BIT);
+			flag |= (sensor_rw->reg_data_len << PLTFRM_CAMERA_MODULE_DATA_LEN_BIT);
+			pltfrm_camera_module_write_reg_ex(&cam_mod->sd, flag, sensor_rw->addr, sensor_rw->data);
+		}
+		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_ITF_CFG) {
 		struct pltfrm_cam_itf *itf_cfg = (struct pltfrm_cam_itf *)arg;
 		struct imx_camera_module_config *config;
@@ -952,9 +1105,14 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 		pltfrm_camera_module_ioctl(sd, PLTFRM_CIFCAM_G_ITF_CFG, arg);
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
-		imx_camera_module_init(cam_mod, &cam_mod->custom);
-		pltfrm_camera_module_ioctl(sd, cmd, arg);
-		return imx_camera_module_attach(cam_mod);
+		ret = imx_camera_module_init(cam_mod, &cam_mod->custom);
+		if (!IS_ERR_VALUE(ret)) {
+			pltfrm_camera_module_ioctl(sd, cmd, arg);
+			return imx_camera_module_attach(cam_mod);
+		} else {
+			imx_camera_module_release(cam_mod);
+			return ret;
+		}
 	}
 
 	ret = pltfrm_camera_module_ioctl(sd, cmd, arg);
@@ -966,7 +1124,22 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
 int imx_camera_module_get_flip_mirror(
 	struct imx_camera_module *cam_mod)
 {
-	return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	int mode = 0;
+
+	if (!cam_mod->flip_flg)
+		return -1;
+
+	if (cam_mod->hflip)
+		mode |= IMX_MIRROR_BIT_MASK;
+	else
+		mode &= ~IMX_MIRROR_BIT_MASK;
+
+	if (cam_mod->vflip)
+		mode |= IMX_FLIP_BIT_MASK;
+	else
+		mode &= ~IMX_FLIP_BIT_MASK;
+
+	return mode;
 }
 
 /* ======================================================================== */
@@ -1065,9 +1238,13 @@ int imx_camera_module_init(struct imx_camera_module *cam_mod,
 	struct imx_camera_module_custom_config *custom)
 {
 	int ret = 0;
+	int mode = 0;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
+	cam_mod->hflip = false;
+	cam_mod->vflip = false;
+	cam_mod->flip_flg = false;
 	imx_camera_module_reset(cam_mod);
 
 	if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1095,6 +1272,12 @@ int imx_camera_module_init(struct imx_camera_module *cam_mod,
 		goto err;
 	}
 
+	mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	if (mode != -1) {
+		cam_mod->hflip = mode & IMX_MIRROR_BIT_MASK ? true : false;
+		cam_mod->vflip = mode & IMX_FLIP_BIT_MASK ? true : false;
+		cam_mod->flip_flg = true;
+	}
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
diff --git a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
index ffd135ab672f8..d0f691d8fddd0 100644
--- a/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/imx_camera_module.h
@@ -30,8 +30,8 @@
 #define imx_camera_module_csi_config
 #define imx_camera_module_reg pltfrm_camera_module_reg
 
-#define IMX_FLIP_BIT_MASK 0x2
-#define IMX_MIRROR_BIT_MASK 0x1
+#define IMX_FLIP_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
+#define IMX_MIRROR_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
 
 #define IMX_CAMERA_MODULE_CTRL_UPDT_GAIN 0x01
 #define IMX_CAMERA_MODULE_CTRL_UPDT_EXP_TIME 0x02
@@ -88,6 +88,8 @@ struct imx_camera_module_config {
 	struct imx_camera_module_timings timings;
 	bool soft_reset;
 	bool ignore_measurement_check;
+	u8 max_exp_gain_h;
+	u8 max_exp_gain_l;
 	struct pltfrm_cam_itf itf_cfg;
 };
 
@@ -153,14 +155,18 @@ struct imx_camera_module_custom_config {
 	int (*g_ctrl)(struct imx_camera_module *cam_mod, u32 ctrl_id);
 	int (*g_timings)(struct imx_camera_module *cam_mod,
 		struct imx_camera_module_timings *timings);
-	int (*g_exposure_valid_frame)(struct imx_camera_module *cam_mod);
+	int (*s_vts)(struct imx_camera_module *cam_mod,
+		u32 vts);
 	int (*s_ext_ctrls)(struct imx_camera_module *cam_mod,
 		struct imx_camera_module_ext_ctrls *ctrls);
-	int (*set_flip)(struct imx_camera_module *cam_mod);
+	int (*set_flip)(struct imx_camera_module *cam_mod,
+		struct pltfrm_camera_module_reg reglist[],
+		int len);
 	int (*init_common)(struct imx_camera_module *cam_mod);
 	struct imx_camera_module_config *configs;
 	u32 num_configs;
 	u32 power_up_delays_ms[3];
+	unsigned short exposure_valid_frame[2];
 	void *priv;
 };
 
@@ -192,9 +198,11 @@ struct imx_camera_module {
 	bool frm_intrvl_valid;
 	bool hflip;
 	bool vflip;
+	bool flip_flg;
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
+	struct mutex lock;
 };
 
 #define imx_camera_module_pr_info(cam_mod, fmt, arg...) \
@@ -239,6 +247,10 @@ int imx_camera_module_s_frame_interval(
 	struct v4l2_subdev *sd,
 	struct v4l2_subdev_frame_interval *interval);
 
+int imx_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval);
+
 int imx_camera_module_s_stream(
 	struct v4l2_subdev *sd,
 	int enable);
diff --git a/drivers/media/i2c/soc_camera/rockchip/nt99230_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/nt99230_v4l2-i2c-subdev.c
index a8d9200f97fd6..cb88fb06c6f51 100644
--- a/drivers/media/i2c/soc_camera/rockchip/nt99230_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/nt99230_v4l2-i2c-subdev.c
@@ -570,6 +570,8 @@ static struct ov_camera_module_config NT99230_configs[] = {
 			sizeof(NT99230_init_tab_1920_1080_30fps_raw) /
 			sizeof(NT99230_init_tab_1920_1080_30fps_raw[0]),
 		.v_blanking_time_us = 4052,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		.ignore_measurement_check = 1,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 450, 24000000)
 	}
@@ -650,6 +652,7 @@ static int NT99230_write_aec(struct ov_camera_module *cam_mod)
 		u32 a_gain = cam_mod->exp_config.gain;
 		u32 exp_time = cam_mod->exp_config.exp_time;
 
+		mutex_lock(&cam_mod->lock);
 		if (!IS_ERR_VALUE(ret) && cam_mod->auto_adjust_fps)
 			ret = NT99230_auto_adjust_fps(cam_mod, cam_mod->exp_config.exp_time);
 
@@ -659,6 +662,7 @@ static int NT99230_write_aec(struct ov_camera_module *cam_mod)
 
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod, NT99230_AEC_UPDATE_ADDRESS, NT99230_AEC_UPDATE_DATA);
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -866,14 +870,8 @@ static int NT99230_s_ext_ctrls(struct ov_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = NT99230_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if (ctrls->count == 2 &&
-				((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-				ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-				(ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-				ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = NT99230_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -897,7 +895,9 @@ static int NT99230_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x3021, 0x02);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 	msleep(25);
@@ -916,7 +916,9 @@ static int NT99230_stop_streaming(struct ov_camera_module *cam_mod)
 
 	ov_camera_module_pr_info(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x3021, 0x00);;
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -976,6 +978,7 @@ static struct v4l2_subdev_core_ops NT99230_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops NT99230_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -1003,7 +1006,13 @@ static struct ov_camera_module_custom_config NT99230_custom_config = {
 	.check_camera_id = NT99230_check_camera_id,
 	.configs = NT99230_configs,
 	.num_configs = sizeof(NT99230_configs) / sizeof(NT99230_configs[0]),
-	.power_up_delays_ms = {5, 30, 0}
+	.power_up_delays_ms = {5, 30, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int NT99230_probe(
@@ -1025,6 +1034,7 @@ static int NT99230_probe(
 
 	tmp_NT99230->custom = NT99230_custom_config;
 	num_cameras++;
+	mutex_init(&tmp_NT99230->lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -1041,6 +1051,7 @@ static int NT99230_remove(
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
index a16a520fd9931..7394ef3ce80ad 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov13850_v4l2-i2c-subdev.c
@@ -1308,6 +1308,8 @@ static struct ov_camera_module_config ov13850_configs[] = {
 			sizeof(ov13850_regs_2112_1568_30fps_twolane_r2a) /
 			sizeof(ov13850_regs_2112_1568_30fps_twolane_r2a[0]),
 		.v_blanking_time_us = 5000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 600, ov13850_EXT_CLK)
 	},
 
@@ -1332,6 +1334,8 @@ static struct ov_camera_module_config ov13850_configs[] = {
 			sizeof(ov13850_regs_4224_3136_7fps_twolane_r2a) /
 			sizeof(ov13850_regs_4224_3136_7fps_twolane_r2a[0]),
 		.v_blanking_time_us = 5000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 600, ov13850_EXT_CLK)
 	}
 };
@@ -1358,6 +1362,8 @@ static struct ov_camera_module_config ov13850_onelane_configs[] = {
 			sizeof(ov13850_init_tab_2112_1568_15fps) /
 			sizeof(ov13850_init_tab_2112_1568_15fps[0]),
 		.v_blanking_time_us = 5000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 1, 640, ov13850_EXT_CLK)
 	}
 };
@@ -1394,11 +1400,9 @@ static int ov13850_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time +
-	ov13850_COARSE_INTG_TIME_MAX_MARGIN)
-	> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			ov13850_COARSE_INTG_TIME_MAX_MARGIN;
+	if ((exp_time + ov13850_COARSE_INTG_TIME_MAX_MARGIN)
+		> cam_mod->vts_min)
+		vts = exp_time + ov13850_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 	ret = ov_camera_module_write_reg(cam_mod,
@@ -1407,13 +1411,15 @@ static int ov13850_auto_adjust_fps(struct ov_camera_module *cam_mod,
 		ov13850_TIMING_VTS_HIGH_REG,
 		(vts >> 8) & 0xFF);
 
-	if (IS_ERR_VALUE(ret))
+	if (IS_ERR_VALUE(ret)) {
 		ov_camera_module_pr_err(cam_mod,
 			"failed with error (%d)\n", ret);
-	else
-		ov_camera_module_pr_debug(cam_mod,
+	} else {
+		ov_camera_module_pr_info(cam_mod,
 			"updated vts = %d,vts_min=%d\n",
 			vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
 
 	return ret;
 }
@@ -1468,6 +1474,7 @@ static int ov13850_write_aec(struct ov_camera_module *cam_mod)
 
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 
+		mutex_lock(&cam_mod->lock);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov13850_AEC_GROUP_UPDATE_ADDRESS,
@@ -1500,6 +1507,7 @@ static int ov13850_write_aec(struct ov_camera_module *cam_mod)
 				ov13850_AEC_GROUP_UPDATE_ADDRESS,
 				ov13850_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -1648,23 +1656,28 @@ static int ov13850_g_timings(struct ov_camera_module *cam_mod,
 	struct ov_camera_module_timings *timings)
 {
 	int ret = 0;
+	unsigned int vts;
 
 	if (IS_ERR_OR_NULL(cam_mod->active_config))
 		goto err;
 
 	*timings = cam_mod->active_config->timings;
 
+	vts = (!cam_mod->vts_cur) ?
+		timings->frame_length_lines :
+		cam_mod->vts_cur;
 	if (cam_mod->frm_intrvl_valid)
 		timings->vt_pix_clk_freq_hz =
 			cam_mod->frm_intrvl.interval.denominator
-			* timings->frame_length_lines
+			* vts
 			* timings->line_length_pck;
 	else
 		timings->vt_pix_clk_freq_hz =
 			cam_mod->active_config->frm_intrvl.interval.denominator
-			* timings->frame_length_lines
+			* vts
 			* timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
@@ -1771,13 +1784,8 @@ static int ov13850_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	int ret = 0;
 
 	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov13850_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov13850_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -1801,7 +1809,10 @@ static int ov13850_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
-	if (IS_ERR_VALUE(ov_camera_module_write_reg(cam_mod, 0x0100, 1)))
+	mutex_lock(&cam_mod->lock);
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 1);
+	mutex_unlock(&cam_mod->lock);
+	if (IS_ERR_VALUE(ret))
 		goto err;
 
 	msleep(25);
@@ -1821,7 +1832,9 @@ static int ov13850_stop_streaming(struct ov_camera_module *cam_mod)
 
 	ov_camera_module_pr_debug(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -1881,6 +1894,7 @@ static struct v4l2_subdev_core_ops ov13850_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov13850_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -1904,6 +1918,7 @@ static struct ov_camera_module_custom_config ov13850_custom_config = {
 	.g_ctrl = ov13850_g_ctrl,
 	.g_timings = ov13850_g_timings,
 	.check_camera_id = ov13850_check_camera_id,
+	.s_vts = ov13850_auto_adjust_fps,
 	.set_flip = ov13850_set_flip,
 #ifdef OV13850_ONE_LANE
 	.configs = ov13850_onelane_configs,
@@ -1913,7 +1928,13 @@ static struct ov_camera_module_custom_config ov13850_custom_config = {
 	.configs = ov13850_configs,
 	.num_configs = ARRAY_SIZE(ov13850_configs),
 #endif
-	.power_up_delays_ms = {5, 20, 0}
+	.power_up_delays_ms = {5, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov13850_probe(struct i2c_client *client,
@@ -1923,9 +1944,10 @@ static int ov13850_probe(struct i2c_client *client,
 
 	ov13850_filltimings(&ov13850_custom_config);
 	v4l2_i2c_subdev_init(&ov13850.sd, client, &ov13850_camera_module_ops);
-
+	ov13850.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov13850.custom = ov13850_custom_config;
 
+	mutex_init(&ov13850.lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -1939,6 +1961,7 @@ static int ov13850_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
index 3a1b7878885ac..0b600a95b4c73 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov2710_v4l2-i2c-subdev.c
@@ -236,6 +236,8 @@ static struct ov_camera_module_config ov2710_configs[] = {
 			sizeof(ov2710_init_tab_1920_1080_30fps) /
 			sizeof(ov2710_init_tab_1920_1080_30fps[0]),
 		.v_blanking_time_us = 3078,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		.ignore_measurement_check = 1,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 1, 800, 24000000)
 	}
@@ -325,18 +327,12 @@ static int OV2710_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time + OV2710_COARSE_INTG_TIME_MAX_MARGIN)
+	if ((exp_time + OV2710_COARSE_INTG_TIME_MAX_MARGIN)
 		> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			OV2710_COARSE_INTG_TIME_MAX_MARGIN;
+		vts = exp_time + OV2710_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 
-	/*
-	 * if (cam_mod->fps_ctrl > 0 && cam_mod->fps_ctrl < 100)
-	 * vts = vts * 100 / cam_mod->fps_ctrl;
-	 */
-
 	if (vts > 0xfff)
 		vts = 0xfff;
 	else
@@ -349,13 +345,15 @@ static int OV2710_auto_adjust_fps(struct ov_camera_module *cam_mod,
 		OV2710_TIMING_VTS_HIGH_REG,
 		(vts >> 8) & 0x0F);
 
-	if (IS_ERR_VALUE(ret))
+	if (IS_ERR_VALUE(ret)) {
 		ov_camera_module_pr_err(cam_mod,
 				"failed with error (%d)\n", ret);
-	else
-		ov_camera_module_pr_debug(cam_mod,
+	} else {
+		ov_camera_module_pr_info(cam_mod,
 			"updated vts = 0x%x,vts_min=0x%x\n",
 			vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
 
 	return ret;
 }
@@ -409,6 +407,7 @@ static int ov2710_write_aec(struct ov_camera_module *cam_mod)
 
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 
+		mutex_lock(&cam_mod->lock);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod,
 				OV2710_AEC_GROUP_UPDATE_ADDRESS,
@@ -441,6 +440,7 @@ static int ov2710_write_aec(struct ov_camera_module *cam_mod)
 				OV2710_AEC_GROUP_UPDATE_ADDRESS,
 				OV2710_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -657,6 +657,7 @@ static int ov2710_g_timings(struct ov_camera_module *cam_mod,
 		cam_mod->active_config->frm_intrvl.interval.denominator *
 		vts * timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod,
@@ -709,14 +710,8 @@ static int ov2710_s_ext_ctrls(struct ov_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov2710_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		(ctrls->ctrls[0].id == V4L2_CID_GAIN ||
-		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
-		ctrls->ctrls[1].id == V4L2_CID_GAIN ||
-		ctrls->ctrls[1].id == V4L2_CID_EXPOSURE))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov2710_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -741,9 +736,12 @@ static int ov2710_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 	ov_camera_module_pr_debug(cam_mod, "=====streaming on ===\n");
+
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x3008, 0x02);
 	ret |= ov_camera_module_write_reg(cam_mod, 0x4201, 0x00);
 	ret |= ov_camera_module_write_reg(cam_mod, 0x4202, 0x00);
+	mutex_unlock(&cam_mod->lock);
 
 	if (IS_ERR_VALUE(ret))
 		goto err;
@@ -762,9 +760,11 @@ static int ov2710_stop_streaming(struct ov_camera_module *cam_mod)
 	int ret = 0;
 
 	ov_camera_module_pr_debug(cam_mod, "\n");
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x3008, 0x42);
 	ret |= ov_camera_module_write_reg(cam_mod, 0x4201, 0x00);
 	ret |= ov_camera_module_write_reg(cam_mod, 0x4202, 0x0f);
+	mutex_unlock(&cam_mod->lock);
 
 	if (IS_ERR_VALUE(ret))
 		goto err;
@@ -848,6 +848,7 @@ static struct v4l2_subdev_core_ops ov2710_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov2710_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -874,9 +875,16 @@ static struct ov_camera_module_custom_config ov2710_custom_config = {
 	.g_timings = ov2710_g_timings,
 	.set_flip = ov2710_set_flip,
 	.check_camera_id = ov2710_check_camera_id,
+	.s_vts = OV2710_auto_adjust_fps,
 	.configs = ov2710_configs,
 	.num_configs = ARRAY_SIZE(ov2710_configs),
-	.power_up_delays_ms = {5, 30, 30}
+	.power_up_delays_ms = {5, 30, 30},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 2}
 };
 
 static int ov2710_probe(
@@ -889,8 +897,10 @@ static int ov2710_probe(
 	v4l2_i2c_subdev_init(&ov2710.sd, client,
 				&ov2710_camera_module_ops);
 
+	ov2710.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov2710.custom = ov2710_custom_config;
 
+	mutex_init(&ov2710.lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -907,6 +917,7 @@ static int ov2710_remove(
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
index 12c554e6fb6ab..f327446ccd45e 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov4689_v4l2-i2c-subdev.c
@@ -365,6 +365,8 @@ static struct ov_camera_module_config ov4689_configs[] = {
 			sizeof(ov4689_init_tab_2688_1520_30fps) /
 			sizeof(ov4689_init_tab_2688_1520_30fps[0]),
 		.v_blanking_time_us = 5000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 999, ov4689_EXT_CLK)
 	}
 };
@@ -402,11 +404,9 @@ static int ov4689_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time +
-	ov4689_COARSE_INTG_TIME_MAX_MARGIN)
-	> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			ov4689_COARSE_INTG_TIME_MAX_MARGIN;
+	if ((exp_time + ov4689_COARSE_INTG_TIME_MAX_MARGIN)
+		> cam_mod->vts_min)
+		vts = exp_time + ov4689_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 	ret = ov_camera_module_write_reg(cam_mod,
@@ -415,13 +415,15 @@ static int ov4689_auto_adjust_fps(struct ov_camera_module *cam_mod,
 		ov4689_TIMING_VTS_HIGH_REG,
 		(vts >> 8) & 0xFF);
 
-	if (IS_ERR_VALUE(ret))
+	if (IS_ERR_VALUE(ret)) {
 		ov_camera_module_pr_err(cam_mod,
 			"failed with error (%d)\n", ret);
-	else
-		ov_camera_module_pr_debug(cam_mod,
+	} else {
+		ov_camera_module_pr_info(cam_mod,
 			"updated vts = %d,vts_min=%d\n",
 			vts, cam_mod->vts_min);
+		cam_mod->vts_cur = vts;
+	}
 
 	return ret;
 }
@@ -474,6 +476,7 @@ static int ov4689_write_aec(struct ov_camera_module *cam_mod)
 
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 
+		mutex_lock(&cam_mod->lock);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod,
 			ov4689_AEC_GROUP_UPDATE_ADDRESS,
@@ -506,6 +509,7 @@ static int ov4689_write_aec(struct ov_camera_module *cam_mod)
 				ov4689_AEC_GROUP_UPDATE_ADDRESS,
 				ov4689_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -654,23 +658,28 @@ static int ov4689_g_timings(struct ov_camera_module *cam_mod,
 	struct ov_camera_module_timings *timings)
 {
 	int ret = 0;
+	unsigned int vts;
 
 	if (IS_ERR_OR_NULL(cam_mod->active_config))
 		goto err;
 
 	*timings = cam_mod->active_config->timings;
 
+	vts = (!cam_mod->vts_cur) ?
+		timings->frame_length_lines :
+		cam_mod->vts_cur;
 	if (cam_mod->frm_intrvl_valid)
 		timings->vt_pix_clk_freq_hz =
 			cam_mod->frm_intrvl.interval.denominator
-			* timings->frame_length_lines
+			* vts
 			* timings->line_length_pck;
 	else
 		timings->vt_pix_clk_freq_hz =
 			cam_mod->active_config->frm_intrvl.interval.denominator
-			* timings->frame_length_lines
+			* vts
 			* timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod, "failed with error (%d)\n", ret);
@@ -777,14 +786,8 @@ static int ov4689_s_ext_ctrls(struct ov_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov4689_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov4689_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -808,7 +811,10 @@ static int ov4689_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
-	if (IS_ERR_VALUE(ov_camera_module_write_reg(cam_mod, 0x0100, 1)))
+	mutex_lock(&cam_mod->lock);
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 1);
+	mutex_unlock(&cam_mod->lock);
+	if (IS_ERR_VALUE(ret))
 		goto err;
 
 	msleep(25);
@@ -828,7 +834,9 @@ static int ov4689_stop_streaming(struct ov_camera_module *cam_mod)
 
 	ov_camera_module_pr_debug(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -888,6 +896,7 @@ static struct v4l2_subdev_core_ops ov4689_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov4689_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -912,9 +921,16 @@ static struct ov_camera_module_custom_config ov4689_custom_config = {
 	.g_timings = ov4689_g_timings,
 	.check_camera_id = ov4689_check_camera_id,
 	.set_flip = ov4689_set_flip,
+	.s_vts = ov4689_auto_adjust_fps,
 	.configs = ov4689_configs,
 	.num_configs = ARRAY_SIZE(ov4689_configs),
-	.power_up_delays_ms = {5, 20, 0}
+	.power_up_delays_ms = {5, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov4689_probe(
@@ -925,9 +941,10 @@ static int ov4689_probe(
 
 	ov4689_filltimings(&ov4689_custom_config);
 	v4l2_i2c_subdev_init(&ov4689.sd, client, &ov4689_camera_module_ops);
-
+	ov4689.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov4689.custom = ov4689_custom_config;
 
+	mutex_init(&ov4689.lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -941,6 +958,7 @@ static int ov4689_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
index a3b0a12a7a1b3..b4559fe4f198a 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov7675_v4l2-i2c-subdev.c
@@ -285,6 +285,8 @@ static struct ov_camera_module_config ov7675_configs[] = {
 			sizeof(ov7675_init_tab_640_480_30fps) /
 			sizeof(ov7675_init_tab_640_480_30fps[0]),
 		.v_blanking_time_us = 1000,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_DVP_CFG(
 			PLTFRM_CAM_ITF_BT601_8,
 			PLTFRM_CAM_SIGNAL_HIGH_LEVEL,
@@ -371,14 +373,8 @@ static int ov7675_s_ext_ctrls(struct ov_camera_module *cam_mod,
 
 	ov_camera_module_pr_info(cam_mod, "\n");
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov7675_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov7675_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -483,6 +479,7 @@ static struct v4l2_subdev_core_ops ov7675_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov7675_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -509,7 +506,13 @@ static struct ov_camera_module_custom_config ov7675_custom_config = {
 	.set_flip = ov7675_set_flip,
 	.configs = ov7675_configs,
 	.num_configs = ARRAY_SIZE(ov7675_configs),
-	.power_up_delays_ms = {20, 20, 0}
+	.power_up_delays_ms = {20, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov7675_probe(
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
index 190df0f1792ac..6d396bbf3efea 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov7750_v4l2-i2c-subdev.c
@@ -334,6 +334,8 @@ static struct ov_camera_module_config ov7750_configs[] = {
 		.reg_diff_table = NULL,
 		.reg_diff_table_num_entries = 0,
 		.v_blanking_time_us = 7251,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 1, 800, 24000000)
 	}
 };
@@ -373,10 +375,9 @@ static int ov7750_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time + ov7750_COARSE_INTG_TIME_MAX_MARGIN)
+	if ((exp_time + ov7750_COARSE_INTG_TIME_MAX_MARGIN)
 		> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			ov7750_COARSE_INTG_TIME_MAX_MARGIN;
+		vts = exp_time + ov7750_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 	ret = ov_camera_module_write_reg(cam_mod,
@@ -390,7 +391,7 @@ static int ov7750_auto_adjust_fps(struct ov_camera_module *cam_mod,
 		ov_camera_module_pr_err(cam_mod,
 			"failed with error (%d)\n", ret);
 	} else {
-		ov_camera_module_pr_debug(cam_mod,
+		ov_camera_module_pr_info(cam_mod,
 			"updated vts = %d,vts_min=%d\n", vts, cam_mod->vts_min);
 		cam_mod->vts_cur = vts;
 	}
@@ -448,6 +449,8 @@ static int ov7750_write_aec(struct ov_camera_module *cam_mod)
 		a_gain = a_gain > 0x7ff ? 0x7ff : a_gain;
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 		exp_time = cam_mod->exp_config.exp_time << 4;
+
+		mutex_lock(&cam_mod->lock);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod,
 				ov7750_AEC_GROUP_UPDATE_ADDRESS,
@@ -480,6 +483,7 @@ static int ov7750_write_aec(struct ov_camera_module *cam_mod)
 				ov7750_AEC_GROUP_UPDATE_ADDRESS,
 				ov7750_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -698,6 +702,7 @@ static int ov7750_g_timings(struct ov_camera_module *cam_mod,
 		cam_mod->active_config->frm_intrvl.interval.denominator *
 		vts * timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod,
@@ -735,14 +740,8 @@ static int ov7750_s_ext_ctrls(struct ov_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov7750_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov7750_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -828,7 +827,10 @@ static int ov7750_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
-	if (IS_ERR_VALUE(ov_camera_module_write_reg(cam_mod, 0x0100, 1)))
+	mutex_lock(&cam_mod->lock);
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 1);
+	mutex_unlock(&cam_mod->lock);
+	if (IS_ERR_VALUE(ret))
 		goto err;
 
 	msleep(25);
@@ -846,7 +848,9 @@ static int ov7750_stop_streaming(struct ov_camera_module *cam_mod)
 
 	ov_camera_module_pr_debug(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -905,6 +909,7 @@ static struct v4l2_subdev_core_ops ov7750_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov7750_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -928,10 +933,17 @@ static struct ov_camera_module_custom_config ov7750_custom_config = {
 	.g_ctrl = ov7750_g_ctrl,
 	.g_timings = ov7750_g_timings,
 	.check_camera_id = ov7750_check_camera_id,
+	.s_vts = ov7750_auto_adjust_fps,
 	.set_flip = ov7750_set_flip,
 	.configs = ov7750_configs,
 	.num_configs = ARRAY_SIZE(ov7750_configs),
-	.power_up_delays_ms = {5, 20, 0}
+	.power_up_delays_ms = {5, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov7750_probe(
@@ -942,9 +954,10 @@ static int ov7750_probe(
 
 	ov7750_filltimings(&ov7750_custom_config);
 	v4l2_i2c_subdev_init(&ov7750.sd, client, &ov7750_camera_module_ops);
-
+	ov7750.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov7750.custom = ov7750_custom_config;
 
+	mutex_init(&ov7750.lock);
 	dev_info(&client->dev, "probing successful\n");
 	return 0;
 }
@@ -958,6 +971,7 @@ static int ov7750_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
index 60bd0ea5e2f29..51680bd7f55c0 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov8858_v4l2-i2c-subdev.c
@@ -1122,6 +1122,8 @@ static struct ov_camera_module_config ov8858_configs[] = {
 		.reg_diff_table = NULL,
 		.reg_diff_table_num_entries = 0,
 		.v_blanking_time_us = 7251,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 4, 481, 24000000)
 	}
 };
@@ -1148,6 +1150,8 @@ static struct ov_camera_module_config ov8858_configs_R1A[] = {
 			sizeof(ov8858_init_tab_1632_1224_30fps_R1A) /
 			sizeof(ov8858_init_tab_1632_1224_30fps_R1A[0]),
 		.v_blanking_time_us = 6579,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 720, 24000000)
 	},
 	{
@@ -1171,6 +1175,8 @@ static struct ov_camera_module_config ov8858_configs_R1A[] = {
 			sizeof(ov8858_init_tab_3264_2448_15fps_R1A) /
 			sizeof(ov8858_init_tab_3264_2448_15fps_R1A[0]),
 		.v_blanking_time_us = 6579,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 720, 24000000)
 	}
 };
@@ -1214,10 +1220,9 @@ static int ov8858_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time + ov8858_COARSE_INTG_TIME_MAX_MARGIN)
+	if ((exp_time + ov8858_COARSE_INTG_TIME_MAX_MARGIN)
 		> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			ov8858_COARSE_INTG_TIME_MAX_MARGIN;
+		vts = exp_time + ov8858_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 	ret = ov_camera_module_write_reg(cam_mod,
@@ -1231,7 +1236,7 @@ static int ov8858_auto_adjust_fps(struct ov_camera_module *cam_mod,
 		ov_camera_module_pr_err(cam_mod,
 			"failed with error (%d)\n", ret);
 	} else {
-		ov_camera_module_pr_debug(cam_mod,
+		ov_camera_module_pr_info(cam_mod,
 			"updated vts = %d,vts_min=%d\n", vts, cam_mod->vts_min);
 		cam_mod->vts_cur = vts;
 	}
@@ -1290,6 +1295,8 @@ static int ov8858_write_aec(struct ov_camera_module *cam_mod)
 		a_gain = a_gain > 0x7ff ? 0x7ff : a_gain;
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 		exp_time = cam_mod->exp_config.exp_time << 4;
+
+		mutex_lock(&cam_mod->lock);
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING)
 			ret = ov_camera_module_write_reg(cam_mod,
 			ov8858_AEC_GROUP_UPDATE_ADDRESS,
@@ -1322,6 +1329,7 @@ static int ov8858_write_aec(struct ov_camera_module *cam_mod)
 				ov8858_AEC_GROUP_UPDATE_ADDRESS,
 				ov8858_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -1543,6 +1551,8 @@ static int ov8858_g_timings(struct ov_camera_module *cam_mod,
 		cam_mod->active_config->frm_intrvl.interval.denominator *
 		vts * timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
+
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod,
@@ -1584,14 +1594,8 @@ static int ov8858_s_ext_ctrls(struct ov_camera_module *cam_mod,
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov8858_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 ((ctrls->ctrls[0].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[1].id == V4L2_CID_EXPOSURE) ||
-		  (ctrls->ctrls[1].id == V4L2_CID_GAIN &&
-		   ctrls->ctrls[0].id == V4L2_CID_EXPOSURE)))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov8858_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -1685,7 +1689,10 @@ static int ov8858_start_streaming(struct ov_camera_module *cam_mod)
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
-	if (IS_ERR_VALUE(ov_camera_module_write_reg(cam_mod, 0x0100, 1)))
+	mutex_lock(&cam_mod->lock);
+	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 1);
+	mutex_unlock(&cam_mod->lock);
+	if (IS_ERR_VALUE(ret))
 		goto err;
 
 	msleep(25);
@@ -1705,7 +1712,9 @@ static int ov8858_stop_streaming(struct ov_camera_module *cam_mod)
 
 	ov_camera_module_pr_debug(cam_mod, "\n");
 
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -2095,11 +2104,6 @@ static int ov8858_check_camera_id(struct ov_camera_module *cam_mod)
 	return ret;
 }
 
-static int ov8858_g_exposure_valid_frame(struct ov_camera_module *cam_mod)
-{
-	return ov8858_EXP_VALID_FRAMES;
-}
-
 /* ======================================================================== */
 /* This part is platform dependent */
 /* ======================================================================== */
@@ -2114,6 +2118,7 @@ static struct v4l2_subdev_core_ops ov8858_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov8858_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -2137,11 +2142,17 @@ static struct ov_camera_module_custom_config ov8858_custom_config = {
 	.g_ctrl = ov8858_g_ctrl,
 	.g_timings = ov8858_g_timings,
 	.check_camera_id = ov8858_check_camera_id,
-	.g_exposure_valid_frame = ov8858_g_exposure_valid_frame,
+	.s_vts = ov8858_auto_adjust_fps,
 	.read_otp = ov8858_otp_read,
 	.configs = ov8858_configs,
 	.num_configs = ARRAY_SIZE(ov8858_configs),
-	.power_up_delays_ms = {5, 20, 0}
+	.power_up_delays_ms = {5, 20, 0},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov8858_probe(
@@ -2151,8 +2162,10 @@ static int ov8858_probe(
 	dev_info(&client->dev, "probing...\n");
 	ov8858_filltimings(&ov8858_custom_config);
 	v4l2_i2c_subdev_init(&ov8858.sd, client, &ov8858_camera_module_ops);
+	ov8858.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov8858.custom = ov8858_custom_config;
 
+	mutex_init(&ov8858.lock);
 	dev_info(&client->dev, "probing successful\n");
 
 	return 0;
@@ -2167,6 +2180,7 @@ static int ov8858_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;	/* our client isn't attached */
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	kfree(otp_ptr);
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
index f58c0a84b78c8..b29bf6c314bc8 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.c
@@ -45,8 +45,6 @@ static void ov_camera_module_reset(
 	cam_mod->exp_config.auto_exp = false;
 	cam_mod->exp_config.auto_gain = false;
 	cam_mod->wb_config.auto_wb = false;
-	cam_mod->hflip = false;
-	cam_mod->vflip = false;
 	cam_mod->auto_adjust_fps = true;
 	cam_mod->rotation = 0;
 	cam_mod->ctrl_updt = 0;
@@ -304,6 +302,10 @@ int ov_camera_module_s_fmt(struct v4l2_subdev *sd,
 		ov_camera_module_set_active_config(cam_mod,
 			ov_camera_module_find_config(cam_mod,
 				fmt, &cam_mod->frm_intrvl));
+	} else {
+		ov_camera_module_set_active_config(cam_mod,
+			ov_camera_module_find_config(cam_mod,
+				fmt, NULL));
 	}
 	return 0;
 err:
@@ -344,6 +346,8 @@ int ov_camera_module_s_frame_interval(
 	struct ov_camera_module *cam_mod = to_ov_camera_module(sd);
 	unsigned long gcdiv;
 	struct v4l2_subdev_frame_interval norm_interval;
+	struct ov_camera_module_config *config;
+	unsigned int vts;
 	int ret = 0;
 
 	if ((interval->interval.denominator == 0) ||
@@ -370,22 +374,62 @@ int ov_camera_module_s_frame_interval(
 	norm_interval.interval.denominator =
 		interval->interval.denominator / gcdiv;
 
-	if (IS_ERR_OR_NULL(ov_camera_module_find_config(cam_mod,
-			NULL, &norm_interval))) {
-		pltfrm_camera_module_pr_err(&cam_mod->sd,
-			"frame interval %d/%d not supported\n",
-			interval->interval.numerator,
-			interval->interval.denominator);
-		ret = -EINVAL;
-		goto err;
+	if (!cam_mod->frm_fmt_valid)
+		goto end;
+	config = ov_camera_module_find_config(
+			cam_mod,
+			&cam_mod->active_config->frm_fmt,
+			&norm_interval);
+
+	if (!IS_ERR_OR_NULL(config) && (config != cam_mod->active_config)) {
+		ov_camera_module_set_active_config(cam_mod, config);
+		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
+			cam_mod->custom.stop_streaming(cam_mod);
+			ov_camera_module_write_config(cam_mod);
+			cam_mod->custom.start_streaming(cam_mod);
+		}
+	} else {
+		if (IS_ERR_OR_NULL(cam_mod->active_config)) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"no active sensor configuration");
+			ret = -EFAULT;
+			goto err;
+		}
+		if (cam_mod->active_config->frm_intrvl.interval.denominator <
+			norm_interval.interval.denominator) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"%dx%d@%dfps isn't support!",
+				cam_mod->active_config->frm_fmt.width,
+				cam_mod->active_config->frm_fmt.height,
+				norm_interval.interval.denominator);
+			ret = -EFAULT;
+			goto err;
+		}
+		if (!cam_mod->custom.s_vts) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"custom.s_vts isn't support!");
+			ret = -EFAULT;
+			goto err;
+		}
+
+		vts = cam_mod->active_config->timings.frame_length_lines;
+		vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+		vts /= norm_interval.interval.denominator;
+		cam_mod->vts_cur = vts;
+
+		if (cam_mod->state != OV_CAMERA_MODULE_STREAMING)
+			goto end;
+
+		cam_mod->custom.s_vts(cam_mod, vts);
 	}
+
+end:
 	cam_mod->frm_intrvl_valid = true;
 	cam_mod->frm_intrvl = norm_interval;
-	if (cam_mod->frm_fmt_valid) {
-		ov_camera_module_set_active_config(cam_mod,
-			ov_camera_module_find_config(cam_mod,
-				&cam_mod->frm_fmt, interval));
-	}
+	cam_mod->auto_adjust_fps = false;
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
@@ -393,12 +437,34 @@ int ov_camera_module_s_frame_interval(
 	return ret;
 }
 
+int ov_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval)
+{
+	struct ov_camera_module *cam_mod = to_ov_camera_module(sd);
+
+	if (cam_mod->active_config) {
+		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
+			if (cam_mod->frm_intrvl_valid) {
+				*interval = cam_mod->frm_intrvl;
+				return 0;
+			} else {
+				*interval = cam_mod->active_config->frm_intrvl;
+				return 0;
+			}
+		}
+	}
+
+	return -EFAULT;
+}
+
 /* ======================================================================== */
 
 int ov_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 {
 	int ret = 0;
 	struct ov_camera_module *cam_mod =  to_ov_camera_module(sd);
+	unsigned int vts;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "%d\n", enable);
 
@@ -427,6 +493,29 @@ int ov_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		ret = cam_mod->custom.start_streaming(cam_mod);
 		if (IS_ERR_VALUE(ret))
 			goto err;
+
+		if (cam_mod->frm_intrvl_valid) {
+			if ((cam_mod->frm_intrvl.interval.numerator !=
+				cam_mod->active_config->frm_intrvl.interval.numerator) ||
+				(cam_mod->frm_intrvl.interval.denominator !=
+				cam_mod->active_config->frm_intrvl.interval.denominator)) {
+				if (cam_mod->frm_intrvl.interval.denominator >
+					cam_mod->active_config->frm_intrvl.interval.denominator) {
+					pltfrm_camera_module_pr_warn(&cam_mod->sd,
+						"sensor is not support stream: %dx%d@(%d/%d)fps!\n",
+						cam_mod->active_config->frm_fmt.width,
+						cam_mod->active_config->frm_fmt.height,
+						cam_mod->frm_intrvl.interval.denominator,
+						cam_mod->frm_intrvl.interval.numerator);
+					goto end;
+				}
+				vts = cam_mod->active_config->timings.frame_length_lines;
+				vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+				vts /= cam_mod->frm_intrvl.interval.denominator;
+				cam_mod->custom.s_vts(cam_mod, vts);
+			}
+		}
+
 		if (!cam_mod->inited && cam_mod->update_config)
 			cam_mod->inited = true;
 		cam_mod->update_config = false;
@@ -471,6 +560,7 @@ int ov_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		msleep(wait_ms + 1);
 	}
 
+end:
 	cam_mod->state_before_suspend = cam_mod->state;
 
 	return 0;
@@ -582,6 +672,22 @@ int ov_camera_module_g_ctrl(struct v4l2_subdev *sd,
 		return 0;
 	}
 
+	if (ctrl->id == V4L2_CID_HFLIP) {
+		ctrl->value = cam_mod->hflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_HFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
+	if (ctrl->id == V4L2_CID_VFLIP) {
+		ctrl->value = cam_mod->vflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_VFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
 	if (IS_ERR_OR_NULL(cam_mod->active_config)) {
 		pltfrm_camera_module_pr_err(&cam_mod->sd,
 			"no active configuration\n");
@@ -668,10 +774,6 @@ int ov_camera_module_g_ctrl(struct v4l2_subdev *sd,
 			"V4L2_CID_FOCUS_ABSOLUTE %d\n",
 			ctrl->value);
 		break;
-	case V4L2_CID_HFLIP:
-	case V4L2_CID_VFLIP:
-		/* TBD */
-		/* fallthrough */
 	default:
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
 			"failed, unknown ctrl %d\n", ctrl->id);
@@ -811,12 +913,14 @@ int ov_camera_module_s_ext_ctrls(
 				cam_mod->hflip = true;
 			else
 				cam_mod->hflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		case V4L2_CID_VFLIP:
 			if (ctrl->value)
 				cam_mod->vflip = true;
 			else
 				cam_mod->vflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		default:
 			pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -894,7 +998,8 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
 	void *arg)
 {
 	struct ov_camera_module *cam_mod =  to_ov_camera_module(sd);
-	int ret;
+	int ret, i;
+	unsigned int flag, val;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "cmd: 0x%x\n", cmd);
 
@@ -935,9 +1040,10 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
 		timings->fine_integration_time_min =
 			ov_timings.fine_integration_time_min;
 
-		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame[0] =
-				cam_mod->custom.g_exposure_valid_frame(cam_mod);
+		timings->exposure_valid_frame[0] =
+			cam_mod->custom.exposure_valid_frame[0];
+		timings->exposure_valid_frame[1] =
+			cam_mod->custom.exposure_valid_frame[1];
 		if (cam_mod->exp_config.exp_time)
 			timings->exp_time = cam_mod->exp_config.exp_time;
 		else
@@ -946,7 +1052,52 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
 			timings->gain = cam_mod->exp_config.gain;
 		else
 			timings->gain = ov_timings.gain;
+
+		if (cam_mod->active_config) {
+			timings->max_exp_gain_h = cam_mod->active_config->max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->active_config->max_exp_gain_l;
+		} else {
+			timings->max_exp_gain_h = cam_mod->custom.configs[0].max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->custom.configs[0].max_exp_gain_l;
+		}
 		return ret;
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *sensor_config = (struct sensor_config_info_s *)arg;
+
+		sensor_config->config_num = cam_mod->custom.num_configs;
+		for (i = 0; i < cam_mod->custom.num_configs; i++) {
+			if (i >= SENSOR_CONFIG_NUM)
+				break;
+			sensor_config->sensor_fmt[i] =
+				pltfrm_camera_module_pix_fmt2csi2_dt(cam_mod->custom.configs[i].frm_fmt.code);
+			sensor_config->reso[i].width = cam_mod->custom.configs[i].frm_fmt.width;
+			sensor_config->reso[i].height = cam_mod->custom.configs[i].frm_fmt.height;
+		}
+		return 0;
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *sensor_rw = (struct sensor_reg_rw_s *)arg;
+
+		if (sensor_rw->reg_access_mode == SENSOR_READ_MODE) {
+			for (i = 0; i < cam_mod->custom.configs[0].reg_table_num_entries; i++) {
+				flag = cam_mod->custom.configs[0].reg_table[i].flag;
+				if (flag != PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT)
+					break;
+			}
+			if (flag == PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT) {
+				pltfrm_camera_module_pr_err(&cam_mod->sd,
+					"Can not get sensor reg type.\n");
+				return -EINVAL;
+			}
+			sensor_rw->reg_addr_len = PLTFRM_CAMERA_MODULE_REG_LEN(flag);
+			sensor_rw->reg_data_len = PLTFRM_CAMERA_MODULE_DATA_LEN(flag);
+			pltfrm_camera_module_read_reg_ex(&cam_mod->sd, 1, flag, sensor_rw->addr, &val);
+			sensor_rw->data = val;
+		} else {
+			flag = (sensor_rw->reg_addr_len << PLTFRM_CAMERA_MODULE_REG_LEN_BIT);
+			flag |= (sensor_rw->reg_data_len << PLTFRM_CAMERA_MODULE_DATA_LEN_BIT);
+			pltfrm_camera_module_write_reg_ex(&cam_mod->sd, flag, sensor_rw->addr, sensor_rw->data);
+		}
+		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_ITF_CFG) {
 		struct pltfrm_cam_itf *itf_cfg = (struct pltfrm_cam_itf *)arg;
 		struct ov_camera_module_config *config;
@@ -967,9 +1118,14 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
 		pltfrm_camera_module_ioctl(sd, PLTFRM_CIFCAM_G_ITF_CFG, arg);
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
-		ov_camera_module_init(cam_mod, &cam_mod->custom);
-		pltfrm_camera_module_ioctl(sd, cmd, arg);
-		return ov_camera_module_attach(cam_mod);
+		ret = ov_camera_module_init(cam_mod, &cam_mod->custom);
+		if (!IS_ERR_VALUE(ret)) {
+			pltfrm_camera_module_ioctl(sd, cmd, arg);
+			return ov_camera_module_attach(cam_mod);
+		} else {
+			ov_camera_module_release(cam_mod);
+			return ret;
+		}
 	}
 
 	ret = pltfrm_camera_module_ioctl(sd, cmd, arg);
@@ -981,7 +1137,22 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
 int ov_camera_module_get_flip_mirror(
 	struct ov_camera_module *cam_mod)
 {
-	return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	int mode = 0;
+
+	if (!cam_mod->flip_flg)
+		return -1;
+
+	if (cam_mod->hflip)
+		mode |= OV_MIRROR_BIT_MASK;
+	else
+		mode &= ~OV_MIRROR_BIT_MASK;
+
+	if (cam_mod->vflip)
+		mode |= OV_FLIP_BIT_MASK;
+	else
+		mode &= ~OV_FLIP_BIT_MASK;
+
+	return mode;
 }
 
 /* ======================================================================== */
@@ -1078,9 +1249,13 @@ int ov_camera_module_init(struct ov_camera_module *cam_mod,
 	struct ov_camera_module_custom_config *custom)
 {
 	int ret = 0;
+	int mode = 0;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
+	cam_mod->hflip = false;
+	cam_mod->vflip = false;
+	cam_mod->flip_flg = false;
 	ov_camera_module_reset(cam_mod);
 
 	if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1108,6 +1283,12 @@ int ov_camera_module_init(struct ov_camera_module *cam_mod,
 		goto err;
 	}
 
+	mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	if (mode != -1) {
+		cam_mod->hflip = mode & OV_MIRROR_BIT_MASK ? true : false;
+		cam_mod->vflip = mode & OV_FLIP_BIT_MASK ? true : false;
+		cam_mod->flip_flg = true;
+	}
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
index 139406248cd5d..11644dc478344 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
@@ -30,8 +30,8 @@
 #define OV_CAMERA_MODULE_REG_TYPE_TIMEOUT PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT
 #define ov_camera_module_csi_config
 #define ov_camera_module_reg pltfrm_camera_module_reg
-#define OV_FLIP_BIT_MASK				   0x2
-#define OV_MIRROR_BIT_MASK				   0x1
+#define OV_FLIP_BIT_MASK				(1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
+#define OV_MIRROR_BIT_MASK				(1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
 
 #define OV_CAMERA_MODULE_CTRL_UPDT_GAIN				0x01
 #define OV_CAMERA_MODULE_CTRL_UPDT_EXP_TIME			0x02
@@ -90,7 +90,8 @@ struct ov_camera_module_config {
 	struct ov_camera_module_timings timings;
 	bool soft_reset;
 	bool ignore_measurement_check;
-
+	u8 max_exp_gain_h;
+	u8 max_exp_gain_l;
 	struct pltfrm_cam_itf itf_cfg;
 };
 
@@ -156,7 +157,8 @@ struct ov_camera_module_custom_config {
 	int (*g_ctrl)(struct ov_camera_module *cam_mod, u32 ctrl_id);
 	int (*g_timings)(struct ov_camera_module *cam_mod,
 		struct ov_camera_module_timings *timings);
-	int (*g_exposure_valid_frame)(struct ov_camera_module *cam_mod);
+	int (*s_vts)(struct ov_camera_module *cam_mod,
+		u32 vts);
 	int (*s_ext_ctrls)(struct ov_camera_module *cam_mod,
 		struct ov_camera_module_ext_ctrls *ctrls);
 	int (*set_flip)(
@@ -168,6 +170,7 @@ struct ov_camera_module_custom_config {
 	struct ov_camera_module_config *configs;
 	u32 num_configs;
 	u32 power_up_delays_ms[3];
+	unsigned short exposure_valid_frame[2];
 	void *priv;
 };
 
@@ -199,10 +202,12 @@ struct ov_camera_module {
 	bool frm_intrvl_valid;
 	bool hflip;
 	bool vflip;
+	bool flip_flg;
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
 	bool as_master;
+	struct mutex lock;
 };
 
 #define ov_camera_module_pr_info(cam_mod, fmt, arg...) \
@@ -247,6 +252,10 @@ int ov_camera_module_s_frame_interval(
 	struct v4l2_subdev *sd,
 	struct v4l2_subdev_frame_interval *interval);
 
+int ov_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval);
+
 int ov_camera_module_s_stream(
 	struct v4l2_subdev *sd,
 	int enable);
diff --git a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
index 4ac9eaab06eaa..dccfd4fd916ac 100644
--- a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
@@ -80,6 +80,20 @@ const char *PLTFRM_CAMERA_MODULE_PIN_RESET = OF_OV_GPIO_RESET;
 #define I2C_M_WR 0
 #define I2C_MSG_MAX 300
 #define I2C_DATA_MAX (I2C_MSG_MAX * 3)
+#define CSI2_DT_YUV420_8b      (0x18)
+#define CSI2_DT_YUV420_10b     (0x19)
+#define CSI2_DT_YUV422_8b      (0x1E)
+#define CSI2_DT_YUV422_10b     (0x1F)
+#define CSI2_DT_RGB444         (0x20)
+#define CSI2_DT_RGB555         (0x21)
+#define CSI2_DT_RGB565         (0x22)
+#define CSI2_DT_RGB666         (0x23)
+#define CSI2_DT_RGB888         (0x24)
+#define CSI2_DT_RAW6           (0x28)
+#define CSI2_DT_RAW7           (0x29)
+#define CSI2_DT_RAW8           (0x2A)
+#define CSI2_DT_RAW10          (0x2B)
+#define CSI2_DT_RAW12          (0x2C)
 
 struct pltfrm_camera_module_gpio {
 	int pltfrm_gpio;
@@ -885,10 +899,9 @@ static int pltfrm_camera_module_write_reglist_node(
 		}
 
 		reg_table_num_entries /= 12;
-		reg_table = (struct pltfrm_camera_module_reg *)
-			kmalloc(reg_table_num_entries *
-				sizeof(struct pltfrm_camera_module_reg),
-				GFP_KERNEL);
+		reg_table = kmalloc_array(reg_table_num_entries,
+			sizeof(struct pltfrm_camera_module_reg),
+			GFP_KERNEL);
 		if (IS_ERR_OR_NULL(reg_table)) {
 			pltfrm_camera_module_pr_err(sd,
 				"memory allocation failed\n");
@@ -1662,7 +1675,6 @@ int pltfrm_camera_module_init(
 	void **pldata)
 {
 	int ret = 0;
-	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	struct pltfrm_camera_module_data *pdata;
 
 	pltfrm_camera_module_pr_debug(sd, "\n");
@@ -1675,13 +1687,11 @@ int pltfrm_camera_module_init(
 	}
 
 	ret = pltfrm_camera_module_init_gpio(sd);
-	if (ret) {
+	if (ret)
 		pltfrm_camera_module_pr_err(sd,
 			"GPIO initialization failed (%d)\n", ret);
-		devm_kfree(&client->dev, pdata);
-	} else {
+	else
 		*(struct pltfrm_camera_module_data **)pldata = pdata;
-	}
 
 	return ret;
 }
@@ -1710,8 +1720,18 @@ void pltfrm_camera_module_release(
 			devm_regulator_put(
 				pdata->regulators.regulator[i].regulator);
 	}
+
+	if (!IS_ERR_OR_NULL(pdata->regulators.regulator)) {
+		devm_kfree(&client->dev,
+			pdata->regulators.regulator);
+		pdata->regulators.regulator = NULL;
+	}
 	if (pdata->pinctrl)
 		devm_pinctrl_put(pdata->pinctrl);
+	if (!IS_ERR_OR_NULL(pdata)) {
+		devm_kfree(&client->dev, pdata);
+		pdata = NULL;
+	}
 }
 
 /* ======================================================================== */
@@ -1840,5 +1860,134 @@ int pltfrm_camera_module_get_flip_mirror(
 
 	return mode;
 }
+
+int pltfrm_camera_module_pix_fmt2csi2_dt(int src_pix_fmt)
+{
+	int ret = 0;
+
+	switch (src_pix_fmt) {
+	case MEDIA_BUS_FMT_RGB444_1X12:
+	case MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE:
+	case MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE:
+		ret = CSI2_DT_RGB444;
+		break;
+	case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE:
+	case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE:
+		ret = CSI2_DT_RGB555;
+		break;
+	case MEDIA_BUS_FMT_RGB565_1X16:
+	case MEDIA_BUS_FMT_BGR565_2X8_BE:
+	case MEDIA_BUS_FMT_BGR565_2X8_LE:
+	case MEDIA_BUS_FMT_RGB565_2X8_BE:
+	case MEDIA_BUS_FMT_RGB565_2X8_LE:
+		ret = CSI2_DT_RGB565;
+		break;
+	case MEDIA_BUS_FMT_RGB666_1X18:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+		ret = CSI2_DT_RGB666;
+		break;
+	case MEDIA_BUS_FMT_RBG888_1X24:
+	case MEDIA_BUS_FMT_BGR888_1X24:
+	case MEDIA_BUS_FMT_GBR888_1X24:
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB888_2X12_BE:
+	case MEDIA_BUS_FMT_RGB888_2X12_LE:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+	case MEDIA_BUS_FMT_ARGB8888_1X32:
+	case MEDIA_BUS_FMT_RGB888_1X32_PADHI:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		ret = CSI2_DT_RGB888;
+		break;
+	case MEDIA_BUS_FMT_Y8_1X8:
+	case MEDIA_BUS_FMT_UV8_1X8:
+	case MEDIA_BUS_FMT_UYVY8_1_5X8:
+	case MEDIA_BUS_FMT_VYUY8_1_5X8:
+	case MEDIA_BUS_FMT_YUYV8_1_5X8:
+	case MEDIA_BUS_FMT_YVYU8_1_5X8:
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+	case MEDIA_BUS_FMT_VYUY8_2X8:
+	case MEDIA_BUS_FMT_YUYV8_2X8:
+	case MEDIA_BUS_FMT_YVYU8_2X8:
+		ret = CSI2_DT_YUV420_8b;
+		break;
+	case MEDIA_BUS_FMT_Y10_1X10:
+	case MEDIA_BUS_FMT_UYVY10_2X10:
+	case MEDIA_BUS_FMT_VYUY10_2X10:
+	case MEDIA_BUS_FMT_YUYV10_2X10:
+	case MEDIA_BUS_FMT_YVYU10_2X10:
+		ret = CSI2_DT_YUV420_10b;
+		break;
+	case MEDIA_BUS_FMT_Y12_1X12:
+	case MEDIA_BUS_FMT_UYVY12_2X12:
+	case MEDIA_BUS_FMT_VYUY12_2X12:
+	case MEDIA_BUS_FMT_YUYV12_2X12:
+	case MEDIA_BUS_FMT_YVYU12_2X12:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_VYUY8_1X16:
+	case MEDIA_BUS_FMT_YUYV8_1X16:
+	case MEDIA_BUS_FMT_YVYU8_1X16:
+	case MEDIA_BUS_FMT_YDYUYDYV8_1X16:
+		ret = CSI2_DT_YUV422_8b;
+		break;
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_VYUY10_1X20:
+	case MEDIA_BUS_FMT_YUYV10_1X20:
+	case MEDIA_BUS_FMT_YVYU10_1X20:
+	case MEDIA_BUS_FMT_VUY8_1X24:
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+	case MEDIA_BUS_FMT_VYUY12_1X24:
+	case MEDIA_BUS_FMT_YUYV12_1X24:
+	case MEDIA_BUS_FMT_YVYU12_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_AYUV8_1X32:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		ret = CSI2_DT_YUV422_10b;
+		break;
+	case MEDIA_BUS_FMT_SBGGR8_1X8:
+	case MEDIA_BUS_FMT_SGBRG8_1X8:
+	case MEDIA_BUS_FMT_SGRBG8_1X8:
+	case MEDIA_BUS_FMT_SRGGB8_1X8:
+		ret = CSI2_DT_RAW8;
+		break;
+	case MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8:
+	case MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8:
+	case MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8:
+	case MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8:
+	case MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8:
+	case MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8:
+	case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8:
+	case MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8:
+	case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
+	case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
+	case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE:
+	case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE:
+	case MEDIA_BUS_FMT_SBGGR10_1X10:
+	case MEDIA_BUS_FMT_SGBRG10_1X10:
+	case MEDIA_BUS_FMT_SGRBG10_1X10:
+	case MEDIA_BUS_FMT_SRGGB10_1X10:
+		ret = CSI2_DT_RAW10;
+		break;
+	case MEDIA_BUS_FMT_SBGGR12_1X12:
+	case MEDIA_BUS_FMT_SGBRG12_1X12:
+	case MEDIA_BUS_FMT_SGRBG12_1X12:
+	case MEDIA_BUS_FMT_SRGGB12_1X12:
+		ret = CSI2_DT_RAW12;
+		break;
+	default:
+		break;
+	}
+	return ret;
+}
+
 #endif
 
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
index e93961638c61c..3e30160f32dc7 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/tc358749xbg_v4l2-i2c-subdev.c
@@ -448,6 +448,8 @@ static struct tc_camera_module_config tc358749xbg_configs[] = {
 			sizeof(tc358749xbg_init_tab_1920_1080_60fps) /
 			sizeof(tc358749xbg_init_tab_1920_1080_60fps[0]),
 		.v_blanking_time_us = 3078,
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
 		.ignore_measurement_check = 1,
 		PLTFRM_CAM_ITF_MIPI_CFG(0, 4, 800, 24000000)
 	}
@@ -649,6 +651,8 @@ static int tc358749xbg_g_timings(
 		cam_mod->active_config->frm_intrvl.interval.denominator *
 		vts * timings->line_length_pck;
 
+	timings->frame_length_lines = vts;
+
 	return ret;
 err:
 	tc_camera_module_pr_err(cam_mod,
@@ -704,14 +708,8 @@ static int tc358749xbg_s_ext_ctrls(
 {
 	int ret = 0;
 
-	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = tc358749xbg_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		 (ctrls->ctrls[0].id == V4L2_CID_GAIN ||
-		  ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
-		  ctrls->ctrls[1].id == V4L2_CID_GAIN ||
-		  ctrls->ctrls[1].id == V4L2_CID_EXPOSURE))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = tc358749xbg_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -798,6 +796,7 @@ static struct v4l2_subdev_core_ops tc358749xbg_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops tc358749xbg_camera_module_video_ops = {
 	.s_frame_interval = tc_camera_module_s_frame_interval,
+	.g_frame_interval = tc_camera_module_g_frame_interval,
 	.s_stream = tc_camera_module_s_stream
 };
 
@@ -826,7 +825,13 @@ static struct tc_camera_module_custom_config tc358749xbg_custom_config = {
 	.s_power = tc358749xbg_s_power,
 	.configs = tc358749xbg_configs,
 	.num_configs = ARRAY_SIZE(tc358749xbg_configs),
-	.power_up_delays_ms = {5, 30, 30}
+	.power_up_delays_ms = {5, 30, 30},
+	/*
+	*0: Exposure time valid fileds;
+	*1: Exposure gain valid fileds;
+	*(2 fileds == 1 frames)
+	*/
+	.exposure_valid_frame = {4, 4}
 };
 
 static int test_parse_dts(
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
index 229444c1eed56..2fc97149be559 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.c
@@ -51,8 +51,6 @@ static void tc_camera_module_reset(
 	cam_mod->exp_config.auto_exp = false;
 	cam_mod->exp_config.auto_gain = false;
 	cam_mod->wb_config.auto_wb = false;
-	cam_mod->hflip = false;
-	cam_mod->vflip = false;
 	cam_mod->auto_adjust_fps = true;
 	cam_mod->rotation = 0;
 	cam_mod->ctrl_updt = 0;
@@ -308,6 +306,10 @@ int tc_camera_module_s_fmt(struct v4l2_subdev *sd,
 		tc_camera_module_set_active_config(cam_mod,
 			tc_camera_module_find_config(cam_mod,
 				fmt, &cam_mod->frm_intrvl));
+	} else {
+		tc_camera_module_set_active_config(cam_mod,
+			tc_camera_module_find_config(cam_mod,
+				fmt, NULL));
 	}
 	return 0;
 err:
@@ -348,6 +350,8 @@ int tc_camera_module_s_frame_interval(
 	struct tc_camera_module *cam_mod = to_tc_camera_module(sd);
 	unsigned long gcdiv;
 	struct v4l2_subdev_frame_interval norm_interval;
+	struct tc_camera_module_config *config;
+	unsigned int vts;
 	int ret = 0;
 
 	if ((interval->interval.denominator == 0) ||
@@ -374,22 +378,65 @@ int tc_camera_module_s_frame_interval(
 	norm_interval.interval.denominator =
 		interval->interval.denominator / gcdiv;
 
-	if (IS_ERR_OR_NULL(tc_camera_module_find_config(cam_mod,
-			NULL, &norm_interval))) {
-		pltfrm_camera_module_pr_err(&cam_mod->sd,
-			"frame interval %d/%d not supported\n",
-			interval->interval.numerator,
-			interval->interval.denominator);
-		ret = -EINVAL;
-		goto err;
+	config = tc_camera_module_find_config(cam_mod,
+			NULL, &norm_interval);
+
+	if (!cam_mod->frm_fmt_valid)
+		goto end;
+	config = tc_camera_module_find_config(
+			cam_mod,
+			&cam_mod->active_config->frm_fmt,
+			&norm_interval);
+
+	if (!IS_ERR_OR_NULL(config) && (config != cam_mod->active_config)) {
+		tc_camera_module_set_active_config(cam_mod, config);
+		if (cam_mod->state == TC_CAMERA_MODULE_STREAMING) {
+			cam_mod->custom.enable_stream(cam_mod, false);
+			tc_camera_module_write_config(cam_mod);
+			cam_mod->custom.enable_stream(cam_mod, true);
+		}
+	} else {
+		if (IS_ERR_OR_NULL(cam_mod->active_config)) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"no active sensor configuration");
+			ret = -EFAULT;
+			goto err;
+		}
+		if (cam_mod->active_config->frm_intrvl.interval.denominator <
+			norm_interval.interval.denominator) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"%dx%d@%dfps isn't support!",
+				cam_mod->active_config->frm_fmt.width,
+				cam_mod->active_config->frm_fmt.height,
+				norm_interval.interval.denominator);
+			ret = -EFAULT;
+			goto err;
+		}
+		if (!cam_mod->custom.s_vts) {
+			pltfrm_camera_module_pr_err(
+				&cam_mod->sd,
+				"custom.s_vts isn't support!");
+			ret = -EFAULT;
+			goto err;
+		}
+
+		vts = cam_mod->active_config->timings.frame_length_lines;
+		vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+		vts /= norm_interval.interval.denominator;
+		cam_mod->vts_cur = vts;
+
+		if (cam_mod->state != TC_CAMERA_MODULE_STREAMING)
+			goto end;
+
+		cam_mod->custom.s_vts(cam_mod, vts);
 	}
+
+end:
 	cam_mod->frm_intrvl_valid = true;
 	cam_mod->frm_intrvl = norm_interval;
-	if (cam_mod->frm_fmt_valid) {
-		tc_camera_module_set_active_config(cam_mod,
-			tc_camera_module_find_config(cam_mod,
-				&cam_mod->frm_fmt, interval));
-	}
+	cam_mod->auto_adjust_fps = false;
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
@@ -397,12 +444,34 @@ int tc_camera_module_s_frame_interval(
 	return ret;
 }
 
+int tc_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval)
+{
+	struct tc_camera_module *cam_mod = to_tc_camera_module(sd);
+
+	if (cam_mod->active_config) {
+		if (cam_mod->state == TC_CAMERA_MODULE_STREAMING) {
+			if (cam_mod->frm_intrvl_valid) {
+				*interval = cam_mod->frm_intrvl;
+				return 0;
+			} else {
+				*interval = cam_mod->active_config->frm_intrvl;
+				return 0;
+			}
+		}
+	}
+
+	return -EFAULT;
+}
+
 /* ======================================================================== */
 
 int tc_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 {
 	int ret = 0;
 	struct tc_camera_module *cam_mod =  to_tc_camera_module(sd);
+	unsigned int vts;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "%d\n", enable);
 
@@ -431,6 +500,29 @@ int tc_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		ret = cam_mod->custom.enable_stream(cam_mod, true);
 		if (IS_ERR_VALUE(ret))
 			goto err;
+
+		if (cam_mod->frm_intrvl_valid) {
+			if ((cam_mod->frm_intrvl.interval.numerator !=
+				cam_mod->active_config->frm_intrvl.interval.numerator) ||
+				(cam_mod->frm_intrvl.interval.denominator !=
+				cam_mod->active_config->frm_intrvl.interval.denominator)) {
+				if (cam_mod->frm_intrvl.interval.denominator >
+					cam_mod->active_config->frm_intrvl.interval.denominator) {
+					pltfrm_camera_module_pr_warn(&cam_mod->sd,
+						"sensor is not support stream: %dx%d@(%d/%d)fps!\n",
+						cam_mod->active_config->frm_fmt.width,
+						cam_mod->active_config->frm_fmt.height,
+						cam_mod->frm_intrvl.interval.denominator,
+						cam_mod->frm_intrvl.interval.numerator);
+					goto end;
+				}
+				vts = cam_mod->active_config->timings.frame_length_lines;
+				vts *= cam_mod->active_config->frm_intrvl.interval.denominator;
+				vts /= cam_mod->frm_intrvl.interval.denominator;
+				cam_mod->custom.s_vts(cam_mod, vts);
+			}
+		}
+
 		if (!cam_mod->inited && cam_mod->update_config)
 			cam_mod->inited = true;
 		cam_mod->update_config = false;
@@ -475,6 +567,7 @@ int tc_camera_module_s_stream(struct v4l2_subdev *sd, int enable)
 		msleep(wait_ms + 1);
 	}
 
+end:
 	cam_mod->state_before_suspend = cam_mod->state;
 
 	return 0;
@@ -589,6 +682,22 @@ int tc_camera_module_g_ctrl(struct v4l2_subdev *sd,
 		return 0;
 	}
 
+	if (ctrl->id == V4L2_CID_HFLIP) {
+		ctrl->value = cam_mod->hflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_HFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
+	if (ctrl->id == V4L2_CID_VFLIP) {
+		ctrl->value = cam_mod->vflip;
+		pltfrm_camera_module_pr_debug(&cam_mod->sd,
+			"V4L2_CID_VFLIP %d\n",
+			ctrl->value);
+		return 0;
+	}
+
 	if (ctrl->id == V4L2_CID_FLASH_LED_MODE) {
 		ctrl->value = cam_mod->exp_config.flash_mode;
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
@@ -683,10 +792,6 @@ int tc_camera_module_g_ctrl(struct v4l2_subdev *sd,
 			"V4L2_CID_FOCUS_ABSOLUTE %d\n",
 			ctrl->value);
 		break;
-	case V4L2_CID_HFLIP:
-	case V4L2_CID_VFLIP:
-		/* TBD */
-		/* fallthrough */
 	default:
 		pltfrm_camera_module_pr_debug(&cam_mod->sd,
 			"failed, unknown ctrl %d\n", ctrl->id);
@@ -835,12 +940,14 @@ int tc_camera_module_s_ext_ctrls(
 				cam_mod->hflip = true;
 			else
 				cam_mod->hflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		case V4L2_CID_VFLIP:
 			if (ctrl->value)
 				cam_mod->vflip = true;
 			else
 				cam_mod->vflip = false;
+			cam_mod->flip_flg = true;
 			break;
 		default:
 			pltfrm_camera_module_pr_warn(
@@ -920,7 +1027,8 @@ long tc_camera_module_ioctl(struct v4l2_subdev *sd,
 	void *arg)
 {
 	struct tc_camera_module *cam_mod =  to_tc_camera_module(sd);
-	int ret;
+	int ret, i;
+	unsigned int flag, val;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "cmd: 0x%x\n", cmd);
 
@@ -963,9 +1071,10 @@ long tc_camera_module_ioctl(struct v4l2_subdev *sd,
 		timings->fine_integration_time_min =
 			tc_timings.fine_integration_time_min;
 
-		if (cam_mod->custom.g_exposure_valid_frame)
-			timings->exposure_valid_frame[0] =
-				cam_mod->custom.g_exposure_valid_frame(cam_mod);
+		timings->exposure_valid_frame[0] =
+			cam_mod->custom.exposure_valid_frame[0];
+		timings->exposure_valid_frame[1] =
+			cam_mod->custom.exposure_valid_frame[1];
 		if (cam_mod->exp_config.exp_time)
 			timings->exp_time = cam_mod->exp_config.exp_time;
 		else
@@ -974,7 +1083,52 @@ long tc_camera_module_ioctl(struct v4l2_subdev *sd,
 			timings->gain = cam_mod->exp_config.gain;
 		else
 			timings->gain = tc_timings.gain;
+
+		if (cam_mod->active_config) {
+			timings->max_exp_gain_h = cam_mod->active_config->max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->active_config->max_exp_gain_l;
+		} else {
+			timings->max_exp_gain_h = cam_mod->custom.configs[0].max_exp_gain_h;
+			timings->max_exp_gain_l = cam_mod->custom.configs[0].max_exp_gain_l;
+		}
 		return ret;
+	} else if (cmd == RK_VIDIOC_SENSOR_CONFIGINFO) {
+		struct sensor_config_info_s *sensor_config = (struct sensor_config_info_s *)arg;
+
+		sensor_config->config_num = cam_mod->custom.num_configs;
+		for (i = 0; i < cam_mod->custom.num_configs; i++) {
+			if (i >= SENSOR_CONFIG_NUM)
+				break;
+			sensor_config->sensor_fmt[i] =
+				pltfrm_camera_module_pix_fmt2csi2_dt(cam_mod->custom.configs[i].frm_fmt.code);
+			sensor_config->reso[i].width = cam_mod->custom.configs[i].frm_fmt.width;
+			sensor_config->reso[i].height = cam_mod->custom.configs[i].frm_fmt.height;
+		}
+		return 0;
+	} else if (cmd == RK_VIDIOC_SENSOR_REG_ACCESS) {
+		struct sensor_reg_rw_s *sensor_rw = (struct sensor_reg_rw_s *)arg;
+
+		if (sensor_rw->reg_access_mode == SENSOR_READ_MODE) {
+			for (i = 0; i < cam_mod->custom.configs[0].reg_table_num_entries; i++) {
+				flag = cam_mod->custom.configs[0].reg_table[i].flag;
+				if (flag != PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT)
+					break;
+			}
+			if (flag == PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT) {
+				pltfrm_camera_module_pr_err(&cam_mod->sd,
+					"Can not get sensor reg type.\n");
+				return -EINVAL;
+			}
+			sensor_rw->reg_addr_len = PLTFRM_CAMERA_MODULE_REG_LEN(flag);
+			sensor_rw->reg_data_len = PLTFRM_CAMERA_MODULE_DATA_LEN(flag);
+			pltfrm_camera_module_read_reg_ex(&cam_mod->sd, 1, flag, sensor_rw->addr, &val);
+			sensor_rw->data = val;
+		} else {
+			flag = (sensor_rw->reg_addr_len << PLTFRM_CAMERA_MODULE_REG_LEN_BIT);
+			flag |= (sensor_rw->reg_data_len << PLTFRM_CAMERA_MODULE_DATA_LEN_BIT);
+			pltfrm_camera_module_write_reg_ex(&cam_mod->sd, flag, sensor_rw->addr, sensor_rw->data);
+		}
+		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_G_ITF_CFG) {
 		struct pltfrm_cam_itf *itf_cfg = (struct pltfrm_cam_itf *)arg;
 		struct tc_camera_module_config *config;
@@ -995,9 +1149,14 @@ long tc_camera_module_ioctl(struct v4l2_subdev *sd,
 		pltfrm_camera_module_ioctl(sd, PLTFRM_CIFCAM_G_ITF_CFG, arg);
 		return 0;
 	} else if (cmd == PLTFRM_CIFCAM_ATTACH) {
-		tc_camera_module_init(cam_mod, &cam_mod->custom);
-		pltfrm_camera_module_ioctl(sd, cmd, arg);
-		return tc_camera_module_attach(cam_mod);
+		ret = tc_camera_module_init(cam_mod, &cam_mod->custom);
+		if (!IS_ERR_VALUE(ret)) {
+			pltfrm_camera_module_ioctl(sd, cmd, arg);
+			return tc_camera_module_attach(cam_mod);
+		} else {
+			tc_camera_module_release(cam_mod);
+			return ret;
+		}
 	}
 
 	ret = pltfrm_camera_module_ioctl(sd, cmd, arg);
@@ -1009,7 +1168,22 @@ long tc_camera_module_ioctl(struct v4l2_subdev *sd,
 int tc_camera_module_get_flip_mirror(
 	struct tc_camera_module *cam_mod)
 {
-	return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	int mode = 0;
+
+	if (!cam_mod->flip_flg)
+		return -1;
+
+	if (cam_mod->hflip)
+		mode |= TC_MIRROR_BIT_MASK;
+	else
+		mode &= ~TC_MIRROR_BIT_MASK;
+
+	if (cam_mod->vflip)
+		mode |= TC_FLIP_BIT_MASK;
+	else
+		mode &= ~TC_FLIP_BIT_MASK;
+
+	return mode;
 }
 
 /* ======================================================================== */
@@ -1038,7 +1212,7 @@ int tc_camera_module_enum_frameintervals(
 
 /* ======================================================================== */
 static int tc_camera_module_i2c_write(struct v4l2_subdev *sd, u16 reg,
-				       u8 *values, u32 len)
+					u8 *values, u32 len)
 {
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	int ret, i;
@@ -1082,7 +1256,7 @@ static int tc_camera_module_i2c_write(struct v4l2_subdev *sd, u16 reg,
 
 /* ======================================================================== */
 static int tc_camera_module_i2c_read(struct v4l2_subdev *sd, u16 reg,
-				       u32 *value, u32 len)
+					u32 *value, u32 len)
 {
 	struct i2c_client *client = v4l2_get_subdevdata(sd);
 	int ret = 0;
@@ -1261,9 +1435,13 @@ int tc_camera_module_init(struct tc_camera_module *cam_mod,
 	struct tc_camera_module_custom_config *custom)
 {
 	int ret = 0;
+	int mode = 0;
 
 	pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
 
+	cam_mod->hflip = false;
+	cam_mod->vflip = false;
+	cam_mod->flip_flg = false;
 	tc_camera_module_reset(cam_mod);
 
 	if (IS_ERR_OR_NULL(custom->s_ctrl) ||
@@ -1289,6 +1467,12 @@ int tc_camera_module_init(struct tc_camera_module *cam_mod,
 		goto err;
 	}
 
+	mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
+	if (mode != -1) {
+		cam_mod->hflip = mode & TC_MIRROR_BIT_MASK ? true : false;
+		cam_mod->vflip = mode & TC_FLIP_BIT_MASK ? true : false;
+		cam_mod->flip_flg = true;
+	}
 	return 0;
 err:
 	pltfrm_camera_module_pr_err(&cam_mod->sd,
diff --git a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
index 2cb594df2cad6..673f6c284bf46 100644
--- a/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/tc_camera_module.h
@@ -34,8 +34,8 @@
 #define TC_CAMERA_MOUDLE_REG_VALUE_LEN_16BIT	2
 #define TC_CAMERA_MOUDLE_REG_VALUE_LEN_32BIT	4
 #define tc_camera_module_csi_config
-#define TC_FLIP_BIT_MASK					0x2
-#define TC_MIRROR_BIT_MASK					0x1
+#define TC_FLIP_BIT_MASK					(1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
+#define TC_MIRROR_BIT_MASK					(1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
 
 #define TC_CAMERA_MODULE_CTRL_UPDT_GAIN				0x01
 #define TC_CAMERA_MODULE_CTRL_UPDT_EXP_TIME			0x02
@@ -101,7 +101,8 @@ struct tc_camera_module_config {
 	struct tc_camera_module_timings timings;
 	bool soft_reset;
 	bool ignore_measurement_check;
-
+	u8 max_exp_gain_h;
+	u8 max_exp_gain_l;
 	struct pltfrm_cam_itf itf_cfg;
 };
 
@@ -165,7 +166,8 @@ struct tc_camera_module_custom_config {
 	int (*g_ctrl)(struct tc_camera_module *cam_mod, u32 ctrl_id);
 	int (*g_timings)(struct tc_camera_module *cam_mod,
 		struct tc_camera_module_timings *timings);
-	int (*g_exposure_valid_frame)(struct tc_camera_module *cam_mod);
+	int (*s_vts)(struct tc_camera_module *cam_mod,
+		u32 vts);
 	int (*s_ext_ctrls)(struct tc_camera_module *cam_mod,
 		struct tc_camera_module_ext_ctrls *ctrls);
 	int (*set_flip)(
@@ -179,6 +181,7 @@ struct tc_camera_module_custom_config {
 	struct tc_camera_module_config *configs;
 	u32 num_configs;
 	u32 power_up_delays_ms[3];
+	unsigned short exposure_valid_frame[2];
 	void *priv;
 };
 
@@ -210,9 +213,11 @@ struct tc_camera_module {
 	bool frm_intrvl_valid;
 	bool hflip;
 	bool vflip;
+	bool flip_flg;
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
+	struct mutex lock;
 };
 
 struct tc35x_priv {
@@ -286,6 +291,10 @@ int tc_camera_module_s_frame_interval(
 	struct v4l2_subdev *sd,
 	struct v4l2_subdev_frame_interval *interval);
 
+int tc_camera_module_g_frame_interval(
+	struct v4l2_subdev *sd,
+	struct v4l2_subdev_frame_interval *interval);
+
 int tc_camera_module_s_stream(
 	struct v4l2_subdev *sd,
 	int enable);
diff --git a/include/linux/platform_data/rk_isp10_platform_camera_module.h b/include/linux/platform_data/rk_isp10_platform_camera_module.h
index 154694d42c666..41c6c03dd4888 100644
--- a/include/linux/platform_data/rk_isp10_platform_camera_module.h
+++ b/include/linux/platform_data/rk_isp10_platform_camera_module.h
@@ -46,6 +46,13 @@
 #define PLTFRM_CAMERA_MODULE_REG_TYPE_TIMEOUT 0x01
 #define PLTFRM_CAMERA_MODULE_REG_TYPE_DATA_SINGLE 0x1100
 
+#define PLTFRM_CAMERA_MODULE_MIRROR_BIT 0
+#define PLTFRM_CAMERA_MODULE_FLIP_BIT 1
+#define PLTFRM_CAMERA_MODULE_IS_MIRROR(a) \
+	((a & PLTFRM_CAMERA_MODULE_MIRROR_BIT) == PLTFRM_CAMERA_MODULE_MIRROR_BIT)
+#define PLTFRM_CAMERA_MODULE_IS_FLIP(a) \
+	((a & PLTFRM_CAMERA_MODULE_FLIP_BIT) == PLTFRM_CAMERA_MODULE_FLIP_BIT)
+
 extern const char *PLTFRM_CAMERA_MODULE_PIN_PD;
 extern const char *PLTFRM_CAMERA_MODULE_PIN_PWR;
 extern const char *PLTFRM_CAMERA_MODULE_PIN_FLASH;
@@ -143,6 +150,8 @@ const char *pltfrm_dev_string(struct v4l2_subdev *sd);
 int pltfrm_camera_module_get_flip_mirror(
 	struct v4l2_subdev *sd);
 
+int pltfrm_camera_module_pix_fmt2csi2_dt(int src_pix_fmt);
+
 #define pltfrm_camera_module_pr_debug(dev, fmt, arg...) \
 	pr_debug("%s.%s: " fmt, \
 		pltfrm_dev_string(dev), __func__, ## arg)
diff --git a/include/media/v4l2-config_rockchip.h b/include/media/v4l2-config_rockchip.h
index 0f2cfb6b3c5ad..e5550903dcdba 100644
--- a/include/media/v4l2-config_rockchip.h
+++ b/include/media/v4l2-config_rockchip.h
@@ -56,6 +56,8 @@ struct isp_supplemental_sensor_mode_data {
 	unsigned char exposure_valid_frame[2];
 	int exp_time;
 	unsigned short gain;
+	unsigned char max_exp_gain_h;
+	unsigned char max_exp_gain_l;
 };
 
 struct camera_module_info_s {

From 60562340cc7202b9b97fef1da91061b77348142e Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Mon, 16 Jul 2018 16:49:05 +0800
Subject: [PATCH 0655/1852] media: rockchip/cif: match px30 and modif resets

Change-Id: Ic8e6899064a6b19f23542af128d20f89d319a5f6
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/cif/dev.c | 91 ++++++++++++++++++-----
 drivers/media/platform/rockchip/cif/dev.h |  3 +-
 2 files changed, 76 insertions(+), 18 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/dev.c b/drivers/media/platform/rockchip/cif/dev.c
index dcee6c488046d..c57a82cbf80aa 100644
--- a/drivers/media/platform/rockchip/cif/dev.c
+++ b/drivers/media/platform/rockchip/cif/dev.c
@@ -23,7 +23,9 @@
 
 struct cif_match_data {
 	const char * const *clks;
-	int size;
+	const char * const *rsts;
+	int clks_num;
+	int rsts_num;
 };
 
 int rkcif_debug;
@@ -183,12 +185,29 @@ static int rkcif_register_platform_subdevs(struct rkcif_device *cif_dev)
 	return 0;
 }
 
+static const char * const px30_cif_clks[] = {
+	"aclk_cif",
+	"hclk_cif",
+	"pclk_cif",
+	"cif_out",
+};
+
+static const char * const px30_cif_rsts[] = {
+	"rst_cif_a",
+	"rst_cif_h",
+	"rst_cif_pclkin",
+};
+
 static const char * const rk3128_cif_clks[] = {
 	"aclk_cif",
 	"hclk_cif",
 	"sclk_cif_out",
 };
 
+static const char * const rk3128_cif_rsts[] = {
+	"rst_cif",
+};
+
 static const char * const rk3288_cif_clks[] = {
 	"aclk_cif0",
 	"hclk_cif0",
@@ -196,17 +215,36 @@ static const char * const rk3288_cif_clks[] = {
 	"cif0_out",
 };
 
+static const char * const rk3288_cif_rsts[] = {
+	"rst_cif",
+};
+
+static const struct cif_match_data px30_cif_clk_data = {
+	.clks = px30_cif_clks,
+	.clks_num = ARRAY_SIZE(px30_cif_clks),
+	.rsts = px30_cif_rsts,
+	.rsts_num = ARRAY_SIZE(px30_cif_rsts),
+};
+
 static const struct cif_match_data rk3128_cif_clk_data = {
 	.clks = rk3128_cif_clks,
-	.size = ARRAY_SIZE(rk3128_cif_clks),
+	.clks_num = ARRAY_SIZE(rk3128_cif_clks),
+	.rsts = rk3128_cif_rsts,
+	.rsts_num = ARRAY_SIZE(rk3128_cif_rsts),
 };
 
 static const struct cif_match_data rk3288_cif_clk_data = {
 	.clks = rk3288_cif_clks,
-	.size = ARRAY_SIZE(rk3288_cif_clks),
+	.clks_num = ARRAY_SIZE(rk3288_cif_clks),
+	.rsts = rk3288_cif_rsts,
+	.rsts_num = ARRAY_SIZE(rk3288_cif_rsts),
 };
 
 static const struct of_device_id rkcif_plat_of_match[] = {
+	{
+		.compatible = "rockchip,px30-cif",
+		.data = &px30_cif_clk_data,
+	},
 	{
 		.compatible = "rockchip,rk3128-cif",
 		.data = &rk3128_cif_clk_data,
@@ -336,12 +374,18 @@ static inline bool is_iommu_enable(struct device *dev)
 
 void rkcif_soft_reset(struct rkcif_device *cif_dev)
 {
+	unsigned int i;
+
 	if (cif_dev->iommu_en)
 		rkcif_iommu_cleanup(cif_dev);
 
-	reset_control_assert(cif_dev->cif_rst);
+	for (i = 0; i < ARRAY_SIZE(cif_dev->cif_rst); i++)
+		if (cif_dev->cif_rst[i])
+			reset_control_assert(cif_dev->cif_rst[i]);
 	udelay(5);
-	reset_control_deassert(cif_dev->cif_rst);
+	for (i = 0; i < ARRAY_SIZE(cif_dev->cif_rst); i++)
+		if (cif_dev->cif_rst[i])
+			reset_control_deassert(cif_dev->cif_rst[i]);
 
 	if (cif_dev->iommu_en)
 		rkcif_iommu_init(cif_dev);
@@ -354,11 +398,14 @@ static int rkcif_plat_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct v4l2_device *v4l2_dev;
 	struct rkcif_device *cif_dev;
-	const struct cif_match_data *clk_data;
+	const struct cif_match_data *data;
 	struct resource *res;
 	int i, ret, irq;
 
 	match = of_match_node(rkcif_plat_of_match, node);
+	if (IS_ERR(match))
+		return PTR_ERR(match);
+
 	cif_dev = devm_kzalloc(dev, sizeof(*cif_dev), GFP_KERNEL);
 	if (!cif_dev)
 		return -ENOMEM;
@@ -383,22 +430,32 @@ static int rkcif_plat_probe(struct platform_device *pdev)
 	}
 
 	cif_dev->irq = irq;
-	clk_data = match->data;
-	for (i = 0; i < clk_data->size; i++) {
-		struct clk *clk = devm_clk_get(dev, clk_data->clks[i]);
-
+	data = match->data;
+	if (data->clks_num > RKCIF_MAX_BUS_CLK ||
+		data->rsts_num > RKCIF_MAX_RESET) {
+		dev_err(dev, "out of range: clks(%d %d) rsts(%d %d)\n",
+			data->clks_num, RKCIF_MAX_BUS_CLK,
+			data->rsts_num, RKCIF_MAX_RESET);
+		return -EINVAL;
+	}
+	for (i = 0; i < data->clks_num; i++) {
+		struct clk *clk = devm_clk_get(dev, data->clks[i]);
 		if (IS_ERR(clk)) {
-			dev_err(dev, "failed to get %s\n", clk_data->clks[i]);
+			dev_err(dev, "failed to get %s\n", data->clks[i]);
 			return PTR_ERR(clk);
 		}
 		cif_dev->clks[i] = clk;
 	}
-	cif_dev->clk_size = clk_data->size;
-
-	cif_dev->cif_rst = devm_reset_control_get(dev, "rst_cif");
-	if (IS_ERR(cif_dev->cif_rst)) {
-		dev_err(dev, "failed to get core cif reset controller\n");
-		return PTR_ERR(cif_dev->cif_rst);
+	cif_dev->clk_size = data->clks_num;
+
+	for (i = 0; i < data->rsts_num; i++) {
+		struct reset_control *rst =
+			devm_reset_control_get(dev, data->rsts[i]);
+		if (IS_ERR(rst)) {
+			dev_err(dev, "failed to get %s\n", data->rsts[i]);
+			return PTR_ERR(rst);
+		}
+		cif_dev->cif_rst[i] = rst;
 	}
 
 	rkcif_stream_init(cif_dev);
diff --git a/drivers/media/platform/rockchip/cif/dev.h b/drivers/media/platform/rockchip/cif/dev.h
index 0ce96849b2fae..9891aaa4dd892 100644
--- a/drivers/media/platform/rockchip/cif/dev.h
+++ b/drivers/media/platform/rockchip/cif/dev.h
@@ -19,6 +19,7 @@
 
 #define RKCIF_MAX_BUS_CLK	8
 #define RKCIF_MAX_SENSOR	2
+#define RKCIF_MAX_RESET	3
 
 #define RKCIF_DEFAULT_WIDTH	640
 #define RKCIF_DEFAULT_HEIGHT	480
@@ -152,7 +153,7 @@ struct rkcif_device {
 	struct vb2_alloc_ctx		*alloc_ctx;
 	bool				iommu_en;
 	struct iommu_domain		*domain;
-	struct reset_control		*cif_rst;
+	struct reset_control		*cif_rst[RKCIF_MAX_RESET];
 
 	struct v4l2_device		v4l2_dev;
 	struct media_device		media_dev;

From 05cf1139da68ca70a651a8c0846f1e240277edae Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Tue, 24 Jul 2018 15:01:48 +0800
Subject: [PATCH 0656/1852] ARM64: dts: rockchip: add cif and gc2155 for
 rk3326-evb-lp3-v10-linux

Change-Id: I96aa0405ea7c0a71587d14306c5c23d594ec42f3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../dts/rockchip/rk3326-evb-lp3-v10-linux.dts | 62 ++++++++++++++++++-
 1 file changed, 59 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
index 9c296b0e417f6..2e7b7ec493f82 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
@@ -10,7 +10,6 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/sensor-dev.h>
 #include "rk3326.dtsi"
-#include "rk3326-863-cif-sensor.dtsi"
 #include "rk3326-linux.dtsi"
 
 / {
@@ -229,6 +228,18 @@
 	status = "okay";
 };
 
+&cif_new {
+	status = "okay";
+
+	port {
+		cif_in: endpoint {
+			remote-endpoint = <&gc2155_out>;
+			vsync-active = <0>;
+			hsync-active = <1>;
+		};
+	};
+};
+
 &cpu0 {
 	cpu-supply = <&vdd_arm>;
 };
@@ -715,15 +726,39 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
+	/* 24M mclk is shared for multiple cameras */
+	pinctrl-0 = <&i2c2_xfer &cif_clkout_m0>;
+
 	/* These are relatively safe rise/fall times; TODO: measure */
 	i2c-scl-falling-time-ns = <50>;
 	i2c-scl-rising-time-ns = <300>;
 
+	gc2155: gc2155@3c {
+		compatible = "gc,gc2155";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_pin_m0>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc2v8_dvp>;
+		dovdd-supply = <&vcc1v8_dvp>;
+		dvdd-supply = <&vcc1v8_dvp>;
+
+		/* hw changed the pwdn to gpio2_b5 */
+		pwdn-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc2155_out: endpoint {
+				remote-endpoint = <&cif_in>;
+			};
+		};
+	};
+
 	ov5695: ov5695@36 {
 		compatible = "ovti,ov5695";
 		reg = <0x36>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&cif_clkout_m0>;
 
 		clocks = <&cru SCLK_CIF_OUT>;
 		clock-names = "xvclk";
@@ -926,6 +961,10 @@
 	status = "okay";
 };
 
+&vip_mmu {
+	status = "okay";
+};
+
 &vopb {
 	status = "okay";
 };
@@ -947,6 +986,23 @@
 };
 
 &pinctrl {
+	cif-pin-m0 {
+		cif_pin_m0: cif-pin-m0 {
+			rockchip,pins =
+				<2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
+				<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
+				<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
+				<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
+				<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
+				<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
+				<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
+				<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
+				<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_sync */
+				<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */
+				<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkin */
+		};
+	};
+
 	headphone {
 		hp_det: hp-det {
 			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;

From 3922e7e85208269d206570f41417b50fd9fe03f1 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Mon, 16 Jul 2018 20:00:13 +0800
Subject: [PATCH 0657/1852] ARM64: config: enable cif and gc2155 for
 rk3326_linux_defconfig

Change-Id: I2d09fd1025bfbe9dec93e25598d3dd38f07748a5
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 arch/arm64/configs/rk3326_linux_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/configs/rk3326_linux_defconfig b/arch/arm64/configs/rk3326_linux_defconfig
index 533f9fb884d73..d8f55dd119f67 100644
--- a/arch/arm64/configs/rk3326_linux_defconfig
+++ b/arch/arm64/configs/rk3326_linux_defconfig
@@ -247,12 +247,14 @@ CONFIG_USB_VIDEO_CLASS=y
 # CONFIG_USB_GSPCA is not set
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
+CONFIG_VIDEO_ROCKCHIP_CIF=y
 CONFIG_VIDEO_ROCKCHIP_ISP1=y
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_ROCKCHIP_RGA=y
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
 # CONFIG_VIDEO_IR_I2C is not set
 CONFIG_VIDEO_OV5695=y
+CONFIG_VIDEO_GC2155=y
 # CONFIG_DVB_AU8522_V4L is not set
 # CONFIG_DVB_TUNER_DIB0070 is not set
 # CONFIG_DVB_TUNER_DIB0090 is not set

From 2213fcf83e4113ae885bc0242b7af9f711cd12cb Mon Sep 17 00:00:00 2001
From: huweiguo <hwg@rock-chips.com>
Date: Wed, 25 Jul 2018 15:48:21 +0800
Subject: [PATCH 0658/1852] net: wireless: rockchip_wlan: support ssv6051 wifi

Change-Id: I936a05f2c2b6b29298f1a1eb945ec3a2fedc5262
Signed-off-by: huweiguo <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/Kconfig    |     1 +
 drivers/net/wireless/rockchip_wlan/Makefile   |     1 +
 .../wireless/rockchip_wlan/ssv6xxx/Kconfig    |     8 +
 .../wireless/rockchip_wlan/ssv6xxx/Makefile   |    75 +
 .../rockchip_wlan/ssv6xxx/Makefile.android    |    95 +
 .../rockchip_wlan/ssv6xxx/android-build.sh    |    51 +
 .../rockchip_wlan/ssv6xxx/bridge/Kconfig      |    17 +
 .../rockchip_wlan/ssv6xxx/bridge/Makefile     |    22 +
 .../rockchip_wlan/ssv6xxx/bridge/aaa.mk       |    27 +
 .../rockchip_wlan/ssv6xxx/bridge/debug.c      |    35 +
 .../rockchip_wlan/ssv6xxx/bridge/debug.h      |    23 +
 .../rockchip_wlan/ssv6xxx/bridge/make.log     |     7 +
 .../rockchip_wlan/ssv6xxx/bridge/sdiobridge.c |  1153 +
 .../rockchip_wlan/ssv6xxx/bridge/sdiobridge.h |    49 +
 .../ssv6xxx/bridge/sdiobridge_pub.h           |   112 +
 .../wireless/rockchip_wlan/ssv6xxx/config.mak |   123 +
 .../rockchip_wlan/ssv6xxx/crypto/aes-armv4.S  |  1112 +
 .../rockchip_wlan/ssv6xxx/crypto/aes_glue.c   |    98 +
 .../ssv6xxx/crypto/sha1-armv4-large.S         |   503 +
 .../rockchip_wlan/ssv6xxx/crypto/sha1_glue.c  |   141 +
 .../ssv6xxx/firmware/ssv6051-wifi.cfg         |    91 +
 .../rockchip_wlan/ssv6xxx/gen-version.sh      |     4 +
 .../wireless/rockchip_wlan/ssv6xxx/genconf.sh |    25 +
 .../rockchip_wlan/ssv6xxx/hci/Makefile        |    19 +
 .../rockchip_wlan/ssv6xxx/hci/hctrl.h         |   169 +
 .../rockchip_wlan/ssv6xxx/hci/ssv_hci.c       |  1145 +
 .../rockchip_wlan/ssv6xxx/hci/ssv_hci.h       |    80 +
 .../ssv6xxx/hci_wrapper/Makefile              |    19 +
 .../ssv6xxx/hci_wrapper/ssv_huw.c             |   497 +
 .../ssv6xxx/hci_wrapper/ssv_huw.h             |   108 +
 .../rockchip_wlan/ssv6xxx/hwif/hwif.h         |    84 +
 .../rockchip_wlan/ssv6xxx/hwif/sdio/Makefile  |    21 +
 .../rockchip_wlan/ssv6xxx/hwif/sdio/sdio.c    |  1597 ++
 .../ssv6xxx/hwif/sdio/sdio_def.h              |    94 +
 .../rockchip_wlan/ssv6xxx/include/cabrio.h    |    28 +
 .../rockchip_wlan/ssv6xxx/include/ssv6200.h   |    98 +
 .../ssv6xxx/include/ssv6200_aux.h             | 18221 ++++++++++++++++
 .../ssv6xxx/include/ssv6200_common.h          |   483 +
 .../ssv6xxx/include/ssv6200_configuration.h   |   374 +
 .../ssv6xxx/include/ssv6200_reg.h             |  9694 ++++++++
 .../ssv6xxx/include/ssv6200_reg_sim.h         |   174 +
 .../rockchip_wlan/ssv6xxx/include/ssv_cfg.h   |    60 +
 .../ssv6xxx/include/ssv_conf_parser.h         |    32 +
 .../ssv6xxx/include/ssv_firmware_version.h    |    25 +
 .../ssv6xxx/include/ssv_version.h             |    13 +
 .../rockchip_wlan/ssv6xxx/parser-conf.sh      |    38 +
 .../rockchip_wlan/ssv6xxx/platform-config.mak |    97 +
 .../ssv6xxx/platforms/a33-generic-wlan.c      |   257 +
 .../ssv6xxx/platforms/a33-wifi.cfg            |    92 +
 .../rockchip_wlan/ssv6xxx/platforms/a33.cfg   |    18 +
 .../ssv6xxx/platforms/aml-s805-generic-wlan.c |   109 +
 .../ssv6xxx/platforms/aml-s805-wifi.cfg       |    86 +
 .../ssv6xxx/platforms/aml-s805.cfg            |    22 +
 .../ssv6xxx/platforms/aml-s905-generic-wlan.c |   157 +
 .../ssv6xxx/platforms/aml-s905-wifi.cfg       |    88 +
 .../ssv6xxx/platforms/aml-s905.cfg            |    26 +
 .../ssv6xxx/platforms/aml-t950-generic-wlan.c |   131 +
 .../ssv6xxx/platforms/aml-t950-wifi.cfg       |    87 +
 .../ssv6xxx/platforms/aml-t950.cfg            |    24 +
 .../platforms/atm7039-actions-generic-wlan.c  |   265 +
 .../platforms/atm7039-actions-wifi.cfg        |    87 +
 .../ssv6xxx/platforms/atm7039-actions.cfg     |    17 +
 .../rockchip_wlan/ssv6xxx/platforms/cli       |     6 +
 .../ssv6xxx/platforms/h3-generic-wlan.c       |   257 +
 .../ssv6xxx/platforms/h3-wifi.cfg             |    86 +
 .../rockchip_wlan/ssv6xxx/platforms/h3.cfg    |    18 +
 .../ssv6xxx/platforms/h8-generic-wlan.c       |   257 +
 .../ssv6xxx/platforms/h8-wifi.cfg             |    86 +
 .../rockchip_wlan/ssv6xxx/platforms/h8.cfg    |    18 +
 .../ssv6xxx/platforms/platform-config.mak     |    97 +
 .../ssv6xxx/platforms/rk3126-generic-wlan.c   |   269 +
 .../ssv6xxx/platforms/rk3126-wifi.cfg         |    91 +
 .../ssv6xxx/platforms/rk3126.cfg              |    22 +
 .../ssv6xxx/platforms/rk3128-generic-wlan.c   |   122 +
 .../ssv6xxx/platforms/rk3128-wifi.cfg         |    86 +
 .../ssv6xxx/platforms/rk3128.cfg              |    21 +
 .../ssv6xxx/platforms/rk322x-generic-wlan.c   |   122 +
 .../ssv6xxx/platforms/rk322x-wifi.cfg         |    86 +
 .../ssv6xxx/platforms/rk322x.cfg              |    21 +
 .../ssv6xxx/platforms/sc6138-generic-wlan.c   |    93 +
 .../ssv6xxx/platforms/sc6138-wifi.cfg         |    86 +
 .../ssv6xxx/platforms/sc6138.cfg              |    20 +
 .../ssv6xxx/platforms/t10-generic-wlan.c      |   286 +
 .../ssv6xxx/platforms/t10-wifi.cfg            |    88 +
 .../rockchip_wlan/ssv6xxx/platforms/t10.cfg   |    22 +
 .../ssv6xxx/platforms/v66-generic-wlan.c      |   250 +
 .../ssv6xxx/platforms/v66-wifi.cfg            |    86 +
 .../rockchip_wlan/ssv6xxx/platforms/v66.cfg   |    18 +
 .../ssv6xxx/platforms/x1000-generic-wlan.c    |   283 +
 .../ssv6xxx/platforms/x1000-wifi.cfg          |    88 +
 .../rockchip_wlan/ssv6xxx/platforms/x1000.cfg |    22 +
 .../platforms/xm-hi3518-generic-wlan.c        |    89 +
 .../ssv6xxx/platforms/xm-hi3518-wifi.cfg      |    86 +
 .../ssv6xxx/platforms/xm-hi3518.cfg           |    24 +
 .../wireless/rockchip_wlan/ssv6xxx/rules.mak  |    19 +
 .../rockchip_wlan/ssv6xxx/script/ap-aes.sh    |    52 +
 .../rockchip_wlan/ssv6xxx/script/ap-no_sec.sh |    25 +
 .../rockchip_wlan/ssv6xxx/script/ap-tkip.sh   |    50 +
 .../rockchip_wlan/ssv6xxx/script/ap.sh        |    40 +
 .../rockchip_wlan/ssv6xxx/script/ap2-aes.sh   |    32 +
 .../rockchip_wlan/ssv6xxx/script/ap_sta.sh    |    22 +
 .../ssv6xxx/script/check_con_ap.sh            |    55 +
 .../rockchip_wlan/ssv6xxx/script/clean_log.sh |     4 +
 .../wireless/rockchip_wlan/ssv6xxx/script/cli |     7 +
 .../wireless/rockchip_wlan/ssv6xxx/script/cpu |    13 +
 .../rockchip_wlan/ssv6xxx/script/dhcpd.conf   |   116 +
 .../rockchip_wlan/ssv6xxx/script/find_ssv_phy |    10 +
 .../ssv6xxx/script/find_ssv_wlan              |    10 +
 .../rockchip_wlan/ssv6xxx/script/genconf.sh   |    18 +
 .../rockchip_wlan/ssv6xxx/script/get_mac      |    10 +
 .../rockchip_wlan/ssv6xxx/script/hci_mib      |    28 +
 .../ssv6xxx/script/hostapd.conf.AES.template  |  1664 ++
 .../script/hostapd.conf.NO_SEC.template       |  1664 ++
 .../ssv6xxx/script/hostapd.conf.TKIP.template |  1665 ++
 .../ssv6xxx/script/hostapd.conf.template      |  1663 ++
 .../rockchip_wlan/ssv6xxx/script/kmsg.sh      |     2 +
 .../rockchip_wlan/ssv6xxx/script/license.txt  |    16 +
 .../ssv6xxx/script/load_ap_sta.sh             |   105 +
 .../ssv6xxx/script/load_unload.sh             |    12 +
 .../ssv6xxx/script/p2p-action.sh              |   115 +
 .../ssv6xxx/script/p2p.conf.template          |    21 +
 .../rockchip_wlan/ssv6xxx/script/p2p_dual.sh  |   102 +
 .../ssv6xxx/script/p2p_single.sh              |    87 +
 .../rockchip_wlan/ssv6xxx/script/pack         |    45 +
 .../ssv6xxx/script/pre-regular-test.sh        |    17 +
 .../rockchip_wlan/ssv6xxx/script/redoall      |     4 +
 .../rockchip_wlan/ssv6xxx/script/redodrv      |    12 +
 .../rockchip_wlan/ssv6xxx/script/redofw       |     4 +
 .../rockchip_wlan/ssv6xxx/script/release      |    44 +
 .../rockchip_wlan/ssv6xxx/script/scan.cfg     |     9 +
 .../rockchip_wlan/ssv6xxx/script/scan_conn.sh |   148 +
 .../rockchip_wlan/ssv6xxx/script/scan_test.sh |   125 +
 .../rockchip_wlan/ssv6xxx/script/scratch      |    11 +
 .../rockchip_wlan/ssv6xxx/script/showq        |    26 +
 .../rockchip_wlan/ssv6xxx/script/ssvcfg.sh    |    35 +
 .../ssv6xxx/script/sta.cfg.template           |    76 +
 .../rockchip_wlan/ssv6xxx/script/sta.sh       |    43 +
 .../ssv6xxx/script/template/hostapd.conf      |  1536 ++
 .../ssv6xxx/script/template/load_dhcp.sh      |    23 +
 .../rockchip_wlan/ssv6xxx/script/unload.sh    |     4 +
 .../rockchip_wlan/ssv6xxx/script/unload_ap.sh |     8 +
 .../ssv6xxx/script/unload_dhcp.sh             |     4 +
 .../ssv6xxx/script/wpa-cli-action.sh          |     1 +
 .../ssv6xxx/script/wpa.conf.template          |    13 +
 .../rockchip_wlan/ssv6xxx/smac/Makefile       |    33 +
 .../rockchip_wlan/ssv6xxx/smac/ampdu.c        |  2337 ++
 .../rockchip_wlan/ssv6xxx/smac/ampdu.h        |   225 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/ap.c  |   549 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/ap.h  |    35 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/dev.c |  5467 +++++
 .../wireless/rockchip_wlan/ssv6xxx/smac/dev.h |   564 +
 .../rockchip_wlan/ssv6xxx/smac/dev_tbl.h      |   213 +
 .../rockchip_wlan/ssv6xxx/smac/drv_comm.h     |    61 +
 .../rockchip_wlan/ssv6xxx/smac/efuse.c        |   380 +
 .../rockchip_wlan/ssv6xxx/smac/efuse.h        |    40 +
 .../rockchip_wlan/ssv6xxx/smac/init.c         |  1694 ++
 .../rockchip_wlan/ssv6xxx/smac/init.h         |    23 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/lib.c |    32 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/lib.h |    23 +
 .../rockchip_wlan/ssv6xxx/smac/linux_2_6_35.h |    32 +
 .../rockchip_wlan/ssv6xxx/smac/linux_3_0_0.h  |    20 +
 .../rockchip_wlan/ssv6xxx/smac/linux_80211.h  |    24 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/p2p.c |   306 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/p2p.h |    56 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/sar.c |   232 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/sar.h |    79 +
 .../wireless/rockchip_wlan/ssv6xxx/smac/sec.h |    61 +
 .../rockchip_wlan/ssv6xxx/smac/sec_ccmp.c     |   802 +
 .../rockchip_wlan/ssv6xxx/smac/sec_tkip.c     |   786 +
 .../rockchip_wlan/ssv6xxx/smac/sec_wep.c      |   227 +
 .../rockchip_wlan/ssv6xxx/smac/sec_wpi.c      |   473 +
 .../rockchip_wlan/ssv6xxx/smac/sec_wpi.h      |    40 +
 .../rockchip_wlan/ssv6xxx/smac/smartlink.c    |   352 +
 .../ssv6xxx/smac/ssv6xxx_debugfs.c            |   208 +
 .../ssv6xxx/smac/ssv6xxx_debugfs.h            |    25 +
 .../ssv6xxx/smac/ssv_cfgvendor.c              |  1254 ++
 .../ssv6xxx/smac/ssv_cfgvendor.h              |   245 +
 .../rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.c    |   637 +
 .../rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.h    |    28 +
 .../rockchip_wlan/ssv6xxx/smac/ssv_pm.c       |   202 +
 .../rockchip_wlan/ssv6xxx/smac/ssv_pm.h       |    36 +
 .../rockchip_wlan/ssv6xxx/smac/ssv_rc.c       |  1724 ++
 .../rockchip_wlan/ssv6xxx/smac/ssv_rc.h       |    48 +
 .../ssv6xxx/smac/ssv_rc_common.h              |   184 +
 .../rockchip_wlan/ssv6xxx/smac/wapi_sms4.c    |   259 +
 .../rockchip_wlan/ssv6xxx/smac/wapi_sms4.h    |    22 +
 .../ssv6xxx/ssv6051-generic-wlan.c            |   126 +
 .../rockchip_wlan/ssv6xxx/ssv6051.cfg         |    22 +
 .../rockchip_wlan/ssv6xxx/ssvdevice/Makefile  |    18 +
 .../rockchip_wlan/ssv6xxx/ssvdevice/backup    |    18 +
 .../rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c |  1727 ++
 .../rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.h |    50 +
 .../ssv6xxx/ssvdevice/ssvdevice.c             |   285 +
 .../rockchip_wlan/ssv6xxx/ver_info.pl         |    85 +
 .../rockchip_wlan/wifi_sys/rkwifi_sys_iface.c |     4 +
 include/linux/rfkill-wlan.h                   |     1 +
 net/rfkill/rfkill-wlan.c                      |     2 +
 197 files changed, 73806 insertions(+)
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/Kconfig
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile.android
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/android-build.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Kconfig
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/aaa.mk
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/make.log
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge_pub.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/config.mak
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes-armv4.S
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes_glue.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1-armv4-large.S
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1_glue.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/firmware/ssv6051-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/gen-version.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/genconf.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/hctrl.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/hwif.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio_def.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/cabrio.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_aux.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_common.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_configuration.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg_sim.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_cfg.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_conf_parser.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_firmware_version.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_version.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platform-config.mak
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/cli
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/platform-config.mak
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-wifi.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/rules.mak
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-aes.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-no_sec.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-tkip.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap2-aes.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap_sta.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/check_con_ap.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/clean_log.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cli
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cpu
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/dhcpd.conf
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_phy
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_wlan
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/genconf.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/get_mac
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hci_mib
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.AES.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.NO_SEC.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.TKIP.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/kmsg.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/license.txt
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_ap_sta.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_unload.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p-action.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p.conf.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_dual.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_single.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pack
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pre-regular-test.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redoall
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redodrv
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redofw
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/release
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_conn.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_test.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scratch
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/showq
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ssvcfg.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.cfg.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/hostapd.conf
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/load_dhcp.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_ap.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_dhcp.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa-cli-action.sh
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa.conf.template
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev_tbl.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/drv_comm.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_2_6_35.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_3_0_0.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_80211.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_ccmp.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_tkip.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wep.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/smartlink.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc_common.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051-generic-wlan.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051.cfg
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/Makefile
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/backup
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.h
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssvdevice.c
 create mode 100644 drivers/net/wireless/rockchip_wlan/ssv6xxx/ver_info.pl

diff --git a/drivers/net/wireless/rockchip_wlan/Kconfig b/drivers/net/wireless/rockchip_wlan/Kconfig
index a9083d67155d2..bc1b20354dde8 100644
--- a/drivers/net/wireless/rockchip_wlan/Kconfig
+++ b/drivers/net/wireless/rockchip_wlan/Kconfig
@@ -39,5 +39,6 @@ source "drivers/net/wireless/rockchip_wlan/rtl8723cs/Kconfig"
 source "drivers/net/wireless/rockchip_wlan/rtl8723ds/Kconfig"
 source "drivers/net/wireless/rockchip_wlan/rtl8822be/Kconfig"
 source "drivers/net/wireless/rockchip_wlan/mvl88w8977/Kconfig"
+source "drivers/net/wireless/rockchip_wlan/ssv6xxx/Kconfig"
 
 endif # WL_ROCKCHIP
diff --git a/drivers/net/wireless/rockchip_wlan/Makefile b/drivers/net/wireless/rockchip_wlan/Makefile
index a7acf4b826da2..fb0e47b2ecfd5 100644
--- a/drivers/net/wireless/rockchip_wlan/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_RTL8723BU) += rtl8723bu/
 obj-$(CONFIG_RTL8723CS)	+= rtl8723cs/
 obj-$(CONFIG_RTL8723DS) += rtl8723ds/
 obj-$(CONFIG_RTL8822BE)	+= rtl8822be/
+obj-$(CONFIG_SSV6051)	+= ssv6xxx/
 obj-$(CONFIG_MVL88W8977)	+= mvl88w8977/
 obj-$(CONFIG_WL_ROCKCHIP)	+= wifi_sys/rkwifi_sys_iface.o
 obj-$(CONFIG_WL_ROCKCHIP)	+= rkwifi/rk_wifi_config.o
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/Kconfig b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Kconfig
new file mode 100644
index 0000000000000..854cd8c1b632b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Kconfig
@@ -0,0 +1,8 @@
+menu "SouthSV 6XXX WLAN support"
+config SSV6051
+	tristate "ssv6XXX Wireless driver"
+	depends on MAC80211 && MMC
+	---help---
+		Enable SouthSV 6XXX WLAN kernel driver.
+
+endmenu
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
new file mode 100644
index 0000000000000..f73359799f603
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
@@ -0,0 +1,75 @@
+KMODULE_NAME=ssv6051
+
+KBUILD_TOP := drivers/net/wireless/rockchip_wlan/ssv6xxx
+
+KERNEL_TOP := $(PWD)
+FIRMWARE_PATH := $(KERNEL_TOP)/../vendor/rockchip/common/wifi/firmware
+KO_PATH := $(KERNEL_TOP)/../device/rockchip/common/wifi/modules/
+
+ifeq ($(KERNELRELEASE),)
+# current directory is driver
+CFGDIR = $(PWD)/../../../../config
+
+-include $(CFGDIR)/build_config.cfg
+-include $(CFGDIR)/rules.make
+
+endif
+
+include $(KBUILD_TOP)/ssv6051.cfg
+include $(KBUILD_TOP)/platform-config.mak
+
+
+EXTRA_CFLAGS := -I$(KBUILD_TOP) -I$(KBUILD_TOP)/include
+DEF_PARSER_H = $(KBUILD_TOP)/include/ssv_conf_parser.h
+$(shell env ccflags="$(ccflags-y)" $(KBUILD_TOP)/parser-conf.sh $(DEF_PARSER_H))
+
+KERN_SRCS := ssvdevice/ssvdevice.c
+KERN_SRCS += ssvdevice/ssv_cmd.c
+
+KERN_SRCS += hci/ssv_hci.c
+
+KERN_SRCS += smac/init.c
+KERN_SRCS += smac/dev.c
+KERN_SRCS += smac/ssv_rc.c
+KERN_SRCS += smac/ssv_ht_rc.c
+KERN_SRCS += smac/ap.c
+KERN_SRCS += smac/ampdu.c
+KERN_SRCS += smac/ssv6xxx_debugfs.c
+KERN_SRCS += smac/sec_ccmp.c
+KERN_SRCS += smac/sec_tkip.c
+KERN_SRCS += smac/sec_wep.c
+KERN_SRCS += smac/wapi_sms4.c
+KERN_SRCS += smac/sec_wpi.c
+KERN_SRCS += smac/efuse.c
+KERN_SRCS += smac/ssv_pm.c
+KERN_SRCS += smac/sar.c
+KERN_SRCS += smac/ssv_cfgvendor.c
+
+
+ifeq ($(findstring -DCONFIG_SSV_SMARTLINK, $(ccflags-y)), -DCONFIG_SSV_SMARTLINK)
+KERN_SRCS += smac/smartlink.c
+endif
+
+KERN_SRCS += hwif/sdio/sdio.c
+#KERNEL_MODULES += crypto
+
+ifeq ($(findstring -DCONFIG_SSV_SUPPORT_AES_ASM, $(ccflags-y)), -DCONFIG_SSV_SUPPORT_AES_ASM)
+KERN_SRCS += crypto/aes_glue.c
+KERN_SRCS += crypto/sha1_glue.c
+KERN_SRCS_S := crypto/aes-armv4.S
+KERN_SRCS_S += crypto/sha1-armv4-large.S
+endif
+
+KERN_SRCS += ssv6051-generic-wlan.c
+
+$(KMODULE_NAME)-y += $(KERN_SRCS_S:.S=.o)
+$(KMODULE_NAME)-y += $(KERN_SRCS:.c=.o)
+
+obj-$(CONFIG_SSV6200_CORE) += $(KMODULE_NAME).o
+
+$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-wifi.cfg $(FIRMWARE_PATH)/)
+$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-sw.bin $(FIRMWARE_PATH)/)
+#$(shell cp  $(KBUILD_TOP)/ssv6051.ko $(KO_PATH)/ssv6051.ko)
+
+
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile.android b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile.android
new file mode 100644
index 0000000000000..43c268e3eefc4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile.android
@@ -0,0 +1,95 @@
+PLATFORMS =
+
+KBUILD_TOP := $(PWD)
+include $(KBUILD_TOP)/platforms/$(PLATFORMS).cfg
+include $(KBUILD_TOP)/platforms/platform-config.mak
+
+PWD := $(shell pwd)
+
+ifeq ($(KERNELRELEASE),)
+# current directory is driver
+CFGDIR = $(PWD)/../../../../config
+
+-include $(CFGDIR)/build_config.cfg
+-include $(CFGDIR)/rules.make
+
+endif
+
+KMODULE_NAME=ssv6051
+EXTRA_CFLAGS := -I$(KBUILD_TOP) -I$(KBUILD_TOP)/include
+
+DEF_PARSER_H = $(KBUILD_TOP)/include/ssv_conf_parser.h
+$(shell env ccflags="$(ccflags-y)" $(KBUILD_TOP)/parser-conf.sh $(DEF_PARSER_H))
+
+KERN_SRCS := ssvdevice/ssvdevice.c
+KERN_SRCS += ssvdevice/ssv_cmd.c
+
+KERN_SRCS += hci/ssv_hci.c
+
+KERN_SRCS += smac/init.c
+KERN_SRCS += smac/dev.c
+KERN_SRCS += smac/ssv_rc.c
+KERN_SRCS += smac/ssv_ht_rc.c
+KERN_SRCS += smac/ap.c
+KERN_SRCS += smac/ampdu.c
+KERN_SRCS += smac/ssv6xxx_debugfs.c
+KERN_SRCS += smac/sec_ccmp.c
+KERN_SRCS += smac/sec_tkip.c
+KERN_SRCS += smac/sec_wep.c
+KERN_SRCS += smac/wapi_sms4.c
+KERN_SRCS += smac/sec_wpi.c
+KERN_SRCS += smac/efuse.c
+KERN_SRCS += smac/ssv_pm.c
+KERN_SRCS += smac/sar.c
+
+ifeq ($(findstring -DCONFIG_SSV_SMARTLINK, $(ccflags-y)), -DCONFIG_SSV_SMARTLINK)
+KERN_SRCS += smac/smartlink.c
+endif
+
+KERN_SRCS += hwif/sdio/sdio.c
+#KERNEL_MODULES += crypto
+
+ifeq ($(findstring -DCONFIG_SSV_SUPPORT_AES_ASM, $(ccflags-y)), -DCONFIG_SSV_SUPPORT_AES_ASM)
+KERN_SRCS += crypto/aes_glue.c
+KERN_SRCS += crypto/sha1_glue.c
+KERN_SRCS_S := crypto/aes-armv4.S
+KERN_SRCS_S += crypto/sha1-armv4-large.S
+endif
+
+
+KERN_SRCS += platforms/$(PLATFORMS)-generic-wlan.c
+
+$(KMODULE_NAME)-y += $(KERN_SRCS_S:.S=.o)
+$(KMODULE_NAME)-y += $(KERN_SRCS:.c=.o)
+
+obj-$(CONFIG_SSV6200_CORE) += $(KMODULE_NAME).o
+
+all:module strip
+
+module:
+	make  -C $(SSV_KERNEL_PATH) ARCH=$(SSV_ARCH) CROSS_COMPILE=$(SSV_CROSS) \
+	EXTRA_CFLAGS="$(EXTRA_CFLAGS)" M=$(PWD) modules
+
+install:
+	install -p -m 644 $(KMODULE_NAME).ko $(KMODDESTDIR)
+
+uninstall:
+	rm -f $(KMODDESTDIR)/$(KMODULE_NAME).ko
+    
+strip:
+	#cp eagle.ko $(KO_NAME).ko
+	#cp $(KO_NAME).ko $(DEFAULT_MODULES_DIR)
+	#cp ssv6200.ko $(DEFAULT_MODULES_DIR)
+	cp platforms/$(PLATFORMS)-wifi.cfg image/$(KMODULE_NAME)-wifi.cfg
+	cp $(KMODULE_NAME).ko image/$(KMODULE_NAME).ko
+	cp platforms/cli image
+ifneq ($(SSV_STRIP),)
+	cp $(KMODULE_NAME).ko image/$(KMODULE_NAME)_ori.ko
+	$(SSV_STRIP) --strip-unneeded image/$(KMODULE_NAME).ko
+	#$(SSV_STRIP) --strip-debug image/$(KMODULE_NAME).ko
+endif
+
+clean:
+	make -C $(SSV_KERNEL_PATH) ARCH=$(SSV_ARCH) CROSS_COMPILE=$(SSV_CROSS) \
+	M=$(PWD) clean
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/android-build.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/android-build.sh
new file mode 100644
index 0000000000000..51fe0f735efc0
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/android-build.sh
@@ -0,0 +1,51 @@
+#!/bin/bash
+prompt="Pick the target platform:"
+chip_options=("a33" \
+              "h8" \
+              "h3" \
+              "rk3126" \
+              "rk3128" \
+              "atm7039-action" \
+              "aml-s805" \
+              "aml-s905" \
+              "aml-t950" \
+              "xm-hi3518" \
+              "v66")
+PLATFORM=""
+
+select opt in "${chip_options[@]}" "Quit"; do 
+    case "$REPLY" in
+
+    1 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    2 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    3 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    4 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    5 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    6 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    7 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    8 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    9 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    10 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    11 ) echo "${chip_options[$REPLY-1]} is option";PLATFORM=${chip_options[$REPLY-1]};break;;
+    
+    $(( ${#chip_options[@]}+1 )) ) echo "Goodbye!"; break;;
+    *) echo "Invalid option. Try another one.";continue;;
+    esac
+done
+
+if [ "$PLATFORM" != "" ]; then
+./ver_info.pl include/ssv_version.h
+
+if [ $? -eq 0 ]; then
+    echo "Please check SVN first !!"
+else
+cp Makefile.android Makefile
+sed -i 's,PLATFORMS =,PLATFORMS = '"$PLATFORM"',g' Makefile
+make clean
+make
+echo "Done ko!"
+fi
+else
+echo "Fail!"
+fi
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Kconfig b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Kconfig
new file mode 100644
index 0000000000000..f685f75e9df6a
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Kconfig
@@ -0,0 +1,17 @@
+config SSV_SDIO_BRIDGE_HW
+	tristate
+	default m
+	depends on MMC
+	---help---
+	  This option enables the SDIO bus support in ssvcabrio.
+
+	  Say Y, if you have a ssv SDIO device.
+
+config SSV_SDIO_BRIDGE_DEBUGFS
+	bool "SSV ssvsdiobridge debugging"
+	depends on DEBUG_FS
+	---help---
+	  Say Y, if you need access to ssvsdiobridge's statistics.
+
+	  Also required for changing debug message flags at run time.
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Makefile
new file mode 100644
index 0000000000000..e6d3026aa97db
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/Makefile
@@ -0,0 +1,22 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/ssvdevice/Module.symvers
+
+#Define CONFIG_CABRIO_DEBUG to show debug messages
+ccflags-y += -DCONFIG_CABRIO_DEBUG
+
+KMODULE_NAME=ssv6200_sdiobridge
+KERN_SRCS := sdiobridge.c
+KERN_SRCS += debug.c
+
+
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/aaa.mk b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/aaa.mk
new file mode 100644
index 0000000000000..0284a51480f83
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/aaa.mk
@@ -0,0 +1,27 @@
+#aaa.mk - what is this used for?
+
+obj-m     += ssvsdiobridge.o
+
+ssvsdiobridge-y +=	sdiobridge.o
+ssvsdiobridge-y +=	debug.o
+
+
+
+#Define CONFIG_CABRIO_DEBUG to show debug messages
+ccflags-y += -DCONFIG_CABRIO_DEBUG
+
+ifndef ($(KBUILD_EXTMOD),)
+KDIR=/lib/modules/`uname -r`/build
+
+_all:
+	$(MAKE) -C $(KDIR) M=$(PWD) KBUILD_EXTRA_SYMBOLS=$(PWD)/../ssvdevice/Module.symvers modules 2>&1 | tee make.log
+clean:
+	$(MAKE) -C $(KDIR) M=$(PWD) clean
+	rm -f make.log
+	
+install:
+	@-rmmod ssvsdiobridge
+	$(MAKE) INSTALL_MOD_DIR=kernel/drivers/net/wireless/ssv6200 -C $(KDIR) M=$(PWD) modules_install
+	modprobe ssvsdiobridge
+
+endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.c
new file mode 100644
index 0000000000000..75e0c2f55354c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/export.h>
+#include <asm/unaligned.h>
+#include "debug.h"
+int ssv_sdiobridge_init_debug(struct ssv_sdiobridge_glue *glue)
+{
+ glue->debugfs = debugfs_create_dir("ssv",
+         NULL);
+ if (!glue->debugfs)
+  return -ENOMEM;
+ glue->dump_entry = debugfs_create_bool("sdiobridge_dump", S_IRUSR, glue->debugfs, &glue->dump);
+ return 0;
+}
+void ssv_sdiobridge_deinit_debug(struct ssv_sdiobridge_glue *glue)
+{
+    if (!glue->dump_entry)
+  debugfs_remove(glue->dump_entry);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.h
new file mode 100644
index 0000000000000..8431a48a5ae24
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/debug.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef DEBUG_H
+#define DEBUG_H 
+#include "sdiobridge.h"
+#include <linux/debugfs.h>
+int ssv_sdiobridge_init_debug(struct ssv_sdiobridge_glue *glue);
+void ssv_sdiobridge_deinit_debug(struct ssv_sdiobridge_glue *glue);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/make.log b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/make.log
new file mode 100644
index 0000000000000..acdaa681ece90
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/make.log
@@ -0,0 +1,7 @@
+make[1]: Entering directory `/usr/src/linux-headers-3.2.0-48-generic'
+  CC [M]  /root/felix/1015-Release/final/host_drivers/Linux/ssv/bridge/sdiobridge.o
+/root/felix/1015-Release/final/host_drivers/Linux/ssv/bridge/sdiobridge.c:44:33: fatal error: ../include/sdio_def.h: No such file or directory
+compilation terminated.
+make[2]: *** [/root/felix/1015-Release/final/host_drivers/Linux/ssv/bridge/sdiobridge.o] Error 1
+make[1]: *** [_module_/root/felix/1015-Release/final/host_drivers/Linux/ssv/bridge] Error 2
+make[1]: Leaving directory `/usr/src/linux-headers-3.2.0-48-generic'
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.c
new file mode 100644
index 0000000000000..cf413717274e0
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.c
@@ -0,0 +1,1153 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/printk.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/slab.h>
+#include <asm/uaccess.h>
+#include <linux/version.h>
+#include <hwif/sdio/sdio_def.h>
+#include "sdiobridge.h"
+#include "debug.h"
+#define BLOCKSIZE 0x40
+#define RXBUFLENGTH 1024*3
+#define RXBUFSIZE 512
+enum ssvcabrio_int
+{
+    SSVCABRIO_INT_RX = 0x00000001,
+    SSVCABRIO_INT_TX = 0x00000002,
+    SSVCABRIO_INT_GPIO = 0x00000004,
+    SSVCABRIO_INT_SYS = 0x00000008,
+};
+#define CHECK_RET(_fun) \
+ do { \
+  if (0 != _fun) \
+   printk("File = %s\nLine = %d\nFunc=%s\nDate=%s\nTime=%s\n", __FILE__, __LINE__, __FUNCTION__, __DATE__, __TIME__); \
+ } while (0)
+static unsigned int ssv_sdiobridge_ioctl_major = 0;
+static unsigned int num_of_dev = 1;
+static struct cdev ssv_sdiobridge_ioctl_cdev;
+static struct class *fc;
+static struct ssv_sdiobridge_glue *glue;
+struct ssv_rxbuf
+{
+    struct list_head list;
+    u32 rxsize;
+    u8 rxdata[RXBUFLENGTH];
+};
+static const struct sdio_device_id ssv_sdiobridge_devices[] =
+{
+    {SDIO_DEVICE(MANUFACTURER_SSV_CODE, (MANUFACTURER_ID_CABRIO_BASE | 0x0))},
+    {}
+};
+MODULE_DEVICE_TABLE(sdio, ssv_sdiobridge_devices);
+static long ssv_sdiobridge_ioctl_getFuncfocus(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->out_data_len < 1)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u8 out_data = glue->funcFocus;
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&out_data,sizeof(out_data)));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data, &out_data, sizeof(out_data)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_setFuncfocus(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    int retval =0;
+    if ( pcmd_data->out_data_len < 0)
+    {
+        retval = -EFAULT;
+        dev_err(glue->dev, "%s : input length must < 0",__FUNCTION__);
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&glue->funcFocus,(int __user *)compat_ptr((unsigned long)pcmd_data->in_data),sizeof(glue->funcFocus)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(&glue->funcFocus,(int __user *)pcmd_data->in_data,sizeof(glue->funcFocus)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_getBusWidth(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->out_data_len < 1)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u8 out_data = 1;
+        if ( func->card->host->ios.bus_width != MMC_BUS_WIDTH_1 )
+        {
+            out_data = 4;
+        }
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&out_data,sizeof(out_data)));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&out_data,sizeof(out_data)));
+        }
+    }
+    return retval;
+}
+#if 0
+static long ssv_sdiobridge_ioctl_setBusWidth(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    int retval =0;
+    struct ssv_sdiobridge_cmd *pData;
+    u8 inData[1];
+    copy_from_user(pData,(int __user *)arg,sizeof(*pData));
+    if ( isCompat )
+    {
+        copy_from_user(&cmd_data,(int __user *)compat_ptr((unsigned long)pucmd_data),sizeof(*pucmd_data));
+    }
+    else
+    {
+        copy_from_user(&cmd_data,(int __user *)pucmd_data,sizeof(*pucmd_data));
+    }
+    if ( pData->in_data_len < 0)
+    {
+        retval = -EFAULT;
+        dev_err(glue->dev, "%s : input length must > 1",__FUNCTION__);
+    }
+    else
+    {
+        if ( pData->in_data == 1 )
+        {
+            if ( (func->card->host->caps & MMC_CAP_4_BIT_DATA) && !(func->card->cccr.low_speed && !func->card->cccr.wide_bus) )
+            {
+                extern void mmc_set_bus_width(struct mmc_host *host, unsigned int width);
+                u8 ctrl = sdio_f0_readb(func,SDIO_CCCR_IF,&retval);
+                if (retval)
+                    return retval;
+                if (!(ctrl & SDIO_BUS_WIDTH_4BIT))
+                    return 0;
+                ctrl &= ~SDIO_BUS_WIDTH_4BIT;
+                ctrl |= SDIO_BUS_ASYNC_INT;
+                sdio_f0_writeb(func,ctrl,SDIO_CCCR_IF,&retval);
+                if (retval)
+                    return retval;
+                mmc_set_bus_width(func->card->host, MMC_BUS_WIDTH_1);
+            }
+        }
+        else
+        {
+            if ( func->card->host->ios.bus_width != MMC_BUS_WIDTH_4 )
+            {
+            }
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_getBlockMode(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->out_data_len < 1)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&out_data,sizeof(out_data));
+        }
+        else
+        {
+            copy_to_user((int __user *)pucmd_data->out_data,&out_data,sizeof(out_data));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_setBlockMode(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->in_data_len < 1)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            copy_from_user(&glue->blockMode,(int __user *)pucmd_data->in_data,sizeof(glue->blockMode));
+        }
+    }
+    return retval;
+}
+#endif
+static long ssv_sdiobridge_ioctl_getBlockSize(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->out_data_len < 2)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&glue->blockSize,sizeof(glue->blockSize)));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&glue->blockSize,sizeof(glue->blockSize)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_setBlockSize(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->in_data_len < 2)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&glue->blockSize,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(glue->blockSize)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(&glue->blockSize,(int __user *)pucmd_data->in_data,sizeof(glue->blockSize)));
+        }
+        dev_err(glue->dev,"%s: blockSize [%d]\n",__FUNCTION__,glue->blockSize);
+        sdio_claim_host(func);
+        sdio_set_block_size(func,glue->blockSize);
+        sdio_release_host(func);
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_readByte(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->out_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u32 address;
+        u8 out_data;
+        int ret = 0;
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&address,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(address)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(&address,(int __user *)pucmd_data->in_data,sizeof(address)));
+        }
+        sdio_claim_host(func);
+        if ( glue->funcFocus == 0 )
+        {
+            out_data = sdio_f0_readb(func, address, &ret);
+        }
+        else
+        {
+            out_data = sdio_readb(func, address, &ret);
+        }
+        sdio_release_host(func);
+        dev_err(glue->dev,"%s: [%X] [%02X] ret:[%d]\n",__FUNCTION__,address,out_data,ret);
+        if ( !ret )
+        {
+            if ( isCompat )
+            {
+                CHECK_RET(copy_to_user((void *)compat_ptr((unsigned long)pucmd_data->out_data),&out_data,sizeof(out_data)));
+            }
+            else
+            {
+                CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&out_data,sizeof(out_data)));
+            }
+        }
+        else
+        {
+            dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_writeByte(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->in_data_len < 5)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u8 tmp[5];
+        u32 address;
+        u8 data;
+        int ret = 0;
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(tmp,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(tmp)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(tmp,(int __user *)pucmd_data->in_data,sizeof(tmp)));
+        }
+        address = *((u32 *)tmp);
+        data = tmp[4];
+        sdio_claim_host(func);
+        if ( glue->funcFocus == 0 )
+        {
+            sdio_f0_writeb(func,data, address, &ret);
+        }
+        else
+        {
+            sdio_writeb(func,data, address, &ret);
+        }
+        sdio_release_host(func);
+        if ( ret )
+        {
+            dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_getMultiByteIOPort(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->out_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&glue->dataIOPort,sizeof(glue->dataIOPort)));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&glue->dataIOPort,sizeof(glue->dataIOPort)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_setMultiByteIOPort(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->in_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&glue->dataIOPort,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(glue->dataIOPort)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(&glue->dataIOPort,(int __user *)pucmd_data->in_data,sizeof(glue->dataIOPort)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_readMultiByte(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    u8 *tmpdata;
+    int ret;
+    int readsize;
+    tmpdata = kzalloc(pcmd_data->out_data_len, GFP_KERNEL);
+    if ( tmpdata == NULL )
+    {
+        dev_err(glue->dev,"%s: error : alloc buf error size:%d",__FUNCTION__,pcmd_data->out_data_len);
+        return -1;
+    }
+    readsize = sdio_align_size(func,pcmd_data->out_data_len);
+    sdio_claim_host(func);
+    ret = sdio_memcpy_fromio(func, tmpdata,glue->dataIOPort, readsize );
+    sdio_release_host(func);
+    if (unlikely(glue->dump))
+    {
+        printk(KERN_DEBUG "%s: READ data address[%08x] len[%d] readsize[%d]\n",__FUNCTION__,glue->dataIOPort,(int)pcmd_data->out_data_len,readsize);
+        print_hex_dump(KERN_DEBUG, "ssv_sdio: READ ",
+                       DUMP_PREFIX_OFFSET, 16, 1,
+                       tmpdata, pcmd_data->out_data_len, false);
+    }
+    if ( !ret )
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),tmpdata,pcmd_data->out_data_len));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,tmpdata,pcmd_data->out_data_len));
+        }
+    }
+    else
+    {
+        dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+        retval = -1;
+    }
+    kfree(tmpdata);
+    dev_err(glue->dev,"%s(): %d\n", __FUNCTION__, ret);
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_writeMultiByte(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    u8 *tmpdata;
+    int ret;
+    int readsize ;
+    tmpdata = kzalloc(pcmd_data->in_data_len, GFP_KERNEL);
+    if ( tmpdata == NULL )
+    {
+        dev_err(glue->dev,"%s: error : alloc buf error size:%d",__FUNCTION__,pcmd_data->out_data_len);
+        return -1;
+    }
+    if ( isCompat )
+    {
+        CHECK_RET(copy_from_user(tmpdata,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),pcmd_data->in_data_len));
+    }
+    else
+    {
+        CHECK_RET(copy_from_user(tmpdata,(int __user *)pucmd_data->in_data,pcmd_data->in_data_len));
+    }
+    readsize = sdio_align_size(func,pcmd_data->in_data_len);
+    if (unlikely(glue->dump))
+    {
+        printk(KERN_DEBUG "%s: READ data address[%08x] len[%d] readsize[%d]\n",__FUNCTION__,glue->dataIOPort,(int)pcmd_data->in_data_len,readsize);
+        print_hex_dump(KERN_DEBUG, "ssv_sdio: WRITE ",
+                       DUMP_PREFIX_OFFSET, 16, 1,
+                       tmpdata, pcmd_data->in_data_len, false);
+    }
+    sdio_claim_host(func);
+    ret = sdio_memcpy_toio(func, glue->dataIOPort,tmpdata, readsize);
+    sdio_release_host(func);
+    if ( ret )
+    {
+        dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+        retval = -1;
+    }
+    kfree(tmpdata);
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_getMultiByteRegIOPort(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->out_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&glue->regIOPort,sizeof(glue->regIOPort)));
+        }
+        else
+        {
+            CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&glue->regIOPort,sizeof(glue->regIOPort)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_setMultiByteRegIOPort(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->in_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&glue->regIOPort,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(glue->regIOPort)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(&glue->regIOPort,(int __user *)pucmd_data->in_data,sizeof(glue->regIOPort)));
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_readReg(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->in_data_len < 4 || pcmd_data->out_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u8 tmpdata[4];
+        int ret = 0;
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(tmpdata,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(tmpdata)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(tmpdata,(int __user *)pucmd_data->in_data,sizeof(tmpdata)));
+        }
+        sdio_claim_host(func);
+        dev_err(glue->dev,"%s: read reg 1 [%02X][%02X][%02X][%02X]\n",__FUNCTION__,tmpdata[0],tmpdata[1],tmpdata[2],tmpdata[3]);
+        ret = sdio_memcpy_toio(func, glue->regIOPort, tmpdata, 4);
+        ret = sdio_memcpy_fromio(func, tmpdata, glue->regIOPort, 4);
+        sdio_release_host(func);
+        dev_err(glue->dev,"%s: read reg 2 [%02X][%02X][%02X][%02X] ret:%d\n",__FUNCTION__,tmpdata[0],tmpdata[1],tmpdata[2],tmpdata[3],ret);
+        if ( !ret )
+        {
+            if ( isCompat )
+            {
+                CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),tmpdata,sizeof(tmpdata)));
+            }
+            else
+            {
+                CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,tmpdata,sizeof(tmpdata)));
+            }
+        }
+        else
+        {
+            dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static long ssv_sdiobridge_ioctl_writeReg(struct ssv_sdiobridge_glue *glue,unsigned int cmd, struct ssv_sdiobridge_cmd *pcmd_data,struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    long retval =0;
+    if ( pcmd_data->in_data_len < 8)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u8 tmpdata[8];
+        int ret = 0;
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(tmpdata,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(tmpdata)));
+        }
+        else
+        {
+            CHECK_RET(copy_from_user(tmpdata,(int __user *)pucmd_data->in_data,sizeof(tmpdata)));
+        }
+        dev_err(glue->dev,"%s: write reg ADR[%02X%02X%02X%02X] [%02X][%02X][%02X][%02X]\n",__FUNCTION__,tmpdata[3],tmpdata[2],tmpdata[1],tmpdata[0],
+            tmpdata[7], tmpdata[6], tmpdata[5], tmpdata[4]);
+        sdio_claim_host(func);
+        ret = sdio_memcpy_toio(func, glue->regIOPort, tmpdata, 8);
+        sdio_release_host(func);
+        if ( ret )
+        {
+            dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static int ssv_sdiobridge_device_open(struct inode *inode, struct file *filp)
+{
+    dev_err(glue->dev,"%s():\n", __FUNCTION__);
+    filp->private_data = glue;
+    return 0;
+}
+static int ssv_sdiobridge_device_close(struct inode *inode, struct file *filp)
+{
+    dev_err(glue->dev,"%s():\n", __FUNCTION__);
+    return 0;
+}
+static long ssv_sdiobridge_device_ioctl_process(struct ssv_sdiobridge_glue *glue, unsigned int cmd, struct ssv_sdiobridge_cmd *pucmd_data,bool isCompat)
+{
+    struct ssv_sdiobridge_cmd cmd_data;
+    long retval=0;
+    if ( isCompat )
+    {
+        CHECK_RET(copy_from_user(&cmd_data,(int __user *)pucmd_data,sizeof(*pucmd_data)));
+    }
+    else
+    {
+        CHECK_RET(copy_from_user(&cmd_data,(int __user *)pucmd_data,sizeof(*pucmd_data)));
+    }
+#if 0
+#ifdef __x86_64
+    dev_err(glue->dev,"%s: isCompat[%d] [%lX] [%lX] [%X] \n",__FUNCTION__,isCompat,IOCTL_SSVSDIO_GET_FUNCTION_FOCUS,IOCTL_SSVSDIO_READ_DATA,cmd);
+#else
+    dev_err(glue->dev,"%s: isCompat[%d] [%X] [%X] [%X] \n",__FUNCTION__,isCompat,IOCTL_SSVSDIO_GET_FUNCTION_FOCUS,IOCTL_SSVSDIO_READ_DATA,cmd);
+#endif
+#endif
+    switch (cmd)
+    {
+        case IOCTL_SSVSDIO_GET_FUNCTION_FOCUS:
+            retval = ssv_sdiobridge_ioctl_getFuncfocus(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_SET_FUNCTION_FOCUS:
+            retval = ssv_sdiobridge_ioctl_setFuncfocus(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_GET_BUS_WIDTH:
+            retval = ssv_sdiobridge_ioctl_getBusWidth(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+#if 0
+        case IOCTL_SSVSDIO_SET_BUS_WIDTH:
+            retval = ssv_sdiobridge_ioctl_setBusWidth(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_GET_BUS_CLOCK:
+            break;
+        case IOCTL_SSVSDIO_SET_BUS_CLOCK:
+            break;
+        case IOCTL_SSVSDIO_GET_BLOCK_MODE:
+            retval = ssv_sdiobridge_ioctl_getBlockMode(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_SET_BLOCK_MODE:
+            retval = ssv_sdiobridge_ioctl_setBlockMode(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+#endif
+        case IOCTL_SSVSDIO_GET_BLOCKLEN:
+            retval = ssv_sdiobridge_ioctl_getBlockSize(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_SET_BLOCKLEN:
+            retval = ssv_sdiobridge_ioctl_setBlockSize(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_READ_BYTE:
+            retval = ssv_sdiobridge_ioctl_readByte(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_WRITE_BYTE:
+            retval = ssv_sdiobridge_ioctl_writeByte(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_GET_MULTI_BYTE_IO_PORT:
+            retval = ssv_sdiobridge_ioctl_getMultiByteIOPort(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_SET_MULTI_BYTE_IO_PORT:
+            retval = ssv_sdiobridge_ioctl_setMultiByteIOPort(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_READ_MULTI_BYTE:
+            retval = ssv_sdiobridge_ioctl_readMultiByte(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_WRITE_MULTI_BYTE:
+            retval = ssv_sdiobridge_ioctl_writeMultiByte(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_GET_MULTI_BYTE_REG_IO_PORT:
+            retval = ssv_sdiobridge_ioctl_getMultiByteRegIOPort(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_SET_MULTI_BYTE_REG_IO_PORT:
+            retval = ssv_sdiobridge_ioctl_setMultiByteRegIOPort(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_READ_REG:
+            retval = ssv_sdiobridge_ioctl_readReg(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_WRITE_REG:
+            retval = ssv_sdiobridge_ioctl_writeReg(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+    }
+    return retval;
+}
+static long ssv_sdiobridge_device_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+    struct ssv_sdiobridge_glue *glue =filp->private_data;
+    long retval=0;
+    struct ssv_sdiobridge_cmd *pucmd_data;
+    pucmd_data = (struct ssv_sdiobridge_cmd *)arg;
+    retval = ssv_sdiobridge_device_ioctl_process( glue,cmd,pucmd_data,true);
+    return retval;
+}
+static long ssv_sdiobridge_device_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+    struct ssv_sdiobridge_glue *glue =filp->private_data;
+    long retval=0;
+    struct ssv_sdiobridge_cmd *pucmd_data;
+    pucmd_data = (struct ssv_sdiobridge_cmd *)arg;
+    retval = ssv_sdiobridge_device_ioctl_process( glue,cmd,pucmd_data,false);
+    return retval;
+}
+static bool ssv_sdiobridge_have_data(struct ssv_sdiobridge_glue *glue)
+{
+    dev_err(glue->dev,"%s(): !list_empty(&glue->rxreadybuf)[%d]\n", __FUNCTION__,!list_empty(&glue->rxreadybuf));
+    return !list_empty(&glue->rxreadybuf);
+}
+static ssize_t ssv_sdiobridge_device_read(struct file *filp,
+        char *buffer,
+        size_t length,
+        loff_t *offset)
+{
+    struct ssv_sdiobridge_glue *glue =filp->private_data;
+    struct ssv_rxbuf *bf;
+    int copylength;
+    dev_err(glue->dev,"%s():\n", __FUNCTION__);
+    spin_lock_bh(&glue->rxbuflock);
+    if (list_empty(&glue->rxreadybuf))
+    {
+        spin_unlock_bh(&glue->rxbuflock);
+        dev_err(glue->dev,"%s():no data for read \n", __FUNCTION__);
+#if 1
+        if ( wait_event_interruptible(glue->read_wq, ssv_sdiobridge_have_data(glue))!=0)
+        {
+            dev_err(glue->dev,"%s():not get data ?? \n", __FUNCTION__);
+            return -1;
+        }
+#else
+        wait_event(glue->read_wq,ssv_sdiobridge_have_data(glue));
+#endif
+        spin_lock_bh(&glue->rxbuflock);
+        if (list_empty(&glue->rxreadybuf))
+        {
+            spin_unlock_bh(&glue->rxbuflock);
+            dev_err(glue->dev,"%s():stop ?? \n", __FUNCTION__);
+            return -1;
+        }
+    }
+    bf = list_first_entry(&glue->rxreadybuf, struct ssv_rxbuf, list);
+    list_del(&bf->list);
+    spin_unlock_bh(&glue->rxbuflock);
+    copylength = min(bf->rxsize,(u32)length);
+    CHECK_RET(copy_to_user((int __user *)buffer,bf->rxdata,copylength));
+    dev_err(glue->dev,"%s():get rx data : data len:[%d], user read len:[%d],real read len:[%d] \n", __FUNCTION__,bf->rxsize,(u32)length,copylength);
+    spin_lock_bh(&glue->rxbuflock);
+    list_add_tail(&bf->list, &glue->rxbuf);
+    spin_unlock_bh(&glue->rxbuflock);
+    return copylength;
+}
+static ssize_t ssv_sdiobridge_device_write(struct file *filp,
+        const char *buff,
+        size_t len,
+        loff_t *off)
+{
+    struct ssv_sdiobridge_glue *glue =filp->private_data;
+    struct sdio_func *func = dev_to_sdio_func(glue->dev);
+    u8 *tmpdata;
+    int ret;
+    dev_err(glue->dev,"%s():\n", __FUNCTION__);
+    tmpdata = kzalloc(len, GFP_KERNEL);
+    if ( tmpdata == NULL )
+    {
+        dev_err(glue->dev,"%s: error : alloc buf error size:%d",__FUNCTION__,(u32)len);
+        return -1;
+    }
+    CHECK_RET(copy_from_user(tmpdata,(int __user *)buff,len));
+    if (unlikely(glue->dump))
+    {
+        printk(KERN_DEBUG "%s: WRITE data address[%08x] len[%d] readsize[%d]\n",__FUNCTION__,glue->dataIOPort,(int)len,sdio_align_size(func,len));
+        print_hex_dump(KERN_DEBUG, "ssv_sdio: WRITE ",
+                       DUMP_PREFIX_OFFSET, 16, 1,
+                       tmpdata, len, false);
+    }
+    sdio_claim_host(func);
+    ret = sdio_memcpy_toio(func, glue->dataIOPort,tmpdata, sdio_align_size(func,len));
+    sdio_release_host(func);
+    kfree(tmpdata);
+    if ( ret )
+    {
+        dev_err(glue->dev,"%s: error : %d",__FUNCTION__,ret);
+        return -1;
+    }
+    return len;
+}
+struct file_operations fops =
+{
+    .owner = THIS_MODULE,
+    .read = ssv_sdiobridge_device_read,
+    .write = ssv_sdiobridge_device_write,
+    .open = ssv_sdiobridge_device_open,
+    .release = ssv_sdiobridge_device_close,
+    .compat_ioctl = ssv_sdiobridge_device_compat_ioctl,
+    .unlocked_ioctl = ssv_sdiobridge_device_ioctl
+};
+static void ssv_sdiobridge_irq_process(struct sdio_func *func,
+                                       struct ssv_sdiobridge_glue *glue)
+{
+    int err_ret;
+    u8 status;
+    sdio_claim_host(func);
+    status = sdio_readb(func, REG_INT_STATUS, &err_ret);
+    if ( status & SSVCABRIO_INT_RX )
+    {
+        struct ssv_rxbuf *bf;
+        int readsize;
+        spin_lock_bh(&glue->rxbuflock);
+        if (list_empty(&glue->rxbuf))
+        {
+            spin_unlock_bh(&glue->rxbuflock);
+            sdio_release_host(func);
+            dev_err(glue->dev, "ssv_sdiobridge_irq_process no avaible rx buf list??\n");
+            return;
+        }
+        else
+        {
+            bf = list_first_entry(&glue->rxbuf, struct ssv_rxbuf, list);
+            list_del(&bf->list);
+        }
+        spin_unlock_bh(&glue->rxbuflock);
+        bf->rxsize = (int)(sdio_readb(func, REG_CARD_PKT_LEN_0, &err_ret)&0xff);
+        dev_err(glue->dev, "sdio read rx size[%08x] 0x10[%02x]\n",bf->rxsize, sdio_readb(func, REG_CARD_PKT_LEN_0, &err_ret)&0xff);
+        bf->rxsize = bf->rxsize | ((sdio_readb(func, REG_CARD_PKT_LEN_1, &err_ret)&0xff)<<0x8);
+        readsize = sdio_align_size(func,bf->rxsize);
+        dev_err(glue->dev, "sdio read rx size[%08x] 0x11[%02x] readsize[%d]\n",bf->rxsize, sdio_readb(func, REG_CARD_PKT_LEN_1, &err_ret)&0xff,readsize);
+        err_ret = sdio_memcpy_fromio(func, bf->rxdata, glue->dataIOPort, readsize);
+        sdio_release_host(func);
+        dev_err(glue->dev, "ssv_sdiobridge_irq_process read 53, %d bytes  ret:[%d]\n", readsize,err_ret );
+        if (unlikely(glue->dump))
+        {
+            printk(KERN_DEBUG "ssv_sdiobridge_irq_process: READ data address[%08x] len[%d] readsize[%d]\n",glue->dataIOPort,(int)bf->rxsize,readsize);
+            print_hex_dump(KERN_DEBUG, "ssv_sdio: READ ",
+                           DUMP_PREFIX_OFFSET, 16, 1,
+                           bf->rxdata, bf->rxsize, false);
+        }
+        if (WARN_ON(err_ret))
+        {
+            dev_err(glue->dev, "ssv_sdiobridge_irq_process read failed (%d)\n", err_ret);
+            spin_lock_bh(&glue->rxbuflock);
+            list_add_tail(&bf->list, &glue->rxbuf);
+            spin_unlock_bh(&glue->rxbuflock);
+        }
+        else
+        {
+            spin_lock_bh(&glue->rxbuflock);
+            list_add_tail(&bf->list, &glue->rxreadybuf);
+            wake_up(&glue->read_wq);
+            spin_unlock_bh(&glue->rxbuflock);
+        }
+    }
+    else
+    {
+        sdio_release_host(func);
+    }
+}
+static void ssv_sdiobridge_irq_handler(struct sdio_func *func)
+{
+    struct ssv_sdiobridge_glue *glue = sdio_get_drvdata(func);
+    dev_err(&func->dev, "ssv_sdiobridge_irq_handler\n");
+    WARN_ON(glue == NULL);
+    if ( glue != NULL )
+    {
+        atomic_set(&glue->irq_handling, 1);
+        ssv_sdiobridge_irq_process(func,glue);
+        atomic_set(&glue->irq_handling, 0);
+        wake_up(&glue->irq_wq);
+    }
+}
+static void ssv_sdiobridge_irq_enable(struct sdio_func *func,
+                                      struct ssv_sdiobridge_glue *glue)
+{
+    int ret;
+    func = dev_to_sdio_func(glue->dev);
+    sdio_claim_host(func);
+    dev_err(glue->dev, "ssv_sdiobridge_irq_enable\n");
+    ret = sdio_claim_irq(func, ssv_sdiobridge_irq_handler);
+    if (ret)
+        dev_err(glue->dev, "Failed to claim sdio irq: %d\n", ret);
+    sdio_release_host(func);
+}
+static bool ssv_sdiobridge_is_on_irq(struct ssv_sdiobridge_glue *glue)
+{
+    return !atomic_read(&glue->irq_handling);
+}
+static void ssv_sdiobridge_irq_disable(struct ssv_sdiobridge_glue *glue,bool iswaitirq)
+{
+    struct sdio_func *func;
+    int ret;
+    dev_err(glue->dev, "ssv_sdiobridge_irq_disable1\n");
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        dev_err(glue->dev, "ssv_sdiobridge_irq_disable2 [%d]\n",atomic_read(&glue->irq_handling));
+        if (atomic_read(&glue->irq_handling)&&iswaitirq)
+        {
+            dev_err(glue->dev, "ssv_sdiobridge_irq_disable3\n");
+            sdio_release_host(func);
+            ret = wait_event_interruptible(glue->irq_wq,
+                                           ssv_sdiobridge_is_on_irq(glue));
+            dev_err(glue->dev, "ssv_sdiobridge_irq_disable4 ret[%d]\n",ret);
+            if (ret)
+                return;
+            sdio_claim_host(func);
+        }
+        dev_err(glue->dev, "ssv_sdiobridge_irq_disable5\n");
+        ret = sdio_release_irq(func);
+        if (ret)
+            dev_err(glue->dev, "Failed to release sdio irq: %d\n", ret);
+        dev_err(glue->dev, "ssv_sdiobridge_irq_disable6\n");
+        sdio_release_host(func);
+    }
+}
+#if 0
+static void ssv_sdiobridge_irq_sync(struct device *child)
+{
+    struct ssv_sdiobridge_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    int ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        if (atomic_read(&glue->irq_handling))
+        {
+            sdio_release_host(func);
+            ret = wait_event_interruptible(glue->irq_wq,
+                                           ssv_sdiobridge_is_on_irq(glue));
+            if (ret)
+                return;
+            sdio_claim_host(func);
+        }
+        sdio_release_host(func);
+    }
+}
+#endif
+static void ssv_sdiobridge_read_parameter(struct sdio_func *func,
+        struct ssv_sdiobridge_glue *glue)
+{
+    int err_ret;
+    sdio_claim_host(func);
+    glue->dataIOPort = 0;
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_0, &err_ret) << ( 8*0 ));
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_1, &err_ret) << ( 8*1 ));
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_2, &err_ret) << ( 8*2 ));
+    glue->regIOPort = 0;
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_0, &err_ret) << ( 8*0 ));
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_1, &err_ret) << ( 8*1 ));
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_2, &err_ret) << ( 8*2 ));
+    dev_err(&func->dev, "dataIOPort 0x%x regIOPort 0x%x [%lx]\n",
+            glue->dataIOPort,glue->regIOPort,(long unsigned int)IOCTL_SSVSDIO_GET_BLOCKLEN);
+    sdio_set_block_size(func,glue->blockSize);
+    sdio_release_host(func);
+}
+static int ssv_sdiobridge_init_buf(struct ssv_sdiobridge_glue *glue)
+{
+    u32 bsize,i,error;
+    struct ssv_rxbuf *bf;
+    init_waitqueue_head(&glue->read_wq);
+    spin_lock_init(&glue->rxbuflock);
+    INIT_LIST_HEAD(&glue->rxbuf);
+    INIT_LIST_HEAD(&glue->rxreadybuf);
+    bsize = sizeof(struct ssv_rxbuf) * RXBUFSIZE;
+    glue->bufaddr = kzalloc(bsize, GFP_KERNEL);
+    if (glue->bufaddr == NULL)
+    {
+        error = -ENOMEM;
+        goto fail;
+    }
+    bf = glue->bufaddr;
+    for (i = 0; i < RXBUFSIZE; i++, bf++)
+    {
+        list_add_tail(&bf->list, &glue->rxbuf);
+    }
+    return 0;
+fail:
+    return error;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
+static char *ssv_sdiobridge_devnode(struct device *dev, umode_t *mode)
+#else
+static char *ssv_sdiobridge_devnode(struct device *dev, mode_t *mode)
+#endif
+{
+    if (!mode)
+        return NULL;
+    *mode = 0666;
+    return NULL;
+}
+extern int ssv_devicetype;
+static int __devinit ssv_sdiobridge_probe(struct sdio_func *func,
+        const struct sdio_device_id *id)
+{
+    mmc_pm_flag_t mmcflags;
+    int ret = -ENOMEM;
+    dev_t dev;
+    int alloc_ret = 0;
+    int cdev_ret = 0;
+    int err_ret;
+    if (ssv_devicetype != 1) {
+        printk(KERN_INFO "Not using SSV6200 bridge SDIO driver.\n");
+        return -ENODEV;
+    }
+    printk(KERN_INFO "=======================================\n");
+    printk(KERN_INFO "==           RUN SDIO BRIDGE         ==\n");
+    printk(KERN_INFO "=======================================\n");
+    printk(KERN_INFO "ssv_sdiobridge_probe func->num:%d",func->num);
+    if (func->num != 0x01)
+        return -ENODEV;
+    glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+    if (!glue)
+    {
+        dev_err(&func->dev, "can't allocate glue\n");
+        goto out;
+    }
+    glue->blockMode = false;
+    glue->blockSize = BLOCKSIZE;
+    glue->autoAckInt = true;
+    glue->dump = false;
+    glue->funcFocus = 1;
+    ssv_sdiobridge_init_buf(glue);
+    glue->dev = &func->dev;
+    func->card->quirks |= MMC_QUIRK_LENIENT_FN0;
+    func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
+    mmcflags = sdio_get_host_pm_caps(func);
+    dev_err(glue->dev, "sdio PM caps = 0x%x\n", mmcflags);
+    sdio_set_drvdata(func, glue);
+    pm_runtime_put_noidle(&func->dev);
+    ssv_sdiobridge_read_parameter(func,glue);
+    dev = MKDEV(ssv_sdiobridge_ioctl_major, 0);
+    alloc_ret = alloc_chrdev_region(&dev, 0, num_of_dev, FILE_DEVICE_SSVSDIO_NAME);
+    if (alloc_ret)
+        goto error;
+    ssv_sdiobridge_ioctl_major = MAJOR(dev);
+    cdev_init(&ssv_sdiobridge_ioctl_cdev, &fops);
+    cdev_ret = cdev_add(&ssv_sdiobridge_ioctl_cdev, dev, num_of_dev);
+    if (cdev_ret)
+        goto error;
+    fc=class_create(THIS_MODULE, FILE_DEVICE_SSVSDIO_NAME);
+    fc->devnode = ssv_sdiobridge_devnode;
+    device_create(fc, NULL, dev, NULL, "%s", FILE_DEVICE_SSVSDIO_NAME);
+    dev_err(glue->dev, "%s driver(major: %d) installed.\n", FILE_DEVICE_SSVSDIO_NAME, ssv_sdiobridge_ioctl_major);
+    init_waitqueue_head(&glue->irq_wq);
+    ssv_sdiobridge_irq_enable(func,glue);
+    sdio_claim_host(func);
+#ifdef CONFIG_SSV_SDIO_EXT_INT
+    sdio_writeb(func,(~(SSVCABRIO_INT_RX)|SSVCABRIO_INT_GPIO)&0x7, 0x04, &err_ret);
+#else
+    sdio_writeb(func,(~(SSVCABRIO_INT_RX|SSVCABRIO_INT_GPIO))&0x7, 0x04, &err_ret);
+#endif
+    sdio_release_host(func);
+    return 0;
+error:
+    if (cdev_ret == 0)
+        cdev_del(&ssv_sdiobridge_ioctl_cdev);
+    if (alloc_ret == 0)
+        unregister_chrdev_region(dev, num_of_dev);
+    kfree(glue);
+out:
+    return ret;
+}
+static void __devexit ssv_sdiobridge_remove(struct sdio_func *func)
+{
+    struct ssv_sdiobridge_glue *glue = sdio_get_drvdata(func);
+    dev_t dev;
+    int err_ret;
+    sdio_claim_host(func);
+#ifdef CONFIG_SSV_SDIO_EXT_INT
+    sdio_writeb(func,0, 0x04, &err_ret);
+#else
+    sdio_writeb(func,SSVCABRIO_INT_GPIO, 0x04, &err_ret);
+#endif
+    sdio_release_host(func);
+    ssv_sdiobridge_irq_disable(glue,false);
+    dev = MKDEV(ssv_sdiobridge_ioctl_major, 0);
+    device_destroy(fc,dev);
+    class_destroy(fc);
+    cdev_del(&ssv_sdiobridge_ioctl_cdev);
+    unregister_chrdev_region(dev, num_of_dev);
+    pm_runtime_get_noresume(&func->dev);
+    if ( glue )
+    {
+        dev_err(glue->dev, "ssv_sdiobridge_remove");
+        if (glue->bufaddr)
+        {
+            kfree(glue->bufaddr);
+        }
+        kfree(glue);
+        glue = NULL;
+    }
+    sdio_set_drvdata(func, NULL);
+}
+#ifdef CONFIG_PM
+static int ssv_sdiobridge_suspend(struct device *dev)
+{
+    int ret = 0;
+    return ret;
+}
+static int ssv_sdiobridge_resume(struct device *dev)
+{
+    dev_dbg(dev, "ssvcabrio resume\n");
+    return 0;
+}
+static const struct dev_pm_ops ssv_sdiobridge_pm_ops =
+{
+    .suspend = ssv_sdiobridge_suspend,
+    .resume = ssv_sdiobridge_resume,
+};
+#endif
+static struct sdio_driver ssv_sdio_bridge_driver =
+{
+    .name = "ssv_sdio_bridge",
+    .id_table = ssv_sdiobridge_devices,
+    .probe = ssv_sdiobridge_probe,
+    .remove = __devexit_p(ssv_sdiobridge_remove),
+#ifdef CONFIG_PM
+    .drv = {
+        .pm = &ssv_sdiobridge_pm_ops,
+    },
+#endif
+};
+EXPORT_SYMBOL(ssv_sdio_bridge_driver);
+#if 1
+static int __init ssv_sdiobridge_init(void)
+{
+    printk(KERN_INFO "ssv_sdiobridge_init\n");
+    return sdio_register_driver(&ssv_sdio_bridge_driver);
+}
+static void __exit ssv_sdiobridge_exit(void)
+{
+    printk(KERN_INFO "ssv_sdiobridge_exit\n");
+    sdio_unregister_driver(&ssv_sdio_bridge_driver);
+}
+module_init(ssv_sdiobridge_init);
+module_exit(ssv_sdiobridge_exit);
+#endif
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("iComm Semiconductor Co., Ltd");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.h
new file mode 100644
index 0000000000000..80592020da1a1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef SSVSDIOBRIDGE_H
+#define SSVSDIOBRIDGE_H 
+#include <linux/etherdevice.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/leds.h>
+#include <linux/completion.h>
+#include <linux/ioctl.h>
+#include <linux/types.h>
+#include "sdiobridge_pub.h"
+struct ssv_sdiobridge_glue
+{
+    struct device *dev;
+ u8 blockMode;
+ u16 blockSize;
+ u8 autoAckInt;
+    unsigned int dataIOPort;
+    unsigned int regIOPort;
+    u8 funcFocus;
+    atomic_t irq_handling;
+    wait_queue_head_t irq_wq;
+    wait_queue_head_t read_wq;
+    spinlock_t rxbuflock;
+    void *bufaddr;
+ struct list_head rxbuf;
+    struct list_head rxreadybuf;
+    struct dentry *debugfs;
+    struct dentry *dump_entry;
+    u32 dump;
+};
+#define MANUFACTURER_SSV_CODE 0x3030
+#define MANUFACTURER_ID_CABRIO_BASE 0x3030
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge_pub.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge_pub.h
new file mode 100644
index 0000000000000..006d87a462713
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/bridge/sdiobridge_pub.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef SSVSDIOBRIDGE_PUB_H
+#define SSVSDIOBRIDGE_PUB_H 
+#include <linux/etherdevice.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/leds.h>
+#include <linux/completion.h>
+#include <linux/ioctl.h>
+#include <linux/types.h>
+struct ssv_sdiobridge_cmd {
+    __u32 in_data_len;
+    u8* in_data;
+#ifndef __x86_64
+    __u32 padding1;
+#endif
+    __u32 out_data_len;
+    u8* out_data;
+#ifndef __x86_64
+        __u32 padding2;
+#endif
+    __u32 response;
+}__attribute__((packed));
+#define FILE_DEVICE_SSVSDIO MMC_BLOCK_MAJOR
+#define FILE_DEVICE_SSVSDIO_SEQ 0x50
+#define FILE_DEVICE_SSVSDIO_NAME "ssvsdiobridge"
+#if 0
+#define IOCTL_SSVSDIO_GET_DRIVER_VERSION \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x01, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_FUNCTION_NUMBER \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x02, struct ssv_sdiobridge_cmd)
+#endif
+#define IOCTL_SSVSDIO_GET_FUNCTION_FOCUS \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x03, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_FUNCTION_FOCUS \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x04, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_WIDTH \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x05, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_WIDTH \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x06, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_CLOCK \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x07, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_CLOCK \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x08, struct ssv_sdiobridge_cmd)
+#if 0
+#define IOCTL_SSVSDIO_GET_BLOCK_MODE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x09, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_BLOCK_MODE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0a, struct ssv_sdiobridge_cmd)
+#endif
+#define IOCTL_SSVSDIO_GET_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0b, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0c, struct ssv_sdiobridge_cmd)
+#if 0
+#define IOCTL_SSVSDIO_GET_FN0_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0d, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_FN0_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0e, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_INTERFACE_CONTROL \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0f, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_INTERFACE_CONTROL \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x10, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_INT_ENABLE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x11, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_INT_ENABLE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x12, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_AUTO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x13, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_AUTO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x14, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x15, struct ssv_sdiobridge_cmd)
+#endif
+#define IOCTL_SSVSDIO_READ_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x16, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_WRITE_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x17, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_MULTI_BYTE_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x18, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_MULTI_BYTE_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x19, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_READ_MULTI_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1a, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_WRITE_MULTI_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1b, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_GET_MULTI_BYTE_REG_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1c, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_SET_MULTI_BYTE_REG_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1d, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_READ_REG \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1e, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_WRITE_REG \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1f, struct ssv_sdiobridge_cmd)
+#define IOCTL_SSVSDIO_READ_DATA \
+    _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x20, struct ssv_sdiobridge_cmd)
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/config.mak b/drivers/net/wireless/rockchip_wlan/ssv6xxx/config.mak
new file mode 100644
index 0000000000000..5036a0d0d4d5e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/config.mak
@@ -0,0 +1,123 @@
+
+KVERSION="`uname -r`"
+#DRVPATH=/lib/modules/$(KVERSION)/kernel/drivers/net/wireless/ssv6200
+DRVPATH=kernel/drivers/net/wireless/ssv6200
+KCFLAG += -Werror
+EXTRA_CFLAGS := -I$(KBUILD_TOP) -I$(KBUILD_TOP)/include
+
+CONFIG_SSV6200_CORE=m
+#ccflags-y += -DCONFIG_SSV6200_CORE
+
+###########################################################################
+# Compiler options                                                        #
+###########################################################################
+ccflags-y += -Werror
+
+# Enable -g to help debug. Deassembly from .o to .S would help to track to 
+# the problomatic line from call stack dump.
+ccflags-y += -g
+
+############################################################
+# If you change the settings, please change the file synchronization
+# smac\firmware\include\config.h & compiler firmware
+############################################################
+#ccflags-y += -DCONFIG_SSV_CABRIO_A
+#ccflags-y += -DSDIO_USE_SLOW_CLOCK
+ccflags-y += -DCONFIG_SSV_CABRIO_E
+
+#CONFIG_SSV_SUPPORT_BTCX=y
+
+ccflags-y += -DCONFIG_SSV6200_CLI_ENABLE
+
+#ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+
+
+############################################################
+# Options should be able to set as parameters.             #
+############################################################
+
+#PADPD
+#ccflags-y += -DCONFIG_SSV_DPD
+
+#ccflags-y += -DCONFIG_SSV_CABRIO_MB_DEBUG
+ccflags-y += -DCONFIG_SSV6XXX_DEBUGFS
+
+#SDIO
+ccflags-y += -DCONFIG_SSV_TX_LOWTHRESHOLD
+
+############################################################
+# Rate control update for MPDU.
+############################################################
+ccflags-y += -DRATE_CONTROL_REALTIME_UPDATA
+
+#workaround
+#ccflags-y += -DCONFIG_SSV_CABRIO_EXT_PA
+
+############################################################
+# NOTE:
+#    Only one of the following flags could be turned on.
+# It also turned off the following flags. In this case, 
+# pure software security or pure hardware security is used.
+#
+############################################################
+#ccflags-y += -DCONFIG_SSV_SW_ENCRYPT_HW_DECRYPT
+#ccflags-y += -DCONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+
+# FOR WFA
+#ccflags-y += -DWIFI_CERTIFIED
+
+#ccflags-y += -DCONFIG_SSV_SDIO_EXT_INT
+
+#######################################################
+ccflags-y += -DCONFIG_SSV6200_HAS_RX_WORKQUEUE
+#ccflags-y += -DUSE_THREAD_RX
+ccflags-y += -DUSE_THREAD_TX
+ccflags-y += -DENABLE_AGGREGATE_IN_TIME
+ccflags-y += -DENABLE_INCREMENTAL_AGGREGATION
+
+# Generic decision table applicable to both AP and STA modes.
+ccflags-y += -DUSE_GENERIC_DECI_TBL
+
+# Use crypto in SSV driver.
+ccflags-y += -DUSE_LOCAL_CRYPTO
+ccflags-y += -DUSE_LOCAL_WEP_CRYPTO
+ccflags-y += -DUSE_LOCAL_TKIP_CRYPTO
+ccflags-y += -DUSE_LOCAL_CCMP_CRYPTO
+ccflags-y += -DUSE_LOCAL_SMS4_CRYPTO
+
+ccflags-y += -DCONFIG_SSV_WAPI
+
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+ccflags-y += -DFW_WSID_WATCH_LIST
+#ccflags-y += -DUSE_BATCH_RX
+#ccflags-y += -DCONFIG_IRQ_DEBUG_COUNT
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+
+
+ccflags-y += -DSSV6200_ECO
+#ccflags-y += -DENABLE_WAKE_IO_ISR_WHEN_HCI_ENQUEUE
+ccflags-y += -DHAS_CRYPTO_LOCK
+ccflags-y += -DENABLE_TX_Q_FLOW_CONTROL
+
+#ccflags-y += -DCONFIG_DEBUG_SKB_TIMESTAMP
+
+
+###########################################################
+# option to :qswitch driver between relay device and sw mac device
+# Enable ->Relay device	(CHAR)
+# Disable->SW MAC device(NET)
+
+#DRV_OPT = HUW_DRV
+#For HUW to define some resources
+ifeq ($(DRV_OPT), HUW_DRV)
+ccflags-y += -DHUW_DRV
+endif
+
+#enable p2p client to parse GO broadcast noa
+#ccflags-y += -DCONFIG_P2P_NOA
+
+#enable rx management frame check
+#ccflags-y += -DCONFIG_RX_MGMT_CHECK
+
+ccflags-y += -DCONFIG_SSV_RSSI
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes-armv4.S b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes-armv4.S
new file mode 100644
index 0000000000000..e59b1d505d6c8
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes-armv4.S
@@ -0,0 +1,1112 @@
+#define __ARM_ARCH__ __LINUX_ARM_ARCH__
+@ ====================================================================
+@ Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
+@ project. The module is, however, dual licensed under OpenSSL and
+@ CRYPTOGAMS licenses depending on where you obtain it. For further
+@ details see http://www.openssl.org/~appro/cryptogams/.
+@ ====================================================================
+
+@ AES for ARMv4
+
+@ January 2007.
+@
+@ Code uses single 1K S-box and is >2 times faster than code generated
+@ by gcc-3.4.1. This is thanks to unique feature of ARMv4 ISA, which
+@ allows to merge logical or arithmetic operation with shift or rotate
+@ in one instruction and emit combined result every cycle. The module
+@ is endian-neutral. The performance is ~42 cycles/byte for 128-bit
+@ key [on single-issue Xscale PXA250 core].
+
+@ May 2007.
+@
+@ AES_set_[en|de]crypt_key is added.
+
+@ July 2010.
+@
+@ Rescheduling for dual-issue pipeline resulted in 12% improvement on
+@ Cortex A8 core and ~25 cycles per byte processed with 128-bit key.
+
+@ February 2011.
+@
+@ Profiler-assisted and platform-specific optimization resulted in 16%
+@ improvement on Cortex A8 core and ~21.5 cycles per byte.
+
+@ A little glue here to select the correct code below for the ARM CPU
+@ that is being targetted.
+
+.text
+.code	32
+
+.type	AES_Te,%object
+.align	5
+AES_Te:
+.word	0xc66363a5, 0xf87c7c84, 0xee777799, 0xf67b7b8d
+.word	0xfff2f20d, 0xd66b6bbd, 0xde6f6fb1, 0x91c5c554
+.word	0x60303050, 0x02010103, 0xce6767a9, 0x562b2b7d
+.word	0xe7fefe19, 0xb5d7d762, 0x4dababe6, 0xec76769a
+.word	0x8fcaca45, 0x1f82829d, 0x89c9c940, 0xfa7d7d87
+.word	0xeffafa15, 0xb25959eb, 0x8e4747c9, 0xfbf0f00b
+.word	0x41adadec, 0xb3d4d467, 0x5fa2a2fd, 0x45afafea
+.word	0x239c9cbf, 0x53a4a4f7, 0xe4727296, 0x9bc0c05b
+.word	0x75b7b7c2, 0xe1fdfd1c, 0x3d9393ae, 0x4c26266a
+.word	0x6c36365a, 0x7e3f3f41, 0xf5f7f702, 0x83cccc4f
+.word	0x6834345c, 0x51a5a5f4, 0xd1e5e534, 0xf9f1f108
+.word	0xe2717193, 0xabd8d873, 0x62313153, 0x2a15153f
+.word	0x0804040c, 0x95c7c752, 0x46232365, 0x9dc3c35e
+.word	0x30181828, 0x379696a1, 0x0a05050f, 0x2f9a9ab5
+.word	0x0e070709, 0x24121236, 0x1b80809b, 0xdfe2e23d
+.word	0xcdebeb26, 0x4e272769, 0x7fb2b2cd, 0xea75759f
+.word	0x1209091b, 0x1d83839e, 0x582c2c74, 0x341a1a2e
+.word	0x361b1b2d, 0xdc6e6eb2, 0xb45a5aee, 0x5ba0a0fb
+.word	0xa45252f6, 0x763b3b4d, 0xb7d6d661, 0x7db3b3ce
+.word	0x5229297b, 0xdde3e33e, 0x5e2f2f71, 0x13848497
+.word	0xa65353f5, 0xb9d1d168, 0x00000000, 0xc1eded2c
+.word	0x40202060, 0xe3fcfc1f, 0x79b1b1c8, 0xb65b5bed
+.word	0xd46a6abe, 0x8dcbcb46, 0x67bebed9, 0x7239394b
+.word	0x944a4ade, 0x984c4cd4, 0xb05858e8, 0x85cfcf4a
+.word	0xbbd0d06b, 0xc5efef2a, 0x4faaaae5, 0xedfbfb16
+.word	0x864343c5, 0x9a4d4dd7, 0x66333355, 0x11858594
+.word	0x8a4545cf, 0xe9f9f910, 0x04020206, 0xfe7f7f81
+.word	0xa05050f0, 0x783c3c44, 0x259f9fba, 0x4ba8a8e3
+.word	0xa25151f3, 0x5da3a3fe, 0x804040c0, 0x058f8f8a
+.word	0x3f9292ad, 0x219d9dbc, 0x70383848, 0xf1f5f504
+.word	0x63bcbcdf, 0x77b6b6c1, 0xafdada75, 0x42212163
+.word	0x20101030, 0xe5ffff1a, 0xfdf3f30e, 0xbfd2d26d
+.word	0x81cdcd4c, 0x180c0c14, 0x26131335, 0xc3ecec2f
+.word	0xbe5f5fe1, 0x359797a2, 0x884444cc, 0x2e171739
+.word	0x93c4c457, 0x55a7a7f2, 0xfc7e7e82, 0x7a3d3d47
+.word	0xc86464ac, 0xba5d5de7, 0x3219192b, 0xe6737395
+.word	0xc06060a0, 0x19818198, 0x9e4f4fd1, 0xa3dcdc7f
+.word	0x44222266, 0x542a2a7e, 0x3b9090ab, 0x0b888883
+.word	0x8c4646ca, 0xc7eeee29, 0x6bb8b8d3, 0x2814143c
+.word	0xa7dede79, 0xbc5e5ee2, 0x160b0b1d, 0xaddbdb76
+.word	0xdbe0e03b, 0x64323256, 0x743a3a4e, 0x140a0a1e
+.word	0x924949db, 0x0c06060a, 0x4824246c, 0xb85c5ce4
+.word	0x9fc2c25d, 0xbdd3d36e, 0x43acacef, 0xc46262a6
+.word	0x399191a8, 0x319595a4, 0xd3e4e437, 0xf279798b
+.word	0xd5e7e732, 0x8bc8c843, 0x6e373759, 0xda6d6db7
+.word	0x018d8d8c, 0xb1d5d564, 0x9c4e4ed2, 0x49a9a9e0
+.word	0xd86c6cb4, 0xac5656fa, 0xf3f4f407, 0xcfeaea25
+.word	0xca6565af, 0xf47a7a8e, 0x47aeaee9, 0x10080818
+.word	0x6fbabad5, 0xf0787888, 0x4a25256f, 0x5c2e2e72
+.word	0x381c1c24, 0x57a6a6f1, 0x73b4b4c7, 0x97c6c651
+.word	0xcbe8e823, 0xa1dddd7c, 0xe874749c, 0x3e1f1f21
+.word	0x964b4bdd, 0x61bdbddc, 0x0d8b8b86, 0x0f8a8a85
+.word	0xe0707090, 0x7c3e3e42, 0x71b5b5c4, 0xcc6666aa
+.word	0x904848d8, 0x06030305, 0xf7f6f601, 0x1c0e0e12
+.word	0xc26161a3, 0x6a35355f, 0xae5757f9, 0x69b9b9d0
+.word	0x17868691, 0x99c1c158, 0x3a1d1d27, 0x279e9eb9
+.word	0xd9e1e138, 0xebf8f813, 0x2b9898b3, 0x22111133
+.word	0xd26969bb, 0xa9d9d970, 0x078e8e89, 0x339494a7
+.word	0x2d9b9bb6, 0x3c1e1e22, 0x15878792, 0xc9e9e920
+.word	0x87cece49, 0xaa5555ff, 0x50282878, 0xa5dfdf7a
+.word	0x038c8c8f, 0x59a1a1f8, 0x09898980, 0x1a0d0d17
+.word	0x65bfbfda, 0xd7e6e631, 0x844242c6, 0xd06868b8
+.word	0x824141c3, 0x299999b0, 0x5a2d2d77, 0x1e0f0f11
+.word	0x7bb0b0cb, 0xa85454fc, 0x6dbbbbd6, 0x2c16163a
+@ Te4[256]
+.byte	0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5
+.byte	0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76
+.byte	0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0
+.byte	0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0
+.byte	0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc
+.byte	0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15
+.byte	0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a
+.byte	0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75
+.byte	0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0
+.byte	0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84
+.byte	0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b
+.byte	0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf
+.byte	0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85
+.byte	0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8
+.byte	0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5
+.byte	0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2
+.byte	0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17
+.byte	0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73
+.byte	0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88
+.byte	0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb
+.byte	0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c
+.byte	0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79
+.byte	0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9
+.byte	0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08
+.byte	0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6
+.byte	0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a
+.byte	0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e
+.byte	0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e
+.byte	0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94
+.byte	0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf
+.byte	0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68
+.byte	0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+@ rcon[]
+.word	0x01000000, 0x02000000, 0x04000000, 0x08000000
+.word	0x10000000, 0x20000000, 0x40000000, 0x80000000
+.word	0x1B000000, 0x36000000, 0, 0, 0, 0, 0, 0
+.size	AES_Te,.-AES_Te
+
+@ void AES_encrypt(const unsigned char *in, unsigned char *out,
+@ 		 const AES_KEY *key) {
+.global AES_encrypt
+.type   AES_encrypt,%function
+.align	5
+AES_encrypt:
+	sub	r3,pc,#8		@ AES_encrypt
+	stmdb   sp!,{r1,r4-r12,lr}
+	mov	r12,r0		@ inp
+	mov	r11,r2
+	sub	r10,r3,#AES_encrypt-AES_Te	@ Te
+#if __ARM_ARCH__<7
+	ldrb	r0,[r12,#3]	@ load input data in endian-neutral
+	ldrb	r4,[r12,#2]	@ manner...
+	ldrb	r5,[r12,#1]
+	ldrb	r6,[r12,#0]
+	orr	r0,r0,r4,lsl#8
+	ldrb	r1,[r12,#7]
+	orr	r0,r0,r5,lsl#16
+	ldrb	r4,[r12,#6]
+	orr	r0,r0,r6,lsl#24
+	ldrb	r5,[r12,#5]
+	ldrb	r6,[r12,#4]
+	orr	r1,r1,r4,lsl#8
+	ldrb	r2,[r12,#11]
+	orr	r1,r1,r5,lsl#16
+	ldrb	r4,[r12,#10]
+	orr	r1,r1,r6,lsl#24
+	ldrb	r5,[r12,#9]
+	ldrb	r6,[r12,#8]
+	orr	r2,r2,r4,lsl#8
+	ldrb	r3,[r12,#15]
+	orr	r2,r2,r5,lsl#16
+	ldrb	r4,[r12,#14]
+	orr	r2,r2,r6,lsl#24
+	ldrb	r5,[r12,#13]
+	ldrb	r6,[r12,#12]
+	orr	r3,r3,r4,lsl#8
+	orr	r3,r3,r5,lsl#16
+	orr	r3,r3,r6,lsl#24
+#else
+	ldr	r0,[r12,#0]
+	ldr	r1,[r12,#4]
+	ldr	r2,[r12,#8]
+	ldr	r3,[r12,#12]
+#ifdef __ARMEL__
+	rev	r0,r0
+	rev	r1,r1
+	rev	r2,r2
+	rev	r3,r3
+#endif
+#endif
+	bl	_armv4_AES_encrypt
+
+	ldr	r12,[sp],#4		@ pop out
+#if __ARM_ARCH__>=7
+#ifdef __ARMEL__
+	rev	r0,r0
+	rev	r1,r1
+	rev	r2,r2
+	rev	r3,r3
+#endif
+	str	r0,[r12,#0]
+	str	r1,[r12,#4]
+	str	r2,[r12,#8]
+	str	r3,[r12,#12]
+#else
+	mov	r4,r0,lsr#24		@ write output in endian-neutral
+	mov	r5,r0,lsr#16		@ manner...
+	mov	r6,r0,lsr#8
+	strb	r4,[r12,#0]
+	strb	r5,[r12,#1]
+	mov	r4,r1,lsr#24
+	strb	r6,[r12,#2]
+	mov	r5,r1,lsr#16
+	strb	r0,[r12,#3]
+	mov	r6,r1,lsr#8
+	strb	r4,[r12,#4]
+	strb	r5,[r12,#5]
+	mov	r4,r2,lsr#24
+	strb	r6,[r12,#6]
+	mov	r5,r2,lsr#16
+	strb	r1,[r12,#7]
+	mov	r6,r2,lsr#8
+	strb	r4,[r12,#8]
+	strb	r5,[r12,#9]
+	mov	r4,r3,lsr#24
+	strb	r6,[r12,#10]
+	mov	r5,r3,lsr#16
+	strb	r2,[r12,#11]
+	mov	r6,r3,lsr#8
+	strb	r4,[r12,#12]
+	strb	r5,[r12,#13]
+	strb	r6,[r12,#14]
+	strb	r3,[r12,#15]
+#endif
+#if __ARM_ARCH__>=5
+	ldmia	sp!,{r4-r12,pc}
+#else
+	ldmia   sp!,{r4-r12,lr}
+	tst	lr,#1
+	moveq	pc,lr			@ be binary compatible with V4, yet
+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+#endif
+.size	AES_encrypt,.-AES_encrypt
+
+.type   _armv4_AES_encrypt,%function
+.align	2
+_armv4_AES_encrypt:
+	str	lr,[sp,#-4]!		@ push lr
+	ldmia	r11!,{r4-r7}
+	eor	r0,r0,r4
+	ldr	r12,[r11,#240-16]
+	eor	r1,r1,r5
+	eor	r2,r2,r6
+	eor	r3,r3,r7
+	sub	r12,r12,#1
+	mov	lr,#255
+
+	and	r7,lr,r0
+	and	r8,lr,r0,lsr#8
+	and	r9,lr,r0,lsr#16
+	mov	r0,r0,lsr#24
+.Lenc_loop:
+	ldr	r4,[r10,r7,lsl#2]	@ Te3[s0>>0]
+	and	r7,lr,r1,lsr#16	@ i0
+	ldr	r5,[r10,r8,lsl#2]	@ Te2[s0>>8]
+	and	r8,lr,r1
+	ldr	r6,[r10,r9,lsl#2]	@ Te1[s0>>16]
+	and	r9,lr,r1,lsr#8
+	ldr	r0,[r10,r0,lsl#2]	@ Te0[s0>>24]
+	mov	r1,r1,lsr#24
+
+	ldr	r7,[r10,r7,lsl#2]	@ Te1[s1>>16]
+	ldr	r8,[r10,r8,lsl#2]	@ Te3[s1>>0]
+	ldr	r9,[r10,r9,lsl#2]	@ Te2[s1>>8]
+	eor	r0,r0,r7,ror#8
+	ldr	r1,[r10,r1,lsl#2]	@ Te0[s1>>24]
+	and	r7,lr,r2,lsr#8	@ i0
+	eor	r5,r5,r8,ror#8
+	and	r8,lr,r2,lsr#16	@ i1
+	eor	r6,r6,r9,ror#8
+	and	r9,lr,r2
+	ldr	r7,[r10,r7,lsl#2]	@ Te2[s2>>8]
+	eor	r1,r1,r4,ror#24
+	ldr	r8,[r10,r8,lsl#2]	@ Te1[s2>>16]
+	mov	r2,r2,lsr#24
+
+	ldr	r9,[r10,r9,lsl#2]	@ Te3[s2>>0]
+	eor	r0,r0,r7,ror#16
+	ldr	r2,[r10,r2,lsl#2]	@ Te0[s2>>24]
+	and	r7,lr,r3		@ i0
+	eor	r1,r1,r8,ror#8
+	and	r8,lr,r3,lsr#8	@ i1
+	eor	r6,r6,r9,ror#16
+	and	r9,lr,r3,lsr#16	@ i2
+	ldr	r7,[r10,r7,lsl#2]	@ Te3[s3>>0]
+	eor	r2,r2,r5,ror#16
+	ldr	r8,[r10,r8,lsl#2]	@ Te2[s3>>8]
+	mov	r3,r3,lsr#24
+
+	ldr	r9,[r10,r9,lsl#2]	@ Te1[s3>>16]
+	eor	r0,r0,r7,ror#24
+	ldr	r7,[r11],#16
+	eor	r1,r1,r8,ror#16
+	ldr	r3,[r10,r3,lsl#2]	@ Te0[s3>>24]
+	eor	r2,r2,r9,ror#8
+	ldr	r4,[r11,#-12]
+	eor	r3,r3,r6,ror#8
+
+	ldr	r5,[r11,#-8]
+	eor	r0,r0,r7
+	ldr	r6,[r11,#-4]
+	and	r7,lr,r0
+	eor	r1,r1,r4
+	and	r8,lr,r0,lsr#8
+	eor	r2,r2,r5
+	and	r9,lr,r0,lsr#16
+	eor	r3,r3,r6
+	mov	r0,r0,lsr#24
+
+	subs	r12,r12,#1
+	bne	.Lenc_loop
+
+	add	r10,r10,#2
+
+	ldrb	r4,[r10,r7,lsl#2]	@ Te4[s0>>0]
+	and	r7,lr,r1,lsr#16	@ i0
+	ldrb	r5,[r10,r8,lsl#2]	@ Te4[s0>>8]
+	and	r8,lr,r1
+	ldrb	r6,[r10,r9,lsl#2]	@ Te4[s0>>16]
+	and	r9,lr,r1,lsr#8
+	ldrb	r0,[r10,r0,lsl#2]	@ Te4[s0>>24]
+	mov	r1,r1,lsr#24
+
+	ldrb	r7,[r10,r7,lsl#2]	@ Te4[s1>>16]
+	ldrb	r8,[r10,r8,lsl#2]	@ Te4[s1>>0]
+	ldrb	r9,[r10,r9,lsl#2]	@ Te4[s1>>8]
+	eor	r0,r7,r0,lsl#8
+	ldrb	r1,[r10,r1,lsl#2]	@ Te4[s1>>24]
+	and	r7,lr,r2,lsr#8	@ i0
+	eor	r5,r8,r5,lsl#8
+	and	r8,lr,r2,lsr#16	@ i1
+	eor	r6,r9,r6,lsl#8
+	and	r9,lr,r2
+	ldrb	r7,[r10,r7,lsl#2]	@ Te4[s2>>8]
+	eor	r1,r4,r1,lsl#24
+	ldrb	r8,[r10,r8,lsl#2]	@ Te4[s2>>16]
+	mov	r2,r2,lsr#24
+
+	ldrb	r9,[r10,r9,lsl#2]	@ Te4[s2>>0]
+	eor	r0,r7,r0,lsl#8
+	ldrb	r2,[r10,r2,lsl#2]	@ Te4[s2>>24]
+	and	r7,lr,r3		@ i0
+	eor	r1,r1,r8,lsl#16
+	and	r8,lr,r3,lsr#8	@ i1
+	eor	r6,r9,r6,lsl#8
+	and	r9,lr,r3,lsr#16	@ i2
+	ldrb	r7,[r10,r7,lsl#2]	@ Te4[s3>>0]
+	eor	r2,r5,r2,lsl#24
+	ldrb	r8,[r10,r8,lsl#2]	@ Te4[s3>>8]
+	mov	r3,r3,lsr#24
+
+	ldrb	r9,[r10,r9,lsl#2]	@ Te4[s3>>16]
+	eor	r0,r7,r0,lsl#8
+	ldr	r7,[r11,#0]
+	ldrb	r3,[r10,r3,lsl#2]	@ Te4[s3>>24]
+	eor	r1,r1,r8,lsl#8
+	ldr	r4,[r11,#4]
+	eor	r2,r2,r9,lsl#16
+	ldr	r5,[r11,#8]
+	eor	r3,r6,r3,lsl#24
+	ldr	r6,[r11,#12]
+
+	eor	r0,r0,r7
+	eor	r1,r1,r4
+	eor	r2,r2,r5
+	eor	r3,r3,r6
+
+	sub	r10,r10,#2
+	ldr	pc,[sp],#4		@ pop and return
+.size	_armv4_AES_encrypt,.-_armv4_AES_encrypt
+
+.global private_AES_set_encrypt_key
+.type   private_AES_set_encrypt_key,%function
+.align	5
+private_AES_set_encrypt_key:
+_armv4_AES_set_encrypt_key:
+	sub	r3,pc,#8		@ AES_set_encrypt_key
+	teq	r0,#0
+	moveq	r0,#-1
+	beq	.Labrt
+	teq	r2,#0
+	moveq	r0,#-1
+	beq	.Labrt
+
+	teq	r1,#128
+	beq	.Lok
+	teq	r1,#192
+	beq	.Lok
+	teq	r1,#256
+	movne	r0,#-1
+	bne	.Labrt
+
+.Lok:	stmdb   sp!,{r4-r12,lr}
+	sub	r10,r3,#_armv4_AES_set_encrypt_key-AES_Te-1024	@ Te4
+
+	mov	r12,r0		@ inp
+	mov	lr,r1			@ bits
+	mov	r11,r2			@ key
+
+#if __ARM_ARCH__<7
+	ldrb	r0,[r12,#3]	@ load input data in endian-neutral
+	ldrb	r4,[r12,#2]	@ manner...
+	ldrb	r5,[r12,#1]
+	ldrb	r6,[r12,#0]
+	orr	r0,r0,r4,lsl#8
+	ldrb	r1,[r12,#7]
+	orr	r0,r0,r5,lsl#16
+	ldrb	r4,[r12,#6]
+	orr	r0,r0,r6,lsl#24
+	ldrb	r5,[r12,#5]
+	ldrb	r6,[r12,#4]
+	orr	r1,r1,r4,lsl#8
+	ldrb	r2,[r12,#11]
+	orr	r1,r1,r5,lsl#16
+	ldrb	r4,[r12,#10]
+	orr	r1,r1,r6,lsl#24
+	ldrb	r5,[r12,#9]
+	ldrb	r6,[r12,#8]
+	orr	r2,r2,r4,lsl#8
+	ldrb	r3,[r12,#15]
+	orr	r2,r2,r5,lsl#16
+	ldrb	r4,[r12,#14]
+	orr	r2,r2,r6,lsl#24
+	ldrb	r5,[r12,#13]
+	ldrb	r6,[r12,#12]
+	orr	r3,r3,r4,lsl#8
+	str	r0,[r11],#16
+	orr	r3,r3,r5,lsl#16
+	str	r1,[r11,#-12]
+	orr	r3,r3,r6,lsl#24
+	str	r2,[r11,#-8]
+	str	r3,[r11,#-4]
+#else
+	ldr	r0,[r12,#0]
+	ldr	r1,[r12,#4]
+	ldr	r2,[r12,#8]
+	ldr	r3,[r12,#12]
+#ifdef __ARMEL__
+	rev	r0,r0
+	rev	r1,r1
+	rev	r2,r2
+	rev	r3,r3
+#endif
+	str	r0,[r11],#16
+	str	r1,[r11,#-12]
+	str	r2,[r11,#-8]
+	str	r3,[r11,#-4]
+#endif
+
+	teq	lr,#128
+	bne	.Lnot128
+	mov	r12,#10
+	str	r12,[r11,#240-16]
+	add	r6,r10,#256			@ rcon
+	mov	lr,#255
+
+.L128_loop:
+	and	r5,lr,r3,lsr#24
+	and	r7,lr,r3,lsr#16
+	ldrb	r5,[r10,r5]
+	and	r8,lr,r3,lsr#8
+	ldrb	r7,[r10,r7]
+	and	r9,lr,r3
+	ldrb	r8,[r10,r8]
+	orr	r5,r5,r7,lsl#24
+	ldrb	r9,[r10,r9]
+	orr	r5,r5,r8,lsl#16
+	ldr	r4,[r6],#4			@ rcon[i++]
+	orr	r5,r5,r9,lsl#8
+	eor	r5,r5,r4
+	eor	r0,r0,r5			@ rk[4]=rk[0]^...
+	eor	r1,r1,r0			@ rk[5]=rk[1]^rk[4]
+	str	r0,[r11],#16
+	eor	r2,r2,r1			@ rk[6]=rk[2]^rk[5]
+	str	r1,[r11,#-12]
+	eor	r3,r3,r2			@ rk[7]=rk[3]^rk[6]
+	str	r2,[r11,#-8]
+	subs	r12,r12,#1
+	str	r3,[r11,#-4]
+	bne	.L128_loop
+	sub	r2,r11,#176
+	b	.Ldone
+
+.Lnot128:
+#if __ARM_ARCH__<7
+	ldrb	r8,[r12,#19]
+	ldrb	r4,[r12,#18]
+	ldrb	r5,[r12,#17]
+	ldrb	r6,[r12,#16]
+	orr	r8,r8,r4,lsl#8
+	ldrb	r9,[r12,#23]
+	orr	r8,r8,r5,lsl#16
+	ldrb	r4,[r12,#22]
+	orr	r8,r8,r6,lsl#24
+	ldrb	r5,[r12,#21]
+	ldrb	r6,[r12,#20]
+	orr	r9,r9,r4,lsl#8
+	orr	r9,r9,r5,lsl#16
+	str	r8,[r11],#8
+	orr	r9,r9,r6,lsl#24
+	str	r9,[r11,#-4]
+#else
+	ldr	r8,[r12,#16]
+	ldr	r9,[r12,#20]
+#ifdef __ARMEL__
+	rev	r8,r8
+	rev	r9,r9
+#endif
+	str	r8,[r11],#8
+	str	r9,[r11,#-4]
+#endif
+
+	teq	lr,#192
+	bne	.Lnot192
+	mov	r12,#12
+	str	r12,[r11,#240-24]
+	add	r6,r10,#256			@ rcon
+	mov	lr,#255
+	mov	r12,#8
+
+.L192_loop:
+	and	r5,lr,r9,lsr#24
+	and	r7,lr,r9,lsr#16
+	ldrb	r5,[r10,r5]
+	and	r8,lr,r9,lsr#8
+	ldrb	r7,[r10,r7]
+	and	r9,lr,r9
+	ldrb	r8,[r10,r8]
+	orr	r5,r5,r7,lsl#24
+	ldrb	r9,[r10,r9]
+	orr	r5,r5,r8,lsl#16
+	ldr	r4,[r6],#4			@ rcon[i++]
+	orr	r5,r5,r9,lsl#8
+	eor	r9,r5,r4
+	eor	r0,r0,r9			@ rk[6]=rk[0]^...
+	eor	r1,r1,r0			@ rk[7]=rk[1]^rk[6]
+	str	r0,[r11],#24
+	eor	r2,r2,r1			@ rk[8]=rk[2]^rk[7]
+	str	r1,[r11,#-20]
+	eor	r3,r3,r2			@ rk[9]=rk[3]^rk[8]
+	str	r2,[r11,#-16]
+	subs	r12,r12,#1
+	str	r3,[r11,#-12]
+	subeq	r2,r11,#216
+	beq	.Ldone
+
+	ldr	r7,[r11,#-32]
+	ldr	r8,[r11,#-28]
+	eor	r7,r7,r3			@ rk[10]=rk[4]^rk[9]
+	eor	r9,r8,r7			@ rk[11]=rk[5]^rk[10]
+	str	r7,[r11,#-8]
+	str	r9,[r11,#-4]
+	b	.L192_loop
+
+.Lnot192:
+#if __ARM_ARCH__<7
+	ldrb	r8,[r12,#27]
+	ldrb	r4,[r12,#26]
+	ldrb	r5,[r12,#25]
+	ldrb	r6,[r12,#24]
+	orr	r8,r8,r4,lsl#8
+	ldrb	r9,[r12,#31]
+	orr	r8,r8,r5,lsl#16
+	ldrb	r4,[r12,#30]
+	orr	r8,r8,r6,lsl#24
+	ldrb	r5,[r12,#29]
+	ldrb	r6,[r12,#28]
+	orr	r9,r9,r4,lsl#8
+	orr	r9,r9,r5,lsl#16
+	str	r8,[r11],#8
+	orr	r9,r9,r6,lsl#24
+	str	r9,[r11,#-4]
+#else
+	ldr	r8,[r12,#24]
+	ldr	r9,[r12,#28]
+#ifdef __ARMEL__
+	rev	r8,r8
+	rev	r9,r9
+#endif
+	str	r8,[r11],#8
+	str	r9,[r11,#-4]
+#endif
+
+	mov	r12,#14
+	str	r12,[r11,#240-32]
+	add	r6,r10,#256			@ rcon
+	mov	lr,#255
+	mov	r12,#7
+
+.L256_loop:
+	and	r5,lr,r9,lsr#24
+	and	r7,lr,r9,lsr#16
+	ldrb	r5,[r10,r5]
+	and	r8,lr,r9,lsr#8
+	ldrb	r7,[r10,r7]
+	and	r9,lr,r9
+	ldrb	r8,[r10,r8]
+	orr	r5,r5,r7,lsl#24
+	ldrb	r9,[r10,r9]
+	orr	r5,r5,r8,lsl#16
+	ldr	r4,[r6],#4			@ rcon[i++]
+	orr	r5,r5,r9,lsl#8
+	eor	r9,r5,r4
+	eor	r0,r0,r9			@ rk[8]=rk[0]^...
+	eor	r1,r1,r0			@ rk[9]=rk[1]^rk[8]
+	str	r0,[r11],#32
+	eor	r2,r2,r1			@ rk[10]=rk[2]^rk[9]
+	str	r1,[r11,#-28]
+	eor	r3,r3,r2			@ rk[11]=rk[3]^rk[10]
+	str	r2,[r11,#-24]
+	subs	r12,r12,#1
+	str	r3,[r11,#-20]
+	subeq	r2,r11,#256
+	beq	.Ldone
+
+	and	r5,lr,r3
+	and	r7,lr,r3,lsr#8
+	ldrb	r5,[r10,r5]
+	and	r8,lr,r3,lsr#16
+	ldrb	r7,[r10,r7]
+	and	r9,lr,r3,lsr#24
+	ldrb	r8,[r10,r8]
+	orr	r5,r5,r7,lsl#8
+	ldrb	r9,[r10,r9]
+	orr	r5,r5,r8,lsl#16
+	ldr	r4,[r11,#-48]
+	orr	r5,r5,r9,lsl#24
+
+	ldr	r7,[r11,#-44]
+	ldr	r8,[r11,#-40]
+	eor	r4,r4,r5			@ rk[12]=rk[4]^...
+	ldr	r9,[r11,#-36]
+	eor	r7,r7,r4			@ rk[13]=rk[5]^rk[12]
+	str	r4,[r11,#-16]
+	eor	r8,r8,r7			@ rk[14]=rk[6]^rk[13]
+	str	r7,[r11,#-12]
+	eor	r9,r9,r8			@ rk[15]=rk[7]^rk[14]
+	str	r8,[r11,#-8]
+	str	r9,[r11,#-4]
+	b	.L256_loop
+
+.Ldone:	mov	r0,#0
+	ldmia   sp!,{r4-r12,lr}
+.Labrt:	tst	lr,#1
+	moveq	pc,lr			@ be binary compatible with V4, yet
+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+.size	private_AES_set_encrypt_key,.-private_AES_set_encrypt_key
+
+.global private_AES_set_decrypt_key
+.type   private_AES_set_decrypt_key,%function
+.align	5
+private_AES_set_decrypt_key:
+	str	lr,[sp,#-4]!            @ push lr
+#if 0
+	@ kernel does both of these in setkey so optimise this bit out by
+	@ expecting the key to already have the enc_key work done (see aes_glue.c)
+	bl	_armv4_AES_set_encrypt_key
+#else
+	mov	r0,#0
+#endif
+	teq	r0,#0
+	ldrne	lr,[sp],#4              @ pop lr
+	bne	.Labrt
+
+	stmdb   sp!,{r4-r12}
+
+	ldr	r12,[r2,#240]	@ AES_set_encrypt_key preserves r2,
+	mov	r11,r2			@ which is AES_KEY *key
+	mov	r7,r2
+	add	r8,r2,r12,lsl#4
+
+.Linv:	ldr	r0,[r7]
+	ldr	r1,[r7,#4]
+	ldr	r2,[r7,#8]
+	ldr	r3,[r7,#12]
+	ldr	r4,[r8]
+	ldr	r5,[r8,#4]
+	ldr	r6,[r8,#8]
+	ldr	r9,[r8,#12]
+	str	r0,[r8],#-16
+	str	r1,[r8,#16+4]
+	str	r2,[r8,#16+8]
+	str	r3,[r8,#16+12]
+	str	r4,[r7],#16
+	str	r5,[r7,#-12]
+	str	r6,[r7,#-8]
+	str	r9,[r7,#-4]
+	teq	r7,r8
+	bne	.Linv
+	ldr	r0,[r11,#16]!		@ prefetch tp1
+	mov	r7,#0x80
+	mov	r8,#0x1b
+	orr	r7,r7,#0x8000
+	orr	r8,r8,#0x1b00
+	orr	r7,r7,r7,lsl#16
+	orr	r8,r8,r8,lsl#16
+	sub	r12,r12,#1
+	mvn	r9,r7
+	mov	r12,r12,lsl#2	@ (rounds-1)*4
+
+.Lmix:	and	r4,r0,r7
+	and	r1,r0,r9
+	sub	r4,r4,r4,lsr#7
+	and	r4,r4,r8
+	eor	r1,r4,r1,lsl#1	@ tp2
+
+	and	r4,r1,r7
+	and	r2,r1,r9
+	sub	r4,r4,r4,lsr#7
+	and	r4,r4,r8
+	eor	r2,r4,r2,lsl#1	@ tp4
+
+	and	r4,r2,r7
+	and	r3,r2,r9
+	sub	r4,r4,r4,lsr#7
+	and	r4,r4,r8
+	eor	r3,r4,r3,lsl#1	@ tp8
+
+	eor	r4,r1,r2
+	eor	r5,r0,r3		@ tp9
+	eor	r4,r4,r3		@ tpe
+	eor	r4,r4,r1,ror#24
+	eor	r4,r4,r5,ror#24	@ ^= ROTATE(tpb=tp9^tp2,8)
+	eor	r4,r4,r2,ror#16
+	eor	r4,r4,r5,ror#16	@ ^= ROTATE(tpd=tp9^tp4,16)
+	eor	r4,r4,r5,ror#8	@ ^= ROTATE(tp9,24)
+
+	ldr	r0,[r11,#4]		@ prefetch tp1
+	str	r4,[r11],#4
+	subs	r12,r12,#1
+	bne	.Lmix
+
+	mov	r0,#0
+#if __ARM_ARCH__>=5
+	ldmia	sp!,{r4-r12,pc}
+#else
+	ldmia   sp!,{r4-r12,lr}
+	tst	lr,#1
+	moveq	pc,lr			@ be binary compatible with V4, yet
+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+#endif
+.size	private_AES_set_decrypt_key,.-private_AES_set_decrypt_key
+
+.type	AES_Td,%object
+.align	5
+AES_Td:
+.word	0x51f4a750, 0x7e416553, 0x1a17a4c3, 0x3a275e96
+.word	0x3bab6bcb, 0x1f9d45f1, 0xacfa58ab, 0x4be30393
+.word	0x2030fa55, 0xad766df6, 0x88cc7691, 0xf5024c25
+.word	0x4fe5d7fc, 0xc52acbd7, 0x26354480, 0xb562a38f
+.word	0xdeb15a49, 0x25ba1b67, 0x45ea0e98, 0x5dfec0e1
+.word	0xc32f7502, 0x814cf012, 0x8d4697a3, 0x6bd3f9c6
+.word	0x038f5fe7, 0x15929c95, 0xbf6d7aeb, 0x955259da
+.word	0xd4be832d, 0x587421d3, 0x49e06929, 0x8ec9c844
+.word	0x75c2896a, 0xf48e7978, 0x99583e6b, 0x27b971dd
+.word	0xbee14fb6, 0xf088ad17, 0xc920ac66, 0x7dce3ab4
+.word	0x63df4a18, 0xe51a3182, 0x97513360, 0x62537f45
+.word	0xb16477e0, 0xbb6bae84, 0xfe81a01c, 0xf9082b94
+.word	0x70486858, 0x8f45fd19, 0x94de6c87, 0x527bf8b7
+.word	0xab73d323, 0x724b02e2, 0xe31f8f57, 0x6655ab2a
+.word	0xb2eb2807, 0x2fb5c203, 0x86c57b9a, 0xd33708a5
+.word	0x302887f2, 0x23bfa5b2, 0x02036aba, 0xed16825c
+.word	0x8acf1c2b, 0xa779b492, 0xf307f2f0, 0x4e69e2a1
+.word	0x65daf4cd, 0x0605bed5, 0xd134621f, 0xc4a6fe8a
+.word	0x342e539d, 0xa2f355a0, 0x058ae132, 0xa4f6eb75
+.word	0x0b83ec39, 0x4060efaa, 0x5e719f06, 0xbd6e1051
+.word	0x3e218af9, 0x96dd063d, 0xdd3e05ae, 0x4de6bd46
+.word	0x91548db5, 0x71c45d05, 0x0406d46f, 0x605015ff
+.word	0x1998fb24, 0xd6bde997, 0x894043cc, 0x67d99e77
+.word	0xb0e842bd, 0x07898b88, 0xe7195b38, 0x79c8eedb
+.word	0xa17c0a47, 0x7c420fe9, 0xf8841ec9, 0x00000000
+.word	0x09808683, 0x322bed48, 0x1e1170ac, 0x6c5a724e
+.word	0xfd0efffb, 0x0f853856, 0x3daed51e, 0x362d3927
+.word	0x0a0fd964, 0x685ca621, 0x9b5b54d1, 0x24362e3a
+.word	0x0c0a67b1, 0x9357e70f, 0xb4ee96d2, 0x1b9b919e
+.word	0x80c0c54f, 0x61dc20a2, 0x5a774b69, 0x1c121a16
+.word	0xe293ba0a, 0xc0a02ae5, 0x3c22e043, 0x121b171d
+.word	0x0e090d0b, 0xf28bc7ad, 0x2db6a8b9, 0x141ea9c8
+.word	0x57f11985, 0xaf75074c, 0xee99ddbb, 0xa37f60fd
+.word	0xf701269f, 0x5c72f5bc, 0x44663bc5, 0x5bfb7e34
+.word	0x8b432976, 0xcb23c6dc, 0xb6edfc68, 0xb8e4f163
+.word	0xd731dcca, 0x42638510, 0x13972240, 0x84c61120
+.word	0x854a247d, 0xd2bb3df8, 0xaef93211, 0xc729a16d
+.word	0x1d9e2f4b, 0xdcb230f3, 0x0d8652ec, 0x77c1e3d0
+.word	0x2bb3166c, 0xa970b999, 0x119448fa, 0x47e96422
+.word	0xa8fc8cc4, 0xa0f03f1a, 0x567d2cd8, 0x223390ef
+.word	0x87494ec7, 0xd938d1c1, 0x8ccaa2fe, 0x98d40b36
+.word	0xa6f581cf, 0xa57ade28, 0xdab78e26, 0x3fadbfa4
+.word	0x2c3a9de4, 0x5078920d, 0x6a5fcc9b, 0x547e4662
+.word	0xf68d13c2, 0x90d8b8e8, 0x2e39f75e, 0x82c3aff5
+.word	0x9f5d80be, 0x69d0937c, 0x6fd52da9, 0xcf2512b3
+.word	0xc8ac993b, 0x10187da7, 0xe89c636e, 0xdb3bbb7b
+.word	0xcd267809, 0x6e5918f4, 0xec9ab701, 0x834f9aa8
+.word	0xe6956e65, 0xaaffe67e, 0x21bccf08, 0xef15e8e6
+.word	0xbae79bd9, 0x4a6f36ce, 0xea9f09d4, 0x29b07cd6
+.word	0x31a4b2af, 0x2a3f2331, 0xc6a59430, 0x35a266c0
+.word	0x744ebc37, 0xfc82caa6, 0xe090d0b0, 0x33a7d815
+.word	0xf104984a, 0x41ecdaf7, 0x7fcd500e, 0x1791f62f
+.word	0x764dd68d, 0x43efb04d, 0xccaa4d54, 0xe49604df
+.word	0x9ed1b5e3, 0x4c6a881b, 0xc12c1fb8, 0x4665517f
+.word	0x9d5eea04, 0x018c355d, 0xfa877473, 0xfb0b412e
+.word	0xb3671d5a, 0x92dbd252, 0xe9105633, 0x6dd64713
+.word	0x9ad7618c, 0x37a10c7a, 0x59f8148e, 0xeb133c89
+.word	0xcea927ee, 0xb761c935, 0xe11ce5ed, 0x7a47b13c
+.word	0x9cd2df59, 0x55f2733f, 0x1814ce79, 0x73c737bf
+.word	0x53f7cdea, 0x5ffdaa5b, 0xdf3d6f14, 0x7844db86
+.word	0xcaaff381, 0xb968c43e, 0x3824342c, 0xc2a3405f
+.word	0x161dc372, 0xbce2250c, 0x283c498b, 0xff0d9541
+.word	0x39a80171, 0x080cb3de, 0xd8b4e49c, 0x6456c190
+.word	0x7bcb8461, 0xd532b670, 0x486c5c74, 0xd0b85742
+@ Td4[256]
+.byte	0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38
+.byte	0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
+.byte	0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87
+.byte	0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
+.byte	0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d
+.byte	0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
+.byte	0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2
+.byte	0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
+.byte	0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16
+.byte	0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
+.byte	0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda
+.byte	0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
+.byte	0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a
+.byte	0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
+.byte	0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02
+.byte	0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
+.byte	0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea
+.byte	0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
+.byte	0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85
+.byte	0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
+.byte	0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89
+.byte	0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
+.byte	0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20
+.byte	0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
+.byte	0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31
+.byte	0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
+.byte	0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d
+.byte	0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
+.byte	0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0
+.byte	0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
+.byte	0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26
+.byte	0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
+.size	AES_Td,.-AES_Td
+
+@ void AES_decrypt(const unsigned char *in, unsigned char *out,
+@ 		 const AES_KEY *key) {
+.global AES_decrypt
+.type   AES_decrypt,%function
+.align	5
+AES_decrypt:
+	sub	r3,pc,#8		@ AES_decrypt
+	stmdb   sp!,{r1,r4-r12,lr}
+	mov	r12,r0		@ inp
+	mov	r11,r2
+	sub	r10,r3,#AES_decrypt-AES_Td		@ Td
+#if __ARM_ARCH__<7
+	ldrb	r0,[r12,#3]	@ load input data in endian-neutral
+	ldrb	r4,[r12,#2]	@ manner...
+	ldrb	r5,[r12,#1]
+	ldrb	r6,[r12,#0]
+	orr	r0,r0,r4,lsl#8
+	ldrb	r1,[r12,#7]
+	orr	r0,r0,r5,lsl#16
+	ldrb	r4,[r12,#6]
+	orr	r0,r0,r6,lsl#24
+	ldrb	r5,[r12,#5]
+	ldrb	r6,[r12,#4]
+	orr	r1,r1,r4,lsl#8
+	ldrb	r2,[r12,#11]
+	orr	r1,r1,r5,lsl#16
+	ldrb	r4,[r12,#10]
+	orr	r1,r1,r6,lsl#24
+	ldrb	r5,[r12,#9]
+	ldrb	r6,[r12,#8]
+	orr	r2,r2,r4,lsl#8
+	ldrb	r3,[r12,#15]
+	orr	r2,r2,r5,lsl#16
+	ldrb	r4,[r12,#14]
+	orr	r2,r2,r6,lsl#24
+	ldrb	r5,[r12,#13]
+	ldrb	r6,[r12,#12]
+	orr	r3,r3,r4,lsl#8
+	orr	r3,r3,r5,lsl#16
+	orr	r3,r3,r6,lsl#24
+#else
+	ldr	r0,[r12,#0]
+	ldr	r1,[r12,#4]
+	ldr	r2,[r12,#8]
+	ldr	r3,[r12,#12]
+#ifdef __ARMEL__
+	rev	r0,r0
+	rev	r1,r1
+	rev	r2,r2
+	rev	r3,r3
+#endif
+#endif
+	bl	_armv4_AES_decrypt
+
+	ldr	r12,[sp],#4		@ pop out
+#if __ARM_ARCH__>=7
+#ifdef __ARMEL__
+	rev	r0,r0
+	rev	r1,r1
+	rev	r2,r2
+	rev	r3,r3
+#endif
+	str	r0,[r12,#0]
+	str	r1,[r12,#4]
+	str	r2,[r12,#8]
+	str	r3,[r12,#12]
+#else
+	mov	r4,r0,lsr#24		@ write output in endian-neutral
+	mov	r5,r0,lsr#16		@ manner...
+	mov	r6,r0,lsr#8
+	strb	r4,[r12,#0]
+	strb	r5,[r12,#1]
+	mov	r4,r1,lsr#24
+	strb	r6,[r12,#2]
+	mov	r5,r1,lsr#16
+	strb	r0,[r12,#3]
+	mov	r6,r1,lsr#8
+	strb	r4,[r12,#4]
+	strb	r5,[r12,#5]
+	mov	r4,r2,lsr#24
+	strb	r6,[r12,#6]
+	mov	r5,r2,lsr#16
+	strb	r1,[r12,#7]
+	mov	r6,r2,lsr#8
+	strb	r4,[r12,#8]
+	strb	r5,[r12,#9]
+	mov	r4,r3,lsr#24
+	strb	r6,[r12,#10]
+	mov	r5,r3,lsr#16
+	strb	r2,[r12,#11]
+	mov	r6,r3,lsr#8
+	strb	r4,[r12,#12]
+	strb	r5,[r12,#13]
+	strb	r6,[r12,#14]
+	strb	r3,[r12,#15]
+#endif
+#if __ARM_ARCH__>=5
+	ldmia	sp!,{r4-r12,pc}
+#else
+	ldmia   sp!,{r4-r12,lr}
+	tst	lr,#1
+	moveq	pc,lr			@ be binary compatible with V4, yet
+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+#endif
+.size	AES_decrypt,.-AES_decrypt
+
+.type   _armv4_AES_decrypt,%function
+.align	2
+_armv4_AES_decrypt:
+	str	lr,[sp,#-4]!		@ push lr
+	ldmia	r11!,{r4-r7}
+	eor	r0,r0,r4
+	ldr	r12,[r11,#240-16]
+	eor	r1,r1,r5
+	eor	r2,r2,r6
+	eor	r3,r3,r7
+	sub	r12,r12,#1
+	mov	lr,#255
+
+	and	r7,lr,r0,lsr#16
+	and	r8,lr,r0,lsr#8
+	and	r9,lr,r0
+	mov	r0,r0,lsr#24
+.Ldec_loop:
+	ldr	r4,[r10,r7,lsl#2]	@ Td1[s0>>16]
+	and	r7,lr,r1		@ i0
+	ldr	r5,[r10,r8,lsl#2]	@ Td2[s0>>8]
+	and	r8,lr,r1,lsr#16
+	ldr	r6,[r10,r9,lsl#2]	@ Td3[s0>>0]
+	and	r9,lr,r1,lsr#8
+	ldr	r0,[r10,r0,lsl#2]	@ Td0[s0>>24]
+	mov	r1,r1,lsr#24
+
+	ldr	r7,[r10,r7,lsl#2]	@ Td3[s1>>0]
+	ldr	r8,[r10,r8,lsl#2]	@ Td1[s1>>16]
+	ldr	r9,[r10,r9,lsl#2]	@ Td2[s1>>8]
+	eor	r0,r0,r7,ror#24
+	ldr	r1,[r10,r1,lsl#2]	@ Td0[s1>>24]
+	and	r7,lr,r2,lsr#8	@ i0
+	eor	r5,r8,r5,ror#8
+	and	r8,lr,r2		@ i1
+	eor	r6,r9,r6,ror#8
+	and	r9,lr,r2,lsr#16
+	ldr	r7,[r10,r7,lsl#2]	@ Td2[s2>>8]
+	eor	r1,r1,r4,ror#8
+	ldr	r8,[r10,r8,lsl#2]	@ Td3[s2>>0]
+	mov	r2,r2,lsr#24
+
+	ldr	r9,[r10,r9,lsl#2]	@ Td1[s2>>16]
+	eor	r0,r0,r7,ror#16
+	ldr	r2,[r10,r2,lsl#2]	@ Td0[s2>>24]
+	and	r7,lr,r3,lsr#16	@ i0
+	eor	r1,r1,r8,ror#24
+	and	r8,lr,r3,lsr#8	@ i1
+	eor	r6,r9,r6,ror#8
+	and	r9,lr,r3		@ i2
+	ldr	r7,[r10,r7,lsl#2]	@ Td1[s3>>16]
+	eor	r2,r2,r5,ror#8
+	ldr	r8,[r10,r8,lsl#2]	@ Td2[s3>>8]
+	mov	r3,r3,lsr#24
+
+	ldr	r9,[r10,r9,lsl#2]	@ Td3[s3>>0]
+	eor	r0,r0,r7,ror#8
+	ldr	r7,[r11],#16
+	eor	r1,r1,r8,ror#16
+	ldr	r3,[r10,r3,lsl#2]	@ Td0[s3>>24]
+	eor	r2,r2,r9,ror#24
+
+	ldr	r4,[r11,#-12]
+	eor	r0,r0,r7
+	ldr	r5,[r11,#-8]
+	eor	r3,r3,r6,ror#8
+	ldr	r6,[r11,#-4]
+	and	r7,lr,r0,lsr#16
+	eor	r1,r1,r4
+	and	r8,lr,r0,lsr#8
+	eor	r2,r2,r5
+	and	r9,lr,r0
+	eor	r3,r3,r6
+	mov	r0,r0,lsr#24
+
+	subs	r12,r12,#1
+	bne	.Ldec_loop
+
+	add	r10,r10,#1024
+
+	ldr	r5,[r10,#0]		@ prefetch Td4
+	ldr	r6,[r10,#32]
+	ldr	r4,[r10,#64]
+	ldr	r5,[r10,#96]
+	ldr	r6,[r10,#128]
+	ldr	r4,[r10,#160]
+	ldr	r5,[r10,#192]
+	ldr	r6,[r10,#224]
+
+	ldrb	r0,[r10,r0]		@ Td4[s0>>24]
+	ldrb	r4,[r10,r7]		@ Td4[s0>>16]
+	and	r7,lr,r1		@ i0
+	ldrb	r5,[r10,r8]		@ Td4[s0>>8]
+	and	r8,lr,r1,lsr#16
+	ldrb	r6,[r10,r9]		@ Td4[s0>>0]
+	and	r9,lr,r1,lsr#8
+
+	ldrb	r7,[r10,r7]		@ Td4[s1>>0]
+	ldrb	r1,[r10,r1,lsr#24]	@ Td4[s1>>24]
+	ldrb	r8,[r10,r8]		@ Td4[s1>>16]
+	eor	r0,r7,r0,lsl#24
+	ldrb	r9,[r10,r9]		@ Td4[s1>>8]
+	eor	r1,r4,r1,lsl#8
+	and	r7,lr,r2,lsr#8	@ i0
+	eor	r5,r5,r8,lsl#8
+	and	r8,lr,r2		@ i1
+	ldrb	r7,[r10,r7]		@ Td4[s2>>8]
+	eor	r6,r6,r9,lsl#8
+	ldrb	r8,[r10,r8]		@ Td4[s2>>0]
+	and	r9,lr,r2,lsr#16
+
+	ldrb	r2,[r10,r2,lsr#24]	@ Td4[s2>>24]
+	eor	r0,r0,r7,lsl#8
+	ldrb	r9,[r10,r9]		@ Td4[s2>>16]
+	eor	r1,r8,r1,lsl#16
+	and	r7,lr,r3,lsr#16	@ i0
+	eor	r2,r5,r2,lsl#16
+	and	r8,lr,r3,lsr#8	@ i1
+	ldrb	r7,[r10,r7]		@ Td4[s3>>16]
+	eor	r6,r6,r9,lsl#16
+	ldrb	r8,[r10,r8]		@ Td4[s3>>8]
+	and	r9,lr,r3		@ i2
+
+	ldrb	r9,[r10,r9]		@ Td4[s3>>0]
+	ldrb	r3,[r10,r3,lsr#24]	@ Td4[s3>>24]
+	eor	r0,r0,r7,lsl#16
+	ldr	r7,[r11,#0]
+	eor	r1,r1,r8,lsl#8
+	ldr	r4,[r11,#4]
+	eor	r2,r9,r2,lsl#8
+	ldr	r5,[r11,#8]
+	eor	r3,r6,r3,lsl#24
+	ldr	r6,[r11,#12]
+
+	eor	r0,r0,r7
+	eor	r1,r1,r4
+	eor	r2,r2,r5
+	eor	r3,r3,r6
+
+	sub	r10,r10,#1024
+	ldr	pc,[sp],#4		@ pop and return
+.size	_armv4_AES_decrypt,.-_armv4_AES_decrypt
+.asciz	"AES for ARMv4, CRYPTOGAMS by <appro@openssl.org>"
+.align	2
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes_glue.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes_glue.c
new file mode 100644
index 0000000000000..0b065d0d22b72
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/aes_glue.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/crypto.h>
+#include <crypto/aes.h>
+#define AES_MAXNR 14
+typedef struct {
+ unsigned int rd_key[4 *(AES_MAXNR + 1)];
+ int rounds;
+} AES_KEY;
+struct AES_CTX {
+ AES_KEY enc_key;
+ AES_KEY dec_key;
+};
+asmlinkage void AES_encrypt(const u8 *in, u8 *out, AES_KEY *ctx);
+asmlinkage void AES_decrypt(const u8 *in, u8 *out, AES_KEY *ctx);
+asmlinkage int private_AES_set_decrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key);
+asmlinkage int private_AES_set_encrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key);
+static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+ struct AES_CTX *ctx = crypto_tfm_ctx(tfm);
+ AES_encrypt(src, dst, &ctx->enc_key);
+}
+static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+ struct AES_CTX *ctx = crypto_tfm_ctx(tfm);
+ AES_decrypt(src, dst, &ctx->dec_key);
+}
+static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
+  unsigned int key_len)
+{
+ struct AES_CTX *ctx = crypto_tfm_ctx(tfm);
+ switch (key_len) {
+ case AES_KEYSIZE_128:
+  key_len = 128;
+  break;
+ case AES_KEYSIZE_192:
+  key_len = 192;
+  break;
+ case AES_KEYSIZE_256:
+  key_len = 256;
+  break;
+ default:
+  tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+  return -EINVAL;
+ }
+ if (private_AES_set_encrypt_key(in_key, key_len, &ctx->enc_key) == -1) {
+  tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+  return -EINVAL;
+ }
+ ctx->dec_key = ctx->enc_key;
+ if (private_AES_set_decrypt_key(in_key, key_len, &ctx->dec_key) == -1) {
+  tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+  return -EINVAL;
+ }
+ return 0;
+}
+static struct crypto_alg aes_alg = {
+ .cra_name = "aes",
+ .cra_driver_name = "aes-asm",
+ .cra_priority = 200,
+ .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
+ .cra_blocksize = AES_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct AES_CTX),
+ .cra_module = THIS_MODULE,
+ .cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
+ .cra_u = {
+  .cipher = {
+   .cia_min_keysize = AES_MIN_KEY_SIZE,
+   .cia_max_keysize = AES_MAX_KEY_SIZE,
+   .cia_setkey = aes_set_key,
+   .cia_encrypt = aes_encrypt,
+   .cia_decrypt = aes_decrypt
+  }
+ }
+};
+int aes_init(void)
+{
+ return crypto_register_alg(&aes_alg);
+}
+void aes_fini(void)
+{
+ crypto_unregister_alg(&aes_alg);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1-armv4-large.S b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1-armv4-large.S
new file mode 100644
index 0000000000000..7050ab133b9da
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1-armv4-large.S
@@ -0,0 +1,503 @@
+#define __ARM_ARCH__ __LINUX_ARM_ARCH__
+@ ====================================================================
+@ Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
+@ project. The module is, however, dual licensed under OpenSSL and
+@ CRYPTOGAMS licenses depending on where you obtain it. For further
+@ details see http://www.openssl.org/~appro/cryptogams/.
+@ ====================================================================
+
+@ sha1_block procedure for ARMv4.
+@
+@ January 2007.
+
+@ Size/performance trade-off
+@ ====================================================================
+@ impl		size in bytes	comp cycles[*]	measured performance
+@ ====================================================================
+@ thumb		304		3212		4420
+@ armv4-small	392/+29%	1958/+64%	2250/+96%
+@ armv4-compact	740/+89%	1552/+26%	1840/+22%
+@ armv4-large	1420/+92%	1307/+19%	1370/+34%[***]
+@ full unroll	~5100/+260%	~1260/+4%	~1300/+5%
+@ ====================================================================
+@ thumb		= same as 'small' but in Thumb instructions[**] and
+@		  with recurring code in two private functions;
+@ small		= detached Xload/update, loops are folded;
+@ compact	= detached Xload/update, 5x unroll;
+@ large		= interleaved Xload/update, 5x unroll;
+@ full unroll	= interleaved Xload/update, full unroll, estimated[!];
+@
+@ [*]	Manually counted instructions in "grand" loop body. Measured
+@	performance is affected by prologue and epilogue overhead,
+@	i-cache availability, branch penalties, etc.
+@ [**]	While each Thumb instruction is twice smaller, they are not as
+@	diverse as ARM ones: e.g., there are only two arithmetic
+@	instructions with 3 arguments, no [fixed] rotate, addressing
+@	modes are limited. As result it takes more instructions to do
+@	the same job in Thumb, therefore the code is never twice as
+@	small and always slower.
+@ [***]	which is also ~35% better than compiler generated code. Dual-
+@	issue Cortex A8 core was measured to process input block in
+@	~990 cycles.
+
+@ August 2010.
+@
+@ Rescheduling for dual-issue pipeline resulted in 13% improvement on
+@ Cortex A8 core and in absolute terms ~870 cycles per input block
+@ [or 13.6 cycles per byte].
+
+@ February 2011.
+@
+@ Profiler-assisted and platform-specific optimization resulted in 10%
+@ improvement on Cortex A8 core and 12.2 cycles per byte.
+
+.text
+
+.global	sha1_block_data_order
+.type	sha1_block_data_order,%function
+
+.align	2
+sha1_block_data_order:
+	stmdb	sp!,{r4-r12,lr}
+	add	r2,r1,r2,lsl#6	@ r2 to point at the end of r1
+	ldmia	r0,{r3,r4,r5,r6,r7}
+.Lloop:
+	ldr	r8,.LK_00_19
+	mov	r14,sp
+	sub	sp,sp,#15*4
+	mov	r5,r5,ror#30
+	mov	r6,r6,ror#30
+	mov	r7,r7,ror#30		@ [6]
+.L_00_15:
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r7,r8,r7,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r5,r6			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r7,r8,r7,ror#2			@ E+=K_00_19
+	eor	r10,r5,r6			@ F_xx_xx
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r4,r10,ror#2
+	add	r7,r7,r9			@ E+=X[i]
+	eor	r10,r10,r6,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r7,r7,r10			@ E+=F_00_19(B,C,D)
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r6,r8,r6,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r4,r5			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r6,r8,r6,ror#2			@ E+=K_00_19
+	eor	r10,r4,r5			@ F_xx_xx
+	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r3,r10,ror#2
+	add	r6,r6,r9			@ E+=X[i]
+	eor	r10,r10,r5,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r6,r6,r10			@ E+=F_00_19(B,C,D)
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r5,r8,r5,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r3,r4			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r5,r8,r5,ror#2			@ E+=K_00_19
+	eor	r10,r3,r4			@ F_xx_xx
+	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r7,r10,ror#2
+	add	r5,r5,r9			@ E+=X[i]
+	eor	r10,r10,r4,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r5,r5,r10			@ E+=F_00_19(B,C,D)
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r4,r8,r4,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r7,r3			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r4,r8,r4,ror#2			@ E+=K_00_19
+	eor	r10,r7,r3			@ F_xx_xx
+	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r6,r10,ror#2
+	add	r4,r4,r9			@ E+=X[i]
+	eor	r10,r10,r3,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r4,r4,r10			@ E+=F_00_19(B,C,D)
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r3,r8,r3,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r6,r7			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r3,r8,r3,ror#2			@ E+=K_00_19
+	eor	r10,r6,r7			@ F_xx_xx
+	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r5,r10,ror#2
+	add	r3,r3,r9			@ E+=X[i]
+	eor	r10,r10,r7,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r3,r3,r10			@ E+=F_00_19(B,C,D)
+	teq	r14,sp
+	bne	.L_00_15		@ [((11+4)*5+2)*3]
+#if __ARM_ARCH__<7
+	ldrb	r10,[r1,#2]
+	ldrb	r9,[r1,#3]
+	ldrb	r11,[r1,#1]
+	add	r7,r8,r7,ror#2			@ E+=K_00_19
+	ldrb	r12,[r1],#4
+	orr	r9,r9,r10,lsl#8
+	eor	r10,r5,r6			@ F_xx_xx
+	orr	r9,r9,r11,lsl#16
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+	orr	r9,r9,r12,lsl#24
+#else
+	ldr	r9,[r1],#4			@ handles unaligned
+	add	r7,r8,r7,ror#2			@ E+=K_00_19
+	eor	r10,r5,r6			@ F_xx_xx
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+#ifdef __ARMEL__
+	rev	r9,r9				@ byte swap
+#endif
+#endif
+	and	r10,r4,r10,ror#2
+	add	r7,r7,r9			@ E+=X[i]
+	eor	r10,r10,r6,ror#2		@ F_00_19(B,C,D)
+	str	r9,[r14,#-4]!
+	add	r7,r7,r10			@ E+=F_00_19(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r6,r8,r6,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r4,r5			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r3,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r6,r6,r9			@ E+=X[i]
+	eor	r10,r10,r5,ror#2		@ F_00_19(B,C,D)
+	add	r6,r6,r10			@ E+=F_00_19(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r5,r8,r5,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r3,r4			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r7,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r5,r5,r9			@ E+=X[i]
+	eor	r10,r10,r4,ror#2		@ F_00_19(B,C,D)
+	add	r5,r5,r10			@ E+=F_00_19(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r4,r8,r4,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r7,r3			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r6,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r4,r4,r9			@ E+=X[i]
+	eor	r10,r10,r3,ror#2		@ F_00_19(B,C,D)
+	add	r4,r4,r10			@ E+=F_00_19(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r3,r8,r3,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r6,r7			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r5,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r3,r3,r9			@ E+=X[i]
+	eor	r10,r10,r7,ror#2		@ F_00_19(B,C,D)
+	add	r3,r3,r10			@ E+=F_00_19(B,C,D)
+
+	ldr	r8,.LK_20_39		@ [+15+16*4]
+	sub	sp,sp,#25*4
+	cmn	sp,#0			@ [+3], clear carry to denote 20_39
+.L_20_39_or_60_79:
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r7,r8,r7,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r5,r6			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	eor r10,r4,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r7,r7,r9			@ E+=X[i]
+	add	r7,r7,r10			@ E+=F_20_39(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r6,r8,r6,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r4,r5			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	eor r10,r3,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r6,r6,r9			@ E+=X[i]
+	add	r6,r6,r10			@ E+=F_20_39(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r5,r8,r5,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r3,r4			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	eor r10,r7,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r5,r5,r9			@ E+=X[i]
+	add	r5,r5,r10			@ E+=F_20_39(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r4,r8,r4,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r7,r3			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	eor r10,r6,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r4,r4,r9			@ E+=X[i]
+	add	r4,r4,r10			@ E+=F_20_39(B,C,D)
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r3,r8,r3,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r6,r7			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	eor r10,r5,r10,ror#2					@ F_xx_xx
+						@ F_xx_xx
+	add	r3,r3,r9			@ E+=X[i]
+	add	r3,r3,r10			@ E+=F_20_39(B,C,D)
+	teq	r14,sp			@ preserve carry
+	bne	.L_20_39_or_60_79	@ [+((12+3)*5+2)*4]
+	bcs	.L_done			@ [+((12+3)*5+2)*4], spare 300 bytes
+
+	ldr	r8,.LK_40_59
+	sub	sp,sp,#20*4		@ [+2]
+.L_40_59:
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r7,r8,r7,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r5,r6			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r4,r10,ror#2					@ F_xx_xx
+	and r11,r5,r6					@ F_xx_xx
+	add	r7,r7,r9			@ E+=X[i]
+	add	r7,r7,r10			@ E+=F_40_59(B,C,D)
+	add	r7,r7,r11,ror#2
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r6,r8,r6,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r4,r5			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r3,r10,ror#2					@ F_xx_xx
+	and r11,r4,r5					@ F_xx_xx
+	add	r6,r6,r9			@ E+=X[i]
+	add	r6,r6,r10			@ E+=F_40_59(B,C,D)
+	add	r6,r6,r11,ror#2
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r5,r8,r5,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r3,r4			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r7,r10,ror#2					@ F_xx_xx
+	and r11,r3,r4					@ F_xx_xx
+	add	r5,r5,r9			@ E+=X[i]
+	add	r5,r5,r10			@ E+=F_40_59(B,C,D)
+	add	r5,r5,r11,ror#2
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r4,r8,r4,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r7,r3			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r6,r10,ror#2					@ F_xx_xx
+	and r11,r7,r3					@ F_xx_xx
+	add	r4,r4,r9			@ E+=X[i]
+	add	r4,r4,r10			@ E+=F_40_59(B,C,D)
+	add	r4,r4,r11,ror#2
+	ldr	r9,[r14,#15*4]
+	ldr	r10,[r14,#13*4]
+	ldr	r11,[r14,#7*4]
+	add	r3,r8,r3,ror#2			@ E+=K_xx_xx
+	ldr	r12,[r14,#2*4]
+	eor	r9,r9,r10
+	eor	r11,r11,r12			@ 1 cycle stall
+	eor	r10,r6,r7			@ F_xx_xx
+	mov	r9,r9,ror#31
+	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)
+	eor	r9,r9,r11,ror#31
+	str	r9,[r14,#-4]!
+	and r10,r5,r10,ror#2					@ F_xx_xx
+	and r11,r6,r7					@ F_xx_xx
+	add	r3,r3,r9			@ E+=X[i]
+	add	r3,r3,r10			@ E+=F_40_59(B,C,D)
+	add	r3,r3,r11,ror#2
+	teq	r14,sp
+	bne	.L_40_59		@ [+((12+5)*5+2)*4]
+
+	ldr	r8,.LK_60_79
+	sub	sp,sp,#20*4
+	cmp	sp,#0			@ set carry to denote 60_79
+	b	.L_20_39_or_60_79	@ [+4], spare 300 bytes
+.L_done:
+	add	sp,sp,#80*4		@ "deallocate" stack frame
+	ldmia	r0,{r8,r9,r10,r11,r12}
+	add	r3,r8,r3
+	add	r4,r9,r4
+	add	r5,r10,r5,ror#2
+	add	r6,r11,r6,ror#2
+	add	r7,r12,r7,ror#2
+	stmia	r0,{r3,r4,r5,r6,r7}
+	teq	r1,r2
+	bne	.Lloop			@ [+18], total 1307
+
+#if __ARM_ARCH__>=5
+	ldmia	sp!,{r4-r12,pc}
+#else
+	ldmia	sp!,{r4-r12,lr}
+	tst	lr,#1
+	moveq	pc,lr			@ be binary compatible with V4, yet
+	.word	0xe12fff1e			@ interoperable with Thumb ISA:-)
+#endif
+.align	2
+.LK_00_19:	.word	0x5a827999
+.LK_20_39:	.word	0x6ed9eba1
+.LK_40_59:	.word	0x8f1bbcdc
+.LK_60_79:	.word	0xca62c1d6
+.size	sha1_block_data_order,.-sha1_block_data_order
+.asciz	"SHA1 block transform for ARMv4, CRYPTOGAMS by <appro@openssl.org>"
+.align	2
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1_glue.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1_glue.c
new file mode 100644
index 0000000000000..d77906ab5c472
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/crypto/sha1_glue.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <crypto/internal/hash.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/cryptohash.h>
+#include <linux/types.h>
+#include <crypto/sha.h>
+#include <asm/byteorder.h>
+struct SHA1_CTX {
+ uint32_t h0,h1,h2,h3,h4;
+ u64 count;
+ u8 data[SHA1_BLOCK_SIZE];
+};
+asmlinkage void sha1_block_data_order(struct SHA1_CTX *digest,
+  const unsigned char *data, unsigned int rounds);
+static int sha1_init(struct shash_desc *desc)
+{
+ struct SHA1_CTX *sctx = shash_desc_ctx(desc);
+ memset(sctx, 0, sizeof(*sctx));
+ sctx->h0 = SHA1_H0;
+ sctx->h1 = SHA1_H1;
+ sctx->h2 = SHA1_H2;
+ sctx->h3 = SHA1_H3;
+ sctx->h4 = SHA1_H4;
+ return 0;
+}
+static int __sha1_update(struct SHA1_CTX *sctx, const u8 *data,
+          unsigned int len, unsigned int partial)
+{
+ unsigned int done = 0;
+ sctx->count += len;
+ if (partial) {
+  done = SHA1_BLOCK_SIZE - partial;
+  memcpy(sctx->data + partial, data, done);
+  sha1_block_data_order(sctx, sctx->data, 1);
+ }
+ if (len - done >= SHA1_BLOCK_SIZE) {
+  const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE;
+  sha1_block_data_order(sctx, data + done, rounds);
+  done += rounds * SHA1_BLOCK_SIZE;
+ }
+ memcpy(sctx->data, data + done, len - done);
+ return 0;
+}
+static int sha1_update(struct shash_desc *desc, const u8 *data,
+        unsigned int len)
+{
+ struct SHA1_CTX *sctx = shash_desc_ctx(desc);
+ unsigned int partial = sctx->count % SHA1_BLOCK_SIZE;
+ int res;
+ if (partial + len < SHA1_BLOCK_SIZE) {
+  sctx->count += len;
+  memcpy(sctx->data + partial, data, len);
+  return 0;
+ }
+ res = __sha1_update(sctx, data, len, partial);
+ return res;
+}
+static int sha1_final(struct shash_desc *desc, u8 *out)
+{
+ struct SHA1_CTX *sctx = shash_desc_ctx(desc);
+ unsigned int i, index, padlen;
+ __be32 *dst = (__be32 *)out;
+ __be64 bits;
+ static const u8 padding[SHA1_BLOCK_SIZE] = { 0x80, };
+ bits = cpu_to_be64(sctx->count << 3);
+ index = sctx->count % SHA1_BLOCK_SIZE;
+ padlen = (index < 56) ? (56 - index) : ((SHA1_BLOCK_SIZE+56) - index);
+ if (padlen <= 56) {
+  sctx->count += padlen;
+  memcpy(sctx->data + index, padding, padlen);
+ } else {
+  __sha1_update(sctx, padding, padlen, index);
+ }
+ __sha1_update(sctx, (const u8 *)&bits, sizeof(bits), 56);
+ for (i = 0; i < 5; i++)
+  dst[i] = cpu_to_be32(((u32 *)sctx)[i]);
+ memset(sctx, 0, sizeof(*sctx));
+ return 0;
+}
+static int sha1_export(struct shash_desc *desc, void *out)
+{
+ struct SHA1_CTX *sctx = shash_desc_ctx(desc);
+ memcpy(out, sctx, sizeof(*sctx));
+ return 0;
+}
+static int sha1_import(struct shash_desc *desc, const void *in)
+{
+ struct SHA1_CTX *sctx = shash_desc_ctx(desc);
+ memcpy(sctx, in, sizeof(*sctx));
+ return 0;
+}
+static struct shash_alg alg = {
+ .digestsize = SHA1_DIGEST_SIZE,
+ .init = sha1_init,
+ .update = sha1_update,
+ .final = sha1_final,
+ .export = sha1_export,
+ .import = sha1_import,
+ .descsize = sizeof(struct SHA1_CTX),
+ .statesize = sizeof(struct SHA1_CTX),
+ .base = {
+  .cra_name = "sha1",
+  .cra_driver_name= "sha1-asm",
+  .cra_priority = 150,
+  .cra_flags = CRYPTO_ALG_TYPE_SHASH,
+  .cra_blocksize = SHA1_BLOCK_SIZE,
+  .cra_module = THIS_MODULE,
+ }
+};
+int sha1_mod_init(void)
+{
+ return crypto_register_shash(&alg);
+}
+void sha1_mod_fini(void)
+{
+ crypto_unregister_shash(&alg);
+}
+#if 0
+module_init(sha1_mod_init);
+module_exit(sha1_mod_fini);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm (ARM)");
+MODULE_ALIAS("sha1");
+MODULE_AUTHOR("David McCullough <ucdevel@gmail.com>");
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/firmware/ssv6051-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/firmware/ssv6051-wifi.cfg
new file mode 100644
index 0000000000000..c072960f6dead
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/firmware/ssv6051-wifi.cfg
@@ -0,0 +1,91 @@
+############################################################
+# ROCKCHIP RK3X28 & RK322X
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /vendor/etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+################################################
+# Signal strength control
+# rssi control
+#rssi_ctl = 10
+
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/gen-version.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/gen-version.sh
new file mode 100644
index 0000000000000..51fbb6487f1df
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/gen-version.sh
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+./ver_info.pl include/ssv_version.h
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/genconf.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/genconf.sh
new file mode 100644
index 0000000000000..e98ee029a72bd
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/genconf.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+# Script to convert defines in compiler option in to C's defines
+# Should be executed in make file and it take ccflags-y as the
+# compiler options. The content will be redirected to the first arguement.
+
+echo "#ifndef __SSV_MOD_CONF_H__" > $1
+echo "#define __SSV_MOD_CONF_H__" >> $1
+
+for flag in ${ccflags-y}; do
+	if [[ "$flag" =~ ^-D.* ]]; then
+		#def=${flag//-D/}
+		def=${flag:2}
+		echo "#ifndef $def" >> $1
+		echo "#define $def" >> $1
+		echo "#endif" >> $1
+	fi
+done
+
+echo "#define __must_check" >> $1
+echo "#define __devinit" >> $1
+echo "#define __devexit" >> $1
+echo "#define __init" >> $1
+echo "#define __exit" >> $1
+
+echo "#endif // __SSV_MOD_CONF_H__" >> $1
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/Makefile
new file mode 100644
index 0000000000000..8b872d665768d
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/Makefile
@@ -0,0 +1,19 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/ssvdevice/Module.symvers
+
+
+KMODULE_NAME=ssv6200_hci
+KERN_SRCS += ssv_hci.c
+
+
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/hctrl.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/hctrl.h
new file mode 100644
index 0000000000000..7d6ec63d87055
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/hctrl.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _HCTRL_H_
+#define _HCTRL_H_ 
+#define MAX_FRAME_SIZE 4096
+#define SSV6XXX_INT_RX 0x00000001
+#define SSV6XXX_INT_TX 0x00000002
+#define SSV6XXX_INT_SOC 0x00000004
+#define SSV6XXX_INT_LOW_EDCA_0 0x00000008
+#define SSV6XXX_INT_LOW_EDCA_1 0x00000010
+#define SSV6XXX_INT_LOW_EDCA_2 0x00000020
+#define SSV6XXX_INT_LOW_EDCA_3 0x00000040
+#define SSV6XXX_INT_RESOURCE_LOW 0x00000080
+#define IFDEV(_ct) ((_ct)->shi->dev)
+#define IFOPS(_ct) ((_ct)->shi->if_ops)
+#define HCI_REG_READ(_ct,_adr,_val) IFOPS(_ct)->readreg(IFDEV(_ct), _adr, _val)
+#define HCI_REG_WRITE(_ct,_adr,_val) IFOPS(_ct)->writereg(IFDEV(_ct), _adr, _val)
+#define HCI_REG_SET_BITS(_ct,_reg,_set,_clr) \
+{ \
+    u32 _regval; \
+    if(HCI_REG_READ(_ct, _reg, &_regval)); \
+    _regval &= ~(_clr); \
+    _regval |= (_set); \
+    if(HCI_REG_WRITE(_ct, _reg, _regval)); \
+}
+#define IF_SEND(_ct,_bf,_len,_qid) IFOPS(_ct)->write(IFDEV(_ct), _bf, _len, _qid)
+#define IF_RECV(ct,bf,len) IFOPS(ct)->read(IFDEV(ct), bf, len)
+#define HCI_LOAD_FW(ct,_bf,open) IFOPS(ct)->load_fw(IFDEV(ct), _bf, open)
+#define HCI_IFC_RESET(ct) IFOPS(ct)->interface_reset(IFDEV(ct))
+struct ssv6xxx_hci_ctrl {
+    struct ssv6xxx_hci_info *shi;
+    spinlock_t int_lock;
+    u32 int_status;
+    u32 int_mask;
+    struct mutex txq_mask_lock;
+    u32 txq_mask;
+    struct ssv_hw_txq hw_txq[SSV_HW_TXQ_NUM];
+    struct mutex hci_mutex;
+    bool hci_start;
+    struct sk_buff *rx_buf;
+    u32 rx_pkt;
+    struct workqueue_struct *hci_work_queue;
+    struct work_struct hci_rx_work;
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    struct work_struct hci_tx_work;
+#else
+    struct work_struct hci_tx_work[SSV_HW_TXQ_NUM];
+#endif
+    u32 read_rs0_info_fail;
+    u32 read_rs1_info_fail;
+    u32 rx_work_running;
+    u32 isr_running;
+    u32 xmit_running;
+    u32 isr_summary_eable;
+    u32 isr_routine_time;
+    u32 isr_tx_time;
+    u32 isr_rx_time;
+    u32 isr_idle_time;
+    u32 isr_rx_idle_time;
+    u32 isr_miss_cnt;
+    unsigned long prev_isr_jiffes;
+    unsigned long prev_rx_isr_jiffes;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+ struct dentry *debugfs_dir;
+ u32 isr_mib_enable;
+ u32 isr_mib_reset;
+ long long isr_total_time;
+ long long isr_tx_io_time;
+ long long isr_rx_io_time;
+ u32 isr_rx_io_count;
+ u32 isr_tx_io_count;
+ long long isr_rx_proc_time;
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+    bool irq_enable;
+    u32 irq_count;
+    u32 invalid_irq_count;
+    u32 tx_irq_count;
+    u32 real_tx_irq_count;
+    u32 rx_irq_count;
+    u32 irq_rx_pkt_count;
+    u32 irq_tx_pkt_count;
+#endif
+#endif
+};
+struct ssv6xxx_hci_txq_info {
+ u32 tx_use_page:8;
+    u32 tx_use_id:6;
+    u32 txq0_size:4;
+ u32 txq1_size:4;
+ u32 txq2_size:5;
+ u32 txq3_size:5;
+};
+struct ssv6xxx_hci_txq_info2 {
+ u32 tx_use_page:9;
+    u32 tx_use_id:8;
+ u32 txq4_size:4;
+    u32 rsvd:11;
+};
+struct ssv6xxx_hw_resource
+{
+ u32 free_tx_page;
+ u32 free_tx_id;
+ int max_tx_frame[SSV_HW_TXQ_NUM];
+};
+static inline void ssv6xxx_hwif_irq_request(struct ssv6xxx_hci_ctrl *hctrl, irq_handler_t irq_handler)
+{
+ if(hctrl->shi->if_ops->irq_request)
+  hctrl->shi->if_ops->irq_request(IFDEV(hctrl), irq_handler, hctrl);
+}
+static inline void ssv6xxx_hwif_irq_enable(struct ssv6xxx_hci_ctrl *hctrl)
+{
+ if(hctrl->shi->if_ops->irq_enable)
+  hctrl->shi->if_ops->irq_enable(IFDEV(hctrl));
+}
+static inline void ssv6xxx_hwif_irq_disable(struct ssv6xxx_hci_ctrl *hctrl)
+{
+ if(hctrl->shi->if_ops->irq_disable)
+  hctrl->shi->if_ops->irq_disable(IFDEV(hctrl), false);
+}
+static inline int ssv6xxx_hwif_irq_getstatus(struct ssv6xxx_hci_ctrl *hctrl, int *status)
+{
+ if(hctrl->shi->if_ops->irq_getstatus)
+  return hctrl->shi->if_ops->irq_getstatus(IFDEV(hctrl), status);
+ return 0;
+}
+static inline void ssv6xxx_hwif_irq_setmask(struct ssv6xxx_hci_ctrl *hctrl, int mask)
+{
+ if(hctrl->shi->if_ops->irq_setmask)
+  hctrl->shi->if_ops->irq_setmask(IFDEV(hctrl), mask);
+}
+static inline void ssv6xxx_hwif_irq_trigger(struct ssv6xxx_hci_ctrl *hctrl)
+{
+ if(hctrl->shi->if_ops->irq_trigger)
+  hctrl->shi->if_ops->irq_trigger(IFDEV(hctrl));
+}
+static inline void ssv6xxx_hwif_pmu_wakeup(struct ssv6xxx_hci_ctrl *hctrl)
+{
+ if(hctrl->shi->if_ops->pmu_wakeup)
+  hctrl->shi->if_ops->pmu_wakeup(IFDEV(hctrl));
+}
+static inline int ssv6xxx_hwif_write_sram(struct ssv6xxx_hci_ctrl *hctrl, u32 addr, u8 *data, u32 size)
+{
+ if(hctrl->shi->if_ops->write_sram)
+  return hctrl->shi->if_ops->write_sram(IFDEV(hctrl), addr, data, size);
+ return 0;
+}
+#define HCI_IRQ_REQUEST(ct,hdle) ssv6xxx_hwif_irq_request(ct, hdle)
+#define HCI_IRQ_ENABLE(ct) ssv6xxx_hwif_irq_enable(ct)
+#define HCI_IRQ_DISABLE(ct) ssv6xxx_hwif_irq_disable(ct)
+#define HCI_IRQ_STATUS(ct,sts) ssv6xxx_hwif_irq_getstatus(ct, sts)
+#define HCI_IRQ_SET_MASK(ct,mk) ssv6xxx_hwif_irq_setmask(ct, mk)
+#define HCI_IRQ_TRIGGER(ct) ssv6xxx_hwif_irq_trigger(ct)
+#define HCI_PMU_WAKEUP(ct) ssv6xxx_hwif_pmu_wakeup(ct)
+#define HCI_SRAM_WRITE(_ct,_adr,_dat,_size) ssv6xxx_hwif_write_sram(_ct, _adr, _dat, _size);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.c
new file mode 100644
index 0000000000000..1903a12af5324
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.c
@@ -0,0 +1,1145 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <ssv6200.h>
+#include "hctrl.h"
+MODULE_AUTHOR("iComm Semiconductor Co., Ltd");
+MODULE_DESCRIPTION("HCI driver for SSV6xxx 802.11n wireless LAN cards.");
+MODULE_SUPPORTED_DEVICE("SSV6xxx WLAN cards");
+MODULE_LICENSE("Dual BSD/GPL");
+static struct ssv6xxx_hci_ctrl *ctrl_hci = NULL;
+struct sk_buff *ssv_skb_alloc(s32 len)
+{
+    struct sk_buff *skb;
+    skb = __dev_alloc_skb(len + SSV6200_ALLOC_RSVD , GFP_KERNEL);
+    if (skb != NULL) {
+        skb_reserve(skb, SSV_SKB_info_size);
+    }
+    return skb;
+}
+void ssv_skb_free(struct sk_buff *skb)
+{
+    dev_kfree_skb_any(skb);
+}
+static int ssv6xxx_hci_irq_enable(void)
+{
+ HCI_IRQ_SET_MASK(ctrl_hci, ~(ctrl_hci->int_mask));
+ HCI_IRQ_ENABLE(ctrl_hci);
+    return 0;
+}
+static int ssv6xxx_hci_irq_disable(void)
+{
+ HCI_IRQ_SET_MASK(ctrl_hci, 0xffffffff);
+ HCI_IRQ_DISABLE(ctrl_hci);
+    return 0;
+}
+static void ssv6xxx_hci_irq_register(u32 irq_mask)
+{
+    unsigned long flags;
+    u32 regval;
+    mutex_lock(&ctrl_hci->hci_mutex);
+    spin_lock_irqsave(&ctrl_hci->int_lock, flags);
+    ctrl_hci->int_mask |= irq_mask;
+    regval = ~ctrl_hci->int_mask;
+    spin_unlock_irqrestore(&ctrl_hci->int_lock, flags);
+    smp_mb();
+    HCI_IRQ_SET_MASK(ctrl_hci, regval);
+    mutex_unlock(&ctrl_hci->hci_mutex);
+}
+static inline u32 ssv6xxx_hci_get_int_bitno(int txqid)
+{
+    if(txqid == SSV_HW_TXQ_NUM-1)
+        return 1;
+    else
+        return txqid+3;
+}
+static int ssv6xxx_hci_start(void)
+{
+    ssv6xxx_hci_irq_enable();
+    ctrl_hci->hci_start = true;
+    HCI_IRQ_TRIGGER(ctrl_hci);
+    return 0;
+}
+static int ssv6xxx_hci_stop(void)
+{
+    ssv6xxx_hci_irq_disable();
+    ctrl_hci->hci_start = false;
+    return 0;
+}
+static int ssv6xxx_hci_read_word(u32 addr, u32 *regval)
+{
+    int ret = HCI_REG_READ(ctrl_hci, addr, regval);
+    return ret;
+}
+static int ssv6xxx_hci_write_word(u32 addr, u32 regval)
+{
+    return HCI_REG_WRITE(ctrl_hci, addr, regval);
+}
+static int ssv6xxx_hci_load_fw(u8 *firmware_name,u8 openfile)
+{
+    return HCI_LOAD_FW(ctrl_hci,firmware_name,openfile);
+}
+static int ssv6xxx_hci_write_sram(u32 addr, u8 *data, u32 size)
+{
+    return HCI_SRAM_WRITE(ctrl_hci, addr, data, size);
+}
+static int ssv6xxx_hci_pmu_wakeup(void)
+{
+    HCI_PMU_WAKEUP(ctrl_hci);
+    return 0;
+}
+static int ssv6xxx_hci_interface_reset(void)
+{
+ HCI_IFC_RESET(ctrl_hci);
+ return 0;
+}
+static int ssv6xxx_hci_send_cmd(struct sk_buff *skb)
+{
+    int ret;
+    ret = IF_SEND(ctrl_hci, (void *)skb->data, skb->len, 0);
+    if (ret < 0) {
+        printk("ssv6xxx_hci_send_cmd fail......\n");
+    }
+    return ret;
+}
+static int ssv6xxx_hci_enqueue(struct sk_buff *skb, int txqid, u32 tx_flags)
+{
+    struct ssv_hw_txq *hw_txq;
+    unsigned long flags;
+    u32 status;
+    int qlen = 0;
+    BUG_ON(txqid >= SSV_HW_TXQ_NUM || txqid < 0);
+    if (txqid >= SSV_HW_TXQ_NUM || txqid < 0)
+        return -1;
+    hw_txq = &ctrl_hci->hw_txq[txqid];
+    hw_txq->tx_flags = tx_flags;
+    if (tx_flags & HCI_FLAGS_ENQUEUE_HEAD)
+        skb_queue_head(&hw_txq->qhead, skb);
+    else
+        skb_queue_tail(&hw_txq->qhead, skb);
+    qlen = (int)skb_queue_len(&hw_txq->qhead);
+    if (!(tx_flags & HCI_FLAGS_NO_FLOWCTRL)) {
+        if (skb_queue_len(&hw_txq->qhead) >= hw_txq->max_qsize) {
+            ctrl_hci->shi->hci_tx_flow_ctrl_cb(
+                ctrl_hci->shi->tx_fctrl_cb_args,
+                hw_txq->txq_no,
+                true,2000
+            );
+        }
+    }
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    mutex_lock(&ctrl_hci->hci_mutex);
+#endif
+    spin_lock_irqsave(&ctrl_hci->int_lock, flags);
+    status = ctrl_hci->int_mask ;
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    if ((ctrl_hci->int_mask & SSV6XXX_INT_RESOURCE_LOW) == 0)
+    {
+        if (ctrl_hci->shi->if_ops->trigger_tx_rx == NULL)
+        {
+            u32 regval;
+            ctrl_hci->int_mask |= SSV6XXX_INT_RESOURCE_LOW;
+            regval = ~ctrl_hci->int_mask;
+            spin_unlock_irqrestore(&ctrl_hci->int_lock, flags);
+            HCI_IRQ_SET_MASK(ctrl_hci, regval);
+            mutex_unlock(&ctrl_hci->hci_mutex);
+        }
+        else
+        {
+            ctrl_hci->int_status |= SSV6XXX_INT_RESOURCE_LOW;
+            smp_mb();
+            spin_unlock_irqrestore(&ctrl_hci->int_lock, flags);
+            mutex_unlock(&ctrl_hci->hci_mutex);
+            ctrl_hci->shi->if_ops->trigger_tx_rx(ctrl_hci->shi->dev);
+        }
+    }
+    else
+    {
+        spin_unlock_irqrestore(&ctrl_hci->int_lock, flags);
+        mutex_unlock(&ctrl_hci->hci_mutex);
+    }
+#else
+    {
+        u32 bitno;
+        bitno = ssv6xxx_hci_get_int_bitno(txqid);
+        if ((ctrl_hci->int_mask & BIT(bitno)) == 0)
+        {
+            if (ctrl_hci->shi->if_ops->trigger_tx_rx == NULL)
+            {
+                queue_work(ctrl_hci->hci_work_queue,&ctrl_hci->hci_tx_work[txqid]);
+            }
+            else
+            {
+                ctrl_hci->int_status |= BIT(bitno);
+                smp_mb();
+                ctrl_hci->shi->if_ops->trigger_tx_rx(ctrl_hci->shi->dev);
+            }
+         }
+    }
+    spin_unlock_irqrestore(&ctrl_hci->int_lock, flags);
+#endif
+    return qlen;
+}
+static bool ssv6xxx_hci_is_txq_empty(int txqid)
+{
+    struct ssv_hw_txq *hw_txq;
+    BUG_ON(txqid >= SSV_HW_TXQ_NUM);
+    if (txqid >= SSV_HW_TXQ_NUM)
+        return false;
+    hw_txq = &ctrl_hci->hw_txq[txqid];
+    if (skb_queue_len(&hw_txq->qhead) <= 0)
+        return true;
+    return false;
+}
+static int ssv6xxx_hci_txq_flush(u32 txq_mask)
+{
+    struct ssv_hw_txq *hw_txq;
+    struct sk_buff *skb = NULL;
+    int txqid;
+    for(txqid=0; txqid<SSV_HW_TXQ_NUM; txqid++) {
+        if ((txq_mask & (1<<txqid)) != 0)
+            continue;
+        hw_txq = &ctrl_hci->hw_txq[txqid];
+        while((skb = skb_dequeue(&hw_txq->qhead))) {
+            ctrl_hci->shi->hci_tx_buf_free_cb (skb,
+                        ctrl_hci->shi->tx_buf_free_args);
+        }
+    }
+    return 0;
+}
+static int ssv6xxx_hci_txq_flush_by_sta(int aid)
+{
+    return 0;
+}
+static int ssv6xxx_hci_txq_pause(u32 txq_mask)
+{
+    struct ssv_hw_txq *hw_txq;
+    int txqid;
+    mutex_lock(&ctrl_hci->txq_mask_lock);
+    ctrl_hci->txq_mask |= (txq_mask & 0x1F);
+    for(txqid=0; txqid<SSV_HW_TXQ_NUM; txqid++) {
+        if ((ctrl_hci->txq_mask&(1<<txqid)) == 0)
+            continue;
+        hw_txq = &ctrl_hci->hw_txq[txqid];
+        hw_txq->paused = true;
+    }
+    HCI_REG_SET_BITS(ctrl_hci, ADR_MTX_MISC_EN,
+        (ctrl_hci->txq_mask<<16), (0x1F<<16));
+    mutex_unlock(&ctrl_hci->txq_mask_lock);
+    return 0;
+}
+static int ssv6xxx_hci_txq_resume(u32 txq_mask)
+{
+    struct ssv_hw_txq *hw_txq;
+    int txqid;
+    mutex_lock(&ctrl_hci->txq_mask_lock);
+    ctrl_hci->txq_mask &= ~(txq_mask&0x1F);
+    for(txqid=0; txqid<SSV_HW_TXQ_NUM; txqid++) {
+        if ((ctrl_hci->txq_mask&(1<<txqid)) != 0)
+            continue;
+        hw_txq = &ctrl_hci->hw_txq[txqid];
+        hw_txq->paused = false;
+    }
+    HCI_REG_SET_BITS(ctrl_hci, ADR_MTX_MISC_EN,
+        (ctrl_hci->txq_mask<<16), (0x1F<<16));
+    mutex_unlock(&ctrl_hci->txq_mask_lock);
+    return 0;
+}
+static int ssv6xxx_hci_xmit(struct ssv_hw_txq *hw_txq, int max_count, struct ssv6xxx_hw_resource *phw_resource)
+{
+    struct sk_buff_head tx_cb_list;
+    struct sk_buff *skb = NULL;
+ int tx_count, ret, page_count;
+    struct ssv6200_tx_desc *tx_desc = NULL;
+    ctrl_hci->xmit_running = 1;
+    skb_queue_head_init(&tx_cb_list);
+    for(tx_count=0; tx_count<max_count; tx_count++) {
+        if (ctrl_hci->hci_start == false){
+            printk("ssv6xxx_hci_xmit - hci_start = false\n");
+            goto xmit_out;
+        }
+        skb = skb_dequeue(&hw_txq->qhead);
+        if (!skb){
+   printk("ssv6xxx_hci_xmit - queue empty\n");
+            goto xmit_out;
+     }
+     page_count = (skb->len + SSV6200_ALLOC_RSVD);
+     if (page_count & HW_MMU_PAGE_MASK)
+      page_count = (page_count >> HW_MMU_PAGE_SHIFT) + 1;
+     else
+      page_count = page_count >> HW_MMU_PAGE_SHIFT;
+     if (page_count > (SSV6200_PAGE_TX_THRESHOLD / 2))
+      printk(KERN_ERR"Asking page %d(%d) exceeds resource limit %d.\n",
+          page_count, skb->len,(SSV6200_PAGE_TX_THRESHOLD / 2));
+     if ((phw_resource->free_tx_page < page_count) || (phw_resource->free_tx_id <= 0) || (phw_resource->max_tx_frame[hw_txq->txq_no] <= 0))
+        {
+      skb_queue_head(&hw_txq->qhead, skb);
+      break;
+        }
+     phw_resource->free_tx_page -= page_count;
+     phw_resource->free_tx_id--;
+     phw_resource->max_tx_frame[hw_txq->txq_no]--;
+  tx_desc = (struct ssv6200_tx_desc *)skb->data;
+#if 1
+        if (ctrl_hci->shi->hci_skb_update_cb != NULL && tx_desc->reason != ID_TRAP_SW_TXTPUT)
+        {
+            ctrl_hci->shi->hci_skb_update_cb(skb,ctrl_hci->shi->skb_update_args);
+        }
+#endif
+        ret = IF_SEND(ctrl_hci, (void *)skb->data, skb->len, hw_txq->txq_no);
+        if (ret < 0) {
+            printk(KERN_ALERT "ssv6xxx_hci_xmit fail......\n");
+            skb_queue_head(&hw_txq->qhead, skb);
+            break;
+        }
+        if (tx_desc->reason != ID_TRAP_SW_TXTPUT)
+            skb_queue_tail(&tx_cb_list, skb);
+        else
+            ssv_skb_free(skb);
+        hw_txq->tx_pkt ++;
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+  if(ctrl_hci->irq_enable)
+  ctrl_hci->irq_tx_pkt_count++;
+#endif
+        if (!(hw_txq->tx_flags & HCI_FLAGS_NO_FLOWCTRL)) {
+            if (skb_queue_len(&hw_txq->qhead) < hw_txq->resum_thres) {
+                ctrl_hci->shi->hci_tx_flow_ctrl_cb(
+                    ctrl_hci->shi->tx_fctrl_cb_args,
+        hw_txq->txq_no, false, 2000);
+   }
+  }
+ }
+xmit_out:
+    if (ctrl_hci->shi->hci_tx_cb && tx_desc && tx_desc->reason != ID_TRAP_SW_TXTPUT) {
+        ctrl_hci->shi->hci_tx_cb (&tx_cb_list,
+            ctrl_hci->shi->tx_cb_args);
+    }
+    ctrl_hci->xmit_running = 0;
+    return tx_count;
+}
+static int ssv6xxx_hci_tx_handler(void *dev, int max_count)
+{
+    struct ssv6xxx_hci_txq_info txq_info;
+    struct ssv6xxx_hci_txq_info2 txq_info2;
+    struct ssv6xxx_hw_resource hw_resource;
+    struct ssv_hw_txq *hw_txq=dev;
+ int ret, tx_count=0;
+    max_count = skb_queue_len(&hw_txq->qhead);
+    if(max_count == 0)
+        return 0;
+    if (hw_txq->txq_no == 4)
+    {
+        ret = HCI_REG_READ(ctrl_hci, ADR_TX_ID_ALL_INFO2, (u32 *)&txq_info2);
+        if (ret < 0) {
+            ctrl_hci->read_rs1_info_fail++;
+            return 0;
+        }
+        //BUG_ON(SSV6200_PAGE_TX_THRESHOLD < txq_info2.tx_use_page);
+        //BUG_ON(SSV6200_ID_TX_THRESHOLD < txq_info2.tx_use_id);
+        if(SSV6200_PAGE_TX_THRESHOLD < txq_info2.tx_use_page)
+            return 0;
+        if(SSV6200_ID_TX_THRESHOLD < txq_info2.tx_use_page)
+            return 0;     
+  hw_resource.free_tx_page =
+      SSV6200_PAGE_TX_THRESHOLD - txq_info2.tx_use_page;
+  hw_resource.free_tx_id = SSV6200_ID_TX_THRESHOLD - txq_info2.tx_use_id;
+  hw_resource.max_tx_frame[4] = SSV6200_ID_MANAGER_QUEUE - txq_info2.txq4_size;
+    }
+    else
+    {
+        ret = HCI_REG_READ(ctrl_hci, ADR_TX_ID_ALL_INFO, (u32 *)&txq_info);
+        if (ret < 0) {
+            ctrl_hci->read_rs0_info_fail++;
+            return 0;
+        }
+        //BUG_ON(SSV6200_PAGE_TX_THRESHOLD < txq_info.tx_use_page);
+        //BUG_ON(SSV6200_ID_TX_THRESHOLD < txq_info.tx_use_id);
+        if(SSV6200_PAGE_TX_THRESHOLD < txq_info.tx_use_page)
+            return 0;
+        if(SSV6200_ID_TX_THRESHOLD < txq_info.tx_use_page)
+            return 0;        
+  hw_resource.free_tx_page = SSV6200_PAGE_TX_THRESHOLD - txq_info.tx_use_page;
+  hw_resource.free_tx_id = SSV6200_ID_TX_THRESHOLD - txq_info.tx_use_id;
+  hw_resource.max_tx_frame[0] =
+      SSV6200_ID_AC_BK_OUT_QUEUE - txq_info.txq0_size;
+  hw_resource.max_tx_frame[1] =
+      SSV6200_ID_AC_BE_OUT_QUEUE - txq_info.txq1_size;
+  hw_resource.max_tx_frame[2] =
+      SSV6200_ID_AC_VI_OUT_QUEUE - txq_info.txq2_size;
+  hw_resource.max_tx_frame[3] =
+      SSV6200_ID_AC_VO_OUT_QUEUE - txq_info.txq3_size;
+  BUG_ON(hw_resource.max_tx_frame[3] < 0);
+  BUG_ON(hw_resource.max_tx_frame[2] < 0);
+  BUG_ON(hw_resource.max_tx_frame[1] < 0);
+  BUG_ON(hw_resource.max_tx_frame[0] < 0);
+ }
+ {
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+  if(ctrl_hci->irq_enable)
+   ctrl_hci->real_tx_irq_count++;
+#endif
+  tx_count = ssv6xxx_hci_xmit(hw_txq, max_count, &hw_resource);
+ }
+    if ( (ctrl_hci->shi->hci_tx_q_empty_cb != NULL)
+        && (skb_queue_len(&hw_txq->qhead) == 0))
+    {
+        ctrl_hci->shi->hci_tx_q_empty_cb(hw_txq->txq_no, ctrl_hci->shi->tx_q_empty_args);
+    }
+    return tx_count;
+}
+void ssv6xxx_hci_tx_work(struct work_struct *work)
+{
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    ssv6xxx_hci_irq_register(SSV6XXX_INT_RESOURCE_LOW);
+#else
+    int txqid;
+    for(txqid=SSV_HW_TXQ_NUM-1; txqid>=0; txqid--) {
+        u32 bitno;
+        if (&ctrl_hci->hci_tx_work[txqid] != work)
+            continue;
+        bitno = ssv6xxx_hci_get_int_bitno(txqid);
+        ssv6xxx_hci_irq_register(1<<(bitno));
+        break;
+    }
+#endif
+}
+static int _do_rx (struct ssv6xxx_hci_ctrl *hctl, u32 isr_status)
+{
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    struct sk_buff_head rx_list;
+    #endif
+    struct sk_buff *rx_mpdu;
+    int rx_cnt, ret=0;
+    size_t dlen;
+    u32 status = isr_status;
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct timespec rx_io_start_time, rx_io_end_time, rx_io_diff_time;
+    struct timespec rx_proc_start_time, rx_proc_end_time, rx_proc_diff_time;
+    #endif
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    skb_queue_head_init(&rx_list);
+    #endif
+    for (rx_cnt = 0; (status & SSV6XXX_INT_RX) && (rx_cnt < 32 ); rx_cnt++)
+    {
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+            getnstimeofday(&rx_io_start_time);
+        #endif
+        ret = IF_RECV(hctl, hctl->rx_buf->data, &dlen);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+            getnstimeofday(&rx_io_end_time);
+        #endif
+        if (ret < 0 || dlen<=0)
+        {
+            printk("%s(): IF_RECV() retruns %d (dlen=%d)\n", __FUNCTION__,
+                   ret, (int)dlen);
+            if (ret != -84 || dlen>MAX_FRAME_SIZE)
+                break;
+        }
+        rx_mpdu = hctl->rx_buf;
+        hctl->rx_buf = ssv_skb_alloc(MAX_FRAME_SIZE);
+        if (hctl->rx_buf == NULL)
+        {
+            printk(KERN_ERR "RX buffer allocation failure!\n");
+            hctl->rx_buf = rx_mpdu;
+            break;
+        }
+        hctl->rx_pkt++;
+        #ifdef CONFIG_IRQ_DEBUG_COUNT
+        if (hctl->irq_enable)
+            hctl->irq_rx_pkt_count ++;
+        #endif
+        skb_put(rx_mpdu, dlen);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+            getnstimeofday(&rx_proc_start_time);
+        #endif
+        #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+        __skb_queue_tail(&rx_list, rx_mpdu);
+        #else
+        hctl->shi->hci_rx_cb(rx_mpdu, hctl->shi->rx_cb_args);
+        #endif
+        HCI_IRQ_STATUS(hctl, &status);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+        {
+            getnstimeofday(&rx_proc_end_time);
+            hctl->isr_rx_io_count++;
+            rx_io_diff_time = timespec_sub(rx_io_end_time, rx_io_start_time);
+            hctl->isr_rx_io_time += timespec_to_ns(&rx_io_diff_time);
+            rx_proc_diff_time = timespec_sub(rx_proc_end_time, rx_proc_start_time);
+            hctl->isr_rx_proc_time += timespec_to_ns(&rx_proc_diff_time);
+        }
+        #endif
+    }
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (hctl->isr_mib_enable)
+        getnstimeofday(&rx_proc_start_time);
+    #endif
+    hctl->shi->hci_rx_cb(&rx_list, hctl->shi->rx_cb_args);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (hctl->isr_mib_enable)
+    {
+        getnstimeofday(&rx_proc_end_time);
+        rx_proc_diff_time = timespec_sub(rx_proc_end_time, rx_proc_start_time);
+        hctl->isr_rx_proc_time += timespec_to_ns(&rx_proc_diff_time);
+    }
+    #endif
+    #endif
+    return ret;
+}
+static void ssv6xxx_hci_rx_work(struct work_struct *work)
+{
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    struct sk_buff_head rx_list;
+    #endif
+    struct sk_buff *rx_mpdu;
+    int rx_cnt, ret;
+    size_t dlen;
+    u32 status;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct timespec rx_io_start_time, rx_io_end_time, rx_io_diff_time;
+    struct timespec rx_proc_start_time, rx_proc_end_time, rx_proc_diff_time;
+#endif
+    ctrl_hci->rx_work_running = 1;
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    skb_queue_head_init(&rx_list);
+    #endif
+    status = SSV6XXX_INT_RX;
+    for (rx_cnt = 0; (status & SSV6XXX_INT_RX) && (rx_cnt < 32 ); rx_cnt++) {
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (ctrl_hci->isr_mib_enable)
+            getnstimeofday(&rx_io_start_time);
+#endif
+        ret = IF_RECV(ctrl_hci, ctrl_hci->rx_buf->data, &dlen);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (ctrl_hci->isr_mib_enable)
+            getnstimeofday(&rx_io_end_time);
+#endif
+        if (ret < 0 || dlen<=0) {
+            printk("%s(): IF_RECV() retruns %d (dlen=%d)\n", __FUNCTION__,
+                ret, (int)dlen);
+            if (ret != -84 || dlen>MAX_FRAME_SIZE)
+                break;
+        }
+        rx_mpdu = ctrl_hci->rx_buf;
+        ctrl_hci->rx_buf = ssv_skb_alloc(MAX_FRAME_SIZE);
+        if (ctrl_hci->rx_buf == NULL) {
+            printk(KERN_ERR "RX buffer allocation failure!\n");
+            ctrl_hci->rx_buf = rx_mpdu;
+            break;
+        }
+        ctrl_hci->rx_pkt ++;
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+  if(ctrl_hci->irq_enable)
+   ctrl_hci->irq_rx_pkt_count ++;
+#endif
+        skb_put(rx_mpdu, dlen);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (ctrl_hci->isr_mib_enable)
+            getnstimeofday(&rx_proc_start_time);
+#endif
+        #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+        __skb_queue_tail(&rx_list, rx_mpdu);
+        #else
+        ctrl_hci->shi->hci_rx_cb(rx_mpdu, ctrl_hci->shi->rx_cb_args);
+        #endif
+        HCI_IRQ_STATUS(ctrl_hci, &status);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (ctrl_hci->isr_mib_enable)
+        {
+            getnstimeofday(&rx_proc_end_time);
+            ctrl_hci->isr_rx_io_count++;
+            rx_io_diff_time = timespec_sub(rx_io_end_time, rx_io_start_time);
+            ctrl_hci->isr_rx_io_time += timespec_to_ns(&rx_io_diff_time);
+            rx_proc_diff_time = timespec_sub(rx_proc_end_time, rx_proc_start_time);
+            ctrl_hci->isr_rx_proc_time += timespec_to_ns(&rx_proc_diff_time);
+        }
+#endif
+    }
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (ctrl_hci->isr_mib_enable)
+        getnstimeofday(&rx_proc_start_time);
+    #endif
+    ctrl_hci->shi->hci_rx_cb(&rx_list, ctrl_hci->shi->rx_cb_args);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (ctrl_hci->isr_mib_enable)
+    {
+        getnstimeofday(&rx_proc_end_time);
+        rx_proc_diff_time = timespec_sub(rx_proc_end_time, rx_proc_start_time);
+        ctrl_hci->isr_rx_proc_time += timespec_to_ns(&rx_proc_diff_time);
+    }
+    #endif
+    #endif
+    ctrl_hci->rx_work_running = 0;
+}
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+static void ssv6xxx_isr_mib_reset (void)
+{
+    ctrl_hci->isr_mib_reset = 0;
+    ctrl_hci->isr_total_time = 0;
+    ctrl_hci->isr_rx_io_time = 0;
+    ctrl_hci->isr_tx_io_time = 0;
+    ctrl_hci->isr_rx_io_count = 0;
+    ctrl_hci->isr_tx_io_count = 0;
+    ctrl_hci->isr_rx_proc_time =0;
+}
+static int hw_txq_len_open(struct inode *inode, struct file *filp)
+{
+    filp->private_data = inode->i_private;
+    return 0;
+}
+static ssize_t hw_txq_len_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos)
+{
+    ssize_t ret;
+    struct ssv6xxx_hci_ctrl *hctl = (struct ssv6xxx_hci_ctrl *)filp->private_data;
+    char *summary_buf = kzalloc(1024, GFP_KERNEL);
+    char *prn_ptr = summary_buf;
+    int prt_size;
+    int buf_size = 1024;
+    int i=0;
+    if (!summary_buf)
+        return -ENOMEM;
+    for (i=0; i<SSV_HW_TXQ_NUM; i++)
+    {
+        prt_size = snprintf(prn_ptr, buf_size, "\n\rhw_txq%d_len: %d", i,
+                            skb_queue_len(&hctl->hw_txq[i].qhead));
+        prn_ptr += prt_size;
+        buf_size -= prt_size;
+    }
+    buf_size = 1024 - buf_size;
+    ret = simple_read_from_buffer(buffer, count, ppos, summary_buf, buf_size);
+    kfree(summary_buf);
+    return ret;
+}
+#if 0
+ static ssize_t hw_txq_len_write(struct file *filp, const char __user *buffer, size_t count, loff_t *ppos)
+{
+    return 0;
+}
+#endif
+struct file_operations hw_txq_len_fops = {
+    .owner = THIS_MODULE,
+    .open = hw_txq_len_open,
+    .read = hw_txq_len_read,
+};
+bool ssv6xxx_hci_init_debugfs(struct dentry *dev_deugfs_dir)
+{
+    ctrl_hci->debugfs_dir = debugfs_create_dir("hci", dev_deugfs_dir);
+    if (ctrl_hci->debugfs_dir == NULL)
+    {
+        dev_err(ctrl_hci->shi->dev, "Failed to create HCI debugfs directory.\n");
+        return false;
+    }
+    debugfs_create_u32("TXQ_mask", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->txq_mask);
+    debugfs_create_u32("hci_isr_mib_enable", 00644, ctrl_hci->debugfs_dir, &ctrl_hci->isr_mib_enable);
+    debugfs_create_u32("hci_isr_mib_reset", 00644, ctrl_hci->debugfs_dir, &ctrl_hci->isr_mib_reset);
+    debugfs_create_u64("isr_total_time", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_total_time);
+    debugfs_create_u64("tx_io_time", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_tx_io_time);
+    debugfs_create_u64("rx_io_time", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_rx_io_time);
+    debugfs_create_u32("tx_io_count", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_tx_io_count);
+    debugfs_create_u32("rx_io_count", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_rx_io_count);
+    debugfs_create_u64("rx_proc_time", 00444, ctrl_hci->debugfs_dir, &ctrl_hci->isr_rx_proc_time);
+    debugfs_create_file("hw_txq_len", 00444, ctrl_hci->debugfs_dir, ctrl_hci, &hw_txq_len_fops);
+    return true;
+}
+void ssv6xxx_hci_deinit_debugfs(void)
+{
+    if (ctrl_hci->debugfs_dir == NULL)
+        return;
+    ctrl_hci->debugfs_dir = NULL;
+}
+#endif
+static int _isr_do_rx (struct ssv6xxx_hci_ctrl *hctl, u32 isr_status)
+{
+    int status;
+    u32 before = jiffies;
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+    if (hctl->irq_enable)
+        hctl->rx_irq_count++;
+#endif
+    if (hctl->isr_summary_eable
+        && hctl->prev_rx_isr_jiffes) {
+       if (hctl->isr_rx_idle_time){
+           hctl->isr_rx_idle_time += (jiffies - hctl->prev_rx_isr_jiffes);
+           hctl->isr_rx_idle_time = hctl->isr_rx_idle_time >>1;
+       }
+       else {
+            hctl->isr_rx_idle_time += (jiffies - hctl->prev_rx_isr_jiffes);
+       }
+    }
+    status = _do_rx(hctl, isr_status);
+    if(hctl->isr_summary_eable){
+        if(hctl->isr_rx_time){
+            hctl->isr_rx_time += (jiffies-before);
+            hctl->isr_rx_time = hctl->isr_rx_time >>1;
+        }
+        else{
+            hctl->isr_rx_time += (jiffies-before);
+        }
+        hctl->prev_rx_isr_jiffes = jiffies;
+    }
+    return status;
+}
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+static int _do_tx (struct ssv6xxx_hci_ctrl *hctl, u32 status)
+{
+    int q_num;
+    int tx_count = 0;
+    u32 to_disable_int = 1;
+    unsigned long flags;
+    struct ssv_hw_txq *hw_txq;
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct timespec tx_io_start_time, tx_io_end_time, tx_io_diff_time;
+    #endif
+    #ifdef CONFIG_IRQ_DEBUG_COUNT
+    if ((!(status & SSV6XXX_INT_RX)) && htcl->irq_enable)
+        hctl->tx_irq_count++;
+    #endif
+    if ((status & SSV6XXX_INT_RESOURCE_LOW) == 0)
+         return 0;
+    for (q_num = (SSV_HW_TXQ_NUM - 1); q_num >= 0; q_num--)
+    {
+        u32 before = jiffies;
+        hw_txq = &hctl->hw_txq[q_num];
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+            getnstimeofday(&tx_io_start_time);
+        #endif
+        tx_count += ssv6xxx_hci_tx_handler(hw_txq, 999);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (hctl->isr_mib_enable)
+        {
+            getnstimeofday(&tx_io_end_time);
+            tx_io_diff_time = timespec_sub(tx_io_end_time, tx_io_start_time);
+            hctl->isr_tx_io_time += timespec_to_ns(&tx_io_diff_time);
+        }
+        #endif
+        if (hctl->isr_summary_eable)
+        {
+            if (hctl->isr_tx_time)
+            {
+                hctl->isr_tx_time += (jiffies-before);
+                hctl->isr_tx_time = hctl->isr_tx_time >>1;
+            }
+            else
+            {
+                hctl->isr_tx_time += (jiffies-before);
+            }
+        }
+    }
+    mutex_lock(&hctl->hci_mutex);
+    spin_lock_irqsave(&hctl->int_lock, flags);
+    for (q_num = (SSV_HW_TXQ_NUM - 1); q_num >= 0; q_num--)
+    {
+        hw_txq = &hctl->hw_txq[q_num];
+        if (skb_queue_len(&hw_txq->qhead) > 0)
+        {
+            to_disable_int = 0;
+            break;
+        }
+    }
+    if (to_disable_int)
+    {
+        u32 reg_val;
+#ifdef CONFIG_TRIGGER_LOW_SDIO_LOADING
+  hctl->int_mask &= ~(SSV6XXX_INT_RESOURCE_LOW);
+#else
+        hctl->int_mask &= ~(SSV6XXX_INT_RESOURCE_LOW | SSV6XXX_INT_TX);
+#endif
+        reg_val = ~hctl->int_mask;
+        spin_unlock_irqrestore(&hctl->int_lock, flags);
+        HCI_IRQ_SET_MASK(hctl, reg_val);
+    }
+    else
+    {
+        spin_unlock_irqrestore(&hctl->int_lock, flags);
+    }
+    mutex_unlock(&hctl->hci_mutex);
+    return tx_count;
+}
+#else
+static int _do_tx (struct ssv6xxx_hci_ctrl *hctl, u32 status)
+{
+    int q_num;
+    int tx_count = 0;
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct timespec tx_io_start_time, tx_io_end_time, tx_io_diff_time;
+    #endif
+    #ifdef CONFIG_IRQ_DEBUG_COUNT
+    if ((!(status & SSV6XXX_INT_RX)) && htcl->irq_enable)
+        htcl->tx_irq_count++;
+    #endif
+    for (q_num = (SSV_HW_TXQ_NUM - 1); q_num >= 0; q_num--)
+    {
+        int bitno;
+        struct ssv_hw_txq *hw_txq;
+        unsigned long flags;
+        u32 before = jiffies;
+        hw_txq = &hctl->hw_txq[q_num];
+        bitno = ssv6xxx_hci_get_int_bitno(hw_txq->txq_no);
+        if ((status & BIT(bitno)) == 0)
+            continue;
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (htcl->isr_mib_enable)
+        {
+            getnstimeofday(&tx_io_start_time);
+        }
+        #endif
+        tx_count += ssv6xxx_hci_tx_handler(hw_txq, 999);
+        mutex_lock(&hctl->hci_mutex);
+        spin_lock_irqsave(&hctl->int_lock, flags);
+        if (skb_queue_len(&hw_txq->qhead) <= 0)
+        {
+            u32 reg_val;
+            hctl->int_mask &= ~(1<<bitno);
+            reg_val = ~hctl->int_mask;
+            spin_unlock_irqrestore(&hctl->int_lock, flags);
+            HCI_IRQ_SET_MASK(hctl, reg_val);
+        }
+        else
+        {
+            spin_unlock_irqrestore(&hctl->int_lock, flags);
+        }
+        mutex_unlock(&hctl->hci_mutex);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (htcl->isr_mib_enable)
+        {
+            getnstimeofday(&tx_io_end_time);
+            tx_io_diff_time = timespec_sub(tx_io_end_time, tx_io_start_time);
+            htcl->isr_tx_io_time += timespec_to_ns(&tx_io_diff_time);
+        }
+        #endif
+        if (htcl->isr_summary_eable)
+        {
+            if (htcl->isr_tx_time)
+            {
+                htcl->isr_tx_time += (jiffies - before);
+                htcl->isr_tx_time = htcl->isr_tx_time >>1;
+            }
+            else
+            {
+                htcl->isr_tx_time += (jiffies - before);
+            }
+        }
+    }
+    return tx_count;
+}
+#endif
+#ifdef CONFIG_TRIGGER_LOW_SDIO_LOADING
+irqreturn_t ssv6xxx_hci_isr(int irq, void *args)
+{
+ struct ssv6xxx_hci_ctrl *hctl = args;
+ u32 status;
+ int ret = IRQ_HANDLED;
+ bool dbg_isr_miss = true;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+  struct timespec start_time, end_time, diff_time;
+#endif
+ ctrl_hci->isr_running = 1;
+ if (ctrl_hci->isr_summary_eable && ctrl_hci->prev_isr_jiffes) {
+  if (ctrl_hci->isr_idle_time) {
+   ctrl_hci->isr_idle_time +=
+       (jiffies - ctrl_hci->prev_isr_jiffes);
+   ctrl_hci->isr_idle_time = ctrl_hci->isr_idle_time >> 1;
+  } else {
+   ctrl_hci->isr_idle_time +=
+       (jiffies - ctrl_hci->prev_isr_jiffes);
+  }
+ }
+ BUG_ON(!args);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+  if (hctl->isr_mib_reset)
+   ssv6xxx_isr_mib_reset();
+  if (hctl->isr_mib_enable)
+   getnstimeofday(&start_time);
+#endif
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+  if (ctrl_hci->irq_enable)
+   ctrl_hci->irq_count++;
+#endif
+    if ((hctl->int_mask & SSV6XXX_INT_RESOURCE_LOW) == 0) {
+        ret = _isr_do_rx(hctl, SSV6XXX_INT_RX);
+        if (ret < 0) {
+            printk("do_rx failed\n");
+            goto out;
+        }
+    } else {
+        HCI_IRQ_STATUS(hctl, &status);
+        if (status & SSV6XXX_INT_RX) {
+            ret = _isr_do_rx(hctl, SSV6XXX_INT_RX);
+            if (ret < 0) {
+                printk("do_rx failed\n");
+                goto out;
+            }
+        }
+        if (hctl->int_mask & SSV6XXX_INT_RESOURCE_LOW) {
+            ret = _do_tx(hctl, SSV6XXX_INT_RESOURCE_LOW);
+            if (ret < 0) {
+                goto out;
+            }
+        }
+    }
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+  if (ctrl_hci->isr_mib_enable) {
+   getnstimeofday(&end_time);
+   diff_time = timespec_sub(end_time, start_time);
+   ctrl_hci->isr_total_time += timespec_to_ns(&diff_time);
+  }
+#endif
+ if (ctrl_hci->isr_summary_eable) {
+  if (dbg_isr_miss)
+   ctrl_hci->isr_miss_cnt++;
+  ctrl_hci->prev_isr_jiffes = jiffies;
+ }
+out:
+ ctrl_hci->isr_running = 0;
+ return IRQ_NONE;
+}
+#else
+irqreturn_t ssv6xxx_hci_isr(int irq, void *args)
+{
+    struct ssv6xxx_hci_ctrl *hctl=args;
+    u32 status;
+    unsigned long flags;
+    int ret = IRQ_HANDLED;
+ bool dbg_isr_miss = true;
+    if (ctrl_hci->isr_summary_eable
+        && ctrl_hci->prev_isr_jiffes){
+        if(ctrl_hci->isr_idle_time){
+            ctrl_hci->isr_idle_time += (jiffies - ctrl_hci->prev_isr_jiffes);
+            ctrl_hci->isr_idle_time = ctrl_hci->isr_idle_time >>1;
+        }
+        else{
+            ctrl_hci->isr_idle_time += (jiffies - ctrl_hci->prev_isr_jiffes);
+        }
+    }
+    BUG_ON(!args);
+    do {
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        struct timespec start_time, end_time, diff_time;
+        if (hctl->isr_mib_reset)
+            ssv6xxx_isr_mib_reset();
+        if (hctl->isr_mib_enable)
+            getnstimeofday(&start_time);
+#endif
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+  if(ctrl_hci->irq_enable)
+         ctrl_hci->irq_count++;
+#endif
+        mutex_lock(&hctl->hci_mutex);
+        if (hctl->int_status)
+        {
+            u32 regval;
+            spin_lock_irqsave(&hctl->int_lock, flags);
+            hctl->int_mask |= hctl->int_status;
+            hctl->int_status = 0;
+            regval = ~ctrl_hci->int_mask;
+            smp_mb();
+            spin_unlock_irqrestore(&hctl->int_lock, flags);
+            HCI_IRQ_SET_MASK(hctl, regval);
+        }
+        ret = HCI_IRQ_STATUS(hctl, &status);
+        if ((ret < 0) || ((status & hctl->int_mask) == 0)) {
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+            if (ctrl_hci->irq_enable)
+                ctrl_hci->invalid_irq_count++;
+#endif
+            mutex_unlock(&hctl->hci_mutex);
+            ret = IRQ_NONE;
+            break;
+        }
+        spin_lock_irqsave(&hctl->int_lock, flags);
+        status &= hctl->int_mask;
+        spin_unlock_irqrestore(&hctl->int_lock, flags);
+        mutex_unlock(&hctl->hci_mutex);
+        ctrl_hci->isr_running = 1;
+        if (status & SSV6XXX_INT_RX) {
+            ret = _isr_do_rx(hctl, status);
+            if(ret < 0) {
+                ret = IRQ_NONE;
+                break;
+            }
+            dbg_isr_miss = false;
+        }
+        if (_do_tx(hctl, status))
+        {
+            dbg_isr_miss = false;
+        }
+        ctrl_hci->isr_running = 0;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (ctrl_hci->isr_mib_enable)
+        {
+            getnstimeofday(&end_time);
+            diff_time = timespec_sub(end_time, start_time);
+            ctrl_hci->isr_total_time += timespec_to_ns(&diff_time);
+        }
+#endif
+    } while (1);
+    if(ctrl_hci->isr_summary_eable ){
+        if(dbg_isr_miss)
+   ctrl_hci->isr_miss_cnt++;
+     ctrl_hci->prev_isr_jiffes = jiffies;
+ }
+    return ret;
+}
+#endif
+static struct ssv6xxx_hci_ops hci_ops =
+{
+    .hci_start = ssv6xxx_hci_start,
+    .hci_stop = ssv6xxx_hci_stop,
+    .hci_read_word = ssv6xxx_hci_read_word,
+    .hci_write_word = ssv6xxx_hci_write_word,
+    .hci_tx = ssv6xxx_hci_enqueue,
+    .hci_tx_pause = ssv6xxx_hci_txq_pause,
+    .hci_tx_resume = ssv6xxx_hci_txq_resume,
+    .hci_txq_flush = ssv6xxx_hci_txq_flush,
+    .hci_txq_flush_by_sta = ssv6xxx_hci_txq_flush_by_sta,
+    .hci_txq_empty = ssv6xxx_hci_is_txq_empty,
+    .hci_load_fw = ssv6xxx_hci_load_fw,
+    .hci_pmu_wakeup = ssv6xxx_hci_pmu_wakeup,
+    .hci_send_cmd = ssv6xxx_hci_send_cmd,
+    .hci_write_sram = ssv6xxx_hci_write_sram,
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    .hci_init_debugfs = ssv6xxx_hci_init_debugfs,
+    .hci_deinit_debugfs = ssv6xxx_hci_deinit_debugfs,
+#endif
+    .hci_interface_reset = ssv6xxx_hci_interface_reset,
+};
+int ssv6xxx_hci_deregister(void)
+{
+    u32 regval;
+    printk("%s(): \n", __FUNCTION__);
+    if (ctrl_hci->shi == NULL)
+        return -1;
+    regval = 1;
+    ssv6xxx_hci_irq_disable();
+    flush_workqueue(ctrl_hci->hci_work_queue);
+    destroy_workqueue(ctrl_hci->hci_work_queue);
+    ctrl_hci->shi = NULL;
+    return 0;
+}
+EXPORT_SYMBOL(ssv6xxx_hci_deregister);
+int ssv6xxx_hci_register(struct ssv6xxx_hci_info *shi)
+{
+    int i;
+    if (shi == NULL || ctrl_hci->shi)
+        return -1;
+    shi->hci_ops = &hci_ops;
+    ctrl_hci->shi = shi;
+    ctrl_hci->txq_mask = 0;
+    mutex_init(&ctrl_hci->txq_mask_lock);
+    mutex_init(&ctrl_hci->hci_mutex);
+    spin_lock_init(&ctrl_hci->int_lock);
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+ ctrl_hci->irq_enable = false;
+ ctrl_hci->irq_count = 0;
+ ctrl_hci->invalid_irq_count = 0;
+ ctrl_hci->tx_irq_count = 0;
+ ctrl_hci->real_tx_irq_count = 0;
+ ctrl_hci->rx_irq_count = 0;
+ ctrl_hci->irq_rx_pkt_count = 0;
+ ctrl_hci->irq_tx_pkt_count = 0;
+#endif
+    for(i=0; i<SSV_HW_TXQ_NUM; i++) {
+        memset(&ctrl_hci->hw_txq[i], 0, sizeof(struct ssv_hw_txq));
+        skb_queue_head_init(&ctrl_hci->hw_txq[i].qhead);
+        ctrl_hci->hw_txq[i].txq_no = (u32)i;
+        ctrl_hci->hw_txq[i].max_qsize = SSV_HW_TXQ_MAX_SIZE;
+        ctrl_hci->hw_txq[i].resum_thres = SSV_HW_TXQ_RESUME_THRES;
+    }
+    ctrl_hci->hci_work_queue = create_singlethread_workqueue("ssv6xxx_hci_wq");
+    INIT_WORK(&ctrl_hci->hci_rx_work, ssv6xxx_hci_rx_work);
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    INIT_WORK(&ctrl_hci->hci_tx_work, ssv6xxx_hci_tx_work);
+    ctrl_hci->int_mask = SSV6XXX_INT_RX|SSV6XXX_INT_RESOURCE_LOW;
+#else
+    for(i=0; i<SSV_HW_TXQ_NUM; i++)
+        INIT_WORK(&ctrl_hci->hci_tx_work[i], ssv6xxx_hci_tx_work);
+    ctrl_hci->int_mask = SSV6XXX_INT_RX|SSV6XXX_INT_TX|SSV6XXX_INT_LOW_EDCA_0|
+        SSV6XXX_INT_LOW_EDCA_1|SSV6XXX_INT_LOW_EDCA_2|SSV6XXX_INT_LOW_EDCA_3;
+#endif
+    ctrl_hci->int_status= 0;
+    HCI_IRQ_SET_MASK(ctrl_hci, 0xFFFFFFFF);
+    ssv6xxx_hci_irq_disable();
+    HCI_IRQ_REQUEST(ctrl_hci, ssv6xxx_hci_isr);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    ctrl_hci->debugfs_dir = NULL;
+    ctrl_hci->isr_mib_enable = false;
+    ctrl_hci->isr_mib_reset = 0;
+    ctrl_hci->isr_total_time = 0;
+    ctrl_hci->isr_rx_io_time = 0;
+    ctrl_hci->isr_tx_io_time = 0;
+    ctrl_hci->isr_rx_io_count = 0;
+    ctrl_hci->isr_tx_io_count = 0;
+    ctrl_hci->isr_rx_proc_time =0;
+    #endif
+    return 0;
+}
+EXPORT_SYMBOL(ssv6xxx_hci_register);
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+int ssv6xxx_hci_init(void)
+#else
+static int __init ssv6xxx_hci_init(void)
+#endif
+{
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+    extern struct ssv6xxx_hci_ctrl *ssv_dbg_ctrl_hci;
+#endif
+    ctrl_hci = kzalloc(sizeof(*ctrl_hci), GFP_KERNEL);
+    if (ctrl_hci == NULL)
+        return -ENOMEM;
+    memset((void *)ctrl_hci, 0, sizeof(*ctrl_hci));
+    ctrl_hci->rx_buf = ssv_skb_alloc(MAX_FRAME_SIZE);
+    if (ctrl_hci->rx_buf == NULL) {
+        kfree(ctrl_hci);
+        return -ENOMEM;
+    }
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+    ssv_dbg_ctrl_hci = ctrl_hci;
+#endif
+    return 0;
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+void ssv6xxx_hci_exit(void)
+#else
+static void __exit ssv6xxx_hci_exit(void)
+#endif
+{
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+    extern struct ssv6xxx_hci_ctrl *ssv_dbg_ctrl_hci;
+#endif
+    kfree(ctrl_hci);
+    ctrl_hci = NULL;
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+    ssv_dbg_ctrl_hci = NULL;
+#endif
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ssv6xxx_hci_init);
+EXPORT_SYMBOL(ssv6xxx_hci_exit);
+#else
+module_init(ssv6xxx_hci_init);
+module_exit(ssv6xxx_hci_exit);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.h
new file mode 100644
index 0000000000000..eabed4591856e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci/ssv_hci.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_HCI_H_
+#define _SSV_HCI_H_ 
+#define SSV_HW_TXQ_NUM 5
+#define SSV_HW_TXQ_MAX_SIZE 64
+#define SSV_HW_TXQ_RESUME_THRES ((SSV_HW_TXQ_MAX_SIZE >> 2) *3)
+#define HCI_FLAGS_ENQUEUE_HEAD 0x00000001
+#define HCI_FLAGS_NO_FLOWCTRL 0x00000002
+struct ssv_hw_txq {
+    u32 txq_no;
+    struct sk_buff_head qhead;
+    int max_qsize;
+    int resum_thres;
+    bool paused;
+    u32 tx_pkt;
+    u32 tx_flags;
+};
+struct ssv6xxx_hci_ops {
+    int (*hci_start)(void);
+    int (*hci_stop)(void);
+    int (*hci_read_word)(u32 addr, u32 *regval);
+    int (*hci_write_word)(u32 addr, u32 regval);
+    int (*hci_load_fw)(u8 *firmware_name, u8 openfile);
+    int (*hci_tx)(struct sk_buff *, int, u32);
+#if 0
+    int (*hci_rx)(struct sk_buff *);
+#endif
+    int (*hci_tx_pause)(u32 txq_mask);
+    int (*hci_tx_resume)(u32 txq_mask);
+    int (*hci_txq_flush)(u32 txq_mask);
+    int (*hci_txq_flush_by_sta)(int aid);
+    bool (*hci_txq_empty)(int txqid);
+    int (*hci_pmu_wakeup)(void);
+    int (*hci_send_cmd)(struct sk_buff *);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    bool (*hci_init_debugfs)(struct dentry *dev_deugfs_dir);
+    void (*hci_deinit_debugfs)(void);
+#endif
+    int (*hci_write_sram)(u32 addr, u8* data, u32 size);
+    int (*hci_interface_reset)(void);
+};
+struct ssv6xxx_hci_info {
+    struct device *dev;
+    struct ssv6xxx_hwif_ops *if_ops;
+    struct ssv6xxx_hci_ops *hci_ops;
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    int (*hci_rx_cb)(struct sk_buff_head *, void *);
+    #else
+    int (*hci_rx_cb)(struct sk_buff *, void *);
+    #endif
+    void *rx_cb_args;
+    void (*hci_tx_cb)(struct sk_buff_head *, void *);
+    void *tx_cb_args;
+    int (*hci_tx_flow_ctrl_cb)(void *, int, bool, int debug);
+    void *tx_fctrl_cb_args;
+    void (*hci_tx_buf_free_cb)(struct sk_buff *, void *);
+    void *tx_buf_free_args;
+    void (*hci_skb_update_cb)(struct sk_buff *, void *);
+    void *skb_update_args;
+    void (*hci_tx_q_empty_cb)(u32 txq_no, void *);
+    void *tx_q_empty_args;
+};
+int ssv6xxx_hci_deregister(void);
+int ssv6xxx_hci_register(struct ssv6xxx_hci_info *);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/Makefile
new file mode 100644
index 0000000000000..e8e0178599563
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/Makefile
@@ -0,0 +1,19 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/hci/Module.symvers
+
+
+KMODULE_NAME=hci_wrapper
+KERN_SRCS := ssv_huw.c
+
+
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.c
new file mode 100644
index 0000000000000..51255931deca8
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.c
@@ -0,0 +1,497 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/slab.h>
+#include <linux/skbuff.h>
+#include <linux/wait.h>
+#include <linux/netdevice.h>
+#include <hci/ssv_hci.h>
+#include <hwif/hwif.h>
+#include "ssv_huw.h"
+#define SSV6200_ID_NUMBER (128)
+#define BLOCKSIZE 0x40
+#define RXBUFLENGTH 1024*3
+#define RXBUFSIZE 512
+#define CHECK_RET(_fun) \
+ do { \
+  if (0 != _fun) \
+   printk("File = %s\nLine = %d\nFunc=%s\nDate=%s\nTime=%s\n", __FILE__, __LINE__, __FUNCTION__, __DATE__, __TIME__); \
+ } while (0)
+#define SMAC_SRAM_WRITE(_s,_r,_v,_sz) \
+    (_s)->hci.hci_ops->hci_write_sram(_r, _v, _sz)
+#define SMAC_REG_WRITE(_s,_r,_v) \
+    (_s)->hci.hci_ops->hci_write_word(_r, _v)
+#define SMAC_REG_READ(_s,_r,_v) \
+    (_s)->hci.hci_ops->hci_read_word(_r, _v)
+#define HCI_START(_sh) \
+    (_sh)->hci.hci_ops->hci_start()
+#define HCI_STOP(_sh) \
+    (_sh)->hci.hci_ops->hci_stop()
+#define HCI_SEND(_sh,_sk,_q) \
+    (_sh)->hci.hci_ops->hci_tx(_sk, _q, HCI_FLAGS_NO_FLOWCTRL)
+#define HCI_PAUSE(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_tx_pause(_mk)
+#define HCI_RESUME(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_tx_resume(_mk)
+#define HCI_TXQ_FLUSH(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_txq_flush(_mk)
+#define HCI_TXQ_FLUSH_BY_STA(_sh,_aid) \
+  (_sh)->hci.hci_ops->hci_txq_flush_by_sta(_aid)
+#define HCI_TXQ_EMPTY(_sh,_txqid) \
+  (_sh)->hci.hci_ops->hci_txq_empty(_txqid)
+#define HCI_WAKEUP_PMU(_sh) \
+    (_sh)->hci.hci_ops->hci_pmu_wakeup()
+#define HCI_SEND_CMD(_sh,_sk) \
+        (_sh)->hci.hci_ops->hci_send_cmd(_sk)
+struct ssv_huw_dev {
+    struct device *dev;
+    struct ssv6xxx_platform_data *priv;
+    struct ssv6xxx_hci_info hci;
+    char chip_id[24];
+    u64 chip_tag;
+    u8 funcFocus;
+    wait_queue_head_t read_wq;
+    spinlock_t rxlock;
+    void *bufaddr;
+ struct sk_buff_head rx_skb_q;
+};
+struct ssv_rxbuf
+{
+    struct list_head list;
+    u32 rxsize;
+    u8 rxdata[RXBUFLENGTH];
+};
+struct ssv_huw_dev g_huw_dev;
+static unsigned int ssv_sdiobridge_ioctl_major = 0;
+static unsigned int num_of_dev = 1;
+static struct cdev ssv_sdiobridge_ioctl_cdev;
+static struct class *fc;
+#if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+int ssv_huw_rx(struct sk_buff_head *rx_skb_q, void *args)
+#else
+int ssv_huw_rx(struct sk_buff *rx_skb, void *args)
+#endif
+{
+    struct ssv_huw_dev *phuw_dev = (struct ssv_huw_dev *)args;
+    unsigned long flags;
+    spin_lock_irqsave(&phuw_dev->rxlock, flags);
+#if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    while (skb_queue_len(rx_skb_q))
+        __skb_queue_tail(&phuw_dev->rx_skb_q, __skb_dequeue(rx_skb_q));
+#else
+    __skb_queue_tail(&phuw_dev->rx_skb_q, rx_skb);
+#endif
+    spin_unlock_irqrestore(&phuw_dev->rxlock, flags);
+    wake_up_interruptible(&phuw_dev->read_wq);
+    return 0;
+}
+void ssv_huw_txbuf_free_skb(struct sk_buff *skb, void *args)
+{
+    if (!skb)
+        return;
+    dev_kfree_skb_any(skb);
+}
+unsigned int skb_queue_len_bhsafe(struct sk_buff_head *head, spinlock_t *plock)
+{
+    unsigned int len = 0;
+    spin_lock_bh(plock);
+    len = skb_queue_len(head);
+    spin_unlock_bh(plock);
+    return len;
+}
+static long ssv_huw_ioctl_readReg(struct ssv_huw_dev *phuw_dev,unsigned int cmd, struct ssv_huw_cmd *pcmd_data,struct ssv_huw_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->in_data_len < 4 || pcmd_data->out_data_len < 4)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u32 tmpdata;
+        u32 regval;
+        int ret = 0;
+#ifdef CONFIG_COMPAT
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&tmpdata,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(tmpdata)));
+        }
+        else
+#endif
+        {
+            CHECK_RET(copy_from_user(&tmpdata,(int __user *)pucmd_data->in_data,sizeof(tmpdata)));
+        }
+        ret = SMAC_REG_READ(phuw_dev, tmpdata, &regval);
+        if ( !ret )
+        {
+#ifdef CONFIG_COMPAT
+            if ( isCompat )
+            {
+                CHECK_RET(copy_to_user((int __user *)compat_ptr((unsigned long)pucmd_data->out_data),&regval,sizeof(regval)));
+            }
+            else
+#endif
+            {
+                CHECK_RET(copy_to_user((int __user *)pucmd_data->out_data,&regval,sizeof(regval)));
+            }
+        }
+        else
+        {
+            dev_err(phuw_dev->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static long ssv_huw_ioctl_writeReg(struct ssv_huw_dev *phuw_dev,unsigned int cmd, struct ssv_huw_cmd *pcmd_data,struct ssv_huw_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    if ( pcmd_data->in_data_len < 8)
+    {
+        retval = -1;
+    }
+    else
+    {
+        u32 tmpdata[2];
+        int ret = 0;
+#ifdef CONFIG_COMPAT
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&tmpdata,(int __user *)compat_ptr((unsigned long)pucmd_data->in_data),sizeof(tmpdata)));
+        }
+        else
+#endif
+        {
+            CHECK_RET(copy_from_user(&tmpdata,(int __user *)pucmd_data->in_data,sizeof(tmpdata)));
+        }
+        SMAC_REG_WRITE(phuw_dev, tmpdata[0], tmpdata[1]);
+        if ( ret )
+        {
+            dev_err(phuw_dev->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+    }
+    return retval;
+}
+static long ssv_huw_ioctl_writeSram(struct ssv_huw_dev *phuw_dev,unsigned int cmd, struct ssv_huw_cmd *pcmd_data,struct ssv_huw_cmd *pucmd_data,bool isCompat)
+{
+    long retval =0;
+    unsigned char *ptr = NULL;
+    unsigned int addr;
+    if (( pcmd_data->in_data_len != 4) || ( pcmd_data->out_data_len <= 0))
+    {
+        retval = -1;
+    }
+    else
+    {
+        int ret = 0;
+        ptr = kzalloc(pcmd_data->out_data_len, GFP_KERNEL);
+        if(ptr == NULL)
+            return -ENOMEM;
+#ifdef CONFIG_COMPAT
+        if ( isCompat )
+        {
+            CHECK_RET(copy_from_user(&addr, (int __user *)compat_ptr((unsigned long)pucmd_data->in_data), sizeof(addr)));
+            CHECK_RET(copy_from_user(ptr, (int __user *)compat_ptr((unsigned long)pucmd_data->out_data), pcmd_data->out_data_len));
+        }
+        else
+#endif
+        {
+            CHECK_RET(copy_from_user(&addr, (int __user *)pucmd_data->in_data, sizeof(addr)));
+            CHECK_RET(copy_from_user(ptr, (int __user *)pucmd_data->out_data, pcmd_data->out_data_len));
+        }
+        SMAC_SRAM_WRITE(phuw_dev, addr, ptr, pcmd_data->out_data_len);
+        if ( ret )
+        {
+            dev_err(phuw_dev->dev,"%s: error : %d",__FUNCTION__,ret);
+            retval = -1;
+        }
+        kfree(ptr);
+    }
+    return retval;
+}
+static long ssv_huw_ioctl_process(struct ssv_huw_dev *glue, unsigned int cmd, struct ssv_huw_cmd *pucmd_data, bool isCompat)
+{
+    struct ssv_huw_cmd cmd_data;
+    long retval=0;
+    if ( isCompat )
+    {
+        CHECK_RET(copy_from_user(&cmd_data,(int __user *)pucmd_data,sizeof(*pucmd_data)));
+    }
+    else
+    {
+        CHECK_RET(copy_from_user(&cmd_data,(int __user *)pucmd_data,sizeof(*pucmd_data)));
+    }
+    switch (cmd)
+    {
+        case IOCTL_SSVSDIO_READ_REG:
+            retval = ssv_huw_ioctl_readReg(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_WRITE_REG:
+            retval = ssv_huw_ioctl_writeReg(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_WRITE_SRAM:
+            retval = ssv_huw_ioctl_writeSram(glue,cmd,&cmd_data,pucmd_data,isCompat);
+            break;
+        case IOCTL_SSVSDIO_START:
+            retval = HCI_START(glue);
+            break;
+        case IOCTL_SSVSDIO_STOP:
+            retval = HCI_STOP(glue);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return retval;
+}
+#ifdef CONFIG_COMPAT
+static long ssv_huw_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+    long retval=0;
+    struct ssv_huw_cmd *pucmd_data;
+    pucmd_data = (struct ssv_huw_cmd *)arg;
+    retval = ssv_huw_ioctl_process(&g_huw_dev, cmd, pucmd_data, true);
+    return retval;
+}
+#endif
+static long ssv_huw_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+    long retval=0;
+    struct ssv_huw_cmd *pucmd_data;
+    pucmd_data = (struct ssv_huw_cmd *)arg;
+    retval = ssv_huw_ioctl_process( &g_huw_dev,cmd,pucmd_data,false);
+    return retval;
+}
+static int ssv_huw_open(struct inode *inode, struct file *fp)
+{
+    fp->private_data = &g_huw_dev;
+    return 0;
+}
+static int ssv_huw_release(struct inode *inode, struct file *fp)
+{
+    struct sk_buff *skb = NULL;
+    while((skb = skb_dequeue(&(g_huw_dev.rx_skb_q))) != NULL)
+    {
+        dev_kfree_skb_any(skb);
+        skb = NULL;
+    }
+    return 0;
+}
+static ssize_t ssv_huw_read(struct file *fp, char __user * buf, size_t length, loff_t * offset)
+{
+    int ret = 0, copy_length = 0;
+    struct sk_buff *skb = NULL;
+    if (skb_queue_len_bhsafe(&(g_huw_dev.rx_skb_q), &(g_huw_dev.rxlock)) == 0)
+    {
+        ret = wait_event_interruptible((g_huw_dev.read_wq), (skb_queue_len_bhsafe(&(g_huw_dev.rx_skb_q), &(g_huw_dev.rxlock)) != 0));
+        if (ret != 0)
+            return -1;
+    }
+    spin_lock_bh(&(g_huw_dev.rxlock));
+    if (skb_queue_len(&(g_huw_dev.rx_skb_q)) > 0)
+        skb = skb_dequeue(&(g_huw_dev.rx_skb_q));
+    spin_unlock_bh(&(g_huw_dev.rxlock));
+    if (skb != NULL)
+    {
+        copy_length = min(skb->len,(u32)length);
+        CHECK_RET(copy_to_user((int __user *)buf, skb->data, copy_length));
+        dev_kfree_skb_any(skb);
+    }
+    return copy_length;
+}
+static ssize_t ssv_huw_write(struct file *fp, const char __user * buf, size_t length, loff_t * offset)
+{
+    struct sk_buff *skb;
+    unsigned int len = (unsigned int)length;
+    len = (len & 0x1f)?(((len>>5) + 1)<<5):len;
+    skb = __dev_alloc_skb(len, GFP_KERNEL);
+    if (skb == NULL)
+    {
+        dev_err(g_huw_dev.dev,"%s: error : alloc buf error size:%d",__FUNCTION__,(u32)len);
+        return -ENOMEM;
+    }
+    CHECK_RET(copy_from_user(skb->data, (int __user *)buf, length));
+    skb_put(skb, length);
+    HCI_SEND(&g_huw_dev, skb, 1);
+    return length;
+}
+void ssv_huw_tx_cb(struct sk_buff_head *skb_head, void *args)
+{
+    struct sk_buff *skb = NULL;
+    while ((skb=skb_dequeue(skb_head)))
+    {
+        dev_kfree_skb_any(skb);
+        skb = NULL;
+    }
+}
+int ssv_huw_read_hci_info(struct ssv_huw_dev *phuw_dev)
+{
+    struct ssv6xxx_hci_info *pinfo = &(phuw_dev->hci);
+    pinfo->hci_ops = NULL;
+    pinfo->dev = phuw_dev->dev;
+    pinfo->hci_rx_cb = ssv_huw_rx;
+    pinfo->rx_cb_args = (void *)phuw_dev;
+    pinfo->hci_tx_cb= ssv_huw_tx_cb;
+    pinfo->tx_cb_args = NULL;
+    pinfo->hci_skb_update_cb = NULL;
+    pinfo->skb_update_args = NULL;
+    pinfo->hci_tx_flow_ctrl_cb = NULL;
+    pinfo->tx_fctrl_cb_args = NULL;
+    pinfo->hci_tx_q_empty_cb = NULL;
+    pinfo->tx_q_empty_args = NULL;
+    pinfo->hci_tx_buf_free_cb = ssv_huw_txbuf_free_skb;
+    pinfo->tx_buf_free_args = NULL;
+    pinfo->if_ops = phuw_dev->priv->ops;
+    return 0;
+}
+struct file_operations s_huw_ops =
+{
+    .read = ssv_huw_read,
+    .write = ssv_huw_write,
+    .unlocked_ioctl = ssv_huw_ioctl,
+#ifdef CONFIG_COMPAT
+    .compat_ioctl = ssv_huw_compat_ioctl,
+#endif
+    .open = ssv_huw_open,
+    .release = ssv_huw_release,
+};
+static int ssv_huw_init_buf(struct ssv_huw_dev *hdev)
+{
+    init_waitqueue_head(&hdev->read_wq);
+    spin_lock_init(&hdev->rxlock);
+    skb_queue_head_init(&(hdev->rx_skb_q));
+    return 0;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
+static char *ssv_huw_devnode(struct device *dev, umode_t *mode)
+#else
+static char *ssv_huw_devnode(struct device *dev, mode_t *mode)
+#endif
+{
+    if (!mode)
+        return NULL;
+    *mode = 0666;
+    return NULL;
+}
+int ssv_huw_probe(struct platform_device *pdev)
+{
+    dev_t dev;
+    int alloc_ret = 0;
+    int cdev_ret = 0;
+    if (!pdev->dev.platform_data) {
+        dev_err(&pdev->dev, "no platform data specified!\n");
+        return -EINVAL;
+    }
+    ssv_huw_init_buf(&g_huw_dev);
+    g_huw_dev.priv = (pdev->dev.platform_data);
+    g_huw_dev.dev = &(pdev->dev);
+    ssv_huw_read_hci_info(&g_huw_dev);
+    ssv6xxx_hci_register(&(g_huw_dev.hci));
+    dev = MKDEV(ssv_sdiobridge_ioctl_major, 0);
+    alloc_ret = alloc_chrdev_region(&dev, 0, num_of_dev, FILE_DEVICE_SSVSDIO_NAME);
+    if (alloc_ret)
+        goto error;
+    ssv_sdiobridge_ioctl_major = MAJOR(dev);
+    cdev_init(&ssv_sdiobridge_ioctl_cdev, &s_huw_ops);
+    cdev_ret = cdev_add(&ssv_sdiobridge_ioctl_cdev, dev, num_of_dev);
+    if (cdev_ret)
+        goto error;
+    fc=class_create(THIS_MODULE, FILE_DEVICE_SSVSDIO_NAME);
+    fc->devnode = ssv_huw_devnode;
+    device_create(fc,NULL,dev,NULL,"%s",FILE_DEVICE_SSVSDIO_NAME);
+    dev_err(&pdev->dev, "%s driver(major: %d) installed.\n", FILE_DEVICE_SSVSDIO_NAME, ssv_sdiobridge_ioctl_major);
+    return 0;
+error:
+    if (cdev_ret == 0)
+        cdev_del(&ssv_sdiobridge_ioctl_cdev);
+    if (alloc_ret == 0)
+        unregister_chrdev_region(dev, num_of_dev);
+    return -ENODEV;
+}
+EXPORT_SYMBOL(ssv_huw_probe);
+int ssv_huw_remove(struct platform_device *pdev)
+{
+    dev_t dev;
+    int ret = 0;
+    ssv6xxx_hci_deregister();
+    memset(&g_huw_dev, 0 , sizeof(g_huw_dev));
+    dev = MKDEV(ssv_sdiobridge_ioctl_major, 0);
+    device_destroy(fc,dev);
+    class_destroy(fc);
+    cdev_del(&ssv_sdiobridge_ioctl_cdev);
+    unregister_chrdev_region(dev, num_of_dev);
+    return ret;
+}
+EXPORT_SYMBOL(ssv_huw_remove);
+static const struct platform_device_id huw_id_table[] = {
+    {
+        .name = "ssv6200",
+        .driver_data = 0x00,
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(platform, huw_id_table);
+static struct platform_driver ssv_huw_driver =
+{
+    .probe = ssv_huw_probe,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    .remove = __devexit_p(ssv_huw_remove),
+#else
+    .remove = ssv_huw_remove,
+#endif
+    .id_table = huw_id_table,
+    .driver = {
+        .name = "SSV WLAN driver",
+        .owner = THIS_MODULE,
+    }
+};
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+int ssv_huw_init(void)
+#else
+static int __init ssv_huw_init(void)
+#endif
+{
+    int ret;
+    memset(&g_huw_dev, 0 , sizeof(g_huw_dev));
+    ret = platform_driver_register(&ssv_huw_driver);
+    if (ret < 0)
+    {
+        printk(KERN_ALERT "[HCI user-space wrapper]: Fail to register huw\n");
+    }
+    return ret;
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+void ssv_huw_exit(void)
+#else
+static void __exit ssv_huw_exit(void)
+#endif
+{
+    platform_driver_unregister(&ssv_huw_driver);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ssv_huw_init);
+EXPORT_SYMBOL(ssv_huw_exit);
+#else
+module_init(ssv_huw_init);
+module_exit(ssv_huw_exit);
+#endif
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.h
new file mode 100644
index 0000000000000..366c913a52adf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hci_wrapper/ssv_huw.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_HUW_H_
+#define _SSV_HUW_H_ 
+#include <linux/ioctl.h>
+struct ssv_huw_cmd {
+    __u32 in_data_len;
+    u8* in_data;
+#ifndef __x86_64
+    __u32 padding1;
+#endif
+    __u32 out_data_len;
+    u8* out_data;
+#ifndef __x86_64
+        __u32 padding2;
+#endif
+    __u32 response;
+}__attribute__((packed));
+#define FILE_DEVICE_SSVSDIO MMC_BLOCK_MAJOR
+#define FILE_DEVICE_SSVSDIO_SEQ 0x50
+#define FILE_DEVICE_SSVSDIO_NAME "ssvhuwdev"
+#if 0
+#define IOCTL_SSVSDIO_GET_DRIVER_VERSION \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x01, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_FUNCTION_NUMBER \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x02, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_FUNCTION_FOCUS \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x03, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_FUNCTION_FOCUS \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x04, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_WIDTH \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x05, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_WIDTH \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x06, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_CLOCK \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x07, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_CLOCK \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x08, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_BLOCK_MODE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x09, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_BLOCK_MODE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0a, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0b, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0c, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_FN0_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0d, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_FN0_BLOCKLEN \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0e, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_BUS_INTERFACE_CONTROL \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x0f, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_BUS_INTERFACE_CONTROL \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x10, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_INT_ENABLE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x11, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_INT_ENABLE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x12, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_AUTO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x13, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_AUTO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x14, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_ACK_INT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x15, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_READ_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x16, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_WRITE_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x17, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_MULTI_BYTE_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x18, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_MULTI_BYTE_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x19, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_READ_MULTI_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1a, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_WRITE_MULTI_BYTE \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1b, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_GET_MULTI_BYTE_REG_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1c, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_SET_MULTI_BYTE_REG_IO_PORT \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1d, struct ssv_huw_cmd)
+#endif
+#define IOCTL_SSVSDIO_READ_REG \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1e, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_WRITE_REG \
+ _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x1f, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_READ_DATA \
+    _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x20, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_WRITE_SRAM \
+    _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x21, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_START \
+    _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x22, struct ssv_huw_cmd)
+#define IOCTL_SSVSDIO_STOP \
+    _IOWR( FILE_DEVICE_SSVSDIO, FILE_DEVICE_SSVSDIO_SEQ+0x23, struct ssv_huw_cmd)
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/hwif.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/hwif.h
new file mode 100644
index 0000000000000..6b5263d157d86
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/hwif.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LINUX_SSVCABRIO_PLATFORM_H
+#define _LINUX_SSVCABRIO_PLATFORM_H 
+#include <linux/mmc/host.h>
+#include <hwif/sdio/sdio_def.h>
+#define SSVCABRIO_PLAT_EEP_MAX_WORDS 2048
+#define SSV_REG_WRITE(dev,reg,val) \
+        (sh)->priv->ops->writereg((sh)->sc->dev, (reg), (val))
+#define SSV_REG_READ(dev,reg,buf) \
+        (sh)->priv->ops->readreg((sh)->sc->dev, (reg), (buf))
+#if 0
+#define SSV_REG_WRITE(sh,reg,val) \
+        (sh)->priv->ops->writereg((sh)->sc->dev, (reg), (val))
+#define SSV_REG_READ(sh,reg,buf) \
+        (sh)->priv->ops->readreg((sh)->sc->dev, (reg), (buf))
+#define SSV_REG_CONFIRM(sh,reg,val) \
+{ \
+    u32 regval; \
+    SSV_REG_READ(sh, reg, &regval); \
+    if (regval != (val)) { \
+        printk("[0x%08x]: 0x%08x!=0x%08x\n",\
+        (reg), (val), regval); \
+        return -1; \
+    } \
+}
+#define SSV_REG_SET_BITS(sh,reg,set,clr) \
+{ \
+    u32 reg_val; \
+    SSV_REG_READ(sh, reg, &reg_val); \
+    reg_val &= ~(clr); \
+    reg_val |= (set); \
+    SSV_REG_WRITE(sh, reg, reg_val); \
+}
+#endif
+struct ssv6xxx_hwif_ops {
+    int __must_check (*read)(struct device *child, void *buf,size_t *size);
+    int __must_check (*write)(struct device *child, void *buf, size_t len,u8 queue_num);
+    int __must_check (*readreg)(struct device *child, u32 addr, u32 *buf);
+    int __must_check (*writereg)(struct device *child, u32 addr, u32 buf);
+    int (*trigger_tx_rx)(struct device *child);
+    int (*irq_getmask)(struct device *child, u32 *mask);
+    void (*irq_setmask)(struct device *child,int mask);
+    void (*irq_enable)(struct device *child);
+    void (*irq_disable)(struct device *child,bool iswaitirq);
+    int (*irq_getstatus)(struct device *child,int *status);
+    void (*irq_request)(struct device *child,irq_handler_t irq_handler,void *irq_dev);
+    void (*irq_trigger)(struct device *child);
+    void (*pmu_wakeup)(struct device *child);
+    int __must_check (*load_fw)(struct device *child, u8 *firmware_name, u8 openfile);
+    int (*cmd52_read)(struct device *child, u32 addr, u32 *value);
+    int (*cmd52_write)(struct device *child, u32 addr, u32 value);
+    bool (*support_scatter)(struct device *child);
+    int (*rw_scatter)(struct device *child, struct sdio_scatter_req *scat_req);
+    bool (*is_ready)(struct device *child);
+    int (*write_sram)(struct device *child, u32 addr, u8 *data, u32 size);
+    void (*interface_reset)(struct device *child);
+};
+struct ssv6xxx_if_debug {
+    struct device *dev;
+    struct platform_device *pdev;
+};
+struct ssv6xxx_platform_data {
+    atomic_t irq_handling;
+    bool is_enabled;
+    unsigned short vendor;
+    unsigned short device;
+    struct ssv6xxx_hwif_ops *ops;
+};
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/Makefile
new file mode 100644
index 0000000000000..0f10136ceb91b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/Makefile
@@ -0,0 +1,21 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/smac/Module.symvers
+ifeq ($(DRV_OPT), HUW_DRV)
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/hci_wrapper/Module.symvers
+endif
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/ssvdevice/Module.symvers
+
+KMODULE_NAME=ssv6200_sdio
+KERN_SRCS := sdio.c
+
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio.c
new file mode 100644
index 0000000000000..b3b42d2f69a40
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio.c
@@ -0,0 +1,1597 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+#include "sdio_def.h"
+#include <linux/pm_runtime.h>
+#include <linux/version.h>
+#include <linux/firmware.h>
+#include <linux/reboot.h>
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+#include <linux/skbuff.h>
+#endif
+#define SDIO_USE_SLOW_CLOCK 
+#define LOW_SPEED_SDIO_CLOCK (25000000)
+#define HIGH_SPEED_SDIO_CLOCK (50000000)
+static struct ssv6xxx_platform_data wlan_data;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+#include <linux/printk.h>
+#else
+#include <linux/kernel.h>
+#endif
+#include <ssv6200.h>
+#define MAX_RX_FRAME_SIZE 0x900
+#define SSV_VENDOR_ID 0x3030
+#define SSV_CABRIO_DEVID 0x3030
+#define ENABLE_FW_SELF_CHECK 1
+#define FW_BLOCK_SIZE 0x8000
+#define CHECKSUM_BLOCK_SIZE 1024
+#define FW_CHECKSUM_INIT (0x12345678)
+#define FW_STATUS_REG ADR_TX_SEG
+#define FW_STATUS_MASK (0x00FF0000)
+#ifdef CONFIG_PM
+static int ssv6xxx_sdio_trigger_pmu(struct device *dev);
+static void ssv6xxx_sdio_reset(struct device *child);
+#else
+static void ssv6xxx_sdio_reset(struct device *child) { ; }
+#endif
+static void ssv6xxx_high_sdio_clk(struct sdio_func *func);
+static void ssv6xxx_low_sdio_clk(struct sdio_func *func);
+extern void *ssv6xxx_ifdebug_info[];
+extern int ssv_devicetype;
+extern void ssv6xxx_deinit_prepare(void);  
+static int ssv6xxx_sdio_status = 0;
+u32 sdio_sr_bhvr = SUSPEND_RESUME_0;
+EXPORT_SYMBOL(sdio_sr_bhvr);
+
+static DEFINE_MUTEX(reboot_lock);
+u32 shutdown_flags = SSV_SYS_REBOOT;
+
+struct ssv6xxx_sdio_glue
+{
+    struct device *dev;
+    struct platform_device *core;
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+    struct sk_buff *dmaSkb;
+#endif
+#ifdef CONFIG_PM
+    struct sk_buff *cmd_skb;
+#endif
+    unsigned int dataIOPort;
+    unsigned int regIOPort;
+    irq_handler_t irq_handler;
+    void *irq_dev;
+    bool dev_ready;
+};
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+static const struct sdio_device_id ssv6xxx_sdio_devices[] __devinitconst =
+#else
+static const struct sdio_device_id ssv6xxx_sdio_devices[] =
+#endif
+{
+    { SDIO_DEVICE(SSV_VENDOR_ID, SSV_CABRIO_DEVID) },
+    {}
+};
+MODULE_DEVICE_TABLE(sdio, ssv6xxx_sdio_devices);
+static bool ssv6xxx_is_ready (struct device *child)
+{
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+        return false;
+    return glue->dev_ready;
+}
+static int ssv6xxx_sdio_cmd52_read(struct device *child, u32 addr,
+        u32 *value)
+{
+    int ret = -1;
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        *value = sdio_readb(func, addr, &ret);
+        sdio_release_host(func);
+    }
+    return ret;
+}
+static int ssv6xxx_sdio_cmd52_write(struct device *child, u32 addr,
+        u32 value)
+{
+    int ret = -1;
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        sdio_writeb(func, value, addr, &ret);
+        sdio_release_host(func);
+    }
+    return ret;
+}
+static int __must_check ssv6xxx_sdio_read_reg(struct device *child, u32 addr,
+        u32 *buf)
+{
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func ;
+    u8 data[4];
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        data[0] = (addr >> ( 0 )) &0xff;
+        data[1] = (addr >> ( 8 )) &0xff;
+        data[2] = (addr >> ( 16 )) &0xff;
+        data[3] = (addr >> ( 24 )) &0xff;
+        ret = sdio_memcpy_toio(func, glue->regIOPort, data, 4);
+        if (WARN_ON(ret))
+        {
+            dev_err(child->parent, "sdio read reg write address failed (%d)\n", ret);
+            goto io_err;
+        }
+        ret = sdio_memcpy_fromio(func, data, glue->regIOPort, 4);
+        if (WARN_ON(ret))
+        {
+            dev_err(child->parent, "sdio read reg from I/O failed (%d)\n",ret);
+         goto io_err;
+      }
+        if(ret == 0)
+        {
+            *buf = (data[0]&0xff);
+            *buf = *buf | ((data[1]&0xff)<<( 8 ));
+            *buf = *buf | ((data[2]&0xff)<<( 16 ));
+            *buf = *buf | ((data[3]&0xff)<<( 24 ));
+        }
+        else
+            *buf = 0xffffffff;
+io_err:
+        sdio_release_host(func);
+    }
+    else
+    {
+        dev_err(child->parent, "sdio read reg glue == NULL!!!\n");
+    }
+    return ret;
+}
+#ifdef ENABLE_WAKE_IO_ISR_WHEN_HCI_ENQUEUE
+static int ssv6xxx_sdio_trigger_tx_rx (struct device *child)
+{
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    struct mmc_host *host;
+    if (glue == NULL)
+        return ret;
+    func = dev_to_sdio_func(glue->dev);
+    host = func->card->host;
+    mmc_signal_sdio_irq(host);
+    return 0;
+}
+#endif
+static int __must_check ssv6xxx_sdio_write_reg(struct device *child, u32 addr,
+        u32 buf)
+{
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    u8 data[8];
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        dev_dbg(child->parent, "sdio write reg addr 0x%x, 0x%x\n",addr, buf);
+        sdio_claim_host(func);
+        data[0] = (addr >> ( 0 )) &0xff;
+        data[1] = (addr >> ( 8 )) &0xff;
+        data[2] = (addr >> ( 16 )) &0xff;
+        data[3] = (addr >> ( 24 )) &0xff;
+        data[4] = (buf >> ( 0 )) &0xff;
+        data[5] = (buf >> ( 8 )) &0xff;
+        data[6] = (buf >> ( 16 )) &0xff;
+        data[7] = (buf >> ( 24 )) &0xff;
+        ret = sdio_memcpy_toio(func, glue->regIOPort, data, 8);
+        sdio_release_host(func);
+#ifdef __x86_64
+        udelay(50);
+#endif
+    }
+    else
+    {
+        dev_err(child->parent, "sdio write reg glue == NULL!!!\n");
+    }
+    return ret;
+}
+static int ssv6xxx_sdio_write_sram(struct device *child, u32 addr, u8 *data, u32 size)
+{
+    int ret = -1;
+    struct ssv6xxx_sdio_glue *glue;
+    struct sdio_func *func=NULL;
+    glue = dev_get_drvdata(child->parent);
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+        return ret;
+    func = dev_to_sdio_func(glue->dev);
+    sdio_claim_host(func);
+    do {
+        if (ssv6xxx_sdio_write_reg(child,0xc0000860,addr)) ;
+        sdio_writeb(func, 0x2, REG_Fn1_STATUS, &ret);
+        if (unlikely(ret)) break;
+        ret = sdio_memcpy_toio(func, glue->dataIOPort, data, size);
+        if (unlikely(ret)) return ret;
+        sdio_writeb(func, 0, REG_Fn1_STATUS, &ret);
+        if (unlikely(ret)) return ret;
+    } while (0);
+    sdio_release_host(func);
+    return ret;
+}
+void * ssv6xxx_open_firmware(char *user_mainfw)
+{
+    struct file *fp;
+    fp = filp_open(user_mainfw, O_RDONLY, 0);
+    if (IS_ERR(fp))
+    {
+        printk("ssv6xxx_open_firmware failed!!\n");
+        fp = NULL;
+    }
+    return fp;
+}
+int ssv6xxx_read_fw_block(char *buf, int len, void *image)
+{
+ struct file *fp = (struct file *)image;
+ int rdlen;
+ if (!image)
+  return 0;
+ rdlen = kernel_read(fp, fp->f_pos, buf, len);
+ if (rdlen > 0)
+  fp->f_pos += rdlen;
+ return rdlen;
+}
+void ssv6xxx_close_firmware(void *image)
+{
+ if (image)
+  filp_close((struct file *)image, NULL);
+}
+static int ssv6xxx_sdio_load_firmware_openfile(struct device *child, u8 *firmware_name)
+{
+    int ret = 0;
+    struct ssv6xxx_sdio_glue *glue;
+    u8 *fw_buffer = NULL;
+    u32 sram_addr = 0x00000000;
+    u32 block_count = 0;
+    u32 res_size=0,len=0,tolen=0;
+    void *fw_fp=NULL;
+#ifdef ENABLE_FW_SELF_CHECK
+    u32 checksum = FW_CHECKSUM_INIT;
+    u32 fw_checksum,fw_clkcnt;
+    u32 retry_count = 3;
+    u32 *fw_data32;
+#else
+    int writesize=0;
+    u32 retry_count = 1;
+#endif
+    u32 word_count,i;
+    u32 j,jblk;
+    #ifndef SDIO_USE_SLOW_CLOCK
+    struct sdio_func *func=NULL;
+    struct mmc_card *card = NULL;
+    struct mmc_host *host = NULL;
+    #endif
+    glue = dev_get_drvdata(child->parent);
+    if ( (wlan_data.is_enabled != false)
+        || (glue != NULL)
+        || (glue->dev_ready != false))
+    {
+        #ifndef SDIO_USE_SLOW_CLOCK
+        func = dev_to_sdio_func(glue->dev);
+        card = func->card;
+        host = card->host;
+        #endif
+        fw_fp = ssv6xxx_open_firmware(firmware_name);
+        if (!fw_fp) {
+            printk("failed to find firmware (%s)\n", firmware_name);
+            ret = -1;
+            goto out;
+        }
+        fw_buffer = (u8 *)kzalloc(FW_BLOCK_SIZE, GFP_KERNEL);
+        if (fw_buffer == NULL) {
+            printk("Failed to allocate buffer for firmware.\n");
+            goto out;
+        }
+        do {
+            u32 clk_en;
+            if(1){
+            if(ssv6xxx_sdio_write_reg(child, ADR_BRG_SW_RST, 0x0));
+            if(ssv6xxx_sdio_write_reg(child, ADR_BOOT, 0x01));
+            if(ssv6xxx_sdio_read_reg(child, ADR_PLATFORM_CLOCK_ENABLE, &clk_en));
+            if(ssv6xxx_sdio_write_reg(child, ADR_PLATFORM_CLOCK_ENABLE, clk_en | (1 << 2)));
+            }
+            printk("Writing firmware to SSV6XXX...\n");
+            memset(fw_buffer, 0xA5, FW_BLOCK_SIZE);
+            while ((len = ssv6xxx_read_fw_block((char*)fw_buffer, FW_BLOCK_SIZE, fw_fp))) {
+                tolen += len;
+                if(len < FW_BLOCK_SIZE){
+                    res_size = len;
+                    break;
+                }
+                if(0)
+                {
+                    jblk = len / 128;
+                    for(j=0;j<jblk;j++)
+                    {
+                        ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)(fw_buffer+j*128), 128);
+                        if (ret){
+                            printk("ssv6xxx_sdio_write_sram failed!!\n");
+                            break;
+                        }
+                        sram_addr += 128;
+                    }
+                }else{
+                    ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, FW_BLOCK_SIZE);
+                    if (ret)
+                        break;
+                    sram_addr += FW_BLOCK_SIZE;
+                }
+                word_count = (len / sizeof(u32));
+                fw_data32 = (u32 *)fw_buffer;
+                for (i = 0; i < word_count; i++){
+                    checksum += fw_data32[i];
+                }
+                memset(fw_buffer, 0xA5, FW_BLOCK_SIZE);
+            }
+            if(res_size)
+            {
+                u32 cks_blk_cnt,cks_blk_res;
+                cks_blk_cnt = res_size / CHECKSUM_BLOCK_SIZE;
+                cks_blk_res = res_size % CHECKSUM_BLOCK_SIZE;
+                if(0)
+                {
+                    jblk = ((cks_blk_cnt+1)*CHECKSUM_BLOCK_SIZE)/128;
+                    for(j=0;j<jblk;j++){
+                        ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)(fw_buffer+j*128), 128);
+                        sram_addr += 128;
+                    }
+                }else{
+                    ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, (cks_blk_cnt+1)*CHECKSUM_BLOCK_SIZE);
+                }
+                word_count = (cks_blk_cnt * CHECKSUM_BLOCK_SIZE / sizeof(u32));
+                fw_data32 = (u32 *)fw_buffer;
+                for (i = 0; i < word_count; i++)
+                    checksum += *fw_data32++;
+                if(cks_blk_res)
+                {
+                    word_count = (CHECKSUM_BLOCK_SIZE / sizeof(u32));
+                    for (i = 0; i < word_count; i++) {
+                        checksum += *fw_data32++;
+                    }
+                }
+            }
+            checksum = ((checksum >> 24) + (checksum >> 16) + (checksum >> 8) + checksum) & 0x0FF;
+            checksum <<= 16;
+            if (ret == 0) {
+                block_count = tolen / CHECKSUM_BLOCK_SIZE;
+                res_size = tolen % CHECKSUM_BLOCK_SIZE;
+                if(res_size)
+                    block_count++;
+                if(ssv6xxx_sdio_write_reg(child, FW_STATUS_REG, (block_count << 16)));
+                if(ssv6xxx_sdio_read_reg(child, FW_STATUS_REG, &fw_clkcnt));
+                printk("(block_count << 16) = %x,reg =%x\n",(block_count << 16),fw_clkcnt);
+                if(ssv6xxx_sdio_write_reg(child, ADR_BRG_SW_RST, 0x1));
+                printk("Firmware \"%s\" loaded\n", firmware_name);
+                msleep(50);
+                if(ssv6xxx_sdio_read_reg(child, FW_STATUS_REG, &fw_checksum));
+                fw_checksum = fw_checksum & FW_STATUS_MASK;
+                if (fw_checksum == checksum) {
+                    if(ssv6xxx_sdio_write_reg(child, FW_STATUS_REG, (~checksum & FW_STATUS_MASK)));
+                    ret = 0;
+                    printk("Firmware check OK.%04x = %04x\n", fw_checksum, checksum);
+                    break;
+                } else {
+                    printk("FW checksum error: %04x != %04x\n", fw_checksum, checksum);
+                    ret = -1;
+                }
+            } else {
+                printk("Firmware \"%s\" download failed. (%d)\n", firmware_name, ret);
+                ret = -1;
+            }
+        } while (--retry_count);
+        if (ret)
+            goto out;
+        ret = 0;
+    }
+out:
+    if(fw_fp)
+        ssv6xxx_close_firmware(fw_fp);
+    if (fw_buffer != NULL)
+        kfree(fw_buffer);
+    msleep(50);
+    return ret;
+}
+int ssv6xxx_get_firmware(struct device *dev,
+            char *user_mainfw,
+            const struct firmware **mainfw)
+{
+    int ret;
+    BUG_ON(mainfw == NULL);
+    if (*user_mainfw) {
+        ret = request_firmware(mainfw, user_mainfw, dev);
+        if (ret) {
+            dev_err(dev, "couldn't find main firmware %s\n",user_mainfw);
+            goto fail;
+        }
+        if (*mainfw)
+            return 0;
+    }
+fail:
+    if (*mainfw) {
+        release_firmware(*mainfw);
+        *mainfw = NULL;
+    }
+    return -ENOENT;
+}
+static int ssv6xxx_sdio_load_firmware_request(struct device *child ,u8 *firmware_name)
+{
+    int ret = 0;
+    const struct firmware *ssv6xxx_fw = NULL;
+    struct ssv6xxx_sdio_glue *glue;
+    u8 *fw_buffer = NULL;
+    u32 sram_addr = 0x00000000;
+    u32 block_count = 0;
+    u32 block_idx = 0;
+    u32 res_size;
+    u8 *fw_data;
+#ifdef ENABLE_FW_SELF_CHECK
+    u32 checksum = FW_CHECKSUM_INIT;
+    u32 fw_checksum;
+    u32 retry_count = 3;
+    u32 *fw_data32;
+#else
+    int writesize=0;
+    u32 retry_count = 1;
+#endif
+    #ifndef SDIO_USE_SLOW_CLOCK
+    struct sdio_func *func=NULL;
+    struct mmc_card *card = NULL;
+    struct mmc_host *host = NULL;
+    #endif
+    glue = dev_get_drvdata(child->parent);
+    if ( (wlan_data.is_enabled != false)
+        || (glue != NULL)
+        || (glue->dev_ready != false))
+    {
+        #ifndef SDIO_USE_SLOW_CLOCK
+        func = dev_to_sdio_func(glue->dev);
+        card = func->card;
+        host = card->host;
+        #endif
+        ret = ssv6xxx_get_firmware(glue->dev, firmware_name, &ssv6xxx_fw);
+        if (ret) {
+            pr_err("failed to find firmware (%d)\n", ret);
+            goto out;
+        }
+        fw_buffer = (u8 *)kzalloc(FW_BLOCK_SIZE, GFP_KERNEL);
+        if (fw_buffer == NULL) {
+            pr_err("Failed to allocate buffer for firmware.\n");
+            goto out;
+        }
+#ifdef ENABLE_FW_SELF_CHECK
+        block_count = ssv6xxx_fw->size / CHECKSUM_BLOCK_SIZE;
+        res_size = ssv6xxx_fw->size % CHECKSUM_BLOCK_SIZE;
+        {
+            int word_count = (int)(block_count * CHECKSUM_BLOCK_SIZE / sizeof(u32));
+            int i;
+            fw_data32 = (u32 *)ssv6xxx_fw->data;
+            for (i = 0; i < word_count; i++)
+                checksum += fw_data32[i];
+            if(res_size)
+            {
+                memset(fw_buffer, 0xA5, CHECKSUM_BLOCK_SIZE);
+                memcpy(fw_buffer, &ssv6xxx_fw->data[block_count * CHECKSUM_BLOCK_SIZE], res_size);
+                word_count = (int)(CHECKSUM_BLOCK_SIZE / sizeof(u32));
+                fw_data32 = (u32 *)fw_buffer;
+                for (i = 0; i < word_count; i++) {
+                    checksum += fw_data32[i];
+                }
+            }
+        }
+        checksum = ((checksum >> 24) + (checksum >> 16) + (checksum >> 8) + checksum) & 0x0FF;
+        checksum <<= 16;
+#endif
+        do {
+            u32 clk_en;
+            if(ssv6xxx_sdio_write_reg(child, ADR_BRG_SW_RST, 0x0));
+            if(ssv6xxx_sdio_write_reg(child, ADR_BOOT, 0x01));
+            if(ssv6xxx_sdio_read_reg(child, ADR_PLATFORM_CLOCK_ENABLE, &clk_en));
+            if(ssv6xxx_sdio_write_reg(child, ADR_PLATFORM_CLOCK_ENABLE, clk_en | (1 << 2)));
+#ifdef ENABLE_FW_SELF_CHECK
+            block_count = ssv6xxx_fw->size / FW_BLOCK_SIZE;
+            res_size = ssv6xxx_fw->size % FW_BLOCK_SIZE;
+            printk("Writing %d blocks to SSV6XXX...", block_count);
+            for (block_idx = 0, fw_data = (u8 *)ssv6xxx_fw->data, sram_addr = 0;block_idx < block_count;
+                block_idx++, fw_data += FW_BLOCK_SIZE, sram_addr += FW_BLOCK_SIZE) {
+                memcpy(fw_buffer, fw_data, FW_BLOCK_SIZE);
+                ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, FW_BLOCK_SIZE);
+                if (ret)
+                    break;
+            }
+            if(res_size)
+            {
+                memset(fw_buffer, 0xA5, FW_BLOCK_SIZE);
+                memcpy(fw_buffer, &ssv6xxx_fw->data[block_count * FW_BLOCK_SIZE], res_size);
+                ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, ((res_size/CHECKSUM_BLOCK_SIZE)+1)*CHECKSUM_BLOCK_SIZE);
+            }
+#else
+            block_count = ssv6xxx_fw->size / FW_BLOCK_SIZE;
+            res_size = ssv6xxx_fw->size % FW_BLOCK_SIZE;
+            writesize = sdio_align_size(func,res_size);
+            printk("Writing %d blocks to SSV6XXX...", block_count);
+            for (block_idx = 0, fw_data = (u8 *)ssv6xxx_fw->data, sram_addr = 0;block_idx < block_count;
+                block_idx++, fw_data += FW_BLOCK_SIZE, sram_addr += FW_BLOCK_SIZE) {
+                memcpy(fw_buffer, fw_data, FW_BLOCK_SIZE);
+                ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, FW_BLOCK_SIZE);
+                if (ret)
+                    break;
+            }
+            if(res_size)
+            {
+                memcpy(fw_buffer, &ssv6xxx_fw->data[block_count * FW_BLOCK_SIZE], res_size);
+                ret = ssv6xxx_sdio_write_sram(child, sram_addr, (u8 *)fw_buffer, writesize);
+            }
+#endif
+            if (ret == 0) {
+#ifdef ENABLE_FW_SELF_CHECK
+                block_count = ssv6xxx_fw->size / CHECKSUM_BLOCK_SIZE;
+                res_size = ssv6xxx_fw->size % CHECKSUM_BLOCK_SIZE;
+                if(res_size)
+                    block_count++;
+                if(ssv6xxx_sdio_write_reg(child, FW_STATUS_REG, (block_count << 16)));
+#endif
+                if(ssv6xxx_sdio_write_reg(child, ADR_BRG_SW_RST, 0x1));
+                printk("Firmware \"%s\" loaded\n", firmware_name);
+#ifdef ENABLE_FW_SELF_CHECK
+                msleep(50);
+                if(ssv6xxx_sdio_read_reg(child, FW_STATUS_REG, &fw_checksum));
+                fw_checksum = fw_checksum & FW_STATUS_MASK;
+                if (fw_checksum == checksum) {
+                    if(ssv6xxx_sdio_write_reg(child, FW_STATUS_REG, (~checksum & FW_STATUS_MASK)));
+                    ret = 0;
+                    printk("Firmware check OK.\n");
+                    break;
+                } else {
+                    printk("FW checksum error: %04x != %04x\n", fw_checksum, checksum);
+                    ret = -1;
+                }
+#endif
+            } else {
+                printk("Firmware \"%s\" download failed. (%d)\n", firmware_name, ret);
+                ret = -1;
+            }
+        } while (--retry_count);
+        if (ret)
+            goto out;
+        ret = 0;
+    }
+out:
+    if (ssv6xxx_fw)
+        release_firmware(ssv6xxx_fw);
+    if (fw_buffer != NULL)
+        kfree(fw_buffer);
+    msleep(50);
+    return ret;
+}
+static int ssv6xxx_sdio_load_firmware(struct device *child ,u8 *firmware_name, u8 openfile)
+{
+ int ret = -1;
+ struct ssv6xxx_sdio_glue *glue;
+ struct sdio_func *func;
+ glue = dev_get_drvdata(child->parent);
+    if(openfile)
+        ret = ssv6xxx_sdio_load_firmware_openfile(child,firmware_name);
+    else
+        ret = ssv6xxx_sdio_load_firmware_request(child,firmware_name);
+ if(glue != NULL)
+ {
+  func = dev_to_sdio_func(glue->dev);
+  ssv6xxx_high_sdio_clk(func);
+ }
+ return ret;
+}
+static int ssv6xxx_sdio_irq_getstatus(struct device *child,int *status)
+{
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue;
+    struct sdio_func *func;
+    glue = dev_get_drvdata(child->parent);
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        *status = sdio_readb(func, REG_INT_STATUS, &ret);
+        sdio_release_host(func);
+    }
+    return ret;
+}
+#if 0
+static void _sdio_hexdump(const u8 *buf,
+                             size_t len)
+{
+    size_t i;
+    printk("\n-----------------------------\n");
+    printk("hexdump(len=%lu):\n", (unsigned long) len);
+    {
+        for (i = 0; i < len; i++){
+            printk(" %02x", buf[i]);
+            if((i+1)%40 ==0)
+                printk("\n");
+        }
+    }
+    printk("\n-----------------------------\n");
+}
+#endif
+static int __must_check ssv6xxx_sdio_read(struct device *child,
+        void *buf, size_t *size)
+{
+    int ret = (-1), readsize = 0;
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func ;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        *size = (uint)sdio_readb(func, REG_CARD_PKT_LEN_0, &ret);
+        if (ret)
+            dev_err(child->parent, "sdio read hight len failed ret[%d]\n",ret);
+        if (ret == 0)
+        {
+            *size = *size | ((uint)sdio_readb(func, REG_CARD_PKT_LEN_1, &ret)<<0x8);
+            if (ret)
+                dev_err(child->parent, "sdio read low len failed ret[%d]\n",ret);
+        }
+        if (ret == 0)
+        {
+            readsize = sdio_align_size(func,*size);
+            ret = sdio_memcpy_fromio(func, buf, glue->dataIOPort, readsize);
+            if (ret)
+                dev_err(child->parent, "sdio read failed size ret[%d]\n",ret);
+        }
+        sdio_release_host(func);
+    }
+#if 0
+    if(*size > 1500)
+        _sdio_hexdump(buf,*size);
+#endif
+    return ret;
+}
+static int __must_check ssv6xxx_sdio_write(struct device *child,
+        void *buf, size_t len,u8 queue_num)
+{
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    int writesize;
+    void *tempPointer;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+#ifdef CONFIG_ARM64
+        if (((u64)buf) & 3) {
+#else
+        if (((u32)buf) & 3) {
+#endif
+            memcpy(glue->dmaSkb->data,buf,len);
+            tempPointer = glue->dmaSkb->data;
+        }
+        else
+#endif
+            tempPointer = buf;
+#if 0
+        if(len > 1500)
+            _sdio_hexdump(buf,len);
+#endif
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        writesize = sdio_align_size(func,len);
+        do
+        {
+            ret = sdio_memcpy_toio(func, glue->dataIOPort, tempPointer, writesize);
+            if ( ret == -EILSEQ || ret == -ETIMEDOUT )
+            {
+                ret = -1;
+                break;
+            }
+            else
+            {
+                if(ret)
+                    dev_err(glue->dev,"Unexpected return value ret=[%d]\n",ret);
+            }
+        }
+        while( ret == -EILSEQ || ret == -ETIMEDOUT);
+        sdio_release_host(func);
+        if (ret)
+            dev_err(glue->dev, "sdio write failed (%d)\n", ret);
+    }
+    return ret;
+}
+static void ssv6xxx_sdio_irq_handler(struct sdio_func *func)
+{
+    int status;
+    struct ssv6xxx_sdio_glue *glue = sdio_get_drvdata(func);
+    struct ssv6xxx_platform_data *pwlan_data = &wlan_data;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+        return;
+    if ( glue != NULL && glue->irq_handler != NULL )
+    {
+        atomic_set(&pwlan_data->irq_handling, 1);
+        sdio_release_host(func);
+        if ( glue->irq_handler != NULL )
+            status = glue->irq_handler(0,glue->irq_dev);
+        sdio_claim_host(func);
+        atomic_set(&pwlan_data->irq_handling, 0);
+    }
+}
+static void ssv6xxx_sdio_irq_setmask(struct device *child,int mask)
+{
+    int err_ret;
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        sdio_writeb(func,mask, REG_INT_MASK, &err_ret);
+        sdio_release_host(func);
+    }
+}
+static void ssv6xxx_sdio_irq_trigger(struct device *child)
+{
+    int err_ret;
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        sdio_writeb(func,0x2, REG_INT_TRIGGER, &err_ret);
+        sdio_release_host(func);
+    }
+}
+static int ssv6xxx_sdio_irq_getmask(struct device *child, u32 *mask)
+{
+    u8 imask = 0;
+    int ret = (-1);
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return ret;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        imask = sdio_readb(func,REG_INT_MASK, &ret);
+        *mask = imask;
+        sdio_release_host(func);
+    }
+    return ret;
+}
+static void ssv6xxx_sdio_irq_enable(struct device *child)
+{
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    int ret;
+    struct ssv6xxx_platform_data *pwlan_data = &wlan_data;
+    if ( (pwlan_data->is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        sdio_claim_host(func);
+        ret = sdio_claim_irq(func, ssv6xxx_sdio_irq_handler);
+        if (ret)
+            dev_err(child->parent, "Failed to claim sdio irq: %d\n", ret);
+        sdio_release_host(func);
+    }
+    
+    printk("ssv6xxx_sdio_irq_enable\n");
+}
+static void ssv6xxx_sdio_irq_disable(struct device *child,bool iswaitirq)
+{
+    struct ssv6xxx_sdio_glue *glue = NULL;
+    struct sdio_func *func;
+    struct ssv6xxx_platform_data *pwlan_data = &wlan_data;
+    int ret;
+    printk("ssv6xxx_sdio_irq_disable\n");
+    if ( (wlan_data.is_enabled == false)
+        || (child->parent == NULL))
+  return;
+    glue = dev_get_drvdata(child->parent);
+    if ( (glue == NULL)
+        || (glue->dev_ready == false)
+        || (glue->dev == NULL))
+        return;
+    {
+        func = dev_to_sdio_func(glue->dev);
+        if(func == NULL){
+            printk("func == NULL\n");
+            return;
+        }
+        sdio_claim_host(func);
+        while(atomic_read(&pwlan_data->irq_handling)){
+            sdio_release_host(func);
+      schedule_timeout(HZ / 10);
+      sdio_claim_host(func);
+        }
+        ret = sdio_release_irq(func);
+        if (ret)
+            dev_err(child->parent, "Failed to release sdio irq: %d\n", ret);
+        sdio_release_host(func);
+    }
+}
+static void ssv6xxx_sdio_irq_request(struct device *child,irq_handler_t irq_handler,void *irq_dev)
+{
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    bool isIrqEn = false;
+    if ( (wlan_data.is_enabled == false)
+        || (glue == NULL)
+        || (glue->dev_ready == false))
+  return;
+    if ( glue != NULL )
+    {
+        func = dev_to_sdio_func(glue->dev);
+        glue->irq_handler = irq_handler;
+        glue->irq_dev = irq_dev;
+        if (isIrqEn )
+        {
+            ssv6xxx_sdio_irq_enable(child);
+        }
+    }
+}
+static void ssv6xxx_sdio_read_parameter(struct sdio_func *func,
+        struct ssv6xxx_sdio_glue *glue)
+{
+    int err_ret;
+    sdio_claim_host(func);
+    glue->dataIOPort = 0;
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_0, &err_ret) << ( 8*0 ));
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_1, &err_ret) << ( 8*1 ));
+    glue->dataIOPort = glue->dataIOPort | (sdio_readb(func, REG_DATA_IO_PORT_2, &err_ret) << ( 8*2 ));
+    glue->regIOPort = 0;
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_0, &err_ret) << ( 8*0 ));
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_1, &err_ret) << ( 8*1 ));
+    glue->regIOPort = glue->regIOPort | (sdio_readb(func, REG_REG_IO_PORT_2, &err_ret) << ( 8*2 ));
+    dev_err(&func->dev, "dataIOPort 0x%x regIOPort 0x%x\n",glue->dataIOPort,glue->regIOPort);
+#ifdef CONFIG_PLATFORM_SDIO_BLOCK_SIZE
+    err_ret = sdio_set_block_size(func,CONFIG_PLATFORM_SDIO_BLOCK_SIZE);
+#else
+    err_ret = sdio_set_block_size(func,SDIO_DEF_BLOCK_SIZE);
+#endif
+    if (err_ret != 0) {
+        printk("SDIO setting SDIO_DEF_BLOCK_SIZE fail!!\n");
+    }
+#ifdef CONFIG_PLATFORM_SDIO_OUTPUT_TIMING
+    sdio_writeb(func, CONFIG_PLATFORM_SDIO_OUTPUT_TIMING,REG_OUTPUT_TIMING_REG, &err_ret);
+#else
+    sdio_writeb(func, SDIO_DEF_OUTPUT_TIMING,REG_OUTPUT_TIMING_REG, &err_ret);
+#endif
+    sdio_writeb(func, 0x00,REG_Fn1_STATUS, &err_ret);
+#if 0
+    sdio_writeb(func,SDIO_TX_ALLOC_SIZE_SHIFT|SDIO_TX_ALLOC_ENABLE,REG_SDIO_TX_ALLOC_SHIFT, &err_ret);
+#endif
+    sdio_release_host(func);
+}
+static void ssv6xxx_do_sdio_wakeup(struct sdio_func *func)
+{
+ int err_ret;
+ if(func != NULL)
+ {
+  sdio_claim_host(func);
+  sdio_writeb(func, 0x01, REG_PMU_WAKEUP, &err_ret);
+  mdelay(10);
+  sdio_writeb(func, 0x00, REG_PMU_WAKEUP, &err_ret);
+  sdio_release_host(func);
+ }
+}
+static void ssv6xxx_sdio_pmu_wakeup(struct device *child)
+{
+ struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+ struct sdio_func *func;
+ if (glue != NULL) {
+  func = dev_to_sdio_func(glue->dev);
+  ssv6xxx_do_sdio_wakeup(func);
+ }
+}
+static bool ssv6xxx_sdio_support_scatter(struct device *child)
+{
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+    bool support = false;
+    do{
+        if(!glue){
+            dev_err(child->parent, "ssv6xxx_sdio_enable_scatter glue == NULL!!!\n");
+            break;
+        }
+        func = dev_to_sdio_func(glue->dev);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+        if (func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
+            dev_err(child->parent, "host controller only supports scatter of :%d entries, driver need: %d\n",
+   func->card->host->max_segs,
+   MAX_SCATTER_ENTRIES_PER_REQ);
+            break;
+     }
+        support = true;
+#endif
+    }while(0);
+    return support;
+}
+static void ssv6xxx_sdio_setup_scat_data(struct sdio_scatter_req *scat_req,
+     struct mmc_data *data)
+{
+ struct scatterlist *sg;
+ int i;
+ data->blksz = SDIO_DEF_BLOCK_SIZE;
+ data->blocks = scat_req->len / SDIO_DEF_BLOCK_SIZE;
+ printk("scatter: (%s)  (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
+     (scat_req->req & SDIO_WRITE) ? "WR" : "RD",
+     data->blksz, data->blocks, scat_req->len,
+     scat_req->scat_entries);
+ data->flags = (scat_req->req & SDIO_WRITE) ? MMC_DATA_WRITE :
+          MMC_DATA_READ;
+ sg = scat_req->sgentries;
+ sg_init_table(sg, scat_req->scat_entries);
+ for (i = 0; i < scat_req->scat_entries; i++, sg++) {
+  printk("%d: addr:0x%p, len:%d\n",
+      i, scat_req->scat_list[i].buf,
+      scat_req->scat_list[i].len);
+  sg_set_buf(sg, scat_req->scat_list[i].buf,
+      scat_req->scat_list[i].len);
+ }
+ data->sg = scat_req->sgentries;
+ data->sg_len = scat_req->scat_entries;
+}
+static inline void ssv6xxx_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
+          u8 mode, u8 opcode, u32 addr,
+          u16 blksz)
+{
+ *arg = (((rw & 1) << 31) |
+  ((func & 0x7) << 28) |
+  ((mode & 1) << 27) |
+  ((opcode & 1) << 26) |
+  ((addr & 0x1FFFF) << 9) |
+  (blksz & 0x1FF));
+}
+static int ssv6xxx_sdio_rw_scatter(struct device *child,
+          struct sdio_scatter_req *scat_req)
+{
+    struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+    struct sdio_func *func;
+ struct mmc_request mmc_req;
+ struct mmc_command cmd;
+ struct mmc_data data;
+ u8 opcode, rw;
+ int status = 1;
+    do{
+        if(!glue){
+            dev_err(child->parent, "ssv6xxx_sdio_enable_scatter glue == NULL!!!\n");
+            break;
+        }
+        func = dev_to_sdio_func(glue->dev);
+     memset(&mmc_req, 0, sizeof(struct mmc_request));
+     memset(&cmd, 0, sizeof(struct mmc_command));
+     memset(&data, 0, sizeof(struct mmc_data));
+     ssv6xxx_sdio_setup_scat_data(scat_req, &data);
+     opcode = 0;
+     rw = (scat_req->req & SDIO_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
+     ssv6xxx_sdio_set_cmd53_arg(&cmd.arg, rw, func->num,
+          CMD53_ARG_BLOCK_BASIS, opcode, glue->dataIOPort,
+          data.blocks);
+     cmd.opcode = SD_IO_RW_EXTENDED;
+     cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
+     mmc_req.cmd = &cmd;
+     mmc_req.data = &data;
+     mmc_set_data_timeout(&data, func->card);
+     mmc_wait_for_req(func->card->host, &mmc_req);
+     status = cmd.error ? cmd.error : data.error;
+        if (cmd.error)
+      return cmd.error;
+     if (data.error)
+      return data.error;
+    }while(0);
+ return status;
+}
+static void ssv6xxx_set_sdio_clk(struct sdio_func *func,u32 sdio_hz)
+{
+ struct mmc_host *host;
+ host = func->card->host;
+ if(sdio_hz < host->f_min )
+  sdio_hz = host->f_min;
+ else if(sdio_hz > host->f_max)
+  sdio_hz = host->f_max;
+ printk("%s:set sdio clk %dHz\n", __FUNCTION__,sdio_hz);
+    sdio_claim_host(func);
+    host->ios.clock = sdio_hz;
+    host->ops->set_ios(host, &host->ios);
+    mdelay(20);
+    sdio_release_host(func);
+}
+static void ssv6xxx_low_sdio_clk(struct sdio_func *func)
+{
+ ssv6xxx_set_sdio_clk(func,LOW_SPEED_SDIO_CLOCK);
+}
+static void ssv6xxx_high_sdio_clk(struct sdio_func *func)
+{
+#ifndef SDIO_USE_SLOW_CLOCK
+ ssv6xxx_set_sdio_clk(func,HIGH_SPEED_SDIO_CLOCK);
+#endif
+}
+static struct ssv6xxx_hwif_ops sdio_ops =
+{
+    .read = ssv6xxx_sdio_read,
+    .write = ssv6xxx_sdio_write,
+    .readreg = ssv6xxx_sdio_read_reg,
+    .writereg = ssv6xxx_sdio_write_reg,
+#ifdef ENABLE_WAKE_IO_ISR_WHEN_HCI_ENQUEUE
+    .trigger_tx_rx = ssv6xxx_sdio_trigger_tx_rx,
+#endif
+    .irq_getmask = ssv6xxx_sdio_irq_getmask,
+    .irq_setmask = ssv6xxx_sdio_irq_setmask,
+    .irq_enable = ssv6xxx_sdio_irq_enable,
+    .irq_disable = ssv6xxx_sdio_irq_disable,
+    .irq_getstatus = ssv6xxx_sdio_irq_getstatus,
+    .irq_request = ssv6xxx_sdio_irq_request,
+    .irq_trigger = ssv6xxx_sdio_irq_trigger,
+    .pmu_wakeup = ssv6xxx_sdio_pmu_wakeup,
+    .load_fw = ssv6xxx_sdio_load_firmware,
+    .cmd52_read = ssv6xxx_sdio_cmd52_read,
+    .cmd52_write = ssv6xxx_sdio_cmd52_write,
+    .support_scatter = ssv6xxx_sdio_support_scatter,
+    .rw_scatter = ssv6xxx_sdio_rw_scatter,
+    .is_ready = ssv6xxx_is_ready,
+    .write_sram = ssv6xxx_sdio_write_sram,
+    .interface_reset = ssv6xxx_sdio_reset,
+};
+#ifdef CONFIG_PCIEASPM
+#include <linux/pci.h>
+#include <linux/pci-aspm.h>
+static int cabrio_sdio_pm_check(struct sdio_func *func)
+{
+ struct pci_dev *pci_dev = NULL;
+ struct mmc_card *card = func->card;
+ struct mmc_host *host = card->host;
+ if (strcmp(host->parent->bus->name, "pci"))
+ {
+  dev_info(&func->dev, "SDIO host is not PCI device, but \"%s\".", host->parent->bus->name);
+  return 0;
+ }
+ for_each_pci_dev(pci_dev) {
+  if ( ((pci_dev->class >> 8) != PCI_CLASS_SYSTEM_SDHCI)
+   && ( (pci_dev->driver == NULL)
+    || (strcmp(pci_dev->driver->name, "sdhci-pci") != 0)))
+   continue;
+  if (pci_is_pcie(pci_dev)) {
+   u8 aspm;
+   int pos;
+   pos = pci_pcie_cap(pci_dev);
+         if (pos) {
+             struct pci_dev *parent = pci_dev->bus->self;
+             pci_read_config_byte(pci_dev, pos + PCI_EXP_LNKCTL, &aspm);
+             aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
+             pci_write_config_byte(pci_dev, pos + PCI_EXP_LNKCTL, aspm);
+             pos = pci_pcie_cap(parent);
+             pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
+             aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
+             pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm);
+             dev_info(&pci_dev->dev, "Clear PCI-E device and its parent link state L0S and L1 and CLKPM.\n");
+         }
+  }
+ }
+ return 0;
+}
+#endif
+static int ssv6xxx_sdio_power_on(struct ssv6xxx_platform_data * pdata, struct sdio_func *func)
+{
+ int ret = 0;
+ if (pdata->is_enabled == true)
+  return 0;
+    printk("ssv6xxx_sdio_power_on\n");
+ sdio_claim_host(func);
+ ret = sdio_enable_func(func);
+ sdio_release_host(func);
+ if (ret) {
+  printk("Unable to enable sdio func: %d)\n", ret);
+  return ret;
+ }
+ msleep(10);
+ pdata->is_enabled = true;
+ return ret;
+}
+static int ssv6xxx_sdio_power_off(struct ssv6xxx_platform_data * pdata, struct sdio_func *func)
+{
+ int ret;
+ if (pdata->is_enabled == false)
+  return 0;
+    printk("ssv6xxx_sdio_power_off\n");
+ sdio_claim_host(func);
+ ret = sdio_disable_func(func);
+ sdio_release_host(func);
+ if (ret)
+  return ret;
+ pdata->is_enabled = false;
+ return ret;
+}
+int ssv6xxx_get_dev_status(void)
+{
+ return ssv6xxx_sdio_status;
+}
+EXPORT_SYMBOL(ssv6xxx_get_dev_status);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+static int __devinit ssv6xxx_sdio_probe(struct sdio_func *func,
+        const struct sdio_device_id *id)
+#else
+static int ssv6xxx_sdio_probe(struct sdio_func *func,
+        const struct sdio_device_id *id)
+#endif
+{
+    struct ssv6xxx_platform_data *pwlan_data = &wlan_data;
+    struct ssv6xxx_sdio_glue *glue;
+    int ret = -ENOMEM;
+    const char *chip_family = "ssv6200";
+    if (ssv_devicetype != 0) {
+        printk(KERN_INFO "Not using SSV6200 normal SDIO driver.\n");
+        return -ENODEV;
+    }
+    printk(KERN_INFO "=======================================\n");
+    printk(KERN_INFO "==           RUN SDIO                ==\n");
+    printk(KERN_INFO "=======================================\n");
+    if (func->num != 0x01)
+        return -ENODEV;
+    glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+    if (!glue)
+    {
+        dev_err(&func->dev, "can't allocate glue\n");
+        goto out;
+    }
+    ssv6xxx_sdio_status = 1;
+ ssv6xxx_low_sdio_clk(func);
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+    glue->dmaSkb=__dev_alloc_skb(SDIO_DMA_BUFFER_LEN , GFP_KERNEL);
+#endif
+#ifdef CONFIG_PM
+    glue->cmd_skb=__dev_alloc_skb(SDIO_COMMAND_BUFFER_LEN , GFP_KERNEL);
+#endif
+    memset(pwlan_data, 0, sizeof(struct ssv6xxx_platform_data));
+    atomic_set(&pwlan_data->irq_handling, 0);
+    glue->dev = &func->dev;
+    func->card->quirks |= MMC_QUIRK_LENIENT_FN0;
+    func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
+    glue->dev_ready = true;
+    pwlan_data->vendor = func->vendor;
+    pwlan_data->device = func->device;
+    dev_err(glue->dev, "vendor = 0x%x device = 0x%x\n", pwlan_data->vendor,pwlan_data->device);
+    #ifdef CONFIG_PCIEASPM
+    cabrio_sdio_pm_check(func);
+    #endif
+    pwlan_data->ops = &sdio_ops;
+    sdio_set_drvdata(func, glue);
+#ifdef CONFIG_PM
+        ssv6xxx_do_sdio_wakeup(func);
+#endif
+    ssv6xxx_sdio_power_on(pwlan_data, func);
+    ssv6xxx_sdio_read_parameter(func,glue);
+    glue->core = platform_device_alloc(chip_family, -1);
+    if (!glue->core)
+    {
+        dev_err(glue->dev, "can't allocate platform_device");
+        ret = -ENOMEM;
+        goto out_free_glue;
+    }
+    glue->core->dev.parent = &func->dev;
+    ret = platform_device_add_data(glue->core, pwlan_data,
+                                   sizeof(*pwlan_data));
+    if (ret)
+    {
+        dev_err(glue->dev, "can't add platform data\n");
+        goto out_dev_put;
+    }
+    ret = platform_device_add(glue->core);
+    if (ret)
+    {
+        dev_err(glue->dev, "can't add platform device\n");
+        goto out_dev_put;
+    }
+    ssv6xxx_sdio_irq_setmask(&glue->core->dev,0xff);
+#if 0
+    ssv6xxx_sdio_irq_enable(&glue->core->dev);
+#else
+#endif
+#if 0
+    glue->dev->platform_data = (void *)pwlan_data;
+    ret = ssv6xxx_dev_probe(glue->dev);
+    if (ret)
+    {
+        dev_err(glue->dev, "failed to initial ssv6xxx device !!\n");
+        platform_device_del(glue->core);
+        goto out_dev_put;
+    }
+#endif
+    ssv6xxx_ifdebug_info[0] = (void *)&glue->core->dev;
+    ssv6xxx_ifdebug_info[1] = (void *)glue->core;
+    ssv6xxx_ifdebug_info[2] = (void *)&sdio_ops;
+    return 0;
+out_dev_put:
+    platform_device_put(glue->core);
+out_free_glue:
+    kfree(glue);
+out:
+    return ret;
+}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+static void __devexit ssv6xxx_sdio_remove(struct sdio_func *func)
+#else
+static void ssv6xxx_sdio_remove(struct sdio_func *func)
+#endif
+{
+    struct ssv6xxx_sdio_glue *glue = sdio_get_drvdata(func);
+    struct ssv6xxx_platform_data *pwlan_data = &wlan_data;
+    printk("ssv6xxx_sdio_remove..........\n");
+    ssv6xxx_sdio_status = 0;
+    if ( glue )
+    {
+        printk("ssv6xxx_sdio_remove - ssv6xxx_sdio_irq_disable\n");
+        ssv6xxx_sdio_irq_disable(&glue->core->dev,false);
+        glue->dev_ready = false;
+#if 0
+        ssv6xxx_dev_remove(glue->dev);
+#endif
+        ssv6xxx_low_sdio_clk(func);
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+  if(glue->dmaSkb != NULL)
+         dev_kfree_skb(glue->dmaSkb);
+#endif
+        printk("ssv6xxx_sdio_remove - disable mask\n");
+        ssv6xxx_sdio_irq_setmask(&glue->core->dev,0xff);
+#ifdef CONFIG_PM
+        ssv6xxx_sdio_trigger_pmu(glue->dev);
+        if(glue->cmd_skb != NULL)
+            dev_kfree_skb(glue->cmd_skb);
+#endif
+        ssv6xxx_sdio_power_off(pwlan_data, func);
+        printk("platform_device_del \n");
+        platform_device_del(glue->core);
+        printk("platform_device_put \n");
+        platform_device_put(glue->core);
+        kfree(glue);
+    }
+    sdio_set_drvdata(func, NULL);
+    printk("ssv6xxx_sdio_remove leave..........\n");
+}
+#ifdef CONFIG_PM
+static int ssv6xxx_sdio_trigger_pmu(struct device *dev)
+{
+    struct sdio_func *func = dev_to_sdio_func(dev);
+    struct ssv6xxx_sdio_glue *glue = sdio_get_drvdata(func);
+    struct cfg_host_cmd *host_cmd;
+    int writesize;
+    int ret = 0;
+    void *tempPointer;
+#ifdef SSV_WAKEUP_HOST
+    if(ssv6xxx_sdio_write_reg(dev, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8)));
+    if(ssv6xxx_sdio_write_reg(dev, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8)));
+    if(ssv6xxx_sdio_write_reg(dev, ADR_MRX_FLT_TB0+6*4, (sc->mac_deci_tbl[6]|1)));
+#else
+    if(ssv6xxx_sdio_write_reg(dev, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4)));
+    if(ssv6xxx_sdio_write_reg(dev, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4)));
+    if(ssv6xxx_sdio_write_reg(dev, ADR_RX_FLOW_CTRL, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4)));
+#endif
+    host_cmd = (struct cfg_host_cmd *)glue->cmd_skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->RSVD0 = 0;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_PS;
+    host_cmd->len = sizeof(struct cfg_host_cmd);
+#ifdef SSV_WAKEUP_HOST
+    host_cmd->dummy = sc->ps_aid;
+#else
+ host_cmd->dummy = 0;
+#endif
+    {
+        tempPointer = glue->cmd_skb->data;
+        sdio_claim_host(func);
+        writesize = sdio_align_size(func,sizeof(struct cfg_host_cmd));
+        do
+        {
+            ret = sdio_memcpy_toio(func, glue->dataIOPort, tempPointer, writesize);
+            if ( ret == -EILSEQ || ret == -ETIMEDOUT )
+            {
+                ret = -1;
+                break;
+            }
+            else
+            {
+                if(ret)
+                    dev_err(glue->dev,"Unexpected return value ret=[%d]\n",ret);
+            }
+        }
+        while( ret == -EILSEQ || ret == -ETIMEDOUT);
+        sdio_release_host(func);
+        if (ret)
+            dev_err(glue->dev, "sdio write failed (%d)\n", ret);
+    }
+    return ret;
+}
+static void ssv6xxx_sdio_reset(struct device *child)
+{
+ struct ssv6xxx_sdio_glue *glue = dev_get_drvdata(child->parent);
+ struct sdio_func *func = dev_to_sdio_func(glue->dev);
+ printk("%s\n", __FUNCTION__);
+ if(glue == NULL || glue->dev == NULL || func == NULL)
+  return;
+    ssv6xxx_sdio_trigger_pmu(glue->dev);
+ ssv6xxx_do_sdio_wakeup( func);
+}
+#ifdef AML_WIFI_MAC
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int is_on);
+#endif
+static int ssv6xxx_sdio_suspend(struct device *dev)
+{
+    struct sdio_func *func = dev_to_sdio_func(dev);
+     mmc_pm_flag_t flags = sdio_get_host_pm_caps(func);
+#ifdef AML_WIFI_MAC
+    if (!(flags & MMC_PM_KEEP_POWER) || sdio_sr_bhvr == SUSPEND_RESUME_1) {
+        printk("%s : module will not get power support during suspend. %u\n", __func__, sdio_sr_bhvr);
+        ssv6xxx_deinit_prepare();
+        ssv6xxx_sdio_remove(func);
+        mdelay(100);
+        extern_wifi_set_enable(0);
+        mdelay(10);
+        return 0;
+    }else
+#endif
+    {
+        int ret = 0;
+        dev_info(dev, "%s: suspend: PM flags = 0x%x\n",
+                 sdio_func_id(func), flags);
+     ssv6xxx_low_sdio_clk(func);
+        ret = ssv6xxx_sdio_trigger_pmu(dev);
+        if (ret)
+            printk("ssv6xxx_sdio_trigger_pmu fail!!\n");
+        if (!(flags & MMC_PM_KEEP_POWER))
+        {
+         dev_err(dev, "%s: cannot remain alive while host is suspended\n",
+                    sdio_func_id(func));
+        }
+        ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
+        if (ret)
+         return ret;
+        mdelay(10);
+#ifdef SSV_WAKEUP_HOST
+        ret = sdio_set_host_pm_flags(func, MMC_PM_WAKE_SDIO_IRQ);
+#endif
+#if 0
+        if (softc->wow_enabled)
+        {
+            sdio_flags = sdio_get_host_pm_caps(func);
+            if (!(sdio_flags & MMC_PM_KEEP_POWER))
+            {
+                dev_err(dev, "can't keep power while host "
+                        "is suspended\n");
+                ret = -EINVAL;
+                goto out;
+            }
+            ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
+            if (ret)
+            {
+                dev_err(dev, "error while trying to keep power\n");
+                goto out;
+            }
+        }else{
+            ssv6xxx_sdio_irq_disable(&glue->core->dev,true);
+        }
+#endif
+        return ret;
+    }
+}
+static int ssv6xxx_sdio_resume(struct device *dev)
+{
+ struct sdio_func *func = dev_to_sdio_func(dev);
+#ifdef AML_WIFI_MAC
+    mmc_pm_flag_t flags = sdio_get_host_pm_caps(func);
+	mdelay(100);
+    if (!(flags & MMC_PM_KEEP_POWER) || sdio_sr_bhvr == SUSPEND_RESUME_1) {
+        printk("%s : module is reset, run probe now !! %u\n", __func__, sdio_sr_bhvr);
+        extern_wifi_set_enable(1);
+        mdelay(100);
+        sdio_reinit();
+        mdelay(150);
+        ssv6xxx_sdio_probe(func, NULL);
+        return 0;
+    }else
+#endif
+ {
+     printk("ssv6xxx_sdio_resume\n");
+     {
+      ssv6xxx_do_sdio_wakeup(func);
+            mdelay(10);
+      ssv6xxx_high_sdio_clk(func);
+            mdelay(10);
+     }
+    }
+    return 0;
+}
+static const struct dev_pm_ops ssv6xxx_sdio_pm_ops =
+{
+    .suspend = ssv6xxx_sdio_suspend,
+    .resume = ssv6xxx_sdio_resume,
+};
+#endif
+
+
+#ifdef AML_WIFI_MAC
+static void ssv6xxx_sdio_shutdown(struct device *dev)
+{
+	struct sdio_func *func = dev_to_sdio_func(dev);
+	printk("%s  shutdown_flags:%d \n", __func__,shutdown_flags);
+	switch(shutdown_flags){
+		case SSV_SYS_REBOOT :
+		case SSV_SYS_HALF:
+				printk("%s ,system reboot  ..\n", __func__);
+				break;
+		case SSV_SYS_POWER_OFF :
+				printk("%s ,system shutdown .. \n", __func__);
+				ssv6xxx_deinit_prepare();
+				ssv6xxx_sdio_remove(func);
+				mdelay(100);
+				extern_wifi_set_enable(0);
+				mdelay(100);
+				break;
+		default:
+			printk("%s,unknown event code ..", __func__);
+	}
+
+}
+
+static int ssv6xxx_reboot_notify(struct notifier_block *nb,
+			       unsigned long event, void *p)
+{
+
+	printk("%s, code = %ld \n",__FUNCTION__,event);
+	switch (event){
+		case SYS_DOWN:
+			shutdown_flags = SYS_DOWN;
+			break;
+		case SYS_HALT:
+			shutdown_flags = SYS_HALT;
+			break;
+		case SYS_POWER_OFF:
+			shutdown_flags = SYS_POWER_OFF;
+			break;
+		default:
+			shutdown_flags = event;
+			break;
+	}
+	return NOTIFY_DONE;
+}
+static struct notifier_block ssv6xxx_reboot_notifier = {
+	.notifier_call = ssv6xxx_reboot_notify,
+	.next = NULL,
+	.priority = 0,
+};
+#endif
+
+struct sdio_driver ssv6xxx_sdio_driver =
+{
+    .name = "SSV6XXX_SDIO",
+    .id_table = ssv6xxx_sdio_devices,
+    .probe = ssv6xxx_sdio_probe,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    .remove = __devexit_p(ssv6xxx_sdio_remove),
+#else
+    .remove = ssv6xxx_sdio_remove,
+#endif
+#ifdef CONFIG_PM
+    .drv = {
+        .pm = &ssv6xxx_sdio_pm_ops, 
+#ifdef AML_WIFI_MAC
+	.shutdown = ssv6xxx_sdio_shutdown,
+#endif
+    },
+#endif
+};
+EXPORT_SYMBOL(ssv6xxx_sdio_driver);
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+int ssv6xxx_sdio_init(void)
+#else
+static int __init ssv6xxx_sdio_init(void)
+#endif
+{
+    printk(KERN_INFO "ssv6xxx_sdio_init\n");
+#ifdef AML_WIFI_MAC
+	register_reboot_notifier(&ssv6xxx_reboot_notifier);
+#endif
+    return sdio_register_driver(&ssv6xxx_sdio_driver);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+void ssv6xxx_sdio_exit(void)
+#else
+static void __exit ssv6xxx_sdio_exit(void)
+#endif
+{
+    printk(KERN_INFO "ssv6xxx_sdio_exit\n");
+#ifdef AML_WIFI_MAC
+	unregister_reboot_notifier(&ssv6xxx_reboot_notifier);
+#endif 
+    sdio_unregister_driver(&ssv6xxx_sdio_driver);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ssv6xxx_sdio_init);
+EXPORT_SYMBOL(ssv6xxx_sdio_exit);
+#else
+module_init(ssv6xxx_sdio_init);
+module_exit(ssv6xxx_sdio_exit);
+#endif
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio_def.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio_def.h
new file mode 100644
index 0000000000000..20b82229bdfad
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/sdio_def.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SDIO_DEF_H_
+#define _SDIO_DEF_H_ 
+#include <linux/scatterlist.h>
+#define BASE_SDIO 0
+#define REG_DATA_IO_PORT_0 (BASE_SDIO + 0x00)
+#define REG_DATA_IO_PORT_1 (BASE_SDIO + 0x01)
+#define REG_DATA_IO_PORT_2 (BASE_SDIO + 0x02)
+#define REG_INT_MASK (BASE_SDIO + 0x04)
+#define REG_INT_STATUS (BASE_SDIO + 0x08)
+#define REG_INT_TRIGGER (BASE_SDIO + 0x09)
+#define REG_Fn1_STATUS (BASE_SDIO + 0x0c)
+#define REG_CARD_PKT_LEN_0 (BASE_SDIO + 0x10)
+#define REG_CARD_PKT_LEN_1 (BASE_SDIO + 0x11)
+#define REG_CARD_FW_DL_STATUS (BASE_SDIO + 0x12)
+#define REG_CARD_SELF_TEST (BASE_SDIO + 0x13)
+#define REG_CARD_RCA_0 (BASE_SDIO + 0x20)
+#define REG_CARD_RCA_1 (BASE_SDIO + 0x21)
+#define REG_SDIO_FIFO_WR_THLD_0 (BASE_SDIO + 0x24)
+#define REG_SDIO_FIFO_WR_THLD_1 (BASE_SDIO + 0x25)
+#define REG_OUTPUT_TIMING_REG (BASE_SDIO + 0x55)
+#define REG_PMU_WAKEUP (BASE_SDIO + 0x67)
+#define REG_REG_IO_PORT_0 (BASE_SDIO + 0x70)
+#define REG_REG_IO_PORT_1 (BASE_SDIO + 0x71)
+#define REG_REG_IO_PORT_2 (BASE_SDIO + 0x72)
+#define REG_SDIO_TX_ALLOC_SIZE (BASE_SDIO + 0x98)
+#define REG_SDIO_TX_ALLOC_SHIFT (BASE_SDIO + 0x99)
+#define REG_SDIO_TX_ALLOC_STATE (BASE_SDIO + 0x9a)
+#define REG_SDIO_TX_INFORM_0 (BASE_SDIO + 0x9c)
+#define REG_SDIO_TX_INFORM_1 (BASE_SDIO + 0x9d)
+#define REG_SDIO_TX_INFORM_2 (BASE_SDIO + 0x9e)
+#if 0
+#define SDIO_TX_ALLOC_SUCCESS 0x01
+#define SDIO_TX_NO_ALLOC 0x02
+#define SDIO_TX_DULPICATE_ALLOC 0x04
+#define SDIO_TX_TX_DONE 0x08
+#define SDIO_TX_AHB_HANG 0x10
+#define SDIO_TX_MB_FULL 0x80
+#define SDIO_HCI_IN_QUEUE_EMPTY 0x04
+#define SDIO_EDCA0_SHIFT 4
+#define SDIO_TX_ALLOC_SIZE_SHIFT 0x07
+#define SDIO_TX_ALLOC_ENABLE 0x10
+#endif
+#define SDIO_DEF_BLOCK_SIZE 0x80
+#if (SDIO_DEF_BLOCK_SIZE % 8)
+#error Wrong SDIO_DEF_BLOCK_SIZE value!! Should be the multiple of 8 bytes!!!!!!!!!!!!!!!!!!!!!!
+#endif
+#define SDIO_DEF_OUTPUT_TIMING 0
+#define SDIO_DEF_BLOCK_MODE_THRD 128
+#if (SDIO_DEF_BLOCK_MODE_THRD % 8)
+#error Wrong SDIO_DEF_BLOCK_MODE_THRD value!! Should be the multiple of 8 bytes!!!!!!!!!!!!!!!!!!!!!!
+#endif
+#define SDIO_DEF_FORCE_BLOCK_MODE 0
+#define MAX_SCATTER_ENTRIES_PER_REQ 8
+struct sdio_scatter_item {
+ u8 *buf;
+ int len;
+};
+struct sdio_scatter_req {
+ u32 req;
+ u32 len;
+ int scat_entries;
+ struct sdio_scatter_item scat_list[MAX_SCATTER_ENTRIES_PER_REQ];
+ struct scatterlist sgentries[MAX_SCATTER_ENTRIES_PER_REQ];
+};
+#define SDIO_READ 0x00000001
+#define SDIO_WRITE 0x00000002
+#define CMD53_ARG_READ 0
+#define CMD53_ARG_WRITE 1
+#define CMD53_ARG_BLOCK_BASIS 1
+#define CMD53_ARG_FIXED_ADDRESS 0
+#define CMD53_ARG_INCR_ADDRESS 1
+#ifdef CONFIG_FW_ALIGNMENT_CHECK
+#define SDIO_DMA_BUFFER_LEN 2048
+#endif
+#ifdef CONFIG_PM
+#define SDIO_COMMAND_BUFFER_LEN 256
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/cabrio.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/cabrio.h
new file mode 100644
index 0000000000000..e73f3955ef6b6
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/cabrio.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef CABRIO_H
+#define CABRIO_H 
+#define SSV_VENDOR_ID 0x3030
+#define SSV_CABRIO_DEVID 0x3030
+#define SSV_SUBVENDOR_ID_NOG 0x0e11
+#define SSV_SUBVENDOR_ID_NEW_A 0x7065
+#define SSV_CABRIO_MAGIC 0x19641014
+#define SSV_AMPDU_LIMIT_MAX (64 * 1024 - 1)
+#define SSV_DEFAULT_NOISE_FLOOR -95
+#define SSVCABRIO_RSSI_BAD -128
+#define SSVCABRIO_NUM_CHANNELS 38
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200.h
new file mode 100644
index 0000000000000..6d472f845216f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV6200_H_
+#define _SSV6200_H_ 
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <net/mac80211.h>
+#ifdef ECLIPSE
+#include <ssv_mod_conf.h>
+#endif
+#include <ssv6200_reg.h>
+#include <ssv6200_aux.h>
+#include <hwif/hwif.h>
+#include <hci/ssv_hci.h>
+#include "ssv6200_common.h"
+#ifdef SSV6200_ECO
+#define SSV6200_TOTAL_ID 128
+#ifndef HUW_DRV
+#define SSV6200_ID_TX_THRESHOLD 19
+#define SSV6200_ID_RX_THRESHOLD 60
+#define SSV6200_PAGE_TX_THRESHOLD 115
+#define SSV6200_PAGE_RX_THRESHOLD 115
+#define SSV6XXX_AMPDU_DIVIDER (2)
+#define SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER (SSV6200_PAGE_TX_THRESHOLD - (SSV6200_PAGE_TX_THRESHOLD/SSV6XXX_AMPDU_DIVIDER))
+#define SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER 2
+#else
+#undef SSV6200_ID_TX_THRESHOLD
+#undef SSV6200_ID_RX_THRESHOLD
+#undef SSV6200_PAGE_TX_THRESHOLD
+#undef SSV6200_PAGE_RX_THRESHOLD
+#undef SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER
+#undef SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER
+#define SSV6200_ID_TX_THRESHOLD 31
+#define SSV6200_ID_RX_THRESHOLD 31
+#define SSV6200_PAGE_TX_THRESHOLD 61
+#define SSV6200_PAGE_RX_THRESHOLD 61
+#define SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER 45
+#define SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER 2
+#endif
+#else
+#undef SSV6200_ID_TX_THRESHOLD
+#undef SSV6200_ID_RX_THRESHOLD
+#undef SSV6200_PAGE_TX_THRESHOLD
+#undef SSV6200_PAGE_RX_THRESHOLD
+#undef SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER
+#undef SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER
+#define SSV6200_ID_TX_THRESHOLD 63
+#define SSV6200_ID_RX_THRESHOLD 63
+#ifdef PREFER_RX
+#define SSV6200_PAGE_TX_THRESHOLD (126-24)
+#define SSV6200_PAGE_RX_THRESHOLD (126+24)
+#else
+#undef SSV6200_PAGE_TX_THRESHOLD
+#undef SSV6200_PAGE_RX_THRESHOLD
+#define SSV6200_PAGE_TX_THRESHOLD 126
+#define SSV6200_PAGE_RX_THRESHOLD 126
+#endif
+#define SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER (SSV6200_PAGE_TX_THRESHOLD/2)
+#define SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER 2
+#endif
+#define SSV6200_ID_NUMBER (128)
+#define PACKET_ADDR_2_ID(addr) ((addr >> 16) & 0x7F)
+#define SSV6200_ID_AC_RESERVED 1
+#define SSV6200_ID_AC_BK_OUT_QUEUE 8
+#define SSV6200_ID_AC_BE_OUT_QUEUE 15
+#define SSV6200_ID_AC_VI_OUT_QUEUE 16
+#define SSV6200_ID_AC_VO_OUT_QUEUE 16
+#define SSV6200_ID_MANAGER_QUEUE 8
+#define HW_MMU_PAGE_SHIFT 0x8
+#define HW_MMU_PAGE_MASK 0xff
+#define SSV6200_BT_PRI_SMP_TIME 0
+#define SSV6200_BT_STA_SMP_TIME (SSV6200_BT_PRI_SMP_TIME+0)
+#define SSV6200_WLAN_REMAIN_TIME 0
+#define BT_2WIRE_EN_MSK 0x00000400
+struct txResourceControl {
+    u32 txUsePage:8;
+    u32 txUseID:6;
+    u32 edca0:4;
+    u32 edca1:4;
+    u32 edca2:5;
+    u32 edca3:5;
+};
+#include <ssv_cfg.h>
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_aux.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_aux.h
new file mode 100644
index 0000000000000..03ec3f07d3300
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_aux.h
@@ -0,0 +1,18221 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define MCU_ENABLE_MSK 0x00000001
+#define MCU_ENABLE_I_MSK 0xfffffffe
+#define MCU_ENABLE_SFT 0
+#define MCU_ENABLE_HI 0
+#define MCU_ENABLE_SZ 1
+#define MAC_SW_RST_MSK 0x00000002
+#define MAC_SW_RST_I_MSK 0xfffffffd
+#define MAC_SW_RST_SFT 1
+#define MAC_SW_RST_HI 1
+#define MAC_SW_RST_SZ 1
+#define MCU_SW_RST_MSK 0x00000004
+#define MCU_SW_RST_I_MSK 0xfffffffb
+#define MCU_SW_RST_SFT 2
+#define MCU_SW_RST_HI 2
+#define MCU_SW_RST_SZ 1
+#define SDIO_SW_RST_MSK 0x00000008
+#define SDIO_SW_RST_I_MSK 0xfffffff7
+#define SDIO_SW_RST_SFT 3
+#define SDIO_SW_RST_HI 3
+#define SDIO_SW_RST_SZ 1
+#define SPI_SLV_SW_RST_MSK 0x00000010
+#define SPI_SLV_SW_RST_I_MSK 0xffffffef
+#define SPI_SLV_SW_RST_SFT 4
+#define SPI_SLV_SW_RST_HI 4
+#define SPI_SLV_SW_RST_SZ 1
+#define UART_SW_RST_MSK 0x00000020
+#define UART_SW_RST_I_MSK 0xffffffdf
+#define UART_SW_RST_SFT 5
+#define UART_SW_RST_HI 5
+#define UART_SW_RST_SZ 1
+#define DMA_SW_RST_MSK 0x00000040
+#define DMA_SW_RST_I_MSK 0xffffffbf
+#define DMA_SW_RST_SFT 6
+#define DMA_SW_RST_HI 6
+#define DMA_SW_RST_SZ 1
+#define WDT_SW_RST_MSK 0x00000080
+#define WDT_SW_RST_I_MSK 0xffffff7f
+#define WDT_SW_RST_SFT 7
+#define WDT_SW_RST_HI 7
+#define WDT_SW_RST_SZ 1
+#define I2C_SLV_SW_RST_MSK 0x00000100
+#define I2C_SLV_SW_RST_I_MSK 0xfffffeff
+#define I2C_SLV_SW_RST_SFT 8
+#define I2C_SLV_SW_RST_HI 8
+#define I2C_SLV_SW_RST_SZ 1
+#define INT_CTL_SW_RST_MSK 0x00000200
+#define INT_CTL_SW_RST_I_MSK 0xfffffdff
+#define INT_CTL_SW_RST_SFT 9
+#define INT_CTL_SW_RST_HI 9
+#define INT_CTL_SW_RST_SZ 1
+#define BTCX_SW_RST_MSK 0x00000400
+#define BTCX_SW_RST_I_MSK 0xfffffbff
+#define BTCX_SW_RST_SFT 10
+#define BTCX_SW_RST_HI 10
+#define BTCX_SW_RST_SZ 1
+#define GPIO_SW_RST_MSK 0x00000800
+#define GPIO_SW_RST_I_MSK 0xfffff7ff
+#define GPIO_SW_RST_SFT 11
+#define GPIO_SW_RST_HI 11
+#define GPIO_SW_RST_SZ 1
+#define US0TMR_SW_RST_MSK 0x00001000
+#define US0TMR_SW_RST_I_MSK 0xffffefff
+#define US0TMR_SW_RST_SFT 12
+#define US0TMR_SW_RST_HI 12
+#define US0TMR_SW_RST_SZ 1
+#define US1TMR_SW_RST_MSK 0x00002000
+#define US1TMR_SW_RST_I_MSK 0xffffdfff
+#define US1TMR_SW_RST_SFT 13
+#define US1TMR_SW_RST_HI 13
+#define US1TMR_SW_RST_SZ 1
+#define US2TMR_SW_RST_MSK 0x00004000
+#define US2TMR_SW_RST_I_MSK 0xffffbfff
+#define US2TMR_SW_RST_SFT 14
+#define US2TMR_SW_RST_HI 14
+#define US2TMR_SW_RST_SZ 1
+#define US3TMR_SW_RST_MSK 0x00008000
+#define US3TMR_SW_RST_I_MSK 0xffff7fff
+#define US3TMR_SW_RST_SFT 15
+#define US3TMR_SW_RST_HI 15
+#define US3TMR_SW_RST_SZ 1
+#define MS0TMR_SW_RST_MSK 0x00010000
+#define MS0TMR_SW_RST_I_MSK 0xfffeffff
+#define MS0TMR_SW_RST_SFT 16
+#define MS0TMR_SW_RST_HI 16
+#define MS0TMR_SW_RST_SZ 1
+#define MS1TMR_SW_RST_MSK 0x00020000
+#define MS1TMR_SW_RST_I_MSK 0xfffdffff
+#define MS1TMR_SW_RST_SFT 17
+#define MS1TMR_SW_RST_HI 17
+#define MS1TMR_SW_RST_SZ 1
+#define MS2TMR_SW_RST_MSK 0x00040000
+#define MS2TMR_SW_RST_I_MSK 0xfffbffff
+#define MS2TMR_SW_RST_SFT 18
+#define MS2TMR_SW_RST_HI 18
+#define MS2TMR_SW_RST_SZ 1
+#define MS3TMR_SW_RST_MSK 0x00080000
+#define MS3TMR_SW_RST_I_MSK 0xfff7ffff
+#define MS3TMR_SW_RST_SFT 19
+#define MS3TMR_SW_RST_HI 19
+#define MS3TMR_SW_RST_SZ 1
+#define RF_BB_SW_RST_MSK 0x00100000
+#define RF_BB_SW_RST_I_MSK 0xffefffff
+#define RF_BB_SW_RST_SFT 20
+#define RF_BB_SW_RST_HI 20
+#define RF_BB_SW_RST_SZ 1
+#define SYS_ALL_RST_MSK 0x00200000
+#define SYS_ALL_RST_I_MSK 0xffdfffff
+#define SYS_ALL_RST_SFT 21
+#define SYS_ALL_RST_HI 21
+#define SYS_ALL_RST_SZ 1
+#define DAT_UART_SW_RST_MSK 0x00400000
+#define DAT_UART_SW_RST_I_MSK 0xffbfffff
+#define DAT_UART_SW_RST_SFT 22
+#define DAT_UART_SW_RST_HI 22
+#define DAT_UART_SW_RST_SZ 1
+#define I2C_MST_SW_RST_MSK 0x00800000
+#define I2C_MST_SW_RST_I_MSK 0xff7fffff
+#define I2C_MST_SW_RST_SFT 23
+#define I2C_MST_SW_RST_HI 23
+#define I2C_MST_SW_RST_SZ 1
+#define RG_REBOOT_MSK 0x00000001
+#define RG_REBOOT_I_MSK 0xfffffffe
+#define RG_REBOOT_SFT 0
+#define RG_REBOOT_HI 0
+#define RG_REBOOT_SZ 1
+#define TRAP_IMG_FLS_MSK 0x00010000
+#define TRAP_IMG_FLS_I_MSK 0xfffeffff
+#define TRAP_IMG_FLS_SFT 16
+#define TRAP_IMG_FLS_HI 16
+#define TRAP_IMG_FLS_SZ 1
+#define TRAP_REBOOT_MSK 0x00020000
+#define TRAP_REBOOT_I_MSK 0xfffdffff
+#define TRAP_REBOOT_SFT 17
+#define TRAP_REBOOT_HI 17
+#define TRAP_REBOOT_SZ 1
+#define TRAP_BOOT_FLS_MSK 0x00040000
+#define TRAP_BOOT_FLS_I_MSK 0xfffbffff
+#define TRAP_BOOT_FLS_SFT 18
+#define TRAP_BOOT_FLS_HI 18
+#define TRAP_BOOT_FLS_SZ 1
+#define CHIP_ID_31_0_MSK 0xffffffff
+#define CHIP_ID_31_0_I_MSK 0x00000000
+#define CHIP_ID_31_0_SFT 0
+#define CHIP_ID_31_0_HI 31
+#define CHIP_ID_31_0_SZ 32
+#define CHIP_ID_63_32_MSK 0xffffffff
+#define CHIP_ID_63_32_I_MSK 0x00000000
+#define CHIP_ID_63_32_SFT 0
+#define CHIP_ID_63_32_HI 31
+#define CHIP_ID_63_32_SZ 32
+#define CHIP_ID_95_64_MSK 0xffffffff
+#define CHIP_ID_95_64_I_MSK 0x00000000
+#define CHIP_ID_95_64_SFT 0
+#define CHIP_ID_95_64_HI 31
+#define CHIP_ID_95_64_SZ 32
+#define CHIP_ID_127_96_MSK 0xffffffff
+#define CHIP_ID_127_96_I_MSK 0x00000000
+#define CHIP_ID_127_96_SFT 0
+#define CHIP_ID_127_96_HI 31
+#define CHIP_ID_127_96_SZ 32
+#define CK_SEL_1_0_MSK 0x00000003
+#define CK_SEL_1_0_I_MSK 0xfffffffc
+#define CK_SEL_1_0_SFT 0
+#define CK_SEL_1_0_HI 1
+#define CK_SEL_1_0_SZ 2
+#define CK_SEL_2_MSK 0x00000004
+#define CK_SEL_2_I_MSK 0xfffffffb
+#define CK_SEL_2_SFT 2
+#define CK_SEL_2_HI 2
+#define CK_SEL_2_SZ 1
+#define SYS_CLK_EN_MSK 0x00000001
+#define SYS_CLK_EN_I_MSK 0xfffffffe
+#define SYS_CLK_EN_SFT 0
+#define SYS_CLK_EN_HI 0
+#define SYS_CLK_EN_SZ 1
+#define MAC_CLK_EN_MSK 0x00000002
+#define MAC_CLK_EN_I_MSK 0xfffffffd
+#define MAC_CLK_EN_SFT 1
+#define MAC_CLK_EN_HI 1
+#define MAC_CLK_EN_SZ 1
+#define MCU_CLK_EN_MSK 0x00000004
+#define MCU_CLK_EN_I_MSK 0xfffffffb
+#define MCU_CLK_EN_SFT 2
+#define MCU_CLK_EN_HI 2
+#define MCU_CLK_EN_SZ 1
+#define SDIO_CLK_EN_MSK 0x00000008
+#define SDIO_CLK_EN_I_MSK 0xfffffff7
+#define SDIO_CLK_EN_SFT 3
+#define SDIO_CLK_EN_HI 3
+#define SDIO_CLK_EN_SZ 1
+#define SPI_SLV_CLK_EN_MSK 0x00000010
+#define SPI_SLV_CLK_EN_I_MSK 0xffffffef
+#define SPI_SLV_CLK_EN_SFT 4
+#define SPI_SLV_CLK_EN_HI 4
+#define SPI_SLV_CLK_EN_SZ 1
+#define UART_CLK_EN_MSK 0x00000020
+#define UART_CLK_EN_I_MSK 0xffffffdf
+#define UART_CLK_EN_SFT 5
+#define UART_CLK_EN_HI 5
+#define UART_CLK_EN_SZ 1
+#define DMA_CLK_EN_MSK 0x00000040
+#define DMA_CLK_EN_I_MSK 0xffffffbf
+#define DMA_CLK_EN_SFT 6
+#define DMA_CLK_EN_HI 6
+#define DMA_CLK_EN_SZ 1
+#define WDT_CLK_EN_MSK 0x00000080
+#define WDT_CLK_EN_I_MSK 0xffffff7f
+#define WDT_CLK_EN_SFT 7
+#define WDT_CLK_EN_HI 7
+#define WDT_CLK_EN_SZ 1
+#define I2C_SLV_CLK_EN_MSK 0x00000100
+#define I2C_SLV_CLK_EN_I_MSK 0xfffffeff
+#define I2C_SLV_CLK_EN_SFT 8
+#define I2C_SLV_CLK_EN_HI 8
+#define I2C_SLV_CLK_EN_SZ 1
+#define INT_CTL_CLK_EN_MSK 0x00000200
+#define INT_CTL_CLK_EN_I_MSK 0xfffffdff
+#define INT_CTL_CLK_EN_SFT 9
+#define INT_CTL_CLK_EN_HI 9
+#define INT_CTL_CLK_EN_SZ 1
+#define BTCX_CLK_EN_MSK 0x00000400
+#define BTCX_CLK_EN_I_MSK 0xfffffbff
+#define BTCX_CLK_EN_SFT 10
+#define BTCX_CLK_EN_HI 10
+#define BTCX_CLK_EN_SZ 1
+#define GPIO_CLK_EN_MSK 0x00000800
+#define GPIO_CLK_EN_I_MSK 0xfffff7ff
+#define GPIO_CLK_EN_SFT 11
+#define GPIO_CLK_EN_HI 11
+#define GPIO_CLK_EN_SZ 1
+#define US0TMR_CLK_EN_MSK 0x00001000
+#define US0TMR_CLK_EN_I_MSK 0xffffefff
+#define US0TMR_CLK_EN_SFT 12
+#define US0TMR_CLK_EN_HI 12
+#define US0TMR_CLK_EN_SZ 1
+#define US1TMR_CLK_EN_MSK 0x00002000
+#define US1TMR_CLK_EN_I_MSK 0xffffdfff
+#define US1TMR_CLK_EN_SFT 13
+#define US1TMR_CLK_EN_HI 13
+#define US1TMR_CLK_EN_SZ 1
+#define US2TMR_CLK_EN_MSK 0x00004000
+#define US2TMR_CLK_EN_I_MSK 0xffffbfff
+#define US2TMR_CLK_EN_SFT 14
+#define US2TMR_CLK_EN_HI 14
+#define US2TMR_CLK_EN_SZ 1
+#define US3TMR_CLK_EN_MSK 0x00008000
+#define US3TMR_CLK_EN_I_MSK 0xffff7fff
+#define US3TMR_CLK_EN_SFT 15
+#define US3TMR_CLK_EN_HI 15
+#define US3TMR_CLK_EN_SZ 1
+#define MS0TMR_CLK_EN_MSK 0x00010000
+#define MS0TMR_CLK_EN_I_MSK 0xfffeffff
+#define MS0TMR_CLK_EN_SFT 16
+#define MS0TMR_CLK_EN_HI 16
+#define MS0TMR_CLK_EN_SZ 1
+#define MS1TMR_CLK_EN_MSK 0x00020000
+#define MS1TMR_CLK_EN_I_MSK 0xfffdffff
+#define MS1TMR_CLK_EN_SFT 17
+#define MS1TMR_CLK_EN_HI 17
+#define MS1TMR_CLK_EN_SZ 1
+#define MS2TMR_CLK_EN_MSK 0x00040000
+#define MS2TMR_CLK_EN_I_MSK 0xfffbffff
+#define MS2TMR_CLK_EN_SFT 18
+#define MS2TMR_CLK_EN_HI 18
+#define MS2TMR_CLK_EN_SZ 1
+#define MS3TMR_CLK_EN_MSK 0x00080000
+#define MS3TMR_CLK_EN_I_MSK 0xfff7ffff
+#define MS3TMR_CLK_EN_SFT 19
+#define MS3TMR_CLK_EN_HI 19
+#define MS3TMR_CLK_EN_SZ 1
+#define BIST_CLK_EN_MSK 0x00100000
+#define BIST_CLK_EN_I_MSK 0xffefffff
+#define BIST_CLK_EN_SFT 20
+#define BIST_CLK_EN_HI 20
+#define BIST_CLK_EN_SZ 1
+#define I2C_MST_CLK_EN_MSK 0x00800000
+#define I2C_MST_CLK_EN_I_MSK 0xff7fffff
+#define I2C_MST_CLK_EN_SFT 23
+#define I2C_MST_CLK_EN_HI 23
+#define I2C_MST_CLK_EN_SZ 1
+#define BTCX_CSR_CLK_EN_MSK 0x00000400
+#define BTCX_CSR_CLK_EN_I_MSK 0xfffffbff
+#define BTCX_CSR_CLK_EN_SFT 10
+#define BTCX_CSR_CLK_EN_HI 10
+#define BTCX_CSR_CLK_EN_SZ 1
+#define MCU_DBG_SEL_MSK 0x0000003f
+#define MCU_DBG_SEL_I_MSK 0xffffffc0
+#define MCU_DBG_SEL_SFT 0
+#define MCU_DBG_SEL_HI 5
+#define MCU_DBG_SEL_SZ 6
+#define MCU_STOP_NOGRANT_MSK 0x00000100
+#define MCU_STOP_NOGRANT_I_MSK 0xfffffeff
+#define MCU_STOP_NOGRANT_SFT 8
+#define MCU_STOP_NOGRANT_HI 8
+#define MCU_STOP_NOGRANT_SZ 1
+#define MCU_STOP_ANYTIME_MSK 0x00000200
+#define MCU_STOP_ANYTIME_I_MSK 0xfffffdff
+#define MCU_STOP_ANYTIME_SFT 9
+#define MCU_STOP_ANYTIME_HI 9
+#define MCU_STOP_ANYTIME_SZ 1
+#define MCU_DBG_DATA_MSK 0xffffffff
+#define MCU_DBG_DATA_I_MSK 0x00000000
+#define MCU_DBG_DATA_SFT 0
+#define MCU_DBG_DATA_HI 31
+#define MCU_DBG_DATA_SZ 32
+#define AHB_SW_RST_MSK 0x00000001
+#define AHB_SW_RST_I_MSK 0xfffffffe
+#define AHB_SW_RST_SFT 0
+#define AHB_SW_RST_HI 0
+#define AHB_SW_RST_SZ 1
+#define AHB_ERR_RST_MSK 0x00000002
+#define AHB_ERR_RST_I_MSK 0xfffffffd
+#define AHB_ERR_RST_SFT 1
+#define AHB_ERR_RST_HI 1
+#define AHB_ERR_RST_SZ 1
+#define REG_AHB_DEBUG_MX_MSK 0x00000030
+#define REG_AHB_DEBUG_MX_I_MSK 0xffffffcf
+#define REG_AHB_DEBUG_MX_SFT 4
+#define REG_AHB_DEBUG_MX_HI 5
+#define REG_AHB_DEBUG_MX_SZ 2
+#define REG_PKT_W_NBRT_MSK 0x00000100
+#define REG_PKT_W_NBRT_I_MSK 0xfffffeff
+#define REG_PKT_W_NBRT_SFT 8
+#define REG_PKT_W_NBRT_HI 8
+#define REG_PKT_W_NBRT_SZ 1
+#define REG_PKT_R_NBRT_MSK 0x00000200
+#define REG_PKT_R_NBRT_I_MSK 0xfffffdff
+#define REG_PKT_R_NBRT_SFT 9
+#define REG_PKT_R_NBRT_HI 9
+#define REG_PKT_R_NBRT_SZ 1
+#define IQ_SRAM_SEL_0_MSK 0x00001000
+#define IQ_SRAM_SEL_0_I_MSK 0xffffefff
+#define IQ_SRAM_SEL_0_SFT 12
+#define IQ_SRAM_SEL_0_HI 12
+#define IQ_SRAM_SEL_0_SZ 1
+#define IQ_SRAM_SEL_1_MSK 0x00002000
+#define IQ_SRAM_SEL_1_I_MSK 0xffffdfff
+#define IQ_SRAM_SEL_1_SFT 13
+#define IQ_SRAM_SEL_1_HI 13
+#define IQ_SRAM_SEL_1_SZ 1
+#define IQ_SRAM_SEL_2_MSK 0x00004000
+#define IQ_SRAM_SEL_2_I_MSK 0xffffbfff
+#define IQ_SRAM_SEL_2_SFT 14
+#define IQ_SRAM_SEL_2_HI 14
+#define IQ_SRAM_SEL_2_SZ 1
+#define AHB_STATUS_MSK 0xffff0000
+#define AHB_STATUS_I_MSK 0x0000ffff
+#define AHB_STATUS_SFT 16
+#define AHB_STATUS_HI 31
+#define AHB_STATUS_SZ 16
+#define PARALLEL_DR_MSK 0x00000001
+#define PARALLEL_DR_I_MSK 0xfffffffe
+#define PARALLEL_DR_SFT 0
+#define PARALLEL_DR_HI 0
+#define PARALLEL_DR_SZ 1
+#define MBRUN_MSK 0x00000010
+#define MBRUN_I_MSK 0xffffffef
+#define MBRUN_SFT 4
+#define MBRUN_HI 4
+#define MBRUN_SZ 1
+#define SHIFT_DR_MSK 0x00000100
+#define SHIFT_DR_I_MSK 0xfffffeff
+#define SHIFT_DR_SFT 8
+#define SHIFT_DR_HI 8
+#define SHIFT_DR_SZ 1
+#define MODE_REG_SI_MSK 0x00000200
+#define MODE_REG_SI_I_MSK 0xfffffdff
+#define MODE_REG_SI_SFT 9
+#define MODE_REG_SI_HI 9
+#define MODE_REG_SI_SZ 1
+#define SIMULATION_MODE_MSK 0x00000400
+#define SIMULATION_MODE_I_MSK 0xfffffbff
+#define SIMULATION_MODE_SFT 10
+#define SIMULATION_MODE_HI 10
+#define SIMULATION_MODE_SZ 1
+#define DBIST_MODE_MSK 0x00000800
+#define DBIST_MODE_I_MSK 0xfffff7ff
+#define DBIST_MODE_SFT 11
+#define DBIST_MODE_HI 11
+#define DBIST_MODE_SZ 1
+#define MODE_REG_IN_MSK 0x001fffff
+#define MODE_REG_IN_I_MSK 0xffe00000
+#define MODE_REG_IN_SFT 0
+#define MODE_REG_IN_HI 20
+#define MODE_REG_IN_SZ 21
+#define MODE_REG_OUT_MCU_MSK 0x001fffff
+#define MODE_REG_OUT_MCU_I_MSK 0xffe00000
+#define MODE_REG_OUT_MCU_SFT 0
+#define MODE_REG_OUT_MCU_HI 20
+#define MODE_REG_OUT_MCU_SZ 21
+#define MODE_REG_SO_MCU_MSK 0x80000000
+#define MODE_REG_SO_MCU_I_MSK 0x7fffffff
+#define MODE_REG_SO_MCU_SFT 31
+#define MODE_REG_SO_MCU_HI 31
+#define MODE_REG_SO_MCU_SZ 1
+#define MONITOR_BUS_MCU_31_0_MSK 0xffffffff
+#define MONITOR_BUS_MCU_31_0_I_MSK 0x00000000
+#define MONITOR_BUS_MCU_31_0_SFT 0
+#define MONITOR_BUS_MCU_31_0_HI 31
+#define MONITOR_BUS_MCU_31_0_SZ 32
+#define MONITOR_BUS_MCU_33_32_MSK 0x00000003
+#define MONITOR_BUS_MCU_33_32_I_MSK 0xfffffffc
+#define MONITOR_BUS_MCU_33_32_SFT 0
+#define MONITOR_BUS_MCU_33_32_HI 1
+#define MONITOR_BUS_MCU_33_32_SZ 2
+#define TB_ADR_SEL_MSK 0x0000ffff
+#define TB_ADR_SEL_I_MSK 0xffff0000
+#define TB_ADR_SEL_SFT 0
+#define TB_ADR_SEL_HI 15
+#define TB_ADR_SEL_SZ 16
+#define TB_CS_MSK 0x80000000
+#define TB_CS_I_MSK 0x7fffffff
+#define TB_CS_SFT 31
+#define TB_CS_HI 31
+#define TB_CS_SZ 1
+#define TB_RDATA_MSK 0xffffffff
+#define TB_RDATA_I_MSK 0x00000000
+#define TB_RDATA_SFT 0
+#define TB_RDATA_HI 31
+#define TB_RDATA_SZ 32
+#define UART_W2B_EN_MSK 0x00000001
+#define UART_W2B_EN_I_MSK 0xfffffffe
+#define UART_W2B_EN_SFT 0
+#define UART_W2B_EN_HI 0
+#define UART_W2B_EN_SZ 1
+#define DATA_UART_W2B_EN_MSK 0x00000010
+#define DATA_UART_W2B_EN_I_MSK 0xffffffef
+#define DATA_UART_W2B_EN_SFT 4
+#define DATA_UART_W2B_EN_HI 4
+#define DATA_UART_W2B_EN_SZ 1
+#define AHB_ILL_ADDR_MSK 0xffffffff
+#define AHB_ILL_ADDR_I_MSK 0x00000000
+#define AHB_ILL_ADDR_SFT 0
+#define AHB_ILL_ADDR_HI 31
+#define AHB_ILL_ADDR_SZ 32
+#define AHB_FEN_ADDR_MSK 0xffffffff
+#define AHB_FEN_ADDR_I_MSK 0x00000000
+#define AHB_FEN_ADDR_SFT 0
+#define AHB_FEN_ADDR_HI 31
+#define AHB_FEN_ADDR_SZ 32
+#define ILL_ADDR_CLR_MSK 0x00000001
+#define ILL_ADDR_CLR_I_MSK 0xfffffffe
+#define ILL_ADDR_CLR_SFT 0
+#define ILL_ADDR_CLR_HI 0
+#define ILL_ADDR_CLR_SZ 1
+#define FENCE_HIT_CLR_MSK 0x00000002
+#define FENCE_HIT_CLR_I_MSK 0xfffffffd
+#define FENCE_HIT_CLR_SFT 1
+#define FENCE_HIT_CLR_HI 1
+#define FENCE_HIT_CLR_SZ 1
+#define ILL_ADDR_INT_MSK 0x00000010
+#define ILL_ADDR_INT_I_MSK 0xffffffef
+#define ILL_ADDR_INT_SFT 4
+#define ILL_ADDR_INT_HI 4
+#define ILL_ADDR_INT_SZ 1
+#define FENCE_HIT_INT_MSK 0x00000020
+#define FENCE_HIT_INT_I_MSK 0xffffffdf
+#define FENCE_HIT_INT_SFT 5
+#define FENCE_HIT_INT_HI 5
+#define FENCE_HIT_INT_SZ 1
+#define PWM_INI_VALUE_P_A_MSK 0x000000ff
+#define PWM_INI_VALUE_P_A_I_MSK 0xffffff00
+#define PWM_INI_VALUE_P_A_SFT 0
+#define PWM_INI_VALUE_P_A_HI 7
+#define PWM_INI_VALUE_P_A_SZ 8
+#define PWM_INI_VALUE_N_A_MSK 0x0000ff00
+#define PWM_INI_VALUE_N_A_I_MSK 0xffff00ff
+#define PWM_INI_VALUE_N_A_SFT 8
+#define PWM_INI_VALUE_N_A_HI 15
+#define PWM_INI_VALUE_N_A_SZ 8
+#define PWM_POST_SCALER_A_MSK 0x000f0000
+#define PWM_POST_SCALER_A_I_MSK 0xfff0ffff
+#define PWM_POST_SCALER_A_SFT 16
+#define PWM_POST_SCALER_A_HI 19
+#define PWM_POST_SCALER_A_SZ 4
+#define PWM_ALWAYSON_A_MSK 0x20000000
+#define PWM_ALWAYSON_A_I_MSK 0xdfffffff
+#define PWM_ALWAYSON_A_SFT 29
+#define PWM_ALWAYSON_A_HI 29
+#define PWM_ALWAYSON_A_SZ 1
+#define PWM_INVERT_A_MSK 0x40000000
+#define PWM_INVERT_A_I_MSK 0xbfffffff
+#define PWM_INVERT_A_SFT 30
+#define PWM_INVERT_A_HI 30
+#define PWM_INVERT_A_SZ 1
+#define PWM_ENABLE_A_MSK 0x80000000
+#define PWM_ENABLE_A_I_MSK 0x7fffffff
+#define PWM_ENABLE_A_SFT 31
+#define PWM_ENABLE_A_HI 31
+#define PWM_ENABLE_A_SZ 1
+#define PWM_INI_VALUE_P_B_MSK 0x000000ff
+#define PWM_INI_VALUE_P_B_I_MSK 0xffffff00
+#define PWM_INI_VALUE_P_B_SFT 0
+#define PWM_INI_VALUE_P_B_HI 7
+#define PWM_INI_VALUE_P_B_SZ 8
+#define PWM_INI_VALUE_N_B_MSK 0x0000ff00
+#define PWM_INI_VALUE_N_B_I_MSK 0xffff00ff
+#define PWM_INI_VALUE_N_B_SFT 8
+#define PWM_INI_VALUE_N_B_HI 15
+#define PWM_INI_VALUE_N_B_SZ 8
+#define PWM_POST_SCALER_B_MSK 0x000f0000
+#define PWM_POST_SCALER_B_I_MSK 0xfff0ffff
+#define PWM_POST_SCALER_B_SFT 16
+#define PWM_POST_SCALER_B_HI 19
+#define PWM_POST_SCALER_B_SZ 4
+#define PWM_ALWAYSON_B_MSK 0x20000000
+#define PWM_ALWAYSON_B_I_MSK 0xdfffffff
+#define PWM_ALWAYSON_B_SFT 29
+#define PWM_ALWAYSON_B_HI 29
+#define PWM_ALWAYSON_B_SZ 1
+#define PWM_INVERT_B_MSK 0x40000000
+#define PWM_INVERT_B_I_MSK 0xbfffffff
+#define PWM_INVERT_B_SFT 30
+#define PWM_INVERT_B_HI 30
+#define PWM_INVERT_B_SZ 1
+#define PWM_ENABLE_B_MSK 0x80000000
+#define PWM_ENABLE_B_I_MSK 0x7fffffff
+#define PWM_ENABLE_B_SFT 31
+#define PWM_ENABLE_B_HI 31
+#define PWM_ENABLE_B_SZ 1
+#define HBUSREQ_LOCK_MSK 0x00001fff
+#define HBUSREQ_LOCK_I_MSK 0xffffe000
+#define HBUSREQ_LOCK_SFT 0
+#define HBUSREQ_LOCK_HI 12
+#define HBUSREQ_LOCK_SZ 13
+#define HBURST_LOCK_MSK 0x00001fff
+#define HBURST_LOCK_I_MSK 0xffffe000
+#define HBURST_LOCK_SFT 0
+#define HBURST_LOCK_HI 12
+#define HBURST_LOCK_SZ 13
+#define PRESCALER_USTIMER_MSK 0x000001ff
+#define PRESCALER_USTIMER_I_MSK 0xfffffe00
+#define PRESCALER_USTIMER_SFT 0
+#define PRESCALER_USTIMER_HI 8
+#define PRESCALER_USTIMER_SZ 9
+#define MODE_REG_IN_MMU_MSK 0x0000ffff
+#define MODE_REG_IN_MMU_I_MSK 0xffff0000
+#define MODE_REG_IN_MMU_SFT 0
+#define MODE_REG_IN_MMU_HI 15
+#define MODE_REG_IN_MMU_SZ 16
+#define MODE_REG_OUT_MMU_MSK 0x0000ffff
+#define MODE_REG_OUT_MMU_I_MSK 0xffff0000
+#define MODE_REG_OUT_MMU_SFT 0
+#define MODE_REG_OUT_MMU_HI 15
+#define MODE_REG_OUT_MMU_SZ 16
+#define MODE_REG_SO_MMU_MSK 0x80000000
+#define MODE_REG_SO_MMU_I_MSK 0x7fffffff
+#define MODE_REG_SO_MMU_SFT 31
+#define MODE_REG_SO_MMU_HI 31
+#define MODE_REG_SO_MMU_SZ 1
+#define MONITOR_BUS_MMU_MSK 0x0007ffff
+#define MONITOR_BUS_MMU_I_MSK 0xfff80000
+#define MONITOR_BUS_MMU_SFT 0
+#define MONITOR_BUS_MMU_HI 18
+#define MONITOR_BUS_MMU_SZ 19
+#define TEST_MODE0_MSK 0x00000001
+#define TEST_MODE0_I_MSK 0xfffffffe
+#define TEST_MODE0_SFT 0
+#define TEST_MODE0_HI 0
+#define TEST_MODE0_SZ 1
+#define TEST_MODE1_MSK 0x00000002
+#define TEST_MODE1_I_MSK 0xfffffffd
+#define TEST_MODE1_SFT 1
+#define TEST_MODE1_HI 1
+#define TEST_MODE1_SZ 1
+#define TEST_MODE2_MSK 0x00000004
+#define TEST_MODE2_I_MSK 0xfffffffb
+#define TEST_MODE2_SFT 2
+#define TEST_MODE2_HI 2
+#define TEST_MODE2_SZ 1
+#define TEST_MODE3_MSK 0x00000008
+#define TEST_MODE3_I_MSK 0xfffffff7
+#define TEST_MODE3_SFT 3
+#define TEST_MODE3_HI 3
+#define TEST_MODE3_SZ 1
+#define TEST_MODE4_MSK 0x00000010
+#define TEST_MODE4_I_MSK 0xffffffef
+#define TEST_MODE4_SFT 4
+#define TEST_MODE4_HI 4
+#define TEST_MODE4_SZ 1
+#define TEST_MODE_ALL_MSK 0x00000020
+#define TEST_MODE_ALL_I_MSK 0xffffffdf
+#define TEST_MODE_ALL_SFT 5
+#define TEST_MODE_ALL_HI 5
+#define TEST_MODE_ALL_SZ 1
+#define WDT_INIT_MSK 0x00000001
+#define WDT_INIT_I_MSK 0xfffffffe
+#define WDT_INIT_SFT 0
+#define WDT_INIT_HI 0
+#define WDT_INIT_SZ 1
+#define SD_HOST_INIT_MSK 0x00000002
+#define SD_HOST_INIT_I_MSK 0xfffffffd
+#define SD_HOST_INIT_SFT 1
+#define SD_HOST_INIT_HI 1
+#define SD_HOST_INIT_SZ 1
+#define ALLOW_SD_RESET_MSK 0x00000001
+#define ALLOW_SD_RESET_I_MSK 0xfffffffe
+#define ALLOW_SD_RESET_SFT 0
+#define ALLOW_SD_RESET_HI 0
+#define ALLOW_SD_RESET_SZ 1
+#define UART_NRTS_MSK 0x00000001
+#define UART_NRTS_I_MSK 0xfffffffe
+#define UART_NRTS_SFT 0
+#define UART_NRTS_HI 0
+#define UART_NRTS_SZ 1
+#define UART_NCTS_MSK 0x00000002
+#define UART_NCTS_I_MSK 0xfffffffd
+#define UART_NCTS_SFT 1
+#define UART_NCTS_HI 1
+#define UART_NCTS_SZ 1
+#define TU0_TM_INIT_VALUE_MSK 0x0000ffff
+#define TU0_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TU0_TM_INIT_VALUE_SFT 0
+#define TU0_TM_INIT_VALUE_HI 15
+#define TU0_TM_INIT_VALUE_SZ 16
+#define TU0_TM_MODE_MSK 0x00010000
+#define TU0_TM_MODE_I_MSK 0xfffeffff
+#define TU0_TM_MODE_SFT 16
+#define TU0_TM_MODE_HI 16
+#define TU0_TM_MODE_SZ 1
+#define TU0_TM_INT_STS_DONE_MSK 0x00020000
+#define TU0_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TU0_TM_INT_STS_DONE_SFT 17
+#define TU0_TM_INT_STS_DONE_HI 17
+#define TU0_TM_INT_STS_DONE_SZ 1
+#define TU0_TM_INT_MASK_MSK 0x00040000
+#define TU0_TM_INT_MASK_I_MSK 0xfffbffff
+#define TU0_TM_INT_MASK_SFT 18
+#define TU0_TM_INT_MASK_HI 18
+#define TU0_TM_INT_MASK_SZ 1
+#define TU0_TM_CUR_VALUE_MSK 0x0000ffff
+#define TU0_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TU0_TM_CUR_VALUE_SFT 0
+#define TU0_TM_CUR_VALUE_HI 15
+#define TU0_TM_CUR_VALUE_SZ 16
+#define TU1_TM_INIT_VALUE_MSK 0x0000ffff
+#define TU1_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TU1_TM_INIT_VALUE_SFT 0
+#define TU1_TM_INIT_VALUE_HI 15
+#define TU1_TM_INIT_VALUE_SZ 16
+#define TU1_TM_MODE_MSK 0x00010000
+#define TU1_TM_MODE_I_MSK 0xfffeffff
+#define TU1_TM_MODE_SFT 16
+#define TU1_TM_MODE_HI 16
+#define TU1_TM_MODE_SZ 1
+#define TU1_TM_INT_STS_DONE_MSK 0x00020000
+#define TU1_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TU1_TM_INT_STS_DONE_SFT 17
+#define TU1_TM_INT_STS_DONE_HI 17
+#define TU1_TM_INT_STS_DONE_SZ 1
+#define TU1_TM_INT_MASK_MSK 0x00040000
+#define TU1_TM_INT_MASK_I_MSK 0xfffbffff
+#define TU1_TM_INT_MASK_SFT 18
+#define TU1_TM_INT_MASK_HI 18
+#define TU1_TM_INT_MASK_SZ 1
+#define TU1_TM_CUR_VALUE_MSK 0x0000ffff
+#define TU1_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TU1_TM_CUR_VALUE_SFT 0
+#define TU1_TM_CUR_VALUE_HI 15
+#define TU1_TM_CUR_VALUE_SZ 16
+#define TU2_TM_INIT_VALUE_MSK 0x0000ffff
+#define TU2_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TU2_TM_INIT_VALUE_SFT 0
+#define TU2_TM_INIT_VALUE_HI 15
+#define TU2_TM_INIT_VALUE_SZ 16
+#define TU2_TM_MODE_MSK 0x00010000
+#define TU2_TM_MODE_I_MSK 0xfffeffff
+#define TU2_TM_MODE_SFT 16
+#define TU2_TM_MODE_HI 16
+#define TU2_TM_MODE_SZ 1
+#define TU2_TM_INT_STS_DONE_MSK 0x00020000
+#define TU2_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TU2_TM_INT_STS_DONE_SFT 17
+#define TU2_TM_INT_STS_DONE_HI 17
+#define TU2_TM_INT_STS_DONE_SZ 1
+#define TU2_TM_INT_MASK_MSK 0x00040000
+#define TU2_TM_INT_MASK_I_MSK 0xfffbffff
+#define TU2_TM_INT_MASK_SFT 18
+#define TU2_TM_INT_MASK_HI 18
+#define TU2_TM_INT_MASK_SZ 1
+#define TU2_TM_CUR_VALUE_MSK 0x0000ffff
+#define TU2_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TU2_TM_CUR_VALUE_SFT 0
+#define TU2_TM_CUR_VALUE_HI 15
+#define TU2_TM_CUR_VALUE_SZ 16
+#define TU3_TM_INIT_VALUE_MSK 0x0000ffff
+#define TU3_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TU3_TM_INIT_VALUE_SFT 0
+#define TU3_TM_INIT_VALUE_HI 15
+#define TU3_TM_INIT_VALUE_SZ 16
+#define TU3_TM_MODE_MSK 0x00010000
+#define TU3_TM_MODE_I_MSK 0xfffeffff
+#define TU3_TM_MODE_SFT 16
+#define TU3_TM_MODE_HI 16
+#define TU3_TM_MODE_SZ 1
+#define TU3_TM_INT_STS_DONE_MSK 0x00020000
+#define TU3_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TU3_TM_INT_STS_DONE_SFT 17
+#define TU3_TM_INT_STS_DONE_HI 17
+#define TU3_TM_INT_STS_DONE_SZ 1
+#define TU3_TM_INT_MASK_MSK 0x00040000
+#define TU3_TM_INT_MASK_I_MSK 0xfffbffff
+#define TU3_TM_INT_MASK_SFT 18
+#define TU3_TM_INT_MASK_HI 18
+#define TU3_TM_INT_MASK_SZ 1
+#define TU3_TM_CUR_VALUE_MSK 0x0000ffff
+#define TU3_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TU3_TM_CUR_VALUE_SFT 0
+#define TU3_TM_CUR_VALUE_HI 15
+#define TU3_TM_CUR_VALUE_SZ 16
+#define TM0_TM_INIT_VALUE_MSK 0x0000ffff
+#define TM0_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TM0_TM_INIT_VALUE_SFT 0
+#define TM0_TM_INIT_VALUE_HI 15
+#define TM0_TM_INIT_VALUE_SZ 16
+#define TM0_TM_MODE_MSK 0x00010000
+#define TM0_TM_MODE_I_MSK 0xfffeffff
+#define TM0_TM_MODE_SFT 16
+#define TM0_TM_MODE_HI 16
+#define TM0_TM_MODE_SZ 1
+#define TM0_TM_INT_STS_DONE_MSK 0x00020000
+#define TM0_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TM0_TM_INT_STS_DONE_SFT 17
+#define TM0_TM_INT_STS_DONE_HI 17
+#define TM0_TM_INT_STS_DONE_SZ 1
+#define TM0_TM_INT_MASK_MSK 0x00040000
+#define TM0_TM_INT_MASK_I_MSK 0xfffbffff
+#define TM0_TM_INT_MASK_SFT 18
+#define TM0_TM_INT_MASK_HI 18
+#define TM0_TM_INT_MASK_SZ 1
+#define TM0_TM_CUR_VALUE_MSK 0x0000ffff
+#define TM0_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TM0_TM_CUR_VALUE_SFT 0
+#define TM0_TM_CUR_VALUE_HI 15
+#define TM0_TM_CUR_VALUE_SZ 16
+#define TM1_TM_INIT_VALUE_MSK 0x0000ffff
+#define TM1_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TM1_TM_INIT_VALUE_SFT 0
+#define TM1_TM_INIT_VALUE_HI 15
+#define TM1_TM_INIT_VALUE_SZ 16
+#define TM1_TM_MODE_MSK 0x00010000
+#define TM1_TM_MODE_I_MSK 0xfffeffff
+#define TM1_TM_MODE_SFT 16
+#define TM1_TM_MODE_HI 16
+#define TM1_TM_MODE_SZ 1
+#define TM1_TM_INT_STS_DONE_MSK 0x00020000
+#define TM1_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TM1_TM_INT_STS_DONE_SFT 17
+#define TM1_TM_INT_STS_DONE_HI 17
+#define TM1_TM_INT_STS_DONE_SZ 1
+#define TM1_TM_INT_MASK_MSK 0x00040000
+#define TM1_TM_INT_MASK_I_MSK 0xfffbffff
+#define TM1_TM_INT_MASK_SFT 18
+#define TM1_TM_INT_MASK_HI 18
+#define TM1_TM_INT_MASK_SZ 1
+#define TM1_TM_CUR_VALUE_MSK 0x0000ffff
+#define TM1_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TM1_TM_CUR_VALUE_SFT 0
+#define TM1_TM_CUR_VALUE_HI 15
+#define TM1_TM_CUR_VALUE_SZ 16
+#define TM2_TM_INIT_VALUE_MSK 0x0000ffff
+#define TM2_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TM2_TM_INIT_VALUE_SFT 0
+#define TM2_TM_INIT_VALUE_HI 15
+#define TM2_TM_INIT_VALUE_SZ 16
+#define TM2_TM_MODE_MSK 0x00010000
+#define TM2_TM_MODE_I_MSK 0xfffeffff
+#define TM2_TM_MODE_SFT 16
+#define TM2_TM_MODE_HI 16
+#define TM2_TM_MODE_SZ 1
+#define TM2_TM_INT_STS_DONE_MSK 0x00020000
+#define TM2_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TM2_TM_INT_STS_DONE_SFT 17
+#define TM2_TM_INT_STS_DONE_HI 17
+#define TM2_TM_INT_STS_DONE_SZ 1
+#define TM2_TM_INT_MASK_MSK 0x00040000
+#define TM2_TM_INT_MASK_I_MSK 0xfffbffff
+#define TM2_TM_INT_MASK_SFT 18
+#define TM2_TM_INT_MASK_HI 18
+#define TM2_TM_INT_MASK_SZ 1
+#define TM2_TM_CUR_VALUE_MSK 0x0000ffff
+#define TM2_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TM2_TM_CUR_VALUE_SFT 0
+#define TM2_TM_CUR_VALUE_HI 15
+#define TM2_TM_CUR_VALUE_SZ 16
+#define TM3_TM_INIT_VALUE_MSK 0x0000ffff
+#define TM3_TM_INIT_VALUE_I_MSK 0xffff0000
+#define TM3_TM_INIT_VALUE_SFT 0
+#define TM3_TM_INIT_VALUE_HI 15
+#define TM3_TM_INIT_VALUE_SZ 16
+#define TM3_TM_MODE_MSK 0x00010000
+#define TM3_TM_MODE_I_MSK 0xfffeffff
+#define TM3_TM_MODE_SFT 16
+#define TM3_TM_MODE_HI 16
+#define TM3_TM_MODE_SZ 1
+#define TM3_TM_INT_STS_DONE_MSK 0x00020000
+#define TM3_TM_INT_STS_DONE_I_MSK 0xfffdffff
+#define TM3_TM_INT_STS_DONE_SFT 17
+#define TM3_TM_INT_STS_DONE_HI 17
+#define TM3_TM_INT_STS_DONE_SZ 1
+#define TM3_TM_INT_MASK_MSK 0x00040000
+#define TM3_TM_INT_MASK_I_MSK 0xfffbffff
+#define TM3_TM_INT_MASK_SFT 18
+#define TM3_TM_INT_MASK_HI 18
+#define TM3_TM_INT_MASK_SZ 1
+#define TM3_TM_CUR_VALUE_MSK 0x0000ffff
+#define TM3_TM_CUR_VALUE_I_MSK 0xffff0000
+#define TM3_TM_CUR_VALUE_SFT 0
+#define TM3_TM_CUR_VALUE_HI 15
+#define TM3_TM_CUR_VALUE_SZ 16
+#define MCU_WDT_TIME_CNT_MSK 0x0000ffff
+#define MCU_WDT_TIME_CNT_I_MSK 0xffff0000
+#define MCU_WDT_TIME_CNT_SFT 0
+#define MCU_WDT_TIME_CNT_HI 15
+#define MCU_WDT_TIME_CNT_SZ 16
+#define MCU_WDT_STATUS_MSK 0x00020000
+#define MCU_WDT_STATUS_I_MSK 0xfffdffff
+#define MCU_WDT_STATUS_SFT 17
+#define MCU_WDT_STATUS_HI 17
+#define MCU_WDT_STATUS_SZ 1
+#define MCU_WDOG_ENA_MSK 0x80000000
+#define MCU_WDOG_ENA_I_MSK 0x7fffffff
+#define MCU_WDOG_ENA_SFT 31
+#define MCU_WDOG_ENA_HI 31
+#define MCU_WDOG_ENA_SZ 1
+#define SYS_WDT_TIME_CNT_MSK 0x0000ffff
+#define SYS_WDT_TIME_CNT_I_MSK 0xffff0000
+#define SYS_WDT_TIME_CNT_SFT 0
+#define SYS_WDT_TIME_CNT_HI 15
+#define SYS_WDT_TIME_CNT_SZ 16
+#define SYS_WDT_STATUS_MSK 0x00020000
+#define SYS_WDT_STATUS_I_MSK 0xfffdffff
+#define SYS_WDT_STATUS_SFT 17
+#define SYS_WDT_STATUS_HI 17
+#define SYS_WDT_STATUS_SZ 1
+#define SYS_WDOG_ENA_MSK 0x80000000
+#define SYS_WDOG_ENA_I_MSK 0x7fffffff
+#define SYS_WDOG_ENA_SFT 31
+#define SYS_WDOG_ENA_HI 31
+#define SYS_WDOG_ENA_SZ 1
+#define XLNA_EN_O_OE_MSK 0x00000001
+#define XLNA_EN_O_OE_I_MSK 0xfffffffe
+#define XLNA_EN_O_OE_SFT 0
+#define XLNA_EN_O_OE_HI 0
+#define XLNA_EN_O_OE_SZ 1
+#define XLNA_EN_O_PE_MSK 0x00000002
+#define XLNA_EN_O_PE_I_MSK 0xfffffffd
+#define XLNA_EN_O_PE_SFT 1
+#define XLNA_EN_O_PE_HI 1
+#define XLNA_EN_O_PE_SZ 1
+#define PAD6_IE_MSK 0x00000008
+#define PAD6_IE_I_MSK 0xfffffff7
+#define PAD6_IE_SFT 3
+#define PAD6_IE_HI 3
+#define PAD6_IE_SZ 1
+#define PAD6_SEL_I_MSK 0x00000030
+#define PAD6_SEL_I_I_MSK 0xffffffcf
+#define PAD6_SEL_I_SFT 4
+#define PAD6_SEL_I_HI 5
+#define PAD6_SEL_I_SZ 2
+#define PAD6_OD_MSK 0x00000100
+#define PAD6_OD_I_MSK 0xfffffeff
+#define PAD6_OD_SFT 8
+#define PAD6_OD_HI 8
+#define PAD6_OD_SZ 1
+#define PAD6_SEL_O_MSK 0x00001000
+#define PAD6_SEL_O_I_MSK 0xffffefff
+#define PAD6_SEL_O_SFT 12
+#define PAD6_SEL_O_HI 12
+#define PAD6_SEL_O_SZ 1
+#define XLNA_EN_O_C_MSK 0x10000000
+#define XLNA_EN_O_C_I_MSK 0xefffffff
+#define XLNA_EN_O_C_SFT 28
+#define XLNA_EN_O_C_HI 28
+#define XLNA_EN_O_C_SZ 1
+#define WIFI_TX_SW_O_OE_MSK 0x00000001
+#define WIFI_TX_SW_O_OE_I_MSK 0xfffffffe
+#define WIFI_TX_SW_O_OE_SFT 0
+#define WIFI_TX_SW_O_OE_HI 0
+#define WIFI_TX_SW_O_OE_SZ 1
+#define WIFI_TX_SW_O_PE_MSK 0x00000002
+#define WIFI_TX_SW_O_PE_I_MSK 0xfffffffd
+#define WIFI_TX_SW_O_PE_SFT 1
+#define WIFI_TX_SW_O_PE_HI 1
+#define WIFI_TX_SW_O_PE_SZ 1
+#define PAD7_IE_MSK 0x00000008
+#define PAD7_IE_I_MSK 0xfffffff7
+#define PAD7_IE_SFT 3
+#define PAD7_IE_HI 3
+#define PAD7_IE_SZ 1
+#define PAD7_SEL_I_MSK 0x00000030
+#define PAD7_SEL_I_I_MSK 0xffffffcf
+#define PAD7_SEL_I_SFT 4
+#define PAD7_SEL_I_HI 5
+#define PAD7_SEL_I_SZ 2
+#define PAD7_OD_MSK 0x00000100
+#define PAD7_OD_I_MSK 0xfffffeff
+#define PAD7_OD_SFT 8
+#define PAD7_OD_HI 8
+#define PAD7_OD_SZ 1
+#define PAD7_SEL_O_MSK 0x00001000
+#define PAD7_SEL_O_I_MSK 0xffffefff
+#define PAD7_SEL_O_SFT 12
+#define PAD7_SEL_O_HI 12
+#define PAD7_SEL_O_SZ 1
+#define WIFI_TX_SW_O_C_MSK 0x10000000
+#define WIFI_TX_SW_O_C_I_MSK 0xefffffff
+#define WIFI_TX_SW_O_C_SFT 28
+#define WIFI_TX_SW_O_C_HI 28
+#define WIFI_TX_SW_O_C_SZ 1
+#define WIFI_RX_SW_O_OE_MSK 0x00000001
+#define WIFI_RX_SW_O_OE_I_MSK 0xfffffffe
+#define WIFI_RX_SW_O_OE_SFT 0
+#define WIFI_RX_SW_O_OE_HI 0
+#define WIFI_RX_SW_O_OE_SZ 1
+#define WIFI_RX_SW_O_PE_MSK 0x00000002
+#define WIFI_RX_SW_O_PE_I_MSK 0xfffffffd
+#define WIFI_RX_SW_O_PE_SFT 1
+#define WIFI_RX_SW_O_PE_HI 1
+#define WIFI_RX_SW_O_PE_SZ 1
+#define PAD8_IE_MSK 0x00000008
+#define PAD8_IE_I_MSK 0xfffffff7
+#define PAD8_IE_SFT 3
+#define PAD8_IE_HI 3
+#define PAD8_IE_SZ 1
+#define PAD8_SEL_I_MSK 0x00000030
+#define PAD8_SEL_I_I_MSK 0xffffffcf
+#define PAD8_SEL_I_SFT 4
+#define PAD8_SEL_I_HI 5
+#define PAD8_SEL_I_SZ 2
+#define PAD8_OD_MSK 0x00000100
+#define PAD8_OD_I_MSK 0xfffffeff
+#define PAD8_OD_SFT 8
+#define PAD8_OD_HI 8
+#define PAD8_OD_SZ 1
+#define WIFI_RX_SW_O_C_MSK 0x10000000
+#define WIFI_RX_SW_O_C_I_MSK 0xefffffff
+#define WIFI_RX_SW_O_C_SFT 28
+#define WIFI_RX_SW_O_C_HI 28
+#define WIFI_RX_SW_O_C_SZ 1
+#define BT_SW_O_OE_MSK 0x00000001
+#define BT_SW_O_OE_I_MSK 0xfffffffe
+#define BT_SW_O_OE_SFT 0
+#define BT_SW_O_OE_HI 0
+#define BT_SW_O_OE_SZ 1
+#define BT_SW_O_PE_MSK 0x00000002
+#define BT_SW_O_PE_I_MSK 0xfffffffd
+#define BT_SW_O_PE_SFT 1
+#define BT_SW_O_PE_HI 1
+#define BT_SW_O_PE_SZ 1
+#define PAD9_IE_MSK 0x00000008
+#define PAD9_IE_I_MSK 0xfffffff7
+#define PAD9_IE_SFT 3
+#define PAD9_IE_HI 3
+#define PAD9_IE_SZ 1
+#define PAD9_SEL_I_MSK 0x00000030
+#define PAD9_SEL_I_I_MSK 0xffffffcf
+#define PAD9_SEL_I_SFT 4
+#define PAD9_SEL_I_HI 5
+#define PAD9_SEL_I_SZ 2
+#define PAD9_OD_MSK 0x00000100
+#define PAD9_OD_I_MSK 0xfffffeff
+#define PAD9_OD_SFT 8
+#define PAD9_OD_HI 8
+#define PAD9_OD_SZ 1
+#define PAD9_SEL_O_MSK 0x00001000
+#define PAD9_SEL_O_I_MSK 0xffffefff
+#define PAD9_SEL_O_SFT 12
+#define PAD9_SEL_O_HI 12
+#define PAD9_SEL_O_SZ 1
+#define BT_SW_O_C_MSK 0x10000000
+#define BT_SW_O_C_I_MSK 0xefffffff
+#define BT_SW_O_C_SFT 28
+#define BT_SW_O_C_HI 28
+#define BT_SW_O_C_SZ 1
+#define XPA_EN_O_OE_MSK 0x00000001
+#define XPA_EN_O_OE_I_MSK 0xfffffffe
+#define XPA_EN_O_OE_SFT 0
+#define XPA_EN_O_OE_HI 0
+#define XPA_EN_O_OE_SZ 1
+#define XPA_EN_O_PE_MSK 0x00000002
+#define XPA_EN_O_PE_I_MSK 0xfffffffd
+#define XPA_EN_O_PE_SFT 1
+#define XPA_EN_O_PE_HI 1
+#define XPA_EN_O_PE_SZ 1
+#define PAD11_IE_MSK 0x00000008
+#define PAD11_IE_I_MSK 0xfffffff7
+#define PAD11_IE_SFT 3
+#define PAD11_IE_HI 3
+#define PAD11_IE_SZ 1
+#define PAD11_SEL_I_MSK 0x00000030
+#define PAD11_SEL_I_I_MSK 0xffffffcf
+#define PAD11_SEL_I_SFT 4
+#define PAD11_SEL_I_HI 5
+#define PAD11_SEL_I_SZ 2
+#define PAD11_OD_MSK 0x00000100
+#define PAD11_OD_I_MSK 0xfffffeff
+#define PAD11_OD_SFT 8
+#define PAD11_OD_HI 8
+#define PAD11_OD_SZ 1
+#define PAD11_SEL_O_MSK 0x00001000
+#define PAD11_SEL_O_I_MSK 0xffffefff
+#define PAD11_SEL_O_SFT 12
+#define PAD11_SEL_O_HI 12
+#define PAD11_SEL_O_SZ 1
+#define XPA_EN_O_C_MSK 0x10000000
+#define XPA_EN_O_C_I_MSK 0xefffffff
+#define XPA_EN_O_C_SFT 28
+#define XPA_EN_O_C_HI 28
+#define XPA_EN_O_C_SZ 1
+#define PAD15_OE_MSK 0x00000001
+#define PAD15_OE_I_MSK 0xfffffffe
+#define PAD15_OE_SFT 0
+#define PAD15_OE_HI 0
+#define PAD15_OE_SZ 1
+#define PAD15_PE_MSK 0x00000002
+#define PAD15_PE_I_MSK 0xfffffffd
+#define PAD15_PE_SFT 1
+#define PAD15_PE_HI 1
+#define PAD15_PE_SZ 1
+#define PAD15_DS_MSK 0x00000004
+#define PAD15_DS_I_MSK 0xfffffffb
+#define PAD15_DS_SFT 2
+#define PAD15_DS_HI 2
+#define PAD15_DS_SZ 1
+#define PAD15_IE_MSK 0x00000008
+#define PAD15_IE_I_MSK 0xfffffff7
+#define PAD15_IE_SFT 3
+#define PAD15_IE_HI 3
+#define PAD15_IE_SZ 1
+#define PAD15_SEL_I_MSK 0x00000030
+#define PAD15_SEL_I_I_MSK 0xffffffcf
+#define PAD15_SEL_I_SFT 4
+#define PAD15_SEL_I_HI 5
+#define PAD15_SEL_I_SZ 2
+#define PAD15_OD_MSK 0x00000100
+#define PAD15_OD_I_MSK 0xfffffeff
+#define PAD15_OD_SFT 8
+#define PAD15_OD_HI 8
+#define PAD15_OD_SZ 1
+#define PAD15_SEL_O_MSK 0x00001000
+#define PAD15_SEL_O_I_MSK 0xffffefff
+#define PAD15_SEL_O_SFT 12
+#define PAD15_SEL_O_HI 12
+#define PAD15_SEL_O_SZ 1
+#define TEST_1_ID_MSK 0x10000000
+#define TEST_1_ID_I_MSK 0xefffffff
+#define TEST_1_ID_SFT 28
+#define TEST_1_ID_HI 28
+#define TEST_1_ID_SZ 1
+#define PAD16_OE_MSK 0x00000001
+#define PAD16_OE_I_MSK 0xfffffffe
+#define PAD16_OE_SFT 0
+#define PAD16_OE_HI 0
+#define PAD16_OE_SZ 1
+#define PAD16_PE_MSK 0x00000002
+#define PAD16_PE_I_MSK 0xfffffffd
+#define PAD16_PE_SFT 1
+#define PAD16_PE_HI 1
+#define PAD16_PE_SZ 1
+#define PAD16_DS_MSK 0x00000004
+#define PAD16_DS_I_MSK 0xfffffffb
+#define PAD16_DS_SFT 2
+#define PAD16_DS_HI 2
+#define PAD16_DS_SZ 1
+#define PAD16_IE_MSK 0x00000008
+#define PAD16_IE_I_MSK 0xfffffff7
+#define PAD16_IE_SFT 3
+#define PAD16_IE_HI 3
+#define PAD16_IE_SZ 1
+#define PAD16_SEL_I_MSK 0x00000030
+#define PAD16_SEL_I_I_MSK 0xffffffcf
+#define PAD16_SEL_I_SFT 4
+#define PAD16_SEL_I_HI 5
+#define PAD16_SEL_I_SZ 2
+#define PAD16_OD_MSK 0x00000100
+#define PAD16_OD_I_MSK 0xfffffeff
+#define PAD16_OD_SFT 8
+#define PAD16_OD_HI 8
+#define PAD16_OD_SZ 1
+#define PAD16_SEL_O_MSK 0x00001000
+#define PAD16_SEL_O_I_MSK 0xffffefff
+#define PAD16_SEL_O_SFT 12
+#define PAD16_SEL_O_HI 12
+#define PAD16_SEL_O_SZ 1
+#define TEST_2_ID_MSK 0x10000000
+#define TEST_2_ID_I_MSK 0xefffffff
+#define TEST_2_ID_SFT 28
+#define TEST_2_ID_HI 28
+#define TEST_2_ID_SZ 1
+#define PAD17_OE_MSK 0x00000001
+#define PAD17_OE_I_MSK 0xfffffffe
+#define PAD17_OE_SFT 0
+#define PAD17_OE_HI 0
+#define PAD17_OE_SZ 1
+#define PAD17_PE_MSK 0x00000002
+#define PAD17_PE_I_MSK 0xfffffffd
+#define PAD17_PE_SFT 1
+#define PAD17_PE_HI 1
+#define PAD17_PE_SZ 1
+#define PAD17_DS_MSK 0x00000004
+#define PAD17_DS_I_MSK 0xfffffffb
+#define PAD17_DS_SFT 2
+#define PAD17_DS_HI 2
+#define PAD17_DS_SZ 1
+#define PAD17_IE_MSK 0x00000008
+#define PAD17_IE_I_MSK 0xfffffff7
+#define PAD17_IE_SFT 3
+#define PAD17_IE_HI 3
+#define PAD17_IE_SZ 1
+#define PAD17_SEL_I_MSK 0x00000030
+#define PAD17_SEL_I_I_MSK 0xffffffcf
+#define PAD17_SEL_I_SFT 4
+#define PAD17_SEL_I_HI 5
+#define PAD17_SEL_I_SZ 2
+#define PAD17_OD_MSK 0x00000100
+#define PAD17_OD_I_MSK 0xfffffeff
+#define PAD17_OD_SFT 8
+#define PAD17_OD_HI 8
+#define PAD17_OD_SZ 1
+#define PAD17_SEL_O_MSK 0x00001000
+#define PAD17_SEL_O_I_MSK 0xffffefff
+#define PAD17_SEL_O_SFT 12
+#define PAD17_SEL_O_HI 12
+#define PAD17_SEL_O_SZ 1
+#define TEST_3_ID_MSK 0x10000000
+#define TEST_3_ID_I_MSK 0xefffffff
+#define TEST_3_ID_SFT 28
+#define TEST_3_ID_HI 28
+#define TEST_3_ID_SZ 1
+#define PAD18_OE_MSK 0x00000001
+#define PAD18_OE_I_MSK 0xfffffffe
+#define PAD18_OE_SFT 0
+#define PAD18_OE_HI 0
+#define PAD18_OE_SZ 1
+#define PAD18_PE_MSK 0x00000002
+#define PAD18_PE_I_MSK 0xfffffffd
+#define PAD18_PE_SFT 1
+#define PAD18_PE_HI 1
+#define PAD18_PE_SZ 1
+#define PAD18_DS_MSK 0x00000004
+#define PAD18_DS_I_MSK 0xfffffffb
+#define PAD18_DS_SFT 2
+#define PAD18_DS_HI 2
+#define PAD18_DS_SZ 1
+#define PAD18_IE_MSK 0x00000008
+#define PAD18_IE_I_MSK 0xfffffff7
+#define PAD18_IE_SFT 3
+#define PAD18_IE_HI 3
+#define PAD18_IE_SZ 1
+#define PAD18_SEL_I_MSK 0x00000030
+#define PAD18_SEL_I_I_MSK 0xffffffcf
+#define PAD18_SEL_I_SFT 4
+#define PAD18_SEL_I_HI 5
+#define PAD18_SEL_I_SZ 2
+#define PAD18_OD_MSK 0x00000100
+#define PAD18_OD_I_MSK 0xfffffeff
+#define PAD18_OD_SFT 8
+#define PAD18_OD_HI 8
+#define PAD18_OD_SZ 1
+#define PAD18_SEL_O_MSK 0x00003000
+#define PAD18_SEL_O_I_MSK 0xffffcfff
+#define PAD18_SEL_O_SFT 12
+#define PAD18_SEL_O_HI 13
+#define PAD18_SEL_O_SZ 2
+#define TEST_4_ID_MSK 0x10000000
+#define TEST_4_ID_I_MSK 0xefffffff
+#define TEST_4_ID_SFT 28
+#define TEST_4_ID_HI 28
+#define TEST_4_ID_SZ 1
+#define PAD19_OE_MSK 0x00000001
+#define PAD19_OE_I_MSK 0xfffffffe
+#define PAD19_OE_SFT 0
+#define PAD19_OE_HI 0
+#define PAD19_OE_SZ 1
+#define PAD19_PE_MSK 0x00000002
+#define PAD19_PE_I_MSK 0xfffffffd
+#define PAD19_PE_SFT 1
+#define PAD19_PE_HI 1
+#define PAD19_PE_SZ 1
+#define PAD19_DS_MSK 0x00000004
+#define PAD19_DS_I_MSK 0xfffffffb
+#define PAD19_DS_SFT 2
+#define PAD19_DS_HI 2
+#define PAD19_DS_SZ 1
+#define PAD19_IE_MSK 0x00000008
+#define PAD19_IE_I_MSK 0xfffffff7
+#define PAD19_IE_SFT 3
+#define PAD19_IE_HI 3
+#define PAD19_IE_SZ 1
+#define PAD19_SEL_I_MSK 0x00000030
+#define PAD19_SEL_I_I_MSK 0xffffffcf
+#define PAD19_SEL_I_SFT 4
+#define PAD19_SEL_I_HI 5
+#define PAD19_SEL_I_SZ 2
+#define PAD19_OD_MSK 0x00000100
+#define PAD19_OD_I_MSK 0xfffffeff
+#define PAD19_OD_SFT 8
+#define PAD19_OD_HI 8
+#define PAD19_OD_SZ 1
+#define PAD19_SEL_O_MSK 0x00007000
+#define PAD19_SEL_O_I_MSK 0xffff8fff
+#define PAD19_SEL_O_SFT 12
+#define PAD19_SEL_O_HI 14
+#define PAD19_SEL_O_SZ 3
+#define SHORT_TO_20_ID_MSK 0x10000000
+#define SHORT_TO_20_ID_I_MSK 0xefffffff
+#define SHORT_TO_20_ID_SFT 28
+#define SHORT_TO_20_ID_HI 28
+#define SHORT_TO_20_ID_SZ 1
+#define PAD20_OE_MSK 0x00000001
+#define PAD20_OE_I_MSK 0xfffffffe
+#define PAD20_OE_SFT 0
+#define PAD20_OE_HI 0
+#define PAD20_OE_SZ 1
+#define PAD20_PE_MSK 0x00000002
+#define PAD20_PE_I_MSK 0xfffffffd
+#define PAD20_PE_SFT 1
+#define PAD20_PE_HI 1
+#define PAD20_PE_SZ 1
+#define PAD20_DS_MSK 0x00000004
+#define PAD20_DS_I_MSK 0xfffffffb
+#define PAD20_DS_SFT 2
+#define PAD20_DS_HI 2
+#define PAD20_DS_SZ 1
+#define PAD20_IE_MSK 0x00000008
+#define PAD20_IE_I_MSK 0xfffffff7
+#define PAD20_IE_SFT 3
+#define PAD20_IE_HI 3
+#define PAD20_IE_SZ 1
+#define PAD20_SEL_I_MSK 0x000000f0
+#define PAD20_SEL_I_I_MSK 0xffffff0f
+#define PAD20_SEL_I_SFT 4
+#define PAD20_SEL_I_HI 7
+#define PAD20_SEL_I_SZ 4
+#define PAD20_OD_MSK 0x00000100
+#define PAD20_OD_I_MSK 0xfffffeff
+#define PAD20_OD_SFT 8
+#define PAD20_OD_HI 8
+#define PAD20_OD_SZ 1
+#define PAD20_SEL_O_MSK 0x00003000
+#define PAD20_SEL_O_I_MSK 0xffffcfff
+#define PAD20_SEL_O_SFT 12
+#define PAD20_SEL_O_HI 13
+#define PAD20_SEL_O_SZ 2
+#define STRAP0_MSK 0x08000000
+#define STRAP0_I_MSK 0xf7ffffff
+#define STRAP0_SFT 27
+#define STRAP0_HI 27
+#define STRAP0_SZ 1
+#define GPIO_TEST_1_ID_MSK 0x10000000
+#define GPIO_TEST_1_ID_I_MSK 0xefffffff
+#define GPIO_TEST_1_ID_SFT 28
+#define GPIO_TEST_1_ID_HI 28
+#define GPIO_TEST_1_ID_SZ 1
+#define PAD21_OE_MSK 0x00000001
+#define PAD21_OE_I_MSK 0xfffffffe
+#define PAD21_OE_SFT 0
+#define PAD21_OE_HI 0
+#define PAD21_OE_SZ 1
+#define PAD21_PE_MSK 0x00000002
+#define PAD21_PE_I_MSK 0xfffffffd
+#define PAD21_PE_SFT 1
+#define PAD21_PE_HI 1
+#define PAD21_PE_SZ 1
+#define PAD21_DS_MSK 0x00000004
+#define PAD21_DS_I_MSK 0xfffffffb
+#define PAD21_DS_SFT 2
+#define PAD21_DS_HI 2
+#define PAD21_DS_SZ 1
+#define PAD21_IE_MSK 0x00000008
+#define PAD21_IE_I_MSK 0xfffffff7
+#define PAD21_IE_SFT 3
+#define PAD21_IE_HI 3
+#define PAD21_IE_SZ 1
+#define PAD21_SEL_I_MSK 0x00000070
+#define PAD21_SEL_I_I_MSK 0xffffff8f
+#define PAD21_SEL_I_SFT 4
+#define PAD21_SEL_I_HI 6
+#define PAD21_SEL_I_SZ 3
+#define PAD21_OD_MSK 0x00000100
+#define PAD21_OD_I_MSK 0xfffffeff
+#define PAD21_OD_SFT 8
+#define PAD21_OD_HI 8
+#define PAD21_OD_SZ 1
+#define PAD21_SEL_O_MSK 0x00003000
+#define PAD21_SEL_O_I_MSK 0xffffcfff
+#define PAD21_SEL_O_SFT 12
+#define PAD21_SEL_O_HI 13
+#define PAD21_SEL_O_SZ 2
+#define STRAP3_MSK 0x08000000
+#define STRAP3_I_MSK 0xf7ffffff
+#define STRAP3_SFT 27
+#define STRAP3_HI 27
+#define STRAP3_SZ 1
+#define GPIO_TEST_2_ID_MSK 0x10000000
+#define GPIO_TEST_2_ID_I_MSK 0xefffffff
+#define GPIO_TEST_2_ID_SFT 28
+#define GPIO_TEST_2_ID_HI 28
+#define GPIO_TEST_2_ID_SZ 1
+#define PAD22_OE_MSK 0x00000001
+#define PAD22_OE_I_MSK 0xfffffffe
+#define PAD22_OE_SFT 0
+#define PAD22_OE_HI 0
+#define PAD22_OE_SZ 1
+#define PAD22_PE_MSK 0x00000002
+#define PAD22_PE_I_MSK 0xfffffffd
+#define PAD22_PE_SFT 1
+#define PAD22_PE_HI 1
+#define PAD22_PE_SZ 1
+#define PAD22_DS_MSK 0x00000004
+#define PAD22_DS_I_MSK 0xfffffffb
+#define PAD22_DS_SFT 2
+#define PAD22_DS_HI 2
+#define PAD22_DS_SZ 1
+#define PAD22_IE_MSK 0x00000008
+#define PAD22_IE_I_MSK 0xfffffff7
+#define PAD22_IE_SFT 3
+#define PAD22_IE_HI 3
+#define PAD22_IE_SZ 1
+#define PAD22_SEL_I_MSK 0x00000070
+#define PAD22_SEL_I_I_MSK 0xffffff8f
+#define PAD22_SEL_I_SFT 4
+#define PAD22_SEL_I_HI 6
+#define PAD22_SEL_I_SZ 3
+#define PAD22_OD_MSK 0x00000100
+#define PAD22_OD_I_MSK 0xfffffeff
+#define PAD22_OD_SFT 8
+#define PAD22_OD_HI 8
+#define PAD22_OD_SZ 1
+#define PAD22_SEL_O_MSK 0x00007000
+#define PAD22_SEL_O_I_MSK 0xffff8fff
+#define PAD22_SEL_O_SFT 12
+#define PAD22_SEL_O_HI 14
+#define PAD22_SEL_O_SZ 3
+#define PAD22_SEL_OE_MSK 0x00100000
+#define PAD22_SEL_OE_I_MSK 0xffefffff
+#define PAD22_SEL_OE_SFT 20
+#define PAD22_SEL_OE_HI 20
+#define PAD22_SEL_OE_SZ 1
+#define GPIO_TEST_3_ID_MSK 0x10000000
+#define GPIO_TEST_3_ID_I_MSK 0xefffffff
+#define GPIO_TEST_3_ID_SFT 28
+#define GPIO_TEST_3_ID_HI 28
+#define GPIO_TEST_3_ID_SZ 1
+#define PAD24_OE_MSK 0x00000001
+#define PAD24_OE_I_MSK 0xfffffffe
+#define PAD24_OE_SFT 0
+#define PAD24_OE_HI 0
+#define PAD24_OE_SZ 1
+#define PAD24_PE_MSK 0x00000002
+#define PAD24_PE_I_MSK 0xfffffffd
+#define PAD24_PE_SFT 1
+#define PAD24_PE_HI 1
+#define PAD24_PE_SZ 1
+#define PAD24_DS_MSK 0x00000004
+#define PAD24_DS_I_MSK 0xfffffffb
+#define PAD24_DS_SFT 2
+#define PAD24_DS_HI 2
+#define PAD24_DS_SZ 1
+#define PAD24_IE_MSK 0x00000008
+#define PAD24_IE_I_MSK 0xfffffff7
+#define PAD24_IE_SFT 3
+#define PAD24_IE_HI 3
+#define PAD24_IE_SZ 1
+#define PAD24_SEL_I_MSK 0x00000030
+#define PAD24_SEL_I_I_MSK 0xffffffcf
+#define PAD24_SEL_I_SFT 4
+#define PAD24_SEL_I_HI 5
+#define PAD24_SEL_I_SZ 2
+#define PAD24_OD_MSK 0x00000100
+#define PAD24_OD_I_MSK 0xfffffeff
+#define PAD24_OD_SFT 8
+#define PAD24_OD_HI 8
+#define PAD24_OD_SZ 1
+#define PAD24_SEL_O_MSK 0x00007000
+#define PAD24_SEL_O_I_MSK 0xffff8fff
+#define PAD24_SEL_O_SFT 12
+#define PAD24_SEL_O_HI 14
+#define PAD24_SEL_O_SZ 3
+#define GPIO_TEST_4_ID_MSK 0x10000000
+#define GPIO_TEST_4_ID_I_MSK 0xefffffff
+#define GPIO_TEST_4_ID_SFT 28
+#define GPIO_TEST_4_ID_HI 28
+#define GPIO_TEST_4_ID_SZ 1
+#define PAD25_OE_MSK 0x00000001
+#define PAD25_OE_I_MSK 0xfffffffe
+#define PAD25_OE_SFT 0
+#define PAD25_OE_HI 0
+#define PAD25_OE_SZ 1
+#define PAD25_PE_MSK 0x00000002
+#define PAD25_PE_I_MSK 0xfffffffd
+#define PAD25_PE_SFT 1
+#define PAD25_PE_HI 1
+#define PAD25_PE_SZ 1
+#define PAD25_DS_MSK 0x00000004
+#define PAD25_DS_I_MSK 0xfffffffb
+#define PAD25_DS_SFT 2
+#define PAD25_DS_HI 2
+#define PAD25_DS_SZ 1
+#define PAD25_IE_MSK 0x00000008
+#define PAD25_IE_I_MSK 0xfffffff7
+#define PAD25_IE_SFT 3
+#define PAD25_IE_HI 3
+#define PAD25_IE_SZ 1
+#define PAD25_SEL_I_MSK 0x00000070
+#define PAD25_SEL_I_I_MSK 0xffffff8f
+#define PAD25_SEL_I_SFT 4
+#define PAD25_SEL_I_HI 6
+#define PAD25_SEL_I_SZ 3
+#define PAD25_OD_MSK 0x00000100
+#define PAD25_OD_I_MSK 0xfffffeff
+#define PAD25_OD_SFT 8
+#define PAD25_OD_HI 8
+#define PAD25_OD_SZ 1
+#define PAD25_SEL_O_MSK 0x00007000
+#define PAD25_SEL_O_I_MSK 0xffff8fff
+#define PAD25_SEL_O_SFT 12
+#define PAD25_SEL_O_HI 14
+#define PAD25_SEL_O_SZ 3
+#define PAD25_SEL_OE_MSK 0x00100000
+#define PAD25_SEL_OE_I_MSK 0xffefffff
+#define PAD25_SEL_OE_SFT 20
+#define PAD25_SEL_OE_HI 20
+#define PAD25_SEL_OE_SZ 1
+#define STRAP1_MSK 0x08000000
+#define STRAP1_I_MSK 0xf7ffffff
+#define STRAP1_SFT 27
+#define STRAP1_HI 27
+#define STRAP1_SZ 1
+#define GPIO_1_ID_MSK 0x10000000
+#define GPIO_1_ID_I_MSK 0xefffffff
+#define GPIO_1_ID_SFT 28
+#define GPIO_1_ID_HI 28
+#define GPIO_1_ID_SZ 1
+#define PAD27_OE_MSK 0x00000001
+#define PAD27_OE_I_MSK 0xfffffffe
+#define PAD27_OE_SFT 0
+#define PAD27_OE_HI 0
+#define PAD27_OE_SZ 1
+#define PAD27_PE_MSK 0x00000002
+#define PAD27_PE_I_MSK 0xfffffffd
+#define PAD27_PE_SFT 1
+#define PAD27_PE_HI 1
+#define PAD27_PE_SZ 1
+#define PAD27_DS_MSK 0x00000004
+#define PAD27_DS_I_MSK 0xfffffffb
+#define PAD27_DS_SFT 2
+#define PAD27_DS_HI 2
+#define PAD27_DS_SZ 1
+#define PAD27_IE_MSK 0x00000008
+#define PAD27_IE_I_MSK 0xfffffff7
+#define PAD27_IE_SFT 3
+#define PAD27_IE_HI 3
+#define PAD27_IE_SZ 1
+#define PAD27_SEL_I_MSK 0x00000070
+#define PAD27_SEL_I_I_MSK 0xffffff8f
+#define PAD27_SEL_I_SFT 4
+#define PAD27_SEL_I_HI 6
+#define PAD27_SEL_I_SZ 3
+#define PAD27_OD_MSK 0x00000100
+#define PAD27_OD_I_MSK 0xfffffeff
+#define PAD27_OD_SFT 8
+#define PAD27_OD_HI 8
+#define PAD27_OD_SZ 1
+#define PAD27_SEL_O_MSK 0x00007000
+#define PAD27_SEL_O_I_MSK 0xffff8fff
+#define PAD27_SEL_O_SFT 12
+#define PAD27_SEL_O_HI 14
+#define PAD27_SEL_O_SZ 3
+#define GPIO_2_ID_MSK 0x10000000
+#define GPIO_2_ID_I_MSK 0xefffffff
+#define GPIO_2_ID_SFT 28
+#define GPIO_2_ID_HI 28
+#define GPIO_2_ID_SZ 1
+#define PAD28_OE_MSK 0x00000001
+#define PAD28_OE_I_MSK 0xfffffffe
+#define PAD28_OE_SFT 0
+#define PAD28_OE_HI 0
+#define PAD28_OE_SZ 1
+#define PAD28_PE_MSK 0x00000002
+#define PAD28_PE_I_MSK 0xfffffffd
+#define PAD28_PE_SFT 1
+#define PAD28_PE_HI 1
+#define PAD28_PE_SZ 1
+#define PAD28_DS_MSK 0x00000004
+#define PAD28_DS_I_MSK 0xfffffffb
+#define PAD28_DS_SFT 2
+#define PAD28_DS_HI 2
+#define PAD28_DS_SZ 1
+#define PAD28_IE_MSK 0x00000008
+#define PAD28_IE_I_MSK 0xfffffff7
+#define PAD28_IE_SFT 3
+#define PAD28_IE_HI 3
+#define PAD28_IE_SZ 1
+#define PAD28_SEL_I_MSK 0x00000070
+#define PAD28_SEL_I_I_MSK 0xffffff8f
+#define PAD28_SEL_I_SFT 4
+#define PAD28_SEL_I_HI 6
+#define PAD28_SEL_I_SZ 3
+#define PAD28_OD_MSK 0x00000100
+#define PAD28_OD_I_MSK 0xfffffeff
+#define PAD28_OD_SFT 8
+#define PAD28_OD_HI 8
+#define PAD28_OD_SZ 1
+#define PAD28_SEL_O_MSK 0x0000f000
+#define PAD28_SEL_O_I_MSK 0xffff0fff
+#define PAD28_SEL_O_SFT 12
+#define PAD28_SEL_O_HI 15
+#define PAD28_SEL_O_SZ 4
+#define PAD28_SEL_OE_MSK 0x00100000
+#define PAD28_SEL_OE_I_MSK 0xffefffff
+#define PAD28_SEL_OE_SFT 20
+#define PAD28_SEL_OE_HI 20
+#define PAD28_SEL_OE_SZ 1
+#define GPIO_3_ID_MSK 0x10000000
+#define GPIO_3_ID_I_MSK 0xefffffff
+#define GPIO_3_ID_SFT 28
+#define GPIO_3_ID_HI 28
+#define GPIO_3_ID_SZ 1
+#define PAD29_OE_MSK 0x00000001
+#define PAD29_OE_I_MSK 0xfffffffe
+#define PAD29_OE_SFT 0
+#define PAD29_OE_HI 0
+#define PAD29_OE_SZ 1
+#define PAD29_PE_MSK 0x00000002
+#define PAD29_PE_I_MSK 0xfffffffd
+#define PAD29_PE_SFT 1
+#define PAD29_PE_HI 1
+#define PAD29_PE_SZ 1
+#define PAD29_DS_MSK 0x00000004
+#define PAD29_DS_I_MSK 0xfffffffb
+#define PAD29_DS_SFT 2
+#define PAD29_DS_HI 2
+#define PAD29_DS_SZ 1
+#define PAD29_IE_MSK 0x00000008
+#define PAD29_IE_I_MSK 0xfffffff7
+#define PAD29_IE_SFT 3
+#define PAD29_IE_HI 3
+#define PAD29_IE_SZ 1
+#define PAD29_SEL_I_MSK 0x00000070
+#define PAD29_SEL_I_I_MSK 0xffffff8f
+#define PAD29_SEL_I_SFT 4
+#define PAD29_SEL_I_HI 6
+#define PAD29_SEL_I_SZ 3
+#define PAD29_OD_MSK 0x00000100
+#define PAD29_OD_I_MSK 0xfffffeff
+#define PAD29_OD_SFT 8
+#define PAD29_OD_HI 8
+#define PAD29_OD_SZ 1
+#define PAD29_SEL_O_MSK 0x00007000
+#define PAD29_SEL_O_I_MSK 0xffff8fff
+#define PAD29_SEL_O_SFT 12
+#define PAD29_SEL_O_HI 14
+#define PAD29_SEL_O_SZ 3
+#define GPIO_TEST_5_ID_MSK 0x10000000
+#define GPIO_TEST_5_ID_I_MSK 0xefffffff
+#define GPIO_TEST_5_ID_SFT 28
+#define GPIO_TEST_5_ID_HI 28
+#define GPIO_TEST_5_ID_SZ 1
+#define PAD30_OE_MSK 0x00000001
+#define PAD30_OE_I_MSK 0xfffffffe
+#define PAD30_OE_SFT 0
+#define PAD30_OE_HI 0
+#define PAD30_OE_SZ 1
+#define PAD30_PE_MSK 0x00000002
+#define PAD30_PE_I_MSK 0xfffffffd
+#define PAD30_PE_SFT 1
+#define PAD30_PE_HI 1
+#define PAD30_PE_SZ 1
+#define PAD30_DS_MSK 0x00000004
+#define PAD30_DS_I_MSK 0xfffffffb
+#define PAD30_DS_SFT 2
+#define PAD30_DS_HI 2
+#define PAD30_DS_SZ 1
+#define PAD30_IE_MSK 0x00000008
+#define PAD30_IE_I_MSK 0xfffffff7
+#define PAD30_IE_SFT 3
+#define PAD30_IE_HI 3
+#define PAD30_IE_SZ 1
+#define PAD30_SEL_I_MSK 0x00000030
+#define PAD30_SEL_I_I_MSK 0xffffffcf
+#define PAD30_SEL_I_SFT 4
+#define PAD30_SEL_I_HI 5
+#define PAD30_SEL_I_SZ 2
+#define PAD30_OD_MSK 0x00000100
+#define PAD30_OD_I_MSK 0xfffffeff
+#define PAD30_OD_SFT 8
+#define PAD30_OD_HI 8
+#define PAD30_OD_SZ 1
+#define PAD30_SEL_O_MSK 0x00003000
+#define PAD30_SEL_O_I_MSK 0xffffcfff
+#define PAD30_SEL_O_SFT 12
+#define PAD30_SEL_O_HI 13
+#define PAD30_SEL_O_SZ 2
+#define TEST_6_ID_MSK 0x10000000
+#define TEST_6_ID_I_MSK 0xefffffff
+#define TEST_6_ID_SFT 28
+#define TEST_6_ID_HI 28
+#define TEST_6_ID_SZ 1
+#define PAD31_OE_MSK 0x00000001
+#define PAD31_OE_I_MSK 0xfffffffe
+#define PAD31_OE_SFT 0
+#define PAD31_OE_HI 0
+#define PAD31_OE_SZ 1
+#define PAD31_PE_MSK 0x00000002
+#define PAD31_PE_I_MSK 0xfffffffd
+#define PAD31_PE_SFT 1
+#define PAD31_PE_HI 1
+#define PAD31_PE_SZ 1
+#define PAD31_DS_MSK 0x00000004
+#define PAD31_DS_I_MSK 0xfffffffb
+#define PAD31_DS_SFT 2
+#define PAD31_DS_HI 2
+#define PAD31_DS_SZ 1
+#define PAD31_IE_MSK 0x00000008
+#define PAD31_IE_I_MSK 0xfffffff7
+#define PAD31_IE_SFT 3
+#define PAD31_IE_HI 3
+#define PAD31_IE_SZ 1
+#define PAD31_SEL_I_MSK 0x00000030
+#define PAD31_SEL_I_I_MSK 0xffffffcf
+#define PAD31_SEL_I_SFT 4
+#define PAD31_SEL_I_HI 5
+#define PAD31_SEL_I_SZ 2
+#define PAD31_OD_MSK 0x00000100
+#define PAD31_OD_I_MSK 0xfffffeff
+#define PAD31_OD_SFT 8
+#define PAD31_OD_HI 8
+#define PAD31_OD_SZ 1
+#define PAD31_SEL_O_MSK 0x00003000
+#define PAD31_SEL_O_I_MSK 0xffffcfff
+#define PAD31_SEL_O_SFT 12
+#define PAD31_SEL_O_HI 13
+#define PAD31_SEL_O_SZ 2
+#define TEST_7_ID_MSK 0x10000000
+#define TEST_7_ID_I_MSK 0xefffffff
+#define TEST_7_ID_SFT 28
+#define TEST_7_ID_HI 28
+#define TEST_7_ID_SZ 1
+#define PAD32_OE_MSK 0x00000001
+#define PAD32_OE_I_MSK 0xfffffffe
+#define PAD32_OE_SFT 0
+#define PAD32_OE_HI 0
+#define PAD32_OE_SZ 1
+#define PAD32_PE_MSK 0x00000002
+#define PAD32_PE_I_MSK 0xfffffffd
+#define PAD32_PE_SFT 1
+#define PAD32_PE_HI 1
+#define PAD32_PE_SZ 1
+#define PAD32_DS_MSK 0x00000004
+#define PAD32_DS_I_MSK 0xfffffffb
+#define PAD32_DS_SFT 2
+#define PAD32_DS_HI 2
+#define PAD32_DS_SZ 1
+#define PAD32_IE_MSK 0x00000008
+#define PAD32_IE_I_MSK 0xfffffff7
+#define PAD32_IE_SFT 3
+#define PAD32_IE_HI 3
+#define PAD32_IE_SZ 1
+#define PAD32_SEL_I_MSK 0x00000030
+#define PAD32_SEL_I_I_MSK 0xffffffcf
+#define PAD32_SEL_I_SFT 4
+#define PAD32_SEL_I_HI 5
+#define PAD32_SEL_I_SZ 2
+#define PAD32_OD_MSK 0x00000100
+#define PAD32_OD_I_MSK 0xfffffeff
+#define PAD32_OD_SFT 8
+#define PAD32_OD_HI 8
+#define PAD32_OD_SZ 1
+#define PAD32_SEL_O_MSK 0x00003000
+#define PAD32_SEL_O_I_MSK 0xffffcfff
+#define PAD32_SEL_O_SFT 12
+#define PAD32_SEL_O_HI 13
+#define PAD32_SEL_O_SZ 2
+#define TEST_8_ID_MSK 0x10000000
+#define TEST_8_ID_I_MSK 0xefffffff
+#define TEST_8_ID_SFT 28
+#define TEST_8_ID_HI 28
+#define TEST_8_ID_SZ 1
+#define PAD33_OE_MSK 0x00000001
+#define PAD33_OE_I_MSK 0xfffffffe
+#define PAD33_OE_SFT 0
+#define PAD33_OE_HI 0
+#define PAD33_OE_SZ 1
+#define PAD33_PE_MSK 0x00000002
+#define PAD33_PE_I_MSK 0xfffffffd
+#define PAD33_PE_SFT 1
+#define PAD33_PE_HI 1
+#define PAD33_PE_SZ 1
+#define PAD33_DS_MSK 0x00000004
+#define PAD33_DS_I_MSK 0xfffffffb
+#define PAD33_DS_SFT 2
+#define PAD33_DS_HI 2
+#define PAD33_DS_SZ 1
+#define PAD33_IE_MSK 0x00000008
+#define PAD33_IE_I_MSK 0xfffffff7
+#define PAD33_IE_SFT 3
+#define PAD33_IE_HI 3
+#define PAD33_IE_SZ 1
+#define PAD33_SEL_I_MSK 0x00000030
+#define PAD33_SEL_I_I_MSK 0xffffffcf
+#define PAD33_SEL_I_SFT 4
+#define PAD33_SEL_I_HI 5
+#define PAD33_SEL_I_SZ 2
+#define PAD33_OD_MSK 0x00000100
+#define PAD33_OD_I_MSK 0xfffffeff
+#define PAD33_OD_SFT 8
+#define PAD33_OD_HI 8
+#define PAD33_OD_SZ 1
+#define PAD33_SEL_O_MSK 0x00003000
+#define PAD33_SEL_O_I_MSK 0xffffcfff
+#define PAD33_SEL_O_SFT 12
+#define PAD33_SEL_O_HI 13
+#define PAD33_SEL_O_SZ 2
+#define TEST_9_ID_MSK 0x10000000
+#define TEST_9_ID_I_MSK 0xefffffff
+#define TEST_9_ID_SFT 28
+#define TEST_9_ID_HI 28
+#define TEST_9_ID_SZ 1
+#define PAD34_OE_MSK 0x00000001
+#define PAD34_OE_I_MSK 0xfffffffe
+#define PAD34_OE_SFT 0
+#define PAD34_OE_HI 0
+#define PAD34_OE_SZ 1
+#define PAD34_PE_MSK 0x00000002
+#define PAD34_PE_I_MSK 0xfffffffd
+#define PAD34_PE_SFT 1
+#define PAD34_PE_HI 1
+#define PAD34_PE_SZ 1
+#define PAD34_DS_MSK 0x00000004
+#define PAD34_DS_I_MSK 0xfffffffb
+#define PAD34_DS_SFT 2
+#define PAD34_DS_HI 2
+#define PAD34_DS_SZ 1
+#define PAD34_IE_MSK 0x00000008
+#define PAD34_IE_I_MSK 0xfffffff7
+#define PAD34_IE_SFT 3
+#define PAD34_IE_HI 3
+#define PAD34_IE_SZ 1
+#define PAD34_SEL_I_MSK 0x00000030
+#define PAD34_SEL_I_I_MSK 0xffffffcf
+#define PAD34_SEL_I_SFT 4
+#define PAD34_SEL_I_HI 5
+#define PAD34_SEL_I_SZ 2
+#define PAD34_OD_MSK 0x00000100
+#define PAD34_OD_I_MSK 0xfffffeff
+#define PAD34_OD_SFT 8
+#define PAD34_OD_HI 8
+#define PAD34_OD_SZ 1
+#define PAD34_SEL_O_MSK 0x00003000
+#define PAD34_SEL_O_I_MSK 0xffffcfff
+#define PAD34_SEL_O_SFT 12
+#define PAD34_SEL_O_HI 13
+#define PAD34_SEL_O_SZ 2
+#define TEST_10_ID_MSK 0x10000000
+#define TEST_10_ID_I_MSK 0xefffffff
+#define TEST_10_ID_SFT 28
+#define TEST_10_ID_HI 28
+#define TEST_10_ID_SZ 1
+#define PAD42_OE_MSK 0x00000001
+#define PAD42_OE_I_MSK 0xfffffffe
+#define PAD42_OE_SFT 0
+#define PAD42_OE_HI 0
+#define PAD42_OE_SZ 1
+#define PAD42_PE_MSK 0x00000002
+#define PAD42_PE_I_MSK 0xfffffffd
+#define PAD42_PE_SFT 1
+#define PAD42_PE_HI 1
+#define PAD42_PE_SZ 1
+#define PAD42_DS_MSK 0x00000004
+#define PAD42_DS_I_MSK 0xfffffffb
+#define PAD42_DS_SFT 2
+#define PAD42_DS_HI 2
+#define PAD42_DS_SZ 1
+#define PAD42_IE_MSK 0x00000008
+#define PAD42_IE_I_MSK 0xfffffff7
+#define PAD42_IE_SFT 3
+#define PAD42_IE_HI 3
+#define PAD42_IE_SZ 1
+#define PAD42_SEL_I_MSK 0x00000030
+#define PAD42_SEL_I_I_MSK 0xffffffcf
+#define PAD42_SEL_I_SFT 4
+#define PAD42_SEL_I_HI 5
+#define PAD42_SEL_I_SZ 2
+#define PAD42_OD_MSK 0x00000100
+#define PAD42_OD_I_MSK 0xfffffeff
+#define PAD42_OD_SFT 8
+#define PAD42_OD_HI 8
+#define PAD42_OD_SZ 1
+#define PAD42_SEL_O_MSK 0x00001000
+#define PAD42_SEL_O_I_MSK 0xffffefff
+#define PAD42_SEL_O_SFT 12
+#define PAD42_SEL_O_HI 12
+#define PAD42_SEL_O_SZ 1
+#define TEST_11_ID_MSK 0x10000000
+#define TEST_11_ID_I_MSK 0xefffffff
+#define TEST_11_ID_SFT 28
+#define TEST_11_ID_HI 28
+#define TEST_11_ID_SZ 1
+#define PAD43_OE_MSK 0x00000001
+#define PAD43_OE_I_MSK 0xfffffffe
+#define PAD43_OE_SFT 0
+#define PAD43_OE_HI 0
+#define PAD43_OE_SZ 1
+#define PAD43_PE_MSK 0x00000002
+#define PAD43_PE_I_MSK 0xfffffffd
+#define PAD43_PE_SFT 1
+#define PAD43_PE_HI 1
+#define PAD43_PE_SZ 1
+#define PAD43_DS_MSK 0x00000004
+#define PAD43_DS_I_MSK 0xfffffffb
+#define PAD43_DS_SFT 2
+#define PAD43_DS_HI 2
+#define PAD43_DS_SZ 1
+#define PAD43_IE_MSK 0x00000008
+#define PAD43_IE_I_MSK 0xfffffff7
+#define PAD43_IE_SFT 3
+#define PAD43_IE_HI 3
+#define PAD43_IE_SZ 1
+#define PAD43_SEL_I_MSK 0x00000030
+#define PAD43_SEL_I_I_MSK 0xffffffcf
+#define PAD43_SEL_I_SFT 4
+#define PAD43_SEL_I_HI 5
+#define PAD43_SEL_I_SZ 2
+#define PAD43_OD_MSK 0x00000100
+#define PAD43_OD_I_MSK 0xfffffeff
+#define PAD43_OD_SFT 8
+#define PAD43_OD_HI 8
+#define PAD43_OD_SZ 1
+#define PAD43_SEL_O_MSK 0x00001000
+#define PAD43_SEL_O_I_MSK 0xffffefff
+#define PAD43_SEL_O_SFT 12
+#define PAD43_SEL_O_HI 12
+#define PAD43_SEL_O_SZ 1
+#define TEST_12_ID_MSK 0x10000000
+#define TEST_12_ID_I_MSK 0xefffffff
+#define TEST_12_ID_SFT 28
+#define TEST_12_ID_HI 28
+#define TEST_12_ID_SZ 1
+#define PAD44_OE_MSK 0x00000001
+#define PAD44_OE_I_MSK 0xfffffffe
+#define PAD44_OE_SFT 0
+#define PAD44_OE_HI 0
+#define PAD44_OE_SZ 1
+#define PAD44_PE_MSK 0x00000002
+#define PAD44_PE_I_MSK 0xfffffffd
+#define PAD44_PE_SFT 1
+#define PAD44_PE_HI 1
+#define PAD44_PE_SZ 1
+#define PAD44_DS_MSK 0x00000004
+#define PAD44_DS_I_MSK 0xfffffffb
+#define PAD44_DS_SFT 2
+#define PAD44_DS_HI 2
+#define PAD44_DS_SZ 1
+#define PAD44_IE_MSK 0x00000008
+#define PAD44_IE_I_MSK 0xfffffff7
+#define PAD44_IE_SFT 3
+#define PAD44_IE_HI 3
+#define PAD44_IE_SZ 1
+#define PAD44_SEL_I_MSK 0x00000030
+#define PAD44_SEL_I_I_MSK 0xffffffcf
+#define PAD44_SEL_I_SFT 4
+#define PAD44_SEL_I_HI 5
+#define PAD44_SEL_I_SZ 2
+#define PAD44_OD_MSK 0x00000100
+#define PAD44_OD_I_MSK 0xfffffeff
+#define PAD44_OD_SFT 8
+#define PAD44_OD_HI 8
+#define PAD44_OD_SZ 1
+#define PAD44_SEL_O_MSK 0x00003000
+#define PAD44_SEL_O_I_MSK 0xffffcfff
+#define PAD44_SEL_O_SFT 12
+#define PAD44_SEL_O_HI 13
+#define PAD44_SEL_O_SZ 2
+#define TEST_13_ID_MSK 0x10000000
+#define TEST_13_ID_I_MSK 0xefffffff
+#define TEST_13_ID_SFT 28
+#define TEST_13_ID_HI 28
+#define TEST_13_ID_SZ 1
+#define PAD45_OE_MSK 0x00000001
+#define PAD45_OE_I_MSK 0xfffffffe
+#define PAD45_OE_SFT 0
+#define PAD45_OE_HI 0
+#define PAD45_OE_SZ 1
+#define PAD45_PE_MSK 0x00000002
+#define PAD45_PE_I_MSK 0xfffffffd
+#define PAD45_PE_SFT 1
+#define PAD45_PE_HI 1
+#define PAD45_PE_SZ 1
+#define PAD45_DS_MSK 0x00000004
+#define PAD45_DS_I_MSK 0xfffffffb
+#define PAD45_DS_SFT 2
+#define PAD45_DS_HI 2
+#define PAD45_DS_SZ 1
+#define PAD45_IE_MSK 0x00000008
+#define PAD45_IE_I_MSK 0xfffffff7
+#define PAD45_IE_SFT 3
+#define PAD45_IE_HI 3
+#define PAD45_IE_SZ 1
+#define PAD45_SEL_I_MSK 0x00000030
+#define PAD45_SEL_I_I_MSK 0xffffffcf
+#define PAD45_SEL_I_SFT 4
+#define PAD45_SEL_I_HI 5
+#define PAD45_SEL_I_SZ 2
+#define PAD45_OD_MSK 0x00000100
+#define PAD45_OD_I_MSK 0xfffffeff
+#define PAD45_OD_SFT 8
+#define PAD45_OD_HI 8
+#define PAD45_OD_SZ 1
+#define PAD45_SEL_O_MSK 0x00003000
+#define PAD45_SEL_O_I_MSK 0xffffcfff
+#define PAD45_SEL_O_SFT 12
+#define PAD45_SEL_O_HI 13
+#define PAD45_SEL_O_SZ 2
+#define TEST_14_ID_MSK 0x10000000
+#define TEST_14_ID_I_MSK 0xefffffff
+#define TEST_14_ID_SFT 28
+#define TEST_14_ID_HI 28
+#define TEST_14_ID_SZ 1
+#define PAD46_OE_MSK 0x00000001
+#define PAD46_OE_I_MSK 0xfffffffe
+#define PAD46_OE_SFT 0
+#define PAD46_OE_HI 0
+#define PAD46_OE_SZ 1
+#define PAD46_PE_MSK 0x00000002
+#define PAD46_PE_I_MSK 0xfffffffd
+#define PAD46_PE_SFT 1
+#define PAD46_PE_HI 1
+#define PAD46_PE_SZ 1
+#define PAD46_DS_MSK 0x00000004
+#define PAD46_DS_I_MSK 0xfffffffb
+#define PAD46_DS_SFT 2
+#define PAD46_DS_HI 2
+#define PAD46_DS_SZ 1
+#define PAD46_IE_MSK 0x00000008
+#define PAD46_IE_I_MSK 0xfffffff7
+#define PAD46_IE_SFT 3
+#define PAD46_IE_HI 3
+#define PAD46_IE_SZ 1
+#define PAD46_SEL_I_MSK 0x00000030
+#define PAD46_SEL_I_I_MSK 0xffffffcf
+#define PAD46_SEL_I_SFT 4
+#define PAD46_SEL_I_HI 5
+#define PAD46_SEL_I_SZ 2
+#define PAD46_OD_MSK 0x00000100
+#define PAD46_OD_I_MSK 0xfffffeff
+#define PAD46_OD_SFT 8
+#define PAD46_OD_HI 8
+#define PAD46_OD_SZ 1
+#define PAD46_SEL_O_MSK 0x00003000
+#define PAD46_SEL_O_I_MSK 0xffffcfff
+#define PAD46_SEL_O_SFT 12
+#define PAD46_SEL_O_HI 13
+#define PAD46_SEL_O_SZ 2
+#define TEST_15_ID_MSK 0x10000000
+#define TEST_15_ID_I_MSK 0xefffffff
+#define TEST_15_ID_SFT 28
+#define TEST_15_ID_HI 28
+#define TEST_15_ID_SZ 1
+#define PAD47_OE_MSK 0x00000001
+#define PAD47_OE_I_MSK 0xfffffffe
+#define PAD47_OE_SFT 0
+#define PAD47_OE_HI 0
+#define PAD47_OE_SZ 1
+#define PAD47_PE_MSK 0x00000002
+#define PAD47_PE_I_MSK 0xfffffffd
+#define PAD47_PE_SFT 1
+#define PAD47_PE_HI 1
+#define PAD47_PE_SZ 1
+#define PAD47_DS_MSK 0x00000004
+#define PAD47_DS_I_MSK 0xfffffffb
+#define PAD47_DS_SFT 2
+#define PAD47_DS_HI 2
+#define PAD47_DS_SZ 1
+#define PAD47_SEL_I_MSK 0x00000030
+#define PAD47_SEL_I_I_MSK 0xffffffcf
+#define PAD47_SEL_I_SFT 4
+#define PAD47_SEL_I_HI 5
+#define PAD47_SEL_I_SZ 2
+#define PAD47_OD_MSK 0x00000100
+#define PAD47_OD_I_MSK 0xfffffeff
+#define PAD47_OD_SFT 8
+#define PAD47_OD_HI 8
+#define PAD47_OD_SZ 1
+#define PAD47_SEL_O_MSK 0x00003000
+#define PAD47_SEL_O_I_MSK 0xffffcfff
+#define PAD47_SEL_O_SFT 12
+#define PAD47_SEL_O_HI 13
+#define PAD47_SEL_O_SZ 2
+#define PAD47_SEL_OE_MSK 0x00100000
+#define PAD47_SEL_OE_I_MSK 0xffefffff
+#define PAD47_SEL_OE_SFT 20
+#define PAD47_SEL_OE_HI 20
+#define PAD47_SEL_OE_SZ 1
+#define GPIO_9_ID_MSK 0x10000000
+#define GPIO_9_ID_I_MSK 0xefffffff
+#define GPIO_9_ID_SFT 28
+#define GPIO_9_ID_HI 28
+#define GPIO_9_ID_SZ 1
+#define PAD48_OE_MSK 0x00000001
+#define PAD48_OE_I_MSK 0xfffffffe
+#define PAD48_OE_SFT 0
+#define PAD48_OE_HI 0
+#define PAD48_OE_SZ 1
+#define PAD48_PE_MSK 0x00000002
+#define PAD48_PE_I_MSK 0xfffffffd
+#define PAD48_PE_SFT 1
+#define PAD48_PE_HI 1
+#define PAD48_PE_SZ 1
+#define PAD48_DS_MSK 0x00000004
+#define PAD48_DS_I_MSK 0xfffffffb
+#define PAD48_DS_SFT 2
+#define PAD48_DS_HI 2
+#define PAD48_DS_SZ 1
+#define PAD48_IE_MSK 0x00000008
+#define PAD48_IE_I_MSK 0xfffffff7
+#define PAD48_IE_SFT 3
+#define PAD48_IE_HI 3
+#define PAD48_IE_SZ 1
+#define PAD48_SEL_I_MSK 0x00000070
+#define PAD48_SEL_I_I_MSK 0xffffff8f
+#define PAD48_SEL_I_SFT 4
+#define PAD48_SEL_I_HI 6
+#define PAD48_SEL_I_SZ 3
+#define PAD48_OD_MSK 0x00000100
+#define PAD48_OD_I_MSK 0xfffffeff
+#define PAD48_OD_SFT 8
+#define PAD48_OD_HI 8
+#define PAD48_OD_SZ 1
+#define PAD48_PE_SEL_MSK 0x00000800
+#define PAD48_PE_SEL_I_MSK 0xfffff7ff
+#define PAD48_PE_SEL_SFT 11
+#define PAD48_PE_SEL_HI 11
+#define PAD48_PE_SEL_SZ 1
+#define PAD48_SEL_O_MSK 0x00003000
+#define PAD48_SEL_O_I_MSK 0xffffcfff
+#define PAD48_SEL_O_SFT 12
+#define PAD48_SEL_O_HI 13
+#define PAD48_SEL_O_SZ 2
+#define PAD48_SEL_OE_MSK 0x00100000
+#define PAD48_SEL_OE_I_MSK 0xffefffff
+#define PAD48_SEL_OE_SFT 20
+#define PAD48_SEL_OE_HI 20
+#define PAD48_SEL_OE_SZ 1
+#define GPIO_10_ID_MSK 0x10000000
+#define GPIO_10_ID_I_MSK 0xefffffff
+#define GPIO_10_ID_SFT 28
+#define GPIO_10_ID_HI 28
+#define GPIO_10_ID_SZ 1
+#define PAD49_OE_MSK 0x00000001
+#define PAD49_OE_I_MSK 0xfffffffe
+#define PAD49_OE_SFT 0
+#define PAD49_OE_HI 0
+#define PAD49_OE_SZ 1
+#define PAD49_PE_MSK 0x00000002
+#define PAD49_PE_I_MSK 0xfffffffd
+#define PAD49_PE_SFT 1
+#define PAD49_PE_HI 1
+#define PAD49_PE_SZ 1
+#define PAD49_DS_MSK 0x00000004
+#define PAD49_DS_I_MSK 0xfffffffb
+#define PAD49_DS_SFT 2
+#define PAD49_DS_HI 2
+#define PAD49_DS_SZ 1
+#define PAD49_IE_MSK 0x00000008
+#define PAD49_IE_I_MSK 0xfffffff7
+#define PAD49_IE_SFT 3
+#define PAD49_IE_HI 3
+#define PAD49_IE_SZ 1
+#define PAD49_SEL_I_MSK 0x00000070
+#define PAD49_SEL_I_I_MSK 0xffffff8f
+#define PAD49_SEL_I_SFT 4
+#define PAD49_SEL_I_HI 6
+#define PAD49_SEL_I_SZ 3
+#define PAD49_OD_MSK 0x00000100
+#define PAD49_OD_I_MSK 0xfffffeff
+#define PAD49_OD_SFT 8
+#define PAD49_OD_HI 8
+#define PAD49_OD_SZ 1
+#define PAD49_SEL_O_MSK 0x00003000
+#define PAD49_SEL_O_I_MSK 0xffffcfff
+#define PAD49_SEL_O_SFT 12
+#define PAD49_SEL_O_HI 13
+#define PAD49_SEL_O_SZ 2
+#define PAD49_SEL_OE_MSK 0x00100000
+#define PAD49_SEL_OE_I_MSK 0xffefffff
+#define PAD49_SEL_OE_SFT 20
+#define PAD49_SEL_OE_HI 20
+#define PAD49_SEL_OE_SZ 1
+#define GPIO_11_ID_MSK 0x10000000
+#define GPIO_11_ID_I_MSK 0xefffffff
+#define GPIO_11_ID_SFT 28
+#define GPIO_11_ID_HI 28
+#define GPIO_11_ID_SZ 1
+#define PAD50_OE_MSK 0x00000001
+#define PAD50_OE_I_MSK 0xfffffffe
+#define PAD50_OE_SFT 0
+#define PAD50_OE_HI 0
+#define PAD50_OE_SZ 1
+#define PAD50_PE_MSK 0x00000002
+#define PAD50_PE_I_MSK 0xfffffffd
+#define PAD50_PE_SFT 1
+#define PAD50_PE_HI 1
+#define PAD50_PE_SZ 1
+#define PAD50_DS_MSK 0x00000004
+#define PAD50_DS_I_MSK 0xfffffffb
+#define PAD50_DS_SFT 2
+#define PAD50_DS_HI 2
+#define PAD50_DS_SZ 1
+#define PAD50_IE_MSK 0x00000008
+#define PAD50_IE_I_MSK 0xfffffff7
+#define PAD50_IE_SFT 3
+#define PAD50_IE_HI 3
+#define PAD50_IE_SZ 1
+#define PAD50_SEL_I_MSK 0x00000070
+#define PAD50_SEL_I_I_MSK 0xffffff8f
+#define PAD50_SEL_I_SFT 4
+#define PAD50_SEL_I_HI 6
+#define PAD50_SEL_I_SZ 3
+#define PAD50_OD_MSK 0x00000100
+#define PAD50_OD_I_MSK 0xfffffeff
+#define PAD50_OD_SFT 8
+#define PAD50_OD_HI 8
+#define PAD50_OD_SZ 1
+#define PAD50_SEL_O_MSK 0x00003000
+#define PAD50_SEL_O_I_MSK 0xffffcfff
+#define PAD50_SEL_O_SFT 12
+#define PAD50_SEL_O_HI 13
+#define PAD50_SEL_O_SZ 2
+#define PAD50_SEL_OE_MSK 0x00100000
+#define PAD50_SEL_OE_I_MSK 0xffefffff
+#define PAD50_SEL_OE_SFT 20
+#define PAD50_SEL_OE_HI 20
+#define PAD50_SEL_OE_SZ 1
+#define GPIO_12_ID_MSK 0x10000000
+#define GPIO_12_ID_I_MSK 0xefffffff
+#define GPIO_12_ID_SFT 28
+#define GPIO_12_ID_HI 28
+#define GPIO_12_ID_SZ 1
+#define PAD51_OE_MSK 0x00000001
+#define PAD51_OE_I_MSK 0xfffffffe
+#define PAD51_OE_SFT 0
+#define PAD51_OE_HI 0
+#define PAD51_OE_SZ 1
+#define PAD51_PE_MSK 0x00000002
+#define PAD51_PE_I_MSK 0xfffffffd
+#define PAD51_PE_SFT 1
+#define PAD51_PE_HI 1
+#define PAD51_PE_SZ 1
+#define PAD51_DS_MSK 0x00000004
+#define PAD51_DS_I_MSK 0xfffffffb
+#define PAD51_DS_SFT 2
+#define PAD51_DS_HI 2
+#define PAD51_DS_SZ 1
+#define PAD51_IE_MSK 0x00000008
+#define PAD51_IE_I_MSK 0xfffffff7
+#define PAD51_IE_SFT 3
+#define PAD51_IE_HI 3
+#define PAD51_IE_SZ 1
+#define PAD51_SEL_I_MSK 0x00000030
+#define PAD51_SEL_I_I_MSK 0xffffffcf
+#define PAD51_SEL_I_SFT 4
+#define PAD51_SEL_I_HI 5
+#define PAD51_SEL_I_SZ 2
+#define PAD51_OD_MSK 0x00000100
+#define PAD51_OD_I_MSK 0xfffffeff
+#define PAD51_OD_SFT 8
+#define PAD51_OD_HI 8
+#define PAD51_OD_SZ 1
+#define PAD51_SEL_O_MSK 0x00001000
+#define PAD51_SEL_O_I_MSK 0xffffefff
+#define PAD51_SEL_O_SFT 12
+#define PAD51_SEL_O_HI 12
+#define PAD51_SEL_O_SZ 1
+#define PAD51_SEL_OE_MSK 0x00100000
+#define PAD51_SEL_OE_I_MSK 0xffefffff
+#define PAD51_SEL_OE_SFT 20
+#define PAD51_SEL_OE_HI 20
+#define PAD51_SEL_OE_SZ 1
+#define GPIO_13_ID_MSK 0x10000000
+#define GPIO_13_ID_I_MSK 0xefffffff
+#define GPIO_13_ID_SFT 28
+#define GPIO_13_ID_HI 28
+#define GPIO_13_ID_SZ 1
+#define PAD52_OE_MSK 0x00000001
+#define PAD52_OE_I_MSK 0xfffffffe
+#define PAD52_OE_SFT 0
+#define PAD52_OE_HI 0
+#define PAD52_OE_SZ 1
+#define PAD52_PE_MSK 0x00000002
+#define PAD52_PE_I_MSK 0xfffffffd
+#define PAD52_PE_SFT 1
+#define PAD52_PE_HI 1
+#define PAD52_PE_SZ 1
+#define PAD52_DS_MSK 0x00000004
+#define PAD52_DS_I_MSK 0xfffffffb
+#define PAD52_DS_SFT 2
+#define PAD52_DS_HI 2
+#define PAD52_DS_SZ 1
+#define PAD52_SEL_I_MSK 0x00000030
+#define PAD52_SEL_I_I_MSK 0xffffffcf
+#define PAD52_SEL_I_SFT 4
+#define PAD52_SEL_I_HI 5
+#define PAD52_SEL_I_SZ 2
+#define PAD52_OD_MSK 0x00000100
+#define PAD52_OD_I_MSK 0xfffffeff
+#define PAD52_OD_SFT 8
+#define PAD52_OD_HI 8
+#define PAD52_OD_SZ 1
+#define PAD52_SEL_O_MSK 0x00001000
+#define PAD52_SEL_O_I_MSK 0xffffefff
+#define PAD52_SEL_O_SFT 12
+#define PAD52_SEL_O_HI 12
+#define PAD52_SEL_O_SZ 1
+#define PAD52_SEL_OE_MSK 0x00100000
+#define PAD52_SEL_OE_I_MSK 0xffefffff
+#define PAD52_SEL_OE_SFT 20
+#define PAD52_SEL_OE_HI 20
+#define PAD52_SEL_OE_SZ 1
+#define GPIO_14_ID_MSK 0x10000000
+#define GPIO_14_ID_I_MSK 0xefffffff
+#define GPIO_14_ID_SFT 28
+#define GPIO_14_ID_HI 28
+#define GPIO_14_ID_SZ 1
+#define PAD53_OE_MSK 0x00000001
+#define PAD53_OE_I_MSK 0xfffffffe
+#define PAD53_OE_SFT 0
+#define PAD53_OE_HI 0
+#define PAD53_OE_SZ 1
+#define PAD53_PE_MSK 0x00000002
+#define PAD53_PE_I_MSK 0xfffffffd
+#define PAD53_PE_SFT 1
+#define PAD53_PE_HI 1
+#define PAD53_PE_SZ 1
+#define PAD53_DS_MSK 0x00000004
+#define PAD53_DS_I_MSK 0xfffffffb
+#define PAD53_DS_SFT 2
+#define PAD53_DS_HI 2
+#define PAD53_DS_SZ 1
+#define PAD53_IE_MSK 0x00000008
+#define PAD53_IE_I_MSK 0xfffffff7
+#define PAD53_IE_SFT 3
+#define PAD53_IE_HI 3
+#define PAD53_IE_SZ 1
+#define PAD53_SEL_I_MSK 0x00000030
+#define PAD53_SEL_I_I_MSK 0xffffffcf
+#define PAD53_SEL_I_SFT 4
+#define PAD53_SEL_I_HI 5
+#define PAD53_SEL_I_SZ 2
+#define PAD53_OD_MSK 0x00000100
+#define PAD53_OD_I_MSK 0xfffffeff
+#define PAD53_OD_SFT 8
+#define PAD53_OD_HI 8
+#define PAD53_OD_SZ 1
+#define PAD53_SEL_O_MSK 0x00001000
+#define PAD53_SEL_O_I_MSK 0xffffefff
+#define PAD53_SEL_O_SFT 12
+#define PAD53_SEL_O_HI 12
+#define PAD53_SEL_O_SZ 1
+#define JTAG_TMS_ID_MSK 0x10000000
+#define JTAG_TMS_ID_I_MSK 0xefffffff
+#define JTAG_TMS_ID_SFT 28
+#define JTAG_TMS_ID_HI 28
+#define JTAG_TMS_ID_SZ 1
+#define PAD54_OE_MSK 0x00000001
+#define PAD54_OE_I_MSK 0xfffffffe
+#define PAD54_OE_SFT 0
+#define PAD54_OE_HI 0
+#define PAD54_OE_SZ 1
+#define PAD54_PE_MSK 0x00000002
+#define PAD54_PE_I_MSK 0xfffffffd
+#define PAD54_PE_SFT 1
+#define PAD54_PE_HI 1
+#define PAD54_PE_SZ 1
+#define PAD54_DS_MSK 0x00000004
+#define PAD54_DS_I_MSK 0xfffffffb
+#define PAD54_DS_SFT 2
+#define PAD54_DS_HI 2
+#define PAD54_DS_SZ 1
+#define PAD54_OD_MSK 0x00000100
+#define PAD54_OD_I_MSK 0xfffffeff
+#define PAD54_OD_SFT 8
+#define PAD54_OD_HI 8
+#define PAD54_OD_SZ 1
+#define PAD54_SEL_O_MSK 0x00003000
+#define PAD54_SEL_O_I_MSK 0xffffcfff
+#define PAD54_SEL_O_SFT 12
+#define PAD54_SEL_O_HI 13
+#define PAD54_SEL_O_SZ 2
+#define JTAG_TCK_ID_MSK 0x10000000
+#define JTAG_TCK_ID_I_MSK 0xefffffff
+#define JTAG_TCK_ID_SFT 28
+#define JTAG_TCK_ID_HI 28
+#define JTAG_TCK_ID_SZ 1
+#define PAD56_PE_MSK 0x00000002
+#define PAD56_PE_I_MSK 0xfffffffd
+#define PAD56_PE_SFT 1
+#define PAD56_PE_HI 1
+#define PAD56_PE_SZ 1
+#define PAD56_DS_MSK 0x00000004
+#define PAD56_DS_I_MSK 0xfffffffb
+#define PAD56_DS_SFT 2
+#define PAD56_DS_HI 2
+#define PAD56_DS_SZ 1
+#define PAD56_SEL_I_MSK 0x00000010
+#define PAD56_SEL_I_I_MSK 0xffffffef
+#define PAD56_SEL_I_SFT 4
+#define PAD56_SEL_I_HI 4
+#define PAD56_SEL_I_SZ 1
+#define PAD56_OD_MSK 0x00000100
+#define PAD56_OD_I_MSK 0xfffffeff
+#define PAD56_OD_SFT 8
+#define PAD56_OD_HI 8
+#define PAD56_OD_SZ 1
+#define JTAG_TDI_ID_MSK 0x10000000
+#define JTAG_TDI_ID_I_MSK 0xefffffff
+#define JTAG_TDI_ID_SFT 28
+#define JTAG_TDI_ID_HI 28
+#define JTAG_TDI_ID_SZ 1
+#define PAD57_OE_MSK 0x00000001
+#define PAD57_OE_I_MSK 0xfffffffe
+#define PAD57_OE_SFT 0
+#define PAD57_OE_HI 0
+#define PAD57_OE_SZ 1
+#define PAD57_PE_MSK 0x00000002
+#define PAD57_PE_I_MSK 0xfffffffd
+#define PAD57_PE_SFT 1
+#define PAD57_PE_HI 1
+#define PAD57_PE_SZ 1
+#define PAD57_DS_MSK 0x00000004
+#define PAD57_DS_I_MSK 0xfffffffb
+#define PAD57_DS_SFT 2
+#define PAD57_DS_HI 2
+#define PAD57_DS_SZ 1
+#define PAD57_IE_MSK 0x00000008
+#define PAD57_IE_I_MSK 0xfffffff7
+#define PAD57_IE_SFT 3
+#define PAD57_IE_HI 3
+#define PAD57_IE_SZ 1
+#define PAD57_SEL_I_MSK 0x00000030
+#define PAD57_SEL_I_I_MSK 0xffffffcf
+#define PAD57_SEL_I_SFT 4
+#define PAD57_SEL_I_HI 5
+#define PAD57_SEL_I_SZ 2
+#define PAD57_OD_MSK 0x00000100
+#define PAD57_OD_I_MSK 0xfffffeff
+#define PAD57_OD_SFT 8
+#define PAD57_OD_HI 8
+#define PAD57_OD_SZ 1
+#define PAD57_SEL_O_MSK 0x00003000
+#define PAD57_SEL_O_I_MSK 0xffffcfff
+#define PAD57_SEL_O_SFT 12
+#define PAD57_SEL_O_HI 13
+#define PAD57_SEL_O_SZ 2
+#define PAD57_SEL_OE_MSK 0x00100000
+#define PAD57_SEL_OE_I_MSK 0xffefffff
+#define PAD57_SEL_OE_SFT 20
+#define PAD57_SEL_OE_HI 20
+#define PAD57_SEL_OE_SZ 1
+#define JTAG_TDO_ID_MSK 0x10000000
+#define JTAG_TDO_ID_I_MSK 0xefffffff
+#define JTAG_TDO_ID_SFT 28
+#define JTAG_TDO_ID_HI 28
+#define JTAG_TDO_ID_SZ 1
+#define PAD58_OE_MSK 0x00000001
+#define PAD58_OE_I_MSK 0xfffffffe
+#define PAD58_OE_SFT 0
+#define PAD58_OE_HI 0
+#define PAD58_OE_SZ 1
+#define PAD58_PE_MSK 0x00000002
+#define PAD58_PE_I_MSK 0xfffffffd
+#define PAD58_PE_SFT 1
+#define PAD58_PE_HI 1
+#define PAD58_PE_SZ 1
+#define PAD58_DS_MSK 0x00000004
+#define PAD58_DS_I_MSK 0xfffffffb
+#define PAD58_DS_SFT 2
+#define PAD58_DS_HI 2
+#define PAD58_DS_SZ 1
+#define PAD58_IE_MSK 0x00000008
+#define PAD58_IE_I_MSK 0xfffffff7
+#define PAD58_IE_SFT 3
+#define PAD58_IE_HI 3
+#define PAD58_IE_SZ 1
+#define PAD58_SEL_I_MSK 0x00000030
+#define PAD58_SEL_I_I_MSK 0xffffffcf
+#define PAD58_SEL_I_SFT 4
+#define PAD58_SEL_I_HI 5
+#define PAD58_SEL_I_SZ 2
+#define PAD58_OD_MSK 0x00000100
+#define PAD58_OD_I_MSK 0xfffffeff
+#define PAD58_OD_SFT 8
+#define PAD58_OD_HI 8
+#define PAD58_OD_SZ 1
+#define PAD58_SEL_O_MSK 0x00001000
+#define PAD58_SEL_O_I_MSK 0xffffefff
+#define PAD58_SEL_O_SFT 12
+#define PAD58_SEL_O_HI 12
+#define PAD58_SEL_O_SZ 1
+#define TEST_16_ID_MSK 0x10000000
+#define TEST_16_ID_I_MSK 0xefffffff
+#define TEST_16_ID_SFT 28
+#define TEST_16_ID_HI 28
+#define TEST_16_ID_SZ 1
+#define PAD59_OE_MSK 0x00000001
+#define PAD59_OE_I_MSK 0xfffffffe
+#define PAD59_OE_SFT 0
+#define PAD59_OE_HI 0
+#define PAD59_OE_SZ 1
+#define PAD59_PE_MSK 0x00000002
+#define PAD59_PE_I_MSK 0xfffffffd
+#define PAD59_PE_SFT 1
+#define PAD59_PE_HI 1
+#define PAD59_PE_SZ 1
+#define PAD59_DS_MSK 0x00000004
+#define PAD59_DS_I_MSK 0xfffffffb
+#define PAD59_DS_SFT 2
+#define PAD59_DS_HI 2
+#define PAD59_DS_SZ 1
+#define PAD59_IE_MSK 0x00000008
+#define PAD59_IE_I_MSK 0xfffffff7
+#define PAD59_IE_SFT 3
+#define PAD59_IE_HI 3
+#define PAD59_IE_SZ 1
+#define PAD59_SEL_I_MSK 0x00000030
+#define PAD59_SEL_I_I_MSK 0xffffffcf
+#define PAD59_SEL_I_SFT 4
+#define PAD59_SEL_I_HI 5
+#define PAD59_SEL_I_SZ 2
+#define PAD59_OD_MSK 0x00000100
+#define PAD59_OD_I_MSK 0xfffffeff
+#define PAD59_OD_SFT 8
+#define PAD59_OD_HI 8
+#define PAD59_OD_SZ 1
+#define PAD59_SEL_O_MSK 0x00001000
+#define PAD59_SEL_O_I_MSK 0xffffefff
+#define PAD59_SEL_O_SFT 12
+#define PAD59_SEL_O_HI 12
+#define PAD59_SEL_O_SZ 1
+#define TEST_17_ID_MSK 0x10000000
+#define TEST_17_ID_I_MSK 0xefffffff
+#define TEST_17_ID_SFT 28
+#define TEST_17_ID_HI 28
+#define TEST_17_ID_SZ 1
+#define PAD60_OE_MSK 0x00000001
+#define PAD60_OE_I_MSK 0xfffffffe
+#define PAD60_OE_SFT 0
+#define PAD60_OE_HI 0
+#define PAD60_OE_SZ 1
+#define PAD60_PE_MSK 0x00000002
+#define PAD60_PE_I_MSK 0xfffffffd
+#define PAD60_PE_SFT 1
+#define PAD60_PE_HI 1
+#define PAD60_PE_SZ 1
+#define PAD60_DS_MSK 0x00000004
+#define PAD60_DS_I_MSK 0xfffffffb
+#define PAD60_DS_SFT 2
+#define PAD60_DS_HI 2
+#define PAD60_DS_SZ 1
+#define PAD60_IE_MSK 0x00000008
+#define PAD60_IE_I_MSK 0xfffffff7
+#define PAD60_IE_SFT 3
+#define PAD60_IE_HI 3
+#define PAD60_IE_SZ 1
+#define PAD60_SEL_I_MSK 0x00000030
+#define PAD60_SEL_I_I_MSK 0xffffffcf
+#define PAD60_SEL_I_SFT 4
+#define PAD60_SEL_I_HI 5
+#define PAD60_SEL_I_SZ 2
+#define PAD60_OD_MSK 0x00000100
+#define PAD60_OD_I_MSK 0xfffffeff
+#define PAD60_OD_SFT 8
+#define PAD60_OD_HI 8
+#define PAD60_OD_SZ 1
+#define PAD60_SEL_O_MSK 0x00001000
+#define PAD60_SEL_O_I_MSK 0xffffefff
+#define PAD60_SEL_O_SFT 12
+#define PAD60_SEL_O_HI 12
+#define PAD60_SEL_O_SZ 1
+#define TEST_18_ID_MSK 0x10000000
+#define TEST_18_ID_I_MSK 0xefffffff
+#define TEST_18_ID_SFT 28
+#define TEST_18_ID_HI 28
+#define TEST_18_ID_SZ 1
+#define PAD61_OE_MSK 0x00000001
+#define PAD61_OE_I_MSK 0xfffffffe
+#define PAD61_OE_SFT 0
+#define PAD61_OE_HI 0
+#define PAD61_OE_SZ 1
+#define PAD61_PE_MSK 0x00000002
+#define PAD61_PE_I_MSK 0xfffffffd
+#define PAD61_PE_SFT 1
+#define PAD61_PE_HI 1
+#define PAD61_PE_SZ 1
+#define PAD61_DS_MSK 0x00000004
+#define PAD61_DS_I_MSK 0xfffffffb
+#define PAD61_DS_SFT 2
+#define PAD61_DS_HI 2
+#define PAD61_DS_SZ 1
+#define PAD61_IE_MSK 0x00000008
+#define PAD61_IE_I_MSK 0xfffffff7
+#define PAD61_IE_SFT 3
+#define PAD61_IE_HI 3
+#define PAD61_IE_SZ 1
+#define PAD61_SEL_I_MSK 0x00000010
+#define PAD61_SEL_I_I_MSK 0xffffffef
+#define PAD61_SEL_I_SFT 4
+#define PAD61_SEL_I_HI 4
+#define PAD61_SEL_I_SZ 1
+#define PAD61_OD_MSK 0x00000100
+#define PAD61_OD_I_MSK 0xfffffeff
+#define PAD61_OD_SFT 8
+#define PAD61_OD_HI 8
+#define PAD61_OD_SZ 1
+#define PAD61_SEL_O_MSK 0x00003000
+#define PAD61_SEL_O_I_MSK 0xffffcfff
+#define PAD61_SEL_O_SFT 12
+#define PAD61_SEL_O_HI 13
+#define PAD61_SEL_O_SZ 2
+#define TEST_19_ID_MSK 0x10000000
+#define TEST_19_ID_I_MSK 0xefffffff
+#define TEST_19_ID_SFT 28
+#define TEST_19_ID_HI 28
+#define TEST_19_ID_SZ 1
+#define PAD62_OE_MSK 0x00000001
+#define PAD62_OE_I_MSK 0xfffffffe
+#define PAD62_OE_SFT 0
+#define PAD62_OE_HI 0
+#define PAD62_OE_SZ 1
+#define PAD62_PE_MSK 0x00000002
+#define PAD62_PE_I_MSK 0xfffffffd
+#define PAD62_PE_SFT 1
+#define PAD62_PE_HI 1
+#define PAD62_PE_SZ 1
+#define PAD62_DS_MSK 0x00000004
+#define PAD62_DS_I_MSK 0xfffffffb
+#define PAD62_DS_SFT 2
+#define PAD62_DS_HI 2
+#define PAD62_DS_SZ 1
+#define PAD62_IE_MSK 0x00000008
+#define PAD62_IE_I_MSK 0xfffffff7
+#define PAD62_IE_SFT 3
+#define PAD62_IE_HI 3
+#define PAD62_IE_SZ 1
+#define PAD62_SEL_I_MSK 0x00000010
+#define PAD62_SEL_I_I_MSK 0xffffffef
+#define PAD62_SEL_I_SFT 4
+#define PAD62_SEL_I_HI 4
+#define PAD62_SEL_I_SZ 1
+#define PAD62_OD_MSK 0x00000100
+#define PAD62_OD_I_MSK 0xfffffeff
+#define PAD62_OD_SFT 8
+#define PAD62_OD_HI 8
+#define PAD62_OD_SZ 1
+#define PAD62_SEL_O_MSK 0x00001000
+#define PAD62_SEL_O_I_MSK 0xffffefff
+#define PAD62_SEL_O_SFT 12
+#define PAD62_SEL_O_HI 12
+#define PAD62_SEL_O_SZ 1
+#define TEST_20_ID_MSK 0x10000000
+#define TEST_20_ID_I_MSK 0xefffffff
+#define TEST_20_ID_SFT 28
+#define TEST_20_ID_HI 28
+#define TEST_20_ID_SZ 1
+#define PAD64_OE_MSK 0x00000001
+#define PAD64_OE_I_MSK 0xfffffffe
+#define PAD64_OE_SFT 0
+#define PAD64_OE_HI 0
+#define PAD64_OE_SZ 1
+#define PAD64_PE_MSK 0x00000002
+#define PAD64_PE_I_MSK 0xfffffffd
+#define PAD64_PE_SFT 1
+#define PAD64_PE_HI 1
+#define PAD64_PE_SZ 1
+#define PAD64_DS_MSK 0x00000004
+#define PAD64_DS_I_MSK 0xfffffffb
+#define PAD64_DS_SFT 2
+#define PAD64_DS_HI 2
+#define PAD64_DS_SZ 1
+#define PAD64_IE_MSK 0x00000008
+#define PAD64_IE_I_MSK 0xfffffff7
+#define PAD64_IE_SFT 3
+#define PAD64_IE_HI 3
+#define PAD64_IE_SZ 1
+#define PAD64_SEL_I_MSK 0x00000070
+#define PAD64_SEL_I_I_MSK 0xffffff8f
+#define PAD64_SEL_I_SFT 4
+#define PAD64_SEL_I_HI 6
+#define PAD64_SEL_I_SZ 3
+#define PAD64_OD_MSK 0x00000100
+#define PAD64_OD_I_MSK 0xfffffeff
+#define PAD64_OD_SFT 8
+#define PAD64_OD_HI 8
+#define PAD64_OD_SZ 1
+#define PAD64_SEL_O_MSK 0x00003000
+#define PAD64_SEL_O_I_MSK 0xffffcfff
+#define PAD64_SEL_O_SFT 12
+#define PAD64_SEL_O_HI 13
+#define PAD64_SEL_O_SZ 2
+#define PAD64_SEL_OE_MSK 0x00100000
+#define PAD64_SEL_OE_I_MSK 0xffefffff
+#define PAD64_SEL_OE_SFT 20
+#define PAD64_SEL_OE_HI 20
+#define PAD64_SEL_OE_SZ 1
+#define GPIO_15_IP_ID_MSK 0x10000000
+#define GPIO_15_IP_ID_I_MSK 0xefffffff
+#define GPIO_15_IP_ID_SFT 28
+#define GPIO_15_IP_ID_HI 28
+#define GPIO_15_IP_ID_SZ 1
+#define PAD65_OE_MSK 0x00000001
+#define PAD65_OE_I_MSK 0xfffffffe
+#define PAD65_OE_SFT 0
+#define PAD65_OE_HI 0
+#define PAD65_OE_SZ 1
+#define PAD65_PE_MSK 0x00000002
+#define PAD65_PE_I_MSK 0xfffffffd
+#define PAD65_PE_SFT 1
+#define PAD65_PE_HI 1
+#define PAD65_PE_SZ 1
+#define PAD65_DS_MSK 0x00000004
+#define PAD65_DS_I_MSK 0xfffffffb
+#define PAD65_DS_SFT 2
+#define PAD65_DS_HI 2
+#define PAD65_DS_SZ 1
+#define PAD65_IE_MSK 0x00000008
+#define PAD65_IE_I_MSK 0xfffffff7
+#define PAD65_IE_SFT 3
+#define PAD65_IE_HI 3
+#define PAD65_IE_SZ 1
+#define PAD65_SEL_I_MSK 0x00000070
+#define PAD65_SEL_I_I_MSK 0xffffff8f
+#define PAD65_SEL_I_SFT 4
+#define PAD65_SEL_I_HI 6
+#define PAD65_SEL_I_SZ 3
+#define PAD65_OD_MSK 0x00000100
+#define PAD65_OD_I_MSK 0xfffffeff
+#define PAD65_OD_SFT 8
+#define PAD65_OD_HI 8
+#define PAD65_OD_SZ 1
+#define PAD65_SEL_O_MSK 0x00001000
+#define PAD65_SEL_O_I_MSK 0xffffefff
+#define PAD65_SEL_O_SFT 12
+#define PAD65_SEL_O_HI 12
+#define PAD65_SEL_O_SZ 1
+#define GPIO_TEST_7_IN_ID_MSK 0x10000000
+#define GPIO_TEST_7_IN_ID_I_MSK 0xefffffff
+#define GPIO_TEST_7_IN_ID_SFT 28
+#define GPIO_TEST_7_IN_ID_HI 28
+#define GPIO_TEST_7_IN_ID_SZ 1
+#define PAD66_OE_MSK 0x00000001
+#define PAD66_OE_I_MSK 0xfffffffe
+#define PAD66_OE_SFT 0
+#define PAD66_OE_HI 0
+#define PAD66_OE_SZ 1
+#define PAD66_PE_MSK 0x00000002
+#define PAD66_PE_I_MSK 0xfffffffd
+#define PAD66_PE_SFT 1
+#define PAD66_PE_HI 1
+#define PAD66_PE_SZ 1
+#define PAD66_DS_MSK 0x00000004
+#define PAD66_DS_I_MSK 0xfffffffb
+#define PAD66_DS_SFT 2
+#define PAD66_DS_HI 2
+#define PAD66_DS_SZ 1
+#define PAD66_IE_MSK 0x00000008
+#define PAD66_IE_I_MSK 0xfffffff7
+#define PAD66_IE_SFT 3
+#define PAD66_IE_HI 3
+#define PAD66_IE_SZ 1
+#define PAD66_SEL_I_MSK 0x00000030
+#define PAD66_SEL_I_I_MSK 0xffffffcf
+#define PAD66_SEL_I_SFT 4
+#define PAD66_SEL_I_HI 5
+#define PAD66_SEL_I_SZ 2
+#define PAD66_OD_MSK 0x00000100
+#define PAD66_OD_I_MSK 0xfffffeff
+#define PAD66_OD_SFT 8
+#define PAD66_OD_HI 8
+#define PAD66_OD_SZ 1
+#define PAD66_SEL_O_MSK 0x00003000
+#define PAD66_SEL_O_I_MSK 0xffffcfff
+#define PAD66_SEL_O_SFT 12
+#define PAD66_SEL_O_HI 13
+#define PAD66_SEL_O_SZ 2
+#define GPIO_17_QP_ID_MSK 0x10000000
+#define GPIO_17_QP_ID_I_MSK 0xefffffff
+#define GPIO_17_QP_ID_SFT 28
+#define GPIO_17_QP_ID_HI 28
+#define GPIO_17_QP_ID_SZ 1
+#define PAD68_OE_MSK 0x00000001
+#define PAD68_OE_I_MSK 0xfffffffe
+#define PAD68_OE_SFT 0
+#define PAD68_OE_HI 0
+#define PAD68_OE_SZ 1
+#define PAD68_PE_MSK 0x00000002
+#define PAD68_PE_I_MSK 0xfffffffd
+#define PAD68_PE_SFT 1
+#define PAD68_PE_HI 1
+#define PAD68_PE_SZ 1
+#define PAD68_DS_MSK 0x00000004
+#define PAD68_DS_I_MSK 0xfffffffb
+#define PAD68_DS_SFT 2
+#define PAD68_DS_HI 2
+#define PAD68_DS_SZ 1
+#define PAD68_IE_MSK 0x00000008
+#define PAD68_IE_I_MSK 0xfffffff7
+#define PAD68_IE_SFT 3
+#define PAD68_IE_HI 3
+#define PAD68_IE_SZ 1
+#define PAD68_OD_MSK 0x00000100
+#define PAD68_OD_I_MSK 0xfffffeff
+#define PAD68_OD_SFT 8
+#define PAD68_OD_HI 8
+#define PAD68_OD_SZ 1
+#define PAD68_SEL_O_MSK 0x00001000
+#define PAD68_SEL_O_I_MSK 0xffffefff
+#define PAD68_SEL_O_SFT 12
+#define PAD68_SEL_O_HI 12
+#define PAD68_SEL_O_SZ 1
+#define GPIO_19_ID_MSK 0x10000000
+#define GPIO_19_ID_I_MSK 0xefffffff
+#define GPIO_19_ID_SFT 28
+#define GPIO_19_ID_HI 28
+#define GPIO_19_ID_SZ 1
+#define PAD67_OE_MSK 0x00000001
+#define PAD67_OE_I_MSK 0xfffffffe
+#define PAD67_OE_SFT 0
+#define PAD67_OE_HI 0
+#define PAD67_OE_SZ 1
+#define PAD67_PE_MSK 0x00000002
+#define PAD67_PE_I_MSK 0xfffffffd
+#define PAD67_PE_SFT 1
+#define PAD67_PE_HI 1
+#define PAD67_PE_SZ 1
+#define PAD67_DS_MSK 0x00000004
+#define PAD67_DS_I_MSK 0xfffffffb
+#define PAD67_DS_SFT 2
+#define PAD67_DS_HI 2
+#define PAD67_DS_SZ 1
+#define PAD67_IE_MSK 0x00000008
+#define PAD67_IE_I_MSK 0xfffffff7
+#define PAD67_IE_SFT 3
+#define PAD67_IE_HI 3
+#define PAD67_IE_SZ 1
+#define PAD67_SEL_I_MSK 0x00000070
+#define PAD67_SEL_I_I_MSK 0xffffff8f
+#define PAD67_SEL_I_SFT 4
+#define PAD67_SEL_I_HI 6
+#define PAD67_SEL_I_SZ 3
+#define PAD67_OD_MSK 0x00000100
+#define PAD67_OD_I_MSK 0xfffffeff
+#define PAD67_OD_SFT 8
+#define PAD67_OD_HI 8
+#define PAD67_OD_SZ 1
+#define PAD67_SEL_O_MSK 0x00003000
+#define PAD67_SEL_O_I_MSK 0xffffcfff
+#define PAD67_SEL_O_SFT 12
+#define PAD67_SEL_O_HI 13
+#define PAD67_SEL_O_SZ 2
+#define GPIO_TEST_8_QN_ID_MSK 0x10000000
+#define GPIO_TEST_8_QN_ID_I_MSK 0xefffffff
+#define GPIO_TEST_8_QN_ID_SFT 28
+#define GPIO_TEST_8_QN_ID_HI 28
+#define GPIO_TEST_8_QN_ID_SZ 1
+#define PAD69_OE_MSK 0x00000001
+#define PAD69_OE_I_MSK 0xfffffffe
+#define PAD69_OE_SFT 0
+#define PAD69_OE_HI 0
+#define PAD69_OE_SZ 1
+#define PAD69_PE_MSK 0x00000002
+#define PAD69_PE_I_MSK 0xfffffffd
+#define PAD69_PE_SFT 1
+#define PAD69_PE_HI 1
+#define PAD69_PE_SZ 1
+#define PAD69_DS_MSK 0x00000004
+#define PAD69_DS_I_MSK 0xfffffffb
+#define PAD69_DS_SFT 2
+#define PAD69_DS_HI 2
+#define PAD69_DS_SZ 1
+#define PAD69_IE_MSK 0x00000008
+#define PAD69_IE_I_MSK 0xfffffff7
+#define PAD69_IE_SFT 3
+#define PAD69_IE_HI 3
+#define PAD69_IE_SZ 1
+#define PAD69_SEL_I_MSK 0x00000030
+#define PAD69_SEL_I_I_MSK 0xffffffcf
+#define PAD69_SEL_I_SFT 4
+#define PAD69_SEL_I_HI 5
+#define PAD69_SEL_I_SZ 2
+#define PAD69_OD_MSK 0x00000100
+#define PAD69_OD_I_MSK 0xfffffeff
+#define PAD69_OD_SFT 8
+#define PAD69_OD_HI 8
+#define PAD69_OD_SZ 1
+#define PAD69_SEL_O_MSK 0x00001000
+#define PAD69_SEL_O_I_MSK 0xffffefff
+#define PAD69_SEL_O_SFT 12
+#define PAD69_SEL_O_HI 12
+#define PAD69_SEL_O_SZ 1
+#define STRAP2_MSK 0x08000000
+#define STRAP2_I_MSK 0xf7ffffff
+#define STRAP2_SFT 27
+#define STRAP2_HI 27
+#define STRAP2_SZ 1
+#define GPIO_20_ID_MSK 0x10000000
+#define GPIO_20_ID_I_MSK 0xefffffff
+#define GPIO_20_ID_SFT 28
+#define GPIO_20_ID_HI 28
+#define GPIO_20_ID_SZ 1
+#define PAD70_OE_MSK 0x00000001
+#define PAD70_OE_I_MSK 0xfffffffe
+#define PAD70_OE_SFT 0
+#define PAD70_OE_HI 0
+#define PAD70_OE_SZ 1
+#define PAD70_PE_MSK 0x00000002
+#define PAD70_PE_I_MSK 0xfffffffd
+#define PAD70_PE_SFT 1
+#define PAD70_PE_HI 1
+#define PAD70_PE_SZ 1
+#define PAD70_DS_MSK 0x00000004
+#define PAD70_DS_I_MSK 0xfffffffb
+#define PAD70_DS_SFT 2
+#define PAD70_DS_HI 2
+#define PAD70_DS_SZ 1
+#define PAD70_IE_MSK 0x00000008
+#define PAD70_IE_I_MSK 0xfffffff7
+#define PAD70_IE_SFT 3
+#define PAD70_IE_HI 3
+#define PAD70_IE_SZ 1
+#define PAD70_SEL_I_MSK 0x00000030
+#define PAD70_SEL_I_I_MSK 0xffffffcf
+#define PAD70_SEL_I_SFT 4
+#define PAD70_SEL_I_HI 5
+#define PAD70_SEL_I_SZ 2
+#define PAD70_OD_MSK 0x00000100
+#define PAD70_OD_I_MSK 0xfffffeff
+#define PAD70_OD_SFT 8
+#define PAD70_OD_HI 8
+#define PAD70_OD_SZ 1
+#define PAD70_SEL_O_MSK 0x00007000
+#define PAD70_SEL_O_I_MSK 0xffff8fff
+#define PAD70_SEL_O_SFT 12
+#define PAD70_SEL_O_HI 14
+#define PAD70_SEL_O_SZ 3
+#define GPIO_21_ID_MSK 0x10000000
+#define GPIO_21_ID_I_MSK 0xefffffff
+#define GPIO_21_ID_SFT 28
+#define GPIO_21_ID_HI 28
+#define GPIO_21_ID_SZ 1
+#define PAD231_OE_MSK 0x00000001
+#define PAD231_OE_I_MSK 0xfffffffe
+#define PAD231_OE_SFT 0
+#define PAD231_OE_HI 0
+#define PAD231_OE_SZ 1
+#define PAD231_PE_MSK 0x00000002
+#define PAD231_PE_I_MSK 0xfffffffd
+#define PAD231_PE_SFT 1
+#define PAD231_PE_HI 1
+#define PAD231_PE_SZ 1
+#define PAD231_DS_MSK 0x00000004
+#define PAD231_DS_I_MSK 0xfffffffb
+#define PAD231_DS_SFT 2
+#define PAD231_DS_HI 2
+#define PAD231_DS_SZ 1
+#define PAD231_IE_MSK 0x00000008
+#define PAD231_IE_I_MSK 0xfffffff7
+#define PAD231_IE_SFT 3
+#define PAD231_IE_HI 3
+#define PAD231_IE_SZ 1
+#define PAD231_OD_MSK 0x00000100
+#define PAD231_OD_I_MSK 0xfffffeff
+#define PAD231_OD_SFT 8
+#define PAD231_OD_HI 8
+#define PAD231_OD_SZ 1
+#define PIN_40_OR_56_ID_MSK 0x10000000
+#define PIN_40_OR_56_ID_I_MSK 0xefffffff
+#define PIN_40_OR_56_ID_SFT 28
+#define PIN_40_OR_56_ID_HI 28
+#define PIN_40_OR_56_ID_SZ 1
+#define MP_PHY2RX_DATA__0_SEL_MSK 0x00000001
+#define MP_PHY2RX_DATA__0_SEL_I_MSK 0xfffffffe
+#define MP_PHY2RX_DATA__0_SEL_SFT 0
+#define MP_PHY2RX_DATA__0_SEL_HI 0
+#define MP_PHY2RX_DATA__0_SEL_SZ 1
+#define MP_PHY2RX_DATA__1_SEL_MSK 0x00000002
+#define MP_PHY2RX_DATA__1_SEL_I_MSK 0xfffffffd
+#define MP_PHY2RX_DATA__1_SEL_SFT 1
+#define MP_PHY2RX_DATA__1_SEL_HI 1
+#define MP_PHY2RX_DATA__1_SEL_SZ 1
+#define MP_TX_FF_RPTR__1_SEL_MSK 0x00000004
+#define MP_TX_FF_RPTR__1_SEL_I_MSK 0xfffffffb
+#define MP_TX_FF_RPTR__1_SEL_SFT 2
+#define MP_TX_FF_RPTR__1_SEL_HI 2
+#define MP_TX_FF_RPTR__1_SEL_SZ 1
+#define MP_RX_FF_WPTR__2_SEL_MSK 0x00000008
+#define MP_RX_FF_WPTR__2_SEL_I_MSK 0xfffffff7
+#define MP_RX_FF_WPTR__2_SEL_SFT 3
+#define MP_RX_FF_WPTR__2_SEL_HI 3
+#define MP_RX_FF_WPTR__2_SEL_SZ 1
+#define MP_RX_FF_WPTR__1_SEL_MSK 0x00000010
+#define MP_RX_FF_WPTR__1_SEL_I_MSK 0xffffffef
+#define MP_RX_FF_WPTR__1_SEL_SFT 4
+#define MP_RX_FF_WPTR__1_SEL_HI 4
+#define MP_RX_FF_WPTR__1_SEL_SZ 1
+#define MP_RX_FF_WPTR__0_SEL_MSK 0x00000020
+#define MP_RX_FF_WPTR__0_SEL_I_MSK 0xffffffdf
+#define MP_RX_FF_WPTR__0_SEL_SFT 5
+#define MP_RX_FF_WPTR__0_SEL_HI 5
+#define MP_RX_FF_WPTR__0_SEL_SZ 1
+#define MP_PHY2RX_DATA__2_SEL_MSK 0x00000040
+#define MP_PHY2RX_DATA__2_SEL_I_MSK 0xffffffbf
+#define MP_PHY2RX_DATA__2_SEL_SFT 6
+#define MP_PHY2RX_DATA__2_SEL_HI 6
+#define MP_PHY2RX_DATA__2_SEL_SZ 1
+#define MP_PHY2RX_DATA__4_SEL_MSK 0x00000080
+#define MP_PHY2RX_DATA__4_SEL_I_MSK 0xffffff7f
+#define MP_PHY2RX_DATA__4_SEL_SFT 7
+#define MP_PHY2RX_DATA__4_SEL_HI 7
+#define MP_PHY2RX_DATA__4_SEL_SZ 1
+#define I2CM_SDA_ID_SEL_MSK 0x00000300
+#define I2CM_SDA_ID_SEL_I_MSK 0xfffffcff
+#define I2CM_SDA_ID_SEL_SFT 8
+#define I2CM_SDA_ID_SEL_HI 9
+#define I2CM_SDA_ID_SEL_SZ 2
+#define CRYSTAL_OUT_REQ_SEL_MSK 0x00000400
+#define CRYSTAL_OUT_REQ_SEL_I_MSK 0xfffffbff
+#define CRYSTAL_OUT_REQ_SEL_SFT 10
+#define CRYSTAL_OUT_REQ_SEL_HI 10
+#define CRYSTAL_OUT_REQ_SEL_SZ 1
+#define MP_PHY2RX_DATA__5_SEL_MSK 0x00000800
+#define MP_PHY2RX_DATA__5_SEL_I_MSK 0xfffff7ff
+#define MP_PHY2RX_DATA__5_SEL_SFT 11
+#define MP_PHY2RX_DATA__5_SEL_HI 11
+#define MP_PHY2RX_DATA__5_SEL_SZ 1
+#define MP_PHY2RX_DATA__3_SEL_MSK 0x00001000
+#define MP_PHY2RX_DATA__3_SEL_I_MSK 0xffffefff
+#define MP_PHY2RX_DATA__3_SEL_SFT 12
+#define MP_PHY2RX_DATA__3_SEL_HI 12
+#define MP_PHY2RX_DATA__3_SEL_SZ 1
+#define UART_RXD_SEL_MSK 0x00006000
+#define UART_RXD_SEL_I_MSK 0xffff9fff
+#define UART_RXD_SEL_SFT 13
+#define UART_RXD_SEL_HI 14
+#define UART_RXD_SEL_SZ 2
+#define MP_PHY2RX_DATA__6_SEL_MSK 0x00008000
+#define MP_PHY2RX_DATA__6_SEL_I_MSK 0xffff7fff
+#define MP_PHY2RX_DATA__6_SEL_SFT 15
+#define MP_PHY2RX_DATA__6_SEL_HI 15
+#define MP_PHY2RX_DATA__6_SEL_SZ 1
+#define DAT_UART_NCTS_SEL_MSK 0x00010000
+#define DAT_UART_NCTS_SEL_I_MSK 0xfffeffff
+#define DAT_UART_NCTS_SEL_SFT 16
+#define DAT_UART_NCTS_SEL_HI 16
+#define DAT_UART_NCTS_SEL_SZ 1
+#define GPIO_LOG_STOP_SEL_MSK 0x000e0000
+#define GPIO_LOG_STOP_SEL_I_MSK 0xfff1ffff
+#define GPIO_LOG_STOP_SEL_SFT 17
+#define GPIO_LOG_STOP_SEL_HI 19
+#define GPIO_LOG_STOP_SEL_SZ 3
+#define MP_TX_FF_RPTR__0_SEL_MSK 0x00100000
+#define MP_TX_FF_RPTR__0_SEL_I_MSK 0xffefffff
+#define MP_TX_FF_RPTR__0_SEL_SFT 20
+#define MP_TX_FF_RPTR__0_SEL_HI 20
+#define MP_TX_FF_RPTR__0_SEL_SZ 1
+#define MP_PHY_RX_WRST_N_SEL_MSK 0x00200000
+#define MP_PHY_RX_WRST_N_SEL_I_MSK 0xffdfffff
+#define MP_PHY_RX_WRST_N_SEL_SFT 21
+#define MP_PHY_RX_WRST_N_SEL_HI 21
+#define MP_PHY_RX_WRST_N_SEL_SZ 1
+#define EXT_32K_SEL_MSK 0x00c00000
+#define EXT_32K_SEL_I_MSK 0xff3fffff
+#define EXT_32K_SEL_SFT 22
+#define EXT_32K_SEL_HI 23
+#define EXT_32K_SEL_SZ 2
+#define MP_PHY2RX_DATA__7_SEL_MSK 0x01000000
+#define MP_PHY2RX_DATA__7_SEL_I_MSK 0xfeffffff
+#define MP_PHY2RX_DATA__7_SEL_SFT 24
+#define MP_PHY2RX_DATA__7_SEL_HI 24
+#define MP_PHY2RX_DATA__7_SEL_SZ 1
+#define MP_TX_FF_RPTR__2_SEL_MSK 0x02000000
+#define MP_TX_FF_RPTR__2_SEL_I_MSK 0xfdffffff
+#define MP_TX_FF_RPTR__2_SEL_SFT 25
+#define MP_TX_FF_RPTR__2_SEL_HI 25
+#define MP_TX_FF_RPTR__2_SEL_SZ 1
+#define PMUINT_WAKE_SEL_MSK 0x1c000000
+#define PMUINT_WAKE_SEL_I_MSK 0xe3ffffff
+#define PMUINT_WAKE_SEL_SFT 26
+#define PMUINT_WAKE_SEL_HI 28
+#define PMUINT_WAKE_SEL_SZ 3
+#define I2CM_SCL_ID_SEL_MSK 0x20000000
+#define I2CM_SCL_ID_SEL_I_MSK 0xdfffffff
+#define I2CM_SCL_ID_SEL_SFT 29
+#define I2CM_SCL_ID_SEL_HI 29
+#define I2CM_SCL_ID_SEL_SZ 1
+#define MP_MRX_RX_EN_SEL_MSK 0x40000000
+#define MP_MRX_RX_EN_SEL_I_MSK 0xbfffffff
+#define MP_MRX_RX_EN_SEL_SFT 30
+#define MP_MRX_RX_EN_SEL_HI 30
+#define MP_MRX_RX_EN_SEL_SZ 1
+#define DAT_UART_RXD_SEL_0_MSK 0x80000000
+#define DAT_UART_RXD_SEL_0_I_MSK 0x7fffffff
+#define DAT_UART_RXD_SEL_0_SFT 31
+#define DAT_UART_RXD_SEL_0_HI 31
+#define DAT_UART_RXD_SEL_0_SZ 1
+#define DAT_UART_RXD_SEL_1_MSK 0x00000001
+#define DAT_UART_RXD_SEL_1_I_MSK 0xfffffffe
+#define DAT_UART_RXD_SEL_1_SFT 0
+#define DAT_UART_RXD_SEL_1_HI 0
+#define DAT_UART_RXD_SEL_1_SZ 1
+#define SPI_DI_SEL_MSK 0x00000002
+#define SPI_DI_SEL_I_MSK 0xfffffffd
+#define SPI_DI_SEL_SFT 1
+#define SPI_DI_SEL_HI 1
+#define SPI_DI_SEL_SZ 1
+#define IO_PORT_REG_MSK 0x0001ffff
+#define IO_PORT_REG_I_MSK 0xfffe0000
+#define IO_PORT_REG_SFT 0
+#define IO_PORT_REG_HI 16
+#define IO_PORT_REG_SZ 17
+#define MASK_RX_INT_MSK 0x00000001
+#define MASK_RX_INT_I_MSK 0xfffffffe
+#define MASK_RX_INT_SFT 0
+#define MASK_RX_INT_HI 0
+#define MASK_RX_INT_SZ 1
+#define MASK_TX_INT_MSK 0x00000002
+#define MASK_TX_INT_I_MSK 0xfffffffd
+#define MASK_TX_INT_SFT 1
+#define MASK_TX_INT_HI 1
+#define MASK_TX_INT_SZ 1
+#define MASK_SOC_SYSTEM_INT_MSK 0x00000004
+#define MASK_SOC_SYSTEM_INT_I_MSK 0xfffffffb
+#define MASK_SOC_SYSTEM_INT_SFT 2
+#define MASK_SOC_SYSTEM_INT_HI 2
+#define MASK_SOC_SYSTEM_INT_SZ 1
+#define EDCA0_LOW_THR_INT_MASK_MSK 0x00000008
+#define EDCA0_LOW_THR_INT_MASK_I_MSK 0xfffffff7
+#define EDCA0_LOW_THR_INT_MASK_SFT 3
+#define EDCA0_LOW_THR_INT_MASK_HI 3
+#define EDCA0_LOW_THR_INT_MASK_SZ 1
+#define EDCA1_LOW_THR_INT_MASK_MSK 0x00000010
+#define EDCA1_LOW_THR_INT_MASK_I_MSK 0xffffffef
+#define EDCA1_LOW_THR_INT_MASK_SFT 4
+#define EDCA1_LOW_THR_INT_MASK_HI 4
+#define EDCA1_LOW_THR_INT_MASK_SZ 1
+#define EDCA2_LOW_THR_INT_MASK_MSK 0x00000020
+#define EDCA2_LOW_THR_INT_MASK_I_MSK 0xffffffdf
+#define EDCA2_LOW_THR_INT_MASK_SFT 5
+#define EDCA2_LOW_THR_INT_MASK_HI 5
+#define EDCA2_LOW_THR_INT_MASK_SZ 1
+#define EDCA3_LOW_THR_INT_MASK_MSK 0x00000040
+#define EDCA3_LOW_THR_INT_MASK_I_MSK 0xffffffbf
+#define EDCA3_LOW_THR_INT_MASK_SFT 6
+#define EDCA3_LOW_THR_INT_MASK_HI 6
+#define EDCA3_LOW_THR_INT_MASK_SZ 1
+#define TX_LIMIT_INT_MASK_MSK 0x00000080
+#define TX_LIMIT_INT_MASK_I_MSK 0xffffff7f
+#define TX_LIMIT_INT_MASK_SFT 7
+#define TX_LIMIT_INT_MASK_HI 7
+#define TX_LIMIT_INT_MASK_SZ 1
+#define RX_INT_MSK 0x00000001
+#define RX_INT_I_MSK 0xfffffffe
+#define RX_INT_SFT 0
+#define RX_INT_HI 0
+#define RX_INT_SZ 1
+#define TX_COMPLETE_INT_MSK 0x00000002
+#define TX_COMPLETE_INT_I_MSK 0xfffffffd
+#define TX_COMPLETE_INT_SFT 1
+#define TX_COMPLETE_INT_HI 1
+#define TX_COMPLETE_INT_SZ 1
+#define SOC_SYSTEM_INT_STATUS_MSK 0x00000004
+#define SOC_SYSTEM_INT_STATUS_I_MSK 0xfffffffb
+#define SOC_SYSTEM_INT_STATUS_SFT 2
+#define SOC_SYSTEM_INT_STATUS_HI 2
+#define SOC_SYSTEM_INT_STATUS_SZ 1
+#define EDCA0_LOW_THR_INT_STS_MSK 0x00000008
+#define EDCA0_LOW_THR_INT_STS_I_MSK 0xfffffff7
+#define EDCA0_LOW_THR_INT_STS_SFT 3
+#define EDCA0_LOW_THR_INT_STS_HI 3
+#define EDCA0_LOW_THR_INT_STS_SZ 1
+#define EDCA1_LOW_THR_INT_STS_MSK 0x00000010
+#define EDCA1_LOW_THR_INT_STS_I_MSK 0xffffffef
+#define EDCA1_LOW_THR_INT_STS_SFT 4
+#define EDCA1_LOW_THR_INT_STS_HI 4
+#define EDCA1_LOW_THR_INT_STS_SZ 1
+#define EDCA2_LOW_THR_INT_STS_MSK 0x00000020
+#define EDCA2_LOW_THR_INT_STS_I_MSK 0xffffffdf
+#define EDCA2_LOW_THR_INT_STS_SFT 5
+#define EDCA2_LOW_THR_INT_STS_HI 5
+#define EDCA2_LOW_THR_INT_STS_SZ 1
+#define EDCA3_LOW_THR_INT_STS_MSK 0x00000040
+#define EDCA3_LOW_THR_INT_STS_I_MSK 0xffffffbf
+#define EDCA3_LOW_THR_INT_STS_SFT 6
+#define EDCA3_LOW_THR_INT_STS_HI 6
+#define EDCA3_LOW_THR_INT_STS_SZ 1
+#define TX_LIMIT_INT_STS_MSK 0x00000080
+#define TX_LIMIT_INT_STS_I_MSK 0xffffff7f
+#define TX_LIMIT_INT_STS_SFT 7
+#define TX_LIMIT_INT_STS_HI 7
+#define TX_LIMIT_INT_STS_SZ 1
+#define HOST_TRIGGERED_RX_INT_MSK 0x00000100
+#define HOST_TRIGGERED_RX_INT_I_MSK 0xfffffeff
+#define HOST_TRIGGERED_RX_INT_SFT 8
+#define HOST_TRIGGERED_RX_INT_HI 8
+#define HOST_TRIGGERED_RX_INT_SZ 1
+#define HOST_TRIGGERED_TX_INT_MSK 0x00000200
+#define HOST_TRIGGERED_TX_INT_I_MSK 0xfffffdff
+#define HOST_TRIGGERED_TX_INT_SFT 9
+#define HOST_TRIGGERED_TX_INT_HI 9
+#define HOST_TRIGGERED_TX_INT_SZ 1
+#define SOC_TRIGGER_RX_INT_MSK 0x00000400
+#define SOC_TRIGGER_RX_INT_I_MSK 0xfffffbff
+#define SOC_TRIGGER_RX_INT_SFT 10
+#define SOC_TRIGGER_RX_INT_HI 10
+#define SOC_TRIGGER_RX_INT_SZ 1
+#define SOC_TRIGGER_TX_INT_MSK 0x00000800
+#define SOC_TRIGGER_TX_INT_I_MSK 0xfffff7ff
+#define SOC_TRIGGER_TX_INT_SFT 11
+#define SOC_TRIGGER_TX_INT_HI 11
+#define SOC_TRIGGER_TX_INT_SZ 1
+#define RDY_FOR_TX_RX_MSK 0x00000001
+#define RDY_FOR_TX_RX_I_MSK 0xfffffffe
+#define RDY_FOR_TX_RX_SFT 0
+#define RDY_FOR_TX_RX_HI 0
+#define RDY_FOR_TX_RX_SZ 1
+#define RDY_FOR_FW_DOWNLOAD_MSK 0x00000002
+#define RDY_FOR_FW_DOWNLOAD_I_MSK 0xfffffffd
+#define RDY_FOR_FW_DOWNLOAD_SFT 1
+#define RDY_FOR_FW_DOWNLOAD_HI 1
+#define RDY_FOR_FW_DOWNLOAD_SZ 1
+#define ILLEGAL_CMD_RESP_OPTION_MSK 0x00000004
+#define ILLEGAL_CMD_RESP_OPTION_I_MSK 0xfffffffb
+#define ILLEGAL_CMD_RESP_OPTION_SFT 2
+#define ILLEGAL_CMD_RESP_OPTION_HI 2
+#define ILLEGAL_CMD_RESP_OPTION_SZ 1
+#define SDIO_TRX_DATA_SEQUENCE_MSK 0x00000008
+#define SDIO_TRX_DATA_SEQUENCE_I_MSK 0xfffffff7
+#define SDIO_TRX_DATA_SEQUENCE_SFT 3
+#define SDIO_TRX_DATA_SEQUENCE_HI 3
+#define SDIO_TRX_DATA_SEQUENCE_SZ 1
+#define GPIO_INT_TRIGGER_OPTION_MSK 0x00000010
+#define GPIO_INT_TRIGGER_OPTION_I_MSK 0xffffffef
+#define GPIO_INT_TRIGGER_OPTION_SFT 4
+#define GPIO_INT_TRIGGER_OPTION_HI 4
+#define GPIO_INT_TRIGGER_OPTION_SZ 1
+#define TRIGGER_FUNCTION_SETTING_MSK 0x00000060
+#define TRIGGER_FUNCTION_SETTING_I_MSK 0xffffff9f
+#define TRIGGER_FUNCTION_SETTING_SFT 5
+#define TRIGGER_FUNCTION_SETTING_HI 6
+#define TRIGGER_FUNCTION_SETTING_SZ 2
+#define CMD52_ABORT_RESPONSE_MSK 0x00000080
+#define CMD52_ABORT_RESPONSE_I_MSK 0xffffff7f
+#define CMD52_ABORT_RESPONSE_SFT 7
+#define CMD52_ABORT_RESPONSE_HI 7
+#define CMD52_ABORT_RESPONSE_SZ 1
+#define RX_PACKET_LENGTH_MSK 0x0000ffff
+#define RX_PACKET_LENGTH_I_MSK 0xffff0000
+#define RX_PACKET_LENGTH_SFT 0
+#define RX_PACKET_LENGTH_HI 15
+#define RX_PACKET_LENGTH_SZ 16
+#define CARD_FW_DL_STATUS_MSK 0x00ff0000
+#define CARD_FW_DL_STATUS_I_MSK 0xff00ffff
+#define CARD_FW_DL_STATUS_SFT 16
+#define CARD_FW_DL_STATUS_HI 23
+#define CARD_FW_DL_STATUS_SZ 8
+#define TX_RX_LOOP_BACK_TEST_MSK 0x01000000
+#define TX_RX_LOOP_BACK_TEST_I_MSK 0xfeffffff
+#define TX_RX_LOOP_BACK_TEST_SFT 24
+#define TX_RX_LOOP_BACK_TEST_HI 24
+#define TX_RX_LOOP_BACK_TEST_SZ 1
+#define SDIO_LOOP_BACK_TEST_MSK 0x02000000
+#define SDIO_LOOP_BACK_TEST_I_MSK 0xfdffffff
+#define SDIO_LOOP_BACK_TEST_SFT 25
+#define SDIO_LOOP_BACK_TEST_HI 25
+#define SDIO_LOOP_BACK_TEST_SZ 1
+#define CMD52_ABORT_ACTIVE_MSK 0x10000000
+#define CMD52_ABORT_ACTIVE_I_MSK 0xefffffff
+#define CMD52_ABORT_ACTIVE_SFT 28
+#define CMD52_ABORT_ACTIVE_HI 28
+#define CMD52_ABORT_ACTIVE_SZ 1
+#define CMD52_RESET_ACTIVE_MSK 0x20000000
+#define CMD52_RESET_ACTIVE_I_MSK 0xdfffffff
+#define CMD52_RESET_ACTIVE_SFT 29
+#define CMD52_RESET_ACTIVE_HI 29
+#define CMD52_RESET_ACTIVE_SZ 1
+#define SDIO_PARTIAL_RESET_ACTIVE_MSK 0x40000000
+#define SDIO_PARTIAL_RESET_ACTIVE_I_MSK 0xbfffffff
+#define SDIO_PARTIAL_RESET_ACTIVE_SFT 30
+#define SDIO_PARTIAL_RESET_ACTIVE_HI 30
+#define SDIO_PARTIAL_RESET_ACTIVE_SZ 1
+#define SDIO_ALL_RESE_ACTIVE_MSK 0x80000000
+#define SDIO_ALL_RESE_ACTIVE_I_MSK 0x7fffffff
+#define SDIO_ALL_RESE_ACTIVE_SFT 31
+#define SDIO_ALL_RESE_ACTIVE_HI 31
+#define SDIO_ALL_RESE_ACTIVE_SZ 1
+#define RX_PACKET_LENGTH2_MSK 0x0000ffff
+#define RX_PACKET_LENGTH2_I_MSK 0xffff0000
+#define RX_PACKET_LENGTH2_SFT 0
+#define RX_PACKET_LENGTH2_HI 15
+#define RX_PACKET_LENGTH2_SZ 16
+#define RX_INT1_MSK 0x00010000
+#define RX_INT1_I_MSK 0xfffeffff
+#define RX_INT1_SFT 16
+#define RX_INT1_HI 16
+#define RX_INT1_SZ 1
+#define TX_DONE_MSK 0x00020000
+#define TX_DONE_I_MSK 0xfffdffff
+#define TX_DONE_SFT 17
+#define TX_DONE_HI 17
+#define TX_DONE_SZ 1
+#define HCI_TRX_FINISH_MSK 0x00040000
+#define HCI_TRX_FINISH_I_MSK 0xfffbffff
+#define HCI_TRX_FINISH_SFT 18
+#define HCI_TRX_FINISH_HI 18
+#define HCI_TRX_FINISH_SZ 1
+#define ALLOCATE_STATUS_MSK 0x00080000
+#define ALLOCATE_STATUS_I_MSK 0xfff7ffff
+#define ALLOCATE_STATUS_SFT 19
+#define ALLOCATE_STATUS_HI 19
+#define ALLOCATE_STATUS_SZ 1
+#define HCI_INPUT_FF_CNT_MSK 0x00f00000
+#define HCI_INPUT_FF_CNT_I_MSK 0xff0fffff
+#define HCI_INPUT_FF_CNT_SFT 20
+#define HCI_INPUT_FF_CNT_HI 23
+#define HCI_INPUT_FF_CNT_SZ 4
+#define HCI_OUTPUT_FF_CNT_MSK 0x1f000000
+#define HCI_OUTPUT_FF_CNT_I_MSK 0xe0ffffff
+#define HCI_OUTPUT_FF_CNT_SFT 24
+#define HCI_OUTPUT_FF_CNT_HI 28
+#define HCI_OUTPUT_FF_CNT_SZ 5
+#define AHB_HANG4_MSK 0x20000000
+#define AHB_HANG4_I_MSK 0xdfffffff
+#define AHB_HANG4_SFT 29
+#define AHB_HANG4_HI 29
+#define AHB_HANG4_SZ 1
+#define HCI_IN_QUE_EMPTY_MSK 0x40000000
+#define HCI_IN_QUE_EMPTY_I_MSK 0xbfffffff
+#define HCI_IN_QUE_EMPTY_SFT 30
+#define HCI_IN_QUE_EMPTY_HI 30
+#define HCI_IN_QUE_EMPTY_SZ 1
+#define SYSTEM_INT_MSK 0x80000000
+#define SYSTEM_INT_I_MSK 0x7fffffff
+#define SYSTEM_INT_SFT 31
+#define SYSTEM_INT_HI 31
+#define SYSTEM_INT_SZ 1
+#define CARD_RCA_REG_MSK 0x0000ffff
+#define CARD_RCA_REG_I_MSK 0xffff0000
+#define CARD_RCA_REG_SFT 0
+#define CARD_RCA_REG_HI 15
+#define CARD_RCA_REG_SZ 16
+#define SDIO_FIFO_WR_THLD_REG_MSK 0x000001ff
+#define SDIO_FIFO_WR_THLD_REG_I_MSK 0xfffffe00
+#define SDIO_FIFO_WR_THLD_REG_SFT 0
+#define SDIO_FIFO_WR_THLD_REG_HI 8
+#define SDIO_FIFO_WR_THLD_REG_SZ 9
+#define SDIO_FIFO_WR_LIMIT_REG_MSK 0x000001ff
+#define SDIO_FIFO_WR_LIMIT_REG_I_MSK 0xfffffe00
+#define SDIO_FIFO_WR_LIMIT_REG_SFT 0
+#define SDIO_FIFO_WR_LIMIT_REG_HI 8
+#define SDIO_FIFO_WR_LIMIT_REG_SZ 9
+#define SDIO_TX_DATA_BATCH_SIZE_REG_MSK 0x000001ff
+#define SDIO_TX_DATA_BATCH_SIZE_REG_I_MSK 0xfffffe00
+#define SDIO_TX_DATA_BATCH_SIZE_REG_SFT 0
+#define SDIO_TX_DATA_BATCH_SIZE_REG_HI 8
+#define SDIO_TX_DATA_BATCH_SIZE_REG_SZ 9
+#define SDIO_THLD_FOR_CMD53RD_REG_MSK 0x000001ff
+#define SDIO_THLD_FOR_CMD53RD_REG_I_MSK 0xfffffe00
+#define SDIO_THLD_FOR_CMD53RD_REG_SFT 0
+#define SDIO_THLD_FOR_CMD53RD_REG_HI 8
+#define SDIO_THLD_FOR_CMD53RD_REG_SZ 9
+#define SDIO_RX_DATA_BATCH_SIZE_REG_MSK 0x000001ff
+#define SDIO_RX_DATA_BATCH_SIZE_REG_I_MSK 0xfffffe00
+#define SDIO_RX_DATA_BATCH_SIZE_REG_SFT 0
+#define SDIO_RX_DATA_BATCH_SIZE_REG_HI 8
+#define SDIO_RX_DATA_BATCH_SIZE_REG_SZ 9
+#define START_BYTE_VALUE_MSK 0x000000ff
+#define START_BYTE_VALUE_I_MSK 0xffffff00
+#define START_BYTE_VALUE_SFT 0
+#define START_BYTE_VALUE_HI 7
+#define START_BYTE_VALUE_SZ 8
+#define END_BYTE_VALUE_MSK 0x0000ff00
+#define END_BYTE_VALUE_I_MSK 0xffff00ff
+#define END_BYTE_VALUE_SFT 8
+#define END_BYTE_VALUE_HI 15
+#define END_BYTE_VALUE_SZ 8
+#define SDIO_BYTE_MODE_BATCH_SIZE_REG_MSK 0x000000ff
+#define SDIO_BYTE_MODE_BATCH_SIZE_REG_I_MSK 0xffffff00
+#define SDIO_BYTE_MODE_BATCH_SIZE_REG_SFT 0
+#define SDIO_BYTE_MODE_BATCH_SIZE_REG_HI 7
+#define SDIO_BYTE_MODE_BATCH_SIZE_REG_SZ 8
+#define SDIO_LAST_CMD_INDEX_REG_MSK 0x0000003f
+#define SDIO_LAST_CMD_INDEX_REG_I_MSK 0xffffffc0
+#define SDIO_LAST_CMD_INDEX_REG_SFT 0
+#define SDIO_LAST_CMD_INDEX_REG_HI 5
+#define SDIO_LAST_CMD_INDEX_REG_SZ 6
+#define SDIO_LAST_CMD_CRC_REG_MSK 0x00007f00
+#define SDIO_LAST_CMD_CRC_REG_I_MSK 0xffff80ff
+#define SDIO_LAST_CMD_CRC_REG_SFT 8
+#define SDIO_LAST_CMD_CRC_REG_HI 14
+#define SDIO_LAST_CMD_CRC_REG_SZ 7
+#define SDIO_LAST_CMD_ARG_REG_MSK 0xffffffff
+#define SDIO_LAST_CMD_ARG_REG_I_MSK 0x00000000
+#define SDIO_LAST_CMD_ARG_REG_SFT 0
+#define SDIO_LAST_CMD_ARG_REG_HI 31
+#define SDIO_LAST_CMD_ARG_REG_SZ 32
+#define SDIO_BUS_STATE_REG_MSK 0x0000001f
+#define SDIO_BUS_STATE_REG_I_MSK 0xffffffe0
+#define SDIO_BUS_STATE_REG_SFT 0
+#define SDIO_BUS_STATE_REG_HI 4
+#define SDIO_BUS_STATE_REG_SZ 5
+#define SDIO_BUSY_LONG_CNT_MSK 0xffff0000
+#define SDIO_BUSY_LONG_CNT_I_MSK 0x0000ffff
+#define SDIO_BUSY_LONG_CNT_SFT 16
+#define SDIO_BUSY_LONG_CNT_HI 31
+#define SDIO_BUSY_LONG_CNT_SZ 16
+#define SDIO_CARD_STATUS_REG_MSK 0xffffffff
+#define SDIO_CARD_STATUS_REG_I_MSK 0x00000000
+#define SDIO_CARD_STATUS_REG_SFT 0
+#define SDIO_CARD_STATUS_REG_HI 31
+#define SDIO_CARD_STATUS_REG_SZ 32
+#define R5_RESPONSE_FLAG_MSK 0x000000ff
+#define R5_RESPONSE_FLAG_I_MSK 0xffffff00
+#define R5_RESPONSE_FLAG_SFT 0
+#define R5_RESPONSE_FLAG_HI 7
+#define R5_RESPONSE_FLAG_SZ 8
+#define RESP_OUT_EDGE_MSK 0x00000100
+#define RESP_OUT_EDGE_I_MSK 0xfffffeff
+#define RESP_OUT_EDGE_SFT 8
+#define RESP_OUT_EDGE_HI 8
+#define RESP_OUT_EDGE_SZ 1
+#define DAT_OUT_EDGE_MSK 0x00000200
+#define DAT_OUT_EDGE_I_MSK 0xfffffdff
+#define DAT_OUT_EDGE_SFT 9
+#define DAT_OUT_EDGE_HI 9
+#define DAT_OUT_EDGE_SZ 1
+#define MCU_TO_SDIO_INFO_MASK_MSK 0x00010000
+#define MCU_TO_SDIO_INFO_MASK_I_MSK 0xfffeffff
+#define MCU_TO_SDIO_INFO_MASK_SFT 16
+#define MCU_TO_SDIO_INFO_MASK_HI 16
+#define MCU_TO_SDIO_INFO_MASK_SZ 1
+#define INT_THROUGH_PIN_MSK 0x00020000
+#define INT_THROUGH_PIN_I_MSK 0xfffdffff
+#define INT_THROUGH_PIN_SFT 17
+#define INT_THROUGH_PIN_HI 17
+#define INT_THROUGH_PIN_SZ 1
+#define WRITE_DATA_MSK 0x000000ff
+#define WRITE_DATA_I_MSK 0xffffff00
+#define WRITE_DATA_SFT 0
+#define WRITE_DATA_HI 7
+#define WRITE_DATA_SZ 8
+#define WRITE_ADDRESS_MSK 0x0000ff00
+#define WRITE_ADDRESS_I_MSK 0xffff00ff
+#define WRITE_ADDRESS_SFT 8
+#define WRITE_ADDRESS_HI 15
+#define WRITE_ADDRESS_SZ 8
+#define READ_DATA_MSK 0x00ff0000
+#define READ_DATA_I_MSK 0xff00ffff
+#define READ_DATA_SFT 16
+#define READ_DATA_HI 23
+#define READ_DATA_SZ 8
+#define READ_ADDRESS_MSK 0xff000000
+#define READ_ADDRESS_I_MSK 0x00ffffff
+#define READ_ADDRESS_SFT 24
+#define READ_ADDRESS_HI 31
+#define READ_ADDRESS_SZ 8
+#define FN1_DMA_START_ADDR_REG_MSK 0xffffffff
+#define FN1_DMA_START_ADDR_REG_I_MSK 0x00000000
+#define FN1_DMA_START_ADDR_REG_SFT 0
+#define FN1_DMA_START_ADDR_REG_HI 31
+#define FN1_DMA_START_ADDR_REG_SZ 32
+#define SDIO_TO_MCU_INFO_MSK 0x000000ff
+#define SDIO_TO_MCU_INFO_I_MSK 0xffffff00
+#define SDIO_TO_MCU_INFO_SFT 0
+#define SDIO_TO_MCU_INFO_HI 7
+#define SDIO_TO_MCU_INFO_SZ 8
+#define SDIO_PARTIAL_RESET_MSK 0x00000100
+#define SDIO_PARTIAL_RESET_I_MSK 0xfffffeff
+#define SDIO_PARTIAL_RESET_SFT 8
+#define SDIO_PARTIAL_RESET_HI 8
+#define SDIO_PARTIAL_RESET_SZ 1
+#define SDIO_ALL_RESET_MSK 0x00000200
+#define SDIO_ALL_RESET_I_MSK 0xfffffdff
+#define SDIO_ALL_RESET_SFT 9
+#define SDIO_ALL_RESET_HI 9
+#define SDIO_ALL_RESET_SZ 1
+#define PERI_MAC_ALL_RESET_MSK 0x00000400
+#define PERI_MAC_ALL_RESET_I_MSK 0xfffffbff
+#define PERI_MAC_ALL_RESET_SFT 10
+#define PERI_MAC_ALL_RESET_HI 10
+#define PERI_MAC_ALL_RESET_SZ 1
+#define MAC_ALL_RESET_MSK 0x00000800
+#define MAC_ALL_RESET_I_MSK 0xfffff7ff
+#define MAC_ALL_RESET_SFT 11
+#define MAC_ALL_RESET_HI 11
+#define MAC_ALL_RESET_SZ 1
+#define AHB_BRIDGE_RESET_MSK 0x00001000
+#define AHB_BRIDGE_RESET_I_MSK 0xffffefff
+#define AHB_BRIDGE_RESET_SFT 12
+#define AHB_BRIDGE_RESET_HI 12
+#define AHB_BRIDGE_RESET_SZ 1
+#define IO_REG_PORT_REG_MSK 0x0001ffff
+#define IO_REG_PORT_REG_I_MSK 0xfffe0000
+#define IO_REG_PORT_REG_SFT 0
+#define IO_REG_PORT_REG_HI 16
+#define IO_REG_PORT_REG_SZ 17
+#define SDIO_FIFO_EMPTY_CNT_MSK 0x0000ffff
+#define SDIO_FIFO_EMPTY_CNT_I_MSK 0xffff0000
+#define SDIO_FIFO_EMPTY_CNT_SFT 0
+#define SDIO_FIFO_EMPTY_CNT_HI 15
+#define SDIO_FIFO_EMPTY_CNT_SZ 16
+#define SDIO_FIFO_FULL_CNT_MSK 0xffff0000
+#define SDIO_FIFO_FULL_CNT_I_MSK 0x0000ffff
+#define SDIO_FIFO_FULL_CNT_SFT 16
+#define SDIO_FIFO_FULL_CNT_HI 31
+#define SDIO_FIFO_FULL_CNT_SZ 16
+#define SDIO_CRC7_ERROR_CNT_MSK 0x0000ffff
+#define SDIO_CRC7_ERROR_CNT_I_MSK 0xffff0000
+#define SDIO_CRC7_ERROR_CNT_SFT 0
+#define SDIO_CRC7_ERROR_CNT_HI 15
+#define SDIO_CRC7_ERROR_CNT_SZ 16
+#define SDIO_CRC16_ERROR_CNT_MSK 0xffff0000
+#define SDIO_CRC16_ERROR_CNT_I_MSK 0x0000ffff
+#define SDIO_CRC16_ERROR_CNT_SFT 16
+#define SDIO_CRC16_ERROR_CNT_HI 31
+#define SDIO_CRC16_ERROR_CNT_SZ 16
+#define SDIO_RD_BLOCK_CNT_MSK 0x000001ff
+#define SDIO_RD_BLOCK_CNT_I_MSK 0xfffffe00
+#define SDIO_RD_BLOCK_CNT_SFT 0
+#define SDIO_RD_BLOCK_CNT_HI 8
+#define SDIO_RD_BLOCK_CNT_SZ 9
+#define SDIO_WR_BLOCK_CNT_MSK 0x01ff0000
+#define SDIO_WR_BLOCK_CNT_I_MSK 0xfe00ffff
+#define SDIO_WR_BLOCK_CNT_SFT 16
+#define SDIO_WR_BLOCK_CNT_HI 24
+#define SDIO_WR_BLOCK_CNT_SZ 9
+#define CMD52_RD_ABORT_CNT_MSK 0x000f0000
+#define CMD52_RD_ABORT_CNT_I_MSK 0xfff0ffff
+#define CMD52_RD_ABORT_CNT_SFT 16
+#define CMD52_RD_ABORT_CNT_HI 19
+#define CMD52_RD_ABORT_CNT_SZ 4
+#define CMD52_WR_ABORT_CNT_MSK 0x00f00000
+#define CMD52_WR_ABORT_CNT_I_MSK 0xff0fffff
+#define CMD52_WR_ABORT_CNT_SFT 20
+#define CMD52_WR_ABORT_CNT_HI 23
+#define CMD52_WR_ABORT_CNT_SZ 4
+#define SDIO_FIFO_WR_PTR_REG_MSK 0x000000ff
+#define SDIO_FIFO_WR_PTR_REG_I_MSK 0xffffff00
+#define SDIO_FIFO_WR_PTR_REG_SFT 0
+#define SDIO_FIFO_WR_PTR_REG_HI 7
+#define SDIO_FIFO_WR_PTR_REG_SZ 8
+#define SDIO_FIFO_RD_PTR_REG_MSK 0x0000ff00
+#define SDIO_FIFO_RD_PTR_REG_I_MSK 0xffff00ff
+#define SDIO_FIFO_RD_PTR_REG_SFT 8
+#define SDIO_FIFO_RD_PTR_REG_HI 15
+#define SDIO_FIFO_RD_PTR_REG_SZ 8
+#define SDIO_READ_DATA_CTRL_MSK 0x00010000
+#define SDIO_READ_DATA_CTRL_I_MSK 0xfffeffff
+#define SDIO_READ_DATA_CTRL_SFT 16
+#define SDIO_READ_DATA_CTRL_HI 16
+#define SDIO_READ_DATA_CTRL_SZ 1
+#define TX_SIZE_BEFORE_SHIFT_MSK 0x000000ff
+#define TX_SIZE_BEFORE_SHIFT_I_MSK 0xffffff00
+#define TX_SIZE_BEFORE_SHIFT_SFT 0
+#define TX_SIZE_BEFORE_SHIFT_HI 7
+#define TX_SIZE_BEFORE_SHIFT_SZ 8
+#define TX_SIZE_SHIFT_BITS_MSK 0x00000700
+#define TX_SIZE_SHIFT_BITS_I_MSK 0xfffff8ff
+#define TX_SIZE_SHIFT_BITS_SFT 8
+#define TX_SIZE_SHIFT_BITS_HI 10
+#define TX_SIZE_SHIFT_BITS_SZ 3
+#define SDIO_TX_ALLOC_STATE_MSK 0x00001000
+#define SDIO_TX_ALLOC_STATE_I_MSK 0xffffefff
+#define SDIO_TX_ALLOC_STATE_SFT 12
+#define SDIO_TX_ALLOC_STATE_HI 12
+#define SDIO_TX_ALLOC_STATE_SZ 1
+#define ALLOCATE_STATUS2_MSK 0x00010000
+#define ALLOCATE_STATUS2_I_MSK 0xfffeffff
+#define ALLOCATE_STATUS2_SFT 16
+#define ALLOCATE_STATUS2_HI 16
+#define ALLOCATE_STATUS2_SZ 1
+#define NO_ALLOCATE_SEND_ERROR_MSK 0x00020000
+#define NO_ALLOCATE_SEND_ERROR_I_MSK 0xfffdffff
+#define NO_ALLOCATE_SEND_ERROR_SFT 17
+#define NO_ALLOCATE_SEND_ERROR_HI 17
+#define NO_ALLOCATE_SEND_ERROR_SZ 1
+#define DOUBLE_ALLOCATE_ERROR_MSK 0x00040000
+#define DOUBLE_ALLOCATE_ERROR_I_MSK 0xfffbffff
+#define DOUBLE_ALLOCATE_ERROR_SFT 18
+#define DOUBLE_ALLOCATE_ERROR_HI 18
+#define DOUBLE_ALLOCATE_ERROR_SZ 1
+#define TX_DONE_STATUS_MSK 0x00080000
+#define TX_DONE_STATUS_I_MSK 0xfff7ffff
+#define TX_DONE_STATUS_SFT 19
+#define TX_DONE_STATUS_HI 19
+#define TX_DONE_STATUS_SZ 1
+#define AHB_HANG2_MSK 0x00100000
+#define AHB_HANG2_I_MSK 0xffefffff
+#define AHB_HANG2_SFT 20
+#define AHB_HANG2_HI 20
+#define AHB_HANG2_SZ 1
+#define HCI_TRX_FINISH2_MSK 0x00200000
+#define HCI_TRX_FINISH2_I_MSK 0xffdfffff
+#define HCI_TRX_FINISH2_SFT 21
+#define HCI_TRX_FINISH2_HI 21
+#define HCI_TRX_FINISH2_SZ 1
+#define INTR_RX_MSK 0x00400000
+#define INTR_RX_I_MSK 0xffbfffff
+#define INTR_RX_SFT 22
+#define INTR_RX_HI 22
+#define INTR_RX_SZ 1
+#define HCI_INPUT_QUEUE_FULL_MSK 0x00800000
+#define HCI_INPUT_QUEUE_FULL_I_MSK 0xff7fffff
+#define HCI_INPUT_QUEUE_FULL_SFT 23
+#define HCI_INPUT_QUEUE_FULL_HI 23
+#define HCI_INPUT_QUEUE_FULL_SZ 1
+#define ALLOCATESTATUS_MSK 0x00000001
+#define ALLOCATESTATUS_I_MSK 0xfffffffe
+#define ALLOCATESTATUS_SFT 0
+#define ALLOCATESTATUS_HI 0
+#define ALLOCATESTATUS_SZ 1
+#define HCI_TRX_FINISH3_MSK 0x00000002
+#define HCI_TRX_FINISH3_I_MSK 0xfffffffd
+#define HCI_TRX_FINISH3_SFT 1
+#define HCI_TRX_FINISH3_HI 1
+#define HCI_TRX_FINISH3_SZ 1
+#define HCI_IN_QUE_EMPTY2_MSK 0x00000004
+#define HCI_IN_QUE_EMPTY2_I_MSK 0xfffffffb
+#define HCI_IN_QUE_EMPTY2_SFT 2
+#define HCI_IN_QUE_EMPTY2_HI 2
+#define HCI_IN_QUE_EMPTY2_SZ 1
+#define MTX_MNG_UPTHOLD_INT_MSK 0x00000008
+#define MTX_MNG_UPTHOLD_INT_I_MSK 0xfffffff7
+#define MTX_MNG_UPTHOLD_INT_SFT 3
+#define MTX_MNG_UPTHOLD_INT_HI 3
+#define MTX_MNG_UPTHOLD_INT_SZ 1
+#define EDCA0_UPTHOLD_INT_MSK 0x00000010
+#define EDCA0_UPTHOLD_INT_I_MSK 0xffffffef
+#define EDCA0_UPTHOLD_INT_SFT 4
+#define EDCA0_UPTHOLD_INT_HI 4
+#define EDCA0_UPTHOLD_INT_SZ 1
+#define EDCA1_UPTHOLD_INT_MSK 0x00000020
+#define EDCA1_UPTHOLD_INT_I_MSK 0xffffffdf
+#define EDCA1_UPTHOLD_INT_SFT 5
+#define EDCA1_UPTHOLD_INT_HI 5
+#define EDCA1_UPTHOLD_INT_SZ 1
+#define EDCA2_UPTHOLD_INT_MSK 0x00000040
+#define EDCA2_UPTHOLD_INT_I_MSK 0xffffffbf
+#define EDCA2_UPTHOLD_INT_SFT 6
+#define EDCA2_UPTHOLD_INT_HI 6
+#define EDCA2_UPTHOLD_INT_SZ 1
+#define EDCA3_UPTHOLD_INT_MSK 0x00000080
+#define EDCA3_UPTHOLD_INT_I_MSK 0xffffff7f
+#define EDCA3_UPTHOLD_INT_SFT 7
+#define EDCA3_UPTHOLD_INT_HI 7
+#define EDCA3_UPTHOLD_INT_SZ 1
+#define TX_PAGE_REMAIN2_MSK 0x0000ff00
+#define TX_PAGE_REMAIN2_I_MSK 0xffff00ff
+#define TX_PAGE_REMAIN2_SFT 8
+#define TX_PAGE_REMAIN2_HI 15
+#define TX_PAGE_REMAIN2_SZ 8
+#define TX_ID_REMAIN3_MSK 0x007f0000
+#define TX_ID_REMAIN3_I_MSK 0xff80ffff
+#define TX_ID_REMAIN3_SFT 16
+#define TX_ID_REMAIN3_HI 22
+#define TX_ID_REMAIN3_SZ 7
+#define HCI_OUTPUT_FF_CNT_0_MSK 0x00800000
+#define HCI_OUTPUT_FF_CNT_0_I_MSK 0xff7fffff
+#define HCI_OUTPUT_FF_CNT_0_SFT 23
+#define HCI_OUTPUT_FF_CNT_0_HI 23
+#define HCI_OUTPUT_FF_CNT_0_SZ 1
+#define HCI_OUTPUT_FF_CNT2_MSK 0x0f000000
+#define HCI_OUTPUT_FF_CNT2_I_MSK 0xf0ffffff
+#define HCI_OUTPUT_FF_CNT2_SFT 24
+#define HCI_OUTPUT_FF_CNT2_HI 27
+#define HCI_OUTPUT_FF_CNT2_SZ 4
+#define HCI_INPUT_FF_CNT2_MSK 0xf0000000
+#define HCI_INPUT_FF_CNT2_I_MSK 0x0fffffff
+#define HCI_INPUT_FF_CNT2_SFT 28
+#define HCI_INPUT_FF_CNT2_HI 31
+#define HCI_INPUT_FF_CNT2_SZ 4
+#define F1_BLOCK_SIZE_0_REG_MSK 0x00000fff
+#define F1_BLOCK_SIZE_0_REG_I_MSK 0xfffff000
+#define F1_BLOCK_SIZE_0_REG_SFT 0
+#define F1_BLOCK_SIZE_0_REG_HI 11
+#define F1_BLOCK_SIZE_0_REG_SZ 12
+#define START_BYTE_VALUE2_MSK 0x000000ff
+#define START_BYTE_VALUE2_I_MSK 0xffffff00
+#define START_BYTE_VALUE2_SFT 0
+#define START_BYTE_VALUE2_HI 7
+#define START_BYTE_VALUE2_SZ 8
+#define COMMAND_COUNTER_MSK 0x0000ff00
+#define COMMAND_COUNTER_I_MSK 0xffff00ff
+#define COMMAND_COUNTER_SFT 8
+#define COMMAND_COUNTER_HI 15
+#define COMMAND_COUNTER_SZ 8
+#define CMD_LOG_PART1_MSK 0xffff0000
+#define CMD_LOG_PART1_I_MSK 0x0000ffff
+#define CMD_LOG_PART1_SFT 16
+#define CMD_LOG_PART1_HI 31
+#define CMD_LOG_PART1_SZ 16
+#define CMD_LOG_PART2_MSK 0x00ffffff
+#define CMD_LOG_PART2_I_MSK 0xff000000
+#define CMD_LOG_PART2_SFT 0
+#define CMD_LOG_PART2_HI 23
+#define CMD_LOG_PART2_SZ 24
+#define END_BYTE_VALUE2_MSK 0xff000000
+#define END_BYTE_VALUE2_I_MSK 0x00ffffff
+#define END_BYTE_VALUE2_SFT 24
+#define END_BYTE_VALUE2_HI 31
+#define END_BYTE_VALUE2_SZ 8
+#define RX_PACKET_LENGTH3_MSK 0x0000ffff
+#define RX_PACKET_LENGTH3_I_MSK 0xffff0000
+#define RX_PACKET_LENGTH3_SFT 0
+#define RX_PACKET_LENGTH3_HI 15
+#define RX_PACKET_LENGTH3_SZ 16
+#define RX_INT3_MSK 0x00010000
+#define RX_INT3_I_MSK 0xfffeffff
+#define RX_INT3_SFT 16
+#define RX_INT3_HI 16
+#define RX_INT3_SZ 1
+#define TX_ID_REMAIN2_MSK 0x00fe0000
+#define TX_ID_REMAIN2_I_MSK 0xff01ffff
+#define TX_ID_REMAIN2_SFT 17
+#define TX_ID_REMAIN2_HI 23
+#define TX_ID_REMAIN2_SZ 7
+#define TX_PAGE_REMAIN3_MSK 0xff000000
+#define TX_PAGE_REMAIN3_I_MSK 0x00ffffff
+#define TX_PAGE_REMAIN3_SFT 24
+#define TX_PAGE_REMAIN3_HI 31
+#define TX_PAGE_REMAIN3_SZ 8
+#define CCCR_00H_REG_MSK 0x000000ff
+#define CCCR_00H_REG_I_MSK 0xffffff00
+#define CCCR_00H_REG_SFT 0
+#define CCCR_00H_REG_HI 7
+#define CCCR_00H_REG_SZ 8
+#define CCCR_02H_REG_MSK 0x00ff0000
+#define CCCR_02H_REG_I_MSK 0xff00ffff
+#define CCCR_02H_REG_SFT 16
+#define CCCR_02H_REG_HI 23
+#define CCCR_02H_REG_SZ 8
+#define CCCR_03H_REG_MSK 0xff000000
+#define CCCR_03H_REG_I_MSK 0x00ffffff
+#define CCCR_03H_REG_SFT 24
+#define CCCR_03H_REG_HI 31
+#define CCCR_03H_REG_SZ 8
+#define CCCR_04H_REG_MSK 0x000000ff
+#define CCCR_04H_REG_I_MSK 0xffffff00
+#define CCCR_04H_REG_SFT 0
+#define CCCR_04H_REG_HI 7
+#define CCCR_04H_REG_SZ 8
+#define CCCR_05H_REG_MSK 0x0000ff00
+#define CCCR_05H_REG_I_MSK 0xffff00ff
+#define CCCR_05H_REG_SFT 8
+#define CCCR_05H_REG_HI 15
+#define CCCR_05H_REG_SZ 8
+#define CCCR_06H_REG_MSK 0x000f0000
+#define CCCR_06H_REG_I_MSK 0xfff0ffff
+#define CCCR_06H_REG_SFT 16
+#define CCCR_06H_REG_HI 19
+#define CCCR_06H_REG_SZ 4
+#define CCCR_07H_REG_MSK 0xff000000
+#define CCCR_07H_REG_I_MSK 0x00ffffff
+#define CCCR_07H_REG_SFT 24
+#define CCCR_07H_REG_HI 31
+#define CCCR_07H_REG_SZ 8
+#define SUPPORT_DIRECT_COMMAND_SDIO_MSK 0x00000001
+#define SUPPORT_DIRECT_COMMAND_SDIO_I_MSK 0xfffffffe
+#define SUPPORT_DIRECT_COMMAND_SDIO_SFT 0
+#define SUPPORT_DIRECT_COMMAND_SDIO_HI 0
+#define SUPPORT_DIRECT_COMMAND_SDIO_SZ 1
+#define SUPPORT_MULTIPLE_BLOCK_TRANSFER_MSK 0x00000002
+#define SUPPORT_MULTIPLE_BLOCK_TRANSFER_I_MSK 0xfffffffd
+#define SUPPORT_MULTIPLE_BLOCK_TRANSFER_SFT 1
+#define SUPPORT_MULTIPLE_BLOCK_TRANSFER_HI 1
+#define SUPPORT_MULTIPLE_BLOCK_TRANSFER_SZ 1
+#define SUPPORT_READ_WAIT_MSK 0x00000004
+#define SUPPORT_READ_WAIT_I_MSK 0xfffffffb
+#define SUPPORT_READ_WAIT_SFT 2
+#define SUPPORT_READ_WAIT_HI 2
+#define SUPPORT_READ_WAIT_SZ 1
+#define SUPPORT_BUS_CONTROL_MSK 0x00000008
+#define SUPPORT_BUS_CONTROL_I_MSK 0xfffffff7
+#define SUPPORT_BUS_CONTROL_SFT 3
+#define SUPPORT_BUS_CONTROL_HI 3
+#define SUPPORT_BUS_CONTROL_SZ 1
+#define SUPPORT_BLOCK_GAP_INTERRUPT_MSK 0x00000010
+#define SUPPORT_BLOCK_GAP_INTERRUPT_I_MSK 0xffffffef
+#define SUPPORT_BLOCK_GAP_INTERRUPT_SFT 4
+#define SUPPORT_BLOCK_GAP_INTERRUPT_HI 4
+#define SUPPORT_BLOCK_GAP_INTERRUPT_SZ 1
+#define ENABLE_BLOCK_GAP_INTERRUPT_MSK 0x00000020
+#define ENABLE_BLOCK_GAP_INTERRUPT_I_MSK 0xffffffdf
+#define ENABLE_BLOCK_GAP_INTERRUPT_SFT 5
+#define ENABLE_BLOCK_GAP_INTERRUPT_HI 5
+#define ENABLE_BLOCK_GAP_INTERRUPT_SZ 1
+#define LOW_SPEED_CARD_MSK 0x00000040
+#define LOW_SPEED_CARD_I_MSK 0xffffffbf
+#define LOW_SPEED_CARD_SFT 6
+#define LOW_SPEED_CARD_HI 6
+#define LOW_SPEED_CARD_SZ 1
+#define LOW_SPEED_CARD_4BIT_MSK 0x00000080
+#define LOW_SPEED_CARD_4BIT_I_MSK 0xffffff7f
+#define LOW_SPEED_CARD_4BIT_SFT 7
+#define LOW_SPEED_CARD_4BIT_HI 7
+#define LOW_SPEED_CARD_4BIT_SZ 1
+#define COMMON_CIS_PONTER_MSK 0x01ffff00
+#define COMMON_CIS_PONTER_I_MSK 0xfe0000ff
+#define COMMON_CIS_PONTER_SFT 8
+#define COMMON_CIS_PONTER_HI 24
+#define COMMON_CIS_PONTER_SZ 17
+#define SUPPORT_HIGH_SPEED_MSK 0x01000000
+#define SUPPORT_HIGH_SPEED_I_MSK 0xfeffffff
+#define SUPPORT_HIGH_SPEED_SFT 24
+#define SUPPORT_HIGH_SPEED_HI 24
+#define SUPPORT_HIGH_SPEED_SZ 1
+#define BSS_MSK 0x0e000000
+#define BSS_I_MSK 0xf1ffffff
+#define BSS_SFT 25
+#define BSS_HI 27
+#define BSS_SZ 3
+#define FBR_100H_REG_MSK 0x0000000f
+#define FBR_100H_REG_I_MSK 0xfffffff0
+#define FBR_100H_REG_SFT 0
+#define FBR_100H_REG_HI 3
+#define FBR_100H_REG_SZ 4
+#define CSASUPPORT_MSK 0x00000040
+#define CSASUPPORT_I_MSK 0xffffffbf
+#define CSASUPPORT_SFT 6
+#define CSASUPPORT_HI 6
+#define CSASUPPORT_SZ 1
+#define ENABLECSA_MSK 0x00000080
+#define ENABLECSA_I_MSK 0xffffff7f
+#define ENABLECSA_SFT 7
+#define ENABLECSA_HI 7
+#define ENABLECSA_SZ 1
+#define FBR_101H_REG_MSK 0x0000ff00
+#define FBR_101H_REG_I_MSK 0xffff00ff
+#define FBR_101H_REG_SFT 8
+#define FBR_101H_REG_HI 15
+#define FBR_101H_REG_SZ 8
+#define FBR_109H_REG_MSK 0x01ffff00
+#define FBR_109H_REG_I_MSK 0xfe0000ff
+#define FBR_109H_REG_SFT 8
+#define FBR_109H_REG_HI 24
+#define FBR_109H_REG_SZ 17
+#define F0_CIS_CONTENT_REG_31_0_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_31_0_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_31_0_SFT 0
+#define F0_CIS_CONTENT_REG_31_0_HI 31
+#define F0_CIS_CONTENT_REG_31_0_SZ 32
+#define F0_CIS_CONTENT_REG_63_32_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_63_32_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_63_32_SFT 0
+#define F0_CIS_CONTENT_REG_63_32_HI 31
+#define F0_CIS_CONTENT_REG_63_32_SZ 32
+#define F0_CIS_CONTENT_REG_95_64_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_95_64_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_95_64_SFT 0
+#define F0_CIS_CONTENT_REG_95_64_HI 31
+#define F0_CIS_CONTENT_REG_95_64_SZ 32
+#define F0_CIS_CONTENT_REG_127_96_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_127_96_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_127_96_SFT 0
+#define F0_CIS_CONTENT_REG_127_96_HI 31
+#define F0_CIS_CONTENT_REG_127_96_SZ 32
+#define F0_CIS_CONTENT_REG_159_128_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_159_128_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_159_128_SFT 0
+#define F0_CIS_CONTENT_REG_159_128_HI 31
+#define F0_CIS_CONTENT_REG_159_128_SZ 32
+#define F0_CIS_CONTENT_REG_191_160_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_191_160_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_191_160_SFT 0
+#define F0_CIS_CONTENT_REG_191_160_HI 31
+#define F0_CIS_CONTENT_REG_191_160_SZ 32
+#define F0_CIS_CONTENT_REG_223_192_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_223_192_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_223_192_SFT 0
+#define F0_CIS_CONTENT_REG_223_192_HI 31
+#define F0_CIS_CONTENT_REG_223_192_SZ 32
+#define F0_CIS_CONTENT_REG_255_224_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_255_224_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_255_224_SFT 0
+#define F0_CIS_CONTENT_REG_255_224_HI 31
+#define F0_CIS_CONTENT_REG_255_224_SZ 32
+#define F0_CIS_CONTENT_REG_287_256_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_287_256_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_287_256_SFT 0
+#define F0_CIS_CONTENT_REG_287_256_HI 31
+#define F0_CIS_CONTENT_REG_287_256_SZ 32
+#define F0_CIS_CONTENT_REG_319_288_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_319_288_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_319_288_SFT 0
+#define F0_CIS_CONTENT_REG_319_288_HI 31
+#define F0_CIS_CONTENT_REG_319_288_SZ 32
+#define F0_CIS_CONTENT_REG_351_320_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_351_320_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_351_320_SFT 0
+#define F0_CIS_CONTENT_REG_351_320_HI 31
+#define F0_CIS_CONTENT_REG_351_320_SZ 32
+#define F0_CIS_CONTENT_REG_383_352_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_383_352_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_383_352_SFT 0
+#define F0_CIS_CONTENT_REG_383_352_HI 31
+#define F0_CIS_CONTENT_REG_383_352_SZ 32
+#define F0_CIS_CONTENT_REG_415_384_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_415_384_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_415_384_SFT 0
+#define F0_CIS_CONTENT_REG_415_384_HI 31
+#define F0_CIS_CONTENT_REG_415_384_SZ 32
+#define F0_CIS_CONTENT_REG_447_416_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_447_416_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_447_416_SFT 0
+#define F0_CIS_CONTENT_REG_447_416_HI 31
+#define F0_CIS_CONTENT_REG_447_416_SZ 32
+#define F0_CIS_CONTENT_REG_479_448_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_479_448_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_479_448_SFT 0
+#define F0_CIS_CONTENT_REG_479_448_HI 31
+#define F0_CIS_CONTENT_REG_479_448_SZ 32
+#define F0_CIS_CONTENT_REG_511_480_MSK 0xffffffff
+#define F0_CIS_CONTENT_REG_511_480_I_MSK 0x00000000
+#define F0_CIS_CONTENT_REG_511_480_SFT 0
+#define F0_CIS_CONTENT_REG_511_480_HI 31
+#define F0_CIS_CONTENT_REG_511_480_SZ 32
+#define F1_CIS_CONTENT_REG_31_0_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_31_0_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_31_0_SFT 0
+#define F1_CIS_CONTENT_REG_31_0_HI 31
+#define F1_CIS_CONTENT_REG_31_0_SZ 32
+#define F1_CIS_CONTENT_REG_63_32_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_63_32_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_63_32_SFT 0
+#define F1_CIS_CONTENT_REG_63_32_HI 31
+#define F1_CIS_CONTENT_REG_63_32_SZ 32
+#define F1_CIS_CONTENT_REG_95_64_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_95_64_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_95_64_SFT 0
+#define F1_CIS_CONTENT_REG_95_64_HI 31
+#define F1_CIS_CONTENT_REG_95_64_SZ 32
+#define F1_CIS_CONTENT_REG_127_96_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_127_96_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_127_96_SFT 0
+#define F1_CIS_CONTENT_REG_127_96_HI 31
+#define F1_CIS_CONTENT_REG_127_96_SZ 32
+#define F1_CIS_CONTENT_REG_159_128_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_159_128_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_159_128_SFT 0
+#define F1_CIS_CONTENT_REG_159_128_HI 31
+#define F1_CIS_CONTENT_REG_159_128_SZ 32
+#define F1_CIS_CONTENT_REG_191_160_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_191_160_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_191_160_SFT 0
+#define F1_CIS_CONTENT_REG_191_160_HI 31
+#define F1_CIS_CONTENT_REG_191_160_SZ 32
+#define F1_CIS_CONTENT_REG_223_192_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_223_192_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_223_192_SFT 0
+#define F1_CIS_CONTENT_REG_223_192_HI 31
+#define F1_CIS_CONTENT_REG_223_192_SZ 32
+#define F1_CIS_CONTENT_REG_255_224_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_255_224_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_255_224_SFT 0
+#define F1_CIS_CONTENT_REG_255_224_HI 31
+#define F1_CIS_CONTENT_REG_255_224_SZ 32
+#define F1_CIS_CONTENT_REG_287_256_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_287_256_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_287_256_SFT 0
+#define F1_CIS_CONTENT_REG_287_256_HI 31
+#define F1_CIS_CONTENT_REG_287_256_SZ 32
+#define F1_CIS_CONTENT_REG_319_288_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_319_288_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_319_288_SFT 0
+#define F1_CIS_CONTENT_REG_319_288_HI 31
+#define F1_CIS_CONTENT_REG_319_288_SZ 32
+#define F1_CIS_CONTENT_REG_351_320_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_351_320_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_351_320_SFT 0
+#define F1_CIS_CONTENT_REG_351_320_HI 31
+#define F1_CIS_CONTENT_REG_351_320_SZ 32
+#define F1_CIS_CONTENT_REG_383_352_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_383_352_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_383_352_SFT 0
+#define F1_CIS_CONTENT_REG_383_352_HI 31
+#define F1_CIS_CONTENT_REG_383_352_SZ 32
+#define F1_CIS_CONTENT_REG_415_384_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_415_384_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_415_384_SFT 0
+#define F1_CIS_CONTENT_REG_415_384_HI 31
+#define F1_CIS_CONTENT_REG_415_384_SZ 32
+#define F1_CIS_CONTENT_REG_447_416_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_447_416_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_447_416_SFT 0
+#define F1_CIS_CONTENT_REG_447_416_HI 31
+#define F1_CIS_CONTENT_REG_447_416_SZ 32
+#define F1_CIS_CONTENT_REG_479_448_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_479_448_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_479_448_SFT 0
+#define F1_CIS_CONTENT_REG_479_448_HI 31
+#define F1_CIS_CONTENT_REG_479_448_SZ 32
+#define F1_CIS_CONTENT_REG_511_480_MSK 0xffffffff
+#define F1_CIS_CONTENT_REG_511_480_I_MSK 0x00000000
+#define F1_CIS_CONTENT_REG_511_480_SFT 0
+#define F1_CIS_CONTENT_REG_511_480_HI 31
+#define F1_CIS_CONTENT_REG_511_480_SZ 32
+#define SPI_MODE_MSK 0xffffffff
+#define SPI_MODE_I_MSK 0x00000000
+#define SPI_MODE_SFT 0
+#define SPI_MODE_HI 31
+#define SPI_MODE_SZ 32
+#define RX_QUOTA_MSK 0x0000ffff
+#define RX_QUOTA_I_MSK 0xffff0000
+#define RX_QUOTA_SFT 0
+#define RX_QUOTA_HI 15
+#define RX_QUOTA_SZ 16
+#define CONDI_NUM_MSK 0x000000ff
+#define CONDI_NUM_I_MSK 0xffffff00
+#define CONDI_NUM_SFT 0
+#define CONDI_NUM_HI 7
+#define CONDI_NUM_SZ 8
+#define HOST_PATH_MSK 0x00000001
+#define HOST_PATH_I_MSK 0xfffffffe
+#define HOST_PATH_SFT 0
+#define HOST_PATH_HI 0
+#define HOST_PATH_SZ 1
+#define TX_SEG_MSK 0xffffffff
+#define TX_SEG_I_MSK 0x00000000
+#define TX_SEG_SFT 0
+#define TX_SEG_HI 31
+#define TX_SEG_SZ 32
+#define BRST_MODE_MSK 0x00000001
+#define BRST_MODE_I_MSK 0xfffffffe
+#define BRST_MODE_SFT 0
+#define BRST_MODE_HI 0
+#define BRST_MODE_SZ 1
+#define CLK_WIDTH_MSK 0x0000ffff
+#define CLK_WIDTH_I_MSK 0xffff0000
+#define CLK_WIDTH_SFT 0
+#define CLK_WIDTH_HI 15
+#define CLK_WIDTH_SZ 16
+#define CSN_INTER_MSK 0xffff0000
+#define CSN_INTER_I_MSK 0x0000ffff
+#define CSN_INTER_SFT 16
+#define CSN_INTER_HI 31
+#define CSN_INTER_SZ 16
+#define BACK_DLY_MSK 0x0000ffff
+#define BACK_DLY_I_MSK 0xffff0000
+#define BACK_DLY_SFT 0
+#define BACK_DLY_HI 15
+#define BACK_DLY_SZ 16
+#define FRONT_DLY_MSK 0xffff0000
+#define FRONT_DLY_I_MSK 0x0000ffff
+#define FRONT_DLY_SFT 16
+#define FRONT_DLY_HI 31
+#define FRONT_DLY_SZ 16
+#define RX_FIFO_FAIL_MSK 0x00000002
+#define RX_FIFO_FAIL_I_MSK 0xfffffffd
+#define RX_FIFO_FAIL_SFT 1
+#define RX_FIFO_FAIL_HI 1
+#define RX_FIFO_FAIL_SZ 1
+#define RX_HOST_FAIL_MSK 0x00000004
+#define RX_HOST_FAIL_I_MSK 0xfffffffb
+#define RX_HOST_FAIL_SFT 2
+#define RX_HOST_FAIL_HI 2
+#define RX_HOST_FAIL_SZ 1
+#define TX_FIFO_FAIL_MSK 0x00000008
+#define TX_FIFO_FAIL_I_MSK 0xfffffff7
+#define TX_FIFO_FAIL_SFT 3
+#define TX_FIFO_FAIL_HI 3
+#define TX_FIFO_FAIL_SZ 1
+#define TX_HOST_FAIL_MSK 0x00000010
+#define TX_HOST_FAIL_I_MSK 0xffffffef
+#define TX_HOST_FAIL_SFT 4
+#define TX_HOST_FAIL_HI 4
+#define TX_HOST_FAIL_SZ 1
+#define SPI_DOUBLE_ALLOC_MSK 0x00000020
+#define SPI_DOUBLE_ALLOC_I_MSK 0xffffffdf
+#define SPI_DOUBLE_ALLOC_SFT 5
+#define SPI_DOUBLE_ALLOC_HI 5
+#define SPI_DOUBLE_ALLOC_SZ 1
+#define SPI_TX_NO_ALLOC_MSK 0x00000040
+#define SPI_TX_NO_ALLOC_I_MSK 0xffffffbf
+#define SPI_TX_NO_ALLOC_SFT 6
+#define SPI_TX_NO_ALLOC_HI 6
+#define SPI_TX_NO_ALLOC_SZ 1
+#define RDATA_RDY_MSK 0x00000080
+#define RDATA_RDY_I_MSK 0xffffff7f
+#define RDATA_RDY_SFT 7
+#define RDATA_RDY_HI 7
+#define RDATA_RDY_SZ 1
+#define SPI_ALLOC_STATUS_MSK 0x00000100
+#define SPI_ALLOC_STATUS_I_MSK 0xfffffeff
+#define SPI_ALLOC_STATUS_SFT 8
+#define SPI_ALLOC_STATUS_HI 8
+#define SPI_ALLOC_STATUS_SZ 1
+#define SPI_DBG_WR_FIFO_FULL_MSK 0x00000200
+#define SPI_DBG_WR_FIFO_FULL_I_MSK 0xfffffdff
+#define SPI_DBG_WR_FIFO_FULL_SFT 9
+#define SPI_DBG_WR_FIFO_FULL_HI 9
+#define SPI_DBG_WR_FIFO_FULL_SZ 1
+#define RX_LEN_MSK 0xffff0000
+#define RX_LEN_I_MSK 0x0000ffff
+#define RX_LEN_SFT 16
+#define RX_LEN_HI 31
+#define RX_LEN_SZ 16
+#define SPI_TX_ALLOC_SIZE_SHIFT_BITS_MSK 0x00000007
+#define SPI_TX_ALLOC_SIZE_SHIFT_BITS_I_MSK 0xfffffff8
+#define SPI_TX_ALLOC_SIZE_SHIFT_BITS_SFT 0
+#define SPI_TX_ALLOC_SIZE_SHIFT_BITS_HI 2
+#define SPI_TX_ALLOC_SIZE_SHIFT_BITS_SZ 3
+#define SPI_HOST_TX_ALLOC_PKBUF_MSK 0x00000100
+#define SPI_HOST_TX_ALLOC_PKBUF_I_MSK 0xfffffeff
+#define SPI_HOST_TX_ALLOC_PKBUF_SFT 8
+#define SPI_HOST_TX_ALLOC_PKBUF_HI 8
+#define SPI_HOST_TX_ALLOC_PKBUF_SZ 1
+#define SPI_TX_ALLOC_SIZE_MSK 0x000000ff
+#define SPI_TX_ALLOC_SIZE_I_MSK 0xffffff00
+#define SPI_TX_ALLOC_SIZE_SFT 0
+#define SPI_TX_ALLOC_SIZE_HI 7
+#define SPI_TX_ALLOC_SIZE_SZ 8
+#define RD_DAT_CNT_MSK 0x0000ffff
+#define RD_DAT_CNT_I_MSK 0xffff0000
+#define RD_DAT_CNT_SFT 0
+#define RD_DAT_CNT_HI 15
+#define RD_DAT_CNT_SZ 16
+#define RD_STS_CNT_MSK 0xffff0000
+#define RD_STS_CNT_I_MSK 0x0000ffff
+#define RD_STS_CNT_SFT 16
+#define RD_STS_CNT_HI 31
+#define RD_STS_CNT_SZ 16
+#define JUDGE_CNT_MSK 0x0000ffff
+#define JUDGE_CNT_I_MSK 0xffff0000
+#define JUDGE_CNT_SFT 0
+#define JUDGE_CNT_HI 15
+#define JUDGE_CNT_SZ 16
+#define RD_STS_CNT_CLR_MSK 0x00010000
+#define RD_STS_CNT_CLR_I_MSK 0xfffeffff
+#define RD_STS_CNT_CLR_SFT 16
+#define RD_STS_CNT_CLR_HI 16
+#define RD_STS_CNT_CLR_SZ 1
+#define RD_DAT_CNT_CLR_MSK 0x00020000
+#define RD_DAT_CNT_CLR_I_MSK 0xfffdffff
+#define RD_DAT_CNT_CLR_SFT 17
+#define RD_DAT_CNT_CLR_HI 17
+#define RD_DAT_CNT_CLR_SZ 1
+#define JUDGE_CNT_CLR_MSK 0x00040000
+#define JUDGE_CNT_CLR_I_MSK 0xfffbffff
+#define JUDGE_CNT_CLR_SFT 18
+#define JUDGE_CNT_CLR_HI 18
+#define JUDGE_CNT_CLR_SZ 1
+#define TX_DONE_CNT_MSK 0x0000ffff
+#define TX_DONE_CNT_I_MSK 0xffff0000
+#define TX_DONE_CNT_SFT 0
+#define TX_DONE_CNT_HI 15
+#define TX_DONE_CNT_SZ 16
+#define TX_DISCARD_CNT_MSK 0xffff0000
+#define TX_DISCARD_CNT_I_MSK 0x0000ffff
+#define TX_DISCARD_CNT_SFT 16
+#define TX_DISCARD_CNT_HI 31
+#define TX_DISCARD_CNT_SZ 16
+#define TX_SET_CNT_MSK 0x0000ffff
+#define TX_SET_CNT_I_MSK 0xffff0000
+#define TX_SET_CNT_SFT 0
+#define TX_SET_CNT_HI 15
+#define TX_SET_CNT_SZ 16
+#define TX_DISCARD_CNT_CLR_MSK 0x00010000
+#define TX_DISCARD_CNT_CLR_I_MSK 0xfffeffff
+#define TX_DISCARD_CNT_CLR_SFT 16
+#define TX_DISCARD_CNT_CLR_HI 16
+#define TX_DISCARD_CNT_CLR_SZ 1
+#define TX_DONE_CNT_CLR_MSK 0x00020000
+#define TX_DONE_CNT_CLR_I_MSK 0xfffdffff
+#define TX_DONE_CNT_CLR_SFT 17
+#define TX_DONE_CNT_CLR_HI 17
+#define TX_DONE_CNT_CLR_SZ 1
+#define TX_SET_CNT_CLR_MSK 0x00040000
+#define TX_SET_CNT_CLR_I_MSK 0xfffbffff
+#define TX_SET_CNT_CLR_SFT 18
+#define TX_SET_CNT_CLR_HI 18
+#define TX_SET_CNT_CLR_SZ 1
+#define DAT_MODE_OFF_MSK 0x00080000
+#define DAT_MODE_OFF_I_MSK 0xfff7ffff
+#define DAT_MODE_OFF_SFT 19
+#define DAT_MODE_OFF_HI 19
+#define DAT_MODE_OFF_SZ 1
+#define TX_FIFO_RESIDUE_MSK 0x00700000
+#define TX_FIFO_RESIDUE_I_MSK 0xff8fffff
+#define TX_FIFO_RESIDUE_SFT 20
+#define TX_FIFO_RESIDUE_HI 22
+#define TX_FIFO_RESIDUE_SZ 3
+#define RX_FIFO_RESIDUE_MSK 0x07000000
+#define RX_FIFO_RESIDUE_I_MSK 0xf8ffffff
+#define RX_FIFO_RESIDUE_SFT 24
+#define RX_FIFO_RESIDUE_HI 26
+#define RX_FIFO_RESIDUE_SZ 3
+#define RX_RDY_MSK 0x00000001
+#define RX_RDY_I_MSK 0xfffffffe
+#define RX_RDY_SFT 0
+#define RX_RDY_HI 0
+#define RX_RDY_SZ 1
+#define SDIO_SYS_INT_MSK 0x00000004
+#define SDIO_SYS_INT_I_MSK 0xfffffffb
+#define SDIO_SYS_INT_SFT 2
+#define SDIO_SYS_INT_HI 2
+#define SDIO_SYS_INT_SZ 1
+#define EDCA0_LOWTHOLD_INT_MSK 0x00000008
+#define EDCA0_LOWTHOLD_INT_I_MSK 0xfffffff7
+#define EDCA0_LOWTHOLD_INT_SFT 3
+#define EDCA0_LOWTHOLD_INT_HI 3
+#define EDCA0_LOWTHOLD_INT_SZ 1
+#define EDCA1_LOWTHOLD_INT_MSK 0x00000010
+#define EDCA1_LOWTHOLD_INT_I_MSK 0xffffffef
+#define EDCA1_LOWTHOLD_INT_SFT 4
+#define EDCA1_LOWTHOLD_INT_HI 4
+#define EDCA1_LOWTHOLD_INT_SZ 1
+#define EDCA2_LOWTHOLD_INT_MSK 0x00000020
+#define EDCA2_LOWTHOLD_INT_I_MSK 0xffffffdf
+#define EDCA2_LOWTHOLD_INT_SFT 5
+#define EDCA2_LOWTHOLD_INT_HI 5
+#define EDCA2_LOWTHOLD_INT_SZ 1
+#define EDCA3_LOWTHOLD_INT_MSK 0x00000040
+#define EDCA3_LOWTHOLD_INT_I_MSK 0xffffffbf
+#define EDCA3_LOWTHOLD_INT_SFT 6
+#define EDCA3_LOWTHOLD_INT_HI 6
+#define EDCA3_LOWTHOLD_INT_SZ 1
+#define TX_LIMIT_INT_IN_MSK 0x00000080
+#define TX_LIMIT_INT_IN_I_MSK 0xffffff7f
+#define TX_LIMIT_INT_IN_SFT 7
+#define TX_LIMIT_INT_IN_HI 7
+#define TX_LIMIT_INT_IN_SZ 1
+#define SPI_FN1_MSK 0x00007f00
+#define SPI_FN1_I_MSK 0xffff80ff
+#define SPI_FN1_SFT 8
+#define SPI_FN1_HI 14
+#define SPI_FN1_SZ 7
+#define SPI_CLK_EN_INT_MSK 0x00008000
+#define SPI_CLK_EN_INT_I_MSK 0xffff7fff
+#define SPI_CLK_EN_INT_SFT 15
+#define SPI_CLK_EN_INT_HI 15
+#define SPI_CLK_EN_INT_SZ 1
+#define SPI_HOST_MASK_MSK 0x00ff0000
+#define SPI_HOST_MASK_I_MSK 0xff00ffff
+#define SPI_HOST_MASK_SFT 16
+#define SPI_HOST_MASK_HI 23
+#define SPI_HOST_MASK_SZ 8
+#define I2CM_INT_WDONE_MSK 0x00000001
+#define I2CM_INT_WDONE_I_MSK 0xfffffffe
+#define I2CM_INT_WDONE_SFT 0
+#define I2CM_INT_WDONE_HI 0
+#define I2CM_INT_WDONE_SZ 1
+#define I2CM_INT_RDONE_MSK 0x00000002
+#define I2CM_INT_RDONE_I_MSK 0xfffffffd
+#define I2CM_INT_RDONE_SFT 1
+#define I2CM_INT_RDONE_HI 1
+#define I2CM_INT_RDONE_SZ 1
+#define I2CM_IDLE_MSK 0x00000004
+#define I2CM_IDLE_I_MSK 0xfffffffb
+#define I2CM_IDLE_SFT 2
+#define I2CM_IDLE_HI 2
+#define I2CM_IDLE_SZ 1
+#define I2CM_INT_MISMATCH_MSK 0x00000008
+#define I2CM_INT_MISMATCH_I_MSK 0xfffffff7
+#define I2CM_INT_MISMATCH_SFT 3
+#define I2CM_INT_MISMATCH_HI 3
+#define I2CM_INT_MISMATCH_SZ 1
+#define I2CM_PSCL_MSK 0x00003ff0
+#define I2CM_PSCL_I_MSK 0xffffc00f
+#define I2CM_PSCL_SFT 4
+#define I2CM_PSCL_HI 13
+#define I2CM_PSCL_SZ 10
+#define I2CM_MANUAL_MODE_MSK 0x00010000
+#define I2CM_MANUAL_MODE_I_MSK 0xfffeffff
+#define I2CM_MANUAL_MODE_SFT 16
+#define I2CM_MANUAL_MODE_HI 16
+#define I2CM_MANUAL_MODE_SZ 1
+#define I2CM_INT_WDATA_NEED_MSK 0x00020000
+#define I2CM_INT_WDATA_NEED_I_MSK 0xfffdffff
+#define I2CM_INT_WDATA_NEED_SFT 17
+#define I2CM_INT_WDATA_NEED_HI 17
+#define I2CM_INT_WDATA_NEED_SZ 1
+#define I2CM_INT_RDATA_NEED_MSK 0x00040000
+#define I2CM_INT_RDATA_NEED_I_MSK 0xfffbffff
+#define I2CM_INT_RDATA_NEED_SFT 18
+#define I2CM_INT_RDATA_NEED_HI 18
+#define I2CM_INT_RDATA_NEED_SZ 1
+#define I2CM_DEV_A_MSK 0x000003ff
+#define I2CM_DEV_A_I_MSK 0xfffffc00
+#define I2CM_DEV_A_SFT 0
+#define I2CM_DEV_A_HI 9
+#define I2CM_DEV_A_SZ 10
+#define I2CM_DEV_A10B_MSK 0x00004000
+#define I2CM_DEV_A10B_I_MSK 0xffffbfff
+#define I2CM_DEV_A10B_SFT 14
+#define I2CM_DEV_A10B_HI 14
+#define I2CM_DEV_A10B_SZ 1
+#define I2CM_RX_MSK 0x00008000
+#define I2CM_RX_I_MSK 0xffff7fff
+#define I2CM_RX_SFT 15
+#define I2CM_RX_HI 15
+#define I2CM_RX_SZ 1
+#define I2CM_LEN_MSK 0x0000ffff
+#define I2CM_LEN_I_MSK 0xffff0000
+#define I2CM_LEN_SFT 0
+#define I2CM_LEN_HI 15
+#define I2CM_LEN_SZ 16
+#define I2CM_T_LEFT_MSK 0x00070000
+#define I2CM_T_LEFT_I_MSK 0xfff8ffff
+#define I2CM_T_LEFT_SFT 16
+#define I2CM_T_LEFT_HI 18
+#define I2CM_T_LEFT_SZ 3
+#define I2CM_R_GET_MSK 0x07000000
+#define I2CM_R_GET_I_MSK 0xf8ffffff
+#define I2CM_R_GET_SFT 24
+#define I2CM_R_GET_HI 26
+#define I2CM_R_GET_SZ 3
+#define I2CM_WDAT_MSK 0xffffffff
+#define I2CM_WDAT_I_MSK 0x00000000
+#define I2CM_WDAT_SFT 0
+#define I2CM_WDAT_HI 31
+#define I2CM_WDAT_SZ 32
+#define I2CM_RDAT_MSK 0xffffffff
+#define I2CM_RDAT_I_MSK 0x00000000
+#define I2CM_RDAT_SFT 0
+#define I2CM_RDAT_HI 31
+#define I2CM_RDAT_SZ 32
+#define I2CM_SR_LEN_MSK 0x0000ffff
+#define I2CM_SR_LEN_I_MSK 0xffff0000
+#define I2CM_SR_LEN_SFT 0
+#define I2CM_SR_LEN_HI 15
+#define I2CM_SR_LEN_SZ 16
+#define I2CM_SR_RX_MSK 0x00010000
+#define I2CM_SR_RX_I_MSK 0xfffeffff
+#define I2CM_SR_RX_SFT 16
+#define I2CM_SR_RX_HI 16
+#define I2CM_SR_RX_SZ 1
+#define I2CM_REPEAT_START_MSK 0x00020000
+#define I2CM_REPEAT_START_I_MSK 0xfffdffff
+#define I2CM_REPEAT_START_SFT 17
+#define I2CM_REPEAT_START_HI 17
+#define I2CM_REPEAT_START_SZ 1
+#define UART_DATA_MSK 0x000000ff
+#define UART_DATA_I_MSK 0xffffff00
+#define UART_DATA_SFT 0
+#define UART_DATA_HI 7
+#define UART_DATA_SZ 8
+#define DATA_RDY_IE_MSK 0x00000001
+#define DATA_RDY_IE_I_MSK 0xfffffffe
+#define DATA_RDY_IE_SFT 0
+#define DATA_RDY_IE_HI 0
+#define DATA_RDY_IE_SZ 1
+#define THR_EMPTY_IE_MSK 0x00000002
+#define THR_EMPTY_IE_I_MSK 0xfffffffd
+#define THR_EMPTY_IE_SFT 1
+#define THR_EMPTY_IE_HI 1
+#define THR_EMPTY_IE_SZ 1
+#define RX_LINESTS_IE_MSK 0x00000004
+#define RX_LINESTS_IE_I_MSK 0xfffffffb
+#define RX_LINESTS_IE_SFT 2
+#define RX_LINESTS_IE_HI 2
+#define RX_LINESTS_IE_SZ 1
+#define MDM_STS_IE_MSK 0x00000008
+#define MDM_STS_IE_I_MSK 0xfffffff7
+#define MDM_STS_IE_SFT 3
+#define MDM_STS_IE_HI 3
+#define MDM_STS_IE_SZ 1
+#define DMA_RXEND_IE_MSK 0x00000040
+#define DMA_RXEND_IE_I_MSK 0xffffffbf
+#define DMA_RXEND_IE_SFT 6
+#define DMA_RXEND_IE_HI 6
+#define DMA_RXEND_IE_SZ 1
+#define DMA_TXEND_IE_MSK 0x00000080
+#define DMA_TXEND_IE_I_MSK 0xffffff7f
+#define DMA_TXEND_IE_SFT 7
+#define DMA_TXEND_IE_HI 7
+#define DMA_TXEND_IE_SZ 1
+#define FIFO_EN_MSK 0x00000001
+#define FIFO_EN_I_MSK 0xfffffffe
+#define FIFO_EN_SFT 0
+#define FIFO_EN_HI 0
+#define FIFO_EN_SZ 1
+#define RXFIFO_RST_MSK 0x00000002
+#define RXFIFO_RST_I_MSK 0xfffffffd
+#define RXFIFO_RST_SFT 1
+#define RXFIFO_RST_HI 1
+#define RXFIFO_RST_SZ 1
+#define TXFIFO_RST_MSK 0x00000004
+#define TXFIFO_RST_I_MSK 0xfffffffb
+#define TXFIFO_RST_SFT 2
+#define TXFIFO_RST_HI 2
+#define TXFIFO_RST_SZ 1
+#define DMA_MODE_MSK 0x00000008
+#define DMA_MODE_I_MSK 0xfffffff7
+#define DMA_MODE_SFT 3
+#define DMA_MODE_HI 3
+#define DMA_MODE_SZ 1
+#define EN_AUTO_RTS_MSK 0x00000010
+#define EN_AUTO_RTS_I_MSK 0xffffffef
+#define EN_AUTO_RTS_SFT 4
+#define EN_AUTO_RTS_HI 4
+#define EN_AUTO_RTS_SZ 1
+#define EN_AUTO_CTS_MSK 0x00000020
+#define EN_AUTO_CTS_I_MSK 0xffffffdf
+#define EN_AUTO_CTS_SFT 5
+#define EN_AUTO_CTS_HI 5
+#define EN_AUTO_CTS_SZ 1
+#define RXFIFO_TRGLVL_MSK 0x000000c0
+#define RXFIFO_TRGLVL_I_MSK 0xffffff3f
+#define RXFIFO_TRGLVL_SFT 6
+#define RXFIFO_TRGLVL_HI 7
+#define RXFIFO_TRGLVL_SZ 2
+#define WORD_LEN_MSK 0x00000003
+#define WORD_LEN_I_MSK 0xfffffffc
+#define WORD_LEN_SFT 0
+#define WORD_LEN_HI 1
+#define WORD_LEN_SZ 2
+#define STOP_BIT_MSK 0x00000004
+#define STOP_BIT_I_MSK 0xfffffffb
+#define STOP_BIT_SFT 2
+#define STOP_BIT_HI 2
+#define STOP_BIT_SZ 1
+#define PARITY_EN_MSK 0x00000008
+#define PARITY_EN_I_MSK 0xfffffff7
+#define PARITY_EN_SFT 3
+#define PARITY_EN_HI 3
+#define PARITY_EN_SZ 1
+#define EVEN_PARITY_MSK 0x00000010
+#define EVEN_PARITY_I_MSK 0xffffffef
+#define EVEN_PARITY_SFT 4
+#define EVEN_PARITY_HI 4
+#define EVEN_PARITY_SZ 1
+#define FORCE_PARITY_MSK 0x00000020
+#define FORCE_PARITY_I_MSK 0xffffffdf
+#define FORCE_PARITY_SFT 5
+#define FORCE_PARITY_HI 5
+#define FORCE_PARITY_SZ 1
+#define SET_BREAK_MSK 0x00000040
+#define SET_BREAK_I_MSK 0xffffffbf
+#define SET_BREAK_SFT 6
+#define SET_BREAK_HI 6
+#define SET_BREAK_SZ 1
+#define DLAB_MSK 0x00000080
+#define DLAB_I_MSK 0xffffff7f
+#define DLAB_SFT 7
+#define DLAB_HI 7
+#define DLAB_SZ 1
+#define DTR_MSK 0x00000001
+#define DTR_I_MSK 0xfffffffe
+#define DTR_SFT 0
+#define DTR_HI 0
+#define DTR_SZ 1
+#define RTS_MSK 0x00000002
+#define RTS_I_MSK 0xfffffffd
+#define RTS_SFT 1
+#define RTS_HI 1
+#define RTS_SZ 1
+#define OUT_1_MSK 0x00000004
+#define OUT_1_I_MSK 0xfffffffb
+#define OUT_1_SFT 2
+#define OUT_1_HI 2
+#define OUT_1_SZ 1
+#define OUT_2_MSK 0x00000008
+#define OUT_2_I_MSK 0xfffffff7
+#define OUT_2_SFT 3
+#define OUT_2_HI 3
+#define OUT_2_SZ 1
+#define LOOP_BACK_MSK 0x00000010
+#define LOOP_BACK_I_MSK 0xffffffef
+#define LOOP_BACK_SFT 4
+#define LOOP_BACK_HI 4
+#define LOOP_BACK_SZ 1
+#define DATA_RDY_MSK 0x00000001
+#define DATA_RDY_I_MSK 0xfffffffe
+#define DATA_RDY_SFT 0
+#define DATA_RDY_HI 0
+#define DATA_RDY_SZ 1
+#define OVERRUN_ERR_MSK 0x00000002
+#define OVERRUN_ERR_I_MSK 0xfffffffd
+#define OVERRUN_ERR_SFT 1
+#define OVERRUN_ERR_HI 1
+#define OVERRUN_ERR_SZ 1
+#define PARITY_ERR_MSK 0x00000004
+#define PARITY_ERR_I_MSK 0xfffffffb
+#define PARITY_ERR_SFT 2
+#define PARITY_ERR_HI 2
+#define PARITY_ERR_SZ 1
+#define FRAMING_ERR_MSK 0x00000008
+#define FRAMING_ERR_I_MSK 0xfffffff7
+#define FRAMING_ERR_SFT 3
+#define FRAMING_ERR_HI 3
+#define FRAMING_ERR_SZ 1
+#define BREAK_INT_MSK 0x00000010
+#define BREAK_INT_I_MSK 0xffffffef
+#define BREAK_INT_SFT 4
+#define BREAK_INT_HI 4
+#define BREAK_INT_SZ 1
+#define THR_EMPTY_MSK 0x00000020
+#define THR_EMPTY_I_MSK 0xffffffdf
+#define THR_EMPTY_SFT 5
+#define THR_EMPTY_HI 5
+#define THR_EMPTY_SZ 1
+#define TX_EMPTY_MSK 0x00000040
+#define TX_EMPTY_I_MSK 0xffffffbf
+#define TX_EMPTY_SFT 6
+#define TX_EMPTY_HI 6
+#define TX_EMPTY_SZ 1
+#define FIFODATA_ERR_MSK 0x00000080
+#define FIFODATA_ERR_I_MSK 0xffffff7f
+#define FIFODATA_ERR_SFT 7
+#define FIFODATA_ERR_HI 7
+#define FIFODATA_ERR_SZ 1
+#define DELTA_CTS_MSK 0x00000001
+#define DELTA_CTS_I_MSK 0xfffffffe
+#define DELTA_CTS_SFT 0
+#define DELTA_CTS_HI 0
+#define DELTA_CTS_SZ 1
+#define DELTA_DSR_MSK 0x00000002
+#define DELTA_DSR_I_MSK 0xfffffffd
+#define DELTA_DSR_SFT 1
+#define DELTA_DSR_HI 1
+#define DELTA_DSR_SZ 1
+#define TRAILEDGE_RI_MSK 0x00000004
+#define TRAILEDGE_RI_I_MSK 0xfffffffb
+#define TRAILEDGE_RI_SFT 2
+#define TRAILEDGE_RI_HI 2
+#define TRAILEDGE_RI_SZ 1
+#define DELTA_CD_MSK 0x00000008
+#define DELTA_CD_I_MSK 0xfffffff7
+#define DELTA_CD_SFT 3
+#define DELTA_CD_HI 3
+#define DELTA_CD_SZ 1
+#define CTS_MSK 0x00000010
+#define CTS_I_MSK 0xffffffef
+#define CTS_SFT 4
+#define CTS_HI 4
+#define CTS_SZ 1
+#define DSR_MSK 0x00000020
+#define DSR_I_MSK 0xffffffdf
+#define DSR_SFT 5
+#define DSR_HI 5
+#define DSR_SZ 1
+#define RI_MSK 0x00000040
+#define RI_I_MSK 0xffffffbf
+#define RI_SFT 6
+#define RI_HI 6
+#define RI_SZ 1
+#define CD_MSK 0x00000080
+#define CD_I_MSK 0xffffff7f
+#define CD_SFT 7
+#define CD_HI 7
+#define CD_SZ 1
+#define BRDC_DIV_MSK 0x0000ffff
+#define BRDC_DIV_I_MSK 0xffff0000
+#define BRDC_DIV_SFT 0
+#define BRDC_DIV_HI 15
+#define BRDC_DIV_SZ 16
+#define RTHR_L_MSK 0x0000000f
+#define RTHR_L_I_MSK 0xfffffff0
+#define RTHR_L_SFT 0
+#define RTHR_L_HI 3
+#define RTHR_L_SZ 4
+#define RTHR_H_MSK 0x000000f0
+#define RTHR_H_I_MSK 0xffffff0f
+#define RTHR_H_SFT 4
+#define RTHR_H_HI 7
+#define RTHR_H_SZ 4
+#define INT_IDCODE_MSK 0x0000000f
+#define INT_IDCODE_I_MSK 0xfffffff0
+#define INT_IDCODE_SFT 0
+#define INT_IDCODE_HI 3
+#define INT_IDCODE_SZ 4
+#define FIFOS_ENABLED_MSK 0x000000c0
+#define FIFOS_ENABLED_I_MSK 0xffffff3f
+#define FIFOS_ENABLED_SFT 6
+#define FIFOS_ENABLED_HI 7
+#define FIFOS_ENABLED_SZ 2
+#define DAT_UART_DATA_MSK 0x000000ff
+#define DAT_UART_DATA_I_MSK 0xffffff00
+#define DAT_UART_DATA_SFT 0
+#define DAT_UART_DATA_HI 7
+#define DAT_UART_DATA_SZ 8
+#define DAT_DATA_RDY_IE_MSK 0x00000001
+#define DAT_DATA_RDY_IE_I_MSK 0xfffffffe
+#define DAT_DATA_RDY_IE_SFT 0
+#define DAT_DATA_RDY_IE_HI 0
+#define DAT_DATA_RDY_IE_SZ 1
+#define DAT_THR_EMPTY_IE_MSK 0x00000002
+#define DAT_THR_EMPTY_IE_I_MSK 0xfffffffd
+#define DAT_THR_EMPTY_IE_SFT 1
+#define DAT_THR_EMPTY_IE_HI 1
+#define DAT_THR_EMPTY_IE_SZ 1
+#define DAT_RX_LINESTS_IE_MSK 0x00000004
+#define DAT_RX_LINESTS_IE_I_MSK 0xfffffffb
+#define DAT_RX_LINESTS_IE_SFT 2
+#define DAT_RX_LINESTS_IE_HI 2
+#define DAT_RX_LINESTS_IE_SZ 1
+#define DAT_MDM_STS_IE_MSK 0x00000008
+#define DAT_MDM_STS_IE_I_MSK 0xfffffff7
+#define DAT_MDM_STS_IE_SFT 3
+#define DAT_MDM_STS_IE_HI 3
+#define DAT_MDM_STS_IE_SZ 1
+#define DAT_DMA_RXEND_IE_MSK 0x00000040
+#define DAT_DMA_RXEND_IE_I_MSK 0xffffffbf
+#define DAT_DMA_RXEND_IE_SFT 6
+#define DAT_DMA_RXEND_IE_HI 6
+#define DAT_DMA_RXEND_IE_SZ 1
+#define DAT_DMA_TXEND_IE_MSK 0x00000080
+#define DAT_DMA_TXEND_IE_I_MSK 0xffffff7f
+#define DAT_DMA_TXEND_IE_SFT 7
+#define DAT_DMA_TXEND_IE_HI 7
+#define DAT_DMA_TXEND_IE_SZ 1
+#define DAT_FIFO_EN_MSK 0x00000001
+#define DAT_FIFO_EN_I_MSK 0xfffffffe
+#define DAT_FIFO_EN_SFT 0
+#define DAT_FIFO_EN_HI 0
+#define DAT_FIFO_EN_SZ 1
+#define DAT_RXFIFO_RST_MSK 0x00000002
+#define DAT_RXFIFO_RST_I_MSK 0xfffffffd
+#define DAT_RXFIFO_RST_SFT 1
+#define DAT_RXFIFO_RST_HI 1
+#define DAT_RXFIFO_RST_SZ 1
+#define DAT_TXFIFO_RST_MSK 0x00000004
+#define DAT_TXFIFO_RST_I_MSK 0xfffffffb
+#define DAT_TXFIFO_RST_SFT 2
+#define DAT_TXFIFO_RST_HI 2
+#define DAT_TXFIFO_RST_SZ 1
+#define DAT_DMA_MODE_MSK 0x00000008
+#define DAT_DMA_MODE_I_MSK 0xfffffff7
+#define DAT_DMA_MODE_SFT 3
+#define DAT_DMA_MODE_HI 3
+#define DAT_DMA_MODE_SZ 1
+#define DAT_EN_AUTO_RTS_MSK 0x00000010
+#define DAT_EN_AUTO_RTS_I_MSK 0xffffffef
+#define DAT_EN_AUTO_RTS_SFT 4
+#define DAT_EN_AUTO_RTS_HI 4
+#define DAT_EN_AUTO_RTS_SZ 1
+#define DAT_EN_AUTO_CTS_MSK 0x00000020
+#define DAT_EN_AUTO_CTS_I_MSK 0xffffffdf
+#define DAT_EN_AUTO_CTS_SFT 5
+#define DAT_EN_AUTO_CTS_HI 5
+#define DAT_EN_AUTO_CTS_SZ 1
+#define DAT_RXFIFO_TRGLVL_MSK 0x000000c0
+#define DAT_RXFIFO_TRGLVL_I_MSK 0xffffff3f
+#define DAT_RXFIFO_TRGLVL_SFT 6
+#define DAT_RXFIFO_TRGLVL_HI 7
+#define DAT_RXFIFO_TRGLVL_SZ 2
+#define DAT_WORD_LEN_MSK 0x00000003
+#define DAT_WORD_LEN_I_MSK 0xfffffffc
+#define DAT_WORD_LEN_SFT 0
+#define DAT_WORD_LEN_HI 1
+#define DAT_WORD_LEN_SZ 2
+#define DAT_STOP_BIT_MSK 0x00000004
+#define DAT_STOP_BIT_I_MSK 0xfffffffb
+#define DAT_STOP_BIT_SFT 2
+#define DAT_STOP_BIT_HI 2
+#define DAT_STOP_BIT_SZ 1
+#define DAT_PARITY_EN_MSK 0x00000008
+#define DAT_PARITY_EN_I_MSK 0xfffffff7
+#define DAT_PARITY_EN_SFT 3
+#define DAT_PARITY_EN_HI 3
+#define DAT_PARITY_EN_SZ 1
+#define DAT_EVEN_PARITY_MSK 0x00000010
+#define DAT_EVEN_PARITY_I_MSK 0xffffffef
+#define DAT_EVEN_PARITY_SFT 4
+#define DAT_EVEN_PARITY_HI 4
+#define DAT_EVEN_PARITY_SZ 1
+#define DAT_FORCE_PARITY_MSK 0x00000020
+#define DAT_FORCE_PARITY_I_MSK 0xffffffdf
+#define DAT_FORCE_PARITY_SFT 5
+#define DAT_FORCE_PARITY_HI 5
+#define DAT_FORCE_PARITY_SZ 1
+#define DAT_SET_BREAK_MSK 0x00000040
+#define DAT_SET_BREAK_I_MSK 0xffffffbf
+#define DAT_SET_BREAK_SFT 6
+#define DAT_SET_BREAK_HI 6
+#define DAT_SET_BREAK_SZ 1
+#define DAT_DLAB_MSK 0x00000080
+#define DAT_DLAB_I_MSK 0xffffff7f
+#define DAT_DLAB_SFT 7
+#define DAT_DLAB_HI 7
+#define DAT_DLAB_SZ 1
+#define DAT_DTR_MSK 0x00000001
+#define DAT_DTR_I_MSK 0xfffffffe
+#define DAT_DTR_SFT 0
+#define DAT_DTR_HI 0
+#define DAT_DTR_SZ 1
+#define DAT_RTS_MSK 0x00000002
+#define DAT_RTS_I_MSK 0xfffffffd
+#define DAT_RTS_SFT 1
+#define DAT_RTS_HI 1
+#define DAT_RTS_SZ 1
+#define DAT_OUT_1_MSK 0x00000004
+#define DAT_OUT_1_I_MSK 0xfffffffb
+#define DAT_OUT_1_SFT 2
+#define DAT_OUT_1_HI 2
+#define DAT_OUT_1_SZ 1
+#define DAT_OUT_2_MSK 0x00000008
+#define DAT_OUT_2_I_MSK 0xfffffff7
+#define DAT_OUT_2_SFT 3
+#define DAT_OUT_2_HI 3
+#define DAT_OUT_2_SZ 1
+#define DAT_LOOP_BACK_MSK 0x00000010
+#define DAT_LOOP_BACK_I_MSK 0xffffffef
+#define DAT_LOOP_BACK_SFT 4
+#define DAT_LOOP_BACK_HI 4
+#define DAT_LOOP_BACK_SZ 1
+#define DAT_DATA_RDY_MSK 0x00000001
+#define DAT_DATA_RDY_I_MSK 0xfffffffe
+#define DAT_DATA_RDY_SFT 0
+#define DAT_DATA_RDY_HI 0
+#define DAT_DATA_RDY_SZ 1
+#define DAT_OVERRUN_ERR_MSK 0x00000002
+#define DAT_OVERRUN_ERR_I_MSK 0xfffffffd
+#define DAT_OVERRUN_ERR_SFT 1
+#define DAT_OVERRUN_ERR_HI 1
+#define DAT_OVERRUN_ERR_SZ 1
+#define DAT_PARITY_ERR_MSK 0x00000004
+#define DAT_PARITY_ERR_I_MSK 0xfffffffb
+#define DAT_PARITY_ERR_SFT 2
+#define DAT_PARITY_ERR_HI 2
+#define DAT_PARITY_ERR_SZ 1
+#define DAT_FRAMING_ERR_MSK 0x00000008
+#define DAT_FRAMING_ERR_I_MSK 0xfffffff7
+#define DAT_FRAMING_ERR_SFT 3
+#define DAT_FRAMING_ERR_HI 3
+#define DAT_FRAMING_ERR_SZ 1
+#define DAT_BREAK_INT_MSK 0x00000010
+#define DAT_BREAK_INT_I_MSK 0xffffffef
+#define DAT_BREAK_INT_SFT 4
+#define DAT_BREAK_INT_HI 4
+#define DAT_BREAK_INT_SZ 1
+#define DAT_THR_EMPTY_MSK 0x00000020
+#define DAT_THR_EMPTY_I_MSK 0xffffffdf
+#define DAT_THR_EMPTY_SFT 5
+#define DAT_THR_EMPTY_HI 5
+#define DAT_THR_EMPTY_SZ 1
+#define DAT_TX_EMPTY_MSK 0x00000040
+#define DAT_TX_EMPTY_I_MSK 0xffffffbf
+#define DAT_TX_EMPTY_SFT 6
+#define DAT_TX_EMPTY_HI 6
+#define DAT_TX_EMPTY_SZ 1
+#define DAT_FIFODATA_ERR_MSK 0x00000080
+#define DAT_FIFODATA_ERR_I_MSK 0xffffff7f
+#define DAT_FIFODATA_ERR_SFT 7
+#define DAT_FIFODATA_ERR_HI 7
+#define DAT_FIFODATA_ERR_SZ 1
+#define DAT_DELTA_CTS_MSK 0x00000001
+#define DAT_DELTA_CTS_I_MSK 0xfffffffe
+#define DAT_DELTA_CTS_SFT 0
+#define DAT_DELTA_CTS_HI 0
+#define DAT_DELTA_CTS_SZ 1
+#define DAT_DELTA_DSR_MSK 0x00000002
+#define DAT_DELTA_DSR_I_MSK 0xfffffffd
+#define DAT_DELTA_DSR_SFT 1
+#define DAT_DELTA_DSR_HI 1
+#define DAT_DELTA_DSR_SZ 1
+#define DAT_TRAILEDGE_RI_MSK 0x00000004
+#define DAT_TRAILEDGE_RI_I_MSK 0xfffffffb
+#define DAT_TRAILEDGE_RI_SFT 2
+#define DAT_TRAILEDGE_RI_HI 2
+#define DAT_TRAILEDGE_RI_SZ 1
+#define DAT_DELTA_CD_MSK 0x00000008
+#define DAT_DELTA_CD_I_MSK 0xfffffff7
+#define DAT_DELTA_CD_SFT 3
+#define DAT_DELTA_CD_HI 3
+#define DAT_DELTA_CD_SZ 1
+#define DAT_CTS_MSK 0x00000010
+#define DAT_CTS_I_MSK 0xffffffef
+#define DAT_CTS_SFT 4
+#define DAT_CTS_HI 4
+#define DAT_CTS_SZ 1
+#define DAT_DSR_MSK 0x00000020
+#define DAT_DSR_I_MSK 0xffffffdf
+#define DAT_DSR_SFT 5
+#define DAT_DSR_HI 5
+#define DAT_DSR_SZ 1
+#define DAT_RI_MSK 0x00000040
+#define DAT_RI_I_MSK 0xffffffbf
+#define DAT_RI_SFT 6
+#define DAT_RI_HI 6
+#define DAT_RI_SZ 1
+#define DAT_CD_MSK 0x00000080
+#define DAT_CD_I_MSK 0xffffff7f
+#define DAT_CD_SFT 7
+#define DAT_CD_HI 7
+#define DAT_CD_SZ 1
+#define DAT_BRDC_DIV_MSK 0x0000ffff
+#define DAT_BRDC_DIV_I_MSK 0xffff0000
+#define DAT_BRDC_DIV_SFT 0
+#define DAT_BRDC_DIV_HI 15
+#define DAT_BRDC_DIV_SZ 16
+#define DAT_RTHR_L_MSK 0x0000000f
+#define DAT_RTHR_L_I_MSK 0xfffffff0
+#define DAT_RTHR_L_SFT 0
+#define DAT_RTHR_L_HI 3
+#define DAT_RTHR_L_SZ 4
+#define DAT_RTHR_H_MSK 0x000000f0
+#define DAT_RTHR_H_I_MSK 0xffffff0f
+#define DAT_RTHR_H_SFT 4
+#define DAT_RTHR_H_HI 7
+#define DAT_RTHR_H_SZ 4
+#define DAT_INT_IDCODE_MSK 0x0000000f
+#define DAT_INT_IDCODE_I_MSK 0xfffffff0
+#define DAT_INT_IDCODE_SFT 0
+#define DAT_INT_IDCODE_HI 3
+#define DAT_INT_IDCODE_SZ 4
+#define DAT_FIFOS_ENABLED_MSK 0x000000c0
+#define DAT_FIFOS_ENABLED_I_MSK 0xffffff3f
+#define DAT_FIFOS_ENABLED_SFT 6
+#define DAT_FIFOS_ENABLED_HI 7
+#define DAT_FIFOS_ENABLED_SZ 2
+#define MASK_TOP_MSK 0xffffffff
+#define MASK_TOP_I_MSK 0x00000000
+#define MASK_TOP_SFT 0
+#define MASK_TOP_HI 31
+#define MASK_TOP_SZ 32
+#define INT_MODE_MSK 0xffffffff
+#define INT_MODE_I_MSK 0x00000000
+#define INT_MODE_SFT 0
+#define INT_MODE_HI 31
+#define INT_MODE_SZ 32
+#define IRQ_PHY_0_MSK 0x00000001
+#define IRQ_PHY_0_I_MSK 0xfffffffe
+#define IRQ_PHY_0_SFT 0
+#define IRQ_PHY_0_HI 0
+#define IRQ_PHY_0_SZ 1
+#define IRQ_PHY_1_MSK 0x00000002
+#define IRQ_PHY_1_I_MSK 0xfffffffd
+#define IRQ_PHY_1_SFT 1
+#define IRQ_PHY_1_HI 1
+#define IRQ_PHY_1_SZ 1
+#define IRQ_SDIO_MSK 0x00000004
+#define IRQ_SDIO_I_MSK 0xfffffffb
+#define IRQ_SDIO_SFT 2
+#define IRQ_SDIO_HI 2
+#define IRQ_SDIO_SZ 1
+#define IRQ_BEACON_DONE_MSK 0x00000008
+#define IRQ_BEACON_DONE_I_MSK 0xfffffff7
+#define IRQ_BEACON_DONE_SFT 3
+#define IRQ_BEACON_DONE_HI 3
+#define IRQ_BEACON_DONE_SZ 1
+#define IRQ_BEACON_MSK 0x00000010
+#define IRQ_BEACON_I_MSK 0xffffffef
+#define IRQ_BEACON_SFT 4
+#define IRQ_BEACON_HI 4
+#define IRQ_BEACON_SZ 1
+#define IRQ_PRE_BEACON_MSK 0x00000020
+#define IRQ_PRE_BEACON_I_MSK 0xffffffdf
+#define IRQ_PRE_BEACON_SFT 5
+#define IRQ_PRE_BEACON_HI 5
+#define IRQ_PRE_BEACON_SZ 1
+#define IRQ_EDCA0_TX_DONE_MSK 0x00000040
+#define IRQ_EDCA0_TX_DONE_I_MSK 0xffffffbf
+#define IRQ_EDCA0_TX_DONE_SFT 6
+#define IRQ_EDCA0_TX_DONE_HI 6
+#define IRQ_EDCA0_TX_DONE_SZ 1
+#define IRQ_EDCA1_TX_DONE_MSK 0x00000080
+#define IRQ_EDCA1_TX_DONE_I_MSK 0xffffff7f
+#define IRQ_EDCA1_TX_DONE_SFT 7
+#define IRQ_EDCA1_TX_DONE_HI 7
+#define IRQ_EDCA1_TX_DONE_SZ 1
+#define IRQ_EDCA2_TX_DONE_MSK 0x00000100
+#define IRQ_EDCA2_TX_DONE_I_MSK 0xfffffeff
+#define IRQ_EDCA2_TX_DONE_SFT 8
+#define IRQ_EDCA2_TX_DONE_HI 8
+#define IRQ_EDCA2_TX_DONE_SZ 1
+#define IRQ_EDCA3_TX_DONE_MSK 0x00000200
+#define IRQ_EDCA3_TX_DONE_I_MSK 0xfffffdff
+#define IRQ_EDCA3_TX_DONE_SFT 9
+#define IRQ_EDCA3_TX_DONE_HI 9
+#define IRQ_EDCA3_TX_DONE_SZ 1
+#define IRQ_EDCA4_TX_DONE_MSK 0x00000400
+#define IRQ_EDCA4_TX_DONE_I_MSK 0xfffffbff
+#define IRQ_EDCA4_TX_DONE_SFT 10
+#define IRQ_EDCA4_TX_DONE_HI 10
+#define IRQ_EDCA4_TX_DONE_SZ 1
+#define IRQ_BEACON_DTIM_MSK 0x00001000
+#define IRQ_BEACON_DTIM_I_MSK 0xffffefff
+#define IRQ_BEACON_DTIM_SFT 12
+#define IRQ_BEACON_DTIM_HI 12
+#define IRQ_BEACON_DTIM_SZ 1
+#define IRQ_EDCA0_LOWTHOLD_INT_MSK 0x00002000
+#define IRQ_EDCA0_LOWTHOLD_INT_I_MSK 0xffffdfff
+#define IRQ_EDCA0_LOWTHOLD_INT_SFT 13
+#define IRQ_EDCA0_LOWTHOLD_INT_HI 13
+#define IRQ_EDCA0_LOWTHOLD_INT_SZ 1
+#define IRQ_EDCA1_LOWTHOLD_INT_MSK 0x00004000
+#define IRQ_EDCA1_LOWTHOLD_INT_I_MSK 0xffffbfff
+#define IRQ_EDCA1_LOWTHOLD_INT_SFT 14
+#define IRQ_EDCA1_LOWTHOLD_INT_HI 14
+#define IRQ_EDCA1_LOWTHOLD_INT_SZ 1
+#define IRQ_EDCA2_LOWTHOLD_INT_MSK 0x00008000
+#define IRQ_EDCA2_LOWTHOLD_INT_I_MSK 0xffff7fff
+#define IRQ_EDCA2_LOWTHOLD_INT_SFT 15
+#define IRQ_EDCA2_LOWTHOLD_INT_HI 15
+#define IRQ_EDCA2_LOWTHOLD_INT_SZ 1
+#define IRQ_EDCA3_LOWTHOLD_INT_MSK 0x00010000
+#define IRQ_EDCA3_LOWTHOLD_INT_I_MSK 0xfffeffff
+#define IRQ_EDCA3_LOWTHOLD_INT_SFT 16
+#define IRQ_EDCA3_LOWTHOLD_INT_HI 16
+#define IRQ_EDCA3_LOWTHOLD_INT_SZ 1
+#define IRQ_FENCE_HIT_INT_MSK 0x00020000
+#define IRQ_FENCE_HIT_INT_I_MSK 0xfffdffff
+#define IRQ_FENCE_HIT_INT_SFT 17
+#define IRQ_FENCE_HIT_INT_HI 17
+#define IRQ_FENCE_HIT_INT_SZ 1
+#define IRQ_ILL_ADDR_INT_MSK 0x00040000
+#define IRQ_ILL_ADDR_INT_I_MSK 0xfffbffff
+#define IRQ_ILL_ADDR_INT_SFT 18
+#define IRQ_ILL_ADDR_INT_HI 18
+#define IRQ_ILL_ADDR_INT_SZ 1
+#define IRQ_MBOX_MSK 0x00080000
+#define IRQ_MBOX_I_MSK 0xfff7ffff
+#define IRQ_MBOX_SFT 19
+#define IRQ_MBOX_HI 19
+#define IRQ_MBOX_SZ 1
+#define IRQ_US_TIMER0_MSK 0x00100000
+#define IRQ_US_TIMER0_I_MSK 0xffefffff
+#define IRQ_US_TIMER0_SFT 20
+#define IRQ_US_TIMER0_HI 20
+#define IRQ_US_TIMER0_SZ 1
+#define IRQ_US_TIMER1_MSK 0x00200000
+#define IRQ_US_TIMER1_I_MSK 0xffdfffff
+#define IRQ_US_TIMER1_SFT 21
+#define IRQ_US_TIMER1_HI 21
+#define IRQ_US_TIMER1_SZ 1
+#define IRQ_US_TIMER2_MSK 0x00400000
+#define IRQ_US_TIMER2_I_MSK 0xffbfffff
+#define IRQ_US_TIMER2_SFT 22
+#define IRQ_US_TIMER2_HI 22
+#define IRQ_US_TIMER2_SZ 1
+#define IRQ_US_TIMER3_MSK 0x00800000
+#define IRQ_US_TIMER3_I_MSK 0xff7fffff
+#define IRQ_US_TIMER3_SFT 23
+#define IRQ_US_TIMER3_HI 23
+#define IRQ_US_TIMER3_SZ 1
+#define IRQ_MS_TIMER0_MSK 0x01000000
+#define IRQ_MS_TIMER0_I_MSK 0xfeffffff
+#define IRQ_MS_TIMER0_SFT 24
+#define IRQ_MS_TIMER0_HI 24
+#define IRQ_MS_TIMER0_SZ 1
+#define IRQ_MS_TIMER1_MSK 0x02000000
+#define IRQ_MS_TIMER1_I_MSK 0xfdffffff
+#define IRQ_MS_TIMER1_SFT 25
+#define IRQ_MS_TIMER1_HI 25
+#define IRQ_MS_TIMER1_SZ 1
+#define IRQ_MS_TIMER2_MSK 0x04000000
+#define IRQ_MS_TIMER2_I_MSK 0xfbffffff
+#define IRQ_MS_TIMER2_SFT 26
+#define IRQ_MS_TIMER2_HI 26
+#define IRQ_MS_TIMER2_SZ 1
+#define IRQ_MS_TIMER3_MSK 0x08000000
+#define IRQ_MS_TIMER3_I_MSK 0xf7ffffff
+#define IRQ_MS_TIMER3_SFT 27
+#define IRQ_MS_TIMER3_HI 27
+#define IRQ_MS_TIMER3_SZ 1
+#define IRQ_TX_LIMIT_INT_MSK 0x10000000
+#define IRQ_TX_LIMIT_INT_I_MSK 0xefffffff
+#define IRQ_TX_LIMIT_INT_SFT 28
+#define IRQ_TX_LIMIT_INT_HI 28
+#define IRQ_TX_LIMIT_INT_SZ 1
+#define IRQ_DMA0_MSK 0x20000000
+#define IRQ_DMA0_I_MSK 0xdfffffff
+#define IRQ_DMA0_SFT 29
+#define IRQ_DMA0_HI 29
+#define IRQ_DMA0_SZ 1
+#define IRQ_CO_DMA_MSK 0x40000000
+#define IRQ_CO_DMA_I_MSK 0xbfffffff
+#define IRQ_CO_DMA_SFT 30
+#define IRQ_CO_DMA_HI 30
+#define IRQ_CO_DMA_SZ 1
+#define IRQ_PERI_GROUP_MSK 0x80000000
+#define IRQ_PERI_GROUP_I_MSK 0x7fffffff
+#define IRQ_PERI_GROUP_SFT 31
+#define IRQ_PERI_GROUP_HI 31
+#define IRQ_PERI_GROUP_SZ 1
+#define FIQ_STATUS_MSK 0xffffffff
+#define FIQ_STATUS_I_MSK 0x00000000
+#define FIQ_STATUS_SFT 0
+#define FIQ_STATUS_HI 31
+#define FIQ_STATUS_SZ 32
+#define IRQ_RAW_MSK 0xffffffff
+#define IRQ_RAW_I_MSK 0x00000000
+#define IRQ_RAW_SFT 0
+#define IRQ_RAW_HI 31
+#define IRQ_RAW_SZ 32
+#define FIQ_RAW_MSK 0xffffffff
+#define FIQ_RAW_I_MSK 0x00000000
+#define FIQ_RAW_SFT 0
+#define FIQ_RAW_HI 31
+#define FIQ_RAW_SZ 32
+#define INT_PERI_MASK_MSK 0xffffffff
+#define INT_PERI_MASK_I_MSK 0x00000000
+#define INT_PERI_MASK_SFT 0
+#define INT_PERI_MASK_HI 31
+#define INT_PERI_MASK_SZ 32
+#define PERI_RTC_MSK 0x00000001
+#define PERI_RTC_I_MSK 0xfffffffe
+#define PERI_RTC_SFT 0
+#define PERI_RTC_HI 0
+#define PERI_RTC_SZ 1
+#define IRQ_UART0_TX_MSK 0x00000002
+#define IRQ_UART0_TX_I_MSK 0xfffffffd
+#define IRQ_UART0_TX_SFT 1
+#define IRQ_UART0_TX_HI 1
+#define IRQ_UART0_TX_SZ 1
+#define IRQ_UART0_RX_MSK 0x00000004
+#define IRQ_UART0_RX_I_MSK 0xfffffffb
+#define IRQ_UART0_RX_SFT 2
+#define IRQ_UART0_RX_HI 2
+#define IRQ_UART0_RX_SZ 1
+#define PERI_GPI_2_MSK 0x00000008
+#define PERI_GPI_2_I_MSK 0xfffffff7
+#define PERI_GPI_2_SFT 3
+#define PERI_GPI_2_HI 3
+#define PERI_GPI_2_SZ 1
+#define IRQ_SPI_IPC_MSK 0x00000010
+#define IRQ_SPI_IPC_I_MSK 0xffffffef
+#define IRQ_SPI_IPC_SFT 4
+#define IRQ_SPI_IPC_HI 4
+#define IRQ_SPI_IPC_SZ 1
+#define PERI_GPI_1_0_MSK 0x00000060
+#define PERI_GPI_1_0_I_MSK 0xffffff9f
+#define PERI_GPI_1_0_SFT 5
+#define PERI_GPI_1_0_HI 6
+#define PERI_GPI_1_0_SZ 2
+#define SCRT_INT_1_MSK 0x00000080
+#define SCRT_INT_1_I_MSK 0xffffff7f
+#define SCRT_INT_1_SFT 7
+#define SCRT_INT_1_HI 7
+#define SCRT_INT_1_SZ 1
+#define MMU_ALC_ERR_MSK 0x00000100
+#define MMU_ALC_ERR_I_MSK 0xfffffeff
+#define MMU_ALC_ERR_SFT 8
+#define MMU_ALC_ERR_HI 8
+#define MMU_ALC_ERR_SZ 1
+#define MMU_RLS_ERR_MSK 0x00000200
+#define MMU_RLS_ERR_I_MSK 0xfffffdff
+#define MMU_RLS_ERR_SFT 9
+#define MMU_RLS_ERR_HI 9
+#define MMU_RLS_ERR_SZ 1
+#define ID_MNG_INT_1_MSK 0x00000400
+#define ID_MNG_INT_1_I_MSK 0xfffffbff
+#define ID_MNG_INT_1_SFT 10
+#define ID_MNG_INT_1_HI 10
+#define ID_MNG_INT_1_SZ 1
+#define MBOX_INT_1_MSK 0x00000800
+#define MBOX_INT_1_I_MSK 0xfffff7ff
+#define MBOX_INT_1_SFT 11
+#define MBOX_INT_1_HI 11
+#define MBOX_INT_1_SZ 1
+#define MBOX_INT_2_MSK 0x00001000
+#define MBOX_INT_2_I_MSK 0xffffefff
+#define MBOX_INT_2_SFT 12
+#define MBOX_INT_2_HI 12
+#define MBOX_INT_2_SZ 1
+#define MBOX_INT_3_MSK 0x00002000
+#define MBOX_INT_3_I_MSK 0xffffdfff
+#define MBOX_INT_3_SFT 13
+#define MBOX_INT_3_HI 13
+#define MBOX_INT_3_SZ 1
+#define HCI_INT_1_MSK 0x00004000
+#define HCI_INT_1_I_MSK 0xffffbfff
+#define HCI_INT_1_SFT 14
+#define HCI_INT_1_HI 14
+#define HCI_INT_1_SZ 1
+#define UART_RX_TIMEOUT_MSK 0x00008000
+#define UART_RX_TIMEOUT_I_MSK 0xffff7fff
+#define UART_RX_TIMEOUT_SFT 15
+#define UART_RX_TIMEOUT_HI 15
+#define UART_RX_TIMEOUT_SZ 1
+#define UART_MULTI_IRQ_MSK 0x00010000
+#define UART_MULTI_IRQ_I_MSK 0xfffeffff
+#define UART_MULTI_IRQ_SFT 16
+#define UART_MULTI_IRQ_HI 16
+#define UART_MULTI_IRQ_SZ 1
+#define ID_MNG_INT_2_MSK 0x00020000
+#define ID_MNG_INT_2_I_MSK 0xfffdffff
+#define ID_MNG_INT_2_SFT 17
+#define ID_MNG_INT_2_HI 17
+#define ID_MNG_INT_2_SZ 1
+#define DMN_NOHIT_INT_MSK 0x00040000
+#define DMN_NOHIT_INT_I_MSK 0xfffbffff
+#define DMN_NOHIT_INT_SFT 18
+#define DMN_NOHIT_INT_HI 18
+#define DMN_NOHIT_INT_SZ 1
+#define ID_THOLD_RX_MSK 0x00080000
+#define ID_THOLD_RX_I_MSK 0xfff7ffff
+#define ID_THOLD_RX_SFT 19
+#define ID_THOLD_RX_HI 19
+#define ID_THOLD_RX_SZ 1
+#define ID_THOLD_TX_MSK 0x00100000
+#define ID_THOLD_TX_I_MSK 0xffefffff
+#define ID_THOLD_TX_SFT 20
+#define ID_THOLD_TX_HI 20
+#define ID_THOLD_TX_SZ 1
+#define ID_DOUBLE_RLS_MSK 0x00200000
+#define ID_DOUBLE_RLS_I_MSK 0xffdfffff
+#define ID_DOUBLE_RLS_SFT 21
+#define ID_DOUBLE_RLS_HI 21
+#define ID_DOUBLE_RLS_SZ 1
+#define RX_ID_LEN_THOLD_MSK 0x00400000
+#define RX_ID_LEN_THOLD_I_MSK 0xffbfffff
+#define RX_ID_LEN_THOLD_SFT 22
+#define RX_ID_LEN_THOLD_HI 22
+#define RX_ID_LEN_THOLD_SZ 1
+#define TX_ID_LEN_THOLD_MSK 0x00800000
+#define TX_ID_LEN_THOLD_I_MSK 0xff7fffff
+#define TX_ID_LEN_THOLD_SFT 23
+#define TX_ID_LEN_THOLD_HI 23
+#define TX_ID_LEN_THOLD_SZ 1
+#define ALL_ID_LEN_THOLD_MSK 0x01000000
+#define ALL_ID_LEN_THOLD_I_MSK 0xfeffffff
+#define ALL_ID_LEN_THOLD_SFT 24
+#define ALL_ID_LEN_THOLD_HI 24
+#define ALL_ID_LEN_THOLD_SZ 1
+#define DMN_MCU_INT_MSK 0x02000000
+#define DMN_MCU_INT_I_MSK 0xfdffffff
+#define DMN_MCU_INT_SFT 25
+#define DMN_MCU_INT_HI 25
+#define DMN_MCU_INT_SZ 1
+#define IRQ_DAT_UART_TX_MSK 0x04000000
+#define IRQ_DAT_UART_TX_I_MSK 0xfbffffff
+#define IRQ_DAT_UART_TX_SFT 26
+#define IRQ_DAT_UART_TX_HI 26
+#define IRQ_DAT_UART_TX_SZ 1
+#define IRQ_DAT_UART_RX_MSK 0x08000000
+#define IRQ_DAT_UART_RX_I_MSK 0xf7ffffff
+#define IRQ_DAT_UART_RX_SFT 27
+#define IRQ_DAT_UART_RX_HI 27
+#define IRQ_DAT_UART_RX_SZ 1
+#define DAT_UART_RX_TIMEOUT_MSK 0x10000000
+#define DAT_UART_RX_TIMEOUT_I_MSK 0xefffffff
+#define DAT_UART_RX_TIMEOUT_SFT 28
+#define DAT_UART_RX_TIMEOUT_HI 28
+#define DAT_UART_RX_TIMEOUT_SZ 1
+#define DAT_UART_MULTI_IRQ_MSK 0x20000000
+#define DAT_UART_MULTI_IRQ_I_MSK 0xdfffffff
+#define DAT_UART_MULTI_IRQ_SFT 29
+#define DAT_UART_MULTI_IRQ_HI 29
+#define DAT_UART_MULTI_IRQ_SZ 1
+#define ALR_ABT_NOCHG_INT_IRQ_MSK 0x40000000
+#define ALR_ABT_NOCHG_INT_IRQ_I_MSK 0xbfffffff
+#define ALR_ABT_NOCHG_INT_IRQ_SFT 30
+#define ALR_ABT_NOCHG_INT_IRQ_HI 30
+#define ALR_ABT_NOCHG_INT_IRQ_SZ 1
+#define TBLNEQ_MNGPKT_INT_IRQ_MSK 0x80000000
+#define TBLNEQ_MNGPKT_INT_IRQ_I_MSK 0x7fffffff
+#define TBLNEQ_MNGPKT_INT_IRQ_SFT 31
+#define TBLNEQ_MNGPKT_INT_IRQ_HI 31
+#define TBLNEQ_MNGPKT_INT_IRQ_SZ 1
+#define INTR_PERI_RAW_MSK 0xffffffff
+#define INTR_PERI_RAW_I_MSK 0x00000000
+#define INTR_PERI_RAW_SFT 0
+#define INTR_PERI_RAW_HI 31
+#define INTR_PERI_RAW_SZ 32
+#define INTR_GPI00_CFG_MSK 0x00000003
+#define INTR_GPI00_CFG_I_MSK 0xfffffffc
+#define INTR_GPI00_CFG_SFT 0
+#define INTR_GPI00_CFG_HI 1
+#define INTR_GPI00_CFG_SZ 2
+#define INTR_GPI01_CFG_MSK 0x0000000c
+#define INTR_GPI01_CFG_I_MSK 0xfffffff3
+#define INTR_GPI01_CFG_SFT 2
+#define INTR_GPI01_CFG_HI 3
+#define INTR_GPI01_CFG_SZ 2
+#define SYS_RST_INT_MSK 0x00000001
+#define SYS_RST_INT_I_MSK 0xfffffffe
+#define SYS_RST_INT_SFT 0
+#define SYS_RST_INT_HI 0
+#define SYS_RST_INT_SZ 1
+#define SPI_IPC_ADDR_MSK 0xffffffff
+#define SPI_IPC_ADDR_I_MSK 0x00000000
+#define SPI_IPC_ADDR_SFT 0
+#define SPI_IPC_ADDR_HI 31
+#define SPI_IPC_ADDR_SZ 32
+#define SD_MASK_TOP_MSK 0xffffffff
+#define SD_MASK_TOP_I_MSK 0x00000000
+#define SD_MASK_TOP_SFT 0
+#define SD_MASK_TOP_HI 31
+#define SD_MASK_TOP_SZ 32
+#define IRQ_PHY_0_SD_MSK 0x00000001
+#define IRQ_PHY_0_SD_I_MSK 0xfffffffe
+#define IRQ_PHY_0_SD_SFT 0
+#define IRQ_PHY_0_SD_HI 0
+#define IRQ_PHY_0_SD_SZ 1
+#define IRQ_PHY_1_SD_MSK 0x00000002
+#define IRQ_PHY_1_SD_I_MSK 0xfffffffd
+#define IRQ_PHY_1_SD_SFT 1
+#define IRQ_PHY_1_SD_HI 1
+#define IRQ_PHY_1_SD_SZ 1
+#define IRQ_SDIO_SD_MSK 0x00000004
+#define IRQ_SDIO_SD_I_MSK 0xfffffffb
+#define IRQ_SDIO_SD_SFT 2
+#define IRQ_SDIO_SD_HI 2
+#define IRQ_SDIO_SD_SZ 1
+#define IRQ_BEACON_DONE_SD_MSK 0x00000008
+#define IRQ_BEACON_DONE_SD_I_MSK 0xfffffff7
+#define IRQ_BEACON_DONE_SD_SFT 3
+#define IRQ_BEACON_DONE_SD_HI 3
+#define IRQ_BEACON_DONE_SD_SZ 1
+#define IRQ_BEACON_SD_MSK 0x00000010
+#define IRQ_BEACON_SD_I_MSK 0xffffffef
+#define IRQ_BEACON_SD_SFT 4
+#define IRQ_BEACON_SD_HI 4
+#define IRQ_BEACON_SD_SZ 1
+#define IRQ_PRE_BEACON_SD_MSK 0x00000020
+#define IRQ_PRE_BEACON_SD_I_MSK 0xffffffdf
+#define IRQ_PRE_BEACON_SD_SFT 5
+#define IRQ_PRE_BEACON_SD_HI 5
+#define IRQ_PRE_BEACON_SD_SZ 1
+#define IRQ_EDCA0_TX_DONE_SD_MSK 0x00000040
+#define IRQ_EDCA0_TX_DONE_SD_I_MSK 0xffffffbf
+#define IRQ_EDCA0_TX_DONE_SD_SFT 6
+#define IRQ_EDCA0_TX_DONE_SD_HI 6
+#define IRQ_EDCA0_TX_DONE_SD_SZ 1
+#define IRQ_EDCA1_TX_DONE_SD_MSK 0x00000080
+#define IRQ_EDCA1_TX_DONE_SD_I_MSK 0xffffff7f
+#define IRQ_EDCA1_TX_DONE_SD_SFT 7
+#define IRQ_EDCA1_TX_DONE_SD_HI 7
+#define IRQ_EDCA1_TX_DONE_SD_SZ 1
+#define IRQ_EDCA2_TX_DONE_SD_MSK 0x00000100
+#define IRQ_EDCA2_TX_DONE_SD_I_MSK 0xfffffeff
+#define IRQ_EDCA2_TX_DONE_SD_SFT 8
+#define IRQ_EDCA2_TX_DONE_SD_HI 8
+#define IRQ_EDCA2_TX_DONE_SD_SZ 1
+#define IRQ_EDCA3_TX_DONE_SD_MSK 0x00000200
+#define IRQ_EDCA3_TX_DONE_SD_I_MSK 0xfffffdff
+#define IRQ_EDCA3_TX_DONE_SD_SFT 9
+#define IRQ_EDCA3_TX_DONE_SD_HI 9
+#define IRQ_EDCA3_TX_DONE_SD_SZ 1
+#define IRQ_EDCA4_TX_DONE_SD_MSK 0x00000400
+#define IRQ_EDCA4_TX_DONE_SD_I_MSK 0xfffffbff
+#define IRQ_EDCA4_TX_DONE_SD_SFT 10
+#define IRQ_EDCA4_TX_DONE_SD_HI 10
+#define IRQ_EDCA4_TX_DONE_SD_SZ 1
+#define IRQ_BEACON_DTIM_SD_MSK 0x00001000
+#define IRQ_BEACON_DTIM_SD_I_MSK 0xffffefff
+#define IRQ_BEACON_DTIM_SD_SFT 12
+#define IRQ_BEACON_DTIM_SD_HI 12
+#define IRQ_BEACON_DTIM_SD_SZ 1
+#define IRQ_EDCA0_LOWTHOLD_INT_SD_MSK 0x00002000
+#define IRQ_EDCA0_LOWTHOLD_INT_SD_I_MSK 0xffffdfff
+#define IRQ_EDCA0_LOWTHOLD_INT_SD_SFT 13
+#define IRQ_EDCA0_LOWTHOLD_INT_SD_HI 13
+#define IRQ_EDCA0_LOWTHOLD_INT_SD_SZ 1
+#define IRQ_EDCA1_LOWTHOLD_INT_SD_MSK 0x00004000
+#define IRQ_EDCA1_LOWTHOLD_INT_SD_I_MSK 0xffffbfff
+#define IRQ_EDCA1_LOWTHOLD_INT_SD_SFT 14
+#define IRQ_EDCA1_LOWTHOLD_INT_SD_HI 14
+#define IRQ_EDCA1_LOWTHOLD_INT_SD_SZ 1
+#define IRQ_EDCA2_LOWTHOLD_INT_SD_MSK 0x00008000
+#define IRQ_EDCA2_LOWTHOLD_INT_SD_I_MSK 0xffff7fff
+#define IRQ_EDCA2_LOWTHOLD_INT_SD_SFT 15
+#define IRQ_EDCA2_LOWTHOLD_INT_SD_HI 15
+#define IRQ_EDCA2_LOWTHOLD_INT_SD_SZ 1
+#define IRQ_EDCA3_LOWTHOLD_INT_SD_MSK 0x00010000
+#define IRQ_EDCA3_LOWTHOLD_INT_SD_I_MSK 0xfffeffff
+#define IRQ_EDCA3_LOWTHOLD_INT_SD_SFT 16
+#define IRQ_EDCA3_LOWTHOLD_INT_SD_HI 16
+#define IRQ_EDCA3_LOWTHOLD_INT_SD_SZ 1
+#define IRQ_FENCE_HIT_INT_SD_MSK 0x00020000
+#define IRQ_FENCE_HIT_INT_SD_I_MSK 0xfffdffff
+#define IRQ_FENCE_HIT_INT_SD_SFT 17
+#define IRQ_FENCE_HIT_INT_SD_HI 17
+#define IRQ_FENCE_HIT_INT_SD_SZ 1
+#define IRQ_ILL_ADDR_INT_SD_MSK 0x00040000
+#define IRQ_ILL_ADDR_INT_SD_I_MSK 0xfffbffff
+#define IRQ_ILL_ADDR_INT_SD_SFT 18
+#define IRQ_ILL_ADDR_INT_SD_HI 18
+#define IRQ_ILL_ADDR_INT_SD_SZ 1
+#define IRQ_MBOX_SD_MSK 0x00080000
+#define IRQ_MBOX_SD_I_MSK 0xfff7ffff
+#define IRQ_MBOX_SD_SFT 19
+#define IRQ_MBOX_SD_HI 19
+#define IRQ_MBOX_SD_SZ 1
+#define IRQ_US_TIMER0_SD_MSK 0x00100000
+#define IRQ_US_TIMER0_SD_I_MSK 0xffefffff
+#define IRQ_US_TIMER0_SD_SFT 20
+#define IRQ_US_TIMER0_SD_HI 20
+#define IRQ_US_TIMER0_SD_SZ 1
+#define IRQ_US_TIMER1_SD_MSK 0x00200000
+#define IRQ_US_TIMER1_SD_I_MSK 0xffdfffff
+#define IRQ_US_TIMER1_SD_SFT 21
+#define IRQ_US_TIMER1_SD_HI 21
+#define IRQ_US_TIMER1_SD_SZ 1
+#define IRQ_US_TIMER2_SD_MSK 0x00400000
+#define IRQ_US_TIMER2_SD_I_MSK 0xffbfffff
+#define IRQ_US_TIMER2_SD_SFT 22
+#define IRQ_US_TIMER2_SD_HI 22
+#define IRQ_US_TIMER2_SD_SZ 1
+#define IRQ_US_TIMER3_SD_MSK 0x00800000
+#define IRQ_US_TIMER3_SD_I_MSK 0xff7fffff
+#define IRQ_US_TIMER3_SD_SFT 23
+#define IRQ_US_TIMER3_SD_HI 23
+#define IRQ_US_TIMER3_SD_SZ 1
+#define IRQ_MS_TIMER0_SD_MSK 0x01000000
+#define IRQ_MS_TIMER0_SD_I_MSK 0xfeffffff
+#define IRQ_MS_TIMER0_SD_SFT 24
+#define IRQ_MS_TIMER0_SD_HI 24
+#define IRQ_MS_TIMER0_SD_SZ 1
+#define IRQ_MS_TIMER1_SD_MSK 0x02000000
+#define IRQ_MS_TIMER1_SD_I_MSK 0xfdffffff
+#define IRQ_MS_TIMER1_SD_SFT 25
+#define IRQ_MS_TIMER1_SD_HI 25
+#define IRQ_MS_TIMER1_SD_SZ 1
+#define IRQ_MS_TIMER2_SD_MSK 0x04000000
+#define IRQ_MS_TIMER2_SD_I_MSK 0xfbffffff
+#define IRQ_MS_TIMER2_SD_SFT 26
+#define IRQ_MS_TIMER2_SD_HI 26
+#define IRQ_MS_TIMER2_SD_SZ 1
+#define IRQ_MS_TIMER3_SD_MSK 0x08000000
+#define IRQ_MS_TIMER3_SD_I_MSK 0xf7ffffff
+#define IRQ_MS_TIMER3_SD_SFT 27
+#define IRQ_MS_TIMER3_SD_HI 27
+#define IRQ_MS_TIMER3_SD_SZ 1
+#define IRQ_TX_LIMIT_INT_SD_MSK 0x10000000
+#define IRQ_TX_LIMIT_INT_SD_I_MSK 0xefffffff
+#define IRQ_TX_LIMIT_INT_SD_SFT 28
+#define IRQ_TX_LIMIT_INT_SD_HI 28
+#define IRQ_TX_LIMIT_INT_SD_SZ 1
+#define IRQ_DMA0_SD_MSK 0x20000000
+#define IRQ_DMA0_SD_I_MSK 0xdfffffff
+#define IRQ_DMA0_SD_SFT 29
+#define IRQ_DMA0_SD_HI 29
+#define IRQ_DMA0_SD_SZ 1
+#define IRQ_CO_DMA_SD_MSK 0x40000000
+#define IRQ_CO_DMA_SD_I_MSK 0xbfffffff
+#define IRQ_CO_DMA_SD_SFT 30
+#define IRQ_CO_DMA_SD_HI 30
+#define IRQ_CO_DMA_SD_SZ 1
+#define IRQ_PERI_GROUP_SD_MSK 0x80000000
+#define IRQ_PERI_GROUP_SD_I_MSK 0x7fffffff
+#define IRQ_PERI_GROUP_SD_SFT 31
+#define IRQ_PERI_GROUP_SD_HI 31
+#define IRQ_PERI_GROUP_SD_SZ 1
+#define INT_PERI_MASK_SD_MSK 0xffffffff
+#define INT_PERI_MASK_SD_I_MSK 0x00000000
+#define INT_PERI_MASK_SD_SFT 0
+#define INT_PERI_MASK_SD_HI 31
+#define INT_PERI_MASK_SD_SZ 32
+#define PERI_RTC_SD_MSK 0x00000001
+#define PERI_RTC_SD_I_MSK 0xfffffffe
+#define PERI_RTC_SD_SFT 0
+#define PERI_RTC_SD_HI 0
+#define PERI_RTC_SD_SZ 1
+#define IRQ_UART0_TX_SD_MSK 0x00000002
+#define IRQ_UART0_TX_SD_I_MSK 0xfffffffd
+#define IRQ_UART0_TX_SD_SFT 1
+#define IRQ_UART0_TX_SD_HI 1
+#define IRQ_UART0_TX_SD_SZ 1
+#define IRQ_UART0_RX_SD_MSK 0x00000004
+#define IRQ_UART0_RX_SD_I_MSK 0xfffffffb
+#define IRQ_UART0_RX_SD_SFT 2
+#define IRQ_UART0_RX_SD_HI 2
+#define IRQ_UART0_RX_SD_SZ 1
+#define PERI_GPI_SD_2_MSK 0x00000008
+#define PERI_GPI_SD_2_I_MSK 0xfffffff7
+#define PERI_GPI_SD_2_SFT 3
+#define PERI_GPI_SD_2_HI 3
+#define PERI_GPI_SD_2_SZ 1
+#define IRQ_SPI_IPC_SD_MSK 0x00000010
+#define IRQ_SPI_IPC_SD_I_MSK 0xffffffef
+#define IRQ_SPI_IPC_SD_SFT 4
+#define IRQ_SPI_IPC_SD_HI 4
+#define IRQ_SPI_IPC_SD_SZ 1
+#define PERI_GPI_SD_1_0_MSK 0x00000060
+#define PERI_GPI_SD_1_0_I_MSK 0xffffff9f
+#define PERI_GPI_SD_1_0_SFT 5
+#define PERI_GPI_SD_1_0_HI 6
+#define PERI_GPI_SD_1_0_SZ 2
+#define SCRT_INT_1_SD_MSK 0x00000080
+#define SCRT_INT_1_SD_I_MSK 0xffffff7f
+#define SCRT_INT_1_SD_SFT 7
+#define SCRT_INT_1_SD_HI 7
+#define SCRT_INT_1_SD_SZ 1
+#define MMU_ALC_ERR_SD_MSK 0x00000100
+#define MMU_ALC_ERR_SD_I_MSK 0xfffffeff
+#define MMU_ALC_ERR_SD_SFT 8
+#define MMU_ALC_ERR_SD_HI 8
+#define MMU_ALC_ERR_SD_SZ 1
+#define MMU_RLS_ERR_SD_MSK 0x00000200
+#define MMU_RLS_ERR_SD_I_MSK 0xfffffdff
+#define MMU_RLS_ERR_SD_SFT 9
+#define MMU_RLS_ERR_SD_HI 9
+#define MMU_RLS_ERR_SD_SZ 1
+#define ID_MNG_INT_1_SD_MSK 0x00000400
+#define ID_MNG_INT_1_SD_I_MSK 0xfffffbff
+#define ID_MNG_INT_1_SD_SFT 10
+#define ID_MNG_INT_1_SD_HI 10
+#define ID_MNG_INT_1_SD_SZ 1
+#define MBOX_INT_1_SD_MSK 0x00000800
+#define MBOX_INT_1_SD_I_MSK 0xfffff7ff
+#define MBOX_INT_1_SD_SFT 11
+#define MBOX_INT_1_SD_HI 11
+#define MBOX_INT_1_SD_SZ 1
+#define MBOX_INT_2_SD_MSK 0x00001000
+#define MBOX_INT_2_SD_I_MSK 0xffffefff
+#define MBOX_INT_2_SD_SFT 12
+#define MBOX_INT_2_SD_HI 12
+#define MBOX_INT_2_SD_SZ 1
+#define MBOX_INT_3_SD_MSK 0x00002000
+#define MBOX_INT_3_SD_I_MSK 0xffffdfff
+#define MBOX_INT_3_SD_SFT 13
+#define MBOX_INT_3_SD_HI 13
+#define MBOX_INT_3_SD_SZ 1
+#define HCI_INT_1_SD_MSK 0x00004000
+#define HCI_INT_1_SD_I_MSK 0xffffbfff
+#define HCI_INT_1_SD_SFT 14
+#define HCI_INT_1_SD_HI 14
+#define HCI_INT_1_SD_SZ 1
+#define UART_RX_TIMEOUT_SD_MSK 0x00008000
+#define UART_RX_TIMEOUT_SD_I_MSK 0xffff7fff
+#define UART_RX_TIMEOUT_SD_SFT 15
+#define UART_RX_TIMEOUT_SD_HI 15
+#define UART_RX_TIMEOUT_SD_SZ 1
+#define UART_MULTI_IRQ_SD_MSK 0x00010000
+#define UART_MULTI_IRQ_SD_I_MSK 0xfffeffff
+#define UART_MULTI_IRQ_SD_SFT 16
+#define UART_MULTI_IRQ_SD_HI 16
+#define UART_MULTI_IRQ_SD_SZ 1
+#define ID_MNG_INT_2_SD_MSK 0x00020000
+#define ID_MNG_INT_2_SD_I_MSK 0xfffdffff
+#define ID_MNG_INT_2_SD_SFT 17
+#define ID_MNG_INT_2_SD_HI 17
+#define ID_MNG_INT_2_SD_SZ 1
+#define DMN_NOHIT_INT_SD_MSK 0x00040000
+#define DMN_NOHIT_INT_SD_I_MSK 0xfffbffff
+#define DMN_NOHIT_INT_SD_SFT 18
+#define DMN_NOHIT_INT_SD_HI 18
+#define DMN_NOHIT_INT_SD_SZ 1
+#define ID_THOLD_RX_SD_MSK 0x00080000
+#define ID_THOLD_RX_SD_I_MSK 0xfff7ffff
+#define ID_THOLD_RX_SD_SFT 19
+#define ID_THOLD_RX_SD_HI 19
+#define ID_THOLD_RX_SD_SZ 1
+#define ID_THOLD_TX_SD_MSK 0x00100000
+#define ID_THOLD_TX_SD_I_MSK 0xffefffff
+#define ID_THOLD_TX_SD_SFT 20
+#define ID_THOLD_TX_SD_HI 20
+#define ID_THOLD_TX_SD_SZ 1
+#define ID_DOUBLE_RLS_SD_MSK 0x00200000
+#define ID_DOUBLE_RLS_SD_I_MSK 0xffdfffff
+#define ID_DOUBLE_RLS_SD_SFT 21
+#define ID_DOUBLE_RLS_SD_HI 21
+#define ID_DOUBLE_RLS_SD_SZ 1
+#define RX_ID_LEN_THOLD_SD_MSK 0x00400000
+#define RX_ID_LEN_THOLD_SD_I_MSK 0xffbfffff
+#define RX_ID_LEN_THOLD_SD_SFT 22
+#define RX_ID_LEN_THOLD_SD_HI 22
+#define RX_ID_LEN_THOLD_SD_SZ 1
+#define TX_ID_LEN_THOLD_SD_MSK 0x00800000
+#define TX_ID_LEN_THOLD_SD_I_MSK 0xff7fffff
+#define TX_ID_LEN_THOLD_SD_SFT 23
+#define TX_ID_LEN_THOLD_SD_HI 23
+#define TX_ID_LEN_THOLD_SD_SZ 1
+#define ALL_ID_LEN_THOLD_SD_MSK 0x01000000
+#define ALL_ID_LEN_THOLD_SD_I_MSK 0xfeffffff
+#define ALL_ID_LEN_THOLD_SD_SFT 24
+#define ALL_ID_LEN_THOLD_SD_HI 24
+#define ALL_ID_LEN_THOLD_SD_SZ 1
+#define DMN_MCU_INT_SD_MSK 0x02000000
+#define DMN_MCU_INT_SD_I_MSK 0xfdffffff
+#define DMN_MCU_INT_SD_SFT 25
+#define DMN_MCU_INT_SD_HI 25
+#define DMN_MCU_INT_SD_SZ 1
+#define IRQ_DAT_UART_TX_SD_MSK 0x04000000
+#define IRQ_DAT_UART_TX_SD_I_MSK 0xfbffffff
+#define IRQ_DAT_UART_TX_SD_SFT 26
+#define IRQ_DAT_UART_TX_SD_HI 26
+#define IRQ_DAT_UART_TX_SD_SZ 1
+#define IRQ_DAT_UART_RX_SD_MSK 0x08000000
+#define IRQ_DAT_UART_RX_SD_I_MSK 0xf7ffffff
+#define IRQ_DAT_UART_RX_SD_SFT 27
+#define IRQ_DAT_UART_RX_SD_HI 27
+#define IRQ_DAT_UART_RX_SD_SZ 1
+#define DAT_UART_RX_TIMEOUT_SD_MSK 0x10000000
+#define DAT_UART_RX_TIMEOUT_SD_I_MSK 0xefffffff
+#define DAT_UART_RX_TIMEOUT_SD_SFT 28
+#define DAT_UART_RX_TIMEOUT_SD_HI 28
+#define DAT_UART_RX_TIMEOUT_SD_SZ 1
+#define DAT_UART_MULTI_IRQ_SD_MSK 0x20000000
+#define DAT_UART_MULTI_IRQ_SD_I_MSK 0xdfffffff
+#define DAT_UART_MULTI_IRQ_SD_SFT 29
+#define DAT_UART_MULTI_IRQ_SD_HI 29
+#define DAT_UART_MULTI_IRQ_SD_SZ 1
+#define ALR_ABT_NOCHG_INT_IRQ_SD_MSK 0x40000000
+#define ALR_ABT_NOCHG_INT_IRQ_SD_I_MSK 0xbfffffff
+#define ALR_ABT_NOCHG_INT_IRQ_SD_SFT 30
+#define ALR_ABT_NOCHG_INT_IRQ_SD_HI 30
+#define ALR_ABT_NOCHG_INT_IRQ_SD_SZ 1
+#define TBLNEQ_MNGPKT_INT_IRQ_SD_MSK 0x80000000
+#define TBLNEQ_MNGPKT_INT_IRQ_SD_I_MSK 0x7fffffff
+#define TBLNEQ_MNGPKT_INT_IRQ_SD_SFT 31
+#define TBLNEQ_MNGPKT_INT_IRQ_SD_HI 31
+#define TBLNEQ_MNGPKT_INT_IRQ_SD_SZ 1
+#define DBG_SPI_MODE_MSK 0xffffffff
+#define DBG_SPI_MODE_I_MSK 0x00000000
+#define DBG_SPI_MODE_SFT 0
+#define DBG_SPI_MODE_HI 31
+#define DBG_SPI_MODE_SZ 32
+#define DBG_RX_QUOTA_MSK 0x0000ffff
+#define DBG_RX_QUOTA_I_MSK 0xffff0000
+#define DBG_RX_QUOTA_SFT 0
+#define DBG_RX_QUOTA_HI 15
+#define DBG_RX_QUOTA_SZ 16
+#define DBG_CONDI_NUM_MSK 0x000000ff
+#define DBG_CONDI_NUM_I_MSK 0xffffff00
+#define DBG_CONDI_NUM_SFT 0
+#define DBG_CONDI_NUM_HI 7
+#define DBG_CONDI_NUM_SZ 8
+#define DBG_HOST_PATH_MSK 0x00000001
+#define DBG_HOST_PATH_I_MSK 0xfffffffe
+#define DBG_HOST_PATH_SFT 0
+#define DBG_HOST_PATH_HI 0
+#define DBG_HOST_PATH_SZ 1
+#define DBG_TX_SEG_MSK 0xffffffff
+#define DBG_TX_SEG_I_MSK 0x00000000
+#define DBG_TX_SEG_SFT 0
+#define DBG_TX_SEG_HI 31
+#define DBG_TX_SEG_SZ 32
+#define DBG_BRST_MODE_MSK 0x00000001
+#define DBG_BRST_MODE_I_MSK 0xfffffffe
+#define DBG_BRST_MODE_SFT 0
+#define DBG_BRST_MODE_HI 0
+#define DBG_BRST_MODE_SZ 1
+#define DBG_CLK_WIDTH_MSK 0x0000ffff
+#define DBG_CLK_WIDTH_I_MSK 0xffff0000
+#define DBG_CLK_WIDTH_SFT 0
+#define DBG_CLK_WIDTH_HI 15
+#define DBG_CLK_WIDTH_SZ 16
+#define DBG_CSN_INTER_MSK 0xffff0000
+#define DBG_CSN_INTER_I_MSK 0x0000ffff
+#define DBG_CSN_INTER_SFT 16
+#define DBG_CSN_INTER_HI 31
+#define DBG_CSN_INTER_SZ 16
+#define DBG_BACK_DLY_MSK 0x0000ffff
+#define DBG_BACK_DLY_I_MSK 0xffff0000
+#define DBG_BACK_DLY_SFT 0
+#define DBG_BACK_DLY_HI 15
+#define DBG_BACK_DLY_SZ 16
+#define DBG_FRONT_DLY_MSK 0xffff0000
+#define DBG_FRONT_DLY_I_MSK 0x0000ffff
+#define DBG_FRONT_DLY_SFT 16
+#define DBG_FRONT_DLY_HI 31
+#define DBG_FRONT_DLY_SZ 16
+#define DBG_RX_FIFO_FAIL_MSK 0x00000002
+#define DBG_RX_FIFO_FAIL_I_MSK 0xfffffffd
+#define DBG_RX_FIFO_FAIL_SFT 1
+#define DBG_RX_FIFO_FAIL_HI 1
+#define DBG_RX_FIFO_FAIL_SZ 1
+#define DBG_RX_HOST_FAIL_MSK 0x00000004
+#define DBG_RX_HOST_FAIL_I_MSK 0xfffffffb
+#define DBG_RX_HOST_FAIL_SFT 2
+#define DBG_RX_HOST_FAIL_HI 2
+#define DBG_RX_HOST_FAIL_SZ 1
+#define DBG_TX_FIFO_FAIL_MSK 0x00000008
+#define DBG_TX_FIFO_FAIL_I_MSK 0xfffffff7
+#define DBG_TX_FIFO_FAIL_SFT 3
+#define DBG_TX_FIFO_FAIL_HI 3
+#define DBG_TX_FIFO_FAIL_SZ 1
+#define DBG_TX_HOST_FAIL_MSK 0x00000010
+#define DBG_TX_HOST_FAIL_I_MSK 0xffffffef
+#define DBG_TX_HOST_FAIL_SFT 4
+#define DBG_TX_HOST_FAIL_HI 4
+#define DBG_TX_HOST_FAIL_SZ 1
+#define DBG_SPI_DOUBLE_ALLOC_MSK 0x00000020
+#define DBG_SPI_DOUBLE_ALLOC_I_MSK 0xffffffdf
+#define DBG_SPI_DOUBLE_ALLOC_SFT 5
+#define DBG_SPI_DOUBLE_ALLOC_HI 5
+#define DBG_SPI_DOUBLE_ALLOC_SZ 1
+#define DBG_SPI_TX_NO_ALLOC_MSK 0x00000040
+#define DBG_SPI_TX_NO_ALLOC_I_MSK 0xffffffbf
+#define DBG_SPI_TX_NO_ALLOC_SFT 6
+#define DBG_SPI_TX_NO_ALLOC_HI 6
+#define DBG_SPI_TX_NO_ALLOC_SZ 1
+#define DBG_RDATA_RDY_MSK 0x00000080
+#define DBG_RDATA_RDY_I_MSK 0xffffff7f
+#define DBG_RDATA_RDY_SFT 7
+#define DBG_RDATA_RDY_HI 7
+#define DBG_RDATA_RDY_SZ 1
+#define DBG_SPI_ALLOC_STATUS_MSK 0x00000100
+#define DBG_SPI_ALLOC_STATUS_I_MSK 0xfffffeff
+#define DBG_SPI_ALLOC_STATUS_SFT 8
+#define DBG_SPI_ALLOC_STATUS_HI 8
+#define DBG_SPI_ALLOC_STATUS_SZ 1
+#define DBG_SPI_DBG_WR_FIFO_FULL_MSK 0x00000200
+#define DBG_SPI_DBG_WR_FIFO_FULL_I_MSK 0xfffffdff
+#define DBG_SPI_DBG_WR_FIFO_FULL_SFT 9
+#define DBG_SPI_DBG_WR_FIFO_FULL_HI 9
+#define DBG_SPI_DBG_WR_FIFO_FULL_SZ 1
+#define DBG_RX_LEN_MSK 0xffff0000
+#define DBG_RX_LEN_I_MSK 0x0000ffff
+#define DBG_RX_LEN_SFT 16
+#define DBG_RX_LEN_HI 31
+#define DBG_RX_LEN_SZ 16
+#define DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS_MSK 0x00000007
+#define DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS_I_MSK 0xfffffff8
+#define DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS_SFT 0
+#define DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS_HI 2
+#define DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS_SZ 3
+#define DBG_SPI_HOST_TX_ALLOC_PKBUF_MSK 0x00000100
+#define DBG_SPI_HOST_TX_ALLOC_PKBUF_I_MSK 0xfffffeff
+#define DBG_SPI_HOST_TX_ALLOC_PKBUF_SFT 8
+#define DBG_SPI_HOST_TX_ALLOC_PKBUF_HI 8
+#define DBG_SPI_HOST_TX_ALLOC_PKBUF_SZ 1
+#define DBG_SPI_TX_ALLOC_SIZE_MSK 0x000000ff
+#define DBG_SPI_TX_ALLOC_SIZE_I_MSK 0xffffff00
+#define DBG_SPI_TX_ALLOC_SIZE_SFT 0
+#define DBG_SPI_TX_ALLOC_SIZE_HI 7
+#define DBG_SPI_TX_ALLOC_SIZE_SZ 8
+#define DBG_RD_DAT_CNT_MSK 0x0000ffff
+#define DBG_RD_DAT_CNT_I_MSK 0xffff0000
+#define DBG_RD_DAT_CNT_SFT 0
+#define DBG_RD_DAT_CNT_HI 15
+#define DBG_RD_DAT_CNT_SZ 16
+#define DBG_RD_STS_CNT_MSK 0xffff0000
+#define DBG_RD_STS_CNT_I_MSK 0x0000ffff
+#define DBG_RD_STS_CNT_SFT 16
+#define DBG_RD_STS_CNT_HI 31
+#define DBG_RD_STS_CNT_SZ 16
+#define DBG_JUDGE_CNT_MSK 0x0000ffff
+#define DBG_JUDGE_CNT_I_MSK 0xffff0000
+#define DBG_JUDGE_CNT_SFT 0
+#define DBG_JUDGE_CNT_HI 15
+#define DBG_JUDGE_CNT_SZ 16
+#define DBG_RD_STS_CNT_CLR_MSK 0x00010000
+#define DBG_RD_STS_CNT_CLR_I_MSK 0xfffeffff
+#define DBG_RD_STS_CNT_CLR_SFT 16
+#define DBG_RD_STS_CNT_CLR_HI 16
+#define DBG_RD_STS_CNT_CLR_SZ 1
+#define DBG_RD_DAT_CNT_CLR_MSK 0x00020000
+#define DBG_RD_DAT_CNT_CLR_I_MSK 0xfffdffff
+#define DBG_RD_DAT_CNT_CLR_SFT 17
+#define DBG_RD_DAT_CNT_CLR_HI 17
+#define DBG_RD_DAT_CNT_CLR_SZ 1
+#define DBG_JUDGE_CNT_CLR_MSK 0x00040000
+#define DBG_JUDGE_CNT_CLR_I_MSK 0xfffbffff
+#define DBG_JUDGE_CNT_CLR_SFT 18
+#define DBG_JUDGE_CNT_CLR_HI 18
+#define DBG_JUDGE_CNT_CLR_SZ 1
+#define DBG_TX_DONE_CNT_MSK 0x0000ffff
+#define DBG_TX_DONE_CNT_I_MSK 0xffff0000
+#define DBG_TX_DONE_CNT_SFT 0
+#define DBG_TX_DONE_CNT_HI 15
+#define DBG_TX_DONE_CNT_SZ 16
+#define DBG_TX_DISCARD_CNT_MSK 0xffff0000
+#define DBG_TX_DISCARD_CNT_I_MSK 0x0000ffff
+#define DBG_TX_DISCARD_CNT_SFT 16
+#define DBG_TX_DISCARD_CNT_HI 31
+#define DBG_TX_DISCARD_CNT_SZ 16
+#define DBG_TX_SET_CNT_MSK 0x0000ffff
+#define DBG_TX_SET_CNT_I_MSK 0xffff0000
+#define DBG_TX_SET_CNT_SFT 0
+#define DBG_TX_SET_CNT_HI 15
+#define DBG_TX_SET_CNT_SZ 16
+#define DBG_TX_DISCARD_CNT_CLR_MSK 0x00010000
+#define DBG_TX_DISCARD_CNT_CLR_I_MSK 0xfffeffff
+#define DBG_TX_DISCARD_CNT_CLR_SFT 16
+#define DBG_TX_DISCARD_CNT_CLR_HI 16
+#define DBG_TX_DISCARD_CNT_CLR_SZ 1
+#define DBG_TX_DONE_CNT_CLR_MSK 0x00020000
+#define DBG_TX_DONE_CNT_CLR_I_MSK 0xfffdffff
+#define DBG_TX_DONE_CNT_CLR_SFT 17
+#define DBG_TX_DONE_CNT_CLR_HI 17
+#define DBG_TX_DONE_CNT_CLR_SZ 1
+#define DBG_TX_SET_CNT_CLR_MSK 0x00040000
+#define DBG_TX_SET_CNT_CLR_I_MSK 0xfffbffff
+#define DBG_TX_SET_CNT_CLR_SFT 18
+#define DBG_TX_SET_CNT_CLR_HI 18
+#define DBG_TX_SET_CNT_CLR_SZ 1
+#define DBG_DAT_MODE_OFF_MSK 0x00080000
+#define DBG_DAT_MODE_OFF_I_MSK 0xfff7ffff
+#define DBG_DAT_MODE_OFF_SFT 19
+#define DBG_DAT_MODE_OFF_HI 19
+#define DBG_DAT_MODE_OFF_SZ 1
+#define DBG_TX_FIFO_RESIDUE_MSK 0x00700000
+#define DBG_TX_FIFO_RESIDUE_I_MSK 0xff8fffff
+#define DBG_TX_FIFO_RESIDUE_SFT 20
+#define DBG_TX_FIFO_RESIDUE_HI 22
+#define DBG_TX_FIFO_RESIDUE_SZ 3
+#define DBG_RX_FIFO_RESIDUE_MSK 0x07000000
+#define DBG_RX_FIFO_RESIDUE_I_MSK 0xf8ffffff
+#define DBG_RX_FIFO_RESIDUE_SFT 24
+#define DBG_RX_FIFO_RESIDUE_HI 26
+#define DBG_RX_FIFO_RESIDUE_SZ 3
+#define DBG_RX_RDY_MSK 0x00000001
+#define DBG_RX_RDY_I_MSK 0xfffffffe
+#define DBG_RX_RDY_SFT 0
+#define DBG_RX_RDY_HI 0
+#define DBG_RX_RDY_SZ 1
+#define DBG_SDIO_SYS_INT_MSK 0x00000004
+#define DBG_SDIO_SYS_INT_I_MSK 0xfffffffb
+#define DBG_SDIO_SYS_INT_SFT 2
+#define DBG_SDIO_SYS_INT_HI 2
+#define DBG_SDIO_SYS_INT_SZ 1
+#define DBG_EDCA0_LOWTHOLD_INT_MSK 0x00000008
+#define DBG_EDCA0_LOWTHOLD_INT_I_MSK 0xfffffff7
+#define DBG_EDCA0_LOWTHOLD_INT_SFT 3
+#define DBG_EDCA0_LOWTHOLD_INT_HI 3
+#define DBG_EDCA0_LOWTHOLD_INT_SZ 1
+#define DBG_EDCA1_LOWTHOLD_INT_MSK 0x00000010
+#define DBG_EDCA1_LOWTHOLD_INT_I_MSK 0xffffffef
+#define DBG_EDCA1_LOWTHOLD_INT_SFT 4
+#define DBG_EDCA1_LOWTHOLD_INT_HI 4
+#define DBG_EDCA1_LOWTHOLD_INT_SZ 1
+#define DBG_EDCA2_LOWTHOLD_INT_MSK 0x00000020
+#define DBG_EDCA2_LOWTHOLD_INT_I_MSK 0xffffffdf
+#define DBG_EDCA2_LOWTHOLD_INT_SFT 5
+#define DBG_EDCA2_LOWTHOLD_INT_HI 5
+#define DBG_EDCA2_LOWTHOLD_INT_SZ 1
+#define DBG_EDCA3_LOWTHOLD_INT_MSK 0x00000040
+#define DBG_EDCA3_LOWTHOLD_INT_I_MSK 0xffffffbf
+#define DBG_EDCA3_LOWTHOLD_INT_SFT 6
+#define DBG_EDCA3_LOWTHOLD_INT_HI 6
+#define DBG_EDCA3_LOWTHOLD_INT_SZ 1
+#define DBG_TX_LIMIT_INT_IN_MSK 0x00000080
+#define DBG_TX_LIMIT_INT_IN_I_MSK 0xffffff7f
+#define DBG_TX_LIMIT_INT_IN_SFT 7
+#define DBG_TX_LIMIT_INT_IN_HI 7
+#define DBG_TX_LIMIT_INT_IN_SZ 1
+#define DBG_SPI_FN1_MSK 0x00007f00
+#define DBG_SPI_FN1_I_MSK 0xffff80ff
+#define DBG_SPI_FN1_SFT 8
+#define DBG_SPI_FN1_HI 14
+#define DBG_SPI_FN1_SZ 7
+#define DBG_SPI_CLK_EN_INT_MSK 0x00008000
+#define DBG_SPI_CLK_EN_INT_I_MSK 0xffff7fff
+#define DBG_SPI_CLK_EN_INT_SFT 15
+#define DBG_SPI_CLK_EN_INT_HI 15
+#define DBG_SPI_CLK_EN_INT_SZ 1
+#define DBG_SPI_HOST_MASK_MSK 0x00ff0000
+#define DBG_SPI_HOST_MASK_I_MSK 0xff00ffff
+#define DBG_SPI_HOST_MASK_SFT 16
+#define DBG_SPI_HOST_MASK_HI 23
+#define DBG_SPI_HOST_MASK_SZ 8
+#define BOOT_ADDR_MSK 0x00ffffff
+#define BOOT_ADDR_I_MSK 0xff000000
+#define BOOT_ADDR_SFT 0
+#define BOOT_ADDR_HI 23
+#define BOOT_ADDR_SZ 24
+#define CHECK_SUM_FAIL_MSK 0x80000000
+#define CHECK_SUM_FAIL_I_MSK 0x7fffffff
+#define CHECK_SUM_FAIL_SFT 31
+#define CHECK_SUM_FAIL_HI 31
+#define CHECK_SUM_FAIL_SZ 1
+#define VERIFY_DATA_MSK 0xffffffff
+#define VERIFY_DATA_I_MSK 0x00000000
+#define VERIFY_DATA_SFT 0
+#define VERIFY_DATA_HI 31
+#define VERIFY_DATA_SZ 32
+#define FLASH_ADDR_MSK 0x00ffffff
+#define FLASH_ADDR_I_MSK 0xff000000
+#define FLASH_ADDR_SFT 0
+#define FLASH_ADDR_HI 23
+#define FLASH_ADDR_SZ 24
+#define FLASH_CMD_CLR_MSK 0x10000000
+#define FLASH_CMD_CLR_I_MSK 0xefffffff
+#define FLASH_CMD_CLR_SFT 28
+#define FLASH_CMD_CLR_HI 28
+#define FLASH_CMD_CLR_SZ 1
+#define FLASH_DMA_CLR_MSK 0x20000000
+#define FLASH_DMA_CLR_I_MSK 0xdfffffff
+#define FLASH_DMA_CLR_SFT 29
+#define FLASH_DMA_CLR_HI 29
+#define FLASH_DMA_CLR_SZ 1
+#define DMA_EN_MSK 0x40000000
+#define DMA_EN_I_MSK 0xbfffffff
+#define DMA_EN_SFT 30
+#define DMA_EN_HI 30
+#define DMA_EN_SZ 1
+#define DMA_BUSY_MSK 0x80000000
+#define DMA_BUSY_I_MSK 0x7fffffff
+#define DMA_BUSY_SFT 31
+#define DMA_BUSY_HI 31
+#define DMA_BUSY_SZ 1
+#define SRAM_ADDR_MSK 0xffffffff
+#define SRAM_ADDR_I_MSK 0x00000000
+#define SRAM_ADDR_SFT 0
+#define SRAM_ADDR_HI 31
+#define SRAM_ADDR_SZ 32
+#define FLASH_DMA_LEN_MSK 0xffffffff
+#define FLASH_DMA_LEN_I_MSK 0x00000000
+#define FLASH_DMA_LEN_SFT 0
+#define FLASH_DMA_LEN_HI 31
+#define FLASH_DMA_LEN_SZ 32
+#define FLASH_FRONT_DLY_MSK 0x0000ffff
+#define FLASH_FRONT_DLY_I_MSK 0xffff0000
+#define FLASH_FRONT_DLY_SFT 0
+#define FLASH_FRONT_DLY_HI 15
+#define FLASH_FRONT_DLY_SZ 16
+#define FLASH_BACK_DLY_MSK 0xffff0000
+#define FLASH_BACK_DLY_I_MSK 0x0000ffff
+#define FLASH_BACK_DLY_SFT 16
+#define FLASH_BACK_DLY_HI 31
+#define FLASH_BACK_DLY_SZ 16
+#define FLASH_CLK_WIDTH_MSK 0x0000ffff
+#define FLASH_CLK_WIDTH_I_MSK 0xffff0000
+#define FLASH_CLK_WIDTH_SFT 0
+#define FLASH_CLK_WIDTH_HI 15
+#define FLASH_CLK_WIDTH_SZ 16
+#define SPI_BUSY_MSK 0x00010000
+#define SPI_BUSY_I_MSK 0xfffeffff
+#define SPI_BUSY_SFT 16
+#define SPI_BUSY_HI 16
+#define SPI_BUSY_SZ 1
+#define FLS_REMAP_MSK 0x00020000
+#define FLS_REMAP_I_MSK 0xfffdffff
+#define FLS_REMAP_SFT 17
+#define FLS_REMAP_HI 17
+#define FLS_REMAP_SZ 1
+#define PBUS_SWP_MSK 0x00040000
+#define PBUS_SWP_I_MSK 0xfffbffff
+#define PBUS_SWP_SFT 18
+#define PBUS_SWP_HI 18
+#define PBUS_SWP_SZ 1
+#define BIT_MODE1_MSK 0x00080000
+#define BIT_MODE1_I_MSK 0xfff7ffff
+#define BIT_MODE1_SFT 19
+#define BIT_MODE1_HI 19
+#define BIT_MODE1_SZ 1
+#define BIT_MODE2_MSK 0x00100000
+#define BIT_MODE2_I_MSK 0xffefffff
+#define BIT_MODE2_SFT 20
+#define BIT_MODE2_HI 20
+#define BIT_MODE2_SZ 1
+#define BIT_MODE4_MSK 0x00200000
+#define BIT_MODE4_I_MSK 0xffdfffff
+#define BIT_MODE4_SFT 21
+#define BIT_MODE4_HI 21
+#define BIT_MODE4_SZ 1
+#define BOOT_CHECK_SUM_MSK 0xffffffff
+#define BOOT_CHECK_SUM_I_MSK 0x00000000
+#define BOOT_CHECK_SUM_SFT 0
+#define BOOT_CHECK_SUM_HI 31
+#define BOOT_CHECK_SUM_SZ 32
+#define CHECK_SUM_TAG_MSK 0xffffffff
+#define CHECK_SUM_TAG_I_MSK 0x00000000
+#define CHECK_SUM_TAG_SFT 0
+#define CHECK_SUM_TAG_HI 31
+#define CHECK_SUM_TAG_SZ 32
+#define CMD_LEN_MSK 0x0000ffff
+#define CMD_LEN_I_MSK 0xffff0000
+#define CMD_LEN_SFT 0
+#define CMD_LEN_HI 15
+#define CMD_LEN_SZ 16
+#define CMD_ADDR_MSK 0xffffffff
+#define CMD_ADDR_I_MSK 0x00000000
+#define CMD_ADDR_SFT 0
+#define CMD_ADDR_HI 31
+#define CMD_ADDR_SZ 32
+#define DMA_ADR_SRC_MSK 0xffffffff
+#define DMA_ADR_SRC_I_MSK 0x00000000
+#define DMA_ADR_SRC_SFT 0
+#define DMA_ADR_SRC_HI 31
+#define DMA_ADR_SRC_SZ 32
+#define DMA_ADR_DST_MSK 0xffffffff
+#define DMA_ADR_DST_I_MSK 0x00000000
+#define DMA_ADR_DST_SFT 0
+#define DMA_ADR_DST_HI 31
+#define DMA_ADR_DST_SZ 32
+#define DMA_SRC_SIZE_MSK 0x00000007
+#define DMA_SRC_SIZE_I_MSK 0xfffffff8
+#define DMA_SRC_SIZE_SFT 0
+#define DMA_SRC_SIZE_HI 2
+#define DMA_SRC_SIZE_SZ 3
+#define DMA_SRC_INC_MSK 0x00000008
+#define DMA_SRC_INC_I_MSK 0xfffffff7
+#define DMA_SRC_INC_SFT 3
+#define DMA_SRC_INC_HI 3
+#define DMA_SRC_INC_SZ 1
+#define DMA_DST_SIZE_MSK 0x00000070
+#define DMA_DST_SIZE_I_MSK 0xffffff8f
+#define DMA_DST_SIZE_SFT 4
+#define DMA_DST_SIZE_HI 6
+#define DMA_DST_SIZE_SZ 3
+#define DMA_DST_INC_MSK 0x00000080
+#define DMA_DST_INC_I_MSK 0xffffff7f
+#define DMA_DST_INC_SFT 7
+#define DMA_DST_INC_HI 7
+#define DMA_DST_INC_SZ 1
+#define DMA_FAST_FILL_MSK 0x00000100
+#define DMA_FAST_FILL_I_MSK 0xfffffeff
+#define DMA_FAST_FILL_SFT 8
+#define DMA_FAST_FILL_HI 8
+#define DMA_FAST_FILL_SZ 1
+#define DMA_SDIO_KICK_MSK 0x00001000
+#define DMA_SDIO_KICK_I_MSK 0xffffefff
+#define DMA_SDIO_KICK_SFT 12
+#define DMA_SDIO_KICK_HI 12
+#define DMA_SDIO_KICK_SZ 1
+#define DMA_BADR_EN_MSK 0x00002000
+#define DMA_BADR_EN_I_MSK 0xffffdfff
+#define DMA_BADR_EN_SFT 13
+#define DMA_BADR_EN_HI 13
+#define DMA_BADR_EN_SZ 1
+#define DMA_LEN_MSK 0xffff0000
+#define DMA_LEN_I_MSK 0x0000ffff
+#define DMA_LEN_SFT 16
+#define DMA_LEN_HI 31
+#define DMA_LEN_SZ 16
+#define DMA_INT_MASK_MSK 0x00000001
+#define DMA_INT_MASK_I_MSK 0xfffffffe
+#define DMA_INT_MASK_SFT 0
+#define DMA_INT_MASK_HI 0
+#define DMA_INT_MASK_SZ 1
+#define DMA_STS_MSK 0x00000100
+#define DMA_STS_I_MSK 0xfffffeff
+#define DMA_STS_SFT 8
+#define DMA_STS_HI 8
+#define DMA_STS_SZ 1
+#define DMA_FINISH_MSK 0x80000000
+#define DMA_FINISH_I_MSK 0x7fffffff
+#define DMA_FINISH_SFT 31
+#define DMA_FINISH_HI 31
+#define DMA_FINISH_SZ 1
+#define DMA_CONST_MSK 0xffffffff
+#define DMA_CONST_I_MSK 0x00000000
+#define DMA_CONST_SFT 0
+#define DMA_CONST_HI 31
+#define DMA_CONST_SZ 32
+#define SLEEP_WAKE_CNT_MSK 0x00ffffff
+#define SLEEP_WAKE_CNT_I_MSK 0xff000000
+#define SLEEP_WAKE_CNT_SFT 0
+#define SLEEP_WAKE_CNT_HI 23
+#define SLEEP_WAKE_CNT_SZ 24
+#define RG_DLDO_LEVEL_MSK 0x07000000
+#define RG_DLDO_LEVEL_I_MSK 0xf8ffffff
+#define RG_DLDO_LEVEL_SFT 24
+#define RG_DLDO_LEVEL_HI 26
+#define RG_DLDO_LEVEL_SZ 3
+#define RG_DLDO_BOOST_IQ_MSK 0x08000000
+#define RG_DLDO_BOOST_IQ_I_MSK 0xf7ffffff
+#define RG_DLDO_BOOST_IQ_SFT 27
+#define RG_DLDO_BOOST_IQ_HI 27
+#define RG_DLDO_BOOST_IQ_SZ 1
+#define RG_BUCK_LEVEL_MSK 0x70000000
+#define RG_BUCK_LEVEL_I_MSK 0x8fffffff
+#define RG_BUCK_LEVEL_SFT 28
+#define RG_BUCK_LEVEL_HI 30
+#define RG_BUCK_LEVEL_SZ 3
+#define RG_BUCK_VREF_SEL_MSK 0x80000000
+#define RG_BUCK_VREF_SEL_I_MSK 0x7fffffff
+#define RG_BUCK_VREF_SEL_SFT 31
+#define RG_BUCK_VREF_SEL_HI 31
+#define RG_BUCK_VREF_SEL_SZ 1
+#define RG_RTC_OSC_RES_SW_MANUAL_MSK 0x000003ff
+#define RG_RTC_OSC_RES_SW_MANUAL_I_MSK 0xfffffc00
+#define RG_RTC_OSC_RES_SW_MANUAL_SFT 0
+#define RG_RTC_OSC_RES_SW_MANUAL_HI 9
+#define RG_RTC_OSC_RES_SW_MANUAL_SZ 10
+#define RG_RTC_OSC_RES_SW_MSK 0x03ff0000
+#define RG_RTC_OSC_RES_SW_I_MSK 0xfc00ffff
+#define RG_RTC_OSC_RES_SW_SFT 16
+#define RG_RTC_OSC_RES_SW_HI 25
+#define RG_RTC_OSC_RES_SW_SZ 10
+#define RTC_OSC_CAL_RES_RDY_MSK 0x80000000
+#define RTC_OSC_CAL_RES_RDY_I_MSK 0x7fffffff
+#define RTC_OSC_CAL_RES_RDY_SFT 31
+#define RTC_OSC_CAL_RES_RDY_HI 31
+#define RTC_OSC_CAL_RES_RDY_SZ 1
+#define RG_DCDC_MODE_MSK 0x00000001
+#define RG_DCDC_MODE_I_MSK 0xfffffffe
+#define RG_DCDC_MODE_SFT 0
+#define RG_DCDC_MODE_HI 0
+#define RG_DCDC_MODE_SZ 1
+#define RG_BUCK_EN_PSM_MSK 0x00000010
+#define RG_BUCK_EN_PSM_I_MSK 0xffffffef
+#define RG_BUCK_EN_PSM_SFT 4
+#define RG_BUCK_EN_PSM_HI 4
+#define RG_BUCK_EN_PSM_SZ 1
+#define RG_BUCK_PSM_VTH_MSK 0x00000100
+#define RG_BUCK_PSM_VTH_I_MSK 0xfffffeff
+#define RG_BUCK_PSM_VTH_SFT 8
+#define RG_BUCK_PSM_VTH_HI 8
+#define RG_BUCK_PSM_VTH_SZ 1
+#define RG_RTC_OSC_RES_SW_MANUAL_EN_MSK 0x00001000
+#define RG_RTC_OSC_RES_SW_MANUAL_EN_I_MSK 0xffffefff
+#define RG_RTC_OSC_RES_SW_MANUAL_EN_SFT 12
+#define RG_RTC_OSC_RES_SW_MANUAL_EN_HI 12
+#define RG_RTC_OSC_RES_SW_MANUAL_EN_SZ 1
+#define RG_RTC_RDY_DEGLITCH_TIMER_MSK 0x00006000
+#define RG_RTC_RDY_DEGLITCH_TIMER_I_MSK 0xffff9fff
+#define RG_RTC_RDY_DEGLITCH_TIMER_SFT 13
+#define RG_RTC_RDY_DEGLITCH_TIMER_HI 14
+#define RG_RTC_RDY_DEGLITCH_TIMER_SZ 2
+#define RTC_CAL_ENA_MSK 0x00010000
+#define RTC_CAL_ENA_I_MSK 0xfffeffff
+#define RTC_CAL_ENA_SFT 16
+#define RTC_CAL_ENA_HI 16
+#define RTC_CAL_ENA_SZ 1
+#define PMU_WAKE_TRIG_EVENT_MSK 0x00000003
+#define PMU_WAKE_TRIG_EVENT_I_MSK 0xfffffffc
+#define PMU_WAKE_TRIG_EVENT_SFT 0
+#define PMU_WAKE_TRIG_EVENT_HI 1
+#define PMU_WAKE_TRIG_EVENT_SZ 2
+#define DIGI_TOP_POR_MASK_MSK 0x00000010
+#define DIGI_TOP_POR_MASK_I_MSK 0xffffffef
+#define DIGI_TOP_POR_MASK_SFT 4
+#define DIGI_TOP_POR_MASK_HI 4
+#define DIGI_TOP_POR_MASK_SZ 1
+#define PMU_ENTER_SLEEP_MODE_MSK 0x00000100
+#define PMU_ENTER_SLEEP_MODE_I_MSK 0xfffffeff
+#define PMU_ENTER_SLEEP_MODE_SFT 8
+#define PMU_ENTER_SLEEP_MODE_HI 8
+#define PMU_ENTER_SLEEP_MODE_SZ 1
+#define RG_RTC_DUMMIES_MSK 0xffff0000
+#define RG_RTC_DUMMIES_I_MSK 0x0000ffff
+#define RG_RTC_DUMMIES_SFT 16
+#define RG_RTC_DUMMIES_HI 31
+#define RG_RTC_DUMMIES_SZ 16
+#define RTC_EN_MSK 0x00000001
+#define RTC_EN_I_MSK 0xfffffffe
+#define RTC_EN_SFT 0
+#define RTC_EN_HI 0
+#define RTC_EN_SZ 1
+#define RTC_SRC_MSK 0x00000002
+#define RTC_SRC_I_MSK 0xfffffffd
+#define RTC_SRC_SFT 1
+#define RTC_SRC_HI 1
+#define RTC_SRC_SZ 1
+#define RTC_TICK_CNT_MSK 0x7fff0000
+#define RTC_TICK_CNT_I_MSK 0x8000ffff
+#define RTC_TICK_CNT_SFT 16
+#define RTC_TICK_CNT_HI 30
+#define RTC_TICK_CNT_SZ 15
+#define RTC_INT_SEC_MASK_MSK 0x00000001
+#define RTC_INT_SEC_MASK_I_MSK 0xfffffffe
+#define RTC_INT_SEC_MASK_SFT 0
+#define RTC_INT_SEC_MASK_HI 0
+#define RTC_INT_SEC_MASK_SZ 1
+#define RTC_INT_ALARM_MASK_MSK 0x00000002
+#define RTC_INT_ALARM_MASK_I_MSK 0xfffffffd
+#define RTC_INT_ALARM_MASK_SFT 1
+#define RTC_INT_ALARM_MASK_HI 1
+#define RTC_INT_ALARM_MASK_SZ 1
+#define RTC_INT_SEC_MSK 0x00010000
+#define RTC_INT_SEC_I_MSK 0xfffeffff
+#define RTC_INT_SEC_SFT 16
+#define RTC_INT_SEC_HI 16
+#define RTC_INT_SEC_SZ 1
+#define RTC_INT_ALARM_MSK 0x00020000
+#define RTC_INT_ALARM_I_MSK 0xfffdffff
+#define RTC_INT_ALARM_SFT 17
+#define RTC_INT_ALARM_HI 17
+#define RTC_INT_ALARM_SZ 1
+#define RTC_SEC_START_CNT_MSK 0xffffffff
+#define RTC_SEC_START_CNT_I_MSK 0x00000000
+#define RTC_SEC_START_CNT_SFT 0
+#define RTC_SEC_START_CNT_HI 31
+#define RTC_SEC_START_CNT_SZ 32
+#define RTC_SEC_CNT_MSK 0xffffffff
+#define RTC_SEC_CNT_I_MSK 0x00000000
+#define RTC_SEC_CNT_SFT 0
+#define RTC_SEC_CNT_HI 31
+#define RTC_SEC_CNT_SZ 32
+#define RTC_SEC_ALARM_VALUE_MSK 0xffffffff
+#define RTC_SEC_ALARM_VALUE_I_MSK 0x00000000
+#define RTC_SEC_ALARM_VALUE_SFT 0
+#define RTC_SEC_ALARM_VALUE_HI 31
+#define RTC_SEC_ALARM_VALUE_SZ 32
+#define D2_DMA_ADR_SRC_MSK 0xffffffff
+#define D2_DMA_ADR_SRC_I_MSK 0x00000000
+#define D2_DMA_ADR_SRC_SFT 0
+#define D2_DMA_ADR_SRC_HI 31
+#define D2_DMA_ADR_SRC_SZ 32
+#define D2_DMA_ADR_DST_MSK 0xffffffff
+#define D2_DMA_ADR_DST_I_MSK 0x00000000
+#define D2_DMA_ADR_DST_SFT 0
+#define D2_DMA_ADR_DST_HI 31
+#define D2_DMA_ADR_DST_SZ 32
+#define D2_DMA_SRC_SIZE_MSK 0x00000007
+#define D2_DMA_SRC_SIZE_I_MSK 0xfffffff8
+#define D2_DMA_SRC_SIZE_SFT 0
+#define D2_DMA_SRC_SIZE_HI 2
+#define D2_DMA_SRC_SIZE_SZ 3
+#define D2_DMA_SRC_INC_MSK 0x00000008
+#define D2_DMA_SRC_INC_I_MSK 0xfffffff7
+#define D2_DMA_SRC_INC_SFT 3
+#define D2_DMA_SRC_INC_HI 3
+#define D2_DMA_SRC_INC_SZ 1
+#define D2_DMA_DST_SIZE_MSK 0x00000070
+#define D2_DMA_DST_SIZE_I_MSK 0xffffff8f
+#define D2_DMA_DST_SIZE_SFT 4
+#define D2_DMA_DST_SIZE_HI 6
+#define D2_DMA_DST_SIZE_SZ 3
+#define D2_DMA_DST_INC_MSK 0x00000080
+#define D2_DMA_DST_INC_I_MSK 0xffffff7f
+#define D2_DMA_DST_INC_SFT 7
+#define D2_DMA_DST_INC_HI 7
+#define D2_DMA_DST_INC_SZ 1
+#define D2_DMA_FAST_FILL_MSK 0x00000100
+#define D2_DMA_FAST_FILL_I_MSK 0xfffffeff
+#define D2_DMA_FAST_FILL_SFT 8
+#define D2_DMA_FAST_FILL_HI 8
+#define D2_DMA_FAST_FILL_SZ 1
+#define D2_DMA_SDIO_KICK_MSK 0x00001000
+#define D2_DMA_SDIO_KICK_I_MSK 0xffffefff
+#define D2_DMA_SDIO_KICK_SFT 12
+#define D2_DMA_SDIO_KICK_HI 12
+#define D2_DMA_SDIO_KICK_SZ 1
+#define D2_DMA_BADR_EN_MSK 0x00002000
+#define D2_DMA_BADR_EN_I_MSK 0xffffdfff
+#define D2_DMA_BADR_EN_SFT 13
+#define D2_DMA_BADR_EN_HI 13
+#define D2_DMA_BADR_EN_SZ 1
+#define D2_DMA_LEN_MSK 0xffff0000
+#define D2_DMA_LEN_I_MSK 0x0000ffff
+#define D2_DMA_LEN_SFT 16
+#define D2_DMA_LEN_HI 31
+#define D2_DMA_LEN_SZ 16
+#define D2_DMA_INT_MASK_MSK 0x00000001
+#define D2_DMA_INT_MASK_I_MSK 0xfffffffe
+#define D2_DMA_INT_MASK_SFT 0
+#define D2_DMA_INT_MASK_HI 0
+#define D2_DMA_INT_MASK_SZ 1
+#define D2_DMA_STS_MSK 0x00000100
+#define D2_DMA_STS_I_MSK 0xfffffeff
+#define D2_DMA_STS_SFT 8
+#define D2_DMA_STS_HI 8
+#define D2_DMA_STS_SZ 1
+#define D2_DMA_FINISH_MSK 0x80000000
+#define D2_DMA_FINISH_I_MSK 0x7fffffff
+#define D2_DMA_FINISH_SFT 31
+#define D2_DMA_FINISH_HI 31
+#define D2_DMA_FINISH_SZ 1
+#define D2_DMA_CONST_MSK 0xffffffff
+#define D2_DMA_CONST_I_MSK 0x00000000
+#define D2_DMA_CONST_SFT 0
+#define D2_DMA_CONST_HI 31
+#define D2_DMA_CONST_SZ 32
+#define TRAP_UNKNOWN_TYPE_MSK 0x00000001
+#define TRAP_UNKNOWN_TYPE_I_MSK 0xfffffffe
+#define TRAP_UNKNOWN_TYPE_SFT 0
+#define TRAP_UNKNOWN_TYPE_HI 0
+#define TRAP_UNKNOWN_TYPE_SZ 1
+#define TX_ON_DEMAND_ENA_MSK 0x00000002
+#define TX_ON_DEMAND_ENA_I_MSK 0xfffffffd
+#define TX_ON_DEMAND_ENA_SFT 1
+#define TX_ON_DEMAND_ENA_HI 1
+#define TX_ON_DEMAND_ENA_SZ 1
+#define RX_2_HOST_MSK 0x00000004
+#define RX_2_HOST_I_MSK 0xfffffffb
+#define RX_2_HOST_SFT 2
+#define RX_2_HOST_HI 2
+#define RX_2_HOST_SZ 1
+#define AUTO_SEQNO_MSK 0x00000008
+#define AUTO_SEQNO_I_MSK 0xfffffff7
+#define AUTO_SEQNO_SFT 3
+#define AUTO_SEQNO_HI 3
+#define AUTO_SEQNO_SZ 1
+#define BYPASSS_TX_PARSER_ENCAP_MSK 0x00000010
+#define BYPASSS_TX_PARSER_ENCAP_I_MSK 0xffffffef
+#define BYPASSS_TX_PARSER_ENCAP_SFT 4
+#define BYPASSS_TX_PARSER_ENCAP_HI 4
+#define BYPASSS_TX_PARSER_ENCAP_SZ 1
+#define HDR_STRIP_MSK 0x00000020
+#define HDR_STRIP_I_MSK 0xffffffdf
+#define HDR_STRIP_SFT 5
+#define HDR_STRIP_HI 5
+#define HDR_STRIP_SZ 1
+#define ERP_PROTECT_MSK 0x000000c0
+#define ERP_PROTECT_I_MSK 0xffffff3f
+#define ERP_PROTECT_SFT 6
+#define ERP_PROTECT_HI 7
+#define ERP_PROTECT_SZ 2
+#define PRO_VER_MSK 0x00000300
+#define PRO_VER_I_MSK 0xfffffcff
+#define PRO_VER_SFT 8
+#define PRO_VER_HI 9
+#define PRO_VER_SZ 2
+#define TXQ_ID0_MSK 0x00007000
+#define TXQ_ID0_I_MSK 0xffff8fff
+#define TXQ_ID0_SFT 12
+#define TXQ_ID0_HI 14
+#define TXQ_ID0_SZ 3
+#define TXQ_ID1_MSK 0x00070000
+#define TXQ_ID1_I_MSK 0xfff8ffff
+#define TXQ_ID1_SFT 16
+#define TXQ_ID1_HI 18
+#define TXQ_ID1_SZ 3
+#define TX_ETHER_TRAP_EN_MSK 0x00100000
+#define TX_ETHER_TRAP_EN_I_MSK 0xffefffff
+#define TX_ETHER_TRAP_EN_SFT 20
+#define TX_ETHER_TRAP_EN_HI 20
+#define TX_ETHER_TRAP_EN_SZ 1
+#define RX_ETHER_TRAP_EN_MSK 0x00200000
+#define RX_ETHER_TRAP_EN_I_MSK 0xffdfffff
+#define RX_ETHER_TRAP_EN_SFT 21
+#define RX_ETHER_TRAP_EN_HI 21
+#define RX_ETHER_TRAP_EN_SZ 1
+#define RX_NULL_TRAP_EN_MSK 0x00400000
+#define RX_NULL_TRAP_EN_I_MSK 0xffbfffff
+#define RX_NULL_TRAP_EN_SFT 22
+#define RX_NULL_TRAP_EN_HI 22
+#define RX_NULL_TRAP_EN_SZ 1
+#define RX_GET_TX_QUEUE_EN_MSK 0x02000000
+#define RX_GET_TX_QUEUE_EN_I_MSK 0xfdffffff
+#define RX_GET_TX_QUEUE_EN_SFT 25
+#define RX_GET_TX_QUEUE_EN_HI 25
+#define RX_GET_TX_QUEUE_EN_SZ 1
+#define HCI_INQ_SEL_MSK 0x04000000
+#define HCI_INQ_SEL_I_MSK 0xfbffffff
+#define HCI_INQ_SEL_SFT 26
+#define HCI_INQ_SEL_HI 26
+#define HCI_INQ_SEL_SZ 1
+#define TRX_DEBUG_CNT_ENA_MSK 0x10000000
+#define TRX_DEBUG_CNT_ENA_I_MSK 0xefffffff
+#define TRX_DEBUG_CNT_ENA_SFT 28
+#define TRX_DEBUG_CNT_ENA_HI 28
+#define TRX_DEBUG_CNT_ENA_SZ 1
+#define WAKE_SOON_WITH_SCK_MSK 0x00000001
+#define WAKE_SOON_WITH_SCK_I_MSK 0xfffffffe
+#define WAKE_SOON_WITH_SCK_SFT 0
+#define WAKE_SOON_WITH_SCK_HI 0
+#define WAKE_SOON_WITH_SCK_SZ 1
+#define TX_FLOW_CTRL_MSK 0x0000ffff
+#define TX_FLOW_CTRL_I_MSK 0xffff0000
+#define TX_FLOW_CTRL_SFT 0
+#define TX_FLOW_CTRL_HI 15
+#define TX_FLOW_CTRL_SZ 16
+#define TX_FLOW_MGMT_MSK 0xffff0000
+#define TX_FLOW_MGMT_I_MSK 0x0000ffff
+#define TX_FLOW_MGMT_SFT 16
+#define TX_FLOW_MGMT_HI 31
+#define TX_FLOW_MGMT_SZ 16
+#define TX_FLOW_DATA_MSK 0xffffffff
+#define TX_FLOW_DATA_I_MSK 0x00000000
+#define TX_FLOW_DATA_SFT 0
+#define TX_FLOW_DATA_HI 31
+#define TX_FLOW_DATA_SZ 32
+#define DOT11RTSTHRESHOLD_MSK 0xffff0000
+#define DOT11RTSTHRESHOLD_I_MSK 0x0000ffff
+#define DOT11RTSTHRESHOLD_SFT 16
+#define DOT11RTSTHRESHOLD_HI 31
+#define DOT11RTSTHRESHOLD_SZ 16
+#define TXF_ID_MSK 0x0000003f
+#define TXF_ID_I_MSK 0xffffffc0
+#define TXF_ID_SFT 0
+#define TXF_ID_HI 5
+#define TXF_ID_SZ 6
+#define SEQ_CTRL_MSK 0x0000ffff
+#define SEQ_CTRL_I_MSK 0xffff0000
+#define SEQ_CTRL_SFT 0
+#define SEQ_CTRL_HI 15
+#define SEQ_CTRL_SZ 16
+#define TX_PBOFFSET_MSK 0x000000ff
+#define TX_PBOFFSET_I_MSK 0xffffff00
+#define TX_PBOFFSET_SFT 0
+#define TX_PBOFFSET_HI 7
+#define TX_PBOFFSET_SZ 8
+#define TX_INFO_SIZE_MSK 0x0000ff00
+#define TX_INFO_SIZE_I_MSK 0xffff00ff
+#define TX_INFO_SIZE_SFT 8
+#define TX_INFO_SIZE_HI 15
+#define TX_INFO_SIZE_SZ 8
+#define RX_INFO_SIZE_MSK 0x00ff0000
+#define RX_INFO_SIZE_I_MSK 0xff00ffff
+#define RX_INFO_SIZE_SFT 16
+#define RX_INFO_SIZE_HI 23
+#define RX_INFO_SIZE_SZ 8
+#define RX_LAST_PHY_SIZE_MSK 0xff000000
+#define RX_LAST_PHY_SIZE_I_MSK 0x00ffffff
+#define RX_LAST_PHY_SIZE_SFT 24
+#define RX_LAST_PHY_SIZE_HI 31
+#define RX_LAST_PHY_SIZE_SZ 8
+#define TX_INFO_CLEAR_SIZE_MSK 0x0000003f
+#define TX_INFO_CLEAR_SIZE_I_MSK 0xffffffc0
+#define TX_INFO_CLEAR_SIZE_SFT 0
+#define TX_INFO_CLEAR_SIZE_HI 5
+#define TX_INFO_CLEAR_SIZE_SZ 6
+#define TX_INFO_CLEAR_ENABLE_MSK 0x00000100
+#define TX_INFO_CLEAR_ENABLE_I_MSK 0xfffffeff
+#define TX_INFO_CLEAR_ENABLE_SFT 8
+#define TX_INFO_CLEAR_ENABLE_HI 8
+#define TX_INFO_CLEAR_ENABLE_SZ 1
+#define TXTRAP_ETHTYPE1_MSK 0x0000ffff
+#define TXTRAP_ETHTYPE1_I_MSK 0xffff0000
+#define TXTRAP_ETHTYPE1_SFT 0
+#define TXTRAP_ETHTYPE1_HI 15
+#define TXTRAP_ETHTYPE1_SZ 16
+#define TXTRAP_ETHTYPE0_MSK 0xffff0000
+#define TXTRAP_ETHTYPE0_I_MSK 0x0000ffff
+#define TXTRAP_ETHTYPE0_SFT 16
+#define TXTRAP_ETHTYPE0_HI 31
+#define TXTRAP_ETHTYPE0_SZ 16
+#define RXTRAP_ETHTYPE1_MSK 0x0000ffff
+#define RXTRAP_ETHTYPE1_I_MSK 0xffff0000
+#define RXTRAP_ETHTYPE1_SFT 0
+#define RXTRAP_ETHTYPE1_HI 15
+#define RXTRAP_ETHTYPE1_SZ 16
+#define RXTRAP_ETHTYPE0_MSK 0xffff0000
+#define RXTRAP_ETHTYPE0_I_MSK 0x0000ffff
+#define RXTRAP_ETHTYPE0_SFT 16
+#define RXTRAP_ETHTYPE0_HI 31
+#define RXTRAP_ETHTYPE0_SZ 16
+#define TX_PKT_COUNTER_MSK 0xffffffff
+#define TX_PKT_COUNTER_I_MSK 0x00000000
+#define TX_PKT_COUNTER_SFT 0
+#define TX_PKT_COUNTER_HI 31
+#define TX_PKT_COUNTER_SZ 32
+#define RX_PKT_COUNTER_MSK 0xffffffff
+#define RX_PKT_COUNTER_I_MSK 0x00000000
+#define RX_PKT_COUNTER_SFT 0
+#define RX_PKT_COUNTER_HI 31
+#define RX_PKT_COUNTER_SZ 32
+#define HOST_CMD_COUNTER_MSK 0x000000ff
+#define HOST_CMD_COUNTER_I_MSK 0xffffff00
+#define HOST_CMD_COUNTER_SFT 0
+#define HOST_CMD_COUNTER_HI 7
+#define HOST_CMD_COUNTER_SZ 8
+#define HOST_EVENT_COUNTER_MSK 0x000000ff
+#define HOST_EVENT_COUNTER_I_MSK 0xffffff00
+#define HOST_EVENT_COUNTER_SFT 0
+#define HOST_EVENT_COUNTER_HI 7
+#define HOST_EVENT_COUNTER_SZ 8
+#define TX_PKT_DROP_COUNTER_MSK 0x000000ff
+#define TX_PKT_DROP_COUNTER_I_MSK 0xffffff00
+#define TX_PKT_DROP_COUNTER_SFT 0
+#define TX_PKT_DROP_COUNTER_HI 7
+#define TX_PKT_DROP_COUNTER_SZ 8
+#define RX_PKT_DROP_COUNTER_MSK 0x000000ff
+#define RX_PKT_DROP_COUNTER_I_MSK 0xffffff00
+#define RX_PKT_DROP_COUNTER_SFT 0
+#define RX_PKT_DROP_COUNTER_HI 7
+#define RX_PKT_DROP_COUNTER_SZ 8
+#define TX_PKT_TRAP_COUNTER_MSK 0x000000ff
+#define TX_PKT_TRAP_COUNTER_I_MSK 0xffffff00
+#define TX_PKT_TRAP_COUNTER_SFT 0
+#define TX_PKT_TRAP_COUNTER_HI 7
+#define TX_PKT_TRAP_COUNTER_SZ 8
+#define RX_PKT_TRAP_COUNTER_MSK 0x000000ff
+#define RX_PKT_TRAP_COUNTER_I_MSK 0xffffff00
+#define RX_PKT_TRAP_COUNTER_SFT 0
+#define RX_PKT_TRAP_COUNTER_HI 7
+#define RX_PKT_TRAP_COUNTER_SZ 8
+#define HOST_TX_FAIL_COUNTER_MSK 0x000000ff
+#define HOST_TX_FAIL_COUNTER_I_MSK 0xffffff00
+#define HOST_TX_FAIL_COUNTER_SFT 0
+#define HOST_TX_FAIL_COUNTER_HI 7
+#define HOST_TX_FAIL_COUNTER_SZ 8
+#define HOST_RX_FAIL_COUNTER_MSK 0x000000ff
+#define HOST_RX_FAIL_COUNTER_I_MSK 0xffffff00
+#define HOST_RX_FAIL_COUNTER_SFT 0
+#define HOST_RX_FAIL_COUNTER_HI 7
+#define HOST_RX_FAIL_COUNTER_SZ 8
+#define HCI_STATE_MONITOR_MSK 0xffffffff
+#define HCI_STATE_MONITOR_I_MSK 0x00000000
+#define HCI_STATE_MONITOR_SFT 0
+#define HCI_STATE_MONITOR_HI 31
+#define HCI_STATE_MONITOR_SZ 32
+#define HCI_ST_TIMEOUT_MONITOR_MSK 0xffffffff
+#define HCI_ST_TIMEOUT_MONITOR_I_MSK 0x00000000
+#define HCI_ST_TIMEOUT_MONITOR_SFT 0
+#define HCI_ST_TIMEOUT_MONITOR_HI 31
+#define HCI_ST_TIMEOUT_MONITOR_SZ 32
+#define TX_ON_DEMAND_LENGTH_MSK 0xffffffff
+#define TX_ON_DEMAND_LENGTH_I_MSK 0x00000000
+#define TX_ON_DEMAND_LENGTH_SFT 0
+#define TX_ON_DEMAND_LENGTH_HI 31
+#define TX_ON_DEMAND_LENGTH_SZ 32
+#define HCI_MONITOR_REG1_MSK 0xffffffff
+#define HCI_MONITOR_REG1_I_MSK 0x00000000
+#define HCI_MONITOR_REG1_SFT 0
+#define HCI_MONITOR_REG1_HI 31
+#define HCI_MONITOR_REG1_SZ 32
+#define HCI_MONITOR_REG2_MSK 0xffffffff
+#define HCI_MONITOR_REG2_I_MSK 0x00000000
+#define HCI_MONITOR_REG2_SFT 0
+#define HCI_MONITOR_REG2_HI 31
+#define HCI_MONITOR_REG2_SZ 32
+#define HCI_TX_ALLOC_TIME_31_0_MSK 0xffffffff
+#define HCI_TX_ALLOC_TIME_31_0_I_MSK 0x00000000
+#define HCI_TX_ALLOC_TIME_31_0_SFT 0
+#define HCI_TX_ALLOC_TIME_31_0_HI 31
+#define HCI_TX_ALLOC_TIME_31_0_SZ 32
+#define HCI_TX_ALLOC_TIME_47_32_MSK 0x0000ffff
+#define HCI_TX_ALLOC_TIME_47_32_I_MSK 0xffff0000
+#define HCI_TX_ALLOC_TIME_47_32_SFT 0
+#define HCI_TX_ALLOC_TIME_47_32_HI 15
+#define HCI_TX_ALLOC_TIME_47_32_SZ 16
+#define HCI_MB_MAX_CNT_MSK 0x00ff0000
+#define HCI_MB_MAX_CNT_I_MSK 0xff00ffff
+#define HCI_MB_MAX_CNT_SFT 16
+#define HCI_MB_MAX_CNT_HI 23
+#define HCI_MB_MAX_CNT_SZ 8
+#define HCI_TX_ALLOC_CNT_31_0_MSK 0xffffffff
+#define HCI_TX_ALLOC_CNT_31_0_I_MSK 0x00000000
+#define HCI_TX_ALLOC_CNT_31_0_SFT 0
+#define HCI_TX_ALLOC_CNT_31_0_HI 31
+#define HCI_TX_ALLOC_CNT_31_0_SZ 32
+#define HCI_TX_ALLOC_CNT_47_32_MSK 0x0000ffff
+#define HCI_TX_ALLOC_CNT_47_32_I_MSK 0xffff0000
+#define HCI_TX_ALLOC_CNT_47_32_SFT 0
+#define HCI_TX_ALLOC_CNT_47_32_HI 15
+#define HCI_TX_ALLOC_CNT_47_32_SZ 16
+#define HCI_PROC_CNT_MSK 0x00ff0000
+#define HCI_PROC_CNT_I_MSK 0xff00ffff
+#define HCI_PROC_CNT_SFT 16
+#define HCI_PROC_CNT_HI 23
+#define HCI_PROC_CNT_SZ 8
+#define SDIO_TRANS_CNT_MSK 0xff000000
+#define SDIO_TRANS_CNT_I_MSK 0x00ffffff
+#define SDIO_TRANS_CNT_SFT 24
+#define SDIO_TRANS_CNT_HI 31
+#define SDIO_TRANS_CNT_SZ 8
+#define SDIO_TX_INVALID_CNT_31_0_MSK 0xffffffff
+#define SDIO_TX_INVALID_CNT_31_0_I_MSK 0x00000000
+#define SDIO_TX_INVALID_CNT_31_0_SFT 0
+#define SDIO_TX_INVALID_CNT_31_0_HI 31
+#define SDIO_TX_INVALID_CNT_31_0_SZ 32
+#define SDIO_TX_INVALID_CNT_47_32_MSK 0x0000ffff
+#define SDIO_TX_INVALID_CNT_47_32_I_MSK 0xffff0000
+#define SDIO_TX_INVALID_CNT_47_32_SFT 0
+#define SDIO_TX_INVALID_CNT_47_32_HI 15
+#define SDIO_TX_INVALID_CNT_47_32_SZ 16
+#define CS_START_ADDR_MSK 0x0000ffff
+#define CS_START_ADDR_I_MSK 0xffff0000
+#define CS_START_ADDR_SFT 0
+#define CS_START_ADDR_HI 15
+#define CS_START_ADDR_SZ 16
+#define CS_PKT_ID_MSK 0x007f0000
+#define CS_PKT_ID_I_MSK 0xff80ffff
+#define CS_PKT_ID_SFT 16
+#define CS_PKT_ID_HI 22
+#define CS_PKT_ID_SZ 7
+#define ADD_LEN_MSK 0x0000ffff
+#define ADD_LEN_I_MSK 0xffff0000
+#define ADD_LEN_SFT 0
+#define ADD_LEN_HI 15
+#define ADD_LEN_SZ 16
+#define CS_ADDER_EN_MSK 0x00000001
+#define CS_ADDER_EN_I_MSK 0xfffffffe
+#define CS_ADDER_EN_SFT 0
+#define CS_ADDER_EN_HI 0
+#define CS_ADDER_EN_SZ 1
+#define PSEUDO_MSK 0x00000002
+#define PSEUDO_I_MSK 0xfffffffd
+#define PSEUDO_SFT 1
+#define PSEUDO_HI 1
+#define PSEUDO_SZ 1
+#define CALCULATE_MSK 0xffffffff
+#define CALCULATE_I_MSK 0x00000000
+#define CALCULATE_SFT 0
+#define CALCULATE_HI 31
+#define CALCULATE_SZ 32
+#define L4_LEN_MSK 0x0000ffff
+#define L4_LEN_I_MSK 0xffff0000
+#define L4_LEN_SFT 0
+#define L4_LEN_HI 15
+#define L4_LEN_SZ 16
+#define L4_PROTOL_MSK 0x00ff0000
+#define L4_PROTOL_I_MSK 0xff00ffff
+#define L4_PROTOL_SFT 16
+#define L4_PROTOL_HI 23
+#define L4_PROTOL_SZ 8
+#define CHECK_SUM_MSK 0x0000ffff
+#define CHECK_SUM_I_MSK 0xffff0000
+#define CHECK_SUM_SFT 0
+#define CHECK_SUM_HI 15
+#define CHECK_SUM_SZ 16
+#define RAND_EN_MSK 0x00000001
+#define RAND_EN_I_MSK 0xfffffffe
+#define RAND_EN_SFT 0
+#define RAND_EN_HI 0
+#define RAND_EN_SZ 1
+#define RAND_NUM_MSK 0xffffffff
+#define RAND_NUM_I_MSK 0x00000000
+#define RAND_NUM_SFT 0
+#define RAND_NUM_HI 31
+#define RAND_NUM_SZ 32
+#define MUL_OP1_MSK 0xffffffff
+#define MUL_OP1_I_MSK 0x00000000
+#define MUL_OP1_SFT 0
+#define MUL_OP1_HI 31
+#define MUL_OP1_SZ 32
+#define MUL_OP2_MSK 0xffffffff
+#define MUL_OP2_I_MSK 0x00000000
+#define MUL_OP2_SFT 0
+#define MUL_OP2_HI 31
+#define MUL_OP2_SZ 32
+#define MUL_ANS0_MSK 0xffffffff
+#define MUL_ANS0_I_MSK 0x00000000
+#define MUL_ANS0_SFT 0
+#define MUL_ANS0_HI 31
+#define MUL_ANS0_SZ 32
+#define MUL_ANS1_MSK 0xffffffff
+#define MUL_ANS1_I_MSK 0x00000000
+#define MUL_ANS1_SFT 0
+#define MUL_ANS1_HI 31
+#define MUL_ANS1_SZ 32
+#define RD_ADDR_MSK 0x0000ffff
+#define RD_ADDR_I_MSK 0xffff0000
+#define RD_ADDR_SFT 0
+#define RD_ADDR_HI 15
+#define RD_ADDR_SZ 16
+#define RD_ID_MSK 0x007f0000
+#define RD_ID_I_MSK 0xff80ffff
+#define RD_ID_SFT 16
+#define RD_ID_HI 22
+#define RD_ID_SZ 7
+#define WR_ADDR_MSK 0x0000ffff
+#define WR_ADDR_I_MSK 0xffff0000
+#define WR_ADDR_SFT 0
+#define WR_ADDR_HI 15
+#define WR_ADDR_SZ 16
+#define WR_ID_MSK 0x007f0000
+#define WR_ID_I_MSK 0xff80ffff
+#define WR_ID_SFT 16
+#define WR_ID_HI 22
+#define WR_ID_SZ 7
+#define LEN_MSK 0x0000ffff
+#define LEN_I_MSK 0xffff0000
+#define LEN_SFT 0
+#define LEN_HI 15
+#define LEN_SZ 16
+#define CLR_MSK 0x00000001
+#define CLR_I_MSK 0xfffffffe
+#define CLR_SFT 0
+#define CLR_HI 0
+#define CLR_SZ 1
+#define PHY_MODE_MSK 0x00000003
+#define PHY_MODE_I_MSK 0xfffffffc
+#define PHY_MODE_SFT 0
+#define PHY_MODE_HI 1
+#define PHY_MODE_SZ 2
+#define SHRT_PREAM_MSK 0x00000004
+#define SHRT_PREAM_I_MSK 0xfffffffb
+#define SHRT_PREAM_SFT 2
+#define SHRT_PREAM_HI 2
+#define SHRT_PREAM_SZ 1
+#define SHRT_GI_MSK 0x00000008
+#define SHRT_GI_I_MSK 0xfffffff7
+#define SHRT_GI_SFT 3
+#define SHRT_GI_HI 3
+#define SHRT_GI_SZ 1
+#define DATA_RATE_MSK 0x000007f0
+#define DATA_RATE_I_MSK 0xfffff80f
+#define DATA_RATE_SFT 4
+#define DATA_RATE_HI 10
+#define DATA_RATE_SZ 7
+#define MCS_MSK 0x00007000
+#define MCS_I_MSK 0xffff8fff
+#define MCS_SFT 12
+#define MCS_HI 14
+#define MCS_SZ 3
+#define FRAME_LEN_MSK 0xffff0000
+#define FRAME_LEN_I_MSK 0x0000ffff
+#define FRAME_LEN_SFT 16
+#define FRAME_LEN_HI 31
+#define FRAME_LEN_SZ 16
+#define DURATION_MSK 0x0000ffff
+#define DURATION_I_MSK 0xffff0000
+#define DURATION_SFT 0
+#define DURATION_HI 15
+#define DURATION_SZ 16
+#define SHA_DST_ADDR_MSK 0xffffffff
+#define SHA_DST_ADDR_I_MSK 0x00000000
+#define SHA_DST_ADDR_SFT 0
+#define SHA_DST_ADDR_HI 31
+#define SHA_DST_ADDR_SZ 32
+#define SHA_SRC_ADDR_MSK 0xffffffff
+#define SHA_SRC_ADDR_I_MSK 0x00000000
+#define SHA_SRC_ADDR_SFT 0
+#define SHA_SRC_ADDR_HI 31
+#define SHA_SRC_ADDR_SZ 32
+#define SHA_BUSY_MSK 0x00000001
+#define SHA_BUSY_I_MSK 0xfffffffe
+#define SHA_BUSY_SFT 0
+#define SHA_BUSY_HI 0
+#define SHA_BUSY_SZ 1
+#define SHA_ENDIAN_MSK 0x00000002
+#define SHA_ENDIAN_I_MSK 0xfffffffd
+#define SHA_ENDIAN_SFT 1
+#define SHA_ENDIAN_HI 1
+#define SHA_ENDIAN_SZ 1
+#define EFS_CLKFREQ_MSK 0x00000fff
+#define EFS_CLKFREQ_I_MSK 0xfffff000
+#define EFS_CLKFREQ_SFT 0
+#define EFS_CLKFREQ_HI 11
+#define EFS_CLKFREQ_SZ 12
+#define LOW_ACTIVE_MSK 0x00010000
+#define LOW_ACTIVE_I_MSK 0xfffeffff
+#define LOW_ACTIVE_SFT 16
+#define LOW_ACTIVE_HI 16
+#define LOW_ACTIVE_SZ 1
+#define EFS_CLKFREQ_RD_MSK 0x0ff00000
+#define EFS_CLKFREQ_RD_I_MSK 0xf00fffff
+#define EFS_CLKFREQ_RD_SFT 20
+#define EFS_CLKFREQ_RD_HI 27
+#define EFS_CLKFREQ_RD_SZ 8
+#define EFS_PRE_RD_MSK 0xf0000000
+#define EFS_PRE_RD_I_MSK 0x0fffffff
+#define EFS_PRE_RD_SFT 28
+#define EFS_PRE_RD_HI 31
+#define EFS_PRE_RD_SZ 4
+#define EFS_LDO_ON_MSK 0x0000ffff
+#define EFS_LDO_ON_I_MSK 0xffff0000
+#define EFS_LDO_ON_SFT 0
+#define EFS_LDO_ON_HI 15
+#define EFS_LDO_ON_SZ 16
+#define EFS_LDO_OFF_MSK 0xffff0000
+#define EFS_LDO_OFF_I_MSK 0x0000ffff
+#define EFS_LDO_OFF_SFT 16
+#define EFS_LDO_OFF_HI 31
+#define EFS_LDO_OFF_SZ 16
+#define EFS_RDATA_0_MSK 0xffffffff
+#define EFS_RDATA_0_I_MSK 0x00000000
+#define EFS_RDATA_0_SFT 0
+#define EFS_RDATA_0_HI 31
+#define EFS_RDATA_0_SZ 32
+#define EFS_WDATA_0_MSK 0xffffffff
+#define EFS_WDATA_0_I_MSK 0x00000000
+#define EFS_WDATA_0_SFT 0
+#define EFS_WDATA_0_HI 31
+#define EFS_WDATA_0_SZ 32
+#define EFS_RDATA_1_MSK 0xffffffff
+#define EFS_RDATA_1_I_MSK 0x00000000
+#define EFS_RDATA_1_SFT 0
+#define EFS_RDATA_1_HI 31
+#define EFS_RDATA_1_SZ 32
+#define EFS_WDATA_1_MSK 0xffffffff
+#define EFS_WDATA_1_I_MSK 0x00000000
+#define EFS_WDATA_1_SFT 0
+#define EFS_WDATA_1_HI 31
+#define EFS_WDATA_1_SZ 32
+#define EFS_RDATA_2_MSK 0xffffffff
+#define EFS_RDATA_2_I_MSK 0x00000000
+#define EFS_RDATA_2_SFT 0
+#define EFS_RDATA_2_HI 31
+#define EFS_RDATA_2_SZ 32
+#define EFS_WDATA_2_MSK 0xffffffff
+#define EFS_WDATA_2_I_MSK 0x00000000
+#define EFS_WDATA_2_SFT 0
+#define EFS_WDATA_2_HI 31
+#define EFS_WDATA_2_SZ 32
+#define EFS_RDATA_3_MSK 0xffffffff
+#define EFS_RDATA_3_I_MSK 0x00000000
+#define EFS_RDATA_3_SFT 0
+#define EFS_RDATA_3_HI 31
+#define EFS_RDATA_3_SZ 32
+#define EFS_WDATA_3_MSK 0xffffffff
+#define EFS_WDATA_3_I_MSK 0x00000000
+#define EFS_WDATA_3_SFT 0
+#define EFS_WDATA_3_HI 31
+#define EFS_WDATA_3_SZ 32
+#define EFS_RDATA_4_MSK 0xffffffff
+#define EFS_RDATA_4_I_MSK 0x00000000
+#define EFS_RDATA_4_SFT 0
+#define EFS_RDATA_4_HI 31
+#define EFS_RDATA_4_SZ 32
+#define EFS_WDATA_4_MSK 0xffffffff
+#define EFS_WDATA_4_I_MSK 0x00000000
+#define EFS_WDATA_4_SFT 0
+#define EFS_WDATA_4_HI 31
+#define EFS_WDATA_4_SZ 32
+#define EFS_RDATA_5_MSK 0xffffffff
+#define EFS_RDATA_5_I_MSK 0x00000000
+#define EFS_RDATA_5_SFT 0
+#define EFS_RDATA_5_HI 31
+#define EFS_RDATA_5_SZ 32
+#define EFS_WDATA_5_MSK 0xffffffff
+#define EFS_WDATA_5_I_MSK 0x00000000
+#define EFS_WDATA_5_SFT 0
+#define EFS_WDATA_5_HI 31
+#define EFS_WDATA_5_SZ 32
+#define EFS_RDATA_6_MSK 0xffffffff
+#define EFS_RDATA_6_I_MSK 0x00000000
+#define EFS_RDATA_6_SFT 0
+#define EFS_RDATA_6_HI 31
+#define EFS_RDATA_6_SZ 32
+#define EFS_WDATA_6_MSK 0xffffffff
+#define EFS_WDATA_6_I_MSK 0x00000000
+#define EFS_WDATA_6_SFT 0
+#define EFS_WDATA_6_HI 31
+#define EFS_WDATA_6_SZ 32
+#define EFS_RDATA_7_MSK 0xffffffff
+#define EFS_RDATA_7_I_MSK 0x00000000
+#define EFS_RDATA_7_SFT 0
+#define EFS_RDATA_7_HI 31
+#define EFS_RDATA_7_SZ 32
+#define EFS_WDATA_7_MSK 0xffffffff
+#define EFS_WDATA_7_I_MSK 0x00000000
+#define EFS_WDATA_7_SFT 0
+#define EFS_WDATA_7_HI 31
+#define EFS_WDATA_7_SZ 32
+#define EFS_SPI_RD0_EN_MSK 0x00000001
+#define EFS_SPI_RD0_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD0_EN_SFT 0
+#define EFS_SPI_RD0_EN_HI 0
+#define EFS_SPI_RD0_EN_SZ 1
+#define EFS_SPI_RD1_EN_MSK 0x00000001
+#define EFS_SPI_RD1_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD1_EN_SFT 0
+#define EFS_SPI_RD1_EN_HI 0
+#define EFS_SPI_RD1_EN_SZ 1
+#define EFS_SPI_RD2_EN_MSK 0x00000001
+#define EFS_SPI_RD2_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD2_EN_SFT 0
+#define EFS_SPI_RD2_EN_HI 0
+#define EFS_SPI_RD2_EN_SZ 1
+#define EFS_SPI_RD3_EN_MSK 0x00000001
+#define EFS_SPI_RD3_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD3_EN_SFT 0
+#define EFS_SPI_RD3_EN_HI 0
+#define EFS_SPI_RD3_EN_SZ 1
+#define EFS_SPI_RD4_EN_MSK 0x00000001
+#define EFS_SPI_RD4_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD4_EN_SFT 0
+#define EFS_SPI_RD4_EN_HI 0
+#define EFS_SPI_RD4_EN_SZ 1
+#define EFS_SPI_RD5_EN_MSK 0x00000001
+#define EFS_SPI_RD5_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD5_EN_SFT 0
+#define EFS_SPI_RD5_EN_HI 0
+#define EFS_SPI_RD5_EN_SZ 1
+#define EFS_SPI_RD6_EN_MSK 0x00000001
+#define EFS_SPI_RD6_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD6_EN_SFT 0
+#define EFS_SPI_RD6_EN_HI 0
+#define EFS_SPI_RD6_EN_SZ 1
+#define EFS_SPI_RD7_EN_MSK 0x00000001
+#define EFS_SPI_RD7_EN_I_MSK 0xfffffffe
+#define EFS_SPI_RD7_EN_SFT 0
+#define EFS_SPI_RD7_EN_HI 0
+#define EFS_SPI_RD7_EN_SZ 1
+#define EFS_SPI_RBUSY_MSK 0x00000001
+#define EFS_SPI_RBUSY_I_MSK 0xfffffffe
+#define EFS_SPI_RBUSY_SFT 0
+#define EFS_SPI_RBUSY_HI 0
+#define EFS_SPI_RBUSY_SZ 1
+#define EFS_SPI_RDATA_0_MSK 0xffffffff
+#define EFS_SPI_RDATA_0_I_MSK 0x00000000
+#define EFS_SPI_RDATA_0_SFT 0
+#define EFS_SPI_RDATA_0_HI 31
+#define EFS_SPI_RDATA_0_SZ 32
+#define EFS_SPI_RDATA_1_MSK 0xffffffff
+#define EFS_SPI_RDATA_1_I_MSK 0x00000000
+#define EFS_SPI_RDATA_1_SFT 0
+#define EFS_SPI_RDATA_1_HI 31
+#define EFS_SPI_RDATA_1_SZ 32
+#define EFS_SPI_RDATA_2_MSK 0xffffffff
+#define EFS_SPI_RDATA_2_I_MSK 0x00000000
+#define EFS_SPI_RDATA_2_SFT 0
+#define EFS_SPI_RDATA_2_HI 31
+#define EFS_SPI_RDATA_2_SZ 32
+#define EFS_SPI_RDATA_3_MSK 0xffffffff
+#define EFS_SPI_RDATA_3_I_MSK 0x00000000
+#define EFS_SPI_RDATA_3_SFT 0
+#define EFS_SPI_RDATA_3_HI 31
+#define EFS_SPI_RDATA_3_SZ 32
+#define EFS_SPI_RDATA_4_MSK 0xffffffff
+#define EFS_SPI_RDATA_4_I_MSK 0x00000000
+#define EFS_SPI_RDATA_4_SFT 0
+#define EFS_SPI_RDATA_4_HI 31
+#define EFS_SPI_RDATA_4_SZ 32
+#define EFS_SPI_RDATA_5_MSK 0xffffffff
+#define EFS_SPI_RDATA_5_I_MSK 0x00000000
+#define EFS_SPI_RDATA_5_SFT 0
+#define EFS_SPI_RDATA_5_HI 31
+#define EFS_SPI_RDATA_5_SZ 32
+#define EFS_SPI_RDATA_6_MSK 0xffffffff
+#define EFS_SPI_RDATA_6_I_MSK 0x00000000
+#define EFS_SPI_RDATA_6_SFT 0
+#define EFS_SPI_RDATA_6_HI 31
+#define EFS_SPI_RDATA_6_SZ 32
+#define EFS_SPI_RDATA_7_MSK 0xffffffff
+#define EFS_SPI_RDATA_7_I_MSK 0x00000000
+#define EFS_SPI_RDATA_7_SFT 0
+#define EFS_SPI_RDATA_7_HI 31
+#define EFS_SPI_RDATA_7_SZ 32
+#define GET_RK_MSK 0x00000001
+#define GET_RK_I_MSK 0xfffffffe
+#define GET_RK_SFT 0
+#define GET_RK_HI 0
+#define GET_RK_SZ 1
+#define FORCE_GET_RK_MSK 0x00000002
+#define FORCE_GET_RK_I_MSK 0xfffffffd
+#define FORCE_GET_RK_SFT 1
+#define FORCE_GET_RK_HI 1
+#define FORCE_GET_RK_SZ 1
+#define SMS4_DESCRY_EN_MSK 0x00000010
+#define SMS4_DESCRY_EN_I_MSK 0xffffffef
+#define SMS4_DESCRY_EN_SFT 4
+#define SMS4_DESCRY_EN_HI 4
+#define SMS4_DESCRY_EN_SZ 1
+#define DEC_DOUT_MSB_MSK 0x00000001
+#define DEC_DOUT_MSB_I_MSK 0xfffffffe
+#define DEC_DOUT_MSB_SFT 0
+#define DEC_DOUT_MSB_HI 0
+#define DEC_DOUT_MSB_SZ 1
+#define DEC_DIN_MSB_MSK 0x00000002
+#define DEC_DIN_MSB_I_MSK 0xfffffffd
+#define DEC_DIN_MSB_SFT 1
+#define DEC_DIN_MSB_HI 1
+#define DEC_DIN_MSB_SZ 1
+#define ENC_DOUT_MSB_MSK 0x00000004
+#define ENC_DOUT_MSB_I_MSK 0xfffffffb
+#define ENC_DOUT_MSB_SFT 2
+#define ENC_DOUT_MSB_HI 2
+#define ENC_DOUT_MSB_SZ 1
+#define ENC_DIN_MSB_MSK 0x00000008
+#define ENC_DIN_MSB_I_MSK 0xfffffff7
+#define ENC_DIN_MSB_SFT 3
+#define ENC_DIN_MSB_HI 3
+#define ENC_DIN_MSB_SZ 1
+#define KEY_DIN_MSB_MSK 0x00000010
+#define KEY_DIN_MSB_I_MSK 0xffffffef
+#define KEY_DIN_MSB_SFT 4
+#define KEY_DIN_MSB_HI 4
+#define KEY_DIN_MSB_SZ 1
+#define SMS4_CBC_EN_MSK 0x00000001
+#define SMS4_CBC_EN_I_MSK 0xfffffffe
+#define SMS4_CBC_EN_SFT 0
+#define SMS4_CBC_EN_HI 0
+#define SMS4_CBC_EN_SZ 1
+#define SMS4_CFB_EN_MSK 0x00000002
+#define SMS4_CFB_EN_I_MSK 0xfffffffd
+#define SMS4_CFB_EN_SFT 1
+#define SMS4_CFB_EN_HI 1
+#define SMS4_CFB_EN_SZ 1
+#define SMS4_OFB_EN_MSK 0x00000004
+#define SMS4_OFB_EN_I_MSK 0xfffffffb
+#define SMS4_OFB_EN_SFT 2
+#define SMS4_OFB_EN_HI 2
+#define SMS4_OFB_EN_SZ 1
+#define SMS4_START_TRIG_MSK 0x00000001
+#define SMS4_START_TRIG_I_MSK 0xfffffffe
+#define SMS4_START_TRIG_SFT 0
+#define SMS4_START_TRIG_HI 0
+#define SMS4_START_TRIG_SZ 1
+#define SMS4_BUSY_MSK 0x00000001
+#define SMS4_BUSY_I_MSK 0xfffffffe
+#define SMS4_BUSY_SFT 0
+#define SMS4_BUSY_HI 0
+#define SMS4_BUSY_SZ 1
+#define SMS4_DONE_MSK 0x00000001
+#define SMS4_DONE_I_MSK 0xfffffffe
+#define SMS4_DONE_SFT 0
+#define SMS4_DONE_HI 0
+#define SMS4_DONE_SZ 1
+#define SMS4_DATAIN_0_MSK 0xffffffff
+#define SMS4_DATAIN_0_I_MSK 0x00000000
+#define SMS4_DATAIN_0_SFT 0
+#define SMS4_DATAIN_0_HI 31
+#define SMS4_DATAIN_0_SZ 32
+#define SMS4_DATAIN_1_MSK 0xffffffff
+#define SMS4_DATAIN_1_I_MSK 0x00000000
+#define SMS4_DATAIN_1_SFT 0
+#define SMS4_DATAIN_1_HI 31
+#define SMS4_DATAIN_1_SZ 32
+#define SMS4_DATAIN_2_MSK 0xffffffff
+#define SMS4_DATAIN_2_I_MSK 0x00000000
+#define SMS4_DATAIN_2_SFT 0
+#define SMS4_DATAIN_2_HI 31
+#define SMS4_DATAIN_2_SZ 32
+#define SMS4_DATAIN_3_MSK 0xffffffff
+#define SMS4_DATAIN_3_I_MSK 0x00000000
+#define SMS4_DATAIN_3_SFT 0
+#define SMS4_DATAIN_3_HI 31
+#define SMS4_DATAIN_3_SZ 32
+#define SMS4_DATAOUT_0_MSK 0xffffffff
+#define SMS4_DATAOUT_0_I_MSK 0x00000000
+#define SMS4_DATAOUT_0_SFT 0
+#define SMS4_DATAOUT_0_HI 31
+#define SMS4_DATAOUT_0_SZ 32
+#define SMS4_DATAOUT_1_MSK 0xffffffff
+#define SMS4_DATAOUT_1_I_MSK 0x00000000
+#define SMS4_DATAOUT_1_SFT 0
+#define SMS4_DATAOUT_1_HI 31
+#define SMS4_DATAOUT_1_SZ 32
+#define SMS4_DATAOUT_2_MSK 0xffffffff
+#define SMS4_DATAOUT_2_I_MSK 0x00000000
+#define SMS4_DATAOUT_2_SFT 0
+#define SMS4_DATAOUT_2_HI 31
+#define SMS4_DATAOUT_2_SZ 32
+#define SMS4_DATAOUT_3_MSK 0xffffffff
+#define SMS4_DATAOUT_3_I_MSK 0x00000000
+#define SMS4_DATAOUT_3_SFT 0
+#define SMS4_DATAOUT_3_HI 31
+#define SMS4_DATAOUT_3_SZ 32
+#define SMS4_KEY_0_MSK 0xffffffff
+#define SMS4_KEY_0_I_MSK 0x00000000
+#define SMS4_KEY_0_SFT 0
+#define SMS4_KEY_0_HI 31
+#define SMS4_KEY_0_SZ 32
+#define SMS4_KEY_1_MSK 0xffffffff
+#define SMS4_KEY_1_I_MSK 0x00000000
+#define SMS4_KEY_1_SFT 0
+#define SMS4_KEY_1_HI 31
+#define SMS4_KEY_1_SZ 32
+#define SMS4_KEY_2_MSK 0xffffffff
+#define SMS4_KEY_2_I_MSK 0x00000000
+#define SMS4_KEY_2_SFT 0
+#define SMS4_KEY_2_HI 31
+#define SMS4_KEY_2_SZ 32
+#define SMS4_KEY_3_MSK 0xffffffff
+#define SMS4_KEY_3_I_MSK 0x00000000
+#define SMS4_KEY_3_SFT 0
+#define SMS4_KEY_3_HI 31
+#define SMS4_KEY_3_SZ 32
+#define SMS4_MODE_IV0_MSK 0xffffffff
+#define SMS4_MODE_IV0_I_MSK 0x00000000
+#define SMS4_MODE_IV0_SFT 0
+#define SMS4_MODE_IV0_HI 31
+#define SMS4_MODE_IV0_SZ 32
+#define SMS4_MODE_IV1_MSK 0xffffffff
+#define SMS4_MODE_IV1_I_MSK 0x00000000
+#define SMS4_MODE_IV1_SFT 0
+#define SMS4_MODE_IV1_HI 31
+#define SMS4_MODE_IV1_SZ 32
+#define SMS4_MODE_IV2_MSK 0xffffffff
+#define SMS4_MODE_IV2_I_MSK 0x00000000
+#define SMS4_MODE_IV2_SFT 0
+#define SMS4_MODE_IV2_HI 31
+#define SMS4_MODE_IV2_SZ 32
+#define SMS4_MODE_IV3_MSK 0xffffffff
+#define SMS4_MODE_IV3_I_MSK 0x00000000
+#define SMS4_MODE_IV3_SFT 0
+#define SMS4_MODE_IV3_HI 31
+#define SMS4_MODE_IV3_SZ 32
+#define SMS4_OFB_ENC0_MSK 0xffffffff
+#define SMS4_OFB_ENC0_I_MSK 0x00000000
+#define SMS4_OFB_ENC0_SFT 0
+#define SMS4_OFB_ENC0_HI 31
+#define SMS4_OFB_ENC0_SZ 32
+#define SMS4_OFB_ENC1_MSK 0xffffffff
+#define SMS4_OFB_ENC1_I_MSK 0x00000000
+#define SMS4_OFB_ENC1_SFT 0
+#define SMS4_OFB_ENC1_HI 31
+#define SMS4_OFB_ENC1_SZ 32
+#define SMS4_OFB_ENC2_MSK 0xffffffff
+#define SMS4_OFB_ENC2_I_MSK 0x00000000
+#define SMS4_OFB_ENC2_SFT 0
+#define SMS4_OFB_ENC2_HI 31
+#define SMS4_OFB_ENC2_SZ 32
+#define SMS4_OFB_ENC3_MSK 0xffffffff
+#define SMS4_OFB_ENC3_I_MSK 0x00000000
+#define SMS4_OFB_ENC3_SFT 0
+#define SMS4_OFB_ENC3_HI 31
+#define SMS4_OFB_ENC3_SZ 32
+#define MRX_MCAST_TB0_31_0_MSK 0xffffffff
+#define MRX_MCAST_TB0_31_0_I_MSK 0x00000000
+#define MRX_MCAST_TB0_31_0_SFT 0
+#define MRX_MCAST_TB0_31_0_HI 31
+#define MRX_MCAST_TB0_31_0_SZ 32
+#define MRX_MCAST_TB0_47_32_MSK 0x0000ffff
+#define MRX_MCAST_TB0_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_TB0_47_32_SFT 0
+#define MRX_MCAST_TB0_47_32_HI 15
+#define MRX_MCAST_TB0_47_32_SZ 16
+#define MRX_MCAST_MASK0_31_0_MSK 0xffffffff
+#define MRX_MCAST_MASK0_31_0_I_MSK 0x00000000
+#define MRX_MCAST_MASK0_31_0_SFT 0
+#define MRX_MCAST_MASK0_31_0_HI 31
+#define MRX_MCAST_MASK0_31_0_SZ 32
+#define MRX_MCAST_MASK0_47_32_MSK 0x0000ffff
+#define MRX_MCAST_MASK0_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_MASK0_47_32_SFT 0
+#define MRX_MCAST_MASK0_47_32_HI 15
+#define MRX_MCAST_MASK0_47_32_SZ 16
+#define MRX_MCAST_CTRL_0_MSK 0x00000003
+#define MRX_MCAST_CTRL_0_I_MSK 0xfffffffc
+#define MRX_MCAST_CTRL_0_SFT 0
+#define MRX_MCAST_CTRL_0_HI 1
+#define MRX_MCAST_CTRL_0_SZ 2
+#define MRX_MCAST_TB1_31_0_MSK 0xffffffff
+#define MRX_MCAST_TB1_31_0_I_MSK 0x00000000
+#define MRX_MCAST_TB1_31_0_SFT 0
+#define MRX_MCAST_TB1_31_0_HI 31
+#define MRX_MCAST_TB1_31_0_SZ 32
+#define MRX_MCAST_TB1_47_32_MSK 0x0000ffff
+#define MRX_MCAST_TB1_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_TB1_47_32_SFT 0
+#define MRX_MCAST_TB1_47_32_HI 15
+#define MRX_MCAST_TB1_47_32_SZ 16
+#define MRX_MCAST_MASK1_31_0_MSK 0xffffffff
+#define MRX_MCAST_MASK1_31_0_I_MSK 0x00000000
+#define MRX_MCAST_MASK1_31_0_SFT 0
+#define MRX_MCAST_MASK1_31_0_HI 31
+#define MRX_MCAST_MASK1_31_0_SZ 32
+#define MRX_MCAST_MASK1_47_32_MSK 0x0000ffff
+#define MRX_MCAST_MASK1_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_MASK1_47_32_SFT 0
+#define MRX_MCAST_MASK1_47_32_HI 15
+#define MRX_MCAST_MASK1_47_32_SZ 16
+#define MRX_MCAST_CTRL_1_MSK 0x00000003
+#define MRX_MCAST_CTRL_1_I_MSK 0xfffffffc
+#define MRX_MCAST_CTRL_1_SFT 0
+#define MRX_MCAST_CTRL_1_HI 1
+#define MRX_MCAST_CTRL_1_SZ 2
+#define MRX_MCAST_TB2_31_0_MSK 0xffffffff
+#define MRX_MCAST_TB2_31_0_I_MSK 0x00000000
+#define MRX_MCAST_TB2_31_0_SFT 0
+#define MRX_MCAST_TB2_31_0_HI 31
+#define MRX_MCAST_TB2_31_0_SZ 32
+#define MRX_MCAST_TB2_47_32_MSK 0x0000ffff
+#define MRX_MCAST_TB2_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_TB2_47_32_SFT 0
+#define MRX_MCAST_TB2_47_32_HI 15
+#define MRX_MCAST_TB2_47_32_SZ 16
+#define MRX_MCAST_MASK2_31_0_MSK 0xffffffff
+#define MRX_MCAST_MASK2_31_0_I_MSK 0x00000000
+#define MRX_MCAST_MASK2_31_0_SFT 0
+#define MRX_MCAST_MASK2_31_0_HI 31
+#define MRX_MCAST_MASK2_31_0_SZ 32
+#define MRX_MCAST_MASK2_47_32_MSK 0x0000ffff
+#define MRX_MCAST_MASK2_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_MASK2_47_32_SFT 0
+#define MRX_MCAST_MASK2_47_32_HI 15
+#define MRX_MCAST_MASK2_47_32_SZ 16
+#define MRX_MCAST_CTRL_2_MSK 0x00000003
+#define MRX_MCAST_CTRL_2_I_MSK 0xfffffffc
+#define MRX_MCAST_CTRL_2_SFT 0
+#define MRX_MCAST_CTRL_2_HI 1
+#define MRX_MCAST_CTRL_2_SZ 2
+#define MRX_MCAST_TB3_31_0_MSK 0xffffffff
+#define MRX_MCAST_TB3_31_0_I_MSK 0x00000000
+#define MRX_MCAST_TB3_31_0_SFT 0
+#define MRX_MCAST_TB3_31_0_HI 31
+#define MRX_MCAST_TB3_31_0_SZ 32
+#define MRX_MCAST_TB3_47_32_MSK 0x0000ffff
+#define MRX_MCAST_TB3_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_TB3_47_32_SFT 0
+#define MRX_MCAST_TB3_47_32_HI 15
+#define MRX_MCAST_TB3_47_32_SZ 16
+#define MRX_MCAST_MASK3_31_0_MSK 0xffffffff
+#define MRX_MCAST_MASK3_31_0_I_MSK 0x00000000
+#define MRX_MCAST_MASK3_31_0_SFT 0
+#define MRX_MCAST_MASK3_31_0_HI 31
+#define MRX_MCAST_MASK3_31_0_SZ 32
+#define MRX_MCAST_MASK3_47_32_MSK 0x0000ffff
+#define MRX_MCAST_MASK3_47_32_I_MSK 0xffff0000
+#define MRX_MCAST_MASK3_47_32_SFT 0
+#define MRX_MCAST_MASK3_47_32_HI 15
+#define MRX_MCAST_MASK3_47_32_SZ 16
+#define MRX_MCAST_CTRL_3_MSK 0x00000003
+#define MRX_MCAST_CTRL_3_I_MSK 0xfffffffc
+#define MRX_MCAST_CTRL_3_SFT 0
+#define MRX_MCAST_CTRL_3_HI 1
+#define MRX_MCAST_CTRL_3_SZ 2
+#define MRX_PHY_INFO_MSK 0xffffffff
+#define MRX_PHY_INFO_I_MSK 0x00000000
+#define MRX_PHY_INFO_SFT 0
+#define MRX_PHY_INFO_HI 31
+#define MRX_PHY_INFO_SZ 32
+#define DBG_BA_TYPE_MSK 0x0000003f
+#define DBG_BA_TYPE_I_MSK 0xffffffc0
+#define DBG_BA_TYPE_SFT 0
+#define DBG_BA_TYPE_HI 5
+#define DBG_BA_TYPE_SZ 6
+#define DBG_BA_SEQ_MSK 0x000fff00
+#define DBG_BA_SEQ_I_MSK 0xfff000ff
+#define DBG_BA_SEQ_SFT 8
+#define DBG_BA_SEQ_HI 19
+#define DBG_BA_SEQ_SZ 12
+#define MRX_FLT_TB0_MSK 0x00007fff
+#define MRX_FLT_TB0_I_MSK 0xffff8000
+#define MRX_FLT_TB0_SFT 0
+#define MRX_FLT_TB0_HI 14
+#define MRX_FLT_TB0_SZ 15
+#define MRX_FLT_TB1_MSK 0x00007fff
+#define MRX_FLT_TB1_I_MSK 0xffff8000
+#define MRX_FLT_TB1_SFT 0
+#define MRX_FLT_TB1_HI 14
+#define MRX_FLT_TB1_SZ 15
+#define MRX_FLT_TB2_MSK 0x00007fff
+#define MRX_FLT_TB2_I_MSK 0xffff8000
+#define MRX_FLT_TB2_SFT 0
+#define MRX_FLT_TB2_HI 14
+#define MRX_FLT_TB2_SZ 15
+#define MRX_FLT_TB3_MSK 0x00007fff
+#define MRX_FLT_TB3_I_MSK 0xffff8000
+#define MRX_FLT_TB3_SFT 0
+#define MRX_FLT_TB3_HI 14
+#define MRX_FLT_TB3_SZ 15
+#define MRX_FLT_TB4_MSK 0x00007fff
+#define MRX_FLT_TB4_I_MSK 0xffff8000
+#define MRX_FLT_TB4_SFT 0
+#define MRX_FLT_TB4_HI 14
+#define MRX_FLT_TB4_SZ 15
+#define MRX_FLT_TB5_MSK 0x00007fff
+#define MRX_FLT_TB5_I_MSK 0xffff8000
+#define MRX_FLT_TB5_SFT 0
+#define MRX_FLT_TB5_HI 14
+#define MRX_FLT_TB5_SZ 15
+#define MRX_FLT_TB6_MSK 0x00007fff
+#define MRX_FLT_TB6_I_MSK 0xffff8000
+#define MRX_FLT_TB6_SFT 0
+#define MRX_FLT_TB6_HI 14
+#define MRX_FLT_TB6_SZ 15
+#define MRX_FLT_TB7_MSK 0x00007fff
+#define MRX_FLT_TB7_I_MSK 0xffff8000
+#define MRX_FLT_TB7_SFT 0
+#define MRX_FLT_TB7_HI 14
+#define MRX_FLT_TB7_SZ 15
+#define MRX_FLT_TB8_MSK 0x00007fff
+#define MRX_FLT_TB8_I_MSK 0xffff8000
+#define MRX_FLT_TB8_SFT 0
+#define MRX_FLT_TB8_HI 14
+#define MRX_FLT_TB8_SZ 15
+#define MRX_FLT_TB9_MSK 0x00007fff
+#define MRX_FLT_TB9_I_MSK 0xffff8000
+#define MRX_FLT_TB9_SFT 0
+#define MRX_FLT_TB9_HI 14
+#define MRX_FLT_TB9_SZ 15
+#define MRX_FLT_TB10_MSK 0x00007fff
+#define MRX_FLT_TB10_I_MSK 0xffff8000
+#define MRX_FLT_TB10_SFT 0
+#define MRX_FLT_TB10_HI 14
+#define MRX_FLT_TB10_SZ 15
+#define MRX_FLT_TB11_MSK 0x00007fff
+#define MRX_FLT_TB11_I_MSK 0xffff8000
+#define MRX_FLT_TB11_SFT 0
+#define MRX_FLT_TB11_HI 14
+#define MRX_FLT_TB11_SZ 15
+#define MRX_FLT_TB12_MSK 0x00007fff
+#define MRX_FLT_TB12_I_MSK 0xffff8000
+#define MRX_FLT_TB12_SFT 0
+#define MRX_FLT_TB12_HI 14
+#define MRX_FLT_TB12_SZ 15
+#define MRX_FLT_TB13_MSK 0x00007fff
+#define MRX_FLT_TB13_I_MSK 0xffff8000
+#define MRX_FLT_TB13_SFT 0
+#define MRX_FLT_TB13_HI 14
+#define MRX_FLT_TB13_SZ 15
+#define MRX_FLT_TB14_MSK 0x00007fff
+#define MRX_FLT_TB14_I_MSK 0xffff8000
+#define MRX_FLT_TB14_SFT 0
+#define MRX_FLT_TB14_HI 14
+#define MRX_FLT_TB14_SZ 15
+#define MRX_FLT_TB15_MSK 0x00007fff
+#define MRX_FLT_TB15_I_MSK 0xffff8000
+#define MRX_FLT_TB15_SFT 0
+#define MRX_FLT_TB15_HI 14
+#define MRX_FLT_TB15_SZ 15
+#define MRX_FLT_EN0_MSK 0x0000ffff
+#define MRX_FLT_EN0_I_MSK 0xffff0000
+#define MRX_FLT_EN0_SFT 0
+#define MRX_FLT_EN0_HI 15
+#define MRX_FLT_EN0_SZ 16
+#define MRX_FLT_EN1_MSK 0x0000ffff
+#define MRX_FLT_EN1_I_MSK 0xffff0000
+#define MRX_FLT_EN1_SFT 0
+#define MRX_FLT_EN1_HI 15
+#define MRX_FLT_EN1_SZ 16
+#define MRX_FLT_EN2_MSK 0x0000ffff
+#define MRX_FLT_EN2_I_MSK 0xffff0000
+#define MRX_FLT_EN2_SFT 0
+#define MRX_FLT_EN2_HI 15
+#define MRX_FLT_EN2_SZ 16
+#define MRX_FLT_EN3_MSK 0x0000ffff
+#define MRX_FLT_EN3_I_MSK 0xffff0000
+#define MRX_FLT_EN3_SFT 0
+#define MRX_FLT_EN3_HI 15
+#define MRX_FLT_EN3_SZ 16
+#define MRX_FLT_EN4_MSK 0x0000ffff
+#define MRX_FLT_EN4_I_MSK 0xffff0000
+#define MRX_FLT_EN4_SFT 0
+#define MRX_FLT_EN4_HI 15
+#define MRX_FLT_EN4_SZ 16
+#define MRX_FLT_EN5_MSK 0x0000ffff
+#define MRX_FLT_EN5_I_MSK 0xffff0000
+#define MRX_FLT_EN5_SFT 0
+#define MRX_FLT_EN5_HI 15
+#define MRX_FLT_EN5_SZ 16
+#define MRX_FLT_EN6_MSK 0x0000ffff
+#define MRX_FLT_EN6_I_MSK 0xffff0000
+#define MRX_FLT_EN6_SFT 0
+#define MRX_FLT_EN6_HI 15
+#define MRX_FLT_EN6_SZ 16
+#define MRX_FLT_EN7_MSK 0x0000ffff
+#define MRX_FLT_EN7_I_MSK 0xffff0000
+#define MRX_FLT_EN7_SFT 0
+#define MRX_FLT_EN7_HI 15
+#define MRX_FLT_EN7_SZ 16
+#define MRX_FLT_EN8_MSK 0x0000ffff
+#define MRX_FLT_EN8_I_MSK 0xffff0000
+#define MRX_FLT_EN8_SFT 0
+#define MRX_FLT_EN8_HI 15
+#define MRX_FLT_EN8_SZ 16
+#define MRX_LEN_FLT_MSK 0x0000ffff
+#define MRX_LEN_FLT_I_MSK 0xffff0000
+#define MRX_LEN_FLT_SFT 0
+#define MRX_LEN_FLT_HI 15
+#define MRX_LEN_FLT_SZ 16
+#define RX_FLOW_DATA_MSK 0xffffffff
+#define RX_FLOW_DATA_I_MSK 0x00000000
+#define RX_FLOW_DATA_SFT 0
+#define RX_FLOW_DATA_HI 31
+#define RX_FLOW_DATA_SZ 32
+#define RX_FLOW_MNG_MSK 0x0000ffff
+#define RX_FLOW_MNG_I_MSK 0xffff0000
+#define RX_FLOW_MNG_SFT 0
+#define RX_FLOW_MNG_HI 15
+#define RX_FLOW_MNG_SZ 16
+#define RX_FLOW_CTRL_MSK 0x0000ffff
+#define RX_FLOW_CTRL_I_MSK 0xffff0000
+#define RX_FLOW_CTRL_SFT 0
+#define RX_FLOW_CTRL_HI 15
+#define RX_FLOW_CTRL_SZ 16
+#define MRX_STP_EN_MSK 0x00000001
+#define MRX_STP_EN_I_MSK 0xfffffffe
+#define MRX_STP_EN_SFT 0
+#define MRX_STP_EN_HI 0
+#define MRX_STP_EN_SZ 1
+#define MRX_STP_OFST_MSK 0x0000ff00
+#define MRX_STP_OFST_I_MSK 0xffff00ff
+#define MRX_STP_OFST_SFT 8
+#define MRX_STP_OFST_HI 15
+#define MRX_STP_OFST_SZ 8
+#define DBG_FF_FULL_MSK 0x0000ffff
+#define DBG_FF_FULL_I_MSK 0xffff0000
+#define DBG_FF_FULL_SFT 0
+#define DBG_FF_FULL_HI 15
+#define DBG_FF_FULL_SZ 16
+#define DBG_FF_FULL_CLR_MSK 0x80000000
+#define DBG_FF_FULL_CLR_I_MSK 0x7fffffff
+#define DBG_FF_FULL_CLR_SFT 31
+#define DBG_FF_FULL_CLR_HI 31
+#define DBG_FF_FULL_CLR_SZ 1
+#define DBG_WFF_FULL_MSK 0x0000ffff
+#define DBG_WFF_FULL_I_MSK 0xffff0000
+#define DBG_WFF_FULL_SFT 0
+#define DBG_WFF_FULL_HI 15
+#define DBG_WFF_FULL_SZ 16
+#define DBG_WFF_FULL_CLR_MSK 0x80000000
+#define DBG_WFF_FULL_CLR_I_MSK 0x7fffffff
+#define DBG_WFF_FULL_CLR_SFT 31
+#define DBG_WFF_FULL_CLR_HI 31
+#define DBG_WFF_FULL_CLR_SZ 1
+#define DBG_MB_FULL_MSK 0x0000ffff
+#define DBG_MB_FULL_I_MSK 0xffff0000
+#define DBG_MB_FULL_SFT 0
+#define DBG_MB_FULL_HI 15
+#define DBG_MB_FULL_SZ 16
+#define DBG_MB_FULL_CLR_MSK 0x80000000
+#define DBG_MB_FULL_CLR_I_MSK 0x7fffffff
+#define DBG_MB_FULL_CLR_SFT 31
+#define DBG_MB_FULL_CLR_HI 31
+#define DBG_MB_FULL_CLR_SZ 1
+#define BA_CTRL_MSK 0x00000003
+#define BA_CTRL_I_MSK 0xfffffffc
+#define BA_CTRL_SFT 0
+#define BA_CTRL_HI 1
+#define BA_CTRL_SZ 2
+#define BA_DBG_EN_MSK 0x00000004
+#define BA_DBG_EN_I_MSK 0xfffffffb
+#define BA_DBG_EN_SFT 2
+#define BA_DBG_EN_HI 2
+#define BA_DBG_EN_SZ 1
+#define BA_AGRE_EN_MSK 0x00000008
+#define BA_AGRE_EN_I_MSK 0xfffffff7
+#define BA_AGRE_EN_SFT 3
+#define BA_AGRE_EN_HI 3
+#define BA_AGRE_EN_SZ 1
+#define BA_TA_31_0_MSK 0xffffffff
+#define BA_TA_31_0_I_MSK 0x00000000
+#define BA_TA_31_0_SFT 0
+#define BA_TA_31_0_HI 31
+#define BA_TA_31_0_SZ 32
+#define BA_TA_47_32_MSK 0x0000ffff
+#define BA_TA_47_32_I_MSK 0xffff0000
+#define BA_TA_47_32_SFT 0
+#define BA_TA_47_32_HI 15
+#define BA_TA_47_32_SZ 16
+#define BA_TID_MSK 0x0000000f
+#define BA_TID_I_MSK 0xfffffff0
+#define BA_TID_SFT 0
+#define BA_TID_HI 3
+#define BA_TID_SZ 4
+#define BA_ST_SEQ_MSK 0x00000fff
+#define BA_ST_SEQ_I_MSK 0xfffff000
+#define BA_ST_SEQ_SFT 0
+#define BA_ST_SEQ_HI 11
+#define BA_ST_SEQ_SZ 12
+#define BA_SB0_MSK 0xffffffff
+#define BA_SB0_I_MSK 0x00000000
+#define BA_SB0_SFT 0
+#define BA_SB0_HI 31
+#define BA_SB0_SZ 32
+#define BA_SB1_MSK 0xffffffff
+#define BA_SB1_I_MSK 0x00000000
+#define BA_SB1_SFT 0
+#define BA_SB1_HI 31
+#define BA_SB1_SZ 32
+#define MRX_WD_MSK 0x0001ffff
+#define MRX_WD_I_MSK 0xfffe0000
+#define MRX_WD_SFT 0
+#define MRX_WD_HI 16
+#define MRX_WD_SZ 17
+#define ACK_GEN_EN_MSK 0x00000001
+#define ACK_GEN_EN_I_MSK 0xfffffffe
+#define ACK_GEN_EN_SFT 0
+#define ACK_GEN_EN_HI 0
+#define ACK_GEN_EN_SZ 1
+#define BA_GEN_EN_MSK 0x00000002
+#define BA_GEN_EN_I_MSK 0xfffffffd
+#define BA_GEN_EN_SFT 1
+#define BA_GEN_EN_HI 1
+#define BA_GEN_EN_SZ 1
+#define ACK_GEN_DUR_MSK 0x0000ffff
+#define ACK_GEN_DUR_I_MSK 0xffff0000
+#define ACK_GEN_DUR_SFT 0
+#define ACK_GEN_DUR_HI 15
+#define ACK_GEN_DUR_SZ 16
+#define ACK_GEN_INFO_MSK 0x003f0000
+#define ACK_GEN_INFO_I_MSK 0xffc0ffff
+#define ACK_GEN_INFO_SFT 16
+#define ACK_GEN_INFO_HI 21
+#define ACK_GEN_INFO_SZ 6
+#define ACK_GEN_RA_31_0_MSK 0xffffffff
+#define ACK_GEN_RA_31_0_I_MSK 0x00000000
+#define ACK_GEN_RA_31_0_SFT 0
+#define ACK_GEN_RA_31_0_HI 31
+#define ACK_GEN_RA_31_0_SZ 32
+#define ACK_GEN_RA_47_32_MSK 0x0000ffff
+#define ACK_GEN_RA_47_32_I_MSK 0xffff0000
+#define ACK_GEN_RA_47_32_SFT 0
+#define ACK_GEN_RA_47_32_HI 15
+#define ACK_GEN_RA_47_32_SZ 16
+#define MIB_LEN_FAIL_MSK 0x0000ffff
+#define MIB_LEN_FAIL_I_MSK 0xffff0000
+#define MIB_LEN_FAIL_SFT 0
+#define MIB_LEN_FAIL_HI 15
+#define MIB_LEN_FAIL_SZ 16
+#define TRAP_HW_ID_MSK 0x0000000f
+#define TRAP_HW_ID_I_MSK 0xfffffff0
+#define TRAP_HW_ID_SFT 0
+#define TRAP_HW_ID_HI 3
+#define TRAP_HW_ID_SZ 4
+#define ID_IN_USE_MSK 0x000000ff
+#define ID_IN_USE_I_MSK 0xffffff00
+#define ID_IN_USE_SFT 0
+#define ID_IN_USE_HI 7
+#define ID_IN_USE_SZ 8
+#define MRX_ERR_MSK 0xffffffff
+#define MRX_ERR_I_MSK 0x00000000
+#define MRX_ERR_SFT 0
+#define MRX_ERR_HI 31
+#define MRX_ERR_SZ 32
+#define W0_T0_SEQ_MSK 0x0000ffff
+#define W0_T0_SEQ_I_MSK 0xffff0000
+#define W0_T0_SEQ_SFT 0
+#define W0_T0_SEQ_HI 15
+#define W0_T0_SEQ_SZ 16
+#define W0_T1_SEQ_MSK 0x0000ffff
+#define W0_T1_SEQ_I_MSK 0xffff0000
+#define W0_T1_SEQ_SFT 0
+#define W0_T1_SEQ_HI 15
+#define W0_T1_SEQ_SZ 16
+#define W0_T2_SEQ_MSK 0x0000ffff
+#define W0_T2_SEQ_I_MSK 0xffff0000
+#define W0_T2_SEQ_SFT 0
+#define W0_T2_SEQ_HI 15
+#define W0_T2_SEQ_SZ 16
+#define W0_T3_SEQ_MSK 0x0000ffff
+#define W0_T3_SEQ_I_MSK 0xffff0000
+#define W0_T3_SEQ_SFT 0
+#define W0_T3_SEQ_HI 15
+#define W0_T3_SEQ_SZ 16
+#define W0_T4_SEQ_MSK 0x0000ffff
+#define W0_T4_SEQ_I_MSK 0xffff0000
+#define W0_T4_SEQ_SFT 0
+#define W0_T4_SEQ_HI 15
+#define W0_T4_SEQ_SZ 16
+#define W0_T5_SEQ_MSK 0x0000ffff
+#define W0_T5_SEQ_I_MSK 0xffff0000
+#define W0_T5_SEQ_SFT 0
+#define W0_T5_SEQ_HI 15
+#define W0_T5_SEQ_SZ 16
+#define W0_T6_SEQ_MSK 0x0000ffff
+#define W0_T6_SEQ_I_MSK 0xffff0000
+#define W0_T6_SEQ_SFT 0
+#define W0_T6_SEQ_HI 15
+#define W0_T6_SEQ_SZ 16
+#define W0_T7_SEQ_MSK 0x0000ffff
+#define W0_T7_SEQ_I_MSK 0xffff0000
+#define W0_T7_SEQ_SFT 0
+#define W0_T7_SEQ_HI 15
+#define W0_T7_SEQ_SZ 16
+#define W1_T0_SEQ_MSK 0x0000ffff
+#define W1_T0_SEQ_I_MSK 0xffff0000
+#define W1_T0_SEQ_SFT 0
+#define W1_T0_SEQ_HI 15
+#define W1_T0_SEQ_SZ 16
+#define W1_T1_SEQ_MSK 0x0000ffff
+#define W1_T1_SEQ_I_MSK 0xffff0000
+#define W1_T1_SEQ_SFT 0
+#define W1_T1_SEQ_HI 15
+#define W1_T1_SEQ_SZ 16
+#define W1_T2_SEQ_MSK 0x0000ffff
+#define W1_T2_SEQ_I_MSK 0xffff0000
+#define W1_T2_SEQ_SFT 0
+#define W1_T2_SEQ_HI 15
+#define W1_T2_SEQ_SZ 16
+#define W1_T3_SEQ_MSK 0x0000ffff
+#define W1_T3_SEQ_I_MSK 0xffff0000
+#define W1_T3_SEQ_SFT 0
+#define W1_T3_SEQ_HI 15
+#define W1_T3_SEQ_SZ 16
+#define W1_T4_SEQ_MSK 0x0000ffff
+#define W1_T4_SEQ_I_MSK 0xffff0000
+#define W1_T4_SEQ_SFT 0
+#define W1_T4_SEQ_HI 15
+#define W1_T4_SEQ_SZ 16
+#define W1_T5_SEQ_MSK 0x0000ffff
+#define W1_T5_SEQ_I_MSK 0xffff0000
+#define W1_T5_SEQ_SFT 0
+#define W1_T5_SEQ_HI 15
+#define W1_T5_SEQ_SZ 16
+#define W1_T6_SEQ_MSK 0x0000ffff
+#define W1_T6_SEQ_I_MSK 0xffff0000
+#define W1_T6_SEQ_SFT 0
+#define W1_T6_SEQ_HI 15
+#define W1_T6_SEQ_SZ 16
+#define W1_T7_SEQ_MSK 0x0000ffff
+#define W1_T7_SEQ_I_MSK 0xffff0000
+#define W1_T7_SEQ_SFT 0
+#define W1_T7_SEQ_HI 15
+#define W1_T7_SEQ_SZ 16
+#define ADDR1A_SEL_MSK 0x00000003
+#define ADDR1A_SEL_I_MSK 0xfffffffc
+#define ADDR1A_SEL_SFT 0
+#define ADDR1A_SEL_HI 1
+#define ADDR1A_SEL_SZ 2
+#define ADDR2A_SEL_MSK 0x0000000c
+#define ADDR2A_SEL_I_MSK 0xfffffff3
+#define ADDR2A_SEL_SFT 2
+#define ADDR2A_SEL_HI 3
+#define ADDR2A_SEL_SZ 2
+#define ADDR3A_SEL_MSK 0x00000030
+#define ADDR3A_SEL_I_MSK 0xffffffcf
+#define ADDR3A_SEL_SFT 4
+#define ADDR3A_SEL_HI 5
+#define ADDR3A_SEL_SZ 2
+#define ADDR1B_SEL_MSK 0x000000c0
+#define ADDR1B_SEL_I_MSK 0xffffff3f
+#define ADDR1B_SEL_SFT 6
+#define ADDR1B_SEL_HI 7
+#define ADDR1B_SEL_SZ 2
+#define ADDR2B_SEL_MSK 0x00000300
+#define ADDR2B_SEL_I_MSK 0xfffffcff
+#define ADDR2B_SEL_SFT 8
+#define ADDR2B_SEL_HI 9
+#define ADDR2B_SEL_SZ 2
+#define ADDR3B_SEL_MSK 0x00000c00
+#define ADDR3B_SEL_I_MSK 0xfffff3ff
+#define ADDR3B_SEL_SFT 10
+#define ADDR3B_SEL_HI 11
+#define ADDR3B_SEL_SZ 2
+#define ADDR3C_SEL_MSK 0x00003000
+#define ADDR3C_SEL_I_MSK 0xffffcfff
+#define ADDR3C_SEL_SFT 12
+#define ADDR3C_SEL_HI 13
+#define ADDR3C_SEL_SZ 2
+#define FRM_CTRL_MSK 0x0000003f
+#define FRM_CTRL_I_MSK 0xffffffc0
+#define FRM_CTRL_SFT 0
+#define FRM_CTRL_HI 5
+#define FRM_CTRL_SZ 6
+#define CSR_PHY_INFO_MSK 0x00007fff
+#define CSR_PHY_INFO_I_MSK 0xffff8000
+#define CSR_PHY_INFO_SFT 0
+#define CSR_PHY_INFO_HI 14
+#define CSR_PHY_INFO_SZ 15
+#define AMPDU_SIG_MSK 0x000000ff
+#define AMPDU_SIG_I_MSK 0xffffff00
+#define AMPDU_SIG_SFT 0
+#define AMPDU_SIG_HI 7
+#define AMPDU_SIG_SZ 8
+#define MIB_AMPDU_MSK 0xffffffff
+#define MIB_AMPDU_I_MSK 0x00000000
+#define MIB_AMPDU_SFT 0
+#define MIB_AMPDU_HI 31
+#define MIB_AMPDU_SZ 32
+#define LEN_FLT_MSK 0x0000ffff
+#define LEN_FLT_I_MSK 0xffff0000
+#define LEN_FLT_SFT 0
+#define LEN_FLT_HI 15
+#define LEN_FLT_SZ 16
+#define MIB_DELIMITER_MSK 0x0000ffff
+#define MIB_DELIMITER_I_MSK 0xffff0000
+#define MIB_DELIMITER_SFT 0
+#define MIB_DELIMITER_HI 15
+#define MIB_DELIMITER_SZ 16
+#define MTX_INT_Q0_Q_EMPTY_MSK 0x00010000
+#define MTX_INT_Q0_Q_EMPTY_I_MSK 0xfffeffff
+#define MTX_INT_Q0_Q_EMPTY_SFT 16
+#define MTX_INT_Q0_Q_EMPTY_HI 16
+#define MTX_INT_Q0_Q_EMPTY_SZ 1
+#define MTX_INT_Q0_TXOP_RUNOUT_MSK 0x00020000
+#define MTX_INT_Q0_TXOP_RUNOUT_I_MSK 0xfffdffff
+#define MTX_INT_Q0_TXOP_RUNOUT_SFT 17
+#define MTX_INT_Q0_TXOP_RUNOUT_HI 17
+#define MTX_INT_Q0_TXOP_RUNOUT_SZ 1
+#define MTX_INT_Q1_Q_EMPTY_MSK 0x00040000
+#define MTX_INT_Q1_Q_EMPTY_I_MSK 0xfffbffff
+#define MTX_INT_Q1_Q_EMPTY_SFT 18
+#define MTX_INT_Q1_Q_EMPTY_HI 18
+#define MTX_INT_Q1_Q_EMPTY_SZ 1
+#define MTX_INT_Q1_TXOP_RUNOUT_MSK 0x00080000
+#define MTX_INT_Q1_TXOP_RUNOUT_I_MSK 0xfff7ffff
+#define MTX_INT_Q1_TXOP_RUNOUT_SFT 19
+#define MTX_INT_Q1_TXOP_RUNOUT_HI 19
+#define MTX_INT_Q1_TXOP_RUNOUT_SZ 1
+#define MTX_INT_Q2_Q_EMPTY_MSK 0x00100000
+#define MTX_INT_Q2_Q_EMPTY_I_MSK 0xffefffff
+#define MTX_INT_Q2_Q_EMPTY_SFT 20
+#define MTX_INT_Q2_Q_EMPTY_HI 20
+#define MTX_INT_Q2_Q_EMPTY_SZ 1
+#define MTX_INT_Q2_TXOP_RUNOUT_MSK 0x00200000
+#define MTX_INT_Q2_TXOP_RUNOUT_I_MSK 0xffdfffff
+#define MTX_INT_Q2_TXOP_RUNOUT_SFT 21
+#define MTX_INT_Q2_TXOP_RUNOUT_HI 21
+#define MTX_INT_Q2_TXOP_RUNOUT_SZ 1
+#define MTX_INT_Q3_Q_EMPTY_MSK 0x00400000
+#define MTX_INT_Q3_Q_EMPTY_I_MSK 0xffbfffff
+#define MTX_INT_Q3_Q_EMPTY_SFT 22
+#define MTX_INT_Q3_Q_EMPTY_HI 22
+#define MTX_INT_Q3_Q_EMPTY_SZ 1
+#define MTX_INT_Q3_TXOP_RUNOUT_MSK 0x00800000
+#define MTX_INT_Q3_TXOP_RUNOUT_I_MSK 0xff7fffff
+#define MTX_INT_Q3_TXOP_RUNOUT_SFT 23
+#define MTX_INT_Q3_TXOP_RUNOUT_HI 23
+#define MTX_INT_Q3_TXOP_RUNOUT_SZ 1
+#define MTX_INT_Q4_Q_EMPTY_MSK 0x01000000
+#define MTX_INT_Q4_Q_EMPTY_I_MSK 0xfeffffff
+#define MTX_INT_Q4_Q_EMPTY_SFT 24
+#define MTX_INT_Q4_Q_EMPTY_HI 24
+#define MTX_INT_Q4_Q_EMPTY_SZ 1
+#define MTX_INT_Q4_TXOP_RUNOUT_MSK 0x02000000
+#define MTX_INT_Q4_TXOP_RUNOUT_I_MSK 0xfdffffff
+#define MTX_INT_Q4_TXOP_RUNOUT_SFT 25
+#define MTX_INT_Q4_TXOP_RUNOUT_HI 25
+#define MTX_INT_Q4_TXOP_RUNOUT_SZ 1
+#define MTX_EN_INT_Q0_Q_EMPTY_MSK 0x00010000
+#define MTX_EN_INT_Q0_Q_EMPTY_I_MSK 0xfffeffff
+#define MTX_EN_INT_Q0_Q_EMPTY_SFT 16
+#define MTX_EN_INT_Q0_Q_EMPTY_HI 16
+#define MTX_EN_INT_Q0_Q_EMPTY_SZ 1
+#define MTX_EN_INT_Q0_TXOP_RUNOUT_MSK 0x00020000
+#define MTX_EN_INT_Q0_TXOP_RUNOUT_I_MSK 0xfffdffff
+#define MTX_EN_INT_Q0_TXOP_RUNOUT_SFT 17
+#define MTX_EN_INT_Q0_TXOP_RUNOUT_HI 17
+#define MTX_EN_INT_Q0_TXOP_RUNOUT_SZ 1
+#define MTX_EN_INT_Q1_Q_EMPTY_MSK 0x00040000
+#define MTX_EN_INT_Q1_Q_EMPTY_I_MSK 0xfffbffff
+#define MTX_EN_INT_Q1_Q_EMPTY_SFT 18
+#define MTX_EN_INT_Q1_Q_EMPTY_HI 18
+#define MTX_EN_INT_Q1_Q_EMPTY_SZ 1
+#define MTX_EN_INT_Q1_TXOP_RUNOUT_MSK 0x00080000
+#define MTX_EN_INT_Q1_TXOP_RUNOUT_I_MSK 0xfff7ffff
+#define MTX_EN_INT_Q1_TXOP_RUNOUT_SFT 19
+#define MTX_EN_INT_Q1_TXOP_RUNOUT_HI 19
+#define MTX_EN_INT_Q1_TXOP_RUNOUT_SZ 1
+#define MTX_EN_INT_Q2_Q_EMPTY_MSK 0x00100000
+#define MTX_EN_INT_Q2_Q_EMPTY_I_MSK 0xffefffff
+#define MTX_EN_INT_Q2_Q_EMPTY_SFT 20
+#define MTX_EN_INT_Q2_Q_EMPTY_HI 20
+#define MTX_EN_INT_Q2_Q_EMPTY_SZ 1
+#define MTX_EN_INT_Q2_TXOP_RUNOUT_MSK 0x00200000
+#define MTX_EN_INT_Q2_TXOP_RUNOUT_I_MSK 0xffdfffff
+#define MTX_EN_INT_Q2_TXOP_RUNOUT_SFT 21
+#define MTX_EN_INT_Q2_TXOP_RUNOUT_HI 21
+#define MTX_EN_INT_Q2_TXOP_RUNOUT_SZ 1
+#define MTX_EN_INT_Q3_Q_EMPTY_MSK 0x00400000
+#define MTX_EN_INT_Q3_Q_EMPTY_I_MSK 0xffbfffff
+#define MTX_EN_INT_Q3_Q_EMPTY_SFT 22
+#define MTX_EN_INT_Q3_Q_EMPTY_HI 22
+#define MTX_EN_INT_Q3_Q_EMPTY_SZ 1
+#define MTX_EN_INT_Q3_TXOP_RUNOUT_MSK 0x00800000
+#define MTX_EN_INT_Q3_TXOP_RUNOUT_I_MSK 0xff7fffff
+#define MTX_EN_INT_Q3_TXOP_RUNOUT_SFT 23
+#define MTX_EN_INT_Q3_TXOP_RUNOUT_HI 23
+#define MTX_EN_INT_Q3_TXOP_RUNOUT_SZ 1
+#define MTX_EN_INT_Q4_Q_EMPTY_MSK 0x01000000
+#define MTX_EN_INT_Q4_Q_EMPTY_I_MSK 0xfeffffff
+#define MTX_EN_INT_Q4_Q_EMPTY_SFT 24
+#define MTX_EN_INT_Q4_Q_EMPTY_HI 24
+#define MTX_EN_INT_Q4_Q_EMPTY_SZ 1
+#define MTX_EN_INT_Q4_TXOP_RUNOUT_MSK 0x02000000
+#define MTX_EN_INT_Q4_TXOP_RUNOUT_I_MSK 0xfdffffff
+#define MTX_EN_INT_Q4_TXOP_RUNOUT_SFT 25
+#define MTX_EN_INT_Q4_TXOP_RUNOUT_HI 25
+#define MTX_EN_INT_Q4_TXOP_RUNOUT_SZ 1
+#define MTX_MTX2PHY_SLOW_MSK 0x00000001
+#define MTX_MTX2PHY_SLOW_I_MSK 0xfffffffe
+#define MTX_MTX2PHY_SLOW_SFT 0
+#define MTX_MTX2PHY_SLOW_HI 0
+#define MTX_MTX2PHY_SLOW_SZ 1
+#define MTX_M2M_SLOW_PRD_MSK 0x0000000e
+#define MTX_M2M_SLOW_PRD_I_MSK 0xfffffff1
+#define MTX_M2M_SLOW_PRD_SFT 1
+#define MTX_M2M_SLOW_PRD_HI 3
+#define MTX_M2M_SLOW_PRD_SZ 3
+#define MTX_AMPDU_CRC_AUTO_MSK 0x00000020
+#define MTX_AMPDU_CRC_AUTO_I_MSK 0xffffffdf
+#define MTX_AMPDU_CRC_AUTO_SFT 5
+#define MTX_AMPDU_CRC_AUTO_HI 5
+#define MTX_AMPDU_CRC_AUTO_SZ 1
+#define MTX_FAST_RSP_MODE_MSK 0x00000040
+#define MTX_FAST_RSP_MODE_I_MSK 0xffffffbf
+#define MTX_FAST_RSP_MODE_SFT 6
+#define MTX_FAST_RSP_MODE_HI 6
+#define MTX_FAST_RSP_MODE_SZ 1
+#define MTX_RAW_DATA_MODE_MSK 0x00000080
+#define MTX_RAW_DATA_MODE_I_MSK 0xffffff7f
+#define MTX_RAW_DATA_MODE_SFT 7
+#define MTX_RAW_DATA_MODE_HI 7
+#define MTX_RAW_DATA_MODE_SZ 1
+#define MTX_ACK_DUR0_MSK 0x00000100
+#define MTX_ACK_DUR0_I_MSK 0xfffffeff
+#define MTX_ACK_DUR0_SFT 8
+#define MTX_ACK_DUR0_HI 8
+#define MTX_ACK_DUR0_SZ 1
+#define MTX_TSF_AUTO_BCN_MSK 0x00000400
+#define MTX_TSF_AUTO_BCN_I_MSK 0xfffffbff
+#define MTX_TSF_AUTO_BCN_SFT 10
+#define MTX_TSF_AUTO_BCN_HI 10
+#define MTX_TSF_AUTO_BCN_SZ 1
+#define MTX_TSF_AUTO_MISC_MSK 0x00000800
+#define MTX_TSF_AUTO_MISC_I_MSK 0xfffff7ff
+#define MTX_TSF_AUTO_MISC_SFT 11
+#define MTX_TSF_AUTO_MISC_HI 11
+#define MTX_TSF_AUTO_MISC_SZ 1
+#define MTX_FORCE_CS_IDLE_MSK 0x00001000
+#define MTX_FORCE_CS_IDLE_I_MSK 0xffffefff
+#define MTX_FORCE_CS_IDLE_SFT 12
+#define MTX_FORCE_CS_IDLE_HI 12
+#define MTX_FORCE_CS_IDLE_SZ 1
+#define MTX_FORCE_BKF_RXEN0_MSK 0x00002000
+#define MTX_FORCE_BKF_RXEN0_I_MSK 0xffffdfff
+#define MTX_FORCE_BKF_RXEN0_SFT 13
+#define MTX_FORCE_BKF_RXEN0_HI 13
+#define MTX_FORCE_BKF_RXEN0_SZ 1
+#define MTX_FORCE_DMA_RXEN0_MSK 0x00004000
+#define MTX_FORCE_DMA_RXEN0_I_MSK 0xffffbfff
+#define MTX_FORCE_DMA_RXEN0_SFT 14
+#define MTX_FORCE_DMA_RXEN0_HI 14
+#define MTX_FORCE_DMA_RXEN0_SZ 1
+#define MTX_FORCE_RXEN0_MSK 0x00008000
+#define MTX_FORCE_RXEN0_I_MSK 0xffff7fff
+#define MTX_FORCE_RXEN0_SFT 15
+#define MTX_FORCE_RXEN0_HI 15
+#define MTX_FORCE_RXEN0_SZ 1
+#define MTX_HALT_Q_MB_MSK 0x003f0000
+#define MTX_HALT_Q_MB_I_MSK 0xffc0ffff
+#define MTX_HALT_Q_MB_SFT 16
+#define MTX_HALT_Q_MB_HI 21
+#define MTX_HALT_Q_MB_SZ 6
+#define MTX_CTS_SET_DIF_MSK 0x00400000
+#define MTX_CTS_SET_DIF_I_MSK 0xffbfffff
+#define MTX_CTS_SET_DIF_SFT 22
+#define MTX_CTS_SET_DIF_HI 22
+#define MTX_CTS_SET_DIF_SZ 1
+#define MTX_AMPDU_SET_DIF_MSK 0x00800000
+#define MTX_AMPDU_SET_DIF_I_MSK 0xff7fffff
+#define MTX_AMPDU_SET_DIF_SFT 23
+#define MTX_AMPDU_SET_DIF_HI 23
+#define MTX_AMPDU_SET_DIF_SZ 1
+#define MTX_EDCCA_TOUT_MSK 0x000003ff
+#define MTX_EDCCA_TOUT_I_MSK 0xfffffc00
+#define MTX_EDCCA_TOUT_SFT 0
+#define MTX_EDCCA_TOUT_HI 9
+#define MTX_EDCCA_TOUT_SZ 10
+#define MTX_INT_BCN_MSK 0x00000002
+#define MTX_INT_BCN_I_MSK 0xfffffffd
+#define MTX_INT_BCN_SFT 1
+#define MTX_INT_BCN_HI 1
+#define MTX_INT_BCN_SZ 1
+#define MTX_INT_DTIM_MSK 0x00000008
+#define MTX_INT_DTIM_I_MSK 0xfffffff7
+#define MTX_INT_DTIM_SFT 3
+#define MTX_INT_DTIM_HI 3
+#define MTX_INT_DTIM_SZ 1
+#define MTX_EN_INT_BCN_MSK 0x00000002
+#define MTX_EN_INT_BCN_I_MSK 0xfffffffd
+#define MTX_EN_INT_BCN_SFT 1
+#define MTX_EN_INT_BCN_HI 1
+#define MTX_EN_INT_BCN_SZ 1
+#define MTX_EN_INT_DTIM_MSK 0x00000008
+#define MTX_EN_INT_DTIM_I_MSK 0xfffffff7
+#define MTX_EN_INT_DTIM_SFT 3
+#define MTX_EN_INT_DTIM_HI 3
+#define MTX_EN_INT_DTIM_SZ 1
+#define MTX_BCN_TIMER_EN_MSK 0x00000001
+#define MTX_BCN_TIMER_EN_I_MSK 0xfffffffe
+#define MTX_BCN_TIMER_EN_SFT 0
+#define MTX_BCN_TIMER_EN_HI 0
+#define MTX_BCN_TIMER_EN_SZ 1
+#define MTX_TIME_STAMP_AUTO_FILL_MSK 0x00000002
+#define MTX_TIME_STAMP_AUTO_FILL_I_MSK 0xfffffffd
+#define MTX_TIME_STAMP_AUTO_FILL_SFT 1
+#define MTX_TIME_STAMP_AUTO_FILL_HI 1
+#define MTX_TIME_STAMP_AUTO_FILL_SZ 1
+#define MTX_TSF_TIMER_EN_MSK 0x00000020
+#define MTX_TSF_TIMER_EN_I_MSK 0xffffffdf
+#define MTX_TSF_TIMER_EN_SFT 5
+#define MTX_TSF_TIMER_EN_HI 5
+#define MTX_TSF_TIMER_EN_SZ 1
+#define MTX_HALT_MNG_UNTIL_DTIM_MSK 0x00000040
+#define MTX_HALT_MNG_UNTIL_DTIM_I_MSK 0xffffffbf
+#define MTX_HALT_MNG_UNTIL_DTIM_SFT 6
+#define MTX_HALT_MNG_UNTIL_DTIM_HI 6
+#define MTX_HALT_MNG_UNTIL_DTIM_SZ 1
+#define MTX_INT_DTIM_NUM_MSK 0x0000ff00
+#define MTX_INT_DTIM_NUM_I_MSK 0xffff00ff
+#define MTX_INT_DTIM_NUM_SFT 8
+#define MTX_INT_DTIM_NUM_HI 15
+#define MTX_INT_DTIM_NUM_SZ 8
+#define MTX_AUTO_FLUSH_Q4_MSK 0x00010000
+#define MTX_AUTO_FLUSH_Q4_I_MSK 0xfffeffff
+#define MTX_AUTO_FLUSH_Q4_SFT 16
+#define MTX_AUTO_FLUSH_Q4_HI 16
+#define MTX_AUTO_FLUSH_Q4_SZ 1
+#define MTX_BCN_PKTID_CH_LOCK_MSK 0x00000001
+#define MTX_BCN_PKTID_CH_LOCK_I_MSK 0xfffffffe
+#define MTX_BCN_PKTID_CH_LOCK_SFT 0
+#define MTX_BCN_PKTID_CH_LOCK_HI 0
+#define MTX_BCN_PKTID_CH_LOCK_SZ 1
+#define MTX_BCN_CFG_VLD_MSK 0x00000006
+#define MTX_BCN_CFG_VLD_I_MSK 0xfffffff9
+#define MTX_BCN_CFG_VLD_SFT 1
+#define MTX_BCN_CFG_VLD_HI 2
+#define MTX_BCN_CFG_VLD_SZ 2
+#define MTX_AUTO_BCN_ONGOING_MSK 0x00000008
+#define MTX_AUTO_BCN_ONGOING_I_MSK 0xfffffff7
+#define MTX_AUTO_BCN_ONGOING_SFT 3
+#define MTX_AUTO_BCN_ONGOING_HI 3
+#define MTX_AUTO_BCN_ONGOING_SZ 1
+#define MTX_BCN_TIMER_MSK 0xffff0000
+#define MTX_BCN_TIMER_I_MSK 0x0000ffff
+#define MTX_BCN_TIMER_SFT 16
+#define MTX_BCN_TIMER_HI 31
+#define MTX_BCN_TIMER_SZ 16
+#define MTX_BCN_PERIOD_MSK 0x0000ffff
+#define MTX_BCN_PERIOD_I_MSK 0xffff0000
+#define MTX_BCN_PERIOD_SFT 0
+#define MTX_BCN_PERIOD_HI 15
+#define MTX_BCN_PERIOD_SZ 16
+#define MTX_DTIM_NUM_MSK 0xff000000
+#define MTX_DTIM_NUM_I_MSK 0x00ffffff
+#define MTX_DTIM_NUM_SFT 24
+#define MTX_DTIM_NUM_HI 31
+#define MTX_DTIM_NUM_SZ 8
+#define MTX_BCN_TSF_L_MSK 0xffffffff
+#define MTX_BCN_TSF_L_I_MSK 0x00000000
+#define MTX_BCN_TSF_L_SFT 0
+#define MTX_BCN_TSF_L_HI 31
+#define MTX_BCN_TSF_L_SZ 32
+#define MTX_BCN_TSF_U_MSK 0xffffffff
+#define MTX_BCN_TSF_U_I_MSK 0x00000000
+#define MTX_BCN_TSF_U_SFT 0
+#define MTX_BCN_TSF_U_HI 31
+#define MTX_BCN_TSF_U_SZ 32
+#define MTX_BCN_PKT_ID0_MSK 0x0000007f
+#define MTX_BCN_PKT_ID0_I_MSK 0xffffff80
+#define MTX_BCN_PKT_ID0_SFT 0
+#define MTX_BCN_PKT_ID0_HI 6
+#define MTX_BCN_PKT_ID0_SZ 7
+#define MTX_DTIM_OFST0_MSK 0x03ff0000
+#define MTX_DTIM_OFST0_I_MSK 0xfc00ffff
+#define MTX_DTIM_OFST0_SFT 16
+#define MTX_DTIM_OFST0_HI 25
+#define MTX_DTIM_OFST0_SZ 10
+#define MTX_BCN_PKT_ID1_MSK 0x0000007f
+#define MTX_BCN_PKT_ID1_I_MSK 0xffffff80
+#define MTX_BCN_PKT_ID1_SFT 0
+#define MTX_BCN_PKT_ID1_HI 6
+#define MTX_BCN_PKT_ID1_SZ 7
+#define MTX_DTIM_OFST1_MSK 0x03ff0000
+#define MTX_DTIM_OFST1_I_MSK 0xfc00ffff
+#define MTX_DTIM_OFST1_SFT 16
+#define MTX_DTIM_OFST1_HI 25
+#define MTX_DTIM_OFST1_SZ 10
+#define MTX_CCA_MSK 0x00000001
+#define MTX_CCA_I_MSK 0xfffffffe
+#define MTX_CCA_SFT 0
+#define MTX_CCA_HI 0
+#define MTX_CCA_SZ 1
+#define MRX_CCA_MSK 0x00000002
+#define MRX_CCA_I_MSK 0xfffffffd
+#define MRX_CCA_SFT 1
+#define MRX_CCA_HI 1
+#define MRX_CCA_SZ 1
+#define MTX_DMA_FSM_MSK 0x0000001c
+#define MTX_DMA_FSM_I_MSK 0xffffffe3
+#define MTX_DMA_FSM_SFT 2
+#define MTX_DMA_FSM_HI 4
+#define MTX_DMA_FSM_SZ 3
+#define CH_ST_FSM_MSK 0x000000e0
+#define CH_ST_FSM_I_MSK 0xffffff1f
+#define CH_ST_FSM_SFT 5
+#define CH_ST_FSM_HI 7
+#define CH_ST_FSM_SZ 3
+#define MTX_GNT_LOCK_MSK 0x00000100
+#define MTX_GNT_LOCK_I_MSK 0xfffffeff
+#define MTX_GNT_LOCK_SFT 8
+#define MTX_GNT_LOCK_HI 8
+#define MTX_GNT_LOCK_SZ 1
+#define MTX_DMA_REQ_MSK 0x00000200
+#define MTX_DMA_REQ_I_MSK 0xfffffdff
+#define MTX_DMA_REQ_SFT 9
+#define MTX_DMA_REQ_HI 9
+#define MTX_DMA_REQ_SZ 1
+#define MTX_Q_REQ_MSK 0x00000400
+#define MTX_Q_REQ_I_MSK 0xfffffbff
+#define MTX_Q_REQ_SFT 10
+#define MTX_Q_REQ_HI 10
+#define MTX_Q_REQ_SZ 1
+#define MTX_TX_EN_MSK 0x00000800
+#define MTX_TX_EN_I_MSK 0xfffff7ff
+#define MTX_TX_EN_SFT 11
+#define MTX_TX_EN_HI 11
+#define MTX_TX_EN_SZ 1
+#define MRX_RX_EN_MSK 0x00001000
+#define MRX_RX_EN_I_MSK 0xffffefff
+#define MRX_RX_EN_SFT 12
+#define MRX_RX_EN_HI 12
+#define MRX_RX_EN_SZ 1
+#define DBG_PRTC_PRD_MSK 0x00002000
+#define DBG_PRTC_PRD_I_MSK 0xffffdfff
+#define DBG_PRTC_PRD_SFT 13
+#define DBG_PRTC_PRD_HI 13
+#define DBG_PRTC_PRD_SZ 1
+#define DBG_DMA_RDY_MSK 0x00004000
+#define DBG_DMA_RDY_I_MSK 0xffffbfff
+#define DBG_DMA_RDY_SFT 14
+#define DBG_DMA_RDY_HI 14
+#define DBG_DMA_RDY_SZ 1
+#define DBG_WAIT_RSP_MSK 0x00008000
+#define DBG_WAIT_RSP_I_MSK 0xffff7fff
+#define DBG_WAIT_RSP_SFT 15
+#define DBG_WAIT_RSP_HI 15
+#define DBG_WAIT_RSP_SZ 1
+#define DBG_CFRM_BUSY_MSK 0x00010000
+#define DBG_CFRM_BUSY_I_MSK 0xfffeffff
+#define DBG_CFRM_BUSY_SFT 16
+#define DBG_CFRM_BUSY_HI 16
+#define DBG_CFRM_BUSY_SZ 1
+#define DBG_RST_MSK 0x00000001
+#define DBG_RST_I_MSK 0xfffffffe
+#define DBG_RST_SFT 0
+#define DBG_RST_HI 0
+#define DBG_RST_SZ 1
+#define DBG_MODE_MSK 0x00000002
+#define DBG_MODE_I_MSK 0xfffffffd
+#define DBG_MODE_SFT 1
+#define DBG_MODE_HI 1
+#define DBG_MODE_SZ 1
+#define MB_REQ_DUR_MSK 0x0000ffff
+#define MB_REQ_DUR_I_MSK 0xffff0000
+#define MB_REQ_DUR_SFT 0
+#define MB_REQ_DUR_HI 15
+#define MB_REQ_DUR_SZ 16
+#define RX_EN_DUR_MSK 0xffff0000
+#define RX_EN_DUR_I_MSK 0x0000ffff
+#define RX_EN_DUR_SFT 16
+#define RX_EN_DUR_HI 31
+#define RX_EN_DUR_SZ 16
+#define RX_CS_DUR_MSK 0x0000ffff
+#define RX_CS_DUR_I_MSK 0xffff0000
+#define RX_CS_DUR_SFT 0
+#define RX_CS_DUR_HI 15
+#define RX_CS_DUR_SZ 16
+#define TX_CCA_DUR_MSK 0xffff0000
+#define TX_CCA_DUR_I_MSK 0x0000ffff
+#define TX_CCA_DUR_SFT 16
+#define TX_CCA_DUR_HI 31
+#define TX_CCA_DUR_SZ 16
+#define Q_REQ_DUR_MSK 0x0000ffff
+#define Q_REQ_DUR_I_MSK 0xffff0000
+#define Q_REQ_DUR_SFT 0
+#define Q_REQ_DUR_HI 15
+#define Q_REQ_DUR_SZ 16
+#define CH_STA0_DUR_MSK 0xffff0000
+#define CH_STA0_DUR_I_MSK 0x0000ffff
+#define CH_STA0_DUR_SFT 16
+#define CH_STA0_DUR_HI 31
+#define CH_STA0_DUR_SZ 16
+#define MTX_DUR_RSP_TOUT_B_MSK 0x000000ff
+#define MTX_DUR_RSP_TOUT_B_I_MSK 0xffffff00
+#define MTX_DUR_RSP_TOUT_B_SFT 0
+#define MTX_DUR_RSP_TOUT_B_HI 7
+#define MTX_DUR_RSP_TOUT_B_SZ 8
+#define MTX_DUR_RSP_TOUT_G_MSK 0x0000ff00
+#define MTX_DUR_RSP_TOUT_G_I_MSK 0xffff00ff
+#define MTX_DUR_RSP_TOUT_G_SFT 8
+#define MTX_DUR_RSP_TOUT_G_HI 15
+#define MTX_DUR_RSP_TOUT_G_SZ 8
+#define MTX_DUR_RSP_SIFS_MSK 0x000000ff
+#define MTX_DUR_RSP_SIFS_I_MSK 0xffffff00
+#define MTX_DUR_RSP_SIFS_SFT 0
+#define MTX_DUR_RSP_SIFS_HI 7
+#define MTX_DUR_RSP_SIFS_SZ 8
+#define MTX_DUR_BURST_SIFS_MSK 0x0000ff00
+#define MTX_DUR_BURST_SIFS_I_MSK 0xffff00ff
+#define MTX_DUR_BURST_SIFS_SFT 8
+#define MTX_DUR_BURST_SIFS_HI 15
+#define MTX_DUR_BURST_SIFS_SZ 8
+#define MTX_DUR_SLOT_MSK 0x003f0000
+#define MTX_DUR_SLOT_I_MSK 0xffc0ffff
+#define MTX_DUR_SLOT_SFT 16
+#define MTX_DUR_SLOT_HI 21
+#define MTX_DUR_SLOT_SZ 6
+#define MTX_DUR_RSP_EIFS_MSK 0xffc00000
+#define MTX_DUR_RSP_EIFS_I_MSK 0x003fffff
+#define MTX_DUR_RSP_EIFS_SFT 22
+#define MTX_DUR_RSP_EIFS_HI 31
+#define MTX_DUR_RSP_EIFS_SZ 10
+#define MTX_DUR_RSP_SIFS_G_MSK 0x000000ff
+#define MTX_DUR_RSP_SIFS_G_I_MSK 0xffffff00
+#define MTX_DUR_RSP_SIFS_G_SFT 0
+#define MTX_DUR_RSP_SIFS_G_HI 7
+#define MTX_DUR_RSP_SIFS_G_SZ 8
+#define MTX_DUR_BURST_SIFS_G_MSK 0x0000ff00
+#define MTX_DUR_BURST_SIFS_G_I_MSK 0xffff00ff
+#define MTX_DUR_BURST_SIFS_G_SFT 8
+#define MTX_DUR_BURST_SIFS_G_HI 15
+#define MTX_DUR_BURST_SIFS_G_SZ 8
+#define MTX_DUR_SLOT_G_MSK 0x003f0000
+#define MTX_DUR_SLOT_G_I_MSK 0xffc0ffff
+#define MTX_DUR_SLOT_G_SFT 16
+#define MTX_DUR_SLOT_G_HI 21
+#define MTX_DUR_SLOT_G_SZ 6
+#define MTX_DUR_RSP_EIFS_G_MSK 0xffc00000
+#define MTX_DUR_RSP_EIFS_G_I_MSK 0x003fffff
+#define MTX_DUR_RSP_EIFS_G_SFT 22
+#define MTX_DUR_RSP_EIFS_G_HI 31
+#define MTX_DUR_RSP_EIFS_G_SZ 10
+#define CH_STA1_DUR_MSK 0x0000ffff
+#define CH_STA1_DUR_I_MSK 0xffff0000
+#define CH_STA1_DUR_SFT 0
+#define CH_STA1_DUR_HI 15
+#define CH_STA1_DUR_SZ 16
+#define CH_STA2_DUR_MSK 0xffff0000
+#define CH_STA2_DUR_I_MSK 0x0000ffff
+#define CH_STA2_DUR_SFT 16
+#define CH_STA2_DUR_HI 31
+#define CH_STA2_DUR_SZ 16
+#define MTX_NAV_MSK 0x0000ffff
+#define MTX_NAV_I_MSK 0xffff0000
+#define MTX_NAV_SFT 0
+#define MTX_NAV_HI 15
+#define MTX_NAV_SZ 16
+#define MTX_MIB_CNT0_MSK 0x3fffffff
+#define MTX_MIB_CNT0_I_MSK 0xc0000000
+#define MTX_MIB_CNT0_SFT 0
+#define MTX_MIB_CNT0_HI 29
+#define MTX_MIB_CNT0_SZ 30
+#define MTX_MIB_EN0_MSK 0x40000000
+#define MTX_MIB_EN0_I_MSK 0xbfffffff
+#define MTX_MIB_EN0_SFT 30
+#define MTX_MIB_EN0_HI 30
+#define MTX_MIB_EN0_SZ 1
+#define MTX_MIB_CNT1_MSK 0x3fffffff
+#define MTX_MIB_CNT1_I_MSK 0xc0000000
+#define MTX_MIB_CNT1_SFT 0
+#define MTX_MIB_CNT1_HI 29
+#define MTX_MIB_CNT1_SZ 30
+#define MTX_MIB_EN1_MSK 0x40000000
+#define MTX_MIB_EN1_I_MSK 0xbfffffff
+#define MTX_MIB_EN1_SFT 30
+#define MTX_MIB_EN1_HI 30
+#define MTX_MIB_EN1_SZ 1
+#define CH_STA3_DUR_MSK 0x0000ffff
+#define CH_STA3_DUR_I_MSK 0xffff0000
+#define CH_STA3_DUR_SFT 0
+#define CH_STA3_DUR_HI 15
+#define CH_STA3_DUR_SZ 16
+#define CH_STA4_DUR_MSK 0xffff0000
+#define CH_STA4_DUR_I_MSK 0x0000ffff
+#define CH_STA4_DUR_SFT 16
+#define CH_STA4_DUR_HI 31
+#define CH_STA4_DUR_SZ 16
+#define TXQ0_MTX_Q_PRE_LD_MSK 0x00000002
+#define TXQ0_MTX_Q_PRE_LD_I_MSK 0xfffffffd
+#define TXQ0_MTX_Q_PRE_LD_SFT 1
+#define TXQ0_MTX_Q_PRE_LD_HI 1
+#define TXQ0_MTX_Q_PRE_LD_SZ 1
+#define TXQ0_MTX_Q_BKF_CNT_FIXED_MSK 0x00000004
+#define TXQ0_MTX_Q_BKF_CNT_FIXED_I_MSK 0xfffffffb
+#define TXQ0_MTX_Q_BKF_CNT_FIXED_SFT 2
+#define TXQ0_MTX_Q_BKF_CNT_FIXED_HI 2
+#define TXQ0_MTX_Q_BKF_CNT_FIXED_SZ 1
+#define TXQ0_MTX_Q_TXOP_SUB_FRM_TIME_MSK 0x00000008
+#define TXQ0_MTX_Q_TXOP_SUB_FRM_TIME_I_MSK 0xfffffff7
+#define TXQ0_MTX_Q_TXOP_SUB_FRM_TIME_SFT 3
+#define TXQ0_MTX_Q_TXOP_SUB_FRM_TIME_HI 3
+#define TXQ0_MTX_Q_TXOP_SUB_FRM_TIME_SZ 1
+#define TXQ0_MTX_Q_MB_NO_RLS_MSK 0x00000010
+#define TXQ0_MTX_Q_MB_NO_RLS_I_MSK 0xffffffef
+#define TXQ0_MTX_Q_MB_NO_RLS_SFT 4
+#define TXQ0_MTX_Q_MB_NO_RLS_HI 4
+#define TXQ0_MTX_Q_MB_NO_RLS_SZ 1
+#define TXQ0_MTX_Q_TXOP_FRC_BUR_MSK 0x00000020
+#define TXQ0_MTX_Q_TXOP_FRC_BUR_I_MSK 0xffffffdf
+#define TXQ0_MTX_Q_TXOP_FRC_BUR_SFT 5
+#define TXQ0_MTX_Q_TXOP_FRC_BUR_HI 5
+#define TXQ0_MTX_Q_TXOP_FRC_BUR_SZ 1
+#define TXQ0_MTX_Q_RND_MODE_MSK 0x000000c0
+#define TXQ0_MTX_Q_RND_MODE_I_MSK 0xffffff3f
+#define TXQ0_MTX_Q_RND_MODE_SFT 6
+#define TXQ0_MTX_Q_RND_MODE_HI 7
+#define TXQ0_MTX_Q_RND_MODE_SZ 2
+#define TXQ0_MTX_Q_AIFSN_MSK 0x0000000f
+#define TXQ0_MTX_Q_AIFSN_I_MSK 0xfffffff0
+#define TXQ0_MTX_Q_AIFSN_SFT 0
+#define TXQ0_MTX_Q_AIFSN_HI 3
+#define TXQ0_MTX_Q_AIFSN_SZ 4
+#define TXQ0_MTX_Q_ECWMIN_MSK 0x00000f00
+#define TXQ0_MTX_Q_ECWMIN_I_MSK 0xfffff0ff
+#define TXQ0_MTX_Q_ECWMIN_SFT 8
+#define TXQ0_MTX_Q_ECWMIN_HI 11
+#define TXQ0_MTX_Q_ECWMIN_SZ 4
+#define TXQ0_MTX_Q_ECWMAX_MSK 0x0000f000
+#define TXQ0_MTX_Q_ECWMAX_I_MSK 0xffff0fff
+#define TXQ0_MTX_Q_ECWMAX_SFT 12
+#define TXQ0_MTX_Q_ECWMAX_HI 15
+#define TXQ0_MTX_Q_ECWMAX_SZ 4
+#define TXQ0_MTX_Q_TXOP_LIMIT_MSK 0xffff0000
+#define TXQ0_MTX_Q_TXOP_LIMIT_I_MSK 0x0000ffff
+#define TXQ0_MTX_Q_TXOP_LIMIT_SFT 16
+#define TXQ0_MTX_Q_TXOP_LIMIT_HI 31
+#define TXQ0_MTX_Q_TXOP_LIMIT_SZ 16
+#define TXQ0_MTX_Q_BKF_CNT_MSK 0x0000ffff
+#define TXQ0_MTX_Q_BKF_CNT_I_MSK 0xffff0000
+#define TXQ0_MTX_Q_BKF_CNT_SFT 0
+#define TXQ0_MTX_Q_BKF_CNT_HI 15
+#define TXQ0_MTX_Q_BKF_CNT_SZ 16
+#define TXQ0_MTX_Q_SRC_LIMIT_MSK 0x000000ff
+#define TXQ0_MTX_Q_SRC_LIMIT_I_MSK 0xffffff00
+#define TXQ0_MTX_Q_SRC_LIMIT_SFT 0
+#define TXQ0_MTX_Q_SRC_LIMIT_HI 7
+#define TXQ0_MTX_Q_SRC_LIMIT_SZ 8
+#define TXQ0_MTX_Q_LRC_LIMIT_MSK 0x0000ff00
+#define TXQ0_MTX_Q_LRC_LIMIT_I_MSK 0xffff00ff
+#define TXQ0_MTX_Q_LRC_LIMIT_SFT 8
+#define TXQ0_MTX_Q_LRC_LIMIT_HI 15
+#define TXQ0_MTX_Q_LRC_LIMIT_SZ 8
+#define TXQ0_MTX_Q_ID_MAP_L_MSK 0xffffffff
+#define TXQ0_MTX_Q_ID_MAP_L_I_MSK 0x00000000
+#define TXQ0_MTX_Q_ID_MAP_L_SFT 0
+#define TXQ0_MTX_Q_ID_MAP_L_HI 31
+#define TXQ0_MTX_Q_ID_MAP_L_SZ 32
+#define TXQ0_MTX_Q_TXOP_CH_THD_MSK 0x0000ffff
+#define TXQ0_MTX_Q_TXOP_CH_THD_I_MSK 0xffff0000
+#define TXQ0_MTX_Q_TXOP_CH_THD_SFT 0
+#define TXQ0_MTX_Q_TXOP_CH_THD_HI 15
+#define TXQ0_MTX_Q_TXOP_CH_THD_SZ 16
+#define TXQ0_MTX_Q_TXOP_OV_THD_MSK 0x0000ffff
+#define TXQ0_MTX_Q_TXOP_OV_THD_I_MSK 0xffff0000
+#define TXQ0_MTX_Q_TXOP_OV_THD_SFT 0
+#define TXQ0_MTX_Q_TXOP_OV_THD_HI 15
+#define TXQ0_MTX_Q_TXOP_OV_THD_SZ 16
+#define TXQ1_MTX_Q_PRE_LD_MSK 0x00000002
+#define TXQ1_MTX_Q_PRE_LD_I_MSK 0xfffffffd
+#define TXQ1_MTX_Q_PRE_LD_SFT 1
+#define TXQ1_MTX_Q_PRE_LD_HI 1
+#define TXQ1_MTX_Q_PRE_LD_SZ 1
+#define TXQ1_MTX_Q_BKF_CNT_FIXED_MSK 0x00000004
+#define TXQ1_MTX_Q_BKF_CNT_FIXED_I_MSK 0xfffffffb
+#define TXQ1_MTX_Q_BKF_CNT_FIXED_SFT 2
+#define TXQ1_MTX_Q_BKF_CNT_FIXED_HI 2
+#define TXQ1_MTX_Q_BKF_CNT_FIXED_SZ 1
+#define TXQ1_MTX_Q_TXOP_SUB_FRM_TIME_MSK 0x00000008
+#define TXQ1_MTX_Q_TXOP_SUB_FRM_TIME_I_MSK 0xfffffff7
+#define TXQ1_MTX_Q_TXOP_SUB_FRM_TIME_SFT 3
+#define TXQ1_MTX_Q_TXOP_SUB_FRM_TIME_HI 3
+#define TXQ1_MTX_Q_TXOP_SUB_FRM_TIME_SZ 1
+#define TXQ1_MTX_Q_MB_NO_RLS_MSK 0x00000010
+#define TXQ1_MTX_Q_MB_NO_RLS_I_MSK 0xffffffef
+#define TXQ1_MTX_Q_MB_NO_RLS_SFT 4
+#define TXQ1_MTX_Q_MB_NO_RLS_HI 4
+#define TXQ1_MTX_Q_MB_NO_RLS_SZ 1
+#define TXQ1_MTX_Q_TXOP_FRC_BUR_MSK 0x00000020
+#define TXQ1_MTX_Q_TXOP_FRC_BUR_I_MSK 0xffffffdf
+#define TXQ1_MTX_Q_TXOP_FRC_BUR_SFT 5
+#define TXQ1_MTX_Q_TXOP_FRC_BUR_HI 5
+#define TXQ1_MTX_Q_TXOP_FRC_BUR_SZ 1
+#define TXQ1_MTX_Q_RND_MODE_MSK 0x000000c0
+#define TXQ1_MTX_Q_RND_MODE_I_MSK 0xffffff3f
+#define TXQ1_MTX_Q_RND_MODE_SFT 6
+#define TXQ1_MTX_Q_RND_MODE_HI 7
+#define TXQ1_MTX_Q_RND_MODE_SZ 2
+#define TXQ1_MTX_Q_AIFSN_MSK 0x0000000f
+#define TXQ1_MTX_Q_AIFSN_I_MSK 0xfffffff0
+#define TXQ1_MTX_Q_AIFSN_SFT 0
+#define TXQ1_MTX_Q_AIFSN_HI 3
+#define TXQ1_MTX_Q_AIFSN_SZ 4
+#define TXQ1_MTX_Q_ECWMIN_MSK 0x00000f00
+#define TXQ1_MTX_Q_ECWMIN_I_MSK 0xfffff0ff
+#define TXQ1_MTX_Q_ECWMIN_SFT 8
+#define TXQ1_MTX_Q_ECWMIN_HI 11
+#define TXQ1_MTX_Q_ECWMIN_SZ 4
+#define TXQ1_MTX_Q_ECWMAX_MSK 0x0000f000
+#define TXQ1_MTX_Q_ECWMAX_I_MSK 0xffff0fff
+#define TXQ1_MTX_Q_ECWMAX_SFT 12
+#define TXQ1_MTX_Q_ECWMAX_HI 15
+#define TXQ1_MTX_Q_ECWMAX_SZ 4
+#define TXQ1_MTX_Q_TXOP_LIMIT_MSK 0xffff0000
+#define TXQ1_MTX_Q_TXOP_LIMIT_I_MSK 0x0000ffff
+#define TXQ1_MTX_Q_TXOP_LIMIT_SFT 16
+#define TXQ1_MTX_Q_TXOP_LIMIT_HI 31
+#define TXQ1_MTX_Q_TXOP_LIMIT_SZ 16
+#define TXQ1_MTX_Q_BKF_CNT_MSK 0x0000ffff
+#define TXQ1_MTX_Q_BKF_CNT_I_MSK 0xffff0000
+#define TXQ1_MTX_Q_BKF_CNT_SFT 0
+#define TXQ1_MTX_Q_BKF_CNT_HI 15
+#define TXQ1_MTX_Q_BKF_CNT_SZ 16
+#define TXQ1_MTX_Q_SRC_LIMIT_MSK 0x000000ff
+#define TXQ1_MTX_Q_SRC_LIMIT_I_MSK 0xffffff00
+#define TXQ1_MTX_Q_SRC_LIMIT_SFT 0
+#define TXQ1_MTX_Q_SRC_LIMIT_HI 7
+#define TXQ1_MTX_Q_SRC_LIMIT_SZ 8
+#define TXQ1_MTX_Q_LRC_LIMIT_MSK 0x0000ff00
+#define TXQ1_MTX_Q_LRC_LIMIT_I_MSK 0xffff00ff
+#define TXQ1_MTX_Q_LRC_LIMIT_SFT 8
+#define TXQ1_MTX_Q_LRC_LIMIT_HI 15
+#define TXQ1_MTX_Q_LRC_LIMIT_SZ 8
+#define TXQ1_MTX_Q_ID_MAP_L_MSK 0xffffffff
+#define TXQ1_MTX_Q_ID_MAP_L_I_MSK 0x00000000
+#define TXQ1_MTX_Q_ID_MAP_L_SFT 0
+#define TXQ1_MTX_Q_ID_MAP_L_HI 31
+#define TXQ1_MTX_Q_ID_MAP_L_SZ 32
+#define TXQ1_MTX_Q_TXOP_CH_THD_MSK 0x0000ffff
+#define TXQ1_MTX_Q_TXOP_CH_THD_I_MSK 0xffff0000
+#define TXQ1_MTX_Q_TXOP_CH_THD_SFT 0
+#define TXQ1_MTX_Q_TXOP_CH_THD_HI 15
+#define TXQ1_MTX_Q_TXOP_CH_THD_SZ 16
+#define TXQ1_MTX_Q_TXOP_OV_THD_MSK 0x0000ffff
+#define TXQ1_MTX_Q_TXOP_OV_THD_I_MSK 0xffff0000
+#define TXQ1_MTX_Q_TXOP_OV_THD_SFT 0
+#define TXQ1_MTX_Q_TXOP_OV_THD_HI 15
+#define TXQ1_MTX_Q_TXOP_OV_THD_SZ 16
+#define TXQ2_MTX_Q_PRE_LD_MSK 0x00000002
+#define TXQ2_MTX_Q_PRE_LD_I_MSK 0xfffffffd
+#define TXQ2_MTX_Q_PRE_LD_SFT 1
+#define TXQ2_MTX_Q_PRE_LD_HI 1
+#define TXQ2_MTX_Q_PRE_LD_SZ 1
+#define TXQ2_MTX_Q_BKF_CNT_FIXED_MSK 0x00000004
+#define TXQ2_MTX_Q_BKF_CNT_FIXED_I_MSK 0xfffffffb
+#define TXQ2_MTX_Q_BKF_CNT_FIXED_SFT 2
+#define TXQ2_MTX_Q_BKF_CNT_FIXED_HI 2
+#define TXQ2_MTX_Q_BKF_CNT_FIXED_SZ 1
+#define TXQ2_MTX_Q_TXOP_SUB_FRM_TIME_MSK 0x00000008
+#define TXQ2_MTX_Q_TXOP_SUB_FRM_TIME_I_MSK 0xfffffff7
+#define TXQ2_MTX_Q_TXOP_SUB_FRM_TIME_SFT 3
+#define TXQ2_MTX_Q_TXOP_SUB_FRM_TIME_HI 3
+#define TXQ2_MTX_Q_TXOP_SUB_FRM_TIME_SZ 1
+#define TXQ2_MTX_Q_MB_NO_RLS_MSK 0x00000010
+#define TXQ2_MTX_Q_MB_NO_RLS_I_MSK 0xffffffef
+#define TXQ2_MTX_Q_MB_NO_RLS_SFT 4
+#define TXQ2_MTX_Q_MB_NO_RLS_HI 4
+#define TXQ2_MTX_Q_MB_NO_RLS_SZ 1
+#define TXQ2_MTX_Q_TXOP_FRC_BUR_MSK 0x00000020
+#define TXQ2_MTX_Q_TXOP_FRC_BUR_I_MSK 0xffffffdf
+#define TXQ2_MTX_Q_TXOP_FRC_BUR_SFT 5
+#define TXQ2_MTX_Q_TXOP_FRC_BUR_HI 5
+#define TXQ2_MTX_Q_TXOP_FRC_BUR_SZ 1
+#define TXQ2_MTX_Q_RND_MODE_MSK 0x000000c0
+#define TXQ2_MTX_Q_RND_MODE_I_MSK 0xffffff3f
+#define TXQ2_MTX_Q_RND_MODE_SFT 6
+#define TXQ2_MTX_Q_RND_MODE_HI 7
+#define TXQ2_MTX_Q_RND_MODE_SZ 2
+#define TXQ2_MTX_Q_AIFSN_MSK 0x0000000f
+#define TXQ2_MTX_Q_AIFSN_I_MSK 0xfffffff0
+#define TXQ2_MTX_Q_AIFSN_SFT 0
+#define TXQ2_MTX_Q_AIFSN_HI 3
+#define TXQ2_MTX_Q_AIFSN_SZ 4
+#define TXQ2_MTX_Q_ECWMIN_MSK 0x00000f00
+#define TXQ2_MTX_Q_ECWMIN_I_MSK 0xfffff0ff
+#define TXQ2_MTX_Q_ECWMIN_SFT 8
+#define TXQ2_MTX_Q_ECWMIN_HI 11
+#define TXQ2_MTX_Q_ECWMIN_SZ 4
+#define TXQ2_MTX_Q_ECWMAX_MSK 0x0000f000
+#define TXQ2_MTX_Q_ECWMAX_I_MSK 0xffff0fff
+#define TXQ2_MTX_Q_ECWMAX_SFT 12
+#define TXQ2_MTX_Q_ECWMAX_HI 15
+#define TXQ2_MTX_Q_ECWMAX_SZ 4
+#define TXQ2_MTX_Q_TXOP_LIMIT_MSK 0xffff0000
+#define TXQ2_MTX_Q_TXOP_LIMIT_I_MSK 0x0000ffff
+#define TXQ2_MTX_Q_TXOP_LIMIT_SFT 16
+#define TXQ2_MTX_Q_TXOP_LIMIT_HI 31
+#define TXQ2_MTX_Q_TXOP_LIMIT_SZ 16
+#define TXQ2_MTX_Q_BKF_CNT_MSK 0x0000ffff
+#define TXQ2_MTX_Q_BKF_CNT_I_MSK 0xffff0000
+#define TXQ2_MTX_Q_BKF_CNT_SFT 0
+#define TXQ2_MTX_Q_BKF_CNT_HI 15
+#define TXQ2_MTX_Q_BKF_CNT_SZ 16
+#define TXQ2_MTX_Q_SRC_LIMIT_MSK 0x000000ff
+#define TXQ2_MTX_Q_SRC_LIMIT_I_MSK 0xffffff00
+#define TXQ2_MTX_Q_SRC_LIMIT_SFT 0
+#define TXQ2_MTX_Q_SRC_LIMIT_HI 7
+#define TXQ2_MTX_Q_SRC_LIMIT_SZ 8
+#define TXQ2_MTX_Q_LRC_LIMIT_MSK 0x0000ff00
+#define TXQ2_MTX_Q_LRC_LIMIT_I_MSK 0xffff00ff
+#define TXQ2_MTX_Q_LRC_LIMIT_SFT 8
+#define TXQ2_MTX_Q_LRC_LIMIT_HI 15
+#define TXQ2_MTX_Q_LRC_LIMIT_SZ 8
+#define TXQ2_MTX_Q_ID_MAP_L_MSK 0xffffffff
+#define TXQ2_MTX_Q_ID_MAP_L_I_MSK 0x00000000
+#define TXQ2_MTX_Q_ID_MAP_L_SFT 0
+#define TXQ2_MTX_Q_ID_MAP_L_HI 31
+#define TXQ2_MTX_Q_ID_MAP_L_SZ 32
+#define TXQ2_MTX_Q_TXOP_CH_THD_MSK 0x0000ffff
+#define TXQ2_MTX_Q_TXOP_CH_THD_I_MSK 0xffff0000
+#define TXQ2_MTX_Q_TXOP_CH_THD_SFT 0
+#define TXQ2_MTX_Q_TXOP_CH_THD_HI 15
+#define TXQ2_MTX_Q_TXOP_CH_THD_SZ 16
+#define TXQ2_MTX_Q_TXOP_OV_THD_MSK 0x0000ffff
+#define TXQ2_MTX_Q_TXOP_OV_THD_I_MSK 0xffff0000
+#define TXQ2_MTX_Q_TXOP_OV_THD_SFT 0
+#define TXQ2_MTX_Q_TXOP_OV_THD_HI 15
+#define TXQ2_MTX_Q_TXOP_OV_THD_SZ 16
+#define TXQ3_MTX_Q_PRE_LD_MSK 0x00000002
+#define TXQ3_MTX_Q_PRE_LD_I_MSK 0xfffffffd
+#define TXQ3_MTX_Q_PRE_LD_SFT 1
+#define TXQ3_MTX_Q_PRE_LD_HI 1
+#define TXQ3_MTX_Q_PRE_LD_SZ 1
+#define TXQ3_MTX_Q_BKF_CNT_FIXED_MSK 0x00000004
+#define TXQ3_MTX_Q_BKF_CNT_FIXED_I_MSK 0xfffffffb
+#define TXQ3_MTX_Q_BKF_CNT_FIXED_SFT 2
+#define TXQ3_MTX_Q_BKF_CNT_FIXED_HI 2
+#define TXQ3_MTX_Q_BKF_CNT_FIXED_SZ 1
+#define TXQ3_MTX_Q_TXOP_SUB_FRM_TIME_MSK 0x00000008
+#define TXQ3_MTX_Q_TXOP_SUB_FRM_TIME_I_MSK 0xfffffff7
+#define TXQ3_MTX_Q_TXOP_SUB_FRM_TIME_SFT 3
+#define TXQ3_MTX_Q_TXOP_SUB_FRM_TIME_HI 3
+#define TXQ3_MTX_Q_TXOP_SUB_FRM_TIME_SZ 1
+#define TXQ3_MTX_Q_MB_NO_RLS_MSK 0x00000010
+#define TXQ3_MTX_Q_MB_NO_RLS_I_MSK 0xffffffef
+#define TXQ3_MTX_Q_MB_NO_RLS_SFT 4
+#define TXQ3_MTX_Q_MB_NO_RLS_HI 4
+#define TXQ3_MTX_Q_MB_NO_RLS_SZ 1
+#define TXQ3_MTX_Q_TXOP_FRC_BUR_MSK 0x00000020
+#define TXQ3_MTX_Q_TXOP_FRC_BUR_I_MSK 0xffffffdf
+#define TXQ3_MTX_Q_TXOP_FRC_BUR_SFT 5
+#define TXQ3_MTX_Q_TXOP_FRC_BUR_HI 5
+#define TXQ3_MTX_Q_TXOP_FRC_BUR_SZ 1
+#define TXQ3_MTX_Q_RND_MODE_MSK 0x000000c0
+#define TXQ3_MTX_Q_RND_MODE_I_MSK 0xffffff3f
+#define TXQ3_MTX_Q_RND_MODE_SFT 6
+#define TXQ3_MTX_Q_RND_MODE_HI 7
+#define TXQ3_MTX_Q_RND_MODE_SZ 2
+#define TXQ3_MTX_Q_AIFSN_MSK 0x0000000f
+#define TXQ3_MTX_Q_AIFSN_I_MSK 0xfffffff0
+#define TXQ3_MTX_Q_AIFSN_SFT 0
+#define TXQ3_MTX_Q_AIFSN_HI 3
+#define TXQ3_MTX_Q_AIFSN_SZ 4
+#define TXQ3_MTX_Q_ECWMIN_MSK 0x00000f00
+#define TXQ3_MTX_Q_ECWMIN_I_MSK 0xfffff0ff
+#define TXQ3_MTX_Q_ECWMIN_SFT 8
+#define TXQ3_MTX_Q_ECWMIN_HI 11
+#define TXQ3_MTX_Q_ECWMIN_SZ 4
+#define TXQ3_MTX_Q_ECWMAX_MSK 0x0000f000
+#define TXQ3_MTX_Q_ECWMAX_I_MSK 0xffff0fff
+#define TXQ3_MTX_Q_ECWMAX_SFT 12
+#define TXQ3_MTX_Q_ECWMAX_HI 15
+#define TXQ3_MTX_Q_ECWMAX_SZ 4
+#define TXQ3_MTX_Q_TXOP_LIMIT_MSK 0xffff0000
+#define TXQ3_MTX_Q_TXOP_LIMIT_I_MSK 0x0000ffff
+#define TXQ3_MTX_Q_TXOP_LIMIT_SFT 16
+#define TXQ3_MTX_Q_TXOP_LIMIT_HI 31
+#define TXQ3_MTX_Q_TXOP_LIMIT_SZ 16
+#define TXQ3_MTX_Q_BKF_CNT_MSK 0x0000ffff
+#define TXQ3_MTX_Q_BKF_CNT_I_MSK 0xffff0000
+#define TXQ3_MTX_Q_BKF_CNT_SFT 0
+#define TXQ3_MTX_Q_BKF_CNT_HI 15
+#define TXQ3_MTX_Q_BKF_CNT_SZ 16
+#define TXQ3_MTX_Q_SRC_LIMIT_MSK 0x000000ff
+#define TXQ3_MTX_Q_SRC_LIMIT_I_MSK 0xffffff00
+#define TXQ3_MTX_Q_SRC_LIMIT_SFT 0
+#define TXQ3_MTX_Q_SRC_LIMIT_HI 7
+#define TXQ3_MTX_Q_SRC_LIMIT_SZ 8
+#define TXQ3_MTX_Q_LRC_LIMIT_MSK 0x0000ff00
+#define TXQ3_MTX_Q_LRC_LIMIT_I_MSK 0xffff00ff
+#define TXQ3_MTX_Q_LRC_LIMIT_SFT 8
+#define TXQ3_MTX_Q_LRC_LIMIT_HI 15
+#define TXQ3_MTX_Q_LRC_LIMIT_SZ 8
+#define TXQ3_MTX_Q_ID_MAP_L_MSK 0xffffffff
+#define TXQ3_MTX_Q_ID_MAP_L_I_MSK 0x00000000
+#define TXQ3_MTX_Q_ID_MAP_L_SFT 0
+#define TXQ3_MTX_Q_ID_MAP_L_HI 31
+#define TXQ3_MTX_Q_ID_MAP_L_SZ 32
+#define TXQ3_MTX_Q_TXOP_CH_THD_MSK 0x0000ffff
+#define TXQ3_MTX_Q_TXOP_CH_THD_I_MSK 0xffff0000
+#define TXQ3_MTX_Q_TXOP_CH_THD_SFT 0
+#define TXQ3_MTX_Q_TXOP_CH_THD_HI 15
+#define TXQ3_MTX_Q_TXOP_CH_THD_SZ 16
+#define TXQ3_MTX_Q_TXOP_OV_THD_MSK 0x0000ffff
+#define TXQ3_MTX_Q_TXOP_OV_THD_I_MSK 0xffff0000
+#define TXQ3_MTX_Q_TXOP_OV_THD_SFT 0
+#define TXQ3_MTX_Q_TXOP_OV_THD_HI 15
+#define TXQ3_MTX_Q_TXOP_OV_THD_SZ 16
+#define TXQ4_MTX_Q_PRE_LD_MSK 0x00000002
+#define TXQ4_MTX_Q_PRE_LD_I_MSK 0xfffffffd
+#define TXQ4_MTX_Q_PRE_LD_SFT 1
+#define TXQ4_MTX_Q_PRE_LD_HI 1
+#define TXQ4_MTX_Q_PRE_LD_SZ 1
+#define TXQ4_MTX_Q_BKF_CNT_FIXED_MSK 0x00000004
+#define TXQ4_MTX_Q_BKF_CNT_FIXED_I_MSK 0xfffffffb
+#define TXQ4_MTX_Q_BKF_CNT_FIXED_SFT 2
+#define TXQ4_MTX_Q_BKF_CNT_FIXED_HI 2
+#define TXQ4_MTX_Q_BKF_CNT_FIXED_SZ 1
+#define TXQ4_MTX_Q_TXOP_SUB_FRM_TIME_MSK 0x00000008
+#define TXQ4_MTX_Q_TXOP_SUB_FRM_TIME_I_MSK 0xfffffff7
+#define TXQ4_MTX_Q_TXOP_SUB_FRM_TIME_SFT 3
+#define TXQ4_MTX_Q_TXOP_SUB_FRM_TIME_HI 3
+#define TXQ4_MTX_Q_TXOP_SUB_FRM_TIME_SZ 1
+#define TXQ4_MTX_Q_MB_NO_RLS_MSK 0x00000010
+#define TXQ4_MTX_Q_MB_NO_RLS_I_MSK 0xffffffef
+#define TXQ4_MTX_Q_MB_NO_RLS_SFT 4
+#define TXQ4_MTX_Q_MB_NO_RLS_HI 4
+#define TXQ4_MTX_Q_MB_NO_RLS_SZ 1
+#define TXQ4_MTX_Q_TXOP_FRC_BUR_MSK 0x00000020
+#define TXQ4_MTX_Q_TXOP_FRC_BUR_I_MSK 0xffffffdf
+#define TXQ4_MTX_Q_TXOP_FRC_BUR_SFT 5
+#define TXQ4_MTX_Q_TXOP_FRC_BUR_HI 5
+#define TXQ4_MTX_Q_TXOP_FRC_BUR_SZ 1
+#define TXQ4_MTX_Q_RND_MODE_MSK 0x000000c0
+#define TXQ4_MTX_Q_RND_MODE_I_MSK 0xffffff3f
+#define TXQ4_MTX_Q_RND_MODE_SFT 6
+#define TXQ4_MTX_Q_RND_MODE_HI 7
+#define TXQ4_MTX_Q_RND_MODE_SZ 2
+#define TXQ4_MTX_Q_AIFSN_MSK 0x0000000f
+#define TXQ4_MTX_Q_AIFSN_I_MSK 0xfffffff0
+#define TXQ4_MTX_Q_AIFSN_SFT 0
+#define TXQ4_MTX_Q_AIFSN_HI 3
+#define TXQ4_MTX_Q_AIFSN_SZ 4
+#define TXQ4_MTX_Q_ECWMIN_MSK 0x00000f00
+#define TXQ4_MTX_Q_ECWMIN_I_MSK 0xfffff0ff
+#define TXQ4_MTX_Q_ECWMIN_SFT 8
+#define TXQ4_MTX_Q_ECWMIN_HI 11
+#define TXQ4_MTX_Q_ECWMIN_SZ 4
+#define TXQ4_MTX_Q_ECWMAX_MSK 0x0000f000
+#define TXQ4_MTX_Q_ECWMAX_I_MSK 0xffff0fff
+#define TXQ4_MTX_Q_ECWMAX_SFT 12
+#define TXQ4_MTX_Q_ECWMAX_HI 15
+#define TXQ4_MTX_Q_ECWMAX_SZ 4
+#define TXQ4_MTX_Q_TXOP_LIMIT_MSK 0xffff0000
+#define TXQ4_MTX_Q_TXOP_LIMIT_I_MSK 0x0000ffff
+#define TXQ4_MTX_Q_TXOP_LIMIT_SFT 16
+#define TXQ4_MTX_Q_TXOP_LIMIT_HI 31
+#define TXQ4_MTX_Q_TXOP_LIMIT_SZ 16
+#define TXQ4_MTX_Q_BKF_CNT_MSK 0x0000ffff
+#define TXQ4_MTX_Q_BKF_CNT_I_MSK 0xffff0000
+#define TXQ4_MTX_Q_BKF_CNT_SFT 0
+#define TXQ4_MTX_Q_BKF_CNT_HI 15
+#define TXQ4_MTX_Q_BKF_CNT_SZ 16
+#define TXQ4_MTX_Q_SRC_LIMIT_MSK 0x000000ff
+#define TXQ4_MTX_Q_SRC_LIMIT_I_MSK 0xffffff00
+#define TXQ4_MTX_Q_SRC_LIMIT_SFT 0
+#define TXQ4_MTX_Q_SRC_LIMIT_HI 7
+#define TXQ4_MTX_Q_SRC_LIMIT_SZ 8
+#define TXQ4_MTX_Q_LRC_LIMIT_MSK 0x0000ff00
+#define TXQ4_MTX_Q_LRC_LIMIT_I_MSK 0xffff00ff
+#define TXQ4_MTX_Q_LRC_LIMIT_SFT 8
+#define TXQ4_MTX_Q_LRC_LIMIT_HI 15
+#define TXQ4_MTX_Q_LRC_LIMIT_SZ 8
+#define TXQ4_MTX_Q_ID_MAP_L_MSK 0xffffffff
+#define TXQ4_MTX_Q_ID_MAP_L_I_MSK 0x00000000
+#define TXQ4_MTX_Q_ID_MAP_L_SFT 0
+#define TXQ4_MTX_Q_ID_MAP_L_HI 31
+#define TXQ4_MTX_Q_ID_MAP_L_SZ 32
+#define TXQ4_MTX_Q_TXOP_CH_THD_MSK 0x0000ffff
+#define TXQ4_MTX_Q_TXOP_CH_THD_I_MSK 0xffff0000
+#define TXQ4_MTX_Q_TXOP_CH_THD_SFT 0
+#define TXQ4_MTX_Q_TXOP_CH_THD_HI 15
+#define TXQ4_MTX_Q_TXOP_CH_THD_SZ 16
+#define TXQ4_MTX_Q_TXOP_OV_THD_MSK 0x0000ffff
+#define TXQ4_MTX_Q_TXOP_OV_THD_I_MSK 0xffff0000
+#define TXQ4_MTX_Q_TXOP_OV_THD_SFT 0
+#define TXQ4_MTX_Q_TXOP_OV_THD_HI 15
+#define TXQ4_MTX_Q_TXOP_OV_THD_SZ 16
+#define VALID0_MSK 0x00000001
+#define VALID0_I_MSK 0xfffffffe
+#define VALID0_SFT 0
+#define VALID0_HI 0
+#define VALID0_SZ 1
+#define PEER_QOS_EN0_MSK 0x00000002
+#define PEER_QOS_EN0_I_MSK 0xfffffffd
+#define PEER_QOS_EN0_SFT 1
+#define PEER_QOS_EN0_HI 1
+#define PEER_QOS_EN0_SZ 1
+#define PEER_OP_MODE0_MSK 0x0000000c
+#define PEER_OP_MODE0_I_MSK 0xfffffff3
+#define PEER_OP_MODE0_SFT 2
+#define PEER_OP_MODE0_HI 3
+#define PEER_OP_MODE0_SZ 2
+#define PEER_HT_MODE0_MSK 0x00000030
+#define PEER_HT_MODE0_I_MSK 0xffffffcf
+#define PEER_HT_MODE0_SFT 4
+#define PEER_HT_MODE0_HI 5
+#define PEER_HT_MODE0_SZ 2
+#define PEER_MAC0_31_0_MSK 0xffffffff
+#define PEER_MAC0_31_0_I_MSK 0x00000000
+#define PEER_MAC0_31_0_SFT 0
+#define PEER_MAC0_31_0_HI 31
+#define PEER_MAC0_31_0_SZ 32
+#define PEER_MAC0_47_32_MSK 0x0000ffff
+#define PEER_MAC0_47_32_I_MSK 0xffff0000
+#define PEER_MAC0_47_32_SFT 0
+#define PEER_MAC0_47_32_HI 15
+#define PEER_MAC0_47_32_SZ 16
+#define TX_ACK_POLICY_0_0_MSK 0x00000003
+#define TX_ACK_POLICY_0_0_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_0_SFT 0
+#define TX_ACK_POLICY_0_0_HI 1
+#define TX_ACK_POLICY_0_0_SZ 2
+#define TX_SEQ_CTRL_0_0_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_0_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_0_SFT 0
+#define TX_SEQ_CTRL_0_0_HI 11
+#define TX_SEQ_CTRL_0_0_SZ 12
+#define TX_ACK_POLICY_0_1_MSK 0x00000003
+#define TX_ACK_POLICY_0_1_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_1_SFT 0
+#define TX_ACK_POLICY_0_1_HI 1
+#define TX_ACK_POLICY_0_1_SZ 2
+#define TX_SEQ_CTRL_0_1_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_1_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_1_SFT 0
+#define TX_SEQ_CTRL_0_1_HI 11
+#define TX_SEQ_CTRL_0_1_SZ 12
+#define TX_ACK_POLICY_0_2_MSK 0x00000003
+#define TX_ACK_POLICY_0_2_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_2_SFT 0
+#define TX_ACK_POLICY_0_2_HI 1
+#define TX_ACK_POLICY_0_2_SZ 2
+#define TX_SEQ_CTRL_0_2_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_2_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_2_SFT 0
+#define TX_SEQ_CTRL_0_2_HI 11
+#define TX_SEQ_CTRL_0_2_SZ 12
+#define TX_ACK_POLICY_0_3_MSK 0x00000003
+#define TX_ACK_POLICY_0_3_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_3_SFT 0
+#define TX_ACK_POLICY_0_3_HI 1
+#define TX_ACK_POLICY_0_3_SZ 2
+#define TX_SEQ_CTRL_0_3_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_3_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_3_SFT 0
+#define TX_SEQ_CTRL_0_3_HI 11
+#define TX_SEQ_CTRL_0_3_SZ 12
+#define TX_ACK_POLICY_0_4_MSK 0x00000003
+#define TX_ACK_POLICY_0_4_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_4_SFT 0
+#define TX_ACK_POLICY_0_4_HI 1
+#define TX_ACK_POLICY_0_4_SZ 2
+#define TX_SEQ_CTRL_0_4_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_4_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_4_SFT 0
+#define TX_SEQ_CTRL_0_4_HI 11
+#define TX_SEQ_CTRL_0_4_SZ 12
+#define TX_ACK_POLICY_0_5_MSK 0x00000003
+#define TX_ACK_POLICY_0_5_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_5_SFT 0
+#define TX_ACK_POLICY_0_5_HI 1
+#define TX_ACK_POLICY_0_5_SZ 2
+#define TX_SEQ_CTRL_0_5_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_5_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_5_SFT 0
+#define TX_SEQ_CTRL_0_5_HI 11
+#define TX_SEQ_CTRL_0_5_SZ 12
+#define TX_ACK_POLICY_0_6_MSK 0x00000003
+#define TX_ACK_POLICY_0_6_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_6_SFT 0
+#define TX_ACK_POLICY_0_6_HI 1
+#define TX_ACK_POLICY_0_6_SZ 2
+#define TX_SEQ_CTRL_0_6_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_6_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_6_SFT 0
+#define TX_SEQ_CTRL_0_6_HI 11
+#define TX_SEQ_CTRL_0_6_SZ 12
+#define TX_ACK_POLICY_0_7_MSK 0x00000003
+#define TX_ACK_POLICY_0_7_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_0_7_SFT 0
+#define TX_ACK_POLICY_0_7_HI 1
+#define TX_ACK_POLICY_0_7_SZ 2
+#define TX_SEQ_CTRL_0_7_MSK 0x00000fff
+#define TX_SEQ_CTRL_0_7_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_0_7_SFT 0
+#define TX_SEQ_CTRL_0_7_HI 11
+#define TX_SEQ_CTRL_0_7_SZ 12
+#define VALID1_MSK 0x00000001
+#define VALID1_I_MSK 0xfffffffe
+#define VALID1_SFT 0
+#define VALID1_HI 0
+#define VALID1_SZ 1
+#define PEER_QOS_EN1_MSK 0x00000002
+#define PEER_QOS_EN1_I_MSK 0xfffffffd
+#define PEER_QOS_EN1_SFT 1
+#define PEER_QOS_EN1_HI 1
+#define PEER_QOS_EN1_SZ 1
+#define PEER_OP_MODE1_MSK 0x0000000c
+#define PEER_OP_MODE1_I_MSK 0xfffffff3
+#define PEER_OP_MODE1_SFT 2
+#define PEER_OP_MODE1_HI 3
+#define PEER_OP_MODE1_SZ 2
+#define PEER_HT_MODE1_MSK 0x00000030
+#define PEER_HT_MODE1_I_MSK 0xffffffcf
+#define PEER_HT_MODE1_SFT 4
+#define PEER_HT_MODE1_HI 5
+#define PEER_HT_MODE1_SZ 2
+#define PEER_MAC1_31_0_MSK 0xffffffff
+#define PEER_MAC1_31_0_I_MSK 0x00000000
+#define PEER_MAC1_31_0_SFT 0
+#define PEER_MAC1_31_0_HI 31
+#define PEER_MAC1_31_0_SZ 32
+#define PEER_MAC1_47_32_MSK 0x0000ffff
+#define PEER_MAC1_47_32_I_MSK 0xffff0000
+#define PEER_MAC1_47_32_SFT 0
+#define PEER_MAC1_47_32_HI 15
+#define PEER_MAC1_47_32_SZ 16
+#define TX_ACK_POLICY_1_0_MSK 0x00000003
+#define TX_ACK_POLICY_1_0_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_0_SFT 0
+#define TX_ACK_POLICY_1_0_HI 1
+#define TX_ACK_POLICY_1_0_SZ 2
+#define TX_SEQ_CTRL_1_0_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_0_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_0_SFT 0
+#define TX_SEQ_CTRL_1_0_HI 11
+#define TX_SEQ_CTRL_1_0_SZ 12
+#define TX_ACK_POLICY_1_1_MSK 0x00000003
+#define TX_ACK_POLICY_1_1_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_1_SFT 0
+#define TX_ACK_POLICY_1_1_HI 1
+#define TX_ACK_POLICY_1_1_SZ 2
+#define TX_SEQ_CTRL_1_1_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_1_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_1_SFT 0
+#define TX_SEQ_CTRL_1_1_HI 11
+#define TX_SEQ_CTRL_1_1_SZ 12
+#define TX_ACK_POLICY_1_2_MSK 0x00000003
+#define TX_ACK_POLICY_1_2_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_2_SFT 0
+#define TX_ACK_POLICY_1_2_HI 1
+#define TX_ACK_POLICY_1_2_SZ 2
+#define TX_SEQ_CTRL_1_2_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_2_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_2_SFT 0
+#define TX_SEQ_CTRL_1_2_HI 11
+#define TX_SEQ_CTRL_1_2_SZ 12
+#define TX_ACK_POLICY_1_3_MSK 0x00000003
+#define TX_ACK_POLICY_1_3_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_3_SFT 0
+#define TX_ACK_POLICY_1_3_HI 1
+#define TX_ACK_POLICY_1_3_SZ 2
+#define TX_SEQ_CTRL_1_3_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_3_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_3_SFT 0
+#define TX_SEQ_CTRL_1_3_HI 11
+#define TX_SEQ_CTRL_1_3_SZ 12
+#define TX_ACK_POLICY_1_4_MSK 0x00000003
+#define TX_ACK_POLICY_1_4_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_4_SFT 0
+#define TX_ACK_POLICY_1_4_HI 1
+#define TX_ACK_POLICY_1_4_SZ 2
+#define TX_SEQ_CTRL_1_4_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_4_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_4_SFT 0
+#define TX_SEQ_CTRL_1_4_HI 11
+#define TX_SEQ_CTRL_1_4_SZ 12
+#define TX_ACK_POLICY_1_5_MSK 0x00000003
+#define TX_ACK_POLICY_1_5_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_5_SFT 0
+#define TX_ACK_POLICY_1_5_HI 1
+#define TX_ACK_POLICY_1_5_SZ 2
+#define TX_SEQ_CTRL_1_5_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_5_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_5_SFT 0
+#define TX_SEQ_CTRL_1_5_HI 11
+#define TX_SEQ_CTRL_1_5_SZ 12
+#define TX_ACK_POLICY_1_6_MSK 0x00000003
+#define TX_ACK_POLICY_1_6_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_6_SFT 0
+#define TX_ACK_POLICY_1_6_HI 1
+#define TX_ACK_POLICY_1_6_SZ 2
+#define TX_SEQ_CTRL_1_6_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_6_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_6_SFT 0
+#define TX_SEQ_CTRL_1_6_HI 11
+#define TX_SEQ_CTRL_1_6_SZ 12
+#define TX_ACK_POLICY_1_7_MSK 0x00000003
+#define TX_ACK_POLICY_1_7_I_MSK 0xfffffffc
+#define TX_ACK_POLICY_1_7_SFT 0
+#define TX_ACK_POLICY_1_7_HI 1
+#define TX_ACK_POLICY_1_7_SZ 2
+#define TX_SEQ_CTRL_1_7_MSK 0x00000fff
+#define TX_SEQ_CTRL_1_7_I_MSK 0xfffff000
+#define TX_SEQ_CTRL_1_7_SFT 0
+#define TX_SEQ_CTRL_1_7_HI 11
+#define TX_SEQ_CTRL_1_7_SZ 12
+#define INFO0_MSK 0xffffffff
+#define INFO0_I_MSK 0x00000000
+#define INFO0_SFT 0
+#define INFO0_HI 31
+#define INFO0_SZ 32
+#define INFO1_MSK 0xffffffff
+#define INFO1_I_MSK 0x00000000
+#define INFO1_SFT 0
+#define INFO1_HI 31
+#define INFO1_SZ 32
+#define INFO2_MSK 0xffffffff
+#define INFO2_I_MSK 0x00000000
+#define INFO2_SFT 0
+#define INFO2_HI 31
+#define INFO2_SZ 32
+#define INFO3_MSK 0xffffffff
+#define INFO3_I_MSK 0x00000000
+#define INFO3_SFT 0
+#define INFO3_HI 31
+#define INFO3_SZ 32
+#define INFO4_MSK 0xffffffff
+#define INFO4_I_MSK 0x00000000
+#define INFO4_SFT 0
+#define INFO4_HI 31
+#define INFO4_SZ 32
+#define INFO5_MSK 0xffffffff
+#define INFO5_I_MSK 0x00000000
+#define INFO5_SFT 0
+#define INFO5_HI 31
+#define INFO5_SZ 32
+#define INFO6_MSK 0xffffffff
+#define INFO6_I_MSK 0x00000000
+#define INFO6_SFT 0
+#define INFO6_HI 31
+#define INFO6_SZ 32
+#define INFO7_MSK 0xffffffff
+#define INFO7_I_MSK 0x00000000
+#define INFO7_SFT 0
+#define INFO7_HI 31
+#define INFO7_SZ 32
+#define INFO8_MSK 0xffffffff
+#define INFO8_I_MSK 0x00000000
+#define INFO8_SFT 0
+#define INFO8_HI 31
+#define INFO8_SZ 32
+#define INFO9_MSK 0xffffffff
+#define INFO9_I_MSK 0x00000000
+#define INFO9_SFT 0
+#define INFO9_HI 31
+#define INFO9_SZ 32
+#define INFO10_MSK 0xffffffff
+#define INFO10_I_MSK 0x00000000
+#define INFO10_SFT 0
+#define INFO10_HI 31
+#define INFO10_SZ 32
+#define INFO11_MSK 0xffffffff
+#define INFO11_I_MSK 0x00000000
+#define INFO11_SFT 0
+#define INFO11_HI 31
+#define INFO11_SZ 32
+#define INFO12_MSK 0xffffffff
+#define INFO12_I_MSK 0x00000000
+#define INFO12_SFT 0
+#define INFO12_HI 31
+#define INFO12_SZ 32
+#define INFO13_MSK 0xffffffff
+#define INFO13_I_MSK 0x00000000
+#define INFO13_SFT 0
+#define INFO13_HI 31
+#define INFO13_SZ 32
+#define INFO14_MSK 0xffffffff
+#define INFO14_I_MSK 0x00000000
+#define INFO14_SFT 0
+#define INFO14_HI 31
+#define INFO14_SZ 32
+#define INFO15_MSK 0xffffffff
+#define INFO15_I_MSK 0x00000000
+#define INFO15_SFT 0
+#define INFO15_HI 31
+#define INFO15_SZ 32
+#define INFO16_MSK 0xffffffff
+#define INFO16_I_MSK 0x00000000
+#define INFO16_SFT 0
+#define INFO16_HI 31
+#define INFO16_SZ 32
+#define INFO17_MSK 0xffffffff
+#define INFO17_I_MSK 0x00000000
+#define INFO17_SFT 0
+#define INFO17_HI 31
+#define INFO17_SZ 32
+#define INFO18_MSK 0xffffffff
+#define INFO18_I_MSK 0x00000000
+#define INFO18_SFT 0
+#define INFO18_HI 31
+#define INFO18_SZ 32
+#define INFO19_MSK 0xffffffff
+#define INFO19_I_MSK 0x00000000
+#define INFO19_SFT 0
+#define INFO19_HI 31
+#define INFO19_SZ 32
+#define INFO20_MSK 0xffffffff
+#define INFO20_I_MSK 0x00000000
+#define INFO20_SFT 0
+#define INFO20_HI 31
+#define INFO20_SZ 32
+#define INFO21_MSK 0xffffffff
+#define INFO21_I_MSK 0x00000000
+#define INFO21_SFT 0
+#define INFO21_HI 31
+#define INFO21_SZ 32
+#define INFO22_MSK 0xffffffff
+#define INFO22_I_MSK 0x00000000
+#define INFO22_SFT 0
+#define INFO22_HI 31
+#define INFO22_SZ 32
+#define INFO23_MSK 0xffffffff
+#define INFO23_I_MSK 0x00000000
+#define INFO23_SFT 0
+#define INFO23_HI 31
+#define INFO23_SZ 32
+#define INFO24_MSK 0xffffffff
+#define INFO24_I_MSK 0x00000000
+#define INFO24_SFT 0
+#define INFO24_HI 31
+#define INFO24_SZ 32
+#define INFO25_MSK 0xffffffff
+#define INFO25_I_MSK 0x00000000
+#define INFO25_SFT 0
+#define INFO25_HI 31
+#define INFO25_SZ 32
+#define INFO26_MSK 0xffffffff
+#define INFO26_I_MSK 0x00000000
+#define INFO26_SFT 0
+#define INFO26_HI 31
+#define INFO26_SZ 32
+#define INFO27_MSK 0xffffffff
+#define INFO27_I_MSK 0x00000000
+#define INFO27_SFT 0
+#define INFO27_HI 31
+#define INFO27_SZ 32
+#define INFO28_MSK 0xffffffff
+#define INFO28_I_MSK 0x00000000
+#define INFO28_SFT 0
+#define INFO28_HI 31
+#define INFO28_SZ 32
+#define INFO29_MSK 0xffffffff
+#define INFO29_I_MSK 0x00000000
+#define INFO29_SFT 0
+#define INFO29_HI 31
+#define INFO29_SZ 32
+#define INFO30_MSK 0xffffffff
+#define INFO30_I_MSK 0x00000000
+#define INFO30_SFT 0
+#define INFO30_HI 31
+#define INFO30_SZ 32
+#define INFO31_MSK 0xffffffff
+#define INFO31_I_MSK 0x00000000
+#define INFO31_SFT 0
+#define INFO31_HI 31
+#define INFO31_SZ 32
+#define INFO32_MSK 0xffffffff
+#define INFO32_I_MSK 0x00000000
+#define INFO32_SFT 0
+#define INFO32_HI 31
+#define INFO32_SZ 32
+#define INFO33_MSK 0xffffffff
+#define INFO33_I_MSK 0x00000000
+#define INFO33_SFT 0
+#define INFO33_HI 31
+#define INFO33_SZ 32
+#define INFO34_MSK 0xffffffff
+#define INFO34_I_MSK 0x00000000
+#define INFO34_SFT 0
+#define INFO34_HI 31
+#define INFO34_SZ 32
+#define INFO35_MSK 0xffffffff
+#define INFO35_I_MSK 0x00000000
+#define INFO35_SFT 0
+#define INFO35_HI 31
+#define INFO35_SZ 32
+#define INFO36_MSK 0xffffffff
+#define INFO36_I_MSK 0x00000000
+#define INFO36_SFT 0
+#define INFO36_HI 31
+#define INFO36_SZ 32
+#define INFO37_MSK 0xffffffff
+#define INFO37_I_MSK 0x00000000
+#define INFO37_SFT 0
+#define INFO37_HI 31
+#define INFO37_SZ 32
+#define INFO38_MSK 0xffffffff
+#define INFO38_I_MSK 0x00000000
+#define INFO38_SFT 0
+#define INFO38_HI 31
+#define INFO38_SZ 32
+#define INFO_MASK_MSK 0xffffffff
+#define INFO_MASK_I_MSK 0x00000000
+#define INFO_MASK_SFT 0
+#define INFO_MASK_HI 31
+#define INFO_MASK_SZ 32
+#define INFO_DEF_RATE_MSK 0x0000003f
+#define INFO_DEF_RATE_I_MSK 0xffffffc0
+#define INFO_DEF_RATE_SFT 0
+#define INFO_DEF_RATE_HI 5
+#define INFO_DEF_RATE_SZ 6
+#define INFO_MRX_OFFSET_MSK 0x000f0000
+#define INFO_MRX_OFFSET_I_MSK 0xfff0ffff
+#define INFO_MRX_OFFSET_SFT 16
+#define INFO_MRX_OFFSET_HI 19
+#define INFO_MRX_OFFSET_SZ 4
+#define BCAST_RATEUNKNOW_MSK 0x3f000000
+#define BCAST_RATEUNKNOW_I_MSK 0xc0ffffff
+#define BCAST_RATEUNKNOW_SFT 24
+#define BCAST_RATEUNKNOW_HI 29
+#define BCAST_RATEUNKNOW_SZ 6
+#define INFO_IDX_TBL_ADDR_MSK 0xffffffff
+#define INFO_IDX_TBL_ADDR_I_MSK 0x00000000
+#define INFO_IDX_TBL_ADDR_SFT 0
+#define INFO_IDX_TBL_ADDR_HI 31
+#define INFO_IDX_TBL_ADDR_SZ 32
+#define INFO_LEN_TBL_ADDR_MSK 0xffffffff
+#define INFO_LEN_TBL_ADDR_I_MSK 0x00000000
+#define INFO_LEN_TBL_ADDR_SFT 0
+#define INFO_LEN_TBL_ADDR_HI 31
+#define INFO_LEN_TBL_ADDR_SZ 32
+#define IC_TAG_31_0_MSK 0xffffffff
+#define IC_TAG_31_0_I_MSK 0x00000000
+#define IC_TAG_31_0_SFT 0
+#define IC_TAG_31_0_HI 31
+#define IC_TAG_31_0_SZ 32
+#define IC_TAG_63_32_MSK 0xffffffff
+#define IC_TAG_63_32_I_MSK 0x00000000
+#define IC_TAG_63_32_SFT 0
+#define IC_TAG_63_32_HI 31
+#define IC_TAG_63_32_SZ 32
+#define CH1_PRI_MSK 0x00000003
+#define CH1_PRI_I_MSK 0xfffffffc
+#define CH1_PRI_SFT 0
+#define CH1_PRI_HI 1
+#define CH1_PRI_SZ 2
+#define CH2_PRI_MSK 0x00000300
+#define CH2_PRI_I_MSK 0xfffffcff
+#define CH2_PRI_SFT 8
+#define CH2_PRI_HI 9
+#define CH2_PRI_SZ 2
+#define CH3_PRI_MSK 0x00030000
+#define CH3_PRI_I_MSK 0xfffcffff
+#define CH3_PRI_SFT 16
+#define CH3_PRI_HI 17
+#define CH3_PRI_SZ 2
+#define RG_MAC_LPBK_MSK 0x00000001
+#define RG_MAC_LPBK_I_MSK 0xfffffffe
+#define RG_MAC_LPBK_SFT 0
+#define RG_MAC_LPBK_HI 0
+#define RG_MAC_LPBK_SZ 1
+#define RG_MAC_M2M_MSK 0x00000002
+#define RG_MAC_M2M_I_MSK 0xfffffffd
+#define RG_MAC_M2M_SFT 1
+#define RG_MAC_M2M_HI 1
+#define RG_MAC_M2M_SZ 1
+#define RG_PHY_LPBK_MSK 0x00000004
+#define RG_PHY_LPBK_I_MSK 0xfffffffb
+#define RG_PHY_LPBK_SFT 2
+#define RG_PHY_LPBK_HI 2
+#define RG_PHY_LPBK_SZ 1
+#define RG_LPBK_RX_EN_MSK 0x00000008
+#define RG_LPBK_RX_EN_I_MSK 0xfffffff7
+#define RG_LPBK_RX_EN_SFT 3
+#define RG_LPBK_RX_EN_HI 3
+#define RG_LPBK_RX_EN_SZ 1
+#define EXT_MAC_MODE_MSK 0x00000010
+#define EXT_MAC_MODE_I_MSK 0xffffffef
+#define EXT_MAC_MODE_SFT 4
+#define EXT_MAC_MODE_HI 4
+#define EXT_MAC_MODE_SZ 1
+#define EXT_PHY_MODE_MSK 0x00000020
+#define EXT_PHY_MODE_I_MSK 0xffffffdf
+#define EXT_PHY_MODE_SFT 5
+#define EXT_PHY_MODE_HI 5
+#define EXT_PHY_MODE_SZ 1
+#define ASIC_TAG_MSK 0xff000000
+#define ASIC_TAG_I_MSK 0x00ffffff
+#define ASIC_TAG_SFT 24
+#define ASIC_TAG_HI 31
+#define ASIC_TAG_SZ 8
+#define HCI_SW_RST_MSK 0x00000001
+#define HCI_SW_RST_I_MSK 0xfffffffe
+#define HCI_SW_RST_SFT 0
+#define HCI_SW_RST_HI 0
+#define HCI_SW_RST_SZ 1
+#define CO_PROC_SW_RST_MSK 0x00000002
+#define CO_PROC_SW_RST_I_MSK 0xfffffffd
+#define CO_PROC_SW_RST_SFT 1
+#define CO_PROC_SW_RST_HI 1
+#define CO_PROC_SW_RST_SZ 1
+#define MTX_MISC_SW_RST_MSK 0x00000008
+#define MTX_MISC_SW_RST_I_MSK 0xfffffff7
+#define MTX_MISC_SW_RST_SFT 3
+#define MTX_MISC_SW_RST_HI 3
+#define MTX_MISC_SW_RST_SZ 1
+#define MTX_QUE_SW_RST_MSK 0x00000010
+#define MTX_QUE_SW_RST_I_MSK 0xffffffef
+#define MTX_QUE_SW_RST_SFT 4
+#define MTX_QUE_SW_RST_HI 4
+#define MTX_QUE_SW_RST_SZ 1
+#define MTX_CHST_SW_RST_MSK 0x00000020
+#define MTX_CHST_SW_RST_I_MSK 0xffffffdf
+#define MTX_CHST_SW_RST_SFT 5
+#define MTX_CHST_SW_RST_HI 5
+#define MTX_CHST_SW_RST_SZ 1
+#define MTX_BCN_SW_RST_MSK 0x00000040
+#define MTX_BCN_SW_RST_I_MSK 0xffffffbf
+#define MTX_BCN_SW_RST_SFT 6
+#define MTX_BCN_SW_RST_HI 6
+#define MTX_BCN_SW_RST_SZ 1
+#define MRX_SW_RST_MSK 0x00000080
+#define MRX_SW_RST_I_MSK 0xffffff7f
+#define MRX_SW_RST_SFT 7
+#define MRX_SW_RST_HI 7
+#define MRX_SW_RST_SZ 1
+#define AMPDU_SW_RST_MSK 0x00000100
+#define AMPDU_SW_RST_I_MSK 0xfffffeff
+#define AMPDU_SW_RST_SFT 8
+#define AMPDU_SW_RST_HI 8
+#define AMPDU_SW_RST_SZ 1
+#define MMU_SW_RST_MSK 0x00000200
+#define MMU_SW_RST_I_MSK 0xfffffdff
+#define MMU_SW_RST_SFT 9
+#define MMU_SW_RST_HI 9
+#define MMU_SW_RST_SZ 1
+#define ID_MNG_SW_RST_MSK 0x00000800
+#define ID_MNG_SW_RST_I_MSK 0xfffff7ff
+#define ID_MNG_SW_RST_SFT 11
+#define ID_MNG_SW_RST_HI 11
+#define ID_MNG_SW_RST_SZ 1
+#define MBOX_SW_RST_MSK 0x00001000
+#define MBOX_SW_RST_I_MSK 0xffffefff
+#define MBOX_SW_RST_SFT 12
+#define MBOX_SW_RST_HI 12
+#define MBOX_SW_RST_SZ 1
+#define SCRT_SW_RST_MSK 0x00002000
+#define SCRT_SW_RST_I_MSK 0xffffdfff
+#define SCRT_SW_RST_SFT 13
+#define SCRT_SW_RST_HI 13
+#define SCRT_SW_RST_SZ 1
+#define MIC_SW_RST_MSK 0x00004000
+#define MIC_SW_RST_I_MSK 0xffffbfff
+#define MIC_SW_RST_SFT 14
+#define MIC_SW_RST_HI 14
+#define MIC_SW_RST_SZ 1
+#define CO_PROC_ENG_RST_MSK 0x00000002
+#define CO_PROC_ENG_RST_I_MSK 0xfffffffd
+#define CO_PROC_ENG_RST_SFT 1
+#define CO_PROC_ENG_RST_HI 1
+#define CO_PROC_ENG_RST_SZ 1
+#define MTX_MISC_ENG_RST_MSK 0x00000008
+#define MTX_MISC_ENG_RST_I_MSK 0xfffffff7
+#define MTX_MISC_ENG_RST_SFT 3
+#define MTX_MISC_ENG_RST_HI 3
+#define MTX_MISC_ENG_RST_SZ 1
+#define MTX_QUE_ENG_RST_MSK 0x00000010
+#define MTX_QUE_ENG_RST_I_MSK 0xffffffef
+#define MTX_QUE_ENG_RST_SFT 4
+#define MTX_QUE_ENG_RST_HI 4
+#define MTX_QUE_ENG_RST_SZ 1
+#define MTX_CHST_ENG_RST_MSK 0x00000020
+#define MTX_CHST_ENG_RST_I_MSK 0xffffffdf
+#define MTX_CHST_ENG_RST_SFT 5
+#define MTX_CHST_ENG_RST_HI 5
+#define MTX_CHST_ENG_RST_SZ 1
+#define MTX_BCN_ENG_RST_MSK 0x00000040
+#define MTX_BCN_ENG_RST_I_MSK 0xffffffbf
+#define MTX_BCN_ENG_RST_SFT 6
+#define MTX_BCN_ENG_RST_HI 6
+#define MTX_BCN_ENG_RST_SZ 1
+#define MRX_ENG_RST_MSK 0x00000080
+#define MRX_ENG_RST_I_MSK 0xffffff7f
+#define MRX_ENG_RST_SFT 7
+#define MRX_ENG_RST_HI 7
+#define MRX_ENG_RST_SZ 1
+#define AMPDU_ENG_RST_MSK 0x00000100
+#define AMPDU_ENG_RST_I_MSK 0xfffffeff
+#define AMPDU_ENG_RST_SFT 8
+#define AMPDU_ENG_RST_HI 8
+#define AMPDU_ENG_RST_SZ 1
+#define ID_MNG_ENG_RST_MSK 0x00004000
+#define ID_MNG_ENG_RST_I_MSK 0xffffbfff
+#define ID_MNG_ENG_RST_SFT 14
+#define ID_MNG_ENG_RST_HI 14
+#define ID_MNG_ENG_RST_SZ 1
+#define MBOX_ENG_RST_MSK 0x00008000
+#define MBOX_ENG_RST_I_MSK 0xffff7fff
+#define MBOX_ENG_RST_SFT 15
+#define MBOX_ENG_RST_HI 15
+#define MBOX_ENG_RST_SZ 1
+#define SCRT_ENG_RST_MSK 0x00010000
+#define SCRT_ENG_RST_I_MSK 0xfffeffff
+#define SCRT_ENG_RST_SFT 16
+#define SCRT_ENG_RST_HI 16
+#define SCRT_ENG_RST_SZ 1
+#define MIC_ENG_RST_MSK 0x00020000
+#define MIC_ENG_RST_I_MSK 0xfffdffff
+#define MIC_ENG_RST_SFT 17
+#define MIC_ENG_RST_HI 17
+#define MIC_ENG_RST_SZ 1
+#define CO_PROC_CSR_RST_MSK 0x00000002
+#define CO_PROC_CSR_RST_I_MSK 0xfffffffd
+#define CO_PROC_CSR_RST_SFT 1
+#define CO_PROC_CSR_RST_HI 1
+#define CO_PROC_CSR_RST_SZ 1
+#define MTX_MISC_CSR_RST_MSK 0x00000008
+#define MTX_MISC_CSR_RST_I_MSK 0xfffffff7
+#define MTX_MISC_CSR_RST_SFT 3
+#define MTX_MISC_CSR_RST_HI 3
+#define MTX_MISC_CSR_RST_SZ 1
+#define MTX_QUE0_CSR_RST_MSK 0x00000010
+#define MTX_QUE0_CSR_RST_I_MSK 0xffffffef
+#define MTX_QUE0_CSR_RST_SFT 4
+#define MTX_QUE0_CSR_RST_HI 4
+#define MTX_QUE0_CSR_RST_SZ 1
+#define MTX_QUE1_CSR_RST_MSK 0x00000020
+#define MTX_QUE1_CSR_RST_I_MSK 0xffffffdf
+#define MTX_QUE1_CSR_RST_SFT 5
+#define MTX_QUE1_CSR_RST_HI 5
+#define MTX_QUE1_CSR_RST_SZ 1
+#define MTX_QUE2_CSR_RST_MSK 0x00000040
+#define MTX_QUE2_CSR_RST_I_MSK 0xffffffbf
+#define MTX_QUE2_CSR_RST_SFT 6
+#define MTX_QUE2_CSR_RST_HI 6
+#define MTX_QUE2_CSR_RST_SZ 1
+#define MTX_QUE3_CSR_RST_MSK 0x00000080
+#define MTX_QUE3_CSR_RST_I_MSK 0xffffff7f
+#define MTX_QUE3_CSR_RST_SFT 7
+#define MTX_QUE3_CSR_RST_HI 7
+#define MTX_QUE3_CSR_RST_SZ 1
+#define MTX_QUE4_CSR_RST_MSK 0x00000100
+#define MTX_QUE4_CSR_RST_I_MSK 0xfffffeff
+#define MTX_QUE4_CSR_RST_SFT 8
+#define MTX_QUE4_CSR_RST_HI 8
+#define MTX_QUE4_CSR_RST_SZ 1
+#define MTX_QUE5_CSR_RST_MSK 0x00000200
+#define MTX_QUE5_CSR_RST_I_MSK 0xfffffdff
+#define MTX_QUE5_CSR_RST_SFT 9
+#define MTX_QUE5_CSR_RST_HI 9
+#define MTX_QUE5_CSR_RST_SZ 1
+#define MRX_CSR_RST_MSK 0x00000400
+#define MRX_CSR_RST_I_MSK 0xfffffbff
+#define MRX_CSR_RST_SFT 10
+#define MRX_CSR_RST_HI 10
+#define MRX_CSR_RST_SZ 1
+#define AMPDU_CSR_RST_MSK 0x00000800
+#define AMPDU_CSR_RST_I_MSK 0xfffff7ff
+#define AMPDU_CSR_RST_SFT 11
+#define AMPDU_CSR_RST_HI 11
+#define AMPDU_CSR_RST_SZ 1
+#define SCRT_CSR_RST_MSK 0x00002000
+#define SCRT_CSR_RST_I_MSK 0xffffdfff
+#define SCRT_CSR_RST_SFT 13
+#define SCRT_CSR_RST_HI 13
+#define SCRT_CSR_RST_SZ 1
+#define ID_MNG_CSR_RST_MSK 0x00004000
+#define ID_MNG_CSR_RST_I_MSK 0xffffbfff
+#define ID_MNG_CSR_RST_SFT 14
+#define ID_MNG_CSR_RST_HI 14
+#define ID_MNG_CSR_RST_SZ 1
+#define MBOX_CSR_RST_MSK 0x00008000
+#define MBOX_CSR_RST_I_MSK 0xffff7fff
+#define MBOX_CSR_RST_SFT 15
+#define MBOX_CSR_RST_HI 15
+#define MBOX_CSR_RST_SZ 1
+#define HCI_CLK_EN_MSK 0x00000001
+#define HCI_CLK_EN_I_MSK 0xfffffffe
+#define HCI_CLK_EN_SFT 0
+#define HCI_CLK_EN_HI 0
+#define HCI_CLK_EN_SZ 1
+#define CO_PROC_CLK_EN_MSK 0x00000002
+#define CO_PROC_CLK_EN_I_MSK 0xfffffffd
+#define CO_PROC_CLK_EN_SFT 1
+#define CO_PROC_CLK_EN_HI 1
+#define CO_PROC_CLK_EN_SZ 1
+#define MTX_MISC_CLK_EN_MSK 0x00000008
+#define MTX_MISC_CLK_EN_I_MSK 0xfffffff7
+#define MTX_MISC_CLK_EN_SFT 3
+#define MTX_MISC_CLK_EN_HI 3
+#define MTX_MISC_CLK_EN_SZ 1
+#define MTX_QUE_CLK_EN_MSK 0x00000010
+#define MTX_QUE_CLK_EN_I_MSK 0xffffffef
+#define MTX_QUE_CLK_EN_SFT 4
+#define MTX_QUE_CLK_EN_HI 4
+#define MTX_QUE_CLK_EN_SZ 1
+#define MRX_CLK_EN_MSK 0x00000020
+#define MRX_CLK_EN_I_MSK 0xffffffdf
+#define MRX_CLK_EN_SFT 5
+#define MRX_CLK_EN_HI 5
+#define MRX_CLK_EN_SZ 1
+#define AMPDU_CLK_EN_MSK 0x00000040
+#define AMPDU_CLK_EN_I_MSK 0xffffffbf
+#define AMPDU_CLK_EN_SFT 6
+#define AMPDU_CLK_EN_HI 6
+#define AMPDU_CLK_EN_SZ 1
+#define MMU_CLK_EN_MSK 0x00000080
+#define MMU_CLK_EN_I_MSK 0xffffff7f
+#define MMU_CLK_EN_SFT 7
+#define MMU_CLK_EN_HI 7
+#define MMU_CLK_EN_SZ 1
+#define ID_MNG_CLK_EN_MSK 0x00000200
+#define ID_MNG_CLK_EN_I_MSK 0xfffffdff
+#define ID_MNG_CLK_EN_SFT 9
+#define ID_MNG_CLK_EN_HI 9
+#define ID_MNG_CLK_EN_SZ 1
+#define MBOX_CLK_EN_MSK 0x00000400
+#define MBOX_CLK_EN_I_MSK 0xfffffbff
+#define MBOX_CLK_EN_SFT 10
+#define MBOX_CLK_EN_HI 10
+#define MBOX_CLK_EN_SZ 1
+#define SCRT_CLK_EN_MSK 0x00000800
+#define SCRT_CLK_EN_I_MSK 0xfffff7ff
+#define SCRT_CLK_EN_SFT 11
+#define SCRT_CLK_EN_HI 11
+#define SCRT_CLK_EN_SZ 1
+#define MIC_CLK_EN_MSK 0x00001000
+#define MIC_CLK_EN_I_MSK 0xffffefff
+#define MIC_CLK_EN_SFT 12
+#define MIC_CLK_EN_HI 12
+#define MIC_CLK_EN_SZ 1
+#define MIB_CLK_EN_MSK 0x00002000
+#define MIB_CLK_EN_I_MSK 0xffffdfff
+#define MIB_CLK_EN_SFT 13
+#define MIB_CLK_EN_HI 13
+#define MIB_CLK_EN_SZ 1
+#define HCI_ENG_CLK_EN_MSK 0x00000001
+#define HCI_ENG_CLK_EN_I_MSK 0xfffffffe
+#define HCI_ENG_CLK_EN_SFT 0
+#define HCI_ENG_CLK_EN_HI 0
+#define HCI_ENG_CLK_EN_SZ 1
+#define CO_PROC_ENG_CLK_EN_MSK 0x00000002
+#define CO_PROC_ENG_CLK_EN_I_MSK 0xfffffffd
+#define CO_PROC_ENG_CLK_EN_SFT 1
+#define CO_PROC_ENG_CLK_EN_HI 1
+#define CO_PROC_ENG_CLK_EN_SZ 1
+#define MTX_MISC_ENG_CLK_EN_MSK 0x00000008
+#define MTX_MISC_ENG_CLK_EN_I_MSK 0xfffffff7
+#define MTX_MISC_ENG_CLK_EN_SFT 3
+#define MTX_MISC_ENG_CLK_EN_HI 3
+#define MTX_MISC_ENG_CLK_EN_SZ 1
+#define MTX_QUE_ENG_CLK_EN_MSK 0x00000010
+#define MTX_QUE_ENG_CLK_EN_I_MSK 0xffffffef
+#define MTX_QUE_ENG_CLK_EN_SFT 4
+#define MTX_QUE_ENG_CLK_EN_HI 4
+#define MTX_QUE_ENG_CLK_EN_SZ 1
+#define MRX_ENG_CLK_EN_MSK 0x00000020
+#define MRX_ENG_CLK_EN_I_MSK 0xffffffdf
+#define MRX_ENG_CLK_EN_SFT 5
+#define MRX_ENG_CLK_EN_HI 5
+#define MRX_ENG_CLK_EN_SZ 1
+#define AMPDU_ENG_CLK_EN_MSK 0x00000040
+#define AMPDU_ENG_CLK_EN_I_MSK 0xffffffbf
+#define AMPDU_ENG_CLK_EN_SFT 6
+#define AMPDU_ENG_CLK_EN_HI 6
+#define AMPDU_ENG_CLK_EN_SZ 1
+#define ID_MNG_ENG_CLK_EN_MSK 0x00001000
+#define ID_MNG_ENG_CLK_EN_I_MSK 0xffffefff
+#define ID_MNG_ENG_CLK_EN_SFT 12
+#define ID_MNG_ENG_CLK_EN_HI 12
+#define ID_MNG_ENG_CLK_EN_SZ 1
+#define MBOX_ENG_CLK_EN_MSK 0x00002000
+#define MBOX_ENG_CLK_EN_I_MSK 0xffffdfff
+#define MBOX_ENG_CLK_EN_SFT 13
+#define MBOX_ENG_CLK_EN_HI 13
+#define MBOX_ENG_CLK_EN_SZ 1
+#define SCRT_ENG_CLK_EN_MSK 0x00004000
+#define SCRT_ENG_CLK_EN_I_MSK 0xffffbfff
+#define SCRT_ENG_CLK_EN_SFT 14
+#define SCRT_ENG_CLK_EN_HI 14
+#define SCRT_ENG_CLK_EN_SZ 1
+#define MIC_ENG_CLK_EN_MSK 0x00008000
+#define MIC_ENG_CLK_EN_I_MSK 0xffff7fff
+#define MIC_ENG_CLK_EN_SFT 15
+#define MIC_ENG_CLK_EN_HI 15
+#define MIC_ENG_CLK_EN_SZ 1
+#define CO_PROC_CSR_CLK_EN_MSK 0x00000002
+#define CO_PROC_CSR_CLK_EN_I_MSK 0xfffffffd
+#define CO_PROC_CSR_CLK_EN_SFT 1
+#define CO_PROC_CSR_CLK_EN_HI 1
+#define CO_PROC_CSR_CLK_EN_SZ 1
+#define MRX_CSR_CLK_EN_MSK 0x00000400
+#define MRX_CSR_CLK_EN_I_MSK 0xfffffbff
+#define MRX_CSR_CLK_EN_SFT 10
+#define MRX_CSR_CLK_EN_HI 10
+#define MRX_CSR_CLK_EN_SZ 1
+#define AMPDU_CSR_CLK_EN_MSK 0x00000800
+#define AMPDU_CSR_CLK_EN_I_MSK 0xfffff7ff
+#define AMPDU_CSR_CLK_EN_SFT 11
+#define AMPDU_CSR_CLK_EN_HI 11
+#define AMPDU_CSR_CLK_EN_SZ 1
+#define SCRT_CSR_CLK_EN_MSK 0x00002000
+#define SCRT_CSR_CLK_EN_I_MSK 0xffffdfff
+#define SCRT_CSR_CLK_EN_SFT 13
+#define SCRT_CSR_CLK_EN_HI 13
+#define SCRT_CSR_CLK_EN_SZ 1
+#define ID_MNG_CSR_CLK_EN_MSK 0x00004000
+#define ID_MNG_CSR_CLK_EN_I_MSK 0xffffbfff
+#define ID_MNG_CSR_CLK_EN_SFT 14
+#define ID_MNG_CSR_CLK_EN_HI 14
+#define ID_MNG_CSR_CLK_EN_SZ 1
+#define MBOX_CSR_CLK_EN_MSK 0x00008000
+#define MBOX_CSR_CLK_EN_I_MSK 0xffff7fff
+#define MBOX_CSR_CLK_EN_SFT 15
+#define MBOX_CSR_CLK_EN_HI 15
+#define MBOX_CSR_CLK_EN_SZ 1
+#define OP_MODE_MSK 0x00000003
+#define OP_MODE_I_MSK 0xfffffffc
+#define OP_MODE_SFT 0
+#define OP_MODE_HI 1
+#define OP_MODE_SZ 2
+#define HT_MODE_MSK 0x0000000c
+#define HT_MODE_I_MSK 0xfffffff3
+#define HT_MODE_SFT 2
+#define HT_MODE_HI 3
+#define HT_MODE_SZ 2
+#define QOS_EN_MSK 0x00000010
+#define QOS_EN_I_MSK 0xffffffef
+#define QOS_EN_SFT 4
+#define QOS_EN_HI 4
+#define QOS_EN_SZ 1
+#define PB_OFFSET_MSK 0x0000ff00
+#define PB_OFFSET_I_MSK 0xffff00ff
+#define PB_OFFSET_SFT 8
+#define PB_OFFSET_HI 15
+#define PB_OFFSET_SZ 8
+#define SNIFFER_MODE_MSK 0x00010000
+#define SNIFFER_MODE_I_MSK 0xfffeffff
+#define SNIFFER_MODE_SFT 16
+#define SNIFFER_MODE_HI 16
+#define SNIFFER_MODE_SZ 1
+#define DUP_FLT_MSK 0x00020000
+#define DUP_FLT_I_MSK 0xfffdffff
+#define DUP_FLT_SFT 17
+#define DUP_FLT_HI 17
+#define DUP_FLT_SZ 1
+#define TX_PKT_RSVD_MSK 0x001c0000
+#define TX_PKT_RSVD_I_MSK 0xffe3ffff
+#define TX_PKT_RSVD_SFT 18
+#define TX_PKT_RSVD_HI 20
+#define TX_PKT_RSVD_SZ 3
+#define AMPDU_SNIFFER_MSK 0x00200000
+#define AMPDU_SNIFFER_I_MSK 0xffdfffff
+#define AMPDU_SNIFFER_SFT 21
+#define AMPDU_SNIFFER_HI 21
+#define AMPDU_SNIFFER_SZ 1
+#define REASON_TRAP0_MSK 0xffffffff
+#define REASON_TRAP0_I_MSK 0x00000000
+#define REASON_TRAP0_SFT 0
+#define REASON_TRAP0_HI 31
+#define REASON_TRAP0_SZ 32
+#define REASON_TRAP1_MSK 0xffffffff
+#define REASON_TRAP1_I_MSK 0x00000000
+#define REASON_TRAP1_SFT 0
+#define REASON_TRAP1_HI 31
+#define REASON_TRAP1_SZ 32
+#define BSSID_31_0_MSK 0xffffffff
+#define BSSID_31_0_I_MSK 0x00000000
+#define BSSID_31_0_SFT 0
+#define BSSID_31_0_HI 31
+#define BSSID_31_0_SZ 32
+#define BSSID_47_32_MSK 0x0000ffff
+#define BSSID_47_32_I_MSK 0xffff0000
+#define BSSID_47_32_SFT 0
+#define BSSID_47_32_HI 15
+#define BSSID_47_32_SZ 16
+#define SCRT_STATE_MSK 0x0000000f
+#define SCRT_STATE_I_MSK 0xfffffff0
+#define SCRT_STATE_SFT 0
+#define SCRT_STATE_HI 3
+#define SCRT_STATE_SZ 4
+#define STA_MAC_31_0_MSK 0xffffffff
+#define STA_MAC_31_0_I_MSK 0x00000000
+#define STA_MAC_31_0_SFT 0
+#define STA_MAC_31_0_HI 31
+#define STA_MAC_31_0_SZ 32
+#define STA_MAC_47_32_MSK 0x0000ffff
+#define STA_MAC_47_32_I_MSK 0xffff0000
+#define STA_MAC_47_32_SFT 0
+#define STA_MAC_47_32_HI 15
+#define STA_MAC_47_32_SZ 16
+#define PAIR_SCRT_MSK 0x00000007
+#define PAIR_SCRT_I_MSK 0xfffffff8
+#define PAIR_SCRT_SFT 0
+#define PAIR_SCRT_HI 2
+#define PAIR_SCRT_SZ 3
+#define GRP_SCRT_MSK 0x00000038
+#define GRP_SCRT_I_MSK 0xffffffc7
+#define GRP_SCRT_SFT 3
+#define GRP_SCRT_HI 5
+#define GRP_SCRT_SZ 3
+#define SCRT_PKT_ID_MSK 0x00001fc0
+#define SCRT_PKT_ID_I_MSK 0xffffe03f
+#define SCRT_PKT_ID_SFT 6
+#define SCRT_PKT_ID_HI 12
+#define SCRT_PKT_ID_SZ 7
+#define SCRT_RPLY_IGNORE_MSK 0x00010000
+#define SCRT_RPLY_IGNORE_I_MSK 0xfffeffff
+#define SCRT_RPLY_IGNORE_SFT 16
+#define SCRT_RPLY_IGNORE_HI 16
+#define SCRT_RPLY_IGNORE_SZ 1
+#define COEXIST_EN_MSK 0x00000001
+#define COEXIST_EN_I_MSK 0xfffffffe
+#define COEXIST_EN_SFT 0
+#define COEXIST_EN_HI 0
+#define COEXIST_EN_SZ 1
+#define WIRE_MODE_MSK 0x0000000e
+#define WIRE_MODE_I_MSK 0xfffffff1
+#define WIRE_MODE_SFT 1
+#define WIRE_MODE_HI 3
+#define WIRE_MODE_SZ 3
+#define WL_RX_PRI_MSK 0x00000010
+#define WL_RX_PRI_I_MSK 0xffffffef
+#define WL_RX_PRI_SFT 4
+#define WL_RX_PRI_HI 4
+#define WL_RX_PRI_SZ 1
+#define WL_TX_PRI_MSK 0x00000020
+#define WL_TX_PRI_I_MSK 0xffffffdf
+#define WL_TX_PRI_SFT 5
+#define WL_TX_PRI_HI 5
+#define WL_TX_PRI_SZ 1
+#define GURAN_USE_EN_MSK 0x00000100
+#define GURAN_USE_EN_I_MSK 0xfffffeff
+#define GURAN_USE_EN_SFT 8
+#define GURAN_USE_EN_HI 8
+#define GURAN_USE_EN_SZ 1
+#define GURAN_USE_CTRL_MSK 0x00000200
+#define GURAN_USE_CTRL_I_MSK 0xfffffdff
+#define GURAN_USE_CTRL_SFT 9
+#define GURAN_USE_CTRL_HI 9
+#define GURAN_USE_CTRL_SZ 1
+#define BEACON_TIMEOUT_EN_MSK 0x00000400
+#define BEACON_TIMEOUT_EN_I_MSK 0xfffffbff
+#define BEACON_TIMEOUT_EN_SFT 10
+#define BEACON_TIMEOUT_EN_HI 10
+#define BEACON_TIMEOUT_EN_SZ 1
+#define WLAN_ACT_POL_MSK 0x00000800
+#define WLAN_ACT_POL_I_MSK 0xfffff7ff
+#define WLAN_ACT_POL_SFT 11
+#define WLAN_ACT_POL_HI 11
+#define WLAN_ACT_POL_SZ 1
+#define DUAL_ANT_EN_MSK 0x00001000
+#define DUAL_ANT_EN_I_MSK 0xffffefff
+#define DUAL_ANT_EN_SFT 12
+#define DUAL_ANT_EN_HI 12
+#define DUAL_ANT_EN_SZ 1
+#define TRSW_PHY_POL_MSK 0x00010000
+#define TRSW_PHY_POL_I_MSK 0xfffeffff
+#define TRSW_PHY_POL_SFT 16
+#define TRSW_PHY_POL_HI 16
+#define TRSW_PHY_POL_SZ 1
+#define WIFI_TX_SW_POL_MSK 0x00020000
+#define WIFI_TX_SW_POL_I_MSK 0xfffdffff
+#define WIFI_TX_SW_POL_SFT 17
+#define WIFI_TX_SW_POL_HI 17
+#define WIFI_TX_SW_POL_SZ 1
+#define WIFI_RX_SW_POL_MSK 0x00040000
+#define WIFI_RX_SW_POL_I_MSK 0xfffbffff
+#define WIFI_RX_SW_POL_SFT 18
+#define WIFI_RX_SW_POL_HI 18
+#define WIFI_RX_SW_POL_SZ 1
+#define BT_SW_POL_MSK 0x00080000
+#define BT_SW_POL_I_MSK 0xfff7ffff
+#define BT_SW_POL_SFT 19
+#define BT_SW_POL_HI 19
+#define BT_SW_POL_SZ 1
+#define BT_PRI_SMP_TIME_MSK 0x000000ff
+#define BT_PRI_SMP_TIME_I_MSK 0xffffff00
+#define BT_PRI_SMP_TIME_SFT 0
+#define BT_PRI_SMP_TIME_HI 7
+#define BT_PRI_SMP_TIME_SZ 8
+#define BT_STA_SMP_TIME_MSK 0x0000ff00
+#define BT_STA_SMP_TIME_I_MSK 0xffff00ff
+#define BT_STA_SMP_TIME_SFT 8
+#define BT_STA_SMP_TIME_HI 15
+#define BT_STA_SMP_TIME_SZ 8
+#define BEACON_TIMEOUT_MSK 0x00ff0000
+#define BEACON_TIMEOUT_I_MSK 0xff00ffff
+#define BEACON_TIMEOUT_SFT 16
+#define BEACON_TIMEOUT_HI 23
+#define BEACON_TIMEOUT_SZ 8
+#define WLAN_REMAIN_TIME_MSK 0xff000000
+#define WLAN_REMAIN_TIME_I_MSK 0x00ffffff
+#define WLAN_REMAIN_TIME_SFT 24
+#define WLAN_REMAIN_TIME_HI 31
+#define WLAN_REMAIN_TIME_SZ 8
+#define SW_MANUAL_EN_MSK 0x00000001
+#define SW_MANUAL_EN_I_MSK 0xfffffffe
+#define SW_MANUAL_EN_SFT 0
+#define SW_MANUAL_EN_HI 0
+#define SW_MANUAL_EN_SZ 1
+#define SW_WL_TX_MSK 0x00000002
+#define SW_WL_TX_I_MSK 0xfffffffd
+#define SW_WL_TX_SFT 1
+#define SW_WL_TX_HI 1
+#define SW_WL_TX_SZ 1
+#define SW_WL_RX_MSK 0x00000004
+#define SW_WL_RX_I_MSK 0xfffffffb
+#define SW_WL_RX_SFT 2
+#define SW_WL_RX_HI 2
+#define SW_WL_RX_SZ 1
+#define SW_BT_TRX_MSK 0x00000008
+#define SW_BT_TRX_I_MSK 0xfffffff7
+#define SW_BT_TRX_SFT 3
+#define SW_BT_TRX_HI 3
+#define SW_BT_TRX_SZ 1
+#define BT_TXBAR_MANUAL_EN_MSK 0x00000010
+#define BT_TXBAR_MANUAL_EN_I_MSK 0xffffffef
+#define BT_TXBAR_MANUAL_EN_SFT 4
+#define BT_TXBAR_MANUAL_EN_HI 4
+#define BT_TXBAR_MANUAL_EN_SZ 1
+#define BT_TXBAR_SET_MSK 0x00000020
+#define BT_TXBAR_SET_I_MSK 0xffffffdf
+#define BT_TXBAR_SET_SFT 5
+#define BT_TXBAR_SET_HI 5
+#define BT_TXBAR_SET_SZ 1
+#define BT_BUSY_MANUAL_EN_MSK 0x00000100
+#define BT_BUSY_MANUAL_EN_I_MSK 0xfffffeff
+#define BT_BUSY_MANUAL_EN_SFT 8
+#define BT_BUSY_MANUAL_EN_HI 8
+#define BT_BUSY_MANUAL_EN_SZ 1
+#define BT_BUSY_SET_MSK 0x00000200
+#define BT_BUSY_SET_I_MSK 0xfffffdff
+#define BT_BUSY_SET_SFT 9
+#define BT_BUSY_SET_HI 9
+#define BT_BUSY_SET_SZ 1
+#define G0_PKT_CLS_MIB_EN_MSK 0x00000004
+#define G0_PKT_CLS_MIB_EN_I_MSK 0xfffffffb
+#define G0_PKT_CLS_MIB_EN_SFT 2
+#define G0_PKT_CLS_MIB_EN_HI 2
+#define G0_PKT_CLS_MIB_EN_SZ 1
+#define G0_PKT_CLS_ONGOING_MSK 0x00000008
+#define G0_PKT_CLS_ONGOING_I_MSK 0xfffffff7
+#define G0_PKT_CLS_ONGOING_SFT 3
+#define G0_PKT_CLS_ONGOING_HI 3
+#define G0_PKT_CLS_ONGOING_SZ 1
+#define G1_PKT_CLS_MIB_EN_MSK 0x00000010
+#define G1_PKT_CLS_MIB_EN_I_MSK 0xffffffef
+#define G1_PKT_CLS_MIB_EN_SFT 4
+#define G1_PKT_CLS_MIB_EN_HI 4
+#define G1_PKT_CLS_MIB_EN_SZ 1
+#define G1_PKT_CLS_ONGOING_MSK 0x00000020
+#define G1_PKT_CLS_ONGOING_I_MSK 0xffffffdf
+#define G1_PKT_CLS_ONGOING_SFT 5
+#define G1_PKT_CLS_ONGOING_HI 5
+#define G1_PKT_CLS_ONGOING_SZ 1
+#define Q0_PKT_CLS_MIB_EN_MSK 0x00000040
+#define Q0_PKT_CLS_MIB_EN_I_MSK 0xffffffbf
+#define Q0_PKT_CLS_MIB_EN_SFT 6
+#define Q0_PKT_CLS_MIB_EN_HI 6
+#define Q0_PKT_CLS_MIB_EN_SZ 1
+#define Q0_PKT_CLS_ONGOING_MSK 0x00000080
+#define Q0_PKT_CLS_ONGOING_I_MSK 0xffffff7f
+#define Q0_PKT_CLS_ONGOING_SFT 7
+#define Q0_PKT_CLS_ONGOING_HI 7
+#define Q0_PKT_CLS_ONGOING_SZ 1
+#define Q1_PKT_CLS_MIB_EN_MSK 0x00000100
+#define Q1_PKT_CLS_MIB_EN_I_MSK 0xfffffeff
+#define Q1_PKT_CLS_MIB_EN_SFT 8
+#define Q1_PKT_CLS_MIB_EN_HI 8
+#define Q1_PKT_CLS_MIB_EN_SZ 1
+#define Q1_PKT_CLS_ONGOING_MSK 0x00000200
+#define Q1_PKT_CLS_ONGOING_I_MSK 0xfffffdff
+#define Q1_PKT_CLS_ONGOING_SFT 9
+#define Q1_PKT_CLS_ONGOING_HI 9
+#define Q1_PKT_CLS_ONGOING_SZ 1
+#define Q2_PKT_CLS_MIB_EN_MSK 0x00000400
+#define Q2_PKT_CLS_MIB_EN_I_MSK 0xfffffbff
+#define Q2_PKT_CLS_MIB_EN_SFT 10
+#define Q2_PKT_CLS_MIB_EN_HI 10
+#define Q2_PKT_CLS_MIB_EN_SZ 1
+#define Q2_PKT_CLS_ONGOING_MSK 0x00000800
+#define Q2_PKT_CLS_ONGOING_I_MSK 0xfffff7ff
+#define Q2_PKT_CLS_ONGOING_SFT 11
+#define Q2_PKT_CLS_ONGOING_HI 11
+#define Q2_PKT_CLS_ONGOING_SZ 1
+#define Q3_PKT_CLS_MIB_EN_MSK 0x00001000
+#define Q3_PKT_CLS_MIB_EN_I_MSK 0xffffefff
+#define Q3_PKT_CLS_MIB_EN_SFT 12
+#define Q3_PKT_CLS_MIB_EN_HI 12
+#define Q3_PKT_CLS_MIB_EN_SZ 1
+#define Q3_PKT_CLS_ONGOING_MSK 0x00002000
+#define Q3_PKT_CLS_ONGOING_I_MSK 0xffffdfff
+#define Q3_PKT_CLS_ONGOING_SFT 13
+#define Q3_PKT_CLS_ONGOING_HI 13
+#define Q3_PKT_CLS_ONGOING_SZ 1
+#define SCRT_PKT_CLS_MIB_EN_MSK 0x00004000
+#define SCRT_PKT_CLS_MIB_EN_I_MSK 0xffffbfff
+#define SCRT_PKT_CLS_MIB_EN_SFT 14
+#define SCRT_PKT_CLS_MIB_EN_HI 14
+#define SCRT_PKT_CLS_MIB_EN_SZ 1
+#define SCRT_PKT_CLS_ONGOING_MSK 0x00008000
+#define SCRT_PKT_CLS_ONGOING_I_MSK 0xffff7fff
+#define SCRT_PKT_CLS_ONGOING_SFT 15
+#define SCRT_PKT_CLS_ONGOING_HI 15
+#define SCRT_PKT_CLS_ONGOING_SZ 1
+#define MISC_PKT_CLS_MIB_EN_MSK 0x00010000
+#define MISC_PKT_CLS_MIB_EN_I_MSK 0xfffeffff
+#define MISC_PKT_CLS_MIB_EN_SFT 16
+#define MISC_PKT_CLS_MIB_EN_HI 16
+#define MISC_PKT_CLS_MIB_EN_SZ 1
+#define MISC_PKT_CLS_ONGOING_MSK 0x00020000
+#define MISC_PKT_CLS_ONGOING_I_MSK 0xfffdffff
+#define MISC_PKT_CLS_ONGOING_SFT 17
+#define MISC_PKT_CLS_ONGOING_HI 17
+#define MISC_PKT_CLS_ONGOING_SZ 1
+#define MTX_WSID0_SUCC_MSK 0x0000ffff
+#define MTX_WSID0_SUCC_I_MSK 0xffff0000
+#define MTX_WSID0_SUCC_SFT 0
+#define MTX_WSID0_SUCC_HI 15
+#define MTX_WSID0_SUCC_SZ 16
+#define MTX_WSID0_FRM_MSK 0x0000ffff
+#define MTX_WSID0_FRM_I_MSK 0xffff0000
+#define MTX_WSID0_FRM_SFT 0
+#define MTX_WSID0_FRM_HI 15
+#define MTX_WSID0_FRM_SZ 16
+#define MTX_WSID0_RETRY_MSK 0x0000ffff
+#define MTX_WSID0_RETRY_I_MSK 0xffff0000
+#define MTX_WSID0_RETRY_SFT 0
+#define MTX_WSID0_RETRY_HI 15
+#define MTX_WSID0_RETRY_SZ 16
+#define MTX_WSID0_TOTAL_MSK 0x0000ffff
+#define MTX_WSID0_TOTAL_I_MSK 0xffff0000
+#define MTX_WSID0_TOTAL_SFT 0
+#define MTX_WSID0_TOTAL_HI 15
+#define MTX_WSID0_TOTAL_SZ 16
+#define MTX_GRP_MSK 0x000fffff
+#define MTX_GRP_I_MSK 0xfff00000
+#define MTX_GRP_SFT 0
+#define MTX_GRP_HI 19
+#define MTX_GRP_SZ 20
+#define MTX_FAIL_MSK 0x0000ffff
+#define MTX_FAIL_I_MSK 0xffff0000
+#define MTX_FAIL_SFT 0
+#define MTX_FAIL_HI 15
+#define MTX_FAIL_SZ 16
+#define MTX_RETRY_MSK 0x000fffff
+#define MTX_RETRY_I_MSK 0xfff00000
+#define MTX_RETRY_SFT 0
+#define MTX_RETRY_HI 19
+#define MTX_RETRY_SZ 20
+#define MTX_MULTI_RETRY_MSK 0x000fffff
+#define MTX_MULTI_RETRY_I_MSK 0xfff00000
+#define MTX_MULTI_RETRY_SFT 0
+#define MTX_MULTI_RETRY_HI 19
+#define MTX_MULTI_RETRY_SZ 20
+#define MTX_RTS_SUCC_MSK 0x0000ffff
+#define MTX_RTS_SUCC_I_MSK 0xffff0000
+#define MTX_RTS_SUCC_SFT 0
+#define MTX_RTS_SUCC_HI 15
+#define MTX_RTS_SUCC_SZ 16
+#define MTX_RTS_FAIL_MSK 0x0000ffff
+#define MTX_RTS_FAIL_I_MSK 0xffff0000
+#define MTX_RTS_FAIL_SFT 0
+#define MTX_RTS_FAIL_HI 15
+#define MTX_RTS_FAIL_SZ 16
+#define MTX_ACK_FAIL_MSK 0x0000ffff
+#define MTX_ACK_FAIL_I_MSK 0xffff0000
+#define MTX_ACK_FAIL_SFT 0
+#define MTX_ACK_FAIL_HI 15
+#define MTX_ACK_FAIL_SZ 16
+#define MTX_FRM_MSK 0x000fffff
+#define MTX_FRM_I_MSK 0xfff00000
+#define MTX_FRM_SFT 0
+#define MTX_FRM_HI 19
+#define MTX_FRM_SZ 20
+#define MTX_ACK_TX_MSK 0x0000ffff
+#define MTX_ACK_TX_I_MSK 0xffff0000
+#define MTX_ACK_TX_SFT 0
+#define MTX_ACK_TX_HI 15
+#define MTX_ACK_TX_SZ 16
+#define MTX_CTS_TX_MSK 0x0000ffff
+#define MTX_CTS_TX_I_MSK 0xffff0000
+#define MTX_CTS_TX_SFT 0
+#define MTX_CTS_TX_HI 15
+#define MTX_CTS_TX_SZ 16
+#define MRX_DUP_MSK 0x0000ffff
+#define MRX_DUP_I_MSK 0xffff0000
+#define MRX_DUP_SFT 0
+#define MRX_DUP_HI 15
+#define MRX_DUP_SZ 16
+#define MRX_FRG_MSK 0x000fffff
+#define MRX_FRG_I_MSK 0xfff00000
+#define MRX_FRG_SFT 0
+#define MRX_FRG_HI 19
+#define MRX_FRG_SZ 20
+#define MRX_GRP_MSK 0x000fffff
+#define MRX_GRP_I_MSK 0xfff00000
+#define MRX_GRP_SFT 0
+#define MRX_GRP_HI 19
+#define MRX_GRP_SZ 20
+#define MRX_FCS_ERR_MSK 0x0000ffff
+#define MRX_FCS_ERR_I_MSK 0xffff0000
+#define MRX_FCS_ERR_SFT 0
+#define MRX_FCS_ERR_HI 15
+#define MRX_FCS_ERR_SZ 16
+#define MRX_FCS_SUC_MSK 0x0000ffff
+#define MRX_FCS_SUC_I_MSK 0xffff0000
+#define MRX_FCS_SUC_SFT 0
+#define MRX_FCS_SUC_HI 15
+#define MRX_FCS_SUC_SZ 16
+#define MRX_MISS_MSK 0x0000ffff
+#define MRX_MISS_I_MSK 0xffff0000
+#define MRX_MISS_SFT 0
+#define MRX_MISS_HI 15
+#define MRX_MISS_SZ 16
+#define MRX_ALC_FAIL_MSK 0x0000ffff
+#define MRX_ALC_FAIL_I_MSK 0xffff0000
+#define MRX_ALC_FAIL_SFT 0
+#define MRX_ALC_FAIL_HI 15
+#define MRX_ALC_FAIL_SZ 16
+#define MRX_DAT_NTF_MSK 0x0000ffff
+#define MRX_DAT_NTF_I_MSK 0xffff0000
+#define MRX_DAT_NTF_SFT 0
+#define MRX_DAT_NTF_HI 15
+#define MRX_DAT_NTF_SZ 16
+#define MRX_RTS_NTF_MSK 0x0000ffff
+#define MRX_RTS_NTF_I_MSK 0xffff0000
+#define MRX_RTS_NTF_SFT 0
+#define MRX_RTS_NTF_HI 15
+#define MRX_RTS_NTF_SZ 16
+#define MRX_CTS_NTF_MSK 0x0000ffff
+#define MRX_CTS_NTF_I_MSK 0xffff0000
+#define MRX_CTS_NTF_SFT 0
+#define MRX_CTS_NTF_HI 15
+#define MRX_CTS_NTF_SZ 16
+#define MRX_ACK_NTF_MSK 0x0000ffff
+#define MRX_ACK_NTF_I_MSK 0xffff0000
+#define MRX_ACK_NTF_SFT 0
+#define MRX_ACK_NTF_HI 15
+#define MRX_ACK_NTF_SZ 16
+#define MRX_BA_NTF_MSK 0x0000ffff
+#define MRX_BA_NTF_I_MSK 0xffff0000
+#define MRX_BA_NTF_SFT 0
+#define MRX_BA_NTF_HI 15
+#define MRX_BA_NTF_SZ 16
+#define MRX_DATA_NTF_MSK 0x0000ffff
+#define MRX_DATA_NTF_I_MSK 0xffff0000
+#define MRX_DATA_NTF_SFT 0
+#define MRX_DATA_NTF_HI 15
+#define MRX_DATA_NTF_SZ 16
+#define MRX_MNG_NTF_MSK 0x0000ffff
+#define MRX_MNG_NTF_I_MSK 0xffff0000
+#define MRX_MNG_NTF_SFT 0
+#define MRX_MNG_NTF_HI 15
+#define MRX_MNG_NTF_SZ 16
+#define MRX_DAT_CRC_NTF_MSK 0x0000ffff
+#define MRX_DAT_CRC_NTF_I_MSK 0xffff0000
+#define MRX_DAT_CRC_NTF_SFT 0
+#define MRX_DAT_CRC_NTF_HI 15
+#define MRX_DAT_CRC_NTF_SZ 16
+#define MRX_BAR_NTF_MSK 0x0000ffff
+#define MRX_BAR_NTF_I_MSK 0xffff0000
+#define MRX_BAR_NTF_SFT 0
+#define MRX_BAR_NTF_HI 15
+#define MRX_BAR_NTF_SZ 16
+#define MRX_MB_MISS_MSK 0x0000ffff
+#define MRX_MB_MISS_I_MSK 0xffff0000
+#define MRX_MB_MISS_SFT 0
+#define MRX_MB_MISS_HI 15
+#define MRX_MB_MISS_SZ 16
+#define MRX_NIDLE_MISS_MSK 0x0000ffff
+#define MRX_NIDLE_MISS_I_MSK 0xffff0000
+#define MRX_NIDLE_MISS_SFT 0
+#define MRX_NIDLE_MISS_HI 15
+#define MRX_NIDLE_MISS_SZ 16
+#define MRX_CSR_NTF_MSK 0x0000ffff
+#define MRX_CSR_NTF_I_MSK 0xffff0000
+#define MRX_CSR_NTF_SFT 0
+#define MRX_CSR_NTF_HI 15
+#define MRX_CSR_NTF_SZ 16
+#define DBG_Q0_SUCC_MSK 0x0000ffff
+#define DBG_Q0_SUCC_I_MSK 0xffff0000
+#define DBG_Q0_SUCC_SFT 0
+#define DBG_Q0_SUCC_HI 15
+#define DBG_Q0_SUCC_SZ 16
+#define DBG_Q0_FAIL_MSK 0x0000ffff
+#define DBG_Q0_FAIL_I_MSK 0xffff0000
+#define DBG_Q0_FAIL_SFT 0
+#define DBG_Q0_FAIL_HI 15
+#define DBG_Q0_FAIL_SZ 16
+#define DBG_Q0_ACK_SUCC_MSK 0x0000ffff
+#define DBG_Q0_ACK_SUCC_I_MSK 0xffff0000
+#define DBG_Q0_ACK_SUCC_SFT 0
+#define DBG_Q0_ACK_SUCC_HI 15
+#define DBG_Q0_ACK_SUCC_SZ 16
+#define DBG_Q0_ACK_FAIL_MSK 0x0000ffff
+#define DBG_Q0_ACK_FAIL_I_MSK 0xffff0000
+#define DBG_Q0_ACK_FAIL_SFT 0
+#define DBG_Q0_ACK_FAIL_HI 15
+#define DBG_Q0_ACK_FAIL_SZ 16
+#define DBG_Q1_SUCC_MSK 0x0000ffff
+#define DBG_Q1_SUCC_I_MSK 0xffff0000
+#define DBG_Q1_SUCC_SFT 0
+#define DBG_Q1_SUCC_HI 15
+#define DBG_Q1_SUCC_SZ 16
+#define DBG_Q1_FAIL_MSK 0x0000ffff
+#define DBG_Q1_FAIL_I_MSK 0xffff0000
+#define DBG_Q1_FAIL_SFT 0
+#define DBG_Q1_FAIL_HI 15
+#define DBG_Q1_FAIL_SZ 16
+#define DBG_Q1_ACK_SUCC_MSK 0x0000ffff
+#define DBG_Q1_ACK_SUCC_I_MSK 0xffff0000
+#define DBG_Q1_ACK_SUCC_SFT 0
+#define DBG_Q1_ACK_SUCC_HI 15
+#define DBG_Q1_ACK_SUCC_SZ 16
+#define DBG_Q1_ACK_FAIL_MSK 0x0000ffff
+#define DBG_Q1_ACK_FAIL_I_MSK 0xffff0000
+#define DBG_Q1_ACK_FAIL_SFT 0
+#define DBG_Q1_ACK_FAIL_HI 15
+#define DBG_Q1_ACK_FAIL_SZ 16
+#define DBG_Q2_SUCC_MSK 0x0000ffff
+#define DBG_Q2_SUCC_I_MSK 0xffff0000
+#define DBG_Q2_SUCC_SFT 0
+#define DBG_Q2_SUCC_HI 15
+#define DBG_Q2_SUCC_SZ 16
+#define DBG_Q2_FAIL_MSK 0x0000ffff
+#define DBG_Q2_FAIL_I_MSK 0xffff0000
+#define DBG_Q2_FAIL_SFT 0
+#define DBG_Q2_FAIL_HI 15
+#define DBG_Q2_FAIL_SZ 16
+#define DBG_Q2_ACK_SUCC_MSK 0x0000ffff
+#define DBG_Q2_ACK_SUCC_I_MSK 0xffff0000
+#define DBG_Q2_ACK_SUCC_SFT 0
+#define DBG_Q2_ACK_SUCC_HI 15
+#define DBG_Q2_ACK_SUCC_SZ 16
+#define DBG_Q2_ACK_FAIL_MSK 0x0000ffff
+#define DBG_Q2_ACK_FAIL_I_MSK 0xffff0000
+#define DBG_Q2_ACK_FAIL_SFT 0
+#define DBG_Q2_ACK_FAIL_HI 15
+#define DBG_Q2_ACK_FAIL_SZ 16
+#define DBG_Q3_SUCC_MSK 0x0000ffff
+#define DBG_Q3_SUCC_I_MSK 0xffff0000
+#define DBG_Q3_SUCC_SFT 0
+#define DBG_Q3_SUCC_HI 15
+#define DBG_Q3_SUCC_SZ 16
+#define DBG_Q3_FAIL_MSK 0x0000ffff
+#define DBG_Q3_FAIL_I_MSK 0xffff0000
+#define DBG_Q3_FAIL_SFT 0
+#define DBG_Q3_FAIL_HI 15
+#define DBG_Q3_FAIL_SZ 16
+#define DBG_Q3_ACK_SUCC_MSK 0x0000ffff
+#define DBG_Q3_ACK_SUCC_I_MSK 0xffff0000
+#define DBG_Q3_ACK_SUCC_SFT 0
+#define DBG_Q3_ACK_SUCC_HI 15
+#define DBG_Q3_ACK_SUCC_SZ 16
+#define DBG_Q3_ACK_FAIL_MSK 0x0000ffff
+#define DBG_Q3_ACK_FAIL_I_MSK 0xffff0000
+#define DBG_Q3_ACK_FAIL_SFT 0
+#define DBG_Q3_ACK_FAIL_HI 15
+#define DBG_Q3_ACK_FAIL_SZ 16
+#define SCRT_TKIP_CERR_MSK 0x000fffff
+#define SCRT_TKIP_CERR_I_MSK 0xfff00000
+#define SCRT_TKIP_CERR_SFT 0
+#define SCRT_TKIP_CERR_HI 19
+#define SCRT_TKIP_CERR_SZ 20
+#define SCRT_TKIP_MIC_ERR_MSK 0x000fffff
+#define SCRT_TKIP_MIC_ERR_I_MSK 0xfff00000
+#define SCRT_TKIP_MIC_ERR_SFT 0
+#define SCRT_TKIP_MIC_ERR_HI 19
+#define SCRT_TKIP_MIC_ERR_SZ 20
+#define SCRT_TKIP_RPLY_MSK 0x000fffff
+#define SCRT_TKIP_RPLY_I_MSK 0xfff00000
+#define SCRT_TKIP_RPLY_SFT 0
+#define SCRT_TKIP_RPLY_HI 19
+#define SCRT_TKIP_RPLY_SZ 20
+#define SCRT_CCMP_RPLY_MSK 0x000fffff
+#define SCRT_CCMP_RPLY_I_MSK 0xfff00000
+#define SCRT_CCMP_RPLY_SFT 0
+#define SCRT_CCMP_RPLY_HI 19
+#define SCRT_CCMP_RPLY_SZ 20
+#define SCRT_CCMP_CERR_MSK 0x000fffff
+#define SCRT_CCMP_CERR_I_MSK 0xfff00000
+#define SCRT_CCMP_CERR_SFT 0
+#define SCRT_CCMP_CERR_HI 19
+#define SCRT_CCMP_CERR_SZ 20
+#define DBG_LEN_CRC_FAIL_MSK 0x0000ffff
+#define DBG_LEN_CRC_FAIL_I_MSK 0xffff0000
+#define DBG_LEN_CRC_FAIL_SFT 0
+#define DBG_LEN_CRC_FAIL_HI 15
+#define DBG_LEN_CRC_FAIL_SZ 16
+#define DBG_LEN_ALC_FAIL_MSK 0x0000ffff
+#define DBG_LEN_ALC_FAIL_I_MSK 0xffff0000
+#define DBG_LEN_ALC_FAIL_SFT 0
+#define DBG_LEN_ALC_FAIL_HI 15
+#define DBG_LEN_ALC_FAIL_SZ 16
+#define DBG_AMPDU_PASS_MSK 0x0000ffff
+#define DBG_AMPDU_PASS_I_MSK 0xffff0000
+#define DBG_AMPDU_PASS_SFT 0
+#define DBG_AMPDU_PASS_HI 15
+#define DBG_AMPDU_PASS_SZ 16
+#define DBG_AMPDU_FAIL_MSK 0x0000ffff
+#define DBG_AMPDU_FAIL_I_MSK 0xffff0000
+#define DBG_AMPDU_FAIL_SFT 0
+#define DBG_AMPDU_FAIL_HI 15
+#define DBG_AMPDU_FAIL_SZ 16
+#define RXID_ALC_CNT_FAIL_MSK 0x0000ffff
+#define RXID_ALC_CNT_FAIL_I_MSK 0xffff0000
+#define RXID_ALC_CNT_FAIL_SFT 0
+#define RXID_ALC_CNT_FAIL_HI 15
+#define RXID_ALC_CNT_FAIL_SZ 16
+#define RXID_ALC_LEN_FAIL_MSK 0x0000ffff
+#define RXID_ALC_LEN_FAIL_I_MSK 0xffff0000
+#define RXID_ALC_LEN_FAIL_SFT 0
+#define RXID_ALC_LEN_FAIL_HI 15
+#define RXID_ALC_LEN_FAIL_SZ 16
+#define CBR_RG_EN_MANUAL_MSK 0x00000001
+#define CBR_RG_EN_MANUAL_I_MSK 0xfffffffe
+#define CBR_RG_EN_MANUAL_SFT 0
+#define CBR_RG_EN_MANUAL_HI 0
+#define CBR_RG_EN_MANUAL_SZ 1
+#define CBR_RG_TX_EN_MSK 0x00000002
+#define CBR_RG_TX_EN_I_MSK 0xfffffffd
+#define CBR_RG_TX_EN_SFT 1
+#define CBR_RG_TX_EN_HI 1
+#define CBR_RG_TX_EN_SZ 1
+#define CBR_RG_TX_PA_EN_MSK 0x00000004
+#define CBR_RG_TX_PA_EN_I_MSK 0xfffffffb
+#define CBR_RG_TX_PA_EN_SFT 2
+#define CBR_RG_TX_PA_EN_HI 2
+#define CBR_RG_TX_PA_EN_SZ 1
+#define CBR_RG_TX_DAC_EN_MSK 0x00000008
+#define CBR_RG_TX_DAC_EN_I_MSK 0xfffffff7
+#define CBR_RG_TX_DAC_EN_SFT 3
+#define CBR_RG_TX_DAC_EN_HI 3
+#define CBR_RG_TX_DAC_EN_SZ 1
+#define CBR_RG_RX_AGC_MSK 0x00000010
+#define CBR_RG_RX_AGC_I_MSK 0xffffffef
+#define CBR_RG_RX_AGC_SFT 4
+#define CBR_RG_RX_AGC_HI 4
+#define CBR_RG_RX_AGC_SZ 1
+#define CBR_RG_RX_GAIN_MANUAL_MSK 0x00000020
+#define CBR_RG_RX_GAIN_MANUAL_I_MSK 0xffffffdf
+#define CBR_RG_RX_GAIN_MANUAL_SFT 5
+#define CBR_RG_RX_GAIN_MANUAL_HI 5
+#define CBR_RG_RX_GAIN_MANUAL_SZ 1
+#define CBR_RG_RFG_MSK 0x000000c0
+#define CBR_RG_RFG_I_MSK 0xffffff3f
+#define CBR_RG_RFG_SFT 6
+#define CBR_RG_RFG_HI 7
+#define CBR_RG_RFG_SZ 2
+#define CBR_RG_PGAG_MSK 0x00000f00
+#define CBR_RG_PGAG_I_MSK 0xfffff0ff
+#define CBR_RG_PGAG_SFT 8
+#define CBR_RG_PGAG_HI 11
+#define CBR_RG_PGAG_SZ 4
+#define CBR_RG_MODE_MSK 0x00003000
+#define CBR_RG_MODE_I_MSK 0xffffcfff
+#define CBR_RG_MODE_SFT 12
+#define CBR_RG_MODE_HI 13
+#define CBR_RG_MODE_SZ 2
+#define CBR_RG_EN_TX_TRSW_MSK 0x00004000
+#define CBR_RG_EN_TX_TRSW_I_MSK 0xffffbfff
+#define CBR_RG_EN_TX_TRSW_SFT 14
+#define CBR_RG_EN_TX_TRSW_HI 14
+#define CBR_RG_EN_TX_TRSW_SZ 1
+#define CBR_RG_EN_SX_MSK 0x00008000
+#define CBR_RG_EN_SX_I_MSK 0xffff7fff
+#define CBR_RG_EN_SX_SFT 15
+#define CBR_RG_EN_SX_HI 15
+#define CBR_RG_EN_SX_SZ 1
+#define CBR_RG_EN_RX_LNA_MSK 0x00010000
+#define CBR_RG_EN_RX_LNA_I_MSK 0xfffeffff
+#define CBR_RG_EN_RX_LNA_SFT 16
+#define CBR_RG_EN_RX_LNA_HI 16
+#define CBR_RG_EN_RX_LNA_SZ 1
+#define CBR_RG_EN_RX_MIXER_MSK 0x00020000
+#define CBR_RG_EN_RX_MIXER_I_MSK 0xfffdffff
+#define CBR_RG_EN_RX_MIXER_SFT 17
+#define CBR_RG_EN_RX_MIXER_HI 17
+#define CBR_RG_EN_RX_MIXER_SZ 1
+#define CBR_RG_EN_RX_DIV2_MSK 0x00040000
+#define CBR_RG_EN_RX_DIV2_I_MSK 0xfffbffff
+#define CBR_RG_EN_RX_DIV2_SFT 18
+#define CBR_RG_EN_RX_DIV2_HI 18
+#define CBR_RG_EN_RX_DIV2_SZ 1
+#define CBR_RG_EN_RX_LOBUF_MSK 0x00080000
+#define CBR_RG_EN_RX_LOBUF_I_MSK 0xfff7ffff
+#define CBR_RG_EN_RX_LOBUF_SFT 19
+#define CBR_RG_EN_RX_LOBUF_HI 19
+#define CBR_RG_EN_RX_LOBUF_SZ 1
+#define CBR_RG_EN_RX_TZ_MSK 0x00100000
+#define CBR_RG_EN_RX_TZ_I_MSK 0xffefffff
+#define CBR_RG_EN_RX_TZ_SFT 20
+#define CBR_RG_EN_RX_TZ_HI 20
+#define CBR_RG_EN_RX_TZ_SZ 1
+#define CBR_RG_EN_RX_FILTER_MSK 0x00200000
+#define CBR_RG_EN_RX_FILTER_I_MSK 0xffdfffff
+#define CBR_RG_EN_RX_FILTER_SFT 21
+#define CBR_RG_EN_RX_FILTER_HI 21
+#define CBR_RG_EN_RX_FILTER_SZ 1
+#define CBR_RG_EN_RX_HPF_MSK 0x00400000
+#define CBR_RG_EN_RX_HPF_I_MSK 0xffbfffff
+#define CBR_RG_EN_RX_HPF_SFT 22
+#define CBR_RG_EN_RX_HPF_HI 22
+#define CBR_RG_EN_RX_HPF_SZ 1
+#define CBR_RG_EN_RX_RSSI_MSK 0x00800000
+#define CBR_RG_EN_RX_RSSI_I_MSK 0xff7fffff
+#define CBR_RG_EN_RX_RSSI_SFT 23
+#define CBR_RG_EN_RX_RSSI_HI 23
+#define CBR_RG_EN_RX_RSSI_SZ 1
+#define CBR_RG_EN_ADC_MSK 0x01000000
+#define CBR_RG_EN_ADC_I_MSK 0xfeffffff
+#define CBR_RG_EN_ADC_SFT 24
+#define CBR_RG_EN_ADC_HI 24
+#define CBR_RG_EN_ADC_SZ 1
+#define CBR_RG_EN_TX_MOD_MSK 0x02000000
+#define CBR_RG_EN_TX_MOD_I_MSK 0xfdffffff
+#define CBR_RG_EN_TX_MOD_SFT 25
+#define CBR_RG_EN_TX_MOD_HI 25
+#define CBR_RG_EN_TX_MOD_SZ 1
+#define CBR_RG_EN_TX_DIV2_MSK 0x04000000
+#define CBR_RG_EN_TX_DIV2_I_MSK 0xfbffffff
+#define CBR_RG_EN_TX_DIV2_SFT 26
+#define CBR_RG_EN_TX_DIV2_HI 26
+#define CBR_RG_EN_TX_DIV2_SZ 1
+#define CBR_RG_EN_TX_DIV2_BUF_MSK 0x08000000
+#define CBR_RG_EN_TX_DIV2_BUF_I_MSK 0xf7ffffff
+#define CBR_RG_EN_TX_DIV2_BUF_SFT 27
+#define CBR_RG_EN_TX_DIV2_BUF_HI 27
+#define CBR_RG_EN_TX_DIV2_BUF_SZ 1
+#define CBR_RG_EN_TX_LOBF_MSK 0x10000000
+#define CBR_RG_EN_TX_LOBF_I_MSK 0xefffffff
+#define CBR_RG_EN_TX_LOBF_SFT 28
+#define CBR_RG_EN_TX_LOBF_HI 28
+#define CBR_RG_EN_TX_LOBF_SZ 1
+#define CBR_RG_EN_RX_LOBF_MSK 0x20000000
+#define CBR_RG_EN_RX_LOBF_I_MSK 0xdfffffff
+#define CBR_RG_EN_RX_LOBF_SFT 29
+#define CBR_RG_EN_RX_LOBF_HI 29
+#define CBR_RG_EN_RX_LOBF_SZ 1
+#define CBR_RG_SEL_DPLL_CLK_MSK 0x40000000
+#define CBR_RG_SEL_DPLL_CLK_I_MSK 0xbfffffff
+#define CBR_RG_SEL_DPLL_CLK_SFT 30
+#define CBR_RG_SEL_DPLL_CLK_HI 30
+#define CBR_RG_SEL_DPLL_CLK_SZ 1
+#define CBR_RG_EN_TX_DPD_MSK 0x00000001
+#define CBR_RG_EN_TX_DPD_I_MSK 0xfffffffe
+#define CBR_RG_EN_TX_DPD_SFT 0
+#define CBR_RG_EN_TX_DPD_HI 0
+#define CBR_RG_EN_TX_DPD_SZ 1
+#define CBR_RG_EN_TX_TSSI_MSK 0x00000002
+#define CBR_RG_EN_TX_TSSI_I_MSK 0xfffffffd
+#define CBR_RG_EN_TX_TSSI_SFT 1
+#define CBR_RG_EN_TX_TSSI_HI 1
+#define CBR_RG_EN_TX_TSSI_SZ 1
+#define CBR_RG_EN_RX_IQCAL_MSK 0x00000004
+#define CBR_RG_EN_RX_IQCAL_I_MSK 0xfffffffb
+#define CBR_RG_EN_RX_IQCAL_SFT 2
+#define CBR_RG_EN_RX_IQCAL_HI 2
+#define CBR_RG_EN_RX_IQCAL_SZ 1
+#define CBR_RG_EN_TX_DAC_CAL_MSK 0x00000008
+#define CBR_RG_EN_TX_DAC_CAL_I_MSK 0xfffffff7
+#define CBR_RG_EN_TX_DAC_CAL_SFT 3
+#define CBR_RG_EN_TX_DAC_CAL_HI 3
+#define CBR_RG_EN_TX_DAC_CAL_SZ 1
+#define CBR_RG_EN_TX_SELF_MIXER_MSK 0x00000010
+#define CBR_RG_EN_TX_SELF_MIXER_I_MSK 0xffffffef
+#define CBR_RG_EN_TX_SELF_MIXER_SFT 4
+#define CBR_RG_EN_TX_SELF_MIXER_HI 4
+#define CBR_RG_EN_TX_SELF_MIXER_SZ 1
+#define CBR_RG_EN_TX_DAC_OUT_MSK 0x00000020
+#define CBR_RG_EN_TX_DAC_OUT_I_MSK 0xffffffdf
+#define CBR_RG_EN_TX_DAC_OUT_SFT 5
+#define CBR_RG_EN_TX_DAC_OUT_HI 5
+#define CBR_RG_EN_TX_DAC_OUT_SZ 1
+#define CBR_RG_EN_LDO_RX_FE_MSK 0x00000040
+#define CBR_RG_EN_LDO_RX_FE_I_MSK 0xffffffbf
+#define CBR_RG_EN_LDO_RX_FE_SFT 6
+#define CBR_RG_EN_LDO_RX_FE_HI 6
+#define CBR_RG_EN_LDO_RX_FE_SZ 1
+#define CBR_RG_EN_LDO_ABB_MSK 0x00000080
+#define CBR_RG_EN_LDO_ABB_I_MSK 0xffffff7f
+#define CBR_RG_EN_LDO_ABB_SFT 7
+#define CBR_RG_EN_LDO_ABB_HI 7
+#define CBR_RG_EN_LDO_ABB_SZ 1
+#define CBR_RG_EN_LDO_AFE_MSK 0x00000100
+#define CBR_RG_EN_LDO_AFE_I_MSK 0xfffffeff
+#define CBR_RG_EN_LDO_AFE_SFT 8
+#define CBR_RG_EN_LDO_AFE_HI 8
+#define CBR_RG_EN_LDO_AFE_SZ 1
+#define CBR_RG_EN_SX_CHPLDO_MSK 0x00000200
+#define CBR_RG_EN_SX_CHPLDO_I_MSK 0xfffffdff
+#define CBR_RG_EN_SX_CHPLDO_SFT 9
+#define CBR_RG_EN_SX_CHPLDO_HI 9
+#define CBR_RG_EN_SX_CHPLDO_SZ 1
+#define CBR_RG_EN_SX_LOBFLDO_MSK 0x00000400
+#define CBR_RG_EN_SX_LOBFLDO_I_MSK 0xfffffbff
+#define CBR_RG_EN_SX_LOBFLDO_SFT 10
+#define CBR_RG_EN_SX_LOBFLDO_HI 10
+#define CBR_RG_EN_SX_LOBFLDO_SZ 1
+#define CBR_RG_EN_IREF_RX_MSK 0x00000800
+#define CBR_RG_EN_IREF_RX_I_MSK 0xfffff7ff
+#define CBR_RG_EN_IREF_RX_SFT 11
+#define CBR_RG_EN_IREF_RX_HI 11
+#define CBR_RG_EN_IREF_RX_SZ 1
+#define CBR_RG_DCDC_MODE_MSK 0x00001000
+#define CBR_RG_DCDC_MODE_I_MSK 0xffffefff
+#define CBR_RG_DCDC_MODE_SFT 12
+#define CBR_RG_DCDC_MODE_HI 12
+#define CBR_RG_DCDC_MODE_SZ 1
+#define CBR_RG_LDO_LEVEL_RX_FE_MSK 0x00000007
+#define CBR_RG_LDO_LEVEL_RX_FE_I_MSK 0xfffffff8
+#define CBR_RG_LDO_LEVEL_RX_FE_SFT 0
+#define CBR_RG_LDO_LEVEL_RX_FE_HI 2
+#define CBR_RG_LDO_LEVEL_RX_FE_SZ 3
+#define CBR_RG_LDO_LEVEL_ABB_MSK 0x00000038
+#define CBR_RG_LDO_LEVEL_ABB_I_MSK 0xffffffc7
+#define CBR_RG_LDO_LEVEL_ABB_SFT 3
+#define CBR_RG_LDO_LEVEL_ABB_HI 5
+#define CBR_RG_LDO_LEVEL_ABB_SZ 3
+#define CBR_RG_LDO_LEVEL_AFE_MSK 0x000001c0
+#define CBR_RG_LDO_LEVEL_AFE_I_MSK 0xfffffe3f
+#define CBR_RG_LDO_LEVEL_AFE_SFT 6
+#define CBR_RG_LDO_LEVEL_AFE_HI 8
+#define CBR_RG_LDO_LEVEL_AFE_SZ 3
+#define CBR_RG_SX_LDO_CHP_LEVEL_MSK 0x00000e00
+#define CBR_RG_SX_LDO_CHP_LEVEL_I_MSK 0xfffff1ff
+#define CBR_RG_SX_LDO_CHP_LEVEL_SFT 9
+#define CBR_RG_SX_LDO_CHP_LEVEL_HI 11
+#define CBR_RG_SX_LDO_CHP_LEVEL_SZ 3
+#define CBR_RG_SX_LDO_LOBF_LEVEL_MSK 0x00007000
+#define CBR_RG_SX_LDO_LOBF_LEVEL_I_MSK 0xffff8fff
+#define CBR_RG_SX_LDO_LOBF_LEVEL_SFT 12
+#define CBR_RG_SX_LDO_LOBF_LEVEL_HI 14
+#define CBR_RG_SX_LDO_LOBF_LEVEL_SZ 3
+#define CBR_RG_SX_LDO_XOSC_LEVEL_MSK 0x00038000
+#define CBR_RG_SX_LDO_XOSC_LEVEL_I_MSK 0xfffc7fff
+#define CBR_RG_SX_LDO_XOSC_LEVEL_SFT 15
+#define CBR_RG_SX_LDO_XOSC_LEVEL_HI 17
+#define CBR_RG_SX_LDO_XOSC_LEVEL_SZ 3
+#define CBR_RG_DP_LDO_LEVEL_MSK 0x001c0000
+#define CBR_RG_DP_LDO_LEVEL_I_MSK 0xffe3ffff
+#define CBR_RG_DP_LDO_LEVEL_SFT 18
+#define CBR_RG_DP_LDO_LEVEL_HI 20
+#define CBR_RG_DP_LDO_LEVEL_SZ 3
+#define CBR_RG_SX_LDO_VCO_LEVEL_MSK 0x00e00000
+#define CBR_RG_SX_LDO_VCO_LEVEL_I_MSK 0xff1fffff
+#define CBR_RG_SX_LDO_VCO_LEVEL_SFT 21
+#define CBR_RG_SX_LDO_VCO_LEVEL_HI 23
+#define CBR_RG_SX_LDO_VCO_LEVEL_SZ 3
+#define CBR_RG_TX_LDO_TX_LEVEL_MSK 0x07000000
+#define CBR_RG_TX_LDO_TX_LEVEL_I_MSK 0xf8ffffff
+#define CBR_RG_TX_LDO_TX_LEVEL_SFT 24
+#define CBR_RG_TX_LDO_TX_LEVEL_HI 26
+#define CBR_RG_TX_LDO_TX_LEVEL_SZ 3
+#define CBR_RG_BUCK_LEVEL_MSK 0x38000000
+#define CBR_RG_BUCK_LEVEL_I_MSK 0xc7ffffff
+#define CBR_RG_BUCK_LEVEL_SFT 27
+#define CBR_RG_BUCK_LEVEL_HI 29
+#define CBR_RG_BUCK_LEVEL_SZ 3
+#define CBR_RG_EN_RX_PADSW_MSK 0x00000001
+#define CBR_RG_EN_RX_PADSW_I_MSK 0xfffffffe
+#define CBR_RG_EN_RX_PADSW_SFT 0
+#define CBR_RG_EN_RX_PADSW_HI 0
+#define CBR_RG_EN_RX_PADSW_SZ 1
+#define CBR_RG_EN_RX_TESTNODE_MSK 0x00000002
+#define CBR_RG_EN_RX_TESTNODE_I_MSK 0xfffffffd
+#define CBR_RG_EN_RX_TESTNODE_SFT 1
+#define CBR_RG_EN_RX_TESTNODE_HI 1
+#define CBR_RG_EN_RX_TESTNODE_SZ 1
+#define CBR_RG_RX_ABBCFIX_MSK 0x00000004
+#define CBR_RG_RX_ABBCFIX_I_MSK 0xfffffffb
+#define CBR_RG_RX_ABBCFIX_SFT 2
+#define CBR_RG_RX_ABBCFIX_HI 2
+#define CBR_RG_RX_ABBCFIX_SZ 1
+#define CBR_RG_RX_ABBCTUNE_MSK 0x000001f8
+#define CBR_RG_RX_ABBCTUNE_I_MSK 0xfffffe07
+#define CBR_RG_RX_ABBCTUNE_SFT 3
+#define CBR_RG_RX_ABBCTUNE_HI 8
+#define CBR_RG_RX_ABBCTUNE_SZ 6
+#define CBR_RG_RX_ABBOUT_TRI_STATE_MSK 0x00000200
+#define CBR_RG_RX_ABBOUT_TRI_STATE_I_MSK 0xfffffdff
+#define CBR_RG_RX_ABBOUT_TRI_STATE_SFT 9
+#define CBR_RG_RX_ABBOUT_TRI_STATE_HI 9
+#define CBR_RG_RX_ABBOUT_TRI_STATE_SZ 1
+#define CBR_RG_RX_ABB_N_MODE_MSK 0x00000400
+#define CBR_RG_RX_ABB_N_MODE_I_MSK 0xfffffbff
+#define CBR_RG_RX_ABB_N_MODE_SFT 10
+#define CBR_RG_RX_ABB_N_MODE_HI 10
+#define CBR_RG_RX_ABB_N_MODE_SZ 1
+#define CBR_RG_RX_EN_LOOPA_MSK 0x00000800
+#define CBR_RG_RX_EN_LOOPA_I_MSK 0xfffff7ff
+#define CBR_RG_RX_EN_LOOPA_SFT 11
+#define CBR_RG_RX_EN_LOOPA_HI 11
+#define CBR_RG_RX_EN_LOOPA_SZ 1
+#define CBR_RG_RX_FILTERI1ST_MSK 0x00003000
+#define CBR_RG_RX_FILTERI1ST_I_MSK 0xffffcfff
+#define CBR_RG_RX_FILTERI1ST_SFT 12
+#define CBR_RG_RX_FILTERI1ST_HI 13
+#define CBR_RG_RX_FILTERI1ST_SZ 2
+#define CBR_RG_RX_FILTERI2ND_MSK 0x0000c000
+#define CBR_RG_RX_FILTERI2ND_I_MSK 0xffff3fff
+#define CBR_RG_RX_FILTERI2ND_SFT 14
+#define CBR_RG_RX_FILTERI2ND_HI 15
+#define CBR_RG_RX_FILTERI2ND_SZ 2
+#define CBR_RG_RX_FILTERI3RD_MSK 0x00030000
+#define CBR_RG_RX_FILTERI3RD_I_MSK 0xfffcffff
+#define CBR_RG_RX_FILTERI3RD_SFT 16
+#define CBR_RG_RX_FILTERI3RD_HI 17
+#define CBR_RG_RX_FILTERI3RD_SZ 2
+#define CBR_RG_RX_FILTERI_COURSE_MSK 0x000c0000
+#define CBR_RG_RX_FILTERI_COURSE_I_MSK 0xfff3ffff
+#define CBR_RG_RX_FILTERI_COURSE_SFT 18
+#define CBR_RG_RX_FILTERI_COURSE_HI 19
+#define CBR_RG_RX_FILTERI_COURSE_SZ 2
+#define CBR_RG_RX_FILTERVCM_MSK 0x00300000
+#define CBR_RG_RX_FILTERVCM_I_MSK 0xffcfffff
+#define CBR_RG_RX_FILTERVCM_SFT 20
+#define CBR_RG_RX_FILTERVCM_HI 21
+#define CBR_RG_RX_FILTERVCM_SZ 2
+#define CBR_RG_RX_HPF3M_MSK 0x00400000
+#define CBR_RG_RX_HPF3M_I_MSK 0xffbfffff
+#define CBR_RG_RX_HPF3M_SFT 22
+#define CBR_RG_RX_HPF3M_HI 22
+#define CBR_RG_RX_HPF3M_SZ 1
+#define CBR_RG_RX_HPF300K_MSK 0x00800000
+#define CBR_RG_RX_HPF300K_I_MSK 0xff7fffff
+#define CBR_RG_RX_HPF300K_SFT 23
+#define CBR_RG_RX_HPF300K_HI 23
+#define CBR_RG_RX_HPF300K_SZ 1
+#define CBR_RG_RX_HPFI_MSK 0x03000000
+#define CBR_RG_RX_HPFI_I_MSK 0xfcffffff
+#define CBR_RG_RX_HPFI_SFT 24
+#define CBR_RG_RX_HPFI_HI 25
+#define CBR_RG_RX_HPFI_SZ 2
+#define CBR_RG_RX_HPF_FINALCORNER_MSK 0x0c000000
+#define CBR_RG_RX_HPF_FINALCORNER_I_MSK 0xf3ffffff
+#define CBR_RG_RX_HPF_FINALCORNER_SFT 26
+#define CBR_RG_RX_HPF_FINALCORNER_HI 27
+#define CBR_RG_RX_HPF_FINALCORNER_SZ 2
+#define CBR_RG_RX_HPF_SETTLE1_C_MSK 0x30000000
+#define CBR_RG_RX_HPF_SETTLE1_C_I_MSK 0xcfffffff
+#define CBR_RG_RX_HPF_SETTLE1_C_SFT 28
+#define CBR_RG_RX_HPF_SETTLE1_C_HI 29
+#define CBR_RG_RX_HPF_SETTLE1_C_SZ 2
+#define CBR_RG_RX_HPF_SETTLE1_R_MSK 0x00000003
+#define CBR_RG_RX_HPF_SETTLE1_R_I_MSK 0xfffffffc
+#define CBR_RG_RX_HPF_SETTLE1_R_SFT 0
+#define CBR_RG_RX_HPF_SETTLE1_R_HI 1
+#define CBR_RG_RX_HPF_SETTLE1_R_SZ 2
+#define CBR_RG_RX_HPF_SETTLE2_C_MSK 0x0000000c
+#define CBR_RG_RX_HPF_SETTLE2_C_I_MSK 0xfffffff3
+#define CBR_RG_RX_HPF_SETTLE2_C_SFT 2
+#define CBR_RG_RX_HPF_SETTLE2_C_HI 3
+#define CBR_RG_RX_HPF_SETTLE2_C_SZ 2
+#define CBR_RG_RX_HPF_SETTLE2_R_MSK 0x00000030
+#define CBR_RG_RX_HPF_SETTLE2_R_I_MSK 0xffffffcf
+#define CBR_RG_RX_HPF_SETTLE2_R_SFT 4
+#define CBR_RG_RX_HPF_SETTLE2_R_HI 5
+#define CBR_RG_RX_HPF_SETTLE2_R_SZ 2
+#define CBR_RG_RX_HPF_VCMCON2_MSK 0x000000c0
+#define CBR_RG_RX_HPF_VCMCON2_I_MSK 0xffffff3f
+#define CBR_RG_RX_HPF_VCMCON2_SFT 6
+#define CBR_RG_RX_HPF_VCMCON2_HI 7
+#define CBR_RG_RX_HPF_VCMCON2_SZ 2
+#define CBR_RG_RX_HPF_VCMCON_MSK 0x00000300
+#define CBR_RG_RX_HPF_VCMCON_I_MSK 0xfffffcff
+#define CBR_RG_RX_HPF_VCMCON_SFT 8
+#define CBR_RG_RX_HPF_VCMCON_HI 9
+#define CBR_RG_RX_HPF_VCMCON_SZ 2
+#define CBR_RG_RX_OUTVCM_MSK 0x00000c00
+#define CBR_RG_RX_OUTVCM_I_MSK 0xfffff3ff
+#define CBR_RG_RX_OUTVCM_SFT 10
+#define CBR_RG_RX_OUTVCM_HI 11
+#define CBR_RG_RX_OUTVCM_SZ 2
+#define CBR_RG_RX_TZI_MSK 0x00003000
+#define CBR_RG_RX_TZI_I_MSK 0xffffcfff
+#define CBR_RG_RX_TZI_SFT 12
+#define CBR_RG_RX_TZI_HI 13
+#define CBR_RG_RX_TZI_SZ 2
+#define CBR_RG_RX_TZ_OUT_TRISTATE_MSK 0x00004000
+#define CBR_RG_RX_TZ_OUT_TRISTATE_I_MSK 0xffffbfff
+#define CBR_RG_RX_TZ_OUT_TRISTATE_SFT 14
+#define CBR_RG_RX_TZ_OUT_TRISTATE_HI 14
+#define CBR_RG_RX_TZ_OUT_TRISTATE_SZ 1
+#define CBR_RG_RX_TZ_VCM_MSK 0x00018000
+#define CBR_RG_RX_TZ_VCM_I_MSK 0xfffe7fff
+#define CBR_RG_RX_TZ_VCM_SFT 15
+#define CBR_RG_RX_TZ_VCM_HI 16
+#define CBR_RG_RX_TZ_VCM_SZ 2
+#define CBR_RG_EN_RX_RSSI_TESTNODE_MSK 0x000e0000
+#define CBR_RG_EN_RX_RSSI_TESTNODE_I_MSK 0xfff1ffff
+#define CBR_RG_EN_RX_RSSI_TESTNODE_SFT 17
+#define CBR_RG_EN_RX_RSSI_TESTNODE_HI 19
+#define CBR_RG_EN_RX_RSSI_TESTNODE_SZ 3
+#define CBR_RG_RX_ADCRSSI_CLKSEL_MSK 0x00100000
+#define CBR_RG_RX_ADCRSSI_CLKSEL_I_MSK 0xffefffff
+#define CBR_RG_RX_ADCRSSI_CLKSEL_SFT 20
+#define CBR_RG_RX_ADCRSSI_CLKSEL_HI 20
+#define CBR_RG_RX_ADCRSSI_CLKSEL_SZ 1
+#define CBR_RG_RX_ADCRSSI_VCM_MSK 0x00600000
+#define CBR_RG_RX_ADCRSSI_VCM_I_MSK 0xff9fffff
+#define CBR_RG_RX_ADCRSSI_VCM_SFT 21
+#define CBR_RG_RX_ADCRSSI_VCM_HI 22
+#define CBR_RG_RX_ADCRSSI_VCM_SZ 2
+#define CBR_RG_RX_REC_LPFCORNER_MSK 0x01800000
+#define CBR_RG_RX_REC_LPFCORNER_I_MSK 0xfe7fffff
+#define CBR_RG_RX_REC_LPFCORNER_SFT 23
+#define CBR_RG_RX_REC_LPFCORNER_HI 24
+#define CBR_RG_RX_REC_LPFCORNER_SZ 2
+#define CBR_RG_RSSI_CLOCK_GATING_MSK 0x02000000
+#define CBR_RG_RSSI_CLOCK_GATING_I_MSK 0xfdffffff
+#define CBR_RG_RSSI_CLOCK_GATING_SFT 25
+#define CBR_RG_RSSI_CLOCK_GATING_HI 25
+#define CBR_RG_RSSI_CLOCK_GATING_SZ 1
+#define CBR_RG_TXPGA_CAPSW_MSK 0x00000003
+#define CBR_RG_TXPGA_CAPSW_I_MSK 0xfffffffc
+#define CBR_RG_TXPGA_CAPSW_SFT 0
+#define CBR_RG_TXPGA_CAPSW_HI 1
+#define CBR_RG_TXPGA_CAPSW_SZ 2
+#define CBR_RG_TXPGA_MAIN_MSK 0x000000fc
+#define CBR_RG_TXPGA_MAIN_I_MSK 0xffffff03
+#define CBR_RG_TXPGA_MAIN_SFT 2
+#define CBR_RG_TXPGA_MAIN_HI 7
+#define CBR_RG_TXPGA_MAIN_SZ 6
+#define CBR_RG_TXPGA_STEER_MSK 0x00003f00
+#define CBR_RG_TXPGA_STEER_I_MSK 0xffffc0ff
+#define CBR_RG_TXPGA_STEER_SFT 8
+#define CBR_RG_TXPGA_STEER_HI 13
+#define CBR_RG_TXPGA_STEER_SZ 6
+#define CBR_RG_TXMOD_GMCELL_MSK 0x0000c000
+#define CBR_RG_TXMOD_GMCELL_I_MSK 0xffff3fff
+#define CBR_RG_TXMOD_GMCELL_SFT 14
+#define CBR_RG_TXMOD_GMCELL_HI 15
+#define CBR_RG_TXMOD_GMCELL_SZ 2
+#define CBR_RG_TXLPF_GMCELL_MSK 0x00030000
+#define CBR_RG_TXLPF_GMCELL_I_MSK 0xfffcffff
+#define CBR_RG_TXLPF_GMCELL_SFT 16
+#define CBR_RG_TXLPF_GMCELL_HI 17
+#define CBR_RG_TXLPF_GMCELL_SZ 2
+#define CBR_RG_PACELL_EN_MSK 0x001c0000
+#define CBR_RG_PACELL_EN_I_MSK 0xffe3ffff
+#define CBR_RG_PACELL_EN_SFT 18
+#define CBR_RG_PACELL_EN_HI 20
+#define CBR_RG_PACELL_EN_SZ 3
+#define CBR_RG_PABIAS_CTRL_MSK 0x01e00000
+#define CBR_RG_PABIAS_CTRL_I_MSK 0xfe1fffff
+#define CBR_RG_PABIAS_CTRL_SFT 21
+#define CBR_RG_PABIAS_CTRL_HI 24
+#define CBR_RG_PABIAS_CTRL_SZ 4
+#define CBR_RG_PABIAS_AB_MSK 0x02000000
+#define CBR_RG_PABIAS_AB_I_MSK 0xfdffffff
+#define CBR_RG_PABIAS_AB_SFT 25
+#define CBR_RG_PABIAS_AB_HI 25
+#define CBR_RG_PABIAS_AB_SZ 1
+#define CBR_RG_TX_DIV_VSET_MSK 0x0c000000
+#define CBR_RG_TX_DIV_VSET_I_MSK 0xf3ffffff
+#define CBR_RG_TX_DIV_VSET_SFT 26
+#define CBR_RG_TX_DIV_VSET_HI 27
+#define CBR_RG_TX_DIV_VSET_SZ 2
+#define CBR_RG_TX_LOBUF_VSET_MSK 0x30000000
+#define CBR_RG_TX_LOBUF_VSET_I_MSK 0xcfffffff
+#define CBR_RG_TX_LOBUF_VSET_SFT 28
+#define CBR_RG_TX_LOBUF_VSET_HI 29
+#define CBR_RG_TX_LOBUF_VSET_SZ 2
+#define CBR_RG_RX_SQDC_MSK 0x00000007
+#define CBR_RG_RX_SQDC_I_MSK 0xfffffff8
+#define CBR_RG_RX_SQDC_SFT 0
+#define CBR_RG_RX_SQDC_HI 2
+#define CBR_RG_RX_SQDC_SZ 3
+#define CBR_RG_RX_DIV2_CORE_MSK 0x00000018
+#define CBR_RG_RX_DIV2_CORE_I_MSK 0xffffffe7
+#define CBR_RG_RX_DIV2_CORE_SFT 3
+#define CBR_RG_RX_DIV2_CORE_HI 4
+#define CBR_RG_RX_DIV2_CORE_SZ 2
+#define CBR_RG_RX_LOBUF_MSK 0x00000060
+#define CBR_RG_RX_LOBUF_I_MSK 0xffffff9f
+#define CBR_RG_RX_LOBUF_SFT 5
+#define CBR_RG_RX_LOBUF_HI 6
+#define CBR_RG_RX_LOBUF_SZ 2
+#define CBR_RG_TX_DPDGM_BIAS_MSK 0x00000780
+#define CBR_RG_TX_DPDGM_BIAS_I_MSK 0xfffff87f
+#define CBR_RG_TX_DPDGM_BIAS_SFT 7
+#define CBR_RG_TX_DPDGM_BIAS_HI 10
+#define CBR_RG_TX_DPDGM_BIAS_SZ 4
+#define CBR_RG_TX_DPD_DIV_MSK 0x00007800
+#define CBR_RG_TX_DPD_DIV_I_MSK 0xffff87ff
+#define CBR_RG_TX_DPD_DIV_SFT 11
+#define CBR_RG_TX_DPD_DIV_HI 14
+#define CBR_RG_TX_DPD_DIV_SZ 4
+#define CBR_RG_TX_TSSI_BIAS_MSK 0x00038000
+#define CBR_RG_TX_TSSI_BIAS_I_MSK 0xfffc7fff
+#define CBR_RG_TX_TSSI_BIAS_SFT 15
+#define CBR_RG_TX_TSSI_BIAS_HI 17
+#define CBR_RG_TX_TSSI_BIAS_SZ 3
+#define CBR_RG_TX_TSSI_DIV_MSK 0x001c0000
+#define CBR_RG_TX_TSSI_DIV_I_MSK 0xffe3ffff
+#define CBR_RG_TX_TSSI_DIV_SFT 18
+#define CBR_RG_TX_TSSI_DIV_HI 20
+#define CBR_RG_TX_TSSI_DIV_SZ 3
+#define CBR_RG_TX_TSSI_TESTMODE_MSK 0x00200000
+#define CBR_RG_TX_TSSI_TESTMODE_I_MSK 0xffdfffff
+#define CBR_RG_TX_TSSI_TESTMODE_SFT 21
+#define CBR_RG_TX_TSSI_TESTMODE_HI 21
+#define CBR_RG_TX_TSSI_TESTMODE_SZ 1
+#define CBR_RG_TX_TSSI_TEST_MSK 0x00c00000
+#define CBR_RG_TX_TSSI_TEST_I_MSK 0xff3fffff
+#define CBR_RG_TX_TSSI_TEST_SFT 22
+#define CBR_RG_TX_TSSI_TEST_HI 23
+#define CBR_RG_TX_TSSI_TEST_SZ 2
+#define CBR_RG_RX_HG_LNA_GC_MSK 0x00000003
+#define CBR_RG_RX_HG_LNA_GC_I_MSK 0xfffffffc
+#define CBR_RG_RX_HG_LNA_GC_SFT 0
+#define CBR_RG_RX_HG_LNA_GC_HI 1
+#define CBR_RG_RX_HG_LNA_GC_SZ 2
+#define CBR_RG_RX_HG_LNAHGN_BIAS_MSK 0x0000003c
+#define CBR_RG_RX_HG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define CBR_RG_RX_HG_LNAHGN_BIAS_SFT 2
+#define CBR_RG_RX_HG_LNAHGN_BIAS_HI 5
+#define CBR_RG_RX_HG_LNAHGN_BIAS_SZ 4
+#define CBR_RG_RX_HG_LNAHGP_BIAS_MSK 0x000003c0
+#define CBR_RG_RX_HG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define CBR_RG_RX_HG_LNAHGP_BIAS_SFT 6
+#define CBR_RG_RX_HG_LNAHGP_BIAS_HI 9
+#define CBR_RG_RX_HG_LNAHGP_BIAS_SZ 4
+#define CBR_RG_RX_HG_LNALG_BIAS_MSK 0x00003c00
+#define CBR_RG_RX_HG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define CBR_RG_RX_HG_LNALG_BIAS_SFT 10
+#define CBR_RG_RX_HG_LNALG_BIAS_HI 13
+#define CBR_RG_RX_HG_LNALG_BIAS_SZ 4
+#define CBR_RG_RX_HG_TZ_GC_MSK 0x0000c000
+#define CBR_RG_RX_HG_TZ_GC_I_MSK 0xffff3fff
+#define CBR_RG_RX_HG_TZ_GC_SFT 14
+#define CBR_RG_RX_HG_TZ_GC_HI 15
+#define CBR_RG_RX_HG_TZ_GC_SZ 2
+#define CBR_RG_RX_HG_TZ_CAP_MSK 0x00070000
+#define CBR_RG_RX_HG_TZ_CAP_I_MSK 0xfff8ffff
+#define CBR_RG_RX_HG_TZ_CAP_SFT 16
+#define CBR_RG_RX_HG_TZ_CAP_HI 18
+#define CBR_RG_RX_HG_TZ_CAP_SZ 3
+#define CBR_RG_RX_MG_LNA_GC_MSK 0x00000003
+#define CBR_RG_RX_MG_LNA_GC_I_MSK 0xfffffffc
+#define CBR_RG_RX_MG_LNA_GC_SFT 0
+#define CBR_RG_RX_MG_LNA_GC_HI 1
+#define CBR_RG_RX_MG_LNA_GC_SZ 2
+#define CBR_RG_RX_MG_LNAHGN_BIAS_MSK 0x0000003c
+#define CBR_RG_RX_MG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define CBR_RG_RX_MG_LNAHGN_BIAS_SFT 2
+#define CBR_RG_RX_MG_LNAHGN_BIAS_HI 5
+#define CBR_RG_RX_MG_LNAHGN_BIAS_SZ 4
+#define CBR_RG_RX_MG_LNAHGP_BIAS_MSK 0x000003c0
+#define CBR_RG_RX_MG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define CBR_RG_RX_MG_LNAHGP_BIAS_SFT 6
+#define CBR_RG_RX_MG_LNAHGP_BIAS_HI 9
+#define CBR_RG_RX_MG_LNAHGP_BIAS_SZ 4
+#define CBR_RG_RX_MG_LNALG_BIAS_MSK 0x00003c00
+#define CBR_RG_RX_MG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define CBR_RG_RX_MG_LNALG_BIAS_SFT 10
+#define CBR_RG_RX_MG_LNALG_BIAS_HI 13
+#define CBR_RG_RX_MG_LNALG_BIAS_SZ 4
+#define CBR_RG_RX_MG_TZ_GC_MSK 0x0000c000
+#define CBR_RG_RX_MG_TZ_GC_I_MSK 0xffff3fff
+#define CBR_RG_RX_MG_TZ_GC_SFT 14
+#define CBR_RG_RX_MG_TZ_GC_HI 15
+#define CBR_RG_RX_MG_TZ_GC_SZ 2
+#define CBR_RG_RX_MG_TZ_CAP_MSK 0x00070000
+#define CBR_RG_RX_MG_TZ_CAP_I_MSK 0xfff8ffff
+#define CBR_RG_RX_MG_TZ_CAP_SFT 16
+#define CBR_RG_RX_MG_TZ_CAP_HI 18
+#define CBR_RG_RX_MG_TZ_CAP_SZ 3
+#define CBR_RG_RX_LG_LNA_GC_MSK 0x00000003
+#define CBR_RG_RX_LG_LNA_GC_I_MSK 0xfffffffc
+#define CBR_RG_RX_LG_LNA_GC_SFT 0
+#define CBR_RG_RX_LG_LNA_GC_HI 1
+#define CBR_RG_RX_LG_LNA_GC_SZ 2
+#define CBR_RG_RX_LG_LNAHGN_BIAS_MSK 0x0000003c
+#define CBR_RG_RX_LG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define CBR_RG_RX_LG_LNAHGN_BIAS_SFT 2
+#define CBR_RG_RX_LG_LNAHGN_BIAS_HI 5
+#define CBR_RG_RX_LG_LNAHGN_BIAS_SZ 4
+#define CBR_RG_RX_LG_LNAHGP_BIAS_MSK 0x000003c0
+#define CBR_RG_RX_LG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define CBR_RG_RX_LG_LNAHGP_BIAS_SFT 6
+#define CBR_RG_RX_LG_LNAHGP_BIAS_HI 9
+#define CBR_RG_RX_LG_LNAHGP_BIAS_SZ 4
+#define CBR_RG_RX_LG_LNALG_BIAS_MSK 0x00003c00
+#define CBR_RG_RX_LG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define CBR_RG_RX_LG_LNALG_BIAS_SFT 10
+#define CBR_RG_RX_LG_LNALG_BIAS_HI 13
+#define CBR_RG_RX_LG_LNALG_BIAS_SZ 4
+#define CBR_RG_RX_LG_TZ_GC_MSK 0x0000c000
+#define CBR_RG_RX_LG_TZ_GC_I_MSK 0xffff3fff
+#define CBR_RG_RX_LG_TZ_GC_SFT 14
+#define CBR_RG_RX_LG_TZ_GC_HI 15
+#define CBR_RG_RX_LG_TZ_GC_SZ 2
+#define CBR_RG_RX_LG_TZ_CAP_MSK 0x00070000
+#define CBR_RG_RX_LG_TZ_CAP_I_MSK 0xfff8ffff
+#define CBR_RG_RX_LG_TZ_CAP_SFT 16
+#define CBR_RG_RX_LG_TZ_CAP_HI 18
+#define CBR_RG_RX_LG_TZ_CAP_SZ 3
+#define CBR_RG_RX_ULG_LNA_GC_MSK 0x00000003
+#define CBR_RG_RX_ULG_LNA_GC_I_MSK 0xfffffffc
+#define CBR_RG_RX_ULG_LNA_GC_SFT 0
+#define CBR_RG_RX_ULG_LNA_GC_HI 1
+#define CBR_RG_RX_ULG_LNA_GC_SZ 2
+#define CBR_RG_RX_ULG_LNAHGN_BIAS_MSK 0x0000003c
+#define CBR_RG_RX_ULG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define CBR_RG_RX_ULG_LNAHGN_BIAS_SFT 2
+#define CBR_RG_RX_ULG_LNAHGN_BIAS_HI 5
+#define CBR_RG_RX_ULG_LNAHGN_BIAS_SZ 4
+#define CBR_RG_RX_ULG_LNAHGP_BIAS_MSK 0x000003c0
+#define CBR_RG_RX_ULG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define CBR_RG_RX_ULG_LNAHGP_BIAS_SFT 6
+#define CBR_RG_RX_ULG_LNAHGP_BIAS_HI 9
+#define CBR_RG_RX_ULG_LNAHGP_BIAS_SZ 4
+#define CBR_RG_RX_ULG_LNALG_BIAS_MSK 0x00003c00
+#define CBR_RG_RX_ULG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define CBR_RG_RX_ULG_LNALG_BIAS_SFT 10
+#define CBR_RG_RX_ULG_LNALG_BIAS_HI 13
+#define CBR_RG_RX_ULG_LNALG_BIAS_SZ 4
+#define CBR_RG_RX_ULG_TZ_GC_MSK 0x0000c000
+#define CBR_RG_RX_ULG_TZ_GC_I_MSK 0xffff3fff
+#define CBR_RG_RX_ULG_TZ_GC_SFT 14
+#define CBR_RG_RX_ULG_TZ_GC_HI 15
+#define CBR_RG_RX_ULG_TZ_GC_SZ 2
+#define CBR_RG_RX_ULG_TZ_CAP_MSK 0x00070000
+#define CBR_RG_RX_ULG_TZ_CAP_I_MSK 0xfff8ffff
+#define CBR_RG_RX_ULG_TZ_CAP_SFT 16
+#define CBR_RG_RX_ULG_TZ_CAP_HI 18
+#define CBR_RG_RX_ULG_TZ_CAP_SZ 3
+#define CBR_RG_HPF1_FAST_SET_X_MSK 0x00000001
+#define CBR_RG_HPF1_FAST_SET_X_I_MSK 0xfffffffe
+#define CBR_RG_HPF1_FAST_SET_X_SFT 0
+#define CBR_RG_HPF1_FAST_SET_X_HI 0
+#define CBR_RG_HPF1_FAST_SET_X_SZ 1
+#define CBR_RG_HPF1_FAST_SET_Y_MSK 0x00000002
+#define CBR_RG_HPF1_FAST_SET_Y_I_MSK 0xfffffffd
+#define CBR_RG_HPF1_FAST_SET_Y_SFT 1
+#define CBR_RG_HPF1_FAST_SET_Y_HI 1
+#define CBR_RG_HPF1_FAST_SET_Y_SZ 1
+#define CBR_RG_HPF1_FAST_SET_Z_MSK 0x00000004
+#define CBR_RG_HPF1_FAST_SET_Z_I_MSK 0xfffffffb
+#define CBR_RG_HPF1_FAST_SET_Z_SFT 2
+#define CBR_RG_HPF1_FAST_SET_Z_HI 2
+#define CBR_RG_HPF1_FAST_SET_Z_SZ 1
+#define CBR_RG_HPF_T1A_MSK 0x00000018
+#define CBR_RG_HPF_T1A_I_MSK 0xffffffe7
+#define CBR_RG_HPF_T1A_SFT 3
+#define CBR_RG_HPF_T1A_HI 4
+#define CBR_RG_HPF_T1A_SZ 2
+#define CBR_RG_HPF_T1B_MSK 0x00000060
+#define CBR_RG_HPF_T1B_I_MSK 0xffffff9f
+#define CBR_RG_HPF_T1B_SFT 5
+#define CBR_RG_HPF_T1B_HI 6
+#define CBR_RG_HPF_T1B_SZ 2
+#define CBR_RG_HPF_T1C_MSK 0x00000180
+#define CBR_RG_HPF_T1C_I_MSK 0xfffffe7f
+#define CBR_RG_HPF_T1C_SFT 7
+#define CBR_RG_HPF_T1C_HI 8
+#define CBR_RG_HPF_T1C_SZ 2
+#define CBR_RG_RX_LNA_TRI_SEL_MSK 0x00000600
+#define CBR_RG_RX_LNA_TRI_SEL_I_MSK 0xfffff9ff
+#define CBR_RG_RX_LNA_TRI_SEL_SFT 9
+#define CBR_RG_RX_LNA_TRI_SEL_HI 10
+#define CBR_RG_RX_LNA_TRI_SEL_SZ 2
+#define CBR_RG_RX_LNA_SETTLE_MSK 0x00001800
+#define CBR_RG_RX_LNA_SETTLE_I_MSK 0xffffe7ff
+#define CBR_RG_RX_LNA_SETTLE_SFT 11
+#define CBR_RG_RX_LNA_SETTLE_HI 12
+#define CBR_RG_RX_LNA_SETTLE_SZ 2
+#define CBR_RG_ADC_CLKSEL_MSK 0x00000001
+#define CBR_RG_ADC_CLKSEL_I_MSK 0xfffffffe
+#define CBR_RG_ADC_CLKSEL_SFT 0
+#define CBR_RG_ADC_CLKSEL_HI 0
+#define CBR_RG_ADC_CLKSEL_SZ 1
+#define CBR_RG_ADC_DIBIAS_MSK 0x00000006
+#define CBR_RG_ADC_DIBIAS_I_MSK 0xfffffff9
+#define CBR_RG_ADC_DIBIAS_SFT 1
+#define CBR_RG_ADC_DIBIAS_HI 2
+#define CBR_RG_ADC_DIBIAS_SZ 2
+#define CBR_RG_ADC_DIVR_MSK 0x00000008
+#define CBR_RG_ADC_DIVR_I_MSK 0xfffffff7
+#define CBR_RG_ADC_DIVR_SFT 3
+#define CBR_RG_ADC_DIVR_HI 3
+#define CBR_RG_ADC_DIVR_SZ 1
+#define CBR_RG_ADC_DVCMI_MSK 0x00000030
+#define CBR_RG_ADC_DVCMI_I_MSK 0xffffffcf
+#define CBR_RG_ADC_DVCMI_SFT 4
+#define CBR_RG_ADC_DVCMI_HI 5
+#define CBR_RG_ADC_DVCMI_SZ 2
+#define CBR_RG_ADC_SAMSEL_MSK 0x000003c0
+#define CBR_RG_ADC_SAMSEL_I_MSK 0xfffffc3f
+#define CBR_RG_ADC_SAMSEL_SFT 6
+#define CBR_RG_ADC_SAMSEL_HI 9
+#define CBR_RG_ADC_SAMSEL_SZ 4
+#define CBR_RG_ADC_STNBY_MSK 0x00000400
+#define CBR_RG_ADC_STNBY_I_MSK 0xfffffbff
+#define CBR_RG_ADC_STNBY_SFT 10
+#define CBR_RG_ADC_STNBY_HI 10
+#define CBR_RG_ADC_STNBY_SZ 1
+#define CBR_RG_ADC_TESTMODE_MSK 0x00000800
+#define CBR_RG_ADC_TESTMODE_I_MSK 0xfffff7ff
+#define CBR_RG_ADC_TESTMODE_SFT 11
+#define CBR_RG_ADC_TESTMODE_HI 11
+#define CBR_RG_ADC_TESTMODE_SZ 1
+#define CBR_RG_ADC_TSEL_MSK 0x0000f000
+#define CBR_RG_ADC_TSEL_I_MSK 0xffff0fff
+#define CBR_RG_ADC_TSEL_SFT 12
+#define CBR_RG_ADC_TSEL_HI 15
+#define CBR_RG_ADC_TSEL_SZ 4
+#define CBR_RG_ADC_VRSEL_MSK 0x00030000
+#define CBR_RG_ADC_VRSEL_I_MSK 0xfffcffff
+#define CBR_RG_ADC_VRSEL_SFT 16
+#define CBR_RG_ADC_VRSEL_HI 17
+#define CBR_RG_ADC_VRSEL_SZ 2
+#define CBR_RG_DICMP_MSK 0x000c0000
+#define CBR_RG_DICMP_I_MSK 0xfff3ffff
+#define CBR_RG_DICMP_SFT 18
+#define CBR_RG_DICMP_HI 19
+#define CBR_RG_DICMP_SZ 2
+#define CBR_RG_DIOP_MSK 0x00300000
+#define CBR_RG_DIOP_I_MSK 0xffcfffff
+#define CBR_RG_DIOP_SFT 20
+#define CBR_RG_DIOP_HI 21
+#define CBR_RG_DIOP_SZ 2
+#define CBR_RG_DACI1ST_MSK 0x00000003
+#define CBR_RG_DACI1ST_I_MSK 0xfffffffc
+#define CBR_RG_DACI1ST_SFT 0
+#define CBR_RG_DACI1ST_HI 1
+#define CBR_RG_DACI1ST_SZ 2
+#define CBR_RG_TX_DACLPF_ICOURSE_MSK 0x0000000c
+#define CBR_RG_TX_DACLPF_ICOURSE_I_MSK 0xfffffff3
+#define CBR_RG_TX_DACLPF_ICOURSE_SFT 2
+#define CBR_RG_TX_DACLPF_ICOURSE_HI 3
+#define CBR_RG_TX_DACLPF_ICOURSE_SZ 2
+#define CBR_RG_TX_DACLPF_IFINE_MSK 0x00000030
+#define CBR_RG_TX_DACLPF_IFINE_I_MSK 0xffffffcf
+#define CBR_RG_TX_DACLPF_IFINE_SFT 4
+#define CBR_RG_TX_DACLPF_IFINE_HI 5
+#define CBR_RG_TX_DACLPF_IFINE_SZ 2
+#define CBR_RG_TX_DACLPF_VCM_MSK 0x000000c0
+#define CBR_RG_TX_DACLPF_VCM_I_MSK 0xffffff3f
+#define CBR_RG_TX_DACLPF_VCM_SFT 6
+#define CBR_RG_TX_DACLPF_VCM_HI 7
+#define CBR_RG_TX_DACLPF_VCM_SZ 2
+#define CBR_RG_TX_DAC_CKEDGE_SEL_MSK 0x00000100
+#define CBR_RG_TX_DAC_CKEDGE_SEL_I_MSK 0xfffffeff
+#define CBR_RG_TX_DAC_CKEDGE_SEL_SFT 8
+#define CBR_RG_TX_DAC_CKEDGE_SEL_HI 8
+#define CBR_RG_TX_DAC_CKEDGE_SEL_SZ 1
+#define CBR_RG_TX_DAC_IBIAS_MSK 0x00000600
+#define CBR_RG_TX_DAC_IBIAS_I_MSK 0xfffff9ff
+#define CBR_RG_TX_DAC_IBIAS_SFT 9
+#define CBR_RG_TX_DAC_IBIAS_HI 10
+#define CBR_RG_TX_DAC_IBIAS_SZ 2
+#define CBR_RG_TX_DAC_OS_MSK 0x00003800
+#define CBR_RG_TX_DAC_OS_I_MSK 0xffffc7ff
+#define CBR_RG_TX_DAC_OS_SFT 11
+#define CBR_RG_TX_DAC_OS_HI 13
+#define CBR_RG_TX_DAC_OS_SZ 3
+#define CBR_RG_TX_DAC_RCAL_MSK 0x0000c000
+#define CBR_RG_TX_DAC_RCAL_I_MSK 0xffff3fff
+#define CBR_RG_TX_DAC_RCAL_SFT 14
+#define CBR_RG_TX_DAC_RCAL_HI 15
+#define CBR_RG_TX_DAC_RCAL_SZ 2
+#define CBR_RG_TX_DAC_TSEL_MSK 0x000f0000
+#define CBR_RG_TX_DAC_TSEL_I_MSK 0xfff0ffff
+#define CBR_RG_TX_DAC_TSEL_SFT 16
+#define CBR_RG_TX_DAC_TSEL_HI 19
+#define CBR_RG_TX_DAC_TSEL_SZ 4
+#define CBR_RG_TX_EN_VOLTAGE_IN_MSK 0x00100000
+#define CBR_RG_TX_EN_VOLTAGE_IN_I_MSK 0xffefffff
+#define CBR_RG_TX_EN_VOLTAGE_IN_SFT 20
+#define CBR_RG_TX_EN_VOLTAGE_IN_HI 20
+#define CBR_RG_TX_EN_VOLTAGE_IN_SZ 1
+#define CBR_RG_TXLPF_BYPASS_MSK 0x00200000
+#define CBR_RG_TXLPF_BYPASS_I_MSK 0xffdfffff
+#define CBR_RG_TXLPF_BYPASS_SFT 21
+#define CBR_RG_TXLPF_BYPASS_HI 21
+#define CBR_RG_TXLPF_BYPASS_SZ 1
+#define CBR_RG_TXLPF_BOOSTI_MSK 0x00400000
+#define CBR_RG_TXLPF_BOOSTI_I_MSK 0xffbfffff
+#define CBR_RG_TXLPF_BOOSTI_SFT 22
+#define CBR_RG_TXLPF_BOOSTI_HI 22
+#define CBR_RG_TXLPF_BOOSTI_SZ 1
+#define CBR_RG_EN_SX_R3_MSK 0x00000001
+#define CBR_RG_EN_SX_R3_I_MSK 0xfffffffe
+#define CBR_RG_EN_SX_R3_SFT 0
+#define CBR_RG_EN_SX_R3_HI 0
+#define CBR_RG_EN_SX_R3_SZ 1
+#define CBR_RG_EN_SX_CH_MSK 0x00000002
+#define CBR_RG_EN_SX_CH_I_MSK 0xfffffffd
+#define CBR_RG_EN_SX_CH_SFT 1
+#define CBR_RG_EN_SX_CH_HI 1
+#define CBR_RG_EN_SX_CH_SZ 1
+#define CBR_RG_EN_SX_CHP_MSK 0x00000004
+#define CBR_RG_EN_SX_CHP_I_MSK 0xfffffffb
+#define CBR_RG_EN_SX_CHP_SFT 2
+#define CBR_RG_EN_SX_CHP_HI 2
+#define CBR_RG_EN_SX_CHP_SZ 1
+#define CBR_RG_EN_SX_DIVCK_MSK 0x00000008
+#define CBR_RG_EN_SX_DIVCK_I_MSK 0xfffffff7
+#define CBR_RG_EN_SX_DIVCK_SFT 3
+#define CBR_RG_EN_SX_DIVCK_HI 3
+#define CBR_RG_EN_SX_DIVCK_SZ 1
+#define CBR_RG_EN_SX_VCOBF_MSK 0x00000010
+#define CBR_RG_EN_SX_VCOBF_I_MSK 0xffffffef
+#define CBR_RG_EN_SX_VCOBF_SFT 4
+#define CBR_RG_EN_SX_VCOBF_HI 4
+#define CBR_RG_EN_SX_VCOBF_SZ 1
+#define CBR_RG_EN_SX_VCO_MSK 0x00000020
+#define CBR_RG_EN_SX_VCO_I_MSK 0xffffffdf
+#define CBR_RG_EN_SX_VCO_SFT 5
+#define CBR_RG_EN_SX_VCO_HI 5
+#define CBR_RG_EN_SX_VCO_SZ 1
+#define CBR_RG_EN_SX_MOD_MSK 0x00000040
+#define CBR_RG_EN_SX_MOD_I_MSK 0xffffffbf
+#define CBR_RG_EN_SX_MOD_SFT 6
+#define CBR_RG_EN_SX_MOD_HI 6
+#define CBR_RG_EN_SX_MOD_SZ 1
+#define CBR_RG_EN_SX_LCK_MSK 0x00000080
+#define CBR_RG_EN_SX_LCK_I_MSK 0xffffff7f
+#define CBR_RG_EN_SX_LCK_SFT 7
+#define CBR_RG_EN_SX_LCK_HI 7
+#define CBR_RG_EN_SX_LCK_SZ 1
+#define CBR_RG_EN_SX_DITHER_MSK 0x00000100
+#define CBR_RG_EN_SX_DITHER_I_MSK 0xfffffeff
+#define CBR_RG_EN_SX_DITHER_SFT 8
+#define CBR_RG_EN_SX_DITHER_HI 8
+#define CBR_RG_EN_SX_DITHER_SZ 1
+#define CBR_RG_EN_SX_DELCAL_MSK 0x00000200
+#define CBR_RG_EN_SX_DELCAL_I_MSK 0xfffffdff
+#define CBR_RG_EN_SX_DELCAL_SFT 9
+#define CBR_RG_EN_SX_DELCAL_HI 9
+#define CBR_RG_EN_SX_DELCAL_SZ 1
+#define CBR_RG_EN_SX_PC_BYPASS_MSK 0x00000400
+#define CBR_RG_EN_SX_PC_BYPASS_I_MSK 0xfffffbff
+#define CBR_RG_EN_SX_PC_BYPASS_SFT 10
+#define CBR_RG_EN_SX_PC_BYPASS_HI 10
+#define CBR_RG_EN_SX_PC_BYPASS_SZ 1
+#define CBR_RG_EN_SX_VT_MON_MSK 0x00000800
+#define CBR_RG_EN_SX_VT_MON_I_MSK 0xfffff7ff
+#define CBR_RG_EN_SX_VT_MON_SFT 11
+#define CBR_RG_EN_SX_VT_MON_HI 11
+#define CBR_RG_EN_SX_VT_MON_SZ 1
+#define CBR_RG_EN_SX_VT_MON_DG_MSK 0x00001000
+#define CBR_RG_EN_SX_VT_MON_DG_I_MSK 0xffffefff
+#define CBR_RG_EN_SX_VT_MON_DG_SFT 12
+#define CBR_RG_EN_SX_VT_MON_DG_HI 12
+#define CBR_RG_EN_SX_VT_MON_DG_SZ 1
+#define CBR_RG_EN_SX_DIV_MSK 0x00002000
+#define CBR_RG_EN_SX_DIV_I_MSK 0xffffdfff
+#define CBR_RG_EN_SX_DIV_SFT 13
+#define CBR_RG_EN_SX_DIV_HI 13
+#define CBR_RG_EN_SX_DIV_SZ 1
+#define CBR_RG_EN_SX_LPF_MSK 0x00004000
+#define CBR_RG_EN_SX_LPF_I_MSK 0xffffbfff
+#define CBR_RG_EN_SX_LPF_SFT 14
+#define CBR_RG_EN_SX_LPF_HI 14
+#define CBR_RG_EN_SX_LPF_SZ 1
+#define CBR_RG_SX_RFCTRL_F_MSK 0x00ffffff
+#define CBR_RG_SX_RFCTRL_F_I_MSK 0xff000000
+#define CBR_RG_SX_RFCTRL_F_SFT 0
+#define CBR_RG_SX_RFCTRL_F_HI 23
+#define CBR_RG_SX_RFCTRL_F_SZ 24
+#define CBR_RG_SX_SEL_CP_MSK 0x0f000000
+#define CBR_RG_SX_SEL_CP_I_MSK 0xf0ffffff
+#define CBR_RG_SX_SEL_CP_SFT 24
+#define CBR_RG_SX_SEL_CP_HI 27
+#define CBR_RG_SX_SEL_CP_SZ 4
+#define CBR_RG_SX_SEL_CS_MSK 0xf0000000
+#define CBR_RG_SX_SEL_CS_I_MSK 0x0fffffff
+#define CBR_RG_SX_SEL_CS_SFT 28
+#define CBR_RG_SX_SEL_CS_HI 31
+#define CBR_RG_SX_SEL_CS_SZ 4
+#define CBR_RG_SX_RFCTRL_CH_MSK 0x000007ff
+#define CBR_RG_SX_RFCTRL_CH_I_MSK 0xfffff800
+#define CBR_RG_SX_RFCTRL_CH_SFT 0
+#define CBR_RG_SX_RFCTRL_CH_HI 10
+#define CBR_RG_SX_RFCTRL_CH_SZ 11
+#define CBR_RG_SX_SEL_C3_MSK 0x00007800
+#define CBR_RG_SX_SEL_C3_I_MSK 0xffff87ff
+#define CBR_RG_SX_SEL_C3_SFT 11
+#define CBR_RG_SX_SEL_C3_HI 14
+#define CBR_RG_SX_SEL_C3_SZ 4
+#define CBR_RG_SX_SEL_RS_MSK 0x000f8000
+#define CBR_RG_SX_SEL_RS_I_MSK 0xfff07fff
+#define CBR_RG_SX_SEL_RS_SFT 15
+#define CBR_RG_SX_SEL_RS_HI 19
+#define CBR_RG_SX_SEL_RS_SZ 5
+#define CBR_RG_SX_SEL_R3_MSK 0x01f00000
+#define CBR_RG_SX_SEL_R3_I_MSK 0xfe0fffff
+#define CBR_RG_SX_SEL_R3_SFT 20
+#define CBR_RG_SX_SEL_R3_HI 24
+#define CBR_RG_SX_SEL_R3_SZ 5
+#define CBR_RG_SX_SEL_ICHP_MSK 0x0000001f
+#define CBR_RG_SX_SEL_ICHP_I_MSK 0xffffffe0
+#define CBR_RG_SX_SEL_ICHP_SFT 0
+#define CBR_RG_SX_SEL_ICHP_HI 4
+#define CBR_RG_SX_SEL_ICHP_SZ 5
+#define CBR_RG_SX_SEL_PCHP_MSK 0x000003e0
+#define CBR_RG_SX_SEL_PCHP_I_MSK 0xfffffc1f
+#define CBR_RG_SX_SEL_PCHP_SFT 5
+#define CBR_RG_SX_SEL_PCHP_HI 9
+#define CBR_RG_SX_SEL_PCHP_SZ 5
+#define CBR_RG_SX_SEL_CHP_REGOP_MSK 0x00003c00
+#define CBR_RG_SX_SEL_CHP_REGOP_I_MSK 0xffffc3ff
+#define CBR_RG_SX_SEL_CHP_REGOP_SFT 10
+#define CBR_RG_SX_SEL_CHP_REGOP_HI 13
+#define CBR_RG_SX_SEL_CHP_REGOP_SZ 4
+#define CBR_RG_SX_SEL_CHP_UNIOP_MSK 0x0003c000
+#define CBR_RG_SX_SEL_CHP_UNIOP_I_MSK 0xfffc3fff
+#define CBR_RG_SX_SEL_CHP_UNIOP_SFT 14
+#define CBR_RG_SX_SEL_CHP_UNIOP_HI 17
+#define CBR_RG_SX_SEL_CHP_UNIOP_SZ 4
+#define CBR_RG_SX_CHP_IOST_POL_MSK 0x00040000
+#define CBR_RG_SX_CHP_IOST_POL_I_MSK 0xfffbffff
+#define CBR_RG_SX_CHP_IOST_POL_SFT 18
+#define CBR_RG_SX_CHP_IOST_POL_HI 18
+#define CBR_RG_SX_CHP_IOST_POL_SZ 1
+#define CBR_RG_SX_CHP_IOST_MSK 0x00380000
+#define CBR_RG_SX_CHP_IOST_I_MSK 0xffc7ffff
+#define CBR_RG_SX_CHP_IOST_SFT 19
+#define CBR_RG_SX_CHP_IOST_HI 21
+#define CBR_RG_SX_CHP_IOST_SZ 3
+#define CBR_RG_SX_PFDSEL_MSK 0x00400000
+#define CBR_RG_SX_PFDSEL_I_MSK 0xffbfffff
+#define CBR_RG_SX_PFDSEL_SFT 22
+#define CBR_RG_SX_PFDSEL_HI 22
+#define CBR_RG_SX_PFDSEL_SZ 1
+#define CBR_RG_SX_PFD_SET_MSK 0x00800000
+#define CBR_RG_SX_PFD_SET_I_MSK 0xff7fffff
+#define CBR_RG_SX_PFD_SET_SFT 23
+#define CBR_RG_SX_PFD_SET_HI 23
+#define CBR_RG_SX_PFD_SET_SZ 1
+#define CBR_RG_SX_PFD_SET1_MSK 0x01000000
+#define CBR_RG_SX_PFD_SET1_I_MSK 0xfeffffff
+#define CBR_RG_SX_PFD_SET1_SFT 24
+#define CBR_RG_SX_PFD_SET1_HI 24
+#define CBR_RG_SX_PFD_SET1_SZ 1
+#define CBR_RG_SX_PFD_SET2_MSK 0x02000000
+#define CBR_RG_SX_PFD_SET2_I_MSK 0xfdffffff
+#define CBR_RG_SX_PFD_SET2_SFT 25
+#define CBR_RG_SX_PFD_SET2_HI 25
+#define CBR_RG_SX_PFD_SET2_SZ 1
+#define CBR_RG_SX_VBNCAS_SEL_MSK 0x04000000
+#define CBR_RG_SX_VBNCAS_SEL_I_MSK 0xfbffffff
+#define CBR_RG_SX_VBNCAS_SEL_SFT 26
+#define CBR_RG_SX_VBNCAS_SEL_HI 26
+#define CBR_RG_SX_VBNCAS_SEL_SZ 1
+#define CBR_RG_SX_PFD_RST_H_MSK 0x08000000
+#define CBR_RG_SX_PFD_RST_H_I_MSK 0xf7ffffff
+#define CBR_RG_SX_PFD_RST_H_SFT 27
+#define CBR_RG_SX_PFD_RST_H_HI 27
+#define CBR_RG_SX_PFD_RST_H_SZ 1
+#define CBR_RG_SX_PFD_TRUP_MSK 0x10000000
+#define CBR_RG_SX_PFD_TRUP_I_MSK 0xefffffff
+#define CBR_RG_SX_PFD_TRUP_SFT 28
+#define CBR_RG_SX_PFD_TRUP_HI 28
+#define CBR_RG_SX_PFD_TRUP_SZ 1
+#define CBR_RG_SX_PFD_TRDN_MSK 0x20000000
+#define CBR_RG_SX_PFD_TRDN_I_MSK 0xdfffffff
+#define CBR_RG_SX_PFD_TRDN_SFT 29
+#define CBR_RG_SX_PFD_TRDN_HI 29
+#define CBR_RG_SX_PFD_TRDN_SZ 1
+#define CBR_RG_SX_PFD_TRSEL_MSK 0x40000000
+#define CBR_RG_SX_PFD_TRSEL_I_MSK 0xbfffffff
+#define CBR_RG_SX_PFD_TRSEL_SFT 30
+#define CBR_RG_SX_PFD_TRSEL_HI 30
+#define CBR_RG_SX_PFD_TRSEL_SZ 1
+#define CBR_RG_SX_VCOBA_R_MSK 0x00000007
+#define CBR_RG_SX_VCOBA_R_I_MSK 0xfffffff8
+#define CBR_RG_SX_VCOBA_R_SFT 0
+#define CBR_RG_SX_VCOBA_R_HI 2
+#define CBR_RG_SX_VCOBA_R_SZ 3
+#define CBR_RG_SX_VCORSEL_MSK 0x000000f8
+#define CBR_RG_SX_VCORSEL_I_MSK 0xffffff07
+#define CBR_RG_SX_VCORSEL_SFT 3
+#define CBR_RG_SX_VCORSEL_HI 7
+#define CBR_RG_SX_VCORSEL_SZ 5
+#define CBR_RG_SX_VCOCUSEL_MSK 0x00000f00
+#define CBR_RG_SX_VCOCUSEL_I_MSK 0xfffff0ff
+#define CBR_RG_SX_VCOCUSEL_SFT 8
+#define CBR_RG_SX_VCOCUSEL_HI 11
+#define CBR_RG_SX_VCOCUSEL_SZ 4
+#define CBR_RG_SX_RXBFSEL_MSK 0x0000f000
+#define CBR_RG_SX_RXBFSEL_I_MSK 0xffff0fff
+#define CBR_RG_SX_RXBFSEL_SFT 12
+#define CBR_RG_SX_RXBFSEL_HI 15
+#define CBR_RG_SX_RXBFSEL_SZ 4
+#define CBR_RG_SX_TXBFSEL_MSK 0x000f0000
+#define CBR_RG_SX_TXBFSEL_I_MSK 0xfff0ffff
+#define CBR_RG_SX_TXBFSEL_SFT 16
+#define CBR_RG_SX_TXBFSEL_HI 19
+#define CBR_RG_SX_TXBFSEL_SZ 4
+#define CBR_RG_SX_VCOBFSEL_MSK 0x00f00000
+#define CBR_RG_SX_VCOBFSEL_I_MSK 0xff0fffff
+#define CBR_RG_SX_VCOBFSEL_SFT 20
+#define CBR_RG_SX_VCOBFSEL_HI 23
+#define CBR_RG_SX_VCOBFSEL_SZ 4
+#define CBR_RG_SX_DIVBFSEL_MSK 0x0f000000
+#define CBR_RG_SX_DIVBFSEL_I_MSK 0xf0ffffff
+#define CBR_RG_SX_DIVBFSEL_SFT 24
+#define CBR_RG_SX_DIVBFSEL_HI 27
+#define CBR_RG_SX_DIVBFSEL_SZ 4
+#define CBR_RG_SX_GNDR_SEL_MSK 0xf0000000
+#define CBR_RG_SX_GNDR_SEL_I_MSK 0x0fffffff
+#define CBR_RG_SX_GNDR_SEL_SFT 28
+#define CBR_RG_SX_GNDR_SEL_HI 31
+#define CBR_RG_SX_GNDR_SEL_SZ 4
+#define CBR_RG_SX_DITHER_WEIGHT_MSK 0x00000003
+#define CBR_RG_SX_DITHER_WEIGHT_I_MSK 0xfffffffc
+#define CBR_RG_SX_DITHER_WEIGHT_SFT 0
+#define CBR_RG_SX_DITHER_WEIGHT_HI 1
+#define CBR_RG_SX_DITHER_WEIGHT_SZ 2
+#define CBR_RG_SX_MOD_ERRCMP_MSK 0x0000000c
+#define CBR_RG_SX_MOD_ERRCMP_I_MSK 0xfffffff3
+#define CBR_RG_SX_MOD_ERRCMP_SFT 2
+#define CBR_RG_SX_MOD_ERRCMP_HI 3
+#define CBR_RG_SX_MOD_ERRCMP_SZ 2
+#define CBR_RG_SX_MOD_ORDER_MSK 0x00000030
+#define CBR_RG_SX_MOD_ORDER_I_MSK 0xffffffcf
+#define CBR_RG_SX_MOD_ORDER_SFT 4
+#define CBR_RG_SX_MOD_ORDER_HI 5
+#define CBR_RG_SX_MOD_ORDER_SZ 2
+#define CBR_RG_SX_SDM_D1_MSK 0x00000040
+#define CBR_RG_SX_SDM_D1_I_MSK 0xffffffbf
+#define CBR_RG_SX_SDM_D1_SFT 6
+#define CBR_RG_SX_SDM_D1_HI 6
+#define CBR_RG_SX_SDM_D1_SZ 1
+#define CBR_RG_SX_SDM_D2_MSK 0x00000080
+#define CBR_RG_SX_SDM_D2_I_MSK 0xffffff7f
+#define CBR_RG_SX_SDM_D2_SFT 7
+#define CBR_RG_SX_SDM_D2_HI 7
+#define CBR_RG_SX_SDM_D2_SZ 1
+#define CBR_RG_SDM_PASS_MSK 0x00000100
+#define CBR_RG_SDM_PASS_I_MSK 0xfffffeff
+#define CBR_RG_SDM_PASS_SFT 8
+#define CBR_RG_SDM_PASS_HI 8
+#define CBR_RG_SDM_PASS_SZ 1
+#define CBR_RG_SX_RST_H_DIV_MSK 0x00000200
+#define CBR_RG_SX_RST_H_DIV_I_MSK 0xfffffdff
+#define CBR_RG_SX_RST_H_DIV_SFT 9
+#define CBR_RG_SX_RST_H_DIV_HI 9
+#define CBR_RG_SX_RST_H_DIV_SZ 1
+#define CBR_RG_SX_SDM_EDGE_MSK 0x00000400
+#define CBR_RG_SX_SDM_EDGE_I_MSK 0xfffffbff
+#define CBR_RG_SX_SDM_EDGE_SFT 10
+#define CBR_RG_SX_SDM_EDGE_HI 10
+#define CBR_RG_SX_SDM_EDGE_SZ 1
+#define CBR_RG_SX_XO_GM_MSK 0x00001800
+#define CBR_RG_SX_XO_GM_I_MSK 0xffffe7ff
+#define CBR_RG_SX_XO_GM_SFT 11
+#define CBR_RG_SX_XO_GM_HI 12
+#define CBR_RG_SX_XO_GM_SZ 2
+#define CBR_RG_SX_REFBYTWO_MSK 0x00002000
+#define CBR_RG_SX_REFBYTWO_I_MSK 0xffffdfff
+#define CBR_RG_SX_REFBYTWO_SFT 13
+#define CBR_RG_SX_REFBYTWO_HI 13
+#define CBR_RG_SX_REFBYTWO_SZ 1
+#define CBR_RG_SX_XO_SWCAP_MSK 0x0003c000
+#define CBR_RG_SX_XO_SWCAP_I_MSK 0xfffc3fff
+#define CBR_RG_SX_XO_SWCAP_SFT 14
+#define CBR_RG_SX_XO_SWCAP_HI 17
+#define CBR_RG_SX_XO_SWCAP_SZ 4
+#define CBR_RG_SX_SDMLUT_INV_MSK 0x00040000
+#define CBR_RG_SX_SDMLUT_INV_I_MSK 0xfffbffff
+#define CBR_RG_SX_SDMLUT_INV_SFT 18
+#define CBR_RG_SX_SDMLUT_INV_HI 18
+#define CBR_RG_SX_SDMLUT_INV_SZ 1
+#define CBR_RG_SX_LCKEN_MSK 0x00080000
+#define CBR_RG_SX_LCKEN_I_MSK 0xfff7ffff
+#define CBR_RG_SX_LCKEN_SFT 19
+#define CBR_RG_SX_LCKEN_HI 19
+#define CBR_RG_SX_LCKEN_SZ 1
+#define CBR_RG_SX_PREVDD_MSK 0x00f00000
+#define CBR_RG_SX_PREVDD_I_MSK 0xff0fffff
+#define CBR_RG_SX_PREVDD_SFT 20
+#define CBR_RG_SX_PREVDD_HI 23
+#define CBR_RG_SX_PREVDD_SZ 4
+#define CBR_RG_SX_PSCONTERVDD_MSK 0x0f000000
+#define CBR_RG_SX_PSCONTERVDD_I_MSK 0xf0ffffff
+#define CBR_RG_SX_PSCONTERVDD_SFT 24
+#define CBR_RG_SX_PSCONTERVDD_HI 27
+#define CBR_RG_SX_PSCONTERVDD_SZ 4
+#define CBR_RG_SX_MOD_ERR_DELAY_MSK 0x30000000
+#define CBR_RG_SX_MOD_ERR_DELAY_I_MSK 0xcfffffff
+#define CBR_RG_SX_MOD_ERR_DELAY_SFT 28
+#define CBR_RG_SX_MOD_ERR_DELAY_HI 29
+#define CBR_RG_SX_MOD_ERR_DELAY_SZ 2
+#define CBR_RG_SX_MODDB_MSK 0x40000000
+#define CBR_RG_SX_MODDB_I_MSK 0xbfffffff
+#define CBR_RG_SX_MODDB_SFT 30
+#define CBR_RG_SX_MODDB_HI 30
+#define CBR_RG_SX_MODDB_SZ 1
+#define CBR_RG_SX_CV_CURVE_SEL_MSK 0x00000003
+#define CBR_RG_SX_CV_CURVE_SEL_I_MSK 0xfffffffc
+#define CBR_RG_SX_CV_CURVE_SEL_SFT 0
+#define CBR_RG_SX_CV_CURVE_SEL_HI 1
+#define CBR_RG_SX_CV_CURVE_SEL_SZ 2
+#define CBR_RG_SX_SEL_DELAY_MSK 0x0000007c
+#define CBR_RG_SX_SEL_DELAY_I_MSK 0xffffff83
+#define CBR_RG_SX_SEL_DELAY_SFT 2
+#define CBR_RG_SX_SEL_DELAY_HI 6
+#define CBR_RG_SX_SEL_DELAY_SZ 5
+#define CBR_RG_SX_REF_CYCLE_MSK 0x00000780
+#define CBR_RG_SX_REF_CYCLE_I_MSK 0xfffff87f
+#define CBR_RG_SX_REF_CYCLE_SFT 7
+#define CBR_RG_SX_REF_CYCLE_HI 10
+#define CBR_RG_SX_REF_CYCLE_SZ 4
+#define CBR_RG_SX_VCOBY16_MSK 0x00000800
+#define CBR_RG_SX_VCOBY16_I_MSK 0xfffff7ff
+#define CBR_RG_SX_VCOBY16_SFT 11
+#define CBR_RG_SX_VCOBY16_HI 11
+#define CBR_RG_SX_VCOBY16_SZ 1
+#define CBR_RG_SX_VCOBY32_MSK 0x00001000
+#define CBR_RG_SX_VCOBY32_I_MSK 0xffffefff
+#define CBR_RG_SX_VCOBY32_SFT 12
+#define CBR_RG_SX_VCOBY32_HI 12
+#define CBR_RG_SX_VCOBY32_SZ 1
+#define CBR_RG_SX_PH_MSK 0x00002000
+#define CBR_RG_SX_PH_I_MSK 0xffffdfff
+#define CBR_RG_SX_PH_SFT 13
+#define CBR_RG_SX_PH_HI 13
+#define CBR_RG_SX_PH_SZ 1
+#define CBR_RG_SX_PL_MSK 0x00004000
+#define CBR_RG_SX_PL_I_MSK 0xffffbfff
+#define CBR_RG_SX_PL_SFT 14
+#define CBR_RG_SX_PL_HI 14
+#define CBR_RG_SX_PL_SZ 1
+#define CBR_RG_SX_VT_MON_MODE_MSK 0x00000001
+#define CBR_RG_SX_VT_MON_MODE_I_MSK 0xfffffffe
+#define CBR_RG_SX_VT_MON_MODE_SFT 0
+#define CBR_RG_SX_VT_MON_MODE_HI 0
+#define CBR_RG_SX_VT_MON_MODE_SZ 1
+#define CBR_RG_SX_VT_TH_HI_MSK 0x00000006
+#define CBR_RG_SX_VT_TH_HI_I_MSK 0xfffffff9
+#define CBR_RG_SX_VT_TH_HI_SFT 1
+#define CBR_RG_SX_VT_TH_HI_HI 2
+#define CBR_RG_SX_VT_TH_HI_SZ 2
+#define CBR_RG_SX_VT_TH_LO_MSK 0x00000018
+#define CBR_RG_SX_VT_TH_LO_I_MSK 0xffffffe7
+#define CBR_RG_SX_VT_TH_LO_SFT 3
+#define CBR_RG_SX_VT_TH_LO_HI 4
+#define CBR_RG_SX_VT_TH_LO_SZ 2
+#define CBR_RG_SX_VT_SET_MSK 0x00000020
+#define CBR_RG_SX_VT_SET_I_MSK 0xffffffdf
+#define CBR_RG_SX_VT_SET_SFT 5
+#define CBR_RG_SX_VT_SET_HI 5
+#define CBR_RG_SX_VT_SET_SZ 1
+#define CBR_RG_SX_VT_MON_TMR_MSK 0x00007fc0
+#define CBR_RG_SX_VT_MON_TMR_I_MSK 0xffff803f
+#define CBR_RG_SX_VT_MON_TMR_SFT 6
+#define CBR_RG_SX_VT_MON_TMR_HI 14
+#define CBR_RG_SX_VT_MON_TMR_SZ 9
+#define CBR_RG_IDEAL_CYCLE_MSK 0x0fff8000
+#define CBR_RG_IDEAL_CYCLE_I_MSK 0xf0007fff
+#define CBR_RG_IDEAL_CYCLE_SFT 15
+#define CBR_RG_IDEAL_CYCLE_HI 27
+#define CBR_RG_IDEAL_CYCLE_SZ 13
+#define CBR_RG_EN_DP_VT_MON_MSK 0x00000001
+#define CBR_RG_EN_DP_VT_MON_I_MSK 0xfffffffe
+#define CBR_RG_EN_DP_VT_MON_SFT 0
+#define CBR_RG_EN_DP_VT_MON_HI 0
+#define CBR_RG_EN_DP_VT_MON_SZ 1
+#define CBR_RG_DP_VT_TH_HI_MSK 0x00000006
+#define CBR_RG_DP_VT_TH_HI_I_MSK 0xfffffff9
+#define CBR_RG_DP_VT_TH_HI_SFT 1
+#define CBR_RG_DP_VT_TH_HI_HI 2
+#define CBR_RG_DP_VT_TH_HI_SZ 2
+#define CBR_RG_DP_VT_TH_LO_MSK 0x00000018
+#define CBR_RG_DP_VT_TH_LO_I_MSK 0xffffffe7
+#define CBR_RG_DP_VT_TH_LO_SFT 3
+#define CBR_RG_DP_VT_TH_LO_HI 4
+#define CBR_RG_DP_VT_TH_LO_SZ 2
+#define CBR_RG_DP_VT_MON_TMR_MSK 0x00003fe0
+#define CBR_RG_DP_VT_MON_TMR_I_MSK 0xffffc01f
+#define CBR_RG_DP_VT_MON_TMR_SFT 5
+#define CBR_RG_DP_VT_MON_TMR_HI 13
+#define CBR_RG_DP_VT_MON_TMR_SZ 9
+#define CBR_RG_DP_CK320BY2_MSK 0x00004000
+#define CBR_RG_DP_CK320BY2_I_MSK 0xffffbfff
+#define CBR_RG_DP_CK320BY2_SFT 14
+#define CBR_RG_DP_CK320BY2_HI 14
+#define CBR_RG_DP_CK320BY2_SZ 1
+#define CBR_RG_SX_DELCTRL_MSK 0x001f8000
+#define CBR_RG_SX_DELCTRL_I_MSK 0xffe07fff
+#define CBR_RG_SX_DELCTRL_SFT 15
+#define CBR_RG_SX_DELCTRL_HI 20
+#define CBR_RG_SX_DELCTRL_SZ 6
+#define CBR_RG_DP_OD_TEST_MSK 0x00200000
+#define CBR_RG_DP_OD_TEST_I_MSK 0xffdfffff
+#define CBR_RG_DP_OD_TEST_SFT 21
+#define CBR_RG_DP_OD_TEST_HI 21
+#define CBR_RG_DP_OD_TEST_SZ 1
+#define CBR_RG_DP_BBPLL_BP_MSK 0x00000001
+#define CBR_RG_DP_BBPLL_BP_I_MSK 0xfffffffe
+#define CBR_RG_DP_BBPLL_BP_SFT 0
+#define CBR_RG_DP_BBPLL_BP_HI 0
+#define CBR_RG_DP_BBPLL_BP_SZ 1
+#define CBR_RG_DP_BBPLL_ICP_MSK 0x00000006
+#define CBR_RG_DP_BBPLL_ICP_I_MSK 0xfffffff9
+#define CBR_RG_DP_BBPLL_ICP_SFT 1
+#define CBR_RG_DP_BBPLL_ICP_HI 2
+#define CBR_RG_DP_BBPLL_ICP_SZ 2
+#define CBR_RG_DP_BBPLL_IDUAL_MSK 0x00000018
+#define CBR_RG_DP_BBPLL_IDUAL_I_MSK 0xffffffe7
+#define CBR_RG_DP_BBPLL_IDUAL_SFT 3
+#define CBR_RG_DP_BBPLL_IDUAL_HI 4
+#define CBR_RG_DP_BBPLL_IDUAL_SZ 2
+#define CBR_RG_DP_BBPLL_OD_TEST_MSK 0x000001e0
+#define CBR_RG_DP_BBPLL_OD_TEST_I_MSK 0xfffffe1f
+#define CBR_RG_DP_BBPLL_OD_TEST_SFT 5
+#define CBR_RG_DP_BBPLL_OD_TEST_HI 8
+#define CBR_RG_DP_BBPLL_OD_TEST_SZ 4
+#define CBR_RG_DP_BBPLL_PD_MSK 0x00000200
+#define CBR_RG_DP_BBPLL_PD_I_MSK 0xfffffdff
+#define CBR_RG_DP_BBPLL_PD_SFT 9
+#define CBR_RG_DP_BBPLL_PD_HI 9
+#define CBR_RG_DP_BBPLL_PD_SZ 1
+#define CBR_RG_DP_BBPLL_TESTSEL_MSK 0x00001c00
+#define CBR_RG_DP_BBPLL_TESTSEL_I_MSK 0xffffe3ff
+#define CBR_RG_DP_BBPLL_TESTSEL_SFT 10
+#define CBR_RG_DP_BBPLL_TESTSEL_HI 12
+#define CBR_RG_DP_BBPLL_TESTSEL_SZ 3
+#define CBR_RG_DP_BBPLL_PFD_DLY_MSK 0x00006000
+#define CBR_RG_DP_BBPLL_PFD_DLY_I_MSK 0xffff9fff
+#define CBR_RG_DP_BBPLL_PFD_DLY_SFT 13
+#define CBR_RG_DP_BBPLL_PFD_DLY_HI 14
+#define CBR_RG_DP_BBPLL_PFD_DLY_SZ 2
+#define CBR_RG_DP_RP_MSK 0x00038000
+#define CBR_RG_DP_RP_I_MSK 0xfffc7fff
+#define CBR_RG_DP_RP_SFT 15
+#define CBR_RG_DP_RP_HI 17
+#define CBR_RG_DP_RP_SZ 3
+#define CBR_RG_DP_RHP_MSK 0x000c0000
+#define CBR_RG_DP_RHP_I_MSK 0xfff3ffff
+#define CBR_RG_DP_RHP_SFT 18
+#define CBR_RG_DP_RHP_HI 19
+#define CBR_RG_DP_RHP_SZ 2
+#define CBR_RG_DP_DR3_MSK 0x00700000
+#define CBR_RG_DP_DR3_I_MSK 0xff8fffff
+#define CBR_RG_DP_DR3_SFT 20
+#define CBR_RG_DP_DR3_HI 22
+#define CBR_RG_DP_DR3_SZ 3
+#define CBR_RG_DP_DCP_MSK 0x07800000
+#define CBR_RG_DP_DCP_I_MSK 0xf87fffff
+#define CBR_RG_DP_DCP_SFT 23
+#define CBR_RG_DP_DCP_HI 26
+#define CBR_RG_DP_DCP_SZ 4
+#define CBR_RG_DP_DCS_MSK 0x78000000
+#define CBR_RG_DP_DCS_I_MSK 0x87ffffff
+#define CBR_RG_DP_DCS_SFT 27
+#define CBR_RG_DP_DCS_HI 30
+#define CBR_RG_DP_DCS_SZ 4
+#define CBR_RG_DP_FBDIV_MSK 0x00000fff
+#define CBR_RG_DP_FBDIV_I_MSK 0xfffff000
+#define CBR_RG_DP_FBDIV_SFT 0
+#define CBR_RG_DP_FBDIV_HI 11
+#define CBR_RG_DP_FBDIV_SZ 12
+#define CBR_RG_DP_FODIV_MSK 0x003ff000
+#define CBR_RG_DP_FODIV_I_MSK 0xffc00fff
+#define CBR_RG_DP_FODIV_SFT 12
+#define CBR_RG_DP_FODIV_HI 21
+#define CBR_RG_DP_FODIV_SZ 10
+#define CBR_RG_DP_REFDIV_MSK 0xffc00000
+#define CBR_RG_DP_REFDIV_I_MSK 0x003fffff
+#define CBR_RG_DP_REFDIV_SFT 22
+#define CBR_RG_DP_REFDIV_HI 31
+#define CBR_RG_DP_REFDIV_SZ 10
+#define CBR_RG_IDACAI_PGAG15_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG15_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG15_SFT 0
+#define CBR_RG_IDACAI_PGAG15_HI 5
+#define CBR_RG_IDACAI_PGAG15_SZ 6
+#define CBR_RG_IDACAQ_PGAG15_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG15_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG15_SFT 6
+#define CBR_RG_IDACAQ_PGAG15_HI 11
+#define CBR_RG_IDACAQ_PGAG15_SZ 6
+#define CBR_RG_IDACAI_PGAG14_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG14_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG14_SFT 12
+#define CBR_RG_IDACAI_PGAG14_HI 17
+#define CBR_RG_IDACAI_PGAG14_SZ 6
+#define CBR_RG_IDACAQ_PGAG14_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG14_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG14_SFT 18
+#define CBR_RG_IDACAQ_PGAG14_HI 23
+#define CBR_RG_IDACAQ_PGAG14_SZ 6
+#define CBR_RG_IDACAI_PGAG13_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG13_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG13_SFT 0
+#define CBR_RG_IDACAI_PGAG13_HI 5
+#define CBR_RG_IDACAI_PGAG13_SZ 6
+#define CBR_RG_IDACAQ_PGAG13_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG13_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG13_SFT 6
+#define CBR_RG_IDACAQ_PGAG13_HI 11
+#define CBR_RG_IDACAQ_PGAG13_SZ 6
+#define CBR_RG_IDACAI_PGAG12_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG12_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG12_SFT 12
+#define CBR_RG_IDACAI_PGAG12_HI 17
+#define CBR_RG_IDACAI_PGAG12_SZ 6
+#define CBR_RG_IDACAQ_PGAG12_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG12_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG12_SFT 18
+#define CBR_RG_IDACAQ_PGAG12_HI 23
+#define CBR_RG_IDACAQ_PGAG12_SZ 6
+#define CBR_RG_IDACAI_PGAG11_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG11_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG11_SFT 0
+#define CBR_RG_IDACAI_PGAG11_HI 5
+#define CBR_RG_IDACAI_PGAG11_SZ 6
+#define CBR_RG_IDACAQ_PGAG11_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG11_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG11_SFT 6
+#define CBR_RG_IDACAQ_PGAG11_HI 11
+#define CBR_RG_IDACAQ_PGAG11_SZ 6
+#define CBR_RG_IDACAI_PGAG10_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG10_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG10_SFT 12
+#define CBR_RG_IDACAI_PGAG10_HI 17
+#define CBR_RG_IDACAI_PGAG10_SZ 6
+#define CBR_RG_IDACAQ_PGAG10_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG10_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG10_SFT 18
+#define CBR_RG_IDACAQ_PGAG10_HI 23
+#define CBR_RG_IDACAQ_PGAG10_SZ 6
+#define CBR_RG_IDACAI_PGAG9_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG9_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG9_SFT 0
+#define CBR_RG_IDACAI_PGAG9_HI 5
+#define CBR_RG_IDACAI_PGAG9_SZ 6
+#define CBR_RG_IDACAQ_PGAG9_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG9_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG9_SFT 6
+#define CBR_RG_IDACAQ_PGAG9_HI 11
+#define CBR_RG_IDACAQ_PGAG9_SZ 6
+#define CBR_RG_IDACAI_PGAG8_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG8_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG8_SFT 12
+#define CBR_RG_IDACAI_PGAG8_HI 17
+#define CBR_RG_IDACAI_PGAG8_SZ 6
+#define CBR_RG_IDACAQ_PGAG8_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG8_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG8_SFT 18
+#define CBR_RG_IDACAQ_PGAG8_HI 23
+#define CBR_RG_IDACAQ_PGAG8_SZ 6
+#define CBR_RG_IDACAI_PGAG7_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG7_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG7_SFT 0
+#define CBR_RG_IDACAI_PGAG7_HI 5
+#define CBR_RG_IDACAI_PGAG7_SZ 6
+#define CBR_RG_IDACAQ_PGAG7_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG7_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG7_SFT 6
+#define CBR_RG_IDACAQ_PGAG7_HI 11
+#define CBR_RG_IDACAQ_PGAG7_SZ 6
+#define CBR_RG_IDACAI_PGAG6_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG6_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG6_SFT 12
+#define CBR_RG_IDACAI_PGAG6_HI 17
+#define CBR_RG_IDACAI_PGAG6_SZ 6
+#define CBR_RG_IDACAQ_PGAG6_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG6_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG6_SFT 18
+#define CBR_RG_IDACAQ_PGAG6_HI 23
+#define CBR_RG_IDACAQ_PGAG6_SZ 6
+#define CBR_RG_IDACAI_PGAG5_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG5_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG5_SFT 0
+#define CBR_RG_IDACAI_PGAG5_HI 5
+#define CBR_RG_IDACAI_PGAG5_SZ 6
+#define CBR_RG_IDACAQ_PGAG5_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG5_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG5_SFT 6
+#define CBR_RG_IDACAQ_PGAG5_HI 11
+#define CBR_RG_IDACAQ_PGAG5_SZ 6
+#define CBR_RG_IDACAI_PGAG4_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG4_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG4_SFT 12
+#define CBR_RG_IDACAI_PGAG4_HI 17
+#define CBR_RG_IDACAI_PGAG4_SZ 6
+#define CBR_RG_IDACAQ_PGAG4_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG4_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG4_SFT 18
+#define CBR_RG_IDACAQ_PGAG4_HI 23
+#define CBR_RG_IDACAQ_PGAG4_SZ 6
+#define CBR_RG_IDACAI_PGAG3_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG3_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG3_SFT 0
+#define CBR_RG_IDACAI_PGAG3_HI 5
+#define CBR_RG_IDACAI_PGAG3_SZ 6
+#define CBR_RG_IDACAQ_PGAG3_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG3_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG3_SFT 6
+#define CBR_RG_IDACAQ_PGAG3_HI 11
+#define CBR_RG_IDACAQ_PGAG3_SZ 6
+#define CBR_RG_IDACAI_PGAG2_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG2_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG2_SFT 12
+#define CBR_RG_IDACAI_PGAG2_HI 17
+#define CBR_RG_IDACAI_PGAG2_SZ 6
+#define CBR_RG_IDACAQ_PGAG2_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG2_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG2_SFT 18
+#define CBR_RG_IDACAQ_PGAG2_HI 23
+#define CBR_RG_IDACAQ_PGAG2_SZ 6
+#define CBR_RG_IDACAI_PGAG1_MSK 0x0000003f
+#define CBR_RG_IDACAI_PGAG1_I_MSK 0xffffffc0
+#define CBR_RG_IDACAI_PGAG1_SFT 0
+#define CBR_RG_IDACAI_PGAG1_HI 5
+#define CBR_RG_IDACAI_PGAG1_SZ 6
+#define CBR_RG_IDACAQ_PGAG1_MSK 0x00000fc0
+#define CBR_RG_IDACAQ_PGAG1_I_MSK 0xfffff03f
+#define CBR_RG_IDACAQ_PGAG1_SFT 6
+#define CBR_RG_IDACAQ_PGAG1_HI 11
+#define CBR_RG_IDACAQ_PGAG1_SZ 6
+#define CBR_RG_IDACAI_PGAG0_MSK 0x0003f000
+#define CBR_RG_IDACAI_PGAG0_I_MSK 0xfffc0fff
+#define CBR_RG_IDACAI_PGAG0_SFT 12
+#define CBR_RG_IDACAI_PGAG0_HI 17
+#define CBR_RG_IDACAI_PGAG0_SZ 6
+#define CBR_RG_IDACAQ_PGAG0_MSK 0x00fc0000
+#define CBR_RG_IDACAQ_PGAG0_I_MSK 0xff03ffff
+#define CBR_RG_IDACAQ_PGAG0_SFT 18
+#define CBR_RG_IDACAQ_PGAG0_HI 23
+#define CBR_RG_IDACAQ_PGAG0_SZ 6
+#define CBR_RG_EN_RCAL_MSK 0x00000001
+#define CBR_RG_EN_RCAL_I_MSK 0xfffffffe
+#define CBR_RG_EN_RCAL_SFT 0
+#define CBR_RG_EN_RCAL_HI 0
+#define CBR_RG_EN_RCAL_SZ 1
+#define CBR_RG_RCAL_SPD_MSK 0x00000002
+#define CBR_RG_RCAL_SPD_I_MSK 0xfffffffd
+#define CBR_RG_RCAL_SPD_SFT 1
+#define CBR_RG_RCAL_SPD_HI 1
+#define CBR_RG_RCAL_SPD_SZ 1
+#define CBR_RG_RCAL_TMR_MSK 0x000001fc
+#define CBR_RG_RCAL_TMR_I_MSK 0xfffffe03
+#define CBR_RG_RCAL_TMR_SFT 2
+#define CBR_RG_RCAL_TMR_HI 8
+#define CBR_RG_RCAL_TMR_SZ 7
+#define CBR_RG_RCAL_CODE_CWR_MSK 0x00000200
+#define CBR_RG_RCAL_CODE_CWR_I_MSK 0xfffffdff
+#define CBR_RG_RCAL_CODE_CWR_SFT 9
+#define CBR_RG_RCAL_CODE_CWR_HI 9
+#define CBR_RG_RCAL_CODE_CWR_SZ 1
+#define CBR_RG_RCAL_CODE_CWD_MSK 0x00007c00
+#define CBR_RG_RCAL_CODE_CWD_I_MSK 0xffff83ff
+#define CBR_RG_RCAL_CODE_CWD_SFT 10
+#define CBR_RG_RCAL_CODE_CWD_HI 14
+#define CBR_RG_RCAL_CODE_CWD_SZ 5
+#define CBR_RG_SX_SUB_SEL_CWR_MSK 0x00000001
+#define CBR_RG_SX_SUB_SEL_CWR_I_MSK 0xfffffffe
+#define CBR_RG_SX_SUB_SEL_CWR_SFT 0
+#define CBR_RG_SX_SUB_SEL_CWR_HI 0
+#define CBR_RG_SX_SUB_SEL_CWR_SZ 1
+#define CBR_RG_SX_SUB_SEL_CWD_MSK 0x000000fe
+#define CBR_RG_SX_SUB_SEL_CWD_I_MSK 0xffffff01
+#define CBR_RG_SX_SUB_SEL_CWD_SFT 1
+#define CBR_RG_SX_SUB_SEL_CWD_HI 7
+#define CBR_RG_SX_SUB_SEL_CWD_SZ 7
+#define CBR_RG_DP_BBPLL_BS_CWR_MSK 0x00000100
+#define CBR_RG_DP_BBPLL_BS_CWR_I_MSK 0xfffffeff
+#define CBR_RG_DP_BBPLL_BS_CWR_SFT 8
+#define CBR_RG_DP_BBPLL_BS_CWR_HI 8
+#define CBR_RG_DP_BBPLL_BS_CWR_SZ 1
+#define CBR_RG_DP_BBPLL_BS_CWD_MSK 0x00007e00
+#define CBR_RG_DP_BBPLL_BS_CWD_I_MSK 0xffff81ff
+#define CBR_RG_DP_BBPLL_BS_CWD_SFT 9
+#define CBR_RG_DP_BBPLL_BS_CWD_HI 14
+#define CBR_RG_DP_BBPLL_BS_CWD_SZ 6
+#define CBR_RCAL_RDY_MSK 0x00000001
+#define CBR_RCAL_RDY_I_MSK 0xfffffffe
+#define CBR_RCAL_RDY_SFT 0
+#define CBR_RCAL_RDY_HI 0
+#define CBR_RCAL_RDY_SZ 1
+#define CBR_DA_LCK_RDY_MSK 0x00000002
+#define CBR_DA_LCK_RDY_I_MSK 0xfffffffd
+#define CBR_DA_LCK_RDY_SFT 1
+#define CBR_DA_LCK_RDY_HI 1
+#define CBR_DA_LCK_RDY_SZ 1
+#define CBR_VT_MON_RDY_MSK 0x00000004
+#define CBR_VT_MON_RDY_I_MSK 0xfffffffb
+#define CBR_VT_MON_RDY_SFT 2
+#define CBR_VT_MON_RDY_HI 2
+#define CBR_VT_MON_RDY_SZ 1
+#define CBR_DP_VT_MON_RDY_MSK 0x00000008
+#define CBR_DP_VT_MON_RDY_I_MSK 0xfffffff7
+#define CBR_DP_VT_MON_RDY_SFT 3
+#define CBR_DP_VT_MON_RDY_HI 3
+#define CBR_DP_VT_MON_RDY_SZ 1
+#define CBR_CH_RDY_MSK 0x00000010
+#define CBR_CH_RDY_I_MSK 0xffffffef
+#define CBR_CH_RDY_SFT 4
+#define CBR_CH_RDY_HI 4
+#define CBR_CH_RDY_SZ 1
+#define CBR_DA_R_CODE_LUT_MSK 0x000007c0
+#define CBR_DA_R_CODE_LUT_I_MSK 0xfffff83f
+#define CBR_DA_R_CODE_LUT_SFT 6
+#define CBR_DA_R_CODE_LUT_HI 10
+#define CBR_DA_R_CODE_LUT_SZ 5
+#define CBR_AD_SX_VT_MON_Q_MSK 0x00001800
+#define CBR_AD_SX_VT_MON_Q_I_MSK 0xffffe7ff
+#define CBR_AD_SX_VT_MON_Q_SFT 11
+#define CBR_AD_SX_VT_MON_Q_HI 12
+#define CBR_AD_SX_VT_MON_Q_SZ 2
+#define CBR_AD_DP_VT_MON_Q_MSK 0x00006000
+#define CBR_AD_DP_VT_MON_Q_I_MSK 0xffff9fff
+#define CBR_AD_DP_VT_MON_Q_SFT 13
+#define CBR_AD_DP_VT_MON_Q_HI 14
+#define CBR_AD_DP_VT_MON_Q_SZ 2
+#define CBR_DA_R_CAL_CODE_MSK 0x0000001f
+#define CBR_DA_R_CAL_CODE_I_MSK 0xffffffe0
+#define CBR_DA_R_CAL_CODE_SFT 0
+#define CBR_DA_R_CAL_CODE_HI 4
+#define CBR_DA_R_CAL_CODE_SZ 5
+#define CBR_DA_SX_SUB_SEL_MSK 0x00000fe0
+#define CBR_DA_SX_SUB_SEL_I_MSK 0xfffff01f
+#define CBR_DA_SX_SUB_SEL_SFT 5
+#define CBR_DA_SX_SUB_SEL_HI 11
+#define CBR_DA_SX_SUB_SEL_SZ 7
+#define CBR_DA_DP_BBPLL_BS_MSK 0x0003f000
+#define CBR_DA_DP_BBPLL_BS_I_MSK 0xfffc0fff
+#define CBR_DA_DP_BBPLL_BS_SFT 12
+#define CBR_DA_DP_BBPLL_BS_HI 17
+#define CBR_DA_DP_BBPLL_BS_SZ 6
+#define CBR_TX_EN_MSK 0x00000001
+#define CBR_TX_EN_I_MSK 0xfffffffe
+#define CBR_TX_EN_SFT 0
+#define CBR_TX_EN_HI 0
+#define CBR_TX_EN_SZ 1
+#define CBR_TX_CNT_RST_MSK 0x00000002
+#define CBR_TX_CNT_RST_I_MSK 0xfffffffd
+#define CBR_TX_CNT_RST_SFT 1
+#define CBR_TX_CNT_RST_HI 1
+#define CBR_TX_CNT_RST_SZ 1
+#define CBR_IFS_TIME_MSK 0x000000fc
+#define CBR_IFS_TIME_I_MSK 0xffffff03
+#define CBR_IFS_TIME_SFT 2
+#define CBR_IFS_TIME_HI 7
+#define CBR_IFS_TIME_SZ 6
+#define CBR_LENGTH_TARGET_MSK 0x000fff00
+#define CBR_LENGTH_TARGET_I_MSK 0xfff000ff
+#define CBR_LENGTH_TARGET_SFT 8
+#define CBR_LENGTH_TARGET_HI 19
+#define CBR_LENGTH_TARGET_SZ 12
+#define CBR_TX_CNT_TARGET_MSK 0xff000000
+#define CBR_TX_CNT_TARGET_I_MSK 0x00ffffff
+#define CBR_TX_CNT_TARGET_SFT 24
+#define CBR_TX_CNT_TARGET_HI 31
+#define CBR_TX_CNT_TARGET_SZ 8
+#define CBR_TC_CNT_TARGET_MSK 0x00ffffff
+#define CBR_TC_CNT_TARGET_I_MSK 0xff000000
+#define CBR_TC_CNT_TARGET_SFT 0
+#define CBR_TC_CNT_TARGET_HI 23
+#define CBR_TC_CNT_TARGET_SZ 24
+#define CBR_PLCP_PSDU_DATA_MEM_MSK 0x000000ff
+#define CBR_PLCP_PSDU_DATA_MEM_I_MSK 0xffffff00
+#define CBR_PLCP_PSDU_DATA_MEM_SFT 0
+#define CBR_PLCP_PSDU_DATA_MEM_HI 7
+#define CBR_PLCP_PSDU_DATA_MEM_SZ 8
+#define CBR_PLCP_PSDU_PREAMBLE_SHORT_MSK 0x00000100
+#define CBR_PLCP_PSDU_PREAMBLE_SHORT_I_MSK 0xfffffeff
+#define CBR_PLCP_PSDU_PREAMBLE_SHORT_SFT 8
+#define CBR_PLCP_PSDU_PREAMBLE_SHORT_HI 8
+#define CBR_PLCP_PSDU_PREAMBLE_SHORT_SZ 1
+#define CBR_PLCP_BYTE_LENGTH_MSK 0x001ffe00
+#define CBR_PLCP_BYTE_LENGTH_I_MSK 0xffe001ff
+#define CBR_PLCP_BYTE_LENGTH_SFT 9
+#define CBR_PLCP_BYTE_LENGTH_HI 20
+#define CBR_PLCP_BYTE_LENGTH_SZ 12
+#define CBR_PLCP_PSDU_RATE_MSK 0x00600000
+#define CBR_PLCP_PSDU_RATE_I_MSK 0xff9fffff
+#define CBR_PLCP_PSDU_RATE_SFT 21
+#define CBR_PLCP_PSDU_RATE_HI 22
+#define CBR_PLCP_PSDU_RATE_SZ 2
+#define CBR_TAIL_TIME_MSK 0x1f800000
+#define CBR_TAIL_TIME_I_MSK 0xe07fffff
+#define CBR_TAIL_TIME_SFT 23
+#define CBR_TAIL_TIME_HI 28
+#define CBR_TAIL_TIME_SZ 6
+#define CBR_RG_O_PAD_PD_MSK 0x00000001
+#define CBR_RG_O_PAD_PD_I_MSK 0xfffffffe
+#define CBR_RG_O_PAD_PD_SFT 0
+#define CBR_RG_O_PAD_PD_HI 0
+#define CBR_RG_O_PAD_PD_SZ 1
+#define CBR_RG_I_PAD_PD_MSK 0x00000002
+#define CBR_RG_I_PAD_PD_I_MSK 0xfffffffd
+#define CBR_RG_I_PAD_PD_SFT 1
+#define CBR_RG_I_PAD_PD_HI 1
+#define CBR_RG_I_PAD_PD_SZ 1
+#define CBR_SEL_ADCKP_INV_MSK 0x00000004
+#define CBR_SEL_ADCKP_INV_I_MSK 0xfffffffb
+#define CBR_SEL_ADCKP_INV_SFT 2
+#define CBR_SEL_ADCKP_INV_HI 2
+#define CBR_SEL_ADCKP_INV_SZ 1
+#define CBR_RG_PAD_DS_MSK 0x00000008
+#define CBR_RG_PAD_DS_I_MSK 0xfffffff7
+#define CBR_RG_PAD_DS_SFT 3
+#define CBR_RG_PAD_DS_HI 3
+#define CBR_RG_PAD_DS_SZ 1
+#define CBR_SEL_ADCKP_MUX_MSK 0x00000010
+#define CBR_SEL_ADCKP_MUX_I_MSK 0xffffffef
+#define CBR_SEL_ADCKP_MUX_SFT 4
+#define CBR_SEL_ADCKP_MUX_HI 4
+#define CBR_SEL_ADCKP_MUX_SZ 1
+#define CBR_RG_PAD_DS_CLK_MSK 0x00000020
+#define CBR_RG_PAD_DS_CLK_I_MSK 0xffffffdf
+#define CBR_RG_PAD_DS_CLK_SFT 5
+#define CBR_RG_PAD_DS_CLK_HI 5
+#define CBR_RG_PAD_DS_CLK_SZ 1
+#define CBR_INTP_SEL_MSK 0x00000200
+#define CBR_INTP_SEL_I_MSK 0xfffffdff
+#define CBR_INTP_SEL_SFT 9
+#define CBR_INTP_SEL_HI 9
+#define CBR_INTP_SEL_SZ 1
+#define CBR_IQ_SWP_MSK 0x00000400
+#define CBR_IQ_SWP_I_MSK 0xfffffbff
+#define CBR_IQ_SWP_SFT 10
+#define CBR_IQ_SWP_HI 10
+#define CBR_IQ_SWP_SZ 1
+#define CBR_RG_EN_EXT_DA_MSK 0x00000800
+#define CBR_RG_EN_EXT_DA_I_MSK 0xfffff7ff
+#define CBR_RG_EN_EXT_DA_SFT 11
+#define CBR_RG_EN_EXT_DA_HI 11
+#define CBR_RG_EN_EXT_DA_SZ 1
+#define CBR_RG_DIS_DA_OFFSET_MSK 0x00001000
+#define CBR_RG_DIS_DA_OFFSET_I_MSK 0xffffefff
+#define CBR_RG_DIS_DA_OFFSET_SFT 12
+#define CBR_RG_DIS_DA_OFFSET_HI 12
+#define CBR_RG_DIS_DA_OFFSET_SZ 1
+#define CBR_DBG_SEL_MSK 0x000f0000
+#define CBR_DBG_SEL_I_MSK 0xfff0ffff
+#define CBR_DBG_SEL_SFT 16
+#define CBR_DBG_SEL_HI 19
+#define CBR_DBG_SEL_SZ 4
+#define CBR_DBG_EN_MSK 0x00100000
+#define CBR_DBG_EN_I_MSK 0xffefffff
+#define CBR_DBG_EN_SFT 20
+#define CBR_DBG_EN_HI 20
+#define CBR_DBG_EN_SZ 1
+#define CBR_RG_PKT_GEN_TX_CNT_MSK 0xffffffff
+#define CBR_RG_PKT_GEN_TX_CNT_I_MSK 0x00000000
+#define CBR_RG_PKT_GEN_TX_CNT_SFT 0
+#define CBR_RG_PKT_GEN_TX_CNT_HI 31
+#define CBR_RG_PKT_GEN_TX_CNT_SZ 32
+#define CBR_TP_SEL_MSK 0x0000001f
+#define CBR_TP_SEL_I_MSK 0xffffffe0
+#define CBR_TP_SEL_SFT 0
+#define CBR_TP_SEL_HI 4
+#define CBR_TP_SEL_SZ 5
+#define CBR_IDEAL_IQ_EN_MSK 0x00000020
+#define CBR_IDEAL_IQ_EN_I_MSK 0xffffffdf
+#define CBR_IDEAL_IQ_EN_SFT 5
+#define CBR_IDEAL_IQ_EN_HI 5
+#define CBR_IDEAL_IQ_EN_SZ 1
+#define CBR_DATA_OUT_SEL_MSK 0x000001c0
+#define CBR_DATA_OUT_SEL_I_MSK 0xfffffe3f
+#define CBR_DATA_OUT_SEL_SFT 6
+#define CBR_DATA_OUT_SEL_HI 8
+#define CBR_DATA_OUT_SEL_SZ 3
+#define CBR_TWO_TONE_EN_MSK 0x00000200
+#define CBR_TWO_TONE_EN_I_MSK 0xfffffdff
+#define CBR_TWO_TONE_EN_SFT 9
+#define CBR_TWO_TONE_EN_HI 9
+#define CBR_TWO_TONE_EN_SZ 1
+#define CBR_FREQ_SEL_MSK 0x00ff0000
+#define CBR_FREQ_SEL_I_MSK 0xff00ffff
+#define CBR_FREQ_SEL_SFT 16
+#define CBR_FREQ_SEL_HI 23
+#define CBR_FREQ_SEL_SZ 8
+#define CBR_IQ_SCALE_MSK 0xff000000
+#define CBR_IQ_SCALE_I_MSK 0x00ffffff
+#define CBR_IQ_SCALE_SFT 24
+#define CBR_IQ_SCALE_HI 31
+#define CBR_IQ_SCALE_SZ 8
+#define CPU_QUE_POP_MSK 0x00000001
+#define CPU_QUE_POP_I_MSK 0xfffffffe
+#define CPU_QUE_POP_SFT 0
+#define CPU_QUE_POP_HI 0
+#define CPU_QUE_POP_SZ 1
+#define CPU_INT_MSK 0x00000004
+#define CPU_INT_I_MSK 0xfffffffb
+#define CPU_INT_SFT 2
+#define CPU_INT_HI 2
+#define CPU_INT_SZ 1
+#define CPU_ID_TB0_MSK 0xffffffff
+#define CPU_ID_TB0_I_MSK 0x00000000
+#define CPU_ID_TB0_SFT 0
+#define CPU_ID_TB0_HI 31
+#define CPU_ID_TB0_SZ 32
+#define CPU_ID_TB1_MSK 0xffffffff
+#define CPU_ID_TB1_I_MSK 0x00000000
+#define CPU_ID_TB1_SFT 0
+#define CPU_ID_TB1_HI 31
+#define CPU_ID_TB1_SZ 32
+#define HW_PKTID_MSK 0x000007ff
+#define HW_PKTID_I_MSK 0xfffff800
+#define HW_PKTID_SFT 0
+#define HW_PKTID_HI 10
+#define HW_PKTID_SZ 11
+#define CH0_INT_ADDR_MSK 0xffffffff
+#define CH0_INT_ADDR_I_MSK 0x00000000
+#define CH0_INT_ADDR_SFT 0
+#define CH0_INT_ADDR_HI 31
+#define CH0_INT_ADDR_SZ 32
+#define PRI_HW_PKTID_MSK 0x000007ff
+#define PRI_HW_PKTID_I_MSK 0xfffff800
+#define PRI_HW_PKTID_SFT 0
+#define PRI_HW_PKTID_HI 10
+#define PRI_HW_PKTID_SZ 11
+#define CH0_FULL_MSK 0x00000001
+#define CH0_FULL_I_MSK 0xfffffffe
+#define CH0_FULL_SFT 0
+#define CH0_FULL_HI 0
+#define CH0_FULL_SZ 1
+#define FF0_EMPTY_MSK 0x00000002
+#define FF0_EMPTY_I_MSK 0xfffffffd
+#define FF0_EMPTY_SFT 1
+#define FF0_EMPTY_HI 1
+#define FF0_EMPTY_SZ 1
+#define RLS_BUSY_MSK 0x00000200
+#define RLS_BUSY_I_MSK 0xfffffdff
+#define RLS_BUSY_SFT 9
+#define RLS_BUSY_HI 9
+#define RLS_BUSY_SZ 1
+#define RLS_COUNT_CLR_MSK 0x00000400
+#define RLS_COUNT_CLR_I_MSK 0xfffffbff
+#define RLS_COUNT_CLR_SFT 10
+#define RLS_COUNT_CLR_HI 10
+#define RLS_COUNT_CLR_SZ 1
+#define RTN_COUNT_CLR_MSK 0x00000800
+#define RTN_COUNT_CLR_I_MSK 0xfffff7ff
+#define RTN_COUNT_CLR_SFT 11
+#define RTN_COUNT_CLR_HI 11
+#define RTN_COUNT_CLR_SZ 1
+#define RLS_COUNT_MSK 0x00ff0000
+#define RLS_COUNT_I_MSK 0xff00ffff
+#define RLS_COUNT_SFT 16
+#define RLS_COUNT_HI 23
+#define RLS_COUNT_SZ 8
+#define RTN_COUNT_MSK 0xff000000
+#define RTN_COUNT_I_MSK 0x00ffffff
+#define RTN_COUNT_SFT 24
+#define RTN_COUNT_HI 31
+#define RTN_COUNT_SZ 8
+#define FF0_CNT_MSK 0x0000001f
+#define FF0_CNT_I_MSK 0xffffffe0
+#define FF0_CNT_SFT 0
+#define FF0_CNT_HI 4
+#define FF0_CNT_SZ 5
+#define FF1_CNT_MSK 0x000001e0
+#define FF1_CNT_I_MSK 0xfffffe1f
+#define FF1_CNT_SFT 5
+#define FF1_CNT_HI 8
+#define FF1_CNT_SZ 4
+#define FF3_CNT_MSK 0x00003800
+#define FF3_CNT_I_MSK 0xffffc7ff
+#define FF3_CNT_SFT 11
+#define FF3_CNT_HI 13
+#define FF3_CNT_SZ 3
+#define FF5_CNT_MSK 0x000e0000
+#define FF5_CNT_I_MSK 0xfff1ffff
+#define FF5_CNT_SFT 17
+#define FF5_CNT_HI 19
+#define FF5_CNT_SZ 3
+#define FF6_CNT_MSK 0x00700000
+#define FF6_CNT_I_MSK 0xff8fffff
+#define FF6_CNT_SFT 20
+#define FF6_CNT_HI 22
+#define FF6_CNT_SZ 3
+#define FF7_CNT_MSK 0x03800000
+#define FF7_CNT_I_MSK 0xfc7fffff
+#define FF7_CNT_SFT 23
+#define FF7_CNT_HI 25
+#define FF7_CNT_SZ 3
+#define FF8_CNT_MSK 0x1c000000
+#define FF8_CNT_I_MSK 0xe3ffffff
+#define FF8_CNT_SFT 26
+#define FF8_CNT_HI 28
+#define FF8_CNT_SZ 3
+#define FF9_CNT_MSK 0xe0000000
+#define FF9_CNT_I_MSK 0x1fffffff
+#define FF9_CNT_SFT 29
+#define FF9_CNT_HI 31
+#define FF9_CNT_SZ 3
+#define FF10_CNT_MSK 0x00000007
+#define FF10_CNT_I_MSK 0xfffffff8
+#define FF10_CNT_SFT 0
+#define FF10_CNT_HI 2
+#define FF10_CNT_SZ 3
+#define FF11_CNT_MSK 0x00000038
+#define FF11_CNT_I_MSK 0xffffffc7
+#define FF11_CNT_SFT 3
+#define FF11_CNT_HI 5
+#define FF11_CNT_SZ 3
+#define FF12_CNT_MSK 0x000001c0
+#define FF12_CNT_I_MSK 0xfffffe3f
+#define FF12_CNT_SFT 6
+#define FF12_CNT_HI 8
+#define FF12_CNT_SZ 3
+#define FF13_CNT_MSK 0x00000600
+#define FF13_CNT_I_MSK 0xfffff9ff
+#define FF13_CNT_SFT 9
+#define FF13_CNT_HI 10
+#define FF13_CNT_SZ 2
+#define FF14_CNT_MSK 0x00001800
+#define FF14_CNT_I_MSK 0xffffe7ff
+#define FF14_CNT_SFT 11
+#define FF14_CNT_HI 12
+#define FF14_CNT_SZ 2
+#define FF15_CNT_MSK 0x00006000
+#define FF15_CNT_I_MSK 0xffff9fff
+#define FF15_CNT_SFT 13
+#define FF15_CNT_HI 14
+#define FF15_CNT_SZ 2
+#define FF4_CNT_MSK 0x000f8000
+#define FF4_CNT_I_MSK 0xfff07fff
+#define FF4_CNT_SFT 15
+#define FF4_CNT_HI 19
+#define FF4_CNT_SZ 5
+#define FF2_CNT_MSK 0x00700000
+#define FF2_CNT_I_MSK 0xff8fffff
+#define FF2_CNT_SFT 20
+#define FF2_CNT_HI 22
+#define FF2_CNT_SZ 3
+#define CH1_FULL_MSK 0x00000002
+#define CH1_FULL_I_MSK 0xfffffffd
+#define CH1_FULL_SFT 1
+#define CH1_FULL_HI 1
+#define CH1_FULL_SZ 1
+#define CH2_FULL_MSK 0x00000004
+#define CH2_FULL_I_MSK 0xfffffffb
+#define CH2_FULL_SFT 2
+#define CH2_FULL_HI 2
+#define CH2_FULL_SZ 1
+#define CH3_FULL_MSK 0x00000008
+#define CH3_FULL_I_MSK 0xfffffff7
+#define CH3_FULL_SFT 3
+#define CH3_FULL_HI 3
+#define CH3_FULL_SZ 1
+#define CH4_FULL_MSK 0x00000010
+#define CH4_FULL_I_MSK 0xffffffef
+#define CH4_FULL_SFT 4
+#define CH4_FULL_HI 4
+#define CH4_FULL_SZ 1
+#define CH5_FULL_MSK 0x00000020
+#define CH5_FULL_I_MSK 0xffffffdf
+#define CH5_FULL_SFT 5
+#define CH5_FULL_HI 5
+#define CH5_FULL_SZ 1
+#define CH6_FULL_MSK 0x00000040
+#define CH6_FULL_I_MSK 0xffffffbf
+#define CH6_FULL_SFT 6
+#define CH6_FULL_HI 6
+#define CH6_FULL_SZ 1
+#define CH7_FULL_MSK 0x00000080
+#define CH7_FULL_I_MSK 0xffffff7f
+#define CH7_FULL_SFT 7
+#define CH7_FULL_HI 7
+#define CH7_FULL_SZ 1
+#define CH8_FULL_MSK 0x00000100
+#define CH8_FULL_I_MSK 0xfffffeff
+#define CH8_FULL_SFT 8
+#define CH8_FULL_HI 8
+#define CH8_FULL_SZ 1
+#define CH9_FULL_MSK 0x00000200
+#define CH9_FULL_I_MSK 0xfffffdff
+#define CH9_FULL_SFT 9
+#define CH9_FULL_HI 9
+#define CH9_FULL_SZ 1
+#define CH10_FULL_MSK 0x00000400
+#define CH10_FULL_I_MSK 0xfffffbff
+#define CH10_FULL_SFT 10
+#define CH10_FULL_HI 10
+#define CH10_FULL_SZ 1
+#define CH11_FULL_MSK 0x00000800
+#define CH11_FULL_I_MSK 0xfffff7ff
+#define CH11_FULL_SFT 11
+#define CH11_FULL_HI 11
+#define CH11_FULL_SZ 1
+#define CH12_FULL_MSK 0x00001000
+#define CH12_FULL_I_MSK 0xffffefff
+#define CH12_FULL_SFT 12
+#define CH12_FULL_HI 12
+#define CH12_FULL_SZ 1
+#define CH13_FULL_MSK 0x00002000
+#define CH13_FULL_I_MSK 0xffffdfff
+#define CH13_FULL_SFT 13
+#define CH13_FULL_HI 13
+#define CH13_FULL_SZ 1
+#define CH14_FULL_MSK 0x00004000
+#define CH14_FULL_I_MSK 0xffffbfff
+#define CH14_FULL_SFT 14
+#define CH14_FULL_HI 14
+#define CH14_FULL_SZ 1
+#define CH15_FULL_MSK 0x00008000
+#define CH15_FULL_I_MSK 0xffff7fff
+#define CH15_FULL_SFT 15
+#define CH15_FULL_HI 15
+#define CH15_FULL_SZ 1
+#define HALT_CH0_MSK 0x00000001
+#define HALT_CH0_I_MSK 0xfffffffe
+#define HALT_CH0_SFT 0
+#define HALT_CH0_HI 0
+#define HALT_CH0_SZ 1
+#define HALT_CH1_MSK 0x00000002
+#define HALT_CH1_I_MSK 0xfffffffd
+#define HALT_CH1_SFT 1
+#define HALT_CH1_HI 1
+#define HALT_CH1_SZ 1
+#define HALT_CH2_MSK 0x00000004
+#define HALT_CH2_I_MSK 0xfffffffb
+#define HALT_CH2_SFT 2
+#define HALT_CH2_HI 2
+#define HALT_CH2_SZ 1
+#define HALT_CH3_MSK 0x00000008
+#define HALT_CH3_I_MSK 0xfffffff7
+#define HALT_CH3_SFT 3
+#define HALT_CH3_HI 3
+#define HALT_CH3_SZ 1
+#define HALT_CH4_MSK 0x00000010
+#define HALT_CH4_I_MSK 0xffffffef
+#define HALT_CH4_SFT 4
+#define HALT_CH4_HI 4
+#define HALT_CH4_SZ 1
+#define HALT_CH5_MSK 0x00000020
+#define HALT_CH5_I_MSK 0xffffffdf
+#define HALT_CH5_SFT 5
+#define HALT_CH5_HI 5
+#define HALT_CH5_SZ 1
+#define HALT_CH6_MSK 0x00000040
+#define HALT_CH6_I_MSK 0xffffffbf
+#define HALT_CH6_SFT 6
+#define HALT_CH6_HI 6
+#define HALT_CH6_SZ 1
+#define HALT_CH7_MSK 0x00000080
+#define HALT_CH7_I_MSK 0xffffff7f
+#define HALT_CH7_SFT 7
+#define HALT_CH7_HI 7
+#define HALT_CH7_SZ 1
+#define HALT_CH8_MSK 0x00000100
+#define HALT_CH8_I_MSK 0xfffffeff
+#define HALT_CH8_SFT 8
+#define HALT_CH8_HI 8
+#define HALT_CH8_SZ 1
+#define HALT_CH9_MSK 0x00000200
+#define HALT_CH9_I_MSK 0xfffffdff
+#define HALT_CH9_SFT 9
+#define HALT_CH9_HI 9
+#define HALT_CH9_SZ 1
+#define HALT_CH10_MSK 0x00000400
+#define HALT_CH10_I_MSK 0xfffffbff
+#define HALT_CH10_SFT 10
+#define HALT_CH10_HI 10
+#define HALT_CH10_SZ 1
+#define HALT_CH11_MSK 0x00000800
+#define HALT_CH11_I_MSK 0xfffff7ff
+#define HALT_CH11_SFT 11
+#define HALT_CH11_HI 11
+#define HALT_CH11_SZ 1
+#define HALT_CH12_MSK 0x00001000
+#define HALT_CH12_I_MSK 0xffffefff
+#define HALT_CH12_SFT 12
+#define HALT_CH12_HI 12
+#define HALT_CH12_SZ 1
+#define HALT_CH13_MSK 0x00002000
+#define HALT_CH13_I_MSK 0xffffdfff
+#define HALT_CH13_SFT 13
+#define HALT_CH13_HI 13
+#define HALT_CH13_SZ 1
+#define HALT_CH14_MSK 0x00004000
+#define HALT_CH14_I_MSK 0xffffbfff
+#define HALT_CH14_SFT 14
+#define HALT_CH14_HI 14
+#define HALT_CH14_SZ 1
+#define HALT_CH15_MSK 0x00008000
+#define HALT_CH15_I_MSK 0xffff7fff
+#define HALT_CH15_SFT 15
+#define HALT_CH15_HI 15
+#define HALT_CH15_SZ 1
+#define STOP_MBOX_MSK 0x00010000
+#define STOP_MBOX_I_MSK 0xfffeffff
+#define STOP_MBOX_SFT 16
+#define STOP_MBOX_HI 16
+#define STOP_MBOX_SZ 1
+#define MB_ERR_AUTO_HALT_EN_MSK 0x00100000
+#define MB_ERR_AUTO_HALT_EN_I_MSK 0xffefffff
+#define MB_ERR_AUTO_HALT_EN_SFT 20
+#define MB_ERR_AUTO_HALT_EN_HI 20
+#define MB_ERR_AUTO_HALT_EN_SZ 1
+#define MB_EXCEPT_CLR_MSK 0x00200000
+#define MB_EXCEPT_CLR_I_MSK 0xffdfffff
+#define MB_EXCEPT_CLR_SFT 21
+#define MB_EXCEPT_CLR_HI 21
+#define MB_EXCEPT_CLR_SZ 1
+#define MB_EXCEPT_CASE_MSK 0xff000000
+#define MB_EXCEPT_CASE_I_MSK 0x00ffffff
+#define MB_EXCEPT_CASE_SFT 24
+#define MB_EXCEPT_CASE_HI 31
+#define MB_EXCEPT_CASE_SZ 8
+#define MB_DBG_TIME_STEP_MSK 0x0000ffff
+#define MB_DBG_TIME_STEP_I_MSK 0xffff0000
+#define MB_DBG_TIME_STEP_SFT 0
+#define MB_DBG_TIME_STEP_HI 15
+#define MB_DBG_TIME_STEP_SZ 16
+#define DBG_TYPE_MSK 0x00030000
+#define DBG_TYPE_I_MSK 0xfffcffff
+#define DBG_TYPE_SFT 16
+#define DBG_TYPE_HI 17
+#define DBG_TYPE_SZ 2
+#define MB_DBG_CLR_MSK 0x00040000
+#define MB_DBG_CLR_I_MSK 0xfffbffff
+#define MB_DBG_CLR_SFT 18
+#define MB_DBG_CLR_HI 18
+#define MB_DBG_CLR_SZ 1
+#define DBG_ALC_LOG_EN_MSK 0x00080000
+#define DBG_ALC_LOG_EN_I_MSK 0xfff7ffff
+#define DBG_ALC_LOG_EN_SFT 19
+#define DBG_ALC_LOG_EN_HI 19
+#define DBG_ALC_LOG_EN_SZ 1
+#define MB_DBG_COUNTER_EN_MSK 0x01000000
+#define MB_DBG_COUNTER_EN_I_MSK 0xfeffffff
+#define MB_DBG_COUNTER_EN_SFT 24
+#define MB_DBG_COUNTER_EN_HI 24
+#define MB_DBG_COUNTER_EN_SZ 1
+#define MB_DBG_EN_MSK 0x80000000
+#define MB_DBG_EN_I_MSK 0x7fffffff
+#define MB_DBG_EN_SFT 31
+#define MB_DBG_EN_HI 31
+#define MB_DBG_EN_SZ 1
+#define MB_DBG_RECORD_CNT_MSK 0x0000ffff
+#define MB_DBG_RECORD_CNT_I_MSK 0xffff0000
+#define MB_DBG_RECORD_CNT_SFT 0
+#define MB_DBG_RECORD_CNT_HI 15
+#define MB_DBG_RECORD_CNT_SZ 16
+#define MB_DBG_LENGTH_MSK 0xffff0000
+#define MB_DBG_LENGTH_I_MSK 0x0000ffff
+#define MB_DBG_LENGTH_SFT 16
+#define MB_DBG_LENGTH_HI 31
+#define MB_DBG_LENGTH_SZ 16
+#define MB_DBG_CFG_ADDR_MSK 0xffffffff
+#define MB_DBG_CFG_ADDR_I_MSK 0x00000000
+#define MB_DBG_CFG_ADDR_SFT 0
+#define MB_DBG_CFG_ADDR_HI 31
+#define MB_DBG_CFG_ADDR_SZ 32
+#define DBG_HWID0_WR_EN_MSK 0x00000001
+#define DBG_HWID0_WR_EN_I_MSK 0xfffffffe
+#define DBG_HWID0_WR_EN_SFT 0
+#define DBG_HWID0_WR_EN_HI 0
+#define DBG_HWID0_WR_EN_SZ 1
+#define DBG_HWID1_WR_EN_MSK 0x00000002
+#define DBG_HWID1_WR_EN_I_MSK 0xfffffffd
+#define DBG_HWID1_WR_EN_SFT 1
+#define DBG_HWID1_WR_EN_HI 1
+#define DBG_HWID1_WR_EN_SZ 1
+#define DBG_HWID2_WR_EN_MSK 0x00000004
+#define DBG_HWID2_WR_EN_I_MSK 0xfffffffb
+#define DBG_HWID2_WR_EN_SFT 2
+#define DBG_HWID2_WR_EN_HI 2
+#define DBG_HWID2_WR_EN_SZ 1
+#define DBG_HWID3_WR_EN_MSK 0x00000008
+#define DBG_HWID3_WR_EN_I_MSK 0xfffffff7
+#define DBG_HWID3_WR_EN_SFT 3
+#define DBG_HWID3_WR_EN_HI 3
+#define DBG_HWID3_WR_EN_SZ 1
+#define DBG_HWID4_WR_EN_MSK 0x00000010
+#define DBG_HWID4_WR_EN_I_MSK 0xffffffef
+#define DBG_HWID4_WR_EN_SFT 4
+#define DBG_HWID4_WR_EN_HI 4
+#define DBG_HWID4_WR_EN_SZ 1
+#define DBG_HWID5_WR_EN_MSK 0x00000020
+#define DBG_HWID5_WR_EN_I_MSK 0xffffffdf
+#define DBG_HWID5_WR_EN_SFT 5
+#define DBG_HWID5_WR_EN_HI 5
+#define DBG_HWID5_WR_EN_SZ 1
+#define DBG_HWID6_WR_EN_MSK 0x00000040
+#define DBG_HWID6_WR_EN_I_MSK 0xffffffbf
+#define DBG_HWID6_WR_EN_SFT 6
+#define DBG_HWID6_WR_EN_HI 6
+#define DBG_HWID6_WR_EN_SZ 1
+#define DBG_HWID7_WR_EN_MSK 0x00000080
+#define DBG_HWID7_WR_EN_I_MSK 0xffffff7f
+#define DBG_HWID7_WR_EN_SFT 7
+#define DBG_HWID7_WR_EN_HI 7
+#define DBG_HWID7_WR_EN_SZ 1
+#define DBG_HWID8_WR_EN_MSK 0x00000100
+#define DBG_HWID8_WR_EN_I_MSK 0xfffffeff
+#define DBG_HWID8_WR_EN_SFT 8
+#define DBG_HWID8_WR_EN_HI 8
+#define DBG_HWID8_WR_EN_SZ 1
+#define DBG_HWID9_WR_EN_MSK 0x00000200
+#define DBG_HWID9_WR_EN_I_MSK 0xfffffdff
+#define DBG_HWID9_WR_EN_SFT 9
+#define DBG_HWID9_WR_EN_HI 9
+#define DBG_HWID9_WR_EN_SZ 1
+#define DBG_HWID10_WR_EN_MSK 0x00000400
+#define DBG_HWID10_WR_EN_I_MSK 0xfffffbff
+#define DBG_HWID10_WR_EN_SFT 10
+#define DBG_HWID10_WR_EN_HI 10
+#define DBG_HWID10_WR_EN_SZ 1
+#define DBG_HWID11_WR_EN_MSK 0x00000800
+#define DBG_HWID11_WR_EN_I_MSK 0xfffff7ff
+#define DBG_HWID11_WR_EN_SFT 11
+#define DBG_HWID11_WR_EN_HI 11
+#define DBG_HWID11_WR_EN_SZ 1
+#define DBG_HWID12_WR_EN_MSK 0x00001000
+#define DBG_HWID12_WR_EN_I_MSK 0xffffefff
+#define DBG_HWID12_WR_EN_SFT 12
+#define DBG_HWID12_WR_EN_HI 12
+#define DBG_HWID12_WR_EN_SZ 1
+#define DBG_HWID13_WR_EN_MSK 0x00002000
+#define DBG_HWID13_WR_EN_I_MSK 0xffffdfff
+#define DBG_HWID13_WR_EN_SFT 13
+#define DBG_HWID13_WR_EN_HI 13
+#define DBG_HWID13_WR_EN_SZ 1
+#define DBG_HWID14_WR_EN_MSK 0x00004000
+#define DBG_HWID14_WR_EN_I_MSK 0xffffbfff
+#define DBG_HWID14_WR_EN_SFT 14
+#define DBG_HWID14_WR_EN_HI 14
+#define DBG_HWID14_WR_EN_SZ 1
+#define DBG_HWID15_WR_EN_MSK 0x00008000
+#define DBG_HWID15_WR_EN_I_MSK 0xffff7fff
+#define DBG_HWID15_WR_EN_SFT 15
+#define DBG_HWID15_WR_EN_HI 15
+#define DBG_HWID15_WR_EN_SZ 1
+#define DBG_HWID0_RD_EN_MSK 0x00010000
+#define DBG_HWID0_RD_EN_I_MSK 0xfffeffff
+#define DBG_HWID0_RD_EN_SFT 16
+#define DBG_HWID0_RD_EN_HI 16
+#define DBG_HWID0_RD_EN_SZ 1
+#define DBG_HWID1_RD_EN_MSK 0x00020000
+#define DBG_HWID1_RD_EN_I_MSK 0xfffdffff
+#define DBG_HWID1_RD_EN_SFT 17
+#define DBG_HWID1_RD_EN_HI 17
+#define DBG_HWID1_RD_EN_SZ 1
+#define DBG_HWID2_RD_EN_MSK 0x00040000
+#define DBG_HWID2_RD_EN_I_MSK 0xfffbffff
+#define DBG_HWID2_RD_EN_SFT 18
+#define DBG_HWID2_RD_EN_HI 18
+#define DBG_HWID2_RD_EN_SZ 1
+#define DBG_HWID3_RD_EN_MSK 0x00080000
+#define DBG_HWID3_RD_EN_I_MSK 0xfff7ffff
+#define DBG_HWID3_RD_EN_SFT 19
+#define DBG_HWID3_RD_EN_HI 19
+#define DBG_HWID3_RD_EN_SZ 1
+#define DBG_HWID4_RD_EN_MSK 0x00100000
+#define DBG_HWID4_RD_EN_I_MSK 0xffefffff
+#define DBG_HWID4_RD_EN_SFT 20
+#define DBG_HWID4_RD_EN_HI 20
+#define DBG_HWID4_RD_EN_SZ 1
+#define DBG_HWID5_RD_EN_MSK 0x00200000
+#define DBG_HWID5_RD_EN_I_MSK 0xffdfffff
+#define DBG_HWID5_RD_EN_SFT 21
+#define DBG_HWID5_RD_EN_HI 21
+#define DBG_HWID5_RD_EN_SZ 1
+#define DBG_HWID6_RD_EN_MSK 0x00400000
+#define DBG_HWID6_RD_EN_I_MSK 0xffbfffff
+#define DBG_HWID6_RD_EN_SFT 22
+#define DBG_HWID6_RD_EN_HI 22
+#define DBG_HWID6_RD_EN_SZ 1
+#define DBG_HWID7_RD_EN_MSK 0x00800000
+#define DBG_HWID7_RD_EN_I_MSK 0xff7fffff
+#define DBG_HWID7_RD_EN_SFT 23
+#define DBG_HWID7_RD_EN_HI 23
+#define DBG_HWID7_RD_EN_SZ 1
+#define DBG_HWID8_RD_EN_MSK 0x01000000
+#define DBG_HWID8_RD_EN_I_MSK 0xfeffffff
+#define DBG_HWID8_RD_EN_SFT 24
+#define DBG_HWID8_RD_EN_HI 24
+#define DBG_HWID8_RD_EN_SZ 1
+#define DBG_HWID9_RD_EN_MSK 0x02000000
+#define DBG_HWID9_RD_EN_I_MSK 0xfdffffff
+#define DBG_HWID9_RD_EN_SFT 25
+#define DBG_HWID9_RD_EN_HI 25
+#define DBG_HWID9_RD_EN_SZ 1
+#define DBG_HWID10_RD_EN_MSK 0x04000000
+#define DBG_HWID10_RD_EN_I_MSK 0xfbffffff
+#define DBG_HWID10_RD_EN_SFT 26
+#define DBG_HWID10_RD_EN_HI 26
+#define DBG_HWID10_RD_EN_SZ 1
+#define DBG_HWID11_RD_EN_MSK 0x08000000
+#define DBG_HWID11_RD_EN_I_MSK 0xf7ffffff
+#define DBG_HWID11_RD_EN_SFT 27
+#define DBG_HWID11_RD_EN_HI 27
+#define DBG_HWID11_RD_EN_SZ 1
+#define DBG_HWID12_RD_EN_MSK 0x10000000
+#define DBG_HWID12_RD_EN_I_MSK 0xefffffff
+#define DBG_HWID12_RD_EN_SFT 28
+#define DBG_HWID12_RD_EN_HI 28
+#define DBG_HWID12_RD_EN_SZ 1
+#define DBG_HWID13_RD_EN_MSK 0x20000000
+#define DBG_HWID13_RD_EN_I_MSK 0xdfffffff
+#define DBG_HWID13_RD_EN_SFT 29
+#define DBG_HWID13_RD_EN_HI 29
+#define DBG_HWID13_RD_EN_SZ 1
+#define DBG_HWID14_RD_EN_MSK 0x40000000
+#define DBG_HWID14_RD_EN_I_MSK 0xbfffffff
+#define DBG_HWID14_RD_EN_SFT 30
+#define DBG_HWID14_RD_EN_HI 30
+#define DBG_HWID14_RD_EN_SZ 1
+#define DBG_HWID15_RD_EN_MSK 0x80000000
+#define DBG_HWID15_RD_EN_I_MSK 0x7fffffff
+#define DBG_HWID15_RD_EN_SFT 31
+#define DBG_HWID15_RD_EN_HI 31
+#define DBG_HWID15_RD_EN_SZ 1
+#define MB_OUT_QUEUE_EN_MSK 0x00000002
+#define MB_OUT_QUEUE_EN_I_MSK 0xfffffffd
+#define MB_OUT_QUEUE_EN_SFT 1
+#define MB_OUT_QUEUE_EN_HI 1
+#define MB_OUT_QUEUE_EN_SZ 1
+#define CH0_QUEUE_FLUSH_MSK 0x00000001
+#define CH0_QUEUE_FLUSH_I_MSK 0xfffffffe
+#define CH0_QUEUE_FLUSH_SFT 0
+#define CH0_QUEUE_FLUSH_HI 0
+#define CH0_QUEUE_FLUSH_SZ 1
+#define CH1_QUEUE_FLUSH_MSK 0x00000002
+#define CH1_QUEUE_FLUSH_I_MSK 0xfffffffd
+#define CH1_QUEUE_FLUSH_SFT 1
+#define CH1_QUEUE_FLUSH_HI 1
+#define CH1_QUEUE_FLUSH_SZ 1
+#define CH2_QUEUE_FLUSH_MSK 0x00000004
+#define CH2_QUEUE_FLUSH_I_MSK 0xfffffffb
+#define CH2_QUEUE_FLUSH_SFT 2
+#define CH2_QUEUE_FLUSH_HI 2
+#define CH2_QUEUE_FLUSH_SZ 1
+#define CH3_QUEUE_FLUSH_MSK 0x00000008
+#define CH3_QUEUE_FLUSH_I_MSK 0xfffffff7
+#define CH3_QUEUE_FLUSH_SFT 3
+#define CH3_QUEUE_FLUSH_HI 3
+#define CH3_QUEUE_FLUSH_SZ 1
+#define CH4_QUEUE_FLUSH_MSK 0x00000010
+#define CH4_QUEUE_FLUSH_I_MSK 0xffffffef
+#define CH4_QUEUE_FLUSH_SFT 4
+#define CH4_QUEUE_FLUSH_HI 4
+#define CH4_QUEUE_FLUSH_SZ 1
+#define CH5_QUEUE_FLUSH_MSK 0x00000020
+#define CH5_QUEUE_FLUSH_I_MSK 0xffffffdf
+#define CH5_QUEUE_FLUSH_SFT 5
+#define CH5_QUEUE_FLUSH_HI 5
+#define CH5_QUEUE_FLUSH_SZ 1
+#define CH6_QUEUE_FLUSH_MSK 0x00000040
+#define CH6_QUEUE_FLUSH_I_MSK 0xffffffbf
+#define CH6_QUEUE_FLUSH_SFT 6
+#define CH6_QUEUE_FLUSH_HI 6
+#define CH6_QUEUE_FLUSH_SZ 1
+#define CH7_QUEUE_FLUSH_MSK 0x00000080
+#define CH7_QUEUE_FLUSH_I_MSK 0xffffff7f
+#define CH7_QUEUE_FLUSH_SFT 7
+#define CH7_QUEUE_FLUSH_HI 7
+#define CH7_QUEUE_FLUSH_SZ 1
+#define CH8_QUEUE_FLUSH_MSK 0x00000100
+#define CH8_QUEUE_FLUSH_I_MSK 0xfffffeff
+#define CH8_QUEUE_FLUSH_SFT 8
+#define CH8_QUEUE_FLUSH_HI 8
+#define CH8_QUEUE_FLUSH_SZ 1
+#define CH9_QUEUE_FLUSH_MSK 0x00000200
+#define CH9_QUEUE_FLUSH_I_MSK 0xfffffdff
+#define CH9_QUEUE_FLUSH_SFT 9
+#define CH9_QUEUE_FLUSH_HI 9
+#define CH9_QUEUE_FLUSH_SZ 1
+#define CH10_QUEUE_FLUSH_MSK 0x00000400
+#define CH10_QUEUE_FLUSH_I_MSK 0xfffffbff
+#define CH10_QUEUE_FLUSH_SFT 10
+#define CH10_QUEUE_FLUSH_HI 10
+#define CH10_QUEUE_FLUSH_SZ 1
+#define CH11_QUEUE_FLUSH_MSK 0x00000800
+#define CH11_QUEUE_FLUSH_I_MSK 0xfffff7ff
+#define CH11_QUEUE_FLUSH_SFT 11
+#define CH11_QUEUE_FLUSH_HI 11
+#define CH11_QUEUE_FLUSH_SZ 1
+#define CH12_QUEUE_FLUSH_MSK 0x00001000
+#define CH12_QUEUE_FLUSH_I_MSK 0xffffefff
+#define CH12_QUEUE_FLUSH_SFT 12
+#define CH12_QUEUE_FLUSH_HI 12
+#define CH12_QUEUE_FLUSH_SZ 1
+#define CH13_QUEUE_FLUSH_MSK 0x00002000
+#define CH13_QUEUE_FLUSH_I_MSK 0xffffdfff
+#define CH13_QUEUE_FLUSH_SFT 13
+#define CH13_QUEUE_FLUSH_HI 13
+#define CH13_QUEUE_FLUSH_SZ 1
+#define CH14_QUEUE_FLUSH_MSK 0x00004000
+#define CH14_QUEUE_FLUSH_I_MSK 0xffffbfff
+#define CH14_QUEUE_FLUSH_SFT 14
+#define CH14_QUEUE_FLUSH_HI 14
+#define CH14_QUEUE_FLUSH_SZ 1
+#define CH15_QUEUE_FLUSH_MSK 0x00008000
+#define CH15_QUEUE_FLUSH_I_MSK 0xffff7fff
+#define CH15_QUEUE_FLUSH_SFT 15
+#define CH15_QUEUE_FLUSH_HI 15
+#define CH15_QUEUE_FLUSH_SZ 1
+#define FFO0_CNT_MSK 0x0000001f
+#define FFO0_CNT_I_MSK 0xffffffe0
+#define FFO0_CNT_SFT 0
+#define FFO0_CNT_HI 4
+#define FFO0_CNT_SZ 5
+#define FFO1_CNT_MSK 0x000003e0
+#define FFO1_CNT_I_MSK 0xfffffc1f
+#define FFO1_CNT_SFT 5
+#define FFO1_CNT_HI 9
+#define FFO1_CNT_SZ 5
+#define FFO2_CNT_MSK 0x00000c00
+#define FFO2_CNT_I_MSK 0xfffff3ff
+#define FFO2_CNT_SFT 10
+#define FFO2_CNT_HI 11
+#define FFO2_CNT_SZ 2
+#define FFO3_CNT_MSK 0x000f8000
+#define FFO3_CNT_I_MSK 0xfff07fff
+#define FFO3_CNT_SFT 15
+#define FFO3_CNT_HI 19
+#define FFO3_CNT_SZ 5
+#define FFO4_CNT_MSK 0x00300000
+#define FFO4_CNT_I_MSK 0xffcfffff
+#define FFO4_CNT_SFT 20
+#define FFO4_CNT_HI 21
+#define FFO4_CNT_SZ 2
+#define FFO5_CNT_MSK 0x0e000000
+#define FFO5_CNT_I_MSK 0xf1ffffff
+#define FFO5_CNT_SFT 25
+#define FFO5_CNT_HI 27
+#define FFO5_CNT_SZ 3
+#define FFO6_CNT_MSK 0x0000000f
+#define FFO6_CNT_I_MSK 0xfffffff0
+#define FFO6_CNT_SFT 0
+#define FFO6_CNT_HI 3
+#define FFO6_CNT_SZ 4
+#define FFO7_CNT_MSK 0x000003e0
+#define FFO7_CNT_I_MSK 0xfffffc1f
+#define FFO7_CNT_SFT 5
+#define FFO7_CNT_HI 9
+#define FFO7_CNT_SZ 5
+#define FFO8_CNT_MSK 0x00007c00
+#define FFO8_CNT_I_MSK 0xffff83ff
+#define FFO8_CNT_SFT 10
+#define FFO8_CNT_HI 14
+#define FFO8_CNT_SZ 5
+#define FFO9_CNT_MSK 0x000f8000
+#define FFO9_CNT_I_MSK 0xfff07fff
+#define FFO9_CNT_SFT 15
+#define FFO9_CNT_HI 19
+#define FFO9_CNT_SZ 5
+#define FFO10_CNT_MSK 0x00f00000
+#define FFO10_CNT_I_MSK 0xff0fffff
+#define FFO10_CNT_SFT 20
+#define FFO10_CNT_HI 23
+#define FFO10_CNT_SZ 4
+#define FFO11_CNT_MSK 0x3e000000
+#define FFO11_CNT_I_MSK 0xc1ffffff
+#define FFO11_CNT_SFT 25
+#define FFO11_CNT_HI 29
+#define FFO11_CNT_SZ 5
+#define FFO12_CNT_MSK 0x00000007
+#define FFO12_CNT_I_MSK 0xfffffff8
+#define FFO12_CNT_SFT 0
+#define FFO12_CNT_HI 2
+#define FFO12_CNT_SZ 3
+#define FFO13_CNT_MSK 0x00000060
+#define FFO13_CNT_I_MSK 0xffffff9f
+#define FFO13_CNT_SFT 5
+#define FFO13_CNT_HI 6
+#define FFO13_CNT_SZ 2
+#define FFO14_CNT_MSK 0x00000c00
+#define FFO14_CNT_I_MSK 0xfffff3ff
+#define FFO14_CNT_SFT 10
+#define FFO14_CNT_HI 11
+#define FFO14_CNT_SZ 2
+#define FFO15_CNT_MSK 0x001f8000
+#define FFO15_CNT_I_MSK 0xffe07fff
+#define FFO15_CNT_SFT 15
+#define FFO15_CNT_HI 20
+#define FFO15_CNT_SZ 6
+#define CH0_FFO_FULL_MSK 0x00000001
+#define CH0_FFO_FULL_I_MSK 0xfffffffe
+#define CH0_FFO_FULL_SFT 0
+#define CH0_FFO_FULL_HI 0
+#define CH0_FFO_FULL_SZ 1
+#define CH1_FFO_FULL_MSK 0x00000002
+#define CH1_FFO_FULL_I_MSK 0xfffffffd
+#define CH1_FFO_FULL_SFT 1
+#define CH1_FFO_FULL_HI 1
+#define CH1_FFO_FULL_SZ 1
+#define CH2_FFO_FULL_MSK 0x00000004
+#define CH2_FFO_FULL_I_MSK 0xfffffffb
+#define CH2_FFO_FULL_SFT 2
+#define CH2_FFO_FULL_HI 2
+#define CH2_FFO_FULL_SZ 1
+#define CH3_FFO_FULL_MSK 0x00000008
+#define CH3_FFO_FULL_I_MSK 0xfffffff7
+#define CH3_FFO_FULL_SFT 3
+#define CH3_FFO_FULL_HI 3
+#define CH3_FFO_FULL_SZ 1
+#define CH4_FFO_FULL_MSK 0x00000010
+#define CH4_FFO_FULL_I_MSK 0xffffffef
+#define CH4_FFO_FULL_SFT 4
+#define CH4_FFO_FULL_HI 4
+#define CH4_FFO_FULL_SZ 1
+#define CH5_FFO_FULL_MSK 0x00000020
+#define CH5_FFO_FULL_I_MSK 0xffffffdf
+#define CH5_FFO_FULL_SFT 5
+#define CH5_FFO_FULL_HI 5
+#define CH5_FFO_FULL_SZ 1
+#define CH6_FFO_FULL_MSK 0x00000040
+#define CH6_FFO_FULL_I_MSK 0xffffffbf
+#define CH6_FFO_FULL_SFT 6
+#define CH6_FFO_FULL_HI 6
+#define CH6_FFO_FULL_SZ 1
+#define CH7_FFO_FULL_MSK 0x00000080
+#define CH7_FFO_FULL_I_MSK 0xffffff7f
+#define CH7_FFO_FULL_SFT 7
+#define CH7_FFO_FULL_HI 7
+#define CH7_FFO_FULL_SZ 1
+#define CH8_FFO_FULL_MSK 0x00000100
+#define CH8_FFO_FULL_I_MSK 0xfffffeff
+#define CH8_FFO_FULL_SFT 8
+#define CH8_FFO_FULL_HI 8
+#define CH8_FFO_FULL_SZ 1
+#define CH9_FFO_FULL_MSK 0x00000200
+#define CH9_FFO_FULL_I_MSK 0xfffffdff
+#define CH9_FFO_FULL_SFT 9
+#define CH9_FFO_FULL_HI 9
+#define CH9_FFO_FULL_SZ 1
+#define CH10_FFO_FULL_MSK 0x00000400
+#define CH10_FFO_FULL_I_MSK 0xfffffbff
+#define CH10_FFO_FULL_SFT 10
+#define CH10_FFO_FULL_HI 10
+#define CH10_FFO_FULL_SZ 1
+#define CH11_FFO_FULL_MSK 0x00000800
+#define CH11_FFO_FULL_I_MSK 0xfffff7ff
+#define CH11_FFO_FULL_SFT 11
+#define CH11_FFO_FULL_HI 11
+#define CH11_FFO_FULL_SZ 1
+#define CH12_FFO_FULL_MSK 0x00001000
+#define CH12_FFO_FULL_I_MSK 0xffffefff
+#define CH12_FFO_FULL_SFT 12
+#define CH12_FFO_FULL_HI 12
+#define CH12_FFO_FULL_SZ 1
+#define CH13_FFO_FULL_MSK 0x00002000
+#define CH13_FFO_FULL_I_MSK 0xffffdfff
+#define CH13_FFO_FULL_SFT 13
+#define CH13_FFO_FULL_HI 13
+#define CH13_FFO_FULL_SZ 1
+#define CH14_FFO_FULL_MSK 0x00004000
+#define CH14_FFO_FULL_I_MSK 0xffffbfff
+#define CH14_FFO_FULL_SFT 14
+#define CH14_FFO_FULL_HI 14
+#define CH14_FFO_FULL_SZ 1
+#define CH15_FFO_FULL_MSK 0x00008000
+#define CH15_FFO_FULL_I_MSK 0xffff7fff
+#define CH15_FFO_FULL_SFT 15
+#define CH15_FFO_FULL_HI 15
+#define CH15_FFO_FULL_SZ 1
+#define CH0_LOWTHOLD_INT_MSK 0x00000001
+#define CH0_LOWTHOLD_INT_I_MSK 0xfffffffe
+#define CH0_LOWTHOLD_INT_SFT 0
+#define CH0_LOWTHOLD_INT_HI 0
+#define CH0_LOWTHOLD_INT_SZ 1
+#define CH1_LOWTHOLD_INT_MSK 0x00000002
+#define CH1_LOWTHOLD_INT_I_MSK 0xfffffffd
+#define CH1_LOWTHOLD_INT_SFT 1
+#define CH1_LOWTHOLD_INT_HI 1
+#define CH1_LOWTHOLD_INT_SZ 1
+#define CH2_LOWTHOLD_INT_MSK 0x00000004
+#define CH2_LOWTHOLD_INT_I_MSK 0xfffffffb
+#define CH2_LOWTHOLD_INT_SFT 2
+#define CH2_LOWTHOLD_INT_HI 2
+#define CH2_LOWTHOLD_INT_SZ 1
+#define CH3_LOWTHOLD_INT_MSK 0x00000008
+#define CH3_LOWTHOLD_INT_I_MSK 0xfffffff7
+#define CH3_LOWTHOLD_INT_SFT 3
+#define CH3_LOWTHOLD_INT_HI 3
+#define CH3_LOWTHOLD_INT_SZ 1
+#define CH4_LOWTHOLD_INT_MSK 0x00000010
+#define CH4_LOWTHOLD_INT_I_MSK 0xffffffef
+#define CH4_LOWTHOLD_INT_SFT 4
+#define CH4_LOWTHOLD_INT_HI 4
+#define CH4_LOWTHOLD_INT_SZ 1
+#define CH5_LOWTHOLD_INT_MSK 0x00000020
+#define CH5_LOWTHOLD_INT_I_MSK 0xffffffdf
+#define CH5_LOWTHOLD_INT_SFT 5
+#define CH5_LOWTHOLD_INT_HI 5
+#define CH5_LOWTHOLD_INT_SZ 1
+#define CH6_LOWTHOLD_INT_MSK 0x00000040
+#define CH6_LOWTHOLD_INT_I_MSK 0xffffffbf
+#define CH6_LOWTHOLD_INT_SFT 6
+#define CH6_LOWTHOLD_INT_HI 6
+#define CH6_LOWTHOLD_INT_SZ 1
+#define CH7_LOWTHOLD_INT_MSK 0x00000080
+#define CH7_LOWTHOLD_INT_I_MSK 0xffffff7f
+#define CH7_LOWTHOLD_INT_SFT 7
+#define CH7_LOWTHOLD_INT_HI 7
+#define CH7_LOWTHOLD_INT_SZ 1
+#define CH8_LOWTHOLD_INT_MSK 0x00000100
+#define CH8_LOWTHOLD_INT_I_MSK 0xfffffeff
+#define CH8_LOWTHOLD_INT_SFT 8
+#define CH8_LOWTHOLD_INT_HI 8
+#define CH8_LOWTHOLD_INT_SZ 1
+#define CH9_LOWTHOLD_INT_MSK 0x00000200
+#define CH9_LOWTHOLD_INT_I_MSK 0xfffffdff
+#define CH9_LOWTHOLD_INT_SFT 9
+#define CH9_LOWTHOLD_INT_HI 9
+#define CH9_LOWTHOLD_INT_SZ 1
+#define CH10_LOWTHOLD_INT_MSK 0x00000400
+#define CH10_LOWTHOLD_INT_I_MSK 0xfffffbff
+#define CH10_LOWTHOLD_INT_SFT 10
+#define CH10_LOWTHOLD_INT_HI 10
+#define CH10_LOWTHOLD_INT_SZ 1
+#define CH11_LOWTHOLD_INT_MSK 0x00000800
+#define CH11_LOWTHOLD_INT_I_MSK 0xfffff7ff
+#define CH11_LOWTHOLD_INT_SFT 11
+#define CH11_LOWTHOLD_INT_HI 11
+#define CH11_LOWTHOLD_INT_SZ 1
+#define CH12_LOWTHOLD_INT_MSK 0x00001000
+#define CH12_LOWTHOLD_INT_I_MSK 0xffffefff
+#define CH12_LOWTHOLD_INT_SFT 12
+#define CH12_LOWTHOLD_INT_HI 12
+#define CH12_LOWTHOLD_INT_SZ 1
+#define CH13_LOWTHOLD_INT_MSK 0x00002000
+#define CH13_LOWTHOLD_INT_I_MSK 0xffffdfff
+#define CH13_LOWTHOLD_INT_SFT 13
+#define CH13_LOWTHOLD_INT_HI 13
+#define CH13_LOWTHOLD_INT_SZ 1
+#define CH14_LOWTHOLD_INT_MSK 0x00004000
+#define CH14_LOWTHOLD_INT_I_MSK 0xffffbfff
+#define CH14_LOWTHOLD_INT_SFT 14
+#define CH14_LOWTHOLD_INT_HI 14
+#define CH14_LOWTHOLD_INT_SZ 1
+#define CH15_LOWTHOLD_INT_MSK 0x00008000
+#define CH15_LOWTHOLD_INT_I_MSK 0xffff7fff
+#define CH15_LOWTHOLD_INT_SFT 15
+#define CH15_LOWTHOLD_INT_HI 15
+#define CH15_LOWTHOLD_INT_SZ 1
+#define MB_LOW_THOLD_EN_MSK 0x80000000
+#define MB_LOW_THOLD_EN_I_MSK 0x7fffffff
+#define MB_LOW_THOLD_EN_SFT 31
+#define MB_LOW_THOLD_EN_HI 31
+#define MB_LOW_THOLD_EN_SZ 1
+#define CH0_LOWTHOLD_MSK 0x0000001f
+#define CH0_LOWTHOLD_I_MSK 0xffffffe0
+#define CH0_LOWTHOLD_SFT 0
+#define CH0_LOWTHOLD_HI 4
+#define CH0_LOWTHOLD_SZ 5
+#define CH1_LOWTHOLD_MSK 0x00001f00
+#define CH1_LOWTHOLD_I_MSK 0xffffe0ff
+#define CH1_LOWTHOLD_SFT 8
+#define CH1_LOWTHOLD_HI 12
+#define CH1_LOWTHOLD_SZ 5
+#define CH2_LOWTHOLD_MSK 0x001f0000
+#define CH2_LOWTHOLD_I_MSK 0xffe0ffff
+#define CH2_LOWTHOLD_SFT 16
+#define CH2_LOWTHOLD_HI 20
+#define CH2_LOWTHOLD_SZ 5
+#define CH3_LOWTHOLD_MSK 0x1f000000
+#define CH3_LOWTHOLD_I_MSK 0xe0ffffff
+#define CH3_LOWTHOLD_SFT 24
+#define CH3_LOWTHOLD_HI 28
+#define CH3_LOWTHOLD_SZ 5
+#define CH4_LOWTHOLD_MSK 0x0000001f
+#define CH4_LOWTHOLD_I_MSK 0xffffffe0
+#define CH4_LOWTHOLD_SFT 0
+#define CH4_LOWTHOLD_HI 4
+#define CH4_LOWTHOLD_SZ 5
+#define CH5_LOWTHOLD_MSK 0x00001f00
+#define CH5_LOWTHOLD_I_MSK 0xffffe0ff
+#define CH5_LOWTHOLD_SFT 8
+#define CH5_LOWTHOLD_HI 12
+#define CH5_LOWTHOLD_SZ 5
+#define CH6_LOWTHOLD_MSK 0x001f0000
+#define CH6_LOWTHOLD_I_MSK 0xffe0ffff
+#define CH6_LOWTHOLD_SFT 16
+#define CH6_LOWTHOLD_HI 20
+#define CH6_LOWTHOLD_SZ 5
+#define CH7_LOWTHOLD_MSK 0x1f000000
+#define CH7_LOWTHOLD_I_MSK 0xe0ffffff
+#define CH7_LOWTHOLD_SFT 24
+#define CH7_LOWTHOLD_HI 28
+#define CH7_LOWTHOLD_SZ 5
+#define CH8_LOWTHOLD_MSK 0x0000001f
+#define CH8_LOWTHOLD_I_MSK 0xffffffe0
+#define CH8_LOWTHOLD_SFT 0
+#define CH8_LOWTHOLD_HI 4
+#define CH8_LOWTHOLD_SZ 5
+#define CH9_LOWTHOLD_MSK 0x00001f00
+#define CH9_LOWTHOLD_I_MSK 0xffffe0ff
+#define CH9_LOWTHOLD_SFT 8
+#define CH9_LOWTHOLD_HI 12
+#define CH9_LOWTHOLD_SZ 5
+#define CH10_LOWTHOLD_MSK 0x001f0000
+#define CH10_LOWTHOLD_I_MSK 0xffe0ffff
+#define CH10_LOWTHOLD_SFT 16
+#define CH10_LOWTHOLD_HI 20
+#define CH10_LOWTHOLD_SZ 5
+#define CH11_LOWTHOLD_MSK 0x1f000000
+#define CH11_LOWTHOLD_I_MSK 0xe0ffffff
+#define CH11_LOWTHOLD_SFT 24
+#define CH11_LOWTHOLD_HI 28
+#define CH11_LOWTHOLD_SZ 5
+#define CH12_LOWTHOLD_MSK 0x0000001f
+#define CH12_LOWTHOLD_I_MSK 0xffffffe0
+#define CH12_LOWTHOLD_SFT 0
+#define CH12_LOWTHOLD_HI 4
+#define CH12_LOWTHOLD_SZ 5
+#define CH13_LOWTHOLD_MSK 0x00001f00
+#define CH13_LOWTHOLD_I_MSK 0xffffe0ff
+#define CH13_LOWTHOLD_SFT 8
+#define CH13_LOWTHOLD_HI 12
+#define CH13_LOWTHOLD_SZ 5
+#define CH14_LOWTHOLD_MSK 0x001f0000
+#define CH14_LOWTHOLD_I_MSK 0xffe0ffff
+#define CH14_LOWTHOLD_SFT 16
+#define CH14_LOWTHOLD_HI 20
+#define CH14_LOWTHOLD_SZ 5
+#define CH15_LOWTHOLD_MSK 0x1f000000
+#define CH15_LOWTHOLD_I_MSK 0xe0ffffff
+#define CH15_LOWTHOLD_SFT 24
+#define CH15_LOWTHOLD_HI 28
+#define CH15_LOWTHOLD_SZ 5
+#define TRASH_TIMEOUT_EN_MSK 0x00000001
+#define TRASH_TIMEOUT_EN_I_MSK 0xfffffffe
+#define TRASH_TIMEOUT_EN_SFT 0
+#define TRASH_TIMEOUT_EN_HI 0
+#define TRASH_TIMEOUT_EN_SZ 1
+#define TRASH_CAN_INT_MSK 0x00000002
+#define TRASH_CAN_INT_I_MSK 0xfffffffd
+#define TRASH_CAN_INT_SFT 1
+#define TRASH_CAN_INT_HI 1
+#define TRASH_CAN_INT_SZ 1
+#define TRASH_INT_ID_MSK 0x000007f0
+#define TRASH_INT_ID_I_MSK 0xfffff80f
+#define TRASH_INT_ID_SFT 4
+#define TRASH_INT_ID_HI 10
+#define TRASH_INT_ID_SZ 7
+#define TRASH_TIMEOUT_MSK 0x03ff0000
+#define TRASH_TIMEOUT_I_MSK 0xfc00ffff
+#define TRASH_TIMEOUT_SFT 16
+#define TRASH_TIMEOUT_HI 25
+#define TRASH_TIMEOUT_SZ 10
+#define CH0_WRFF_FLUSH_MSK 0x00000001
+#define CH0_WRFF_FLUSH_I_MSK 0xfffffffe
+#define CH0_WRFF_FLUSH_SFT 0
+#define CH0_WRFF_FLUSH_HI 0
+#define CH0_WRFF_FLUSH_SZ 1
+#define CH1_WRFF_FLUSH_MSK 0x00000002
+#define CH1_WRFF_FLUSH_I_MSK 0xfffffffd
+#define CH1_WRFF_FLUSH_SFT 1
+#define CH1_WRFF_FLUSH_HI 1
+#define CH1_WRFF_FLUSH_SZ 1
+#define CH2_WRFF_FLUSH_MSK 0x00000004
+#define CH2_WRFF_FLUSH_I_MSK 0xfffffffb
+#define CH2_WRFF_FLUSH_SFT 2
+#define CH2_WRFF_FLUSH_HI 2
+#define CH2_WRFF_FLUSH_SZ 1
+#define CH3_WRFF_FLUSH_MSK 0x00000008
+#define CH3_WRFF_FLUSH_I_MSK 0xfffffff7
+#define CH3_WRFF_FLUSH_SFT 3
+#define CH3_WRFF_FLUSH_HI 3
+#define CH3_WRFF_FLUSH_SZ 1
+#define CH4_WRFF_FLUSH_MSK 0x00000010
+#define CH4_WRFF_FLUSH_I_MSK 0xffffffef
+#define CH4_WRFF_FLUSH_SFT 4
+#define CH4_WRFF_FLUSH_HI 4
+#define CH4_WRFF_FLUSH_SZ 1
+#define CH5_WRFF_FLUSH_MSK 0x00000020
+#define CH5_WRFF_FLUSH_I_MSK 0xffffffdf
+#define CH5_WRFF_FLUSH_SFT 5
+#define CH5_WRFF_FLUSH_HI 5
+#define CH5_WRFF_FLUSH_SZ 1
+#define CH6_WRFF_FLUSH_MSK 0x00000040
+#define CH6_WRFF_FLUSH_I_MSK 0xffffffbf
+#define CH6_WRFF_FLUSH_SFT 6
+#define CH6_WRFF_FLUSH_HI 6
+#define CH6_WRFF_FLUSH_SZ 1
+#define CH7_WRFF_FLUSH_MSK 0x00000080
+#define CH7_WRFF_FLUSH_I_MSK 0xffffff7f
+#define CH7_WRFF_FLUSH_SFT 7
+#define CH7_WRFF_FLUSH_HI 7
+#define CH7_WRFF_FLUSH_SZ 1
+#define CH8_WRFF_FLUSH_MSK 0x00000100
+#define CH8_WRFF_FLUSH_I_MSK 0xfffffeff
+#define CH8_WRFF_FLUSH_SFT 8
+#define CH8_WRFF_FLUSH_HI 8
+#define CH8_WRFF_FLUSH_SZ 1
+#define CH9_WRFF_FLUSH_MSK 0x00000200
+#define CH9_WRFF_FLUSH_I_MSK 0xfffffdff
+#define CH9_WRFF_FLUSH_SFT 9
+#define CH9_WRFF_FLUSH_HI 9
+#define CH9_WRFF_FLUSH_SZ 1
+#define CH10_WRFF_FLUSH_MSK 0x00000400
+#define CH10_WRFF_FLUSH_I_MSK 0xfffffbff
+#define CH10_WRFF_FLUSH_SFT 10
+#define CH10_WRFF_FLUSH_HI 10
+#define CH10_WRFF_FLUSH_SZ 1
+#define CH11_WRFF_FLUSH_MSK 0x00000800
+#define CH11_WRFF_FLUSH_I_MSK 0xfffff7ff
+#define CH11_WRFF_FLUSH_SFT 11
+#define CH11_WRFF_FLUSH_HI 11
+#define CH11_WRFF_FLUSH_SZ 1
+#define CH12_WRFF_FLUSH_MSK 0x00001000
+#define CH12_WRFF_FLUSH_I_MSK 0xffffefff
+#define CH12_WRFF_FLUSH_SFT 12
+#define CH12_WRFF_FLUSH_HI 12
+#define CH12_WRFF_FLUSH_SZ 1
+#define CH13_WRFF_FLUSH_MSK 0x00002000
+#define CH13_WRFF_FLUSH_I_MSK 0xffffdfff
+#define CH13_WRFF_FLUSH_SFT 13
+#define CH13_WRFF_FLUSH_HI 13
+#define CH13_WRFF_FLUSH_SZ 1
+#define CH14_WRFF_FLUSH_MSK 0x00004000
+#define CH14_WRFF_FLUSH_I_MSK 0xffffbfff
+#define CH14_WRFF_FLUSH_SFT 14
+#define CH14_WRFF_FLUSH_HI 14
+#define CH14_WRFF_FLUSH_SZ 1
+#define CPU_ID_TB2_MSK 0xffffffff
+#define CPU_ID_TB2_I_MSK 0x00000000
+#define CPU_ID_TB2_SFT 0
+#define CPU_ID_TB2_HI 31
+#define CPU_ID_TB2_SZ 32
+#define CPU_ID_TB3_MSK 0xffffffff
+#define CPU_ID_TB3_I_MSK 0x00000000
+#define CPU_ID_TB3_SFT 0
+#define CPU_ID_TB3_HI 31
+#define CPU_ID_TB3_SZ 32
+#define IQ_LOG_EN_MSK 0x00000001
+#define IQ_LOG_EN_I_MSK 0xfffffffe
+#define IQ_LOG_EN_SFT 0
+#define IQ_LOG_EN_HI 0
+#define IQ_LOG_EN_SZ 1
+#define IQ_LOG_STOP_MODE_MSK 0x00000001
+#define IQ_LOG_STOP_MODE_I_MSK 0xfffffffe
+#define IQ_LOG_STOP_MODE_SFT 0
+#define IQ_LOG_STOP_MODE_HI 0
+#define IQ_LOG_STOP_MODE_SZ 1
+#define GPIO_STOP_EN_MSK 0x00000010
+#define GPIO_STOP_EN_I_MSK 0xffffffef
+#define GPIO_STOP_EN_SFT 4
+#define GPIO_STOP_EN_HI 4
+#define GPIO_STOP_EN_SZ 1
+#define GPIO_STOP_POL_MSK 0x00000020
+#define GPIO_STOP_POL_I_MSK 0xffffffdf
+#define GPIO_STOP_POL_SFT 5
+#define GPIO_STOP_POL_HI 5
+#define GPIO_STOP_POL_SZ 1
+#define IQ_LOG_TIMER_MSK 0xffff0000
+#define IQ_LOG_TIMER_I_MSK 0x0000ffff
+#define IQ_LOG_TIMER_SFT 16
+#define IQ_LOG_TIMER_HI 31
+#define IQ_LOG_TIMER_SZ 16
+#define IQ_LOG_LEN_MSK 0x0000ffff
+#define IQ_LOG_LEN_I_MSK 0xffff0000
+#define IQ_LOG_LEN_SFT 0
+#define IQ_LOG_LEN_HI 15
+#define IQ_LOG_LEN_SZ 16
+#define IQ_LOG_TAIL_ADR_MSK 0x0000ffff
+#define IQ_LOG_TAIL_ADR_I_MSK 0xffff0000
+#define IQ_LOG_TAIL_ADR_SFT 0
+#define IQ_LOG_TAIL_ADR_HI 15
+#define IQ_LOG_TAIL_ADR_SZ 16
+#define ALC_LENG_MSK 0x0003ffff
+#define ALC_LENG_I_MSK 0xfffc0000
+#define ALC_LENG_SFT 0
+#define ALC_LENG_HI 17
+#define ALC_LENG_SZ 18
+#define CH0_DYN_PRI_MSK 0x00300000
+#define CH0_DYN_PRI_I_MSK 0xffcfffff
+#define CH0_DYN_PRI_SFT 20
+#define CH0_DYN_PRI_HI 21
+#define CH0_DYN_PRI_SZ 2
+#define MCU_PKTID_MSK 0xffffffff
+#define MCU_PKTID_I_MSK 0x00000000
+#define MCU_PKTID_SFT 0
+#define MCU_PKTID_HI 31
+#define MCU_PKTID_SZ 32
+#define CH0_STA_PRI_MSK 0x00000003
+#define CH0_STA_PRI_I_MSK 0xfffffffc
+#define CH0_STA_PRI_SFT 0
+#define CH0_STA_PRI_HI 1
+#define CH0_STA_PRI_SZ 2
+#define CH1_STA_PRI_MSK 0x00000030
+#define CH1_STA_PRI_I_MSK 0xffffffcf
+#define CH1_STA_PRI_SFT 4
+#define CH1_STA_PRI_HI 5
+#define CH1_STA_PRI_SZ 2
+#define CH2_STA_PRI_MSK 0x00000300
+#define CH2_STA_PRI_I_MSK 0xfffffcff
+#define CH2_STA_PRI_SFT 8
+#define CH2_STA_PRI_HI 9
+#define CH2_STA_PRI_SZ 2
+#define CH3_STA_PRI_MSK 0x00003000
+#define CH3_STA_PRI_I_MSK 0xffffcfff
+#define CH3_STA_PRI_SFT 12
+#define CH3_STA_PRI_HI 13
+#define CH3_STA_PRI_SZ 2
+#define ID_TB0_MSK 0xffffffff
+#define ID_TB0_I_MSK 0x00000000
+#define ID_TB0_SFT 0
+#define ID_TB0_HI 31
+#define ID_TB0_SZ 32
+#define ID_TB1_MSK 0xffffffff
+#define ID_TB1_I_MSK 0x00000000
+#define ID_TB1_SFT 0
+#define ID_TB1_HI 31
+#define ID_TB1_SZ 32
+#define ID_MNG_HALT_MSK 0x00000010
+#define ID_MNG_HALT_I_MSK 0xffffffef
+#define ID_MNG_HALT_SFT 4
+#define ID_MNG_HALT_HI 4
+#define ID_MNG_HALT_SZ 1
+#define ID_MNG_ERR_HALT_EN_MSK 0x00000020
+#define ID_MNG_ERR_HALT_EN_I_MSK 0xffffffdf
+#define ID_MNG_ERR_HALT_EN_SFT 5
+#define ID_MNG_ERR_HALT_EN_HI 5
+#define ID_MNG_ERR_HALT_EN_SZ 1
+#define ID_EXCEPT_FLG_CLR_MSK 0x00000040
+#define ID_EXCEPT_FLG_CLR_I_MSK 0xffffffbf
+#define ID_EXCEPT_FLG_CLR_SFT 6
+#define ID_EXCEPT_FLG_CLR_HI 6
+#define ID_EXCEPT_FLG_CLR_SZ 1
+#define ID_EXCEPT_FLG_MSK 0x00000080
+#define ID_EXCEPT_FLG_I_MSK 0xffffff7f
+#define ID_EXCEPT_FLG_SFT 7
+#define ID_EXCEPT_FLG_HI 7
+#define ID_EXCEPT_FLG_SZ 1
+#define ID_FULL_MSK 0x00000001
+#define ID_FULL_I_MSK 0xfffffffe
+#define ID_FULL_SFT 0
+#define ID_FULL_HI 0
+#define ID_FULL_SZ 1
+#define ID_MNG_BUSY_MSK 0x00000002
+#define ID_MNG_BUSY_I_MSK 0xfffffffd
+#define ID_MNG_BUSY_SFT 1
+#define ID_MNG_BUSY_HI 1
+#define ID_MNG_BUSY_SZ 1
+#define REQ_LOCK_MSK 0x00000004
+#define REQ_LOCK_I_MSK 0xfffffffb
+#define REQ_LOCK_SFT 2
+#define REQ_LOCK_HI 2
+#define REQ_LOCK_SZ 1
+#define CH0_REQ_LOCK_MSK 0x00000010
+#define CH0_REQ_LOCK_I_MSK 0xffffffef
+#define CH0_REQ_LOCK_SFT 4
+#define CH0_REQ_LOCK_HI 4
+#define CH0_REQ_LOCK_SZ 1
+#define CH1_REQ_LOCK_MSK 0x00000020
+#define CH1_REQ_LOCK_I_MSK 0xffffffdf
+#define CH1_REQ_LOCK_SFT 5
+#define CH1_REQ_LOCK_HI 5
+#define CH1_REQ_LOCK_SZ 1
+#define CH2_REQ_LOCK_MSK 0x00000040
+#define CH2_REQ_LOCK_I_MSK 0xffffffbf
+#define CH2_REQ_LOCK_SFT 6
+#define CH2_REQ_LOCK_HI 6
+#define CH2_REQ_LOCK_SZ 1
+#define CH3_REQ_LOCK_MSK 0x00000080
+#define CH3_REQ_LOCK_I_MSK 0xffffff7f
+#define CH3_REQ_LOCK_SFT 7
+#define CH3_REQ_LOCK_HI 7
+#define CH3_REQ_LOCK_SZ 1
+#define REQ_LOCK_INT_EN_MSK 0x00000100
+#define REQ_LOCK_INT_EN_I_MSK 0xfffffeff
+#define REQ_LOCK_INT_EN_SFT 8
+#define REQ_LOCK_INT_EN_HI 8
+#define REQ_LOCK_INT_EN_SZ 1
+#define REQ_LOCK_INT_MSK 0x00000200
+#define REQ_LOCK_INT_I_MSK 0xfffffdff
+#define REQ_LOCK_INT_SFT 9
+#define REQ_LOCK_INT_HI 9
+#define REQ_LOCK_INT_SZ 1
+#define MCU_ALC_READY_MSK 0x00000001
+#define MCU_ALC_READY_I_MSK 0xfffffffe
+#define MCU_ALC_READY_SFT 0
+#define MCU_ALC_READY_HI 0
+#define MCU_ALC_READY_SZ 1
+#define ALC_FAIL_MSK 0x00000002
+#define ALC_FAIL_I_MSK 0xfffffffd
+#define ALC_FAIL_SFT 1
+#define ALC_FAIL_HI 1
+#define ALC_FAIL_SZ 1
+#define ALC_BUSY_MSK 0x00000004
+#define ALC_BUSY_I_MSK 0xfffffffb
+#define ALC_BUSY_SFT 2
+#define ALC_BUSY_HI 2
+#define ALC_BUSY_SZ 1
+#define CH0_NVLD_MSK 0x00000010
+#define CH0_NVLD_I_MSK 0xffffffef
+#define CH0_NVLD_SFT 4
+#define CH0_NVLD_HI 4
+#define CH0_NVLD_SZ 1
+#define CH1_NVLD_MSK 0x00000020
+#define CH1_NVLD_I_MSK 0xffffffdf
+#define CH1_NVLD_SFT 5
+#define CH1_NVLD_HI 5
+#define CH1_NVLD_SZ 1
+#define CH2_NVLD_MSK 0x00000040
+#define CH2_NVLD_I_MSK 0xffffffbf
+#define CH2_NVLD_SFT 6
+#define CH2_NVLD_HI 6
+#define CH2_NVLD_SZ 1
+#define CH3_NVLD_MSK 0x00000080
+#define CH3_NVLD_I_MSK 0xffffff7f
+#define CH3_NVLD_SFT 7
+#define CH3_NVLD_HI 7
+#define CH3_NVLD_SZ 1
+#define ALC_INT_ID_MSK 0x00007f00
+#define ALC_INT_ID_I_MSK 0xffff80ff
+#define ALC_INT_ID_SFT 8
+#define ALC_INT_ID_HI 14
+#define ALC_INT_ID_SZ 7
+#define ALC_TIMEOUT_MSK 0x03ff0000
+#define ALC_TIMEOUT_I_MSK 0xfc00ffff
+#define ALC_TIMEOUT_SFT 16
+#define ALC_TIMEOUT_HI 25
+#define ALC_TIMEOUT_SZ 10
+#define ALC_TIMEOUT_INT_EN_MSK 0x40000000
+#define ALC_TIMEOUT_INT_EN_I_MSK 0xbfffffff
+#define ALC_TIMEOUT_INT_EN_SFT 30
+#define ALC_TIMEOUT_INT_EN_HI 30
+#define ALC_TIMEOUT_INT_EN_SZ 1
+#define ALC_TIMEOUT_INT_MSK 0x80000000
+#define ALC_TIMEOUT_INT_I_MSK 0x7fffffff
+#define ALC_TIMEOUT_INT_SFT 31
+#define ALC_TIMEOUT_INT_HI 31
+#define ALC_TIMEOUT_INT_SZ 1
+#define TX_ID_COUNT_MSK 0x000000ff
+#define TX_ID_COUNT_I_MSK 0xffffff00
+#define TX_ID_COUNT_SFT 0
+#define TX_ID_COUNT_HI 7
+#define TX_ID_COUNT_SZ 8
+#define RX_ID_COUNT_MSK 0x0000ff00
+#define RX_ID_COUNT_I_MSK 0xffff00ff
+#define RX_ID_COUNT_SFT 8
+#define RX_ID_COUNT_HI 15
+#define RX_ID_COUNT_SZ 8
+#define TX_ID_THOLD_MSK 0x000000ff
+#define TX_ID_THOLD_I_MSK 0xffffff00
+#define TX_ID_THOLD_SFT 0
+#define TX_ID_THOLD_HI 7
+#define TX_ID_THOLD_SZ 8
+#define RX_ID_THOLD_MSK 0x0000ff00
+#define RX_ID_THOLD_I_MSK 0xffff00ff
+#define RX_ID_THOLD_SFT 8
+#define RX_ID_THOLD_HI 15
+#define RX_ID_THOLD_SZ 8
+#define ID_THOLD_RX_INT_MSK 0x00010000
+#define ID_THOLD_RX_INT_I_MSK 0xfffeffff
+#define ID_THOLD_RX_INT_SFT 16
+#define ID_THOLD_RX_INT_HI 16
+#define ID_THOLD_RX_INT_SZ 1
+#define RX_INT_CH_MSK 0x000e0000
+#define RX_INT_CH_I_MSK 0xfff1ffff
+#define RX_INT_CH_SFT 17
+#define RX_INT_CH_HI 19
+#define RX_INT_CH_SZ 3
+#define ID_THOLD_TX_INT_MSK 0x00100000
+#define ID_THOLD_TX_INT_I_MSK 0xffefffff
+#define ID_THOLD_TX_INT_SFT 20
+#define ID_THOLD_TX_INT_HI 20
+#define ID_THOLD_TX_INT_SZ 1
+#define TX_INT_CH_MSK 0x00e00000
+#define TX_INT_CH_I_MSK 0xff1fffff
+#define TX_INT_CH_SFT 21
+#define TX_INT_CH_HI 23
+#define TX_INT_CH_SZ 3
+#define ID_THOLD_INT_EN_MSK 0x01000000
+#define ID_THOLD_INT_EN_I_MSK 0xfeffffff
+#define ID_THOLD_INT_EN_SFT 24
+#define ID_THOLD_INT_EN_HI 24
+#define ID_THOLD_INT_EN_SZ 1
+#define TX_ID_TB0_MSK 0xffffffff
+#define TX_ID_TB0_I_MSK 0x00000000
+#define TX_ID_TB0_SFT 0
+#define TX_ID_TB0_HI 31
+#define TX_ID_TB0_SZ 32
+#define TX_ID_TB1_MSK 0xffffffff
+#define TX_ID_TB1_I_MSK 0x00000000
+#define TX_ID_TB1_SFT 0
+#define TX_ID_TB1_HI 31
+#define TX_ID_TB1_SZ 32
+#define RX_ID_TB0_MSK 0xffffffff
+#define RX_ID_TB0_I_MSK 0x00000000
+#define RX_ID_TB0_SFT 0
+#define RX_ID_TB0_HI 31
+#define RX_ID_TB0_SZ 32
+#define RX_ID_TB1_MSK 0xffffffff
+#define RX_ID_TB1_I_MSK 0x00000000
+#define RX_ID_TB1_SFT 0
+#define RX_ID_TB1_HI 31
+#define RX_ID_TB1_SZ 32
+#define DOUBLE_RLS_INT_EN_MSK 0x00000001
+#define DOUBLE_RLS_INT_EN_I_MSK 0xfffffffe
+#define DOUBLE_RLS_INT_EN_SFT 0
+#define DOUBLE_RLS_INT_EN_HI 0
+#define DOUBLE_RLS_INT_EN_SZ 1
+#define ID_DOUBLE_RLS_INT_MSK 0x00000002
+#define ID_DOUBLE_RLS_INT_I_MSK 0xfffffffd
+#define ID_DOUBLE_RLS_INT_SFT 1
+#define ID_DOUBLE_RLS_INT_HI 1
+#define ID_DOUBLE_RLS_INT_SZ 1
+#define DOUBLE_RLS_ID_MSK 0x00007f00
+#define DOUBLE_RLS_ID_I_MSK 0xffff80ff
+#define DOUBLE_RLS_ID_SFT 8
+#define DOUBLE_RLS_ID_HI 14
+#define DOUBLE_RLS_ID_SZ 7
+#define ID_LEN_THOLD_INT_EN_MSK 0x00000001
+#define ID_LEN_THOLD_INT_EN_I_MSK 0xfffffffe
+#define ID_LEN_THOLD_INT_EN_SFT 0
+#define ID_LEN_THOLD_INT_EN_HI 0
+#define ID_LEN_THOLD_INT_EN_SZ 1
+#define ALL_ID_LEN_THOLD_INT_MSK 0x00000002
+#define ALL_ID_LEN_THOLD_INT_I_MSK 0xfffffffd
+#define ALL_ID_LEN_THOLD_INT_SFT 1
+#define ALL_ID_LEN_THOLD_INT_HI 1
+#define ALL_ID_LEN_THOLD_INT_SZ 1
+#define TX_ID_LEN_THOLD_INT_MSK 0x00000004
+#define TX_ID_LEN_THOLD_INT_I_MSK 0xfffffffb
+#define TX_ID_LEN_THOLD_INT_SFT 2
+#define TX_ID_LEN_THOLD_INT_HI 2
+#define TX_ID_LEN_THOLD_INT_SZ 1
+#define RX_ID_LEN_THOLD_INT_MSK 0x00000008
+#define RX_ID_LEN_THOLD_INT_I_MSK 0xfffffff7
+#define RX_ID_LEN_THOLD_INT_SFT 3
+#define RX_ID_LEN_THOLD_INT_HI 3
+#define RX_ID_LEN_THOLD_INT_SZ 1
+#define ID_TX_LEN_THOLD_MSK 0x00001ff0
+#define ID_TX_LEN_THOLD_I_MSK 0xffffe00f
+#define ID_TX_LEN_THOLD_SFT 4
+#define ID_TX_LEN_THOLD_HI 12
+#define ID_TX_LEN_THOLD_SZ 9
+#define ID_RX_LEN_THOLD_MSK 0x003fe000
+#define ID_RX_LEN_THOLD_I_MSK 0xffc01fff
+#define ID_RX_LEN_THOLD_SFT 13
+#define ID_RX_LEN_THOLD_HI 21
+#define ID_RX_LEN_THOLD_SZ 9
+#define ID_LEN_THOLD_MSK 0x7fc00000
+#define ID_LEN_THOLD_I_MSK 0x803fffff
+#define ID_LEN_THOLD_SFT 22
+#define ID_LEN_THOLD_HI 30
+#define ID_LEN_THOLD_SZ 9
+#define ALL_ID_ALC_LEN_MSK 0x000001ff
+#define ALL_ID_ALC_LEN_I_MSK 0xfffffe00
+#define ALL_ID_ALC_LEN_SFT 0
+#define ALL_ID_ALC_LEN_HI 8
+#define ALL_ID_ALC_LEN_SZ 9
+#define TX_ID_ALC_LEN_MSK 0x0003fe00
+#define TX_ID_ALC_LEN_I_MSK 0xfffc01ff
+#define TX_ID_ALC_LEN_SFT 9
+#define TX_ID_ALC_LEN_HI 17
+#define TX_ID_ALC_LEN_SZ 9
+#define RX_ID_ALC_LEN_MSK 0x07fc0000
+#define RX_ID_ALC_LEN_I_MSK 0xf803ffff
+#define RX_ID_ALC_LEN_SFT 18
+#define RX_ID_ALC_LEN_HI 26
+#define RX_ID_ALC_LEN_SZ 9
+#define CH_ARB_EN_MSK 0x00000001
+#define CH_ARB_EN_I_MSK 0xfffffffe
+#define CH_ARB_EN_SFT 0
+#define CH_ARB_EN_HI 0
+#define CH_ARB_EN_SZ 1
+#define CH_PRI1_MSK 0x00000030
+#define CH_PRI1_I_MSK 0xffffffcf
+#define CH_PRI1_SFT 4
+#define CH_PRI1_HI 5
+#define CH_PRI1_SZ 2
+#define CH_PRI2_MSK 0x00000300
+#define CH_PRI2_I_MSK 0xfffffcff
+#define CH_PRI2_SFT 8
+#define CH_PRI2_HI 9
+#define CH_PRI2_SZ 2
+#define CH_PRI3_MSK 0x00003000
+#define CH_PRI3_I_MSK 0xffffcfff
+#define CH_PRI3_SFT 12
+#define CH_PRI3_HI 13
+#define CH_PRI3_SZ 2
+#define CH_PRI4_MSK 0x00030000
+#define CH_PRI4_I_MSK 0xfffcffff
+#define CH_PRI4_SFT 16
+#define CH_PRI4_HI 17
+#define CH_PRI4_SZ 2
+#define TX_ID_REMAIN_MSK 0x0000007f
+#define TX_ID_REMAIN_I_MSK 0xffffff80
+#define TX_ID_REMAIN_SFT 0
+#define TX_ID_REMAIN_HI 6
+#define TX_ID_REMAIN_SZ 7
+#define TX_PAGE_REMAIN_MSK 0x0001ff00
+#define TX_PAGE_REMAIN_I_MSK 0xfffe00ff
+#define TX_PAGE_REMAIN_SFT 8
+#define TX_PAGE_REMAIN_HI 16
+#define TX_PAGE_REMAIN_SZ 9
+#define ID_PAGE_MAX_SIZE_MSK 0x000001ff
+#define ID_PAGE_MAX_SIZE_I_MSK 0xfffffe00
+#define ID_PAGE_MAX_SIZE_SFT 0
+#define ID_PAGE_MAX_SIZE_HI 8
+#define ID_PAGE_MAX_SIZE_SZ 9
+#define TX_PAGE_LIMIT_MSK 0x000001ff
+#define TX_PAGE_LIMIT_I_MSK 0xfffffe00
+#define TX_PAGE_LIMIT_SFT 0
+#define TX_PAGE_LIMIT_HI 8
+#define TX_PAGE_LIMIT_SZ 9
+#define TX_COUNT_LIMIT_MSK 0x00ff0000
+#define TX_COUNT_LIMIT_I_MSK 0xff00ffff
+#define TX_COUNT_LIMIT_SFT 16
+#define TX_COUNT_LIMIT_HI 23
+#define TX_COUNT_LIMIT_SZ 8
+#define TX_LIMIT_INT_MSK 0x40000000
+#define TX_LIMIT_INT_I_MSK 0xbfffffff
+#define TX_LIMIT_INT_SFT 30
+#define TX_LIMIT_INT_HI 30
+#define TX_LIMIT_INT_SZ 1
+#define TX_LIMIT_INT_EN_MSK 0x80000000
+#define TX_LIMIT_INT_EN_I_MSK 0x7fffffff
+#define TX_LIMIT_INT_EN_SFT 31
+#define TX_LIMIT_INT_EN_HI 31
+#define TX_LIMIT_INT_EN_SZ 1
+#define TX_PAGE_USE_7_0_MSK 0x000000ff
+#define TX_PAGE_USE_7_0_I_MSK 0xffffff00
+#define TX_PAGE_USE_7_0_SFT 0
+#define TX_PAGE_USE_7_0_HI 7
+#define TX_PAGE_USE_7_0_SZ 8
+#define TX_ID_USE_5_0_MSK 0x00003f00
+#define TX_ID_USE_5_0_I_MSK 0xffffc0ff
+#define TX_ID_USE_5_0_SFT 8
+#define TX_ID_USE_5_0_HI 13
+#define TX_ID_USE_5_0_SZ 6
+#define EDCA0_FFO_CNT_MSK 0x0003c000
+#define EDCA0_FFO_CNT_I_MSK 0xfffc3fff
+#define EDCA0_FFO_CNT_SFT 14
+#define EDCA0_FFO_CNT_HI 17
+#define EDCA0_FFO_CNT_SZ 4
+#define EDCA1_FFO_CNT_3_0_MSK 0x003c0000
+#define EDCA1_FFO_CNT_3_0_I_MSK 0xffc3ffff
+#define EDCA1_FFO_CNT_3_0_SFT 18
+#define EDCA1_FFO_CNT_3_0_HI 21
+#define EDCA1_FFO_CNT_3_0_SZ 4
+#define EDCA2_FFO_CNT_MSK 0x07c00000
+#define EDCA2_FFO_CNT_I_MSK 0xf83fffff
+#define EDCA2_FFO_CNT_SFT 22
+#define EDCA2_FFO_CNT_HI 26
+#define EDCA2_FFO_CNT_SZ 5
+#define EDCA3_FFO_CNT_MSK 0xf8000000
+#define EDCA3_FFO_CNT_I_MSK 0x07ffffff
+#define EDCA3_FFO_CNT_SFT 27
+#define EDCA3_FFO_CNT_HI 31
+#define EDCA3_FFO_CNT_SZ 5
+#define ID_TB2_MSK 0xffffffff
+#define ID_TB2_I_MSK 0x00000000
+#define ID_TB2_SFT 0
+#define ID_TB2_HI 31
+#define ID_TB2_SZ 32
+#define ID_TB3_MSK 0xffffffff
+#define ID_TB3_I_MSK 0x00000000
+#define ID_TB3_SFT 0
+#define ID_TB3_HI 31
+#define ID_TB3_SZ 32
+#define TX_ID_TB2_MSK 0xffffffff
+#define TX_ID_TB2_I_MSK 0x00000000
+#define TX_ID_TB2_SFT 0
+#define TX_ID_TB2_HI 31
+#define TX_ID_TB2_SZ 32
+#define TX_ID_TB3_MSK 0xffffffff
+#define TX_ID_TB3_I_MSK 0x00000000
+#define TX_ID_TB3_SFT 0
+#define TX_ID_TB3_HI 31
+#define TX_ID_TB3_SZ 32
+#define RX_ID_TB2_MSK 0xffffffff
+#define RX_ID_TB2_I_MSK 0x00000000
+#define RX_ID_TB2_SFT 0
+#define RX_ID_TB2_HI 31
+#define RX_ID_TB2_SZ 32
+#define RX_ID_TB3_MSK 0xffffffff
+#define RX_ID_TB3_I_MSK 0x00000000
+#define RX_ID_TB3_SFT 0
+#define RX_ID_TB3_HI 31
+#define RX_ID_TB3_SZ 32
+#define TX_PAGE_USE2_MSK 0x000001ff
+#define TX_PAGE_USE2_I_MSK 0xfffffe00
+#define TX_PAGE_USE2_SFT 0
+#define TX_PAGE_USE2_HI 8
+#define TX_PAGE_USE2_SZ 9
+#define TX_ID_USE2_MSK 0x0001fe00
+#define TX_ID_USE2_I_MSK 0xfffe01ff
+#define TX_ID_USE2_SFT 9
+#define TX_ID_USE2_HI 16
+#define TX_ID_USE2_SZ 8
+#define EDCA4_FFO_CNT_MSK 0x001e0000
+#define EDCA4_FFO_CNT_I_MSK 0xffe1ffff
+#define EDCA4_FFO_CNT_SFT 17
+#define EDCA4_FFO_CNT_HI 20
+#define EDCA4_FFO_CNT_SZ 4
+#define TX_PAGE_USE3_MSK 0x000001ff
+#define TX_PAGE_USE3_I_MSK 0xfffffe00
+#define TX_PAGE_USE3_SFT 0
+#define TX_PAGE_USE3_HI 8
+#define TX_PAGE_USE3_SZ 9
+#define TX_ID_USE3_MSK 0x0001fe00
+#define TX_ID_USE3_I_MSK 0xfffe01ff
+#define TX_ID_USE3_SFT 9
+#define TX_ID_USE3_HI 16
+#define TX_ID_USE3_SZ 8
+#define EDCA1_FFO_CNT2_MSK 0x03e00000
+#define EDCA1_FFO_CNT2_I_MSK 0xfc1fffff
+#define EDCA1_FFO_CNT2_SFT 21
+#define EDCA1_FFO_CNT2_HI 25
+#define EDCA1_FFO_CNT2_SZ 5
+#define EDCA4_FFO_CNT2_MSK 0x3c000000
+#define EDCA4_FFO_CNT2_I_MSK 0xc3ffffff
+#define EDCA4_FFO_CNT2_SFT 26
+#define EDCA4_FFO_CNT2_HI 29
+#define EDCA4_FFO_CNT2_SZ 4
+#define TX_PAGE_USE4_MSK 0x000001ff
+#define TX_PAGE_USE4_I_MSK 0xfffffe00
+#define TX_PAGE_USE4_SFT 0
+#define TX_PAGE_USE4_HI 8
+#define TX_PAGE_USE4_SZ 9
+#define TX_ID_USE4_MSK 0x0001fe00
+#define TX_ID_USE4_I_MSK 0xfffe01ff
+#define TX_ID_USE4_SFT 9
+#define TX_ID_USE4_HI 16
+#define TX_ID_USE4_SZ 8
+#define EDCA2_FFO_CNT2_MSK 0x003e0000
+#define EDCA2_FFO_CNT2_I_MSK 0xffc1ffff
+#define EDCA2_FFO_CNT2_SFT 17
+#define EDCA2_FFO_CNT2_HI 21
+#define EDCA2_FFO_CNT2_SZ 5
+#define EDCA3_FFO_CNT2_MSK 0x07c00000
+#define EDCA3_FFO_CNT2_I_MSK 0xf83fffff
+#define EDCA3_FFO_CNT2_SFT 22
+#define EDCA3_FFO_CNT2_HI 26
+#define EDCA3_FFO_CNT2_SZ 5
+#define TX_ID_IFO_LEN_MSK 0x000001ff
+#define TX_ID_IFO_LEN_I_MSK 0xfffffe00
+#define TX_ID_IFO_LEN_SFT 0
+#define TX_ID_IFO_LEN_HI 8
+#define TX_ID_IFO_LEN_SZ 9
+#define RX_ID_IFO_LEN_MSK 0x01ff0000
+#define RX_ID_IFO_LEN_I_MSK 0xfe00ffff
+#define RX_ID_IFO_LEN_SFT 16
+#define RX_ID_IFO_LEN_HI 24
+#define RX_ID_IFO_LEN_SZ 9
+#define MAX_ALL_ALC_ID_CNT_MSK 0x000000ff
+#define MAX_ALL_ALC_ID_CNT_I_MSK 0xffffff00
+#define MAX_ALL_ALC_ID_CNT_SFT 0
+#define MAX_ALL_ALC_ID_CNT_HI 7
+#define MAX_ALL_ALC_ID_CNT_SZ 8
+#define MAX_TX_ALC_ID_CNT_MSK 0x0000ff00
+#define MAX_TX_ALC_ID_CNT_I_MSK 0xffff00ff
+#define MAX_TX_ALC_ID_CNT_SFT 8
+#define MAX_TX_ALC_ID_CNT_HI 15
+#define MAX_TX_ALC_ID_CNT_SZ 8
+#define MAX_RX_ALC_ID_CNT_MSK 0x00ff0000
+#define MAX_RX_ALC_ID_CNT_I_MSK 0xff00ffff
+#define MAX_RX_ALC_ID_CNT_SFT 16
+#define MAX_RX_ALC_ID_CNT_HI 23
+#define MAX_RX_ALC_ID_CNT_SZ 8
+#define MAX_ALL_ID_ALC_LEN_MSK 0x000001ff
+#define MAX_ALL_ID_ALC_LEN_I_MSK 0xfffffe00
+#define MAX_ALL_ID_ALC_LEN_SFT 0
+#define MAX_ALL_ID_ALC_LEN_HI 8
+#define MAX_ALL_ID_ALC_LEN_SZ 9
+#define MAX_TX_ID_ALC_LEN_MSK 0x0003fe00
+#define MAX_TX_ID_ALC_LEN_I_MSK 0xfffc01ff
+#define MAX_TX_ID_ALC_LEN_SFT 9
+#define MAX_TX_ID_ALC_LEN_HI 17
+#define MAX_TX_ID_ALC_LEN_SZ 9
+#define MAX_RX_ID_ALC_LEN_MSK 0x07fc0000
+#define MAX_RX_ID_ALC_LEN_I_MSK 0xf803ffff
+#define MAX_RX_ID_ALC_LEN_SFT 18
+#define MAX_RX_ID_ALC_LEN_HI 26
+#define MAX_RX_ID_ALC_LEN_SZ 9
+#define RG_PMDLBK_MSK 0x00000001
+#define RG_PMDLBK_I_MSK 0xfffffffe
+#define RG_PMDLBK_SFT 0
+#define RG_PMDLBK_HI 0
+#define RG_PMDLBK_SZ 1
+#define RG_RDYACK_SEL_MSK 0x00000006
+#define RG_RDYACK_SEL_I_MSK 0xfffffff9
+#define RG_RDYACK_SEL_SFT 1
+#define RG_RDYACK_SEL_HI 2
+#define RG_RDYACK_SEL_SZ 2
+#define RG_ADEDGE_SEL_MSK 0x00000008
+#define RG_ADEDGE_SEL_I_MSK 0xfffffff7
+#define RG_ADEDGE_SEL_SFT 3
+#define RG_ADEDGE_SEL_HI 3
+#define RG_ADEDGE_SEL_SZ 1
+#define RG_SIGN_SWAP_MSK 0x00000010
+#define RG_SIGN_SWAP_I_MSK 0xffffffef
+#define RG_SIGN_SWAP_SFT 4
+#define RG_SIGN_SWAP_HI 4
+#define RG_SIGN_SWAP_SZ 1
+#define RG_IQ_SWAP_MSK 0x00000020
+#define RG_IQ_SWAP_I_MSK 0xffffffdf
+#define RG_IQ_SWAP_SFT 5
+#define RG_IQ_SWAP_HI 5
+#define RG_IQ_SWAP_SZ 1
+#define RG_Q_INV_MSK 0x00000040
+#define RG_Q_INV_I_MSK 0xffffffbf
+#define RG_Q_INV_SFT 6
+#define RG_Q_INV_HI 6
+#define RG_Q_INV_SZ 1
+#define RG_I_INV_MSK 0x00000080
+#define RG_I_INV_I_MSK 0xffffff7f
+#define RG_I_INV_SFT 7
+#define RG_I_INV_HI 7
+#define RG_I_INV_SZ 1
+#define RG_BYPASS_ACI_MSK 0x00000100
+#define RG_BYPASS_ACI_I_MSK 0xfffffeff
+#define RG_BYPASS_ACI_SFT 8
+#define RG_BYPASS_ACI_HI 8
+#define RG_BYPASS_ACI_SZ 1
+#define RG_LBK_ANA_PATH_MSK 0x00000200
+#define RG_LBK_ANA_PATH_I_MSK 0xfffffdff
+#define RG_LBK_ANA_PATH_SFT 9
+#define RG_LBK_ANA_PATH_HI 9
+#define RG_LBK_ANA_PATH_SZ 1
+#define RG_SPECTRUM_LEAKY_FACTOR_MSK 0x00000c00
+#define RG_SPECTRUM_LEAKY_FACTOR_I_MSK 0xfffff3ff
+#define RG_SPECTRUM_LEAKY_FACTOR_SFT 10
+#define RG_SPECTRUM_LEAKY_FACTOR_HI 11
+#define RG_SPECTRUM_LEAKY_FACTOR_SZ 2
+#define RG_SPECTRUM_BW_MSK 0x00003000
+#define RG_SPECTRUM_BW_I_MSK 0xffffcfff
+#define RG_SPECTRUM_BW_SFT 12
+#define RG_SPECTRUM_BW_HI 13
+#define RG_SPECTRUM_BW_SZ 2
+#define RG_SPECTRUM_FREQ_MANUAL_MSK 0x00004000
+#define RG_SPECTRUM_FREQ_MANUAL_I_MSK 0xffffbfff
+#define RG_SPECTRUM_FREQ_MANUAL_SFT 14
+#define RG_SPECTRUM_FREQ_MANUAL_HI 14
+#define RG_SPECTRUM_FREQ_MANUAL_SZ 1
+#define RG_SPECTRUM_EN_MSK 0x00008000
+#define RG_SPECTRUM_EN_I_MSK 0xffff7fff
+#define RG_SPECTRUM_EN_SFT 15
+#define RG_SPECTRUM_EN_HI 15
+#define RG_SPECTRUM_EN_SZ 1
+#define RG_TXPWRLVL_SET_MSK 0x00ff0000
+#define RG_TXPWRLVL_SET_I_MSK 0xff00ffff
+#define RG_TXPWRLVL_SET_SFT 16
+#define RG_TXPWRLVL_SET_HI 23
+#define RG_TXPWRLVL_SET_SZ 8
+#define RG_TXPWRLVL_SEL_MSK 0x01000000
+#define RG_TXPWRLVL_SEL_I_MSK 0xfeffffff
+#define RG_TXPWRLVL_SEL_SFT 24
+#define RG_TXPWRLVL_SEL_HI 24
+#define RG_TXPWRLVL_SEL_SZ 1
+#define RG_RF_BB_CLK_SEL_MSK 0x80000000
+#define RG_RF_BB_CLK_SEL_I_MSK 0x7fffffff
+#define RG_RF_BB_CLK_SEL_SFT 31
+#define RG_RF_BB_CLK_SEL_HI 31
+#define RG_RF_BB_CLK_SEL_SZ 1
+#define RG_PHY_MD_EN_MSK 0x00000001
+#define RG_PHY_MD_EN_I_MSK 0xfffffffe
+#define RG_PHY_MD_EN_SFT 0
+#define RG_PHY_MD_EN_HI 0
+#define RG_PHY_MD_EN_SZ 1
+#define RG_PHYRX_MD_EN_MSK 0x00000002
+#define RG_PHYRX_MD_EN_I_MSK 0xfffffffd
+#define RG_PHYRX_MD_EN_SFT 1
+#define RG_PHYRX_MD_EN_HI 1
+#define RG_PHYRX_MD_EN_SZ 1
+#define RG_PHYTX_MD_EN_MSK 0x00000004
+#define RG_PHYTX_MD_EN_I_MSK 0xfffffffb
+#define RG_PHYTX_MD_EN_SFT 2
+#define RG_PHYTX_MD_EN_HI 2
+#define RG_PHYTX_MD_EN_SZ 1
+#define RG_PHY11GN_MD_EN_MSK 0x00000008
+#define RG_PHY11GN_MD_EN_I_MSK 0xfffffff7
+#define RG_PHY11GN_MD_EN_SFT 3
+#define RG_PHY11GN_MD_EN_HI 3
+#define RG_PHY11GN_MD_EN_SZ 1
+#define RG_PHY11B_MD_EN_MSK 0x00000010
+#define RG_PHY11B_MD_EN_I_MSK 0xffffffef
+#define RG_PHY11B_MD_EN_SFT 4
+#define RG_PHY11B_MD_EN_HI 4
+#define RG_PHY11B_MD_EN_SZ 1
+#define RG_PHYRXFIFO_MD_EN_MSK 0x00000020
+#define RG_PHYRXFIFO_MD_EN_I_MSK 0xffffffdf
+#define RG_PHYRXFIFO_MD_EN_SFT 5
+#define RG_PHYRXFIFO_MD_EN_HI 5
+#define RG_PHYRXFIFO_MD_EN_SZ 1
+#define RG_PHYTXFIFO_MD_EN_MSK 0x00000040
+#define RG_PHYTXFIFO_MD_EN_I_MSK 0xffffffbf
+#define RG_PHYTXFIFO_MD_EN_SFT 6
+#define RG_PHYTXFIFO_MD_EN_HI 6
+#define RG_PHYTXFIFO_MD_EN_SZ 1
+#define RG_PHY11BGN_MD_EN_MSK 0x00000100
+#define RG_PHY11BGN_MD_EN_I_MSK 0xfffffeff
+#define RG_PHY11BGN_MD_EN_SFT 8
+#define RG_PHY11BGN_MD_EN_HI 8
+#define RG_PHY11BGN_MD_EN_SZ 1
+#define RG_FORCE_11GN_EN_MSK 0x00001000
+#define RG_FORCE_11GN_EN_I_MSK 0xffffefff
+#define RG_FORCE_11GN_EN_SFT 12
+#define RG_FORCE_11GN_EN_HI 12
+#define RG_FORCE_11GN_EN_SZ 1
+#define RG_FORCE_11B_EN_MSK 0x00002000
+#define RG_FORCE_11B_EN_I_MSK 0xffffdfff
+#define RG_FORCE_11B_EN_SFT 13
+#define RG_FORCE_11B_EN_HI 13
+#define RG_FORCE_11B_EN_SZ 1
+#define RG_FFT_MEM_CLK_EN_RX_MSK 0x00004000
+#define RG_FFT_MEM_CLK_EN_RX_I_MSK 0xffffbfff
+#define RG_FFT_MEM_CLK_EN_RX_SFT 14
+#define RG_FFT_MEM_CLK_EN_RX_HI 14
+#define RG_FFT_MEM_CLK_EN_RX_SZ 1
+#define RG_FFT_MEM_CLK_EN_TX_MSK 0x00008000
+#define RG_FFT_MEM_CLK_EN_TX_I_MSK 0xffff7fff
+#define RG_FFT_MEM_CLK_EN_TX_SFT 15
+#define RG_FFT_MEM_CLK_EN_TX_HI 15
+#define RG_FFT_MEM_CLK_EN_TX_SZ 1
+#define RG_PHY_IQ_TRIG_SEL_MSK 0x000f0000
+#define RG_PHY_IQ_TRIG_SEL_I_MSK 0xfff0ffff
+#define RG_PHY_IQ_TRIG_SEL_SFT 16
+#define RG_PHY_IQ_TRIG_SEL_HI 19
+#define RG_PHY_IQ_TRIG_SEL_SZ 4
+#define RG_SPECTRUM_FREQ_MSK 0x3ff00000
+#define RG_SPECTRUM_FREQ_I_MSK 0xc00fffff
+#define RG_SPECTRUM_FREQ_SFT 20
+#define RG_SPECTRUM_FREQ_HI 29
+#define RG_SPECTRUM_FREQ_SZ 10
+#define SVN_VERSION_MSK 0xffffffff
+#define SVN_VERSION_I_MSK 0x00000000
+#define SVN_VERSION_SFT 0
+#define SVN_VERSION_HI 31
+#define SVN_VERSION_SZ 32
+#define RG_LENGTH_MSK 0x0000ffff
+#define RG_LENGTH_I_MSK 0xffff0000
+#define RG_LENGTH_SFT 0
+#define RG_LENGTH_HI 15
+#define RG_LENGTH_SZ 16
+#define RG_PKT_MODE_MSK 0x00070000
+#define RG_PKT_MODE_I_MSK 0xfff8ffff
+#define RG_PKT_MODE_SFT 16
+#define RG_PKT_MODE_HI 18
+#define RG_PKT_MODE_SZ 3
+#define RG_CH_BW_MSK 0x00380000
+#define RG_CH_BW_I_MSK 0xffc7ffff
+#define RG_CH_BW_SFT 19
+#define RG_CH_BW_HI 21
+#define RG_CH_BW_SZ 3
+#define RG_PRM_MSK 0x00400000
+#define RG_PRM_I_MSK 0xffbfffff
+#define RG_PRM_SFT 22
+#define RG_PRM_HI 22
+#define RG_PRM_SZ 1
+#define RG_SHORTGI_MSK 0x00800000
+#define RG_SHORTGI_I_MSK 0xff7fffff
+#define RG_SHORTGI_SFT 23
+#define RG_SHORTGI_HI 23
+#define RG_SHORTGI_SZ 1
+#define RG_RATE_MSK 0x7f000000
+#define RG_RATE_I_MSK 0x80ffffff
+#define RG_RATE_SFT 24
+#define RG_RATE_HI 30
+#define RG_RATE_SZ 7
+#define RG_L_LENGTH_MSK 0x00000fff
+#define RG_L_LENGTH_I_MSK 0xfffff000
+#define RG_L_LENGTH_SFT 0
+#define RG_L_LENGTH_HI 11
+#define RG_L_LENGTH_SZ 12
+#define RG_L_RATE_MSK 0x00007000
+#define RG_L_RATE_I_MSK 0xffff8fff
+#define RG_L_RATE_SFT 12
+#define RG_L_RATE_HI 14
+#define RG_L_RATE_SZ 3
+#define RG_SERVICE_MSK 0xffff0000
+#define RG_SERVICE_I_MSK 0x0000ffff
+#define RG_SERVICE_SFT 16
+#define RG_SERVICE_HI 31
+#define RG_SERVICE_SZ 16
+#define RG_SMOOTHING_MSK 0x00000001
+#define RG_SMOOTHING_I_MSK 0xfffffffe
+#define RG_SMOOTHING_SFT 0
+#define RG_SMOOTHING_HI 0
+#define RG_SMOOTHING_SZ 1
+#define RG_NO_SOUND_MSK 0x00000002
+#define RG_NO_SOUND_I_MSK 0xfffffffd
+#define RG_NO_SOUND_SFT 1
+#define RG_NO_SOUND_HI 1
+#define RG_NO_SOUND_SZ 1
+#define RG_AGGREGATE_MSK 0x00000004
+#define RG_AGGREGATE_I_MSK 0xfffffffb
+#define RG_AGGREGATE_SFT 2
+#define RG_AGGREGATE_HI 2
+#define RG_AGGREGATE_SZ 1
+#define RG_STBC_MSK 0x00000018
+#define RG_STBC_I_MSK 0xffffffe7
+#define RG_STBC_SFT 3
+#define RG_STBC_HI 4
+#define RG_STBC_SZ 2
+#define RG_FEC_MSK 0x00000020
+#define RG_FEC_I_MSK 0xffffffdf
+#define RG_FEC_SFT 5
+#define RG_FEC_HI 5
+#define RG_FEC_SZ 1
+#define RG_N_ESS_MSK 0x000000c0
+#define RG_N_ESS_I_MSK 0xffffff3f
+#define RG_N_ESS_SFT 6
+#define RG_N_ESS_HI 7
+#define RG_N_ESS_SZ 2
+#define RG_TXPWRLVL_MSK 0x0000ff00
+#define RG_TXPWRLVL_I_MSK 0xffff00ff
+#define RG_TXPWRLVL_SFT 8
+#define RG_TXPWRLVL_HI 15
+#define RG_TXPWRLVL_SZ 8
+#define RG_TX_START_MSK 0x00000001
+#define RG_TX_START_I_MSK 0xfffffffe
+#define RG_TX_START_SFT 0
+#define RG_TX_START_HI 0
+#define RG_TX_START_SZ 1
+#define RG_IFS_TIME_MSK 0x000000fc
+#define RG_IFS_TIME_I_MSK 0xffffff03
+#define RG_IFS_TIME_SFT 2
+#define RG_IFS_TIME_HI 7
+#define RG_IFS_TIME_SZ 6
+#define RG_CONTINUOUS_DATA_MSK 0x00000100
+#define RG_CONTINUOUS_DATA_I_MSK 0xfffffeff
+#define RG_CONTINUOUS_DATA_SFT 8
+#define RG_CONTINUOUS_DATA_HI 8
+#define RG_CONTINUOUS_DATA_SZ 1
+#define RG_DATA_SEL_MSK 0x00000600
+#define RG_DATA_SEL_I_MSK 0xfffff9ff
+#define RG_DATA_SEL_SFT 9
+#define RG_DATA_SEL_HI 10
+#define RG_DATA_SEL_SZ 2
+#define RG_TX_D_MSK 0x00ff0000
+#define RG_TX_D_I_MSK 0xff00ffff
+#define RG_TX_D_SFT 16
+#define RG_TX_D_HI 23
+#define RG_TX_D_SZ 8
+#define RG_TX_CNT_TARGET_MSK 0xffffffff
+#define RG_TX_CNT_TARGET_I_MSK 0x00000000
+#define RG_TX_CNT_TARGET_SFT 0
+#define RG_TX_CNT_TARGET_HI 31
+#define RG_TX_CNT_TARGET_SZ 32
+#define RG_FFT_IFFT_MODE_MSK 0x000000c0
+#define RG_FFT_IFFT_MODE_I_MSK 0xffffff3f
+#define RG_FFT_IFFT_MODE_SFT 6
+#define RG_FFT_IFFT_MODE_HI 7
+#define RG_FFT_IFFT_MODE_SZ 2
+#define RG_DAC_DBG_MODE_MSK 0x00000100
+#define RG_DAC_DBG_MODE_I_MSK 0xfffffeff
+#define RG_DAC_DBG_MODE_SFT 8
+#define RG_DAC_DBG_MODE_HI 8
+#define RG_DAC_DBG_MODE_SZ 1
+#define RG_DAC_SGN_SWAP_MSK 0x00000200
+#define RG_DAC_SGN_SWAP_I_MSK 0xfffffdff
+#define RG_DAC_SGN_SWAP_SFT 9
+#define RG_DAC_SGN_SWAP_HI 9
+#define RG_DAC_SGN_SWAP_SZ 1
+#define RG_TXD_SEL_MSK 0x00000c00
+#define RG_TXD_SEL_I_MSK 0xfffff3ff
+#define RG_TXD_SEL_SFT 10
+#define RG_TXD_SEL_HI 11
+#define RG_TXD_SEL_SZ 2
+#define RG_UP8X_MSK 0x00ff0000
+#define RG_UP8X_I_MSK 0xff00ffff
+#define RG_UP8X_SFT 16
+#define RG_UP8X_HI 23
+#define RG_UP8X_SZ 8
+#define RG_IQ_DC_BYP_MSK 0x01000000
+#define RG_IQ_DC_BYP_I_MSK 0xfeffffff
+#define RG_IQ_DC_BYP_SFT 24
+#define RG_IQ_DC_BYP_HI 24
+#define RG_IQ_DC_BYP_SZ 1
+#define RG_IQ_DC_LEAKY_FACTOR_MSK 0x30000000
+#define RG_IQ_DC_LEAKY_FACTOR_I_MSK 0xcfffffff
+#define RG_IQ_DC_LEAKY_FACTOR_SFT 28
+#define RG_IQ_DC_LEAKY_FACTOR_HI 29
+#define RG_IQ_DC_LEAKY_FACTOR_SZ 2
+#define RG_DAC_DCEN_MSK 0x00000001
+#define RG_DAC_DCEN_I_MSK 0xfffffffe
+#define RG_DAC_DCEN_SFT 0
+#define RG_DAC_DCEN_HI 0
+#define RG_DAC_DCEN_SZ 1
+#define RG_DAC_DCQ_MSK 0x00003ff0
+#define RG_DAC_DCQ_I_MSK 0xffffc00f
+#define RG_DAC_DCQ_SFT 4
+#define RG_DAC_DCQ_HI 13
+#define RG_DAC_DCQ_SZ 10
+#define RG_DAC_DCI_MSK 0x03ff0000
+#define RG_DAC_DCI_I_MSK 0xfc00ffff
+#define RG_DAC_DCI_SFT 16
+#define RG_DAC_DCI_HI 25
+#define RG_DAC_DCI_SZ 10
+#define RG_PGA_REFDB_SAT_MSK 0x0000007f
+#define RG_PGA_REFDB_SAT_I_MSK 0xffffff80
+#define RG_PGA_REFDB_SAT_SFT 0
+#define RG_PGA_REFDB_SAT_HI 6
+#define RG_PGA_REFDB_SAT_SZ 7
+#define RG_PGA_REFDB_TOP_MSK 0x00007f00
+#define RG_PGA_REFDB_TOP_I_MSK 0xffff80ff
+#define RG_PGA_REFDB_TOP_SFT 8
+#define RG_PGA_REFDB_TOP_HI 14
+#define RG_PGA_REFDB_TOP_SZ 7
+#define RG_PGA_REF_UND_MSK 0x03ff0000
+#define RG_PGA_REF_UND_I_MSK 0xfc00ffff
+#define RG_PGA_REF_UND_SFT 16
+#define RG_PGA_REF_UND_HI 25
+#define RG_PGA_REF_UND_SZ 10
+#define RG_RF_REF_SAT_MSK 0xf0000000
+#define RG_RF_REF_SAT_I_MSK 0x0fffffff
+#define RG_RF_REF_SAT_SFT 28
+#define RG_RF_REF_SAT_HI 31
+#define RG_RF_REF_SAT_SZ 4
+#define RG_PGAGC_SET_MSK 0x0000000f
+#define RG_PGAGC_SET_I_MSK 0xfffffff0
+#define RG_PGAGC_SET_SFT 0
+#define RG_PGAGC_SET_HI 3
+#define RG_PGAGC_SET_SZ 4
+#define RG_PGAGC_OW_MSK 0x00000010
+#define RG_PGAGC_OW_I_MSK 0xffffffef
+#define RG_PGAGC_OW_SFT 4
+#define RG_PGAGC_OW_HI 4
+#define RG_PGAGC_OW_SZ 1
+#define RG_RFGC_SET_MSK 0x00000060
+#define RG_RFGC_SET_I_MSK 0xffffff9f
+#define RG_RFGC_SET_SFT 5
+#define RG_RFGC_SET_HI 6
+#define RG_RFGC_SET_SZ 2
+#define RG_RFGC_OW_MSK 0x00000080
+#define RG_RFGC_OW_I_MSK 0xffffff7f
+#define RG_RFGC_OW_SFT 7
+#define RG_RFGC_OW_HI 7
+#define RG_RFGC_OW_SZ 1
+#define RG_WAIT_T_RXAGC_MSK 0x00003f00
+#define RG_WAIT_T_RXAGC_I_MSK 0xffffc0ff
+#define RG_WAIT_T_RXAGC_SFT 8
+#define RG_WAIT_T_RXAGC_HI 13
+#define RG_WAIT_T_RXAGC_SZ 6
+#define RG_RXAGC_SET_MSK 0x00004000
+#define RG_RXAGC_SET_I_MSK 0xffffbfff
+#define RG_RXAGC_SET_SFT 14
+#define RG_RXAGC_SET_HI 14
+#define RG_RXAGC_SET_SZ 1
+#define RG_RXAGC_OW_MSK 0x00008000
+#define RG_RXAGC_OW_I_MSK 0xffff7fff
+#define RG_RXAGC_OW_SFT 15
+#define RG_RXAGC_OW_HI 15
+#define RG_RXAGC_OW_SZ 1
+#define RG_WAIT_T_FINAL_MSK 0x003f0000
+#define RG_WAIT_T_FINAL_I_MSK 0xffc0ffff
+#define RG_WAIT_T_FINAL_SFT 16
+#define RG_WAIT_T_FINAL_HI 21
+#define RG_WAIT_T_FINAL_SZ 6
+#define RG_WAIT_T_MSK 0x3f000000
+#define RG_WAIT_T_I_MSK 0xc0ffffff
+#define RG_WAIT_T_SFT 24
+#define RG_WAIT_T_HI 29
+#define RG_WAIT_T_SZ 6
+#define RG_ULG_PGA_SAT_PGA_GAIN_MSK 0x0000000f
+#define RG_ULG_PGA_SAT_PGA_GAIN_I_MSK 0xfffffff0
+#define RG_ULG_PGA_SAT_PGA_GAIN_SFT 0
+#define RG_ULG_PGA_SAT_PGA_GAIN_HI 3
+#define RG_ULG_PGA_SAT_PGA_GAIN_SZ 4
+#define RG_LG_PGA_UND_PGA_GAIN_MSK 0x000000f0
+#define RG_LG_PGA_UND_PGA_GAIN_I_MSK 0xffffff0f
+#define RG_LG_PGA_UND_PGA_GAIN_SFT 4
+#define RG_LG_PGA_UND_PGA_GAIN_HI 7
+#define RG_LG_PGA_UND_PGA_GAIN_SZ 4
+#define RG_LG_PGA_SAT_PGA_GAIN_MSK 0x00000f00
+#define RG_LG_PGA_SAT_PGA_GAIN_I_MSK 0xfffff0ff
+#define RG_LG_PGA_SAT_PGA_GAIN_SFT 8
+#define RG_LG_PGA_SAT_PGA_GAIN_HI 11
+#define RG_LG_PGA_SAT_PGA_GAIN_SZ 4
+#define RG_LG_RF_SAT_PGA_GAIN_MSK 0x0000f000
+#define RG_LG_RF_SAT_PGA_GAIN_I_MSK 0xffff0fff
+#define RG_LG_RF_SAT_PGA_GAIN_SFT 12
+#define RG_LG_RF_SAT_PGA_GAIN_HI 15
+#define RG_LG_RF_SAT_PGA_GAIN_SZ 4
+#define RG_MG_RF_SAT_PGANOREF_PGA_GAIN_MSK 0x000f0000
+#define RG_MG_RF_SAT_PGANOREF_PGA_GAIN_I_MSK 0xfff0ffff
+#define RG_MG_RF_SAT_PGANOREF_PGA_GAIN_SFT 16
+#define RG_MG_RF_SAT_PGANOREF_PGA_GAIN_HI 19
+#define RG_MG_RF_SAT_PGANOREF_PGA_GAIN_SZ 4
+#define RG_HG_PGA_SAT2_PGA_GAIN_MSK 0x00f00000
+#define RG_HG_PGA_SAT2_PGA_GAIN_I_MSK 0xff0fffff
+#define RG_HG_PGA_SAT2_PGA_GAIN_SFT 20
+#define RG_HG_PGA_SAT2_PGA_GAIN_HI 23
+#define RG_HG_PGA_SAT2_PGA_GAIN_SZ 4
+#define RG_HG_PGA_SAT1_PGA_GAIN_MSK 0x0f000000
+#define RG_HG_PGA_SAT1_PGA_GAIN_I_MSK 0xf0ffffff
+#define RG_HG_PGA_SAT1_PGA_GAIN_SFT 24
+#define RG_HG_PGA_SAT1_PGA_GAIN_HI 27
+#define RG_HG_PGA_SAT1_PGA_GAIN_SZ 4
+#define RG_HG_RF_SAT_PGA_GAIN_MSK 0xf0000000
+#define RG_HG_RF_SAT_PGA_GAIN_I_MSK 0x0fffffff
+#define RG_HG_RF_SAT_PGA_GAIN_SFT 28
+#define RG_HG_RF_SAT_PGA_GAIN_HI 31
+#define RG_HG_RF_SAT_PGA_GAIN_SZ 4
+#define RG_MG_PGA_JB_TH_MSK 0x0000000f
+#define RG_MG_PGA_JB_TH_I_MSK 0xfffffff0
+#define RG_MG_PGA_JB_TH_SFT 0
+#define RG_MG_PGA_JB_TH_HI 3
+#define RG_MG_PGA_JB_TH_SZ 4
+#define RG_MA_PGA_LOW_TH_CNT_LMT_MSK 0x001f0000
+#define RG_MA_PGA_LOW_TH_CNT_LMT_I_MSK 0xffe0ffff
+#define RG_MA_PGA_LOW_TH_CNT_LMT_SFT 16
+#define RG_MA_PGA_LOW_TH_CNT_LMT_HI 20
+#define RG_MA_PGA_LOW_TH_CNT_LMT_SZ 5
+#define RG_WR_RFGC_INIT_SET_MSK 0x00600000
+#define RG_WR_RFGC_INIT_SET_I_MSK 0xff9fffff
+#define RG_WR_RFGC_INIT_SET_SFT 21
+#define RG_WR_RFGC_INIT_SET_HI 22
+#define RG_WR_RFGC_INIT_SET_SZ 2
+#define RG_WR_RFGC_INIT_EN_MSK 0x00800000
+#define RG_WR_RFGC_INIT_EN_I_MSK 0xff7fffff
+#define RG_WR_RFGC_INIT_EN_SFT 23
+#define RG_WR_RFGC_INIT_EN_HI 23
+#define RG_WR_RFGC_INIT_EN_SZ 1
+#define RG_MA_PGA_HIGH_TH_CNT_LMT_MSK 0x1f000000
+#define RG_MA_PGA_HIGH_TH_CNT_LMT_I_MSK 0xe0ffffff
+#define RG_MA_PGA_HIGH_TH_CNT_LMT_SFT 24
+#define RG_MA_PGA_HIGH_TH_CNT_LMT_HI 28
+#define RG_MA_PGA_HIGH_TH_CNT_LMT_SZ 5
+#define RG_AGC_THRESHOLD_MSK 0x00003fff
+#define RG_AGC_THRESHOLD_I_MSK 0xffffc000
+#define RG_AGC_THRESHOLD_SFT 0
+#define RG_AGC_THRESHOLD_HI 13
+#define RG_AGC_THRESHOLD_SZ 14
+#define RG_ACI_POINT_CNT_LMT_11B_MSK 0x007f0000
+#define RG_ACI_POINT_CNT_LMT_11B_I_MSK 0xff80ffff
+#define RG_ACI_POINT_CNT_LMT_11B_SFT 16
+#define RG_ACI_POINT_CNT_LMT_11B_HI 22
+#define RG_ACI_POINT_CNT_LMT_11B_SZ 7
+#define RG_ACI_DAGC_LEAKY_FACTOR_11B_MSK 0x03000000
+#define RG_ACI_DAGC_LEAKY_FACTOR_11B_I_MSK 0xfcffffff
+#define RG_ACI_DAGC_LEAKY_FACTOR_11B_SFT 24
+#define RG_ACI_DAGC_LEAKY_FACTOR_11B_HI 25
+#define RG_ACI_DAGC_LEAKY_FACTOR_11B_SZ 2
+#define RG_WR_ACI_GAIN_INI_SEL_11B_MSK 0x000000ff
+#define RG_WR_ACI_GAIN_INI_SEL_11B_I_MSK 0xffffff00
+#define RG_WR_ACI_GAIN_INI_SEL_11B_SFT 0
+#define RG_WR_ACI_GAIN_INI_SEL_11B_HI 7
+#define RG_WR_ACI_GAIN_INI_SEL_11B_SZ 8
+#define RG_WR_ACI_GAIN_SEL_11B_MSK 0x0000ff00
+#define RG_WR_ACI_GAIN_SEL_11B_I_MSK 0xffff00ff
+#define RG_WR_ACI_GAIN_SEL_11B_SFT 8
+#define RG_WR_ACI_GAIN_SEL_11B_HI 15
+#define RG_WR_ACI_GAIN_SEL_11B_SZ 8
+#define RG_ACI_DAGC_SET_VALUE_11B_MSK 0x007f0000
+#define RG_ACI_DAGC_SET_VALUE_11B_I_MSK 0xff80ffff
+#define RG_ACI_DAGC_SET_VALUE_11B_SFT 16
+#define RG_ACI_DAGC_SET_VALUE_11B_HI 22
+#define RG_ACI_DAGC_SET_VALUE_11B_SZ 7
+#define RG_WR_ACI_GAIN_OW_11B_MSK 0x80000000
+#define RG_WR_ACI_GAIN_OW_11B_I_MSK 0x7fffffff
+#define RG_WR_ACI_GAIN_OW_11B_SFT 31
+#define RG_WR_ACI_GAIN_OW_11B_HI 31
+#define RG_WR_ACI_GAIN_OW_11B_SZ 1
+#define RG_ACI_POINT_CNT_LMT_11GN_MSK 0x000000ff
+#define RG_ACI_POINT_CNT_LMT_11GN_I_MSK 0xffffff00
+#define RG_ACI_POINT_CNT_LMT_11GN_SFT 0
+#define RG_ACI_POINT_CNT_LMT_11GN_HI 7
+#define RG_ACI_POINT_CNT_LMT_11GN_SZ 8
+#define RG_ACI_DAGC_LEAKY_FACTOR_11GN_MSK 0x00000300
+#define RG_ACI_DAGC_LEAKY_FACTOR_11GN_I_MSK 0xfffffcff
+#define RG_ACI_DAGC_LEAKY_FACTOR_11GN_SFT 8
+#define RG_ACI_DAGC_LEAKY_FACTOR_11GN_HI 9
+#define RG_ACI_DAGC_LEAKY_FACTOR_11GN_SZ 2
+#define RG_ACI_DAGC_DONE_CNT_LMT_11GN_MSK 0xff000000
+#define RG_ACI_DAGC_DONE_CNT_LMT_11GN_I_MSK 0x00ffffff
+#define RG_ACI_DAGC_DONE_CNT_LMT_11GN_SFT 24
+#define RG_ACI_DAGC_DONE_CNT_LMT_11GN_HI 31
+#define RG_ACI_DAGC_DONE_CNT_LMT_11GN_SZ 8
+#define RG_ACI_DAGC_SET_VALUE_11GN_MSK 0x0000007f
+#define RG_ACI_DAGC_SET_VALUE_11GN_I_MSK 0xffffff80
+#define RG_ACI_DAGC_SET_VALUE_11GN_SFT 0
+#define RG_ACI_DAGC_SET_VALUE_11GN_HI 6
+#define RG_ACI_DAGC_SET_VALUE_11GN_SZ 7
+#define RG_ACI_GAIN_INI_VAL_11GN_MSK 0x0000ff00
+#define RG_ACI_GAIN_INI_VAL_11GN_I_MSK 0xffff00ff
+#define RG_ACI_GAIN_INI_VAL_11GN_SFT 8
+#define RG_ACI_GAIN_INI_VAL_11GN_HI 15
+#define RG_ACI_GAIN_INI_VAL_11GN_SZ 8
+#define RG_ACI_GAIN_OW_VAL_11GN_MSK 0x00ff0000
+#define RG_ACI_GAIN_OW_VAL_11GN_I_MSK 0xff00ffff
+#define RG_ACI_GAIN_OW_VAL_11GN_SFT 16
+#define RG_ACI_GAIN_OW_VAL_11GN_HI 23
+#define RG_ACI_GAIN_OW_VAL_11GN_SZ 8
+#define RG_ACI_GAIN_OW_11GN_MSK 0x80000000
+#define RG_ACI_GAIN_OW_11GN_I_MSK 0x7fffffff
+#define RG_ACI_GAIN_OW_11GN_SFT 31
+#define RG_ACI_GAIN_OW_11GN_HI 31
+#define RG_ACI_GAIN_OW_11GN_SZ 1
+#define RO_CCA_PWR_MA_11GN_MSK 0x0000007f
+#define RO_CCA_PWR_MA_11GN_I_MSK 0xffffff80
+#define RO_CCA_PWR_MA_11GN_SFT 0
+#define RO_CCA_PWR_MA_11GN_HI 6
+#define RO_CCA_PWR_MA_11GN_SZ 7
+#define RO_ED_STATE_MSK 0x00008000
+#define RO_ED_STATE_I_MSK 0xffff7fff
+#define RO_ED_STATE_SFT 15
+#define RO_ED_STATE_HI 15
+#define RO_ED_STATE_SZ 1
+#define RO_CCA_PWR_MA_11B_MSK 0x007f0000
+#define RO_CCA_PWR_MA_11B_I_MSK 0xff80ffff
+#define RO_CCA_PWR_MA_11B_SFT 16
+#define RO_CCA_PWR_MA_11B_HI 22
+#define RO_CCA_PWR_MA_11B_SZ 7
+#define RO_PGA_PWR_FF1_MSK 0x00003fff
+#define RO_PGA_PWR_FF1_I_MSK 0xffffc000
+#define RO_PGA_PWR_FF1_SFT 0
+#define RO_PGA_PWR_FF1_HI 13
+#define RO_PGA_PWR_FF1_SZ 14
+#define RO_RF_PWR_FF1_MSK 0x000f0000
+#define RO_RF_PWR_FF1_I_MSK 0xfff0ffff
+#define RO_RF_PWR_FF1_SFT 16
+#define RO_RF_PWR_FF1_HI 19
+#define RO_RF_PWR_FF1_SZ 4
+#define RO_PGAGC_FF1_MSK 0x0f000000
+#define RO_PGAGC_FF1_I_MSK 0xf0ffffff
+#define RO_PGAGC_FF1_SFT 24
+#define RO_PGAGC_FF1_HI 27
+#define RO_PGAGC_FF1_SZ 4
+#define RO_RFGC_FF1_MSK 0x30000000
+#define RO_RFGC_FF1_I_MSK 0xcfffffff
+#define RO_RFGC_FF1_SFT 28
+#define RO_RFGC_FF1_HI 29
+#define RO_RFGC_FF1_SZ 2
+#define RO_PGA_PWR_FF2_MSK 0x00003fff
+#define RO_PGA_PWR_FF2_I_MSK 0xffffc000
+#define RO_PGA_PWR_FF2_SFT 0
+#define RO_PGA_PWR_FF2_HI 13
+#define RO_PGA_PWR_FF2_SZ 14
+#define RO_RF_PWR_FF2_MSK 0x000f0000
+#define RO_RF_PWR_FF2_I_MSK 0xfff0ffff
+#define RO_RF_PWR_FF2_SFT 16
+#define RO_RF_PWR_FF2_HI 19
+#define RO_RF_PWR_FF2_SZ 4
+#define RO_PGAGC_FF2_MSK 0x0f000000
+#define RO_PGAGC_FF2_I_MSK 0xf0ffffff
+#define RO_PGAGC_FF2_SFT 24
+#define RO_PGAGC_FF2_HI 27
+#define RO_PGAGC_FF2_SZ 4
+#define RO_RFGC_FF2_MSK 0x30000000
+#define RO_RFGC_FF2_I_MSK 0xcfffffff
+#define RO_RFGC_FF2_SFT 28
+#define RO_RFGC_FF2_HI 29
+#define RO_RFGC_FF2_SZ 2
+#define RO_PGA_PWR_FF3_MSK 0x00003fff
+#define RO_PGA_PWR_FF3_I_MSK 0xffffc000
+#define RO_PGA_PWR_FF3_SFT 0
+#define RO_PGA_PWR_FF3_HI 13
+#define RO_PGA_PWR_FF3_SZ 14
+#define RO_RF_PWR_FF3_MSK 0x000f0000
+#define RO_RF_PWR_FF3_I_MSK 0xfff0ffff
+#define RO_RF_PWR_FF3_SFT 16
+#define RO_RF_PWR_FF3_HI 19
+#define RO_RF_PWR_FF3_SZ 4
+#define RO_PGAGC_FF3_MSK 0x0f000000
+#define RO_PGAGC_FF3_I_MSK 0xf0ffffff
+#define RO_PGAGC_FF3_SFT 24
+#define RO_PGAGC_FF3_HI 27
+#define RO_PGAGC_FF3_SZ 4
+#define RO_RFGC_FF3_MSK 0x30000000
+#define RO_RFGC_FF3_I_MSK 0xcfffffff
+#define RO_RFGC_FF3_SFT 28
+#define RO_RFGC_FF3_HI 29
+#define RO_RFGC_FF3_SZ 2
+#define RG_TX_DES_RATE_MSK 0x0000001f
+#define RG_TX_DES_RATE_I_MSK 0xffffffe0
+#define RG_TX_DES_RATE_SFT 0
+#define RG_TX_DES_RATE_HI 4
+#define RG_TX_DES_RATE_SZ 5
+#define RG_TX_DES_MODE_MSK 0x00001f00
+#define RG_TX_DES_MODE_I_MSK 0xffffe0ff
+#define RG_TX_DES_MODE_SFT 8
+#define RG_TX_DES_MODE_HI 12
+#define RG_TX_DES_MODE_SZ 5
+#define RG_TX_DES_LEN_LO_MSK 0x001f0000
+#define RG_TX_DES_LEN_LO_I_MSK 0xffe0ffff
+#define RG_TX_DES_LEN_LO_SFT 16
+#define RG_TX_DES_LEN_LO_HI 20
+#define RG_TX_DES_LEN_LO_SZ 5
+#define RG_TX_DES_LEN_UP_MSK 0x1f000000
+#define RG_TX_DES_LEN_UP_I_MSK 0xe0ffffff
+#define RG_TX_DES_LEN_UP_SFT 24
+#define RG_TX_DES_LEN_UP_HI 28
+#define RG_TX_DES_LEN_UP_SZ 5
+#define RG_TX_DES_SRVC_UP_MSK 0x0000001f
+#define RG_TX_DES_SRVC_UP_I_MSK 0xffffffe0
+#define RG_TX_DES_SRVC_UP_SFT 0
+#define RG_TX_DES_SRVC_UP_HI 4
+#define RG_TX_DES_SRVC_UP_SZ 5
+#define RG_TX_DES_L_LEN_LO_MSK 0x00001f00
+#define RG_TX_DES_L_LEN_LO_I_MSK 0xffffe0ff
+#define RG_TX_DES_L_LEN_LO_SFT 8
+#define RG_TX_DES_L_LEN_LO_HI 12
+#define RG_TX_DES_L_LEN_LO_SZ 5
+#define RG_TX_DES_L_LEN_UP_MSK 0x001f0000
+#define RG_TX_DES_L_LEN_UP_I_MSK 0xffe0ffff
+#define RG_TX_DES_L_LEN_UP_SFT 16
+#define RG_TX_DES_L_LEN_UP_HI 20
+#define RG_TX_DES_L_LEN_UP_SZ 5
+#define RG_TX_DES_TYPE_MSK 0x1f000000
+#define RG_TX_DES_TYPE_I_MSK 0xe0ffffff
+#define RG_TX_DES_TYPE_SFT 24
+#define RG_TX_DES_TYPE_HI 28
+#define RG_TX_DES_TYPE_SZ 5
+#define RG_TX_DES_L_LEN_UP_COMB_MSK 0x00000001
+#define RG_TX_DES_L_LEN_UP_COMB_I_MSK 0xfffffffe
+#define RG_TX_DES_L_LEN_UP_COMB_SFT 0
+#define RG_TX_DES_L_LEN_UP_COMB_HI 0
+#define RG_TX_DES_L_LEN_UP_COMB_SZ 1
+#define RG_TX_DES_TYPE_COMB_MSK 0x00000010
+#define RG_TX_DES_TYPE_COMB_I_MSK 0xffffffef
+#define RG_TX_DES_TYPE_COMB_SFT 4
+#define RG_TX_DES_TYPE_COMB_HI 4
+#define RG_TX_DES_TYPE_COMB_SZ 1
+#define RG_TX_DES_RATE_COMB_MSK 0x00000100
+#define RG_TX_DES_RATE_COMB_I_MSK 0xfffffeff
+#define RG_TX_DES_RATE_COMB_SFT 8
+#define RG_TX_DES_RATE_COMB_HI 8
+#define RG_TX_DES_RATE_COMB_SZ 1
+#define RG_TX_DES_MODE_COMB_MSK 0x00001000
+#define RG_TX_DES_MODE_COMB_I_MSK 0xffffefff
+#define RG_TX_DES_MODE_COMB_SFT 12
+#define RG_TX_DES_MODE_COMB_HI 12
+#define RG_TX_DES_MODE_COMB_SZ 1
+#define RG_TX_DES_PWRLVL_MSK 0x001f0000
+#define RG_TX_DES_PWRLVL_I_MSK 0xffe0ffff
+#define RG_TX_DES_PWRLVL_SFT 16
+#define RG_TX_DES_PWRLVL_HI 20
+#define RG_TX_DES_PWRLVL_SZ 5
+#define RG_TX_DES_SRVC_LO_MSK 0x1f000000
+#define RG_TX_DES_SRVC_LO_I_MSK 0xe0ffffff
+#define RG_TX_DES_SRVC_LO_SFT 24
+#define RG_TX_DES_SRVC_LO_HI 28
+#define RG_TX_DES_SRVC_LO_SZ 5
+#define RG_RX_DES_RATE_MSK 0x0000003f
+#define RG_RX_DES_RATE_I_MSK 0xffffffc0
+#define RG_RX_DES_RATE_SFT 0
+#define RG_RX_DES_RATE_HI 5
+#define RG_RX_DES_RATE_SZ 6
+#define RG_RX_DES_MODE_MSK 0x00003f00
+#define RG_RX_DES_MODE_I_MSK 0xffffc0ff
+#define RG_RX_DES_MODE_SFT 8
+#define RG_RX_DES_MODE_HI 13
+#define RG_RX_DES_MODE_SZ 6
+#define RG_RX_DES_LEN_LO_MSK 0x003f0000
+#define RG_RX_DES_LEN_LO_I_MSK 0xffc0ffff
+#define RG_RX_DES_LEN_LO_SFT 16
+#define RG_RX_DES_LEN_LO_HI 21
+#define RG_RX_DES_LEN_LO_SZ 6
+#define RG_RX_DES_LEN_UP_MSK 0x3f000000
+#define RG_RX_DES_LEN_UP_I_MSK 0xc0ffffff
+#define RG_RX_DES_LEN_UP_SFT 24
+#define RG_RX_DES_LEN_UP_HI 29
+#define RG_RX_DES_LEN_UP_SZ 6
+#define RG_RX_DES_SRVC_UP_MSK 0x0000003f
+#define RG_RX_DES_SRVC_UP_I_MSK 0xffffffc0
+#define RG_RX_DES_SRVC_UP_SFT 0
+#define RG_RX_DES_SRVC_UP_HI 5
+#define RG_RX_DES_SRVC_UP_SZ 6
+#define RG_RX_DES_L_LEN_LO_MSK 0x00003f00
+#define RG_RX_DES_L_LEN_LO_I_MSK 0xffffc0ff
+#define RG_RX_DES_L_LEN_LO_SFT 8
+#define RG_RX_DES_L_LEN_LO_HI 13
+#define RG_RX_DES_L_LEN_LO_SZ 6
+#define RG_RX_DES_L_LEN_UP_MSK 0x003f0000
+#define RG_RX_DES_L_LEN_UP_I_MSK 0xffc0ffff
+#define RG_RX_DES_L_LEN_UP_SFT 16
+#define RG_RX_DES_L_LEN_UP_HI 21
+#define RG_RX_DES_L_LEN_UP_SZ 6
+#define RG_RX_DES_TYPE_MSK 0x3f000000
+#define RG_RX_DES_TYPE_I_MSK 0xc0ffffff
+#define RG_RX_DES_TYPE_SFT 24
+#define RG_RX_DES_TYPE_HI 29
+#define RG_RX_DES_TYPE_SZ 6
+#define RG_RX_DES_L_LEN_UP_COMB_MSK 0x00000001
+#define RG_RX_DES_L_LEN_UP_COMB_I_MSK 0xfffffffe
+#define RG_RX_DES_L_LEN_UP_COMB_SFT 0
+#define RG_RX_DES_L_LEN_UP_COMB_HI 0
+#define RG_RX_DES_L_LEN_UP_COMB_SZ 1
+#define RG_RX_DES_TYPE_COMB_MSK 0x00000010
+#define RG_RX_DES_TYPE_COMB_I_MSK 0xffffffef
+#define RG_RX_DES_TYPE_COMB_SFT 4
+#define RG_RX_DES_TYPE_COMB_HI 4
+#define RG_RX_DES_TYPE_COMB_SZ 1
+#define RG_RX_DES_RATE_COMB_MSK 0x00000100
+#define RG_RX_DES_RATE_COMB_I_MSK 0xfffffeff
+#define RG_RX_DES_RATE_COMB_SFT 8
+#define RG_RX_DES_RATE_COMB_HI 8
+#define RG_RX_DES_RATE_COMB_SZ 1
+#define RG_RX_DES_MODE_COMB_MSK 0x00001000
+#define RG_RX_DES_MODE_COMB_I_MSK 0xffffefff
+#define RG_RX_DES_MODE_COMB_SFT 12
+#define RG_RX_DES_MODE_COMB_HI 12
+#define RG_RX_DES_MODE_COMB_SZ 1
+#define RG_RX_DES_SNR_MSK 0x000f0000
+#define RG_RX_DES_SNR_I_MSK 0xfff0ffff
+#define RG_RX_DES_SNR_SFT 16
+#define RG_RX_DES_SNR_HI 19
+#define RG_RX_DES_SNR_SZ 4
+#define RG_RX_DES_RCPI_MSK 0x00f00000
+#define RG_RX_DES_RCPI_I_MSK 0xff0fffff
+#define RG_RX_DES_RCPI_SFT 20
+#define RG_RX_DES_RCPI_HI 23
+#define RG_RX_DES_RCPI_SZ 4
+#define RG_RX_DES_SRVC_LO_MSK 0x3f000000
+#define RG_RX_DES_SRVC_LO_I_MSK 0xc0ffffff
+#define RG_RX_DES_SRVC_LO_SFT 24
+#define RG_RX_DES_SRVC_LO_HI 29
+#define RG_RX_DES_SRVC_LO_SZ 6
+#define RO_TX_DES_EXCP_RATE_CNT_MSK 0x000000ff
+#define RO_TX_DES_EXCP_RATE_CNT_I_MSK 0xffffff00
+#define RO_TX_DES_EXCP_RATE_CNT_SFT 0
+#define RO_TX_DES_EXCP_RATE_CNT_HI 7
+#define RO_TX_DES_EXCP_RATE_CNT_SZ 8
+#define RO_TX_DES_EXCP_CH_BW_CNT_MSK 0x0000ff00
+#define RO_TX_DES_EXCP_CH_BW_CNT_I_MSK 0xffff00ff
+#define RO_TX_DES_EXCP_CH_BW_CNT_SFT 8
+#define RO_TX_DES_EXCP_CH_BW_CNT_HI 15
+#define RO_TX_DES_EXCP_CH_BW_CNT_SZ 8
+#define RO_TX_DES_EXCP_MODE_CNT_MSK 0x00ff0000
+#define RO_TX_DES_EXCP_MODE_CNT_I_MSK 0xff00ffff
+#define RO_TX_DES_EXCP_MODE_CNT_SFT 16
+#define RO_TX_DES_EXCP_MODE_CNT_HI 23
+#define RO_TX_DES_EXCP_MODE_CNT_SZ 8
+#define RG_TX_DES_EXCP_RATE_DEFAULT_MSK 0x07000000
+#define RG_TX_DES_EXCP_RATE_DEFAULT_I_MSK 0xf8ffffff
+#define RG_TX_DES_EXCP_RATE_DEFAULT_SFT 24
+#define RG_TX_DES_EXCP_RATE_DEFAULT_HI 26
+#define RG_TX_DES_EXCP_RATE_DEFAULT_SZ 3
+#define RG_TX_DES_EXCP_MODE_DEFAULT_MSK 0x70000000
+#define RG_TX_DES_EXCP_MODE_DEFAULT_I_MSK 0x8fffffff
+#define RG_TX_DES_EXCP_MODE_DEFAULT_SFT 28
+#define RG_TX_DES_EXCP_MODE_DEFAULT_HI 30
+#define RG_TX_DES_EXCP_MODE_DEFAULT_SZ 3
+#define RG_TX_DES_EXCP_CLR_MSK 0x80000000
+#define RG_TX_DES_EXCP_CLR_I_MSK 0x7fffffff
+#define RG_TX_DES_EXCP_CLR_SFT 31
+#define RG_TX_DES_EXCP_CLR_HI 31
+#define RG_TX_DES_EXCP_CLR_SZ 1
+#define RG_TX_DES_ACK_WIDTH_MSK 0x00000001
+#define RG_TX_DES_ACK_WIDTH_I_MSK 0xfffffffe
+#define RG_TX_DES_ACK_WIDTH_SFT 0
+#define RG_TX_DES_ACK_WIDTH_HI 0
+#define RG_TX_DES_ACK_WIDTH_SZ 1
+#define RG_TX_DES_ACK_PRD_MSK 0x0000000e
+#define RG_TX_DES_ACK_PRD_I_MSK 0xfffffff1
+#define RG_TX_DES_ACK_PRD_SFT 1
+#define RG_TX_DES_ACK_PRD_HI 3
+#define RG_TX_DES_ACK_PRD_SZ 3
+#define RG_RX_DES_SNR_GN_MSK 0x003f0000
+#define RG_RX_DES_SNR_GN_I_MSK 0xffc0ffff
+#define RG_RX_DES_SNR_GN_SFT 16
+#define RG_RX_DES_SNR_GN_HI 21
+#define RG_RX_DES_SNR_GN_SZ 6
+#define RG_RX_DES_RCPI_GN_MSK 0x3f000000
+#define RG_RX_DES_RCPI_GN_I_MSK 0xc0ffffff
+#define RG_RX_DES_RCPI_GN_SFT 24
+#define RG_RX_DES_RCPI_GN_HI 29
+#define RG_RX_DES_RCPI_GN_SZ 6
+#define RG_TST_TBUS_SEL_MSK 0x0000000f
+#define RG_TST_TBUS_SEL_I_MSK 0xfffffff0
+#define RG_TST_TBUS_SEL_SFT 0
+#define RG_TST_TBUS_SEL_HI 3
+#define RG_TST_TBUS_SEL_SZ 4
+#define RG_RSSI_OFFSET_MSK 0x00ff0000
+#define RG_RSSI_OFFSET_I_MSK 0xff00ffff
+#define RG_RSSI_OFFSET_SFT 16
+#define RG_RSSI_OFFSET_HI 23
+#define RG_RSSI_OFFSET_SZ 8
+#define RG_RSSI_INV_MSK 0x01000000
+#define RG_RSSI_INV_I_MSK 0xfeffffff
+#define RG_RSSI_INV_SFT 24
+#define RG_RSSI_INV_HI 24
+#define RG_RSSI_INV_SZ 1
+#define RG_TST_ADC_ON_MSK 0x40000000
+#define RG_TST_ADC_ON_I_MSK 0xbfffffff
+#define RG_TST_ADC_ON_SFT 30
+#define RG_TST_ADC_ON_HI 30
+#define RG_TST_ADC_ON_SZ 1
+#define RG_TST_EXT_GAIN_MSK 0x80000000
+#define RG_TST_EXT_GAIN_I_MSK 0x7fffffff
+#define RG_TST_EXT_GAIN_SFT 31
+#define RG_TST_EXT_GAIN_HI 31
+#define RG_TST_EXT_GAIN_SZ 1
+#define RG_DAC_Q_SET_MSK 0x000003ff
+#define RG_DAC_Q_SET_I_MSK 0xfffffc00
+#define RG_DAC_Q_SET_SFT 0
+#define RG_DAC_Q_SET_HI 9
+#define RG_DAC_Q_SET_SZ 10
+#define RG_DAC_I_SET_MSK 0x003ff000
+#define RG_DAC_I_SET_I_MSK 0xffc00fff
+#define RG_DAC_I_SET_SFT 12
+#define RG_DAC_I_SET_HI 21
+#define RG_DAC_I_SET_SZ 10
+#define RG_DAC_EN_MAN_MSK 0x10000000
+#define RG_DAC_EN_MAN_I_MSK 0xefffffff
+#define RG_DAC_EN_MAN_SFT 28
+#define RG_DAC_EN_MAN_HI 28
+#define RG_DAC_EN_MAN_SZ 1
+#define RG_IQC_FFT_EN_MSK 0x20000000
+#define RG_IQC_FFT_EN_I_MSK 0xdfffffff
+#define RG_IQC_FFT_EN_SFT 29
+#define RG_IQC_FFT_EN_HI 29
+#define RG_IQC_FFT_EN_SZ 1
+#define RG_DAC_MAN_Q_EN_MSK 0x40000000
+#define RG_DAC_MAN_Q_EN_I_MSK 0xbfffffff
+#define RG_DAC_MAN_Q_EN_SFT 30
+#define RG_DAC_MAN_Q_EN_HI 30
+#define RG_DAC_MAN_Q_EN_SZ 1
+#define RG_DAC_MAN_I_EN_MSK 0x80000000
+#define RG_DAC_MAN_I_EN_I_MSK 0x7fffffff
+#define RG_DAC_MAN_I_EN_SFT 31
+#define RG_DAC_MAN_I_EN_HI 31
+#define RG_DAC_MAN_I_EN_SZ 1
+#define RO_MRX_EN_CNT_MSK 0x0000ffff
+#define RO_MRX_EN_CNT_I_MSK 0xffff0000
+#define RO_MRX_EN_CNT_SFT 0
+#define RO_MRX_EN_CNT_HI 15
+#define RO_MRX_EN_CNT_SZ 16
+#define RG_MRX_EN_CNT_RST_N_MSK 0x80000000
+#define RG_MRX_EN_CNT_RST_N_I_MSK 0x7fffffff
+#define RG_MRX_EN_CNT_RST_N_SFT 31
+#define RG_MRX_EN_CNT_RST_N_HI 31
+#define RG_MRX_EN_CNT_RST_N_SZ 1
+#define RG_PA_RISE_TIME_MSK 0x000000ff
+#define RG_PA_RISE_TIME_I_MSK 0xffffff00
+#define RG_PA_RISE_TIME_SFT 0
+#define RG_PA_RISE_TIME_HI 7
+#define RG_PA_RISE_TIME_SZ 8
+#define RG_RFTX_RISE_TIME_MSK 0x0000ff00
+#define RG_RFTX_RISE_TIME_I_MSK 0xffff00ff
+#define RG_RFTX_RISE_TIME_SFT 8
+#define RG_RFTX_RISE_TIME_HI 15
+#define RG_RFTX_RISE_TIME_SZ 8
+#define RG_DAC_RISE_TIME_MSK 0x00ff0000
+#define RG_DAC_RISE_TIME_I_MSK 0xff00ffff
+#define RG_DAC_RISE_TIME_SFT 16
+#define RG_DAC_RISE_TIME_HI 23
+#define RG_DAC_RISE_TIME_SZ 8
+#define RG_SW_RISE_TIME_MSK 0xff000000
+#define RG_SW_RISE_TIME_I_MSK 0x00ffffff
+#define RG_SW_RISE_TIME_SFT 24
+#define RG_SW_RISE_TIME_HI 31
+#define RG_SW_RISE_TIME_SZ 8
+#define RG_PA_FALL_TIME_MSK 0x000000ff
+#define RG_PA_FALL_TIME_I_MSK 0xffffff00
+#define RG_PA_FALL_TIME_SFT 0
+#define RG_PA_FALL_TIME_HI 7
+#define RG_PA_FALL_TIME_SZ 8
+#define RG_RFTX_FALL_TIME_MSK 0x0000ff00
+#define RG_RFTX_FALL_TIME_I_MSK 0xffff00ff
+#define RG_RFTX_FALL_TIME_SFT 8
+#define RG_RFTX_FALL_TIME_HI 15
+#define RG_RFTX_FALL_TIME_SZ 8
+#define RG_DAC_FALL_TIME_MSK 0x00ff0000
+#define RG_DAC_FALL_TIME_I_MSK 0xff00ffff
+#define RG_DAC_FALL_TIME_SFT 16
+#define RG_DAC_FALL_TIME_HI 23
+#define RG_DAC_FALL_TIME_SZ 8
+#define RG_SW_FALL_TIME_MSK 0xff000000
+#define RG_SW_FALL_TIME_I_MSK 0x00ffffff
+#define RG_SW_FALL_TIME_SFT 24
+#define RG_SW_FALL_TIME_HI 31
+#define RG_SW_FALL_TIME_SZ 8
+#define RG_ANT_SW_0_MSK 0x00000007
+#define RG_ANT_SW_0_I_MSK 0xfffffff8
+#define RG_ANT_SW_0_SFT 0
+#define RG_ANT_SW_0_HI 2
+#define RG_ANT_SW_0_SZ 3
+#define RG_ANT_SW_1_MSK 0x00000038
+#define RG_ANT_SW_1_I_MSK 0xffffffc7
+#define RG_ANT_SW_1_SFT 3
+#define RG_ANT_SW_1_HI 5
+#define RG_ANT_SW_1_SZ 3
+#define RG_MTX_LEN_LOWER_TH_0_MSK 0x00001fff
+#define RG_MTX_LEN_LOWER_TH_0_I_MSK 0xffffe000
+#define RG_MTX_LEN_LOWER_TH_0_SFT 0
+#define RG_MTX_LEN_LOWER_TH_0_HI 12
+#define RG_MTX_LEN_LOWER_TH_0_SZ 13
+#define RG_MTX_LEN_UPPER_TH_0_MSK 0x1fff0000
+#define RG_MTX_LEN_UPPER_TH_0_I_MSK 0xe000ffff
+#define RG_MTX_LEN_UPPER_TH_0_SFT 16
+#define RG_MTX_LEN_UPPER_TH_0_HI 28
+#define RG_MTX_LEN_UPPER_TH_0_SZ 13
+#define RG_MTX_LEN_CNT_EN_0_MSK 0x80000000
+#define RG_MTX_LEN_CNT_EN_0_I_MSK 0x7fffffff
+#define RG_MTX_LEN_CNT_EN_0_SFT 31
+#define RG_MTX_LEN_CNT_EN_0_HI 31
+#define RG_MTX_LEN_CNT_EN_0_SZ 1
+#define RG_MTX_LEN_LOWER_TH_1_MSK 0x00001fff
+#define RG_MTX_LEN_LOWER_TH_1_I_MSK 0xffffe000
+#define RG_MTX_LEN_LOWER_TH_1_SFT 0
+#define RG_MTX_LEN_LOWER_TH_1_HI 12
+#define RG_MTX_LEN_LOWER_TH_1_SZ 13
+#define RG_MTX_LEN_UPPER_TH_1_MSK 0x1fff0000
+#define RG_MTX_LEN_UPPER_TH_1_I_MSK 0xe000ffff
+#define RG_MTX_LEN_UPPER_TH_1_SFT 16
+#define RG_MTX_LEN_UPPER_TH_1_HI 28
+#define RG_MTX_LEN_UPPER_TH_1_SZ 13
+#define RG_MTX_LEN_CNT_EN_1_MSK 0x80000000
+#define RG_MTX_LEN_CNT_EN_1_I_MSK 0x7fffffff
+#define RG_MTX_LEN_CNT_EN_1_SFT 31
+#define RG_MTX_LEN_CNT_EN_1_HI 31
+#define RG_MTX_LEN_CNT_EN_1_SZ 1
+#define RG_MRX_LEN_LOWER_TH_0_MSK 0x00001fff
+#define RG_MRX_LEN_LOWER_TH_0_I_MSK 0xffffe000
+#define RG_MRX_LEN_LOWER_TH_0_SFT 0
+#define RG_MRX_LEN_LOWER_TH_0_HI 12
+#define RG_MRX_LEN_LOWER_TH_0_SZ 13
+#define RG_MRX_LEN_UPPER_TH_0_MSK 0x1fff0000
+#define RG_MRX_LEN_UPPER_TH_0_I_MSK 0xe000ffff
+#define RG_MRX_LEN_UPPER_TH_0_SFT 16
+#define RG_MRX_LEN_UPPER_TH_0_HI 28
+#define RG_MRX_LEN_UPPER_TH_0_SZ 13
+#define RG_MRX_LEN_CNT_EN_0_MSK 0x80000000
+#define RG_MRX_LEN_CNT_EN_0_I_MSK 0x7fffffff
+#define RG_MRX_LEN_CNT_EN_0_SFT 31
+#define RG_MRX_LEN_CNT_EN_0_HI 31
+#define RG_MRX_LEN_CNT_EN_0_SZ 1
+#define RG_MRX_LEN_LOWER_TH_1_MSK 0x00001fff
+#define RG_MRX_LEN_LOWER_TH_1_I_MSK 0xffffe000
+#define RG_MRX_LEN_LOWER_TH_1_SFT 0
+#define RG_MRX_LEN_LOWER_TH_1_HI 12
+#define RG_MRX_LEN_LOWER_TH_1_SZ 13
+#define RG_MRX_LEN_UPPER_TH_1_MSK 0x1fff0000
+#define RG_MRX_LEN_UPPER_TH_1_I_MSK 0xe000ffff
+#define RG_MRX_LEN_UPPER_TH_1_SFT 16
+#define RG_MRX_LEN_UPPER_TH_1_HI 28
+#define RG_MRX_LEN_UPPER_TH_1_SZ 13
+#define RG_MRX_LEN_CNT_EN_1_MSK 0x80000000
+#define RG_MRX_LEN_CNT_EN_1_I_MSK 0x7fffffff
+#define RG_MRX_LEN_CNT_EN_1_SFT 31
+#define RG_MRX_LEN_CNT_EN_1_HI 31
+#define RG_MRX_LEN_CNT_EN_1_SZ 1
+#define RO_MTX_LEN_CNT_1_MSK 0x0000ffff
+#define RO_MTX_LEN_CNT_1_I_MSK 0xffff0000
+#define RO_MTX_LEN_CNT_1_SFT 0
+#define RO_MTX_LEN_CNT_1_HI 15
+#define RO_MTX_LEN_CNT_1_SZ 16
+#define RO_MTX_LEN_CNT_0_MSK 0xffff0000
+#define RO_MTX_LEN_CNT_0_I_MSK 0x0000ffff
+#define RO_MTX_LEN_CNT_0_SFT 16
+#define RO_MTX_LEN_CNT_0_HI 31
+#define RO_MTX_LEN_CNT_0_SZ 16
+#define RO_MRX_LEN_CNT_1_MSK 0x0000ffff
+#define RO_MRX_LEN_CNT_1_I_MSK 0xffff0000
+#define RO_MRX_LEN_CNT_1_SFT 0
+#define RO_MRX_LEN_CNT_1_HI 15
+#define RO_MRX_LEN_CNT_1_SZ 16
+#define RO_MRX_LEN_CNT_0_MSK 0xffff0000
+#define RO_MRX_LEN_CNT_0_I_MSK 0x0000ffff
+#define RO_MRX_LEN_CNT_0_SFT 16
+#define RO_MRX_LEN_CNT_0_HI 31
+#define RO_MRX_LEN_CNT_0_SZ 16
+#define RG_MODE_REG_IN_16_MSK 0x0000ffff
+#define RG_MODE_REG_IN_16_I_MSK 0xffff0000
+#define RG_MODE_REG_IN_16_SFT 0
+#define RG_MODE_REG_IN_16_HI 15
+#define RG_MODE_REG_IN_16_SZ 16
+#define RG_PARALLEL_DR_16_MSK 0x00100000
+#define RG_PARALLEL_DR_16_I_MSK 0xffefffff
+#define RG_PARALLEL_DR_16_SFT 20
+#define RG_PARALLEL_DR_16_HI 20
+#define RG_PARALLEL_DR_16_SZ 1
+#define RG_MBRUN_16_MSK 0x01000000
+#define RG_MBRUN_16_I_MSK 0xfeffffff
+#define RG_MBRUN_16_SFT 24
+#define RG_MBRUN_16_HI 24
+#define RG_MBRUN_16_SZ 1
+#define RG_SHIFT_DR_16_MSK 0x10000000
+#define RG_SHIFT_DR_16_I_MSK 0xefffffff
+#define RG_SHIFT_DR_16_SFT 28
+#define RG_SHIFT_DR_16_HI 28
+#define RG_SHIFT_DR_16_SZ 1
+#define RG_MODE_REG_SI_16_MSK 0x20000000
+#define RG_MODE_REG_SI_16_I_MSK 0xdfffffff
+#define RG_MODE_REG_SI_16_SFT 29
+#define RG_MODE_REG_SI_16_HI 29
+#define RG_MODE_REG_SI_16_SZ 1
+#define RG_SIMULATION_MODE_16_MSK 0x40000000
+#define RG_SIMULATION_MODE_16_I_MSK 0xbfffffff
+#define RG_SIMULATION_MODE_16_SFT 30
+#define RG_SIMULATION_MODE_16_HI 30
+#define RG_SIMULATION_MODE_16_SZ 1
+#define RG_DBIST_MODE_16_MSK 0x80000000
+#define RG_DBIST_MODE_16_I_MSK 0x7fffffff
+#define RG_DBIST_MODE_16_SFT 31
+#define RG_DBIST_MODE_16_HI 31
+#define RG_DBIST_MODE_16_SZ 1
+#define RO_MODE_REG_OUT_16_MSK 0x0000ffff
+#define RO_MODE_REG_OUT_16_I_MSK 0xffff0000
+#define RO_MODE_REG_OUT_16_SFT 0
+#define RO_MODE_REG_OUT_16_HI 15
+#define RO_MODE_REG_OUT_16_SZ 16
+#define RO_MODE_REG_SO_16_MSK 0x01000000
+#define RO_MODE_REG_SO_16_I_MSK 0xfeffffff
+#define RO_MODE_REG_SO_16_SFT 24
+#define RO_MODE_REG_SO_16_HI 24
+#define RO_MODE_REG_SO_16_SZ 1
+#define RO_MONITOR_BUS_16_MSK 0x0007ffff
+#define RO_MONITOR_BUS_16_I_MSK 0xfff80000
+#define RO_MONITOR_BUS_16_SFT 0
+#define RO_MONITOR_BUS_16_HI 18
+#define RO_MONITOR_BUS_16_SZ 19
+#define RG_MRX_TYPE_1_MSK 0x000000ff
+#define RG_MRX_TYPE_1_I_MSK 0xffffff00
+#define RG_MRX_TYPE_1_SFT 0
+#define RG_MRX_TYPE_1_HI 7
+#define RG_MRX_TYPE_1_SZ 8
+#define RG_MRX_TYPE_0_MSK 0x0000ff00
+#define RG_MRX_TYPE_0_I_MSK 0xffff00ff
+#define RG_MRX_TYPE_0_SFT 8
+#define RG_MRX_TYPE_0_HI 15
+#define RG_MRX_TYPE_0_SZ 8
+#define RG_MTX_TYPE_1_MSK 0x00ff0000
+#define RG_MTX_TYPE_1_I_MSK 0xff00ffff
+#define RG_MTX_TYPE_1_SFT 16
+#define RG_MTX_TYPE_1_HI 23
+#define RG_MTX_TYPE_1_SZ 8
+#define RG_MTX_TYPE_0_MSK 0xff000000
+#define RG_MTX_TYPE_0_I_MSK 0x00ffffff
+#define RG_MTX_TYPE_0_SFT 24
+#define RG_MTX_TYPE_0_HI 31
+#define RG_MTX_TYPE_0_SZ 8
+#define RO_MTX_TYPE_CNT_1_MSK 0x0000ffff
+#define RO_MTX_TYPE_CNT_1_I_MSK 0xffff0000
+#define RO_MTX_TYPE_CNT_1_SFT 0
+#define RO_MTX_TYPE_CNT_1_HI 15
+#define RO_MTX_TYPE_CNT_1_SZ 16
+#define RO_MTX_TYPE_CNT_0_MSK 0xffff0000
+#define RO_MTX_TYPE_CNT_0_I_MSK 0x0000ffff
+#define RO_MTX_TYPE_CNT_0_SFT 16
+#define RO_MTX_TYPE_CNT_0_HI 31
+#define RO_MTX_TYPE_CNT_0_SZ 16
+#define RO_MRX_TYPE_CNT_1_MSK 0x0000ffff
+#define RO_MRX_TYPE_CNT_1_I_MSK 0xffff0000
+#define RO_MRX_TYPE_CNT_1_SFT 0
+#define RO_MRX_TYPE_CNT_1_HI 15
+#define RO_MRX_TYPE_CNT_1_SZ 16
+#define RO_MRX_TYPE_CNT_0_MSK 0xffff0000
+#define RO_MRX_TYPE_CNT_0_I_MSK 0x0000ffff
+#define RO_MRX_TYPE_CNT_0_SFT 16
+#define RO_MRX_TYPE_CNT_0_HI 31
+#define RO_MRX_TYPE_CNT_0_SZ 16
+#define RG_HB_COEF0_MSK 0x00000fff
+#define RG_HB_COEF0_I_MSK 0xfffff000
+#define RG_HB_COEF0_SFT 0
+#define RG_HB_COEF0_HI 11
+#define RG_HB_COEF0_SZ 12
+#define RG_HB_COEF1_MSK 0x0fff0000
+#define RG_HB_COEF1_I_MSK 0xf000ffff
+#define RG_HB_COEF1_SFT 16
+#define RG_HB_COEF1_HI 27
+#define RG_HB_COEF1_SZ 12
+#define RG_HB_COEF2_MSK 0x00000fff
+#define RG_HB_COEF2_I_MSK 0xfffff000
+#define RG_HB_COEF2_SFT 0
+#define RG_HB_COEF2_HI 11
+#define RG_HB_COEF2_SZ 12
+#define RG_HB_COEF3_MSK 0x0fff0000
+#define RG_HB_COEF3_I_MSK 0xf000ffff
+#define RG_HB_COEF3_SFT 16
+#define RG_HB_COEF3_HI 27
+#define RG_HB_COEF3_SZ 12
+#define RG_HB_COEF4_MSK 0x00000fff
+#define RG_HB_COEF4_I_MSK 0xfffff000
+#define RG_HB_COEF4_SFT 0
+#define RG_HB_COEF4_HI 11
+#define RG_HB_COEF4_SZ 12
+#define RO_TBUS_O_MSK 0x000fffff
+#define RO_TBUS_O_I_MSK 0xfff00000
+#define RO_TBUS_O_SFT 0
+#define RO_TBUS_O_HI 19
+#define RO_TBUS_O_SZ 20
+#define RG_LPF4_00_MSK 0x00001fff
+#define RG_LPF4_00_I_MSK 0xffffe000
+#define RG_LPF4_00_SFT 0
+#define RG_LPF4_00_HI 12
+#define RG_LPF4_00_SZ 13
+#define RG_LPF4_01_MSK 0x00001fff
+#define RG_LPF4_01_I_MSK 0xffffe000
+#define RG_LPF4_01_SFT 0
+#define RG_LPF4_01_HI 12
+#define RG_LPF4_01_SZ 13
+#define RG_LPF4_02_MSK 0x00001fff
+#define RG_LPF4_02_I_MSK 0xffffe000
+#define RG_LPF4_02_SFT 0
+#define RG_LPF4_02_HI 12
+#define RG_LPF4_02_SZ 13
+#define RG_LPF4_03_MSK 0x00001fff
+#define RG_LPF4_03_I_MSK 0xffffe000
+#define RG_LPF4_03_SFT 0
+#define RG_LPF4_03_HI 12
+#define RG_LPF4_03_SZ 13
+#define RG_LPF4_04_MSK 0x00001fff
+#define RG_LPF4_04_I_MSK 0xffffe000
+#define RG_LPF4_04_SFT 0
+#define RG_LPF4_04_HI 12
+#define RG_LPF4_04_SZ 13
+#define RG_LPF4_05_MSK 0x00001fff
+#define RG_LPF4_05_I_MSK 0xffffe000
+#define RG_LPF4_05_SFT 0
+#define RG_LPF4_05_HI 12
+#define RG_LPF4_05_SZ 13
+#define RG_LPF4_06_MSK 0x00001fff
+#define RG_LPF4_06_I_MSK 0xffffe000
+#define RG_LPF4_06_SFT 0
+#define RG_LPF4_06_HI 12
+#define RG_LPF4_06_SZ 13
+#define RG_LPF4_07_MSK 0x00001fff
+#define RG_LPF4_07_I_MSK 0xffffe000
+#define RG_LPF4_07_SFT 0
+#define RG_LPF4_07_HI 12
+#define RG_LPF4_07_SZ 13
+#define RG_LPF4_08_MSK 0x00001fff
+#define RG_LPF4_08_I_MSK 0xffffe000
+#define RG_LPF4_08_SFT 0
+#define RG_LPF4_08_HI 12
+#define RG_LPF4_08_SZ 13
+#define RG_LPF4_09_MSK 0x00001fff
+#define RG_LPF4_09_I_MSK 0xffffe000
+#define RG_LPF4_09_SFT 0
+#define RG_LPF4_09_HI 12
+#define RG_LPF4_09_SZ 13
+#define RG_LPF4_10_MSK 0x00001fff
+#define RG_LPF4_10_I_MSK 0xffffe000
+#define RG_LPF4_10_SFT 0
+#define RG_LPF4_10_HI 12
+#define RG_LPF4_10_SZ 13
+#define RG_LPF4_11_MSK 0x00001fff
+#define RG_LPF4_11_I_MSK 0xffffe000
+#define RG_LPF4_11_SFT 0
+#define RG_LPF4_11_HI 12
+#define RG_LPF4_11_SZ 13
+#define RG_LPF4_12_MSK 0x00001fff
+#define RG_LPF4_12_I_MSK 0xffffe000
+#define RG_LPF4_12_SFT 0
+#define RG_LPF4_12_HI 12
+#define RG_LPF4_12_SZ 13
+#define RG_LPF4_13_MSK 0x00001fff
+#define RG_LPF4_13_I_MSK 0xffffe000
+#define RG_LPF4_13_SFT 0
+#define RG_LPF4_13_HI 12
+#define RG_LPF4_13_SZ 13
+#define RG_LPF4_14_MSK 0x00001fff
+#define RG_LPF4_14_I_MSK 0xffffe000
+#define RG_LPF4_14_SFT 0
+#define RG_LPF4_14_HI 12
+#define RG_LPF4_14_SZ 13
+#define RG_LPF4_15_MSK 0x00001fff
+#define RG_LPF4_15_I_MSK 0xffffe000
+#define RG_LPF4_15_SFT 0
+#define RG_LPF4_15_HI 12
+#define RG_LPF4_15_SZ 13
+#define RG_LPF4_16_MSK 0x00001fff
+#define RG_LPF4_16_I_MSK 0xffffe000
+#define RG_LPF4_16_SFT 0
+#define RG_LPF4_16_HI 12
+#define RG_LPF4_16_SZ 13
+#define RG_LPF4_17_MSK 0x00001fff
+#define RG_LPF4_17_I_MSK 0xffffe000
+#define RG_LPF4_17_SFT 0
+#define RG_LPF4_17_HI 12
+#define RG_LPF4_17_SZ 13
+#define RG_LPF4_18_MSK 0x00001fff
+#define RG_LPF4_18_I_MSK 0xffffe000
+#define RG_LPF4_18_SFT 0
+#define RG_LPF4_18_HI 12
+#define RG_LPF4_18_SZ 13
+#define RG_LPF4_19_MSK 0x00001fff
+#define RG_LPF4_19_I_MSK 0xffffe000
+#define RG_LPF4_19_SFT 0
+#define RG_LPF4_19_HI 12
+#define RG_LPF4_19_SZ 13
+#define RG_LPF4_20_MSK 0x00001fff
+#define RG_LPF4_20_I_MSK 0xffffe000
+#define RG_LPF4_20_SFT 0
+#define RG_LPF4_20_HI 12
+#define RG_LPF4_20_SZ 13
+#define RG_LPF4_21_MSK 0x00001fff
+#define RG_LPF4_21_I_MSK 0xffffe000
+#define RG_LPF4_21_SFT 0
+#define RG_LPF4_21_HI 12
+#define RG_LPF4_21_SZ 13
+#define RG_LPF4_22_MSK 0x00001fff
+#define RG_LPF4_22_I_MSK 0xffffe000
+#define RG_LPF4_22_SFT 0
+#define RG_LPF4_22_HI 12
+#define RG_LPF4_22_SZ 13
+#define RG_LPF4_23_MSK 0x00001fff
+#define RG_LPF4_23_I_MSK 0xffffe000
+#define RG_LPF4_23_SFT 0
+#define RG_LPF4_23_HI 12
+#define RG_LPF4_23_SZ 13
+#define RG_LPF4_24_MSK 0x00001fff
+#define RG_LPF4_24_I_MSK 0xffffe000
+#define RG_LPF4_24_SFT 0
+#define RG_LPF4_24_HI 12
+#define RG_LPF4_24_SZ 13
+#define RG_LPF4_25_MSK 0x00001fff
+#define RG_LPF4_25_I_MSK 0xffffe000
+#define RG_LPF4_25_SFT 0
+#define RG_LPF4_25_HI 12
+#define RG_LPF4_25_SZ 13
+#define RG_LPF4_26_MSK 0x00001fff
+#define RG_LPF4_26_I_MSK 0xffffe000
+#define RG_LPF4_26_SFT 0
+#define RG_LPF4_26_HI 12
+#define RG_LPF4_26_SZ 13
+#define RG_LPF4_27_MSK 0x00001fff
+#define RG_LPF4_27_I_MSK 0xffffe000
+#define RG_LPF4_27_SFT 0
+#define RG_LPF4_27_HI 12
+#define RG_LPF4_27_SZ 13
+#define RG_LPF4_28_MSK 0x00001fff
+#define RG_LPF4_28_I_MSK 0xffffe000
+#define RG_LPF4_28_SFT 0
+#define RG_LPF4_28_HI 12
+#define RG_LPF4_28_SZ 13
+#define RG_LPF4_29_MSK 0x00001fff
+#define RG_LPF4_29_I_MSK 0xffffe000
+#define RG_LPF4_29_SFT 0
+#define RG_LPF4_29_HI 12
+#define RG_LPF4_29_SZ 13
+#define RG_LPF4_30_MSK 0x00001fff
+#define RG_LPF4_30_I_MSK 0xffffe000
+#define RG_LPF4_30_SFT 0
+#define RG_LPF4_30_HI 12
+#define RG_LPF4_30_SZ 13
+#define RG_LPF4_31_MSK 0x00001fff
+#define RG_LPF4_31_I_MSK 0xffffe000
+#define RG_LPF4_31_SFT 0
+#define RG_LPF4_31_HI 12
+#define RG_LPF4_31_SZ 13
+#define RG_LPF4_32_MSK 0x00001fff
+#define RG_LPF4_32_I_MSK 0xffffe000
+#define RG_LPF4_32_SFT 0
+#define RG_LPF4_32_HI 12
+#define RG_LPF4_32_SZ 13
+#define RG_LPF4_33_MSK 0x00001fff
+#define RG_LPF4_33_I_MSK 0xffffe000
+#define RG_LPF4_33_SFT 0
+#define RG_LPF4_33_HI 12
+#define RG_LPF4_33_SZ 13
+#define RG_LPF4_34_MSK 0x00001fff
+#define RG_LPF4_34_I_MSK 0xffffe000
+#define RG_LPF4_34_SFT 0
+#define RG_LPF4_34_HI 12
+#define RG_LPF4_34_SZ 13
+#define RG_LPF4_35_MSK 0x00001fff
+#define RG_LPF4_35_I_MSK 0xffffe000
+#define RG_LPF4_35_SFT 0
+#define RG_LPF4_35_HI 12
+#define RG_LPF4_35_SZ 13
+#define RG_LPF4_36_MSK 0x00001fff
+#define RG_LPF4_36_I_MSK 0xffffe000
+#define RG_LPF4_36_SFT 0
+#define RG_LPF4_36_HI 12
+#define RG_LPF4_36_SZ 13
+#define RG_LPF4_37_MSK 0x00001fff
+#define RG_LPF4_37_I_MSK 0xffffe000
+#define RG_LPF4_37_SFT 0
+#define RG_LPF4_37_HI 12
+#define RG_LPF4_37_SZ 13
+#define RG_LPF4_38_MSK 0x00001fff
+#define RG_LPF4_38_I_MSK 0xffffe000
+#define RG_LPF4_38_SFT 0
+#define RG_LPF4_38_HI 12
+#define RG_LPF4_38_SZ 13
+#define RG_LPF4_39_MSK 0x00001fff
+#define RG_LPF4_39_I_MSK 0xffffe000
+#define RG_LPF4_39_SFT 0
+#define RG_LPF4_39_HI 12
+#define RG_LPF4_39_SZ 13
+#define RG_LPF4_40_MSK 0x00001fff
+#define RG_LPF4_40_I_MSK 0xffffe000
+#define RG_LPF4_40_SFT 0
+#define RG_LPF4_40_HI 12
+#define RG_LPF4_40_SZ 13
+#define RG_BP_SMB_MSK 0x00002000
+#define RG_BP_SMB_I_MSK 0xffffdfff
+#define RG_BP_SMB_SFT 13
+#define RG_BP_SMB_HI 13
+#define RG_BP_SMB_SZ 1
+#define RG_EN_SRVC_MSK 0x00004000
+#define RG_EN_SRVC_I_MSK 0xffffbfff
+#define RG_EN_SRVC_SFT 14
+#define RG_EN_SRVC_HI 14
+#define RG_EN_SRVC_SZ 1
+#define RG_DES_SPD_MSK 0x00030000
+#define RG_DES_SPD_I_MSK 0xfffcffff
+#define RG_DES_SPD_SFT 16
+#define RG_DES_SPD_HI 17
+#define RG_DES_SPD_SZ 2
+#define RG_BB_11B_RISE_TIME_MSK 0x000000ff
+#define RG_BB_11B_RISE_TIME_I_MSK 0xffffff00
+#define RG_BB_11B_RISE_TIME_SFT 0
+#define RG_BB_11B_RISE_TIME_HI 7
+#define RG_BB_11B_RISE_TIME_SZ 8
+#define RG_BB_11B_FALL_TIME_MSK 0x0000ff00
+#define RG_BB_11B_FALL_TIME_I_MSK 0xffff00ff
+#define RG_BB_11B_FALL_TIME_SFT 8
+#define RG_BB_11B_FALL_TIME_HI 15
+#define RG_BB_11B_FALL_TIME_SZ 8
+#define RG_WR_TX_EN_CNT_RST_N_MSK 0x00000001
+#define RG_WR_TX_EN_CNT_RST_N_I_MSK 0xfffffffe
+#define RG_WR_TX_EN_CNT_RST_N_SFT 0
+#define RG_WR_TX_EN_CNT_RST_N_HI 0
+#define RG_WR_TX_EN_CNT_RST_N_SZ 1
+#define RO_TX_EN_CNT_MSK 0x0000ffff
+#define RO_TX_EN_CNT_I_MSK 0xffff0000
+#define RO_TX_EN_CNT_SFT 0
+#define RO_TX_EN_CNT_HI 15
+#define RO_TX_EN_CNT_SZ 16
+#define RO_TX_CNT_MSK 0xffffffff
+#define RO_TX_CNT_I_MSK 0x00000000
+#define RO_TX_CNT_SFT 0
+#define RO_TX_CNT_HI 31
+#define RO_TX_CNT_SZ 32
+#define RG_POS_DES_11B_L_EXT_MSK 0x0000000f
+#define RG_POS_DES_11B_L_EXT_I_MSK 0xfffffff0
+#define RG_POS_DES_11B_L_EXT_SFT 0
+#define RG_POS_DES_11B_L_EXT_HI 3
+#define RG_POS_DES_11B_L_EXT_SZ 4
+#define RG_PRE_DES_11B_DLY_MSK 0x000000f0
+#define RG_PRE_DES_11B_DLY_I_MSK 0xffffff0f
+#define RG_PRE_DES_11B_DLY_SFT 4
+#define RG_PRE_DES_11B_DLY_HI 7
+#define RG_PRE_DES_11B_DLY_SZ 4
+#define RG_CNT_CCA_LMT_MSK 0x000f0000
+#define RG_CNT_CCA_LMT_I_MSK 0xfff0ffff
+#define RG_CNT_CCA_LMT_SFT 16
+#define RG_CNT_CCA_LMT_HI 19
+#define RG_CNT_CCA_LMT_SZ 4
+#define RG_BYPASS_DESCRAMBLER_MSK 0x20000000
+#define RG_BYPASS_DESCRAMBLER_I_MSK 0xdfffffff
+#define RG_BYPASS_DESCRAMBLER_SFT 29
+#define RG_BYPASS_DESCRAMBLER_HI 29
+#define RG_BYPASS_DESCRAMBLER_SZ 1
+#define RG_BYPASS_AGC_MSK 0x80000000
+#define RG_BYPASS_AGC_I_MSK 0x7fffffff
+#define RG_BYPASS_AGC_SFT 31
+#define RG_BYPASS_AGC_HI 31
+#define RG_BYPASS_AGC_SZ 1
+#define RG_CCA_BIT_CNT_LMT_RX_MSK 0x000000f0
+#define RG_CCA_BIT_CNT_LMT_RX_I_MSK 0xffffff0f
+#define RG_CCA_BIT_CNT_LMT_RX_SFT 4
+#define RG_CCA_BIT_CNT_LMT_RX_HI 7
+#define RG_CCA_BIT_CNT_LMT_RX_SZ 4
+#define RG_CCA_SCALE_BF_MSK 0x007f0000
+#define RG_CCA_SCALE_BF_I_MSK 0xff80ffff
+#define RG_CCA_SCALE_BF_SFT 16
+#define RG_CCA_SCALE_BF_HI 22
+#define RG_CCA_SCALE_BF_SZ 7
+#define RG_PEAK_IDX_CNT_SEL_MSK 0x30000000
+#define RG_PEAK_IDX_CNT_SEL_I_MSK 0xcfffffff
+#define RG_PEAK_IDX_CNT_SEL_SFT 28
+#define RG_PEAK_IDX_CNT_SEL_HI 29
+#define RG_PEAK_IDX_CNT_SEL_SZ 2
+#define RG_TR_KI_T2_MSK 0x00000007
+#define RG_TR_KI_T2_I_MSK 0xfffffff8
+#define RG_TR_KI_T2_SFT 0
+#define RG_TR_KI_T2_HI 2
+#define RG_TR_KI_T2_SZ 3
+#define RG_TR_KP_T2_MSK 0x00000070
+#define RG_TR_KP_T2_I_MSK 0xffffff8f
+#define RG_TR_KP_T2_SFT 4
+#define RG_TR_KP_T2_HI 6
+#define RG_TR_KP_T2_SZ 3
+#define RG_TR_KI_T1_MSK 0x00000700
+#define RG_TR_KI_T1_I_MSK 0xfffff8ff
+#define RG_TR_KI_T1_SFT 8
+#define RG_TR_KI_T1_HI 10
+#define RG_TR_KI_T1_SZ 3
+#define RG_TR_KP_T1_MSK 0x00007000
+#define RG_TR_KP_T1_I_MSK 0xffff8fff
+#define RG_TR_KP_T1_SFT 12
+#define RG_TR_KP_T1_HI 14
+#define RG_TR_KP_T1_SZ 3
+#define RG_CR_KI_T1_MSK 0x00070000
+#define RG_CR_KI_T1_I_MSK 0xfff8ffff
+#define RG_CR_KI_T1_SFT 16
+#define RG_CR_KI_T1_HI 18
+#define RG_CR_KI_T1_SZ 3
+#define RG_CR_KP_T1_MSK 0x00700000
+#define RG_CR_KP_T1_I_MSK 0xff8fffff
+#define RG_CR_KP_T1_SFT 20
+#define RG_CR_KP_T1_HI 22
+#define RG_CR_KP_T1_SZ 3
+#define RG_CHIP_CNT_SLICER_MSK 0x0000001f
+#define RG_CHIP_CNT_SLICER_I_MSK 0xffffffe0
+#define RG_CHIP_CNT_SLICER_SFT 0
+#define RG_CHIP_CNT_SLICER_HI 4
+#define RG_CHIP_CNT_SLICER_SZ 5
+#define RG_CE_T4_CNT_LMT_MSK 0x0000ff00
+#define RG_CE_T4_CNT_LMT_I_MSK 0xffff00ff
+#define RG_CE_T4_CNT_LMT_SFT 8
+#define RG_CE_T4_CNT_LMT_HI 15
+#define RG_CE_T4_CNT_LMT_SZ 8
+#define RG_CE_T3_CNT_LMT_MSK 0x00ff0000
+#define RG_CE_T3_CNT_LMT_I_MSK 0xff00ffff
+#define RG_CE_T3_CNT_LMT_SFT 16
+#define RG_CE_T3_CNT_LMT_HI 23
+#define RG_CE_T3_CNT_LMT_SZ 8
+#define RG_CE_T2_CNT_LMT_MSK 0xff000000
+#define RG_CE_T2_CNT_LMT_I_MSK 0x00ffffff
+#define RG_CE_T2_CNT_LMT_SFT 24
+#define RG_CE_T2_CNT_LMT_HI 31
+#define RG_CE_T2_CNT_LMT_SZ 8
+#define RG_CE_MU_T1_MSK 0x00000007
+#define RG_CE_MU_T1_I_MSK 0xfffffff8
+#define RG_CE_MU_T1_SFT 0
+#define RG_CE_MU_T1_HI 2
+#define RG_CE_MU_T1_SZ 3
+#define RG_CE_DLY_SEL_MSK 0x003f0000
+#define RG_CE_DLY_SEL_I_MSK 0xffc0ffff
+#define RG_CE_DLY_SEL_SFT 16
+#define RG_CE_DLY_SEL_HI 21
+#define RG_CE_DLY_SEL_SZ 6
+#define RG_CE_MU_T8_MSK 0x00000007
+#define RG_CE_MU_T8_I_MSK 0xfffffff8
+#define RG_CE_MU_T8_SFT 0
+#define RG_CE_MU_T8_HI 2
+#define RG_CE_MU_T8_SZ 3
+#define RG_CE_MU_T7_MSK 0x00000070
+#define RG_CE_MU_T7_I_MSK 0xffffff8f
+#define RG_CE_MU_T7_SFT 4
+#define RG_CE_MU_T7_HI 6
+#define RG_CE_MU_T7_SZ 3
+#define RG_CE_MU_T6_MSK 0x00000700
+#define RG_CE_MU_T6_I_MSK 0xfffff8ff
+#define RG_CE_MU_T6_SFT 8
+#define RG_CE_MU_T6_HI 10
+#define RG_CE_MU_T6_SZ 3
+#define RG_CE_MU_T5_MSK 0x00007000
+#define RG_CE_MU_T5_I_MSK 0xffff8fff
+#define RG_CE_MU_T5_SFT 12
+#define RG_CE_MU_T5_HI 14
+#define RG_CE_MU_T5_SZ 3
+#define RG_CE_MU_T4_MSK 0x00070000
+#define RG_CE_MU_T4_I_MSK 0xfff8ffff
+#define RG_CE_MU_T4_SFT 16
+#define RG_CE_MU_T4_HI 18
+#define RG_CE_MU_T4_SZ 3
+#define RG_CE_MU_T3_MSK 0x00700000
+#define RG_CE_MU_T3_I_MSK 0xff8fffff
+#define RG_CE_MU_T3_SFT 20
+#define RG_CE_MU_T3_HI 22
+#define RG_CE_MU_T3_SZ 3
+#define RG_CE_MU_T2_MSK 0x07000000
+#define RG_CE_MU_T2_I_MSK 0xf8ffffff
+#define RG_CE_MU_T2_SFT 24
+#define RG_CE_MU_T2_HI 26
+#define RG_CE_MU_T2_SZ 3
+#define RG_EQ_MU_FB_T2_MSK 0x0000000f
+#define RG_EQ_MU_FB_T2_I_MSK 0xfffffff0
+#define RG_EQ_MU_FB_T2_SFT 0
+#define RG_EQ_MU_FB_T2_HI 3
+#define RG_EQ_MU_FB_T2_SZ 4
+#define RG_EQ_MU_FF_T2_MSK 0x000000f0
+#define RG_EQ_MU_FF_T2_I_MSK 0xffffff0f
+#define RG_EQ_MU_FF_T2_SFT 4
+#define RG_EQ_MU_FF_T2_HI 7
+#define RG_EQ_MU_FF_T2_SZ 4
+#define RG_EQ_MU_FB_T1_MSK 0x000f0000
+#define RG_EQ_MU_FB_T1_I_MSK 0xfff0ffff
+#define RG_EQ_MU_FB_T1_SFT 16
+#define RG_EQ_MU_FB_T1_HI 19
+#define RG_EQ_MU_FB_T1_SZ 4
+#define RG_EQ_MU_FF_T1_MSK 0x00f00000
+#define RG_EQ_MU_FF_T1_I_MSK 0xff0fffff
+#define RG_EQ_MU_FF_T1_SFT 20
+#define RG_EQ_MU_FF_T1_HI 23
+#define RG_EQ_MU_FF_T1_SZ 4
+#define RG_EQ_MU_FB_T4_MSK 0x0000000f
+#define RG_EQ_MU_FB_T4_I_MSK 0xfffffff0
+#define RG_EQ_MU_FB_T4_SFT 0
+#define RG_EQ_MU_FB_T4_HI 3
+#define RG_EQ_MU_FB_T4_SZ 4
+#define RG_EQ_MU_FF_T4_MSK 0x000000f0
+#define RG_EQ_MU_FF_T4_I_MSK 0xffffff0f
+#define RG_EQ_MU_FF_T4_SFT 4
+#define RG_EQ_MU_FF_T4_HI 7
+#define RG_EQ_MU_FF_T4_SZ 4
+#define RG_EQ_MU_FB_T3_MSK 0x000f0000
+#define RG_EQ_MU_FB_T3_I_MSK 0xfff0ffff
+#define RG_EQ_MU_FB_T3_SFT 16
+#define RG_EQ_MU_FB_T3_HI 19
+#define RG_EQ_MU_FB_T3_SZ 4
+#define RG_EQ_MU_FF_T3_MSK 0x00f00000
+#define RG_EQ_MU_FF_T3_I_MSK 0xff0fffff
+#define RG_EQ_MU_FF_T3_SFT 20
+#define RG_EQ_MU_FF_T3_HI 23
+#define RG_EQ_MU_FF_T3_SZ 4
+#define RG_EQ_KI_T2_MSK 0x00000700
+#define RG_EQ_KI_T2_I_MSK 0xfffff8ff
+#define RG_EQ_KI_T2_SFT 8
+#define RG_EQ_KI_T2_HI 10
+#define RG_EQ_KI_T2_SZ 3
+#define RG_EQ_KP_T2_MSK 0x00007000
+#define RG_EQ_KP_T2_I_MSK 0xffff8fff
+#define RG_EQ_KP_T2_SFT 12
+#define RG_EQ_KP_T2_HI 14
+#define RG_EQ_KP_T2_SZ 3
+#define RG_EQ_KI_T1_MSK 0x00070000
+#define RG_EQ_KI_T1_I_MSK 0xfff8ffff
+#define RG_EQ_KI_T1_SFT 16
+#define RG_EQ_KI_T1_HI 18
+#define RG_EQ_KI_T1_SZ 3
+#define RG_EQ_KP_T1_MSK 0x00700000
+#define RG_EQ_KP_T1_I_MSK 0xff8fffff
+#define RG_EQ_KP_T1_SFT 20
+#define RG_EQ_KP_T1_HI 22
+#define RG_EQ_KP_T1_SZ 3
+#define RG_TR_LPF_RATE_MSK 0x003fffff
+#define RG_TR_LPF_RATE_I_MSK 0xffc00000
+#define RG_TR_LPF_RATE_SFT 0
+#define RG_TR_LPF_RATE_HI 21
+#define RG_TR_LPF_RATE_SZ 22
+#define RG_CE_BIT_CNT_LMT_MSK 0x0000007f
+#define RG_CE_BIT_CNT_LMT_I_MSK 0xffffff80
+#define RG_CE_BIT_CNT_LMT_SFT 0
+#define RG_CE_BIT_CNT_LMT_HI 6
+#define RG_CE_BIT_CNT_LMT_SZ 7
+#define RG_CE_CH_MAIN_SET_MSK 0x00000080
+#define RG_CE_CH_MAIN_SET_I_MSK 0xffffff7f
+#define RG_CE_CH_MAIN_SET_SFT 7
+#define RG_CE_CH_MAIN_SET_HI 7
+#define RG_CE_CH_MAIN_SET_SZ 1
+#define RG_TC_BIT_CNT_LMT_MSK 0x00007f00
+#define RG_TC_BIT_CNT_LMT_I_MSK 0xffff80ff
+#define RG_TC_BIT_CNT_LMT_SFT 8
+#define RG_TC_BIT_CNT_LMT_HI 14
+#define RG_TC_BIT_CNT_LMT_SZ 7
+#define RG_CR_BIT_CNT_LMT_MSK 0x007f0000
+#define RG_CR_BIT_CNT_LMT_I_MSK 0xff80ffff
+#define RG_CR_BIT_CNT_LMT_SFT 16
+#define RG_CR_BIT_CNT_LMT_HI 22
+#define RG_CR_BIT_CNT_LMT_SZ 7
+#define RG_TR_BIT_CNT_LMT_MSK 0x7f000000
+#define RG_TR_BIT_CNT_LMT_I_MSK 0x80ffffff
+#define RG_TR_BIT_CNT_LMT_SFT 24
+#define RG_TR_BIT_CNT_LMT_HI 30
+#define RG_TR_BIT_CNT_LMT_SZ 7
+#define RG_EQ_MAIN_TAP_MAN_MSK 0x00000001
+#define RG_EQ_MAIN_TAP_MAN_I_MSK 0xfffffffe
+#define RG_EQ_MAIN_TAP_MAN_SFT 0
+#define RG_EQ_MAIN_TAP_MAN_HI 0
+#define RG_EQ_MAIN_TAP_MAN_SZ 1
+#define RG_EQ_MAIN_TAP_COEF_MSK 0x07ff0000
+#define RG_EQ_MAIN_TAP_COEF_I_MSK 0xf800ffff
+#define RG_EQ_MAIN_TAP_COEF_SFT 16
+#define RG_EQ_MAIN_TAP_COEF_HI 26
+#define RG_EQ_MAIN_TAP_COEF_SZ 11
+#define RG_PWRON_DLY_TH_11B_MSK 0x000000ff
+#define RG_PWRON_DLY_TH_11B_I_MSK 0xffffff00
+#define RG_PWRON_DLY_TH_11B_SFT 0
+#define RG_PWRON_DLY_TH_11B_HI 7
+#define RG_PWRON_DLY_TH_11B_SZ 8
+#define RG_SFD_BIT_CNT_LMT_MSK 0x00ff0000
+#define RG_SFD_BIT_CNT_LMT_I_MSK 0xff00ffff
+#define RG_SFD_BIT_CNT_LMT_SFT 16
+#define RG_SFD_BIT_CNT_LMT_HI 23
+#define RG_SFD_BIT_CNT_LMT_SZ 8
+#define RG_CCA_PWR_TH_RX_MSK 0x00007fff
+#define RG_CCA_PWR_TH_RX_I_MSK 0xffff8000
+#define RG_CCA_PWR_TH_RX_SFT 0
+#define RG_CCA_PWR_TH_RX_HI 14
+#define RG_CCA_PWR_TH_RX_SZ 15
+#define RG_CCA_PWR_CNT_TH_MSK 0x001f0000
+#define RG_CCA_PWR_CNT_TH_I_MSK 0xffe0ffff
+#define RG_CCA_PWR_CNT_TH_SFT 16
+#define RG_CCA_PWR_CNT_TH_HI 20
+#define RG_CCA_PWR_CNT_TH_SZ 5
+#define B_FREQ_OS_MSK 0x000007ff
+#define B_FREQ_OS_I_MSK 0xfffff800
+#define B_FREQ_OS_SFT 0
+#define B_FREQ_OS_HI 10
+#define B_FREQ_OS_SZ 11
+#define B_SNR_MSK 0x0000007f
+#define B_SNR_I_MSK 0xffffff80
+#define B_SNR_SFT 0
+#define B_SNR_HI 6
+#define B_SNR_SZ 7
+#define B_RCPI_MSK 0x007f0000
+#define B_RCPI_I_MSK 0xff80ffff
+#define B_RCPI_SFT 16
+#define B_RCPI_HI 22
+#define B_RCPI_SZ 7
+#define CRC_CNT_MSK 0x0000ffff
+#define CRC_CNT_I_MSK 0xffff0000
+#define CRC_CNT_SFT 0
+#define CRC_CNT_HI 15
+#define CRC_CNT_SZ 16
+#define SFD_CNT_MSK 0xffff0000
+#define SFD_CNT_I_MSK 0x0000ffff
+#define SFD_CNT_SFT 16
+#define SFD_CNT_HI 31
+#define SFD_CNT_SZ 16
+#define B_PACKET_ERR_CNT_MSK 0x0000ffff
+#define B_PACKET_ERR_CNT_I_MSK 0xffff0000
+#define B_PACKET_ERR_CNT_SFT 0
+#define B_PACKET_ERR_CNT_HI 15
+#define B_PACKET_ERR_CNT_SZ 16
+#define PACKET_ERR_MSK 0x00010000
+#define PACKET_ERR_I_MSK 0xfffeffff
+#define PACKET_ERR_SFT 16
+#define PACKET_ERR_HI 16
+#define PACKET_ERR_SZ 1
+#define B_PACKET_CNT_MSK 0x0000ffff
+#define B_PACKET_CNT_I_MSK 0xffff0000
+#define B_PACKET_CNT_SFT 0
+#define B_PACKET_CNT_HI 15
+#define B_PACKET_CNT_SZ 16
+#define B_CCA_CNT_MSK 0xffff0000
+#define B_CCA_CNT_I_MSK 0x0000ffff
+#define B_CCA_CNT_SFT 16
+#define B_CCA_CNT_HI 31
+#define B_CCA_CNT_SZ 16
+#define B_LENGTH_FIELD_MSK 0x0000ffff
+#define B_LENGTH_FIELD_I_MSK 0xffff0000
+#define B_LENGTH_FIELD_SFT 0
+#define B_LENGTH_FIELD_HI 15
+#define B_LENGTH_FIELD_SZ 16
+#define SFD_FIELD_MSK 0xffff0000
+#define SFD_FIELD_I_MSK 0x0000ffff
+#define SFD_FIELD_SFT 16
+#define SFD_FIELD_HI 31
+#define SFD_FIELD_SZ 16
+#define SIGNAL_FIELD_MSK 0x000000ff
+#define SIGNAL_FIELD_I_MSK 0xffffff00
+#define SIGNAL_FIELD_SFT 0
+#define SIGNAL_FIELD_HI 7
+#define SIGNAL_FIELD_SZ 8
+#define B_SERVICE_FIELD_MSK 0x0000ff00
+#define B_SERVICE_FIELD_I_MSK 0xffff00ff
+#define B_SERVICE_FIELD_SFT 8
+#define B_SERVICE_FIELD_HI 15
+#define B_SERVICE_FIELD_SZ 8
+#define CRC_CORRECT_MSK 0x00010000
+#define CRC_CORRECT_I_MSK 0xfffeffff
+#define CRC_CORRECT_SFT 16
+#define CRC_CORRECT_HI 16
+#define CRC_CORRECT_SZ 1
+#define DEBUG_SEL_MSK 0x0000000f
+#define DEBUG_SEL_I_MSK 0xfffffff0
+#define DEBUG_SEL_SFT 0
+#define DEBUG_SEL_HI 3
+#define DEBUG_SEL_SZ 4
+#define RG_PACKET_STAT_EN_11B_MSK 0x00100000
+#define RG_PACKET_STAT_EN_11B_I_MSK 0xffefffff
+#define RG_PACKET_STAT_EN_11B_SFT 20
+#define RG_PACKET_STAT_EN_11B_HI 20
+#define RG_PACKET_STAT_EN_11B_SZ 1
+#define RG_BIT_REVERSE_MSK 0x00200000
+#define RG_BIT_REVERSE_I_MSK 0xffdfffff
+#define RG_BIT_REVERSE_SFT 21
+#define RG_BIT_REVERSE_HI 21
+#define RG_BIT_REVERSE_SZ 1
+#define RX_PHY_11B_SOFT_RST_N_MSK 0x00000001
+#define RX_PHY_11B_SOFT_RST_N_I_MSK 0xfffffffe
+#define RX_PHY_11B_SOFT_RST_N_SFT 0
+#define RX_PHY_11B_SOFT_RST_N_HI 0
+#define RX_PHY_11B_SOFT_RST_N_SZ 1
+#define RG_CE_BYPASS_TAP_MSK 0x000000f0
+#define RG_CE_BYPASS_TAP_I_MSK 0xffffff0f
+#define RG_CE_BYPASS_TAP_SFT 4
+#define RG_CE_BYPASS_TAP_HI 7
+#define RG_CE_BYPASS_TAP_SZ 4
+#define RG_EQ_BYPASS_FBW_TAP_MSK 0x00000f00
+#define RG_EQ_BYPASS_FBW_TAP_I_MSK 0xfffff0ff
+#define RG_EQ_BYPASS_FBW_TAP_SFT 8
+#define RG_EQ_BYPASS_FBW_TAP_HI 11
+#define RG_EQ_BYPASS_FBW_TAP_SZ 4
+#define RG_BB_11GN_RISE_TIME_MSK 0x000000ff
+#define RG_BB_11GN_RISE_TIME_I_MSK 0xffffff00
+#define RG_BB_11GN_RISE_TIME_SFT 0
+#define RG_BB_11GN_RISE_TIME_HI 7
+#define RG_BB_11GN_RISE_TIME_SZ 8
+#define RG_BB_11GN_FALL_TIME_MSK 0x0000ff00
+#define RG_BB_11GN_FALL_TIME_I_MSK 0xffff00ff
+#define RG_BB_11GN_FALL_TIME_SFT 8
+#define RG_BB_11GN_FALL_TIME_HI 15
+#define RG_BB_11GN_FALL_TIME_SZ 8
+#define RG_HTCARR52_FFT_SCALE_MSK 0x000003ff
+#define RG_HTCARR52_FFT_SCALE_I_MSK 0xfffffc00
+#define RG_HTCARR52_FFT_SCALE_SFT 0
+#define RG_HTCARR52_FFT_SCALE_HI 9
+#define RG_HTCARR52_FFT_SCALE_SZ 10
+#define RG_HTCARR56_FFT_SCALE_MSK 0x003ff000
+#define RG_HTCARR56_FFT_SCALE_I_MSK 0xffc00fff
+#define RG_HTCARR56_FFT_SCALE_SFT 12
+#define RG_HTCARR56_FFT_SCALE_HI 21
+#define RG_HTCARR56_FFT_SCALE_SZ 10
+#define RG_PACKET_STAT_EN_MSK 0x00800000
+#define RG_PACKET_STAT_EN_I_MSK 0xff7fffff
+#define RG_PACKET_STAT_EN_SFT 23
+#define RG_PACKET_STAT_EN_HI 23
+#define RG_PACKET_STAT_EN_SZ 1
+#define RG_SMB_DEF_MSK 0x7f000000
+#define RG_SMB_DEF_I_MSK 0x80ffffff
+#define RG_SMB_DEF_SFT 24
+#define RG_SMB_DEF_HI 30
+#define RG_SMB_DEF_SZ 7
+#define RG_CONTINUOUS_DATA_11GN_MSK 0x80000000
+#define RG_CONTINUOUS_DATA_11GN_I_MSK 0x7fffffff
+#define RG_CONTINUOUS_DATA_11GN_SFT 31
+#define RG_CONTINUOUS_DATA_11GN_HI 31
+#define RG_CONTINUOUS_DATA_11GN_SZ 1
+#define RO_TX_CNT_R_MSK 0xffffffff
+#define RO_TX_CNT_R_I_MSK 0x00000000
+#define RO_TX_CNT_R_SFT 0
+#define RO_TX_CNT_R_HI 31
+#define RO_TX_CNT_R_SZ 32
+#define RO_PACKET_ERR_CNT_MSK 0x0000ffff
+#define RO_PACKET_ERR_CNT_I_MSK 0xffff0000
+#define RO_PACKET_ERR_CNT_SFT 0
+#define RO_PACKET_ERR_CNT_HI 15
+#define RO_PACKET_ERR_CNT_SZ 16
+#define RG_POS_DES_11GN_L_EXT_MSK 0x0000000f
+#define RG_POS_DES_11GN_L_EXT_I_MSK 0xfffffff0
+#define RG_POS_DES_11GN_L_EXT_SFT 0
+#define RG_POS_DES_11GN_L_EXT_HI 3
+#define RG_POS_DES_11GN_L_EXT_SZ 4
+#define RG_PRE_DES_11GN_DLY_MSK 0x000000f0
+#define RG_PRE_DES_11GN_DLY_I_MSK 0xffffff0f
+#define RG_PRE_DES_11GN_DLY_SFT 4
+#define RG_PRE_DES_11GN_DLY_HI 7
+#define RG_PRE_DES_11GN_DLY_SZ 4
+#define RG_TR_LPF_KI_G_T1_MSK 0x0000000f
+#define RG_TR_LPF_KI_G_T1_I_MSK 0xfffffff0
+#define RG_TR_LPF_KI_G_T1_SFT 0
+#define RG_TR_LPF_KI_G_T1_HI 3
+#define RG_TR_LPF_KI_G_T1_SZ 4
+#define RG_TR_LPF_KP_G_T1_MSK 0x000000f0
+#define RG_TR_LPF_KP_G_T1_I_MSK 0xffffff0f
+#define RG_TR_LPF_KP_G_T1_SFT 4
+#define RG_TR_LPF_KP_G_T1_HI 7
+#define RG_TR_LPF_KP_G_T1_SZ 4
+#define RG_TR_CNT_T1_MSK 0x0000ff00
+#define RG_TR_CNT_T1_I_MSK 0xffff00ff
+#define RG_TR_CNT_T1_SFT 8
+#define RG_TR_CNT_T1_HI 15
+#define RG_TR_CNT_T1_SZ 8
+#define RG_TR_LPF_KI_G_T0_MSK 0x000f0000
+#define RG_TR_LPF_KI_G_T0_I_MSK 0xfff0ffff
+#define RG_TR_LPF_KI_G_T0_SFT 16
+#define RG_TR_LPF_KI_G_T0_HI 19
+#define RG_TR_LPF_KI_G_T0_SZ 4
+#define RG_TR_LPF_KP_G_T0_MSK 0x00f00000
+#define RG_TR_LPF_KP_G_T0_I_MSK 0xff0fffff
+#define RG_TR_LPF_KP_G_T0_SFT 20
+#define RG_TR_LPF_KP_G_T0_HI 23
+#define RG_TR_LPF_KP_G_T0_SZ 4
+#define RG_TR_CNT_T0_MSK 0xff000000
+#define RG_TR_CNT_T0_I_MSK 0x00ffffff
+#define RG_TR_CNT_T0_SFT 24
+#define RG_TR_CNT_T0_HI 31
+#define RG_TR_CNT_T0_SZ 8
+#define RG_TR_LPF_KI_G_T2_MSK 0x0000000f
+#define RG_TR_LPF_KI_G_T2_I_MSK 0xfffffff0
+#define RG_TR_LPF_KI_G_T2_SFT 0
+#define RG_TR_LPF_KI_G_T2_HI 3
+#define RG_TR_LPF_KI_G_T2_SZ 4
+#define RG_TR_LPF_KP_G_T2_MSK 0x000000f0
+#define RG_TR_LPF_KP_G_T2_I_MSK 0xffffff0f
+#define RG_TR_LPF_KP_G_T2_SFT 4
+#define RG_TR_LPF_KP_G_T2_HI 7
+#define RG_TR_LPF_KP_G_T2_SZ 4
+#define RG_TR_CNT_T2_MSK 0x0000ff00
+#define RG_TR_CNT_T2_I_MSK 0xffff00ff
+#define RG_TR_CNT_T2_SFT 8
+#define RG_TR_CNT_T2_HI 15
+#define RG_TR_CNT_T2_SZ 8
+#define RG_TR_LPF_KI_G_MSK 0x0000000f
+#define RG_TR_LPF_KI_G_I_MSK 0xfffffff0
+#define RG_TR_LPF_KI_G_SFT 0
+#define RG_TR_LPF_KI_G_HI 3
+#define RG_TR_LPF_KI_G_SZ 4
+#define RG_TR_LPF_KP_G_MSK 0x000000f0
+#define RG_TR_LPF_KP_G_I_MSK 0xffffff0f
+#define RG_TR_LPF_KP_G_SFT 4
+#define RG_TR_LPF_KP_G_HI 7
+#define RG_TR_LPF_KP_G_SZ 4
+#define RG_TR_LPF_RATE_G_MSK 0x3fffff00
+#define RG_TR_LPF_RATE_G_I_MSK 0xc00000ff
+#define RG_TR_LPF_RATE_G_SFT 8
+#define RG_TR_LPF_RATE_G_HI 29
+#define RG_TR_LPF_RATE_G_SZ 22
+#define RG_CR_LPF_KI_G_MSK 0x00000007
+#define RG_CR_LPF_KI_G_I_MSK 0xfffffff8
+#define RG_CR_LPF_KI_G_SFT 0
+#define RG_CR_LPF_KI_G_HI 2
+#define RG_CR_LPF_KI_G_SZ 3
+#define RG_SYM_BOUND_CNT_MSK 0x00007f00
+#define RG_SYM_BOUND_CNT_I_MSK 0xffff80ff
+#define RG_SYM_BOUND_CNT_SFT 8
+#define RG_SYM_BOUND_CNT_HI 14
+#define RG_SYM_BOUND_CNT_SZ 7
+#define RG_XSCOR32_RATIO_MSK 0x007f0000
+#define RG_XSCOR32_RATIO_I_MSK 0xff80ffff
+#define RG_XSCOR32_RATIO_SFT 16
+#define RG_XSCOR32_RATIO_HI 22
+#define RG_XSCOR32_RATIO_SZ 7
+#define RG_ATCOR64_CNT_LMT_MSK 0x7f000000
+#define RG_ATCOR64_CNT_LMT_I_MSK 0x80ffffff
+#define RG_ATCOR64_CNT_LMT_SFT 24
+#define RG_ATCOR64_CNT_LMT_HI 30
+#define RG_ATCOR64_CNT_LMT_SZ 7
+#define RG_ATCOR16_CNT_LMT2_MSK 0x00007f00
+#define RG_ATCOR16_CNT_LMT2_I_MSK 0xffff80ff
+#define RG_ATCOR16_CNT_LMT2_SFT 8
+#define RG_ATCOR16_CNT_LMT2_HI 14
+#define RG_ATCOR16_CNT_LMT2_SZ 7
+#define RG_ATCOR16_CNT_LMT1_MSK 0x007f0000
+#define RG_ATCOR16_CNT_LMT1_I_MSK 0xff80ffff
+#define RG_ATCOR16_CNT_LMT1_SFT 16
+#define RG_ATCOR16_CNT_LMT1_HI 22
+#define RG_ATCOR16_CNT_LMT1_SZ 7
+#define RG_ATCOR16_RATIO_SB_MSK 0x7f000000
+#define RG_ATCOR16_RATIO_SB_I_MSK 0x80ffffff
+#define RG_ATCOR16_RATIO_SB_SFT 24
+#define RG_ATCOR16_RATIO_SB_HI 30
+#define RG_ATCOR16_RATIO_SB_SZ 7
+#define RG_XSCOR64_CNT_LMT2_MSK 0x007f0000
+#define RG_XSCOR64_CNT_LMT2_I_MSK 0xff80ffff
+#define RG_XSCOR64_CNT_LMT2_SFT 16
+#define RG_XSCOR64_CNT_LMT2_HI 22
+#define RG_XSCOR64_CNT_LMT2_SZ 7
+#define RG_XSCOR64_CNT_LMT1_MSK 0x7f000000
+#define RG_XSCOR64_CNT_LMT1_I_MSK 0x80ffffff
+#define RG_XSCOR64_CNT_LMT1_SFT 24
+#define RG_XSCOR64_CNT_LMT1_HI 30
+#define RG_XSCOR64_CNT_LMT1_SZ 7
+#define RG_RX_FFT_SCALE_MSK 0x000003ff
+#define RG_RX_FFT_SCALE_I_MSK 0xfffffc00
+#define RG_RX_FFT_SCALE_SFT 0
+#define RG_RX_FFT_SCALE_HI 9
+#define RG_RX_FFT_SCALE_SZ 10
+#define RG_VITERBI_AB_SWAP_MSK 0x00010000
+#define RG_VITERBI_AB_SWAP_I_MSK 0xfffeffff
+#define RG_VITERBI_AB_SWAP_SFT 16
+#define RG_VITERBI_AB_SWAP_HI 16
+#define RG_VITERBI_AB_SWAP_SZ 1
+#define RG_ATCOR16_CNT_TH_MSK 0x0f000000
+#define RG_ATCOR16_CNT_TH_I_MSK 0xf0ffffff
+#define RG_ATCOR16_CNT_TH_SFT 24
+#define RG_ATCOR16_CNT_TH_HI 27
+#define RG_ATCOR16_CNT_TH_SZ 4
+#define RG_NORMSQUARE_LOW_SNR_7_MSK 0x000000ff
+#define RG_NORMSQUARE_LOW_SNR_7_I_MSK 0xffffff00
+#define RG_NORMSQUARE_LOW_SNR_7_SFT 0
+#define RG_NORMSQUARE_LOW_SNR_7_HI 7
+#define RG_NORMSQUARE_LOW_SNR_7_SZ 8
+#define RG_NORMSQUARE_LOW_SNR_6_MSK 0x0000ff00
+#define RG_NORMSQUARE_LOW_SNR_6_I_MSK 0xffff00ff
+#define RG_NORMSQUARE_LOW_SNR_6_SFT 8
+#define RG_NORMSQUARE_LOW_SNR_6_HI 15
+#define RG_NORMSQUARE_LOW_SNR_6_SZ 8
+#define RG_NORMSQUARE_LOW_SNR_5_MSK 0x00ff0000
+#define RG_NORMSQUARE_LOW_SNR_5_I_MSK 0xff00ffff
+#define RG_NORMSQUARE_LOW_SNR_5_SFT 16
+#define RG_NORMSQUARE_LOW_SNR_5_HI 23
+#define RG_NORMSQUARE_LOW_SNR_5_SZ 8
+#define RG_NORMSQUARE_LOW_SNR_4_MSK 0xff000000
+#define RG_NORMSQUARE_LOW_SNR_4_I_MSK 0x00ffffff
+#define RG_NORMSQUARE_LOW_SNR_4_SFT 24
+#define RG_NORMSQUARE_LOW_SNR_4_HI 31
+#define RG_NORMSQUARE_LOW_SNR_4_SZ 8
+#define RG_NORMSQUARE_LOW_SNR_8_MSK 0xff000000
+#define RG_NORMSQUARE_LOW_SNR_8_I_MSK 0x00ffffff
+#define RG_NORMSQUARE_LOW_SNR_8_SFT 24
+#define RG_NORMSQUARE_LOW_SNR_8_HI 31
+#define RG_NORMSQUARE_LOW_SNR_8_SZ 8
+#define RG_NORMSQUARE_SNR_3_MSK 0x000000ff
+#define RG_NORMSQUARE_SNR_3_I_MSK 0xffffff00
+#define RG_NORMSQUARE_SNR_3_SFT 0
+#define RG_NORMSQUARE_SNR_3_HI 7
+#define RG_NORMSQUARE_SNR_3_SZ 8
+#define RG_NORMSQUARE_SNR_2_MSK 0x0000ff00
+#define RG_NORMSQUARE_SNR_2_I_MSK 0xffff00ff
+#define RG_NORMSQUARE_SNR_2_SFT 8
+#define RG_NORMSQUARE_SNR_2_HI 15
+#define RG_NORMSQUARE_SNR_2_SZ 8
+#define RG_NORMSQUARE_SNR_1_MSK 0x00ff0000
+#define RG_NORMSQUARE_SNR_1_I_MSK 0xff00ffff
+#define RG_NORMSQUARE_SNR_1_SFT 16
+#define RG_NORMSQUARE_SNR_1_HI 23
+#define RG_NORMSQUARE_SNR_1_SZ 8
+#define RG_NORMSQUARE_SNR_0_MSK 0xff000000
+#define RG_NORMSQUARE_SNR_0_I_MSK 0x00ffffff
+#define RG_NORMSQUARE_SNR_0_SFT 24
+#define RG_NORMSQUARE_SNR_0_HI 31
+#define RG_NORMSQUARE_SNR_0_SZ 8
+#define RG_NORMSQUARE_SNR_7_MSK 0x000000ff
+#define RG_NORMSQUARE_SNR_7_I_MSK 0xffffff00
+#define RG_NORMSQUARE_SNR_7_SFT 0
+#define RG_NORMSQUARE_SNR_7_HI 7
+#define RG_NORMSQUARE_SNR_7_SZ 8
+#define RG_NORMSQUARE_SNR_6_MSK 0x0000ff00
+#define RG_NORMSQUARE_SNR_6_I_MSK 0xffff00ff
+#define RG_NORMSQUARE_SNR_6_SFT 8
+#define RG_NORMSQUARE_SNR_6_HI 15
+#define RG_NORMSQUARE_SNR_6_SZ 8
+#define RG_NORMSQUARE_SNR_5_MSK 0x00ff0000
+#define RG_NORMSQUARE_SNR_5_I_MSK 0xff00ffff
+#define RG_NORMSQUARE_SNR_5_SFT 16
+#define RG_NORMSQUARE_SNR_5_HI 23
+#define RG_NORMSQUARE_SNR_5_SZ 8
+#define RG_NORMSQUARE_SNR_4_MSK 0xff000000
+#define RG_NORMSQUARE_SNR_4_I_MSK 0x00ffffff
+#define RG_NORMSQUARE_SNR_4_SFT 24
+#define RG_NORMSQUARE_SNR_4_HI 31
+#define RG_NORMSQUARE_SNR_4_SZ 8
+#define RG_NORMSQUARE_SNR_8_MSK 0xff000000
+#define RG_NORMSQUARE_SNR_8_I_MSK 0x00ffffff
+#define RG_NORMSQUARE_SNR_8_SFT 24
+#define RG_NORMSQUARE_SNR_8_HI 31
+#define RG_NORMSQUARE_SNR_8_SZ 8
+#define RG_SNR_TH_64QAM_MSK 0x0000007f
+#define RG_SNR_TH_64QAM_I_MSK 0xffffff80
+#define RG_SNR_TH_64QAM_SFT 0
+#define RG_SNR_TH_64QAM_HI 6
+#define RG_SNR_TH_64QAM_SZ 7
+#define RG_SNR_TH_16QAM_MSK 0x00007f00
+#define RG_SNR_TH_16QAM_I_MSK 0xffff80ff
+#define RG_SNR_TH_16QAM_SFT 8
+#define RG_SNR_TH_16QAM_HI 14
+#define RG_SNR_TH_16QAM_SZ 7
+#define RG_ATCOR16_CNT_PLUS_LMT2_MSK 0x0000007f
+#define RG_ATCOR16_CNT_PLUS_LMT2_I_MSK 0xffffff80
+#define RG_ATCOR16_CNT_PLUS_LMT2_SFT 0
+#define RG_ATCOR16_CNT_PLUS_LMT2_HI 6
+#define RG_ATCOR16_CNT_PLUS_LMT2_SZ 7
+#define RG_ATCOR16_CNT_PLUS_LMT1_MSK 0x00007f00
+#define RG_ATCOR16_CNT_PLUS_LMT1_I_MSK 0xffff80ff
+#define RG_ATCOR16_CNT_PLUS_LMT1_SFT 8
+#define RG_ATCOR16_CNT_PLUS_LMT1_HI 14
+#define RG_ATCOR16_CNT_PLUS_LMT1_SZ 7
+#define RG_SYM_BOUND_METHOD_MSK 0x00030000
+#define RG_SYM_BOUND_METHOD_I_MSK 0xfffcffff
+#define RG_SYM_BOUND_METHOD_SFT 16
+#define RG_SYM_BOUND_METHOD_HI 17
+#define RG_SYM_BOUND_METHOD_SZ 2
+#define RG_PWRON_DLY_TH_11GN_MSK 0x000000ff
+#define RG_PWRON_DLY_TH_11GN_I_MSK 0xffffff00
+#define RG_PWRON_DLY_TH_11GN_SFT 0
+#define RG_PWRON_DLY_TH_11GN_HI 7
+#define RG_PWRON_DLY_TH_11GN_SZ 8
+#define RG_SB_START_CNT_MSK 0x00007f00
+#define RG_SB_START_CNT_I_MSK 0xffff80ff
+#define RG_SB_START_CNT_SFT 8
+#define RG_SB_START_CNT_HI 14
+#define RG_SB_START_CNT_SZ 7
+#define RG_POW16_CNT_TH_MSK 0x000000f0
+#define RG_POW16_CNT_TH_I_MSK 0xffffff0f
+#define RG_POW16_CNT_TH_SFT 4
+#define RG_POW16_CNT_TH_HI 7
+#define RG_POW16_CNT_TH_SZ 4
+#define RG_POW16_SHORT_CNT_LMT_MSK 0x00000700
+#define RG_POW16_SHORT_CNT_LMT_I_MSK 0xfffff8ff
+#define RG_POW16_SHORT_CNT_LMT_SFT 8
+#define RG_POW16_SHORT_CNT_LMT_HI 10
+#define RG_POW16_SHORT_CNT_LMT_SZ 3
+#define RG_POW16_TH_L_MSK 0x7f000000
+#define RG_POW16_TH_L_I_MSK 0x80ffffff
+#define RG_POW16_TH_L_SFT 24
+#define RG_POW16_TH_L_HI 30
+#define RG_POW16_TH_L_SZ 7
+#define RG_XSCOR16_SHORT_CNT_LMT_MSK 0x00000007
+#define RG_XSCOR16_SHORT_CNT_LMT_I_MSK 0xfffffff8
+#define RG_XSCOR16_SHORT_CNT_LMT_SFT 0
+#define RG_XSCOR16_SHORT_CNT_LMT_HI 2
+#define RG_XSCOR16_SHORT_CNT_LMT_SZ 3
+#define RG_XSCOR16_RATIO_MSK 0x00007f00
+#define RG_XSCOR16_RATIO_I_MSK 0xffff80ff
+#define RG_XSCOR16_RATIO_SFT 8
+#define RG_XSCOR16_RATIO_HI 14
+#define RG_XSCOR16_RATIO_SZ 7
+#define RG_ATCOR16_SHORT_CNT_LMT_MSK 0x00070000
+#define RG_ATCOR16_SHORT_CNT_LMT_I_MSK 0xfff8ffff
+#define RG_ATCOR16_SHORT_CNT_LMT_SFT 16
+#define RG_ATCOR16_SHORT_CNT_LMT_HI 18
+#define RG_ATCOR16_SHORT_CNT_LMT_SZ 3
+#define RG_ATCOR16_RATIO_CCD_MSK 0x7f000000
+#define RG_ATCOR16_RATIO_CCD_I_MSK 0x80ffffff
+#define RG_ATCOR16_RATIO_CCD_SFT 24
+#define RG_ATCOR16_RATIO_CCD_HI 30
+#define RG_ATCOR16_RATIO_CCD_SZ 7
+#define RG_ATCOR64_ACC_LMT_MSK 0x0000007f
+#define RG_ATCOR64_ACC_LMT_I_MSK 0xffffff80
+#define RG_ATCOR64_ACC_LMT_SFT 0
+#define RG_ATCOR64_ACC_LMT_HI 6
+#define RG_ATCOR64_ACC_LMT_SZ 7
+#define RG_ATCOR16_SHORT_CNT_LMT2_MSK 0x00070000
+#define RG_ATCOR16_SHORT_CNT_LMT2_I_MSK 0xfff8ffff
+#define RG_ATCOR16_SHORT_CNT_LMT2_SFT 16
+#define RG_ATCOR16_SHORT_CNT_LMT2_HI 18
+#define RG_ATCOR16_SHORT_CNT_LMT2_SZ 3
+#define RG_VITERBI_TB_BITS_MSK 0xff000000
+#define RG_VITERBI_TB_BITS_I_MSK 0x00ffffff
+#define RG_VITERBI_TB_BITS_SFT 24
+#define RG_VITERBI_TB_BITS_HI 31
+#define RG_VITERBI_TB_BITS_SZ 8
+#define RG_CR_CNT_UPDATE_MSK 0x000000ff
+#define RG_CR_CNT_UPDATE_I_MSK 0xffffff00
+#define RG_CR_CNT_UPDATE_SFT 0
+#define RG_CR_CNT_UPDATE_HI 7
+#define RG_CR_CNT_UPDATE_SZ 8
+#define RG_TR_CNT_UPDATE_MSK 0x00ff0000
+#define RG_TR_CNT_UPDATE_I_MSK 0xff00ffff
+#define RG_TR_CNT_UPDATE_SFT 16
+#define RG_TR_CNT_UPDATE_HI 23
+#define RG_TR_CNT_UPDATE_SZ 8
+#define RG_BYPASS_CPE_MA_MSK 0x00000010
+#define RG_BYPASS_CPE_MA_I_MSK 0xffffffef
+#define RG_BYPASS_CPE_MA_SFT 4
+#define RG_BYPASS_CPE_MA_HI 4
+#define RG_BYPASS_CPE_MA_SZ 1
+#define RG_PILOT_BNDRY_SHIFT_MSK 0x00000700
+#define RG_PILOT_BNDRY_SHIFT_I_MSK 0xfffff8ff
+#define RG_PILOT_BNDRY_SHIFT_SFT 8
+#define RG_PILOT_BNDRY_SHIFT_HI 10
+#define RG_PILOT_BNDRY_SHIFT_SZ 3
+#define RG_EQ_SHORT_GI_SHIFT_MSK 0x00007000
+#define RG_EQ_SHORT_GI_SHIFT_I_MSK 0xffff8fff
+#define RG_EQ_SHORT_GI_SHIFT_SFT 12
+#define RG_EQ_SHORT_GI_SHIFT_HI 14
+#define RG_EQ_SHORT_GI_SHIFT_SZ 3
+#define RG_FFT_WDW_SHORT_SHIFT_MSK 0x00070000
+#define RG_FFT_WDW_SHORT_SHIFT_I_MSK 0xfff8ffff
+#define RG_FFT_WDW_SHORT_SHIFT_SFT 16
+#define RG_FFT_WDW_SHORT_SHIFT_HI 18
+#define RG_FFT_WDW_SHORT_SHIFT_SZ 3
+#define RG_CHSMTH_COEF_MSK 0x00030000
+#define RG_CHSMTH_COEF_I_MSK 0xfffcffff
+#define RG_CHSMTH_COEF_SFT 16
+#define RG_CHSMTH_COEF_HI 17
+#define RG_CHSMTH_COEF_SZ 2
+#define RG_CHSMTH_EN_MSK 0x00040000
+#define RG_CHSMTH_EN_I_MSK 0xfffbffff
+#define RG_CHSMTH_EN_SFT 18
+#define RG_CHSMTH_EN_HI 18
+#define RG_CHSMTH_EN_SZ 1
+#define RG_CHEST_DD_FACTOR_MSK 0x07000000
+#define RG_CHEST_DD_FACTOR_I_MSK 0xf8ffffff
+#define RG_CHEST_DD_FACTOR_SFT 24
+#define RG_CHEST_DD_FACTOR_HI 26
+#define RG_CHEST_DD_FACTOR_SZ 3
+#define RG_CH_UPDATE_MSK 0x80000000
+#define RG_CH_UPDATE_I_MSK 0x7fffffff
+#define RG_CH_UPDATE_SFT 31
+#define RG_CH_UPDATE_HI 31
+#define RG_CH_UPDATE_SZ 1
+#define RG_FMT_DET_MM_TH_MSK 0x000000ff
+#define RG_FMT_DET_MM_TH_I_MSK 0xffffff00
+#define RG_FMT_DET_MM_TH_SFT 0
+#define RG_FMT_DET_MM_TH_HI 7
+#define RG_FMT_DET_MM_TH_SZ 8
+#define RG_FMT_DET_GF_TH_MSK 0x0000ff00
+#define RG_FMT_DET_GF_TH_I_MSK 0xffff00ff
+#define RG_FMT_DET_GF_TH_SFT 8
+#define RG_FMT_DET_GF_TH_HI 15
+#define RG_FMT_DET_GF_TH_SZ 8
+#define RG_DO_NOT_CHECK_L_RATE_MSK 0x02000000
+#define RG_DO_NOT_CHECK_L_RATE_I_MSK 0xfdffffff
+#define RG_DO_NOT_CHECK_L_RATE_SFT 25
+#define RG_DO_NOT_CHECK_L_RATE_HI 25
+#define RG_DO_NOT_CHECK_L_RATE_SZ 1
+#define RG_FMT_DET_LENGTH_TH_MSK 0x0000ffff
+#define RG_FMT_DET_LENGTH_TH_I_MSK 0xffff0000
+#define RG_FMT_DET_LENGTH_TH_SFT 0
+#define RG_FMT_DET_LENGTH_TH_HI 15
+#define RG_FMT_DET_LENGTH_TH_SZ 16
+#define RG_L_LENGTH_MAX_MSK 0xffff0000
+#define RG_L_LENGTH_MAX_I_MSK 0x0000ffff
+#define RG_L_LENGTH_MAX_SFT 16
+#define RG_L_LENGTH_MAX_HI 31
+#define RG_L_LENGTH_MAX_SZ 16
+#define RG_TX_TIME_EXT_MSK 0x000000ff
+#define RG_TX_TIME_EXT_I_MSK 0xffffff00
+#define RG_TX_TIME_EXT_SFT 0
+#define RG_TX_TIME_EXT_HI 7
+#define RG_TX_TIME_EXT_SZ 8
+#define RG_MAC_DES_SPACE_MSK 0x00f00000
+#define RG_MAC_DES_SPACE_I_MSK 0xff0fffff
+#define RG_MAC_DES_SPACE_SFT 20
+#define RG_MAC_DES_SPACE_HI 23
+#define RG_MAC_DES_SPACE_SZ 4
+#define RG_TR_LPF_STBC_GF_KI_G_MSK 0x0000000f
+#define RG_TR_LPF_STBC_GF_KI_G_I_MSK 0xfffffff0
+#define RG_TR_LPF_STBC_GF_KI_G_SFT 0
+#define RG_TR_LPF_STBC_GF_KI_G_HI 3
+#define RG_TR_LPF_STBC_GF_KI_G_SZ 4
+#define RG_TR_LPF_STBC_GF_KP_G_MSK 0x000000f0
+#define RG_TR_LPF_STBC_GF_KP_G_I_MSK 0xffffff0f
+#define RG_TR_LPF_STBC_GF_KP_G_SFT 4
+#define RG_TR_LPF_STBC_GF_KP_G_HI 7
+#define RG_TR_LPF_STBC_GF_KP_G_SZ 4
+#define RG_TR_LPF_STBC_MF_KI_G_MSK 0x00000f00
+#define RG_TR_LPF_STBC_MF_KI_G_I_MSK 0xfffff0ff
+#define RG_TR_LPF_STBC_MF_KI_G_SFT 8
+#define RG_TR_LPF_STBC_MF_KI_G_HI 11
+#define RG_TR_LPF_STBC_MF_KI_G_SZ 4
+#define RG_TR_LPF_STBC_MF_KP_G_MSK 0x0000f000
+#define RG_TR_LPF_STBC_MF_KP_G_I_MSK 0xffff0fff
+#define RG_TR_LPF_STBC_MF_KP_G_SFT 12
+#define RG_TR_LPF_STBC_MF_KP_G_HI 15
+#define RG_TR_LPF_STBC_MF_KP_G_SZ 4
+#define RG_MODE_REG_IN_80_MSK 0x0001ffff
+#define RG_MODE_REG_IN_80_I_MSK 0xfffe0000
+#define RG_MODE_REG_IN_80_SFT 0
+#define RG_MODE_REG_IN_80_HI 16
+#define RG_MODE_REG_IN_80_SZ 17
+#define RG_PARALLEL_DR_80_MSK 0x00100000
+#define RG_PARALLEL_DR_80_I_MSK 0xffefffff
+#define RG_PARALLEL_DR_80_SFT 20
+#define RG_PARALLEL_DR_80_HI 20
+#define RG_PARALLEL_DR_80_SZ 1
+#define RG_MBRUN_80_MSK 0x01000000
+#define RG_MBRUN_80_I_MSK 0xfeffffff
+#define RG_MBRUN_80_SFT 24
+#define RG_MBRUN_80_HI 24
+#define RG_MBRUN_80_SZ 1
+#define RG_SHIFT_DR_80_MSK 0x10000000
+#define RG_SHIFT_DR_80_I_MSK 0xefffffff
+#define RG_SHIFT_DR_80_SFT 28
+#define RG_SHIFT_DR_80_HI 28
+#define RG_SHIFT_DR_80_SZ 1
+#define RG_MODE_REG_SI_80_MSK 0x20000000
+#define RG_MODE_REG_SI_80_I_MSK 0xdfffffff
+#define RG_MODE_REG_SI_80_SFT 29
+#define RG_MODE_REG_SI_80_HI 29
+#define RG_MODE_REG_SI_80_SZ 1
+#define RG_SIMULATION_MODE_80_MSK 0x40000000
+#define RG_SIMULATION_MODE_80_I_MSK 0xbfffffff
+#define RG_SIMULATION_MODE_80_SFT 30
+#define RG_SIMULATION_MODE_80_HI 30
+#define RG_SIMULATION_MODE_80_SZ 1
+#define RG_DBIST_MODE_80_MSK 0x80000000
+#define RG_DBIST_MODE_80_I_MSK 0x7fffffff
+#define RG_DBIST_MODE_80_SFT 31
+#define RG_DBIST_MODE_80_HI 31
+#define RG_DBIST_MODE_80_SZ 1
+#define RG_MODE_REG_IN_64_MSK 0x0000ffff
+#define RG_MODE_REG_IN_64_I_MSK 0xffff0000
+#define RG_MODE_REG_IN_64_SFT 0
+#define RG_MODE_REG_IN_64_HI 15
+#define RG_MODE_REG_IN_64_SZ 16
+#define RG_PARALLEL_DR_64_MSK 0x00100000
+#define RG_PARALLEL_DR_64_I_MSK 0xffefffff
+#define RG_PARALLEL_DR_64_SFT 20
+#define RG_PARALLEL_DR_64_HI 20
+#define RG_PARALLEL_DR_64_SZ 1
+#define RG_MBRUN_64_MSK 0x01000000
+#define RG_MBRUN_64_I_MSK 0xfeffffff
+#define RG_MBRUN_64_SFT 24
+#define RG_MBRUN_64_HI 24
+#define RG_MBRUN_64_SZ 1
+#define RG_SHIFT_DR_64_MSK 0x10000000
+#define RG_SHIFT_DR_64_I_MSK 0xefffffff
+#define RG_SHIFT_DR_64_SFT 28
+#define RG_SHIFT_DR_64_HI 28
+#define RG_SHIFT_DR_64_SZ 1
+#define RG_MODE_REG_SI_64_MSK 0x20000000
+#define RG_MODE_REG_SI_64_I_MSK 0xdfffffff
+#define RG_MODE_REG_SI_64_SFT 29
+#define RG_MODE_REG_SI_64_HI 29
+#define RG_MODE_REG_SI_64_SZ 1
+#define RG_SIMULATION_MODE_64_MSK 0x40000000
+#define RG_SIMULATION_MODE_64_I_MSK 0xbfffffff
+#define RG_SIMULATION_MODE_64_SFT 30
+#define RG_SIMULATION_MODE_64_HI 30
+#define RG_SIMULATION_MODE_64_SZ 1
+#define RG_DBIST_MODE_64_MSK 0x80000000
+#define RG_DBIST_MODE_64_I_MSK 0x7fffffff
+#define RG_DBIST_MODE_64_SFT 31
+#define RG_DBIST_MODE_64_HI 31
+#define RG_DBIST_MODE_64_SZ 1
+#define RO_MODE_REG_OUT_80_MSK 0x0001ffff
+#define RO_MODE_REG_OUT_80_I_MSK 0xfffe0000
+#define RO_MODE_REG_OUT_80_SFT 0
+#define RO_MODE_REG_OUT_80_HI 16
+#define RO_MODE_REG_OUT_80_SZ 17
+#define RO_MODE_REG_SO_80_MSK 0x01000000
+#define RO_MODE_REG_SO_80_I_MSK 0xfeffffff
+#define RO_MODE_REG_SO_80_SFT 24
+#define RO_MODE_REG_SO_80_HI 24
+#define RO_MODE_REG_SO_80_SZ 1
+#define RO_MONITOR_BUS_80_MSK 0x003fffff
+#define RO_MONITOR_BUS_80_I_MSK 0xffc00000
+#define RO_MONITOR_BUS_80_SFT 0
+#define RO_MONITOR_BUS_80_HI 21
+#define RO_MONITOR_BUS_80_SZ 22
+#define RO_MODE_REG_OUT_64_MSK 0x0000ffff
+#define RO_MODE_REG_OUT_64_I_MSK 0xffff0000
+#define RO_MODE_REG_OUT_64_SFT 0
+#define RO_MODE_REG_OUT_64_HI 15
+#define RO_MODE_REG_OUT_64_SZ 16
+#define RO_MODE_REG_SO_64_MSK 0x01000000
+#define RO_MODE_REG_SO_64_I_MSK 0xfeffffff
+#define RO_MODE_REG_SO_64_SFT 24
+#define RO_MODE_REG_SO_64_HI 24
+#define RO_MODE_REG_SO_64_SZ 1
+#define RO_MONITOR_BUS_64_MSK 0x0007ffff
+#define RO_MONITOR_BUS_64_I_MSK 0xfff80000
+#define RO_MONITOR_BUS_64_SFT 0
+#define RO_MONITOR_BUS_64_HI 18
+#define RO_MONITOR_BUS_64_SZ 19
+#define RO_SPECTRUM_DATA_MSK 0xffffffff
+#define RO_SPECTRUM_DATA_I_MSK 0x00000000
+#define RO_SPECTRUM_DATA_SFT 0
+#define RO_SPECTRUM_DATA_HI 31
+#define RO_SPECTRUM_DATA_SZ 32
+#define GN_SNR_MSK 0x0000007f
+#define GN_SNR_I_MSK 0xffffff80
+#define GN_SNR_SFT 0
+#define GN_SNR_HI 6
+#define GN_SNR_SZ 7
+#define GN_NOISE_PWR_MSK 0x00007f00
+#define GN_NOISE_PWR_I_MSK 0xffff80ff
+#define GN_NOISE_PWR_SFT 8
+#define GN_NOISE_PWR_HI 14
+#define GN_NOISE_PWR_SZ 7
+#define GN_RCPI_MSK 0x007f0000
+#define GN_RCPI_I_MSK 0xff80ffff
+#define GN_RCPI_SFT 16
+#define GN_RCPI_HI 22
+#define GN_RCPI_SZ 7
+#define GN_SIGNAL_PWR_MSK 0x7f000000
+#define GN_SIGNAL_PWR_I_MSK 0x80ffffff
+#define GN_SIGNAL_PWR_SFT 24
+#define GN_SIGNAL_PWR_HI 30
+#define GN_SIGNAL_PWR_SZ 7
+#define RO_FREQ_OS_LTS_MSK 0x00007fff
+#define RO_FREQ_OS_LTS_I_MSK 0xffff8000
+#define RO_FREQ_OS_LTS_SFT 0
+#define RO_FREQ_OS_LTS_HI 14
+#define RO_FREQ_OS_LTS_SZ 15
+#define CSTATE_MSK 0x000f0000
+#define CSTATE_I_MSK 0xfff0ffff
+#define CSTATE_SFT 16
+#define CSTATE_HI 19
+#define CSTATE_SZ 4
+#define SIGNAL_FIELD0_MSK 0x00ffffff
+#define SIGNAL_FIELD0_I_MSK 0xff000000
+#define SIGNAL_FIELD0_SFT 0
+#define SIGNAL_FIELD0_HI 23
+#define SIGNAL_FIELD0_SZ 24
+#define SIGNAL_FIELD1_MSK 0x00ffffff
+#define SIGNAL_FIELD1_I_MSK 0xff000000
+#define SIGNAL_FIELD1_SFT 0
+#define SIGNAL_FIELD1_HI 23
+#define SIGNAL_FIELD1_SZ 24
+#define GN_PACKET_ERR_CNT_MSK 0x0000ffff
+#define GN_PACKET_ERR_CNT_I_MSK 0xffff0000
+#define GN_PACKET_ERR_CNT_SFT 0
+#define GN_PACKET_ERR_CNT_HI 15
+#define GN_PACKET_ERR_CNT_SZ 16
+#define GN_PACKET_CNT_MSK 0x0000ffff
+#define GN_PACKET_CNT_I_MSK 0xffff0000
+#define GN_PACKET_CNT_SFT 0
+#define GN_PACKET_CNT_HI 15
+#define GN_PACKET_CNT_SZ 16
+#define GN_CCA_CNT_MSK 0xffff0000
+#define GN_CCA_CNT_I_MSK 0x0000ffff
+#define GN_CCA_CNT_SFT 16
+#define GN_CCA_CNT_HI 31
+#define GN_CCA_CNT_SZ 16
+#define GN_LENGTH_FIELD_MSK 0x0000ffff
+#define GN_LENGTH_FIELD_I_MSK 0xffff0000
+#define GN_LENGTH_FIELD_SFT 0
+#define GN_LENGTH_FIELD_HI 15
+#define GN_LENGTH_FIELD_SZ 16
+#define GN_SERVICE_FIELD_MSK 0xffff0000
+#define GN_SERVICE_FIELD_I_MSK 0x0000ffff
+#define GN_SERVICE_FIELD_SFT 16
+#define GN_SERVICE_FIELD_HI 31
+#define GN_SERVICE_FIELD_SZ 16
+#define RO_HT_MCS_40M_MSK 0x0000007f
+#define RO_HT_MCS_40M_I_MSK 0xffffff80
+#define RO_HT_MCS_40M_SFT 0
+#define RO_HT_MCS_40M_HI 6
+#define RO_HT_MCS_40M_SZ 7
+#define RO_L_RATE_40M_MSK 0x00003f00
+#define RO_L_RATE_40M_I_MSK 0xffffc0ff
+#define RO_L_RATE_40M_SFT 8
+#define RO_L_RATE_40M_HI 13
+#define RO_L_RATE_40M_SZ 6
+#define RG_DAGC_CNT_TH_MSK 0x00000003
+#define RG_DAGC_CNT_TH_I_MSK 0xfffffffc
+#define RG_DAGC_CNT_TH_SFT 0
+#define RG_DAGC_CNT_TH_HI 1
+#define RG_DAGC_CNT_TH_SZ 2
+#define RG_PACKET_STAT_EN_11GN_MSK 0x00100000
+#define RG_PACKET_STAT_EN_11GN_I_MSK 0xffefffff
+#define RG_PACKET_STAT_EN_11GN_SFT 20
+#define RG_PACKET_STAT_EN_11GN_HI 20
+#define RG_PACKET_STAT_EN_11GN_SZ 1
+#define RX_PHY_11GN_SOFT_RST_N_MSK 0x00000001
+#define RX_PHY_11GN_SOFT_RST_N_I_MSK 0xfffffffe
+#define RX_PHY_11GN_SOFT_RST_N_SFT 0
+#define RX_PHY_11GN_SOFT_RST_N_HI 0
+#define RX_PHY_11GN_SOFT_RST_N_SZ 1
+#define RG_RIFS_EN_MSK 0x00000002
+#define RG_RIFS_EN_I_MSK 0xfffffffd
+#define RG_RIFS_EN_SFT 1
+#define RG_RIFS_EN_HI 1
+#define RG_RIFS_EN_SZ 1
+#define RG_STBC_EN_MSK 0x00000004
+#define RG_STBC_EN_I_MSK 0xfffffffb
+#define RG_STBC_EN_SFT 2
+#define RG_STBC_EN_HI 2
+#define RG_STBC_EN_SZ 1
+#define RG_COR_SEL_MSK 0x00000008
+#define RG_COR_SEL_I_MSK 0xfffffff7
+#define RG_COR_SEL_SFT 3
+#define RG_COR_SEL_HI 3
+#define RG_COR_SEL_SZ 1
+#define RG_INI_PHASE_MSK 0x00000030
+#define RG_INI_PHASE_I_MSK 0xffffffcf
+#define RG_INI_PHASE_SFT 4
+#define RG_INI_PHASE_HI 5
+#define RG_INI_PHASE_SZ 2
+#define RG_HT_LTF_SEL_EQ_MSK 0x00000040
+#define RG_HT_LTF_SEL_EQ_I_MSK 0xffffffbf
+#define RG_HT_LTF_SEL_EQ_SFT 6
+#define RG_HT_LTF_SEL_EQ_HI 6
+#define RG_HT_LTF_SEL_EQ_SZ 1
+#define RG_HT_LTF_SEL_PILOT_MSK 0x00000080
+#define RG_HT_LTF_SEL_PILOT_I_MSK 0xffffff7f
+#define RG_HT_LTF_SEL_PILOT_SFT 7
+#define RG_HT_LTF_SEL_PILOT_HI 7
+#define RG_HT_LTF_SEL_PILOT_SZ 1
+#define RG_CCA_PWR_SEL_MSK 0x00000200
+#define RG_CCA_PWR_SEL_I_MSK 0xfffffdff
+#define RG_CCA_PWR_SEL_SFT 9
+#define RG_CCA_PWR_SEL_HI 9
+#define RG_CCA_PWR_SEL_SZ 1
+#define RG_CCA_XSCOR_PWR_SEL_MSK 0x00000400
+#define RG_CCA_XSCOR_PWR_SEL_I_MSK 0xfffffbff
+#define RG_CCA_XSCOR_PWR_SEL_SFT 10
+#define RG_CCA_XSCOR_PWR_SEL_HI 10
+#define RG_CCA_XSCOR_PWR_SEL_SZ 1
+#define RG_CCA_XSCOR_AVGPWR_SEL_MSK 0x00000800
+#define RG_CCA_XSCOR_AVGPWR_SEL_I_MSK 0xfffff7ff
+#define RG_CCA_XSCOR_AVGPWR_SEL_SFT 11
+#define RG_CCA_XSCOR_AVGPWR_SEL_HI 11
+#define RG_CCA_XSCOR_AVGPWR_SEL_SZ 1
+#define RG_DEBUG_SEL_MSK 0x0000f000
+#define RG_DEBUG_SEL_I_MSK 0xffff0fff
+#define RG_DEBUG_SEL_SFT 12
+#define RG_DEBUG_SEL_HI 15
+#define RG_DEBUG_SEL_SZ 4
+#define RG_POST_CLK_EN_MSK 0x00010000
+#define RG_POST_CLK_EN_I_MSK 0xfffeffff
+#define RG_POST_CLK_EN_SFT 16
+#define RG_POST_CLK_EN_HI 16
+#define RG_POST_CLK_EN_SZ 1
+#define IQCAL_RF_TX_EN_MSK 0x00000001
+#define IQCAL_RF_TX_EN_I_MSK 0xfffffffe
+#define IQCAL_RF_TX_EN_SFT 0
+#define IQCAL_RF_TX_EN_HI 0
+#define IQCAL_RF_TX_EN_SZ 1
+#define IQCAL_RF_TX_PA_EN_MSK 0x00000002
+#define IQCAL_RF_TX_PA_EN_I_MSK 0xfffffffd
+#define IQCAL_RF_TX_PA_EN_SFT 1
+#define IQCAL_RF_TX_PA_EN_HI 1
+#define IQCAL_RF_TX_PA_EN_SZ 1
+#define IQCAL_RF_TX_DAC_EN_MSK 0x00000004
+#define IQCAL_RF_TX_DAC_EN_I_MSK 0xfffffffb
+#define IQCAL_RF_TX_DAC_EN_SFT 2
+#define IQCAL_RF_TX_DAC_EN_HI 2
+#define IQCAL_RF_TX_DAC_EN_SZ 1
+#define IQCAL_RF_RX_AGC_MSK 0x00000008
+#define IQCAL_RF_RX_AGC_I_MSK 0xfffffff7
+#define IQCAL_RF_RX_AGC_SFT 3
+#define IQCAL_RF_RX_AGC_HI 3
+#define IQCAL_RF_RX_AGC_SZ 1
+#define IQCAL_RF_PGAG_MSK 0x00000f00
+#define IQCAL_RF_PGAG_I_MSK 0xfffff0ff
+#define IQCAL_RF_PGAG_SFT 8
+#define IQCAL_RF_PGAG_HI 11
+#define IQCAL_RF_PGAG_SZ 4
+#define IQCAL_RF_RFG_MSK 0x00003000
+#define IQCAL_RF_RFG_I_MSK 0xffffcfff
+#define IQCAL_RF_RFG_SFT 12
+#define IQCAL_RF_RFG_HI 13
+#define IQCAL_RF_RFG_SZ 2
+#define RG_TONEGEN_FREQ_MSK 0x007f0000
+#define RG_TONEGEN_FREQ_I_MSK 0xff80ffff
+#define RG_TONEGEN_FREQ_SFT 16
+#define RG_TONEGEN_FREQ_HI 22
+#define RG_TONEGEN_FREQ_SZ 7
+#define RG_TONEGEN_EN_MSK 0x00800000
+#define RG_TONEGEN_EN_I_MSK 0xff7fffff
+#define RG_TONEGEN_EN_SFT 23
+#define RG_TONEGEN_EN_HI 23
+#define RG_TONEGEN_EN_SZ 1
+#define RG_TONEGEN_INIT_PH_MSK 0x7f000000
+#define RG_TONEGEN_INIT_PH_I_MSK 0x80ffffff
+#define RG_TONEGEN_INIT_PH_SFT 24
+#define RG_TONEGEN_INIT_PH_HI 30
+#define RG_TONEGEN_INIT_PH_SZ 7
+#define RG_TONEGEN2_FREQ_MSK 0x0000007f
+#define RG_TONEGEN2_FREQ_I_MSK 0xffffff80
+#define RG_TONEGEN2_FREQ_SFT 0
+#define RG_TONEGEN2_FREQ_HI 6
+#define RG_TONEGEN2_FREQ_SZ 7
+#define RG_TONEGEN2_EN_MSK 0x00000080
+#define RG_TONEGEN2_EN_I_MSK 0xffffff7f
+#define RG_TONEGEN2_EN_SFT 7
+#define RG_TONEGEN2_EN_HI 7
+#define RG_TONEGEN2_EN_SZ 1
+#define RG_TONEGEN2_SCALE_MSK 0x0000ff00
+#define RG_TONEGEN2_SCALE_I_MSK 0xffff00ff
+#define RG_TONEGEN2_SCALE_SFT 8
+#define RG_TONEGEN2_SCALE_HI 15
+#define RG_TONEGEN2_SCALE_SZ 8
+#define RG_TXIQ_CLP_THD_I_MSK 0x000003ff
+#define RG_TXIQ_CLP_THD_I_I_MSK 0xfffffc00
+#define RG_TXIQ_CLP_THD_I_SFT 0
+#define RG_TXIQ_CLP_THD_I_HI 9
+#define RG_TXIQ_CLP_THD_I_SZ 10
+#define RG_TXIQ_CLP_THD_Q_MSK 0x03ff0000
+#define RG_TXIQ_CLP_THD_Q_I_MSK 0xfc00ffff
+#define RG_TXIQ_CLP_THD_Q_SFT 16
+#define RG_TXIQ_CLP_THD_Q_HI 25
+#define RG_TXIQ_CLP_THD_Q_SZ 10
+#define RG_TX_I_SCALE_MSK 0x000000ff
+#define RG_TX_I_SCALE_I_MSK 0xffffff00
+#define RG_TX_I_SCALE_SFT 0
+#define RG_TX_I_SCALE_HI 7
+#define RG_TX_I_SCALE_SZ 8
+#define RG_TX_Q_SCALE_MSK 0x0000ff00
+#define RG_TX_Q_SCALE_I_MSK 0xffff00ff
+#define RG_TX_Q_SCALE_SFT 8
+#define RG_TX_Q_SCALE_HI 15
+#define RG_TX_Q_SCALE_SZ 8
+#define RG_TX_IQ_SWP_MSK 0x00010000
+#define RG_TX_IQ_SWP_I_MSK 0xfffeffff
+#define RG_TX_IQ_SWP_SFT 16
+#define RG_TX_IQ_SWP_HI 16
+#define RG_TX_IQ_SWP_SZ 1
+#define RG_TX_SGN_OUT_MSK 0x00020000
+#define RG_TX_SGN_OUT_I_MSK 0xfffdffff
+#define RG_TX_SGN_OUT_SFT 17
+#define RG_TX_SGN_OUT_HI 17
+#define RG_TX_SGN_OUT_SZ 1
+#define RG_TXIQ_EMU_IDX_MSK 0x003c0000
+#define RG_TXIQ_EMU_IDX_I_MSK 0xffc3ffff
+#define RG_TXIQ_EMU_IDX_SFT 18
+#define RG_TXIQ_EMU_IDX_HI 21
+#define RG_TXIQ_EMU_IDX_SZ 4
+#define RG_TX_IQ_SRC_MSK 0x03000000
+#define RG_TX_IQ_SRC_I_MSK 0xfcffffff
+#define RG_TX_IQ_SRC_SFT 24
+#define RG_TX_IQ_SRC_HI 25
+#define RG_TX_IQ_SRC_SZ 2
+#define RG_TX_I_DC_MSK 0x000003ff
+#define RG_TX_I_DC_I_MSK 0xfffffc00
+#define RG_TX_I_DC_SFT 0
+#define RG_TX_I_DC_HI 9
+#define RG_TX_I_DC_SZ 10
+#define RG_TX_Q_DC_MSK 0x03ff0000
+#define RG_TX_Q_DC_I_MSK 0xfc00ffff
+#define RG_TX_Q_DC_SFT 16
+#define RG_TX_Q_DC_HI 25
+#define RG_TX_Q_DC_SZ 10
+#define RG_TX_IQ_THETA_MSK 0x0000001f
+#define RG_TX_IQ_THETA_I_MSK 0xffffffe0
+#define RG_TX_IQ_THETA_SFT 0
+#define RG_TX_IQ_THETA_HI 4
+#define RG_TX_IQ_THETA_SZ 5
+#define RG_TX_IQ_ALPHA_MSK 0x00001f00
+#define RG_TX_IQ_ALPHA_I_MSK 0xffffe0ff
+#define RG_TX_IQ_ALPHA_SFT 8
+#define RG_TX_IQ_ALPHA_HI 12
+#define RG_TX_IQ_ALPHA_SZ 5
+#define RG_TXIQ_NOSHRINK_MSK 0x00002000
+#define RG_TXIQ_NOSHRINK_I_MSK 0xffffdfff
+#define RG_TXIQ_NOSHRINK_SFT 13
+#define RG_TXIQ_NOSHRINK_HI 13
+#define RG_TXIQ_NOSHRINK_SZ 1
+#define RG_TX_I_OFFSET_MSK 0x00ff0000
+#define RG_TX_I_OFFSET_I_MSK 0xff00ffff
+#define RG_TX_I_OFFSET_SFT 16
+#define RG_TX_I_OFFSET_HI 23
+#define RG_TX_I_OFFSET_SZ 8
+#define RG_TX_Q_OFFSET_MSK 0xff000000
+#define RG_TX_Q_OFFSET_I_MSK 0x00ffffff
+#define RG_TX_Q_OFFSET_SFT 24
+#define RG_TX_Q_OFFSET_HI 31
+#define RG_TX_Q_OFFSET_SZ 8
+#define RG_RX_IQ_THETA_MSK 0x0000001f
+#define RG_RX_IQ_THETA_I_MSK 0xffffffe0
+#define RG_RX_IQ_THETA_SFT 0
+#define RG_RX_IQ_THETA_HI 4
+#define RG_RX_IQ_THETA_SZ 5
+#define RG_RX_IQ_ALPHA_MSK 0x00001f00
+#define RG_RX_IQ_ALPHA_I_MSK 0xffffe0ff
+#define RG_RX_IQ_ALPHA_SFT 8
+#define RG_RX_IQ_ALPHA_HI 12
+#define RG_RX_IQ_ALPHA_SZ 5
+#define RG_RXIQ_NOSHRINK_MSK 0x00002000
+#define RG_RXIQ_NOSHRINK_I_MSK 0xffffdfff
+#define RG_RXIQ_NOSHRINK_SFT 13
+#define RG_RXIQ_NOSHRINK_HI 13
+#define RG_RXIQ_NOSHRINK_SZ 1
+#define RG_MA_DPTH_MSK 0x0000000f
+#define RG_MA_DPTH_I_MSK 0xfffffff0
+#define RG_MA_DPTH_SFT 0
+#define RG_MA_DPTH_HI 3
+#define RG_MA_DPTH_SZ 4
+#define RG_INTG_PH_MSK 0x000003f0
+#define RG_INTG_PH_I_MSK 0xfffffc0f
+#define RG_INTG_PH_SFT 4
+#define RG_INTG_PH_HI 9
+#define RG_INTG_PH_SZ 6
+#define RG_INTG_PRD_MSK 0x00001c00
+#define RG_INTG_PRD_I_MSK 0xffffe3ff
+#define RG_INTG_PRD_SFT 10
+#define RG_INTG_PRD_HI 12
+#define RG_INTG_PRD_SZ 3
+#define RG_INTG_MU_MSK 0x00006000
+#define RG_INTG_MU_I_MSK 0xffff9fff
+#define RG_INTG_MU_SFT 13
+#define RG_INTG_MU_HI 14
+#define RG_INTG_MU_SZ 2
+#define RG_IQCAL_SPRM_SELQ_MSK 0x00010000
+#define RG_IQCAL_SPRM_SELQ_I_MSK 0xfffeffff
+#define RG_IQCAL_SPRM_SELQ_SFT 16
+#define RG_IQCAL_SPRM_SELQ_HI 16
+#define RG_IQCAL_SPRM_SELQ_SZ 1
+#define RG_IQCAL_SPRM_EN_MSK 0x00020000
+#define RG_IQCAL_SPRM_EN_I_MSK 0xfffdffff
+#define RG_IQCAL_SPRM_EN_SFT 17
+#define RG_IQCAL_SPRM_EN_HI 17
+#define RG_IQCAL_SPRM_EN_SZ 1
+#define RG_IQCAL_SPRM_FREQ_MSK 0x00fc0000
+#define RG_IQCAL_SPRM_FREQ_I_MSK 0xff03ffff
+#define RG_IQCAL_SPRM_FREQ_SFT 18
+#define RG_IQCAL_SPRM_FREQ_HI 23
+#define RG_IQCAL_SPRM_FREQ_SZ 6
+#define RG_IQCAL_IQCOL_EN_MSK 0x01000000
+#define RG_IQCAL_IQCOL_EN_I_MSK 0xfeffffff
+#define RG_IQCAL_IQCOL_EN_SFT 24
+#define RG_IQCAL_IQCOL_EN_HI 24
+#define RG_IQCAL_IQCOL_EN_SZ 1
+#define RG_IQCAL_ALPHA_ESTM_EN_MSK 0x02000000
+#define RG_IQCAL_ALPHA_ESTM_EN_I_MSK 0xfdffffff
+#define RG_IQCAL_ALPHA_ESTM_EN_SFT 25
+#define RG_IQCAL_ALPHA_ESTM_EN_HI 25
+#define RG_IQCAL_ALPHA_ESTM_EN_SZ 1
+#define RG_IQCAL_DC_EN_MSK 0x04000000
+#define RG_IQCAL_DC_EN_I_MSK 0xfbffffff
+#define RG_IQCAL_DC_EN_SFT 26
+#define RG_IQCAL_DC_EN_HI 26
+#define RG_IQCAL_DC_EN_SZ 1
+#define RG_PHEST_STBY_MSK 0x08000000
+#define RG_PHEST_STBY_I_MSK 0xf7ffffff
+#define RG_PHEST_STBY_SFT 27
+#define RG_PHEST_STBY_HI 27
+#define RG_PHEST_STBY_SZ 1
+#define RG_PHEST_EN_MSK 0x10000000
+#define RG_PHEST_EN_I_MSK 0xefffffff
+#define RG_PHEST_EN_SFT 28
+#define RG_PHEST_EN_HI 28
+#define RG_PHEST_EN_SZ 1
+#define RG_GP_DIV_EN_MSK 0x20000000
+#define RG_GP_DIV_EN_I_MSK 0xdfffffff
+#define RG_GP_DIV_EN_SFT 29
+#define RG_GP_DIV_EN_HI 29
+#define RG_GP_DIV_EN_SZ 1
+#define RG_DPD_GAIN_EST_EN_MSK 0x40000000
+#define RG_DPD_GAIN_EST_EN_I_MSK 0xbfffffff
+#define RG_DPD_GAIN_EST_EN_SFT 30
+#define RG_DPD_GAIN_EST_EN_HI 30
+#define RG_DPD_GAIN_EST_EN_SZ 1
+#define RG_IQCAL_MULT_OP0_MSK 0x000003ff
+#define RG_IQCAL_MULT_OP0_I_MSK 0xfffffc00
+#define RG_IQCAL_MULT_OP0_SFT 0
+#define RG_IQCAL_MULT_OP0_HI 9
+#define RG_IQCAL_MULT_OP0_SZ 10
+#define RG_IQCAL_MULT_OP1_MSK 0x03ff0000
+#define RG_IQCAL_MULT_OP1_I_MSK 0xfc00ffff
+#define RG_IQCAL_MULT_OP1_SFT 16
+#define RG_IQCAL_MULT_OP1_HI 25
+#define RG_IQCAL_MULT_OP1_SZ 10
+#define RO_IQCAL_O_MSK 0x000fffff
+#define RO_IQCAL_O_I_MSK 0xfff00000
+#define RO_IQCAL_O_SFT 0
+#define RO_IQCAL_O_HI 19
+#define RO_IQCAL_O_SZ 20
+#define RO_IQCAL_SPRM_RDY_MSK 0x00100000
+#define RO_IQCAL_SPRM_RDY_I_MSK 0xffefffff
+#define RO_IQCAL_SPRM_RDY_SFT 20
+#define RO_IQCAL_SPRM_RDY_HI 20
+#define RO_IQCAL_SPRM_RDY_SZ 1
+#define RO_IQCAL_IQCOL_RDY_MSK 0x00200000
+#define RO_IQCAL_IQCOL_RDY_I_MSK 0xffdfffff
+#define RO_IQCAL_IQCOL_RDY_SFT 21
+#define RO_IQCAL_IQCOL_RDY_HI 21
+#define RO_IQCAL_IQCOL_RDY_SZ 1
+#define RO_IQCAL_ALPHA_ESTM_RDY_MSK 0x00400000
+#define RO_IQCAL_ALPHA_ESTM_RDY_I_MSK 0xffbfffff
+#define RO_IQCAL_ALPHA_ESTM_RDY_SFT 22
+#define RO_IQCAL_ALPHA_ESTM_RDY_HI 22
+#define RO_IQCAL_ALPHA_ESTM_RDY_SZ 1
+#define RO_IQCAL_DC_RDY_MSK 0x00800000
+#define RO_IQCAL_DC_RDY_I_MSK 0xff7fffff
+#define RO_IQCAL_DC_RDY_SFT 23
+#define RO_IQCAL_DC_RDY_HI 23
+#define RO_IQCAL_DC_RDY_SZ 1
+#define RO_IQCAL_MULT_RDY_MSK 0x01000000
+#define RO_IQCAL_MULT_RDY_I_MSK 0xfeffffff
+#define RO_IQCAL_MULT_RDY_SFT 24
+#define RO_IQCAL_MULT_RDY_HI 24
+#define RO_IQCAL_MULT_RDY_SZ 1
+#define RO_FFT_ENRG_RDY_MSK 0x02000000
+#define RO_FFT_ENRG_RDY_I_MSK 0xfdffffff
+#define RO_FFT_ENRG_RDY_SFT 25
+#define RO_FFT_ENRG_RDY_HI 25
+#define RO_FFT_ENRG_RDY_SZ 1
+#define RO_PHEST_RDY_MSK 0x04000000
+#define RO_PHEST_RDY_I_MSK 0xfbffffff
+#define RO_PHEST_RDY_SFT 26
+#define RO_PHEST_RDY_HI 26
+#define RO_PHEST_RDY_SZ 1
+#define RO_GP_DIV_RDY_MSK 0x08000000
+#define RO_GP_DIV_RDY_I_MSK 0xf7ffffff
+#define RO_GP_DIV_RDY_SFT 27
+#define RO_GP_DIV_RDY_HI 27
+#define RO_GP_DIV_RDY_SZ 1
+#define RO_GAIN_EST_RDY_MSK 0x10000000
+#define RO_GAIN_EST_RDY_I_MSK 0xefffffff
+#define RO_GAIN_EST_RDY_SFT 28
+#define RO_GAIN_EST_RDY_HI 28
+#define RO_GAIN_EST_RDY_SZ 1
+#define RO_AMP_O_MSK 0x000001ff
+#define RO_AMP_O_I_MSK 0xfffffe00
+#define RO_AMP_O_SFT 0
+#define RO_AMP_O_HI 8
+#define RO_AMP_O_SZ 9
+#define RG_RX_I_SCALE_MSK 0x000000ff
+#define RG_RX_I_SCALE_I_MSK 0xffffff00
+#define RG_RX_I_SCALE_SFT 0
+#define RG_RX_I_SCALE_HI 7
+#define RG_RX_I_SCALE_SZ 8
+#define RG_RX_Q_SCALE_MSK 0x0000ff00
+#define RG_RX_Q_SCALE_I_MSK 0xffff00ff
+#define RG_RX_Q_SCALE_SFT 8
+#define RG_RX_Q_SCALE_HI 15
+#define RG_RX_Q_SCALE_SZ 8
+#define RG_RX_I_OFFSET_MSK 0x00ff0000
+#define RG_RX_I_OFFSET_I_MSK 0xff00ffff
+#define RG_RX_I_OFFSET_SFT 16
+#define RG_RX_I_OFFSET_HI 23
+#define RG_RX_I_OFFSET_SZ 8
+#define RG_RX_Q_OFFSET_MSK 0xff000000
+#define RG_RX_Q_OFFSET_I_MSK 0x00ffffff
+#define RG_RX_Q_OFFSET_SFT 24
+#define RG_RX_Q_OFFSET_HI 31
+#define RG_RX_Q_OFFSET_SZ 8
+#define RG_RX_IQ_SWP_MSK 0x00000001
+#define RG_RX_IQ_SWP_I_MSK 0xfffffffe
+#define RG_RX_IQ_SWP_SFT 0
+#define RG_RX_IQ_SWP_HI 0
+#define RG_RX_IQ_SWP_SZ 1
+#define RG_RX_SGN_IN_MSK 0x00000002
+#define RG_RX_SGN_IN_I_MSK 0xfffffffd
+#define RG_RX_SGN_IN_SFT 1
+#define RG_RX_SGN_IN_HI 1
+#define RG_RX_SGN_IN_SZ 1
+#define RG_RX_IQ_SRC_MSK 0x0000000c
+#define RG_RX_IQ_SRC_I_MSK 0xfffffff3
+#define RG_RX_IQ_SRC_SFT 2
+#define RG_RX_IQ_SRC_HI 3
+#define RG_RX_IQ_SRC_SZ 2
+#define RG_ACI_GAIN_MSK 0x00000ff0
+#define RG_ACI_GAIN_I_MSK 0xfffff00f
+#define RG_ACI_GAIN_SFT 4
+#define RG_ACI_GAIN_HI 11
+#define RG_ACI_GAIN_SZ 8
+#define RG_FFT_EN_MSK 0x00001000
+#define RG_FFT_EN_I_MSK 0xffffefff
+#define RG_FFT_EN_SFT 12
+#define RG_FFT_EN_HI 12
+#define RG_FFT_EN_SZ 1
+#define RG_FFT_MOD_MSK 0x00002000
+#define RG_FFT_MOD_I_MSK 0xffffdfff
+#define RG_FFT_MOD_SFT 13
+#define RG_FFT_MOD_HI 13
+#define RG_FFT_MOD_SZ 1
+#define RG_FFT_SCALE_MSK 0x00ffc000
+#define RG_FFT_SCALE_I_MSK 0xff003fff
+#define RG_FFT_SCALE_SFT 14
+#define RG_FFT_SCALE_HI 23
+#define RG_FFT_SCALE_SZ 10
+#define RG_FFT_ENRG_FREQ_MSK 0x3f000000
+#define RG_FFT_ENRG_FREQ_I_MSK 0xc0ffffff
+#define RG_FFT_ENRG_FREQ_SFT 24
+#define RG_FFT_ENRG_FREQ_HI 29
+#define RG_FFT_ENRG_FREQ_SZ 6
+#define RG_FPGA_80M_PH_UP_MSK 0x40000000
+#define RG_FPGA_80M_PH_UP_I_MSK 0xbfffffff
+#define RG_FPGA_80M_PH_UP_SFT 30
+#define RG_FPGA_80M_PH_UP_HI 30
+#define RG_FPGA_80M_PH_UP_SZ 1
+#define RG_FPGA_80M_PH_STP_MSK 0x80000000
+#define RG_FPGA_80M_PH_STP_I_MSK 0x7fffffff
+#define RG_FPGA_80M_PH_STP_SFT 31
+#define RG_FPGA_80M_PH_STP_HI 31
+#define RG_FPGA_80M_PH_STP_SZ 1
+#define RG_ADC2LA_SEL_MSK 0x00000001
+#define RG_ADC2LA_SEL_I_MSK 0xfffffffe
+#define RG_ADC2LA_SEL_SFT 0
+#define RG_ADC2LA_SEL_HI 0
+#define RG_ADC2LA_SEL_SZ 1
+#define RG_ADC2LA_CLKPH_MSK 0x00000002
+#define RG_ADC2LA_CLKPH_I_MSK 0xfffffffd
+#define RG_ADC2LA_CLKPH_SFT 1
+#define RG_ADC2LA_CLKPH_HI 1
+#define RG_ADC2LA_CLKPH_SZ 1
+#define RG_RXIQ_EMU_IDX_MSK 0x0000000f
+#define RG_RXIQ_EMU_IDX_I_MSK 0xfffffff0
+#define RG_RXIQ_EMU_IDX_SFT 0
+#define RG_RXIQ_EMU_IDX_HI 3
+#define RG_RXIQ_EMU_IDX_SZ 4
+#define RG_IQCAL_BP_ACI_MSK 0x00000010
+#define RG_IQCAL_BP_ACI_I_MSK 0xffffffef
+#define RG_IQCAL_BP_ACI_SFT 4
+#define RG_IQCAL_BP_ACI_HI 4
+#define RG_IQCAL_BP_ACI_SZ 1
+#define RG_DPD_AM_EN_MSK 0x00000001
+#define RG_DPD_AM_EN_I_MSK 0xfffffffe
+#define RG_DPD_AM_EN_SFT 0
+#define RG_DPD_AM_EN_HI 0
+#define RG_DPD_AM_EN_SZ 1
+#define RG_DPD_PM_EN_MSK 0x00000002
+#define RG_DPD_PM_EN_I_MSK 0xfffffffd
+#define RG_DPD_PM_EN_SFT 1
+#define RG_DPD_PM_EN_HI 1
+#define RG_DPD_PM_EN_SZ 1
+#define RG_DPD_PM_AMSEL_MSK 0x00000004
+#define RG_DPD_PM_AMSEL_I_MSK 0xfffffffb
+#define RG_DPD_PM_AMSEL_SFT 2
+#define RG_DPD_PM_AMSEL_HI 2
+#define RG_DPD_PM_AMSEL_SZ 1
+#define RG_DPD_020_GAIN_MSK 0x000003ff
+#define RG_DPD_020_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_020_GAIN_SFT 0
+#define RG_DPD_020_GAIN_HI 9
+#define RG_DPD_020_GAIN_SZ 10
+#define RG_DPD_040_GAIN_MSK 0x03ff0000
+#define RG_DPD_040_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_040_GAIN_SFT 16
+#define RG_DPD_040_GAIN_HI 25
+#define RG_DPD_040_GAIN_SZ 10
+#define RG_DPD_060_GAIN_MSK 0x000003ff
+#define RG_DPD_060_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_060_GAIN_SFT 0
+#define RG_DPD_060_GAIN_HI 9
+#define RG_DPD_060_GAIN_SZ 10
+#define RG_DPD_080_GAIN_MSK 0x03ff0000
+#define RG_DPD_080_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_080_GAIN_SFT 16
+#define RG_DPD_080_GAIN_HI 25
+#define RG_DPD_080_GAIN_SZ 10
+#define RG_DPD_0A0_GAIN_MSK 0x000003ff
+#define RG_DPD_0A0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_0A0_GAIN_SFT 0
+#define RG_DPD_0A0_GAIN_HI 9
+#define RG_DPD_0A0_GAIN_SZ 10
+#define RG_DPD_0C0_GAIN_MSK 0x03ff0000
+#define RG_DPD_0C0_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_0C0_GAIN_SFT 16
+#define RG_DPD_0C0_GAIN_HI 25
+#define RG_DPD_0C0_GAIN_SZ 10
+#define RG_DPD_0D0_GAIN_MSK 0x000003ff
+#define RG_DPD_0D0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_0D0_GAIN_SFT 0
+#define RG_DPD_0D0_GAIN_HI 9
+#define RG_DPD_0D0_GAIN_SZ 10
+#define RG_DPD_0E0_GAIN_MSK 0x03ff0000
+#define RG_DPD_0E0_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_0E0_GAIN_SFT 16
+#define RG_DPD_0E0_GAIN_HI 25
+#define RG_DPD_0E0_GAIN_SZ 10
+#define RG_DPD_0F0_GAIN_MSK 0x000003ff
+#define RG_DPD_0F0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_0F0_GAIN_SFT 0
+#define RG_DPD_0F0_GAIN_HI 9
+#define RG_DPD_0F0_GAIN_SZ 10
+#define RG_DPD_100_GAIN_MSK 0x03ff0000
+#define RG_DPD_100_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_100_GAIN_SFT 16
+#define RG_DPD_100_GAIN_HI 25
+#define RG_DPD_100_GAIN_SZ 10
+#define RG_DPD_110_GAIN_MSK 0x000003ff
+#define RG_DPD_110_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_110_GAIN_SFT 0
+#define RG_DPD_110_GAIN_HI 9
+#define RG_DPD_110_GAIN_SZ 10
+#define RG_DPD_120_GAIN_MSK 0x03ff0000
+#define RG_DPD_120_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_120_GAIN_SFT 16
+#define RG_DPD_120_GAIN_HI 25
+#define RG_DPD_120_GAIN_SZ 10
+#define RG_DPD_130_GAIN_MSK 0x000003ff
+#define RG_DPD_130_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_130_GAIN_SFT 0
+#define RG_DPD_130_GAIN_HI 9
+#define RG_DPD_130_GAIN_SZ 10
+#define RG_DPD_140_GAIN_MSK 0x03ff0000
+#define RG_DPD_140_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_140_GAIN_SFT 16
+#define RG_DPD_140_GAIN_HI 25
+#define RG_DPD_140_GAIN_SZ 10
+#define RG_DPD_150_GAIN_MSK 0x000003ff
+#define RG_DPD_150_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_150_GAIN_SFT 0
+#define RG_DPD_150_GAIN_HI 9
+#define RG_DPD_150_GAIN_SZ 10
+#define RG_DPD_160_GAIN_MSK 0x03ff0000
+#define RG_DPD_160_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_160_GAIN_SFT 16
+#define RG_DPD_160_GAIN_HI 25
+#define RG_DPD_160_GAIN_SZ 10
+#define RG_DPD_170_GAIN_MSK 0x000003ff
+#define RG_DPD_170_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_170_GAIN_SFT 0
+#define RG_DPD_170_GAIN_HI 9
+#define RG_DPD_170_GAIN_SZ 10
+#define RG_DPD_180_GAIN_MSK 0x03ff0000
+#define RG_DPD_180_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_180_GAIN_SFT 16
+#define RG_DPD_180_GAIN_HI 25
+#define RG_DPD_180_GAIN_SZ 10
+#define RG_DPD_190_GAIN_MSK 0x000003ff
+#define RG_DPD_190_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_190_GAIN_SFT 0
+#define RG_DPD_190_GAIN_HI 9
+#define RG_DPD_190_GAIN_SZ 10
+#define RG_DPD_1A0_GAIN_MSK 0x03ff0000
+#define RG_DPD_1A0_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_1A0_GAIN_SFT 16
+#define RG_DPD_1A0_GAIN_HI 25
+#define RG_DPD_1A0_GAIN_SZ 10
+#define RG_DPD_1B0_GAIN_MSK 0x000003ff
+#define RG_DPD_1B0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_1B0_GAIN_SFT 0
+#define RG_DPD_1B0_GAIN_HI 9
+#define RG_DPD_1B0_GAIN_SZ 10
+#define RG_DPD_1C0_GAIN_MSK 0x03ff0000
+#define RG_DPD_1C0_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_1C0_GAIN_SFT 16
+#define RG_DPD_1C0_GAIN_HI 25
+#define RG_DPD_1C0_GAIN_SZ 10
+#define RG_DPD_1D0_GAIN_MSK 0x000003ff
+#define RG_DPD_1D0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_1D0_GAIN_SFT 0
+#define RG_DPD_1D0_GAIN_HI 9
+#define RG_DPD_1D0_GAIN_SZ 10
+#define RG_DPD_1E0_GAIN_MSK 0x03ff0000
+#define RG_DPD_1E0_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_1E0_GAIN_SFT 16
+#define RG_DPD_1E0_GAIN_HI 25
+#define RG_DPD_1E0_GAIN_SZ 10
+#define RG_DPD_1F0_GAIN_MSK 0x000003ff
+#define RG_DPD_1F0_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_1F0_GAIN_SFT 0
+#define RG_DPD_1F0_GAIN_HI 9
+#define RG_DPD_1F0_GAIN_SZ 10
+#define RG_DPD_200_GAIN_MSK 0x03ff0000
+#define RG_DPD_200_GAIN_I_MSK 0xfc00ffff
+#define RG_DPD_200_GAIN_SFT 16
+#define RG_DPD_200_GAIN_HI 25
+#define RG_DPD_200_GAIN_SZ 10
+#define RG_DPD_020_PH_MSK 0x00001fff
+#define RG_DPD_020_PH_I_MSK 0xffffe000
+#define RG_DPD_020_PH_SFT 0
+#define RG_DPD_020_PH_HI 12
+#define RG_DPD_020_PH_SZ 13
+#define RG_DPD_040_PH_MSK 0x1fff0000
+#define RG_DPD_040_PH_I_MSK 0xe000ffff
+#define RG_DPD_040_PH_SFT 16
+#define RG_DPD_040_PH_HI 28
+#define RG_DPD_040_PH_SZ 13
+#define RG_DPD_060_PH_MSK 0x00001fff
+#define RG_DPD_060_PH_I_MSK 0xffffe000
+#define RG_DPD_060_PH_SFT 0
+#define RG_DPD_060_PH_HI 12
+#define RG_DPD_060_PH_SZ 13
+#define RG_DPD_080_PH_MSK 0x1fff0000
+#define RG_DPD_080_PH_I_MSK 0xe000ffff
+#define RG_DPD_080_PH_SFT 16
+#define RG_DPD_080_PH_HI 28
+#define RG_DPD_080_PH_SZ 13
+#define RG_DPD_0A0_PH_MSK 0x00001fff
+#define RG_DPD_0A0_PH_I_MSK 0xffffe000
+#define RG_DPD_0A0_PH_SFT 0
+#define RG_DPD_0A0_PH_HI 12
+#define RG_DPD_0A0_PH_SZ 13
+#define RG_DPD_0C0_PH_MSK 0x1fff0000
+#define RG_DPD_0C0_PH_I_MSK 0xe000ffff
+#define RG_DPD_0C0_PH_SFT 16
+#define RG_DPD_0C0_PH_HI 28
+#define RG_DPD_0C0_PH_SZ 13
+#define RG_DPD_0D0_PH_MSK 0x00001fff
+#define RG_DPD_0D0_PH_I_MSK 0xffffe000
+#define RG_DPD_0D0_PH_SFT 0
+#define RG_DPD_0D0_PH_HI 12
+#define RG_DPD_0D0_PH_SZ 13
+#define RG_DPD_0E0_PH_MSK 0x1fff0000
+#define RG_DPD_0E0_PH_I_MSK 0xe000ffff
+#define RG_DPD_0E0_PH_SFT 16
+#define RG_DPD_0E0_PH_HI 28
+#define RG_DPD_0E0_PH_SZ 13
+#define RG_DPD_0F0_PH_MSK 0x00001fff
+#define RG_DPD_0F0_PH_I_MSK 0xffffe000
+#define RG_DPD_0F0_PH_SFT 0
+#define RG_DPD_0F0_PH_HI 12
+#define RG_DPD_0F0_PH_SZ 13
+#define RG_DPD_100_PH_MSK 0x1fff0000
+#define RG_DPD_100_PH_I_MSK 0xe000ffff
+#define RG_DPD_100_PH_SFT 16
+#define RG_DPD_100_PH_HI 28
+#define RG_DPD_100_PH_SZ 13
+#define RG_DPD_110_PH_MSK 0x00001fff
+#define RG_DPD_110_PH_I_MSK 0xffffe000
+#define RG_DPD_110_PH_SFT 0
+#define RG_DPD_110_PH_HI 12
+#define RG_DPD_110_PH_SZ 13
+#define RG_DPD_120_PH_MSK 0x1fff0000
+#define RG_DPD_120_PH_I_MSK 0xe000ffff
+#define RG_DPD_120_PH_SFT 16
+#define RG_DPD_120_PH_HI 28
+#define RG_DPD_120_PH_SZ 13
+#define RG_DPD_130_PH_MSK 0x00001fff
+#define RG_DPD_130_PH_I_MSK 0xffffe000
+#define RG_DPD_130_PH_SFT 0
+#define RG_DPD_130_PH_HI 12
+#define RG_DPD_130_PH_SZ 13
+#define RG_DPD_140_PH_MSK 0x1fff0000
+#define RG_DPD_140_PH_I_MSK 0xe000ffff
+#define RG_DPD_140_PH_SFT 16
+#define RG_DPD_140_PH_HI 28
+#define RG_DPD_140_PH_SZ 13
+#define RG_DPD_150_PH_MSK 0x00001fff
+#define RG_DPD_150_PH_I_MSK 0xffffe000
+#define RG_DPD_150_PH_SFT 0
+#define RG_DPD_150_PH_HI 12
+#define RG_DPD_150_PH_SZ 13
+#define RG_DPD_160_PH_MSK 0x1fff0000
+#define RG_DPD_160_PH_I_MSK 0xe000ffff
+#define RG_DPD_160_PH_SFT 16
+#define RG_DPD_160_PH_HI 28
+#define RG_DPD_160_PH_SZ 13
+#define RG_DPD_170_PH_MSK 0x00001fff
+#define RG_DPD_170_PH_I_MSK 0xffffe000
+#define RG_DPD_170_PH_SFT 0
+#define RG_DPD_170_PH_HI 12
+#define RG_DPD_170_PH_SZ 13
+#define RG_DPD_180_PH_MSK 0x1fff0000
+#define RG_DPD_180_PH_I_MSK 0xe000ffff
+#define RG_DPD_180_PH_SFT 16
+#define RG_DPD_180_PH_HI 28
+#define RG_DPD_180_PH_SZ 13
+#define RG_DPD_190_PH_MSK 0x00001fff
+#define RG_DPD_190_PH_I_MSK 0xffffe000
+#define RG_DPD_190_PH_SFT 0
+#define RG_DPD_190_PH_HI 12
+#define RG_DPD_190_PH_SZ 13
+#define RG_DPD_1A0_PH_MSK 0x1fff0000
+#define RG_DPD_1A0_PH_I_MSK 0xe000ffff
+#define RG_DPD_1A0_PH_SFT 16
+#define RG_DPD_1A0_PH_HI 28
+#define RG_DPD_1A0_PH_SZ 13
+#define RG_DPD_1B0_PH_MSK 0x00001fff
+#define RG_DPD_1B0_PH_I_MSK 0xffffe000
+#define RG_DPD_1B0_PH_SFT 0
+#define RG_DPD_1B0_PH_HI 12
+#define RG_DPD_1B0_PH_SZ 13
+#define RG_DPD_1C0_PH_MSK 0x1fff0000
+#define RG_DPD_1C0_PH_I_MSK 0xe000ffff
+#define RG_DPD_1C0_PH_SFT 16
+#define RG_DPD_1C0_PH_HI 28
+#define RG_DPD_1C0_PH_SZ 13
+#define RG_DPD_1D0_PH_MSK 0x00001fff
+#define RG_DPD_1D0_PH_I_MSK 0xffffe000
+#define RG_DPD_1D0_PH_SFT 0
+#define RG_DPD_1D0_PH_HI 12
+#define RG_DPD_1D0_PH_SZ 13
+#define RG_DPD_1E0_PH_MSK 0x1fff0000
+#define RG_DPD_1E0_PH_I_MSK 0xe000ffff
+#define RG_DPD_1E0_PH_SFT 16
+#define RG_DPD_1E0_PH_HI 28
+#define RG_DPD_1E0_PH_SZ 13
+#define RG_DPD_1F0_PH_MSK 0x00001fff
+#define RG_DPD_1F0_PH_I_MSK 0xffffe000
+#define RG_DPD_1F0_PH_SFT 0
+#define RG_DPD_1F0_PH_HI 12
+#define RG_DPD_1F0_PH_SZ 13
+#define RG_DPD_200_PH_MSK 0x1fff0000
+#define RG_DPD_200_PH_I_MSK 0xe000ffff
+#define RG_DPD_200_PH_SFT 16
+#define RG_DPD_200_PH_HI 28
+#define RG_DPD_200_PH_SZ 13
+#define RG_DPD_GAIN_EST_Y0_MSK 0x000001ff
+#define RG_DPD_GAIN_EST_Y0_I_MSK 0xfffffe00
+#define RG_DPD_GAIN_EST_Y0_SFT 0
+#define RG_DPD_GAIN_EST_Y0_HI 8
+#define RG_DPD_GAIN_EST_Y0_SZ 9
+#define RG_DPD_GAIN_EST_Y1_MSK 0x01ff0000
+#define RG_DPD_GAIN_EST_Y1_I_MSK 0xfe00ffff
+#define RG_DPD_GAIN_EST_Y1_SFT 16
+#define RG_DPD_GAIN_EST_Y1_HI 24
+#define RG_DPD_GAIN_EST_Y1_SZ 9
+#define RG_DPD_LOOP_GAIN_MSK 0x000003ff
+#define RG_DPD_LOOP_GAIN_I_MSK 0xfffffc00
+#define RG_DPD_LOOP_GAIN_SFT 0
+#define RG_DPD_LOOP_GAIN_HI 9
+#define RG_DPD_LOOP_GAIN_SZ 10
+#define RG_DPD_GAIN_EST_X0_MSK 0x000001ff
+#define RG_DPD_GAIN_EST_X0_I_MSK 0xfffffe00
+#define RG_DPD_GAIN_EST_X0_SFT 0
+#define RG_DPD_GAIN_EST_X0_HI 8
+#define RG_DPD_GAIN_EST_X0_SZ 9
+#define RO_DPD_GAIN_MSK 0x03ff0000
+#define RO_DPD_GAIN_I_MSK 0xfc00ffff
+#define RO_DPD_GAIN_SFT 16
+#define RO_DPD_GAIN_HI 25
+#define RO_DPD_GAIN_SZ 10
+#define TX_SCALE_11B_MSK 0x000000ff
+#define TX_SCALE_11B_I_MSK 0xffffff00
+#define TX_SCALE_11B_SFT 0
+#define TX_SCALE_11B_HI 7
+#define TX_SCALE_11B_SZ 8
+#define TX_SCALE_11B_P0D5_MSK 0x0000ff00
+#define TX_SCALE_11B_P0D5_I_MSK 0xffff00ff
+#define TX_SCALE_11B_P0D5_SFT 8
+#define TX_SCALE_11B_P0D5_HI 15
+#define TX_SCALE_11B_P0D5_SZ 8
+#define TX_SCALE_11G_MSK 0x00ff0000
+#define TX_SCALE_11G_I_MSK 0xff00ffff
+#define TX_SCALE_11G_SFT 16
+#define TX_SCALE_11G_HI 23
+#define TX_SCALE_11G_SZ 8
+#define TX_SCALE_11G_P0D5_MSK 0xff000000
+#define TX_SCALE_11G_P0D5_I_MSK 0x00ffffff
+#define TX_SCALE_11G_P0D5_SFT 24
+#define TX_SCALE_11G_P0D5_HI 31
+#define TX_SCALE_11G_P0D5_SZ 8
+#define RG_EN_MANUAL_MSK 0x00000001
+#define RG_EN_MANUAL_I_MSK 0xfffffffe
+#define RG_EN_MANUAL_SFT 0
+#define RG_EN_MANUAL_HI 0
+#define RG_EN_MANUAL_SZ 1
+#define RG_TX_EN_MSK 0x00000002
+#define RG_TX_EN_I_MSK 0xfffffffd
+#define RG_TX_EN_SFT 1
+#define RG_TX_EN_HI 1
+#define RG_TX_EN_SZ 1
+#define RG_TX_PA_EN_MSK 0x00000004
+#define RG_TX_PA_EN_I_MSK 0xfffffffb
+#define RG_TX_PA_EN_SFT 2
+#define RG_TX_PA_EN_HI 2
+#define RG_TX_PA_EN_SZ 1
+#define RG_TX_DAC_EN_MSK 0x00000008
+#define RG_TX_DAC_EN_I_MSK 0xfffffff7
+#define RG_TX_DAC_EN_SFT 3
+#define RG_TX_DAC_EN_HI 3
+#define RG_TX_DAC_EN_SZ 1
+#define RG_RX_AGC_MSK 0x00000010
+#define RG_RX_AGC_I_MSK 0xffffffef
+#define RG_RX_AGC_SFT 4
+#define RG_RX_AGC_HI 4
+#define RG_RX_AGC_SZ 1
+#define RG_RX_GAIN_MANUAL_MSK 0x00000020
+#define RG_RX_GAIN_MANUAL_I_MSK 0xffffffdf
+#define RG_RX_GAIN_MANUAL_SFT 5
+#define RG_RX_GAIN_MANUAL_HI 5
+#define RG_RX_GAIN_MANUAL_SZ 1
+#define RG_RFG_MSK 0x000000c0
+#define RG_RFG_I_MSK 0xffffff3f
+#define RG_RFG_SFT 6
+#define RG_RFG_HI 7
+#define RG_RFG_SZ 2
+#define RG_PGAG_MSK 0x00000f00
+#define RG_PGAG_I_MSK 0xfffff0ff
+#define RG_PGAG_SFT 8
+#define RG_PGAG_HI 11
+#define RG_PGAG_SZ 4
+#define RG_MODE_MSK 0x00003000
+#define RG_MODE_I_MSK 0xffffcfff
+#define RG_MODE_SFT 12
+#define RG_MODE_HI 13
+#define RG_MODE_SZ 2
+#define RG_EN_TX_TRSW_MSK 0x00004000
+#define RG_EN_TX_TRSW_I_MSK 0xffffbfff
+#define RG_EN_TX_TRSW_SFT 14
+#define RG_EN_TX_TRSW_HI 14
+#define RG_EN_TX_TRSW_SZ 1
+#define RG_EN_SX_MSK 0x00008000
+#define RG_EN_SX_I_MSK 0xffff7fff
+#define RG_EN_SX_SFT 15
+#define RG_EN_SX_HI 15
+#define RG_EN_SX_SZ 1
+#define RG_EN_RX_LNA_MSK 0x00010000
+#define RG_EN_RX_LNA_I_MSK 0xfffeffff
+#define RG_EN_RX_LNA_SFT 16
+#define RG_EN_RX_LNA_HI 16
+#define RG_EN_RX_LNA_SZ 1
+#define RG_EN_RX_MIXER_MSK 0x00020000
+#define RG_EN_RX_MIXER_I_MSK 0xfffdffff
+#define RG_EN_RX_MIXER_SFT 17
+#define RG_EN_RX_MIXER_HI 17
+#define RG_EN_RX_MIXER_SZ 1
+#define RG_EN_RX_DIV2_MSK 0x00040000
+#define RG_EN_RX_DIV2_I_MSK 0xfffbffff
+#define RG_EN_RX_DIV2_SFT 18
+#define RG_EN_RX_DIV2_HI 18
+#define RG_EN_RX_DIV2_SZ 1
+#define RG_EN_RX_LOBUF_MSK 0x00080000
+#define RG_EN_RX_LOBUF_I_MSK 0xfff7ffff
+#define RG_EN_RX_LOBUF_SFT 19
+#define RG_EN_RX_LOBUF_HI 19
+#define RG_EN_RX_LOBUF_SZ 1
+#define RG_EN_RX_TZ_MSK 0x00100000
+#define RG_EN_RX_TZ_I_MSK 0xffefffff
+#define RG_EN_RX_TZ_SFT 20
+#define RG_EN_RX_TZ_HI 20
+#define RG_EN_RX_TZ_SZ 1
+#define RG_EN_RX_FILTER_MSK 0x00200000
+#define RG_EN_RX_FILTER_I_MSK 0xffdfffff
+#define RG_EN_RX_FILTER_SFT 21
+#define RG_EN_RX_FILTER_HI 21
+#define RG_EN_RX_FILTER_SZ 1
+#define RG_EN_RX_HPF_MSK 0x00400000
+#define RG_EN_RX_HPF_I_MSK 0xffbfffff
+#define RG_EN_RX_HPF_SFT 22
+#define RG_EN_RX_HPF_HI 22
+#define RG_EN_RX_HPF_SZ 1
+#define RG_EN_RX_RSSI_MSK 0x00800000
+#define RG_EN_RX_RSSI_I_MSK 0xff7fffff
+#define RG_EN_RX_RSSI_SFT 23
+#define RG_EN_RX_RSSI_HI 23
+#define RG_EN_RX_RSSI_SZ 1
+#define RG_EN_ADC_MSK 0x01000000
+#define RG_EN_ADC_I_MSK 0xfeffffff
+#define RG_EN_ADC_SFT 24
+#define RG_EN_ADC_HI 24
+#define RG_EN_ADC_SZ 1
+#define RG_EN_TX_MOD_MSK 0x02000000
+#define RG_EN_TX_MOD_I_MSK 0xfdffffff
+#define RG_EN_TX_MOD_SFT 25
+#define RG_EN_TX_MOD_HI 25
+#define RG_EN_TX_MOD_SZ 1
+#define RG_EN_TX_DIV2_MSK 0x04000000
+#define RG_EN_TX_DIV2_I_MSK 0xfbffffff
+#define RG_EN_TX_DIV2_SFT 26
+#define RG_EN_TX_DIV2_HI 26
+#define RG_EN_TX_DIV2_SZ 1
+#define RG_EN_TX_DIV2_BUF_MSK 0x08000000
+#define RG_EN_TX_DIV2_BUF_I_MSK 0xf7ffffff
+#define RG_EN_TX_DIV2_BUF_SFT 27
+#define RG_EN_TX_DIV2_BUF_HI 27
+#define RG_EN_TX_DIV2_BUF_SZ 1
+#define RG_EN_TX_LOBF_MSK 0x10000000
+#define RG_EN_TX_LOBF_I_MSK 0xefffffff
+#define RG_EN_TX_LOBF_SFT 28
+#define RG_EN_TX_LOBF_HI 28
+#define RG_EN_TX_LOBF_SZ 1
+#define RG_EN_RX_LOBF_MSK 0x20000000
+#define RG_EN_RX_LOBF_I_MSK 0xdfffffff
+#define RG_EN_RX_LOBF_SFT 29
+#define RG_EN_RX_LOBF_HI 29
+#define RG_EN_RX_LOBF_SZ 1
+#define RG_SEL_DPLL_CLK_MSK 0x40000000
+#define RG_SEL_DPLL_CLK_I_MSK 0xbfffffff
+#define RG_SEL_DPLL_CLK_SFT 30
+#define RG_SEL_DPLL_CLK_HI 30
+#define RG_SEL_DPLL_CLK_SZ 1
+#define RG_EN_CLK_960MBY13_UART_MSK 0x80000000
+#define RG_EN_CLK_960MBY13_UART_I_MSK 0x7fffffff
+#define RG_EN_CLK_960MBY13_UART_SFT 31
+#define RG_EN_CLK_960MBY13_UART_HI 31
+#define RG_EN_CLK_960MBY13_UART_SZ 1
+#define RG_EN_TX_DPD_MSK 0x00000001
+#define RG_EN_TX_DPD_I_MSK 0xfffffffe
+#define RG_EN_TX_DPD_SFT 0
+#define RG_EN_TX_DPD_HI 0
+#define RG_EN_TX_DPD_SZ 1
+#define RG_EN_TX_TSSI_MSK 0x00000002
+#define RG_EN_TX_TSSI_I_MSK 0xfffffffd
+#define RG_EN_TX_TSSI_SFT 1
+#define RG_EN_TX_TSSI_HI 1
+#define RG_EN_TX_TSSI_SZ 1
+#define RG_EN_RX_IQCAL_MSK 0x00000004
+#define RG_EN_RX_IQCAL_I_MSK 0xfffffffb
+#define RG_EN_RX_IQCAL_SFT 2
+#define RG_EN_RX_IQCAL_HI 2
+#define RG_EN_RX_IQCAL_SZ 1
+#define RG_EN_TX_DAC_CAL_MSK 0x00000008
+#define RG_EN_TX_DAC_CAL_I_MSK 0xfffffff7
+#define RG_EN_TX_DAC_CAL_SFT 3
+#define RG_EN_TX_DAC_CAL_HI 3
+#define RG_EN_TX_DAC_CAL_SZ 1
+#define RG_EN_TX_SELF_MIXER_MSK 0x00000010
+#define RG_EN_TX_SELF_MIXER_I_MSK 0xffffffef
+#define RG_EN_TX_SELF_MIXER_SFT 4
+#define RG_EN_TX_SELF_MIXER_HI 4
+#define RG_EN_TX_SELF_MIXER_SZ 1
+#define RG_EN_TX_DAC_OUT_MSK 0x00000020
+#define RG_EN_TX_DAC_OUT_I_MSK 0xffffffdf
+#define RG_EN_TX_DAC_OUT_SFT 5
+#define RG_EN_TX_DAC_OUT_HI 5
+#define RG_EN_TX_DAC_OUT_SZ 1
+#define RG_EN_LDO_RX_FE_MSK 0x00000040
+#define RG_EN_LDO_RX_FE_I_MSK 0xffffffbf
+#define RG_EN_LDO_RX_FE_SFT 6
+#define RG_EN_LDO_RX_FE_HI 6
+#define RG_EN_LDO_RX_FE_SZ 1
+#define RG_EN_LDO_ABB_MSK 0x00000080
+#define RG_EN_LDO_ABB_I_MSK 0xffffff7f
+#define RG_EN_LDO_ABB_SFT 7
+#define RG_EN_LDO_ABB_HI 7
+#define RG_EN_LDO_ABB_SZ 1
+#define RG_EN_LDO_AFE_MSK 0x00000100
+#define RG_EN_LDO_AFE_I_MSK 0xfffffeff
+#define RG_EN_LDO_AFE_SFT 8
+#define RG_EN_LDO_AFE_HI 8
+#define RG_EN_LDO_AFE_SZ 1
+#define RG_EN_SX_CHPLDO_MSK 0x00000200
+#define RG_EN_SX_CHPLDO_I_MSK 0xfffffdff
+#define RG_EN_SX_CHPLDO_SFT 9
+#define RG_EN_SX_CHPLDO_HI 9
+#define RG_EN_SX_CHPLDO_SZ 1
+#define RG_EN_SX_LOBFLDO_MSK 0x00000400
+#define RG_EN_SX_LOBFLDO_I_MSK 0xfffffbff
+#define RG_EN_SX_LOBFLDO_SFT 10
+#define RG_EN_SX_LOBFLDO_HI 10
+#define RG_EN_SX_LOBFLDO_SZ 1
+#define RG_EN_IREF_RX_MSK 0x00000800
+#define RG_EN_IREF_RX_I_MSK 0xfffff7ff
+#define RG_EN_IREF_RX_SFT 11
+#define RG_EN_IREF_RX_HI 11
+#define RG_EN_IREF_RX_SZ 1
+#define RG_EN_TX_DAC_VOUT_MSK 0x00002000
+#define RG_EN_TX_DAC_VOUT_I_MSK 0xffffdfff
+#define RG_EN_TX_DAC_VOUT_SFT 13
+#define RG_EN_TX_DAC_VOUT_HI 13
+#define RG_EN_TX_DAC_VOUT_SZ 1
+#define RG_EN_SX_LCK_BIN_MSK 0x00004000
+#define RG_EN_SX_LCK_BIN_I_MSK 0xffffbfff
+#define RG_EN_SX_LCK_BIN_SFT 14
+#define RG_EN_SX_LCK_BIN_HI 14
+#define RG_EN_SX_LCK_BIN_SZ 1
+#define RG_RTC_CAL_MODE_MSK 0x00010000
+#define RG_RTC_CAL_MODE_I_MSK 0xfffeffff
+#define RG_RTC_CAL_MODE_SFT 16
+#define RG_RTC_CAL_MODE_HI 16
+#define RG_RTC_CAL_MODE_SZ 1
+#define RG_EN_IQPAD_IOSW_MSK 0x00020000
+#define RG_EN_IQPAD_IOSW_I_MSK 0xfffdffff
+#define RG_EN_IQPAD_IOSW_SFT 17
+#define RG_EN_IQPAD_IOSW_HI 17
+#define RG_EN_IQPAD_IOSW_SZ 1
+#define RG_EN_TESTPAD_IOSW_MSK 0x00040000
+#define RG_EN_TESTPAD_IOSW_I_MSK 0xfffbffff
+#define RG_EN_TESTPAD_IOSW_SFT 18
+#define RG_EN_TESTPAD_IOSW_HI 18
+#define RG_EN_TESTPAD_IOSW_SZ 1
+#define RG_EN_TRXBF_BYPASS_MSK 0x00080000
+#define RG_EN_TRXBF_BYPASS_I_MSK 0xfff7ffff
+#define RG_EN_TRXBF_BYPASS_SFT 19
+#define RG_EN_TRXBF_BYPASS_HI 19
+#define RG_EN_TRXBF_BYPASS_SZ 1
+#define RG_LDO_LEVEL_RX_FE_MSK 0x00000007
+#define RG_LDO_LEVEL_RX_FE_I_MSK 0xfffffff8
+#define RG_LDO_LEVEL_RX_FE_SFT 0
+#define RG_LDO_LEVEL_RX_FE_HI 2
+#define RG_LDO_LEVEL_RX_FE_SZ 3
+#define RG_LDO_LEVEL_ABB_MSK 0x00000038
+#define RG_LDO_LEVEL_ABB_I_MSK 0xffffffc7
+#define RG_LDO_LEVEL_ABB_SFT 3
+#define RG_LDO_LEVEL_ABB_HI 5
+#define RG_LDO_LEVEL_ABB_SZ 3
+#define RG_LDO_LEVEL_AFE_MSK 0x000001c0
+#define RG_LDO_LEVEL_AFE_I_MSK 0xfffffe3f
+#define RG_LDO_LEVEL_AFE_SFT 6
+#define RG_LDO_LEVEL_AFE_HI 8
+#define RG_LDO_LEVEL_AFE_SZ 3
+#define RG_SX_LDO_CHP_LEVEL_MSK 0x00000e00
+#define RG_SX_LDO_CHP_LEVEL_I_MSK 0xfffff1ff
+#define RG_SX_LDO_CHP_LEVEL_SFT 9
+#define RG_SX_LDO_CHP_LEVEL_HI 11
+#define RG_SX_LDO_CHP_LEVEL_SZ 3
+#define RG_SX_LDO_LOBF_LEVEL_MSK 0x00007000
+#define RG_SX_LDO_LOBF_LEVEL_I_MSK 0xffff8fff
+#define RG_SX_LDO_LOBF_LEVEL_SFT 12
+#define RG_SX_LDO_LOBF_LEVEL_HI 14
+#define RG_SX_LDO_LOBF_LEVEL_SZ 3
+#define RG_SX_LDO_XOSC_LEVEL_MSK 0x00038000
+#define RG_SX_LDO_XOSC_LEVEL_I_MSK 0xfffc7fff
+#define RG_SX_LDO_XOSC_LEVEL_SFT 15
+#define RG_SX_LDO_XOSC_LEVEL_HI 17
+#define RG_SX_LDO_XOSC_LEVEL_SZ 3
+#define RG_DP_LDO_LEVEL_MSK 0x001c0000
+#define RG_DP_LDO_LEVEL_I_MSK 0xffe3ffff
+#define RG_DP_LDO_LEVEL_SFT 18
+#define RG_DP_LDO_LEVEL_HI 20
+#define RG_DP_LDO_LEVEL_SZ 3
+#define RG_SX_LDO_VCO_LEVEL_MSK 0x00e00000
+#define RG_SX_LDO_VCO_LEVEL_I_MSK 0xff1fffff
+#define RG_SX_LDO_VCO_LEVEL_SFT 21
+#define RG_SX_LDO_VCO_LEVEL_HI 23
+#define RG_SX_LDO_VCO_LEVEL_SZ 3
+#define RG_TX_LDO_TX_LEVEL_MSK 0x07000000
+#define RG_TX_LDO_TX_LEVEL_I_MSK 0xf8ffffff
+#define RG_TX_LDO_TX_LEVEL_SFT 24
+#define RG_TX_LDO_TX_LEVEL_HI 26
+#define RG_TX_LDO_TX_LEVEL_SZ 3
+#define RG_EN_RX_PADSW_MSK 0x00000001
+#define RG_EN_RX_PADSW_I_MSK 0xfffffffe
+#define RG_EN_RX_PADSW_SFT 0
+#define RG_EN_RX_PADSW_HI 0
+#define RG_EN_RX_PADSW_SZ 1
+#define RG_EN_RX_TESTNODE_MSK 0x00000002
+#define RG_EN_RX_TESTNODE_I_MSK 0xfffffffd
+#define RG_EN_RX_TESTNODE_SFT 1
+#define RG_EN_RX_TESTNODE_HI 1
+#define RG_EN_RX_TESTNODE_SZ 1
+#define RG_RX_ABBCFIX_MSK 0x00000004
+#define RG_RX_ABBCFIX_I_MSK 0xfffffffb
+#define RG_RX_ABBCFIX_SFT 2
+#define RG_RX_ABBCFIX_HI 2
+#define RG_RX_ABBCFIX_SZ 1
+#define RG_RX_ABBCTUNE_MSK 0x000001f8
+#define RG_RX_ABBCTUNE_I_MSK 0xfffffe07
+#define RG_RX_ABBCTUNE_SFT 3
+#define RG_RX_ABBCTUNE_HI 8
+#define RG_RX_ABBCTUNE_SZ 6
+#define RG_RX_ABBOUT_TRI_STATE_MSK 0x00000200
+#define RG_RX_ABBOUT_TRI_STATE_I_MSK 0xfffffdff
+#define RG_RX_ABBOUT_TRI_STATE_SFT 9
+#define RG_RX_ABBOUT_TRI_STATE_HI 9
+#define RG_RX_ABBOUT_TRI_STATE_SZ 1
+#define RG_RX_ABB_N_MODE_MSK 0x00000400
+#define RG_RX_ABB_N_MODE_I_MSK 0xfffffbff
+#define RG_RX_ABB_N_MODE_SFT 10
+#define RG_RX_ABB_N_MODE_HI 10
+#define RG_RX_ABB_N_MODE_SZ 1
+#define RG_RX_EN_LOOPA_MSK 0x00000800
+#define RG_RX_EN_LOOPA_I_MSK 0xfffff7ff
+#define RG_RX_EN_LOOPA_SFT 11
+#define RG_RX_EN_LOOPA_HI 11
+#define RG_RX_EN_LOOPA_SZ 1
+#define RG_RX_FILTERI1ST_MSK 0x00003000
+#define RG_RX_FILTERI1ST_I_MSK 0xffffcfff
+#define RG_RX_FILTERI1ST_SFT 12
+#define RG_RX_FILTERI1ST_HI 13
+#define RG_RX_FILTERI1ST_SZ 2
+#define RG_RX_FILTERI2ND_MSK 0x0000c000
+#define RG_RX_FILTERI2ND_I_MSK 0xffff3fff
+#define RG_RX_FILTERI2ND_SFT 14
+#define RG_RX_FILTERI2ND_HI 15
+#define RG_RX_FILTERI2ND_SZ 2
+#define RG_RX_FILTERI3RD_MSK 0x00030000
+#define RG_RX_FILTERI3RD_I_MSK 0xfffcffff
+#define RG_RX_FILTERI3RD_SFT 16
+#define RG_RX_FILTERI3RD_HI 17
+#define RG_RX_FILTERI3RD_SZ 2
+#define RG_RX_FILTERI_COURSE_MSK 0x000c0000
+#define RG_RX_FILTERI_COURSE_I_MSK 0xfff3ffff
+#define RG_RX_FILTERI_COURSE_SFT 18
+#define RG_RX_FILTERI_COURSE_HI 19
+#define RG_RX_FILTERI_COURSE_SZ 2
+#define RG_RX_FILTERVCM_MSK 0x00300000
+#define RG_RX_FILTERVCM_I_MSK 0xffcfffff
+#define RG_RX_FILTERVCM_SFT 20
+#define RG_RX_FILTERVCM_HI 21
+#define RG_RX_FILTERVCM_SZ 2
+#define RG_RX_HPF3M_MSK 0x00400000
+#define RG_RX_HPF3M_I_MSK 0xffbfffff
+#define RG_RX_HPF3M_SFT 22
+#define RG_RX_HPF3M_HI 22
+#define RG_RX_HPF3M_SZ 1
+#define RG_RX_HPF300K_MSK 0x00800000
+#define RG_RX_HPF300K_I_MSK 0xff7fffff
+#define RG_RX_HPF300K_SFT 23
+#define RG_RX_HPF300K_HI 23
+#define RG_RX_HPF300K_SZ 1
+#define RG_RX_HPFI_MSK 0x03000000
+#define RG_RX_HPFI_I_MSK 0xfcffffff
+#define RG_RX_HPFI_SFT 24
+#define RG_RX_HPFI_HI 25
+#define RG_RX_HPFI_SZ 2
+#define RG_RX_HPF_FINALCORNER_MSK 0x0c000000
+#define RG_RX_HPF_FINALCORNER_I_MSK 0xf3ffffff
+#define RG_RX_HPF_FINALCORNER_SFT 26
+#define RG_RX_HPF_FINALCORNER_HI 27
+#define RG_RX_HPF_FINALCORNER_SZ 2
+#define RG_RX_HPF_SETTLE1_C_MSK 0x30000000
+#define RG_RX_HPF_SETTLE1_C_I_MSK 0xcfffffff
+#define RG_RX_HPF_SETTLE1_C_SFT 28
+#define RG_RX_HPF_SETTLE1_C_HI 29
+#define RG_RX_HPF_SETTLE1_C_SZ 2
+#define RG_RX_HPF_SETTLE1_R_MSK 0x00000003
+#define RG_RX_HPF_SETTLE1_R_I_MSK 0xfffffffc
+#define RG_RX_HPF_SETTLE1_R_SFT 0
+#define RG_RX_HPF_SETTLE1_R_HI 1
+#define RG_RX_HPF_SETTLE1_R_SZ 2
+#define RG_RX_HPF_SETTLE2_C_MSK 0x0000000c
+#define RG_RX_HPF_SETTLE2_C_I_MSK 0xfffffff3
+#define RG_RX_HPF_SETTLE2_C_SFT 2
+#define RG_RX_HPF_SETTLE2_C_HI 3
+#define RG_RX_HPF_SETTLE2_C_SZ 2
+#define RG_RX_HPF_SETTLE2_R_MSK 0x00000030
+#define RG_RX_HPF_SETTLE2_R_I_MSK 0xffffffcf
+#define RG_RX_HPF_SETTLE2_R_SFT 4
+#define RG_RX_HPF_SETTLE2_R_HI 5
+#define RG_RX_HPF_SETTLE2_R_SZ 2
+#define RG_RX_HPF_VCMCON2_MSK 0x000000c0
+#define RG_RX_HPF_VCMCON2_I_MSK 0xffffff3f
+#define RG_RX_HPF_VCMCON2_SFT 6
+#define RG_RX_HPF_VCMCON2_HI 7
+#define RG_RX_HPF_VCMCON2_SZ 2
+#define RG_RX_HPF_VCMCON_MSK 0x00000300
+#define RG_RX_HPF_VCMCON_I_MSK 0xfffffcff
+#define RG_RX_HPF_VCMCON_SFT 8
+#define RG_RX_HPF_VCMCON_HI 9
+#define RG_RX_HPF_VCMCON_SZ 2
+#define RG_RX_OUTVCM_MSK 0x00000c00
+#define RG_RX_OUTVCM_I_MSK 0xfffff3ff
+#define RG_RX_OUTVCM_SFT 10
+#define RG_RX_OUTVCM_HI 11
+#define RG_RX_OUTVCM_SZ 2
+#define RG_RX_TZI_MSK 0x00003000
+#define RG_RX_TZI_I_MSK 0xffffcfff
+#define RG_RX_TZI_SFT 12
+#define RG_RX_TZI_HI 13
+#define RG_RX_TZI_SZ 2
+#define RG_RX_TZ_OUT_TRISTATE_MSK 0x00004000
+#define RG_RX_TZ_OUT_TRISTATE_I_MSK 0xffffbfff
+#define RG_RX_TZ_OUT_TRISTATE_SFT 14
+#define RG_RX_TZ_OUT_TRISTATE_HI 14
+#define RG_RX_TZ_OUT_TRISTATE_SZ 1
+#define RG_RX_TZ_VCM_MSK 0x00018000
+#define RG_RX_TZ_VCM_I_MSK 0xfffe7fff
+#define RG_RX_TZ_VCM_SFT 15
+#define RG_RX_TZ_VCM_HI 16
+#define RG_RX_TZ_VCM_SZ 2
+#define RG_EN_RX_RSSI_TESTNODE_MSK 0x000e0000
+#define RG_EN_RX_RSSI_TESTNODE_I_MSK 0xfff1ffff
+#define RG_EN_RX_RSSI_TESTNODE_SFT 17
+#define RG_EN_RX_RSSI_TESTNODE_HI 19
+#define RG_EN_RX_RSSI_TESTNODE_SZ 3
+#define RG_RX_ADCRSSI_CLKSEL_MSK 0x00100000
+#define RG_RX_ADCRSSI_CLKSEL_I_MSK 0xffefffff
+#define RG_RX_ADCRSSI_CLKSEL_SFT 20
+#define RG_RX_ADCRSSI_CLKSEL_HI 20
+#define RG_RX_ADCRSSI_CLKSEL_SZ 1
+#define RG_RX_ADCRSSI_VCM_MSK 0x00600000
+#define RG_RX_ADCRSSI_VCM_I_MSK 0xff9fffff
+#define RG_RX_ADCRSSI_VCM_SFT 21
+#define RG_RX_ADCRSSI_VCM_HI 22
+#define RG_RX_ADCRSSI_VCM_SZ 2
+#define RG_RX_REC_LPFCORNER_MSK 0x01800000
+#define RG_RX_REC_LPFCORNER_I_MSK 0xfe7fffff
+#define RG_RX_REC_LPFCORNER_SFT 23
+#define RG_RX_REC_LPFCORNER_HI 24
+#define RG_RX_REC_LPFCORNER_SZ 2
+#define RG_RSSI_CLOCK_GATING_MSK 0x02000000
+#define RG_RSSI_CLOCK_GATING_I_MSK 0xfdffffff
+#define RG_RSSI_CLOCK_GATING_SFT 25
+#define RG_RSSI_CLOCK_GATING_HI 25
+#define RG_RSSI_CLOCK_GATING_SZ 1
+#define RG_TXPGA_CAPSW_MSK 0x00000003
+#define RG_TXPGA_CAPSW_I_MSK 0xfffffffc
+#define RG_TXPGA_CAPSW_SFT 0
+#define RG_TXPGA_CAPSW_HI 1
+#define RG_TXPGA_CAPSW_SZ 2
+#define RG_TXPGA_MAIN_MSK 0x000000fc
+#define RG_TXPGA_MAIN_I_MSK 0xffffff03
+#define RG_TXPGA_MAIN_SFT 2
+#define RG_TXPGA_MAIN_HI 7
+#define RG_TXPGA_MAIN_SZ 6
+#define RG_TXPGA_STEER_MSK 0x00003f00
+#define RG_TXPGA_STEER_I_MSK 0xffffc0ff
+#define RG_TXPGA_STEER_SFT 8
+#define RG_TXPGA_STEER_HI 13
+#define RG_TXPGA_STEER_SZ 6
+#define RG_TXMOD_GMCELL_MSK 0x0000c000
+#define RG_TXMOD_GMCELL_I_MSK 0xffff3fff
+#define RG_TXMOD_GMCELL_SFT 14
+#define RG_TXMOD_GMCELL_HI 15
+#define RG_TXMOD_GMCELL_SZ 2
+#define RG_TXLPF_GMCELL_MSK 0x00030000
+#define RG_TXLPF_GMCELL_I_MSK 0xfffcffff
+#define RG_TXLPF_GMCELL_SFT 16
+#define RG_TXLPF_GMCELL_HI 17
+#define RG_TXLPF_GMCELL_SZ 2
+#define RG_PACELL_EN_MSK 0x001c0000
+#define RG_PACELL_EN_I_MSK 0xffe3ffff
+#define RG_PACELL_EN_SFT 18
+#define RG_PACELL_EN_HI 20
+#define RG_PACELL_EN_SZ 3
+#define RG_PABIAS_CTRL_MSK 0x01e00000
+#define RG_PABIAS_CTRL_I_MSK 0xfe1fffff
+#define RG_PABIAS_CTRL_SFT 21
+#define RG_PABIAS_CTRL_HI 24
+#define RG_PABIAS_CTRL_SZ 4
+#define RG_TX_DIV_VSET_MSK 0x0c000000
+#define RG_TX_DIV_VSET_I_MSK 0xf3ffffff
+#define RG_TX_DIV_VSET_SFT 26
+#define RG_TX_DIV_VSET_HI 27
+#define RG_TX_DIV_VSET_SZ 2
+#define RG_TX_LOBUF_VSET_MSK 0x30000000
+#define RG_TX_LOBUF_VSET_I_MSK 0xcfffffff
+#define RG_TX_LOBUF_VSET_SFT 28
+#define RG_TX_LOBUF_VSET_HI 29
+#define RG_TX_LOBUF_VSET_SZ 2
+#define RG_RX_SQDC_MSK 0x00000007
+#define RG_RX_SQDC_I_MSK 0xfffffff8
+#define RG_RX_SQDC_SFT 0
+#define RG_RX_SQDC_HI 2
+#define RG_RX_SQDC_SZ 3
+#define RG_RX_DIV2_CORE_MSK 0x00000018
+#define RG_RX_DIV2_CORE_I_MSK 0xffffffe7
+#define RG_RX_DIV2_CORE_SFT 3
+#define RG_RX_DIV2_CORE_HI 4
+#define RG_RX_DIV2_CORE_SZ 2
+#define RG_RX_LOBUF_MSK 0x00000060
+#define RG_RX_LOBUF_I_MSK 0xffffff9f
+#define RG_RX_LOBUF_SFT 5
+#define RG_RX_LOBUF_HI 6
+#define RG_RX_LOBUF_SZ 2
+#define RG_TX_DPDGM_BIAS_MSK 0x00000780
+#define RG_TX_DPDGM_BIAS_I_MSK 0xfffff87f
+#define RG_TX_DPDGM_BIAS_SFT 7
+#define RG_TX_DPDGM_BIAS_HI 10
+#define RG_TX_DPDGM_BIAS_SZ 4
+#define RG_TX_DPD_DIV_MSK 0x00007800
+#define RG_TX_DPD_DIV_I_MSK 0xffff87ff
+#define RG_TX_DPD_DIV_SFT 11
+#define RG_TX_DPD_DIV_HI 14
+#define RG_TX_DPD_DIV_SZ 4
+#define RG_TX_TSSI_BIAS_MSK 0x00038000
+#define RG_TX_TSSI_BIAS_I_MSK 0xfffc7fff
+#define RG_TX_TSSI_BIAS_SFT 15
+#define RG_TX_TSSI_BIAS_HI 17
+#define RG_TX_TSSI_BIAS_SZ 3
+#define RG_TX_TSSI_DIV_MSK 0x001c0000
+#define RG_TX_TSSI_DIV_I_MSK 0xffe3ffff
+#define RG_TX_TSSI_DIV_SFT 18
+#define RG_TX_TSSI_DIV_HI 20
+#define RG_TX_TSSI_DIV_SZ 3
+#define RG_TX_TSSI_TESTMODE_MSK 0x00200000
+#define RG_TX_TSSI_TESTMODE_I_MSK 0xffdfffff
+#define RG_TX_TSSI_TESTMODE_SFT 21
+#define RG_TX_TSSI_TESTMODE_HI 21
+#define RG_TX_TSSI_TESTMODE_SZ 1
+#define RG_TX_TSSI_TEST_MSK 0x00c00000
+#define RG_TX_TSSI_TEST_I_MSK 0xff3fffff
+#define RG_TX_TSSI_TEST_SFT 22
+#define RG_TX_TSSI_TEST_HI 23
+#define RG_TX_TSSI_TEST_SZ 2
+#define RG_PACASCODE_CTRL_MSK 0x07000000
+#define RG_PACASCODE_CTRL_I_MSK 0xf8ffffff
+#define RG_PACASCODE_CTRL_SFT 24
+#define RG_PACASCODE_CTRL_HI 26
+#define RG_PACASCODE_CTRL_SZ 3
+#define RG_RX_HG_LNA_GC_MSK 0x00000003
+#define RG_RX_HG_LNA_GC_I_MSK 0xfffffffc
+#define RG_RX_HG_LNA_GC_SFT 0
+#define RG_RX_HG_LNA_GC_HI 1
+#define RG_RX_HG_LNA_GC_SZ 2
+#define RG_RX_HG_LNAHGN_BIAS_MSK 0x0000003c
+#define RG_RX_HG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define RG_RX_HG_LNAHGN_BIAS_SFT 2
+#define RG_RX_HG_LNAHGN_BIAS_HI 5
+#define RG_RX_HG_LNAHGN_BIAS_SZ 4
+#define RG_RX_HG_LNAHGP_BIAS_MSK 0x000003c0
+#define RG_RX_HG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define RG_RX_HG_LNAHGP_BIAS_SFT 6
+#define RG_RX_HG_LNAHGP_BIAS_HI 9
+#define RG_RX_HG_LNAHGP_BIAS_SZ 4
+#define RG_RX_HG_LNALG_BIAS_MSK 0x00003c00
+#define RG_RX_HG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define RG_RX_HG_LNALG_BIAS_SFT 10
+#define RG_RX_HG_LNALG_BIAS_HI 13
+#define RG_RX_HG_LNALG_BIAS_SZ 4
+#define RG_RX_HG_TZ_GC_MSK 0x0000c000
+#define RG_RX_HG_TZ_GC_I_MSK 0xffff3fff
+#define RG_RX_HG_TZ_GC_SFT 14
+#define RG_RX_HG_TZ_GC_HI 15
+#define RG_RX_HG_TZ_GC_SZ 2
+#define RG_RX_HG_TZ_CAP_MSK 0x00070000
+#define RG_RX_HG_TZ_CAP_I_MSK 0xfff8ffff
+#define RG_RX_HG_TZ_CAP_SFT 16
+#define RG_RX_HG_TZ_CAP_HI 18
+#define RG_RX_HG_TZ_CAP_SZ 3
+#define RG_RX_MG_LNA_GC_MSK 0x00000003
+#define RG_RX_MG_LNA_GC_I_MSK 0xfffffffc
+#define RG_RX_MG_LNA_GC_SFT 0
+#define RG_RX_MG_LNA_GC_HI 1
+#define RG_RX_MG_LNA_GC_SZ 2
+#define RG_RX_MG_LNAHGN_BIAS_MSK 0x0000003c
+#define RG_RX_MG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define RG_RX_MG_LNAHGN_BIAS_SFT 2
+#define RG_RX_MG_LNAHGN_BIAS_HI 5
+#define RG_RX_MG_LNAHGN_BIAS_SZ 4
+#define RG_RX_MG_LNAHGP_BIAS_MSK 0x000003c0
+#define RG_RX_MG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define RG_RX_MG_LNAHGP_BIAS_SFT 6
+#define RG_RX_MG_LNAHGP_BIAS_HI 9
+#define RG_RX_MG_LNAHGP_BIAS_SZ 4
+#define RG_RX_MG_LNALG_BIAS_MSK 0x00003c00
+#define RG_RX_MG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define RG_RX_MG_LNALG_BIAS_SFT 10
+#define RG_RX_MG_LNALG_BIAS_HI 13
+#define RG_RX_MG_LNALG_BIAS_SZ 4
+#define RG_RX_MG_TZ_GC_MSK 0x0000c000
+#define RG_RX_MG_TZ_GC_I_MSK 0xffff3fff
+#define RG_RX_MG_TZ_GC_SFT 14
+#define RG_RX_MG_TZ_GC_HI 15
+#define RG_RX_MG_TZ_GC_SZ 2
+#define RG_RX_MG_TZ_CAP_MSK 0x00070000
+#define RG_RX_MG_TZ_CAP_I_MSK 0xfff8ffff
+#define RG_RX_MG_TZ_CAP_SFT 16
+#define RG_RX_MG_TZ_CAP_HI 18
+#define RG_RX_MG_TZ_CAP_SZ 3
+#define RG_RX_LG_LNA_GC_MSK 0x00000003
+#define RG_RX_LG_LNA_GC_I_MSK 0xfffffffc
+#define RG_RX_LG_LNA_GC_SFT 0
+#define RG_RX_LG_LNA_GC_HI 1
+#define RG_RX_LG_LNA_GC_SZ 2
+#define RG_RX_LG_LNAHGN_BIAS_MSK 0x0000003c
+#define RG_RX_LG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define RG_RX_LG_LNAHGN_BIAS_SFT 2
+#define RG_RX_LG_LNAHGN_BIAS_HI 5
+#define RG_RX_LG_LNAHGN_BIAS_SZ 4
+#define RG_RX_LG_LNAHGP_BIAS_MSK 0x000003c0
+#define RG_RX_LG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define RG_RX_LG_LNAHGP_BIAS_SFT 6
+#define RG_RX_LG_LNAHGP_BIAS_HI 9
+#define RG_RX_LG_LNAHGP_BIAS_SZ 4
+#define RG_RX_LG_LNALG_BIAS_MSK 0x00003c00
+#define RG_RX_LG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define RG_RX_LG_LNALG_BIAS_SFT 10
+#define RG_RX_LG_LNALG_BIAS_HI 13
+#define RG_RX_LG_LNALG_BIAS_SZ 4
+#define RG_RX_LG_TZ_GC_MSK 0x0000c000
+#define RG_RX_LG_TZ_GC_I_MSK 0xffff3fff
+#define RG_RX_LG_TZ_GC_SFT 14
+#define RG_RX_LG_TZ_GC_HI 15
+#define RG_RX_LG_TZ_GC_SZ 2
+#define RG_RX_LG_TZ_CAP_MSK 0x00070000
+#define RG_RX_LG_TZ_CAP_I_MSK 0xfff8ffff
+#define RG_RX_LG_TZ_CAP_SFT 16
+#define RG_RX_LG_TZ_CAP_HI 18
+#define RG_RX_LG_TZ_CAP_SZ 3
+#define RG_RX_ULG_LNA_GC_MSK 0x00000003
+#define RG_RX_ULG_LNA_GC_I_MSK 0xfffffffc
+#define RG_RX_ULG_LNA_GC_SFT 0
+#define RG_RX_ULG_LNA_GC_HI 1
+#define RG_RX_ULG_LNA_GC_SZ 2
+#define RG_RX_ULG_LNAHGN_BIAS_MSK 0x0000003c
+#define RG_RX_ULG_LNAHGN_BIAS_I_MSK 0xffffffc3
+#define RG_RX_ULG_LNAHGN_BIAS_SFT 2
+#define RG_RX_ULG_LNAHGN_BIAS_HI 5
+#define RG_RX_ULG_LNAHGN_BIAS_SZ 4
+#define RG_RX_ULG_LNAHGP_BIAS_MSK 0x000003c0
+#define RG_RX_ULG_LNAHGP_BIAS_I_MSK 0xfffffc3f
+#define RG_RX_ULG_LNAHGP_BIAS_SFT 6
+#define RG_RX_ULG_LNAHGP_BIAS_HI 9
+#define RG_RX_ULG_LNAHGP_BIAS_SZ 4
+#define RG_RX_ULG_LNALG_BIAS_MSK 0x00003c00
+#define RG_RX_ULG_LNALG_BIAS_I_MSK 0xffffc3ff
+#define RG_RX_ULG_LNALG_BIAS_SFT 10
+#define RG_RX_ULG_LNALG_BIAS_HI 13
+#define RG_RX_ULG_LNALG_BIAS_SZ 4
+#define RG_RX_ULG_TZ_GC_MSK 0x0000c000
+#define RG_RX_ULG_TZ_GC_I_MSK 0xffff3fff
+#define RG_RX_ULG_TZ_GC_SFT 14
+#define RG_RX_ULG_TZ_GC_HI 15
+#define RG_RX_ULG_TZ_GC_SZ 2
+#define RG_RX_ULG_TZ_CAP_MSK 0x00070000
+#define RG_RX_ULG_TZ_CAP_I_MSK 0xfff8ffff
+#define RG_RX_ULG_TZ_CAP_SFT 16
+#define RG_RX_ULG_TZ_CAP_HI 18
+#define RG_RX_ULG_TZ_CAP_SZ 3
+#define RG_HPF1_FAST_SET_X_MSK 0x00000001
+#define RG_HPF1_FAST_SET_X_I_MSK 0xfffffffe
+#define RG_HPF1_FAST_SET_X_SFT 0
+#define RG_HPF1_FAST_SET_X_HI 0
+#define RG_HPF1_FAST_SET_X_SZ 1
+#define RG_HPF1_FAST_SET_Y_MSK 0x00000002
+#define RG_HPF1_FAST_SET_Y_I_MSK 0xfffffffd
+#define RG_HPF1_FAST_SET_Y_SFT 1
+#define RG_HPF1_FAST_SET_Y_HI 1
+#define RG_HPF1_FAST_SET_Y_SZ 1
+#define RG_HPF1_FAST_SET_Z_MSK 0x00000004
+#define RG_HPF1_FAST_SET_Z_I_MSK 0xfffffffb
+#define RG_HPF1_FAST_SET_Z_SFT 2
+#define RG_HPF1_FAST_SET_Z_HI 2
+#define RG_HPF1_FAST_SET_Z_SZ 1
+#define RG_HPF_T1A_MSK 0x00000018
+#define RG_HPF_T1A_I_MSK 0xffffffe7
+#define RG_HPF_T1A_SFT 3
+#define RG_HPF_T1A_HI 4
+#define RG_HPF_T1A_SZ 2
+#define RG_HPF_T1B_MSK 0x00000060
+#define RG_HPF_T1B_I_MSK 0xffffff9f
+#define RG_HPF_T1B_SFT 5
+#define RG_HPF_T1B_HI 6
+#define RG_HPF_T1B_SZ 2
+#define RG_HPF_T1C_MSK 0x00000180
+#define RG_HPF_T1C_I_MSK 0xfffffe7f
+#define RG_HPF_T1C_SFT 7
+#define RG_HPF_T1C_HI 8
+#define RG_HPF_T1C_SZ 2
+#define RG_RX_LNA_TRI_SEL_MSK 0x00000600
+#define RG_RX_LNA_TRI_SEL_I_MSK 0xfffff9ff
+#define RG_RX_LNA_TRI_SEL_SFT 9
+#define RG_RX_LNA_TRI_SEL_HI 10
+#define RG_RX_LNA_TRI_SEL_SZ 2
+#define RG_RX_LNA_SETTLE_MSK 0x00001800
+#define RG_RX_LNA_SETTLE_I_MSK 0xffffe7ff
+#define RG_RX_LNA_SETTLE_SFT 11
+#define RG_RX_LNA_SETTLE_HI 12
+#define RG_RX_LNA_SETTLE_SZ 2
+#define RG_TXGAIN_PHYCTRL_MSK 0x00002000
+#define RG_TXGAIN_PHYCTRL_I_MSK 0xffffdfff
+#define RG_TXGAIN_PHYCTRL_SFT 13
+#define RG_TXGAIN_PHYCTRL_HI 13
+#define RG_TXGAIN_PHYCTRL_SZ 1
+#define RG_TX_GAIN_MSK 0x003fc000
+#define RG_TX_GAIN_I_MSK 0xffc03fff
+#define RG_TX_GAIN_SFT 14
+#define RG_TX_GAIN_HI 21
+#define RG_TX_GAIN_SZ 8
+#define RG_TXGAIN_MANUAL_MSK 0x00400000
+#define RG_TXGAIN_MANUAL_I_MSK 0xffbfffff
+#define RG_TXGAIN_MANUAL_SFT 22
+#define RG_TXGAIN_MANUAL_HI 22
+#define RG_TXGAIN_MANUAL_SZ 1
+#define RG_TX_GAIN_OFFSET_MSK 0x07800000
+#define RG_TX_GAIN_OFFSET_I_MSK 0xf87fffff
+#define RG_TX_GAIN_OFFSET_SFT 23
+#define RG_TX_GAIN_OFFSET_HI 26
+#define RG_TX_GAIN_OFFSET_SZ 4
+#define RG_ADC_CLKSEL_MSK 0x00000001
+#define RG_ADC_CLKSEL_I_MSK 0xfffffffe
+#define RG_ADC_CLKSEL_SFT 0
+#define RG_ADC_CLKSEL_HI 0
+#define RG_ADC_CLKSEL_SZ 1
+#define RG_ADC_DIBIAS_MSK 0x00000006
+#define RG_ADC_DIBIAS_I_MSK 0xfffffff9
+#define RG_ADC_DIBIAS_SFT 1
+#define RG_ADC_DIBIAS_HI 2
+#define RG_ADC_DIBIAS_SZ 2
+#define RG_ADC_DIVR_MSK 0x00000008
+#define RG_ADC_DIVR_I_MSK 0xfffffff7
+#define RG_ADC_DIVR_SFT 3
+#define RG_ADC_DIVR_HI 3
+#define RG_ADC_DIVR_SZ 1
+#define RG_ADC_DVCMI_MSK 0x00000030
+#define RG_ADC_DVCMI_I_MSK 0xffffffcf
+#define RG_ADC_DVCMI_SFT 4
+#define RG_ADC_DVCMI_HI 5
+#define RG_ADC_DVCMI_SZ 2
+#define RG_ADC_SAMSEL_MSK 0x000003c0
+#define RG_ADC_SAMSEL_I_MSK 0xfffffc3f
+#define RG_ADC_SAMSEL_SFT 6
+#define RG_ADC_SAMSEL_HI 9
+#define RG_ADC_SAMSEL_SZ 4
+#define RG_ADC_STNBY_MSK 0x00000400
+#define RG_ADC_STNBY_I_MSK 0xfffffbff
+#define RG_ADC_STNBY_SFT 10
+#define RG_ADC_STNBY_HI 10
+#define RG_ADC_STNBY_SZ 1
+#define RG_ADC_TESTMODE_MSK 0x00000800
+#define RG_ADC_TESTMODE_I_MSK 0xfffff7ff
+#define RG_ADC_TESTMODE_SFT 11
+#define RG_ADC_TESTMODE_HI 11
+#define RG_ADC_TESTMODE_SZ 1
+#define RG_ADC_TSEL_MSK 0x0000f000
+#define RG_ADC_TSEL_I_MSK 0xffff0fff
+#define RG_ADC_TSEL_SFT 12
+#define RG_ADC_TSEL_HI 15
+#define RG_ADC_TSEL_SZ 4
+#define RG_ADC_VRSEL_MSK 0x00030000
+#define RG_ADC_VRSEL_I_MSK 0xfffcffff
+#define RG_ADC_VRSEL_SFT 16
+#define RG_ADC_VRSEL_HI 17
+#define RG_ADC_VRSEL_SZ 2
+#define RG_DICMP_MSK 0x000c0000
+#define RG_DICMP_I_MSK 0xfff3ffff
+#define RG_DICMP_SFT 18
+#define RG_DICMP_HI 19
+#define RG_DICMP_SZ 2
+#define RG_DIOP_MSK 0x00300000
+#define RG_DIOP_I_MSK 0xffcfffff
+#define RG_DIOP_SFT 20
+#define RG_DIOP_HI 21
+#define RG_DIOP_SZ 2
+#define RG_SARADC_VRSEL_MSK 0x00c00000
+#define RG_SARADC_VRSEL_I_MSK 0xff3fffff
+#define RG_SARADC_VRSEL_SFT 22
+#define RG_SARADC_VRSEL_HI 23
+#define RG_SARADC_VRSEL_SZ 2
+#define RG_EN_SAR_TEST_MSK 0x03000000
+#define RG_EN_SAR_TEST_I_MSK 0xfcffffff
+#define RG_EN_SAR_TEST_SFT 24
+#define RG_EN_SAR_TEST_HI 25
+#define RG_EN_SAR_TEST_SZ 2
+#define RG_SARADC_THERMAL_MSK 0x04000000
+#define RG_SARADC_THERMAL_I_MSK 0xfbffffff
+#define RG_SARADC_THERMAL_SFT 26
+#define RG_SARADC_THERMAL_HI 26
+#define RG_SARADC_THERMAL_SZ 1
+#define RG_SARADC_TSSI_MSK 0x08000000
+#define RG_SARADC_TSSI_I_MSK 0xf7ffffff
+#define RG_SARADC_TSSI_SFT 27
+#define RG_SARADC_TSSI_HI 27
+#define RG_SARADC_TSSI_SZ 1
+#define RG_CLK_SAR_SEL_MSK 0x30000000
+#define RG_CLK_SAR_SEL_I_MSK 0xcfffffff
+#define RG_CLK_SAR_SEL_SFT 28
+#define RG_CLK_SAR_SEL_HI 29
+#define RG_CLK_SAR_SEL_SZ 2
+#define RG_EN_SARADC_MSK 0x40000000
+#define RG_EN_SARADC_I_MSK 0xbfffffff
+#define RG_EN_SARADC_SFT 30
+#define RG_EN_SARADC_HI 30
+#define RG_EN_SARADC_SZ 1
+#define RG_DACI1ST_MSK 0x00000003
+#define RG_DACI1ST_I_MSK 0xfffffffc
+#define RG_DACI1ST_SFT 0
+#define RG_DACI1ST_HI 1
+#define RG_DACI1ST_SZ 2
+#define RG_TX_DACLPF_ICOURSE_MSK 0x0000000c
+#define RG_TX_DACLPF_ICOURSE_I_MSK 0xfffffff3
+#define RG_TX_DACLPF_ICOURSE_SFT 2
+#define RG_TX_DACLPF_ICOURSE_HI 3
+#define RG_TX_DACLPF_ICOURSE_SZ 2
+#define RG_TX_DACLPF_IFINE_MSK 0x00000030
+#define RG_TX_DACLPF_IFINE_I_MSK 0xffffffcf
+#define RG_TX_DACLPF_IFINE_SFT 4
+#define RG_TX_DACLPF_IFINE_HI 5
+#define RG_TX_DACLPF_IFINE_SZ 2
+#define RG_TX_DACLPF_VCM_MSK 0x000000c0
+#define RG_TX_DACLPF_VCM_I_MSK 0xffffff3f
+#define RG_TX_DACLPF_VCM_SFT 6
+#define RG_TX_DACLPF_VCM_HI 7
+#define RG_TX_DACLPF_VCM_SZ 2
+#define RG_TX_DAC_CKEDGE_SEL_MSK 0x00000100
+#define RG_TX_DAC_CKEDGE_SEL_I_MSK 0xfffffeff
+#define RG_TX_DAC_CKEDGE_SEL_SFT 8
+#define RG_TX_DAC_CKEDGE_SEL_HI 8
+#define RG_TX_DAC_CKEDGE_SEL_SZ 1
+#define RG_TX_DAC_IBIAS_MSK 0x00000600
+#define RG_TX_DAC_IBIAS_I_MSK 0xfffff9ff
+#define RG_TX_DAC_IBIAS_SFT 9
+#define RG_TX_DAC_IBIAS_HI 10
+#define RG_TX_DAC_IBIAS_SZ 2
+#define RG_TX_DAC_OS_MSK 0x00003800
+#define RG_TX_DAC_OS_I_MSK 0xffffc7ff
+#define RG_TX_DAC_OS_SFT 11
+#define RG_TX_DAC_OS_HI 13
+#define RG_TX_DAC_OS_SZ 3
+#define RG_TX_DAC_RCAL_MSK 0x0000c000
+#define RG_TX_DAC_RCAL_I_MSK 0xffff3fff
+#define RG_TX_DAC_RCAL_SFT 14
+#define RG_TX_DAC_RCAL_HI 15
+#define RG_TX_DAC_RCAL_SZ 2
+#define RG_TX_DAC_TSEL_MSK 0x000f0000
+#define RG_TX_DAC_TSEL_I_MSK 0xfff0ffff
+#define RG_TX_DAC_TSEL_SFT 16
+#define RG_TX_DAC_TSEL_HI 19
+#define RG_TX_DAC_TSEL_SZ 4
+#define RG_TX_EN_VOLTAGE_IN_MSK 0x00100000
+#define RG_TX_EN_VOLTAGE_IN_I_MSK 0xffefffff
+#define RG_TX_EN_VOLTAGE_IN_SFT 20
+#define RG_TX_EN_VOLTAGE_IN_HI 20
+#define RG_TX_EN_VOLTAGE_IN_SZ 1
+#define RG_TXLPF_BYPASS_MSK 0x00200000
+#define RG_TXLPF_BYPASS_I_MSK 0xffdfffff
+#define RG_TXLPF_BYPASS_SFT 21
+#define RG_TXLPF_BYPASS_HI 21
+#define RG_TXLPF_BYPASS_SZ 1
+#define RG_TXLPF_BOOSTI_MSK 0x00400000
+#define RG_TXLPF_BOOSTI_I_MSK 0xffbfffff
+#define RG_TXLPF_BOOSTI_SFT 22
+#define RG_TXLPF_BOOSTI_HI 22
+#define RG_TXLPF_BOOSTI_SZ 1
+#define RG_TX_DAC_IOFFSET_MSK 0x07800000
+#define RG_TX_DAC_IOFFSET_I_MSK 0xf87fffff
+#define RG_TX_DAC_IOFFSET_SFT 23
+#define RG_TX_DAC_IOFFSET_HI 26
+#define RG_TX_DAC_IOFFSET_SZ 4
+#define RG_TX_DAC_QOFFSET_MSK 0x78000000
+#define RG_TX_DAC_QOFFSET_I_MSK 0x87ffffff
+#define RG_TX_DAC_QOFFSET_SFT 27
+#define RG_TX_DAC_QOFFSET_HI 30
+#define RG_TX_DAC_QOFFSET_SZ 4
+#define RG_EN_SX_R3_MSK 0x00000001
+#define RG_EN_SX_R3_I_MSK 0xfffffffe
+#define RG_EN_SX_R3_SFT 0
+#define RG_EN_SX_R3_HI 0
+#define RG_EN_SX_R3_SZ 1
+#define RG_EN_SX_CH_MSK 0x00000002
+#define RG_EN_SX_CH_I_MSK 0xfffffffd
+#define RG_EN_SX_CH_SFT 1
+#define RG_EN_SX_CH_HI 1
+#define RG_EN_SX_CH_SZ 1
+#define RG_EN_SX_CHP_MSK 0x00000004
+#define RG_EN_SX_CHP_I_MSK 0xfffffffb
+#define RG_EN_SX_CHP_SFT 2
+#define RG_EN_SX_CHP_HI 2
+#define RG_EN_SX_CHP_SZ 1
+#define RG_EN_SX_DIVCK_MSK 0x00000008
+#define RG_EN_SX_DIVCK_I_MSK 0xfffffff7
+#define RG_EN_SX_DIVCK_SFT 3
+#define RG_EN_SX_DIVCK_HI 3
+#define RG_EN_SX_DIVCK_SZ 1
+#define RG_EN_SX_VCOBF_MSK 0x00000010
+#define RG_EN_SX_VCOBF_I_MSK 0xffffffef
+#define RG_EN_SX_VCOBF_SFT 4
+#define RG_EN_SX_VCOBF_HI 4
+#define RG_EN_SX_VCOBF_SZ 1
+#define RG_EN_SX_VCO_MSK 0x00000020
+#define RG_EN_SX_VCO_I_MSK 0xffffffdf
+#define RG_EN_SX_VCO_SFT 5
+#define RG_EN_SX_VCO_HI 5
+#define RG_EN_SX_VCO_SZ 1
+#define RG_EN_SX_MOD_MSK 0x00000040
+#define RG_EN_SX_MOD_I_MSK 0xffffffbf
+#define RG_EN_SX_MOD_SFT 6
+#define RG_EN_SX_MOD_HI 6
+#define RG_EN_SX_MOD_SZ 1
+#define RG_EN_SX_DITHER_MSK 0x00000100
+#define RG_EN_SX_DITHER_I_MSK 0xfffffeff
+#define RG_EN_SX_DITHER_SFT 8
+#define RG_EN_SX_DITHER_HI 8
+#define RG_EN_SX_DITHER_SZ 1
+#define RG_EN_SX_VT_MON_MSK 0x00000800
+#define RG_EN_SX_VT_MON_I_MSK 0xfffff7ff
+#define RG_EN_SX_VT_MON_SFT 11
+#define RG_EN_SX_VT_MON_HI 11
+#define RG_EN_SX_VT_MON_SZ 1
+#define RG_EN_SX_VT_MON_DG_MSK 0x00001000
+#define RG_EN_SX_VT_MON_DG_I_MSK 0xffffefff
+#define RG_EN_SX_VT_MON_DG_SFT 12
+#define RG_EN_SX_VT_MON_DG_HI 12
+#define RG_EN_SX_VT_MON_DG_SZ 1
+#define RG_EN_SX_DIV_MSK 0x00002000
+#define RG_EN_SX_DIV_I_MSK 0xffffdfff
+#define RG_EN_SX_DIV_SFT 13
+#define RG_EN_SX_DIV_HI 13
+#define RG_EN_SX_DIV_SZ 1
+#define RG_EN_SX_LPF_MSK 0x00004000
+#define RG_EN_SX_LPF_I_MSK 0xffffbfff
+#define RG_EN_SX_LPF_SFT 14
+#define RG_EN_SX_LPF_HI 14
+#define RG_EN_SX_LPF_SZ 1
+#define RG_EN_DPL_MOD_MSK 0x00008000
+#define RG_EN_DPL_MOD_I_MSK 0xffff7fff
+#define RG_EN_DPL_MOD_SFT 15
+#define RG_EN_DPL_MOD_HI 15
+#define RG_EN_DPL_MOD_SZ 1
+#define RG_DPL_MOD_ORDER_MSK 0x00030000
+#define RG_DPL_MOD_ORDER_I_MSK 0xfffcffff
+#define RG_DPL_MOD_ORDER_SFT 16
+#define RG_DPL_MOD_ORDER_HI 17
+#define RG_DPL_MOD_ORDER_SZ 2
+#define RG_SX_RFCTRL_F_MSK 0x00ffffff
+#define RG_SX_RFCTRL_F_I_MSK 0xff000000
+#define RG_SX_RFCTRL_F_SFT 0
+#define RG_SX_RFCTRL_F_HI 23
+#define RG_SX_RFCTRL_F_SZ 24
+#define RG_SX_SEL_CP_MSK 0x0f000000
+#define RG_SX_SEL_CP_I_MSK 0xf0ffffff
+#define RG_SX_SEL_CP_SFT 24
+#define RG_SX_SEL_CP_HI 27
+#define RG_SX_SEL_CP_SZ 4
+#define RG_SX_SEL_CS_MSK 0xf0000000
+#define RG_SX_SEL_CS_I_MSK 0x0fffffff
+#define RG_SX_SEL_CS_SFT 28
+#define RG_SX_SEL_CS_HI 31
+#define RG_SX_SEL_CS_SZ 4
+#define RG_SX_RFCTRL_CH_MSK 0x000007ff
+#define RG_SX_RFCTRL_CH_I_MSK 0xfffff800
+#define RG_SX_RFCTRL_CH_SFT 0
+#define RG_SX_RFCTRL_CH_HI 10
+#define RG_SX_RFCTRL_CH_SZ 11
+#define RG_SX_SEL_C3_MSK 0x00007800
+#define RG_SX_SEL_C3_I_MSK 0xffff87ff
+#define RG_SX_SEL_C3_SFT 11
+#define RG_SX_SEL_C3_HI 14
+#define RG_SX_SEL_C3_SZ 4
+#define RG_SX_SEL_RS_MSK 0x000f8000
+#define RG_SX_SEL_RS_I_MSK 0xfff07fff
+#define RG_SX_SEL_RS_SFT 15
+#define RG_SX_SEL_RS_HI 19
+#define RG_SX_SEL_RS_SZ 5
+#define RG_SX_SEL_R3_MSK 0x01f00000
+#define RG_SX_SEL_R3_I_MSK 0xfe0fffff
+#define RG_SX_SEL_R3_SFT 20
+#define RG_SX_SEL_R3_HI 24
+#define RG_SX_SEL_R3_SZ 5
+#define RG_SX_SEL_ICHP_MSK 0x0000001f
+#define RG_SX_SEL_ICHP_I_MSK 0xffffffe0
+#define RG_SX_SEL_ICHP_SFT 0
+#define RG_SX_SEL_ICHP_HI 4
+#define RG_SX_SEL_ICHP_SZ 5
+#define RG_SX_SEL_PCHP_MSK 0x000003e0
+#define RG_SX_SEL_PCHP_I_MSK 0xfffffc1f
+#define RG_SX_SEL_PCHP_SFT 5
+#define RG_SX_SEL_PCHP_HI 9
+#define RG_SX_SEL_PCHP_SZ 5
+#define RG_SX_SEL_CHP_REGOP_MSK 0x00003c00
+#define RG_SX_SEL_CHP_REGOP_I_MSK 0xffffc3ff
+#define RG_SX_SEL_CHP_REGOP_SFT 10
+#define RG_SX_SEL_CHP_REGOP_HI 13
+#define RG_SX_SEL_CHP_REGOP_SZ 4
+#define RG_SX_SEL_CHP_UNIOP_MSK 0x0003c000
+#define RG_SX_SEL_CHP_UNIOP_I_MSK 0xfffc3fff
+#define RG_SX_SEL_CHP_UNIOP_SFT 14
+#define RG_SX_SEL_CHP_UNIOP_HI 17
+#define RG_SX_SEL_CHP_UNIOP_SZ 4
+#define RG_SX_CHP_IOST_POL_MSK 0x00040000
+#define RG_SX_CHP_IOST_POL_I_MSK 0xfffbffff
+#define RG_SX_CHP_IOST_POL_SFT 18
+#define RG_SX_CHP_IOST_POL_HI 18
+#define RG_SX_CHP_IOST_POL_SZ 1
+#define RG_SX_CHP_IOST_MSK 0x00380000
+#define RG_SX_CHP_IOST_I_MSK 0xffc7ffff
+#define RG_SX_CHP_IOST_SFT 19
+#define RG_SX_CHP_IOST_HI 21
+#define RG_SX_CHP_IOST_SZ 3
+#define RG_SX_PFDSEL_MSK 0x00400000
+#define RG_SX_PFDSEL_I_MSK 0xffbfffff
+#define RG_SX_PFDSEL_SFT 22
+#define RG_SX_PFDSEL_HI 22
+#define RG_SX_PFDSEL_SZ 1
+#define RG_SX_PFD_SET_MSK 0x00800000
+#define RG_SX_PFD_SET_I_MSK 0xff7fffff
+#define RG_SX_PFD_SET_SFT 23
+#define RG_SX_PFD_SET_HI 23
+#define RG_SX_PFD_SET_SZ 1
+#define RG_SX_PFD_SET1_MSK 0x01000000
+#define RG_SX_PFD_SET1_I_MSK 0xfeffffff
+#define RG_SX_PFD_SET1_SFT 24
+#define RG_SX_PFD_SET1_HI 24
+#define RG_SX_PFD_SET1_SZ 1
+#define RG_SX_PFD_SET2_MSK 0x02000000
+#define RG_SX_PFD_SET2_I_MSK 0xfdffffff
+#define RG_SX_PFD_SET2_SFT 25
+#define RG_SX_PFD_SET2_HI 25
+#define RG_SX_PFD_SET2_SZ 1
+#define RG_SX_VBNCAS_SEL_MSK 0x04000000
+#define RG_SX_VBNCAS_SEL_I_MSK 0xfbffffff
+#define RG_SX_VBNCAS_SEL_SFT 26
+#define RG_SX_VBNCAS_SEL_HI 26
+#define RG_SX_VBNCAS_SEL_SZ 1
+#define RG_SX_PFD_RST_H_MSK 0x08000000
+#define RG_SX_PFD_RST_H_I_MSK 0xf7ffffff
+#define RG_SX_PFD_RST_H_SFT 27
+#define RG_SX_PFD_RST_H_HI 27
+#define RG_SX_PFD_RST_H_SZ 1
+#define RG_SX_PFD_TRUP_MSK 0x10000000
+#define RG_SX_PFD_TRUP_I_MSK 0xefffffff
+#define RG_SX_PFD_TRUP_SFT 28
+#define RG_SX_PFD_TRUP_HI 28
+#define RG_SX_PFD_TRUP_SZ 1
+#define RG_SX_PFD_TRDN_MSK 0x20000000
+#define RG_SX_PFD_TRDN_I_MSK 0xdfffffff
+#define RG_SX_PFD_TRDN_SFT 29
+#define RG_SX_PFD_TRDN_HI 29
+#define RG_SX_PFD_TRDN_SZ 1
+#define RG_SX_PFD_TRSEL_MSK 0x40000000
+#define RG_SX_PFD_TRSEL_I_MSK 0xbfffffff
+#define RG_SX_PFD_TRSEL_SFT 30
+#define RG_SX_PFD_TRSEL_HI 30
+#define RG_SX_PFD_TRSEL_SZ 1
+#define RG_SX_VCOBA_R_MSK 0x00000007
+#define RG_SX_VCOBA_R_I_MSK 0xfffffff8
+#define RG_SX_VCOBA_R_SFT 0
+#define RG_SX_VCOBA_R_HI 2
+#define RG_SX_VCOBA_R_SZ 3
+#define RG_SX_VCORSEL_MSK 0x000000f8
+#define RG_SX_VCORSEL_I_MSK 0xffffff07
+#define RG_SX_VCORSEL_SFT 3
+#define RG_SX_VCORSEL_HI 7
+#define RG_SX_VCORSEL_SZ 5
+#define RG_SX_VCOCUSEL_MSK 0x00000f00
+#define RG_SX_VCOCUSEL_I_MSK 0xfffff0ff
+#define RG_SX_VCOCUSEL_SFT 8
+#define RG_SX_VCOCUSEL_HI 11
+#define RG_SX_VCOCUSEL_SZ 4
+#define RG_SX_RXBFSEL_MSK 0x0000f000
+#define RG_SX_RXBFSEL_I_MSK 0xffff0fff
+#define RG_SX_RXBFSEL_SFT 12
+#define RG_SX_RXBFSEL_HI 15
+#define RG_SX_RXBFSEL_SZ 4
+#define RG_SX_TXBFSEL_MSK 0x000f0000
+#define RG_SX_TXBFSEL_I_MSK 0xfff0ffff
+#define RG_SX_TXBFSEL_SFT 16
+#define RG_SX_TXBFSEL_HI 19
+#define RG_SX_TXBFSEL_SZ 4
+#define RG_SX_VCOBFSEL_MSK 0x00f00000
+#define RG_SX_VCOBFSEL_I_MSK 0xff0fffff
+#define RG_SX_VCOBFSEL_SFT 20
+#define RG_SX_VCOBFSEL_HI 23
+#define RG_SX_VCOBFSEL_SZ 4
+#define RG_SX_DIVBFSEL_MSK 0x0f000000
+#define RG_SX_DIVBFSEL_I_MSK 0xf0ffffff
+#define RG_SX_DIVBFSEL_SFT 24
+#define RG_SX_DIVBFSEL_HI 27
+#define RG_SX_DIVBFSEL_SZ 4
+#define RG_SX_GNDR_SEL_MSK 0xf0000000
+#define RG_SX_GNDR_SEL_I_MSK 0x0fffffff
+#define RG_SX_GNDR_SEL_SFT 28
+#define RG_SX_GNDR_SEL_HI 31
+#define RG_SX_GNDR_SEL_SZ 4
+#define RG_SX_DITHER_WEIGHT_MSK 0x00000003
+#define RG_SX_DITHER_WEIGHT_I_MSK 0xfffffffc
+#define RG_SX_DITHER_WEIGHT_SFT 0
+#define RG_SX_DITHER_WEIGHT_HI 1
+#define RG_SX_DITHER_WEIGHT_SZ 2
+#define RG_SX_MOD_ORDER_MSK 0x00000030
+#define RG_SX_MOD_ORDER_I_MSK 0xffffffcf
+#define RG_SX_MOD_ORDER_SFT 4
+#define RG_SX_MOD_ORDER_HI 5
+#define RG_SX_MOD_ORDER_SZ 2
+#define RG_SX_RST_H_DIV_MSK 0x00000200
+#define RG_SX_RST_H_DIV_I_MSK 0xfffffdff
+#define RG_SX_RST_H_DIV_SFT 9
+#define RG_SX_RST_H_DIV_HI 9
+#define RG_SX_RST_H_DIV_SZ 1
+#define RG_SX_SDM_EDGE_MSK 0x00000400
+#define RG_SX_SDM_EDGE_I_MSK 0xfffffbff
+#define RG_SX_SDM_EDGE_SFT 10
+#define RG_SX_SDM_EDGE_HI 10
+#define RG_SX_SDM_EDGE_SZ 1
+#define RG_SX_XO_GM_MSK 0x00001800
+#define RG_SX_XO_GM_I_MSK 0xffffe7ff
+#define RG_SX_XO_GM_SFT 11
+#define RG_SX_XO_GM_HI 12
+#define RG_SX_XO_GM_SZ 2
+#define RG_SX_REFBYTWO_MSK 0x00002000
+#define RG_SX_REFBYTWO_I_MSK 0xffffdfff
+#define RG_SX_REFBYTWO_SFT 13
+#define RG_SX_REFBYTWO_HI 13
+#define RG_SX_REFBYTWO_SZ 1
+#define RG_SX_LCKEN_MSK 0x00080000
+#define RG_SX_LCKEN_I_MSK 0xfff7ffff
+#define RG_SX_LCKEN_SFT 19
+#define RG_SX_LCKEN_HI 19
+#define RG_SX_LCKEN_SZ 1
+#define RG_SX_PREVDD_MSK 0x00f00000
+#define RG_SX_PREVDD_I_MSK 0xff0fffff
+#define RG_SX_PREVDD_SFT 20
+#define RG_SX_PREVDD_HI 23
+#define RG_SX_PREVDD_SZ 4
+#define RG_SX_PSCONTERVDD_MSK 0x0f000000
+#define RG_SX_PSCONTERVDD_I_MSK 0xf0ffffff
+#define RG_SX_PSCONTERVDD_SFT 24
+#define RG_SX_PSCONTERVDD_HI 27
+#define RG_SX_PSCONTERVDD_SZ 4
+#define RG_SX_PH_MSK 0x00002000
+#define RG_SX_PH_I_MSK 0xffffdfff
+#define RG_SX_PH_SFT 13
+#define RG_SX_PH_HI 13
+#define RG_SX_PH_SZ 1
+#define RG_SX_PL_MSK 0x00004000
+#define RG_SX_PL_I_MSK 0xffffbfff
+#define RG_SX_PL_SFT 14
+#define RG_SX_PL_HI 14
+#define RG_SX_PL_SZ 1
+#define RG_XOSC_CBANK_XO_MSK 0x00078000
+#define RG_XOSC_CBANK_XO_I_MSK 0xfff87fff
+#define RG_XOSC_CBANK_XO_SFT 15
+#define RG_XOSC_CBANK_XO_HI 18
+#define RG_XOSC_CBANK_XO_SZ 4
+#define RG_XOSC_CBANK_XI_MSK 0x00780000
+#define RG_XOSC_CBANK_XI_I_MSK 0xff87ffff
+#define RG_XOSC_CBANK_XI_SFT 19
+#define RG_XOSC_CBANK_XI_HI 22
+#define RG_XOSC_CBANK_XI_SZ 4
+#define RG_SX_VT_MON_MODE_MSK 0x00000001
+#define RG_SX_VT_MON_MODE_I_MSK 0xfffffffe
+#define RG_SX_VT_MON_MODE_SFT 0
+#define RG_SX_VT_MON_MODE_HI 0
+#define RG_SX_VT_MON_MODE_SZ 1
+#define RG_SX_VT_TH_HI_MSK 0x00000006
+#define RG_SX_VT_TH_HI_I_MSK 0xfffffff9
+#define RG_SX_VT_TH_HI_SFT 1
+#define RG_SX_VT_TH_HI_HI 2
+#define RG_SX_VT_TH_HI_SZ 2
+#define RG_SX_VT_TH_LO_MSK 0x00000018
+#define RG_SX_VT_TH_LO_I_MSK 0xffffffe7
+#define RG_SX_VT_TH_LO_SFT 3
+#define RG_SX_VT_TH_LO_HI 4
+#define RG_SX_VT_TH_LO_SZ 2
+#define RG_SX_VT_SET_MSK 0x00000020
+#define RG_SX_VT_SET_I_MSK 0xffffffdf
+#define RG_SX_VT_SET_SFT 5
+#define RG_SX_VT_SET_HI 5
+#define RG_SX_VT_SET_SZ 1
+#define RG_SX_VT_MON_TMR_MSK 0x00007fc0
+#define RG_SX_VT_MON_TMR_I_MSK 0xffff803f
+#define RG_SX_VT_MON_TMR_SFT 6
+#define RG_SX_VT_MON_TMR_HI 14
+#define RG_SX_VT_MON_TMR_SZ 9
+#define RG_EN_DP_VT_MON_MSK 0x00000001
+#define RG_EN_DP_VT_MON_I_MSK 0xfffffffe
+#define RG_EN_DP_VT_MON_SFT 0
+#define RG_EN_DP_VT_MON_HI 0
+#define RG_EN_DP_VT_MON_SZ 1
+#define RG_DP_VT_TH_HI_MSK 0x00000006
+#define RG_DP_VT_TH_HI_I_MSK 0xfffffff9
+#define RG_DP_VT_TH_HI_SFT 1
+#define RG_DP_VT_TH_HI_HI 2
+#define RG_DP_VT_TH_HI_SZ 2
+#define RG_DP_VT_TH_LO_MSK 0x00000018
+#define RG_DP_VT_TH_LO_I_MSK 0xffffffe7
+#define RG_DP_VT_TH_LO_SFT 3
+#define RG_DP_VT_TH_LO_HI 4
+#define RG_DP_VT_TH_LO_SZ 2
+#define RG_DP_CK320BY2_MSK 0x00004000
+#define RG_DP_CK320BY2_I_MSK 0xffffbfff
+#define RG_DP_CK320BY2_SFT 14
+#define RG_DP_CK320BY2_HI 14
+#define RG_DP_CK320BY2_SZ 1
+#define RG_DP_OD_TEST_MSK 0x00200000
+#define RG_DP_OD_TEST_I_MSK 0xffdfffff
+#define RG_DP_OD_TEST_SFT 21
+#define RG_DP_OD_TEST_HI 21
+#define RG_DP_OD_TEST_SZ 1
+#define RG_DP_BBPLL_BP_MSK 0x00000001
+#define RG_DP_BBPLL_BP_I_MSK 0xfffffffe
+#define RG_DP_BBPLL_BP_SFT 0
+#define RG_DP_BBPLL_BP_HI 0
+#define RG_DP_BBPLL_BP_SZ 1
+#define RG_DP_BBPLL_ICP_MSK 0x00000006
+#define RG_DP_BBPLL_ICP_I_MSK 0xfffffff9
+#define RG_DP_BBPLL_ICP_SFT 1
+#define RG_DP_BBPLL_ICP_HI 2
+#define RG_DP_BBPLL_ICP_SZ 2
+#define RG_DP_BBPLL_IDUAL_MSK 0x00000018
+#define RG_DP_BBPLL_IDUAL_I_MSK 0xffffffe7
+#define RG_DP_BBPLL_IDUAL_SFT 3
+#define RG_DP_BBPLL_IDUAL_HI 4
+#define RG_DP_BBPLL_IDUAL_SZ 2
+#define RG_DP_BBPLL_OD_TEST_MSK 0x000001e0
+#define RG_DP_BBPLL_OD_TEST_I_MSK 0xfffffe1f
+#define RG_DP_BBPLL_OD_TEST_SFT 5
+#define RG_DP_BBPLL_OD_TEST_HI 8
+#define RG_DP_BBPLL_OD_TEST_SZ 4
+#define RG_DP_BBPLL_PD_MSK 0x00000200
+#define RG_DP_BBPLL_PD_I_MSK 0xfffffdff
+#define RG_DP_BBPLL_PD_SFT 9
+#define RG_DP_BBPLL_PD_HI 9
+#define RG_DP_BBPLL_PD_SZ 1
+#define RG_DP_BBPLL_TESTSEL_MSK 0x00001c00
+#define RG_DP_BBPLL_TESTSEL_I_MSK 0xffffe3ff
+#define RG_DP_BBPLL_TESTSEL_SFT 10
+#define RG_DP_BBPLL_TESTSEL_HI 12
+#define RG_DP_BBPLL_TESTSEL_SZ 3
+#define RG_DP_BBPLL_PFD_DLY_MSK 0x00006000
+#define RG_DP_BBPLL_PFD_DLY_I_MSK 0xffff9fff
+#define RG_DP_BBPLL_PFD_DLY_SFT 13
+#define RG_DP_BBPLL_PFD_DLY_HI 14
+#define RG_DP_BBPLL_PFD_DLY_SZ 2
+#define RG_DP_RP_MSK 0x00038000
+#define RG_DP_RP_I_MSK 0xfffc7fff
+#define RG_DP_RP_SFT 15
+#define RG_DP_RP_HI 17
+#define RG_DP_RP_SZ 3
+#define RG_DP_RHP_MSK 0x000c0000
+#define RG_DP_RHP_I_MSK 0xfff3ffff
+#define RG_DP_RHP_SFT 18
+#define RG_DP_RHP_HI 19
+#define RG_DP_RHP_SZ 2
+#define RG_DP_BBPLL_SDM_EDGE_MSK 0x80000000
+#define RG_DP_BBPLL_SDM_EDGE_I_MSK 0x7fffffff
+#define RG_DP_BBPLL_SDM_EDGE_SFT 31
+#define RG_DP_BBPLL_SDM_EDGE_HI 31
+#define RG_DP_BBPLL_SDM_EDGE_SZ 1
+#define RG_DP_FODIV_MSK 0x0007f000
+#define RG_DP_FODIV_I_MSK 0xfff80fff
+#define RG_DP_FODIV_SFT 12
+#define RG_DP_FODIV_HI 18
+#define RG_DP_FODIV_SZ 7
+#define RG_DP_REFDIV_MSK 0x1fc00000
+#define RG_DP_REFDIV_I_MSK 0xe03fffff
+#define RG_DP_REFDIV_SFT 22
+#define RG_DP_REFDIV_HI 28
+#define RG_DP_REFDIV_SZ 7
+#define RG_IDACAI_PGAG15_MSK 0x0000003f
+#define RG_IDACAI_PGAG15_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG15_SFT 0
+#define RG_IDACAI_PGAG15_HI 5
+#define RG_IDACAI_PGAG15_SZ 6
+#define RG_IDACAQ_PGAG15_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG15_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG15_SFT 6
+#define RG_IDACAQ_PGAG15_HI 11
+#define RG_IDACAQ_PGAG15_SZ 6
+#define RG_IDACAI_PGAG14_MSK 0x0003f000
+#define RG_IDACAI_PGAG14_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG14_SFT 12
+#define RG_IDACAI_PGAG14_HI 17
+#define RG_IDACAI_PGAG14_SZ 6
+#define RG_IDACAQ_PGAG14_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG14_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG14_SFT 18
+#define RG_IDACAQ_PGAG14_HI 23
+#define RG_IDACAQ_PGAG14_SZ 6
+#define RG_DP_BBPLL_BS_MSK 0x3f000000
+#define RG_DP_BBPLL_BS_I_MSK 0xc0ffffff
+#define RG_DP_BBPLL_BS_SFT 24
+#define RG_DP_BBPLL_BS_HI 29
+#define RG_DP_BBPLL_BS_SZ 6
+#define RG_IDACAI_PGAG13_MSK 0x0000003f
+#define RG_IDACAI_PGAG13_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG13_SFT 0
+#define RG_IDACAI_PGAG13_HI 5
+#define RG_IDACAI_PGAG13_SZ 6
+#define RG_IDACAQ_PGAG13_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG13_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG13_SFT 6
+#define RG_IDACAQ_PGAG13_HI 11
+#define RG_IDACAQ_PGAG13_SZ 6
+#define RG_IDACAI_PGAG12_MSK 0x0003f000
+#define RG_IDACAI_PGAG12_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG12_SFT 12
+#define RG_IDACAI_PGAG12_HI 17
+#define RG_IDACAI_PGAG12_SZ 6
+#define RG_IDACAQ_PGAG12_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG12_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG12_SFT 18
+#define RG_IDACAQ_PGAG12_HI 23
+#define RG_IDACAQ_PGAG12_SZ 6
+#define RG_IDACAI_PGAG11_MSK 0x0000003f
+#define RG_IDACAI_PGAG11_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG11_SFT 0
+#define RG_IDACAI_PGAG11_HI 5
+#define RG_IDACAI_PGAG11_SZ 6
+#define RG_IDACAQ_PGAG11_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG11_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG11_SFT 6
+#define RG_IDACAQ_PGAG11_HI 11
+#define RG_IDACAQ_PGAG11_SZ 6
+#define RG_IDACAI_PGAG10_MSK 0x0003f000
+#define RG_IDACAI_PGAG10_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG10_SFT 12
+#define RG_IDACAI_PGAG10_HI 17
+#define RG_IDACAI_PGAG10_SZ 6
+#define RG_IDACAQ_PGAG10_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG10_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG10_SFT 18
+#define RG_IDACAQ_PGAG10_HI 23
+#define RG_IDACAQ_PGAG10_SZ 6
+#define RG_IDACAI_PGAG9_MSK 0x0000003f
+#define RG_IDACAI_PGAG9_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG9_SFT 0
+#define RG_IDACAI_PGAG9_HI 5
+#define RG_IDACAI_PGAG9_SZ 6
+#define RG_IDACAQ_PGAG9_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG9_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG9_SFT 6
+#define RG_IDACAQ_PGAG9_HI 11
+#define RG_IDACAQ_PGAG9_SZ 6
+#define RG_IDACAI_PGAG8_MSK 0x0003f000
+#define RG_IDACAI_PGAG8_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG8_SFT 12
+#define RG_IDACAI_PGAG8_HI 17
+#define RG_IDACAI_PGAG8_SZ 6
+#define RG_IDACAQ_PGAG8_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG8_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG8_SFT 18
+#define RG_IDACAQ_PGAG8_HI 23
+#define RG_IDACAQ_PGAG8_SZ 6
+#define RG_IDACAI_PGAG7_MSK 0x0000003f
+#define RG_IDACAI_PGAG7_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG7_SFT 0
+#define RG_IDACAI_PGAG7_HI 5
+#define RG_IDACAI_PGAG7_SZ 6
+#define RG_IDACAQ_PGAG7_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG7_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG7_SFT 6
+#define RG_IDACAQ_PGAG7_HI 11
+#define RG_IDACAQ_PGAG7_SZ 6
+#define RG_IDACAI_PGAG6_MSK 0x0003f000
+#define RG_IDACAI_PGAG6_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG6_SFT 12
+#define RG_IDACAI_PGAG6_HI 17
+#define RG_IDACAI_PGAG6_SZ 6
+#define RG_IDACAQ_PGAG6_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG6_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG6_SFT 18
+#define RG_IDACAQ_PGAG6_HI 23
+#define RG_IDACAQ_PGAG6_SZ 6
+#define RG_IDACAI_PGAG5_MSK 0x0000003f
+#define RG_IDACAI_PGAG5_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG5_SFT 0
+#define RG_IDACAI_PGAG5_HI 5
+#define RG_IDACAI_PGAG5_SZ 6
+#define RG_IDACAQ_PGAG5_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG5_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG5_SFT 6
+#define RG_IDACAQ_PGAG5_HI 11
+#define RG_IDACAQ_PGAG5_SZ 6
+#define RG_IDACAI_PGAG4_MSK 0x0003f000
+#define RG_IDACAI_PGAG4_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG4_SFT 12
+#define RG_IDACAI_PGAG4_HI 17
+#define RG_IDACAI_PGAG4_SZ 6
+#define RG_IDACAQ_PGAG4_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG4_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG4_SFT 18
+#define RG_IDACAQ_PGAG4_HI 23
+#define RG_IDACAQ_PGAG4_SZ 6
+#define RG_IDACAI_PGAG3_MSK 0x0000003f
+#define RG_IDACAI_PGAG3_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG3_SFT 0
+#define RG_IDACAI_PGAG3_HI 5
+#define RG_IDACAI_PGAG3_SZ 6
+#define RG_IDACAQ_PGAG3_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG3_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG3_SFT 6
+#define RG_IDACAQ_PGAG3_HI 11
+#define RG_IDACAQ_PGAG3_SZ 6
+#define RG_IDACAI_PGAG2_MSK 0x0003f000
+#define RG_IDACAI_PGAG2_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG2_SFT 12
+#define RG_IDACAI_PGAG2_HI 17
+#define RG_IDACAI_PGAG2_SZ 6
+#define RG_IDACAQ_PGAG2_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG2_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG2_SFT 18
+#define RG_IDACAQ_PGAG2_HI 23
+#define RG_IDACAQ_PGAG2_SZ 6
+#define RG_IDACAI_PGAG1_MSK 0x0000003f
+#define RG_IDACAI_PGAG1_I_MSK 0xffffffc0
+#define RG_IDACAI_PGAG1_SFT 0
+#define RG_IDACAI_PGAG1_HI 5
+#define RG_IDACAI_PGAG1_SZ 6
+#define RG_IDACAQ_PGAG1_MSK 0x00000fc0
+#define RG_IDACAQ_PGAG1_I_MSK 0xfffff03f
+#define RG_IDACAQ_PGAG1_SFT 6
+#define RG_IDACAQ_PGAG1_HI 11
+#define RG_IDACAQ_PGAG1_SZ 6
+#define RG_IDACAI_PGAG0_MSK 0x0003f000
+#define RG_IDACAI_PGAG0_I_MSK 0xfffc0fff
+#define RG_IDACAI_PGAG0_SFT 12
+#define RG_IDACAI_PGAG0_HI 17
+#define RG_IDACAI_PGAG0_SZ 6
+#define RG_IDACAQ_PGAG0_MSK 0x00fc0000
+#define RG_IDACAQ_PGAG0_I_MSK 0xff03ffff
+#define RG_IDACAQ_PGAG0_SFT 18
+#define RG_IDACAQ_PGAG0_HI 23
+#define RG_IDACAQ_PGAG0_SZ 6
+#define RG_EN_RCAL_MSK 0x00000001
+#define RG_EN_RCAL_I_MSK 0xfffffffe
+#define RG_EN_RCAL_SFT 0
+#define RG_EN_RCAL_HI 0
+#define RG_EN_RCAL_SZ 1
+#define RG_RCAL_SPD_MSK 0x00000002
+#define RG_RCAL_SPD_I_MSK 0xfffffffd
+#define RG_RCAL_SPD_SFT 1
+#define RG_RCAL_SPD_HI 1
+#define RG_RCAL_SPD_SZ 1
+#define RG_RCAL_TMR_MSK 0x000001fc
+#define RG_RCAL_TMR_I_MSK 0xfffffe03
+#define RG_RCAL_TMR_SFT 2
+#define RG_RCAL_TMR_HI 8
+#define RG_RCAL_TMR_SZ 7
+#define RG_RCAL_CODE_CWR_MSK 0x00000200
+#define RG_RCAL_CODE_CWR_I_MSK 0xfffffdff
+#define RG_RCAL_CODE_CWR_SFT 9
+#define RG_RCAL_CODE_CWR_HI 9
+#define RG_RCAL_CODE_CWR_SZ 1
+#define RG_RCAL_CODE_CWD_MSK 0x00007c00
+#define RG_RCAL_CODE_CWD_I_MSK 0xffff83ff
+#define RG_RCAL_CODE_CWD_SFT 10
+#define RG_RCAL_CODE_CWD_HI 14
+#define RG_RCAL_CODE_CWD_SZ 5
+#define RG_SX_SUB_SEL_CWR_MSK 0x00000001
+#define RG_SX_SUB_SEL_CWR_I_MSK 0xfffffffe
+#define RG_SX_SUB_SEL_CWR_SFT 0
+#define RG_SX_SUB_SEL_CWR_HI 0
+#define RG_SX_SUB_SEL_CWR_SZ 1
+#define RG_SX_SUB_SEL_CWD_MSK 0x000000fe
+#define RG_SX_SUB_SEL_CWD_I_MSK 0xffffff01
+#define RG_SX_SUB_SEL_CWD_SFT 1
+#define RG_SX_SUB_SEL_CWD_HI 7
+#define RG_SX_SUB_SEL_CWD_SZ 7
+#define RG_SX_LCK_BIN_OFFSET_MSK 0x00078000
+#define RG_SX_LCK_BIN_OFFSET_I_MSK 0xfff87fff
+#define RG_SX_LCK_BIN_OFFSET_SFT 15
+#define RG_SX_LCK_BIN_OFFSET_HI 18
+#define RG_SX_LCK_BIN_OFFSET_SZ 4
+#define RG_SX_LCK_BIN_PRECISION_MSK 0x00080000
+#define RG_SX_LCK_BIN_PRECISION_I_MSK 0xfff7ffff
+#define RG_SX_LCK_BIN_PRECISION_SFT 19
+#define RG_SX_LCK_BIN_PRECISION_HI 19
+#define RG_SX_LCK_BIN_PRECISION_SZ 1
+#define RG_SX_LOCK_EN_N_MSK 0x00100000
+#define RG_SX_LOCK_EN_N_I_MSK 0xffefffff
+#define RG_SX_LOCK_EN_N_SFT 20
+#define RG_SX_LOCK_EN_N_HI 20
+#define RG_SX_LOCK_EN_N_SZ 1
+#define RG_SX_LOCK_MANUAL_MSK 0x00200000
+#define RG_SX_LOCK_MANUAL_I_MSK 0xffdfffff
+#define RG_SX_LOCK_MANUAL_SFT 21
+#define RG_SX_LOCK_MANUAL_HI 21
+#define RG_SX_LOCK_MANUAL_SZ 1
+#define RG_SX_SUB_MANUAL_MSK 0x00400000
+#define RG_SX_SUB_MANUAL_I_MSK 0xffbfffff
+#define RG_SX_SUB_MANUAL_SFT 22
+#define RG_SX_SUB_MANUAL_HI 22
+#define RG_SX_SUB_MANUAL_SZ 1
+#define RG_SX_SUB_SEL_MSK 0x3f800000
+#define RG_SX_SUB_SEL_I_MSK 0xc07fffff
+#define RG_SX_SUB_SEL_SFT 23
+#define RG_SX_SUB_SEL_HI 29
+#define RG_SX_SUB_SEL_SZ 7
+#define RG_SX_MUX_SEL_VTH_BINL_MSK 0x40000000
+#define RG_SX_MUX_SEL_VTH_BINL_I_MSK 0xbfffffff
+#define RG_SX_MUX_SEL_VTH_BINL_SFT 30
+#define RG_SX_MUX_SEL_VTH_BINL_HI 30
+#define RG_SX_MUX_SEL_VTH_BINL_SZ 1
+#define RG_TRX_DUMMMY_MSK 0xffffffff
+#define RG_TRX_DUMMMY_I_MSK 0x00000000
+#define RG_TRX_DUMMMY_SFT 0
+#define RG_TRX_DUMMMY_HI 31
+#define RG_TRX_DUMMMY_SZ 32
+#define RG_SX_DUMMMY_MSK 0xffffffff
+#define RG_SX_DUMMMY_I_MSK 0x00000000
+#define RG_SX_DUMMMY_SFT 0
+#define RG_SX_DUMMMY_HI 31
+#define RG_SX_DUMMMY_SZ 32
+#define RCAL_RDY_MSK 0x00000001
+#define RCAL_RDY_I_MSK 0xfffffffe
+#define RCAL_RDY_SFT 0
+#define RCAL_RDY_HI 0
+#define RCAL_RDY_SZ 1
+#define LCK_BIN_RDY_MSK 0x00000002
+#define LCK_BIN_RDY_I_MSK 0xfffffffd
+#define LCK_BIN_RDY_SFT 1
+#define LCK_BIN_RDY_HI 1
+#define LCK_BIN_RDY_SZ 1
+#define VT_MON_RDY_MSK 0x00000004
+#define VT_MON_RDY_I_MSK 0xfffffffb
+#define VT_MON_RDY_SFT 2
+#define VT_MON_RDY_HI 2
+#define VT_MON_RDY_SZ 1
+#define DA_R_CODE_LUT_MSK 0x000007c0
+#define DA_R_CODE_LUT_I_MSK 0xfffff83f
+#define DA_R_CODE_LUT_SFT 6
+#define DA_R_CODE_LUT_HI 10
+#define DA_R_CODE_LUT_SZ 5
+#define AD_SX_VT_MON_Q_MSK 0x00001800
+#define AD_SX_VT_MON_Q_I_MSK 0xffffe7ff
+#define AD_SX_VT_MON_Q_SFT 11
+#define AD_SX_VT_MON_Q_HI 12
+#define AD_SX_VT_MON_Q_SZ 2
+#define AD_DP_VT_MON_Q_MSK 0x00006000
+#define AD_DP_VT_MON_Q_I_MSK 0xffff9fff
+#define AD_DP_VT_MON_Q_SFT 13
+#define AD_DP_VT_MON_Q_HI 14
+#define AD_DP_VT_MON_Q_SZ 2
+#define RTC_CAL_RDY_MSK 0x00008000
+#define RTC_CAL_RDY_I_MSK 0xffff7fff
+#define RTC_CAL_RDY_SFT 15
+#define RTC_CAL_RDY_HI 15
+#define RTC_CAL_RDY_SZ 1
+#define RG_SARADC_BIT_MSK 0x003f0000
+#define RG_SARADC_BIT_I_MSK 0xffc0ffff
+#define RG_SARADC_BIT_SFT 16
+#define RG_SARADC_BIT_HI 21
+#define RG_SARADC_BIT_SZ 6
+#define SAR_ADC_FSM_RDY_MSK 0x00400000
+#define SAR_ADC_FSM_RDY_I_MSK 0xffbfffff
+#define SAR_ADC_FSM_RDY_SFT 22
+#define SAR_ADC_FSM_RDY_HI 22
+#define SAR_ADC_FSM_RDY_SZ 1
+#define AD_CIRCUIT_VERSION_MSK 0x07800000
+#define AD_CIRCUIT_VERSION_I_MSK 0xf87fffff
+#define AD_CIRCUIT_VERSION_SFT 23
+#define AD_CIRCUIT_VERSION_HI 26
+#define AD_CIRCUIT_VERSION_SZ 4
+#define DA_R_CAL_CODE_MSK 0x0000001f
+#define DA_R_CAL_CODE_I_MSK 0xffffffe0
+#define DA_R_CAL_CODE_SFT 0
+#define DA_R_CAL_CODE_HI 4
+#define DA_R_CAL_CODE_SZ 5
+#define DA_SX_SUB_SEL_MSK 0x00000fe0
+#define DA_SX_SUB_SEL_I_MSK 0xfffff01f
+#define DA_SX_SUB_SEL_SFT 5
+#define DA_SX_SUB_SEL_HI 11
+#define DA_SX_SUB_SEL_SZ 7
+#define RG_DPL_RFCTRL_CH_MSK 0x000007ff
+#define RG_DPL_RFCTRL_CH_I_MSK 0xfffff800
+#define RG_DPL_RFCTRL_CH_SFT 0
+#define RG_DPL_RFCTRL_CH_HI 10
+#define RG_DPL_RFCTRL_CH_SZ 11
+#define RG_RSSIADC_RO_BIT_MSK 0x00007800
+#define RG_RSSIADC_RO_BIT_I_MSK 0xffff87ff
+#define RG_RSSIADC_RO_BIT_SFT 11
+#define RG_RSSIADC_RO_BIT_HI 14
+#define RG_RSSIADC_RO_BIT_SZ 4
+#define RG_RX_ADC_I_RO_BIT_MSK 0x007f8000
+#define RG_RX_ADC_I_RO_BIT_I_MSK 0xff807fff
+#define RG_RX_ADC_I_RO_BIT_SFT 15
+#define RG_RX_ADC_I_RO_BIT_HI 22
+#define RG_RX_ADC_I_RO_BIT_SZ 8
+#define RG_RX_ADC_Q_RO_BIT_MSK 0x7f800000
+#define RG_RX_ADC_Q_RO_BIT_I_MSK 0x807fffff
+#define RG_RX_ADC_Q_RO_BIT_SFT 23
+#define RG_RX_ADC_Q_RO_BIT_HI 30
+#define RG_RX_ADC_Q_RO_BIT_SZ 8
+#define RG_DPL_RFCTRL_F_MSK 0x00ffffff
+#define RG_DPL_RFCTRL_F_I_MSK 0xff000000
+#define RG_DPL_RFCTRL_F_SFT 0
+#define RG_DPL_RFCTRL_F_HI 23
+#define RG_DPL_RFCTRL_F_SZ 24
+#define RG_SX_TARGET_CNT_MSK 0x00001fff
+#define RG_SX_TARGET_CNT_I_MSK 0xffffe000
+#define RG_SX_TARGET_CNT_SFT 0
+#define RG_SX_TARGET_CNT_HI 12
+#define RG_SX_TARGET_CNT_SZ 13
+#define RG_RTC_OFFSET_MSK 0x000000ff
+#define RG_RTC_OFFSET_I_MSK 0xffffff00
+#define RG_RTC_OFFSET_SFT 0
+#define RG_RTC_OFFSET_HI 7
+#define RG_RTC_OFFSET_SZ 8
+#define RG_RTC_CAL_TARGET_COUNT_MSK 0x000fff00
+#define RG_RTC_CAL_TARGET_COUNT_I_MSK 0xfff000ff
+#define RG_RTC_CAL_TARGET_COUNT_SFT 8
+#define RG_RTC_CAL_TARGET_COUNT_HI 19
+#define RG_RTC_CAL_TARGET_COUNT_SZ 12
+#define RG_RF_D_REG_MSK 0x0000ffff
+#define RG_RF_D_REG_I_MSK 0xffff0000
+#define RG_RF_D_REG_SFT 0
+#define RG_RF_D_REG_HI 15
+#define RG_RF_D_REG_SZ 16
+#define DIRECT_MODE_MSK 0x00000001
+#define DIRECT_MODE_I_MSK 0xfffffffe
+#define DIRECT_MODE_SFT 0
+#define DIRECT_MODE_HI 0
+#define DIRECT_MODE_SZ 1
+#define TAG_INTERLEAVE_MD_MSK 0x00000002
+#define TAG_INTERLEAVE_MD_I_MSK 0xfffffffd
+#define TAG_INTERLEAVE_MD_SFT 1
+#define TAG_INTERLEAVE_MD_HI 1
+#define TAG_INTERLEAVE_MD_SZ 1
+#define DIS_DEMAND_MSK 0x00000004
+#define DIS_DEMAND_I_MSK 0xfffffffb
+#define DIS_DEMAND_SFT 2
+#define DIS_DEMAND_HI 2
+#define DIS_DEMAND_SZ 1
+#define SAME_ID_ALLOC_MD_MSK 0x00000008
+#define SAME_ID_ALLOC_MD_I_MSK 0xfffffff7
+#define SAME_ID_ALLOC_MD_SFT 3
+#define SAME_ID_ALLOC_MD_HI 3
+#define SAME_ID_ALLOC_MD_SZ 1
+#define HS_ACCESS_MD_MSK 0x00000010
+#define HS_ACCESS_MD_I_MSK 0xffffffef
+#define HS_ACCESS_MD_SFT 4
+#define HS_ACCESS_MD_HI 4
+#define HS_ACCESS_MD_SZ 1
+#define SRAM_ACCESS_MD_MSK 0x00000020
+#define SRAM_ACCESS_MD_I_MSK 0xffffffdf
+#define SRAM_ACCESS_MD_SFT 5
+#define SRAM_ACCESS_MD_HI 5
+#define SRAM_ACCESS_MD_SZ 1
+#define NOHIT_RPASS_MD_MSK 0x00000040
+#define NOHIT_RPASS_MD_I_MSK 0xffffffbf
+#define NOHIT_RPASS_MD_SFT 6
+#define NOHIT_RPASS_MD_HI 6
+#define NOHIT_RPASS_MD_SZ 1
+#define DMN_FLAG_CLR_MSK 0x00000080
+#define DMN_FLAG_CLR_I_MSK 0xffffff7f
+#define DMN_FLAG_CLR_SFT 7
+#define DMN_FLAG_CLR_HI 7
+#define DMN_FLAG_CLR_SZ 1
+#define ERR_SW_RST_N_MSK 0x00000100
+#define ERR_SW_RST_N_I_MSK 0xfffffeff
+#define ERR_SW_RST_N_SFT 8
+#define ERR_SW_RST_N_HI 8
+#define ERR_SW_RST_N_SZ 1
+#define ALR_SW_RST_N_MSK 0x00000200
+#define ALR_SW_RST_N_I_MSK 0xfffffdff
+#define ALR_SW_RST_N_SFT 9
+#define ALR_SW_RST_N_HI 9
+#define ALR_SW_RST_N_SZ 1
+#define MCH_SW_RST_N_MSK 0x00000400
+#define MCH_SW_RST_N_I_MSK 0xfffffbff
+#define MCH_SW_RST_N_SFT 10
+#define MCH_SW_RST_N_HI 10
+#define MCH_SW_RST_N_SZ 1
+#define TAG_SW_RST_N_MSK 0x00000800
+#define TAG_SW_RST_N_I_MSK 0xfffff7ff
+#define TAG_SW_RST_N_SFT 11
+#define TAG_SW_RST_N_HI 11
+#define TAG_SW_RST_N_SZ 1
+#define ABT_SW_RST_N_MSK 0x00001000
+#define ABT_SW_RST_N_I_MSK 0xffffefff
+#define ABT_SW_RST_N_SFT 12
+#define ABT_SW_RST_N_HI 12
+#define ABT_SW_RST_N_SZ 1
+#define MMU_VER_MSK 0x0000e000
+#define MMU_VER_I_MSK 0xffff1fff
+#define MMU_VER_SFT 13
+#define MMU_VER_HI 15
+#define MMU_VER_SZ 3
+#define MMU_SHARE_MCU_MSK 0x00ff0000
+#define MMU_SHARE_MCU_I_MSK 0xff00ffff
+#define MMU_SHARE_MCU_SFT 16
+#define MMU_SHARE_MCU_HI 23
+#define MMU_SHARE_MCU_SZ 8
+#define HS_WR_MSK 0x00000001
+#define HS_WR_I_MSK 0xfffffffe
+#define HS_WR_SFT 0
+#define HS_WR_HI 0
+#define HS_WR_SZ 1
+#define HS_FLAG_MSK 0x00000010
+#define HS_FLAG_I_MSK 0xffffffef
+#define HS_FLAG_SFT 4
+#define HS_FLAG_HI 4
+#define HS_FLAG_SZ 1
+#define HS_ID_MSK 0x00007f00
+#define HS_ID_I_MSK 0xffff80ff
+#define HS_ID_SFT 8
+#define HS_ID_HI 14
+#define HS_ID_SZ 7
+#define HS_CHANNEL_MSK 0x000f0000
+#define HS_CHANNEL_I_MSK 0xfff0ffff
+#define HS_CHANNEL_SFT 16
+#define HS_CHANNEL_HI 19
+#define HS_CHANNEL_SZ 4
+#define HS_PAGE_MSK 0x00f00000
+#define HS_PAGE_I_MSK 0xff0fffff
+#define HS_PAGE_SFT 20
+#define HS_PAGE_HI 23
+#define HS_PAGE_SZ 4
+#define HS_DATA_MSK 0xff000000
+#define HS_DATA_I_MSK 0x00ffffff
+#define HS_DATA_SFT 24
+#define HS_DATA_HI 31
+#define HS_DATA_SZ 8
+#define CPU_POR0_MSK 0x0000000f
+#define CPU_POR0_I_MSK 0xfffffff0
+#define CPU_POR0_SFT 0
+#define CPU_POR0_HI 3
+#define CPU_POR0_SZ 4
+#define CPU_POR1_MSK 0x000000f0
+#define CPU_POR1_I_MSK 0xffffff0f
+#define CPU_POR1_SFT 4
+#define CPU_POR1_HI 7
+#define CPU_POR1_SZ 4
+#define CPU_POR2_MSK 0x00000f00
+#define CPU_POR2_I_MSK 0xfffff0ff
+#define CPU_POR2_SFT 8
+#define CPU_POR2_HI 11
+#define CPU_POR2_SZ 4
+#define CPU_POR3_MSK 0x0000f000
+#define CPU_POR3_I_MSK 0xffff0fff
+#define CPU_POR3_SFT 12
+#define CPU_POR3_HI 15
+#define CPU_POR3_SZ 4
+#define CPU_POR4_MSK 0x000f0000
+#define CPU_POR4_I_MSK 0xfff0ffff
+#define CPU_POR4_SFT 16
+#define CPU_POR4_HI 19
+#define CPU_POR4_SZ 4
+#define CPU_POR5_MSK 0x00f00000
+#define CPU_POR5_I_MSK 0xff0fffff
+#define CPU_POR5_SFT 20
+#define CPU_POR5_HI 23
+#define CPU_POR5_SZ 4
+#define CPU_POR6_MSK 0x0f000000
+#define CPU_POR6_I_MSK 0xf0ffffff
+#define CPU_POR6_SFT 24
+#define CPU_POR6_HI 27
+#define CPU_POR6_SZ 4
+#define CPU_POR7_MSK 0xf0000000
+#define CPU_POR7_I_MSK 0x0fffffff
+#define CPU_POR7_SFT 28
+#define CPU_POR7_HI 31
+#define CPU_POR7_SZ 4
+#define CPU_POR8_MSK 0x0000000f
+#define CPU_POR8_I_MSK 0xfffffff0
+#define CPU_POR8_SFT 0
+#define CPU_POR8_HI 3
+#define CPU_POR8_SZ 4
+#define CPU_POR9_MSK 0x000000f0
+#define CPU_POR9_I_MSK 0xffffff0f
+#define CPU_POR9_SFT 4
+#define CPU_POR9_HI 7
+#define CPU_POR9_SZ 4
+#define CPU_PORA_MSK 0x00000f00
+#define CPU_PORA_I_MSK 0xfffff0ff
+#define CPU_PORA_SFT 8
+#define CPU_PORA_HI 11
+#define CPU_PORA_SZ 4
+#define CPU_PORB_MSK 0x0000f000
+#define CPU_PORB_I_MSK 0xffff0fff
+#define CPU_PORB_SFT 12
+#define CPU_PORB_HI 15
+#define CPU_PORB_SZ 4
+#define CPU_PORC_MSK 0x000f0000
+#define CPU_PORC_I_MSK 0xfff0ffff
+#define CPU_PORC_SFT 16
+#define CPU_PORC_HI 19
+#define CPU_PORC_SZ 4
+#define CPU_PORD_MSK 0x00f00000
+#define CPU_PORD_I_MSK 0xff0fffff
+#define CPU_PORD_SFT 20
+#define CPU_PORD_HI 23
+#define CPU_PORD_SZ 4
+#define CPU_PORE_MSK 0x0f000000
+#define CPU_PORE_I_MSK 0xf0ffffff
+#define CPU_PORE_SFT 24
+#define CPU_PORE_HI 27
+#define CPU_PORE_SZ 4
+#define CPU_PORF_MSK 0xf0000000
+#define CPU_PORF_I_MSK 0x0fffffff
+#define CPU_PORF_SFT 28
+#define CPU_PORF_HI 31
+#define CPU_PORF_SZ 4
+#define ACC_WR_LEN_MSK 0x0000003f
+#define ACC_WR_LEN_I_MSK 0xffffffc0
+#define ACC_WR_LEN_SFT 0
+#define ACC_WR_LEN_HI 5
+#define ACC_WR_LEN_SZ 6
+#define ACC_RD_LEN_MSK 0x00003f00
+#define ACC_RD_LEN_I_MSK 0xffffc0ff
+#define ACC_RD_LEN_SFT 8
+#define ACC_RD_LEN_HI 13
+#define ACC_RD_LEN_SZ 6
+#define REQ_NACK_CLR_MSK 0x00008000
+#define REQ_NACK_CLR_I_MSK 0xffff7fff
+#define REQ_NACK_CLR_SFT 15
+#define REQ_NACK_CLR_HI 15
+#define REQ_NACK_CLR_SZ 1
+#define NACK_FLAG_BUS_MSK 0xffff0000
+#define NACK_FLAG_BUS_I_MSK 0x0000ffff
+#define NACK_FLAG_BUS_SFT 16
+#define NACK_FLAG_BUS_HI 31
+#define NACK_FLAG_BUS_SZ 16
+#define DMN_R_PASS_MSK 0x0000ffff
+#define DMN_R_PASS_I_MSK 0xffff0000
+#define DMN_R_PASS_SFT 0
+#define DMN_R_PASS_HI 15
+#define DMN_R_PASS_SZ 16
+#define PARA_ALC_RLS_MSK 0x00010000
+#define PARA_ALC_RLS_I_MSK 0xfffeffff
+#define PARA_ALC_RLS_SFT 16
+#define PARA_ALC_RLS_HI 16
+#define PARA_ALC_RLS_SZ 1
+#define REQ_PORNS_CHGEN_MSK 0x01000000
+#define REQ_PORNS_CHGEN_I_MSK 0xfeffffff
+#define REQ_PORNS_CHGEN_SFT 24
+#define REQ_PORNS_CHGEN_HI 24
+#define REQ_PORNS_CHGEN_SZ 1
+#define ALC_ABT_ID_MSK 0x0000007f
+#define ALC_ABT_ID_I_MSK 0xffffff80
+#define ALC_ABT_ID_SFT 0
+#define ALC_ABT_ID_HI 6
+#define ALC_ABT_ID_SZ 7
+#define ALC_ABT_INT_MSK 0x00008000
+#define ALC_ABT_INT_I_MSK 0xffff7fff
+#define ALC_ABT_INT_SFT 15
+#define ALC_ABT_INT_HI 15
+#define ALC_ABT_INT_SZ 1
+#define RLS_ABT_ID_MSK 0x007f0000
+#define RLS_ABT_ID_I_MSK 0xff80ffff
+#define RLS_ABT_ID_SFT 16
+#define RLS_ABT_ID_HI 22
+#define RLS_ABT_ID_SZ 7
+#define RLS_ABT_INT_MSK 0x80000000
+#define RLS_ABT_INT_I_MSK 0x7fffffff
+#define RLS_ABT_INT_SFT 31
+#define RLS_ABT_INT_HI 31
+#define RLS_ABT_INT_SZ 1
+#define DEBUG_CTL_MSK 0x000000ff
+#define DEBUG_CTL_I_MSK 0xffffff00
+#define DEBUG_CTL_SFT 0
+#define DEBUG_CTL_HI 7
+#define DEBUG_CTL_SZ 8
+#define DEBUG_H16_MSK 0x00000100
+#define DEBUG_H16_I_MSK 0xfffffeff
+#define DEBUG_H16_SFT 8
+#define DEBUG_H16_HI 8
+#define DEBUG_H16_SZ 1
+#define DEBUG_OUT_MSK 0xffffffff
+#define DEBUG_OUT_I_MSK 0x00000000
+#define DEBUG_OUT_SFT 0
+#define DEBUG_OUT_HI 31
+#define DEBUG_OUT_SZ 32
+#define ALC_ERR_MSK 0x00000001
+#define ALC_ERR_I_MSK 0xfffffffe
+#define ALC_ERR_SFT 0
+#define ALC_ERR_HI 0
+#define ALC_ERR_SZ 1
+#define RLS_ERR_MSK 0x00000002
+#define RLS_ERR_I_MSK 0xfffffffd
+#define RLS_ERR_SFT 1
+#define RLS_ERR_HI 1
+#define RLS_ERR_SZ 1
+#define AL_STATE_MSK 0x00000700
+#define AL_STATE_I_MSK 0xfffff8ff
+#define AL_STATE_SFT 8
+#define AL_STATE_HI 10
+#define AL_STATE_SZ 3
+#define RL_STATE_MSK 0x00007000
+#define RL_STATE_I_MSK 0xffff8fff
+#define RL_STATE_SFT 12
+#define RL_STATE_HI 14
+#define RL_STATE_SZ 3
+#define ALC_ERR_ID_MSK 0x007f0000
+#define ALC_ERR_ID_I_MSK 0xff80ffff
+#define ALC_ERR_ID_SFT 16
+#define ALC_ERR_ID_HI 22
+#define ALC_ERR_ID_SZ 7
+#define RLS_ERR_ID_MSK 0x7f000000
+#define RLS_ERR_ID_I_MSK 0x80ffffff
+#define RLS_ERR_ID_SFT 24
+#define RLS_ERR_ID_HI 30
+#define RLS_ERR_ID_SZ 7
+#define DMN_NOHIT_FLAG_MSK 0x00000001
+#define DMN_NOHIT_FLAG_I_MSK 0xfffffffe
+#define DMN_NOHIT_FLAG_SFT 0
+#define DMN_NOHIT_FLAG_HI 0
+#define DMN_NOHIT_FLAG_SZ 1
+#define DMN_FLAG_MSK 0x00000002
+#define DMN_FLAG_I_MSK 0xfffffffd
+#define DMN_FLAG_SFT 1
+#define DMN_FLAG_HI 1
+#define DMN_FLAG_SZ 1
+#define DMN_WR_MSK 0x00000008
+#define DMN_WR_I_MSK 0xfffffff7
+#define DMN_WR_SFT 3
+#define DMN_WR_HI 3
+#define DMN_WR_SZ 1
+#define DMN_PORT_MSK 0x000000f0
+#define DMN_PORT_I_MSK 0xffffff0f
+#define DMN_PORT_SFT 4
+#define DMN_PORT_HI 7
+#define DMN_PORT_SZ 4
+#define DMN_NHIT_ID_MSK 0x00007f00
+#define DMN_NHIT_ID_I_MSK 0xffff80ff
+#define DMN_NHIT_ID_SFT 8
+#define DMN_NHIT_ID_HI 14
+#define DMN_NHIT_ID_SZ 7
+#define DMN_NHIT_ADDR_MSK 0xffff0000
+#define DMN_NHIT_ADDR_I_MSK 0x0000ffff
+#define DMN_NHIT_ADDR_SFT 16
+#define DMN_NHIT_ADDR_HI 31
+#define DMN_NHIT_ADDR_SZ 16
+#define TX_MOUNT_MSK 0x000000ff
+#define TX_MOUNT_I_MSK 0xffffff00
+#define TX_MOUNT_SFT 0
+#define TX_MOUNT_HI 7
+#define TX_MOUNT_SZ 8
+#define RX_MOUNT_MSK 0x0000ff00
+#define RX_MOUNT_I_MSK 0xffff00ff
+#define RX_MOUNT_SFT 8
+#define RX_MOUNT_HI 15
+#define RX_MOUNT_SZ 8
+#define AVA_TAG_MSK 0x01ff0000
+#define AVA_TAG_I_MSK 0xfe00ffff
+#define AVA_TAG_SFT 16
+#define AVA_TAG_HI 24
+#define AVA_TAG_SZ 9
+#define PKTBUF_FULL_MSK 0x80000000
+#define PKTBUF_FULL_I_MSK 0x7fffffff
+#define PKTBUF_FULL_SFT 31
+#define PKTBUF_FULL_HI 31
+#define PKTBUF_FULL_SZ 1
+#define DMN_NOHIT_MCU_MSK 0x00000001
+#define DMN_NOHIT_MCU_I_MSK 0xfffffffe
+#define DMN_NOHIT_MCU_SFT 0
+#define DMN_NOHIT_MCU_HI 0
+#define DMN_NOHIT_MCU_SZ 1
+#define DMN_MCU_FLAG_MSK 0x00000002
+#define DMN_MCU_FLAG_I_MSK 0xfffffffd
+#define DMN_MCU_FLAG_SFT 1
+#define DMN_MCU_FLAG_HI 1
+#define DMN_MCU_FLAG_SZ 1
+#define DMN_MCU_WR_MSK 0x00000008
+#define DMN_MCU_WR_I_MSK 0xfffffff7
+#define DMN_MCU_WR_SFT 3
+#define DMN_MCU_WR_HI 3
+#define DMN_MCU_WR_SZ 1
+#define DMN_MCU_PORT_MSK 0x000000f0
+#define DMN_MCU_PORT_I_MSK 0xffffff0f
+#define DMN_MCU_PORT_SFT 4
+#define DMN_MCU_PORT_HI 7
+#define DMN_MCU_PORT_SZ 4
+#define DMN_MCU_ID_MSK 0x00007f00
+#define DMN_MCU_ID_I_MSK 0xffff80ff
+#define DMN_MCU_ID_SFT 8
+#define DMN_MCU_ID_HI 14
+#define DMN_MCU_ID_SZ 7
+#define DMN_MCU_ADDR_MSK 0xffff0000
+#define DMN_MCU_ADDR_I_MSK 0x0000ffff
+#define DMN_MCU_ADDR_SFT 16
+#define DMN_MCU_ADDR_HI 31
+#define DMN_MCU_ADDR_SZ 16
+#define MB_IDTBL_31_0_MSK 0xffffffff
+#define MB_IDTBL_31_0_I_MSK 0x00000000
+#define MB_IDTBL_31_0_SFT 0
+#define MB_IDTBL_31_0_HI 31
+#define MB_IDTBL_31_0_SZ 32
+#define MB_IDTBL_63_32_MSK 0xffffffff
+#define MB_IDTBL_63_32_I_MSK 0x00000000
+#define MB_IDTBL_63_32_SFT 0
+#define MB_IDTBL_63_32_HI 31
+#define MB_IDTBL_63_32_SZ 32
+#define MB_IDTBL_95_64_MSK 0xffffffff
+#define MB_IDTBL_95_64_I_MSK 0x00000000
+#define MB_IDTBL_95_64_SFT 0
+#define MB_IDTBL_95_64_HI 31
+#define MB_IDTBL_95_64_SZ 32
+#define MB_IDTBL_127_96_MSK 0xffffffff
+#define MB_IDTBL_127_96_I_MSK 0x00000000
+#define MB_IDTBL_127_96_SFT 0
+#define MB_IDTBL_127_96_HI 31
+#define MB_IDTBL_127_96_SZ 32
+#define PKT_IDTBL_31_0_MSK 0xffffffff
+#define PKT_IDTBL_31_0_I_MSK 0x00000000
+#define PKT_IDTBL_31_0_SFT 0
+#define PKT_IDTBL_31_0_HI 31
+#define PKT_IDTBL_31_0_SZ 32
+#define PKT_IDTBL_63_32_MSK 0xffffffff
+#define PKT_IDTBL_63_32_I_MSK 0x00000000
+#define PKT_IDTBL_63_32_SFT 0
+#define PKT_IDTBL_63_32_HI 31
+#define PKT_IDTBL_63_32_SZ 32
+#define PKT_IDTBL_95_64_MSK 0xffffffff
+#define PKT_IDTBL_95_64_I_MSK 0x00000000
+#define PKT_IDTBL_95_64_SFT 0
+#define PKT_IDTBL_95_64_HI 31
+#define PKT_IDTBL_95_64_SZ 32
+#define PKT_IDTBL_127_96_MSK 0xffffffff
+#define PKT_IDTBL_127_96_I_MSK 0x00000000
+#define PKT_IDTBL_127_96_SFT 0
+#define PKT_IDTBL_127_96_HI 31
+#define PKT_IDTBL_127_96_SZ 32
+#define DMN_IDTBL_31_0_MSK 0xffffffff
+#define DMN_IDTBL_31_0_I_MSK 0x00000000
+#define DMN_IDTBL_31_0_SFT 0
+#define DMN_IDTBL_31_0_HI 31
+#define DMN_IDTBL_31_0_SZ 32
+#define DMN_IDTBL_63_32_MSK 0xffffffff
+#define DMN_IDTBL_63_32_I_MSK 0x00000000
+#define DMN_IDTBL_63_32_SFT 0
+#define DMN_IDTBL_63_32_HI 31
+#define DMN_IDTBL_63_32_SZ 32
+#define DMN_IDTBL_95_64_MSK 0xffffffff
+#define DMN_IDTBL_95_64_I_MSK 0x00000000
+#define DMN_IDTBL_95_64_SFT 0
+#define DMN_IDTBL_95_64_HI 31
+#define DMN_IDTBL_95_64_SZ 32
+#define DMN_IDTBL_127_96_MSK 0xffffffff
+#define DMN_IDTBL_127_96_I_MSK 0x00000000
+#define DMN_IDTBL_127_96_SFT 0
+#define DMN_IDTBL_127_96_HI 31
+#define DMN_IDTBL_127_96_SZ 32
+#define NEQ_MB_ID_31_0_MSK 0xffffffff
+#define NEQ_MB_ID_31_0_I_MSK 0x00000000
+#define NEQ_MB_ID_31_0_SFT 0
+#define NEQ_MB_ID_31_0_HI 31
+#define NEQ_MB_ID_31_0_SZ 32
+#define NEQ_MB_ID_63_32_MSK 0xffffffff
+#define NEQ_MB_ID_63_32_I_MSK 0x00000000
+#define NEQ_MB_ID_63_32_SFT 0
+#define NEQ_MB_ID_63_32_HI 31
+#define NEQ_MB_ID_63_32_SZ 32
+#define NEQ_MB_ID_95_64_MSK 0xffffffff
+#define NEQ_MB_ID_95_64_I_MSK 0x00000000
+#define NEQ_MB_ID_95_64_SFT 0
+#define NEQ_MB_ID_95_64_HI 31
+#define NEQ_MB_ID_95_64_SZ 32
+#define NEQ_MB_ID_127_96_MSK 0xffffffff
+#define NEQ_MB_ID_127_96_I_MSK 0x00000000
+#define NEQ_MB_ID_127_96_SFT 0
+#define NEQ_MB_ID_127_96_HI 31
+#define NEQ_MB_ID_127_96_SZ 32
+#define NEQ_PKT_ID_31_0_MSK 0xffffffff
+#define NEQ_PKT_ID_31_0_I_MSK 0x00000000
+#define NEQ_PKT_ID_31_0_SFT 0
+#define NEQ_PKT_ID_31_0_HI 31
+#define NEQ_PKT_ID_31_0_SZ 32
+#define NEQ_PKT_ID_63_32_MSK 0xffffffff
+#define NEQ_PKT_ID_63_32_I_MSK 0x00000000
+#define NEQ_PKT_ID_63_32_SFT 0
+#define NEQ_PKT_ID_63_32_HI 31
+#define NEQ_PKT_ID_63_32_SZ 32
+#define NEQ_PKT_ID_95_64_MSK 0xffffffff
+#define NEQ_PKT_ID_95_64_I_MSK 0x00000000
+#define NEQ_PKT_ID_95_64_SFT 0
+#define NEQ_PKT_ID_95_64_HI 31
+#define NEQ_PKT_ID_95_64_SZ 32
+#define NEQ_PKT_ID_127_96_MSK 0xffffffff
+#define NEQ_PKT_ID_127_96_I_MSK 0x00000000
+#define NEQ_PKT_ID_127_96_SFT 0
+#define NEQ_PKT_ID_127_96_HI 31
+#define NEQ_PKT_ID_127_96_SZ 32
+#define ALC_NOCHG_ID_MSK 0x0000007f
+#define ALC_NOCHG_ID_I_MSK 0xffffff80
+#define ALC_NOCHG_ID_SFT 0
+#define ALC_NOCHG_ID_HI 6
+#define ALC_NOCHG_ID_SZ 7
+#define ALC_NOCHG_INT_MSK 0x00008000
+#define ALC_NOCHG_INT_I_MSK 0xffff7fff
+#define ALC_NOCHG_INT_SFT 15
+#define ALC_NOCHG_INT_HI 15
+#define ALC_NOCHG_INT_SZ 1
+#define NEQ_PKT_FLAG_MSK 0x00010000
+#define NEQ_PKT_FLAG_I_MSK 0xfffeffff
+#define NEQ_PKT_FLAG_SFT 16
+#define NEQ_PKT_FLAG_HI 16
+#define NEQ_PKT_FLAG_SZ 1
+#define NEQ_MB_FLAG_MSK 0x01000000
+#define NEQ_MB_FLAG_I_MSK 0xfeffffff
+#define NEQ_MB_FLAG_SFT 24
+#define NEQ_MB_FLAG_HI 24
+#define NEQ_MB_FLAG_SZ 1
+#define SRAM_TAG_0_MSK 0x0000ffff
+#define SRAM_TAG_0_I_MSK 0xffff0000
+#define SRAM_TAG_0_SFT 0
+#define SRAM_TAG_0_HI 15
+#define SRAM_TAG_0_SZ 16
+#define SRAM_TAG_1_MSK 0xffff0000
+#define SRAM_TAG_1_I_MSK 0x0000ffff
+#define SRAM_TAG_1_SFT 16
+#define SRAM_TAG_1_HI 31
+#define SRAM_TAG_1_SZ 16
+#define SRAM_TAG_2_MSK 0x0000ffff
+#define SRAM_TAG_2_I_MSK 0xffff0000
+#define SRAM_TAG_2_SFT 0
+#define SRAM_TAG_2_HI 15
+#define SRAM_TAG_2_SZ 16
+#define SRAM_TAG_3_MSK 0xffff0000
+#define SRAM_TAG_3_I_MSK 0x0000ffff
+#define SRAM_TAG_3_SFT 16
+#define SRAM_TAG_3_HI 31
+#define SRAM_TAG_3_SZ 16
+#define SRAM_TAG_4_MSK 0x0000ffff
+#define SRAM_TAG_4_I_MSK 0xffff0000
+#define SRAM_TAG_4_SFT 0
+#define SRAM_TAG_4_HI 15
+#define SRAM_TAG_4_SZ 16
+#define SRAM_TAG_5_MSK 0xffff0000
+#define SRAM_TAG_5_I_MSK 0x0000ffff
+#define SRAM_TAG_5_SFT 16
+#define SRAM_TAG_5_HI 31
+#define SRAM_TAG_5_SZ 16
+#define SRAM_TAG_6_MSK 0x0000ffff
+#define SRAM_TAG_6_I_MSK 0xffff0000
+#define SRAM_TAG_6_SFT 0
+#define SRAM_TAG_6_HI 15
+#define SRAM_TAG_6_SZ 16
+#define SRAM_TAG_7_MSK 0xffff0000
+#define SRAM_TAG_7_I_MSK 0x0000ffff
+#define SRAM_TAG_7_SFT 16
+#define SRAM_TAG_7_HI 31
+#define SRAM_TAG_7_SZ 16
+#define SRAM_TAG_8_MSK 0x0000ffff
+#define SRAM_TAG_8_I_MSK 0xffff0000
+#define SRAM_TAG_8_SFT 0
+#define SRAM_TAG_8_HI 15
+#define SRAM_TAG_8_SZ 16
+#define SRAM_TAG_9_MSK 0xffff0000
+#define SRAM_TAG_9_I_MSK 0x0000ffff
+#define SRAM_TAG_9_SFT 16
+#define SRAM_TAG_9_HI 31
+#define SRAM_TAG_9_SZ 16
+#define SRAM_TAG_10_MSK 0x0000ffff
+#define SRAM_TAG_10_I_MSK 0xffff0000
+#define SRAM_TAG_10_SFT 0
+#define SRAM_TAG_10_HI 15
+#define SRAM_TAG_10_SZ 16
+#define SRAM_TAG_11_MSK 0xffff0000
+#define SRAM_TAG_11_I_MSK 0x0000ffff
+#define SRAM_TAG_11_SFT 16
+#define SRAM_TAG_11_HI 31
+#define SRAM_TAG_11_SZ 16
+#define SRAM_TAG_12_MSK 0x0000ffff
+#define SRAM_TAG_12_I_MSK 0xffff0000
+#define SRAM_TAG_12_SFT 0
+#define SRAM_TAG_12_HI 15
+#define SRAM_TAG_12_SZ 16
+#define SRAM_TAG_13_MSK 0xffff0000
+#define SRAM_TAG_13_I_MSK 0x0000ffff
+#define SRAM_TAG_13_SFT 16
+#define SRAM_TAG_13_HI 31
+#define SRAM_TAG_13_SZ 16
+#define SRAM_TAG_14_MSK 0x0000ffff
+#define SRAM_TAG_14_I_MSK 0xffff0000
+#define SRAM_TAG_14_SFT 0
+#define SRAM_TAG_14_HI 15
+#define SRAM_TAG_14_SZ 16
+#define SRAM_TAG_15_MSK 0xffff0000
+#define SRAM_TAG_15_I_MSK 0x0000ffff
+#define SRAM_TAG_15_SFT 16
+#define SRAM_TAG_15_HI 31
+#define SRAM_TAG_15_SZ 16
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_common.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_common.h
new file mode 100644
index 0000000000000..aaa4283e6c8ce
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_common.h
@@ -0,0 +1,483 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV6200_COMMON_H_
+#define _SSV6200_COMMON_H_ 
+#define FW_VERSION_REG ADR_TX_SEG
+#define M_ENG_CPU 0x00
+#define M_ENG_HWHCI 0x01
+#define M_ENG_EMPTY 0x02
+#define M_ENG_ENCRYPT 0x03
+#define M_ENG_MACRX 0x04
+#define M_ENG_MIC 0x05
+#define M_ENG_TX_EDCA0 0x06
+#define M_ENG_TX_EDCA1 0x07
+#define M_ENG_TX_EDCA2 0x08
+#define M_ENG_TX_EDCA3 0x09
+#define M_ENG_TX_MNG 0x0A
+#define M_ENG_ENCRYPT_SEC 0x0B
+#define M_ENG_MIC_SEC 0x0C
+#define M_ENG_RESERVED_1 0x0D
+#define M_ENG_RESERVED_2 0x0E
+#define M_ENG_TRASH_CAN 0x0F
+#define M_ENG_MAX (M_ENG_TRASH_CAN+1)
+#define M_CPU_HWENG 0x00
+#define M_CPU_TXL34CS 0x01
+#define M_CPU_RXL34CS 0x02
+#define M_CPU_DEFRAG 0x03
+#define M_CPU_EDCATX 0x04
+#define M_CPU_RXDATA 0x05
+#define M_CPU_RXMGMT 0x06
+#define M_CPU_RXCTRL 0x07
+#define M_CPU_FRAG 0x08
+#define M_CPU_TXTPUT 0x09
+#ifndef ID_TRAP_SW_TXTPUT
+#define ID_TRAP_SW_TXTPUT 50
+#endif
+#define M0_TXREQ 0
+#define M1_TXREQ 1
+#define M2_TXREQ 2
+#define M0_RXEVENT 3
+#define M2_RXEVENT 4
+#define HOST_CMD 5
+#define HOST_EVENT 6
+#define TEST_CMD 7
+#define SSV6XXX_RX_DESC_LEN \
+        (sizeof(struct ssv6200_rx_desc) + \
+         sizeof(struct ssv6200_rxphy_info))
+#define SSV6XXX_TX_DESC_LEN \
+        (sizeof(struct ssv6200_tx_desc) + 0)
+#define TXPB_OFFSET 80
+#define RXPB_OFFSET 80
+#define SSV6200_TX_PKT_RSVD_SETTING 0x3
+#define SSV6200_TX_PKT_RSVD SSV6200_TX_PKT_RSVD_SETTING*16
+#define SSV6200_ALLOC_RSVD TXPB_OFFSET+SSV6200_TX_PKT_RSVD
+#define SSV62XX_TX_MAX_RATES 3
+
+enum ssv6xxx_sr_bhvr {
+    SUSPEND_RESUME_0,
+    SUSPEND_RESUME_1,
+    SUSPEND_RESUME_MAX
+};
+
+enum ssv6xxx_reboot_bhvr {
+		SSV_SYS_REBOOT = 1,
+		SSV_SYS_HALF,
+		SSV_SYS_POWER_OFF
+};
+
+struct fw_rc_retry_params {
+    u32 count:4;
+    u32 drate:6;
+    u32 crate:6;
+    u32 rts_cts_nav:16;
+    u32 frame_consume_time:10;
+    u32 dl_length:12;
+    u32 RSVD:10;
+} __attribute__((packed));
+struct ssv6200_tx_desc
+{
+    u32 len:16;
+    u32 c_type:3;
+    u32 f80211:1;
+    u32 qos:1;
+    u32 ht:1;
+    u32 use_4addr:1;
+    u32 RSVD_0:3;
+    u32 bc_que:1;
+    u32 security:1;
+    u32 more_data:1;
+    u32 stype_b5b4:2;
+    u32 extra_info:1;
+    u32 fCmd;
+    u32 hdr_offset:8;
+    u32 frag:1;
+    u32 unicast:1;
+    u32 hdr_len:6;
+    u32 tx_report:1;
+    u32 tx_burst:1;
+    u32 ack_policy:2;
+    u32 aggregation:1;
+    u32 RSVD_1:3;
+    u32 do_rts_cts:2;
+    u32 reason:6;
+    u32 payload_offset:8;
+    u32 RSVD_4:7;
+    u32 RSVD_2:1;
+    u32 fCmdIdx:3;
+    u32 wsid:4;
+    u32 txq_idx:3;
+    u32 TxF_ID:6;
+    u32 rts_cts_nav:16;
+    u32 frame_consume_time:10;
+    u32 crate_idx:6;
+    u32 drate_idx:6;
+    u32 dl_length:12;
+    u32 RSVD_3:14;
+    u32 RESERVED[8];
+    struct fw_rc_retry_params rc_params[SSV62XX_TX_MAX_RATES];
+};
+struct ssv6200_rx_desc
+{
+    u32 len:16;
+    u32 c_type:3;
+    u32 f80211:1;
+    u32 qos:1;
+    u32 ht:1;
+    u32 use_4addr:1;
+    u32 l3cs_err:1;
+    u32 l4cs_err:1;
+    u32 align2:1;
+    u32 RSVD_0:2;
+    u32 psm:1;
+    u32 stype_b5b4:2;
+    u32 extra_info:1;
+    u32 edca0_used:4;
+    u32 edca1_used:5;
+    u32 edca2_used:5;
+    u32 edca3_used:5;
+    u32 mng_used:4;
+    u32 tx_page_used:9;
+    u32 hdr_offset:8;
+    u32 frag:1;
+    u32 unicast:1;
+    u32 hdr_len:6;
+    u32 RxResult:8;
+    u32 wildcard_bssid:1;
+    u32 RSVD_1:1;
+    u32 reason:6;
+    u32 payload_offset:8;
+    u32 tx_id_used:8;
+    u32 fCmdIdx:3;
+    u32 wsid:4;
+    u32 RSVD_3:3;
+    u32 rate_idx:6;
+};
+struct ssv6200_rxphy_info {
+    u32 len:16;
+    u32 rsvd0:16;
+    u32 mode:3;
+    u32 ch_bw:3;
+    u32 preamble:1;
+    u32 ht_short_gi:1;
+    u32 rate:7;
+    u32 rsvd1:1;
+    u32 smoothing:1;
+    u32 no_sounding:1;
+    u32 aggregate:1;
+    u32 stbc:2;
+    u32 fec:1;
+    u32 n_ess:2;
+    u32 rsvd2:8;
+    u32 l_length:12;
+    u32 l_rate:3;
+    u32 rsvd3:17;
+    u32 rsvd4;
+    u32 rpci:8;
+    u32 snr:8;
+    u32 service:16;
+};
+struct ssv6200_rxphy_info_padding {
+u32 rpci:8;
+u32 snr:8;
+u32 RSVD:16;
+};
+struct ssv6200_txphy_info {
+    u32 rsvd[7];
+};
+#ifdef CONFIG_P2P_NOA
+struct ssv6xxx_p2p_noa_param {
+    u32 duration;
+    u32 interval;
+    u32 start_time;
+    u32 enable:8;
+    u32 count:8;
+    u8 addr[6];
+    u8 vif_id;
+}__attribute__((packed));
+#endif
+typedef struct cfg_host_cmd {
+    u32 len:16;
+    u32 c_type:3;
+    u32 RSVD0:5;
+    u32 h_cmd:8;
+    u32 cmd_seq_no;
+    union {
+    u32 dummy;
+    u8 dat8[0];
+    u16 dat16[0];
+    u32 dat32[0];
+    };
+} HDR_HostCmd;
+#define HOST_CMD_HDR_LEN ((size_t)(((HDR_HostCmd *)100)->dat8)-100U)
+struct sdio_rxtput_cfg {
+    u32 size_per_frame;
+ u32 total_frames;
+};
+typedef enum{
+    SSV6XXX_HOST_CMD_START = 0 ,
+    SSV6XXX_HOST_CMD_LOG ,
+    SSV6XXX_HOST_CMD_PS ,
+    SSV6XXX_HOST_CMD_INIT_CALI ,
+    SSV6XXX_HOST_CMD_RX_TPUT ,
+    SSV6XXX_HOST_CMD_TX_TPUT ,
+    SSV6XXX_HOST_CMD_WATCHDOG_START,
+    SSV6XXX_HOST_CMD_WATCHDOG_STOP,
+#ifdef FW_WSID_WATCH_LIST
+    SSV6XXX_HOST_CMD_WSID_OP ,
+#endif
+#ifdef CONFIG_P2P_NOA
+    SSV6XXX_HOST_CMD_SET_NOA ,
+#endif
+    SSV6XXX_HOST_SOC_CMD_MAXID ,
+}ssv6xxx_host_cmd_id;
+#define SSV_NUM_HW_STA 2
+typedef struct cfg_host_event {
+    u32 len:16;
+    u32 c_type:3;
+    u32 RSVD0:5;
+    u32 h_event:8;
+    u32 evt_seq_no;
+    u8 dat[0];
+} HDR_HostEvent;
+typedef enum{
+#ifdef USE_CMD_RESP
+    SOC_EVT_CMD_RESP ,
+    SOC_EVT_SCAN_RESULT ,
+    SOC_EVT_DEAUTH ,
+#else
+    SOC_EVT_GET_REG_RESP ,
+#endif
+    SOC_EVT_NO_BA ,
+    SOC_EVT_RC_MPDU_REPORT ,
+    SOC_EVT_RC_AMPDU_REPORT ,
+    SOC_EVT_LOG ,
+#ifdef CONFIG_P2P_NOA
+    SOC_EVT_NOA ,
+#endif
+    SOC_EVT_USER_END ,
+    SOC_EVT_SDIO_TEST_COMMAND ,
+    SOC_EVT_RESET_HOST ,
+    SOC_EVT_SDIO_TXTPUT_RESULT ,
+    SOC_EVT_WATCHDOG_TRIGGER ,
+    SOC_EVT_TXLOOPBK_RESULT ,
+    SOC_EVT_MAXID ,
+} ssv6xxx_soc_event;
+#ifdef CONFIG_P2P_NOA
+typedef enum{
+    SSV6XXX_NOA_START = 0 ,
+    SSV6XXX_NOA_STOP ,
+}ssv6xxx_host_noa_event;
+struct ssv62xx_noa_evt {
+    u8 evt_id;
+    u8 vif;
+} __attribute__((packed));
+#endif
+typedef enum{
+    SSV6XXX_RC_COUNTER_CLEAR = 1 ,
+    SSV6XXX_RC_REPORT ,
+}ssv6xxx_host_rate_control_event;
+#define MAX_AGGR_NUM (24)
+struct ssv62xx_tx_rate {
+    s8 data_rate;
+    u8 count;
+} __attribute__((packed));
+struct ampdu_ba_notify_data {
+    u8 wsid;
+    struct ssv62xx_tx_rate tried_rates[SSV62XX_TX_MAX_RATES];
+    u16 seq_no[MAX_AGGR_NUM];
+} __attribute__((packed));
+struct firmware_rate_control_report_data{
+    u8 wsid;
+    struct ssv62xx_tx_rate rates[SSV62XX_TX_MAX_RATES];
+    u16 ampdu_len;
+    u16 ampdu_ack_len;
+    int ack_signal;
+} __attribute__((packed));
+#define RC_RETRY_PARAM_OFFSET ((sizeof(struct fw_rc_retry_params))*SSV62XX_TX_MAX_RATES)
+#define SSV_RC_RATE_MAX 39
+#ifdef FW_WSID_WATCH_LIST
+enum SSV6XXX_WSID_OPS
+{
+    SSV6XXX_WSID_OPS_ADD,
+    SSV6XXX_WSID_OPS_DEL,
+    SSV6XXX_WSID_OPS_RESETALL,
+    SSV6XXX_WSID_OPS_ENABLE_CAPS,
+    SSV6XXX_WSID_OPS_DISABLE_CAPS,
+    SSV6XXX_WSID_OPS_HWWSID_PAIRWISE_SET_TYPE,
+    SSV6XXX_WSID_OPS_HWWSID_GROUP_SET_TYPE,
+    SSV6XXX_WSID_OPS_MAX
+};
+enum SSV6XXX_WSID_SEC
+{
+    SSV6XXX_WSID_SEC_NONE = 0,
+    SSV6XXX_WSID_SEC_PAIRWISE = 1<<0,
+    SSV6XXX_WSID_SEC_GROUP = 1<<1,
+};
+enum SSV6XXX_WSID_SEC_TYPE
+{
+    SSV6XXX_WSID_SEC_SW,
+    SSV6XXX_WSID_SEC_HW,
+    SSV6XXX_WSID_SEC_TYPE_MAX
+};
+enum SSV6XXX_RETURN_STATE
+{
+    SSV6XXX_STATE_OK,
+    SSV6XXX_STATE_NG,
+    SSV6XXX_STATE_MAX
+};
+struct ssv6xxx_wsid_params
+{
+    u8 cmd;
+    u8 wsid_idx;
+    u8 target_wsid[6];
+    u8 hw_security;
+};
+#endif
+struct ssv6xxx_iqk_cfg {
+    u32 cfg_xtal:8;
+    u32 cfg_pa:8;
+    u32 cfg_pabias_ctrl:8;
+    u32 cfg_pacascode_ctrl:8;
+    u32 cfg_tssi_trgt:8;
+    u32 cfg_tssi_div:8;
+    u32 cfg_def_tx_scale_11b:8;
+    u32 cfg_def_tx_scale_11b_p0d5:8;
+    u32 cfg_def_tx_scale_11g:8;
+    u32 cfg_def_tx_scale_11g_p0d5:8;
+    u32 cmd_sel;
+    union {
+        u32 fx_sel;
+        u32 argv;
+    };
+    u32 phy_tbl_size;
+    u32 rf_tbl_size;
+};
+#define PHY_SETTING_SIZE sizeof(phy_setting)
+#ifdef CONFIG_SSV_CABRIO_E
+struct ssv6xxx_ch_cfg {
+ u32 reg_addr;
+ u32 ch1_12_value;
+ u32 ch13_14_value;
+};
+#define IQK_CFG_LEN (sizeof(struct ssv6xxx_iqk_cfg))
+#define RF_SETTING_SIZE (sizeof(asic_rf_setting))
+#endif
+#define MAX_PHY_SETTING_TABLE_SIZE 1920
+#define MAX_RF_SETTING_TABLE_SIZE 512
+typedef enum {
+    SSV6XXX_VOLT_DCDC_CONVERT = 0,
+    SSV6XXX_VOLT_LDO_CONVERT,
+} ssv6xxx_cfg_volt;
+typedef enum {
+    SSV6XXX_VOLT_33V = 0,
+    SSV6XXX_VOLT_42V,
+} ssv6xxx_cfg_volt_value;
+typedef enum {
+    SSV6XXX_IQK_CFG_XTAL_26M = 0,
+    SSV6XXX_IQK_CFG_XTAL_40M,
+    SSV6XXX_IQK_CFG_XTAL_24M,
+    SSV6XXX_IQK_CFG_XTAL_MAX,
+} ssv6xxx_iqk_cfg_xtal;
+typedef enum {
+    SSV6XXX_IQK_CFG_PA_DEF = 0,
+    SSV6XXX_IQK_CFG_PA_LI_MPB,
+    SSV6XXX_IQK_CFG_PA_LI_EVB,
+    SSV6XXX_IQK_CFG_PA_HP,
+} ssv6xxx_iqk_cfg_pa;
+typedef enum {
+    SSV6XXX_IQK_CMD_INIT_CALI = 0,
+    SSV6XXX_IQK_CMD_RTBL_LOAD,
+    SSV6XXX_IQK_CMD_RTBL_LOAD_DEF,
+    SSV6XXX_IQK_CMD_RTBL_RESET,
+    SSV6XXX_IQK_CMD_RTBL_SET,
+    SSV6XXX_IQK_CMD_RTBL_EXPORT,
+    SSV6XXX_IQK_CMD_TK_EVM,
+    SSV6XXX_IQK_CMD_TK_TONE,
+    SSV6XXX_IQK_CMD_TK_CHCH,
+} ssv6xxx_iqk_cmd_sel;
+#define SSV6XXX_IQK_TEMPERATURE 0x00000004
+#define SSV6XXX_IQK_RXDC 0x00000008
+#define SSV6XXX_IQK_RXRC 0x00000010
+#define SSV6XXX_IQK_TXDC 0x00000020
+#define SSV6XXX_IQK_TXIQ 0x00000040
+#define SSV6XXX_IQK_RXIQ 0x00000080
+#define SSV6XXX_IQK_TSSI 0x00000100
+#define SSV6XXX_IQK_PAPD 0x00000200
+typedef struct ssv_cabrio_reg_st {
+    u32 address;
+    u32 data;
+} ssv_cabrio_reg;
+typedef enum __PBuf_Type_E {
+    NOTYPE_BUF = 0,
+    TX_BUF = 1,
+    RX_BUF = 2
+} PBuf_Type_E;
+struct SKB_info_st
+{
+    struct ieee80211_sta *sta;
+    u16 mpdu_retry_counter;
+    unsigned long aggr_timestamp;
+    u16 ampdu_tx_status;
+    u16 ampdu_tx_final_retry_count;
+    u16 lowest_rate;
+    struct fw_rc_retry_params rates[SSV62XX_TX_MAX_RATES];
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+ ktime_t timestamp;
+#endif
+#ifdef MULTI_THREAD_ENCRYPT
+    volatile u8 crypt_st;
+#endif
+};
+typedef struct SKB_info_st SKB_info;
+typedef struct SKB_info_st *p_SKB_info;
+#define SSV_SKB_info_size (sizeof(struct SKB_info_st))
+#ifdef MULTI_THREAD_ENCRYPT
+enum ssv_pkt_crypt_status
+{
+    PKT_CRYPT_ST_DEC_PRE,
+    PKT_CRYPT_ST_ENC_PRE,
+    PKT_CRYPT_ST_DEC_DONE,
+    PKT_CRYPT_ST_ENC_DONE,
+    PKT_CRYPT_ST_FAIL,
+    PKT_CRYPT_ST_NOT_SUPPORT
+};
+#endif
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+#define SKB_DURATION_TIMEOUT_MS 100
+enum ssv_debug_skb_timestamp
+{
+ SKB_DURATION_STAGE_TX_ENQ,
+ SKB_DURATION_STAGE_TO_SDIO,
+ SKB_DURATION_STAGE_IN_HWQ,
+ SKB_DURATION_STAGE_END
+};
+#endif
+#define SSV6051Q_P1 0x00000000
+#define SSV6051Q_P2 0x70000000
+#define SSV6051Z 0x71000000
+#define SSV6051Q 0x73000000
+#define SSV6051P 0x75000000
+#ifdef CONFIG_SSV_CABRIO_E
+struct ssv6xxx_tx_loopback {
+    u32 reg;
+    u32 val;
+    u32 restore_val;
+    u8 restore;
+    u8 delay_ms;
+};
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_configuration.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_configuration.h
new file mode 100644
index 0000000000000..819e5a09c7d0a
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_configuration.h
@@ -0,0 +1,374 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+static ssv_cabrio_reg phy_setting[]={
+    {0xce0071bc, 0x565B565B},
+    {0xce000008, 0x0000006a},
+    {0xce00000c, 0x00000064},
+    {0xce000010, 0x00007FFF},
+    {0xce000014, 0x00000003},
+    {0xce000018, 0x0055003C},
+    {0xce00001c, 0x00000064},
+    {0xce000020, 0x20000000},
+    {0xce00002c, 0x00000000},
+    {0xce000030, 0x80046072},
+    {0xce000034, 0x1f300f6f},
+    {0xce000038, 0x660F36D0},
+    {0xce00003c, 0x106C0004},
+    {0xce000040, 0x01601400},
+    {0xce000044, 0x00600008},
+    {0xce000048, 0xff000160},
+    {0xce00004c, 0x00000840},
+    {0xce000060, 0x01000405},
+    {0xce000064, 0x06090813},
+    {0xce000068, 0x12070000},
+    {0xce00006c, 0x01000405},
+    {0xce000070, 0x06090813},
+    {0xce000074, 0x12010000},
+    {0xce000078, 0x00000000},
+    {0xce00007c, 0x10110003},
+    {0xce000080, 0x0110000F},
+    {0xce000084, 0x00000000},
+    {0xce000088, 0x00000000},
+    {0xce000094, 0x01012425},
+    {0xce000098, 0x01010101},
+    {0xce00009c, 0x00000011},
+    {0xce0000a0, 0x1fff0000},
+    {0xce0000a4, 0x1fff0000},
+    {0xce0000a8, 0x1fff0000},
+    {0xce0000ac, 0x1fff0000},
+    {0xce0000b8, 0x0000fe3e},
+    {0xce0000fc, 0xffffffff},
+    {0xce000108, 0x0ead04f5},
+    {0xce00010c, 0x0fd60080},
+    {0xce000110, 0x00000009},
+    {0xce0010a4, 0x0000002c},
+    {0xce0010b4, 0x00003001},
+    {0xce0010d4, 0x00000001},
+    {0xce002000, 0x00000044},
+    {0xce002004, 0x00040000},
+    {0xce002008, 0x20300050},
+    {0xce00200c, 0x00003467},
+    {0xce002010, 0x00430000},
+    {0xce002014, 0x20304015},
+    {0xce002018, 0x00390005},
+    {0xce00201c, 0x05555555},
+    {0xce002020, 0x00570057},
+    {0xce002024, 0x00570057},
+    {0xce002028, 0x00236700},
+    {0xce00202c, 0x000d1746},
+    {0xce002030, 0x05061787},
+    {0xce002034, 0x07800000},
+    {0xce00209c, 0x00900008},
+    {0xce0020a0, 0x00000000},
+    {0xce0023f8, 0x00000000},
+    {0xce0023fc, 0x00000001},
+    {0xce0030a4, 0x00001901},
+    {0xce0030b8, 0x5d08908e},
+    {0xce004000, 0x00000044},
+    {0xce004004, 0x00750075},
+    {0xce004008, 0x00000075},
+    {0xce00400c, 0x10000075},
+    {0xce004010, 0x3F384905},
+    {0xce004014, 0x40182000},
+    {0xce004018, 0x20600000},
+    {0xce00401c, 0x0C010120},
+    {0xce004020, 0x50505050},
+    {0xce004024, 0x50000000},
+    {0xce004028, 0x50505050},
+    {0xce00402c, 0x506070A0},
+    {0xce004030, 0xF0000000},
+    {0xce004034, 0x00002424},
+    {0xce004038, 0x00001420},
+    {0xce00409c, 0x0000300A},
+    {0xce0040c0, 0x20000280},
+    {0xce0040c4, 0x30023002},
+    {0xce0040c8, 0x0000003a},
+    {0xce004130, 0x40000000},
+    {0xce004164, 0x009C007E},
+    {0xce004180, 0x00044400},
+    {0xce004188, 0x82000000},
+    {0xce004190, 0x00000000},
+    {0xce004194, 0xffffffff},
+    {0xce004380, 0x00700010},
+    {0xce004384, 0x00007575},
+    {0xce004388, 0x0001fe3e},
+    {0xce00438c, 0x0000fe3e},
+    {0xce0043f8, 0x00000001},
+    {0xce007000, 0x00000000},
+    {0xce007004, 0x00008000},
+    {0xce007008, 0x00000000},
+    {0xce00700c, 0x00000000},
+    {0xce007010, 0x00000000},
+    {0xce007014, 0x00000000},
+    {0xce007018, 0x00000000},
+    {0xce00701c, 0x00000000},
+    {0xce007020, 0x00000000},
+    {0xce007024, 0x00000000},
+    {0xce007028, 0x00000000},
+    {0xce00702c, 0x00000000},
+    {0xce007030, 0x00000000},
+    {0xce007034, 0x00000000},
+    {0xce007038, 0x00000000},
+    {0xce00703c, 0x00000000},
+    {0xce007040, 0x02000200},
+    {0xce007048, 0x00000000},
+    {0xce00704c, 0x00000000},
+    {0xce007050, 0x00000000},
+    {0xce007054, 0x00000000},
+    {0xce007058, 0x000028ff},
+    {0xce00705c, 0x00000000},
+    {0xce007060, 0x00000000},
+    {0xce007064, 0x00000000},
+    {0xce007068, 0x00000000},
+    {0xce00706c, 0x00000202},
+    {0xce007070, 0x80ffc200},
+    {0xce007074, 0x00000000},
+    {0xce007078, 0x00000000},
+    {0xce00707c, 0x00000000},
+    {0xce007080, 0x00000000},
+    {0xce007084, 0x00000000},
+    {0xce007088, 0x00000000},
+    {0xce00708c, 0x00000000},
+    {0xce007090, 0x00000000},
+    {0xce007094, 0x00000000},
+    {0xce007098, 0x00000000},
+    {0xce00709c, 0x00000000},
+    {0xce0070a0, 0x00000000},
+    {0xce0070a4, 0x00000000},
+    {0xce0070a8, 0x00000000},
+    {0xce0070ac, 0x00000000},
+    {0xce0070b0, 0x00000000},
+    {0xce0070b4, 0x00000000},
+    {0xce0070b8, 0x00000000},
+    {0xce0070bc, 0x00000000},
+    {0xce0070c0, 0x00000000},
+    {0xce0070c4, 0x00000000},
+    {0xce0070c8, 0x00000000},
+    {0xce0070cc, 0x00000000},
+    {0xce0070d0, 0x00000000},
+    {0xce0070d4, 0x00000000},
+    {0xce0070d8, 0x00000000},
+    {0xce0070dc, 0x00000000},
+    {0xce0070e0, 0x00000000},
+    {0xce0070e4, 0x00000000},
+    {0xce0070e8, 0x00000000},
+    {0xce0070ec, 0x00000000},
+    {0xce0070f0, 0x00000000},
+    {0xce0070f4, 0x00000000},
+    {0xce0070f8, 0x00000000},
+    {0xce0070fc, 0x00000000},
+    {0xce007100, 0x00000000},
+    {0xce007104, 0x00000000},
+    {0xce007108, 0x00000000},
+    {0xce00710c, 0x00000000},
+    {0xce007110, 0x00000000},
+    {0xce007114, 0x00000000},
+    {0xce007118, 0x00000000},
+    {0xce00711c, 0x00000000},
+    {0xce007120, 0x02000200},
+    {0xce007124, 0x02000200},
+    {0xce007128, 0x02000200},
+    {0xce00712c, 0x02000200},
+    {0xce007130, 0x02000200},
+    {0xce007134, 0x02000200},
+    {0xce007138, 0x02000200},
+    {0xce00713c, 0x02000200},
+    {0xce007140, 0x02000200},
+    {0xce007144, 0x02000200},
+    {0xce007148, 0x02000200},
+    {0xce00714c, 0x02000200},
+    {0xce007150, 0x02000200},
+    {0xce007154, 0x02000200},
+    {0xce007158, 0x00000000},
+    {0xce00715c, 0x00000000},
+    {0xce007160, 0x00000000},
+    {0xce007164, 0x00000000},
+    {0xce007168, 0x00000000},
+    {0xce00716c, 0x00000000},
+    {0xce007170, 0x00000000},
+    {0xce007174, 0x00000000},
+    {0xce007178, 0x00000000},
+    {0xce00717c, 0x00000000},
+    {0xce007180, 0x00000000},
+    {0xce007184, 0x00000000},
+    {0xce007188, 0x00000000},
+    {0xce00718c, 0x00000000},
+    {0xce007190, 0x00000000},
+    {0xce007194, 0x00000000},
+    {0xce007198, 0x00000000},
+    {0xce00719c, 0x00000000},
+    {0xce0071a0, 0x00000000},
+    {0xce0071a4, 0x00000000},
+    {0xce0071a8, 0x00000000},
+    {0xce0071ac, 0x00000000},
+    {0xce0071b0, 0x00000000},
+    {0xce0071b4, 0x00000100},
+    {0xce0071b8, 0x00000000},
+    {0xce0071c0, 0x00000000},
+    {0xce0071c4, 0x00000000},
+    {0xce0071c8, 0x00000000},
+    {0xce0071cc, 0x00000000},
+    {0xce0071d0, 0x00000000},
+    {0xce0071d4, 0x00000000},
+    {0xce0071d8, 0x00000000},
+    {0xce0071dc, 0x00000000},
+    {0xce0071e0, 0x00000000},
+    {0xce0071e4, 0x00000000},
+    {0xce0071e8, 0x00000000},
+    {0xce0071ec, 0x00000000},
+    {0xce0071f0, 0x00000000},
+    {0xce0071f4, 0x00000000},
+    {0xce0071f8, 0x00000000},
+    {0xce0071fc, 0x00000000},
+#ifdef CONFIG_SSV_CABRIO_E
+    {0xce0043fc, 0x000104E5},
+    {0xce007044, 0x00028080},
+    {0xce000000, 0x80000016},
+#endif
+#ifdef CONFIG_SSV_CABRIO_A
+    {0xce0043fc, 0x000004e1},
+    {0xce007044, 0x00038080},
+    {0xce000000, 0x0000001e},
+#endif
+};
+static const u32 wifi_tx_gain[]={
+    0x79807980,
+    0x72797279,
+    0x6C726C72,
+    0x666C666C,
+    0x60666066,
+    0x5B605B60,
+    0x565B565B,
+    0x51565156,
+    0x4C514C51,
+    0x484C484C,
+    0x44484448,
+    0x40444044,
+    0x3C403C40,
+    0x3A3D3A3D,
+    0x36393639,
+};
+#ifndef CONFIG_SSV_CABRIO_A
+static ssv_cabrio_reg asic_rf_setting[]={
+    {0xCE010038, 0x0003E07C},
+    {0xCE010060, 0x00406000},
+    {0xCE01009C, 0x00000024},
+    {0xCE0100A0, 0x00EC4CC5},
+    {0xCE010000, 0x40002000},
+    {0xCE010004, 0x00020FC0},
+    {0xCE010008, 0x000DF69B},
+    {0xCE010014, 0x3D3E84FE},
+    {0xCE010018, 0x01457D79},
+    {0xCE01001C, 0x000103A7},
+    {0xCE010020, 0x000103A6},
+    {0xCE01002C, 0x00032CA8},
+    {0xCE010048, 0xFCCCCF27},
+    {0xCE010050, 0x00444000},
+    {0xCE01000C, 0x151558C5},
+    {0xCE010010, 0x01011A88},
+    {0xCE010024, 0x00012001},
+    {0xCE010028, 0x00036000},
+    {0xCE010030, 0x20EA0224},
+    {0xCE010034, 0x44000755},
+    {0xCE01003C, 0x55D89D8A},
+    {0xCE010040, 0x005508BB},
+    {0xCE010044, 0x07C08BFF},
+    {0xCE01004C, 0x07700830},
+    {0xCE010054, 0x00007FF4},
+    {0xCE010058, 0x0000000E},
+    {0xCE01005C, 0x00088018},
+    {0xCE010064, 0x08820820},
+    {0xCE010068, 0x00820820},
+    {0xCE01006C, 0x00820820},
+    {0xCE010070, 0x00820820},
+    {0xCE010074, 0x00820820},
+    {0xCE010078, 0x00820820},
+    {0xCE01007C, 0x00820820},
+    {0xCE010080, 0x00820820},
+    {0xCE010084, 0x00004080},
+    {0xCE010088, 0x200800FE},
+    {0xCE01008C, 0xAAAAAAAA},
+    {0xCE010090, 0xAAAAAAAA},
+    {0xCE010094, 0x0000A487},
+    {0xCE010098, 0x0000070E},
+    {0xCE0100A4, 0x00000F43},
+    {0xCE0100A8, 0x00098900},
+    {0xCE0100AC, 0x00000000},
+    {0xC00003AC, 0x00000000},
+    {0xC00003B0, 0x00000000},
+    {0xC00003B4, 0x00000000},
+    {0xC00003BC, 0x00000000},
+    {0xC0001D00, 0x5E000040},
+    {0xC0001D04, 0x015D015D},
+    {0xC0001D08, 0x00000001},
+    {0xC0001D0C, 0x55550000},
+    {0xC0001D20, 0x7FFF0000},
+    {0xC0001D24, 0x00000003},
+    {0xC0001D28, 0x00000000},
+    {0xC0001D2C, 0x00000000},
+};
+#endif
+#ifdef CONFIG_SSV_CABRIO_A
+static ssv_cabrio_reg fpga_rf_setting[]=
+{
+ {0xcb110000,0x5F00EFCE},
+ {0xcb110004,0x00001FC0},
+ {0xcb110008,0x1C96CA3A},
+ {0xcb11000c,0x15155A74},
+ {0xcb110010,0x01011A88},
+ {0xcb110014,0x3CBF703C},
+ {0xcb110018,0x00057579},
+ {0xcb11001c,0x000103A7},
+ {0xcb110020,0x000103A6},
+ {0xcb110024,0x00012001},
+ {0xcb110028,0x00036000},
+ {0xcb11002c,0x00000CA8},
+ {0xcb110030,0x002A0224},
+ {0xcb110034,0x00001E55},
+ {0xcb110038,0x00006C7C},
+ {0xcb11003c,0x55666666},
+ {0xcb110040,0x005508F8},
+ {0xcb110044,0x07C08BFF},
+ {0xcb110048,0xF1111A27},
+ {0xcb11004c,0x2773F53C},
+ {0xcb110050,0x00000A7C},
+ {0xcb110054,0x00087FF8},
+ {0xcb110058,0x00103014},
+ {0xcb11005c,0x0000848A},
+ {0xcb110060,0x00406030},
+ {0xcb110064,0x00820820},
+ {0xcb110068,0x00820820},
+ {0xcb11006c,0x00820820},
+ {0xcb110070,0x00820820},
+ {0xcb110074,0x00820820},
+ {0xcb110078,0x00820820},
+ {0xcb11007c,0x00820820},
+ {0xcb110080,0x00820820},
+ {0xcb110084,0x00004080},
+ {0xcb110088,0x00003EAA},
+ {0xcb11008c,0x5E00FFEB},
+ {0xcb110090,0xAAAAAAAA},
+ {0xcb110094,0x0000243F},
+ {0xcb110098,0x00018B10},
+ {0xcb120080,0x00000000},
+ {0xcb120084,0x00000000},
+ {0xcb120088,0x00000000},
+ {0xcb120090,0x00000813},
+ {0xcb120094,0x00000000},
+ {0xcb1203f8,0xFF000000},
+};
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg.h
new file mode 100644
index 0000000000000..d4a99b25d61f6
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg.h
@@ -0,0 +1,9694 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define SYS_REG_BASE 0xc0000000
+#define WBOOT_REG_BASE 0xc0000100
+#define TU0_US_REG_BASE 0xc0000200
+#define TU1_US_REG_BASE 0xc0000210
+#define TU2_US_REG_BASE 0xc0000220
+#define TU3_US_REG_BASE 0xc0000230
+#define TM0_MS_REG_BASE 0xc0000240
+#define TM1_MS_REG_BASE 0xc0000250
+#define TM2_MS_REG_BASE 0xc0000260
+#define TM3_MS_REG_BASE 0xc0000270
+#define MCU_WDT_REG_BASE 0xc0000280
+#define SYS_WDT_REG_BASE 0xc0000284
+#define GPIO_REG_BASE 0xc0000300
+#define SD_REG_BASE 0xc0000800
+#define SPI_REG_BASE 0xc0000a00
+#define CSR_I2C_MST_BASE 0xc0000b00
+#define UART_REG_BASE 0xc0000c00
+#define DAT_UART_REG_BASE 0xc0000d00
+#define INT_REG_BASE 0xc0000e00
+#define DBG_SPI_REG_BASE 0xc0000f00
+#define FLASH_SPI_REG_BASE 0xc0001000
+#define DMA_REG_BASE 0xc0001c00
+#define CSR_PMU_BASE 0xc0001d00
+#define CSR_RTC_BASE 0xc0001d20
+#define RTC_RAM_BASE 0xc0001d80
+#define D2_DMA_REG_BASE 0xc0001e00
+#define HCI_REG_BASE 0xc1000000
+#define CO_REG_BASE 0xc2000000
+#define EFS_REG_BASE 0xc2000100
+#define SMS4_REG_BASE 0xc3000000
+#define MRX_REG_BASE 0xc6000000
+#define AMPDU_REG_BASE 0xc6001000
+#define MT_REG_CSR_BASE 0xc6002000
+#define TXQ0_MT_Q_REG_CSR_BASE 0xc6002100
+#define TXQ1_MT_Q_REG_CSR_BASE 0xc6002200
+#define TXQ2_MT_Q_REG_CSR_BASE 0xc6002300
+#define TXQ3_MT_Q_REG_CSR_BASE 0xc6002400
+#define TXQ4_MT_Q_REG_CSR_BASE 0xc6002500
+#define HIF_INFO_BASE 0xca000000
+#define PHY_RATE_INFO_BASE 0xca000200
+#define MAC_GLB_SET_BASE 0xca000300
+#define BTCX_REG_BASE 0xca000400
+#define MIB_REG_BASE 0xca000800
+#define CBR_A_REG_BASE 0xcb000000
+#define MB_REG_BASE 0xcd000000
+#define ID_MNG_REG_BASE 0xcd010000
+#define CSR_PHY_BASE 0xce000000
+#define CSR_RF_BASE 0xce010000
+#define MMU_REG_BASE 0xcf000000
+#define SYS_REG_BANK_SIZE 0x000000b4
+#define WBOOT_REG_BANK_SIZE 0x0000000c
+#define TU0_US_REG_BANK_SIZE 0x00000010
+#define TU1_US_REG_BANK_SIZE 0x00000010
+#define TU2_US_REG_BANK_SIZE 0x00000010
+#define TU3_US_REG_BANK_SIZE 0x00000010
+#define TM0_MS_REG_BANK_SIZE 0x00000010
+#define TM1_MS_REG_BANK_SIZE 0x00000010
+#define TM2_MS_REG_BANK_SIZE 0x00000010
+#define TM3_MS_REG_BANK_SIZE 0x00000010
+#define MCU_WDT_REG_BANK_SIZE 0x00000004
+#define SYS_WDT_REG_BANK_SIZE 0x00000004
+#define GPIO_REG_BANK_SIZE 0x000000d4
+#define SD_REG_BANK_SIZE 0x00000180
+#define SPI_REG_BANK_SIZE 0x00000040
+#define CSR_I2C_MST_BANK_SIZE 0x00000018
+#define UART_REG_BANK_SIZE 0x00000028
+#define DAT_UART_REG_BANK_SIZE 0x00000028
+#define INT_REG_BANK_SIZE 0x0000004c
+#define DBG_SPI_REG_BANK_SIZE 0x00000040
+#define FLASH_SPI_REG_BANK_SIZE 0x0000002c
+#define DMA_REG_BANK_SIZE 0x00000014
+#define CSR_PMU_BANK_SIZE 0x00000100
+#define CSR_RTC_BANK_SIZE 0x000000e0
+#define RTC_RAM_BANK_SIZE 0x00000080
+#define D2_DMA_REG_BANK_SIZE 0x00000014
+#define HCI_REG_BANK_SIZE 0x000000cc
+#define CO_REG_BANK_SIZE 0x000000ac
+#define EFS_REG_BANK_SIZE 0x0000006c
+#define SMS4_REG_BANK_SIZE 0x00000070
+#define MRX_REG_BANK_SIZE 0x00000198
+#define AMPDU_REG_BANK_SIZE 0x00000014
+#define MT_REG_CSR_BANK_SIZE 0x00000100
+#define TXQ0_MT_Q_REG_CSR_BANK_SIZE 0x0000001c
+#define TXQ1_MT_Q_REG_CSR_BANK_SIZE 0x0000001c
+#define TXQ2_MT_Q_REG_CSR_BANK_SIZE 0x0000001c
+#define TXQ3_MT_Q_REG_CSR_BANK_SIZE 0x0000001c
+#define TXQ4_MT_Q_REG_CSR_BANK_SIZE 0x0000001c
+#define HIF_INFO_BANK_SIZE 0x0000009c
+#define PHY_RATE_INFO_BANK_SIZE 0x000000b8
+#define MAC_GLB_SET_BANK_SIZE 0x0000003c
+#define BTCX_REG_BANK_SIZE 0x0000000c
+#define MIB_REG_BANK_SIZE 0x00000480
+#define CBR_A_REG_BANK_SIZE 0x001203fc
+#define MB_REG_BANK_SIZE 0x000000a0
+#define ID_MNG_REG_BANK_SIZE 0x00000084
+#define CSR_PHY_BANK_SIZE 0x000071c0
+#define CSR_RF_BANK_SIZE 0x000000b0
+#define MMU_REG_BANK_SIZE 0x000000c0
+#define ADR_BRG_SW_RST (SYS_REG_BASE+0x00000000)
+#define ADR_BOOT (SYS_REG_BASE+0x00000004)
+#define ADR_CHIP_ID_0 (SYS_REG_BASE+0x00000008)
+#define ADR_CHIP_ID_1 (SYS_REG_BASE+0x0000000c)
+#define ADR_CHIP_ID_2 (SYS_REG_BASE+0x00000010)
+#define ADR_CHIP_ID_3 (SYS_REG_BASE+0x00000014)
+#define ADR_CLOCK_SELECTION (SYS_REG_BASE+0x00000018)
+#define ADR_PLATFORM_CLOCK_ENABLE (SYS_REG_BASE+0x0000001c)
+#define ADR_SYS_CSR_CLOCK_ENABLE (SYS_REG_BASE+0x00000020)
+#define ADR_MCU_DBG_SEL (SYS_REG_BASE+0x00000024)
+#define ADR_MCU_DBG_DATA (SYS_REG_BASE+0x00000028)
+#define ADR_AHB_BRG_STATUS (SYS_REG_BASE+0x0000002c)
+#define ADR_BIST_BIST_CTRL (SYS_REG_BASE+0x00000030)
+#define ADR_BIST_MODE_REG_IN (SYS_REG_BASE+0x00000034)
+#define ADR_BIST_MODE_REG_OUT (SYS_REG_BASE+0x00000038)
+#define ADR_BIST_MONITOR_BUS_LSB (SYS_REG_BASE+0x0000003c)
+#define ADR_BIST_MONITOR_BUS_MSB (SYS_REG_BASE+0x00000040)
+#define ADR_TB_ADR_SEL (SYS_REG_BASE+0x00000044)
+#define ADR_TB_RDATA (SYS_REG_BASE+0x00000048)
+#define ADR_UART_W2B (SYS_REG_BASE+0x0000004c)
+#define ADR_AHB_ILL_ADDR (SYS_REG_BASE+0x00000050)
+#define ADR_AHB_FEN_ADDR (SYS_REG_BASE+0x00000054)
+#define ADR_AHB_ILLFEN_STATUS (SYS_REG_BASE+0x00000058)
+#define ADR_PWM_A (SYS_REG_BASE+0x00000080)
+#define ADR_PWM_B (SYS_REG_BASE+0x00000084)
+#define ADR_HBUSREQ_LOCK (SYS_REG_BASE+0x00000090)
+#define ADR_HBURST_LOCK (SYS_REG_BASE+0x00000094)
+#define ADR_PRESCALER_USTIMER (SYS_REG_BASE+0x000000a0)
+#define ADR_BIST_MODE_REG_IN_MMU (SYS_REG_BASE+0x000000a4)
+#define ADR_BIST_MODE_REG_OUT_MMU (SYS_REG_BASE+0x000000a8)
+#define ADR_BIST_MONITOR_BUS_MMU (SYS_REG_BASE+0x000000ac)
+#define ADR_TEST_MODE (SYS_REG_BASE+0x000000b0)
+#define ADR_BOOT_INFO (WBOOT_REG_BASE+0x00000000)
+#define ADR_SD_INIT_CFG (WBOOT_REG_BASE+0x00000004)
+#define ADR_SPARE_UART_INFO (WBOOT_REG_BASE+0x00000008)
+#define ADR_TU0_MICROSECOND_TIMER (TU0_US_REG_BASE+0x00000000)
+#define ADR_TU0_CURRENT_MICROSECOND_TIME_VALUE (TU0_US_REG_BASE+0x00000004)
+#define ADR_TU0_DUMMY_BIT_0 (TU0_US_REG_BASE+0x00000008)
+#define ADR_TU0_DUMMY_BIT_1 (TU0_US_REG_BASE+0x0000000c)
+#define ADR_TU1_MICROSECOND_TIMER (TU1_US_REG_BASE+0x00000000)
+#define ADR_TU1_CURRENT_MICROSECOND_TIME_VALUE (TU1_US_REG_BASE+0x00000004)
+#define ADR_TU1_DUMMY_BIT_0 (TU1_US_REG_BASE+0x00000008)
+#define ADR_TU1_DUMMY_BIT_1 (TU1_US_REG_BASE+0x0000000c)
+#define ADR_TU2_MICROSECOND_TIMER (TU2_US_REG_BASE+0x00000000)
+#define ADR_TU2_CURRENT_MICROSECOND_TIME_VALUE (TU2_US_REG_BASE+0x00000004)
+#define ADR_TU2_DUMMY_BIT_0 (TU2_US_REG_BASE+0x00000008)
+#define ADR_TU2_DUMMY_BIT_1 (TU2_US_REG_BASE+0x0000000c)
+#define ADR_TU3_MICROSECOND_TIMER (TU3_US_REG_BASE+0x00000000)
+#define ADR_TU3_CURRENT_MICROSECOND_TIME_VALUE (TU3_US_REG_BASE+0x00000004)
+#define ADR_TU3_DUMMY_BIT_0 (TU3_US_REG_BASE+0x00000008)
+#define ADR_TU3_DUMMY_BIT_1 (TU3_US_REG_BASE+0x0000000c)
+#define ADR_TM0_MILISECOND_TIMER (TM0_MS_REG_BASE+0x00000000)
+#define ADR_TM0_CURRENT_MILISECOND_TIME_VALUE (TM0_MS_REG_BASE+0x00000004)
+#define ADR_TM0_DUMMY_BIT_0 (TM0_MS_REG_BASE+0x00000008)
+#define ADR_TM0_DUMMY_BIT_1 (TM0_MS_REG_BASE+0x0000000c)
+#define ADR_TM1_MILISECOND_TIMER (TM1_MS_REG_BASE+0x00000000)
+#define ADR_TM1_CURRENT_MILISECOND_TIME_VALUE (TM1_MS_REG_BASE+0x00000004)
+#define ADR_TM1_DUMMY_BIT_0 (TM1_MS_REG_BASE+0x00000008)
+#define ADR_TM1_DUMMY_BIT_1 (TM1_MS_REG_BASE+0x0000000c)
+#define ADR_TM2_MILISECOND_TIMER (TM2_MS_REG_BASE+0x00000000)
+#define ADR_TM2_CURRENT_MILISECOND_TIME_VALUE (TM2_MS_REG_BASE+0x00000004)
+#define ADR_TM2_DUMMY_BIT_0 (TM2_MS_REG_BASE+0x00000008)
+#define ADR_TM2_DUMMY_BIT_1 (TM2_MS_REG_BASE+0x0000000c)
+#define ADR_TM3_MILISECOND_TIMER (TM3_MS_REG_BASE+0x00000000)
+#define ADR_TM3_CURRENT_MILISECOND_TIME_VALUE (TM3_MS_REG_BASE+0x00000004)
+#define ADR_TM3_DUMMY_BIT_0 (TM3_MS_REG_BASE+0x00000008)
+#define ADR_TM3_DUMMY_BIT_1 (TM3_MS_REG_BASE+0x0000000c)
+#define ADR_MCU_WDOG_REG (MCU_WDT_REG_BASE+0x00000000)
+#define ADR_SYS_WDOG_REG (SYS_WDT_REG_BASE+0x00000000)
+#define ADR_PAD6 (GPIO_REG_BASE+0x00000000)
+#define ADR_PAD7 (GPIO_REG_BASE+0x00000004)
+#define ADR_PAD8 (GPIO_REG_BASE+0x00000008)
+#define ADR_PAD9 (GPIO_REG_BASE+0x0000000c)
+#define ADR_PAD11 (GPIO_REG_BASE+0x00000010)
+#define ADR_PAD15 (GPIO_REG_BASE+0x00000014)
+#define ADR_PAD16 (GPIO_REG_BASE+0x00000018)
+#define ADR_PAD17 (GPIO_REG_BASE+0x0000001c)
+#define ADR_PAD18 (GPIO_REG_BASE+0x00000020)
+#define ADR_PAD19 (GPIO_REG_BASE+0x00000024)
+#define ADR_PAD20 (GPIO_REG_BASE+0x00000028)
+#define ADR_PAD21 (GPIO_REG_BASE+0x0000002c)
+#define ADR_PAD22 (GPIO_REG_BASE+0x00000030)
+#define ADR_PAD24 (GPIO_REG_BASE+0x00000034)
+#define ADR_PAD25 (GPIO_REG_BASE+0x00000038)
+#define ADR_PAD27 (GPIO_REG_BASE+0x0000003c)
+#define ADR_PAD28 (GPIO_REG_BASE+0x00000040)
+#define ADR_PAD29 (GPIO_REG_BASE+0x00000044)
+#define ADR_PAD30 (GPIO_REG_BASE+0x00000048)
+#define ADR_PAD31 (GPIO_REG_BASE+0x0000004c)
+#define ADR_PAD32 (GPIO_REG_BASE+0x00000050)
+#define ADR_PAD33 (GPIO_REG_BASE+0x00000054)
+#define ADR_PAD34 (GPIO_REG_BASE+0x00000058)
+#define ADR_PAD42 (GPIO_REG_BASE+0x0000005c)
+#define ADR_PAD43 (GPIO_REG_BASE+0x00000060)
+#define ADR_PAD44 (GPIO_REG_BASE+0x00000064)
+#define ADR_PAD45 (GPIO_REG_BASE+0x00000068)
+#define ADR_PAD46 (GPIO_REG_BASE+0x0000006c)
+#define ADR_PAD47 (GPIO_REG_BASE+0x00000070)
+#define ADR_PAD48 (GPIO_REG_BASE+0x00000074)
+#define ADR_PAD49 (GPIO_REG_BASE+0x00000078)
+#define ADR_PAD50 (GPIO_REG_BASE+0x0000007c)
+#define ADR_PAD51 (GPIO_REG_BASE+0x00000080)
+#define ADR_PAD52 (GPIO_REG_BASE+0x00000084)
+#define ADR_PAD53 (GPIO_REG_BASE+0x00000088)
+#define ADR_PAD54 (GPIO_REG_BASE+0x0000008c)
+#define ADR_PAD56 (GPIO_REG_BASE+0x00000090)
+#define ADR_PAD57 (GPIO_REG_BASE+0x00000094)
+#define ADR_PAD58 (GPIO_REG_BASE+0x00000098)
+#define ADR_PAD59 (GPIO_REG_BASE+0x0000009c)
+#define ADR_PAD60 (GPIO_REG_BASE+0x000000a0)
+#define ADR_PAD61 (GPIO_REG_BASE+0x000000a4)
+#define ADR_PAD62 (GPIO_REG_BASE+0x000000a8)
+#define ADR_PAD64 (GPIO_REG_BASE+0x000000ac)
+#define ADR_PAD65 (GPIO_REG_BASE+0x000000b0)
+#define ADR_PAD66 (GPIO_REG_BASE+0x000000b4)
+#define ADR_PAD68 (GPIO_REG_BASE+0x000000b8)
+#define ADR_PAD67 (GPIO_REG_BASE+0x000000bc)
+#define ADR_PAD69 (GPIO_REG_BASE+0x000000c0)
+#define ADR_PAD70 (GPIO_REG_BASE+0x000000c4)
+#define ADR_PAD231 (GPIO_REG_BASE+0x000000c8)
+#define ADR_PIN_SEL_0 (GPIO_REG_BASE+0x000000cc)
+#define ADR_PIN_SEL_1 (GPIO_REG_BASE+0x000000d0)
+#define ADR_IO_PORT_REG (SD_REG_BASE+0x00000000)
+#define ADR_INT_MASK_REG (SD_REG_BASE+0x00000004)
+#define ADR_INT_STATUS_REG (SD_REG_BASE+0x00000008)
+#define ADR_FN1_STATUS_REG (SD_REG_BASE+0x0000000c)
+#define ADR_CARD_PKT_STATUS_TEST (SD_REG_BASE+0x00000010)
+#define ADR_SYSTEM_INFORMATION_REG (SD_REG_BASE+0x0000001c)
+#define ADR_CARD_RCA_REG (SD_REG_BASE+0x00000020)
+#define ADR_SDIO_FIFO_WR_THLD_REG (SD_REG_BASE+0x00000024)
+#define ADR_SDIO_FIFO_WR_LIMIT_REG (SD_REG_BASE+0x00000028)
+#define ADR_SDIO_TX_DATA_BATCH_SIZE_REG (SD_REG_BASE+0x0000002c)
+#define ADR_SDIO_THLD_FOR_CMD53RD_REG (SD_REG_BASE+0x00000030)
+#define ADR_SDIO_RX_DATA_BATCH_SIZE_REG (SD_REG_BASE+0x00000034)
+#define ADR_SDIO_LOG_START_END_DATA_REG (SD_REG_BASE+0x00000038)
+#define ADR_SDIO_BYTE_MODE_BATCH_SIZE_REG (SD_REG_BASE+0x00000040)
+#define ADR_SDIO_LAST_CMD_INDEX_CRC_REG (SD_REG_BASE+0x00000044)
+#define ADR_SDIO_LAST_CMD_ARG_REG (SD_REG_BASE+0x00000048)
+#define ADR_SDIO_BUS_STATE_DEBUG_MONITOR (SD_REG_BASE+0x0000004c)
+#define ADR_SDIO_CARD_STATUS_REG (SD_REG_BASE+0x00000050)
+#define ADR_R5_RESP_FLAG_OUT_TIMING (SD_REG_BASE+0x00000054)
+#define ADR_CMD52_DATA_FOR_LAST_TIME (SD_REG_BASE+0x0000005c)
+#define ADR_FN1_DMA_START_ADDR_REG (SD_REG_BASE+0x00000060)
+#define ADR_FN1_INT_CTRL_RESET (SD_REG_BASE+0x00000064)
+#define ADR_IO_REG_PORT_REG (SD_REG_BASE+0x00000070)
+#define ADR_SDIO_FIFO_ERROR_CNT (SD_REG_BASE+0x0000007c)
+#define ADR_SDIO_CRC7_CRC16_ERROR_REG (SD_REG_BASE+0x00000080)
+#define ADR_SDIO_BLOCK_CNT_INFO (SD_REG_BASE+0x00000084)
+#define ADR_RX_DATA_CMD52_ABORT_COUNT (SD_REG_BASE+0x0000008c)
+#define ADR_FIFO_PTR_READ_BLOCK_CNT (SD_REG_BASE+0x00000090)
+#define ADR_TX_TIME_OUT_READ_CTRL (SD_REG_BASE+0x00000094)
+#define ADR_SDIO_TX_ALLOC_REG (SD_REG_BASE+0x00000098)
+#define ADR_SDIO_TX_INFORM (SD_REG_BASE+0x0000009c)
+#define ADR_F1_BLOCK_SIZE_0_REG (SD_REG_BASE+0x000000a0)
+#define ADR_SDIO_COMMAND_LOG_DATA_31_0 (SD_REG_BASE+0x000000b0)
+#define ADR_SDIO_COMMAND_LOG_DATA_63_32 (SD_REG_BASE+0x000000b4)
+#define ADR_SYSTEM_INFORMATION_REGISTER (SD_REG_BASE+0x000000bc)
+#define ADR_CCCR_00H_REG (SD_REG_BASE+0x000000c0)
+#define ADR_CCCR_04H_REG (SD_REG_BASE+0x000000c4)
+#define ADR_CCCR_08H_REG (SD_REG_BASE+0x000000c8)
+#define ADR_CCCR_13H_REG (SD_REG_BASE+0x000000d0)
+#define ADR_FBR_100H_REG (SD_REG_BASE+0x000000e0)
+#define ADR_FBR_109H_REG (SD_REG_BASE+0x000000e8)
+#define ADR_F0_CIS_CONTENT_REG_0 (SD_REG_BASE+0x00000100)
+#define ADR_F0_CIS_CONTENT_REG_1 (SD_REG_BASE+0x00000104)
+#define ADR_F0_CIS_CONTENT_REG_2 (SD_REG_BASE+0x00000108)
+#define ADR_F0_CIS_CONTENT_REG_3 (SD_REG_BASE+0x0000010c)
+#define ADR_F0_CIS_CONTENT_REG_4 (SD_REG_BASE+0x00000110)
+#define ADR_F0_CIS_CONTENT_REG_5 (SD_REG_BASE+0x00000114)
+#define ADR_F0_CIS_CONTENT_REG_6 (SD_REG_BASE+0x00000118)
+#define ADR_F0_CIS_CONTENT_REG_7 (SD_REG_BASE+0x0000011c)
+#define ADR_F0_CIS_CONTENT_REG_8 (SD_REG_BASE+0x00000120)
+#define ADR_F0_CIS_CONTENT_REG_9 (SD_REG_BASE+0x00000124)
+#define ADR_F0_CIS_CONTENT_REG_10 (SD_REG_BASE+0x00000128)
+#define ADR_F0_CIS_CONTENT_REG_11 (SD_REG_BASE+0x0000012c)
+#define ADR_F0_CIS_CONTENT_REG_12 (SD_REG_BASE+0x00000130)
+#define ADR_F0_CIS_CONTENT_REG_13 (SD_REG_BASE+0x00000134)
+#define ADR_F0_CIS_CONTENT_REG_14 (SD_REG_BASE+0x00000138)
+#define ADR_F0_CIS_CONTENT_REG_15 (SD_REG_BASE+0x0000013c)
+#define ADR_F1_CIS_CONTENT_REG_0 (SD_REG_BASE+0x00000140)
+#define ADR_F1_CIS_CONTENT_REG_1 (SD_REG_BASE+0x00000144)
+#define ADR_F1_CIS_CONTENT_REG_2 (SD_REG_BASE+0x00000148)
+#define ADR_F1_CIS_CONTENT_REG_3 (SD_REG_BASE+0x0000014c)
+#define ADR_F1_CIS_CONTENT_REG_4 (SD_REG_BASE+0x00000150)
+#define ADR_F1_CIS_CONTENT_REG_5 (SD_REG_BASE+0x00000154)
+#define ADR_F1_CIS_CONTENT_REG_6 (SD_REG_BASE+0x00000158)
+#define ADR_F1_CIS_CONTENT_REG_7 (SD_REG_BASE+0x0000015c)
+#define ADR_F1_CIS_CONTENT_REG_8 (SD_REG_BASE+0x00000160)
+#define ADR_F1_CIS_CONTENT_REG_9 (SD_REG_BASE+0x00000164)
+#define ADR_F1_CIS_CONTENT_REG_10 (SD_REG_BASE+0x00000168)
+#define ADR_F1_CIS_CONTENT_REG_11 (SD_REG_BASE+0x0000016c)
+#define ADR_F1_CIS_CONTENT_REG_12 (SD_REG_BASE+0x00000170)
+#define ADR_F1_CIS_CONTENT_REG_13 (SD_REG_BASE+0x00000174)
+#define ADR_F1_CIS_CONTENT_REG_14 (SD_REG_BASE+0x00000178)
+#define ADR_F1_CIS_CONTENT_REG_15 (SD_REG_BASE+0x0000017c)
+#define ADR_SPI_MODE (SPI_REG_BASE+0x00000000)
+#define ADR_RX_QUOTA (SPI_REG_BASE+0x00000004)
+#define ADR_CONDITION_NUMBER (SPI_REG_BASE+0x00000008)
+#define ADR_HOST_PATH (SPI_REG_BASE+0x0000000c)
+#define ADR_TX_SEG (SPI_REG_BASE+0x00000010)
+#define ADR_DEBUG_BURST_MODE (SPI_REG_BASE+0x00000014)
+#define ADR_SPI_TO_PHY_PARAM1 (SPI_REG_BASE+0x00000018)
+#define ADR_SPI_TO_PHY_PARAM2 (SPI_REG_BASE+0x0000001c)
+#define ADR_SPI_STS (SPI_REG_BASE+0x00000020)
+#define ADR_TX_ALLOC_SET (SPI_REG_BASE+0x00000024)
+#define ADR_TX_ALLOC (SPI_REG_BASE+0x00000028)
+#define ADR_DBG_CNT (SPI_REG_BASE+0x0000002c)
+#define ADR_DBG_CNT2 (SPI_REG_BASE+0x00000030)
+#define ADR_DBG_CNT3 (SPI_REG_BASE+0x00000034)
+#define ADR_DBG_CNT4 (SPI_REG_BASE+0x00000038)
+#define ADR_INT_TAG (SPI_REG_BASE+0x0000003c)
+#define ADR_I2CM_EN (CSR_I2C_MST_BASE+0x00000000)
+#define ADR_I2CM_DEV_A (CSR_I2C_MST_BASE+0x00000004)
+#define ADR_I2CM_LEN (CSR_I2C_MST_BASE+0x00000008)
+#define ADR_I2CM_WDAT (CSR_I2C_MST_BASE+0x0000000c)
+#define ADR_I2CM_RDAT (CSR_I2C_MST_BASE+0x00000010)
+#define ADR_I2CM_EN_2 (CSR_I2C_MST_BASE+0x00000014)
+#define ADR_UART_DATA (UART_REG_BASE+0x00000000)
+#define ADR_UART_IER (UART_REG_BASE+0x00000004)
+#define ADR_UART_FCR (UART_REG_BASE+0x00000008)
+#define ADR_UART_LCR (UART_REG_BASE+0x0000000c)
+#define ADR_UART_MCR (UART_REG_BASE+0x00000010)
+#define ADR_UART_LSR (UART_REG_BASE+0x00000014)
+#define ADR_UART_MSR (UART_REG_BASE+0x00000018)
+#define ADR_UART_SPR (UART_REG_BASE+0x0000001c)
+#define ADR_UART_RTHR (UART_REG_BASE+0x00000020)
+#define ADR_UART_ISR (UART_REG_BASE+0x00000024)
+#define ADR_DAT_UART_DATA (DAT_UART_REG_BASE+0x00000000)
+#define ADR_DAT_UART_IER (DAT_UART_REG_BASE+0x00000004)
+#define ADR_DAT_UART_FCR (DAT_UART_REG_BASE+0x00000008)
+#define ADR_DAT_UART_LCR (DAT_UART_REG_BASE+0x0000000c)
+#define ADR_DAT_UART_MCR (DAT_UART_REG_BASE+0x00000010)
+#define ADR_DAT_UART_LSR (DAT_UART_REG_BASE+0x00000014)
+#define ADR_DAT_UART_MSR (DAT_UART_REG_BASE+0x00000018)
+#define ADR_DAT_UART_SPR (DAT_UART_REG_BASE+0x0000001c)
+#define ADR_DAT_UART_RTHR (DAT_UART_REG_BASE+0x00000020)
+#define ADR_DAT_UART_ISR (DAT_UART_REG_BASE+0x00000024)
+#define ADR_INT_MASK (INT_REG_BASE+0x00000000)
+#define ADR_INT_MODE (INT_REG_BASE+0x00000004)
+#define ADR_INT_IRQ_STS (INT_REG_BASE+0x00000008)
+#define ADR_INT_FIQ_STS (INT_REG_BASE+0x0000000c)
+#define ADR_INT_IRQ_RAW (INT_REG_BASE+0x00000010)
+#define ADR_INT_FIQ_RAW (INT_REG_BASE+0x00000014)
+#define ADR_INT_PERI_MASK (INT_REG_BASE+0x00000018)
+#define ADR_INT_PERI_STS (INT_REG_BASE+0x0000001c)
+#define ADR_INT_PERI_RAW (INT_REG_BASE+0x00000020)
+#define ADR_INT_GPI_CFG (INT_REG_BASE+0x00000024)
+#define ADR_SYS_INT_FOR_HOST (INT_REG_BASE+0x00000028)
+#define ADR_SPI_IPC (INT_REG_BASE+0x00000034)
+#define ADR_SDIO_IPC (INT_REG_BASE+0x00000038)
+#define ADR_SDIO_MASK (INT_REG_BASE+0x0000003c)
+#define ADR_SDIO_IRQ_STS (INT_REG_BASE+0x00000040)
+#define ADR_SD_PERI_MASK (INT_REG_BASE+0x00000044)
+#define ADR_SD_PERI_STS (INT_REG_BASE+0x00000048)
+#define ADR_DBG_SPI_MODE (DBG_SPI_REG_BASE+0x00000000)
+#define ADR_DBG_RX_QUOTA (DBG_SPI_REG_BASE+0x00000004)
+#define ADR_DBG_CONDITION_NUMBER (DBG_SPI_REG_BASE+0x00000008)
+#define ADR_DBG_HOST_PATH (DBG_SPI_REG_BASE+0x0000000c)
+#define ADR_DBG_TX_SEG (DBG_SPI_REG_BASE+0x00000010)
+#define ADR_DBG_DEBUG_BURST_MODE (DBG_SPI_REG_BASE+0x00000014)
+#define ADR_DBG_SPI_TO_PHY_PARAM1 (DBG_SPI_REG_BASE+0x00000018)
+#define ADR_DBG_SPI_TO_PHY_PARAM2 (DBG_SPI_REG_BASE+0x0000001c)
+#define ADR_DBG_SPI_STS (DBG_SPI_REG_BASE+0x00000020)
+#define ADR_DBG_TX_ALLOC_SET (DBG_SPI_REG_BASE+0x00000024)
+#define ADR_DBG_TX_ALLOC (DBG_SPI_REG_BASE+0x00000028)
+#define ADR_DBG_DBG_CNT (DBG_SPI_REG_BASE+0x0000002c)
+#define ADR_DBG_DBG_CNT2 (DBG_SPI_REG_BASE+0x00000030)
+#define ADR_DBG_DBG_CNT3 (DBG_SPI_REG_BASE+0x00000034)
+#define ADR_DBG_DBG_CNT4 (DBG_SPI_REG_BASE+0x00000038)
+#define ADR_DBG_INT_TAG (DBG_SPI_REG_BASE+0x0000003c)
+#define ADR_BOOT_ADDR (FLASH_SPI_REG_BASE+0x00000000)
+#define ADR_VERIFY_DATA (FLASH_SPI_REG_BASE+0x00000004)
+#define ADR_FLASH_ADDR (FLASH_SPI_REG_BASE+0x00000008)
+#define ADR_SRAM_ADDR (FLASH_SPI_REG_BASE+0x0000000c)
+#define ADR_LEN (FLASH_SPI_REG_BASE+0x00000010)
+#define ADR_SPI_PARAM (FLASH_SPI_REG_BASE+0x00000014)
+#define ADR_SPI_PARAM2 (FLASH_SPI_REG_BASE+0x00000018)
+#define ADR_CHECK_SUM_RESULT (FLASH_SPI_REG_BASE+0x0000001c)
+#define ADR_CHECK_SUM_IN_FILE (FLASH_SPI_REG_BASE+0x00000020)
+#define ADR_COMMAND_LEN (FLASH_SPI_REG_BASE+0x00000024)
+#define ADR_COMMAND_ADDR (FLASH_SPI_REG_BASE+0x00000028)
+#define ADR_DMA_ADR_SRC (DMA_REG_BASE+0x00000000)
+#define ADR_DMA_ADR_DST (DMA_REG_BASE+0x00000004)
+#define ADR_DMA_CTRL (DMA_REG_BASE+0x00000008)
+#define ADR_DMA_INT (DMA_REG_BASE+0x0000000c)
+#define ADR_DMA_FILL_CONST (DMA_REG_BASE+0x00000010)
+#define ADR_PMU_0 (CSR_PMU_BASE+0x00000000)
+#define ADR_PMU_1 (CSR_PMU_BASE+0x00000004)
+#define ADR_PMU_2 (CSR_PMU_BASE+0x00000008)
+#define ADR_PMU_3 (CSR_PMU_BASE+0x0000000c)
+#define ADR_RTC_1 (CSR_RTC_BASE+0x00000000)
+#define ADR_RTC_2 (CSR_RTC_BASE+0x00000004)
+#define ADR_RTC_3W (CSR_RTC_BASE+0x00000008)
+#define ADR_RTC_3R (CSR_RTC_BASE+0x00000008)
+#define ADR_RTC_4 (CSR_RTC_BASE+0x0000000c)
+#define ADR_RTC_RAM (RTC_RAM_BASE+0x00000000)
+#define ADR_D2_DMA_ADR_SRC (D2_DMA_REG_BASE+0x00000000)
+#define ADR_D2_DMA_ADR_DST (D2_DMA_REG_BASE+0x00000004)
+#define ADR_D2_DMA_CTRL (D2_DMA_REG_BASE+0x00000008)
+#define ADR_D2_DMA_INT (D2_DMA_REG_BASE+0x0000000c)
+#define ADR_D2_DMA_FILL_CONST (D2_DMA_REG_BASE+0x00000010)
+#define ADR_CONTROL (HCI_REG_BASE+0x00000000)
+#define ADR_SDIO_WAKE_MODE (HCI_REG_BASE+0x00000004)
+#define ADR_TX_FLOW_0 (HCI_REG_BASE+0x00000008)
+#define ADR_TX_FLOW_1 (HCI_REG_BASE+0x0000000c)
+#define ADR_THREASHOLD (HCI_REG_BASE+0x00000018)
+#define ADR_TXFID_INCREASE (HCI_REG_BASE+0x00000020)
+#define ADR_GLOBAL_SEQUENCE (HCI_REG_BASE+0x00000028)
+#define ADR_HCI_TX_RX_INFO_SIZE (HCI_REG_BASE+0x00000030)
+#define ADR_HCI_TX_INFO_CLEAR (HCI_REG_BASE+0x00000034)
+#define ADR_TX_ETHER_TYPE_0 (HCI_REG_BASE+0x00000050)
+#define ADR_TX_ETHER_TYPE_1 (HCI_REG_BASE+0x00000054)
+#define ADR_RX_ETHER_TYPE_0 (HCI_REG_BASE+0x00000060)
+#define ADR_RX_ETHER_TYPE_1 (HCI_REG_BASE+0x00000064)
+#define ADR_PACKET_COUNTER_INFO_0 (HCI_REG_BASE+0x00000070)
+#define ADR_PACKET_COUNTER_INFO_1 (HCI_REG_BASE+0x00000074)
+#define ADR_PACKET_COUNTER_INFO_2 (HCI_REG_BASE+0x00000078)
+#define ADR_PACKET_COUNTER_INFO_3 (HCI_REG_BASE+0x0000007c)
+#define ADR_PACKET_COUNTER_INFO_4 (HCI_REG_BASE+0x00000080)
+#define ADR_PACKET_COUNTER_INFO_5 (HCI_REG_BASE+0x00000084)
+#define ADR_PACKET_COUNTER_INFO_6 (HCI_REG_BASE+0x00000088)
+#define ADR_PACKET_COUNTER_INFO_7 (HCI_REG_BASE+0x0000008c)
+#define ADR_SDIO_TX_RX_FAIL_COUNTER_0 (HCI_REG_BASE+0x00000090)
+#define ADR_SDIO_TX_RX_FAIL_COUNTER_1 (HCI_REG_BASE+0x00000094)
+#define ADR_HCI_STATE_DEBUG_MODE_0 (HCI_REG_BASE+0x000000a0)
+#define ADR_HCI_STATE_DEBUG_MODE_1 (HCI_REG_BASE+0x000000a4)
+#define ADR_HCI_STATE_DEBUG_MODE_2 (HCI_REG_BASE+0x000000a8)
+#define ADR_HCI_STATE_DEBUG_MODE_3 (HCI_REG_BASE+0x000000ac)
+#define ADR_HCI_STATE_DEBUG_MODE_4 (HCI_REG_BASE+0x000000b0)
+#define ADR_HCI_STATE_DEBUG_MODE_5 (HCI_REG_BASE+0x000000b4)
+#define ADR_HCI_STATE_DEBUG_MODE_6 (HCI_REG_BASE+0x000000b8)
+#define ADR_HCI_STATE_DEBUG_MODE_7 (HCI_REG_BASE+0x000000bc)
+#define ADR_HCI_STATE_DEBUG_MODE_8 (HCI_REG_BASE+0x000000c0)
+#define ADR_HCI_STATE_DEBUG_MODE_9 (HCI_REG_BASE+0x000000c4)
+#define ADR_HCI_STATE_DEBUG_MODE_10 (HCI_REG_BASE+0x000000c8)
+#define ADR_CS_START_ADDR (CO_REG_BASE+0x00000000)
+#define ADR_CS_ADD_LEN (CO_REG_BASE+0x00000004)
+#define ADR_CS_CMD (CO_REG_BASE+0x00000008)
+#define ADR_CS_INI_BUF (CO_REG_BASE+0x0000000c)
+#define ADR_CS_PSEUDO_BUF (CO_REG_BASE+0x00000010)
+#define ADR_CS_CHECK_SUM (CO_REG_BASE+0x00000014)
+#define ADR_RAND_EN (CO_REG_BASE+0x00000018)
+#define ADR_RAND_NUM (CO_REG_BASE+0x0000001c)
+#define ADR_MUL_OP1 (CO_REG_BASE+0x00000060)
+#define ADR_MUL_OP2 (CO_REG_BASE+0x00000064)
+#define ADR_MUL_ANS0 (CO_REG_BASE+0x00000068)
+#define ADR_MUL_ANS1 (CO_REG_BASE+0x0000006c)
+#define ADR_DMA_RDATA (CO_REG_BASE+0x00000070)
+#define ADR_DMA_WDATA (CO_REG_BASE+0x00000074)
+#define ADR_DMA_LEN (CO_REG_BASE+0x00000078)
+#define ADR_DMA_CLR (CO_REG_BASE+0x0000007c)
+#define ADR_NAV_DATA (CO_REG_BASE+0x00000080)
+#define ADR_CO_NAV (CO_REG_BASE+0x00000084)
+#define ADR_SHA_DST_ADDR (CO_REG_BASE+0x000000a0)
+#define ADR_SHA_SRC_ADDR (CO_REG_BASE+0x000000a4)
+#define ADR_SHA_SETTING (CO_REG_BASE+0x000000a8)
+#define ADR_EFUSE_CLK_FREQ (EFS_REG_BASE+0x00000000)
+#define ADR_EFUSE_LDO_TIME (EFS_REG_BASE+0x00000004)
+#define ADR_EFUSE_AHB_RDATA_0 (EFS_REG_BASE+0x00000008)
+#define ADR_EFUSE_WDATA_0 (EFS_REG_BASE+0x00000008)
+#define ADR_EFUSE_AHB_RDATA_1 (EFS_REG_BASE+0x0000000c)
+#define ADR_EFUSE_WDATA_1 (EFS_REG_BASE+0x0000000c)
+#define ADR_EFUSE_AHB_RDATA_2 (EFS_REG_BASE+0x00000010)
+#define ADR_EFUSE_WDATA_2 (EFS_REG_BASE+0x00000010)
+#define ADR_EFUSE_AHB_RDATA_3 (EFS_REG_BASE+0x00000014)
+#define ADR_EFUSE_WDATA_3 (EFS_REG_BASE+0x00000014)
+#define ADR_EFUSE_AHB_RDATA_4 (EFS_REG_BASE+0x00000018)
+#define ADR_EFUSE_WDATA_4 (EFS_REG_BASE+0x00000018)
+#define ADR_EFUSE_AHB_RDATA_5 (EFS_REG_BASE+0x0000001c)
+#define ADR_EFUSE_WDATA_5 (EFS_REG_BASE+0x0000001c)
+#define ADR_EFUSE_AHB_RDATA_6 (EFS_REG_BASE+0x00000020)
+#define ADR_EFUSE_WDATA_6 (EFS_REG_BASE+0x00000020)
+#define ADR_EFUSE_AHB_RDATA_7 (EFS_REG_BASE+0x00000024)
+#define ADR_EFUSE_WDATA_7 (EFS_REG_BASE+0x00000024)
+#define ADR_EFUSE_SPI_RD0_EN (EFS_REG_BASE+0x00000028)
+#define ADR_EFUSE_SPI_RD1_EN (EFS_REG_BASE+0x0000002c)
+#define ADR_EFUSE_SPI_RD2_EN (EFS_REG_BASE+0x00000030)
+#define ADR_EFUSE_SPI_RD3_EN (EFS_REG_BASE+0x00000034)
+#define ADR_EFUSE_SPI_RD4_EN (EFS_REG_BASE+0x00000038)
+#define ADR_EFUSE_SPI_RD5_EN (EFS_REG_BASE+0x0000003c)
+#define ADR_EFUSE_SPI_RD6_EN (EFS_REG_BASE+0x00000040)
+#define ADR_EFUSE_SPI_RD7_EN (EFS_REG_BASE+0x00000044)
+#define ADR_EFUSE_SPI_BUSY (EFS_REG_BASE+0x00000048)
+#define ADR_EFUSE_SPI_RDATA_0 (EFS_REG_BASE+0x0000004c)
+#define ADR_EFUSE_SPI_RDATA_1 (EFS_REG_BASE+0x00000050)
+#define ADR_EFUSE_SPI_RDATA_2 (EFS_REG_BASE+0x00000054)
+#define ADR_EFUSE_SPI_RDATA_3 (EFS_REG_BASE+0x00000058)
+#define ADR_EFUSE_SPI_RDATA_4 (EFS_REG_BASE+0x0000005c)
+#define ADR_EFUSE_SPI_RDATA_5 (EFS_REG_BASE+0x00000060)
+#define ADR_EFUSE_SPI_RDATA_6 (EFS_REG_BASE+0x00000064)
+#define ADR_EFUSE_SPI_RDATA_7 (EFS_REG_BASE+0x00000068)
+#define ADR_SMS4_CFG1 (SMS4_REG_BASE+0x00000000)
+#define ADR_SMS4_CFG2 (SMS4_REG_BASE+0x00000004)
+#define ADR_SMS4_MODE1 (SMS4_REG_BASE+0x00000008)
+#define ADR_SMS4_TRIG (SMS4_REG_BASE+0x00000010)
+#define ADR_SMS4_STATUS1 (SMS4_REG_BASE+0x00000014)
+#define ADR_SMS4_STATUS2 (SMS4_REG_BASE+0x00000018)
+#define ADR_SMS4_DATA_IN0 (SMS4_REG_BASE+0x00000020)
+#define ADR_SMS4_DATA_IN1 (SMS4_REG_BASE+0x00000024)
+#define ADR_SMS4_DATA_IN2 (SMS4_REG_BASE+0x00000028)
+#define ADR_SMS4_DATA_IN3 (SMS4_REG_BASE+0x0000002c)
+#define ADR_SMS4_DATA_OUT0 (SMS4_REG_BASE+0x00000030)
+#define ADR_SMS4_DATA_OUT1 (SMS4_REG_BASE+0x00000034)
+#define ADR_SMS4_DATA_OUT2 (SMS4_REG_BASE+0x00000038)
+#define ADR_SMS4_DATA_OUT3 (SMS4_REG_BASE+0x0000003c)
+#define ADR_SMS4_KEY_0 (SMS4_REG_BASE+0x00000040)
+#define ADR_SMS4_KEY_1 (SMS4_REG_BASE+0x00000044)
+#define ADR_SMS4_KEY_2 (SMS4_REG_BASE+0x00000048)
+#define ADR_SMS4_KEY_3 (SMS4_REG_BASE+0x0000004c)
+#define ADR_SMS4_MODE_IV0 (SMS4_REG_BASE+0x00000050)
+#define ADR_SMS4_MODE_IV1 (SMS4_REG_BASE+0x00000054)
+#define ADR_SMS4_MODE_IV2 (SMS4_REG_BASE+0x00000058)
+#define ADR_SMS4_MODE_IV3 (SMS4_REG_BASE+0x0000005c)
+#define ADR_SMS4_OFB_ENC0 (SMS4_REG_BASE+0x00000060)
+#define ADR_SMS4_OFB_ENC1 (SMS4_REG_BASE+0x00000064)
+#define ADR_SMS4_OFB_ENC2 (SMS4_REG_BASE+0x00000068)
+#define ADR_SMS4_OFB_ENC3 (SMS4_REG_BASE+0x0000006c)
+#define ADR_MRX_MCAST_TB0_0 (MRX_REG_BASE+0x00000000)
+#define ADR_MRX_MCAST_TB0_1 (MRX_REG_BASE+0x00000004)
+#define ADR_MRX_MCAST_MK0_0 (MRX_REG_BASE+0x00000008)
+#define ADR_MRX_MCAST_MK0_1 (MRX_REG_BASE+0x0000000c)
+#define ADR_MRX_MCAST_CTRL0 (MRX_REG_BASE+0x00000010)
+#define ADR_MRX_MCAST_TB1_0 (MRX_REG_BASE+0x00000014)
+#define ADR_MRX_MCAST_TB1_1 (MRX_REG_BASE+0x00000018)
+#define ADR_MRX_MCAST_MK1_0 (MRX_REG_BASE+0x0000001c)
+#define ADR_MRX_MCAST_MK1_1 (MRX_REG_BASE+0x00000020)
+#define ADR_MRX_MCAST_CTRL1 (MRX_REG_BASE+0x00000024)
+#define ADR_MRX_MCAST_TB2_0 (MRX_REG_BASE+0x00000028)
+#define ADR_MRX_MCAST_TB2_1 (MRX_REG_BASE+0x0000002c)
+#define ADR_MRX_MCAST_MK2_0 (MRX_REG_BASE+0x00000030)
+#define ADR_MRX_MCAST_MK2_1 (MRX_REG_BASE+0x00000034)
+#define ADR_MRX_MCAST_CTRL2 (MRX_REG_BASE+0x00000038)
+#define ADR_MRX_MCAST_TB3_0 (MRX_REG_BASE+0x0000003c)
+#define ADR_MRX_MCAST_TB3_1 (MRX_REG_BASE+0x00000040)
+#define ADR_MRX_MCAST_MK3_0 (MRX_REG_BASE+0x00000044)
+#define ADR_MRX_MCAST_MK3_1 (MRX_REG_BASE+0x00000048)
+#define ADR_MRX_MCAST_CTRL3 (MRX_REG_BASE+0x0000004c)
+#define ADR_MRX_PHY_INFO (MRX_REG_BASE+0x00000050)
+#define ADR_MRX_BA_DBG (MRX_REG_BASE+0x00000054)
+#define ADR_MRX_FLT_TB0 (MRX_REG_BASE+0x00000070)
+#define ADR_MRX_FLT_TB1 (MRX_REG_BASE+0x00000074)
+#define ADR_MRX_FLT_TB2 (MRX_REG_BASE+0x00000078)
+#define ADR_MRX_FLT_TB3 (MRX_REG_BASE+0x0000007c)
+#define ADR_MRX_FLT_TB4 (MRX_REG_BASE+0x00000080)
+#define ADR_MRX_FLT_TB5 (MRX_REG_BASE+0x00000084)
+#define ADR_MRX_FLT_TB6 (MRX_REG_BASE+0x00000088)
+#define ADR_MRX_FLT_TB7 (MRX_REG_BASE+0x0000008c)
+#define ADR_MRX_FLT_TB8 (MRX_REG_BASE+0x00000090)
+#define ADR_MRX_FLT_TB9 (MRX_REG_BASE+0x00000094)
+#define ADR_MRX_FLT_TB10 (MRX_REG_BASE+0x00000098)
+#define ADR_MRX_FLT_TB11 (MRX_REG_BASE+0x0000009c)
+#define ADR_MRX_FLT_TB12 (MRX_REG_BASE+0x000000a0)
+#define ADR_MRX_FLT_TB13 (MRX_REG_BASE+0x000000a4)
+#define ADR_MRX_FLT_TB14 (MRX_REG_BASE+0x000000a8)
+#define ADR_MRX_FLT_TB15 (MRX_REG_BASE+0x000000ac)
+#define ADR_MRX_FLT_EN0 (MRX_REG_BASE+0x000000b0)
+#define ADR_MRX_FLT_EN1 (MRX_REG_BASE+0x000000b4)
+#define ADR_MRX_FLT_EN2 (MRX_REG_BASE+0x000000b8)
+#define ADR_MRX_FLT_EN3 (MRX_REG_BASE+0x000000bc)
+#define ADR_MRX_FLT_EN4 (MRX_REG_BASE+0x000000c0)
+#define ADR_MRX_FLT_EN5 (MRX_REG_BASE+0x000000c4)
+#define ADR_MRX_FLT_EN6 (MRX_REG_BASE+0x000000c8)
+#define ADR_MRX_FLT_EN7 (MRX_REG_BASE+0x000000cc)
+#define ADR_MRX_FLT_EN8 (MRX_REG_BASE+0x000000d0)
+#define ADR_MRX_LEN_FLT (MRX_REG_BASE+0x000000d4)
+#define ADR_RX_FLOW_DATA (MRX_REG_BASE+0x000000e0)
+#define ADR_RX_FLOW_MNG (MRX_REG_BASE+0x000000e4)
+#define ADR_RX_FLOW_CTRL (MRX_REG_BASE+0x000000e8)
+#define ADR_RX_TIME_STAMP_CFG (MRX_REG_BASE+0x000000ec)
+#define ADR_DBG_FF_FULL (MRX_REG_BASE+0x000000f0)
+#define ADR_DBG_WFF_FULL (MRX_REG_BASE+0x000000f4)
+#define ADR_DBG_MB_FULL (MRX_REG_BASE+0x000000f8)
+#define ADR_BA_CTRL (MRX_REG_BASE+0x00000100)
+#define ADR_BA_TA_0 (MRX_REG_BASE+0x00000104)
+#define ADR_BA_TA_1 (MRX_REG_BASE+0x00000108)
+#define ADR_BA_TID (MRX_REG_BASE+0x0000010c)
+#define ADR_BA_ST_SEQ (MRX_REG_BASE+0x00000110)
+#define ADR_BA_SB0 (MRX_REG_BASE+0x00000114)
+#define ADR_BA_SB1 (MRX_REG_BASE+0x00000118)
+#define ADR_MRX_WATCH_DOG (MRX_REG_BASE+0x0000011c)
+#define ADR_ACK_GEN_EN (MRX_REG_BASE+0x00000120)
+#define ADR_ACK_GEN_PARA (MRX_REG_BASE+0x00000124)
+#define ADR_ACK_GEN_RA_0 (MRX_REG_BASE+0x00000128)
+#define ADR_ACK_GEN_RA_1 (MRX_REG_BASE+0x0000012c)
+#define ADR_MIB_LEN_FAIL (MRX_REG_BASE+0x00000130)
+#define ADR_TRAP_HW_ID (MRX_REG_BASE+0x00000134)
+#define ADR_ID_IN_USE (MRX_REG_BASE+0x00000138)
+#define ADR_MRX_ERR (MRX_REG_BASE+0x0000013c)
+#define ADR_WSID0_TID0_RX_SEQ (MRX_REG_BASE+0x00000140)
+#define ADR_WSID0_TID1_RX_SEQ (MRX_REG_BASE+0x00000144)
+#define ADR_WSID0_TID2_RX_SEQ (MRX_REG_BASE+0x00000148)
+#define ADR_WSID0_TID3_RX_SEQ (MRX_REG_BASE+0x0000014c)
+#define ADR_WSID0_TID4_RX_SEQ (MRX_REG_BASE+0x00000150)
+#define ADR_WSID0_TID5_RX_SEQ (MRX_REG_BASE+0x00000154)
+#define ADR_WSID0_TID6_RX_SEQ (MRX_REG_BASE+0x00000158)
+#define ADR_WSID0_TID7_RX_SEQ (MRX_REG_BASE+0x0000015c)
+#define ADR_WSID1_TID0_RX_SEQ (MRX_REG_BASE+0x00000170)
+#define ADR_WSID1_TID1_RX_SEQ (MRX_REG_BASE+0x00000174)
+#define ADR_WSID1_TID2_RX_SEQ (MRX_REG_BASE+0x00000178)
+#define ADR_WSID1_TID3_RX_SEQ (MRX_REG_BASE+0x0000017c)
+#define ADR_WSID1_TID4_RX_SEQ (MRX_REG_BASE+0x00000180)
+#define ADR_WSID1_TID5_RX_SEQ (MRX_REG_BASE+0x00000184)
+#define ADR_WSID1_TID6_RX_SEQ (MRX_REG_BASE+0x00000188)
+#define ADR_WSID1_TID7_RX_SEQ (MRX_REG_BASE+0x0000018c)
+#define ADR_HDR_ADDR_SEL (MRX_REG_BASE+0x00000190)
+#define ADR_FRAME_TYPE_CNTR_SET (MRX_REG_BASE+0x00000194)
+#define ADR_PHY_INFO (AMPDU_REG_BASE+0x00000000)
+#define ADR_AMPDU_SIG (AMPDU_REG_BASE+0x00000004)
+#define ADR_MIB_AMPDU (AMPDU_REG_BASE+0x00000008)
+#define ADR_LEN_FLT (AMPDU_REG_BASE+0x0000000c)
+#define ADR_MIB_DELIMITER (AMPDU_REG_BASE+0x00000010)
+#define ADR_MTX_INT_STS (MT_REG_CSR_BASE+0x00000000)
+#define ADR_MTX_INT_EN (MT_REG_CSR_BASE+0x00000004)
+#define ADR_MTX_MISC_EN (MT_REG_CSR_BASE+0x00000008)
+#define ADR_MTX_EDCCA_TOUT (MT_REG_CSR_BASE+0x00000010)
+#define ADR_MTX_BCN_INT_STS (MT_REG_CSR_BASE+0x000000a0)
+#define ADR_MTX_BCN_EN_INT (MT_REG_CSR_BASE+0x000000a4)
+#define ADR_MTX_BCN_EN_MISC (MT_REG_CSR_BASE+0x000000a8)
+#define ADR_MTX_BCN_MISC (MT_REG_CSR_BASE+0x000000ac)
+#define ADR_MTX_BCN_PRD (MT_REG_CSR_BASE+0x000000b0)
+#define ADR_MTX_BCN_TSF_L (MT_REG_CSR_BASE+0x000000b4)
+#define ADR_MTX_BCN_TSF_U (MT_REG_CSR_BASE+0x000000b8)
+#define ADR_MTX_BCN_CFG0 (MT_REG_CSR_BASE+0x000000bc)
+#define ADR_MTX_BCN_CFG1 (MT_REG_CSR_BASE+0x000000c0)
+#define ADR_MTX_STATUS (MT_REG_CSR_BASE+0x000000cc)
+#define ADR_MTX_DBG_CTRL (MT_REG_CSR_BASE+0x000000d0)
+#define ADR_MTX_DBG_DAT0 (MT_REG_CSR_BASE+0x000000d4)
+#define ADR_MTX_DBG_DAT1 (MT_REG_CSR_BASE+0x000000d8)
+#define ADR_MTX_DBG_DAT2 (MT_REG_CSR_BASE+0x000000dc)
+#define ADR_MTX_DUR_TOUT (MT_REG_CSR_BASE+0x000000e0)
+#define ADR_MTX_DUR_IFS (MT_REG_CSR_BASE+0x000000e4)
+#define ADR_MTX_DUR_SIFS_G (MT_REG_CSR_BASE+0x000000e8)
+#define ADR_MTX_DBG_DAT3 (MT_REG_CSR_BASE+0x000000ec)
+#define ADR_MTX_NAV (MT_REG_CSR_BASE+0x000000f0)
+#define ADR_MTX_MIB_WSID0 (MT_REG_CSR_BASE+0x000000f4)
+#define ADR_MTX_MIB_WSID1 (MT_REG_CSR_BASE+0x000000f8)
+#define ADR_MTX_DBG_DAT4 (MT_REG_CSR_BASE+0x000000fc)
+#define ADR_TXQ0_MTX_Q_MISC_EN (TXQ0_MT_Q_REG_CSR_BASE+0x00000000)
+#define ADR_TXQ0_MTX_Q_AIFSN (TXQ0_MT_Q_REG_CSR_BASE+0x00000004)
+#define ADR_TXQ0_MTX_Q_BKF_CNT (TXQ0_MT_Q_REG_CSR_BASE+0x00000008)
+#define ADR_TXQ0_MTX_Q_RC_LIMIT (TXQ0_MT_Q_REG_CSR_BASE+0x0000000c)
+#define ADR_TXQ0_MTX_Q_ID_MAP_L (TXQ0_MT_Q_REG_CSR_BASE+0x00000010)
+#define ADR_TXQ0_MTX_Q_TXOP_CH_THD (TXQ0_MT_Q_REG_CSR_BASE+0x00000014)
+#define ADR_TXQ0_MTX_Q_TXOP_OV_THD (TXQ0_MT_Q_REG_CSR_BASE+0x00000018)
+#define ADR_TXQ1_MTX_Q_MISC_EN (TXQ1_MT_Q_REG_CSR_BASE+0x00000000)
+#define ADR_TXQ1_MTX_Q_AIFSN (TXQ1_MT_Q_REG_CSR_BASE+0x00000004)
+#define ADR_TXQ1_MTX_Q_BKF_CNT (TXQ1_MT_Q_REG_CSR_BASE+0x00000008)
+#define ADR_TXQ1_MTX_Q_RC_LIMIT (TXQ1_MT_Q_REG_CSR_BASE+0x0000000c)
+#define ADR_TXQ1_MTX_Q_ID_MAP_L (TXQ1_MT_Q_REG_CSR_BASE+0x00000010)
+#define ADR_TXQ1_MTX_Q_TXOP_CH_THD (TXQ1_MT_Q_REG_CSR_BASE+0x00000014)
+#define ADR_TXQ1_MTX_Q_TXOP_OV_THD (TXQ1_MT_Q_REG_CSR_BASE+0x00000018)
+#define ADR_TXQ2_MTX_Q_MISC_EN (TXQ2_MT_Q_REG_CSR_BASE+0x00000000)
+#define ADR_TXQ2_MTX_Q_AIFSN (TXQ2_MT_Q_REG_CSR_BASE+0x00000004)
+#define ADR_TXQ2_MTX_Q_BKF_CNT (TXQ2_MT_Q_REG_CSR_BASE+0x00000008)
+#define ADR_TXQ2_MTX_Q_RC_LIMIT (TXQ2_MT_Q_REG_CSR_BASE+0x0000000c)
+#define ADR_TXQ2_MTX_Q_ID_MAP_L (TXQ2_MT_Q_REG_CSR_BASE+0x00000010)
+#define ADR_TXQ2_MTX_Q_TXOP_CH_THD (TXQ2_MT_Q_REG_CSR_BASE+0x00000014)
+#define ADR_TXQ2_MTX_Q_TXOP_OV_THD (TXQ2_MT_Q_REG_CSR_BASE+0x00000018)
+#define ADR_TXQ3_MTX_Q_MISC_EN (TXQ3_MT_Q_REG_CSR_BASE+0x00000000)
+#define ADR_TXQ3_MTX_Q_AIFSN (TXQ3_MT_Q_REG_CSR_BASE+0x00000004)
+#define ADR_TXQ3_MTX_Q_BKF_CNT (TXQ3_MT_Q_REG_CSR_BASE+0x00000008)
+#define ADR_TXQ3_MTX_Q_RC_LIMIT (TXQ3_MT_Q_REG_CSR_BASE+0x0000000c)
+#define ADR_TXQ3_MTX_Q_ID_MAP_L (TXQ3_MT_Q_REG_CSR_BASE+0x00000010)
+#define ADR_TXQ3_MTX_Q_TXOP_CH_THD (TXQ3_MT_Q_REG_CSR_BASE+0x00000014)
+#define ADR_TXQ3_MTX_Q_TXOP_OV_THD (TXQ3_MT_Q_REG_CSR_BASE+0x00000018)
+#define ADR_TXQ4_MTX_Q_MISC_EN (TXQ4_MT_Q_REG_CSR_BASE+0x00000000)
+#define ADR_TXQ4_MTX_Q_AIFSN (TXQ4_MT_Q_REG_CSR_BASE+0x00000004)
+#define ADR_TXQ4_MTX_Q_BKF_CNT (TXQ4_MT_Q_REG_CSR_BASE+0x00000008)
+#define ADR_TXQ4_MTX_Q_RC_LIMIT (TXQ4_MT_Q_REG_CSR_BASE+0x0000000c)
+#define ADR_TXQ4_MTX_Q_ID_MAP_L (TXQ4_MT_Q_REG_CSR_BASE+0x00000010)
+#define ADR_TXQ4_MTX_Q_TXOP_CH_THD (TXQ4_MT_Q_REG_CSR_BASE+0x00000014)
+#define ADR_TXQ4_MTX_Q_TXOP_OV_THD (TXQ4_MT_Q_REG_CSR_BASE+0x00000018)
+#define ADR_WSID0 (HIF_INFO_BASE+0x00000000)
+#define ADR_PEER_MAC0_0 (HIF_INFO_BASE+0x00000004)
+#define ADR_PEER_MAC0_1 (HIF_INFO_BASE+0x00000008)
+#define ADR_TX_ACK_POLICY_0_0 (HIF_INFO_BASE+0x0000000c)
+#define ADR_TX_SEQ_CTRL_0_0 (HIF_INFO_BASE+0x00000010)
+#define ADR_TX_ACK_POLICY_0_1 (HIF_INFO_BASE+0x00000014)
+#define ADR_TX_SEQ_CTRL_0_1 (HIF_INFO_BASE+0x00000018)
+#define ADR_TX_ACK_POLICY_0_2 (HIF_INFO_BASE+0x0000001c)
+#define ADR_TX_SEQ_CTRL_0_2 (HIF_INFO_BASE+0x00000020)
+#define ADR_TX_ACK_POLICY_0_3 (HIF_INFO_BASE+0x00000024)
+#define ADR_TX_SEQ_CTRL_0_3 (HIF_INFO_BASE+0x00000028)
+#define ADR_TX_ACK_POLICY_0_4 (HIF_INFO_BASE+0x0000002c)
+#define ADR_TX_SEQ_CTRL_0_4 (HIF_INFO_BASE+0x00000030)
+#define ADR_TX_ACK_POLICY_0_5 (HIF_INFO_BASE+0x00000034)
+#define ADR_TX_SEQ_CTRL_0_5 (HIF_INFO_BASE+0x00000038)
+#define ADR_TX_ACK_POLICY_0_6 (HIF_INFO_BASE+0x0000003c)
+#define ADR_TX_SEQ_CTRL_0_6 (HIF_INFO_BASE+0x00000040)
+#define ADR_TX_ACK_POLICY_0_7 (HIF_INFO_BASE+0x00000044)
+#define ADR_TX_SEQ_CTRL_0_7 (HIF_INFO_BASE+0x00000048)
+#define ADR_WSID1 (HIF_INFO_BASE+0x00000050)
+#define ADR_PEER_MAC1_0 (HIF_INFO_BASE+0x00000054)
+#define ADR_PEER_MAC1_1 (HIF_INFO_BASE+0x00000058)
+#define ADR_TX_ACK_POLICY_1_0 (HIF_INFO_BASE+0x0000005c)
+#define ADR_TX_SEQ_CTRL_1_0 (HIF_INFO_BASE+0x00000060)
+#define ADR_TX_ACK_POLICY_1_1 (HIF_INFO_BASE+0x00000064)
+#define ADR_TX_SEQ_CTRL_1_1 (HIF_INFO_BASE+0x00000068)
+#define ADR_TX_ACK_POLICY_1_2 (HIF_INFO_BASE+0x0000006c)
+#define ADR_TX_SEQ_CTRL_1_2 (HIF_INFO_BASE+0x00000070)
+#define ADR_TX_ACK_POLICY_1_3 (HIF_INFO_BASE+0x00000074)
+#define ADR_TX_SEQ_CTRL_1_3 (HIF_INFO_BASE+0x00000078)
+#define ADR_TX_ACK_POLICY_1_4 (HIF_INFO_BASE+0x0000007c)
+#define ADR_TX_SEQ_CTRL_1_4 (HIF_INFO_BASE+0x00000080)
+#define ADR_TX_ACK_POLICY_1_5 (HIF_INFO_BASE+0x00000084)
+#define ADR_TX_SEQ_CTRL_1_5 (HIF_INFO_BASE+0x00000088)
+#define ADR_TX_ACK_POLICY_1_6 (HIF_INFO_BASE+0x0000008c)
+#define ADR_TX_SEQ_CTRL_1_6 (HIF_INFO_BASE+0x00000090)
+#define ADR_TX_ACK_POLICY_1_7 (HIF_INFO_BASE+0x00000094)
+#define ADR_TX_SEQ_CTRL_1_7 (HIF_INFO_BASE+0x00000098)
+#define ADR_INFO0 (PHY_RATE_INFO_BASE+0x00000000)
+#define ADR_INFO1 (PHY_RATE_INFO_BASE+0x00000004)
+#define ADR_INFO2 (PHY_RATE_INFO_BASE+0x00000008)
+#define ADR_INFO3 (PHY_RATE_INFO_BASE+0x0000000c)
+#define ADR_INFO4 (PHY_RATE_INFO_BASE+0x00000010)
+#define ADR_INFO5 (PHY_RATE_INFO_BASE+0x00000014)
+#define ADR_INFO6 (PHY_RATE_INFO_BASE+0x00000018)
+#define ADR_INFO7 (PHY_RATE_INFO_BASE+0x0000001c)
+#define ADR_INFO8 (PHY_RATE_INFO_BASE+0x00000020)
+#define ADR_INFO9 (PHY_RATE_INFO_BASE+0x00000024)
+#define ADR_INFO10 (PHY_RATE_INFO_BASE+0x00000028)
+#define ADR_INFO11 (PHY_RATE_INFO_BASE+0x0000002c)
+#define ADR_INFO12 (PHY_RATE_INFO_BASE+0x00000030)
+#define ADR_INFO13 (PHY_RATE_INFO_BASE+0x00000034)
+#define ADR_INFO14 (PHY_RATE_INFO_BASE+0x00000038)
+#define ADR_INFO15 (PHY_RATE_INFO_BASE+0x0000003c)
+#define ADR_INFO16 (PHY_RATE_INFO_BASE+0x00000040)
+#define ADR_INFO17 (PHY_RATE_INFO_BASE+0x00000044)
+#define ADR_INFO18 (PHY_RATE_INFO_BASE+0x00000048)
+#define ADR_INFO19 (PHY_RATE_INFO_BASE+0x0000004c)
+#define ADR_INFO20 (PHY_RATE_INFO_BASE+0x00000050)
+#define ADR_INFO21 (PHY_RATE_INFO_BASE+0x00000054)
+#define ADR_INFO22 (PHY_RATE_INFO_BASE+0x00000058)
+#define ADR_INFO23 (PHY_RATE_INFO_BASE+0x0000005c)
+#define ADR_INFO24 (PHY_RATE_INFO_BASE+0x00000060)
+#define ADR_INFO25 (PHY_RATE_INFO_BASE+0x00000064)
+#define ADR_INFO26 (PHY_RATE_INFO_BASE+0x00000068)
+#define ADR_INFO27 (PHY_RATE_INFO_BASE+0x0000006c)
+#define ADR_INFO28 (PHY_RATE_INFO_BASE+0x00000070)
+#define ADR_INFO29 (PHY_RATE_INFO_BASE+0x00000074)
+#define ADR_INFO30 (PHY_RATE_INFO_BASE+0x00000078)
+#define ADR_INFO31 (PHY_RATE_INFO_BASE+0x0000007c)
+#define ADR_INFO32 (PHY_RATE_INFO_BASE+0x00000080)
+#define ADR_INFO33 (PHY_RATE_INFO_BASE+0x00000084)
+#define ADR_INFO34 (PHY_RATE_INFO_BASE+0x00000088)
+#define ADR_INFO35 (PHY_RATE_INFO_BASE+0x0000008c)
+#define ADR_INFO36 (PHY_RATE_INFO_BASE+0x00000090)
+#define ADR_INFO37 (PHY_RATE_INFO_BASE+0x00000094)
+#define ADR_INFO38 (PHY_RATE_INFO_BASE+0x00000098)
+#define ADR_INFO_MASK (PHY_RATE_INFO_BASE+0x0000009c)
+#define ADR_INFO_RATE_OFFSET (PHY_RATE_INFO_BASE+0x000000a0)
+#define ADR_INFO_IDX_ADDR (PHY_RATE_INFO_BASE+0x000000a4)
+#define ADR_INFO_LEN_ADDR (PHY_RATE_INFO_BASE+0x000000a8)
+#define ADR_IC_TIME_TAG_0 (PHY_RATE_INFO_BASE+0x000000ac)
+#define ADR_IC_TIME_TAG_1 (PHY_RATE_INFO_BASE+0x000000b0)
+#define ADR_PACKET_ID_ALLOCATION_PRIORITY (PHY_RATE_INFO_BASE+0x000000b4)
+#define ADR_MAC_MODE (MAC_GLB_SET_BASE+0x00000000)
+#define ADR_ALL_SOFTWARE_RESET (MAC_GLB_SET_BASE+0x00000004)
+#define ADR_ENG_SOFTWARE_RESET (MAC_GLB_SET_BASE+0x00000008)
+#define ADR_CSR_SOFTWARE_RESET (MAC_GLB_SET_BASE+0x0000000c)
+#define ADR_MAC_CLOCK_ENABLE (MAC_GLB_SET_BASE+0x00000010)
+#define ADR_MAC_ENGINE_CLOCK_ENABLE (MAC_GLB_SET_BASE+0x00000014)
+#define ADR_MAC_CSR_CLOCK_ENABLE (MAC_GLB_SET_BASE+0x00000018)
+#define ADR_GLBLE_SET (MAC_GLB_SET_BASE+0x0000001c)
+#define ADR_REASON_TRAP0 (MAC_GLB_SET_BASE+0x00000020)
+#define ADR_REASON_TRAP1 (MAC_GLB_SET_BASE+0x00000024)
+#define ADR_BSSID_0 (MAC_GLB_SET_BASE+0x00000028)
+#define ADR_BSSID_1 (MAC_GLB_SET_BASE+0x0000002c)
+#define ADR_SCRT_STATE (MAC_GLB_SET_BASE+0x0000002c)
+#define ADR_STA_MAC_0 (MAC_GLB_SET_BASE+0x00000030)
+#define ADR_STA_MAC_1 (MAC_GLB_SET_BASE+0x00000034)
+#define ADR_SCRT_SET (MAC_GLB_SET_BASE+0x00000038)
+#define ADR_BTCX0 (BTCX_REG_BASE+0x00000000)
+#define ADR_BTCX1 (BTCX_REG_BASE+0x00000004)
+#define ADR_SWITCH_CTL (BTCX_REG_BASE+0x00000008)
+#define ADR_MIB_EN (MIB_REG_BASE+0x00000000)
+#define ADR_MTX_WSID0_SUCC (MIB_REG_BASE+0x00000118)
+#define ADR_MTX_WSID0_FRM (MIB_REG_BASE+0x00000128)
+#define ADR_MTX_WSID0_RETRY (MIB_REG_BASE+0x00000138)
+#define ADR_MTX_WSID0_TOTAL (MIB_REG_BASE+0x00000148)
+#define ADR_MTX_GROUP (MIB_REG_BASE+0x0000016c)
+#define ADR_MTX_FAIL (MIB_REG_BASE+0x00000170)
+#define ADR_MTX_RETRY (MIB_REG_BASE+0x00000174)
+#define ADR_MTX_MULTI_RETRY (MIB_REG_BASE+0x00000178)
+#define ADR_MTX_RTS_SUCCESS (MIB_REG_BASE+0x0000017c)
+#define ADR_MTX_RTS_FAIL (MIB_REG_BASE+0x00000180)
+#define ADR_MTX_ACK_FAIL (MIB_REG_BASE+0x00000184)
+#define ADR_MTX_FRM (MIB_REG_BASE+0x00000188)
+#define ADR_MTX_ACK_TX (MIB_REG_BASE+0x0000018c)
+#define ADR_MTX_CTS_TX (MIB_REG_BASE+0x00000190)
+#define ADR_MRX_DUP_FRM (MIB_REG_BASE+0x00000194)
+#define ADR_MRX_FRG_FRM (MIB_REG_BASE+0x00000198)
+#define ADR_MRX_GROUP_FRM (MIB_REG_BASE+0x0000019c)
+#define ADR_MRX_FCS_ERR (MIB_REG_BASE+0x000001a0)
+#define ADR_MRX_FCS_SUCC (MIB_REG_BASE+0x000001a4)
+#define ADR_MRX_MISS (MIB_REG_BASE+0x000001a8)
+#define ADR_MRX_ALC_FAIL (MIB_REG_BASE+0x000001ac)
+#define ADR_MRX_DAT_NTF (MIB_REG_BASE+0x000001b0)
+#define ADR_MRX_RTS_NTF (MIB_REG_BASE+0x000001b4)
+#define ADR_MRX_CTS_NTF (MIB_REG_BASE+0x000001b8)
+#define ADR_MRX_ACK_NTF (MIB_REG_BASE+0x000001bc)
+#define ADR_MRX_BA_NTF (MIB_REG_BASE+0x000001c0)
+#define ADR_MRX_DATA_NTF (MIB_REG_BASE+0x000001c4)
+#define ADR_MRX_MNG_NTF (MIB_REG_BASE+0x000001c8)
+#define ADR_MRX_DAT_CRC_NTF (MIB_REG_BASE+0x000001cc)
+#define ADR_MRX_BAR_NTF (MIB_REG_BASE+0x000001d0)
+#define ADR_MRX_MB_MISS (MIB_REG_BASE+0x000001d4)
+#define ADR_MRX_NIDLE_MISS (MIB_REG_BASE+0x000001d8)
+#define ADR_MRX_CSR_NTF (MIB_REG_BASE+0x000001dc)
+#define ADR_DBG_Q0_FRM_SUCCESS (MIB_REG_BASE+0x00000218)
+#define ADR_DBG_Q0_FRM_FAIL (MIB_REG_BASE+0x0000021c)
+#define ADR_DBG_Q0_ACK_SUCCESS (MIB_REG_BASE+0x00000220)
+#define ADR_DBG_Q0_ACK_FAIL (MIB_REG_BASE+0x00000224)
+#define ADR_DBG_Q1_FRM_SUCCESS (MIB_REG_BASE+0x00000268)
+#define ADR_DBG_Q1_FRM_FAIL (MIB_REG_BASE+0x0000026c)
+#define ADR_DBG_Q1_ACK_SUCCESS (MIB_REG_BASE+0x00000270)
+#define ADR_DBG_Q1_ACK_FAIL (MIB_REG_BASE+0x00000274)
+#define ADR_DBG_Q2_FRM_SUCCESS (MIB_REG_BASE+0x00000318)
+#define ADR_DBG_Q2_FRM_FAIL (MIB_REG_BASE+0x0000031c)
+#define ADR_DBG_Q2_ACK_SUCCESS (MIB_REG_BASE+0x00000320)
+#define ADR_DBG_Q2_ACK_FAIL (MIB_REG_BASE+0x00000324)
+#define ADR_DBG_Q3_FRM_SUCCESS (MIB_REG_BASE+0x00000368)
+#define ADR_DBG_Q3_FRM_FAIL (MIB_REG_BASE+0x0000036c)
+#define ADR_DBG_Q3_ACK_SUCCESS (MIB_REG_BASE+0x00000370)
+#define ADR_DBG_Q3_ACK_FAIL (MIB_REG_BASE+0x00000374)
+#define ADR_MIB_SCRT_TKIP0 (MIB_REG_BASE+0x00000418)
+#define ADR_MIB_SCRT_TKIP1 (MIB_REG_BASE+0x0000041c)
+#define ADR_MIB_SCRT_TKIP2 (MIB_REG_BASE+0x00000420)
+#define ADR_MIB_SCRT_CCMP0 (MIB_REG_BASE+0x00000424)
+#define ADR_MIB_SCRT_CCMP1 (MIB_REG_BASE+0x00000428)
+#define ADR_DBG_LEN_CRC_FAIL (MIB_REG_BASE+0x00000468)
+#define ADR_DBG_LEN_ALC_FAIL (MIB_REG_BASE+0x0000046c)
+#define ADR_DBG_AMPDU_PASS (MIB_REG_BASE+0x00000470)
+#define ADR_DBG_AMPDU_FAIL (MIB_REG_BASE+0x00000474)
+#define ADR_ID_ALC_FAIL1 (MIB_REG_BASE+0x00000478)
+#define ADR_ID_ALC_FAIL2 (MIB_REG_BASE+0x0000047c)
+#define ADR_CBR_HARD_WIRE_PIN_REGISTER (CBR_A_REG_BASE+0x00110000)
+#define ADR_CBR_MANUAL_ENABLE_REGISTER (CBR_A_REG_BASE+0x00110004)
+#define ADR_CBR_LDO_REGISTER (CBR_A_REG_BASE+0x00110008)
+#define ADR_CBR_ABB_REGISTER_1 (CBR_A_REG_BASE+0x0011000c)
+#define ADR_CBR_ABB_REGISTER_2 (CBR_A_REG_BASE+0x00110010)
+#define ADR_CBR_TX_FE_REGISTER (CBR_A_REG_BASE+0x00110014)
+#define ADR_CBR_RX_FE_REGISTER_1 (CBR_A_REG_BASE+0x00110018)
+#define ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1 (CBR_A_REG_BASE+0x0011001c)
+#define ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2 (CBR_A_REG_BASE+0x00110020)
+#define ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3 (CBR_A_REG_BASE+0x00110024)
+#define ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4 (CBR_A_REG_BASE+0x00110028)
+#define ADR_CBR_RX_FSM_REGISTER (CBR_A_REG_BASE+0x0011002c)
+#define ADR_CBR_RX_ADC_REGISTER (CBR_A_REG_BASE+0x00110030)
+#define ADR_CBR_TX_DAC_REGISTER (CBR_A_REG_BASE+0x00110034)
+#define ADR_CBR_SX_ENABLE_RGISTER (CBR_A_REG_BASE+0x00110038)
+#define ADR_CBR_SYN_RGISTER_1 (CBR_A_REG_BASE+0x0011003c)
+#define ADR_CBR_SYN_RGISTER_2 (CBR_A_REG_BASE+0x00110040)
+#define ADR_CBR_SYN_PFD_CHP (CBR_A_REG_BASE+0x00110044)
+#define ADR_CBR_SYN_VCO_LOBF (CBR_A_REG_BASE+0x00110048)
+#define ADR_CBR_SYN_DIV_SDM_XOSC (CBR_A_REG_BASE+0x0011004c)
+#define ADR_CBR_SYN_LCK1 (CBR_A_REG_BASE+0x00110050)
+#define ADR_CBR_SYN_LCK2 (CBR_A_REG_BASE+0x00110054)
+#define ADR_CBR_DPLL_VCO_REGISTER (CBR_A_REG_BASE+0x00110058)
+#define ADR_CBR_DPLL_CP_PFD_REGISTER (CBR_A_REG_BASE+0x0011005c)
+#define ADR_CBR_DPLL_DIVIDER_REGISTER (CBR_A_REG_BASE+0x00110060)
+#define ADR_CBR_DCOC_IDAC_REGISTER1 (CBR_A_REG_BASE+0x00110064)
+#define ADR_CBR_DCOC_IDAC_REGISTER2 (CBR_A_REG_BASE+0x00110068)
+#define ADR_CBR_DCOC_IDAC_REGISTER3 (CBR_A_REG_BASE+0x0011006c)
+#define ADR_CBR_DCOC_IDAC_REGISTER4 (CBR_A_REG_BASE+0x00110070)
+#define ADR_CBR_DCOC_IDAC_REGISTER5 (CBR_A_REG_BASE+0x00110074)
+#define ADR_CBR_DCOC_IDAC_REGISTER6 (CBR_A_REG_BASE+0x00110078)
+#define ADR_CBR_DCOC_IDAC_REGISTER7 (CBR_A_REG_BASE+0x0011007c)
+#define ADR_CBR_DCOC_IDAC_REGISTER8 (CBR_A_REG_BASE+0x00110080)
+#define ADR_CBR_RCAL_REGISTER (CBR_A_REG_BASE+0x00110084)
+#define ADR_CBR_MANUAL_REGISTER (CBR_A_REG_BASE+0x00110088)
+#define ADR_CBR_TRX_DUMMY_REGISTER (CBR_A_REG_BASE+0x0011008c)
+#define ADR_CBR_SX_DUMMY_REGISTER (CBR_A_REG_BASE+0x00110090)
+#define ADR_CBR_READ_ONLY_FLAGS_1 (CBR_A_REG_BASE+0x00110094)
+#define ADR_CBR_READ_ONLY_FLAGS_2 (CBR_A_REG_BASE+0x00110098)
+#define ADR_CBR_RG_PKT_GEN_0 (CBR_A_REG_BASE+0x00120080)
+#define ADR_CBR_RG_PKT_GEN_1 (CBR_A_REG_BASE+0x00120084)
+#define ADR_CBR_RG_PKT_GEN_2 (CBR_A_REG_BASE+0x00120088)
+#define ADR_CBR_RG_INTEGRATION (CBR_A_REG_BASE+0x00120090)
+#define ADR_CBR_RG_PKT_GEN_TXCNT (CBR_A_REG_BASE+0x00120094)
+#define ADR_CBR_PATTERN_GEN (CBR_A_REG_BASE+0x001203f8)
+#define ADR_MB_CPU_INT (MB_REG_BASE+0x00000004)
+#define ADR_CPU_ID_TB0 (MB_REG_BASE+0x00000008)
+#define ADR_CPU_ID_TB1 (MB_REG_BASE+0x0000000c)
+#define ADR_CH0_TRIG_1 (MB_REG_BASE+0x00000010)
+#define ADR_CH0_TRIG_0 (MB_REG_BASE+0x00000010)
+#define ADR_CH0_PRI_TRIG (MB_REG_BASE+0x00000014)
+#define ADR_MCU_STATUS (MB_REG_BASE+0x00000018)
+#define ADR_RD_IN_FFCNT1 (MB_REG_BASE+0x0000001c)
+#define ADR_RD_IN_FFCNT2 (MB_REG_BASE+0x00000020)
+#define ADR_RD_FFIN_FULL (MB_REG_BASE+0x00000024)
+#define ADR_MBOX_HALT_CFG (MB_REG_BASE+0x0000002c)
+#define ADR_MB_DBG_CFG1 (MB_REG_BASE+0x00000030)
+#define ADR_MB_DBG_CFG2 (MB_REG_BASE+0x00000034)
+#define ADR_MB_DBG_CFG3 (MB_REG_BASE+0x00000038)
+#define ADR_MB_DBG_CFG4 (MB_REG_BASE+0x0000003c)
+#define ADR_MB_OUT_QUEUE_CFG (MB_REG_BASE+0x00000040)
+#define ADR_MB_OUT_QUEUE_FLUSH (MB_REG_BASE+0x00000044)
+#define ADR_RD_FFOUT_CNT1 (MB_REG_BASE+0x00000048)
+#define ADR_RD_FFOUT_CNT2 (MB_REG_BASE+0x0000004c)
+#define ADR_RD_FFOUT_CNT3 (MB_REG_BASE+0x00000050)
+#define ADR_RD_FFOUT_FULL (MB_REG_BASE+0x00000054)
+#define ADR_MB_THRESHOLD6 (MB_REG_BASE+0x0000006c)
+#define ADR_MB_THRESHOLD7 (MB_REG_BASE+0x00000070)
+#define ADR_MB_THRESHOLD8 (MB_REG_BASE+0x00000074)
+#define ADR_MB_THRESHOLD9 (MB_REG_BASE+0x00000078)
+#define ADR_MB_THRESHOLD10 (MB_REG_BASE+0x0000007c)
+#define ADR_MB_TRASH_CFG (MB_REG_BASE+0x00000080)
+#define ADR_MB_IN_FF_FLUSH (MB_REG_BASE+0x00000084)
+#define ADR_CPU_ID_TB2 (MB_REG_BASE+0x00000088)
+#define ADR_CPU_ID_TB3 (MB_REG_BASE+0x0000008c)
+#define ADR_PHY_IQ_LOG_CFG0 (MB_REG_BASE+0x00000090)
+#define ADR_PHY_IQ_LOG_CFG1 (MB_REG_BASE+0x00000094)
+#define ADR_PHY_IQ_LOG_LEN (MB_REG_BASE+0x00000098)
+#define ADR_PHY_IQ_LOG_PTR (MB_REG_BASE+0x0000009c)
+#define ADR_WR_ALC (ID_MNG_REG_BASE+0x00000000)
+#define ADR_GETID (ID_MNG_REG_BASE+0x00000000)
+#define ADR_CH_STA_PRI (ID_MNG_REG_BASE+0x00000004)
+#define ADR_RD_ID0 (ID_MNG_REG_BASE+0x00000008)
+#define ADR_RD_ID1 (ID_MNG_REG_BASE+0x0000000c)
+#define ADR_IMD_CFG (ID_MNG_REG_BASE+0x00000010)
+#define ADR_IMD_STA (ID_MNG_REG_BASE+0x00000014)
+#define ADR_ALC_STA (ID_MNG_REG_BASE+0x00000018)
+#define ADR_TRX_ID_COUNT (ID_MNG_REG_BASE+0x0000001c)
+#define ADR_TRX_ID_THRESHOLD (ID_MNG_REG_BASE+0x00000020)
+#define ADR_TX_ID0 (ID_MNG_REG_BASE+0x00000024)
+#define ADR_TX_ID1 (ID_MNG_REG_BASE+0x00000028)
+#define ADR_RX_ID0 (ID_MNG_REG_BASE+0x0000002c)
+#define ADR_RX_ID1 (ID_MNG_REG_BASE+0x00000030)
+#define ADR_RTN_STA (ID_MNG_REG_BASE+0x00000034)
+#define ADR_ID_LEN_THREADSHOLD1 (ID_MNG_REG_BASE+0x00000038)
+#define ADR_ID_LEN_THREADSHOLD2 (ID_MNG_REG_BASE+0x0000003c)
+#define ADR_CH_ARB_PRI (ID_MNG_REG_BASE+0x00000040)
+#define ADR_TX_ID_REMAIN_STATUS (ID_MNG_REG_BASE+0x00000044)
+#define ADR_ID_INFO_STA (ID_MNG_REG_BASE+0x00000048)
+#define ADR_TX_LIMIT_INTR (ID_MNG_REG_BASE+0x0000004c)
+#define ADR_TX_ID_ALL_INFO (ID_MNG_REG_BASE+0x00000050)
+#define ADR_RD_ID2 (ID_MNG_REG_BASE+0x00000054)
+#define ADR_RD_ID3 (ID_MNG_REG_BASE+0x00000058)
+#define ADR_TX_ID2 (ID_MNG_REG_BASE+0x0000005c)
+#define ADR_TX_ID3 (ID_MNG_REG_BASE+0x00000060)
+#define ADR_RX_ID2 (ID_MNG_REG_BASE+0x00000064)
+#define ADR_RX_ID3 (ID_MNG_REG_BASE+0x00000068)
+#define ADR_TX_ID_ALL_INFO2 (ID_MNG_REG_BASE+0x0000006c)
+#define ADR_TX_ID_ALL_INFO_A (ID_MNG_REG_BASE+0x00000070)
+#define ADR_TX_ID_ALL_INFO_B (ID_MNG_REG_BASE+0x00000074)
+#define ADR_TX_ID_REMAIN_STATUS2 (ID_MNG_REG_BASE+0x00000078)
+#define ADR_ALC_ID_INFO (ID_MNG_REG_BASE+0x0000007c)
+#define ADR_ALC_ID_INF1 (ID_MNG_REG_BASE+0x00000080)
+#define ADR_PHY_EN_0 (CSR_PHY_BASE+0x00000000)
+#define ADR_PHY_EN_1 (CSR_PHY_BASE+0x00000004)
+#define ADR_SVN_VERSION_REG (CSR_PHY_BASE+0x00000008)
+#define ADR_PHY_PKT_GEN_0 (CSR_PHY_BASE+0x0000000c)
+#define ADR_PHY_PKT_GEN_1 (CSR_PHY_BASE+0x00000010)
+#define ADR_PHY_PKT_GEN_2 (CSR_PHY_BASE+0x00000014)
+#define ADR_PHY_PKT_GEN_3 (CSR_PHY_BASE+0x00000018)
+#define ADR_PHY_PKT_GEN_4 (CSR_PHY_BASE+0x0000001c)
+#define ADR_PHY_REG_00 (CSR_PHY_BASE+0x00000020)
+#define ADR_PHY_REG_01 (CSR_PHY_BASE+0x0000002c)
+#define ADR_PHY_REG_02_AGC (CSR_PHY_BASE+0x00000030)
+#define ADR_PHY_REG_03_AGC (CSR_PHY_BASE+0x00000034)
+#define ADR_PHY_REG_04_AGC (CSR_PHY_BASE+0x00000038)
+#define ADR_PHY_REG_05_AGC (CSR_PHY_BASE+0x0000003c)
+#define ADR_PHY_REG_06_11B_DAGC (CSR_PHY_BASE+0x00000040)
+#define ADR_PHY_REG_07_11B_DAGC (CSR_PHY_BASE+0x00000044)
+#define ADR_PHY_REG_08_11GN_DAGC (CSR_PHY_BASE+0x00000048)
+#define ADR_PHY_REG_09_11GN_DAGC (CSR_PHY_BASE+0x0000004c)
+#define ADR_PHY_READ_REG_00_DIG_PWR (CSR_PHY_BASE+0x00000050)
+#define ADR_PHY_READ_REG_01_RF_GAIN_PWR (CSR_PHY_BASE+0x00000054)
+#define ADR_PHY_READ_REG_02_RF_GAIN_PWR (CSR_PHY_BASE+0x00000058)
+#define ADR_PHY_READ_REG_03_RF_GAIN_PWR (CSR_PHY_BASE+0x0000005c)
+#define ADR_PHY_REG_10_TX_DES (CSR_PHY_BASE+0x00000060)
+#define ADR_PHY_REG_11_TX_DES (CSR_PHY_BASE+0x00000064)
+#define ADR_PHY_REG_12_TX_DES (CSR_PHY_BASE+0x00000068)
+#define ADR_PHY_REG_13_RX_DES (CSR_PHY_BASE+0x0000006c)
+#define ADR_PHY_REG_14_RX_DES (CSR_PHY_BASE+0x00000070)
+#define ADR_PHY_REG_15_RX_DES (CSR_PHY_BASE+0x00000074)
+#define ADR_PHY_REG_16_TX_DES_EXCP (CSR_PHY_BASE+0x00000078)
+#define ADR_PHY_REG_17_TX_DES_EXCP (CSR_PHY_BASE+0x0000007c)
+#define ADR_PHY_REG_18_RSSI_SNR (CSR_PHY_BASE+0x00000080)
+#define ADR_PHY_REG_19_DAC_MANUAL (CSR_PHY_BASE+0x00000084)
+#define ADR_PHY_REG_20_MRX_CNT (CSR_PHY_BASE+0x00000088)
+#define ADR_PHY_REG_21_TRX_RAMP (CSR_PHY_BASE+0x00000094)
+#define ADR_PHY_REG_22_TRX_RAMP (CSR_PHY_BASE+0x00000098)
+#define ADR_PHY_REG_23_ANT (CSR_PHY_BASE+0x0000009c)
+#define ADR_PHY_REG_24_MTX_LEN_CNT (CSR_PHY_BASE+0x000000a0)
+#define ADR_PHY_REG_25_MTX_LEN_CNT (CSR_PHY_BASE+0x000000a4)
+#define ADR_PHY_REG_26_MRX_LEN_CNT (CSR_PHY_BASE+0x000000a8)
+#define ADR_PHY_REG_27_MRX_LEN_CNT (CSR_PHY_BASE+0x000000ac)
+#define ADR_PHY_READ_REG_04 (CSR_PHY_BASE+0x000000b0)
+#define ADR_PHY_READ_REG_05 (CSR_PHY_BASE+0x000000b4)
+#define ADR_PHY_REG_28_BIST (CSR_PHY_BASE+0x000000b8)
+#define ADR_PHY_READ_REG_06_BIST (CSR_PHY_BASE+0x000000d8)
+#define ADR_PHY_READ_REG_07_BIST (CSR_PHY_BASE+0x000000f0)
+#define ADR_PHY_REG_29_MTRX_MAC (CSR_PHY_BASE+0x000000fc)
+#define ADR_PHY_READ_REG_08_MTRX_MAC (CSR_PHY_BASE+0x00000100)
+#define ADR_PHY_READ_REG_09_MTRX_MAC (CSR_PHY_BASE+0x00000104)
+#define ADR_PHY_REG_30_TX_UP_FIL (CSR_PHY_BASE+0x00000108)
+#define ADR_PHY_REG_31_TX_UP_FIL (CSR_PHY_BASE+0x0000010c)
+#define ADR_PHY_REG_32_TX_UP_FIL (CSR_PHY_BASE+0x00000110)
+#define ADR_PHY_READ_TBUS (CSR_PHY_BASE+0x000003fc)
+#define ADR_TX_11B_FIL_COEF_00 (CSR_PHY_BASE+0x00001000)
+#define ADR_TX_11B_FIL_COEF_01 (CSR_PHY_BASE+0x00001004)
+#define ADR_TX_11B_FIL_COEF_02 (CSR_PHY_BASE+0x00001008)
+#define ADR_TX_11B_FIL_COEF_03 (CSR_PHY_BASE+0x0000100c)
+#define ADR_TX_11B_FIL_COEF_04 (CSR_PHY_BASE+0x00001010)
+#define ADR_TX_11B_FIL_COEF_05 (CSR_PHY_BASE+0x00001014)
+#define ADR_TX_11B_FIL_COEF_06 (CSR_PHY_BASE+0x00001018)
+#define ADR_TX_11B_FIL_COEF_07 (CSR_PHY_BASE+0x0000101c)
+#define ADR_TX_11B_FIL_COEF_08 (CSR_PHY_BASE+0x00001020)
+#define ADR_TX_11B_FIL_COEF_09 (CSR_PHY_BASE+0x00001024)
+#define ADR_TX_11B_FIL_COEF_10 (CSR_PHY_BASE+0x00001028)
+#define ADR_TX_11B_FIL_COEF_11 (CSR_PHY_BASE+0x0000102c)
+#define ADR_TX_11B_FIL_COEF_12 (CSR_PHY_BASE+0x00001030)
+#define ADR_TX_11B_FIL_COEF_13 (CSR_PHY_BASE+0x00001034)
+#define ADR_TX_11B_FIL_COEF_14 (CSR_PHY_BASE+0x00001038)
+#define ADR_TX_11B_FIL_COEF_15 (CSR_PHY_BASE+0x0000103c)
+#define ADR_TX_11B_FIL_COEF_16 (CSR_PHY_BASE+0x00001040)
+#define ADR_TX_11B_FIL_COEF_17 (CSR_PHY_BASE+0x00001044)
+#define ADR_TX_11B_FIL_COEF_18 (CSR_PHY_BASE+0x00001048)
+#define ADR_TX_11B_FIL_COEF_19 (CSR_PHY_BASE+0x0000104c)
+#define ADR_TX_11B_FIL_COEF_20 (CSR_PHY_BASE+0x00001050)
+#define ADR_TX_11B_FIL_COEF_21 (CSR_PHY_BASE+0x00001054)
+#define ADR_TX_11B_FIL_COEF_22 (CSR_PHY_BASE+0x00001058)
+#define ADR_TX_11B_FIL_COEF_23 (CSR_PHY_BASE+0x0000105c)
+#define ADR_TX_11B_FIL_COEF_24 (CSR_PHY_BASE+0x00001060)
+#define ADR_TX_11B_FIL_COEF_25 (CSR_PHY_BASE+0x00001064)
+#define ADR_TX_11B_FIL_COEF_26 (CSR_PHY_BASE+0x00001068)
+#define ADR_TX_11B_FIL_COEF_27 (CSR_PHY_BASE+0x0000106c)
+#define ADR_TX_11B_FIL_COEF_28 (CSR_PHY_BASE+0x00001070)
+#define ADR_TX_11B_FIL_COEF_29 (CSR_PHY_BASE+0x00001074)
+#define ADR_TX_11B_FIL_COEF_30 (CSR_PHY_BASE+0x00001078)
+#define ADR_TX_11B_FIL_COEF_31 (CSR_PHY_BASE+0x0000107c)
+#define ADR_TX_11B_FIL_COEF_32 (CSR_PHY_BASE+0x00001080)
+#define ADR_TX_11B_FIL_COEF_33 (CSR_PHY_BASE+0x00001084)
+#define ADR_TX_11B_FIL_COEF_34 (CSR_PHY_BASE+0x00001088)
+#define ADR_TX_11B_FIL_COEF_35 (CSR_PHY_BASE+0x0000108c)
+#define ADR_TX_11B_FIL_COEF_36 (CSR_PHY_BASE+0x00001090)
+#define ADR_TX_11B_FIL_COEF_37 (CSR_PHY_BASE+0x00001094)
+#define ADR_TX_11B_FIL_COEF_38 (CSR_PHY_BASE+0x00001098)
+#define ADR_TX_11B_FIL_COEF_39 (CSR_PHY_BASE+0x0000109c)
+#define ADR_TX_11B_FIL_COEF_40 (CSR_PHY_BASE+0x000010a0)
+#define ADR_TX_11B_PLCP (CSR_PHY_BASE+0x000010a4)
+#define ADR_TX_11B_RAMP (CSR_PHY_BASE+0x000010b4)
+#define ADR_TX_11B_EN_CNT_RST_N (CSR_PHY_BASE+0x000010d4)
+#define ADR_TX_11B_EN_CNT (CSR_PHY_BASE+0x000010d8)
+#define ADR_TX_11B_PKT_GEN_CNT (CSR_PHY_BASE+0x00001c00)
+#define ADR_RX_11B_DES_DLY (CSR_PHY_BASE+0x00002000)
+#define ADR_RX_11B_CCA_0 (CSR_PHY_BASE+0x00002004)
+#define ADR_RX_11B_CCA_1 (CSR_PHY_BASE+0x00002008)
+#define ADR_RX_11B_TR_KP_KI_0 (CSR_PHY_BASE+0x0000200c)
+#define ADR_RX_11B_TR_KP_KI_1 (CSR_PHY_BASE+0x00002010)
+#define ADR_RX_11B_CE_CNT_THRESHOLD (CSR_PHY_BASE+0x00002014)
+#define ADR_RX_11B_CE_MU_0 (CSR_PHY_BASE+0x00002018)
+#define ADR_RX_11B_CE_MU_1 (CSR_PHY_BASE+0x0000201c)
+#define ADR_RX_11B_EQ_MU_0 (CSR_PHY_BASE+0x00002020)
+#define ADR_RX_11B_EQ_MU_1 (CSR_PHY_BASE+0x00002024)
+#define ADR_RX_11B_EQ_CR_KP_KI (CSR_PHY_BASE+0x00002028)
+#define ADR_RX_11B_LPF_RATE (CSR_PHY_BASE+0x0000202c)
+#define ADR_RX_11B_CIT_CNT_THRESHOLD (CSR_PHY_BASE+0x00002030)
+#define ADR_RX_11B_EQ_CH_MAIN_TAP (CSR_PHY_BASE+0x00002034)
+#define ADR_RX_11B_SEARCH_CNT_TH (CSR_PHY_BASE+0x0000209c)
+#define ADR_RX_11B_CCA_CONTROL (CSR_PHY_BASE+0x000020a0)
+#define ADR_RX_11B_FREQUENCY_OFFSET (CSR_PHY_BASE+0x000023d4)
+#define ADR_RX_11B_SNR_RSSI (CSR_PHY_BASE+0x000023d8)
+#define ADR_RX_11B_SFD_CRC_CNT (CSR_PHY_BASE+0x000023e4)
+#define ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT (CSR_PHY_BASE+0x000023e8)
+#define ADR_RX_11B_PKT_CCA_AND_PKT_CNT (CSR_PHY_BASE+0x000023ec)
+#define ADR_RX_11B_SFD_FILED_0 (CSR_PHY_BASE+0x000023f0)
+#define ADR_RX_11B_SFD_FIELD_1 (CSR_PHY_BASE+0x000023f4)
+#define ADR_RX_11B_PKT_STAT_EN (CSR_PHY_BASE+0x000023f8)
+#define ADR_RX_11B_SOFT_RST (CSR_PHY_BASE+0x000023fc)
+#define ADR_TX_11GN_RAMP (CSR_PHY_BASE+0x000030a4)
+#define ADR_TX_11GN_PLCP (CSR_PHY_BASE+0x000030b8)
+#define ADR_TX_11GN_PKT_GEN_CNT (CSR_PHY_BASE+0x00003c00)
+#define ADR_TX_11GN_PLCP_CRC_ERR_CNT (CSR_PHY_BASE+0x00003c08)
+#define ADR_RX_11GN_DES_DLY (CSR_PHY_BASE+0x00004000)
+#define ADR_RX_11GN_TR_0 (CSR_PHY_BASE+0x00004004)
+#define ADR_RX_11GN_TR_1 (CSR_PHY_BASE+0x00004008)
+#define ADR_RX_11GN_TR_2 (CSR_PHY_BASE+0x0000400c)
+#define ADR_RX_11GN_CCA_0 (CSR_PHY_BASE+0x00004010)
+#define ADR_RX_11GN_CCA_1 (CSR_PHY_BASE+0x00004014)
+#define ADR_RX_11GN_CCA_2 (CSR_PHY_BASE+0x00004018)
+#define ADR_RX_11GN_CCA_FFT_SCALE (CSR_PHY_BASE+0x0000401c)
+#define ADR_RX_11GN_SOFT_DEMAP_0 (CSR_PHY_BASE+0x00004020)
+#define ADR_RX_11GN_SOFT_DEMAP_1 (CSR_PHY_BASE+0x00004024)
+#define ADR_RX_11GN_SOFT_DEMAP_2 (CSR_PHY_BASE+0x00004028)
+#define ADR_RX_11GN_SOFT_DEMAP_3 (CSR_PHY_BASE+0x0000402c)
+#define ADR_RX_11GN_SOFT_DEMAP_4 (CSR_PHY_BASE+0x00004030)
+#define ADR_RX_11GN_SOFT_DEMAP_5 (CSR_PHY_BASE+0x00004034)
+#define ADR_RX_11GN_SYM_BOUND_0 (CSR_PHY_BASE+0x00004038)
+#define ADR_RX_11GN_SYM_BOUND_1 (CSR_PHY_BASE+0x0000409c)
+#define ADR_RX_11GN_CCA_PWR (CSR_PHY_BASE+0x000040c0)
+#define ADR_RX_11GN_CCA_CNT (CSR_PHY_BASE+0x000040c4)
+#define ADR_RX_11GN_CCA_ATCOR_RE_CHECK (CSR_PHY_BASE+0x000040c8)
+#define ADR_RX_11GN_VTB_TB (CSR_PHY_BASE+0x00004130)
+#define ADR_RX_11GN_ERR_UPDATE (CSR_PHY_BASE+0x00004164)
+#define ADR_RX_11GN_SHORT_GI (CSR_PHY_BASE+0x00004180)
+#define ADR_RX_11GN_CHANNEL_UPDATE (CSR_PHY_BASE+0x00004188)
+#define ADR_RX_11GN_PKT_FORMAT_0 (CSR_PHY_BASE+0x00004190)
+#define ADR_RX_11GN_PKT_FORMAT_1 (CSR_PHY_BASE+0x00004194)
+#define ADR_RX_11GN_TX_TIME (CSR_PHY_BASE+0x00004380)
+#define ADR_RX_11GN_STBC_TR_KP_KI (CSR_PHY_BASE+0x00004384)
+#define ADR_RX_11GN_BIST_0 (CSR_PHY_BASE+0x00004388)
+#define ADR_RX_11GN_BIST_1 (CSR_PHY_BASE+0x0000438c)
+#define ADR_RX_11GN_BIST_2 (CSR_PHY_BASE+0x000043c0)
+#define ADR_RX_11GN_BIST_3 (CSR_PHY_BASE+0x000043c4)
+#define ADR_RX_11GN_BIST_4 (CSR_PHY_BASE+0x000043c8)
+#define ADR_RX_11GN_BIST_5 (CSR_PHY_BASE+0x000043cc)
+#define ADR_RX_11GN_SPECTRUM_ANALYZER (CSR_PHY_BASE+0x000043d4)
+#define ADR_RX_11GN_READ_0 (CSR_PHY_BASE+0x000043d8)
+#define ADR_RX_11GN_FREQ_OFFSET (CSR_PHY_BASE+0x000043dc)
+#define ADR_RX_11GN_SIGNAL_FIELD_0 (CSR_PHY_BASE+0x000043e0)
+#define ADR_RX_11GN_SIGNAL_FIELD_1 (CSR_PHY_BASE+0x000043e4)
+#define ADR_RX_11GN_PKT_ERR_CNT (CSR_PHY_BASE+0x000043e8)
+#define ADR_RX_11GN_PKT_CCA_AND_PKT_CNT (CSR_PHY_BASE+0x000043ec)
+#define ADR_RX_11GN_SERVICE_LENGTH_FIELD (CSR_PHY_BASE+0x000043f0)
+#define ADR_RX_11GN_RATE (CSR_PHY_BASE+0x000043f4)
+#define ADR_RX_11GN_STAT_EN (CSR_PHY_BASE+0x000043f8)
+#define ADR_RX_11GN_SOFT_RST (CSR_PHY_BASE+0x000043fc)
+#define ADR_RF_CONTROL_0 (CSR_PHY_BASE+0x00007000)
+#define ADR_RF_CONTROL_1 (CSR_PHY_BASE+0x00007004)
+#define ADR_TX_IQ_CONTROL_0 (CSR_PHY_BASE+0x00007040)
+#define ADR_TX_IQ_CONTROL_1 (CSR_PHY_BASE+0x00007044)
+#define ADR_TX_IQ_CONTROL_2 (CSR_PHY_BASE+0x00007048)
+#define ADR_TX_COMPENSATION_CONTROL (CSR_PHY_BASE+0x0000704c)
+#define ADR_RX_COMPENSATION_CONTROL (CSR_PHY_BASE+0x00007050)
+#define ADR_RX_OBSERVATION_CIRCUIT_0 (CSR_PHY_BASE+0x00007058)
+#define ADR_RX_OBSERVATION_CIRCUIT_1 (CSR_PHY_BASE+0x0000705c)
+#define ADR_RX_OBSERVATION_CIRCUIT_2 (CSR_PHY_BASE+0x00007060)
+#define ADR_RX_OBSERVATION_CIRCUIT_3 (CSR_PHY_BASE+0x00007064)
+#define ADR_RF_IQ_CONTROL_0 (CSR_PHY_BASE+0x0000706c)
+#define ADR_RF_IQ_CONTROL_1 (CSR_PHY_BASE+0x00007070)
+#define ADR_RF_IQ_CONTROL_2 (CSR_PHY_BASE+0x00007074)
+#define ADR_RF_IQ_CONTROL_3 (CSR_PHY_BASE+0x00007078)
+#define ADR_DPD_CONTROL (CSR_PHY_BASE+0x0000711c)
+#define ADR_DPD_GAIN_TABLE_0 (CSR_PHY_BASE+0x00007120)
+#define ADR_DPD_GAIN_TABLE_1 (CSR_PHY_BASE+0x00007124)
+#define ADR_DPD_GAIN_TABLE_2 (CSR_PHY_BASE+0x00007128)
+#define ADR_DPD_GAIN_TABLE_3 (CSR_PHY_BASE+0x00007130)
+#define ADR_DPD_GAIN_TABLE_4 (CSR_PHY_BASE+0x00007134)
+#define ADR_DPD_GAIN_TABLE_5 (CSR_PHY_BASE+0x00007138)
+#define ADR_DPD_GAIN_TABLE_6 (CSR_PHY_BASE+0x0000713c)
+#define ADR_DPD_GAIN_TABLE_7 (CSR_PHY_BASE+0x00007140)
+#define ADR_DPD_GAIN_TABLE_8 (CSR_PHY_BASE+0x00007144)
+#define ADR_DPD_GAIN_TABLE_9 (CSR_PHY_BASE+0x00007148)
+#define ADR_DPD_GAIN_TABLE_A (CSR_PHY_BASE+0x0000714c)
+#define ADR_DPD_GAIN_TABLE_B (CSR_PHY_BASE+0x00007150)
+#define ADR_DPD_GAIN_TABLE_C (CSR_PHY_BASE+0x00007154)
+#define ADR_DPD_PH_TABLE_0 (CSR_PHY_BASE+0x00007170)
+#define ADR_DPD_PH_TABLE_1 (CSR_PHY_BASE+0x00007174)
+#define ADR_DPD_PH_TABLE_2 (CSR_PHY_BASE+0x00007178)
+#define ADR_DPD_PH_TABLE_3 (CSR_PHY_BASE+0x00007180)
+#define ADR_DPD_PH_TABLE_4 (CSR_PHY_BASE+0x00007184)
+#define ADR_DPD_PH_TABLE_5 (CSR_PHY_BASE+0x00007188)
+#define ADR_DPD_PH_TABLE_6 (CSR_PHY_BASE+0x0000718c)
+#define ADR_DPD_PH_TABLE_7 (CSR_PHY_BASE+0x00007190)
+#define ADR_DPD_PH_TABLE_8 (CSR_PHY_BASE+0x00007194)
+#define ADR_DPD_PH_TABLE_9 (CSR_PHY_BASE+0x00007198)
+#define ADR_DPD_PH_TABLE_A (CSR_PHY_BASE+0x0000719c)
+#define ADR_DPD_PH_TABLE_B (CSR_PHY_BASE+0x000071a0)
+#define ADR_DPD_PH_TABLE_C (CSR_PHY_BASE+0x000071a4)
+#define ADR_DPD_GAIN_ESTIMATION_0 (CSR_PHY_BASE+0x000071b0)
+#define ADR_DPD_GAIN_ESTIMATION_1 (CSR_PHY_BASE+0x000071b4)
+#define ADR_DPD_GAIN_ESTIMATION_2 (CSR_PHY_BASE+0x000071b8)
+#define ADR_TX_GAIN_FACTOR (CSR_PHY_BASE+0x000071bc)
+#define ADR_HARD_WIRE_PIN_REGISTER (CSR_RF_BASE+0x00000000)
+#define ADR_MANUAL_ENABLE_REGISTER (CSR_RF_BASE+0x00000004)
+#define ADR_LDO_REGISTER (CSR_RF_BASE+0x00000008)
+#define ADR_ABB_REGISTER_1 (CSR_RF_BASE+0x0000000c)
+#define ADR_ABB_REGISTER_2 (CSR_RF_BASE+0x00000010)
+#define ADR_TX_FE_REGISTER (CSR_RF_BASE+0x00000014)
+#define ADR_RX_FE_REGISTER_1 (CSR_RF_BASE+0x00000018)
+#define ADR_RX_FE_GAIN_DECODER_REGISTER_1 (CSR_RF_BASE+0x0000001c)
+#define ADR_RX_FE_GAIN_DECODER_REGISTER_2 (CSR_RF_BASE+0x00000020)
+#define ADR_RX_FE_GAIN_DECODER_REGISTER_3 (CSR_RF_BASE+0x00000024)
+#define ADR_RX_FE_GAIN_DECODER_REGISTER_4 (CSR_RF_BASE+0x00000028)
+#define ADR_RX_TX_FSM_REGISTER (CSR_RF_BASE+0x0000002c)
+#define ADR_RX_ADC_REGISTER (CSR_RF_BASE+0x00000030)
+#define ADR_TX_DAC_REGISTER (CSR_RF_BASE+0x00000034)
+#define ADR_SX_ENABLE_REGISTER (CSR_RF_BASE+0x00000038)
+#define ADR_SYN_REGISTER_1 (CSR_RF_BASE+0x0000003c)
+#define ADR_SYN_REGISTER_2 (CSR_RF_BASE+0x00000040)
+#define ADR_SYN_PFD_CHP (CSR_RF_BASE+0x00000044)
+#define ADR_SYN_VCO_LOBF (CSR_RF_BASE+0x00000048)
+#define ADR_SYN_DIV_SDM_XOSC (CSR_RF_BASE+0x0000004c)
+#define ADR_SYN_KVCO_XO_FINE_TUNE_CBANK (CSR_RF_BASE+0x00000050)
+#define ADR_SYN_LCK_VT (CSR_RF_BASE+0x00000054)
+#define ADR_DPLL_VCO_REGISTER (CSR_RF_BASE+0x00000058)
+#define ADR_DPLL_CP_PFD_REGISTER (CSR_RF_BASE+0x0000005c)
+#define ADR_DPLL_DIVIDER_REGISTER (CSR_RF_BASE+0x00000060)
+#define ADR_DCOC_IDAC_REGISTER1 (CSR_RF_BASE+0x00000064)
+#define ADR_DCOC_IDAC_REGISTER2 (CSR_RF_BASE+0x00000068)
+#define ADR_DCOC_IDAC_REGISTER3 (CSR_RF_BASE+0x0000006c)
+#define ADR_DCOC_IDAC_REGISTER4 (CSR_RF_BASE+0x00000070)
+#define ADR_DCOC_IDAC_REGISTER5 (CSR_RF_BASE+0x00000074)
+#define ADR_DCOC_IDAC_REGISTER6 (CSR_RF_BASE+0x00000078)
+#define ADR_DCOC_IDAC_REGISTER7 (CSR_RF_BASE+0x0000007c)
+#define ADR_DCOC_IDAC_REGISTER8 (CSR_RF_BASE+0x00000080)
+#define ADR_RCAL_REGISTER (CSR_RF_BASE+0x00000084)
+#define ADR_SX_LCK_BIN_REGISTERS_I (CSR_RF_BASE+0x00000088)
+#define ADR_TRX_DUMMY_REGISTER (CSR_RF_BASE+0x0000008c)
+#define ADR_SX_DUMMY_REGISTER (CSR_RF_BASE+0x00000090)
+#define ADR_READ_ONLY_FLAGS_1 (CSR_RF_BASE+0x00000094)
+#define ADR_READ_ONLY_FLAGS_2 (CSR_RF_BASE+0x00000098)
+#define ADR_DPLL_FB_DIVIDER_REGISTERS_I (CSR_RF_BASE+0x0000009c)
+#define ADR_DPLL_FB_DIVIDER_REGISTERS_II (CSR_RF_BASE+0x000000a0)
+#define ADR_SX_LCK_BIN_REGISTERS_II (CSR_RF_BASE+0x000000a4)
+#define ADR_RC_OSC_32K_CAL_REGISTERS (CSR_RF_BASE+0x000000a8)
+#define ADR_RF_D_DIGITAL_DEBUG_PORT_REGISTER (CSR_RF_BASE+0x000000ac)
+#define ADR_MMU_CTRL (MMU_REG_BASE+0x00000000)
+#define ADR_HS_CTRL (MMU_REG_BASE+0x00000004)
+#define ADR_CPU_POR0_7 (MMU_REG_BASE+0x00000008)
+#define ADR_CPU_POR8_F (MMU_REG_BASE+0x0000000c)
+#define ADR_REG_LEN_CTRL (MMU_REG_BASE+0x00000010)
+#define ADR_DMN_READ_BYPASS (MMU_REG_BASE+0x00000014)
+#define ADR_ALC_RLS_ABORT (MMU_REG_BASE+0x00000018)
+#define ADR_DEBUG_CTL (MMU_REG_BASE+0x00000020)
+#define ADR_DEBUG_OUT (MMU_REG_BASE+0x00000024)
+#define ADR_MMU_STATUS (MMU_REG_BASE+0x00000028)
+#define ADR_DMN_STATUS (MMU_REG_BASE+0x0000002c)
+#define ADR_TAG_STATUS (MMU_REG_BASE+0x00000030)
+#define ADR_DMN_MCU_STATUS (MMU_REG_BASE+0x00000034)
+#define ADR_MB_IDTBL_0_STATUS (MMU_REG_BASE+0x00000040)
+#define ADR_MB_IDTBL_1_STATUS (MMU_REG_BASE+0x00000044)
+#define ADR_MB_IDTBL_2_STATUS (MMU_REG_BASE+0x00000048)
+#define ADR_MB_IDTBL_3_STATUS (MMU_REG_BASE+0x0000004c)
+#define ADR_PKT_IDTBL_0_STATUS (MMU_REG_BASE+0x00000050)
+#define ADR_PKT_IDTBL_1_STATUS (MMU_REG_BASE+0x00000054)
+#define ADR_PKT_IDTBL_2_STATUS (MMU_REG_BASE+0x00000058)
+#define ADR_PKT_IDTBL_3_STATUS (MMU_REG_BASE+0x0000005c)
+#define ADR_DMN_IDTBL_0_STATUS (MMU_REG_BASE+0x00000060)
+#define ADR_DMN_IDTBL_1_STATUS (MMU_REG_BASE+0x00000064)
+#define ADR_DMN_IDTBL_2_STATUS (MMU_REG_BASE+0x00000068)
+#define ADR_DMN_IDTBL_3_STATUS (MMU_REG_BASE+0x0000006c)
+#define ADR_MB_NEQID_0_STATUS (MMU_REG_BASE+0x00000070)
+#define ADR_MB_NEQID_1_STATUS (MMU_REG_BASE+0x00000074)
+#define ADR_MB_NEQID_2_STATUS (MMU_REG_BASE+0x00000078)
+#define ADR_MB_NEQID_3_STATUS (MMU_REG_BASE+0x0000007c)
+#define ADR_PKT_NEQID_0_STATUS (MMU_REG_BASE+0x00000080)
+#define ADR_PKT_NEQID_1_STATUS (MMU_REG_BASE+0x00000084)
+#define ADR_PKT_NEQID_2_STATUS (MMU_REG_BASE+0x00000088)
+#define ADR_PKT_NEQID_3_STATUS (MMU_REG_BASE+0x0000008c)
+#define ADR_ALC_NOCHG_ID_STATUS (MMU_REG_BASE+0x00000090)
+#define ADR_TAG_SRAM0_F_STATUS_0 (MMU_REG_BASE+0x000000a0)
+#define ADR_TAG_SRAM0_F_STATUS_1 (MMU_REG_BASE+0x000000a4)
+#define ADR_TAG_SRAM0_F_STATUS_2 (MMU_REG_BASE+0x000000a8)
+#define ADR_TAG_SRAM0_F_STATUS_3 (MMU_REG_BASE+0x000000ac)
+#define ADR_TAG_SRAM0_F_STATUS_4 (MMU_REG_BASE+0x000000b0)
+#define ADR_TAG_SRAM0_F_STATUS_5 (MMU_REG_BASE+0x000000b4)
+#define ADR_TAG_SRAM0_F_STATUS_6 (MMU_REG_BASE+0x000000b8)
+#define ADR_TAG_SRAM0_F_STATUS_7 (MMU_REG_BASE+0x000000bc)
+#define GET_MCU_ENABLE (((REG32(ADR_BRG_SW_RST)) & 0x00000001 ) >> 0)
+#define GET_MAC_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000002 ) >> 1)
+#define GET_MCU_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000004 ) >> 2)
+#define GET_SDIO_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000008 ) >> 3)
+#define GET_SPI_SLV_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000010 ) >> 4)
+#define GET_UART_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000020 ) >> 5)
+#define GET_DMA_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000040 ) >> 6)
+#define GET_WDT_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000080 ) >> 7)
+#define GET_I2C_SLV_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000100 ) >> 8)
+#define GET_INT_CTL_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000200 ) >> 9)
+#define GET_BTCX_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000400 ) >> 10)
+#define GET_GPIO_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00000800 ) >> 11)
+#define GET_US0TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00001000 ) >> 12)
+#define GET_US1TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00002000 ) >> 13)
+#define GET_US2TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00004000 ) >> 14)
+#define GET_US3TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00008000 ) >> 15)
+#define GET_MS0TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00010000 ) >> 16)
+#define GET_MS1TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00020000 ) >> 17)
+#define GET_MS2TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00040000 ) >> 18)
+#define GET_MS3TMR_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00080000 ) >> 19)
+#define GET_RF_BB_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00100000 ) >> 20)
+#define GET_SYS_ALL_RST (((REG32(ADR_BRG_SW_RST)) & 0x00200000 ) >> 21)
+#define GET_DAT_UART_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00400000 ) >> 22)
+#define GET_I2C_MST_SW_RST (((REG32(ADR_BRG_SW_RST)) & 0x00800000 ) >> 23)
+#define GET_RG_REBOOT (((REG32(ADR_BOOT)) & 0x00000001 ) >> 0)
+#define GET_TRAP_IMG_FLS (((REG32(ADR_BOOT)) & 0x00010000 ) >> 16)
+#define GET_TRAP_REBOOT (((REG32(ADR_BOOT)) & 0x00020000 ) >> 17)
+#define GET_TRAP_BOOT_FLS (((REG32(ADR_BOOT)) & 0x00040000 ) >> 18)
+#define GET_CHIP_ID_31_0 (((REG32(ADR_CHIP_ID_0)) & 0xffffffff ) >> 0)
+#define GET_CHIP_ID_63_32 (((REG32(ADR_CHIP_ID_1)) & 0xffffffff ) >> 0)
+#define GET_CHIP_ID_95_64 (((REG32(ADR_CHIP_ID_2)) & 0xffffffff ) >> 0)
+#define GET_CHIP_ID_127_96 (((REG32(ADR_CHIP_ID_3)) & 0xffffffff ) >> 0)
+#define GET_CK_SEL_1_0 (((REG32(ADR_CLOCK_SELECTION)) & 0x00000003 ) >> 0)
+#define GET_CK_SEL_2 (((REG32(ADR_CLOCK_SELECTION)) & 0x00000004 ) >> 2)
+#define GET_SYS_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000001 ) >> 0)
+#define GET_MAC_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000002 ) >> 1)
+#define GET_MCU_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000004 ) >> 2)
+#define GET_SDIO_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000008 ) >> 3)
+#define GET_SPI_SLV_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000010 ) >> 4)
+#define GET_UART_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000020 ) >> 5)
+#define GET_DMA_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000040 ) >> 6)
+#define GET_WDT_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000080 ) >> 7)
+#define GET_I2C_SLV_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000100 ) >> 8)
+#define GET_INT_CTL_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000200 ) >> 9)
+#define GET_BTCX_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000400 ) >> 10)
+#define GET_GPIO_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00000800 ) >> 11)
+#define GET_US0TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00001000 ) >> 12)
+#define GET_US1TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00002000 ) >> 13)
+#define GET_US2TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00004000 ) >> 14)
+#define GET_US3TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00008000 ) >> 15)
+#define GET_MS0TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00010000 ) >> 16)
+#define GET_MS1TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00020000 ) >> 17)
+#define GET_MS2TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00040000 ) >> 18)
+#define GET_MS3TMR_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00080000 ) >> 19)
+#define GET_BIST_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00100000 ) >> 20)
+#define GET_I2C_MST_CLK_EN (((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0x00800000 ) >> 23)
+#define GET_BTCX_CSR_CLK_EN (((REG32(ADR_SYS_CSR_CLOCK_ENABLE)) & 0x00000400 ) >> 10)
+#define GET_MCU_DBG_SEL (((REG32(ADR_MCU_DBG_SEL)) & 0x0000003f ) >> 0)
+#define GET_MCU_STOP_NOGRANT (((REG32(ADR_MCU_DBG_SEL)) & 0x00000100 ) >> 8)
+#define GET_MCU_STOP_ANYTIME (((REG32(ADR_MCU_DBG_SEL)) & 0x00000200 ) >> 9)
+#define GET_MCU_DBG_DATA (((REG32(ADR_MCU_DBG_DATA)) & 0xffffffff ) >> 0)
+#define GET_AHB_SW_RST (((REG32(ADR_AHB_BRG_STATUS)) & 0x00000001 ) >> 0)
+#define GET_AHB_ERR_RST (((REG32(ADR_AHB_BRG_STATUS)) & 0x00000002 ) >> 1)
+#define GET_REG_AHB_DEBUG_MX (((REG32(ADR_AHB_BRG_STATUS)) & 0x00000030 ) >> 4)
+#define GET_REG_PKT_W_NBRT (((REG32(ADR_AHB_BRG_STATUS)) & 0x00000100 ) >> 8)
+#define GET_REG_PKT_R_NBRT (((REG32(ADR_AHB_BRG_STATUS)) & 0x00000200 ) >> 9)
+#define GET_IQ_SRAM_SEL_0 (((REG32(ADR_AHB_BRG_STATUS)) & 0x00001000 ) >> 12)
+#define GET_IQ_SRAM_SEL_1 (((REG32(ADR_AHB_BRG_STATUS)) & 0x00002000 ) >> 13)
+#define GET_IQ_SRAM_SEL_2 (((REG32(ADR_AHB_BRG_STATUS)) & 0x00004000 ) >> 14)
+#define GET_AHB_STATUS (((REG32(ADR_AHB_BRG_STATUS)) & 0xffff0000 ) >> 16)
+#define GET_PARALLEL_DR (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000001 ) >> 0)
+#define GET_MBRUN (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000010 ) >> 4)
+#define GET_SHIFT_DR (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000100 ) >> 8)
+#define GET_MODE_REG_SI (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000200 ) >> 9)
+#define GET_SIMULATION_MODE (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000400 ) >> 10)
+#define GET_DBIST_MODE (((REG32(ADR_BIST_BIST_CTRL)) & 0x00000800 ) >> 11)
+#define GET_MODE_REG_IN (((REG32(ADR_BIST_MODE_REG_IN)) & 0x001fffff ) >> 0)
+#define GET_MODE_REG_OUT_MCU (((REG32(ADR_BIST_MODE_REG_OUT)) & 0x001fffff ) >> 0)
+#define GET_MODE_REG_SO_MCU (((REG32(ADR_BIST_MODE_REG_OUT)) & 0x80000000 ) >> 31)
+#define GET_MONITOR_BUS_MCU_31_0 (((REG32(ADR_BIST_MONITOR_BUS_LSB)) & 0xffffffff ) >> 0)
+#define GET_MONITOR_BUS_MCU_33_32 (((REG32(ADR_BIST_MONITOR_BUS_MSB)) & 0x00000003 ) >> 0)
+#define GET_TB_ADR_SEL (((REG32(ADR_TB_ADR_SEL)) & 0x0000ffff ) >> 0)
+#define GET_TB_CS (((REG32(ADR_TB_ADR_SEL)) & 0x80000000 ) >> 31)
+#define GET_TB_RDATA (((REG32(ADR_TB_RDATA)) & 0xffffffff ) >> 0)
+#define GET_UART_W2B_EN (((REG32(ADR_UART_W2B)) & 0x00000001 ) >> 0)
+#define GET_DATA_UART_W2B_EN (((REG32(ADR_UART_W2B)) & 0x00000010 ) >> 4)
+#define GET_AHB_ILL_ADDR (((REG32(ADR_AHB_ILL_ADDR)) & 0xffffffff ) >> 0)
+#define GET_AHB_FEN_ADDR (((REG32(ADR_AHB_FEN_ADDR)) & 0xffffffff ) >> 0)
+#define GET_ILL_ADDR_CLR (((REG32(ADR_AHB_ILLFEN_STATUS)) & 0x00000001 ) >> 0)
+#define GET_FENCE_HIT_CLR (((REG32(ADR_AHB_ILLFEN_STATUS)) & 0x00000002 ) >> 1)
+#define GET_ILL_ADDR_INT (((REG32(ADR_AHB_ILLFEN_STATUS)) & 0x00000010 ) >> 4)
+#define GET_FENCE_HIT_INT (((REG32(ADR_AHB_ILLFEN_STATUS)) & 0x00000020 ) >> 5)
+#define GET_PWM_INI_VALUE_P_A (((REG32(ADR_PWM_A)) & 0x000000ff ) >> 0)
+#define GET_PWM_INI_VALUE_N_A (((REG32(ADR_PWM_A)) & 0x0000ff00 ) >> 8)
+#define GET_PWM_POST_SCALER_A (((REG32(ADR_PWM_A)) & 0x000f0000 ) >> 16)
+#define GET_PWM_ALWAYSON_A (((REG32(ADR_PWM_A)) & 0x20000000 ) >> 29)
+#define GET_PWM_INVERT_A (((REG32(ADR_PWM_A)) & 0x40000000 ) >> 30)
+#define GET_PWM_ENABLE_A (((REG32(ADR_PWM_A)) & 0x80000000 ) >> 31)
+#define GET_PWM_INI_VALUE_P_B (((REG32(ADR_PWM_B)) & 0x000000ff ) >> 0)
+#define GET_PWM_INI_VALUE_N_B (((REG32(ADR_PWM_B)) & 0x0000ff00 ) >> 8)
+#define GET_PWM_POST_SCALER_B (((REG32(ADR_PWM_B)) & 0x000f0000 ) >> 16)
+#define GET_PWM_ALWAYSON_B (((REG32(ADR_PWM_B)) & 0x20000000 ) >> 29)
+#define GET_PWM_INVERT_B (((REG32(ADR_PWM_B)) & 0x40000000 ) >> 30)
+#define GET_PWM_ENABLE_B (((REG32(ADR_PWM_B)) & 0x80000000 ) >> 31)
+#define GET_HBUSREQ_LOCK (((REG32(ADR_HBUSREQ_LOCK)) & 0x00001fff ) >> 0)
+#define GET_HBURST_LOCK (((REG32(ADR_HBURST_LOCK)) & 0x00001fff ) >> 0)
+#define GET_PRESCALER_USTIMER (((REG32(ADR_PRESCALER_USTIMER)) & 0x000001ff ) >> 0)
+#define GET_MODE_REG_IN_MMU (((REG32(ADR_BIST_MODE_REG_IN_MMU)) & 0x0000ffff ) >> 0)
+#define GET_MODE_REG_OUT_MMU (((REG32(ADR_BIST_MODE_REG_OUT_MMU)) & 0x0000ffff ) >> 0)
+#define GET_MODE_REG_SO_MMU (((REG32(ADR_BIST_MODE_REG_OUT_MMU)) & 0x80000000 ) >> 31)
+#define GET_MONITOR_BUS_MMU (((REG32(ADR_BIST_MONITOR_BUS_MMU)) & 0x0007ffff ) >> 0)
+#define GET_TEST_MODE0 (((REG32(ADR_TEST_MODE)) & 0x00000001 ) >> 0)
+#define GET_TEST_MODE1 (((REG32(ADR_TEST_MODE)) & 0x00000002 ) >> 1)
+#define GET_TEST_MODE2 (((REG32(ADR_TEST_MODE)) & 0x00000004 ) >> 2)
+#define GET_TEST_MODE3 (((REG32(ADR_TEST_MODE)) & 0x00000008 ) >> 3)
+#define GET_TEST_MODE4 (((REG32(ADR_TEST_MODE)) & 0x00000010 ) >> 4)
+#define GET_TEST_MODE_ALL (((REG32(ADR_TEST_MODE)) & 0x00000020 ) >> 5)
+#define GET_WDT_INIT (((REG32(ADR_BOOT_INFO)) & 0x00000001 ) >> 0)
+#define GET_SD_HOST_INIT (((REG32(ADR_BOOT_INFO)) & 0x00000002 ) >> 1)
+#define GET_ALLOW_SD_RESET (((REG32(ADR_SD_INIT_CFG)) & 0x00000001 ) >> 0)
+#define GET_UART_NRTS (((REG32(ADR_SPARE_UART_INFO)) & 0x00000001 ) >> 0)
+#define GET_UART_NCTS (((REG32(ADR_SPARE_UART_INFO)) & 0x00000002 ) >> 1)
+#define GET_TU0_TM_INIT_VALUE (((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TU0_TM_MODE (((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TU0_TM_INT_STS_DONE (((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TU0_TM_INT_MASK (((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TU0_TM_CUR_VALUE (((REG32(ADR_TU0_CURRENT_MICROSECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TU1_TM_INIT_VALUE (((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TU1_TM_MODE (((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TU1_TM_INT_STS_DONE (((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TU1_TM_INT_MASK (((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TU1_TM_CUR_VALUE (((REG32(ADR_TU1_CURRENT_MICROSECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TU2_TM_INIT_VALUE (((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TU2_TM_MODE (((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TU2_TM_INT_STS_DONE (((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TU2_TM_INT_MASK (((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TU2_TM_CUR_VALUE (((REG32(ADR_TU2_CURRENT_MICROSECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TU3_TM_INIT_VALUE (((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TU3_TM_MODE (((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TU3_TM_INT_STS_DONE (((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TU3_TM_INT_MASK (((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TU3_TM_CUR_VALUE (((REG32(ADR_TU3_CURRENT_MICROSECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TM0_TM_INIT_VALUE (((REG32(ADR_TM0_MILISECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TM0_TM_MODE (((REG32(ADR_TM0_MILISECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TM0_TM_INT_STS_DONE (((REG32(ADR_TM0_MILISECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TM0_TM_INT_MASK (((REG32(ADR_TM0_MILISECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TM0_TM_CUR_VALUE (((REG32(ADR_TM0_CURRENT_MILISECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TM1_TM_INIT_VALUE (((REG32(ADR_TM1_MILISECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TM1_TM_MODE (((REG32(ADR_TM1_MILISECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TM1_TM_INT_STS_DONE (((REG32(ADR_TM1_MILISECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TM1_TM_INT_MASK (((REG32(ADR_TM1_MILISECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TM1_TM_CUR_VALUE (((REG32(ADR_TM1_CURRENT_MILISECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TM2_TM_INIT_VALUE (((REG32(ADR_TM2_MILISECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TM2_TM_MODE (((REG32(ADR_TM2_MILISECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TM2_TM_INT_STS_DONE (((REG32(ADR_TM2_MILISECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TM2_TM_INT_MASK (((REG32(ADR_TM2_MILISECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TM2_TM_CUR_VALUE (((REG32(ADR_TM2_CURRENT_MILISECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_TM3_TM_INIT_VALUE (((REG32(ADR_TM3_MILISECOND_TIMER)) & 0x0000ffff ) >> 0)
+#define GET_TM3_TM_MODE (((REG32(ADR_TM3_MILISECOND_TIMER)) & 0x00010000 ) >> 16)
+#define GET_TM3_TM_INT_STS_DONE (((REG32(ADR_TM3_MILISECOND_TIMER)) & 0x00020000 ) >> 17)
+#define GET_TM3_TM_INT_MASK (((REG32(ADR_TM3_MILISECOND_TIMER)) & 0x00040000 ) >> 18)
+#define GET_TM3_TM_CUR_VALUE (((REG32(ADR_TM3_CURRENT_MILISECOND_TIME_VALUE)) & 0x0000ffff ) >> 0)
+#define GET_MCU_WDT_TIME_CNT (((REG32(ADR_MCU_WDOG_REG)) & 0x0000ffff ) >> 0)
+#define GET_MCU_WDT_STATUS (((REG32(ADR_MCU_WDOG_REG)) & 0x00020000 ) >> 17)
+#define GET_MCU_WDOG_ENA (((REG32(ADR_MCU_WDOG_REG)) & 0x80000000 ) >> 31)
+#define GET_SYS_WDT_TIME_CNT (((REG32(ADR_SYS_WDOG_REG)) & 0x0000ffff ) >> 0)
+#define GET_SYS_WDT_STATUS (((REG32(ADR_SYS_WDOG_REG)) & 0x00020000 ) >> 17)
+#define GET_SYS_WDOG_ENA (((REG32(ADR_SYS_WDOG_REG)) & 0x80000000 ) >> 31)
+#define GET_XLNA_EN_O_OE (((REG32(ADR_PAD6)) & 0x00000001 ) >> 0)
+#define GET_XLNA_EN_O_PE (((REG32(ADR_PAD6)) & 0x00000002 ) >> 1)
+#define GET_PAD6_IE (((REG32(ADR_PAD6)) & 0x00000008 ) >> 3)
+#define GET_PAD6_SEL_I (((REG32(ADR_PAD6)) & 0x00000030 ) >> 4)
+#define GET_PAD6_OD (((REG32(ADR_PAD6)) & 0x00000100 ) >> 8)
+#define GET_PAD6_SEL_O (((REG32(ADR_PAD6)) & 0x00001000 ) >> 12)
+#define GET_XLNA_EN_O_C (((REG32(ADR_PAD6)) & 0x10000000 ) >> 28)
+#define GET_WIFI_TX_SW_O_OE (((REG32(ADR_PAD7)) & 0x00000001 ) >> 0)
+#define GET_WIFI_TX_SW_O_PE (((REG32(ADR_PAD7)) & 0x00000002 ) >> 1)
+#define GET_PAD7_IE (((REG32(ADR_PAD7)) & 0x00000008 ) >> 3)
+#define GET_PAD7_SEL_I (((REG32(ADR_PAD7)) & 0x00000030 ) >> 4)
+#define GET_PAD7_OD (((REG32(ADR_PAD7)) & 0x00000100 ) >> 8)
+#define GET_PAD7_SEL_O (((REG32(ADR_PAD7)) & 0x00001000 ) >> 12)
+#define GET_WIFI_TX_SW_O_C (((REG32(ADR_PAD7)) & 0x10000000 ) >> 28)
+#define GET_WIFI_RX_SW_O_OE (((REG32(ADR_PAD8)) & 0x00000001 ) >> 0)
+#define GET_WIFI_RX_SW_O_PE (((REG32(ADR_PAD8)) & 0x00000002 ) >> 1)
+#define GET_PAD8_IE (((REG32(ADR_PAD8)) & 0x00000008 ) >> 3)
+#define GET_PAD8_SEL_I (((REG32(ADR_PAD8)) & 0x00000030 ) >> 4)
+#define GET_PAD8_OD (((REG32(ADR_PAD8)) & 0x00000100 ) >> 8)
+#define GET_WIFI_RX_SW_O_C (((REG32(ADR_PAD8)) & 0x10000000 ) >> 28)
+#define GET_BT_SW_O_OE (((REG32(ADR_PAD9)) & 0x00000001 ) >> 0)
+#define GET_BT_SW_O_PE (((REG32(ADR_PAD9)) & 0x00000002 ) >> 1)
+#define GET_PAD9_IE (((REG32(ADR_PAD9)) & 0x00000008 ) >> 3)
+#define GET_PAD9_SEL_I (((REG32(ADR_PAD9)) & 0x00000030 ) >> 4)
+#define GET_PAD9_OD (((REG32(ADR_PAD9)) & 0x00000100 ) >> 8)
+#define GET_PAD9_SEL_O (((REG32(ADR_PAD9)) & 0x00001000 ) >> 12)
+#define GET_BT_SW_O_C (((REG32(ADR_PAD9)) & 0x10000000 ) >> 28)
+#define GET_XPA_EN_O_OE (((REG32(ADR_PAD11)) & 0x00000001 ) >> 0)
+#define GET_XPA_EN_O_PE (((REG32(ADR_PAD11)) & 0x00000002 ) >> 1)
+#define GET_PAD11_IE (((REG32(ADR_PAD11)) & 0x00000008 ) >> 3)
+#define GET_PAD11_SEL_I (((REG32(ADR_PAD11)) & 0x00000030 ) >> 4)
+#define GET_PAD11_OD (((REG32(ADR_PAD11)) & 0x00000100 ) >> 8)
+#define GET_PAD11_SEL_O (((REG32(ADR_PAD11)) & 0x00001000 ) >> 12)
+#define GET_XPA_EN_O_C (((REG32(ADR_PAD11)) & 0x10000000 ) >> 28)
+#define GET_PAD15_OE (((REG32(ADR_PAD15)) & 0x00000001 ) >> 0)
+#define GET_PAD15_PE (((REG32(ADR_PAD15)) & 0x00000002 ) >> 1)
+#define GET_PAD15_DS (((REG32(ADR_PAD15)) & 0x00000004 ) >> 2)
+#define GET_PAD15_IE (((REG32(ADR_PAD15)) & 0x00000008 ) >> 3)
+#define GET_PAD15_SEL_I (((REG32(ADR_PAD15)) & 0x00000030 ) >> 4)
+#define GET_PAD15_OD (((REG32(ADR_PAD15)) & 0x00000100 ) >> 8)
+#define GET_PAD15_SEL_O (((REG32(ADR_PAD15)) & 0x00001000 ) >> 12)
+#define GET_TEST_1_ID (((REG32(ADR_PAD15)) & 0x10000000 ) >> 28)
+#define GET_PAD16_OE (((REG32(ADR_PAD16)) & 0x00000001 ) >> 0)
+#define GET_PAD16_PE (((REG32(ADR_PAD16)) & 0x00000002 ) >> 1)
+#define GET_PAD16_DS (((REG32(ADR_PAD16)) & 0x00000004 ) >> 2)
+#define GET_PAD16_IE (((REG32(ADR_PAD16)) & 0x00000008 ) >> 3)
+#define GET_PAD16_SEL_I (((REG32(ADR_PAD16)) & 0x00000030 ) >> 4)
+#define GET_PAD16_OD (((REG32(ADR_PAD16)) & 0x00000100 ) >> 8)
+#define GET_PAD16_SEL_O (((REG32(ADR_PAD16)) & 0x00001000 ) >> 12)
+#define GET_TEST_2_ID (((REG32(ADR_PAD16)) & 0x10000000 ) >> 28)
+#define GET_PAD17_OE (((REG32(ADR_PAD17)) & 0x00000001 ) >> 0)
+#define GET_PAD17_PE (((REG32(ADR_PAD17)) & 0x00000002 ) >> 1)
+#define GET_PAD17_DS (((REG32(ADR_PAD17)) & 0x00000004 ) >> 2)
+#define GET_PAD17_IE (((REG32(ADR_PAD17)) & 0x00000008 ) >> 3)
+#define GET_PAD17_SEL_I (((REG32(ADR_PAD17)) & 0x00000030 ) >> 4)
+#define GET_PAD17_OD (((REG32(ADR_PAD17)) & 0x00000100 ) >> 8)
+#define GET_PAD17_SEL_O (((REG32(ADR_PAD17)) & 0x00001000 ) >> 12)
+#define GET_TEST_3_ID (((REG32(ADR_PAD17)) & 0x10000000 ) >> 28)
+#define GET_PAD18_OE (((REG32(ADR_PAD18)) & 0x00000001 ) >> 0)
+#define GET_PAD18_PE (((REG32(ADR_PAD18)) & 0x00000002 ) >> 1)
+#define GET_PAD18_DS (((REG32(ADR_PAD18)) & 0x00000004 ) >> 2)
+#define GET_PAD18_IE (((REG32(ADR_PAD18)) & 0x00000008 ) >> 3)
+#define GET_PAD18_SEL_I (((REG32(ADR_PAD18)) & 0x00000030 ) >> 4)
+#define GET_PAD18_OD (((REG32(ADR_PAD18)) & 0x00000100 ) >> 8)
+#define GET_PAD18_SEL_O (((REG32(ADR_PAD18)) & 0x00003000 ) >> 12)
+#define GET_TEST_4_ID (((REG32(ADR_PAD18)) & 0x10000000 ) >> 28)
+#define GET_PAD19_OE (((REG32(ADR_PAD19)) & 0x00000001 ) >> 0)
+#define GET_PAD19_PE (((REG32(ADR_PAD19)) & 0x00000002 ) >> 1)
+#define GET_PAD19_DS (((REG32(ADR_PAD19)) & 0x00000004 ) >> 2)
+#define GET_PAD19_IE (((REG32(ADR_PAD19)) & 0x00000008 ) >> 3)
+#define GET_PAD19_SEL_I (((REG32(ADR_PAD19)) & 0x00000030 ) >> 4)
+#define GET_PAD19_OD (((REG32(ADR_PAD19)) & 0x00000100 ) >> 8)
+#define GET_PAD19_SEL_O (((REG32(ADR_PAD19)) & 0x00007000 ) >> 12)
+#define GET_SHORT_TO_20_ID (((REG32(ADR_PAD19)) & 0x10000000 ) >> 28)
+#define GET_PAD20_OE (((REG32(ADR_PAD20)) & 0x00000001 ) >> 0)
+#define GET_PAD20_PE (((REG32(ADR_PAD20)) & 0x00000002 ) >> 1)
+#define GET_PAD20_DS (((REG32(ADR_PAD20)) & 0x00000004 ) >> 2)
+#define GET_PAD20_IE (((REG32(ADR_PAD20)) & 0x00000008 ) >> 3)
+#define GET_PAD20_SEL_I (((REG32(ADR_PAD20)) & 0x000000f0 ) >> 4)
+#define GET_PAD20_OD (((REG32(ADR_PAD20)) & 0x00000100 ) >> 8)
+#define GET_PAD20_SEL_O (((REG32(ADR_PAD20)) & 0x00003000 ) >> 12)
+#define GET_STRAP0 (((REG32(ADR_PAD20)) & 0x08000000 ) >> 27)
+#define GET_GPIO_TEST_1_ID (((REG32(ADR_PAD20)) & 0x10000000 ) >> 28)
+#define GET_PAD21_OE (((REG32(ADR_PAD21)) & 0x00000001 ) >> 0)
+#define GET_PAD21_PE (((REG32(ADR_PAD21)) & 0x00000002 ) >> 1)
+#define GET_PAD21_DS (((REG32(ADR_PAD21)) & 0x00000004 ) >> 2)
+#define GET_PAD21_IE (((REG32(ADR_PAD21)) & 0x00000008 ) >> 3)
+#define GET_PAD21_SEL_I (((REG32(ADR_PAD21)) & 0x00000070 ) >> 4)
+#define GET_PAD21_OD (((REG32(ADR_PAD21)) & 0x00000100 ) >> 8)
+#define GET_PAD21_SEL_O (((REG32(ADR_PAD21)) & 0x00003000 ) >> 12)
+#define GET_STRAP3 (((REG32(ADR_PAD21)) & 0x08000000 ) >> 27)
+#define GET_GPIO_TEST_2_ID (((REG32(ADR_PAD21)) & 0x10000000 ) >> 28)
+#define GET_PAD22_OE (((REG32(ADR_PAD22)) & 0x00000001 ) >> 0)
+#define GET_PAD22_PE (((REG32(ADR_PAD22)) & 0x00000002 ) >> 1)
+#define GET_PAD22_DS (((REG32(ADR_PAD22)) & 0x00000004 ) >> 2)
+#define GET_PAD22_IE (((REG32(ADR_PAD22)) & 0x00000008 ) >> 3)
+#define GET_PAD22_SEL_I (((REG32(ADR_PAD22)) & 0x00000070 ) >> 4)
+#define GET_PAD22_OD (((REG32(ADR_PAD22)) & 0x00000100 ) >> 8)
+#define GET_PAD22_SEL_O (((REG32(ADR_PAD22)) & 0x00007000 ) >> 12)
+#define GET_PAD22_SEL_OE (((REG32(ADR_PAD22)) & 0x00100000 ) >> 20)
+#define GET_GPIO_TEST_3_ID (((REG32(ADR_PAD22)) & 0x10000000 ) >> 28)
+#define GET_PAD24_OE (((REG32(ADR_PAD24)) & 0x00000001 ) >> 0)
+#define GET_PAD24_PE (((REG32(ADR_PAD24)) & 0x00000002 ) >> 1)
+#define GET_PAD24_DS (((REG32(ADR_PAD24)) & 0x00000004 ) >> 2)
+#define GET_PAD24_IE (((REG32(ADR_PAD24)) & 0x00000008 ) >> 3)
+#define GET_PAD24_SEL_I (((REG32(ADR_PAD24)) & 0x00000030 ) >> 4)
+#define GET_PAD24_OD (((REG32(ADR_PAD24)) & 0x00000100 ) >> 8)
+#define GET_PAD24_SEL_O (((REG32(ADR_PAD24)) & 0x00007000 ) >> 12)
+#define GET_GPIO_TEST_4_ID (((REG32(ADR_PAD24)) & 0x10000000 ) >> 28)
+#define GET_PAD25_OE (((REG32(ADR_PAD25)) & 0x00000001 ) >> 0)
+#define GET_PAD25_PE (((REG32(ADR_PAD25)) & 0x00000002 ) >> 1)
+#define GET_PAD25_DS (((REG32(ADR_PAD25)) & 0x00000004 ) >> 2)
+#define GET_PAD25_IE (((REG32(ADR_PAD25)) & 0x00000008 ) >> 3)
+#define GET_PAD25_SEL_I (((REG32(ADR_PAD25)) & 0x00000070 ) >> 4)
+#define GET_PAD25_OD (((REG32(ADR_PAD25)) & 0x00000100 ) >> 8)
+#define GET_PAD25_SEL_O (((REG32(ADR_PAD25)) & 0x00007000 ) >> 12)
+#define GET_PAD25_SEL_OE (((REG32(ADR_PAD25)) & 0x00100000 ) >> 20)
+#define GET_STRAP1 (((REG32(ADR_PAD25)) & 0x08000000 ) >> 27)
+#define GET_GPIO_1_ID (((REG32(ADR_PAD25)) & 0x10000000 ) >> 28)
+#define GET_PAD27_OE (((REG32(ADR_PAD27)) & 0x00000001 ) >> 0)
+#define GET_PAD27_PE (((REG32(ADR_PAD27)) & 0x00000002 ) >> 1)
+#define GET_PAD27_DS (((REG32(ADR_PAD27)) & 0x00000004 ) >> 2)
+#define GET_PAD27_IE (((REG32(ADR_PAD27)) & 0x00000008 ) >> 3)
+#define GET_PAD27_SEL_I (((REG32(ADR_PAD27)) & 0x00000070 ) >> 4)
+#define GET_PAD27_OD (((REG32(ADR_PAD27)) & 0x00000100 ) >> 8)
+#define GET_PAD27_SEL_O (((REG32(ADR_PAD27)) & 0x00007000 ) >> 12)
+#define GET_GPIO_2_ID (((REG32(ADR_PAD27)) & 0x10000000 ) >> 28)
+#define GET_PAD28_OE (((REG32(ADR_PAD28)) & 0x00000001 ) >> 0)
+#define GET_PAD28_PE (((REG32(ADR_PAD28)) & 0x00000002 ) >> 1)
+#define GET_PAD28_DS (((REG32(ADR_PAD28)) & 0x00000004 ) >> 2)
+#define GET_PAD28_IE (((REG32(ADR_PAD28)) & 0x00000008 ) >> 3)
+#define GET_PAD28_SEL_I (((REG32(ADR_PAD28)) & 0x00000070 ) >> 4)
+#define GET_PAD28_OD (((REG32(ADR_PAD28)) & 0x00000100 ) >> 8)
+#define GET_PAD28_SEL_O (((REG32(ADR_PAD28)) & 0x0000f000 ) >> 12)
+#define GET_PAD28_SEL_OE (((REG32(ADR_PAD28)) & 0x00100000 ) >> 20)
+#define GET_GPIO_3_ID (((REG32(ADR_PAD28)) & 0x10000000 ) >> 28)
+#define GET_PAD29_OE (((REG32(ADR_PAD29)) & 0x00000001 ) >> 0)
+#define GET_PAD29_PE (((REG32(ADR_PAD29)) & 0x00000002 ) >> 1)
+#define GET_PAD29_DS (((REG32(ADR_PAD29)) & 0x00000004 ) >> 2)
+#define GET_PAD29_IE (((REG32(ADR_PAD29)) & 0x00000008 ) >> 3)
+#define GET_PAD29_SEL_I (((REG32(ADR_PAD29)) & 0x00000070 ) >> 4)
+#define GET_PAD29_OD (((REG32(ADR_PAD29)) & 0x00000100 ) >> 8)
+#define GET_PAD29_SEL_O (((REG32(ADR_PAD29)) & 0x00007000 ) >> 12)
+#define GET_GPIO_TEST_5_ID (((REG32(ADR_PAD29)) & 0x10000000 ) >> 28)
+#define GET_PAD30_OE (((REG32(ADR_PAD30)) & 0x00000001 ) >> 0)
+#define GET_PAD30_PE (((REG32(ADR_PAD30)) & 0x00000002 ) >> 1)
+#define GET_PAD30_DS (((REG32(ADR_PAD30)) & 0x00000004 ) >> 2)
+#define GET_PAD30_IE (((REG32(ADR_PAD30)) & 0x00000008 ) >> 3)
+#define GET_PAD30_SEL_I (((REG32(ADR_PAD30)) & 0x00000030 ) >> 4)
+#define GET_PAD30_OD (((REG32(ADR_PAD30)) & 0x00000100 ) >> 8)
+#define GET_PAD30_SEL_O (((REG32(ADR_PAD30)) & 0x00003000 ) >> 12)
+#define GET_TEST_6_ID (((REG32(ADR_PAD30)) & 0x10000000 ) >> 28)
+#define GET_PAD31_OE (((REG32(ADR_PAD31)) & 0x00000001 ) >> 0)
+#define GET_PAD31_PE (((REG32(ADR_PAD31)) & 0x00000002 ) >> 1)
+#define GET_PAD31_DS (((REG32(ADR_PAD31)) & 0x00000004 ) >> 2)
+#define GET_PAD31_IE (((REG32(ADR_PAD31)) & 0x00000008 ) >> 3)
+#define GET_PAD31_SEL_I (((REG32(ADR_PAD31)) & 0x00000030 ) >> 4)
+#define GET_PAD31_OD (((REG32(ADR_PAD31)) & 0x00000100 ) >> 8)
+#define GET_PAD31_SEL_O (((REG32(ADR_PAD31)) & 0x00003000 ) >> 12)
+#define GET_TEST_7_ID (((REG32(ADR_PAD31)) & 0x10000000 ) >> 28)
+#define GET_PAD32_OE (((REG32(ADR_PAD32)) & 0x00000001 ) >> 0)
+#define GET_PAD32_PE (((REG32(ADR_PAD32)) & 0x00000002 ) >> 1)
+#define GET_PAD32_DS (((REG32(ADR_PAD32)) & 0x00000004 ) >> 2)
+#define GET_PAD32_IE (((REG32(ADR_PAD32)) & 0x00000008 ) >> 3)
+#define GET_PAD32_SEL_I (((REG32(ADR_PAD32)) & 0x00000030 ) >> 4)
+#define GET_PAD32_OD (((REG32(ADR_PAD32)) & 0x00000100 ) >> 8)
+#define GET_PAD32_SEL_O (((REG32(ADR_PAD32)) & 0x00003000 ) >> 12)
+#define GET_TEST_8_ID (((REG32(ADR_PAD32)) & 0x10000000 ) >> 28)
+#define GET_PAD33_OE (((REG32(ADR_PAD33)) & 0x00000001 ) >> 0)
+#define GET_PAD33_PE (((REG32(ADR_PAD33)) & 0x00000002 ) >> 1)
+#define GET_PAD33_DS (((REG32(ADR_PAD33)) & 0x00000004 ) >> 2)
+#define GET_PAD33_IE (((REG32(ADR_PAD33)) & 0x00000008 ) >> 3)
+#define GET_PAD33_SEL_I (((REG32(ADR_PAD33)) & 0x00000030 ) >> 4)
+#define GET_PAD33_OD (((REG32(ADR_PAD33)) & 0x00000100 ) >> 8)
+#define GET_PAD33_SEL_O (((REG32(ADR_PAD33)) & 0x00003000 ) >> 12)
+#define GET_TEST_9_ID (((REG32(ADR_PAD33)) & 0x10000000 ) >> 28)
+#define GET_PAD34_OE (((REG32(ADR_PAD34)) & 0x00000001 ) >> 0)
+#define GET_PAD34_PE (((REG32(ADR_PAD34)) & 0x00000002 ) >> 1)
+#define GET_PAD34_DS (((REG32(ADR_PAD34)) & 0x00000004 ) >> 2)
+#define GET_PAD34_IE (((REG32(ADR_PAD34)) & 0x00000008 ) >> 3)
+#define GET_PAD34_SEL_I (((REG32(ADR_PAD34)) & 0x00000030 ) >> 4)
+#define GET_PAD34_OD (((REG32(ADR_PAD34)) & 0x00000100 ) >> 8)
+#define GET_PAD34_SEL_O (((REG32(ADR_PAD34)) & 0x00003000 ) >> 12)
+#define GET_TEST_10_ID (((REG32(ADR_PAD34)) & 0x10000000 ) >> 28)
+#define GET_PAD42_OE (((REG32(ADR_PAD42)) & 0x00000001 ) >> 0)
+#define GET_PAD42_PE (((REG32(ADR_PAD42)) & 0x00000002 ) >> 1)
+#define GET_PAD42_DS (((REG32(ADR_PAD42)) & 0x00000004 ) >> 2)
+#define GET_PAD42_IE (((REG32(ADR_PAD42)) & 0x00000008 ) >> 3)
+#define GET_PAD42_SEL_I (((REG32(ADR_PAD42)) & 0x00000030 ) >> 4)
+#define GET_PAD42_OD (((REG32(ADR_PAD42)) & 0x00000100 ) >> 8)
+#define GET_PAD42_SEL_O (((REG32(ADR_PAD42)) & 0x00001000 ) >> 12)
+#define GET_TEST_11_ID (((REG32(ADR_PAD42)) & 0x10000000 ) >> 28)
+#define GET_PAD43_OE (((REG32(ADR_PAD43)) & 0x00000001 ) >> 0)
+#define GET_PAD43_PE (((REG32(ADR_PAD43)) & 0x00000002 ) >> 1)
+#define GET_PAD43_DS (((REG32(ADR_PAD43)) & 0x00000004 ) >> 2)
+#define GET_PAD43_IE (((REG32(ADR_PAD43)) & 0x00000008 ) >> 3)
+#define GET_PAD43_SEL_I (((REG32(ADR_PAD43)) & 0x00000030 ) >> 4)
+#define GET_PAD43_OD (((REG32(ADR_PAD43)) & 0x00000100 ) >> 8)
+#define GET_PAD43_SEL_O (((REG32(ADR_PAD43)) & 0x00001000 ) >> 12)
+#define GET_TEST_12_ID (((REG32(ADR_PAD43)) & 0x10000000 ) >> 28)
+#define GET_PAD44_OE (((REG32(ADR_PAD44)) & 0x00000001 ) >> 0)
+#define GET_PAD44_PE (((REG32(ADR_PAD44)) & 0x00000002 ) >> 1)
+#define GET_PAD44_DS (((REG32(ADR_PAD44)) & 0x00000004 ) >> 2)
+#define GET_PAD44_IE (((REG32(ADR_PAD44)) & 0x00000008 ) >> 3)
+#define GET_PAD44_SEL_I (((REG32(ADR_PAD44)) & 0x00000030 ) >> 4)
+#define GET_PAD44_OD (((REG32(ADR_PAD44)) & 0x00000100 ) >> 8)
+#define GET_PAD44_SEL_O (((REG32(ADR_PAD44)) & 0x00003000 ) >> 12)
+#define GET_TEST_13_ID (((REG32(ADR_PAD44)) & 0x10000000 ) >> 28)
+#define GET_PAD45_OE (((REG32(ADR_PAD45)) & 0x00000001 ) >> 0)
+#define GET_PAD45_PE (((REG32(ADR_PAD45)) & 0x00000002 ) >> 1)
+#define GET_PAD45_DS (((REG32(ADR_PAD45)) & 0x00000004 ) >> 2)
+#define GET_PAD45_IE (((REG32(ADR_PAD45)) & 0x00000008 ) >> 3)
+#define GET_PAD45_SEL_I (((REG32(ADR_PAD45)) & 0x00000030 ) >> 4)
+#define GET_PAD45_OD (((REG32(ADR_PAD45)) & 0x00000100 ) >> 8)
+#define GET_PAD45_SEL_O (((REG32(ADR_PAD45)) & 0x00003000 ) >> 12)
+#define GET_TEST_14_ID (((REG32(ADR_PAD45)) & 0x10000000 ) >> 28)
+#define GET_PAD46_OE (((REG32(ADR_PAD46)) & 0x00000001 ) >> 0)
+#define GET_PAD46_PE (((REG32(ADR_PAD46)) & 0x00000002 ) >> 1)
+#define GET_PAD46_DS (((REG32(ADR_PAD46)) & 0x00000004 ) >> 2)
+#define GET_PAD46_IE (((REG32(ADR_PAD46)) & 0x00000008 ) >> 3)
+#define GET_PAD46_SEL_I (((REG32(ADR_PAD46)) & 0x00000030 ) >> 4)
+#define GET_PAD46_OD (((REG32(ADR_PAD46)) & 0x00000100 ) >> 8)
+#define GET_PAD46_SEL_O (((REG32(ADR_PAD46)) & 0x00003000 ) >> 12)
+#define GET_TEST_15_ID (((REG32(ADR_PAD46)) & 0x10000000 ) >> 28)
+#define GET_PAD47_OE (((REG32(ADR_PAD47)) & 0x00000001 ) >> 0)
+#define GET_PAD47_PE (((REG32(ADR_PAD47)) & 0x00000002 ) >> 1)
+#define GET_PAD47_DS (((REG32(ADR_PAD47)) & 0x00000004 ) >> 2)
+#define GET_PAD47_SEL_I (((REG32(ADR_PAD47)) & 0x00000030 ) >> 4)
+#define GET_PAD47_OD (((REG32(ADR_PAD47)) & 0x00000100 ) >> 8)
+#define GET_PAD47_SEL_O (((REG32(ADR_PAD47)) & 0x00003000 ) >> 12)
+#define GET_PAD47_SEL_OE (((REG32(ADR_PAD47)) & 0x00100000 ) >> 20)
+#define GET_GPIO_9_ID (((REG32(ADR_PAD47)) & 0x10000000 ) >> 28)
+#define GET_PAD48_OE (((REG32(ADR_PAD48)) & 0x00000001 ) >> 0)
+#define GET_PAD48_PE (((REG32(ADR_PAD48)) & 0x00000002 ) >> 1)
+#define GET_PAD48_DS (((REG32(ADR_PAD48)) & 0x00000004 ) >> 2)
+#define GET_PAD48_IE (((REG32(ADR_PAD48)) & 0x00000008 ) >> 3)
+#define GET_PAD48_SEL_I (((REG32(ADR_PAD48)) & 0x00000070 ) >> 4)
+#define GET_PAD48_OD (((REG32(ADR_PAD48)) & 0x00000100 ) >> 8)
+#define GET_PAD48_PE_SEL (((REG32(ADR_PAD48)) & 0x00000800 ) >> 11)
+#define GET_PAD48_SEL_O (((REG32(ADR_PAD48)) & 0x00003000 ) >> 12)
+#define GET_PAD48_SEL_OE (((REG32(ADR_PAD48)) & 0x00100000 ) >> 20)
+#define GET_GPIO_10_ID (((REG32(ADR_PAD48)) & 0x10000000 ) >> 28)
+#define GET_PAD49_OE (((REG32(ADR_PAD49)) & 0x00000001 ) >> 0)
+#define GET_PAD49_PE (((REG32(ADR_PAD49)) & 0x00000002 ) >> 1)
+#define GET_PAD49_DS (((REG32(ADR_PAD49)) & 0x00000004 ) >> 2)
+#define GET_PAD49_IE (((REG32(ADR_PAD49)) & 0x00000008 ) >> 3)
+#define GET_PAD49_SEL_I (((REG32(ADR_PAD49)) & 0x00000070 ) >> 4)
+#define GET_PAD49_OD (((REG32(ADR_PAD49)) & 0x00000100 ) >> 8)
+#define GET_PAD49_SEL_O (((REG32(ADR_PAD49)) & 0x00003000 ) >> 12)
+#define GET_PAD49_SEL_OE (((REG32(ADR_PAD49)) & 0x00100000 ) >> 20)
+#define GET_GPIO_11_ID (((REG32(ADR_PAD49)) & 0x10000000 ) >> 28)
+#define GET_PAD50_OE (((REG32(ADR_PAD50)) & 0x00000001 ) >> 0)
+#define GET_PAD50_PE (((REG32(ADR_PAD50)) & 0x00000002 ) >> 1)
+#define GET_PAD50_DS (((REG32(ADR_PAD50)) & 0x00000004 ) >> 2)
+#define GET_PAD50_IE (((REG32(ADR_PAD50)) & 0x00000008 ) >> 3)
+#define GET_PAD50_SEL_I (((REG32(ADR_PAD50)) & 0x00000070 ) >> 4)
+#define GET_PAD50_OD (((REG32(ADR_PAD50)) & 0x00000100 ) >> 8)
+#define GET_PAD50_SEL_O (((REG32(ADR_PAD50)) & 0x00003000 ) >> 12)
+#define GET_PAD50_SEL_OE (((REG32(ADR_PAD50)) & 0x00100000 ) >> 20)
+#define GET_GPIO_12_ID (((REG32(ADR_PAD50)) & 0x10000000 ) >> 28)
+#define GET_PAD51_OE (((REG32(ADR_PAD51)) & 0x00000001 ) >> 0)
+#define GET_PAD51_PE (((REG32(ADR_PAD51)) & 0x00000002 ) >> 1)
+#define GET_PAD51_DS (((REG32(ADR_PAD51)) & 0x00000004 ) >> 2)
+#define GET_PAD51_IE (((REG32(ADR_PAD51)) & 0x00000008 ) >> 3)
+#define GET_PAD51_SEL_I (((REG32(ADR_PAD51)) & 0x00000030 ) >> 4)
+#define GET_PAD51_OD (((REG32(ADR_PAD51)) & 0x00000100 ) >> 8)
+#define GET_PAD51_SEL_O (((REG32(ADR_PAD51)) & 0x00001000 ) >> 12)
+#define GET_PAD51_SEL_OE (((REG32(ADR_PAD51)) & 0x00100000 ) >> 20)
+#define GET_GPIO_13_ID (((REG32(ADR_PAD51)) & 0x10000000 ) >> 28)
+#define GET_PAD52_OE (((REG32(ADR_PAD52)) & 0x00000001 ) >> 0)
+#define GET_PAD52_PE (((REG32(ADR_PAD52)) & 0x00000002 ) >> 1)
+#define GET_PAD52_DS (((REG32(ADR_PAD52)) & 0x00000004 ) >> 2)
+#define GET_PAD52_SEL_I (((REG32(ADR_PAD52)) & 0x00000030 ) >> 4)
+#define GET_PAD52_OD (((REG32(ADR_PAD52)) & 0x00000100 ) >> 8)
+#define GET_PAD52_SEL_O (((REG32(ADR_PAD52)) & 0x00001000 ) >> 12)
+#define GET_PAD52_SEL_OE (((REG32(ADR_PAD52)) & 0x00100000 ) >> 20)
+#define GET_GPIO_14_ID (((REG32(ADR_PAD52)) & 0x10000000 ) >> 28)
+#define GET_PAD53_OE (((REG32(ADR_PAD53)) & 0x00000001 ) >> 0)
+#define GET_PAD53_PE (((REG32(ADR_PAD53)) & 0x00000002 ) >> 1)
+#define GET_PAD53_DS (((REG32(ADR_PAD53)) & 0x00000004 ) >> 2)
+#define GET_PAD53_IE (((REG32(ADR_PAD53)) & 0x00000008 ) >> 3)
+#define GET_PAD53_SEL_I (((REG32(ADR_PAD53)) & 0x00000030 ) >> 4)
+#define GET_PAD53_OD (((REG32(ADR_PAD53)) & 0x00000100 ) >> 8)
+#define GET_PAD53_SEL_O (((REG32(ADR_PAD53)) & 0x00001000 ) >> 12)
+#define GET_JTAG_TMS_ID (((REG32(ADR_PAD53)) & 0x10000000 ) >> 28)
+#define GET_PAD54_OE (((REG32(ADR_PAD54)) & 0x00000001 ) >> 0)
+#define GET_PAD54_PE (((REG32(ADR_PAD54)) & 0x00000002 ) >> 1)
+#define GET_PAD54_DS (((REG32(ADR_PAD54)) & 0x00000004 ) >> 2)
+#define GET_PAD54_OD (((REG32(ADR_PAD54)) & 0x00000100 ) >> 8)
+#define GET_PAD54_SEL_O (((REG32(ADR_PAD54)) & 0x00003000 ) >> 12)
+#define GET_JTAG_TCK_ID (((REG32(ADR_PAD54)) & 0x10000000 ) >> 28)
+#define GET_PAD56_PE (((REG32(ADR_PAD56)) & 0x00000002 ) >> 1)
+#define GET_PAD56_DS (((REG32(ADR_PAD56)) & 0x00000004 ) >> 2)
+#define GET_PAD56_SEL_I (((REG32(ADR_PAD56)) & 0x00000010 ) >> 4)
+#define GET_PAD56_OD (((REG32(ADR_PAD56)) & 0x00000100 ) >> 8)
+#define GET_JTAG_TDI_ID (((REG32(ADR_PAD56)) & 0x10000000 ) >> 28)
+#define GET_PAD57_OE (((REG32(ADR_PAD57)) & 0x00000001 ) >> 0)
+#define GET_PAD57_PE (((REG32(ADR_PAD57)) & 0x00000002 ) >> 1)
+#define GET_PAD57_DS (((REG32(ADR_PAD57)) & 0x00000004 ) >> 2)
+#define GET_PAD57_IE (((REG32(ADR_PAD57)) & 0x00000008 ) >> 3)
+#define GET_PAD57_SEL_I (((REG32(ADR_PAD57)) & 0x00000030 ) >> 4)
+#define GET_PAD57_OD (((REG32(ADR_PAD57)) & 0x00000100 ) >> 8)
+#define GET_PAD57_SEL_O (((REG32(ADR_PAD57)) & 0x00003000 ) >> 12)
+#define GET_PAD57_SEL_OE (((REG32(ADR_PAD57)) & 0x00100000 ) >> 20)
+#define GET_JTAG_TDO_ID (((REG32(ADR_PAD57)) & 0x10000000 ) >> 28)
+#define GET_PAD58_OE (((REG32(ADR_PAD58)) & 0x00000001 ) >> 0)
+#define GET_PAD58_PE (((REG32(ADR_PAD58)) & 0x00000002 ) >> 1)
+#define GET_PAD58_DS (((REG32(ADR_PAD58)) & 0x00000004 ) >> 2)
+#define GET_PAD58_IE (((REG32(ADR_PAD58)) & 0x00000008 ) >> 3)
+#define GET_PAD58_SEL_I (((REG32(ADR_PAD58)) & 0x00000030 ) >> 4)
+#define GET_PAD58_OD (((REG32(ADR_PAD58)) & 0x00000100 ) >> 8)
+#define GET_PAD58_SEL_O (((REG32(ADR_PAD58)) & 0x00001000 ) >> 12)
+#define GET_TEST_16_ID (((REG32(ADR_PAD58)) & 0x10000000 ) >> 28)
+#define GET_PAD59_OE (((REG32(ADR_PAD59)) & 0x00000001 ) >> 0)
+#define GET_PAD59_PE (((REG32(ADR_PAD59)) & 0x00000002 ) >> 1)
+#define GET_PAD59_DS (((REG32(ADR_PAD59)) & 0x00000004 ) >> 2)
+#define GET_PAD59_IE (((REG32(ADR_PAD59)) & 0x00000008 ) >> 3)
+#define GET_PAD59_SEL_I (((REG32(ADR_PAD59)) & 0x00000030 ) >> 4)
+#define GET_PAD59_OD (((REG32(ADR_PAD59)) & 0x00000100 ) >> 8)
+#define GET_PAD59_SEL_O (((REG32(ADR_PAD59)) & 0x00001000 ) >> 12)
+#define GET_TEST_17_ID (((REG32(ADR_PAD59)) & 0x10000000 ) >> 28)
+#define GET_PAD60_OE (((REG32(ADR_PAD60)) & 0x00000001 ) >> 0)
+#define GET_PAD60_PE (((REG32(ADR_PAD60)) & 0x00000002 ) >> 1)
+#define GET_PAD60_DS (((REG32(ADR_PAD60)) & 0x00000004 ) >> 2)
+#define GET_PAD60_IE (((REG32(ADR_PAD60)) & 0x00000008 ) >> 3)
+#define GET_PAD60_SEL_I (((REG32(ADR_PAD60)) & 0x00000030 ) >> 4)
+#define GET_PAD60_OD (((REG32(ADR_PAD60)) & 0x00000100 ) >> 8)
+#define GET_PAD60_SEL_O (((REG32(ADR_PAD60)) & 0x00001000 ) >> 12)
+#define GET_TEST_18_ID (((REG32(ADR_PAD60)) & 0x10000000 ) >> 28)
+#define GET_PAD61_OE (((REG32(ADR_PAD61)) & 0x00000001 ) >> 0)
+#define GET_PAD61_PE (((REG32(ADR_PAD61)) & 0x00000002 ) >> 1)
+#define GET_PAD61_DS (((REG32(ADR_PAD61)) & 0x00000004 ) >> 2)
+#define GET_PAD61_IE (((REG32(ADR_PAD61)) & 0x00000008 ) >> 3)
+#define GET_PAD61_SEL_I (((REG32(ADR_PAD61)) & 0x00000010 ) >> 4)
+#define GET_PAD61_OD (((REG32(ADR_PAD61)) & 0x00000100 ) >> 8)
+#define GET_PAD61_SEL_O (((REG32(ADR_PAD61)) & 0x00003000 ) >> 12)
+#define GET_TEST_19_ID (((REG32(ADR_PAD61)) & 0x10000000 ) >> 28)
+#define GET_PAD62_OE (((REG32(ADR_PAD62)) & 0x00000001 ) >> 0)
+#define GET_PAD62_PE (((REG32(ADR_PAD62)) & 0x00000002 ) >> 1)
+#define GET_PAD62_DS (((REG32(ADR_PAD62)) & 0x00000004 ) >> 2)
+#define GET_PAD62_IE (((REG32(ADR_PAD62)) & 0x00000008 ) >> 3)
+#define GET_PAD62_SEL_I (((REG32(ADR_PAD62)) & 0x00000010 ) >> 4)
+#define GET_PAD62_OD (((REG32(ADR_PAD62)) & 0x00000100 ) >> 8)
+#define GET_PAD62_SEL_O (((REG32(ADR_PAD62)) & 0x00001000 ) >> 12)
+#define GET_TEST_20_ID (((REG32(ADR_PAD62)) & 0x10000000 ) >> 28)
+#define GET_PAD64_OE (((REG32(ADR_PAD64)) & 0x00000001 ) >> 0)
+#define GET_PAD64_PE (((REG32(ADR_PAD64)) & 0x00000002 ) >> 1)
+#define GET_PAD64_DS (((REG32(ADR_PAD64)) & 0x00000004 ) >> 2)
+#define GET_PAD64_IE (((REG32(ADR_PAD64)) & 0x00000008 ) >> 3)
+#define GET_PAD64_SEL_I (((REG32(ADR_PAD64)) & 0x00000070 ) >> 4)
+#define GET_PAD64_OD (((REG32(ADR_PAD64)) & 0x00000100 ) >> 8)
+#define GET_PAD64_SEL_O (((REG32(ADR_PAD64)) & 0x00003000 ) >> 12)
+#define GET_PAD64_SEL_OE (((REG32(ADR_PAD64)) & 0x00100000 ) >> 20)
+#define GET_GPIO_15_IP_ID (((REG32(ADR_PAD64)) & 0x10000000 ) >> 28)
+#define GET_PAD65_OE (((REG32(ADR_PAD65)) & 0x00000001 ) >> 0)
+#define GET_PAD65_PE (((REG32(ADR_PAD65)) & 0x00000002 ) >> 1)
+#define GET_PAD65_DS (((REG32(ADR_PAD65)) & 0x00000004 ) >> 2)
+#define GET_PAD65_IE (((REG32(ADR_PAD65)) & 0x00000008 ) >> 3)
+#define GET_PAD65_SEL_I (((REG32(ADR_PAD65)) & 0x00000070 ) >> 4)
+#define GET_PAD65_OD (((REG32(ADR_PAD65)) & 0x00000100 ) >> 8)
+#define GET_PAD65_SEL_O (((REG32(ADR_PAD65)) & 0x00001000 ) >> 12)
+#define GET_GPIO_TEST_7_IN_ID (((REG32(ADR_PAD65)) & 0x10000000 ) >> 28)
+#define GET_PAD66_OE (((REG32(ADR_PAD66)) & 0x00000001 ) >> 0)
+#define GET_PAD66_PE (((REG32(ADR_PAD66)) & 0x00000002 ) >> 1)
+#define GET_PAD66_DS (((REG32(ADR_PAD66)) & 0x00000004 ) >> 2)
+#define GET_PAD66_IE (((REG32(ADR_PAD66)) & 0x00000008 ) >> 3)
+#define GET_PAD66_SEL_I (((REG32(ADR_PAD66)) & 0x00000030 ) >> 4)
+#define GET_PAD66_OD (((REG32(ADR_PAD66)) & 0x00000100 ) >> 8)
+#define GET_PAD66_SEL_O (((REG32(ADR_PAD66)) & 0x00003000 ) >> 12)
+#define GET_GPIO_17_QP_ID (((REG32(ADR_PAD66)) & 0x10000000 ) >> 28)
+#define GET_PAD68_OE (((REG32(ADR_PAD68)) & 0x00000001 ) >> 0)
+#define GET_PAD68_PE (((REG32(ADR_PAD68)) & 0x00000002 ) >> 1)
+#define GET_PAD68_DS (((REG32(ADR_PAD68)) & 0x00000004 ) >> 2)
+#define GET_PAD68_IE (((REG32(ADR_PAD68)) & 0x00000008 ) >> 3)
+#define GET_PAD68_OD (((REG32(ADR_PAD68)) & 0x00000100 ) >> 8)
+#define GET_PAD68_SEL_O (((REG32(ADR_PAD68)) & 0x00001000 ) >> 12)
+#define GET_GPIO_19_ID (((REG32(ADR_PAD68)) & 0x10000000 ) >> 28)
+#define GET_PAD67_OE (((REG32(ADR_PAD67)) & 0x00000001 ) >> 0)
+#define GET_PAD67_PE (((REG32(ADR_PAD67)) & 0x00000002 ) >> 1)
+#define GET_PAD67_DS (((REG32(ADR_PAD67)) & 0x00000004 ) >> 2)
+#define GET_PAD67_IE (((REG32(ADR_PAD67)) & 0x00000008 ) >> 3)
+#define GET_PAD67_SEL_I (((REG32(ADR_PAD67)) & 0x00000070 ) >> 4)
+#define GET_PAD67_OD (((REG32(ADR_PAD67)) & 0x00000100 ) >> 8)
+#define GET_PAD67_SEL_O (((REG32(ADR_PAD67)) & 0x00003000 ) >> 12)
+#define GET_GPIO_TEST_8_QN_ID (((REG32(ADR_PAD67)) & 0x10000000 ) >> 28)
+#define GET_PAD69_OE (((REG32(ADR_PAD69)) & 0x00000001 ) >> 0)
+#define GET_PAD69_PE (((REG32(ADR_PAD69)) & 0x00000002 ) >> 1)
+#define GET_PAD69_DS (((REG32(ADR_PAD69)) & 0x00000004 ) >> 2)
+#define GET_PAD69_IE (((REG32(ADR_PAD69)) & 0x00000008 ) >> 3)
+#define GET_PAD69_SEL_I (((REG32(ADR_PAD69)) & 0x00000030 ) >> 4)
+#define GET_PAD69_OD (((REG32(ADR_PAD69)) & 0x00000100 ) >> 8)
+#define GET_PAD69_SEL_O (((REG32(ADR_PAD69)) & 0x00001000 ) >> 12)
+#define GET_STRAP2 (((REG32(ADR_PAD69)) & 0x08000000 ) >> 27)
+#define GET_GPIO_20_ID (((REG32(ADR_PAD69)) & 0x10000000 ) >> 28)
+#define GET_PAD70_OE (((REG32(ADR_PAD70)) & 0x00000001 ) >> 0)
+#define GET_PAD70_PE (((REG32(ADR_PAD70)) & 0x00000002 ) >> 1)
+#define GET_PAD70_DS (((REG32(ADR_PAD70)) & 0x00000004 ) >> 2)
+#define GET_PAD70_IE (((REG32(ADR_PAD70)) & 0x00000008 ) >> 3)
+#define GET_PAD70_SEL_I (((REG32(ADR_PAD70)) & 0x00000030 ) >> 4)
+#define GET_PAD70_OD (((REG32(ADR_PAD70)) & 0x00000100 ) >> 8)
+#define GET_PAD70_SEL_O (((REG32(ADR_PAD70)) & 0x00007000 ) >> 12)
+#define GET_GPIO_21_ID (((REG32(ADR_PAD70)) & 0x10000000 ) >> 28)
+#define GET_PAD231_OE (((REG32(ADR_PAD231)) & 0x00000001 ) >> 0)
+#define GET_PAD231_PE (((REG32(ADR_PAD231)) & 0x00000002 ) >> 1)
+#define GET_PAD231_DS (((REG32(ADR_PAD231)) & 0x00000004 ) >> 2)
+#define GET_PAD231_IE (((REG32(ADR_PAD231)) & 0x00000008 ) >> 3)
+#define GET_PAD231_OD (((REG32(ADR_PAD231)) & 0x00000100 ) >> 8)
+#define GET_PIN_40_OR_56_ID (((REG32(ADR_PAD231)) & 0x10000000 ) >> 28)
+#define GET_MP_PHY2RX_DATA__0_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000001 ) >> 0)
+#define GET_MP_PHY2RX_DATA__1_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000002 ) >> 1)
+#define GET_MP_TX_FF_RPTR__1_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000004 ) >> 2)
+#define GET_MP_RX_FF_WPTR__2_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000008 ) >> 3)
+#define GET_MP_RX_FF_WPTR__1_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000010 ) >> 4)
+#define GET_MP_RX_FF_WPTR__0_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000020 ) >> 5)
+#define GET_MP_PHY2RX_DATA__2_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000040 ) >> 6)
+#define GET_MP_PHY2RX_DATA__4_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000080 ) >> 7)
+#define GET_I2CM_SDA_ID_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000300 ) >> 8)
+#define GET_CRYSTAL_OUT_REQ_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000400 ) >> 10)
+#define GET_MP_PHY2RX_DATA__5_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00000800 ) >> 11)
+#define GET_MP_PHY2RX_DATA__3_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00001000 ) >> 12)
+#define GET_UART_RXD_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00006000 ) >> 13)
+#define GET_MP_PHY2RX_DATA__6_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00008000 ) >> 15)
+#define GET_DAT_UART_NCTS_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00010000 ) >> 16)
+#define GET_GPIO_LOG_STOP_SEL (((REG32(ADR_PIN_SEL_0)) & 0x000e0000 ) >> 17)
+#define GET_MP_TX_FF_RPTR__0_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00100000 ) >> 20)
+#define GET_MP_PHY_RX_WRST_N_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00200000 ) >> 21)
+#define GET_EXT_32K_SEL (((REG32(ADR_PIN_SEL_0)) & 0x00c00000 ) >> 22)
+#define GET_MP_PHY2RX_DATA__7_SEL (((REG32(ADR_PIN_SEL_0)) & 0x01000000 ) >> 24)
+#define GET_MP_TX_FF_RPTR__2_SEL (((REG32(ADR_PIN_SEL_0)) & 0x02000000 ) >> 25)
+#define GET_PMUINT_WAKE_SEL (((REG32(ADR_PIN_SEL_0)) & 0x1c000000 ) >> 26)
+#define GET_I2CM_SCL_ID_SEL (((REG32(ADR_PIN_SEL_0)) & 0x20000000 ) >> 29)
+#define GET_MP_MRX_RX_EN_SEL (((REG32(ADR_PIN_SEL_0)) & 0x40000000 ) >> 30)
+#define GET_DAT_UART_RXD_SEL_0 (((REG32(ADR_PIN_SEL_0)) & 0x80000000 ) >> 31)
+#define GET_DAT_UART_RXD_SEL_1 (((REG32(ADR_PIN_SEL_1)) & 0x00000001 ) >> 0)
+#define GET_SPI_DI_SEL (((REG32(ADR_PIN_SEL_1)) & 0x00000002 ) >> 1)
+#define GET_IO_PORT_REG (((REG32(ADR_IO_PORT_REG)) & 0x0001ffff ) >> 0)
+#define GET_MASK_RX_INT (((REG32(ADR_INT_MASK_REG)) & 0x00000001 ) >> 0)
+#define GET_MASK_TX_INT (((REG32(ADR_INT_MASK_REG)) & 0x00000002 ) >> 1)
+#define GET_MASK_SOC_SYSTEM_INT (((REG32(ADR_INT_MASK_REG)) & 0x00000004 ) >> 2)
+#define GET_EDCA0_LOW_THR_INT_MASK (((REG32(ADR_INT_MASK_REG)) & 0x00000008 ) >> 3)
+#define GET_EDCA1_LOW_THR_INT_MASK (((REG32(ADR_INT_MASK_REG)) & 0x00000010 ) >> 4)
+#define GET_EDCA2_LOW_THR_INT_MASK (((REG32(ADR_INT_MASK_REG)) & 0x00000020 ) >> 5)
+#define GET_EDCA3_LOW_THR_INT_MASK (((REG32(ADR_INT_MASK_REG)) & 0x00000040 ) >> 6)
+#define GET_TX_LIMIT_INT_MASK (((REG32(ADR_INT_MASK_REG)) & 0x00000080 ) >> 7)
+#define GET_RX_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000001 ) >> 0)
+#define GET_TX_COMPLETE_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000002 ) >> 1)
+#define GET_SOC_SYSTEM_INT_STATUS (((REG32(ADR_INT_STATUS_REG)) & 0x00000004 ) >> 2)
+#define GET_EDCA0_LOW_THR_INT_STS (((REG32(ADR_INT_STATUS_REG)) & 0x00000008 ) >> 3)
+#define GET_EDCA1_LOW_THR_INT_STS (((REG32(ADR_INT_STATUS_REG)) & 0x00000010 ) >> 4)
+#define GET_EDCA2_LOW_THR_INT_STS (((REG32(ADR_INT_STATUS_REG)) & 0x00000020 ) >> 5)
+#define GET_EDCA3_LOW_THR_INT_STS (((REG32(ADR_INT_STATUS_REG)) & 0x00000040 ) >> 6)
+#define GET_TX_LIMIT_INT_STS (((REG32(ADR_INT_STATUS_REG)) & 0x00000080 ) >> 7)
+#define GET_HOST_TRIGGERED_RX_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000100 ) >> 8)
+#define GET_HOST_TRIGGERED_TX_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000200 ) >> 9)
+#define GET_SOC_TRIGGER_RX_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000400 ) >> 10)
+#define GET_SOC_TRIGGER_TX_INT (((REG32(ADR_INT_STATUS_REG)) & 0x00000800 ) >> 11)
+#define GET_RDY_FOR_TX_RX (((REG32(ADR_FN1_STATUS_REG)) & 0x00000001 ) >> 0)
+#define GET_RDY_FOR_FW_DOWNLOAD (((REG32(ADR_FN1_STATUS_REG)) & 0x00000002 ) >> 1)
+#define GET_ILLEGAL_CMD_RESP_OPTION (((REG32(ADR_FN1_STATUS_REG)) & 0x00000004 ) >> 2)
+#define GET_SDIO_TRX_DATA_SEQUENCE (((REG32(ADR_FN1_STATUS_REG)) & 0x00000008 ) >> 3)
+#define GET_GPIO_INT_TRIGGER_OPTION (((REG32(ADR_FN1_STATUS_REG)) & 0x00000010 ) >> 4)
+#define GET_TRIGGER_FUNCTION_SETTING (((REG32(ADR_FN1_STATUS_REG)) & 0x00000060 ) >> 5)
+#define GET_CMD52_ABORT_RESPONSE (((REG32(ADR_FN1_STATUS_REG)) & 0x00000080 ) >> 7)
+#define GET_RX_PACKET_LENGTH (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x0000ffff ) >> 0)
+#define GET_CARD_FW_DL_STATUS (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x00ff0000 ) >> 16)
+#define GET_TX_RX_LOOP_BACK_TEST (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x01000000 ) >> 24)
+#define GET_SDIO_LOOP_BACK_TEST (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x02000000 ) >> 25)
+#define GET_CMD52_ABORT_ACTIVE (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x10000000 ) >> 28)
+#define GET_CMD52_RESET_ACTIVE (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x20000000 ) >> 29)
+#define GET_SDIO_PARTIAL_RESET_ACTIVE (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x40000000 ) >> 30)
+#define GET_SDIO_ALL_RESE_ACTIVE (((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x80000000 ) >> 31)
+#define GET_RX_PACKET_LENGTH2 (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x0000ffff ) >> 0)
+#define GET_RX_INT1 (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x00010000 ) >> 16)
+#define GET_TX_DONE (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x00020000 ) >> 17)
+#define GET_HCI_TRX_FINISH (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x00040000 ) >> 18)
+#define GET_ALLOCATE_STATUS (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x00080000 ) >> 19)
+#define GET_HCI_INPUT_FF_CNT (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x00f00000 ) >> 20)
+#define GET_HCI_OUTPUT_FF_CNT (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x1f000000 ) >> 24)
+#define GET_AHB_HANG4 (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x20000000 ) >> 29)
+#define GET_HCI_IN_QUE_EMPTY (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x40000000 ) >> 30)
+#define GET_SYSTEM_INT (((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x80000000 ) >> 31)
+#define GET_CARD_RCA_REG (((REG32(ADR_CARD_RCA_REG)) & 0x0000ffff ) >> 0)
+#define GET_SDIO_FIFO_WR_THLD_REG (((REG32(ADR_SDIO_FIFO_WR_THLD_REG)) & 0x000001ff ) >> 0)
+#define GET_SDIO_FIFO_WR_LIMIT_REG (((REG32(ADR_SDIO_FIFO_WR_LIMIT_REG)) & 0x000001ff ) >> 0)
+#define GET_SDIO_TX_DATA_BATCH_SIZE_REG (((REG32(ADR_SDIO_TX_DATA_BATCH_SIZE_REG)) & 0x000001ff ) >> 0)
+#define GET_SDIO_THLD_FOR_CMD53RD_REG (((REG32(ADR_SDIO_THLD_FOR_CMD53RD_REG)) & 0x000001ff ) >> 0)
+#define GET_SDIO_RX_DATA_BATCH_SIZE_REG (((REG32(ADR_SDIO_RX_DATA_BATCH_SIZE_REG)) & 0x000001ff ) >> 0)
+#define GET_START_BYTE_VALUE (((REG32(ADR_SDIO_LOG_START_END_DATA_REG)) & 0x000000ff ) >> 0)
+#define GET_END_BYTE_VALUE (((REG32(ADR_SDIO_LOG_START_END_DATA_REG)) & 0x0000ff00 ) >> 8)
+#define GET_SDIO_BYTE_MODE_BATCH_SIZE_REG (((REG32(ADR_SDIO_BYTE_MODE_BATCH_SIZE_REG)) & 0x000000ff ) >> 0)
+#define GET_SDIO_LAST_CMD_INDEX_REG (((REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) & 0x0000003f ) >> 0)
+#define GET_SDIO_LAST_CMD_CRC_REG (((REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) & 0x00007f00 ) >> 8)
+#define GET_SDIO_LAST_CMD_ARG_REG (((REG32(ADR_SDIO_LAST_CMD_ARG_REG)) & 0xffffffff ) >> 0)
+#define GET_SDIO_BUS_STATE_REG (((REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) & 0x0000001f ) >> 0)
+#define GET_SDIO_BUSY_LONG_CNT (((REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) & 0xffff0000 ) >> 16)
+#define GET_SDIO_CARD_STATUS_REG (((REG32(ADR_SDIO_CARD_STATUS_REG)) & 0xffffffff ) >> 0)
+#define GET_R5_RESPONSE_FLAG (((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0x000000ff ) >> 0)
+#define GET_RESP_OUT_EDGE (((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0x00000100 ) >> 8)
+#define GET_DAT_OUT_EDGE (((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0x00000200 ) >> 9)
+#define GET_MCU_TO_SDIO_INFO_MASK (((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0x00010000 ) >> 16)
+#define GET_INT_THROUGH_PIN (((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0x00020000 ) >> 17)
+#define GET_WRITE_DATA (((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0x000000ff ) >> 0)
+#define GET_WRITE_ADDRESS (((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0x0000ff00 ) >> 8)
+#define GET_READ_DATA (((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0x00ff0000 ) >> 16)
+#define GET_READ_ADDRESS (((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0xff000000 ) >> 24)
+#define GET_FN1_DMA_START_ADDR_REG (((REG32(ADR_FN1_DMA_START_ADDR_REG)) & 0xffffffff ) >> 0)
+#define GET_SDIO_TO_MCU_INFO (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x000000ff ) >> 0)
+#define GET_SDIO_PARTIAL_RESET (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x00000100 ) >> 8)
+#define GET_SDIO_ALL_RESET (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x00000200 ) >> 9)
+#define GET_PERI_MAC_ALL_RESET (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x00000400 ) >> 10)
+#define GET_MAC_ALL_RESET (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x00000800 ) >> 11)
+#define GET_AHB_BRIDGE_RESET (((REG32(ADR_FN1_INT_CTRL_RESET)) & 0x00001000 ) >> 12)
+#define GET_IO_REG_PORT_REG (((REG32(ADR_IO_REG_PORT_REG)) & 0x0001ffff ) >> 0)
+#define GET_SDIO_FIFO_EMPTY_CNT (((REG32(ADR_SDIO_FIFO_ERROR_CNT)) & 0x0000ffff ) >> 0)
+#define GET_SDIO_FIFO_FULL_CNT (((REG32(ADR_SDIO_FIFO_ERROR_CNT)) & 0xffff0000 ) >> 16)
+#define GET_SDIO_CRC7_ERROR_CNT (((REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) & 0x0000ffff ) >> 0)
+#define GET_SDIO_CRC16_ERROR_CNT (((REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) & 0xffff0000 ) >> 16)
+#define GET_SDIO_RD_BLOCK_CNT (((REG32(ADR_SDIO_BLOCK_CNT_INFO)) & 0x000001ff ) >> 0)
+#define GET_SDIO_WR_BLOCK_CNT (((REG32(ADR_SDIO_BLOCK_CNT_INFO)) & 0x01ff0000 ) >> 16)
+#define GET_CMD52_RD_ABORT_CNT (((REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) & 0x000f0000 ) >> 16)
+#define GET_CMD52_WR_ABORT_CNT (((REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) & 0x00f00000 ) >> 20)
+#define GET_SDIO_FIFO_WR_PTR_REG (((REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) & 0x000000ff ) >> 0)
+#define GET_SDIO_FIFO_RD_PTR_REG (((REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) & 0x0000ff00 ) >> 8)
+#define GET_SDIO_READ_DATA_CTRL (((REG32(ADR_TX_TIME_OUT_READ_CTRL)) & 0x00010000 ) >> 16)
+#define GET_TX_SIZE_BEFORE_SHIFT (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x000000ff ) >> 0)
+#define GET_TX_SIZE_SHIFT_BITS (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00000700 ) >> 8)
+#define GET_SDIO_TX_ALLOC_STATE (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00001000 ) >> 12)
+#define GET_ALLOCATE_STATUS2 (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00010000 ) >> 16)
+#define GET_NO_ALLOCATE_SEND_ERROR (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00020000 ) >> 17)
+#define GET_DOUBLE_ALLOCATE_ERROR (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00040000 ) >> 18)
+#define GET_TX_DONE_STATUS (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00080000 ) >> 19)
+#define GET_AHB_HANG2 (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00100000 ) >> 20)
+#define GET_HCI_TRX_FINISH2 (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00200000 ) >> 21)
+#define GET_INTR_RX (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00400000 ) >> 22)
+#define GET_HCI_INPUT_QUEUE_FULL (((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0x00800000 ) >> 23)
+#define GET_ALLOCATESTATUS (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000001 ) >> 0)
+#define GET_HCI_TRX_FINISH3 (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000002 ) >> 1)
+#define GET_HCI_IN_QUE_EMPTY2 (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000004 ) >> 2)
+#define GET_MTX_MNG_UPTHOLD_INT (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000008 ) >> 3)
+#define GET_EDCA0_UPTHOLD_INT (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000010 ) >> 4)
+#define GET_EDCA1_UPTHOLD_INT (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000020 ) >> 5)
+#define GET_EDCA2_UPTHOLD_INT (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000040 ) >> 6)
+#define GET_EDCA3_UPTHOLD_INT (((REG32(ADR_SDIO_TX_INFORM)) & 0x00000080 ) >> 7)
+#define GET_TX_PAGE_REMAIN2 (((REG32(ADR_SDIO_TX_INFORM)) & 0x0000ff00 ) >> 8)
+#define GET_TX_ID_REMAIN3 (((REG32(ADR_SDIO_TX_INFORM)) & 0x007f0000 ) >> 16)
+#define GET_HCI_OUTPUT_FF_CNT_0 (((REG32(ADR_SDIO_TX_INFORM)) & 0x00800000 ) >> 23)
+#define GET_HCI_OUTPUT_FF_CNT2 (((REG32(ADR_SDIO_TX_INFORM)) & 0x0f000000 ) >> 24)
+#define GET_HCI_INPUT_FF_CNT2 (((REG32(ADR_SDIO_TX_INFORM)) & 0xf0000000 ) >> 28)
+#define GET_F1_BLOCK_SIZE_0_REG (((REG32(ADR_F1_BLOCK_SIZE_0_REG)) & 0x00000fff ) >> 0)
+#define GET_START_BYTE_VALUE2 (((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0x000000ff ) >> 0)
+#define GET_COMMAND_COUNTER (((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0x0000ff00 ) >> 8)
+#define GET_CMD_LOG_PART1 (((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0xffff0000 ) >> 16)
+#define GET_CMD_LOG_PART2 (((REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) & 0x00ffffff ) >> 0)
+#define GET_END_BYTE_VALUE2 (((REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) & 0xff000000 ) >> 24)
+#define GET_RX_PACKET_LENGTH3 (((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0x0000ffff ) >> 0)
+#define GET_RX_INT3 (((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0x00010000 ) >> 16)
+#define GET_TX_ID_REMAIN2 (((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0x00fe0000 ) >> 17)
+#define GET_TX_PAGE_REMAIN3 (((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0xff000000 ) >> 24)
+#define GET_CCCR_00H_REG (((REG32(ADR_CCCR_00H_REG)) & 0x000000ff ) >> 0)
+#define GET_CCCR_02H_REG (((REG32(ADR_CCCR_00H_REG)) & 0x00ff0000 ) >> 16)
+#define GET_CCCR_03H_REG (((REG32(ADR_CCCR_00H_REG)) & 0xff000000 ) >> 24)
+#define GET_CCCR_04H_REG (((REG32(ADR_CCCR_04H_REG)) & 0x000000ff ) >> 0)
+#define GET_CCCR_05H_REG (((REG32(ADR_CCCR_04H_REG)) & 0x0000ff00 ) >> 8)
+#define GET_CCCR_06H_REG (((REG32(ADR_CCCR_04H_REG)) & 0x000f0000 ) >> 16)
+#define GET_CCCR_07H_REG (((REG32(ADR_CCCR_04H_REG)) & 0xff000000 ) >> 24)
+#define GET_SUPPORT_DIRECT_COMMAND_SDIO (((REG32(ADR_CCCR_08H_REG)) & 0x00000001 ) >> 0)
+#define GET_SUPPORT_MULTIPLE_BLOCK_TRANSFER (((REG32(ADR_CCCR_08H_REG)) & 0x00000002 ) >> 1)
+#define GET_SUPPORT_READ_WAIT (((REG32(ADR_CCCR_08H_REG)) & 0x00000004 ) >> 2)
+#define GET_SUPPORT_BUS_CONTROL (((REG32(ADR_CCCR_08H_REG)) & 0x00000008 ) >> 3)
+#define GET_SUPPORT_BLOCK_GAP_INTERRUPT (((REG32(ADR_CCCR_08H_REG)) & 0x00000010 ) >> 4)
+#define GET_ENABLE_BLOCK_GAP_INTERRUPT (((REG32(ADR_CCCR_08H_REG)) & 0x00000020 ) >> 5)
+#define GET_LOW_SPEED_CARD (((REG32(ADR_CCCR_08H_REG)) & 0x00000040 ) >> 6)
+#define GET_LOW_SPEED_CARD_4BIT (((REG32(ADR_CCCR_08H_REG)) & 0x00000080 ) >> 7)
+#define GET_COMMON_CIS_PONTER (((REG32(ADR_CCCR_08H_REG)) & 0x01ffff00 ) >> 8)
+#define GET_SUPPORT_HIGH_SPEED (((REG32(ADR_CCCR_13H_REG)) & 0x01000000 ) >> 24)
+#define GET_BSS (((REG32(ADR_CCCR_13H_REG)) & 0x0e000000 ) >> 25)
+#define GET_FBR_100H_REG (((REG32(ADR_FBR_100H_REG)) & 0x0000000f ) >> 0)
+#define GET_CSASUPPORT (((REG32(ADR_FBR_100H_REG)) & 0x00000040 ) >> 6)
+#define GET_ENABLECSA (((REG32(ADR_FBR_100H_REG)) & 0x00000080 ) >> 7)
+#define GET_FBR_101H_REG (((REG32(ADR_FBR_100H_REG)) & 0x0000ff00 ) >> 8)
+#define GET_FBR_109H_REG (((REG32(ADR_FBR_109H_REG)) & 0x01ffff00 ) >> 8)
+#define GET_F0_CIS_CONTENT_REG_31_0 (((REG32(ADR_F0_CIS_CONTENT_REG_0)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_63_32 (((REG32(ADR_F0_CIS_CONTENT_REG_1)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_95_64 (((REG32(ADR_F0_CIS_CONTENT_REG_2)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_127_96 (((REG32(ADR_F0_CIS_CONTENT_REG_3)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_159_128 (((REG32(ADR_F0_CIS_CONTENT_REG_4)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_191_160 (((REG32(ADR_F0_CIS_CONTENT_REG_5)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_223_192 (((REG32(ADR_F0_CIS_CONTENT_REG_6)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_255_224 (((REG32(ADR_F0_CIS_CONTENT_REG_7)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_287_256 (((REG32(ADR_F0_CIS_CONTENT_REG_8)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_319_288 (((REG32(ADR_F0_CIS_CONTENT_REG_9)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_351_320 (((REG32(ADR_F0_CIS_CONTENT_REG_10)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_383_352 (((REG32(ADR_F0_CIS_CONTENT_REG_11)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_415_384 (((REG32(ADR_F0_CIS_CONTENT_REG_12)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_447_416 (((REG32(ADR_F0_CIS_CONTENT_REG_13)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_479_448 (((REG32(ADR_F0_CIS_CONTENT_REG_14)) & 0xffffffff ) >> 0)
+#define GET_F0_CIS_CONTENT_REG_511_480 (((REG32(ADR_F0_CIS_CONTENT_REG_15)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_31_0 (((REG32(ADR_F1_CIS_CONTENT_REG_0)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_63_32 (((REG32(ADR_F1_CIS_CONTENT_REG_1)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_95_64 (((REG32(ADR_F1_CIS_CONTENT_REG_2)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_127_96 (((REG32(ADR_F1_CIS_CONTENT_REG_3)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_159_128 (((REG32(ADR_F1_CIS_CONTENT_REG_4)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_191_160 (((REG32(ADR_F1_CIS_CONTENT_REG_5)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_223_192 (((REG32(ADR_F1_CIS_CONTENT_REG_6)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_255_224 (((REG32(ADR_F1_CIS_CONTENT_REG_7)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_287_256 (((REG32(ADR_F1_CIS_CONTENT_REG_8)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_319_288 (((REG32(ADR_F1_CIS_CONTENT_REG_9)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_351_320 (((REG32(ADR_F1_CIS_CONTENT_REG_10)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_383_352 (((REG32(ADR_F1_CIS_CONTENT_REG_11)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_415_384 (((REG32(ADR_F1_CIS_CONTENT_REG_12)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_447_416 (((REG32(ADR_F1_CIS_CONTENT_REG_13)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_479_448 (((REG32(ADR_F1_CIS_CONTENT_REG_14)) & 0xffffffff ) >> 0)
+#define GET_F1_CIS_CONTENT_REG_511_480 (((REG32(ADR_F1_CIS_CONTENT_REG_15)) & 0xffffffff ) >> 0)
+#define GET_SPI_MODE (((REG32(ADR_SPI_MODE)) & 0xffffffff ) >> 0)
+#define GET_RX_QUOTA (((REG32(ADR_RX_QUOTA)) & 0x0000ffff ) >> 0)
+#define GET_CONDI_NUM (((REG32(ADR_CONDITION_NUMBER)) & 0x000000ff ) >> 0)
+#define GET_HOST_PATH (((REG32(ADR_HOST_PATH)) & 0x00000001 ) >> 0)
+#define GET_TX_SEG (((REG32(ADR_TX_SEG)) & 0xffffffff ) >> 0)
+#define GET_BRST_MODE (((REG32(ADR_DEBUG_BURST_MODE)) & 0x00000001 ) >> 0)
+#define GET_CLK_WIDTH (((REG32(ADR_SPI_TO_PHY_PARAM1)) & 0x0000ffff ) >> 0)
+#define GET_CSN_INTER (((REG32(ADR_SPI_TO_PHY_PARAM1)) & 0xffff0000 ) >> 16)
+#define GET_BACK_DLY (((REG32(ADR_SPI_TO_PHY_PARAM2)) & 0x0000ffff ) >> 0)
+#define GET_FRONT_DLY (((REG32(ADR_SPI_TO_PHY_PARAM2)) & 0xffff0000 ) >> 16)
+#define GET_RX_FIFO_FAIL (((REG32(ADR_SPI_STS)) & 0x00000002 ) >> 1)
+#define GET_RX_HOST_FAIL (((REG32(ADR_SPI_STS)) & 0x00000004 ) >> 2)
+#define GET_TX_FIFO_FAIL (((REG32(ADR_SPI_STS)) & 0x00000008 ) >> 3)
+#define GET_TX_HOST_FAIL (((REG32(ADR_SPI_STS)) & 0x00000010 ) >> 4)
+#define GET_SPI_DOUBLE_ALLOC (((REG32(ADR_SPI_STS)) & 0x00000020 ) >> 5)
+#define GET_SPI_TX_NO_ALLOC (((REG32(ADR_SPI_STS)) & 0x00000040 ) >> 6)
+#define GET_RDATA_RDY (((REG32(ADR_SPI_STS)) & 0x00000080 ) >> 7)
+#define GET_SPI_ALLOC_STATUS (((REG32(ADR_SPI_STS)) & 0x00000100 ) >> 8)
+#define GET_SPI_DBG_WR_FIFO_FULL (((REG32(ADR_SPI_STS)) & 0x00000200 ) >> 9)
+#define GET_RX_LEN (((REG32(ADR_SPI_STS)) & 0xffff0000 ) >> 16)
+#define GET_SPI_TX_ALLOC_SIZE_SHIFT_BITS (((REG32(ADR_TX_ALLOC_SET)) & 0x00000007 ) >> 0)
+#define GET_SPI_HOST_TX_ALLOC_PKBUF (((REG32(ADR_TX_ALLOC_SET)) & 0x00000100 ) >> 8)
+#define GET_SPI_TX_ALLOC_SIZE (((REG32(ADR_TX_ALLOC)) & 0x000000ff ) >> 0)
+#define GET_RD_DAT_CNT (((REG32(ADR_DBG_CNT)) & 0x0000ffff ) >> 0)
+#define GET_RD_STS_CNT (((REG32(ADR_DBG_CNT)) & 0xffff0000 ) >> 16)
+#define GET_JUDGE_CNT (((REG32(ADR_DBG_CNT2)) & 0x0000ffff ) >> 0)
+#define GET_RD_STS_CNT_CLR (((REG32(ADR_DBG_CNT2)) & 0x00010000 ) >> 16)
+#define GET_RD_DAT_CNT_CLR (((REG32(ADR_DBG_CNT2)) & 0x00020000 ) >> 17)
+#define GET_JUDGE_CNT_CLR (((REG32(ADR_DBG_CNT2)) & 0x00040000 ) >> 18)
+#define GET_TX_DONE_CNT (((REG32(ADR_DBG_CNT3)) & 0x0000ffff ) >> 0)
+#define GET_TX_DISCARD_CNT (((REG32(ADR_DBG_CNT3)) & 0xffff0000 ) >> 16)
+#define GET_TX_SET_CNT (((REG32(ADR_DBG_CNT4)) & 0x0000ffff ) >> 0)
+#define GET_TX_DISCARD_CNT_CLR (((REG32(ADR_DBG_CNT4)) & 0x00010000 ) >> 16)
+#define GET_TX_DONE_CNT_CLR (((REG32(ADR_DBG_CNT4)) & 0x00020000 ) >> 17)
+#define GET_TX_SET_CNT_CLR (((REG32(ADR_DBG_CNT4)) & 0x00040000 ) >> 18)
+#define GET_DAT_MODE_OFF (((REG32(ADR_DBG_CNT4)) & 0x00080000 ) >> 19)
+#define GET_TX_FIFO_RESIDUE (((REG32(ADR_DBG_CNT4)) & 0x00700000 ) >> 20)
+#define GET_RX_FIFO_RESIDUE (((REG32(ADR_DBG_CNT4)) & 0x07000000 ) >> 24)
+#define GET_RX_RDY (((REG32(ADR_INT_TAG)) & 0x00000001 ) >> 0)
+#define GET_SDIO_SYS_INT (((REG32(ADR_INT_TAG)) & 0x00000004 ) >> 2)
+#define GET_EDCA0_LOWTHOLD_INT (((REG32(ADR_INT_TAG)) & 0x00000008 ) >> 3)
+#define GET_EDCA1_LOWTHOLD_INT (((REG32(ADR_INT_TAG)) & 0x00000010 ) >> 4)
+#define GET_EDCA2_LOWTHOLD_INT (((REG32(ADR_INT_TAG)) & 0x00000020 ) >> 5)
+#define GET_EDCA3_LOWTHOLD_INT (((REG32(ADR_INT_TAG)) & 0x00000040 ) >> 6)
+#define GET_TX_LIMIT_INT_IN (((REG32(ADR_INT_TAG)) & 0x00000080 ) >> 7)
+#define GET_SPI_FN1 (((REG32(ADR_INT_TAG)) & 0x00007f00 ) >> 8)
+#define GET_SPI_CLK_EN_INT (((REG32(ADR_INT_TAG)) & 0x00008000 ) >> 15)
+#define GET_SPI_HOST_MASK (((REG32(ADR_INT_TAG)) & 0x00ff0000 ) >> 16)
+#define GET_I2CM_INT_WDONE (((REG32(ADR_I2CM_EN)) & 0x00000001 ) >> 0)
+#define GET_I2CM_INT_RDONE (((REG32(ADR_I2CM_EN)) & 0x00000002 ) >> 1)
+#define GET_I2CM_IDLE (((REG32(ADR_I2CM_EN)) & 0x00000004 ) >> 2)
+#define GET_I2CM_INT_MISMATCH (((REG32(ADR_I2CM_EN)) & 0x00000008 ) >> 3)
+#define GET_I2CM_PSCL (((REG32(ADR_I2CM_EN)) & 0x00003ff0 ) >> 4)
+#define GET_I2CM_MANUAL_MODE (((REG32(ADR_I2CM_EN)) & 0x00010000 ) >> 16)
+#define GET_I2CM_INT_WDATA_NEED (((REG32(ADR_I2CM_EN)) & 0x00020000 ) >> 17)
+#define GET_I2CM_INT_RDATA_NEED (((REG32(ADR_I2CM_EN)) & 0x00040000 ) >> 18)
+#define GET_I2CM_DEV_A (((REG32(ADR_I2CM_DEV_A)) & 0x000003ff ) >> 0)
+#define GET_I2CM_DEV_A10B (((REG32(ADR_I2CM_DEV_A)) & 0x00004000 ) >> 14)
+#define GET_I2CM_RX (((REG32(ADR_I2CM_DEV_A)) & 0x00008000 ) >> 15)
+#define GET_I2CM_LEN (((REG32(ADR_I2CM_LEN)) & 0x0000ffff ) >> 0)
+#define GET_I2CM_T_LEFT (((REG32(ADR_I2CM_LEN)) & 0x00070000 ) >> 16)
+#define GET_I2CM_R_GET (((REG32(ADR_I2CM_LEN)) & 0x07000000 ) >> 24)
+#define GET_I2CM_WDAT (((REG32(ADR_I2CM_WDAT)) & 0xffffffff ) >> 0)
+#define GET_I2CM_RDAT (((REG32(ADR_I2CM_RDAT)) & 0xffffffff ) >> 0)
+#define GET_I2CM_SR_LEN (((REG32(ADR_I2CM_EN_2)) & 0x0000ffff ) >> 0)
+#define GET_I2CM_SR_RX (((REG32(ADR_I2CM_EN_2)) & 0x00010000 ) >> 16)
+#define GET_I2CM_REPEAT_START (((REG32(ADR_I2CM_EN_2)) & 0x00020000 ) >> 17)
+#define GET_UART_DATA (((REG32(ADR_UART_DATA)) & 0x000000ff ) >> 0)
+#define GET_DATA_RDY_IE (((REG32(ADR_UART_IER)) & 0x00000001 ) >> 0)
+#define GET_THR_EMPTY_IE (((REG32(ADR_UART_IER)) & 0x00000002 ) >> 1)
+#define GET_RX_LINESTS_IE (((REG32(ADR_UART_IER)) & 0x00000004 ) >> 2)
+#define GET_MDM_STS_IE (((REG32(ADR_UART_IER)) & 0x00000008 ) >> 3)
+#define GET_DMA_RXEND_IE (((REG32(ADR_UART_IER)) & 0x00000040 ) >> 6)
+#define GET_DMA_TXEND_IE (((REG32(ADR_UART_IER)) & 0x00000080 ) >> 7)
+#define GET_FIFO_EN (((REG32(ADR_UART_FCR)) & 0x00000001 ) >> 0)
+#define GET_RXFIFO_RST (((REG32(ADR_UART_FCR)) & 0x00000002 ) >> 1)
+#define GET_TXFIFO_RST (((REG32(ADR_UART_FCR)) & 0x00000004 ) >> 2)
+#define GET_DMA_MODE (((REG32(ADR_UART_FCR)) & 0x00000008 ) >> 3)
+#define GET_EN_AUTO_RTS (((REG32(ADR_UART_FCR)) & 0x00000010 ) >> 4)
+#define GET_EN_AUTO_CTS (((REG32(ADR_UART_FCR)) & 0x00000020 ) >> 5)
+#define GET_RXFIFO_TRGLVL (((REG32(ADR_UART_FCR)) & 0x000000c0 ) >> 6)
+#define GET_WORD_LEN (((REG32(ADR_UART_LCR)) & 0x00000003 ) >> 0)
+#define GET_STOP_BIT (((REG32(ADR_UART_LCR)) & 0x00000004 ) >> 2)
+#define GET_PARITY_EN (((REG32(ADR_UART_LCR)) & 0x00000008 ) >> 3)
+#define GET_EVEN_PARITY (((REG32(ADR_UART_LCR)) & 0x00000010 ) >> 4)
+#define GET_FORCE_PARITY (((REG32(ADR_UART_LCR)) & 0x00000020 ) >> 5)
+#define GET_SET_BREAK (((REG32(ADR_UART_LCR)) & 0x00000040 ) >> 6)
+#define GET_DLAB (((REG32(ADR_UART_LCR)) & 0x00000080 ) >> 7)
+#define GET_DTR (((REG32(ADR_UART_MCR)) & 0x00000001 ) >> 0)
+#define GET_RTS (((REG32(ADR_UART_MCR)) & 0x00000002 ) >> 1)
+#define GET_OUT_1 (((REG32(ADR_UART_MCR)) & 0x00000004 ) >> 2)
+#define GET_OUT_2 (((REG32(ADR_UART_MCR)) & 0x00000008 ) >> 3)
+#define GET_LOOP_BACK (((REG32(ADR_UART_MCR)) & 0x00000010 ) >> 4)
+#define GET_DATA_RDY (((REG32(ADR_UART_LSR)) & 0x00000001 ) >> 0)
+#define GET_OVERRUN_ERR (((REG32(ADR_UART_LSR)) & 0x00000002 ) >> 1)
+#define GET_PARITY_ERR (((REG32(ADR_UART_LSR)) & 0x00000004 ) >> 2)
+#define GET_FRAMING_ERR (((REG32(ADR_UART_LSR)) & 0x00000008 ) >> 3)
+#define GET_BREAK_INT (((REG32(ADR_UART_LSR)) & 0x00000010 ) >> 4)
+#define GET_THR_EMPTY (((REG32(ADR_UART_LSR)) & 0x00000020 ) >> 5)
+#define GET_TX_EMPTY (((REG32(ADR_UART_LSR)) & 0x00000040 ) >> 6)
+#define GET_FIFODATA_ERR (((REG32(ADR_UART_LSR)) & 0x00000080 ) >> 7)
+#define GET_DELTA_CTS (((REG32(ADR_UART_MSR)) & 0x00000001 ) >> 0)
+#define GET_DELTA_DSR (((REG32(ADR_UART_MSR)) & 0x00000002 ) >> 1)
+#define GET_TRAILEDGE_RI (((REG32(ADR_UART_MSR)) & 0x00000004 ) >> 2)
+#define GET_DELTA_CD (((REG32(ADR_UART_MSR)) & 0x00000008 ) >> 3)
+#define GET_CTS (((REG32(ADR_UART_MSR)) & 0x00000010 ) >> 4)
+#define GET_DSR (((REG32(ADR_UART_MSR)) & 0x00000020 ) >> 5)
+#define GET_RI (((REG32(ADR_UART_MSR)) & 0x00000040 ) >> 6)
+#define GET_CD (((REG32(ADR_UART_MSR)) & 0x00000080 ) >> 7)
+#define GET_BRDC_DIV (((REG32(ADR_UART_SPR)) & 0x0000ffff ) >> 0)
+#define GET_RTHR_L (((REG32(ADR_UART_RTHR)) & 0x0000000f ) >> 0)
+#define GET_RTHR_H (((REG32(ADR_UART_RTHR)) & 0x000000f0 ) >> 4)
+#define GET_INT_IDCODE (((REG32(ADR_UART_ISR)) & 0x0000000f ) >> 0)
+#define GET_FIFOS_ENABLED (((REG32(ADR_UART_ISR)) & 0x000000c0 ) >> 6)
+#define GET_DAT_UART_DATA (((REG32(ADR_DAT_UART_DATA)) & 0x000000ff ) >> 0)
+#define GET_DAT_DATA_RDY_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000001 ) >> 0)
+#define GET_DAT_THR_EMPTY_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000002 ) >> 1)
+#define GET_DAT_RX_LINESTS_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000004 ) >> 2)
+#define GET_DAT_MDM_STS_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000008 ) >> 3)
+#define GET_DAT_DMA_RXEND_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000040 ) >> 6)
+#define GET_DAT_DMA_TXEND_IE (((REG32(ADR_DAT_UART_IER)) & 0x00000080 ) >> 7)
+#define GET_DAT_FIFO_EN (((REG32(ADR_DAT_UART_FCR)) & 0x00000001 ) >> 0)
+#define GET_DAT_RXFIFO_RST (((REG32(ADR_DAT_UART_FCR)) & 0x00000002 ) >> 1)
+#define GET_DAT_TXFIFO_RST (((REG32(ADR_DAT_UART_FCR)) & 0x00000004 ) >> 2)
+#define GET_DAT_DMA_MODE (((REG32(ADR_DAT_UART_FCR)) & 0x00000008 ) >> 3)
+#define GET_DAT_EN_AUTO_RTS (((REG32(ADR_DAT_UART_FCR)) & 0x00000010 ) >> 4)
+#define GET_DAT_EN_AUTO_CTS (((REG32(ADR_DAT_UART_FCR)) & 0x00000020 ) >> 5)
+#define GET_DAT_RXFIFO_TRGLVL (((REG32(ADR_DAT_UART_FCR)) & 0x000000c0 ) >> 6)
+#define GET_DAT_WORD_LEN (((REG32(ADR_DAT_UART_LCR)) & 0x00000003 ) >> 0)
+#define GET_DAT_STOP_BIT (((REG32(ADR_DAT_UART_LCR)) & 0x00000004 ) >> 2)
+#define GET_DAT_PARITY_EN (((REG32(ADR_DAT_UART_LCR)) & 0x00000008 ) >> 3)
+#define GET_DAT_EVEN_PARITY (((REG32(ADR_DAT_UART_LCR)) & 0x00000010 ) >> 4)
+#define GET_DAT_FORCE_PARITY (((REG32(ADR_DAT_UART_LCR)) & 0x00000020 ) >> 5)
+#define GET_DAT_SET_BREAK (((REG32(ADR_DAT_UART_LCR)) & 0x00000040 ) >> 6)
+#define GET_DAT_DLAB (((REG32(ADR_DAT_UART_LCR)) & 0x00000080 ) >> 7)
+#define GET_DAT_DTR (((REG32(ADR_DAT_UART_MCR)) & 0x00000001 ) >> 0)
+#define GET_DAT_RTS (((REG32(ADR_DAT_UART_MCR)) & 0x00000002 ) >> 1)
+#define GET_DAT_OUT_1 (((REG32(ADR_DAT_UART_MCR)) & 0x00000004 ) >> 2)
+#define GET_DAT_OUT_2 (((REG32(ADR_DAT_UART_MCR)) & 0x00000008 ) >> 3)
+#define GET_DAT_LOOP_BACK (((REG32(ADR_DAT_UART_MCR)) & 0x00000010 ) >> 4)
+#define GET_DAT_DATA_RDY (((REG32(ADR_DAT_UART_LSR)) & 0x00000001 ) >> 0)
+#define GET_DAT_OVERRUN_ERR (((REG32(ADR_DAT_UART_LSR)) & 0x00000002 ) >> 1)
+#define GET_DAT_PARITY_ERR (((REG32(ADR_DAT_UART_LSR)) & 0x00000004 ) >> 2)
+#define GET_DAT_FRAMING_ERR (((REG32(ADR_DAT_UART_LSR)) & 0x00000008 ) >> 3)
+#define GET_DAT_BREAK_INT (((REG32(ADR_DAT_UART_LSR)) & 0x00000010 ) >> 4)
+#define GET_DAT_THR_EMPTY (((REG32(ADR_DAT_UART_LSR)) & 0x00000020 ) >> 5)
+#define GET_DAT_TX_EMPTY (((REG32(ADR_DAT_UART_LSR)) & 0x00000040 ) >> 6)
+#define GET_DAT_FIFODATA_ERR (((REG32(ADR_DAT_UART_LSR)) & 0x00000080 ) >> 7)
+#define GET_DAT_DELTA_CTS (((REG32(ADR_DAT_UART_MSR)) & 0x00000001 ) >> 0)
+#define GET_DAT_DELTA_DSR (((REG32(ADR_DAT_UART_MSR)) & 0x00000002 ) >> 1)
+#define GET_DAT_TRAILEDGE_RI (((REG32(ADR_DAT_UART_MSR)) & 0x00000004 ) >> 2)
+#define GET_DAT_DELTA_CD (((REG32(ADR_DAT_UART_MSR)) & 0x00000008 ) >> 3)
+#define GET_DAT_CTS (((REG32(ADR_DAT_UART_MSR)) & 0x00000010 ) >> 4)
+#define GET_DAT_DSR (((REG32(ADR_DAT_UART_MSR)) & 0x00000020 ) >> 5)
+#define GET_DAT_RI (((REG32(ADR_DAT_UART_MSR)) & 0x00000040 ) >> 6)
+#define GET_DAT_CD (((REG32(ADR_DAT_UART_MSR)) & 0x00000080 ) >> 7)
+#define GET_DAT_BRDC_DIV (((REG32(ADR_DAT_UART_SPR)) & 0x0000ffff ) >> 0)
+#define GET_DAT_RTHR_L (((REG32(ADR_DAT_UART_RTHR)) & 0x0000000f ) >> 0)
+#define GET_DAT_RTHR_H (((REG32(ADR_DAT_UART_RTHR)) & 0x000000f0 ) >> 4)
+#define GET_DAT_INT_IDCODE (((REG32(ADR_DAT_UART_ISR)) & 0x0000000f ) >> 0)
+#define GET_DAT_FIFOS_ENABLED (((REG32(ADR_DAT_UART_ISR)) & 0x000000c0 ) >> 6)
+#define GET_MASK_TOP (((REG32(ADR_INT_MASK)) & 0xffffffff ) >> 0)
+#define GET_INT_MODE (((REG32(ADR_INT_MODE)) & 0xffffffff ) >> 0)
+#define GET_IRQ_PHY_0 (((REG32(ADR_INT_IRQ_STS)) & 0x00000001 ) >> 0)
+#define GET_IRQ_PHY_1 (((REG32(ADR_INT_IRQ_STS)) & 0x00000002 ) >> 1)
+#define GET_IRQ_SDIO (((REG32(ADR_INT_IRQ_STS)) & 0x00000004 ) >> 2)
+#define GET_IRQ_BEACON_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000008 ) >> 3)
+#define GET_IRQ_BEACON (((REG32(ADR_INT_IRQ_STS)) & 0x00000010 ) >> 4)
+#define GET_IRQ_PRE_BEACON (((REG32(ADR_INT_IRQ_STS)) & 0x00000020 ) >> 5)
+#define GET_IRQ_EDCA0_TX_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000040 ) >> 6)
+#define GET_IRQ_EDCA1_TX_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000080 ) >> 7)
+#define GET_IRQ_EDCA2_TX_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000100 ) >> 8)
+#define GET_IRQ_EDCA3_TX_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000200 ) >> 9)
+#define GET_IRQ_EDCA4_TX_DONE (((REG32(ADR_INT_IRQ_STS)) & 0x00000400 ) >> 10)
+#define GET_IRQ_BEACON_DTIM (((REG32(ADR_INT_IRQ_STS)) & 0x00001000 ) >> 12)
+#define GET_IRQ_EDCA0_LOWTHOLD_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00002000 ) >> 13)
+#define GET_IRQ_EDCA1_LOWTHOLD_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00004000 ) >> 14)
+#define GET_IRQ_EDCA2_LOWTHOLD_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00008000 ) >> 15)
+#define GET_IRQ_EDCA3_LOWTHOLD_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00010000 ) >> 16)
+#define GET_IRQ_FENCE_HIT_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00020000 ) >> 17)
+#define GET_IRQ_ILL_ADDR_INT (((REG32(ADR_INT_IRQ_STS)) & 0x00040000 ) >> 18)
+#define GET_IRQ_MBOX (((REG32(ADR_INT_IRQ_STS)) & 0x00080000 ) >> 19)
+#define GET_IRQ_US_TIMER0 (((REG32(ADR_INT_IRQ_STS)) & 0x00100000 ) >> 20)
+#define GET_IRQ_US_TIMER1 (((REG32(ADR_INT_IRQ_STS)) & 0x00200000 ) >> 21)
+#define GET_IRQ_US_TIMER2 (((REG32(ADR_INT_IRQ_STS)) & 0x00400000 ) >> 22)
+#define GET_IRQ_US_TIMER3 (((REG32(ADR_INT_IRQ_STS)) & 0x00800000 ) >> 23)
+#define GET_IRQ_MS_TIMER0 (((REG32(ADR_INT_IRQ_STS)) & 0x01000000 ) >> 24)
+#define GET_IRQ_MS_TIMER1 (((REG32(ADR_INT_IRQ_STS)) & 0x02000000 ) >> 25)
+#define GET_IRQ_MS_TIMER2 (((REG32(ADR_INT_IRQ_STS)) & 0x04000000 ) >> 26)
+#define GET_IRQ_MS_TIMER3 (((REG32(ADR_INT_IRQ_STS)) & 0x08000000 ) >> 27)
+#define GET_IRQ_TX_LIMIT_INT (((REG32(ADR_INT_IRQ_STS)) & 0x10000000 ) >> 28)
+#define GET_IRQ_DMA0 (((REG32(ADR_INT_IRQ_STS)) & 0x20000000 ) >> 29)
+#define GET_IRQ_CO_DMA (((REG32(ADR_INT_IRQ_STS)) & 0x40000000 ) >> 30)
+#define GET_IRQ_PERI_GROUP (((REG32(ADR_INT_IRQ_STS)) & 0x80000000 ) >> 31)
+#define GET_FIQ_STATUS (((REG32(ADR_INT_FIQ_STS)) & 0xffffffff ) >> 0)
+#define GET_IRQ_RAW (((REG32(ADR_INT_IRQ_RAW)) & 0xffffffff ) >> 0)
+#define GET_FIQ_RAW (((REG32(ADR_INT_FIQ_RAW)) & 0xffffffff ) >> 0)
+#define GET_INT_PERI_MASK (((REG32(ADR_INT_PERI_MASK)) & 0xffffffff ) >> 0)
+#define GET_PERI_RTC (((REG32(ADR_INT_PERI_STS)) & 0x00000001 ) >> 0)
+#define GET_IRQ_UART0_TX (((REG32(ADR_INT_PERI_STS)) & 0x00000002 ) >> 1)
+#define GET_IRQ_UART0_RX (((REG32(ADR_INT_PERI_STS)) & 0x00000004 ) >> 2)
+#define GET_PERI_GPI_2 (((REG32(ADR_INT_PERI_STS)) & 0x00000008 ) >> 3)
+#define GET_IRQ_SPI_IPC (((REG32(ADR_INT_PERI_STS)) & 0x00000010 ) >> 4)
+#define GET_PERI_GPI_1_0 (((REG32(ADR_INT_PERI_STS)) & 0x00000060 ) >> 5)
+#define GET_SCRT_INT_1 (((REG32(ADR_INT_PERI_STS)) & 0x00000080 ) >> 7)
+#define GET_MMU_ALC_ERR (((REG32(ADR_INT_PERI_STS)) & 0x00000100 ) >> 8)
+#define GET_MMU_RLS_ERR (((REG32(ADR_INT_PERI_STS)) & 0x00000200 ) >> 9)
+#define GET_ID_MNG_INT_1 (((REG32(ADR_INT_PERI_STS)) & 0x00000400 ) >> 10)
+#define GET_MBOX_INT_1 (((REG32(ADR_INT_PERI_STS)) & 0x00000800 ) >> 11)
+#define GET_MBOX_INT_2 (((REG32(ADR_INT_PERI_STS)) & 0x00001000 ) >> 12)
+#define GET_MBOX_INT_3 (((REG32(ADR_INT_PERI_STS)) & 0x00002000 ) >> 13)
+#define GET_HCI_INT_1 (((REG32(ADR_INT_PERI_STS)) & 0x00004000 ) >> 14)
+#define GET_UART_RX_TIMEOUT (((REG32(ADR_INT_PERI_STS)) & 0x00008000 ) >> 15)
+#define GET_UART_MULTI_IRQ (((REG32(ADR_INT_PERI_STS)) & 0x00010000 ) >> 16)
+#define GET_ID_MNG_INT_2 (((REG32(ADR_INT_PERI_STS)) & 0x00020000 ) >> 17)
+#define GET_DMN_NOHIT_INT (((REG32(ADR_INT_PERI_STS)) & 0x00040000 ) >> 18)
+#define GET_ID_THOLD_RX (((REG32(ADR_INT_PERI_STS)) & 0x00080000 ) >> 19)
+#define GET_ID_THOLD_TX (((REG32(ADR_INT_PERI_STS)) & 0x00100000 ) >> 20)
+#define GET_ID_DOUBLE_RLS (((REG32(ADR_INT_PERI_STS)) & 0x00200000 ) >> 21)
+#define GET_RX_ID_LEN_THOLD (((REG32(ADR_INT_PERI_STS)) & 0x00400000 ) >> 22)
+#define GET_TX_ID_LEN_THOLD (((REG32(ADR_INT_PERI_STS)) & 0x00800000 ) >> 23)
+#define GET_ALL_ID_LEN_THOLD (((REG32(ADR_INT_PERI_STS)) & 0x01000000 ) >> 24)
+#define GET_DMN_MCU_INT (((REG32(ADR_INT_PERI_STS)) & 0x02000000 ) >> 25)
+#define GET_IRQ_DAT_UART_TX (((REG32(ADR_INT_PERI_STS)) & 0x04000000 ) >> 26)
+#define GET_IRQ_DAT_UART_RX (((REG32(ADR_INT_PERI_STS)) & 0x08000000 ) >> 27)
+#define GET_DAT_UART_RX_TIMEOUT (((REG32(ADR_INT_PERI_STS)) & 0x10000000 ) >> 28)
+#define GET_DAT_UART_MULTI_IRQ (((REG32(ADR_INT_PERI_STS)) & 0x20000000 ) >> 29)
+#define GET_ALR_ABT_NOCHG_INT_IRQ (((REG32(ADR_INT_PERI_STS)) & 0x40000000 ) >> 30)
+#define GET_TBLNEQ_MNGPKT_INT_IRQ (((REG32(ADR_INT_PERI_STS)) & 0x80000000 ) >> 31)
+#define GET_INTR_PERI_RAW (((REG32(ADR_INT_PERI_RAW)) & 0xffffffff ) >> 0)
+#define GET_INTR_GPI00_CFG (((REG32(ADR_INT_GPI_CFG)) & 0x00000003 ) >> 0)
+#define GET_INTR_GPI01_CFG (((REG32(ADR_INT_GPI_CFG)) & 0x0000000c ) >> 2)
+#define GET_SYS_RST_INT (((REG32(ADR_SYS_INT_FOR_HOST)) & 0x00000001 ) >> 0)
+#define GET_SPI_IPC_ADDR (((REG32(ADR_SPI_IPC)) & 0xffffffff ) >> 0)
+#define GET_SD_MASK_TOP (((REG32(ADR_SDIO_MASK)) & 0xffffffff ) >> 0)
+#define GET_IRQ_PHY_0_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000001 ) >> 0)
+#define GET_IRQ_PHY_1_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000002 ) >> 1)
+#define GET_IRQ_SDIO_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000004 ) >> 2)
+#define GET_IRQ_BEACON_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000008 ) >> 3)
+#define GET_IRQ_BEACON_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000010 ) >> 4)
+#define GET_IRQ_PRE_BEACON_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000020 ) >> 5)
+#define GET_IRQ_EDCA0_TX_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000040 ) >> 6)
+#define GET_IRQ_EDCA1_TX_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000080 ) >> 7)
+#define GET_IRQ_EDCA2_TX_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000100 ) >> 8)
+#define GET_IRQ_EDCA3_TX_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000200 ) >> 9)
+#define GET_IRQ_EDCA4_TX_DONE_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00000400 ) >> 10)
+#define GET_IRQ_BEACON_DTIM_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00001000 ) >> 12)
+#define GET_IRQ_EDCA0_LOWTHOLD_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00002000 ) >> 13)
+#define GET_IRQ_EDCA1_LOWTHOLD_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00004000 ) >> 14)
+#define GET_IRQ_EDCA2_LOWTHOLD_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00008000 ) >> 15)
+#define GET_IRQ_EDCA3_LOWTHOLD_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00010000 ) >> 16)
+#define GET_IRQ_FENCE_HIT_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00020000 ) >> 17)
+#define GET_IRQ_ILL_ADDR_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00040000 ) >> 18)
+#define GET_IRQ_MBOX_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00080000 ) >> 19)
+#define GET_IRQ_US_TIMER0_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00100000 ) >> 20)
+#define GET_IRQ_US_TIMER1_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00200000 ) >> 21)
+#define GET_IRQ_US_TIMER2_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00400000 ) >> 22)
+#define GET_IRQ_US_TIMER3_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x00800000 ) >> 23)
+#define GET_IRQ_MS_TIMER0_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x01000000 ) >> 24)
+#define GET_IRQ_MS_TIMER1_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x02000000 ) >> 25)
+#define GET_IRQ_MS_TIMER2_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x04000000 ) >> 26)
+#define GET_IRQ_MS_TIMER3_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x08000000 ) >> 27)
+#define GET_IRQ_TX_LIMIT_INT_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x10000000 ) >> 28)
+#define GET_IRQ_DMA0_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x20000000 ) >> 29)
+#define GET_IRQ_CO_DMA_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x40000000 ) >> 30)
+#define GET_IRQ_PERI_GROUP_SD (((REG32(ADR_SDIO_IRQ_STS)) & 0x80000000 ) >> 31)
+#define GET_INT_PERI_MASK_SD (((REG32(ADR_SD_PERI_MASK)) & 0xffffffff ) >> 0)
+#define GET_PERI_RTC_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000001 ) >> 0)
+#define GET_IRQ_UART0_TX_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000002 ) >> 1)
+#define GET_IRQ_UART0_RX_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000004 ) >> 2)
+#define GET_PERI_GPI_SD_2 (((REG32(ADR_SD_PERI_STS)) & 0x00000008 ) >> 3)
+#define GET_IRQ_SPI_IPC_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000010 ) >> 4)
+#define GET_PERI_GPI_SD_1_0 (((REG32(ADR_SD_PERI_STS)) & 0x00000060 ) >> 5)
+#define GET_SCRT_INT_1_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000080 ) >> 7)
+#define GET_MMU_ALC_ERR_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000100 ) >> 8)
+#define GET_MMU_RLS_ERR_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000200 ) >> 9)
+#define GET_ID_MNG_INT_1_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000400 ) >> 10)
+#define GET_MBOX_INT_1_SD (((REG32(ADR_SD_PERI_STS)) & 0x00000800 ) >> 11)
+#define GET_MBOX_INT_2_SD (((REG32(ADR_SD_PERI_STS)) & 0x00001000 ) >> 12)
+#define GET_MBOX_INT_3_SD (((REG32(ADR_SD_PERI_STS)) & 0x00002000 ) >> 13)
+#define GET_HCI_INT_1_SD (((REG32(ADR_SD_PERI_STS)) & 0x00004000 ) >> 14)
+#define GET_UART_RX_TIMEOUT_SD (((REG32(ADR_SD_PERI_STS)) & 0x00008000 ) >> 15)
+#define GET_UART_MULTI_IRQ_SD (((REG32(ADR_SD_PERI_STS)) & 0x00010000 ) >> 16)
+#define GET_ID_MNG_INT_2_SD (((REG32(ADR_SD_PERI_STS)) & 0x00020000 ) >> 17)
+#define GET_DMN_NOHIT_INT_SD (((REG32(ADR_SD_PERI_STS)) & 0x00040000 ) >> 18)
+#define GET_ID_THOLD_RX_SD (((REG32(ADR_SD_PERI_STS)) & 0x00080000 ) >> 19)
+#define GET_ID_THOLD_TX_SD (((REG32(ADR_SD_PERI_STS)) & 0x00100000 ) >> 20)
+#define GET_ID_DOUBLE_RLS_SD (((REG32(ADR_SD_PERI_STS)) & 0x00200000 ) >> 21)
+#define GET_RX_ID_LEN_THOLD_SD (((REG32(ADR_SD_PERI_STS)) & 0x00400000 ) >> 22)
+#define GET_TX_ID_LEN_THOLD_SD (((REG32(ADR_SD_PERI_STS)) & 0x00800000 ) >> 23)
+#define GET_ALL_ID_LEN_THOLD_SD (((REG32(ADR_SD_PERI_STS)) & 0x01000000 ) >> 24)
+#define GET_DMN_MCU_INT_SD (((REG32(ADR_SD_PERI_STS)) & 0x02000000 ) >> 25)
+#define GET_IRQ_DAT_UART_TX_SD (((REG32(ADR_SD_PERI_STS)) & 0x04000000 ) >> 26)
+#define GET_IRQ_DAT_UART_RX_SD (((REG32(ADR_SD_PERI_STS)) & 0x08000000 ) >> 27)
+#define GET_DAT_UART_RX_TIMEOUT_SD (((REG32(ADR_SD_PERI_STS)) & 0x10000000 ) >> 28)
+#define GET_DAT_UART_MULTI_IRQ_SD (((REG32(ADR_SD_PERI_STS)) & 0x20000000 ) >> 29)
+#define GET_ALR_ABT_NOCHG_INT_IRQ_SD (((REG32(ADR_SD_PERI_STS)) & 0x40000000 ) >> 30)
+#define GET_TBLNEQ_MNGPKT_INT_IRQ_SD (((REG32(ADR_SD_PERI_STS)) & 0x80000000 ) >> 31)
+#define GET_DBG_SPI_MODE (((REG32(ADR_DBG_SPI_MODE)) & 0xffffffff ) >> 0)
+#define GET_DBG_RX_QUOTA (((REG32(ADR_DBG_RX_QUOTA)) & 0x0000ffff ) >> 0)
+#define GET_DBG_CONDI_NUM (((REG32(ADR_DBG_CONDITION_NUMBER)) & 0x000000ff ) >> 0)
+#define GET_DBG_HOST_PATH (((REG32(ADR_DBG_HOST_PATH)) & 0x00000001 ) >> 0)
+#define GET_DBG_TX_SEG (((REG32(ADR_DBG_TX_SEG)) & 0xffffffff ) >> 0)
+#define GET_DBG_BRST_MODE (((REG32(ADR_DBG_DEBUG_BURST_MODE)) & 0x00000001 ) >> 0)
+#define GET_DBG_CLK_WIDTH (((REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) & 0x0000ffff ) >> 0)
+#define GET_DBG_CSN_INTER (((REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) & 0xffff0000 ) >> 16)
+#define GET_DBG_BACK_DLY (((REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) & 0x0000ffff ) >> 0)
+#define GET_DBG_FRONT_DLY (((REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) & 0xffff0000 ) >> 16)
+#define GET_DBG_RX_FIFO_FAIL (((REG32(ADR_DBG_SPI_STS)) & 0x00000002 ) >> 1)
+#define GET_DBG_RX_HOST_FAIL (((REG32(ADR_DBG_SPI_STS)) & 0x00000004 ) >> 2)
+#define GET_DBG_TX_FIFO_FAIL (((REG32(ADR_DBG_SPI_STS)) & 0x00000008 ) >> 3)
+#define GET_DBG_TX_HOST_FAIL (((REG32(ADR_DBG_SPI_STS)) & 0x00000010 ) >> 4)
+#define GET_DBG_SPI_DOUBLE_ALLOC (((REG32(ADR_DBG_SPI_STS)) & 0x00000020 ) >> 5)
+#define GET_DBG_SPI_TX_NO_ALLOC (((REG32(ADR_DBG_SPI_STS)) & 0x00000040 ) >> 6)
+#define GET_DBG_RDATA_RDY (((REG32(ADR_DBG_SPI_STS)) & 0x00000080 ) >> 7)
+#define GET_DBG_SPI_ALLOC_STATUS (((REG32(ADR_DBG_SPI_STS)) & 0x00000100 ) >> 8)
+#define GET_DBG_SPI_DBG_WR_FIFO_FULL (((REG32(ADR_DBG_SPI_STS)) & 0x00000200 ) >> 9)
+#define GET_DBG_RX_LEN (((REG32(ADR_DBG_SPI_STS)) & 0xffff0000 ) >> 16)
+#define GET_DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS (((REG32(ADR_DBG_TX_ALLOC_SET)) & 0x00000007 ) >> 0)
+#define GET_DBG_SPI_HOST_TX_ALLOC_PKBUF (((REG32(ADR_DBG_TX_ALLOC_SET)) & 0x00000100 ) >> 8)
+#define GET_DBG_SPI_TX_ALLOC_SIZE (((REG32(ADR_DBG_TX_ALLOC)) & 0x000000ff ) >> 0)
+#define GET_DBG_RD_DAT_CNT (((REG32(ADR_DBG_DBG_CNT)) & 0x0000ffff ) >> 0)
+#define GET_DBG_RD_STS_CNT (((REG32(ADR_DBG_DBG_CNT)) & 0xffff0000 ) >> 16)
+#define GET_DBG_JUDGE_CNT (((REG32(ADR_DBG_DBG_CNT2)) & 0x0000ffff ) >> 0)
+#define GET_DBG_RD_STS_CNT_CLR (((REG32(ADR_DBG_DBG_CNT2)) & 0x00010000 ) >> 16)
+#define GET_DBG_RD_DAT_CNT_CLR (((REG32(ADR_DBG_DBG_CNT2)) & 0x00020000 ) >> 17)
+#define GET_DBG_JUDGE_CNT_CLR (((REG32(ADR_DBG_DBG_CNT2)) & 0x00040000 ) >> 18)
+#define GET_DBG_TX_DONE_CNT (((REG32(ADR_DBG_DBG_CNT3)) & 0x0000ffff ) >> 0)
+#define GET_DBG_TX_DISCARD_CNT (((REG32(ADR_DBG_DBG_CNT3)) & 0xffff0000 ) >> 16)
+#define GET_DBG_TX_SET_CNT (((REG32(ADR_DBG_DBG_CNT4)) & 0x0000ffff ) >> 0)
+#define GET_DBG_TX_DISCARD_CNT_CLR (((REG32(ADR_DBG_DBG_CNT4)) & 0x00010000 ) >> 16)
+#define GET_DBG_TX_DONE_CNT_CLR (((REG32(ADR_DBG_DBG_CNT4)) & 0x00020000 ) >> 17)
+#define GET_DBG_TX_SET_CNT_CLR (((REG32(ADR_DBG_DBG_CNT4)) & 0x00040000 ) >> 18)
+#define GET_DBG_DAT_MODE_OFF (((REG32(ADR_DBG_DBG_CNT4)) & 0x00080000 ) >> 19)
+#define GET_DBG_TX_FIFO_RESIDUE (((REG32(ADR_DBG_DBG_CNT4)) & 0x00700000 ) >> 20)
+#define GET_DBG_RX_FIFO_RESIDUE (((REG32(ADR_DBG_DBG_CNT4)) & 0x07000000 ) >> 24)
+#define GET_DBG_RX_RDY (((REG32(ADR_DBG_INT_TAG)) & 0x00000001 ) >> 0)
+#define GET_DBG_SDIO_SYS_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00000004 ) >> 2)
+#define GET_DBG_EDCA0_LOWTHOLD_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00000008 ) >> 3)
+#define GET_DBG_EDCA1_LOWTHOLD_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00000010 ) >> 4)
+#define GET_DBG_EDCA2_LOWTHOLD_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00000020 ) >> 5)
+#define GET_DBG_EDCA3_LOWTHOLD_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00000040 ) >> 6)
+#define GET_DBG_TX_LIMIT_INT_IN (((REG32(ADR_DBG_INT_TAG)) & 0x00000080 ) >> 7)
+#define GET_DBG_SPI_FN1 (((REG32(ADR_DBG_INT_TAG)) & 0x00007f00 ) >> 8)
+#define GET_DBG_SPI_CLK_EN_INT (((REG32(ADR_DBG_INT_TAG)) & 0x00008000 ) >> 15)
+#define GET_DBG_SPI_HOST_MASK (((REG32(ADR_DBG_INT_TAG)) & 0x00ff0000 ) >> 16)
+#define GET_BOOT_ADDR (((REG32(ADR_BOOT_ADDR)) & 0x00ffffff ) >> 0)
+#define GET_CHECK_SUM_FAIL (((REG32(ADR_BOOT_ADDR)) & 0x80000000 ) >> 31)
+#define GET_VERIFY_DATA (((REG32(ADR_VERIFY_DATA)) & 0xffffffff ) >> 0)
+#define GET_FLASH_ADDR (((REG32(ADR_FLASH_ADDR)) & 0x00ffffff ) >> 0)
+#define GET_FLASH_CMD_CLR (((REG32(ADR_FLASH_ADDR)) & 0x10000000 ) >> 28)
+#define GET_FLASH_DMA_CLR (((REG32(ADR_FLASH_ADDR)) & 0x20000000 ) >> 29)
+#define GET_DMA_EN (((REG32(ADR_FLASH_ADDR)) & 0x40000000 ) >> 30)
+#define GET_DMA_BUSY (((REG32(ADR_FLASH_ADDR)) & 0x80000000 ) >> 31)
+#define GET_SRAM_ADDR (((REG32(ADR_SRAM_ADDR)) & 0xffffffff ) >> 0)
+#define GET_FLASH_DMA_LEN (((REG32(ADR_LEN)) & 0xffffffff ) >> 0)
+#define GET_FLASH_FRONT_DLY (((REG32(ADR_SPI_PARAM)) & 0x0000ffff ) >> 0)
+#define GET_FLASH_BACK_DLY (((REG32(ADR_SPI_PARAM)) & 0xffff0000 ) >> 16)
+#define GET_FLASH_CLK_WIDTH (((REG32(ADR_SPI_PARAM2)) & 0x0000ffff ) >> 0)
+#define GET_SPI_BUSY (((REG32(ADR_SPI_PARAM2)) & 0x00010000 ) >> 16)
+#define GET_FLS_REMAP (((REG32(ADR_SPI_PARAM2)) & 0x00020000 ) >> 17)
+#define GET_PBUS_SWP (((REG32(ADR_SPI_PARAM2)) & 0x00040000 ) >> 18)
+#define GET_BIT_MODE1 (((REG32(ADR_SPI_PARAM2)) & 0x00080000 ) >> 19)
+#define GET_BIT_MODE2 (((REG32(ADR_SPI_PARAM2)) & 0x00100000 ) >> 20)
+#define GET_BIT_MODE4 (((REG32(ADR_SPI_PARAM2)) & 0x00200000 ) >> 21)
+#define GET_BOOT_CHECK_SUM (((REG32(ADR_CHECK_SUM_RESULT)) & 0xffffffff ) >> 0)
+#define GET_CHECK_SUM_TAG (((REG32(ADR_CHECK_SUM_IN_FILE)) & 0xffffffff ) >> 0)
+#define GET_CMD_LEN (((REG32(ADR_COMMAND_LEN)) & 0x0000ffff ) >> 0)
+#define GET_CMD_ADDR (((REG32(ADR_COMMAND_ADDR)) & 0xffffffff ) >> 0)
+#define GET_DMA_ADR_SRC (((REG32(ADR_DMA_ADR_SRC)) & 0xffffffff ) >> 0)
+#define GET_DMA_ADR_DST (((REG32(ADR_DMA_ADR_DST)) & 0xffffffff ) >> 0)
+#define GET_DMA_SRC_SIZE (((REG32(ADR_DMA_CTRL)) & 0x00000007 ) >> 0)
+#define GET_DMA_SRC_INC (((REG32(ADR_DMA_CTRL)) & 0x00000008 ) >> 3)
+#define GET_DMA_DST_SIZE (((REG32(ADR_DMA_CTRL)) & 0x00000070 ) >> 4)
+#define GET_DMA_DST_INC (((REG32(ADR_DMA_CTRL)) & 0x00000080 ) >> 7)
+#define GET_DMA_FAST_FILL (((REG32(ADR_DMA_CTRL)) & 0x00000100 ) >> 8)
+#define GET_DMA_SDIO_KICK (((REG32(ADR_DMA_CTRL)) & 0x00001000 ) >> 12)
+#define GET_DMA_BADR_EN (((REG32(ADR_DMA_CTRL)) & 0x00002000 ) >> 13)
+#define GET_DMA_LEN (((REG32(ADR_DMA_CTRL)) & 0xffff0000 ) >> 16)
+#define GET_DMA_INT_MASK (((REG32(ADR_DMA_INT)) & 0x00000001 ) >> 0)
+#define GET_DMA_STS (((REG32(ADR_DMA_INT)) & 0x00000100 ) >> 8)
+#define GET_DMA_FINISH (((REG32(ADR_DMA_INT)) & 0x80000000 ) >> 31)
+#define GET_DMA_CONST (((REG32(ADR_DMA_FILL_CONST)) & 0xffffffff ) >> 0)
+#define GET_SLEEP_WAKE_CNT (((REG32(ADR_PMU_0)) & 0x00ffffff ) >> 0)
+#define GET_RG_DLDO_LEVEL (((REG32(ADR_PMU_0)) & 0x07000000 ) >> 24)
+#define GET_RG_DLDO_BOOST_IQ (((REG32(ADR_PMU_0)) & 0x08000000 ) >> 27)
+#define GET_RG_BUCK_LEVEL (((REG32(ADR_PMU_0)) & 0x70000000 ) >> 28)
+#define GET_RG_BUCK_VREF_SEL (((REG32(ADR_PMU_0)) & 0x80000000 ) >> 31)
+#define GET_RG_RTC_OSC_RES_SW_MANUAL (((REG32(ADR_PMU_1)) & 0x000003ff ) >> 0)
+#define GET_RG_RTC_OSC_RES_SW (((REG32(ADR_PMU_1)) & 0x03ff0000 ) >> 16)
+#define GET_RTC_OSC_CAL_RES_RDY (((REG32(ADR_PMU_1)) & 0x80000000 ) >> 31)
+#define GET_RG_DCDC_MODE (((REG32(ADR_PMU_2)) & 0x00000001 ) >> 0)
+#define GET_RG_BUCK_EN_PSM (((REG32(ADR_PMU_2)) & 0x00000010 ) >> 4)
+#define GET_RG_BUCK_PSM_VTH (((REG32(ADR_PMU_2)) & 0x00000100 ) >> 8)
+#define GET_RG_RTC_OSC_RES_SW_MANUAL_EN (((REG32(ADR_PMU_2)) & 0x00001000 ) >> 12)
+#define GET_RG_RTC_RDY_DEGLITCH_TIMER (((REG32(ADR_PMU_2)) & 0x00006000 ) >> 13)
+#define GET_RTC_CAL_ENA (((REG32(ADR_PMU_2)) & 0x00010000 ) >> 16)
+#define GET_PMU_WAKE_TRIG_EVENT (((REG32(ADR_PMU_3)) & 0x00000003 ) >> 0)
+#define GET_DIGI_TOP_POR_MASK (((REG32(ADR_PMU_3)) & 0x00000010 ) >> 4)
+#define GET_PMU_ENTER_SLEEP_MODE (((REG32(ADR_PMU_3)) & 0x00000100 ) >> 8)
+#define GET_RG_RTC_DUMMIES (((REG32(ADR_PMU_3)) & 0xffff0000 ) >> 16)
+#define GET_RTC_EN (((REG32(ADR_RTC_1)) & 0x00000001 ) >> 0)
+#define GET_RTC_SRC (((REG32(ADR_RTC_1)) & 0x00000002 ) >> 1)
+#define GET_RTC_TICK_CNT (((REG32(ADR_RTC_1)) & 0x7fff0000 ) >> 16)
+#define GET_RTC_INT_SEC_MASK (((REG32(ADR_RTC_2)) & 0x00000001 ) >> 0)
+#define GET_RTC_INT_ALARM_MASK (((REG32(ADR_RTC_2)) & 0x00000002 ) >> 1)
+#define GET_RTC_INT_SEC (((REG32(ADR_RTC_2)) & 0x00010000 ) >> 16)
+#define GET_RTC_INT_ALARM (((REG32(ADR_RTC_2)) & 0x00020000 ) >> 17)
+#define GET_RTC_SEC_START_CNT (((REG32(ADR_RTC_3W)) & 0xffffffff ) >> 0)
+#define GET_RTC_SEC_CNT (((REG32(ADR_RTC_3R)) & 0xffffffff ) >> 0)
+#define GET_RTC_SEC_ALARM_VALUE (((REG32(ADR_RTC_4)) & 0xffffffff ) >> 0)
+#define GET_D2_DMA_ADR_SRC (((REG32(ADR_D2_DMA_ADR_SRC)) & 0xffffffff ) >> 0)
+#define GET_D2_DMA_ADR_DST (((REG32(ADR_D2_DMA_ADR_DST)) & 0xffffffff ) >> 0)
+#define GET_D2_DMA_SRC_SIZE (((REG32(ADR_D2_DMA_CTRL)) & 0x00000007 ) >> 0)
+#define GET_D2_DMA_SRC_INC (((REG32(ADR_D2_DMA_CTRL)) & 0x00000008 ) >> 3)
+#define GET_D2_DMA_DST_SIZE (((REG32(ADR_D2_DMA_CTRL)) & 0x00000070 ) >> 4)
+#define GET_D2_DMA_DST_INC (((REG32(ADR_D2_DMA_CTRL)) & 0x00000080 ) >> 7)
+#define GET_D2_DMA_FAST_FILL (((REG32(ADR_D2_DMA_CTRL)) & 0x00000100 ) >> 8)
+#define GET_D2_DMA_SDIO_KICK (((REG32(ADR_D2_DMA_CTRL)) & 0x00001000 ) >> 12)
+#define GET_D2_DMA_BADR_EN (((REG32(ADR_D2_DMA_CTRL)) & 0x00002000 ) >> 13)
+#define GET_D2_DMA_LEN (((REG32(ADR_D2_DMA_CTRL)) & 0xffff0000 ) >> 16)
+#define GET_D2_DMA_INT_MASK (((REG32(ADR_D2_DMA_INT)) & 0x00000001 ) >> 0)
+#define GET_D2_DMA_STS (((REG32(ADR_D2_DMA_INT)) & 0x00000100 ) >> 8)
+#define GET_D2_DMA_FINISH (((REG32(ADR_D2_DMA_INT)) & 0x80000000 ) >> 31)
+#define GET_D2_DMA_CONST (((REG32(ADR_D2_DMA_FILL_CONST)) & 0xffffffff ) >> 0)
+#define GET_TRAP_UNKNOWN_TYPE (((REG32(ADR_CONTROL)) & 0x00000001 ) >> 0)
+#define GET_TX_ON_DEMAND_ENA (((REG32(ADR_CONTROL)) & 0x00000002 ) >> 1)
+#define GET_RX_2_HOST (((REG32(ADR_CONTROL)) & 0x00000004 ) >> 2)
+#define GET_AUTO_SEQNO (((REG32(ADR_CONTROL)) & 0x00000008 ) >> 3)
+#define GET_BYPASSS_TX_PARSER_ENCAP (((REG32(ADR_CONTROL)) & 0x00000010 ) >> 4)
+#define GET_HDR_STRIP (((REG32(ADR_CONTROL)) & 0x00000020 ) >> 5)
+#define GET_ERP_PROTECT (((REG32(ADR_CONTROL)) & 0x000000c0 ) >> 6)
+#define GET_PRO_VER (((REG32(ADR_CONTROL)) & 0x00000300 ) >> 8)
+#define GET_TXQ_ID0 (((REG32(ADR_CONTROL)) & 0x00007000 ) >> 12)
+#define GET_TXQ_ID1 (((REG32(ADR_CONTROL)) & 0x00070000 ) >> 16)
+#define GET_TX_ETHER_TRAP_EN (((REG32(ADR_CONTROL)) & 0x00100000 ) >> 20)
+#define GET_RX_ETHER_TRAP_EN (((REG32(ADR_CONTROL)) & 0x00200000 ) >> 21)
+#define GET_RX_NULL_TRAP_EN (((REG32(ADR_CONTROL)) & 0x00400000 ) >> 22)
+#define GET_RX_GET_TX_QUEUE_EN (((REG32(ADR_CONTROL)) & 0x02000000 ) >> 25)
+#define GET_HCI_INQ_SEL (((REG32(ADR_CONTROL)) & 0x04000000 ) >> 26)
+#define GET_TRX_DEBUG_CNT_ENA (((REG32(ADR_CONTROL)) & 0x10000000 ) >> 28)
+#define GET_WAKE_SOON_WITH_SCK (((REG32(ADR_SDIO_WAKE_MODE)) & 0x00000001 ) >> 0)
+#define GET_TX_FLOW_CTRL (((REG32(ADR_TX_FLOW_0)) & 0x0000ffff ) >> 0)
+#define GET_TX_FLOW_MGMT (((REG32(ADR_TX_FLOW_0)) & 0xffff0000 ) >> 16)
+#define GET_TX_FLOW_DATA (((REG32(ADR_TX_FLOW_1)) & 0xffffffff ) >> 0)
+#define GET_DOT11RTSTHRESHOLD (((REG32(ADR_THREASHOLD)) & 0xffff0000 ) >> 16)
+#define GET_TXF_ID (((REG32(ADR_TXFID_INCREASE)) & 0x0000003f ) >> 0)
+#define GET_SEQ_CTRL (((REG32(ADR_GLOBAL_SEQUENCE)) & 0x0000ffff ) >> 0)
+#define GET_TX_PBOFFSET (((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0x000000ff ) >> 0)
+#define GET_TX_INFO_SIZE (((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0x0000ff00 ) >> 8)
+#define GET_RX_INFO_SIZE (((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0x00ff0000 ) >> 16)
+#define GET_RX_LAST_PHY_SIZE (((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0xff000000 ) >> 24)
+#define GET_TX_INFO_CLEAR_SIZE (((REG32(ADR_HCI_TX_INFO_CLEAR)) & 0x0000003f ) >> 0)
+#define GET_TX_INFO_CLEAR_ENABLE (((REG32(ADR_HCI_TX_INFO_CLEAR)) & 0x00000100 ) >> 8)
+#define GET_TXTRAP_ETHTYPE1 (((REG32(ADR_TX_ETHER_TYPE_1)) & 0x0000ffff ) >> 0)
+#define GET_TXTRAP_ETHTYPE0 (((REG32(ADR_TX_ETHER_TYPE_1)) & 0xffff0000 ) >> 16)
+#define GET_RXTRAP_ETHTYPE1 (((REG32(ADR_RX_ETHER_TYPE_1)) & 0x0000ffff ) >> 0)
+#define GET_RXTRAP_ETHTYPE0 (((REG32(ADR_RX_ETHER_TYPE_1)) & 0xffff0000 ) >> 16)
+#define GET_TX_PKT_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_0)) & 0xffffffff ) >> 0)
+#define GET_RX_PKT_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_1)) & 0xffffffff ) >> 0)
+#define GET_HOST_CMD_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_2)) & 0x000000ff ) >> 0)
+#define GET_HOST_EVENT_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_3)) & 0x000000ff ) >> 0)
+#define GET_TX_PKT_DROP_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_4)) & 0x000000ff ) >> 0)
+#define GET_RX_PKT_DROP_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_5)) & 0x000000ff ) >> 0)
+#define GET_TX_PKT_TRAP_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_6)) & 0x000000ff ) >> 0)
+#define GET_RX_PKT_TRAP_COUNTER (((REG32(ADR_PACKET_COUNTER_INFO_7)) & 0x000000ff ) >> 0)
+#define GET_HOST_TX_FAIL_COUNTER (((REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_0)) & 0x000000ff ) >> 0)
+#define GET_HOST_RX_FAIL_COUNTER (((REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_1)) & 0x000000ff ) >> 0)
+#define GET_HCI_STATE_MONITOR (((REG32(ADR_HCI_STATE_DEBUG_MODE_0)) & 0xffffffff ) >> 0)
+#define GET_HCI_ST_TIMEOUT_MONITOR (((REG32(ADR_HCI_STATE_DEBUG_MODE_1)) & 0xffffffff ) >> 0)
+#define GET_TX_ON_DEMAND_LENGTH (((REG32(ADR_HCI_STATE_DEBUG_MODE_2)) & 0xffffffff ) >> 0)
+#define GET_HCI_MONITOR_REG1 (((REG32(ADR_HCI_STATE_DEBUG_MODE_3)) & 0xffffffff ) >> 0)
+#define GET_HCI_MONITOR_REG2 (((REG32(ADR_HCI_STATE_DEBUG_MODE_4)) & 0xffffffff ) >> 0)
+#define GET_HCI_TX_ALLOC_TIME_31_0 (((REG32(ADR_HCI_STATE_DEBUG_MODE_5)) & 0xffffffff ) >> 0)
+#define GET_HCI_TX_ALLOC_TIME_47_32 (((REG32(ADR_HCI_STATE_DEBUG_MODE_6)) & 0x0000ffff ) >> 0)
+#define GET_HCI_MB_MAX_CNT (((REG32(ADR_HCI_STATE_DEBUG_MODE_6)) & 0x00ff0000 ) >> 16)
+#define GET_HCI_TX_ALLOC_CNT_31_0 (((REG32(ADR_HCI_STATE_DEBUG_MODE_7)) & 0xffffffff ) >> 0)
+#define GET_HCI_TX_ALLOC_CNT_47_32 (((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0x0000ffff ) >> 0)
+#define GET_HCI_PROC_CNT (((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0x00ff0000 ) >> 16)
+#define GET_SDIO_TRANS_CNT (((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0xff000000 ) >> 24)
+#define GET_SDIO_TX_INVALID_CNT_31_0 (((REG32(ADR_HCI_STATE_DEBUG_MODE_9)) & 0xffffffff ) >> 0)
+#define GET_SDIO_TX_INVALID_CNT_47_32 (((REG32(ADR_HCI_STATE_DEBUG_MODE_10)) & 0x0000ffff ) >> 0)
+#define GET_CS_START_ADDR (((REG32(ADR_CS_START_ADDR)) & 0x0000ffff ) >> 0)
+#define GET_CS_PKT_ID (((REG32(ADR_CS_START_ADDR)) & 0x007f0000 ) >> 16)
+#define GET_ADD_LEN (((REG32(ADR_CS_ADD_LEN)) & 0x0000ffff ) >> 0)
+#define GET_CS_ADDER_EN (((REG32(ADR_CS_CMD)) & 0x00000001 ) >> 0)
+#define GET_PSEUDO (((REG32(ADR_CS_CMD)) & 0x00000002 ) >> 1)
+#define GET_CALCULATE (((REG32(ADR_CS_INI_BUF)) & 0xffffffff ) >> 0)
+#define GET_L4_LEN (((REG32(ADR_CS_PSEUDO_BUF)) & 0x0000ffff ) >> 0)
+#define GET_L4_PROTOL (((REG32(ADR_CS_PSEUDO_BUF)) & 0x00ff0000 ) >> 16)
+#define GET_CHECK_SUM (((REG32(ADR_CS_CHECK_SUM)) & 0x0000ffff ) >> 0)
+#define GET_RAND_EN (((REG32(ADR_RAND_EN)) & 0x00000001 ) >> 0)
+#define GET_RAND_NUM (((REG32(ADR_RAND_NUM)) & 0xffffffff ) >> 0)
+#define GET_MUL_OP1 (((REG32(ADR_MUL_OP1)) & 0xffffffff ) >> 0)
+#define GET_MUL_OP2 (((REG32(ADR_MUL_OP2)) & 0xffffffff ) >> 0)
+#define GET_MUL_ANS0 (((REG32(ADR_MUL_ANS0)) & 0xffffffff ) >> 0)
+#define GET_MUL_ANS1 (((REG32(ADR_MUL_ANS1)) & 0xffffffff ) >> 0)
+#define GET_RD_ADDR (((REG32(ADR_DMA_RDATA)) & 0x0000ffff ) >> 0)
+#define GET_RD_ID (((REG32(ADR_DMA_RDATA)) & 0x007f0000 ) >> 16)
+#define GET_WR_ADDR (((REG32(ADR_DMA_WDATA)) & 0x0000ffff ) >> 0)
+#define GET_WR_ID (((REG32(ADR_DMA_WDATA)) & 0x007f0000 ) >> 16)
+#define GET_LEN (((REG32(ADR_DMA_LEN)) & 0x0000ffff ) >> 0)
+#define GET_CLR (((REG32(ADR_DMA_CLR)) & 0x00000001 ) >> 0)
+#define GET_PHY_MODE (((REG32(ADR_NAV_DATA)) & 0x00000003 ) >> 0)
+#define GET_SHRT_PREAM (((REG32(ADR_NAV_DATA)) & 0x00000004 ) >> 2)
+#define GET_SHRT_GI (((REG32(ADR_NAV_DATA)) & 0x00000008 ) >> 3)
+#define GET_DATA_RATE (((REG32(ADR_NAV_DATA)) & 0x000007f0 ) >> 4)
+#define GET_MCS (((REG32(ADR_NAV_DATA)) & 0x00007000 ) >> 12)
+#define GET_FRAME_LEN (((REG32(ADR_NAV_DATA)) & 0xffff0000 ) >> 16)
+#define GET_DURATION (((REG32(ADR_CO_NAV)) & 0x0000ffff ) >> 0)
+#define GET_SHA_DST_ADDR (((REG32(ADR_SHA_DST_ADDR)) & 0xffffffff ) >> 0)
+#define GET_SHA_SRC_ADDR (((REG32(ADR_SHA_SRC_ADDR)) & 0xffffffff ) >> 0)
+#define GET_SHA_BUSY (((REG32(ADR_SHA_SETTING)) & 0x00000001 ) >> 0)
+#define GET_SHA_ENDIAN (((REG32(ADR_SHA_SETTING)) & 0x00000002 ) >> 1)
+#define GET_EFS_CLKFREQ (((REG32(ADR_EFUSE_CLK_FREQ)) & 0x00000fff ) >> 0)
+#define GET_LOW_ACTIVE (((REG32(ADR_EFUSE_CLK_FREQ)) & 0x00010000 ) >> 16)
+#define GET_EFS_CLKFREQ_RD (((REG32(ADR_EFUSE_CLK_FREQ)) & 0x0ff00000 ) >> 20)
+#define GET_EFS_PRE_RD (((REG32(ADR_EFUSE_CLK_FREQ)) & 0xf0000000 ) >> 28)
+#define GET_EFS_LDO_ON (((REG32(ADR_EFUSE_LDO_TIME)) & 0x0000ffff ) >> 0)
+#define GET_EFS_LDO_OFF (((REG32(ADR_EFUSE_LDO_TIME)) & 0xffff0000 ) >> 16)
+#define GET_EFS_RDATA_0 (((REG32(ADR_EFUSE_AHB_RDATA_0)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_0 (((REG32(ADR_EFUSE_WDATA_0)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_1 (((REG32(ADR_EFUSE_AHB_RDATA_1)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_1 (((REG32(ADR_EFUSE_WDATA_1)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_2 (((REG32(ADR_EFUSE_AHB_RDATA_2)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_2 (((REG32(ADR_EFUSE_WDATA_2)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_3 (((REG32(ADR_EFUSE_AHB_RDATA_3)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_3 (((REG32(ADR_EFUSE_WDATA_3)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_4 (((REG32(ADR_EFUSE_AHB_RDATA_4)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_4 (((REG32(ADR_EFUSE_WDATA_4)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_5 (((REG32(ADR_EFUSE_AHB_RDATA_5)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_5 (((REG32(ADR_EFUSE_WDATA_5)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_6 (((REG32(ADR_EFUSE_AHB_RDATA_6)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_6 (((REG32(ADR_EFUSE_WDATA_6)) & 0xffffffff ) >> 0)
+#define GET_EFS_RDATA_7 (((REG32(ADR_EFUSE_AHB_RDATA_7)) & 0xffffffff ) >> 0)
+#define GET_EFS_WDATA_7 (((REG32(ADR_EFUSE_WDATA_7)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RD0_EN (((REG32(ADR_EFUSE_SPI_RD0_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD1_EN (((REG32(ADR_EFUSE_SPI_RD1_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD2_EN (((REG32(ADR_EFUSE_SPI_RD2_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD3_EN (((REG32(ADR_EFUSE_SPI_RD3_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD4_EN (((REG32(ADR_EFUSE_SPI_RD4_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD5_EN (((REG32(ADR_EFUSE_SPI_RD5_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD6_EN (((REG32(ADR_EFUSE_SPI_RD6_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RD7_EN (((REG32(ADR_EFUSE_SPI_RD7_EN)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RBUSY (((REG32(ADR_EFUSE_SPI_BUSY)) & 0x00000001 ) >> 0)
+#define GET_EFS_SPI_RDATA_0 (((REG32(ADR_EFUSE_SPI_RDATA_0)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_1 (((REG32(ADR_EFUSE_SPI_RDATA_1)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_2 (((REG32(ADR_EFUSE_SPI_RDATA_2)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_3 (((REG32(ADR_EFUSE_SPI_RDATA_3)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_4 (((REG32(ADR_EFUSE_SPI_RDATA_4)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_5 (((REG32(ADR_EFUSE_SPI_RDATA_5)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_6 (((REG32(ADR_EFUSE_SPI_RDATA_6)) & 0xffffffff ) >> 0)
+#define GET_EFS_SPI_RDATA_7 (((REG32(ADR_EFUSE_SPI_RDATA_7)) & 0xffffffff ) >> 0)
+#define GET_GET_RK (((REG32(ADR_SMS4_CFG1)) & 0x00000001 ) >> 0)
+#define GET_FORCE_GET_RK (((REG32(ADR_SMS4_CFG1)) & 0x00000002 ) >> 1)
+#define GET_SMS4_DESCRY_EN (((REG32(ADR_SMS4_CFG1)) & 0x00000010 ) >> 4)
+#define GET_DEC_DOUT_MSB (((REG32(ADR_SMS4_CFG2)) & 0x00000001 ) >> 0)
+#define GET_DEC_DIN_MSB (((REG32(ADR_SMS4_CFG2)) & 0x00000002 ) >> 1)
+#define GET_ENC_DOUT_MSB (((REG32(ADR_SMS4_CFG2)) & 0x00000004 ) >> 2)
+#define GET_ENC_DIN_MSB (((REG32(ADR_SMS4_CFG2)) & 0x00000008 ) >> 3)
+#define GET_KEY_DIN_MSB (((REG32(ADR_SMS4_CFG2)) & 0x00000010 ) >> 4)
+#define GET_SMS4_CBC_EN (((REG32(ADR_SMS4_MODE1)) & 0x00000001 ) >> 0)
+#define GET_SMS4_CFB_EN (((REG32(ADR_SMS4_MODE1)) & 0x00000002 ) >> 1)
+#define GET_SMS4_OFB_EN (((REG32(ADR_SMS4_MODE1)) & 0x00000004 ) >> 2)
+#define GET_SMS4_START_TRIG (((REG32(ADR_SMS4_TRIG)) & 0x00000001 ) >> 0)
+#define GET_SMS4_BUSY (((REG32(ADR_SMS4_STATUS1)) & 0x00000001 ) >> 0)
+#define GET_SMS4_DONE (((REG32(ADR_SMS4_STATUS2)) & 0x00000001 ) >> 0)
+#define GET_SMS4_DATAIN_0 (((REG32(ADR_SMS4_DATA_IN0)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAIN_1 (((REG32(ADR_SMS4_DATA_IN1)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAIN_2 (((REG32(ADR_SMS4_DATA_IN2)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAIN_3 (((REG32(ADR_SMS4_DATA_IN3)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAOUT_0 (((REG32(ADR_SMS4_DATA_OUT0)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAOUT_1 (((REG32(ADR_SMS4_DATA_OUT1)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAOUT_2 (((REG32(ADR_SMS4_DATA_OUT2)) & 0xffffffff ) >> 0)
+#define GET_SMS4_DATAOUT_3 (((REG32(ADR_SMS4_DATA_OUT3)) & 0xffffffff ) >> 0)
+#define GET_SMS4_KEY_0 (((REG32(ADR_SMS4_KEY_0)) & 0xffffffff ) >> 0)
+#define GET_SMS4_KEY_1 (((REG32(ADR_SMS4_KEY_1)) & 0xffffffff ) >> 0)
+#define GET_SMS4_KEY_2 (((REG32(ADR_SMS4_KEY_2)) & 0xffffffff ) >> 0)
+#define GET_SMS4_KEY_3 (((REG32(ADR_SMS4_KEY_3)) & 0xffffffff ) >> 0)
+#define GET_SMS4_MODE_IV0 (((REG32(ADR_SMS4_MODE_IV0)) & 0xffffffff ) >> 0)
+#define GET_SMS4_MODE_IV1 (((REG32(ADR_SMS4_MODE_IV1)) & 0xffffffff ) >> 0)
+#define GET_SMS4_MODE_IV2 (((REG32(ADR_SMS4_MODE_IV2)) & 0xffffffff ) >> 0)
+#define GET_SMS4_MODE_IV3 (((REG32(ADR_SMS4_MODE_IV3)) & 0xffffffff ) >> 0)
+#define GET_SMS4_OFB_ENC0 (((REG32(ADR_SMS4_OFB_ENC0)) & 0xffffffff ) >> 0)
+#define GET_SMS4_OFB_ENC1 (((REG32(ADR_SMS4_OFB_ENC1)) & 0xffffffff ) >> 0)
+#define GET_SMS4_OFB_ENC2 (((REG32(ADR_SMS4_OFB_ENC2)) & 0xffffffff ) >> 0)
+#define GET_SMS4_OFB_ENC3 (((REG32(ADR_SMS4_OFB_ENC3)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_TB0_31_0 (((REG32(ADR_MRX_MCAST_TB0_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_TB0_47_32 (((REG32(ADR_MRX_MCAST_TB0_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_MASK0_31_0 (((REG32(ADR_MRX_MCAST_MK0_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_MASK0_47_32 (((REG32(ADR_MRX_MCAST_MK0_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_CTRL_0 (((REG32(ADR_MRX_MCAST_CTRL0)) & 0x00000003 ) >> 0)
+#define GET_MRX_MCAST_TB1_31_0 (((REG32(ADR_MRX_MCAST_TB1_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_TB1_47_32 (((REG32(ADR_MRX_MCAST_TB1_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_MASK1_31_0 (((REG32(ADR_MRX_MCAST_MK1_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_MASK1_47_32 (((REG32(ADR_MRX_MCAST_MK1_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_CTRL_1 (((REG32(ADR_MRX_MCAST_CTRL1)) & 0x00000003 ) >> 0)
+#define GET_MRX_MCAST_TB2_31_0 (((REG32(ADR_MRX_MCAST_TB2_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_TB2_47_32 (((REG32(ADR_MRX_MCAST_TB2_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_MASK2_31_0 (((REG32(ADR_MRX_MCAST_MK2_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_MASK2_47_32 (((REG32(ADR_MRX_MCAST_MK2_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_CTRL_2 (((REG32(ADR_MRX_MCAST_CTRL2)) & 0x00000003 ) >> 0)
+#define GET_MRX_MCAST_TB3_31_0 (((REG32(ADR_MRX_MCAST_TB3_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_TB3_47_32 (((REG32(ADR_MRX_MCAST_TB3_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_MASK3_31_0 (((REG32(ADR_MRX_MCAST_MK3_0)) & 0xffffffff ) >> 0)
+#define GET_MRX_MCAST_MASK3_47_32 (((REG32(ADR_MRX_MCAST_MK3_1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MCAST_CTRL_3 (((REG32(ADR_MRX_MCAST_CTRL3)) & 0x00000003 ) >> 0)
+#define GET_MRX_PHY_INFO (((REG32(ADR_MRX_PHY_INFO)) & 0xffffffff ) >> 0)
+#define GET_DBG_BA_TYPE (((REG32(ADR_MRX_BA_DBG)) & 0x0000003f ) >> 0)
+#define GET_DBG_BA_SEQ (((REG32(ADR_MRX_BA_DBG)) & 0x000fff00 ) >> 8)
+#define GET_MRX_FLT_TB0 (((REG32(ADR_MRX_FLT_TB0)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB1 (((REG32(ADR_MRX_FLT_TB1)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB2 (((REG32(ADR_MRX_FLT_TB2)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB3 (((REG32(ADR_MRX_FLT_TB3)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB4 (((REG32(ADR_MRX_FLT_TB4)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB5 (((REG32(ADR_MRX_FLT_TB5)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB6 (((REG32(ADR_MRX_FLT_TB6)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB7 (((REG32(ADR_MRX_FLT_TB7)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB8 (((REG32(ADR_MRX_FLT_TB8)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB9 (((REG32(ADR_MRX_FLT_TB9)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB10 (((REG32(ADR_MRX_FLT_TB10)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB11 (((REG32(ADR_MRX_FLT_TB11)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB12 (((REG32(ADR_MRX_FLT_TB12)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB13 (((REG32(ADR_MRX_FLT_TB13)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB14 (((REG32(ADR_MRX_FLT_TB14)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_TB15 (((REG32(ADR_MRX_FLT_TB15)) & 0x00007fff ) >> 0)
+#define GET_MRX_FLT_EN0 (((REG32(ADR_MRX_FLT_EN0)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN1 (((REG32(ADR_MRX_FLT_EN1)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN2 (((REG32(ADR_MRX_FLT_EN2)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN3 (((REG32(ADR_MRX_FLT_EN3)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN4 (((REG32(ADR_MRX_FLT_EN4)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN5 (((REG32(ADR_MRX_FLT_EN5)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN6 (((REG32(ADR_MRX_FLT_EN6)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN7 (((REG32(ADR_MRX_FLT_EN7)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FLT_EN8 (((REG32(ADR_MRX_FLT_EN8)) & 0x0000ffff ) >> 0)
+#define GET_MRX_LEN_FLT (((REG32(ADR_MRX_LEN_FLT)) & 0x0000ffff ) >> 0)
+#define GET_RX_FLOW_DATA (((REG32(ADR_RX_FLOW_DATA)) & 0xffffffff ) >> 0)
+#define GET_RX_FLOW_MNG (((REG32(ADR_RX_FLOW_MNG)) & 0x0000ffff ) >> 0)
+#define GET_RX_FLOW_CTRL (((REG32(ADR_RX_FLOW_CTRL)) & 0x0000ffff ) >> 0)
+#define GET_MRX_STP_EN (((REG32(ADR_RX_TIME_STAMP_CFG)) & 0x00000001 ) >> 0)
+#define GET_MRX_STP_OFST (((REG32(ADR_RX_TIME_STAMP_CFG)) & 0x0000ff00 ) >> 8)
+#define GET_DBG_FF_FULL (((REG32(ADR_DBG_FF_FULL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_FF_FULL_CLR (((REG32(ADR_DBG_FF_FULL)) & 0x80000000 ) >> 31)
+#define GET_DBG_WFF_FULL (((REG32(ADR_DBG_WFF_FULL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_WFF_FULL_CLR (((REG32(ADR_DBG_WFF_FULL)) & 0x80000000 ) >> 31)
+#define GET_DBG_MB_FULL (((REG32(ADR_DBG_MB_FULL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_MB_FULL_CLR (((REG32(ADR_DBG_MB_FULL)) & 0x80000000 ) >> 31)
+#define GET_BA_CTRL (((REG32(ADR_BA_CTRL)) & 0x00000003 ) >> 0)
+#define GET_BA_DBG_EN (((REG32(ADR_BA_CTRL)) & 0x00000004 ) >> 2)
+#define GET_BA_AGRE_EN (((REG32(ADR_BA_CTRL)) & 0x00000008 ) >> 3)
+#define GET_BA_TA_31_0 (((REG32(ADR_BA_TA_0)) & 0xffffffff ) >> 0)
+#define GET_BA_TA_47_32 (((REG32(ADR_BA_TA_1)) & 0x0000ffff ) >> 0)
+#define GET_BA_TID (((REG32(ADR_BA_TID)) & 0x0000000f ) >> 0)
+#define GET_BA_ST_SEQ (((REG32(ADR_BA_ST_SEQ)) & 0x00000fff ) >> 0)
+#define GET_BA_SB0 (((REG32(ADR_BA_SB0)) & 0xffffffff ) >> 0)
+#define GET_BA_SB1 (((REG32(ADR_BA_SB1)) & 0xffffffff ) >> 0)
+#define GET_MRX_WD (((REG32(ADR_MRX_WATCH_DOG)) & 0x0001ffff ) >> 0)
+#define GET_ACK_GEN_EN (((REG32(ADR_ACK_GEN_EN)) & 0x00000001 ) >> 0)
+#define GET_BA_GEN_EN (((REG32(ADR_ACK_GEN_EN)) & 0x00000002 ) >> 1)
+#define GET_ACK_GEN_DUR (((REG32(ADR_ACK_GEN_PARA)) & 0x0000ffff ) >> 0)
+#define GET_ACK_GEN_INFO (((REG32(ADR_ACK_GEN_PARA)) & 0x003f0000 ) >> 16)
+#define GET_ACK_GEN_RA_31_0 (((REG32(ADR_ACK_GEN_RA_0)) & 0xffffffff ) >> 0)
+#define GET_ACK_GEN_RA_47_32 (((REG32(ADR_ACK_GEN_RA_1)) & 0x0000ffff ) >> 0)
+#define GET_MIB_LEN_FAIL (((REG32(ADR_MIB_LEN_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_TRAP_HW_ID (((REG32(ADR_TRAP_HW_ID)) & 0x0000000f ) >> 0)
+#define GET_ID_IN_USE (((REG32(ADR_ID_IN_USE)) & 0x000000ff ) >> 0)
+#define GET_MRX_ERR (((REG32(ADR_MRX_ERR)) & 0xffffffff ) >> 0)
+#define GET_W0_T0_SEQ (((REG32(ADR_WSID0_TID0_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T1_SEQ (((REG32(ADR_WSID0_TID1_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T2_SEQ (((REG32(ADR_WSID0_TID2_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T3_SEQ (((REG32(ADR_WSID0_TID3_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T4_SEQ (((REG32(ADR_WSID0_TID4_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T5_SEQ (((REG32(ADR_WSID0_TID5_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T6_SEQ (((REG32(ADR_WSID0_TID6_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W0_T7_SEQ (((REG32(ADR_WSID0_TID7_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T0_SEQ (((REG32(ADR_WSID1_TID0_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T1_SEQ (((REG32(ADR_WSID1_TID1_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T2_SEQ (((REG32(ADR_WSID1_TID2_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T3_SEQ (((REG32(ADR_WSID1_TID3_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T4_SEQ (((REG32(ADR_WSID1_TID4_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T5_SEQ (((REG32(ADR_WSID1_TID5_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T6_SEQ (((REG32(ADR_WSID1_TID6_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_W1_T7_SEQ (((REG32(ADR_WSID1_TID7_RX_SEQ)) & 0x0000ffff ) >> 0)
+#define GET_ADDR1A_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x00000003 ) >> 0)
+#define GET_ADDR2A_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x0000000c ) >> 2)
+#define GET_ADDR3A_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x00000030 ) >> 4)
+#define GET_ADDR1B_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x000000c0 ) >> 6)
+#define GET_ADDR2B_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x00000300 ) >> 8)
+#define GET_ADDR3B_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x00000c00 ) >> 10)
+#define GET_ADDR3C_SEL (((REG32(ADR_HDR_ADDR_SEL)) & 0x00003000 ) >> 12)
+#define GET_FRM_CTRL (((REG32(ADR_FRAME_TYPE_CNTR_SET)) & 0x0000003f ) >> 0)
+#define GET_CSR_PHY_INFO (((REG32(ADR_PHY_INFO)) & 0x00007fff ) >> 0)
+#define GET_AMPDU_SIG (((REG32(ADR_AMPDU_SIG)) & 0x000000ff ) >> 0)
+#define GET_MIB_AMPDU (((REG32(ADR_MIB_AMPDU)) & 0xffffffff ) >> 0)
+#define GET_LEN_FLT (((REG32(ADR_LEN_FLT)) & 0x0000ffff ) >> 0)
+#define GET_MIB_DELIMITER (((REG32(ADR_MIB_DELIMITER)) & 0x0000ffff ) >> 0)
+#define GET_MTX_INT_Q0_Q_EMPTY (((REG32(ADR_MTX_INT_STS)) & 0x00010000 ) >> 16)
+#define GET_MTX_INT_Q0_TXOP_RUNOUT (((REG32(ADR_MTX_INT_STS)) & 0x00020000 ) >> 17)
+#define GET_MTX_INT_Q1_Q_EMPTY (((REG32(ADR_MTX_INT_STS)) & 0x00040000 ) >> 18)
+#define GET_MTX_INT_Q1_TXOP_RUNOUT (((REG32(ADR_MTX_INT_STS)) & 0x00080000 ) >> 19)
+#define GET_MTX_INT_Q2_Q_EMPTY (((REG32(ADR_MTX_INT_STS)) & 0x00100000 ) >> 20)
+#define GET_MTX_INT_Q2_TXOP_RUNOUT (((REG32(ADR_MTX_INT_STS)) & 0x00200000 ) >> 21)
+#define GET_MTX_INT_Q3_Q_EMPTY (((REG32(ADR_MTX_INT_STS)) & 0x00400000 ) >> 22)
+#define GET_MTX_INT_Q3_TXOP_RUNOUT (((REG32(ADR_MTX_INT_STS)) & 0x00800000 ) >> 23)
+#define GET_MTX_INT_Q4_Q_EMPTY (((REG32(ADR_MTX_INT_STS)) & 0x01000000 ) >> 24)
+#define GET_MTX_INT_Q4_TXOP_RUNOUT (((REG32(ADR_MTX_INT_STS)) & 0x02000000 ) >> 25)
+#define GET_MTX_EN_INT_Q0_Q_EMPTY (((REG32(ADR_MTX_INT_EN)) & 0x00010000 ) >> 16)
+#define GET_MTX_EN_INT_Q0_TXOP_RUNOUT (((REG32(ADR_MTX_INT_EN)) & 0x00020000 ) >> 17)
+#define GET_MTX_EN_INT_Q1_Q_EMPTY (((REG32(ADR_MTX_INT_EN)) & 0x00040000 ) >> 18)
+#define GET_MTX_EN_INT_Q1_TXOP_RUNOUT (((REG32(ADR_MTX_INT_EN)) & 0x00080000 ) >> 19)
+#define GET_MTX_EN_INT_Q2_Q_EMPTY (((REG32(ADR_MTX_INT_EN)) & 0x00100000 ) >> 20)
+#define GET_MTX_EN_INT_Q2_TXOP_RUNOUT (((REG32(ADR_MTX_INT_EN)) & 0x00200000 ) >> 21)
+#define GET_MTX_EN_INT_Q3_Q_EMPTY (((REG32(ADR_MTX_INT_EN)) & 0x00400000 ) >> 22)
+#define GET_MTX_EN_INT_Q3_TXOP_RUNOUT (((REG32(ADR_MTX_INT_EN)) & 0x00800000 ) >> 23)
+#define GET_MTX_EN_INT_Q4_Q_EMPTY (((REG32(ADR_MTX_INT_EN)) & 0x01000000 ) >> 24)
+#define GET_MTX_EN_INT_Q4_TXOP_RUNOUT (((REG32(ADR_MTX_INT_EN)) & 0x02000000 ) >> 25)
+#define GET_MTX_MTX2PHY_SLOW (((REG32(ADR_MTX_MISC_EN)) & 0x00000001 ) >> 0)
+#define GET_MTX_M2M_SLOW_PRD (((REG32(ADR_MTX_MISC_EN)) & 0x0000000e ) >> 1)
+#define GET_MTX_AMPDU_CRC_AUTO (((REG32(ADR_MTX_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_MTX_FAST_RSP_MODE (((REG32(ADR_MTX_MISC_EN)) & 0x00000040 ) >> 6)
+#define GET_MTX_RAW_DATA_MODE (((REG32(ADR_MTX_MISC_EN)) & 0x00000080 ) >> 7)
+#define GET_MTX_ACK_DUR0 (((REG32(ADR_MTX_MISC_EN)) & 0x00000100 ) >> 8)
+#define GET_MTX_TSF_AUTO_BCN (((REG32(ADR_MTX_MISC_EN)) & 0x00000400 ) >> 10)
+#define GET_MTX_TSF_AUTO_MISC (((REG32(ADR_MTX_MISC_EN)) & 0x00000800 ) >> 11)
+#define GET_MTX_FORCE_CS_IDLE (((REG32(ADR_MTX_MISC_EN)) & 0x00001000 ) >> 12)
+#define GET_MTX_FORCE_BKF_RXEN0 (((REG32(ADR_MTX_MISC_EN)) & 0x00002000 ) >> 13)
+#define GET_MTX_FORCE_DMA_RXEN0 (((REG32(ADR_MTX_MISC_EN)) & 0x00004000 ) >> 14)
+#define GET_MTX_FORCE_RXEN0 (((REG32(ADR_MTX_MISC_EN)) & 0x00008000 ) >> 15)
+#define GET_MTX_HALT_Q_MB (((REG32(ADR_MTX_MISC_EN)) & 0x003f0000 ) >> 16)
+#define GET_MTX_CTS_SET_DIF (((REG32(ADR_MTX_MISC_EN)) & 0x00400000 ) >> 22)
+#define GET_MTX_AMPDU_SET_DIF (((REG32(ADR_MTX_MISC_EN)) & 0x00800000 ) >> 23)
+#define GET_MTX_EDCCA_TOUT (((REG32(ADR_MTX_EDCCA_TOUT)) & 0x000003ff ) >> 0)
+#define GET_MTX_INT_BCN (((REG32(ADR_MTX_BCN_INT_STS)) & 0x00000002 ) >> 1)
+#define GET_MTX_INT_DTIM (((REG32(ADR_MTX_BCN_INT_STS)) & 0x00000008 ) >> 3)
+#define GET_MTX_EN_INT_BCN (((REG32(ADR_MTX_BCN_EN_INT)) & 0x00000002 ) >> 1)
+#define GET_MTX_EN_INT_DTIM (((REG32(ADR_MTX_BCN_EN_INT)) & 0x00000008 ) >> 3)
+#define GET_MTX_BCN_TIMER_EN (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x00000001 ) >> 0)
+#define GET_MTX_TIME_STAMP_AUTO_FILL (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x00000002 ) >> 1)
+#define GET_MTX_TSF_TIMER_EN (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x00000020 ) >> 5)
+#define GET_MTX_HALT_MNG_UNTIL_DTIM (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x00000040 ) >> 6)
+#define GET_MTX_INT_DTIM_NUM (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x0000ff00 ) >> 8)
+#define GET_MTX_AUTO_FLUSH_Q4 (((REG32(ADR_MTX_BCN_EN_MISC)) & 0x00010000 ) >> 16)
+#define GET_MTX_BCN_PKTID_CH_LOCK (((REG32(ADR_MTX_BCN_MISC)) & 0x00000001 ) >> 0)
+#define GET_MTX_BCN_CFG_VLD (((REG32(ADR_MTX_BCN_MISC)) & 0x00000006 ) >> 1)
+#define GET_MTX_AUTO_BCN_ONGOING (((REG32(ADR_MTX_BCN_MISC)) & 0x00000008 ) >> 3)
+#define GET_MTX_BCN_TIMER (((REG32(ADR_MTX_BCN_MISC)) & 0xffff0000 ) >> 16)
+#define GET_MTX_BCN_PERIOD (((REG32(ADR_MTX_BCN_PRD)) & 0x0000ffff ) >> 0)
+#define GET_MTX_DTIM_NUM (((REG32(ADR_MTX_BCN_PRD)) & 0xff000000 ) >> 24)
+#define GET_MTX_BCN_TSF_L (((REG32(ADR_MTX_BCN_TSF_L)) & 0xffffffff ) >> 0)
+#define GET_MTX_BCN_TSF_U (((REG32(ADR_MTX_BCN_TSF_U)) & 0xffffffff ) >> 0)
+#define GET_MTX_BCN_PKT_ID0 (((REG32(ADR_MTX_BCN_CFG0)) & 0x0000007f ) >> 0)
+#define GET_MTX_DTIM_OFST0 (((REG32(ADR_MTX_BCN_CFG0)) & 0x03ff0000 ) >> 16)
+#define GET_MTX_BCN_PKT_ID1 (((REG32(ADR_MTX_BCN_CFG1)) & 0x0000007f ) >> 0)
+#define GET_MTX_DTIM_OFST1 (((REG32(ADR_MTX_BCN_CFG1)) & 0x03ff0000 ) >> 16)
+#define GET_MTX_CCA (((REG32(ADR_MTX_STATUS)) & 0x00000001 ) >> 0)
+#define GET_MRX_CCA (((REG32(ADR_MTX_STATUS)) & 0x00000002 ) >> 1)
+#define GET_MTX_DMA_FSM (((REG32(ADR_MTX_STATUS)) & 0x0000001c ) >> 2)
+#define GET_CH_ST_FSM (((REG32(ADR_MTX_STATUS)) & 0x000000e0 ) >> 5)
+#define GET_MTX_GNT_LOCK (((REG32(ADR_MTX_STATUS)) & 0x00000100 ) >> 8)
+#define GET_MTX_DMA_REQ (((REG32(ADR_MTX_STATUS)) & 0x00000200 ) >> 9)
+#define GET_MTX_Q_REQ (((REG32(ADR_MTX_STATUS)) & 0x00000400 ) >> 10)
+#define GET_MTX_TX_EN (((REG32(ADR_MTX_STATUS)) & 0x00000800 ) >> 11)
+#define GET_MRX_RX_EN (((REG32(ADR_MTX_STATUS)) & 0x00001000 ) >> 12)
+#define GET_DBG_PRTC_PRD (((REG32(ADR_MTX_STATUS)) & 0x00002000 ) >> 13)
+#define GET_DBG_DMA_RDY (((REG32(ADR_MTX_STATUS)) & 0x00004000 ) >> 14)
+#define GET_DBG_WAIT_RSP (((REG32(ADR_MTX_STATUS)) & 0x00008000 ) >> 15)
+#define GET_DBG_CFRM_BUSY (((REG32(ADR_MTX_STATUS)) & 0x00010000 ) >> 16)
+#define GET_DBG_RST (((REG32(ADR_MTX_DBG_CTRL)) & 0x00000001 ) >> 0)
+#define GET_DBG_MODE (((REG32(ADR_MTX_DBG_CTRL)) & 0x00000002 ) >> 1)
+#define GET_MB_REQ_DUR (((REG32(ADR_MTX_DBG_DAT0)) & 0x0000ffff ) >> 0)
+#define GET_RX_EN_DUR (((REG32(ADR_MTX_DBG_DAT0)) & 0xffff0000 ) >> 16)
+#define GET_RX_CS_DUR (((REG32(ADR_MTX_DBG_DAT1)) & 0x0000ffff ) >> 0)
+#define GET_TX_CCA_DUR (((REG32(ADR_MTX_DBG_DAT1)) & 0xffff0000 ) >> 16)
+#define GET_Q_REQ_DUR (((REG32(ADR_MTX_DBG_DAT2)) & 0x0000ffff ) >> 0)
+#define GET_CH_STA0_DUR (((REG32(ADR_MTX_DBG_DAT2)) & 0xffff0000 ) >> 16)
+#define GET_MTX_DUR_RSP_TOUT_B (((REG32(ADR_MTX_DUR_TOUT)) & 0x000000ff ) >> 0)
+#define GET_MTX_DUR_RSP_TOUT_G (((REG32(ADR_MTX_DUR_TOUT)) & 0x0000ff00 ) >> 8)
+#define GET_MTX_DUR_RSP_SIFS (((REG32(ADR_MTX_DUR_IFS)) & 0x000000ff ) >> 0)
+#define GET_MTX_DUR_BURST_SIFS (((REG32(ADR_MTX_DUR_IFS)) & 0x0000ff00 ) >> 8)
+#define GET_MTX_DUR_SLOT (((REG32(ADR_MTX_DUR_IFS)) & 0x003f0000 ) >> 16)
+#define GET_MTX_DUR_RSP_EIFS (((REG32(ADR_MTX_DUR_IFS)) & 0xffc00000 ) >> 22)
+#define GET_MTX_DUR_RSP_SIFS_G (((REG32(ADR_MTX_DUR_SIFS_G)) & 0x000000ff ) >> 0)
+#define GET_MTX_DUR_BURST_SIFS_G (((REG32(ADR_MTX_DUR_SIFS_G)) & 0x0000ff00 ) >> 8)
+#define GET_MTX_DUR_SLOT_G (((REG32(ADR_MTX_DUR_SIFS_G)) & 0x003f0000 ) >> 16)
+#define GET_MTX_DUR_RSP_EIFS_G (((REG32(ADR_MTX_DUR_SIFS_G)) & 0xffc00000 ) >> 22)
+#define GET_CH_STA1_DUR (((REG32(ADR_MTX_DBG_DAT3)) & 0x0000ffff ) >> 0)
+#define GET_CH_STA2_DUR (((REG32(ADR_MTX_DBG_DAT3)) & 0xffff0000 ) >> 16)
+#define GET_MTX_NAV (((REG32(ADR_MTX_NAV)) & 0x0000ffff ) >> 0)
+#define GET_MTX_MIB_CNT0 (((REG32(ADR_MTX_MIB_WSID0)) & 0x3fffffff ) >> 0)
+#define GET_MTX_MIB_EN0 (((REG32(ADR_MTX_MIB_WSID0)) & 0x40000000 ) >> 30)
+#define GET_MTX_MIB_CNT1 (((REG32(ADR_MTX_MIB_WSID1)) & 0x3fffffff ) >> 0)
+#define GET_MTX_MIB_EN1 (((REG32(ADR_MTX_MIB_WSID1)) & 0x40000000 ) >> 30)
+#define GET_CH_STA3_DUR (((REG32(ADR_MTX_DBG_DAT4)) & 0x0000ffff ) >> 0)
+#define GET_CH_STA4_DUR (((REG32(ADR_MTX_DBG_DAT4)) & 0xffff0000 ) >> 16)
+#define GET_TXQ0_MTX_Q_PRE_LD (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x00000002 ) >> 1)
+#define GET_TXQ0_MTX_Q_BKF_CNT_FIXED (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x00000004 ) >> 2)
+#define GET_TXQ0_MTX_Q_TXOP_SUB_FRM_TIME (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x00000008 ) >> 3)
+#define GET_TXQ0_MTX_Q_MB_NO_RLS (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x00000010 ) >> 4)
+#define GET_TXQ0_MTX_Q_TXOP_FRC_BUR (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_TXQ0_MTX_Q_RND_MODE (((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0x000000c0 ) >> 6)
+#define GET_TXQ0_MTX_Q_AIFSN (((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0x0000000f ) >> 0)
+#define GET_TXQ0_MTX_Q_ECWMIN (((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0x00000f00 ) >> 8)
+#define GET_TXQ0_MTX_Q_ECWMAX (((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0x0000f000 ) >> 12)
+#define GET_TXQ0_MTX_Q_TXOP_LIMIT (((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0xffff0000 ) >> 16)
+#define GET_TXQ0_MTX_Q_BKF_CNT (((REG32(ADR_TXQ0_MTX_Q_BKF_CNT)) & 0x0000ffff ) >> 0)
+#define GET_TXQ0_MTX_Q_SRC_LIMIT (((REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) & 0x000000ff ) >> 0)
+#define GET_TXQ0_MTX_Q_LRC_LIMIT (((REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) & 0x0000ff00 ) >> 8)
+#define GET_TXQ0_MTX_Q_ID_MAP_L (((REG32(ADR_TXQ0_MTX_Q_ID_MAP_L)) & 0xffffffff ) >> 0)
+#define GET_TXQ0_MTX_Q_TXOP_CH_THD (((REG32(ADR_TXQ0_MTX_Q_TXOP_CH_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ0_MTX_Q_TXOP_OV_THD (((REG32(ADR_TXQ0_MTX_Q_TXOP_OV_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ1_MTX_Q_PRE_LD (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x00000002 ) >> 1)
+#define GET_TXQ1_MTX_Q_BKF_CNT_FIXED (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x00000004 ) >> 2)
+#define GET_TXQ1_MTX_Q_TXOP_SUB_FRM_TIME (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x00000008 ) >> 3)
+#define GET_TXQ1_MTX_Q_MB_NO_RLS (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x00000010 ) >> 4)
+#define GET_TXQ1_MTX_Q_TXOP_FRC_BUR (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_TXQ1_MTX_Q_RND_MODE (((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0x000000c0 ) >> 6)
+#define GET_TXQ1_MTX_Q_AIFSN (((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0x0000000f ) >> 0)
+#define GET_TXQ1_MTX_Q_ECWMIN (((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0x00000f00 ) >> 8)
+#define GET_TXQ1_MTX_Q_ECWMAX (((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0x0000f000 ) >> 12)
+#define GET_TXQ1_MTX_Q_TXOP_LIMIT (((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0xffff0000 ) >> 16)
+#define GET_TXQ1_MTX_Q_BKF_CNT (((REG32(ADR_TXQ1_MTX_Q_BKF_CNT)) & 0x0000ffff ) >> 0)
+#define GET_TXQ1_MTX_Q_SRC_LIMIT (((REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) & 0x000000ff ) >> 0)
+#define GET_TXQ1_MTX_Q_LRC_LIMIT (((REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) & 0x0000ff00 ) >> 8)
+#define GET_TXQ1_MTX_Q_ID_MAP_L (((REG32(ADR_TXQ1_MTX_Q_ID_MAP_L)) & 0xffffffff ) >> 0)
+#define GET_TXQ1_MTX_Q_TXOP_CH_THD (((REG32(ADR_TXQ1_MTX_Q_TXOP_CH_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ1_MTX_Q_TXOP_OV_THD (((REG32(ADR_TXQ1_MTX_Q_TXOP_OV_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ2_MTX_Q_PRE_LD (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x00000002 ) >> 1)
+#define GET_TXQ2_MTX_Q_BKF_CNT_FIXED (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x00000004 ) >> 2)
+#define GET_TXQ2_MTX_Q_TXOP_SUB_FRM_TIME (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x00000008 ) >> 3)
+#define GET_TXQ2_MTX_Q_MB_NO_RLS (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x00000010 ) >> 4)
+#define GET_TXQ2_MTX_Q_TXOP_FRC_BUR (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_TXQ2_MTX_Q_RND_MODE (((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0x000000c0 ) >> 6)
+#define GET_TXQ2_MTX_Q_AIFSN (((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0x0000000f ) >> 0)
+#define GET_TXQ2_MTX_Q_ECWMIN (((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0x00000f00 ) >> 8)
+#define GET_TXQ2_MTX_Q_ECWMAX (((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0x0000f000 ) >> 12)
+#define GET_TXQ2_MTX_Q_TXOP_LIMIT (((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0xffff0000 ) >> 16)
+#define GET_TXQ2_MTX_Q_BKF_CNT (((REG32(ADR_TXQ2_MTX_Q_BKF_CNT)) & 0x0000ffff ) >> 0)
+#define GET_TXQ2_MTX_Q_SRC_LIMIT (((REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) & 0x000000ff ) >> 0)
+#define GET_TXQ2_MTX_Q_LRC_LIMIT (((REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) & 0x0000ff00 ) >> 8)
+#define GET_TXQ2_MTX_Q_ID_MAP_L (((REG32(ADR_TXQ2_MTX_Q_ID_MAP_L)) & 0xffffffff ) >> 0)
+#define GET_TXQ2_MTX_Q_TXOP_CH_THD (((REG32(ADR_TXQ2_MTX_Q_TXOP_CH_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ2_MTX_Q_TXOP_OV_THD (((REG32(ADR_TXQ2_MTX_Q_TXOP_OV_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ3_MTX_Q_PRE_LD (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x00000002 ) >> 1)
+#define GET_TXQ3_MTX_Q_BKF_CNT_FIXED (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x00000004 ) >> 2)
+#define GET_TXQ3_MTX_Q_TXOP_SUB_FRM_TIME (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x00000008 ) >> 3)
+#define GET_TXQ3_MTX_Q_MB_NO_RLS (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x00000010 ) >> 4)
+#define GET_TXQ3_MTX_Q_TXOP_FRC_BUR (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_TXQ3_MTX_Q_RND_MODE (((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0x000000c0 ) >> 6)
+#define GET_TXQ3_MTX_Q_AIFSN (((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0x0000000f ) >> 0)
+#define GET_TXQ3_MTX_Q_ECWMIN (((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0x00000f00 ) >> 8)
+#define GET_TXQ3_MTX_Q_ECWMAX (((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0x0000f000 ) >> 12)
+#define GET_TXQ3_MTX_Q_TXOP_LIMIT (((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0xffff0000 ) >> 16)
+#define GET_TXQ3_MTX_Q_BKF_CNT (((REG32(ADR_TXQ3_MTX_Q_BKF_CNT)) & 0x0000ffff ) >> 0)
+#define GET_TXQ3_MTX_Q_SRC_LIMIT (((REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) & 0x000000ff ) >> 0)
+#define GET_TXQ3_MTX_Q_LRC_LIMIT (((REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) & 0x0000ff00 ) >> 8)
+#define GET_TXQ3_MTX_Q_ID_MAP_L (((REG32(ADR_TXQ3_MTX_Q_ID_MAP_L)) & 0xffffffff ) >> 0)
+#define GET_TXQ3_MTX_Q_TXOP_CH_THD (((REG32(ADR_TXQ3_MTX_Q_TXOP_CH_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ3_MTX_Q_TXOP_OV_THD (((REG32(ADR_TXQ3_MTX_Q_TXOP_OV_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ4_MTX_Q_PRE_LD (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x00000002 ) >> 1)
+#define GET_TXQ4_MTX_Q_BKF_CNT_FIXED (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x00000004 ) >> 2)
+#define GET_TXQ4_MTX_Q_TXOP_SUB_FRM_TIME (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x00000008 ) >> 3)
+#define GET_TXQ4_MTX_Q_MB_NO_RLS (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x00000010 ) >> 4)
+#define GET_TXQ4_MTX_Q_TXOP_FRC_BUR (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x00000020 ) >> 5)
+#define GET_TXQ4_MTX_Q_RND_MODE (((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0x000000c0 ) >> 6)
+#define GET_TXQ4_MTX_Q_AIFSN (((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0x0000000f ) >> 0)
+#define GET_TXQ4_MTX_Q_ECWMIN (((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0x00000f00 ) >> 8)
+#define GET_TXQ4_MTX_Q_ECWMAX (((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0x0000f000 ) >> 12)
+#define GET_TXQ4_MTX_Q_TXOP_LIMIT (((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0xffff0000 ) >> 16)
+#define GET_TXQ4_MTX_Q_BKF_CNT (((REG32(ADR_TXQ4_MTX_Q_BKF_CNT)) & 0x0000ffff ) >> 0)
+#define GET_TXQ4_MTX_Q_SRC_LIMIT (((REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) & 0x000000ff ) >> 0)
+#define GET_TXQ4_MTX_Q_LRC_LIMIT (((REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) & 0x0000ff00 ) >> 8)
+#define GET_TXQ4_MTX_Q_ID_MAP_L (((REG32(ADR_TXQ4_MTX_Q_ID_MAP_L)) & 0xffffffff ) >> 0)
+#define GET_TXQ4_MTX_Q_TXOP_CH_THD (((REG32(ADR_TXQ4_MTX_Q_TXOP_CH_THD)) & 0x0000ffff ) >> 0)
+#define GET_TXQ4_MTX_Q_TXOP_OV_THD (((REG32(ADR_TXQ4_MTX_Q_TXOP_OV_THD)) & 0x0000ffff ) >> 0)
+#define GET_VALID0 (((REG32(ADR_WSID0)) & 0x00000001 ) >> 0)
+#define GET_PEER_QOS_EN0 (((REG32(ADR_WSID0)) & 0x00000002 ) >> 1)
+#define GET_PEER_OP_MODE0 (((REG32(ADR_WSID0)) & 0x0000000c ) >> 2)
+#define GET_PEER_HT_MODE0 (((REG32(ADR_WSID0)) & 0x00000030 ) >> 4)
+#define GET_PEER_MAC0_31_0 (((REG32(ADR_PEER_MAC0_0)) & 0xffffffff ) >> 0)
+#define GET_PEER_MAC0_47_32 (((REG32(ADR_PEER_MAC0_1)) & 0x0000ffff ) >> 0)
+#define GET_TX_ACK_POLICY_0_0 (((REG32(ADR_TX_ACK_POLICY_0_0)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_0 (((REG32(ADR_TX_SEQ_CTRL_0_0)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_1 (((REG32(ADR_TX_ACK_POLICY_0_1)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_1 (((REG32(ADR_TX_SEQ_CTRL_0_1)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_2 (((REG32(ADR_TX_ACK_POLICY_0_2)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_2 (((REG32(ADR_TX_SEQ_CTRL_0_2)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_3 (((REG32(ADR_TX_ACK_POLICY_0_3)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_3 (((REG32(ADR_TX_SEQ_CTRL_0_3)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_4 (((REG32(ADR_TX_ACK_POLICY_0_4)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_4 (((REG32(ADR_TX_SEQ_CTRL_0_4)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_5 (((REG32(ADR_TX_ACK_POLICY_0_5)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_5 (((REG32(ADR_TX_SEQ_CTRL_0_5)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_6 (((REG32(ADR_TX_ACK_POLICY_0_6)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_6 (((REG32(ADR_TX_SEQ_CTRL_0_6)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_0_7 (((REG32(ADR_TX_ACK_POLICY_0_7)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_0_7 (((REG32(ADR_TX_SEQ_CTRL_0_7)) & 0x00000fff ) >> 0)
+#define GET_VALID1 (((REG32(ADR_WSID1)) & 0x00000001 ) >> 0)
+#define GET_PEER_QOS_EN1 (((REG32(ADR_WSID1)) & 0x00000002 ) >> 1)
+#define GET_PEER_OP_MODE1 (((REG32(ADR_WSID1)) & 0x0000000c ) >> 2)
+#define GET_PEER_HT_MODE1 (((REG32(ADR_WSID1)) & 0x00000030 ) >> 4)
+#define GET_PEER_MAC1_31_0 (((REG32(ADR_PEER_MAC1_0)) & 0xffffffff ) >> 0)
+#define GET_PEER_MAC1_47_32 (((REG32(ADR_PEER_MAC1_1)) & 0x0000ffff ) >> 0)
+#define GET_TX_ACK_POLICY_1_0 (((REG32(ADR_TX_ACK_POLICY_1_0)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_0 (((REG32(ADR_TX_SEQ_CTRL_1_0)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_1 (((REG32(ADR_TX_ACK_POLICY_1_1)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_1 (((REG32(ADR_TX_SEQ_CTRL_1_1)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_2 (((REG32(ADR_TX_ACK_POLICY_1_2)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_2 (((REG32(ADR_TX_SEQ_CTRL_1_2)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_3 (((REG32(ADR_TX_ACK_POLICY_1_3)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_3 (((REG32(ADR_TX_SEQ_CTRL_1_3)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_4 (((REG32(ADR_TX_ACK_POLICY_1_4)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_4 (((REG32(ADR_TX_SEQ_CTRL_1_4)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_5 (((REG32(ADR_TX_ACK_POLICY_1_5)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_5 (((REG32(ADR_TX_SEQ_CTRL_1_5)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_6 (((REG32(ADR_TX_ACK_POLICY_1_6)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_6 (((REG32(ADR_TX_SEQ_CTRL_1_6)) & 0x00000fff ) >> 0)
+#define GET_TX_ACK_POLICY_1_7 (((REG32(ADR_TX_ACK_POLICY_1_7)) & 0x00000003 ) >> 0)
+#define GET_TX_SEQ_CTRL_1_7 (((REG32(ADR_TX_SEQ_CTRL_1_7)) & 0x00000fff ) >> 0)
+#define GET_INFO0 (((REG32(ADR_INFO0)) & 0xffffffff ) >> 0)
+#define GET_INFO1 (((REG32(ADR_INFO1)) & 0xffffffff ) >> 0)
+#define GET_INFO2 (((REG32(ADR_INFO2)) & 0xffffffff ) >> 0)
+#define GET_INFO3 (((REG32(ADR_INFO3)) & 0xffffffff ) >> 0)
+#define GET_INFO4 (((REG32(ADR_INFO4)) & 0xffffffff ) >> 0)
+#define GET_INFO5 (((REG32(ADR_INFO5)) & 0xffffffff ) >> 0)
+#define GET_INFO6 (((REG32(ADR_INFO6)) & 0xffffffff ) >> 0)
+#define GET_INFO7 (((REG32(ADR_INFO7)) & 0xffffffff ) >> 0)
+#define GET_INFO8 (((REG32(ADR_INFO8)) & 0xffffffff ) >> 0)
+#define GET_INFO9 (((REG32(ADR_INFO9)) & 0xffffffff ) >> 0)
+#define GET_INFO10 (((REG32(ADR_INFO10)) & 0xffffffff ) >> 0)
+#define GET_INFO11 (((REG32(ADR_INFO11)) & 0xffffffff ) >> 0)
+#define GET_INFO12 (((REG32(ADR_INFO12)) & 0xffffffff ) >> 0)
+#define GET_INFO13 (((REG32(ADR_INFO13)) & 0xffffffff ) >> 0)
+#define GET_INFO14 (((REG32(ADR_INFO14)) & 0xffffffff ) >> 0)
+#define GET_INFO15 (((REG32(ADR_INFO15)) & 0xffffffff ) >> 0)
+#define GET_INFO16 (((REG32(ADR_INFO16)) & 0xffffffff ) >> 0)
+#define GET_INFO17 (((REG32(ADR_INFO17)) & 0xffffffff ) >> 0)
+#define GET_INFO18 (((REG32(ADR_INFO18)) & 0xffffffff ) >> 0)
+#define GET_INFO19 (((REG32(ADR_INFO19)) & 0xffffffff ) >> 0)
+#define GET_INFO20 (((REG32(ADR_INFO20)) & 0xffffffff ) >> 0)
+#define GET_INFO21 (((REG32(ADR_INFO21)) & 0xffffffff ) >> 0)
+#define GET_INFO22 (((REG32(ADR_INFO22)) & 0xffffffff ) >> 0)
+#define GET_INFO23 (((REG32(ADR_INFO23)) & 0xffffffff ) >> 0)
+#define GET_INFO24 (((REG32(ADR_INFO24)) & 0xffffffff ) >> 0)
+#define GET_INFO25 (((REG32(ADR_INFO25)) & 0xffffffff ) >> 0)
+#define GET_INFO26 (((REG32(ADR_INFO26)) & 0xffffffff ) >> 0)
+#define GET_INFO27 (((REG32(ADR_INFO27)) & 0xffffffff ) >> 0)
+#define GET_INFO28 (((REG32(ADR_INFO28)) & 0xffffffff ) >> 0)
+#define GET_INFO29 (((REG32(ADR_INFO29)) & 0xffffffff ) >> 0)
+#define GET_INFO30 (((REG32(ADR_INFO30)) & 0xffffffff ) >> 0)
+#define GET_INFO31 (((REG32(ADR_INFO31)) & 0xffffffff ) >> 0)
+#define GET_INFO32 (((REG32(ADR_INFO32)) & 0xffffffff ) >> 0)
+#define GET_INFO33 (((REG32(ADR_INFO33)) & 0xffffffff ) >> 0)
+#define GET_INFO34 (((REG32(ADR_INFO34)) & 0xffffffff ) >> 0)
+#define GET_INFO35 (((REG32(ADR_INFO35)) & 0xffffffff ) >> 0)
+#define GET_INFO36 (((REG32(ADR_INFO36)) & 0xffffffff ) >> 0)
+#define GET_INFO37 (((REG32(ADR_INFO37)) & 0xffffffff ) >> 0)
+#define GET_INFO38 (((REG32(ADR_INFO38)) & 0xffffffff ) >> 0)
+#define GET_INFO_MASK (((REG32(ADR_INFO_MASK)) & 0xffffffff ) >> 0)
+#define GET_INFO_DEF_RATE (((REG32(ADR_INFO_RATE_OFFSET)) & 0x0000003f ) >> 0)
+#define GET_INFO_MRX_OFFSET (((REG32(ADR_INFO_RATE_OFFSET)) & 0x000f0000 ) >> 16)
+#define GET_BCAST_RATEUNKNOW (((REG32(ADR_INFO_RATE_OFFSET)) & 0x3f000000 ) >> 24)
+#define GET_INFO_IDX_TBL_ADDR (((REG32(ADR_INFO_IDX_ADDR)) & 0xffffffff ) >> 0)
+#define GET_INFO_LEN_TBL_ADDR (((REG32(ADR_INFO_LEN_ADDR)) & 0xffffffff ) >> 0)
+#define GET_IC_TAG_31_0 (((REG32(ADR_IC_TIME_TAG_0)) & 0xffffffff ) >> 0)
+#define GET_IC_TAG_63_32 (((REG32(ADR_IC_TIME_TAG_1)) & 0xffffffff ) >> 0)
+#define GET_CH1_PRI (((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0x00000003 ) >> 0)
+#define GET_CH2_PRI (((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0x00000300 ) >> 8)
+#define GET_CH3_PRI (((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0x00030000 ) >> 16)
+#define GET_RG_MAC_LPBK (((REG32(ADR_MAC_MODE)) & 0x00000001 ) >> 0)
+#define GET_RG_MAC_M2M (((REG32(ADR_MAC_MODE)) & 0x00000002 ) >> 1)
+#define GET_RG_PHY_LPBK (((REG32(ADR_MAC_MODE)) & 0x00000004 ) >> 2)
+#define GET_RG_LPBK_RX_EN (((REG32(ADR_MAC_MODE)) & 0x00000008 ) >> 3)
+#define GET_EXT_MAC_MODE (((REG32(ADR_MAC_MODE)) & 0x00000010 ) >> 4)
+#define GET_EXT_PHY_MODE (((REG32(ADR_MAC_MODE)) & 0x00000020 ) >> 5)
+#define GET_ASIC_TAG (((REG32(ADR_MAC_MODE)) & 0xff000000 ) >> 24)
+#define GET_HCI_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000001 ) >> 0)
+#define GET_CO_PROC_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000002 ) >> 1)
+#define GET_MTX_MISC_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000008 ) >> 3)
+#define GET_MTX_QUE_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000010 ) >> 4)
+#define GET_MTX_CHST_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000020 ) >> 5)
+#define GET_MTX_BCN_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000040 ) >> 6)
+#define GET_MRX_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000080 ) >> 7)
+#define GET_AMPDU_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000100 ) >> 8)
+#define GET_MMU_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000200 ) >> 9)
+#define GET_ID_MNG_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00000800 ) >> 11)
+#define GET_MBOX_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00001000 ) >> 12)
+#define GET_SCRT_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00002000 ) >> 13)
+#define GET_MIC_SW_RST (((REG32(ADR_ALL_SOFTWARE_RESET)) & 0x00004000 ) >> 14)
+#define GET_CO_PROC_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000002 ) >> 1)
+#define GET_MTX_MISC_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000008 ) >> 3)
+#define GET_MTX_QUE_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000010 ) >> 4)
+#define GET_MTX_CHST_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000020 ) >> 5)
+#define GET_MTX_BCN_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000040 ) >> 6)
+#define GET_MRX_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000080 ) >> 7)
+#define GET_AMPDU_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00000100 ) >> 8)
+#define GET_ID_MNG_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00004000 ) >> 14)
+#define GET_MBOX_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00008000 ) >> 15)
+#define GET_SCRT_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00010000 ) >> 16)
+#define GET_MIC_ENG_RST (((REG32(ADR_ENG_SOFTWARE_RESET)) & 0x00020000 ) >> 17)
+#define GET_CO_PROC_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000002 ) >> 1)
+#define GET_MTX_MISC_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000008 ) >> 3)
+#define GET_MTX_QUE0_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000010 ) >> 4)
+#define GET_MTX_QUE1_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000020 ) >> 5)
+#define GET_MTX_QUE2_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000040 ) >> 6)
+#define GET_MTX_QUE3_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000080 ) >> 7)
+#define GET_MTX_QUE4_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000100 ) >> 8)
+#define GET_MTX_QUE5_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000200 ) >> 9)
+#define GET_MRX_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000400 ) >> 10)
+#define GET_AMPDU_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00000800 ) >> 11)
+#define GET_SCRT_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00002000 ) >> 13)
+#define GET_ID_MNG_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00004000 ) >> 14)
+#define GET_MBOX_CSR_RST (((REG32(ADR_CSR_SOFTWARE_RESET)) & 0x00008000 ) >> 15)
+#define GET_HCI_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000001 ) >> 0)
+#define GET_CO_PROC_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000002 ) >> 1)
+#define GET_MTX_MISC_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000008 ) >> 3)
+#define GET_MTX_QUE_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000010 ) >> 4)
+#define GET_MRX_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000020 ) >> 5)
+#define GET_AMPDU_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000040 ) >> 6)
+#define GET_MMU_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000080 ) >> 7)
+#define GET_ID_MNG_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000200 ) >> 9)
+#define GET_MBOX_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000400 ) >> 10)
+#define GET_SCRT_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00000800 ) >> 11)
+#define GET_MIC_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00001000 ) >> 12)
+#define GET_MIB_CLK_EN (((REG32(ADR_MAC_CLOCK_ENABLE)) & 0x00002000 ) >> 13)
+#define GET_HCI_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000001 ) >> 0)
+#define GET_CO_PROC_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000002 ) >> 1)
+#define GET_MTX_MISC_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000008 ) >> 3)
+#define GET_MTX_QUE_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000010 ) >> 4)
+#define GET_MRX_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000020 ) >> 5)
+#define GET_AMPDU_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00000040 ) >> 6)
+#define GET_ID_MNG_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00001000 ) >> 12)
+#define GET_MBOX_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00002000 ) >> 13)
+#define GET_SCRT_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00004000 ) >> 14)
+#define GET_MIC_ENG_CLK_EN (((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0x00008000 ) >> 15)
+#define GET_CO_PROC_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00000002 ) >> 1)
+#define GET_MRX_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00000400 ) >> 10)
+#define GET_AMPDU_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00000800 ) >> 11)
+#define GET_SCRT_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00002000 ) >> 13)
+#define GET_ID_MNG_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00004000 ) >> 14)
+#define GET_MBOX_CSR_CLK_EN (((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0x00008000 ) >> 15)
+#define GET_OP_MODE (((REG32(ADR_GLBLE_SET)) & 0x00000003 ) >> 0)
+#define GET_HT_MODE (((REG32(ADR_GLBLE_SET)) & 0x0000000c ) >> 2)
+#define GET_QOS_EN (((REG32(ADR_GLBLE_SET)) & 0x00000010 ) >> 4)
+#define GET_PB_OFFSET (((REG32(ADR_GLBLE_SET)) & 0x0000ff00 ) >> 8)
+#define GET_SNIFFER_MODE (((REG32(ADR_GLBLE_SET)) & 0x00010000 ) >> 16)
+#define GET_DUP_FLT (((REG32(ADR_GLBLE_SET)) & 0x00020000 ) >> 17)
+#define GET_TX_PKT_RSVD (((REG32(ADR_GLBLE_SET)) & 0x001c0000 ) >> 18)
+#define GET_AMPDU_SNIFFER (((REG32(ADR_GLBLE_SET)) & 0x00200000 ) >> 21)
+#define GET_REASON_TRAP0 (((REG32(ADR_REASON_TRAP0)) & 0xffffffff ) >> 0)
+#define GET_REASON_TRAP1 (((REG32(ADR_REASON_TRAP1)) & 0xffffffff ) >> 0)
+#define GET_BSSID_31_0 (((REG32(ADR_BSSID_0)) & 0xffffffff ) >> 0)
+#define GET_BSSID_47_32 (((REG32(ADR_BSSID_1)) & 0x0000ffff ) >> 0)
+#define GET_SCRT_STATE (((REG32(ADR_SCRT_STATE)) & 0x0000000f ) >> 0)
+#define GET_STA_MAC_31_0 (((REG32(ADR_STA_MAC_0)) & 0xffffffff ) >> 0)
+#define GET_STA_MAC_47_32 (((REG32(ADR_STA_MAC_1)) & 0x0000ffff ) >> 0)
+#define GET_PAIR_SCRT (((REG32(ADR_SCRT_SET)) & 0x00000007 ) >> 0)
+#define GET_GRP_SCRT (((REG32(ADR_SCRT_SET)) & 0x00000038 ) >> 3)
+#define GET_SCRT_PKT_ID (((REG32(ADR_SCRT_SET)) & 0x00001fc0 ) >> 6)
+#define GET_SCRT_RPLY_IGNORE (((REG32(ADR_SCRT_SET)) & 0x00010000 ) >> 16)
+#define GET_COEXIST_EN (((REG32(ADR_BTCX0)) & 0x00000001 ) >> 0)
+#define GET_WIRE_MODE (((REG32(ADR_BTCX0)) & 0x0000000e ) >> 1)
+#define GET_WL_RX_PRI (((REG32(ADR_BTCX0)) & 0x00000010 ) >> 4)
+#define GET_WL_TX_PRI (((REG32(ADR_BTCX0)) & 0x00000020 ) >> 5)
+#define GET_GURAN_USE_EN (((REG32(ADR_BTCX0)) & 0x00000100 ) >> 8)
+#define GET_GURAN_USE_CTRL (((REG32(ADR_BTCX0)) & 0x00000200 ) >> 9)
+#define GET_BEACON_TIMEOUT_EN (((REG32(ADR_BTCX0)) & 0x00000400 ) >> 10)
+#define GET_WLAN_ACT_POL (((REG32(ADR_BTCX0)) & 0x00000800 ) >> 11)
+#define GET_DUAL_ANT_EN (((REG32(ADR_BTCX0)) & 0x00001000 ) >> 12)
+#define GET_TRSW_PHY_POL (((REG32(ADR_BTCX0)) & 0x00010000 ) >> 16)
+#define GET_WIFI_TX_SW_POL (((REG32(ADR_BTCX0)) & 0x00020000 ) >> 17)
+#define GET_WIFI_RX_SW_POL (((REG32(ADR_BTCX0)) & 0x00040000 ) >> 18)
+#define GET_BT_SW_POL (((REG32(ADR_BTCX0)) & 0x00080000 ) >> 19)
+#define GET_BT_PRI_SMP_TIME (((REG32(ADR_BTCX1)) & 0x000000ff ) >> 0)
+#define GET_BT_STA_SMP_TIME (((REG32(ADR_BTCX1)) & 0x0000ff00 ) >> 8)
+#define GET_BEACON_TIMEOUT (((REG32(ADR_BTCX1)) & 0x00ff0000 ) >> 16)
+#define GET_WLAN_REMAIN_TIME (((REG32(ADR_BTCX1)) & 0xff000000 ) >> 24)
+#define GET_SW_MANUAL_EN (((REG32(ADR_SWITCH_CTL)) & 0x00000001 ) >> 0)
+#define GET_SW_WL_TX (((REG32(ADR_SWITCH_CTL)) & 0x00000002 ) >> 1)
+#define GET_SW_WL_RX (((REG32(ADR_SWITCH_CTL)) & 0x00000004 ) >> 2)
+#define GET_SW_BT_TRX (((REG32(ADR_SWITCH_CTL)) & 0x00000008 ) >> 3)
+#define GET_BT_TXBAR_MANUAL_EN (((REG32(ADR_SWITCH_CTL)) & 0x00000010 ) >> 4)
+#define GET_BT_TXBAR_SET (((REG32(ADR_SWITCH_CTL)) & 0x00000020 ) >> 5)
+#define GET_BT_BUSY_MANUAL_EN (((REG32(ADR_SWITCH_CTL)) & 0x00000100 ) >> 8)
+#define GET_BT_BUSY_SET (((REG32(ADR_SWITCH_CTL)) & 0x00000200 ) >> 9)
+#define GET_G0_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00000004 ) >> 2)
+#define GET_G0_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00000008 ) >> 3)
+#define GET_G1_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00000010 ) >> 4)
+#define GET_G1_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00000020 ) >> 5)
+#define GET_Q0_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00000040 ) >> 6)
+#define GET_Q0_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00000080 ) >> 7)
+#define GET_Q1_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00000100 ) >> 8)
+#define GET_Q1_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00000200 ) >> 9)
+#define GET_Q2_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00000400 ) >> 10)
+#define GET_Q2_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00000800 ) >> 11)
+#define GET_Q3_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00001000 ) >> 12)
+#define GET_Q3_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00002000 ) >> 13)
+#define GET_SCRT_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00004000 ) >> 14)
+#define GET_SCRT_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00008000 ) >> 15)
+#define GET_MISC_PKT_CLS_MIB_EN (((REG32(ADR_MIB_EN)) & 0x00010000 ) >> 16)
+#define GET_MISC_PKT_CLS_ONGOING (((REG32(ADR_MIB_EN)) & 0x00020000 ) >> 17)
+#define GET_MTX_WSID0_SUCC (((REG32(ADR_MTX_WSID0_SUCC)) & 0x0000ffff ) >> 0)
+#define GET_MTX_WSID0_FRM (((REG32(ADR_MTX_WSID0_FRM)) & 0x0000ffff ) >> 0)
+#define GET_MTX_WSID0_RETRY (((REG32(ADR_MTX_WSID0_RETRY)) & 0x0000ffff ) >> 0)
+#define GET_MTX_WSID0_TOTAL (((REG32(ADR_MTX_WSID0_TOTAL)) & 0x0000ffff ) >> 0)
+#define GET_MTX_GRP (((REG32(ADR_MTX_GROUP)) & 0x000fffff ) >> 0)
+#define GET_MTX_FAIL (((REG32(ADR_MTX_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_MTX_RETRY (((REG32(ADR_MTX_RETRY)) & 0x000fffff ) >> 0)
+#define GET_MTX_MULTI_RETRY (((REG32(ADR_MTX_MULTI_RETRY)) & 0x000fffff ) >> 0)
+#define GET_MTX_RTS_SUCC (((REG32(ADR_MTX_RTS_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_MTX_RTS_FAIL (((REG32(ADR_MTX_RTS_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_MTX_ACK_FAIL (((REG32(ADR_MTX_ACK_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_MTX_FRM (((REG32(ADR_MTX_FRM)) & 0x000fffff ) >> 0)
+#define GET_MTX_ACK_TX (((REG32(ADR_MTX_ACK_TX)) & 0x0000ffff ) >> 0)
+#define GET_MTX_CTS_TX (((REG32(ADR_MTX_CTS_TX)) & 0x0000ffff ) >> 0)
+#define GET_MRX_DUP (((REG32(ADR_MRX_DUP_FRM)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FRG (((REG32(ADR_MRX_FRG_FRM)) & 0x000fffff ) >> 0)
+#define GET_MRX_GRP (((REG32(ADR_MRX_GROUP_FRM)) & 0x000fffff ) >> 0)
+#define GET_MRX_FCS_ERR (((REG32(ADR_MRX_FCS_ERR)) & 0x0000ffff ) >> 0)
+#define GET_MRX_FCS_SUC (((REG32(ADR_MRX_FCS_SUCC)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MISS (((REG32(ADR_MRX_MISS)) & 0x0000ffff ) >> 0)
+#define GET_MRX_ALC_FAIL (((REG32(ADR_MRX_ALC_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_MRX_DAT_NTF (((REG32(ADR_MRX_DAT_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_RTS_NTF (((REG32(ADR_MRX_RTS_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_CTS_NTF (((REG32(ADR_MRX_CTS_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_ACK_NTF (((REG32(ADR_MRX_ACK_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_BA_NTF (((REG32(ADR_MRX_BA_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_DATA_NTF (((REG32(ADR_MRX_DATA_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MNG_NTF (((REG32(ADR_MRX_MNG_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_DAT_CRC_NTF (((REG32(ADR_MRX_DAT_CRC_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_BAR_NTF (((REG32(ADR_MRX_BAR_NTF)) & 0x0000ffff ) >> 0)
+#define GET_MRX_MB_MISS (((REG32(ADR_MRX_MB_MISS)) & 0x0000ffff ) >> 0)
+#define GET_MRX_NIDLE_MISS (((REG32(ADR_MRX_NIDLE_MISS)) & 0x0000ffff ) >> 0)
+#define GET_MRX_CSR_NTF (((REG32(ADR_MRX_CSR_NTF)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q0_SUCC (((REG32(ADR_DBG_Q0_FRM_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q0_FAIL (((REG32(ADR_DBG_Q0_FRM_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q0_ACK_SUCC (((REG32(ADR_DBG_Q0_ACK_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q0_ACK_FAIL (((REG32(ADR_DBG_Q0_ACK_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q1_SUCC (((REG32(ADR_DBG_Q1_FRM_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q1_FAIL (((REG32(ADR_DBG_Q1_FRM_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q1_ACK_SUCC (((REG32(ADR_DBG_Q1_ACK_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q1_ACK_FAIL (((REG32(ADR_DBG_Q1_ACK_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q2_SUCC (((REG32(ADR_DBG_Q2_FRM_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q2_FAIL (((REG32(ADR_DBG_Q2_FRM_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q2_ACK_SUCC (((REG32(ADR_DBG_Q2_ACK_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q2_ACK_FAIL (((REG32(ADR_DBG_Q2_ACK_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q3_SUCC (((REG32(ADR_DBG_Q3_FRM_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q3_FAIL (((REG32(ADR_DBG_Q3_FRM_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q3_ACK_SUCC (((REG32(ADR_DBG_Q3_ACK_SUCCESS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_Q3_ACK_FAIL (((REG32(ADR_DBG_Q3_ACK_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_SCRT_TKIP_CERR (((REG32(ADR_MIB_SCRT_TKIP0)) & 0x000fffff ) >> 0)
+#define GET_SCRT_TKIP_MIC_ERR (((REG32(ADR_MIB_SCRT_TKIP1)) & 0x000fffff ) >> 0)
+#define GET_SCRT_TKIP_RPLY (((REG32(ADR_MIB_SCRT_TKIP2)) & 0x000fffff ) >> 0)
+#define GET_SCRT_CCMP_RPLY (((REG32(ADR_MIB_SCRT_CCMP0)) & 0x000fffff ) >> 0)
+#define GET_SCRT_CCMP_CERR (((REG32(ADR_MIB_SCRT_CCMP1)) & 0x000fffff ) >> 0)
+#define GET_DBG_LEN_CRC_FAIL (((REG32(ADR_DBG_LEN_CRC_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_LEN_ALC_FAIL (((REG32(ADR_DBG_LEN_ALC_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_DBG_AMPDU_PASS (((REG32(ADR_DBG_AMPDU_PASS)) & 0x0000ffff ) >> 0)
+#define GET_DBG_AMPDU_FAIL (((REG32(ADR_DBG_AMPDU_FAIL)) & 0x0000ffff ) >> 0)
+#define GET_RXID_ALC_CNT_FAIL (((REG32(ADR_ID_ALC_FAIL1)) & 0x0000ffff ) >> 0)
+#define GET_RXID_ALC_LEN_FAIL (((REG32(ADR_ID_ALC_FAIL2)) & 0x0000ffff ) >> 0)
+#define GET_CBR_RG_EN_MANUAL (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_TX_EN (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_TX_PA_EN (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_TX_DAC_EN (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_CBR_RG_RX_AGC (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000010 ) >> 4)
+#define GET_CBR_RG_RX_GAIN_MANUAL (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000020 ) >> 5)
+#define GET_CBR_RG_RFG (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x000000c0 ) >> 6)
+#define GET_CBR_RG_PGAG (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00000f00 ) >> 8)
+#define GET_CBR_RG_MODE (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00003000 ) >> 12)
+#define GET_CBR_RG_EN_TX_TRSW (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_CBR_RG_EN_SX (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00008000 ) >> 15)
+#define GET_CBR_RG_EN_RX_LNA (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00010000 ) >> 16)
+#define GET_CBR_RG_EN_RX_MIXER (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00020000 ) >> 17)
+#define GET_CBR_RG_EN_RX_DIV2 (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00040000 ) >> 18)
+#define GET_CBR_RG_EN_RX_LOBUF (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00080000 ) >> 19)
+#define GET_CBR_RG_EN_RX_TZ (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00100000 ) >> 20)
+#define GET_CBR_RG_EN_RX_FILTER (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_CBR_RG_EN_RX_HPF (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00400000 ) >> 22)
+#define GET_CBR_RG_EN_RX_RSSI (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x00800000 ) >> 23)
+#define GET_CBR_RG_EN_ADC (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x01000000 ) >> 24)
+#define GET_CBR_RG_EN_TX_MOD (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x02000000 ) >> 25)
+#define GET_CBR_RG_EN_TX_DIV2 (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x04000000 ) >> 26)
+#define GET_CBR_RG_EN_TX_DIV2_BUF (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x08000000 ) >> 27)
+#define GET_CBR_RG_EN_TX_LOBF (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x10000000 ) >> 28)
+#define GET_CBR_RG_EN_RX_LOBF (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x20000000 ) >> 29)
+#define GET_CBR_RG_SEL_DPLL_CLK (((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0x40000000 ) >> 30)
+#define GET_CBR_RG_EN_TX_DPD (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_EN_TX_TSSI (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_EN_RX_IQCAL (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_EN_TX_DAC_CAL (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_CBR_RG_EN_TX_SELF_MIXER (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000010 ) >> 4)
+#define GET_CBR_RG_EN_TX_DAC_OUT (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000020 ) >> 5)
+#define GET_CBR_RG_EN_LDO_RX_FE (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000040 ) >> 6)
+#define GET_CBR_RG_EN_LDO_ABB (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000080 ) >> 7)
+#define GET_CBR_RG_EN_LDO_AFE (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_CBR_RG_EN_SX_CHPLDO (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_EN_SX_LOBFLDO (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_EN_IREF_RX (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_DCDC_MODE (((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0x00001000 ) >> 12)
+#define GET_CBR_RG_LDO_LEVEL_RX_FE (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00000007 ) >> 0)
+#define GET_CBR_RG_LDO_LEVEL_ABB (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00000038 ) >> 3)
+#define GET_CBR_RG_LDO_LEVEL_AFE (((REG32(ADR_CBR_LDO_REGISTER)) & 0x000001c0 ) >> 6)
+#define GET_CBR_RG_SX_LDO_CHP_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00000e00 ) >> 9)
+#define GET_CBR_RG_SX_LDO_LOBF_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00007000 ) >> 12)
+#define GET_CBR_RG_SX_LDO_XOSC_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00038000 ) >> 15)
+#define GET_CBR_RG_DP_LDO_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x001c0000 ) >> 18)
+#define GET_CBR_RG_SX_LDO_VCO_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x00e00000 ) >> 21)
+#define GET_CBR_RG_TX_LDO_TX_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x07000000 ) >> 24)
+#define GET_CBR_RG_BUCK_LEVEL (((REG32(ADR_CBR_LDO_REGISTER)) & 0x38000000 ) >> 27)
+#define GET_CBR_RG_EN_RX_PADSW (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_EN_RX_TESTNODE (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_RX_ABBCFIX (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_RX_ABBCTUNE (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x000001f8 ) >> 3)
+#define GET_CBR_RG_RX_ABBOUT_TRI_STATE (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_RX_ABB_N_MODE (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_RX_EN_LOOPA (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_RX_FILTERI1ST (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00003000 ) >> 12)
+#define GET_CBR_RG_RX_FILTERI2ND (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_RX_FILTERI3RD (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00030000 ) >> 16)
+#define GET_CBR_RG_RX_FILTERI_COURSE (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x000c0000 ) >> 18)
+#define GET_CBR_RG_RX_FILTERVCM (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00300000 ) >> 20)
+#define GET_CBR_RG_RX_HPF3M (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00400000 ) >> 22)
+#define GET_CBR_RG_RX_HPF300K (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x00800000 ) >> 23)
+#define GET_CBR_RG_RX_HPFI (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x03000000 ) >> 24)
+#define GET_CBR_RG_RX_HPF_FINALCORNER (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x0c000000 ) >> 26)
+#define GET_CBR_RG_RX_HPF_SETTLE1_C (((REG32(ADR_CBR_ABB_REGISTER_1)) & 0x30000000 ) >> 28)
+#define GET_CBR_RG_RX_HPF_SETTLE1_R (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_RX_HPF_SETTLE2_C (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x0000000c ) >> 2)
+#define GET_CBR_RG_RX_HPF_SETTLE2_R (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00000030 ) >> 4)
+#define GET_CBR_RG_RX_HPF_VCMCON2 (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x000000c0 ) >> 6)
+#define GET_CBR_RG_RX_HPF_VCMCON (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00000300 ) >> 8)
+#define GET_CBR_RG_RX_OUTVCM (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00000c00 ) >> 10)
+#define GET_CBR_RG_RX_TZI (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00003000 ) >> 12)
+#define GET_CBR_RG_RX_TZ_OUT_TRISTATE (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00004000 ) >> 14)
+#define GET_CBR_RG_RX_TZ_VCM (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00018000 ) >> 15)
+#define GET_CBR_RG_EN_RX_RSSI_TESTNODE (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x000e0000 ) >> 17)
+#define GET_CBR_RG_RX_ADCRSSI_CLKSEL (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00100000 ) >> 20)
+#define GET_CBR_RG_RX_ADCRSSI_VCM (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x00600000 ) >> 21)
+#define GET_CBR_RG_RX_REC_LPFCORNER (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x01800000 ) >> 23)
+#define GET_CBR_RG_RSSI_CLOCK_GATING (((REG32(ADR_CBR_ABB_REGISTER_2)) & 0x02000000 ) >> 25)
+#define GET_CBR_RG_TXPGA_CAPSW (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_TXPGA_MAIN (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x000000fc ) >> 2)
+#define GET_CBR_RG_TXPGA_STEER (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x00003f00 ) >> 8)
+#define GET_CBR_RG_TXMOD_GMCELL (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_TXLPF_GMCELL (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x00030000 ) >> 16)
+#define GET_CBR_RG_PACELL_EN (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x001c0000 ) >> 18)
+#define GET_CBR_RG_PABIAS_CTRL (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x01e00000 ) >> 21)
+#define GET_CBR_RG_PABIAS_AB (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x02000000 ) >> 25)
+#define GET_CBR_RG_TX_DIV_VSET (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x0c000000 ) >> 26)
+#define GET_CBR_RG_TX_LOBUF_VSET (((REG32(ADR_CBR_TX_FE_REGISTER)) & 0x30000000 ) >> 28)
+#define GET_CBR_RG_RX_SQDC (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00000007 ) >> 0)
+#define GET_CBR_RG_RX_DIV2_CORE (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00000018 ) >> 3)
+#define GET_CBR_RG_RX_LOBUF (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00000060 ) >> 5)
+#define GET_CBR_RG_TX_DPDGM_BIAS (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00000780 ) >> 7)
+#define GET_CBR_RG_TX_DPD_DIV (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00007800 ) >> 11)
+#define GET_CBR_RG_TX_TSSI_BIAS (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00038000 ) >> 15)
+#define GET_CBR_RG_TX_TSSI_DIV (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x001c0000 ) >> 18)
+#define GET_CBR_RG_TX_TSSI_TESTMODE (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00200000 ) >> 21)
+#define GET_CBR_RG_TX_TSSI_TEST (((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0x00c00000 ) >> 22)
+#define GET_CBR_RG_RX_HG_LNA_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_RX_HG_LNAHGN_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x0000003c ) >> 2)
+#define GET_CBR_RG_RX_HG_LNAHGP_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x000003c0 ) >> 6)
+#define GET_CBR_RG_RX_HG_LNALG_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00003c00 ) >> 10)
+#define GET_CBR_RG_RX_HG_TZ_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_RX_HG_TZ_CAP (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00070000 ) >> 16)
+#define GET_CBR_RG_RX_MG_LNA_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_RX_MG_LNAHGN_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x0000003c ) >> 2)
+#define GET_CBR_RG_RX_MG_LNAHGP_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x000003c0 ) >> 6)
+#define GET_CBR_RG_RX_MG_LNALG_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00003c00 ) >> 10)
+#define GET_CBR_RG_RX_MG_TZ_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_RX_MG_TZ_CAP (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00070000 ) >> 16)
+#define GET_CBR_RG_RX_LG_LNA_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_RX_LG_LNAHGN_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x0000003c ) >> 2)
+#define GET_CBR_RG_RX_LG_LNAHGP_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x000003c0 ) >> 6)
+#define GET_CBR_RG_RX_LG_LNALG_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00003c00 ) >> 10)
+#define GET_CBR_RG_RX_LG_TZ_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_RX_LG_TZ_CAP (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00070000 ) >> 16)
+#define GET_CBR_RG_RX_ULG_LNA_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_RX_ULG_LNAHGN_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x0000003c ) >> 2)
+#define GET_CBR_RG_RX_ULG_LNAHGP_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x000003c0 ) >> 6)
+#define GET_CBR_RG_RX_ULG_LNALG_BIAS (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00003c00 ) >> 10)
+#define GET_CBR_RG_RX_ULG_TZ_GC (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_RX_ULG_TZ_CAP (((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00070000 ) >> 16)
+#define GET_CBR_RG_HPF1_FAST_SET_X (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_HPF1_FAST_SET_Y (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_HPF1_FAST_SET_Z (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_HPF_T1A (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_CBR_RG_HPF_T1B (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000060 ) >> 5)
+#define GET_CBR_RG_HPF_T1C (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000180 ) >> 7)
+#define GET_CBR_RG_RX_LNA_TRI_SEL (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00000600 ) >> 9)
+#define GET_CBR_RG_RX_LNA_SETTLE (((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0x00001800 ) >> 11)
+#define GET_CBR_RG_ADC_CLKSEL (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_ADC_DIBIAS (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_CBR_RG_ADC_DIVR (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_CBR_RG_ADC_DVCMI (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000030 ) >> 4)
+#define GET_CBR_RG_ADC_SAMSEL (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x000003c0 ) >> 6)
+#define GET_CBR_RG_ADC_STNBY (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_ADC_TESTMODE (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_ADC_TSEL (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x0000f000 ) >> 12)
+#define GET_CBR_RG_ADC_VRSEL (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00030000 ) >> 16)
+#define GET_CBR_RG_DICMP (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x000c0000 ) >> 18)
+#define GET_CBR_RG_DIOP (((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0x00300000 ) >> 20)
+#define GET_CBR_RG_DACI1ST (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_TX_DACLPF_ICOURSE (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x0000000c ) >> 2)
+#define GET_CBR_RG_TX_DACLPF_IFINE (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00000030 ) >> 4)
+#define GET_CBR_RG_TX_DACLPF_VCM (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x000000c0 ) >> 6)
+#define GET_CBR_RG_TX_DAC_CKEDGE_SEL (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_CBR_RG_TX_DAC_IBIAS (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00000600 ) >> 9)
+#define GET_CBR_RG_TX_DAC_OS (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00003800 ) >> 11)
+#define GET_CBR_RG_TX_DAC_RCAL (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x0000c000 ) >> 14)
+#define GET_CBR_RG_TX_DAC_TSEL (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x000f0000 ) >> 16)
+#define GET_CBR_RG_TX_EN_VOLTAGE_IN (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00100000 ) >> 20)
+#define GET_CBR_RG_TXLPF_BYPASS (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_CBR_RG_TXLPF_BOOSTI (((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0x00400000 ) >> 22)
+#define GET_CBR_RG_EN_SX_R3 (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_EN_SX_CH (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_EN_SX_CHP (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_EN_SX_DIVCK (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000008 ) >> 3)
+#define GET_CBR_RG_EN_SX_VCOBF (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000010 ) >> 4)
+#define GET_CBR_RG_EN_SX_VCO (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000020 ) >> 5)
+#define GET_CBR_RG_EN_SX_MOD (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000040 ) >> 6)
+#define GET_CBR_RG_EN_SX_LCK (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000080 ) >> 7)
+#define GET_CBR_RG_EN_SX_DITHER (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000100 ) >> 8)
+#define GET_CBR_RG_EN_SX_DELCAL (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_EN_SX_PC_BYPASS (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_EN_SX_VT_MON (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_EN_SX_VT_MON_DG (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00001000 ) >> 12)
+#define GET_CBR_RG_EN_SX_DIV (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00002000 ) >> 13)
+#define GET_CBR_RG_EN_SX_LPF (((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0x00004000 ) >> 14)
+#define GET_CBR_RG_SX_RFCTRL_F (((REG32(ADR_CBR_SYN_RGISTER_1)) & 0x00ffffff ) >> 0)
+#define GET_CBR_RG_SX_SEL_CP (((REG32(ADR_CBR_SYN_RGISTER_1)) & 0x0f000000 ) >> 24)
+#define GET_CBR_RG_SX_SEL_CS (((REG32(ADR_CBR_SYN_RGISTER_1)) & 0xf0000000 ) >> 28)
+#define GET_CBR_RG_SX_RFCTRL_CH (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x000007ff ) >> 0)
+#define GET_CBR_RG_SX_SEL_C3 (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x00007800 ) >> 11)
+#define GET_CBR_RG_SX_SEL_RS (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x000f8000 ) >> 15)
+#define GET_CBR_RG_SX_SEL_R3 (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x01f00000 ) >> 20)
+#define GET_CBR_RG_SX_SEL_ICHP (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x0000001f ) >> 0)
+#define GET_CBR_RG_SX_SEL_PCHP (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x000003e0 ) >> 5)
+#define GET_CBR_RG_SX_SEL_CHP_REGOP (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x00003c00 ) >> 10)
+#define GET_CBR_RG_SX_SEL_CHP_UNIOP (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x0003c000 ) >> 14)
+#define GET_CBR_RG_SX_CHP_IOST_POL (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x00040000 ) >> 18)
+#define GET_CBR_RG_SX_CHP_IOST (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x00380000 ) >> 19)
+#define GET_CBR_RG_SX_PFDSEL (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x00400000 ) >> 22)
+#define GET_CBR_RG_SX_PFD_SET (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x00800000 ) >> 23)
+#define GET_CBR_RG_SX_PFD_SET1 (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x01000000 ) >> 24)
+#define GET_CBR_RG_SX_PFD_SET2 (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x02000000 ) >> 25)
+#define GET_CBR_RG_SX_VBNCAS_SEL (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x04000000 ) >> 26)
+#define GET_CBR_RG_SX_PFD_RST_H (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x08000000 ) >> 27)
+#define GET_CBR_RG_SX_PFD_TRUP (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x10000000 ) >> 28)
+#define GET_CBR_RG_SX_PFD_TRDN (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x20000000 ) >> 29)
+#define GET_CBR_RG_SX_PFD_TRSEL (((REG32(ADR_CBR_SYN_PFD_CHP)) & 0x40000000 ) >> 30)
+#define GET_CBR_RG_SX_VCOBA_R (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x00000007 ) >> 0)
+#define GET_CBR_RG_SX_VCORSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x000000f8 ) >> 3)
+#define GET_CBR_RG_SX_VCOCUSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x00000f00 ) >> 8)
+#define GET_CBR_RG_SX_RXBFSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x0000f000 ) >> 12)
+#define GET_CBR_RG_SX_TXBFSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x000f0000 ) >> 16)
+#define GET_CBR_RG_SX_VCOBFSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x00f00000 ) >> 20)
+#define GET_CBR_RG_SX_DIVBFSEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x0f000000 ) >> 24)
+#define GET_CBR_RG_SX_GNDR_SEL (((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xf0000000 ) >> 28)
+#define GET_CBR_RG_SX_DITHER_WEIGHT (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_SX_MOD_ERRCMP (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x0000000c ) >> 2)
+#define GET_CBR_RG_SX_MOD_ORDER (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000030 ) >> 4)
+#define GET_CBR_RG_SX_SDM_D1 (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000040 ) >> 6)
+#define GET_CBR_RG_SX_SDM_D2 (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000080 ) >> 7)
+#define GET_CBR_RG_SDM_PASS (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000100 ) >> 8)
+#define GET_CBR_RG_SX_RST_H_DIV (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_SX_SDM_EDGE (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_SX_XO_GM (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00001800 ) >> 11)
+#define GET_CBR_RG_SX_REFBYTWO (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00002000 ) >> 13)
+#define GET_CBR_RG_SX_XO_SWCAP (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x0003c000 ) >> 14)
+#define GET_CBR_RG_SX_SDMLUT_INV (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00040000 ) >> 18)
+#define GET_CBR_RG_SX_LCKEN (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00080000 ) >> 19)
+#define GET_CBR_RG_SX_PREVDD (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x00f00000 ) >> 20)
+#define GET_CBR_RG_SX_PSCONTERVDD (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x0f000000 ) >> 24)
+#define GET_CBR_RG_SX_MOD_ERR_DELAY (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x30000000 ) >> 28)
+#define GET_CBR_RG_SX_MODDB (((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0x40000000 ) >> 30)
+#define GET_CBR_RG_SX_CV_CURVE_SEL (((REG32(ADR_CBR_SYN_LCK1)) & 0x00000003 ) >> 0)
+#define GET_CBR_RG_SX_SEL_DELAY (((REG32(ADR_CBR_SYN_LCK1)) & 0x0000007c ) >> 2)
+#define GET_CBR_RG_SX_REF_CYCLE (((REG32(ADR_CBR_SYN_LCK1)) & 0x00000780 ) >> 7)
+#define GET_CBR_RG_SX_VCOBY16 (((REG32(ADR_CBR_SYN_LCK1)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_SX_VCOBY32 (((REG32(ADR_CBR_SYN_LCK1)) & 0x00001000 ) >> 12)
+#define GET_CBR_RG_SX_PH (((REG32(ADR_CBR_SYN_LCK1)) & 0x00002000 ) >> 13)
+#define GET_CBR_RG_SX_PL (((REG32(ADR_CBR_SYN_LCK1)) & 0x00004000 ) >> 14)
+#define GET_CBR_RG_SX_VT_MON_MODE (((REG32(ADR_CBR_SYN_LCK2)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_SX_VT_TH_HI (((REG32(ADR_CBR_SYN_LCK2)) & 0x00000006 ) >> 1)
+#define GET_CBR_RG_SX_VT_TH_LO (((REG32(ADR_CBR_SYN_LCK2)) & 0x00000018 ) >> 3)
+#define GET_CBR_RG_SX_VT_SET (((REG32(ADR_CBR_SYN_LCK2)) & 0x00000020 ) >> 5)
+#define GET_CBR_RG_SX_VT_MON_TMR (((REG32(ADR_CBR_SYN_LCK2)) & 0x00007fc0 ) >> 6)
+#define GET_CBR_RG_IDEAL_CYCLE (((REG32(ADR_CBR_SYN_LCK2)) & 0x0fff8000 ) >> 15)
+#define GET_CBR_RG_EN_DP_VT_MON (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_DP_VT_TH_HI (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_CBR_RG_DP_VT_TH_LO (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_CBR_RG_DP_VT_MON_TMR (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00003fe0 ) >> 5)
+#define GET_CBR_RG_DP_CK320BY2 (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_CBR_RG_SX_DELCTRL (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x001f8000 ) >> 15)
+#define GET_CBR_RG_DP_OD_TEST (((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_CBR_RG_DP_BBPLL_BP (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_DP_BBPLL_ICP (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_CBR_RG_DP_BBPLL_IDUAL (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_CBR_RG_DP_BBPLL_OD_TEST (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x000001e0 ) >> 5)
+#define GET_CBR_RG_DP_BBPLL_PD (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_DP_BBPLL_TESTSEL (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00001c00 ) >> 10)
+#define GET_CBR_RG_DP_BBPLL_PFD_DLY (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00006000 ) >> 13)
+#define GET_CBR_RG_DP_RP (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00038000 ) >> 15)
+#define GET_CBR_RG_DP_RHP (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x000c0000 ) >> 18)
+#define GET_CBR_RG_DP_DR3 (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x00700000 ) >> 20)
+#define GET_CBR_RG_DP_DCP (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x07800000 ) >> 23)
+#define GET_CBR_RG_DP_DCS (((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x78000000 ) >> 27)
+#define GET_CBR_RG_DP_FBDIV (((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0x00000fff ) >> 0)
+#define GET_CBR_RG_DP_FODIV (((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0x003ff000 ) >> 12)
+#define GET_CBR_RG_DP_REFDIV (((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0xffc00000 ) >> 22)
+#define GET_CBR_RG_IDACAI_PGAG15 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG15 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG14 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG14 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG13 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG13 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG12 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG12 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG11 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG11 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG10 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG10 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG9 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG9 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG8 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG8 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG7 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG7 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG6 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG6 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG5 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG5 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG4 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG4 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG3 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG3 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG2 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG2 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_IDACAI_PGAG1 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0x0000003f ) >> 0)
+#define GET_CBR_RG_IDACAQ_PGAG1 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0x00000fc0 ) >> 6)
+#define GET_CBR_RG_IDACAI_PGAG0 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0x0003f000 ) >> 12)
+#define GET_CBR_RG_IDACAQ_PGAG0 (((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0x00fc0000 ) >> 18)
+#define GET_CBR_RG_EN_RCAL (((REG32(ADR_CBR_RCAL_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_RCAL_SPD (((REG32(ADR_CBR_RCAL_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_CBR_RG_RCAL_TMR (((REG32(ADR_CBR_RCAL_REGISTER)) & 0x000001fc ) >> 2)
+#define GET_CBR_RG_RCAL_CODE_CWR (((REG32(ADR_CBR_RCAL_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_CBR_RG_RCAL_CODE_CWD (((REG32(ADR_CBR_RCAL_REGISTER)) & 0x00007c00 ) >> 10)
+#define GET_CBR_RG_SX_SUB_SEL_CWR (((REG32(ADR_CBR_MANUAL_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_SX_SUB_SEL_CWD (((REG32(ADR_CBR_MANUAL_REGISTER)) & 0x000000fe ) >> 1)
+#define GET_CBR_RG_DP_BBPLL_BS_CWR (((REG32(ADR_CBR_MANUAL_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_CBR_RG_DP_BBPLL_BS_CWD (((REG32(ADR_CBR_MANUAL_REGISTER)) & 0x00007e00 ) >> 9)
+#define GET_CBR_RCAL_RDY (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00000001 ) >> 0)
+#define GET_CBR_DA_LCK_RDY (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00000002 ) >> 1)
+#define GET_CBR_VT_MON_RDY (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00000004 ) >> 2)
+#define GET_CBR_DP_VT_MON_RDY (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00000008 ) >> 3)
+#define GET_CBR_CH_RDY (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00000010 ) >> 4)
+#define GET_CBR_DA_R_CODE_LUT (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x000007c0 ) >> 6)
+#define GET_CBR_AD_SX_VT_MON_Q (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00001800 ) >> 11)
+#define GET_CBR_AD_DP_VT_MON_Q (((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0x00006000 ) >> 13)
+#define GET_CBR_DA_R_CAL_CODE (((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0x0000001f ) >> 0)
+#define GET_CBR_DA_SX_SUB_SEL (((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0x00000fe0 ) >> 5)
+#define GET_CBR_DA_DP_BBPLL_BS (((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0x0003f000 ) >> 12)
+#define GET_CBR_TX_EN (((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0x00000001 ) >> 0)
+#define GET_CBR_TX_CNT_RST (((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0x00000002 ) >> 1)
+#define GET_CBR_IFS_TIME (((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0x000000fc ) >> 2)
+#define GET_CBR_LENGTH_TARGET (((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0x000fff00 ) >> 8)
+#define GET_CBR_TX_CNT_TARGET (((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0xff000000 ) >> 24)
+#define GET_CBR_TC_CNT_TARGET (((REG32(ADR_CBR_RG_PKT_GEN_1)) & 0x00ffffff ) >> 0)
+#define GET_CBR_PLCP_PSDU_DATA_MEM (((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0x000000ff ) >> 0)
+#define GET_CBR_PLCP_PSDU_PREAMBLE_SHORT (((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0x00000100 ) >> 8)
+#define GET_CBR_PLCP_BYTE_LENGTH (((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0x001ffe00 ) >> 9)
+#define GET_CBR_PLCP_PSDU_RATE (((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0x00600000 ) >> 21)
+#define GET_CBR_TAIL_TIME (((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0x1f800000 ) >> 23)
+#define GET_CBR_RG_O_PAD_PD (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000001 ) >> 0)
+#define GET_CBR_RG_I_PAD_PD (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000002 ) >> 1)
+#define GET_CBR_SEL_ADCKP_INV (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000004 ) >> 2)
+#define GET_CBR_RG_PAD_DS (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000008 ) >> 3)
+#define GET_CBR_SEL_ADCKP_MUX (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000010 ) >> 4)
+#define GET_CBR_RG_PAD_DS_CLK (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000020 ) >> 5)
+#define GET_CBR_INTP_SEL (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000200 ) >> 9)
+#define GET_CBR_IQ_SWP (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000400 ) >> 10)
+#define GET_CBR_RG_EN_EXT_DA (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00000800 ) >> 11)
+#define GET_CBR_RG_DIS_DA_OFFSET (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00001000 ) >> 12)
+#define GET_CBR_DBG_SEL (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x000f0000 ) >> 16)
+#define GET_CBR_DBG_EN (((REG32(ADR_CBR_RG_INTEGRATION)) & 0x00100000 ) >> 20)
+#define GET_CBR_RG_PKT_GEN_TX_CNT (((REG32(ADR_CBR_RG_PKT_GEN_TXCNT)) & 0xffffffff ) >> 0)
+#define GET_CBR_TP_SEL (((REG32(ADR_CBR_PATTERN_GEN)) & 0x0000001f ) >> 0)
+#define GET_CBR_IDEAL_IQ_EN (((REG32(ADR_CBR_PATTERN_GEN)) & 0x00000020 ) >> 5)
+#define GET_CBR_DATA_OUT_SEL (((REG32(ADR_CBR_PATTERN_GEN)) & 0x000001c0 ) >> 6)
+#define GET_CBR_TWO_TONE_EN (((REG32(ADR_CBR_PATTERN_GEN)) & 0x00000200 ) >> 9)
+#define GET_CBR_FREQ_SEL (((REG32(ADR_CBR_PATTERN_GEN)) & 0x00ff0000 ) >> 16)
+#define GET_CBR_IQ_SCALE (((REG32(ADR_CBR_PATTERN_GEN)) & 0xff000000 ) >> 24)
+#define GET_CPU_QUE_POP (((REG32(ADR_MB_CPU_INT)) & 0x00000001 ) >> 0)
+#define GET_CPU_INT (((REG32(ADR_MB_CPU_INT)) & 0x00000004 ) >> 2)
+#define GET_CPU_ID_TB0 (((REG32(ADR_CPU_ID_TB0)) & 0xffffffff ) >> 0)
+#define GET_CPU_ID_TB1 (((REG32(ADR_CPU_ID_TB1)) & 0xffffffff ) >> 0)
+#define GET_HW_PKTID (((REG32(ADR_CH0_TRIG_1)) & 0x000007ff ) >> 0)
+#define GET_CH0_INT_ADDR (((REG32(ADR_CH0_TRIG_0)) & 0xffffffff ) >> 0)
+#define GET_PRI_HW_PKTID (((REG32(ADR_CH0_PRI_TRIG)) & 0x000007ff ) >> 0)
+#define GET_CH0_FULL (((REG32(ADR_MCU_STATUS)) & 0x00000001 ) >> 0)
+#define GET_FF0_EMPTY (((REG32(ADR_MCU_STATUS)) & 0x00000002 ) >> 1)
+#define GET_RLS_BUSY (((REG32(ADR_MCU_STATUS)) & 0x00000200 ) >> 9)
+#define GET_RLS_COUNT_CLR (((REG32(ADR_MCU_STATUS)) & 0x00000400 ) >> 10)
+#define GET_RTN_COUNT_CLR (((REG32(ADR_MCU_STATUS)) & 0x00000800 ) >> 11)
+#define GET_RLS_COUNT (((REG32(ADR_MCU_STATUS)) & 0x00ff0000 ) >> 16)
+#define GET_RTN_COUNT (((REG32(ADR_MCU_STATUS)) & 0xff000000 ) >> 24)
+#define GET_FF0_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x0000001f ) >> 0)
+#define GET_FF1_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x000001e0 ) >> 5)
+#define GET_FF3_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x00003800 ) >> 11)
+#define GET_FF5_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x000e0000 ) >> 17)
+#define GET_FF6_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x00700000 ) >> 20)
+#define GET_FF7_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x03800000 ) >> 23)
+#define GET_FF8_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0x1c000000 ) >> 26)
+#define GET_FF9_CNT (((REG32(ADR_RD_IN_FFCNT1)) & 0xe0000000 ) >> 29)
+#define GET_FF10_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00000007 ) >> 0)
+#define GET_FF11_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00000038 ) >> 3)
+#define GET_FF12_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x000001c0 ) >> 6)
+#define GET_FF13_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00000600 ) >> 9)
+#define GET_FF14_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00001800 ) >> 11)
+#define GET_FF15_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00006000 ) >> 13)
+#define GET_FF4_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x000f8000 ) >> 15)
+#define GET_FF2_CNT (((REG32(ADR_RD_IN_FFCNT2)) & 0x00700000 ) >> 20)
+#define GET_CH1_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000002 ) >> 1)
+#define GET_CH2_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000004 ) >> 2)
+#define GET_CH3_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000008 ) >> 3)
+#define GET_CH4_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000010 ) >> 4)
+#define GET_CH5_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000020 ) >> 5)
+#define GET_CH6_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000040 ) >> 6)
+#define GET_CH7_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000080 ) >> 7)
+#define GET_CH8_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000100 ) >> 8)
+#define GET_CH9_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000200 ) >> 9)
+#define GET_CH10_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000400 ) >> 10)
+#define GET_CH11_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00000800 ) >> 11)
+#define GET_CH12_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00001000 ) >> 12)
+#define GET_CH13_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00002000 ) >> 13)
+#define GET_CH14_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00004000 ) >> 14)
+#define GET_CH15_FULL (((REG32(ADR_RD_FFIN_FULL)) & 0x00008000 ) >> 15)
+#define GET_HALT_CH0 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000001 ) >> 0)
+#define GET_HALT_CH1 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000002 ) >> 1)
+#define GET_HALT_CH2 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000004 ) >> 2)
+#define GET_HALT_CH3 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000008 ) >> 3)
+#define GET_HALT_CH4 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000010 ) >> 4)
+#define GET_HALT_CH5 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000020 ) >> 5)
+#define GET_HALT_CH6 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000040 ) >> 6)
+#define GET_HALT_CH7 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000080 ) >> 7)
+#define GET_HALT_CH8 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000100 ) >> 8)
+#define GET_HALT_CH9 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000200 ) >> 9)
+#define GET_HALT_CH10 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000400 ) >> 10)
+#define GET_HALT_CH11 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00000800 ) >> 11)
+#define GET_HALT_CH12 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00001000 ) >> 12)
+#define GET_HALT_CH13 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00002000 ) >> 13)
+#define GET_HALT_CH14 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00004000 ) >> 14)
+#define GET_HALT_CH15 (((REG32(ADR_MBOX_HALT_CFG)) & 0x00008000 ) >> 15)
+#define GET_STOP_MBOX (((REG32(ADR_MBOX_HALT_CFG)) & 0x00010000 ) >> 16)
+#define GET_MB_ERR_AUTO_HALT_EN (((REG32(ADR_MBOX_HALT_CFG)) & 0x00100000 ) >> 20)
+#define GET_MB_EXCEPT_CLR (((REG32(ADR_MBOX_HALT_CFG)) & 0x00200000 ) >> 21)
+#define GET_MB_EXCEPT_CASE (((REG32(ADR_MBOX_HALT_CFG)) & 0xff000000 ) >> 24)
+#define GET_MB_DBG_TIME_STEP (((REG32(ADR_MB_DBG_CFG1)) & 0x0000ffff ) >> 0)
+#define GET_DBG_TYPE (((REG32(ADR_MB_DBG_CFG1)) & 0x00030000 ) >> 16)
+#define GET_MB_DBG_CLR (((REG32(ADR_MB_DBG_CFG1)) & 0x00040000 ) >> 18)
+#define GET_DBG_ALC_LOG_EN (((REG32(ADR_MB_DBG_CFG1)) & 0x00080000 ) >> 19)
+#define GET_MB_DBG_COUNTER_EN (((REG32(ADR_MB_DBG_CFG1)) & 0x01000000 ) >> 24)
+#define GET_MB_DBG_EN (((REG32(ADR_MB_DBG_CFG1)) & 0x80000000 ) >> 31)
+#define GET_MB_DBG_RECORD_CNT (((REG32(ADR_MB_DBG_CFG2)) & 0x0000ffff ) >> 0)
+#define GET_MB_DBG_LENGTH (((REG32(ADR_MB_DBG_CFG2)) & 0xffff0000 ) >> 16)
+#define GET_MB_DBG_CFG_ADDR (((REG32(ADR_MB_DBG_CFG3)) & 0xffffffff ) >> 0)
+#define GET_DBG_HWID0_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000001 ) >> 0)
+#define GET_DBG_HWID1_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000002 ) >> 1)
+#define GET_DBG_HWID2_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000004 ) >> 2)
+#define GET_DBG_HWID3_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000008 ) >> 3)
+#define GET_DBG_HWID4_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000010 ) >> 4)
+#define GET_DBG_HWID5_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000020 ) >> 5)
+#define GET_DBG_HWID6_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000040 ) >> 6)
+#define GET_DBG_HWID7_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000080 ) >> 7)
+#define GET_DBG_HWID8_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000100 ) >> 8)
+#define GET_DBG_HWID9_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000200 ) >> 9)
+#define GET_DBG_HWID10_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000400 ) >> 10)
+#define GET_DBG_HWID11_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00000800 ) >> 11)
+#define GET_DBG_HWID12_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00001000 ) >> 12)
+#define GET_DBG_HWID13_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00002000 ) >> 13)
+#define GET_DBG_HWID14_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00004000 ) >> 14)
+#define GET_DBG_HWID15_WR_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00008000 ) >> 15)
+#define GET_DBG_HWID0_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00010000 ) >> 16)
+#define GET_DBG_HWID1_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00020000 ) >> 17)
+#define GET_DBG_HWID2_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00040000 ) >> 18)
+#define GET_DBG_HWID3_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00080000 ) >> 19)
+#define GET_DBG_HWID4_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00100000 ) >> 20)
+#define GET_DBG_HWID5_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00200000 ) >> 21)
+#define GET_DBG_HWID6_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00400000 ) >> 22)
+#define GET_DBG_HWID7_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x00800000 ) >> 23)
+#define GET_DBG_HWID8_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x01000000 ) >> 24)
+#define GET_DBG_HWID9_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x02000000 ) >> 25)
+#define GET_DBG_HWID10_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x04000000 ) >> 26)
+#define GET_DBG_HWID11_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x08000000 ) >> 27)
+#define GET_DBG_HWID12_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x10000000 ) >> 28)
+#define GET_DBG_HWID13_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x20000000 ) >> 29)
+#define GET_DBG_HWID14_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x40000000 ) >> 30)
+#define GET_DBG_HWID15_RD_EN (((REG32(ADR_MB_DBG_CFG4)) & 0x80000000 ) >> 31)
+#define GET_MB_OUT_QUEUE_EN (((REG32(ADR_MB_OUT_QUEUE_CFG)) & 0x00000002 ) >> 1)
+#define GET_CH0_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000001 ) >> 0)
+#define GET_CH1_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000002 ) >> 1)
+#define GET_CH2_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000004 ) >> 2)
+#define GET_CH3_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000008 ) >> 3)
+#define GET_CH4_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000010 ) >> 4)
+#define GET_CH5_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000020 ) >> 5)
+#define GET_CH6_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000040 ) >> 6)
+#define GET_CH7_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000080 ) >> 7)
+#define GET_CH8_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000100 ) >> 8)
+#define GET_CH9_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000200 ) >> 9)
+#define GET_CH10_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000400 ) >> 10)
+#define GET_CH11_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00000800 ) >> 11)
+#define GET_CH12_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00001000 ) >> 12)
+#define GET_CH13_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00002000 ) >> 13)
+#define GET_CH14_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00004000 ) >> 14)
+#define GET_CH15_QUEUE_FLUSH (((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0x00008000 ) >> 15)
+#define GET_FFO0_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x0000001f ) >> 0)
+#define GET_FFO1_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x000003e0 ) >> 5)
+#define GET_FFO2_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x00000c00 ) >> 10)
+#define GET_FFO3_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x000f8000 ) >> 15)
+#define GET_FFO4_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x00300000 ) >> 20)
+#define GET_FFO5_CNT (((REG32(ADR_RD_FFOUT_CNT1)) & 0x0e000000 ) >> 25)
+#define GET_FFO6_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x0000000f ) >> 0)
+#define GET_FFO7_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x000003e0 ) >> 5)
+#define GET_FFO8_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x00007c00 ) >> 10)
+#define GET_FFO9_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x000f8000 ) >> 15)
+#define GET_FFO10_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x00f00000 ) >> 20)
+#define GET_FFO11_CNT (((REG32(ADR_RD_FFOUT_CNT2)) & 0x3e000000 ) >> 25)
+#define GET_FFO12_CNT (((REG32(ADR_RD_FFOUT_CNT3)) & 0x00000007 ) >> 0)
+#define GET_FFO13_CNT (((REG32(ADR_RD_FFOUT_CNT3)) & 0x00000060 ) >> 5)
+#define GET_FFO14_CNT (((REG32(ADR_RD_FFOUT_CNT3)) & 0x00000c00 ) >> 10)
+#define GET_FFO15_CNT (((REG32(ADR_RD_FFOUT_CNT3)) & 0x001f8000 ) >> 15)
+#define GET_CH0_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000001 ) >> 0)
+#define GET_CH1_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000002 ) >> 1)
+#define GET_CH2_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000004 ) >> 2)
+#define GET_CH3_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000008 ) >> 3)
+#define GET_CH4_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000010 ) >> 4)
+#define GET_CH5_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000020 ) >> 5)
+#define GET_CH6_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000040 ) >> 6)
+#define GET_CH7_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000080 ) >> 7)
+#define GET_CH8_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000100 ) >> 8)
+#define GET_CH9_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000200 ) >> 9)
+#define GET_CH10_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000400 ) >> 10)
+#define GET_CH11_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00000800 ) >> 11)
+#define GET_CH12_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00001000 ) >> 12)
+#define GET_CH13_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00002000 ) >> 13)
+#define GET_CH14_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00004000 ) >> 14)
+#define GET_CH15_FFO_FULL (((REG32(ADR_RD_FFOUT_FULL)) & 0x00008000 ) >> 15)
+#define GET_CH0_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000001 ) >> 0)
+#define GET_CH1_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000002 ) >> 1)
+#define GET_CH2_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000004 ) >> 2)
+#define GET_CH3_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000008 ) >> 3)
+#define GET_CH4_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000010 ) >> 4)
+#define GET_CH5_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000020 ) >> 5)
+#define GET_CH6_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000040 ) >> 6)
+#define GET_CH7_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000080 ) >> 7)
+#define GET_CH8_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000100 ) >> 8)
+#define GET_CH9_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000200 ) >> 9)
+#define GET_CH10_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000400 ) >> 10)
+#define GET_CH11_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00000800 ) >> 11)
+#define GET_CH12_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00001000 ) >> 12)
+#define GET_CH13_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00002000 ) >> 13)
+#define GET_CH14_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00004000 ) >> 14)
+#define GET_CH15_LOWTHOLD_INT (((REG32(ADR_MB_THRESHOLD6)) & 0x00008000 ) >> 15)
+#define GET_MB_LOW_THOLD_EN (((REG32(ADR_MB_THRESHOLD6)) & 0x80000000 ) >> 31)
+#define GET_CH0_LOWTHOLD (((REG32(ADR_MB_THRESHOLD7)) & 0x0000001f ) >> 0)
+#define GET_CH1_LOWTHOLD (((REG32(ADR_MB_THRESHOLD7)) & 0x00001f00 ) >> 8)
+#define GET_CH2_LOWTHOLD (((REG32(ADR_MB_THRESHOLD7)) & 0x001f0000 ) >> 16)
+#define GET_CH3_LOWTHOLD (((REG32(ADR_MB_THRESHOLD7)) & 0x1f000000 ) >> 24)
+#define GET_CH4_LOWTHOLD (((REG32(ADR_MB_THRESHOLD8)) & 0x0000001f ) >> 0)
+#define GET_CH5_LOWTHOLD (((REG32(ADR_MB_THRESHOLD8)) & 0x00001f00 ) >> 8)
+#define GET_CH6_LOWTHOLD (((REG32(ADR_MB_THRESHOLD8)) & 0x001f0000 ) >> 16)
+#define GET_CH7_LOWTHOLD (((REG32(ADR_MB_THRESHOLD8)) & 0x1f000000 ) >> 24)
+#define GET_CH8_LOWTHOLD (((REG32(ADR_MB_THRESHOLD9)) & 0x0000001f ) >> 0)
+#define GET_CH9_LOWTHOLD (((REG32(ADR_MB_THRESHOLD9)) & 0x00001f00 ) >> 8)
+#define GET_CH10_LOWTHOLD (((REG32(ADR_MB_THRESHOLD9)) & 0x001f0000 ) >> 16)
+#define GET_CH11_LOWTHOLD (((REG32(ADR_MB_THRESHOLD9)) & 0x1f000000 ) >> 24)
+#define GET_CH12_LOWTHOLD (((REG32(ADR_MB_THRESHOLD10)) & 0x0000001f ) >> 0)
+#define GET_CH13_LOWTHOLD (((REG32(ADR_MB_THRESHOLD10)) & 0x00001f00 ) >> 8)
+#define GET_CH14_LOWTHOLD (((REG32(ADR_MB_THRESHOLD10)) & 0x001f0000 ) >> 16)
+#define GET_CH15_LOWTHOLD (((REG32(ADR_MB_THRESHOLD10)) & 0x1f000000 ) >> 24)
+#define GET_TRASH_TIMEOUT_EN (((REG32(ADR_MB_TRASH_CFG)) & 0x00000001 ) >> 0)
+#define GET_TRASH_CAN_INT (((REG32(ADR_MB_TRASH_CFG)) & 0x00000002 ) >> 1)
+#define GET_TRASH_INT_ID (((REG32(ADR_MB_TRASH_CFG)) & 0x000007f0 ) >> 4)
+#define GET_TRASH_TIMEOUT (((REG32(ADR_MB_TRASH_CFG)) & 0x03ff0000 ) >> 16)
+#define GET_CH0_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000001 ) >> 0)
+#define GET_CH1_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000002 ) >> 1)
+#define GET_CH2_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000004 ) >> 2)
+#define GET_CH3_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000008 ) >> 3)
+#define GET_CH4_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000010 ) >> 4)
+#define GET_CH5_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000020 ) >> 5)
+#define GET_CH6_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000040 ) >> 6)
+#define GET_CH7_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000080 ) >> 7)
+#define GET_CH8_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000100 ) >> 8)
+#define GET_CH9_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000200 ) >> 9)
+#define GET_CH10_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000400 ) >> 10)
+#define GET_CH11_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00000800 ) >> 11)
+#define GET_CH12_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00001000 ) >> 12)
+#define GET_CH13_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00002000 ) >> 13)
+#define GET_CH14_WRFF_FLUSH (((REG32(ADR_MB_IN_FF_FLUSH)) & 0x00004000 ) >> 14)
+#define GET_CPU_ID_TB2 (((REG32(ADR_CPU_ID_TB2)) & 0xffffffff ) >> 0)
+#define GET_CPU_ID_TB3 (((REG32(ADR_CPU_ID_TB3)) & 0xffffffff ) >> 0)
+#define GET_IQ_LOG_EN (((REG32(ADR_PHY_IQ_LOG_CFG0)) & 0x00000001 ) >> 0)
+#define GET_IQ_LOG_STOP_MODE (((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0x00000001 ) >> 0)
+#define GET_GPIO_STOP_EN (((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0x00000010 ) >> 4)
+#define GET_GPIO_STOP_POL (((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0x00000020 ) >> 5)
+#define GET_IQ_LOG_TIMER (((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0xffff0000 ) >> 16)
+#define GET_IQ_LOG_LEN (((REG32(ADR_PHY_IQ_LOG_LEN)) & 0x0000ffff ) >> 0)
+#define GET_IQ_LOG_TAIL_ADR (((REG32(ADR_PHY_IQ_LOG_PTR)) & 0x0000ffff ) >> 0)
+#define GET_ALC_LENG (((REG32(ADR_WR_ALC)) & 0x0003ffff ) >> 0)
+#define GET_CH0_DYN_PRI (((REG32(ADR_WR_ALC)) & 0x00300000 ) >> 20)
+#define GET_MCU_PKTID (((REG32(ADR_GETID)) & 0xffffffff ) >> 0)
+#define GET_CH0_STA_PRI (((REG32(ADR_CH_STA_PRI)) & 0x00000003 ) >> 0)
+#define GET_CH1_STA_PRI (((REG32(ADR_CH_STA_PRI)) & 0x00000030 ) >> 4)
+#define GET_CH2_STA_PRI (((REG32(ADR_CH_STA_PRI)) & 0x00000300 ) >> 8)
+#define GET_CH3_STA_PRI (((REG32(ADR_CH_STA_PRI)) & 0x00003000 ) >> 12)
+#define GET_ID_TB0 (((REG32(ADR_RD_ID0)) & 0xffffffff ) >> 0)
+#define GET_ID_TB1 (((REG32(ADR_RD_ID1)) & 0xffffffff ) >> 0)
+#define GET_ID_MNG_HALT (((REG32(ADR_IMD_CFG)) & 0x00000010 ) >> 4)
+#define GET_ID_MNG_ERR_HALT_EN (((REG32(ADR_IMD_CFG)) & 0x00000020 ) >> 5)
+#define GET_ID_EXCEPT_FLG_CLR (((REG32(ADR_IMD_CFG)) & 0x00000040 ) >> 6)
+#define GET_ID_EXCEPT_FLG (((REG32(ADR_IMD_CFG)) & 0x00000080 ) >> 7)
+#define GET_ID_FULL (((REG32(ADR_IMD_STA)) & 0x00000001 ) >> 0)
+#define GET_ID_MNG_BUSY (((REG32(ADR_IMD_STA)) & 0x00000002 ) >> 1)
+#define GET_REQ_LOCK (((REG32(ADR_IMD_STA)) & 0x00000004 ) >> 2)
+#define GET_CH0_REQ_LOCK (((REG32(ADR_IMD_STA)) & 0x00000010 ) >> 4)
+#define GET_CH1_REQ_LOCK (((REG32(ADR_IMD_STA)) & 0x00000020 ) >> 5)
+#define GET_CH2_REQ_LOCK (((REG32(ADR_IMD_STA)) & 0x00000040 ) >> 6)
+#define GET_CH3_REQ_LOCK (((REG32(ADR_IMD_STA)) & 0x00000080 ) >> 7)
+#define GET_REQ_LOCK_INT_EN (((REG32(ADR_IMD_STA)) & 0x00000100 ) >> 8)
+#define GET_REQ_LOCK_INT (((REG32(ADR_IMD_STA)) & 0x00000200 ) >> 9)
+#define GET_MCU_ALC_READY (((REG32(ADR_ALC_STA)) & 0x00000001 ) >> 0)
+#define GET_ALC_FAIL (((REG32(ADR_ALC_STA)) & 0x00000002 ) >> 1)
+#define GET_ALC_BUSY (((REG32(ADR_ALC_STA)) & 0x00000004 ) >> 2)
+#define GET_CH0_NVLD (((REG32(ADR_ALC_STA)) & 0x00000010 ) >> 4)
+#define GET_CH1_NVLD (((REG32(ADR_ALC_STA)) & 0x00000020 ) >> 5)
+#define GET_CH2_NVLD (((REG32(ADR_ALC_STA)) & 0x00000040 ) >> 6)
+#define GET_CH3_NVLD (((REG32(ADR_ALC_STA)) & 0x00000080 ) >> 7)
+#define GET_ALC_INT_ID (((REG32(ADR_ALC_STA)) & 0x00007f00 ) >> 8)
+#define GET_ALC_TIMEOUT (((REG32(ADR_ALC_STA)) & 0x03ff0000 ) >> 16)
+#define GET_ALC_TIMEOUT_INT_EN (((REG32(ADR_ALC_STA)) & 0x40000000 ) >> 30)
+#define GET_ALC_TIMEOUT_INT (((REG32(ADR_ALC_STA)) & 0x80000000 ) >> 31)
+#define GET_TX_ID_COUNT (((REG32(ADR_TRX_ID_COUNT)) & 0x000000ff ) >> 0)
+#define GET_RX_ID_COUNT (((REG32(ADR_TRX_ID_COUNT)) & 0x0000ff00 ) >> 8)
+#define GET_TX_ID_THOLD (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x000000ff ) >> 0)
+#define GET_RX_ID_THOLD (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x0000ff00 ) >> 8)
+#define GET_ID_THOLD_RX_INT (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x00010000 ) >> 16)
+#define GET_RX_INT_CH (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x000e0000 ) >> 17)
+#define GET_ID_THOLD_TX_INT (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x00100000 ) >> 20)
+#define GET_TX_INT_CH (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x00e00000 ) >> 21)
+#define GET_ID_THOLD_INT_EN (((REG32(ADR_TRX_ID_THRESHOLD)) & 0x01000000 ) >> 24)
+#define GET_TX_ID_TB0 (((REG32(ADR_TX_ID0)) & 0xffffffff ) >> 0)
+#define GET_TX_ID_TB1 (((REG32(ADR_TX_ID1)) & 0xffffffff ) >> 0)
+#define GET_RX_ID_TB0 (((REG32(ADR_RX_ID0)) & 0xffffffff ) >> 0)
+#define GET_RX_ID_TB1 (((REG32(ADR_RX_ID1)) & 0xffffffff ) >> 0)
+#define GET_DOUBLE_RLS_INT_EN (((REG32(ADR_RTN_STA)) & 0x00000001 ) >> 0)
+#define GET_ID_DOUBLE_RLS_INT (((REG32(ADR_RTN_STA)) & 0x00000002 ) >> 1)
+#define GET_DOUBLE_RLS_ID (((REG32(ADR_RTN_STA)) & 0x00007f00 ) >> 8)
+#define GET_ID_LEN_THOLD_INT_EN (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x00000001 ) >> 0)
+#define GET_ALL_ID_LEN_THOLD_INT (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x00000002 ) >> 1)
+#define GET_TX_ID_LEN_THOLD_INT (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x00000004 ) >> 2)
+#define GET_RX_ID_LEN_THOLD_INT (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x00000008 ) >> 3)
+#define GET_ID_TX_LEN_THOLD (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x00001ff0 ) >> 4)
+#define GET_ID_RX_LEN_THOLD (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x003fe000 ) >> 13)
+#define GET_ID_LEN_THOLD (((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x7fc00000 ) >> 22)
+#define GET_ALL_ID_ALC_LEN (((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0x000001ff ) >> 0)
+#define GET_TX_ID_ALC_LEN (((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0x0003fe00 ) >> 9)
+#define GET_RX_ID_ALC_LEN (((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0x07fc0000 ) >> 18)
+#define GET_CH_ARB_EN (((REG32(ADR_CH_ARB_PRI)) & 0x00000001 ) >> 0)
+#define GET_CH_PRI1 (((REG32(ADR_CH_ARB_PRI)) & 0x00000030 ) >> 4)
+#define GET_CH_PRI2 (((REG32(ADR_CH_ARB_PRI)) & 0x00000300 ) >> 8)
+#define GET_CH_PRI3 (((REG32(ADR_CH_ARB_PRI)) & 0x00003000 ) >> 12)
+#define GET_CH_PRI4 (((REG32(ADR_CH_ARB_PRI)) & 0x00030000 ) >> 16)
+#define GET_TX_ID_REMAIN (((REG32(ADR_TX_ID_REMAIN_STATUS)) & 0x0000007f ) >> 0)
+#define GET_TX_PAGE_REMAIN (((REG32(ADR_TX_ID_REMAIN_STATUS)) & 0x0001ff00 ) >> 8)
+#define GET_ID_PAGE_MAX_SIZE (((REG32(ADR_ID_INFO_STA)) & 0x000001ff ) >> 0)
+#define GET_TX_PAGE_LIMIT (((REG32(ADR_TX_LIMIT_INTR)) & 0x000001ff ) >> 0)
+#define GET_TX_COUNT_LIMIT (((REG32(ADR_TX_LIMIT_INTR)) & 0x00ff0000 ) >> 16)
+#define GET_TX_LIMIT_INT (((REG32(ADR_TX_LIMIT_INTR)) & 0x40000000 ) >> 30)
+#define GET_TX_LIMIT_INT_EN (((REG32(ADR_TX_LIMIT_INTR)) & 0x80000000 ) >> 31)
+#define GET_TX_PAGE_USE_7_0 (((REG32(ADR_TX_ID_ALL_INFO)) & 0x000000ff ) >> 0)
+#define GET_TX_ID_USE_5_0 (((REG32(ADR_TX_ID_ALL_INFO)) & 0x00003f00 ) >> 8)
+#define GET_EDCA0_FFO_CNT (((REG32(ADR_TX_ID_ALL_INFO)) & 0x0003c000 ) >> 14)
+#define GET_EDCA1_FFO_CNT_3_0 (((REG32(ADR_TX_ID_ALL_INFO)) & 0x003c0000 ) >> 18)
+#define GET_EDCA2_FFO_CNT (((REG32(ADR_TX_ID_ALL_INFO)) & 0x07c00000 ) >> 22)
+#define GET_EDCA3_FFO_CNT (((REG32(ADR_TX_ID_ALL_INFO)) & 0xf8000000 ) >> 27)
+#define GET_ID_TB2 (((REG32(ADR_RD_ID2)) & 0xffffffff ) >> 0)
+#define GET_ID_TB3 (((REG32(ADR_RD_ID3)) & 0xffffffff ) >> 0)
+#define GET_TX_ID_TB2 (((REG32(ADR_TX_ID2)) & 0xffffffff ) >> 0)
+#define GET_TX_ID_TB3 (((REG32(ADR_TX_ID3)) & 0xffffffff ) >> 0)
+#define GET_RX_ID_TB2 (((REG32(ADR_RX_ID2)) & 0xffffffff ) >> 0)
+#define GET_RX_ID_TB3 (((REG32(ADR_RX_ID3)) & 0xffffffff ) >> 0)
+#define GET_TX_PAGE_USE2 (((REG32(ADR_TX_ID_ALL_INFO2)) & 0x000001ff ) >> 0)
+#define GET_TX_ID_USE2 (((REG32(ADR_TX_ID_ALL_INFO2)) & 0x0001fe00 ) >> 9)
+#define GET_EDCA4_FFO_CNT (((REG32(ADR_TX_ID_ALL_INFO2)) & 0x001e0000 ) >> 17)
+#define GET_TX_PAGE_USE3 (((REG32(ADR_TX_ID_ALL_INFO_A)) & 0x000001ff ) >> 0)
+#define GET_TX_ID_USE3 (((REG32(ADR_TX_ID_ALL_INFO_A)) & 0x0001fe00 ) >> 9)
+#define GET_EDCA1_FFO_CNT2 (((REG32(ADR_TX_ID_ALL_INFO_A)) & 0x03e00000 ) >> 21)
+#define GET_EDCA4_FFO_CNT2 (((REG32(ADR_TX_ID_ALL_INFO_A)) & 0x3c000000 ) >> 26)
+#define GET_TX_PAGE_USE4 (((REG32(ADR_TX_ID_ALL_INFO_B)) & 0x000001ff ) >> 0)
+#define GET_TX_ID_USE4 (((REG32(ADR_TX_ID_ALL_INFO_B)) & 0x0001fe00 ) >> 9)
+#define GET_EDCA2_FFO_CNT2 (((REG32(ADR_TX_ID_ALL_INFO_B)) & 0x003e0000 ) >> 17)
+#define GET_EDCA3_FFO_CNT2 (((REG32(ADR_TX_ID_ALL_INFO_B)) & 0x07c00000 ) >> 22)
+#define GET_TX_ID_IFO_LEN (((REG32(ADR_TX_ID_REMAIN_STATUS2)) & 0x000001ff ) >> 0)
+#define GET_RX_ID_IFO_LEN (((REG32(ADR_TX_ID_REMAIN_STATUS2)) & 0x01ff0000 ) >> 16)
+#define GET_MAX_ALL_ALC_ID_CNT (((REG32(ADR_ALC_ID_INFO)) & 0x000000ff ) >> 0)
+#define GET_MAX_TX_ALC_ID_CNT (((REG32(ADR_ALC_ID_INFO)) & 0x0000ff00 ) >> 8)
+#define GET_MAX_RX_ALC_ID_CNT (((REG32(ADR_ALC_ID_INFO)) & 0x00ff0000 ) >> 16)
+#define GET_MAX_ALL_ID_ALC_LEN (((REG32(ADR_ALC_ID_INF1)) & 0x000001ff ) >> 0)
+#define GET_MAX_TX_ID_ALC_LEN (((REG32(ADR_ALC_ID_INF1)) & 0x0003fe00 ) >> 9)
+#define GET_MAX_RX_ID_ALC_LEN (((REG32(ADR_ALC_ID_INF1)) & 0x07fc0000 ) >> 18)
+#define GET_RG_PMDLBK (((REG32(ADR_PHY_EN_0)) & 0x00000001 ) >> 0)
+#define GET_RG_RDYACK_SEL (((REG32(ADR_PHY_EN_0)) & 0x00000006 ) >> 1)
+#define GET_RG_ADEDGE_SEL (((REG32(ADR_PHY_EN_0)) & 0x00000008 ) >> 3)
+#define GET_RG_SIGN_SWAP (((REG32(ADR_PHY_EN_0)) & 0x00000010 ) >> 4)
+#define GET_RG_IQ_SWAP (((REG32(ADR_PHY_EN_0)) & 0x00000020 ) >> 5)
+#define GET_RG_Q_INV (((REG32(ADR_PHY_EN_0)) & 0x00000040 ) >> 6)
+#define GET_RG_I_INV (((REG32(ADR_PHY_EN_0)) & 0x00000080 ) >> 7)
+#define GET_RG_BYPASS_ACI (((REG32(ADR_PHY_EN_0)) & 0x00000100 ) >> 8)
+#define GET_RG_LBK_ANA_PATH (((REG32(ADR_PHY_EN_0)) & 0x00000200 ) >> 9)
+#define GET_RG_SPECTRUM_LEAKY_FACTOR (((REG32(ADR_PHY_EN_0)) & 0x00000c00 ) >> 10)
+#define GET_RG_SPECTRUM_BW (((REG32(ADR_PHY_EN_0)) & 0x00003000 ) >> 12)
+#define GET_RG_SPECTRUM_FREQ_MANUAL (((REG32(ADR_PHY_EN_0)) & 0x00004000 ) >> 14)
+#define GET_RG_SPECTRUM_EN (((REG32(ADR_PHY_EN_0)) & 0x00008000 ) >> 15)
+#define GET_RG_TXPWRLVL_SET (((REG32(ADR_PHY_EN_0)) & 0x00ff0000 ) >> 16)
+#define GET_RG_TXPWRLVL_SEL (((REG32(ADR_PHY_EN_0)) & 0x01000000 ) >> 24)
+#define GET_RG_RF_BB_CLK_SEL (((REG32(ADR_PHY_EN_0)) & 0x80000000 ) >> 31)
+#define GET_RG_PHY_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000001 ) >> 0)
+#define GET_RG_PHYRX_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000002 ) >> 1)
+#define GET_RG_PHYTX_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000004 ) >> 2)
+#define GET_RG_PHY11GN_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000008 ) >> 3)
+#define GET_RG_PHY11B_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000010 ) >> 4)
+#define GET_RG_PHYRXFIFO_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000020 ) >> 5)
+#define GET_RG_PHYTXFIFO_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000040 ) >> 6)
+#define GET_RG_PHY11BGN_MD_EN (((REG32(ADR_PHY_EN_1)) & 0x00000100 ) >> 8)
+#define GET_RG_FORCE_11GN_EN (((REG32(ADR_PHY_EN_1)) & 0x00001000 ) >> 12)
+#define GET_RG_FORCE_11B_EN (((REG32(ADR_PHY_EN_1)) & 0x00002000 ) >> 13)
+#define GET_RG_FFT_MEM_CLK_EN_RX (((REG32(ADR_PHY_EN_1)) & 0x00004000 ) >> 14)
+#define GET_RG_FFT_MEM_CLK_EN_TX (((REG32(ADR_PHY_EN_1)) & 0x00008000 ) >> 15)
+#define GET_RG_PHY_IQ_TRIG_SEL (((REG32(ADR_PHY_EN_1)) & 0x000f0000 ) >> 16)
+#define GET_RG_SPECTRUM_FREQ (((REG32(ADR_PHY_EN_1)) & 0x3ff00000 ) >> 20)
+#define GET_SVN_VERSION (((REG32(ADR_SVN_VERSION_REG)) & 0xffffffff ) >> 0)
+#define GET_RG_LENGTH (((REG32(ADR_PHY_PKT_GEN_0)) & 0x0000ffff ) >> 0)
+#define GET_RG_PKT_MODE (((REG32(ADR_PHY_PKT_GEN_0)) & 0x00070000 ) >> 16)
+#define GET_RG_CH_BW (((REG32(ADR_PHY_PKT_GEN_0)) & 0x00380000 ) >> 19)
+#define GET_RG_PRM (((REG32(ADR_PHY_PKT_GEN_0)) & 0x00400000 ) >> 22)
+#define GET_RG_SHORTGI (((REG32(ADR_PHY_PKT_GEN_0)) & 0x00800000 ) >> 23)
+#define GET_RG_RATE (((REG32(ADR_PHY_PKT_GEN_0)) & 0x7f000000 ) >> 24)
+#define GET_RG_L_LENGTH (((REG32(ADR_PHY_PKT_GEN_1)) & 0x00000fff ) >> 0)
+#define GET_RG_L_RATE (((REG32(ADR_PHY_PKT_GEN_1)) & 0x00007000 ) >> 12)
+#define GET_RG_SERVICE (((REG32(ADR_PHY_PKT_GEN_1)) & 0xffff0000 ) >> 16)
+#define GET_RG_SMOOTHING (((REG32(ADR_PHY_PKT_GEN_2)) & 0x00000001 ) >> 0)
+#define GET_RG_NO_SOUND (((REG32(ADR_PHY_PKT_GEN_2)) & 0x00000002 ) >> 1)
+#define GET_RG_AGGREGATE (((REG32(ADR_PHY_PKT_GEN_2)) & 0x00000004 ) >> 2)
+#define GET_RG_STBC (((REG32(ADR_PHY_PKT_GEN_2)) & 0x00000018 ) >> 3)
+#define GET_RG_FEC (((REG32(ADR_PHY_PKT_GEN_2)) & 0x00000020 ) >> 5)
+#define GET_RG_N_ESS (((REG32(ADR_PHY_PKT_GEN_2)) & 0x000000c0 ) >> 6)
+#define GET_RG_TXPWRLVL (((REG32(ADR_PHY_PKT_GEN_2)) & 0x0000ff00 ) >> 8)
+#define GET_RG_TX_START (((REG32(ADR_PHY_PKT_GEN_3)) & 0x00000001 ) >> 0)
+#define GET_RG_IFS_TIME (((REG32(ADR_PHY_PKT_GEN_3)) & 0x000000fc ) >> 2)
+#define GET_RG_CONTINUOUS_DATA (((REG32(ADR_PHY_PKT_GEN_3)) & 0x00000100 ) >> 8)
+#define GET_RG_DATA_SEL (((REG32(ADR_PHY_PKT_GEN_3)) & 0x00000600 ) >> 9)
+#define GET_RG_TX_D (((REG32(ADR_PHY_PKT_GEN_3)) & 0x00ff0000 ) >> 16)
+#define GET_RG_TX_CNT_TARGET (((REG32(ADR_PHY_PKT_GEN_4)) & 0xffffffff ) >> 0)
+#define GET_RG_FFT_IFFT_MODE (((REG32(ADR_PHY_REG_00)) & 0x000000c0 ) >> 6)
+#define GET_RG_DAC_DBG_MODE (((REG32(ADR_PHY_REG_00)) & 0x00000100 ) >> 8)
+#define GET_RG_DAC_SGN_SWAP (((REG32(ADR_PHY_REG_00)) & 0x00000200 ) >> 9)
+#define GET_RG_TXD_SEL (((REG32(ADR_PHY_REG_00)) & 0x00000c00 ) >> 10)
+#define GET_RG_UP8X (((REG32(ADR_PHY_REG_00)) & 0x00ff0000 ) >> 16)
+#define GET_RG_IQ_DC_BYP (((REG32(ADR_PHY_REG_00)) & 0x01000000 ) >> 24)
+#define GET_RG_IQ_DC_LEAKY_FACTOR (((REG32(ADR_PHY_REG_00)) & 0x30000000 ) >> 28)
+#define GET_RG_DAC_DCEN (((REG32(ADR_PHY_REG_01)) & 0x00000001 ) >> 0)
+#define GET_RG_DAC_DCQ (((REG32(ADR_PHY_REG_01)) & 0x00003ff0 ) >> 4)
+#define GET_RG_DAC_DCI (((REG32(ADR_PHY_REG_01)) & 0x03ff0000 ) >> 16)
+#define GET_RG_PGA_REFDB_SAT (((REG32(ADR_PHY_REG_02_AGC)) & 0x0000007f ) >> 0)
+#define GET_RG_PGA_REFDB_TOP (((REG32(ADR_PHY_REG_02_AGC)) & 0x00007f00 ) >> 8)
+#define GET_RG_PGA_REF_UND (((REG32(ADR_PHY_REG_02_AGC)) & 0x03ff0000 ) >> 16)
+#define GET_RG_RF_REF_SAT (((REG32(ADR_PHY_REG_02_AGC)) & 0xf0000000 ) >> 28)
+#define GET_RG_PGAGC_SET (((REG32(ADR_PHY_REG_03_AGC)) & 0x0000000f ) >> 0)
+#define GET_RG_PGAGC_OW (((REG32(ADR_PHY_REG_03_AGC)) & 0x00000010 ) >> 4)
+#define GET_RG_RFGC_SET (((REG32(ADR_PHY_REG_03_AGC)) & 0x00000060 ) >> 5)
+#define GET_RG_RFGC_OW (((REG32(ADR_PHY_REG_03_AGC)) & 0x00000080 ) >> 7)
+#define GET_RG_WAIT_T_RXAGC (((REG32(ADR_PHY_REG_03_AGC)) & 0x00003f00 ) >> 8)
+#define GET_RG_RXAGC_SET (((REG32(ADR_PHY_REG_03_AGC)) & 0x00004000 ) >> 14)
+#define GET_RG_RXAGC_OW (((REG32(ADR_PHY_REG_03_AGC)) & 0x00008000 ) >> 15)
+#define GET_RG_WAIT_T_FINAL (((REG32(ADR_PHY_REG_03_AGC)) & 0x003f0000 ) >> 16)
+#define GET_RG_WAIT_T (((REG32(ADR_PHY_REG_03_AGC)) & 0x3f000000 ) >> 24)
+#define GET_RG_ULG_PGA_SAT_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x0000000f ) >> 0)
+#define GET_RG_LG_PGA_UND_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x000000f0 ) >> 4)
+#define GET_RG_LG_PGA_SAT_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x00000f00 ) >> 8)
+#define GET_RG_LG_RF_SAT_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x0000f000 ) >> 12)
+#define GET_RG_MG_RF_SAT_PGANOREF_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x000f0000 ) >> 16)
+#define GET_RG_HG_PGA_SAT2_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x00f00000 ) >> 20)
+#define GET_RG_HG_PGA_SAT1_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0x0f000000 ) >> 24)
+#define GET_RG_HG_RF_SAT_PGA_GAIN (((REG32(ADR_PHY_REG_04_AGC)) & 0xf0000000 ) >> 28)
+#define GET_RG_MG_PGA_JB_TH (((REG32(ADR_PHY_REG_05_AGC)) & 0x0000000f ) >> 0)
+#define GET_RG_MA_PGA_LOW_TH_CNT_LMT (((REG32(ADR_PHY_REG_05_AGC)) & 0x001f0000 ) >> 16)
+#define GET_RG_WR_RFGC_INIT_SET (((REG32(ADR_PHY_REG_05_AGC)) & 0x00600000 ) >> 21)
+#define GET_RG_WR_RFGC_INIT_EN (((REG32(ADR_PHY_REG_05_AGC)) & 0x00800000 ) >> 23)
+#define GET_RG_MA_PGA_HIGH_TH_CNT_LMT (((REG32(ADR_PHY_REG_05_AGC)) & 0x1f000000 ) >> 24)
+#define GET_RG_AGC_THRESHOLD (((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0x00003fff ) >> 0)
+#define GET_RG_ACI_POINT_CNT_LMT_11B (((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0x007f0000 ) >> 16)
+#define GET_RG_ACI_DAGC_LEAKY_FACTOR_11B (((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0x03000000 ) >> 24)
+#define GET_RG_WR_ACI_GAIN_INI_SEL_11B (((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0x000000ff ) >> 0)
+#define GET_RG_WR_ACI_GAIN_SEL_11B (((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0x0000ff00 ) >> 8)
+#define GET_RG_ACI_DAGC_SET_VALUE_11B (((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0x007f0000 ) >> 16)
+#define GET_RG_WR_ACI_GAIN_OW_11B (((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0x80000000 ) >> 31)
+#define GET_RG_ACI_POINT_CNT_LMT_11GN (((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0x000000ff ) >> 0)
+#define GET_RG_ACI_DAGC_LEAKY_FACTOR_11GN (((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0x00000300 ) >> 8)
+#define GET_RG_ACI_DAGC_DONE_CNT_LMT_11GN (((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0xff000000 ) >> 24)
+#define GET_RG_ACI_DAGC_SET_VALUE_11GN (((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0x0000007f ) >> 0)
+#define GET_RG_ACI_GAIN_INI_VAL_11GN (((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0x0000ff00 ) >> 8)
+#define GET_RG_ACI_GAIN_OW_VAL_11GN (((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0x00ff0000 ) >> 16)
+#define GET_RG_ACI_GAIN_OW_11GN (((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0x80000000 ) >> 31)
+#define GET_RO_CCA_PWR_MA_11GN (((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0x0000007f ) >> 0)
+#define GET_RO_ED_STATE (((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0x00008000 ) >> 15)
+#define GET_RO_CCA_PWR_MA_11B (((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0x007f0000 ) >> 16)
+#define GET_RO_PGA_PWR_FF1 (((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0x00003fff ) >> 0)
+#define GET_RO_RF_PWR_FF1 (((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0x000f0000 ) >> 16)
+#define GET_RO_PGAGC_FF1 (((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0x0f000000 ) >> 24)
+#define GET_RO_RFGC_FF1 (((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0x30000000 ) >> 28)
+#define GET_RO_PGA_PWR_FF2 (((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0x00003fff ) >> 0)
+#define GET_RO_RF_PWR_FF2 (((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0x000f0000 ) >> 16)
+#define GET_RO_PGAGC_FF2 (((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0x0f000000 ) >> 24)
+#define GET_RO_RFGC_FF2 (((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0x30000000 ) >> 28)
+#define GET_RO_PGA_PWR_FF3 (((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0x00003fff ) >> 0)
+#define GET_RO_RF_PWR_FF3 (((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0x000f0000 ) >> 16)
+#define GET_RO_PGAGC_FF3 (((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0x0f000000 ) >> 24)
+#define GET_RO_RFGC_FF3 (((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0x30000000 ) >> 28)
+#define GET_RG_TX_DES_RATE (((REG32(ADR_PHY_REG_10_TX_DES)) & 0x0000001f ) >> 0)
+#define GET_RG_TX_DES_MODE (((REG32(ADR_PHY_REG_10_TX_DES)) & 0x00001f00 ) >> 8)
+#define GET_RG_TX_DES_LEN_LO (((REG32(ADR_PHY_REG_10_TX_DES)) & 0x001f0000 ) >> 16)
+#define GET_RG_TX_DES_LEN_UP (((REG32(ADR_PHY_REG_10_TX_DES)) & 0x1f000000 ) >> 24)
+#define GET_RG_TX_DES_SRVC_UP (((REG32(ADR_PHY_REG_11_TX_DES)) & 0x0000001f ) >> 0)
+#define GET_RG_TX_DES_L_LEN_LO (((REG32(ADR_PHY_REG_11_TX_DES)) & 0x00001f00 ) >> 8)
+#define GET_RG_TX_DES_L_LEN_UP (((REG32(ADR_PHY_REG_11_TX_DES)) & 0x001f0000 ) >> 16)
+#define GET_RG_TX_DES_TYPE (((REG32(ADR_PHY_REG_11_TX_DES)) & 0x1f000000 ) >> 24)
+#define GET_RG_TX_DES_L_LEN_UP_COMB (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x00000001 ) >> 0)
+#define GET_RG_TX_DES_TYPE_COMB (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x00000010 ) >> 4)
+#define GET_RG_TX_DES_RATE_COMB (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x00000100 ) >> 8)
+#define GET_RG_TX_DES_MODE_COMB (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x00001000 ) >> 12)
+#define GET_RG_TX_DES_PWRLVL (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x001f0000 ) >> 16)
+#define GET_RG_TX_DES_SRVC_LO (((REG32(ADR_PHY_REG_12_TX_DES)) & 0x1f000000 ) >> 24)
+#define GET_RG_RX_DES_RATE (((REG32(ADR_PHY_REG_13_RX_DES)) & 0x0000003f ) >> 0)
+#define GET_RG_RX_DES_MODE (((REG32(ADR_PHY_REG_13_RX_DES)) & 0x00003f00 ) >> 8)
+#define GET_RG_RX_DES_LEN_LO (((REG32(ADR_PHY_REG_13_RX_DES)) & 0x003f0000 ) >> 16)
+#define GET_RG_RX_DES_LEN_UP (((REG32(ADR_PHY_REG_13_RX_DES)) & 0x3f000000 ) >> 24)
+#define GET_RG_RX_DES_SRVC_UP (((REG32(ADR_PHY_REG_14_RX_DES)) & 0x0000003f ) >> 0)
+#define GET_RG_RX_DES_L_LEN_LO (((REG32(ADR_PHY_REG_14_RX_DES)) & 0x00003f00 ) >> 8)
+#define GET_RG_RX_DES_L_LEN_UP (((REG32(ADR_PHY_REG_14_RX_DES)) & 0x003f0000 ) >> 16)
+#define GET_RG_RX_DES_TYPE (((REG32(ADR_PHY_REG_14_RX_DES)) & 0x3f000000 ) >> 24)
+#define GET_RG_RX_DES_L_LEN_UP_COMB (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x00000001 ) >> 0)
+#define GET_RG_RX_DES_TYPE_COMB (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x00000010 ) >> 4)
+#define GET_RG_RX_DES_RATE_COMB (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x00000100 ) >> 8)
+#define GET_RG_RX_DES_MODE_COMB (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x00001000 ) >> 12)
+#define GET_RG_RX_DES_SNR (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x000f0000 ) >> 16)
+#define GET_RG_RX_DES_RCPI (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x00f00000 ) >> 20)
+#define GET_RG_RX_DES_SRVC_LO (((REG32(ADR_PHY_REG_15_RX_DES)) & 0x3f000000 ) >> 24)
+#define GET_RO_TX_DES_EXCP_RATE_CNT (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x000000ff ) >> 0)
+#define GET_RO_TX_DES_EXCP_CH_BW_CNT (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x0000ff00 ) >> 8)
+#define GET_RO_TX_DES_EXCP_MODE_CNT (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x00ff0000 ) >> 16)
+#define GET_RG_TX_DES_EXCP_RATE_DEFAULT (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x07000000 ) >> 24)
+#define GET_RG_TX_DES_EXCP_MODE_DEFAULT (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x70000000 ) >> 28)
+#define GET_RG_TX_DES_EXCP_CLR (((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x80000000 ) >> 31)
+#define GET_RG_TX_DES_ACK_WIDTH (((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0x00000001 ) >> 0)
+#define GET_RG_TX_DES_ACK_PRD (((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0x0000000e ) >> 1)
+#define GET_RG_RX_DES_SNR_GN (((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0x003f0000 ) >> 16)
+#define GET_RG_RX_DES_RCPI_GN (((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0x3f000000 ) >> 24)
+#define GET_RG_TST_TBUS_SEL (((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x0000000f ) >> 0)
+#define GET_RG_RSSI_OFFSET (((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x00ff0000 ) >> 16)
+#define GET_RG_RSSI_INV (((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x01000000 ) >> 24)
+#define GET_RG_TST_ADC_ON (((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x40000000 ) >> 30)
+#define GET_RG_TST_EXT_GAIN (((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x80000000 ) >> 31)
+#define GET_RG_DAC_Q_SET (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x000003ff ) >> 0)
+#define GET_RG_DAC_I_SET (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x003ff000 ) >> 12)
+#define GET_RG_DAC_EN_MAN (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x10000000 ) >> 28)
+#define GET_RG_IQC_FFT_EN (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x20000000 ) >> 29)
+#define GET_RG_DAC_MAN_Q_EN (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x40000000 ) >> 30)
+#define GET_RG_DAC_MAN_I_EN (((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x80000000 ) >> 31)
+#define GET_RO_MRX_EN_CNT (((REG32(ADR_PHY_REG_20_MRX_CNT)) & 0x0000ffff ) >> 0)
+#define GET_RG_MRX_EN_CNT_RST_N (((REG32(ADR_PHY_REG_20_MRX_CNT)) & 0x80000000 ) >> 31)
+#define GET_RG_PA_RISE_TIME (((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0x000000ff ) >> 0)
+#define GET_RG_RFTX_RISE_TIME (((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0x0000ff00 ) >> 8)
+#define GET_RG_DAC_RISE_TIME (((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0x00ff0000 ) >> 16)
+#define GET_RG_SW_RISE_TIME (((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0xff000000 ) >> 24)
+#define GET_RG_PA_FALL_TIME (((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0x000000ff ) >> 0)
+#define GET_RG_RFTX_FALL_TIME (((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0x0000ff00 ) >> 8)
+#define GET_RG_DAC_FALL_TIME (((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0x00ff0000 ) >> 16)
+#define GET_RG_SW_FALL_TIME (((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0xff000000 ) >> 24)
+#define GET_RG_ANT_SW_0 (((REG32(ADR_PHY_REG_23_ANT)) & 0x00000007 ) >> 0)
+#define GET_RG_ANT_SW_1 (((REG32(ADR_PHY_REG_23_ANT)) & 0x00000038 ) >> 3)
+#define GET_RG_MTX_LEN_LOWER_TH_0 (((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0x00001fff ) >> 0)
+#define GET_RG_MTX_LEN_UPPER_TH_0 (((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0x1fff0000 ) >> 16)
+#define GET_RG_MTX_LEN_CNT_EN_0 (((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0x80000000 ) >> 31)
+#define GET_RG_MTX_LEN_LOWER_TH_1 (((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0x00001fff ) >> 0)
+#define GET_RG_MTX_LEN_UPPER_TH_1 (((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0x1fff0000 ) >> 16)
+#define GET_RG_MTX_LEN_CNT_EN_1 (((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0x80000000 ) >> 31)
+#define GET_RG_MRX_LEN_LOWER_TH_0 (((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0x00001fff ) >> 0)
+#define GET_RG_MRX_LEN_UPPER_TH_0 (((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0x1fff0000 ) >> 16)
+#define GET_RG_MRX_LEN_CNT_EN_0 (((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0x80000000 ) >> 31)
+#define GET_RG_MRX_LEN_LOWER_TH_1 (((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0x00001fff ) >> 0)
+#define GET_RG_MRX_LEN_UPPER_TH_1 (((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0x1fff0000 ) >> 16)
+#define GET_RG_MRX_LEN_CNT_EN_1 (((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0x80000000 ) >> 31)
+#define GET_RO_MTX_LEN_CNT_1 (((REG32(ADR_PHY_READ_REG_04)) & 0x0000ffff ) >> 0)
+#define GET_RO_MTX_LEN_CNT_0 (((REG32(ADR_PHY_READ_REG_04)) & 0xffff0000 ) >> 16)
+#define GET_RO_MRX_LEN_CNT_1 (((REG32(ADR_PHY_READ_REG_05)) & 0x0000ffff ) >> 0)
+#define GET_RO_MRX_LEN_CNT_0 (((REG32(ADR_PHY_READ_REG_05)) & 0xffff0000 ) >> 16)
+#define GET_RG_MODE_REG_IN_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x0000ffff ) >> 0)
+#define GET_RG_PARALLEL_DR_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x00100000 ) >> 20)
+#define GET_RG_MBRUN_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x01000000 ) >> 24)
+#define GET_RG_SHIFT_DR_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x10000000 ) >> 28)
+#define GET_RG_MODE_REG_SI_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x20000000 ) >> 29)
+#define GET_RG_SIMULATION_MODE_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x40000000 ) >> 30)
+#define GET_RG_DBIST_MODE_16 (((REG32(ADR_PHY_REG_28_BIST)) & 0x80000000 ) >> 31)
+#define GET_RO_MODE_REG_OUT_16 (((REG32(ADR_PHY_READ_REG_06_BIST)) & 0x0000ffff ) >> 0)
+#define GET_RO_MODE_REG_SO_16 (((REG32(ADR_PHY_READ_REG_06_BIST)) & 0x01000000 ) >> 24)
+#define GET_RO_MONITOR_BUS_16 (((REG32(ADR_PHY_READ_REG_07_BIST)) & 0x0007ffff ) >> 0)
+#define GET_RG_MRX_TYPE_1 (((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0x000000ff ) >> 0)
+#define GET_RG_MRX_TYPE_0 (((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0x0000ff00 ) >> 8)
+#define GET_RG_MTX_TYPE_1 (((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0x00ff0000 ) >> 16)
+#define GET_RG_MTX_TYPE_0 (((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0xff000000 ) >> 24)
+#define GET_RO_MTX_TYPE_CNT_1 (((REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) & 0x0000ffff ) >> 0)
+#define GET_RO_MTX_TYPE_CNT_0 (((REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) & 0xffff0000 ) >> 16)
+#define GET_RO_MRX_TYPE_CNT_1 (((REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) & 0x0000ffff ) >> 0)
+#define GET_RO_MRX_TYPE_CNT_0 (((REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) & 0xffff0000 ) >> 16)
+#define GET_RG_HB_COEF0 (((REG32(ADR_PHY_REG_30_TX_UP_FIL)) & 0x00000fff ) >> 0)
+#define GET_RG_HB_COEF1 (((REG32(ADR_PHY_REG_30_TX_UP_FIL)) & 0x0fff0000 ) >> 16)
+#define GET_RG_HB_COEF2 (((REG32(ADR_PHY_REG_31_TX_UP_FIL)) & 0x00000fff ) >> 0)
+#define GET_RG_HB_COEF3 (((REG32(ADR_PHY_REG_31_TX_UP_FIL)) & 0x0fff0000 ) >> 16)
+#define GET_RG_HB_COEF4 (((REG32(ADR_PHY_REG_32_TX_UP_FIL)) & 0x00000fff ) >> 0)
+#define GET_RO_TBUS_O (((REG32(ADR_PHY_READ_TBUS)) & 0x000fffff ) >> 0)
+#define GET_RG_LPF4_00 (((REG32(ADR_TX_11B_FIL_COEF_00)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_01 (((REG32(ADR_TX_11B_FIL_COEF_01)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_02 (((REG32(ADR_TX_11B_FIL_COEF_02)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_03 (((REG32(ADR_TX_11B_FIL_COEF_03)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_04 (((REG32(ADR_TX_11B_FIL_COEF_04)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_05 (((REG32(ADR_TX_11B_FIL_COEF_05)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_06 (((REG32(ADR_TX_11B_FIL_COEF_06)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_07 (((REG32(ADR_TX_11B_FIL_COEF_07)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_08 (((REG32(ADR_TX_11B_FIL_COEF_08)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_09 (((REG32(ADR_TX_11B_FIL_COEF_09)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_10 (((REG32(ADR_TX_11B_FIL_COEF_10)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_11 (((REG32(ADR_TX_11B_FIL_COEF_11)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_12 (((REG32(ADR_TX_11B_FIL_COEF_12)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_13 (((REG32(ADR_TX_11B_FIL_COEF_13)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_14 (((REG32(ADR_TX_11B_FIL_COEF_14)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_15 (((REG32(ADR_TX_11B_FIL_COEF_15)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_16 (((REG32(ADR_TX_11B_FIL_COEF_16)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_17 (((REG32(ADR_TX_11B_FIL_COEF_17)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_18 (((REG32(ADR_TX_11B_FIL_COEF_18)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_19 (((REG32(ADR_TX_11B_FIL_COEF_19)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_20 (((REG32(ADR_TX_11B_FIL_COEF_20)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_21 (((REG32(ADR_TX_11B_FIL_COEF_21)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_22 (((REG32(ADR_TX_11B_FIL_COEF_22)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_23 (((REG32(ADR_TX_11B_FIL_COEF_23)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_24 (((REG32(ADR_TX_11B_FIL_COEF_24)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_25 (((REG32(ADR_TX_11B_FIL_COEF_25)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_26 (((REG32(ADR_TX_11B_FIL_COEF_26)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_27 (((REG32(ADR_TX_11B_FIL_COEF_27)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_28 (((REG32(ADR_TX_11B_FIL_COEF_28)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_29 (((REG32(ADR_TX_11B_FIL_COEF_29)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_30 (((REG32(ADR_TX_11B_FIL_COEF_30)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_31 (((REG32(ADR_TX_11B_FIL_COEF_31)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_32 (((REG32(ADR_TX_11B_FIL_COEF_32)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_33 (((REG32(ADR_TX_11B_FIL_COEF_33)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_34 (((REG32(ADR_TX_11B_FIL_COEF_34)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_35 (((REG32(ADR_TX_11B_FIL_COEF_35)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_36 (((REG32(ADR_TX_11B_FIL_COEF_36)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_37 (((REG32(ADR_TX_11B_FIL_COEF_37)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_38 (((REG32(ADR_TX_11B_FIL_COEF_38)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_39 (((REG32(ADR_TX_11B_FIL_COEF_39)) & 0x00001fff ) >> 0)
+#define GET_RG_LPF4_40 (((REG32(ADR_TX_11B_FIL_COEF_40)) & 0x00001fff ) >> 0)
+#define GET_RG_BP_SMB (((REG32(ADR_TX_11B_PLCP)) & 0x00002000 ) >> 13)
+#define GET_RG_EN_SRVC (((REG32(ADR_TX_11B_PLCP)) & 0x00004000 ) >> 14)
+#define GET_RG_DES_SPD (((REG32(ADR_TX_11B_PLCP)) & 0x00030000 ) >> 16)
+#define GET_RG_BB_11B_RISE_TIME (((REG32(ADR_TX_11B_RAMP)) & 0x000000ff ) >> 0)
+#define GET_RG_BB_11B_FALL_TIME (((REG32(ADR_TX_11B_RAMP)) & 0x0000ff00 ) >> 8)
+#define GET_RG_WR_TX_EN_CNT_RST_N (((REG32(ADR_TX_11B_EN_CNT_RST_N)) & 0x00000001 ) >> 0)
+#define GET_RO_TX_EN_CNT (((REG32(ADR_TX_11B_EN_CNT)) & 0x0000ffff ) >> 0)
+#define GET_RO_TX_CNT (((REG32(ADR_TX_11B_PKT_GEN_CNT)) & 0xffffffff ) >> 0)
+#define GET_RG_POS_DES_11B_L_EXT (((REG32(ADR_RX_11B_DES_DLY)) & 0x0000000f ) >> 0)
+#define GET_RG_PRE_DES_11B_DLY (((REG32(ADR_RX_11B_DES_DLY)) & 0x000000f0 ) >> 4)
+#define GET_RG_CNT_CCA_LMT (((REG32(ADR_RX_11B_CCA_0)) & 0x000f0000 ) >> 16)
+#define GET_RG_BYPASS_DESCRAMBLER (((REG32(ADR_RX_11B_CCA_0)) & 0x20000000 ) >> 29)
+#define GET_RG_BYPASS_AGC (((REG32(ADR_RX_11B_CCA_0)) & 0x80000000 ) >> 31)
+#define GET_RG_CCA_BIT_CNT_LMT_RX (((REG32(ADR_RX_11B_CCA_1)) & 0x000000f0 ) >> 4)
+#define GET_RG_CCA_SCALE_BF (((REG32(ADR_RX_11B_CCA_1)) & 0x007f0000 ) >> 16)
+#define GET_RG_PEAK_IDX_CNT_SEL (((REG32(ADR_RX_11B_CCA_1)) & 0x30000000 ) >> 28)
+#define GET_RG_TR_KI_T2 (((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0x00000007 ) >> 0)
+#define GET_RG_TR_KP_T2 (((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0x00000070 ) >> 4)
+#define GET_RG_TR_KI_T1 (((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0x00000700 ) >> 8)
+#define GET_RG_TR_KP_T1 (((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0x00007000 ) >> 12)
+#define GET_RG_CR_KI_T1 (((REG32(ADR_RX_11B_TR_KP_KI_1)) & 0x00070000 ) >> 16)
+#define GET_RG_CR_KP_T1 (((REG32(ADR_RX_11B_TR_KP_KI_1)) & 0x00700000 ) >> 20)
+#define GET_RG_CHIP_CNT_SLICER (((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0x0000001f ) >> 0)
+#define GET_RG_CE_T4_CNT_LMT (((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0x0000ff00 ) >> 8)
+#define GET_RG_CE_T3_CNT_LMT (((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0x00ff0000 ) >> 16)
+#define GET_RG_CE_T2_CNT_LMT (((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0xff000000 ) >> 24)
+#define GET_RG_CE_MU_T1 (((REG32(ADR_RX_11B_CE_MU_0)) & 0x00000007 ) >> 0)
+#define GET_RG_CE_DLY_SEL (((REG32(ADR_RX_11B_CE_MU_0)) & 0x003f0000 ) >> 16)
+#define GET_RG_CE_MU_T8 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00000007 ) >> 0)
+#define GET_RG_CE_MU_T7 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00000070 ) >> 4)
+#define GET_RG_CE_MU_T6 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00000700 ) >> 8)
+#define GET_RG_CE_MU_T5 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00007000 ) >> 12)
+#define GET_RG_CE_MU_T4 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00070000 ) >> 16)
+#define GET_RG_CE_MU_T3 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x00700000 ) >> 20)
+#define GET_RG_CE_MU_T2 (((REG32(ADR_RX_11B_CE_MU_1)) & 0x07000000 ) >> 24)
+#define GET_RG_EQ_MU_FB_T2 (((REG32(ADR_RX_11B_EQ_MU_0)) & 0x0000000f ) >> 0)
+#define GET_RG_EQ_MU_FF_T2 (((REG32(ADR_RX_11B_EQ_MU_0)) & 0x000000f0 ) >> 4)
+#define GET_RG_EQ_MU_FB_T1 (((REG32(ADR_RX_11B_EQ_MU_0)) & 0x000f0000 ) >> 16)
+#define GET_RG_EQ_MU_FF_T1 (((REG32(ADR_RX_11B_EQ_MU_0)) & 0x00f00000 ) >> 20)
+#define GET_RG_EQ_MU_FB_T4 (((REG32(ADR_RX_11B_EQ_MU_1)) & 0x0000000f ) >> 0)
+#define GET_RG_EQ_MU_FF_T4 (((REG32(ADR_RX_11B_EQ_MU_1)) & 0x000000f0 ) >> 4)
+#define GET_RG_EQ_MU_FB_T3 (((REG32(ADR_RX_11B_EQ_MU_1)) & 0x000f0000 ) >> 16)
+#define GET_RG_EQ_MU_FF_T3 (((REG32(ADR_RX_11B_EQ_MU_1)) & 0x00f00000 ) >> 20)
+#define GET_RG_EQ_KI_T2 (((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0x00000700 ) >> 8)
+#define GET_RG_EQ_KP_T2 (((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0x00007000 ) >> 12)
+#define GET_RG_EQ_KI_T1 (((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0x00070000 ) >> 16)
+#define GET_RG_EQ_KP_T1 (((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0x00700000 ) >> 20)
+#define GET_RG_TR_LPF_RATE (((REG32(ADR_RX_11B_LPF_RATE)) & 0x003fffff ) >> 0)
+#define GET_RG_CE_BIT_CNT_LMT (((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x0000007f ) >> 0)
+#define GET_RG_CE_CH_MAIN_SET (((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x00000080 ) >> 7)
+#define GET_RG_TC_BIT_CNT_LMT (((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x00007f00 ) >> 8)
+#define GET_RG_CR_BIT_CNT_LMT (((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x007f0000 ) >> 16)
+#define GET_RG_TR_BIT_CNT_LMT (((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x7f000000 ) >> 24)
+#define GET_RG_EQ_MAIN_TAP_MAN (((REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) & 0x00000001 ) >> 0)
+#define GET_RG_EQ_MAIN_TAP_COEF (((REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) & 0x07ff0000 ) >> 16)
+#define GET_RG_PWRON_DLY_TH_11B (((REG32(ADR_RX_11B_SEARCH_CNT_TH)) & 0x000000ff ) >> 0)
+#define GET_RG_SFD_BIT_CNT_LMT (((REG32(ADR_RX_11B_SEARCH_CNT_TH)) & 0x00ff0000 ) >> 16)
+#define GET_RG_CCA_PWR_TH_RX (((REG32(ADR_RX_11B_CCA_CONTROL)) & 0x00007fff ) >> 0)
+#define GET_RG_CCA_PWR_CNT_TH (((REG32(ADR_RX_11B_CCA_CONTROL)) & 0x001f0000 ) >> 16)
+#define GET_B_FREQ_OS (((REG32(ADR_RX_11B_FREQUENCY_OFFSET)) & 0x000007ff ) >> 0)
+#define GET_B_SNR (((REG32(ADR_RX_11B_SNR_RSSI)) & 0x0000007f ) >> 0)
+#define GET_B_RCPI (((REG32(ADR_RX_11B_SNR_RSSI)) & 0x007f0000 ) >> 16)
+#define GET_CRC_CNT (((REG32(ADR_RX_11B_SFD_CRC_CNT)) & 0x0000ffff ) >> 0)
+#define GET_SFD_CNT (((REG32(ADR_RX_11B_SFD_CRC_CNT)) & 0xffff0000 ) >> 16)
+#define GET_B_PACKET_ERR_CNT (((REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) & 0x0000ffff ) >> 0)
+#define GET_PACKET_ERR (((REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) & 0x00010000 ) >> 16)
+#define GET_B_PACKET_CNT (((REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) & 0x0000ffff ) >> 0)
+#define GET_B_CCA_CNT (((REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) & 0xffff0000 ) >> 16)
+#define GET_B_LENGTH_FIELD (((REG32(ADR_RX_11B_SFD_FILED_0)) & 0x0000ffff ) >> 0)
+#define GET_SFD_FIELD (((REG32(ADR_RX_11B_SFD_FILED_0)) & 0xffff0000 ) >> 16)
+#define GET_SIGNAL_FIELD (((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0x000000ff ) >> 0)
+#define GET_B_SERVICE_FIELD (((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0x0000ff00 ) >> 8)
+#define GET_CRC_CORRECT (((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0x00010000 ) >> 16)
+#define GET_DEBUG_SEL (((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0x0000000f ) >> 0)
+#define GET_RG_PACKET_STAT_EN_11B (((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0x00100000 ) >> 20)
+#define GET_RG_BIT_REVERSE (((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0x00200000 ) >> 21)
+#define GET_RX_PHY_11B_SOFT_RST_N (((REG32(ADR_RX_11B_SOFT_RST)) & 0x00000001 ) >> 0)
+#define GET_RG_CE_BYPASS_TAP (((REG32(ADR_RX_11B_SOFT_RST)) & 0x000000f0 ) >> 4)
+#define GET_RG_EQ_BYPASS_FBW_TAP (((REG32(ADR_RX_11B_SOFT_RST)) & 0x00000f00 ) >> 8)
+#define GET_RG_BB_11GN_RISE_TIME (((REG32(ADR_TX_11GN_RAMP)) & 0x000000ff ) >> 0)
+#define GET_RG_BB_11GN_FALL_TIME (((REG32(ADR_TX_11GN_RAMP)) & 0x0000ff00 ) >> 8)
+#define GET_RG_HTCARR52_FFT_SCALE (((REG32(ADR_TX_11GN_PLCP)) & 0x000003ff ) >> 0)
+#define GET_RG_HTCARR56_FFT_SCALE (((REG32(ADR_TX_11GN_PLCP)) & 0x003ff000 ) >> 12)
+#define GET_RG_PACKET_STAT_EN (((REG32(ADR_TX_11GN_PLCP)) & 0x00800000 ) >> 23)
+#define GET_RG_SMB_DEF (((REG32(ADR_TX_11GN_PLCP)) & 0x7f000000 ) >> 24)
+#define GET_RG_CONTINUOUS_DATA_11GN (((REG32(ADR_TX_11GN_PLCP)) & 0x80000000 ) >> 31)
+#define GET_RO_TX_CNT_R (((REG32(ADR_TX_11GN_PKT_GEN_CNT)) & 0xffffffff ) >> 0)
+#define GET_RO_PACKET_ERR_CNT (((REG32(ADR_TX_11GN_PLCP_CRC_ERR_CNT)) & 0x0000ffff ) >> 0)
+#define GET_RG_POS_DES_11GN_L_EXT (((REG32(ADR_RX_11GN_DES_DLY)) & 0x0000000f ) >> 0)
+#define GET_RG_PRE_DES_11GN_DLY (((REG32(ADR_RX_11GN_DES_DLY)) & 0x000000f0 ) >> 4)
+#define GET_RG_TR_LPF_KI_G_T1 (((REG32(ADR_RX_11GN_TR_0)) & 0x0000000f ) >> 0)
+#define GET_RG_TR_LPF_KP_G_T1 (((REG32(ADR_RX_11GN_TR_0)) & 0x000000f0 ) >> 4)
+#define GET_RG_TR_CNT_T1 (((REG32(ADR_RX_11GN_TR_0)) & 0x0000ff00 ) >> 8)
+#define GET_RG_TR_LPF_KI_G_T0 (((REG32(ADR_RX_11GN_TR_0)) & 0x000f0000 ) >> 16)
+#define GET_RG_TR_LPF_KP_G_T0 (((REG32(ADR_RX_11GN_TR_0)) & 0x00f00000 ) >> 20)
+#define GET_RG_TR_CNT_T0 (((REG32(ADR_RX_11GN_TR_0)) & 0xff000000 ) >> 24)
+#define GET_RG_TR_LPF_KI_G_T2 (((REG32(ADR_RX_11GN_TR_1)) & 0x0000000f ) >> 0)
+#define GET_RG_TR_LPF_KP_G_T2 (((REG32(ADR_RX_11GN_TR_1)) & 0x000000f0 ) >> 4)
+#define GET_RG_TR_CNT_T2 (((REG32(ADR_RX_11GN_TR_1)) & 0x0000ff00 ) >> 8)
+#define GET_RG_TR_LPF_KI_G (((REG32(ADR_RX_11GN_TR_2)) & 0x0000000f ) >> 0)
+#define GET_RG_TR_LPF_KP_G (((REG32(ADR_RX_11GN_TR_2)) & 0x000000f0 ) >> 4)
+#define GET_RG_TR_LPF_RATE_G (((REG32(ADR_RX_11GN_TR_2)) & 0x3fffff00 ) >> 8)
+#define GET_RG_CR_LPF_KI_G (((REG32(ADR_RX_11GN_CCA_0)) & 0x00000007 ) >> 0)
+#define GET_RG_SYM_BOUND_CNT (((REG32(ADR_RX_11GN_CCA_0)) & 0x00007f00 ) >> 8)
+#define GET_RG_XSCOR32_RATIO (((REG32(ADR_RX_11GN_CCA_0)) & 0x007f0000 ) >> 16)
+#define GET_RG_ATCOR64_CNT_LMT (((REG32(ADR_RX_11GN_CCA_0)) & 0x7f000000 ) >> 24)
+#define GET_RG_ATCOR16_CNT_LMT2 (((REG32(ADR_RX_11GN_CCA_1)) & 0x00007f00 ) >> 8)
+#define GET_RG_ATCOR16_CNT_LMT1 (((REG32(ADR_RX_11GN_CCA_1)) & 0x007f0000 ) >> 16)
+#define GET_RG_ATCOR16_RATIO_SB (((REG32(ADR_RX_11GN_CCA_1)) & 0x7f000000 ) >> 24)
+#define GET_RG_XSCOR64_CNT_LMT2 (((REG32(ADR_RX_11GN_CCA_2)) & 0x007f0000 ) >> 16)
+#define GET_RG_XSCOR64_CNT_LMT1 (((REG32(ADR_RX_11GN_CCA_2)) & 0x7f000000 ) >> 24)
+#define GET_RG_RX_FFT_SCALE (((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0x000003ff ) >> 0)
+#define GET_RG_VITERBI_AB_SWAP (((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0x00010000 ) >> 16)
+#define GET_RG_ATCOR16_CNT_TH (((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0x0f000000 ) >> 24)
+#define GET_RG_NORMSQUARE_LOW_SNR_7 (((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0x000000ff ) >> 0)
+#define GET_RG_NORMSQUARE_LOW_SNR_6 (((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0x0000ff00 ) >> 8)
+#define GET_RG_NORMSQUARE_LOW_SNR_5 (((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0x00ff0000 ) >> 16)
+#define GET_RG_NORMSQUARE_LOW_SNR_4 (((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0xff000000 ) >> 24)
+#define GET_RG_NORMSQUARE_LOW_SNR_8 (((REG32(ADR_RX_11GN_SOFT_DEMAP_1)) & 0xff000000 ) >> 24)
+#define GET_RG_NORMSQUARE_SNR_3 (((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0x000000ff ) >> 0)
+#define GET_RG_NORMSQUARE_SNR_2 (((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0x0000ff00 ) >> 8)
+#define GET_RG_NORMSQUARE_SNR_1 (((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0x00ff0000 ) >> 16)
+#define GET_RG_NORMSQUARE_SNR_0 (((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0xff000000 ) >> 24)
+#define GET_RG_NORMSQUARE_SNR_7 (((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0x000000ff ) >> 0)
+#define GET_RG_NORMSQUARE_SNR_6 (((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0x0000ff00 ) >> 8)
+#define GET_RG_NORMSQUARE_SNR_5 (((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0x00ff0000 ) >> 16)
+#define GET_RG_NORMSQUARE_SNR_4 (((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0xff000000 ) >> 24)
+#define GET_RG_NORMSQUARE_SNR_8 (((REG32(ADR_RX_11GN_SOFT_DEMAP_4)) & 0xff000000 ) >> 24)
+#define GET_RG_SNR_TH_64QAM (((REG32(ADR_RX_11GN_SOFT_DEMAP_5)) & 0x0000007f ) >> 0)
+#define GET_RG_SNR_TH_16QAM (((REG32(ADR_RX_11GN_SOFT_DEMAP_5)) & 0x00007f00 ) >> 8)
+#define GET_RG_ATCOR16_CNT_PLUS_LMT2 (((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0x0000007f ) >> 0)
+#define GET_RG_ATCOR16_CNT_PLUS_LMT1 (((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0x00007f00 ) >> 8)
+#define GET_RG_SYM_BOUND_METHOD (((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0x00030000 ) >> 16)
+#define GET_RG_PWRON_DLY_TH_11GN (((REG32(ADR_RX_11GN_SYM_BOUND_1)) & 0x000000ff ) >> 0)
+#define GET_RG_SB_START_CNT (((REG32(ADR_RX_11GN_SYM_BOUND_1)) & 0x00007f00 ) >> 8)
+#define GET_RG_POW16_CNT_TH (((REG32(ADR_RX_11GN_CCA_PWR)) & 0x000000f0 ) >> 4)
+#define GET_RG_POW16_SHORT_CNT_LMT (((REG32(ADR_RX_11GN_CCA_PWR)) & 0x00000700 ) >> 8)
+#define GET_RG_POW16_TH_L (((REG32(ADR_RX_11GN_CCA_PWR)) & 0x7f000000 ) >> 24)
+#define GET_RG_XSCOR16_SHORT_CNT_LMT (((REG32(ADR_RX_11GN_CCA_CNT)) & 0x00000007 ) >> 0)
+#define GET_RG_XSCOR16_RATIO (((REG32(ADR_RX_11GN_CCA_CNT)) & 0x00007f00 ) >> 8)
+#define GET_RG_ATCOR16_SHORT_CNT_LMT (((REG32(ADR_RX_11GN_CCA_CNT)) & 0x00070000 ) >> 16)
+#define GET_RG_ATCOR16_RATIO_CCD (((REG32(ADR_RX_11GN_CCA_CNT)) & 0x7f000000 ) >> 24)
+#define GET_RG_ATCOR64_ACC_LMT (((REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) & 0x0000007f ) >> 0)
+#define GET_RG_ATCOR16_SHORT_CNT_LMT2 (((REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) & 0x00070000 ) >> 16)
+#define GET_RG_VITERBI_TB_BITS (((REG32(ADR_RX_11GN_VTB_TB)) & 0xff000000 ) >> 24)
+#define GET_RG_CR_CNT_UPDATE (((REG32(ADR_RX_11GN_ERR_UPDATE)) & 0x000000ff ) >> 0)
+#define GET_RG_TR_CNT_UPDATE (((REG32(ADR_RX_11GN_ERR_UPDATE)) & 0x00ff0000 ) >> 16)
+#define GET_RG_BYPASS_CPE_MA (((REG32(ADR_RX_11GN_SHORT_GI)) & 0x00000010 ) >> 4)
+#define GET_RG_PILOT_BNDRY_SHIFT (((REG32(ADR_RX_11GN_SHORT_GI)) & 0x00000700 ) >> 8)
+#define GET_RG_EQ_SHORT_GI_SHIFT (((REG32(ADR_RX_11GN_SHORT_GI)) & 0x00007000 ) >> 12)
+#define GET_RG_FFT_WDW_SHORT_SHIFT (((REG32(ADR_RX_11GN_SHORT_GI)) & 0x00070000 ) >> 16)
+#define GET_RG_CHSMTH_COEF (((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0x00030000 ) >> 16)
+#define GET_RG_CHSMTH_EN (((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0x00040000 ) >> 18)
+#define GET_RG_CHEST_DD_FACTOR (((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0x07000000 ) >> 24)
+#define GET_RG_CH_UPDATE (((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0x80000000 ) >> 31)
+#define GET_RG_FMT_DET_MM_TH (((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0x000000ff ) >> 0)
+#define GET_RG_FMT_DET_GF_TH (((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0x0000ff00 ) >> 8)
+#define GET_RG_DO_NOT_CHECK_L_RATE (((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0x02000000 ) >> 25)
+#define GET_RG_FMT_DET_LENGTH_TH (((REG32(ADR_RX_11GN_PKT_FORMAT_1)) & 0x0000ffff ) >> 0)
+#define GET_RG_L_LENGTH_MAX (((REG32(ADR_RX_11GN_PKT_FORMAT_1)) & 0xffff0000 ) >> 16)
+#define GET_RG_TX_TIME_EXT (((REG32(ADR_RX_11GN_TX_TIME)) & 0x000000ff ) >> 0)
+#define GET_RG_MAC_DES_SPACE (((REG32(ADR_RX_11GN_TX_TIME)) & 0x00f00000 ) >> 20)
+#define GET_RG_TR_LPF_STBC_GF_KI_G (((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0x0000000f ) >> 0)
+#define GET_RG_TR_LPF_STBC_GF_KP_G (((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0x000000f0 ) >> 4)
+#define GET_RG_TR_LPF_STBC_MF_KI_G (((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0x00000f00 ) >> 8)
+#define GET_RG_TR_LPF_STBC_MF_KP_G (((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0x0000f000 ) >> 12)
+#define GET_RG_MODE_REG_IN_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x0001ffff ) >> 0)
+#define GET_RG_PARALLEL_DR_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x00100000 ) >> 20)
+#define GET_RG_MBRUN_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x01000000 ) >> 24)
+#define GET_RG_SHIFT_DR_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x10000000 ) >> 28)
+#define GET_RG_MODE_REG_SI_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x20000000 ) >> 29)
+#define GET_RG_SIMULATION_MODE_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x40000000 ) >> 30)
+#define GET_RG_DBIST_MODE_80 (((REG32(ADR_RX_11GN_BIST_0)) & 0x80000000 ) >> 31)
+#define GET_RG_MODE_REG_IN_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x0000ffff ) >> 0)
+#define GET_RG_PARALLEL_DR_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x00100000 ) >> 20)
+#define GET_RG_MBRUN_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x01000000 ) >> 24)
+#define GET_RG_SHIFT_DR_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x10000000 ) >> 28)
+#define GET_RG_MODE_REG_SI_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x20000000 ) >> 29)
+#define GET_RG_SIMULATION_MODE_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x40000000 ) >> 30)
+#define GET_RG_DBIST_MODE_64 (((REG32(ADR_RX_11GN_BIST_1)) & 0x80000000 ) >> 31)
+#define GET_RO_MODE_REG_OUT_80 (((REG32(ADR_RX_11GN_BIST_2)) & 0x0001ffff ) >> 0)
+#define GET_RO_MODE_REG_SO_80 (((REG32(ADR_RX_11GN_BIST_2)) & 0x01000000 ) >> 24)
+#define GET_RO_MONITOR_BUS_80 (((REG32(ADR_RX_11GN_BIST_3)) & 0x003fffff ) >> 0)
+#define GET_RO_MODE_REG_OUT_64 (((REG32(ADR_RX_11GN_BIST_4)) & 0x0000ffff ) >> 0)
+#define GET_RO_MODE_REG_SO_64 (((REG32(ADR_RX_11GN_BIST_4)) & 0x01000000 ) >> 24)
+#define GET_RO_MONITOR_BUS_64 (((REG32(ADR_RX_11GN_BIST_5)) & 0x0007ffff ) >> 0)
+#define GET_RO_SPECTRUM_DATA (((REG32(ADR_RX_11GN_SPECTRUM_ANALYZER)) & 0xffffffff ) >> 0)
+#define GET_GN_SNR (((REG32(ADR_RX_11GN_READ_0)) & 0x0000007f ) >> 0)
+#define GET_GN_NOISE_PWR (((REG32(ADR_RX_11GN_READ_0)) & 0x00007f00 ) >> 8)
+#define GET_GN_RCPI (((REG32(ADR_RX_11GN_READ_0)) & 0x007f0000 ) >> 16)
+#define GET_GN_SIGNAL_PWR (((REG32(ADR_RX_11GN_READ_0)) & 0x7f000000 ) >> 24)
+#define GET_RO_FREQ_OS_LTS (((REG32(ADR_RX_11GN_FREQ_OFFSET)) & 0x00007fff ) >> 0)
+#define GET_CSTATE (((REG32(ADR_RX_11GN_FREQ_OFFSET)) & 0x000f0000 ) >> 16)
+#define GET_SIGNAL_FIELD0 (((REG32(ADR_RX_11GN_SIGNAL_FIELD_0)) & 0x00ffffff ) >> 0)
+#define GET_SIGNAL_FIELD1 (((REG32(ADR_RX_11GN_SIGNAL_FIELD_1)) & 0x00ffffff ) >> 0)
+#define GET_GN_PACKET_ERR_CNT (((REG32(ADR_RX_11GN_PKT_ERR_CNT)) & 0x0000ffff ) >> 0)
+#define GET_GN_PACKET_CNT (((REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) & 0x0000ffff ) >> 0)
+#define GET_GN_CCA_CNT (((REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) & 0xffff0000 ) >> 16)
+#define GET_GN_LENGTH_FIELD (((REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) & 0x0000ffff ) >> 0)
+#define GET_GN_SERVICE_FIELD (((REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) & 0xffff0000 ) >> 16)
+#define GET_RO_HT_MCS_40M (((REG32(ADR_RX_11GN_RATE)) & 0x0000007f ) >> 0)
+#define GET_RO_L_RATE_40M (((REG32(ADR_RX_11GN_RATE)) & 0x00003f00 ) >> 8)
+#define GET_RG_DAGC_CNT_TH (((REG32(ADR_RX_11GN_STAT_EN)) & 0x00000003 ) >> 0)
+#define GET_RG_PACKET_STAT_EN_11GN (((REG32(ADR_RX_11GN_STAT_EN)) & 0x00100000 ) >> 20)
+#define GET_RX_PHY_11GN_SOFT_RST_N (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000001 ) >> 0)
+#define GET_RG_RIFS_EN (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000002 ) >> 1)
+#define GET_RG_STBC_EN (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000004 ) >> 2)
+#define GET_RG_COR_SEL (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000008 ) >> 3)
+#define GET_RG_INI_PHASE (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000030 ) >> 4)
+#define GET_RG_HT_LTF_SEL_EQ (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000040 ) >> 6)
+#define GET_RG_HT_LTF_SEL_PILOT (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000080 ) >> 7)
+#define GET_RG_CCA_PWR_SEL (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000200 ) >> 9)
+#define GET_RG_CCA_XSCOR_PWR_SEL (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000400 ) >> 10)
+#define GET_RG_CCA_XSCOR_AVGPWR_SEL (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00000800 ) >> 11)
+#define GET_RG_DEBUG_SEL (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x0000f000 ) >> 12)
+#define GET_RG_POST_CLK_EN (((REG32(ADR_RX_11GN_SOFT_RST)) & 0x00010000 ) >> 16)
+#define GET_IQCAL_RF_TX_EN (((REG32(ADR_RF_CONTROL_0)) & 0x00000001 ) >> 0)
+#define GET_IQCAL_RF_TX_PA_EN (((REG32(ADR_RF_CONTROL_0)) & 0x00000002 ) >> 1)
+#define GET_IQCAL_RF_TX_DAC_EN (((REG32(ADR_RF_CONTROL_0)) & 0x00000004 ) >> 2)
+#define GET_IQCAL_RF_RX_AGC (((REG32(ADR_RF_CONTROL_0)) & 0x00000008 ) >> 3)
+#define GET_IQCAL_RF_PGAG (((REG32(ADR_RF_CONTROL_0)) & 0x00000f00 ) >> 8)
+#define GET_IQCAL_RF_RFG (((REG32(ADR_RF_CONTROL_0)) & 0x00003000 ) >> 12)
+#define GET_RG_TONEGEN_FREQ (((REG32(ADR_RF_CONTROL_0)) & 0x007f0000 ) >> 16)
+#define GET_RG_TONEGEN_EN (((REG32(ADR_RF_CONTROL_0)) & 0x00800000 ) >> 23)
+#define GET_RG_TONEGEN_INIT_PH (((REG32(ADR_RF_CONTROL_0)) & 0x7f000000 ) >> 24)
+#define GET_RG_TONEGEN2_FREQ (((REG32(ADR_RF_CONTROL_1)) & 0x0000007f ) >> 0)
+#define GET_RG_TONEGEN2_EN (((REG32(ADR_RF_CONTROL_1)) & 0x00000080 ) >> 7)
+#define GET_RG_TONEGEN2_SCALE (((REG32(ADR_RF_CONTROL_1)) & 0x0000ff00 ) >> 8)
+#define GET_RG_TXIQ_CLP_THD_I (((REG32(ADR_TX_IQ_CONTROL_0)) & 0x000003ff ) >> 0)
+#define GET_RG_TXIQ_CLP_THD_Q (((REG32(ADR_TX_IQ_CONTROL_0)) & 0x03ff0000 ) >> 16)
+#define GET_RG_TX_I_SCALE (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x000000ff ) >> 0)
+#define GET_RG_TX_Q_SCALE (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x0000ff00 ) >> 8)
+#define GET_RG_TX_IQ_SWP (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x00010000 ) >> 16)
+#define GET_RG_TX_SGN_OUT (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x00020000 ) >> 17)
+#define GET_RG_TXIQ_EMU_IDX (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x003c0000 ) >> 18)
+#define GET_RG_TX_IQ_SRC (((REG32(ADR_TX_IQ_CONTROL_1)) & 0x03000000 ) >> 24)
+#define GET_RG_TX_I_DC (((REG32(ADR_TX_IQ_CONTROL_2)) & 0x000003ff ) >> 0)
+#define GET_RG_TX_Q_DC (((REG32(ADR_TX_IQ_CONTROL_2)) & 0x03ff0000 ) >> 16)
+#define GET_RG_TX_IQ_THETA (((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0x0000001f ) >> 0)
+#define GET_RG_TX_IQ_ALPHA (((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0x00001f00 ) >> 8)
+#define GET_RG_TXIQ_NOSHRINK (((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0x00002000 ) >> 13)
+#define GET_RG_TX_I_OFFSET (((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0x00ff0000 ) >> 16)
+#define GET_RG_TX_Q_OFFSET (((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0xff000000 ) >> 24)
+#define GET_RG_RX_IQ_THETA (((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0x0000001f ) >> 0)
+#define GET_RG_RX_IQ_ALPHA (((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0x00001f00 ) >> 8)
+#define GET_RG_RXIQ_NOSHRINK (((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0x00002000 ) >> 13)
+#define GET_RG_MA_DPTH (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x0000000f ) >> 0)
+#define GET_RG_INTG_PH (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x000003f0 ) >> 4)
+#define GET_RG_INTG_PRD (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x00001c00 ) >> 10)
+#define GET_RG_INTG_MU (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x00006000 ) >> 13)
+#define GET_RG_IQCAL_SPRM_SELQ (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x00010000 ) >> 16)
+#define GET_RG_IQCAL_SPRM_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x00020000 ) >> 17)
+#define GET_RG_IQCAL_SPRM_FREQ (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IQCAL_IQCOL_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x01000000 ) >> 24)
+#define GET_RG_IQCAL_ALPHA_ESTM_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x02000000 ) >> 25)
+#define GET_RG_IQCAL_DC_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x04000000 ) >> 26)
+#define GET_RG_PHEST_STBY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x08000000 ) >> 27)
+#define GET_RG_PHEST_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x10000000 ) >> 28)
+#define GET_RG_GP_DIV_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x20000000 ) >> 29)
+#define GET_RG_DPD_GAIN_EST_EN (((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0x40000000 ) >> 30)
+#define GET_RG_IQCAL_MULT_OP0 (((REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) & 0x000003ff ) >> 0)
+#define GET_RG_IQCAL_MULT_OP1 (((REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) & 0x03ff0000 ) >> 16)
+#define GET_RO_IQCAL_O (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x000fffff ) >> 0)
+#define GET_RO_IQCAL_SPRM_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x00100000 ) >> 20)
+#define GET_RO_IQCAL_IQCOL_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x00200000 ) >> 21)
+#define GET_RO_IQCAL_ALPHA_ESTM_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x00400000 ) >> 22)
+#define GET_RO_IQCAL_DC_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x00800000 ) >> 23)
+#define GET_RO_IQCAL_MULT_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x01000000 ) >> 24)
+#define GET_RO_FFT_ENRG_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x02000000 ) >> 25)
+#define GET_RO_PHEST_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x04000000 ) >> 26)
+#define GET_RO_GP_DIV_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x08000000 ) >> 27)
+#define GET_RO_GAIN_EST_RDY (((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0x10000000 ) >> 28)
+#define GET_RO_AMP_O (((REG32(ADR_RX_OBSERVATION_CIRCUIT_3)) & 0x000001ff ) >> 0)
+#define GET_RG_RX_I_SCALE (((REG32(ADR_RF_IQ_CONTROL_0)) & 0x000000ff ) >> 0)
+#define GET_RG_RX_Q_SCALE (((REG32(ADR_RF_IQ_CONTROL_0)) & 0x0000ff00 ) >> 8)
+#define GET_RG_RX_I_OFFSET (((REG32(ADR_RF_IQ_CONTROL_0)) & 0x00ff0000 ) >> 16)
+#define GET_RG_RX_Q_OFFSET (((REG32(ADR_RF_IQ_CONTROL_0)) & 0xff000000 ) >> 24)
+#define GET_RG_RX_IQ_SWP (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00000001 ) >> 0)
+#define GET_RG_RX_SGN_IN (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00000002 ) >> 1)
+#define GET_RG_RX_IQ_SRC (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x0000000c ) >> 2)
+#define GET_RG_ACI_GAIN (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00000ff0 ) >> 4)
+#define GET_RG_FFT_EN (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00001000 ) >> 12)
+#define GET_RG_FFT_MOD (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00002000 ) >> 13)
+#define GET_RG_FFT_SCALE (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x00ffc000 ) >> 14)
+#define GET_RG_FFT_ENRG_FREQ (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x3f000000 ) >> 24)
+#define GET_RG_FPGA_80M_PH_UP (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x40000000 ) >> 30)
+#define GET_RG_FPGA_80M_PH_STP (((REG32(ADR_RF_IQ_CONTROL_1)) & 0x80000000 ) >> 31)
+#define GET_RG_ADC2LA_SEL (((REG32(ADR_RF_IQ_CONTROL_2)) & 0x00000001 ) >> 0)
+#define GET_RG_ADC2LA_CLKPH (((REG32(ADR_RF_IQ_CONTROL_2)) & 0x00000002 ) >> 1)
+#define GET_RG_RXIQ_EMU_IDX (((REG32(ADR_RF_IQ_CONTROL_3)) & 0x0000000f ) >> 0)
+#define GET_RG_IQCAL_BP_ACI (((REG32(ADR_RF_IQ_CONTROL_3)) & 0x00000010 ) >> 4)
+#define GET_RG_DPD_AM_EN (((REG32(ADR_DPD_CONTROL)) & 0x00000001 ) >> 0)
+#define GET_RG_DPD_PM_EN (((REG32(ADR_DPD_CONTROL)) & 0x00000002 ) >> 1)
+#define GET_RG_DPD_PM_AMSEL (((REG32(ADR_DPD_CONTROL)) & 0x00000004 ) >> 2)
+#define GET_RG_DPD_020_GAIN (((REG32(ADR_DPD_GAIN_TABLE_0)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_040_GAIN (((REG32(ADR_DPD_GAIN_TABLE_0)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_060_GAIN (((REG32(ADR_DPD_GAIN_TABLE_1)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_080_GAIN (((REG32(ADR_DPD_GAIN_TABLE_1)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_0A0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_2)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_0C0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_2)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_0D0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_3)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_0E0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_3)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_0F0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_4)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_100_GAIN (((REG32(ADR_DPD_GAIN_TABLE_4)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_110_GAIN (((REG32(ADR_DPD_GAIN_TABLE_5)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_120_GAIN (((REG32(ADR_DPD_GAIN_TABLE_5)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_130_GAIN (((REG32(ADR_DPD_GAIN_TABLE_6)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_140_GAIN (((REG32(ADR_DPD_GAIN_TABLE_6)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_150_GAIN (((REG32(ADR_DPD_GAIN_TABLE_7)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_160_GAIN (((REG32(ADR_DPD_GAIN_TABLE_7)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_170_GAIN (((REG32(ADR_DPD_GAIN_TABLE_8)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_180_GAIN (((REG32(ADR_DPD_GAIN_TABLE_8)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_190_GAIN (((REG32(ADR_DPD_GAIN_TABLE_9)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_1A0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_9)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_1B0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_A)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_1C0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_A)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_1D0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_B)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_1E0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_B)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_1F0_GAIN (((REG32(ADR_DPD_GAIN_TABLE_C)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_200_GAIN (((REG32(ADR_DPD_GAIN_TABLE_C)) & 0x03ff0000 ) >> 16)
+#define GET_RG_DPD_020_PH (((REG32(ADR_DPD_PH_TABLE_0)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_040_PH (((REG32(ADR_DPD_PH_TABLE_0)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_060_PH (((REG32(ADR_DPD_PH_TABLE_1)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_080_PH (((REG32(ADR_DPD_PH_TABLE_1)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_0A0_PH (((REG32(ADR_DPD_PH_TABLE_2)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_0C0_PH (((REG32(ADR_DPD_PH_TABLE_2)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_0D0_PH (((REG32(ADR_DPD_PH_TABLE_3)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_0E0_PH (((REG32(ADR_DPD_PH_TABLE_3)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_0F0_PH (((REG32(ADR_DPD_PH_TABLE_4)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_100_PH (((REG32(ADR_DPD_PH_TABLE_4)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_110_PH (((REG32(ADR_DPD_PH_TABLE_5)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_120_PH (((REG32(ADR_DPD_PH_TABLE_5)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_130_PH (((REG32(ADR_DPD_PH_TABLE_6)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_140_PH (((REG32(ADR_DPD_PH_TABLE_6)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_150_PH (((REG32(ADR_DPD_PH_TABLE_7)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_160_PH (((REG32(ADR_DPD_PH_TABLE_7)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_170_PH (((REG32(ADR_DPD_PH_TABLE_8)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_180_PH (((REG32(ADR_DPD_PH_TABLE_8)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_190_PH (((REG32(ADR_DPD_PH_TABLE_9)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_1A0_PH (((REG32(ADR_DPD_PH_TABLE_9)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_1B0_PH (((REG32(ADR_DPD_PH_TABLE_A)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_1C0_PH (((REG32(ADR_DPD_PH_TABLE_A)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_1D0_PH (((REG32(ADR_DPD_PH_TABLE_B)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_1E0_PH (((REG32(ADR_DPD_PH_TABLE_B)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_1F0_PH (((REG32(ADR_DPD_PH_TABLE_C)) & 0x00001fff ) >> 0)
+#define GET_RG_DPD_200_PH (((REG32(ADR_DPD_PH_TABLE_C)) & 0x1fff0000 ) >> 16)
+#define GET_RG_DPD_GAIN_EST_Y0 (((REG32(ADR_DPD_GAIN_ESTIMATION_0)) & 0x000001ff ) >> 0)
+#define GET_RG_DPD_GAIN_EST_Y1 (((REG32(ADR_DPD_GAIN_ESTIMATION_0)) & 0x01ff0000 ) >> 16)
+#define GET_RG_DPD_LOOP_GAIN (((REG32(ADR_DPD_GAIN_ESTIMATION_1)) & 0x000003ff ) >> 0)
+#define GET_RG_DPD_GAIN_EST_X0 (((REG32(ADR_DPD_GAIN_ESTIMATION_2)) & 0x000001ff ) >> 0)
+#define GET_RO_DPD_GAIN (((REG32(ADR_DPD_GAIN_ESTIMATION_2)) & 0x03ff0000 ) >> 16)
+#define GET_TX_SCALE_11B (((REG32(ADR_TX_GAIN_FACTOR)) & 0x000000ff ) >> 0)
+#define GET_TX_SCALE_11B_P0D5 (((REG32(ADR_TX_GAIN_FACTOR)) & 0x0000ff00 ) >> 8)
+#define GET_TX_SCALE_11G (((REG32(ADR_TX_GAIN_FACTOR)) & 0x00ff0000 ) >> 16)
+#define GET_TX_SCALE_11G_P0D5 (((REG32(ADR_TX_GAIN_FACTOR)) & 0xff000000 ) >> 24)
+#define GET_RG_EN_MANUAL (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_TX_EN (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_RG_TX_PA_EN (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_RG_TX_DAC_EN (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_RG_RX_AGC (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000010 ) >> 4)
+#define GET_RG_RX_GAIN_MANUAL (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000020 ) >> 5)
+#define GET_RG_RFG (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x000000c0 ) >> 6)
+#define GET_RG_PGAG (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00000f00 ) >> 8)
+#define GET_RG_MODE (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00003000 ) >> 12)
+#define GET_RG_EN_TX_TRSW (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_RG_EN_SX (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00008000 ) >> 15)
+#define GET_RG_EN_RX_LNA (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00010000 ) >> 16)
+#define GET_RG_EN_RX_MIXER (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00020000 ) >> 17)
+#define GET_RG_EN_RX_DIV2 (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00040000 ) >> 18)
+#define GET_RG_EN_RX_LOBUF (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00080000 ) >> 19)
+#define GET_RG_EN_RX_TZ (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00100000 ) >> 20)
+#define GET_RG_EN_RX_FILTER (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_RG_EN_RX_HPF (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00400000 ) >> 22)
+#define GET_RG_EN_RX_RSSI (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x00800000 ) >> 23)
+#define GET_RG_EN_ADC (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x01000000 ) >> 24)
+#define GET_RG_EN_TX_MOD (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x02000000 ) >> 25)
+#define GET_RG_EN_TX_DIV2 (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x04000000 ) >> 26)
+#define GET_RG_EN_TX_DIV2_BUF (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x08000000 ) >> 27)
+#define GET_RG_EN_TX_LOBF (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x10000000 ) >> 28)
+#define GET_RG_EN_RX_LOBF (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x20000000 ) >> 29)
+#define GET_RG_SEL_DPLL_CLK (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x40000000 ) >> 30)
+#define GET_RG_EN_CLK_960MBY13_UART (((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x80000000 ) >> 31)
+#define GET_RG_EN_TX_DPD (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_EN_TX_TSSI (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_RG_EN_RX_IQCAL (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_RG_EN_TX_DAC_CAL (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_RG_EN_TX_SELF_MIXER (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000010 ) >> 4)
+#define GET_RG_EN_TX_DAC_OUT (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000020 ) >> 5)
+#define GET_RG_EN_LDO_RX_FE (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000040 ) >> 6)
+#define GET_RG_EN_LDO_ABB (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000080 ) >> 7)
+#define GET_RG_EN_LDO_AFE (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_RG_EN_SX_CHPLDO (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_RG_EN_SX_LOBFLDO (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000400 ) >> 10)
+#define GET_RG_EN_IREF_RX (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00000800 ) >> 11)
+#define GET_RG_EN_TX_DAC_VOUT (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00002000 ) >> 13)
+#define GET_RG_EN_SX_LCK_BIN (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_RG_RTC_CAL_MODE (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00010000 ) >> 16)
+#define GET_RG_EN_IQPAD_IOSW (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00020000 ) >> 17)
+#define GET_RG_EN_TESTPAD_IOSW (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00040000 ) >> 18)
+#define GET_RG_EN_TRXBF_BYPASS (((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0x00080000 ) >> 19)
+#define GET_RG_LDO_LEVEL_RX_FE (((REG32(ADR_LDO_REGISTER)) & 0x00000007 ) >> 0)
+#define GET_RG_LDO_LEVEL_ABB (((REG32(ADR_LDO_REGISTER)) & 0x00000038 ) >> 3)
+#define GET_RG_LDO_LEVEL_AFE (((REG32(ADR_LDO_REGISTER)) & 0x000001c0 ) >> 6)
+#define GET_RG_SX_LDO_CHP_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x00000e00 ) >> 9)
+#define GET_RG_SX_LDO_LOBF_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x00007000 ) >> 12)
+#define GET_RG_SX_LDO_XOSC_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x00038000 ) >> 15)
+#define GET_RG_DP_LDO_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x001c0000 ) >> 18)
+#define GET_RG_SX_LDO_VCO_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x00e00000 ) >> 21)
+#define GET_RG_TX_LDO_TX_LEVEL (((REG32(ADR_LDO_REGISTER)) & 0x07000000 ) >> 24)
+#define GET_RG_EN_RX_PADSW (((REG32(ADR_ABB_REGISTER_1)) & 0x00000001 ) >> 0)
+#define GET_RG_EN_RX_TESTNODE (((REG32(ADR_ABB_REGISTER_1)) & 0x00000002 ) >> 1)
+#define GET_RG_RX_ABBCFIX (((REG32(ADR_ABB_REGISTER_1)) & 0x00000004 ) >> 2)
+#define GET_RG_RX_ABBCTUNE (((REG32(ADR_ABB_REGISTER_1)) & 0x000001f8 ) >> 3)
+#define GET_RG_RX_ABBOUT_TRI_STATE (((REG32(ADR_ABB_REGISTER_1)) & 0x00000200 ) >> 9)
+#define GET_RG_RX_ABB_N_MODE (((REG32(ADR_ABB_REGISTER_1)) & 0x00000400 ) >> 10)
+#define GET_RG_RX_EN_LOOPA (((REG32(ADR_ABB_REGISTER_1)) & 0x00000800 ) >> 11)
+#define GET_RG_RX_FILTERI1ST (((REG32(ADR_ABB_REGISTER_1)) & 0x00003000 ) >> 12)
+#define GET_RG_RX_FILTERI2ND (((REG32(ADR_ABB_REGISTER_1)) & 0x0000c000 ) >> 14)
+#define GET_RG_RX_FILTERI3RD (((REG32(ADR_ABB_REGISTER_1)) & 0x00030000 ) >> 16)
+#define GET_RG_RX_FILTERI_COURSE (((REG32(ADR_ABB_REGISTER_1)) & 0x000c0000 ) >> 18)
+#define GET_RG_RX_FILTERVCM (((REG32(ADR_ABB_REGISTER_1)) & 0x00300000 ) >> 20)
+#define GET_RG_RX_HPF3M (((REG32(ADR_ABB_REGISTER_1)) & 0x00400000 ) >> 22)
+#define GET_RG_RX_HPF300K (((REG32(ADR_ABB_REGISTER_1)) & 0x00800000 ) >> 23)
+#define GET_RG_RX_HPFI (((REG32(ADR_ABB_REGISTER_1)) & 0x03000000 ) >> 24)
+#define GET_RG_RX_HPF_FINALCORNER (((REG32(ADR_ABB_REGISTER_1)) & 0x0c000000 ) >> 26)
+#define GET_RG_RX_HPF_SETTLE1_C (((REG32(ADR_ABB_REGISTER_1)) & 0x30000000 ) >> 28)
+#define GET_RG_RX_HPF_SETTLE1_R (((REG32(ADR_ABB_REGISTER_2)) & 0x00000003 ) >> 0)
+#define GET_RG_RX_HPF_SETTLE2_C (((REG32(ADR_ABB_REGISTER_2)) & 0x0000000c ) >> 2)
+#define GET_RG_RX_HPF_SETTLE2_R (((REG32(ADR_ABB_REGISTER_2)) & 0x00000030 ) >> 4)
+#define GET_RG_RX_HPF_VCMCON2 (((REG32(ADR_ABB_REGISTER_2)) & 0x000000c0 ) >> 6)
+#define GET_RG_RX_HPF_VCMCON (((REG32(ADR_ABB_REGISTER_2)) & 0x00000300 ) >> 8)
+#define GET_RG_RX_OUTVCM (((REG32(ADR_ABB_REGISTER_2)) & 0x00000c00 ) >> 10)
+#define GET_RG_RX_TZI (((REG32(ADR_ABB_REGISTER_2)) & 0x00003000 ) >> 12)
+#define GET_RG_RX_TZ_OUT_TRISTATE (((REG32(ADR_ABB_REGISTER_2)) & 0x00004000 ) >> 14)
+#define GET_RG_RX_TZ_VCM (((REG32(ADR_ABB_REGISTER_2)) & 0x00018000 ) >> 15)
+#define GET_RG_EN_RX_RSSI_TESTNODE (((REG32(ADR_ABB_REGISTER_2)) & 0x000e0000 ) >> 17)
+#define GET_RG_RX_ADCRSSI_CLKSEL (((REG32(ADR_ABB_REGISTER_2)) & 0x00100000 ) >> 20)
+#define GET_RG_RX_ADCRSSI_VCM (((REG32(ADR_ABB_REGISTER_2)) & 0x00600000 ) >> 21)
+#define GET_RG_RX_REC_LPFCORNER (((REG32(ADR_ABB_REGISTER_2)) & 0x01800000 ) >> 23)
+#define GET_RG_RSSI_CLOCK_GATING (((REG32(ADR_ABB_REGISTER_2)) & 0x02000000 ) >> 25)
+#define GET_RG_TXPGA_CAPSW (((REG32(ADR_TX_FE_REGISTER)) & 0x00000003 ) >> 0)
+#define GET_RG_TXPGA_MAIN (((REG32(ADR_TX_FE_REGISTER)) & 0x000000fc ) >> 2)
+#define GET_RG_TXPGA_STEER (((REG32(ADR_TX_FE_REGISTER)) & 0x00003f00 ) >> 8)
+#define GET_RG_TXMOD_GMCELL (((REG32(ADR_TX_FE_REGISTER)) & 0x0000c000 ) >> 14)
+#define GET_RG_TXLPF_GMCELL (((REG32(ADR_TX_FE_REGISTER)) & 0x00030000 ) >> 16)
+#define GET_RG_PACELL_EN (((REG32(ADR_TX_FE_REGISTER)) & 0x001c0000 ) >> 18)
+#define GET_RG_PABIAS_CTRL (((REG32(ADR_TX_FE_REGISTER)) & 0x01e00000 ) >> 21)
+#define GET_RG_TX_DIV_VSET (((REG32(ADR_TX_FE_REGISTER)) & 0x0c000000 ) >> 26)
+#define GET_RG_TX_LOBUF_VSET (((REG32(ADR_TX_FE_REGISTER)) & 0x30000000 ) >> 28)
+#define GET_RG_RX_SQDC (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000007 ) >> 0)
+#define GET_RG_RX_DIV2_CORE (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000018 ) >> 3)
+#define GET_RG_RX_LOBUF (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000060 ) >> 5)
+#define GET_RG_TX_DPDGM_BIAS (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000780 ) >> 7)
+#define GET_RG_TX_DPD_DIV (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00007800 ) >> 11)
+#define GET_RG_TX_TSSI_BIAS (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00038000 ) >> 15)
+#define GET_RG_TX_TSSI_DIV (((REG32(ADR_RX_FE_REGISTER_1)) & 0x001c0000 ) >> 18)
+#define GET_RG_TX_TSSI_TESTMODE (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00200000 ) >> 21)
+#define GET_RG_TX_TSSI_TEST (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00c00000 ) >> 22)
+#define GET_RG_PACASCODE_CTRL (((REG32(ADR_RX_FE_REGISTER_1)) & 0x07000000 ) >> 24)
+#define GET_RG_RX_HG_LNA_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00000003 ) >> 0)
+#define GET_RG_RX_HG_LNAHGN_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x0000003c ) >> 2)
+#define GET_RG_RX_HG_LNAHGP_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x000003c0 ) >> 6)
+#define GET_RG_RX_HG_LNALG_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00003c00 ) >> 10)
+#define GET_RG_RX_HG_TZ_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x0000c000 ) >> 14)
+#define GET_RG_RX_HG_TZ_CAP (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0x00070000 ) >> 16)
+#define GET_RG_RX_MG_LNA_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00000003 ) >> 0)
+#define GET_RG_RX_MG_LNAHGN_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x0000003c ) >> 2)
+#define GET_RG_RX_MG_LNAHGP_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x000003c0 ) >> 6)
+#define GET_RG_RX_MG_LNALG_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00003c00 ) >> 10)
+#define GET_RG_RX_MG_TZ_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x0000c000 ) >> 14)
+#define GET_RG_RX_MG_TZ_CAP (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0x00070000 ) >> 16)
+#define GET_RG_RX_LG_LNA_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00000003 ) >> 0)
+#define GET_RG_RX_LG_LNAHGN_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x0000003c ) >> 2)
+#define GET_RG_RX_LG_LNAHGP_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x000003c0 ) >> 6)
+#define GET_RG_RX_LG_LNALG_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00003c00 ) >> 10)
+#define GET_RG_RX_LG_TZ_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x0000c000 ) >> 14)
+#define GET_RG_RX_LG_TZ_CAP (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0x00070000 ) >> 16)
+#define GET_RG_RX_ULG_LNA_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00000003 ) >> 0)
+#define GET_RG_RX_ULG_LNAHGN_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x0000003c ) >> 2)
+#define GET_RG_RX_ULG_LNAHGP_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x000003c0 ) >> 6)
+#define GET_RG_RX_ULG_LNALG_BIAS (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00003c00 ) >> 10)
+#define GET_RG_RX_ULG_TZ_GC (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x0000c000 ) >> 14)
+#define GET_RG_RX_ULG_TZ_CAP (((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0x00070000 ) >> 16)
+#define GET_RG_HPF1_FAST_SET_X (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_HPF1_FAST_SET_Y (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_RG_HPF1_FAST_SET_Z (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_RG_HPF_T1A (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_RG_HPF_T1B (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000060 ) >> 5)
+#define GET_RG_HPF_T1C (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000180 ) >> 7)
+#define GET_RG_RX_LNA_TRI_SEL (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00000600 ) >> 9)
+#define GET_RG_RX_LNA_SETTLE (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00001800 ) >> 11)
+#define GET_RG_TXGAIN_PHYCTRL (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00002000 ) >> 13)
+#define GET_RG_TX_GAIN (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x003fc000 ) >> 14)
+#define GET_RG_TXGAIN_MANUAL (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x00400000 ) >> 22)
+#define GET_RG_TX_GAIN_OFFSET (((REG32(ADR_RX_TX_FSM_REGISTER)) & 0x07800000 ) >> 23)
+#define GET_RG_ADC_CLKSEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_ADC_DIBIAS (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_RG_ADC_DIVR (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_RG_ADC_DVCMI (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000030 ) >> 4)
+#define GET_RG_ADC_SAMSEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x000003c0 ) >> 6)
+#define GET_RG_ADC_STNBY (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000400 ) >> 10)
+#define GET_RG_ADC_TESTMODE (((REG32(ADR_RX_ADC_REGISTER)) & 0x00000800 ) >> 11)
+#define GET_RG_ADC_TSEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x0000f000 ) >> 12)
+#define GET_RG_ADC_VRSEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x00030000 ) >> 16)
+#define GET_RG_DICMP (((REG32(ADR_RX_ADC_REGISTER)) & 0x000c0000 ) >> 18)
+#define GET_RG_DIOP (((REG32(ADR_RX_ADC_REGISTER)) & 0x00300000 ) >> 20)
+#define GET_RG_SARADC_VRSEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x00c00000 ) >> 22)
+#define GET_RG_EN_SAR_TEST (((REG32(ADR_RX_ADC_REGISTER)) & 0x03000000 ) >> 24)
+#define GET_RG_SARADC_THERMAL (((REG32(ADR_RX_ADC_REGISTER)) & 0x04000000 ) >> 26)
+#define GET_RG_SARADC_TSSI (((REG32(ADR_RX_ADC_REGISTER)) & 0x08000000 ) >> 27)
+#define GET_RG_CLK_SAR_SEL (((REG32(ADR_RX_ADC_REGISTER)) & 0x30000000 ) >> 28)
+#define GET_RG_EN_SARADC (((REG32(ADR_RX_ADC_REGISTER)) & 0x40000000 ) >> 30)
+#define GET_RG_DACI1ST (((REG32(ADR_TX_DAC_REGISTER)) & 0x00000003 ) >> 0)
+#define GET_RG_TX_DACLPF_ICOURSE (((REG32(ADR_TX_DAC_REGISTER)) & 0x0000000c ) >> 2)
+#define GET_RG_TX_DACLPF_IFINE (((REG32(ADR_TX_DAC_REGISTER)) & 0x00000030 ) >> 4)
+#define GET_RG_TX_DACLPF_VCM (((REG32(ADR_TX_DAC_REGISTER)) & 0x000000c0 ) >> 6)
+#define GET_RG_TX_DAC_CKEDGE_SEL (((REG32(ADR_TX_DAC_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_RG_TX_DAC_IBIAS (((REG32(ADR_TX_DAC_REGISTER)) & 0x00000600 ) >> 9)
+#define GET_RG_TX_DAC_OS (((REG32(ADR_TX_DAC_REGISTER)) & 0x00003800 ) >> 11)
+#define GET_RG_TX_DAC_RCAL (((REG32(ADR_TX_DAC_REGISTER)) & 0x0000c000 ) >> 14)
+#define GET_RG_TX_DAC_TSEL (((REG32(ADR_TX_DAC_REGISTER)) & 0x000f0000 ) >> 16)
+#define GET_RG_TX_EN_VOLTAGE_IN (((REG32(ADR_TX_DAC_REGISTER)) & 0x00100000 ) >> 20)
+#define GET_RG_TXLPF_BYPASS (((REG32(ADR_TX_DAC_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_RG_TXLPF_BOOSTI (((REG32(ADR_TX_DAC_REGISTER)) & 0x00400000 ) >> 22)
+#define GET_RG_TX_DAC_IOFFSET (((REG32(ADR_TX_DAC_REGISTER)) & 0x07800000 ) >> 23)
+#define GET_RG_TX_DAC_QOFFSET (((REG32(ADR_TX_DAC_REGISTER)) & 0x78000000 ) >> 27)
+#define GET_RG_EN_SX_R3 (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_EN_SX_CH (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_RG_EN_SX_CHP (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000004 ) >> 2)
+#define GET_RG_EN_SX_DIVCK (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000008 ) >> 3)
+#define GET_RG_EN_SX_VCOBF (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000010 ) >> 4)
+#define GET_RG_EN_SX_VCO (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000020 ) >> 5)
+#define GET_RG_EN_SX_MOD (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000040 ) >> 6)
+#define GET_RG_EN_SX_DITHER (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000100 ) >> 8)
+#define GET_RG_EN_SX_VT_MON (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00000800 ) >> 11)
+#define GET_RG_EN_SX_VT_MON_DG (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00001000 ) >> 12)
+#define GET_RG_EN_SX_DIV (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00002000 ) >> 13)
+#define GET_RG_EN_SX_LPF (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_RG_EN_DPL_MOD (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00008000 ) >> 15)
+#define GET_RG_DPL_MOD_ORDER (((REG32(ADR_SX_ENABLE_REGISTER)) & 0x00030000 ) >> 16)
+#define GET_RG_SX_RFCTRL_F (((REG32(ADR_SYN_REGISTER_1)) & 0x00ffffff ) >> 0)
+#define GET_RG_SX_SEL_CP (((REG32(ADR_SYN_REGISTER_1)) & 0x0f000000 ) >> 24)
+#define GET_RG_SX_SEL_CS (((REG32(ADR_SYN_REGISTER_1)) & 0xf0000000 ) >> 28)
+#define GET_RG_SX_RFCTRL_CH (((REG32(ADR_SYN_REGISTER_2)) & 0x000007ff ) >> 0)
+#define GET_RG_SX_SEL_C3 (((REG32(ADR_SYN_REGISTER_2)) & 0x00007800 ) >> 11)
+#define GET_RG_SX_SEL_RS (((REG32(ADR_SYN_REGISTER_2)) & 0x000f8000 ) >> 15)
+#define GET_RG_SX_SEL_R3 (((REG32(ADR_SYN_REGISTER_2)) & 0x01f00000 ) >> 20)
+#define GET_RG_SX_SEL_ICHP (((REG32(ADR_SYN_PFD_CHP)) & 0x0000001f ) >> 0)
+#define GET_RG_SX_SEL_PCHP (((REG32(ADR_SYN_PFD_CHP)) & 0x000003e0 ) >> 5)
+#define GET_RG_SX_SEL_CHP_REGOP (((REG32(ADR_SYN_PFD_CHP)) & 0x00003c00 ) >> 10)
+#define GET_RG_SX_SEL_CHP_UNIOP (((REG32(ADR_SYN_PFD_CHP)) & 0x0003c000 ) >> 14)
+#define GET_RG_SX_CHP_IOST_POL (((REG32(ADR_SYN_PFD_CHP)) & 0x00040000 ) >> 18)
+#define GET_RG_SX_CHP_IOST (((REG32(ADR_SYN_PFD_CHP)) & 0x00380000 ) >> 19)
+#define GET_RG_SX_PFDSEL (((REG32(ADR_SYN_PFD_CHP)) & 0x00400000 ) >> 22)
+#define GET_RG_SX_PFD_SET (((REG32(ADR_SYN_PFD_CHP)) & 0x00800000 ) >> 23)
+#define GET_RG_SX_PFD_SET1 (((REG32(ADR_SYN_PFD_CHP)) & 0x01000000 ) >> 24)
+#define GET_RG_SX_PFD_SET2 (((REG32(ADR_SYN_PFD_CHP)) & 0x02000000 ) >> 25)
+#define GET_RG_SX_VBNCAS_SEL (((REG32(ADR_SYN_PFD_CHP)) & 0x04000000 ) >> 26)
+#define GET_RG_SX_PFD_RST_H (((REG32(ADR_SYN_PFD_CHP)) & 0x08000000 ) >> 27)
+#define GET_RG_SX_PFD_TRUP (((REG32(ADR_SYN_PFD_CHP)) & 0x10000000 ) >> 28)
+#define GET_RG_SX_PFD_TRDN (((REG32(ADR_SYN_PFD_CHP)) & 0x20000000 ) >> 29)
+#define GET_RG_SX_PFD_TRSEL (((REG32(ADR_SYN_PFD_CHP)) & 0x40000000 ) >> 30)
+#define GET_RG_SX_VCOBA_R (((REG32(ADR_SYN_VCO_LOBF)) & 0x00000007 ) >> 0)
+#define GET_RG_SX_VCORSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x000000f8 ) >> 3)
+#define GET_RG_SX_VCOCUSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x00000f00 ) >> 8)
+#define GET_RG_SX_RXBFSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x0000f000 ) >> 12)
+#define GET_RG_SX_TXBFSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x000f0000 ) >> 16)
+#define GET_RG_SX_VCOBFSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x00f00000 ) >> 20)
+#define GET_RG_SX_DIVBFSEL (((REG32(ADR_SYN_VCO_LOBF)) & 0x0f000000 ) >> 24)
+#define GET_RG_SX_GNDR_SEL (((REG32(ADR_SYN_VCO_LOBF)) & 0xf0000000 ) >> 28)
+#define GET_RG_SX_DITHER_WEIGHT (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00000003 ) >> 0)
+#define GET_RG_SX_MOD_ORDER (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00000030 ) >> 4)
+#define GET_RG_SX_RST_H_DIV (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00000200 ) >> 9)
+#define GET_RG_SX_SDM_EDGE (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00000400 ) >> 10)
+#define GET_RG_SX_XO_GM (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00001800 ) >> 11)
+#define GET_RG_SX_REFBYTWO (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00002000 ) >> 13)
+#define GET_RG_SX_LCKEN (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00080000 ) >> 19)
+#define GET_RG_SX_PREVDD (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x00f00000 ) >> 20)
+#define GET_RG_SX_PSCONTERVDD (((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0x0f000000 ) >> 24)
+#define GET_RG_SX_PH (((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0x00002000 ) >> 13)
+#define GET_RG_SX_PL (((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0x00004000 ) >> 14)
+#define GET_RG_XOSC_CBANK_XO (((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0x00078000 ) >> 15)
+#define GET_RG_XOSC_CBANK_XI (((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0x00780000 ) >> 19)
+#define GET_RG_SX_VT_MON_MODE (((REG32(ADR_SYN_LCK_VT)) & 0x00000001 ) >> 0)
+#define GET_RG_SX_VT_TH_HI (((REG32(ADR_SYN_LCK_VT)) & 0x00000006 ) >> 1)
+#define GET_RG_SX_VT_TH_LO (((REG32(ADR_SYN_LCK_VT)) & 0x00000018 ) >> 3)
+#define GET_RG_SX_VT_SET (((REG32(ADR_SYN_LCK_VT)) & 0x00000020 ) >> 5)
+#define GET_RG_SX_VT_MON_TMR (((REG32(ADR_SYN_LCK_VT)) & 0x00007fc0 ) >> 6)
+#define GET_RG_EN_DP_VT_MON (((REG32(ADR_DPLL_VCO_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_DP_VT_TH_HI (((REG32(ADR_DPLL_VCO_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_RG_DP_VT_TH_LO (((REG32(ADR_DPLL_VCO_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_RG_DP_CK320BY2 (((REG32(ADR_DPLL_VCO_REGISTER)) & 0x00004000 ) >> 14)
+#define GET_RG_DP_OD_TEST (((REG32(ADR_DPLL_VCO_REGISTER)) & 0x00200000 ) >> 21)
+#define GET_RG_DP_BBPLL_BP (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_DP_BBPLL_ICP (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00000006 ) >> 1)
+#define GET_RG_DP_BBPLL_IDUAL (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00000018 ) >> 3)
+#define GET_RG_DP_BBPLL_OD_TEST (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x000001e0 ) >> 5)
+#define GET_RG_DP_BBPLL_PD (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_RG_DP_BBPLL_TESTSEL (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00001c00 ) >> 10)
+#define GET_RG_DP_BBPLL_PFD_DLY (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00006000 ) >> 13)
+#define GET_RG_DP_RP (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x00038000 ) >> 15)
+#define GET_RG_DP_RHP (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x000c0000 ) >> 18)
+#define GET_RG_DP_BBPLL_SDM_EDGE (((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x80000000 ) >> 31)
+#define GET_RG_DP_FODIV (((REG32(ADR_DPLL_DIVIDER_REGISTER)) & 0x0007f000 ) >> 12)
+#define GET_RG_DP_REFDIV (((REG32(ADR_DPLL_DIVIDER_REGISTER)) & 0x1fc00000 ) >> 22)
+#define GET_RG_IDACAI_PGAG15 (((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG15 (((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG14 (((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG14 (((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0x00fc0000 ) >> 18)
+#define GET_RG_DP_BBPLL_BS (((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0x3f000000 ) >> 24)
+#define GET_RG_IDACAI_PGAG13 (((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG13 (((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG12 (((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG12 (((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG11 (((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG11 (((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG10 (((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG10 (((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG9 (((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG9 (((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG8 (((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG8 (((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG7 (((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG7 (((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG6 (((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG6 (((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG5 (((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG5 (((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG4 (((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG4 (((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG3 (((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG3 (((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG2 (((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG2 (((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0x00fc0000 ) >> 18)
+#define GET_RG_IDACAI_PGAG1 (((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0x0000003f ) >> 0)
+#define GET_RG_IDACAQ_PGAG1 (((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0x00000fc0 ) >> 6)
+#define GET_RG_IDACAI_PGAG0 (((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0x0003f000 ) >> 12)
+#define GET_RG_IDACAQ_PGAG0 (((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0x00fc0000 ) >> 18)
+#define GET_RG_EN_RCAL (((REG32(ADR_RCAL_REGISTER)) & 0x00000001 ) >> 0)
+#define GET_RG_RCAL_SPD (((REG32(ADR_RCAL_REGISTER)) & 0x00000002 ) >> 1)
+#define GET_RG_RCAL_TMR (((REG32(ADR_RCAL_REGISTER)) & 0x000001fc ) >> 2)
+#define GET_RG_RCAL_CODE_CWR (((REG32(ADR_RCAL_REGISTER)) & 0x00000200 ) >> 9)
+#define GET_RG_RCAL_CODE_CWD (((REG32(ADR_RCAL_REGISTER)) & 0x00007c00 ) >> 10)
+#define GET_RG_SX_SUB_SEL_CWR (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00000001 ) >> 0)
+#define GET_RG_SX_SUB_SEL_CWD (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x000000fe ) >> 1)
+#define GET_RG_SX_LCK_BIN_OFFSET (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00078000 ) >> 15)
+#define GET_RG_SX_LCK_BIN_PRECISION (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00080000 ) >> 19)
+#define GET_RG_SX_LOCK_EN_N (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00100000 ) >> 20)
+#define GET_RG_SX_LOCK_MANUAL (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00200000 ) >> 21)
+#define GET_RG_SX_SUB_MANUAL (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x00400000 ) >> 22)
+#define GET_RG_SX_SUB_SEL (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x3f800000 ) >> 23)
+#define GET_RG_SX_MUX_SEL_VTH_BINL (((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0x40000000 ) >> 30)
+#define GET_RG_TRX_DUMMMY (((REG32(ADR_TRX_DUMMY_REGISTER)) & 0xffffffff ) >> 0)
+#define GET_RG_SX_DUMMMY (((REG32(ADR_SX_DUMMY_REGISTER)) & 0xffffffff ) >> 0)
+#define GET_RCAL_RDY (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00000001 ) >> 0)
+#define GET_LCK_BIN_RDY (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00000002 ) >> 1)
+#define GET_VT_MON_RDY (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00000004 ) >> 2)
+#define GET_DA_R_CODE_LUT (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x000007c0 ) >> 6)
+#define GET_AD_SX_VT_MON_Q (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00001800 ) >> 11)
+#define GET_AD_DP_VT_MON_Q (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00006000 ) >> 13)
+#define GET_RTC_CAL_RDY (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00008000 ) >> 15)
+#define GET_RG_SARADC_BIT (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x003f0000 ) >> 16)
+#define GET_SAR_ADC_FSM_RDY (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x00400000 ) >> 22)
+#define GET_AD_CIRCUIT_VERSION (((REG32(ADR_READ_ONLY_FLAGS_1)) & 0x07800000 ) >> 23)
+#define GET_DA_R_CAL_CODE (((REG32(ADR_READ_ONLY_FLAGS_2)) & 0x0000001f ) >> 0)
+#define GET_DA_SX_SUB_SEL (((REG32(ADR_READ_ONLY_FLAGS_2)) & 0x00000fe0 ) >> 5)
+#define GET_RG_DPL_RFCTRL_CH (((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0x000007ff ) >> 0)
+#define GET_RG_RSSIADC_RO_BIT (((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0x00007800 ) >> 11)
+#define GET_RG_RX_ADC_I_RO_BIT (((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0x007f8000 ) >> 15)
+#define GET_RG_RX_ADC_Q_RO_BIT (((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0x7f800000 ) >> 23)
+#define GET_RG_DPL_RFCTRL_F (((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_II)) & 0x00ffffff ) >> 0)
+#define GET_RG_SX_TARGET_CNT (((REG32(ADR_SX_LCK_BIN_REGISTERS_II)) & 0x00001fff ) >> 0)
+#define GET_RG_RTC_OFFSET (((REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) & 0x000000ff ) >> 0)
+#define GET_RG_RTC_CAL_TARGET_COUNT (((REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) & 0x000fff00 ) >> 8)
+#define GET_RG_RF_D_REG (((REG32(ADR_RF_D_DIGITAL_DEBUG_PORT_REGISTER)) & 0x0000ffff ) >> 0)
+#define GET_DIRECT_MODE (((REG32(ADR_MMU_CTRL)) & 0x00000001 ) >> 0)
+#define GET_TAG_INTERLEAVE_MD (((REG32(ADR_MMU_CTRL)) & 0x00000002 ) >> 1)
+#define GET_DIS_DEMAND (((REG32(ADR_MMU_CTRL)) & 0x00000004 ) >> 2)
+#define GET_SAME_ID_ALLOC_MD (((REG32(ADR_MMU_CTRL)) & 0x00000008 ) >> 3)
+#define GET_HS_ACCESS_MD (((REG32(ADR_MMU_CTRL)) & 0x00000010 ) >> 4)
+#define GET_SRAM_ACCESS_MD (((REG32(ADR_MMU_CTRL)) & 0x00000020 ) >> 5)
+#define GET_NOHIT_RPASS_MD (((REG32(ADR_MMU_CTRL)) & 0x00000040 ) >> 6)
+#define GET_DMN_FLAG_CLR (((REG32(ADR_MMU_CTRL)) & 0x00000080 ) >> 7)
+#define GET_ERR_SW_RST_N (((REG32(ADR_MMU_CTRL)) & 0x00000100 ) >> 8)
+#define GET_ALR_SW_RST_N (((REG32(ADR_MMU_CTRL)) & 0x00000200 ) >> 9)
+#define GET_MCH_SW_RST_N (((REG32(ADR_MMU_CTRL)) & 0x00000400 ) >> 10)
+#define GET_TAG_SW_RST_N (((REG32(ADR_MMU_CTRL)) & 0x00000800 ) >> 11)
+#define GET_ABT_SW_RST_N (((REG32(ADR_MMU_CTRL)) & 0x00001000 ) >> 12)
+#define GET_MMU_VER (((REG32(ADR_MMU_CTRL)) & 0x0000e000 ) >> 13)
+#define GET_MMU_SHARE_MCU (((REG32(ADR_MMU_CTRL)) & 0x00ff0000 ) >> 16)
+#define GET_HS_WR (((REG32(ADR_HS_CTRL)) & 0x00000001 ) >> 0)
+#define GET_HS_FLAG (((REG32(ADR_HS_CTRL)) & 0x00000010 ) >> 4)
+#define GET_HS_ID (((REG32(ADR_HS_CTRL)) & 0x00007f00 ) >> 8)
+#define GET_HS_CHANNEL (((REG32(ADR_HS_CTRL)) & 0x000f0000 ) >> 16)
+#define GET_HS_PAGE (((REG32(ADR_HS_CTRL)) & 0x00f00000 ) >> 20)
+#define GET_HS_DATA (((REG32(ADR_HS_CTRL)) & 0xff000000 ) >> 24)
+#define GET_CPU_POR0 (((REG32(ADR_CPU_POR0_7)) & 0x0000000f ) >> 0)
+#define GET_CPU_POR1 (((REG32(ADR_CPU_POR0_7)) & 0x000000f0 ) >> 4)
+#define GET_CPU_POR2 (((REG32(ADR_CPU_POR0_7)) & 0x00000f00 ) >> 8)
+#define GET_CPU_POR3 (((REG32(ADR_CPU_POR0_7)) & 0x0000f000 ) >> 12)
+#define GET_CPU_POR4 (((REG32(ADR_CPU_POR0_7)) & 0x000f0000 ) >> 16)
+#define GET_CPU_POR5 (((REG32(ADR_CPU_POR0_7)) & 0x00f00000 ) >> 20)
+#define GET_CPU_POR6 (((REG32(ADR_CPU_POR0_7)) & 0x0f000000 ) >> 24)
+#define GET_CPU_POR7 (((REG32(ADR_CPU_POR0_7)) & 0xf0000000 ) >> 28)
+#define GET_CPU_POR8 (((REG32(ADR_CPU_POR8_F)) & 0x0000000f ) >> 0)
+#define GET_CPU_POR9 (((REG32(ADR_CPU_POR8_F)) & 0x000000f0 ) >> 4)
+#define GET_CPU_PORA (((REG32(ADR_CPU_POR8_F)) & 0x00000f00 ) >> 8)
+#define GET_CPU_PORB (((REG32(ADR_CPU_POR8_F)) & 0x0000f000 ) >> 12)
+#define GET_CPU_PORC (((REG32(ADR_CPU_POR8_F)) & 0x000f0000 ) >> 16)
+#define GET_CPU_PORD (((REG32(ADR_CPU_POR8_F)) & 0x00f00000 ) >> 20)
+#define GET_CPU_PORE (((REG32(ADR_CPU_POR8_F)) & 0x0f000000 ) >> 24)
+#define GET_CPU_PORF (((REG32(ADR_CPU_POR8_F)) & 0xf0000000 ) >> 28)
+#define GET_ACC_WR_LEN (((REG32(ADR_REG_LEN_CTRL)) & 0x0000003f ) >> 0)
+#define GET_ACC_RD_LEN (((REG32(ADR_REG_LEN_CTRL)) & 0x00003f00 ) >> 8)
+#define GET_REQ_NACK_CLR (((REG32(ADR_REG_LEN_CTRL)) & 0x00008000 ) >> 15)
+#define GET_NACK_FLAG_BUS (((REG32(ADR_REG_LEN_CTRL)) & 0xffff0000 ) >> 16)
+#define GET_DMN_R_PASS (((REG32(ADR_DMN_READ_BYPASS)) & 0x0000ffff ) >> 0)
+#define GET_PARA_ALC_RLS (((REG32(ADR_DMN_READ_BYPASS)) & 0x00010000 ) >> 16)
+#define GET_REQ_PORNS_CHGEN (((REG32(ADR_DMN_READ_BYPASS)) & 0x01000000 ) >> 24)
+#define GET_ALC_ABT_ID (((REG32(ADR_ALC_RLS_ABORT)) & 0x0000007f ) >> 0)
+#define GET_ALC_ABT_INT (((REG32(ADR_ALC_RLS_ABORT)) & 0x00008000 ) >> 15)
+#define GET_RLS_ABT_ID (((REG32(ADR_ALC_RLS_ABORT)) & 0x007f0000 ) >> 16)
+#define GET_RLS_ABT_INT (((REG32(ADR_ALC_RLS_ABORT)) & 0x80000000 ) >> 31)
+#define GET_DEBUG_CTL (((REG32(ADR_DEBUG_CTL)) & 0x000000ff ) >> 0)
+#define GET_DEBUG_H16 (((REG32(ADR_DEBUG_CTL)) & 0x00000100 ) >> 8)
+#define GET_DEBUG_OUT (((REG32(ADR_DEBUG_OUT)) & 0xffffffff ) >> 0)
+#define GET_ALC_ERR (((REG32(ADR_MMU_STATUS)) & 0x00000001 ) >> 0)
+#define GET_RLS_ERR (((REG32(ADR_MMU_STATUS)) & 0x00000002 ) >> 1)
+#define GET_AL_STATE (((REG32(ADR_MMU_STATUS)) & 0x00000700 ) >> 8)
+#define GET_RL_STATE (((REG32(ADR_MMU_STATUS)) & 0x00007000 ) >> 12)
+#define GET_ALC_ERR_ID (((REG32(ADR_MMU_STATUS)) & 0x007f0000 ) >> 16)
+#define GET_RLS_ERR_ID (((REG32(ADR_MMU_STATUS)) & 0x7f000000 ) >> 24)
+#define GET_DMN_NOHIT_FLAG (((REG32(ADR_DMN_STATUS)) & 0x00000001 ) >> 0)
+#define GET_DMN_FLAG (((REG32(ADR_DMN_STATUS)) & 0x00000002 ) >> 1)
+#define GET_DMN_WR (((REG32(ADR_DMN_STATUS)) & 0x00000008 ) >> 3)
+#define GET_DMN_PORT (((REG32(ADR_DMN_STATUS)) & 0x000000f0 ) >> 4)
+#define GET_DMN_NHIT_ID (((REG32(ADR_DMN_STATUS)) & 0x00007f00 ) >> 8)
+#define GET_DMN_NHIT_ADDR (((REG32(ADR_DMN_STATUS)) & 0xffff0000 ) >> 16)
+#define GET_TX_MOUNT (((REG32(ADR_TAG_STATUS)) & 0x000000ff ) >> 0)
+#define GET_RX_MOUNT (((REG32(ADR_TAG_STATUS)) & 0x0000ff00 ) >> 8)
+#define GET_AVA_TAG (((REG32(ADR_TAG_STATUS)) & 0x01ff0000 ) >> 16)
+#define GET_PKTBUF_FULL (((REG32(ADR_TAG_STATUS)) & 0x80000000 ) >> 31)
+#define GET_DMN_NOHIT_MCU (((REG32(ADR_DMN_MCU_STATUS)) & 0x00000001 ) >> 0)
+#define GET_DMN_MCU_FLAG (((REG32(ADR_DMN_MCU_STATUS)) & 0x00000002 ) >> 1)
+#define GET_DMN_MCU_WR (((REG32(ADR_DMN_MCU_STATUS)) & 0x00000008 ) >> 3)
+#define GET_DMN_MCU_PORT (((REG32(ADR_DMN_MCU_STATUS)) & 0x000000f0 ) >> 4)
+#define GET_DMN_MCU_ID (((REG32(ADR_DMN_MCU_STATUS)) & 0x00007f00 ) >> 8)
+#define GET_DMN_MCU_ADDR (((REG32(ADR_DMN_MCU_STATUS)) & 0xffff0000 ) >> 16)
+#define GET_MB_IDTBL_31_0 (((REG32(ADR_MB_IDTBL_0_STATUS)) & 0xffffffff ) >> 0)
+#define GET_MB_IDTBL_63_32 (((REG32(ADR_MB_IDTBL_1_STATUS)) & 0xffffffff ) >> 0)
+#define GET_MB_IDTBL_95_64 (((REG32(ADR_MB_IDTBL_2_STATUS)) & 0xffffffff ) >> 0)
+#define GET_MB_IDTBL_127_96 (((REG32(ADR_MB_IDTBL_3_STATUS)) & 0xffffffff ) >> 0)
+#define GET_PKT_IDTBL_31_0 (((REG32(ADR_PKT_IDTBL_0_STATUS)) & 0xffffffff ) >> 0)
+#define GET_PKT_IDTBL_63_32 (((REG32(ADR_PKT_IDTBL_1_STATUS)) & 0xffffffff ) >> 0)
+#define GET_PKT_IDTBL_95_64 (((REG32(ADR_PKT_IDTBL_2_STATUS)) & 0xffffffff ) >> 0)
+#define GET_PKT_IDTBL_127_96 (((REG32(ADR_PKT_IDTBL_3_STATUS)) & 0xffffffff ) >> 0)
+#define GET_DMN_IDTBL_31_0 (((REG32(ADR_DMN_IDTBL_0_STATUS)) & 0xffffffff ) >> 0)
+#define GET_DMN_IDTBL_63_32 (((REG32(ADR_DMN_IDTBL_1_STATUS)) & 0xffffffff ) >> 0)
+#define GET_DMN_IDTBL_95_64 (((REG32(ADR_DMN_IDTBL_2_STATUS)) & 0xffffffff ) >> 0)
+#define GET_DMN_IDTBL_127_96 (((REG32(ADR_DMN_IDTBL_3_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_MB_ID_31_0 (((REG32(ADR_MB_NEQID_0_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_MB_ID_63_32 (((REG32(ADR_MB_NEQID_1_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_MB_ID_95_64 (((REG32(ADR_MB_NEQID_2_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_MB_ID_127_96 (((REG32(ADR_MB_NEQID_3_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_PKT_ID_31_0 (((REG32(ADR_PKT_NEQID_0_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_PKT_ID_63_32 (((REG32(ADR_PKT_NEQID_1_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_PKT_ID_95_64 (((REG32(ADR_PKT_NEQID_2_STATUS)) & 0xffffffff ) >> 0)
+#define GET_NEQ_PKT_ID_127_96 (((REG32(ADR_PKT_NEQID_3_STATUS)) & 0xffffffff ) >> 0)
+#define GET_ALC_NOCHG_ID (((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0x0000007f ) >> 0)
+#define GET_ALC_NOCHG_INT (((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0x00008000 ) >> 15)
+#define GET_NEQ_PKT_FLAG (((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0x00010000 ) >> 16)
+#define GET_NEQ_MB_FLAG (((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0x01000000 ) >> 24)
+#define GET_SRAM_TAG_0 (((REG32(ADR_TAG_SRAM0_F_STATUS_0)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_1 (((REG32(ADR_TAG_SRAM0_F_STATUS_0)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_2 (((REG32(ADR_TAG_SRAM0_F_STATUS_1)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_3 (((REG32(ADR_TAG_SRAM0_F_STATUS_1)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_4 (((REG32(ADR_TAG_SRAM0_F_STATUS_2)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_5 (((REG32(ADR_TAG_SRAM0_F_STATUS_2)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_6 (((REG32(ADR_TAG_SRAM0_F_STATUS_3)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_7 (((REG32(ADR_TAG_SRAM0_F_STATUS_3)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_8 (((REG32(ADR_TAG_SRAM0_F_STATUS_4)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_9 (((REG32(ADR_TAG_SRAM0_F_STATUS_4)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_10 (((REG32(ADR_TAG_SRAM0_F_STATUS_5)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_11 (((REG32(ADR_TAG_SRAM0_F_STATUS_5)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_12 (((REG32(ADR_TAG_SRAM0_F_STATUS_6)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_13 (((REG32(ADR_TAG_SRAM0_F_STATUS_6)) & 0xffff0000 ) >> 16)
+#define GET_SRAM_TAG_14 (((REG32(ADR_TAG_SRAM0_F_STATUS_7)) & 0x0000ffff ) >> 0)
+#define GET_SRAM_TAG_15 (((REG32(ADR_TAG_SRAM0_F_STATUS_7)) & 0xffff0000 ) >> 16)
+#define SET_MCU_ENABLE(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 0) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffffe))
+#define SET_MAC_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 1) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffffd))
+#define SET_MCU_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 2) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffffb))
+#define SET_SDIO_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 3) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffff7))
+#define SET_SPI_SLV_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 4) | ((REG32(ADR_BRG_SW_RST)) & 0xffffffef))
+#define SET_UART_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 5) | ((REG32(ADR_BRG_SW_RST)) & 0xffffffdf))
+#define SET_DMA_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 6) | ((REG32(ADR_BRG_SW_RST)) & 0xffffffbf))
+#define SET_WDT_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 7) | ((REG32(ADR_BRG_SW_RST)) & 0xffffff7f))
+#define SET_I2C_SLV_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 8) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffeff))
+#define SET_INT_CTL_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 9) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffdff))
+#define SET_BTCX_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 10) | ((REG32(ADR_BRG_SW_RST)) & 0xfffffbff))
+#define SET_GPIO_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 11) | ((REG32(ADR_BRG_SW_RST)) & 0xfffff7ff))
+#define SET_US0TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 12) | ((REG32(ADR_BRG_SW_RST)) & 0xffffefff))
+#define SET_US1TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 13) | ((REG32(ADR_BRG_SW_RST)) & 0xffffdfff))
+#define SET_US2TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 14) | ((REG32(ADR_BRG_SW_RST)) & 0xffffbfff))
+#define SET_US3TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 15) | ((REG32(ADR_BRG_SW_RST)) & 0xffff7fff))
+#define SET_MS0TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 16) | ((REG32(ADR_BRG_SW_RST)) & 0xfffeffff))
+#define SET_MS1TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 17) | ((REG32(ADR_BRG_SW_RST)) & 0xfffdffff))
+#define SET_MS2TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 18) | ((REG32(ADR_BRG_SW_RST)) & 0xfffbffff))
+#define SET_MS3TMR_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 19) | ((REG32(ADR_BRG_SW_RST)) & 0xfff7ffff))
+#define SET_RF_BB_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 20) | ((REG32(ADR_BRG_SW_RST)) & 0xffefffff))
+#define SET_SYS_ALL_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 21) | ((REG32(ADR_BRG_SW_RST)) & 0xffdfffff))
+#define SET_DAT_UART_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 22) | ((REG32(ADR_BRG_SW_RST)) & 0xffbfffff))
+#define SET_I2C_MST_SW_RST(_VAL_) (REG32(ADR_BRG_SW_RST)) = (((_VAL_) << 23) | ((REG32(ADR_BRG_SW_RST)) & 0xff7fffff))
+#define SET_RG_REBOOT(_VAL_) (REG32(ADR_BOOT)) = (((_VAL_) << 0) | ((REG32(ADR_BOOT)) & 0xfffffffe))
+#define SET_TRAP_IMG_FLS(_VAL_) (REG32(ADR_BOOT)) = (((_VAL_) << 16) | ((REG32(ADR_BOOT)) & 0xfffeffff))
+#define SET_TRAP_REBOOT(_VAL_) (REG32(ADR_BOOT)) = (((_VAL_) << 17) | ((REG32(ADR_BOOT)) & 0xfffdffff))
+#define SET_TRAP_BOOT_FLS(_VAL_) (REG32(ADR_BOOT)) = (((_VAL_) << 18) | ((REG32(ADR_BOOT)) & 0xfffbffff))
+#define SET_CHIP_ID_31_0(_VAL_) (REG32(ADR_CHIP_ID_0)) = (((_VAL_) << 0) | ((REG32(ADR_CHIP_ID_0)) & 0x00000000))
+#define SET_CHIP_ID_63_32(_VAL_) (REG32(ADR_CHIP_ID_1)) = (((_VAL_) << 0) | ((REG32(ADR_CHIP_ID_1)) & 0x00000000))
+#define SET_CHIP_ID_95_64(_VAL_) (REG32(ADR_CHIP_ID_2)) = (((_VAL_) << 0) | ((REG32(ADR_CHIP_ID_2)) & 0x00000000))
+#define SET_CHIP_ID_127_96(_VAL_) (REG32(ADR_CHIP_ID_3)) = (((_VAL_) << 0) | ((REG32(ADR_CHIP_ID_3)) & 0x00000000))
+#define SET_CK_SEL_1_0(_VAL_) (REG32(ADR_CLOCK_SELECTION)) = (((_VAL_) << 0) | ((REG32(ADR_CLOCK_SELECTION)) & 0xfffffffc))
+#define SET_CK_SEL_2(_VAL_) (REG32(ADR_CLOCK_SELECTION)) = (((_VAL_) << 2) | ((REG32(ADR_CLOCK_SELECTION)) & 0xfffffffb))
+#define SET_SYS_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 0) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffffe))
+#define SET_MAC_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 1) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffffd))
+#define SET_MCU_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 2) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffffb))
+#define SET_SDIO_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 3) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffff7))
+#define SET_SPI_SLV_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 4) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffffef))
+#define SET_UART_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 5) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffffdf))
+#define SET_DMA_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 6) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffffbf))
+#define SET_WDT_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 7) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffff7f))
+#define SET_I2C_SLV_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 8) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffeff))
+#define SET_INT_CTL_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 9) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffdff))
+#define SET_BTCX_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 10) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffffbff))
+#define SET_GPIO_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 11) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffff7ff))
+#define SET_US0TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 12) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffefff))
+#define SET_US1TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 13) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffdfff))
+#define SET_US2TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 14) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffffbfff))
+#define SET_US3TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 15) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffff7fff))
+#define SET_MS0TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 16) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffeffff))
+#define SET_MS1TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 17) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffdffff))
+#define SET_MS2TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 18) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfffbffff))
+#define SET_MS3TMR_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 19) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xfff7ffff))
+#define SET_BIST_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 20) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xffefffff))
+#define SET_I2C_MST_CLK_EN(_VAL_) (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (((_VAL_) << 23) | ((REG32(ADR_PLATFORM_CLOCK_ENABLE)) & 0xff7fffff))
+#define SET_BTCX_CSR_CLK_EN(_VAL_) (REG32(ADR_SYS_CSR_CLOCK_ENABLE)) = (((_VAL_) << 10) | ((REG32(ADR_SYS_CSR_CLOCK_ENABLE)) & 0xfffffbff))
+#define SET_MCU_DBG_SEL(_VAL_) (REG32(ADR_MCU_DBG_SEL)) = (((_VAL_) << 0) | ((REG32(ADR_MCU_DBG_SEL)) & 0xffffffc0))
+#define SET_MCU_STOP_NOGRANT(_VAL_) (REG32(ADR_MCU_DBG_SEL)) = (((_VAL_) << 8) | ((REG32(ADR_MCU_DBG_SEL)) & 0xfffffeff))
+#define SET_MCU_STOP_ANYTIME(_VAL_) (REG32(ADR_MCU_DBG_SEL)) = (((_VAL_) << 9) | ((REG32(ADR_MCU_DBG_SEL)) & 0xfffffdff))
+#define SET_MCU_DBG_DATA(_VAL_) (REG32(ADR_MCU_DBG_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_MCU_DBG_DATA)) & 0x00000000))
+#define SET_AHB_SW_RST(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xfffffffe))
+#define SET_AHB_ERR_RST(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xfffffffd))
+#define SET_REG_AHB_DEBUG_MX(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 4) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xffffffcf))
+#define SET_REG_PKT_W_NBRT(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xfffffeff))
+#define SET_REG_PKT_R_NBRT(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 9) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xfffffdff))
+#define SET_IQ_SRAM_SEL_0(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 12) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xffffefff))
+#define SET_IQ_SRAM_SEL_1(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 13) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xffffdfff))
+#define SET_IQ_SRAM_SEL_2(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 14) | ((REG32(ADR_AHB_BRG_STATUS)) & 0xffffbfff))
+#define SET_AHB_STATUS(_VAL_) (REG32(ADR_AHB_BRG_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_AHB_BRG_STATUS)) & 0x0000ffff))
+#define SET_PARALLEL_DR(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xfffffffe))
+#define SET_MBRUN(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 4) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xffffffef))
+#define SET_SHIFT_DR(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xfffffeff))
+#define SET_MODE_REG_SI(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 9) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xfffffdff))
+#define SET_SIMULATION_MODE(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 10) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xfffffbff))
+#define SET_DBIST_MODE(_VAL_) (REG32(ADR_BIST_BIST_CTRL)) = (((_VAL_) << 11) | ((REG32(ADR_BIST_BIST_CTRL)) & 0xfffff7ff))
+#define SET_MODE_REG_IN(_VAL_) (REG32(ADR_BIST_MODE_REG_IN)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MODE_REG_IN)) & 0xffe00000))
+#define SET_MODE_REG_OUT_MCU(_VAL_) (REG32(ADR_BIST_MODE_REG_OUT)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MODE_REG_OUT)) & 0xffe00000))
+#define SET_MODE_REG_SO_MCU(_VAL_) (REG32(ADR_BIST_MODE_REG_OUT)) = (((_VAL_) << 31) | ((REG32(ADR_BIST_MODE_REG_OUT)) & 0x7fffffff))
+#define SET_MONITOR_BUS_MCU_31_0(_VAL_) (REG32(ADR_BIST_MONITOR_BUS_LSB)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MONITOR_BUS_LSB)) & 0x00000000))
+#define SET_MONITOR_BUS_MCU_33_32(_VAL_) (REG32(ADR_BIST_MONITOR_BUS_MSB)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MONITOR_BUS_MSB)) & 0xfffffffc))
+#define SET_TB_ADR_SEL(_VAL_) (REG32(ADR_TB_ADR_SEL)) = (((_VAL_) << 0) | ((REG32(ADR_TB_ADR_SEL)) & 0xffff0000))
+#define SET_TB_CS(_VAL_) (REG32(ADR_TB_ADR_SEL)) = (((_VAL_) << 31) | ((REG32(ADR_TB_ADR_SEL)) & 0x7fffffff))
+#define SET_TB_RDATA(_VAL_) (REG32(ADR_TB_RDATA)) = (((_VAL_) << 0) | ((REG32(ADR_TB_RDATA)) & 0x00000000))
+#define SET_UART_W2B_EN(_VAL_) (REG32(ADR_UART_W2B)) = (((_VAL_) << 0) | ((REG32(ADR_UART_W2B)) & 0xfffffffe))
+#define SET_DATA_UART_W2B_EN(_VAL_) (REG32(ADR_UART_W2B)) = (((_VAL_) << 4) | ((REG32(ADR_UART_W2B)) & 0xffffffef))
+#define SET_AHB_ILL_ADDR(_VAL_) (REG32(ADR_AHB_ILL_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_AHB_ILL_ADDR)) & 0x00000000))
+#define SET_AHB_FEN_ADDR(_VAL_) (REG32(ADR_AHB_FEN_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_AHB_FEN_ADDR)) & 0x00000000))
+#define SET_ILL_ADDR_CLR(_VAL_) (REG32(ADR_AHB_ILLFEN_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_AHB_ILLFEN_STATUS)) & 0xfffffffe))
+#define SET_FENCE_HIT_CLR(_VAL_) (REG32(ADR_AHB_ILLFEN_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_AHB_ILLFEN_STATUS)) & 0xfffffffd))
+#define SET_ILL_ADDR_INT(_VAL_) (REG32(ADR_AHB_ILLFEN_STATUS)) = (((_VAL_) << 4) | ((REG32(ADR_AHB_ILLFEN_STATUS)) & 0xffffffef))
+#define SET_FENCE_HIT_INT(_VAL_) (REG32(ADR_AHB_ILLFEN_STATUS)) = (((_VAL_) << 5) | ((REG32(ADR_AHB_ILLFEN_STATUS)) & 0xffffffdf))
+#define SET_PWM_INI_VALUE_P_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 0) | ((REG32(ADR_PWM_A)) & 0xffffff00))
+#define SET_PWM_INI_VALUE_N_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 8) | ((REG32(ADR_PWM_A)) & 0xffff00ff))
+#define SET_PWM_POST_SCALER_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 16) | ((REG32(ADR_PWM_A)) & 0xfff0ffff))
+#define SET_PWM_ALWAYSON_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 29) | ((REG32(ADR_PWM_A)) & 0xdfffffff))
+#define SET_PWM_INVERT_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 30) | ((REG32(ADR_PWM_A)) & 0xbfffffff))
+#define SET_PWM_ENABLE_A(_VAL_) (REG32(ADR_PWM_A)) = (((_VAL_) << 31) | ((REG32(ADR_PWM_A)) & 0x7fffffff))
+#define SET_PWM_INI_VALUE_P_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 0) | ((REG32(ADR_PWM_B)) & 0xffffff00))
+#define SET_PWM_INI_VALUE_N_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 8) | ((REG32(ADR_PWM_B)) & 0xffff00ff))
+#define SET_PWM_POST_SCALER_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 16) | ((REG32(ADR_PWM_B)) & 0xfff0ffff))
+#define SET_PWM_ALWAYSON_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 29) | ((REG32(ADR_PWM_B)) & 0xdfffffff))
+#define SET_PWM_INVERT_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 30) | ((REG32(ADR_PWM_B)) & 0xbfffffff))
+#define SET_PWM_ENABLE_B(_VAL_) (REG32(ADR_PWM_B)) = (((_VAL_) << 31) | ((REG32(ADR_PWM_B)) & 0x7fffffff))
+#define SET_HBUSREQ_LOCK(_VAL_) (REG32(ADR_HBUSREQ_LOCK)) = (((_VAL_) << 0) | ((REG32(ADR_HBUSREQ_LOCK)) & 0xffffe000))
+#define SET_HBURST_LOCK(_VAL_) (REG32(ADR_HBURST_LOCK)) = (((_VAL_) << 0) | ((REG32(ADR_HBURST_LOCK)) & 0xffffe000))
+#define SET_PRESCALER_USTIMER(_VAL_) (REG32(ADR_PRESCALER_USTIMER)) = (((_VAL_) << 0) | ((REG32(ADR_PRESCALER_USTIMER)) & 0xfffffe00))
+#define SET_MODE_REG_IN_MMU(_VAL_) (REG32(ADR_BIST_MODE_REG_IN_MMU)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MODE_REG_IN_MMU)) & 0xffff0000))
+#define SET_MODE_REG_OUT_MMU(_VAL_) (REG32(ADR_BIST_MODE_REG_OUT_MMU)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MODE_REG_OUT_MMU)) & 0xffff0000))
+#define SET_MODE_REG_SO_MMU(_VAL_) (REG32(ADR_BIST_MODE_REG_OUT_MMU)) = (((_VAL_) << 31) | ((REG32(ADR_BIST_MODE_REG_OUT_MMU)) & 0x7fffffff))
+#define SET_MONITOR_BUS_MMU(_VAL_) (REG32(ADR_BIST_MONITOR_BUS_MMU)) = (((_VAL_) << 0) | ((REG32(ADR_BIST_MONITOR_BUS_MMU)) & 0xfff80000))
+#define SET_TEST_MODE0(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_TEST_MODE)) & 0xfffffffe))
+#define SET_TEST_MODE1(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 1) | ((REG32(ADR_TEST_MODE)) & 0xfffffffd))
+#define SET_TEST_MODE2(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 2) | ((REG32(ADR_TEST_MODE)) & 0xfffffffb))
+#define SET_TEST_MODE3(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 3) | ((REG32(ADR_TEST_MODE)) & 0xfffffff7))
+#define SET_TEST_MODE4(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 4) | ((REG32(ADR_TEST_MODE)) & 0xffffffef))
+#define SET_TEST_MODE_ALL(_VAL_) (REG32(ADR_TEST_MODE)) = (((_VAL_) << 5) | ((REG32(ADR_TEST_MODE)) & 0xffffffdf))
+#define SET_WDT_INIT(_VAL_) (REG32(ADR_BOOT_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_BOOT_INFO)) & 0xfffffffe))
+#define SET_SD_HOST_INIT(_VAL_) (REG32(ADR_BOOT_INFO)) = (((_VAL_) << 1) | ((REG32(ADR_BOOT_INFO)) & 0xfffffffd))
+#define SET_ALLOW_SD_RESET(_VAL_) (REG32(ADR_SD_INIT_CFG)) = (((_VAL_) << 0) | ((REG32(ADR_SD_INIT_CFG)) & 0xfffffffe))
+#define SET_UART_NRTS(_VAL_) (REG32(ADR_SPARE_UART_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_SPARE_UART_INFO)) & 0xfffffffe))
+#define SET_UART_NCTS(_VAL_) (REG32(ADR_SPARE_UART_INFO)) = (((_VAL_) << 1) | ((REG32(ADR_SPARE_UART_INFO)) & 0xfffffffd))
+#define SET_TU0_TM_INIT_VALUE(_VAL_) (REG32(ADR_TU0_MICROSECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0xffff0000))
+#define SET_TU0_TM_MODE(_VAL_) (REG32(ADR_TU0_MICROSECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0xfffeffff))
+#define SET_TU0_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TU0_MICROSECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0xfffdffff))
+#define SET_TU0_TM_INT_MASK(_VAL_) (REG32(ADR_TU0_MICROSECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TU0_MICROSECOND_TIMER)) & 0xfffbffff))
+#define SET_TU0_TM_CUR_VALUE(_VAL_) (REG32(ADR_TU0_CURRENT_MICROSECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TU0_CURRENT_MICROSECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TU1_TM_INIT_VALUE(_VAL_) (REG32(ADR_TU1_MICROSECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0xffff0000))
+#define SET_TU1_TM_MODE(_VAL_) (REG32(ADR_TU1_MICROSECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0xfffeffff))
+#define SET_TU1_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TU1_MICROSECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0xfffdffff))
+#define SET_TU1_TM_INT_MASK(_VAL_) (REG32(ADR_TU1_MICROSECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TU1_MICROSECOND_TIMER)) & 0xfffbffff))
+#define SET_TU1_TM_CUR_VALUE(_VAL_) (REG32(ADR_TU1_CURRENT_MICROSECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TU1_CURRENT_MICROSECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TU2_TM_INIT_VALUE(_VAL_) (REG32(ADR_TU2_MICROSECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0xffff0000))
+#define SET_TU2_TM_MODE(_VAL_) (REG32(ADR_TU2_MICROSECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0xfffeffff))
+#define SET_TU2_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TU2_MICROSECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0xfffdffff))
+#define SET_TU2_TM_INT_MASK(_VAL_) (REG32(ADR_TU2_MICROSECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TU2_MICROSECOND_TIMER)) & 0xfffbffff))
+#define SET_TU2_TM_CUR_VALUE(_VAL_) (REG32(ADR_TU2_CURRENT_MICROSECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TU2_CURRENT_MICROSECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TU3_TM_INIT_VALUE(_VAL_) (REG32(ADR_TU3_MICROSECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0xffff0000))
+#define SET_TU3_TM_MODE(_VAL_) (REG32(ADR_TU3_MICROSECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0xfffeffff))
+#define SET_TU3_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TU3_MICROSECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0xfffdffff))
+#define SET_TU3_TM_INT_MASK(_VAL_) (REG32(ADR_TU3_MICROSECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TU3_MICROSECOND_TIMER)) & 0xfffbffff))
+#define SET_TU3_TM_CUR_VALUE(_VAL_) (REG32(ADR_TU3_CURRENT_MICROSECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TU3_CURRENT_MICROSECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TM0_TM_INIT_VALUE(_VAL_) (REG32(ADR_TM0_MILISECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TM0_MILISECOND_TIMER)) & 0xffff0000))
+#define SET_TM0_TM_MODE(_VAL_) (REG32(ADR_TM0_MILISECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TM0_MILISECOND_TIMER)) & 0xfffeffff))
+#define SET_TM0_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TM0_MILISECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TM0_MILISECOND_TIMER)) & 0xfffdffff))
+#define SET_TM0_TM_INT_MASK(_VAL_) (REG32(ADR_TM0_MILISECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TM0_MILISECOND_TIMER)) & 0xfffbffff))
+#define SET_TM0_TM_CUR_VALUE(_VAL_) (REG32(ADR_TM0_CURRENT_MILISECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TM0_CURRENT_MILISECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TM1_TM_INIT_VALUE(_VAL_) (REG32(ADR_TM1_MILISECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TM1_MILISECOND_TIMER)) & 0xffff0000))
+#define SET_TM1_TM_MODE(_VAL_) (REG32(ADR_TM1_MILISECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TM1_MILISECOND_TIMER)) & 0xfffeffff))
+#define SET_TM1_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TM1_MILISECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TM1_MILISECOND_TIMER)) & 0xfffdffff))
+#define SET_TM1_TM_INT_MASK(_VAL_) (REG32(ADR_TM1_MILISECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TM1_MILISECOND_TIMER)) & 0xfffbffff))
+#define SET_TM1_TM_CUR_VALUE(_VAL_) (REG32(ADR_TM1_CURRENT_MILISECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TM1_CURRENT_MILISECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TM2_TM_INIT_VALUE(_VAL_) (REG32(ADR_TM2_MILISECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TM2_MILISECOND_TIMER)) & 0xffff0000))
+#define SET_TM2_TM_MODE(_VAL_) (REG32(ADR_TM2_MILISECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TM2_MILISECOND_TIMER)) & 0xfffeffff))
+#define SET_TM2_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TM2_MILISECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TM2_MILISECOND_TIMER)) & 0xfffdffff))
+#define SET_TM2_TM_INT_MASK(_VAL_) (REG32(ADR_TM2_MILISECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TM2_MILISECOND_TIMER)) & 0xfffbffff))
+#define SET_TM2_TM_CUR_VALUE(_VAL_) (REG32(ADR_TM2_CURRENT_MILISECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TM2_CURRENT_MILISECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_TM3_TM_INIT_VALUE(_VAL_) (REG32(ADR_TM3_MILISECOND_TIMER)) = (((_VAL_) << 0) | ((REG32(ADR_TM3_MILISECOND_TIMER)) & 0xffff0000))
+#define SET_TM3_TM_MODE(_VAL_) (REG32(ADR_TM3_MILISECOND_TIMER)) = (((_VAL_) << 16) | ((REG32(ADR_TM3_MILISECOND_TIMER)) & 0xfffeffff))
+#define SET_TM3_TM_INT_STS_DONE(_VAL_) (REG32(ADR_TM3_MILISECOND_TIMER)) = (((_VAL_) << 17) | ((REG32(ADR_TM3_MILISECOND_TIMER)) & 0xfffdffff))
+#define SET_TM3_TM_INT_MASK(_VAL_) (REG32(ADR_TM3_MILISECOND_TIMER)) = (((_VAL_) << 18) | ((REG32(ADR_TM3_MILISECOND_TIMER)) & 0xfffbffff))
+#define SET_TM3_TM_CUR_VALUE(_VAL_) (REG32(ADR_TM3_CURRENT_MILISECOND_TIME_VALUE)) = (((_VAL_) << 0) | ((REG32(ADR_TM3_CURRENT_MILISECOND_TIME_VALUE)) & 0xffff0000))
+#define SET_MCU_WDT_TIME_CNT(_VAL_) (REG32(ADR_MCU_WDOG_REG)) = (((_VAL_) << 0) | ((REG32(ADR_MCU_WDOG_REG)) & 0xffff0000))
+#define SET_MCU_WDT_STATUS(_VAL_) (REG32(ADR_MCU_WDOG_REG)) = (((_VAL_) << 17) | ((REG32(ADR_MCU_WDOG_REG)) & 0xfffdffff))
+#define SET_MCU_WDOG_ENA(_VAL_) (REG32(ADR_MCU_WDOG_REG)) = (((_VAL_) << 31) | ((REG32(ADR_MCU_WDOG_REG)) & 0x7fffffff))
+#define SET_SYS_WDT_TIME_CNT(_VAL_) (REG32(ADR_SYS_WDOG_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SYS_WDOG_REG)) & 0xffff0000))
+#define SET_SYS_WDT_STATUS(_VAL_) (REG32(ADR_SYS_WDOG_REG)) = (((_VAL_) << 17) | ((REG32(ADR_SYS_WDOG_REG)) & 0xfffdffff))
+#define SET_SYS_WDOG_ENA(_VAL_) (REG32(ADR_SYS_WDOG_REG)) = (((_VAL_) << 31) | ((REG32(ADR_SYS_WDOG_REG)) & 0x7fffffff))
+#define SET_XLNA_EN_O_OE(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 0) | ((REG32(ADR_PAD6)) & 0xfffffffe))
+#define SET_XLNA_EN_O_PE(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 1) | ((REG32(ADR_PAD6)) & 0xfffffffd))
+#define SET_PAD6_IE(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 3) | ((REG32(ADR_PAD6)) & 0xfffffff7))
+#define SET_PAD6_SEL_I(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 4) | ((REG32(ADR_PAD6)) & 0xffffffcf))
+#define SET_PAD6_OD(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 8) | ((REG32(ADR_PAD6)) & 0xfffffeff))
+#define SET_PAD6_SEL_O(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 12) | ((REG32(ADR_PAD6)) & 0xffffefff))
+#define SET_XLNA_EN_O_C(_VAL_) (REG32(ADR_PAD6)) = (((_VAL_) << 28) | ((REG32(ADR_PAD6)) & 0xefffffff))
+#define SET_WIFI_TX_SW_O_OE(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 0) | ((REG32(ADR_PAD7)) & 0xfffffffe))
+#define SET_WIFI_TX_SW_O_PE(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 1) | ((REG32(ADR_PAD7)) & 0xfffffffd))
+#define SET_PAD7_IE(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 3) | ((REG32(ADR_PAD7)) & 0xfffffff7))
+#define SET_PAD7_SEL_I(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 4) | ((REG32(ADR_PAD7)) & 0xffffffcf))
+#define SET_PAD7_OD(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 8) | ((REG32(ADR_PAD7)) & 0xfffffeff))
+#define SET_PAD7_SEL_O(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 12) | ((REG32(ADR_PAD7)) & 0xffffefff))
+#define SET_WIFI_TX_SW_O_C(_VAL_) (REG32(ADR_PAD7)) = (((_VAL_) << 28) | ((REG32(ADR_PAD7)) & 0xefffffff))
+#define SET_WIFI_RX_SW_O_OE(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 0) | ((REG32(ADR_PAD8)) & 0xfffffffe))
+#define SET_WIFI_RX_SW_O_PE(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 1) | ((REG32(ADR_PAD8)) & 0xfffffffd))
+#define SET_PAD8_IE(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 3) | ((REG32(ADR_PAD8)) & 0xfffffff7))
+#define SET_PAD8_SEL_I(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 4) | ((REG32(ADR_PAD8)) & 0xffffffcf))
+#define SET_PAD8_OD(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 8) | ((REG32(ADR_PAD8)) & 0xfffffeff))
+#define SET_WIFI_RX_SW_O_C(_VAL_) (REG32(ADR_PAD8)) = (((_VAL_) << 28) | ((REG32(ADR_PAD8)) & 0xefffffff))
+#define SET_BT_SW_O_OE(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 0) | ((REG32(ADR_PAD9)) & 0xfffffffe))
+#define SET_BT_SW_O_PE(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 1) | ((REG32(ADR_PAD9)) & 0xfffffffd))
+#define SET_PAD9_IE(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 3) | ((REG32(ADR_PAD9)) & 0xfffffff7))
+#define SET_PAD9_SEL_I(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 4) | ((REG32(ADR_PAD9)) & 0xffffffcf))
+#define SET_PAD9_OD(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 8) | ((REG32(ADR_PAD9)) & 0xfffffeff))
+#define SET_PAD9_SEL_O(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 12) | ((REG32(ADR_PAD9)) & 0xffffefff))
+#define SET_BT_SW_O_C(_VAL_) (REG32(ADR_PAD9)) = (((_VAL_) << 28) | ((REG32(ADR_PAD9)) & 0xefffffff))
+#define SET_XPA_EN_O_OE(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 0) | ((REG32(ADR_PAD11)) & 0xfffffffe))
+#define SET_XPA_EN_O_PE(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 1) | ((REG32(ADR_PAD11)) & 0xfffffffd))
+#define SET_PAD11_IE(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 3) | ((REG32(ADR_PAD11)) & 0xfffffff7))
+#define SET_PAD11_SEL_I(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 4) | ((REG32(ADR_PAD11)) & 0xffffffcf))
+#define SET_PAD11_OD(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 8) | ((REG32(ADR_PAD11)) & 0xfffffeff))
+#define SET_PAD11_SEL_O(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 12) | ((REG32(ADR_PAD11)) & 0xffffefff))
+#define SET_XPA_EN_O_C(_VAL_) (REG32(ADR_PAD11)) = (((_VAL_) << 28) | ((REG32(ADR_PAD11)) & 0xefffffff))
+#define SET_PAD15_OE(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 0) | ((REG32(ADR_PAD15)) & 0xfffffffe))
+#define SET_PAD15_PE(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 1) | ((REG32(ADR_PAD15)) & 0xfffffffd))
+#define SET_PAD15_DS(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 2) | ((REG32(ADR_PAD15)) & 0xfffffffb))
+#define SET_PAD15_IE(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 3) | ((REG32(ADR_PAD15)) & 0xfffffff7))
+#define SET_PAD15_SEL_I(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 4) | ((REG32(ADR_PAD15)) & 0xffffffcf))
+#define SET_PAD15_OD(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 8) | ((REG32(ADR_PAD15)) & 0xfffffeff))
+#define SET_PAD15_SEL_O(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 12) | ((REG32(ADR_PAD15)) & 0xffffefff))
+#define SET_TEST_1_ID(_VAL_) (REG32(ADR_PAD15)) = (((_VAL_) << 28) | ((REG32(ADR_PAD15)) & 0xefffffff))
+#define SET_PAD16_OE(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 0) | ((REG32(ADR_PAD16)) & 0xfffffffe))
+#define SET_PAD16_PE(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 1) | ((REG32(ADR_PAD16)) & 0xfffffffd))
+#define SET_PAD16_DS(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 2) | ((REG32(ADR_PAD16)) & 0xfffffffb))
+#define SET_PAD16_IE(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 3) | ((REG32(ADR_PAD16)) & 0xfffffff7))
+#define SET_PAD16_SEL_I(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 4) | ((REG32(ADR_PAD16)) & 0xffffffcf))
+#define SET_PAD16_OD(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 8) | ((REG32(ADR_PAD16)) & 0xfffffeff))
+#define SET_PAD16_SEL_O(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 12) | ((REG32(ADR_PAD16)) & 0xffffefff))
+#define SET_TEST_2_ID(_VAL_) (REG32(ADR_PAD16)) = (((_VAL_) << 28) | ((REG32(ADR_PAD16)) & 0xefffffff))
+#define SET_PAD17_OE(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 0) | ((REG32(ADR_PAD17)) & 0xfffffffe))
+#define SET_PAD17_PE(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 1) | ((REG32(ADR_PAD17)) & 0xfffffffd))
+#define SET_PAD17_DS(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 2) | ((REG32(ADR_PAD17)) & 0xfffffffb))
+#define SET_PAD17_IE(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 3) | ((REG32(ADR_PAD17)) & 0xfffffff7))
+#define SET_PAD17_SEL_I(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 4) | ((REG32(ADR_PAD17)) & 0xffffffcf))
+#define SET_PAD17_OD(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 8) | ((REG32(ADR_PAD17)) & 0xfffffeff))
+#define SET_PAD17_SEL_O(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 12) | ((REG32(ADR_PAD17)) & 0xffffefff))
+#define SET_TEST_3_ID(_VAL_) (REG32(ADR_PAD17)) = (((_VAL_) << 28) | ((REG32(ADR_PAD17)) & 0xefffffff))
+#define SET_PAD18_OE(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 0) | ((REG32(ADR_PAD18)) & 0xfffffffe))
+#define SET_PAD18_PE(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 1) | ((REG32(ADR_PAD18)) & 0xfffffffd))
+#define SET_PAD18_DS(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 2) | ((REG32(ADR_PAD18)) & 0xfffffffb))
+#define SET_PAD18_IE(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 3) | ((REG32(ADR_PAD18)) & 0xfffffff7))
+#define SET_PAD18_SEL_I(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 4) | ((REG32(ADR_PAD18)) & 0xffffffcf))
+#define SET_PAD18_OD(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 8) | ((REG32(ADR_PAD18)) & 0xfffffeff))
+#define SET_PAD18_SEL_O(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 12) | ((REG32(ADR_PAD18)) & 0xffffcfff))
+#define SET_TEST_4_ID(_VAL_) (REG32(ADR_PAD18)) = (((_VAL_) << 28) | ((REG32(ADR_PAD18)) & 0xefffffff))
+#define SET_PAD19_OE(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 0) | ((REG32(ADR_PAD19)) & 0xfffffffe))
+#define SET_PAD19_PE(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 1) | ((REG32(ADR_PAD19)) & 0xfffffffd))
+#define SET_PAD19_DS(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 2) | ((REG32(ADR_PAD19)) & 0xfffffffb))
+#define SET_PAD19_IE(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 3) | ((REG32(ADR_PAD19)) & 0xfffffff7))
+#define SET_PAD19_SEL_I(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 4) | ((REG32(ADR_PAD19)) & 0xffffffcf))
+#define SET_PAD19_OD(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 8) | ((REG32(ADR_PAD19)) & 0xfffffeff))
+#define SET_PAD19_SEL_O(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 12) | ((REG32(ADR_PAD19)) & 0xffff8fff))
+#define SET_SHORT_TO_20_ID(_VAL_) (REG32(ADR_PAD19)) = (((_VAL_) << 28) | ((REG32(ADR_PAD19)) & 0xefffffff))
+#define SET_PAD20_OE(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 0) | ((REG32(ADR_PAD20)) & 0xfffffffe))
+#define SET_PAD20_PE(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 1) | ((REG32(ADR_PAD20)) & 0xfffffffd))
+#define SET_PAD20_DS(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 2) | ((REG32(ADR_PAD20)) & 0xfffffffb))
+#define SET_PAD20_IE(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 3) | ((REG32(ADR_PAD20)) & 0xfffffff7))
+#define SET_PAD20_SEL_I(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 4) | ((REG32(ADR_PAD20)) & 0xffffff0f))
+#define SET_PAD20_OD(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 8) | ((REG32(ADR_PAD20)) & 0xfffffeff))
+#define SET_PAD20_SEL_O(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 12) | ((REG32(ADR_PAD20)) & 0xffffcfff))
+#define SET_STRAP0(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 27) | ((REG32(ADR_PAD20)) & 0xf7ffffff))
+#define SET_GPIO_TEST_1_ID(_VAL_) (REG32(ADR_PAD20)) = (((_VAL_) << 28) | ((REG32(ADR_PAD20)) & 0xefffffff))
+#define SET_PAD21_OE(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 0) | ((REG32(ADR_PAD21)) & 0xfffffffe))
+#define SET_PAD21_PE(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 1) | ((REG32(ADR_PAD21)) & 0xfffffffd))
+#define SET_PAD21_DS(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 2) | ((REG32(ADR_PAD21)) & 0xfffffffb))
+#define SET_PAD21_IE(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 3) | ((REG32(ADR_PAD21)) & 0xfffffff7))
+#define SET_PAD21_SEL_I(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 4) | ((REG32(ADR_PAD21)) & 0xffffff8f))
+#define SET_PAD21_OD(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 8) | ((REG32(ADR_PAD21)) & 0xfffffeff))
+#define SET_PAD21_SEL_O(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 12) | ((REG32(ADR_PAD21)) & 0xffffcfff))
+#define SET_STRAP3(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 27) | ((REG32(ADR_PAD21)) & 0xf7ffffff))
+#define SET_GPIO_TEST_2_ID(_VAL_) (REG32(ADR_PAD21)) = (((_VAL_) << 28) | ((REG32(ADR_PAD21)) & 0xefffffff))
+#define SET_PAD22_OE(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 0) | ((REG32(ADR_PAD22)) & 0xfffffffe))
+#define SET_PAD22_PE(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 1) | ((REG32(ADR_PAD22)) & 0xfffffffd))
+#define SET_PAD22_DS(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 2) | ((REG32(ADR_PAD22)) & 0xfffffffb))
+#define SET_PAD22_IE(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 3) | ((REG32(ADR_PAD22)) & 0xfffffff7))
+#define SET_PAD22_SEL_I(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 4) | ((REG32(ADR_PAD22)) & 0xffffff8f))
+#define SET_PAD22_OD(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 8) | ((REG32(ADR_PAD22)) & 0xfffffeff))
+#define SET_PAD22_SEL_O(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 12) | ((REG32(ADR_PAD22)) & 0xffff8fff))
+#define SET_PAD22_SEL_OE(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 20) | ((REG32(ADR_PAD22)) & 0xffefffff))
+#define SET_GPIO_TEST_3_ID(_VAL_) (REG32(ADR_PAD22)) = (((_VAL_) << 28) | ((REG32(ADR_PAD22)) & 0xefffffff))
+#define SET_PAD24_OE(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 0) | ((REG32(ADR_PAD24)) & 0xfffffffe))
+#define SET_PAD24_PE(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 1) | ((REG32(ADR_PAD24)) & 0xfffffffd))
+#define SET_PAD24_DS(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 2) | ((REG32(ADR_PAD24)) & 0xfffffffb))
+#define SET_PAD24_IE(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 3) | ((REG32(ADR_PAD24)) & 0xfffffff7))
+#define SET_PAD24_SEL_I(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 4) | ((REG32(ADR_PAD24)) & 0xffffffcf))
+#define SET_PAD24_OD(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 8) | ((REG32(ADR_PAD24)) & 0xfffffeff))
+#define SET_PAD24_SEL_O(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 12) | ((REG32(ADR_PAD24)) & 0xffff8fff))
+#define SET_GPIO_TEST_4_ID(_VAL_) (REG32(ADR_PAD24)) = (((_VAL_) << 28) | ((REG32(ADR_PAD24)) & 0xefffffff))
+#define SET_PAD25_OE(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 0) | ((REG32(ADR_PAD25)) & 0xfffffffe))
+#define SET_PAD25_PE(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 1) | ((REG32(ADR_PAD25)) & 0xfffffffd))
+#define SET_PAD25_DS(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 2) | ((REG32(ADR_PAD25)) & 0xfffffffb))
+#define SET_PAD25_IE(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 3) | ((REG32(ADR_PAD25)) & 0xfffffff7))
+#define SET_PAD25_SEL_I(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 4) | ((REG32(ADR_PAD25)) & 0xffffff8f))
+#define SET_PAD25_OD(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 8) | ((REG32(ADR_PAD25)) & 0xfffffeff))
+#define SET_PAD25_SEL_O(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 12) | ((REG32(ADR_PAD25)) & 0xffff8fff))
+#define SET_PAD25_SEL_OE(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 20) | ((REG32(ADR_PAD25)) & 0xffefffff))
+#define SET_STRAP1(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 27) | ((REG32(ADR_PAD25)) & 0xf7ffffff))
+#define SET_GPIO_1_ID(_VAL_) (REG32(ADR_PAD25)) = (((_VAL_) << 28) | ((REG32(ADR_PAD25)) & 0xefffffff))
+#define SET_PAD27_OE(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 0) | ((REG32(ADR_PAD27)) & 0xfffffffe))
+#define SET_PAD27_PE(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 1) | ((REG32(ADR_PAD27)) & 0xfffffffd))
+#define SET_PAD27_DS(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 2) | ((REG32(ADR_PAD27)) & 0xfffffffb))
+#define SET_PAD27_IE(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 3) | ((REG32(ADR_PAD27)) & 0xfffffff7))
+#define SET_PAD27_SEL_I(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 4) | ((REG32(ADR_PAD27)) & 0xffffff8f))
+#define SET_PAD27_OD(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 8) | ((REG32(ADR_PAD27)) & 0xfffffeff))
+#define SET_PAD27_SEL_O(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 12) | ((REG32(ADR_PAD27)) & 0xffff8fff))
+#define SET_GPIO_2_ID(_VAL_) (REG32(ADR_PAD27)) = (((_VAL_) << 28) | ((REG32(ADR_PAD27)) & 0xefffffff))
+#define SET_PAD28_OE(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 0) | ((REG32(ADR_PAD28)) & 0xfffffffe))
+#define SET_PAD28_PE(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 1) | ((REG32(ADR_PAD28)) & 0xfffffffd))
+#define SET_PAD28_DS(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 2) | ((REG32(ADR_PAD28)) & 0xfffffffb))
+#define SET_PAD28_IE(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 3) | ((REG32(ADR_PAD28)) & 0xfffffff7))
+#define SET_PAD28_SEL_I(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 4) | ((REG32(ADR_PAD28)) & 0xffffff8f))
+#define SET_PAD28_OD(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 8) | ((REG32(ADR_PAD28)) & 0xfffffeff))
+#define SET_PAD28_SEL_O(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 12) | ((REG32(ADR_PAD28)) & 0xffff0fff))
+#define SET_PAD28_SEL_OE(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 20) | ((REG32(ADR_PAD28)) & 0xffefffff))
+#define SET_GPIO_3_ID(_VAL_) (REG32(ADR_PAD28)) = (((_VAL_) << 28) | ((REG32(ADR_PAD28)) & 0xefffffff))
+#define SET_PAD29_OE(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 0) | ((REG32(ADR_PAD29)) & 0xfffffffe))
+#define SET_PAD29_PE(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 1) | ((REG32(ADR_PAD29)) & 0xfffffffd))
+#define SET_PAD29_DS(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 2) | ((REG32(ADR_PAD29)) & 0xfffffffb))
+#define SET_PAD29_IE(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 3) | ((REG32(ADR_PAD29)) & 0xfffffff7))
+#define SET_PAD29_SEL_I(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 4) | ((REG32(ADR_PAD29)) & 0xffffff8f))
+#define SET_PAD29_OD(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 8) | ((REG32(ADR_PAD29)) & 0xfffffeff))
+#define SET_PAD29_SEL_O(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 12) | ((REG32(ADR_PAD29)) & 0xffff8fff))
+#define SET_GPIO_TEST_5_ID(_VAL_) (REG32(ADR_PAD29)) = (((_VAL_) << 28) | ((REG32(ADR_PAD29)) & 0xefffffff))
+#define SET_PAD30_OE(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 0) | ((REG32(ADR_PAD30)) & 0xfffffffe))
+#define SET_PAD30_PE(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 1) | ((REG32(ADR_PAD30)) & 0xfffffffd))
+#define SET_PAD30_DS(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 2) | ((REG32(ADR_PAD30)) & 0xfffffffb))
+#define SET_PAD30_IE(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 3) | ((REG32(ADR_PAD30)) & 0xfffffff7))
+#define SET_PAD30_SEL_I(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 4) | ((REG32(ADR_PAD30)) & 0xffffffcf))
+#define SET_PAD30_OD(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 8) | ((REG32(ADR_PAD30)) & 0xfffffeff))
+#define SET_PAD30_SEL_O(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 12) | ((REG32(ADR_PAD30)) & 0xffffcfff))
+#define SET_TEST_6_ID(_VAL_) (REG32(ADR_PAD30)) = (((_VAL_) << 28) | ((REG32(ADR_PAD30)) & 0xefffffff))
+#define SET_PAD31_OE(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 0) | ((REG32(ADR_PAD31)) & 0xfffffffe))
+#define SET_PAD31_PE(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 1) | ((REG32(ADR_PAD31)) & 0xfffffffd))
+#define SET_PAD31_DS(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 2) | ((REG32(ADR_PAD31)) & 0xfffffffb))
+#define SET_PAD31_IE(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 3) | ((REG32(ADR_PAD31)) & 0xfffffff7))
+#define SET_PAD31_SEL_I(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 4) | ((REG32(ADR_PAD31)) & 0xffffffcf))
+#define SET_PAD31_OD(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 8) | ((REG32(ADR_PAD31)) & 0xfffffeff))
+#define SET_PAD31_SEL_O(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 12) | ((REG32(ADR_PAD31)) & 0xffffcfff))
+#define SET_TEST_7_ID(_VAL_) (REG32(ADR_PAD31)) = (((_VAL_) << 28) | ((REG32(ADR_PAD31)) & 0xefffffff))
+#define SET_PAD32_OE(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 0) | ((REG32(ADR_PAD32)) & 0xfffffffe))
+#define SET_PAD32_PE(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 1) | ((REG32(ADR_PAD32)) & 0xfffffffd))
+#define SET_PAD32_DS(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 2) | ((REG32(ADR_PAD32)) & 0xfffffffb))
+#define SET_PAD32_IE(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 3) | ((REG32(ADR_PAD32)) & 0xfffffff7))
+#define SET_PAD32_SEL_I(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 4) | ((REG32(ADR_PAD32)) & 0xffffffcf))
+#define SET_PAD32_OD(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 8) | ((REG32(ADR_PAD32)) & 0xfffffeff))
+#define SET_PAD32_SEL_O(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 12) | ((REG32(ADR_PAD32)) & 0xffffcfff))
+#define SET_TEST_8_ID(_VAL_) (REG32(ADR_PAD32)) = (((_VAL_) << 28) | ((REG32(ADR_PAD32)) & 0xefffffff))
+#define SET_PAD33_OE(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 0) | ((REG32(ADR_PAD33)) & 0xfffffffe))
+#define SET_PAD33_PE(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 1) | ((REG32(ADR_PAD33)) & 0xfffffffd))
+#define SET_PAD33_DS(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 2) | ((REG32(ADR_PAD33)) & 0xfffffffb))
+#define SET_PAD33_IE(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 3) | ((REG32(ADR_PAD33)) & 0xfffffff7))
+#define SET_PAD33_SEL_I(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 4) | ((REG32(ADR_PAD33)) & 0xffffffcf))
+#define SET_PAD33_OD(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 8) | ((REG32(ADR_PAD33)) & 0xfffffeff))
+#define SET_PAD33_SEL_O(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 12) | ((REG32(ADR_PAD33)) & 0xffffcfff))
+#define SET_TEST_9_ID(_VAL_) (REG32(ADR_PAD33)) = (((_VAL_) << 28) | ((REG32(ADR_PAD33)) & 0xefffffff))
+#define SET_PAD34_OE(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 0) | ((REG32(ADR_PAD34)) & 0xfffffffe))
+#define SET_PAD34_PE(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 1) | ((REG32(ADR_PAD34)) & 0xfffffffd))
+#define SET_PAD34_DS(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 2) | ((REG32(ADR_PAD34)) & 0xfffffffb))
+#define SET_PAD34_IE(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 3) | ((REG32(ADR_PAD34)) & 0xfffffff7))
+#define SET_PAD34_SEL_I(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 4) | ((REG32(ADR_PAD34)) & 0xffffffcf))
+#define SET_PAD34_OD(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 8) | ((REG32(ADR_PAD34)) & 0xfffffeff))
+#define SET_PAD34_SEL_O(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 12) | ((REG32(ADR_PAD34)) & 0xffffcfff))
+#define SET_TEST_10_ID(_VAL_) (REG32(ADR_PAD34)) = (((_VAL_) << 28) | ((REG32(ADR_PAD34)) & 0xefffffff))
+#define SET_PAD42_OE(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 0) | ((REG32(ADR_PAD42)) & 0xfffffffe))
+#define SET_PAD42_PE(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 1) | ((REG32(ADR_PAD42)) & 0xfffffffd))
+#define SET_PAD42_DS(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 2) | ((REG32(ADR_PAD42)) & 0xfffffffb))
+#define SET_PAD42_IE(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 3) | ((REG32(ADR_PAD42)) & 0xfffffff7))
+#define SET_PAD42_SEL_I(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 4) | ((REG32(ADR_PAD42)) & 0xffffffcf))
+#define SET_PAD42_OD(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 8) | ((REG32(ADR_PAD42)) & 0xfffffeff))
+#define SET_PAD42_SEL_O(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 12) | ((REG32(ADR_PAD42)) & 0xffffefff))
+#define SET_TEST_11_ID(_VAL_) (REG32(ADR_PAD42)) = (((_VAL_) << 28) | ((REG32(ADR_PAD42)) & 0xefffffff))
+#define SET_PAD43_OE(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 0) | ((REG32(ADR_PAD43)) & 0xfffffffe))
+#define SET_PAD43_PE(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 1) | ((REG32(ADR_PAD43)) & 0xfffffffd))
+#define SET_PAD43_DS(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 2) | ((REG32(ADR_PAD43)) & 0xfffffffb))
+#define SET_PAD43_IE(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 3) | ((REG32(ADR_PAD43)) & 0xfffffff7))
+#define SET_PAD43_SEL_I(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 4) | ((REG32(ADR_PAD43)) & 0xffffffcf))
+#define SET_PAD43_OD(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 8) | ((REG32(ADR_PAD43)) & 0xfffffeff))
+#define SET_PAD43_SEL_O(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 12) | ((REG32(ADR_PAD43)) & 0xffffefff))
+#define SET_TEST_12_ID(_VAL_) (REG32(ADR_PAD43)) = (((_VAL_) << 28) | ((REG32(ADR_PAD43)) & 0xefffffff))
+#define SET_PAD44_OE(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 0) | ((REG32(ADR_PAD44)) & 0xfffffffe))
+#define SET_PAD44_PE(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 1) | ((REG32(ADR_PAD44)) & 0xfffffffd))
+#define SET_PAD44_DS(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 2) | ((REG32(ADR_PAD44)) & 0xfffffffb))
+#define SET_PAD44_IE(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 3) | ((REG32(ADR_PAD44)) & 0xfffffff7))
+#define SET_PAD44_SEL_I(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 4) | ((REG32(ADR_PAD44)) & 0xffffffcf))
+#define SET_PAD44_OD(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 8) | ((REG32(ADR_PAD44)) & 0xfffffeff))
+#define SET_PAD44_SEL_O(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 12) | ((REG32(ADR_PAD44)) & 0xffffcfff))
+#define SET_TEST_13_ID(_VAL_) (REG32(ADR_PAD44)) = (((_VAL_) << 28) | ((REG32(ADR_PAD44)) & 0xefffffff))
+#define SET_PAD45_OE(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 0) | ((REG32(ADR_PAD45)) & 0xfffffffe))
+#define SET_PAD45_PE(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 1) | ((REG32(ADR_PAD45)) & 0xfffffffd))
+#define SET_PAD45_DS(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 2) | ((REG32(ADR_PAD45)) & 0xfffffffb))
+#define SET_PAD45_IE(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 3) | ((REG32(ADR_PAD45)) & 0xfffffff7))
+#define SET_PAD45_SEL_I(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 4) | ((REG32(ADR_PAD45)) & 0xffffffcf))
+#define SET_PAD45_OD(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 8) | ((REG32(ADR_PAD45)) & 0xfffffeff))
+#define SET_PAD45_SEL_O(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 12) | ((REG32(ADR_PAD45)) & 0xffffcfff))
+#define SET_TEST_14_ID(_VAL_) (REG32(ADR_PAD45)) = (((_VAL_) << 28) | ((REG32(ADR_PAD45)) & 0xefffffff))
+#define SET_PAD46_OE(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 0) | ((REG32(ADR_PAD46)) & 0xfffffffe))
+#define SET_PAD46_PE(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 1) | ((REG32(ADR_PAD46)) & 0xfffffffd))
+#define SET_PAD46_DS(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 2) | ((REG32(ADR_PAD46)) & 0xfffffffb))
+#define SET_PAD46_IE(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 3) | ((REG32(ADR_PAD46)) & 0xfffffff7))
+#define SET_PAD46_SEL_I(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 4) | ((REG32(ADR_PAD46)) & 0xffffffcf))
+#define SET_PAD46_OD(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 8) | ((REG32(ADR_PAD46)) & 0xfffffeff))
+#define SET_PAD46_SEL_O(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 12) | ((REG32(ADR_PAD46)) & 0xffffcfff))
+#define SET_TEST_15_ID(_VAL_) (REG32(ADR_PAD46)) = (((_VAL_) << 28) | ((REG32(ADR_PAD46)) & 0xefffffff))
+#define SET_PAD47_OE(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 0) | ((REG32(ADR_PAD47)) & 0xfffffffe))
+#define SET_PAD47_PE(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 1) | ((REG32(ADR_PAD47)) & 0xfffffffd))
+#define SET_PAD47_DS(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 2) | ((REG32(ADR_PAD47)) & 0xfffffffb))
+#define SET_PAD47_SEL_I(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 4) | ((REG32(ADR_PAD47)) & 0xffffffcf))
+#define SET_PAD47_OD(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 8) | ((REG32(ADR_PAD47)) & 0xfffffeff))
+#define SET_PAD47_SEL_O(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 12) | ((REG32(ADR_PAD47)) & 0xffffcfff))
+#define SET_PAD47_SEL_OE(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 20) | ((REG32(ADR_PAD47)) & 0xffefffff))
+#define SET_GPIO_9_ID(_VAL_) (REG32(ADR_PAD47)) = (((_VAL_) << 28) | ((REG32(ADR_PAD47)) & 0xefffffff))
+#define SET_PAD48_OE(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 0) | ((REG32(ADR_PAD48)) & 0xfffffffe))
+#define SET_PAD48_PE(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 1) | ((REG32(ADR_PAD48)) & 0xfffffffd))
+#define SET_PAD48_DS(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 2) | ((REG32(ADR_PAD48)) & 0xfffffffb))
+#define SET_PAD48_IE(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 3) | ((REG32(ADR_PAD48)) & 0xfffffff7))
+#define SET_PAD48_SEL_I(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 4) | ((REG32(ADR_PAD48)) & 0xffffff8f))
+#define SET_PAD48_OD(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 8) | ((REG32(ADR_PAD48)) & 0xfffffeff))
+#define SET_PAD48_PE_SEL(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 11) | ((REG32(ADR_PAD48)) & 0xfffff7ff))
+#define SET_PAD48_SEL_O(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 12) | ((REG32(ADR_PAD48)) & 0xffffcfff))
+#define SET_PAD48_SEL_OE(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 20) | ((REG32(ADR_PAD48)) & 0xffefffff))
+#define SET_GPIO_10_ID(_VAL_) (REG32(ADR_PAD48)) = (((_VAL_) << 28) | ((REG32(ADR_PAD48)) & 0xefffffff))
+#define SET_PAD49_OE(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 0) | ((REG32(ADR_PAD49)) & 0xfffffffe))
+#define SET_PAD49_PE(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 1) | ((REG32(ADR_PAD49)) & 0xfffffffd))
+#define SET_PAD49_DS(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 2) | ((REG32(ADR_PAD49)) & 0xfffffffb))
+#define SET_PAD49_IE(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 3) | ((REG32(ADR_PAD49)) & 0xfffffff7))
+#define SET_PAD49_SEL_I(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 4) | ((REG32(ADR_PAD49)) & 0xffffff8f))
+#define SET_PAD49_OD(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 8) | ((REG32(ADR_PAD49)) & 0xfffffeff))
+#define SET_PAD49_SEL_O(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 12) | ((REG32(ADR_PAD49)) & 0xffffcfff))
+#define SET_PAD49_SEL_OE(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 20) | ((REG32(ADR_PAD49)) & 0xffefffff))
+#define SET_GPIO_11_ID(_VAL_) (REG32(ADR_PAD49)) = (((_VAL_) << 28) | ((REG32(ADR_PAD49)) & 0xefffffff))
+#define SET_PAD50_OE(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 0) | ((REG32(ADR_PAD50)) & 0xfffffffe))
+#define SET_PAD50_PE(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 1) | ((REG32(ADR_PAD50)) & 0xfffffffd))
+#define SET_PAD50_DS(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 2) | ((REG32(ADR_PAD50)) & 0xfffffffb))
+#define SET_PAD50_IE(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 3) | ((REG32(ADR_PAD50)) & 0xfffffff7))
+#define SET_PAD50_SEL_I(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 4) | ((REG32(ADR_PAD50)) & 0xffffff8f))
+#define SET_PAD50_OD(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 8) | ((REG32(ADR_PAD50)) & 0xfffffeff))
+#define SET_PAD50_SEL_O(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 12) | ((REG32(ADR_PAD50)) & 0xffffcfff))
+#define SET_PAD50_SEL_OE(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 20) | ((REG32(ADR_PAD50)) & 0xffefffff))
+#define SET_GPIO_12_ID(_VAL_) (REG32(ADR_PAD50)) = (((_VAL_) << 28) | ((REG32(ADR_PAD50)) & 0xefffffff))
+#define SET_PAD51_OE(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 0) | ((REG32(ADR_PAD51)) & 0xfffffffe))
+#define SET_PAD51_PE(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 1) | ((REG32(ADR_PAD51)) & 0xfffffffd))
+#define SET_PAD51_DS(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 2) | ((REG32(ADR_PAD51)) & 0xfffffffb))
+#define SET_PAD51_IE(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 3) | ((REG32(ADR_PAD51)) & 0xfffffff7))
+#define SET_PAD51_SEL_I(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 4) | ((REG32(ADR_PAD51)) & 0xffffffcf))
+#define SET_PAD51_OD(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 8) | ((REG32(ADR_PAD51)) & 0xfffffeff))
+#define SET_PAD51_SEL_O(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 12) | ((REG32(ADR_PAD51)) & 0xffffefff))
+#define SET_PAD51_SEL_OE(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 20) | ((REG32(ADR_PAD51)) & 0xffefffff))
+#define SET_GPIO_13_ID(_VAL_) (REG32(ADR_PAD51)) = (((_VAL_) << 28) | ((REG32(ADR_PAD51)) & 0xefffffff))
+#define SET_PAD52_OE(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 0) | ((REG32(ADR_PAD52)) & 0xfffffffe))
+#define SET_PAD52_PE(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 1) | ((REG32(ADR_PAD52)) & 0xfffffffd))
+#define SET_PAD52_DS(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 2) | ((REG32(ADR_PAD52)) & 0xfffffffb))
+#define SET_PAD52_SEL_I(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 4) | ((REG32(ADR_PAD52)) & 0xffffffcf))
+#define SET_PAD52_OD(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 8) | ((REG32(ADR_PAD52)) & 0xfffffeff))
+#define SET_PAD52_SEL_O(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 12) | ((REG32(ADR_PAD52)) & 0xffffefff))
+#define SET_PAD52_SEL_OE(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 20) | ((REG32(ADR_PAD52)) & 0xffefffff))
+#define SET_GPIO_14_ID(_VAL_) (REG32(ADR_PAD52)) = (((_VAL_) << 28) | ((REG32(ADR_PAD52)) & 0xefffffff))
+#define SET_PAD53_OE(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 0) | ((REG32(ADR_PAD53)) & 0xfffffffe))
+#define SET_PAD53_PE(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 1) | ((REG32(ADR_PAD53)) & 0xfffffffd))
+#define SET_PAD53_DS(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 2) | ((REG32(ADR_PAD53)) & 0xfffffffb))
+#define SET_PAD53_IE(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 3) | ((REG32(ADR_PAD53)) & 0xfffffff7))
+#define SET_PAD53_SEL_I(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 4) | ((REG32(ADR_PAD53)) & 0xffffffcf))
+#define SET_PAD53_OD(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 8) | ((REG32(ADR_PAD53)) & 0xfffffeff))
+#define SET_PAD53_SEL_O(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 12) | ((REG32(ADR_PAD53)) & 0xffffefff))
+#define SET_JTAG_TMS_ID(_VAL_) (REG32(ADR_PAD53)) = (((_VAL_) << 28) | ((REG32(ADR_PAD53)) & 0xefffffff))
+#define SET_PAD54_OE(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 0) | ((REG32(ADR_PAD54)) & 0xfffffffe))
+#define SET_PAD54_PE(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 1) | ((REG32(ADR_PAD54)) & 0xfffffffd))
+#define SET_PAD54_DS(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 2) | ((REG32(ADR_PAD54)) & 0xfffffffb))
+#define SET_PAD54_OD(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 8) | ((REG32(ADR_PAD54)) & 0xfffffeff))
+#define SET_PAD54_SEL_O(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 12) | ((REG32(ADR_PAD54)) & 0xffffcfff))
+#define SET_JTAG_TCK_ID(_VAL_) (REG32(ADR_PAD54)) = (((_VAL_) << 28) | ((REG32(ADR_PAD54)) & 0xefffffff))
+#define SET_PAD56_PE(_VAL_) (REG32(ADR_PAD56)) = (((_VAL_) << 1) | ((REG32(ADR_PAD56)) & 0xfffffffd))
+#define SET_PAD56_DS(_VAL_) (REG32(ADR_PAD56)) = (((_VAL_) << 2) | ((REG32(ADR_PAD56)) & 0xfffffffb))
+#define SET_PAD56_SEL_I(_VAL_) (REG32(ADR_PAD56)) = (((_VAL_) << 4) | ((REG32(ADR_PAD56)) & 0xffffffef))
+#define SET_PAD56_OD(_VAL_) (REG32(ADR_PAD56)) = (((_VAL_) << 8) | ((REG32(ADR_PAD56)) & 0xfffffeff))
+#define SET_JTAG_TDI_ID(_VAL_) (REG32(ADR_PAD56)) = (((_VAL_) << 28) | ((REG32(ADR_PAD56)) & 0xefffffff))
+#define SET_PAD57_OE(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 0) | ((REG32(ADR_PAD57)) & 0xfffffffe))
+#define SET_PAD57_PE(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 1) | ((REG32(ADR_PAD57)) & 0xfffffffd))
+#define SET_PAD57_DS(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 2) | ((REG32(ADR_PAD57)) & 0xfffffffb))
+#define SET_PAD57_IE(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 3) | ((REG32(ADR_PAD57)) & 0xfffffff7))
+#define SET_PAD57_SEL_I(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 4) | ((REG32(ADR_PAD57)) & 0xffffffcf))
+#define SET_PAD57_OD(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 8) | ((REG32(ADR_PAD57)) & 0xfffffeff))
+#define SET_PAD57_SEL_O(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 12) | ((REG32(ADR_PAD57)) & 0xffffcfff))
+#define SET_PAD57_SEL_OE(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 20) | ((REG32(ADR_PAD57)) & 0xffefffff))
+#define SET_JTAG_TDO_ID(_VAL_) (REG32(ADR_PAD57)) = (((_VAL_) << 28) | ((REG32(ADR_PAD57)) & 0xefffffff))
+#define SET_PAD58_OE(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 0) | ((REG32(ADR_PAD58)) & 0xfffffffe))
+#define SET_PAD58_PE(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 1) | ((REG32(ADR_PAD58)) & 0xfffffffd))
+#define SET_PAD58_DS(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 2) | ((REG32(ADR_PAD58)) & 0xfffffffb))
+#define SET_PAD58_IE(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 3) | ((REG32(ADR_PAD58)) & 0xfffffff7))
+#define SET_PAD58_SEL_I(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 4) | ((REG32(ADR_PAD58)) & 0xffffffcf))
+#define SET_PAD58_OD(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 8) | ((REG32(ADR_PAD58)) & 0xfffffeff))
+#define SET_PAD58_SEL_O(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 12) | ((REG32(ADR_PAD58)) & 0xffffefff))
+#define SET_TEST_16_ID(_VAL_) (REG32(ADR_PAD58)) = (((_VAL_) << 28) | ((REG32(ADR_PAD58)) & 0xefffffff))
+#define SET_PAD59_OE(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 0) | ((REG32(ADR_PAD59)) & 0xfffffffe))
+#define SET_PAD59_PE(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 1) | ((REG32(ADR_PAD59)) & 0xfffffffd))
+#define SET_PAD59_DS(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 2) | ((REG32(ADR_PAD59)) & 0xfffffffb))
+#define SET_PAD59_IE(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 3) | ((REG32(ADR_PAD59)) & 0xfffffff7))
+#define SET_PAD59_SEL_I(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 4) | ((REG32(ADR_PAD59)) & 0xffffffcf))
+#define SET_PAD59_OD(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 8) | ((REG32(ADR_PAD59)) & 0xfffffeff))
+#define SET_PAD59_SEL_O(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 12) | ((REG32(ADR_PAD59)) & 0xffffefff))
+#define SET_TEST_17_ID(_VAL_) (REG32(ADR_PAD59)) = (((_VAL_) << 28) | ((REG32(ADR_PAD59)) & 0xefffffff))
+#define SET_PAD60_OE(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 0) | ((REG32(ADR_PAD60)) & 0xfffffffe))
+#define SET_PAD60_PE(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 1) | ((REG32(ADR_PAD60)) & 0xfffffffd))
+#define SET_PAD60_DS(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 2) | ((REG32(ADR_PAD60)) & 0xfffffffb))
+#define SET_PAD60_IE(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 3) | ((REG32(ADR_PAD60)) & 0xfffffff7))
+#define SET_PAD60_SEL_I(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 4) | ((REG32(ADR_PAD60)) & 0xffffffcf))
+#define SET_PAD60_OD(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 8) | ((REG32(ADR_PAD60)) & 0xfffffeff))
+#define SET_PAD60_SEL_O(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 12) | ((REG32(ADR_PAD60)) & 0xffffefff))
+#define SET_TEST_18_ID(_VAL_) (REG32(ADR_PAD60)) = (((_VAL_) << 28) | ((REG32(ADR_PAD60)) & 0xefffffff))
+#define SET_PAD61_OE(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 0) | ((REG32(ADR_PAD61)) & 0xfffffffe))
+#define SET_PAD61_PE(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 1) | ((REG32(ADR_PAD61)) & 0xfffffffd))
+#define SET_PAD61_DS(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 2) | ((REG32(ADR_PAD61)) & 0xfffffffb))
+#define SET_PAD61_IE(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 3) | ((REG32(ADR_PAD61)) & 0xfffffff7))
+#define SET_PAD61_SEL_I(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 4) | ((REG32(ADR_PAD61)) & 0xffffffef))
+#define SET_PAD61_OD(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 8) | ((REG32(ADR_PAD61)) & 0xfffffeff))
+#define SET_PAD61_SEL_O(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 12) | ((REG32(ADR_PAD61)) & 0xffffcfff))
+#define SET_TEST_19_ID(_VAL_) (REG32(ADR_PAD61)) = (((_VAL_) << 28) | ((REG32(ADR_PAD61)) & 0xefffffff))
+#define SET_PAD62_OE(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 0) | ((REG32(ADR_PAD62)) & 0xfffffffe))
+#define SET_PAD62_PE(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 1) | ((REG32(ADR_PAD62)) & 0xfffffffd))
+#define SET_PAD62_DS(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 2) | ((REG32(ADR_PAD62)) & 0xfffffffb))
+#define SET_PAD62_IE(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 3) | ((REG32(ADR_PAD62)) & 0xfffffff7))
+#define SET_PAD62_SEL_I(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 4) | ((REG32(ADR_PAD62)) & 0xffffffef))
+#define SET_PAD62_OD(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 8) | ((REG32(ADR_PAD62)) & 0xfffffeff))
+#define SET_PAD62_SEL_O(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 12) | ((REG32(ADR_PAD62)) & 0xffffefff))
+#define SET_TEST_20_ID(_VAL_) (REG32(ADR_PAD62)) = (((_VAL_) << 28) | ((REG32(ADR_PAD62)) & 0xefffffff))
+#define SET_PAD64_OE(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 0) | ((REG32(ADR_PAD64)) & 0xfffffffe))
+#define SET_PAD64_PE(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 1) | ((REG32(ADR_PAD64)) & 0xfffffffd))
+#define SET_PAD64_DS(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 2) | ((REG32(ADR_PAD64)) & 0xfffffffb))
+#define SET_PAD64_IE(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 3) | ((REG32(ADR_PAD64)) & 0xfffffff7))
+#define SET_PAD64_SEL_I(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 4) | ((REG32(ADR_PAD64)) & 0xffffff8f))
+#define SET_PAD64_OD(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 8) | ((REG32(ADR_PAD64)) & 0xfffffeff))
+#define SET_PAD64_SEL_O(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 12) | ((REG32(ADR_PAD64)) & 0xffffcfff))
+#define SET_PAD64_SEL_OE(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 20) | ((REG32(ADR_PAD64)) & 0xffefffff))
+#define SET_GPIO_15_IP_ID(_VAL_) (REG32(ADR_PAD64)) = (((_VAL_) << 28) | ((REG32(ADR_PAD64)) & 0xefffffff))
+#define SET_PAD65_OE(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 0) | ((REG32(ADR_PAD65)) & 0xfffffffe))
+#define SET_PAD65_PE(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 1) | ((REG32(ADR_PAD65)) & 0xfffffffd))
+#define SET_PAD65_DS(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 2) | ((REG32(ADR_PAD65)) & 0xfffffffb))
+#define SET_PAD65_IE(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 3) | ((REG32(ADR_PAD65)) & 0xfffffff7))
+#define SET_PAD65_SEL_I(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 4) | ((REG32(ADR_PAD65)) & 0xffffff8f))
+#define SET_PAD65_OD(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 8) | ((REG32(ADR_PAD65)) & 0xfffffeff))
+#define SET_PAD65_SEL_O(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 12) | ((REG32(ADR_PAD65)) & 0xffffefff))
+#define SET_GPIO_TEST_7_IN_ID(_VAL_) (REG32(ADR_PAD65)) = (((_VAL_) << 28) | ((REG32(ADR_PAD65)) & 0xefffffff))
+#define SET_PAD66_OE(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 0) | ((REG32(ADR_PAD66)) & 0xfffffffe))
+#define SET_PAD66_PE(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 1) | ((REG32(ADR_PAD66)) & 0xfffffffd))
+#define SET_PAD66_DS(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 2) | ((REG32(ADR_PAD66)) & 0xfffffffb))
+#define SET_PAD66_IE(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 3) | ((REG32(ADR_PAD66)) & 0xfffffff7))
+#define SET_PAD66_SEL_I(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 4) | ((REG32(ADR_PAD66)) & 0xffffffcf))
+#define SET_PAD66_OD(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 8) | ((REG32(ADR_PAD66)) & 0xfffffeff))
+#define SET_PAD66_SEL_O(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 12) | ((REG32(ADR_PAD66)) & 0xffffcfff))
+#define SET_GPIO_17_QP_ID(_VAL_) (REG32(ADR_PAD66)) = (((_VAL_) << 28) | ((REG32(ADR_PAD66)) & 0xefffffff))
+#define SET_PAD68_OE(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 0) | ((REG32(ADR_PAD68)) & 0xfffffffe))
+#define SET_PAD68_PE(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 1) | ((REG32(ADR_PAD68)) & 0xfffffffd))
+#define SET_PAD68_DS(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 2) | ((REG32(ADR_PAD68)) & 0xfffffffb))
+#define SET_PAD68_IE(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 3) | ((REG32(ADR_PAD68)) & 0xfffffff7))
+#define SET_PAD68_OD(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 8) | ((REG32(ADR_PAD68)) & 0xfffffeff))
+#define SET_PAD68_SEL_O(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 12) | ((REG32(ADR_PAD68)) & 0xffffefff))
+#define SET_GPIO_19_ID(_VAL_) (REG32(ADR_PAD68)) = (((_VAL_) << 28) | ((REG32(ADR_PAD68)) & 0xefffffff))
+#define SET_PAD67_OE(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 0) | ((REG32(ADR_PAD67)) & 0xfffffffe))
+#define SET_PAD67_PE(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 1) | ((REG32(ADR_PAD67)) & 0xfffffffd))
+#define SET_PAD67_DS(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 2) | ((REG32(ADR_PAD67)) & 0xfffffffb))
+#define SET_PAD67_IE(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 3) | ((REG32(ADR_PAD67)) & 0xfffffff7))
+#define SET_PAD67_SEL_I(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 4) | ((REG32(ADR_PAD67)) & 0xffffff8f))
+#define SET_PAD67_OD(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 8) | ((REG32(ADR_PAD67)) & 0xfffffeff))
+#define SET_PAD67_SEL_O(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 12) | ((REG32(ADR_PAD67)) & 0xffffcfff))
+#define SET_GPIO_TEST_8_QN_ID(_VAL_) (REG32(ADR_PAD67)) = (((_VAL_) << 28) | ((REG32(ADR_PAD67)) & 0xefffffff))
+#define SET_PAD69_OE(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 0) | ((REG32(ADR_PAD69)) & 0xfffffffe))
+#define SET_PAD69_PE(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 1) | ((REG32(ADR_PAD69)) & 0xfffffffd))
+#define SET_PAD69_DS(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 2) | ((REG32(ADR_PAD69)) & 0xfffffffb))
+#define SET_PAD69_IE(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 3) | ((REG32(ADR_PAD69)) & 0xfffffff7))
+#define SET_PAD69_SEL_I(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 4) | ((REG32(ADR_PAD69)) & 0xffffffcf))
+#define SET_PAD69_OD(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 8) | ((REG32(ADR_PAD69)) & 0xfffffeff))
+#define SET_PAD69_SEL_O(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 12) | ((REG32(ADR_PAD69)) & 0xffffefff))
+#define SET_STRAP2(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 27) | ((REG32(ADR_PAD69)) & 0xf7ffffff))
+#define SET_GPIO_20_ID(_VAL_) (REG32(ADR_PAD69)) = (((_VAL_) << 28) | ((REG32(ADR_PAD69)) & 0xefffffff))
+#define SET_PAD70_OE(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 0) | ((REG32(ADR_PAD70)) & 0xfffffffe))
+#define SET_PAD70_PE(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 1) | ((REG32(ADR_PAD70)) & 0xfffffffd))
+#define SET_PAD70_DS(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 2) | ((REG32(ADR_PAD70)) & 0xfffffffb))
+#define SET_PAD70_IE(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 3) | ((REG32(ADR_PAD70)) & 0xfffffff7))
+#define SET_PAD70_SEL_I(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 4) | ((REG32(ADR_PAD70)) & 0xffffffcf))
+#define SET_PAD70_OD(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 8) | ((REG32(ADR_PAD70)) & 0xfffffeff))
+#define SET_PAD70_SEL_O(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 12) | ((REG32(ADR_PAD70)) & 0xffff8fff))
+#define SET_GPIO_21_ID(_VAL_) (REG32(ADR_PAD70)) = (((_VAL_) << 28) | ((REG32(ADR_PAD70)) & 0xefffffff))
+#define SET_PAD231_OE(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 0) | ((REG32(ADR_PAD231)) & 0xfffffffe))
+#define SET_PAD231_PE(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 1) | ((REG32(ADR_PAD231)) & 0xfffffffd))
+#define SET_PAD231_DS(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 2) | ((REG32(ADR_PAD231)) & 0xfffffffb))
+#define SET_PAD231_IE(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 3) | ((REG32(ADR_PAD231)) & 0xfffffff7))
+#define SET_PAD231_OD(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 8) | ((REG32(ADR_PAD231)) & 0xfffffeff))
+#define SET_PIN_40_OR_56_ID(_VAL_) (REG32(ADR_PAD231)) = (((_VAL_) << 28) | ((REG32(ADR_PAD231)) & 0xefffffff))
+#define SET_MP_PHY2RX_DATA__0_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 0) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffffe))
+#define SET_MP_PHY2RX_DATA__1_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 1) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffffd))
+#define SET_MP_TX_FF_RPTR__1_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 2) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffffb))
+#define SET_MP_RX_FF_WPTR__2_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 3) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffff7))
+#define SET_MP_RX_FF_WPTR__1_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 4) | ((REG32(ADR_PIN_SEL_0)) & 0xffffffef))
+#define SET_MP_RX_FF_WPTR__0_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 5) | ((REG32(ADR_PIN_SEL_0)) & 0xffffffdf))
+#define SET_MP_PHY2RX_DATA__2_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 6) | ((REG32(ADR_PIN_SEL_0)) & 0xffffffbf))
+#define SET_MP_PHY2RX_DATA__4_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 7) | ((REG32(ADR_PIN_SEL_0)) & 0xffffff7f))
+#define SET_I2CM_SDA_ID_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 8) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffcff))
+#define SET_CRYSTAL_OUT_REQ_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 10) | ((REG32(ADR_PIN_SEL_0)) & 0xfffffbff))
+#define SET_MP_PHY2RX_DATA__5_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 11) | ((REG32(ADR_PIN_SEL_0)) & 0xfffff7ff))
+#define SET_MP_PHY2RX_DATA__3_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 12) | ((REG32(ADR_PIN_SEL_0)) & 0xffffefff))
+#define SET_UART_RXD_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 13) | ((REG32(ADR_PIN_SEL_0)) & 0xffff9fff))
+#define SET_MP_PHY2RX_DATA__6_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 15) | ((REG32(ADR_PIN_SEL_0)) & 0xffff7fff))
+#define SET_DAT_UART_NCTS_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 16) | ((REG32(ADR_PIN_SEL_0)) & 0xfffeffff))
+#define SET_GPIO_LOG_STOP_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 17) | ((REG32(ADR_PIN_SEL_0)) & 0xfff1ffff))
+#define SET_MP_TX_FF_RPTR__0_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 20) | ((REG32(ADR_PIN_SEL_0)) & 0xffefffff))
+#define SET_MP_PHY_RX_WRST_N_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 21) | ((REG32(ADR_PIN_SEL_0)) & 0xffdfffff))
+#define SET_EXT_32K_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 22) | ((REG32(ADR_PIN_SEL_0)) & 0xff3fffff))
+#define SET_MP_PHY2RX_DATA__7_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 24) | ((REG32(ADR_PIN_SEL_0)) & 0xfeffffff))
+#define SET_MP_TX_FF_RPTR__2_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 25) | ((REG32(ADR_PIN_SEL_0)) & 0xfdffffff))
+#define SET_PMUINT_WAKE_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 26) | ((REG32(ADR_PIN_SEL_0)) & 0xe3ffffff))
+#define SET_I2CM_SCL_ID_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 29) | ((REG32(ADR_PIN_SEL_0)) & 0xdfffffff))
+#define SET_MP_MRX_RX_EN_SEL(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 30) | ((REG32(ADR_PIN_SEL_0)) & 0xbfffffff))
+#define SET_DAT_UART_RXD_SEL_0(_VAL_) (REG32(ADR_PIN_SEL_0)) = (((_VAL_) << 31) | ((REG32(ADR_PIN_SEL_0)) & 0x7fffffff))
+#define SET_DAT_UART_RXD_SEL_1(_VAL_) (REG32(ADR_PIN_SEL_1)) = (((_VAL_) << 0) | ((REG32(ADR_PIN_SEL_1)) & 0xfffffffe))
+#define SET_SPI_DI_SEL(_VAL_) (REG32(ADR_PIN_SEL_1)) = (((_VAL_) << 1) | ((REG32(ADR_PIN_SEL_1)) & 0xfffffffd))
+#define SET_IO_PORT_REG(_VAL_) (REG32(ADR_IO_PORT_REG)) = (((_VAL_) << 0) | ((REG32(ADR_IO_PORT_REG)) & 0xfffe0000))
+#define SET_MASK_RX_INT(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 0) | ((REG32(ADR_INT_MASK_REG)) & 0xfffffffe))
+#define SET_MASK_TX_INT(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 1) | ((REG32(ADR_INT_MASK_REG)) & 0xfffffffd))
+#define SET_MASK_SOC_SYSTEM_INT(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 2) | ((REG32(ADR_INT_MASK_REG)) & 0xfffffffb))
+#define SET_EDCA0_LOW_THR_INT_MASK(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 3) | ((REG32(ADR_INT_MASK_REG)) & 0xfffffff7))
+#define SET_EDCA1_LOW_THR_INT_MASK(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 4) | ((REG32(ADR_INT_MASK_REG)) & 0xffffffef))
+#define SET_EDCA2_LOW_THR_INT_MASK(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 5) | ((REG32(ADR_INT_MASK_REG)) & 0xffffffdf))
+#define SET_EDCA3_LOW_THR_INT_MASK(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 6) | ((REG32(ADR_INT_MASK_REG)) & 0xffffffbf))
+#define SET_TX_LIMIT_INT_MASK(_VAL_) (REG32(ADR_INT_MASK_REG)) = (((_VAL_) << 7) | ((REG32(ADR_INT_MASK_REG)) & 0xffffff7f))
+#define SET_RX_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 0) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffffe))
+#define SET_TX_COMPLETE_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 1) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffffd))
+#define SET_SOC_SYSTEM_INT_STATUS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 2) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffffb))
+#define SET_EDCA0_LOW_THR_INT_STS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 3) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffff7))
+#define SET_EDCA1_LOW_THR_INT_STS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 4) | ((REG32(ADR_INT_STATUS_REG)) & 0xffffffef))
+#define SET_EDCA2_LOW_THR_INT_STS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 5) | ((REG32(ADR_INT_STATUS_REG)) & 0xffffffdf))
+#define SET_EDCA3_LOW_THR_INT_STS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 6) | ((REG32(ADR_INT_STATUS_REG)) & 0xffffffbf))
+#define SET_TX_LIMIT_INT_STS(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 7) | ((REG32(ADR_INT_STATUS_REG)) & 0xffffff7f))
+#define SET_HOST_TRIGGERED_RX_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 8) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffeff))
+#define SET_HOST_TRIGGERED_TX_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 9) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffdff))
+#define SET_SOC_TRIGGER_RX_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 10) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffffbff))
+#define SET_SOC_TRIGGER_TX_INT(_VAL_) (REG32(ADR_INT_STATUS_REG)) = (((_VAL_) << 11) | ((REG32(ADR_INT_STATUS_REG)) & 0xfffff7ff))
+#define SET_RDY_FOR_TX_RX(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 0) | ((REG32(ADR_FN1_STATUS_REG)) & 0xfffffffe))
+#define SET_RDY_FOR_FW_DOWNLOAD(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 1) | ((REG32(ADR_FN1_STATUS_REG)) & 0xfffffffd))
+#define SET_ILLEGAL_CMD_RESP_OPTION(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 2) | ((REG32(ADR_FN1_STATUS_REG)) & 0xfffffffb))
+#define SET_SDIO_TRX_DATA_SEQUENCE(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 3) | ((REG32(ADR_FN1_STATUS_REG)) & 0xfffffff7))
+#define SET_GPIO_INT_TRIGGER_OPTION(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 4) | ((REG32(ADR_FN1_STATUS_REG)) & 0xffffffef))
+#define SET_TRIGGER_FUNCTION_SETTING(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 5) | ((REG32(ADR_FN1_STATUS_REG)) & 0xffffff9f))
+#define SET_CMD52_ABORT_RESPONSE(_VAL_) (REG32(ADR_FN1_STATUS_REG)) = (((_VAL_) << 7) | ((REG32(ADR_FN1_STATUS_REG)) & 0xffffff7f))
+#define SET_RX_PACKET_LENGTH(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 0) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xffff0000))
+#define SET_CARD_FW_DL_STATUS(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 16) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xff00ffff))
+#define SET_TX_RX_LOOP_BACK_TEST(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 24) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xfeffffff))
+#define SET_SDIO_LOOP_BACK_TEST(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 25) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xfdffffff))
+#define SET_CMD52_ABORT_ACTIVE(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 28) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xefffffff))
+#define SET_CMD52_RESET_ACTIVE(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 29) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xdfffffff))
+#define SET_SDIO_PARTIAL_RESET_ACTIVE(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 30) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0xbfffffff))
+#define SET_SDIO_ALL_RESE_ACTIVE(_VAL_) (REG32(ADR_CARD_PKT_STATUS_TEST)) = (((_VAL_) << 31) | ((REG32(ADR_CARD_PKT_STATUS_TEST)) & 0x7fffffff))
+#define SET_RX_PACKET_LENGTH2(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xffff0000))
+#define SET_RX_INT1(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 16) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xfffeffff))
+#define SET_TX_DONE(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 17) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xfffdffff))
+#define SET_HCI_TRX_FINISH(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 18) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xfffbffff))
+#define SET_ALLOCATE_STATUS(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 19) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xfff7ffff))
+#define SET_HCI_INPUT_FF_CNT(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 20) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xff0fffff))
+#define SET_HCI_OUTPUT_FF_CNT(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 24) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xe0ffffff))
+#define SET_AHB_HANG4(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 29) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xdfffffff))
+#define SET_HCI_IN_QUE_EMPTY(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 30) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0xbfffffff))
+#define SET_SYSTEM_INT(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REG)) = (((_VAL_) << 31) | ((REG32(ADR_SYSTEM_INFORMATION_REG)) & 0x7fffffff))
+#define SET_CARD_RCA_REG(_VAL_) (REG32(ADR_CARD_RCA_REG)) = (((_VAL_) << 0) | ((REG32(ADR_CARD_RCA_REG)) & 0xffff0000))
+#define SET_SDIO_FIFO_WR_THLD_REG(_VAL_) (REG32(ADR_SDIO_FIFO_WR_THLD_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_FIFO_WR_THLD_REG)) & 0xfffffe00))
+#define SET_SDIO_FIFO_WR_LIMIT_REG(_VAL_) (REG32(ADR_SDIO_FIFO_WR_LIMIT_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_FIFO_WR_LIMIT_REG)) & 0xfffffe00))
+#define SET_SDIO_TX_DATA_BATCH_SIZE_REG(_VAL_) (REG32(ADR_SDIO_TX_DATA_BATCH_SIZE_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_TX_DATA_BATCH_SIZE_REG)) & 0xfffffe00))
+#define SET_SDIO_THLD_FOR_CMD53RD_REG(_VAL_) (REG32(ADR_SDIO_THLD_FOR_CMD53RD_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_THLD_FOR_CMD53RD_REG)) & 0xfffffe00))
+#define SET_SDIO_RX_DATA_BATCH_SIZE_REG(_VAL_) (REG32(ADR_SDIO_RX_DATA_BATCH_SIZE_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_RX_DATA_BATCH_SIZE_REG)) & 0xfffffe00))
+#define SET_START_BYTE_VALUE(_VAL_) (REG32(ADR_SDIO_LOG_START_END_DATA_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_LOG_START_END_DATA_REG)) & 0xffffff00))
+#define SET_END_BYTE_VALUE(_VAL_) (REG32(ADR_SDIO_LOG_START_END_DATA_REG)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_LOG_START_END_DATA_REG)) & 0xffff00ff))
+#define SET_SDIO_BYTE_MODE_BATCH_SIZE_REG(_VAL_) (REG32(ADR_SDIO_BYTE_MODE_BATCH_SIZE_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_BYTE_MODE_BATCH_SIZE_REG)) & 0xffffff00))
+#define SET_SDIO_LAST_CMD_INDEX_REG(_VAL_) (REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) & 0xffffffc0))
+#define SET_SDIO_LAST_CMD_CRC_REG(_VAL_) (REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) & 0xffff80ff))
+#define SET_SDIO_LAST_CMD_ARG_REG(_VAL_) (REG32(ADR_SDIO_LAST_CMD_ARG_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_LAST_CMD_ARG_REG)) & 0x00000000))
+#define SET_SDIO_BUS_STATE_REG(_VAL_) (REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) & 0xffffffe0))
+#define SET_SDIO_BUSY_LONG_CNT(_VAL_) (REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) & 0x0000ffff))
+#define SET_SDIO_CARD_STATUS_REG(_VAL_) (REG32(ADR_SDIO_CARD_STATUS_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_CARD_STATUS_REG)) & 0x00000000))
+#define SET_R5_RESPONSE_FLAG(_VAL_) (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (((_VAL_) << 0) | ((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0xffffff00))
+#define SET_RESP_OUT_EDGE(_VAL_) (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (((_VAL_) << 8) | ((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0xfffffeff))
+#define SET_DAT_OUT_EDGE(_VAL_) (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (((_VAL_) << 9) | ((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0xfffffdff))
+#define SET_MCU_TO_SDIO_INFO_MASK(_VAL_) (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (((_VAL_) << 16) | ((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0xfffeffff))
+#define SET_INT_THROUGH_PIN(_VAL_) (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (((_VAL_) << 17) | ((REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) & 0xfffdffff))
+#define SET_WRITE_DATA(_VAL_) (REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) = (((_VAL_) << 0) | ((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0xffffff00))
+#define SET_WRITE_ADDRESS(_VAL_) (REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) = (((_VAL_) << 8) | ((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0xffff00ff))
+#define SET_READ_DATA(_VAL_) (REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) = (((_VAL_) << 16) | ((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0xff00ffff))
+#define SET_READ_ADDRESS(_VAL_) (REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) = (((_VAL_) << 24) | ((REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) & 0x00ffffff))
+#define SET_FN1_DMA_START_ADDR_REG(_VAL_) (REG32(ADR_FN1_DMA_START_ADDR_REG)) = (((_VAL_) << 0) | ((REG32(ADR_FN1_DMA_START_ADDR_REG)) & 0x00000000))
+#define SET_SDIO_TO_MCU_INFO(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 0) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xffffff00))
+#define SET_SDIO_PARTIAL_RESET(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 8) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xfffffeff))
+#define SET_SDIO_ALL_RESET(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 9) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xfffffdff))
+#define SET_PERI_MAC_ALL_RESET(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 10) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xfffffbff))
+#define SET_MAC_ALL_RESET(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 11) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xfffff7ff))
+#define SET_AHB_BRIDGE_RESET(_VAL_) (REG32(ADR_FN1_INT_CTRL_RESET)) = (((_VAL_) << 12) | ((REG32(ADR_FN1_INT_CTRL_RESET)) & 0xffffefff))
+#define SET_IO_REG_PORT_REG(_VAL_) (REG32(ADR_IO_REG_PORT_REG)) = (((_VAL_) << 0) | ((REG32(ADR_IO_REG_PORT_REG)) & 0xfffe0000))
+#define SET_SDIO_FIFO_EMPTY_CNT(_VAL_) (REG32(ADR_SDIO_FIFO_ERROR_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_FIFO_ERROR_CNT)) & 0xffff0000))
+#define SET_SDIO_FIFO_FULL_CNT(_VAL_) (REG32(ADR_SDIO_FIFO_ERROR_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_FIFO_ERROR_CNT)) & 0x0000ffff))
+#define SET_SDIO_CRC7_ERROR_CNT(_VAL_) (REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) & 0xffff0000))
+#define SET_SDIO_CRC16_ERROR_CNT(_VAL_) (REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) & 0x0000ffff))
+#define SET_SDIO_RD_BLOCK_CNT(_VAL_) (REG32(ADR_SDIO_BLOCK_CNT_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_BLOCK_CNT_INFO)) & 0xfffffe00))
+#define SET_SDIO_WR_BLOCK_CNT(_VAL_) (REG32(ADR_SDIO_BLOCK_CNT_INFO)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_BLOCK_CNT_INFO)) & 0xfe00ffff))
+#define SET_CMD52_RD_ABORT_CNT(_VAL_) (REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) & 0xfff0ffff))
+#define SET_CMD52_WR_ABORT_CNT(_VAL_) (REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) = (((_VAL_) << 20) | ((REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) & 0xff0fffff))
+#define SET_SDIO_FIFO_WR_PTR_REG(_VAL_) (REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) & 0xffffff00))
+#define SET_SDIO_FIFO_RD_PTR_REG(_VAL_) (REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) = (((_VAL_) << 8) | ((REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) & 0xffff00ff))
+#define SET_SDIO_READ_DATA_CTRL(_VAL_) (REG32(ADR_TX_TIME_OUT_READ_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_TX_TIME_OUT_READ_CTRL)) & 0xfffeffff))
+#define SET_TX_SIZE_BEFORE_SHIFT(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xffffff00))
+#define SET_TX_SIZE_SHIFT_BITS(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xfffff8ff))
+#define SET_SDIO_TX_ALLOC_STATE(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 12) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xffffefff))
+#define SET_ALLOCATE_STATUS2(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xfffeffff))
+#define SET_NO_ALLOCATE_SEND_ERROR(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 17) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xfffdffff))
+#define SET_DOUBLE_ALLOCATE_ERROR(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 18) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xfffbffff))
+#define SET_TX_DONE_STATUS(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 19) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xfff7ffff))
+#define SET_AHB_HANG2(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 20) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xffefffff))
+#define SET_HCI_TRX_FINISH2(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 21) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xffdfffff))
+#define SET_INTR_RX(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 22) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xffbfffff))
+#define SET_HCI_INPUT_QUEUE_FULL(_VAL_) (REG32(ADR_SDIO_TX_ALLOC_REG)) = (((_VAL_) << 23) | ((REG32(ADR_SDIO_TX_ALLOC_REG)) & 0xff7fffff))
+#define SET_ALLOCATESTATUS(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xfffffffe))
+#define SET_HCI_TRX_FINISH3(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 1) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xfffffffd))
+#define SET_HCI_IN_QUE_EMPTY2(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 2) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xfffffffb))
+#define SET_MTX_MNG_UPTHOLD_INT(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 3) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xfffffff7))
+#define SET_EDCA0_UPTHOLD_INT(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 4) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xffffffef))
+#define SET_EDCA1_UPTHOLD_INT(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 5) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xffffffdf))
+#define SET_EDCA2_UPTHOLD_INT(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 6) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xffffffbf))
+#define SET_EDCA3_UPTHOLD_INT(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 7) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xffffff7f))
+#define SET_TX_PAGE_REMAIN2(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xffff00ff))
+#define SET_TX_ID_REMAIN3(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xff80ffff))
+#define SET_HCI_OUTPUT_FF_CNT_0(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 23) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xff7fffff))
+#define SET_HCI_OUTPUT_FF_CNT2(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 24) | ((REG32(ADR_SDIO_TX_INFORM)) & 0xf0ffffff))
+#define SET_HCI_INPUT_FF_CNT2(_VAL_) (REG32(ADR_SDIO_TX_INFORM)) = (((_VAL_) << 28) | ((REG32(ADR_SDIO_TX_INFORM)) & 0x0fffffff))
+#define SET_F1_BLOCK_SIZE_0_REG(_VAL_) (REG32(ADR_F1_BLOCK_SIZE_0_REG)) = (((_VAL_) << 0) | ((REG32(ADR_F1_BLOCK_SIZE_0_REG)) & 0xfffff000))
+#define SET_START_BYTE_VALUE2(_VAL_) (REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0xffffff00))
+#define SET_COMMAND_COUNTER(_VAL_) (REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0xffff00ff))
+#define SET_CMD_LOG_PART1(_VAL_) (REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) & 0x0000ffff))
+#define SET_CMD_LOG_PART2(_VAL_) (REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) & 0xff000000))
+#define SET_END_BYTE_VALUE2(_VAL_) (REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) = (((_VAL_) << 24) | ((REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) & 0x00ffffff))
+#define SET_RX_PACKET_LENGTH3(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0xffff0000))
+#define SET_RX_INT3(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0xfffeffff))
+#define SET_TX_ID_REMAIN2(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REGISTER)) = (((_VAL_) << 17) | ((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0xff01ffff))
+#define SET_TX_PAGE_REMAIN3(_VAL_) (REG32(ADR_SYSTEM_INFORMATION_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_SYSTEM_INFORMATION_REGISTER)) & 0x00ffffff))
+#define SET_CCCR_00H_REG(_VAL_) (REG32(ADR_CCCR_00H_REG)) = (((_VAL_) << 0) | ((REG32(ADR_CCCR_00H_REG)) & 0xffffff00))
+#define SET_CCCR_02H_REG(_VAL_) (REG32(ADR_CCCR_00H_REG)) = (((_VAL_) << 16) | ((REG32(ADR_CCCR_00H_REG)) & 0xff00ffff))
+#define SET_CCCR_03H_REG(_VAL_) (REG32(ADR_CCCR_00H_REG)) = (((_VAL_) << 24) | ((REG32(ADR_CCCR_00H_REG)) & 0x00ffffff))
+#define SET_CCCR_04H_REG(_VAL_) (REG32(ADR_CCCR_04H_REG)) = (((_VAL_) << 0) | ((REG32(ADR_CCCR_04H_REG)) & 0xffffff00))
+#define SET_CCCR_05H_REG(_VAL_) (REG32(ADR_CCCR_04H_REG)) = (((_VAL_) << 8) | ((REG32(ADR_CCCR_04H_REG)) & 0xffff00ff))
+#define SET_CCCR_06H_REG(_VAL_) (REG32(ADR_CCCR_04H_REG)) = (((_VAL_) << 16) | ((REG32(ADR_CCCR_04H_REG)) & 0xfff0ffff))
+#define SET_CCCR_07H_REG(_VAL_) (REG32(ADR_CCCR_04H_REG)) = (((_VAL_) << 24) | ((REG32(ADR_CCCR_04H_REG)) & 0x00ffffff))
+#define SET_SUPPORT_DIRECT_COMMAND_SDIO(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 0) | ((REG32(ADR_CCCR_08H_REG)) & 0xfffffffe))
+#define SET_SUPPORT_MULTIPLE_BLOCK_TRANSFER(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 1) | ((REG32(ADR_CCCR_08H_REG)) & 0xfffffffd))
+#define SET_SUPPORT_READ_WAIT(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 2) | ((REG32(ADR_CCCR_08H_REG)) & 0xfffffffb))
+#define SET_SUPPORT_BUS_CONTROL(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 3) | ((REG32(ADR_CCCR_08H_REG)) & 0xfffffff7))
+#define SET_SUPPORT_BLOCK_GAP_INTERRUPT(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 4) | ((REG32(ADR_CCCR_08H_REG)) & 0xffffffef))
+#define SET_ENABLE_BLOCK_GAP_INTERRUPT(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 5) | ((REG32(ADR_CCCR_08H_REG)) & 0xffffffdf))
+#define SET_LOW_SPEED_CARD(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 6) | ((REG32(ADR_CCCR_08H_REG)) & 0xffffffbf))
+#define SET_LOW_SPEED_CARD_4BIT(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 7) | ((REG32(ADR_CCCR_08H_REG)) & 0xffffff7f))
+#define SET_COMMON_CIS_PONTER(_VAL_) (REG32(ADR_CCCR_08H_REG)) = (((_VAL_) << 8) | ((REG32(ADR_CCCR_08H_REG)) & 0xfe0000ff))
+#define SET_SUPPORT_HIGH_SPEED(_VAL_) (REG32(ADR_CCCR_13H_REG)) = (((_VAL_) << 24) | ((REG32(ADR_CCCR_13H_REG)) & 0xfeffffff))
+#define SET_BSS(_VAL_) (REG32(ADR_CCCR_13H_REG)) = (((_VAL_) << 25) | ((REG32(ADR_CCCR_13H_REG)) & 0xf1ffffff))
+#define SET_FBR_100H_REG(_VAL_) (REG32(ADR_FBR_100H_REG)) = (((_VAL_) << 0) | ((REG32(ADR_FBR_100H_REG)) & 0xfffffff0))
+#define SET_CSASUPPORT(_VAL_) (REG32(ADR_FBR_100H_REG)) = (((_VAL_) << 6) | ((REG32(ADR_FBR_100H_REG)) & 0xffffffbf))
+#define SET_ENABLECSA(_VAL_) (REG32(ADR_FBR_100H_REG)) = (((_VAL_) << 7) | ((REG32(ADR_FBR_100H_REG)) & 0xffffff7f))
+#define SET_FBR_101H_REG(_VAL_) (REG32(ADR_FBR_100H_REG)) = (((_VAL_) << 8) | ((REG32(ADR_FBR_100H_REG)) & 0xffff00ff))
+#define SET_FBR_109H_REG(_VAL_) (REG32(ADR_FBR_109H_REG)) = (((_VAL_) << 8) | ((REG32(ADR_FBR_109H_REG)) & 0xfe0000ff))
+#define SET_F0_CIS_CONTENT_REG_31_0(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_0)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_0)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_63_32(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_1)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_1)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_95_64(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_2)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_2)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_127_96(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_3)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_3)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_159_128(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_4)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_4)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_191_160(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_5)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_5)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_223_192(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_6)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_6)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_255_224(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_7)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_7)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_287_256(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_8)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_8)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_319_288(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_9)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_9)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_351_320(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_10)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_10)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_383_352(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_11)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_11)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_415_384(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_12)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_12)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_447_416(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_13)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_13)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_479_448(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_14)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_14)) & 0x00000000))
+#define SET_F0_CIS_CONTENT_REG_511_480(_VAL_) (REG32(ADR_F0_CIS_CONTENT_REG_15)) = (((_VAL_) << 0) | ((REG32(ADR_F0_CIS_CONTENT_REG_15)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_31_0(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_0)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_0)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_63_32(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_1)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_1)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_95_64(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_2)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_2)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_127_96(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_3)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_3)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_159_128(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_4)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_4)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_191_160(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_5)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_5)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_223_192(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_6)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_6)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_255_224(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_7)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_7)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_287_256(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_8)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_8)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_319_288(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_9)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_9)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_351_320(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_10)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_10)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_383_352(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_11)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_11)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_415_384(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_12)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_12)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_447_416(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_13)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_13)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_479_448(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_14)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_14)) & 0x00000000))
+#define SET_F1_CIS_CONTENT_REG_511_480(_VAL_) (REG32(ADR_F1_CIS_CONTENT_REG_15)) = (((_VAL_) << 0) | ((REG32(ADR_F1_CIS_CONTENT_REG_15)) & 0x00000000))
+#define SET_SPI_MODE(_VAL_) (REG32(ADR_SPI_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_MODE)) & 0x00000000))
+#define SET_RX_QUOTA(_VAL_) (REG32(ADR_RX_QUOTA)) = (((_VAL_) << 0) | ((REG32(ADR_RX_QUOTA)) & 0xffff0000))
+#define SET_CONDI_NUM(_VAL_) (REG32(ADR_CONDITION_NUMBER)) = (((_VAL_) << 0) | ((REG32(ADR_CONDITION_NUMBER)) & 0xffffff00))
+#define SET_HOST_PATH(_VAL_) (REG32(ADR_HOST_PATH)) = (((_VAL_) << 0) | ((REG32(ADR_HOST_PATH)) & 0xfffffffe))
+#define SET_TX_SEG(_VAL_) (REG32(ADR_TX_SEG)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEG)) & 0x00000000))
+#define SET_BRST_MODE(_VAL_) (REG32(ADR_DEBUG_BURST_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_DEBUG_BURST_MODE)) & 0xfffffffe))
+#define SET_CLK_WIDTH(_VAL_) (REG32(ADR_SPI_TO_PHY_PARAM1)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_TO_PHY_PARAM1)) & 0xffff0000))
+#define SET_CSN_INTER(_VAL_) (REG32(ADR_SPI_TO_PHY_PARAM1)) = (((_VAL_) << 16) | ((REG32(ADR_SPI_TO_PHY_PARAM1)) & 0x0000ffff))
+#define SET_BACK_DLY(_VAL_) (REG32(ADR_SPI_TO_PHY_PARAM2)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_TO_PHY_PARAM2)) & 0xffff0000))
+#define SET_FRONT_DLY(_VAL_) (REG32(ADR_SPI_TO_PHY_PARAM2)) = (((_VAL_) << 16) | ((REG32(ADR_SPI_TO_PHY_PARAM2)) & 0x0000ffff))
+#define SET_RX_FIFO_FAIL(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 1) | ((REG32(ADR_SPI_STS)) & 0xfffffffd))
+#define SET_RX_HOST_FAIL(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 2) | ((REG32(ADR_SPI_STS)) & 0xfffffffb))
+#define SET_TX_FIFO_FAIL(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 3) | ((REG32(ADR_SPI_STS)) & 0xfffffff7))
+#define SET_TX_HOST_FAIL(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 4) | ((REG32(ADR_SPI_STS)) & 0xffffffef))
+#define SET_SPI_DOUBLE_ALLOC(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 5) | ((REG32(ADR_SPI_STS)) & 0xffffffdf))
+#define SET_SPI_TX_NO_ALLOC(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 6) | ((REG32(ADR_SPI_STS)) & 0xffffffbf))
+#define SET_RDATA_RDY(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 7) | ((REG32(ADR_SPI_STS)) & 0xffffff7f))
+#define SET_SPI_ALLOC_STATUS(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 8) | ((REG32(ADR_SPI_STS)) & 0xfffffeff))
+#define SET_SPI_DBG_WR_FIFO_FULL(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 9) | ((REG32(ADR_SPI_STS)) & 0xfffffdff))
+#define SET_RX_LEN(_VAL_) (REG32(ADR_SPI_STS)) = (((_VAL_) << 16) | ((REG32(ADR_SPI_STS)) & 0x0000ffff))
+#define SET_SPI_TX_ALLOC_SIZE_SHIFT_BITS(_VAL_) (REG32(ADR_TX_ALLOC_SET)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ALLOC_SET)) & 0xfffffff8))
+#define SET_SPI_HOST_TX_ALLOC_PKBUF(_VAL_) (REG32(ADR_TX_ALLOC_SET)) = (((_VAL_) << 8) | ((REG32(ADR_TX_ALLOC_SET)) & 0xfffffeff))
+#define SET_SPI_TX_ALLOC_SIZE(_VAL_) (REG32(ADR_TX_ALLOC)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ALLOC)) & 0xffffff00))
+#define SET_RD_DAT_CNT(_VAL_) (REG32(ADR_DBG_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_CNT)) & 0xffff0000))
+#define SET_RD_STS_CNT(_VAL_) (REG32(ADR_DBG_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_CNT)) & 0x0000ffff))
+#define SET_JUDGE_CNT(_VAL_) (REG32(ADR_DBG_CNT2)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_CNT2)) & 0xffff0000))
+#define SET_RD_STS_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT2)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_CNT2)) & 0xfffeffff))
+#define SET_RD_DAT_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT2)) = (((_VAL_) << 17) | ((REG32(ADR_DBG_CNT2)) & 0xfffdffff))
+#define SET_JUDGE_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT2)) = (((_VAL_) << 18) | ((REG32(ADR_DBG_CNT2)) & 0xfffbffff))
+#define SET_TX_DONE_CNT(_VAL_) (REG32(ADR_DBG_CNT3)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_CNT3)) & 0xffff0000))
+#define SET_TX_DISCARD_CNT(_VAL_) (REG32(ADR_DBG_CNT3)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_CNT3)) & 0x0000ffff))
+#define SET_TX_SET_CNT(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_CNT4)) & 0xffff0000))
+#define SET_TX_DISCARD_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_CNT4)) & 0xfffeffff))
+#define SET_TX_DONE_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 17) | ((REG32(ADR_DBG_CNT4)) & 0xfffdffff))
+#define SET_TX_SET_CNT_CLR(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 18) | ((REG32(ADR_DBG_CNT4)) & 0xfffbffff))
+#define SET_DAT_MODE_OFF(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 19) | ((REG32(ADR_DBG_CNT4)) & 0xfff7ffff))
+#define SET_TX_FIFO_RESIDUE(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 20) | ((REG32(ADR_DBG_CNT4)) & 0xff8fffff))
+#define SET_RX_FIFO_RESIDUE(_VAL_) (REG32(ADR_DBG_CNT4)) = (((_VAL_) << 24) | ((REG32(ADR_DBG_CNT4)) & 0xf8ffffff))
+#define SET_RX_RDY(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 0) | ((REG32(ADR_INT_TAG)) & 0xfffffffe))
+#define SET_SDIO_SYS_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 2) | ((REG32(ADR_INT_TAG)) & 0xfffffffb))
+#define SET_EDCA0_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 3) | ((REG32(ADR_INT_TAG)) & 0xfffffff7))
+#define SET_EDCA1_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 4) | ((REG32(ADR_INT_TAG)) & 0xffffffef))
+#define SET_EDCA2_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 5) | ((REG32(ADR_INT_TAG)) & 0xffffffdf))
+#define SET_EDCA3_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 6) | ((REG32(ADR_INT_TAG)) & 0xffffffbf))
+#define SET_TX_LIMIT_INT_IN(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 7) | ((REG32(ADR_INT_TAG)) & 0xffffff7f))
+#define SET_SPI_FN1(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 8) | ((REG32(ADR_INT_TAG)) & 0xffff80ff))
+#define SET_SPI_CLK_EN_INT(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 15) | ((REG32(ADR_INT_TAG)) & 0xffff7fff))
+#define SET_SPI_HOST_MASK(_VAL_) (REG32(ADR_INT_TAG)) = (((_VAL_) << 16) | ((REG32(ADR_INT_TAG)) & 0xff00ffff))
+#define SET_I2CM_INT_WDONE(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_EN)) & 0xfffffffe))
+#define SET_I2CM_INT_RDONE(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 1) | ((REG32(ADR_I2CM_EN)) & 0xfffffffd))
+#define SET_I2CM_IDLE(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 2) | ((REG32(ADR_I2CM_EN)) & 0xfffffffb))
+#define SET_I2CM_INT_MISMATCH(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 3) | ((REG32(ADR_I2CM_EN)) & 0xfffffff7))
+#define SET_I2CM_PSCL(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 4) | ((REG32(ADR_I2CM_EN)) & 0xffffc00f))
+#define SET_I2CM_MANUAL_MODE(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 16) | ((REG32(ADR_I2CM_EN)) & 0xfffeffff))
+#define SET_I2CM_INT_WDATA_NEED(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 17) | ((REG32(ADR_I2CM_EN)) & 0xfffdffff))
+#define SET_I2CM_INT_RDATA_NEED(_VAL_) (REG32(ADR_I2CM_EN)) = (((_VAL_) << 18) | ((REG32(ADR_I2CM_EN)) & 0xfffbffff))
+#define SET_I2CM_DEV_A(_VAL_) (REG32(ADR_I2CM_DEV_A)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_DEV_A)) & 0xfffffc00))
+#define SET_I2CM_DEV_A10B(_VAL_) (REG32(ADR_I2CM_DEV_A)) = (((_VAL_) << 14) | ((REG32(ADR_I2CM_DEV_A)) & 0xffffbfff))
+#define SET_I2CM_RX(_VAL_) (REG32(ADR_I2CM_DEV_A)) = (((_VAL_) << 15) | ((REG32(ADR_I2CM_DEV_A)) & 0xffff7fff))
+#define SET_I2CM_LEN(_VAL_) (REG32(ADR_I2CM_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_LEN)) & 0xffff0000))
+#define SET_I2CM_T_LEFT(_VAL_) (REG32(ADR_I2CM_LEN)) = (((_VAL_) << 16) | ((REG32(ADR_I2CM_LEN)) & 0xfff8ffff))
+#define SET_I2CM_R_GET(_VAL_) (REG32(ADR_I2CM_LEN)) = (((_VAL_) << 24) | ((REG32(ADR_I2CM_LEN)) & 0xf8ffffff))
+#define SET_I2CM_WDAT(_VAL_) (REG32(ADR_I2CM_WDAT)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_WDAT)) & 0x00000000))
+#define SET_I2CM_RDAT(_VAL_) (REG32(ADR_I2CM_RDAT)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_RDAT)) & 0x00000000))
+#define SET_I2CM_SR_LEN(_VAL_) (REG32(ADR_I2CM_EN_2)) = (((_VAL_) << 0) | ((REG32(ADR_I2CM_EN_2)) & 0xffff0000))
+#define SET_I2CM_SR_RX(_VAL_) (REG32(ADR_I2CM_EN_2)) = (((_VAL_) << 16) | ((REG32(ADR_I2CM_EN_2)) & 0xfffeffff))
+#define SET_I2CM_REPEAT_START(_VAL_) (REG32(ADR_I2CM_EN_2)) = (((_VAL_) << 17) | ((REG32(ADR_I2CM_EN_2)) & 0xfffdffff))
+#define SET_UART_DATA(_VAL_) (REG32(ADR_UART_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_UART_DATA)) & 0xffffff00))
+#define SET_DATA_RDY_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 0) | ((REG32(ADR_UART_IER)) & 0xfffffffe))
+#define SET_THR_EMPTY_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 1) | ((REG32(ADR_UART_IER)) & 0xfffffffd))
+#define SET_RX_LINESTS_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 2) | ((REG32(ADR_UART_IER)) & 0xfffffffb))
+#define SET_MDM_STS_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 3) | ((REG32(ADR_UART_IER)) & 0xfffffff7))
+#define SET_DMA_RXEND_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 6) | ((REG32(ADR_UART_IER)) & 0xffffffbf))
+#define SET_DMA_TXEND_IE(_VAL_) (REG32(ADR_UART_IER)) = (((_VAL_) << 7) | ((REG32(ADR_UART_IER)) & 0xffffff7f))
+#define SET_FIFO_EN(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_FCR)) & 0xfffffffe))
+#define SET_RXFIFO_RST(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 1) | ((REG32(ADR_UART_FCR)) & 0xfffffffd))
+#define SET_TXFIFO_RST(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 2) | ((REG32(ADR_UART_FCR)) & 0xfffffffb))
+#define SET_DMA_MODE(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 3) | ((REG32(ADR_UART_FCR)) & 0xfffffff7))
+#define SET_EN_AUTO_RTS(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_FCR)) & 0xffffffef))
+#define SET_EN_AUTO_CTS(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 5) | ((REG32(ADR_UART_FCR)) & 0xffffffdf))
+#define SET_RXFIFO_TRGLVL(_VAL_) (REG32(ADR_UART_FCR)) = (((_VAL_) << 6) | ((REG32(ADR_UART_FCR)) & 0xffffff3f))
+#define SET_WORD_LEN(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_LCR)) & 0xfffffffc))
+#define SET_STOP_BIT(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 2) | ((REG32(ADR_UART_LCR)) & 0xfffffffb))
+#define SET_PARITY_EN(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 3) | ((REG32(ADR_UART_LCR)) & 0xfffffff7))
+#define SET_EVEN_PARITY(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_LCR)) & 0xffffffef))
+#define SET_FORCE_PARITY(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 5) | ((REG32(ADR_UART_LCR)) & 0xffffffdf))
+#define SET_SET_BREAK(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 6) | ((REG32(ADR_UART_LCR)) & 0xffffffbf))
+#define SET_DLAB(_VAL_) (REG32(ADR_UART_LCR)) = (((_VAL_) << 7) | ((REG32(ADR_UART_LCR)) & 0xffffff7f))
+#define SET_DTR(_VAL_) (REG32(ADR_UART_MCR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_MCR)) & 0xfffffffe))
+#define SET_RTS(_VAL_) (REG32(ADR_UART_MCR)) = (((_VAL_) << 1) | ((REG32(ADR_UART_MCR)) & 0xfffffffd))
+#define SET_OUT_1(_VAL_) (REG32(ADR_UART_MCR)) = (((_VAL_) << 2) | ((REG32(ADR_UART_MCR)) & 0xfffffffb))
+#define SET_OUT_2(_VAL_) (REG32(ADR_UART_MCR)) = (((_VAL_) << 3) | ((REG32(ADR_UART_MCR)) & 0xfffffff7))
+#define SET_LOOP_BACK(_VAL_) (REG32(ADR_UART_MCR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_MCR)) & 0xffffffef))
+#define SET_DATA_RDY(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_LSR)) & 0xfffffffe))
+#define SET_OVERRUN_ERR(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 1) | ((REG32(ADR_UART_LSR)) & 0xfffffffd))
+#define SET_PARITY_ERR(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 2) | ((REG32(ADR_UART_LSR)) & 0xfffffffb))
+#define SET_FRAMING_ERR(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 3) | ((REG32(ADR_UART_LSR)) & 0xfffffff7))
+#define SET_BREAK_INT(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_LSR)) & 0xffffffef))
+#define SET_THR_EMPTY(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 5) | ((REG32(ADR_UART_LSR)) & 0xffffffdf))
+#define SET_TX_EMPTY(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 6) | ((REG32(ADR_UART_LSR)) & 0xffffffbf))
+#define SET_FIFODATA_ERR(_VAL_) (REG32(ADR_UART_LSR)) = (((_VAL_) << 7) | ((REG32(ADR_UART_LSR)) & 0xffffff7f))
+#define SET_DELTA_CTS(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_MSR)) & 0xfffffffe))
+#define SET_DELTA_DSR(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 1) | ((REG32(ADR_UART_MSR)) & 0xfffffffd))
+#define SET_TRAILEDGE_RI(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 2) | ((REG32(ADR_UART_MSR)) & 0xfffffffb))
+#define SET_DELTA_CD(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 3) | ((REG32(ADR_UART_MSR)) & 0xfffffff7))
+#define SET_CTS(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_MSR)) & 0xffffffef))
+#define SET_DSR(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 5) | ((REG32(ADR_UART_MSR)) & 0xffffffdf))
+#define SET_RI(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 6) | ((REG32(ADR_UART_MSR)) & 0xffffffbf))
+#define SET_CD(_VAL_) (REG32(ADR_UART_MSR)) = (((_VAL_) << 7) | ((REG32(ADR_UART_MSR)) & 0xffffff7f))
+#define SET_BRDC_DIV(_VAL_) (REG32(ADR_UART_SPR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_SPR)) & 0xffff0000))
+#define SET_RTHR_L(_VAL_) (REG32(ADR_UART_RTHR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_RTHR)) & 0xfffffff0))
+#define SET_RTHR_H(_VAL_) (REG32(ADR_UART_RTHR)) = (((_VAL_) << 4) | ((REG32(ADR_UART_RTHR)) & 0xffffff0f))
+#define SET_INT_IDCODE(_VAL_) (REG32(ADR_UART_ISR)) = (((_VAL_) << 0) | ((REG32(ADR_UART_ISR)) & 0xfffffff0))
+#define SET_FIFOS_ENABLED(_VAL_) (REG32(ADR_UART_ISR)) = (((_VAL_) << 6) | ((REG32(ADR_UART_ISR)) & 0xffffff3f))
+#define SET_DAT_UART_DATA(_VAL_) (REG32(ADR_DAT_UART_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_DATA)) & 0xffffff00))
+#define SET_DAT_DATA_RDY_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_IER)) & 0xfffffffe))
+#define SET_DAT_THR_EMPTY_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 1) | ((REG32(ADR_DAT_UART_IER)) & 0xfffffffd))
+#define SET_DAT_RX_LINESTS_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_IER)) & 0xfffffffb))
+#define SET_DAT_MDM_STS_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_IER)) & 0xfffffff7))
+#define SET_DAT_DMA_RXEND_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_IER)) & 0xffffffbf))
+#define SET_DAT_DMA_TXEND_IE(_VAL_) (REG32(ADR_DAT_UART_IER)) = (((_VAL_) << 7) | ((REG32(ADR_DAT_UART_IER)) & 0xffffff7f))
+#define SET_DAT_FIFO_EN(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_FCR)) & 0xfffffffe))
+#define SET_DAT_RXFIFO_RST(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 1) | ((REG32(ADR_DAT_UART_FCR)) & 0xfffffffd))
+#define SET_DAT_TXFIFO_RST(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_FCR)) & 0xfffffffb))
+#define SET_DAT_DMA_MODE(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_FCR)) & 0xfffffff7))
+#define SET_DAT_EN_AUTO_RTS(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_FCR)) & 0xffffffef))
+#define SET_DAT_EN_AUTO_CTS(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 5) | ((REG32(ADR_DAT_UART_FCR)) & 0xffffffdf))
+#define SET_DAT_RXFIFO_TRGLVL(_VAL_) (REG32(ADR_DAT_UART_FCR)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_FCR)) & 0xffffff3f))
+#define SET_DAT_WORD_LEN(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_LCR)) & 0xfffffffc))
+#define SET_DAT_STOP_BIT(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_LCR)) & 0xfffffffb))
+#define SET_DAT_PARITY_EN(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_LCR)) & 0xfffffff7))
+#define SET_DAT_EVEN_PARITY(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_LCR)) & 0xffffffef))
+#define SET_DAT_FORCE_PARITY(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 5) | ((REG32(ADR_DAT_UART_LCR)) & 0xffffffdf))
+#define SET_DAT_SET_BREAK(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_LCR)) & 0xffffffbf))
+#define SET_DAT_DLAB(_VAL_) (REG32(ADR_DAT_UART_LCR)) = (((_VAL_) << 7) | ((REG32(ADR_DAT_UART_LCR)) & 0xffffff7f))
+#define SET_DAT_DTR(_VAL_) (REG32(ADR_DAT_UART_MCR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_MCR)) & 0xfffffffe))
+#define SET_DAT_RTS(_VAL_) (REG32(ADR_DAT_UART_MCR)) = (((_VAL_) << 1) | ((REG32(ADR_DAT_UART_MCR)) & 0xfffffffd))
+#define SET_DAT_OUT_1(_VAL_) (REG32(ADR_DAT_UART_MCR)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_MCR)) & 0xfffffffb))
+#define SET_DAT_OUT_2(_VAL_) (REG32(ADR_DAT_UART_MCR)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_MCR)) & 0xfffffff7))
+#define SET_DAT_LOOP_BACK(_VAL_) (REG32(ADR_DAT_UART_MCR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_MCR)) & 0xffffffef))
+#define SET_DAT_DATA_RDY(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_LSR)) & 0xfffffffe))
+#define SET_DAT_OVERRUN_ERR(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 1) | ((REG32(ADR_DAT_UART_LSR)) & 0xfffffffd))
+#define SET_DAT_PARITY_ERR(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_LSR)) & 0xfffffffb))
+#define SET_DAT_FRAMING_ERR(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_LSR)) & 0xfffffff7))
+#define SET_DAT_BREAK_INT(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_LSR)) & 0xffffffef))
+#define SET_DAT_THR_EMPTY(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 5) | ((REG32(ADR_DAT_UART_LSR)) & 0xffffffdf))
+#define SET_DAT_TX_EMPTY(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_LSR)) & 0xffffffbf))
+#define SET_DAT_FIFODATA_ERR(_VAL_) (REG32(ADR_DAT_UART_LSR)) = (((_VAL_) << 7) | ((REG32(ADR_DAT_UART_LSR)) & 0xffffff7f))
+#define SET_DAT_DELTA_CTS(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_MSR)) & 0xfffffffe))
+#define SET_DAT_DELTA_DSR(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 1) | ((REG32(ADR_DAT_UART_MSR)) & 0xfffffffd))
+#define SET_DAT_TRAILEDGE_RI(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 2) | ((REG32(ADR_DAT_UART_MSR)) & 0xfffffffb))
+#define SET_DAT_DELTA_CD(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 3) | ((REG32(ADR_DAT_UART_MSR)) & 0xfffffff7))
+#define SET_DAT_CTS(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_MSR)) & 0xffffffef))
+#define SET_DAT_DSR(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 5) | ((REG32(ADR_DAT_UART_MSR)) & 0xffffffdf))
+#define SET_DAT_RI(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_MSR)) & 0xffffffbf))
+#define SET_DAT_CD(_VAL_) (REG32(ADR_DAT_UART_MSR)) = (((_VAL_) << 7) | ((REG32(ADR_DAT_UART_MSR)) & 0xffffff7f))
+#define SET_DAT_BRDC_DIV(_VAL_) (REG32(ADR_DAT_UART_SPR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_SPR)) & 0xffff0000))
+#define SET_DAT_RTHR_L(_VAL_) (REG32(ADR_DAT_UART_RTHR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_RTHR)) & 0xfffffff0))
+#define SET_DAT_RTHR_H(_VAL_) (REG32(ADR_DAT_UART_RTHR)) = (((_VAL_) << 4) | ((REG32(ADR_DAT_UART_RTHR)) & 0xffffff0f))
+#define SET_DAT_INT_IDCODE(_VAL_) (REG32(ADR_DAT_UART_ISR)) = (((_VAL_) << 0) | ((REG32(ADR_DAT_UART_ISR)) & 0xfffffff0))
+#define SET_DAT_FIFOS_ENABLED(_VAL_) (REG32(ADR_DAT_UART_ISR)) = (((_VAL_) << 6) | ((REG32(ADR_DAT_UART_ISR)) & 0xffffff3f))
+#define SET_MASK_TOP(_VAL_) (REG32(ADR_INT_MASK)) = (((_VAL_) << 0) | ((REG32(ADR_INT_MASK)) & 0x00000000))
+#define SET_INT_MODE(_VAL_) (REG32(ADR_INT_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_INT_MODE)) & 0x00000000))
+#define SET_IRQ_PHY_0(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 0) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffffe))
+#define SET_IRQ_PHY_1(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 1) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffffd))
+#define SET_IRQ_SDIO(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 2) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffffb))
+#define SET_IRQ_BEACON_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 3) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffff7))
+#define SET_IRQ_BEACON(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 4) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffffef))
+#define SET_IRQ_PRE_BEACON(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 5) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffffdf))
+#define SET_IRQ_EDCA0_TX_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 6) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffffbf))
+#define SET_IRQ_EDCA1_TX_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 7) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffff7f))
+#define SET_IRQ_EDCA2_TX_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 8) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffeff))
+#define SET_IRQ_EDCA3_TX_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 9) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffdff))
+#define SET_IRQ_EDCA4_TX_DONE(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 10) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffffbff))
+#define SET_IRQ_BEACON_DTIM(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 12) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffefff))
+#define SET_IRQ_EDCA0_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 13) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffdfff))
+#define SET_IRQ_EDCA1_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 14) | ((REG32(ADR_INT_IRQ_STS)) & 0xffffbfff))
+#define SET_IRQ_EDCA2_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 15) | ((REG32(ADR_INT_IRQ_STS)) & 0xffff7fff))
+#define SET_IRQ_EDCA3_LOWTHOLD_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 16) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffeffff))
+#define SET_IRQ_FENCE_HIT_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 17) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffdffff))
+#define SET_IRQ_ILL_ADDR_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 18) | ((REG32(ADR_INT_IRQ_STS)) & 0xfffbffff))
+#define SET_IRQ_MBOX(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 19) | ((REG32(ADR_INT_IRQ_STS)) & 0xfff7ffff))
+#define SET_IRQ_US_TIMER0(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 20) | ((REG32(ADR_INT_IRQ_STS)) & 0xffefffff))
+#define SET_IRQ_US_TIMER1(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 21) | ((REG32(ADR_INT_IRQ_STS)) & 0xffdfffff))
+#define SET_IRQ_US_TIMER2(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 22) | ((REG32(ADR_INT_IRQ_STS)) & 0xffbfffff))
+#define SET_IRQ_US_TIMER3(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 23) | ((REG32(ADR_INT_IRQ_STS)) & 0xff7fffff))
+#define SET_IRQ_MS_TIMER0(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 24) | ((REG32(ADR_INT_IRQ_STS)) & 0xfeffffff))
+#define SET_IRQ_MS_TIMER1(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 25) | ((REG32(ADR_INT_IRQ_STS)) & 0xfdffffff))
+#define SET_IRQ_MS_TIMER2(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 26) | ((REG32(ADR_INT_IRQ_STS)) & 0xfbffffff))
+#define SET_IRQ_MS_TIMER3(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 27) | ((REG32(ADR_INT_IRQ_STS)) & 0xf7ffffff))
+#define SET_IRQ_TX_LIMIT_INT(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 28) | ((REG32(ADR_INT_IRQ_STS)) & 0xefffffff))
+#define SET_IRQ_DMA0(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 29) | ((REG32(ADR_INT_IRQ_STS)) & 0xdfffffff))
+#define SET_IRQ_CO_DMA(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 30) | ((REG32(ADR_INT_IRQ_STS)) & 0xbfffffff))
+#define SET_IRQ_PERI_GROUP(_VAL_) (REG32(ADR_INT_IRQ_STS)) = (((_VAL_) << 31) | ((REG32(ADR_INT_IRQ_STS)) & 0x7fffffff))
+#define SET_FIQ_STATUS(_VAL_) (REG32(ADR_INT_FIQ_STS)) = (((_VAL_) << 0) | ((REG32(ADR_INT_FIQ_STS)) & 0x00000000))
+#define SET_IRQ_RAW(_VAL_) (REG32(ADR_INT_IRQ_RAW)) = (((_VAL_) << 0) | ((REG32(ADR_INT_IRQ_RAW)) & 0x00000000))
+#define SET_FIQ_RAW(_VAL_) (REG32(ADR_INT_FIQ_RAW)) = (((_VAL_) << 0) | ((REG32(ADR_INT_FIQ_RAW)) & 0x00000000))
+#define SET_INT_PERI_MASK(_VAL_) (REG32(ADR_INT_PERI_MASK)) = (((_VAL_) << 0) | ((REG32(ADR_INT_PERI_MASK)) & 0x00000000))
+#define SET_PERI_RTC(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 0) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffffe))
+#define SET_IRQ_UART0_TX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 1) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffffd))
+#define SET_IRQ_UART0_RX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 2) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffffb))
+#define SET_PERI_GPI_2(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 3) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffff7))
+#define SET_IRQ_SPI_IPC(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 4) | ((REG32(ADR_INT_PERI_STS)) & 0xffffffef))
+#define SET_PERI_GPI_1_0(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 5) | ((REG32(ADR_INT_PERI_STS)) & 0xffffff9f))
+#define SET_SCRT_INT_1(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 7) | ((REG32(ADR_INT_PERI_STS)) & 0xffffff7f))
+#define SET_MMU_ALC_ERR(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 8) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffeff))
+#define SET_MMU_RLS_ERR(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 9) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffdff))
+#define SET_ID_MNG_INT_1(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 10) | ((REG32(ADR_INT_PERI_STS)) & 0xfffffbff))
+#define SET_MBOX_INT_1(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 11) | ((REG32(ADR_INT_PERI_STS)) & 0xfffff7ff))
+#define SET_MBOX_INT_2(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 12) | ((REG32(ADR_INT_PERI_STS)) & 0xffffefff))
+#define SET_MBOX_INT_3(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 13) | ((REG32(ADR_INT_PERI_STS)) & 0xffffdfff))
+#define SET_HCI_INT_1(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 14) | ((REG32(ADR_INT_PERI_STS)) & 0xffffbfff))
+#define SET_UART_RX_TIMEOUT(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 15) | ((REG32(ADR_INT_PERI_STS)) & 0xffff7fff))
+#define SET_UART_MULTI_IRQ(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 16) | ((REG32(ADR_INT_PERI_STS)) & 0xfffeffff))
+#define SET_ID_MNG_INT_2(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 17) | ((REG32(ADR_INT_PERI_STS)) & 0xfffdffff))
+#define SET_DMN_NOHIT_INT(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 18) | ((REG32(ADR_INT_PERI_STS)) & 0xfffbffff))
+#define SET_ID_THOLD_RX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 19) | ((REG32(ADR_INT_PERI_STS)) & 0xfff7ffff))
+#define SET_ID_THOLD_TX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 20) | ((REG32(ADR_INT_PERI_STS)) & 0xffefffff))
+#define SET_ID_DOUBLE_RLS(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 21) | ((REG32(ADR_INT_PERI_STS)) & 0xffdfffff))
+#define SET_RX_ID_LEN_THOLD(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 22) | ((REG32(ADR_INT_PERI_STS)) & 0xffbfffff))
+#define SET_TX_ID_LEN_THOLD(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 23) | ((REG32(ADR_INT_PERI_STS)) & 0xff7fffff))
+#define SET_ALL_ID_LEN_THOLD(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 24) | ((REG32(ADR_INT_PERI_STS)) & 0xfeffffff))
+#define SET_DMN_MCU_INT(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 25) | ((REG32(ADR_INT_PERI_STS)) & 0xfdffffff))
+#define SET_IRQ_DAT_UART_TX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 26) | ((REG32(ADR_INT_PERI_STS)) & 0xfbffffff))
+#define SET_IRQ_DAT_UART_RX(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 27) | ((REG32(ADR_INT_PERI_STS)) & 0xf7ffffff))
+#define SET_DAT_UART_RX_TIMEOUT(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 28) | ((REG32(ADR_INT_PERI_STS)) & 0xefffffff))
+#define SET_DAT_UART_MULTI_IRQ(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 29) | ((REG32(ADR_INT_PERI_STS)) & 0xdfffffff))
+#define SET_ALR_ABT_NOCHG_INT_IRQ(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 30) | ((REG32(ADR_INT_PERI_STS)) & 0xbfffffff))
+#define SET_TBLNEQ_MNGPKT_INT_IRQ(_VAL_) (REG32(ADR_INT_PERI_STS)) = (((_VAL_) << 31) | ((REG32(ADR_INT_PERI_STS)) & 0x7fffffff))
+#define SET_INTR_PERI_RAW(_VAL_) (REG32(ADR_INT_PERI_RAW)) = (((_VAL_) << 0) | ((REG32(ADR_INT_PERI_RAW)) & 0x00000000))
+#define SET_INTR_GPI00_CFG(_VAL_) (REG32(ADR_INT_GPI_CFG)) = (((_VAL_) << 0) | ((REG32(ADR_INT_GPI_CFG)) & 0xfffffffc))
+#define SET_INTR_GPI01_CFG(_VAL_) (REG32(ADR_INT_GPI_CFG)) = (((_VAL_) << 2) | ((REG32(ADR_INT_GPI_CFG)) & 0xfffffff3))
+#define SET_SYS_RST_INT(_VAL_) (REG32(ADR_SYS_INT_FOR_HOST)) = (((_VAL_) << 0) | ((REG32(ADR_SYS_INT_FOR_HOST)) & 0xfffffffe))
+#define SET_SPI_IPC_ADDR(_VAL_) (REG32(ADR_SPI_IPC)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_IPC)) & 0x00000000))
+#define SET_SD_MASK_TOP(_VAL_) (REG32(ADR_SDIO_MASK)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_MASK)) & 0x00000000))
+#define SET_IRQ_PHY_0_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffffe))
+#define SET_IRQ_PHY_1_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 1) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffffd))
+#define SET_IRQ_SDIO_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 2) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffffb))
+#define SET_IRQ_BEACON_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 3) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffff7))
+#define SET_IRQ_BEACON_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 4) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffffef))
+#define SET_IRQ_PRE_BEACON_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 5) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffffdf))
+#define SET_IRQ_EDCA0_TX_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 6) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffffbf))
+#define SET_IRQ_EDCA1_TX_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 7) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffff7f))
+#define SET_IRQ_EDCA2_TX_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 8) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffeff))
+#define SET_IRQ_EDCA3_TX_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 9) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffdff))
+#define SET_IRQ_EDCA4_TX_DONE_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 10) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffffbff))
+#define SET_IRQ_BEACON_DTIM_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 12) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffefff))
+#define SET_IRQ_EDCA0_LOWTHOLD_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 13) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffdfff))
+#define SET_IRQ_EDCA1_LOWTHOLD_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 14) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffffbfff))
+#define SET_IRQ_EDCA2_LOWTHOLD_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 15) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffff7fff))
+#define SET_IRQ_EDCA3_LOWTHOLD_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 16) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffeffff))
+#define SET_IRQ_FENCE_HIT_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 17) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffdffff))
+#define SET_IRQ_ILL_ADDR_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 18) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfffbffff))
+#define SET_IRQ_MBOX_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 19) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfff7ffff))
+#define SET_IRQ_US_TIMER0_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 20) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffefffff))
+#define SET_IRQ_US_TIMER1_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 21) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffdfffff))
+#define SET_IRQ_US_TIMER2_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 22) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xffbfffff))
+#define SET_IRQ_US_TIMER3_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 23) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xff7fffff))
+#define SET_IRQ_MS_TIMER0_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 24) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfeffffff))
+#define SET_IRQ_MS_TIMER1_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 25) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfdffffff))
+#define SET_IRQ_MS_TIMER2_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 26) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xfbffffff))
+#define SET_IRQ_MS_TIMER3_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 27) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xf7ffffff))
+#define SET_IRQ_TX_LIMIT_INT_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 28) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xefffffff))
+#define SET_IRQ_DMA0_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 29) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xdfffffff))
+#define SET_IRQ_CO_DMA_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 30) | ((REG32(ADR_SDIO_IRQ_STS)) & 0xbfffffff))
+#define SET_IRQ_PERI_GROUP_SD(_VAL_) (REG32(ADR_SDIO_IRQ_STS)) = (((_VAL_) << 31) | ((REG32(ADR_SDIO_IRQ_STS)) & 0x7fffffff))
+#define SET_INT_PERI_MASK_SD(_VAL_) (REG32(ADR_SD_PERI_MASK)) = (((_VAL_) << 0) | ((REG32(ADR_SD_PERI_MASK)) & 0x00000000))
+#define SET_PERI_RTC_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 0) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffffe))
+#define SET_IRQ_UART0_TX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 1) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffffd))
+#define SET_IRQ_UART0_RX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 2) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffffb))
+#define SET_PERI_GPI_SD_2(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 3) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffff7))
+#define SET_IRQ_SPI_IPC_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 4) | ((REG32(ADR_SD_PERI_STS)) & 0xffffffef))
+#define SET_PERI_GPI_SD_1_0(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 5) | ((REG32(ADR_SD_PERI_STS)) & 0xffffff9f))
+#define SET_SCRT_INT_1_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 7) | ((REG32(ADR_SD_PERI_STS)) & 0xffffff7f))
+#define SET_MMU_ALC_ERR_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 8) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffeff))
+#define SET_MMU_RLS_ERR_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 9) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffdff))
+#define SET_ID_MNG_INT_1_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 10) | ((REG32(ADR_SD_PERI_STS)) & 0xfffffbff))
+#define SET_MBOX_INT_1_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 11) | ((REG32(ADR_SD_PERI_STS)) & 0xfffff7ff))
+#define SET_MBOX_INT_2_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 12) | ((REG32(ADR_SD_PERI_STS)) & 0xffffefff))
+#define SET_MBOX_INT_3_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 13) | ((REG32(ADR_SD_PERI_STS)) & 0xffffdfff))
+#define SET_HCI_INT_1_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 14) | ((REG32(ADR_SD_PERI_STS)) & 0xffffbfff))
+#define SET_UART_RX_TIMEOUT_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 15) | ((REG32(ADR_SD_PERI_STS)) & 0xffff7fff))
+#define SET_UART_MULTI_IRQ_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 16) | ((REG32(ADR_SD_PERI_STS)) & 0xfffeffff))
+#define SET_ID_MNG_INT_2_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 17) | ((REG32(ADR_SD_PERI_STS)) & 0xfffdffff))
+#define SET_DMN_NOHIT_INT_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 18) | ((REG32(ADR_SD_PERI_STS)) & 0xfffbffff))
+#define SET_ID_THOLD_RX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 19) | ((REG32(ADR_SD_PERI_STS)) & 0xfff7ffff))
+#define SET_ID_THOLD_TX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 20) | ((REG32(ADR_SD_PERI_STS)) & 0xffefffff))
+#define SET_ID_DOUBLE_RLS_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 21) | ((REG32(ADR_SD_PERI_STS)) & 0xffdfffff))
+#define SET_RX_ID_LEN_THOLD_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 22) | ((REG32(ADR_SD_PERI_STS)) & 0xffbfffff))
+#define SET_TX_ID_LEN_THOLD_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 23) | ((REG32(ADR_SD_PERI_STS)) & 0xff7fffff))
+#define SET_ALL_ID_LEN_THOLD_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 24) | ((REG32(ADR_SD_PERI_STS)) & 0xfeffffff))
+#define SET_DMN_MCU_INT_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 25) | ((REG32(ADR_SD_PERI_STS)) & 0xfdffffff))
+#define SET_IRQ_DAT_UART_TX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 26) | ((REG32(ADR_SD_PERI_STS)) & 0xfbffffff))
+#define SET_IRQ_DAT_UART_RX_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 27) | ((REG32(ADR_SD_PERI_STS)) & 0xf7ffffff))
+#define SET_DAT_UART_RX_TIMEOUT_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 28) | ((REG32(ADR_SD_PERI_STS)) & 0xefffffff))
+#define SET_DAT_UART_MULTI_IRQ_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 29) | ((REG32(ADR_SD_PERI_STS)) & 0xdfffffff))
+#define SET_ALR_ABT_NOCHG_INT_IRQ_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 30) | ((REG32(ADR_SD_PERI_STS)) & 0xbfffffff))
+#define SET_TBLNEQ_MNGPKT_INT_IRQ_SD(_VAL_) (REG32(ADR_SD_PERI_STS)) = (((_VAL_) << 31) | ((REG32(ADR_SD_PERI_STS)) & 0x7fffffff))
+#define SET_DBG_SPI_MODE(_VAL_) (REG32(ADR_DBG_SPI_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_SPI_MODE)) & 0x00000000))
+#define SET_DBG_RX_QUOTA(_VAL_) (REG32(ADR_DBG_RX_QUOTA)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_RX_QUOTA)) & 0xffff0000))
+#define SET_DBG_CONDI_NUM(_VAL_) (REG32(ADR_DBG_CONDITION_NUMBER)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_CONDITION_NUMBER)) & 0xffffff00))
+#define SET_DBG_HOST_PATH(_VAL_) (REG32(ADR_DBG_HOST_PATH)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_HOST_PATH)) & 0xfffffffe))
+#define SET_DBG_TX_SEG(_VAL_) (REG32(ADR_DBG_TX_SEG)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_TX_SEG)) & 0x00000000))
+#define SET_DBG_BRST_MODE(_VAL_) (REG32(ADR_DBG_DEBUG_BURST_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_DEBUG_BURST_MODE)) & 0xfffffffe))
+#define SET_DBG_CLK_WIDTH(_VAL_) (REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) & 0xffff0000))
+#define SET_DBG_CSN_INTER(_VAL_) (REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) & 0x0000ffff))
+#define SET_DBG_BACK_DLY(_VAL_) (REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) & 0xffff0000))
+#define SET_DBG_FRONT_DLY(_VAL_) (REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) & 0x0000ffff))
+#define SET_DBG_RX_FIFO_FAIL(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 1) | ((REG32(ADR_DBG_SPI_STS)) & 0xfffffffd))
+#define SET_DBG_RX_HOST_FAIL(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 2) | ((REG32(ADR_DBG_SPI_STS)) & 0xfffffffb))
+#define SET_DBG_TX_FIFO_FAIL(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 3) | ((REG32(ADR_DBG_SPI_STS)) & 0xfffffff7))
+#define SET_DBG_TX_HOST_FAIL(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 4) | ((REG32(ADR_DBG_SPI_STS)) & 0xffffffef))
+#define SET_DBG_SPI_DOUBLE_ALLOC(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 5) | ((REG32(ADR_DBG_SPI_STS)) & 0xffffffdf))
+#define SET_DBG_SPI_TX_NO_ALLOC(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 6) | ((REG32(ADR_DBG_SPI_STS)) & 0xffffffbf))
+#define SET_DBG_RDATA_RDY(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 7) | ((REG32(ADR_DBG_SPI_STS)) & 0xffffff7f))
+#define SET_DBG_SPI_ALLOC_STATUS(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 8) | ((REG32(ADR_DBG_SPI_STS)) & 0xfffffeff))
+#define SET_DBG_SPI_DBG_WR_FIFO_FULL(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 9) | ((REG32(ADR_DBG_SPI_STS)) & 0xfffffdff))
+#define SET_DBG_RX_LEN(_VAL_) (REG32(ADR_DBG_SPI_STS)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_SPI_STS)) & 0x0000ffff))
+#define SET_DBG_SPI_TX_ALLOC_SIZE_SHIFT_BITS(_VAL_) (REG32(ADR_DBG_TX_ALLOC_SET)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_TX_ALLOC_SET)) & 0xfffffff8))
+#define SET_DBG_SPI_HOST_TX_ALLOC_PKBUF(_VAL_) (REG32(ADR_DBG_TX_ALLOC_SET)) = (((_VAL_) << 8) | ((REG32(ADR_DBG_TX_ALLOC_SET)) & 0xfffffeff))
+#define SET_DBG_SPI_TX_ALLOC_SIZE(_VAL_) (REG32(ADR_DBG_TX_ALLOC)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_TX_ALLOC)) & 0xffffff00))
+#define SET_DBG_RD_DAT_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_DBG_CNT)) & 0xffff0000))
+#define SET_DBG_RD_STS_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_DBG_CNT)) & 0x0000ffff))
+#define SET_DBG_JUDGE_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT2)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_DBG_CNT2)) & 0xffff0000))
+#define SET_DBG_RD_STS_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT2)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_DBG_CNT2)) & 0xfffeffff))
+#define SET_DBG_RD_DAT_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT2)) = (((_VAL_) << 17) | ((REG32(ADR_DBG_DBG_CNT2)) & 0xfffdffff))
+#define SET_DBG_JUDGE_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT2)) = (((_VAL_) << 18) | ((REG32(ADR_DBG_DBG_CNT2)) & 0xfffbffff))
+#define SET_DBG_TX_DONE_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT3)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_DBG_CNT3)) & 0xffff0000))
+#define SET_DBG_TX_DISCARD_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT3)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_DBG_CNT3)) & 0x0000ffff))
+#define SET_DBG_TX_SET_CNT(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xffff0000))
+#define SET_DBG_TX_DISCARD_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xfffeffff))
+#define SET_DBG_TX_DONE_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 17) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xfffdffff))
+#define SET_DBG_TX_SET_CNT_CLR(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 18) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xfffbffff))
+#define SET_DBG_DAT_MODE_OFF(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 19) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xfff7ffff))
+#define SET_DBG_TX_FIFO_RESIDUE(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 20) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xff8fffff))
+#define SET_DBG_RX_FIFO_RESIDUE(_VAL_) (REG32(ADR_DBG_DBG_CNT4)) = (((_VAL_) << 24) | ((REG32(ADR_DBG_DBG_CNT4)) & 0xf8ffffff))
+#define SET_DBG_RX_RDY(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_INT_TAG)) & 0xfffffffe))
+#define SET_DBG_SDIO_SYS_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 2) | ((REG32(ADR_DBG_INT_TAG)) & 0xfffffffb))
+#define SET_DBG_EDCA0_LOWTHOLD_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 3) | ((REG32(ADR_DBG_INT_TAG)) & 0xfffffff7))
+#define SET_DBG_EDCA1_LOWTHOLD_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 4) | ((REG32(ADR_DBG_INT_TAG)) & 0xffffffef))
+#define SET_DBG_EDCA2_LOWTHOLD_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 5) | ((REG32(ADR_DBG_INT_TAG)) & 0xffffffdf))
+#define SET_DBG_EDCA3_LOWTHOLD_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 6) | ((REG32(ADR_DBG_INT_TAG)) & 0xffffffbf))
+#define SET_DBG_TX_LIMIT_INT_IN(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 7) | ((REG32(ADR_DBG_INT_TAG)) & 0xffffff7f))
+#define SET_DBG_SPI_FN1(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 8) | ((REG32(ADR_DBG_INT_TAG)) & 0xffff80ff))
+#define SET_DBG_SPI_CLK_EN_INT(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 15) | ((REG32(ADR_DBG_INT_TAG)) & 0xffff7fff))
+#define SET_DBG_SPI_HOST_MASK(_VAL_) (REG32(ADR_DBG_INT_TAG)) = (((_VAL_) << 16) | ((REG32(ADR_DBG_INT_TAG)) & 0xff00ffff))
+#define SET_BOOT_ADDR(_VAL_) (REG32(ADR_BOOT_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_BOOT_ADDR)) & 0xff000000))
+#define SET_CHECK_SUM_FAIL(_VAL_) (REG32(ADR_BOOT_ADDR)) = (((_VAL_) << 31) | ((REG32(ADR_BOOT_ADDR)) & 0x7fffffff))
+#define SET_VERIFY_DATA(_VAL_) (REG32(ADR_VERIFY_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_VERIFY_DATA)) & 0x00000000))
+#define SET_FLASH_ADDR(_VAL_) (REG32(ADR_FLASH_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_FLASH_ADDR)) & 0xff000000))
+#define SET_FLASH_CMD_CLR(_VAL_) (REG32(ADR_FLASH_ADDR)) = (((_VAL_) << 28) | ((REG32(ADR_FLASH_ADDR)) & 0xefffffff))
+#define SET_FLASH_DMA_CLR(_VAL_) (REG32(ADR_FLASH_ADDR)) = (((_VAL_) << 29) | ((REG32(ADR_FLASH_ADDR)) & 0xdfffffff))
+#define SET_DMA_EN(_VAL_) (REG32(ADR_FLASH_ADDR)) = (((_VAL_) << 30) | ((REG32(ADR_FLASH_ADDR)) & 0xbfffffff))
+#define SET_DMA_BUSY(_VAL_) (REG32(ADR_FLASH_ADDR)) = (((_VAL_) << 31) | ((REG32(ADR_FLASH_ADDR)) & 0x7fffffff))
+#define SET_SRAM_ADDR(_VAL_) (REG32(ADR_SRAM_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_SRAM_ADDR)) & 0x00000000))
+#define SET_FLASH_DMA_LEN(_VAL_) (REG32(ADR_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_LEN)) & 0x00000000))
+#define SET_FLASH_FRONT_DLY(_VAL_) (REG32(ADR_SPI_PARAM)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_PARAM)) & 0xffff0000))
+#define SET_FLASH_BACK_DLY(_VAL_) (REG32(ADR_SPI_PARAM)) = (((_VAL_) << 16) | ((REG32(ADR_SPI_PARAM)) & 0x0000ffff))
+#define SET_FLASH_CLK_WIDTH(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 0) | ((REG32(ADR_SPI_PARAM2)) & 0xffff0000))
+#define SET_SPI_BUSY(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 16) | ((REG32(ADR_SPI_PARAM2)) & 0xfffeffff))
+#define SET_FLS_REMAP(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 17) | ((REG32(ADR_SPI_PARAM2)) & 0xfffdffff))
+#define SET_PBUS_SWP(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 18) | ((REG32(ADR_SPI_PARAM2)) & 0xfffbffff))
+#define SET_BIT_MODE1(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 19) | ((REG32(ADR_SPI_PARAM2)) & 0xfff7ffff))
+#define SET_BIT_MODE2(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 20) | ((REG32(ADR_SPI_PARAM2)) & 0xffefffff))
+#define SET_BIT_MODE4(_VAL_) (REG32(ADR_SPI_PARAM2)) = (((_VAL_) << 21) | ((REG32(ADR_SPI_PARAM2)) & 0xffdfffff))
+#define SET_BOOT_CHECK_SUM(_VAL_) (REG32(ADR_CHECK_SUM_RESULT)) = (((_VAL_) << 0) | ((REG32(ADR_CHECK_SUM_RESULT)) & 0x00000000))
+#define SET_CHECK_SUM_TAG(_VAL_) (REG32(ADR_CHECK_SUM_IN_FILE)) = (((_VAL_) << 0) | ((REG32(ADR_CHECK_SUM_IN_FILE)) & 0x00000000))
+#define SET_CMD_LEN(_VAL_) (REG32(ADR_COMMAND_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_COMMAND_LEN)) & 0xffff0000))
+#define SET_CMD_ADDR(_VAL_) (REG32(ADR_COMMAND_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_COMMAND_ADDR)) & 0x00000000))
+#define SET_DMA_ADR_SRC(_VAL_) (REG32(ADR_DMA_ADR_SRC)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_ADR_SRC)) & 0x00000000))
+#define SET_DMA_ADR_DST(_VAL_) (REG32(ADR_DMA_ADR_DST)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_ADR_DST)) & 0x00000000))
+#define SET_DMA_SRC_SIZE(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_CTRL)) & 0xfffffff8))
+#define SET_DMA_SRC_INC(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 3) | ((REG32(ADR_DMA_CTRL)) & 0xfffffff7))
+#define SET_DMA_DST_SIZE(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 4) | ((REG32(ADR_DMA_CTRL)) & 0xffffff8f))
+#define SET_DMA_DST_INC(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 7) | ((REG32(ADR_DMA_CTRL)) & 0xffffff7f))
+#define SET_DMA_FAST_FILL(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_DMA_CTRL)) & 0xfffffeff))
+#define SET_DMA_SDIO_KICK(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 12) | ((REG32(ADR_DMA_CTRL)) & 0xffffefff))
+#define SET_DMA_BADR_EN(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 13) | ((REG32(ADR_DMA_CTRL)) & 0xffffdfff))
+#define SET_DMA_LEN(_VAL_) (REG32(ADR_DMA_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_DMA_CTRL)) & 0x0000ffff))
+#define SET_DMA_INT_MASK(_VAL_) (REG32(ADR_DMA_INT)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_INT)) & 0xfffffffe))
+#define SET_DMA_STS(_VAL_) (REG32(ADR_DMA_INT)) = (((_VAL_) << 8) | ((REG32(ADR_DMA_INT)) & 0xfffffeff))
+#define SET_DMA_FINISH(_VAL_) (REG32(ADR_DMA_INT)) = (((_VAL_) << 31) | ((REG32(ADR_DMA_INT)) & 0x7fffffff))
+#define SET_DMA_CONST(_VAL_) (REG32(ADR_DMA_FILL_CONST)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_FILL_CONST)) & 0x00000000))
+#define SET_SLEEP_WAKE_CNT(_VAL_) (REG32(ADR_PMU_0)) = (((_VAL_) << 0) | ((REG32(ADR_PMU_0)) & 0xff000000))
+#define SET_RG_DLDO_LEVEL(_VAL_) (REG32(ADR_PMU_0)) = (((_VAL_) << 24) | ((REG32(ADR_PMU_0)) & 0xf8ffffff))
+#define SET_RG_DLDO_BOOST_IQ(_VAL_) (REG32(ADR_PMU_0)) = (((_VAL_) << 27) | ((REG32(ADR_PMU_0)) & 0xf7ffffff))
+#define SET_RG_BUCK_LEVEL(_VAL_) (REG32(ADR_PMU_0)) = (((_VAL_) << 28) | ((REG32(ADR_PMU_0)) & 0x8fffffff))
+#define SET_RG_BUCK_VREF_SEL(_VAL_) (REG32(ADR_PMU_0)) = (((_VAL_) << 31) | ((REG32(ADR_PMU_0)) & 0x7fffffff))
+#define SET_RG_RTC_OSC_RES_SW_MANUAL(_VAL_) (REG32(ADR_PMU_1)) = (((_VAL_) << 0) | ((REG32(ADR_PMU_1)) & 0xfffffc00))
+#define SET_RG_RTC_OSC_RES_SW(_VAL_) (REG32(ADR_PMU_1)) = (((_VAL_) << 16) | ((REG32(ADR_PMU_1)) & 0xfc00ffff))
+#define SET_RTC_OSC_CAL_RES_RDY(_VAL_) (REG32(ADR_PMU_1)) = (((_VAL_) << 31) | ((REG32(ADR_PMU_1)) & 0x7fffffff))
+#define SET_RG_DCDC_MODE(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 0) | ((REG32(ADR_PMU_2)) & 0xfffffffe))
+#define SET_RG_BUCK_EN_PSM(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 4) | ((REG32(ADR_PMU_2)) & 0xffffffef))
+#define SET_RG_BUCK_PSM_VTH(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 8) | ((REG32(ADR_PMU_2)) & 0xfffffeff))
+#define SET_RG_RTC_OSC_RES_SW_MANUAL_EN(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 12) | ((REG32(ADR_PMU_2)) & 0xffffefff))
+#define SET_RG_RTC_RDY_DEGLITCH_TIMER(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 13) | ((REG32(ADR_PMU_2)) & 0xffff9fff))
+#define SET_RTC_CAL_ENA(_VAL_) (REG32(ADR_PMU_2)) = (((_VAL_) << 16) | ((REG32(ADR_PMU_2)) & 0xfffeffff))
+#define SET_PMU_WAKE_TRIG_EVENT(_VAL_) (REG32(ADR_PMU_3)) = (((_VAL_) << 0) | ((REG32(ADR_PMU_3)) & 0xfffffffc))
+#define SET_DIGI_TOP_POR_MASK(_VAL_) (REG32(ADR_PMU_3)) = (((_VAL_) << 4) | ((REG32(ADR_PMU_3)) & 0xffffffef))
+#define SET_PMU_ENTER_SLEEP_MODE(_VAL_) (REG32(ADR_PMU_3)) = (((_VAL_) << 8) | ((REG32(ADR_PMU_3)) & 0xfffffeff))
+#define SET_RG_RTC_DUMMIES(_VAL_) (REG32(ADR_PMU_3)) = (((_VAL_) << 16) | ((REG32(ADR_PMU_3)) & 0x0000ffff))
+#define SET_RTC_EN(_VAL_) (REG32(ADR_RTC_1)) = (((_VAL_) << 0) | ((REG32(ADR_RTC_1)) & 0xfffffffe))
+#define SET_RTC_SRC(_VAL_) (REG32(ADR_RTC_1)) = (((_VAL_) << 1) | ((REG32(ADR_RTC_1)) & 0xfffffffd))
+#define SET_RTC_TICK_CNT(_VAL_) (REG32(ADR_RTC_1)) = (((_VAL_) << 16) | ((REG32(ADR_RTC_1)) & 0x8000ffff))
+#define SET_RTC_INT_SEC_MASK(_VAL_) (REG32(ADR_RTC_2)) = (((_VAL_) << 0) | ((REG32(ADR_RTC_2)) & 0xfffffffe))
+#define SET_RTC_INT_ALARM_MASK(_VAL_) (REG32(ADR_RTC_2)) = (((_VAL_) << 1) | ((REG32(ADR_RTC_2)) & 0xfffffffd))
+#define SET_RTC_INT_SEC(_VAL_) (REG32(ADR_RTC_2)) = (((_VAL_) << 16) | ((REG32(ADR_RTC_2)) & 0xfffeffff))
+#define SET_RTC_INT_ALARM(_VAL_) (REG32(ADR_RTC_2)) = (((_VAL_) << 17) | ((REG32(ADR_RTC_2)) & 0xfffdffff))
+#define SET_RTC_SEC_START_CNT(_VAL_) (REG32(ADR_RTC_3W)) = (((_VAL_) << 0) | ((REG32(ADR_RTC_3W)) & 0x00000000))
+#define SET_RTC_SEC_CNT(_VAL_) (REG32(ADR_RTC_3R)) = (((_VAL_) << 0) | ((REG32(ADR_RTC_3R)) & 0x00000000))
+#define SET_RTC_SEC_ALARM_VALUE(_VAL_) (REG32(ADR_RTC_4)) = (((_VAL_) << 0) | ((REG32(ADR_RTC_4)) & 0x00000000))
+#define SET_D2_DMA_ADR_SRC(_VAL_) (REG32(ADR_D2_DMA_ADR_SRC)) = (((_VAL_) << 0) | ((REG32(ADR_D2_DMA_ADR_SRC)) & 0x00000000))
+#define SET_D2_DMA_ADR_DST(_VAL_) (REG32(ADR_D2_DMA_ADR_DST)) = (((_VAL_) << 0) | ((REG32(ADR_D2_DMA_ADR_DST)) & 0x00000000))
+#define SET_D2_DMA_SRC_SIZE(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_D2_DMA_CTRL)) & 0xfffffff8))
+#define SET_D2_DMA_SRC_INC(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 3) | ((REG32(ADR_D2_DMA_CTRL)) & 0xfffffff7))
+#define SET_D2_DMA_DST_SIZE(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 4) | ((REG32(ADR_D2_DMA_CTRL)) & 0xffffff8f))
+#define SET_D2_DMA_DST_INC(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 7) | ((REG32(ADR_D2_DMA_CTRL)) & 0xffffff7f))
+#define SET_D2_DMA_FAST_FILL(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_D2_DMA_CTRL)) & 0xfffffeff))
+#define SET_D2_DMA_SDIO_KICK(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 12) | ((REG32(ADR_D2_DMA_CTRL)) & 0xffffefff))
+#define SET_D2_DMA_BADR_EN(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 13) | ((REG32(ADR_D2_DMA_CTRL)) & 0xffffdfff))
+#define SET_D2_DMA_LEN(_VAL_) (REG32(ADR_D2_DMA_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_D2_DMA_CTRL)) & 0x0000ffff))
+#define SET_D2_DMA_INT_MASK(_VAL_) (REG32(ADR_D2_DMA_INT)) = (((_VAL_) << 0) | ((REG32(ADR_D2_DMA_INT)) & 0xfffffffe))
+#define SET_D2_DMA_STS(_VAL_) (REG32(ADR_D2_DMA_INT)) = (((_VAL_) << 8) | ((REG32(ADR_D2_DMA_INT)) & 0xfffffeff))
+#define SET_D2_DMA_FINISH(_VAL_) (REG32(ADR_D2_DMA_INT)) = (((_VAL_) << 31) | ((REG32(ADR_D2_DMA_INT)) & 0x7fffffff))
+#define SET_D2_DMA_CONST(_VAL_) (REG32(ADR_D2_DMA_FILL_CONST)) = (((_VAL_) << 0) | ((REG32(ADR_D2_DMA_FILL_CONST)) & 0x00000000))
+#define SET_TRAP_UNKNOWN_TYPE(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 0) | ((REG32(ADR_CONTROL)) & 0xfffffffe))
+#define SET_TX_ON_DEMAND_ENA(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 1) | ((REG32(ADR_CONTROL)) & 0xfffffffd))
+#define SET_RX_2_HOST(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 2) | ((REG32(ADR_CONTROL)) & 0xfffffffb))
+#define SET_AUTO_SEQNO(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 3) | ((REG32(ADR_CONTROL)) & 0xfffffff7))
+#define SET_BYPASSS_TX_PARSER_ENCAP(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 4) | ((REG32(ADR_CONTROL)) & 0xffffffef))
+#define SET_HDR_STRIP(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 5) | ((REG32(ADR_CONTROL)) & 0xffffffdf))
+#define SET_ERP_PROTECT(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 6) | ((REG32(ADR_CONTROL)) & 0xffffff3f))
+#define SET_PRO_VER(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 8) | ((REG32(ADR_CONTROL)) & 0xfffffcff))
+#define SET_TXQ_ID0(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 12) | ((REG32(ADR_CONTROL)) & 0xffff8fff))
+#define SET_TXQ_ID1(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 16) | ((REG32(ADR_CONTROL)) & 0xfff8ffff))
+#define SET_TX_ETHER_TRAP_EN(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 20) | ((REG32(ADR_CONTROL)) & 0xffefffff))
+#define SET_RX_ETHER_TRAP_EN(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 21) | ((REG32(ADR_CONTROL)) & 0xffdfffff))
+#define SET_RX_NULL_TRAP_EN(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 22) | ((REG32(ADR_CONTROL)) & 0xffbfffff))
+#define SET_RX_GET_TX_QUEUE_EN(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 25) | ((REG32(ADR_CONTROL)) & 0xfdffffff))
+#define SET_HCI_INQ_SEL(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 26) | ((REG32(ADR_CONTROL)) & 0xfbffffff))
+#define SET_TRX_DEBUG_CNT_ENA(_VAL_) (REG32(ADR_CONTROL)) = (((_VAL_) << 28) | ((REG32(ADR_CONTROL)) & 0xefffffff))
+#define SET_WAKE_SOON_WITH_SCK(_VAL_) (REG32(ADR_SDIO_WAKE_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_WAKE_MODE)) & 0xfffffffe))
+#define SET_TX_FLOW_CTRL(_VAL_) (REG32(ADR_TX_FLOW_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_FLOW_0)) & 0xffff0000))
+#define SET_TX_FLOW_MGMT(_VAL_) (REG32(ADR_TX_FLOW_0)) = (((_VAL_) << 16) | ((REG32(ADR_TX_FLOW_0)) & 0x0000ffff))
+#define SET_TX_FLOW_DATA(_VAL_) (REG32(ADR_TX_FLOW_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_FLOW_1)) & 0x00000000))
+#define SET_DOT11RTSTHRESHOLD(_VAL_) (REG32(ADR_THREASHOLD)) = (((_VAL_) << 16) | ((REG32(ADR_THREASHOLD)) & 0x0000ffff))
+#define SET_TXF_ID(_VAL_) (REG32(ADR_TXFID_INCREASE)) = (((_VAL_) << 0) | ((REG32(ADR_TXFID_INCREASE)) & 0xffffffc0))
+#define SET_SEQ_CTRL(_VAL_) (REG32(ADR_GLOBAL_SEQUENCE)) = (((_VAL_) << 0) | ((REG32(ADR_GLOBAL_SEQUENCE)) & 0xffff0000))
+#define SET_TX_PBOFFSET(_VAL_) (REG32(ADR_HCI_TX_RX_INFO_SIZE)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0xffffff00))
+#define SET_TX_INFO_SIZE(_VAL_) (REG32(ADR_HCI_TX_RX_INFO_SIZE)) = (((_VAL_) << 8) | ((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0xffff00ff))
+#define SET_RX_INFO_SIZE(_VAL_) (REG32(ADR_HCI_TX_RX_INFO_SIZE)) = (((_VAL_) << 16) | ((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0xff00ffff))
+#define SET_RX_LAST_PHY_SIZE(_VAL_) (REG32(ADR_HCI_TX_RX_INFO_SIZE)) = (((_VAL_) << 24) | ((REG32(ADR_HCI_TX_RX_INFO_SIZE)) & 0x00ffffff))
+#define SET_TX_INFO_CLEAR_SIZE(_VAL_) (REG32(ADR_HCI_TX_INFO_CLEAR)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_TX_INFO_CLEAR)) & 0xffffffc0))
+#define SET_TX_INFO_CLEAR_ENABLE(_VAL_) (REG32(ADR_HCI_TX_INFO_CLEAR)) = (((_VAL_) << 8) | ((REG32(ADR_HCI_TX_INFO_CLEAR)) & 0xfffffeff))
+#define SET_TXTRAP_ETHTYPE1(_VAL_) (REG32(ADR_TX_ETHER_TYPE_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ETHER_TYPE_1)) & 0xffff0000))
+#define SET_TXTRAP_ETHTYPE0(_VAL_) (REG32(ADR_TX_ETHER_TYPE_1)) = (((_VAL_) << 16) | ((REG32(ADR_TX_ETHER_TYPE_1)) & 0x0000ffff))
+#define SET_RXTRAP_ETHTYPE1(_VAL_) (REG32(ADR_RX_ETHER_TYPE_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ETHER_TYPE_1)) & 0xffff0000))
+#define SET_RXTRAP_ETHTYPE0(_VAL_) (REG32(ADR_RX_ETHER_TYPE_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_ETHER_TYPE_1)) & 0x0000ffff))
+#define SET_TX_PKT_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_0)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_0)) & 0x00000000))
+#define SET_RX_PKT_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_1)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_1)) & 0x00000000))
+#define SET_HOST_CMD_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_2)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_2)) & 0xffffff00))
+#define SET_HOST_EVENT_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_3)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_3)) & 0xffffff00))
+#define SET_TX_PKT_DROP_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_4)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_4)) & 0xffffff00))
+#define SET_RX_PKT_DROP_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_5)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_5)) & 0xffffff00))
+#define SET_TX_PKT_TRAP_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_6)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_6)) & 0xffffff00))
+#define SET_RX_PKT_TRAP_COUNTER(_VAL_) (REG32(ADR_PACKET_COUNTER_INFO_7)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_COUNTER_INFO_7)) & 0xffffff00))
+#define SET_HOST_TX_FAIL_COUNTER(_VAL_) (REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_0)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_0)) & 0xffffff00))
+#define SET_HOST_RX_FAIL_COUNTER(_VAL_) (REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_1)) & 0xffffff00))
+#define SET_HCI_STATE_MONITOR(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_0)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_0)) & 0x00000000))
+#define SET_HCI_ST_TIMEOUT_MONITOR(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_1)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_1)) & 0x00000000))
+#define SET_TX_ON_DEMAND_LENGTH(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_2)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_2)) & 0x00000000))
+#define SET_HCI_MONITOR_REG1(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_3)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_3)) & 0x00000000))
+#define SET_HCI_MONITOR_REG2(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_4)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_4)) & 0x00000000))
+#define SET_HCI_TX_ALLOC_TIME_31_0(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_5)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_5)) & 0x00000000))
+#define SET_HCI_TX_ALLOC_TIME_47_32(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_6)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_6)) & 0xffff0000))
+#define SET_HCI_MB_MAX_CNT(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_6)) = (((_VAL_) << 16) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_6)) & 0xff00ffff))
+#define SET_HCI_TX_ALLOC_CNT_31_0(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_7)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_7)) & 0x00000000))
+#define SET_HCI_TX_ALLOC_CNT_47_32(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_8)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0xffff0000))
+#define SET_HCI_PROC_CNT(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_8)) = (((_VAL_) << 16) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0xff00ffff))
+#define SET_SDIO_TRANS_CNT(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_8)) = (((_VAL_) << 24) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_8)) & 0x00ffffff))
+#define SET_SDIO_TX_INVALID_CNT_31_0(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_9)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_9)) & 0x00000000))
+#define SET_SDIO_TX_INVALID_CNT_47_32(_VAL_) (REG32(ADR_HCI_STATE_DEBUG_MODE_10)) = (((_VAL_) << 0) | ((REG32(ADR_HCI_STATE_DEBUG_MODE_10)) & 0xffff0000))
+#define SET_CS_START_ADDR(_VAL_) (REG32(ADR_CS_START_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_CS_START_ADDR)) & 0xffff0000))
+#define SET_CS_PKT_ID(_VAL_) (REG32(ADR_CS_START_ADDR)) = (((_VAL_) << 16) | ((REG32(ADR_CS_START_ADDR)) & 0xff80ffff))
+#define SET_ADD_LEN(_VAL_) (REG32(ADR_CS_ADD_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_CS_ADD_LEN)) & 0xffff0000))
+#define SET_CS_ADDER_EN(_VAL_) (REG32(ADR_CS_CMD)) = (((_VAL_) << 0) | ((REG32(ADR_CS_CMD)) & 0xfffffffe))
+#define SET_PSEUDO(_VAL_) (REG32(ADR_CS_CMD)) = (((_VAL_) << 1) | ((REG32(ADR_CS_CMD)) & 0xfffffffd))
+#define SET_CALCULATE(_VAL_) (REG32(ADR_CS_INI_BUF)) = (((_VAL_) << 0) | ((REG32(ADR_CS_INI_BUF)) & 0x00000000))
+#define SET_L4_LEN(_VAL_) (REG32(ADR_CS_PSEUDO_BUF)) = (((_VAL_) << 0) | ((REG32(ADR_CS_PSEUDO_BUF)) & 0xffff0000))
+#define SET_L4_PROTOL(_VAL_) (REG32(ADR_CS_PSEUDO_BUF)) = (((_VAL_) << 16) | ((REG32(ADR_CS_PSEUDO_BUF)) & 0xff00ffff))
+#define SET_CHECK_SUM(_VAL_) (REG32(ADR_CS_CHECK_SUM)) = (((_VAL_) << 0) | ((REG32(ADR_CS_CHECK_SUM)) & 0xffff0000))
+#define SET_RAND_EN(_VAL_) (REG32(ADR_RAND_EN)) = (((_VAL_) << 0) | ((REG32(ADR_RAND_EN)) & 0xfffffffe))
+#define SET_RAND_NUM(_VAL_) (REG32(ADR_RAND_NUM)) = (((_VAL_) << 0) | ((REG32(ADR_RAND_NUM)) & 0x00000000))
+#define SET_MUL_OP1(_VAL_) (REG32(ADR_MUL_OP1)) = (((_VAL_) << 0) | ((REG32(ADR_MUL_OP1)) & 0x00000000))
+#define SET_MUL_OP2(_VAL_) (REG32(ADR_MUL_OP2)) = (((_VAL_) << 0) | ((REG32(ADR_MUL_OP2)) & 0x00000000))
+#define SET_MUL_ANS0(_VAL_) (REG32(ADR_MUL_ANS0)) = (((_VAL_) << 0) | ((REG32(ADR_MUL_ANS0)) & 0x00000000))
+#define SET_MUL_ANS1(_VAL_) (REG32(ADR_MUL_ANS1)) = (((_VAL_) << 0) | ((REG32(ADR_MUL_ANS1)) & 0x00000000))
+#define SET_RD_ADDR(_VAL_) (REG32(ADR_DMA_RDATA)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_RDATA)) & 0xffff0000))
+#define SET_RD_ID(_VAL_) (REG32(ADR_DMA_RDATA)) = (((_VAL_) << 16) | ((REG32(ADR_DMA_RDATA)) & 0xff80ffff))
+#define SET_WR_ADDR(_VAL_) (REG32(ADR_DMA_WDATA)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_WDATA)) & 0xffff0000))
+#define SET_WR_ID(_VAL_) (REG32(ADR_DMA_WDATA)) = (((_VAL_) << 16) | ((REG32(ADR_DMA_WDATA)) & 0xff80ffff))
+#define SET_LEN(_VAL_) (REG32(ADR_DMA_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_LEN)) & 0xffff0000))
+#define SET_CLR(_VAL_) (REG32(ADR_DMA_CLR)) = (((_VAL_) << 0) | ((REG32(ADR_DMA_CLR)) & 0xfffffffe))
+#define SET_PHY_MODE(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_NAV_DATA)) & 0xfffffffc))
+#define SET_SHRT_PREAM(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 2) | ((REG32(ADR_NAV_DATA)) & 0xfffffffb))
+#define SET_SHRT_GI(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 3) | ((REG32(ADR_NAV_DATA)) & 0xfffffff7))
+#define SET_DATA_RATE(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 4) | ((REG32(ADR_NAV_DATA)) & 0xfffff80f))
+#define SET_MCS(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 12) | ((REG32(ADR_NAV_DATA)) & 0xffff8fff))
+#define SET_FRAME_LEN(_VAL_) (REG32(ADR_NAV_DATA)) = (((_VAL_) << 16) | ((REG32(ADR_NAV_DATA)) & 0x0000ffff))
+#define SET_DURATION(_VAL_) (REG32(ADR_CO_NAV)) = (((_VAL_) << 0) | ((REG32(ADR_CO_NAV)) & 0xffff0000))
+#define SET_SHA_DST_ADDR(_VAL_) (REG32(ADR_SHA_DST_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_SHA_DST_ADDR)) & 0x00000000))
+#define SET_SHA_SRC_ADDR(_VAL_) (REG32(ADR_SHA_SRC_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_SHA_SRC_ADDR)) & 0x00000000))
+#define SET_SHA_BUSY(_VAL_) (REG32(ADR_SHA_SETTING)) = (((_VAL_) << 0) | ((REG32(ADR_SHA_SETTING)) & 0xfffffffe))
+#define SET_SHA_ENDIAN(_VAL_) (REG32(ADR_SHA_SETTING)) = (((_VAL_) << 1) | ((REG32(ADR_SHA_SETTING)) & 0xfffffffd))
+#define SET_EFS_CLKFREQ(_VAL_) (REG32(ADR_EFUSE_CLK_FREQ)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_CLK_FREQ)) & 0xfffff000))
+#define SET_LOW_ACTIVE(_VAL_) (REG32(ADR_EFUSE_CLK_FREQ)) = (((_VAL_) << 16) | ((REG32(ADR_EFUSE_CLK_FREQ)) & 0xfffeffff))
+#define SET_EFS_CLKFREQ_RD(_VAL_) (REG32(ADR_EFUSE_CLK_FREQ)) = (((_VAL_) << 20) | ((REG32(ADR_EFUSE_CLK_FREQ)) & 0xf00fffff))
+#define SET_EFS_PRE_RD(_VAL_) (REG32(ADR_EFUSE_CLK_FREQ)) = (((_VAL_) << 28) | ((REG32(ADR_EFUSE_CLK_FREQ)) & 0x0fffffff))
+#define SET_EFS_LDO_ON(_VAL_) (REG32(ADR_EFUSE_LDO_TIME)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_LDO_TIME)) & 0xffff0000))
+#define SET_EFS_LDO_OFF(_VAL_) (REG32(ADR_EFUSE_LDO_TIME)) = (((_VAL_) << 16) | ((REG32(ADR_EFUSE_LDO_TIME)) & 0x0000ffff))
+#define SET_EFS_RDATA_0(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_0)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_0)) & 0x00000000))
+#define SET_EFS_WDATA_0(_VAL_) (REG32(ADR_EFUSE_WDATA_0)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_0)) & 0x00000000))
+#define SET_EFS_RDATA_1(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_1)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_1)) & 0x00000000))
+#define SET_EFS_WDATA_1(_VAL_) (REG32(ADR_EFUSE_WDATA_1)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_1)) & 0x00000000))
+#define SET_EFS_RDATA_2(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_2)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_2)) & 0x00000000))
+#define SET_EFS_WDATA_2(_VAL_) (REG32(ADR_EFUSE_WDATA_2)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_2)) & 0x00000000))
+#define SET_EFS_RDATA_3(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_3)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_3)) & 0x00000000))
+#define SET_EFS_WDATA_3(_VAL_) (REG32(ADR_EFUSE_WDATA_3)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_3)) & 0x00000000))
+#define SET_EFS_RDATA_4(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_4)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_4)) & 0x00000000))
+#define SET_EFS_WDATA_4(_VAL_) (REG32(ADR_EFUSE_WDATA_4)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_4)) & 0x00000000))
+#define SET_EFS_RDATA_5(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_5)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_5)) & 0x00000000))
+#define SET_EFS_WDATA_5(_VAL_) (REG32(ADR_EFUSE_WDATA_5)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_5)) & 0x00000000))
+#define SET_EFS_RDATA_6(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_6)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_6)) & 0x00000000))
+#define SET_EFS_WDATA_6(_VAL_) (REG32(ADR_EFUSE_WDATA_6)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_6)) & 0x00000000))
+#define SET_EFS_RDATA_7(_VAL_) (REG32(ADR_EFUSE_AHB_RDATA_7)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_AHB_RDATA_7)) & 0x00000000))
+#define SET_EFS_WDATA_7(_VAL_) (REG32(ADR_EFUSE_WDATA_7)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_WDATA_7)) & 0x00000000))
+#define SET_EFS_SPI_RD0_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD0_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD0_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD1_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD1_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD1_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD2_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD2_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD2_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD3_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD3_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD3_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD4_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD4_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD4_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD5_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD5_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD5_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD6_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD6_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD6_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RD7_EN(_VAL_) (REG32(ADR_EFUSE_SPI_RD7_EN)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RD7_EN)) & 0xfffffffe))
+#define SET_EFS_SPI_RBUSY(_VAL_) (REG32(ADR_EFUSE_SPI_BUSY)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_BUSY)) & 0xfffffffe))
+#define SET_EFS_SPI_RDATA_0(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_0)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_0)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_1(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_1)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_1)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_2(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_2)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_2)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_3(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_3)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_3)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_4(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_4)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_4)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_5(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_5)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_5)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_6(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_6)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_6)) & 0x00000000))
+#define SET_EFS_SPI_RDATA_7(_VAL_) (REG32(ADR_EFUSE_SPI_RDATA_7)) = (((_VAL_) << 0) | ((REG32(ADR_EFUSE_SPI_RDATA_7)) & 0x00000000))
+#define SET_GET_RK(_VAL_) (REG32(ADR_SMS4_CFG1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_CFG1)) & 0xfffffffe))
+#define SET_FORCE_GET_RK(_VAL_) (REG32(ADR_SMS4_CFG1)) = (((_VAL_) << 1) | ((REG32(ADR_SMS4_CFG1)) & 0xfffffffd))
+#define SET_SMS4_DESCRY_EN(_VAL_) (REG32(ADR_SMS4_CFG1)) = (((_VAL_) << 4) | ((REG32(ADR_SMS4_CFG1)) & 0xffffffef))
+#define SET_DEC_DOUT_MSB(_VAL_) (REG32(ADR_SMS4_CFG2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_CFG2)) & 0xfffffffe))
+#define SET_DEC_DIN_MSB(_VAL_) (REG32(ADR_SMS4_CFG2)) = (((_VAL_) << 1) | ((REG32(ADR_SMS4_CFG2)) & 0xfffffffd))
+#define SET_ENC_DOUT_MSB(_VAL_) (REG32(ADR_SMS4_CFG2)) = (((_VAL_) << 2) | ((REG32(ADR_SMS4_CFG2)) & 0xfffffffb))
+#define SET_ENC_DIN_MSB(_VAL_) (REG32(ADR_SMS4_CFG2)) = (((_VAL_) << 3) | ((REG32(ADR_SMS4_CFG2)) & 0xfffffff7))
+#define SET_KEY_DIN_MSB(_VAL_) (REG32(ADR_SMS4_CFG2)) = (((_VAL_) << 4) | ((REG32(ADR_SMS4_CFG2)) & 0xffffffef))
+#define SET_SMS4_CBC_EN(_VAL_) (REG32(ADR_SMS4_MODE1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_MODE1)) & 0xfffffffe))
+#define SET_SMS4_CFB_EN(_VAL_) (REG32(ADR_SMS4_MODE1)) = (((_VAL_) << 1) | ((REG32(ADR_SMS4_MODE1)) & 0xfffffffd))
+#define SET_SMS4_OFB_EN(_VAL_) (REG32(ADR_SMS4_MODE1)) = (((_VAL_) << 2) | ((REG32(ADR_SMS4_MODE1)) & 0xfffffffb))
+#define SET_SMS4_START_TRIG(_VAL_) (REG32(ADR_SMS4_TRIG)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_TRIG)) & 0xfffffffe))
+#define SET_SMS4_BUSY(_VAL_) (REG32(ADR_SMS4_STATUS1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_STATUS1)) & 0xfffffffe))
+#define SET_SMS4_DONE(_VAL_) (REG32(ADR_SMS4_STATUS2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_STATUS2)) & 0xfffffffe))
+#define SET_SMS4_DATAIN_0(_VAL_) (REG32(ADR_SMS4_DATA_IN0)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_IN0)) & 0x00000000))
+#define SET_SMS4_DATAIN_1(_VAL_) (REG32(ADR_SMS4_DATA_IN1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_IN1)) & 0x00000000))
+#define SET_SMS4_DATAIN_2(_VAL_) (REG32(ADR_SMS4_DATA_IN2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_IN2)) & 0x00000000))
+#define SET_SMS4_DATAIN_3(_VAL_) (REG32(ADR_SMS4_DATA_IN3)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_IN3)) & 0x00000000))
+#define SET_SMS4_DATAOUT_0(_VAL_) (REG32(ADR_SMS4_DATA_OUT0)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_OUT0)) & 0x00000000))
+#define SET_SMS4_DATAOUT_1(_VAL_) (REG32(ADR_SMS4_DATA_OUT1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_OUT1)) & 0x00000000))
+#define SET_SMS4_DATAOUT_2(_VAL_) (REG32(ADR_SMS4_DATA_OUT2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_OUT2)) & 0x00000000))
+#define SET_SMS4_DATAOUT_3(_VAL_) (REG32(ADR_SMS4_DATA_OUT3)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_DATA_OUT3)) & 0x00000000))
+#define SET_SMS4_KEY_0(_VAL_) (REG32(ADR_SMS4_KEY_0)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_KEY_0)) & 0x00000000))
+#define SET_SMS4_KEY_1(_VAL_) (REG32(ADR_SMS4_KEY_1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_KEY_1)) & 0x00000000))
+#define SET_SMS4_KEY_2(_VAL_) (REG32(ADR_SMS4_KEY_2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_KEY_2)) & 0x00000000))
+#define SET_SMS4_KEY_3(_VAL_) (REG32(ADR_SMS4_KEY_3)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_KEY_3)) & 0x00000000))
+#define SET_SMS4_MODE_IV0(_VAL_) (REG32(ADR_SMS4_MODE_IV0)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_MODE_IV0)) & 0x00000000))
+#define SET_SMS4_MODE_IV1(_VAL_) (REG32(ADR_SMS4_MODE_IV1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_MODE_IV1)) & 0x00000000))
+#define SET_SMS4_MODE_IV2(_VAL_) (REG32(ADR_SMS4_MODE_IV2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_MODE_IV2)) & 0x00000000))
+#define SET_SMS4_MODE_IV3(_VAL_) (REG32(ADR_SMS4_MODE_IV3)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_MODE_IV3)) & 0x00000000))
+#define SET_SMS4_OFB_ENC0(_VAL_) (REG32(ADR_SMS4_OFB_ENC0)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_OFB_ENC0)) & 0x00000000))
+#define SET_SMS4_OFB_ENC1(_VAL_) (REG32(ADR_SMS4_OFB_ENC1)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_OFB_ENC1)) & 0x00000000))
+#define SET_SMS4_OFB_ENC2(_VAL_) (REG32(ADR_SMS4_OFB_ENC2)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_OFB_ENC2)) & 0x00000000))
+#define SET_SMS4_OFB_ENC3(_VAL_) (REG32(ADR_SMS4_OFB_ENC3)) = (((_VAL_) << 0) | ((REG32(ADR_SMS4_OFB_ENC3)) & 0x00000000))
+#define SET_MRX_MCAST_TB0_31_0(_VAL_) (REG32(ADR_MRX_MCAST_TB0_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB0_0)) & 0x00000000))
+#define SET_MRX_MCAST_TB0_47_32(_VAL_) (REG32(ADR_MRX_MCAST_TB0_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB0_1)) & 0xffff0000))
+#define SET_MRX_MCAST_MASK0_31_0(_VAL_) (REG32(ADR_MRX_MCAST_MK0_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK0_0)) & 0x00000000))
+#define SET_MRX_MCAST_MASK0_47_32(_VAL_) (REG32(ADR_MRX_MCAST_MK0_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK0_1)) & 0xffff0000))
+#define SET_MRX_MCAST_CTRL_0(_VAL_) (REG32(ADR_MRX_MCAST_CTRL0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_CTRL0)) & 0xfffffffc))
+#define SET_MRX_MCAST_TB1_31_0(_VAL_) (REG32(ADR_MRX_MCAST_TB1_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB1_0)) & 0x00000000))
+#define SET_MRX_MCAST_TB1_47_32(_VAL_) (REG32(ADR_MRX_MCAST_TB1_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB1_1)) & 0xffff0000))
+#define SET_MRX_MCAST_MASK1_31_0(_VAL_) (REG32(ADR_MRX_MCAST_MK1_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK1_0)) & 0x00000000))
+#define SET_MRX_MCAST_MASK1_47_32(_VAL_) (REG32(ADR_MRX_MCAST_MK1_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK1_1)) & 0xffff0000))
+#define SET_MRX_MCAST_CTRL_1(_VAL_) (REG32(ADR_MRX_MCAST_CTRL1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_CTRL1)) & 0xfffffffc))
+#define SET_MRX_MCAST_TB2_31_0(_VAL_) (REG32(ADR_MRX_MCAST_TB2_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB2_0)) & 0x00000000))
+#define SET_MRX_MCAST_TB2_47_32(_VAL_) (REG32(ADR_MRX_MCAST_TB2_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB2_1)) & 0xffff0000))
+#define SET_MRX_MCAST_MASK2_31_0(_VAL_) (REG32(ADR_MRX_MCAST_MK2_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK2_0)) & 0x00000000))
+#define SET_MRX_MCAST_MASK2_47_32(_VAL_) (REG32(ADR_MRX_MCAST_MK2_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK2_1)) & 0xffff0000))
+#define SET_MRX_MCAST_CTRL_2(_VAL_) (REG32(ADR_MRX_MCAST_CTRL2)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_CTRL2)) & 0xfffffffc))
+#define SET_MRX_MCAST_TB3_31_0(_VAL_) (REG32(ADR_MRX_MCAST_TB3_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB3_0)) & 0x00000000))
+#define SET_MRX_MCAST_TB3_47_32(_VAL_) (REG32(ADR_MRX_MCAST_TB3_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_TB3_1)) & 0xffff0000))
+#define SET_MRX_MCAST_MASK3_31_0(_VAL_) (REG32(ADR_MRX_MCAST_MK3_0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK3_0)) & 0x00000000))
+#define SET_MRX_MCAST_MASK3_47_32(_VAL_) (REG32(ADR_MRX_MCAST_MK3_1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_MK3_1)) & 0xffff0000))
+#define SET_MRX_MCAST_CTRL_3(_VAL_) (REG32(ADR_MRX_MCAST_CTRL3)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MCAST_CTRL3)) & 0xfffffffc))
+#define SET_MRX_PHY_INFO(_VAL_) (REG32(ADR_MRX_PHY_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_PHY_INFO)) & 0x00000000))
+#define SET_DBG_BA_TYPE(_VAL_) (REG32(ADR_MRX_BA_DBG)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_BA_DBG)) & 0xffffffc0))
+#define SET_DBG_BA_SEQ(_VAL_) (REG32(ADR_MRX_BA_DBG)) = (((_VAL_) << 8) | ((REG32(ADR_MRX_BA_DBG)) & 0xfff000ff))
+#define SET_MRX_FLT_TB0(_VAL_) (REG32(ADR_MRX_FLT_TB0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB0)) & 0xffff8000))
+#define SET_MRX_FLT_TB1(_VAL_) (REG32(ADR_MRX_FLT_TB1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB1)) & 0xffff8000))
+#define SET_MRX_FLT_TB2(_VAL_) (REG32(ADR_MRX_FLT_TB2)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB2)) & 0xffff8000))
+#define SET_MRX_FLT_TB3(_VAL_) (REG32(ADR_MRX_FLT_TB3)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB3)) & 0xffff8000))
+#define SET_MRX_FLT_TB4(_VAL_) (REG32(ADR_MRX_FLT_TB4)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB4)) & 0xffff8000))
+#define SET_MRX_FLT_TB5(_VAL_) (REG32(ADR_MRX_FLT_TB5)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB5)) & 0xffff8000))
+#define SET_MRX_FLT_TB6(_VAL_) (REG32(ADR_MRX_FLT_TB6)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB6)) & 0xffff8000))
+#define SET_MRX_FLT_TB7(_VAL_) (REG32(ADR_MRX_FLT_TB7)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB7)) & 0xffff8000))
+#define SET_MRX_FLT_TB8(_VAL_) (REG32(ADR_MRX_FLT_TB8)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB8)) & 0xffff8000))
+#define SET_MRX_FLT_TB9(_VAL_) (REG32(ADR_MRX_FLT_TB9)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB9)) & 0xffff8000))
+#define SET_MRX_FLT_TB10(_VAL_) (REG32(ADR_MRX_FLT_TB10)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB10)) & 0xffff8000))
+#define SET_MRX_FLT_TB11(_VAL_) (REG32(ADR_MRX_FLT_TB11)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB11)) & 0xffff8000))
+#define SET_MRX_FLT_TB12(_VAL_) (REG32(ADR_MRX_FLT_TB12)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB12)) & 0xffff8000))
+#define SET_MRX_FLT_TB13(_VAL_) (REG32(ADR_MRX_FLT_TB13)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB13)) & 0xffff8000))
+#define SET_MRX_FLT_TB14(_VAL_) (REG32(ADR_MRX_FLT_TB14)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB14)) & 0xffff8000))
+#define SET_MRX_FLT_TB15(_VAL_) (REG32(ADR_MRX_FLT_TB15)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_TB15)) & 0xffff8000))
+#define SET_MRX_FLT_EN0(_VAL_) (REG32(ADR_MRX_FLT_EN0)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN0)) & 0xffff0000))
+#define SET_MRX_FLT_EN1(_VAL_) (REG32(ADR_MRX_FLT_EN1)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN1)) & 0xffff0000))
+#define SET_MRX_FLT_EN2(_VAL_) (REG32(ADR_MRX_FLT_EN2)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN2)) & 0xffff0000))
+#define SET_MRX_FLT_EN3(_VAL_) (REG32(ADR_MRX_FLT_EN3)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN3)) & 0xffff0000))
+#define SET_MRX_FLT_EN4(_VAL_) (REG32(ADR_MRX_FLT_EN4)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN4)) & 0xffff0000))
+#define SET_MRX_FLT_EN5(_VAL_) (REG32(ADR_MRX_FLT_EN5)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN5)) & 0xffff0000))
+#define SET_MRX_FLT_EN6(_VAL_) (REG32(ADR_MRX_FLT_EN6)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN6)) & 0xffff0000))
+#define SET_MRX_FLT_EN7(_VAL_) (REG32(ADR_MRX_FLT_EN7)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN7)) & 0xffff0000))
+#define SET_MRX_FLT_EN8(_VAL_) (REG32(ADR_MRX_FLT_EN8)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FLT_EN8)) & 0xffff0000))
+#define SET_MRX_LEN_FLT(_VAL_) (REG32(ADR_MRX_LEN_FLT)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_LEN_FLT)) & 0xffff0000))
+#define SET_RX_FLOW_DATA(_VAL_) (REG32(ADR_RX_FLOW_DATA)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FLOW_DATA)) & 0x00000000))
+#define SET_RX_FLOW_MNG(_VAL_) (REG32(ADR_RX_FLOW_MNG)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FLOW_MNG)) & 0xffff0000))
+#define SET_RX_FLOW_CTRL(_VAL_) (REG32(ADR_RX_FLOW_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FLOW_CTRL)) & 0xffff0000))
+#define SET_MRX_STP_EN(_VAL_) (REG32(ADR_RX_TIME_STAMP_CFG)) = (((_VAL_) << 0) | ((REG32(ADR_RX_TIME_STAMP_CFG)) & 0xfffffffe))
+#define SET_MRX_STP_OFST(_VAL_) (REG32(ADR_RX_TIME_STAMP_CFG)) = (((_VAL_) << 8) | ((REG32(ADR_RX_TIME_STAMP_CFG)) & 0xffff00ff))
+#define SET_DBG_FF_FULL(_VAL_) (REG32(ADR_DBG_FF_FULL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_FF_FULL)) & 0xffff0000))
+#define SET_DBG_FF_FULL_CLR(_VAL_) (REG32(ADR_DBG_FF_FULL)) = (((_VAL_) << 31) | ((REG32(ADR_DBG_FF_FULL)) & 0x7fffffff))
+#define SET_DBG_WFF_FULL(_VAL_) (REG32(ADR_DBG_WFF_FULL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_WFF_FULL)) & 0xffff0000))
+#define SET_DBG_WFF_FULL_CLR(_VAL_) (REG32(ADR_DBG_WFF_FULL)) = (((_VAL_) << 31) | ((REG32(ADR_DBG_WFF_FULL)) & 0x7fffffff))
+#define SET_DBG_MB_FULL(_VAL_) (REG32(ADR_DBG_MB_FULL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_MB_FULL)) & 0xffff0000))
+#define SET_DBG_MB_FULL_CLR(_VAL_) (REG32(ADR_DBG_MB_FULL)) = (((_VAL_) << 31) | ((REG32(ADR_DBG_MB_FULL)) & 0x7fffffff))
+#define SET_BA_CTRL(_VAL_) (REG32(ADR_BA_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_BA_CTRL)) & 0xfffffffc))
+#define SET_BA_DBG_EN(_VAL_) (REG32(ADR_BA_CTRL)) = (((_VAL_) << 2) | ((REG32(ADR_BA_CTRL)) & 0xfffffffb))
+#define SET_BA_AGRE_EN(_VAL_) (REG32(ADR_BA_CTRL)) = (((_VAL_) << 3) | ((REG32(ADR_BA_CTRL)) & 0xfffffff7))
+#define SET_BA_TA_31_0(_VAL_) (REG32(ADR_BA_TA_0)) = (((_VAL_) << 0) | ((REG32(ADR_BA_TA_0)) & 0x00000000))
+#define SET_BA_TA_47_32(_VAL_) (REG32(ADR_BA_TA_1)) = (((_VAL_) << 0) | ((REG32(ADR_BA_TA_1)) & 0xffff0000))
+#define SET_BA_TID(_VAL_) (REG32(ADR_BA_TID)) = (((_VAL_) << 0) | ((REG32(ADR_BA_TID)) & 0xfffffff0))
+#define SET_BA_ST_SEQ(_VAL_) (REG32(ADR_BA_ST_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_BA_ST_SEQ)) & 0xfffff000))
+#define SET_BA_SB0(_VAL_) (REG32(ADR_BA_SB0)) = (((_VAL_) << 0) | ((REG32(ADR_BA_SB0)) & 0x00000000))
+#define SET_BA_SB1(_VAL_) (REG32(ADR_BA_SB1)) = (((_VAL_) << 0) | ((REG32(ADR_BA_SB1)) & 0x00000000))
+#define SET_MRX_WD(_VAL_) (REG32(ADR_MRX_WATCH_DOG)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_WATCH_DOG)) & 0xfffe0000))
+#define SET_ACK_GEN_EN(_VAL_) (REG32(ADR_ACK_GEN_EN)) = (((_VAL_) << 0) | ((REG32(ADR_ACK_GEN_EN)) & 0xfffffffe))
+#define SET_BA_GEN_EN(_VAL_) (REG32(ADR_ACK_GEN_EN)) = (((_VAL_) << 1) | ((REG32(ADR_ACK_GEN_EN)) & 0xfffffffd))
+#define SET_ACK_GEN_DUR(_VAL_) (REG32(ADR_ACK_GEN_PARA)) = (((_VAL_) << 0) | ((REG32(ADR_ACK_GEN_PARA)) & 0xffff0000))
+#define SET_ACK_GEN_INFO(_VAL_) (REG32(ADR_ACK_GEN_PARA)) = (((_VAL_) << 16) | ((REG32(ADR_ACK_GEN_PARA)) & 0xffc0ffff))
+#define SET_ACK_GEN_RA_31_0(_VAL_) (REG32(ADR_ACK_GEN_RA_0)) = (((_VAL_) << 0) | ((REG32(ADR_ACK_GEN_RA_0)) & 0x00000000))
+#define SET_ACK_GEN_RA_47_32(_VAL_) (REG32(ADR_ACK_GEN_RA_1)) = (((_VAL_) << 0) | ((REG32(ADR_ACK_GEN_RA_1)) & 0xffff0000))
+#define SET_MIB_LEN_FAIL(_VAL_) (REG32(ADR_MIB_LEN_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_LEN_FAIL)) & 0xffff0000))
+#define SET_TRAP_HW_ID(_VAL_) (REG32(ADR_TRAP_HW_ID)) = (((_VAL_) << 0) | ((REG32(ADR_TRAP_HW_ID)) & 0xfffffff0))
+#define SET_ID_IN_USE(_VAL_) (REG32(ADR_ID_IN_USE)) = (((_VAL_) << 0) | ((REG32(ADR_ID_IN_USE)) & 0xffffff00))
+#define SET_MRX_ERR(_VAL_) (REG32(ADR_MRX_ERR)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_ERR)) & 0x00000000))
+#define SET_W0_T0_SEQ(_VAL_) (REG32(ADR_WSID0_TID0_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID0_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T1_SEQ(_VAL_) (REG32(ADR_WSID0_TID1_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID1_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T2_SEQ(_VAL_) (REG32(ADR_WSID0_TID2_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID2_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T3_SEQ(_VAL_) (REG32(ADR_WSID0_TID3_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID3_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T4_SEQ(_VAL_) (REG32(ADR_WSID0_TID4_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID4_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T5_SEQ(_VAL_) (REG32(ADR_WSID0_TID5_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID5_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T6_SEQ(_VAL_) (REG32(ADR_WSID0_TID6_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID6_RX_SEQ)) & 0xffff0000))
+#define SET_W0_T7_SEQ(_VAL_) (REG32(ADR_WSID0_TID7_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0_TID7_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T0_SEQ(_VAL_) (REG32(ADR_WSID1_TID0_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID0_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T1_SEQ(_VAL_) (REG32(ADR_WSID1_TID1_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID1_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T2_SEQ(_VAL_) (REG32(ADR_WSID1_TID2_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID2_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T3_SEQ(_VAL_) (REG32(ADR_WSID1_TID3_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID3_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T4_SEQ(_VAL_) (REG32(ADR_WSID1_TID4_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID4_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T5_SEQ(_VAL_) (REG32(ADR_WSID1_TID5_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID5_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T6_SEQ(_VAL_) (REG32(ADR_WSID1_TID6_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID6_RX_SEQ)) & 0xffff0000))
+#define SET_W1_T7_SEQ(_VAL_) (REG32(ADR_WSID1_TID7_RX_SEQ)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1_TID7_RX_SEQ)) & 0xffff0000))
+#define SET_ADDR1A_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 0) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xfffffffc))
+#define SET_ADDR2A_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 2) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xfffffff3))
+#define SET_ADDR3A_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 4) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xffffffcf))
+#define SET_ADDR1B_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 6) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xffffff3f))
+#define SET_ADDR2B_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 8) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xfffffcff))
+#define SET_ADDR3B_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 10) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xfffff3ff))
+#define SET_ADDR3C_SEL(_VAL_) (REG32(ADR_HDR_ADDR_SEL)) = (((_VAL_) << 12) | ((REG32(ADR_HDR_ADDR_SEL)) & 0xffffcfff))
+#define SET_FRM_CTRL(_VAL_) (REG32(ADR_FRAME_TYPE_CNTR_SET)) = (((_VAL_) << 0) | ((REG32(ADR_FRAME_TYPE_CNTR_SET)) & 0xffffffc0))
+#define SET_CSR_PHY_INFO(_VAL_) (REG32(ADR_PHY_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_INFO)) & 0xffff8000))
+#define SET_AMPDU_SIG(_VAL_) (REG32(ADR_AMPDU_SIG)) = (((_VAL_) << 0) | ((REG32(ADR_AMPDU_SIG)) & 0xffffff00))
+#define SET_MIB_AMPDU(_VAL_) (REG32(ADR_MIB_AMPDU)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_AMPDU)) & 0x00000000))
+#define SET_LEN_FLT(_VAL_) (REG32(ADR_LEN_FLT)) = (((_VAL_) << 0) | ((REG32(ADR_LEN_FLT)) & 0xffff0000))
+#define SET_MIB_DELIMITER(_VAL_) (REG32(ADR_MIB_DELIMITER)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_DELIMITER)) & 0xffff0000))
+#define SET_MTX_INT_Q0_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_INT_STS)) & 0xfffeffff))
+#define SET_MTX_INT_Q0_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 17) | ((REG32(ADR_MTX_INT_STS)) & 0xfffdffff))
+#define SET_MTX_INT_Q1_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 18) | ((REG32(ADR_MTX_INT_STS)) & 0xfffbffff))
+#define SET_MTX_INT_Q1_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 19) | ((REG32(ADR_MTX_INT_STS)) & 0xfff7ffff))
+#define SET_MTX_INT_Q2_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 20) | ((REG32(ADR_MTX_INT_STS)) & 0xffefffff))
+#define SET_MTX_INT_Q2_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 21) | ((REG32(ADR_MTX_INT_STS)) & 0xffdfffff))
+#define SET_MTX_INT_Q3_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 22) | ((REG32(ADR_MTX_INT_STS)) & 0xffbfffff))
+#define SET_MTX_INT_Q3_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 23) | ((REG32(ADR_MTX_INT_STS)) & 0xff7fffff))
+#define SET_MTX_INT_Q4_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 24) | ((REG32(ADR_MTX_INT_STS)) & 0xfeffffff))
+#define SET_MTX_INT_Q4_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_STS)) = (((_VAL_) << 25) | ((REG32(ADR_MTX_INT_STS)) & 0xfdffffff))
+#define SET_MTX_EN_INT_Q0_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_INT_EN)) & 0xfffeffff))
+#define SET_MTX_EN_INT_Q0_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 17) | ((REG32(ADR_MTX_INT_EN)) & 0xfffdffff))
+#define SET_MTX_EN_INT_Q1_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 18) | ((REG32(ADR_MTX_INT_EN)) & 0xfffbffff))
+#define SET_MTX_EN_INT_Q1_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 19) | ((REG32(ADR_MTX_INT_EN)) & 0xfff7ffff))
+#define SET_MTX_EN_INT_Q2_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 20) | ((REG32(ADR_MTX_INT_EN)) & 0xffefffff))
+#define SET_MTX_EN_INT_Q2_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 21) | ((REG32(ADR_MTX_INT_EN)) & 0xffdfffff))
+#define SET_MTX_EN_INT_Q3_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 22) | ((REG32(ADR_MTX_INT_EN)) & 0xffbfffff))
+#define SET_MTX_EN_INT_Q3_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 23) | ((REG32(ADR_MTX_INT_EN)) & 0xff7fffff))
+#define SET_MTX_EN_INT_Q4_Q_EMPTY(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 24) | ((REG32(ADR_MTX_INT_EN)) & 0xfeffffff))
+#define SET_MTX_EN_INT_Q4_TXOP_RUNOUT(_VAL_) (REG32(ADR_MTX_INT_EN)) = (((_VAL_) << 25) | ((REG32(ADR_MTX_INT_EN)) & 0xfdffffff))
+#define SET_MTX_MTX2PHY_SLOW(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_MISC_EN)) & 0xfffffffe))
+#define SET_MTX_M2M_SLOW_PRD(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_MISC_EN)) & 0xfffffff1))
+#define SET_MTX_AMPDU_CRC_AUTO(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffffdf))
+#define SET_MTX_FAST_RSP_MODE(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffffbf))
+#define SET_MTX_RAW_DATA_MODE(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 7) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffff7f))
+#define SET_MTX_ACK_DUR0(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_MISC_EN)) & 0xfffffeff))
+#define SET_MTX_TSF_AUTO_BCN(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 10) | ((REG32(ADR_MTX_MISC_EN)) & 0xfffffbff))
+#define SET_MTX_TSF_AUTO_MISC(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 11) | ((REG32(ADR_MTX_MISC_EN)) & 0xfffff7ff))
+#define SET_MTX_FORCE_CS_IDLE(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 12) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffefff))
+#define SET_MTX_FORCE_BKF_RXEN0(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 13) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffdfff))
+#define SET_MTX_FORCE_DMA_RXEN0(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 14) | ((REG32(ADR_MTX_MISC_EN)) & 0xffffbfff))
+#define SET_MTX_FORCE_RXEN0(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 15) | ((REG32(ADR_MTX_MISC_EN)) & 0xffff7fff))
+#define SET_MTX_HALT_Q_MB(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_MISC_EN)) & 0xffc0ffff))
+#define SET_MTX_CTS_SET_DIF(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 22) | ((REG32(ADR_MTX_MISC_EN)) & 0xffbfffff))
+#define SET_MTX_AMPDU_SET_DIF(_VAL_) (REG32(ADR_MTX_MISC_EN)) = (((_VAL_) << 23) | ((REG32(ADR_MTX_MISC_EN)) & 0xff7fffff))
+#define SET_MTX_EDCCA_TOUT(_VAL_) (REG32(ADR_MTX_EDCCA_TOUT)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_EDCCA_TOUT)) & 0xfffffc00))
+#define SET_MTX_INT_BCN(_VAL_) (REG32(ADR_MTX_BCN_INT_STS)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_BCN_INT_STS)) & 0xfffffffd))
+#define SET_MTX_INT_DTIM(_VAL_) (REG32(ADR_MTX_BCN_INT_STS)) = (((_VAL_) << 3) | ((REG32(ADR_MTX_BCN_INT_STS)) & 0xfffffff7))
+#define SET_MTX_EN_INT_BCN(_VAL_) (REG32(ADR_MTX_BCN_EN_INT)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_BCN_EN_INT)) & 0xfffffffd))
+#define SET_MTX_EN_INT_DTIM(_VAL_) (REG32(ADR_MTX_BCN_EN_INT)) = (((_VAL_) << 3) | ((REG32(ADR_MTX_BCN_EN_INT)) & 0xfffffff7))
+#define SET_MTX_BCN_TIMER_EN(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xfffffffe))
+#define SET_MTX_TIME_STAMP_AUTO_FILL(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xfffffffd))
+#define SET_MTX_TSF_TIMER_EN(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 5) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xffffffdf))
+#define SET_MTX_HALT_MNG_UNTIL_DTIM(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 6) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xffffffbf))
+#define SET_MTX_INT_DTIM_NUM(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xffff00ff))
+#define SET_MTX_AUTO_FLUSH_Q4(_VAL_) (REG32(ADR_MTX_BCN_EN_MISC)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_BCN_EN_MISC)) & 0xfffeffff))
+#define SET_MTX_BCN_PKTID_CH_LOCK(_VAL_) (REG32(ADR_MTX_BCN_MISC)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_MISC)) & 0xfffffffe))
+#define SET_MTX_BCN_CFG_VLD(_VAL_) (REG32(ADR_MTX_BCN_MISC)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_BCN_MISC)) & 0xfffffff9))
+#define SET_MTX_AUTO_BCN_ONGOING(_VAL_) (REG32(ADR_MTX_BCN_MISC)) = (((_VAL_) << 3) | ((REG32(ADR_MTX_BCN_MISC)) & 0xfffffff7))
+#define SET_MTX_BCN_TIMER(_VAL_) (REG32(ADR_MTX_BCN_MISC)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_BCN_MISC)) & 0x0000ffff))
+#define SET_MTX_BCN_PERIOD(_VAL_) (REG32(ADR_MTX_BCN_PRD)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_PRD)) & 0xffff0000))
+#define SET_MTX_DTIM_NUM(_VAL_) (REG32(ADR_MTX_BCN_PRD)) = (((_VAL_) << 24) | ((REG32(ADR_MTX_BCN_PRD)) & 0x00ffffff))
+#define SET_MTX_BCN_TSF_L(_VAL_) (REG32(ADR_MTX_BCN_TSF_L)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_TSF_L)) & 0x00000000))
+#define SET_MTX_BCN_TSF_U(_VAL_) (REG32(ADR_MTX_BCN_TSF_U)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_TSF_U)) & 0x00000000))
+#define SET_MTX_BCN_PKT_ID0(_VAL_) (REG32(ADR_MTX_BCN_CFG0)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_CFG0)) & 0xffffff80))
+#define SET_MTX_DTIM_OFST0(_VAL_) (REG32(ADR_MTX_BCN_CFG0)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_BCN_CFG0)) & 0xfc00ffff))
+#define SET_MTX_BCN_PKT_ID1(_VAL_) (REG32(ADR_MTX_BCN_CFG1)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_BCN_CFG1)) & 0xffffff80))
+#define SET_MTX_DTIM_OFST1(_VAL_) (REG32(ADR_MTX_BCN_CFG1)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_BCN_CFG1)) & 0xfc00ffff))
+#define SET_MTX_CCA(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_STATUS)) & 0xfffffffe))
+#define SET_MRX_CCA(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_STATUS)) & 0xfffffffd))
+#define SET_MTX_DMA_FSM(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 2) | ((REG32(ADR_MTX_STATUS)) & 0xffffffe3))
+#define SET_CH_ST_FSM(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 5) | ((REG32(ADR_MTX_STATUS)) & 0xffffff1f))
+#define SET_MTX_GNT_LOCK(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_STATUS)) & 0xfffffeff))
+#define SET_MTX_DMA_REQ(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 9) | ((REG32(ADR_MTX_STATUS)) & 0xfffffdff))
+#define SET_MTX_Q_REQ(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 10) | ((REG32(ADR_MTX_STATUS)) & 0xfffffbff))
+#define SET_MTX_TX_EN(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 11) | ((REG32(ADR_MTX_STATUS)) & 0xfffff7ff))
+#define SET_MRX_RX_EN(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 12) | ((REG32(ADR_MTX_STATUS)) & 0xffffefff))
+#define SET_DBG_PRTC_PRD(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 13) | ((REG32(ADR_MTX_STATUS)) & 0xffffdfff))
+#define SET_DBG_DMA_RDY(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 14) | ((REG32(ADR_MTX_STATUS)) & 0xffffbfff))
+#define SET_DBG_WAIT_RSP(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 15) | ((REG32(ADR_MTX_STATUS)) & 0xffff7fff))
+#define SET_DBG_CFRM_BUSY(_VAL_) (REG32(ADR_MTX_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_STATUS)) & 0xfffeffff))
+#define SET_DBG_RST(_VAL_) (REG32(ADR_MTX_DBG_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_CTRL)) & 0xfffffffe))
+#define SET_DBG_MODE(_VAL_) (REG32(ADR_MTX_DBG_CTRL)) = (((_VAL_) << 1) | ((REG32(ADR_MTX_DBG_CTRL)) & 0xfffffffd))
+#define SET_MB_REQ_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT0)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_DAT0)) & 0xffff0000))
+#define SET_RX_EN_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT0)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DBG_DAT0)) & 0x0000ffff))
+#define SET_RX_CS_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT1)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_DAT1)) & 0xffff0000))
+#define SET_TX_CCA_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT1)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DBG_DAT1)) & 0x0000ffff))
+#define SET_Q_REQ_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT2)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_DAT2)) & 0xffff0000))
+#define SET_CH_STA0_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT2)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DBG_DAT2)) & 0x0000ffff))
+#define SET_MTX_DUR_RSP_TOUT_B(_VAL_) (REG32(ADR_MTX_DUR_TOUT)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DUR_TOUT)) & 0xffffff00))
+#define SET_MTX_DUR_RSP_TOUT_G(_VAL_) (REG32(ADR_MTX_DUR_TOUT)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_DUR_TOUT)) & 0xffff00ff))
+#define SET_MTX_DUR_RSP_SIFS(_VAL_) (REG32(ADR_MTX_DUR_IFS)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DUR_IFS)) & 0xffffff00))
+#define SET_MTX_DUR_BURST_SIFS(_VAL_) (REG32(ADR_MTX_DUR_IFS)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_DUR_IFS)) & 0xffff00ff))
+#define SET_MTX_DUR_SLOT(_VAL_) (REG32(ADR_MTX_DUR_IFS)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DUR_IFS)) & 0xffc0ffff))
+#define SET_MTX_DUR_RSP_EIFS(_VAL_) (REG32(ADR_MTX_DUR_IFS)) = (((_VAL_) << 22) | ((REG32(ADR_MTX_DUR_IFS)) & 0x003fffff))
+#define SET_MTX_DUR_RSP_SIFS_G(_VAL_) (REG32(ADR_MTX_DUR_SIFS_G)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DUR_SIFS_G)) & 0xffffff00))
+#define SET_MTX_DUR_BURST_SIFS_G(_VAL_) (REG32(ADR_MTX_DUR_SIFS_G)) = (((_VAL_) << 8) | ((REG32(ADR_MTX_DUR_SIFS_G)) & 0xffff00ff))
+#define SET_MTX_DUR_SLOT_G(_VAL_) (REG32(ADR_MTX_DUR_SIFS_G)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DUR_SIFS_G)) & 0xffc0ffff))
+#define SET_MTX_DUR_RSP_EIFS_G(_VAL_) (REG32(ADR_MTX_DUR_SIFS_G)) = (((_VAL_) << 22) | ((REG32(ADR_MTX_DUR_SIFS_G)) & 0x003fffff))
+#define SET_CH_STA1_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT3)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_DAT3)) & 0xffff0000))
+#define SET_CH_STA2_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT3)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DBG_DAT3)) & 0x0000ffff))
+#define SET_MTX_NAV(_VAL_) (REG32(ADR_MTX_NAV)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_NAV)) & 0xffff0000))
+#define SET_MTX_MIB_CNT0(_VAL_) (REG32(ADR_MTX_MIB_WSID0)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_MIB_WSID0)) & 0xc0000000))
+#define SET_MTX_MIB_EN0(_VAL_) (REG32(ADR_MTX_MIB_WSID0)) = (((_VAL_) << 30) | ((REG32(ADR_MTX_MIB_WSID0)) & 0xbfffffff))
+#define SET_MTX_MIB_CNT1(_VAL_) (REG32(ADR_MTX_MIB_WSID1)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_MIB_WSID1)) & 0xc0000000))
+#define SET_MTX_MIB_EN1(_VAL_) (REG32(ADR_MTX_MIB_WSID1)) = (((_VAL_) << 30) | ((REG32(ADR_MTX_MIB_WSID1)) & 0xbfffffff))
+#define SET_CH_STA3_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT4)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_DBG_DAT4)) & 0xffff0000))
+#define SET_CH_STA4_DUR(_VAL_) (REG32(ADR_MTX_DBG_DAT4)) = (((_VAL_) << 16) | ((REG32(ADR_MTX_DBG_DAT4)) & 0x0000ffff))
+#define SET_TXQ0_MTX_Q_PRE_LD(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xfffffffd))
+#define SET_TXQ0_MTX_Q_BKF_CNT_FIXED(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 2) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xfffffffb))
+#define SET_TXQ0_MTX_Q_TXOP_SUB_FRM_TIME(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 3) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xfffffff7))
+#define SET_TXQ0_MTX_Q_MB_NO_RLS(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 4) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xffffffef))
+#define SET_TXQ0_MTX_Q_TXOP_FRC_BUR(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xffffffdf))
+#define SET_TXQ0_MTX_Q_RND_MODE(_VAL_) (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_TXQ0_MTX_Q_MISC_EN)) & 0xffffff3f))
+#define SET_TXQ0_MTX_Q_AIFSN(_VAL_) (REG32(ADR_TXQ0_MTX_Q_AIFSN)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0xfffffff0))
+#define SET_TXQ0_MTX_Q_ECWMIN(_VAL_) (REG32(ADR_TXQ0_MTX_Q_AIFSN)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0xfffff0ff))
+#define SET_TXQ0_MTX_Q_ECWMAX(_VAL_) (REG32(ADR_TXQ0_MTX_Q_AIFSN)) = (((_VAL_) << 12) | ((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0xffff0fff))
+#define SET_TXQ0_MTX_Q_TXOP_LIMIT(_VAL_) (REG32(ADR_TXQ0_MTX_Q_AIFSN)) = (((_VAL_) << 16) | ((REG32(ADR_TXQ0_MTX_Q_AIFSN)) & 0x0000ffff))
+#define SET_TXQ0_MTX_Q_BKF_CNT(_VAL_) (REG32(ADR_TXQ0_MTX_Q_BKF_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_BKF_CNT)) & 0xffff0000))
+#define SET_TXQ0_MTX_Q_SRC_LIMIT(_VAL_) (REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) & 0xffffff00))
+#define SET_TXQ0_MTX_Q_LRC_LIMIT(_VAL_) (REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) & 0xffff00ff))
+#define SET_TXQ0_MTX_Q_ID_MAP_L(_VAL_) (REG32(ADR_TXQ0_MTX_Q_ID_MAP_L)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_ID_MAP_L)) & 0x00000000))
+#define SET_TXQ0_MTX_Q_TXOP_CH_THD(_VAL_) (REG32(ADR_TXQ0_MTX_Q_TXOP_CH_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_TXOP_CH_THD)) & 0xffff0000))
+#define SET_TXQ0_MTX_Q_TXOP_OV_THD(_VAL_) (REG32(ADR_TXQ0_MTX_Q_TXOP_OV_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ0_MTX_Q_TXOP_OV_THD)) & 0xffff0000))
+#define SET_TXQ1_MTX_Q_PRE_LD(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xfffffffd))
+#define SET_TXQ1_MTX_Q_BKF_CNT_FIXED(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 2) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xfffffffb))
+#define SET_TXQ1_MTX_Q_TXOP_SUB_FRM_TIME(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 3) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xfffffff7))
+#define SET_TXQ1_MTX_Q_MB_NO_RLS(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 4) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xffffffef))
+#define SET_TXQ1_MTX_Q_TXOP_FRC_BUR(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xffffffdf))
+#define SET_TXQ1_MTX_Q_RND_MODE(_VAL_) (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_TXQ1_MTX_Q_MISC_EN)) & 0xffffff3f))
+#define SET_TXQ1_MTX_Q_AIFSN(_VAL_) (REG32(ADR_TXQ1_MTX_Q_AIFSN)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0xfffffff0))
+#define SET_TXQ1_MTX_Q_ECWMIN(_VAL_) (REG32(ADR_TXQ1_MTX_Q_AIFSN)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0xfffff0ff))
+#define SET_TXQ1_MTX_Q_ECWMAX(_VAL_) (REG32(ADR_TXQ1_MTX_Q_AIFSN)) = (((_VAL_) << 12) | ((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0xffff0fff))
+#define SET_TXQ1_MTX_Q_TXOP_LIMIT(_VAL_) (REG32(ADR_TXQ1_MTX_Q_AIFSN)) = (((_VAL_) << 16) | ((REG32(ADR_TXQ1_MTX_Q_AIFSN)) & 0x0000ffff))
+#define SET_TXQ1_MTX_Q_BKF_CNT(_VAL_) (REG32(ADR_TXQ1_MTX_Q_BKF_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_BKF_CNT)) & 0xffff0000))
+#define SET_TXQ1_MTX_Q_SRC_LIMIT(_VAL_) (REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) & 0xffffff00))
+#define SET_TXQ1_MTX_Q_LRC_LIMIT(_VAL_) (REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) & 0xffff00ff))
+#define SET_TXQ1_MTX_Q_ID_MAP_L(_VAL_) (REG32(ADR_TXQ1_MTX_Q_ID_MAP_L)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_ID_MAP_L)) & 0x00000000))
+#define SET_TXQ1_MTX_Q_TXOP_CH_THD(_VAL_) (REG32(ADR_TXQ1_MTX_Q_TXOP_CH_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_TXOP_CH_THD)) & 0xffff0000))
+#define SET_TXQ1_MTX_Q_TXOP_OV_THD(_VAL_) (REG32(ADR_TXQ1_MTX_Q_TXOP_OV_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ1_MTX_Q_TXOP_OV_THD)) & 0xffff0000))
+#define SET_TXQ2_MTX_Q_PRE_LD(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xfffffffd))
+#define SET_TXQ2_MTX_Q_BKF_CNT_FIXED(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 2) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xfffffffb))
+#define SET_TXQ2_MTX_Q_TXOP_SUB_FRM_TIME(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 3) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xfffffff7))
+#define SET_TXQ2_MTX_Q_MB_NO_RLS(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 4) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xffffffef))
+#define SET_TXQ2_MTX_Q_TXOP_FRC_BUR(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xffffffdf))
+#define SET_TXQ2_MTX_Q_RND_MODE(_VAL_) (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_TXQ2_MTX_Q_MISC_EN)) & 0xffffff3f))
+#define SET_TXQ2_MTX_Q_AIFSN(_VAL_) (REG32(ADR_TXQ2_MTX_Q_AIFSN)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0xfffffff0))
+#define SET_TXQ2_MTX_Q_ECWMIN(_VAL_) (REG32(ADR_TXQ2_MTX_Q_AIFSN)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0xfffff0ff))
+#define SET_TXQ2_MTX_Q_ECWMAX(_VAL_) (REG32(ADR_TXQ2_MTX_Q_AIFSN)) = (((_VAL_) << 12) | ((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0xffff0fff))
+#define SET_TXQ2_MTX_Q_TXOP_LIMIT(_VAL_) (REG32(ADR_TXQ2_MTX_Q_AIFSN)) = (((_VAL_) << 16) | ((REG32(ADR_TXQ2_MTX_Q_AIFSN)) & 0x0000ffff))
+#define SET_TXQ2_MTX_Q_BKF_CNT(_VAL_) (REG32(ADR_TXQ2_MTX_Q_BKF_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_BKF_CNT)) & 0xffff0000))
+#define SET_TXQ2_MTX_Q_SRC_LIMIT(_VAL_) (REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) & 0xffffff00))
+#define SET_TXQ2_MTX_Q_LRC_LIMIT(_VAL_) (REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) & 0xffff00ff))
+#define SET_TXQ2_MTX_Q_ID_MAP_L(_VAL_) (REG32(ADR_TXQ2_MTX_Q_ID_MAP_L)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_ID_MAP_L)) & 0x00000000))
+#define SET_TXQ2_MTX_Q_TXOP_CH_THD(_VAL_) (REG32(ADR_TXQ2_MTX_Q_TXOP_CH_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_TXOP_CH_THD)) & 0xffff0000))
+#define SET_TXQ2_MTX_Q_TXOP_OV_THD(_VAL_) (REG32(ADR_TXQ2_MTX_Q_TXOP_OV_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ2_MTX_Q_TXOP_OV_THD)) & 0xffff0000))
+#define SET_TXQ3_MTX_Q_PRE_LD(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xfffffffd))
+#define SET_TXQ3_MTX_Q_BKF_CNT_FIXED(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 2) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xfffffffb))
+#define SET_TXQ3_MTX_Q_TXOP_SUB_FRM_TIME(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 3) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xfffffff7))
+#define SET_TXQ3_MTX_Q_MB_NO_RLS(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 4) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xffffffef))
+#define SET_TXQ3_MTX_Q_TXOP_FRC_BUR(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xffffffdf))
+#define SET_TXQ3_MTX_Q_RND_MODE(_VAL_) (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_TXQ3_MTX_Q_MISC_EN)) & 0xffffff3f))
+#define SET_TXQ3_MTX_Q_AIFSN(_VAL_) (REG32(ADR_TXQ3_MTX_Q_AIFSN)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0xfffffff0))
+#define SET_TXQ3_MTX_Q_ECWMIN(_VAL_) (REG32(ADR_TXQ3_MTX_Q_AIFSN)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0xfffff0ff))
+#define SET_TXQ3_MTX_Q_ECWMAX(_VAL_) (REG32(ADR_TXQ3_MTX_Q_AIFSN)) = (((_VAL_) << 12) | ((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0xffff0fff))
+#define SET_TXQ3_MTX_Q_TXOP_LIMIT(_VAL_) (REG32(ADR_TXQ3_MTX_Q_AIFSN)) = (((_VAL_) << 16) | ((REG32(ADR_TXQ3_MTX_Q_AIFSN)) & 0x0000ffff))
+#define SET_TXQ3_MTX_Q_BKF_CNT(_VAL_) (REG32(ADR_TXQ3_MTX_Q_BKF_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_BKF_CNT)) & 0xffff0000))
+#define SET_TXQ3_MTX_Q_SRC_LIMIT(_VAL_) (REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) & 0xffffff00))
+#define SET_TXQ3_MTX_Q_LRC_LIMIT(_VAL_) (REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) & 0xffff00ff))
+#define SET_TXQ3_MTX_Q_ID_MAP_L(_VAL_) (REG32(ADR_TXQ3_MTX_Q_ID_MAP_L)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_ID_MAP_L)) & 0x00000000))
+#define SET_TXQ3_MTX_Q_TXOP_CH_THD(_VAL_) (REG32(ADR_TXQ3_MTX_Q_TXOP_CH_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_TXOP_CH_THD)) & 0xffff0000))
+#define SET_TXQ3_MTX_Q_TXOP_OV_THD(_VAL_) (REG32(ADR_TXQ3_MTX_Q_TXOP_OV_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ3_MTX_Q_TXOP_OV_THD)) & 0xffff0000))
+#define SET_TXQ4_MTX_Q_PRE_LD(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 1) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xfffffffd))
+#define SET_TXQ4_MTX_Q_BKF_CNT_FIXED(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 2) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xfffffffb))
+#define SET_TXQ4_MTX_Q_TXOP_SUB_FRM_TIME(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 3) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xfffffff7))
+#define SET_TXQ4_MTX_Q_MB_NO_RLS(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 4) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xffffffef))
+#define SET_TXQ4_MTX_Q_TXOP_FRC_BUR(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 5) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xffffffdf))
+#define SET_TXQ4_MTX_Q_RND_MODE(_VAL_) (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (((_VAL_) << 6) | ((REG32(ADR_TXQ4_MTX_Q_MISC_EN)) & 0xffffff3f))
+#define SET_TXQ4_MTX_Q_AIFSN(_VAL_) (REG32(ADR_TXQ4_MTX_Q_AIFSN)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0xfffffff0))
+#define SET_TXQ4_MTX_Q_ECWMIN(_VAL_) (REG32(ADR_TXQ4_MTX_Q_AIFSN)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0xfffff0ff))
+#define SET_TXQ4_MTX_Q_ECWMAX(_VAL_) (REG32(ADR_TXQ4_MTX_Q_AIFSN)) = (((_VAL_) << 12) | ((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0xffff0fff))
+#define SET_TXQ4_MTX_Q_TXOP_LIMIT(_VAL_) (REG32(ADR_TXQ4_MTX_Q_AIFSN)) = (((_VAL_) << 16) | ((REG32(ADR_TXQ4_MTX_Q_AIFSN)) & 0x0000ffff))
+#define SET_TXQ4_MTX_Q_BKF_CNT(_VAL_) (REG32(ADR_TXQ4_MTX_Q_BKF_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_BKF_CNT)) & 0xffff0000))
+#define SET_TXQ4_MTX_Q_SRC_LIMIT(_VAL_) (REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) & 0xffffff00))
+#define SET_TXQ4_MTX_Q_LRC_LIMIT(_VAL_) (REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) = (((_VAL_) << 8) | ((REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) & 0xffff00ff))
+#define SET_TXQ4_MTX_Q_ID_MAP_L(_VAL_) (REG32(ADR_TXQ4_MTX_Q_ID_MAP_L)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_ID_MAP_L)) & 0x00000000))
+#define SET_TXQ4_MTX_Q_TXOP_CH_THD(_VAL_) (REG32(ADR_TXQ4_MTX_Q_TXOP_CH_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_TXOP_CH_THD)) & 0xffff0000))
+#define SET_TXQ4_MTX_Q_TXOP_OV_THD(_VAL_) (REG32(ADR_TXQ4_MTX_Q_TXOP_OV_THD)) = (((_VAL_) << 0) | ((REG32(ADR_TXQ4_MTX_Q_TXOP_OV_THD)) & 0xffff0000))
+#define SET_VALID0(_VAL_) (REG32(ADR_WSID0)) = (((_VAL_) << 0) | ((REG32(ADR_WSID0)) & 0xfffffffe))
+#define SET_PEER_QOS_EN0(_VAL_) (REG32(ADR_WSID0)) = (((_VAL_) << 1) | ((REG32(ADR_WSID0)) & 0xfffffffd))
+#define SET_PEER_OP_MODE0(_VAL_) (REG32(ADR_WSID0)) = (((_VAL_) << 2) | ((REG32(ADR_WSID0)) & 0xfffffff3))
+#define SET_PEER_HT_MODE0(_VAL_) (REG32(ADR_WSID0)) = (((_VAL_) << 4) | ((REG32(ADR_WSID0)) & 0xffffffcf))
+#define SET_PEER_MAC0_31_0(_VAL_) (REG32(ADR_PEER_MAC0_0)) = (((_VAL_) << 0) | ((REG32(ADR_PEER_MAC0_0)) & 0x00000000))
+#define SET_PEER_MAC0_47_32(_VAL_) (REG32(ADR_PEER_MAC0_1)) = (((_VAL_) << 0) | ((REG32(ADR_PEER_MAC0_1)) & 0xffff0000))
+#define SET_TX_ACK_POLICY_0_0(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_0)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_0(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_0)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_1(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_1)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_1(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_1)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_2(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_2)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_2(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_2)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_3(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_3)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_3)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_3(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_3)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_3)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_4(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_4)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_4)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_4(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_4)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_4)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_5(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_5)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_5)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_5(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_5)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_5)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_6(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_6)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_6)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_6(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_6)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_6)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_0_7(_VAL_) (REG32(ADR_TX_ACK_POLICY_0_7)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_0_7)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_0_7(_VAL_) (REG32(ADR_TX_SEQ_CTRL_0_7)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_0_7)) & 0xfffff000))
+#define SET_VALID1(_VAL_) (REG32(ADR_WSID1)) = (((_VAL_) << 0) | ((REG32(ADR_WSID1)) & 0xfffffffe))
+#define SET_PEER_QOS_EN1(_VAL_) (REG32(ADR_WSID1)) = (((_VAL_) << 1) | ((REG32(ADR_WSID1)) & 0xfffffffd))
+#define SET_PEER_OP_MODE1(_VAL_) (REG32(ADR_WSID1)) = (((_VAL_) << 2) | ((REG32(ADR_WSID1)) & 0xfffffff3))
+#define SET_PEER_HT_MODE1(_VAL_) (REG32(ADR_WSID1)) = (((_VAL_) << 4) | ((REG32(ADR_WSID1)) & 0xffffffcf))
+#define SET_PEER_MAC1_31_0(_VAL_) (REG32(ADR_PEER_MAC1_0)) = (((_VAL_) << 0) | ((REG32(ADR_PEER_MAC1_0)) & 0x00000000))
+#define SET_PEER_MAC1_47_32(_VAL_) (REG32(ADR_PEER_MAC1_1)) = (((_VAL_) << 0) | ((REG32(ADR_PEER_MAC1_1)) & 0xffff0000))
+#define SET_TX_ACK_POLICY_1_0(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_0)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_0(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_0)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_1(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_1)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_1(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_1)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_2(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_2)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_2(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_2)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_3(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_3)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_3)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_3(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_3)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_3)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_4(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_4)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_4)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_4(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_4)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_4)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_5(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_5)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_5)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_5(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_5)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_5)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_6(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_6)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_6)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_6(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_6)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_6)) & 0xfffff000))
+#define SET_TX_ACK_POLICY_1_7(_VAL_) (REG32(ADR_TX_ACK_POLICY_1_7)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ACK_POLICY_1_7)) & 0xfffffffc))
+#define SET_TX_SEQ_CTRL_1_7(_VAL_) (REG32(ADR_TX_SEQ_CTRL_1_7)) = (((_VAL_) << 0) | ((REG32(ADR_TX_SEQ_CTRL_1_7)) & 0xfffff000))
+#define SET_INFO0(_VAL_) (REG32(ADR_INFO0)) = (((_VAL_) << 0) | ((REG32(ADR_INFO0)) & 0x00000000))
+#define SET_INFO1(_VAL_) (REG32(ADR_INFO1)) = (((_VAL_) << 0) | ((REG32(ADR_INFO1)) & 0x00000000))
+#define SET_INFO2(_VAL_) (REG32(ADR_INFO2)) = (((_VAL_) << 0) | ((REG32(ADR_INFO2)) & 0x00000000))
+#define SET_INFO3(_VAL_) (REG32(ADR_INFO3)) = (((_VAL_) << 0) | ((REG32(ADR_INFO3)) & 0x00000000))
+#define SET_INFO4(_VAL_) (REG32(ADR_INFO4)) = (((_VAL_) << 0) | ((REG32(ADR_INFO4)) & 0x00000000))
+#define SET_INFO5(_VAL_) (REG32(ADR_INFO5)) = (((_VAL_) << 0) | ((REG32(ADR_INFO5)) & 0x00000000))
+#define SET_INFO6(_VAL_) (REG32(ADR_INFO6)) = (((_VAL_) << 0) | ((REG32(ADR_INFO6)) & 0x00000000))
+#define SET_INFO7(_VAL_) (REG32(ADR_INFO7)) = (((_VAL_) << 0) | ((REG32(ADR_INFO7)) & 0x00000000))
+#define SET_INFO8(_VAL_) (REG32(ADR_INFO8)) = (((_VAL_) << 0) | ((REG32(ADR_INFO8)) & 0x00000000))
+#define SET_INFO9(_VAL_) (REG32(ADR_INFO9)) = (((_VAL_) << 0) | ((REG32(ADR_INFO9)) & 0x00000000))
+#define SET_INFO10(_VAL_) (REG32(ADR_INFO10)) = (((_VAL_) << 0) | ((REG32(ADR_INFO10)) & 0x00000000))
+#define SET_INFO11(_VAL_) (REG32(ADR_INFO11)) = (((_VAL_) << 0) | ((REG32(ADR_INFO11)) & 0x00000000))
+#define SET_INFO12(_VAL_) (REG32(ADR_INFO12)) = (((_VAL_) << 0) | ((REG32(ADR_INFO12)) & 0x00000000))
+#define SET_INFO13(_VAL_) (REG32(ADR_INFO13)) = (((_VAL_) << 0) | ((REG32(ADR_INFO13)) & 0x00000000))
+#define SET_INFO14(_VAL_) (REG32(ADR_INFO14)) = (((_VAL_) << 0) | ((REG32(ADR_INFO14)) & 0x00000000))
+#define SET_INFO15(_VAL_) (REG32(ADR_INFO15)) = (((_VAL_) << 0) | ((REG32(ADR_INFO15)) & 0x00000000))
+#define SET_INFO16(_VAL_) (REG32(ADR_INFO16)) = (((_VAL_) << 0) | ((REG32(ADR_INFO16)) & 0x00000000))
+#define SET_INFO17(_VAL_) (REG32(ADR_INFO17)) = (((_VAL_) << 0) | ((REG32(ADR_INFO17)) & 0x00000000))
+#define SET_INFO18(_VAL_) (REG32(ADR_INFO18)) = (((_VAL_) << 0) | ((REG32(ADR_INFO18)) & 0x00000000))
+#define SET_INFO19(_VAL_) (REG32(ADR_INFO19)) = (((_VAL_) << 0) | ((REG32(ADR_INFO19)) & 0x00000000))
+#define SET_INFO20(_VAL_) (REG32(ADR_INFO20)) = (((_VAL_) << 0) | ((REG32(ADR_INFO20)) & 0x00000000))
+#define SET_INFO21(_VAL_) (REG32(ADR_INFO21)) = (((_VAL_) << 0) | ((REG32(ADR_INFO21)) & 0x00000000))
+#define SET_INFO22(_VAL_) (REG32(ADR_INFO22)) = (((_VAL_) << 0) | ((REG32(ADR_INFO22)) & 0x00000000))
+#define SET_INFO23(_VAL_) (REG32(ADR_INFO23)) = (((_VAL_) << 0) | ((REG32(ADR_INFO23)) & 0x00000000))
+#define SET_INFO24(_VAL_) (REG32(ADR_INFO24)) = (((_VAL_) << 0) | ((REG32(ADR_INFO24)) & 0x00000000))
+#define SET_INFO25(_VAL_) (REG32(ADR_INFO25)) = (((_VAL_) << 0) | ((REG32(ADR_INFO25)) & 0x00000000))
+#define SET_INFO26(_VAL_) (REG32(ADR_INFO26)) = (((_VAL_) << 0) | ((REG32(ADR_INFO26)) & 0x00000000))
+#define SET_INFO27(_VAL_) (REG32(ADR_INFO27)) = (((_VAL_) << 0) | ((REG32(ADR_INFO27)) & 0x00000000))
+#define SET_INFO28(_VAL_) (REG32(ADR_INFO28)) = (((_VAL_) << 0) | ((REG32(ADR_INFO28)) & 0x00000000))
+#define SET_INFO29(_VAL_) (REG32(ADR_INFO29)) = (((_VAL_) << 0) | ((REG32(ADR_INFO29)) & 0x00000000))
+#define SET_INFO30(_VAL_) (REG32(ADR_INFO30)) = (((_VAL_) << 0) | ((REG32(ADR_INFO30)) & 0x00000000))
+#define SET_INFO31(_VAL_) (REG32(ADR_INFO31)) = (((_VAL_) << 0) | ((REG32(ADR_INFO31)) & 0x00000000))
+#define SET_INFO32(_VAL_) (REG32(ADR_INFO32)) = (((_VAL_) << 0) | ((REG32(ADR_INFO32)) & 0x00000000))
+#define SET_INFO33(_VAL_) (REG32(ADR_INFO33)) = (((_VAL_) << 0) | ((REG32(ADR_INFO33)) & 0x00000000))
+#define SET_INFO34(_VAL_) (REG32(ADR_INFO34)) = (((_VAL_) << 0) | ((REG32(ADR_INFO34)) & 0x00000000))
+#define SET_INFO35(_VAL_) (REG32(ADR_INFO35)) = (((_VAL_) << 0) | ((REG32(ADR_INFO35)) & 0x00000000))
+#define SET_INFO36(_VAL_) (REG32(ADR_INFO36)) = (((_VAL_) << 0) | ((REG32(ADR_INFO36)) & 0x00000000))
+#define SET_INFO37(_VAL_) (REG32(ADR_INFO37)) = (((_VAL_) << 0) | ((REG32(ADR_INFO37)) & 0x00000000))
+#define SET_INFO38(_VAL_) (REG32(ADR_INFO38)) = (((_VAL_) << 0) | ((REG32(ADR_INFO38)) & 0x00000000))
+#define SET_INFO_MASK(_VAL_) (REG32(ADR_INFO_MASK)) = (((_VAL_) << 0) | ((REG32(ADR_INFO_MASK)) & 0x00000000))
+#define SET_INFO_DEF_RATE(_VAL_) (REG32(ADR_INFO_RATE_OFFSET)) = (((_VAL_) << 0) | ((REG32(ADR_INFO_RATE_OFFSET)) & 0xffffffc0))
+#define SET_INFO_MRX_OFFSET(_VAL_) (REG32(ADR_INFO_RATE_OFFSET)) = (((_VAL_) << 16) | ((REG32(ADR_INFO_RATE_OFFSET)) & 0xfff0ffff))
+#define SET_BCAST_RATEUNKNOW(_VAL_) (REG32(ADR_INFO_RATE_OFFSET)) = (((_VAL_) << 24) | ((REG32(ADR_INFO_RATE_OFFSET)) & 0xc0ffffff))
+#define SET_INFO_IDX_TBL_ADDR(_VAL_) (REG32(ADR_INFO_IDX_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_INFO_IDX_ADDR)) & 0x00000000))
+#define SET_INFO_LEN_TBL_ADDR(_VAL_) (REG32(ADR_INFO_LEN_ADDR)) = (((_VAL_) << 0) | ((REG32(ADR_INFO_LEN_ADDR)) & 0x00000000))
+#define SET_IC_TAG_31_0(_VAL_) (REG32(ADR_IC_TIME_TAG_0)) = (((_VAL_) << 0) | ((REG32(ADR_IC_TIME_TAG_0)) & 0x00000000))
+#define SET_IC_TAG_63_32(_VAL_) (REG32(ADR_IC_TIME_TAG_1)) = (((_VAL_) << 0) | ((REG32(ADR_IC_TIME_TAG_1)) & 0x00000000))
+#define SET_CH1_PRI(_VAL_) (REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) = (((_VAL_) << 0) | ((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0xfffffffc))
+#define SET_CH2_PRI(_VAL_) (REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) = (((_VAL_) << 8) | ((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0xfffffcff))
+#define SET_CH3_PRI(_VAL_) (REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) = (((_VAL_) << 16) | ((REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) & 0xfffcffff))
+#define SET_RG_MAC_LPBK(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 0) | ((REG32(ADR_MAC_MODE)) & 0xfffffffe))
+#define SET_RG_MAC_M2M(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 1) | ((REG32(ADR_MAC_MODE)) & 0xfffffffd))
+#define SET_RG_PHY_LPBK(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 2) | ((REG32(ADR_MAC_MODE)) & 0xfffffffb))
+#define SET_RG_LPBK_RX_EN(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 3) | ((REG32(ADR_MAC_MODE)) & 0xfffffff7))
+#define SET_EXT_MAC_MODE(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 4) | ((REG32(ADR_MAC_MODE)) & 0xffffffef))
+#define SET_EXT_PHY_MODE(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 5) | ((REG32(ADR_MAC_MODE)) & 0xffffffdf))
+#define SET_ASIC_TAG(_VAL_) (REG32(ADR_MAC_MODE)) = (((_VAL_) << 24) | ((REG32(ADR_MAC_MODE)) & 0x00ffffff))
+#define SET_HCI_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 0) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffffffe))
+#define SET_CO_PROC_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 1) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffffffd))
+#define SET_MTX_MISC_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 3) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffffff7))
+#define SET_MTX_QUE_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 4) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffffef))
+#define SET_MTX_CHST_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 5) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffffdf))
+#define SET_MTX_BCN_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 6) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffffbf))
+#define SET_MRX_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 7) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffff7f))
+#define SET_AMPDU_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 8) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffffeff))
+#define SET_MMU_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 9) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffffdff))
+#define SET_ID_MNG_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 11) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xfffff7ff))
+#define SET_MBOX_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 12) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffefff))
+#define SET_SCRT_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 13) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffdfff))
+#define SET_MIC_SW_RST(_VAL_) (REG32(ADR_ALL_SOFTWARE_RESET)) = (((_VAL_) << 14) | ((REG32(ADR_ALL_SOFTWARE_RESET)) & 0xffffbfff))
+#define SET_CO_PROC_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 1) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xfffffffd))
+#define SET_MTX_MISC_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 3) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xfffffff7))
+#define SET_MTX_QUE_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 4) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffffffef))
+#define SET_MTX_CHST_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 5) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffffffdf))
+#define SET_MTX_BCN_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 6) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffffffbf))
+#define SET_MRX_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 7) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffffff7f))
+#define SET_AMPDU_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 8) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xfffffeff))
+#define SET_ID_MNG_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 14) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffffbfff))
+#define SET_MBOX_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 15) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xffff7fff))
+#define SET_SCRT_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 16) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xfffeffff))
+#define SET_MIC_ENG_RST(_VAL_) (REG32(ADR_ENG_SOFTWARE_RESET)) = (((_VAL_) << 17) | ((REG32(ADR_ENG_SOFTWARE_RESET)) & 0xfffdffff))
+#define SET_CO_PROC_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 1) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffffffd))
+#define SET_MTX_MISC_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 3) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffffff7))
+#define SET_MTX_QUE0_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 4) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffffef))
+#define SET_MTX_QUE1_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 5) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffffdf))
+#define SET_MTX_QUE2_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 6) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffffbf))
+#define SET_MTX_QUE3_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 7) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffff7f))
+#define SET_MTX_QUE4_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 8) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffffeff))
+#define SET_MTX_QUE5_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 9) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffffdff))
+#define SET_MRX_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 10) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffffbff))
+#define SET_AMPDU_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 11) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xfffff7ff))
+#define SET_SCRT_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 13) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffdfff))
+#define SET_ID_MNG_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 14) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffffbfff))
+#define SET_MBOX_CSR_RST(_VAL_) (REG32(ADR_CSR_SOFTWARE_RESET)) = (((_VAL_) << 15) | ((REG32(ADR_CSR_SOFTWARE_RESET)) & 0xffff7fff))
+#define SET_HCI_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 0) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffffffe))
+#define SET_CO_PROC_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 1) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffffffd))
+#define SET_MTX_MISC_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 3) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffffff7))
+#define SET_MTX_QUE_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 4) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffffef))
+#define SET_MRX_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 5) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffffdf))
+#define SET_AMPDU_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 6) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffffbf))
+#define SET_MMU_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 7) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffff7f))
+#define SET_ID_MNG_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 9) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffffdff))
+#define SET_MBOX_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 10) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffffbff))
+#define SET_SCRT_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 11) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xfffff7ff))
+#define SET_MIC_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 12) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffefff))
+#define SET_MIB_CLK_EN(_VAL_) (REG32(ADR_MAC_CLOCK_ENABLE)) = (((_VAL_) << 13) | ((REG32(ADR_MAC_CLOCK_ENABLE)) & 0xffffdfff))
+#define SET_HCI_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 0) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xfffffffe))
+#define SET_CO_PROC_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 1) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xfffffffd))
+#define SET_MTX_MISC_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 3) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xfffffff7))
+#define SET_MTX_QUE_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 4) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffffef))
+#define SET_MRX_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 5) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffffdf))
+#define SET_AMPDU_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 6) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffffbf))
+#define SET_ID_MNG_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 12) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffefff))
+#define SET_MBOX_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 13) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffdfff))
+#define SET_SCRT_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 14) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffffbfff))
+#define SET_MIC_ENG_CLK_EN(_VAL_) (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (((_VAL_) << 15) | ((REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) & 0xffff7fff))
+#define SET_CO_PROC_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 1) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xfffffffd))
+#define SET_MRX_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 10) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xfffffbff))
+#define SET_AMPDU_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 11) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xfffff7ff))
+#define SET_SCRT_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 13) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xffffdfff))
+#define SET_ID_MNG_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 14) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xffffbfff))
+#define SET_MBOX_CSR_CLK_EN(_VAL_) (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (((_VAL_) << 15) | ((REG32(ADR_MAC_CSR_CLOCK_ENABLE)) & 0xffff7fff))
+#define SET_OP_MODE(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 0) | ((REG32(ADR_GLBLE_SET)) & 0xfffffffc))
+#define SET_HT_MODE(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 2) | ((REG32(ADR_GLBLE_SET)) & 0xfffffff3))
+#define SET_QOS_EN(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 4) | ((REG32(ADR_GLBLE_SET)) & 0xffffffef))
+#define SET_PB_OFFSET(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 8) | ((REG32(ADR_GLBLE_SET)) & 0xffff00ff))
+#define SET_SNIFFER_MODE(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 16) | ((REG32(ADR_GLBLE_SET)) & 0xfffeffff))
+#define SET_DUP_FLT(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 17) | ((REG32(ADR_GLBLE_SET)) & 0xfffdffff))
+#define SET_TX_PKT_RSVD(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 18) | ((REG32(ADR_GLBLE_SET)) & 0xffe3ffff))
+#define SET_AMPDU_SNIFFER(_VAL_) (REG32(ADR_GLBLE_SET)) = (((_VAL_) << 21) | ((REG32(ADR_GLBLE_SET)) & 0xffdfffff))
+#define SET_REASON_TRAP0(_VAL_) (REG32(ADR_REASON_TRAP0)) = (((_VAL_) << 0) | ((REG32(ADR_REASON_TRAP0)) & 0x00000000))
+#define SET_REASON_TRAP1(_VAL_) (REG32(ADR_REASON_TRAP1)) = (((_VAL_) << 0) | ((REG32(ADR_REASON_TRAP1)) & 0x00000000))
+#define SET_BSSID_31_0(_VAL_) (REG32(ADR_BSSID_0)) = (((_VAL_) << 0) | ((REG32(ADR_BSSID_0)) & 0x00000000))
+#define SET_BSSID_47_32(_VAL_) (REG32(ADR_BSSID_1)) = (((_VAL_) << 0) | ((REG32(ADR_BSSID_1)) & 0xffff0000))
+#define SET_SCRT_STATE(_VAL_) (REG32(ADR_SCRT_STATE)) = (((_VAL_) << 0) | ((REG32(ADR_SCRT_STATE)) & 0xfffffff0))
+#define SET_STA_MAC_31_0(_VAL_) (REG32(ADR_STA_MAC_0)) = (((_VAL_) << 0) | ((REG32(ADR_STA_MAC_0)) & 0x00000000))
+#define SET_STA_MAC_47_32(_VAL_) (REG32(ADR_STA_MAC_1)) = (((_VAL_) << 0) | ((REG32(ADR_STA_MAC_1)) & 0xffff0000))
+#define SET_PAIR_SCRT(_VAL_) (REG32(ADR_SCRT_SET)) = (((_VAL_) << 0) | ((REG32(ADR_SCRT_SET)) & 0xfffffff8))
+#define SET_GRP_SCRT(_VAL_) (REG32(ADR_SCRT_SET)) = (((_VAL_) << 3) | ((REG32(ADR_SCRT_SET)) & 0xffffffc7))
+#define SET_SCRT_PKT_ID(_VAL_) (REG32(ADR_SCRT_SET)) = (((_VAL_) << 6) | ((REG32(ADR_SCRT_SET)) & 0xffffe03f))
+#define SET_SCRT_RPLY_IGNORE(_VAL_) (REG32(ADR_SCRT_SET)) = (((_VAL_) << 16) | ((REG32(ADR_SCRT_SET)) & 0xfffeffff))
+#define SET_COEXIST_EN(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 0) | ((REG32(ADR_BTCX0)) & 0xfffffffe))
+#define SET_WIRE_MODE(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 1) | ((REG32(ADR_BTCX0)) & 0xfffffff1))
+#define SET_WL_RX_PRI(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 4) | ((REG32(ADR_BTCX0)) & 0xffffffef))
+#define SET_WL_TX_PRI(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 5) | ((REG32(ADR_BTCX0)) & 0xffffffdf))
+#define SET_GURAN_USE_EN(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 8) | ((REG32(ADR_BTCX0)) & 0xfffffeff))
+#define SET_GURAN_USE_CTRL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 9) | ((REG32(ADR_BTCX0)) & 0xfffffdff))
+#define SET_BEACON_TIMEOUT_EN(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 10) | ((REG32(ADR_BTCX0)) & 0xfffffbff))
+#define SET_WLAN_ACT_POL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 11) | ((REG32(ADR_BTCX0)) & 0xfffff7ff))
+#define SET_DUAL_ANT_EN(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 12) | ((REG32(ADR_BTCX0)) & 0xffffefff))
+#define SET_TRSW_PHY_POL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 16) | ((REG32(ADR_BTCX0)) & 0xfffeffff))
+#define SET_WIFI_TX_SW_POL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 17) | ((REG32(ADR_BTCX0)) & 0xfffdffff))
+#define SET_WIFI_RX_SW_POL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 18) | ((REG32(ADR_BTCX0)) & 0xfffbffff))
+#define SET_BT_SW_POL(_VAL_) (REG32(ADR_BTCX0)) = (((_VAL_) << 19) | ((REG32(ADR_BTCX0)) & 0xfff7ffff))
+#define SET_BT_PRI_SMP_TIME(_VAL_) (REG32(ADR_BTCX1)) = (((_VAL_) << 0) | ((REG32(ADR_BTCX1)) & 0xffffff00))
+#define SET_BT_STA_SMP_TIME(_VAL_) (REG32(ADR_BTCX1)) = (((_VAL_) << 8) | ((REG32(ADR_BTCX1)) & 0xffff00ff))
+#define SET_BEACON_TIMEOUT(_VAL_) (REG32(ADR_BTCX1)) = (((_VAL_) << 16) | ((REG32(ADR_BTCX1)) & 0xff00ffff))
+#define SET_WLAN_REMAIN_TIME(_VAL_) (REG32(ADR_BTCX1)) = (((_VAL_) << 24) | ((REG32(ADR_BTCX1)) & 0x00ffffff))
+#define SET_SW_MANUAL_EN(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 0) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffffe))
+#define SET_SW_WL_TX(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 1) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffffd))
+#define SET_SW_WL_RX(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 2) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffffb))
+#define SET_SW_BT_TRX(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 3) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffff7))
+#define SET_BT_TXBAR_MANUAL_EN(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 4) | ((REG32(ADR_SWITCH_CTL)) & 0xffffffef))
+#define SET_BT_TXBAR_SET(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 5) | ((REG32(ADR_SWITCH_CTL)) & 0xffffffdf))
+#define SET_BT_BUSY_MANUAL_EN(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 8) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffeff))
+#define SET_BT_BUSY_SET(_VAL_) (REG32(ADR_SWITCH_CTL)) = (((_VAL_) << 9) | ((REG32(ADR_SWITCH_CTL)) & 0xfffffdff))
+#define SET_G0_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 2) | ((REG32(ADR_MIB_EN)) & 0xfffffffb))
+#define SET_G0_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 3) | ((REG32(ADR_MIB_EN)) & 0xfffffff7))
+#define SET_G1_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 4) | ((REG32(ADR_MIB_EN)) & 0xffffffef))
+#define SET_G1_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 5) | ((REG32(ADR_MIB_EN)) & 0xffffffdf))
+#define SET_Q0_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 6) | ((REG32(ADR_MIB_EN)) & 0xffffffbf))
+#define SET_Q0_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 7) | ((REG32(ADR_MIB_EN)) & 0xffffff7f))
+#define SET_Q1_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 8) | ((REG32(ADR_MIB_EN)) & 0xfffffeff))
+#define SET_Q1_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 9) | ((REG32(ADR_MIB_EN)) & 0xfffffdff))
+#define SET_Q2_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 10) | ((REG32(ADR_MIB_EN)) & 0xfffffbff))
+#define SET_Q2_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 11) | ((REG32(ADR_MIB_EN)) & 0xfffff7ff))
+#define SET_Q3_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 12) | ((REG32(ADR_MIB_EN)) & 0xffffefff))
+#define SET_Q3_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 13) | ((REG32(ADR_MIB_EN)) & 0xffffdfff))
+#define SET_SCRT_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 14) | ((REG32(ADR_MIB_EN)) & 0xffffbfff))
+#define SET_SCRT_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 15) | ((REG32(ADR_MIB_EN)) & 0xffff7fff))
+#define SET_MISC_PKT_CLS_MIB_EN(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 16) | ((REG32(ADR_MIB_EN)) & 0xfffeffff))
+#define SET_MISC_PKT_CLS_ONGOING(_VAL_) (REG32(ADR_MIB_EN)) = (((_VAL_) << 17) | ((REG32(ADR_MIB_EN)) & 0xfffdffff))
+#define SET_MTX_WSID0_SUCC(_VAL_) (REG32(ADR_MTX_WSID0_SUCC)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_WSID0_SUCC)) & 0xffff0000))
+#define SET_MTX_WSID0_FRM(_VAL_) (REG32(ADR_MTX_WSID0_FRM)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_WSID0_FRM)) & 0xffff0000))
+#define SET_MTX_WSID0_RETRY(_VAL_) (REG32(ADR_MTX_WSID0_RETRY)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_WSID0_RETRY)) & 0xffff0000))
+#define SET_MTX_WSID0_TOTAL(_VAL_) (REG32(ADR_MTX_WSID0_TOTAL)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_WSID0_TOTAL)) & 0xffff0000))
+#define SET_MTX_GRP(_VAL_) (REG32(ADR_MTX_GROUP)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_GROUP)) & 0xfff00000))
+#define SET_MTX_FAIL(_VAL_) (REG32(ADR_MTX_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_FAIL)) & 0xffff0000))
+#define SET_MTX_RETRY(_VAL_) (REG32(ADR_MTX_RETRY)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_RETRY)) & 0xfff00000))
+#define SET_MTX_MULTI_RETRY(_VAL_) (REG32(ADR_MTX_MULTI_RETRY)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_MULTI_RETRY)) & 0xfff00000))
+#define SET_MTX_RTS_SUCC(_VAL_) (REG32(ADR_MTX_RTS_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_RTS_SUCCESS)) & 0xffff0000))
+#define SET_MTX_RTS_FAIL(_VAL_) (REG32(ADR_MTX_RTS_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_RTS_FAIL)) & 0xffff0000))
+#define SET_MTX_ACK_FAIL(_VAL_) (REG32(ADR_MTX_ACK_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_ACK_FAIL)) & 0xffff0000))
+#define SET_MTX_FRM(_VAL_) (REG32(ADR_MTX_FRM)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_FRM)) & 0xfff00000))
+#define SET_MTX_ACK_TX(_VAL_) (REG32(ADR_MTX_ACK_TX)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_ACK_TX)) & 0xffff0000))
+#define SET_MTX_CTS_TX(_VAL_) (REG32(ADR_MTX_CTS_TX)) = (((_VAL_) << 0) | ((REG32(ADR_MTX_CTS_TX)) & 0xffff0000))
+#define SET_MRX_DUP(_VAL_) (REG32(ADR_MRX_DUP_FRM)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_DUP_FRM)) & 0xffff0000))
+#define SET_MRX_FRG(_VAL_) (REG32(ADR_MRX_FRG_FRM)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FRG_FRM)) & 0xfff00000))
+#define SET_MRX_GRP(_VAL_) (REG32(ADR_MRX_GROUP_FRM)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_GROUP_FRM)) & 0xfff00000))
+#define SET_MRX_FCS_ERR(_VAL_) (REG32(ADR_MRX_FCS_ERR)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FCS_ERR)) & 0xffff0000))
+#define SET_MRX_FCS_SUC(_VAL_) (REG32(ADR_MRX_FCS_SUCC)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_FCS_SUCC)) & 0xffff0000))
+#define SET_MRX_MISS(_VAL_) (REG32(ADR_MRX_MISS)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MISS)) & 0xffff0000))
+#define SET_MRX_ALC_FAIL(_VAL_) (REG32(ADR_MRX_ALC_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_ALC_FAIL)) & 0xffff0000))
+#define SET_MRX_DAT_NTF(_VAL_) (REG32(ADR_MRX_DAT_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_DAT_NTF)) & 0xffff0000))
+#define SET_MRX_RTS_NTF(_VAL_) (REG32(ADR_MRX_RTS_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_RTS_NTF)) & 0xffff0000))
+#define SET_MRX_CTS_NTF(_VAL_) (REG32(ADR_MRX_CTS_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_CTS_NTF)) & 0xffff0000))
+#define SET_MRX_ACK_NTF(_VAL_) (REG32(ADR_MRX_ACK_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_ACK_NTF)) & 0xffff0000))
+#define SET_MRX_BA_NTF(_VAL_) (REG32(ADR_MRX_BA_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_BA_NTF)) & 0xffff0000))
+#define SET_MRX_DATA_NTF(_VAL_) (REG32(ADR_MRX_DATA_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_DATA_NTF)) & 0xffff0000))
+#define SET_MRX_MNG_NTF(_VAL_) (REG32(ADR_MRX_MNG_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MNG_NTF)) & 0xffff0000))
+#define SET_MRX_DAT_CRC_NTF(_VAL_) (REG32(ADR_MRX_DAT_CRC_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_DAT_CRC_NTF)) & 0xffff0000))
+#define SET_MRX_BAR_NTF(_VAL_) (REG32(ADR_MRX_BAR_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_BAR_NTF)) & 0xffff0000))
+#define SET_MRX_MB_MISS(_VAL_) (REG32(ADR_MRX_MB_MISS)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_MB_MISS)) & 0xffff0000))
+#define SET_MRX_NIDLE_MISS(_VAL_) (REG32(ADR_MRX_NIDLE_MISS)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_NIDLE_MISS)) & 0xffff0000))
+#define SET_MRX_CSR_NTF(_VAL_) (REG32(ADR_MRX_CSR_NTF)) = (((_VAL_) << 0) | ((REG32(ADR_MRX_CSR_NTF)) & 0xffff0000))
+#define SET_DBG_Q0_SUCC(_VAL_) (REG32(ADR_DBG_Q0_FRM_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q0_FRM_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q0_FAIL(_VAL_) (REG32(ADR_DBG_Q0_FRM_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q0_FRM_FAIL)) & 0xffff0000))
+#define SET_DBG_Q0_ACK_SUCC(_VAL_) (REG32(ADR_DBG_Q0_ACK_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q0_ACK_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q0_ACK_FAIL(_VAL_) (REG32(ADR_DBG_Q0_ACK_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q0_ACK_FAIL)) & 0xffff0000))
+#define SET_DBG_Q1_SUCC(_VAL_) (REG32(ADR_DBG_Q1_FRM_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q1_FRM_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q1_FAIL(_VAL_) (REG32(ADR_DBG_Q1_FRM_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q1_FRM_FAIL)) & 0xffff0000))
+#define SET_DBG_Q1_ACK_SUCC(_VAL_) (REG32(ADR_DBG_Q1_ACK_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q1_ACK_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q1_ACK_FAIL(_VAL_) (REG32(ADR_DBG_Q1_ACK_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q1_ACK_FAIL)) & 0xffff0000))
+#define SET_DBG_Q2_SUCC(_VAL_) (REG32(ADR_DBG_Q2_FRM_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q2_FRM_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q2_FAIL(_VAL_) (REG32(ADR_DBG_Q2_FRM_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q2_FRM_FAIL)) & 0xffff0000))
+#define SET_DBG_Q2_ACK_SUCC(_VAL_) (REG32(ADR_DBG_Q2_ACK_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q2_ACK_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q2_ACK_FAIL(_VAL_) (REG32(ADR_DBG_Q2_ACK_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q2_ACK_FAIL)) & 0xffff0000))
+#define SET_DBG_Q3_SUCC(_VAL_) (REG32(ADR_DBG_Q3_FRM_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q3_FRM_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q3_FAIL(_VAL_) (REG32(ADR_DBG_Q3_FRM_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q3_FRM_FAIL)) & 0xffff0000))
+#define SET_DBG_Q3_ACK_SUCC(_VAL_) (REG32(ADR_DBG_Q3_ACK_SUCCESS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q3_ACK_SUCCESS)) & 0xffff0000))
+#define SET_DBG_Q3_ACK_FAIL(_VAL_) (REG32(ADR_DBG_Q3_ACK_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_Q3_ACK_FAIL)) & 0xffff0000))
+#define SET_SCRT_TKIP_CERR(_VAL_) (REG32(ADR_MIB_SCRT_TKIP0)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_SCRT_TKIP0)) & 0xfff00000))
+#define SET_SCRT_TKIP_MIC_ERR(_VAL_) (REG32(ADR_MIB_SCRT_TKIP1)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_SCRT_TKIP1)) & 0xfff00000))
+#define SET_SCRT_TKIP_RPLY(_VAL_) (REG32(ADR_MIB_SCRT_TKIP2)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_SCRT_TKIP2)) & 0xfff00000))
+#define SET_SCRT_CCMP_RPLY(_VAL_) (REG32(ADR_MIB_SCRT_CCMP0)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_SCRT_CCMP0)) & 0xfff00000))
+#define SET_SCRT_CCMP_CERR(_VAL_) (REG32(ADR_MIB_SCRT_CCMP1)) = (((_VAL_) << 0) | ((REG32(ADR_MIB_SCRT_CCMP1)) & 0xfff00000))
+#define SET_DBG_LEN_CRC_FAIL(_VAL_) (REG32(ADR_DBG_LEN_CRC_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_LEN_CRC_FAIL)) & 0xffff0000))
+#define SET_DBG_LEN_ALC_FAIL(_VAL_) (REG32(ADR_DBG_LEN_ALC_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_LEN_ALC_FAIL)) & 0xffff0000))
+#define SET_DBG_AMPDU_PASS(_VAL_) (REG32(ADR_DBG_AMPDU_PASS)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_AMPDU_PASS)) & 0xffff0000))
+#define SET_DBG_AMPDU_FAIL(_VAL_) (REG32(ADR_DBG_AMPDU_FAIL)) = (((_VAL_) << 0) | ((REG32(ADR_DBG_AMPDU_FAIL)) & 0xffff0000))
+#define SET_RXID_ALC_CNT_FAIL(_VAL_) (REG32(ADR_ID_ALC_FAIL1)) = (((_VAL_) << 0) | ((REG32(ADR_ID_ALC_FAIL1)) & 0xffff0000))
+#define SET_RXID_ALC_LEN_FAIL(_VAL_) (REG32(ADR_ID_ALC_FAIL2)) = (((_VAL_) << 0) | ((REG32(ADR_ID_ALC_FAIL2)) & 0xffff0000))
+#define SET_CBR_RG_EN_MANUAL(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_TX_EN(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffd))
+#define SET_CBR_RG_TX_PA_EN(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffb))
+#define SET_CBR_RG_TX_DAC_EN(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffffff7))
+#define SET_CBR_RG_RX_AGC(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffffffef))
+#define SET_CBR_RG_RX_GAIN_MANUAL(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffffffdf))
+#define SET_CBR_RG_RFG(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffffff3f))
+#define SET_CBR_RG_PGAG(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffff0ff))
+#define SET_CBR_RG_MODE(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffffcfff))
+#define SET_CBR_RG_EN_TX_TRSW(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffffbfff))
+#define SET_CBR_RG_EN_SX(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffff7fff))
+#define SET_CBR_RG_EN_RX_LNA(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffeffff))
+#define SET_CBR_RG_EN_RX_MIXER(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 17) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffdffff))
+#define SET_CBR_RG_EN_RX_DIV2(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfffbffff))
+#define SET_CBR_RG_EN_RX_LOBUF(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 19) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfff7ffff))
+#define SET_CBR_RG_EN_RX_TZ(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffefffff))
+#define SET_CBR_RG_EN_RX_FILTER(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffdfffff))
+#define SET_CBR_RG_EN_RX_HPF(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xffbfffff))
+#define SET_CBR_RG_EN_RX_RSSI(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xff7fffff))
+#define SET_CBR_RG_EN_ADC(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfeffffff))
+#define SET_CBR_RG_EN_TX_MOD(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 25) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfdffffff))
+#define SET_CBR_RG_EN_TX_DIV2(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 26) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xfbffffff))
+#define SET_CBR_RG_EN_TX_DIV2_BUF(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xf7ffffff))
+#define SET_CBR_RG_EN_TX_LOBF(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xefffffff))
+#define SET_CBR_RG_EN_RX_LOBF(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 29) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xdfffffff))
+#define SET_CBR_RG_SEL_DPLL_CLK(_VAL_) (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 30) | ((REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) & 0xbfffffff))
+#define SET_CBR_RG_EN_TX_DPD(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_EN_TX_TSSI(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffffd))
+#define SET_CBR_RG_EN_RX_IQCAL(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffffb))
+#define SET_CBR_RG_EN_TX_DAC_CAL(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffff7))
+#define SET_CBR_RG_EN_TX_SELF_MIXER(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xffffffef))
+#define SET_CBR_RG_EN_TX_DAC_OUT(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xffffffdf))
+#define SET_CBR_RG_EN_LDO_RX_FE(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xffffffbf))
+#define SET_CBR_RG_EN_LDO_ABB(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xffffff7f))
+#define SET_CBR_RG_EN_LDO_AFE(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffeff))
+#define SET_CBR_RG_EN_SX_CHPLDO(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffdff))
+#define SET_CBR_RG_EN_SX_LOBFLDO(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffffbff))
+#define SET_CBR_RG_EN_IREF_RX(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xfffff7ff))
+#define SET_CBR_RG_DCDC_MODE(_VAL_) (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) & 0xffffefff))
+#define SET_CBR_RG_LDO_LEVEL_RX_FE(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xfffffff8))
+#define SET_CBR_RG_LDO_LEVEL_ABB(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xffffffc7))
+#define SET_CBR_RG_LDO_LEVEL_AFE(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xfffffe3f))
+#define SET_CBR_RG_SX_LDO_CHP_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xfffff1ff))
+#define SET_CBR_RG_SX_LDO_LOBF_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xffff8fff))
+#define SET_CBR_RG_SX_LDO_XOSC_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xfffc7fff))
+#define SET_CBR_RG_DP_LDO_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xffe3ffff))
+#define SET_CBR_RG_SX_LDO_VCO_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xff1fffff))
+#define SET_CBR_RG_TX_LDO_TX_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xf8ffffff))
+#define SET_CBR_RG_BUCK_LEVEL(_VAL_) (REG32(ADR_CBR_LDO_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_CBR_LDO_REGISTER)) & 0xc7ffffff))
+#define SET_CBR_RG_EN_RX_PADSW(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffffe))
+#define SET_CBR_RG_EN_RX_TESTNODE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffffd))
+#define SET_CBR_RG_RX_ABBCFIX(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffffb))
+#define SET_CBR_RG_RX_ABBCTUNE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffe07))
+#define SET_CBR_RG_RX_ABBOUT_TRI_STATE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffdff))
+#define SET_CBR_RG_RX_ABB_N_MODE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffffbff))
+#define SET_CBR_RG_RX_EN_LOOPA(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffff7ff))
+#define SET_CBR_RG_RX_FILTERI1ST(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xffffcfff))
+#define SET_CBR_RG_RX_FILTERI2ND(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xffff3fff))
+#define SET_CBR_RG_RX_FILTERI3RD(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfffcffff))
+#define SET_CBR_RG_RX_FILTERI_COURSE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfff3ffff))
+#define SET_CBR_RG_RX_FILTERVCM(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xffcfffff))
+#define SET_CBR_RG_RX_HPF3M(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xffbfffff))
+#define SET_CBR_RG_RX_HPF300K(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xff7fffff))
+#define SET_CBR_RG_RX_HPFI(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xfcffffff))
+#define SET_CBR_RG_RX_HPF_FINALCORNER(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 26) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xf3ffffff))
+#define SET_CBR_RG_RX_HPF_SETTLE1_C(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_1)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_ABB_REGISTER_1)) & 0xcfffffff))
+#define SET_CBR_RG_RX_HPF_SETTLE1_R(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfffffffc))
+#define SET_CBR_RG_RX_HPF_SETTLE2_C(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfffffff3))
+#define SET_CBR_RG_RX_HPF_SETTLE2_R(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xffffffcf))
+#define SET_CBR_RG_RX_HPF_VCMCON2(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xffffff3f))
+#define SET_CBR_RG_RX_HPF_VCMCON(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfffffcff))
+#define SET_CBR_RG_RX_OUTVCM(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfffff3ff))
+#define SET_CBR_RG_RX_TZI(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xffffcfff))
+#define SET_CBR_RG_RX_TZ_OUT_TRISTATE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xffffbfff))
+#define SET_CBR_RG_RX_TZ_VCM(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfffe7fff))
+#define SET_CBR_RG_EN_RX_RSSI_TESTNODE(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 17) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfff1ffff))
+#define SET_CBR_RG_RX_ADCRSSI_CLKSEL(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xffefffff))
+#define SET_CBR_RG_RX_ADCRSSI_VCM(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xff9fffff))
+#define SET_CBR_RG_RX_REC_LPFCORNER(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfe7fffff))
+#define SET_CBR_RG_RSSI_CLOCK_GATING(_VAL_) (REG32(ADR_CBR_ABB_REGISTER_2)) = (((_VAL_) << 25) | ((REG32(ADR_CBR_ABB_REGISTER_2)) & 0xfdffffff))
+#define SET_CBR_RG_TXPGA_CAPSW(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xfffffffc))
+#define SET_CBR_RG_TXPGA_MAIN(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xffffff03))
+#define SET_CBR_RG_TXPGA_STEER(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xffffc0ff))
+#define SET_CBR_RG_TXMOD_GMCELL(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xffff3fff))
+#define SET_CBR_RG_TXLPF_GMCELL(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xfffcffff))
+#define SET_CBR_RG_PACELL_EN(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xffe3ffff))
+#define SET_CBR_RG_PABIAS_CTRL(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xfe1fffff))
+#define SET_CBR_RG_PABIAS_AB(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 25) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xfdffffff))
+#define SET_CBR_RG_TX_DIV_VSET(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 26) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xf3ffffff))
+#define SET_CBR_RG_TX_LOBUF_VSET(_VAL_) (REG32(ADR_CBR_TX_FE_REGISTER)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_TX_FE_REGISTER)) & 0xcfffffff))
+#define SET_CBR_RG_RX_SQDC(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xfffffff8))
+#define SET_CBR_RG_RX_DIV2_CORE(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xffffffe7))
+#define SET_CBR_RG_RX_LOBUF(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xffffff9f))
+#define SET_CBR_RG_TX_DPDGM_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xfffff87f))
+#define SET_CBR_RG_TX_DPD_DIV(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xffff87ff))
+#define SET_CBR_RG_TX_TSSI_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xfffc7fff))
+#define SET_CBR_RG_TX_TSSI_DIV(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xffe3ffff))
+#define SET_CBR_RG_TX_TSSI_TESTMODE(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xffdfffff))
+#define SET_CBR_RG_TX_TSSI_TEST(_VAL_) (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_RX_FE_REGISTER_1)) & 0xff3fffff))
+#define SET_CBR_RG_RX_HG_LNA_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfffffffc))
+#define SET_CBR_RG_RX_HG_LNAHGN_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffffffc3))
+#define SET_CBR_RG_RX_HG_LNAHGP_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfffffc3f))
+#define SET_CBR_RG_RX_HG_LNALG_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffffc3ff))
+#define SET_CBR_RG_RX_HG_TZ_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffff3fff))
+#define SET_CBR_RG_RX_HG_TZ_CAP(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfff8ffff))
+#define SET_CBR_RG_RX_MG_LNA_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfffffffc))
+#define SET_CBR_RG_RX_MG_LNAHGN_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffffffc3))
+#define SET_CBR_RG_RX_MG_LNAHGP_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfffffc3f))
+#define SET_CBR_RG_RX_MG_LNALG_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffffc3ff))
+#define SET_CBR_RG_RX_MG_TZ_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffff3fff))
+#define SET_CBR_RG_RX_MG_TZ_CAP(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfff8ffff))
+#define SET_CBR_RG_RX_LG_LNA_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfffffffc))
+#define SET_CBR_RG_RX_LG_LNAHGN_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffffffc3))
+#define SET_CBR_RG_RX_LG_LNAHGP_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfffffc3f))
+#define SET_CBR_RG_RX_LG_LNALG_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffffc3ff))
+#define SET_CBR_RG_RX_LG_TZ_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffff3fff))
+#define SET_CBR_RG_RX_LG_TZ_CAP(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfff8ffff))
+#define SET_CBR_RG_RX_ULG_LNA_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfffffffc))
+#define SET_CBR_RG_RX_ULG_LNAHGN_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffffffc3))
+#define SET_CBR_RG_RX_ULG_LNAHGP_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfffffc3f))
+#define SET_CBR_RG_RX_ULG_LNALG_BIAS(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffffc3ff))
+#define SET_CBR_RG_RX_ULG_TZ_GC(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffff3fff))
+#define SET_CBR_RG_RX_ULG_TZ_CAP(_VAL_) (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfff8ffff))
+#define SET_CBR_RG_HPF1_FAST_SET_X(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_HPF1_FAST_SET_Y(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xfffffffd))
+#define SET_CBR_RG_HPF1_FAST_SET_Z(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xfffffffb))
+#define SET_CBR_RG_HPF_T1A(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xffffffe7))
+#define SET_CBR_RG_HPF_T1B(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xffffff9f))
+#define SET_CBR_RG_HPF_T1C(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xfffffe7f))
+#define SET_CBR_RG_RX_LNA_TRI_SEL(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xfffff9ff))
+#define SET_CBR_RG_RX_LNA_SETTLE(_VAL_) (REG32(ADR_CBR_RX_FSM_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_RX_FSM_REGISTER)) & 0xffffe7ff))
+#define SET_CBR_RG_ADC_CLKSEL(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_ADC_DIBIAS(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffffff9))
+#define SET_CBR_RG_ADC_DIVR(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffffff7))
+#define SET_CBR_RG_ADC_DVCMI(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xffffffcf))
+#define SET_CBR_RG_ADC_SAMSEL(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffffc3f))
+#define SET_CBR_RG_ADC_STNBY(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffffbff))
+#define SET_CBR_RG_ADC_TESTMODE(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffff7ff))
+#define SET_CBR_RG_ADC_TSEL(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xffff0fff))
+#define SET_CBR_RG_ADC_VRSEL(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfffcffff))
+#define SET_CBR_RG_DICMP(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xfff3ffff))
+#define SET_CBR_RG_DIOP(_VAL_) (REG32(ADR_CBR_RX_ADC_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_RX_ADC_REGISTER)) & 0xffcfffff))
+#define SET_CBR_RG_DACI1ST(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xfffffffc))
+#define SET_CBR_RG_TX_DACLPF_ICOURSE(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xfffffff3))
+#define SET_CBR_RG_TX_DACLPF_IFINE(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffffffcf))
+#define SET_CBR_RG_TX_DACLPF_VCM(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffffff3f))
+#define SET_CBR_RG_TX_DAC_CKEDGE_SEL(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xfffffeff))
+#define SET_CBR_RG_TX_DAC_IBIAS(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xfffff9ff))
+#define SET_CBR_RG_TX_DAC_OS(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffffc7ff))
+#define SET_CBR_RG_TX_DAC_RCAL(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffff3fff))
+#define SET_CBR_RG_TX_DAC_TSEL(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xfff0ffff))
+#define SET_CBR_RG_TX_EN_VOLTAGE_IN(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffefffff))
+#define SET_CBR_RG_TXLPF_BYPASS(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffdfffff))
+#define SET_CBR_RG_TXLPF_BOOSTI(_VAL_) (REG32(ADR_CBR_TX_DAC_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_TX_DAC_REGISTER)) & 0xffbfffff))
+#define SET_CBR_RG_EN_SX_R3(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_EN_SX_CH(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffffd))
+#define SET_CBR_RG_EN_SX_CHP(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffffb))
+#define SET_CBR_RG_EN_SX_DIVCK(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffff7))
+#define SET_CBR_RG_EN_SX_VCOBF(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffffef))
+#define SET_CBR_RG_EN_SX_VCO(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffffdf))
+#define SET_CBR_RG_EN_SX_MOD(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffffbf))
+#define SET_CBR_RG_EN_SX_LCK(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffff7f))
+#define SET_CBR_RG_EN_SX_DITHER(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffeff))
+#define SET_CBR_RG_EN_SX_DELCAL(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffdff))
+#define SET_CBR_RG_EN_SX_PC_BYPASS(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffffbff))
+#define SET_CBR_RG_EN_SX_VT_MON(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xfffff7ff))
+#define SET_CBR_RG_EN_SX_VT_MON_DG(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffefff))
+#define SET_CBR_RG_EN_SX_DIV(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffdfff))
+#define SET_CBR_RG_EN_SX_LPF(_VAL_) (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_SX_ENABLE_RGISTER)) & 0xffffbfff))
+#define SET_CBR_RG_SX_RFCTRL_F(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_RGISTER_1)) & 0xff000000))
+#define SET_CBR_RG_SX_SEL_CP(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_1)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_SYN_RGISTER_1)) & 0xf0ffffff))
+#define SET_CBR_RG_SX_SEL_CS(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_1)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_SYN_RGISTER_1)) & 0x0fffffff))
+#define SET_CBR_RG_SX_RFCTRL_CH(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_RGISTER_2)) & 0xfffff800))
+#define SET_CBR_RG_SX_SEL_C3(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_SYN_RGISTER_2)) & 0xffff87ff))
+#define SET_CBR_RG_SX_SEL_RS(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_SYN_RGISTER_2)) & 0xfff07fff))
+#define SET_CBR_RG_SX_SEL_R3(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_SYN_RGISTER_2)) & 0xfe0fffff))
+#define SET_CBR_RG_SX_SEL_ICHP(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xffffffe0))
+#define SET_CBR_RG_SX_SEL_PCHP(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfffffc1f))
+#define SET_CBR_RG_SX_SEL_CHP_REGOP(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xffffc3ff))
+#define SET_CBR_RG_SX_SEL_CHP_UNIOP(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfffc3fff))
+#define SET_CBR_RG_SX_CHP_IOST_POL(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfffbffff))
+#define SET_CBR_RG_SX_CHP_IOST(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 19) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xffc7ffff))
+#define SET_CBR_RG_SX_PFDSEL(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xffbfffff))
+#define SET_CBR_RG_SX_PFD_SET(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xff7fffff))
+#define SET_CBR_RG_SX_PFD_SET1(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfeffffff))
+#define SET_CBR_RG_SX_PFD_SET2(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 25) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfdffffff))
+#define SET_CBR_RG_SX_VBNCAS_SEL(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 26) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xfbffffff))
+#define SET_CBR_RG_SX_PFD_RST_H(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 27) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xf7ffffff))
+#define SET_CBR_RG_SX_PFD_TRUP(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xefffffff))
+#define SET_CBR_RG_SX_PFD_TRDN(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 29) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xdfffffff))
+#define SET_CBR_RG_SX_PFD_TRSEL(_VAL_) (REG32(ADR_CBR_SYN_PFD_CHP)) = (((_VAL_) << 30) | ((REG32(ADR_CBR_SYN_PFD_CHP)) & 0xbfffffff))
+#define SET_CBR_RG_SX_VCOBA_R(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xfffffff8))
+#define SET_CBR_RG_SX_VCORSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xffffff07))
+#define SET_CBR_RG_SX_VCOCUSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xfffff0ff))
+#define SET_CBR_RG_SX_RXBFSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xffff0fff))
+#define SET_CBR_RG_SX_TXBFSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xfff0ffff))
+#define SET_CBR_RG_SX_VCOBFSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xff0fffff))
+#define SET_CBR_RG_SX_DIVBFSEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0xf0ffffff))
+#define SET_CBR_RG_SX_GNDR_SEL(_VAL_) (REG32(ADR_CBR_SYN_VCO_LOBF)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_SYN_VCO_LOBF)) & 0x0fffffff))
+#define SET_CBR_RG_SX_DITHER_WEIGHT(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffffffc))
+#define SET_CBR_RG_SX_MOD_ERRCMP(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffffff3))
+#define SET_CBR_RG_SX_MOD_ORDER(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xffffffcf))
+#define SET_CBR_RG_SX_SDM_D1(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xffffffbf))
+#define SET_CBR_RG_SX_SDM_D2(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xffffff7f))
+#define SET_CBR_RG_SDM_PASS(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffffeff))
+#define SET_CBR_RG_SX_RST_H_DIV(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffffdff))
+#define SET_CBR_RG_SX_SDM_EDGE(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffffbff))
+#define SET_CBR_RG_SX_XO_GM(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xffffe7ff))
+#define SET_CBR_RG_SX_REFBYTWO(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 13) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xffffdfff))
+#define SET_CBR_RG_SX_XO_SWCAP(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffc3fff))
+#define SET_CBR_RG_SX_SDMLUT_INV(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfffbffff))
+#define SET_CBR_RG_SX_LCKEN(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 19) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xfff7ffff))
+#define SET_CBR_RG_SX_PREVDD(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xff0fffff))
+#define SET_CBR_RG_SX_PSCONTERVDD(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xf0ffffff))
+#define SET_CBR_RG_SX_MOD_ERR_DELAY(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 28) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xcfffffff))
+#define SET_CBR_RG_SX_MODDB(_VAL_) (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 30) | ((REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) & 0xbfffffff))
+#define SET_CBR_RG_SX_CV_CURVE_SEL(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xfffffffc))
+#define SET_CBR_RG_SX_SEL_DELAY(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xffffff83))
+#define SET_CBR_RG_SX_REF_CYCLE(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 7) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xfffff87f))
+#define SET_CBR_RG_SX_VCOBY16(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xfffff7ff))
+#define SET_CBR_RG_SX_VCOBY32(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xffffefff))
+#define SET_CBR_RG_SX_PH(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 13) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xffffdfff))
+#define SET_CBR_RG_SX_PL(_VAL_) (REG32(ADR_CBR_SYN_LCK1)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_SYN_LCK1)) & 0xffffbfff))
+#define SET_CBR_RG_SX_VT_MON_MODE(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xfffffffe))
+#define SET_CBR_RG_SX_VT_TH_HI(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xfffffff9))
+#define SET_CBR_RG_SX_VT_TH_LO(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xffffffe7))
+#define SET_CBR_RG_SX_VT_SET(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xffffffdf))
+#define SET_CBR_RG_SX_VT_MON_TMR(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xffff803f))
+#define SET_CBR_RG_IDEAL_CYCLE(_VAL_) (REG32(ADR_CBR_SYN_LCK2)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_SYN_LCK2)) & 0xf0007fff))
+#define SET_CBR_RG_EN_DP_VT_MON(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_DP_VT_TH_HI(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xfffffff9))
+#define SET_CBR_RG_DP_VT_TH_LO(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xffffffe7))
+#define SET_CBR_RG_DP_VT_MON_TMR(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xffffc01f))
+#define SET_CBR_RG_DP_CK320BY2(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xffffbfff))
+#define SET_CBR_RG_SX_DELCTRL(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xffe07fff))
+#define SET_CBR_RG_DP_OD_TEST(_VAL_) (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_DPLL_VCO_REGISTER)) & 0xffdfffff))
+#define SET_CBR_RG_DP_BBPLL_BP(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_DP_BBPLL_ICP(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfffffff9))
+#define SET_CBR_RG_DP_BBPLL_IDUAL(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xffffffe7))
+#define SET_CBR_RG_DP_BBPLL_OD_TEST(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfffffe1f))
+#define SET_CBR_RG_DP_BBPLL_PD(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfffffdff))
+#define SET_CBR_RG_DP_BBPLL_TESTSEL(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xffffe3ff))
+#define SET_CBR_RG_DP_BBPLL_PFD_DLY(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xffff9fff))
+#define SET_CBR_RG_DP_RP(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfffc7fff))
+#define SET_CBR_RG_DP_RHP(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xfff3ffff))
+#define SET_CBR_RG_DP_DR3(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xff8fffff))
+#define SET_CBR_RG_DP_DCP(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0xf87fffff))
+#define SET_CBR_RG_DP_DCS(_VAL_) (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) & 0x87ffffff))
+#define SET_CBR_RG_DP_FBDIV(_VAL_) (REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0xfffff000))
+#define SET_CBR_RG_DP_FODIV(_VAL_) (REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0xffc00fff))
+#define SET_CBR_RG_DP_REFDIV(_VAL_) (REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) & 0x003fffff))
+#define SET_CBR_RG_IDACAI_PGAG15(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG15(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG14(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG14(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG13(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG13(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG12(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG12(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG11(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG11(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG10(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG10(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG9(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG9(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG8(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG8(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG7(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG7(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG6(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG6(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG5(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG5(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG4(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG4(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG3(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG3(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG2(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG2(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) & 0xff03ffff))
+#define SET_CBR_RG_IDACAI_PGAG1(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0xffffffc0))
+#define SET_CBR_RG_IDACAQ_PGAG1(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0xfffff03f))
+#define SET_CBR_RG_IDACAI_PGAG0(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0xfffc0fff))
+#define SET_CBR_RG_IDACAQ_PGAG0(_VAL_) (REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 18) | ((REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) & 0xff03ffff))
+#define SET_CBR_RG_EN_RCAL(_VAL_) (REG32(ADR_CBR_RCAL_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RCAL_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_RCAL_SPD(_VAL_) (REG32(ADR_CBR_RCAL_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_RCAL_REGISTER)) & 0xfffffffd))
+#define SET_CBR_RG_RCAL_TMR(_VAL_) (REG32(ADR_CBR_RCAL_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RCAL_REGISTER)) & 0xfffffe03))
+#define SET_CBR_RG_RCAL_CODE_CWR(_VAL_) (REG32(ADR_CBR_RCAL_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_RCAL_REGISTER)) & 0xfffffdff))
+#define SET_CBR_RG_RCAL_CODE_CWD(_VAL_) (REG32(ADR_CBR_RCAL_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RCAL_REGISTER)) & 0xffff83ff))
+#define SET_CBR_RG_SX_SUB_SEL_CWR(_VAL_) (REG32(ADR_CBR_MANUAL_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_MANUAL_REGISTER)) & 0xfffffffe))
+#define SET_CBR_RG_SX_SUB_SEL_CWD(_VAL_) (REG32(ADR_CBR_MANUAL_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_MANUAL_REGISTER)) & 0xffffff01))
+#define SET_CBR_RG_DP_BBPLL_BS_CWR(_VAL_) (REG32(ADR_CBR_MANUAL_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_MANUAL_REGISTER)) & 0xfffffeff))
+#define SET_CBR_RG_DP_BBPLL_BS_CWD(_VAL_) (REG32(ADR_CBR_MANUAL_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_MANUAL_REGISTER)) & 0xffff81ff))
+#define SET_CBR_RCAL_RDY(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xfffffffe))
+#define SET_CBR_DA_LCK_RDY(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xfffffffd))
+#define SET_CBR_VT_MON_RDY(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xfffffffb))
+#define SET_CBR_DP_VT_MON_RDY(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xfffffff7))
+#define SET_CBR_CH_RDY(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xffffffef))
+#define SET_CBR_DA_R_CODE_LUT(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xfffff83f))
+#define SET_CBR_AD_SX_VT_MON_Q(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xffffe7ff))
+#define SET_CBR_AD_DP_VT_MON_Q(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 13) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_1)) & 0xffff9fff))
+#define SET_CBR_DA_R_CAL_CODE(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0xffffffe0))
+#define SET_CBR_DA_SX_SUB_SEL(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_2)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0xfffff01f))
+#define SET_CBR_DA_DP_BBPLL_BS(_VAL_) (REG32(ADR_CBR_READ_ONLY_FLAGS_2)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_READ_ONLY_FLAGS_2)) & 0xfffc0fff))
+#define SET_CBR_TX_EN(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_0)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0xfffffffe))
+#define SET_CBR_TX_CNT_RST(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_0)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0xfffffffd))
+#define SET_CBR_IFS_TIME(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_0)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0xffffff03))
+#define SET_CBR_LENGTH_TARGET(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_0)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0xfff000ff))
+#define SET_CBR_TX_CNT_TARGET(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_0)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_RG_PKT_GEN_0)) & 0x00ffffff))
+#define SET_CBR_TC_CNT_TARGET(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_1)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RG_PKT_GEN_1)) & 0xff000000))
+#define SET_CBR_PLCP_PSDU_DATA_MEM(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_2)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0xffffff00))
+#define SET_CBR_PLCP_PSDU_PREAMBLE_SHORT(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_2)) = (((_VAL_) << 8) | ((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0xfffffeff))
+#define SET_CBR_PLCP_BYTE_LENGTH(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_2)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0xffe001ff))
+#define SET_CBR_PLCP_PSDU_RATE(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_2)) = (((_VAL_) << 21) | ((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0xff9fffff))
+#define SET_CBR_TAIL_TIME(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_2)) = (((_VAL_) << 23) | ((REG32(ADR_CBR_RG_PKT_GEN_2)) & 0xe07fffff))
+#define SET_CBR_RG_O_PAD_PD(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffffe))
+#define SET_CBR_RG_I_PAD_PD(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 1) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffffd))
+#define SET_CBR_SEL_ADCKP_INV(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 2) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffffb))
+#define SET_CBR_RG_PAD_DS(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 3) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffff7))
+#define SET_CBR_SEL_ADCKP_MUX(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 4) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xffffffef))
+#define SET_CBR_RG_PAD_DS_CLK(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xffffffdf))
+#define SET_CBR_INTP_SEL(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffdff))
+#define SET_CBR_IQ_SWP(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 10) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffffbff))
+#define SET_CBR_RG_EN_EXT_DA(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 11) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfffff7ff))
+#define SET_CBR_RG_DIS_DA_OFFSET(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 12) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xffffefff))
+#define SET_CBR_DBG_SEL(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xfff0ffff))
+#define SET_CBR_DBG_EN(_VAL_) (REG32(ADR_CBR_RG_INTEGRATION)) = (((_VAL_) << 20) | ((REG32(ADR_CBR_RG_INTEGRATION)) & 0xffefffff))
+#define SET_CBR_RG_PKT_GEN_TX_CNT(_VAL_) (REG32(ADR_CBR_RG_PKT_GEN_TXCNT)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_RG_PKT_GEN_TXCNT)) & 0x00000000))
+#define SET_CBR_TP_SEL(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 0) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0xffffffe0))
+#define SET_CBR_IDEAL_IQ_EN(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 5) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0xffffffdf))
+#define SET_CBR_DATA_OUT_SEL(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 6) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0xfffffe3f))
+#define SET_CBR_TWO_TONE_EN(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 9) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0xfffffdff))
+#define SET_CBR_FREQ_SEL(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 16) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0xff00ffff))
+#define SET_CBR_IQ_SCALE(_VAL_) (REG32(ADR_CBR_PATTERN_GEN)) = (((_VAL_) << 24) | ((REG32(ADR_CBR_PATTERN_GEN)) & 0x00ffffff))
+#define SET_CPU_QUE_POP(_VAL_) (REG32(ADR_MB_CPU_INT)) = (((_VAL_) << 0) | ((REG32(ADR_MB_CPU_INT)) & 0xfffffffe))
+#define SET_CPU_INT(_VAL_) (REG32(ADR_MB_CPU_INT)) = (((_VAL_) << 2) | ((REG32(ADR_MB_CPU_INT)) & 0xfffffffb))
+#define SET_CPU_ID_TB0(_VAL_) (REG32(ADR_CPU_ID_TB0)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_ID_TB0)) & 0x00000000))
+#define SET_CPU_ID_TB1(_VAL_) (REG32(ADR_CPU_ID_TB1)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_ID_TB1)) & 0x00000000))
+#define SET_HW_PKTID(_VAL_) (REG32(ADR_CH0_TRIG_1)) = (((_VAL_) << 0) | ((REG32(ADR_CH0_TRIG_1)) & 0xfffff800))
+#define SET_CH0_INT_ADDR(_VAL_) (REG32(ADR_CH0_TRIG_0)) = (((_VAL_) << 0) | ((REG32(ADR_CH0_TRIG_0)) & 0x00000000))
+#define SET_PRI_HW_PKTID(_VAL_) (REG32(ADR_CH0_PRI_TRIG)) = (((_VAL_) << 0) | ((REG32(ADR_CH0_PRI_TRIG)) & 0xfffff800))
+#define SET_CH0_FULL(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MCU_STATUS)) & 0xfffffffe))
+#define SET_FF0_EMPTY(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_MCU_STATUS)) & 0xfffffffd))
+#define SET_RLS_BUSY(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 9) | ((REG32(ADR_MCU_STATUS)) & 0xfffffdff))
+#define SET_RLS_COUNT_CLR(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 10) | ((REG32(ADR_MCU_STATUS)) & 0xfffffbff))
+#define SET_RTN_COUNT_CLR(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 11) | ((REG32(ADR_MCU_STATUS)) & 0xfffff7ff))
+#define SET_RLS_COUNT(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_MCU_STATUS)) & 0xff00ffff))
+#define SET_RTN_COUNT(_VAL_) (REG32(ADR_MCU_STATUS)) = (((_VAL_) << 24) | ((REG32(ADR_MCU_STATUS)) & 0x00ffffff))
+#define SET_FF0_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 0) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xffffffe0))
+#define SET_FF1_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 5) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xfffffe1f))
+#define SET_FF3_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 11) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xffffc7ff))
+#define SET_FF5_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 17) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xfff1ffff))
+#define SET_FF6_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 20) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xff8fffff))
+#define SET_FF7_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 23) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xfc7fffff))
+#define SET_FF8_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 26) | ((REG32(ADR_RD_IN_FFCNT1)) & 0xe3ffffff))
+#define SET_FF9_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT1)) = (((_VAL_) << 29) | ((REG32(ADR_RD_IN_FFCNT1)) & 0x1fffffff))
+#define SET_FF10_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 0) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xfffffff8))
+#define SET_FF11_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 3) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xffffffc7))
+#define SET_FF12_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 6) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xfffffe3f))
+#define SET_FF13_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 9) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xfffff9ff))
+#define SET_FF14_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 11) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xffffe7ff))
+#define SET_FF15_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 13) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xffff9fff))
+#define SET_FF4_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 15) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xfff07fff))
+#define SET_FF2_CNT(_VAL_) (REG32(ADR_RD_IN_FFCNT2)) = (((_VAL_) << 20) | ((REG32(ADR_RD_IN_FFCNT2)) & 0xff8fffff))
+#define SET_CH1_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 1) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffffd))
+#define SET_CH2_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 2) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffffb))
+#define SET_CH3_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 3) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffff7))
+#define SET_CH4_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 4) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffffef))
+#define SET_CH5_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 5) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffffdf))
+#define SET_CH6_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 6) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffffbf))
+#define SET_CH7_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 7) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffff7f))
+#define SET_CH8_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 8) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffeff))
+#define SET_CH9_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 9) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffdff))
+#define SET_CH10_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 10) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffffbff))
+#define SET_CH11_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 11) | ((REG32(ADR_RD_FFIN_FULL)) & 0xfffff7ff))
+#define SET_CH12_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 12) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffefff))
+#define SET_CH13_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 13) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffdfff))
+#define SET_CH14_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 14) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffffbfff))
+#define SET_CH15_FULL(_VAL_) (REG32(ADR_RD_FFIN_FULL)) = (((_VAL_) << 15) | ((REG32(ADR_RD_FFIN_FULL)) & 0xffff7fff))
+#define SET_HALT_CH0(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 0) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffffe))
+#define SET_HALT_CH1(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 1) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffffd))
+#define SET_HALT_CH2(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 2) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffffb))
+#define SET_HALT_CH3(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 3) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffff7))
+#define SET_HALT_CH4(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 4) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffffef))
+#define SET_HALT_CH5(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 5) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffffdf))
+#define SET_HALT_CH6(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 6) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffffbf))
+#define SET_HALT_CH7(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 7) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffff7f))
+#define SET_HALT_CH8(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 8) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffeff))
+#define SET_HALT_CH9(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 9) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffdff))
+#define SET_HALT_CH10(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 10) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffffbff))
+#define SET_HALT_CH11(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 11) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffff7ff))
+#define SET_HALT_CH12(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 12) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffefff))
+#define SET_HALT_CH13(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 13) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffdfff))
+#define SET_HALT_CH14(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 14) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffffbfff))
+#define SET_HALT_CH15(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 15) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffff7fff))
+#define SET_STOP_MBOX(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 16) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xfffeffff))
+#define SET_MB_ERR_AUTO_HALT_EN(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 20) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffefffff))
+#define SET_MB_EXCEPT_CLR(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 21) | ((REG32(ADR_MBOX_HALT_CFG)) & 0xffdfffff))
+#define SET_MB_EXCEPT_CASE(_VAL_) (REG32(ADR_MBOX_HALT_CFG)) = (((_VAL_) << 24) | ((REG32(ADR_MBOX_HALT_CFG)) & 0x00ffffff))
+#define SET_MB_DBG_TIME_STEP(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 0) | ((REG32(ADR_MB_DBG_CFG1)) & 0xffff0000))
+#define SET_DBG_TYPE(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 16) | ((REG32(ADR_MB_DBG_CFG1)) & 0xfffcffff))
+#define SET_MB_DBG_CLR(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 18) | ((REG32(ADR_MB_DBG_CFG1)) & 0xfffbffff))
+#define SET_DBG_ALC_LOG_EN(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 19) | ((REG32(ADR_MB_DBG_CFG1)) & 0xfff7ffff))
+#define SET_MB_DBG_COUNTER_EN(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 24) | ((REG32(ADR_MB_DBG_CFG1)) & 0xfeffffff))
+#define SET_MB_DBG_EN(_VAL_) (REG32(ADR_MB_DBG_CFG1)) = (((_VAL_) << 31) | ((REG32(ADR_MB_DBG_CFG1)) & 0x7fffffff))
+#define SET_MB_DBG_RECORD_CNT(_VAL_) (REG32(ADR_MB_DBG_CFG2)) = (((_VAL_) << 0) | ((REG32(ADR_MB_DBG_CFG2)) & 0xffff0000))
+#define SET_MB_DBG_LENGTH(_VAL_) (REG32(ADR_MB_DBG_CFG2)) = (((_VAL_) << 16) | ((REG32(ADR_MB_DBG_CFG2)) & 0x0000ffff))
+#define SET_MB_DBG_CFG_ADDR(_VAL_) (REG32(ADR_MB_DBG_CFG3)) = (((_VAL_) << 0) | ((REG32(ADR_MB_DBG_CFG3)) & 0x00000000))
+#define SET_DBG_HWID0_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 0) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffffe))
+#define SET_DBG_HWID1_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 1) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffffd))
+#define SET_DBG_HWID2_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 2) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffffb))
+#define SET_DBG_HWID3_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 3) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffff7))
+#define SET_DBG_HWID4_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 4) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffffef))
+#define SET_DBG_HWID5_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 5) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffffdf))
+#define SET_DBG_HWID6_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 6) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffffbf))
+#define SET_DBG_HWID7_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 7) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffff7f))
+#define SET_DBG_HWID8_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 8) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffeff))
+#define SET_DBG_HWID9_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 9) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffdff))
+#define SET_DBG_HWID10_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 10) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffffbff))
+#define SET_DBG_HWID11_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 11) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffff7ff))
+#define SET_DBG_HWID12_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 12) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffefff))
+#define SET_DBG_HWID13_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 13) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffdfff))
+#define SET_DBG_HWID14_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 14) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffffbfff))
+#define SET_DBG_HWID15_WR_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 15) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffff7fff))
+#define SET_DBG_HWID0_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 16) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffeffff))
+#define SET_DBG_HWID1_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 17) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffdffff))
+#define SET_DBG_HWID2_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 18) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfffbffff))
+#define SET_DBG_HWID3_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 19) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfff7ffff))
+#define SET_DBG_HWID4_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 20) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffefffff))
+#define SET_DBG_HWID5_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 21) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffdfffff))
+#define SET_DBG_HWID6_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 22) | ((REG32(ADR_MB_DBG_CFG4)) & 0xffbfffff))
+#define SET_DBG_HWID7_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 23) | ((REG32(ADR_MB_DBG_CFG4)) & 0xff7fffff))
+#define SET_DBG_HWID8_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 24) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfeffffff))
+#define SET_DBG_HWID9_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 25) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfdffffff))
+#define SET_DBG_HWID10_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 26) | ((REG32(ADR_MB_DBG_CFG4)) & 0xfbffffff))
+#define SET_DBG_HWID11_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 27) | ((REG32(ADR_MB_DBG_CFG4)) & 0xf7ffffff))
+#define SET_DBG_HWID12_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 28) | ((REG32(ADR_MB_DBG_CFG4)) & 0xefffffff))
+#define SET_DBG_HWID13_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 29) | ((REG32(ADR_MB_DBG_CFG4)) & 0xdfffffff))
+#define SET_DBG_HWID14_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 30) | ((REG32(ADR_MB_DBG_CFG4)) & 0xbfffffff))
+#define SET_DBG_HWID15_RD_EN(_VAL_) (REG32(ADR_MB_DBG_CFG4)) = (((_VAL_) << 31) | ((REG32(ADR_MB_DBG_CFG4)) & 0x7fffffff))
+#define SET_MB_OUT_QUEUE_EN(_VAL_) (REG32(ADR_MB_OUT_QUEUE_CFG)) = (((_VAL_) << 1) | ((REG32(ADR_MB_OUT_QUEUE_CFG)) & 0xfffffffd))
+#define SET_CH0_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 0) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffffe))
+#define SET_CH1_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 1) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffffd))
+#define SET_CH2_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 2) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffffb))
+#define SET_CH3_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 3) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffff7))
+#define SET_CH4_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 4) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffffef))
+#define SET_CH5_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 5) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffffdf))
+#define SET_CH6_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 6) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffffbf))
+#define SET_CH7_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 7) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffff7f))
+#define SET_CH8_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 8) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffeff))
+#define SET_CH9_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 9) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffdff))
+#define SET_CH10_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 10) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffffbff))
+#define SET_CH11_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 11) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xfffff7ff))
+#define SET_CH12_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 12) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffefff))
+#define SET_CH13_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 13) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffdfff))
+#define SET_CH14_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 14) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffffbfff))
+#define SET_CH15_QUEUE_FLUSH(_VAL_) (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (((_VAL_) << 15) | ((REG32(ADR_MB_OUT_QUEUE_FLUSH)) & 0xffff7fff))
+#define SET_FFO0_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 0) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xffffffe0))
+#define SET_FFO1_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 5) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xfffffc1f))
+#define SET_FFO2_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 10) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xfffff3ff))
+#define SET_FFO3_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 15) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xfff07fff))
+#define SET_FFO4_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 20) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xffcfffff))
+#define SET_FFO5_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT1)) = (((_VAL_) << 25) | ((REG32(ADR_RD_FFOUT_CNT1)) & 0xf1ffffff))
+#define SET_FFO6_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 0) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xfffffff0))
+#define SET_FFO7_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 5) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xfffffc1f))
+#define SET_FFO8_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 10) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xffff83ff))
+#define SET_FFO9_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 15) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xfff07fff))
+#define SET_FFO10_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 20) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xff0fffff))
+#define SET_FFO11_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT2)) = (((_VAL_) << 25) | ((REG32(ADR_RD_FFOUT_CNT2)) & 0xc1ffffff))
+#define SET_FFO12_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT3)) = (((_VAL_) << 0) | ((REG32(ADR_RD_FFOUT_CNT3)) & 0xfffffff8))
+#define SET_FFO13_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT3)) = (((_VAL_) << 5) | ((REG32(ADR_RD_FFOUT_CNT3)) & 0xffffff9f))
+#define SET_FFO14_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT3)) = (((_VAL_) << 10) | ((REG32(ADR_RD_FFOUT_CNT3)) & 0xfffff3ff))
+#define SET_FFO15_CNT(_VAL_) (REG32(ADR_RD_FFOUT_CNT3)) = (((_VAL_) << 15) | ((REG32(ADR_RD_FFOUT_CNT3)) & 0xffe07fff))
+#define SET_CH0_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 0) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffffe))
+#define SET_CH1_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 1) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffffd))
+#define SET_CH2_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 2) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffffb))
+#define SET_CH3_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 3) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffff7))
+#define SET_CH4_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 4) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffffef))
+#define SET_CH5_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 5) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffffdf))
+#define SET_CH6_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 6) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffffbf))
+#define SET_CH7_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 7) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffff7f))
+#define SET_CH8_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 8) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffeff))
+#define SET_CH9_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 9) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffdff))
+#define SET_CH10_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 10) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffffbff))
+#define SET_CH11_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 11) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xfffff7ff))
+#define SET_CH12_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 12) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffefff))
+#define SET_CH13_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 13) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffdfff))
+#define SET_CH14_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 14) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffffbfff))
+#define SET_CH15_FFO_FULL(_VAL_) (REG32(ADR_RD_FFOUT_FULL)) = (((_VAL_) << 15) | ((REG32(ADR_RD_FFOUT_FULL)) & 0xffff7fff))
+#define SET_CH0_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 0) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffffe))
+#define SET_CH1_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 1) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffffd))
+#define SET_CH2_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 2) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffffb))
+#define SET_CH3_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 3) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffff7))
+#define SET_CH4_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 4) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffffef))
+#define SET_CH5_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 5) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffffdf))
+#define SET_CH6_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 6) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffffbf))
+#define SET_CH7_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 7) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffff7f))
+#define SET_CH8_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 8) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffeff))
+#define SET_CH9_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 9) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffdff))
+#define SET_CH10_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 10) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffffbff))
+#define SET_CH11_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 11) | ((REG32(ADR_MB_THRESHOLD6)) & 0xfffff7ff))
+#define SET_CH12_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 12) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffefff))
+#define SET_CH13_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 13) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffdfff))
+#define SET_CH14_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 14) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffffbfff))
+#define SET_CH15_LOWTHOLD_INT(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 15) | ((REG32(ADR_MB_THRESHOLD6)) & 0xffff7fff))
+#define SET_MB_LOW_THOLD_EN(_VAL_) (REG32(ADR_MB_THRESHOLD6)) = (((_VAL_) << 31) | ((REG32(ADR_MB_THRESHOLD6)) & 0x7fffffff))
+#define SET_CH0_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD7)) = (((_VAL_) << 0) | ((REG32(ADR_MB_THRESHOLD7)) & 0xffffffe0))
+#define SET_CH1_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD7)) = (((_VAL_) << 8) | ((REG32(ADR_MB_THRESHOLD7)) & 0xffffe0ff))
+#define SET_CH2_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD7)) = (((_VAL_) << 16) | ((REG32(ADR_MB_THRESHOLD7)) & 0xffe0ffff))
+#define SET_CH3_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD7)) = (((_VAL_) << 24) | ((REG32(ADR_MB_THRESHOLD7)) & 0xe0ffffff))
+#define SET_CH4_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD8)) = (((_VAL_) << 0) | ((REG32(ADR_MB_THRESHOLD8)) & 0xffffffe0))
+#define SET_CH5_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD8)) = (((_VAL_) << 8) | ((REG32(ADR_MB_THRESHOLD8)) & 0xffffe0ff))
+#define SET_CH6_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD8)) = (((_VAL_) << 16) | ((REG32(ADR_MB_THRESHOLD8)) & 0xffe0ffff))
+#define SET_CH7_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD8)) = (((_VAL_) << 24) | ((REG32(ADR_MB_THRESHOLD8)) & 0xe0ffffff))
+#define SET_CH8_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD9)) = (((_VAL_) << 0) | ((REG32(ADR_MB_THRESHOLD9)) & 0xffffffe0))
+#define SET_CH9_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD9)) = (((_VAL_) << 8) | ((REG32(ADR_MB_THRESHOLD9)) & 0xffffe0ff))
+#define SET_CH10_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD9)) = (((_VAL_) << 16) | ((REG32(ADR_MB_THRESHOLD9)) & 0xffe0ffff))
+#define SET_CH11_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD9)) = (((_VAL_) << 24) | ((REG32(ADR_MB_THRESHOLD9)) & 0xe0ffffff))
+#define SET_CH12_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD10)) = (((_VAL_) << 0) | ((REG32(ADR_MB_THRESHOLD10)) & 0xffffffe0))
+#define SET_CH13_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD10)) = (((_VAL_) << 8) | ((REG32(ADR_MB_THRESHOLD10)) & 0xffffe0ff))
+#define SET_CH14_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD10)) = (((_VAL_) << 16) | ((REG32(ADR_MB_THRESHOLD10)) & 0xffe0ffff))
+#define SET_CH15_LOWTHOLD(_VAL_) (REG32(ADR_MB_THRESHOLD10)) = (((_VAL_) << 24) | ((REG32(ADR_MB_THRESHOLD10)) & 0xe0ffffff))
+#define SET_TRASH_TIMEOUT_EN(_VAL_) (REG32(ADR_MB_TRASH_CFG)) = (((_VAL_) << 0) | ((REG32(ADR_MB_TRASH_CFG)) & 0xfffffffe))
+#define SET_TRASH_CAN_INT(_VAL_) (REG32(ADR_MB_TRASH_CFG)) = (((_VAL_) << 1) | ((REG32(ADR_MB_TRASH_CFG)) & 0xfffffffd))
+#define SET_TRASH_INT_ID(_VAL_) (REG32(ADR_MB_TRASH_CFG)) = (((_VAL_) << 4) | ((REG32(ADR_MB_TRASH_CFG)) & 0xfffff80f))
+#define SET_TRASH_TIMEOUT(_VAL_) (REG32(ADR_MB_TRASH_CFG)) = (((_VAL_) << 16) | ((REG32(ADR_MB_TRASH_CFG)) & 0xfc00ffff))
+#define SET_CH0_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 0) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffffe))
+#define SET_CH1_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 1) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffffd))
+#define SET_CH2_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 2) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffffb))
+#define SET_CH3_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 3) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffff7))
+#define SET_CH4_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 4) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffffef))
+#define SET_CH5_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 5) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffffdf))
+#define SET_CH6_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 6) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffffbf))
+#define SET_CH7_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 7) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffff7f))
+#define SET_CH8_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 8) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffeff))
+#define SET_CH9_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 9) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffdff))
+#define SET_CH10_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 10) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffffbff))
+#define SET_CH11_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 11) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xfffff7ff))
+#define SET_CH12_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 12) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffefff))
+#define SET_CH13_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 13) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffdfff))
+#define SET_CH14_WRFF_FLUSH(_VAL_) (REG32(ADR_MB_IN_FF_FLUSH)) = (((_VAL_) << 14) | ((REG32(ADR_MB_IN_FF_FLUSH)) & 0xffffbfff))
+#define SET_CPU_ID_TB2(_VAL_) (REG32(ADR_CPU_ID_TB2)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_ID_TB2)) & 0x00000000))
+#define SET_CPU_ID_TB3(_VAL_) (REG32(ADR_CPU_ID_TB3)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_ID_TB3)) & 0x00000000))
+#define SET_IQ_LOG_EN(_VAL_) (REG32(ADR_PHY_IQ_LOG_CFG0)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_IQ_LOG_CFG0)) & 0xfffffffe))
+#define SET_IQ_LOG_STOP_MODE(_VAL_) (REG32(ADR_PHY_IQ_LOG_CFG1)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0xfffffffe))
+#define SET_GPIO_STOP_EN(_VAL_) (REG32(ADR_PHY_IQ_LOG_CFG1)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0xffffffef))
+#define SET_GPIO_STOP_POL(_VAL_) (REG32(ADR_PHY_IQ_LOG_CFG1)) = (((_VAL_) << 5) | ((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0xffffffdf))
+#define SET_IQ_LOG_TIMER(_VAL_) (REG32(ADR_PHY_IQ_LOG_CFG1)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_IQ_LOG_CFG1)) & 0x0000ffff))
+#define SET_IQ_LOG_LEN(_VAL_) (REG32(ADR_PHY_IQ_LOG_LEN)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_IQ_LOG_LEN)) & 0xffff0000))
+#define SET_IQ_LOG_TAIL_ADR(_VAL_) (REG32(ADR_PHY_IQ_LOG_PTR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_IQ_LOG_PTR)) & 0xffff0000))
+#define SET_ALC_LENG(_VAL_) (REG32(ADR_WR_ALC)) = (((_VAL_) << 0) | ((REG32(ADR_WR_ALC)) & 0xfffc0000))
+#define SET_CH0_DYN_PRI(_VAL_) (REG32(ADR_WR_ALC)) = (((_VAL_) << 20) | ((REG32(ADR_WR_ALC)) & 0xffcfffff))
+#define SET_MCU_PKTID(_VAL_) (REG32(ADR_GETID)) = (((_VAL_) << 0) | ((REG32(ADR_GETID)) & 0x00000000))
+#define SET_CH0_STA_PRI(_VAL_) (REG32(ADR_CH_STA_PRI)) = (((_VAL_) << 0) | ((REG32(ADR_CH_STA_PRI)) & 0xfffffffc))
+#define SET_CH1_STA_PRI(_VAL_) (REG32(ADR_CH_STA_PRI)) = (((_VAL_) << 4) | ((REG32(ADR_CH_STA_PRI)) & 0xffffffcf))
+#define SET_CH2_STA_PRI(_VAL_) (REG32(ADR_CH_STA_PRI)) = (((_VAL_) << 8) | ((REG32(ADR_CH_STA_PRI)) & 0xfffffcff))
+#define SET_CH3_STA_PRI(_VAL_) (REG32(ADR_CH_STA_PRI)) = (((_VAL_) << 12) | ((REG32(ADR_CH_STA_PRI)) & 0xffffcfff))
+#define SET_ID_TB0(_VAL_) (REG32(ADR_RD_ID0)) = (((_VAL_) << 0) | ((REG32(ADR_RD_ID0)) & 0x00000000))
+#define SET_ID_TB1(_VAL_) (REG32(ADR_RD_ID1)) = (((_VAL_) << 0) | ((REG32(ADR_RD_ID1)) & 0x00000000))
+#define SET_ID_MNG_HALT(_VAL_) (REG32(ADR_IMD_CFG)) = (((_VAL_) << 4) | ((REG32(ADR_IMD_CFG)) & 0xffffffef))
+#define SET_ID_MNG_ERR_HALT_EN(_VAL_) (REG32(ADR_IMD_CFG)) = (((_VAL_) << 5) | ((REG32(ADR_IMD_CFG)) & 0xffffffdf))
+#define SET_ID_EXCEPT_FLG_CLR(_VAL_) (REG32(ADR_IMD_CFG)) = (((_VAL_) << 6) | ((REG32(ADR_IMD_CFG)) & 0xffffffbf))
+#define SET_ID_EXCEPT_FLG(_VAL_) (REG32(ADR_IMD_CFG)) = (((_VAL_) << 7) | ((REG32(ADR_IMD_CFG)) & 0xffffff7f))
+#define SET_ID_FULL(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 0) | ((REG32(ADR_IMD_STA)) & 0xfffffffe))
+#define SET_ID_MNG_BUSY(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 1) | ((REG32(ADR_IMD_STA)) & 0xfffffffd))
+#define SET_REQ_LOCK(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 2) | ((REG32(ADR_IMD_STA)) & 0xfffffffb))
+#define SET_CH0_REQ_LOCK(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 4) | ((REG32(ADR_IMD_STA)) & 0xffffffef))
+#define SET_CH1_REQ_LOCK(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 5) | ((REG32(ADR_IMD_STA)) & 0xffffffdf))
+#define SET_CH2_REQ_LOCK(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 6) | ((REG32(ADR_IMD_STA)) & 0xffffffbf))
+#define SET_CH3_REQ_LOCK(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 7) | ((REG32(ADR_IMD_STA)) & 0xffffff7f))
+#define SET_REQ_LOCK_INT_EN(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 8) | ((REG32(ADR_IMD_STA)) & 0xfffffeff))
+#define SET_REQ_LOCK_INT(_VAL_) (REG32(ADR_IMD_STA)) = (((_VAL_) << 9) | ((REG32(ADR_IMD_STA)) & 0xfffffdff))
+#define SET_MCU_ALC_READY(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 0) | ((REG32(ADR_ALC_STA)) & 0xfffffffe))
+#define SET_ALC_FAIL(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 1) | ((REG32(ADR_ALC_STA)) & 0xfffffffd))
+#define SET_ALC_BUSY(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 2) | ((REG32(ADR_ALC_STA)) & 0xfffffffb))
+#define SET_CH0_NVLD(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 4) | ((REG32(ADR_ALC_STA)) & 0xffffffef))
+#define SET_CH1_NVLD(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 5) | ((REG32(ADR_ALC_STA)) & 0xffffffdf))
+#define SET_CH2_NVLD(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 6) | ((REG32(ADR_ALC_STA)) & 0xffffffbf))
+#define SET_CH3_NVLD(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 7) | ((REG32(ADR_ALC_STA)) & 0xffffff7f))
+#define SET_ALC_INT_ID(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 8) | ((REG32(ADR_ALC_STA)) & 0xffff80ff))
+#define SET_ALC_TIMEOUT(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 16) | ((REG32(ADR_ALC_STA)) & 0xfc00ffff))
+#define SET_ALC_TIMEOUT_INT_EN(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 30) | ((REG32(ADR_ALC_STA)) & 0xbfffffff))
+#define SET_ALC_TIMEOUT_INT(_VAL_) (REG32(ADR_ALC_STA)) = (((_VAL_) << 31) | ((REG32(ADR_ALC_STA)) & 0x7fffffff))
+#define SET_TX_ID_COUNT(_VAL_) (REG32(ADR_TRX_ID_COUNT)) = (((_VAL_) << 0) | ((REG32(ADR_TRX_ID_COUNT)) & 0xffffff00))
+#define SET_RX_ID_COUNT(_VAL_) (REG32(ADR_TRX_ID_COUNT)) = (((_VAL_) << 8) | ((REG32(ADR_TRX_ID_COUNT)) & 0xffff00ff))
+#define SET_TX_ID_THOLD(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 0) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xffffff00))
+#define SET_RX_ID_THOLD(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 8) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xffff00ff))
+#define SET_ID_THOLD_RX_INT(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 16) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xfffeffff))
+#define SET_RX_INT_CH(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 17) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xfff1ffff))
+#define SET_ID_THOLD_TX_INT(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 20) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xffefffff))
+#define SET_TX_INT_CH(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 21) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xff1fffff))
+#define SET_ID_THOLD_INT_EN(_VAL_) (REG32(ADR_TRX_ID_THRESHOLD)) = (((_VAL_) << 24) | ((REG32(ADR_TRX_ID_THRESHOLD)) & 0xfeffffff))
+#define SET_TX_ID_TB0(_VAL_) (REG32(ADR_TX_ID0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID0)) & 0x00000000))
+#define SET_TX_ID_TB1(_VAL_) (REG32(ADR_TX_ID1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID1)) & 0x00000000))
+#define SET_RX_ID_TB0(_VAL_) (REG32(ADR_RX_ID0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ID0)) & 0x00000000))
+#define SET_RX_ID_TB1(_VAL_) (REG32(ADR_RX_ID1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ID1)) & 0x00000000))
+#define SET_DOUBLE_RLS_INT_EN(_VAL_) (REG32(ADR_RTN_STA)) = (((_VAL_) << 0) | ((REG32(ADR_RTN_STA)) & 0xfffffffe))
+#define SET_ID_DOUBLE_RLS_INT(_VAL_) (REG32(ADR_RTN_STA)) = (((_VAL_) << 1) | ((REG32(ADR_RTN_STA)) & 0xfffffffd))
+#define SET_DOUBLE_RLS_ID(_VAL_) (REG32(ADR_RTN_STA)) = (((_VAL_) << 8) | ((REG32(ADR_RTN_STA)) & 0xffff80ff))
+#define SET_ID_LEN_THOLD_INT_EN(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 0) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xfffffffe))
+#define SET_ALL_ID_LEN_THOLD_INT(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 1) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xfffffffd))
+#define SET_TX_ID_LEN_THOLD_INT(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 2) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xfffffffb))
+#define SET_RX_ID_LEN_THOLD_INT(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 3) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xfffffff7))
+#define SET_ID_TX_LEN_THOLD(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 4) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xffffe00f))
+#define SET_ID_RX_LEN_THOLD(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 13) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0xffc01fff))
+#define SET_ID_LEN_THOLD(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD1)) = (((_VAL_) << 22) | ((REG32(ADR_ID_LEN_THREADSHOLD1)) & 0x803fffff))
+#define SET_ALL_ID_ALC_LEN(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD2)) = (((_VAL_) << 0) | ((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0xfffffe00))
+#define SET_TX_ID_ALC_LEN(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD2)) = (((_VAL_) << 9) | ((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0xfffc01ff))
+#define SET_RX_ID_ALC_LEN(_VAL_) (REG32(ADR_ID_LEN_THREADSHOLD2)) = (((_VAL_) << 18) | ((REG32(ADR_ID_LEN_THREADSHOLD2)) & 0xf803ffff))
+#define SET_CH_ARB_EN(_VAL_) (REG32(ADR_CH_ARB_PRI)) = (((_VAL_) << 0) | ((REG32(ADR_CH_ARB_PRI)) & 0xfffffffe))
+#define SET_CH_PRI1(_VAL_) (REG32(ADR_CH_ARB_PRI)) = (((_VAL_) << 4) | ((REG32(ADR_CH_ARB_PRI)) & 0xffffffcf))
+#define SET_CH_PRI2(_VAL_) (REG32(ADR_CH_ARB_PRI)) = (((_VAL_) << 8) | ((REG32(ADR_CH_ARB_PRI)) & 0xfffffcff))
+#define SET_CH_PRI3(_VAL_) (REG32(ADR_CH_ARB_PRI)) = (((_VAL_) << 12) | ((REG32(ADR_CH_ARB_PRI)) & 0xffffcfff))
+#define SET_CH_PRI4(_VAL_) (REG32(ADR_CH_ARB_PRI)) = (((_VAL_) << 16) | ((REG32(ADR_CH_ARB_PRI)) & 0xfffcffff))
+#define SET_TX_ID_REMAIN(_VAL_) (REG32(ADR_TX_ID_REMAIN_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_REMAIN_STATUS)) & 0xffffff80))
+#define SET_TX_PAGE_REMAIN(_VAL_) (REG32(ADR_TX_ID_REMAIN_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_TX_ID_REMAIN_STATUS)) & 0xfffe00ff))
+#define SET_ID_PAGE_MAX_SIZE(_VAL_) (REG32(ADR_ID_INFO_STA)) = (((_VAL_) << 0) | ((REG32(ADR_ID_INFO_STA)) & 0xfffffe00))
+#define SET_TX_PAGE_LIMIT(_VAL_) (REG32(ADR_TX_LIMIT_INTR)) = (((_VAL_) << 0) | ((REG32(ADR_TX_LIMIT_INTR)) & 0xfffffe00))
+#define SET_TX_COUNT_LIMIT(_VAL_) (REG32(ADR_TX_LIMIT_INTR)) = (((_VAL_) << 16) | ((REG32(ADR_TX_LIMIT_INTR)) & 0xff00ffff))
+#define SET_TX_LIMIT_INT(_VAL_) (REG32(ADR_TX_LIMIT_INTR)) = (((_VAL_) << 30) | ((REG32(ADR_TX_LIMIT_INTR)) & 0xbfffffff))
+#define SET_TX_LIMIT_INT_EN(_VAL_) (REG32(ADR_TX_LIMIT_INTR)) = (((_VAL_) << 31) | ((REG32(ADR_TX_LIMIT_INTR)) & 0x7fffffff))
+#define SET_TX_PAGE_USE_7_0(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0xffffff00))
+#define SET_TX_ID_USE_5_0(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 8) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0xffffc0ff))
+#define SET_EDCA0_FFO_CNT(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 14) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0xfffc3fff))
+#define SET_EDCA1_FFO_CNT_3_0(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 18) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0xffc3ffff))
+#define SET_EDCA2_FFO_CNT(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 22) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0xf83fffff))
+#define SET_EDCA3_FFO_CNT(_VAL_) (REG32(ADR_TX_ID_ALL_INFO)) = (((_VAL_) << 27) | ((REG32(ADR_TX_ID_ALL_INFO)) & 0x07ffffff))
+#define SET_ID_TB2(_VAL_) (REG32(ADR_RD_ID2)) = (((_VAL_) << 0) | ((REG32(ADR_RD_ID2)) & 0x00000000))
+#define SET_ID_TB3(_VAL_) (REG32(ADR_RD_ID3)) = (((_VAL_) << 0) | ((REG32(ADR_RD_ID3)) & 0x00000000))
+#define SET_TX_ID_TB2(_VAL_) (REG32(ADR_TX_ID2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID2)) & 0x00000000))
+#define SET_TX_ID_TB3(_VAL_) (REG32(ADR_TX_ID3)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID3)) & 0x00000000))
+#define SET_RX_ID_TB2(_VAL_) (REG32(ADR_RX_ID2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ID2)) & 0x00000000))
+#define SET_RX_ID_TB3(_VAL_) (REG32(ADR_RX_ID3)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ID3)) & 0x00000000))
+#define SET_TX_PAGE_USE2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_ALL_INFO2)) & 0xfffffe00))
+#define SET_TX_ID_USE2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO2)) = (((_VAL_) << 9) | ((REG32(ADR_TX_ID_ALL_INFO2)) & 0xfffe01ff))
+#define SET_EDCA4_FFO_CNT(_VAL_) (REG32(ADR_TX_ID_ALL_INFO2)) = (((_VAL_) << 17) | ((REG32(ADR_TX_ID_ALL_INFO2)) & 0xffe1ffff))
+#define SET_TX_PAGE_USE3(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_A)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_ALL_INFO_A)) & 0xfffffe00))
+#define SET_TX_ID_USE3(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_A)) = (((_VAL_) << 9) | ((REG32(ADR_TX_ID_ALL_INFO_A)) & 0xfffe01ff))
+#define SET_EDCA1_FFO_CNT2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_A)) = (((_VAL_) << 21) | ((REG32(ADR_TX_ID_ALL_INFO_A)) & 0xfc1fffff))
+#define SET_EDCA4_FFO_CNT2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_A)) = (((_VAL_) << 26) | ((REG32(ADR_TX_ID_ALL_INFO_A)) & 0xc3ffffff))
+#define SET_TX_PAGE_USE4(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_B)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_ALL_INFO_B)) & 0xfffffe00))
+#define SET_TX_ID_USE4(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_B)) = (((_VAL_) << 9) | ((REG32(ADR_TX_ID_ALL_INFO_B)) & 0xfffe01ff))
+#define SET_EDCA2_FFO_CNT2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_B)) = (((_VAL_) << 17) | ((REG32(ADR_TX_ID_ALL_INFO_B)) & 0xffc1ffff))
+#define SET_EDCA3_FFO_CNT2(_VAL_) (REG32(ADR_TX_ID_ALL_INFO_B)) = (((_VAL_) << 22) | ((REG32(ADR_TX_ID_ALL_INFO_B)) & 0xf83fffff))
+#define SET_TX_ID_IFO_LEN(_VAL_) (REG32(ADR_TX_ID_REMAIN_STATUS2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_ID_REMAIN_STATUS2)) & 0xfffffe00))
+#define SET_RX_ID_IFO_LEN(_VAL_) (REG32(ADR_TX_ID_REMAIN_STATUS2)) = (((_VAL_) << 16) | ((REG32(ADR_TX_ID_REMAIN_STATUS2)) & 0xfe00ffff))
+#define SET_MAX_ALL_ALC_ID_CNT(_VAL_) (REG32(ADR_ALC_ID_INFO)) = (((_VAL_) << 0) | ((REG32(ADR_ALC_ID_INFO)) & 0xffffff00))
+#define SET_MAX_TX_ALC_ID_CNT(_VAL_) (REG32(ADR_ALC_ID_INFO)) = (((_VAL_) << 8) | ((REG32(ADR_ALC_ID_INFO)) & 0xffff00ff))
+#define SET_MAX_RX_ALC_ID_CNT(_VAL_) (REG32(ADR_ALC_ID_INFO)) = (((_VAL_) << 16) | ((REG32(ADR_ALC_ID_INFO)) & 0xff00ffff))
+#define SET_MAX_ALL_ID_ALC_LEN(_VAL_) (REG32(ADR_ALC_ID_INF1)) = (((_VAL_) << 0) | ((REG32(ADR_ALC_ID_INF1)) & 0xfffffe00))
+#define SET_MAX_TX_ID_ALC_LEN(_VAL_) (REG32(ADR_ALC_ID_INF1)) = (((_VAL_) << 9) | ((REG32(ADR_ALC_ID_INF1)) & 0xfffc01ff))
+#define SET_MAX_RX_ID_ALC_LEN(_VAL_) (REG32(ADR_ALC_ID_INF1)) = (((_VAL_) << 18) | ((REG32(ADR_ALC_ID_INF1)) & 0xf803ffff))
+#define SET_RG_PMDLBK(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_EN_0)) & 0xfffffffe))
+#define SET_RG_RDYACK_SEL(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 1) | ((REG32(ADR_PHY_EN_0)) & 0xfffffff9))
+#define SET_RG_ADEDGE_SEL(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 3) | ((REG32(ADR_PHY_EN_0)) & 0xfffffff7))
+#define SET_RG_SIGN_SWAP(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_EN_0)) & 0xffffffef))
+#define SET_RG_IQ_SWAP(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 5) | ((REG32(ADR_PHY_EN_0)) & 0xffffffdf))
+#define SET_RG_Q_INV(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 6) | ((REG32(ADR_PHY_EN_0)) & 0xffffffbf))
+#define SET_RG_I_INV(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 7) | ((REG32(ADR_PHY_EN_0)) & 0xffffff7f))
+#define SET_RG_BYPASS_ACI(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_EN_0)) & 0xfffffeff))
+#define SET_RG_LBK_ANA_PATH(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 9) | ((REG32(ADR_PHY_EN_0)) & 0xfffffdff))
+#define SET_RG_SPECTRUM_LEAKY_FACTOR(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 10) | ((REG32(ADR_PHY_EN_0)) & 0xfffff3ff))
+#define SET_RG_SPECTRUM_BW(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_EN_0)) & 0xffffcfff))
+#define SET_RG_SPECTRUM_FREQ_MANUAL(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 14) | ((REG32(ADR_PHY_EN_0)) & 0xffffbfff))
+#define SET_RG_SPECTRUM_EN(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 15) | ((REG32(ADR_PHY_EN_0)) & 0xffff7fff))
+#define SET_RG_TXPWRLVL_SET(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_EN_0)) & 0xff00ffff))
+#define SET_RG_TXPWRLVL_SEL(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_EN_0)) & 0xfeffffff))
+#define SET_RG_RF_BB_CLK_SEL(_VAL_) (REG32(ADR_PHY_EN_0)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_EN_0)) & 0x7fffffff))
+#define SET_RG_PHY_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_EN_1)) & 0xfffffffe))
+#define SET_RG_PHYRX_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 1) | ((REG32(ADR_PHY_EN_1)) & 0xfffffffd))
+#define SET_RG_PHYTX_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 2) | ((REG32(ADR_PHY_EN_1)) & 0xfffffffb))
+#define SET_RG_PHY11GN_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 3) | ((REG32(ADR_PHY_EN_1)) & 0xfffffff7))
+#define SET_RG_PHY11B_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_EN_1)) & 0xffffffef))
+#define SET_RG_PHYRXFIFO_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 5) | ((REG32(ADR_PHY_EN_1)) & 0xffffffdf))
+#define SET_RG_PHYTXFIFO_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 6) | ((REG32(ADR_PHY_EN_1)) & 0xffffffbf))
+#define SET_RG_PHY11BGN_MD_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_EN_1)) & 0xfffffeff))
+#define SET_RG_FORCE_11GN_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_EN_1)) & 0xffffefff))
+#define SET_RG_FORCE_11B_EN(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 13) | ((REG32(ADR_PHY_EN_1)) & 0xffffdfff))
+#define SET_RG_FFT_MEM_CLK_EN_RX(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 14) | ((REG32(ADR_PHY_EN_1)) & 0xffffbfff))
+#define SET_RG_FFT_MEM_CLK_EN_TX(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 15) | ((REG32(ADR_PHY_EN_1)) & 0xffff7fff))
+#define SET_RG_PHY_IQ_TRIG_SEL(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_EN_1)) & 0xfff0ffff))
+#define SET_RG_SPECTRUM_FREQ(_VAL_) (REG32(ADR_PHY_EN_1)) = (((_VAL_) << 20) | ((REG32(ADR_PHY_EN_1)) & 0xc00fffff))
+#define SET_SVN_VERSION(_VAL_) (REG32(ADR_SVN_VERSION_REG)) = (((_VAL_) << 0) | ((REG32(ADR_SVN_VERSION_REG)) & 0x00000000))
+#define SET_RG_LENGTH(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0xffff0000))
+#define SET_RG_PKT_MODE(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0xfff8ffff))
+#define SET_RG_CH_BW(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 19) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0xffc7ffff))
+#define SET_RG_PRM(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 22) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0xffbfffff))
+#define SET_RG_SHORTGI(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 23) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0xff7fffff))
+#define SET_RG_RATE(_VAL_) (REG32(ADR_PHY_PKT_GEN_0)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_PKT_GEN_0)) & 0x80ffffff))
+#define SET_RG_L_LENGTH(_VAL_) (REG32(ADR_PHY_PKT_GEN_1)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_PKT_GEN_1)) & 0xfffff000))
+#define SET_RG_L_RATE(_VAL_) (REG32(ADR_PHY_PKT_GEN_1)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_PKT_GEN_1)) & 0xffff8fff))
+#define SET_RG_SERVICE(_VAL_) (REG32(ADR_PHY_PKT_GEN_1)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_PKT_GEN_1)) & 0x0000ffff))
+#define SET_RG_SMOOTHING(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xfffffffe))
+#define SET_RG_NO_SOUND(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 1) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xfffffffd))
+#define SET_RG_AGGREGATE(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 2) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xfffffffb))
+#define SET_RG_STBC(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 3) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xffffffe7))
+#define SET_RG_FEC(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 5) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xffffffdf))
+#define SET_RG_N_ESS(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 6) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xffffff3f))
+#define SET_RG_TXPWRLVL(_VAL_) (REG32(ADR_PHY_PKT_GEN_2)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_PKT_GEN_2)) & 0xffff00ff))
+#define SET_RG_TX_START(_VAL_) (REG32(ADR_PHY_PKT_GEN_3)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_PKT_GEN_3)) & 0xfffffffe))
+#define SET_RG_IFS_TIME(_VAL_) (REG32(ADR_PHY_PKT_GEN_3)) = (((_VAL_) << 2) | ((REG32(ADR_PHY_PKT_GEN_3)) & 0xffffff03))
+#define SET_RG_CONTINUOUS_DATA(_VAL_) (REG32(ADR_PHY_PKT_GEN_3)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_PKT_GEN_3)) & 0xfffffeff))
+#define SET_RG_DATA_SEL(_VAL_) (REG32(ADR_PHY_PKT_GEN_3)) = (((_VAL_) << 9) | ((REG32(ADR_PHY_PKT_GEN_3)) & 0xfffff9ff))
+#define SET_RG_TX_D(_VAL_) (REG32(ADR_PHY_PKT_GEN_3)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_PKT_GEN_3)) & 0xff00ffff))
+#define SET_RG_TX_CNT_TARGET(_VAL_) (REG32(ADR_PHY_PKT_GEN_4)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_PKT_GEN_4)) & 0x00000000))
+#define SET_RG_FFT_IFFT_MODE(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 6) | ((REG32(ADR_PHY_REG_00)) & 0xffffff3f))
+#define SET_RG_DAC_DBG_MODE(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_00)) & 0xfffffeff))
+#define SET_RG_DAC_SGN_SWAP(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 9) | ((REG32(ADR_PHY_REG_00)) & 0xfffffdff))
+#define SET_RG_TXD_SEL(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 10) | ((REG32(ADR_PHY_REG_00)) & 0xfffff3ff))
+#define SET_RG_UP8X(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_00)) & 0xff00ffff))
+#define SET_RG_IQ_DC_BYP(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_00)) & 0xfeffffff))
+#define SET_RG_IQ_DC_LEAKY_FACTOR(_VAL_) (REG32(ADR_PHY_REG_00)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_00)) & 0xcfffffff))
+#define SET_RG_DAC_DCEN(_VAL_) (REG32(ADR_PHY_REG_01)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_01)) & 0xfffffffe))
+#define SET_RG_DAC_DCQ(_VAL_) (REG32(ADR_PHY_REG_01)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_REG_01)) & 0xffffc00f))
+#define SET_RG_DAC_DCI(_VAL_) (REG32(ADR_PHY_REG_01)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_01)) & 0xfc00ffff))
+#define SET_RG_PGA_REFDB_SAT(_VAL_) (REG32(ADR_PHY_REG_02_AGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_02_AGC)) & 0xffffff80))
+#define SET_RG_PGA_REFDB_TOP(_VAL_) (REG32(ADR_PHY_REG_02_AGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_02_AGC)) & 0xffff80ff))
+#define SET_RG_PGA_REF_UND(_VAL_) (REG32(ADR_PHY_REG_02_AGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_02_AGC)) & 0xfc00ffff))
+#define SET_RG_RF_REF_SAT(_VAL_) (REG32(ADR_PHY_REG_02_AGC)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_02_AGC)) & 0x0fffffff))
+#define SET_RG_PGAGC_SET(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xfffffff0))
+#define SET_RG_PGAGC_OW(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffffffef))
+#define SET_RG_RFGC_SET(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 5) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffffff9f))
+#define SET_RG_RFGC_OW(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 7) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffffff7f))
+#define SET_RG_WAIT_T_RXAGC(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffffc0ff))
+#define SET_RG_RXAGC_SET(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 14) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffffbfff))
+#define SET_RG_RXAGC_OW(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 15) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffff7fff))
+#define SET_RG_WAIT_T_FINAL(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xffc0ffff))
+#define SET_RG_WAIT_T(_VAL_) (REG32(ADR_PHY_REG_03_AGC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_03_AGC)) & 0xc0ffffff))
+#define SET_RG_ULG_PGA_SAT_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xfffffff0))
+#define SET_RG_LG_PGA_UND_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xffffff0f))
+#define SET_RG_LG_PGA_SAT_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xfffff0ff))
+#define SET_RG_LG_RF_SAT_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xffff0fff))
+#define SET_RG_MG_RF_SAT_PGANOREF_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xfff0ffff))
+#define SET_RG_HG_PGA_SAT2_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 20) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xff0fffff))
+#define SET_RG_HG_PGA_SAT1_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_04_AGC)) & 0xf0ffffff))
+#define SET_RG_HG_RF_SAT_PGA_GAIN(_VAL_) (REG32(ADR_PHY_REG_04_AGC)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_04_AGC)) & 0x0fffffff))
+#define SET_RG_MG_PGA_JB_TH(_VAL_) (REG32(ADR_PHY_REG_05_AGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_05_AGC)) & 0xfffffff0))
+#define SET_RG_MA_PGA_LOW_TH_CNT_LMT(_VAL_) (REG32(ADR_PHY_REG_05_AGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_05_AGC)) & 0xffe0ffff))
+#define SET_RG_WR_RFGC_INIT_SET(_VAL_) (REG32(ADR_PHY_REG_05_AGC)) = (((_VAL_) << 21) | ((REG32(ADR_PHY_REG_05_AGC)) & 0xff9fffff))
+#define SET_RG_WR_RFGC_INIT_EN(_VAL_) (REG32(ADR_PHY_REG_05_AGC)) = (((_VAL_) << 23) | ((REG32(ADR_PHY_REG_05_AGC)) & 0xff7fffff))
+#define SET_RG_MA_PGA_HIGH_TH_CNT_LMT(_VAL_) (REG32(ADR_PHY_REG_05_AGC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_05_AGC)) & 0xe0ffffff))
+#define SET_RG_AGC_THRESHOLD(_VAL_) (REG32(ADR_PHY_REG_06_11B_DAGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0xffffc000))
+#define SET_RG_ACI_POINT_CNT_LMT_11B(_VAL_) (REG32(ADR_PHY_REG_06_11B_DAGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0xff80ffff))
+#define SET_RG_ACI_DAGC_LEAKY_FACTOR_11B(_VAL_) (REG32(ADR_PHY_REG_06_11B_DAGC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_06_11B_DAGC)) & 0xfcffffff))
+#define SET_RG_WR_ACI_GAIN_INI_SEL_11B(_VAL_) (REG32(ADR_PHY_REG_07_11B_DAGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0xffffff00))
+#define SET_RG_WR_ACI_GAIN_SEL_11B(_VAL_) (REG32(ADR_PHY_REG_07_11B_DAGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0xffff00ff))
+#define SET_RG_ACI_DAGC_SET_VALUE_11B(_VAL_) (REG32(ADR_PHY_REG_07_11B_DAGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0xff80ffff))
+#define SET_RG_WR_ACI_GAIN_OW_11B(_VAL_) (REG32(ADR_PHY_REG_07_11B_DAGC)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_07_11B_DAGC)) & 0x7fffffff))
+#define SET_RG_ACI_POINT_CNT_LMT_11GN(_VAL_) (REG32(ADR_PHY_REG_08_11GN_DAGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0xffffff00))
+#define SET_RG_ACI_DAGC_LEAKY_FACTOR_11GN(_VAL_) (REG32(ADR_PHY_REG_08_11GN_DAGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0xfffffcff))
+#define SET_RG_ACI_DAGC_DONE_CNT_LMT_11GN(_VAL_) (REG32(ADR_PHY_REG_08_11GN_DAGC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_08_11GN_DAGC)) & 0x00ffffff))
+#define SET_RG_ACI_DAGC_SET_VALUE_11GN(_VAL_) (REG32(ADR_PHY_REG_09_11GN_DAGC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0xffffff80))
+#define SET_RG_ACI_GAIN_INI_VAL_11GN(_VAL_) (REG32(ADR_PHY_REG_09_11GN_DAGC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0xffff00ff))
+#define SET_RG_ACI_GAIN_OW_VAL_11GN(_VAL_) (REG32(ADR_PHY_REG_09_11GN_DAGC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0xff00ffff))
+#define SET_RG_ACI_GAIN_OW_11GN(_VAL_) (REG32(ADR_PHY_REG_09_11GN_DAGC)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_09_11GN_DAGC)) & 0x7fffffff))
+#define SET_RO_CCA_PWR_MA_11GN(_VAL_) (REG32(ADR_PHY_READ_REG_00_DIG_PWR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0xffffff80))
+#define SET_RO_ED_STATE(_VAL_) (REG32(ADR_PHY_READ_REG_00_DIG_PWR)) = (((_VAL_) << 15) | ((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0xffff7fff))
+#define SET_RO_CCA_PWR_MA_11B(_VAL_) (REG32(ADR_PHY_READ_REG_00_DIG_PWR)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_00_DIG_PWR)) & 0xff80ffff))
+#define SET_RO_PGA_PWR_FF1(_VAL_) (REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0xffffc000))
+#define SET_RO_RF_PWR_FF1(_VAL_) (REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0xfff0ffff))
+#define SET_RO_PGAGC_FF1(_VAL_) (REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0xf0ffffff))
+#define SET_RO_RFGC_FF1(_VAL_) (REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) & 0xcfffffff))
+#define SET_RO_PGA_PWR_FF2(_VAL_) (REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0xffffc000))
+#define SET_RO_RF_PWR_FF2(_VAL_) (REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0xfff0ffff))
+#define SET_RO_PGAGC_FF2(_VAL_) (REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0xf0ffffff))
+#define SET_RO_RFGC_FF2(_VAL_) (REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) & 0xcfffffff))
+#define SET_RO_PGA_PWR_FF3(_VAL_) (REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0xffffc000))
+#define SET_RO_RF_PWR_FF3(_VAL_) (REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0xfff0ffff))
+#define SET_RO_PGAGC_FF3(_VAL_) (REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0xf0ffffff))
+#define SET_RO_RFGC_FF3(_VAL_) (REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) & 0xcfffffff))
+#define SET_RG_TX_DES_RATE(_VAL_) (REG32(ADR_PHY_REG_10_TX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_10_TX_DES)) & 0xffffffe0))
+#define SET_RG_TX_DES_MODE(_VAL_) (REG32(ADR_PHY_REG_10_TX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_10_TX_DES)) & 0xffffe0ff))
+#define SET_RG_TX_DES_LEN_LO(_VAL_) (REG32(ADR_PHY_REG_10_TX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_10_TX_DES)) & 0xffe0ffff))
+#define SET_RG_TX_DES_LEN_UP(_VAL_) (REG32(ADR_PHY_REG_10_TX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_10_TX_DES)) & 0xe0ffffff))
+#define SET_RG_TX_DES_SRVC_UP(_VAL_) (REG32(ADR_PHY_REG_11_TX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_11_TX_DES)) & 0xffffffe0))
+#define SET_RG_TX_DES_L_LEN_LO(_VAL_) (REG32(ADR_PHY_REG_11_TX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_11_TX_DES)) & 0xffffe0ff))
+#define SET_RG_TX_DES_L_LEN_UP(_VAL_) (REG32(ADR_PHY_REG_11_TX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_11_TX_DES)) & 0xffe0ffff))
+#define SET_RG_TX_DES_TYPE(_VAL_) (REG32(ADR_PHY_REG_11_TX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_11_TX_DES)) & 0xe0ffffff))
+#define SET_RG_TX_DES_L_LEN_UP_COMB(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xfffffffe))
+#define SET_RG_TX_DES_TYPE_COMB(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xffffffef))
+#define SET_RG_TX_DES_RATE_COMB(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xfffffeff))
+#define SET_RG_TX_DES_MODE_COMB(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xffffefff))
+#define SET_RG_TX_DES_PWRLVL(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xffe0ffff))
+#define SET_RG_TX_DES_SRVC_LO(_VAL_) (REG32(ADR_PHY_REG_12_TX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_12_TX_DES)) & 0xe0ffffff))
+#define SET_RG_RX_DES_RATE(_VAL_) (REG32(ADR_PHY_REG_13_RX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_13_RX_DES)) & 0xffffffc0))
+#define SET_RG_RX_DES_MODE(_VAL_) (REG32(ADR_PHY_REG_13_RX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_13_RX_DES)) & 0xffffc0ff))
+#define SET_RG_RX_DES_LEN_LO(_VAL_) (REG32(ADR_PHY_REG_13_RX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_13_RX_DES)) & 0xffc0ffff))
+#define SET_RG_RX_DES_LEN_UP(_VAL_) (REG32(ADR_PHY_REG_13_RX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_13_RX_DES)) & 0xc0ffffff))
+#define SET_RG_RX_DES_SRVC_UP(_VAL_) (REG32(ADR_PHY_REG_14_RX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_14_RX_DES)) & 0xffffffc0))
+#define SET_RG_RX_DES_L_LEN_LO(_VAL_) (REG32(ADR_PHY_REG_14_RX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_14_RX_DES)) & 0xffffc0ff))
+#define SET_RG_RX_DES_L_LEN_UP(_VAL_) (REG32(ADR_PHY_REG_14_RX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_14_RX_DES)) & 0xffc0ffff))
+#define SET_RG_RX_DES_TYPE(_VAL_) (REG32(ADR_PHY_REG_14_RX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_14_RX_DES)) & 0xc0ffffff))
+#define SET_RG_RX_DES_L_LEN_UP_COMB(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xfffffffe))
+#define SET_RG_RX_DES_TYPE_COMB(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 4) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xffffffef))
+#define SET_RG_RX_DES_RATE_COMB(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xfffffeff))
+#define SET_RG_RX_DES_MODE_COMB(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xffffefff))
+#define SET_RG_RX_DES_SNR(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xfff0ffff))
+#define SET_RG_RX_DES_RCPI(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 20) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xff0fffff))
+#define SET_RG_RX_DES_SRVC_LO(_VAL_) (REG32(ADR_PHY_REG_15_RX_DES)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_15_RX_DES)) & 0xc0ffffff))
+#define SET_RO_TX_DES_EXCP_RATE_CNT(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0xffffff00))
+#define SET_RO_TX_DES_EXCP_CH_BW_CNT(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0xffff00ff))
+#define SET_RO_TX_DES_EXCP_MODE_CNT(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0xff00ffff))
+#define SET_RG_TX_DES_EXCP_RATE_DEFAULT(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0xf8ffffff))
+#define SET_RG_TX_DES_EXCP_MODE_DEFAULT(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x8fffffff))
+#define SET_RG_TX_DES_EXCP_CLR(_VAL_) (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_16_TX_DES_EXCP)) & 0x7fffffff))
+#define SET_RG_TX_DES_ACK_WIDTH(_VAL_) (REG32(ADR_PHY_REG_17_TX_DES_EXCP)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0xfffffffe))
+#define SET_RG_TX_DES_ACK_PRD(_VAL_) (REG32(ADR_PHY_REG_17_TX_DES_EXCP)) = (((_VAL_) << 1) | ((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0xfffffff1))
+#define SET_RG_RX_DES_SNR_GN(_VAL_) (REG32(ADR_PHY_REG_17_TX_DES_EXCP)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0xffc0ffff))
+#define SET_RG_RX_DES_RCPI_GN(_VAL_) (REG32(ADR_PHY_REG_17_TX_DES_EXCP)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_17_TX_DES_EXCP)) & 0xc0ffffff))
+#define SET_RG_TST_TBUS_SEL(_VAL_) (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0xfffffff0))
+#define SET_RG_RSSI_OFFSET(_VAL_) (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0xff00ffff))
+#define SET_RG_RSSI_INV(_VAL_) (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0xfeffffff))
+#define SET_RG_TST_ADC_ON(_VAL_) (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (((_VAL_) << 30) | ((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0xbfffffff))
+#define SET_RG_TST_EXT_GAIN(_VAL_) (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_18_RSSI_SNR)) & 0x7fffffff))
+#define SET_RG_DAC_Q_SET(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0xfffffc00))
+#define SET_RG_DAC_I_SET(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 12) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0xffc00fff))
+#define SET_RG_DAC_EN_MAN(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0xefffffff))
+#define SET_RG_IQC_FFT_EN(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 29) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0xdfffffff))
+#define SET_RG_DAC_MAN_Q_EN(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 30) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0xbfffffff))
+#define SET_RG_DAC_MAN_I_EN(_VAL_) (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_19_DAC_MANUAL)) & 0x7fffffff))
+#define SET_RO_MRX_EN_CNT(_VAL_) (REG32(ADR_PHY_REG_20_MRX_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_20_MRX_CNT)) & 0xffff0000))
+#define SET_RG_MRX_EN_CNT_RST_N(_VAL_) (REG32(ADR_PHY_REG_20_MRX_CNT)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_20_MRX_CNT)) & 0x7fffffff))
+#define SET_RG_PA_RISE_TIME(_VAL_) (REG32(ADR_PHY_REG_21_TRX_RAMP)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0xffffff00))
+#define SET_RG_RFTX_RISE_TIME(_VAL_) (REG32(ADR_PHY_REG_21_TRX_RAMP)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0xffff00ff))
+#define SET_RG_DAC_RISE_TIME(_VAL_) (REG32(ADR_PHY_REG_21_TRX_RAMP)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0xff00ffff))
+#define SET_RG_SW_RISE_TIME(_VAL_) (REG32(ADR_PHY_REG_21_TRX_RAMP)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_21_TRX_RAMP)) & 0x00ffffff))
+#define SET_RG_PA_FALL_TIME(_VAL_) (REG32(ADR_PHY_REG_22_TRX_RAMP)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0xffffff00))
+#define SET_RG_RFTX_FALL_TIME(_VAL_) (REG32(ADR_PHY_REG_22_TRX_RAMP)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0xffff00ff))
+#define SET_RG_DAC_FALL_TIME(_VAL_) (REG32(ADR_PHY_REG_22_TRX_RAMP)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0xff00ffff))
+#define SET_RG_SW_FALL_TIME(_VAL_) (REG32(ADR_PHY_REG_22_TRX_RAMP)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_22_TRX_RAMP)) & 0x00ffffff))
+#define SET_RG_ANT_SW_0(_VAL_) (REG32(ADR_PHY_REG_23_ANT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_23_ANT)) & 0xfffffff8))
+#define SET_RG_ANT_SW_1(_VAL_) (REG32(ADR_PHY_REG_23_ANT)) = (((_VAL_) << 3) | ((REG32(ADR_PHY_REG_23_ANT)) & 0xffffffc7))
+#define SET_RG_MTX_LEN_LOWER_TH_0(_VAL_) (REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0xffffe000))
+#define SET_RG_MTX_LEN_UPPER_TH_0(_VAL_) (REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0xe000ffff))
+#define SET_RG_MTX_LEN_CNT_EN_0(_VAL_) (REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) & 0x7fffffff))
+#define SET_RG_MTX_LEN_LOWER_TH_1(_VAL_) (REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0xffffe000))
+#define SET_RG_MTX_LEN_UPPER_TH_1(_VAL_) (REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0xe000ffff))
+#define SET_RG_MTX_LEN_CNT_EN_1(_VAL_) (REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) & 0x7fffffff))
+#define SET_RG_MRX_LEN_LOWER_TH_0(_VAL_) (REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0xffffe000))
+#define SET_RG_MRX_LEN_UPPER_TH_0(_VAL_) (REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0xe000ffff))
+#define SET_RG_MRX_LEN_CNT_EN_0(_VAL_) (REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) & 0x7fffffff))
+#define SET_RG_MRX_LEN_LOWER_TH_1(_VAL_) (REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0xffffe000))
+#define SET_RG_MRX_LEN_UPPER_TH_1(_VAL_) (REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0xe000ffff))
+#define SET_RG_MRX_LEN_CNT_EN_1(_VAL_) (REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) & 0x7fffffff))
+#define SET_RO_MTX_LEN_CNT_1(_VAL_) (REG32(ADR_PHY_READ_REG_04)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_04)) & 0xffff0000))
+#define SET_RO_MTX_LEN_CNT_0(_VAL_) (REG32(ADR_PHY_READ_REG_04)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_04)) & 0x0000ffff))
+#define SET_RO_MRX_LEN_CNT_1(_VAL_) (REG32(ADR_PHY_READ_REG_05)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_05)) & 0xffff0000))
+#define SET_RO_MRX_LEN_CNT_0(_VAL_) (REG32(ADR_PHY_READ_REG_05)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_05)) & 0x0000ffff))
+#define SET_RG_MODE_REG_IN_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xffff0000))
+#define SET_RG_PARALLEL_DR_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 20) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xffefffff))
+#define SET_RG_MBRUN_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xfeffffff))
+#define SET_RG_SHIFT_DR_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 28) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xefffffff))
+#define SET_RG_MODE_REG_SI_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 29) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xdfffffff))
+#define SET_RG_SIMULATION_MODE_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 30) | ((REG32(ADR_PHY_REG_28_BIST)) & 0xbfffffff))
+#define SET_RG_DBIST_MODE_16(_VAL_) (REG32(ADR_PHY_REG_28_BIST)) = (((_VAL_) << 31) | ((REG32(ADR_PHY_REG_28_BIST)) & 0x7fffffff))
+#define SET_RO_MODE_REG_OUT_16(_VAL_) (REG32(ADR_PHY_READ_REG_06_BIST)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_06_BIST)) & 0xffff0000))
+#define SET_RO_MODE_REG_SO_16(_VAL_) (REG32(ADR_PHY_READ_REG_06_BIST)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_READ_REG_06_BIST)) & 0xfeffffff))
+#define SET_RO_MONITOR_BUS_16(_VAL_) (REG32(ADR_PHY_READ_REG_07_BIST)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_07_BIST)) & 0xfff80000))
+#define SET_RG_MRX_TYPE_1(_VAL_) (REG32(ADR_PHY_REG_29_MTRX_MAC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0xffffff00))
+#define SET_RG_MRX_TYPE_0(_VAL_) (REG32(ADR_PHY_REG_29_MTRX_MAC)) = (((_VAL_) << 8) | ((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0xffff00ff))
+#define SET_RG_MTX_TYPE_1(_VAL_) (REG32(ADR_PHY_REG_29_MTRX_MAC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0xff00ffff))
+#define SET_RG_MTX_TYPE_0(_VAL_) (REG32(ADR_PHY_REG_29_MTRX_MAC)) = (((_VAL_) << 24) | ((REG32(ADR_PHY_REG_29_MTRX_MAC)) & 0x00ffffff))
+#define SET_RO_MTX_TYPE_CNT_1(_VAL_) (REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) & 0xffff0000))
+#define SET_RO_MTX_TYPE_CNT_0(_VAL_) (REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) & 0x0000ffff))
+#define SET_RO_MRX_TYPE_CNT_1(_VAL_) (REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) & 0xffff0000))
+#define SET_RO_MRX_TYPE_CNT_0(_VAL_) (REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) & 0x0000ffff))
+#define SET_RG_HB_COEF0(_VAL_) (REG32(ADR_PHY_REG_30_TX_UP_FIL)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_30_TX_UP_FIL)) & 0xfffff000))
+#define SET_RG_HB_COEF1(_VAL_) (REG32(ADR_PHY_REG_30_TX_UP_FIL)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_30_TX_UP_FIL)) & 0xf000ffff))
+#define SET_RG_HB_COEF2(_VAL_) (REG32(ADR_PHY_REG_31_TX_UP_FIL)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_31_TX_UP_FIL)) & 0xfffff000))
+#define SET_RG_HB_COEF3(_VAL_) (REG32(ADR_PHY_REG_31_TX_UP_FIL)) = (((_VAL_) << 16) | ((REG32(ADR_PHY_REG_31_TX_UP_FIL)) & 0xf000ffff))
+#define SET_RG_HB_COEF4(_VAL_) (REG32(ADR_PHY_REG_32_TX_UP_FIL)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_REG_32_TX_UP_FIL)) & 0xfffff000))
+#define SET_RO_TBUS_O(_VAL_) (REG32(ADR_PHY_READ_TBUS)) = (((_VAL_) << 0) | ((REG32(ADR_PHY_READ_TBUS)) & 0xfff00000))
+#define SET_RG_LPF4_00(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_00)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_00)) & 0xffffe000))
+#define SET_RG_LPF4_01(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_01)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_01)) & 0xffffe000))
+#define SET_RG_LPF4_02(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_02)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_02)) & 0xffffe000))
+#define SET_RG_LPF4_03(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_03)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_03)) & 0xffffe000))
+#define SET_RG_LPF4_04(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_04)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_04)) & 0xffffe000))
+#define SET_RG_LPF4_05(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_05)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_05)) & 0xffffe000))
+#define SET_RG_LPF4_06(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_06)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_06)) & 0xffffe000))
+#define SET_RG_LPF4_07(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_07)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_07)) & 0xffffe000))
+#define SET_RG_LPF4_08(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_08)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_08)) & 0xffffe000))
+#define SET_RG_LPF4_09(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_09)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_09)) & 0xffffe000))
+#define SET_RG_LPF4_10(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_10)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_10)) & 0xffffe000))
+#define SET_RG_LPF4_11(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_11)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_11)) & 0xffffe000))
+#define SET_RG_LPF4_12(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_12)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_12)) & 0xffffe000))
+#define SET_RG_LPF4_13(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_13)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_13)) & 0xffffe000))
+#define SET_RG_LPF4_14(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_14)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_14)) & 0xffffe000))
+#define SET_RG_LPF4_15(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_15)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_15)) & 0xffffe000))
+#define SET_RG_LPF4_16(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_16)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_16)) & 0xffffe000))
+#define SET_RG_LPF4_17(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_17)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_17)) & 0xffffe000))
+#define SET_RG_LPF4_18(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_18)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_18)) & 0xffffe000))
+#define SET_RG_LPF4_19(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_19)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_19)) & 0xffffe000))
+#define SET_RG_LPF4_20(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_20)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_20)) & 0xffffe000))
+#define SET_RG_LPF4_21(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_21)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_21)) & 0xffffe000))
+#define SET_RG_LPF4_22(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_22)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_22)) & 0xffffe000))
+#define SET_RG_LPF4_23(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_23)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_23)) & 0xffffe000))
+#define SET_RG_LPF4_24(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_24)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_24)) & 0xffffe000))
+#define SET_RG_LPF4_25(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_25)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_25)) & 0xffffe000))
+#define SET_RG_LPF4_26(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_26)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_26)) & 0xffffe000))
+#define SET_RG_LPF4_27(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_27)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_27)) & 0xffffe000))
+#define SET_RG_LPF4_28(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_28)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_28)) & 0xffffe000))
+#define SET_RG_LPF4_29(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_29)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_29)) & 0xffffe000))
+#define SET_RG_LPF4_30(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_30)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_30)) & 0xffffe000))
+#define SET_RG_LPF4_31(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_31)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_31)) & 0xffffe000))
+#define SET_RG_LPF4_32(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_32)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_32)) & 0xffffe000))
+#define SET_RG_LPF4_33(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_33)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_33)) & 0xffffe000))
+#define SET_RG_LPF4_34(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_34)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_34)) & 0xffffe000))
+#define SET_RG_LPF4_35(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_35)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_35)) & 0xffffe000))
+#define SET_RG_LPF4_36(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_36)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_36)) & 0xffffe000))
+#define SET_RG_LPF4_37(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_37)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_37)) & 0xffffe000))
+#define SET_RG_LPF4_38(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_38)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_38)) & 0xffffe000))
+#define SET_RG_LPF4_39(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_39)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_39)) & 0xffffe000))
+#define SET_RG_LPF4_40(_VAL_) (REG32(ADR_TX_11B_FIL_COEF_40)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_FIL_COEF_40)) & 0xffffe000))
+#define SET_RG_BP_SMB(_VAL_) (REG32(ADR_TX_11B_PLCP)) = (((_VAL_) << 13) | ((REG32(ADR_TX_11B_PLCP)) & 0xffffdfff))
+#define SET_RG_EN_SRVC(_VAL_) (REG32(ADR_TX_11B_PLCP)) = (((_VAL_) << 14) | ((REG32(ADR_TX_11B_PLCP)) & 0xffffbfff))
+#define SET_RG_DES_SPD(_VAL_) (REG32(ADR_TX_11B_PLCP)) = (((_VAL_) << 16) | ((REG32(ADR_TX_11B_PLCP)) & 0xfffcffff))
+#define SET_RG_BB_11B_RISE_TIME(_VAL_) (REG32(ADR_TX_11B_RAMP)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_RAMP)) & 0xffffff00))
+#define SET_RG_BB_11B_FALL_TIME(_VAL_) (REG32(ADR_TX_11B_RAMP)) = (((_VAL_) << 8) | ((REG32(ADR_TX_11B_RAMP)) & 0xffff00ff))
+#define SET_RG_WR_TX_EN_CNT_RST_N(_VAL_) (REG32(ADR_TX_11B_EN_CNT_RST_N)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_EN_CNT_RST_N)) & 0xfffffffe))
+#define SET_RO_TX_EN_CNT(_VAL_) (REG32(ADR_TX_11B_EN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_EN_CNT)) & 0xffff0000))
+#define SET_RO_TX_CNT(_VAL_) (REG32(ADR_TX_11B_PKT_GEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11B_PKT_GEN_CNT)) & 0x00000000))
+#define SET_RG_POS_DES_11B_L_EXT(_VAL_) (REG32(ADR_RX_11B_DES_DLY)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_DES_DLY)) & 0xfffffff0))
+#define SET_RG_PRE_DES_11B_DLY(_VAL_) (REG32(ADR_RX_11B_DES_DLY)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_DES_DLY)) & 0xffffff0f))
+#define SET_RG_CNT_CCA_LMT(_VAL_) (REG32(ADR_RX_11B_CCA_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CCA_0)) & 0xfff0ffff))
+#define SET_RG_BYPASS_DESCRAMBLER(_VAL_) (REG32(ADR_RX_11B_CCA_0)) = (((_VAL_) << 29) | ((REG32(ADR_RX_11B_CCA_0)) & 0xdfffffff))
+#define SET_RG_BYPASS_AGC(_VAL_) (REG32(ADR_RX_11B_CCA_0)) = (((_VAL_) << 31) | ((REG32(ADR_RX_11B_CCA_0)) & 0x7fffffff))
+#define SET_RG_CCA_BIT_CNT_LMT_RX(_VAL_) (REG32(ADR_RX_11B_CCA_1)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_CCA_1)) & 0xffffff0f))
+#define SET_RG_CCA_SCALE_BF(_VAL_) (REG32(ADR_RX_11B_CCA_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CCA_1)) & 0xff80ffff))
+#define SET_RG_PEAK_IDX_CNT_SEL(_VAL_) (REG32(ADR_RX_11B_CCA_1)) = (((_VAL_) << 28) | ((REG32(ADR_RX_11B_CCA_1)) & 0xcfffffff))
+#define SET_RG_TR_KI_T2(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0xfffffff8))
+#define SET_RG_TR_KP_T2(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_0)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0xffffff8f))
+#define SET_RG_TR_KI_T1(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0xfffff8ff))
+#define SET_RG_TR_KP_T1(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_0)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11B_TR_KP_KI_0)) & 0xffff8fff))
+#define SET_RG_CR_KI_T1(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_TR_KP_KI_1)) & 0xfff8ffff))
+#define SET_RG_CR_KP_T1(_VAL_) (REG32(ADR_RX_11B_TR_KP_KI_1)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_TR_KP_KI_1)) & 0xff8fffff))
+#define SET_RG_CHIP_CNT_SLICER(_VAL_) (REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0xffffffe0))
+#define SET_RG_CE_T4_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0xffff00ff))
+#define SET_RG_CE_T3_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0xff00ffff))
+#define SET_RG_CE_T2_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) & 0x00ffffff))
+#define SET_RG_CE_MU_T1(_VAL_) (REG32(ADR_RX_11B_CE_MU_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_CE_MU_0)) & 0xfffffff8))
+#define SET_RG_CE_DLY_SEL(_VAL_) (REG32(ADR_RX_11B_CE_MU_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CE_MU_0)) & 0xffc0ffff))
+#define SET_RG_CE_MU_T8(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xfffffff8))
+#define SET_RG_CE_MU_T7(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xffffff8f))
+#define SET_RG_CE_MU_T6(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xfffff8ff))
+#define SET_RG_CE_MU_T5(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xffff8fff))
+#define SET_RG_CE_MU_T4(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xfff8ffff))
+#define SET_RG_CE_MU_T3(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xff8fffff))
+#define SET_RG_CE_MU_T2(_VAL_) (REG32(ADR_RX_11B_CE_MU_1)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11B_CE_MU_1)) & 0xf8ffffff))
+#define SET_RG_EQ_MU_FB_T2(_VAL_) (REG32(ADR_RX_11B_EQ_MU_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_EQ_MU_0)) & 0xfffffff0))
+#define SET_RG_EQ_MU_FF_T2(_VAL_) (REG32(ADR_RX_11B_EQ_MU_0)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_EQ_MU_0)) & 0xffffff0f))
+#define SET_RG_EQ_MU_FB_T1(_VAL_) (REG32(ADR_RX_11B_EQ_MU_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_EQ_MU_0)) & 0xfff0ffff))
+#define SET_RG_EQ_MU_FF_T1(_VAL_) (REG32(ADR_RX_11B_EQ_MU_0)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_EQ_MU_0)) & 0xff0fffff))
+#define SET_RG_EQ_MU_FB_T4(_VAL_) (REG32(ADR_RX_11B_EQ_MU_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_EQ_MU_1)) & 0xfffffff0))
+#define SET_RG_EQ_MU_FF_T4(_VAL_) (REG32(ADR_RX_11B_EQ_MU_1)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_EQ_MU_1)) & 0xffffff0f))
+#define SET_RG_EQ_MU_FB_T3(_VAL_) (REG32(ADR_RX_11B_EQ_MU_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_EQ_MU_1)) & 0xfff0ffff))
+#define SET_RG_EQ_MU_FF_T3(_VAL_) (REG32(ADR_RX_11B_EQ_MU_1)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_EQ_MU_1)) & 0xff0fffff))
+#define SET_RG_EQ_KI_T2(_VAL_) (REG32(ADR_RX_11B_EQ_CR_KP_KI)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0xfffff8ff))
+#define SET_RG_EQ_KP_T2(_VAL_) (REG32(ADR_RX_11B_EQ_CR_KP_KI)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0xffff8fff))
+#define SET_RG_EQ_KI_T1(_VAL_) (REG32(ADR_RX_11B_EQ_CR_KP_KI)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0xfff8ffff))
+#define SET_RG_EQ_KP_T1(_VAL_) (REG32(ADR_RX_11B_EQ_CR_KP_KI)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_EQ_CR_KP_KI)) & 0xff8fffff))
+#define SET_RG_TR_LPF_RATE(_VAL_) (REG32(ADR_RX_11B_LPF_RATE)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_LPF_RATE)) & 0xffc00000))
+#define SET_RG_CE_BIT_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0xffffff80))
+#define SET_RG_CE_CH_MAIN_SET(_VAL_) (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (((_VAL_) << 7) | ((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0xffffff7f))
+#define SET_RG_TC_BIT_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0xffff80ff))
+#define SET_RG_CR_BIT_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0xff80ffff))
+#define SET_RG_TR_BIT_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) & 0x80ffffff))
+#define SET_RG_EQ_MAIN_TAP_MAN(_VAL_) (REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) & 0xfffffffe))
+#define SET_RG_EQ_MAIN_TAP_COEF(_VAL_) (REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) & 0xf800ffff))
+#define SET_RG_PWRON_DLY_TH_11B(_VAL_) (REG32(ADR_RX_11B_SEARCH_CNT_TH)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SEARCH_CNT_TH)) & 0xffffff00))
+#define SET_RG_SFD_BIT_CNT_LMT(_VAL_) (REG32(ADR_RX_11B_SEARCH_CNT_TH)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_SEARCH_CNT_TH)) & 0xff00ffff))
+#define SET_RG_CCA_PWR_TH_RX(_VAL_) (REG32(ADR_RX_11B_CCA_CONTROL)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_CCA_CONTROL)) & 0xffff8000))
+#define SET_RG_CCA_PWR_CNT_TH(_VAL_) (REG32(ADR_RX_11B_CCA_CONTROL)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_CCA_CONTROL)) & 0xffe0ffff))
+#define SET_B_FREQ_OS(_VAL_) (REG32(ADR_RX_11B_FREQUENCY_OFFSET)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_FREQUENCY_OFFSET)) & 0xfffff800))
+#define SET_B_SNR(_VAL_) (REG32(ADR_RX_11B_SNR_RSSI)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SNR_RSSI)) & 0xffffff80))
+#define SET_B_RCPI(_VAL_) (REG32(ADR_RX_11B_SNR_RSSI)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_SNR_RSSI)) & 0xff80ffff))
+#define SET_CRC_CNT(_VAL_) (REG32(ADR_RX_11B_SFD_CRC_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SFD_CRC_CNT)) & 0xffff0000))
+#define SET_SFD_CNT(_VAL_) (REG32(ADR_RX_11B_SFD_CRC_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_SFD_CRC_CNT)) & 0x0000ffff))
+#define SET_B_PACKET_ERR_CNT(_VAL_) (REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) & 0xffff0000))
+#define SET_PACKET_ERR(_VAL_) (REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) & 0xfffeffff))
+#define SET_B_PACKET_CNT(_VAL_) (REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) & 0xffff0000))
+#define SET_B_CCA_CNT(_VAL_) (REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) & 0x0000ffff))
+#define SET_B_LENGTH_FIELD(_VAL_) (REG32(ADR_RX_11B_SFD_FILED_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SFD_FILED_0)) & 0xffff0000))
+#define SET_SFD_FIELD(_VAL_) (REG32(ADR_RX_11B_SFD_FILED_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_SFD_FILED_0)) & 0x0000ffff))
+#define SET_SIGNAL_FIELD(_VAL_) (REG32(ADR_RX_11B_SFD_FIELD_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0xffffff00))
+#define SET_B_SERVICE_FIELD(_VAL_) (REG32(ADR_RX_11B_SFD_FIELD_1)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0xffff00ff))
+#define SET_CRC_CORRECT(_VAL_) (REG32(ADR_RX_11B_SFD_FIELD_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11B_SFD_FIELD_1)) & 0xfffeffff))
+#define SET_DEBUG_SEL(_VAL_) (REG32(ADR_RX_11B_PKT_STAT_EN)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0xfffffff0))
+#define SET_RG_PACKET_STAT_EN_11B(_VAL_) (REG32(ADR_RX_11B_PKT_STAT_EN)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0xffefffff))
+#define SET_RG_BIT_REVERSE(_VAL_) (REG32(ADR_RX_11B_PKT_STAT_EN)) = (((_VAL_) << 21) | ((REG32(ADR_RX_11B_PKT_STAT_EN)) & 0xffdfffff))
+#define SET_RX_PHY_11B_SOFT_RST_N(_VAL_) (REG32(ADR_RX_11B_SOFT_RST)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11B_SOFT_RST)) & 0xfffffffe))
+#define SET_RG_CE_BYPASS_TAP(_VAL_) (REG32(ADR_RX_11B_SOFT_RST)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11B_SOFT_RST)) & 0xffffff0f))
+#define SET_RG_EQ_BYPASS_FBW_TAP(_VAL_) (REG32(ADR_RX_11B_SOFT_RST)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11B_SOFT_RST)) & 0xfffff0ff))
+#define SET_RG_BB_11GN_RISE_TIME(_VAL_) (REG32(ADR_TX_11GN_RAMP)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11GN_RAMP)) & 0xffffff00))
+#define SET_RG_BB_11GN_FALL_TIME(_VAL_) (REG32(ADR_TX_11GN_RAMP)) = (((_VAL_) << 8) | ((REG32(ADR_TX_11GN_RAMP)) & 0xffff00ff))
+#define SET_RG_HTCARR52_FFT_SCALE(_VAL_) (REG32(ADR_TX_11GN_PLCP)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11GN_PLCP)) & 0xfffffc00))
+#define SET_RG_HTCARR56_FFT_SCALE(_VAL_) (REG32(ADR_TX_11GN_PLCP)) = (((_VAL_) << 12) | ((REG32(ADR_TX_11GN_PLCP)) & 0xffc00fff))
+#define SET_RG_PACKET_STAT_EN(_VAL_) (REG32(ADR_TX_11GN_PLCP)) = (((_VAL_) << 23) | ((REG32(ADR_TX_11GN_PLCP)) & 0xff7fffff))
+#define SET_RG_SMB_DEF(_VAL_) (REG32(ADR_TX_11GN_PLCP)) = (((_VAL_) << 24) | ((REG32(ADR_TX_11GN_PLCP)) & 0x80ffffff))
+#define SET_RG_CONTINUOUS_DATA_11GN(_VAL_) (REG32(ADR_TX_11GN_PLCP)) = (((_VAL_) << 31) | ((REG32(ADR_TX_11GN_PLCP)) & 0x7fffffff))
+#define SET_RO_TX_CNT_R(_VAL_) (REG32(ADR_TX_11GN_PKT_GEN_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11GN_PKT_GEN_CNT)) & 0x00000000))
+#define SET_RO_PACKET_ERR_CNT(_VAL_) (REG32(ADR_TX_11GN_PLCP_CRC_ERR_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_TX_11GN_PLCP_CRC_ERR_CNT)) & 0xffff0000))
+#define SET_RG_POS_DES_11GN_L_EXT(_VAL_) (REG32(ADR_RX_11GN_DES_DLY)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_DES_DLY)) & 0xfffffff0))
+#define SET_RG_PRE_DES_11GN_DLY(_VAL_) (REG32(ADR_RX_11GN_DES_DLY)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_DES_DLY)) & 0xffffff0f))
+#define SET_RG_TR_LPF_KI_G_T1(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_TR_0)) & 0xfffffff0))
+#define SET_RG_TR_LPF_KP_G_T1(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_TR_0)) & 0xffffff0f))
+#define SET_RG_TR_CNT_T1(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_TR_0)) & 0xffff00ff))
+#define SET_RG_TR_LPF_KI_G_T0(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_TR_0)) & 0xfff0ffff))
+#define SET_RG_TR_LPF_KP_G_T0(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11GN_TR_0)) & 0xff0fffff))
+#define SET_RG_TR_CNT_T0(_VAL_) (REG32(ADR_RX_11GN_TR_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_TR_0)) & 0x00ffffff))
+#define SET_RG_TR_LPF_KI_G_T2(_VAL_) (REG32(ADR_RX_11GN_TR_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_TR_1)) & 0xfffffff0))
+#define SET_RG_TR_LPF_KP_G_T2(_VAL_) (REG32(ADR_RX_11GN_TR_1)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_TR_1)) & 0xffffff0f))
+#define SET_RG_TR_CNT_T2(_VAL_) (REG32(ADR_RX_11GN_TR_1)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_TR_1)) & 0xffff00ff))
+#define SET_RG_TR_LPF_KI_G(_VAL_) (REG32(ADR_RX_11GN_TR_2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_TR_2)) & 0xfffffff0))
+#define SET_RG_TR_LPF_KP_G(_VAL_) (REG32(ADR_RX_11GN_TR_2)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_TR_2)) & 0xffffff0f))
+#define SET_RG_TR_LPF_RATE_G(_VAL_) (REG32(ADR_RX_11GN_TR_2)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_TR_2)) & 0xc00000ff))
+#define SET_RG_CR_LPF_KI_G(_VAL_) (REG32(ADR_RX_11GN_CCA_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_CCA_0)) & 0xfffffff8))
+#define SET_RG_SYM_BOUND_CNT(_VAL_) (REG32(ADR_RX_11GN_CCA_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_CCA_0)) & 0xffff80ff))
+#define SET_RG_XSCOR32_RATIO(_VAL_) (REG32(ADR_RX_11GN_CCA_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_0)) & 0xff80ffff))
+#define SET_RG_ATCOR64_CNT_LMT(_VAL_) (REG32(ADR_RX_11GN_CCA_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_0)) & 0x80ffffff))
+#define SET_RG_ATCOR16_CNT_LMT2(_VAL_) (REG32(ADR_RX_11GN_CCA_1)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_CCA_1)) & 0xffff80ff))
+#define SET_RG_ATCOR16_CNT_LMT1(_VAL_) (REG32(ADR_RX_11GN_CCA_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_1)) & 0xff80ffff))
+#define SET_RG_ATCOR16_RATIO_SB(_VAL_) (REG32(ADR_RX_11GN_CCA_1)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_1)) & 0x80ffffff))
+#define SET_RG_XSCOR64_CNT_LMT2(_VAL_) (REG32(ADR_RX_11GN_CCA_2)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_2)) & 0xff80ffff))
+#define SET_RG_XSCOR64_CNT_LMT1(_VAL_) (REG32(ADR_RX_11GN_CCA_2)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_2)) & 0x80ffffff))
+#define SET_RG_RX_FFT_SCALE(_VAL_) (REG32(ADR_RX_11GN_CCA_FFT_SCALE)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0xfffffc00))
+#define SET_RG_VITERBI_AB_SWAP(_VAL_) (REG32(ADR_RX_11GN_CCA_FFT_SCALE)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0xfffeffff))
+#define SET_RG_ATCOR16_CNT_TH(_VAL_) (REG32(ADR_RX_11GN_CCA_FFT_SCALE)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_FFT_SCALE)) & 0xf0ffffff))
+#define SET_RG_NORMSQUARE_LOW_SNR_7(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0xffffff00))
+#define SET_RG_NORMSQUARE_LOW_SNR_6(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0xffff00ff))
+#define SET_RG_NORMSQUARE_LOW_SNR_5(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0xff00ffff))
+#define SET_RG_NORMSQUARE_LOW_SNR_4(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_0)) & 0x00ffffff))
+#define SET_RG_NORMSQUARE_LOW_SNR_8(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_1)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_1)) & 0x00ffffff))
+#define SET_RG_NORMSQUARE_SNR_3(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0xffffff00))
+#define SET_RG_NORMSQUARE_SNR_2(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_2)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0xffff00ff))
+#define SET_RG_NORMSQUARE_SNR_1(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_2)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0xff00ffff))
+#define SET_RG_NORMSQUARE_SNR_0(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_2)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_2)) & 0x00ffffff))
+#define SET_RG_NORMSQUARE_SNR_7(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_3)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0xffffff00))
+#define SET_RG_NORMSQUARE_SNR_6(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_3)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0xffff00ff))
+#define SET_RG_NORMSQUARE_SNR_5(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_3)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0xff00ffff))
+#define SET_RG_NORMSQUARE_SNR_4(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_3)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_3)) & 0x00ffffff))
+#define SET_RG_NORMSQUARE_SNR_8(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_4)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_4)) & 0x00ffffff))
+#define SET_RG_SNR_TH_64QAM(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_5)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_5)) & 0xffffff80))
+#define SET_RG_SNR_TH_16QAM(_VAL_) (REG32(ADR_RX_11GN_SOFT_DEMAP_5)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SOFT_DEMAP_5)) & 0xffff80ff))
+#define SET_RG_ATCOR16_CNT_PLUS_LMT2(_VAL_) (REG32(ADR_RX_11GN_SYM_BOUND_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0xffffff80))
+#define SET_RG_ATCOR16_CNT_PLUS_LMT1(_VAL_) (REG32(ADR_RX_11GN_SYM_BOUND_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0xffff80ff))
+#define SET_RG_SYM_BOUND_METHOD(_VAL_) (REG32(ADR_RX_11GN_SYM_BOUND_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SYM_BOUND_0)) & 0xfffcffff))
+#define SET_RG_PWRON_DLY_TH_11GN(_VAL_) (REG32(ADR_RX_11GN_SYM_BOUND_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SYM_BOUND_1)) & 0xffffff00))
+#define SET_RG_SB_START_CNT(_VAL_) (REG32(ADR_RX_11GN_SYM_BOUND_1)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SYM_BOUND_1)) & 0xffff80ff))
+#define SET_RG_POW16_CNT_TH(_VAL_) (REG32(ADR_RX_11GN_CCA_PWR)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_CCA_PWR)) & 0xffffff0f))
+#define SET_RG_POW16_SHORT_CNT_LMT(_VAL_) (REG32(ADR_RX_11GN_CCA_PWR)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_CCA_PWR)) & 0xfffff8ff))
+#define SET_RG_POW16_TH_L(_VAL_) (REG32(ADR_RX_11GN_CCA_PWR)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_PWR)) & 0x80ffffff))
+#define SET_RG_XSCOR16_SHORT_CNT_LMT(_VAL_) (REG32(ADR_RX_11GN_CCA_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_CCA_CNT)) & 0xfffffff8))
+#define SET_RG_XSCOR16_RATIO(_VAL_) (REG32(ADR_RX_11GN_CCA_CNT)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_CCA_CNT)) & 0xffff80ff))
+#define SET_RG_ATCOR16_SHORT_CNT_LMT(_VAL_) (REG32(ADR_RX_11GN_CCA_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_CNT)) & 0xfff8ffff))
+#define SET_RG_ATCOR16_RATIO_CCD(_VAL_) (REG32(ADR_RX_11GN_CCA_CNT)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CCA_CNT)) & 0x80ffffff))
+#define SET_RG_ATCOR64_ACC_LMT(_VAL_) (REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) & 0xffffff80))
+#define SET_RG_ATCOR16_SHORT_CNT_LMT2(_VAL_) (REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) & 0xfff8ffff))
+#define SET_RG_VITERBI_TB_BITS(_VAL_) (REG32(ADR_RX_11GN_VTB_TB)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_VTB_TB)) & 0x00ffffff))
+#define SET_RG_CR_CNT_UPDATE(_VAL_) (REG32(ADR_RX_11GN_ERR_UPDATE)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_ERR_UPDATE)) & 0xffffff00))
+#define SET_RG_TR_CNT_UPDATE(_VAL_) (REG32(ADR_RX_11GN_ERR_UPDATE)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_ERR_UPDATE)) & 0xff00ffff))
+#define SET_RG_BYPASS_CPE_MA(_VAL_) (REG32(ADR_RX_11GN_SHORT_GI)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_SHORT_GI)) & 0xffffffef))
+#define SET_RG_PILOT_BNDRY_SHIFT(_VAL_) (REG32(ADR_RX_11GN_SHORT_GI)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_SHORT_GI)) & 0xfffff8ff))
+#define SET_RG_EQ_SHORT_GI_SHIFT(_VAL_) (REG32(ADR_RX_11GN_SHORT_GI)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11GN_SHORT_GI)) & 0xffff8fff))
+#define SET_RG_FFT_WDW_SHORT_SHIFT(_VAL_) (REG32(ADR_RX_11GN_SHORT_GI)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SHORT_GI)) & 0xfff8ffff))
+#define SET_RG_CHSMTH_COEF(_VAL_) (REG32(ADR_RX_11GN_CHANNEL_UPDATE)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0xfffcffff))
+#define SET_RG_CHSMTH_EN(_VAL_) (REG32(ADR_RX_11GN_CHANNEL_UPDATE)) = (((_VAL_) << 18) | ((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0xfffbffff))
+#define SET_RG_CHEST_DD_FACTOR(_VAL_) (REG32(ADR_RX_11GN_CHANNEL_UPDATE)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0xf8ffffff))
+#define SET_RG_CH_UPDATE(_VAL_) (REG32(ADR_RX_11GN_CHANNEL_UPDATE)) = (((_VAL_) << 31) | ((REG32(ADR_RX_11GN_CHANNEL_UPDATE)) & 0x7fffffff))
+#define SET_RG_FMT_DET_MM_TH(_VAL_) (REG32(ADR_RX_11GN_PKT_FORMAT_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0xffffff00))
+#define SET_RG_FMT_DET_GF_TH(_VAL_) (REG32(ADR_RX_11GN_PKT_FORMAT_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0xffff00ff))
+#define SET_RG_DO_NOT_CHECK_L_RATE(_VAL_) (REG32(ADR_RX_11GN_PKT_FORMAT_0)) = (((_VAL_) << 25) | ((REG32(ADR_RX_11GN_PKT_FORMAT_0)) & 0xfdffffff))
+#define SET_RG_FMT_DET_LENGTH_TH(_VAL_) (REG32(ADR_RX_11GN_PKT_FORMAT_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_PKT_FORMAT_1)) & 0xffff0000))
+#define SET_RG_L_LENGTH_MAX(_VAL_) (REG32(ADR_RX_11GN_PKT_FORMAT_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_PKT_FORMAT_1)) & 0x0000ffff))
+#define SET_RG_TX_TIME_EXT(_VAL_) (REG32(ADR_RX_11GN_TX_TIME)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_TX_TIME)) & 0xffffff00))
+#define SET_RG_MAC_DES_SPACE(_VAL_) (REG32(ADR_RX_11GN_TX_TIME)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11GN_TX_TIME)) & 0xff0fffff))
+#define SET_RG_TR_LPF_STBC_GF_KI_G(_VAL_) (REG32(ADR_RX_11GN_STBC_TR_KP_KI)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0xfffffff0))
+#define SET_RG_TR_LPF_STBC_GF_KP_G(_VAL_) (REG32(ADR_RX_11GN_STBC_TR_KP_KI)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0xffffff0f))
+#define SET_RG_TR_LPF_STBC_MF_KI_G(_VAL_) (REG32(ADR_RX_11GN_STBC_TR_KP_KI)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0xfffff0ff))
+#define SET_RG_TR_LPF_STBC_MF_KP_G(_VAL_) (REG32(ADR_RX_11GN_STBC_TR_KP_KI)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11GN_STBC_TR_KP_KI)) & 0xffff0fff))
+#define SET_RG_MODE_REG_IN_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xfffe0000))
+#define SET_RG_PARALLEL_DR_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xffefffff))
+#define SET_RG_MBRUN_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xfeffffff))
+#define SET_RG_SHIFT_DR_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 28) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xefffffff))
+#define SET_RG_MODE_REG_SI_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 29) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xdfffffff))
+#define SET_RG_SIMULATION_MODE_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 30) | ((REG32(ADR_RX_11GN_BIST_0)) & 0xbfffffff))
+#define SET_RG_DBIST_MODE_80(_VAL_) (REG32(ADR_RX_11GN_BIST_0)) = (((_VAL_) << 31) | ((REG32(ADR_RX_11GN_BIST_0)) & 0x7fffffff))
+#define SET_RG_MODE_REG_IN_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xffff0000))
+#define SET_RG_PARALLEL_DR_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xffefffff))
+#define SET_RG_MBRUN_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xfeffffff))
+#define SET_RG_SHIFT_DR_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 28) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xefffffff))
+#define SET_RG_MODE_REG_SI_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 29) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xdfffffff))
+#define SET_RG_SIMULATION_MODE_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 30) | ((REG32(ADR_RX_11GN_BIST_1)) & 0xbfffffff))
+#define SET_RG_DBIST_MODE_64(_VAL_) (REG32(ADR_RX_11GN_BIST_1)) = (((_VAL_) << 31) | ((REG32(ADR_RX_11GN_BIST_1)) & 0x7fffffff))
+#define SET_RO_MODE_REG_OUT_80(_VAL_) (REG32(ADR_RX_11GN_BIST_2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_2)) & 0xfffe0000))
+#define SET_RO_MODE_REG_SO_80(_VAL_) (REG32(ADR_RX_11GN_BIST_2)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_BIST_2)) & 0xfeffffff))
+#define SET_RO_MONITOR_BUS_80(_VAL_) (REG32(ADR_RX_11GN_BIST_3)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_3)) & 0xffc00000))
+#define SET_RO_MODE_REG_OUT_64(_VAL_) (REG32(ADR_RX_11GN_BIST_4)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_4)) & 0xffff0000))
+#define SET_RO_MODE_REG_SO_64(_VAL_) (REG32(ADR_RX_11GN_BIST_4)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_BIST_4)) & 0xfeffffff))
+#define SET_RO_MONITOR_BUS_64(_VAL_) (REG32(ADR_RX_11GN_BIST_5)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_BIST_5)) & 0xfff80000))
+#define SET_RO_SPECTRUM_DATA(_VAL_) (REG32(ADR_RX_11GN_SPECTRUM_ANALYZER)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SPECTRUM_ANALYZER)) & 0x00000000))
+#define SET_GN_SNR(_VAL_) (REG32(ADR_RX_11GN_READ_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_READ_0)) & 0xffffff80))
+#define SET_GN_NOISE_PWR(_VAL_) (REG32(ADR_RX_11GN_READ_0)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_READ_0)) & 0xffff80ff))
+#define SET_GN_RCPI(_VAL_) (REG32(ADR_RX_11GN_READ_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_READ_0)) & 0xff80ffff))
+#define SET_GN_SIGNAL_PWR(_VAL_) (REG32(ADR_RX_11GN_READ_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_11GN_READ_0)) & 0x80ffffff))
+#define SET_RO_FREQ_OS_LTS(_VAL_) (REG32(ADR_RX_11GN_FREQ_OFFSET)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_FREQ_OFFSET)) & 0xffff8000))
+#define SET_CSTATE(_VAL_) (REG32(ADR_RX_11GN_FREQ_OFFSET)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_FREQ_OFFSET)) & 0xfff0ffff))
+#define SET_SIGNAL_FIELD0(_VAL_) (REG32(ADR_RX_11GN_SIGNAL_FIELD_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SIGNAL_FIELD_0)) & 0xff000000))
+#define SET_SIGNAL_FIELD1(_VAL_) (REG32(ADR_RX_11GN_SIGNAL_FIELD_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SIGNAL_FIELD_1)) & 0xff000000))
+#define SET_GN_PACKET_ERR_CNT(_VAL_) (REG32(ADR_RX_11GN_PKT_ERR_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_PKT_ERR_CNT)) & 0xffff0000))
+#define SET_GN_PACKET_CNT(_VAL_) (REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) & 0xffff0000))
+#define SET_GN_CCA_CNT(_VAL_) (REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) & 0x0000ffff))
+#define SET_GN_LENGTH_FIELD(_VAL_) (REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) & 0xffff0000))
+#define SET_GN_SERVICE_FIELD(_VAL_) (REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) & 0x0000ffff))
+#define SET_RO_HT_MCS_40M(_VAL_) (REG32(ADR_RX_11GN_RATE)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_RATE)) & 0xffffff80))
+#define SET_RO_L_RATE_40M(_VAL_) (REG32(ADR_RX_11GN_RATE)) = (((_VAL_) << 8) | ((REG32(ADR_RX_11GN_RATE)) & 0xffffc0ff))
+#define SET_RG_DAGC_CNT_TH(_VAL_) (REG32(ADR_RX_11GN_STAT_EN)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_STAT_EN)) & 0xfffffffc))
+#define SET_RG_PACKET_STAT_EN_11GN(_VAL_) (REG32(ADR_RX_11GN_STAT_EN)) = (((_VAL_) << 20) | ((REG32(ADR_RX_11GN_STAT_EN)) & 0xffefffff))
+#define SET_RX_PHY_11GN_SOFT_RST_N(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 0) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffffe))
+#define SET_RG_RIFS_EN(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 1) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffffd))
+#define SET_RG_STBC_EN(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 2) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffffb))
+#define SET_RG_COR_SEL(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 3) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffff7))
+#define SET_RG_INI_PHASE(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 4) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xffffffcf))
+#define SET_RG_HT_LTF_SEL_EQ(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 6) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xffffffbf))
+#define SET_RG_HT_LTF_SEL_PILOT(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 7) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xffffff7f))
+#define SET_RG_CCA_PWR_SEL(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 9) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffdff))
+#define SET_RG_CCA_XSCOR_PWR_SEL(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 10) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffffbff))
+#define SET_RG_CCA_XSCOR_AVGPWR_SEL(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 11) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffff7ff))
+#define SET_RG_DEBUG_SEL(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 12) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xffff0fff))
+#define SET_RG_POST_CLK_EN(_VAL_) (REG32(ADR_RX_11GN_SOFT_RST)) = (((_VAL_) << 16) | ((REG32(ADR_RX_11GN_SOFT_RST)) & 0xfffeffff))
+#define SET_IQCAL_RF_TX_EN(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 0) | ((REG32(ADR_RF_CONTROL_0)) & 0xfffffffe))
+#define SET_IQCAL_RF_TX_PA_EN(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 1) | ((REG32(ADR_RF_CONTROL_0)) & 0xfffffffd))
+#define SET_IQCAL_RF_TX_DAC_EN(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 2) | ((REG32(ADR_RF_CONTROL_0)) & 0xfffffffb))
+#define SET_IQCAL_RF_RX_AGC(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 3) | ((REG32(ADR_RF_CONTROL_0)) & 0xfffffff7))
+#define SET_IQCAL_RF_PGAG(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 8) | ((REG32(ADR_RF_CONTROL_0)) & 0xfffff0ff))
+#define SET_IQCAL_RF_RFG(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 12) | ((REG32(ADR_RF_CONTROL_0)) & 0xffffcfff))
+#define SET_RG_TONEGEN_FREQ(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 16) | ((REG32(ADR_RF_CONTROL_0)) & 0xff80ffff))
+#define SET_RG_TONEGEN_EN(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 23) | ((REG32(ADR_RF_CONTROL_0)) & 0xff7fffff))
+#define SET_RG_TONEGEN_INIT_PH(_VAL_) (REG32(ADR_RF_CONTROL_0)) = (((_VAL_) << 24) | ((REG32(ADR_RF_CONTROL_0)) & 0x80ffffff))
+#define SET_RG_TONEGEN2_FREQ(_VAL_) (REG32(ADR_RF_CONTROL_1)) = (((_VAL_) << 0) | ((REG32(ADR_RF_CONTROL_1)) & 0xffffff80))
+#define SET_RG_TONEGEN2_EN(_VAL_) (REG32(ADR_RF_CONTROL_1)) = (((_VAL_) << 7) | ((REG32(ADR_RF_CONTROL_1)) & 0xffffff7f))
+#define SET_RG_TONEGEN2_SCALE(_VAL_) (REG32(ADR_RF_CONTROL_1)) = (((_VAL_) << 8) | ((REG32(ADR_RF_CONTROL_1)) & 0xffff00ff))
+#define SET_RG_TXIQ_CLP_THD_I(_VAL_) (REG32(ADR_TX_IQ_CONTROL_0)) = (((_VAL_) << 0) | ((REG32(ADR_TX_IQ_CONTROL_0)) & 0xfffffc00))
+#define SET_RG_TXIQ_CLP_THD_Q(_VAL_) (REG32(ADR_TX_IQ_CONTROL_0)) = (((_VAL_) << 16) | ((REG32(ADR_TX_IQ_CONTROL_0)) & 0xfc00ffff))
+#define SET_RG_TX_I_SCALE(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 0) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xffffff00))
+#define SET_RG_TX_Q_SCALE(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 8) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xffff00ff))
+#define SET_RG_TX_IQ_SWP(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 16) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xfffeffff))
+#define SET_RG_TX_SGN_OUT(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 17) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xfffdffff))
+#define SET_RG_TXIQ_EMU_IDX(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 18) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xffc3ffff))
+#define SET_RG_TX_IQ_SRC(_VAL_) (REG32(ADR_TX_IQ_CONTROL_1)) = (((_VAL_) << 24) | ((REG32(ADR_TX_IQ_CONTROL_1)) & 0xfcffffff))
+#define SET_RG_TX_I_DC(_VAL_) (REG32(ADR_TX_IQ_CONTROL_2)) = (((_VAL_) << 0) | ((REG32(ADR_TX_IQ_CONTROL_2)) & 0xfffffc00))
+#define SET_RG_TX_Q_DC(_VAL_) (REG32(ADR_TX_IQ_CONTROL_2)) = (((_VAL_) << 16) | ((REG32(ADR_TX_IQ_CONTROL_2)) & 0xfc00ffff))
+#define SET_RG_TX_IQ_THETA(_VAL_) (REG32(ADR_TX_COMPENSATION_CONTROL)) = (((_VAL_) << 0) | ((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0xffffffe0))
+#define SET_RG_TX_IQ_ALPHA(_VAL_) (REG32(ADR_TX_COMPENSATION_CONTROL)) = (((_VAL_) << 8) | ((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0xffffe0ff))
+#define SET_RG_TXIQ_NOSHRINK(_VAL_) (REG32(ADR_TX_COMPENSATION_CONTROL)) = (((_VAL_) << 13) | ((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0xffffdfff))
+#define SET_RG_TX_I_OFFSET(_VAL_) (REG32(ADR_TX_COMPENSATION_CONTROL)) = (((_VAL_) << 16) | ((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0xff00ffff))
+#define SET_RG_TX_Q_OFFSET(_VAL_) (REG32(ADR_TX_COMPENSATION_CONTROL)) = (((_VAL_) << 24) | ((REG32(ADR_TX_COMPENSATION_CONTROL)) & 0x00ffffff))
+#define SET_RG_RX_IQ_THETA(_VAL_) (REG32(ADR_RX_COMPENSATION_CONTROL)) = (((_VAL_) << 0) | ((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0xffffffe0))
+#define SET_RG_RX_IQ_ALPHA(_VAL_) (REG32(ADR_RX_COMPENSATION_CONTROL)) = (((_VAL_) << 8) | ((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0xffffe0ff))
+#define SET_RG_RXIQ_NOSHRINK(_VAL_) (REG32(ADR_RX_COMPENSATION_CONTROL)) = (((_VAL_) << 13) | ((REG32(ADR_RX_COMPENSATION_CONTROL)) & 0xffffdfff))
+#define SET_RG_MA_DPTH(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 0) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfffffff0))
+#define SET_RG_INTG_PH(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 4) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfffffc0f))
+#define SET_RG_INTG_PRD(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 10) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xffffe3ff))
+#define SET_RG_INTG_MU(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 13) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xffff9fff))
+#define SET_RG_IQCAL_SPRM_SELQ(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 16) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfffeffff))
+#define SET_RG_IQCAL_SPRM_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 17) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfffdffff))
+#define SET_RG_IQCAL_SPRM_FREQ(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 18) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xff03ffff))
+#define SET_RG_IQCAL_IQCOL_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 24) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfeffffff))
+#define SET_RG_IQCAL_ALPHA_ESTM_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 25) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfdffffff))
+#define SET_RG_IQCAL_DC_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 26) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xfbffffff))
+#define SET_RG_PHEST_STBY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 27) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xf7ffffff))
+#define SET_RG_PHEST_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 28) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xefffffff))
+#define SET_RG_GP_DIV_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 29) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xdfffffff))
+#define SET_RG_DPD_GAIN_EST_EN(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (((_VAL_) << 30) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) & 0xbfffffff))
+#define SET_RG_IQCAL_MULT_OP0(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) & 0xfffffc00))
+#define SET_RG_IQCAL_MULT_OP1(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) & 0xfc00ffff))
+#define SET_RO_IQCAL_O(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xfff00000))
+#define SET_RO_IQCAL_SPRM_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 20) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xffefffff))
+#define SET_RO_IQCAL_IQCOL_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 21) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xffdfffff))
+#define SET_RO_IQCAL_ALPHA_ESTM_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 22) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xffbfffff))
+#define SET_RO_IQCAL_DC_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 23) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xff7fffff))
+#define SET_RO_IQCAL_MULT_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 24) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xfeffffff))
+#define SET_RO_FFT_ENRG_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 25) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xfdffffff))
+#define SET_RO_PHEST_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 26) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xfbffffff))
+#define SET_RO_GP_DIV_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 27) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xf7ffffff))
+#define SET_RO_GAIN_EST_RDY(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (((_VAL_) << 28) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) & 0xefffffff))
+#define SET_RO_AMP_O(_VAL_) (REG32(ADR_RX_OBSERVATION_CIRCUIT_3)) = (((_VAL_) << 0) | ((REG32(ADR_RX_OBSERVATION_CIRCUIT_3)) & 0xfffffe00))
+#define SET_RG_RX_I_SCALE(_VAL_) (REG32(ADR_RF_IQ_CONTROL_0)) = (((_VAL_) << 0) | ((REG32(ADR_RF_IQ_CONTROL_0)) & 0xffffff00))
+#define SET_RG_RX_Q_SCALE(_VAL_) (REG32(ADR_RF_IQ_CONTROL_0)) = (((_VAL_) << 8) | ((REG32(ADR_RF_IQ_CONTROL_0)) & 0xffff00ff))
+#define SET_RG_RX_I_OFFSET(_VAL_) (REG32(ADR_RF_IQ_CONTROL_0)) = (((_VAL_) << 16) | ((REG32(ADR_RF_IQ_CONTROL_0)) & 0xff00ffff))
+#define SET_RG_RX_Q_OFFSET(_VAL_) (REG32(ADR_RF_IQ_CONTROL_0)) = (((_VAL_) << 24) | ((REG32(ADR_RF_IQ_CONTROL_0)) & 0x00ffffff))
+#define SET_RG_RX_IQ_SWP(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 0) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xfffffffe))
+#define SET_RG_RX_SGN_IN(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 1) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xfffffffd))
+#define SET_RG_RX_IQ_SRC(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 2) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xfffffff3))
+#define SET_RG_ACI_GAIN(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 4) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xfffff00f))
+#define SET_RG_FFT_EN(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 12) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xffffefff))
+#define SET_RG_FFT_MOD(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 13) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xffffdfff))
+#define SET_RG_FFT_SCALE(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 14) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xff003fff))
+#define SET_RG_FFT_ENRG_FREQ(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 24) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xc0ffffff))
+#define SET_RG_FPGA_80M_PH_UP(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 30) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0xbfffffff))
+#define SET_RG_FPGA_80M_PH_STP(_VAL_) (REG32(ADR_RF_IQ_CONTROL_1)) = (((_VAL_) << 31) | ((REG32(ADR_RF_IQ_CONTROL_1)) & 0x7fffffff))
+#define SET_RG_ADC2LA_SEL(_VAL_) (REG32(ADR_RF_IQ_CONTROL_2)) = (((_VAL_) << 0) | ((REG32(ADR_RF_IQ_CONTROL_2)) & 0xfffffffe))
+#define SET_RG_ADC2LA_CLKPH(_VAL_) (REG32(ADR_RF_IQ_CONTROL_2)) = (((_VAL_) << 1) | ((REG32(ADR_RF_IQ_CONTROL_2)) & 0xfffffffd))
+#define SET_RG_RXIQ_EMU_IDX(_VAL_) (REG32(ADR_RF_IQ_CONTROL_3)) = (((_VAL_) << 0) | ((REG32(ADR_RF_IQ_CONTROL_3)) & 0xfffffff0))
+#define SET_RG_IQCAL_BP_ACI(_VAL_) (REG32(ADR_RF_IQ_CONTROL_3)) = (((_VAL_) << 4) | ((REG32(ADR_RF_IQ_CONTROL_3)) & 0xffffffef))
+#define SET_RG_DPD_AM_EN(_VAL_) (REG32(ADR_DPD_CONTROL)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_CONTROL)) & 0xfffffffe))
+#define SET_RG_DPD_PM_EN(_VAL_) (REG32(ADR_DPD_CONTROL)) = (((_VAL_) << 1) | ((REG32(ADR_DPD_CONTROL)) & 0xfffffffd))
+#define SET_RG_DPD_PM_AMSEL(_VAL_) (REG32(ADR_DPD_CONTROL)) = (((_VAL_) << 2) | ((REG32(ADR_DPD_CONTROL)) & 0xfffffffb))
+#define SET_RG_DPD_020_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_0)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_0)) & 0xfffffc00))
+#define SET_RG_DPD_040_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_0)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_0)) & 0xfc00ffff))
+#define SET_RG_DPD_060_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_1)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_1)) & 0xfffffc00))
+#define SET_RG_DPD_080_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_1)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_1)) & 0xfc00ffff))
+#define SET_RG_DPD_0A0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_2)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_2)) & 0xfffffc00))
+#define SET_RG_DPD_0C0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_2)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_2)) & 0xfc00ffff))
+#define SET_RG_DPD_0D0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_3)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_3)) & 0xfffffc00))
+#define SET_RG_DPD_0E0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_3)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_3)) & 0xfc00ffff))
+#define SET_RG_DPD_0F0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_4)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_4)) & 0xfffffc00))
+#define SET_RG_DPD_100_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_4)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_4)) & 0xfc00ffff))
+#define SET_RG_DPD_110_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_5)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_5)) & 0xfffffc00))
+#define SET_RG_DPD_120_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_5)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_5)) & 0xfc00ffff))
+#define SET_RG_DPD_130_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_6)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_6)) & 0xfffffc00))
+#define SET_RG_DPD_140_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_6)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_6)) & 0xfc00ffff))
+#define SET_RG_DPD_150_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_7)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_7)) & 0xfffffc00))
+#define SET_RG_DPD_160_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_7)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_7)) & 0xfc00ffff))
+#define SET_RG_DPD_170_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_8)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_8)) & 0xfffffc00))
+#define SET_RG_DPD_180_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_8)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_8)) & 0xfc00ffff))
+#define SET_RG_DPD_190_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_9)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_9)) & 0xfffffc00))
+#define SET_RG_DPD_1A0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_9)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_9)) & 0xfc00ffff))
+#define SET_RG_DPD_1B0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_A)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_A)) & 0xfffffc00))
+#define SET_RG_DPD_1C0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_A)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_A)) & 0xfc00ffff))
+#define SET_RG_DPD_1D0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_B)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_B)) & 0xfffffc00))
+#define SET_RG_DPD_1E0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_B)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_B)) & 0xfc00ffff))
+#define SET_RG_DPD_1F0_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_C)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_TABLE_C)) & 0xfffffc00))
+#define SET_RG_DPD_200_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_TABLE_C)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_TABLE_C)) & 0xfc00ffff))
+#define SET_RG_DPD_020_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_0)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_0)) & 0xffffe000))
+#define SET_RG_DPD_040_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_0)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_0)) & 0xe000ffff))
+#define SET_RG_DPD_060_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_1)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_1)) & 0xffffe000))
+#define SET_RG_DPD_080_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_1)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_1)) & 0xe000ffff))
+#define SET_RG_DPD_0A0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_2)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_2)) & 0xffffe000))
+#define SET_RG_DPD_0C0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_2)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_2)) & 0xe000ffff))
+#define SET_RG_DPD_0D0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_3)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_3)) & 0xffffe000))
+#define SET_RG_DPD_0E0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_3)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_3)) & 0xe000ffff))
+#define SET_RG_DPD_0F0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_4)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_4)) & 0xffffe000))
+#define SET_RG_DPD_100_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_4)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_4)) & 0xe000ffff))
+#define SET_RG_DPD_110_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_5)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_5)) & 0xffffe000))
+#define SET_RG_DPD_120_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_5)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_5)) & 0xe000ffff))
+#define SET_RG_DPD_130_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_6)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_6)) & 0xffffe000))
+#define SET_RG_DPD_140_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_6)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_6)) & 0xe000ffff))
+#define SET_RG_DPD_150_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_7)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_7)) & 0xffffe000))
+#define SET_RG_DPD_160_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_7)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_7)) & 0xe000ffff))
+#define SET_RG_DPD_170_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_8)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_8)) & 0xffffe000))
+#define SET_RG_DPD_180_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_8)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_8)) & 0xe000ffff))
+#define SET_RG_DPD_190_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_9)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_9)) & 0xffffe000))
+#define SET_RG_DPD_1A0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_9)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_9)) & 0xe000ffff))
+#define SET_RG_DPD_1B0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_A)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_A)) & 0xffffe000))
+#define SET_RG_DPD_1C0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_A)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_A)) & 0xe000ffff))
+#define SET_RG_DPD_1D0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_B)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_B)) & 0xffffe000))
+#define SET_RG_DPD_1E0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_B)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_B)) & 0xe000ffff))
+#define SET_RG_DPD_1F0_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_C)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_PH_TABLE_C)) & 0xffffe000))
+#define SET_RG_DPD_200_PH(_VAL_) (REG32(ADR_DPD_PH_TABLE_C)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_PH_TABLE_C)) & 0xe000ffff))
+#define SET_RG_DPD_GAIN_EST_Y0(_VAL_) (REG32(ADR_DPD_GAIN_ESTIMATION_0)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_ESTIMATION_0)) & 0xfffffe00))
+#define SET_RG_DPD_GAIN_EST_Y1(_VAL_) (REG32(ADR_DPD_GAIN_ESTIMATION_0)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_ESTIMATION_0)) & 0xfe00ffff))
+#define SET_RG_DPD_LOOP_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_ESTIMATION_1)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_ESTIMATION_1)) & 0xfffffc00))
+#define SET_RG_DPD_GAIN_EST_X0(_VAL_) (REG32(ADR_DPD_GAIN_ESTIMATION_2)) = (((_VAL_) << 0) | ((REG32(ADR_DPD_GAIN_ESTIMATION_2)) & 0xfffffe00))
+#define SET_RO_DPD_GAIN(_VAL_) (REG32(ADR_DPD_GAIN_ESTIMATION_2)) = (((_VAL_) << 16) | ((REG32(ADR_DPD_GAIN_ESTIMATION_2)) & 0xfc00ffff))
+#define SET_TX_SCALE_11B(_VAL_) (REG32(ADR_TX_GAIN_FACTOR)) = (((_VAL_) << 0) | ((REG32(ADR_TX_GAIN_FACTOR)) & 0xffffff00))
+#define SET_TX_SCALE_11B_P0D5(_VAL_) (REG32(ADR_TX_GAIN_FACTOR)) = (((_VAL_) << 8) | ((REG32(ADR_TX_GAIN_FACTOR)) & 0xffff00ff))
+#define SET_TX_SCALE_11G(_VAL_) (REG32(ADR_TX_GAIN_FACTOR)) = (((_VAL_) << 16) | ((REG32(ADR_TX_GAIN_FACTOR)) & 0xff00ffff))
+#define SET_TX_SCALE_11G_P0D5(_VAL_) (REG32(ADR_TX_GAIN_FACTOR)) = (((_VAL_) << 24) | ((REG32(ADR_TX_GAIN_FACTOR)) & 0x00ffffff))
+#define SET_RG_EN_MANUAL(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffe))
+#define SET_RG_TX_EN(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffd))
+#define SET_RG_TX_PA_EN(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffffffb))
+#define SET_RG_TX_DAC_EN(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffffff7))
+#define SET_RG_RX_AGC(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffffffef))
+#define SET_RG_RX_GAIN_MANUAL(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffffffdf))
+#define SET_RG_RFG(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffffff3f))
+#define SET_RG_PGAG(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffff0ff))
+#define SET_RG_MODE(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffffcfff))
+#define SET_RG_EN_TX_TRSW(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffffbfff))
+#define SET_RG_EN_SX(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffff7fff))
+#define SET_RG_EN_RX_LNA(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffeffff))
+#define SET_RG_EN_RX_MIXER(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 17) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffdffff))
+#define SET_RG_EN_RX_DIV2(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfffbffff))
+#define SET_RG_EN_RX_LOBUF(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 19) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfff7ffff))
+#define SET_RG_EN_RX_TZ(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffefffff))
+#define SET_RG_EN_RX_FILTER(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffdfffff))
+#define SET_RG_EN_RX_HPF(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xffbfffff))
+#define SET_RG_EN_RX_RSSI(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 23) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xff7fffff))
+#define SET_RG_EN_ADC(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfeffffff))
+#define SET_RG_EN_TX_MOD(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 25) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfdffffff))
+#define SET_RG_EN_TX_DIV2(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 26) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xfbffffff))
+#define SET_RG_EN_TX_DIV2_BUF(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xf7ffffff))
+#define SET_RG_EN_TX_LOBF(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 28) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xefffffff))
+#define SET_RG_EN_RX_LOBF(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 29) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xdfffffff))
+#define SET_RG_SEL_DPLL_CLK(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 30) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0xbfffffff))
+#define SET_RG_EN_CLK_960MBY13_UART(_VAL_) (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (((_VAL_) << 31) | ((REG32(ADR_HARD_WIRE_PIN_REGISTER)) & 0x7fffffff))
+#define SET_RG_EN_TX_DPD(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffffe))
+#define SET_RG_EN_TX_TSSI(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffffd))
+#define SET_RG_EN_RX_IQCAL(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffffb))
+#define SET_RG_EN_TX_DAC_CAL(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffff7))
+#define SET_RG_EN_TX_SELF_MIXER(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffffef))
+#define SET_RG_EN_TX_DAC_OUT(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffffdf))
+#define SET_RG_EN_LDO_RX_FE(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffffbf))
+#define SET_RG_EN_LDO_ABB(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 7) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffff7f))
+#define SET_RG_EN_LDO_AFE(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffeff))
+#define SET_RG_EN_SX_CHPLDO(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffdff))
+#define SET_RG_EN_SX_LOBFLDO(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffffbff))
+#define SET_RG_EN_IREF_RX(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffff7ff))
+#define SET_RG_EN_TX_DAC_VOUT(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffdfff))
+#define SET_RG_EN_SX_LCK_BIN(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xffffbfff))
+#define SET_RG_RTC_CAL_MODE(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffeffff))
+#define SET_RG_EN_IQPAD_IOSW(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 17) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffdffff))
+#define SET_RG_EN_TESTPAD_IOSW(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfffbffff))
+#define SET_RG_EN_TRXBF_BYPASS(_VAL_) (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (((_VAL_) << 19) | ((REG32(ADR_MANUAL_ENABLE_REGISTER)) & 0xfff7ffff))
+#define SET_RG_LDO_LEVEL_RX_FE(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_LDO_REGISTER)) & 0xfffffff8))
+#define SET_RG_LDO_LEVEL_ABB(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_LDO_REGISTER)) & 0xffffffc7))
+#define SET_RG_LDO_LEVEL_AFE(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_LDO_REGISTER)) & 0xfffffe3f))
+#define SET_RG_SX_LDO_CHP_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_LDO_REGISTER)) & 0xfffff1ff))
+#define SET_RG_SX_LDO_LOBF_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_LDO_REGISTER)) & 0xffff8fff))
+#define SET_RG_SX_LDO_XOSC_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_LDO_REGISTER)) & 0xfffc7fff))
+#define SET_RG_DP_LDO_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_LDO_REGISTER)) & 0xffe3ffff))
+#define SET_RG_SX_LDO_VCO_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_LDO_REGISTER)) & 0xff1fffff))
+#define SET_RG_TX_LDO_TX_LEVEL(_VAL_) (REG32(ADR_LDO_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_LDO_REGISTER)) & 0xf8ffffff))
+#define SET_RG_EN_RX_PADSW(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffffe))
+#define SET_RG_EN_RX_TESTNODE(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 1) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffffd))
+#define SET_RG_RX_ABBCFIX(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 2) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffffb))
+#define SET_RG_RX_ABBCTUNE(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 3) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffe07))
+#define SET_RG_RX_ABBOUT_TRI_STATE(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 9) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffdff))
+#define SET_RG_RX_ABB_N_MODE(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 10) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffffbff))
+#define SET_RG_RX_EN_LOOPA(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 11) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffff7ff))
+#define SET_RG_RX_FILTERI1ST(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 12) | ((REG32(ADR_ABB_REGISTER_1)) & 0xffffcfff))
+#define SET_RG_RX_FILTERI2ND(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 14) | ((REG32(ADR_ABB_REGISTER_1)) & 0xffff3fff))
+#define SET_RG_RX_FILTERI3RD(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 16) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfffcffff))
+#define SET_RG_RX_FILTERI_COURSE(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 18) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfff3ffff))
+#define SET_RG_RX_FILTERVCM(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 20) | ((REG32(ADR_ABB_REGISTER_1)) & 0xffcfffff))
+#define SET_RG_RX_HPF3M(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 22) | ((REG32(ADR_ABB_REGISTER_1)) & 0xffbfffff))
+#define SET_RG_RX_HPF300K(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 23) | ((REG32(ADR_ABB_REGISTER_1)) & 0xff7fffff))
+#define SET_RG_RX_HPFI(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 24) | ((REG32(ADR_ABB_REGISTER_1)) & 0xfcffffff))
+#define SET_RG_RX_HPF_FINALCORNER(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 26) | ((REG32(ADR_ABB_REGISTER_1)) & 0xf3ffffff))
+#define SET_RG_RX_HPF_SETTLE1_C(_VAL_) (REG32(ADR_ABB_REGISTER_1)) = (((_VAL_) << 28) | ((REG32(ADR_ABB_REGISTER_1)) & 0xcfffffff))
+#define SET_RG_RX_HPF_SETTLE1_R(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfffffffc))
+#define SET_RG_RX_HPF_SETTLE2_C(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 2) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfffffff3))
+#define SET_RG_RX_HPF_SETTLE2_R(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 4) | ((REG32(ADR_ABB_REGISTER_2)) & 0xffffffcf))
+#define SET_RG_RX_HPF_VCMCON2(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 6) | ((REG32(ADR_ABB_REGISTER_2)) & 0xffffff3f))
+#define SET_RG_RX_HPF_VCMCON(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 8) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfffffcff))
+#define SET_RG_RX_OUTVCM(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 10) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfffff3ff))
+#define SET_RG_RX_TZI(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 12) | ((REG32(ADR_ABB_REGISTER_2)) & 0xffffcfff))
+#define SET_RG_RX_TZ_OUT_TRISTATE(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 14) | ((REG32(ADR_ABB_REGISTER_2)) & 0xffffbfff))
+#define SET_RG_RX_TZ_VCM(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 15) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfffe7fff))
+#define SET_RG_EN_RX_RSSI_TESTNODE(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 17) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfff1ffff))
+#define SET_RG_RX_ADCRSSI_CLKSEL(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 20) | ((REG32(ADR_ABB_REGISTER_2)) & 0xffefffff))
+#define SET_RG_RX_ADCRSSI_VCM(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 21) | ((REG32(ADR_ABB_REGISTER_2)) & 0xff9fffff))
+#define SET_RG_RX_REC_LPFCORNER(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 23) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfe7fffff))
+#define SET_RG_RSSI_CLOCK_GATING(_VAL_) (REG32(ADR_ABB_REGISTER_2)) = (((_VAL_) << 25) | ((REG32(ADR_ABB_REGISTER_2)) & 0xfdffffff))
+#define SET_RG_TXPGA_CAPSW(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_TX_FE_REGISTER)) & 0xfffffffc))
+#define SET_RG_TXPGA_MAIN(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_TX_FE_REGISTER)) & 0xffffff03))
+#define SET_RG_TXPGA_STEER(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_TX_FE_REGISTER)) & 0xffffc0ff))
+#define SET_RG_TXMOD_GMCELL(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_TX_FE_REGISTER)) & 0xffff3fff))
+#define SET_RG_TXLPF_GMCELL(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_TX_FE_REGISTER)) & 0xfffcffff))
+#define SET_RG_PACELL_EN(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_TX_FE_REGISTER)) & 0xffe3ffff))
+#define SET_RG_PABIAS_CTRL(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_TX_FE_REGISTER)) & 0xfe1fffff))
+#define SET_RG_TX_DIV_VSET(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 26) | ((REG32(ADR_TX_FE_REGISTER)) & 0xf3ffffff))
+#define SET_RG_TX_LOBUF_VSET(_VAL_) (REG32(ADR_TX_FE_REGISTER)) = (((_VAL_) << 28) | ((REG32(ADR_TX_FE_REGISTER)) & 0xcfffffff))
+#define SET_RG_RX_SQDC(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xfffffff8))
+#define SET_RG_RX_DIV2_CORE(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 3) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xffffffe7))
+#define SET_RG_RX_LOBUF(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 5) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xffffff9f))
+#define SET_RG_TX_DPDGM_BIAS(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 7) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xfffff87f))
+#define SET_RG_TX_DPD_DIV(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 11) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xffff87ff))
+#define SET_RG_TX_TSSI_BIAS(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 15) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xfffc7fff))
+#define SET_RG_TX_TSSI_DIV(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 18) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xffe3ffff))
+#define SET_RG_TX_TSSI_TESTMODE(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 21) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xffdfffff))
+#define SET_RG_TX_TSSI_TEST(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 22) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xff3fffff))
+#define SET_RG_PACASCODE_CTRL(_VAL_) (REG32(ADR_RX_FE_REGISTER_1)) = (((_VAL_) << 24) | ((REG32(ADR_RX_FE_REGISTER_1)) & 0xf8ffffff))
+#define SET_RG_RX_HG_LNA_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfffffffc))
+#define SET_RG_RX_HG_LNAHGN_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 2) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffffffc3))
+#define SET_RG_RX_HG_LNAHGP_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 6) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfffffc3f))
+#define SET_RG_RX_HG_LNALG_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 10) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffffc3ff))
+#define SET_RG_RX_HG_TZ_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 14) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xffff3fff))
+#define SET_RG_RX_HG_TZ_CAP(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (((_VAL_) << 16) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) & 0xfff8ffff))
+#define SET_RG_RX_MG_LNA_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfffffffc))
+#define SET_RG_RX_MG_LNAHGN_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 2) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffffffc3))
+#define SET_RG_RX_MG_LNAHGP_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 6) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfffffc3f))
+#define SET_RG_RX_MG_LNALG_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 10) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffffc3ff))
+#define SET_RG_RX_MG_TZ_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 14) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xffff3fff))
+#define SET_RG_RX_MG_TZ_CAP(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (((_VAL_) << 16) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) & 0xfff8ffff))
+#define SET_RG_RX_LG_LNA_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfffffffc))
+#define SET_RG_RX_LG_LNAHGN_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 2) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffffffc3))
+#define SET_RG_RX_LG_LNAHGP_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 6) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfffffc3f))
+#define SET_RG_RX_LG_LNALG_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 10) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffffc3ff))
+#define SET_RG_RX_LG_TZ_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 14) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xffff3fff))
+#define SET_RG_RX_LG_TZ_CAP(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (((_VAL_) << 16) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) & 0xfff8ffff))
+#define SET_RG_RX_ULG_LNA_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 0) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfffffffc))
+#define SET_RG_RX_ULG_LNAHGN_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 2) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffffffc3))
+#define SET_RG_RX_ULG_LNAHGP_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 6) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfffffc3f))
+#define SET_RG_RX_ULG_LNALG_BIAS(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 10) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffffc3ff))
+#define SET_RG_RX_ULG_TZ_GC(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 14) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xffff3fff))
+#define SET_RG_RX_ULG_TZ_CAP(_VAL_) (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (((_VAL_) << 16) | ((REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) & 0xfff8ffff))
+#define SET_RG_HPF1_FAST_SET_X(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xfffffffe))
+#define SET_RG_HPF1_FAST_SET_Y(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xfffffffd))
+#define SET_RG_HPF1_FAST_SET_Z(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xfffffffb))
+#define SET_RG_HPF_T1A(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffffffe7))
+#define SET_RG_HPF_T1B(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffffff9f))
+#define SET_RG_HPF_T1C(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 7) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xfffffe7f))
+#define SET_RG_RX_LNA_TRI_SEL(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xfffff9ff))
+#define SET_RG_RX_LNA_SETTLE(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffffe7ff))
+#define SET_RG_TXGAIN_PHYCTRL(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffffdfff))
+#define SET_RG_TX_GAIN(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffc03fff))
+#define SET_RG_TXGAIN_MANUAL(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xffbfffff))
+#define SET_RG_TX_GAIN_OFFSET(_VAL_) (REG32(ADR_RX_TX_FSM_REGISTER)) = (((_VAL_) << 23) | ((REG32(ADR_RX_TX_FSM_REGISTER)) & 0xf87fffff))
+#define SET_RG_ADC_CLKSEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffffffe))
+#define SET_RG_ADC_DIBIAS(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffffff9))
+#define SET_RG_ADC_DIVR(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffffff7))
+#define SET_RG_ADC_DVCMI(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xffffffcf))
+#define SET_RG_ADC_SAMSEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffffc3f))
+#define SET_RG_ADC_STNBY(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffffbff))
+#define SET_RG_ADC_TESTMODE(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffff7ff))
+#define SET_RG_ADC_TSEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xffff0fff))
+#define SET_RG_ADC_VRSEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfffcffff))
+#define SET_RG_DICMP(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfff3ffff))
+#define SET_RG_DIOP(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xffcfffff))
+#define SET_RG_SARADC_VRSEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xff3fffff))
+#define SET_RG_EN_SAR_TEST(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 24) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfcffffff))
+#define SET_RG_SARADC_THERMAL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 26) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xfbffffff))
+#define SET_RG_SARADC_TSSI(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xf7ffffff))
+#define SET_RG_CLK_SAR_SEL(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 28) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xcfffffff))
+#define SET_RG_EN_SARADC(_VAL_) (REG32(ADR_RX_ADC_REGISTER)) = (((_VAL_) << 30) | ((REG32(ADR_RX_ADC_REGISTER)) & 0xbfffffff))
+#define SET_RG_DACI1ST(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xfffffffc))
+#define SET_RG_TX_DACLPF_ICOURSE(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xfffffff3))
+#define SET_RG_TX_DACLPF_IFINE(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffffffcf))
+#define SET_RG_TX_DACLPF_VCM(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffffff3f))
+#define SET_RG_TX_DAC_CKEDGE_SEL(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xfffffeff))
+#define SET_RG_TX_DAC_IBIAS(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xfffff9ff))
+#define SET_RG_TX_DAC_OS(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffffc7ff))
+#define SET_RG_TX_DAC_RCAL(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffff3fff))
+#define SET_RG_TX_DAC_TSEL(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xfff0ffff))
+#define SET_RG_TX_EN_VOLTAGE_IN(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 20) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffefffff))
+#define SET_RG_TXLPF_BYPASS(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffdfffff))
+#define SET_RG_TXLPF_BOOSTI(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xffbfffff))
+#define SET_RG_TX_DAC_IOFFSET(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 23) | ((REG32(ADR_TX_DAC_REGISTER)) & 0xf87fffff))
+#define SET_RG_TX_DAC_QOFFSET(_VAL_) (REG32(ADR_TX_DAC_REGISTER)) = (((_VAL_) << 27) | ((REG32(ADR_TX_DAC_REGISTER)) & 0x87ffffff))
+#define SET_RG_EN_SX_R3(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffffffe))
+#define SET_RG_EN_SX_CH(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffffffd))
+#define SET_RG_EN_SX_CHP(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffffffb))
+#define SET_RG_EN_SX_DIVCK(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffffff7))
+#define SET_RG_EN_SX_VCOBF(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 4) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffffef))
+#define SET_RG_EN_SX_VCO(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffffdf))
+#define SET_RG_EN_SX_MOD(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 6) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffffbf))
+#define SET_RG_EN_SX_DITHER(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 8) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffffeff))
+#define SET_RG_EN_SX_VT_MON(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 11) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffff7ff))
+#define SET_RG_EN_SX_VT_MON_DG(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffefff))
+#define SET_RG_EN_SX_DIV(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffdfff))
+#define SET_RG_EN_SX_LPF(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffffbfff))
+#define SET_RG_EN_DPL_MOD(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xffff7fff))
+#define SET_RG_DPL_MOD_ORDER(_VAL_) (REG32(ADR_SX_ENABLE_REGISTER)) = (((_VAL_) << 16) | ((REG32(ADR_SX_ENABLE_REGISTER)) & 0xfffcffff))
+#define SET_RG_SX_RFCTRL_F(_VAL_) (REG32(ADR_SYN_REGISTER_1)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_REGISTER_1)) & 0xff000000))
+#define SET_RG_SX_SEL_CP(_VAL_) (REG32(ADR_SYN_REGISTER_1)) = (((_VAL_) << 24) | ((REG32(ADR_SYN_REGISTER_1)) & 0xf0ffffff))
+#define SET_RG_SX_SEL_CS(_VAL_) (REG32(ADR_SYN_REGISTER_1)) = (((_VAL_) << 28) | ((REG32(ADR_SYN_REGISTER_1)) & 0x0fffffff))
+#define SET_RG_SX_RFCTRL_CH(_VAL_) (REG32(ADR_SYN_REGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_REGISTER_2)) & 0xfffff800))
+#define SET_RG_SX_SEL_C3(_VAL_) (REG32(ADR_SYN_REGISTER_2)) = (((_VAL_) << 11) | ((REG32(ADR_SYN_REGISTER_2)) & 0xffff87ff))
+#define SET_RG_SX_SEL_RS(_VAL_) (REG32(ADR_SYN_REGISTER_2)) = (((_VAL_) << 15) | ((REG32(ADR_SYN_REGISTER_2)) & 0xfff07fff))
+#define SET_RG_SX_SEL_R3(_VAL_) (REG32(ADR_SYN_REGISTER_2)) = (((_VAL_) << 20) | ((REG32(ADR_SYN_REGISTER_2)) & 0xfe0fffff))
+#define SET_RG_SX_SEL_ICHP(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_PFD_CHP)) & 0xffffffe0))
+#define SET_RG_SX_SEL_PCHP(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 5) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfffffc1f))
+#define SET_RG_SX_SEL_CHP_REGOP(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 10) | ((REG32(ADR_SYN_PFD_CHP)) & 0xffffc3ff))
+#define SET_RG_SX_SEL_CHP_UNIOP(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 14) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfffc3fff))
+#define SET_RG_SX_CHP_IOST_POL(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 18) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfffbffff))
+#define SET_RG_SX_CHP_IOST(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 19) | ((REG32(ADR_SYN_PFD_CHP)) & 0xffc7ffff))
+#define SET_RG_SX_PFDSEL(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 22) | ((REG32(ADR_SYN_PFD_CHP)) & 0xffbfffff))
+#define SET_RG_SX_PFD_SET(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 23) | ((REG32(ADR_SYN_PFD_CHP)) & 0xff7fffff))
+#define SET_RG_SX_PFD_SET1(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 24) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfeffffff))
+#define SET_RG_SX_PFD_SET2(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 25) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfdffffff))
+#define SET_RG_SX_VBNCAS_SEL(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 26) | ((REG32(ADR_SYN_PFD_CHP)) & 0xfbffffff))
+#define SET_RG_SX_PFD_RST_H(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 27) | ((REG32(ADR_SYN_PFD_CHP)) & 0xf7ffffff))
+#define SET_RG_SX_PFD_TRUP(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 28) | ((REG32(ADR_SYN_PFD_CHP)) & 0xefffffff))
+#define SET_RG_SX_PFD_TRDN(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 29) | ((REG32(ADR_SYN_PFD_CHP)) & 0xdfffffff))
+#define SET_RG_SX_PFD_TRSEL(_VAL_) (REG32(ADR_SYN_PFD_CHP)) = (((_VAL_) << 30) | ((REG32(ADR_SYN_PFD_CHP)) & 0xbfffffff))
+#define SET_RG_SX_VCOBA_R(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xfffffff8))
+#define SET_RG_SX_VCORSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 3) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xffffff07))
+#define SET_RG_SX_VCOCUSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 8) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xfffff0ff))
+#define SET_RG_SX_RXBFSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 12) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xffff0fff))
+#define SET_RG_SX_TXBFSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 16) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xfff0ffff))
+#define SET_RG_SX_VCOBFSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 20) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xff0fffff))
+#define SET_RG_SX_DIVBFSEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 24) | ((REG32(ADR_SYN_VCO_LOBF)) & 0xf0ffffff))
+#define SET_RG_SX_GNDR_SEL(_VAL_) (REG32(ADR_SYN_VCO_LOBF)) = (((_VAL_) << 28) | ((REG32(ADR_SYN_VCO_LOBF)) & 0x0fffffff))
+#define SET_RG_SX_DITHER_WEIGHT(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xfffffffc))
+#define SET_RG_SX_MOD_ORDER(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 4) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xffffffcf))
+#define SET_RG_SX_RST_H_DIV(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 9) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xfffffdff))
+#define SET_RG_SX_SDM_EDGE(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 10) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xfffffbff))
+#define SET_RG_SX_XO_GM(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 11) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xffffe7ff))
+#define SET_RG_SX_REFBYTWO(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 13) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xffffdfff))
+#define SET_RG_SX_LCKEN(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 19) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xfff7ffff))
+#define SET_RG_SX_PREVDD(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 20) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xff0fffff))
+#define SET_RG_SX_PSCONTERVDD(_VAL_) (REG32(ADR_SYN_DIV_SDM_XOSC)) = (((_VAL_) << 24) | ((REG32(ADR_SYN_DIV_SDM_XOSC)) & 0xf0ffffff))
+#define SET_RG_SX_PH(_VAL_) (REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) = (((_VAL_) << 13) | ((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0xffffdfff))
+#define SET_RG_SX_PL(_VAL_) (REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) = (((_VAL_) << 14) | ((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0xffffbfff))
+#define SET_RG_XOSC_CBANK_XO(_VAL_) (REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) = (((_VAL_) << 15) | ((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0xfff87fff))
+#define SET_RG_XOSC_CBANK_XI(_VAL_) (REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) = (((_VAL_) << 19) | ((REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) & 0xff87ffff))
+#define SET_RG_SX_VT_MON_MODE(_VAL_) (REG32(ADR_SYN_LCK_VT)) = (((_VAL_) << 0) | ((REG32(ADR_SYN_LCK_VT)) & 0xfffffffe))
+#define SET_RG_SX_VT_TH_HI(_VAL_) (REG32(ADR_SYN_LCK_VT)) = (((_VAL_) << 1) | ((REG32(ADR_SYN_LCK_VT)) & 0xfffffff9))
+#define SET_RG_SX_VT_TH_LO(_VAL_) (REG32(ADR_SYN_LCK_VT)) = (((_VAL_) << 3) | ((REG32(ADR_SYN_LCK_VT)) & 0xffffffe7))
+#define SET_RG_SX_VT_SET(_VAL_) (REG32(ADR_SYN_LCK_VT)) = (((_VAL_) << 5) | ((REG32(ADR_SYN_LCK_VT)) & 0xffffffdf))
+#define SET_RG_SX_VT_MON_TMR(_VAL_) (REG32(ADR_SYN_LCK_VT)) = (((_VAL_) << 6) | ((REG32(ADR_SYN_LCK_VT)) & 0xffff803f))
+#define SET_RG_EN_DP_VT_MON(_VAL_) (REG32(ADR_DPLL_VCO_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_DPLL_VCO_REGISTER)) & 0xfffffffe))
+#define SET_RG_DP_VT_TH_HI(_VAL_) (REG32(ADR_DPLL_VCO_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_DPLL_VCO_REGISTER)) & 0xfffffff9))
+#define SET_RG_DP_VT_TH_LO(_VAL_) (REG32(ADR_DPLL_VCO_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_DPLL_VCO_REGISTER)) & 0xffffffe7))
+#define SET_RG_DP_CK320BY2(_VAL_) (REG32(ADR_DPLL_VCO_REGISTER)) = (((_VAL_) << 14) | ((REG32(ADR_DPLL_VCO_REGISTER)) & 0xffffbfff))
+#define SET_RG_DP_OD_TEST(_VAL_) (REG32(ADR_DPLL_VCO_REGISTER)) = (((_VAL_) << 21) | ((REG32(ADR_DPLL_VCO_REGISTER)) & 0xffdfffff))
+#define SET_RG_DP_BBPLL_BP(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfffffffe))
+#define SET_RG_DP_BBPLL_ICP(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfffffff9))
+#define SET_RG_DP_BBPLL_IDUAL(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 3) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xffffffe7))
+#define SET_RG_DP_BBPLL_OD_TEST(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 5) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfffffe1f))
+#define SET_RG_DP_BBPLL_PD(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfffffdff))
+#define SET_RG_DP_BBPLL_TESTSEL(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xffffe3ff))
+#define SET_RG_DP_BBPLL_PFD_DLY(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 13) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xffff9fff))
+#define SET_RG_DP_RP(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 15) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfffc7fff))
+#define SET_RG_DP_RHP(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 18) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0xfff3ffff))
+#define SET_RG_DP_BBPLL_SDM_EDGE(_VAL_) (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (((_VAL_) << 31) | ((REG32(ADR_DPLL_CP_PFD_REGISTER)) & 0x7fffffff))
+#define SET_RG_DP_FODIV(_VAL_) (REG32(ADR_DPLL_DIVIDER_REGISTER)) = (((_VAL_) << 12) | ((REG32(ADR_DPLL_DIVIDER_REGISTER)) & 0xfff80fff))
+#define SET_RG_DP_REFDIV(_VAL_) (REG32(ADR_DPLL_DIVIDER_REGISTER)) = (((_VAL_) << 22) | ((REG32(ADR_DPLL_DIVIDER_REGISTER)) & 0xe03fffff))
+#define SET_RG_IDACAI_PGAG15(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG15(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG14(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG14(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0xff03ffff))
+#define SET_RG_DP_BBPLL_BS(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER1)) = (((_VAL_) << 24) | ((REG32(ADR_DCOC_IDAC_REGISTER1)) & 0xc0ffffff))
+#define SET_RG_IDACAI_PGAG13(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG13(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG12(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG12(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER2)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER2)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG11(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG11(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG10(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG10(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER3)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER3)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG9(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG9(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG8(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG8(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER4)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER4)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG7(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG7(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG6(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG6(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER5)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER5)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG5(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG5(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG4(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG4(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER6)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER6)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG3(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG3(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG2(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG2(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER7)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER7)) & 0xff03ffff))
+#define SET_RG_IDACAI_PGAG1(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 0) | ((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0xffffffc0))
+#define SET_RG_IDACAQ_PGAG1(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 6) | ((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0xfffff03f))
+#define SET_RG_IDACAI_PGAG0(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 12) | ((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0xfffc0fff))
+#define SET_RG_IDACAQ_PGAG0(_VAL_) (REG32(ADR_DCOC_IDAC_REGISTER8)) = (((_VAL_) << 18) | ((REG32(ADR_DCOC_IDAC_REGISTER8)) & 0xff03ffff))
+#define SET_RG_EN_RCAL(_VAL_) (REG32(ADR_RCAL_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_RCAL_REGISTER)) & 0xfffffffe))
+#define SET_RG_RCAL_SPD(_VAL_) (REG32(ADR_RCAL_REGISTER)) = (((_VAL_) << 1) | ((REG32(ADR_RCAL_REGISTER)) & 0xfffffffd))
+#define SET_RG_RCAL_TMR(_VAL_) (REG32(ADR_RCAL_REGISTER)) = (((_VAL_) << 2) | ((REG32(ADR_RCAL_REGISTER)) & 0xfffffe03))
+#define SET_RG_RCAL_CODE_CWR(_VAL_) (REG32(ADR_RCAL_REGISTER)) = (((_VAL_) << 9) | ((REG32(ADR_RCAL_REGISTER)) & 0xfffffdff))
+#define SET_RG_RCAL_CODE_CWD(_VAL_) (REG32(ADR_RCAL_REGISTER)) = (((_VAL_) << 10) | ((REG32(ADR_RCAL_REGISTER)) & 0xffff83ff))
+#define SET_RG_SX_SUB_SEL_CWR(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 0) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xfffffffe))
+#define SET_RG_SX_SUB_SEL_CWD(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 1) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xffffff01))
+#define SET_RG_SX_LCK_BIN_OFFSET(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 15) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xfff87fff))
+#define SET_RG_SX_LCK_BIN_PRECISION(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 19) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xfff7ffff))
+#define SET_RG_SX_LOCK_EN_N(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 20) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xffefffff))
+#define SET_RG_SX_LOCK_MANUAL(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 21) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xffdfffff))
+#define SET_RG_SX_SUB_MANUAL(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 22) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xffbfffff))
+#define SET_RG_SX_SUB_SEL(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 23) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xc07fffff))
+#define SET_RG_SX_MUX_SEL_VTH_BINL(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (((_VAL_) << 30) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_I)) & 0xbfffffff))
+#define SET_RG_TRX_DUMMMY(_VAL_) (REG32(ADR_TRX_DUMMY_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_TRX_DUMMY_REGISTER)) & 0x00000000))
+#define SET_RG_SX_DUMMMY(_VAL_) (REG32(ADR_SX_DUMMY_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_SX_DUMMY_REGISTER)) & 0x00000000))
+#define SET_RCAL_RDY(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 0) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xfffffffe))
+#define SET_LCK_BIN_RDY(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 1) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xfffffffd))
+#define SET_VT_MON_RDY(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 2) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xfffffffb))
+#define SET_DA_R_CODE_LUT(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 6) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xfffff83f))
+#define SET_AD_SX_VT_MON_Q(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 11) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xffffe7ff))
+#define SET_AD_DP_VT_MON_Q(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 13) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xffff9fff))
+#define SET_RTC_CAL_RDY(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 15) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xffff7fff))
+#define SET_RG_SARADC_BIT(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 16) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xffc0ffff))
+#define SET_SAR_ADC_FSM_RDY(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 22) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xffbfffff))
+#define SET_AD_CIRCUIT_VERSION(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_1)) = (((_VAL_) << 23) | ((REG32(ADR_READ_ONLY_FLAGS_1)) & 0xf87fffff))
+#define SET_DA_R_CAL_CODE(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_2)) = (((_VAL_) << 0) | ((REG32(ADR_READ_ONLY_FLAGS_2)) & 0xffffffe0))
+#define SET_DA_SX_SUB_SEL(_VAL_) (REG32(ADR_READ_ONLY_FLAGS_2)) = (((_VAL_) << 5) | ((REG32(ADR_READ_ONLY_FLAGS_2)) & 0xfffff01f))
+#define SET_RG_DPL_RFCTRL_CH(_VAL_) (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) = (((_VAL_) << 0) | ((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0xfffff800))
+#define SET_RG_RSSIADC_RO_BIT(_VAL_) (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) = (((_VAL_) << 11) | ((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0xffff87ff))
+#define SET_RG_RX_ADC_I_RO_BIT(_VAL_) (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) = (((_VAL_) << 15) | ((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0xff807fff))
+#define SET_RG_RX_ADC_Q_RO_BIT(_VAL_) (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) = (((_VAL_) << 23) | ((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_I)) & 0x807fffff))
+#define SET_RG_DPL_RFCTRL_F(_VAL_) (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_II)) = (((_VAL_) << 0) | ((REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_II)) & 0xff000000))
+#define SET_RG_SX_TARGET_CNT(_VAL_) (REG32(ADR_SX_LCK_BIN_REGISTERS_II)) = (((_VAL_) << 0) | ((REG32(ADR_SX_LCK_BIN_REGISTERS_II)) & 0xffffe000))
+#define SET_RG_RTC_OFFSET(_VAL_) (REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) = (((_VAL_) << 0) | ((REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) & 0xffffff00))
+#define SET_RG_RTC_CAL_TARGET_COUNT(_VAL_) (REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) = (((_VAL_) << 8) | ((REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) & 0xfff000ff))
+#define SET_RG_RF_D_REG(_VAL_) (REG32(ADR_RF_D_DIGITAL_DEBUG_PORT_REGISTER)) = (((_VAL_) << 0) | ((REG32(ADR_RF_D_DIGITAL_DEBUG_PORT_REGISTER)) & 0xffff0000))
+#define SET_DIRECT_MODE(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_MMU_CTRL)) & 0xfffffffe))
+#define SET_TAG_INTERLEAVE_MD(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 1) | ((REG32(ADR_MMU_CTRL)) & 0xfffffffd))
+#define SET_DIS_DEMAND(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 2) | ((REG32(ADR_MMU_CTRL)) & 0xfffffffb))
+#define SET_SAME_ID_ALLOC_MD(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 3) | ((REG32(ADR_MMU_CTRL)) & 0xfffffff7))
+#define SET_HS_ACCESS_MD(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 4) | ((REG32(ADR_MMU_CTRL)) & 0xffffffef))
+#define SET_SRAM_ACCESS_MD(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 5) | ((REG32(ADR_MMU_CTRL)) & 0xffffffdf))
+#define SET_NOHIT_RPASS_MD(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 6) | ((REG32(ADR_MMU_CTRL)) & 0xffffffbf))
+#define SET_DMN_FLAG_CLR(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 7) | ((REG32(ADR_MMU_CTRL)) & 0xffffff7f))
+#define SET_ERR_SW_RST_N(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_MMU_CTRL)) & 0xfffffeff))
+#define SET_ALR_SW_RST_N(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 9) | ((REG32(ADR_MMU_CTRL)) & 0xfffffdff))
+#define SET_MCH_SW_RST_N(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 10) | ((REG32(ADR_MMU_CTRL)) & 0xfffffbff))
+#define SET_TAG_SW_RST_N(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 11) | ((REG32(ADR_MMU_CTRL)) & 0xfffff7ff))
+#define SET_ABT_SW_RST_N(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 12) | ((REG32(ADR_MMU_CTRL)) & 0xffffefff))
+#define SET_MMU_VER(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 13) | ((REG32(ADR_MMU_CTRL)) & 0xffff1fff))
+#define SET_MMU_SHARE_MCU(_VAL_) (REG32(ADR_MMU_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_MMU_CTRL)) & 0xff00ffff))
+#define SET_HS_WR(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_HS_CTRL)) & 0xfffffffe))
+#define SET_HS_FLAG(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 4) | ((REG32(ADR_HS_CTRL)) & 0xffffffef))
+#define SET_HS_ID(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_HS_CTRL)) & 0xffff80ff))
+#define SET_HS_CHANNEL(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_HS_CTRL)) & 0xfff0ffff))
+#define SET_HS_PAGE(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 20) | ((REG32(ADR_HS_CTRL)) & 0xff0fffff))
+#define SET_HS_DATA(_VAL_) (REG32(ADR_HS_CTRL)) = (((_VAL_) << 24) | ((REG32(ADR_HS_CTRL)) & 0x00ffffff))
+#define SET_CPU_POR0(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_POR0_7)) & 0xfffffff0))
+#define SET_CPU_POR1(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 4) | ((REG32(ADR_CPU_POR0_7)) & 0xffffff0f))
+#define SET_CPU_POR2(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 8) | ((REG32(ADR_CPU_POR0_7)) & 0xfffff0ff))
+#define SET_CPU_POR3(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 12) | ((REG32(ADR_CPU_POR0_7)) & 0xffff0fff))
+#define SET_CPU_POR4(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 16) | ((REG32(ADR_CPU_POR0_7)) & 0xfff0ffff))
+#define SET_CPU_POR5(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 20) | ((REG32(ADR_CPU_POR0_7)) & 0xff0fffff))
+#define SET_CPU_POR6(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 24) | ((REG32(ADR_CPU_POR0_7)) & 0xf0ffffff))
+#define SET_CPU_POR7(_VAL_) (REG32(ADR_CPU_POR0_7)) = (((_VAL_) << 28) | ((REG32(ADR_CPU_POR0_7)) & 0x0fffffff))
+#define SET_CPU_POR8(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 0) | ((REG32(ADR_CPU_POR8_F)) & 0xfffffff0))
+#define SET_CPU_POR9(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 4) | ((REG32(ADR_CPU_POR8_F)) & 0xffffff0f))
+#define SET_CPU_PORA(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 8) | ((REG32(ADR_CPU_POR8_F)) & 0xfffff0ff))
+#define SET_CPU_PORB(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 12) | ((REG32(ADR_CPU_POR8_F)) & 0xffff0fff))
+#define SET_CPU_PORC(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 16) | ((REG32(ADR_CPU_POR8_F)) & 0xfff0ffff))
+#define SET_CPU_PORD(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 20) | ((REG32(ADR_CPU_POR8_F)) & 0xff0fffff))
+#define SET_CPU_PORE(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 24) | ((REG32(ADR_CPU_POR8_F)) & 0xf0ffffff))
+#define SET_CPU_PORF(_VAL_) (REG32(ADR_CPU_POR8_F)) = (((_VAL_) << 28) | ((REG32(ADR_CPU_POR8_F)) & 0x0fffffff))
+#define SET_ACC_WR_LEN(_VAL_) (REG32(ADR_REG_LEN_CTRL)) = (((_VAL_) << 0) | ((REG32(ADR_REG_LEN_CTRL)) & 0xffffffc0))
+#define SET_ACC_RD_LEN(_VAL_) (REG32(ADR_REG_LEN_CTRL)) = (((_VAL_) << 8) | ((REG32(ADR_REG_LEN_CTRL)) & 0xffffc0ff))
+#define SET_REQ_NACK_CLR(_VAL_) (REG32(ADR_REG_LEN_CTRL)) = (((_VAL_) << 15) | ((REG32(ADR_REG_LEN_CTRL)) & 0xffff7fff))
+#define SET_NACK_FLAG_BUS(_VAL_) (REG32(ADR_REG_LEN_CTRL)) = (((_VAL_) << 16) | ((REG32(ADR_REG_LEN_CTRL)) & 0x0000ffff))
+#define SET_DMN_R_PASS(_VAL_) (REG32(ADR_DMN_READ_BYPASS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_READ_BYPASS)) & 0xffff0000))
+#define SET_PARA_ALC_RLS(_VAL_) (REG32(ADR_DMN_READ_BYPASS)) = (((_VAL_) << 16) | ((REG32(ADR_DMN_READ_BYPASS)) & 0xfffeffff))
+#define SET_REQ_PORNS_CHGEN(_VAL_) (REG32(ADR_DMN_READ_BYPASS)) = (((_VAL_) << 24) | ((REG32(ADR_DMN_READ_BYPASS)) & 0xfeffffff))
+#define SET_ALC_ABT_ID(_VAL_) (REG32(ADR_ALC_RLS_ABORT)) = (((_VAL_) << 0) | ((REG32(ADR_ALC_RLS_ABORT)) & 0xffffff80))
+#define SET_ALC_ABT_INT(_VAL_) (REG32(ADR_ALC_RLS_ABORT)) = (((_VAL_) << 15) | ((REG32(ADR_ALC_RLS_ABORT)) & 0xffff7fff))
+#define SET_RLS_ABT_ID(_VAL_) (REG32(ADR_ALC_RLS_ABORT)) = (((_VAL_) << 16) | ((REG32(ADR_ALC_RLS_ABORT)) & 0xff80ffff))
+#define SET_RLS_ABT_INT(_VAL_) (REG32(ADR_ALC_RLS_ABORT)) = (((_VAL_) << 31) | ((REG32(ADR_ALC_RLS_ABORT)) & 0x7fffffff))
+#define SET_DEBUG_CTL(_VAL_) (REG32(ADR_DEBUG_CTL)) = (((_VAL_) << 0) | ((REG32(ADR_DEBUG_CTL)) & 0xffffff00))
+#define SET_DEBUG_H16(_VAL_) (REG32(ADR_DEBUG_CTL)) = (((_VAL_) << 8) | ((REG32(ADR_DEBUG_CTL)) & 0xfffffeff))
+#define SET_DEBUG_OUT(_VAL_) (REG32(ADR_DEBUG_OUT)) = (((_VAL_) << 0) | ((REG32(ADR_DEBUG_OUT)) & 0x00000000))
+#define SET_ALC_ERR(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MMU_STATUS)) & 0xfffffffe))
+#define SET_RLS_ERR(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_MMU_STATUS)) & 0xfffffffd))
+#define SET_AL_STATE(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_MMU_STATUS)) & 0xfffff8ff))
+#define SET_RL_STATE(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 12) | ((REG32(ADR_MMU_STATUS)) & 0xffff8fff))
+#define SET_ALC_ERR_ID(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_MMU_STATUS)) & 0xff80ffff))
+#define SET_RLS_ERR_ID(_VAL_) (REG32(ADR_MMU_STATUS)) = (((_VAL_) << 24) | ((REG32(ADR_MMU_STATUS)) & 0x80ffffff))
+#define SET_DMN_NOHIT_FLAG(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_STATUS)) & 0xfffffffe))
+#define SET_DMN_FLAG(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_DMN_STATUS)) & 0xfffffffd))
+#define SET_DMN_WR(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 3) | ((REG32(ADR_DMN_STATUS)) & 0xfffffff7))
+#define SET_DMN_PORT(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 4) | ((REG32(ADR_DMN_STATUS)) & 0xffffff0f))
+#define SET_DMN_NHIT_ID(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_DMN_STATUS)) & 0xffff80ff))
+#define SET_DMN_NHIT_ADDR(_VAL_) (REG32(ADR_DMN_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_DMN_STATUS)) & 0x0000ffff))
+#define SET_TX_MOUNT(_VAL_) (REG32(ADR_TAG_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_STATUS)) & 0xffffff00))
+#define SET_RX_MOUNT(_VAL_) (REG32(ADR_TAG_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_TAG_STATUS)) & 0xffff00ff))
+#define SET_AVA_TAG(_VAL_) (REG32(ADR_TAG_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_STATUS)) & 0xfe00ffff))
+#define SET_PKTBUF_FULL(_VAL_) (REG32(ADR_TAG_STATUS)) = (((_VAL_) << 31) | ((REG32(ADR_TAG_STATUS)) & 0x7fffffff))
+#define SET_DMN_NOHIT_MCU(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_MCU_STATUS)) & 0xfffffffe))
+#define SET_DMN_MCU_FLAG(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 1) | ((REG32(ADR_DMN_MCU_STATUS)) & 0xfffffffd))
+#define SET_DMN_MCU_WR(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 3) | ((REG32(ADR_DMN_MCU_STATUS)) & 0xfffffff7))
+#define SET_DMN_MCU_PORT(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 4) | ((REG32(ADR_DMN_MCU_STATUS)) & 0xffffff0f))
+#define SET_DMN_MCU_ID(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 8) | ((REG32(ADR_DMN_MCU_STATUS)) & 0xffff80ff))
+#define SET_DMN_MCU_ADDR(_VAL_) (REG32(ADR_DMN_MCU_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_DMN_MCU_STATUS)) & 0x0000ffff))
+#define SET_MB_IDTBL_31_0(_VAL_) (REG32(ADR_MB_IDTBL_0_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_IDTBL_0_STATUS)) & 0x00000000))
+#define SET_MB_IDTBL_63_32(_VAL_) (REG32(ADR_MB_IDTBL_1_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_IDTBL_1_STATUS)) & 0x00000000))
+#define SET_MB_IDTBL_95_64(_VAL_) (REG32(ADR_MB_IDTBL_2_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_IDTBL_2_STATUS)) & 0x00000000))
+#define SET_MB_IDTBL_127_96(_VAL_) (REG32(ADR_MB_IDTBL_3_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_IDTBL_3_STATUS)) & 0x00000000))
+#define SET_PKT_IDTBL_31_0(_VAL_) (REG32(ADR_PKT_IDTBL_0_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_IDTBL_0_STATUS)) & 0x00000000))
+#define SET_PKT_IDTBL_63_32(_VAL_) (REG32(ADR_PKT_IDTBL_1_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_IDTBL_1_STATUS)) & 0x00000000))
+#define SET_PKT_IDTBL_95_64(_VAL_) (REG32(ADR_PKT_IDTBL_2_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_IDTBL_2_STATUS)) & 0x00000000))
+#define SET_PKT_IDTBL_127_96(_VAL_) (REG32(ADR_PKT_IDTBL_3_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_IDTBL_3_STATUS)) & 0x00000000))
+#define SET_DMN_IDTBL_31_0(_VAL_) (REG32(ADR_DMN_IDTBL_0_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_IDTBL_0_STATUS)) & 0x00000000))
+#define SET_DMN_IDTBL_63_32(_VAL_) (REG32(ADR_DMN_IDTBL_1_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_IDTBL_1_STATUS)) & 0x00000000))
+#define SET_DMN_IDTBL_95_64(_VAL_) (REG32(ADR_DMN_IDTBL_2_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_IDTBL_2_STATUS)) & 0x00000000))
+#define SET_DMN_IDTBL_127_96(_VAL_) (REG32(ADR_DMN_IDTBL_3_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_DMN_IDTBL_3_STATUS)) & 0x00000000))
+#define SET_NEQ_MB_ID_31_0(_VAL_) (REG32(ADR_MB_NEQID_0_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_NEQID_0_STATUS)) & 0x00000000))
+#define SET_NEQ_MB_ID_63_32(_VAL_) (REG32(ADR_MB_NEQID_1_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_NEQID_1_STATUS)) & 0x00000000))
+#define SET_NEQ_MB_ID_95_64(_VAL_) (REG32(ADR_MB_NEQID_2_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_NEQID_2_STATUS)) & 0x00000000))
+#define SET_NEQ_MB_ID_127_96(_VAL_) (REG32(ADR_MB_NEQID_3_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_MB_NEQID_3_STATUS)) & 0x00000000))
+#define SET_NEQ_PKT_ID_31_0(_VAL_) (REG32(ADR_PKT_NEQID_0_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_NEQID_0_STATUS)) & 0x00000000))
+#define SET_NEQ_PKT_ID_63_32(_VAL_) (REG32(ADR_PKT_NEQID_1_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_NEQID_1_STATUS)) & 0x00000000))
+#define SET_NEQ_PKT_ID_95_64(_VAL_) (REG32(ADR_PKT_NEQID_2_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_NEQID_2_STATUS)) & 0x00000000))
+#define SET_NEQ_PKT_ID_127_96(_VAL_) (REG32(ADR_PKT_NEQID_3_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_PKT_NEQID_3_STATUS)) & 0x00000000))
+#define SET_ALC_NOCHG_ID(_VAL_) (REG32(ADR_ALC_NOCHG_ID_STATUS)) = (((_VAL_) << 0) | ((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0xffffff80))
+#define SET_ALC_NOCHG_INT(_VAL_) (REG32(ADR_ALC_NOCHG_ID_STATUS)) = (((_VAL_) << 15) | ((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0xffff7fff))
+#define SET_NEQ_PKT_FLAG(_VAL_) (REG32(ADR_ALC_NOCHG_ID_STATUS)) = (((_VAL_) << 16) | ((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0xfffeffff))
+#define SET_NEQ_MB_FLAG(_VAL_) (REG32(ADR_ALC_NOCHG_ID_STATUS)) = (((_VAL_) << 24) | ((REG32(ADR_ALC_NOCHG_ID_STATUS)) & 0xfeffffff))
+#define SET_SRAM_TAG_0(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_0)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_0)) & 0xffff0000))
+#define SET_SRAM_TAG_1(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_0)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_0)) & 0x0000ffff))
+#define SET_SRAM_TAG_2(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_1)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_1)) & 0xffff0000))
+#define SET_SRAM_TAG_3(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_1)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_1)) & 0x0000ffff))
+#define SET_SRAM_TAG_4(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_2)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_2)) & 0xffff0000))
+#define SET_SRAM_TAG_5(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_2)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_2)) & 0x0000ffff))
+#define SET_SRAM_TAG_6(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_3)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_3)) & 0xffff0000))
+#define SET_SRAM_TAG_7(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_3)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_3)) & 0x0000ffff))
+#define SET_SRAM_TAG_8(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_4)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_4)) & 0xffff0000))
+#define SET_SRAM_TAG_9(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_4)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_4)) & 0x0000ffff))
+#define SET_SRAM_TAG_10(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_5)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_5)) & 0xffff0000))
+#define SET_SRAM_TAG_11(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_5)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_5)) & 0x0000ffff))
+#define SET_SRAM_TAG_12(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_6)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_6)) & 0xffff0000))
+#define SET_SRAM_TAG_13(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_6)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_6)) & 0x0000ffff))
+#define SET_SRAM_TAG_14(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_7)) = (((_VAL_) << 0) | ((REG32(ADR_TAG_SRAM0_F_STATUS_7)) & 0xffff0000))
+#define SET_SRAM_TAG_15(_VAL_) (REG32(ADR_TAG_SRAM0_F_STATUS_7)) = (((_VAL_) << 16) | ((REG32(ADR_TAG_SRAM0_F_STATUS_7)) & 0x0000ffff))
+#define DEF_BRG_SW_RST() (REG32(ADR_BRG_SW_RST)) = (0x00000000)
+#define DEF_BOOT() (REG32(ADR_BOOT)) = (0x00040000)
+#define DEF_CHIP_ID_0() (REG32(ADR_CHIP_ID_0)) = (0x31333131)
+#define DEF_CHIP_ID_1() (REG32(ADR_CHIP_ID_1)) = (0x322d3230)
+#define DEF_CHIP_ID_2() (REG32(ADR_CHIP_ID_2)) = (0x32303041)
+#define DEF_CHIP_ID_3() (REG32(ADR_CHIP_ID_3)) = (0x53535636)
+#define DEF_CLOCK_SELECTION() (REG32(ADR_CLOCK_SELECTION)) = (0x00000000)
+#define DEF_PLATFORM_CLOCK_ENABLE() (REG32(ADR_PLATFORM_CLOCK_ENABLE)) = (0x008fffff)
+#define DEF_SYS_CSR_CLOCK_ENABLE() (REG32(ADR_SYS_CSR_CLOCK_ENABLE)) = (0x00000400)
+#define DEF_MCU_DBG_SEL() (REG32(ADR_MCU_DBG_SEL)) = (0x00000000)
+#define DEF_MCU_DBG_DATA() (REG32(ADR_MCU_DBG_DATA)) = (0x00000000)
+#define DEF_AHB_BRG_STATUS() (REG32(ADR_AHB_BRG_STATUS)) = (0x00000000)
+#define DEF_BIST_BIST_CTRL() (REG32(ADR_BIST_BIST_CTRL)) = (0x00000000)
+#define DEF_BIST_MODE_REG_IN() (REG32(ADR_BIST_MODE_REG_IN)) = (0x001ffe3e)
+#define DEF_BIST_MODE_REG_OUT() (REG32(ADR_BIST_MODE_REG_OUT)) = (0x00000000)
+#define DEF_BIST_MONITOR_BUS_LSB() (REG32(ADR_BIST_MONITOR_BUS_LSB)) = (0x00000000)
+#define DEF_BIST_MONITOR_BUS_MSB() (REG32(ADR_BIST_MONITOR_BUS_MSB)) = (0x00000000)
+#define DEF_TB_ADR_SEL() (REG32(ADR_TB_ADR_SEL)) = (0x00000000)
+#define DEF_TB_RDATA() (REG32(ADR_TB_RDATA)) = (0x00000000)
+#define DEF_UART_W2B() (REG32(ADR_UART_W2B)) = (0x00000000)
+#define DEF_AHB_ILL_ADDR() (REG32(ADR_AHB_ILL_ADDR)) = (0x00000000)
+#define DEF_AHB_FEN_ADDR() (REG32(ADR_AHB_FEN_ADDR)) = (0x00000000)
+#define DEF_AHB_ILLFEN_STATUS() (REG32(ADR_AHB_ILLFEN_STATUS)) = (0x00000000)
+#define DEF_PWM_A() (REG32(ADR_PWM_A)) = (0x400a1010)
+#define DEF_PWM_B() (REG32(ADR_PWM_B)) = (0x400a1010)
+#define DEF_HBUSREQ_LOCK() (REG32(ADR_HBUSREQ_LOCK)) = (0x00001ffd)
+#define DEF_HBURST_LOCK() (REG32(ADR_HBURST_LOCK)) = (0x00000000)
+#define DEF_PRESCALER_USTIMER() (REG32(ADR_PRESCALER_USTIMER)) = (0x00000028)
+#define DEF_BIST_MODE_REG_IN_MMU() (REG32(ADR_BIST_MODE_REG_IN_MMU)) = (0x0000fe3e)
+#define DEF_BIST_MODE_REG_OUT_MMU() (REG32(ADR_BIST_MODE_REG_OUT_MMU)) = (0x00000000)
+#define DEF_BIST_MONITOR_BUS_MMU() (REG32(ADR_BIST_MONITOR_BUS_MMU)) = (0x00000000)
+#define DEF_TEST_MODE() (REG32(ADR_TEST_MODE)) = (0x00000000)
+#define DEF_BOOT_INFO() (REG32(ADR_BOOT_INFO)) = (0x00000000)
+#define DEF_SD_INIT_CFG() (REG32(ADR_SD_INIT_CFG)) = (0x00000000)
+#define DEF_SPARE_UART_INFO() (REG32(ADR_SPARE_UART_INFO)) = (0x00000000)
+#define DEF_TU0_MICROSECOND_TIMER() (REG32(ADR_TU0_MICROSECOND_TIMER)) = (0x00000000)
+#define DEF_TU0_CURRENT_MICROSECOND_TIME_VALUE() (REG32(ADR_TU0_CURRENT_MICROSECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TU0_DUMMY_BIT_0() (REG32(ADR_TU0_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TU0_DUMMY_BIT_1() (REG32(ADR_TU0_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TU1_MICROSECOND_TIMER() (REG32(ADR_TU1_MICROSECOND_TIMER)) = (0x00000000)
+#define DEF_TU1_CURRENT_MICROSECOND_TIME_VALUE() (REG32(ADR_TU1_CURRENT_MICROSECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TU1_DUMMY_BIT_0() (REG32(ADR_TU1_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TU1_DUMMY_BIT_1() (REG32(ADR_TU1_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TU2_MICROSECOND_TIMER() (REG32(ADR_TU2_MICROSECOND_TIMER)) = (0x00000000)
+#define DEF_TU2_CURRENT_MICROSECOND_TIME_VALUE() (REG32(ADR_TU2_CURRENT_MICROSECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TU2_DUMMY_BIT_0() (REG32(ADR_TU2_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TU2_DUMMY_BIT_1() (REG32(ADR_TU2_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TU3_MICROSECOND_TIMER() (REG32(ADR_TU3_MICROSECOND_TIMER)) = (0x00000000)
+#define DEF_TU3_CURRENT_MICROSECOND_TIME_VALUE() (REG32(ADR_TU3_CURRENT_MICROSECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TU3_DUMMY_BIT_0() (REG32(ADR_TU3_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TU3_DUMMY_BIT_1() (REG32(ADR_TU3_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TM0_MILISECOND_TIMER() (REG32(ADR_TM0_MILISECOND_TIMER)) = (0x00000000)
+#define DEF_TM0_CURRENT_MILISECOND_TIME_VALUE() (REG32(ADR_TM0_CURRENT_MILISECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TM0_DUMMY_BIT_0() (REG32(ADR_TM0_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TM0_DUMMY_BIT_1() (REG32(ADR_TM0_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TM1_MILISECOND_TIMER() (REG32(ADR_TM1_MILISECOND_TIMER)) = (0x00000000)
+#define DEF_TM1_CURRENT_MILISECOND_TIME_VALUE() (REG32(ADR_TM1_CURRENT_MILISECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TM1_DUMMY_BIT_0() (REG32(ADR_TM1_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TM1_DUMMY_BIT_1() (REG32(ADR_TM1_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TM2_MILISECOND_TIMER() (REG32(ADR_TM2_MILISECOND_TIMER)) = (0x00000000)
+#define DEF_TM2_CURRENT_MILISECOND_TIME_VALUE() (REG32(ADR_TM2_CURRENT_MILISECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TM2_DUMMY_BIT_0() (REG32(ADR_TM2_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TM2_DUMMY_BIT_1() (REG32(ADR_TM2_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_TM3_MILISECOND_TIMER() (REG32(ADR_TM3_MILISECOND_TIMER)) = (0x00000000)
+#define DEF_TM3_CURRENT_MILISECOND_TIME_VALUE() (REG32(ADR_TM3_CURRENT_MILISECOND_TIME_VALUE)) = (0x00000000)
+#define DEF_TM3_DUMMY_BIT_0() (REG32(ADR_TM3_DUMMY_BIT_0)) = (0x00000000)
+#define DEF_TM3_DUMMY_BIT_1() (REG32(ADR_TM3_DUMMY_BIT_1)) = (0x00000000)
+#define DEF_MCU_WDOG_REG() (REG32(ADR_MCU_WDOG_REG)) = (0x00000000)
+#define DEF_SYS_WDOG_REG() (REG32(ADR_SYS_WDOG_REG)) = (0x00000000)
+#define DEF_PAD6() (REG32(ADR_PAD6)) = (0x00000008)
+#define DEF_PAD7() (REG32(ADR_PAD7)) = (0x00000008)
+#define DEF_PAD8() (REG32(ADR_PAD8)) = (0x00000008)
+#define DEF_PAD9() (REG32(ADR_PAD9)) = (0x00000008)
+#define DEF_PAD11() (REG32(ADR_PAD11)) = (0x00000008)
+#define DEF_PAD15() (REG32(ADR_PAD15)) = (0x0000000a)
+#define DEF_PAD16() (REG32(ADR_PAD16)) = (0x0000000a)
+#define DEF_PAD17() (REG32(ADR_PAD17)) = (0x0000000a)
+#define DEF_PAD18() (REG32(ADR_PAD18)) = (0x0000000a)
+#define DEF_PAD19() (REG32(ADR_PAD19)) = (0x00007000)
+#define DEF_PAD20() (REG32(ADR_PAD20)) = (0x0000000a)
+#define DEF_PAD21() (REG32(ADR_PAD21)) = (0x0000000a)
+#define DEF_PAD22() (REG32(ADR_PAD22)) = (0x00000009)
+#define DEF_PAD24() (REG32(ADR_PAD24)) = (0x00000008)
+#define DEF_PAD25() (REG32(ADR_PAD25)) = (0x0000000b)
+#define DEF_PAD27() (REG32(ADR_PAD27)) = (0x00000008)
+#define DEF_PAD28() (REG32(ADR_PAD28)) = (0x00000008)
+#define DEF_PAD29() (REG32(ADR_PAD29)) = (0x00000009)
+#define DEF_PAD30() (REG32(ADR_PAD30)) = (0x0000000a)
+#define DEF_PAD31() (REG32(ADR_PAD31)) = (0x0000000a)
+#define DEF_PAD32() (REG32(ADR_PAD32)) = (0x0000000a)
+#define DEF_PAD33() (REG32(ADR_PAD33)) = (0x0000000a)
+#define DEF_PAD34() (REG32(ADR_PAD34)) = (0x0000000a)
+#define DEF_PAD42() (REG32(ADR_PAD42)) = (0x0000000a)
+#define DEF_PAD43() (REG32(ADR_PAD43)) = (0x0000000a)
+#define DEF_PAD44() (REG32(ADR_PAD44)) = (0x0000000a)
+#define DEF_PAD45() (REG32(ADR_PAD45)) = (0x0000000a)
+#define DEF_PAD46() (REG32(ADR_PAD46)) = (0x0000000a)
+#define DEF_PAD47() (REG32(ADR_PAD47)) = (0x00100000)
+#define DEF_PAD48() (REG32(ADR_PAD48)) = (0x00100808)
+#define DEF_PAD49() (REG32(ADR_PAD49)) = (0x00100008)
+#define DEF_PAD50() (REG32(ADR_PAD50)) = (0x00100008)
+#define DEF_PAD51() (REG32(ADR_PAD51)) = (0x00100008)
+#define DEF_PAD52() (REG32(ADR_PAD52)) = (0x00100000)
+#define DEF_PAD53() (REG32(ADR_PAD53)) = (0x0000000a)
+#define DEF_PAD54() (REG32(ADR_PAD54)) = (0x00000000)
+#define DEF_PAD56() (REG32(ADR_PAD56)) = (0x00000000)
+#define DEF_PAD57() (REG32(ADR_PAD57)) = (0x00000008)
+#define DEF_PAD58() (REG32(ADR_PAD58)) = (0x0000000a)
+#define DEF_PAD59() (REG32(ADR_PAD59)) = (0x0000000a)
+#define DEF_PAD60() (REG32(ADR_PAD60)) = (0x0000000a)
+#define DEF_PAD61() (REG32(ADR_PAD61)) = (0x0000000a)
+#define DEF_PAD62() (REG32(ADR_PAD62)) = (0x0000000a)
+#define DEF_PAD64() (REG32(ADR_PAD64)) = (0x00000009)
+#define DEF_PAD65() (REG32(ADR_PAD65)) = (0x00000009)
+#define DEF_PAD66() (REG32(ADR_PAD66)) = (0x00000008)
+#define DEF_PAD68() (REG32(ADR_PAD68)) = (0x00000008)
+#define DEF_PAD67() (REG32(ADR_PAD67)) = (0x00000159)
+#define DEF_PAD69() (REG32(ADR_PAD69)) = (0x0000000b)
+#define DEF_PAD70() (REG32(ADR_PAD70)) = (0x00000008)
+#define DEF_PAD231() (REG32(ADR_PAD231)) = (0x00000008)
+#define DEF_PIN_SEL_0() (REG32(ADR_PIN_SEL_0)) = (0x00000000)
+#define DEF_PIN_SEL_1() (REG32(ADR_PIN_SEL_1)) = (0x00000000)
+#define DEF_IO_PORT_REG() (REG32(ADR_IO_PORT_REG)) = (0x00010000)
+#define DEF_INT_MASK_REG() (REG32(ADR_INT_MASK_REG)) = (0x000000ff)
+#define DEF_INT_STATUS_REG() (REG32(ADR_INT_STATUS_REG)) = (0x00000000)
+#define DEF_FN1_STATUS_REG() (REG32(ADR_FN1_STATUS_REG)) = (0x00000000)
+#define DEF_CARD_PKT_STATUS_TEST() (REG32(ADR_CARD_PKT_STATUS_TEST)) = (0x00000000)
+#define DEF_SYSTEM_INFORMATION_REG() (REG32(ADR_SYSTEM_INFORMATION_REG)) = (0x00000000)
+#define DEF_CARD_RCA_REG() (REG32(ADR_CARD_RCA_REG)) = (0x00000000)
+#define DEF_SDIO_FIFO_WR_THLD_REG() (REG32(ADR_SDIO_FIFO_WR_THLD_REG)) = (0x00000000)
+#define DEF_SDIO_FIFO_WR_LIMIT_REG() (REG32(ADR_SDIO_FIFO_WR_LIMIT_REG)) = (0x00000000)
+#define DEF_SDIO_TX_DATA_BATCH_SIZE_REG() (REG32(ADR_SDIO_TX_DATA_BATCH_SIZE_REG)) = (0x00000000)
+#define DEF_SDIO_THLD_FOR_CMD53RD_REG() (REG32(ADR_SDIO_THLD_FOR_CMD53RD_REG)) = (0x00000000)
+#define DEF_SDIO_RX_DATA_BATCH_SIZE_REG() (REG32(ADR_SDIO_RX_DATA_BATCH_SIZE_REG)) = (0x00000000)
+#define DEF_SDIO_LOG_START_END_DATA_REG() (REG32(ADR_SDIO_LOG_START_END_DATA_REG)) = (0x00000000)
+#define DEF_SDIO_BYTE_MODE_BATCH_SIZE_REG() (REG32(ADR_SDIO_BYTE_MODE_BATCH_SIZE_REG)) = (0x00000000)
+#define DEF_SDIO_LAST_CMD_INDEX_CRC_REG() (REG32(ADR_SDIO_LAST_CMD_INDEX_CRC_REG)) = (0x00000000)
+#define DEF_SDIO_LAST_CMD_ARG_REG() (REG32(ADR_SDIO_LAST_CMD_ARG_REG)) = (0x00000000)
+#define DEF_SDIO_BUS_STATE_DEBUG_MONITOR() (REG32(ADR_SDIO_BUS_STATE_DEBUG_MONITOR)) = (0x00000000)
+#define DEF_SDIO_CARD_STATUS_REG() (REG32(ADR_SDIO_CARD_STATUS_REG)) = (0x00000000)
+#define DEF_R5_RESP_FLAG_OUT_TIMING() (REG32(ADR_R5_RESP_FLAG_OUT_TIMING)) = (0x00000000)
+#define DEF_CMD52_DATA_FOR_LAST_TIME() (REG32(ADR_CMD52_DATA_FOR_LAST_TIME)) = (0x00000000)
+#define DEF_FN1_DMA_START_ADDR_REG() (REG32(ADR_FN1_DMA_START_ADDR_REG)) = (0x00000000)
+#define DEF_FN1_INT_CTRL_RESET() (REG32(ADR_FN1_INT_CTRL_RESET)) = (0x00000000)
+#define DEF_IO_REG_PORT_REG() (REG32(ADR_IO_REG_PORT_REG)) = (0x00010020)
+#define DEF_SDIO_FIFO_ERROR_CNT() (REG32(ADR_SDIO_FIFO_ERROR_CNT)) = (0x00000000)
+#define DEF_SDIO_CRC7_CRC16_ERROR_REG() (REG32(ADR_SDIO_CRC7_CRC16_ERROR_REG)) = (0x00000000)
+#define DEF_SDIO_BLOCK_CNT_INFO() (REG32(ADR_SDIO_BLOCK_CNT_INFO)) = (0x00000000)
+#define DEF_RX_DATA_CMD52_ABORT_COUNT() (REG32(ADR_RX_DATA_CMD52_ABORT_COUNT)) = (0x00000000)
+#define DEF_FIFO_PTR_READ_BLOCK_CNT() (REG32(ADR_FIFO_PTR_READ_BLOCK_CNT)) = (0x00000000)
+#define DEF_TX_TIME_OUT_READ_CTRL() (REG32(ADR_TX_TIME_OUT_READ_CTRL)) = (0x00000000)
+#define DEF_SDIO_TX_ALLOC_REG() (REG32(ADR_SDIO_TX_ALLOC_REG)) = (0x00000000)
+#define DEF_SDIO_TX_INFORM() (REG32(ADR_SDIO_TX_INFORM)) = (0x00000000)
+#define DEF_F1_BLOCK_SIZE_0_REG() (REG32(ADR_F1_BLOCK_SIZE_0_REG)) = (0x00000000)
+#define DEF_SDIO_COMMAND_LOG_DATA_31_0() (REG32(ADR_SDIO_COMMAND_LOG_DATA_31_0)) = (0x000000ec)
+#define DEF_SDIO_COMMAND_LOG_DATA_63_32() (REG32(ADR_SDIO_COMMAND_LOG_DATA_63_32)) = (0xce000000)
+#define DEF_SYSTEM_INFORMATION_REGISTER() (REG32(ADR_SYSTEM_INFORMATION_REGISTER)) = (0x00000000)
+#define DEF_CCCR_00H_REG() (REG32(ADR_CCCR_00H_REG)) = (0x00000000)
+#define DEF_CCCR_04H_REG() (REG32(ADR_CCCR_04H_REG)) = (0x00000000)
+#define DEF_CCCR_08H_REG() (REG32(ADR_CCCR_08H_REG)) = (0x00000000)
+#define DEF_CCCR_13H_REG() (REG32(ADR_CCCR_13H_REG)) = (0x00000000)
+#define DEF_FBR_100H_REG() (REG32(ADR_FBR_100H_REG)) = (0x00000000)
+#define DEF_FBR_109H_REG() (REG32(ADR_FBR_109H_REG)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_0() (REG32(ADR_F0_CIS_CONTENT_REG_0)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_1() (REG32(ADR_F0_CIS_CONTENT_REG_1)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_2() (REG32(ADR_F0_CIS_CONTENT_REG_2)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_3() (REG32(ADR_F0_CIS_CONTENT_REG_3)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_4() (REG32(ADR_F0_CIS_CONTENT_REG_4)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_5() (REG32(ADR_F0_CIS_CONTENT_REG_5)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_6() (REG32(ADR_F0_CIS_CONTENT_REG_6)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_7() (REG32(ADR_F0_CIS_CONTENT_REG_7)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_8() (REG32(ADR_F0_CIS_CONTENT_REG_8)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_9() (REG32(ADR_F0_CIS_CONTENT_REG_9)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_10() (REG32(ADR_F0_CIS_CONTENT_REG_10)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_11() (REG32(ADR_F0_CIS_CONTENT_REG_11)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_12() (REG32(ADR_F0_CIS_CONTENT_REG_12)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_13() (REG32(ADR_F0_CIS_CONTENT_REG_13)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_14() (REG32(ADR_F0_CIS_CONTENT_REG_14)) = (0x00000000)
+#define DEF_F0_CIS_CONTENT_REG_15() (REG32(ADR_F0_CIS_CONTENT_REG_15)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_0() (REG32(ADR_F1_CIS_CONTENT_REG_0)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_1() (REG32(ADR_F1_CIS_CONTENT_REG_1)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_2() (REG32(ADR_F1_CIS_CONTENT_REG_2)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_3() (REG32(ADR_F1_CIS_CONTENT_REG_3)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_4() (REG32(ADR_F1_CIS_CONTENT_REG_4)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_5() (REG32(ADR_F1_CIS_CONTENT_REG_5)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_6() (REG32(ADR_F1_CIS_CONTENT_REG_6)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_7() (REG32(ADR_F1_CIS_CONTENT_REG_7)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_8() (REG32(ADR_F1_CIS_CONTENT_REG_8)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_9() (REG32(ADR_F1_CIS_CONTENT_REG_9)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_10() (REG32(ADR_F1_CIS_CONTENT_REG_10)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_11() (REG32(ADR_F1_CIS_CONTENT_REG_11)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_12() (REG32(ADR_F1_CIS_CONTENT_REG_12)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_13() (REG32(ADR_F1_CIS_CONTENT_REG_13)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_14() (REG32(ADR_F1_CIS_CONTENT_REG_14)) = (0x00000000)
+#define DEF_F1_CIS_CONTENT_REG_15() (REG32(ADR_F1_CIS_CONTENT_REG_15)) = (0x00000000)
+#define DEF_SPI_MODE() (REG32(ADR_SPI_MODE)) = (0x00000000)
+#define DEF_RX_QUOTA() (REG32(ADR_RX_QUOTA)) = (0x00000000)
+#define DEF_CONDITION_NUMBER() (REG32(ADR_CONDITION_NUMBER)) = (0x00000004)
+#define DEF_HOST_PATH() (REG32(ADR_HOST_PATH)) = (0x00000001)
+#define DEF_TX_SEG() (REG32(ADR_TX_SEG)) = (0x00000000)
+#define DEF_DEBUG_BURST_MODE() (REG32(ADR_DEBUG_BURST_MODE)) = (0x00000000)
+#define DEF_SPI_TO_PHY_PARAM1() (REG32(ADR_SPI_TO_PHY_PARAM1)) = (0x000e0006)
+#define DEF_SPI_TO_PHY_PARAM2() (REG32(ADR_SPI_TO_PHY_PARAM2)) = (0x000e000e)
+#define DEF_SPI_STS() (REG32(ADR_SPI_STS)) = (0x00000000)
+#define DEF_TX_ALLOC_SET() (REG32(ADR_TX_ALLOC_SET)) = (0x00000000)
+#define DEF_TX_ALLOC() (REG32(ADR_TX_ALLOC)) = (0x00000000)
+#define DEF_DBG_CNT() (REG32(ADR_DBG_CNT)) = (0x00000000)
+#define DEF_DBG_CNT2() (REG32(ADR_DBG_CNT2)) = (0x00000000)
+#define DEF_DBG_CNT3() (REG32(ADR_DBG_CNT3)) = (0x00000000)
+#define DEF_DBG_CNT4() (REG32(ADR_DBG_CNT4)) = (0x00000000)
+#define DEF_INT_TAG() (REG32(ADR_INT_TAG)) = (0x00000000)
+#define DEF_I2CM_EN() (REG32(ADR_I2CM_EN)) = (0x00000074)
+#define DEF_I2CM_DEV_A() (REG32(ADR_I2CM_DEV_A)) = (0x00008000)
+#define DEF_I2CM_LEN() (REG32(ADR_I2CM_LEN)) = (0x00000000)
+#define DEF_I2CM_WDAT() (REG32(ADR_I2CM_WDAT)) = (0x00000000)
+#define DEF_I2CM_RDAT() (REG32(ADR_I2CM_RDAT)) = (0x00000000)
+#define DEF_I2CM_EN_2() (REG32(ADR_I2CM_EN_2)) = (0x00010000)
+#define DEF_UART_DATA() (REG32(ADR_UART_DATA)) = (0x00000000)
+#define DEF_UART_IER() (REG32(ADR_UART_IER)) = (0x00000000)
+#define DEF_UART_FCR() (REG32(ADR_UART_FCR)) = (0x00000001)
+#define DEF_UART_LCR() (REG32(ADR_UART_LCR)) = (0x00000003)
+#define DEF_UART_MCR() (REG32(ADR_UART_MCR)) = (0x00000000)
+#define DEF_UART_LSR() (REG32(ADR_UART_LSR)) = (0x00000000)
+#define DEF_UART_MSR() (REG32(ADR_UART_MSR)) = (0x00000000)
+#define DEF_UART_SPR() (REG32(ADR_UART_SPR)) = (0x00000000)
+#define DEF_UART_RTHR() (REG32(ADR_UART_RTHR)) = (0x000000c8)
+#define DEF_UART_ISR() (REG32(ADR_UART_ISR)) = (0x000000c1)
+#define DEF_DAT_UART_DATA() (REG32(ADR_DAT_UART_DATA)) = (0x00000000)
+#define DEF_DAT_UART_IER() (REG32(ADR_DAT_UART_IER)) = (0x00000000)
+#define DEF_DAT_UART_FCR() (REG32(ADR_DAT_UART_FCR)) = (0x00000001)
+#define DEF_DAT_UART_LCR() (REG32(ADR_DAT_UART_LCR)) = (0x00000003)
+#define DEF_DAT_UART_MCR() (REG32(ADR_DAT_UART_MCR)) = (0x00000000)
+#define DEF_DAT_UART_LSR() (REG32(ADR_DAT_UART_LSR)) = (0x00000000)
+#define DEF_DAT_UART_MSR() (REG32(ADR_DAT_UART_MSR)) = (0x00000000)
+#define DEF_DAT_UART_SPR() (REG32(ADR_DAT_UART_SPR)) = (0x00000000)
+#define DEF_DAT_UART_RTHR() (REG32(ADR_DAT_UART_RTHR)) = (0x000000c8)
+#define DEF_DAT_UART_ISR() (REG32(ADR_DAT_UART_ISR)) = (0x000000c1)
+#define DEF_INT_MASK() (REG32(ADR_INT_MASK)) = (0xffffffff)
+#define DEF_INT_MODE() (REG32(ADR_INT_MODE)) = (0x00000000)
+#define DEF_INT_IRQ_STS() (REG32(ADR_INT_IRQ_STS)) = (0x00000000)
+#define DEF_INT_FIQ_STS() (REG32(ADR_INT_FIQ_STS)) = (0x00000000)
+#define DEF_INT_IRQ_RAW() (REG32(ADR_INT_IRQ_RAW)) = (0x00000000)
+#define DEF_INT_FIQ_RAW() (REG32(ADR_INT_FIQ_RAW)) = (0x00000000)
+#define DEF_INT_PERI_MASK() (REG32(ADR_INT_PERI_MASK)) = (0xffffffff)
+#define DEF_INT_PERI_STS() (REG32(ADR_INT_PERI_STS)) = (0x00000000)
+#define DEF_INT_PERI_RAW() (REG32(ADR_INT_PERI_RAW)) = (0x00000000)
+#define DEF_INT_GPI_CFG() (REG32(ADR_INT_GPI_CFG)) = (0x00000000)
+#define DEF_SYS_INT_FOR_HOST() (REG32(ADR_SYS_INT_FOR_HOST)) = (0x00000001)
+#define DEF_SPI_IPC() (REG32(ADR_SPI_IPC)) = (0x00000000)
+#define DEF_SDIO_IPC() (REG32(ADR_SDIO_IPC)) = (0x00000000)
+#define DEF_SDIO_MASK() (REG32(ADR_SDIO_MASK)) = (0xffffffff)
+#define DEF_SDIO_IRQ_STS() (REG32(ADR_SDIO_IRQ_STS)) = (0x00000000)
+#define DEF_SD_PERI_MASK() (REG32(ADR_SD_PERI_MASK)) = (0xffffffff)
+#define DEF_SD_PERI_STS() (REG32(ADR_SD_PERI_STS)) = (0x00000000)
+#define DEF_DBG_SPI_MODE() (REG32(ADR_DBG_SPI_MODE)) = (0x00000000)
+#define DEF_DBG_RX_QUOTA() (REG32(ADR_DBG_RX_QUOTA)) = (0x00000000)
+#define DEF_DBG_CONDITION_NUMBER() (REG32(ADR_DBG_CONDITION_NUMBER)) = (0x00000004)
+#define DEF_DBG_HOST_PATH() (REG32(ADR_DBG_HOST_PATH)) = (0x00000001)
+#define DEF_DBG_TX_SEG() (REG32(ADR_DBG_TX_SEG)) = (0x00000000)
+#define DEF_DBG_DEBUG_BURST_MODE() (REG32(ADR_DBG_DEBUG_BURST_MODE)) = (0x00000000)
+#define DEF_DBG_SPI_TO_PHY_PARAM1() (REG32(ADR_DBG_SPI_TO_PHY_PARAM1)) = (0x000e0006)
+#define DEF_DBG_SPI_TO_PHY_PARAM2() (REG32(ADR_DBG_SPI_TO_PHY_PARAM2)) = (0x000e000e)
+#define DEF_DBG_SPI_STS() (REG32(ADR_DBG_SPI_STS)) = (0x00000000)
+#define DEF_DBG_TX_ALLOC_SET() (REG32(ADR_DBG_TX_ALLOC_SET)) = (0x00000000)
+#define DEF_DBG_TX_ALLOC() (REG32(ADR_DBG_TX_ALLOC)) = (0x00000000)
+#define DEF_DBG_DBG_CNT() (REG32(ADR_DBG_DBG_CNT)) = (0x00000000)
+#define DEF_DBG_DBG_CNT2() (REG32(ADR_DBG_DBG_CNT2)) = (0x00000000)
+#define DEF_DBG_DBG_CNT3() (REG32(ADR_DBG_DBG_CNT3)) = (0x00000000)
+#define DEF_DBG_DBG_CNT4() (REG32(ADR_DBG_DBG_CNT4)) = (0x00000000)
+#define DEF_DBG_INT_TAG() (REG32(ADR_DBG_INT_TAG)) = (0x00000000)
+#define DEF_BOOT_ADDR() (REG32(ADR_BOOT_ADDR)) = (0x00000000)
+#define DEF_VERIFY_DATA() (REG32(ADR_VERIFY_DATA)) = (0x5e11aa11)
+#define DEF_FLASH_ADDR() (REG32(ADR_FLASH_ADDR)) = (0x00000000)
+#define DEF_SRAM_ADDR() (REG32(ADR_SRAM_ADDR)) = (0x00000000)
+#define DEF_LEN() (REG32(ADR_LEN)) = (0x00000000)
+#define DEF_SPI_PARAM() (REG32(ADR_SPI_PARAM)) = (0x000f000f)
+#define DEF_SPI_PARAM2() (REG32(ADR_SPI_PARAM2)) = (0x00040001)
+#define DEF_CHECK_SUM_RESULT() (REG32(ADR_CHECK_SUM_RESULT)) = (0x00000000)
+#define DEF_CHECK_SUM_IN_FILE() (REG32(ADR_CHECK_SUM_IN_FILE)) = (0x00000000)
+#define DEF_COMMAND_LEN() (REG32(ADR_COMMAND_LEN)) = (0x00000000)
+#define DEF_COMMAND_ADDR() (REG32(ADR_COMMAND_ADDR)) = (0x00000000)
+#define DEF_DMA_ADR_SRC() (REG32(ADR_DMA_ADR_SRC)) = (0x00000000)
+#define DEF_DMA_ADR_DST() (REG32(ADR_DMA_ADR_DST)) = (0x00000000)
+#define DEF_DMA_CTRL() (REG32(ADR_DMA_CTRL)) = (0x000000aa)
+#define DEF_DMA_INT() (REG32(ADR_DMA_INT)) = (0x00000001)
+#define DEF_DMA_FILL_CONST() (REG32(ADR_DMA_FILL_CONST)) = (0x00000000)
+#define DEF_PMU_0() (REG32(ADR_PMU_0)) = (0x0f000040)
+#define DEF_PMU_1() (REG32(ADR_PMU_1)) = (0x015d015d)
+#define DEF_PMU_2() (REG32(ADR_PMU_2)) = (0x00000000)
+#define DEF_PMU_3() (REG32(ADR_PMU_3)) = (0x55550000)
+#define DEF_RTC_1() (REG32(ADR_RTC_1)) = (0x7fff0000)
+#define DEF_RTC_2() (REG32(ADR_RTC_2)) = (0x00000003)
+#define DEF_RTC_3W() (REG32(ADR_RTC_3W)) = (0x00000000)
+#define DEF_RTC_3R() (REG32(ADR_RTC_3R)) = (0x00000000)
+#define DEF_RTC_4() (REG32(ADR_RTC_4)) = (0x00000000)
+#define DEF_D2_DMA_ADR_SRC() (REG32(ADR_D2_DMA_ADR_SRC)) = (0x00000000)
+#define DEF_D2_DMA_ADR_DST() (REG32(ADR_D2_DMA_ADR_DST)) = (0x00000000)
+#define DEF_D2_DMA_CTRL() (REG32(ADR_D2_DMA_CTRL)) = (0x000000aa)
+#define DEF_D2_DMA_INT() (REG32(ADR_D2_DMA_INT)) = (0x00000001)
+#define DEF_D2_DMA_FILL_CONST() (REG32(ADR_D2_DMA_FILL_CONST)) = (0x00000000)
+#define DEF_CONTROL() (REG32(ADR_CONTROL)) = (0x02700008)
+#define DEF_SDIO_WAKE_MODE() (REG32(ADR_SDIO_WAKE_MODE)) = (0x00000000)
+#define DEF_TX_FLOW_0() (REG32(ADR_TX_FLOW_0)) = (0x00000000)
+#define DEF_TX_FLOW_1() (REG32(ADR_TX_FLOW_1)) = (0x00000000)
+#define DEF_THREASHOLD() (REG32(ADR_THREASHOLD)) = (0x09000000)
+#define DEF_TXFID_INCREASE() (REG32(ADR_TXFID_INCREASE)) = (0x00000000)
+#define DEF_GLOBAL_SEQUENCE() (REG32(ADR_GLOBAL_SEQUENCE)) = (0x00000000)
+#define DEF_HCI_TX_RX_INFO_SIZE() (REG32(ADR_HCI_TX_RX_INFO_SIZE)) = (0x00040450)
+#define DEF_HCI_TX_INFO_CLEAR() (REG32(ADR_HCI_TX_INFO_CLEAR)) = (0x00000008)
+#define DEF_TX_ETHER_TYPE_0() (REG32(ADR_TX_ETHER_TYPE_0)) = (0x00000000)
+#define DEF_TX_ETHER_TYPE_1() (REG32(ADR_TX_ETHER_TYPE_1)) = (0x00000000)
+#define DEF_RX_ETHER_TYPE_0() (REG32(ADR_RX_ETHER_TYPE_0)) = (0x00000000)
+#define DEF_RX_ETHER_TYPE_1() (REG32(ADR_RX_ETHER_TYPE_1)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_0() (REG32(ADR_PACKET_COUNTER_INFO_0)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_1() (REG32(ADR_PACKET_COUNTER_INFO_1)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_2() (REG32(ADR_PACKET_COUNTER_INFO_2)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_3() (REG32(ADR_PACKET_COUNTER_INFO_3)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_4() (REG32(ADR_PACKET_COUNTER_INFO_4)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_5() (REG32(ADR_PACKET_COUNTER_INFO_5)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_6() (REG32(ADR_PACKET_COUNTER_INFO_6)) = (0x00000000)
+#define DEF_PACKET_COUNTER_INFO_7() (REG32(ADR_PACKET_COUNTER_INFO_7)) = (0x00000000)
+#define DEF_SDIO_TX_RX_FAIL_COUNTER_0() (REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_0)) = (0x00000000)
+#define DEF_SDIO_TX_RX_FAIL_COUNTER_1() (REG32(ADR_SDIO_TX_RX_FAIL_COUNTER_1)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_0() (REG32(ADR_HCI_STATE_DEBUG_MODE_0)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_1() (REG32(ADR_HCI_STATE_DEBUG_MODE_1)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_2() (REG32(ADR_HCI_STATE_DEBUG_MODE_2)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_3() (REG32(ADR_HCI_STATE_DEBUG_MODE_3)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_4() (REG32(ADR_HCI_STATE_DEBUG_MODE_4)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_5() (REG32(ADR_HCI_STATE_DEBUG_MODE_5)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_6() (REG32(ADR_HCI_STATE_DEBUG_MODE_6)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_7() (REG32(ADR_HCI_STATE_DEBUG_MODE_7)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_8() (REG32(ADR_HCI_STATE_DEBUG_MODE_8)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_9() (REG32(ADR_HCI_STATE_DEBUG_MODE_9)) = (0x00000000)
+#define DEF_HCI_STATE_DEBUG_MODE_10() (REG32(ADR_HCI_STATE_DEBUG_MODE_10)) = (0x00000000)
+#define DEF_CS_START_ADDR() (REG32(ADR_CS_START_ADDR)) = (0x00000000)
+#define DEF_CS_ADD_LEN() (REG32(ADR_CS_ADD_LEN)) = (0x00000000)
+#define DEF_CS_CMD() (REG32(ADR_CS_CMD)) = (0x00000000)
+#define DEF_CS_INI_BUF() (REG32(ADR_CS_INI_BUF)) = (0x00000000)
+#define DEF_CS_PSEUDO_BUF() (REG32(ADR_CS_PSEUDO_BUF)) = (0x00000000)
+#define DEF_CS_CHECK_SUM() (REG32(ADR_CS_CHECK_SUM)) = (0x00000000)
+#define DEF_RAND_EN() (REG32(ADR_RAND_EN)) = (0x00000000)
+#define DEF_RAND_NUM() (REG32(ADR_RAND_NUM)) = (0x00000000)
+#define DEF_MUL_OP1() (REG32(ADR_MUL_OP1)) = (0x00000000)
+#define DEF_MUL_OP2() (REG32(ADR_MUL_OP2)) = (0x00000000)
+#define DEF_MUL_ANS0() (REG32(ADR_MUL_ANS0)) = (0x00000000)
+#define DEF_MUL_ANS1() (REG32(ADR_MUL_ANS1)) = (0x00000000)
+#define DEF_DMA_RDATA() (REG32(ADR_DMA_RDATA)) = (0x00000000)
+#define DEF_DMA_WDATA() (REG32(ADR_DMA_WDATA)) = (0x00000000)
+#define DEF_DMA_LEN() (REG32(ADR_DMA_LEN)) = (0x00000000)
+#define DEF_DMA_CLR() (REG32(ADR_DMA_CLR)) = (0x00000000)
+#define DEF_NAV_DATA() (REG32(ADR_NAV_DATA)) = (0x00000000)
+#define DEF_CO_NAV() (REG32(ADR_CO_NAV)) = (0x00000000)
+#define DEF_SHA_DST_ADDR() (REG32(ADR_SHA_DST_ADDR)) = (0x00000000)
+#define DEF_SHA_SRC_ADDR() (REG32(ADR_SHA_SRC_ADDR)) = (0x00000000)
+#define DEF_SHA_SETTING() (REG32(ADR_SHA_SETTING)) = (0x00000002)
+#define DEF_EFUSE_CLK_FREQ() (REG32(ADR_EFUSE_CLK_FREQ)) = (0x610100d0)
+#define DEF_EFUSE_LDO_TIME() (REG32(ADR_EFUSE_LDO_TIME)) = (0x00020002)
+#define DEF_EFUSE_AHB_RDATA_0() (REG32(ADR_EFUSE_AHB_RDATA_0)) = (0x00000000)
+#define DEF_EFUSE_WDATA_0() (REG32(ADR_EFUSE_WDATA_0)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_1() (REG32(ADR_EFUSE_AHB_RDATA_1)) = (0x00000000)
+#define DEF_EFUSE_WDATA_1() (REG32(ADR_EFUSE_WDATA_1)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_2() (REG32(ADR_EFUSE_AHB_RDATA_2)) = (0x00000000)
+#define DEF_EFUSE_WDATA_2() (REG32(ADR_EFUSE_WDATA_2)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_3() (REG32(ADR_EFUSE_AHB_RDATA_3)) = (0x00000000)
+#define DEF_EFUSE_WDATA_3() (REG32(ADR_EFUSE_WDATA_3)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_4() (REG32(ADR_EFUSE_AHB_RDATA_4)) = (0x00000000)
+#define DEF_EFUSE_WDATA_4() (REG32(ADR_EFUSE_WDATA_4)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_5() (REG32(ADR_EFUSE_AHB_RDATA_5)) = (0x00000000)
+#define DEF_EFUSE_WDATA_5() (REG32(ADR_EFUSE_WDATA_5)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_6() (REG32(ADR_EFUSE_AHB_RDATA_6)) = (0x00000000)
+#define DEF_EFUSE_WDATA_6() (REG32(ADR_EFUSE_WDATA_6)) = (0x00000000)
+#define DEF_EFUSE_AHB_RDATA_7() (REG32(ADR_EFUSE_AHB_RDATA_7)) = (0x00000000)
+#define DEF_EFUSE_WDATA_7() (REG32(ADR_EFUSE_WDATA_7)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD0_EN() (REG32(ADR_EFUSE_SPI_RD0_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD1_EN() (REG32(ADR_EFUSE_SPI_RD1_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD2_EN() (REG32(ADR_EFUSE_SPI_RD2_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD3_EN() (REG32(ADR_EFUSE_SPI_RD3_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD4_EN() (REG32(ADR_EFUSE_SPI_RD4_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD5_EN() (REG32(ADR_EFUSE_SPI_RD5_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD6_EN() (REG32(ADR_EFUSE_SPI_RD6_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_RD7_EN() (REG32(ADR_EFUSE_SPI_RD7_EN)) = (0x00000000)
+#define DEF_EFUSE_SPI_BUSY() (REG32(ADR_EFUSE_SPI_BUSY)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_0() (REG32(ADR_EFUSE_SPI_RDATA_0)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_1() (REG32(ADR_EFUSE_SPI_RDATA_1)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_2() (REG32(ADR_EFUSE_SPI_RDATA_2)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_3() (REG32(ADR_EFUSE_SPI_RDATA_3)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_4() (REG32(ADR_EFUSE_SPI_RDATA_4)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_5() (REG32(ADR_EFUSE_SPI_RDATA_5)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_6() (REG32(ADR_EFUSE_SPI_RDATA_6)) = (0x00000000)
+#define DEF_EFUSE_SPI_RDATA_7() (REG32(ADR_EFUSE_SPI_RDATA_7)) = (0x00000000)
+#define DEF_SMS4_CFG1() (REG32(ADR_SMS4_CFG1)) = (0x00000002)
+#define DEF_SMS4_CFG2() (REG32(ADR_SMS4_CFG2)) = (0x00000000)
+#define DEF_SMS4_MODE1() (REG32(ADR_SMS4_MODE1)) = (0x00000000)
+#define DEF_SMS4_TRIG() (REG32(ADR_SMS4_TRIG)) = (0x00000000)
+#define DEF_SMS4_STATUS1() (REG32(ADR_SMS4_STATUS1)) = (0x00000000)
+#define DEF_SMS4_STATUS2() (REG32(ADR_SMS4_STATUS2)) = (0x00000000)
+#define DEF_SMS4_DATA_IN0() (REG32(ADR_SMS4_DATA_IN0)) = (0x00000000)
+#define DEF_SMS4_DATA_IN1() (REG32(ADR_SMS4_DATA_IN1)) = (0x00000000)
+#define DEF_SMS4_DATA_IN2() (REG32(ADR_SMS4_DATA_IN2)) = (0x00000000)
+#define DEF_SMS4_DATA_IN3() (REG32(ADR_SMS4_DATA_IN3)) = (0x00000000)
+#define DEF_SMS4_DATA_OUT0() (REG32(ADR_SMS4_DATA_OUT0)) = (0x00000000)
+#define DEF_SMS4_DATA_OUT1() (REG32(ADR_SMS4_DATA_OUT1)) = (0x00000000)
+#define DEF_SMS4_DATA_OUT2() (REG32(ADR_SMS4_DATA_OUT2)) = (0x00000000)
+#define DEF_SMS4_DATA_OUT3() (REG32(ADR_SMS4_DATA_OUT3)) = (0x00000000)
+#define DEF_SMS4_KEY_0() (REG32(ADR_SMS4_KEY_0)) = (0x00000000)
+#define DEF_SMS4_KEY_1() (REG32(ADR_SMS4_KEY_1)) = (0x00000000)
+#define DEF_SMS4_KEY_2() (REG32(ADR_SMS4_KEY_2)) = (0x00000000)
+#define DEF_SMS4_KEY_3() (REG32(ADR_SMS4_KEY_3)) = (0x00000000)
+#define DEF_SMS4_MODE_IV0() (REG32(ADR_SMS4_MODE_IV0)) = (0x00000000)
+#define DEF_SMS4_MODE_IV1() (REG32(ADR_SMS4_MODE_IV1)) = (0x00000000)
+#define DEF_SMS4_MODE_IV2() (REG32(ADR_SMS4_MODE_IV2)) = (0x00000000)
+#define DEF_SMS4_MODE_IV3() (REG32(ADR_SMS4_MODE_IV3)) = (0x00000000)
+#define DEF_SMS4_OFB_ENC0() (REG32(ADR_SMS4_OFB_ENC0)) = (0x00000000)
+#define DEF_SMS4_OFB_ENC1() (REG32(ADR_SMS4_OFB_ENC1)) = (0x00000000)
+#define DEF_SMS4_OFB_ENC2() (REG32(ADR_SMS4_OFB_ENC2)) = (0x00000000)
+#define DEF_SMS4_OFB_ENC3() (REG32(ADR_SMS4_OFB_ENC3)) = (0x00000000)
+#define DEF_MRX_MCAST_TB0_0() (REG32(ADR_MRX_MCAST_TB0_0)) = (0x00000000)
+#define DEF_MRX_MCAST_TB0_1() (REG32(ADR_MRX_MCAST_TB0_1)) = (0x00000000)
+#define DEF_MRX_MCAST_MK0_0() (REG32(ADR_MRX_MCAST_MK0_0)) = (0x00000000)
+#define DEF_MRX_MCAST_MK0_1() (REG32(ADR_MRX_MCAST_MK0_1)) = (0x00000000)
+#define DEF_MRX_MCAST_CTRL0() (REG32(ADR_MRX_MCAST_CTRL0)) = (0x00000000)
+#define DEF_MRX_MCAST_TB1_0() (REG32(ADR_MRX_MCAST_TB1_0)) = (0x00000000)
+#define DEF_MRX_MCAST_TB1_1() (REG32(ADR_MRX_MCAST_TB1_1)) = (0x00000000)
+#define DEF_MRX_MCAST_MK1_0() (REG32(ADR_MRX_MCAST_MK1_0)) = (0x00000000)
+#define DEF_MRX_MCAST_MK1_1() (REG32(ADR_MRX_MCAST_MK1_1)) = (0x00000000)
+#define DEF_MRX_MCAST_CTRL1() (REG32(ADR_MRX_MCAST_CTRL1)) = (0x00000000)
+#define DEF_MRX_MCAST_TB2_0() (REG32(ADR_MRX_MCAST_TB2_0)) = (0x00000000)
+#define DEF_MRX_MCAST_TB2_1() (REG32(ADR_MRX_MCAST_TB2_1)) = (0x00000000)
+#define DEF_MRX_MCAST_MK2_0() (REG32(ADR_MRX_MCAST_MK2_0)) = (0x00000000)
+#define DEF_MRX_MCAST_MK2_1() (REG32(ADR_MRX_MCAST_MK2_1)) = (0x00000000)
+#define DEF_MRX_MCAST_CTRL2() (REG32(ADR_MRX_MCAST_CTRL2)) = (0x00000000)
+#define DEF_MRX_MCAST_TB3_0() (REG32(ADR_MRX_MCAST_TB3_0)) = (0x00000000)
+#define DEF_MRX_MCAST_TB3_1() (REG32(ADR_MRX_MCAST_TB3_1)) = (0x00000000)
+#define DEF_MRX_MCAST_MK3_0() (REG32(ADR_MRX_MCAST_MK3_0)) = (0x00000000)
+#define DEF_MRX_MCAST_MK3_1() (REG32(ADR_MRX_MCAST_MK3_1)) = (0x00000000)
+#define DEF_MRX_MCAST_CTRL3() (REG32(ADR_MRX_MCAST_CTRL3)) = (0x00000000)
+#define DEF_MRX_PHY_INFO() (REG32(ADR_MRX_PHY_INFO)) = (0x00000000)
+#define DEF_MRX_BA_DBG() (REG32(ADR_MRX_BA_DBG)) = (0x00000000)
+#define DEF_MRX_FLT_TB0() (REG32(ADR_MRX_FLT_TB0)) = (0x00003df5)
+#define DEF_MRX_FLT_TB1() (REG32(ADR_MRX_FLT_TB1)) = (0x000031f6)
+#define DEF_MRX_FLT_TB2() (REG32(ADR_MRX_FLT_TB2)) = (0x000035f9)
+#define DEF_MRX_FLT_TB3() (REG32(ADR_MRX_FLT_TB3)) = (0x000021c1)
+#define DEF_MRX_FLT_TB4() (REG32(ADR_MRX_FLT_TB4)) = (0x00004bf9)
+#define DEF_MRX_FLT_TB5() (REG32(ADR_MRX_FLT_TB5)) = (0x00004db1)
+#define DEF_MRX_FLT_TB6() (REG32(ADR_MRX_FLT_TB6)) = (0x000011fe)
+#define DEF_MRX_FLT_TB7() (REG32(ADR_MRX_FLT_TB7)) = (0x00000bfe)
+#define DEF_MRX_FLT_TB8() (REG32(ADR_MRX_FLT_TB8)) = (0x00000000)
+#define DEF_MRX_FLT_TB9() (REG32(ADR_MRX_FLT_TB9)) = (0x00000000)
+#define DEF_MRX_FLT_TB10() (REG32(ADR_MRX_FLT_TB10)) = (0x00000000)
+#define DEF_MRX_FLT_TB11() (REG32(ADR_MRX_FLT_TB11)) = (0x00000006)
+#define DEF_MRX_FLT_TB12() (REG32(ADR_MRX_FLT_TB12)) = (0x00000001)
+#define DEF_MRX_FLT_TB13() (REG32(ADR_MRX_FLT_TB13)) = (0x00000003)
+#define DEF_MRX_FLT_TB14() (REG32(ADR_MRX_FLT_TB14)) = (0x00000005)
+#define DEF_MRX_FLT_TB15() (REG32(ADR_MRX_FLT_TB15)) = (0x00000007)
+#define DEF_MRX_FLT_EN0() (REG32(ADR_MRX_FLT_EN0)) = (0x00002008)
+#define DEF_MRX_FLT_EN1() (REG32(ADR_MRX_FLT_EN1)) = (0x00001001)
+#define DEF_MRX_FLT_EN2() (REG32(ADR_MRX_FLT_EN2)) = (0x00000808)
+#define DEF_MRX_FLT_EN3() (REG32(ADR_MRX_FLT_EN3)) = (0x00001000)
+#define DEF_MRX_FLT_EN4() (REG32(ADR_MRX_FLT_EN4)) = (0x00002008)
+#define DEF_MRX_FLT_EN5() (REG32(ADR_MRX_FLT_EN5)) = (0x0000800e)
+#define DEF_MRX_FLT_EN6() (REG32(ADR_MRX_FLT_EN6)) = (0x00000838)
+#define DEF_MRX_FLT_EN7() (REG32(ADR_MRX_FLT_EN7)) = (0x00002008)
+#define DEF_MRX_FLT_EN8() (REG32(ADR_MRX_FLT_EN8)) = (0x00002008)
+#define DEF_MRX_LEN_FLT() (REG32(ADR_MRX_LEN_FLT)) = (0x00000000)
+#define DEF_RX_FLOW_DATA() (REG32(ADR_RX_FLOW_DATA)) = (0x00105034)
+#define DEF_RX_FLOW_MNG() (REG32(ADR_RX_FLOW_MNG)) = (0x00000004)
+#define DEF_RX_FLOW_CTRL() (REG32(ADR_RX_FLOW_CTRL)) = (0x00000004)
+#define DEF_RX_TIME_STAMP_CFG() (REG32(ADR_RX_TIME_STAMP_CFG)) = (0x00001c00)
+#define DEF_DBG_FF_FULL() (REG32(ADR_DBG_FF_FULL)) = (0x00000000)
+#define DEF_DBG_WFF_FULL() (REG32(ADR_DBG_WFF_FULL)) = (0x00000000)
+#define DEF_DBG_MB_FULL() (REG32(ADR_DBG_MB_FULL)) = (0x00000000)
+#define DEF_BA_CTRL() (REG32(ADR_BA_CTRL)) = (0x00000008)
+#define DEF_BA_TA_0() (REG32(ADR_BA_TA_0)) = (0x00000000)
+#define DEF_BA_TA_1() (REG32(ADR_BA_TA_1)) = (0x00000000)
+#define DEF_BA_TID() (REG32(ADR_BA_TID)) = (0x00000000)
+#define DEF_BA_ST_SEQ() (REG32(ADR_BA_ST_SEQ)) = (0x00000000)
+#define DEF_BA_SB0() (REG32(ADR_BA_SB0)) = (0x00000000)
+#define DEF_BA_SB1() (REG32(ADR_BA_SB1)) = (0x00000000)
+#define DEF_MRX_WATCH_DOG() (REG32(ADR_MRX_WATCH_DOG)) = (0x0000ffff)
+#define DEF_ACK_GEN_EN() (REG32(ADR_ACK_GEN_EN)) = (0x00000000)
+#define DEF_ACK_GEN_PARA() (REG32(ADR_ACK_GEN_PARA)) = (0x00000000)
+#define DEF_ACK_GEN_RA_0() (REG32(ADR_ACK_GEN_RA_0)) = (0x00000000)
+#define DEF_ACK_GEN_RA_1() (REG32(ADR_ACK_GEN_RA_1)) = (0x00000000)
+#define DEF_MIB_LEN_FAIL() (REG32(ADR_MIB_LEN_FAIL)) = (0x00000000)
+#define DEF_TRAP_HW_ID() (REG32(ADR_TRAP_HW_ID)) = (0x00000000)
+#define DEF_ID_IN_USE() (REG32(ADR_ID_IN_USE)) = (0x00000000)
+#define DEF_MRX_ERR() (REG32(ADR_MRX_ERR)) = (0x00000000)
+#define DEF_WSID0_TID0_RX_SEQ() (REG32(ADR_WSID0_TID0_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID1_RX_SEQ() (REG32(ADR_WSID0_TID1_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID2_RX_SEQ() (REG32(ADR_WSID0_TID2_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID3_RX_SEQ() (REG32(ADR_WSID0_TID3_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID4_RX_SEQ() (REG32(ADR_WSID0_TID4_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID5_RX_SEQ() (REG32(ADR_WSID0_TID5_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID6_RX_SEQ() (REG32(ADR_WSID0_TID6_RX_SEQ)) = (0x00000000)
+#define DEF_WSID0_TID7_RX_SEQ() (REG32(ADR_WSID0_TID7_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID0_RX_SEQ() (REG32(ADR_WSID1_TID0_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID1_RX_SEQ() (REG32(ADR_WSID1_TID1_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID2_RX_SEQ() (REG32(ADR_WSID1_TID2_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID3_RX_SEQ() (REG32(ADR_WSID1_TID3_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID4_RX_SEQ() (REG32(ADR_WSID1_TID4_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID5_RX_SEQ() (REG32(ADR_WSID1_TID5_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID6_RX_SEQ() (REG32(ADR_WSID1_TID6_RX_SEQ)) = (0x00000000)
+#define DEF_WSID1_TID7_RX_SEQ() (REG32(ADR_WSID1_TID7_RX_SEQ)) = (0x00000000)
+#define DEF_HDR_ADDR_SEL() (REG32(ADR_HDR_ADDR_SEL)) = (0x00003e79)
+#define DEF_FRAME_TYPE_CNTR_SET() (REG32(ADR_FRAME_TYPE_CNTR_SET)) = (0x00000000)
+#define DEF_PHY_INFO() (REG32(ADR_PHY_INFO)) = (0x00000000)
+#define DEF_AMPDU_SIG() (REG32(ADR_AMPDU_SIG)) = (0x0000004e)
+#define DEF_MIB_AMPDU() (REG32(ADR_MIB_AMPDU)) = (0x00000000)
+#define DEF_LEN_FLT() (REG32(ADR_LEN_FLT)) = (0x00000000)
+#define DEF_MIB_DELIMITER() (REG32(ADR_MIB_DELIMITER)) = (0x00000000)
+#define DEF_MTX_INT_STS() (REG32(ADR_MTX_INT_STS)) = (0x00000000)
+#define DEF_MTX_INT_EN() (REG32(ADR_MTX_INT_EN)) = (0x00000000)
+#define DEF_MTX_MISC_EN() (REG32(ADR_MTX_MISC_EN)) = (0x00c00c00)
+#define DEF_MTX_EDCCA_TOUT() (REG32(ADR_MTX_EDCCA_TOUT)) = (0x00000200)
+#define DEF_MTX_BCN_INT_STS() (REG32(ADR_MTX_BCN_INT_STS)) = (0x00000000)
+#define DEF_MTX_BCN_EN_INT() (REG32(ADR_MTX_BCN_EN_INT)) = (0x00000000)
+#define DEF_MTX_BCN_EN_MISC() (REG32(ADR_MTX_BCN_EN_MISC)) = (0x00000042)
+#define DEF_MTX_BCN_MISC() (REG32(ADR_MTX_BCN_MISC)) = (0x00000000)
+#define DEF_MTX_BCN_PRD() (REG32(ADR_MTX_BCN_PRD)) = (0x00000064)
+#define DEF_MTX_BCN_TSF_L() (REG32(ADR_MTX_BCN_TSF_L)) = (0x00000000)
+#define DEF_MTX_BCN_TSF_U() (REG32(ADR_MTX_BCN_TSF_U)) = (0x00000000)
+#define DEF_MTX_BCN_CFG0() (REG32(ADR_MTX_BCN_CFG0)) = (0x00000000)
+#define DEF_MTX_BCN_CFG1() (REG32(ADR_MTX_BCN_CFG1)) = (0x00000000)
+#define DEF_MTX_STATUS() (REG32(ADR_MTX_STATUS)) = (0x00000000)
+#define DEF_MTX_DBG_CTRL() (REG32(ADR_MTX_DBG_CTRL)) = (0x00000000)
+#define DEF_MTX_DBG_DAT0() (REG32(ADR_MTX_DBG_DAT0)) = (0x00000000)
+#define DEF_MTX_DBG_DAT1() (REG32(ADR_MTX_DBG_DAT1)) = (0x00000000)
+#define DEF_MTX_DBG_DAT2() (REG32(ADR_MTX_DBG_DAT2)) = (0x00000000)
+#define DEF_MTX_DUR_TOUT() (REG32(ADR_MTX_DUR_TOUT)) = (0x00002c2c)
+#define DEF_MTX_DUR_IFS() (REG32(ADR_MTX_DUR_IFS)) = (0x12d40a05)
+#define DEF_MTX_DUR_SIFS_G() (REG32(ADR_MTX_DUR_SIFS_G)) = (0x12c90100)
+#define DEF_MTX_DBG_DAT3() (REG32(ADR_MTX_DBG_DAT3)) = (0x00000000)
+#define DEF_MTX_NAV() (REG32(ADR_MTX_NAV)) = (0x00000000)
+#define DEF_MTX_MIB_WSID0() (REG32(ADR_MTX_MIB_WSID0)) = (0x00000000)
+#define DEF_MTX_MIB_WSID1() (REG32(ADR_MTX_MIB_WSID1)) = (0x00000000)
+#define DEF_MTX_DBG_DAT4() (REG32(ADR_MTX_DBG_DAT4)) = (0x00000000)
+#define DEF_TXQ0_MTX_Q_MISC_EN() (REG32(ADR_TXQ0_MTX_Q_MISC_EN)) = (0x00000000)
+#define DEF_TXQ0_MTX_Q_AIFSN() (REG32(ADR_TXQ0_MTX_Q_AIFSN)) = (0x0000a502)
+#define DEF_TXQ0_MTX_Q_BKF_CNT() (REG32(ADR_TXQ0_MTX_Q_BKF_CNT)) = (0x00000000)
+#define DEF_TXQ0_MTX_Q_RC_LIMIT() (REG32(ADR_TXQ0_MTX_Q_RC_LIMIT)) = (0x00000407)
+#define DEF_TXQ0_MTX_Q_ID_MAP_L() (REG32(ADR_TXQ0_MTX_Q_ID_MAP_L)) = (0x00000000)
+#define DEF_TXQ0_MTX_Q_TXOP_CH_THD() (REG32(ADR_TXQ0_MTX_Q_TXOP_CH_THD)) = (0x00000000)
+#define DEF_TXQ0_MTX_Q_TXOP_OV_THD() (REG32(ADR_TXQ0_MTX_Q_TXOP_OV_THD)) = (0x00000000)
+#define DEF_TXQ1_MTX_Q_MISC_EN() (REG32(ADR_TXQ1_MTX_Q_MISC_EN)) = (0x00000000)
+#define DEF_TXQ1_MTX_Q_AIFSN() (REG32(ADR_TXQ1_MTX_Q_AIFSN)) = (0x0000a502)
+#define DEF_TXQ1_MTX_Q_BKF_CNT() (REG32(ADR_TXQ1_MTX_Q_BKF_CNT)) = (0x00000000)
+#define DEF_TXQ1_MTX_Q_RC_LIMIT() (REG32(ADR_TXQ1_MTX_Q_RC_LIMIT)) = (0x00000407)
+#define DEF_TXQ1_MTX_Q_ID_MAP_L() (REG32(ADR_TXQ1_MTX_Q_ID_MAP_L)) = (0x00000000)
+#define DEF_TXQ1_MTX_Q_TXOP_CH_THD() (REG32(ADR_TXQ1_MTX_Q_TXOP_CH_THD)) = (0x00000000)
+#define DEF_TXQ1_MTX_Q_TXOP_OV_THD() (REG32(ADR_TXQ1_MTX_Q_TXOP_OV_THD)) = (0x00000000)
+#define DEF_TXQ2_MTX_Q_MISC_EN() (REG32(ADR_TXQ2_MTX_Q_MISC_EN)) = (0x00000000)
+#define DEF_TXQ2_MTX_Q_AIFSN() (REG32(ADR_TXQ2_MTX_Q_AIFSN)) = (0x0000a502)
+#define DEF_TXQ2_MTX_Q_BKF_CNT() (REG32(ADR_TXQ2_MTX_Q_BKF_CNT)) = (0x00000000)
+#define DEF_TXQ2_MTX_Q_RC_LIMIT() (REG32(ADR_TXQ2_MTX_Q_RC_LIMIT)) = (0x00000407)
+#define DEF_TXQ2_MTX_Q_ID_MAP_L() (REG32(ADR_TXQ2_MTX_Q_ID_MAP_L)) = (0x00000000)
+#define DEF_TXQ2_MTX_Q_TXOP_CH_THD() (REG32(ADR_TXQ2_MTX_Q_TXOP_CH_THD)) = (0x00000000)
+#define DEF_TXQ2_MTX_Q_TXOP_OV_THD() (REG32(ADR_TXQ2_MTX_Q_TXOP_OV_THD)) = (0x00000000)
+#define DEF_TXQ3_MTX_Q_MISC_EN() (REG32(ADR_TXQ3_MTX_Q_MISC_EN)) = (0x00000000)
+#define DEF_TXQ3_MTX_Q_AIFSN() (REG32(ADR_TXQ3_MTX_Q_AIFSN)) = (0x0000a502)
+#define DEF_TXQ3_MTX_Q_BKF_CNT() (REG32(ADR_TXQ3_MTX_Q_BKF_CNT)) = (0x00000000)
+#define DEF_TXQ3_MTX_Q_RC_LIMIT() (REG32(ADR_TXQ3_MTX_Q_RC_LIMIT)) = (0x00000407)
+#define DEF_TXQ3_MTX_Q_ID_MAP_L() (REG32(ADR_TXQ3_MTX_Q_ID_MAP_L)) = (0x00000000)
+#define DEF_TXQ3_MTX_Q_TXOP_CH_THD() (REG32(ADR_TXQ3_MTX_Q_TXOP_CH_THD)) = (0x00000000)
+#define DEF_TXQ3_MTX_Q_TXOP_OV_THD() (REG32(ADR_TXQ3_MTX_Q_TXOP_OV_THD)) = (0x00000000)
+#define DEF_TXQ4_MTX_Q_MISC_EN() (REG32(ADR_TXQ4_MTX_Q_MISC_EN)) = (0x00000000)
+#define DEF_TXQ4_MTX_Q_AIFSN() (REG32(ADR_TXQ4_MTX_Q_AIFSN)) = (0x0000a502)
+#define DEF_TXQ4_MTX_Q_BKF_CNT() (REG32(ADR_TXQ4_MTX_Q_BKF_CNT)) = (0x00000000)
+#define DEF_TXQ4_MTX_Q_RC_LIMIT() (REG32(ADR_TXQ4_MTX_Q_RC_LIMIT)) = (0x00000407)
+#define DEF_TXQ4_MTX_Q_ID_MAP_L() (REG32(ADR_TXQ4_MTX_Q_ID_MAP_L)) = (0x00000000)
+#define DEF_TXQ4_MTX_Q_TXOP_CH_THD() (REG32(ADR_TXQ4_MTX_Q_TXOP_CH_THD)) = (0x00000000)
+#define DEF_TXQ4_MTX_Q_TXOP_OV_THD() (REG32(ADR_TXQ4_MTX_Q_TXOP_OV_THD)) = (0x00000000)
+#define DEF_WSID0() (REG32(ADR_WSID0)) = (0x00000000)
+#define DEF_PEER_MAC0_0() (REG32(ADR_PEER_MAC0_0)) = (0x00000000)
+#define DEF_PEER_MAC0_1() (REG32(ADR_PEER_MAC0_1)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_0() (REG32(ADR_TX_ACK_POLICY_0_0)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_0() (REG32(ADR_TX_SEQ_CTRL_0_0)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_1() (REG32(ADR_TX_ACK_POLICY_0_1)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_1() (REG32(ADR_TX_SEQ_CTRL_0_1)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_2() (REG32(ADR_TX_ACK_POLICY_0_2)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_2() (REG32(ADR_TX_SEQ_CTRL_0_2)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_3() (REG32(ADR_TX_ACK_POLICY_0_3)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_3() (REG32(ADR_TX_SEQ_CTRL_0_3)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_4() (REG32(ADR_TX_ACK_POLICY_0_4)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_4() (REG32(ADR_TX_SEQ_CTRL_0_4)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_5() (REG32(ADR_TX_ACK_POLICY_0_5)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_5() (REG32(ADR_TX_SEQ_CTRL_0_5)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_6() (REG32(ADR_TX_ACK_POLICY_0_6)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_6() (REG32(ADR_TX_SEQ_CTRL_0_6)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_0_7() (REG32(ADR_TX_ACK_POLICY_0_7)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_0_7() (REG32(ADR_TX_SEQ_CTRL_0_7)) = (0x00000000)
+#define DEF_WSID1() (REG32(ADR_WSID1)) = (0x00000000)
+#define DEF_PEER_MAC1_0() (REG32(ADR_PEER_MAC1_0)) = (0x00000000)
+#define DEF_PEER_MAC1_1() (REG32(ADR_PEER_MAC1_1)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_0() (REG32(ADR_TX_ACK_POLICY_1_0)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_0() (REG32(ADR_TX_SEQ_CTRL_1_0)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_1() (REG32(ADR_TX_ACK_POLICY_1_1)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_1() (REG32(ADR_TX_SEQ_CTRL_1_1)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_2() (REG32(ADR_TX_ACK_POLICY_1_2)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_2() (REG32(ADR_TX_SEQ_CTRL_1_2)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_3() (REG32(ADR_TX_ACK_POLICY_1_3)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_3() (REG32(ADR_TX_SEQ_CTRL_1_3)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_4() (REG32(ADR_TX_ACK_POLICY_1_4)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_4() (REG32(ADR_TX_SEQ_CTRL_1_4)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_5() (REG32(ADR_TX_ACK_POLICY_1_5)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_5() (REG32(ADR_TX_SEQ_CTRL_1_5)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_6() (REG32(ADR_TX_ACK_POLICY_1_6)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_6() (REG32(ADR_TX_SEQ_CTRL_1_6)) = (0x00000000)
+#define DEF_TX_ACK_POLICY_1_7() (REG32(ADR_TX_ACK_POLICY_1_7)) = (0x00000000)
+#define DEF_TX_SEQ_CTRL_1_7() (REG32(ADR_TX_SEQ_CTRL_1_7)) = (0x00000000)
+#define DEF_INFO0() (REG32(ADR_INFO0)) = (0x00000000)
+#define DEF_INFO1() (REG32(ADR_INFO1)) = (0x00000100)
+#define DEF_INFO2() (REG32(ADR_INFO2)) = (0x00000200)
+#define DEF_INFO3() (REG32(ADR_INFO3)) = (0x00000300)
+#define DEF_INFO4() (REG32(ADR_INFO4)) = (0x00000140)
+#define DEF_INFO5() (REG32(ADR_INFO5)) = (0x00000240)
+#define DEF_INFO6() (REG32(ADR_INFO6)) = (0x00000340)
+#define DEF_INFO7() (REG32(ADR_INFO7)) = (0x00000001)
+#define DEF_INFO8() (REG32(ADR_INFO8)) = (0x00000101)
+#define DEF_INFO9() (REG32(ADR_INFO9)) = (0x00000201)
+#define DEF_INFO10() (REG32(ADR_INFO10)) = (0x00000301)
+#define DEF_INFO11() (REG32(ADR_INFO11)) = (0x00000401)
+#define DEF_INFO12() (REG32(ADR_INFO12)) = (0x00000501)
+#define DEF_INFO13() (REG32(ADR_INFO13)) = (0x00000601)
+#define DEF_INFO14() (REG32(ADR_INFO14)) = (0x00000701)
+#define DEF_INFO15() (REG32(ADR_INFO15)) = (0x00030002)
+#define DEF_INFO16() (REG32(ADR_INFO16)) = (0x00030102)
+#define DEF_INFO17() (REG32(ADR_INFO17)) = (0x00030202)
+#define DEF_INFO18() (REG32(ADR_INFO18)) = (0x00030302)
+#define DEF_INFO19() (REG32(ADR_INFO19)) = (0x00030402)
+#define DEF_INFO20() (REG32(ADR_INFO20)) = (0x00030502)
+#define DEF_INFO21() (REG32(ADR_INFO21)) = (0x00030602)
+#define DEF_INFO22() (REG32(ADR_INFO22)) = (0x00030702)
+#define DEF_INFO23() (REG32(ADR_INFO23)) = (0x00030082)
+#define DEF_INFO24() (REG32(ADR_INFO24)) = (0x00030182)
+#define DEF_INFO25() (REG32(ADR_INFO25)) = (0x00030282)
+#define DEF_INFO26() (REG32(ADR_INFO26)) = (0x00030382)
+#define DEF_INFO27() (REG32(ADR_INFO27)) = (0x00030482)
+#define DEF_INFO28() (REG32(ADR_INFO28)) = (0x00030582)
+#define DEF_INFO29() (REG32(ADR_INFO29)) = (0x00030682)
+#define DEF_INFO30() (REG32(ADR_INFO30)) = (0x00030782)
+#define DEF_INFO31() (REG32(ADR_INFO31)) = (0x00030042)
+#define DEF_INFO32() (REG32(ADR_INFO32)) = (0x00030142)
+#define DEF_INFO33() (REG32(ADR_INFO33)) = (0x00030242)
+#define DEF_INFO34() (REG32(ADR_INFO34)) = (0x00030342)
+#define DEF_INFO35() (REG32(ADR_INFO35)) = (0x00030442)
+#define DEF_INFO36() (REG32(ADR_INFO36)) = (0x00030542)
+#define DEF_INFO37() (REG32(ADR_INFO37)) = (0x00030642)
+#define DEF_INFO38() (REG32(ADR_INFO38)) = (0x00030742)
+#define DEF_INFO_MASK() (REG32(ADR_INFO_MASK)) = (0x00007fc7)
+#define DEF_INFO_RATE_OFFSET() (REG32(ADR_INFO_RATE_OFFSET)) = (0x00040000)
+#define DEF_INFO_IDX_ADDR() (REG32(ADR_INFO_IDX_ADDR)) = (0x00000000)
+#define DEF_INFO_LEN_ADDR() (REG32(ADR_INFO_LEN_ADDR)) = (0x00000000)
+#define DEF_IC_TIME_TAG_0() (REG32(ADR_IC_TIME_TAG_0)) = (0x00000000)
+#define DEF_IC_TIME_TAG_1() (REG32(ADR_IC_TIME_TAG_1)) = (0x00000000)
+#define DEF_PACKET_ID_ALLOCATION_PRIORITY() (REG32(ADR_PACKET_ID_ALLOCATION_PRIORITY)) = (0x00000000)
+#define DEF_MAC_MODE() (REG32(ADR_MAC_MODE)) = (0x00000000)
+#define DEF_ALL_SOFTWARE_RESET() (REG32(ADR_ALL_SOFTWARE_RESET)) = (0x00000000)
+#define DEF_ENG_SOFTWARE_RESET() (REG32(ADR_ENG_SOFTWARE_RESET)) = (0x00000000)
+#define DEF_CSR_SOFTWARE_RESET() (REG32(ADR_CSR_SOFTWARE_RESET)) = (0x00000000)
+#define DEF_MAC_CLOCK_ENABLE() (REG32(ADR_MAC_CLOCK_ENABLE)) = (0x00003efb)
+#define DEF_MAC_ENGINE_CLOCK_ENABLE() (REG32(ADR_MAC_ENGINE_CLOCK_ENABLE)) = (0x0000f07b)
+#define DEF_MAC_CSR_CLOCK_ENABLE() (REG32(ADR_MAC_CSR_CLOCK_ENABLE)) = (0x0000ec02)
+#define DEF_GLBLE_SET() (REG32(ADR_GLBLE_SET)) = (0x000e5000)
+#define DEF_REASON_TRAP0() (REG32(ADR_REASON_TRAP0)) = (0x00000000)
+#define DEF_REASON_TRAP1() (REG32(ADR_REASON_TRAP1)) = (0x00000000)
+#define DEF_BSSID_0() (REG32(ADR_BSSID_0)) = (0x00000000)
+#define DEF_BSSID_1() (REG32(ADR_BSSID_1)) = (0x00000000)
+#define DEF_SCRT_STATE() (REG32(ADR_SCRT_STATE)) = (0x00000000)
+#define DEF_STA_MAC_0() (REG32(ADR_STA_MAC_0)) = (0x00000000)
+#define DEF_STA_MAC_1() (REG32(ADR_STA_MAC_1)) = (0x00000000)
+#define DEF_SCRT_SET() (REG32(ADR_SCRT_SET)) = (0x00000000)
+#define DEF_BTCX0() (REG32(ADR_BTCX0)) = (0x00000006)
+#define DEF_BTCX1() (REG32(ADR_BTCX1)) = (0x00000000)
+#define DEF_SWITCH_CTL() (REG32(ADR_SWITCH_CTL)) = (0x00000000)
+#define DEF_MIB_EN() (REG32(ADR_MIB_EN)) = (0x00000000)
+#define DEF_MTX_WSID0_SUCC() (REG32(ADR_MTX_WSID0_SUCC)) = (0x00000000)
+#define DEF_MTX_WSID0_FRM() (REG32(ADR_MTX_WSID0_FRM)) = (0x00000000)
+#define DEF_MTX_WSID0_RETRY() (REG32(ADR_MTX_WSID0_RETRY)) = (0x00000000)
+#define DEF_MTX_WSID0_TOTAL() (REG32(ADR_MTX_WSID0_TOTAL)) = (0x00000000)
+#define DEF_MTX_GROUP() (REG32(ADR_MTX_GROUP)) = (0x00000000)
+#define DEF_MTX_FAIL() (REG32(ADR_MTX_FAIL)) = (0x00000000)
+#define DEF_MTX_RETRY() (REG32(ADR_MTX_RETRY)) = (0x00000000)
+#define DEF_MTX_MULTI_RETRY() (REG32(ADR_MTX_MULTI_RETRY)) = (0x00000000)
+#define DEF_MTX_RTS_SUCCESS() (REG32(ADR_MTX_RTS_SUCCESS)) = (0x00000000)
+#define DEF_MTX_RTS_FAIL() (REG32(ADR_MTX_RTS_FAIL)) = (0x00000000)
+#define DEF_MTX_ACK_FAIL() (REG32(ADR_MTX_ACK_FAIL)) = (0x00000000)
+#define DEF_MTX_FRM() (REG32(ADR_MTX_FRM)) = (0x00000000)
+#define DEF_MTX_ACK_TX() (REG32(ADR_MTX_ACK_TX)) = (0x00000000)
+#define DEF_MTX_CTS_TX() (REG32(ADR_MTX_CTS_TX)) = (0x00000000)
+#define DEF_MRX_DUP_FRM() (REG32(ADR_MRX_DUP_FRM)) = (0x00000000)
+#define DEF_MRX_FRG_FRM() (REG32(ADR_MRX_FRG_FRM)) = (0x00000000)
+#define DEF_MRX_GROUP_FRM() (REG32(ADR_MRX_GROUP_FRM)) = (0x00000000)
+#define DEF_MRX_FCS_ERR() (REG32(ADR_MRX_FCS_ERR)) = (0x00000000)
+#define DEF_MRX_FCS_SUCC() (REG32(ADR_MRX_FCS_SUCC)) = (0x00000000)
+#define DEF_MRX_MISS() (REG32(ADR_MRX_MISS)) = (0x00000000)
+#define DEF_MRX_ALC_FAIL() (REG32(ADR_MRX_ALC_FAIL)) = (0x00000000)
+#define DEF_MRX_DAT_NTF() (REG32(ADR_MRX_DAT_NTF)) = (0x00000000)
+#define DEF_MRX_RTS_NTF() (REG32(ADR_MRX_RTS_NTF)) = (0x00000000)
+#define DEF_MRX_CTS_NTF() (REG32(ADR_MRX_CTS_NTF)) = (0x00000000)
+#define DEF_MRX_ACK_NTF() (REG32(ADR_MRX_ACK_NTF)) = (0x00000000)
+#define DEF_MRX_BA_NTF() (REG32(ADR_MRX_BA_NTF)) = (0x00000000)
+#define DEF_MRX_DATA_NTF() (REG32(ADR_MRX_DATA_NTF)) = (0x00000000)
+#define DEF_MRX_MNG_NTF() (REG32(ADR_MRX_MNG_NTF)) = (0x00000000)
+#define DEF_MRX_DAT_CRC_NTF() (REG32(ADR_MRX_DAT_CRC_NTF)) = (0x00000000)
+#define DEF_MRX_BAR_NTF() (REG32(ADR_MRX_BAR_NTF)) = (0x00000000)
+#define DEF_MRX_MB_MISS() (REG32(ADR_MRX_MB_MISS)) = (0x00000000)
+#define DEF_MRX_NIDLE_MISS() (REG32(ADR_MRX_NIDLE_MISS)) = (0x00000000)
+#define DEF_MRX_CSR_NTF() (REG32(ADR_MRX_CSR_NTF)) = (0x00000000)
+#define DEF_DBG_Q0_FRM_SUCCESS() (REG32(ADR_DBG_Q0_FRM_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q0_FRM_FAIL() (REG32(ADR_DBG_Q0_FRM_FAIL)) = (0x00000000)
+#define DEF_DBG_Q0_ACK_SUCCESS() (REG32(ADR_DBG_Q0_ACK_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q0_ACK_FAIL() (REG32(ADR_DBG_Q0_ACK_FAIL)) = (0x00000000)
+#define DEF_DBG_Q1_FRM_SUCCESS() (REG32(ADR_DBG_Q1_FRM_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q1_FRM_FAIL() (REG32(ADR_DBG_Q1_FRM_FAIL)) = (0x00000000)
+#define DEF_DBG_Q1_ACK_SUCCESS() (REG32(ADR_DBG_Q1_ACK_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q1_ACK_FAIL() (REG32(ADR_DBG_Q1_ACK_FAIL)) = (0x00000000)
+#define DEF_DBG_Q2_FRM_SUCCESS() (REG32(ADR_DBG_Q2_FRM_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q2_FRM_FAIL() (REG32(ADR_DBG_Q2_FRM_FAIL)) = (0x00000000)
+#define DEF_DBG_Q2_ACK_SUCCESS() (REG32(ADR_DBG_Q2_ACK_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q2_ACK_FAIL() (REG32(ADR_DBG_Q2_ACK_FAIL)) = (0x00000000)
+#define DEF_DBG_Q3_FRM_SUCCESS() (REG32(ADR_DBG_Q3_FRM_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q3_FRM_FAIL() (REG32(ADR_DBG_Q3_FRM_FAIL)) = (0x00000000)
+#define DEF_DBG_Q3_ACK_SUCCESS() (REG32(ADR_DBG_Q3_ACK_SUCCESS)) = (0x00000000)
+#define DEF_DBG_Q3_ACK_FAIL() (REG32(ADR_DBG_Q3_ACK_FAIL)) = (0x00000000)
+#define DEF_MIB_SCRT_TKIP0() (REG32(ADR_MIB_SCRT_TKIP0)) = (0x00000000)
+#define DEF_MIB_SCRT_TKIP1() (REG32(ADR_MIB_SCRT_TKIP1)) = (0x00000000)
+#define DEF_MIB_SCRT_TKIP2() (REG32(ADR_MIB_SCRT_TKIP2)) = (0x00000000)
+#define DEF_MIB_SCRT_CCMP0() (REG32(ADR_MIB_SCRT_CCMP0)) = (0x00000000)
+#define DEF_MIB_SCRT_CCMP1() (REG32(ADR_MIB_SCRT_CCMP1)) = (0x00000000)
+#define DEF_DBG_LEN_CRC_FAIL() (REG32(ADR_DBG_LEN_CRC_FAIL)) = (0x00000000)
+#define DEF_DBG_LEN_ALC_FAIL() (REG32(ADR_DBG_LEN_ALC_FAIL)) = (0x00000000)
+#define DEF_DBG_AMPDU_PASS() (REG32(ADR_DBG_AMPDU_PASS)) = (0x00000000)
+#define DEF_DBG_AMPDU_FAIL() (REG32(ADR_DBG_AMPDU_FAIL)) = (0x00000000)
+#define DEF_ID_ALC_FAIL1() (REG32(ADR_ID_ALC_FAIL1)) = (0x00000000)
+#define DEF_ID_ALC_FAIL2() (REG32(ADR_ID_ALC_FAIL2)) = (0x00000000)
+#define DEF_CBR_HARD_WIRE_PIN_REGISTER() (REG32(ADR_CBR_HARD_WIRE_PIN_REGISTER)) = (0x00004000)
+#define DEF_CBR_MANUAL_ENABLE_REGISTER() (REG32(ADR_CBR_MANUAL_ENABLE_REGISTER)) = (0x00001fc0)
+#define DEF_CBR_LDO_REGISTER() (REG32(ADR_CBR_LDO_REGISTER)) = (0x2496db1b)
+#define DEF_CBR_ABB_REGISTER_1() (REG32(ADR_CBR_ABB_REGISTER_1)) = (0x151558dd)
+#define DEF_CBR_ABB_REGISTER_2() (REG32(ADR_CBR_ABB_REGISTER_2)) = (0x01011a88)
+#define DEF_CBR_TX_FE_REGISTER() (REG32(ADR_CBR_TX_FE_REGISTER)) = (0x3cbe84fe)
+#define DEF_CBR_RX_FE_REGISTER_1() (REG32(ADR_CBR_RX_FE_REGISTER_1)) = (0x00657579)
+#define DEF_CBR_RX_FE_GAIN_DECODER_REGISTER_1() (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_1)) = (0x000103a7)
+#define DEF_CBR_RX_FE_GAIN_DECODER_REGISTER_2() (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_2)) = (0x000103a6)
+#define DEF_CBR_RX_FE_GAIN_DECODER_REGISTER_3() (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_3)) = (0x00012001)
+#define DEF_CBR_RX_FE_GAIN_DECODER_REGISTER_4() (REG32(ADR_CBR_RX_FE_GAIN_DECODER_REGISTER_4)) = (0x00036000)
+#define DEF_CBR_RX_FSM_REGISTER() (REG32(ADR_CBR_RX_FSM_REGISTER)) = (0x00000ca8)
+#define DEF_CBR_RX_ADC_REGISTER() (REG32(ADR_CBR_RX_ADC_REGISTER)) = (0x002a0224)
+#define DEF_CBR_TX_DAC_REGISTER() (REG32(ADR_CBR_TX_DAC_REGISTER)) = (0x00002655)
+#define DEF_CBR_SX_ENABLE_RGISTER() (REG32(ADR_CBR_SX_ENABLE_RGISTER)) = (0x0000647c)
+#define DEF_CBR_SYN_RGISTER_1() (REG32(ADR_CBR_SYN_RGISTER_1)) = (0xaa800000)
+#define DEF_CBR_SYN_RGISTER_2() (REG32(ADR_CBR_SYN_RGISTER_2)) = (0x00550800)
+#define DEF_CBR_SYN_PFD_CHP() (REG32(ADR_CBR_SYN_PFD_CHP)) = (0x07c0894a)
+#define DEF_CBR_SYN_VCO_LOBF() (REG32(ADR_CBR_SYN_VCO_LOBF)) = (0xfcccca27)
+#define DEF_CBR_SYN_DIV_SDM_XOSC() (REG32(ADR_CBR_SYN_DIV_SDM_XOSC)) = (0x2773c93c)
+#define DEF_CBR_SYN_LCK1() (REG32(ADR_CBR_SYN_LCK1)) = (0x00000a7c)
+#define DEF_CBR_SYN_LCK2() (REG32(ADR_CBR_SYN_LCK2)) = (0x01c67ff4)
+#define DEF_CBR_DPLL_VCO_REGISTER() (REG32(ADR_CBR_DPLL_VCO_REGISTER)) = (0x00103014)
+#define DEF_CBR_DPLL_CP_PFD_REGISTER() (REG32(ADR_CBR_DPLL_CP_PFD_REGISTER)) = (0x0001848c)
+#define DEF_CBR_DPLL_DIVIDER_REGISTER() (REG32(ADR_CBR_DPLL_DIVIDER_REGISTER)) = (0x034061e0)
+#define DEF_CBR_DCOC_IDAC_REGISTER1() (REG32(ADR_CBR_DCOC_IDAC_REGISTER1)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER2() (REG32(ADR_CBR_DCOC_IDAC_REGISTER2)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER3() (REG32(ADR_CBR_DCOC_IDAC_REGISTER3)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER4() (REG32(ADR_CBR_DCOC_IDAC_REGISTER4)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER5() (REG32(ADR_CBR_DCOC_IDAC_REGISTER5)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER6() (REG32(ADR_CBR_DCOC_IDAC_REGISTER6)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER7() (REG32(ADR_CBR_DCOC_IDAC_REGISTER7)) = (0x00820820)
+#define DEF_CBR_DCOC_IDAC_REGISTER8() (REG32(ADR_CBR_DCOC_IDAC_REGISTER8)) = (0x00820820)
+#define DEF_CBR_RCAL_REGISTER() (REG32(ADR_CBR_RCAL_REGISTER)) = (0x00004080)
+#define DEF_CBR_MANUAL_REGISTER() (REG32(ADR_CBR_MANUAL_REGISTER)) = (0x00003e7e)
+#define DEF_CBR_TRX_DUMMY_REGISTER() (REG32(ADR_CBR_TRX_DUMMY_REGISTER)) = (0xaaaaaaaa)
+#define DEF_CBR_SX_DUMMY_REGISTER() (REG32(ADR_CBR_SX_DUMMY_REGISTER)) = (0xaaaaaaaa)
+#define DEF_CBR_RG_PKT_GEN_0() (REG32(ADR_CBR_RG_PKT_GEN_0)) = (0x00000000)
+#define DEF_CBR_RG_PKT_GEN_1() (REG32(ADR_CBR_RG_PKT_GEN_1)) = (0x00000000)
+#define DEF_CBR_RG_PKT_GEN_2() (REG32(ADR_CBR_RG_PKT_GEN_2)) = (0x00000000)
+#define DEF_CBR_RG_INTEGRATION() (REG32(ADR_CBR_RG_INTEGRATION)) = (0x00000000)
+#define DEF_CBR_RG_PKT_GEN_TXCNT() (REG32(ADR_CBR_RG_PKT_GEN_TXCNT)) = (0x00000000)
+#define DEF_CBR_PATTERN_GEN() (REG32(ADR_CBR_PATTERN_GEN)) = (0xff000000)
+#define DEF_MB_CPU_INT() (REG32(ADR_MB_CPU_INT)) = (0x00000000)
+#define DEF_CPU_ID_TB0() (REG32(ADR_CPU_ID_TB0)) = (0x00000000)
+#define DEF_CPU_ID_TB1() (REG32(ADR_CPU_ID_TB1)) = (0x00000000)
+#define DEF_CH0_TRIG_1() (REG32(ADR_CH0_TRIG_1)) = (0x00000000)
+#define DEF_CH0_TRIG_0() (REG32(ADR_CH0_TRIG_0)) = (0x00000000)
+#define DEF_CH0_PRI_TRIG() (REG32(ADR_CH0_PRI_TRIG)) = (0x00000000)
+#define DEF_MCU_STATUS() (REG32(ADR_MCU_STATUS)) = (0x00000000)
+#define DEF_RD_IN_FFCNT1() (REG32(ADR_RD_IN_FFCNT1)) = (0x00000000)
+#define DEF_RD_IN_FFCNT2() (REG32(ADR_RD_IN_FFCNT2)) = (0x00000000)
+#define DEF_RD_FFIN_FULL() (REG32(ADR_RD_FFIN_FULL)) = (0x00000000)
+#define DEF_MBOX_HALT_CFG() (REG32(ADR_MBOX_HALT_CFG)) = (0x00000000)
+#define DEF_MB_DBG_CFG1() (REG32(ADR_MB_DBG_CFG1)) = (0x00080000)
+#define DEF_MB_DBG_CFG2() (REG32(ADR_MB_DBG_CFG2)) = (0x00000000)
+#define DEF_MB_DBG_CFG3() (REG32(ADR_MB_DBG_CFG3)) = (0x00000000)
+#define DEF_MB_DBG_CFG4() (REG32(ADR_MB_DBG_CFG4)) = (0xffffffff)
+#define DEF_MB_OUT_QUEUE_CFG() (REG32(ADR_MB_OUT_QUEUE_CFG)) = (0x00000002)
+#define DEF_MB_OUT_QUEUE_FLUSH() (REG32(ADR_MB_OUT_QUEUE_FLUSH)) = (0x00000000)
+#define DEF_RD_FFOUT_CNT1() (REG32(ADR_RD_FFOUT_CNT1)) = (0x00000000)
+#define DEF_RD_FFOUT_CNT2() (REG32(ADR_RD_FFOUT_CNT2)) = (0x00000000)
+#define DEF_RD_FFOUT_CNT3() (REG32(ADR_RD_FFOUT_CNT3)) = (0x00000000)
+#define DEF_RD_FFOUT_FULL() (REG32(ADR_RD_FFOUT_FULL)) = (0x00000000)
+#define DEF_MB_THRESHOLD6() (REG32(ADR_MB_THRESHOLD6)) = (0x00000000)
+#define DEF_MB_THRESHOLD7() (REG32(ADR_MB_THRESHOLD7)) = (0x00000000)
+#define DEF_MB_THRESHOLD8() (REG32(ADR_MB_THRESHOLD8)) = (0x00000000)
+#define DEF_MB_THRESHOLD9() (REG32(ADR_MB_THRESHOLD9)) = (0x00000000)
+#define DEF_MB_THRESHOLD10() (REG32(ADR_MB_THRESHOLD10)) = (0x00000000)
+#define DEF_MB_TRASH_CFG() (REG32(ADR_MB_TRASH_CFG)) = (0x01000001)
+#define DEF_MB_IN_FF_FLUSH() (REG32(ADR_MB_IN_FF_FLUSH)) = (0x00000000)
+#define DEF_CPU_ID_TB2() (REG32(ADR_CPU_ID_TB2)) = (0x00000000)
+#define DEF_CPU_ID_TB3() (REG32(ADR_CPU_ID_TB3)) = (0x00000000)
+#define DEF_PHY_IQ_LOG_CFG0() (REG32(ADR_PHY_IQ_LOG_CFG0)) = (0x00000000)
+#define DEF_PHY_IQ_LOG_CFG1() (REG32(ADR_PHY_IQ_LOG_CFG1)) = (0x00000000)
+#define DEF_PHY_IQ_LOG_LEN() (REG32(ADR_PHY_IQ_LOG_LEN)) = (0x00001000)
+#define DEF_PHY_IQ_LOG_PTR() (REG32(ADR_PHY_IQ_LOG_PTR)) = (0x00000000)
+#define DEF_WR_ALC() (REG32(ADR_WR_ALC)) = (0x00000000)
+#define DEF_GETID() (REG32(ADR_GETID)) = (0x00000000)
+#define DEF_CH_STA_PRI() (REG32(ADR_CH_STA_PRI)) = (0x00000213)
+#define DEF_RD_ID0() (REG32(ADR_RD_ID0)) = (0x00000000)
+#define DEF_RD_ID1() (REG32(ADR_RD_ID1)) = (0x00000000)
+#define DEF_IMD_CFG() (REG32(ADR_IMD_CFG)) = (0x00000000)
+#define DEF_IMD_STA() (REG32(ADR_IMD_STA)) = (0x00000000)
+#define DEF_ALC_STA() (REG32(ADR_ALC_STA)) = (0x01000000)
+#define DEF_TRX_ID_COUNT() (REG32(ADR_TRX_ID_COUNT)) = (0x00000000)
+#define DEF_TRX_ID_THRESHOLD() (REG32(ADR_TRX_ID_THRESHOLD)) = (0x01ee3c3c)
+#define DEF_TX_ID0() (REG32(ADR_TX_ID0)) = (0x00000000)
+#define DEF_TX_ID1() (REG32(ADR_TX_ID1)) = (0x00000000)
+#define DEF_RX_ID0() (REG32(ADR_RX_ID0)) = (0x00000000)
+#define DEF_RX_ID1() (REG32(ADR_RX_ID1)) = (0x00000000)
+#define DEF_RTN_STA() (REG32(ADR_RTN_STA)) = (0x00000001)
+#define DEF_ID_LEN_THREADSHOLD1() (REG32(ADR_ID_LEN_THREADSHOLD1)) = (0x000f0641)
+#define DEF_ID_LEN_THREADSHOLD2() (REG32(ADR_ID_LEN_THREADSHOLD2)) = (0x00000000)
+#define DEF_CH_ARB_PRI() (REG32(ADR_CH_ARB_PRI)) = (0x00031201)
+#define DEF_TX_ID_REMAIN_STATUS() (REG32(ADR_TX_ID_REMAIN_STATUS)) = (0x00000000)
+#define DEF_ID_INFO_STA() (REG32(ADR_ID_INFO_STA)) = (0x00000100)
+#define DEF_TX_LIMIT_INTR() (REG32(ADR_TX_LIMIT_INTR)) = (0x00000000)
+#define DEF_TX_ID_ALL_INFO() (REG32(ADR_TX_ID_ALL_INFO)) = (0x00000000)
+#define DEF_RD_ID2() (REG32(ADR_RD_ID2)) = (0x00000000)
+#define DEF_RD_ID3() (REG32(ADR_RD_ID3)) = (0x00000000)
+#define DEF_TX_ID2() (REG32(ADR_TX_ID2)) = (0x00000000)
+#define DEF_TX_ID3() (REG32(ADR_TX_ID3)) = (0x00000000)
+#define DEF_RX_ID2() (REG32(ADR_RX_ID2)) = (0x00000000)
+#define DEF_RX_ID3() (REG32(ADR_RX_ID3)) = (0x00000000)
+#define DEF_TX_ID_ALL_INFO2() (REG32(ADR_TX_ID_ALL_INFO2)) = (0x00000000)
+#define DEF_TX_ID_ALL_INFO_A() (REG32(ADR_TX_ID_ALL_INFO_A)) = (0x00000000)
+#define DEF_TX_ID_ALL_INFO_B() (REG32(ADR_TX_ID_ALL_INFO_B)) = (0x00000000)
+#define DEF_TX_ID_REMAIN_STATUS2() (REG32(ADR_TX_ID_REMAIN_STATUS2)) = (0x01000100)
+#define DEF_ALC_ID_INFO() (REG32(ADR_ALC_ID_INFO)) = (0x00000000)
+#define DEF_ALC_ID_INF1() (REG32(ADR_ALC_ID_INF1)) = (0x00000000)
+#define DEF_PHY_EN_0() (REG32(ADR_PHY_EN_0)) = (0x00000014)
+#define DEF_PHY_EN_1() (REG32(ADR_PHY_EN_1)) = (0x00000000)
+#define DEF_SVN_VERSION_REG() (REG32(ADR_SVN_VERSION_REG)) = (0x00000000)
+#define DEF_PHY_PKT_GEN_0() (REG32(ADR_PHY_PKT_GEN_0)) = (0x00000064)
+#define DEF_PHY_PKT_GEN_1() (REG32(ADR_PHY_PKT_GEN_1)) = (0x00000fff)
+#define DEF_PHY_PKT_GEN_2() (REG32(ADR_PHY_PKT_GEN_2)) = (0x00000003)
+#define DEF_PHY_PKT_GEN_3() (REG32(ADR_PHY_PKT_GEN_3)) = (0x005a0220)
+#define DEF_PHY_PKT_GEN_4() (REG32(ADR_PHY_PKT_GEN_4)) = (0x00000001)
+#define DEF_PHY_REG_00() (REG32(ADR_PHY_REG_00)) = (0x10000000)
+#define DEF_PHY_REG_01() (REG32(ADR_PHY_REG_01)) = (0x00000000)
+#define DEF_PHY_REG_02_AGC() (REG32(ADR_PHY_REG_02_AGC)) = (0x80046771)
+#define DEF_PHY_REG_03_AGC() (REG32(ADR_PHY_REG_03_AGC)) = (0x1f300f6f)
+#define DEF_PHY_REG_04_AGC() (REG32(ADR_PHY_REG_04_AGC)) = (0x663f36d0)
+#define DEF_PHY_REG_05_AGC() (REG32(ADR_PHY_REG_05_AGC)) = (0x106c0000)
+#define DEF_PHY_REG_06_11B_DAGC() (REG32(ADR_PHY_REG_06_11B_DAGC)) = (0x01603fff)
+#define DEF_PHY_REG_07_11B_DAGC() (REG32(ADR_PHY_REG_07_11B_DAGC)) = (0x00600808)
+#define DEF_PHY_REG_08_11GN_DAGC() (REG32(ADR_PHY_REG_08_11GN_DAGC)) = (0xff000160)
+#define DEF_PHY_REG_09_11GN_DAGC() (REG32(ADR_PHY_REG_09_11GN_DAGC)) = (0x00080840)
+#define DEF_PHY_READ_REG_00_DIG_PWR() (REG32(ADR_PHY_READ_REG_00_DIG_PWR)) = (0x00000000)
+#define DEF_PHY_READ_REG_01_RF_GAIN_PWR() (REG32(ADR_PHY_READ_REG_01_RF_GAIN_PWR)) = (0x00000000)
+#define DEF_PHY_READ_REG_02_RF_GAIN_PWR() (REG32(ADR_PHY_READ_REG_02_RF_GAIN_PWR)) = (0x00000000)
+#define DEF_PHY_READ_REG_03_RF_GAIN_PWR() (REG32(ADR_PHY_READ_REG_03_RF_GAIN_PWR)) = (0x00000000)
+#define DEF_PHY_REG_10_TX_DES() (REG32(ADR_PHY_REG_10_TX_DES)) = (0x00010405)
+#define DEF_PHY_REG_11_TX_DES() (REG32(ADR_PHY_REG_11_TX_DES)) = (0x06090813)
+#define DEF_PHY_REG_12_TX_DES() (REG32(ADR_PHY_REG_12_TX_DES)) = (0x12070000)
+#define DEF_PHY_REG_13_RX_DES() (REG32(ADR_PHY_REG_13_RX_DES)) = (0x01000405)
+#define DEF_PHY_REG_14_RX_DES() (REG32(ADR_PHY_REG_14_RX_DES)) = (0x06090813)
+#define DEF_PHY_REG_15_RX_DES() (REG32(ADR_PHY_REG_15_RX_DES)) = (0x12010000)
+#define DEF_PHY_REG_16_TX_DES_EXCP() (REG32(ADR_PHY_REG_16_TX_DES_EXCP)) = (0x00000000)
+#define DEF_PHY_REG_17_TX_DES_EXCP() (REG32(ADR_PHY_REG_17_TX_DES_EXCP)) = (0x10110000)
+#define DEF_PHY_REG_18_RSSI_SNR() (REG32(ADR_PHY_REG_18_RSSI_SNR)) = (0x00fc000f)
+#define DEF_PHY_REG_19_DAC_MANUAL() (REG32(ADR_PHY_REG_19_DAC_MANUAL)) = (0x00000000)
+#define DEF_PHY_REG_20_MRX_CNT() (REG32(ADR_PHY_REG_20_MRX_CNT)) = (0x00000000)
+#define DEF_PHY_REG_21_TRX_RAMP() (REG32(ADR_PHY_REG_21_TRX_RAMP)) = (0x3c012801)
+#define DEF_PHY_REG_22_TRX_RAMP() (REG32(ADR_PHY_REG_22_TRX_RAMP)) = (0x24243724)
+#define DEF_PHY_REG_23_ANT() (REG32(ADR_PHY_REG_23_ANT)) = (0x00000011)
+#define DEF_PHY_REG_24_MTX_LEN_CNT() (REG32(ADR_PHY_REG_24_MTX_LEN_CNT)) = (0x1fff0000)
+#define DEF_PHY_REG_25_MTX_LEN_CNT() (REG32(ADR_PHY_REG_25_MTX_LEN_CNT)) = (0x1fff0000)
+#define DEF_PHY_REG_26_MRX_LEN_CNT() (REG32(ADR_PHY_REG_26_MRX_LEN_CNT)) = (0x1fff0000)
+#define DEF_PHY_REG_27_MRX_LEN_CNT() (REG32(ADR_PHY_REG_27_MRX_LEN_CNT)) = (0x1fff0000)
+#define DEF_PHY_READ_REG_04() (REG32(ADR_PHY_READ_REG_04)) = (0x00000000)
+#define DEF_PHY_READ_REG_05() (REG32(ADR_PHY_READ_REG_05)) = (0x00000000)
+#define DEF_PHY_REG_28_BIST() (REG32(ADR_PHY_REG_28_BIST)) = (0x0000fe3e)
+#define DEF_PHY_READ_REG_06_BIST() (REG32(ADR_PHY_READ_REG_06_BIST)) = (0x00000000)
+#define DEF_PHY_READ_REG_07_BIST() (REG32(ADR_PHY_READ_REG_07_BIST)) = (0x00000000)
+#define DEF_PHY_REG_29_MTRX_MAC() (REG32(ADR_PHY_REG_29_MTRX_MAC)) = (0xffffffff)
+#define DEF_PHY_READ_REG_08_MTRX_MAC() (REG32(ADR_PHY_READ_REG_08_MTRX_MAC)) = (0x00000000)
+#define DEF_PHY_READ_REG_09_MTRX_MAC() (REG32(ADR_PHY_READ_REG_09_MTRX_MAC)) = (0x00000000)
+#define DEF_PHY_REG_30_TX_UP_FIL() (REG32(ADR_PHY_REG_30_TX_UP_FIL)) = (0x0ead04f5)
+#define DEF_PHY_REG_31_TX_UP_FIL() (REG32(ADR_PHY_REG_31_TX_UP_FIL)) = (0x0fd60080)
+#define DEF_PHY_REG_32_TX_UP_FIL() (REG32(ADR_PHY_REG_32_TX_UP_FIL)) = (0x00000009)
+#define DEF_PHY_READ_TBUS() (REG32(ADR_PHY_READ_TBUS)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_00() (REG32(ADR_TX_11B_FIL_COEF_00)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_01() (REG32(ADR_TX_11B_FIL_COEF_01)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_02() (REG32(ADR_TX_11B_FIL_COEF_02)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_03() (REG32(ADR_TX_11B_FIL_COEF_03)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_04() (REG32(ADR_TX_11B_FIL_COEF_04)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_05() (REG32(ADR_TX_11B_FIL_COEF_05)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_06() (REG32(ADR_TX_11B_FIL_COEF_06)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_07() (REG32(ADR_TX_11B_FIL_COEF_07)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_08() (REG32(ADR_TX_11B_FIL_COEF_08)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_09() (REG32(ADR_TX_11B_FIL_COEF_09)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_10() (REG32(ADR_TX_11B_FIL_COEF_10)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_11() (REG32(ADR_TX_11B_FIL_COEF_11)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_12() (REG32(ADR_TX_11B_FIL_COEF_12)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_13() (REG32(ADR_TX_11B_FIL_COEF_13)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_14() (REG32(ADR_TX_11B_FIL_COEF_14)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_15() (REG32(ADR_TX_11B_FIL_COEF_15)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_16() (REG32(ADR_TX_11B_FIL_COEF_16)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_17() (REG32(ADR_TX_11B_FIL_COEF_17)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_18() (REG32(ADR_TX_11B_FIL_COEF_18)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_19() (REG32(ADR_TX_11B_FIL_COEF_19)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_20() (REG32(ADR_TX_11B_FIL_COEF_20)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_21() (REG32(ADR_TX_11B_FIL_COEF_21)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_22() (REG32(ADR_TX_11B_FIL_COEF_22)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_23() (REG32(ADR_TX_11B_FIL_COEF_23)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_24() (REG32(ADR_TX_11B_FIL_COEF_24)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_25() (REG32(ADR_TX_11B_FIL_COEF_25)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_26() (REG32(ADR_TX_11B_FIL_COEF_26)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_27() (REG32(ADR_TX_11B_FIL_COEF_27)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_28() (REG32(ADR_TX_11B_FIL_COEF_28)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_29() (REG32(ADR_TX_11B_FIL_COEF_29)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_30() (REG32(ADR_TX_11B_FIL_COEF_30)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_31() (REG32(ADR_TX_11B_FIL_COEF_31)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_32() (REG32(ADR_TX_11B_FIL_COEF_32)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_33() (REG32(ADR_TX_11B_FIL_COEF_33)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_34() (REG32(ADR_TX_11B_FIL_COEF_34)) = (0x00000000)
+#define DEF_TX_11B_FIL_COEF_35() (REG32(ADR_TX_11B_FIL_COEF_35)) = (0x00000005)
+#define DEF_TX_11B_FIL_COEF_36() (REG32(ADR_TX_11B_FIL_COEF_36)) = (0x0000003d)
+#define DEF_TX_11B_FIL_COEF_37() (REG32(ADR_TX_11B_FIL_COEF_37)) = (0x00000162)
+#define DEF_TX_11B_FIL_COEF_38() (REG32(ADR_TX_11B_FIL_COEF_38)) = (0x00000400)
+#define DEF_TX_11B_FIL_COEF_39() (REG32(ADR_TX_11B_FIL_COEF_39)) = (0x00000699)
+#define DEF_TX_11B_FIL_COEF_40() (REG32(ADR_TX_11B_FIL_COEF_40)) = (0x00000787)
+#define DEF_TX_11B_PLCP() (REG32(ADR_TX_11B_PLCP)) = (0x00000000)
+#define DEF_TX_11B_RAMP() (REG32(ADR_TX_11B_RAMP)) = (0x0000403c)
+#define DEF_TX_11B_EN_CNT_RST_N() (REG32(ADR_TX_11B_EN_CNT_RST_N)) = (0x00000001)
+#define DEF_TX_11B_EN_CNT() (REG32(ADR_TX_11B_EN_CNT)) = (0x00000000)
+#define DEF_TX_11B_PKT_GEN_CNT() (REG32(ADR_TX_11B_PKT_GEN_CNT)) = (0x00000000)
+#define DEF_RX_11B_DES_DLY() (REG32(ADR_RX_11B_DES_DLY)) = (0x00000044)
+#define DEF_RX_11B_CCA_0() (REG32(ADR_RX_11B_CCA_0)) = (0x00040000)
+#define DEF_RX_11B_CCA_1() (REG32(ADR_RX_11B_CCA_1)) = (0x00400040)
+#define DEF_RX_11B_TR_KP_KI_0() (REG32(ADR_RX_11B_TR_KP_KI_0)) = (0x00003467)
+#define DEF_RX_11B_TR_KP_KI_1() (REG32(ADR_RX_11B_TR_KP_KI_1)) = (0x00540000)
+#define DEF_RX_11B_CE_CNT_THRESHOLD() (REG32(ADR_RX_11B_CE_CNT_THRESHOLD)) = (0x12243615)
+#define DEF_RX_11B_CE_MU_0() (REG32(ADR_RX_11B_CE_MU_0)) = (0x00390002)
+#define DEF_RX_11B_CE_MU_1() (REG32(ADR_RX_11B_CE_MU_1)) = (0x03456777)
+#define DEF_RX_11B_EQ_MU_0() (REG32(ADR_RX_11B_EQ_MU_0)) = (0x00350046)
+#define DEF_RX_11B_EQ_MU_1() (REG32(ADR_RX_11B_EQ_MU_1)) = (0x00570057)
+#define DEF_RX_11B_EQ_CR_KP_KI() (REG32(ADR_RX_11B_EQ_CR_KP_KI)) = (0x00236700)
+#define DEF_RX_11B_LPF_RATE() (REG32(ADR_RX_11B_LPF_RATE)) = (0x000d1746)
+#define DEF_RX_11B_CIT_CNT_THRESHOLD() (REG32(ADR_RX_11B_CIT_CNT_THRESHOLD)) = (0x04061787)
+#define DEF_RX_11B_EQ_CH_MAIN_TAP() (REG32(ADR_RX_11B_EQ_CH_MAIN_TAP)) = (0x07800000)
+#define DEF_RX_11B_SEARCH_CNT_TH() (REG32(ADR_RX_11B_SEARCH_CNT_TH)) = (0x00c0000a)
+#define DEF_RX_11B_CCA_CONTROL() (REG32(ADR_RX_11B_CCA_CONTROL)) = (0x00000000)
+#define DEF_RX_11B_FREQUENCY_OFFSET() (REG32(ADR_RX_11B_FREQUENCY_OFFSET)) = (0x00000000)
+#define DEF_RX_11B_SNR_RSSI() (REG32(ADR_RX_11B_SNR_RSSI)) = (0x00000000)
+#define DEF_RX_11B_SFD_CRC_CNT() (REG32(ADR_RX_11B_SFD_CRC_CNT)) = (0x00000000)
+#define DEF_RX_11B_PKT_ERR_AND_PKT_ERR_CNT() (REG32(ADR_RX_11B_PKT_ERR_AND_PKT_ERR_CNT)) = (0x00000000)
+#define DEF_RX_11B_PKT_CCA_AND_PKT_CNT() (REG32(ADR_RX_11B_PKT_CCA_AND_PKT_CNT)) = (0x00000000)
+#define DEF_RX_11B_SFD_FILED_0() (REG32(ADR_RX_11B_SFD_FILED_0)) = (0x00000000)
+#define DEF_RX_11B_SFD_FIELD_1() (REG32(ADR_RX_11B_SFD_FIELD_1)) = (0x00000000)
+#define DEF_RX_11B_PKT_STAT_EN() (REG32(ADR_RX_11B_PKT_STAT_EN)) = (0x00100000)
+#define DEF_RX_11B_SOFT_RST() (REG32(ADR_RX_11B_SOFT_RST)) = (0x00000001)
+#define DEF_TX_11GN_RAMP() (REG32(ADR_TX_11GN_RAMP)) = (0x0000233c)
+#define DEF_TX_11GN_PLCP() (REG32(ADR_TX_11GN_PLCP)) = (0x5d08908e)
+#define DEF_TX_11GN_PKT_GEN_CNT() (REG32(ADR_TX_11GN_PKT_GEN_CNT)) = (0x00000000)
+#define DEF_TX_11GN_PLCP_CRC_ERR_CNT() (REG32(ADR_TX_11GN_PLCP_CRC_ERR_CNT)) = (0x00000000)
+#define DEF_RX_11GN_DES_DLY() (REG32(ADR_RX_11GN_DES_DLY)) = (0x00000044)
+#define DEF_RX_11GN_TR_0() (REG32(ADR_RX_11GN_TR_0)) = (0x00750075)
+#define DEF_RX_11GN_TR_1() (REG32(ADR_RX_11GN_TR_1)) = (0x00000075)
+#define DEF_RX_11GN_TR_2() (REG32(ADR_RX_11GN_TR_2)) = (0x10000075)
+#define DEF_RX_11GN_CCA_0() (REG32(ADR_RX_11GN_CCA_0)) = (0x38324705)
+#define DEF_RX_11GN_CCA_1() (REG32(ADR_RX_11GN_CCA_1)) = (0x30182000)
+#define DEF_RX_11GN_CCA_2() (REG32(ADR_RX_11GN_CCA_2)) = (0x20600000)
+#define DEF_RX_11GN_CCA_FFT_SCALE() (REG32(ADR_RX_11GN_CCA_FFT_SCALE)) = (0x0a010100)
+#define DEF_RX_11GN_SOFT_DEMAP_0() (REG32(ADR_RX_11GN_SOFT_DEMAP_0)) = (0x50505050)
+#define DEF_RX_11GN_SOFT_DEMAP_1() (REG32(ADR_RX_11GN_SOFT_DEMAP_1)) = (0x50000000)
+#define DEF_RX_11GN_SOFT_DEMAP_2() (REG32(ADR_RX_11GN_SOFT_DEMAP_2)) = (0x50505050)
+#define DEF_RX_11GN_SOFT_DEMAP_3() (REG32(ADR_RX_11GN_SOFT_DEMAP_3)) = (0x50505050)
+#define DEF_RX_11GN_SOFT_DEMAP_4() (REG32(ADR_RX_11GN_SOFT_DEMAP_4)) = (0x50000000)
+#define DEF_RX_11GN_SOFT_DEMAP_5() (REG32(ADR_RX_11GN_SOFT_DEMAP_5)) = (0x00000000)
+#define DEF_RX_11GN_SYM_BOUND_0() (REG32(ADR_RX_11GN_SYM_BOUND_0)) = (0x00001420)
+#define DEF_RX_11GN_SYM_BOUND_1() (REG32(ADR_RX_11GN_SYM_BOUND_1)) = (0x0000200a)
+#define DEF_RX_11GN_CCA_PWR() (REG32(ADR_RX_11GN_CCA_PWR)) = (0x30000280)
+#define DEF_RX_11GN_CCA_CNT() (REG32(ADR_RX_11GN_CCA_CNT)) = (0x30023002)
+#define DEF_RX_11GN_CCA_ATCOR_RE_CHECK() (REG32(ADR_RX_11GN_CCA_ATCOR_RE_CHECK)) = (0x0000003a)
+#define DEF_RX_11GN_VTB_TB() (REG32(ADR_RX_11GN_VTB_TB)) = (0x40000000)
+#define DEF_RX_11GN_ERR_UPDATE() (REG32(ADR_RX_11GN_ERR_UPDATE)) = (0x009e007e)
+#define DEF_RX_11GN_SHORT_GI() (REG32(ADR_RX_11GN_SHORT_GI)) = (0x00044400)
+#define DEF_RX_11GN_CHANNEL_UPDATE() (REG32(ADR_RX_11GN_CHANNEL_UPDATE)) = (0x82000000)
+#define DEF_RX_11GN_PKT_FORMAT_0() (REG32(ADR_RX_11GN_PKT_FORMAT_0)) = (0x02003030)
+#define DEF_RX_11GN_PKT_FORMAT_1() (REG32(ADR_RX_11GN_PKT_FORMAT_1)) = (0x092a092a)
+#define DEF_RX_11GN_TX_TIME() (REG32(ADR_RX_11GN_TX_TIME)) = (0x00700010)
+#define DEF_RX_11GN_STBC_TR_KP_KI() (REG32(ADR_RX_11GN_STBC_TR_KP_KI)) = (0x00007575)
+#define DEF_RX_11GN_BIST_0() (REG32(ADR_RX_11GN_BIST_0)) = (0x0001fe3e)
+#define DEF_RX_11GN_BIST_1() (REG32(ADR_RX_11GN_BIST_1)) = (0x0000fe3e)
+#define DEF_RX_11GN_BIST_2() (REG32(ADR_RX_11GN_BIST_2)) = (0x00000000)
+#define DEF_RX_11GN_BIST_3() (REG32(ADR_RX_11GN_BIST_3)) = (0x00000000)
+#define DEF_RX_11GN_BIST_4() (REG32(ADR_RX_11GN_BIST_4)) = (0x00000000)
+#define DEF_RX_11GN_BIST_5() (REG32(ADR_RX_11GN_BIST_5)) = (0x00000000)
+#define DEF_RX_11GN_SPECTRUM_ANALYZER() (REG32(ADR_RX_11GN_SPECTRUM_ANALYZER)) = (0x00000000)
+#define DEF_RX_11GN_READ_0() (REG32(ADR_RX_11GN_READ_0)) = (0x00000000)
+#define DEF_RX_11GN_FREQ_OFFSET() (REG32(ADR_RX_11GN_FREQ_OFFSET)) = (0x00000000)
+#define DEF_RX_11GN_SIGNAL_FIELD_0() (REG32(ADR_RX_11GN_SIGNAL_FIELD_0)) = (0x00000000)
+#define DEF_RX_11GN_SIGNAL_FIELD_1() (REG32(ADR_RX_11GN_SIGNAL_FIELD_1)) = (0x00000000)
+#define DEF_RX_11GN_PKT_ERR_CNT() (REG32(ADR_RX_11GN_PKT_ERR_CNT)) = (0x00000000)
+#define DEF_RX_11GN_PKT_CCA_AND_PKT_CNT() (REG32(ADR_RX_11GN_PKT_CCA_AND_PKT_CNT)) = (0x00000000)
+#define DEF_RX_11GN_SERVICE_LENGTH_FIELD() (REG32(ADR_RX_11GN_SERVICE_LENGTH_FIELD)) = (0x00000000)
+#define DEF_RX_11GN_RATE() (REG32(ADR_RX_11GN_RATE)) = (0x00000000)
+#define DEF_RX_11GN_STAT_EN() (REG32(ADR_RX_11GN_STAT_EN)) = (0x00100001)
+#define DEF_RX_11GN_SOFT_RST() (REG32(ADR_RX_11GN_SOFT_RST)) = (0x00000001)
+#define DEF_RF_CONTROL_0() (REG32(ADR_RF_CONTROL_0)) = (0x00000000)
+#define DEF_RF_CONTROL_1() (REG32(ADR_RF_CONTROL_1)) = (0x00008000)
+#define DEF_TX_IQ_CONTROL_0() (REG32(ADR_TX_IQ_CONTROL_0)) = (0x00200020)
+#define DEF_TX_IQ_CONTROL_1() (REG32(ADR_TX_IQ_CONTROL_1)) = (0x00028080)
+#define DEF_TX_IQ_CONTROL_2() (REG32(ADR_TX_IQ_CONTROL_2)) = (0x00000000)
+#define DEF_TX_COMPENSATION_CONTROL() (REG32(ADR_TX_COMPENSATION_CONTROL)) = (0x00000000)
+#define DEF_RX_COMPENSATION_CONTROL() (REG32(ADR_RX_COMPENSATION_CONTROL)) = (0x00000000)
+#define DEF_RX_OBSERVATION_CIRCUIT_0() (REG32(ADR_RX_OBSERVATION_CIRCUIT_0)) = (0x000028ff)
+#define DEF_RX_OBSERVATION_CIRCUIT_1() (REG32(ADR_RX_OBSERVATION_CIRCUIT_1)) = (0x00000000)
+#define DEF_RX_OBSERVATION_CIRCUIT_2() (REG32(ADR_RX_OBSERVATION_CIRCUIT_2)) = (0x00000000)
+#define DEF_RX_OBSERVATION_CIRCUIT_3() (REG32(ADR_RX_OBSERVATION_CIRCUIT_3)) = (0x00000000)
+#define DEF_RF_IQ_CONTROL_0() (REG32(ADR_RF_IQ_CONTROL_0)) = (0x00000202)
+#define DEF_RF_IQ_CONTROL_1() (REG32(ADR_RF_IQ_CONTROL_1)) = (0x00ffc200)
+#define DEF_RF_IQ_CONTROL_2() (REG32(ADR_RF_IQ_CONTROL_2)) = (0x00000000)
+#define DEF_RF_IQ_CONTROL_3() (REG32(ADR_RF_IQ_CONTROL_3)) = (0x00000000)
+#define DEF_DPD_CONTROL() (REG32(ADR_DPD_CONTROL)) = (0x00000000)
+#define DEF_DPD_GAIN_TABLE_0() (REG32(ADR_DPD_GAIN_TABLE_0)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_1() (REG32(ADR_DPD_GAIN_TABLE_1)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_2() (REG32(ADR_DPD_GAIN_TABLE_2)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_3() (REG32(ADR_DPD_GAIN_TABLE_3)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_4() (REG32(ADR_DPD_GAIN_TABLE_4)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_5() (REG32(ADR_DPD_GAIN_TABLE_5)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_6() (REG32(ADR_DPD_GAIN_TABLE_6)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_7() (REG32(ADR_DPD_GAIN_TABLE_7)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_8() (REG32(ADR_DPD_GAIN_TABLE_8)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_9() (REG32(ADR_DPD_GAIN_TABLE_9)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_A() (REG32(ADR_DPD_GAIN_TABLE_A)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_B() (REG32(ADR_DPD_GAIN_TABLE_B)) = (0x02000200)
+#define DEF_DPD_GAIN_TABLE_C() (REG32(ADR_DPD_GAIN_TABLE_C)) = (0x02000200)
+#define DEF_DPD_PH_TABLE_0() (REG32(ADR_DPD_PH_TABLE_0)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_1() (REG32(ADR_DPD_PH_TABLE_1)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_2() (REG32(ADR_DPD_PH_TABLE_2)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_3() (REG32(ADR_DPD_PH_TABLE_3)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_4() (REG32(ADR_DPD_PH_TABLE_4)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_5() (REG32(ADR_DPD_PH_TABLE_5)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_6() (REG32(ADR_DPD_PH_TABLE_6)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_7() (REG32(ADR_DPD_PH_TABLE_7)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_8() (REG32(ADR_DPD_PH_TABLE_8)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_9() (REG32(ADR_DPD_PH_TABLE_9)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_A() (REG32(ADR_DPD_PH_TABLE_A)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_B() (REG32(ADR_DPD_PH_TABLE_B)) = (0x00000000)
+#define DEF_DPD_PH_TABLE_C() (REG32(ADR_DPD_PH_TABLE_C)) = (0x00000000)
+#define DEF_DPD_GAIN_ESTIMATION_0() (REG32(ADR_DPD_GAIN_ESTIMATION_0)) = (0x00000000)
+#define DEF_DPD_GAIN_ESTIMATION_1() (REG32(ADR_DPD_GAIN_ESTIMATION_1)) = (0x00000100)
+#define DEF_DPD_GAIN_ESTIMATION_2() (REG32(ADR_DPD_GAIN_ESTIMATION_2)) = (0x00000000)
+#define DEF_TX_GAIN_FACTOR() (REG32(ADR_TX_GAIN_FACTOR)) = (0x80808080)
+#define DEF_HARD_WIRE_PIN_REGISTER() (REG32(ADR_HARD_WIRE_PIN_REGISTER)) = (0x00004000)
+#define DEF_MANUAL_ENABLE_REGISTER() (REG32(ADR_MANUAL_ENABLE_REGISTER)) = (0x00000fc0)
+#define DEF_LDO_REGISTER() (REG32(ADR_LDO_REGISTER)) = (0x000db71b)
+#define DEF_ABB_REGISTER_1() (REG32(ADR_ABB_REGISTER_1)) = (0x151558dd)
+#define DEF_ABB_REGISTER_2() (REG32(ADR_ABB_REGISTER_2)) = (0x01011a88)
+#define DEF_TX_FE_REGISTER() (REG32(ADR_TX_FE_REGISTER)) = (0x3d3e84fe)
+#define DEF_RX_FE_REGISTER_1() (REG32(ADR_RX_FE_REGISTER_1)) = (0x03457579)
+#define DEF_RX_FE_GAIN_DECODER_REGISTER_1() (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_1)) = (0x000103a7)
+#define DEF_RX_FE_GAIN_DECODER_REGISTER_2() (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_2)) = (0x000103a6)
+#define DEF_RX_FE_GAIN_DECODER_REGISTER_3() (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_3)) = (0x00012001)
+#define DEF_RX_FE_GAIN_DECODER_REGISTER_4() (REG32(ADR_RX_FE_GAIN_DECODER_REGISTER_4)) = (0x00036000)
+#define DEF_RX_TX_FSM_REGISTER() (REG32(ADR_RX_TX_FSM_REGISTER)) = (0x00030ca8)
+#define DEF_RX_ADC_REGISTER() (REG32(ADR_RX_ADC_REGISTER)) = (0x20ea0224)
+#define DEF_TX_DAC_REGISTER() (REG32(ADR_TX_DAC_REGISTER)) = (0x44000655)
+#define DEF_SX_ENABLE_REGISTER() (REG32(ADR_SX_ENABLE_REGISTER)) = (0x0003e07c)
+#define DEF_SYN_REGISTER_1() (REG32(ADR_SYN_REGISTER_1)) = (0xaa800000)
+#define DEF_SYN_REGISTER_2() (REG32(ADR_SYN_REGISTER_2)) = (0x00550800)
+#define DEF_SYN_PFD_CHP() (REG32(ADR_SYN_PFD_CHP)) = (0x07c0894a)
+#define DEF_SYN_VCO_LOBF() (REG32(ADR_SYN_VCO_LOBF)) = (0xfcccca27)
+#define DEF_SYN_DIV_SDM_XOSC() (REG32(ADR_SYN_DIV_SDM_XOSC)) = (0x07700830)
+#define DEF_SYN_KVCO_XO_FINE_TUNE_CBANK() (REG32(ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)) = (0x00440000)
+#define DEF_SYN_LCK_VT() (REG32(ADR_SYN_LCK_VT)) = (0x00007ff4)
+#define DEF_DPLL_VCO_REGISTER() (REG32(ADR_DPLL_VCO_REGISTER)) = (0x0000000e)
+#define DEF_DPLL_CP_PFD_REGISTER() (REG32(ADR_DPLL_CP_PFD_REGISTER)) = (0x00088008)
+#define DEF_DPLL_DIVIDER_REGISTER() (REG32(ADR_DPLL_DIVIDER_REGISTER)) = (0x00406000)
+#define DEF_DCOC_IDAC_REGISTER1() (REG32(ADR_DCOC_IDAC_REGISTER1)) = (0x08820820)
+#define DEF_DCOC_IDAC_REGISTER2() (REG32(ADR_DCOC_IDAC_REGISTER2)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER3() (REG32(ADR_DCOC_IDAC_REGISTER3)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER4() (REG32(ADR_DCOC_IDAC_REGISTER4)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER5() (REG32(ADR_DCOC_IDAC_REGISTER5)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER6() (REG32(ADR_DCOC_IDAC_REGISTER6)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER7() (REG32(ADR_DCOC_IDAC_REGISTER7)) = (0x00820820)
+#define DEF_DCOC_IDAC_REGISTER8() (REG32(ADR_DCOC_IDAC_REGISTER8)) = (0x00820820)
+#define DEF_RCAL_REGISTER() (REG32(ADR_RCAL_REGISTER)) = (0x00004080)
+#define DEF_SX_LCK_BIN_REGISTERS_I() (REG32(ADR_SX_LCK_BIN_REGISTERS_I)) = (0x20080080)
+#define DEF_TRX_DUMMY_REGISTER() (REG32(ADR_TRX_DUMMY_REGISTER)) = (0xaaaaaaaa)
+#define DEF_SX_DUMMY_REGISTER() (REG32(ADR_SX_DUMMY_REGISTER)) = (0xaaaaaaaa)
+#define DEF_DPLL_FB_DIVIDER_REGISTERS_II() (REG32(ADR_DPLL_FB_DIVIDER_REGISTERS_II)) = (0x00ec2ec5)
+#define DEF_SX_LCK_BIN_REGISTERS_II() (REG32(ADR_SX_LCK_BIN_REGISTERS_II)) = (0x00000f13)
+#define DEF_RC_OSC_32K_CAL_REGISTERS() (REG32(ADR_RC_OSC_32K_CAL_REGISTERS)) = (0x00098900)
+#define DEF_RF_D_DIGITAL_DEBUG_PORT_REGISTER() (REG32(ADR_RF_D_DIGITAL_DEBUG_PORT_REGISTER)) = (0x00000000)
+#define DEF_MMU_CTRL() (REG32(ADR_MMU_CTRL)) = (0x00002042)
+#define DEF_HS_CTRL() (REG32(ADR_HS_CTRL)) = (0x00000000)
+#define DEF_CPU_POR0_7() (REG32(ADR_CPU_POR0_7)) = (0x00000000)
+#define DEF_CPU_POR8_F() (REG32(ADR_CPU_POR8_F)) = (0x00000000)
+#define DEF_REG_LEN_CTRL() (REG32(ADR_REG_LEN_CTRL)) = (0x00000f0f)
+#define DEF_DMN_READ_BYPASS() (REG32(ADR_DMN_READ_BYPASS)) = (0x0000ffff)
+#define DEF_ALC_RLS_ABORT() (REG32(ADR_ALC_RLS_ABORT)) = (0x00000000)
+#define DEF_DEBUG_CTL() (REG32(ADR_DEBUG_CTL)) = (0x00000000)
+#define DEF_DEBUG_OUT() (REG32(ADR_DEBUG_OUT)) = (0x00000000)
+#define DEF_MMU_STATUS() (REG32(ADR_MMU_STATUS)) = (0x00000000)
+#define DEF_DMN_STATUS() (REG32(ADR_DMN_STATUS)) = (0x00000000)
+#define DEF_TAG_STATUS() (REG32(ADR_TAG_STATUS)) = (0x00000000)
+#define DEF_DMN_MCU_STATUS() (REG32(ADR_DMN_MCU_STATUS)) = (0x00000000)
+#define DEF_MB_IDTBL_0_STATUS() (REG32(ADR_MB_IDTBL_0_STATUS)) = (0x00000000)
+#define DEF_MB_IDTBL_1_STATUS() (REG32(ADR_MB_IDTBL_1_STATUS)) = (0x00000000)
+#define DEF_MB_IDTBL_2_STATUS() (REG32(ADR_MB_IDTBL_2_STATUS)) = (0x00000000)
+#define DEF_MB_IDTBL_3_STATUS() (REG32(ADR_MB_IDTBL_3_STATUS)) = (0x00000000)
+#define DEF_PKT_IDTBL_0_STATUS() (REG32(ADR_PKT_IDTBL_0_STATUS)) = (0x00000000)
+#define DEF_PKT_IDTBL_1_STATUS() (REG32(ADR_PKT_IDTBL_1_STATUS)) = (0x00000000)
+#define DEF_PKT_IDTBL_2_STATUS() (REG32(ADR_PKT_IDTBL_2_STATUS)) = (0x00000000)
+#define DEF_PKT_IDTBL_3_STATUS() (REG32(ADR_PKT_IDTBL_3_STATUS)) = (0x00000000)
+#define DEF_DMN_IDTBL_0_STATUS() (REG32(ADR_DMN_IDTBL_0_STATUS)) = (0x00000000)
+#define DEF_DMN_IDTBL_1_STATUS() (REG32(ADR_DMN_IDTBL_1_STATUS)) = (0x00000000)
+#define DEF_DMN_IDTBL_2_STATUS() (REG32(ADR_DMN_IDTBL_2_STATUS)) = (0x00000000)
+#define DEF_DMN_IDTBL_3_STATUS() (REG32(ADR_DMN_IDTBL_3_STATUS)) = (0x00000000)
+#define DEF_MB_NEQID_0_STATUS() (REG32(ADR_MB_NEQID_0_STATUS)) = (0x00000000)
+#define DEF_MB_NEQID_1_STATUS() (REG32(ADR_MB_NEQID_1_STATUS)) = (0x00000000)
+#define DEF_MB_NEQID_2_STATUS() (REG32(ADR_MB_NEQID_2_STATUS)) = (0x00000000)
+#define DEF_MB_NEQID_3_STATUS() (REG32(ADR_MB_NEQID_3_STATUS)) = (0x00000000)
+#define DEF_PKT_NEQID_0_STATUS() (REG32(ADR_PKT_NEQID_0_STATUS)) = (0x00000000)
+#define DEF_PKT_NEQID_1_STATUS() (REG32(ADR_PKT_NEQID_1_STATUS)) = (0x00000000)
+#define DEF_PKT_NEQID_2_STATUS() (REG32(ADR_PKT_NEQID_2_STATUS)) = (0x00000000)
+#define DEF_PKT_NEQID_3_STATUS() (REG32(ADR_PKT_NEQID_3_STATUS)) = (0x00000000)
+#define DEF_ALC_NOCHG_ID_STATUS() (REG32(ADR_ALC_NOCHG_ID_STATUS)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_0() (REG32(ADR_TAG_SRAM0_F_STATUS_0)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_1() (REG32(ADR_TAG_SRAM0_F_STATUS_1)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_2() (REG32(ADR_TAG_SRAM0_F_STATUS_2)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_3() (REG32(ADR_TAG_SRAM0_F_STATUS_3)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_4() (REG32(ADR_TAG_SRAM0_F_STATUS_4)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_5() (REG32(ADR_TAG_SRAM0_F_STATUS_5)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_6() (REG32(ADR_TAG_SRAM0_F_STATUS_6)) = (0x00000000)
+#define DEF_TAG_SRAM0_F_STATUS_7() (REG32(ADR_TAG_SRAM0_F_STATUS_7)) = (0x00000000)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg_sim.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg_sim.h
new file mode 100644
index 0000000000000..b682dd7794409
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv6200_reg_sim.h
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "ssv6200_reg.h"
+#define BANK_COUNT 49
+static const u32 BASE_BANK_SSV6200[] = {
+ SYS_REG_BASE ,
+ WBOOT_REG_BASE ,
+ TU0_US_REG_BASE ,
+ TU1_US_REG_BASE ,
+ TU2_US_REG_BASE ,
+ TU3_US_REG_BASE ,
+ TM0_MS_REG_BASE ,
+ TM1_MS_REG_BASE ,
+ TM2_MS_REG_BASE ,
+ TM3_MS_REG_BASE ,
+ MCU_WDT_REG_BASE ,
+ SYS_WDT_REG_BASE ,
+ GPIO_REG_BASE ,
+ SD_REG_BASE ,
+ SPI_REG_BASE ,
+ CSR_I2C_MST_BASE ,
+ UART_REG_BASE ,
+ DAT_UART_REG_BASE ,
+ INT_REG_BASE ,
+ DBG_SPI_REG_BASE ,
+ FLASH_SPI_REG_BASE ,
+ DMA_REG_BASE ,
+ CSR_PMU_BASE ,
+ CSR_RTC_BASE ,
+ RTC_RAM_BASE ,
+ D2_DMA_REG_BASE ,
+ HCI_REG_BASE ,
+ CO_REG_BASE ,
+ EFS_REG_BASE ,
+ SMS4_REG_BASE ,
+ MRX_REG_BASE ,
+ AMPDU_REG_BASE ,
+ MT_REG_CSR_BASE ,
+ TXQ0_MT_Q_REG_CSR_BASE ,
+ TXQ1_MT_Q_REG_CSR_BASE ,
+ TXQ2_MT_Q_REG_CSR_BASE ,
+ TXQ3_MT_Q_REG_CSR_BASE ,
+ TXQ4_MT_Q_REG_CSR_BASE ,
+ HIF_INFO_BASE ,
+ PHY_RATE_INFO_BASE ,
+ MAC_GLB_SET_BASE ,
+ BTCX_REG_BASE ,
+ MIB_REG_BASE ,
+ CBR_A_REG_BASE ,
+ MB_REG_BASE ,
+ ID_MNG_REG_BASE ,
+ CSR_PHY_BASE ,
+ CSR_RF_BASE ,
+ MMU_REG_BASE ,
+ 0x00000000
+};
+static const char* STR_BANK_SSV6200[] = {
+ "SYS_REG" ,
+ "WBOOT_REG" ,
+ "TU0_US_REG" ,
+ "TU1_US_REG" ,
+ "TU2_US_REG" ,
+ "TU3_US_REG" ,
+ "TM0_MS_REG" ,
+ "TM1_MS_REG" ,
+ "TM2_MS_REG" ,
+ "TM3_MS_REG" ,
+ "MCU_WDT_REG" ,
+ "SYS_WDT_REG" ,
+ "GPIO_REG" ,
+ "SD_REG" ,
+ "SPI_REG" ,
+ "CSR_I2C_MST" ,
+ "UART_REG" ,
+ "DAT_UART_REG" ,
+ "INT_REG" ,
+ "DBG_SPI_REG" ,
+ "FLASH_SPI_REG" ,
+ "DMA_REG" ,
+ "CSR_PMU" ,
+ "CSR_RTC" ,
+ "RTC_RAM" ,
+ "D2_DMA_REG" ,
+ "HCI_REG" ,
+ "CO_REG" ,
+ "EFS_REG" ,
+ "SMS4_REG" ,
+ "MRX_REG" ,
+ "AMPDU_REG" ,
+ "MT_REG_CSR" ,
+ "TXQ0_MT_Q_REG_CSR" ,
+ "TXQ1_MT_Q_REG_CSR" ,
+ "TXQ2_MT_Q_REG_CSR" ,
+ "TXQ3_MT_Q_REG_CSR" ,
+ "TXQ4_MT_Q_REG_CSR" ,
+ "HIF_INFO" ,
+ "PHY_RATE_INFO" ,
+ "MAC_GLB_SET" ,
+ "BTCX_REG" ,
+ "MIB_REG" ,
+ "CBR_A_REG" ,
+ "MB_REG" ,
+ "ID_MNG_REG" ,
+ "CSR_PHY" ,
+ "CSR_RF" ,
+ "MMU_REG" ,
+ ""
+};
+static const u32 SIZE_BANK_SSV6200[] = {
+ SYS_REG_BANK_SIZE ,
+ WBOOT_REG_BANK_SIZE ,
+ TU0_US_REG_BANK_SIZE ,
+ TU1_US_REG_BANK_SIZE ,
+ TU2_US_REG_BANK_SIZE ,
+ TU3_US_REG_BANK_SIZE ,
+ TM0_MS_REG_BANK_SIZE ,
+ TM1_MS_REG_BANK_SIZE ,
+ TM2_MS_REG_BANK_SIZE ,
+ TM3_MS_REG_BANK_SIZE ,
+ MCU_WDT_REG_BANK_SIZE ,
+ SYS_WDT_REG_BANK_SIZE ,
+ GPIO_REG_BANK_SIZE ,
+ SD_REG_BANK_SIZE ,
+ SPI_REG_BANK_SIZE ,
+ CSR_I2C_MST_BANK_SIZE ,
+ UART_REG_BANK_SIZE ,
+ DAT_UART_REG_BANK_SIZE ,
+ INT_REG_BANK_SIZE ,
+ DBG_SPI_REG_BANK_SIZE ,
+ FLASH_SPI_REG_BANK_SIZE ,
+ DMA_REG_BANK_SIZE ,
+ CSR_PMU_BANK_SIZE ,
+ CSR_RTC_BANK_SIZE ,
+ RTC_RAM_BANK_SIZE ,
+ D2_DMA_REG_BANK_SIZE ,
+ HCI_REG_BANK_SIZE ,
+ CO_REG_BANK_SIZE ,
+ EFS_REG_BANK_SIZE ,
+ SMS4_REG_BANK_SIZE ,
+ MRX_REG_BANK_SIZE ,
+ AMPDU_REG_BANK_SIZE ,
+ MT_REG_CSR_BANK_SIZE ,
+ TXQ0_MT_Q_REG_CSR_BANK_SIZE ,
+ TXQ1_MT_Q_REG_CSR_BANK_SIZE ,
+ TXQ2_MT_Q_REG_CSR_BANK_SIZE ,
+ TXQ3_MT_Q_REG_CSR_BANK_SIZE ,
+ TXQ4_MT_Q_REG_CSR_BANK_SIZE ,
+ HIF_INFO_BANK_SIZE ,
+ PHY_RATE_INFO_BANK_SIZE ,
+ MAC_GLB_SET_BANK_SIZE ,
+ BTCX_REG_BANK_SIZE ,
+ MIB_REG_BANK_SIZE ,
+ CBR_A_REG_BANK_SIZE ,
+ MB_REG_BANK_SIZE ,
+ ID_MNG_REG_BANK_SIZE ,
+ CSR_PHY_BANK_SIZE ,
+ CSR_RF_BANK_SIZE ,
+ MMU_REG_BANK_SIZE ,
+ 0x00000000
+};
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_cfg.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_cfg.h
new file mode 100644
index 0000000000000..f0bb95ac565a2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_cfg.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_CFG_H_
+#define _SSV_CFG_H_ 
+#define SSV6200_HW_CAP_HT 0x00000001
+#define SSV6200_HW_CAP_GF 0x00000002
+#define SSV6200_HW_CAP_2GHZ 0x00000004
+#define SSV6200_HW_CAP_5GHZ 0x00000008
+#define SSV6200_HW_CAP_SECURITY 0x00000010
+#define SSV6200_HT_CAP_SGI_20 0x00000020
+#define SSV6200_HT_CAP_SGI_40 0x00000040
+#define SSV6200_HW_CAP_AP 0x00000080
+#define SSV6200_HW_CAP_P2P 0x00000100
+#define SSV6200_HW_CAP_AMPDU_RX 0x00000200
+#define SSV6200_HW_CAP_AMPDU_TX 0x00000400
+#define SSV6200_HW_CAP_TDLS 0x00000800
+#define EXTERNEL_CONFIG_SUPPORT 64
+struct ssv6xxx_cfg {
+    u32 hw_caps;
+    u32 def_chan;
+    u32 crystal_type;
+    u32 volt_regulator;
+    u32 force_chip_identity;
+    u8 maddr[2][6];
+    u32 n_maddr;
+    u32 use_wpa2_only;
+    u32 ignore_reset_in_ap;
+    u32 r_calbration_result;
+    u32 sar_result;
+    u32 crystal_frequency_offset;
+    u32 tx_power_index_1;
+    u32 tx_power_index_2;
+    u32 chip_identity;
+    u32 wifi_tx_gain_level_gn;
+    u32 wifi_tx_gain_level_b;
+    u32 rssi_ctl;
+    u32 sr_bhvr;
+    u32 configuration[EXTERNEL_CONFIG_SUPPORT+1][2];
+    u8 firmware_path[128];
+    u8 flash_bin_path[128];
+    u8 mac_address_path[128];
+    u8 mac_output_path[128];
+    u32 ignore_efuse_mac;
+    u32 mac_address_mode;
+};
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_conf_parser.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_conf_parser.h
new file mode 100644
index 0000000000000..8c02348308c34
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_conf_parser.h
@@ -0,0 +1,32 @@
+#ifndef __SSV_CONF_PARSER_H__
+#define __SSV_CONF_PARSER_H__
+char const *conf_parser[] = {
+"CONFIG_SSV_SUPPORT_ANDROID",
+"CONFIG_FW_ALIGNMENT_CHECK",
+"CONFIG_PLATFORM_SDIO_OUTPUT_TIMING_3",
+"CONFIG_PLATFORM_SDIO_BLOCK_SIZE_128",
+"MULTI_THREAD_ENCRYPT",
+"KTHREAD_BIND",
+"CONFIG_SSV_RSSI",
+"CONFIG_SSV_VENDOR_EXT_SUPPORT",
+"CONFIG_SSV_CABRIO_E",
+"CONFIG_SSV6200_CLI_ENABLE",
+"CONFIG_SSV6XXX_DEBUGFS",
+"CONFIG_SSV_TX_LOWTHRESHOLD",
+"RATE_CONTROL_REALTIME_UPDATA",
+"CONFIG_SSV6200_HAS_RX_WORKQUEUE",
+"USE_THREAD_TX",
+"ENABLE_AGGREGATE_IN_TIME",
+"ENABLE_INCREMENTAL_AGGREGATION",
+"USE_GENERIC_DECI_TBL",
+"USE_LOCAL_CRYPTO",
+"USE_LOCAL_WEP_CRYPTO",
+"USE_LOCAL_CCMP_CRYPTO",
+"USE_LOCAL_SMS4_CRYPTO",
+"CONFIG_SSV_WAPI",
+"FW_WSID_WATCH_LIST",
+"SSV6200_ECO",
+"HAS_CRYPTO_LOCK",
+"ENABLE_TX_Q_FLOW_CONTROL",
+""};
+#endif // __SSV_CONF_PARSER_H__
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_firmware_version.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_firmware_version.h
new file mode 100644
index 0000000000000..046e1d16bd5dc
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_firmware_version.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_FIRMWARE_VERSION_H_
+#define _SSV_FIRMWARE_VERSION_H_ 
+static u32 ssv_firmware_version = 16380;
+#define SSV_FIRMWARE_URl "http://192.168.15.30/svn/software/wifi/tag/smac-release-tag/6051.Q0.1009.21.000000/ssv6xxx/smac/firmware"
+#define FIRMWARE_COMPILERHOST "ssv-ThinkPad-X230"
+#define FIRMWARE_COMPILERDATE "11-06-2017-09:17:18"
+#define FIRMWARE_COMPILEROS "linux"
+#define FIRMWARE_COMPILEROSARCH "x86_64-linux-gnu-thread-multi"
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_version.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_version.h
new file mode 100644
index 0000000000000..4a96b69576780
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/include/ssv_version.h
@@ -0,0 +1,13 @@
+#ifndef _SSV_VERSION_H_
+#define _SSV_VERSION_H_
+
+static u32 ssv_root_version = 16529;
+
+#define SSV_ROOT_URl "http://192.168.15.30/svn/software/project/release/android/box/rk3x28/6051.Q0.1009.21.400401/ssv6xxx"
+#define COMPILERHOST "icomm-buildserver-T320"
+#define COMPILERDATE "12-08-2017-10:34:54"
+#define COMPILEROS "linux"
+#define COMPILEROSARCH "x86_64-linux-gnu-thread-multi"
+
+#endif
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh
new file mode 100644
index 0000000000000..93adffb918e23
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh
@@ -0,0 +1,38 @@
+#!/bin/bash
+# Script to convert defines in compiler option in to C's defines
+# Should be executed in make file and it take ccflags-y as the
+# compiler options. The content will be redirected to the first arguement.
+
+temp=$1_temp
+
+echo "#ifndef __SSV_CONF_PARSER_H__" > $temp
+echo "#define __SSV_CONF_PARSER_H__" >> $temp
+
+echo "char const *conf_parser[] = {" >> $temp
+
+for flag in ${ccflags-y}; do
+	if [[ "$flag" =~ ^-D.* ]]; then
+		def=${flag:2}
+        if [[ "$def" =~ .= ]]; then
+            def_1=${def/\=/_}
+            echo "\"$def_1\"," >> $temp
+        else
+		    echo "\"$def\"," >> $temp
+        fi
+	fi
+done
+
+echo "\"\"};" >> $temp
+
+echo "#endif // __SSV_CONF_PARSER_H__" >> $temp
+if [ -f $1 ];
+then
+	DIFF=$(diff $1 $temp)
+	if [ "$DIFF" == "" ]; then
+    		rm $temp
+	else
+    		mv $temp $1
+	fi
+else
+	mv $temp $1
+fi
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platform-config.mak b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platform-config.mak
new file mode 100644
index 0000000000000..00d4792a05251
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platform-config.mak
@@ -0,0 +1,97 @@
+
+CONFIG_SSV6200_CORE=m
+#ccflags-y += -DCONFIG_SSV6200_CORE
+
+###########################################################################
+# Compiler options                                                        #
+###########################################################################
+ccflags-y += -Werror
+
+# Enable -g to help debug. Deassembly from .o to .S would help to track to 
+# the problomatic line from call stack dump.
+ccflags-y += -g
+
+############################################################
+# If you change the settings, please change the file synchronization
+# smac\firmware\include\config.h & compiler firmware
+############################################################
+#ccflags-y += -DCONFIG_SSV_CABRIO_A
+ccflags-y += -DCONFIG_SSV_CABRIO_E
+
+#CONFIG_SSV_SUPPORT_BTCX=y
+
+ccflags-y += -DCONFIG_SSV6200_CLI_ENABLE
+
+#ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+
+
+#PADPD
+#ccflags-y += -DCONFIG_SSV_DPD
+
+#ccflags-y += -DCONFIG_SSV_CABRIO_MB_DEBUG
+ccflags-y += -DCONFIG_SSV6XXX_DEBUGFS
+
+#SDIO
+ccflags-y += -DCONFIG_SSV_TX_LOWTHRESHOLD
+
+############################################################
+# Rate control update for MPDU.
+############################################################
+ccflags-y += -DRATE_CONTROL_REALTIME_UPDATA
+
+#workaround
+#ccflags-y += -DCONFIG_SSV_CABRIO_EXT_PA
+
+############################################################
+# NOTE:
+#    Only one of the following flags could be turned on.
+# It also turned off the following flags. In this case, 
+# pure software security or pure hardware security is used.
+#
+############################################################
+#ccflags-y += -DCONFIG_SSV_SW_ENCRYPT_HW_DECRYPT
+#ccflags-y += -DCONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+
+# FOR WFA
+#ccflags-y += -DWIFI_CERTIFIED
+
+#ccflags-y += -DCONFIG_SSV_SDIO_EXT_INT
+
+#######################################################
+ccflags-y += -DCONFIG_SSV6200_HAS_RX_WORKQUEUE
+#ccflags-y += -DUSE_THREAD_RX
+ccflags-y += -DUSE_THREAD_TX
+ccflags-y += -DENABLE_AGGREGATE_IN_TIME
+ccflags-y += -DENABLE_INCREMENTAL_AGGREGATION
+
+# Generic decision table applicable to both AP and STA modes.
+ccflags-y += -DUSE_GENERIC_DECI_TBL
+
+# Use crypto in SSV driver.
+ccflags-y += -DUSE_LOCAL_CRYPTO
+ccflags-y += -DUSE_LOCAL_WEP_CRYPTO
+#ccflags-y += -DUSE_LOCAL_TKIP_CRYPTO
+ccflags-y += -DUSE_LOCAL_CCMP_CRYPTO
+ccflags-y += -DUSE_LOCAL_SMS4_CRYPTO
+
+ccflags-y += -DCONFIG_SSV_WAPI
+
+ccflags-y += -DFW_WSID_WATCH_LIST
+#ccflags-y += -DUSE_BATCH_RX
+#ccflags-y += -DCONFIG_IRQ_DEBUG_COUNT
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+
+
+ccflags-y += -DSSV6200_ECO
+#ccflags-y += -DENABLE_WAKE_IO_ISR_WHEN_HCI_ENQUEUE
+ccflags-y += -DHAS_CRYPTO_LOCK
+ccflags-y += -DENABLE_TX_Q_FLOW_CONTROL
+
+#ccflags-y += -DCONFIG_DEBUG_SKB_TIMESTAMP
+
+
+#enable p2p client to parse GO broadcast noa
+#ccflags-y += -DCONFIG_P2P_NOA
+
+#enable rx management frame check
+#ccflags-y += -DCONFIG_RX_MGMT_CHECK
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-generic-wlan.c
new file mode 100644
index 0000000000000..f690e837c57f1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-generic-wlan.c
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc=0;
+#define SDIO_ID 1
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert);
+extern int wifi_pm_gpio_ctrl(char* name, int level);
+static int ssv_wifi_power(int on)
+{
+        printk("ssv pwr on=%d\n",on);
+ if(on)
+ {
+  wifi_pm_gpio_ctrl("ssv6051_wl_chip_en", 0);
+  mdelay(50);
+         wifi_pm_gpio_ctrl("ssv6051_wl_chip_en", 1);
+ }
+ else
+ {
+  wifi_pm_gpio_ctrl("ssv6051_wl_chip_en", 0);
+ }
+    return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+    return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+        sunxi_mci_rescan_card(SDIO_ID, val);
+    return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+    .set_power = ssv_wifi_power,
+    .set_reset = ssv_wifi_reset,
+    .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = {
+        {
+                .start = WIFI_HOST_WAKE,
+                .flags = IORESOURCE_IRQ,
+                .name = IRQ_RES_NAME,
+        },
+};
+void ssv_wifi_device_release(struct device *dev)
+{
+    printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+        .name = "ssv_wlan",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(resources),
+        .resource = resources,
+        .dev = {
+                .platform_data = &ssv_wifi_control,
+                .release = ssv_wifi_device_release,
+         },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev){
+    printk("sdhci_wakeup_irq_handler\n");
+     disable_irq_nosync(irq);
+         return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+    int rc=0,ret=0;
+    if (bEnable){
+      wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, IRQ_RES_NAME);
+       rc = (int)wifi_irqres->start;
+        g_wifi_irq_rc = rc;
+        ret = request_threaded_irq(rc,
+                                    NULL,
+                                    (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT |IRQF_FORCE_RESUME,
+#else
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+                                    "wlan_wakeup_irq", NULL);
+        enable_irq_wake(g_wifi_irq_rc);
+    }else{
+        if(g_wifi_irq_rc){
+            free_irq(g_wifi_irq_rc,NULL);
+            g_wifi_irq_rc = 0;
+        }
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+    wifi_control_data = wifi_ctrl;
+    wifi_set_power(0,40);
+    wifi_set_power(1,50);
+    wifi_set_carddetect(1);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    return 0;
+}
+static struct platform_driver wifi_driver = {
+ .probe = wifi_probe,
+ .remove = wifi_remove,
+ .suspend = wifi_suspend,
+ .resume = wifi_resume,
+ .driver = {
+ .name = "ssv_wlan",
+ }
+};
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    platform_device_register(&ssv_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&ssv_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-wifi.cfg
new file mode 100644
index 0000000000000..a4067cfb18890
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33-wifi.cfg
@@ -0,0 +1,92 @@
+############################################################
+# A33
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 1
+mac_address_path = /mnt/private/ULI/factory/mac.txt
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+# High PA
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 2
+#register = CE010018:02457D79
+
+# Normal PA
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33.cfg
new file mode 100644
index 0000000000000..f2d68bd8074c2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/a33.cfg
@@ -0,0 +1,18 @@
+############################################################
+# A33
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/../lichee/out/sun8iw5p1/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/../lichee/linux-3.4
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-generic-wlan.c
new file mode 100644
index 0000000000000..c472eb0d1a266
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-generic-wlan.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <linux/semaphore.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int is_on);
+extern int wifi_setup_dt(void);
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+struct semaphore icomm_chipup_sem;
+static int g_wifidev_registered = 0;
+char ssvcabrio_fw_name[50] = "ssv6051-sw.bin";
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+ if (wifi_setup_dt()) {
+  printk("wifi_dt : fail to setup dt\n");
+  goto fail;
+ }
+ extern_wifi_set_enable(0);
+ mdelay(200);
+ extern_wifi_set_enable(1);
+ mdelay(200);
+ sdio_reinit();
+ mdelay(100);
+    g_wifidev_registered = 1;
+fail:
+ up(&icomm_chipup_sem);
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+  extern_wifi_set_enable(0);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ int ret;
+ printk("%s\n", __func__);
+ sema_init(&icomm_chipup_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ ret = initWlan();
+ if (down_timeout(&icomm_chipup_sem,
+   msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+  goto out;
+ }
+    ret = ssvdevice_init();
+out:
+ return ret;
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-wifi.cfg
new file mode 100644
index 0000000000000..90b1411e56678
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# A33-PUHETAI
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805.cfg
new file mode 100644
index 0000000000000..7ee626a2170f9
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s805.cfg
@@ -0,0 +1,22 @@
+############################################################
+# amlogic m201 s805
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = arm-linux-gnueabihf-
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/out/target/product/m201/obj/KERNEL_OBJ/
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+#SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/hardware/wifi/icomm/drivers/ssv6xxx/
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-generic-wlan.c
new file mode 100644
index 0000000000000..dd302a2f0d413
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-generic-wlan.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <linux/semaphore.h>
+#include <asm/io.h>
+#include <linux/cpufreq.h>
+#include <linux/notifier.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#include <linux/amlogic/aml_thermal_hw.h>
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int is_on);
+extern int ssv6xxx_get_dev_status(void);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+extern int wifi_setup_dt(void);
+#endif
+#define GPIO_REG_WRITEL(val,reg) \
+ do { \
+  __raw_writel(val, CTL_PIN_BASE + (reg)); \
+ } while (0)
+struct semaphore icomm_chipup_sem;
+static int g_wifidev_registered = 0;
+char ssvcabrio_fw_name[50] = "ssv6051-sw.bin";
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+extern int max_aggr_num;
+static int aml_cpufreq_notifier(struct notifier_block *nb,
+                                         unsigned long event, void *data)
+{
+        struct cpufreq_freqs *frq = data;
+ int cpu_temp;
+ if((int)frq->cpu != 0 || (int)event == CPUFREQ_TRANSITION_NOTIFIER)
+  return 0;
+ cpu_temp = get_cpu_temp();
+ if(cpu_temp >= 85 && max_aggr_num != 3 )
+  max_aggr_num = 3;
+ else if(cpu_temp <= 83 && max_aggr_num != 24 )
+  max_aggr_num = 24;
+ printk(KERN_INFO "SSV set max_aggr_num : %d\n",max_aggr_num);
+ printk(KERN_INFO "SSV get temp : cur_temp = %d\n",cpu_temp);
+ printk(KERN_INFO "event=%d, cpu=%d, old =%d, new = %d\n", (int)event, (int)frq->cpu, (int)frq->old, (int)frq->new);
+        return 0;
+}
+static struct notifier_block aml_cpufreq_notifier_block = {
+        .notifier_call = aml_cpufreq_notifier,
+};
+void ssv_wifi_power(void)
+{
+ extern_wifi_set_enable(0);
+ mdelay(150);
+ extern_wifi_set_enable(1);
+ mdelay(150);
+ sdio_reinit();
+ mdelay(150);
+}
+int initWlan(void)
+{
+ int ret = 0;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+ if (wifi_setup_dt()) {
+  printk("wifi_dt : fail to setup dt\n");
+  goto fail;
+ }
+#endif
+ ssv_wifi_power();
+ g_wifidev_registered = 1;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+fail:
+#endif
+ up(&icomm_chipup_sem);
+ return ret;
+}
+void exitWlan(void)
+{
+ if (g_wifidev_registered) {
+  ssvdevice_exit();
+  extern_wifi_set_enable(0);
+  g_wifidev_registered = 0;
+  mdelay(150);
+ }
+ return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ int ret, time = 5;
+ printk("%s\n", __func__);
+ sema_init(&icomm_chipup_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ ret = initWlan();
+ if (down_timeout(&icomm_chipup_sem, msecs_to_jiffies(1000)) != 0) {
+  ret = -EINVAL;
+  printk(KERN_ALERT "%s: platform_driver_register timeout\n",
+         __FUNCTION__);
+  goto out;
+ }
+ ret = ssvdevice_init();
+ while(time-- > 0){
+  mdelay(500);
+  if(ssv6xxx_get_dev_status() == 1)
+   break;
+  printk("%s : Retry to carddetect\n",__func__);
+  ssv_wifi_power();
+ }
+    cpufreq_register_notifier(&aml_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER);
+out:
+ printk("generic_wifi_init finished\n");
+ return ret;
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ aes_fini();
+ sha1_mod_fini();
+#endif
+ exitWlan();
+    cpufreq_unregister_notifier(&aml_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER);
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-wifi.cfg
new file mode 100644
index 0000000000000..63ebe6439ed73
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905-wifi.cfg
@@ -0,0 +1,88 @@
+############################################################
+# A33-PUHETAI
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /system/etc/wifi/ssv6051/
+flash_bin_path = /tmp/flash.bin
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+sr_bhvr = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905.cfg
new file mode 100644
index 0000000000000..6b25229ba9980
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-s905.cfg
@@ -0,0 +1,26 @@
+############################################################
+# amlogic s905
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y  += -DCONFIG_SSV_OPENFILE_LOADFW
+ccflags-y  += -DCONFIG_SSV_MRX_EN3_CTRL
+ccflags-y  += -DCONFIG_TRIGGER_LOW_SDIO_LOADING
+#ccflags-y += -DCONFIG_SSV_RSSI
+#ccflags-y += -DAML_WIFI_MAC 
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = arm-linux-gnueabihf-
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+#SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/out/target/product/m201/obj/KERNEL_OBJ/
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+#SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/hardware/wifi/icomm/drivers/ssv6xxx/
+SSV_ARCH = arm64
+#KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-generic-wlan.c
new file mode 100644
index 0000000000000..f5029cd8a0331
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-generic-wlan.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <linux/semaphore.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int is_on);
+extern int ssv6xxx_get_dev_status(void);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+extern int wifi_setup_dt(void);
+#endif
+#define GPIO_REG_WRITEL(val,reg) \
+ do { \
+  __raw_writel(val, CTL_PIN_BASE + (reg)); \
+ } while (0)
+struct semaphore icomm_chipup_sem;
+static int g_wifidev_registered = 0;
+char ssvcabrio_fw_name[50] = "ssv6051-sw.bin";
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+void ssv_wifi_power(void)
+{
+ extern_wifi_set_enable(0);
+ mdelay(150);
+ extern_wifi_set_enable(1);
+ mdelay(150);
+ sdio_reinit();
+ mdelay(150);
+}
+int initWlan(void)
+{
+ int ret = 0;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+ if (wifi_setup_dt()) {
+  printk("wifi_dt : fail to setup dt\n");
+  goto fail;
+ }
+#endif
+ ssv_wifi_power();
+ g_wifidev_registered = 1;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+fail:
+#endif
+ up(&icomm_chipup_sem);
+ return ret;
+}
+void exitWlan(void)
+{
+ if (g_wifidev_registered) {
+  ssvdevice_exit();
+  extern_wifi_set_enable(0);
+  g_wifidev_registered = 0;
+  mdelay(150);
+ }
+ return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ int ret, time = 5;
+ printk("%s\n", __func__);
+ sema_init(&icomm_chipup_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ ret = initWlan();
+ if (down_timeout(&icomm_chipup_sem, msecs_to_jiffies(1000)) != 0) {
+  ret = -EINVAL;
+  printk(KERN_ALERT "%s: platform_driver_register timeout\n",
+         __FUNCTION__);
+  goto out;
+ }
+ ret = ssvdevice_init();
+ while(time-- > 0){
+  mdelay(500);
+  if(ssv6xxx_get_dev_status() == 1)
+   break;
+  printk("%s : Retry to carddetect\n",__func__);
+  ssv_wifi_power();
+ }
+out:
+ printk("generic_wifi_init finished\n");
+ return ret;
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ aes_fini();
+ sha1_mod_fini();
+#endif
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-wifi.cfg
new file mode 100644
index 0000000000000..0f7d52043bf2f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950-wifi.cfg
@@ -0,0 +1,87 @@
+############################################################
+# T950-Amlogic
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+
+firmware_path = /etc/wifi/ssv6051/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950.cfg
new file mode 100644
index 0000000000000..706185ba61332
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/aml-t950.cfg
@@ -0,0 +1,24 @@
+############################################################
+# amlogic s905
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y  += -DCONFIG_SSV_OPENFILE_LOADFW
+#ccflags-y += -DCONFIG_SSV_RSSI
+#ccflags-y += -DAML_WIFI_MAC 
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = arm-linux-gnueabihf-
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+#SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/out/target/product/m201/obj/KERNEL_OBJ/
+#SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.7/bin/arm-eabi-
+#SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/hardware/wifi/icomm/drivers/ssv6xxx/
+SSV_ARCH = arm64
+#KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-generic-wlan.c
new file mode 100644
index 0000000000000..5f7e959aaeeba
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-generic-wlan.c
@@ -0,0 +1,265 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 2, 0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data
+{
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#include <mach/wlan_plat_data.h>
+extern int acts_wifi_init(int type);
+extern void acts_wifi_cleanup(void);
+int platform_wifi_power_on(void)
+{
+ int ret = 0;
+ int wifi_type = 0;
+ wifi_type = WLAN_SSV6051;
+ ret = acts_wifi_init(wifi_type);
+ if (unlikely(ret < 0))
+    {
+  pr_err("SSV6051: Failed to register the power control driver.\n");
+  goto exit;
+ }
+exit:
+ return ret;
+}
+void platform_wifi_power_off(void)
+{
+ acts_wifi_cleanup();
+}
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc = 0;
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+static int ssv_wifi_power(int on)
+{
+ printk("ssv pwr on=%d\n", on);
+ if (on)
+    {
+ }
+    else
+    {
+ }
+ return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+ return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+ val = val;
+ return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+ .set_power = ssv_wifi_power,
+ .set_reset = ssv_wifi_reset,
+ .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = { { .start = WIFI_HOST_WAKE,
+      .flags = IORESOURCE_IRQ,
+      .name = IRQ_RES_NAME, }, };
+void ssv_wifi_device_release(struct device *dev)
+{
+ printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+ .name = "ssv_wlan",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(resources),
+ .resource = resources,
+ .dev = { .platform_data = &ssv_wifi_control,
+   .release = ssv_wifi_device_release, },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev)
+{
+ printk("sdhci_wakeup_irq_handler\n");
+ disable_irq_nosync(irq);
+ return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+ int rc = 0, ret = 0;
+ if (bEnable) {
+  wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+          IRQ_RES_NAME);
+  rc = (int)wifi_irqres->start;
+  g_wifi_irq_rc = rc;
+  ret = request_threaded_irq(
+      rc, NULL, (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 0, 0)
+      IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT | IRQF_FORCE_RESUME,
+#else
+      IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+      "wlan_wakeup_irq", NULL);
+  enable_irq_wake(g_wifi_irq_rc);
+ } else {
+  if (g_wifi_irq_rc) {
+   free_irq(g_wifi_irq_rc, NULL);
+   g_wifi_irq_rc = 0;
+  }
+ }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+     (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 40);
+ wifi_set_power(1, 10);
+ wifi_set_carddetect(1);
+ up(&wifi_control_sem);
+ return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+     (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ setup_wifi_wakeup_BB(pdev, false);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ setup_wifi_wakeup_BB(pdev, true);
+ return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+ setup_wifi_wakeup_BB(pdev, false);
+ return 0;
+}
+static struct platform_driver wifi_driver = { .probe = wifi_probe,
+           .remove = wifi_remove,
+           .suspend = wifi_suspend,
+           .resume = wifi_resume,
+           .driver = { .name =
+             "ssv_wlan", } };
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+ int ret = 0;
+ sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ platform_device_register(&ssv_wifi_device);
+ platform_driver_register(&wifi_driver);
+    (void)platform_wifi_power_on();
+ g_wifidev_registered = 1;
+ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+  ret = -EINVAL;
+  printk(KERN_ALERT "%s: platform_driver_register timeout\n",
+         __FUNCTION__);
+ }
+ ret = ssvdevice_init();
+ return ret;
+}
+void exitWlan(void)
+{
+ if (g_wifidev_registered) {
+  ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+  aes_fini();
+  sha1_mod_fini();
+#endif
+        (void)platform_wifi_power_off();
+  platform_driver_unregister(&wifi_driver);
+  platform_device_unregister(&ssv_wifi_device);
+  g_wifidev_registered = 0;
+ }
+ return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-wifi.cfg
new file mode 100644
index 0000000000000..e30566913e9e9
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions-wifi.cfg
@@ -0,0 +1,87 @@
+############################################################
+# ATM7039
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions.cfg
new file mode 100644
index 0000000000000..487328b6ebcca
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/atm7039-actions.cfg
@@ -0,0 +1,17 @@
+############################################################
+# ATM7039
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = $(R_CROSS_COMPILE)
+#SSV_KERNEL_PATH = $(KERNEL_BUILD_PATH)
+#SSV_ARCH = $(R_ARCH)
+#KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/cli b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/cli
new file mode 100644
index 0000000000000..bc9b65bb719cd
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/cli
@@ -0,0 +1,6 @@
+
+SSV_DFS_FILE=/sys/kernel/debug/ssv/ssv_cmd
+if [ -f $SSV_DFS_FILE ]; then
+    echo "$*" > $SSV_DFS_FILE
+    cat $SSV_DFS_FILE
+fi
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-generic-wlan.c
new file mode 100644
index 0000000000000..7a9121f231c70
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-generic-wlan.c
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc=0;
+#define SDIO_ID 1
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert);
+extern int wifi_pm_gpio_ctrl(char* name, int level);
+static int ssv_wifi_power(int on)
+{
+        printk("ssv pwr on=%d\n",on);
+ if(on)
+ {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+  mdelay(50);
+         wifi_pm_gpio_ctrl("wl_reg_on", 1);
+ }
+ else
+ {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+ }
+    return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+    return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+        sunxi_mci_rescan_card(SDIO_ID, val);
+    return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+    .set_power = ssv_wifi_power,
+    .set_reset = ssv_wifi_reset,
+    .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = {
+        {
+                .start = WIFI_HOST_WAKE,
+                .flags = IORESOURCE_IRQ,
+                .name = IRQ_RES_NAME,
+        },
+};
+void ssv_wifi_device_release(struct device *dev)
+{
+    printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+        .name = "ssv_wlan",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(resources),
+        .resource = resources,
+        .dev = {
+                .platform_data = &ssv_wifi_control,
+                .release = ssv_wifi_device_release,
+         },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev){
+    printk("sdhci_wakeup_irq_handler\n");
+     disable_irq_nosync(irq);
+         return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+    int rc=0,ret=0;
+    if (bEnable){
+      wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, IRQ_RES_NAME);
+       rc = (int)wifi_irqres->start;
+        g_wifi_irq_rc = rc;
+        ret = request_threaded_irq(rc,
+                                    NULL,
+                                    (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT |IRQF_FORCE_RESUME,
+#else
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+                                    "wlan_wakeup_irq", NULL);
+        enable_irq_wake(g_wifi_irq_rc);
+    }else{
+        if(g_wifi_irq_rc){
+            free_irq(g_wifi_irq_rc,NULL);
+            g_wifi_irq_rc = 0;
+        }
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+    wifi_control_data = wifi_ctrl;
+    wifi_set_power(0,40);
+    wifi_set_power(1,50);
+    wifi_set_carddetect(1);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    return 0;
+}
+static struct platform_driver wifi_driver = {
+ .probe = wifi_probe,
+ .remove = wifi_remove,
+ .suspend = wifi_suspend,
+ .resume = wifi_resume,
+ .driver = {
+ .name = "ssv_wlan",
+ }
+};
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    platform_device_register(&ssv_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&ssv_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-wifi.cfg
new file mode 100644
index 0000000000000..9daefbf5d82e5
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3-wifi.cfg
@@ -0,0 +1,86 @@
+##################################################
+# H3
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. X or X
+#
+##################################################
+#wifi_tx_gain_level_b = 0
+#wifi_tx_gain_level_gn = 0
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3.cfg
new file mode 100644
index 0000000000000..bb82aa046057d
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h3.cfg
@@ -0,0 +1,18 @@
+############################################################
+# H3
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/../lichee/out/sun8iw7p1/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/../lichee/linux-3.4
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-generic-wlan.c
new file mode 100644
index 0000000000000..fbb96a1672469
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-generic-wlan.c
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc=0;
+#define SDIO_ID 1
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert);
+extern int wifi_pm_gpio_ctrl(char* name, int level);
+static int ssv_wifi_power(int on)
+{
+    printk("ssv pwr on=%d\n",on);
+ if(on)
+ {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+  mdelay(50);
+         wifi_pm_gpio_ctrl("wl_reg_on", 1);
+ }
+ else
+ {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+ }
+    return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+    return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+        sunxi_mci_rescan_card(SDIO_ID, val);
+    return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+    .set_power = ssv_wifi_power,
+    .set_reset = ssv_wifi_reset,
+    .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = {
+        {
+                .start = WIFI_HOST_WAKE,
+                .flags = IORESOURCE_IRQ,
+                .name = IRQ_RES_NAME,
+        },
+};
+void ssv_wifi_device_release(struct device *dev)
+{
+    printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+        .name = "ssv_wlan",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(resources),
+        .resource = resources,
+        .dev = {
+                .platform_data = &ssv_wifi_control,
+                .release = ssv_wifi_device_release,
+         },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev){
+    printk("sdhci_wakeup_irq_handler\n");
+     disable_irq_nosync(irq);
+         return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+    int rc=0,ret=0;
+    if (bEnable){
+      wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, IRQ_RES_NAME);
+       rc = (int)wifi_irqres->start;
+        g_wifi_irq_rc = rc;
+        ret = request_threaded_irq(rc,
+                                    NULL,
+                                    (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT |IRQF_FORCE_RESUME,
+#else
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+                                    "wlan_wakeup_irq", NULL);
+        enable_irq_wake(g_wifi_irq_rc);
+    }else{
+        if(g_wifi_irq_rc){
+            free_irq(g_wifi_irq_rc,NULL);
+            g_wifi_irq_rc = 0;
+        }
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+    wifi_control_data = wifi_ctrl;
+    wifi_set_power(0,40);
+    wifi_set_power(1,50);
+    wifi_set_carddetect(1);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+    wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    return 0;
+}
+static struct platform_driver wifi_driver = {
+ .probe = wifi_probe,
+ .remove = wifi_remove,
+ .suspend = wifi_suspend,
+ .resume = wifi_resume,
+ .driver = {
+ .name = "ssv_wlan",
+ }
+};
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    platform_device_register(&ssv_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&ssv_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-wifi.cfg
new file mode 100644
index 0000000000000..e65de63799255
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# A33
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8.cfg
new file mode 100644
index 0000000000000..2632db3913f16
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/h8.cfg
@@ -0,0 +1,18 @@
+############################################################
+# H8
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/../lichee/out/sun8iw7p1/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/../lichee/linux-3.4
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/platform-config.mak b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/platform-config.mak
new file mode 100644
index 0000000000000..00d4792a05251
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/platform-config.mak
@@ -0,0 +1,97 @@
+
+CONFIG_SSV6200_CORE=m
+#ccflags-y += -DCONFIG_SSV6200_CORE
+
+###########################################################################
+# Compiler options                                                        #
+###########################################################################
+ccflags-y += -Werror
+
+# Enable -g to help debug. Deassembly from .o to .S would help to track to 
+# the problomatic line from call stack dump.
+ccflags-y += -g
+
+############################################################
+# If you change the settings, please change the file synchronization
+# smac\firmware\include\config.h & compiler firmware
+############################################################
+#ccflags-y += -DCONFIG_SSV_CABRIO_A
+ccflags-y += -DCONFIG_SSV_CABRIO_E
+
+#CONFIG_SSV_SUPPORT_BTCX=y
+
+ccflags-y += -DCONFIG_SSV6200_CLI_ENABLE
+
+#ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+
+
+#PADPD
+#ccflags-y += -DCONFIG_SSV_DPD
+
+#ccflags-y += -DCONFIG_SSV_CABRIO_MB_DEBUG
+ccflags-y += -DCONFIG_SSV6XXX_DEBUGFS
+
+#SDIO
+ccflags-y += -DCONFIG_SSV_TX_LOWTHRESHOLD
+
+############################################################
+# Rate control update for MPDU.
+############################################################
+ccflags-y += -DRATE_CONTROL_REALTIME_UPDATA
+
+#workaround
+#ccflags-y += -DCONFIG_SSV_CABRIO_EXT_PA
+
+############################################################
+# NOTE:
+#    Only one of the following flags could be turned on.
+# It also turned off the following flags. In this case, 
+# pure software security or pure hardware security is used.
+#
+############################################################
+#ccflags-y += -DCONFIG_SSV_SW_ENCRYPT_HW_DECRYPT
+#ccflags-y += -DCONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+
+# FOR WFA
+#ccflags-y += -DWIFI_CERTIFIED
+
+#ccflags-y += -DCONFIG_SSV_SDIO_EXT_INT
+
+#######################################################
+ccflags-y += -DCONFIG_SSV6200_HAS_RX_WORKQUEUE
+#ccflags-y += -DUSE_THREAD_RX
+ccflags-y += -DUSE_THREAD_TX
+ccflags-y += -DENABLE_AGGREGATE_IN_TIME
+ccflags-y += -DENABLE_INCREMENTAL_AGGREGATION
+
+# Generic decision table applicable to both AP and STA modes.
+ccflags-y += -DUSE_GENERIC_DECI_TBL
+
+# Use crypto in SSV driver.
+ccflags-y += -DUSE_LOCAL_CRYPTO
+ccflags-y += -DUSE_LOCAL_WEP_CRYPTO
+#ccflags-y += -DUSE_LOCAL_TKIP_CRYPTO
+ccflags-y += -DUSE_LOCAL_CCMP_CRYPTO
+ccflags-y += -DUSE_LOCAL_SMS4_CRYPTO
+
+ccflags-y += -DCONFIG_SSV_WAPI
+
+ccflags-y += -DFW_WSID_WATCH_LIST
+#ccflags-y += -DUSE_BATCH_RX
+#ccflags-y += -DCONFIG_IRQ_DEBUG_COUNT
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+
+
+ccflags-y += -DSSV6200_ECO
+#ccflags-y += -DENABLE_WAKE_IO_ISR_WHEN_HCI_ENQUEUE
+ccflags-y += -DHAS_CRYPTO_LOCK
+ccflags-y += -DENABLE_TX_Q_FLOW_CONTROL
+
+#ccflags-y += -DCONFIG_DEBUG_SKB_TIMESTAMP
+
+
+#enable p2p client to parse GO broadcast noa
+#ccflags-y += -DCONFIG_P2P_NOA
+
+#enable rx management frame check
+#ccflags-y += -DCONFIG_RX_MGMT_CHECK
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-generic-wlan.c
new file mode 100644
index 0000000000000..0bca9a1efadff
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-generic-wlan.c
@@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <linux/semaphore.h>
+#include <linux/platform_device.h>
+#ifdef CONFIG_HAS_WAKELOCK
+#include <linux/wakelock.h>
+#endif
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+    int (*set_power)(int val);
+    int (*set_reset)(int val);
+    int (*set_carddetect)(int val);
+    void *(*mem_prealloc)(int section, unsigned long size);
+    int (*get_mac_addr)(unsigned char *buf);
+    void *(*get_country_code)(char *ccode);
+};
+#endif
+extern int rockchip_wifi_power(int on);
+extern int rockchip_wifi_set_carddetect(int val);
+extern int ssv6xxx_get_dev_status(void);
+static struct wifi_platform_data *wifi_control_data = NULL;
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+unsigned int oob_irq = 0;
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+extern int rockchip_wifi_get_oob_irq(void);
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+#ifdef CONFIG_HAS_WAKELOCK
+struct wake_lock icomm_wake_lock;
+#endif
+static int icomm_wifi_power(int on)
+{
+    printk("%s: %d\n", __func__, on);
+    rockchip_wifi_power(on);
+    return 0;
+}
+int icomm_wifi_set_carddetect(int val)
+{
+    rockchip_wifi_set_carddetect(val);
+    return 0;
+}
+static struct wifi_platform_data icomm_wifi_control = {
+    .set_power = icomm_wifi_power,
+    .set_carddetect = icomm_wifi_set_carddetect,
+};
+void icomm_wifi_device_release(struct device *dev)
+{
+    printk("%s\n", __func__);
+}
+static struct platform_device icomm_wifi_device = {
+    .name = "icomm_wlan",
+    .id = 1,
+    .dev = {
+            .platform_data = &icomm_wifi_control,
+            .release = icomm_wifi_device_release,
+     },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+    if (wifi_control_data && wifi_control_data->set_power) {
+        wifi_control_data->set_power(on);
+    }
+    if (msec)
+        msleep(msec);
+    return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+    if (wifi_control_data && wifi_control_data->set_carddetect) {
+        wifi_control_data->set_carddetect(on);
+    }
+    return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev)
+{
+    printk("%s\n", __func__);
+    wake_lock_timeout(&icomm_wake_lock, HZ);
+    return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(void)
+{
+    int err;
+    oob_irq = rockchip_wifi_get_oob_irq();
+    if (oob_irq <= 0) {
+        printk("%s: oob_irq NULL\n", __func__);
+        return;
+    }
+    err = request_threaded_irq(oob_irq,
+                               wifi_wakeup_irq_handler,
+                               NULL,
+                               IRQF_TRIGGER_FALLING,
+                               "wlan_wakeup_irq",
+                               NULL);
+    printk("%s: set oob_irq:%d %s\n", __func__, oob_irq, (err < 0) ? "NG": "OK");
+}
+void free_wifi_wakeup_BB(void)
+{
+    if (oob_irq > 0) {
+        free_irq(oob_irq, NULL);
+        oob_irq = 0;
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+    struct wifi_platform_data *wifi_ctrl =
+        (struct wifi_platform_data *)(pdev->dev.platform_data);
+    printk("%s\n", __func__);
+    wifi_control_data = wifi_ctrl;
+    wifi_set_power(0, 50);
+    wifi_set_power(1, 50);
+    wifi_set_carddetect(1);
+    msleep(120);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+    struct wifi_platform_data *wifi_ctrl =
+        (struct wifi_platform_data *)(pdev->dev.platform_data);
+    printk("%s\n", __func__);
+    wifi_control_data = wifi_ctrl;
+    wifi_set_carddetect(0);
+    msleep(120);
+    wifi_set_power(0, 50);
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock_destroy(&icomm_wake_lock);
+#endif
+    return 0;
+}
+#ifdef CONFIG_PM
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    printk("%s\n", __func__);
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    printk("%s\n", __func__);
+#if 0
+    if (wifi_control_data && wifi_control_data->set_carddetect) {
+        wifi_control_data->set_carddetect(0);
+    }
+    msleep(50);
+    if (wifi_control_data && wifi_control_data->set_carddetect) {
+        wifi_control_data->set_carddetect(1);
+    }
+#endif
+    return 0;
+}
+#endif
+static struct platform_driver wifi_driver = {
+    .probe = wifi_probe,
+    .remove = wifi_remove,
+#ifdef CONFIG_PM
+    .suspend = wifi_suspend,
+    .resume = wifi_resume,
+#endif
+    .driver = {
+    .name = "icomm_wlan",
+    }
+};
+int initWlan(void)
+{
+    int ret=0;
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock_init(&icomm_wake_lock, WAKE_LOCK_SUSPEND, "ssv6051");
+    wake_lock(&icomm_wake_lock);
+#endif
+    sema_init(&wifi_control_sem, 0);
+    platform_device_register(&icomm_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_unlock(&icomm_wake_lock);
+#endif
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&icomm_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+    int ret;
+    int time = 5;
+    printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    ret = initWlan();
+ while(time-- > 0)
+ {
+ msleep(500);
+ if(ssv6xxx_get_dev_status() == 1)
+  break;
+ printk("%s : Retry to carddetect\n",__func__);
+ wifi_set_carddetect(0);
+    wifi_set_power(0, 50);
+ msleep(150);
+ wifi_set_power(1, 50);
+ wifi_set_carddetect(1);
+ }
+ return ret;
+}
+static __exit void generic_wifi_exit_module(void)
+{
+    printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    aes_fini();
+    sha1_mod_fini();
+#endif
+    exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-wifi.cfg
new file mode 100644
index 0000000000000..d480ff1b9ebc0
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126-wifi.cfg
@@ -0,0 +1,91 @@
+############################################################
+# RK3128
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+#################################################
+# Signal strength control
+# rssi control
+rssi_ctl = 0
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126.cfg
new file mode 100644
index 0000000000000..c41bdbde75720
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3126.cfg
@@ -0,0 +1,22 @@
+############################################################
+# RK3128
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+
+ccflags-y += -DROCKCHIP_3126_SUPPORT
+ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/kernel
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-generic-wlan.c
new file mode 100644
index 0000000000000..a3598b55e60cf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-generic-wlan.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+extern int rockchip_wifi_power(int on);
+extern int rockchip_wifi_set_carddetect(int val);
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+extern char wifi_chip_type_string[];
+#endif
+#define GPIO_REG_WRITEL(val,reg) \
+ do { \
+  __raw_writel(val, CTL_PIN_BASE + (reg)); \
+ } while (0)
+static int g_wifidev_registered = 0;
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+extern int ssv6xxx_get_dev_status(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+void ssv_wifi_power(void)
+{
+ rockchip_wifi_set_carddetect(0);
+ msleep(150);
+ rockchip_wifi_power(0);
+ msleep(150);
+ rockchip_wifi_power(1);
+ msleep(150);
+ rockchip_wifi_set_carddetect(1);
+ msleep(150);
+}
+int initWlan(void)
+{
+ int ret = 0;
+ int time = 5;
+ ssv_wifi_power();
+ msleep(120);
+ g_wifidev_registered = 1;
+ ret = ssvdevice_init();
+ while(time-- > 0){
+  msleep(500);
+  if(ssv6xxx_get_dev_status() == 1)
+   break;
+  printk("%s : Retry to carddetect\n",__func__);
+  ssv_wifi_power();
+ }
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+    if (!ret) {
+        strcpy(wifi_chip_type_string, "ssv6051");
+        printk(KERN_INFO "wifi_chip_type_string : %s\n" ,wifi_chip_type_string);
+    }
+#endif
+ return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+        msleep(50);
+#ifndef ROCKCHIP_WIFI_AUTO_SUPPORT
+        rockchip_wifi_set_carddetect(0);
+#endif
+        rockchip_wifi_power(0);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ return initWlan();
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ aes_fini();
+ sha1_mod_fini();
+#endif
+    msleep(100);
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-wifi.cfg
new file mode 100644
index 0000000000000..0f48d2276b5eb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# RK3128
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128.cfg
new file mode 100644
index 0000000000000..cd802789d7429
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk3128.cfg
@@ -0,0 +1,21 @@
+############################################################
+# RK3128
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+#ccflags-y += -DROCKCHIP_WIFI_AUTO_SUPPORT
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/kernel
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-generic-wlan.c
new file mode 100644
index 0000000000000..a3598b55e60cf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-generic-wlan.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+extern int rockchip_wifi_power(int on);
+extern int rockchip_wifi_set_carddetect(int val);
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+extern char wifi_chip_type_string[];
+#endif
+#define GPIO_REG_WRITEL(val,reg) \
+ do { \
+  __raw_writel(val, CTL_PIN_BASE + (reg)); \
+ } while (0)
+static int g_wifidev_registered = 0;
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+extern int ssv6xxx_get_dev_status(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+void ssv_wifi_power(void)
+{
+ rockchip_wifi_set_carddetect(0);
+ msleep(150);
+ rockchip_wifi_power(0);
+ msleep(150);
+ rockchip_wifi_power(1);
+ msleep(150);
+ rockchip_wifi_set_carddetect(1);
+ msleep(150);
+}
+int initWlan(void)
+{
+ int ret = 0;
+ int time = 5;
+ ssv_wifi_power();
+ msleep(120);
+ g_wifidev_registered = 1;
+ ret = ssvdevice_init();
+ while(time-- > 0){
+  msleep(500);
+  if(ssv6xxx_get_dev_status() == 1)
+   break;
+  printk("%s : Retry to carddetect\n",__func__);
+  ssv_wifi_power();
+ }
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+    if (!ret) {
+        strcpy(wifi_chip_type_string, "ssv6051");
+        printk(KERN_INFO "wifi_chip_type_string : %s\n" ,wifi_chip_type_string);
+    }
+#endif
+ return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+        msleep(50);
+#ifndef ROCKCHIP_WIFI_AUTO_SUPPORT
+        rockchip_wifi_set_carddetect(0);
+#endif
+        rockchip_wifi_power(0);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ return initWlan();
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ aes_fini();
+ sha1_mod_fini();
+#endif
+    msleep(100);
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-wifi.cfg
new file mode 100644
index 0000000000000..c75d69e3ec65d
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# ROCKCHIP RK3X28 & RK322X
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x.cfg
new file mode 100644
index 0000000000000..f2bbc89b59647
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/rk322x.cfg
@@ -0,0 +1,21 @@
+############################################################
+# RK322x
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DROCKCHIP_WIFI_AUTO_SUPPORT
+ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/kernel
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-generic-wlan.c
new file mode 100644
index 0000000000000..4da0bfe4fa7f6
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-generic-wlan.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#ifdef CONFIG_CONTROL_SDIOCARD_PWR
+extern void mmc_rescan_sdio(void);
+extern void wifi_power(int on);
+#endif
+static int g_wifidev_registered = 0;
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+ int ret = 0;
+#ifdef CONFIG_CONTROL_SDIOCARD_PWR
+ wifi_power(0);
+ mdelay(10);
+ wifi_power(1);
+ mdelay(120);
+ mmc_rescan_sdio();
+ mdelay(120);
+#endif
+ g_wifidev_registered = 1;
+ ret = ssvdevice_init();
+ return ret;
+}
+void exitWlan(void)
+{
+ if (g_wifidev_registered) {
+  ssvdevice_exit();
+#ifdef CONFIG_CONTROL_SDIOCARD_PWR
+  wifi_power(0);
+#endif
+  g_wifidev_registered = 0;
+ }
+ return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ return initWlan();
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ aes_fini();
+ sha1_mod_fini();
+#endif
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-wifi.cfg
new file mode 100644
index 0000000000000..2bec6a092c6b5
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# Silan sc6138
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /lib/firmware/
+force_chip_identity = 0x75000000
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 26
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = off
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138.cfg
new file mode 100644
index 0000000000000..359cd75fe465c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/sc6138.cfg
@@ -0,0 +1,20 @@
+############################################################
+# Silan sc6138
+############################################################
+ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+#ccflags-y += -DCONFIG_SSV_SMARTLINK
+ccflags-y += -DCONFIG_HW_CAP_SINGLE_INTF
+#ccflags-y += -DCONFIG_SSV_MRX_EN3_CTRL
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = 
+#SSV_KERNEL_PATH = 
+#SSV_ARCH = arm
+#SSV_STRIP = 
+#KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-generic-wlan.c
new file mode 100644
index 0000000000000..3648aa743b66f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-generic-wlan.c
@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc=0;
+#define SDIO_ID 2
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern int ssv_6xxx_wlan_init(void);
+extern int ssv_wlan_power_on(int flag);
+extern int ssv_wlan_power_off(int flag);
+static int wifi_pm_gpio_ctrl(char* name, int level)
+{
+    (void)name;
+    (void)level;
+    if (level)
+    {
+        ssv_wlan_power_on(1);
+    }
+    else
+    {
+        ssv_wlan_power_off(1);
+    }
+    return 0;
+}
+static int ssv_wifi_power(int on)
+{
+    printk("ssv pwr on=%d\n",on);
+ if(on)
+ {
+  wifi_pm_gpio_ctrl("wifi_ssv6200_power", 0);
+  mdelay(50);
+        wifi_pm_gpio_ctrl("wifi_ssv6200_power", 1);
+ }
+ else
+ {
+  wifi_pm_gpio_ctrl("wifi_ssv6200_power", 0);
+ }
+    return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+    return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+    if (val)
+    {
+        ssv_wlan_power_on(1);
+    }
+    else
+    {
+        ssv_wlan_power_off(1);
+    }
+    return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+    .set_power = ssv_wifi_power,
+    .set_reset = ssv_wifi_reset,
+    .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = {
+        {
+                .start = WIFI_HOST_WAKE,
+                .flags = IORESOURCE_IRQ,
+                .name = IRQ_RES_NAME,
+        },
+};
+void ssv_wifi_device_release(struct device *dev)
+{
+    printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+        .name = "ssv_wlan",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(resources),
+        .resource = resources,
+        .dev = {
+                .platform_data = &ssv_wifi_control,
+                .release = ssv_wifi_device_release,
+         },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+    printk("[Debug-%s-%d]------\n",__func__,__LINE__);
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev){
+    printk("sdhci_wakeup_irq_handler\n");
+     disable_irq_nosync(irq);
+         return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+    int rc=0,ret=0;
+    if (bEnable){
+      wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, IRQ_RES_NAME);
+       rc = (int)wifi_irqres->start;
+        g_wifi_irq_rc = rc;
+        ret = request_threaded_irq(rc,
+                                    NULL,
+                                    (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT |IRQF_FORCE_RESUME,
+#else
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+                                    "wlan_wakeup_irq", NULL);
+        enable_irq_wake(g_wifi_irq_rc);
+    }else{
+        if(g_wifi_irq_rc){
+            free_irq(g_wifi_irq_rc,NULL);
+            g_wifi_irq_rc = 0;
+        }
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+    wifi_control_data = wifi_ctrl;
+    #ifndef CONFIG_SSV6XXX
+    printk("[Debug-%s-%d]------\n",__func__,__LINE__);
+    ssv_6xxx_wlan_init();
+    #endif
+    printk("[Debug-%s-%d]------\n",__func__,__LINE__);
+    wifi_set_carddetect(1);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ setup_wifi_wakeup_BB(pdev,false);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    setup_wifi_wakeup_BB(pdev,true);
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    setup_wifi_wakeup_BB(pdev,false);
+    return 0;
+}
+static struct platform_driver wifi_driver = {
+ .probe = wifi_probe,
+ .remove = wifi_remove,
+ .suspend = wifi_suspend,
+ .resume = wifi_resume,
+ .driver = {
+ .name = "ssv_wlan",
+ }
+};
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    platform_device_register(&ssv_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&ssv_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+#ifdef CONFIG_SSV6XXX
+late_initcall(generic_wifi_init_module);
+#else
+module_init(generic_wifi_init_module);
+#endif
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-wifi.cfg
new file mode 100644
index 0000000000000..d42f299549126
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10-wifi.cfg
@@ -0,0 +1,88 @@
+############################################################
+# Ingenic X1000
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path =
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+software_mac_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 26
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = off
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
+#register = CE010008:008B7C1C
+#register = CE010014:3D7E84FE
+#register = CE010048:FCCCCC27
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10.cfg
new file mode 100644
index 0000000000000..c1fe5da773c7f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/t10.cfg
@@ -0,0 +1,22 @@
+############################################################
+# Ingenic X1000
+############################################################
+
+#ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=0
+
+############################################################
+# SSV Airkiss
+############################################################
+cflags-y += -DCONFIG_SSV_SMARTLINK
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = $(R_CROSS_COMPILE)
+#SSV_KERNEL_PATH = $(KERNEL_BUILD_PATH)
+#SSV_ARCH = $(R_ARCH)
+#KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-generic-wlan.c
new file mode 100644
index 0000000000000..c2696632c61ea
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-generic-wlan.c
@@ -0,0 +1,250 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 2, 0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data
+{
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) \
+ do { \
+  __raw_writel(val, CTL_PIN_BASE + (reg)); \
+ } while (0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc = 0;
+#define SDIO_ID 1
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert);
+extern int wifi_pm_gpio_ctrl(char *name, int level);
+static int ssv_wifi_power(int on)
+{
+ printk("ssv pwr on=%d\n", on);
+ if (on) {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+  mdelay(50);
+  wifi_pm_gpio_ctrl("wl_reg_on", 1);
+ } else {
+  wifi_pm_gpio_ctrl("wl_reg_on", 0);
+ }
+ return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+ return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+ sunxi_mci_rescan_card(SDIO_ID, val);
+ return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+ .set_power = ssv_wifi_power,
+ .set_reset = ssv_wifi_reset,
+ .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = { { .start = WIFI_HOST_WAKE,
+      .flags = IORESOURCE_IRQ,
+      .name = IRQ_RES_NAME, }, };
+void ssv_wifi_device_release(struct device *dev)
+{
+ printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+ .name = "ssv_wlan",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(resources),
+ .resource = resources,
+ .dev = { .platform_data = &ssv_wifi_control,
+   .release = ssv_wifi_device_release, },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev)
+{
+ printk("sdhci_wakeup_irq_handler\n");
+ disable_irq_nosync(irq);
+ return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+ int rc = 0, ret = 0;
+ if (bEnable) {
+  wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+          IRQ_RES_NAME);
+  rc = (int)wifi_irqres->start;
+  g_wifi_irq_rc = rc;
+  ret = request_threaded_irq(
+      rc, NULL, (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 0, 0)
+      IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT | IRQF_FORCE_RESUME,
+#else
+      IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+      "wlan_wakeup_irq", NULL);
+  enable_irq_wake(g_wifi_irq_rc);
+ } else {
+  if (g_wifi_irq_rc) {
+   free_irq(g_wifi_irq_rc, NULL);
+   g_wifi_irq_rc = 0;
+  }
+ }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+     (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 40);
+ wifi_set_power(1, 50);
+ wifi_set_carddetect(1);
+ up(&wifi_control_sem);
+ return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+     (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+ wifi_set_power(0, 0);
+ wifi_set_power(0, 0);
+ wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+ return 0;
+}
+static struct platform_driver wifi_driver = { .probe = wifi_probe,
+           .remove = wifi_remove,
+           .suspend = wifi_suspend,
+           .resume = wifi_resume,
+           .driver = { .name =
+             "ssv_wlan", } };
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+ int ret = 0;
+ sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ platform_device_register(&ssv_wifi_device);
+ platform_driver_register(&wifi_driver);
+ g_wifidev_registered = 1;
+ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+  ret = -EINVAL;
+  printk(KERN_ALERT "%s: platform_driver_register timeout\n",
+         __FUNCTION__);
+ }
+ ret = ssvdevice_init();
+ return ret;
+}
+void exitWlan(void)
+{
+ if (g_wifidev_registered) {
+  ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+  aes_fini();
+  sha1_mod_fini();
+#endif
+  platform_driver_unregister(&wifi_driver);
+  platform_device_unregister(&ssv_wifi_device);
+  g_wifidev_registered = 0;
+ }
+ return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-wifi.cfg
new file mode 100644
index 0000000000000..79f83d1804325
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# A33
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 26
+volt_regulator = 1
+force_chip_identity = 0x75000000
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66.cfg
new file mode 100644
index 0000000000000..f7421c9006008
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/v66.cfg
@@ -0,0 +1,18 @@
+############################################################
+# v66
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/../lichee/brandy/gcc-linaro/bin/arm-linux-gnueabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/../lichee/linux-3.4
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-generic-wlan.c
new file mode 100644
index 0000000000000..6304f1b1b947f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-generic-wlan.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,2,0)
+#include <linux/wlan_plat.h>
+#else
+struct wifi_platform_data {
+ int (*set_power)(int val);
+ int (*set_reset)(int val);
+ int (*set_carddetect)(int val);
+ void *(*mem_prealloc)(int section, unsigned long size);
+ int (*get_mac_addr)(unsigned char *buf);
+ void *(*get_country_code)(char *ccode);
+};
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+static int g_wifidev_registered = 0;
+static struct semaphore wifi_control_sem;
+static struct wifi_platform_data *wifi_control_data = NULL;
+static struct resource *wifi_irqres = NULL;
+static int g_wifi_irq_rc=0;
+#define SDIO_ID 2
+#define IRQ_RES_NAME "ssv_wlan_irq"
+#define WIFI_HOST_WAKE 0xFFFF
+extern int ssv_6xxx_wlan_init(void);
+extern int ssv_wlan_power_on(int flag);
+extern int ssv_wlan_power_off(int flag);
+static int wifi_pm_gpio_ctrl(char* name, int level)
+{
+    (void)name;
+    (void)level;
+    if (level)
+    {
+        ssv_wlan_power_on(1);
+    }
+    else
+    {
+        ssv_wlan_power_off(1);
+    }
+    return 0;
+}
+static int ssv_wifi_power(int on)
+{
+    printk("ssv pwr on=%d\n",on);
+ if(on)
+ {
+  wifi_pm_gpio_ctrl("wifi_ssv6200_power", 0);
+  mdelay(50);
+        wifi_pm_gpio_ctrl("wifi_ssv6200_power", 1);
+ }
+ else
+ {
+  wifi_pm_gpio_ctrl("wifi_ssv6200_power", 0);
+ }
+    return 0;
+}
+static int ssv_wifi_reset(int on)
+{
+    return 0;
+}
+int ssv_wifi_set_carddetect(int val)
+{
+    if (val)
+    {
+        ssv_wlan_power_on(1);
+    }
+    else
+    {
+        ssv_wlan_power_off(1);
+    }
+    return 0;
+}
+static struct wifi_platform_data ssv_wifi_control = {
+    .set_power = ssv_wifi_power,
+    .set_reset = ssv_wifi_reset,
+    .set_carddetect = ssv_wifi_set_carddetect,
+};
+static struct resource resources[] = {
+        {
+                .start = WIFI_HOST_WAKE,
+                .flags = IORESOURCE_IRQ,
+                .name = IRQ_RES_NAME,
+        },
+};
+void ssv_wifi_device_release(struct device *dev)
+{
+    printk(KERN_INFO "ssv_wifi_device_release\n");
+}
+static struct platform_device ssv_wifi_device = {
+        .name = "ssv_wlan",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(resources),
+        .resource = resources,
+        .dev = {
+                .platform_data = &ssv_wifi_control,
+                .release = ssv_wifi_device_release,
+         },
+};
+int wifi_set_power(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_power) {
+  wifi_control_data->set_power(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+int wifi_set_reset(int on, unsigned long msec)
+{
+ if (wifi_control_data && wifi_control_data->set_reset) {
+  wifi_control_data->set_reset(on);
+ }
+ if (msec)
+  msleep(msec);
+ return 0;
+}
+static int wifi_set_carddetect(int on)
+{
+ if (wifi_control_data && wifi_control_data->set_carddetect) {
+  wifi_control_data->set_carddetect(on);
+ }
+ return 0;
+}
+static irqreturn_t wifi_wakeup_irq_handler(int irq, void *dev){
+    printk("sdhci_wakeup_irq_handler\n");
+     disable_irq_nosync(irq);
+         return IRQ_HANDLED;
+}
+void setup_wifi_wakeup_BB(struct platform_device *pdev, bool bEnable)
+{
+    int rc=0,ret=0;
+    if (bEnable){
+      wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, IRQ_RES_NAME);
+       rc = (int)wifi_irqres->start;
+        g_wifi_irq_rc = rc;
+        ret = request_threaded_irq(rc,
+                                    NULL,
+                                    (void *)wifi_wakeup_irq_handler,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,0,0)
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT |IRQF_FORCE_RESUME,
+#else
+                                    IRQ_TYPE_LEVEL_HIGH | IRQF_ONESHOT,
+#endif
+                                    "wlan_wakeup_irq", NULL);
+        enable_irq_wake(g_wifi_irq_rc);
+    }else{
+        if(g_wifi_irq_rc){
+            free_irq(g_wifi_irq_rc,NULL);
+            g_wifi_irq_rc = 0;
+        }
+    }
+}
+static int wifi_probe(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ printk(KERN_ALERT "wifi_probe\n");
+    wifi_control_data = wifi_ctrl;
+    #ifndef CONFIG_SSV6XXX
+    ssv_6xxx_wlan_init();
+    #endif
+    wifi_set_carddetect(1);
+    up(&wifi_control_sem);
+    return 0;
+}
+static int wifi_remove(struct platform_device *pdev)
+{
+ struct wifi_platform_data *wifi_ctrl =
+  (struct wifi_platform_data *)(pdev->dev.platform_data);
+ wifi_control_data = wifi_ctrl;
+ wifi_set_power(0, 0);
+ wifi_set_carddetect(0);
+ setup_wifi_wakeup_BB(pdev,false);
+ return 0;
+}
+static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+    setup_wifi_wakeup_BB(pdev,true);
+    return 0;
+}
+static int wifi_resume(struct platform_device *pdev)
+{
+    setup_wifi_wakeup_BB(pdev,false);
+    return 0;
+}
+static struct platform_driver wifi_driver = {
+ .probe = wifi_probe,
+ .remove = wifi_remove,
+ .suspend = wifi_suspend,
+ .resume = wifi_resume,
+ .driver = {
+ .name = "ssv_wlan",
+ }
+};
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    sema_init(&wifi_control_sem, 0);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+    sha1_mod_init();
+    aes_init();
+#endif
+    platform_device_register(&ssv_wifi_device);
+    platform_driver_register(&wifi_driver);
+    g_wifidev_registered = 1;
+    if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+        ret = -EINVAL;
+        printk(KERN_ALERT "%s: platform_driver_register timeout\n", __FUNCTION__);
+    }
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+        platform_driver_unregister(&wifi_driver);
+        platform_device_unregister(&ssv_wifi_device);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static int generic_wifi_init_module(void)
+{
+ return initWlan();
+}
+static void generic_wifi_exit_module(void)
+{
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+#ifdef CONFIG_SSV6XXX
+late_initcall(generic_wifi_init_module);
+#else
+module_init(generic_wifi_init_module);
+#endif
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-wifi.cfg
new file mode 100644
index 0000000000000..3a8af6d875240
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000-wifi.cfg
@@ -0,0 +1,88 @@
+############################################################
+# Ingenic X1000
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path =
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+mac_address_mode = 2
+mac_output_path = /opt/conf/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 26
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = off
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
+#register = CE010008:008B7C1C
+#register = CE010014:3D7E84FE
+#register = CE010048:FCCCCC27
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000.cfg
new file mode 100644
index 0000000000000..ce5efe82edda1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/x1000.cfg
@@ -0,0 +1,22 @@
+############################################################
+# Ingenic X1000
+############################################################
+
+#ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=0
+
+############################################################
+# SSV Airkiss
+############################################################
+ccflags-y += -DCONFIG_SSV_SMARTLINK
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = $(R_CROSS_COMPILE)
+#SSV_KERNEL_PATH = $(KERNEL_BUILD_PATH)
+#SSV_ARCH = $(R_ARCH)
+#KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-generic-wlan.c
new file mode 100644
index 0000000000000..a4e7e0c08e9ce
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-generic-wlan.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+#define GPIO_REG_WRITEL(val,reg) do{__raw_writel(val, CTL_PIN_BASE + (reg));}while(0)
+extern void mmc_rescan_sdio(void);
+extern void wifi_power(int on);
+static int g_wifidev_registered = 0;
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+int initWlan(void)
+{
+    int ret=0;
+    wifi_power(0);
+    mdelay(10);
+    wifi_power(1);
+    mdelay(120);
+ mmc_rescan_sdio();
+    mdelay(120);
+    g_wifidev_registered = 1;
+    ret = ssvdevice_init();
+    return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+        wifi_power(0);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+ sha1_mod_init();
+ aes_init();
+#endif
+ return initWlan();
+}
+static __exit void generic_wifi_exit_module(void)
+{
+ printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+        aes_fini();
+        sha1_mod_fini();
+#endif
+ exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-wifi.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-wifi.cfg
new file mode 100644
index 0000000000000..a9fd3239d6149
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518-wifi.cfg
@@ -0,0 +1,86 @@
+############################################################
+# RK3128
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /dev/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 4
+#wifi_tx_gain_level_gn = 4
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518.cfg
new file mode 100644
index 0000000000000..0b1a42b414301
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/platforms/xm-hi3518.cfg
@@ -0,0 +1,24 @@
+############################################################
+# XiongMai Hi3518
+############################################################
+ccflags-y += -DCONFIG_SSV_BUILD_AS_ONE_KO
+ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DCONFIG_SSV_SMARTLINK
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DCONFIG_SSV_RSSI
+
+############################################################
+# Compiler path
+############################################################
+#SSV_CROSS = arm-hisiv100nptl-linux-
+SSV_CROSS = arm-hisiv300-linux-
+#SSV_KERNEL_PATH = /data/project/XiongMai/Hi3518_SDK_V1.0.9.0/osdrv/kernel/linux-3.0.y/
+SSV_KERNEL_PATH = /data/project/XiongMai/18EV200/Hi3518E_SDK_V1.0.2.0/osdrv/opensource/kernel/linux-3.4.y/
+SSV_ARCH = arm
+#SSV_STRIP = arm-hisiv100nptl-linux-strip
+SSV_STRIP = arm-hisiv300-linux-strip
+KMODDESTDIR = $(MODDESTDIR)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/rules.mak b/drivers/net/wireless/rockchip_wlan/ssv6xxx/rules.mak
new file mode 100644
index 0000000000000..b3262852249ca
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/rules.mak
@@ -0,0 +1,19 @@
+
+
+$(KMODULE_NAME)-y += $(KERN_SRCS:.c=.o)
+obj-$(CONFIG_SSV6200_CORE) += $(KMODULE_NAME).o
+
+
+.PHONY: all clean install
+
+all:
+	@$(MAKE) -C /lib/modules/$(KVERSION)/build \
+		SUBDIRS=$(KBUILD_DIR) CONFIG_DEBUG_SECTION_MISMATCH=y \
+		modules
+
+clean:
+	@$(MAKE) -C /lib/modules/$(KVERSION)/build SUBDIRS=$(KBUILD_DIR) clean
+
+install:
+	@$(MAKE) INSTALL_MOD_DIR=$(DRVPATH) -C /lib/modules/$(KVERSION)/build \
+	        M=$(KBUILD_DIR) modules_install
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-aes.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-aes.sh
new file mode 100644
index 0000000000000..9c0c05c4bfcbd
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-aes.sh
@@ -0,0 +1,52 @@
+#!/bin/bash
+# ------------------------------
+
+# Clean up first.
+./unload_ap.sh
+./unload.sh
+./clean_log.sh
+
+# Load driver for AP mode.
+./ap.sh
+
+sleep 2
+
+# Check interface
+if [[ _$1 = _wlan* ]]; then
+    SSV_WLAN=$1
+else
+    SSV_WLAN=`./find_ssv_wlan`
+
+    if     [[ _$SSV_WLAN != _wlan* ]]; then
+        echo "No SSV WLAN device found."
+        exit 1;
+    fi
+fi
+echo SSV device for AP mode is $SSV_WLAN
+
+# Stop network manager from handling WiFi
+nmcli nm wifi off
+sudo rfkill unblock wlan
+
+# Configure
+ifconfig $SSV_WLAN 192.168.33.1 netmask 255.255.255.0
+cp dhcpd.conf /tmp/dhcpd_$SSV_WLAN.conf
+dhcpd -cf /tmp/dhcpd_$SSV_WLAN.conf -pf /var/run/dhcp-server/dhcpd.pid $SSV_WLAN
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward" 
+iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE
+ap_name=`./get_mac $SSV_WLAN | cut -d ':' -f 3,4,5 | sed -e s/://g`
+ap_name=AP_$ap_name
+cat hostapd.conf.AES.template | sed -s s/HOSTAPD_IF/$SSV_WLAN/g | sed -s s/TestAP/$ap_name/g > hostapd.conf
+
+trap handle_stop INT
+
+function handle_stop() {
+    nmcli nm wifi on
+
+    ./unload_ap.sh
+    ./unload.sh
+    
+    echo AP mode stopped
+}
+        
+/usr/sbin/hostapd hostapd.conf
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-no_sec.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-no_sec.sh
new file mode 100644
index 0000000000000..062306a7dba8d
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-no_sec.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+# ------------------------------
+SSV_WLAN=`./find_ssv_wlan`
+
+if [[ _$SSV_WLAN != _wlan* ]]; then
+    echo "No SSV WLAN device found."
+    exit 1;
+fi
+
+echo SSV device is $SSV_WLAN
+
+nmcli nm wifi off
+sudo rfkill unblock wlan
+
+./unload_ap.sh
+ 
+ifconfig $SSV_WLAN 192.168.33.1 netmask 255.255.255.0
+dhcpd -c dhcpd.cfg -pf /var/run/dhcp-server/dhcpd.pid $SSV_WLAN
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward" 
+iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE
+cat hostapd.conf.NO_SEC.template | sed -s s/HOSTAPD_IF/$SSV_WLAN/g  > hostapd.conf
+hostapd hostapd.conf
+
+nmcli nm wifi on
+# ------------------------------------
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-tkip.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-tkip.sh
new file mode 100644
index 0000000000000..de33e7a37eaef
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap-tkip.sh
@@ -0,0 +1,50 @@
+#!/bin/bash
+# ------------------------------
+
+# Clean up first.
+./unload_ap.sh
+./unload.sh
+./clean_log.sh
+
+# Load driver for AP mode.
+./ap.sh
+
+sleep 2
+
+# Check interface
+if [[ _$1 = _wlan* ]]; then
+    SSV_WLAN=$1
+else
+    SSV_WLAN=`./find_ssv_wlan`
+
+    if     [[ _$SSV_WLAN != _wlan* ]]; then
+        echo "No SSV WLAN device found."
+        exit 1;
+    fi
+fi
+echo SSV device for AP mode is $SSV_WLAN
+
+# Stop network manager from handling WiFi
+nmcli nm wifi off
+sudo rfkill unblock wlan
+
+# Configure
+ifconfig $SSV_WLAN 192.168.33.1 netmask 255.255.255.0
+cp dhcpd.conf /tmp/dhcpd_$SSV_WLAN.conf
+dhcpd -cf /tmp/dhcpd_$SSV_WLAN.conf -pf /var/run/dhcp-server/dhcpd.pid $SSV_WLAN
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward" 
+iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE
+cat hostapd.conf.TKIP.template | sed -s s/HOSTAPD_IF/$SSV_WLAN/g  > hostapd.conf
+
+trap handle_stop INT
+
+function handle_stop() {
+    nmcli nm wifi on
+
+    ./unload_ap.sh
+    ./unload.sh
+    
+    echo AP mode stopped
+}
+        
+hostapd hostapd.conf
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap.sh
new file mode 100644
index 0000000000000..6268d51f58abb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap.sh
@@ -0,0 +1,40 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "1.Copy firmware"
+echo "=================================================="
+cp ../image/ssv6200-sw.bin /lib/firmware/
+
+echo "=================================================="
+echo "1.Unload Module"
+echo "=================================================="
+./unload.sh
+
+echo "=================================================="
+echo "2.Set Hardware Capability"
+echo "=================================================="
+
+eth0_local_mac=`ifconfig eth0  | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g' | cut -d ':' -f 4,5,6`
+[ "$eth0_local_mac" == "" ] && eth0_local_mac="45:67:89"
+local_mac=00:aa:bb:$eth0_local_mac
+local_mac_2=00:00:00:00:00:00
+echo WLAN MAC is $local_mac
+
+cat sta.cfg.template | sed -e "s/MAC_ADDR/$local_mac/g" | sed -e "s/MAC2ADDR/$local_mac_2/g" > sta_local_mac.cfg
+./ssvcfg.sh sta_local_mac.cfg
+
+echo "=================================================="
+echo "3.Load MMC Module"
+echo "=================================================="
+modprobe mmc_core sdiomaxclock=25000000
+modprobe sdhci
+modprobe sdhci-pci
+modprobe mmc_block
+
+echo "=================================================="
+echo "4.Load SSV6200 Driver"
+echo "=================================================="
+echo 6 > /proc/sys/kernel/printk
+
+modprobe ssv6200_sdio
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap2-aes.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap2-aes.sh
new file mode 100644
index 0000000000000..9aed19fe88499
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap2-aes.sh
@@ -0,0 +1,32 @@
+#!/bin/bash
+# ------------------------------
+
+if [[ _$1 = _wlan* ]]; then
+    SSV_WLAN=$1
+else
+    SSV_WLAN=`./find_ssv_wlan`
+
+    if     [[ _$SSV_WLAN != _wlan* ]]; then
+        echo "No SSV WLAN device found."
+        exit 1;
+    fi
+fi
+echo SSV device for AP mode is $SSV_WLAN
+
+#nmcli nm wifi off
+#sudo rfkill unblock wlan
+
+./unload_ap.sh
+ 
+ifconfig $SSV_WLAN 192.168.33.1 netmask 255.255.255.0
+cp dhcpd.conf /tmp/dhcpd_$SSV_WLAN.conf
+dhcpd -cf /tmp/dhcpd_$SSV_WLAN.conf -pf /var/run/dhcp-server/dhcpd.pid $SSV_WLAN
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward" 
+iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE
+cat hostapd.conf.AES.template | sed -s s/HOSTAPD_IF/$SSV_WLAN/g  > hostapd.conf
+hostapd hostapd.conf
+
+#nmcli nm wifi on
+
+echo AP mode stopped
+# ------------------------------------
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap_sta.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap_sta.sh
new file mode 100644
index 0000000000000..10b0691cfccad
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ap_sta.sh
@@ -0,0 +1,22 @@
+#!/bin/bash
+#nmcli nm wifi off
+#sudo rfkill unblock wlan
+
+./unload_ap.sh
+
+ifconfig $1 192.168.33.1 netmask 255.255.255.0
+cp dhcpd.conf /tmp/dhcpd_$1.conf
+dhcpd -cf /tmp/dhcpd_$1.conf -pf /var/run/dhcp-server/dhcpd.pid $1
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward" 
+iptables -t nat -A POSTROUTING -o $2 -j MASQUERADE
+if [ $# > 3 ]; then
+    echo 3:$3
+    cat hostapd.conf.AES.template | sed -s s/HOSTAPD_IF/$1/g  | sed -s s/TestAP/$3/g > hostapd.conf;
+else
+    cat hostapd.conf.AES.template | sed -s s/HOSTAPD_IF/$1/g  > hostapd.conf;
+fi
+#hostapd -e hostapd.entropy hostapd.conf
+hostapd hostapd.conf
+
+#nmcli nm wifi on
+# ------------------------------------
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/check_con_ap.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/check_con_ap.sh
new file mode 100644
index 0000000000000..257893189b7fd
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/check_con_ap.sh
@@ -0,0 +1,55 @@
+#/bin/bash
+#load/unload driver
+
+count=0
+
+S=1
+while [ "$S" == "1" ]
+do
+	  count=$[ count + 1 ]
+    sleep 3
+    dmesg -c
+    ./unload.sh
+    ./load.sh
+    sleep 3
+    ./cli mib reset
+    ./cli mib ampdurx
+    ./cli hci rxq show
+    sleep 60    
+    gotIp=$(ifconfig | grep "inet addr:192.168.2.22")
+    if [ "$gotIp" == "" ]; then
+  		echo -n "[$count]timeout..."
+  		addr=$(dmesg | grep "30 49 3b 01 3f c0")
+    	if [ "$addr" == "" ]; then	
+  			echo "no rx beacon..."
+		    ./cli mib ampdurx
+		    ./cli hci rxq show
+				./unload.sh
+  			break
+  		else
+  			echo "got rx beacon..."
+  			./cli mib ampdurx
+  			./cli hci rxq show
+  			sleep 2
+  		fi
+		else
+		
+			addr=$(dmesg | grep "30 49 3b 01 3f c0")
+    	if [ "$addr" == "" ]; then	
+  			echo "[$count] connet to ap... no rx beacon..."
+  		       ./cli mib ampdurx
+  		       ./cli hci rxq show
+             ./unload.sh
+                        
+  			break
+  		else
+  			echo "[$count]connet to ap... got rx beacon..." 
+  			./cli mib ampdurx
+  			./cli hci rxq show
+  			sleep 2 		
+  		fi
+			 
+    fi
+    
+done
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/clean_log.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/clean_log.sh
new file mode 100644
index 0000000000000..2a9320ba37953
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/clean_log.sh
@@ -0,0 +1,4 @@
+#/bin/bash
+dmesg -C
+rm -fr /var/log/*
+service rsyslog restart
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cli b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cli
new file mode 100644
index 0000000000000..e68c1bcca04f1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cli
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+SSV_DFS_FILE=/sys/kernel/debug/ssv/ssv_cmd
+if [ -f $SSV_DFS_FILE ]; then
+    echo "$*" > $SSV_DFS_FILE
+    cat $SSV_DFS_FILE
+fi
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cpu b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cpu
new file mode 100644
index 0000000000000..1a17e942d25a6
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/cpu
@@ -0,0 +1,13 @@
+#!/bin/sh
+pid_list="`pgrep -d , ssv `,`pgrep -d , sdio`"
+cpu_list=/sys/devices/system/cpu/cpu?
+while [ true ] 
+    do 
+        #clear
+        echo "============================================================================"
+        top -b -n 1 -p $pid_list
+        for cpu in $cpu_list; do 
+	    echo "`basename $cpu` `cat $cpu/cpufreq/cpuinfo_cur_freq`"; 
+        done
+        #sleep 0.1
+    done
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/dhcpd.conf b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/dhcpd.conf
new file mode 100644
index 0000000000000..46a186058dd40
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/dhcpd.conf
@@ -0,0 +1,116 @@
+#
+# Sample configuration file for ISC dhcpd for Debian
+#
+# Attention: If /etc/ltsp/dhcpd.conf exists, that will be used as
+# configuration file instead of this file.
+#
+#
+
+# The ddns-updates-style parameter controls whether or not the server will
+# attempt to do a DNS update when a lease is confirmed. We default to the
+# behavior of the version 2 packages ('none', since DHCP v2 didn't
+# have support for DDNS.)
+ddns-update-style none;
+
+# option definitions common to all supported networks...
+option domain-name "example.org";
+option domain-name-servers ns1.example.org, ns2.example.org;
+
+default-lease-time 600;
+max-lease-time 7200;
+
+# If this DHCP server is the official DHCP server for the local
+# network, the authoritative directive should be uncommented.
+#authoritative;
+
+# Use this to send dhcp log messages to a different log file (you also
+# have to hack syslog.conf to complete the redirection).
+log-facility local7;
+
+# No service will be given on this subnet, but declaring it helps the 
+# DHCP server to understand the network topology.
+
+#subnet 10.152.187.0 netmask 255.255.255.0 {
+#}
+
+# This is a very basic subnet declaration.
+
+#subnet 10.254.239.0 netmask 255.255.255.224 {
+#  range 10.254.239.10 10.254.239.20;
+#  option routers rtr-239-0-1.example.org, rtr-239-0-2.example.org;
+#}
+
+# This declaration allows BOOTP clients to get dynamic addresses,
+# which we don't really recommend.
+
+#subnet 10.254.239.32 netmask 255.255.255.224 {
+#  range dynamic-bootp 10.254.239.40 10.254.239.60;
+#  option broadcast-address 10.254.239.31;
+#  option routers rtr-239-32-1.example.org;
+#}
+
+# A slightly different configuration for an internal subnet.
+#subnet 10.5.5.0 netmask 255.255.255.224 {
+#  range 10.5.5.26 10.5.5.30;
+#  option domain-name-servers ns1.internal.example.org;
+#  option domain-name "internal.example.org";
+#  option routers 10.5.5.1;
+#  option broadcast-address 10.5.5.31;
+#  default-lease-time 600;
+#  max-lease-time 7200;
+#}
+
+# Hosts which require special configuration options can be listed in
+# host statements.   If no address is specified, the address will be
+# allocated dynamically (if possible), but the host-specific information
+# will still come from the host declaration.
+
+#host passacaglia {
+#  hardware ethernet 0:0:c0:5d:bd:95;
+#  filename "vmunix.passacaglia";
+#  server-name "toccata.fugue.com";
+#}
+
+# Fixed IP addresses can also be specified for hosts.   These addresses
+# should not also be listed as being available for dynamic assignment.
+# Hosts for which fixed IP addresses have been specified can boot using
+# BOOTP or DHCP.   Hosts for which no fixed address is specified can only
+# be booted with DHCP, unless there is an address range on the subnet
+# to which a BOOTP client is connected which has the dynamic-bootp flag
+# set.
+#host fantasia {
+#  hardware ethernet 08:00:07:26:c0:a5;
+#  fixed-address fantasia.fugue.com;
+#}
+
+# You can declare a class of clients and then do address allocation
+# based on that.   The example below shows a case where all clients
+# in a certain class get addresses on the 10.17.224/24 subnet, and all
+# other clients get addresses on the 10.0.29/24 subnet.
+
+#class "foo" {
+#  match if substring (option vendor-class-identifier, 0, 4) = "SUNW";
+#}
+
+#shared-network 224-29 {
+#  subnet 10.17.224.0 netmask 255.255.255.0 {
+#    option routers rtr-224.example.org;
+#  }
+#  subnet 10.0.29.0 netmask 255.255.255.0 {
+#    option routers rtr-29.example.org;
+#  }
+#  pool {
+#    allow members of "foo";
+#    range 10.17.224.10 10.17.224.250;
+#  }
+#  pool {
+#    deny members of "foo";
+#    range 10.0.29.10 10.0.29.230;
+#  }
+#}
+
+subnet 192.168.33.0 netmask 255.255.255.0 {
+    range 192.168.33.100 192.168.33.110;
+    option routers 192.168.33.1;
+    option domain-name-servers 168.95.1.1;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_phy b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_phy
new file mode 100644
index 0000000000000..c6799c187098b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_phy
@@ -0,0 +1,10 @@
+#!/bin/sh
+phy_dirs="/sys/class/ieee80211/*"
+ssv_drv_name="ssv6200"
+
+for phy_dir in $phy_dirs; do
+    if [ -e "$phy_dir/device/driver/$ssv_drv_name" ]; then
+    	echo `basename $phy_dir`;
+    	break;
+    fi
+done
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_wlan b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_wlan
new file mode 100644
index 0000000000000..936c74bf23585
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/find_ssv_wlan
@@ -0,0 +1,10 @@
+#!/bin/sh
+net_dirs="/sys/class/net/*"
+ssv_drv_name="ssv6200"
+
+for net_dir in $net_dirs; do
+    if [ -e "$net_dir/phy80211/device/driver/$ssv_drv_name" ]; then
+    	echo `basename $net_dir`;
+    	#break;
+    fi
+done
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/genconf.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/genconf.sh
new file mode 100644
index 0000000000000..47d65e5cee781
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/genconf.sh
@@ -0,0 +1,18 @@
+#!/bin/bash
+# Script to convert defines in compiler option in to C's defines
+# Should be executed in make file and it take ccflags-y as the
+# compiler options. The content will be redirected to the first arguement.
+
+echo "#ifndef __SSV_MOD_CONF_H__" > $1
+echo "#define __SSV_MOD_CONF_H__" >> $1
+
+for flag in ${ccflags-y}; do
+	if [[ "$flag" =~ ^-D.* ]]; then
+		#def=${flag//-D/}
+		def=${flag:2}
+		echo "#ifndef $def" >> $1
+		echo "#define $def" >> $1
+		echo "#endif" >> $1
+	fi
+done
+echo "#endif // __SSV_MOD_CONF_H__" >> $1
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/get_mac b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/get_mac
new file mode 100644
index 0000000000000..fb14e4e01ce8e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/get_mac
@@ -0,0 +1,10 @@
+#!/bin/sh
+if [ $# != 1 ]; then
+    interface=eth0
+else
+    interface=$1
+fi
+
+mac=`ifconfig $interface | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g'`
+
+echo $mac
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hci_mib b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hci_mib
new file mode 100644
index 0000000000000..e4be3e12d2f18
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hci_mib
@@ -0,0 +1,28 @@
+#!/bin/sh
+if [ $# -lt 1 ]; then
+	echo "Usage: hci_mib PHY_IF $#";
+	exit;
+fi
+
+phy_if=/sys/kernel/debug/ieee80211/$1/ssv6200/hci
+if [ ! -d $phy_if ]; then 
+    echo "$phy_if does not exist.";
+    exit;
+fi
+
+cd $phy_if
+
+echo 0 > hci_isr_mib_enable
+echo 1 > hci_isr_mib_reset
+echo 1 > hci_isr_mib_enable
+
+sleep 10
+
+echo 0 > hci_isr_mib_enable
+
+echo "ISR total time: `cat isr_total_time`"
+echo "RX IO time: `cat rx_io_time`"
+echo "RX IO count: `cat rx_io_count`"
+echo "RX process time: `cat rx_proc_time`"
+echo "TX IO time: `cat tx_io_time`"
+echo "TX IO count: `cat tx_io_count`"
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.AES.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.AES.template
new file mode 100644
index 0000000000000..e063c4ed35925
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.AES.template
@@ -0,0 +1,1664 @@
+##### hostapd configuration file ##############################################
+# Empty lines and lines starting with # are ignored
+
+# AP netdevice name (without 'ap' postfix, i.e., wlan0 uses wlan0ap for
+# management frames); ath0 for madwifi
+interface=HOSTAPD_IF
+
+# In case of madwifi, atheros, and nl80211 driver interfaces, an additional
+# configuration parameter, bridge, may be used to notify hostapd if the
+# interface is included in a bridge. This parameter is not used with Host AP
+# driver. If the bridge parameter is not set, the drivers will automatically
+# figure out the bridge interface (assuming sysfs is enabled and mounted to
+# /sys) and this parameter may not be needed.
+#
+# For nl80211, this parameter can be used to request the AP interface to be
+# added to the bridge automatically (brctl may refuse to do this before hostapd
+# has been started to change the interface mode). If needed, the bridge
+# interface is also created.
+#bridge=br0
+
+# Driver interface type (hostap/wired/madwifi/test/none/nl80211/bsd);
+# default: hostap). nl80211 is used with all Linux mac80211 drivers.
+# Use driver=none if building hostapd as a standalone RADIUS server that does
+# not control any wireless/wired driver.
+# driver=hostap
+
+# hostapd event logger configuration
+#
+# Two output method: syslog and stdout (only usable if not forking to
+# background).
+#
+# Module bitfield (ORed bitfield of modules that will be logged; -1 = all
+# modules):
+# bit 0 (1) = IEEE 802.11
+# bit 1 (2) = IEEE 802.1X
+# bit 2 (4) = RADIUS
+# bit 3 (8) = WPA
+# bit 4 (16) = driver interface
+# bit 5 (32) = IAPP
+# bit 6 (64) = MLME
+#
+# Levels (minimum value for logged events):
+#  0 = verbose debugging
+#  1 = debugging
+#  2 = informational messages
+#  3 = notification
+#  4 = warning
+#
+logger_syslog=1
+logger_syslog_level=0
+logger_stdout=1
+logger_stdout_level=0
+
+# Interface for separate control program. If this is specified, hostapd
+# will create this directory and a UNIX domain socket for listening to requests
+# from external programs (CLI/GUI, etc.) for status information and
+# configuration. The socket file will be named based on the interface name, so
+# multiple hostapd processes/interfaces can be run at the same time if more
+# than one interface is used.
+# /var/run/hostapd is the recommended directory for sockets and by default,
+# hostapd_cli will use it when trying to connect with hostapd.
+ctrl_interface=/var/run/hostapd
+
+# Access control for the control interface can be configured by setting the
+# directory to allow only members of a group to use sockets. This way, it is
+# possible to run hostapd as root (since it needs to change network
+# configuration and open raw sockets) and still allow GUI/CLI components to be
+# run as non-root users. However, since the control interface can be used to
+# change the network configuration, this access needs to be protected in many
+# cases. By default, hostapd is configured to use gid 0 (root). If you
+# want to allow non-root users to use the contron interface, add a new group
+# and change this value to match with that group. Add users that should have
+# control interface access to this group.
+#
+# This variable can be a group name or gid.
+#ctrl_interface_group=wheel
+ctrl_interface_group=0
+
+
+##### IEEE 802.11 related configuration #######################################
+
+# SSID to be used in IEEE 802.11 management frames
+ssid=TestAP_CCMP
+# Alternative formats for configuring SSID
+# (double quoted string, hexdump, printf-escaped string)
+#ssid2="test"
+#ssid2=74657374
+#ssid2=P"hello\nthere"
+
+# UTF-8 SSID: Whether the SSID is to be interpreted using UTF-8 encoding
+#utf8_ssid=1
+
+# Country code (ISO/IEC 3166-1). Used to set regulatory domain.
+# Set as needed to indicate country in which device is operating.
+# This can limit available channels and transmit power.
+#country_code=US
+
+# Enable IEEE 802.11d. This advertises the country_code and the set of allowed
+# channels and transmit power levels based on the regulatory limits. The
+# country_code setting must be configured with the correct country for
+# IEEE 802.11d functions.
+# (default: 0 = disabled)
+#ieee80211d=1
+
+# Enable IEEE 802.11h. This enables radar detection and DFS support if
+# available. DFS support is required on outdoor 5 GHz channels in most countries
+# of the world. This can be used only with ieee80211d=1.
+# (default: 0 = disabled)
+#ieee80211h=1
+
+# Operation mode (a = IEEE 802.11a, b = IEEE 802.11b, g = IEEE 802.11g,
+# ad = IEEE 802.11ad (60 GHz); a/g options are used with IEEE 802.11n, too, to
+# specify band)
+# Default: IEEE 802.11b
+hw_mode=g
+
+# Channel number (IEEE 802.11)
+# (default: 0, i.e., not set)
+# Please note that some drivers do not use this value from hostapd and the
+# channel will need to be configured separately with iwconfig.
+#
+# If CONFIG_ACS build option is enabled, the channel can be selected
+# automatically at run time by setting channel=acs_survey or channel=0, both of
+# which will enable the ACS survey based algorithm.
+channel=11
+
+# ACS tuning - Automatic Channel Selection
+# See: http://wireless.kernel.org/en/users/Documentation/acs
+#
+# You can customize the ACS survey algorithm with following variables:
+#
+# acs_num_scans requirement is 1..100 - number of scans to be performed that
+# are used to trigger survey data gathering of an underlying device driver.
+# Scans are passive and typically take a little over 100ms (depending on the
+# driver) on each available channel for given hw_mode. Increasing this value
+# means sacrificing startup time and gathering more data wrt channel
+# interference that may help choosing a better channel. This can also help fine
+# tune the ACS scan time in case a driver has different scan dwell times.
+#
+# Defaults:
+#acs_num_scans=5
+
+# Beacon interval in kus (1.024 ms) (default: 100; range 15..65535)
+beacon_int=100
+
+# DTIM (delivery traffic information message) period (range 1..255):
+# number of beacons between DTIMs (1 = every beacon includes DTIM element)
+# (default: 2)
+dtim_period=1
+
+# Maximum number of stations allowed in station table. New stations will be
+# rejected after the station table is full. IEEE 802.11 has a limit of 2007
+# different association IDs, so this number should not be larger than that.
+# (default: 2007)
+max_num_sta=255
+
+# RTS/CTS threshold; 2347 = disabled (default); range 0..2347
+# If this field is not included in hostapd.conf, hostapd will not control
+# RTS threshold and 'iwconfig wlan# rts <val>' can be used to set it.
+rts_threshold=2347
+
+# Fragmentation threshold; 2346 = disabled (default); range 256..2346
+# If this field is not included in hostapd.conf, hostapd will not control
+# fragmentation threshold and 'iwconfig wlan# frag <val>' can be used to set
+# it.
+fragm_threshold=2346
+
+# Rate configuration
+# Default is to enable all rates supported by the hardware. This configuration
+# item allows this list be filtered so that only the listed rates will be left
+# in the list. If the list is empty, all rates are used. This list can have
+# entries that are not in the list of rates the hardware supports (such entries
+# are ignored). The entries in this list are in 100 kbps, i.e., 11 Mbps = 110.
+# If this item is present, at least one rate have to be matching with the rates
+# hardware supports.
+# default: use the most common supported rate setting for the selected
+# hw_mode (i.e., this line can be removed from configuration file in most
+# cases)
+#supported_rates=10 20 55 110 60 90 120 180 240 360 480 540
+
+# Basic rate set configuration
+# List of rates (in 100 kbps) that are included in the basic rate set.
+# If this item is not included, usually reasonable default set is used.
+#basic_rates=10 20
+#basic_rates=10 20 55 110
+#basic_rates=60 120 240
+
+# Short Preamble
+# This parameter can be used to enable optional use of short preamble for
+# frames sent at 2 Mbps, 5.5 Mbps, and 11 Mbps to improve network performance.
+# This applies only to IEEE 802.11b-compatible networks and this should only be
+# enabled if the local hardware supports use of short preamble. If any of the
+# associated STAs do not support short preamble, use of short preamble will be
+# disabled (and enabled when such STAs disassociate) dynamically.
+# 0 = do not allow use of short preamble (default)
+# 1 = allow use of short preamble
+#preamble=1
+
+# Station MAC address -based authentication
+# Please note that this kind of access control requires a driver that uses
+# hostapd to take care of management frame processing and as such, this can be
+# used with driver=hostap or driver=nl80211, but not with driver=madwifi.
+# 0 = accept unless in deny list
+# 1 = deny unless in accept list
+# 2 = use external RADIUS server (accept/deny lists are searched first)
+macaddr_acl=0
+
+# Accept/deny lists are read from separate files (containing list of
+# MAC addresses, one per line). Use absolute path name to make sure that the
+# files can be read on SIGHUP configuration reloads.
+#accept_mac_file=/etc/hostapd.accept
+#deny_mac_file=/etc/hostapd.deny
+
+# IEEE 802.11 specifies two authentication algorithms. hostapd can be
+# configured to allow both of these or only one. Open system authentication
+# should be used with IEEE 802.1X.
+# Bit fields of allowed authentication algorithms:
+# bit 0 = Open System Authentication
+# bit 1 = Shared Key Authentication (requires WEP)
+auth_algs=3
+
+# Send empty SSID in beacons and ignore probe request frames that do not
+# specify full SSID, i.e., require stations to know SSID.
+# default: disabled (0)
+# 1 = send empty (length=0) SSID in beacon and ignore probe request for
+#     broadcast SSID
+# 2 = clear SSID (ASCII 0), but keep the original length (this may be required
+#     with some clients that do not support empty SSID) and ignore probe
+#     requests for broadcast SSID
+ignore_broadcast_ssid=0
+
+# Additional vendor specfic elements for Beacon and Probe Response frames
+# This parameter can be used to add additional vendor specific element(s) into
+# the end of the Beacon and Probe Response frames. The format for these
+# element(s) is a hexdump of the raw information elements (id+len+payload for
+# one or more elements)
+#vendor_elements=dd0411223301
+
+# TX queue parameters (EDCF / bursting)
+# tx_queue_<queue name>_<param>
+# queues: data0, data1, data2, data3, after_beacon, beacon
+#		(data0 is the highest priority queue)
+# parameters:
+#   aifs: AIFS (default 2)
+#   cwmin: cwMin (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023)
+#   cwmax: cwMax (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023); cwMax >= cwMin
+#   burst: maximum length (in milliseconds with precision of up to 0.1 ms) for
+#          bursting
+#
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# These parameters are used by the access point when transmitting frames
+# to the clients.
+#
+# Low priority / AC_BK = background
+#tx_queue_data3_aifs=7
+#tx_queue_data3_cwmin=15
+#tx_queue_data3_cwmax=1023
+#tx_queue_data3_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=1023 burst=0
+#
+# Normal priority / AC_BE = best effort
+#tx_queue_data2_aifs=3
+#tx_queue_data2_cwmin=15
+#tx_queue_data2_cwmax=63
+#tx_queue_data2_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=127 burst=0
+#
+# High priority / AC_VI = video
+#tx_queue_data1_aifs=1
+#tx_queue_data1_cwmin=7
+#tx_queue_data1_cwmax=15
+#tx_queue_data1_burst=3.0
+# Note: for IEEE 802.11b mode: cWmin=15 cWmax=31 burst=6.0
+#
+# Highest priority / AC_VO = voice
+#tx_queue_data0_aifs=1
+#tx_queue_data0_cwmin=3
+#tx_queue_data0_cwmax=7
+#tx_queue_data0_burst=1.5
+# Note: for IEEE 802.11b mode: cWmin=7 cWmax=15 burst=3.3
+
+# 802.1D Tag (= UP) to AC mappings
+# WMM specifies following mapping of data frames to different ACs. This mapping
+# can be configured using Linux QoS/tc and sch_pktpri.o module.
+# 802.1D Tag	802.1D Designation	Access Category	WMM Designation
+# 1		BK			AC_BK		Background
+# 2		-			AC_BK		Background
+# 0		BE			AC_BE		Best Effort
+# 3		EE			AC_BE		Best Effort
+# 4		CL			AC_VI		Video
+# 5		VI			AC_VI		Video
+# 6		VO			AC_VO		Voice
+# 7		NC			AC_VO		Voice
+# Data frames with no priority information: AC_BE
+# Management frames: AC_VO
+# PS-Poll frames: AC_BE
+
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# for 802.11a or 802.11g networks
+# These parameters are sent to WMM clients when they associate.
+# The parameters will be used by WMM clients for frames transmitted to the
+# access point.
+#
+# note - txop_limit is in units of 32microseconds
+# note - acm is admission control mandatory flag. 0 = admission control not
+# required, 1 = mandatory
+# note - here cwMin and cmMax are in exponent form. the actual cw value used
+# will be (2^n)-1 where n is the value given here
+#
+wmm_enabled=1
+#
+# WMM-PS Unscheduled Automatic Power Save Delivery [U-APSD]
+# Enable this flag if U-APSD supported outside hostapd (eg., Firmware/driver)
+#uapsd_advertisement_enabled=1
+#
+# Low priority / AC_BK = background
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=10
+#
+# Normal priority / AC_BE = best effort
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=7
+#
+# High priority / AC_VI = video
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+# Note: for IEEE 802.11b mode: cWmin=4 cWmax=5 txop_limit=188
+#
+# Highest priority / AC_VO = voice
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
+# Note: for IEEE 802.11b mode: cWmin=3 cWmax=4 burst=102
+
+# Static WEP key configuration
+#
+# The key number to use when transmitting.
+# It must be between 0 and 3, and the corresponding key must be set.
+# default: not set
+#wep_default_key=0
+# The WEP keys to use.
+# A key may be a quoted string or unquoted hexadecimal digits.
+# The key length should be 5, 13, or 16 characters, or 10, 26, or 32
+# digits, depending on whether 40-bit (64-bit), 104-bit (128-bit), or
+# 128-bit (152-bit) WEP is used.
+# Only the default key must be supplied; the others are optional.
+# default: not set
+#wep_key0=123456789a
+#wep_key1="vwxyz"
+#wep_key2=0102030405060708090a0b0c0d
+#wep_key3=".2.4.6.8.0.23"
+
+# Station inactivity limit
+#
+# If a station does not send anything in ap_max_inactivity seconds, an
+# empty data frame is sent to it in order to verify whether it is
+# still in range. If this frame is not ACKed, the station will be
+# disassociated and then deauthenticated. This feature is used to
+# clear station table of old entries when the STAs move out of the
+# range.
+#
+# The station can associate again with the AP if it is still in range;
+# this inactivity poll is just used as a nicer way of verifying
+# inactivity; i.e., client will not report broken connection because
+# disassociation frame is not sent immediately without first polling
+# the STA with a data frame.
+# default: 300 (i.e., 5 minutes)
+#ap_max_inactivity=300
+#
+# The inactivity polling can be disabled to disconnect stations based on
+# inactivity timeout so that idle stations are more likely to be disconnected
+# even if they are still in range of the AP. This can be done by setting
+# skip_inactivity_poll to 1 (default 0).
+#skip_inactivity_poll=0
+
+# Disassociate stations based on excessive transmission failures or other
+# indications of connection loss. This depends on the driver capabilities and
+# may not be available with all drivers.
+#disassoc_low_ack=1
+
+# Maximum allowed Listen Interval (how many Beacon periods STAs are allowed to
+# remain asleep). Default: 65535 (no limit apart from field size)
+#max_listen_interval=100
+
+# WDS (4-address frame) mode with per-station virtual interfaces
+# (only supported with driver=nl80211)
+# This mode allows associated stations to use 4-address frames to allow layer 2
+# bridging to be used.
+#wds_sta=1
+
+# If bridge parameter is set, the WDS STA interface will be added to the same
+# bridge by default. This can be overridden with the wds_bridge parameter to
+# use a separate bridge.
+#wds_bridge=wds-br0
+
+# Start the AP with beaconing disabled by default.
+#start_disabled=0
+
+# Client isolation can be used to prevent low-level bridging of frames between
+# associated stations in the BSS. By default, this bridging is allowed.
+#ap_isolate=1
+
+# Fixed BSS Load value for testing purposes
+# This field can be used to configure hostapd to add a fixed BSS Load element
+# into Beacon and Probe Response frames for testing purposes. The format is
+# <station count>:<channel utilization>:<available admission capacity>
+#bss_load_test=12:80:20000
+
+##### IEEE 802.11n related configuration ######################################
+
+# ieee80211n: Whether IEEE 802.11n (HT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full HT functionality.
+ieee80211n=1
+
+# ht_capab: HT capabilities (list of flags)
+# LDPC coding capability: [LDPC] = supported
+# Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
+#	channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
+#	with secondary channel below the primary channel
+#	(20 MHz only if neither is set)
+#	Note: There are limits on which channels can be used with HT40- and
+#	HT40+. Following table shows the channels that may be available for
+#	HT40- and HT40+ use per IEEE 802.11n Annex J:
+#	freq		HT40-		HT40+
+#	2.4 GHz		5-13		1-7 (1-9 in Europe/Japan)
+#	5 GHz		40,48,56,64	36,44,52,60
+#	(depending on the location, not all of these channels may be available
+#	for use)
+#	Please note that 40 MHz channels may switch their primary and secondary
+#	channels if needed or creation of 40 MHz channel maybe rejected based
+#	on overlapping BSSes. These changes are done automatically when hostapd
+#	is setting up the 40 MHz channel.
+# Spatial Multiplexing (SM) Power Save: [SMPS-STATIC] or [SMPS-DYNAMIC]
+#	(SMPS disabled if neither is set)
+# HT-greenfield: [GF] (disabled if not set)
+# Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
+# Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
+# Tx STBC: [TX-STBC] (disabled if not set)
+# Rx STBC: [RX-STBC1] (one spatial stream), [RX-STBC12] (one or two spatial
+#	streams), or [RX-STBC123] (one, two, or three spatial streams); Rx STBC
+#	disabled if none of these set
+# HT-delayed Block Ack: [DELAYED-BA] (disabled if not set)
+# Maximum A-MSDU length: [MAX-AMSDU-7935] for 7935 octets (3839 octets if not
+#	set)
+# DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
+# PSMP support: [PSMP] (disabled if not set)
+# L-SIG TXOP protection support: [LSIG-TXOP-PROT] (disabled if not set)
+#ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
+ht_capab=[SHORT-GI-20]
+
+# Require stations to support HT PHY (reject association if they do not)
+#require_ht=1
+
+# If set non-zero, require stations to perform scans of overlapping
+# channels to test for stations which would be affected by 40 MHz traffic.
+# This parameter sets the interval in seconds between these scans. This
+# is useful only for testing that stations properly set the OBSS interval,
+# since the other parameters in the OBSS scan parameters IE are set to 0.
+#obss_interval=0
+
+##### IEEE 802.11ac related configuration #####################################
+
+# ieee80211ac: Whether IEEE 802.11ac (VHT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full VHT functionality.
+#ieee80211ac=1
+
+# vht_capab: VHT capabilities (list of flags)
+#
+# vht_max_mpdu_len: [MAX-MPDU-7991] [MAX-MPDU-11454]
+# Indicates maximum MPDU length
+# 0 = 3895 octets (default)
+# 1 = 7991 octets
+# 2 = 11454 octets
+# 3 = reserved
+#
+# supported_chan_width: [VHT160] [VHT160-80PLUS80]
+# Indicates supported Channel widths
+# 0 = 160 MHz & 80+80 channel widths are not supported (default)
+# 1 = 160 MHz channel width is supported
+# 2 = 160 MHz & 80+80 channel widths are supported
+# 3 = reserved
+#
+# Rx LDPC coding capability: [RXLDPC]
+# Indicates support for receiving LDPC coded pkts
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 80 MHz: [SHORT-GI-80]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 80Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 160 MHz: [SHORT-GI-160]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 160Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Tx STBC: [TX-STBC-2BY1]
+# Indicates support for the transmission of at least 2x1 STBC
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Rx STBC: [RX-STBC-1] [RX-STBC-12] [RX-STBC-123] [RX-STBC-1234]
+# Indicates support for the reception of PPDUs using STBC
+# 0 = Not supported (default)
+# 1 = support of one spatial stream
+# 2 = support of one and two spatial streams
+# 3 = support of one, two and three spatial streams
+# 4 = support of one, two, three and four spatial streams
+# 5,6,7 = reserved
+#
+# SU Beamformer Capable: [SU-BEAMFORMER]
+# Indicates support for operation as a single user beamformer
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# SU Beamformee Capable: [SU-BEAMFORMEE]
+# Indicates support for operation as a single user beamformee
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Compressed Steering Number of Beamformer Antennas Supported: [BF-ANTENNA-2]
+#   Beamformee's capability indicating the maximum number of beamformer
+#   antennas the beamformee can support when sending compressed beamforming
+#   feedback
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# Number of Sounding Dimensions: [SOUNDING-DIMENSION-2]
+# Beamformer's capability indicating the maximum value of the NUM_STS parameter
+# in the TXVECTOR of a VHT NDP
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# MU Beamformer Capable: [MU-BEAMFORMER]
+# Indicates support for operation as an MU beamformer
+# 0 = Not supported or sent by Non-AP STA (default)
+# 1 = Supported
+#
+# MU Beamformee Capable: [MU-BEAMFORMEE]
+# Indicates support for operation as an MU beamformee
+# 0 = Not supported or sent by AP (default)
+# 1 = Supported
+#
+# VHT TXOP PS: [VHT-TXOP-PS]
+# Indicates whether or not the AP supports VHT TXOP Power Save Mode
+#  or whether or not the STA is in VHT TXOP Power Save mode
+# 0 = VHT AP doesnt support VHT TXOP PS mode (OR) VHT Sta not in VHT TXOP PS
+#  mode
+# 1 = VHT AP supports VHT TXOP PS mode (OR) VHT Sta is in VHT TXOP power save
+#  mode
+#
+# +HTC-VHT Capable: [HTC-VHT]
+# Indicates whether or not the STA supports receiving a VHT variant HT Control
+# field.
+# 0 = Not supported (default)
+# 1 = supported
+#
+# Maximum A-MPDU Length Exponent: [MAX-A-MPDU-LEN-EXP0]..[MAX-A-MPDU-LEN-EXP7]
+# Indicates the maximum length of A-MPDU pre-EOF padding that the STA can recv
+# This field is an integer in the range of 0 to 7.
+# The length defined by this field is equal to
+# 2 pow(13 + Maximum A-MPDU Length Exponent) -1 octets
+#
+# VHT Link Adaptation Capable: [VHT-LINK-ADAPT2] [VHT-LINK-ADAPT3]
+# Indicates whether or not the STA supports link adaptation using VHT variant
+# HT Control field
+# If +HTC-VHTcapable is 1
+#  0 = (no feedback) if the STA does not provide VHT MFB (default)
+#  1 = reserved
+#  2 = (Unsolicited) if the STA provides only unsolicited VHT MFB
+#  3 = (Both) if the STA can provide VHT MFB in response to VHT MRQ and if the
+#      STA provides unsolicited VHT MFB
+# Reserved if +HTC-VHTcapable is 0
+#
+# Rx Antenna Pattern Consistency: [RX-ANTENNA-PATTERN]
+# Indicates the possibility of Rx antenna pattern change
+# 0 = Rx antenna pattern might change during the lifetime of an association
+# 1 = Rx antenna pattern does not change during the lifetime of an association
+#
+# Tx Antenna Pattern Consistency: [TX-ANTENNA-PATTERN]
+# Indicates the possibility of Tx antenna pattern change
+# 0 = Tx antenna pattern might change during the lifetime of an association
+# 1 = Tx antenna pattern does not change during the lifetime of an association
+#vht_capab=[SHORT-GI-80][HTC-VHT]
+#
+# Require stations to support VHT PHY (reject association if they do not)
+#require_vht=1
+
+# 0 = 20 or 40 MHz operating Channel width
+# 1 = 80 MHz channel width
+# 2 = 160 MHz channel width
+# 3 = 80+80 MHz channel width
+#vht_oper_chwidth=1
+#
+# center freq = 5 GHz + (5 * index)
+# So index 42 gives center freq 5.210 GHz
+# which is channel 42 in 5G band
+#
+#vht_oper_centr_freq_seg0_idx=42
+#
+# center freq = 5 GHz + (5 * index)
+# So index 159 gives center freq 5.795 GHz
+# which is channel 159 in 5G band
+#
+#vht_oper_centr_freq_seg1_idx=159
+
+##### IEEE 802.1X-2004 related configuration ##################################
+
+# Require IEEE 802.1X authorization
+#ieee8021x=1
+
+# IEEE 802.1X/EAPOL version
+# hostapd is implemented based on IEEE Std 802.1X-2004 which defines EAPOL
+# version 2. However, there are many client implementations that do not handle
+# the new version number correctly (they seem to drop the frames completely).
+# In order to make hostapd interoperate with these clients, the version number
+# can be set to the older version (1) with this configuration value.
+#eapol_version=2
+
+# Optional displayable message sent with EAP Request-Identity. The first \0
+# in this string will be converted to ASCII-0 (nul). This can be used to
+# separate network info (comma separated list of attribute=value pairs); see,
+# e.g., RFC 4284.
+#eap_message=hello
+#eap_message=hello\0networkid=netw,nasid=foo,portid=0,NAIRealms=example.com
+
+# WEP rekeying (disabled if key lengths are not set or are set to 0)
+# Key lengths for default/broadcast and individual/unicast keys:
+# 5 = 40-bit WEP (also known as 64-bit WEP with 40 secret bits)
+# 13 = 104-bit WEP (also known as 128-bit WEP with 104 secret bits)
+#wep_key_len_broadcast=5
+#wep_key_len_unicast=5
+# Rekeying period in seconds. 0 = do not rekey (i.e., set keys only once)
+#wep_rekey_period=300
+
+# EAPOL-Key index workaround (set bit7) for WinXP Supplicant (needed only if
+# only broadcast keys are used)
+eapol_key_index_workaround=0
+
+# EAP reauthentication period in seconds (default: 3600 seconds; 0 = disable
+# reauthentication).
+#eap_reauth_period=3600
+
+# Use PAE group address (01:80:c2:00:00:03) instead of individual target
+# address when sending EAPOL frames with driver=wired. This is the most common
+# mechanism used in wired authentication, but it also requires that the port
+# is only used by one station.
+#use_pae_group_addr=1
+
+##### Integrated EAP server ###################################################
+
+# Optionally, hostapd can be configured to use an integrated EAP server
+# to process EAP authentication locally without need for an external RADIUS
+# server. This functionality can be used both as a local authentication server
+# for IEEE 802.1X/EAPOL and as a RADIUS server for other devices.
+
+# Use integrated EAP server instead of external RADIUS authentication
+# server. This is also needed if hostapd is configured to act as a RADIUS
+# authentication server.
+eap_server=0
+
+# Path for EAP server user database
+# If SQLite support is included, this can be set to "sqlite:/path/to/sqlite.db"
+# to use SQLite database instead of a text file.
+#eap_user_file=/etc/hostapd.eap_user
+
+# CA certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#ca_cert=/etc/hostapd.ca.pem
+
+# Server certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#server_cert=/etc/hostapd.server.pem
+
+# Private key matching with the server certificate for EAP-TLS/PEAP/TTLS
+# This may point to the same file as server_cert if both certificate and key
+# are included in a single file. PKCS#12 (PFX) file (.p12/.pfx) can also be
+# used by commenting out server_cert and specifying the PFX file as the
+# private_key.
+#private_key=/etc/hostapd.server.prv
+
+# Passphrase for private key
+#private_key_passwd=secret passphrase
+
+# Server identity
+# EAP methods that provide mechanism for authenticated server identity delivery
+# use this value. If not set, "hostapd" is used as a default.
+#server_id=server.example.com
+
+# Enable CRL verification.
+# Note: hostapd does not yet support CRL downloading based on CDP. Thus, a
+# valid CRL signed by the CA is required to be included in the ca_cert file.
+# This can be done by using PEM format for CA certificate and CRL and
+# concatenating these into one file. Whenever CRL changes, hostapd needs to be
+# restarted to take the new CRL into use.
+# 0 = do not verify CRLs (default)
+# 1 = check the CRL of the user certificate
+# 2 = check all CRLs in the certificate path
+#check_crl=1
+
+# Cached OCSP stapling response (DER encoded)
+# If set, this file is sent as a certificate status response by the EAP server
+# if the EAP peer requests certificate status in the ClientHello message.
+# This cache file can be updated, e.g., by running following command
+# periodically to get an update from the OCSP responder:
+# openssl ocsp \
+#	-no_nonce \
+#	-CAfile /etc/hostapd.ca.pem \
+#	-issuer /etc/hostapd.ca.pem \
+#	-cert /etc/hostapd.server.pem \
+#	-url http://ocsp.example.com:8888/ \
+#	-respout /tmp/ocsp-cache.der
+#ocsp_stapling_response=/tmp/ocsp-cache.der
+
+# dh_file: File path to DH/DSA parameters file (in PEM format)
+# This is an optional configuration file for setting parameters for an
+# ephemeral DH key exchange. In most cases, the default RSA authentication does
+# not use this configuration. However, it is possible setup RSA to use
+# ephemeral DH key exchange. In addition, ciphers with DSA keys always use
+# ephemeral DH keys. This can be used to achieve forward secrecy. If the file
+# is in DSA parameters format, it will be automatically converted into DH
+# params. This parameter is required if anonymous EAP-FAST is used.
+# You can generate DH parameters file with OpenSSL, e.g.,
+# "openssl dhparam -out /etc/hostapd.dh.pem 1024"
+#dh_file=/etc/hostapd.dh.pem
+
+# Fragment size for EAP methods
+#fragment_size=1400
+
+# Finite cyclic group for EAP-pwd. Number maps to group of domain parameters
+# using the IANA repository for IKE (RFC 2409).
+#pwd_group=19
+
+# Configuration data for EAP-SIM database/authentication gateway interface.
+# This is a text string in implementation specific format. The example
+# implementation in eap_sim_db.c uses this as the UNIX domain socket name for
+# the HLR/AuC gateway (e.g., hlr_auc_gw). In this case, the path uses "unix:"
+# prefix. If hostapd is built with SQLite support (CONFIG_SQLITE=y in .config),
+# database file can be described with an optional db=<path> parameter.
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock db=/tmp/hostapd.db
+
+# Encryption key for EAP-FAST PAC-Opaque values. This key must be a secret,
+# random value. It is configured as a 16-octet value in hex format. It can be
+# generated, e.g., with the following command:
+# od -tx1 -v -N16 /dev/random | colrm 1 8 | tr -d ' '
+#pac_opaque_encr_key=000102030405060708090a0b0c0d0e0f
+
+# EAP-FAST authority identity (A-ID)
+# A-ID indicates the identity of the authority that issues PACs. The A-ID
+# should be unique across all issuing servers. In theory, this is a variable
+# length field, but due to some existing implementations requiring A-ID to be
+# 16 octets in length, it is strongly recommended to use that length for the
+# field to provid interoperability with deployed peer implementations. This
+# field is configured in hex format.
+#eap_fast_a_id=101112131415161718191a1b1c1d1e1f
+
+# EAP-FAST authority identifier information (A-ID-Info)
+# This is a user-friendly name for the A-ID. For example, the enterprise name
+# and server name in a human-readable format. This field is encoded as UTF-8.
+#eap_fast_a_id_info=test server
+
+# Enable/disable different EAP-FAST provisioning modes:
+#0 = provisioning disabled
+#1 = only anonymous provisioning allowed
+#2 = only authenticated provisioning allowed
+#3 = both provisioning modes allowed (default)
+#eap_fast_prov=3
+
+# EAP-FAST PAC-Key lifetime in seconds (hard limit)
+#pac_key_lifetime=604800
+
+# EAP-FAST PAC-Key refresh time in seconds (soft limit on remaining hard
+# limit). The server will generate a new PAC-Key when this number of seconds
+# (or fewer) of the lifetime remains.
+#pac_key_refresh_time=86400
+
+# EAP-SIM and EAP-AKA protected success/failure indication using AT_RESULT_IND
+# (default: 0 = disabled).
+#eap_sim_aka_result_ind=1
+
+# Trusted Network Connect (TNC)
+# If enabled, TNC validation will be required before the peer is allowed to
+# connect. Note: This is only used with EAP-TTLS and EAP-FAST. If any other
+# EAP method is enabled, the peer will be allowed to connect without TNC.
+#tnc=1
+
+
+##### IEEE 802.11f - Inter-Access Point Protocol (IAPP) #######################
+
+# Interface to be used for IAPP broadcast packets
+#iapp_interface=eth0
+
+
+##### RADIUS client configuration #############################################
+# for IEEE 802.1X with external Authentication Server, IEEE 802.11
+# authentication with external ACL for MAC addresses, and accounting
+
+# The own IP address of the access point (used as NAS-IP-Address)
+own_ip_addr=127.0.0.1
+
+# Optional NAS-Identifier string for RADIUS messages. When used, this should be
+# a unique to the NAS within the scope of the RADIUS server. For example, a
+# fully qualified domain name can be used here.
+# When using IEEE 802.11r, nas_identifier must be set and must be between 1 and
+# 48 octets long.
+#nas_identifier=ap.example.com
+
+# RADIUS authentication server
+#auth_server_addr=127.0.0.1
+#auth_server_port=1812
+#auth_server_shared_secret=secret
+
+# RADIUS accounting server
+#acct_server_addr=127.0.0.1
+#acct_server_port=1813
+#acct_server_shared_secret=secret
+
+# Secondary RADIUS servers; to be used if primary one does not reply to
+# RADIUS packets. These are optional and there can be more than one secondary
+# server listed.
+#auth_server_addr=127.0.0.2
+#auth_server_port=1812
+#auth_server_shared_secret=secret2
+#
+#acct_server_addr=127.0.0.2
+#acct_server_port=1813
+#acct_server_shared_secret=secret2
+
+# Retry interval for trying to return to the primary RADIUS server (in
+# seconds). RADIUS client code will automatically try to use the next server
+# when the current server is not replying to requests. If this interval is set,
+# primary server will be retried after configured amount of time even if the
+# currently used secondary server is still working.
+#radius_retry_primary_interval=600
+
+
+# Interim accounting update interval
+# If this is set (larger than 0) and acct_server is configured, hostapd will
+# send interim accounting updates every N seconds. Note: if set, this overrides
+# possible Acct-Interim-Interval attribute in Access-Accept message. Thus, this
+# value should not be configured in hostapd.conf, if RADIUS server is used to
+# control the interim interval.
+# This value should not be less 600 (10 minutes) and must not be less than
+# 60 (1 minute).
+#radius_acct_interim_interval=600
+
+# Request Chargeable-User-Identity (RFC 4372)
+# This parameter can be used to configure hostapd to request CUI from the
+# RADIUS server by including Chargeable-User-Identity attribute into
+# Access-Request packets.
+#radius_request_cui=1
+
+# Dynamic VLAN mode; allow RADIUS authentication server to decide which VLAN
+# is used for the stations. This information is parsed from following RADIUS
+# attributes based on RFC 3580 and RFC 2868: Tunnel-Type (value 13 = VLAN),
+# Tunnel-Medium-Type (value 6 = IEEE 802), Tunnel-Private-Group-ID (value
+# VLANID as a string). Optionally, the local MAC ACL list (accept_mac_file) can
+# be used to set static client MAC address to VLAN ID mapping.
+# 0 = disabled (default)
+# 1 = option; use default interface if RADIUS server does not include VLAN ID
+# 2 = required; reject authentication if RADIUS server does not include VLAN ID
+#dynamic_vlan=0
+
+# VLAN interface list for dynamic VLAN mode is read from a separate text file.
+# This list is used to map VLAN ID from the RADIUS server to a network
+# interface. Each station is bound to one interface in the same way as with
+# multiple BSSIDs or SSIDs. Each line in this text file is defining a new
+# interface and the line must include VLAN ID and interface name separated by
+# white space (space or tab).
+# If no entries are provided by this file, the station is statically mapped
+# to <bss-iface>.<vlan-id> interfaces.
+#vlan_file=/etc/hostapd.vlan
+
+# Interface where 802.1q tagged packets should appear when a RADIUS server is
+# used to determine which VLAN a station is on.  hostapd creates a bridge for
+# each VLAN.  Then hostapd adds a VLAN interface (associated with the interface
+# indicated by 'vlan_tagged_interface') and the appropriate wireless interface
+# to the bridge.
+#vlan_tagged_interface=eth0
+
+# Bridge (prefix) to add the wifi and the tagged interface to. This gets the
+# VLAN ID appended. It defaults to brvlan%d if no tagged interface is given
+# and br%s.%d if a tagged interface is given, provided %s = tagged interface
+# and %d = VLAN ID.
+#vlan_bridge=brvlan
+
+# When hostapd creates a VLAN interface on vlan_tagged_interfaces, it needs
+# to know how to name it.
+# 0 = vlan<XXX>, e.g., vlan1
+# 1 = <vlan_tagged_interface>.<XXX>, e.g. eth0.1
+#vlan_naming=0
+
+# Arbitrary RADIUS attributes can be added into Access-Request and
+# Accounting-Request packets by specifying the contents of the attributes with
+# the following configuration parameters. There can be multiple of these to
+# add multiple attributes. These parameters can also be used to override some
+# of the attributes added automatically by hostapd.
+# Format: <attr_id>[:<syntax:value>]
+# attr_id: RADIUS attribute type (e.g., 26 = Vendor-Specific)
+# syntax: s = string (UTF-8), d = integer, x = octet string
+# value: attribute value in format indicated by the syntax
+# If syntax and value parts are omitted, a null value (single 0x00 octet) is
+# used.
+#
+# Additional Access-Request attributes
+# radius_auth_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_auth_req_attr=126:s:Operator
+# Service-Type = Framed (2)
+#radius_auth_req_attr=6:d:2
+# Connect-Info = "testing" (this overrides the automatically generated value)
+#radius_auth_req_attr=77:s:testing
+# Same Connect-Info value set as a hexdump
+#radius_auth_req_attr=77:x:74657374696e67
+
+#
+# Additional Accounting-Request attributes
+# radius_acct_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_acct_req_attr=126:s:Operator
+
+# Dynamic Authorization Extensions (RFC 5176)
+# This mechanism can be used to allow dynamic changes to user session based on
+# commands from a RADIUS server (or some other disconnect client that has the
+# needed session information). For example, Disconnect message can be used to
+# request an associated station to be disconnected.
+#
+# This is disabled by default. Set radius_das_port to non-zero UDP port
+# number to enable.
+#radius_das_port=3799
+#
+# DAS client (the host that can send Disconnect/CoA requests) and shared secret
+#radius_das_client=192.168.1.123 shared secret here
+#
+# DAS Event-Timestamp time window in seconds
+#radius_das_time_window=300
+#
+# DAS require Event-Timestamp
+#radius_das_require_event_timestamp=1
+
+##### RADIUS authentication server configuration ##############################
+
+# hostapd can be used as a RADIUS authentication server for other hosts. This
+# requires that the integrated EAP server is also enabled and both
+# authentication services are sharing the same configuration.
+
+# File name of the RADIUS clients configuration for the RADIUS server. If this
+# commented out, RADIUS server is disabled.
+#radius_server_clients=/etc/hostapd.radius_clients
+
+# The UDP port number for the RADIUS authentication server
+#radius_server_auth_port=1812
+
+# Use IPv6 with RADIUS server (IPv4 will also be supported using IPv6 API)
+#radius_server_ipv6=1
+
+
+##### WPA/IEEE 802.11i configuration ##########################################
+
+# Enable WPA. Setting this variable configures the AP to require WPA (either
+# WPA-PSK or WPA-RADIUS/EAP based on other configuration). For WPA-PSK, either
+# wpa_psk or wpa_passphrase must be set and wpa_key_mgmt must include WPA-PSK.
+# Instead of wpa_psk / wpa_passphrase, wpa_psk_radius might suffice.
+# For WPA-RADIUS/EAP, ieee8021x must be set (but without dynamic WEP keys),
+# RADIUS authentication server must be configured, and WPA-EAP must be included
+# in wpa_key_mgmt.
+# This field is a bit field that can be used to enable WPA (IEEE 802.11i/D3.0)
+# and/or WPA2 (full IEEE 802.11i/RSN):
+# bit0 = WPA
+# bit1 = IEEE 802.11i/RSN (WPA2) (dot11RSNAEnabled)
+wpa=2
+
+# WPA pre-shared keys for WPA-PSK. This can be either entered as a 256-bit
+# secret in hex format (64 hex digits), wpa_psk, or as an ASCII passphrase
+# (8..63 characters) that will be converted to PSK. This conversion uses SSID
+# so the PSK changes when ASCII passphrase is used and the SSID is changed.
+# wpa_psk (dot11RSNAConfigPSKValue)
+# wpa_passphrase (dot11RSNAConfigPSKPassPhrase)
+#wpa_psk=0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef
+wpa_passphrase=aaaaaaaa
+
+# Optionally, WPA PSKs can be read from a separate text file (containing list
+# of (PSK,MAC address) pairs. This allows more than one PSK to be configured.
+# Use absolute path name to make sure that the files can be read on SIGHUP
+# configuration reloads.
+#wpa_psk_file=/etc/hostapd.wpa_psk
+
+# Optionally, WPA passphrase can be received from RADIUS authentication server
+# This requires macaddr_acl to be set to 2 (RADIUS)
+# 0 = disabled (default)
+# 1 = optional; use default passphrase/psk if RADIUS server does not include
+#	Tunnel-Password
+# 2 = required; reject authentication if RADIUS server does not include
+#	Tunnel-Password
+#wpa_psk_radius=0
+
+# Set of accepted key management algorithms (WPA-PSK, WPA-EAP, or both). The
+# entries are separated with a space. WPA-PSK-SHA256 and WPA-EAP-SHA256 can be
+# added to enable SHA256-based stronger algorithms.
+# (dot11RSNAConfigAuthenticationSuitesTable)
+#wpa_key_mgmt=WPA-PSK WPA-EAP
+
+# Set of accepted cipher suites (encryption algorithms) for pairwise keys
+# (unicast packets). This is a space separated list of algorithms:
+# CCMP = AES in Counter mode with CBC-MAC [RFC 3610, IEEE 802.11i/D7.0]
+# TKIP = Temporal Key Integrity Protocol [IEEE 802.11i/D7.0]
+# Group cipher suite (encryption algorithm for broadcast and multicast frames)
+# is automatically selected based on this configuration. If only CCMP is
+# allowed as the pairwise cipher, group cipher will also be CCMP. Otherwise,
+# TKIP will be used as the group cipher.
+# (dot11RSNAConfigPairwiseCiphersTable)
+# Pairwise cipher for WPA (v1) (default: TKIP)
+#wpa_pairwise=TKIP CCMP
+# Pairwise cipher for RSN/WPA2 (default: use wpa_pairwise value)
+rsn_pairwise=CCMP
+
+# Time interval for rekeying GTK (broadcast/multicast encryption keys) in
+# seconds. (dot11RSNAConfigGroupRekeyTime)
+wpa_group_rekey=120
+
+# Rekey GTK when any STA that possesses the current GTK is leaving the BSS.
+# (dot11RSNAConfigGroupRekeyStrict)
+#wpa_strict_rekey=1
+
+# Time interval for rekeying GMK (master key used internally to generate GTKs
+# (in seconds).
+#wpa_gmk_rekey=86400
+
+# Maximum lifetime for PTK in seconds. This can be used to enforce rekeying of
+# PTK to mitigate some attacks against TKIP deficiencies.
+#wpa_ptk_rekey=600
+
+# Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up
+# roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN
+# authentication and key handshake before actually associating with a new AP.
+# (dot11RSNAPreauthenticationEnabled)
+#rsn_preauth=1
+#
+# Space separated list of interfaces from which pre-authentication frames are
+# accepted (e.g., 'eth0' or 'eth0 wlan0wds0'. This list should include all
+# interface that are used for connections to other APs. This could include
+# wired interfaces and WDS links. The normal wireless data interface towards
+# associated stations (e.g., wlan0) should not be added, since
+# pre-authentication is only used with APs other than the currently associated
+# one.
+#rsn_preauth_interfaces=eth0
+
+# peerkey: Whether PeerKey negotiation for direct links (IEEE 802.11e) is
+# allowed. This is only used with RSN/WPA2.
+# 0 = disabled (default)
+# 1 = enabled
+#peerkey=1
+
+# ieee80211w: Whether management frame protection (MFP) is enabled
+# 0 = disabled (default)
+# 1 = optional
+# 2 = required
+#ieee80211w=0
+
+# Association SA Query maximum timeout (in TU = 1.024 ms; for MFP)
+# (maximum time to wait for a SA Query response)
+# dot11AssociationSAQueryMaximumTimeout, 1...4294967295
+#assoc_sa_query_max_timeout=1000
+
+# Association SA Query retry timeout (in TU = 1.024 ms; for MFP)
+# (time between two subsequent SA Query requests)
+# dot11AssociationSAQueryRetryTimeout, 1...4294967295
+#assoc_sa_query_retry_timeout=201
+
+# disable_pmksa_caching: Disable PMKSA caching
+# This parameter can be used to disable caching of PMKSA created through EAP
+# authentication. RSN preauthentication may still end up using PMKSA caching if
+# it is enabled (rsn_preauth=1).
+# 0 = PMKSA caching enabled (default)
+# 1 = PMKSA caching disabled
+#disable_pmksa_caching=0
+
+# okc: Opportunistic Key Caching (aka Proactive Key Caching)
+# Allow PMK cache to be shared opportunistically among configured interfaces
+# and BSSes (i.e., all configurations within a single hostapd process).
+# 0 = disabled (default)
+# 1 = enabled
+#okc=1
+
+# SAE threshold for anti-clogging mechanism (dot11RSNASAEAntiCloggingThreshold)
+# This parameter defines how many open SAE instances can be in progress at the
+# same time before the anti-clogging mechanism is taken into use.
+#sae_anti_clogging_threshold=5
+
+# Enabled SAE finite cyclic groups
+# SAE implementation are required to support group 19 (ECC group defined over a
+# 256-bit prime order field). All groups that are supported by the
+# implementation are enabled by default. This configuration parameter can be
+# used to specify a limited set of allowed groups. The group values are listed
+# in the IANA registry:
+# http://www.iana.org/assignments/ipsec-registry/ipsec-registry.xml#ipsec-registry-9
+#sae_groups=19 20 21 25 26
+
+##### IEEE 802.11r configuration ##############################################
+
+# Mobility Domain identifier (dot11FTMobilityDomainID, MDID)
+# MDID is used to indicate a group of APs (within an ESS, i.e., sharing the
+# same SSID) between which a STA can use Fast BSS Transition.
+# 2-octet identifier as a hex string.
+#mobility_domain=a1b2
+
+# PMK-R0 Key Holder identifier (dot11FTR0KeyHolderID)
+# 1 to 48 octet identifier.
+# This is configured with nas_identifier (see RADIUS client section above).
+
+# Default lifetime of the PMK-RO in minutes; range 1..65535
+# (dot11FTR0KeyLifetime)
+#r0_key_lifetime=10000
+
+# PMK-R1 Key Holder identifier (dot11FTR1KeyHolderID)
+# 6-octet identifier as a hex string.
+#r1_key_holder=000102030405
+
+# Reassociation deadline in time units (TUs / 1.024 ms; range 1000..65535)
+# (dot11FTReassociationDeadline)
+#reassociation_deadline=1000
+
+# List of R0KHs in the same Mobility Domain
+# format: <MAC address> <NAS Identifier> <128-bit key as hex string>
+# This list is used to map R0KH-ID (NAS Identifier) to a destination MAC
+# address when requesting PMK-R1 key from the R0KH that the STA used during the
+# Initial Mobility Domain Association.
+#r0kh=02:01:02:03:04:05 r0kh-1.example.com 000102030405060708090a0b0c0d0e0f
+#r0kh=02:01:02:03:04:06 r0kh-2.example.com 00112233445566778899aabbccddeeff
+# And so on.. One line per R0KH.
+
+# List of R1KHs in the same Mobility Domain
+# format: <MAC address> <R1KH-ID> <128-bit key as hex string>
+# This list is used to map R1KH-ID to a destination MAC address when sending
+# PMK-R1 key from the R0KH. This is also the list of authorized R1KHs in the MD
+# that can request PMK-R1 keys.
+#r1kh=02:01:02:03:04:05 02:11:22:33:44:55 000102030405060708090a0b0c0d0e0f
+#r1kh=02:01:02:03:04:06 02:11:22:33:44:66 00112233445566778899aabbccddeeff
+# And so on.. One line per R1KH.
+
+# Whether PMK-R1 push is enabled at R0KH
+# 0 = do not push PMK-R1 to all configured R1KHs (default)
+# 1 = push PMK-R1 to all configured R1KHs whenever a new PMK-R0 is derived
+#pmk_r1_push=1
+
+##### Neighbor table ##########################################################
+# Maximum number of entries kept in AP table (either for neigbor table or for
+# detecting Overlapping Legacy BSS Condition). The oldest entry will be
+# removed when adding a new entry that would make the list grow over this
+# limit. Note! WFA certification for IEEE 802.11g requires that OLBC is
+# enabled, so this field should not be set to 0 when using IEEE 802.11g.
+# default: 255
+#ap_table_max_size=255
+
+# Number of seconds of no frames received after which entries may be deleted
+# from the AP table. Since passive scanning is not usually performed frequently
+# this should not be set to very small value. In addition, there is no
+# guarantee that every scan cycle will receive beacon frames from the
+# neighboring APs.
+# default: 60
+#ap_table_expiration_time=3600
+
+
+##### Wi-Fi Protected Setup (WPS) #############################################
+
+# WPS state
+# 0 = WPS disabled (default)
+# 1 = WPS enabled, not configured
+# 2 = WPS enabled, configured
+#wps_state=2
+
+# Whether to manage this interface independently from other WPS interfaces
+# By default, a single hostapd process applies WPS operations to all configured
+# interfaces. This parameter can be used to disable that behavior for a subset
+# of interfaces. If this is set to non-zero for an interface, WPS commands
+# issued on that interface do not apply to other interfaces and WPS operations
+# performed on other interfaces do not affect this interface.
+#wps_independent=0
+
+# AP can be configured into a locked state where new WPS Registrar are not
+# accepted, but previously authorized Registrars (including the internal one)
+# can continue to add new Enrollees.
+#ap_setup_locked=1
+
+# Universally Unique IDentifier (UUID; see RFC 4122) of the device
+# This value is used as the UUID for the internal WPS Registrar. If the AP
+# is also using UPnP, this value should be set to the device's UPnP UUID.
+# If not configured, UUID will be generated based on the local MAC address.
+#uuid=12345678-9abc-def0-1234-56789abcdef0
+
+# Note: If wpa_psk_file is set, WPS is used to generate random, per-device PSKs
+# that will be appended to the wpa_psk_file. If wpa_psk_file is not set, the
+# default PSK (wpa_psk/wpa_passphrase) will be delivered to Enrollees. Use of
+# per-device PSKs is recommended as the more secure option (i.e., make sure to
+# set wpa_psk_file when using WPS with WPA-PSK).
+
+# When an Enrollee requests access to the network with PIN method, the Enrollee
+# PIN will need to be entered for the Registrar. PIN request notifications are
+# sent to hostapd ctrl_iface monitor. In addition, they can be written to a
+# text file that could be used, e.g., to populate the AP administration UI with
+# pending PIN requests. If the following variable is set, the PIN requests will
+# be written to the configured file.
+#wps_pin_requests=/var/run/hostapd_wps_pin_requests
+
+# Device Name
+# User-friendly description of device; up to 32 octets encoded in UTF-8
+#device_name=Wireless AP
+
+# Manufacturer
+# The manufacturer of the device (up to 64 ASCII characters)
+#manufacturer=Company
+
+# Model Name
+# Model of the device (up to 32 ASCII characters)
+#model_name=WAP
+
+# Model Number
+# Additional device description (up to 32 ASCII characters)
+#model_number=123
+
+# Serial Number
+# Serial number of the device (up to 32 characters)
+#serial_number=12345
+
+# Primary Device Type
+# Used format: <categ>-<OUI>-<subcateg>
+# categ = Category as an integer value
+# OUI = OUI and type octet as a 4-octet hex-encoded value; 0050F204 for
+#       default WPS OUI
+# subcateg = OUI-specific Sub Category as an integer value
+# Examples:
+#   1-0050F204-1 (Computer / PC)
+#   1-0050F204-2 (Computer / Server)
+#   5-0050F204-1 (Storage / NAS)
+#   6-0050F204-1 (Network Infrastructure / AP)
+#device_type=6-0050F204-1
+
+# OS Version
+# 4-octet operating system version number (hex string)
+#os_version=01020300
+
+# Config Methods
+# List of the supported configuration methods
+# Available methods: usba ethernet label display ext_nfc_token int_nfc_token
+#	nfc_interface push_button keypad virtual_display physical_display
+#	virtual_push_button physical_push_button
+#config_methods=label virtual_display virtual_push_button keypad
+
+# WPS capability discovery workaround for PBC with Windows 7
+# Windows 7 uses incorrect way of figuring out AP's WPS capabilities by acting
+# as a Registrar and using M1 from the AP. The config methods attribute in that
+# message is supposed to indicate only the configuration method supported by
+# the AP in Enrollee role, i.e., to add an external Registrar. For that case,
+# PBC shall not be used and as such, the PushButton config method is removed
+# from M1 by default. If pbc_in_m1=1 is included in the configuration file,
+# the PushButton config method is left in M1 (if included in config_methods
+# parameter) to allow Windows 7 to use PBC instead of PIN (e.g., from a label
+# in the AP).
+#pbc_in_m1=1
+
+# Static access point PIN for initial configuration and adding Registrars
+# If not set, hostapd will not allow external WPS Registrars to control the
+# access point. The AP PIN can also be set at runtime with hostapd_cli
+# wps_ap_pin command. Use of temporary (enabled by user action) and random
+# AP PIN is much more secure than configuring a static AP PIN here. As such,
+# use of the ap_pin parameter is not recommended if the AP device has means for
+# displaying a random PIN.
+#ap_pin=12345670
+
+# Skip building of automatic WPS credential
+# This can be used to allow the automatically generated Credential attribute to
+# be replaced with pre-configured Credential(s).
+#skip_cred_build=1
+
+# Additional Credential attribute(s)
+# This option can be used to add pre-configured Credential attributes into M8
+# message when acting as a Registrar. If skip_cred_build=1, this data will also
+# be able to override the Credential attribute that would have otherwise been
+# automatically generated based on network configuration. This configuration
+# option points to an external file that much contain the WPS Credential
+# attribute(s) as binary data.
+#extra_cred=hostapd.cred
+
+# Credential processing
+#   0 = process received credentials internally (default)
+#   1 = do not process received credentials; just pass them over ctrl_iface to
+#	external program(s)
+#   2 = process received credentials internally and pass them over ctrl_iface
+#	to external program(s)
+# Note: With wps_cred_processing=1, skip_cred_build should be set to 1 and
+# extra_cred be used to provide the Credential data for Enrollees.
+#
+# wps_cred_processing=1 will disabled automatic updates of hostapd.conf file
+# both for Credential processing and for marking AP Setup Locked based on
+# validation failures of AP PIN. An external program is responsible on updating
+# the configuration appropriately in this case.
+#wps_cred_processing=0
+
+# AP Settings Attributes for M7
+# By default, hostapd generates the AP Settings Attributes for M7 based on the
+# current configuration. It is possible to override this by providing a file
+# with pre-configured attributes. This is similar to extra_cred file format,
+# but the AP Settings attributes are not encapsulated in a Credential
+# attribute.
+#ap_settings=hostapd.ap_settings
+
+# WPS UPnP interface
+# If set, support for external Registrars is enabled.
+#upnp_iface=br0
+
+# Friendly Name (required for UPnP)
+# Short description for end use. Should be less than 64 characters.
+#friendly_name=WPS Access Point
+
+# Manufacturer URL (optional for UPnP)
+#manufacturer_url=http://www.example.com/
+
+# Model Description (recommended for UPnP)
+# Long description for end user. Should be less than 128 characters.
+#model_description=Wireless Access Point
+
+# Model URL (optional for UPnP)
+#model_url=http://www.example.com/model/
+
+# Universal Product Code (optional for UPnP)
+# 12-digit, all-numeric code that identifies the consumer package.
+#upc=123456789012
+
+# WPS RF Bands (a = 5G, b = 2.4G, g = 2.4G, ag = dual band)
+# This value should be set according to RF band(s) supported by the AP if
+# hw_mode is not set. For dual band dual concurrent devices, this needs to be
+# set to ag to allow both RF bands to be advertized.
+#wps_rf_bands=ag
+
+# NFC password token for WPS
+# These parameters can be used to configure a fixed NFC password token for the
+# AP. This can be generated, e.g., with nfc_pw_token from wpa_supplicant. When
+# these parameters are used, the AP is assumed to be deployed with a NFC tag
+# that includes the matching NFC password token (e.g., written based on the
+# NDEF record from nfc_pw_token).
+#
+#wps_nfc_dev_pw_id: Device Password ID (16..65535)
+#wps_nfc_dh_pubkey: Hexdump of DH Public Key
+#wps_nfc_dh_privkey: Hexdump of DH Private Key
+#wps_nfc_dev_pw: Hexdump of Device Password
+
+##### Wi-Fi Direct (P2P) ######################################################
+
+# Enable P2P Device management
+#manage_p2p=1
+
+# Allow cross connection
+#allow_cross_connection=1
+
+#### TDLS (IEEE 802.11z-2010) #################################################
+
+# Prohibit use of TDLS in this BSS
+#tdls_prohibit=1
+
+# Prohibit use of TDLS Channel Switching in this BSS
+#tdls_prohibit_chan_switch=1
+
+##### IEEE 802.11v-2011 #######################################################
+
+# Time advertisement
+# 0 = disabled (default)
+# 2 = UTC time at which the TSF timer is 0
+#time_advertisement=2
+
+# Local time zone as specified in 8.3 of IEEE Std 1003.1-2004:
+# stdoffset[dst[offset][,start[/time],end[/time]]]
+#time_zone=EST5
+
+# WNM-Sleep Mode (extended sleep mode for stations)
+# 0 = disabled (default)
+# 1 = enabled (allow stations to use WNM-Sleep Mode)
+#wnm_sleep_mode=1
+
+# BSS Transition Management
+# 0 = disabled (default)
+# 1 = enabled
+#bss_transition=1
+
+##### IEEE 802.11u-2011 #######################################################
+
+# Enable Interworking service
+#interworking=1
+
+# Access Network Type
+# 0 = Private network
+# 1 = Private network with guest access
+# 2 = Chargeable public network
+# 3 = Free public network
+# 4 = Personal device network
+# 5 = Emergency services only network
+# 14 = Test or experimental
+# 15 = Wildcard
+#access_network_type=0
+
+# Whether the network provides connectivity to the Internet
+# 0 = Unspecified
+# 1 = Network provides connectivity to the Internet
+#internet=1
+
+# Additional Step Required for Access
+# Note: This is only used with open network, i.e., ASRA shall ne set to 0 if
+# RSN is used.
+#asra=0
+
+# Emergency services reachable
+#esr=0
+
+# Unauthenticated emergency service accessible
+#uesa=0
+
+# Venue Info (optional)
+# The available values are defined in IEEE Std 802.11u-2011, 7.3.1.34.
+# Example values (group,type):
+# 0,0 = Unspecified
+# 1,7 = Convention Center
+# 1,13 = Coffee Shop
+# 2,0 = Unspecified Business
+# 7,1  Private Residence
+#venue_group=7
+#venue_type=1
+
+# Homogeneous ESS identifier (optional; dot11HESSID)
+# If set, this shall be identifical to one of the BSSIDs in the homogeneous
+# ESS and this shall be set to the same value across all BSSs in homogeneous
+# ESS.
+#hessid=02:03:04:05:06:07
+
+# Roaming Consortium List
+# Arbitrary number of Roaming Consortium OIs can be configured with each line
+# adding a new OI to the list. The first three entries are available through
+# Beacon and Probe Response frames. Any additional entry will be available only
+# through ANQP queries. Each OI is between 3 and 15 octets and is configured as
+# a hexstring.
+#roaming_consortium=021122
+#roaming_consortium=2233445566
+
+# Venue Name information
+# This parameter can be used to configure one or more Venue Name Duples for
+# Venue Name ANQP information. Each entry has a two or three character language
+# code (ISO-639) separated by colon from the venue name string.
+# Note that venue_group and venue_type have to be set for Venue Name
+# information to be complete.
+#venue_name=eng:Example venue
+#venue_name=fin:Esimerkkipaikka
+# Alternative format for language:value strings:
+# (double quoted string, printf-escaped string)
+#venue_name=P"eng:Example\nvenue"
+
+# Network Authentication Type
+# This parameter indicates what type of network authentication is used in the
+# network.
+# format: <network auth type indicator (1-octet hex str)> [redirect URL]
+# Network Authentication Type Indicator values:
+# 00 = Acceptance of terms and conditions
+# 01 = On-line enrollment supported
+# 02 = http/https redirection
+# 03 = DNS redirection
+#network_auth_type=00
+#network_auth_type=02http://www.example.com/redirect/me/here/
+
+# IP Address Type Availability
+# format: <1-octet encoded value as hex str>
+# (ipv4_type & 0x3f) << 2 | (ipv6_type & 0x3)
+# ipv4_type:
+# 0 = Address type not available
+# 1 = Public IPv4 address available
+# 2 = Port-restricted IPv4 address available
+# 3 = Single NATed private IPv4 address available
+# 4 = Double NATed private IPv4 address available
+# 5 = Port-restricted IPv4 address and single NATed IPv4 address available
+# 6 = Port-restricted IPv4 address and double NATed IPv4 address available
+# 7 = Availability of the address type is not known
+# ipv6_type:
+# 0 = Address type not available
+# 1 = Address type available
+# 2 = Availability of the address type not known
+#ipaddr_type_availability=14
+
+# Domain Name
+# format: <variable-octet str>[,<variable-octet str>]
+#domain_name=example.com,another.example.com,yet-another.example.com
+
+# 3GPP Cellular Network information
+# format: <MCC1,MNC1>[;<MCC2,MNC2>][;...]
+#anqp_3gpp_cell_net=244,91;310,026;234,56
+
+# NAI Realm information
+# One or more realm can be advertised. Each nai_realm line adds a new realm to
+# the set. These parameters provide information for stations using Interworking
+# network selection to allow automatic connection to a network based on
+# credentials.
+# format: <encoding>,<NAI Realm(s)>[,<EAP Method 1>][,<EAP Method 2>][,...]
+# encoding:
+#	0 = Realm formatted in accordance with IETF RFC 4282
+#	1 = UTF-8 formatted character string that is not formatted in
+#	    accordance with IETF RFC 4282
+# NAI Realm(s): Semi-colon delimited NAI Realm(s)
+# EAP Method: <EAP Method>[:<[AuthParam1:Val1]>][<[AuthParam2:Val2]>][...]
+# AuthParam (Table 8-188 in IEEE Std 802.11-2012):
+# ID 2 = Non-EAP Inner Authentication Type
+#	1 = PAP, 2 = CHAP, 3 = MSCHAP, 4 = MSCHAPV2
+# ID 3 = Inner authentication EAP Method Type
+# ID 5 = Credential Type
+#	1 = SIM, 2 = USIM, 3 = NFC Secure Element, 4 = Hardware Token,
+#	5 = Softoken, 6 = Certificate, 7 = username/password, 9 = Anonymous,
+#	10 = Vendor Specific
+#nai_realm=0,example.com;example.net
+# EAP methods EAP-TLS with certificate and EAP-TTLS/MSCHAPv2 with
+# username/password
+#nai_realm=0,example.org,13[5:6],21[2:4][5:7]
+
+# QoS Map Set configuration
+#
+# Comma delimited QoS Map Set in decimal values
+# (see IEEE Std 802.11-2012, 8.4.2.97)
+#
+# format:
+# [<DSCP Exceptions[DSCP,UP]>,]<UP 0 range[low,high]>,...<UP 7 range[low,high]>
+#
+# There can be up to 21 optional DSCP Exceptions which are pairs of DSCP Value
+# (0..63 or 255) and User Priority (0..7). This is followed by eight DSCP Range
+# descriptions with DSCP Low Value and DSCP High Value pairs (0..63 or 255) for
+# each UP starting from 0. If both low and high value are set to 255, the
+# corresponding UP is not used.
+#
+# default: not set
+#qos_map_set=53,2,22,6,8,15,0,7,255,255,16,31,32,39,255,255,40,47,255,255
+
+##### Hotspot 2.0 #############################################################
+
+# Enable Hotspot 2.0 support
+#hs20=1
+
+# Disable Downstream Group-Addressed Forwarding (DGAF)
+# This can be used to configure a network where no group-addressed frames are
+# allowed. The AP will not forward any group-address frames to the stations and
+# random GTKs are issued for each station to prevent associated stations from
+# forging such frames to other stations in the BSS.
+#disable_dgaf=1
+
+# Operator Friendly Name
+# This parameter can be used to configure one or more Operator Friendly Name
+# Duples. Each entry has a two or three character language code (ISO-639)
+# separated by colon from the operator friendly name string.
+#hs20_oper_friendly_name=eng:Example operator
+#hs20_oper_friendly_name=fin:Esimerkkioperaattori
+
+# Connection Capability
+# This can be used to advertise what type of IP traffic can be sent through the
+# hotspot (e.g., due to firewall allowing/blocking protocols/ports).
+# format: <IP Protocol>:<Port Number>:<Status>
+# IP Protocol: 1 = ICMP, 6 = TCP, 17 = UDP
+# Port Number: 0..65535
+# Status: 0 = Closed, 1 = Open, 2 = Unknown
+# Each hs20_conn_capab line is added to the list of advertised tuples.
+#hs20_conn_capab=1:0:2
+#hs20_conn_capab=6:22:1
+#hs20_conn_capab=17:5060:0
+
+# WAN Metrics
+# format: <WAN Info>:<DL Speed>:<UL Speed>:<DL Load>:<UL Load>:<LMD>
+# WAN Info: B0-B1: Link Status, B2: Symmetric Link, B3: At Capabity
+#    (encoded as two hex digits)
+#    Link Status: 1 = Link up, 2 = Link down, 3 = Link in test state
+# Downlink Speed: Estimate of WAN backhaul link current downlink speed in kbps;
+#	1..4294967295; 0 = unknown
+# Uplink Speed: Estimate of WAN backhaul link current uplink speed in kbps
+#	1..4294967295; 0 = unknown
+# Downlink Load: Current load of downlink WAN connection (scaled to 255 = 100%)
+# Uplink Load: Current load of uplink WAN connection (scaled to 255 = 100%)
+# Load Measurement Duration: Duration for measuring downlink/uplink load in
+# tenths of a second (1..65535); 0 if load cannot be determined
+#hs20_wan_metrics=01:8000:1000:80:240:3000
+
+# Operating Class Indication
+# List of operating classes the BSSes in this ESS use. The Global operating
+# classes in Table E-4 of IEEE Std 802.11-2012 Annex E define the values that
+# can be used in this.
+# format: hexdump of operating class octets
+# for example, operating classes 81 (2.4 GHz channels 1-13) and 115 (5 GHz
+# channels 36-48):
+#hs20_operating_class=5173
+
+##### TESTING OPTIONS #########################################################
+#
+# The options in this section are only available when the build configuration
+# option CONFIG_TESTING_OPTIONS is set while compiling hostapd. They allow
+# testing some scenarios that are otherwise difficult to reproduce.
+#
+# Ignore probe requests sent to hostapd with the given probability, must be a
+# floating point number in the range [0, 1).
+#ignore_probe_probability=0.0
+#
+# Ignore authentication frames with the given probability
+#ignore_auth_probability=0.0
+#
+# Ignore association requests with the given probability
+#ignore_assoc_probability=0.0
+#
+# Ignore reassociation requests with the given probability
+#ignore_reassoc_probability=0.0
+#
+# Corrupt Key MIC in GTK rekey EAPOL-Key frames with the given probability
+#corrupt_gtk_rekey_mic_probability=0.0
+
+##### Multiple BSSID support ##################################################
+#
+# Above configuration is using the default interface (wlan#, or multi-SSID VLAN
+# interfaces). Other BSSIDs can be added by using separator 'bss' with
+# default interface name to be allocated for the data packets of the new BSS.
+#
+# hostapd will generate BSSID mask based on the BSSIDs that are
+# configured. hostapd will verify that dev_addr & MASK == dev_addr. If this is
+# not the case, the MAC address of the radio must be changed before starting
+# hostapd (ifconfig wlan0 hw ether <MAC addr>). If a BSSID is configured for
+# every secondary BSS, this limitation is not applied at hostapd and other
+# masks may be used if the driver supports them (e.g., swap the locally
+# administered bit)
+#
+# BSSIDs are assigned in order to each BSS, unless an explicit BSSID is
+# specified using the 'bssid' parameter.
+# If an explicit BSSID is specified, it must be chosen such that it:
+# - results in a valid MASK that covers it and the dev_addr
+# - is not the same as the MAC address of the radio
+# - is not the same as any other explicitly specified BSSID
+#
+# Please note that hostapd uses some of the values configured for the first BSS
+# as the defaults for the following BSSes. However, it is recommended that all
+# BSSes include explicit configuration of all relevant configuration items.
+#
+#bss=wlan0_0
+#ssid=test2
+# most of the above items can be used here (apart from radio interface specific
+# items, like channel)
+
+#bss=wlan0_1
+#bssid=00:13:10:95:fe:0b
+# ...
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.NO_SEC.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.NO_SEC.template
new file mode 100644
index 0000000000000..eff8920da2f35
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.NO_SEC.template
@@ -0,0 +1,1664 @@
+##### hostapd configuration file ##############################################
+# Empty lines and lines starting with # are ignored
+
+# AP netdevice name (without 'ap' postfix, i.e., wlan0 uses wlan0ap for
+# management frames); ath0 for madwifi
+interface=HOSTAPD_IF
+
+# In case of madwifi, atheros, and nl80211 driver interfaces, an additional
+# configuration parameter, bridge, may be used to notify hostapd if the
+# interface is included in a bridge. This parameter is not used with Host AP
+# driver. If the bridge parameter is not set, the drivers will automatically
+# figure out the bridge interface (assuming sysfs is enabled and mounted to
+# /sys) and this parameter may not be needed.
+#
+# For nl80211, this parameter can be used to request the AP interface to be
+# added to the bridge automatically (brctl may refuse to do this before hostapd
+# has been started to change the interface mode). If needed, the bridge
+# interface is also created.
+#bridge=br0
+
+# Driver interface type (hostap/wired/madwifi/test/none/nl80211/bsd);
+# default: hostap). nl80211 is used with all Linux mac80211 drivers.
+# Use driver=none if building hostapd as a standalone RADIUS server that does
+# not control any wireless/wired driver.
+# driver=hostap
+
+# hostapd event logger configuration
+#
+# Two output method: syslog and stdout (only usable if not forking to
+# background).
+#
+# Module bitfield (ORed bitfield of modules that will be logged; -1 = all
+# modules):
+# bit 0 (1) = IEEE 802.11
+# bit 1 (2) = IEEE 802.1X
+# bit 2 (4) = RADIUS
+# bit 3 (8) = WPA
+# bit 4 (16) = driver interface
+# bit 5 (32) = IAPP
+# bit 6 (64) = MLME
+#
+# Levels (minimum value for logged events):
+#  0 = verbose debugging
+#  1 = debugging
+#  2 = informational messages
+#  3 = notification
+#  4 = warning
+#
+logger_syslog=1
+logger_syslog_level=0
+logger_stdout=1
+logger_stdout_level=0
+
+# Interface for separate control program. If this is specified, hostapd
+# will create this directory and a UNIX domain socket for listening to requests
+# from external programs (CLI/GUI, etc.) for status information and
+# configuration. The socket file will be named based on the interface name, so
+# multiple hostapd processes/interfaces can be run at the same time if more
+# than one interface is used.
+# /var/run/hostapd is the recommended directory for sockets and by default,
+# hostapd_cli will use it when trying to connect with hostapd.
+ctrl_interface=/var/run/hostapd
+
+# Access control for the control interface can be configured by setting the
+# directory to allow only members of a group to use sockets. This way, it is
+# possible to run hostapd as root (since it needs to change network
+# configuration and open raw sockets) and still allow GUI/CLI components to be
+# run as non-root users. However, since the control interface can be used to
+# change the network configuration, this access needs to be protected in many
+# cases. By default, hostapd is configured to use gid 0 (root). If you
+# want to allow non-root users to use the contron interface, add a new group
+# and change this value to match with that group. Add users that should have
+# control interface access to this group.
+#
+# This variable can be a group name or gid.
+#ctrl_interface_group=wheel
+ctrl_interface_group=0
+
+
+##### IEEE 802.11 related configuration #######################################
+
+# SSID to be used in IEEE 802.11 management frames
+ssid=TestAP
+# Alternative formats for configuring SSID
+# (double quoted string, hexdump, printf-escaped string)
+#ssid2="test"
+#ssid2=74657374
+#ssid2=P"hello\nthere"
+
+# UTF-8 SSID: Whether the SSID is to be interpreted using UTF-8 encoding
+#utf8_ssid=1
+
+# Country code (ISO/IEC 3166-1). Used to set regulatory domain.
+# Set as needed to indicate country in which device is operating.
+# This can limit available channels and transmit power.
+#country_code=US
+
+# Enable IEEE 802.11d. This advertises the country_code and the set of allowed
+# channels and transmit power levels based on the regulatory limits. The
+# country_code setting must be configured with the correct country for
+# IEEE 802.11d functions.
+# (default: 0 = disabled)
+#ieee80211d=1
+
+# Enable IEEE 802.11h. This enables radar detection and DFS support if
+# available. DFS support is required on outdoor 5 GHz channels in most countries
+# of the world. This can be used only with ieee80211d=1.
+# (default: 0 = disabled)
+#ieee80211h=1
+
+# Operation mode (a = IEEE 802.11a, b = IEEE 802.11b, g = IEEE 802.11g,
+# ad = IEEE 802.11ad (60 GHz); a/g options are used with IEEE 802.11n, too, to
+# specify band)
+# Default: IEEE 802.11b
+hw_mode=g
+
+# Channel number (IEEE 802.11)
+# (default: 0, i.e., not set)
+# Please note that some drivers do not use this value from hostapd and the
+# channel will need to be configured separately with iwconfig.
+#
+# If CONFIG_ACS build option is enabled, the channel can be selected
+# automatically at run time by setting channel=acs_survey or channel=0, both of
+# which will enable the ACS survey based algorithm.
+channel=6
+
+# ACS tuning - Automatic Channel Selection
+# See: http://wireless.kernel.org/en/users/Documentation/acs
+#
+# You can customize the ACS survey algorithm with following variables:
+#
+# acs_num_scans requirement is 1..100 - number of scans to be performed that
+# are used to trigger survey data gathering of an underlying device driver.
+# Scans are passive and typically take a little over 100ms (depending on the
+# driver) on each available channel for given hw_mode. Increasing this value
+# means sacrificing startup time and gathering more data wrt channel
+# interference that may help choosing a better channel. This can also help fine
+# tune the ACS scan time in case a driver has different scan dwell times.
+#
+# Defaults:
+#acs_num_scans=5
+
+# Beacon interval in kus (1.024 ms) (default: 100; range 15..65535)
+beacon_int=100
+
+# DTIM (delivery traffic information message) period (range 1..255):
+# number of beacons between DTIMs (1 = every beacon includes DTIM element)
+# (default: 2)
+dtim_period=2
+
+# Maximum number of stations allowed in station table. New stations will be
+# rejected after the station table is full. IEEE 802.11 has a limit of 2007
+# different association IDs, so this number should not be larger than that.
+# (default: 2007)
+max_num_sta=255
+
+# RTS/CTS threshold; 2347 = disabled (default); range 0..2347
+# If this field is not included in hostapd.conf, hostapd will not control
+# RTS threshold and 'iwconfig wlan# rts <val>' can be used to set it.
+rts_threshold=2347
+
+# Fragmentation threshold; 2346 = disabled (default); range 256..2346
+# If this field is not included in hostapd.conf, hostapd will not control
+# fragmentation threshold and 'iwconfig wlan# frag <val>' can be used to set
+# it.
+fragm_threshold=2346
+
+# Rate configuration
+# Default is to enable all rates supported by the hardware. This configuration
+# item allows this list be filtered so that only the listed rates will be left
+# in the list. If the list is empty, all rates are used. This list can have
+# entries that are not in the list of rates the hardware supports (such entries
+# are ignored). The entries in this list are in 100 kbps, i.e., 11 Mbps = 110.
+# If this item is present, at least one rate have to be matching with the rates
+# hardware supports.
+# default: use the most common supported rate setting for the selected
+# hw_mode (i.e., this line can be removed from configuration file in most
+# cases)
+#supported_rates=10 20 55 110 60 90 120 180 240 360 480 540
+
+# Basic rate set configuration
+# List of rates (in 100 kbps) that are included in the basic rate set.
+# If this item is not included, usually reasonable default set is used.
+#basic_rates=10 20
+#basic_rates=10 20 55 110
+#basic_rates=60 120 240
+
+# Short Preamble
+# This parameter can be used to enable optional use of short preamble for
+# frames sent at 2 Mbps, 5.5 Mbps, and 11 Mbps to improve network performance.
+# This applies only to IEEE 802.11b-compatible networks and this should only be
+# enabled if the local hardware supports use of short preamble. If any of the
+# associated STAs do not support short preamble, use of short preamble will be
+# disabled (and enabled when such STAs disassociate) dynamically.
+# 0 = do not allow use of short preamble (default)
+# 1 = allow use of short preamble
+#preamble=1
+
+# Station MAC address -based authentication
+# Please note that this kind of access control requires a driver that uses
+# hostapd to take care of management frame processing and as such, this can be
+# used with driver=hostap or driver=nl80211, but not with driver=madwifi.
+# 0 = accept unless in deny list
+# 1 = deny unless in accept list
+# 2 = use external RADIUS server (accept/deny lists are searched first)
+macaddr_acl=0
+
+# Accept/deny lists are read from separate files (containing list of
+# MAC addresses, one per line). Use absolute path name to make sure that the
+# files can be read on SIGHUP configuration reloads.
+#accept_mac_file=/etc/hostapd.accept
+#deny_mac_file=/etc/hostapd.deny
+
+# IEEE 802.11 specifies two authentication algorithms. hostapd can be
+# configured to allow both of these or only one. Open system authentication
+# should be used with IEEE 802.1X.
+# Bit fields of allowed authentication algorithms:
+# bit 0 = Open System Authentication
+# bit 1 = Shared Key Authentication (requires WEP)
+auth_algs=3
+
+# Send empty SSID in beacons and ignore probe request frames that do not
+# specify full SSID, i.e., require stations to know SSID.
+# default: disabled (0)
+# 1 = send empty (length=0) SSID in beacon and ignore probe request for
+#     broadcast SSID
+# 2 = clear SSID (ASCII 0), but keep the original length (this may be required
+#     with some clients that do not support empty SSID) and ignore probe
+#     requests for broadcast SSID
+ignore_broadcast_ssid=0
+
+# Additional vendor specfic elements for Beacon and Probe Response frames
+# This parameter can be used to add additional vendor specific element(s) into
+# the end of the Beacon and Probe Response frames. The format for these
+# element(s) is a hexdump of the raw information elements (id+len+payload for
+# one or more elements)
+#vendor_elements=dd0411223301
+
+# TX queue parameters (EDCF / bursting)
+# tx_queue_<queue name>_<param>
+# queues: data0, data1, data2, data3, after_beacon, beacon
+#		(data0 is the highest priority queue)
+# parameters:
+#   aifs: AIFS (default 2)
+#   cwmin: cwMin (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023)
+#   cwmax: cwMax (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023); cwMax >= cwMin
+#   burst: maximum length (in milliseconds with precision of up to 0.1 ms) for
+#          bursting
+#
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# These parameters are used by the access point when transmitting frames
+# to the clients.
+#
+# Low priority / AC_BK = background
+#tx_queue_data3_aifs=7
+#tx_queue_data3_cwmin=15
+#tx_queue_data3_cwmax=1023
+#tx_queue_data3_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=1023 burst=0
+#
+# Normal priority / AC_BE = best effort
+#tx_queue_data2_aifs=3
+#tx_queue_data2_cwmin=15
+#tx_queue_data2_cwmax=63
+#tx_queue_data2_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=127 burst=0
+#
+# High priority / AC_VI = video
+#tx_queue_data1_aifs=1
+#tx_queue_data1_cwmin=7
+#tx_queue_data1_cwmax=15
+#tx_queue_data1_burst=3.0
+# Note: for IEEE 802.11b mode: cWmin=15 cWmax=31 burst=6.0
+#
+# Highest priority / AC_VO = voice
+#tx_queue_data0_aifs=1
+#tx_queue_data0_cwmin=3
+#tx_queue_data0_cwmax=7
+#tx_queue_data0_burst=1.5
+# Note: for IEEE 802.11b mode: cWmin=7 cWmax=15 burst=3.3
+
+# 802.1D Tag (= UP) to AC mappings
+# WMM specifies following mapping of data frames to different ACs. This mapping
+# can be configured using Linux QoS/tc and sch_pktpri.o module.
+# 802.1D Tag	802.1D Designation	Access Category	WMM Designation
+# 1		BK			AC_BK		Background
+# 2		-			AC_BK		Background
+# 0		BE			AC_BE		Best Effort
+# 3		EE			AC_BE		Best Effort
+# 4		CL			AC_VI		Video
+# 5		VI			AC_VI		Video
+# 6		VO			AC_VO		Voice
+# 7		NC			AC_VO		Voice
+# Data frames with no priority information: AC_BE
+# Management frames: AC_VO
+# PS-Poll frames: AC_BE
+
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# for 802.11a or 802.11g networks
+# These parameters are sent to WMM clients when they associate.
+# The parameters will be used by WMM clients for frames transmitted to the
+# access point.
+#
+# note - txop_limit is in units of 32microseconds
+# note - acm is admission control mandatory flag. 0 = admission control not
+# required, 1 = mandatory
+# note - here cwMin and cmMax are in exponent form. the actual cw value used
+# will be (2^n)-1 where n is the value given here
+#
+wmm_enabled=1
+#
+# WMM-PS Unscheduled Automatic Power Save Delivery [U-APSD]
+# Enable this flag if U-APSD supported outside hostapd (eg., Firmware/driver)
+#uapsd_advertisement_enabled=1
+#
+# Low priority / AC_BK = background
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=10
+#
+# Normal priority / AC_BE = best effort
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=7
+#
+# High priority / AC_VI = video
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+# Note: for IEEE 802.11b mode: cWmin=4 cWmax=5 txop_limit=188
+#
+# Highest priority / AC_VO = voice
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
+# Note: for IEEE 802.11b mode: cWmin=3 cWmax=4 burst=102
+
+# Static WEP key configuration
+#
+# The key number to use when transmitting.
+# It must be between 0 and 3, and the corresponding key must be set.
+# default: not set
+#wep_default_key=0
+# The WEP keys to use.
+# A key may be a quoted string or unquoted hexadecimal digits.
+# The key length should be 5, 13, or 16 characters, or 10, 26, or 32
+# digits, depending on whether 40-bit (64-bit), 104-bit (128-bit), or
+# 128-bit (152-bit) WEP is used.
+# Only the default key must be supplied; the others are optional.
+# default: not set
+#wep_key0=123456789a
+#wep_key1="vwxyz"
+#wep_key2=0102030405060708090a0b0c0d
+#wep_key3=".2.4.6.8.0.23"
+
+# Station inactivity limit
+#
+# If a station does not send anything in ap_max_inactivity seconds, an
+# empty data frame is sent to it in order to verify whether it is
+# still in range. If this frame is not ACKed, the station will be
+# disassociated and then deauthenticated. This feature is used to
+# clear station table of old entries when the STAs move out of the
+# range.
+#
+# The station can associate again with the AP if it is still in range;
+# this inactivity poll is just used as a nicer way of verifying
+# inactivity; i.e., client will not report broken connection because
+# disassociation frame is not sent immediately without first polling
+# the STA with a data frame.
+# default: 300 (i.e., 5 minutes)
+#ap_max_inactivity=300
+#
+# The inactivity polling can be disabled to disconnect stations based on
+# inactivity timeout so that idle stations are more likely to be disconnected
+# even if they are still in range of the AP. This can be done by setting
+# skip_inactivity_poll to 1 (default 0).
+#skip_inactivity_poll=0
+
+# Disassociate stations based on excessive transmission failures or other
+# indications of connection loss. This depends on the driver capabilities and
+# may not be available with all drivers.
+#disassoc_low_ack=1
+
+# Maximum allowed Listen Interval (how many Beacon periods STAs are allowed to
+# remain asleep). Default: 65535 (no limit apart from field size)
+#max_listen_interval=100
+
+# WDS (4-address frame) mode with per-station virtual interfaces
+# (only supported with driver=nl80211)
+# This mode allows associated stations to use 4-address frames to allow layer 2
+# bridging to be used.
+#wds_sta=1
+
+# If bridge parameter is set, the WDS STA interface will be added to the same
+# bridge by default. This can be overridden with the wds_bridge parameter to
+# use a separate bridge.
+#wds_bridge=wds-br0
+
+# Start the AP with beaconing disabled by default.
+#start_disabled=0
+
+# Client isolation can be used to prevent low-level bridging of frames between
+# associated stations in the BSS. By default, this bridging is allowed.
+#ap_isolate=1
+
+# Fixed BSS Load value for testing purposes
+# This field can be used to configure hostapd to add a fixed BSS Load element
+# into Beacon and Probe Response frames for testing purposes. The format is
+# <station count>:<channel utilization>:<available admission capacity>
+#bss_load_test=12:80:20000
+
+##### IEEE 802.11n related configuration ######################################
+
+# ieee80211n: Whether IEEE 802.11n (HT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full HT functionality.
+ieee80211n=1
+
+# ht_capab: HT capabilities (list of flags)
+# LDPC coding capability: [LDPC] = supported
+# Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
+#	channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
+#	with secondary channel below the primary channel
+#	(20 MHz only if neither is set)
+#	Note: There are limits on which channels can be used with HT40- and
+#	HT40+. Following table shows the channels that may be available for
+#	HT40- and HT40+ use per IEEE 802.11n Annex J:
+#	freq		HT40-		HT40+
+#	2.4 GHz		5-13		1-7 (1-9 in Europe/Japan)
+#	5 GHz		40,48,56,64	36,44,52,60
+#	(depending on the location, not all of these channels may be available
+#	for use)
+#	Please note that 40 MHz channels may switch their primary and secondary
+#	channels if needed or creation of 40 MHz channel maybe rejected based
+#	on overlapping BSSes. These changes are done automatically when hostapd
+#	is setting up the 40 MHz channel.
+# Spatial Multiplexing (SM) Power Save: [SMPS-STATIC] or [SMPS-DYNAMIC]
+#	(SMPS disabled if neither is set)
+# HT-greenfield: [GF] (disabled if not set)
+# Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
+# Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
+# Tx STBC: [TX-STBC] (disabled if not set)
+# Rx STBC: [RX-STBC1] (one spatial stream), [RX-STBC12] (one or two spatial
+#	streams), or [RX-STBC123] (one, two, or three spatial streams); Rx STBC
+#	disabled if none of these set
+# HT-delayed Block Ack: [DELAYED-BA] (disabled if not set)
+# Maximum A-MSDU length: [MAX-AMSDU-7935] for 7935 octets (3839 octets if not
+#	set)
+# DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
+# PSMP support: [PSMP] (disabled if not set)
+# L-SIG TXOP protection support: [LSIG-TXOP-PROT] (disabled if not set)
+#ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
+ht_capab=[SHORT-GI-20]
+
+# Require stations to support HT PHY (reject association if they do not)
+#require_ht=1
+
+# If set non-zero, require stations to perform scans of overlapping
+# channels to test for stations which would be affected by 40 MHz traffic.
+# This parameter sets the interval in seconds between these scans. This
+# is useful only for testing that stations properly set the OBSS interval,
+# since the other parameters in the OBSS scan parameters IE are set to 0.
+#obss_interval=0
+
+##### IEEE 802.11ac related configuration #####################################
+
+# ieee80211ac: Whether IEEE 802.11ac (VHT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full VHT functionality.
+#ieee80211ac=1
+
+# vht_capab: VHT capabilities (list of flags)
+#
+# vht_max_mpdu_len: [MAX-MPDU-7991] [MAX-MPDU-11454]
+# Indicates maximum MPDU length
+# 0 = 3895 octets (default)
+# 1 = 7991 octets
+# 2 = 11454 octets
+# 3 = reserved
+#
+# supported_chan_width: [VHT160] [VHT160-80PLUS80]
+# Indicates supported Channel widths
+# 0 = 160 MHz & 80+80 channel widths are not supported (default)
+# 1 = 160 MHz channel width is supported
+# 2 = 160 MHz & 80+80 channel widths are supported
+# 3 = reserved
+#
+# Rx LDPC coding capability: [RXLDPC]
+# Indicates support for receiving LDPC coded pkts
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 80 MHz: [SHORT-GI-80]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 80Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 160 MHz: [SHORT-GI-160]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 160Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Tx STBC: [TX-STBC-2BY1]
+# Indicates support for the transmission of at least 2x1 STBC
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Rx STBC: [RX-STBC-1] [RX-STBC-12] [RX-STBC-123] [RX-STBC-1234]
+# Indicates support for the reception of PPDUs using STBC
+# 0 = Not supported (default)
+# 1 = support of one spatial stream
+# 2 = support of one and two spatial streams
+# 3 = support of one, two and three spatial streams
+# 4 = support of one, two, three and four spatial streams
+# 5,6,7 = reserved
+#
+# SU Beamformer Capable: [SU-BEAMFORMER]
+# Indicates support for operation as a single user beamformer
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# SU Beamformee Capable: [SU-BEAMFORMEE]
+# Indicates support for operation as a single user beamformee
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Compressed Steering Number of Beamformer Antennas Supported: [BF-ANTENNA-2]
+#   Beamformee's capability indicating the maximum number of beamformer
+#   antennas the beamformee can support when sending compressed beamforming
+#   feedback
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# Number of Sounding Dimensions: [SOUNDING-DIMENSION-2]
+# Beamformer's capability indicating the maximum value of the NUM_STS parameter
+# in the TXVECTOR of a VHT NDP
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# MU Beamformer Capable: [MU-BEAMFORMER]
+# Indicates support for operation as an MU beamformer
+# 0 = Not supported or sent by Non-AP STA (default)
+# 1 = Supported
+#
+# MU Beamformee Capable: [MU-BEAMFORMEE]
+# Indicates support for operation as an MU beamformee
+# 0 = Not supported or sent by AP (default)
+# 1 = Supported
+#
+# VHT TXOP PS: [VHT-TXOP-PS]
+# Indicates whether or not the AP supports VHT TXOP Power Save Mode
+#  or whether or not the STA is in VHT TXOP Power Save mode
+# 0 = VHT AP doesnt support VHT TXOP PS mode (OR) VHT Sta not in VHT TXOP PS
+#  mode
+# 1 = VHT AP supports VHT TXOP PS mode (OR) VHT Sta is in VHT TXOP power save
+#  mode
+#
+# +HTC-VHT Capable: [HTC-VHT]
+# Indicates whether or not the STA supports receiving a VHT variant HT Control
+# field.
+# 0 = Not supported (default)
+# 1 = supported
+#
+# Maximum A-MPDU Length Exponent: [MAX-A-MPDU-LEN-EXP0]..[MAX-A-MPDU-LEN-EXP7]
+# Indicates the maximum length of A-MPDU pre-EOF padding that the STA can recv
+# This field is an integer in the range of 0 to 7.
+# The length defined by this field is equal to
+# 2 pow(13 + Maximum A-MPDU Length Exponent) -1 octets
+#
+# VHT Link Adaptation Capable: [VHT-LINK-ADAPT2] [VHT-LINK-ADAPT3]
+# Indicates whether or not the STA supports link adaptation using VHT variant
+# HT Control field
+# If +HTC-VHTcapable is 1
+#  0 = (no feedback) if the STA does not provide VHT MFB (default)
+#  1 = reserved
+#  2 = (Unsolicited) if the STA provides only unsolicited VHT MFB
+#  3 = (Both) if the STA can provide VHT MFB in response to VHT MRQ and if the
+#      STA provides unsolicited VHT MFB
+# Reserved if +HTC-VHTcapable is 0
+#
+# Rx Antenna Pattern Consistency: [RX-ANTENNA-PATTERN]
+# Indicates the possibility of Rx antenna pattern change
+# 0 = Rx antenna pattern might change during the lifetime of an association
+# 1 = Rx antenna pattern does not change during the lifetime of an association
+#
+# Tx Antenna Pattern Consistency: [TX-ANTENNA-PATTERN]
+# Indicates the possibility of Tx antenna pattern change
+# 0 = Tx antenna pattern might change during the lifetime of an association
+# 1 = Tx antenna pattern does not change during the lifetime of an association
+#vht_capab=[SHORT-GI-80][HTC-VHT]
+#
+# Require stations to support VHT PHY (reject association if they do not)
+#require_vht=1
+
+# 0 = 20 or 40 MHz operating Channel width
+# 1 = 80 MHz channel width
+# 2 = 160 MHz channel width
+# 3 = 80+80 MHz channel width
+#vht_oper_chwidth=1
+#
+# center freq = 5 GHz + (5 * index)
+# So index 42 gives center freq 5.210 GHz
+# which is channel 42 in 5G band
+#
+#vht_oper_centr_freq_seg0_idx=42
+#
+# center freq = 5 GHz + (5 * index)
+# So index 159 gives center freq 5.795 GHz
+# which is channel 159 in 5G band
+#
+#vht_oper_centr_freq_seg1_idx=159
+
+##### IEEE 802.1X-2004 related configuration ##################################
+
+# Require IEEE 802.1X authorization
+#ieee8021x=1
+
+# IEEE 802.1X/EAPOL version
+# hostapd is implemented based on IEEE Std 802.1X-2004 which defines EAPOL
+# version 2. However, there are many client implementations that do not handle
+# the new version number correctly (they seem to drop the frames completely).
+# In order to make hostapd interoperate with these clients, the version number
+# can be set to the older version (1) with this configuration value.
+#eapol_version=2
+
+# Optional displayable message sent with EAP Request-Identity. The first \0
+# in this string will be converted to ASCII-0 (nul). This can be used to
+# separate network info (comma separated list of attribute=value pairs); see,
+# e.g., RFC 4284.
+#eap_message=hello
+#eap_message=hello\0networkid=netw,nasid=foo,portid=0,NAIRealms=example.com
+
+# WEP rekeying (disabled if key lengths are not set or are set to 0)
+# Key lengths for default/broadcast and individual/unicast keys:
+# 5 = 40-bit WEP (also known as 64-bit WEP with 40 secret bits)
+# 13 = 104-bit WEP (also known as 128-bit WEP with 104 secret bits)
+#wep_key_len_broadcast=5
+#wep_key_len_unicast=5
+# Rekeying period in seconds. 0 = do not rekey (i.e., set keys only once)
+#wep_rekey_period=300
+
+# EAPOL-Key index workaround (set bit7) for WinXP Supplicant (needed only if
+# only broadcast keys are used)
+eapol_key_index_workaround=0
+
+# EAP reauthentication period in seconds (default: 3600 seconds; 0 = disable
+# reauthentication).
+#eap_reauth_period=3600
+
+# Use PAE group address (01:80:c2:00:00:03) instead of individual target
+# address when sending EAPOL frames with driver=wired. This is the most common
+# mechanism used in wired authentication, but it also requires that the port
+# is only used by one station.
+#use_pae_group_addr=1
+
+##### Integrated EAP server ###################################################
+
+# Optionally, hostapd can be configured to use an integrated EAP server
+# to process EAP authentication locally without need for an external RADIUS
+# server. This functionality can be used both as a local authentication server
+# for IEEE 802.1X/EAPOL and as a RADIUS server for other devices.
+
+# Use integrated EAP server instead of external RADIUS authentication
+# server. This is also needed if hostapd is configured to act as a RADIUS
+# authentication server.
+eap_server=0
+
+# Path for EAP server user database
+# If SQLite support is included, this can be set to "sqlite:/path/to/sqlite.db"
+# to use SQLite database instead of a text file.
+#eap_user_file=/etc/hostapd.eap_user
+
+# CA certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#ca_cert=/etc/hostapd.ca.pem
+
+# Server certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#server_cert=/etc/hostapd.server.pem
+
+# Private key matching with the server certificate for EAP-TLS/PEAP/TTLS
+# This may point to the same file as server_cert if both certificate and key
+# are included in a single file. PKCS#12 (PFX) file (.p12/.pfx) can also be
+# used by commenting out server_cert and specifying the PFX file as the
+# private_key.
+#private_key=/etc/hostapd.server.prv
+
+# Passphrase for private key
+#private_key_passwd=secret passphrase
+
+# Server identity
+# EAP methods that provide mechanism for authenticated server identity delivery
+# use this value. If not set, "hostapd" is used as a default.
+#server_id=server.example.com
+
+# Enable CRL verification.
+# Note: hostapd does not yet support CRL downloading based on CDP. Thus, a
+# valid CRL signed by the CA is required to be included in the ca_cert file.
+# This can be done by using PEM format for CA certificate and CRL and
+# concatenating these into one file. Whenever CRL changes, hostapd needs to be
+# restarted to take the new CRL into use.
+# 0 = do not verify CRLs (default)
+# 1 = check the CRL of the user certificate
+# 2 = check all CRLs in the certificate path
+#check_crl=1
+
+# Cached OCSP stapling response (DER encoded)
+# If set, this file is sent as a certificate status response by the EAP server
+# if the EAP peer requests certificate status in the ClientHello message.
+# This cache file can be updated, e.g., by running following command
+# periodically to get an update from the OCSP responder:
+# openssl ocsp \
+#	-no_nonce \
+#	-CAfile /etc/hostapd.ca.pem \
+#	-issuer /etc/hostapd.ca.pem \
+#	-cert /etc/hostapd.server.pem \
+#	-url http://ocsp.example.com:8888/ \
+#	-respout /tmp/ocsp-cache.der
+#ocsp_stapling_response=/tmp/ocsp-cache.der
+
+# dh_file: File path to DH/DSA parameters file (in PEM format)
+# This is an optional configuration file for setting parameters for an
+# ephemeral DH key exchange. In most cases, the default RSA authentication does
+# not use this configuration. However, it is possible setup RSA to use
+# ephemeral DH key exchange. In addition, ciphers with DSA keys always use
+# ephemeral DH keys. This can be used to achieve forward secrecy. If the file
+# is in DSA parameters format, it will be automatically converted into DH
+# params. This parameter is required if anonymous EAP-FAST is used.
+# You can generate DH parameters file with OpenSSL, e.g.,
+# "openssl dhparam -out /etc/hostapd.dh.pem 1024"
+#dh_file=/etc/hostapd.dh.pem
+
+# Fragment size for EAP methods
+#fragment_size=1400
+
+# Finite cyclic group for EAP-pwd. Number maps to group of domain parameters
+# using the IANA repository for IKE (RFC 2409).
+#pwd_group=19
+
+# Configuration data for EAP-SIM database/authentication gateway interface.
+# This is a text string in implementation specific format. The example
+# implementation in eap_sim_db.c uses this as the UNIX domain socket name for
+# the HLR/AuC gateway (e.g., hlr_auc_gw). In this case, the path uses "unix:"
+# prefix. If hostapd is built with SQLite support (CONFIG_SQLITE=y in .config),
+# database file can be described with an optional db=<path> parameter.
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock db=/tmp/hostapd.db
+
+# Encryption key for EAP-FAST PAC-Opaque values. This key must be a secret,
+# random value. It is configured as a 16-octet value in hex format. It can be
+# generated, e.g., with the following command:
+# od -tx1 -v -N16 /dev/random | colrm 1 8 | tr -d ' '
+#pac_opaque_encr_key=000102030405060708090a0b0c0d0e0f
+
+# EAP-FAST authority identity (A-ID)
+# A-ID indicates the identity of the authority that issues PACs. The A-ID
+# should be unique across all issuing servers. In theory, this is a variable
+# length field, but due to some existing implementations requiring A-ID to be
+# 16 octets in length, it is strongly recommended to use that length for the
+# field to provid interoperability with deployed peer implementations. This
+# field is configured in hex format.
+#eap_fast_a_id=101112131415161718191a1b1c1d1e1f
+
+# EAP-FAST authority identifier information (A-ID-Info)
+# This is a user-friendly name for the A-ID. For example, the enterprise name
+# and server name in a human-readable format. This field is encoded as UTF-8.
+#eap_fast_a_id_info=test server
+
+# Enable/disable different EAP-FAST provisioning modes:
+#0 = provisioning disabled
+#1 = only anonymous provisioning allowed
+#2 = only authenticated provisioning allowed
+#3 = both provisioning modes allowed (default)
+#eap_fast_prov=3
+
+# EAP-FAST PAC-Key lifetime in seconds (hard limit)
+#pac_key_lifetime=604800
+
+# EAP-FAST PAC-Key refresh time in seconds (soft limit on remaining hard
+# limit). The server will generate a new PAC-Key when this number of seconds
+# (or fewer) of the lifetime remains.
+#pac_key_refresh_time=86400
+
+# EAP-SIM and EAP-AKA protected success/failure indication using AT_RESULT_IND
+# (default: 0 = disabled).
+#eap_sim_aka_result_ind=1
+
+# Trusted Network Connect (TNC)
+# If enabled, TNC validation will be required before the peer is allowed to
+# connect. Note: This is only used with EAP-TTLS and EAP-FAST. If any other
+# EAP method is enabled, the peer will be allowed to connect without TNC.
+#tnc=1
+
+
+##### IEEE 802.11f - Inter-Access Point Protocol (IAPP) #######################
+
+# Interface to be used for IAPP broadcast packets
+#iapp_interface=eth0
+
+
+##### RADIUS client configuration #############################################
+# for IEEE 802.1X with external Authentication Server, IEEE 802.11
+# authentication with external ACL for MAC addresses, and accounting
+
+# The own IP address of the access point (used as NAS-IP-Address)
+own_ip_addr=127.0.0.1
+
+# Optional NAS-Identifier string for RADIUS messages. When used, this should be
+# a unique to the NAS within the scope of the RADIUS server. For example, a
+# fully qualified domain name can be used here.
+# When using IEEE 802.11r, nas_identifier must be set and must be between 1 and
+# 48 octets long.
+#nas_identifier=ap.example.com
+
+# RADIUS authentication server
+#auth_server_addr=127.0.0.1
+#auth_server_port=1812
+#auth_server_shared_secret=secret
+
+# RADIUS accounting server
+#acct_server_addr=127.0.0.1
+#acct_server_port=1813
+#acct_server_shared_secret=secret
+
+# Secondary RADIUS servers; to be used if primary one does not reply to
+# RADIUS packets. These are optional and there can be more than one secondary
+# server listed.
+#auth_server_addr=127.0.0.2
+#auth_server_port=1812
+#auth_server_shared_secret=secret2
+#
+#acct_server_addr=127.0.0.2
+#acct_server_port=1813
+#acct_server_shared_secret=secret2
+
+# Retry interval for trying to return to the primary RADIUS server (in
+# seconds). RADIUS client code will automatically try to use the next server
+# when the current server is not replying to requests. If this interval is set,
+# primary server will be retried after configured amount of time even if the
+# currently used secondary server is still working.
+#radius_retry_primary_interval=600
+
+
+# Interim accounting update interval
+# If this is set (larger than 0) and acct_server is configured, hostapd will
+# send interim accounting updates every N seconds. Note: if set, this overrides
+# possible Acct-Interim-Interval attribute in Access-Accept message. Thus, this
+# value should not be configured in hostapd.conf, if RADIUS server is used to
+# control the interim interval.
+# This value should not be less 600 (10 minutes) and must not be less than
+# 60 (1 minute).
+#radius_acct_interim_interval=600
+
+# Request Chargeable-User-Identity (RFC 4372)
+# This parameter can be used to configure hostapd to request CUI from the
+# RADIUS server by including Chargeable-User-Identity attribute into
+# Access-Request packets.
+#radius_request_cui=1
+
+# Dynamic VLAN mode; allow RADIUS authentication server to decide which VLAN
+# is used for the stations. This information is parsed from following RADIUS
+# attributes based on RFC 3580 and RFC 2868: Tunnel-Type (value 13 = VLAN),
+# Tunnel-Medium-Type (value 6 = IEEE 802), Tunnel-Private-Group-ID (value
+# VLANID as a string). Optionally, the local MAC ACL list (accept_mac_file) can
+# be used to set static client MAC address to VLAN ID mapping.
+# 0 = disabled (default)
+# 1 = option; use default interface if RADIUS server does not include VLAN ID
+# 2 = required; reject authentication if RADIUS server does not include VLAN ID
+#dynamic_vlan=0
+
+# VLAN interface list for dynamic VLAN mode is read from a separate text file.
+# This list is used to map VLAN ID from the RADIUS server to a network
+# interface. Each station is bound to one interface in the same way as with
+# multiple BSSIDs or SSIDs. Each line in this text file is defining a new
+# interface and the line must include VLAN ID and interface name separated by
+# white space (space or tab).
+# If no entries are provided by this file, the station is statically mapped
+# to <bss-iface>.<vlan-id> interfaces.
+#vlan_file=/etc/hostapd.vlan
+
+# Interface where 802.1q tagged packets should appear when a RADIUS server is
+# used to determine which VLAN a station is on.  hostapd creates a bridge for
+# each VLAN.  Then hostapd adds a VLAN interface (associated with the interface
+# indicated by 'vlan_tagged_interface') and the appropriate wireless interface
+# to the bridge.
+#vlan_tagged_interface=eth0
+
+# Bridge (prefix) to add the wifi and the tagged interface to. This gets the
+# VLAN ID appended. It defaults to brvlan%d if no tagged interface is given
+# and br%s.%d if a tagged interface is given, provided %s = tagged interface
+# and %d = VLAN ID.
+#vlan_bridge=brvlan
+
+# When hostapd creates a VLAN interface on vlan_tagged_interfaces, it needs
+# to know how to name it.
+# 0 = vlan<XXX>, e.g., vlan1
+# 1 = <vlan_tagged_interface>.<XXX>, e.g. eth0.1
+#vlan_naming=0
+
+# Arbitrary RADIUS attributes can be added into Access-Request and
+# Accounting-Request packets by specifying the contents of the attributes with
+# the following configuration parameters. There can be multiple of these to
+# add multiple attributes. These parameters can also be used to override some
+# of the attributes added automatically by hostapd.
+# Format: <attr_id>[:<syntax:value>]
+# attr_id: RADIUS attribute type (e.g., 26 = Vendor-Specific)
+# syntax: s = string (UTF-8), d = integer, x = octet string
+# value: attribute value in format indicated by the syntax
+# If syntax and value parts are omitted, a null value (single 0x00 octet) is
+# used.
+#
+# Additional Access-Request attributes
+# radius_auth_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_auth_req_attr=126:s:Operator
+# Service-Type = Framed (2)
+#radius_auth_req_attr=6:d:2
+# Connect-Info = "testing" (this overrides the automatically generated value)
+#radius_auth_req_attr=77:s:testing
+# Same Connect-Info value set as a hexdump
+#radius_auth_req_attr=77:x:74657374696e67
+
+#
+# Additional Accounting-Request attributes
+# radius_acct_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_acct_req_attr=126:s:Operator
+
+# Dynamic Authorization Extensions (RFC 5176)
+# This mechanism can be used to allow dynamic changes to user session based on
+# commands from a RADIUS server (or some other disconnect client that has the
+# needed session information). For example, Disconnect message can be used to
+# request an associated station to be disconnected.
+#
+# This is disabled by default. Set radius_das_port to non-zero UDP port
+# number to enable.
+#radius_das_port=3799
+#
+# DAS client (the host that can send Disconnect/CoA requests) and shared secret
+#radius_das_client=192.168.1.123 shared secret here
+#
+# DAS Event-Timestamp time window in seconds
+#radius_das_time_window=300
+#
+# DAS require Event-Timestamp
+#radius_das_require_event_timestamp=1
+
+##### RADIUS authentication server configuration ##############################
+
+# hostapd can be used as a RADIUS authentication server for other hosts. This
+# requires that the integrated EAP server is also enabled and both
+# authentication services are sharing the same configuration.
+
+# File name of the RADIUS clients configuration for the RADIUS server. If this
+# commented out, RADIUS server is disabled.
+#radius_server_clients=/etc/hostapd.radius_clients
+
+# The UDP port number for the RADIUS authentication server
+#radius_server_auth_port=1812
+
+# Use IPv6 with RADIUS server (IPv4 will also be supported using IPv6 API)
+#radius_server_ipv6=1
+
+
+##### WPA/IEEE 802.11i configuration ##########################################
+
+# Enable WPA. Setting this variable configures the AP to require WPA (either
+# WPA-PSK or WPA-RADIUS/EAP based on other configuration). For WPA-PSK, either
+# wpa_psk or wpa_passphrase must be set and wpa_key_mgmt must include WPA-PSK.
+# Instead of wpa_psk / wpa_passphrase, wpa_psk_radius might suffice.
+# For WPA-RADIUS/EAP, ieee8021x must be set (but without dynamic WEP keys),
+# RADIUS authentication server must be configured, and WPA-EAP must be included
+# in wpa_key_mgmt.
+# This field is a bit field that can be used to enable WPA (IEEE 802.11i/D3.0)
+# and/or WPA2 (full IEEE 802.11i/RSN):
+# bit0 = WPA
+# bit1 = IEEE 802.11i/RSN (WPA2) (dot11RSNAEnabled)
+#wpa=1
+
+# WPA pre-shared keys for WPA-PSK. This can be either entered as a 256-bit
+# secret in hex format (64 hex digits), wpa_psk, or as an ASCII passphrase
+# (8..63 characters) that will be converted to PSK. This conversion uses SSID
+# so the PSK changes when ASCII passphrase is used and the SSID is changed.
+# wpa_psk (dot11RSNAConfigPSKValue)
+# wpa_passphrase (dot11RSNAConfigPSKPassPhrase)
+#wpa_psk=0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef
+#wpa_passphrase=secret passphrase
+
+# Optionally, WPA PSKs can be read from a separate text file (containing list
+# of (PSK,MAC address) pairs. This allows more than one PSK to be configured.
+# Use absolute path name to make sure that the files can be read on SIGHUP
+# configuration reloads.
+#wpa_psk_file=/etc/hostapd.wpa_psk
+
+# Optionally, WPA passphrase can be received from RADIUS authentication server
+# This requires macaddr_acl to be set to 2 (RADIUS)
+# 0 = disabled (default)
+# 1 = optional; use default passphrase/psk if RADIUS server does not include
+#	Tunnel-Password
+# 2 = required; reject authentication if RADIUS server does not include
+#	Tunnel-Password
+#wpa_psk_radius=0
+
+# Set of accepted key management algorithms (WPA-PSK, WPA-EAP, or both). The
+# entries are separated with a space. WPA-PSK-SHA256 and WPA-EAP-SHA256 can be
+# added to enable SHA256-based stronger algorithms.
+# (dot11RSNAConfigAuthenticationSuitesTable)
+#wpa_key_mgmt=WPA-PSK WPA-EAP
+
+# Set of accepted cipher suites (encryption algorithms) for pairwise keys
+# (unicast packets). This is a space separated list of algorithms:
+# CCMP = AES in Counter mode with CBC-MAC [RFC 3610, IEEE 802.11i/D7.0]
+# TKIP = Temporal Key Integrity Protocol [IEEE 802.11i/D7.0]
+# Group cipher suite (encryption algorithm for broadcast and multicast frames)
+# is automatically selected based on this configuration. If only CCMP is
+# allowed as the pairwise cipher, group cipher will also be CCMP. Otherwise,
+# TKIP will be used as the group cipher.
+# (dot11RSNAConfigPairwiseCiphersTable)
+# Pairwise cipher for WPA (v1) (default: TKIP)
+#wpa_pairwise=TKIP CCMP
+# Pairwise cipher for RSN/WPA2 (default: use wpa_pairwise value)
+#rsn_pairwise=CCMP
+
+# Time interval for rekeying GTK (broadcast/multicast encryption keys) in
+# seconds. (dot11RSNAConfigGroupRekeyTime)
+#wpa_group_rekey=600
+
+# Rekey GTK when any STA that possesses the current GTK is leaving the BSS.
+# (dot11RSNAConfigGroupRekeyStrict)
+#wpa_strict_rekey=1
+
+# Time interval for rekeying GMK (master key used internally to generate GTKs
+# (in seconds).
+#wpa_gmk_rekey=86400
+
+# Maximum lifetime for PTK in seconds. This can be used to enforce rekeying of
+# PTK to mitigate some attacks against TKIP deficiencies.
+#wpa_ptk_rekey=600
+
+# Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up
+# roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN
+# authentication and key handshake before actually associating with a new AP.
+# (dot11RSNAPreauthenticationEnabled)
+#rsn_preauth=1
+#
+# Space separated list of interfaces from which pre-authentication frames are
+# accepted (e.g., 'eth0' or 'eth0 wlan0wds0'. This list should include all
+# interface that are used for connections to other APs. This could include
+# wired interfaces and WDS links. The normal wireless data interface towards
+# associated stations (e.g., wlan0) should not be added, since
+# pre-authentication is only used with APs other than the currently associated
+# one.
+#rsn_preauth_interfaces=eth0
+
+# peerkey: Whether PeerKey negotiation for direct links (IEEE 802.11e) is
+# allowed. This is only used with RSN/WPA2.
+# 0 = disabled (default)
+# 1 = enabled
+#peerkey=1
+
+# ieee80211w: Whether management frame protection (MFP) is enabled
+# 0 = disabled (default)
+# 1 = optional
+# 2 = required
+#ieee80211w=0
+
+# Association SA Query maximum timeout (in TU = 1.024 ms; for MFP)
+# (maximum time to wait for a SA Query response)
+# dot11AssociationSAQueryMaximumTimeout, 1...4294967295
+#assoc_sa_query_max_timeout=1000
+
+# Association SA Query retry timeout (in TU = 1.024 ms; for MFP)
+# (time between two subsequent SA Query requests)
+# dot11AssociationSAQueryRetryTimeout, 1...4294967295
+#assoc_sa_query_retry_timeout=201
+
+# disable_pmksa_caching: Disable PMKSA caching
+# This parameter can be used to disable caching of PMKSA created through EAP
+# authentication. RSN preauthentication may still end up using PMKSA caching if
+# it is enabled (rsn_preauth=1).
+# 0 = PMKSA caching enabled (default)
+# 1 = PMKSA caching disabled
+#disable_pmksa_caching=0
+
+# okc: Opportunistic Key Caching (aka Proactive Key Caching)
+# Allow PMK cache to be shared opportunistically among configured interfaces
+# and BSSes (i.e., all configurations within a single hostapd process).
+# 0 = disabled (default)
+# 1 = enabled
+#okc=1
+
+# SAE threshold for anti-clogging mechanism (dot11RSNASAEAntiCloggingThreshold)
+# This parameter defines how many open SAE instances can be in progress at the
+# same time before the anti-clogging mechanism is taken into use.
+#sae_anti_clogging_threshold=5
+
+# Enabled SAE finite cyclic groups
+# SAE implementation are required to support group 19 (ECC group defined over a
+# 256-bit prime order field). All groups that are supported by the
+# implementation are enabled by default. This configuration parameter can be
+# used to specify a limited set of allowed groups. The group values are listed
+# in the IANA registry:
+# http://www.iana.org/assignments/ipsec-registry/ipsec-registry.xml#ipsec-registry-9
+#sae_groups=19 20 21 25 26
+
+##### IEEE 802.11r configuration ##############################################
+
+# Mobility Domain identifier (dot11FTMobilityDomainID, MDID)
+# MDID is used to indicate a group of APs (within an ESS, i.e., sharing the
+# same SSID) between which a STA can use Fast BSS Transition.
+# 2-octet identifier as a hex string.
+#mobility_domain=a1b2
+
+# PMK-R0 Key Holder identifier (dot11FTR0KeyHolderID)
+# 1 to 48 octet identifier.
+# This is configured with nas_identifier (see RADIUS client section above).
+
+# Default lifetime of the PMK-RO in minutes; range 1..65535
+# (dot11FTR0KeyLifetime)
+#r0_key_lifetime=10000
+
+# PMK-R1 Key Holder identifier (dot11FTR1KeyHolderID)
+# 6-octet identifier as a hex string.
+#r1_key_holder=000102030405
+
+# Reassociation deadline in time units (TUs / 1.024 ms; range 1000..65535)
+# (dot11FTReassociationDeadline)
+#reassociation_deadline=1000
+
+# List of R0KHs in the same Mobility Domain
+# format: <MAC address> <NAS Identifier> <128-bit key as hex string>
+# This list is used to map R0KH-ID (NAS Identifier) to a destination MAC
+# address when requesting PMK-R1 key from the R0KH that the STA used during the
+# Initial Mobility Domain Association.
+#r0kh=02:01:02:03:04:05 r0kh-1.example.com 000102030405060708090a0b0c0d0e0f
+#r0kh=02:01:02:03:04:06 r0kh-2.example.com 00112233445566778899aabbccddeeff
+# And so on.. One line per R0KH.
+
+# List of R1KHs in the same Mobility Domain
+# format: <MAC address> <R1KH-ID> <128-bit key as hex string>
+# This list is used to map R1KH-ID to a destination MAC address when sending
+# PMK-R1 key from the R0KH. This is also the list of authorized R1KHs in the MD
+# that can request PMK-R1 keys.
+#r1kh=02:01:02:03:04:05 02:11:22:33:44:55 000102030405060708090a0b0c0d0e0f
+#r1kh=02:01:02:03:04:06 02:11:22:33:44:66 00112233445566778899aabbccddeeff
+# And so on.. One line per R1KH.
+
+# Whether PMK-R1 push is enabled at R0KH
+# 0 = do not push PMK-R1 to all configured R1KHs (default)
+# 1 = push PMK-R1 to all configured R1KHs whenever a new PMK-R0 is derived
+#pmk_r1_push=1
+
+##### Neighbor table ##########################################################
+# Maximum number of entries kept in AP table (either for neigbor table or for
+# detecting Overlapping Legacy BSS Condition). The oldest entry will be
+# removed when adding a new entry that would make the list grow over this
+# limit. Note! WFA certification for IEEE 802.11g requires that OLBC is
+# enabled, so this field should not be set to 0 when using IEEE 802.11g.
+# default: 255
+#ap_table_max_size=255
+
+# Number of seconds of no frames received after which entries may be deleted
+# from the AP table. Since passive scanning is not usually performed frequently
+# this should not be set to very small value. In addition, there is no
+# guarantee that every scan cycle will receive beacon frames from the
+# neighboring APs.
+# default: 60
+#ap_table_expiration_time=3600
+
+
+##### Wi-Fi Protected Setup (WPS) #############################################
+
+# WPS state
+# 0 = WPS disabled (default)
+# 1 = WPS enabled, not configured
+# 2 = WPS enabled, configured
+#wps_state=2
+
+# Whether to manage this interface independently from other WPS interfaces
+# By default, a single hostapd process applies WPS operations to all configured
+# interfaces. This parameter can be used to disable that behavior for a subset
+# of interfaces. If this is set to non-zero for an interface, WPS commands
+# issued on that interface do not apply to other interfaces and WPS operations
+# performed on other interfaces do not affect this interface.
+#wps_independent=0
+
+# AP can be configured into a locked state where new WPS Registrar are not
+# accepted, but previously authorized Registrars (including the internal one)
+# can continue to add new Enrollees.
+#ap_setup_locked=1
+
+# Universally Unique IDentifier (UUID; see RFC 4122) of the device
+# This value is used as the UUID for the internal WPS Registrar. If the AP
+# is also using UPnP, this value should be set to the device's UPnP UUID.
+# If not configured, UUID will be generated based on the local MAC address.
+#uuid=12345678-9abc-def0-1234-56789abcdef0
+
+# Note: If wpa_psk_file is set, WPS is used to generate random, per-device PSKs
+# that will be appended to the wpa_psk_file. If wpa_psk_file is not set, the
+# default PSK (wpa_psk/wpa_passphrase) will be delivered to Enrollees. Use of
+# per-device PSKs is recommended as the more secure option (i.e., make sure to
+# set wpa_psk_file when using WPS with WPA-PSK).
+
+# When an Enrollee requests access to the network with PIN method, the Enrollee
+# PIN will need to be entered for the Registrar. PIN request notifications are
+# sent to hostapd ctrl_iface monitor. In addition, they can be written to a
+# text file that could be used, e.g., to populate the AP administration UI with
+# pending PIN requests. If the following variable is set, the PIN requests will
+# be written to the configured file.
+#wps_pin_requests=/var/run/hostapd_wps_pin_requests
+
+# Device Name
+# User-friendly description of device; up to 32 octets encoded in UTF-8
+#device_name=Wireless AP
+
+# Manufacturer
+# The manufacturer of the device (up to 64 ASCII characters)
+#manufacturer=Company
+
+# Model Name
+# Model of the device (up to 32 ASCII characters)
+#model_name=WAP
+
+# Model Number
+# Additional device description (up to 32 ASCII characters)
+#model_number=123
+
+# Serial Number
+# Serial number of the device (up to 32 characters)
+#serial_number=12345
+
+# Primary Device Type
+# Used format: <categ>-<OUI>-<subcateg>
+# categ = Category as an integer value
+# OUI = OUI and type octet as a 4-octet hex-encoded value; 0050F204 for
+#       default WPS OUI
+# subcateg = OUI-specific Sub Category as an integer value
+# Examples:
+#   1-0050F204-1 (Computer / PC)
+#   1-0050F204-2 (Computer / Server)
+#   5-0050F204-1 (Storage / NAS)
+#   6-0050F204-1 (Network Infrastructure / AP)
+#device_type=6-0050F204-1
+
+# OS Version
+# 4-octet operating system version number (hex string)
+#os_version=01020300
+
+# Config Methods
+# List of the supported configuration methods
+# Available methods: usba ethernet label display ext_nfc_token int_nfc_token
+#	nfc_interface push_button keypad virtual_display physical_display
+#	virtual_push_button physical_push_button
+#config_methods=label virtual_display virtual_push_button keypad
+
+# WPS capability discovery workaround for PBC with Windows 7
+# Windows 7 uses incorrect way of figuring out AP's WPS capabilities by acting
+# as a Registrar and using M1 from the AP. The config methods attribute in that
+# message is supposed to indicate only the configuration method supported by
+# the AP in Enrollee role, i.e., to add an external Registrar. For that case,
+# PBC shall not be used and as such, the PushButton config method is removed
+# from M1 by default. If pbc_in_m1=1 is included in the configuration file,
+# the PushButton config method is left in M1 (if included in config_methods
+# parameter) to allow Windows 7 to use PBC instead of PIN (e.g., from a label
+# in the AP).
+#pbc_in_m1=1
+
+# Static access point PIN for initial configuration and adding Registrars
+# If not set, hostapd will not allow external WPS Registrars to control the
+# access point. The AP PIN can also be set at runtime with hostapd_cli
+# wps_ap_pin command. Use of temporary (enabled by user action) and random
+# AP PIN is much more secure than configuring a static AP PIN here. As such,
+# use of the ap_pin parameter is not recommended if the AP device has means for
+# displaying a random PIN.
+#ap_pin=12345670
+
+# Skip building of automatic WPS credential
+# This can be used to allow the automatically generated Credential attribute to
+# be replaced with pre-configured Credential(s).
+#skip_cred_build=1
+
+# Additional Credential attribute(s)
+# This option can be used to add pre-configured Credential attributes into M8
+# message when acting as a Registrar. If skip_cred_build=1, this data will also
+# be able to override the Credential attribute that would have otherwise been
+# automatically generated based on network configuration. This configuration
+# option points to an external file that much contain the WPS Credential
+# attribute(s) as binary data.
+#extra_cred=hostapd.cred
+
+# Credential processing
+#   0 = process received credentials internally (default)
+#   1 = do not process received credentials; just pass them over ctrl_iface to
+#	external program(s)
+#   2 = process received credentials internally and pass them over ctrl_iface
+#	to external program(s)
+# Note: With wps_cred_processing=1, skip_cred_build should be set to 1 and
+# extra_cred be used to provide the Credential data for Enrollees.
+#
+# wps_cred_processing=1 will disabled automatic updates of hostapd.conf file
+# both for Credential processing and for marking AP Setup Locked based on
+# validation failures of AP PIN. An external program is responsible on updating
+# the configuration appropriately in this case.
+#wps_cred_processing=0
+
+# AP Settings Attributes for M7
+# By default, hostapd generates the AP Settings Attributes for M7 based on the
+# current configuration. It is possible to override this by providing a file
+# with pre-configured attributes. This is similar to extra_cred file format,
+# but the AP Settings attributes are not encapsulated in a Credential
+# attribute.
+#ap_settings=hostapd.ap_settings
+
+# WPS UPnP interface
+# If set, support for external Registrars is enabled.
+#upnp_iface=br0
+
+# Friendly Name (required for UPnP)
+# Short description for end use. Should be less than 64 characters.
+#friendly_name=WPS Access Point
+
+# Manufacturer URL (optional for UPnP)
+#manufacturer_url=http://www.example.com/
+
+# Model Description (recommended for UPnP)
+# Long description for end user. Should be less than 128 characters.
+#model_description=Wireless Access Point
+
+# Model URL (optional for UPnP)
+#model_url=http://www.example.com/model/
+
+# Universal Product Code (optional for UPnP)
+# 12-digit, all-numeric code that identifies the consumer package.
+#upc=123456789012
+
+# WPS RF Bands (a = 5G, b = 2.4G, g = 2.4G, ag = dual band)
+# This value should be set according to RF band(s) supported by the AP if
+# hw_mode is not set. For dual band dual concurrent devices, this needs to be
+# set to ag to allow both RF bands to be advertized.
+#wps_rf_bands=ag
+
+# NFC password token for WPS
+# These parameters can be used to configure a fixed NFC password token for the
+# AP. This can be generated, e.g., with nfc_pw_token from wpa_supplicant. When
+# these parameters are used, the AP is assumed to be deployed with a NFC tag
+# that includes the matching NFC password token (e.g., written based on the
+# NDEF record from nfc_pw_token).
+#
+#wps_nfc_dev_pw_id: Device Password ID (16..65535)
+#wps_nfc_dh_pubkey: Hexdump of DH Public Key
+#wps_nfc_dh_privkey: Hexdump of DH Private Key
+#wps_nfc_dev_pw: Hexdump of Device Password
+
+##### Wi-Fi Direct (P2P) ######################################################
+
+# Enable P2P Device management
+#manage_p2p=1
+
+# Allow cross connection
+#allow_cross_connection=1
+
+#### TDLS (IEEE 802.11z-2010) #################################################
+
+# Prohibit use of TDLS in this BSS
+#tdls_prohibit=1
+
+# Prohibit use of TDLS Channel Switching in this BSS
+#tdls_prohibit_chan_switch=1
+
+##### IEEE 802.11v-2011 #######################################################
+
+# Time advertisement
+# 0 = disabled (default)
+# 2 = UTC time at which the TSF timer is 0
+#time_advertisement=2
+
+# Local time zone as specified in 8.3 of IEEE Std 1003.1-2004:
+# stdoffset[dst[offset][,start[/time],end[/time]]]
+#time_zone=EST5
+
+# WNM-Sleep Mode (extended sleep mode for stations)
+# 0 = disabled (default)
+# 1 = enabled (allow stations to use WNM-Sleep Mode)
+#wnm_sleep_mode=1
+
+# BSS Transition Management
+# 0 = disabled (default)
+# 1 = enabled
+#bss_transition=1
+
+##### IEEE 802.11u-2011 #######################################################
+
+# Enable Interworking service
+#interworking=1
+
+# Access Network Type
+# 0 = Private network
+# 1 = Private network with guest access
+# 2 = Chargeable public network
+# 3 = Free public network
+# 4 = Personal device network
+# 5 = Emergency services only network
+# 14 = Test or experimental
+# 15 = Wildcard
+#access_network_type=0
+
+# Whether the network provides connectivity to the Internet
+# 0 = Unspecified
+# 1 = Network provides connectivity to the Internet
+#internet=1
+
+# Additional Step Required for Access
+# Note: This is only used with open network, i.e., ASRA shall ne set to 0 if
+# RSN is used.
+#asra=0
+
+# Emergency services reachable
+#esr=0
+
+# Unauthenticated emergency service accessible
+#uesa=0
+
+# Venue Info (optional)
+# The available values are defined in IEEE Std 802.11u-2011, 7.3.1.34.
+# Example values (group,type):
+# 0,0 = Unspecified
+# 1,7 = Convention Center
+# 1,13 = Coffee Shop
+# 2,0 = Unspecified Business
+# 7,1  Private Residence
+#venue_group=7
+#venue_type=1
+
+# Homogeneous ESS identifier (optional; dot11HESSID)
+# If set, this shall be identifical to one of the BSSIDs in the homogeneous
+# ESS and this shall be set to the same value across all BSSs in homogeneous
+# ESS.
+#hessid=02:03:04:05:06:07
+
+# Roaming Consortium List
+# Arbitrary number of Roaming Consortium OIs can be configured with each line
+# adding a new OI to the list. The first three entries are available through
+# Beacon and Probe Response frames. Any additional entry will be available only
+# through ANQP queries. Each OI is between 3 and 15 octets and is configured as
+# a hexstring.
+#roaming_consortium=021122
+#roaming_consortium=2233445566
+
+# Venue Name information
+# This parameter can be used to configure one or more Venue Name Duples for
+# Venue Name ANQP information. Each entry has a two or three character language
+# code (ISO-639) separated by colon from the venue name string.
+# Note that venue_group and venue_type have to be set for Venue Name
+# information to be complete.
+#venue_name=eng:Example venue
+#venue_name=fin:Esimerkkipaikka
+# Alternative format for language:value strings:
+# (double quoted string, printf-escaped string)
+#venue_name=P"eng:Example\nvenue"
+
+# Network Authentication Type
+# This parameter indicates what type of network authentication is used in the
+# network.
+# format: <network auth type indicator (1-octet hex str)> [redirect URL]
+# Network Authentication Type Indicator values:
+# 00 = Acceptance of terms and conditions
+# 01 = On-line enrollment supported
+# 02 = http/https redirection
+# 03 = DNS redirection
+#network_auth_type=00
+#network_auth_type=02http://www.example.com/redirect/me/here/
+
+# IP Address Type Availability
+# format: <1-octet encoded value as hex str>
+# (ipv4_type & 0x3f) << 2 | (ipv6_type & 0x3)
+# ipv4_type:
+# 0 = Address type not available
+# 1 = Public IPv4 address available
+# 2 = Port-restricted IPv4 address available
+# 3 = Single NATed private IPv4 address available
+# 4 = Double NATed private IPv4 address available
+# 5 = Port-restricted IPv4 address and single NATed IPv4 address available
+# 6 = Port-restricted IPv4 address and double NATed IPv4 address available
+# 7 = Availability of the address type is not known
+# ipv6_type:
+# 0 = Address type not available
+# 1 = Address type available
+# 2 = Availability of the address type not known
+#ipaddr_type_availability=14
+
+# Domain Name
+# format: <variable-octet str>[,<variable-octet str>]
+#domain_name=example.com,another.example.com,yet-another.example.com
+
+# 3GPP Cellular Network information
+# format: <MCC1,MNC1>[;<MCC2,MNC2>][;...]
+#anqp_3gpp_cell_net=244,91;310,026;234,56
+
+# NAI Realm information
+# One or more realm can be advertised. Each nai_realm line adds a new realm to
+# the set. These parameters provide information for stations using Interworking
+# network selection to allow automatic connection to a network based on
+# credentials.
+# format: <encoding>,<NAI Realm(s)>[,<EAP Method 1>][,<EAP Method 2>][,...]
+# encoding:
+#	0 = Realm formatted in accordance with IETF RFC 4282
+#	1 = UTF-8 formatted character string that is not formatted in
+#	    accordance with IETF RFC 4282
+# NAI Realm(s): Semi-colon delimited NAI Realm(s)
+# EAP Method: <EAP Method>[:<[AuthParam1:Val1]>][<[AuthParam2:Val2]>][...]
+# AuthParam (Table 8-188 in IEEE Std 802.11-2012):
+# ID 2 = Non-EAP Inner Authentication Type
+#	1 = PAP, 2 = CHAP, 3 = MSCHAP, 4 = MSCHAPV2
+# ID 3 = Inner authentication EAP Method Type
+# ID 5 = Credential Type
+#	1 = SIM, 2 = USIM, 3 = NFC Secure Element, 4 = Hardware Token,
+#	5 = Softoken, 6 = Certificate, 7 = username/password, 9 = Anonymous,
+#	10 = Vendor Specific
+#nai_realm=0,example.com;example.net
+# EAP methods EAP-TLS with certificate and EAP-TTLS/MSCHAPv2 with
+# username/password
+#nai_realm=0,example.org,13[5:6],21[2:4][5:7]
+
+# QoS Map Set configuration
+#
+# Comma delimited QoS Map Set in decimal values
+# (see IEEE Std 802.11-2012, 8.4.2.97)
+#
+# format:
+# [<DSCP Exceptions[DSCP,UP]>,]<UP 0 range[low,high]>,...<UP 7 range[low,high]>
+#
+# There can be up to 21 optional DSCP Exceptions which are pairs of DSCP Value
+# (0..63 or 255) and User Priority (0..7). This is followed by eight DSCP Range
+# descriptions with DSCP Low Value and DSCP High Value pairs (0..63 or 255) for
+# each UP starting from 0. If both low and high value are set to 255, the
+# corresponding UP is not used.
+#
+# default: not set
+#qos_map_set=53,2,22,6,8,15,0,7,255,255,16,31,32,39,255,255,40,47,255,255
+
+##### Hotspot 2.0 #############################################################
+
+# Enable Hotspot 2.0 support
+#hs20=1
+
+# Disable Downstream Group-Addressed Forwarding (DGAF)
+# This can be used to configure a network where no group-addressed frames are
+# allowed. The AP will not forward any group-address frames to the stations and
+# random GTKs are issued for each station to prevent associated stations from
+# forging such frames to other stations in the BSS.
+#disable_dgaf=1
+
+# Operator Friendly Name
+# This parameter can be used to configure one or more Operator Friendly Name
+# Duples. Each entry has a two or three character language code (ISO-639)
+# separated by colon from the operator friendly name string.
+#hs20_oper_friendly_name=eng:Example operator
+#hs20_oper_friendly_name=fin:Esimerkkioperaattori
+
+# Connection Capability
+# This can be used to advertise what type of IP traffic can be sent through the
+# hotspot (e.g., due to firewall allowing/blocking protocols/ports).
+# format: <IP Protocol>:<Port Number>:<Status>
+# IP Protocol: 1 = ICMP, 6 = TCP, 17 = UDP
+# Port Number: 0..65535
+# Status: 0 = Closed, 1 = Open, 2 = Unknown
+# Each hs20_conn_capab line is added to the list of advertised tuples.
+#hs20_conn_capab=1:0:2
+#hs20_conn_capab=6:22:1
+#hs20_conn_capab=17:5060:0
+
+# WAN Metrics
+# format: <WAN Info>:<DL Speed>:<UL Speed>:<DL Load>:<UL Load>:<LMD>
+# WAN Info: B0-B1: Link Status, B2: Symmetric Link, B3: At Capabity
+#    (encoded as two hex digits)
+#    Link Status: 1 = Link up, 2 = Link down, 3 = Link in test state
+# Downlink Speed: Estimate of WAN backhaul link current downlink speed in kbps;
+#	1..4294967295; 0 = unknown
+# Uplink Speed: Estimate of WAN backhaul link current uplink speed in kbps
+#	1..4294967295; 0 = unknown
+# Downlink Load: Current load of downlink WAN connection (scaled to 255 = 100%)
+# Uplink Load: Current load of uplink WAN connection (scaled to 255 = 100%)
+# Load Measurement Duration: Duration for measuring downlink/uplink load in
+# tenths of a second (1..65535); 0 if load cannot be determined
+#hs20_wan_metrics=01:8000:1000:80:240:3000
+
+# Operating Class Indication
+# List of operating classes the BSSes in this ESS use. The Global operating
+# classes in Table E-4 of IEEE Std 802.11-2012 Annex E define the values that
+# can be used in this.
+# format: hexdump of operating class octets
+# for example, operating classes 81 (2.4 GHz channels 1-13) and 115 (5 GHz
+# channels 36-48):
+#hs20_operating_class=5173
+
+##### TESTING OPTIONS #########################################################
+#
+# The options in this section are only available when the build configuration
+# option CONFIG_TESTING_OPTIONS is set while compiling hostapd. They allow
+# testing some scenarios that are otherwise difficult to reproduce.
+#
+# Ignore probe requests sent to hostapd with the given probability, must be a
+# floating point number in the range [0, 1).
+#ignore_probe_probability=0.0
+#
+# Ignore authentication frames with the given probability
+#ignore_auth_probability=0.0
+#
+# Ignore association requests with the given probability
+#ignore_assoc_probability=0.0
+#
+# Ignore reassociation requests with the given probability
+#ignore_reassoc_probability=0.0
+#
+# Corrupt Key MIC in GTK rekey EAPOL-Key frames with the given probability
+#corrupt_gtk_rekey_mic_probability=0.0
+
+##### Multiple BSSID support ##################################################
+#
+# Above configuration is using the default interface (wlan#, or multi-SSID VLAN
+# interfaces). Other BSSIDs can be added by using separator 'bss' with
+# default interface name to be allocated for the data packets of the new BSS.
+#
+# hostapd will generate BSSID mask based on the BSSIDs that are
+# configured. hostapd will verify that dev_addr & MASK == dev_addr. If this is
+# not the case, the MAC address of the radio must be changed before starting
+# hostapd (ifconfig wlan0 hw ether <MAC addr>). If a BSSID is configured for
+# every secondary BSS, this limitation is not applied at hostapd and other
+# masks may be used if the driver supports them (e.g., swap the locally
+# administered bit)
+#
+# BSSIDs are assigned in order to each BSS, unless an explicit BSSID is
+# specified using the 'bssid' parameter.
+# If an explicit BSSID is specified, it must be chosen such that it:
+# - results in a valid MASK that covers it and the dev_addr
+# - is not the same as the MAC address of the radio
+# - is not the same as any other explicitly specified BSSID
+#
+# Please note that hostapd uses some of the values configured for the first BSS
+# as the defaults for the following BSSes. However, it is recommended that all
+# BSSes include explicit configuration of all relevant configuration items.
+#
+#bss=wlan0_0
+#ssid=test2
+# most of the above items can be used here (apart from radio interface specific
+# items, like channel)
+
+#bss=wlan0_1
+#bssid=00:13:10:95:fe:0b
+# ...
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.TKIP.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.TKIP.template
new file mode 100644
index 0000000000000..4cf2334e9adea
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.TKIP.template
@@ -0,0 +1,1665 @@
+##### hostapd configuration file ##############################################
+# Empty lines and lines starting with # are ignored
+
+# AP netdevice name (without 'ap' postfix, i.e., wlan0 uses wlan0ap for
+# management frames); ath0 for madwifi
+interface=HOSTAPD_IF
+
+# In case of madwifi, atheros, and nl80211 driver interfaces, an additional
+# configuration parameter, bridge, may be used to notify hostapd if the
+# interface is included in a bridge. This parameter is not used with Host AP
+# driver. If the bridge parameter is not set, the drivers will automatically
+# figure out the bridge interface (assuming sysfs is enabled and mounted to
+# /sys) and this parameter may not be needed.
+#
+# For nl80211, this parameter can be used to request the AP interface to be
+# added to the bridge automatically (brctl may refuse to do this before hostapd
+# has been started to change the interface mode). If needed, the bridge
+# interface is also created.
+#bridge=br0
+
+# Driver interface type (hostap/wired/madwifi/test/none/nl80211/bsd);
+# default: hostap). nl80211 is used with all Linux mac80211 drivers.
+# Use driver=none if building hostapd as a standalone RADIUS server that does
+# not control any wireless/wired driver.
+# driver=hostap
+
+# hostapd event logger configuration
+#
+# Two output method: syslog and stdout (only usable if not forking to
+# background).
+#
+# Module bitfield (ORed bitfield of modules that will be logged; -1 = all
+# modules):
+# bit 0 (1) = IEEE 802.11
+# bit 1 (2) = IEEE 802.1X
+# bit 2 (4) = RADIUS
+# bit 3 (8) = WPA
+# bit 4 (16) = driver interface
+# bit 5 (32) = IAPP
+# bit 6 (64) = MLME
+#
+# Levels (minimum value for logged events):
+#  0 = verbose debugging
+#  1 = debugging
+#  2 = informational messages
+#  3 = notification
+#  4 = warning
+#
+logger_syslog=1
+logger_syslog_level=0
+logger_stdout=1
+logger_stdout_level=0
+
+# Interface for separate control program. If this is specified, hostapd
+# will create this directory and a UNIX domain socket for listening to requests
+# from external programs (CLI/GUI, etc.) for status information and
+# configuration. The socket file will be named based on the interface name, so
+# multiple hostapd processes/interfaces can be run at the same time if more
+# than one interface is used.
+# /var/run/hostapd is the recommended directory for sockets and by default,
+# hostapd_cli will use it when trying to connect with hostapd.
+ctrl_interface=/var/run/hostapd
+
+# Access control for the control interface can be configured by setting the
+# directory to allow only members of a group to use sockets. This way, it is
+# possible to run hostapd as root (since it needs to change network
+# configuration and open raw sockets) and still allow GUI/CLI components to be
+# run as non-root users. However, since the control interface can be used to
+# change the network configuration, this access needs to be protected in many
+# cases. By default, hostapd is configured to use gid 0 (root). If you
+# want to allow non-root users to use the contron interface, add a new group
+# and change this value to match with that group. Add users that should have
+# control interface access to this group.
+#
+# This variable can be a group name or gid.
+#ctrl_interface_group=wheel
+ctrl_interface_group=0
+
+
+##### IEEE 802.11 related configuration #######################################
+
+# SSID to be used in IEEE 802.11 management frames
+ssid=TestAP_TKIP
+# Alternative formats for configuring SSID
+# (double quoted string, hexdump, printf-escaped string)
+#ssid2="test"
+#ssid2=74657374
+#ssid2=P"hello\nthere"
+
+# UTF-8 SSID: Whether the SSID is to be interpreted using UTF-8 encoding
+#utf8_ssid=1
+
+# Country code (ISO/IEC 3166-1). Used to set regulatory domain.
+# Set as needed to indicate country in which device is operating.
+# This can limit available channels and transmit power.
+#country_code=US
+
+# Enable IEEE 802.11d. This advertises the country_code and the set of allowed
+# channels and transmit power levels based on the regulatory limits. The
+# country_code setting must be configured with the correct country for
+# IEEE 802.11d functions.
+# (default: 0 = disabled)
+#ieee80211d=1
+
+# Enable IEEE 802.11h. This enables radar detection and DFS support if
+# available. DFS support is required on outdoor 5 GHz channels in most countries
+# of the world. This can be used only with ieee80211d=1.
+# (default: 0 = disabled)
+#ieee80211h=1
+
+# Operation mode (a = IEEE 802.11a, b = IEEE 802.11b, g = IEEE 802.11g,
+# ad = IEEE 802.11ad (60 GHz); a/g options are used with IEEE 802.11n, too, to
+# specify band)
+# Default: IEEE 802.11b
+hw_mode=g
+
+# Channel number (IEEE 802.11)
+# (default: 0, i.e., not set)
+# Please note that some drivers do not use this value from hostapd and the
+# channel will need to be configured separately with iwconfig.
+#
+# If CONFIG_ACS build option is enabled, the channel can be selected
+# automatically at run time by setting channel=acs_survey or channel=0, both of
+# which will enable the ACS survey based algorithm.
+channel=6
+
+# ACS tuning - Automatic Channel Selection
+# See: http://wireless.kernel.org/en/users/Documentation/acs
+#
+# You can customize the ACS survey algorithm with following variables:
+#
+# acs_num_scans requirement is 1..100 - number of scans to be performed that
+# are used to trigger survey data gathering of an underlying device driver.
+# Scans are passive and typically take a little over 100ms (depending on the
+# driver) on each available channel for given hw_mode. Increasing this value
+# means sacrificing startup time and gathering more data wrt channel
+# interference that may help choosing a better channel. This can also help fine
+# tune the ACS scan time in case a driver has different scan dwell times.
+#
+# Defaults:
+#acs_num_scans=5
+
+# Beacon interval in kus (1.024 ms) (default: 100; range 15..65535)
+beacon_int=100
+
+# DTIM (delivery traffic information message) period (range 1..255):
+# number of beacons between DTIMs (1 = every beacon includes DTIM element)
+# (default: 2)
+dtim_period=2
+
+# Maximum number of stations allowed in station table. New stations will be
+# rejected after the station table is full. IEEE 802.11 has a limit of 2007
+# different association IDs, so this number should not be larger than that.
+# (default: 2007)
+max_num_sta=255
+
+# RTS/CTS threshold; 2347 = disabled (default); range 0..2347
+# If this field is not included in hostapd.conf, hostapd will not control
+# RTS threshold and 'iwconfig wlan# rts <val>' can be used to set it.
+rts_threshold=2347
+
+# Fragmentation threshold; 2346 = disabled (default); range 256..2346
+# If this field is not included in hostapd.conf, hostapd will not control
+# fragmentation threshold and 'iwconfig wlan# frag <val>' can be used to set
+# it.
+fragm_threshold=2346
+
+# Rate configuration
+# Default is to enable all rates supported by the hardware. This configuration
+# item allows this list be filtered so that only the listed rates will be left
+# in the list. If the list is empty, all rates are used. This list can have
+# entries that are not in the list of rates the hardware supports (such entries
+# are ignored). The entries in this list are in 100 kbps, i.e., 11 Mbps = 110.
+# If this item is present, at least one rate have to be matching with the rates
+# hardware supports.
+# default: use the most common supported rate setting for the selected
+# hw_mode (i.e., this line can be removed from configuration file in most
+# cases)
+#supported_rates=10 20 55 110 60 90 120 180 240 360 480 540
+
+# Basic rate set configuration
+# List of rates (in 100 kbps) that are included in the basic rate set.
+# If this item is not included, usually reasonable default set is used.
+#basic_rates=10 20
+#basic_rates=10 20 55 110
+#basic_rates=60 120 240
+
+# Short Preamble
+# This parameter can be used to enable optional use of short preamble for
+# frames sent at 2 Mbps, 5.5 Mbps, and 11 Mbps to improve network performance.
+# This applies only to IEEE 802.11b-compatible networks and this should only be
+# enabled if the local hardware supports use of short preamble. If any of the
+# associated STAs do not support short preamble, use of short preamble will be
+# disabled (and enabled when such STAs disassociate) dynamically.
+# 0 = do not allow use of short preamble (default)
+# 1 = allow use of short preamble
+#preamble=1
+
+# Station MAC address -based authentication
+# Please note that this kind of access control requires a driver that uses
+# hostapd to take care of management frame processing and as such, this can be
+# used with driver=hostap or driver=nl80211, but not with driver=madwifi.
+# 0 = accept unless in deny list
+# 1 = deny unless in accept list
+# 2 = use external RADIUS server (accept/deny lists are searched first)
+macaddr_acl=0
+
+# Accept/deny lists are read from separate files (containing list of
+# MAC addresses, one per line). Use absolute path name to make sure that the
+# files can be read on SIGHUP configuration reloads.
+#accept_mac_file=/etc/hostapd.accept
+#deny_mac_file=/etc/hostapd.deny
+
+# IEEE 802.11 specifies two authentication algorithms. hostapd can be
+# configured to allow both of these or only one. Open system authentication
+# should be used with IEEE 802.1X.
+# Bit fields of allowed authentication algorithms:
+# bit 0 = Open System Authentication
+# bit 1 = Shared Key Authentication (requires WEP)
+auth_algs=3
+
+# Send empty SSID in beacons and ignore probe request frames that do not
+# specify full SSID, i.e., require stations to know SSID.
+# default: disabled (0)
+# 1 = send empty (length=0) SSID in beacon and ignore probe request for
+#     broadcast SSID
+# 2 = clear SSID (ASCII 0), but keep the original length (this may be required
+#     with some clients that do not support empty SSID) and ignore probe
+#     requests for broadcast SSID
+ignore_broadcast_ssid=0
+
+# Additional vendor specfic elements for Beacon and Probe Response frames
+# This parameter can be used to add additional vendor specific element(s) into
+# the end of the Beacon and Probe Response frames. The format for these
+# element(s) is a hexdump of the raw information elements (id+len+payload for
+# one or more elements)
+#vendor_elements=dd0411223301
+
+# TX queue parameters (EDCF / bursting)
+# tx_queue_<queue name>_<param>
+# queues: data0, data1, data2, data3, after_beacon, beacon
+#		(data0 is the highest priority queue)
+# parameters:
+#   aifs: AIFS (default 2)
+#   cwmin: cwMin (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023)
+#   cwmax: cwMax (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023); cwMax >= cwMin
+#   burst: maximum length (in milliseconds with precision of up to 0.1 ms) for
+#          bursting
+#
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# These parameters are used by the access point when transmitting frames
+# to the clients.
+#
+# Low priority / AC_BK = background
+#tx_queue_data3_aifs=7
+#tx_queue_data3_cwmin=15
+#tx_queue_data3_cwmax=1023
+#tx_queue_data3_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=1023 burst=0
+#
+# Normal priority / AC_BE = best effort
+#tx_queue_data2_aifs=3
+#tx_queue_data2_cwmin=15
+#tx_queue_data2_cwmax=63
+#tx_queue_data2_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=127 burst=0
+#
+# High priority / AC_VI = video
+#tx_queue_data1_aifs=1
+#tx_queue_data1_cwmin=7
+#tx_queue_data1_cwmax=15
+#tx_queue_data1_burst=3.0
+# Note: for IEEE 802.11b mode: cWmin=15 cWmax=31 burst=6.0
+#
+# Highest priority / AC_VO = voice
+#tx_queue_data0_aifs=1
+#tx_queue_data0_cwmin=3
+#tx_queue_data0_cwmax=7
+#tx_queue_data0_burst=1.5
+# Note: for IEEE 802.11b mode: cWmin=7 cWmax=15 burst=3.3
+
+# 802.1D Tag (= UP) to AC mappings
+# WMM specifies following mapping of data frames to different ACs. This mapping
+# can be configured using Linux QoS/tc and sch_pktpri.o module.
+# 802.1D Tag	802.1D Designation	Access Category	WMM Designation
+# 1		BK			AC_BK		Background
+# 2		-			AC_BK		Background
+# 0		BE			AC_BE		Best Effort
+# 3		EE			AC_BE		Best Effort
+# 4		CL			AC_VI		Video
+# 5		VI			AC_VI		Video
+# 6		VO			AC_VO		Voice
+# 7		NC			AC_VO		Voice
+# Data frames with no priority information: AC_BE
+# Management frames: AC_VO
+# PS-Poll frames: AC_BE
+
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# for 802.11a or 802.11g networks
+# These parameters are sent to WMM clients when they associate.
+# The parameters will be used by WMM clients for frames transmitted to the
+# access point.
+#
+# note - txop_limit is in units of 32microseconds
+# note - acm is admission control mandatory flag. 0 = admission control not
+# required, 1 = mandatory
+# note - here cwMin and cmMax are in exponent form. the actual cw value used
+# will be (2^n)-1 where n is the value given here
+#
+wmm_enabled=1
+#
+# WMM-PS Unscheduled Automatic Power Save Delivery [U-APSD]
+# Enable this flag if U-APSD supported outside hostapd (eg., Firmware/driver)
+#uapsd_advertisement_enabled=1
+#
+# Low priority / AC_BK = background
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=10
+#
+# Normal priority / AC_BE = best effort
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=7
+#
+# High priority / AC_VI = video
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+# Note: for IEEE 802.11b mode: cWmin=4 cWmax=5 txop_limit=188
+#
+# Highest priority / AC_VO = voice
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
+# Note: for IEEE 802.11b mode: cWmin=3 cWmax=4 burst=102
+
+# Static WEP key configuration
+#
+# The key number to use when transmitting.
+# It must be between 0 and 3, and the corresponding key must be set.
+# default: not set
+#wep_default_key=0
+# The WEP keys to use.
+# A key may be a quoted string or unquoted hexadecimal digits.
+# The key length should be 5, 13, or 16 characters, or 10, 26, or 32
+# digits, depending on whether 40-bit (64-bit), 104-bit (128-bit), or
+# 128-bit (152-bit) WEP is used.
+# Only the default key must be supplied; the others are optional.
+# default: not set
+#wep_key0=123456789a
+#wep_key1="vwxyz"
+#wep_key2=0102030405060708090a0b0c0d
+#wep_key3=".2.4.6.8.0.23"
+
+# Station inactivity limit
+#
+# If a station does not send anything in ap_max_inactivity seconds, an
+# empty data frame is sent to it in order to verify whether it is
+# still in range. If this frame is not ACKed, the station will be
+# disassociated and then deauthenticated. This feature is used to
+# clear station table of old entries when the STAs move out of the
+# range.
+#
+# The station can associate again with the AP if it is still in range;
+# this inactivity poll is just used as a nicer way of verifying
+# inactivity; i.e., client will not report broken connection because
+# disassociation frame is not sent immediately without first polling
+# the STA with a data frame.
+# default: 300 (i.e., 5 minutes)
+#ap_max_inactivity=300
+#
+# The inactivity polling can be disabled to disconnect stations based on
+# inactivity timeout so that idle stations are more likely to be disconnected
+# even if they are still in range of the AP. This can be done by setting
+# skip_inactivity_poll to 1 (default 0).
+#skip_inactivity_poll=0
+
+# Disassociate stations based on excessive transmission failures or other
+# indications of connection loss. This depends on the driver capabilities and
+# may not be available with all drivers.
+#disassoc_low_ack=1
+
+# Maximum allowed Listen Interval (how many Beacon periods STAs are allowed to
+# remain asleep). Default: 65535 (no limit apart from field size)
+#max_listen_interval=100
+
+# WDS (4-address frame) mode with per-station virtual interfaces
+# (only supported with driver=nl80211)
+# This mode allows associated stations to use 4-address frames to allow layer 2
+# bridging to be used.
+#wds_sta=1
+
+# If bridge parameter is set, the WDS STA interface will be added to the same
+# bridge by default. This can be overridden with the wds_bridge parameter to
+# use a separate bridge.
+#wds_bridge=wds-br0
+
+# Start the AP with beaconing disabled by default.
+#start_disabled=0
+
+# Client isolation can be used to prevent low-level bridging of frames between
+# associated stations in the BSS. By default, this bridging is allowed.
+#ap_isolate=1
+
+# Fixed BSS Load value for testing purposes
+# This field can be used to configure hostapd to add a fixed BSS Load element
+# into Beacon and Probe Response frames for testing purposes. The format is
+# <station count>:<channel utilization>:<available admission capacity>
+#bss_load_test=12:80:20000
+
+##### IEEE 802.11n related configuration ######################################
+
+# ieee80211n: Whether IEEE 802.11n (HT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full HT functionality.
+ieee80211n=1
+
+# ht_capab: HT capabilities (list of flags)
+# LDPC coding capability: [LDPC] = supported
+# Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
+#	channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
+#	with secondary channel below the primary channel
+#	(20 MHz only if neither is set)
+#	Note: There are limits on which channels can be used with HT40- and
+#	HT40+. Following table shows the channels that may be available for
+#	HT40- and HT40+ use per IEEE 802.11n Annex J:
+#	freq		HT40-		HT40+
+#	2.4 GHz		5-13		1-7 (1-9 in Europe/Japan)
+#	5 GHz		40,48,56,64	36,44,52,60
+#	(depending on the location, not all of these channels may be available
+#	for use)
+#	Please note that 40 MHz channels may switch their primary and secondary
+#	channels if needed or creation of 40 MHz channel maybe rejected based
+#	on overlapping BSSes. These changes are done automatically when hostapd
+#	is setting up the 40 MHz channel.
+# Spatial Multiplexing (SM) Power Save: [SMPS-STATIC] or [SMPS-DYNAMIC]
+#	(SMPS disabled if neither is set)
+# HT-greenfield: [GF] (disabled if not set)
+# Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
+# Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
+# Tx STBC: [TX-STBC] (disabled if not set)
+# Rx STBC: [RX-STBC1] (one spatial stream), [RX-STBC12] (one or two spatial
+#	streams), or [RX-STBC123] (one, two, or three spatial streams); Rx STBC
+#	disabled if none of these set
+# HT-delayed Block Ack: [DELAYED-BA] (disabled if not set)
+# Maximum A-MSDU length: [MAX-AMSDU-7935] for 7935 octets (3839 octets if not
+#	set)
+# DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
+# PSMP support: [PSMP] (disabled if not set)
+# L-SIG TXOP protection support: [LSIG-TXOP-PROT] (disabled if not set)
+#ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
+ht_capab=[SHORT-GI-20]
+
+# Require stations to support HT PHY (reject association if they do not)
+#require_ht=1
+
+# If set non-zero, require stations to perform scans of overlapping
+# channels to test for stations which would be affected by 40 MHz traffic.
+# This parameter sets the interval in seconds between these scans. This
+# is useful only for testing that stations properly set the OBSS interval,
+# since the other parameters in the OBSS scan parameters IE are set to 0.
+#obss_interval=0
+
+##### IEEE 802.11ac related configuration #####################################
+
+# ieee80211ac: Whether IEEE 802.11ac (VHT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full VHT functionality.
+#ieee80211ac=1
+
+# vht_capab: VHT capabilities (list of flags)
+#
+# vht_max_mpdu_len: [MAX-MPDU-7991] [MAX-MPDU-11454]
+# Indicates maximum MPDU length
+# 0 = 3895 octets (default)
+# 1 = 7991 octets
+# 2 = 11454 octets
+# 3 = reserved
+#
+# supported_chan_width: [VHT160] [VHT160-80PLUS80]
+# Indicates supported Channel widths
+# 0 = 160 MHz & 80+80 channel widths are not supported (default)
+# 1 = 160 MHz channel width is supported
+# 2 = 160 MHz & 80+80 channel widths are supported
+# 3 = reserved
+#
+# Rx LDPC coding capability: [RXLDPC]
+# Indicates support for receiving LDPC coded pkts
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 80 MHz: [SHORT-GI-80]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 80Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 160 MHz: [SHORT-GI-160]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 160Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Tx STBC: [TX-STBC-2BY1]
+# Indicates support for the transmission of at least 2x1 STBC
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Rx STBC: [RX-STBC-1] [RX-STBC-12] [RX-STBC-123] [RX-STBC-1234]
+# Indicates support for the reception of PPDUs using STBC
+# 0 = Not supported (default)
+# 1 = support of one spatial stream
+# 2 = support of one and two spatial streams
+# 3 = support of one, two and three spatial streams
+# 4 = support of one, two, three and four spatial streams
+# 5,6,7 = reserved
+#
+# SU Beamformer Capable: [SU-BEAMFORMER]
+# Indicates support for operation as a single user beamformer
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# SU Beamformee Capable: [SU-BEAMFORMEE]
+# Indicates support for operation as a single user beamformee
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Compressed Steering Number of Beamformer Antennas Supported: [BF-ANTENNA-2]
+#   Beamformee's capability indicating the maximum number of beamformer
+#   antennas the beamformee can support when sending compressed beamforming
+#   feedback
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# Number of Sounding Dimensions: [SOUNDING-DIMENSION-2]
+# Beamformer's capability indicating the maximum value of the NUM_STS parameter
+# in the TXVECTOR of a VHT NDP
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# MU Beamformer Capable: [MU-BEAMFORMER]
+# Indicates support for operation as an MU beamformer
+# 0 = Not supported or sent by Non-AP STA (default)
+# 1 = Supported
+#
+# MU Beamformee Capable: [MU-BEAMFORMEE]
+# Indicates support for operation as an MU beamformee
+# 0 = Not supported or sent by AP (default)
+# 1 = Supported
+#
+# VHT TXOP PS: [VHT-TXOP-PS]
+# Indicates whether or not the AP supports VHT TXOP Power Save Mode
+#  or whether or not the STA is in VHT TXOP Power Save mode
+# 0 = VHT AP doesnt support VHT TXOP PS mode (OR) VHT Sta not in VHT TXOP PS
+#  mode
+# 1 = VHT AP supports VHT TXOP PS mode (OR) VHT Sta is in VHT TXOP power save
+#  mode
+#
+# +HTC-VHT Capable: [HTC-VHT]
+# Indicates whether or not the STA supports receiving a VHT variant HT Control
+# field.
+# 0 = Not supported (default)
+# 1 = supported
+#
+# Maximum A-MPDU Length Exponent: [MAX-A-MPDU-LEN-EXP0]..[MAX-A-MPDU-LEN-EXP7]
+# Indicates the maximum length of A-MPDU pre-EOF padding that the STA can recv
+# This field is an integer in the range of 0 to 7.
+# The length defined by this field is equal to
+# 2 pow(13 + Maximum A-MPDU Length Exponent) -1 octets
+#
+# VHT Link Adaptation Capable: [VHT-LINK-ADAPT2] [VHT-LINK-ADAPT3]
+# Indicates whether or not the STA supports link adaptation using VHT variant
+# HT Control field
+# If +HTC-VHTcapable is 1
+#  0 = (no feedback) if the STA does not provide VHT MFB (default)
+#  1 = reserved
+#  2 = (Unsolicited) if the STA provides only unsolicited VHT MFB
+#  3 = (Both) if the STA can provide VHT MFB in response to VHT MRQ and if the
+#      STA provides unsolicited VHT MFB
+# Reserved if +HTC-VHTcapable is 0
+#
+# Rx Antenna Pattern Consistency: [RX-ANTENNA-PATTERN]
+# Indicates the possibility of Rx antenna pattern change
+# 0 = Rx antenna pattern might change during the lifetime of an association
+# 1 = Rx antenna pattern does not change during the lifetime of an association
+#
+# Tx Antenna Pattern Consistency: [TX-ANTENNA-PATTERN]
+# Indicates the possibility of Tx antenna pattern change
+# 0 = Tx antenna pattern might change during the lifetime of an association
+# 1 = Tx antenna pattern does not change during the lifetime of an association
+#vht_capab=[SHORT-GI-80][HTC-VHT]
+#
+# Require stations to support VHT PHY (reject association if they do not)
+#require_vht=1
+
+# 0 = 20 or 40 MHz operating Channel width
+# 1 = 80 MHz channel width
+# 2 = 160 MHz channel width
+# 3 = 80+80 MHz channel width
+#vht_oper_chwidth=1
+#
+# center freq = 5 GHz + (5 * index)
+# So index 42 gives center freq 5.210 GHz
+# which is channel 42 in 5G band
+#
+#vht_oper_centr_freq_seg0_idx=42
+#
+# center freq = 5 GHz + (5 * index)
+# So index 159 gives center freq 5.795 GHz
+# which is channel 159 in 5G band
+#
+#vht_oper_centr_freq_seg1_idx=159
+
+##### IEEE 802.1X-2004 related configuration ##################################
+
+# Require IEEE 802.1X authorization
+#ieee8021x=1
+
+# IEEE 802.1X/EAPOL version
+# hostapd is implemented based on IEEE Std 802.1X-2004 which defines EAPOL
+# version 2. However, there are many client implementations that do not handle
+# the new version number correctly (they seem to drop the frames completely).
+# In order to make hostapd interoperate with these clients, the version number
+# can be set to the older version (1) with this configuration value.
+#eapol_version=2
+
+# Optional displayable message sent with EAP Request-Identity. The first \0
+# in this string will be converted to ASCII-0 (nul). This can be used to
+# separate network info (comma separated list of attribute=value pairs); see,
+# e.g., RFC 4284.
+#eap_message=hello
+#eap_message=hello\0networkid=netw,nasid=foo,portid=0,NAIRealms=example.com
+
+# WEP rekeying (disabled if key lengths are not set or are set to 0)
+# Key lengths for default/broadcast and individual/unicast keys:
+# 5 = 40-bit WEP (also known as 64-bit WEP with 40 secret bits)
+# 13 = 104-bit WEP (also known as 128-bit WEP with 104 secret bits)
+#wep_key_len_broadcast=5
+#wep_key_len_unicast=5
+# Rekeying period in seconds. 0 = do not rekey (i.e., set keys only once)
+#wep_rekey_period=300
+
+# EAPOL-Key index workaround (set bit7) for WinXP Supplicant (needed only if
+# only broadcast keys are used)
+eapol_key_index_workaround=0
+
+# EAP reauthentication period in seconds (default: 3600 seconds; 0 = disable
+# reauthentication).
+#eap_reauth_period=3600
+
+# Use PAE group address (01:80:c2:00:00:03) instead of individual target
+# address when sending EAPOL frames with driver=wired. This is the most common
+# mechanism used in wired authentication, but it also requires that the port
+# is only used by one station.
+#use_pae_group_addr=1
+
+##### Integrated EAP server ###################################################
+
+# Optionally, hostapd can be configured to use an integrated EAP server
+# to process EAP authentication locally without need for an external RADIUS
+# server. This functionality can be used both as a local authentication server
+# for IEEE 802.1X/EAPOL and as a RADIUS server for other devices.
+
+# Use integrated EAP server instead of external RADIUS authentication
+# server. This is also needed if hostapd is configured to act as a RADIUS
+# authentication server.
+eap_server=0
+
+# Path for EAP server user database
+# If SQLite support is included, this can be set to "sqlite:/path/to/sqlite.db"
+# to use SQLite database instead of a text file.
+#eap_user_file=/etc/hostapd.eap_user
+
+# CA certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#ca_cert=/etc/hostapd.ca.pem
+
+# Server certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#server_cert=/etc/hostapd.server.pem
+
+# Private key matching with the server certificate for EAP-TLS/PEAP/TTLS
+# This may point to the same file as server_cert if both certificate and key
+# are included in a single file. PKCS#12 (PFX) file (.p12/.pfx) can also be
+# used by commenting out server_cert and specifying the PFX file as the
+# private_key.
+#private_key=/etc/hostapd.server.prv
+
+# Passphrase for private key
+#private_key_passwd=secret passphrase
+
+# Server identity
+# EAP methods that provide mechanism for authenticated server identity delivery
+# use this value. If not set, "hostapd" is used as a default.
+#server_id=server.example.com
+
+# Enable CRL verification.
+# Note: hostapd does not yet support CRL downloading based on CDP. Thus, a
+# valid CRL signed by the CA is required to be included in the ca_cert file.
+# This can be done by using PEM format for CA certificate and CRL and
+# concatenating these into one file. Whenever CRL changes, hostapd needs to be
+# restarted to take the new CRL into use.
+# 0 = do not verify CRLs (default)
+# 1 = check the CRL of the user certificate
+# 2 = check all CRLs in the certificate path
+#check_crl=1
+
+# Cached OCSP stapling response (DER encoded)
+# If set, this file is sent as a certificate status response by the EAP server
+# if the EAP peer requests certificate status in the ClientHello message.
+# This cache file can be updated, e.g., by running following command
+# periodically to get an update from the OCSP responder:
+# openssl ocsp \
+#	-no_nonce \
+#	-CAfile /etc/hostapd.ca.pem \
+#	-issuer /etc/hostapd.ca.pem \
+#	-cert /etc/hostapd.server.pem \
+#	-url http://ocsp.example.com:8888/ \
+#	-respout /tmp/ocsp-cache.der
+#ocsp_stapling_response=/tmp/ocsp-cache.der
+
+# dh_file: File path to DH/DSA parameters file (in PEM format)
+# This is an optional configuration file for setting parameters for an
+# ephemeral DH key exchange. In most cases, the default RSA authentication does
+# not use this configuration. However, it is possible setup RSA to use
+# ephemeral DH key exchange. In addition, ciphers with DSA keys always use
+# ephemeral DH keys. This can be used to achieve forward secrecy. If the file
+# is in DSA parameters format, it will be automatically converted into DH
+# params. This parameter is required if anonymous EAP-FAST is used.
+# You can generate DH parameters file with OpenSSL, e.g.,
+# "openssl dhparam -out /etc/hostapd.dh.pem 1024"
+#dh_file=/etc/hostapd.dh.pem
+
+# Fragment size for EAP methods
+#fragment_size=1400
+
+# Finite cyclic group for EAP-pwd. Number maps to group of domain parameters
+# using the IANA repository for IKE (RFC 2409).
+#pwd_group=19
+
+# Configuration data for EAP-SIM database/authentication gateway interface.
+# This is a text string in implementation specific format. The example
+# implementation in eap_sim_db.c uses this as the UNIX domain socket name for
+# the HLR/AuC gateway (e.g., hlr_auc_gw). In this case, the path uses "unix:"
+# prefix. If hostapd is built with SQLite support (CONFIG_SQLITE=y in .config),
+# database file can be described with an optional db=<path> parameter.
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock db=/tmp/hostapd.db
+
+# Encryption key for EAP-FAST PAC-Opaque values. This key must be a secret,
+# random value. It is configured as a 16-octet value in hex format. It can be
+# generated, e.g., with the following command:
+# od -tx1 -v -N16 /dev/random | colrm 1 8 | tr -d ' '
+#pac_opaque_encr_key=000102030405060708090a0b0c0d0e0f
+
+# EAP-FAST authority identity (A-ID)
+# A-ID indicates the identity of the authority that issues PACs. The A-ID
+# should be unique across all issuing servers. In theory, this is a variable
+# length field, but due to some existing implementations requiring A-ID to be
+# 16 octets in length, it is strongly recommended to use that length for the
+# field to provid interoperability with deployed peer implementations. This
+# field is configured in hex format.
+#eap_fast_a_id=101112131415161718191a1b1c1d1e1f
+
+# EAP-FAST authority identifier information (A-ID-Info)
+# This is a user-friendly name for the A-ID. For example, the enterprise name
+# and server name in a human-readable format. This field is encoded as UTF-8.
+#eap_fast_a_id_info=test server
+
+# Enable/disable different EAP-FAST provisioning modes:
+#0 = provisioning disabled
+#1 = only anonymous provisioning allowed
+#2 = only authenticated provisioning allowed
+#3 = both provisioning modes allowed (default)
+#eap_fast_prov=3
+
+# EAP-FAST PAC-Key lifetime in seconds (hard limit)
+#pac_key_lifetime=604800
+
+# EAP-FAST PAC-Key refresh time in seconds (soft limit on remaining hard
+# limit). The server will generate a new PAC-Key when this number of seconds
+# (or fewer) of the lifetime remains.
+#pac_key_refresh_time=86400
+
+# EAP-SIM and EAP-AKA protected success/failure indication using AT_RESULT_IND
+# (default: 0 = disabled).
+#eap_sim_aka_result_ind=1
+
+# Trusted Network Connect (TNC)
+# If enabled, TNC validation will be required before the peer is allowed to
+# connect. Note: This is only used with EAP-TTLS and EAP-FAST. If any other
+# EAP method is enabled, the peer will be allowed to connect without TNC.
+#tnc=1
+
+
+##### IEEE 802.11f - Inter-Access Point Protocol (IAPP) #######################
+
+# Interface to be used for IAPP broadcast packets
+#iapp_interface=eth0
+
+
+##### RADIUS client configuration #############################################
+# for IEEE 802.1X with external Authentication Server, IEEE 802.11
+# authentication with external ACL for MAC addresses, and accounting
+
+# The own IP address of the access point (used as NAS-IP-Address)
+own_ip_addr=127.0.0.1
+
+# Optional NAS-Identifier string for RADIUS messages. When used, this should be
+# a unique to the NAS within the scope of the RADIUS server. For example, a
+# fully qualified domain name can be used here.
+# When using IEEE 802.11r, nas_identifier must be set and must be between 1 and
+# 48 octets long.
+#nas_identifier=ap.example.com
+
+# RADIUS authentication server
+#auth_server_addr=127.0.0.1
+#auth_server_port=1812
+#auth_server_shared_secret=secret
+
+# RADIUS accounting server
+#acct_server_addr=127.0.0.1
+#acct_server_port=1813
+#acct_server_shared_secret=secret
+
+# Secondary RADIUS servers; to be used if primary one does not reply to
+# RADIUS packets. These are optional and there can be more than one secondary
+# server listed.
+#auth_server_addr=127.0.0.2
+#auth_server_port=1812
+#auth_server_shared_secret=secret2
+#
+#acct_server_addr=127.0.0.2
+#acct_server_port=1813
+#acct_server_shared_secret=secret2
+
+# Retry interval for trying to return to the primary RADIUS server (in
+# seconds). RADIUS client code will automatically try to use the next server
+# when the current server is not replying to requests. If this interval is set,
+# primary server will be retried after configured amount of time even if the
+# currently used secondary server is still working.
+#radius_retry_primary_interval=600
+
+
+# Interim accounting update interval
+# If this is set (larger than 0) and acct_server is configured, hostapd will
+# send interim accounting updates every N seconds. Note: if set, this overrides
+# possible Acct-Interim-Interval attribute in Access-Accept message. Thus, this
+# value should not be configured in hostapd.conf, if RADIUS server is used to
+# control the interim interval.
+# This value should not be less 600 (10 minutes) and must not be less than
+# 60 (1 minute).
+#radius_acct_interim_interval=600
+
+# Request Chargeable-User-Identity (RFC 4372)
+# This parameter can be used to configure hostapd to request CUI from the
+# RADIUS server by including Chargeable-User-Identity attribute into
+# Access-Request packets.
+#radius_request_cui=1
+
+# Dynamic VLAN mode; allow RADIUS authentication server to decide which VLAN
+# is used for the stations. This information is parsed from following RADIUS
+# attributes based on RFC 3580 and RFC 2868: Tunnel-Type (value 13 = VLAN),
+# Tunnel-Medium-Type (value 6 = IEEE 802), Tunnel-Private-Group-ID (value
+# VLANID as a string). Optionally, the local MAC ACL list (accept_mac_file) can
+# be used to set static client MAC address to VLAN ID mapping.
+# 0 = disabled (default)
+# 1 = option; use default interface if RADIUS server does not include VLAN ID
+# 2 = required; reject authentication if RADIUS server does not include VLAN ID
+#dynamic_vlan=0
+
+# VLAN interface list for dynamic VLAN mode is read from a separate text file.
+# This list is used to map VLAN ID from the RADIUS server to a network
+# interface. Each station is bound to one interface in the same way as with
+# multiple BSSIDs or SSIDs. Each line in this text file is defining a new
+# interface and the line must include VLAN ID and interface name separated by
+# white space (space or tab).
+# If no entries are provided by this file, the station is statically mapped
+# to <bss-iface>.<vlan-id> interfaces.
+#vlan_file=/etc/hostapd.vlan
+
+# Interface where 802.1q tagged packets should appear when a RADIUS server is
+# used to determine which VLAN a station is on.  hostapd creates a bridge for
+# each VLAN.  Then hostapd adds a VLAN interface (associated with the interface
+# indicated by 'vlan_tagged_interface') and the appropriate wireless interface
+# to the bridge.
+#vlan_tagged_interface=eth0
+
+# Bridge (prefix) to add the wifi and the tagged interface to. This gets the
+# VLAN ID appended. It defaults to brvlan%d if no tagged interface is given
+# and br%s.%d if a tagged interface is given, provided %s = tagged interface
+# and %d = VLAN ID.
+#vlan_bridge=brvlan
+
+# When hostapd creates a VLAN interface on vlan_tagged_interfaces, it needs
+# to know how to name it.
+# 0 = vlan<XXX>, e.g., vlan1
+# 1 = <vlan_tagged_interface>.<XXX>, e.g. eth0.1
+#vlan_naming=0
+
+# Arbitrary RADIUS attributes can be added into Access-Request and
+# Accounting-Request packets by specifying the contents of the attributes with
+# the following configuration parameters. There can be multiple of these to
+# add multiple attributes. These parameters can also be used to override some
+# of the attributes added automatically by hostapd.
+# Format: <attr_id>[:<syntax:value>]
+# attr_id: RADIUS attribute type (e.g., 26 = Vendor-Specific)
+# syntax: s = string (UTF-8), d = integer, x = octet string
+# value: attribute value in format indicated by the syntax
+# If syntax and value parts are omitted, a null value (single 0x00 octet) is
+# used.
+#
+# Additional Access-Request attributes
+# radius_auth_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_auth_req_attr=126:s:Operator
+# Service-Type = Framed (2)
+#radius_auth_req_attr=6:d:2
+# Connect-Info = "testing" (this overrides the automatically generated value)
+#radius_auth_req_attr=77:s:testing
+# Same Connect-Info value set as a hexdump
+#radius_auth_req_attr=77:x:74657374696e67
+
+#
+# Additional Accounting-Request attributes
+# radius_acct_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_acct_req_attr=126:s:Operator
+
+# Dynamic Authorization Extensions (RFC 5176)
+# This mechanism can be used to allow dynamic changes to user session based on
+# commands from a RADIUS server (or some other disconnect client that has the
+# needed session information). For example, Disconnect message can be used to
+# request an associated station to be disconnected.
+#
+# This is disabled by default. Set radius_das_port to non-zero UDP port
+# number to enable.
+#radius_das_port=3799
+#
+# DAS client (the host that can send Disconnect/CoA requests) and shared secret
+#radius_das_client=192.168.1.123 shared secret here
+#
+# DAS Event-Timestamp time window in seconds
+#radius_das_time_window=300
+#
+# DAS require Event-Timestamp
+#radius_das_require_event_timestamp=1
+
+##### RADIUS authentication server configuration ##############################
+
+# hostapd can be used as a RADIUS authentication server for other hosts. This
+# requires that the integrated EAP server is also enabled and both
+# authentication services are sharing the same configuration.
+
+# File name of the RADIUS clients configuration for the RADIUS server. If this
+# commented out, RADIUS server is disabled.
+#radius_server_clients=/etc/hostapd.radius_clients
+
+# The UDP port number for the RADIUS authentication server
+#radius_server_auth_port=1812
+
+# Use IPv6 with RADIUS server (IPv4 will also be supported using IPv6 API)
+#radius_server_ipv6=1
+
+
+##### WPA/IEEE 802.11i configuration ##########################################
+
+# Enable WPA. Setting this variable configures the AP to require WPA (either
+# WPA-PSK or WPA-RADIUS/EAP based on other configuration). For WPA-PSK, either
+# wpa_psk or wpa_passphrase must be set and wpa_key_mgmt must include WPA-PSK.
+# Instead of wpa_psk / wpa_passphrase, wpa_psk_radius might suffice.
+# For WPA-RADIUS/EAP, ieee8021x must be set (but without dynamic WEP keys),
+# RADIUS authentication server must be configured, and WPA-EAP must be included
+# in wpa_key_mgmt.
+# This field is a bit field that can be used to enable WPA (IEEE 802.11i/D3.0)
+# and/or WPA2 (full IEEE 802.11i/RSN):
+# bit0 = WPA
+# bit1 = IEEE 802.11i/RSN (WPA2) (dot11RSNAEnabled)
+wpa=1
+
+# WPA pre-shared keys for WPA-PSK. This can be either entered as a 256-bit
+# secret in hex format (64 hex digits), wpa_psk, or as an ASCII passphrase
+# (8..63 characters) that will be converted to PSK. This conversion uses SSID
+# so the PSK changes when ASCII passphrase is used and the SSID is changed.
+# wpa_psk (dot11RSNAConfigPSKValue)
+# wpa_passphrase (dot11RSNAConfigPSKPassPhrase)
+#wpa_psk=0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef
+wpa_passphrase=aaaaaaaa
+
+# Optionally, WPA PSKs can be read from a separate text file (containing list
+# of (PSK,MAC address) pairs. This allows more than one PSK to be configured.
+# Use absolute path name to make sure that the files can be read on SIGHUP
+# configuration reloads.
+#wpa_psk_file=/etc/hostapd.wpa_psk
+
+# Optionally, WPA passphrase can be received from RADIUS authentication server
+# This requires macaddr_acl to be set to 2 (RADIUS)
+# 0 = disabled (default)
+# 1 = optional; use default passphrase/psk if RADIUS server does not include
+#	Tunnel-Password
+# 2 = required; reject authentication if RADIUS server does not include
+#	Tunnel-Password
+#wpa_psk_radius=0
+
+# Set of accepted key management algorithms (WPA-PSK, WPA-EAP, or both). The
+# entries are separated with a space. WPA-PSK-SHA256 and WPA-EAP-SHA256 can be
+# added to enable SHA256-based stronger algorithms.
+# (dot11RSNAConfigAuthenticationSuitesTable)
+#wpa_key_mgmt=WPA-PSK WPA-EAP
+
+# Set of accepted cipher suites (encryption algorithms) for pairwise keys
+# (unicast packets). This is a space separated list of algorithms:
+# CCMP = AES in Counter mode with CBC-MAC [RFC 3610, IEEE 802.11i/D7.0]
+# TKIP = Temporal Key Integrity Protocol [IEEE 802.11i/D7.0]
+# Group cipher suite (encryption algorithm for broadcast and multicast frames)
+# is automatically selected based on this configuration. If only CCMP is
+# allowed as the pairwise cipher, group cipher will also be CCMP. Otherwise,
+# TKIP will be used as the group cipher.
+# (dot11RSNAConfigPairwiseCiphersTable)
+# Pairwise cipher for WPA (v1) (default: TKIP)
+#wpa_pairwise=TKIP CCMP
+wpa_pairwise=TKIP
+# Pairwise cipher for RSN/WPA2 (default: use wpa_pairwise value)
+#rsn_pairwise=CCMP
+
+# Time interval for rekeying GTK (broadcast/multicast encryption keys) in
+# seconds. (dot11RSNAConfigGroupRekeyTime)
+wpa_group_rekey=600
+
+# Rekey GTK when any STA that possesses the current GTK is leaving the BSS.
+# (dot11RSNAConfigGroupRekeyStrict)
+#wpa_strict_rekey=1
+
+# Time interval for rekeying GMK (master key used internally to generate GTKs
+# (in seconds).
+#wpa_gmk_rekey=86400
+
+# Maximum lifetime for PTK in seconds. This can be used to enforce rekeying of
+# PTK to mitigate some attacks against TKIP deficiencies.
+#wpa_ptk_rekey=600
+
+# Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up
+# roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN
+# authentication and key handshake before actually associating with a new AP.
+# (dot11RSNAPreauthenticationEnabled)
+#rsn_preauth=1
+#
+# Space separated list of interfaces from which pre-authentication frames are
+# accepted (e.g., 'eth0' or 'eth0 wlan0wds0'. This list should include all
+# interface that are used for connections to other APs. This could include
+# wired interfaces and WDS links. The normal wireless data interface towards
+# associated stations (e.g., wlan0) should not be added, since
+# pre-authentication is only used with APs other than the currently associated
+# one.
+#rsn_preauth_interfaces=eth0
+
+# peerkey: Whether PeerKey negotiation for direct links (IEEE 802.11e) is
+# allowed. This is only used with RSN/WPA2.
+# 0 = disabled (default)
+# 1 = enabled
+#peerkey=1
+
+# ieee80211w: Whether management frame protection (MFP) is enabled
+# 0 = disabled (default)
+# 1 = optional
+# 2 = required
+#ieee80211w=0
+
+# Association SA Query maximum timeout (in TU = 1.024 ms; for MFP)
+# (maximum time to wait for a SA Query response)
+# dot11AssociationSAQueryMaximumTimeout, 1...4294967295
+#assoc_sa_query_max_timeout=1000
+
+# Association SA Query retry timeout (in TU = 1.024 ms; for MFP)
+# (time between two subsequent SA Query requests)
+# dot11AssociationSAQueryRetryTimeout, 1...4294967295
+#assoc_sa_query_retry_timeout=201
+
+# disable_pmksa_caching: Disable PMKSA caching
+# This parameter can be used to disable caching of PMKSA created through EAP
+# authentication. RSN preauthentication may still end up using PMKSA caching if
+# it is enabled (rsn_preauth=1).
+# 0 = PMKSA caching enabled (default)
+# 1 = PMKSA caching disabled
+#disable_pmksa_caching=0
+
+# okc: Opportunistic Key Caching (aka Proactive Key Caching)
+# Allow PMK cache to be shared opportunistically among configured interfaces
+# and BSSes (i.e., all configurations within a single hostapd process).
+# 0 = disabled (default)
+# 1 = enabled
+#okc=1
+
+# SAE threshold for anti-clogging mechanism (dot11RSNASAEAntiCloggingThreshold)
+# This parameter defines how many open SAE instances can be in progress at the
+# same time before the anti-clogging mechanism is taken into use.
+#sae_anti_clogging_threshold=5
+
+# Enabled SAE finite cyclic groups
+# SAE implementation are required to support group 19 (ECC group defined over a
+# 256-bit prime order field). All groups that are supported by the
+# implementation are enabled by default. This configuration parameter can be
+# used to specify a limited set of allowed groups. The group values are listed
+# in the IANA registry:
+# http://www.iana.org/assignments/ipsec-registry/ipsec-registry.xml#ipsec-registry-9
+#sae_groups=19 20 21 25 26
+
+##### IEEE 802.11r configuration ##############################################
+
+# Mobility Domain identifier (dot11FTMobilityDomainID, MDID)
+# MDID is used to indicate a group of APs (within an ESS, i.e., sharing the
+# same SSID) between which a STA can use Fast BSS Transition.
+# 2-octet identifier as a hex string.
+#mobility_domain=a1b2
+
+# PMK-R0 Key Holder identifier (dot11FTR0KeyHolderID)
+# 1 to 48 octet identifier.
+# This is configured with nas_identifier (see RADIUS client section above).
+
+# Default lifetime of the PMK-RO in minutes; range 1..65535
+# (dot11FTR0KeyLifetime)
+#r0_key_lifetime=10000
+
+# PMK-R1 Key Holder identifier (dot11FTR1KeyHolderID)
+# 6-octet identifier as a hex string.
+#r1_key_holder=000102030405
+
+# Reassociation deadline in time units (TUs / 1.024 ms; range 1000..65535)
+# (dot11FTReassociationDeadline)
+#reassociation_deadline=1000
+
+# List of R0KHs in the same Mobility Domain
+# format: <MAC address> <NAS Identifier> <128-bit key as hex string>
+# This list is used to map R0KH-ID (NAS Identifier) to a destination MAC
+# address when requesting PMK-R1 key from the R0KH that the STA used during the
+# Initial Mobility Domain Association.
+#r0kh=02:01:02:03:04:05 r0kh-1.example.com 000102030405060708090a0b0c0d0e0f
+#r0kh=02:01:02:03:04:06 r0kh-2.example.com 00112233445566778899aabbccddeeff
+# And so on.. One line per R0KH.
+
+# List of R1KHs in the same Mobility Domain
+# format: <MAC address> <R1KH-ID> <128-bit key as hex string>
+# This list is used to map R1KH-ID to a destination MAC address when sending
+# PMK-R1 key from the R0KH. This is also the list of authorized R1KHs in the MD
+# that can request PMK-R1 keys.
+#r1kh=02:01:02:03:04:05 02:11:22:33:44:55 000102030405060708090a0b0c0d0e0f
+#r1kh=02:01:02:03:04:06 02:11:22:33:44:66 00112233445566778899aabbccddeeff
+# And so on.. One line per R1KH.
+
+# Whether PMK-R1 push is enabled at R0KH
+# 0 = do not push PMK-R1 to all configured R1KHs (default)
+# 1 = push PMK-R1 to all configured R1KHs whenever a new PMK-R0 is derived
+#pmk_r1_push=1
+
+##### Neighbor table ##########################################################
+# Maximum number of entries kept in AP table (either for neigbor table or for
+# detecting Overlapping Legacy BSS Condition). The oldest entry will be
+# removed when adding a new entry that would make the list grow over this
+# limit. Note! WFA certification for IEEE 802.11g requires that OLBC is
+# enabled, so this field should not be set to 0 when using IEEE 802.11g.
+# default: 255
+#ap_table_max_size=255
+
+# Number of seconds of no frames received after which entries may be deleted
+# from the AP table. Since passive scanning is not usually performed frequently
+# this should not be set to very small value. In addition, there is no
+# guarantee that every scan cycle will receive beacon frames from the
+# neighboring APs.
+# default: 60
+#ap_table_expiration_time=3600
+
+
+##### Wi-Fi Protected Setup (WPS) #############################################
+
+# WPS state
+# 0 = WPS disabled (default)
+# 1 = WPS enabled, not configured
+# 2 = WPS enabled, configured
+#wps_state=2
+
+# Whether to manage this interface independently from other WPS interfaces
+# By default, a single hostapd process applies WPS operations to all configured
+# interfaces. This parameter can be used to disable that behavior for a subset
+# of interfaces. If this is set to non-zero for an interface, WPS commands
+# issued on that interface do not apply to other interfaces and WPS operations
+# performed on other interfaces do not affect this interface.
+#wps_independent=0
+
+# AP can be configured into a locked state where new WPS Registrar are not
+# accepted, but previously authorized Registrars (including the internal one)
+# can continue to add new Enrollees.
+#ap_setup_locked=1
+
+# Universally Unique IDentifier (UUID; see RFC 4122) of the device
+# This value is used as the UUID for the internal WPS Registrar. If the AP
+# is also using UPnP, this value should be set to the device's UPnP UUID.
+# If not configured, UUID will be generated based on the local MAC address.
+#uuid=12345678-9abc-def0-1234-56789abcdef0
+
+# Note: If wpa_psk_file is set, WPS is used to generate random, per-device PSKs
+# that will be appended to the wpa_psk_file. If wpa_psk_file is not set, the
+# default PSK (wpa_psk/wpa_passphrase) will be delivered to Enrollees. Use of
+# per-device PSKs is recommended as the more secure option (i.e., make sure to
+# set wpa_psk_file when using WPS with WPA-PSK).
+
+# When an Enrollee requests access to the network with PIN method, the Enrollee
+# PIN will need to be entered for the Registrar. PIN request notifications are
+# sent to hostapd ctrl_iface monitor. In addition, they can be written to a
+# text file that could be used, e.g., to populate the AP administration UI with
+# pending PIN requests. If the following variable is set, the PIN requests will
+# be written to the configured file.
+#wps_pin_requests=/var/run/hostapd_wps_pin_requests
+
+# Device Name
+# User-friendly description of device; up to 32 octets encoded in UTF-8
+#device_name=Wireless AP
+
+# Manufacturer
+# The manufacturer of the device (up to 64 ASCII characters)
+#manufacturer=Company
+
+# Model Name
+# Model of the device (up to 32 ASCII characters)
+#model_name=WAP
+
+# Model Number
+# Additional device description (up to 32 ASCII characters)
+#model_number=123
+
+# Serial Number
+# Serial number of the device (up to 32 characters)
+#serial_number=12345
+
+# Primary Device Type
+# Used format: <categ>-<OUI>-<subcateg>
+# categ = Category as an integer value
+# OUI = OUI and type octet as a 4-octet hex-encoded value; 0050F204 for
+#       default WPS OUI
+# subcateg = OUI-specific Sub Category as an integer value
+# Examples:
+#   1-0050F204-1 (Computer / PC)
+#   1-0050F204-2 (Computer / Server)
+#   5-0050F204-1 (Storage / NAS)
+#   6-0050F204-1 (Network Infrastructure / AP)
+#device_type=6-0050F204-1
+
+# OS Version
+# 4-octet operating system version number (hex string)
+#os_version=01020300
+
+# Config Methods
+# List of the supported configuration methods
+# Available methods: usba ethernet label display ext_nfc_token int_nfc_token
+#	nfc_interface push_button keypad virtual_display physical_display
+#	virtual_push_button physical_push_button
+#config_methods=label virtual_display virtual_push_button keypad
+
+# WPS capability discovery workaround for PBC with Windows 7
+# Windows 7 uses incorrect way of figuring out AP's WPS capabilities by acting
+# as a Registrar and using M1 from the AP. The config methods attribute in that
+# message is supposed to indicate only the configuration method supported by
+# the AP in Enrollee role, i.e., to add an external Registrar. For that case,
+# PBC shall not be used and as such, the PushButton config method is removed
+# from M1 by default. If pbc_in_m1=1 is included in the configuration file,
+# the PushButton config method is left in M1 (if included in config_methods
+# parameter) to allow Windows 7 to use PBC instead of PIN (e.g., from a label
+# in the AP).
+#pbc_in_m1=1
+
+# Static access point PIN for initial configuration and adding Registrars
+# If not set, hostapd will not allow external WPS Registrars to control the
+# access point. The AP PIN can also be set at runtime with hostapd_cli
+# wps_ap_pin command. Use of temporary (enabled by user action) and random
+# AP PIN is much more secure than configuring a static AP PIN here. As such,
+# use of the ap_pin parameter is not recommended if the AP device has means for
+# displaying a random PIN.
+#ap_pin=12345670
+
+# Skip building of automatic WPS credential
+# This can be used to allow the automatically generated Credential attribute to
+# be replaced with pre-configured Credential(s).
+#skip_cred_build=1
+
+# Additional Credential attribute(s)
+# This option can be used to add pre-configured Credential attributes into M8
+# message when acting as a Registrar. If skip_cred_build=1, this data will also
+# be able to override the Credential attribute that would have otherwise been
+# automatically generated based on network configuration. This configuration
+# option points to an external file that much contain the WPS Credential
+# attribute(s) as binary data.
+#extra_cred=hostapd.cred
+
+# Credential processing
+#   0 = process received credentials internally (default)
+#   1 = do not process received credentials; just pass them over ctrl_iface to
+#	external program(s)
+#   2 = process received credentials internally and pass them over ctrl_iface
+#	to external program(s)
+# Note: With wps_cred_processing=1, skip_cred_build should be set to 1 and
+# extra_cred be used to provide the Credential data for Enrollees.
+#
+# wps_cred_processing=1 will disabled automatic updates of hostapd.conf file
+# both for Credential processing and for marking AP Setup Locked based on
+# validation failures of AP PIN. An external program is responsible on updating
+# the configuration appropriately in this case.
+#wps_cred_processing=0
+
+# AP Settings Attributes for M7
+# By default, hostapd generates the AP Settings Attributes for M7 based on the
+# current configuration. It is possible to override this by providing a file
+# with pre-configured attributes. This is similar to extra_cred file format,
+# but the AP Settings attributes are not encapsulated in a Credential
+# attribute.
+#ap_settings=hostapd.ap_settings
+
+# WPS UPnP interface
+# If set, support for external Registrars is enabled.
+#upnp_iface=br0
+
+# Friendly Name (required for UPnP)
+# Short description for end use. Should be less than 64 characters.
+#friendly_name=WPS Access Point
+
+# Manufacturer URL (optional for UPnP)
+#manufacturer_url=http://www.example.com/
+
+# Model Description (recommended for UPnP)
+# Long description for end user. Should be less than 128 characters.
+#model_description=Wireless Access Point
+
+# Model URL (optional for UPnP)
+#model_url=http://www.example.com/model/
+
+# Universal Product Code (optional for UPnP)
+# 12-digit, all-numeric code that identifies the consumer package.
+#upc=123456789012
+
+# WPS RF Bands (a = 5G, b = 2.4G, g = 2.4G, ag = dual band)
+# This value should be set according to RF band(s) supported by the AP if
+# hw_mode is not set. For dual band dual concurrent devices, this needs to be
+# set to ag to allow both RF bands to be advertized.
+#wps_rf_bands=ag
+
+# NFC password token for WPS
+# These parameters can be used to configure a fixed NFC password token for the
+# AP. This can be generated, e.g., with nfc_pw_token from wpa_supplicant. When
+# these parameters are used, the AP is assumed to be deployed with a NFC tag
+# that includes the matching NFC password token (e.g., written based on the
+# NDEF record from nfc_pw_token).
+#
+#wps_nfc_dev_pw_id: Device Password ID (16..65535)
+#wps_nfc_dh_pubkey: Hexdump of DH Public Key
+#wps_nfc_dh_privkey: Hexdump of DH Private Key
+#wps_nfc_dev_pw: Hexdump of Device Password
+
+##### Wi-Fi Direct (P2P) ######################################################
+
+# Enable P2P Device management
+#manage_p2p=1
+
+# Allow cross connection
+#allow_cross_connection=1
+
+#### TDLS (IEEE 802.11z-2010) #################################################
+
+# Prohibit use of TDLS in this BSS
+#tdls_prohibit=1
+
+# Prohibit use of TDLS Channel Switching in this BSS
+#tdls_prohibit_chan_switch=1
+
+##### IEEE 802.11v-2011 #######################################################
+
+# Time advertisement
+# 0 = disabled (default)
+# 2 = UTC time at which the TSF timer is 0
+#time_advertisement=2
+
+# Local time zone as specified in 8.3 of IEEE Std 1003.1-2004:
+# stdoffset[dst[offset][,start[/time],end[/time]]]
+#time_zone=EST5
+
+# WNM-Sleep Mode (extended sleep mode for stations)
+# 0 = disabled (default)
+# 1 = enabled (allow stations to use WNM-Sleep Mode)
+#wnm_sleep_mode=1
+
+# BSS Transition Management
+# 0 = disabled (default)
+# 1 = enabled
+#bss_transition=1
+
+##### IEEE 802.11u-2011 #######################################################
+
+# Enable Interworking service
+#interworking=1
+
+# Access Network Type
+# 0 = Private network
+# 1 = Private network with guest access
+# 2 = Chargeable public network
+# 3 = Free public network
+# 4 = Personal device network
+# 5 = Emergency services only network
+# 14 = Test or experimental
+# 15 = Wildcard
+#access_network_type=0
+
+# Whether the network provides connectivity to the Internet
+# 0 = Unspecified
+# 1 = Network provides connectivity to the Internet
+#internet=1
+
+# Additional Step Required for Access
+# Note: This is only used with open network, i.e., ASRA shall ne set to 0 if
+# RSN is used.
+#asra=0
+
+# Emergency services reachable
+#esr=0
+
+# Unauthenticated emergency service accessible
+#uesa=0
+
+# Venue Info (optional)
+# The available values are defined in IEEE Std 802.11u-2011, 7.3.1.34.
+# Example values (group,type):
+# 0,0 = Unspecified
+# 1,7 = Convention Center
+# 1,13 = Coffee Shop
+# 2,0 = Unspecified Business
+# 7,1  Private Residence
+#venue_group=7
+#venue_type=1
+
+# Homogeneous ESS identifier (optional; dot11HESSID)
+# If set, this shall be identifical to one of the BSSIDs in the homogeneous
+# ESS and this shall be set to the same value across all BSSs in homogeneous
+# ESS.
+#hessid=02:03:04:05:06:07
+
+# Roaming Consortium List
+# Arbitrary number of Roaming Consortium OIs can be configured with each line
+# adding a new OI to the list. The first three entries are available through
+# Beacon and Probe Response frames. Any additional entry will be available only
+# through ANQP queries. Each OI is between 3 and 15 octets and is configured as
+# a hexstring.
+#roaming_consortium=021122
+#roaming_consortium=2233445566
+
+# Venue Name information
+# This parameter can be used to configure one or more Venue Name Duples for
+# Venue Name ANQP information. Each entry has a two or three character language
+# code (ISO-639) separated by colon from the venue name string.
+# Note that venue_group and venue_type have to be set for Venue Name
+# information to be complete.
+#venue_name=eng:Example venue
+#venue_name=fin:Esimerkkipaikka
+# Alternative format for language:value strings:
+# (double quoted string, printf-escaped string)
+#venue_name=P"eng:Example\nvenue"
+
+# Network Authentication Type
+# This parameter indicates what type of network authentication is used in the
+# network.
+# format: <network auth type indicator (1-octet hex str)> [redirect URL]
+# Network Authentication Type Indicator values:
+# 00 = Acceptance of terms and conditions
+# 01 = On-line enrollment supported
+# 02 = http/https redirection
+# 03 = DNS redirection
+#network_auth_type=00
+#network_auth_type=02http://www.example.com/redirect/me/here/
+
+# IP Address Type Availability
+# format: <1-octet encoded value as hex str>
+# (ipv4_type & 0x3f) << 2 | (ipv6_type & 0x3)
+# ipv4_type:
+# 0 = Address type not available
+# 1 = Public IPv4 address available
+# 2 = Port-restricted IPv4 address available
+# 3 = Single NATed private IPv4 address available
+# 4 = Double NATed private IPv4 address available
+# 5 = Port-restricted IPv4 address and single NATed IPv4 address available
+# 6 = Port-restricted IPv4 address and double NATed IPv4 address available
+# 7 = Availability of the address type is not known
+# ipv6_type:
+# 0 = Address type not available
+# 1 = Address type available
+# 2 = Availability of the address type not known
+#ipaddr_type_availability=14
+
+# Domain Name
+# format: <variable-octet str>[,<variable-octet str>]
+#domain_name=example.com,another.example.com,yet-another.example.com
+
+# 3GPP Cellular Network information
+# format: <MCC1,MNC1>[;<MCC2,MNC2>][;...]
+#anqp_3gpp_cell_net=244,91;310,026;234,56
+
+# NAI Realm information
+# One or more realm can be advertised. Each nai_realm line adds a new realm to
+# the set. These parameters provide information for stations using Interworking
+# network selection to allow automatic connection to a network based on
+# credentials.
+# format: <encoding>,<NAI Realm(s)>[,<EAP Method 1>][,<EAP Method 2>][,...]
+# encoding:
+#	0 = Realm formatted in accordance with IETF RFC 4282
+#	1 = UTF-8 formatted character string that is not formatted in
+#	    accordance with IETF RFC 4282
+# NAI Realm(s): Semi-colon delimited NAI Realm(s)
+# EAP Method: <EAP Method>[:<[AuthParam1:Val1]>][<[AuthParam2:Val2]>][...]
+# AuthParam (Table 8-188 in IEEE Std 802.11-2012):
+# ID 2 = Non-EAP Inner Authentication Type
+#	1 = PAP, 2 = CHAP, 3 = MSCHAP, 4 = MSCHAPV2
+# ID 3 = Inner authentication EAP Method Type
+# ID 5 = Credential Type
+#	1 = SIM, 2 = USIM, 3 = NFC Secure Element, 4 = Hardware Token,
+#	5 = Softoken, 6 = Certificate, 7 = username/password, 9 = Anonymous,
+#	10 = Vendor Specific
+#nai_realm=0,example.com;example.net
+# EAP methods EAP-TLS with certificate and EAP-TTLS/MSCHAPv2 with
+# username/password
+#nai_realm=0,example.org,13[5:6],21[2:4][5:7]
+
+# QoS Map Set configuration
+#
+# Comma delimited QoS Map Set in decimal values
+# (see IEEE Std 802.11-2012, 8.4.2.97)
+#
+# format:
+# [<DSCP Exceptions[DSCP,UP]>,]<UP 0 range[low,high]>,...<UP 7 range[low,high]>
+#
+# There can be up to 21 optional DSCP Exceptions which are pairs of DSCP Value
+# (0..63 or 255) and User Priority (0..7). This is followed by eight DSCP Range
+# descriptions with DSCP Low Value and DSCP High Value pairs (0..63 or 255) for
+# each UP starting from 0. If both low and high value are set to 255, the
+# corresponding UP is not used.
+#
+# default: not set
+#qos_map_set=53,2,22,6,8,15,0,7,255,255,16,31,32,39,255,255,40,47,255,255
+
+##### Hotspot 2.0 #############################################################
+
+# Enable Hotspot 2.0 support
+#hs20=1
+
+# Disable Downstream Group-Addressed Forwarding (DGAF)
+# This can be used to configure a network where no group-addressed frames are
+# allowed. The AP will not forward any group-address frames to the stations and
+# random GTKs are issued for each station to prevent associated stations from
+# forging such frames to other stations in the BSS.
+#disable_dgaf=1
+
+# Operator Friendly Name
+# This parameter can be used to configure one or more Operator Friendly Name
+# Duples. Each entry has a two or three character language code (ISO-639)
+# separated by colon from the operator friendly name string.
+#hs20_oper_friendly_name=eng:Example operator
+#hs20_oper_friendly_name=fin:Esimerkkioperaattori
+
+# Connection Capability
+# This can be used to advertise what type of IP traffic can be sent through the
+# hotspot (e.g., due to firewall allowing/blocking protocols/ports).
+# format: <IP Protocol>:<Port Number>:<Status>
+# IP Protocol: 1 = ICMP, 6 = TCP, 17 = UDP
+# Port Number: 0..65535
+# Status: 0 = Closed, 1 = Open, 2 = Unknown
+# Each hs20_conn_capab line is added to the list of advertised tuples.
+#hs20_conn_capab=1:0:2
+#hs20_conn_capab=6:22:1
+#hs20_conn_capab=17:5060:0
+
+# WAN Metrics
+# format: <WAN Info>:<DL Speed>:<UL Speed>:<DL Load>:<UL Load>:<LMD>
+# WAN Info: B0-B1: Link Status, B2: Symmetric Link, B3: At Capabity
+#    (encoded as two hex digits)
+#    Link Status: 1 = Link up, 2 = Link down, 3 = Link in test state
+# Downlink Speed: Estimate of WAN backhaul link current downlink speed in kbps;
+#	1..4294967295; 0 = unknown
+# Uplink Speed: Estimate of WAN backhaul link current uplink speed in kbps
+#	1..4294967295; 0 = unknown
+# Downlink Load: Current load of downlink WAN connection (scaled to 255 = 100%)
+# Uplink Load: Current load of uplink WAN connection (scaled to 255 = 100%)
+# Load Measurement Duration: Duration for measuring downlink/uplink load in
+# tenths of a second (1..65535); 0 if load cannot be determined
+#hs20_wan_metrics=01:8000:1000:80:240:3000
+
+# Operating Class Indication
+# List of operating classes the BSSes in this ESS use. The Global operating
+# classes in Table E-4 of IEEE Std 802.11-2012 Annex E define the values that
+# can be used in this.
+# format: hexdump of operating class octets
+# for example, operating classes 81 (2.4 GHz channels 1-13) and 115 (5 GHz
+# channels 36-48):
+#hs20_operating_class=5173
+
+##### TESTING OPTIONS #########################################################
+#
+# The options in this section are only available when the build configuration
+# option CONFIG_TESTING_OPTIONS is set while compiling hostapd. They allow
+# testing some scenarios that are otherwise difficult to reproduce.
+#
+# Ignore probe requests sent to hostapd with the given probability, must be a
+# floating point number in the range [0, 1).
+#ignore_probe_probability=0.0
+#
+# Ignore authentication frames with the given probability
+#ignore_auth_probability=0.0
+#
+# Ignore association requests with the given probability
+#ignore_assoc_probability=0.0
+#
+# Ignore reassociation requests with the given probability
+#ignore_reassoc_probability=0.0
+#
+# Corrupt Key MIC in GTK rekey EAPOL-Key frames with the given probability
+#corrupt_gtk_rekey_mic_probability=0.0
+
+##### Multiple BSSID support ##################################################
+#
+# Above configuration is using the default interface (wlan#, or multi-SSID VLAN
+# interfaces). Other BSSIDs can be added by using separator 'bss' with
+# default interface name to be allocated for the data packets of the new BSS.
+#
+# hostapd will generate BSSID mask based on the BSSIDs that are
+# configured. hostapd will verify that dev_addr & MASK == dev_addr. If this is
+# not the case, the MAC address of the radio must be changed before starting
+# hostapd (ifconfig wlan0 hw ether <MAC addr>). If a BSSID is configured for
+# every secondary BSS, this limitation is not applied at hostapd and other
+# masks may be used if the driver supports them (e.g., swap the locally
+# administered bit)
+#
+# BSSIDs are assigned in order to each BSS, unless an explicit BSSID is
+# specified using the 'bssid' parameter.
+# If an explicit BSSID is specified, it must be chosen such that it:
+# - results in a valid MASK that covers it and the dev_addr
+# - is not the same as the MAC address of the radio
+# - is not the same as any other explicitly specified BSSID
+#
+# Please note that hostapd uses some of the values configured for the first BSS
+# as the defaults for the following BSSes. However, it is recommended that all
+# BSSes include explicit configuration of all relevant configuration items.
+#
+#bss=wlan0_0
+#ssid=test2
+# most of the above items can be used here (apart from radio interface specific
+# items, like channel)
+
+#bss=wlan0_1
+#bssid=00:13:10:95:fe:0b
+# ...
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.template
new file mode 100644
index 0000000000000..e8fa0ba5d5b83
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/hostapd.conf.template
@@ -0,0 +1,1663 @@
+##### hostapd configuration file ##############################################
+# Empty lines and lines starting with # are ignored
+
+# AP netdevice name (without 'ap' postfix, i.e., wlan0 uses wlan0ap for
+# management frames); ath0 for madwifi
+interface=HOSTAPD_IF
+
+# In case of madwifi, atheros, and nl80211 driver interfaces, an additional
+# configuration parameter, bridge, may be used to notify hostapd if the
+# interface is included in a bridge. This parameter is not used with Host AP
+# driver. If the bridge parameter is not set, the drivers will automatically
+# figure out the bridge interface (assuming sysfs is enabled and mounted to
+# /sys) and this parameter may not be needed.
+#
+# For nl80211, this parameter can be used to request the AP interface to be
+# added to the bridge automatically (brctl may refuse to do this before hostapd
+# has been started to change the interface mode). If needed, the bridge
+# interface is also created.
+#bridge=br0
+
+# Driver interface type (hostap/wired/madwifi/test/none/nl80211/bsd);
+# default: hostap). nl80211 is used with all Linux mac80211 drivers.
+# Use driver=none if building hostapd as a standalone RADIUS server that does
+# not control any wireless/wired driver.
+# driver=hostap
+
+# hostapd event logger configuration
+#
+# Two output method: syslog and stdout (only usable if not forking to
+# background).
+#
+# Module bitfield (ORed bitfield of modules that will be logged; -1 = all
+# modules):
+# bit 0 (1) = IEEE 802.11
+# bit 1 (2) = IEEE 802.1X
+# bit 2 (4) = RADIUS
+# bit 3 (8) = WPA
+# bit 4 (16) = driver interface
+# bit 5 (32) = IAPP
+# bit 6 (64) = MLME
+#
+# Levels (minimum value for logged events):
+#  0 = verbose debugging
+#  1 = debugging
+#  2 = informational messages
+#  3 = notification
+#  4 = warning
+#
+logger_syslog=1
+logger_syslog_level=0
+logger_stdout=1
+logger_stdout_level=0
+
+# Interface for separate control program. If this is specified, hostapd
+# will create this directory and a UNIX domain socket for listening to requests
+# from external programs (CLI/GUI, etc.) for status information and
+# configuration. The socket file will be named based on the interface name, so
+# multiple hostapd processes/interfaces can be run at the same time if more
+# than one interface is used.
+# /var/run/hostapd is the recommended directory for sockets and by default,
+# hostapd_cli will use it when trying to connect with hostapd.
+ctrl_interface=/var/run/hostapd
+
+# Access control for the control interface can be configured by setting the
+# directory to allow only members of a group to use sockets. This way, it is
+# possible to run hostapd as root (since it needs to change network
+# configuration and open raw sockets) and still allow GUI/CLI components to be
+# run as non-root users. However, since the control interface can be used to
+# change the network configuration, this access needs to be protected in many
+# cases. By default, hostapd is configured to use gid 0 (root). If you
+# want to allow non-root users to use the contron interface, add a new group
+# and change this value to match with that group. Add users that should have
+# control interface access to this group.
+#
+# This variable can be a group name or gid.
+#ctrl_interface_group=wheel
+ctrl_interface_group=0
+
+
+##### IEEE 802.11 related configuration #######################################
+
+# SSID to be used in IEEE 802.11 management frames
+ssid=test
+# Alternative formats for configuring SSID
+# (double quoted string, hexdump, printf-escaped string)
+#ssid2="test"
+#ssid2=74657374
+#ssid2=P"hello\nthere"
+
+# UTF-8 SSID: Whether the SSID is to be interpreted using UTF-8 encoding
+#utf8_ssid=1
+
+# Country code (ISO/IEC 3166-1). Used to set regulatory domain.
+# Set as needed to indicate country in which device is operating.
+# This can limit available channels and transmit power.
+#country_code=US
+
+# Enable IEEE 802.11d. This advertises the country_code and the set of allowed
+# channels and transmit power levels based on the regulatory limits. The
+# country_code setting must be configured with the correct country for
+# IEEE 802.11d functions.
+# (default: 0 = disabled)
+#ieee80211d=1
+
+# Enable IEEE 802.11h. This enables radar detection and DFS support if
+# available. DFS support is required on outdoor 5 GHz channels in most countries
+# of the world. This can be used only with ieee80211d=1.
+# (default: 0 = disabled)
+#ieee80211h=1
+
+# Operation mode (a = IEEE 802.11a, b = IEEE 802.11b, g = IEEE 802.11g,
+# ad = IEEE 802.11ad (60 GHz); a/g options are used with IEEE 802.11n, too, to
+# specify band)
+# Default: IEEE 802.11b
+hw_mode=g
+
+# Channel number (IEEE 802.11)
+# (default: 0, i.e., not set)
+# Please note that some drivers do not use this value from hostapd and the
+# channel will need to be configured separately with iwconfig.
+#
+# If CONFIG_ACS build option is enabled, the channel can be selected
+# automatically at run time by setting channel=acs_survey or channel=0, both of
+# which will enable the ACS survey based algorithm.
+channel=1
+
+# ACS tuning - Automatic Channel Selection
+# See: http://wireless.kernel.org/en/users/Documentation/acs
+#
+# You can customize the ACS survey algorithm with following variables:
+#
+# acs_num_scans requirement is 1..100 - number of scans to be performed that
+# are used to trigger survey data gathering of an underlying device driver.
+# Scans are passive and typically take a little over 100ms (depending on the
+# driver) on each available channel for given hw_mode. Increasing this value
+# means sacrificing startup time and gathering more data wrt channel
+# interference that may help choosing a better channel. This can also help fine
+# tune the ACS scan time in case a driver has different scan dwell times.
+#
+# Defaults:
+#acs_num_scans=5
+
+# Beacon interval in kus (1.024 ms) (default: 100; range 15..65535)
+beacon_int=100
+
+# DTIM (delivery traffic information message) period (range 1..255):
+# number of beacons between DTIMs (1 = every beacon includes DTIM element)
+# (default: 2)
+dtim_period=2
+
+# Maximum number of stations allowed in station table. New stations will be
+# rejected after the station table is full. IEEE 802.11 has a limit of 2007
+# different association IDs, so this number should not be larger than that.
+# (default: 2007)
+max_num_sta=255
+
+# RTS/CTS threshold; 2347 = disabled (default); range 0..2347
+# If this field is not included in hostapd.conf, hostapd will not control
+# RTS threshold and 'iwconfig wlan# rts <val>' can be used to set it.
+rts_threshold=2347
+
+# Fragmentation threshold; 2346 = disabled (default); range 256..2346
+# If this field is not included in hostapd.conf, hostapd will not control
+# fragmentation threshold and 'iwconfig wlan# frag <val>' can be used to set
+# it.
+fragm_threshold=2346
+
+# Rate configuration
+# Default is to enable all rates supported by the hardware. This configuration
+# item allows this list be filtered so that only the listed rates will be left
+# in the list. If the list is empty, all rates are used. This list can have
+# entries that are not in the list of rates the hardware supports (such entries
+# are ignored). The entries in this list are in 100 kbps, i.e., 11 Mbps = 110.
+# If this item is present, at least one rate have to be matching with the rates
+# hardware supports.
+# default: use the most common supported rate setting for the selected
+# hw_mode (i.e., this line can be removed from configuration file in most
+# cases)
+#supported_rates=10 20 55 110 60 90 120 180 240 360 480 540
+
+# Basic rate set configuration
+# List of rates (in 100 kbps) that are included in the basic rate set.
+# If this item is not included, usually reasonable default set is used.
+#basic_rates=10 20
+#basic_rates=10 20 55 110
+#basic_rates=60 120 240
+
+# Short Preamble
+# This parameter can be used to enable optional use of short preamble for
+# frames sent at 2 Mbps, 5.5 Mbps, and 11 Mbps to improve network performance.
+# This applies only to IEEE 802.11b-compatible networks and this should only be
+# enabled if the local hardware supports use of short preamble. If any of the
+# associated STAs do not support short preamble, use of short preamble will be
+# disabled (and enabled when such STAs disassociate) dynamically.
+# 0 = do not allow use of short preamble (default)
+# 1 = allow use of short preamble
+#preamble=1
+
+# Station MAC address -based authentication
+# Please note that this kind of access control requires a driver that uses
+# hostapd to take care of management frame processing and as such, this can be
+# used with driver=hostap or driver=nl80211, but not with driver=madwifi.
+# 0 = accept unless in deny list
+# 1 = deny unless in accept list
+# 2 = use external RADIUS server (accept/deny lists are searched first)
+macaddr_acl=0
+
+# Accept/deny lists are read from separate files (containing list of
+# MAC addresses, one per line). Use absolute path name to make sure that the
+# files can be read on SIGHUP configuration reloads.
+#accept_mac_file=/etc/hostapd.accept
+#deny_mac_file=/etc/hostapd.deny
+
+# IEEE 802.11 specifies two authentication algorithms. hostapd can be
+# configured to allow both of these or only one. Open system authentication
+# should be used with IEEE 802.1X.
+# Bit fields of allowed authentication algorithms:
+# bit 0 = Open System Authentication
+# bit 1 = Shared Key Authentication (requires WEP)
+auth_algs=3
+
+# Send empty SSID in beacons and ignore probe request frames that do not
+# specify full SSID, i.e., require stations to know SSID.
+# default: disabled (0)
+# 1 = send empty (length=0) SSID in beacon and ignore probe request for
+#     broadcast SSID
+# 2 = clear SSID (ASCII 0), but keep the original length (this may be required
+#     with some clients that do not support empty SSID) and ignore probe
+#     requests for broadcast SSID
+ignore_broadcast_ssid=0
+
+# Additional vendor specfic elements for Beacon and Probe Response frames
+# This parameter can be used to add additional vendor specific element(s) into
+# the end of the Beacon and Probe Response frames. The format for these
+# element(s) is a hexdump of the raw information elements (id+len+payload for
+# one or more elements)
+#vendor_elements=dd0411223301
+
+# TX queue parameters (EDCF / bursting)
+# tx_queue_<queue name>_<param>
+# queues: data0, data1, data2, data3, after_beacon, beacon
+#		(data0 is the highest priority queue)
+# parameters:
+#   aifs: AIFS (default 2)
+#   cwmin: cwMin (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023)
+#   cwmax: cwMax (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023); cwMax >= cwMin
+#   burst: maximum length (in milliseconds with precision of up to 0.1 ms) for
+#          bursting
+#
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# These parameters are used by the access point when transmitting frames
+# to the clients.
+#
+# Low priority / AC_BK = background
+#tx_queue_data3_aifs=7
+#tx_queue_data3_cwmin=15
+#tx_queue_data3_cwmax=1023
+#tx_queue_data3_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=1023 burst=0
+#
+# Normal priority / AC_BE = best effort
+#tx_queue_data2_aifs=3
+#tx_queue_data2_cwmin=15
+#tx_queue_data2_cwmax=63
+#tx_queue_data2_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=127 burst=0
+#
+# High priority / AC_VI = video
+#tx_queue_data1_aifs=1
+#tx_queue_data1_cwmin=7
+#tx_queue_data1_cwmax=15
+#tx_queue_data1_burst=3.0
+# Note: for IEEE 802.11b mode: cWmin=15 cWmax=31 burst=6.0
+#
+# Highest priority / AC_VO = voice
+#tx_queue_data0_aifs=1
+#tx_queue_data0_cwmin=3
+#tx_queue_data0_cwmax=7
+#tx_queue_data0_burst=1.5
+# Note: for IEEE 802.11b mode: cWmin=7 cWmax=15 burst=3.3
+
+# 802.1D Tag (= UP) to AC mappings
+# WMM specifies following mapping of data frames to different ACs. This mapping
+# can be configured using Linux QoS/tc and sch_pktpri.o module.
+# 802.1D Tag	802.1D Designation	Access Category	WMM Designation
+# 1		BK			AC_BK		Background
+# 2		-			AC_BK		Background
+# 0		BE			AC_BE		Best Effort
+# 3		EE			AC_BE		Best Effort
+# 4		CL			AC_VI		Video
+# 5		VI			AC_VI		Video
+# 6		VO			AC_VO		Voice
+# 7		NC			AC_VO		Voice
+# Data frames with no priority information: AC_BE
+# Management frames: AC_VO
+# PS-Poll frames: AC_BE
+
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# for 802.11a or 802.11g networks
+# These parameters are sent to WMM clients when they associate.
+# The parameters will be used by WMM clients for frames transmitted to the
+# access point.
+#
+# note - txop_limit is in units of 32microseconds
+# note - acm is admission control mandatory flag. 0 = admission control not
+# required, 1 = mandatory
+# note - here cwMin and cmMax are in exponent form. the actual cw value used
+# will be (2^n)-1 where n is the value given here
+#
+wmm_enabled=1
+#
+# WMM-PS Unscheduled Automatic Power Save Delivery [U-APSD]
+# Enable this flag if U-APSD supported outside hostapd (eg., Firmware/driver)
+#uapsd_advertisement_enabled=1
+#
+# Low priority / AC_BK = background
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=10
+#
+# Normal priority / AC_BE = best effort
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=7
+#
+# High priority / AC_VI = video
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+# Note: for IEEE 802.11b mode: cWmin=4 cWmax=5 txop_limit=188
+#
+# Highest priority / AC_VO = voice
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
+# Note: for IEEE 802.11b mode: cWmin=3 cWmax=4 burst=102
+
+# Static WEP key configuration
+#
+# The key number to use when transmitting.
+# It must be between 0 and 3, and the corresponding key must be set.
+# default: not set
+#wep_default_key=0
+# The WEP keys to use.
+# A key may be a quoted string or unquoted hexadecimal digits.
+# The key length should be 5, 13, or 16 characters, or 10, 26, or 32
+# digits, depending on whether 40-bit (64-bit), 104-bit (128-bit), or
+# 128-bit (152-bit) WEP is used.
+# Only the default key must be supplied; the others are optional.
+# default: not set
+#wep_key0=123456789a
+#wep_key1="vwxyz"
+#wep_key2=0102030405060708090a0b0c0d
+#wep_key3=".2.4.6.8.0.23"
+
+# Station inactivity limit
+#
+# If a station does not send anything in ap_max_inactivity seconds, an
+# empty data frame is sent to it in order to verify whether it is
+# still in range. If this frame is not ACKed, the station will be
+# disassociated and then deauthenticated. This feature is used to
+# clear station table of old entries when the STAs move out of the
+# range.
+#
+# The station can associate again with the AP if it is still in range;
+# this inactivity poll is just used as a nicer way of verifying
+# inactivity; i.e., client will not report broken connection because
+# disassociation frame is not sent immediately without first polling
+# the STA with a data frame.
+# default: 300 (i.e., 5 minutes)
+#ap_max_inactivity=300
+#
+# The inactivity polling can be disabled to disconnect stations based on
+# inactivity timeout so that idle stations are more likely to be disconnected
+# even if they are still in range of the AP. This can be done by setting
+# skip_inactivity_poll to 1 (default 0).
+#skip_inactivity_poll=0
+
+# Disassociate stations based on excessive transmission failures or other
+# indications of connection loss. This depends on the driver capabilities and
+# may not be available with all drivers.
+#disassoc_low_ack=1
+
+# Maximum allowed Listen Interval (how many Beacon periods STAs are allowed to
+# remain asleep). Default: 65535 (no limit apart from field size)
+#max_listen_interval=100
+
+# WDS (4-address frame) mode with per-station virtual interfaces
+# (only supported with driver=nl80211)
+# This mode allows associated stations to use 4-address frames to allow layer 2
+# bridging to be used.
+#wds_sta=1
+
+# If bridge parameter is set, the WDS STA interface will be added to the same
+# bridge by default. This can be overridden with the wds_bridge parameter to
+# use a separate bridge.
+#wds_bridge=wds-br0
+
+# Start the AP with beaconing disabled by default.
+#start_disabled=0
+
+# Client isolation can be used to prevent low-level bridging of frames between
+# associated stations in the BSS. By default, this bridging is allowed.
+#ap_isolate=1
+
+# Fixed BSS Load value for testing purposes
+# This field can be used to configure hostapd to add a fixed BSS Load element
+# into Beacon and Probe Response frames for testing purposes. The format is
+# <station count>:<channel utilization>:<available admission capacity>
+#bss_load_test=12:80:20000
+
+##### IEEE 802.11n related configuration ######################################
+
+# ieee80211n: Whether IEEE 802.11n (HT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full HT functionality.
+ieee80211n=1
+
+# ht_capab: HT capabilities (list of flags)
+# LDPC coding capability: [LDPC] = supported
+# Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
+#	channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
+#	with secondary channel below the primary channel
+#	(20 MHz only if neither is set)
+#	Note: There are limits on which channels can be used with HT40- and
+#	HT40+. Following table shows the channels that may be available for
+#	HT40- and HT40+ use per IEEE 802.11n Annex J:
+#	freq		HT40-		HT40+
+#	2.4 GHz		5-13		1-7 (1-9 in Europe/Japan)
+#	5 GHz		40,48,56,64	36,44,52,60
+#	(depending on the location, not all of these channels may be available
+#	for use)
+#	Please note that 40 MHz channels may switch their primary and secondary
+#	channels if needed or creation of 40 MHz channel maybe rejected based
+#	on overlapping BSSes. These changes are done automatically when hostapd
+#	is setting up the 40 MHz channel.
+# Spatial Multiplexing (SM) Power Save: [SMPS-STATIC] or [SMPS-DYNAMIC]
+#	(SMPS disabled if neither is set)
+# HT-greenfield: [GF] (disabled if not set)
+# Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
+# Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
+# Tx STBC: [TX-STBC] (disabled if not set)
+# Rx STBC: [RX-STBC1] (one spatial stream), [RX-STBC12] (one or two spatial
+#	streams), or [RX-STBC123] (one, two, or three spatial streams); Rx STBC
+#	disabled if none of these set
+# HT-delayed Block Ack: [DELAYED-BA] (disabled if not set)
+# Maximum A-MSDU length: [MAX-AMSDU-7935] for 7935 octets (3839 octets if not
+#	set)
+# DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
+# PSMP support: [PSMP] (disabled if not set)
+# L-SIG TXOP protection support: [LSIG-TXOP-PROT] (disabled if not set)
+#ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
+
+# Require stations to support HT PHY (reject association if they do not)
+#require_ht=1
+
+# If set non-zero, require stations to perform scans of overlapping
+# channels to test for stations which would be affected by 40 MHz traffic.
+# This parameter sets the interval in seconds between these scans. This
+# is useful only for testing that stations properly set the OBSS interval,
+# since the other parameters in the OBSS scan parameters IE are set to 0.
+#obss_interval=0
+
+##### IEEE 802.11ac related configuration #####################################
+
+# ieee80211ac: Whether IEEE 802.11ac (VHT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full VHT functionality.
+#ieee80211ac=1
+
+# vht_capab: VHT capabilities (list of flags)
+#
+# vht_max_mpdu_len: [MAX-MPDU-7991] [MAX-MPDU-11454]
+# Indicates maximum MPDU length
+# 0 = 3895 octets (default)
+# 1 = 7991 octets
+# 2 = 11454 octets
+# 3 = reserved
+#
+# supported_chan_width: [VHT160] [VHT160-80PLUS80]
+# Indicates supported Channel widths
+# 0 = 160 MHz & 80+80 channel widths are not supported (default)
+# 1 = 160 MHz channel width is supported
+# 2 = 160 MHz & 80+80 channel widths are supported
+# 3 = reserved
+#
+# Rx LDPC coding capability: [RXLDPC]
+# Indicates support for receiving LDPC coded pkts
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 80 MHz: [SHORT-GI-80]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 80Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 160 MHz: [SHORT-GI-160]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 160Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Tx STBC: [TX-STBC-2BY1]
+# Indicates support for the transmission of at least 2x1 STBC
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Rx STBC: [RX-STBC-1] [RX-STBC-12] [RX-STBC-123] [RX-STBC-1234]
+# Indicates support for the reception of PPDUs using STBC
+# 0 = Not supported (default)
+# 1 = support of one spatial stream
+# 2 = support of one and two spatial streams
+# 3 = support of one, two and three spatial streams
+# 4 = support of one, two, three and four spatial streams
+# 5,6,7 = reserved
+#
+# SU Beamformer Capable: [SU-BEAMFORMER]
+# Indicates support for operation as a single user beamformer
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# SU Beamformee Capable: [SU-BEAMFORMEE]
+# Indicates support for operation as a single user beamformee
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Compressed Steering Number of Beamformer Antennas Supported: [BF-ANTENNA-2]
+#   Beamformee's capability indicating the maximum number of beamformer
+#   antennas the beamformee can support when sending compressed beamforming
+#   feedback
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# Number of Sounding Dimensions: [SOUNDING-DIMENSION-2]
+# Beamformer's capability indicating the maximum value of the NUM_STS parameter
+# in the TXVECTOR of a VHT NDP
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# MU Beamformer Capable: [MU-BEAMFORMER]
+# Indicates support for operation as an MU beamformer
+# 0 = Not supported or sent by Non-AP STA (default)
+# 1 = Supported
+#
+# MU Beamformee Capable: [MU-BEAMFORMEE]
+# Indicates support for operation as an MU beamformee
+# 0 = Not supported or sent by AP (default)
+# 1 = Supported
+#
+# VHT TXOP PS: [VHT-TXOP-PS]
+# Indicates whether or not the AP supports VHT TXOP Power Save Mode
+#  or whether or not the STA is in VHT TXOP Power Save mode
+# 0 = VHT AP doesnt support VHT TXOP PS mode (OR) VHT Sta not in VHT TXOP PS
+#  mode
+# 1 = VHT AP supports VHT TXOP PS mode (OR) VHT Sta is in VHT TXOP power save
+#  mode
+#
+# +HTC-VHT Capable: [HTC-VHT]
+# Indicates whether or not the STA supports receiving a VHT variant HT Control
+# field.
+# 0 = Not supported (default)
+# 1 = supported
+#
+# Maximum A-MPDU Length Exponent: [MAX-A-MPDU-LEN-EXP0]..[MAX-A-MPDU-LEN-EXP7]
+# Indicates the maximum length of A-MPDU pre-EOF padding that the STA can recv
+# This field is an integer in the range of 0 to 7.
+# The length defined by this field is equal to
+# 2 pow(13 + Maximum A-MPDU Length Exponent) -1 octets
+#
+# VHT Link Adaptation Capable: [VHT-LINK-ADAPT2] [VHT-LINK-ADAPT3]
+# Indicates whether or not the STA supports link adaptation using VHT variant
+# HT Control field
+# If +HTC-VHTcapable is 1
+#  0 = (no feedback) if the STA does not provide VHT MFB (default)
+#  1 = reserved
+#  2 = (Unsolicited) if the STA provides only unsolicited VHT MFB
+#  3 = (Both) if the STA can provide VHT MFB in response to VHT MRQ and if the
+#      STA provides unsolicited VHT MFB
+# Reserved if +HTC-VHTcapable is 0
+#
+# Rx Antenna Pattern Consistency: [RX-ANTENNA-PATTERN]
+# Indicates the possibility of Rx antenna pattern change
+# 0 = Rx antenna pattern might change during the lifetime of an association
+# 1 = Rx antenna pattern does not change during the lifetime of an association
+#
+# Tx Antenna Pattern Consistency: [TX-ANTENNA-PATTERN]
+# Indicates the possibility of Tx antenna pattern change
+# 0 = Tx antenna pattern might change during the lifetime of an association
+# 1 = Tx antenna pattern does not change during the lifetime of an association
+#vht_capab=[SHORT-GI-80][HTC-VHT]
+#
+# Require stations to support VHT PHY (reject association if they do not)
+#require_vht=1
+
+# 0 = 20 or 40 MHz operating Channel width
+# 1 = 80 MHz channel width
+# 2 = 160 MHz channel width
+# 3 = 80+80 MHz channel width
+#vht_oper_chwidth=1
+#
+# center freq = 5 GHz + (5 * index)
+# So index 42 gives center freq 5.210 GHz
+# which is channel 42 in 5G band
+#
+#vht_oper_centr_freq_seg0_idx=42
+#
+# center freq = 5 GHz + (5 * index)
+# So index 159 gives center freq 5.795 GHz
+# which is channel 159 in 5G band
+#
+#vht_oper_centr_freq_seg1_idx=159
+
+##### IEEE 802.1X-2004 related configuration ##################################
+
+# Require IEEE 802.1X authorization
+#ieee8021x=1
+
+# IEEE 802.1X/EAPOL version
+# hostapd is implemented based on IEEE Std 802.1X-2004 which defines EAPOL
+# version 2. However, there are many client implementations that do not handle
+# the new version number correctly (they seem to drop the frames completely).
+# In order to make hostapd interoperate with these clients, the version number
+# can be set to the older version (1) with this configuration value.
+#eapol_version=2
+
+# Optional displayable message sent with EAP Request-Identity. The first \0
+# in this string will be converted to ASCII-0 (nul). This can be used to
+# separate network info (comma separated list of attribute=value pairs); see,
+# e.g., RFC 4284.
+#eap_message=hello
+#eap_message=hello\0networkid=netw,nasid=foo,portid=0,NAIRealms=example.com
+
+# WEP rekeying (disabled if key lengths are not set or are set to 0)
+# Key lengths for default/broadcast and individual/unicast keys:
+# 5 = 40-bit WEP (also known as 64-bit WEP with 40 secret bits)
+# 13 = 104-bit WEP (also known as 128-bit WEP with 104 secret bits)
+#wep_key_len_broadcast=5
+#wep_key_len_unicast=5
+# Rekeying period in seconds. 0 = do not rekey (i.e., set keys only once)
+#wep_rekey_period=300
+
+# EAPOL-Key index workaround (set bit7) for WinXP Supplicant (needed only if
+# only broadcast keys are used)
+eapol_key_index_workaround=0
+
+# EAP reauthentication period in seconds (default: 3600 seconds; 0 = disable
+# reauthentication).
+#eap_reauth_period=3600
+
+# Use PAE group address (01:80:c2:00:00:03) instead of individual target
+# address when sending EAPOL frames with driver=wired. This is the most common
+# mechanism used in wired authentication, but it also requires that the port
+# is only used by one station.
+#use_pae_group_addr=1
+
+##### Integrated EAP server ###################################################
+
+# Optionally, hostapd can be configured to use an integrated EAP server
+# to process EAP authentication locally without need for an external RADIUS
+# server. This functionality can be used both as a local authentication server
+# for IEEE 802.1X/EAPOL and as a RADIUS server for other devices.
+
+# Use integrated EAP server instead of external RADIUS authentication
+# server. This is also needed if hostapd is configured to act as a RADIUS
+# authentication server.
+eap_server=0
+
+# Path for EAP server user database
+# If SQLite support is included, this can be set to "sqlite:/path/to/sqlite.db"
+# to use SQLite database instead of a text file.
+#eap_user_file=/etc/hostapd.eap_user
+
+# CA certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#ca_cert=/etc/hostapd.ca.pem
+
+# Server certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#server_cert=/etc/hostapd.server.pem
+
+# Private key matching with the server certificate for EAP-TLS/PEAP/TTLS
+# This may point to the same file as server_cert if both certificate and key
+# are included in a single file. PKCS#12 (PFX) file (.p12/.pfx) can also be
+# used by commenting out server_cert and specifying the PFX file as the
+# private_key.
+#private_key=/etc/hostapd.server.prv
+
+# Passphrase for private key
+#private_key_passwd=secret passphrase
+
+# Server identity
+# EAP methods that provide mechanism for authenticated server identity delivery
+# use this value. If not set, "hostapd" is used as a default.
+#server_id=server.example.com
+
+# Enable CRL verification.
+# Note: hostapd does not yet support CRL downloading based on CDP. Thus, a
+# valid CRL signed by the CA is required to be included in the ca_cert file.
+# This can be done by using PEM format for CA certificate and CRL and
+# concatenating these into one file. Whenever CRL changes, hostapd needs to be
+# restarted to take the new CRL into use.
+# 0 = do not verify CRLs (default)
+# 1 = check the CRL of the user certificate
+# 2 = check all CRLs in the certificate path
+#check_crl=1
+
+# Cached OCSP stapling response (DER encoded)
+# If set, this file is sent as a certificate status response by the EAP server
+# if the EAP peer requests certificate status in the ClientHello message.
+# This cache file can be updated, e.g., by running following command
+# periodically to get an update from the OCSP responder:
+# openssl ocsp \
+#	-no_nonce \
+#	-CAfile /etc/hostapd.ca.pem \
+#	-issuer /etc/hostapd.ca.pem \
+#	-cert /etc/hostapd.server.pem \
+#	-url http://ocsp.example.com:8888/ \
+#	-respout /tmp/ocsp-cache.der
+#ocsp_stapling_response=/tmp/ocsp-cache.der
+
+# dh_file: File path to DH/DSA parameters file (in PEM format)
+# This is an optional configuration file for setting parameters for an
+# ephemeral DH key exchange. In most cases, the default RSA authentication does
+# not use this configuration. However, it is possible setup RSA to use
+# ephemeral DH key exchange. In addition, ciphers with DSA keys always use
+# ephemeral DH keys. This can be used to achieve forward secrecy. If the file
+# is in DSA parameters format, it will be automatically converted into DH
+# params. This parameter is required if anonymous EAP-FAST is used.
+# You can generate DH parameters file with OpenSSL, e.g.,
+# "openssl dhparam -out /etc/hostapd.dh.pem 1024"
+#dh_file=/etc/hostapd.dh.pem
+
+# Fragment size for EAP methods
+#fragment_size=1400
+
+# Finite cyclic group for EAP-pwd. Number maps to group of domain parameters
+# using the IANA repository for IKE (RFC 2409).
+#pwd_group=19
+
+# Configuration data for EAP-SIM database/authentication gateway interface.
+# This is a text string in implementation specific format. The example
+# implementation in eap_sim_db.c uses this as the UNIX domain socket name for
+# the HLR/AuC gateway (e.g., hlr_auc_gw). In this case, the path uses "unix:"
+# prefix. If hostapd is built with SQLite support (CONFIG_SQLITE=y in .config),
+# database file can be described with an optional db=<path> parameter.
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock db=/tmp/hostapd.db
+
+# Encryption key for EAP-FAST PAC-Opaque values. This key must be a secret,
+# random value. It is configured as a 16-octet value in hex format. It can be
+# generated, e.g., with the following command:
+# od -tx1 -v -N16 /dev/random | colrm 1 8 | tr -d ' '
+#pac_opaque_encr_key=000102030405060708090a0b0c0d0e0f
+
+# EAP-FAST authority identity (A-ID)
+# A-ID indicates the identity of the authority that issues PACs. The A-ID
+# should be unique across all issuing servers. In theory, this is a variable
+# length field, but due to some existing implementations requiring A-ID to be
+# 16 octets in length, it is strongly recommended to use that length for the
+# field to provid interoperability with deployed peer implementations. This
+# field is configured in hex format.
+#eap_fast_a_id=101112131415161718191a1b1c1d1e1f
+
+# EAP-FAST authority identifier information (A-ID-Info)
+# This is a user-friendly name for the A-ID. For example, the enterprise name
+# and server name in a human-readable format. This field is encoded as UTF-8.
+#eap_fast_a_id_info=test server
+
+# Enable/disable different EAP-FAST provisioning modes:
+#0 = provisioning disabled
+#1 = only anonymous provisioning allowed
+#2 = only authenticated provisioning allowed
+#3 = both provisioning modes allowed (default)
+#eap_fast_prov=3
+
+# EAP-FAST PAC-Key lifetime in seconds (hard limit)
+#pac_key_lifetime=604800
+
+# EAP-FAST PAC-Key refresh time in seconds (soft limit on remaining hard
+# limit). The server will generate a new PAC-Key when this number of seconds
+# (or fewer) of the lifetime remains.
+#pac_key_refresh_time=86400
+
+# EAP-SIM and EAP-AKA protected success/failure indication using AT_RESULT_IND
+# (default: 0 = disabled).
+#eap_sim_aka_result_ind=1
+
+# Trusted Network Connect (TNC)
+# If enabled, TNC validation will be required before the peer is allowed to
+# connect. Note: This is only used with EAP-TTLS and EAP-FAST. If any other
+# EAP method is enabled, the peer will be allowed to connect without TNC.
+#tnc=1
+
+
+##### IEEE 802.11f - Inter-Access Point Protocol (IAPP) #######################
+
+# Interface to be used for IAPP broadcast packets
+#iapp_interface=eth0
+
+
+##### RADIUS client configuration #############################################
+# for IEEE 802.1X with external Authentication Server, IEEE 802.11
+# authentication with external ACL for MAC addresses, and accounting
+
+# The own IP address of the access point (used as NAS-IP-Address)
+own_ip_addr=127.0.0.1
+
+# Optional NAS-Identifier string for RADIUS messages. When used, this should be
+# a unique to the NAS within the scope of the RADIUS server. For example, a
+# fully qualified domain name can be used here.
+# When using IEEE 802.11r, nas_identifier must be set and must be between 1 and
+# 48 octets long.
+#nas_identifier=ap.example.com
+
+# RADIUS authentication server
+#auth_server_addr=127.0.0.1
+#auth_server_port=1812
+#auth_server_shared_secret=secret
+
+# RADIUS accounting server
+#acct_server_addr=127.0.0.1
+#acct_server_port=1813
+#acct_server_shared_secret=secret
+
+# Secondary RADIUS servers; to be used if primary one does not reply to
+# RADIUS packets. These are optional and there can be more than one secondary
+# server listed.
+#auth_server_addr=127.0.0.2
+#auth_server_port=1812
+#auth_server_shared_secret=secret2
+#
+#acct_server_addr=127.0.0.2
+#acct_server_port=1813
+#acct_server_shared_secret=secret2
+
+# Retry interval for trying to return to the primary RADIUS server (in
+# seconds). RADIUS client code will automatically try to use the next server
+# when the current server is not replying to requests. If this interval is set,
+# primary server will be retried after configured amount of time even if the
+# currently used secondary server is still working.
+#radius_retry_primary_interval=600
+
+
+# Interim accounting update interval
+# If this is set (larger than 0) and acct_server is configured, hostapd will
+# send interim accounting updates every N seconds. Note: if set, this overrides
+# possible Acct-Interim-Interval attribute in Access-Accept message. Thus, this
+# value should not be configured in hostapd.conf, if RADIUS server is used to
+# control the interim interval.
+# This value should not be less 600 (10 minutes) and must not be less than
+# 60 (1 minute).
+#radius_acct_interim_interval=600
+
+# Request Chargeable-User-Identity (RFC 4372)
+# This parameter can be used to configure hostapd to request CUI from the
+# RADIUS server by including Chargeable-User-Identity attribute into
+# Access-Request packets.
+#radius_request_cui=1
+
+# Dynamic VLAN mode; allow RADIUS authentication server to decide which VLAN
+# is used for the stations. This information is parsed from following RADIUS
+# attributes based on RFC 3580 and RFC 2868: Tunnel-Type (value 13 = VLAN),
+# Tunnel-Medium-Type (value 6 = IEEE 802), Tunnel-Private-Group-ID (value
+# VLANID as a string). Optionally, the local MAC ACL list (accept_mac_file) can
+# be used to set static client MAC address to VLAN ID mapping.
+# 0 = disabled (default)
+# 1 = option; use default interface if RADIUS server does not include VLAN ID
+# 2 = required; reject authentication if RADIUS server does not include VLAN ID
+#dynamic_vlan=0
+
+# VLAN interface list for dynamic VLAN mode is read from a separate text file.
+# This list is used to map VLAN ID from the RADIUS server to a network
+# interface. Each station is bound to one interface in the same way as with
+# multiple BSSIDs or SSIDs. Each line in this text file is defining a new
+# interface and the line must include VLAN ID and interface name separated by
+# white space (space or tab).
+# If no entries are provided by this file, the station is statically mapped
+# to <bss-iface>.<vlan-id> interfaces.
+#vlan_file=/etc/hostapd.vlan
+
+# Interface where 802.1q tagged packets should appear when a RADIUS server is
+# used to determine which VLAN a station is on.  hostapd creates a bridge for
+# each VLAN.  Then hostapd adds a VLAN interface (associated with the interface
+# indicated by 'vlan_tagged_interface') and the appropriate wireless interface
+# to the bridge.
+#vlan_tagged_interface=eth0
+
+# Bridge (prefix) to add the wifi and the tagged interface to. This gets the
+# VLAN ID appended. It defaults to brvlan%d if no tagged interface is given
+# and br%s.%d if a tagged interface is given, provided %s = tagged interface
+# and %d = VLAN ID.
+#vlan_bridge=brvlan
+
+# When hostapd creates a VLAN interface on vlan_tagged_interfaces, it needs
+# to know how to name it.
+# 0 = vlan<XXX>, e.g., vlan1
+# 1 = <vlan_tagged_interface>.<XXX>, e.g. eth0.1
+#vlan_naming=0
+
+# Arbitrary RADIUS attributes can be added into Access-Request and
+# Accounting-Request packets by specifying the contents of the attributes with
+# the following configuration parameters. There can be multiple of these to
+# add multiple attributes. These parameters can also be used to override some
+# of the attributes added automatically by hostapd.
+# Format: <attr_id>[:<syntax:value>]
+# attr_id: RADIUS attribute type (e.g., 26 = Vendor-Specific)
+# syntax: s = string (UTF-8), d = integer, x = octet string
+# value: attribute value in format indicated by the syntax
+# If syntax and value parts are omitted, a null value (single 0x00 octet) is
+# used.
+#
+# Additional Access-Request attributes
+# radius_auth_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_auth_req_attr=126:s:Operator
+# Service-Type = Framed (2)
+#radius_auth_req_attr=6:d:2
+# Connect-Info = "testing" (this overrides the automatically generated value)
+#radius_auth_req_attr=77:s:testing
+# Same Connect-Info value set as a hexdump
+#radius_auth_req_attr=77:x:74657374696e67
+
+#
+# Additional Accounting-Request attributes
+# radius_acct_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_acct_req_attr=126:s:Operator
+
+# Dynamic Authorization Extensions (RFC 5176)
+# This mechanism can be used to allow dynamic changes to user session based on
+# commands from a RADIUS server (or some other disconnect client that has the
+# needed session information). For example, Disconnect message can be used to
+# request an associated station to be disconnected.
+#
+# This is disabled by default. Set radius_das_port to non-zero UDP port
+# number to enable.
+#radius_das_port=3799
+#
+# DAS client (the host that can send Disconnect/CoA requests) and shared secret
+#radius_das_client=192.168.1.123 shared secret here
+#
+# DAS Event-Timestamp time window in seconds
+#radius_das_time_window=300
+#
+# DAS require Event-Timestamp
+#radius_das_require_event_timestamp=1
+
+##### RADIUS authentication server configuration ##############################
+
+# hostapd can be used as a RADIUS authentication server for other hosts. This
+# requires that the integrated EAP server is also enabled and both
+# authentication services are sharing the same configuration.
+
+# File name of the RADIUS clients configuration for the RADIUS server. If this
+# commented out, RADIUS server is disabled.
+#radius_server_clients=/etc/hostapd.radius_clients
+
+# The UDP port number for the RADIUS authentication server
+#radius_server_auth_port=1812
+
+# Use IPv6 with RADIUS server (IPv4 will also be supported using IPv6 API)
+#radius_server_ipv6=1
+
+
+##### WPA/IEEE 802.11i configuration ##########################################
+
+# Enable WPA. Setting this variable configures the AP to require WPA (either
+# WPA-PSK or WPA-RADIUS/EAP based on other configuration). For WPA-PSK, either
+# wpa_psk or wpa_passphrase must be set and wpa_key_mgmt must include WPA-PSK.
+# Instead of wpa_psk / wpa_passphrase, wpa_psk_radius might suffice.
+# For WPA-RADIUS/EAP, ieee8021x must be set (but without dynamic WEP keys),
+# RADIUS authentication server must be configured, and WPA-EAP must be included
+# in wpa_key_mgmt.
+# This field is a bit field that can be used to enable WPA (IEEE 802.11i/D3.0)
+# and/or WPA2 (full IEEE 802.11i/RSN):
+# bit0 = WPA
+# bit1 = IEEE 802.11i/RSN (WPA2) (dot11RSNAEnabled)
+#wpa=1
+
+# WPA pre-shared keys for WPA-PSK. This can be either entered as a 256-bit
+# secret in hex format (64 hex digits), wpa_psk, or as an ASCII passphrase
+# (8..63 characters) that will be converted to PSK. This conversion uses SSID
+# so the PSK changes when ASCII passphrase is used and the SSID is changed.
+# wpa_psk (dot11RSNAConfigPSKValue)
+# wpa_passphrase (dot11RSNAConfigPSKPassPhrase)
+#wpa_psk=0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef
+#wpa_passphrase=secret passphrase
+
+# Optionally, WPA PSKs can be read from a separate text file (containing list
+# of (PSK,MAC address) pairs. This allows more than one PSK to be configured.
+# Use absolute path name to make sure that the files can be read on SIGHUP
+# configuration reloads.
+#wpa_psk_file=/etc/hostapd.wpa_psk
+
+# Optionally, WPA passphrase can be received from RADIUS authentication server
+# This requires macaddr_acl to be set to 2 (RADIUS)
+# 0 = disabled (default)
+# 1 = optional; use default passphrase/psk if RADIUS server does not include
+#	Tunnel-Password
+# 2 = required; reject authentication if RADIUS server does not include
+#	Tunnel-Password
+#wpa_psk_radius=0
+
+# Set of accepted key management algorithms (WPA-PSK, WPA-EAP, or both). The
+# entries are separated with a space. WPA-PSK-SHA256 and WPA-EAP-SHA256 can be
+# added to enable SHA256-based stronger algorithms.
+# (dot11RSNAConfigAuthenticationSuitesTable)
+#wpa_key_mgmt=WPA-PSK WPA-EAP
+
+# Set of accepted cipher suites (encryption algorithms) for pairwise keys
+# (unicast packets). This is a space separated list of algorithms:
+# CCMP = AES in Counter mode with CBC-MAC [RFC 3610, IEEE 802.11i/D7.0]
+# TKIP = Temporal Key Integrity Protocol [IEEE 802.11i/D7.0]
+# Group cipher suite (encryption algorithm for broadcast and multicast frames)
+# is automatically selected based on this configuration. If only CCMP is
+# allowed as the pairwise cipher, group cipher will also be CCMP. Otherwise,
+# TKIP will be used as the group cipher.
+# (dot11RSNAConfigPairwiseCiphersTable)
+# Pairwise cipher for WPA (v1) (default: TKIP)
+#wpa_pairwise=TKIP CCMP
+# Pairwise cipher for RSN/WPA2 (default: use wpa_pairwise value)
+#rsn_pairwise=CCMP
+
+# Time interval for rekeying GTK (broadcast/multicast encryption keys) in
+# seconds. (dot11RSNAConfigGroupRekeyTime)
+#wpa_group_rekey=600
+
+# Rekey GTK when any STA that possesses the current GTK is leaving the BSS.
+# (dot11RSNAConfigGroupRekeyStrict)
+#wpa_strict_rekey=1
+
+# Time interval for rekeying GMK (master key used internally to generate GTKs
+# (in seconds).
+#wpa_gmk_rekey=86400
+
+# Maximum lifetime for PTK in seconds. This can be used to enforce rekeying of
+# PTK to mitigate some attacks against TKIP deficiencies.
+#wpa_ptk_rekey=600
+
+# Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up
+# roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN
+# authentication and key handshake before actually associating with a new AP.
+# (dot11RSNAPreauthenticationEnabled)
+#rsn_preauth=1
+#
+# Space separated list of interfaces from which pre-authentication frames are
+# accepted (e.g., 'eth0' or 'eth0 wlan0wds0'. This list should include all
+# interface that are used for connections to other APs. This could include
+# wired interfaces and WDS links. The normal wireless data interface towards
+# associated stations (e.g., wlan0) should not be added, since
+# pre-authentication is only used with APs other than the currently associated
+# one.
+#rsn_preauth_interfaces=eth0
+
+# peerkey: Whether PeerKey negotiation for direct links (IEEE 802.11e) is
+# allowed. This is only used with RSN/WPA2.
+# 0 = disabled (default)
+# 1 = enabled
+#peerkey=1
+
+# ieee80211w: Whether management frame protection (MFP) is enabled
+# 0 = disabled (default)
+# 1 = optional
+# 2 = required
+#ieee80211w=0
+
+# Association SA Query maximum timeout (in TU = 1.024 ms; for MFP)
+# (maximum time to wait for a SA Query response)
+# dot11AssociationSAQueryMaximumTimeout, 1...4294967295
+#assoc_sa_query_max_timeout=1000
+
+# Association SA Query retry timeout (in TU = 1.024 ms; for MFP)
+# (time between two subsequent SA Query requests)
+# dot11AssociationSAQueryRetryTimeout, 1...4294967295
+#assoc_sa_query_retry_timeout=201
+
+# disable_pmksa_caching: Disable PMKSA caching
+# This parameter can be used to disable caching of PMKSA created through EAP
+# authentication. RSN preauthentication may still end up using PMKSA caching if
+# it is enabled (rsn_preauth=1).
+# 0 = PMKSA caching enabled (default)
+# 1 = PMKSA caching disabled
+#disable_pmksa_caching=0
+
+# okc: Opportunistic Key Caching (aka Proactive Key Caching)
+# Allow PMK cache to be shared opportunistically among configured interfaces
+# and BSSes (i.e., all configurations within a single hostapd process).
+# 0 = disabled (default)
+# 1 = enabled
+#okc=1
+
+# SAE threshold for anti-clogging mechanism (dot11RSNASAEAntiCloggingThreshold)
+# This parameter defines how many open SAE instances can be in progress at the
+# same time before the anti-clogging mechanism is taken into use.
+#sae_anti_clogging_threshold=5
+
+# Enabled SAE finite cyclic groups
+# SAE implementation are required to support group 19 (ECC group defined over a
+# 256-bit prime order field). All groups that are supported by the
+# implementation are enabled by default. This configuration parameter can be
+# used to specify a limited set of allowed groups. The group values are listed
+# in the IANA registry:
+# http://www.iana.org/assignments/ipsec-registry/ipsec-registry.xml#ipsec-registry-9
+#sae_groups=19 20 21 25 26
+
+##### IEEE 802.11r configuration ##############################################
+
+# Mobility Domain identifier (dot11FTMobilityDomainID, MDID)
+# MDID is used to indicate a group of APs (within an ESS, i.e., sharing the
+# same SSID) between which a STA can use Fast BSS Transition.
+# 2-octet identifier as a hex string.
+#mobility_domain=a1b2
+
+# PMK-R0 Key Holder identifier (dot11FTR0KeyHolderID)
+# 1 to 48 octet identifier.
+# This is configured with nas_identifier (see RADIUS client section above).
+
+# Default lifetime of the PMK-RO in minutes; range 1..65535
+# (dot11FTR0KeyLifetime)
+#r0_key_lifetime=10000
+
+# PMK-R1 Key Holder identifier (dot11FTR1KeyHolderID)
+# 6-octet identifier as a hex string.
+#r1_key_holder=000102030405
+
+# Reassociation deadline in time units (TUs / 1.024 ms; range 1000..65535)
+# (dot11FTReassociationDeadline)
+#reassociation_deadline=1000
+
+# List of R0KHs in the same Mobility Domain
+# format: <MAC address> <NAS Identifier> <128-bit key as hex string>
+# This list is used to map R0KH-ID (NAS Identifier) to a destination MAC
+# address when requesting PMK-R1 key from the R0KH that the STA used during the
+# Initial Mobility Domain Association.
+#r0kh=02:01:02:03:04:05 r0kh-1.example.com 000102030405060708090a0b0c0d0e0f
+#r0kh=02:01:02:03:04:06 r0kh-2.example.com 00112233445566778899aabbccddeeff
+# And so on.. One line per R0KH.
+
+# List of R1KHs in the same Mobility Domain
+# format: <MAC address> <R1KH-ID> <128-bit key as hex string>
+# This list is used to map R1KH-ID to a destination MAC address when sending
+# PMK-R1 key from the R0KH. This is also the list of authorized R1KHs in the MD
+# that can request PMK-R1 keys.
+#r1kh=02:01:02:03:04:05 02:11:22:33:44:55 000102030405060708090a0b0c0d0e0f
+#r1kh=02:01:02:03:04:06 02:11:22:33:44:66 00112233445566778899aabbccddeeff
+# And so on.. One line per R1KH.
+
+# Whether PMK-R1 push is enabled at R0KH
+# 0 = do not push PMK-R1 to all configured R1KHs (default)
+# 1 = push PMK-R1 to all configured R1KHs whenever a new PMK-R0 is derived
+#pmk_r1_push=1
+
+##### Neighbor table ##########################################################
+# Maximum number of entries kept in AP table (either for neigbor table or for
+# detecting Overlapping Legacy BSS Condition). The oldest entry will be
+# removed when adding a new entry that would make the list grow over this
+# limit. Note! WFA certification for IEEE 802.11g requires that OLBC is
+# enabled, so this field should not be set to 0 when using IEEE 802.11g.
+# default: 255
+#ap_table_max_size=255
+
+# Number of seconds of no frames received after which entries may be deleted
+# from the AP table. Since passive scanning is not usually performed frequently
+# this should not be set to very small value. In addition, there is no
+# guarantee that every scan cycle will receive beacon frames from the
+# neighboring APs.
+# default: 60
+#ap_table_expiration_time=3600
+
+
+##### Wi-Fi Protected Setup (WPS) #############################################
+
+# WPS state
+# 0 = WPS disabled (default)
+# 1 = WPS enabled, not configured
+# 2 = WPS enabled, configured
+#wps_state=2
+
+# Whether to manage this interface independently from other WPS interfaces
+# By default, a single hostapd process applies WPS operations to all configured
+# interfaces. This parameter can be used to disable that behavior for a subset
+# of interfaces. If this is set to non-zero for an interface, WPS commands
+# issued on that interface do not apply to other interfaces and WPS operations
+# performed on other interfaces do not affect this interface.
+#wps_independent=0
+
+# AP can be configured into a locked state where new WPS Registrar are not
+# accepted, but previously authorized Registrars (including the internal one)
+# can continue to add new Enrollees.
+#ap_setup_locked=1
+
+# Universally Unique IDentifier (UUID; see RFC 4122) of the device
+# This value is used as the UUID for the internal WPS Registrar. If the AP
+# is also using UPnP, this value should be set to the device's UPnP UUID.
+# If not configured, UUID will be generated based on the local MAC address.
+#uuid=12345678-9abc-def0-1234-56789abcdef0
+
+# Note: If wpa_psk_file is set, WPS is used to generate random, per-device PSKs
+# that will be appended to the wpa_psk_file. If wpa_psk_file is not set, the
+# default PSK (wpa_psk/wpa_passphrase) will be delivered to Enrollees. Use of
+# per-device PSKs is recommended as the more secure option (i.e., make sure to
+# set wpa_psk_file when using WPS with WPA-PSK).
+
+# When an Enrollee requests access to the network with PIN method, the Enrollee
+# PIN will need to be entered for the Registrar. PIN request notifications are
+# sent to hostapd ctrl_iface monitor. In addition, they can be written to a
+# text file that could be used, e.g., to populate the AP administration UI with
+# pending PIN requests. If the following variable is set, the PIN requests will
+# be written to the configured file.
+#wps_pin_requests=/var/run/hostapd_wps_pin_requests
+
+# Device Name
+# User-friendly description of device; up to 32 octets encoded in UTF-8
+#device_name=Wireless AP
+
+# Manufacturer
+# The manufacturer of the device (up to 64 ASCII characters)
+#manufacturer=Company
+
+# Model Name
+# Model of the device (up to 32 ASCII characters)
+#model_name=WAP
+
+# Model Number
+# Additional device description (up to 32 ASCII characters)
+#model_number=123
+
+# Serial Number
+# Serial number of the device (up to 32 characters)
+#serial_number=12345
+
+# Primary Device Type
+# Used format: <categ>-<OUI>-<subcateg>
+# categ = Category as an integer value
+# OUI = OUI and type octet as a 4-octet hex-encoded value; 0050F204 for
+#       default WPS OUI
+# subcateg = OUI-specific Sub Category as an integer value
+# Examples:
+#   1-0050F204-1 (Computer / PC)
+#   1-0050F204-2 (Computer / Server)
+#   5-0050F204-1 (Storage / NAS)
+#   6-0050F204-1 (Network Infrastructure / AP)
+#device_type=6-0050F204-1
+
+# OS Version
+# 4-octet operating system version number (hex string)
+#os_version=01020300
+
+# Config Methods
+# List of the supported configuration methods
+# Available methods: usba ethernet label display ext_nfc_token int_nfc_token
+#	nfc_interface push_button keypad virtual_display physical_display
+#	virtual_push_button physical_push_button
+#config_methods=label virtual_display virtual_push_button keypad
+
+# WPS capability discovery workaround for PBC with Windows 7
+# Windows 7 uses incorrect way of figuring out AP's WPS capabilities by acting
+# as a Registrar and using M1 from the AP. The config methods attribute in that
+# message is supposed to indicate only the configuration method supported by
+# the AP in Enrollee role, i.e., to add an external Registrar. For that case,
+# PBC shall not be used and as such, the PushButton config method is removed
+# from M1 by default. If pbc_in_m1=1 is included in the configuration file,
+# the PushButton config method is left in M1 (if included in config_methods
+# parameter) to allow Windows 7 to use PBC instead of PIN (e.g., from a label
+# in the AP).
+#pbc_in_m1=1
+
+# Static access point PIN for initial configuration and adding Registrars
+# If not set, hostapd will not allow external WPS Registrars to control the
+# access point. The AP PIN can also be set at runtime with hostapd_cli
+# wps_ap_pin command. Use of temporary (enabled by user action) and random
+# AP PIN is much more secure than configuring a static AP PIN here. As such,
+# use of the ap_pin parameter is not recommended if the AP device has means for
+# displaying a random PIN.
+#ap_pin=12345670
+
+# Skip building of automatic WPS credential
+# This can be used to allow the automatically generated Credential attribute to
+# be replaced with pre-configured Credential(s).
+#skip_cred_build=1
+
+# Additional Credential attribute(s)
+# This option can be used to add pre-configured Credential attributes into M8
+# message when acting as a Registrar. If skip_cred_build=1, this data will also
+# be able to override the Credential attribute that would have otherwise been
+# automatically generated based on network configuration. This configuration
+# option points to an external file that much contain the WPS Credential
+# attribute(s) as binary data.
+#extra_cred=hostapd.cred
+
+# Credential processing
+#   0 = process received credentials internally (default)
+#   1 = do not process received credentials; just pass them over ctrl_iface to
+#	external program(s)
+#   2 = process received credentials internally and pass them over ctrl_iface
+#	to external program(s)
+# Note: With wps_cred_processing=1, skip_cred_build should be set to 1 and
+# extra_cred be used to provide the Credential data for Enrollees.
+#
+# wps_cred_processing=1 will disabled automatic updates of hostapd.conf file
+# both for Credential processing and for marking AP Setup Locked based on
+# validation failures of AP PIN. An external program is responsible on updating
+# the configuration appropriately in this case.
+#wps_cred_processing=0
+
+# AP Settings Attributes for M7
+# By default, hostapd generates the AP Settings Attributes for M7 based on the
+# current configuration. It is possible to override this by providing a file
+# with pre-configured attributes. This is similar to extra_cred file format,
+# but the AP Settings attributes are not encapsulated in a Credential
+# attribute.
+#ap_settings=hostapd.ap_settings
+
+# WPS UPnP interface
+# If set, support for external Registrars is enabled.
+#upnp_iface=br0
+
+# Friendly Name (required for UPnP)
+# Short description for end use. Should be less than 64 characters.
+#friendly_name=WPS Access Point
+
+# Manufacturer URL (optional for UPnP)
+#manufacturer_url=http://www.example.com/
+
+# Model Description (recommended for UPnP)
+# Long description for end user. Should be less than 128 characters.
+#model_description=Wireless Access Point
+
+# Model URL (optional for UPnP)
+#model_url=http://www.example.com/model/
+
+# Universal Product Code (optional for UPnP)
+# 12-digit, all-numeric code that identifies the consumer package.
+#upc=123456789012
+
+# WPS RF Bands (a = 5G, b = 2.4G, g = 2.4G, ag = dual band)
+# This value should be set according to RF band(s) supported by the AP if
+# hw_mode is not set. For dual band dual concurrent devices, this needs to be
+# set to ag to allow both RF bands to be advertized.
+#wps_rf_bands=ag
+
+# NFC password token for WPS
+# These parameters can be used to configure a fixed NFC password token for the
+# AP. This can be generated, e.g., with nfc_pw_token from wpa_supplicant. When
+# these parameters are used, the AP is assumed to be deployed with a NFC tag
+# that includes the matching NFC password token (e.g., written based on the
+# NDEF record from nfc_pw_token).
+#
+#wps_nfc_dev_pw_id: Device Password ID (16..65535)
+#wps_nfc_dh_pubkey: Hexdump of DH Public Key
+#wps_nfc_dh_privkey: Hexdump of DH Private Key
+#wps_nfc_dev_pw: Hexdump of Device Password
+
+##### Wi-Fi Direct (P2P) ######################################################
+
+# Enable P2P Device management
+#manage_p2p=1
+
+# Allow cross connection
+#allow_cross_connection=1
+
+#### TDLS (IEEE 802.11z-2010) #################################################
+
+# Prohibit use of TDLS in this BSS
+#tdls_prohibit=1
+
+# Prohibit use of TDLS Channel Switching in this BSS
+#tdls_prohibit_chan_switch=1
+
+##### IEEE 802.11v-2011 #######################################################
+
+# Time advertisement
+# 0 = disabled (default)
+# 2 = UTC time at which the TSF timer is 0
+#time_advertisement=2
+
+# Local time zone as specified in 8.3 of IEEE Std 1003.1-2004:
+# stdoffset[dst[offset][,start[/time],end[/time]]]
+#time_zone=EST5
+
+# WNM-Sleep Mode (extended sleep mode for stations)
+# 0 = disabled (default)
+# 1 = enabled (allow stations to use WNM-Sleep Mode)
+#wnm_sleep_mode=1
+
+# BSS Transition Management
+# 0 = disabled (default)
+# 1 = enabled
+#bss_transition=1
+
+##### IEEE 802.11u-2011 #######################################################
+
+# Enable Interworking service
+#interworking=1
+
+# Access Network Type
+# 0 = Private network
+# 1 = Private network with guest access
+# 2 = Chargeable public network
+# 3 = Free public network
+# 4 = Personal device network
+# 5 = Emergency services only network
+# 14 = Test or experimental
+# 15 = Wildcard
+#access_network_type=0
+
+# Whether the network provides connectivity to the Internet
+# 0 = Unspecified
+# 1 = Network provides connectivity to the Internet
+#internet=1
+
+# Additional Step Required for Access
+# Note: This is only used with open network, i.e., ASRA shall ne set to 0 if
+# RSN is used.
+#asra=0
+
+# Emergency services reachable
+#esr=0
+
+# Unauthenticated emergency service accessible
+#uesa=0
+
+# Venue Info (optional)
+# The available values are defined in IEEE Std 802.11u-2011, 7.3.1.34.
+# Example values (group,type):
+# 0,0 = Unspecified
+# 1,7 = Convention Center
+# 1,13 = Coffee Shop
+# 2,0 = Unspecified Business
+# 7,1  Private Residence
+#venue_group=7
+#venue_type=1
+
+# Homogeneous ESS identifier (optional; dot11HESSID)
+# If set, this shall be identifical to one of the BSSIDs in the homogeneous
+# ESS and this shall be set to the same value across all BSSs in homogeneous
+# ESS.
+#hessid=02:03:04:05:06:07
+
+# Roaming Consortium List
+# Arbitrary number of Roaming Consortium OIs can be configured with each line
+# adding a new OI to the list. The first three entries are available through
+# Beacon and Probe Response frames. Any additional entry will be available only
+# through ANQP queries. Each OI is between 3 and 15 octets and is configured as
+# a hexstring.
+#roaming_consortium=021122
+#roaming_consortium=2233445566
+
+# Venue Name information
+# This parameter can be used to configure one or more Venue Name Duples for
+# Venue Name ANQP information. Each entry has a two or three character language
+# code (ISO-639) separated by colon from the venue name string.
+# Note that venue_group and venue_type have to be set for Venue Name
+# information to be complete.
+#venue_name=eng:Example venue
+#venue_name=fin:Esimerkkipaikka
+# Alternative format for language:value strings:
+# (double quoted string, printf-escaped string)
+#venue_name=P"eng:Example\nvenue"
+
+# Network Authentication Type
+# This parameter indicates what type of network authentication is used in the
+# network.
+# format: <network auth type indicator (1-octet hex str)> [redirect URL]
+# Network Authentication Type Indicator values:
+# 00 = Acceptance of terms and conditions
+# 01 = On-line enrollment supported
+# 02 = http/https redirection
+# 03 = DNS redirection
+#network_auth_type=00
+#network_auth_type=02http://www.example.com/redirect/me/here/
+
+# IP Address Type Availability
+# format: <1-octet encoded value as hex str>
+# (ipv4_type & 0x3f) << 2 | (ipv6_type & 0x3)
+# ipv4_type:
+# 0 = Address type not available
+# 1 = Public IPv4 address available
+# 2 = Port-restricted IPv4 address available
+# 3 = Single NATed private IPv4 address available
+# 4 = Double NATed private IPv4 address available
+# 5 = Port-restricted IPv4 address and single NATed IPv4 address available
+# 6 = Port-restricted IPv4 address and double NATed IPv4 address available
+# 7 = Availability of the address type is not known
+# ipv6_type:
+# 0 = Address type not available
+# 1 = Address type available
+# 2 = Availability of the address type not known
+#ipaddr_type_availability=14
+
+# Domain Name
+# format: <variable-octet str>[,<variable-octet str>]
+#domain_name=example.com,another.example.com,yet-another.example.com
+
+# 3GPP Cellular Network information
+# format: <MCC1,MNC1>[;<MCC2,MNC2>][;...]
+#anqp_3gpp_cell_net=244,91;310,026;234,56
+
+# NAI Realm information
+# One or more realm can be advertised. Each nai_realm line adds a new realm to
+# the set. These parameters provide information for stations using Interworking
+# network selection to allow automatic connection to a network based on
+# credentials.
+# format: <encoding>,<NAI Realm(s)>[,<EAP Method 1>][,<EAP Method 2>][,...]
+# encoding:
+#	0 = Realm formatted in accordance with IETF RFC 4282
+#	1 = UTF-8 formatted character string that is not formatted in
+#	    accordance with IETF RFC 4282
+# NAI Realm(s): Semi-colon delimited NAI Realm(s)
+# EAP Method: <EAP Method>[:<[AuthParam1:Val1]>][<[AuthParam2:Val2]>][...]
+# AuthParam (Table 8-188 in IEEE Std 802.11-2012):
+# ID 2 = Non-EAP Inner Authentication Type
+#	1 = PAP, 2 = CHAP, 3 = MSCHAP, 4 = MSCHAPV2
+# ID 3 = Inner authentication EAP Method Type
+# ID 5 = Credential Type
+#	1 = SIM, 2 = USIM, 3 = NFC Secure Element, 4 = Hardware Token,
+#	5 = Softoken, 6 = Certificate, 7 = username/password, 9 = Anonymous,
+#	10 = Vendor Specific
+#nai_realm=0,example.com;example.net
+# EAP methods EAP-TLS with certificate and EAP-TTLS/MSCHAPv2 with
+# username/password
+#nai_realm=0,example.org,13[5:6],21[2:4][5:7]
+
+# QoS Map Set configuration
+#
+# Comma delimited QoS Map Set in decimal values
+# (see IEEE Std 802.11-2012, 8.4.2.97)
+#
+# format:
+# [<DSCP Exceptions[DSCP,UP]>,]<UP 0 range[low,high]>,...<UP 7 range[low,high]>
+#
+# There can be up to 21 optional DSCP Exceptions which are pairs of DSCP Value
+# (0..63 or 255) and User Priority (0..7). This is followed by eight DSCP Range
+# descriptions with DSCP Low Value and DSCP High Value pairs (0..63 or 255) for
+# each UP starting from 0. If both low and high value are set to 255, the
+# corresponding UP is not used.
+#
+# default: not set
+#qos_map_set=53,2,22,6,8,15,0,7,255,255,16,31,32,39,255,255,40,47,255,255
+
+##### Hotspot 2.0 #############################################################
+
+# Enable Hotspot 2.0 support
+#hs20=1
+
+# Disable Downstream Group-Addressed Forwarding (DGAF)
+# This can be used to configure a network where no group-addressed frames are
+# allowed. The AP will not forward any group-address frames to the stations and
+# random GTKs are issued for each station to prevent associated stations from
+# forging such frames to other stations in the BSS.
+#disable_dgaf=1
+
+# Operator Friendly Name
+# This parameter can be used to configure one or more Operator Friendly Name
+# Duples. Each entry has a two or three character language code (ISO-639)
+# separated by colon from the operator friendly name string.
+#hs20_oper_friendly_name=eng:Example operator
+#hs20_oper_friendly_name=fin:Esimerkkioperaattori
+
+# Connection Capability
+# This can be used to advertise what type of IP traffic can be sent through the
+# hotspot (e.g., due to firewall allowing/blocking protocols/ports).
+# format: <IP Protocol>:<Port Number>:<Status>
+# IP Protocol: 1 = ICMP, 6 = TCP, 17 = UDP
+# Port Number: 0..65535
+# Status: 0 = Closed, 1 = Open, 2 = Unknown
+# Each hs20_conn_capab line is added to the list of advertised tuples.
+#hs20_conn_capab=1:0:2
+#hs20_conn_capab=6:22:1
+#hs20_conn_capab=17:5060:0
+
+# WAN Metrics
+# format: <WAN Info>:<DL Speed>:<UL Speed>:<DL Load>:<UL Load>:<LMD>
+# WAN Info: B0-B1: Link Status, B2: Symmetric Link, B3: At Capabity
+#    (encoded as two hex digits)
+#    Link Status: 1 = Link up, 2 = Link down, 3 = Link in test state
+# Downlink Speed: Estimate of WAN backhaul link current downlink speed in kbps;
+#	1..4294967295; 0 = unknown
+# Uplink Speed: Estimate of WAN backhaul link current uplink speed in kbps
+#	1..4294967295; 0 = unknown
+# Downlink Load: Current load of downlink WAN connection (scaled to 255 = 100%)
+# Uplink Load: Current load of uplink WAN connection (scaled to 255 = 100%)
+# Load Measurement Duration: Duration for measuring downlink/uplink load in
+# tenths of a second (1..65535); 0 if load cannot be determined
+#hs20_wan_metrics=01:8000:1000:80:240:3000
+
+# Operating Class Indication
+# List of operating classes the BSSes in this ESS use. The Global operating
+# classes in Table E-4 of IEEE Std 802.11-2012 Annex E define the values that
+# can be used in this.
+# format: hexdump of operating class octets
+# for example, operating classes 81 (2.4 GHz channels 1-13) and 115 (5 GHz
+# channels 36-48):
+#hs20_operating_class=5173
+
+##### TESTING OPTIONS #########################################################
+#
+# The options in this section are only available when the build configuration
+# option CONFIG_TESTING_OPTIONS is set while compiling hostapd. They allow
+# testing some scenarios that are otherwise difficult to reproduce.
+#
+# Ignore probe requests sent to hostapd with the given probability, must be a
+# floating point number in the range [0, 1).
+#ignore_probe_probability=0.0
+#
+# Ignore authentication frames with the given probability
+#ignore_auth_probability=0.0
+#
+# Ignore association requests with the given probability
+#ignore_assoc_probability=0.0
+#
+# Ignore reassociation requests with the given probability
+#ignore_reassoc_probability=0.0
+#
+# Corrupt Key MIC in GTK rekey EAPOL-Key frames with the given probability
+#corrupt_gtk_rekey_mic_probability=0.0
+
+##### Multiple BSSID support ##################################################
+#
+# Above configuration is using the default interface (wlan#, or multi-SSID VLAN
+# interfaces). Other BSSIDs can be added by using separator 'bss' with
+# default interface name to be allocated for the data packets of the new BSS.
+#
+# hostapd will generate BSSID mask based on the BSSIDs that are
+# configured. hostapd will verify that dev_addr & MASK == dev_addr. If this is
+# not the case, the MAC address of the radio must be changed before starting
+# hostapd (ifconfig wlan0 hw ether <MAC addr>). If a BSSID is configured for
+# every secondary BSS, this limitation is not applied at hostapd and other
+# masks may be used if the driver supports them (e.g., swap the locally
+# administered bit)
+#
+# BSSIDs are assigned in order to each BSS, unless an explicit BSSID is
+# specified using the 'bssid' parameter.
+# If an explicit BSSID is specified, it must be chosen such that it:
+# - results in a valid MASK that covers it and the dev_addr
+# - is not the same as the MAC address of the radio
+# - is not the same as any other explicitly specified BSSID
+#
+# Please note that hostapd uses some of the values configured for the first BSS
+# as the defaults for the following BSSes. However, it is recommended that all
+# BSSes include explicit configuration of all relevant configuration items.
+#
+#bss=wlan0_0
+#ssid=test2
+# most of the above items can be used here (apart from radio interface specific
+# items, like channel)
+
+#bss=wlan0_1
+#bssid=00:13:10:95:fe:0b
+# ...
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/kmsg.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/kmsg.sh
new file mode 100644
index 0000000000000..b8e2fc7f8ea96
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/kmsg.sh
@@ -0,0 +1,2 @@
+#/bin/bash
+tail -f /var/log/kern.log
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/license.txt b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/license.txt
new file mode 100644
index 0000000000000..e62ccce127beb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/license.txt
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_ap_sta.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_ap_sta.sh
new file mode 100644
index 0000000000000..1474544e9ed1e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_ap_sta.sh
@@ -0,0 +1,105 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "1.Copy firmware"
+echo "=================================================="
+cp ../image/ssv6200-sw.bin /lib/firmware/
+
+echo "=================================================="
+echo "1.Unload Module"
+echo "=================================================="
+./unload_ap.sh
+./unload.sh
+./clean_log.sh
+
+echo "=================================================="
+echo "2.Set Hardware Capability"
+echo "=================================================="
+ifconfig eth0 down
+ifconfig eth0 > /dev/null
+if [ $? ]; then
+    eth0_local_mac=`ifconfig eth0  | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g' | cut -d ':' -f 4,5,6`
+    echo Use eth0 MAC address. 
+else
+    eth0_local_mac="45:67:89"
+    echo No eth0 found use defaul MAC address.
+fi
+
+ap_prefix=`echo $eth0_local_mac | cut -d ':' -f 1,2`
+ap_prefix=`echo $ap_prefix | sed -e 's/://g'`
+
+local_mac=00:a8:b8:$eth0_local_mac
+local_mac_2=`echo $local_mac | cut -d ':' -f 6`
+local_mac_2=`printf '%x' $[ ( 16#$local_mac_2 + 1 ) % 4 + ( 16#$local_mac_2 & 16#FC ) ] `
+ap_prefix="AP_$ap_prefix$local_mac_2"
+local_mac_2="`echo $local_mac | cut -d ':' -f 1,2,3,4,5`:$local_mac_2"
+
+echo Primary WLAN MAC is $local_mac
+echo Secondary WLAN MAC is $local_mac_2
+    
+cat sta.cfg.template | sed -e "s/MAC_ADDR/$local_mac/g" | sed -e "s/MAC2ADDR/$local_mac_2/g" > sta_local_mac.cfg
+./ssvcfg.sh sta_local_mac.cfg
+
+echo "=================================================="
+echo "3.Load MMC Module"
+echo "=================================================="
+modprobe mmc_core
+modprobe sdhci
+modprobe sdhci-pci
+modprobe mmc_block
+
+echo "=================================================="
+echo "4.Load SSV6200 Driver"
+echo "=================================================="
+echo 6 > /proc/sys/kernel/printk
+
+modprobe ssv6200_sdio
+
+sleep 1
+
+ssv_phy=`./find_ssv_phy`
+if [ -z "$ssv_phy" ]; then
+    echo SSV PHY device not found.;
+    exit 1;
+fi
+
+ssv_wlan_1=`./find_ssv_wlan`
+if [ -z "$ssv_wlan_1" ]; then
+    echo SSV primary WLAN device not found.;
+    exit 1;
+fi
+
+echo "Primary SSV WLAN interface is $ssv_wlan_1"
+
+ssv_wlan_2=`echo $ssv_wlan_1 | sed -e s/wlan//g`
+ssv_wlan_2=`expr $ssv_wlan_2 + 1`
+ssv_wlan_2="wlan$ssv_wlan_2"
+echo Second WLAN interface is $ssv_wlan_2
+
+echo "Add second interface $ssv_wlan_2 to SSV PHY device $ssv_phy"
+iw $ssv_phy interface add $ssv_wlan_2 type station
+
+sleep 1
+
+trap handle_stop INT
+
+function handle_stop() {
+    nmcli nm wifi on
+
+    ./unload_ap.sh
+    ./unload.sh
+    
+    ifconfig eth0 up
+    
+    echo AP mode stopped
+}
+        
+ssv_wlans="`./find_ssv_wlan`"
+for ssv_wlan in $ssv_wlans; do
+    if [ $ssv_wlan != $ssv_wlan_1 ]; then
+        echo Second SSV WLAN device is actually $ssv_wlan
+        ./ap_sta.sh $ssv_wlan $ssv_wlan_1 $ap_prefix
+        break;
+    fi
+done
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_unload.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_unload.sh
new file mode 100644
index 0000000000000..4f97e3d43ad5e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/load_unload.sh
@@ -0,0 +1,12 @@
+#/bin/bash
+#load/unload driver
+
+count=0
+S=1
+while [ "$S" == "1" ]
+do
+    ./unload.sh
+    ./load.sh
+    sleep 10
+done
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p-action.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p-action.sh
new file mode 100644
index 0000000000000..b4e6b1161af54
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p-action.sh
@@ -0,0 +1,115 @@
+#!/bin/sh
+
+IFNAME=$1
+CMD=$2
+
+kill_daemon() {
+    NAME=$1
+    PF=$2
+
+    if [ ! -r $PF ]; then
+	return
+    fi
+
+    PID=`cat $PF`
+    if [ $PID -gt 0 ]; then
+	if ps $PID | grep -q $NAME; then
+	    kill $PID
+	fi
+    fi
+    rm $PF
+}
+
+
+echo "$1 $2 $3 $4"
+if [ "$CMD" = "P2P-GROUP-STARTED" ]; then
+    GIFNAME=$3
+    echo "P2P-GROUP-STARTED $3 $4"
+    if [ "$4" = "GO" ]; then
+	kill_daemon dhclient /var/run/dhclient-$GIFNAME.pid
+	rm /var/run/dhclient.leases-$GIFNAME
+	kill_daemon dnsmasq /var/run/dnsmasq.pid-$GIFNAME
+	ifconfig $GIFNAME 192.168.42.1 up
+	if ! dnsmasq -x /var/run/dnsmasq.pid-$GIFNAME \
+	    -i $GIFNAME \
+	    -F192.168.42.11,192.168.42.99; then
+	    # another dnsmasq instance may be running and blocking us; try to
+	    # start with -z to avoid that
+	    dnsmasq -x /var/run/dnsmasq.pid-$GIFNAME \
+		-i $GIFNAME \
+		-F192.168.42.11,192.168.42.99 --listen-address 192.168.42.1 -z -p 0
+	fi
+    fi
+    if [ "$4" = "client" ]; then
+	kill_daemon dhclient /var/run/dhclient-$GIFNAME.pid
+	rm /var/run/dhclient.leases-$GIFNAME
+	kill_daemon dnsmasq /var/run/dnsmasq.pid-$GIFNAME
+	ipaddr=`echo "$*" | sed 's/.* ip_addr=\([^ ]*\).*/\1/'`
+	ipmask=`echo "$*" | sed 's/.* ip_mask=\([^ ]*\).*/\1/'`
+	goipaddr=`echo "$*" | sed 's/.* go_ip_addr=\([^ ]*\).*/\1/'`
+	if echo "$ipaddr$ipmask$goipaddr" | grep -q ' '; then
+	    ipaddr=""
+	    ipmask=""
+	    goipaddr=""
+	fi
+	if [ -n "$ipaddr" ]; then
+	    sudo ifconfig $GIFNAME "$ipaddr" netmask "$ipmask"
+	    sudo ip ro re default via "$goipaddr"
+	    exit 0
+	fi
+	dhclient -pf /var/run/dhclient-$GIFNAME.pid \
+	    -lf /var/run/dhclient.leases-$GIFNAME \
+	    -nw \
+	    $GIFNAME
+    fi
+fi
+#if [ "$CMD" = "CONNECTED" ]; then
+
+#   echo connect $IFNAME, dhclient for it > /dev/console
+
+#   dhclient $IFNAME
+
+#fi
+
+#if [ "$CMD" = "DISCONNECTED" ]; then
+
+#   echo disconnect $IFNAME, kill dhclient for it > /dev/console
+
+#   killall dhclient
+
+#fi
+
+if [ "$CMD" = "P2P-GROUP-REMOVED" ]; then
+    GIFNAME=$3
+    if [ "$4" = "GO" ]; then
+	kill_daemon dnsmasq /var/run/dnsmasq.pid-$GIFNAME
+	ifconfig $GIFNAME 0.0.0.0
+    fi
+    if [ "$4" = "client" ]; then
+	kill_daemon dhclient /var/run/dhclient-$GIFNAME.pid
+	rm /var/run/dhclient.leases-$GIFNAME
+	ifconfig $GIFNAME 0.0.0.0
+    fi
+fi
+
+if [ "$CMD" = "P2P-CROSS-CONNECT-ENABLE" ]; then
+    GIFNAME=$3
+    UPLINK=$4
+    echo "p2p-corss-connect-enable ifname=$GIFNAME upLink=$UPLINK"
+    # enable NAT/masquarade $GIFNAME -> $UPLINK
+    iptables -P FORWARD DROP
+    iptables -t nat -A POSTROUTING -o $UPLINK -j MASQUERADE
+    iptables -A FORWARD -i $UPLINK -o $GIFNAME -m state --state RELATED,ESTABLISHED -j ACCEPT
+    iptables -A FORWARD -i $GIFNAME -o $UPLINK -j ACCEPT
+    sysctl net.ipv4.ip_forward=1
+fi
+
+if [ "$CMD" = "P2P-CROSS-CONNECT-DISABLE" ]; then
+    GIFNAME=$3
+    UPLINK=$4
+    # disable NAT/masquarade $GIFNAME -> $UPLINK
+    sysctl net.ipv4.ip_forward=0
+    iptables -t nat -D POSTROUTING -o $UPLINK -j MASQUERADE
+    iptables -D FORWARD -i $UPLINK -o $GIFNAME -m state --state RELATED,ESTABLISHED -j ACCEPT
+    iptables -D FORWARD -i $GIFNAME -o $UPLINK -j ACCEPT
+fi
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p.conf.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p.conf.template
new file mode 100644
index 0000000000000..e81e1c085a614
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p.conf.template
@@ -0,0 +1,21 @@
+ctrl_interface=/var/run/wpa_supplicant
+update_config=0
+uuid=12345678-9abc-def0-1234-56789abcde22
+max_num_sta=1
+device_name=X86-Platform-P2P
+manufacturer=iComm Corporation
+model_name=Wi-Fi reference chip
+model_number=123
+serial_number=MAC_ADDR
+device_type=1-0050F204-1
+os_version=01020300
+config_methods=display push_button virtual_display virtual_push_button
+p2p_listen_reg_class=81
+p2p_listen_channel=11
+p2p_oper_reg_class=81
+p2p_oper_channel=11
+p2p_go_intent=7
+p2p_no_group_iface=1
+p2p_intra_bss=1
+persistent_reconnect=1
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_dual.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_dual.sh
new file mode 100644
index 0000000000000..71deba9c2e6a4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_dual.sh
@@ -0,0 +1,102 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "1.Copy firmware"
+echo "=================================================="
+cp ../image/ssv6200-sw.bin /lib/firmware/
+
+echo "=================================================="
+echo "1.Unload Module"
+echo "=================================================="
+./unload_ap.sh
+./unload.sh
+./clean_log.sh
+
+nmcli nm wifi off
+sudo rfkill unblock wlan
+
+echo "=================================================="
+echo "2.Set Hardware Capability"
+echo "=================================================="
+#ifconfig eth0 down
+#ifconfig eth0 > /dev/null
+if [ $? ]; then
+    eth0_local_mac=`ifconfig eth0  | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g' | cut -d ':' -f 4,5,6`
+    echo Use eth0 MAC address. 
+else
+    eth0_local_mac="45:67:89"
+    echo No eth0 found use defaul MAC address.
+fi
+
+local_mac=00:a8:b8:$eth0_local_mac
+local_mac_2=`echo $local_mac | cut -d ':' -f 6`
+local_mac_2=`printf '%x' $[ ( 16#$local_mac_2 + 1 ) % 4 + ( 16#$local_mac_2 & 16#FC ) ] `
+local_mac_2="`echo $local_mac | cut -d ':' -f 1,2,3,4,5`:$local_mac_2"
+
+echo Primary WLAN MAC is $local_mac
+echo Secondary WLAN MAC is $local_mac_2
+    
+cat sta.cfg.template | sed -e "s/MAC_ADDR/$local_mac/g" | sed -e "s/MAC2ADDR/$local_mac_2/g" > sta.cfg
+./ssvcfg.sh sta.cfg
+echo ----Secondary WLAN MAC is $local_mac_2
+
+echo "=================================================="
+echo "3.Load MMC Module"
+echo "=================================================="
+modprobe mmc_core
+modprobe sdhci
+modprobe sdhci-pci
+modprobe mmc_block
+
+echo "=================================================="
+echo "4.Load SSV6200 Driver"
+echo "=================================================="
+echo 6 > /proc/sys/kernel/printk
+
+modprobe ssv6200_sdio
+
+sleep 1
+
+ssv_phy=`./find_ssv_phy`
+if [ -z "$ssv_phy" ]; then
+    echo SSV PHY device not found.;
+    exit 1;
+fi
+
+ssv_wlan_1=`./find_ssv_wlan`
+if [ -z "$ssv_wlan_1" ]; then
+    echo SSV primary WLAN device not found.;
+    exit 1;
+fi
+
+echo "Primary SSV WLAN interface is $ssv_wlan_1"
+
+ssv_wlan_2=`echo $ssv_wlan_1 | sed -e s/wlan//g`
+ssv_wlan_2=`expr $ssv_wlan_2 + 1`
+ssv_wlan_2="wlan$ssv_wlan_2"
+echo Second WLAN interface is $ssv_wlan_2
+
+echo "Add second interface $ssv_wlan_2 to SSV PHY device $ssv_phy"
+iw $ssv_phy interface add $ssv_wlan_2 type  __p2pcl
+sleep 1
+ssv_wlans="`./find_ssv_wlan`"
+for ssv_wlan in $ssv_wlans; do
+    if [ $ssv_wlan != $ssv_wlan_1 ]; then
+            echo Second SSV WLAN device is actually $ssv_wlan
+#            ifconfig $ssv_wlan up
+            ssv_wlan_2=$ssv_wlan
+                            break;
+    fi
+done 
+#ifconfig $ssv_wlan_1 up
+
+cat wpa.conf.template | sed -e "s/MAC_ADDR/$local_mac/g"  > wpa.cfg
+cat p2p.conf.template | sed -e "s/MAC_ADDR/$local_mac_2/g" > p2p.cfg
+
+killall wpa_supplicant
+rm -rf log
+sleep 3
+
+wpa_supplicant -i $ssv_wlan_2 -c p2p.cfg -D nl80211 -N -i $ssv_wlan_1 -c wpa.cfg -D nl80211
+
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_single.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_single.sh
new file mode 100644
index 0000000000000..e3df92e98cd3f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/p2p_single.sh
@@ -0,0 +1,87 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "1.Copy firmware"
+echo "=================================================="
+cp ../image/ssv6200-sw.bin /lib/firmware/
+
+echo "=================================================="
+echo "1.Unload Module"
+echo "=================================================="
+./unload_ap.sh
+./unload.sh
+./clean_log.sh
+
+nmcli nm wifi off
+sudo rfkill unblock wlan
+
+echo "=================================================="
+echo "2.Set Hardware Capability"
+echo "=================================================="
+#ifconfig eth0 down
+#ifconfig eth0 > /dev/null
+if [ $? ]; then
+    eth0_local_mac=`ifconfig eth0  | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g' | cut -d ':' -f 4,5,6`
+    echo Use eth0 MAC address. 
+else
+    eth0_local_mac="45:67:89"
+    echo No eth0 found use defaul MAC address.
+fi
+
+#local_mac=00:a8:b8:01:79:55
+local_mac=00:a8:b8:$eth0_local_mac
+local_mac_2=`echo $local_mac | cut -d ':' -f 6`
+local_mac_2=`printf '%x' $[ ( 16#$local_mac_2 + 1 ) % 4 + ( 16#$local_mac_2 & 16#FC ) ] `
+local_mac_2="`echo $local_mac | cut -d ':' -f 1,2,3,4,5`:$local_mac_2"
+
+echo Primary WLAN MAC is $local_mac
+    
+cat sta.cfg.template | sed -e "s/MAC_ADDR/$local_mac/g" | sed -e "s/MAC2ADDR/$local_mac_2/g" > sta.cfg
+./ssvcfg.sh sta.cfg
+
+echo "=================================================="
+echo "3.Load MMC Module"
+echo "=================================================="
+modprobe mmc_core
+modprobe sdhci
+modprobe sdhci-pci
+modprobe mmc_block
+
+echo "=================================================="
+echo "4.Load SSV6200 Driver"
+echo "=================================================="
+echo 6 > /proc/sys/kernel/printk
+
+modprobe ssv6200_sdio
+
+sleep 1
+
+ssv_phy=`./find_ssv_phy`
+if [ -z "$ssv_phy" ]; then
+    echo SSV PHY device not found.;
+    exit 1;
+fi
+
+ssv_wlan_1=`./find_ssv_wlan`
+if [ -z "$ssv_wlan_1" ]; then
+    echo SSV primary WLAN device not found.;
+    exit 1;
+fi
+
+echo "Primary SSV WLAN interface is $ssv_wlan_1"
+
+cat p2p.conf.template | sed -e "s/MAC_ADDR/$local_mac/g" > p2p.cfg
+
+killall wpa_supplicant
+
+pi=$(pidof dnsmasq)
+if [ $pi ]; then
+	echo "kill dnsmasq pid=$pi"
+	kill -9 $pi  
+fi
+
+rm -rf log
+sleep 3
+wpa_supplicant -i $ssv_wlan_1 -c p2p.cfg -D nl80211
+ 
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pack b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pack
new file mode 100644
index 0000000000000..58ef0ea109269
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pack
@@ -0,0 +1,45 @@
+#!/bin/bash
+
+TARGET_DIR=pack
+
+rm -rf $TARGET_DIR
+
+src_c=`find . -name "*.c"`
+src_h=`find . -name "*.h"`
+src_mk=`find . \( -name Makefile -o -name "*.mak" \)`
+
+mkdir -p /tmp/pack > /dev/null
+
+# Process each source code in .c and .h.
+for src in $src_c $src_h; do
+        mkdir -p "/tmp/pack/`dirname $src`" > /dev/null
+	echo "Processing $src..."        
+	dir="$TARGET_DIR/`dirname $src`"
+	src_name="`basename $src`"
+	if [ ! -d $dir ]; then
+		mkdir -p $dir
+	fi
+	# Remove comment using preprocessor.
+	# And use indent to make the result comfort to Linux coding style
+	cat script/license.txt > "$dir/$src_name"
+	gcc -fpreprocessed -dD -E -P -std=gnu99 $src > /tmp/pack/$src
+	#cat /tmp/pack/$src | \
+	#indent -bad -bap -bbb -nbc -bbo -hnl -br -brs -c33 -cd33 -ncdb -ce -ci4 \
+	#-cli0 -d0 -di1 -nfc1 -i8 -ip0 -l80 -lp -npcs -nprs -npsl -sai \
+	#-saf -saw -ncs -nsc -sob -nfca -cp33 -ss -ts8 -il1 /tmp/pack/$src -o "$dir/$src_name"
+	clang-format-3.4 -style='{BasedOnStyle: LLVM, UseTab: Always, IndentWidth: 8, BreakBeforeBraces: Linux, AllowShortIfStatementsOnASingleLine: false, IndentCaseLabels: false}' \
+	    /tmp/pack/$src > "$dir/$src_name"
+	#$src | script/stripcmt > "$dir/$src_name"
+done
+
+# Copy every Makefile
+for src in $src_mk; do
+	cp $src "$TARGET_DIR/$src"
+done
+
+# No firmware code
+rm -rf "$TARGET_DIR/smac/firmware"
+rm -rf "$TARGET_DIR/ssv6200fmac"
+
+# Copy scripts and FW image
+cp -r image script *.sh $TARGET_DIR
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pre-regular-test.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pre-regular-test.sh
new file mode 100644
index 0000000000000..2a2c22f3d37bf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/pre-regular-test.sh
@@ -0,0 +1,17 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "For regular test, create files for Disable AMPDU"
+echo "Output files on driver root directory:"
+echo " load1.sh"
+echo " ssvcfg1.sh"
+echo " sta1.sh"
+echo "=================================================="
+cp ../load.sh ../load1.sh
+cp ../ssvcfg.sh ../ssvcfg1.sh
+cp ../sta.cfg ../sta1.cfg
+
+find ../load1.sh | xargs -i sed -i 's/ssvcfg.sh/ssvcfg1.sh/g' {}
+find ../ssvcfg1.sh | xargs -i sed -i 's/sta.cfg/sta1.cfg/g' {}
+find ../sta1.cfg | xargs -i sed -i 's/hw_cap_ampdu_rx = on/hw_cap_ampdu_rx = off/g' {}
+find ../sta1.cfg | xargs -i sed -i 's/hw_cap_ampdu_tx = on/hw_cap_ampdu_tx = off/g' {}
\ No newline at end of file
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redoall b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redoall
new file mode 100644
index 0000000000000..a7ae1a6a22b3f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redoall
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+./redofw
+./redodrv
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redodrv b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redodrv
new file mode 100644
index 0000000000000..30176680b9da1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redodrv
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+if [ "`whoami`" != "root" ]; then
+    echo Need to be root to execute.;
+    exit 1;
+fi
+
+
+./unload.sh
+./scratch
+./clean_log.sh
+# ./sta.sh
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redofw b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redofw
new file mode 100644
index 0000000000000..fc83b08a423d7
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/redofw
@@ -0,0 +1,4 @@
+#!/bin/sh
+
+cd ../smac/firmware
+./firmware-build.sh
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/release b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/release
new file mode 100644
index 0000000000000..a6f39bcb08427
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/release
@@ -0,0 +1,44 @@
+#!/bin/bash
+
+#TARGET_DIR=pack
+#rm -rf $TARGET_DIR
+TARGET_DIR=.
+
+src_c=`find . -name "*.c"`
+src_h=`find . -name "*.h"`
+src_mk=`find . \( -name Makefile -o -name "*.mak" \)`
+
+mkdir -p /tmp/pack > /dev/null
+
+# Process each source code in .c and .h.
+for src in $src_c $src_h; do
+        mkdir -p "/tmp/pack/`dirname $src`" > /dev/null
+	echo "Processing $src..."        
+	dir="$TARGET_DIR/`dirname $src`"
+	src_name="`basename $src`"
+	if [ ! -d $dir ]; then
+		mkdir -p $dir
+	fi
+	# Remove comment using preprocessor.
+	# And use indent to make the result comfort to Linux coding style
+	cat script/license.txt > /tmp/pack/$src
+	gcc -fpreprocessed -dD -E -P -std=gnu99 $src >> /tmp/pack/$src
+	#cat /tmp/pack/$src | \
+	#indent -bad -bap -bbb -nbc -bbo -hnl -br -brs -c33 -cd33 -ncdb -ce -ci4 \
+	#-cli0 -d0 -di1 -nfc1 -i8 -ip0 -l80 -lp -npcs -nprs -npsl -sai \
+	#-saf -saw -ncs -nsc -sob -nfca -cp33 -ss -ts8 -il1 /tmp/pack/$src -o "$dir/$src_name"
+	#clang-format-3.4 -style='{BasedOnStyle: LLVM, UseTab: Always, IndentWidth: 8, BreakBeforeBraces: Linux, AllowShortIfStatementsOnASingleLine: false, IndentCaseLabels: false}' /tmp/pack/$src > "$dir/$src_name"
+	cp /tmp/pack/$src "$dir/$src_name"
+	#$src | script/stripcmt > "$dir/$src_name"
+done
+
+# Copy every Makefile
+#for src in $src_mk; do
+#	cp $src "$TARGET_DIR/$src"
+#done
+
+# No firmware code
+rm -rf "$TARGET_DIR/smac/firmware"
+
+# Copy scripts and FW image
+cp -r image script *.sh $TARGET_DIR
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan.cfg
new file mode 100644
index 0000000000000..6002b36e18c28
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan.cfg
@@ -0,0 +1,9 @@
+total_times_of_unload/reload = 2200
+target_IP_for_pinging = 192.168.1.1
+timeout_period = 20
+# OPEN, WPA/WPA2
+security = WPA2
+device_name = wlan16
+SSID = QA.ASUS
+PSK_phrase = qqqqqqqq
+scan_times = 10
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_conn.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_conn.sh
new file mode 100644
index 0000000000000..cd558e7815b99
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_conn.sh
@@ -0,0 +1,148 @@
+#!/bin/bash
+
+wpa_ret ( )
+{
+	if [ $1 != "OK" ]
+		then
+		if [ $3 == 1 ]
+			then
+			wpa_cli remove_network $2>/dev/null
+			echo "wpa_cli command failed on $2"
+		fi
+		exit 1
+	fi
+}
+
+connect_ap ( )
+{
+	#if [ $1 -eq 1 ]
+		#then
+		ssid=\""$2"\"
+		pw=\""$3"\"
+		declare -i scantimes=1
+		nw_no=$(wpa_cli add_network | sed '1d')
+		ret=$(wpa_cli set_network $nw_no ssid $ssid | sed '1d')
+		echo "Set ssid for nw $nw_no: $ret"
+		wpa_ret $ret $nw_no 1
+		if [ $5 == "WPA" -o $5 == "WPA2" ]
+			then
+			ret=$(wpa_cli set_network $nw_no psk $pw | sed '1d')
+                       	echo "Set PSK: $ret"
+                        wpa_ret $ret $nw_no 1
+		elif [ $5 == "WEP40" -o $5 == "WEP128" -o $5 == "OPEN" ]
+			then
+			ret=$(wpa_cli set_network $nw_no key_mgmt NONE | sed '1d')
+                       	echo "Set Key-mgmt: $ret"
+                        wpa_ret $ret $nw_no 1
+			ret=$(wpa_cli set_network $nw_no auth_alg OPEN | sed '1d')
+                        echo "Set Aith-alg: $ret"
+                        wpa_ret $ret $nw_no 1
+			if [ $5 != "OPEN" ]
+				then
+				ret=$(wpa_cli set_network $nw_no wep_key0 $pw | sed '1d')
+                        	echo "Set wep key: $ret"
+                        	wpa_ret $ret $nw_no 1
+			fi
+		fi 
+		#echo "Set proto"
+		#ret=$(wpa_cli set_network $nw_no proto WPA | sed '1d')
+		#wpa_cli status #echo $ret
+		#wpa_ret $ret $nw_no 1	
+		#echo "Set key_mgmt"
+		#ret=$(wpa_cli set_network $nw_no key_mgmt WPA-PSK | sed '1d')
+		#wpa_cli status #echo $ret
+		#wpa_ret $ret $nw_no 1	
+		#echo "Set pairwise"
+		#ret=$(wpa_cli set_network $nw_no pairwise CCMP | sed '1d')
+		#wpa_cli status #echo $ret
+		#wpa_ret $ret $nw_no 1	
+		#echo "Set group"
+		#ret=$(wpa_cli set_network $nw_no group CCMP | sed '1d')
+		#wpa_cli status #echo $ret
+		#wpa_ret $ret $nw_no 1	
+		ret=$(wpa_cli enable_network $nw_no | sed '1d')
+		echo "Enable nw $nw_no: $ret"
+		wpa_ret $ret $nw_no 1	
+		#echo "Connect"
+		#ret=$(wpa_cli reconnect | sed '1d')
+		#wpa_cli status #echo $ret
+		#wpa_ret $ret $nw_no 1	
+		state=$(wpa_cli status -i $1 | grep wpa_state | sed 's/wpa_state=//g')
+		form_st="INACTIVE"
+		while [ $state != "COMPLETED" ]
+		do
+			if [ $form_st != $state ]
+				then
+				echo "Status: $state"
+			fi
+			if [ $state == "SCANNING" ]
+				then
+				sleep 1
+			elif [ $state == "DISCONNECTED" ]
+				then
+				if [ $scantimes <= $4]
+					then
+					echo "Connect"
+                			ret=$(wpa_cli reconnect | sed '1d')
+					wpa_ret $ret $nw_no 1
+					$scantimes=$scantimes + 1
+				else
+					echo "exceed scan times=$scantimes"
+				fi
+			fi
+			form_st=$state
+			state=$(wpa_cli status -i $1 | grep wpa_state | sed 's/wpa_state=//g')
+		done
+		if [ $state == "COMPLETED" ]
+			then
+			echo "Connected and request for IP address"
+			dhclient -4 $1 >/dev/null
+		fi
+	#fi
+}
+
+if [ $# -eq 5 ]
+	then
+	echo "Scanning"
+	declare -i total_scantime=$4
+        for((i=1; i<=$4; i=i+1))
+	do
+		echo "scan loop:$i" 
+		scan_st=$(wpa_cli scan -i $1)
+		total_scantime=total_scantime-1
+		sleep 2
+		result=$(wpa_cli scan_results -i $1 | grep -c $2)
+		if [ $result -eq 1 ]
+			then
+			echo "Target AP $2 is found."
+			break;
+		fi
+	done
+        if [ $result -eq 1 ]
+		then
+		connect_ap $1 $2 $3 $total_scantime $5
+	else
+		echo "Target ap is not found"
+	fi
+
+
+elif [ $3 == "off" ]
+	then
+	echo "Disconnect AP"
+	dhclient -r $1 >/dev/null
+	dhclient -x >/dev/null 
+	nw_no=$(wpa_cli list_network | grep CURRENT | awk '{print $1}')
+	echo "Disable network"
+	ret=$(wpa_cli disable_network $nw_no | sed '1d')
+	wpa_ret $ret $nw_no 1	
+	echo "Remove network"
+	ret=$(wpa_cli remove_network $nw_no | sed '1d')
+	wpa_ret $ret $nw_no 0	
+else
+	echo "====================================================================================="
+	echo "manual scan & connect script"
+	echo "./scan_conn.sh <interface> <BSSID> <PW> <scan_times>"
+	echo "./scan_conn.sh <interface> <BSSID> off"
+	echo "====================================================================================="
+fi
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_test.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_test.sh
new file mode 100644
index 0000000000000..7e670628331c2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scan_test.sh
@@ -0,0 +1,125 @@
+#!/bin/bash
+
+read_cfg( )
+{
+	cat $1|grep $2|awk '{print $3}'
+	return 
+	
+}
+
+if [ "$1" == "icqc" ] 
+	then
+	:;
+# for user manual
+elif [ "$1" == "h" ] 
+	then
+
+echo "====================================================================================="
+echo "Unload/Reload & scan Flows"
+#echo "Format = ./scan_test.sh <total.times.of.unload/reload> <target.IP.for.pinging> <timeout period> <dev name> <SSID> <PW> <scan times> <Saved file name>"
+echo "Format = ./scan_test.sh <config file> <Saved file name>"
+echo "System Log of each unload/reload will be saved in folder [UnloadReloadScan]"
+echo "====================================================================================="
+
+
+else
+	# f=failed times;  p=passed times
+	declare -i f=0
+	declare -i p=0
+	declare -i pingok=0
+	
+	#expired parameter, ready to be removed.	
+	declare -i taketime=0
+	
+	setting=(total_times_of_unload target_IP_for_pinging timeout_period security device_name SSID PSK_phrase scan_times)
+
+	test ! -f $1 && echo "The cfg file is not existed!!!"
+	for((index=0 ; index < ${#setting[@]} ; index = index + 1))
+   		do
+ 		VARS[$index]=$(cat $1|grep ${setting[$index]}|awk '{print $3}')
+		#echo $index : ${VARS[$index]}
+	done
+	#exit 0
+	echo "################################################################################" >> $2
+	echo "Unload/Reload test start at   : `date`" >> $2 	
+	echo "Prepare $1 times unload/reload test"
+	mkdir UnloadReloadScan
+	#start test loop, loop count in [i]	
+	for ((i = 1 ; i <= ${VARS[0]} ; i = i + 1))
+	do
+	
+	echo "Loading driver..."
+	sleep 2
+	echo "!!!Current round of testing will begin in 3 seconds, please prepare to sniffer packets!!!"
+	sleep 3
+	./load.sh
+	./scan_conn.sh ${VARS[4]} ${VARS[5]} ${VARS[6]} ${VARS[7]} ${VARS[3]} & #$4 $5 $6 $7 $3 &
+	# take $3 parameter as the period of [waiting for association ready and DHCP protocol completed].
+	echo "****** Ping start!!  ******"
+	for((w=1;w<=${VARS[2]};w=w+1))
+	do
+		if ping -W 1 -c 1 ${VARS[1]} >/dev/null; then
+			pingok=1
+			echo "LOOP[$i] : Connection established in $w seconds. (Passed / Failed / Total = $p / $f / ${VARS[0]})" >> $2		
+			break
+		else
+			pingok=0
+		fi
+
+		echo $w
+		sleep 1
+	done
+
+	if [ "$pingok" = 1 ]; then
+		pingok=0
+    		p=$p+1
+		echo "****** Ping Passed!! (Passed / Failed / Total = $p / $f / ${VARS[0]})******"
+		dmesg -c > "./UnloadReloadScan/Log.of.Passed.Loop[$i].txt"
+		echo "================================================================================" >> "./UnloadReloadScan/Log.of.Passed.Loop[$i].txt"
+		echo "`date` :Interface Information:" >> "./UnloadReloadScan/Log.of.Passed.Loop[$i].txt"
+		ifconfig >> "./UnloadReloadScan/Log.of.Passed.Loop[$i].txt"
+		echo "================================================================================" >> "./UnloadReloadScan/Log.of.Passed.Loop[$i].txt"
+
+		sleep 2
+	else    
+		pingok=0		
+		f=$f+1
+		echo "LOOP[$i] : Connection establishing timeout ! (Passed / Failed / Total = $p / $f / ${VARS[0]})" >> $2
+		echo "****** Ping Failed!! (Passed / Failed / Total = $p / $f / ${VARS[0]})******"
+		dmesg -c > "./UnloadReloadScan/Log.of.Failed.Loop[$i].txt"
+		echo "================================================================================" >> "./UnloadReloadScan/Log.of.Failed.Loop[$i].txt"
+		echo "`date` :Interface Information:" >> "./UnloadReloadScan/Log.of.Failed.Loop[$i].txt"
+		ifconfig >> "./UnloadReloadScan/Log.of.Failed.Loop[$i].txt"
+		echo "================================================================================" >> "./UnloadReloadScan/Log.of.Failed.Loop[$i].txt"
+	fi
+	
+	./scan_conn.sh ${VARS[4]} ${VARS[5]} off
+	sleep 1
+	echo "unloading driver"
+	./unload.sh
+	echo "========================================================="
+	echo "Current loop = $i"		
+	echo "Current Result : Passed / Failed / Total = $p / $f / ${VARS[0]}"		
+	echo "========================================================="
+	if [ "$i" = "${VARS[0]}" ]; then
+		echo "All test loops were finished..."
+		echo "Unload/Reload test finished at: `date`" >> $2
+		echo "Result : Passed / Failed / Total = $p / $f / ${VARS[0]}" >> $2
+		echo "################################################################################" >> $2
+		echo " " >> $2		
+	else		
+		#take a break for next loop.
+		echo "!!!Current round of testing is ended, please stop sniffer packets!!!"
+		sleep 3
+	fi
+	done
+fi
+
+
+
+
+
+
+
+
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scratch b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scratch
new file mode 100644
index 0000000000000..9d0ee696ccf45
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/scratch
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+if [ "`whoami`" != "root" ]; then
+    echo Need to be root to execute.;
+    exit 1;
+fi
+
+cd ..
+make clean
+make -j 4
+make install
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/showq b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/showq
new file mode 100644
index 0000000000000..c9d119f21fe18
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/showq
@@ -0,0 +1,26 @@
+#!/bin/sh
+ssv_phy=`./find_ssv_phy`
+if [ -z "$ssv_phy" ]; then
+    echo SSV PHY device not found.;
+    exit 1;
+fi
+
+ssv_debugfs_dir=/sys/kernel/debug/ieee80211/$ssv_phy/ssv6200
+
+if [ ! -d $ssv_debugfs_dir ]; then
+    echo SSV debugfs not found.;
+    exit 1;
+fi
+
+cd $ssv_debugfs_dir
+
+cat queue_status
+cat hci/hw_txq_len
+
+find . -name ampdu_tx_summary -exec cat {} \;
+
+SSV_DFS_FILE=/sys/kernel/debug/ssv/ssv_cmd
+if [ -f $SSV_DFS_FILE ]; then
+    echo "hwq" > $SSV_DFS_FILE
+    cat $SSV_DFS_FILE
+fi
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ssvcfg.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ssvcfg.sh
new file mode 100644
index 0000000000000..c1d4740abbc4c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/ssvcfg.sh
@@ -0,0 +1,35 @@
+#/bin/bash
+
+KVERSION="`uname -r`"
+kern_mod=/lib/modules/$KVERSION/kernel/drivers/net/wireless/ssv6200/ssvdevicetype.ko
+type_str=`lsmod | grep "ssvdevicetype"`
+cfg_file=sta.cfg
+if [ $# -ge 1 ]; then 
+    cfg_file=$1; 
+    echo Using configuration file $1
+else
+    echo Using default configuration file $cfg_file \($?\)
+fi
+cfg_cmds=(`cat $cfg_file  | grep '^[a-zA-Z0-9]' | sed 's/ //g'`)
+#echo ${#cfg_cmds[*]}
+#echo ${!cfg_cmds[*]}
+#echo ${cfg_cmds[1]}
+
+if [ "$type_str" != "" ]; then
+    #rmmod ssv6200_sdio
+    #rmmod ssv6200s_core
+    #rmmod ssv6200_hci
+    rmmod ssvdevicetype
+fi
+
+
+if [ -f $kern_mod ]; then
+    insmod $kern_mod stacfgpath="$cfg_file"
+    #insmod $kern_mod
+    #./cli cfg reset
+    #for cmd in ${cfg_cmds[*]}
+    #do
+	#./cli cfg `echo $cmd | sed 's/=/ = /g'`
+    #done
+fi
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.cfg.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.cfg.template
new file mode 100644
index 0000000000000..a937f1ddcc7a7
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.cfg.template
@@ -0,0 +1,76 @@
+
+hw_mac = MAC_ADDR
+hw_mac_2 = MAC2ADDR
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+#ignore_efuse_mac = 1
+#mac_address_path = /xxxx/xxxx
+#mac_address_mode = 0
+#mac_output_path = /data/wifimac
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+#firmware_path = /lib/firmware/
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 26
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+##################################################
+wifi_tx_gain_level_b = 6
+wifi_tx_gain_level_gn = 4
+
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.sh
new file mode 100644
index 0000000000000..0c0c1c899277e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/sta.sh
@@ -0,0 +1,43 @@
+#!/bin/bash
+
+echo "=================================================="
+echo "1.Copy firmware"
+echo "=================================================="
+cp ../image/ssv6051-sw.bin /lib/firmware/
+
+echo "=================================================="
+echo "1.Unload Module"
+echo "=================================================="
+./unload.sh
+
+echo "=================================================="
+echo "2.Set Hardware Capability"
+echo "=================================================="
+
+eth0_local_mac=`ifconfig eth0  | grep HWaddr | sed -e 's/.*HWaddr //g' | sed -e 's/ //g' | cut -d ':' -f 4,5,6`
+[ "$eth0_local_mac" == "" ] && eth0_local_mac="45:67:89"
+local_mac=00:a5:b5:$eth0_local_mac
+local_mac_2=`echo $local_mac | cut -d ':' -f 6`
+local_mac_2=`printf '%x' $[ ( 16#$local_mac_2 + 1 ) % 4 + ( 16#$local_mac_2 & 16#FC ) ] `
+local_mac_2="`echo $local_mac | cut -d ':' -f 1,2,3,4,5`:$local_mac_2"
+
+echo WLAN MAC is $local_mac
+
+cat sta.cfg.template | sed -e "s/MAC_ADDR/$local_mac/g" | sed -e "s/MAC2ADDR/$local_mac_2/g" > sta_local_mac.cfg
+./ssvcfg.sh sta_local_mac.cfg
+
+echo "=================================================="
+echo "3.Load MMC Module"
+echo "=================================================="
+modprobe mmc_core sdiomaxclock=25000000
+modprobe sdhci
+modprobe sdhci-pci
+modprobe mmc_block
+
+echo "=================================================="
+echo "4.Load SSV6200 Driver"
+echo "=================================================="
+echo 6 > /proc/sys/kernel/printk
+
+#modprobe ssv6200_sdio
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/hostapd.conf b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/hostapd.conf
new file mode 100644
index 0000000000000..c9a5f2d656d59
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/hostapd.conf
@@ -0,0 +1,1536 @@
+##### hostapd configuration file ##############################################
+# Empty lines and lines starting with # are ignored
+
+# AP netdevice name (without 'ap' postfix, i.e., wlan0 uses wlan0ap for
+# management frames); ath0 for madwifi
+interface=wlan@@
+
+# In case of madwifi, atheros, and nl80211 driver interfaces, an additional
+# configuration parameter, bridge, may be used to notify hostapd if the
+# interface is included in a bridge. This parameter is not used with Host AP
+# driver. If the bridge parameter is not set, the drivers will automatically
+# figure out the bridge interface (assuming sysfs is enabled and mounted to
+# /sys) and this parameter may not be needed.
+#
+# For nl80211, this parameter can be used to request the AP interface to be
+# added to the bridge automatically (brctl may refuse to do this before hostapd
+# has been started to change the interface mode). If needed, the bridge
+# interface is also created.
+#bridge=br0
+
+# Driver interface type (hostap/wired/madwifi/test/none/nl80211/bsd);
+# default: hostap). nl80211 is used with all Linux mac80211 drivers.
+# Use driver=none if building hostapd as a standalone RADIUS server that does
+# not control any wireless/wired driver.
+driver=nl80211
+
+# hostapd event logger configuration
+#
+# Two output method: syslog and stdout (only usable if not forking to
+# background).
+#
+# Module bitfield (ORed bitfield of modules that will be logged; -1 = all
+# modules):
+# bit 0 (1) = IEEE 802.11
+# bit 1 (2) = IEEE 802.1X
+# bit 2 (4) = RADIUS
+# bit 3 (8) = WPA
+# bit 4 (16) = driver interface
+# bit 5 (32) = IAPP
+# bit 6 (64) = MLME
+#
+# Levels (minimum value for logged events):
+#  0 = verbose debugging
+#  1 = debugging
+#  2 = informational messages
+#  3 = notification
+#  4 = warning
+#
+logger_syslog=-1
+logger_syslog_level=2
+logger_stdout=-1
+logger_stdout_level=2
+
+# Dump file for state information (on SIGUSR1)
+dump_file=/tmp/hostapd.dump
+
+# Interface for separate control program. If this is specified, hostapd
+# will create this directory and a UNIX domain socket for listening to requests
+# from external programs (CLI/GUI, etc.) for status information and
+# configuration. The socket file will be named based on the interface name, so
+# multiple hostapd processes/interfaces can be run at the same time if more
+# than one interface is used.
+# /var/run/hostapd is the recommended directory for sockets and by default,
+# hostapd_cli will use it when trying to connect with hostapd.
+ctrl_interface=/var/run/hostapd
+
+# Access control for the control interface can be configured by setting the
+# directory to allow only members of a group to use sockets. This way, it is
+# possible to run hostapd as root (since it needs to change network
+# configuration and open raw sockets) and still allow GUI/CLI components to be
+# run as non-root users. However, since the control interface can be used to
+# change the network configuration, this access needs to be protected in many
+# cases. By default, hostapd is configured to use gid 0 (root). If you
+# want to allow non-root users to use the contron interface, add a new group
+# and change this value to match with that group. Add users that should have
+# control interface access to this group.
+#
+# This variable can be a group name or gid.
+#ctrl_interface_group=wheel
+ctrl_interface_group=0
+
+
+##### IEEE 802.11 related configuration #######################################
+
+# SSID to be used in IEEE 802.11 management frames
+#ssid=SSVQATestAP
+# Alternative formats for configuring SSID
+# (double quoted string, hexdump, printf-escaped string)
+#ssid2="test"
+#ssid2=74657374
+#ssid2=P"hello\nthere"
+
+# UTF-8 SSID: Whether the SSID is to be interpreted using UTF-8 encoding
+#utf8_ssid=1
+
+# Country code (ISO/IEC 3166-1). Used to set regulatory domain.
+# Set as needed to indicate country in which device is operating.
+# This can limit available channels and transmit power.
+#country_code=US
+
+# Enable IEEE 802.11d. This advertises the country_code and the set of allowed
+# channels and transmit power levels based on the regulatory limits. The
+# country_code setting must be configured with the correct country for
+# IEEE 802.11d functions.
+# (default: 0 = disabled)
+#ieee80211d=1
+
+# Operation mode (a = IEEE 802.11a, b = IEEE 802.11b, g = IEEE 802.11g,
+# ad = IEEE 802.11ad (60 GHz); a/g options are used with IEEE 802.11n, too, to
+# specify band)
+# Default: IEEE 802.11b
+hw_mode=g
+
+# Channel number (IEEE 802.11)
+# (default: 0, i.e., not set)
+# Please note that some drivers do not use this value from hostapd and the
+# channel will need to be configured separately with iwconfig.
+#channel=6
+
+# Beacon interval in kus (1.024 ms) (default: 100; range 15..65535)
+beacon_int=100
+
+# DTIM (delivery traffic information message) period (range 1..255):
+# number of beacons between DTIMs (1 = every beacon includes DTIM element)
+# (default: 2)
+dtim_period=2
+
+# Maximum number of stations allowed in station table. New stations will be
+# rejected after the station table is full. IEEE 802.11 has a limit of 2007
+# different association IDs, so this number should not be larger than that.
+# (default: 2007)
+max_num_sta=8
+
+# RTS/CTS threshold; 2347 = disabled (default); range 0..2347
+# If this field is not included in hostapd.conf, hostapd will not control
+# RTS threshold and 'iwconfig wlan# rts <val>' can be used to set it.
+rts_threshold=2347
+
+# Fragmentation threshold; 2346 = disabled (default); range 256..2346
+# If this field is not included in hostapd.conf, hostapd will not control
+# fragmentation threshold and 'iwconfig wlan# frag <val>' can be used to set
+# it.
+fragm_threshold=2346
+
+# Rate configuration
+# Default is to enable all rates supported by the hardware. This configuration
+# item allows this list be filtered so that only the listed rates will be left
+# in the list. If the list is empty, all rates are used. This list can have
+# entries that are not in the list of rates the hardware supports (such entries
+# are ignored). The entries in this list are in 100 kbps, i.e., 11 Mbps = 110.
+# If this item is present, at least one rate have to be matching with the rates
+# hardware supports.
+# default: use the most common supported rate setting for the selected
+# hw_mode (i.e., this line can be removed from configuration file in most
+# cases)
+#supported_rates=10 20 55 110 60 90 120 180 240 360 480 540
+
+# Basic rate set configuration
+# List of rates (in 100 kbps) that are included in the basic rate set.
+# If this item is not included, usually reasonable default set is used.
+#basic_rates=10 20
+#basic_rates=10 20 55 110
+#basic_rates=60 120 240
+
+# Short Preamble
+# This parameter can be used to enable optional use of short preamble for
+# frames sent at 2 Mbps, 5.5 Mbps, and 11 Mbps to improve network performance.
+# This applies only to IEEE 802.11b-compatible networks and this should only be
+# enabled if the local hardware supports use of short preamble. If any of the
+# associated STAs do not support short preamble, use of short preamble will be
+# disabled (and enabled when such STAs disassociate) dynamically.
+# 0 = do not allow use of short preamble (default)
+# 1 = allow use of short preamble
+#preamble=1
+
+# Station MAC address -based authentication
+# Please note that this kind of access control requires a driver that uses
+# hostapd to take care of management frame processing and as such, this can be
+# used with driver=hostap or driver=nl80211, but not with driver=madwifi.
+# 0 = accept unless in deny list
+# 1 = deny unless in accept list
+# 2 = use external RADIUS server (accept/deny lists are searched first)
+macaddr_acl=0
+
+# Accept/deny lists are read from separate files (containing list of
+# MAC addresses, one per line). Use absolute path name to make sure that the
+# files can be read on SIGHUP configuration reloads.
+#accept_mac_file=/etc/hostapd.accept
+#deny_mac_file=/etc/hostapd.deny
+
+# IEEE 802.11 specifies two authentication algorithms. hostapd can be
+# configured to allow both of these or only one. Open system authentication
+# should be used with IEEE 802.1X.
+# Bit fields of allowed authentication algorithms:
+# bit 0 = Open System Authentication
+# bit 1 = Shared Key Authentication (requires WEP)
+auth_algs=3
+
+# Send empty SSID in beacons and ignore probe request frames that do not
+# specify full SSID, i.e., require stations to know SSID.
+# default: disabled (0)
+# 1 = send empty (length=0) SSID in beacon and ignore probe request for
+#     broadcast SSID
+# 2 = clear SSID (ASCII 0), but keep the original length (this may be required
+#     with some clients that do not support empty SSID) and ignore probe
+#     requests for broadcast SSID
+ignore_broadcast_ssid=0
+
+# Additional vendor specfic elements for Beacon and Probe Response frames
+# This parameter can be used to add additional vendor specific element(s) into
+# the end of the Beacon and Probe Response frames. The format for these
+# element(s) is a hexdump of the raw information elements (id+len+payload for
+# one or more elements)
+#vendor_elements=dd0411223301
+
+# TX queue parameters (EDCF / bursting)
+# tx_queue_<queue name>_<param>
+# queues: data0, data1, data2, data3, after_beacon, beacon
+#		(data0 is the highest priority queue)
+# parameters:
+#   aifs: AIFS (default 2)
+#   cwmin: cwMin (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023)
+#   cwmax: cwMax (1, 3, 7, 15, 31, 63, 127, 255, 511, 1023); cwMax >= cwMin
+#   burst: maximum length (in milliseconds with precision of up to 0.1 ms) for
+#          bursting
+#
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# These parameters are used by the access point when transmitting frames
+# to the clients.
+#
+# Low priority / AC_BK = background
+#tx_queue_data3_aifs=7
+#tx_queue_data3_cwmin=15
+#tx_queue_data3_cwmax=1023
+#tx_queue_data3_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=1023 burst=0
+#
+# Normal priority / AC_BE = best effort
+#tx_queue_data2_aifs=3
+#tx_queue_data2_cwmin=15
+#tx_queue_data2_cwmax=63
+#tx_queue_data2_burst=0
+# Note: for IEEE 802.11b mode: cWmin=31 cWmax=127 burst=0
+#
+# High priority / AC_VI = video
+#tx_queue_data1_aifs=1
+#tx_queue_data1_cwmin=7
+#tx_queue_data1_cwmax=15
+#tx_queue_data1_burst=3.0
+# Note: for IEEE 802.11b mode: cWmin=15 cWmax=31 burst=6.0
+#
+# Highest priority / AC_VO = voice
+#tx_queue_data0_aifs=1
+#tx_queue_data0_cwmin=3
+#tx_queue_data0_cwmax=7
+#tx_queue_data0_burst=1.5
+# Note: for IEEE 802.11b mode: cWmin=7 cWmax=15 burst=3.3
+
+# 802.1D Tag (= UP) to AC mappings
+# WMM specifies following mapping of data frames to different ACs. This mapping
+# can be configured using Linux QoS/tc and sch_pktpri.o module.
+# 802.1D Tag	802.1D Designation	Access Category	WMM Designation
+# 1		BK			AC_BK		Background
+# 2		-			AC_BK		Background
+# 0		BE			AC_BE		Best Effort
+# 3		EE			AC_BE		Best Effort
+# 4		CL			AC_VI		Video
+# 5		VI			AC_VI		Video
+# 6		VO			AC_VO		Voice
+# 7		NC			AC_VO		Voice
+# Data frames with no priority information: AC_BE
+# Management frames: AC_VO
+# PS-Poll frames: AC_BE
+
+# Default WMM parameters (IEEE 802.11 draft; 11-03-0504-03-000e):
+# for 802.11a or 802.11g networks
+# These parameters are sent to WMM clients when they associate.
+# The parameters will be used by WMM clients for frames transmitted to the
+# access point.
+#
+# note - txop_limit is in units of 32microseconds
+# note - acm is admission control mandatory flag. 0 = admission control not
+# required, 1 = mandatory
+# note - here cwMin and cmMax are in exponent form. the actual cw value used
+# will be (2^n)-1 where n is the value given here
+#
+wmm_enabled=1
+#
+# WMM-PS Unscheduled Automatic Power Save Delivery [U-APSD]
+# Enable this flag if U-APSD supported outside hostapd (eg., Firmware/driver)
+#uapsd_advertisement_enabled=1
+#
+# Low priority / AC_BK = background
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=10
+#
+# Normal priority / AC_BE = best effort
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+# Note: for IEEE 802.11b mode: cWmin=5 cWmax=7
+#
+# High priority / AC_VI = video
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+# Note: for IEEE 802.11b mode: cWmin=4 cWmax=5 txop_limit=188
+#
+# Highest priority / AC_VO = voice
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
+# Note: for IEEE 802.11b mode: cWmin=3 cWmax=4 burst=102
+
+# Static WEP key configuration
+#
+# The key number to use when transmitting.
+# It must be between 0 and 3, and the corresponding key must be set.
+# default: not set
+#wep_default_key=0
+# The WEP keys to use.
+# A key may be a quoted string or unquoted hexadecimal digits.
+# The key length should be 5, 13, or 16 characters, or 10, 26, or 32
+# digits, depending on whether 40-bit (64-bit), 104-bit (128-bit), or
+# 128-bit (152-bit) WEP is used.
+# Only the default key must be supplied; the others are optional.
+# default: not set
+#wep_key0=123456789a
+#wep_key1="vwxyz"
+#wep_key2=0102030405060708090a0b0c0d
+#wep_key3=".2.4.6.8.0.23"
+
+# Station inactivity limit
+#
+# If a station does not send anything in ap_max_inactivity seconds, an
+# empty data frame is sent to it in order to verify whether it is
+# still in range. If this frame is not ACKed, the station will be
+# disassociated and then deauthenticated. This feature is used to
+# clear station table of old entries when the STAs move out of the
+# range.
+#
+# The station can associate again with the AP if it is still in range;
+# this inactivity poll is just used as a nicer way of verifying
+# inactivity; i.e., client will not report broken connection because
+# disassociation frame is not sent immediately without first polling
+# the STA with a data frame.
+# default: 300 (i.e., 5 minutes)
+#ap_max_inactivity=300
+#
+# The inactivity polling can be disabled to disconnect stations based on
+# inactivity timeout so that idle stations are more likely to be disconnected
+# even if they are still in range of the AP. This can be done by setting
+# skip_inactivity_poll to 1 (default 0).
+#skip_inactivity_poll=0
+
+# Disassociate stations based on excessive transmission failures or other
+# indications of connection loss. This depends on the driver capabilities and
+# may not be available with all drivers.
+#disassoc_low_ack=1
+
+# Maximum allowed Listen Interval (how many Beacon periods STAs are allowed to
+# remain asleep). Default: 65535 (no limit apart from field size)
+#max_listen_interval=100
+
+# WDS (4-address frame) mode with per-station virtual interfaces
+# (only supported with driver=nl80211)
+# This mode allows associated stations to use 4-address frames to allow layer 2
+# bridging to be used.
+#wds_sta=1
+
+# If bridge parameter is set, the WDS STA interface will be added to the same
+# bridge by default. This can be overridden with the wds_bridge parameter to
+# use a separate bridge.
+#wds_bridge=wds-br0
+
+# Client isolation can be used to prevent low-level bridging of frames between
+# associated stations in the BSS. By default, this bridging is allowed.
+#ap_isolate=1
+
+##### IEEE 802.11n related configuration ######################################
+
+# ieee80211n: Whether IEEE 802.11n (HT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full HT functionality.
+#ieee80211n=1
+
+# ht_capab: HT capabilities (list of flags)
+# LDPC coding capability: [LDPC] = supported
+# Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
+#	channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
+#	with secondary channel below the primary channel
+#	(20 MHz only if neither is set)
+#	Note: There are limits on which channels can be used with HT40- and
+#	HT40+. Following table shows the channels that may be available for
+#	HT40- and HT40+ use per IEEE 802.11n Annex J:
+#	freq		HT40-		HT40+
+#	2.4 GHz		5-13		1-7 (1-9 in Europe/Japan)
+#	5 GHz		40,48,56,64	36,44,52,60
+#	(depending on the location, not all of these channels may be available
+#	for use)
+#	Please note that 40 MHz channels may switch their primary and secondary
+#	channels if needed or creation of 40 MHz channel maybe rejected based
+#	on overlapping BSSes. These changes are done automatically when hostapd
+#	is setting up the 40 MHz channel.
+# Spatial Multiplexing (SM) Power Save: [SMPS-STATIC] or [SMPS-DYNAMIC]
+#	(SMPS disabled if neither is set)
+# HT-greenfield: [GF] (disabled if not set)
+# Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
+# Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
+# Tx STBC: [TX-STBC] (disabled if not set)
+# Rx STBC: [RX-STBC1] (one spatial stream), [RX-STBC12] (one or two spatial
+#	streams), or [RX-STBC123] (one, two, or three spatial streams); Rx STBC
+#	disabled if none of these set
+# HT-delayed Block Ack: [DELAYED-BA] (disabled if not set)
+# Maximum A-MSDU length: [MAX-AMSDU-7935] for 7935 octets (3839 octets if not
+#	set)
+# DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
+# PSMP support: [PSMP] (disabled if not set)
+# L-SIG TXOP protection support: [LSIG-TXOP-PROT] (disabled if not set)
+#ht_capab=[SHORT-GI-20]
+
+# Require stations to support HT PHY (reject association if they do not)
+#require_ht=1
+
+##### IEEE 802.11ac related configuration #####################################
+
+# ieee80211ac: Whether IEEE 802.11ac (VHT) is enabled
+# 0 = disabled (default)
+# 1 = enabled
+# Note: You will also need to enable WMM for full VHT functionality.
+#ieee80211ac=1
+
+# vht_capab: VHT capabilities (list of flags)
+#
+# vht_max_mpdu_len: [MAX-MPDU-7991] [MAX-MPDU-11454]
+# Indicates maximum MPDU length
+# 0 = 3895 octets (default)
+# 1 = 7991 octets
+# 2 = 11454 octets
+# 3 = reserved
+#
+# supported_chan_width: [VHT160] [VHT160-80PLUS80]
+# Indicates supported Channel widths
+# 0 = 160 MHz & 80+80 channel widths are not supported (default)
+# 1 = 160 MHz channel width is supported
+# 2 = 160 MHz & 80+80 channel widths are supported
+# 3 = reserved
+#
+# Rx LDPC coding capability: [RXLDPC]
+# Indicates support for receiving LDPC coded pkts
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 80 MHz: [SHORT-GI-80]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 80Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Short GI for 160 MHz: [SHORT-GI-160]
+# Indicates short GI support for reception of packets transmitted with TXVECTOR
+# params format equal to VHT and CBW = 160Mhz
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Tx STBC: [TX-STBC-2BY1]
+# Indicates support for the transmission of at least 2x1 STBC
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Rx STBC: [RX-STBC-1] [RX-STBC-12] [RX-STBC-123] [RX-STBC-1234]
+# Indicates support for the reception of PPDUs using STBC
+# 0 = Not supported (default)
+# 1 = support of one spatial stream
+# 2 = support of one and two spatial streams
+# 3 = support of one, two and three spatial streams
+# 4 = support of one, two, three and four spatial streams
+# 5,6,7 = reserved
+#
+# SU Beamformer Capable: [SU-BEAMFORMER]
+# Indicates support for operation as a single user beamformer
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# SU Beamformee Capable: [SU-BEAMFORMEE]
+# Indicates support for operation as a single user beamformee
+# 0 = Not supported (default)
+# 1 = Supported
+#
+# Compressed Steering Number of Beamformer Antennas Supported: [BF-ANTENNA-2]
+#   Beamformee's capability indicating the maximum number of beamformer
+#   antennas the beamformee can support when sending compressed beamforming
+#   feedback
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# Number of Sounding Dimensions: [SOUNDING-DIMENSION-2]
+# Beamformer's capability indicating the maximum value of the NUM_STS parameter
+# in the TXVECTOR of a VHT NDP
+# If SU beamformer capable, set to maximum value minus 1
+# else reserved (default)
+#
+# MU Beamformer Capable: [MU-BEAMFORMER]
+# Indicates support for operation as an MU beamformer
+# 0 = Not supported or sent by Non-AP STA (default)
+# 1 = Supported
+#
+# MU Beamformee Capable: [MU-BEAMFORMEE]
+# Indicates support for operation as an MU beamformee
+# 0 = Not supported or sent by AP (default)
+# 1 = Supported
+#
+# VHT TXOP PS: [VHT-TXOP-PS]
+# Indicates whether or not the AP supports VHT TXOP Power Save Mode
+#  or whether or not the STA is in VHT TXOP Power Save mode
+# 0 = VHT AP doesnt support VHT TXOP PS mode (OR) VHT Sta not in VHT TXOP PS
+#  mode
+# 1 = VHT AP supports VHT TXOP PS mode (OR) VHT Sta is in VHT TXOP power save
+#  mode
+#
+# +HTC-VHT Capable: [HTC-VHT]
+# Indicates whether or not the STA supports receiving a VHT variant HT Control
+# field.
+# 0 = Not supported (default)
+# 1 = supported
+#
+# Maximum A-MPDU Length Exponent: [MAX-A-MPDU-LEN-EXP0]..[MAX-A-MPDU-LEN-EXP7]
+# Indicates the maximum length of A-MPDU pre-EOF padding that the STA can recv
+# This field is an integer in the range of 0 to 7.
+# The length defined by this field is equal to
+# 2 pow(13 + Maximum A-MPDU Length Exponent) -1 octets
+#
+# VHT Link Adaptation Capable: [VHT-LINK-ADAPT2] [VHT-LINK-ADAPT3]
+# Indicates whether or not the STA supports link adaptation using VHT variant
+# HT Control field
+# If +HTC-VHTcapable is 1
+#  0 = (no feedback) if the STA does not provide VHT MFB (default)
+#  1 = reserved
+#  2 = (Unsolicited) if the STA provides only unsolicited VHT MFB
+#  3 = (Both) if the STA can provide VHT MFB in response to VHT MRQ and if the
+#      STA provides unsolicited VHT MFB
+# Reserved if +HTC-VHTcapable is 0
+#
+# Rx Antenna Pattern Consistency: [RX-ANTENNA-PATTERN]
+# Indicates the possibility of Rx antenna pattern change
+# 0 = Rx antenna pattern might change during the lifetime of an association
+# 1 = Rx antenna pattern does not change during the lifetime of an association
+#
+# Tx Antenna Pattern Consistency: [TX-ANTENNA-PATTERN]
+# Indicates the possibility of Tx antenna pattern change
+# 0 = Tx antenna pattern might change during the lifetime of an association
+# 1 = Tx antenna pattern does not change during the lifetime of an association
+#vht_capab=[SHORT-GI-80][HTC-VHT]
+#
+# Require stations to support VHT PHY (reject association if they do not)
+#require_vht=1
+
+# 0 = 20 or 40 MHz operating Channel width
+# 1 = 80 MHz channel width
+# 2 = 160 MHz channel width
+# 3 = 80+80 MHz channel width
+#vht_oper_chwidth=1
+#
+# center freq = 5 GHz + (5 * index)
+# So index 42 gives center freq 5.210 GHz
+# which is channel 42 in 5G band
+#
+#vht_oper_centr_freq_seg0_idx=42
+#
+# center freq = 5 GHz + (5 * index)
+# So index 159 gives center freq 5.795 GHz
+# which is channel 159 in 5G band
+#
+#vht_oper_centr_freq_seg1_idx=159
+
+##### IEEE 802.1X-2004 related configuration ##################################
+
+# Require IEEE 802.1X authorization
+#ieee8021x=1
+
+# IEEE 802.1X/EAPOL version
+# hostapd is implemented based on IEEE Std 802.1X-2004 which defines EAPOL
+# version 2. However, there are many client implementations that do not handle
+# the new version number correctly (they seem to drop the frames completely).
+# In order to make hostapd interoperate with these clients, the version number
+# can be set to the older version (1) with this configuration value.
+#eapol_version=2
+
+# Optional displayable message sent with EAP Request-Identity. The first \0
+# in this string will be converted to ASCII-0 (nul). This can be used to
+# separate network info (comma separated list of attribute=value pairs); see,
+# e.g., RFC 4284.
+#eap_message=hello
+#eap_message=hello\0networkid=netw,nasid=foo,portid=0,NAIRealms=example.com
+
+# WEP rekeying (disabled if key lengths are not set or are set to 0)
+# Key lengths for default/broadcast and individual/unicast keys:
+# 5 = 40-bit WEP (also known as 64-bit WEP with 40 secret bits)
+# 13 = 104-bit WEP (also known as 128-bit WEP with 104 secret bits)
+#wep_key_len_broadcast=5
+#wep_key_len_unicast=5
+# Rekeying period in seconds. 0 = do not rekey (i.e., set keys only once)
+#wep_rekey_period=300
+
+# EAPOL-Key index workaround (set bit7) for WinXP Supplicant (needed only if
+# only broadcast keys are used)
+eapol_key_index_workaround=0
+
+# EAP reauthentication period in seconds (default: 3600 seconds; 0 = disable
+# reauthentication).
+#eap_reauth_period=3600
+
+# Use PAE group address (01:80:c2:00:00:03) instead of individual target
+# address when sending EAPOL frames with driver=wired. This is the most common
+# mechanism used in wired authentication, but it also requires that the port
+# is only used by one station.
+#use_pae_group_addr=1
+
+##### Integrated EAP server ###################################################
+
+# Optionally, hostapd can be configured to use an integrated EAP server
+# to process EAP authentication locally without need for an external RADIUS
+# server. This functionality can be used both as a local authentication server
+# for IEEE 802.1X/EAPOL and as a RADIUS server for other devices.
+
+# Use integrated EAP server instead of external RADIUS authentication
+# server. This is also needed if hostapd is configured to act as a RADIUS
+# authentication server.
+#eap_server=0
+
+# Path for EAP server user database
+# If SQLite support is included, this can be set to "sqlite:/path/to/sqlite.db"
+# to use SQLite database instead of a text file.
+#eap_user_file=/etc/hostapd.eap_user
+
+# CA certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#ca_cert=/etc/hostapd.ca.pem
+
+# Server certificate (PEM or DER file) for EAP-TLS/PEAP/TTLS
+#server_cert=/etc/hostapd.server.pem
+
+# Private key matching with the server certificate for EAP-TLS/PEAP/TTLS
+# This may point to the same file as server_cert if both certificate and key
+# are included in a single file. PKCS#12 (PFX) file (.p12/.pfx) can also be
+# used by commenting out server_cert and specifying the PFX file as the
+# private_key.
+#private_key=/etc/hostapd.server.prv
+
+# Passphrase for private key
+#private_key_passwd=secret passphrase
+
+# Enable CRL verification.
+# Note: hostapd does not yet support CRL downloading based on CDP. Thus, a
+# valid CRL signed by the CA is required to be included in the ca_cert file.
+# This can be done by using PEM format for CA certificate and CRL and
+# concatenating these into one file. Whenever CRL changes, hostapd needs to be
+# restarted to take the new CRL into use.
+# 0 = do not verify CRLs (default)
+# 1 = check the CRL of the user certificate
+# 2 = check all CRLs in the certificate path
+#check_crl=1
+
+# dh_file: File path to DH/DSA parameters file (in PEM format)
+# This is an optional configuration file for setting parameters for an
+# ephemeral DH key exchange. In most cases, the default RSA authentication does
+# not use this configuration. However, it is possible setup RSA to use
+# ephemeral DH key exchange. In addition, ciphers with DSA keys always use
+# ephemeral DH keys. This can be used to achieve forward secrecy. If the file
+# is in DSA parameters format, it will be automatically converted into DH
+# params. This parameter is required if anonymous EAP-FAST is used.
+# You can generate DH parameters file with OpenSSL, e.g.,
+# "openssl dhparam -out /etc/hostapd.dh.pem 1024"
+#dh_file=/etc/hostapd.dh.pem
+
+# Fragment size for EAP methods
+#fragment_size=1400
+
+# Finite cyclic group for EAP-pwd. Number maps to group of domain parameters
+# using the IANA repository for IKE (RFC 2409).
+#pwd_group=19
+
+# Configuration data for EAP-SIM database/authentication gateway interface.
+# This is a text string in implementation specific format. The example
+# implementation in eap_sim_db.c uses this as the UNIX domain socket name for
+# the HLR/AuC gateway (e.g., hlr_auc_gw). In this case, the path uses "unix:"
+# prefix. If hostapd is built with SQLite support (CONFIG_SQLITE=y in .config),
+# database file can be described with an optional db=<path> parameter.
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock
+#eap_sim_db=unix:/tmp/hlr_auc_gw.sock db=/tmp/hostapd.db
+
+# Encryption key for EAP-FAST PAC-Opaque values. This key must be a secret,
+# random value. It is configured as a 16-octet value in hex format. It can be
+# generated, e.g., with the following command:
+# od -tx1 -v -N16 /dev/random | colrm 1 8 | tr -d ' '
+#pac_opaque_encr_key=000102030405060708090a0b0c0d0e0f
+
+# EAP-FAST authority identity (A-ID)
+# A-ID indicates the identity of the authority that issues PACs. The A-ID
+# should be unique across all issuing servers. In theory, this is a variable
+# length field, but due to some existing implementations requiring A-ID to be
+# 16 octets in length, it is strongly recommended to use that length for the
+# field to provid interoperability with deployed peer implementations. This
+# field is configured in hex format.
+#eap_fast_a_id=101112131415161718191a1b1c1d1e1f
+
+# EAP-FAST authority identifier information (A-ID-Info)
+# This is a user-friendly name for the A-ID. For example, the enterprise name
+# and server name in a human-readable format. This field is encoded as UTF-8.
+#eap_fast_a_id_info=test server
+
+# Enable/disable different EAP-FAST provisioning modes:
+#0 = provisioning disabled
+#1 = only anonymous provisioning allowed
+#2 = only authenticated provisioning allowed
+#3 = both provisioning modes allowed (default)
+#eap_fast_prov=3
+
+# EAP-FAST PAC-Key lifetime in seconds (hard limit)
+#pac_key_lifetime=604800
+
+# EAP-FAST PAC-Key refresh time in seconds (soft limit on remaining hard
+# limit). The server will generate a new PAC-Key when this number of seconds
+# (or fewer) of the lifetime remains.
+#pac_key_refresh_time=86400
+
+# EAP-SIM and EAP-AKA protected success/failure indication using AT_RESULT_IND
+# (default: 0 = disabled).
+#eap_sim_aka_result_ind=1
+
+# Trusted Network Connect (TNC)
+# If enabled, TNC validation will be required before the peer is allowed to
+# connect. Note: This is only used with EAP-TTLS and EAP-FAST. If any other
+# EAP method is enabled, the peer will be allowed to connect without TNC.
+#tnc=1
+
+
+##### IEEE 802.11f - Inter-Access Point Protocol (IAPP) #######################
+
+# Interface to be used for IAPP broadcast packets
+#iapp_interface=eth0
+
+
+##### RADIUS client configuration #############################################
+# for IEEE 802.1X with external Authentication Server, IEEE 802.11
+# authentication with external ACL for MAC addresses, and accounting
+
+# The own IP address of the access point (used as NAS-IP-Address)
+own_ip_addr=127.0.0.1
+
+# Optional NAS-Identifier string for RADIUS messages. When used, this should be
+# a unique to the NAS within the scope of the RADIUS server. For example, a
+# fully qualified domain name can be used here.
+# When using IEEE 802.11r, nas_identifier must be set and must be between 1 and
+# 48 octets long.
+#nas_identifier=ap.example.com
+
+# RADIUS authentication server
+#auth_server_addr=127.0.0.1
+#auth_server_port=1812
+#auth_server_shared_secret=secret
+
+# RADIUS accounting server
+#acct_server_addr=127.0.0.1
+#acct_server_port=1813
+#acct_server_shared_secret=secret
+
+# Secondary RADIUS servers; to be used if primary one does not reply to
+# RADIUS packets. These are optional and there can be more than one secondary
+# server listed.
+#auth_server_addr=127.0.0.2
+#auth_server_port=1812
+#auth_server_shared_secret=secret2
+#
+#acct_server_addr=127.0.0.2
+#acct_server_port=1813
+#acct_server_shared_secret=secret2
+
+# Retry interval for trying to return to the primary RADIUS server (in
+# seconds). RADIUS client code will automatically try to use the next server
+# when the current server is not replying to requests. If this interval is set,
+# primary server will be retried after configured amount of time even if the
+# currently used secondary server is still working.
+#radius_retry_primary_interval=600
+
+
+# Interim accounting update interval
+# If this is set (larger than 0) and acct_server is configured, hostapd will
+# send interim accounting updates every N seconds. Note: if set, this overrides
+# possible Acct-Interim-Interval attribute in Access-Accept message. Thus, this
+# value should not be configured in hostapd.conf, if RADIUS server is used to
+# control the interim interval.
+# This value should not be less 600 (10 minutes) and must not be less than
+# 60 (1 minute).
+#radius_acct_interim_interval=600
+
+# Request Chargeable-User-Identity (RFC 4372)
+# This parameter can be used to configure hostapd to request CUI from the
+# RADIUS server by including Chargeable-User-Identity attribute into
+# Access-Request packets.
+#radius_request_cui=1
+
+# Dynamic VLAN mode; allow RADIUS authentication server to decide which VLAN
+# is used for the stations. This information is parsed from following RADIUS
+# attributes based on RFC 3580 and RFC 2868: Tunnel-Type (value 13 = VLAN),
+# Tunnel-Medium-Type (value 6 = IEEE 802), Tunnel-Private-Group-ID (value
+# VLANID as a string). vlan_file option below must be configured if dynamic
+# VLANs are used. Optionally, the local MAC ACL list (accept_mac_file) can be
+# used to set static client MAC address to VLAN ID mapping.
+# 0 = disabled (default)
+# 1 = option; use default interface if RADIUS server does not include VLAN ID
+# 2 = required; reject authentication if RADIUS server does not include VLAN ID
+#dynamic_vlan=0
+
+# VLAN interface list for dynamic VLAN mode is read from a separate text file.
+# This list is used to map VLAN ID from the RADIUS server to a network
+# interface. Each station is bound to one interface in the same way as with
+# multiple BSSIDs or SSIDs. Each line in this text file is defining a new
+# interface and the line must include VLAN ID and interface name separated by
+# white space (space or tab).
+#vlan_file=/etc/hostapd.vlan
+
+# Interface where 802.1q tagged packets should appear when a RADIUS server is
+# used to determine which VLAN a station is on.  hostapd creates a bridge for
+# each VLAN.  Then hostapd adds a VLAN interface (associated with the interface
+# indicated by 'vlan_tagged_interface') and the appropriate wireless interface
+# to the bridge.
+#vlan_tagged_interface=eth0
+
+# When hostapd creates a VLAN interface on vlan_tagged_interfaces, it needs
+# to know how to name it.
+# 0 = vlan<XXX>, e.g., vlan1
+# 1 = <vlan_tagged_interface>.<XXX>, e.g. eth0.1
+#vlan_naming=0
+
+# Arbitrary RADIUS attributes can be added into Access-Request and
+# Accounting-Request packets by specifying the contents of the attributes with
+# the following configuration parameters. There can be multiple of these to
+# add multiple attributes. These parameters can also be used to override some
+# of the attributes added automatically by hostapd.
+# Format: <attr_id>[:<syntax:value>]
+# attr_id: RADIUS attribute type (e.g., 26 = Vendor-Specific)
+# syntax: s = string (UTF-8), d = integer, x = octet string
+# value: attribute value in format indicated by the syntax
+# If syntax and value parts are omitted, a null value (single 0x00 octet) is
+# used.
+#
+# Additional Access-Request attributes
+# radius_auth_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_auth_req_attr=126:s:Operator
+# Service-Type = Framed (2)
+#radius_auth_req_attr=6:d:2
+# Connect-Info = "testing" (this overrides the automatically generated value)
+#radius_auth_req_attr=77:s:testing
+# Same Connect-Info value set as a hexdump
+#radius_auth_req_attr=77:x:74657374696e67
+
+#
+# Additional Accounting-Request attributes
+# radius_acct_req_attr=<attr_id>[:<syntax:value>]
+# Examples:
+# Operator-Name = "Operator"
+#radius_acct_req_attr=126:s:Operator
+
+# Dynamic Authorization Extensions (RFC 5176)
+# This mechanism can be used to allow dynamic changes to user session based on
+# commands from a RADIUS server (or some other disconnect client that has the
+# needed session information). For example, Disconnect message can be used to
+# request an associated station to be disconnected.
+#
+# This is disabled by default. Set radius_das_port to non-zero UDP port
+# number to enable.
+#radius_das_port=3799
+#
+# DAS client (the host that can send Disconnect/CoA requests) and shared secret
+#radius_das_client=192.168.1.123 shared secret here
+#
+# DAS Event-Timestamp time window in seconds
+#radius_das_time_window=300
+#
+# DAS require Event-Timestamp
+#radius_das_require_event_timestamp=1
+
+##### RADIUS authentication server configuration ##############################
+
+# hostapd can be used as a RADIUS authentication server for other hosts. This
+# requires that the integrated EAP server is also enabled and both
+# authentication services are sharing the same configuration.
+
+# File name of the RADIUS clients configuration for the RADIUS server. If this
+# commented out, RADIUS server is disabled.
+#radius_server_clients=/etc/hostapd.radius_clients
+
+# The UDP port number for the RADIUS authentication server
+#radius_server_auth_port=1812
+
+# Use IPv6 with RADIUS server (IPv4 will also be supported using IPv6 API)
+#radius_server_ipv6=1
+
+
+##### WPA/IEEE 802.11i configuration ##########################################
+
+# Enable WPA. Setting this variable configures the AP to require WPA (either
+# WPA-PSK or WPA-RADIUS/EAP based on other configuration). For WPA-PSK, either
+# wpa_psk or wpa_passphrase must be set and wpa_key_mgmt must include WPA-PSK.
+# Instead of wpa_psk / wpa_passphrase, wpa_psk_radius might suffice.
+# For WPA-RADIUS/EAP, ieee8021x must be set (but without dynamic WEP keys),
+# RADIUS authentication server must be configured, and WPA-EAP must be included
+# in wpa_key_mgmt.
+# This field is a bit field that can be used to enable WPA (IEEE 802.11i/D3.0)
+# and/or WPA2 (full IEEE 802.11i/RSN):
+# bit0 = WPA
+# bit1 = IEEE 802.11i/RSN (WPA2) (dot11RSNAEnabled)
+#wpa=1
+
+# WPA pre-shared keys for WPA-PSK. This can be either entered as a 256-bit
+# secret in hex format (64 hex digits), wpa_psk, or as an ASCII passphrase
+# (8..63 characters) that will be converted to PSK. This conversion uses SSID
+# so the PSK changes when ASCII passphrase is used and the SSID is changed.
+# wpa_psk (dot11RSNAConfigPSKValue)
+# wpa_passphrase (dot11RSNAConfigPSKPassPhrase)
+#wpa_psk=0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef
+#wpa_passphrase=secret passphrase
+
+# Optionally, WPA PSKs can be read from a separate text file (containing list
+# of (PSK,MAC address) pairs. This allows more than one PSK to be configured.
+# Use absolute path name to make sure that the files can be read on SIGHUP
+# configuration reloads.
+#wpa_psk_file=/etc/hostapd.wpa_psk
+
+# Optionally, WPA passphrase can be received from RADIUS authentication server
+# This requires macaddr_acl to be set to 2 (RADIUS)
+# 0 = disabled (default)
+# 1 = optional; use default passphrase/psk if RADIUS server does not include
+#	Tunnel-Password
+# 2 = required; reject authentication if RADIUS server does not include
+#	Tunnel-Password
+#wpa_psk_radius=0
+
+# Set of accepted key management algorithms (WPA-PSK, WPA-EAP, or both). The
+# entries are separated with a space. WPA-PSK-SHA256 and WPA-EAP-SHA256 can be
+# added to enable SHA256-based stronger algorithms.
+# (dot11RSNAConfigAuthenticationSuitesTable)
+#wpa_key_mgmt=WPA-PSK WPA-EAP
+
+# Set of accepted cipher suites (encryption algorithms) for pairwise keys
+# (unicast packets). This is a space separated list of algorithms:
+# CCMP = AES in Counter mode with CBC-MAC [RFC 3610, IEEE 802.11i/D7.0]
+# TKIP = Temporal Key Integrity Protocol [IEEE 802.11i/D7.0]
+# Group cipher suite (encryption algorithm for broadcast and multicast frames)
+# is automatically selected based on this configuration. If only CCMP is
+# allowed as the pairwise cipher, group cipher will also be CCMP. Otherwise,
+# TKIP will be used as the group cipher.
+# (dot11RSNAConfigPairwiseCiphersTable)
+# Pairwise cipher for WPA (v1) (default: TKIP)
+#wpa_pairwise=TKIP CCMP
+# Pairwise cipher for RSN/WPA2 (default: use wpa_pairwise value)
+#rsn_pairwise=CCMP
+
+# Time interval for rekeying GTK (broadcast/multicast encryption keys) in
+# seconds. (dot11RSNAConfigGroupRekeyTime)
+#wpa_group_rekey=600
+
+# Rekey GTK when any STA that possesses the current GTK is leaving the BSS.
+# (dot11RSNAConfigGroupRekeyStrict)
+#wpa_strict_rekey=1
+
+# Time interval for rekeying GMK (master key used internally to generate GTKs
+# (in seconds).
+#wpa_gmk_rekey=86400
+
+# Maximum lifetime for PTK in seconds. This can be used to enforce rekeying of
+# PTK to mitigate some attacks against TKIP deficiencies.
+#wpa_ptk_rekey=600
+
+# Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up
+# roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN
+# authentication and key handshake before actually associating with a new AP.
+# (dot11RSNAPreauthenticationEnabled)
+#rsn_preauth=1
+#
+# Space separated list of interfaces from which pre-authentication frames are
+# accepted (e.g., 'eth0' or 'eth0 wlan0wds0'. This list should include all
+# interface that are used for connections to other APs. This could include
+# wired interfaces and WDS links. The normal wireless data interface towards
+# associated stations (e.g., wlan0) should not be added, since
+# pre-authentication is only used with APs other than the currently associated
+# one.
+#rsn_preauth_interfaces=eth0
+
+# peerkey: Whether PeerKey negotiation for direct links (IEEE 802.11e) is
+# allowed. This is only used with RSN/WPA2.
+# 0 = disabled (default)
+# 1 = enabled
+#peerkey=1
+
+# ieee80211w: Whether management frame protection (MFP) is enabled
+# 0 = disabled (default)
+# 1 = optional
+# 2 = required
+#ieee80211w=0
+
+# Association SA Query maximum timeout (in TU = 1.024 ms; for MFP)
+# (maximum time to wait for a SA Query response)
+# dot11AssociationSAQueryMaximumTimeout, 1...4294967295
+#assoc_sa_query_max_timeout=1000
+
+# Association SA Query retry timeout (in TU = 1.024 ms; for MFP)
+# (time between two subsequent SA Query requests)
+# dot11AssociationSAQueryRetryTimeout, 1...4294967295
+#assoc_sa_query_retry_timeout=201
+
+# disable_pmksa_caching: Disable PMKSA caching
+# This parameter can be used to disable caching of PMKSA created through EAP
+# authentication. RSN preauthentication may still end up using PMKSA caching if
+# it is enabled (rsn_preauth=1).
+# 0 = PMKSA caching enabled (default)
+# 1 = PMKSA caching disabled
+#disable_pmksa_caching=0
+
+# okc: Opportunistic Key Caching (aka Proactive Key Caching)
+# Allow PMK cache to be shared opportunistically among configured interfaces
+# and BSSes (i.e., all configurations within a single hostapd process).
+# 0 = disabled (default)
+# 1 = enabled
+#okc=1
+
+
+##### IEEE 802.11r configuration ##############################################
+
+# Mobility Domain identifier (dot11FTMobilityDomainID, MDID)
+# MDID is used to indicate a group of APs (within an ESS, i.e., sharing the
+# same SSID) between which a STA can use Fast BSS Transition.
+# 2-octet identifier as a hex string.
+#mobility_domain=a1b2
+
+# PMK-R0 Key Holder identifier (dot11FTR0KeyHolderID)
+# 1 to 48 octet identifier.
+# This is configured with nas_identifier (see RADIUS client section above).
+
+# Default lifetime of the PMK-RO in minutes; range 1..65535
+# (dot11FTR0KeyLifetime)
+#r0_key_lifetime=10000
+
+# PMK-R1 Key Holder identifier (dot11FTR1KeyHolderID)
+# 6-octet identifier as a hex string.
+#r1_key_holder=000102030405
+
+# Reassociation deadline in time units (TUs / 1.024 ms; range 1000..65535)
+# (dot11FTReassociationDeadline)
+#reassociation_deadline=1000
+
+# List of R0KHs in the same Mobility Domain
+# format: <MAC address> <NAS Identifier> <128-bit key as hex string>
+# This list is used to map R0KH-ID (NAS Identifier) to a destination MAC
+# address when requesting PMK-R1 key from the R0KH that the STA used during the
+# Initial Mobility Domain Association.
+#r0kh=02:01:02:03:04:05 r0kh-1.example.com 000102030405060708090a0b0c0d0e0f
+#r0kh=02:01:02:03:04:06 r0kh-2.example.com 00112233445566778899aabbccddeeff
+# And so on.. One line per R0KH.
+
+# List of R1KHs in the same Mobility Domain
+# format: <MAC address> <R1KH-ID> <128-bit key as hex string>
+# This list is used to map R1KH-ID to a destination MAC address when sending
+# PMK-R1 key from the R0KH. This is also the list of authorized R1KHs in the MD
+# that can request PMK-R1 keys.
+#r1kh=02:01:02:03:04:05 02:11:22:33:44:55 000102030405060708090a0b0c0d0e0f
+#r1kh=02:01:02:03:04:06 02:11:22:33:44:66 00112233445566778899aabbccddeeff
+# And so on.. One line per R1KH.
+
+# Whether PMK-R1 push is enabled at R0KH
+# 0 = do not push PMK-R1 to all configured R1KHs (default)
+# 1 = push PMK-R1 to all configured R1KHs whenever a new PMK-R0 is derived
+#pmk_r1_push=1
+
+##### Neighbor table ##########################################################
+# Maximum number of entries kept in AP table (either for neigbor table or for
+# detecting Overlapping Legacy BSS Condition). The oldest entry will be
+# removed when adding a new entry that would make the list grow over this
+# limit. Note! WFA certification for IEEE 802.11g requires that OLBC is
+# enabled, so this field should not be set to 0 when using IEEE 802.11g.
+# default: 255
+#ap_table_max_size=255
+
+# Number of seconds of no frames received after which entries may be deleted
+# from the AP table. Since passive scanning is not usually performed frequently
+# this should not be set to very small value. In addition, there is no
+# guarantee that every scan cycle will receive beacon frames from the
+# neighboring APs.
+# default: 60
+#ap_table_expiration_time=3600
+
+
+##### Wi-Fi Protected Setup (WPS) #############################################
+
+# WPS state
+# 0 = WPS disabled (default)
+# 1 = WPS enabled, not configured
+# 2 = WPS enabled, configured
+#wps_state=2
+
+# AP can be configured into a locked state where new WPS Registrar are not
+# accepted, but previously authorized Registrars (including the internal one)
+# can continue to add new Enrollees.
+#ap_setup_locked=1
+
+# Universally Unique IDentifier (UUID; see RFC 4122) of the device
+# This value is used as the UUID for the internal WPS Registrar. If the AP
+# is also using UPnP, this value should be set to the device's UPnP UUID.
+# If not configured, UUID will be generated based on the local MAC address.
+#uuid=12345678-9abc-def0-1234-56789abcdef0
+
+# Note: If wpa_psk_file is set, WPS is used to generate random, per-device PSKs
+# that will be appended to the wpa_psk_file. If wpa_psk_file is not set, the
+# default PSK (wpa_psk/wpa_passphrase) will be delivered to Enrollees. Use of
+# per-device PSKs is recommended as the more secure option (i.e., make sure to
+# set wpa_psk_file when using WPS with WPA-PSK).
+
+# When an Enrollee requests access to the network with PIN method, the Enrollee
+# PIN will need to be entered for the Registrar. PIN request notifications are
+# sent to hostapd ctrl_iface monitor. In addition, they can be written to a
+# text file that could be used, e.g., to populate the AP administration UI with
+# pending PIN requests. If the following variable is set, the PIN requests will
+# be written to the configured file.
+#wps_pin_requests=/var/run/hostapd_wps_pin_requests
+
+# Device Name
+# User-friendly description of device; up to 32 octets encoded in UTF-8
+#device_name=Wireless AP
+
+# Manufacturer
+# The manufacturer of the device (up to 64 ASCII characters)
+#manufacturer=Company
+
+# Model Name
+# Model of the device (up to 32 ASCII characters)
+#model_name=WAP
+
+# Model Number
+# Additional device description (up to 32 ASCII characters)
+#model_number=123
+
+# Serial Number
+# Serial number of the device (up to 32 characters)
+#serial_number=12345
+
+# Primary Device Type
+# Used format: <categ>-<OUI>-<subcateg>
+# categ = Category as an integer value
+# OUI = OUI and type octet as a 4-octet hex-encoded value; 0050F204 for
+#       default WPS OUI
+# subcateg = OUI-specific Sub Category as an integer value
+# Examples:
+#   1-0050F204-1 (Computer / PC)
+#   1-0050F204-2 (Computer / Server)
+#   5-0050F204-1 (Storage / NAS)
+#   6-0050F204-1 (Network Infrastructure / AP)
+#device_type=6-0050F204-1
+
+# OS Version
+# 4-octet operating system version number (hex string)
+#os_version=01020300
+
+# Config Methods
+# List of the supported configuration methods
+# Available methods: usba ethernet label display ext_nfc_token int_nfc_token
+#	nfc_interface push_button keypad virtual_display physical_display
+#	virtual_push_button physical_push_button
+#config_methods=label virtual_display virtual_push_button keypad
+
+# WPS capability discovery workaround for PBC with Windows 7
+# Windows 7 uses incorrect way of figuring out AP's WPS capabilities by acting
+# as a Registrar and using M1 from the AP. The config methods attribute in that
+# message is supposed to indicate only the configuration method supported by
+# the AP in Enrollee role, i.e., to add an external Registrar. For that case,
+# PBC shall not be used and as such, the PushButton config method is removed
+# from M1 by default. If pbc_in_m1=1 is included in the configuration file,
+# the PushButton config method is left in M1 (if included in config_methods
+# parameter) to allow Windows 7 to use PBC instead of PIN (e.g., from a label
+# in the AP).
+#pbc_in_m1=1
+
+# Static access point PIN for initial configuration and adding Registrars
+# If not set, hostapd will not allow external WPS Registrars to control the
+# access point. The AP PIN can also be set at runtime with hostapd_cli
+# wps_ap_pin command. Use of temporary (enabled by user action) and random
+# AP PIN is much more secure than configuring a static AP PIN here. As such,
+# use of the ap_pin parameter is not recommended if the AP device has means for
+# displaying a random PIN.
+#ap_pin=12345670
+
+# Skip building of automatic WPS credential
+# This can be used to allow the automatically generated Credential attribute to
+# be replaced with pre-configured Credential(s).
+#skip_cred_build=1
+
+# Additional Credential attribute(s)
+# This option can be used to add pre-configured Credential attributes into M8
+# message when acting as a Registrar. If skip_cred_build=1, this data will also
+# be able to override the Credential attribute that would have otherwise been
+# automatically generated based on network configuration. This configuration
+# option points to an external file that much contain the WPS Credential
+# attribute(s) as binary data.
+#extra_cred=hostapd.cred
+
+# Credential processing
+#   0 = process received credentials internally (default)
+#   1 = do not process received credentials; just pass them over ctrl_iface to
+#	external program(s)
+#   2 = process received credentials internally and pass them over ctrl_iface
+#	to external program(s)
+# Note: With wps_cred_processing=1, skip_cred_build should be set to 1 and
+# extra_cred be used to provide the Credential data for Enrollees.
+#
+# wps_cred_processing=1 will disabled automatic updates of hostapd.conf file
+# both for Credential processing and for marking AP Setup Locked based on
+# validation failures of AP PIN. An external program is responsible on updating
+# the configuration appropriately in this case.
+#wps_cred_processing=0
+
+# AP Settings Attributes for M7
+# By default, hostapd generates the AP Settings Attributes for M7 based on the
+# current configuration. It is possible to override this by providing a file
+# with pre-configured attributes. This is similar to extra_cred file format,
+# but the AP Settings attributes are not encapsulated in a Credential
+# attribute.
+#ap_settings=hostapd.ap_settings
+
+# WPS UPnP interface
+# If set, support for external Registrars is enabled.
+#upnp_iface=br0
+
+# Friendly Name (required for UPnP)
+# Short description for end use. Should be less than 64 characters.
+#friendly_name=WPS Access Point
+
+# Manufacturer URL (optional for UPnP)
+#manufacturer_url=http://www.example.com/
+
+# Model Description (recommended for UPnP)
+# Long description for end user. Should be less than 128 characters.
+#model_description=Wireless Access Point
+
+# Model URL (optional for UPnP)
+#model_url=http://www.example.com/model/
+
+# Universal Product Code (optional for UPnP)
+# 12-digit, all-numeric code that identifies the consumer package.
+#upc=123456789012
+
+# WPS RF Bands (a = 5G, b = 2.4G, g = 2.4G, ag = dual band)
+# This value should be set according to RF band(s) supported by the AP if
+# hw_mode is not set. For dual band dual concurrent devices, this needs to be
+# set to ag to allow both RF bands to be advertized.
+#wps_rf_bands=ag
+
+# NFC password token for WPS
+# These parameters can be used to configure a fixed NFC password token for the
+# AP. This can be generated, e.g., with nfc_pw_token from wpa_supplicant. When
+# these parameters are used, the AP is assumed to be deployed with a NFC tag
+# that includes the matching NFC password token (e.g., written based on the
+# NDEF record from nfc_pw_token).
+#
+#wps_nfc_dev_pw_id: Device Password ID (16..65535)
+#wps_nfc_dh_pubkey: Hexdump of DH Public Key
+#wps_nfc_dh_privkey: Hexdump of DH Private Key
+#wps_nfc_dev_pw: Hexdump of Device Password
+
+##### Wi-Fi Direct (P2P) ######################################################
+
+# Enable P2P Device management
+#manage_p2p=1
+
+# Allow cross connection
+#allow_cross_connection=1
+
+#### TDLS (IEEE 802.11z-2010) #################################################
+
+# Prohibit use of TDLS in this BSS
+#tdls_prohibit=1
+
+# Prohibit use of TDLS Channel Switching in this BSS
+#tdls_prohibit_chan_switch=1
+
+##### IEEE 802.11v-2011 #######################################################
+
+# Time advertisement
+# 0 = disabled (default)
+# 2 = UTC time at which the TSF timer is 0
+#time_advertisement=2
+
+# Local time zone as specified in 8.3 of IEEE Std 1003.1-2004:
+# stdoffset[dst[offset][,start[/time],end[/time]]]
+#time_zone=EST5
+
+# WNM-Sleep Mode (extended sleep mode for stations)
+# 0 = disabled (default)
+# 1 = enabled (allow stations to use WNM-Sleep Mode)
+#wnm_sleep_mode=1
+
+# BSS Transition Management
+# 0 = disabled (default)
+# 1 = enabled
+#bss_transition=1
+
+##### IEEE 802.11u-2011 #######################################################
+
+# Enable Interworking service
+#interworking=1
+
+# Access Network Type
+# 0 = Private network
+# 1 = Private network with guest access
+# 2 = Chargeable public network
+# 3 = Free public network
+# 4 = Personal device network
+# 5 = Emergency services only network
+# 14 = Test or experimental
+# 15 = Wildcard
+#access_network_type=0
+
+# Whether the network provides connectivity to the Internet
+# 0 = Unspecified
+# 1 = Network provides connectivity to the Internet
+#internet=1
+
+# Additional Step Required for Access
+# Note: This is only used with open network, i.e., ASRA shall ne set to 0 if
+# RSN is used.
+#asra=0
+
+# Emergency services reachable
+#esr=0
+
+# Unauthenticated emergency service accessible
+#uesa=0
+
+# Venue Info (optional)
+# The available values are defined in IEEE Std 802.11u-2011, 7.3.1.34.
+# Example values (group,type):
+# 0,0 = Unspecified
+# 1,7 = Convention Center
+# 1,13 = Coffee Shop
+# 2,0 = Unspecified Business
+# 7,1  Private Residence
+#venue_group=7
+#venue_type=1
+
+# Homogeneous ESS identifier (optional; dot11HESSID)
+# If set, this shall be identifical to one of the BSSIDs in the homogeneous
+# ESS and this shall be set to the same value across all BSSs in homogeneous
+# ESS.
+#hessid=02:03:04:05:06:07
+
+# Roaming Consortium List
+# Arbitrary number of Roaming Consortium OIs can be configured with each line
+# adding a new OI to the list. The first three entries are available through
+# Beacon and Probe Response frames. Any additional entry will be available only
+# through ANQP queries. Each OI is between 3 and 15 octets and is configured as
+# a hexstring.
+#roaming_consortium=021122
+#roaming_consortium=2233445566
+
+# Venue Name information
+# This parameter can be used to configure one or more Venue Name Duples for
+# Venue Name ANQP information. Each entry has a two or three character language
+# code (ISO-639) separated by colon from the venue name string.
+# Note that venue_group and venue_type have to be set for Venue Name
+# information to be complete.
+#venue_name=eng:Example venue
+#venue_name=fin:Esimerkkipaikka
+
+# Network Authentication Type
+# This parameter indicates what type of network authentication is used in the
+# network.
+# format: <network auth type indicator (1-octet hex str)> [redirect URL]
+# Network Authentication Type Indicator values:
+# 00 = Acceptance of terms and conditions
+# 01 = On-line enrollment supported
+# 02 = http/https redirection
+# 03 = DNS redirection
+#network_auth_type=00
+#network_auth_type=02http://www.example.com/redirect/me/here/
+
+# IP Address Type Availability
+# format: <1-octet encoded value as hex str>
+# (ipv4_type & 0x3f) << 2 | (ipv6_type & 0x3)
+# ipv4_type:
+# 0 = Address type not available
+# 1 = Public IPv4 address available
+# 2 = Port-restricted IPv4 address available
+# 3 = Single NATed private IPv4 address available
+# 4 = Double NATed private IPv4 address available
+# 5 = Port-restricted IPv4 address and single NATed IPv4 address available
+# 6 = Port-restricted IPv4 address and double NATed IPv4 address available
+# 7 = Availability of the address type is not known
+# ipv6_type:
+# 0 = Address type not available
+# 1 = Address type available
+# 2 = Availability of the address type not known
+#ipaddr_type_availability=14
+
+# Domain Name
+# format: <variable-octet str>[,<variable-octet str>]
+#domain_name=example.com,another.example.com,yet-another.example.com
+
+# 3GPP Cellular Network information
+# format: <MCC1,MNC1>[;<MCC2,MNC2>][;...]
+#anqp_3gpp_cell_net=244,91;310,026;234,56
+
+# NAI Realm information
+# One or more realm can be advertised. Each nai_realm line adds a new realm to
+# the set. These parameters provide information for stations using Interworking
+# network selection to allow automatic connection to a network based on
+# credentials.
+# format: <encoding>,<NAI Realm(s)>[,<EAP Method 1>][,<EAP Method 2>][,...]
+# encoding:
+#	0 = Realm formatted in accordance with IETF RFC 4282
+#	1 = UTF-8 formatted character string that is not formatted in
+#	    accordance with IETF RFC 4282
+# NAI Realm(s): Semi-colon delimited NAI Realm(s)
+# EAP Method: <EAP Method>[:<[AuthParam1:Val1]>][<[AuthParam2:Val2]>][...]
+# AuthParam (Table 8-188 in IEEE Std 802.11-2012):
+# ID 2 = Non-EAP Inner Authentication Type
+#	1 = PAP, 2 = CHAP, 3 = MSCHAP, 4 = MSCHAPV2
+# ID 3 = Inner authentication EAP Method Type
+# ID 5 = Credential Type
+#	1 = SIM, 2 = USIM, 3 = NFC Secure Element, 4 = Hardware Token,
+#	5 = Softoken, 6 = Certificate, 7 = username/password, 9 = Anonymous,
+#	10 = Vendor Specific
+#nai_realm=0,example.com;example.net
+# EAP methods EAP-TLS with certificate and EAP-TTLS/MSCHAPv2 with
+# username/password
+#nai_realm=0,example.org,13[5:6],21[2:4][5:7]
+
+##### Hotspot 2.0 #############################################################
+
+# Enable Hotspot 2.0 support
+#hs20=1
+
+# Disable Downstream Group-Addressed Forwarding (DGAF)
+# This can be used to configure a network where no group-addressed frames are
+# allowed. The AP will not forward any group-address frames to the stations and
+# random GTKs are issued for each station to prevent associated stations from
+# forging such frames to other stations in the BSS.
+#disable_dgaf=1
+
+# Operator Friendly Name
+# This parameter can be used to configure one or more Operator Friendly Name
+# Duples. Each entry has a two or three character language code (ISO-639)
+# separated by colon from the operator friendly name string.
+#hs20_oper_friendly_name=eng:Example operator
+#hs20_oper_friendly_name=fin:Esimerkkioperaattori
+
+# Connection Capability
+# This can be used to advertise what type of IP traffic can be sent through the
+# hotspot (e.g., due to firewall allowing/blocking protocols/ports).
+# format: <IP Protocol>:<Port Number>:<Status>
+# IP Protocol: 1 = ICMP, 6 = TCP, 17 = UDP
+# Port Number: 0..65535
+# Status: 0 = Closed, 1 = Open, 2 = Unknown
+# Each hs20_conn_capab line is added to the list of advertised tuples.
+#hs20_conn_capab=1:0:2
+#hs20_conn_capab=6:22:1
+#hs20_conn_capab=17:5060:0
+
+# WAN Metrics
+# format: <WAN Info>:<DL Speed>:<UL Speed>:<DL Load>:<UL Load>:<LMD>
+# WAN Info: B0-B1: Link Status, B2: Symmetric Link, B3: At Capabity
+#    (encoded as two hex digits)
+#    Link Status: 1 = Link up, 2 = Link down, 3 = Link in test state
+# Downlink Speed: Estimate of WAN backhaul link current downlink speed in kbps;
+#	1..4294967295; 0 = unknown
+# Uplink Speed: Estimate of WAN backhaul link current uplink speed in kbps
+#	1..4294967295; 0 = unknown
+# Downlink Load: Current load of downlink WAN connection (scaled to 255 = 100%)
+# Uplink Load: Current load of uplink WAN connection (scaled to 255 = 100%)
+# Load Measurement Duration: Duration for measuring downlink/uplink load in
+# tenths of a second (1..65535); 0 if load cannot be determined
+#hs20_wan_metrics=01:8000:1000:80:240:3000
+
+# Operating Class Indication
+# List of operating classes the BSSes in this ESS use. The Global operating
+# classes in Table E-4 of IEEE Std 802.11-2012 Annex E define the values that
+# can be used in this.
+# format: hexdump of operating class octets
+# for example, operating classes 81 (2.4 GHz channels 1-13) and 115 (5 GHz
+# channels 36-48):
+#hs20_operating_class=5173
+
+##### Multiple BSSID support ##################################################
+#
+# Above configuration is using the default interface (wlan#, or multi-SSID VLAN
+# interfaces). Other BSSIDs can be added by using separator 'bss' with
+# default interface name to be allocated for the data packets of the new BSS.
+#
+# hostapd will generate BSSID mask based on the BSSIDs that are
+# configured. hostapd will verify that dev_addr & MASK == dev_addr. If this is
+# not the case, the MAC address of the radio must be changed before starting
+# hostapd (ifconfig wlan0 hw ether <MAC addr>). If a BSSID is configured for
+# every secondary BSS, this limitation is not applied at hostapd and other
+# masks may be used if the driver supports them (e.g., swap the locally
+# administered bit)
+#
+# BSSIDs are assigned in order to each BSS, unless an explicit BSSID is
+# specified using the 'bssid' parameter.
+# If an explicit BSSID is specified, it must be chosen such that it:
+# - results in a valid MASK that covers it and the dev_addr
+# - is not the same as the MAC address of the radio
+# - is not the same as any other explicitly specified BSSID
+#
+# Please note that hostapd uses some of the values configured for the first BSS
+# as the defaults for the following BSSes. However, it is recommended that all
+# BSSes include explicit configuration of all relevant configuration items.
+#
+#bss=wlan0_0
+#ssid=test2
+# most of the above items can be used here (apart from radio interface specific
+# items, like channel)
+
+#bss=wlan0_1
+#bssid=00:13:10:95:fe:0b
+# ...
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/load_dhcp.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/load_dhcp.sh
new file mode 100644
index 0000000000000..88f88ba811ad1
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/template/load_dhcp.sh
@@ -0,0 +1,23 @@
+#/bin/bash
+BLUE='\e[1;34m'
+GREEN='\e[1;32m'
+CYAN='\e[1;36m'
+RED='\e[1;31m'
+PURPLE='\e[1;35m'
+YELLOW='\e[1;33m'
+# No Color
+NC='\e[0m'
+
+echo -e "${YELLOW}Load DHCP...${NC}"
+
+echo -e "${GREEN}Config IP.${NC}"
+ifconfig wlan@@ up
+ifconfig wlan@@ 192.168.0.1 netmask 255.255.255.0
+
+echo -e "${GREEN}Config DHCP Server.${NC}"
+service isc-dhcp-server start
+sleep 3
+
+echo -e "${GREEN}Config routing table.${NC}"
+bash -c "echo 1 >/proc/sys/net/ipv4/ip_forward"
+iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload.sh
new file mode 100644
index 0000000000000..f10e6b9860673
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload.sh
@@ -0,0 +1,4 @@
+#/bin/bash
+#if you want to modify unload process ,please modify  ../unload.sh, Do not change the file.
+../unload.sh
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_ap.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_ap.sh
new file mode 100644
index 0000000000000..1b975d0e94d9c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_ap.sh
@@ -0,0 +1,8 @@
+#/bin/bash
+
+hostapd_pid=`pgrep hostapd`
+[ $? -eq 0 ] && (echo "\nKilling hostapd..."; kill -KILL $hostapd_pid)
+
+dhcpd_pid=`pgrep dhcpd`
+[ $? -eq 0 ] && (echo "\nKilling dhcpd..."; kill -KILL $dhcpd_pid)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_dhcp.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_dhcp.sh
new file mode 100644
index 0000000000000..5616fb50bf636
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/unload_dhcp.sh
@@ -0,0 +1,4 @@
+#/bin/bash
+
+killall dhcpd
+#ps aux|grep dhcpd
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa-cli-action.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa-cli-action.sh
new file mode 100644
index 0000000000000..dddf0b9face0e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa-cli-action.sh
@@ -0,0 +1 @@
+wpa_cli -i wlan2 -a p2p-action.sh
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa.conf.template b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa.conf.template
new file mode 100644
index 0000000000000..58b1422e6417a
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/script/wpa.conf.template
@@ -0,0 +1,13 @@
+ctrl_interface=/var/run/wpa_supplicant
+ap_scan=1
+fast_reauth=1
+uuid=12345678-9abc-def0-1234-56789abcde11
+device_name=X86-Platform
+manufacturer=iComm Corporation
+model_name=Wi-Fi reference chip
+model_number=123
+serial_number=MAC_ADDR
+device_type=1-0050F204-1
+os_version=01020300
+config_methods=display push_button virtual_display virtual_push_button
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/Makefile
new file mode 100644
index 0000000000000..6e233af0c1585
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/Makefile
@@ -0,0 +1,33 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/ssvdevice/Module.symvers
+KBUILD_EXTRA_SYMBOLS += $(KBUILD_TOP)/hci/Module.symvers
+
+KMODULE_NAME=ssv6200s_core
+KERN_SRCS := init.c
+KERN_SRCS += dev.c
+KERN_SRCS += ssv_rc.c
+KERN_SRCS += ssv_ht_rc.c
+KERN_SRCS += lib.c
+KERN_SRCS += ap.c
+KERN_SRCS += ampdu.c
+KERN_SRCS += ssv6xxx_debugfs.c
+KERN_SRCS += sec_ccmp.c
+KERN_SRCS += sec_tkip.c
+KERN_SRCS += sec_wep.c
+KERN_SRCS += wapi_sms4.c
+KERN_SRCS += sec_wpi.c
+KERN_SRCS += efuse.c
+KERN_SRCS += p2p.c
+KERN_SRCS += sar.c
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.c
new file mode 100644
index 0000000000000..10a7f97434e44
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.c
@@ -0,0 +1,2337 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/version.h>
+#include <ssv6200.h>
+#include "dev.h"
+#include "ap.h"
+#include "sec.h"
+#include "ssv_rc_common.h"
+#include "ssv_ht_rc.h"
+extern struct ieee80211_ops ssv6200_ops;
+#define BA_WAIT_TIMEOUT (800)
+#define AMPDU_BA_FRAME_LEN (68)
+#define ampdu_skb_hdr(skb) ((struct ieee80211_hdr*)((u8*)((skb)->data)+AMPDU_DELIMITER_LEN))
+#define ampdu_skb_ssn(skb) ((ampdu_skb_hdr(skb)->seq_ctrl)>>SSV_SEQ_NUM_SHIFT)
+#define ampdu_hdr_ssn(hdr) ((hdr)->seq_ctrl>>SSV_SEQ_NUM_SHIFT)
+#if 0
+#define prn_aggr_dbg(fmt,...) \
+    do { \
+        printk(KERN_DEBUG fmt, ##__VA_ARGS__); \
+    } while (0)
+#else
+#undef prn_aggr_dbg
+#define prn_aggr_dbg(fmt,...) 
+#endif
+#if 0
+#define prn_aggr_err(fmt,...) \
+    do { \
+        printk(KERN_ERR fmt, ##__VA_ARGS__);\
+    } while (0)
+#else
+static void void_func(const char *fmt, ...)
+{
+}
+#define prn_aggr_err(fmt,...) \
+    do { \
+        void_func(KERN_ERR fmt, ##__VA_ARGS__);\
+    } while (0)
+#endif
+#define get_tid_aggr_len(agg_len,tid_data) \
+    ({ \
+        u32 agg_max_num = (tid_data)->agg_num_max; \
+        u32 to_agg_len = (agg_len); \
+        (agg_len >= agg_max_num) ? agg_max_num : to_agg_len; \
+    })
+#define INDEX_PKT_BY_SSN(tid,ssn) \
+    ((tid)->aggr_pkts[(ssn) % SSV_AMPDU_BA_WINDOW_SIZE])
+#define NEXT_PKT_SN(sn) \
+    ({ (sn + 1) % SSV_AMPDU_MAX_SSN; })
+#define INC_PKT_SN(sn) \
+    ({ \
+        sn = NEXT_PKT_SN(sn); \
+        sn; \
+    })
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+static ssize_t ampdu_tx_mib_dump(struct ssv_sta_priv_data *ssv_sta_priv,
+     char *mib_str, ssize_t length);
+static int _dump_ba_skb(char *buf, int buf_size, struct sk_buff *ba_skb);
+#endif
+static struct sk_buff* _aggr_retry_mpdu (struct ssv_softc *sc,
+                                         struct AMPDU_TID_st *cur_AMPDU_TID,
+                                         struct sk_buff_head *retry_queue,
+                                         u32 max_aggr_len);
+static int _dump_BA_notification (char *buf,
+                                  struct ampdu_ba_notify_data *ba_notification);
+static struct sk_buff *_alloc_ampdu_skb (struct ssv_softc *sc,
+                                         struct AMPDU_TID_st *ampdu_tid,
+                                         u32 len);
+static bool _sync_ampdu_pkt_arr (struct AMPDU_TID_st *ampdu_tid,
+                                 struct sk_buff *ampdu_skb, bool retry);
+static void _put_mpdu_to_ampdu (struct sk_buff *ampdu,
+                                struct sk_buff *mpdu);
+static void _add_ampdu_txinfo (struct ssv_softc *sc, struct sk_buff *ampdu_skb);
+static u32 _flush_early_ampdu_q (struct ssv_softc *sc,
+                                 struct AMPDU_TID_st *ampdu_tid);
+static bool _is_skb_q_empty (struct ssv_softc *sc, struct sk_buff *skb);
+static void _aggr_ampdu_tx_q (struct ieee80211_hw *hw,
+                              struct AMPDU_TID_st *ampdu_tid);
+static void _queue_early_ampdu (struct ssv_softc *sc,
+                                struct AMPDU_TID_st *ampdu_tid,
+                                struct sk_buff *ampdu_skb);
+static int _mark_skb_retry (struct SKB_info_st *skb_info, struct sk_buff *skb);
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+unsigned int cal_duration_of_ampdu(struct sk_buff *ampdu_skb, int stage)
+{
+ unsigned int timeout;
+    SKB_info *mpdu_skb_info;
+    u16 ssn = 0;
+    struct sk_buff *mpdu = NULL;
+    struct ampdu_hdr_st *ampdu_hdr = NULL;
+ ktime_t current_ktime;
+ ampdu_hdr = (struct ampdu_hdr_st *) ampdu_skb->head;
+ ssn = ampdu_hdr->ssn[0];
+ mpdu = INDEX_PKT_BY_SSN(ampdu_hdr->ampdu_tid, ssn);
+ if (mpdu == NULL)
+  return 0;
+ mpdu_skb_info = (SKB_info *) (mpdu->head);
+ current_ktime = ktime_get();
+ timeout = (unsigned int)ktime_to_ms(ktime_sub(current_ktime, mpdu_skb_info->timestamp));
+ if (timeout > SKB_DURATION_TIMEOUT_MS) {
+  if (stage == SKB_DURATION_STAGE_TO_SDIO)
+   printk("*a_to_sdio: %ums\n", timeout);
+  else if (stage == SKB_DURATION_STAGE_TX_ENQ)
+   printk("*a_to_txenqueue: %ums\n", timeout);
+  else
+   printk("*a_in_hwq: %ums\n", timeout);
+ }
+ return timeout;
+}
+#endif
+static u8 _cal_ampdu_delm_half_crc (u8 value)
+{
+    u32 c32 = value, v32 = value;
+    c32 ^= (v32 >> 1) | (v32 << 7);
+    c32 ^= (v32 >> 2);
+    if (v32 & 2)
+        c32 ^= (0xC0);
+    c32 ^= ((v32 << 4) & 0x30);
+    return (u8) c32;
+}
+static u8 _cal_ampdu_delm_crc (u8 *pointer)
+{
+    u8 crc = 0xCF;
+    crc ^= _cal_ampdu_delm_half_crc(*pointer++);
+    crc = _cal_ampdu_delm_half_crc(crc) ^ _cal_ampdu_delm_half_crc(*pointer);
+    return ~crc;
+}
+static bool ssv6200_ampdu_add_delimiter_and_crc32 (struct sk_buff *mpdu)
+{
+    p_AMPDU_DELIMITER delimiter_p;
+    struct ieee80211_hdr *mpdu_hdr;
+    int ret;
+    u32 orig_mpdu_len = mpdu->len;
+    u32 pad = (4 - (orig_mpdu_len % 4)) % 4;
+    mpdu_hdr = (struct ieee80211_hdr*) (mpdu->data);
+    mpdu_hdr->duration_id = AMPDU_TX_NAV_MCS_567;
+    ret = skb_padto(mpdu, mpdu->len + (AMPDU_FCS_LEN + pad));
+    if (ret)
+    {
+        printk(KERN_ERR "Failed to extand skb for aggregation.");
+        return false;
+    }
+    skb_put(mpdu, AMPDU_FCS_LEN + pad);
+    skb_push(mpdu, AMPDU_DELIMITER_LEN);
+    delimiter_p = (p_AMPDU_DELIMITER) mpdu->data;
+    delimiter_p->reserved = 0;
+    delimiter_p->length = orig_mpdu_len + AMPDU_FCS_LEN;
+    delimiter_p->signature = AMPDU_SIGNATURE;
+    delimiter_p->crc = _cal_ampdu_delm_crc((u8*) (delimiter_p));
+    return true;
+}
+static void ssv6200_ampdu_hw_init (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    u32 temp32;
+    SMAC_REG_READ(sc->sh, ADR_MTX_MISC_EN, &temp32);
+    temp32 |= (0x1 << MTX_AMPDU_CRC_AUTO_SFT);
+    SMAC_REG_WRITE(sc->sh, ADR_MTX_MISC_EN, temp32);
+    SMAC_REG_READ(sc->sh, ADR_MTX_MISC_EN, &temp32);
+}
+bool _sync_ampdu_pkt_arr (struct AMPDU_TID_st *ampdu_tid, struct sk_buff *ampdu,
+                          bool retry)
+{
+    struct sk_buff **pp_aggr_pkt;
+    struct sk_buff *p_aggr_pkt;
+    unsigned long flags;
+    struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *) ampdu->head;
+    struct sk_buff *mpdu;
+    u32 first_ssn = SSV_ILLEGAL_SN;
+    u32 old_aggr_pkt_num;
+    u32 old_baw_head;
+    u32 sync_num = skb_queue_len(&ampdu_hdr->mpdu_q);
+    bool ret = true;
+    spin_lock_irqsave(&ampdu_tid->pkt_array_lock, flags);
+    old_baw_head = ampdu_tid->ssv_baw_head;
+    old_aggr_pkt_num = ampdu_tid->aggr_pkt_num;
+    ampdu_tid->mib.ampdu_mib_ampdu_counter += 1;
+    ampdu_tid->mib.ampdu_mib_dist[sync_num] += 1;
+    do
+    {
+        if (!retry)
+        {
+            ampdu_tid->mib.ampdu_mib_mpdu_counter += sync_num;
+            mpdu = skb_peek_tail(&ampdu_hdr->mpdu_q);
+            if (mpdu == NULL)
+            {
+                ret = false;
+                break;
+            }
+            else
+            {
+                u32 ssn = ampdu_skb_ssn(mpdu);
+                p_aggr_pkt = INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+                if (p_aggr_pkt != NULL)
+                {
+                    char msg[256];
+                    u32 sn = ampdu_skb_ssn(mpdu);
+                    skb_queue_walk(&ampdu_hdr->mpdu_q, mpdu)
+                    {
+                        sn = ampdu_skb_ssn(mpdu);
+                        sprintf(msg, " %d", sn);
+                    }
+                    prn_aggr_err("ES %d -> %d (%s)\n",
+                                 ssn, ampdu_skb_ssn(p_aggr_pkt), msg);
+                    ret = false;
+                    break;
+                }
+            }
+        }
+        else
+            ampdu_tid->mib.ampdu_mib_aggr_retry_counter += 1;
+        skb_queue_walk(&ampdu_hdr->mpdu_q, mpdu)
+        {
+            u32 ssn = ampdu_skb_ssn(mpdu);
+            SKB_info *mpdu_skb_info = (SKB_info *) (mpdu->head);
+            if (first_ssn == SSV_ILLEGAL_SN)
+                first_ssn = ssn;
+            pp_aggr_pkt = &INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+            p_aggr_pkt = *pp_aggr_pkt;
+            *pp_aggr_pkt = mpdu;
+            if (!retry)
+                ampdu_tid->aggr_pkt_num++;
+            mpdu_skb_info->ampdu_tx_status = AMPDU_ST_AGGREGATED;
+            if (ampdu_tid->ssv_baw_head == SSV_ILLEGAL_SN)
+            {
+                ampdu_tid->ssv_baw_head = ssn;
+            }
+            if ((p_aggr_pkt != NULL) && (mpdu != p_aggr_pkt))
+                prn_aggr_err(
+                        "%d -> %d (H%d, N%d, Q%d)\n",
+                        ssn, ampdu_skb_ssn(p_aggr_pkt), old_baw_head, old_aggr_pkt_num, sync_num);
+        }
+    } while (0);
+    spin_unlock_irqrestore(&ampdu_tid->pkt_array_lock, flags);
+    #if 1
+    {
+    u32 page_count = (ampdu->len + SSV6200_ALLOC_RSVD);
+    if (page_count & HW_MMU_PAGE_MASK)
+        page_count = (page_count >> HW_MMU_PAGE_SHIFT) + 1;
+    else page_count = page_count >> HW_MMU_PAGE_SHIFT;
+    if (page_count > (SSV6200_PAGE_TX_THRESHOLD / 2))
+        printk(KERN_ERR "AMPDU requires pages %d(%d-%d-%d) exceeds resource limit %d.\n",
+               page_count, ampdu->len, ampdu_hdr->max_size, ampdu_hdr->size,
+               (SSV6200_PAGE_TX_THRESHOLD / 2));
+    }
+    #endif
+    return ret;
+}
+struct sk_buff* _aggr_retry_mpdu (struct ssv_softc *sc,
+                                  struct AMPDU_TID_st *ampdu_tid,
+                                  struct sk_buff_head *retry_queue,
+                                  u32 max_aggr_len)
+{
+    struct sk_buff *retry_mpdu;
+    struct sk_buff *new_ampdu_skb;
+    u32 num_retry_mpdu;
+    u32 temp_i;
+    u32 total_skb_size;
+    unsigned long flags;
+    u16 head_ssn = ampdu_tid->ssv_baw_head;
+    struct ampdu_hdr_st *ampdu_hdr;
+#if 0
+    if (cur_AMPDU_TID->ssv_baw_head == SSV_ILLEGAL_SN)
+    {
+        struct sk_buff *skb = skb_peek(ampdu_skb_retry_queue);
+        prn_aggr_err("Rr %d\n", (skb == NULL) ? (-1) : ampdu_skb_ssn(skb));
+        return NULL;
+    }
+#else
+    BUG_ON(head_ssn == SSV_ILLEGAL_SN);
+#endif
+    num_retry_mpdu = skb_queue_len(retry_queue);
+    if (num_retry_mpdu == 0)
+        return NULL;
+    new_ampdu_skb = _alloc_ampdu_skb(sc, ampdu_tid, max_aggr_len);
+    if (new_ampdu_skb == 0)
+        return NULL;
+    ampdu_hdr = (struct ampdu_hdr_st *)new_ampdu_skb->head;
+    total_skb_size = 0;
+    spin_lock_irqsave(&retry_queue->lock, flags);
+    for (temp_i = 0; temp_i < ampdu_tid->agg_num_max; temp_i++)
+    {
+        struct ieee80211_hdr *mpdu_hdr;
+        u16 mpdu_sn;
+        u16 diff;
+        u32 new_total_skb_size;
+        retry_mpdu = skb_peek(retry_queue);
+        if (retry_mpdu == NULL)
+        {
+            break;
+        }
+        mpdu_hdr = ampdu_skb_hdr(retry_mpdu);
+        mpdu_sn = ampdu_hdr_ssn(mpdu_hdr);
+        diff = SSV_AMPDU_SN_a_minus_b(head_ssn, mpdu_sn);
+        if ((head_ssn != SSV_ILLEGAL_SN)
+            && (diff > 0)
+            && (diff <= ampdu_tid->ssv_baw_size))
+        {
+            struct SKB_info_st *skb_info;
+            prn_aggr_err("Z. release skb (s %d, h %d, d %d)\n",
+                         mpdu_sn, head_ssn, diff);
+            skb_info = (struct SKB_info_st *) (retry_mpdu->head);
+            skb_info->ampdu_tx_status = AMPDU_ST_DROPPED;
+            ampdu_tid->mib.ampdu_mib_discard_counter++;
+            continue;
+        }
+        new_total_skb_size = total_skb_size + retry_mpdu->len;
+        if (new_total_skb_size > ampdu_hdr->max_size)
+            break;
+        total_skb_size = new_total_skb_size;
+#if 0
+            if (ampdu_skb_retry_queue != NULL)
+            prn_aggr_err("R %d\n", SerialNumber);
+#endif
+        retry_mpdu = __skb_dequeue(retry_queue);
+        _put_mpdu_to_ampdu(new_ampdu_skb, retry_mpdu);
+        ampdu_tid->mib.ampdu_mib_retry_counter++;
+    }
+    ampdu_tid->mib.ampdu_mib_aggr_retry_counter += 1;
+    ampdu_tid->mib.ampdu_mib_dist[temp_i] += 1;
+    spin_unlock_irqrestore(&retry_queue->lock, flags);
+#if 0
+    {
+    struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *)new_ampdu_skb->head;
+    retry_mpdu = skb_peek(&ampdu_hdr->mpdu_q);
+    dev_alert(sc->dev, "rA %d - %d\n", ampdu_skb_ssn(retry_mpdu),
+              skb_queue_len(&ampdu_hdr->mpdu_q));
+    }
+#endif
+    if (ampdu_hdr->mpdu_num == 0) {
+           dev_kfree_skb_any(new_ampdu_skb);
+           return NULL;
+       }
+    return new_ampdu_skb;
+}
+static void _add_ampdu_txinfo (struct ssv_softc *sc, struct sk_buff *ampdu_skb)
+{
+    struct ssv6200_tx_desc *tx_desc;
+    ssv6xxx_add_txinfo(sc, ampdu_skb);
+    tx_desc = (struct ssv6200_tx_desc *) ampdu_skb->data;
+    tx_desc->tx_report = 1;
+#if 0
+    tx_desc->len = ampdu_skb->len;
+    tx_desc->c_type = M2_TXREQ;
+    tx_desc->f80211 = 1;
+    tx_desc->ht = 1;
+    tx_desc->qos = 1;
+    tx_desc->use_4addr = 0;
+    tx_desc->security = 0;
+    tx_desc->more_data = 0;
+    tx_desc->stype_b5b4 = 0;
+    tx_desc->extra_info = 0;
+    tx_desc->hdr_offset = sc->sh->cfg.txpb_offset;;
+    tx_desc->frag = 0;
+    tx_desc->unicast = 1;
+    tx_desc->hdr_len = 0;
+    tx_desc->RSVD_4 = 0;
+    tx_desc->tx_burst = 0;
+    tx_desc->ack_policy = 1;
+    tx_desc->aggregation = 1;
+    tx_desc->RSVD_1 = 0;
+    tx_desc->do_rts_cts = 0;
+    tx_desc->reason = 0;
+    tx_desc->payload_offset = tx_desc->hdr_offset + tx_desc->hdr_len;
+    tx_desc->RSVD_4 = 0;
+    tx_desc->RSVD_2 = 0;
+    tx_desc->fCmdIdx = 0;
+    tx_desc->wsid = 0;
+    tx_desc->txq_idx = 0;
+    tx_desc->TxF_ID = 0;
+    tx_desc->rts_cts_nav = 0;
+    tx_desc->frame_consume_time = 0;
+    tx_desc->crate_idx=0;
+    tx_desc->drate_idx = 22;
+    tx_desc->dl_length = 56;
+    tx_desc->RSVD_3 = 0;
+#endif
+#if 0
+    if(ampdu_skb != 0)
+    {
+        u32 temp_i;
+        u8* temp8_p = (u8*)ampdu_skb->data;
+        ampdu_db_log("print txinfo.\n");
+        for(temp_i=0; temp_i < 24; temp_i++)
+        {
+            ampdu_db_log_simple("%02x",*(u8*)(temp8_p + temp_i));
+            if(((temp_i+1) % 4) == 0)
+            {
+                ampdu_db_log_simple("\n");
+            }
+        }
+        ampdu_db_log_simple("\n");
+    }
+#endif
+#if 0
+    if(ampdu_skb != 0)
+    {
+        u32 temp_i;
+        u8* temp8_p = (u8*)ampdu_skb->data;
+        ampdu_db_log("print all skb.\n");
+        for(temp_i=0; temp_i < ampdu_skb->len; temp_i++)
+        {
+            ampdu_db_log_simple("%02x",*(u8*)(temp8_p + temp_i));
+            if(((temp_i+1) % 4) == 0)
+            {
+                ampdu_db_log_simple("\n");
+            }
+        }
+        ampdu_db_log_simple("\n");
+    }
+#endif
+}
+void _send_hci_skb (struct ssv_softc *sc, struct sk_buff *skb, u32 tx_flag)
+{
+    struct ssv6200_tx_desc *tx_desc = (struct ssv6200_tx_desc *)skb->data;
+    int ret = AMPDU_HCI_SEND(sc->sh, skb, tx_desc->txq_idx, tx_flag);
+#if 1
+    if ((tx_desc->txq_idx > 3) && (ret <= 0))
+    {
+        prn_aggr_err("BUG!! %d %d\n", tx_desc->txq_idx, ret);
+    }
+#else
+    BUG_ON(tx_desc->txq_idx>3 && ret<=0);
+#endif
+}
+static void ssv6200_ampdu_add_txinfo_and_send_HCI (struct ssv_softc *sc,
+                                                   struct sk_buff *ampdu_skb,
+                                                   u32 tx_flag)
+{
+    _add_ampdu_txinfo(sc, ampdu_skb);
+    _send_hci_skb(sc, ampdu_skb, tx_flag);
+}
+static void ssv6200_ampdu_send_retry (
+        struct ieee80211_hw *hw, AMPDU_TID *cur_ampdu_tid,
+        struct sk_buff_head *ampdu_skb_retry_queue_p, bool send_aggr_tx)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct sk_buff *ampdu_retry_skb;
+    u32 ampdu_skb_retry_queue_len;
+    u32 max_agg_len;
+    u16 lowest_rate;
+    struct fw_rc_retry_params rates[SSV62XX_TX_MAX_RATES];
+    ampdu_skb_retry_queue_len = skb_queue_len(ampdu_skb_retry_queue_p);
+    if (ampdu_skb_retry_queue_len == 0)
+        return;
+    ampdu_retry_skb = skb_peek(ampdu_skb_retry_queue_p);
+    lowest_rate = ssv62xx_ht_rate_update(ampdu_retry_skb, sc, rates);
+    max_agg_len = ampdu_max_transmit_length[lowest_rate];
+    if (max_agg_len > 0)
+    {
+        u32 cur_ampdu_max_size = SSV_GET_MAX_AMPDU_SIZE(sc->sh);
+        if (max_agg_len >= cur_ampdu_max_size)
+            max_agg_len = cur_ampdu_max_size;
+        while (ampdu_skb_retry_queue_len > 0)
+        {
+            struct sk_buff *retry_mpdu = skb_peek(ampdu_skb_retry_queue_p);
+            SKB_info *mpdu_skb_info = (SKB_info *)(retry_mpdu->head);
+            mpdu_skb_info->lowest_rate = lowest_rate;
+            memcpy(mpdu_skb_info->rates, rates, sizeof(rates));
+            ampdu_retry_skb = _aggr_retry_mpdu(sc, cur_ampdu_tid, ampdu_skb_retry_queue_p,
+                                               max_agg_len);
+            if (ampdu_retry_skb != NULL)
+            {
+                _sync_ampdu_pkt_arr(cur_ampdu_tid, ampdu_retry_skb, true);
+                ssv6200_ampdu_add_txinfo_and_send_HCI(sc, ampdu_retry_skb,
+                                                      AMPDU_HCI_SEND_HEAD_WITHOUT_FLOWCTRL);
+            }
+            else
+            {
+                prn_aggr_err("AMPDU retry failed.\n");
+                return;
+            }
+            ampdu_skb_retry_queue_len = skb_queue_len(ampdu_skb_retry_queue_p);
+        }
+    }
+    else
+    {
+        struct ieee80211_tx_rate rates[IEEE80211_TX_MAX_RATES];
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(ampdu_retry_skb);
+        memcpy(rates, info->control.rates, sizeof(info->control.rates));
+        while ((ampdu_retry_skb = __skb_dequeue_tail(ampdu_skb_retry_queue_p)) != NULL)
+        {
+            struct ieee80211_tx_info *info = IEEE80211_SKB_CB(ampdu_retry_skb);
+            info->flags &= ~IEEE80211_TX_CTL_AMPDU;
+            memcpy(info->control.rates, rates, sizeof(info->control.rates));
+            ssv6xxx_update_txinfo(sc, ampdu_retry_skb);
+            _send_hci_skb(sc, ampdu_retry_skb, AMPDU_HCI_SEND_HEAD_WITHOUT_FLOWCTRL);
+        }
+    }
+}
+void ssv6200_ampdu_init (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    ssv6200_ampdu_hw_init(hw);
+    sc->tx.ampdu_tx_group_id = 0;
+#ifdef USE_ENCRYPT_WORK
+    INIT_WORK(&sc->ampdu_tx_encry_work, encry_work);
+    INIT_WORK(&sc->sync_hwkey_work, sync_hw_key_work);
+#endif
+}
+void ssv6200_ampdu_deinit (struct ieee80211_hw *hw)
+{
+}
+void ssv6200_ampdu_release_skb (struct sk_buff *skb, struct ieee80211_hw *hw)
+{
+#if LINUX_VERSION_CODE >= 0x030400
+    ieee80211_free_txskb(hw, skb);
+#else
+    dev_kfree_skb_any(skb);
+#endif
+}
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+struct mib_dump_data {
+    char *prt_buff;
+    size_t buff_size;
+    size_t prt_len;
+};
+#define AMPDU_TX_MIB_SUMMARY_BUF_SIZE (4096)
+static ssize_t ampdu_tx_mib_summary_read (struct file *file,
+                                          char __user *user_buf, size_t count,
+                                          loff_t *ppos)
+{
+    struct ssv_sta_priv_data *ssv_sta_priv =
+            (struct ssv_sta_priv_data *) file->private_data;
+    char *summary_buf = kzalloc(AMPDU_TX_MIB_SUMMARY_BUF_SIZE, GFP_KERNEL);
+    ssize_t summary_size;
+    ssize_t ret;
+    if (!summary_buf)
+        return -ENOMEM;
+    summary_size = ampdu_tx_mib_dump(ssv_sta_priv, summary_buf,
+                                     AMPDU_TX_MIB_SUMMARY_BUF_SIZE);
+    ret = simple_read_from_buffer(user_buf, count, ppos, summary_buf,
+                                  summary_size);
+    kfree(summary_buf);
+    return ret;
+}
+static int ampdu_tx_mib_summary_open (struct inode *inode, struct file *file)
+{
+    file->private_data = inode->i_private;
+    return 0;
+}
+static const struct file_operations mib_summary_fops = { .read =
+        ampdu_tx_mib_summary_read, .open = ampdu_tx_mib_summary_open, };
+static ssize_t ampdu_tx_tid_window_read (struct file *file,
+                                          char __user *user_buf, size_t count,
+                                          loff_t *ppos)
+{
+    struct AMPDU_TID_st *ampdu_tid = (struct AMPDU_TID_st *)file->private_data;
+    char *summary_buf = kzalloc(AMPDU_TX_MIB_SUMMARY_BUF_SIZE, GFP_KERNEL);
+    ssize_t ret;
+    char *prn_ptr = summary_buf;
+    int prt_size;
+    int buf_size = AMPDU_TX_MIB_SUMMARY_BUF_SIZE;
+    int i;
+    struct sk_buff *ba_skb, *tmp_ba_skb;
+    if (!summary_buf)
+        return -ENOMEM;
+    prt_size = snprintf(prn_ptr, buf_size, "\nWMM_TID %d:\n"
+                        "\tWindow:",
+                        ampdu_tid->tidno);
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    for (i = 0; i < SSV_AMPDU_BA_WINDOW_SIZE; i++)
+    {
+        struct sk_buff *skb = ampdu_tid->aggr_pkts[i];
+        if ((i % 8) == 0)
+        {
+            prt_size = snprintf(prn_ptr, buf_size, "\n\t\t");
+            prn_ptr += prt_size;
+            buf_size -= prt_size;
+        }
+        if (skb == NULL)
+            prt_size = snprintf(prn_ptr, buf_size, " %s", "NULL ");
+        else
+        {
+            struct SKB_info_st *skb_info = (struct SKB_info_st *)(skb->head);
+            const char status_symbol[] = {'N',
+                                          'A',
+                                          'S',
+                                          'R',
+                                          'P',
+                                          'D'};
+            prt_size = snprintf(prn_ptr, buf_size, " %4d%c", ampdu_skb_ssn(skb),
+                                ( (skb_info->ampdu_tx_status <= AMPDU_ST_DONE)
+                                 ? status_symbol[skb_info->ampdu_tx_status]
+                                 : 'X'));
+        }
+        prn_ptr += prt_size;
+        buf_size -= prt_size;
+    }
+    prt_size = snprintf(prn_ptr, buf_size, "\n\tEarly aggregated #: %d\n", ampdu_tid->early_aggr_skb_num);
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(prn_ptr, buf_size, "\tBAW skb #: %d\n", ampdu_tid->aggr_pkt_num);
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(prn_ptr, buf_size, "\tBAW head: %d\n", ampdu_tid->ssv_baw_head);
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(prn_ptr, buf_size, "\tState: %d\n", ampdu_tid->state);
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(prn_ptr, buf_size, "\tBA:\n");
+    prn_ptr += prt_size;
+    buf_size -= prt_size;
+    skb_queue_walk_safe(&ampdu_tid->ba_q, ba_skb, tmp_ba_skb)
+    {
+        prt_size = _dump_ba_skb(prn_ptr, buf_size, ba_skb);
+        prn_ptr += prt_size;
+        buf_size -= prt_size;
+    }
+    buf_size = AMPDU_TX_MIB_SUMMARY_BUF_SIZE - buf_size;
+    ret = simple_read_from_buffer(user_buf, count, ppos, summary_buf,
+                                  buf_size);
+    kfree(summary_buf);
+    return ret;
+}
+static int ampdu_tx_tid_window_open (struct inode *inode, struct file *file)
+{
+    file->private_data = inode->i_private;
+    return 0;
+}
+static const struct file_operations tid_window_fops = { .read =
+        ampdu_tx_tid_window_read, .open = ampdu_tx_tid_window_open, };
+static int ampdu_tx_mib_reset_open (struct inode *inode, struct file *file)
+{
+    file->private_data = inode->i_private;
+    return 0;
+}
+static ssize_t ampdu_tx_mib_reset_read (struct file *file,
+                                        char __user *user_buf, size_t count,
+                                        loff_t *ppos)
+{
+    char *reset_buf = kzalloc(64, GFP_KERNEL);
+    ssize_t ret;
+    u32 reset_size;
+    if (!reset_buf)
+        return -ENOMEM;
+    reset_size = snprintf(reset_buf, 63, "%d", 0);
+    ret = simple_read_from_buffer(user_buf, count, ppos, reset_buf,
+                                  reset_size);
+    kfree(reset_buf);
+    return ret;
+}
+static ssize_t ampdu_tx_mib_reset_write (struct file *file,
+                                         const char __user *buffer,
+                                         size_t count,
+                                         loff_t *pos)
+{
+    struct AMPDU_TID_st *ampdu_tid = (struct AMPDU_TID_st *)file->private_data;
+    memset(&ampdu_tid->mib, 0, sizeof(struct AMPDU_MIB_st));
+    return count;
+}
+static const struct file_operations mib_reset_fops
+    = { .read = ampdu_tx_mib_reset_read,
+        .open = ampdu_tx_mib_reset_open,
+        .write = ampdu_tx_mib_reset_write};
+static void ssv6200_ampdu_tx_init_debugfs (
+        struct ssv_softc *sc, struct ssv_sta_priv_data *ssv_sta_priv)
+{
+    struct ssv_sta_info *sta_info = ssv_sta_priv->sta_info;
+    int i;
+    struct dentry *sta_debugfs_dir = sta_info->debugfs_dir;
+    dev_info(sc->dev, "Creating AMPDU TX debugfs.\n");
+    if (sta_debugfs_dir == NULL)
+    {
+        dev_err(sc->dev, "No STA debugfs.\n");
+        return;
+    }
+    debugfs_create_file("ampdu_tx_summary", 00444, sta_debugfs_dir,
+                        ssv_sta_priv, &mib_summary_fops);
+    debugfs_create_u32("total_BA", 00644, sta_debugfs_dir,
+                       &ssv_sta_priv->ampdu_mib_total_BA_counter);
+    for (i = 0; i < WMM_TID_NUM; i++)
+    {
+        char debugfs_name[20];
+        struct dentry *ampdu_tx_debugfs_dir;
+        int j;
+        struct AMPDU_TID_st *ampdu_tid = &ssv_sta_priv->ampdu_tid[i];
+        struct AMPDU_MIB_st *ampdu_mib = &ampdu_tid->mib;
+        snprintf(debugfs_name, sizeof(debugfs_name), "ampdu_tx_%d", i);
+        ampdu_tx_debugfs_dir = debugfs_create_dir(debugfs_name,
+                                                  sta_debugfs_dir);
+        if (ampdu_tx_debugfs_dir == NULL)
+        {
+            dev_err(sc->dev,
+                    "Failed to create debugfs for AMPDU TX TID %d: %s\n", i,
+                    debugfs_name);
+            continue;
+        }
+        ssv_sta_priv->ampdu_tid[i].debugfs_dir = ampdu_tx_debugfs_dir;
+        debugfs_create_file("baw_status", 00444, ampdu_tx_debugfs_dir,
+                            ampdu_tid, &tid_window_fops);
+        debugfs_create_file("reset", 00644, ampdu_tx_debugfs_dir,
+                            ampdu_tid, &mib_reset_fops);
+        debugfs_create_u32("total", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_ampdu_counter);
+        debugfs_create_u32("retry", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_retry_counter);
+        debugfs_create_u32("aggr_retry", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_aggr_retry_counter);
+        debugfs_create_u32("BAR", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_bar_counter);
+        debugfs_create_u32("Discarded", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_discard_counter);
+        debugfs_create_u32("BA", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_BA_counter);
+        debugfs_create_u32("Pass", 00444, ampdu_tx_debugfs_dir,
+                           &ampdu_mib->ampdu_mib_pass_counter);
+        for (j = 0; j <= SSV_AMPDU_aggr_num_max; j++)
+        {
+            char dist_dbg_name[10];
+            snprintf(dist_dbg_name, sizeof(dist_dbg_name), "aggr_%d", j);
+            debugfs_create_u32(dist_dbg_name, 00444, ampdu_tx_debugfs_dir,
+                               &ampdu_mib->ampdu_mib_dist[j]);
+        }
+        skb_queue_head_init(&ssv_sta_priv->ampdu_tid[i].ba_q);
+    }
+}
+#endif
+void ssv6200_ampdu_tx_add_sta (struct ieee80211_hw *hw,
+                               struct ieee80211_sta *sta)
+{
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    struct ssv_softc *sc;
+    u32 temp_i;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    sc = (struct ssv_softc *) hw->priv;
+    for (temp_i = 0; temp_i < WMM_TID_NUM; temp_i++)
+    {
+        ssv_sta_priv->ampdu_tid[temp_i].sta = sta;
+        ssv_sta_priv->ampdu_tid[temp_i].state = AMPDU_STATE_STOP;
+        spin_lock_init(
+                &ssv_sta_priv->ampdu_tid[temp_i].ampdu_skb_tx_queue_lock);
+        spin_lock_init(&ssv_sta_priv->ampdu_tid[temp_i].pkt_array_lock);
+    }
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    ssv6200_ampdu_tx_init_debugfs(sc, ssv_sta_priv);
+#endif
+}
+void ssv6200_ampdu_tx_start (u16 tid, struct ieee80211_sta *sta,
+                             struct ieee80211_hw *hw, u16 *ssn)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    struct AMPDU_TID_st *ampdu_tid;
+    int i;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    ampdu_tid = &ssv_sta_priv->ampdu_tid[tid];
+    ampdu_tid->ssv_baw_head = SSV_ILLEGAL_SN;
+#if 0
+    if (list_empty(&sc->tx.ampdu_tx_que))
+    {
+        sc->ampdu_rekey_pause = AMPDU_REKEY_PAUSE_STOP;
+    }
+#endif
+#ifdef DEBUG_AMPDU_FLUSH
+    printk(KERN_ERR "Adding %02X-%02X-%02X-%02X-%02X-%02X TID %d (%p).\n",
+            sta->addr[0], sta->addr[1], sta->addr[2],
+            sta->addr[3], sta->addr[4], sta->addr[5],
+            ampdu_tid->tidno, ampdu_tid);
+    {
+        int j;
+        for (j = 0; j <= MAX_TID; j++)
+        {
+            if (sc->tid[j] == 0)
+                break;
+        }
+        if (j == MAX_TID)
+        {
+            printk(KERN_ERR "No room for new TID.\n");
+        }
+        else
+            sc->tid[j] = ampdu_tid;
+}
+#endif
+    list_add_tail_rcu(&ampdu_tid->list, &sc->tx.ampdu_tx_que);
+    skb_queue_head_init(&ampdu_tid->ampdu_skb_tx_queue);
+#ifdef ENABLE_INCREMENTAL_AGGREGATION
+    skb_queue_head_init(&ampdu_tid->early_aggr_ampdu_q);
+    ampdu_tid->early_aggr_skb_num = 0;
+#endif
+    skb_queue_head_init(&ampdu_tid->ampdu_skb_wait_encry_queue);
+    skb_queue_head_init(&ampdu_tid->retry_queue);
+    skb_queue_head_init(&ampdu_tid->release_queue);
+    for (i = 0;
+            i < (sizeof(ampdu_tid->aggr_pkts) / sizeof(ampdu_tid->aggr_pkts[0]));
+            i++)
+        ampdu_tid->aggr_pkts[i] = 0;
+    ampdu_tid->aggr_pkt_num = 0;
+#ifdef ENABLE_AGGREGATE_IN_TIME
+    ampdu_tid->cur_ampdu_pkt = _alloc_ampdu_skb(sc, ampdu_tid, 0);
+#endif
+#ifdef AMPDU_CHECK_SKB_SEQNO
+    ssv_sta_priv->ampdu_tid[tid].last_seqno = (-1);
+#endif
+    ssv_sta_priv->ampdu_mib_total_BA_counter = 0;
+    memset(&ssv_sta_priv->ampdu_tid[tid].mib, 0, sizeof(struct AMPDU_MIB_st));
+    ssv_sta_priv->ampdu_tid[tid].state = AMPDU_STATE_START;
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    skb_queue_head_init(&ssv_sta_priv->ampdu_tid[tid].ba_q);
+    #endif
+}
+void ssv6200_ampdu_tx_operation (u16 tid, struct ieee80211_sta *sta,
+                                 struct ieee80211_hw *hw, u8 buffer_size)
+{
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    ssv_sta_priv->ampdu_tid[tid].tidno = tid;
+    ssv_sta_priv->ampdu_tid[tid].sta = sta;
+    ssv_sta_priv->ampdu_tid[tid].agg_num_max = MAX_AGGR_NUM;
+#if 1
+    if (buffer_size > IEEE80211_MAX_AMPDU_BUF)
+    {
+        buffer_size = IEEE80211_MAX_AMPDU_BUF;
+    }
+    printk("ssv6200_ampdu_tx_operation:buffer_size=%d\n", buffer_size);
+    ssv_sta_priv->ampdu_tid[tid].ssv_baw_size = SSV_AMPDU_WINDOW_SIZE;
+#else
+    ssv_sta_priv->ampdu_tid[tid].ssv_baw_size = IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor;
+    if(buffer_size > IEEE80211_MAX_AMPDU_BUF)
+    {
+        buffer_size = IEEE80211_MAX_AMPDU_BUF;
+    }
+    if(ssv_sta_priv->ampdu_tid[tid].ssv_baw_size > buffer_size)
+    {
+        ssv_sta_priv->ampdu_tid[tid].ssv_baw_size = buffer_size;
+    }
+#endif
+    ssv_sta_priv->ampdu_tid[tid].state = AMPDU_STATE_OPERATION;
+}
+static void _clear_mpdu_q (struct ieee80211_hw *hw, struct sk_buff_head *q,
+                           bool aggregated_mpdu)
+{
+    struct sk_buff *skb;
+    while (1)
+    {
+        skb = skb_dequeue(q);
+        if (!skb)
+            break;
+        if (aggregated_mpdu)
+            skb_pull(skb, AMPDU_DELIMITER_LEN);
+        ieee80211_tx_status(hw, skb);
+    }
+}
+void ssv6200_ampdu_tx_stop (u16 tid, struct ieee80211_sta *sta,
+                            struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    if (ssv_sta_priv->ampdu_tid[tid].state == AMPDU_STATE_STOP)
+        return;
+    ssv_sta_priv->ampdu_tid[tid].state = AMPDU_STATE_STOP;
+    printk("ssv6200_ampdu_tx_stop\n");
+    if (!list_empty(&sc->tx.ampdu_tx_que))
+    {
+#ifdef DEBUG_AMPDU_FLUSH
+        {
+            int j;
+            struct AMPDU_TID_st *ampdu_tid = &ssv_sta_priv->ampdu_tid[tid];
+            for (j = 0; j <= MAX_TID; j++)
+            {
+                if (sc->tid[j] == ampdu_tid)
+                    break;
+            }
+            if (j == MAX_TID)
+            {
+                printk(KERN_ERR "No TID found when deleting it.\n");
+            }
+            else
+                sc->tid[j] = NULL;
+            printk(KERN_ERR "Deleting %02X-%02X-%02X-%02X-%02X-%02X TID %d (%p).\n",
+                   sta->addr[0], sta->addr[1], sta->addr[2],
+                   sta->addr[3], sta->addr[4], sta->addr[5],
+                   ampdu_tid->tidno, ampdu_tid);
+        }
+#endif
+        list_del_rcu(&ssv_sta_priv->ampdu_tid[tid].list);
+    }
+    printk("clear tx q len=%d\n",
+           skb_queue_len(&ssv_sta_priv->ampdu_tid[tid].ampdu_skb_tx_queue));
+    _clear_mpdu_q(sc->hw, &ssv_sta_priv->ampdu_tid[tid].ampdu_skb_tx_queue,
+                  true);
+    printk("clear retry q len=%d\n",
+           skb_queue_len(&ssv_sta_priv->ampdu_tid[tid].retry_queue));
+    _clear_mpdu_q(sc->hw, &ssv_sta_priv->ampdu_tid[tid].retry_queue, true);
+#ifdef USE_ENCRYPT_WORK
+    printk("clear encrypt q len=%d\n",skb_queue_len(&ssv_sta_priv->ampdu_tid[tid].ampdu_skb_wait_encry_queue));
+    _clear_mpdu_q(sc->hw, &ssv_sta_priv->ampdu_tid[tid].ampdu_skb_wait_encry_queue, false);
+#endif
+#ifdef ENABLE_AGGREGATE_IN_TIME
+    if (ssv_sta_priv->ampdu_tid[tid].cur_ampdu_pkt != NULL)
+    {
+        dev_kfree_skb_any(ssv_sta_priv->ampdu_tid[tid].cur_ampdu_pkt);
+        ssv_sta_priv->ampdu_tid[tid].cur_ampdu_pkt = NULL;
+    }
+#endif
+    ssv6200_tx_flow_control((void *) sc,
+                            sc->tx.hw_txqid[ssv_sta_priv->ampdu_tid[tid].ac],
+                            false, 1000);
+}
+static void ssv6200_ampdu_tx_state_stop_func (
+        struct ssv_softc *sc, struct ieee80211_sta *sta, struct sk_buff *skb,
+        struct AMPDU_TID_st *cur_AMPDU_TID)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+    u8 *skb_qos_ctl = ieee80211_get_qos_ctl(hdr);
+    u8 tid_no = skb_qos_ctl[0] & 0xf;
+    if ((sta->ht_cap.ht_supported == true)
+        && (!!(sc->sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_TX)))
+    {
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,32)
+        ieee80211_start_tx_ba_session(sc->hw, (u8*)(sta->addr), (u16)tid_no);
+#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,37)
+        ieee80211_start_tx_ba_session(sta, tid_no);
+#else
+        ieee80211_start_tx_ba_session(sta, tid_no, 0);
+#endif
+        ampdu_db_log("start ampdu_tx(rc) : tid_no = %d\n", tid_no);
+    }
+}
+static void ssv6200_ampdu_tx_state_operation_func (
+        struct ssv_softc *sc, struct ieee80211_sta *sta, struct sk_buff *skb,
+        struct AMPDU_TID_st *cur_AMPDU_TID)
+{
+#if 0
+    else if (sc->ampdu_rekey_pause == AMPDU_REKEY_PAUSE_ONGOING)
+    {
+        pause_ampdu = true;
+        printk("!!!ampdu_rekey_pause\n");
+    }
+#endif
+}
+void ssv6200_ampdu_tx_update_state (void *priv, struct ieee80211_sta *sta,
+                                    struct sk_buff *skb)
+{
+    struct ssv_softc *sc = (struct ssv_softc *) priv;
+    struct ssv_sta_priv_data *ssv_sta_priv =
+            (struct ssv_sta_priv_data *) sta->drv_priv;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+    u8 *skb_qos_ctl;
+    u8 tid_no;
+    {
+        skb_qos_ctl = ieee80211_get_qos_ctl(hdr);
+        tid_no = skb_qos_ctl[0] & 0xf;
+        switch (ssv_sta_priv->ampdu_tid[tid_no].state)
+        {
+            case AMPDU_STATE_STOP:
+                ssv6200_ampdu_tx_state_stop_func(
+                        sc, sta, skb, &(ssv_sta_priv->ampdu_tid[tid_no]));
+                break;
+            case AMPDU_STATE_START:
+                break;
+            case AMPDU_STATE_OPERATION:
+                ssv6200_ampdu_tx_state_operation_func(
+                        sc, sta, skb, &(ssv_sta_priv->ampdu_tid[tid_no]));
+                break;
+            default:
+                break;
+        }
+    }
+}
+void _put_mpdu_to_ampdu (struct sk_buff *ampdu, struct sk_buff *mpdu)
+{
+    bool is_empty_ampdu = (ampdu->len == 0);
+    unsigned char *data_dest;
+    struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *) ampdu->head;
+    BUG_ON(skb_tailroom(ampdu) < mpdu->len);
+    data_dest = skb_tail_pointer(ampdu);
+    skb_put(ampdu, mpdu->len);
+    if (is_empty_ampdu)
+    {
+        struct ieee80211_tx_info *ampdu_info = IEEE80211_SKB_CB(ampdu);
+        struct ieee80211_tx_info *mpdu_info = IEEE80211_SKB_CB(mpdu);
+        SKB_info *mpdu_skb_info = (SKB_info *)(mpdu->head);
+        u32 max_size_for_rate = ampdu_max_transmit_length[mpdu_skb_info->lowest_rate];
+        BUG_ON(max_size_for_rate == 0);
+        memcpy(ampdu_info, mpdu_info, sizeof(struct ieee80211_tx_info));
+        skb_set_queue_mapping(ampdu, skb_get_queue_mapping(mpdu));
+        ampdu_hdr->first_sn = ampdu_skb_ssn(mpdu);
+        ampdu_hdr->sta = ((struct SKB_info_st *)mpdu->head)->sta;
+        if (ampdu_hdr->max_size > max_size_for_rate)
+            ampdu_hdr->max_size = max_size_for_rate;
+        memcpy(ampdu_hdr->rates, mpdu_skb_info->rates, sizeof(ampdu_hdr->rates));
+    }
+    memcpy(data_dest, mpdu->data, mpdu->len);
+    __skb_queue_tail(&ampdu_hdr->mpdu_q, mpdu);
+    ampdu_hdr->ssn[ampdu_hdr->mpdu_num++] = ampdu_skb_ssn(mpdu);
+    ampdu_hdr->size += mpdu->len;
+    BUG_ON(ampdu_hdr->size > ampdu_hdr->max_size);
+}
+u32 _flush_early_ampdu_q (struct ssv_softc *sc, struct AMPDU_TID_st *ampdu_tid)
+{
+    u32 flushed_ampdu = 0;
+    unsigned long flags;
+    struct sk_buff_head *early_aggr_ampdu_q = &ampdu_tid->early_aggr_ampdu_q;
+    spin_lock_irqsave(&early_aggr_ampdu_q->lock, flags);
+    while (skb_queue_len(early_aggr_ampdu_q))
+    {
+        struct sk_buff *head_ampdu;
+        struct ampdu_hdr_st *head_ampdu_hdr;
+        u32 ampdu_aggr_num;
+        head_ampdu = skb_peek(early_aggr_ampdu_q);
+        head_ampdu_hdr = (struct ampdu_hdr_st *) head_ampdu->head;
+        ampdu_aggr_num = skb_queue_len(&head_ampdu_hdr->mpdu_q);
+        if ((SSV_AMPDU_BA_WINDOW_SIZE - ampdu_tid->aggr_pkt_num)
+            < ampdu_aggr_num)
+            break;
+        if (_sync_ampdu_pkt_arr(ampdu_tid, head_ampdu, false))
+        {
+            head_ampdu = __skb_dequeue(early_aggr_ampdu_q);
+            ampdu_tid->early_aggr_skb_num -= ampdu_aggr_num;
+#ifdef SSV_AMPDU_FLOW_CONTROL
+            if (ampdu_tid->early_aggr_skb_num
+                <= SSV_AMPDU_FLOW_CONTROL_LOWER_BOUND)
+            {
+                ssv6200_tx_flow_control((void *) sc,
+                                        sc->tx.hw_txqid[ampdu_tid->ac], false, 1000);
+            }
+#endif
+            if ((skb_queue_len(early_aggr_ampdu_q) == 0)
+                && (ampdu_tid->early_aggr_skb_num > 0))
+            {
+                printk(KERN_ERR "Empty early Q w. %d.\n", ampdu_tid->early_aggr_skb_num);
+            }
+            spin_unlock_irqrestore(&early_aggr_ampdu_q->lock, flags);
+            _send_hci_skb(sc, head_ampdu,
+                          AMPDU_HCI_SEND_TAIL_WITHOUT_FLOWCTRL);
+            spin_lock_irqsave(&early_aggr_ampdu_q->lock, flags);
+            flushed_ampdu++;
+        }
+        else
+            break;
+    }
+    spin_unlock_irqrestore(&early_aggr_ampdu_q->lock, flags);
+    return flushed_ampdu;
+}
+volatile int max_aggr_num = 24;
+void _aggr_ampdu_tx_q (struct ieee80211_hw *hw, struct AMPDU_TID_st *ampdu_tid)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct sk_buff *ampdu_skb = ampdu_tid->cur_ampdu_pkt;
+    while (skb_queue_len(&ampdu_tid->ampdu_skb_tx_queue))
+    {
+        u32 aggr_len;
+        struct sk_buff *mpdu_skb;
+        struct ampdu_hdr_st *ampdu_hdr;
+        bool is_aggr_full = false;
+        if (ampdu_skb == NULL)
+        {
+            ampdu_skb = _alloc_ampdu_skb(sc, ampdu_tid, 0);
+            if (ampdu_skb == NULL)
+                break;
+            ampdu_tid->cur_ampdu_pkt = ampdu_skb;
+        }
+        ampdu_hdr = (struct ampdu_hdr_st *) ampdu_skb->head;
+        aggr_len = skb_queue_len(&ampdu_hdr->mpdu_q);
+        do
+        {
+            struct sk_buff_head *tx_q = &ampdu_tid->ampdu_skb_tx_queue;
+            unsigned long flags;
+            spin_lock_irqsave(&tx_q->lock, flags);
+            mpdu_skb = skb_peek(&ampdu_tid->ampdu_skb_tx_queue);
+            if (mpdu_skb == NULL)
+            {
+                spin_unlock_irqrestore(&tx_q->lock, flags);
+                break;
+            }
+            if ((mpdu_skb->len + ampdu_hdr->size) > ampdu_hdr->max_size)
+            {
+                is_aggr_full = true;
+                spin_unlock_irqrestore(&tx_q->lock, flags);
+                break;
+            }
+            mpdu_skb = __skb_dequeue(&ampdu_tid->ampdu_skb_tx_queue);
+            spin_unlock_irqrestore(&tx_q->lock, flags);
+            _put_mpdu_to_ampdu(ampdu_skb, mpdu_skb);
+        } while (++aggr_len < max_aggr_num );
+        if ( (is_aggr_full || (aggr_len >= max_aggr_num))
+            || ( (aggr_len > 0)
+                && (skb_queue_len(&ampdu_tid->early_aggr_ampdu_q) == 0)
+                && (ampdu_tid->ssv_baw_head == SSV_ILLEGAL_SN)
+                && _is_skb_q_empty(sc, ampdu_skb)))
+        {
+            _add_ampdu_txinfo(sc, ampdu_skb);
+            _queue_early_ampdu(sc, ampdu_tid, ampdu_skb);
+            ampdu_tid->cur_ampdu_pkt = ampdu_skb = NULL;
+        }
+        _flush_early_ampdu_q(sc, ampdu_tid);
+    }
+}
+void _queue_early_ampdu (struct ssv_softc *sc, struct AMPDU_TID_st *ampdu_tid,
+                         struct sk_buff *ampdu_skb)
+{
+    unsigned long flags;
+    struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *) ampdu_skb->head;
+    spin_lock_irqsave(&ampdu_tid->early_aggr_ampdu_q.lock, flags);
+    __skb_queue_tail(&ampdu_tid->early_aggr_ampdu_q, ampdu_skb);
+    ampdu_tid->early_aggr_skb_num += skb_queue_len(&ampdu_hdr->mpdu_q);
+#ifdef SSV_AMPDU_FLOW_CONTROL
+    if (ampdu_tid->early_aggr_skb_num >= SSV_AMPDU_FLOW_CONTROL_UPPER_BOUND)
+    {
+        ssv6200_tx_flow_control((void *) sc, sc->tx.hw_txqid[ampdu_tid->ac],
+                                true, 1000);
+    }
+#endif
+    spin_unlock_irqrestore(&ampdu_tid->early_aggr_ampdu_q.lock, flags);
+}
+void _flush_mpdu (struct ssv_softc *sc, struct ieee80211_sta *sta)
+{
+    unsigned long flags;
+    struct ssv_sta_priv_data *ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    int i;
+    for (i = 0; i < (sizeof(ssv_sta_priv->ampdu_tid) / sizeof(ssv_sta_priv->ampdu_tid[0])); i++)
+    {
+        struct AMPDU_TID_st *ampdu_tid = &ssv_sta_priv->ampdu_tid[i];
+        struct sk_buff_head *early_aggr_ampdu_q;
+        struct sk_buff *ampdu;
+        struct ampdu_hdr_st *ampdu_hdr;
+        struct sk_buff_head *mpdu_q;
+        struct sk_buff *mpdu;
+        if (ampdu_tid->state != AMPDU_STATE_OPERATION)
+            continue;
+        early_aggr_ampdu_q = &ampdu_tid->early_aggr_ampdu_q;
+        spin_lock_irqsave(&early_aggr_ampdu_q->lock, flags);
+        while ((ampdu = __skb_dequeue(early_aggr_ampdu_q)) != NULL)
+        {
+            ampdu_hdr = (struct ampdu_hdr_st *)ampdu->head;
+            mpdu_q = &ampdu_hdr->mpdu_q;
+            spin_unlock_irqrestore(&early_aggr_ampdu_q->lock, flags);
+            while ((mpdu = __skb_dequeue(mpdu_q)) != NULL)
+            {
+                _send_hci_skb(sc, mpdu, AMPDU_HCI_SEND_TAIL_WITHOUT_FLOWCTRL);
+            }
+            ssv6200_ampdu_release_skb(ampdu, sc->hw);
+            spin_lock_irqsave(&early_aggr_ampdu_q->lock, flags);
+        }
+        if (ampdu_tid->cur_ampdu_pkt != NULL)
+        {
+            ampdu_hdr = (struct ampdu_hdr_st *)ampdu_tid->cur_ampdu_pkt->head;
+            mpdu_q = &ampdu_hdr->mpdu_q;
+            spin_unlock_irqrestore(&early_aggr_ampdu_q->lock, flags);
+            while ((mpdu = __skb_dequeue(mpdu_q)) != NULL)
+            {
+                _send_hci_skb(sc, mpdu, AMPDU_HCI_SEND_TAIL_WITHOUT_FLOWCTRL);
+            }
+            ssv6200_ampdu_release_skb(ampdu_tid->cur_ampdu_pkt, sc->hw);
+            spin_lock_irqsave(&early_aggr_ampdu_q->lock, flags);
+            ampdu_tid->cur_ampdu_pkt = NULL;
+        }
+        spin_unlock_irqrestore(&early_aggr_ampdu_q->lock, flags);
+    }
+}
+bool ssv6200_ampdu_tx_handler (struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+#ifdef REPORT_TX_STATUS_DIRECTLY
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct sk_buff *tx_skb = skb;
+    struct sk_buff *copy_skb = NULL;
+#endif
+    struct SKB_info_st *mpdu_skb_info_p = (SKB_info *) (skb->head);
+    struct ieee80211_sta *sta = mpdu_skb_info_p->sta;
+    struct ssv_sta_priv_data *ssv_sta_priv =
+            (struct ssv_sta_priv_data *) sta->drv_priv;
+    u8 tidno;
+    struct AMPDU_TID_st *ampdu_tid;
+    if (sta == NULL)
+    {
+        WARN_ON(1);
+        return false;
+    }
+    tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK;
+    ampdu_db_log("tidno = %d\n", tidno);
+    ampdu_tid = &ssv_sta_priv->ampdu_tid[tidno];
+    if (ampdu_tid->state != AMPDU_STATE_OPERATION)
+        return false;
+#ifdef AMPDU_CHECK_SKB_SEQNO
+    {
+        u32 skb_seqno = ((struct ieee80211_hdr*) (skb->data))->seq_ctrl
+                        >> SSV_SEQ_NUM_SHIFT;
+        u32 tid_seqno = ampdu_tid->last_seqno;
+        if ((tid_seqno != (-1)) && (skb_seqno != NEXT_PKT_SN(tid_seqno)))
+        {
+            prn_aggr_err("Non continueous seq no: %d - %d\n", tid_seqno, skb_seqno);
+            return false;
+        }
+        ampdu_tid->last_seqno = skb_seqno;
+    }
+#endif
+#if 1
+    mpdu_skb_info_p->lowest_rate = ssv62xx_ht_rate_update(skb, sc, mpdu_skb_info_p->rates);
+    if (ampdu_max_transmit_length[mpdu_skb_info_p->lowest_rate] == 0)
+    {
+        _flush_mpdu(sc, sta);
+        return false;
+    }
+#endif
+#if 0
+    if ((ampdu_tid->ssv_baw_head == SSV_ILLEGAL_SN)
+        && (skb_queue_len(&ampdu_tid->ampdu_skb_tx_queue) == 0)
+        && (skb_queue_len(&ampdu_tid->early_aggr_ampdu_q) == 0)
+        && ((ampdu_tid->cur_ampdu_pkt == NULL)
+            || (skb_queue_len(
+                    &((struct ampdu_hdr_st *) (ampdu_tid->cur_ampdu_pkt->head))->mpdu_q)
+                == 0))
+        && _is_skb_q_empty(sc, skb))
+    {
+        ampdu_tid->mib.ampdu_mib_pass_counter++;
+#if 0
+        prn_aggr_err(
+                "pass %d\n",
+                ((struct ieee80211_hdr*)(skb->data))->seq_ctrl >> SSV_SEQ_NUM_SHIFT);
+#else
+        if ((ssv_sta_priv->ampdu_tid[tidno].mib.ampdu_mib_pass_counter % 1024) == 0)
+            prn_aggr_err("STA %d TID %d passed %d\n", ssv_sta_priv->sta_idx,
+                         ampdu_tid->tidno,
+                         ampdu_tid->mib.ampdu_mib_pass_counter);
+#endif
+        return false;
+    }
+#endif
+    mpdu_skb_info_p = (SKB_info *) (skb->head);
+    mpdu_skb_info_p->mpdu_retry_counter = 0;
+    mpdu_skb_info_p->ampdu_tx_status = AMPDU_ST_NON_AMPDU;
+    mpdu_skb_info_p->ampdu_tx_final_retry_count = 0;
+    ssv_sta_priv->ampdu_tid[tidno].ac = skb_get_queue_mapping(skb);
+#if 0
+#ifndef CONFIG_SSV_SW_ENCRYPT_HW_DECRYPT
+    if ((sc->ampdu_ccmp_encrypt == true))
+    {
+        skb_queue_tail(&ssv_sta_priv->ampdu_tid[tidno].ampdu_skb_wait_encry_queue, skb);
+        if (sc->ampdu_encry_work_scheduled == false)
+        {
+            schedule_work(&sc->ampdu_tx_encry_work);
+        }
+    }
+    else if (sc->algorithm != ME_NONE)
+    {
+        printk("None ccmp skb into AMPDU sc->algorithm = %d\n",sc->algorithm);
+        info = IEEE80211_SKB_CB(skb);
+        info->flags &= (~IEEE80211_TX_CTL_AMPDU);
+        if(ssv6200_mpdu_send_HCI(sc->hw, skb))
+        ieee80211_tx_status_irqsafe(sc->hw, skb);
+    }
+    else
+#endif
+#endif
+#ifdef REPORT_TX_STATUS_DIRECTLY
+    info->flags |= IEEE80211_TX_STAT_ACK;
+    copy_skb = skb_copy(tx_skb, GFP_ATOMIC);
+    if (!copy_skb) {
+         printk("create TX skb copy failed!\n");
+        return false;
+    }
+    ieee80211_tx_status(sc->hw, tx_skb);
+    skb = copy_skb;
+#endif
+    {
+        bool ret;
+        ret = ssv6200_ampdu_add_delimiter_and_crc32(skb);
+        if (ret == false)
+        {
+            ssv6200_ampdu_release_skb(skb, hw);
+            return false;
+        }
+        skb_queue_tail(&ssv_sta_priv->ampdu_tid[tidno].ampdu_skb_tx_queue, skb);
+        ssv_sta_priv->ampdu_tid[tidno].timestamp = jiffies;
+    }
+    _aggr_ampdu_tx_q(hw, &ssv_sta_priv->ampdu_tid[tidno]);
+    return true;
+}
+u32 ssv6xxx_ampdu_flush (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct AMPDU_TID_st *cur_AMPDU_TID;
+    u32 flushed_ampdu = 0;
+    u32 tid_idx = 0;
+    if (!list_empty(&sc->tx.ampdu_tx_que))
+    {
+        list_for_each_entry_rcu(cur_AMPDU_TID, &sc->tx.ampdu_tx_que, list)
+        {
+            tid_idx++;
+#ifdef DEBUG_AMPDU_FLUSH
+            {
+                int i = 0;
+                for (i = 0; i < MAX_TID; i++)
+                    if (sc->tid[i] == cur_AMPDU_TID)
+                        break;
+                if (i == MAX_TID)
+                {
+                    printk(KERN_ERR "No matching TID (%d) found! %p\n", tid_idx, cur_AMPDU_TID);
+                    continue;
+                }
+            }
+#endif
+            if (cur_AMPDU_TID->state != AMPDU_STATE_OPERATION)
+            {
+                struct ieee80211_sta *sta = cur_AMPDU_TID->sta;
+                struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+                dev_dbg(sc->dev, "STA %d TID %d is @%d\n",
+                        sta_priv->sta_idx, cur_AMPDU_TID->tidno,
+                        cur_AMPDU_TID->state);
+                continue;
+            }
+            if ((cur_AMPDU_TID->state == AMPDU_STATE_OPERATION)
+                && (skb_queue_len(&cur_AMPDU_TID->early_aggr_ampdu_q) == 0)
+                && (cur_AMPDU_TID->cur_ampdu_pkt != NULL))
+            {
+                struct ampdu_hdr_st *ampdu_hdr =
+                        (struct ampdu_hdr_st *) (cur_AMPDU_TID->cur_ampdu_pkt->head);
+                u32 aggr_len = skb_queue_len(&ampdu_hdr->mpdu_q);
+                if (aggr_len)
+                {
+                    struct sk_buff *ampdu_skb = cur_AMPDU_TID->cur_ampdu_pkt;
+                    cur_AMPDU_TID->cur_ampdu_pkt = NULL;
+                    _add_ampdu_txinfo(sc, ampdu_skb);
+                    _queue_early_ampdu(sc, cur_AMPDU_TID, ampdu_skb);
+                    #if 0
+                    prn_aggr_err("A%c %d %d\n", sc->tx_q_empty ? 'e' : 't',
+                                ampdu_hdr->first_sn, aggr_len);
+                    #endif
+                }
+            }
+            if (skb_queue_len(&cur_AMPDU_TID->early_aggr_ampdu_q) > 0)
+                flushed_ampdu += _flush_early_ampdu_q(sc, cur_AMPDU_TID);
+        }
+    }
+    return flushed_ampdu;
+}
+int _dump_BA_notification (char *buf,
+                            struct ampdu_ba_notify_data *ba_notification)
+{
+    int i;
+    char *orig_buf = buf;
+    for (i = 0; i < MAX_AGGR_NUM; i++)
+    {
+        if (ba_notification->seq_no[i] == (u16) (-1))
+            break;
+        buf += sprintf(buf, " %d", ba_notification->seq_no[i]);
+    }
+    return ((size_t)buf - (size_t)orig_buf);
+}
+int _dump_ba_skb (char *buf, int buf_size, struct sk_buff *ba_skb)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) (ba_skb->data
+                                                          + SSV6XXX_RX_DESC_LEN);
+    AMPDU_BLOCKACK *BA_frame = (AMPDU_BLOCKACK *) hdr;
+    u32 ssn = BA_frame->BA_ssn;
+    struct ampdu_ba_notify_data *ba_notification =
+            (struct ampdu_ba_notify_data *) (ba_skb->data + ba_skb->len
+                                             - sizeof(struct ampdu_ba_notify_data));
+    int prt_size;
+    prt_size = snprintf(buf, buf_size, "\n\t\t%04d %08X %08X -",
+                        ssn, BA_frame->BA_sn_bit_map[0], BA_frame->BA_sn_bit_map[1]);
+    buf_size -= prt_size;
+    buf += prt_size;
+    prt_size = prt_size + _dump_BA_notification(buf, ba_notification);
+    return prt_size;
+}
+static bool _ssn_to_bit_idx (u32 start_ssn, u32 mpdu_ssn, u32 *word_idx,
+                             u32 *bit_idx)
+{
+    u32 ret_bit_idx, ret_word_idx = 0;
+    s32 diff = mpdu_ssn - start_ssn;
+    if (diff >= 0)
+    {
+        if (diff >= SSV_AMPDU_BA_WINDOW_SIZE)
+        {
+            return false;
+        }
+        ret_bit_idx = diff;
+    }
+    else
+    {
+        diff = -diff;
+        if (diff <= (SSV_AMPDU_MAX_SSN - SSV_AMPDU_BA_WINDOW_SIZE))
+        {
+            *word_idx = 0;
+            *bit_idx = 0;
+            return false;
+        }
+        ret_bit_idx = SSV_AMPDU_MAX_SSN - diff;
+    }
+    if (ret_bit_idx >= 32)
+    {
+        ret_bit_idx -= 32;
+        ret_word_idx = 1;
+    }
+    *bit_idx = ret_bit_idx;
+    *word_idx = ret_word_idx;
+    return true;
+}
+static bool _inc_bit_idx (u32 ssn_1st, u32 ssn_next, u32 *word_idx,
+                          u32 *bit_idx)
+{
+    u32 ret_word_idx = *word_idx, ret_bit_idx = *bit_idx;
+    s32 diff = (s32) ssn_1st - (s32) ssn_next;
+    if (diff > 0)
+    {
+        if (diff < (SSV_AMPDU_MAX_SSN - SSV_AMPDU_BA_WINDOW_SIZE))
+        {
+            prn_aggr_err("Irrational SN distance in AMPDU: %d %d.\n",
+                         ssn_1st, ssn_next);
+            return false;
+        }
+        diff = SSV_AMPDU_MAX_SSN - diff;
+    }
+    else
+    {
+        diff = -diff;
+    }
+    if (diff > SSV_AMPDU_MAX_SSN)
+        prn_aggr_err("DF %d - %d = %d\n", ssn_1st, ssn_next, diff);
+    ret_bit_idx += diff;
+    if (ret_bit_idx >= 32)
+    {
+        ret_bit_idx -= 32;
+        ret_word_idx++;
+    }
+    *word_idx = ret_word_idx;
+    *bit_idx = ret_bit_idx;
+    return true;
+}
+static void _release_frames (struct AMPDU_TID_st *ampdu_tid)
+{
+    u32 head_ssn, head_ssn_before, last_ssn;
+    struct sk_buff **skb;
+    struct SKB_info_st *skb_info;
+    spin_lock_bh(&ampdu_tid->pkt_array_lock);
+    head_ssn_before = ampdu_tid->ssv_baw_head;
+#if 1
+    if (head_ssn_before >= SSV_AMPDU_MAX_SSN)
+    {
+        spin_unlock_bh(&ampdu_tid->pkt_array_lock);
+        prn_aggr_err("l x.x %d\n", head_ssn_before);
+        return;
+    }
+#else
+    BUG_ON(head_ssn_before >= SSV_AMPDU_MAX_SSN);
+#endif
+    head_ssn = ampdu_tid->ssv_baw_head;
+    last_ssn = head_ssn;
+    do
+    {
+        skb = &INDEX_PKT_BY_SSN(ampdu_tid, head_ssn);
+        if (*skb == NULL)
+        {
+            head_ssn = SSV_ILLEGAL_SN;
+            {
+                int i;
+                char sn_str[66 * 5] = "";
+                char *str = sn_str;
+                for (i = 0; i < 64; i++)
+                    if (ampdu_tid->aggr_pkts[i] != NULL)
+                    {
+                        str += sprintf(str, "%d ",
+                                       ampdu_skb_ssn(ampdu_tid->aggr_pkts[i]));
+                    }
+                *str = 0;
+                if (str == sn_str)
+                {
+                }
+                else
+                    prn_aggr_err(
+                            "ILL %d %d - %d (%s)\n",
+                            head_ssn_before, last_ssn, ampdu_tid->aggr_pkt_num, sn_str);
+            }
+            break;
+        }
+        skb_info = (struct SKB_info_st *) ((*skb)->head);
+        if ((skb_info->ampdu_tx_status == AMPDU_ST_DONE)
+            || (skb_info->ampdu_tx_status == AMPDU_ST_DROPPED))
+        {
+            __skb_queue_tail(&ampdu_tid->release_queue, *skb);
+            *skb = NULL;
+            last_ssn = head_ssn;
+            INC_PKT_SN(head_ssn);
+            ampdu_tid->aggr_pkt_num--;
+            if (skb_info->ampdu_tx_status == AMPDU_ST_DROPPED)
+                ampdu_tid->mib.ampdu_mib_discard_counter++;
+        }
+        else
+        {
+            break;
+        }
+    } while (1);
+    ampdu_tid->ssv_baw_head = head_ssn;
+#if 0
+    if (head_ssn == SSV_ILLEGAL_SN)
+    {
+        u32 i = head_ssn_before;
+        do
+        {
+            skb = &INDEX_PKT_BY_SSN(ampdu_tid, i);
+            if (*skb != NULL)
+            prn_aggr_err("O.o %d: %d - %d\n", head_ssn_before, i, ampdu_skb_ssn(*skb));
+            INC_PKT_SN(i);
+        }while (i != head_ssn_before);
+    }
+#endif
+    spin_unlock_bh(&ampdu_tid->pkt_array_lock);
+#if 0
+    if (head_ssn_before != head_ssn)
+    {
+        prn_aggr_err("H %d -> %d (%d - %d)\n", head_ssn_before, head_ssn,
+                ampdu_tid->aggr_pkt_num, skb_queue_len(&ampdu_tid->ampdu_skb_tx_queue));
+    }
+#endif
+}
+static int _collect_retry_frames (struct AMPDU_TID_st *ampdu_tid)
+{
+    u16 ssn, head_ssn, end_ssn;
+    int num_retry = 0;
+    int timeout_check = 1;
+    unsigned long check_jiffies = jiffies;
+    head_ssn = ampdu_tid->ssv_baw_head;
+    ssn = head_ssn;
+    if (ssn == SSV_ILLEGAL_SN)
+        return 0;
+    end_ssn = (head_ssn + SSV_AMPDU_BA_WINDOW_SIZE) % SSV_AMPDU_MAX_SSN;
+    do
+    {
+        struct sk_buff *skb = INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+        struct SKB_info_st *skb_info;
+        int timeout_retry = 0;
+        if (skb == NULL)
+            break;
+        skb_info = (SKB_info *) (skb->head);
+        if ( timeout_check
+            && (skb_info->ampdu_tx_status == AMPDU_ST_SENT))
+        {
+            unsigned long cur_jiffies = jiffies;
+            unsigned long timeout_jiffies = skb_info->aggr_timestamp
+                                            + msecs_to_jiffies(BA_WAIT_TIMEOUT);
+            u32 delta_ms;
+            if (time_before(cur_jiffies, timeout_jiffies))
+            {
+                timeout_check = 0;
+                continue;
+            }
+            _mark_skb_retry(skb_info, skb);
+            delta_ms = jiffies_to_msecs(cur_jiffies - skb_info->aggr_timestamp);
+            prn_aggr_err("t S%d-T%d-%d (%u)\n",
+                         ((struct ssv_sta_priv_data *)skb_info->sta->drv_priv)->sta_idx,
+                         ampdu_tid->tidno, ssn,
+                         delta_ms);
+            if (delta_ms > 1000)
+            {
+                prn_aggr_err("Last checktime %lu - %lu = %u\n",
+                             check_jiffies, ampdu_tid->timestamp,
+                             jiffies_to_msecs(check_jiffies - ampdu_tid->timestamp));
+            }
+            timeout_retry = 1;
+        }
+        if (skb_info->ampdu_tx_status == AMPDU_ST_RETRY)
+        {
+#if 0
+            if (!timeout_retry)
+                prn_aggr_dbg("r %d - %d\n", ssn, ampdu_skb_ssn(skb));
+#endif
+            skb_queue_tail(&ampdu_tid->retry_queue, skb);
+            ampdu_tid->mib.ampdu_mib_retry_counter++;
+            num_retry++;
+        }
+        INC_PKT_SN(ssn);
+    } while (ssn != end_ssn);
+    ampdu_tid->timestamp = check_jiffies;
+    return num_retry;
+}
+int _mark_skb_retry (struct SKB_info_st *skb_info, struct sk_buff *skb)
+{
+    if (skb_info->mpdu_retry_counter < SSV_AMPDU_retry_counter_max)
+    {
+        if (skb_info->mpdu_retry_counter == 0)
+        {
+            struct ieee80211_hdr *skb_hdr = ampdu_skb_hdr(skb);
+            skb_hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
+        }
+        skb_info->ampdu_tx_status = AMPDU_ST_RETRY;
+        skb_info->mpdu_retry_counter++;
+        return 1;
+    }
+    else
+    {
+        skb_info->ampdu_tx_status = AMPDU_ST_DROPPED;
+        prn_aggr_err("p %d\n", ampdu_skb_ssn(skb));
+        return 0;
+    }
+}
+static u32 _ba_map_walker (struct AMPDU_TID_st *ampdu_tid, u32 start_ssn,
+                           u32 sn_bit_map[2],
+                           struct ampdu_ba_notify_data *ba_notify_data,
+                           u32 *p_acked_num)
+{
+    int i = 0;
+    u32 ssn = ba_notify_data->seq_no[0];
+    u32 word_idx = (-1), bit_idx = (-1);
+    bool found = _ssn_to_bit_idx(start_ssn, ssn, &word_idx, &bit_idx);
+    bool first_found = found;
+    u32 aggr_num = 0;
+    u32 acked_num = 0;
+    if (found && (word_idx >= 2 || bit_idx >= 32))
+        prn_aggr_err("idx error 1: %d %d %d %d\n",
+                     start_ssn, ssn, word_idx, bit_idx);
+    while ((i < MAX_AGGR_NUM) && (ssn < SSV_AMPDU_MAX_SSN))
+    {
+        u32 cur_ssn;
+        struct sk_buff *skb = INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+        u32 skb_ssn = (skb == NULL) ? (-1) : ampdu_skb_ssn(skb);
+        struct SKB_info_st *skb_info;
+        aggr_num++;
+        if (skb_ssn != ssn)
+        {
+            prn_aggr_err("Unmatched SSN packet: %d - %d - %d\n",
+                         ssn, skb_ssn, start_ssn);
+        }
+        else
+        {
+            skb_info = (struct SKB_info_st *) (skb->head);
+            if (found && (sn_bit_map[word_idx] & (1 << bit_idx)))
+            {
+                if (skb_info->ampdu_tx_status != AMPDU_ST_SENT)
+                {
+                    printk(KERN_ERR "BA marks a MPDU of status %d!\n",
+                           skb_info->ampdu_tx_status);
+                }
+                skb_info->ampdu_tx_status = AMPDU_ST_DONE;
+                acked_num++;
+            }
+            else
+            {
+                _mark_skb_retry(skb_info, skb);
+            }
+        }
+        cur_ssn = ssn;
+        if (++i >= MAX_AGGR_NUM)
+            break;
+        ssn = ba_notify_data->seq_no[i];
+        if (ssn >= SSV_AMPDU_MAX_SSN)
+            break;
+        if (first_found)
+        {
+            u32 old_word_idx = word_idx, old_bit_idx = bit_idx;
+            found = _inc_bit_idx(cur_ssn, ssn, &word_idx, &bit_idx);
+            if (found && (word_idx >= 2 || bit_idx >= 32))
+            {
+                prn_aggr_err(
+                        "idx error 2: %d 0x%08X 0X%08X %d %d (%d %d) (%d %d)\n",
+                        start_ssn, sn_bit_map[1], sn_bit_map[0], cur_ssn, ssn, word_idx, bit_idx, old_word_idx, old_bit_idx);
+                found = false;
+            }
+            else if (!found)
+            {
+                char strbuf[256];
+                _dump_BA_notification(strbuf, ba_notify_data);
+                prn_aggr_err("SN out-of-order: %d\n%s\n", start_ssn, strbuf);
+            }
+        }
+        else
+        {
+            found = _ssn_to_bit_idx(start_ssn, ssn, &word_idx, &bit_idx);
+            first_found = found;
+            if (found && (word_idx >= 2 || bit_idx >= 32))
+                prn_aggr_err("idx error 3: %d %d %d %d\n",
+                             cur_ssn, ssn, word_idx, bit_idx);
+        }
+    }
+    _release_frames(ampdu_tid);
+    if (p_acked_num != NULL)
+        *p_acked_num = acked_num;
+    return aggr_num;
+}
+static void _flush_release_queue (struct ieee80211_hw *hw,
+                                  struct sk_buff_head *release_queue)
+{
+    do
+    {
+        struct sk_buff *ampdu_skb = __skb_dequeue(release_queue);
+        struct ieee80211_tx_info *tx_info;
+        struct SKB_info_st *skb_info;
+        if (ampdu_skb == NULL)
+            break;
+        skb_info = (struct SKB_info_st *) (ampdu_skb->head);
+        skb_pull(ampdu_skb, AMPDU_DELIMITER_LEN);
+        tx_info = IEEE80211_SKB_CB(ampdu_skb);
+        ieee80211_tx_info_clear_status(tx_info);
+        tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
+        if (skb_info->ampdu_tx_status == AMPDU_ST_DONE)
+            tx_info->flags |= IEEE80211_TX_STAT_ACK;
+        tx_info->status.ampdu_len = 1;
+        tx_info->status.ampdu_ack_len = 1;
+#ifdef REPORT_TX_STATUS_DIRECTLY
+        dev_kfree_skb_any(ampdu_skb);
+#else
+        #if defined(USE_THREAD_RX) && !defined(IRQ_PROC_TX_DATA)
+        ieee80211_tx_status(hw, ampdu_skb);
+        #else
+        ieee80211_tx_status_irqsafe(hw, ampdu_skb);
+        #endif
+#endif
+    } while (1);
+}
+#if 0
+static u16 _get_BA_notification_hits(u16 ssn,u32 *bit_map,struct ampdu_ba_notify_data *ba_notification,u16 *max_continue_hits,u16 *aggr_num)
+{
+    int i;
+    u16 hits=0,continue_hits=0;
+    u64 bitMap=0;
+    if(bit_map)
+    bitMap = ((u64)bit_map[1]<<32) | (u64)(bit_map[0]);
+    for (i = 0; i < MAX_AGGR_NUM; i++)
+    {
+        if (ba_notification->seq_no[i] == (u16)(-1))
+        break;
+        if(ssn <= ba_notification->seq_no[i])
+        {
+            if((bitMap>>(ba_notification->seq_no[i]-ssn))&0x1)
+            {
+                hits++;
+                continue_hits++;
+                if(*max_continue_hits<=continue_hits)
+                *max_continue_hits = continue_hits;
+            }
+            else
+            {
+                continue_hits=0;
+            }
+        }
+    }
+    *aggr_num = i;
+    return hits;
+}
+#endif
+void ssv6200_ampdu_no_BA_handler (struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+    struct cfg_host_event *host_event = (struct cfg_host_event *) skb->data;
+    struct ampdu_ba_notify_data *ba_notification =
+            (struct ampdu_ba_notify_data *) &host_event->dat[0];
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) (ba_notification + 1);
+    struct ssv_softc *sc = hw->priv;
+    struct ieee80211_sta *sta = ssv6xxx_find_sta_by_addr(sc, hdr->addr1);
+    u8 tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    char seq_str[256];
+    struct AMPDU_TID_st *ampdu_tid;
+    int i;
+    u16 aggr_num = 0;
+    struct firmware_rate_control_report_data *report_data;
+    if (sta == NULL)
+    {
+        prn_aggr_err(
+                "NO BA for %d to unmatched STA %02X-%02X-%02X-%02X-%02X-%02X: %s\n",
+                tidno, hdr->addr1[0], hdr->addr1[1], hdr->addr1[2], hdr->addr1[3], hdr->addr1[4], hdr->addr1[5], seq_str);
+        dev_kfree_skb_any(skb);
+        return;
+    }
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    _dump_BA_notification(seq_str, ba_notification);
+    prn_aggr_err(
+            "NO BA for %d to %02X-%02X-%02X-%02X-%02X-%02X: %s\n",
+            tidno, sta->addr[0], sta->addr[1], sta->addr[2], sta->addr[3], sta->addr[4], sta->addr[5], seq_str);
+    ampdu_tid = &ssv_sta_priv->ampdu_tid[tidno];
+    if (ampdu_tid->state != AMPDU_STATE_OPERATION)
+    {
+        dev_kfree_skb_any(skb);
+        return;
+    }
+    for (i = 0; i < MAX_AGGR_NUM; i++)
+    {
+        u32 ssn = ba_notification->seq_no[i];
+        struct sk_buff *skb;
+        u32 skb_ssn;
+        struct SKB_info_st *skb_info;
+        if (ssn >= (4096))
+            break;
+        aggr_num++;
+        skb = INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+        skb_ssn = (skb == NULL) ? (-1) : ampdu_skb_ssn(skb);
+        if (skb_ssn != ssn)
+        {
+            prn_aggr_err("Unmatched SSN packet: %d - %d\n", ssn, skb_ssn);
+            continue;
+        }
+        skb_info = (struct SKB_info_st *) (skb->head);
+        if (skb_info->ampdu_tx_status == AMPDU_ST_SENT)
+        {
+            if (skb_info->mpdu_retry_counter < SSV_AMPDU_retry_counter_max)
+            {
+                if (skb_info->mpdu_retry_counter == 0)
+                {
+                    struct ieee80211_hdr *skb_hdr = ampdu_skb_hdr(skb);
+                    skb_hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
+                }
+                skb_info->ampdu_tx_status = AMPDU_ST_RETRY;
+                skb_info->mpdu_retry_counter++;
+            }
+            else
+            {
+                skb_info->ampdu_tx_status = AMPDU_ST_DROPPED;
+                prn_aggr_err("p %d\n", skb_ssn);
+            }
+        }
+        else
+        {
+            prn_aggr_err("S %d %d\n", skb_ssn, skb_info->ampdu_tx_status);
+        }
+    }
+    _release_frames(ampdu_tid);
+    host_event->h_event = SOC_EVT_RC_AMPDU_REPORT;
+    report_data =
+            (struct firmware_rate_control_report_data *) &host_event->dat[0];
+    report_data->ampdu_len = aggr_num;
+    report_data->ampdu_ack_len = 0;
+    report_data->wsid = ssv_sta_priv->sta_info->hw_wsid;
+#if 0
+    printk("AMPDU report NO BA!!wsid[%d]didx[%d]F[%d]R[%d]S[%d]\n",report_data->wsid,report_data->data_rate,report_data->mpduFrames,report_data->mpduFrameRetry,report_data->mpduFrameSuccess);
+#endif
+    skb_queue_tail(&sc->rc_report_queue, skb);
+    if (sc->rc_sample_sechedule == 0)
+        queue_work(sc->rc_sample_workqueue, &sc->rc_sample_work);
+}
+void ssv6200_ampdu_BA_handler (struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) (skb->data
+                                                          + SSV6XXX_RX_DESC_LEN);
+    AMPDU_BLOCKACK *BA_frame = (AMPDU_BLOCKACK *) hdr;
+    struct ieee80211_sta *sta;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    struct ampdu_ba_notify_data *ba_notification;
+    u32 ssn, aggr_num = 0, acked_num = 0;
+    u8 tid_no;
+    u32 sn_bit_map[2];
+    struct firmware_rate_control_report_data *report_data;
+    HDR_HostEvent *host_evt;
+    sta = ssv6xxx_find_sta_by_rx_skb(sc, skb);
+    if (sta == NULL)
+    {
+        if (skb->len > AMPDU_BA_FRAME_LEN)
+        {
+            char strbuf[256];
+            struct ampdu_ba_notify_data *ba_notification =
+                    (struct ampdu_ba_notify_data *) (skb->data + skb->len
+                                                     - sizeof(struct ampdu_ba_notify_data));
+            _dump_BA_notification(strbuf, ba_notification);
+            prn_aggr_err("BA from not connected STA (%02X-%02X-%02X-%02X-%02X-%02X) (%s)\n",
+                    BA_frame->ta_addr[0], BA_frame->ta_addr[1], BA_frame->ta_addr[2],
+                    BA_frame->ta_addr[3], BA_frame->ta_addr[4], BA_frame->ta_addr[5], strbuf);
+        }
+        dev_kfree_skb_any(skb);
+        return;
+    }
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    ssn = BA_frame->BA_ssn;
+    sn_bit_map[0] = BA_frame->BA_sn_bit_map[0];
+    sn_bit_map[1] = BA_frame->BA_sn_bit_map[1];
+    tid_no = BA_frame->tid_info;
+    ssv_sta_priv->ampdu_mib_total_BA_counter++;
+    if (ssv_sta_priv->ampdu_tid[tid_no].state == AMPDU_STATE_STOP)
+    {
+        prn_aggr_err("ssv6200_ampdu_BA_handler state == AMPDU_STATE_STOP.\n");
+        dev_kfree_skb_any(skb);
+        return;
+    }
+    ssv_sta_priv->ampdu_tid[tid_no].mib.ampdu_mib_BA_counter++;
+    if (skb->len <= AMPDU_BA_FRAME_LEN)
+    {
+        prn_aggr_err("b %d\n", ssn);
+        dev_kfree_skb_any(skb);
+        return;
+    }
+    ba_notification =
+            (struct ampdu_ba_notify_data *) (skb->data + skb->len
+                                             - sizeof(struct ampdu_ba_notify_data));
+#if 0
+    if (1)
+    {
+        char strbuf[256];
+        _dump_BA_notification(strbuf, ba_notification);
+        prn_aggr_err("B %d %08X %08X: %s\n", ssn, sn_bit_map[0], sn_bit_map[1], strbuf);
+    }
+#endif
+    aggr_num = _ba_map_walker(&(ssv_sta_priv->ampdu_tid[tid_no]), ssn,
+                              sn_bit_map, ba_notification, &acked_num);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (ssv_sta_priv->ampdu_tid[tid_no].debugfs_dir)
+    {
+        struct sk_buff *dup_skb;
+        if (skb_queue_len(&ssv_sta_priv->ampdu_tid[tid_no].ba_q) > 24)
+        {
+            struct sk_buff *ba_skb = skb_dequeue(&ssv_sta_priv->ampdu_tid[tid_no].ba_q);
+            if (ba_skb)
+                dev_kfree_skb_any(ba_skb);
+        }
+        dup_skb = skb_clone(skb, GFP_ATOMIC);
+        if (dup_skb)
+            skb_queue_tail(&ssv_sta_priv->ampdu_tid[tid_no].ba_q, dup_skb);
+    }
+    #endif
+    skb_trim(skb, skb->len - sizeof(struct ampdu_ba_notify_data));
+#if 0
+    total_debug_count++;
+    if (ba_notification_hits != ba_notification_aggr_num)
+    printk("rate[%d] firmware retry [%d] agg nums[%d] hits[%d] continue_hits[%d] \n",ba_notification.data_rate,ba_notification.retry_count,ba_notification_aggr_num,ba_notification_hits,ba_notification_continue_hits);
+    else
+    {
+        if (ba_notification.retry_count==0)
+        total_perfect_debug_count++;
+        else
+        total_perfect_debug_count_but_firmware_retry++;
+    }
+    if ((total_debug_count % 2000) == 0)
+    {
+        printk("Percentage %d/2000\n",total_perfect_debug_count);
+        printk("firmware retry [%d] no BA[%d]\n",total_perfect_debug_count_but_firmware_retry,no_ba_debug_count);
+        total_debug_count = 0;
+        total_perfect_debug_count_but_firmware_retry=0;
+        total_perfect_debug_count = 0;
+        no_ba_debug_count = 0;
+    }
+#endif
+    host_evt = (HDR_HostEvent *) skb->data;
+    host_evt->h_event = SOC_EVT_RC_AMPDU_REPORT;
+    report_data =
+            (struct firmware_rate_control_report_data *) &host_evt->dat[0];
+    memcpy(report_data, ba_notification,
+           sizeof(struct firmware_rate_control_report_data));
+    report_data->ampdu_len = aggr_num;
+    report_data->ampdu_ack_len = acked_num;
+#ifdef RATE_CONTROL_HT_PERCENTAGE_TRACE
+    if((acked_num) && (acked_num != aggr_num))
+    {
+        int i;
+        for (i = 0; i < SSV62XX_TX_MAX_RATES ; i++) {
+            if(report_data->rates[i].data_rate == -1)
+                break;
+            if(report_data->rates[i].count == 0) {
+                    printk("*********************************\n");
+                    printk("       Illegal HT report         \n");
+                    printk("*********************************\n");
+            }
+            printk("        i=[%d] rate[%d] count[%d]\n",i,report_data->rates[i].data_rate,report_data->rates[i].count);
+        }
+        printk("AMPDU percentage = %d%% \n",acked_num*100/aggr_num);
+    }
+    else if(acked_num == 0)
+    {
+        printk("AMPDU percentage = 0%% aggr_num=%d acked_num=%d\n",aggr_num,acked_num);
+    }
+#endif
+    skb_queue_tail(&sc->rc_report_queue, skb);
+    if (sc->rc_sample_sechedule == 0)
+        queue_work(sc->rc_sample_workqueue, &sc->rc_sample_work);
+}
+static void _postprocess_BA (struct ssv_softc *sc, struct ssv_sta_info *sta_info, void *param)
+{
+    int j;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    if ( (sta_info->sta == NULL)
+        || ((sta_info->s_flags & STA_FLAG_VALID) == 0))
+        return;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta_info->sta->drv_priv;
+    for (j = 0; j < WMM_TID_NUM; j++)
+    {
+        AMPDU_TID *ampdu_tid = &ssv_sta_priv->ampdu_tid[j];
+        if (ampdu_tid->state != AMPDU_STATE_OPERATION)
+            continue;
+        _collect_retry_frames(ampdu_tid);
+        ssv6200_ampdu_send_retry(sc->hw, ampdu_tid, &ampdu_tid->retry_queue,
+                                 true);
+        _flush_early_ampdu_q(sc, ampdu_tid);
+        _flush_release_queue(sc->hw, &ampdu_tid->release_queue);
+    }
+}
+void ssv6xxx_ampdu_postprocess_BA (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    ssv6xxx_foreach_sta(sc, _postprocess_BA, NULL);
+}
+static void ssv6200_hw_set_rx_ba_session (struct ssv_hw *sh, bool on, u8 *ta,
+                                          u16 tid, u16 ssn, u8 buf_size)
+{
+    if (on)
+    {
+        u32 u32ta;
+        u32ta = 0;
+        u32ta |= (ta[0] & 0xff) << (8 * 0);
+        u32ta |= (ta[1] & 0xff) << (8 * 1);
+        u32ta |= (ta[2] & 0xff) << (8 * 2);
+        u32ta |= (ta[3] & 0xff) << (8 * 3);
+        SMAC_REG_WRITE(sh, ADR_BA_TA_0, u32ta);
+        u32ta = 0;
+        u32ta |= (ta[4] & 0xff) << (8 * 0);
+        u32ta |= (ta[5] & 0xff) << (8 * 1);
+        SMAC_REG_WRITE(sh, ADR_BA_TA_1, u32ta);
+        SMAC_REG_WRITE(sh, ADR_BA_TID, tid);
+        SMAC_REG_WRITE(sh, ADR_BA_ST_SEQ, ssn);
+        SMAC_REG_WRITE(sh, ADR_BA_SB0, 0);
+        SMAC_REG_WRITE(sh, ADR_BA_SB1, 0);
+        SMAC_REG_WRITE(sh, ADR_BA_CTRL, 0xb);
+    }
+    else
+    {
+        SMAC_REG_WRITE(sh, ADR_BA_CTRL, 0x0);
+    }
+}
+void ssv6xxx_set_ampdu_rx_add_work (struct work_struct *work)
+{
+    struct ssv_softc
+    *sc = container_of(work, struct ssv_softc, set_ampdu_rx_add_work);
+    ssv6200_hw_set_rx_ba_session(sc->sh, true, sc->ba_ra_addr, sc->ba_tid,
+                                 sc->ba_ssn, 64);
+}
+void ssv6xxx_set_ampdu_rx_del_work (struct work_struct *work)
+{
+    struct ssv_softc*sc = container_of(work, struct ssv_softc,
+                                       set_ampdu_rx_del_work);
+    u8 addr[6] = { 0 };
+    ssv6200_hw_set_rx_ba_session(sc->sh, false, addr, 0, 0, 0);
+}
+static void _reset_ampdu_mib (struct ssv_softc *sc, struct ssv_sta_info *sta_info, void *param)
+{
+    struct ieee80211_sta *sta = sta_info->sta;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    int i;
+    ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    for (i = 0; i < WMM_TID_NUM; i++)
+    {
+        ssv_sta_priv->ampdu_tid[i].ampdu_mib_reset = 1;
+    }
+}
+void ssv6xxx_ampdu_mib_reset (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    if (sc == NULL)
+        return;
+    ssv6xxx_foreach_sta(sc, _reset_ampdu_mib, NULL);
+}
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+ssize_t ampdu_tx_mib_dump (struct ssv_sta_priv_data *ssv_sta_priv,
+                           char *mib_str, ssize_t length)
+{
+    ssize_t buf_size = length;
+    ssize_t prt_size;
+    int j;
+    struct ssv_sta_info *ssv_sta = ssv_sta_priv->sta_info;
+    if (ssv_sta->sta == NULL)
+    {
+        prt_size = snprintf(mib_str, buf_size, "\n    NULL STA.\n");
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        goto mib_dump_exit;
+    }
+    for (j = 0; j < WMM_TID_NUM; j++)
+    {
+        int k;
+        struct AMPDU_TID_st *ampdu_tid = &ssv_sta_priv->ampdu_tid[j];
+        struct AMPDU_MIB_st *ampdu_mib = &ampdu_tid->mib;
+        prt_size = snprintf(mib_str, buf_size, "\n    WMM_TID %d@%d\n", j,
+                            ampdu_tid->state);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        if (ampdu_tid->state != AMPDU_STATE_OPERATION)
+            continue;
+        prt_size = snprintf(mib_str, buf_size, "        BA window size: %d\n",
+                            ampdu_tid->ssv_baw_size);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size, "        BA window head: %d\n",
+                            ampdu_tid->ssv_baw_head);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        Sending aggregated #: %d\n",
+                            ampdu_tid->aggr_pkt_num);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(
+                mib_str, buf_size, "        Waiting #: %d\n",
+                skb_queue_len(&ampdu_tid->ampdu_skb_tx_queue));
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size, "        Early aggregated %d\n",
+                            ampdu_tid->early_aggr_skb_num);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        MPDU: %d\n",
+                            ampdu_mib->ampdu_mib_mpdu_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        Passed: %d\n", ampdu_mib->ampdu_mib_pass_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        Retry: %d\n",
+                            ampdu_mib->ampdu_mib_retry_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        AMPDU: %d\n",
+                            ampdu_mib->ampdu_mib_ampdu_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        Retry AMPDU: %d\n",
+                            ampdu_mib->ampdu_mib_aggr_retry_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        BAR count: %d\n",
+                            ampdu_mib->ampdu_mib_bar_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        Discard count: %d\n",
+                            ampdu_mib->ampdu_mib_discard_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size,
+                            "        BA count: %d\n",
+                            ampdu_mib->ampdu_mib_BA_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size, "        Total BA count: %d\n",
+                            ssv_sta_priv->ampdu_mib_total_BA_counter);
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        prt_size = snprintf(mib_str, buf_size, "        Aggr # count:\n");
+        mib_str += prt_size;
+        buf_size -= prt_size;
+        for (k = 0; k <= SSV_AMPDU_aggr_num_max; k++)
+        {
+            prt_size = snprintf(mib_str, buf_size, "            %d: %d\n", k,
+                                ampdu_mib->ampdu_mib_dist[k]);
+            mib_str += prt_size;
+            buf_size -= prt_size;
+        }
+    }
+mib_dump_exit:
+    return (length - buf_size);
+}
+static void _dump_ampdu_mib (struct ssv_softc *sc, struct ssv_sta_info *sta_info, void *param)
+{
+    struct mib_dump_data *dump_data = (struct mib_dump_data *)param;
+    struct ieee80211_sta *sta;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    ssize_t buf_size;
+    ssize_t prt_size;
+    char *mib_str = dump_data->prt_buff;
+    if (param == NULL)
+        return;
+    buf_size = dump_data->buff_size - 1;
+    sta = sta_info->sta;
+    if ((sta == NULL) || ((sta_info->s_flags & STA_FLAG_VALID) == 0))
+        return;
+    prt_size = snprintf(mib_str, buf_size,
+                        "STA: %02X-%02X-%02X-%02X-%02X-%02X:\n",
+                        sta->addr[0], sta->addr[1], sta->addr[2],
+                        sta->addr[3], sta->addr[4], sta->addr[5]);
+    mib_str += prt_size;
+    buf_size -= prt_size;
+    ssv_sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+    prt_size = ampdu_tx_mib_dump(ssv_sta_priv, mib_str, buf_size);
+    mib_str += prt_size;
+    buf_size -= prt_size;
+    dump_data->prt_len = (dump_data->buff_size - 1 - buf_size);
+    dump_data->prt_buff = mib_str;
+    dump_data->buff_size = buf_size;
+}
+ssize_t ssv6xxx_ampdu_mib_dump (struct ieee80211_hw *hw, char *mib_str,
+                                ssize_t length)
+{
+    struct ssv_softc *sc = hw->priv;
+    ssize_t buf_size = length - 1;
+    struct mib_dump_data dump_data = {mib_str, buf_size, 0};
+    if (sc == NULL)
+        return 0;
+    ssv6xxx_foreach_sta(sc, _dump_ampdu_mib, &dump_data);
+    return dump_data.prt_len;
+}
+#endif
+struct sk_buff *_alloc_ampdu_skb (struct ssv_softc *sc, struct AMPDU_TID_st *ampdu_tid, u32 len)
+{
+    unsigned char *payload_addr;
+    u32 headroom = sc->hw->extra_tx_headroom;
+    u32 offset;
+    u32 cur_max_ampdu_size = SSV_GET_MAX_AMPDU_SIZE(sc->sh);
+    u32 extra_room = sc->sh->tx_desc_len * 2 + 48;
+    u32 max_physical_len = (len && ((len + extra_room) < cur_max_ampdu_size))
+                           ? (len + extra_room)
+                           : cur_max_ampdu_size;
+    u32 skb_len = max_physical_len + headroom + 3;
+    struct sk_buff *ampdu_skb = __dev_alloc_skb(skb_len, GFP_KERNEL);
+    struct ampdu_hdr_st *ampdu_hdr;
+    if (ampdu_skb == NULL)
+    {
+        dev_err(sc->dev, "AMPDU allocation of size %d(%d) failed\n", len, skb_len);
+        return NULL;
+    }
+    payload_addr = ampdu_skb->data + headroom - sc->sh->tx_desc_len;
+    offset = ((size_t) payload_addr) % 4U;
+    if (offset)
+    {
+        printk(KERN_ERR "Align AMPDU data %d\n", offset);
+        skb_reserve(ampdu_skb, headroom + 4 - offset);
+    }
+    else
+        skb_reserve(ampdu_skb, headroom);
+    ampdu_hdr = (struct ampdu_hdr_st *) ampdu_skb->head;
+    skb_queue_head_init(&ampdu_hdr->mpdu_q);
+    ampdu_hdr->max_size = max_physical_len - extra_room;
+    ampdu_hdr->size = 0;
+    ampdu_hdr->ampdu_tid = ampdu_tid;
+    memset(ampdu_hdr->ssn, 0xFF, sizeof(ampdu_hdr->ssn));
+    ampdu_hdr->mpdu_num = 0;
+    return ampdu_skb;
+}
+bool _is_skb_q_empty (struct ssv_softc *sc, struct sk_buff *skb)
+{
+    u32 ac = skb_get_queue_mapping(skb);
+    u32 hw_txqid = sc->tx.hw_txqid[ac];
+    return AMPDU_HCI_Q_EMPTY(sc->sh, hw_txqid);
+}
+static u32 _check_timeout (struct AMPDU_TID_st *ampdu_tid)
+{
+    u16 ssn, head_ssn, end_ssn;
+    unsigned long check_jiffies = jiffies;
+    u32 has_retry = 0;
+    head_ssn = ampdu_tid->ssv_baw_head;
+    ssn = head_ssn;
+    if (ssn == SSV_ILLEGAL_SN)
+        return 0;
+    end_ssn = (head_ssn + SSV_AMPDU_BA_WINDOW_SIZE)% SSV_AMPDU_MAX_SSN;
+    do {
+        struct sk_buff *skb = INDEX_PKT_BY_SSN(ampdu_tid, ssn);
+        struct SKB_info_st *skb_info;
+        unsigned long cur_jiffies;
+        unsigned long timeout_jiffies;
+        u32 delta_ms;
+        if (skb == NULL)
+            break;
+        skb_info = (SKB_info *) (skb->head);
+        cur_jiffies = jiffies;
+        timeout_jiffies = skb_info->aggr_timestamp + msecs_to_jiffies(BA_WAIT_TIMEOUT);
+        if ( (skb_info->ampdu_tx_status != AMPDU_ST_SENT)
+            || time_before(cur_jiffies, timeout_jiffies))
+            break;
+        delta_ms = jiffies_to_msecs(cur_jiffies - skb_info->aggr_timestamp);
+        prn_aggr_err("rt S%d-T%d-%d (%u)\n",
+                     ((struct ssv_sta_priv_data *)skb_info->sta->drv_priv)->sta_idx,
+                     ampdu_tid->tidno, ssn,
+                     delta_ms);
+        if (delta_ms > 1000)
+        {
+            prn_aggr_err("Last checktime %lu - %lu = %u\n",
+                         check_jiffies, ampdu_tid->timestamp,
+                         jiffies_to_msecs(check_jiffies - ampdu_tid->timestamp));
+        }
+        has_retry += _mark_skb_retry(skb_info, skb);
+        INC_PKT_SN(ssn);
+    } while (ssn != end_ssn);
+    ampdu_tid->timestamp = check_jiffies;
+    return has_retry;
+}
+void ssv6xxx_ampdu_check_timeout (struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct AMPDU_TID_st *cur_AMPDU_TID;
+    if (!list_empty(&sc->tx.ampdu_tx_que))
+    {
+        list_for_each_entry_rcu(cur_AMPDU_TID, &sc->tx.ampdu_tx_que, list)
+        {
+            u32 has_retry;
+            if (cur_AMPDU_TID->state != AMPDU_STATE_OPERATION)
+                continue;
+            has_retry = _check_timeout(cur_AMPDU_TID);
+            if (has_retry)
+            {
+                _collect_retry_frames(cur_AMPDU_TID);
+                ssv6200_ampdu_send_retry(sc->hw, cur_AMPDU_TID, &cur_AMPDU_TID->retry_queue,
+                                         true);
+            }
+        }
+    }
+}
+void ssv6xxx_ampdu_sent(struct ieee80211_hw *hw, struct sk_buff *ampdu)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *) ampdu->head;
+    struct sk_buff *mpdu;
+    unsigned long cur_jiffies = jiffies;
+    int i;
+    SKB_info *mpdu_skb_info;
+    u16 ssn;
+    if (ampdu_hdr->ampdu_tid->state != AMPDU_STATE_OPERATION)
+        return;
+    spin_lock_bh(&ampdu_hdr->ampdu_tid->pkt_array_lock);
+    for (i = 0; i < ampdu_hdr->mpdu_num; i++)
+    {
+        ssn = ampdu_hdr->ssn[i];
+        mpdu = INDEX_PKT_BY_SSN(ampdu_hdr->ampdu_tid, ssn);
+        if (mpdu == NULL)
+        {
+            dev_err(sc->dev, "T%d-%d is a NULL MPDU.\n",
+                    ampdu_hdr->ampdu_tid->tidno, ssn);
+            continue;
+        }
+        if (ampdu_skb_ssn(mpdu) != ssn)
+        {
+            dev_err(sc->dev, "T%d-%d does not match %d MPDU.\n",
+                    ampdu_hdr->ampdu_tid->tidno, ssn, ampdu_skb_ssn(mpdu));
+            continue;
+        }
+        mpdu_skb_info = (SKB_info *) (mpdu->head);
+        mpdu_skb_info->aggr_timestamp = cur_jiffies;
+        mpdu_skb_info->ampdu_tx_status = AMPDU_ST_SENT;
+    }
+    spin_unlock_bh(&ampdu_hdr->ampdu_tid->pkt_array_lock);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.h
new file mode 100644
index 0000000000000..0361a3027313e
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ampdu.h
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _AMPDU_H_
+#define _AMPDU_H_ 
+#include <linux/version.h>
+#include <ssv6200_common.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+#include "linux_2_6_35.h"
+#endif
+#define Enable_ampdu_debug_log (0)
+#define Enable_AMPDU_Live_Time (0)
+#define Enable_HW_AUTO_CRC_32 (1)
+#define Enable_AMPDU_Rx (1)
+#define Enable_AMPDU_Tx (1)
+#define Enable_AMPDU_FW_Retry (1)
+#define Enable_AMPDU_delay_work (1)
+#define USE_FLUSH_RETRY 
+#define USE_AMPDU_TX_STATUS_ARRAY 
+#define SSV_AMPDU_FLOW_CONTROL 
+#define AMPDU_CHECK_SKB_SEQNO 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
+#define REPORT_TX_STATUS_DIRECTLY 
+#endif
+#define SSV_AMPDU_aggr_num_max MAX_AGGR_NUM
+#define SSV_AMPDU_seq_num_max (4096)
+#define SSV_AMPDU_retry_counter_max (3)
+#define SSV_AMPDU_tx_group_id_max (64)
+#define SSV_AMPDU_MAX_SSN (4096)
+#define SSV_AMPDU_BA_WINDOW_SIZE (64)
+#define SSV_AMPDU_WINDOW_SIZE (64)
+#define SSV_GET_MAX_AMPDU_SIZE(sh) (((sh)->tx_page_available/(sh)->ampdu_divider) << HW_MMU_PAGE_SHIFT)
+#define SSV_AMPDU_FLOW_CONTROL_UPPER_BOUND (64)
+#define SSV_AMPDU_FLOW_CONTROL_LOWER_BOUND (48)
+#define SSV_AMPDU_timer_period (50)
+#define SSV_AMPDU_TX_TIME_THRESHOLD (50)
+#define SSV_AMPDU_MPDU_LIVE_TIME (SSV_AMPDU_retry_counter_max*8)
+#define SSV_AMPDU_BA_TIME (50)
+#define SSV_ILLEGAL_SN (0xffff)
+#define AMPDU_BUFFER_SIZE (32*1024)
+#define AMPDU_SIGNATURE (0x4E)
+#define AMPDU_DELIMITER_LEN (4)
+#define AMPDU_FCS_LEN (4)
+#define AMPDU_RESERVED_LEN (3)
+#define AMPDU_TX_NAV_MCS_567 (48)
+#define SSV_SEQ_NUM_SHIFT (4)
+#define SSV_RETRY_BIT_SHIFT (11)
+#define IEEE80211_SEQ_SEQ_SHIFT (4)
+#define IEEE80211_AMPDU_BA_LEN (34)
+#define SSV6200_AMPDU_TRIGGER_INDEX 0
+#define SSV_SN_STATUS_Release (0xaa)
+#define SSV_SN_STATUS_Retry (0xbb)
+#define SSV_SN_STATUS_Wait_BA (0xcc)
+#define SSV_SN_STATUS_Discard (0xdd)
+#define AMPDU_HCI_SEND_TAIL_WITH_FLOWCTRL (0)
+#define AMPDU_HCI_SEND_HEAD_WITH_FLOWCTRL (1)
+#define AMPDU_HCI_SEND_TAIL_WITHOUT_FLOWCTRL (2)
+#define AMPDU_HCI_SEND_HEAD_WITHOUT_FLOWCTRL (3)
+#define SSV_BAR_CTRL_ACK_POLICY_NORMAL (0x0000)
+#define SSV_BAR_CTRL_CBMTID_COMPRESSED_BA (0x0004)
+#define SSV_BAR_CTRL_TID_INFO_SHIFT (12)
+#define AMPDU_STATE_START BIT(0)
+#define AMPDU_STATE_OPERATION BIT(1)
+#define AMPDU_STATE_STOP BIT(2)
+typedef enum{
+    AMPDU_REKEY_PAUSE_STOP=0,
+    AMPDU_REKEY_PAUSE_START,
+    AMPDU_REKEY_PAUSE_ONGOING,
+    AMPDU_REKEY_PAUSE_DEFER,
+    AMPDU_REKEY_PAUSE_HWKEY_SYNC,
+}AMPDU_REKEY_PAUSE_STATE;
+#define SSV_a_minus_b_in_c(a,b,c) (((a)>=(b))?((a)-(b)):((c)-(b)+(a)))
+#define SSV_AMPDU_SN_a_minus_b(a,b) (SSV_a_minus_b_in_c((a), (b), SSV_AMPDU_seq_num_max))
+#define AMPDU_HCI_SEND(_sh,_sk,_q,_flag) (_sh)->hci.hci_ops->hci_tx((_sk), (_q), (_flag))
+#define AMPDU_HCI_Q_EMPTY(_sh,_q) (_sh)->hci.hci_ops->hci_txq_empty((_q))
+struct ampdu_hdr_st
+{
+    u32 first_sn;
+    struct sk_buff_head mpdu_q;
+    u32 max_size;
+    u32 size;
+    struct AMPDU_TID_st *ampdu_tid;
+    u16 ssn[MAX_AGGR_NUM];
+    u16 mpdu_num;
+    struct fw_rc_retry_params rates[SSV62XX_TX_MAX_RATES];
+    struct ieee80211_sta *sta;
+};
+enum AMPDU_TX_STATUS_E {
+ AMPDU_ST_NON_AMPDU,
+ AMPDU_ST_AGGREGATED,
+ AMPDU_ST_SENT,
+ AMPDU_ST_RETRY,
+ AMPDU_ST_DROPPED,
+ AMPDU_ST_DONE,
+};
+typedef struct AMPDU_MIB_st
+{
+    u32 ampdu_mib_mpdu_counter;
+    u32 ampdu_mib_retry_counter;
+    u32 ampdu_mib_ampdu_counter;
+    u32 ampdu_mib_aggr_retry_counter;
+    u32 ampdu_mib_bar_counter;
+    u32 ampdu_mib_discard_counter;
+    u32 ampdu_mib_total_BA_counter;
+    u32 ampdu_mib_BA_counter;
+    u32 ampdu_mib_pass_counter;
+    u32 ampdu_mib_dist[SSV_AMPDU_aggr_num_max + 1];
+} AMPDU_MIB;
+typedef struct AMPDU_TID_st
+{
+    struct list_head list;
+    volatile unsigned long timestamp;
+    u32 tidno;
+    u16 ac;
+    struct ieee80211_sta *sta;
+    u16 ssv_baw_size;
+    u8 agg_num_max;
+    u8 state;
+#ifdef AMPDU_CHECK_SKB_SEQNO
+    u32 last_seqno;
+#endif
+    struct sk_buff_head ampdu_skb_tx_queue;
+    spinlock_t ampdu_skb_tx_queue_lock;
+    struct sk_buff_head retry_queue;
+    struct sk_buff_head release_queue;
+    struct sk_buff *aggr_pkts[SSV_AMPDU_BA_WINDOW_SIZE];
+    volatile u32 aggr_pkt_num;
+    volatile u16 ssv_baw_head;
+    spinlock_t pkt_array_lock;
+    #ifdef ENABLE_AGGREGATE_IN_TIME
+    struct sk_buff *cur_ampdu_pkt;
+    struct sk_buff_head early_aggr_ampdu_q;
+    u32 early_aggr_skb_num;
+    #endif
+    struct sk_buff_head ampdu_skb_wait_encry_queue;
+    u32 ampdu_mib_reset;
+    struct AMPDU_MIB_st mib;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct dentry *debugfs_dir;
+    struct sk_buff_head ba_q;
+#endif
+} AMPDU_TID, *p_AMPDU_TID;
+typedef struct AMPDU_DELIMITER_st
+{
+    u16 reserved:4;
+    u16 length:12;
+    u8 crc;
+    u8 signature;
+} AMPDU_DELIMITER, *p_AMPDU_DELIMITER;
+typedef struct AMPDU_BLOCKACK_st
+{
+ u16 frame_control;
+ u16 duration;
+ u8 ra_addr[ETH_ALEN];
+ u8 ta_addr[ETH_ALEN];
+    u16 BA_ack_ploicy:1;
+    u16 multi_tid:1;
+    u16 compress_bitmap:1;
+    u16 reserved:9;
+    u16 tid_info:4;
+    u16 BA_fragment_sn:4;
+    u16 BA_ssn:12;
+    u32 BA_sn_bit_map[2];
+} AMPDU_BLOCKACK, *p_AMPDU_BLOCKACK;
+struct ssv_bar {
+ unsigned short frame_control;
+ unsigned short duration;
+ unsigned char ra[6];
+ unsigned char ta[6];
+ unsigned short control;
+ unsigned short start_seq_num;
+} __packed;
+#if Enable_ampdu_debug_log
+    #define ampdu_db_log(format, args...) printk("~~~ampdu [%s:%d] "format, __FUNCTION__, __LINE__, ##args)
+    #define ampdu_db_log_simple(format, args...) printk(format, ##args)
+#else
+    #define ampdu_db_log(...) do {} while (0)
+    #define ampdu_db_log_simple(...) do {} while (0)
+#endif
+#if Enable_AMPDU_delay_work
+void ssv6200_ampdu_delayed_work_callback_func(struct work_struct *work);
+#else
+void ssv6200_ampdu_timer_callback_func(unsigned long data);
+#endif
+void ssv6200_ampdu_init(struct ieee80211_hw *hw);
+void ssv6200_ampdu_deinit(struct ieee80211_hw *hw);
+void ssv6200_ampdu_release_skb(struct sk_buff *skb, struct ieee80211_hw *hw);
+void ssv6200_ampdu_tx_start(u16 tid, struct ieee80211_sta *sta, struct ieee80211_hw *hw, u16 *ssn);
+void ssv6200_ampdu_tx_operation(u16 tid, struct ieee80211_sta *sta, struct ieee80211_hw *hw, u8 buffer_size);
+void ssv6200_ampdu_tx_stop(u16 tid, struct ieee80211_sta *sta, struct ieee80211_hw *hw);
+bool ssv6200_ampdu_tx_handler(struct ieee80211_hw *hw, struct sk_buff *skb);
+u32 ssv6xxx_ampdu_flush(struct ieee80211_hw *hw);
+void ssv6200_ampdu_timeout_tx (struct ieee80211_hw *hw);
+struct cfg_host_event;
+void ssv6200_ampdu_no_BA_handler(struct ieee80211_hw *hw, struct sk_buff *skb);
+void ssv6200_ampdu_BA_handler(struct ieee80211_hw *hw, struct sk_buff *skb);
+void ssv6200_ampdu_tx_update_state(void *priv, struct ieee80211_sta *sta, struct sk_buff *skb);
+void ssv6200_ampdu_tx_add_sta(struct ieee80211_hw *hw, struct ieee80211_sta *sta);
+void ssv6xxx_ampdu_postprocess_BA (struct ieee80211_hw *hw);
+void ssv6xxx_ampdu_check_timeout (struct ieee80211_hw *hw);
+void ssv6xxx_ampdu_sent (struct ieee80211_hw *hw, struct sk_buff *ampdu);
+extern void ssv6xxx_set_ampdu_rx_add_work(struct work_struct *work);
+extern void ssv6xxx_set_ampdu_rx_del_work(struct work_struct *work);
+void ssv6xxx_mib_reset (struct ieee80211_hw *hw);
+ssize_t ssv6xxx_mib_dump (struct ieee80211_hw *hw, char *mib_str, ssize_t length);
+#if 0
+void tx_work(struct work_struct *work);
+void retry_work(struct work_struct *work);
+#endif
+void encry_work(struct work_struct *work);
+void sync_hw_key_work(struct work_struct *work);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.c
new file mode 100644
index 0000000000000..9b1b5518038a4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.c
@@ -0,0 +1,549 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <ssv6200.h>
+#include <linux/nl80211.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/time.h>
+#include <linux/sched.h>
+#include <net/mac80211.h>
+#include <ssv6200.h>
+#include "lib.h"
+#include "dev.h"
+#include "ap.h"
+#include "ssv_rc_common.h"
+#include "ssv_rc.h"
+int ssv6200_bcast_queue_len(struct ssv6xxx_bcast_txq *bcast_txq);
+#define IS_EQUAL(a,b) ( (a) == (b) )
+#define SET_BIT(v,b) ( (v) |= (0x01<<b) )
+#define CLEAR_BIT(v,b) ( (v) &= ~(0x01<<b) )
+#define IS_BIT_SET(v,b) ( (v) & (0x01<<(b) ) )
+#define PBUF_BASE_ADDR 0x80000000
+#define PBUF_ADDR_SHIFT 16
+#define PBUF_MapPkttoID(_PKT) (((u32)_PKT&0x0FFF0000)>>PBUF_ADDR_SHIFT)
+#define PBUF_MapIDtoPkt(_ID) (PBUF_BASE_ADDR|((_ID)<<PBUF_ADDR_SHIFT))
+#define SSV6xxx_BEACON_MAX_ALLOCATE_CNT 10
+#define MTX_BCN_PKTID_CH_LOCK_SHIFT MTX_BCN_PKTID_CH_LOCK_SFT
+#define MTX_BCN_CFG_VLD_SHIFT MTX_BCN_CFG_VLD_SFT
+#define MTX_BCN_CFG_VLD_MASK MTX_BCN_CFG_VLD_MSK
+#define AUTO_BCN_ONGOING_MASK MTX_AUTO_BCN_ONGOING_MSK
+#define AUTO_BCN_ONGOING_SHIFT MTX_AUTO_BCN_ONGOING_SFT
+#define MTX_BCN_TIMER_EN_SHIFT MTX_BCN_TIMER_EN_SFT
+#define MTX_TSF_TIMER_EN_SHIFT MTX_TSF_TIMER_EN_SFT
+#define MTX_HALT_MNG_UNTIL_DTIM_SHIFT MTX_HALT_MNG_UNTIL_DTIM_SFT
+#define MTX_BCN_ENABLE_MASK (MTX_BCN_TIMER_EN_I_MSK)
+#define MTX_BCN_PERIOD_SHIFT MTX_BCN_PERIOD_SFT
+#define MTX_DTIM_NUM_SHIFT MTX_DTIM_NUM_SFT
+#define MTX_DTIM_OFST0 MTX_DTIM_OFST0_SFT
+enum ssv6xxx_beacon_type{
+ SSV6xxx_BEACON_0,
+ SSV6xxx_BEACON_1,
+};
+static const u32 ssv6xxx_beacon_adr[] =
+{
+ ADR_MTX_BCN_CFG0,
+    ADR_MTX_BCN_CFG1,
+};
+void ssv6xxx_beacon_reg_lock(struct ssv_softc *sc, bool block)
+{
+ u32 val;
+ val = block<<MTX_BCN_PKTID_CH_LOCK_SHIFT;
+#ifdef BEACON_DEBUG
+ printk("ssv6xxx_beacon_reg_lock   val[0x:%08x]\n ", val);
+#endif
+ SMAC_REG_WRITE(sc->sh, ADR_MTX_BCN_MISC, val);
+}
+void ssv6xxx_beacon_set_info(struct ssv_softc *sc, u8 beacon_interval, u8 dtim_cnt)
+{
+ u32 val;
+ if(beacon_interval==0)
+  beacon_interval = 100;
+#ifdef BEACON_DEBUG
+ printk("[A] BSS_CHANGED_BEACON_INT beacon_int[%d] dtim_cnt[%d]\n",beacon_interval, (dtim_cnt));
+#endif
+ val = (beacon_interval<<MTX_BCN_PERIOD_SHIFT)| (dtim_cnt<<MTX_DTIM_NUM_SHIFT);
+ SMAC_REG_WRITE(sc->sh, ADR_MTX_BCN_PRD, val);
+}
+bool ssv6xxx_beacon_enable(struct ssv_softc *sc, bool bEnable)
+{
+ u32 regval=0;
+ int ret = 0;
+ if(bEnable && !sc->beacon_usage)
+ {
+  printk("[A] Reject to set beacon!!!.        ssv6xxx_beacon_enable bEnable[%d] sc->beacon_usage[%d]\n",bEnable ,sc->beacon_usage);
+        sc->enable_beacon = BEACON_WAITING_ENABLED;
+  return 0;
+ }
+ if((bEnable && (BEACON_ENABLED & sc->enable_beacon))||
+        (!bEnable && !sc->enable_beacon))
+ {
+  printk("[A] ssv6xxx_beacon_enable bEnable[%d] and sc->enable_beacon[%d] are the same. no need to execute.\n",bEnable ,sc->enable_beacon);
+        if(bEnable){
+            printk("        Ignore enable beacon cmd!!!!\n");
+            return 0;
+        }
+ }
+ SMAC_REG_READ(sc->sh, ADR_MTX_BCN_EN_MISC, &regval);
+#ifdef BEACON_DEBUG
+ printk("[A] ssv6xxx_beacon_enable read misc reg val [%08x]\n", regval);
+#endif
+ regval &= MTX_BCN_ENABLE_MASK;
+#ifdef BEACON_DEBUG
+ printk("[A] ssv6xxx_beacon_enable read misc reg val [%08x]\n", regval);
+#endif
+ regval |= (bEnable<<MTX_BCN_TIMER_EN_SHIFT);
+ ret = SMAC_REG_WRITE(sc->sh, ADR_MTX_BCN_EN_MISC, regval);
+#ifdef BEACON_DEBUG
+ printk("[A] ssv6xxx_beacon_enable read misc reg val [%08x]\n", regval);
+#endif
+    sc->enable_beacon = (bEnable==true)?BEACON_ENABLED:0;
+ return ret;
+}
+int ssv6xxx_beacon_fill_content(struct ssv_softc *sc, u32 regaddr, u8 *beacon, int size)
+{
+ u32 i, val;
+ u32 *ptr = (u32*)beacon;
+ size = size/4;
+ for(i=0; i<size; i++)
+ {
+  val = (u32)(*(ptr+i));
+#ifdef BEACON_DEBUG
+  printk("[%08x] ", val );
+#endif
+  SMAC_REG_WRITE(sc->sh, regaddr+i*4, val);
+ }
+#ifdef BEACON_DEBUG
+  printk("\n");
+#endif
+    return 0;
+}
+void ssv6xxx_beacon_fill_tx_desc(struct ssv_softc *sc, struct sk_buff* beacon_skb)
+{
+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(beacon_skb);
+ struct ssv6200_tx_desc *tx_desc;
+ u16 pb_offset = TXPB_OFFSET;
+ struct ssv_rate_info ssv_rate;
+ skb_push(beacon_skb, pb_offset);
+ tx_desc = (struct ssv6200_tx_desc *)beacon_skb->data;
+ memset(tx_desc,0, pb_offset);
+ ssv6xxx_rc_hw_rate_idx(sc, tx_info, &ssv_rate);
+    tx_desc->len = beacon_skb->len-pb_offset;
+ tx_desc->c_type = M2_TXREQ;
+    tx_desc->f80211 = 1;
+ tx_desc->ack_policy = 1;
+    tx_desc->hdr_offset = pb_offset;
+    tx_desc->hdr_len = 24;
+    tx_desc->payload_offset = tx_desc->hdr_offset + tx_desc->hdr_len;
+ tx_desc->crate_idx = ssv_rate.crate_hw_idx;
+ tx_desc->drate_idx = ssv_rate.drate_hw_idx;
+    skb_put(beacon_skb, 4);
+}
+inline enum ssv6xxx_beacon_type ssv6xxx_beacon_get_valid_reg(struct ssv_softc *sc)
+{
+ u32 regval =0;
+ SMAC_REG_READ(sc->sh, ADR_MTX_BCN_MISC, &regval);
+ regval &= MTX_BCN_CFG_VLD_MASK;
+ regval = regval >>MTX_BCN_CFG_VLD_SHIFT;
+ if(regval==0x2 || regval == 0x0)
+  return SSV6xxx_BEACON_0;
+ else if(regval==0x1)
+  return SSV6xxx_BEACON_1;
+ else
+  printk("=============>ERROR!!drv_bcn_reg_available\n");
+ return SSV6xxx_BEACON_0;
+}
+bool ssv6xxx_beacon_set(struct ssv_softc *sc, struct sk_buff *beacon_skb, int dtim_offset)
+{
+ u32 reg_tx_beacon_adr = ADR_MTX_BCN_CFG0;
+ enum ssv6xxx_beacon_type avl_bcn_type = SSV6xxx_BEACON_0;
+ bool ret = true;
+ int val;
+ ssv6xxx_beacon_reg_lock(sc, 1);
+ avl_bcn_type = ssv6xxx_beacon_get_valid_reg(sc);
+ if(avl_bcn_type == SSV6xxx_BEACON_1)
+  reg_tx_beacon_adr = ADR_MTX_BCN_CFG1;
+#ifdef BEACON_DEBUG
+ printk("[A] ssv6xxx_beacon_set avl_bcn_type[%d]\n", avl_bcn_type);
+#endif
+ do{
+  if(IS_BIT_SET(sc->beacon_usage, avl_bcn_type))
+  {
+#ifdef BEACON_DEBUG
+   printk("[A] beacon has already been set old len[%d] new len[%d]\n", sc->beacon_info[avl_bcn_type].len, beacon_skb->len);
+#endif
+   if (sc->beacon_info[avl_bcn_type].len >= beacon_skb->len)
+   {
+    break;
+   }
+   else
+   {
+    if(false == ssv6xxx_pbuf_free(sc, sc->beacon_info[avl_bcn_type].pubf_addr))
+    {
+#ifdef BEACON_DEBUG
+     printk("=============>ERROR!!Intend to allcoate beacon from ASIC fail.\n");
+#endif
+     ret = false;
+     goto out;
+    }
+    CLEAR_BIT(sc->beacon_usage, avl_bcn_type);
+   }
+  }
+  sc->beacon_info[avl_bcn_type].pubf_addr = ssv6xxx_pbuf_alloc(sc, beacon_skb->len, TX_BUF);
+  sc->beacon_info[avl_bcn_type].len = beacon_skb->len;
+  if(sc->beacon_info[avl_bcn_type].pubf_addr == 0)
+  {
+   ret = false;
+   goto out;
+  }
+  SET_BIT(sc->beacon_usage, avl_bcn_type);
+#ifdef BEACON_DEBUG
+  printk("[A] beacon type[%d] usage[%d] allocate new beacon addr[%08x] \n", avl_bcn_type, sc->beacon_usage, sc->beacon_info[avl_bcn_type].pubf_addr);
+#endif
+ }while(0);
+ ssv6xxx_beacon_fill_content(sc, sc->beacon_info[avl_bcn_type].pubf_addr, beacon_skb->data, beacon_skb->len);
+ val = (PBUF_MapPkttoID(sc->beacon_info[avl_bcn_type].pubf_addr))|(dtim_offset<<MTX_DTIM_OFST0);
+ SMAC_REG_WRITE(sc->sh, reg_tx_beacon_adr, val);
+#ifdef BEACON_DEBUG
+ printk("[A] update to register reg_tx_beacon_adr[%08x] val[%08x]\n", reg_tx_beacon_adr, val);
+#endif
+out:
+ ssv6xxx_beacon_reg_lock(sc, 0);
+    if(sc->beacon_usage && (sc->enable_beacon&BEACON_WAITING_ENABLED)){
+        printk("[A] enable beacon for BEACON_WAITING_ENABLED flags\n");
+        ssv6xxx_beacon_enable(sc, true);
+    }
+ return ret;
+}
+inline bool ssv6xxx_auto_bcn_ongoing(struct ssv_softc *sc)
+{
+ u32 regval;
+ SMAC_REG_READ(sc->sh, ADR_MTX_BCN_MISC, &regval);
+ return ((AUTO_BCN_ONGOING_MASK&regval)>>AUTO_BCN_ONGOING_SHIFT);
+}
+void ssv6xxx_beacon_release(struct ssv_softc *sc)
+{
+ int cnt=10;
+ printk("[A] ssv6xxx_beacon_release Enter\n");
+    cancel_work_sync(&sc->set_tim_work);
+ do {
+  if(ssv6xxx_auto_bcn_ongoing(sc))
+   ssv6xxx_beacon_enable(sc, false);
+  else
+   break;
+  cnt--;
+  if(cnt<=0)
+   break;
+ } while(1);
+ if(IS_BIT_SET(sc->beacon_usage, SSV6xxx_BEACON_0))
+ {
+  ssv6xxx_pbuf_free(sc, sc->beacon_info[SSV6xxx_BEACON_0].pubf_addr);
+  CLEAR_BIT(sc->beacon_usage, SSV6xxx_BEACON_0);
+ }
+ if(IS_BIT_SET(sc->beacon_usage, SSV6xxx_BEACON_1))
+ {
+  ssv6xxx_pbuf_free(sc, sc->beacon_info[SSV6xxx_BEACON_1].pubf_addr);
+  CLEAR_BIT(sc->beacon_usage, SSV6xxx_BEACON_1);
+ }
+ sc->enable_beacon = 0;
+    if(sc->beacon_buf){
+        dev_kfree_skb_any(sc->beacon_buf);
+        sc->beacon_buf = NULL;
+    }
+#ifdef BEACON_DEBUG
+ printk("[A] ssv6xxx_beacon_release leave\n");
+#endif
+}
+void ssv6xxx_beacon_change(struct ssv_softc *sc, struct ieee80211_hw *hw, struct ieee80211_vif *vif, bool aid0_bit_set)
+{
+ struct sk_buff *skb;
+    struct sk_buff *old_skb = NULL;
+ u16 tim_offset, tim_length;
+    if(sc == NULL || hw == NULL || vif == NULL ){
+        printk("[Error]........ssv6xxx_beacon_change input error\n");
+  return;
+    }
+    do{
+     skb = ieee80211_beacon_get_tim(hw, vif,
+       &tim_offset, &tim_length);
+        if(skb == NULL){
+            printk("[Error]........skb is NULL\n");
+            break;
+        }
+     if (tim_offset && tim_length >= 6) {
+      skb->data[tim_offset + 2] = 0;
+      if (aid0_bit_set)
+       skb->data[tim_offset + 4] |= 1;
+      else
+       skb->data[tim_offset + 4] &= ~1;
+     }
+#ifdef BEACON_DEBUG
+     printk("[A] beacon len [%d] tim_offset[%d]\n", skb->len, tim_offset);
+#endif
+     ssv6xxx_beacon_fill_tx_desc(sc, skb);
+#ifdef BEACON_DEBUG
+     printk("[A] beacon len [%d] tim_offset[%d]\n", skb->len, tim_offset);
+#endif
+        if(sc->beacon_buf)
+        {
+            if(memcmp(sc->beacon_buf->data, skb->data, (skb->len-FCS_LEN)) == 0){
+                old_skb = skb;
+                break;
+            }
+            else{
+                 old_skb = sc->beacon_buf;
+                 sc->beacon_buf = skb;
+            }
+        }
+        else{
+            sc->beacon_buf = skb;
+        }
+     tim_offset+=2;
+     if(ssv6xxx_beacon_set(sc, skb, tim_offset))
+     {
+      u8 dtim_cnt = vif->bss_conf.dtim_period-1;
+      if(sc->beacon_dtim_cnt != dtim_cnt)
+      {
+       sc->beacon_dtim_cnt = dtim_cnt;
+#ifdef BEACON_DEBUG
+                printk("[A] beacon_dtim_cnt [%d]\n", sc->beacon_dtim_cnt);
+#endif
+                ssv6xxx_beacon_set_info(sc, sc->beacon_interval,
+                                                        sc->beacon_dtim_cnt);
+      }
+     }
+    }while(0);
+    if(old_skb)
+     dev_kfree_skb_any(old_skb);
+}
+void ssv6200_set_tim_work(struct work_struct *work)
+{
+    struct ssv_softc *sc =
+            container_of(work, struct ssv_softc, set_tim_work);
+#ifdef BROADCAST_DEBUG
+ printk("%s() enter\n", __FUNCTION__);
+#endif
+ ssv6xxx_beacon_change(sc, sc->hw, sc->ap_vif, sc->aid0_bit_set);
+#ifdef BROADCAST_DEBUG
+    printk("%s() leave\n", __FUNCTION__);
+#endif
+}
+int ssv6200_bcast_queue_len(struct ssv6xxx_bcast_txq *bcast_txq)
+{
+ u32 len;
+    unsigned long flags;
+    spin_lock_irqsave(&bcast_txq->txq_lock, flags);
+    len = bcast_txq->cur_qsize;
+    spin_unlock_irqrestore(&bcast_txq->txq_lock, flags);
+    return len;
+}
+struct sk_buff* ssv6200_bcast_dequeue(struct ssv6xxx_bcast_txq *bcast_txq, u8 *remain_len)
+{
+    struct sk_buff *skb = NULL;
+    unsigned long flags;
+    spin_lock_irqsave(&bcast_txq->txq_lock, flags);
+    if(bcast_txq->cur_qsize){
+        bcast_txq->cur_qsize --;
+        if(remain_len)
+            *remain_len = bcast_txq->cur_qsize;
+        skb = __skb_dequeue(&bcast_txq->qhead);
+    }
+    spin_unlock_irqrestore(&bcast_txq->txq_lock, flags);
+    return skb;
+}
+int ssv6200_bcast_enqueue(struct ssv_softc *sc, struct ssv6xxx_bcast_txq *bcast_txq,
+                                                        struct sk_buff *skb)
+{
+    unsigned long flags;
+    spin_lock_irqsave(&bcast_txq->txq_lock, flags);
+    if (bcast_txq->cur_qsize >=
+                    SSV6200_MAX_BCAST_QUEUE_LEN){
+        struct sk_buff *old_skb;
+  old_skb = __skb_dequeue(&bcast_txq->qhead);
+        bcast_txq->cur_qsize --;
+        ssv6xxx_txbuf_free_skb(old_skb, (void*)sc);
+        printk("[B] ssv6200_bcast_enqueue - remove oldest queue\n");
+    }
+    __skb_queue_tail(&bcast_txq->qhead, skb);
+    bcast_txq->cur_qsize ++;
+    spin_unlock_irqrestore(&bcast_txq->txq_lock, flags);
+    return bcast_txq->cur_qsize;
+}
+void ssv6200_bcast_flush(struct ssv_softc *sc, struct ssv6xxx_bcast_txq *bcast_txq)
+{
+    struct sk_buff *skb;
+    unsigned long flags;
+#ifdef BCAST_DEBUG
+    printk("ssv6200_bcast_flush\n");
+#endif
+    spin_lock_irqsave(&bcast_txq->txq_lock, flags);
+    while(bcast_txq->cur_qsize > 0) {
+        skb = __skb_dequeue(&bcast_txq->qhead);
+        bcast_txq->cur_qsize --;
+        ssv6xxx_txbuf_free_skb(skb, (void*)sc);
+    }
+    spin_unlock_irqrestore(&bcast_txq->txq_lock, flags);
+}
+static int queue_block_cnt = 0;
+void ssv6200_bcast_tx_work(struct work_struct *work)
+{
+    struct ssv_softc *sc =
+            container_of(work, struct ssv_softc, bcast_tx_work.work);
+#if 1
+    struct sk_buff* skb;
+    int i;
+    u8 remain_size;
+#endif
+    unsigned long flags;
+    bool needtimer = true;
+    long tmo = sc->bcast_interval;
+    spin_lock_irqsave(&sc->ps_state_lock, flags);
+    do{
+#ifdef BCAST_DEBUG
+        printk("[B] bcast_timer: hw_mng_used[%d] HCI_TXQ_EMPTY[%d] bcast_queue_len[%d].....................\n",
+               sc->hw_mng_used, HCI_TXQ_EMPTY(sc->sh, 4), ssv6200_bcast_queue_len(&sc->bcast_txq));
+#endif
+        if(sc->hw_mng_used != 0 ||
+            false == HCI_TXQ_EMPTY(sc->sh, 4)){
+#ifdef BCAST_DEBUG
+            printk("HW queue still have frames insdide. skip this one hw_mng_used[%d] bEmptyTXQ4[%d]\n",
+                sc->hw_mng_used, HCI_TXQ_EMPTY(sc->sh, 4));
+#endif
+            queue_block_cnt++;
+            if(queue_block_cnt>5){
+                queue_block_cnt = 0;
+                ssv6200_bcast_flush(sc, &sc->bcast_txq);
+                needtimer = false;
+            }
+            break;
+        }
+        queue_block_cnt = 0;
+        for(i=0;i<SSV6200_ID_MANAGER_QUEUE;i++){
+            skb = ssv6200_bcast_dequeue(&sc->bcast_txq, &remain_size);
+            if(!skb){
+                needtimer = false;
+                break;
+            }
+            if( (0 != remain_size) &&
+                (SSV6200_ID_MANAGER_QUEUE-1) != i ){
+                struct ieee80211_hdr *hdr;
+                struct ssv6200_tx_desc *tx_desc = (struct ssv6200_tx_desc *)skb->data;
+                hdr = (struct ieee80211_hdr *) ((u8*)tx_desc+tx_desc->hdr_offset);
+                hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
+            }
+#ifdef BCAST_DEBUG
+            printk("[B] bcast_timer:tx remain_size[%d] i[%d]\n", remain_size, i);
+#endif
+   spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+            if(HCI_SEND(sc->sh, skb, 4)<0){
+                printk("bcast_timer send fail!!!!!!! \n");
+                ssv6xxx_txbuf_free_skb(skb, (void*)sc);
+                BUG_ON(1);
+            }
+   spin_lock_irqsave(&sc->ps_state_lock, flags);
+        }
+    }while(0);
+    if(needtimer){
+#ifdef BCAST_DEBUG
+        printk("[B] bcast_timer:need more timer to tx bcast frame time[%d]\n", sc->bcast_interval);
+#endif
+        queue_delayed_work(sc->config_wq,
+       &sc->bcast_tx_work,
+       tmo);
+    }
+    else{
+#ifdef BCAST_DEBUG
+       printk("[B] bcast_timer: ssv6200_bcast_stop\n");
+#endif
+       ssv6200_bcast_stop(sc);
+    }
+    spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+#ifdef BCAST_DEBUG
+    printk("[B] bcast_timer: leave.....................\n");
+#endif
+}
+void ssv6200_bcast_start_work(struct work_struct *work)
+{
+ struct ssv_softc *sc =
+  container_of(work, struct ssv_softc, bcast_start_work);
+#ifdef BCAST_DEBUG
+    printk("[B] ssv6200_bcast_start_work==\n");
+#endif
+    sc->bcast_interval = (sc->beacon_dtim_cnt+1) *
+   (sc->beacon_interval + 20) * HZ / 1000;
+ if (!sc->aid0_bit_set) {
+  sc->aid0_bit_set = true;
+  ssv6xxx_beacon_change(sc, sc->hw,
+                        sc->ap_vif, sc->aid0_bit_set);
+        queue_delayed_work(sc->config_wq,
+       &sc->bcast_tx_work,
+       sc->bcast_interval);
+#ifdef BCAST_DEBUG
+        printk("[B] bcast_start_work: Modify timer to DTIM[%d]ms==\n",
+               (sc->beacon_dtim_cnt+1)*(sc->beacon_interval + 20));
+#endif
+ }
+}
+void ssv6200_bcast_stop_work(struct work_struct *work)
+{
+ struct ssv_softc *sc =
+  container_of(work, struct ssv_softc, bcast_stop_work.work);
+    long tmo = HZ / 100;
+#ifdef BCAST_DEBUG
+    printk("[B] ssv6200_bcast_stop_work\n");
+#endif
+ if (sc->aid0_bit_set) {
+        if(0== ssv6200_bcast_queue_len(&sc->bcast_txq)){
+            cancel_delayed_work_sync(&sc->bcast_tx_work);
+      sc->aid0_bit_set = false;
+      ssv6xxx_beacon_change(sc, sc->hw,
+                            sc->ap_vif, sc->aid0_bit_set);
+#ifdef BCAST_DEBUG
+            printk("remove group bit in DTIM\n");
+#endif
+        }
+        else{
+#ifdef BCAST_DEBUG
+            printk("bcast_stop_work: bcast queue still have data. just modify timer to 10ms\n");
+#endif
+            queue_delayed_work(sc->config_wq,
+       &sc->bcast_tx_work,
+       tmo);
+        }
+ }
+}
+void ssv6200_bcast_stop(struct ssv_softc *sc)
+{
+    queue_delayed_work(sc->config_wq,
+         &sc->bcast_stop_work, sc->beacon_interval*HZ/1024);
+}
+void ssv6200_bcast_start(struct ssv_softc *sc)
+{
+    queue_work(sc->config_wq, &sc->bcast_start_work);
+}
+void ssv6200_release_bcast_frame_res(struct ssv_softc *sc, struct ieee80211_vif *vif)
+{
+    unsigned long flags;
+    struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    spin_lock_irqsave(&sc->ps_state_lock, flags);
+    priv_vif->sta_asleep_mask = 0;
+    spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+    cancel_work_sync(&sc->bcast_start_work);
+    cancel_delayed_work_sync(&sc->bcast_stop_work);
+    ssv6200_bcast_flush(sc, &sc->bcast_txq);
+    cancel_delayed_work_sync(&sc->bcast_tx_work);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.h
new file mode 100644
index 0000000000000..fd713f20a89d2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ap.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _AP_H_
+#define _AP_H_ 
+#define BEACON_WAITING_ENABLED 1<<0
+#define BEACON_ENABLED 1<<1
+void ssv6xxx_beacon_change(struct ssv_softc *sc, struct ieee80211_hw *hw, struct ieee80211_vif *vif, bool aid0_bit_set);
+void ssv6xxx_beacon_set_info(struct ssv_softc *sc, u8 beacon_interval, u8 dtim_cnt);
+bool ssv6xxx_beacon_enable(struct ssv_softc *sc, bool bEnable);
+void ssv6xxx_beacon_release(struct ssv_softc *sc);
+void ssv6200_set_tim_work(struct work_struct *work);
+void ssv6200_bcast_start_work(struct work_struct *work);
+void ssv6200_bcast_stop_work(struct work_struct *work);
+void ssv6200_bcast_tx_work(struct work_struct *work);
+int ssv6200_bcast_queue_len(struct ssv6xxx_bcast_txq *bcast_txq);
+struct sk_buff* ssv6200_bcast_dequeue(struct ssv6xxx_bcast_txq *bcast_txq, u8 *remain_len);
+int ssv6200_bcast_enqueue(struct ssv_softc *sc, struct ssv6xxx_bcast_txq *bcast_txq, struct sk_buff *skb);
+void ssv6200_bcast_start(struct ssv_softc *sc);
+void ssv6200_bcast_stop(struct ssv_softc *sc);
+void ssv6200_release_bcast_frame_res(struct ssv_softc *sc, struct ieee80211_vif *vif);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
new file mode 100644
index 0000000000000..a063928f79e11
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
@@ -0,0 +1,5467 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/nl80211.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/time.h>
+#include <linux/kthread.h>
+#include <linux/ktime.h>
+
+#include <net/mac80211.h>
+#include <ssv6200.h>
+#include <hci/hctrl.h>
+#include "linux_80211.h"
+#include "lib.h"
+#include "ssv_rc.h"
+#include "ssv_ht_rc.h"
+#include "dev.h"
+#include "ap.h"
+#include "init.h"
+#include "p2p.h"
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#include "ssv_pm.h"
+#endif
+#ifdef MULTI_THREAD_ENCRYPT
+#include <linux/freezer.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+#include "linux_3_0_0.h"
+#endif
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+#include "ssv6xxx_debugfs.h"
+#endif
+#ifdef CONFIG_SSV_RSSI
+struct rssi_res_st rssi_res, *p_rssi_res;
+#endif
+#define NO_USE_RXQ_LOCK 
+#ifndef WLAN_CIPHER_SUITE_SMS4
+#define WLAN_CIPHER_SUITE_SMS4 0x00147201
+#endif
+#ifdef ENABLE_TX_Q_FLOW_CONTROL
+#ifdef MULTI_THREAD_ENCRYPT
+#define MAX_CRYPTO_Q_LEN (64)
+#define LOW_CRYPTO_Q_LEN (MAX_CRYPTO_Q_LEN/2)
+#endif
+#define MAX_TX_Q_LEN (64)
+#define LOW_TX_Q_LEN (MAX_TX_Q_LEN/2)
+#endif
+static u16 bits_per_symbol[][2] =
+{
+    { 26, 54 },
+    { 52, 108 },
+    { 78, 162 },
+    { 104, 216 },
+    { 156, 324 },
+    { 208, 432 },
+    { 234, 486 },
+    { 260, 540 },
+};
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+extern struct ssv6xxx_hci_ctrl *ssv_dbg_ctrl_hci;
+extern unsigned int cal_duration_of_ampdu(struct sk_buff *ampdu_skb, int stage);
+#endif
+struct ssv6xxx_calib_table {
+    u16 channel_id;
+    u32 rf_ctrl_N;
+    u32 rf_ctrl_F;
+    u16 rf_precision_default;
+};
+static void _process_rx_q (struct ssv_softc *sc, struct sk_buff_head *rx_q, spinlock_t *rx_q_lock);
+static u32 _process_tx_done (struct ssv_softc *sc);
+#ifdef MULTI_THREAD_ENCRYPT
+static u32 _remove_sta_skb_from_q (struct ssv_softc *sc, struct sk_buff_head *q,
+                                   u32 addr0_3, u32 addr4_5);
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+unsigned int cal_duration_of_mpdu(struct sk_buff *mpdu_skb)
+{
+ unsigned int timeout;
+ SKB_info *mpdu_skb_info = (SKB_info *)mpdu_skb->head;
+ timeout = (unsigned int)ktime_to_ms(ktime_sub(ktime_get(), mpdu_skb_info->timestamp));
+ if (timeout > SKB_DURATION_TIMEOUT_MS)
+  printk("*mpdu_duration: %ums\n", timeout);
+ return timeout;
+}
+#endif
+unsigned int skb_queue_len_safe(struct sk_buff_head *list)
+{
+    unsigned long flags;
+    unsigned int ret = 0;
+    spin_lock_irqsave(&list->lock, flags);
+    ret = skb_queue_len(list);
+    spin_unlock_irqrestore(&list->lock, flags);
+    return ret;
+}
+#endif
+#if 1
+void _ssv6xxx_hexdump(const char *title, const u8 *buf,
+                             size_t len)
+{
+    size_t i;
+    printk("%s - hexdump(len=%lu):\n", title, (unsigned long) len);
+    if (buf == NULL) {
+        printk(" [NULL]");
+    }else{
+        for (i = 0; i < len; i++){
+            printk(" %02x", buf[i]);
+            if((i+1)%16 ==0)
+                printk("\n");
+        }
+    }
+    printk("\n-----------------------------\n");
+}
+#endif
+void ssv6xxx_txbuf_free_skb(struct sk_buff *skb, void *args)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
+    struct ssv_softc *sc = (struct ssv_softc *)args;
+#endif
+    if (!skb)
+        return;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
+    ieee80211_free_txskb(sc->hw, skb);
+#else
+    dev_kfree_skb_any(skb);
+#endif
+}
+#define ADDRESS_OFFSET 16
+#define HW_ID_OFFSET 7
+#define CH0_FULL_MASK CH0_FULL_MSK
+#define MAX_FAIL_COUNT 100
+#define MAX_RETRY_COUNT 20
+inline bool ssv6xxx_mcu_input_full(struct ssv_softc *sc)
+{
+    u32 regval=0;
+    SMAC_REG_READ(sc->sh, ADR_MCU_STATUS, &regval);
+    return CH0_FULL_MASK&regval;
+}
+u32 ssv6xxx_pbuf_alloc(struct ssv_softc *sc, int size, int type)
+{
+    u32 regval, pad;
+    int cnt = MAX_RETRY_COUNT;
+    int page_cnt = (size + ((1 << HW_MMU_PAGE_SHIFT) - 1)) >> HW_MMU_PAGE_SHIFT;
+    regval = 0;
+    mutex_lock(&sc->mem_mutex);
+    pad = size%4;
+    size += pad;
+    do{
+        SMAC_REG_WRITE(sc->sh, ADR_WR_ALC, (size | (type << 16)));
+        SMAC_REG_READ(sc->sh, ADR_WR_ALC, &regval);
+        if (regval == 0) {
+            cnt--;
+            msleep(1);
+        }
+        else
+            break;
+    } while (cnt);
+    if (type == TX_BUF)
+    {
+        sc->sh->tx_page_available -= page_cnt;
+        sc->sh->page_count[PACKET_ADDR_2_ID(regval)] = page_cnt;
+    }
+    mutex_unlock(&sc->mem_mutex);
+    if (regval == 0)
+        dev_err(sc->dev, "Failed to allocate packet buffer of %d bytes in %d type.",
+                size, type);
+    else
+    {
+        dev_info(sc->dev, "Allocated %d type packet buffer of size %d (%d) at address %x.\n",
+                 type, size, page_cnt, regval);
+    }
+    return regval;
+}
+bool ssv6xxx_pbuf_free(struct ssv_softc *sc, u32 pbuf_addr)
+{
+    u32 regval=0;
+    u16 failCount=0;
+    u8 *p_tx_page_cnt = &sc->sh->page_count[PACKET_ADDR_2_ID(pbuf_addr)];
+    while (ssv6xxx_mcu_input_full(sc))
+    {
+        if (failCount++ < 1000) continue;
+            printk("=============>ERROR!!MAILBOX Block[%d]\n", failCount);
+            return false;
+    }
+    mutex_lock(&sc->mem_mutex);
+    regval = ((M_ENG_TRASH_CAN << HW_ID_OFFSET) |(pbuf_addr >> ADDRESS_OFFSET));
+    printk("[A] ssv6xxx_pbuf_free addr[%08x][%x]\n", pbuf_addr, regval);
+    SMAC_REG_WRITE(sc->sh, ADR_CH0_TRIG_1, regval);
+    if (*p_tx_page_cnt)
+    {
+        sc->sh->tx_page_available += *p_tx_page_cnt;
+        *p_tx_page_cnt = 0;
+    }
+    mutex_unlock(&sc->mem_mutex);
+    return true;
+}
+#ifdef CONFIG_SSV_CABRIO_A
+static const struct ssv6xxx_calib_table vt_tbl[] =
+{
+    { 1, 0xf1, 0x333333, 3859},
+    { 2, 0xf1, 0xB33333, 3867},
+    { 3, 0xf2, 0x333333, 3875},
+    { 4, 0xf2, 0xB33333, 3883},
+    { 5, 0xf3, 0x333333, 3891},
+    { 6, 0xf3, 0xB33333, 3899},
+    { 7, 0xf4, 0x333333, 3907},
+    { 8, 0xf4, 0xB33333, 3915},
+    { 9, 0xf5, 0x333333, 3923},
+    { 10, 0xf5, 0xB33333, 3931},
+    { 11, 0xf6, 0x333333, 3939},
+    { 12, 0xf6, 0xB33333, 3947},
+    { 13, 0xf7, 0x333333, 3955},
+    { 14, 0xf8, 0x666666, 3974},
+};
+int ssv6xxx_set_channel(struct ssv_softc *sc, int ch)
+{
+    int retry_cnt, fail_cnt=0;
+    struct ssv_hw *sh=sc->sh;
+    u32 regval;
+    int ret = 0;
+    int chidx;
+    bool chidx_vld = 0;
+    for(chidx = 0; chidx < (sizeof(vt_tbl)/sizeof(vt_tbl[0])); chidx++) {
+        if (vt_tbl[chidx].channel_id == ch) {
+            chidx_vld = 1;
+            break;
+        }
+    }
+    if (chidx_vld == 0) {
+        printk("%s(): fail! channel_id not found in vt_tbl\n", __FUNCTION__);
+        return -1;
+    }
+    do {
+        if ((ret = SMAC_REG_READ(sh, ADR_SPI_TO_PHY_PARAM1, &regval)) != 0) break;
+        if ((ret = SMAC_REG_WRITE(sh,ADR_SPI_TO_PHY_PARAM1,(regval&~0xffff)|3)) != 0) break;
+        ssv6xxx_rf_disable(sc->sh);
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_CBR_SYN_DIV_SDM_XOSC,
+            (0x01<<13), (0x01<<13))) != 0) break;
+        regval = vt_tbl[chidx].rf_ctrl_F;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_CBR_SYN_RGISTER_1,
+            (regval << 0), 0x00ffffff)) != 0) break;
+        regval = vt_tbl[chidx].rf_ctrl_N;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SYN_RGISTER_2,
+            (regval<<0), 0x000007ff)) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_MANUAL_REGISTER,
+            (64<<1), (0x000007f<<1))) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_MANUAL_REGISTER,
+            (1<<0), 0x00000001)) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_MANUAL_REGISTER,
+            (0<<0), 0x00000001)) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SX_ENABLE_RGISTER,
+            (1<<11), 0x00000800)) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SX_ENABLE_RGISTER,
+            (0<<12), 0x00001000)) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SX_ENABLE_RGISTER,
+            (1<<12), 0x00001000)) != 0) break;
+        for(retry_cnt=20; retry_cnt>0; retry_cnt--)
+        {
+            mdelay(20);
+            if ((ret = SMAC_REG_READ(sh, ADR_CBR_READ_ONLY_FLAGS_1, &regval)) != 0) break;
+            if (regval & 0x00000004)
+            {
+                if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SX_ENABLE_RGISTER,
+                (0<<12), 0x00001000)) != 0) break;
+                if ((ret = SMAC_REG_READ(sh, ADR_CBR_READ_ONLY_FLAGS_1, &regval)) != 0) break;
+                if ((regval & 0x00001800) == 0)
+                {
+                    ssv6xxx_rf_enable(sh);
+                    return 0;
+                }
+                else
+                {
+                    printk("%s(): Lock channel %d fail!\n", __FUNCTION__, vt_tbl[chidx].channel_id);
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_READ_ONLY_FLAGS_1, &regval)) != 0) break;
+                    printk("%s(): dbg: vt-mon read out as %d when rdy\n", __FUNCTION__, ((regval & 0x00001800) >> 11));
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_READ_ONLY_FLAGS_2, &regval)) != 0) break;
+                    printk("%s(): dbg: sub-sel read out as %d when rdy\n", __FUNCTION__, ((regval & 0x00000fe0) >> 5));
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_SYN_DIV_SDM_XOSC, &regval)) != 0) break;
+                    printk("%s(): dbg: RG_SX_REFBYTWO read out as %d when rdy\n", __FUNCTION__, ((regval & 0x00002000) >> 13));
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_SYN_RGISTER_1, &regval)) != 0) break;
+                    printk("%s(): dbg: RG_SX_RFCTRL_F read out as 0x%08x when rdy\n", __FUNCTION__, ((regval & 0x00ffffff) >> 0));
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_SYN_RGISTER_2, &regval)) != 0) break;
+                    printk("%s(): dbg: RG_SX_RFCTRL_CH read out as 0x%08x when rdy\n", __FUNCTION__, ((regval & 0x000007ff) >> 0));
+                    if ((ret = SMAC_REG_READ(sh, ADR_CBR_SX_ENABLE_RGISTER, &regval)) != 0) break;
+                    printk("%s(): dbg: RG_EN_SX_VT_MON_DG read out as %d when rdy\n", __FUNCTION__, ((regval & 0x00001000) >> 12));
+                }
+            }
+        }
+        fail_cnt++;
+        printk("%s(): calibration fail [%d] rounds!!\n",
+                __FUNCTION__, fail_cnt);
+        if(fail_cnt == 100)
+            return -1;
+    } while(ret == 0);
+    return ret;
+}
+#endif
+#ifdef CONFIG_SSV_CABRIO_E
+static const struct ssv6xxx_calib_table vt_tbl[SSV6XXX_IQK_CFG_XTAL_MAX][14]=
+{
+    {
+        { 1, 0xB9, 0x89D89E, 3859},
+        { 2, 0xB9, 0xEC4EC5, 3867},
+        { 3, 0xBA, 0x4EC4EC, 3875},
+        { 4, 0xBA, 0xB13B14, 3883},
+        { 5, 0xBB, 0x13B13B, 3891},
+        { 6, 0xBB, 0x762762, 3899},
+        { 7, 0xBB, 0xD89D8A, 3907},
+        { 8, 0xBC, 0x3B13B1, 3915},
+        { 9, 0xBC, 0x9D89D9, 3923},
+        { 10, 0xBD, 0x000000, 3931},
+        { 11, 0xBD, 0x627627, 3939},
+        { 12, 0xBD, 0xC4EC4F, 3947},
+        { 13, 0xBE, 0x276276, 3955},
+        { 14, 0xBF, 0x13B13B, 3974},
+    },
+    {
+        { 1, 0xf1, 0x333333, 3859},
+        { 2, 0xf1, 0xB33333, 3867},
+        { 3, 0xf2, 0x333333, 3875},
+        { 4, 0xf2, 0xB33333, 3883},
+        { 5, 0xf3, 0x333333, 3891},
+        { 6, 0xf3, 0xB33333, 3899},
+        { 7, 0xf4, 0x333333, 3907},
+        { 8, 0xf4, 0xB33333, 3915},
+        { 9, 0xf5, 0x333333, 3923},
+        { 10, 0xf5, 0xB33333, 3931},
+        { 11, 0xf6, 0x333333, 3939},
+        { 12, 0xf6, 0xB33333, 3947},
+        { 13, 0xf7, 0x333333, 3955},
+        { 14, 0xf8, 0x666666, 3974},
+    },
+    {
+        { 1, 0xC9, 0x000000, 3859},
+        { 2, 0xC9, 0x6AAAAB, 3867},
+        { 3, 0xC9, 0xD55555, 3875},
+        { 4, 0xCA, 0x400000, 3883},
+        { 5, 0xCA, 0xAAAAAB, 3891},
+        { 6, 0xCB, 0x155555, 3899},
+        { 7, 0xCB, 0x800000, 3907},
+        { 8, 0xCB, 0xEAAAAB, 3915},
+        { 9, 0xCC, 0x555555, 3923},
+        { 10, 0xCC, 0xC00000, 3931},
+        { 11, 0xCD, 0x2AAAAB, 3939},
+        { 12, 0xCD, 0x955555, 3947},
+        { 13, 0xCE, 0x000000, 3955},
+        { 14, 0xCF, 0x000000, 3974},
+    }
+};
+#define FAIL_MAX 100
+#define RETRY_MAX 20
+int ssv6xxx_set_channel(struct ssv_softc *sc, int ch)
+{
+    struct ssv_hw *sh=sc->sh;
+    int retry_cnt, fail_cnt=0;
+    u32 regval;
+    int ret = -1;
+    int chidx;
+    bool chidx_vld = 0;
+    dev_dbg(sc->dev, "Setting channel to %d\n", ch);
+    if((sh->cfg.chip_identity == SSV6051Z) || (sc->sh->cfg.chip_identity == SSV6051P))
+    {
+        if((ch == 13) || (ch == 14))
+        {
+            if(sh->ipd_channel_touch == 0)
+            {
+                for (chidx = 0; chidx < sh->ch_cfg_size; chidx++)
+                {
+                    SMAC_REG_WRITE(sh, sh->p_ch_cfg[chidx].reg_addr, sh->p_ch_cfg[chidx].ch13_14_value);
+                }
+                sh->ipd_channel_touch = 1;
+            }
+        }
+        else
+        {
+            if(sh->ipd_channel_touch)
+            {
+                for (chidx = 0; chidx < sh->ch_cfg_size; chidx++)
+                {
+                    SMAC_REG_WRITE(sh, sh->p_ch_cfg[chidx].reg_addr, sh->p_ch_cfg[chidx].ch1_12_value);
+                }
+                sh->ipd_channel_touch = 0;
+            }
+        }
+    }
+    for(chidx = 0; chidx < 14; chidx++) {
+        if (vt_tbl[sh->cfg.crystal_type][chidx].channel_id == ch) {
+            chidx_vld = 1;
+            break;
+        }
+    }
+    if (chidx_vld == 0) {
+        dev_dbg(sc->dev, "%s(): fail! channel_id not found in vt_tbl\n", __FUNCTION__);
+        goto exit;
+    }
+    if ((ret = ssv6xxx_rf_disable(sc->sh)) != 0)
+        goto exit;
+    do {
+        if((sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_26M) || (sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_24M))
+        {
+            if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SYN_DIV_SDM_XOSC,
+                (0x00<<13), (0x01<<13))) != 0) break;
+        }
+        else if(sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_40M)
+        {
+            if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SYN_DIV_SDM_XOSC,
+                (0x01<<13), (0x01<<13))) != 0) break;
+        }
+        else
+        {
+            printk("Illegal xtal setting -- ssv6xxx_set_channel\n");
+            BUG_ON(1);
+        }
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SX_LCK_BIN_REGISTERS_I,
+            (0x01<<19), (0x01<<19))) != 0) break;
+        regval = vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_F;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SYN_REGISTER_1,
+            (regval<<0), (0x00ffffff<<0))) != 0) break;
+        regval = vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_N;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SYN_REGISTER_2,
+            (regval<<0), (0x07ff<<0))) != 0) break;
+        if ((ret = SMAC_REG_READ(sc->sh, ADR_SX_LCK_BIN_REGISTERS_I, &regval)) != 0) break;
+        regval = vt_tbl[sh->cfg.crystal_type][chidx].rf_precision_default;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_SX_LCK_BIN_REGISTERS_II,
+            (regval<<0), (0x1fff<<0))) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_MANUAL_ENABLE_REGISTER,
+            (0x00<<14), (0x01<<14))) != 0) break;
+        if ((ret = SMAC_REG_SET_BITS(sc->sh, ADR_MANUAL_ENABLE_REGISTER,
+            (0x01<<14), (0x01<<14))) != 0) break;
+        retry_cnt = 0;
+        do
+        {
+            mdelay(1);
+            if ((ret = SMAC_REG_READ(sc->sh, ADR_READ_ONLY_FLAGS_1, &regval)) != 0) break;
+            if (regval & 0x00000002)
+            {
+                if ((ret = SMAC_REG_READ(sc->sh, ADR_READ_ONLY_FLAGS_2, &regval)) != 0) break;
+                ret = ssv6xxx_rf_enable(sc->sh);
+#if 0
+                printk("Lock to channel %d ([0xce010098]=%x)!!\n", vt_tbl[sh->cfg.crystal_type][chidx].channel_id, regval);
+                printk("crystal_type [%d]\n",sh->cfg.crystal_type);
+                SMAC_REG_READ(sc->sh, 0xce010040, &regval);
+                printk("0xce010040 [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, 0xce0100a4, &regval);
+                printk("0xce0100a4 [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, ADR_DPLL_DIVIDER_REGISTER, &regval);
+                printk("0xce010060 [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, ADR_SX_ENABLE_REGISTER, &regval);
+                printk("0xce010038 [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, 0xce01003C, &regval);
+                printk("0xce01003C [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, ADR_DPLL_FB_DIVIDER_REGISTERS_I, &regval);
+                printk("0xce01009c [%x]\n",regval);
+                SMAC_REG_READ(sc->sh, ADR_DPLL_FB_DIVIDER_REGISTERS_II, &regval);
+                printk("0xce0100a0 [%x]\n",regval);
+                printk("[%x][%x][%x]\n",vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_N,vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_F,vt_tbl[sh->cfg.crystal_type][chidx].rf_precision_default);
+#endif
+                dev_info(sc->dev, "Lock to channel %d ([0xce010098]=%x)!!\n", vt_tbl[sh->cfg.crystal_type][chidx].channel_id, regval);
+                sc->hw_chan = ch;
+                goto exit;
+            }
+            retry_cnt++;
+        }
+        while(retry_cnt < RETRY_MAX);
+        fail_cnt++;
+        printk("calibation fail:[%d]\n", fail_cnt);
+    }
+    while((fail_cnt < FAIL_MAX) && (ret == 0));
+exit:
+ if (ch == 14 && regval == 0xff0) {
+        SMAC_IFC_RESET(sc->sh);
+        ssv6xxx_restart_hw(sc);
+    }
+    if(ch <= 7)
+    {
+        if(sh->cfg.tx_power_index_1)
+        {
+            SMAC_REG_READ(sc->sh, ADR_RX_TX_FSM_REGISTER, &regval);
+            regval &= RG_TX_GAIN_OFFSET_I_MSK;
+            regval |= (sh->cfg.tx_power_index_1 << RG_TX_GAIN_OFFSET_SFT);
+            SMAC_REG_WRITE(sc->sh, ADR_RX_TX_FSM_REGISTER, regval);
+        }
+        else if(sh->cfg.tx_power_index_2)
+        {
+            SMAC_REG_READ(sc->sh, ADR_RX_TX_FSM_REGISTER, &regval);
+            regval &= RG_TX_GAIN_OFFSET_I_MSK;
+            SMAC_REG_WRITE(sc->sh, ADR_RX_TX_FSM_REGISTER, regval);
+        }
+    }
+    else
+    {
+        if(sh->cfg.tx_power_index_2)
+        {
+            SMAC_REG_READ(sc->sh, ADR_RX_TX_FSM_REGISTER, &regval);
+            regval &= RG_TX_GAIN_OFFSET_I_MSK;
+            regval |= (sh->cfg.tx_power_index_2 << RG_TX_GAIN_OFFSET_SFT);
+            SMAC_REG_WRITE(sc->sh, ADR_RX_TX_FSM_REGISTER, regval);
+        }
+        else if(sh->cfg.tx_power_index_1)
+        {
+            SMAC_REG_READ(sc->sh, ADR_RX_TX_FSM_REGISTER, &regval);
+            regval &= RG_TX_GAIN_OFFSET_I_MSK;
+            SMAC_REG_WRITE(sc->sh, ADR_RX_TX_FSM_REGISTER, regval);
+        }
+    }
+    return ret;
+}
+#ifdef CONFIG_SSV_SMARTLINK
+int ssv6xxx_get_channel(struct ssv_softc *sc, int *pch)
+{
+    *pch = sc->hw_chan;
+    return 0;
+}
+int ssv6xxx_set_promisc(struct ssv_softc *sc, int accept)
+{
+    u32 val=0;
+    if (accept)
+    {
+        val = 0x2;
+    }
+    else
+    {
+        val = 0x3;
+    }
+    SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_TB13, val);
+    return 0;
+}
+int ssv6xxx_get_promisc(struct ssv_softc *sc, int *paccept)
+{
+    u32 val=0;
+    SMAC_REG_READ(sc->sh, ADR_MRX_FLT_TB13, &val);
+    if (val == 0x2)
+    {
+        *paccept = 1;
+    }
+    else
+    {
+        *paccept = 0;
+    }
+    return 0;
+}
+#endif
+#endif
+int ssv6xxx_rf_enable(struct ssv_hw *sh)
+{
+    return SMAC_REG_SET_BITS(sh,
+        0xce010000,
+        (0x02<<12), (0x03<<12)
+    );
+}
+int ssv6xxx_rf_disable(struct ssv_hw *sh)
+{
+    return SMAC_REG_SET_BITS(sh,
+        0xce010000,
+        (0x01<<12), (0x03<<12)
+    );
+}
+int ssv6xxx_update_decision_table(struct ssv_softc *sc)
+{
+    int i;
+    for(i=0; i<MAC_DECITBL1_SIZE; i++) {
+        SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_TB0+i*4,
+        sc->mac_deci_tbl[i]);
+        SMAC_REG_CONFIRM(sc->sh, ADR_MRX_FLT_TB0+i*4,
+        sc->mac_deci_tbl[i]);
+    }
+    for(i=0; i<MAC_DECITBL2_SIZE; i++) {
+        SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_EN0+i*4,
+        sc->mac_deci_tbl[i+MAC_DECITBL1_SIZE]);
+        SMAC_REG_CONFIRM(sc->sh, ADR_MRX_FLT_EN0+i*4,
+        sc->mac_deci_tbl[i+MAC_DECITBL1_SIZE]);
+    }
+    return 0;
+}
+static int ssv6xxx_frame_hdrlen(struct ieee80211_hdr *hdr, bool is_ht)
+{
+    #define CTRL_FRAME_INDEX(fc) ((hdr->frame_control-IEEE80211_STYPE_BACK_REQ)>>4)
+    u16 fc, CTRL_FLEN[]= { 16, 16, 16, 16, 10, 10, 16, 16 };
+    int hdr_len = 24;
+    fc = hdr->frame_control;
+    if (ieee80211_is_ctl(fc))
+        hdr_len = CTRL_FLEN[CTRL_FRAME_INDEX(fc)];
+    else if (ieee80211_is_mgmt(fc)) {
+        if (ieee80211_has_order(fc))
+            hdr_len += ((is_ht==1)? 4: 0);
+    }
+    else {
+        if (ieee80211_has_a4(fc))
+            hdr_len += 6;
+        if (ieee80211_is_data_qos(fc)) {
+            hdr_len += 2;
+            if (ieee80211_has_order(hdr->frame_control) &&
+                is_ht==true)
+                hdr_len += 4;
+        }
+    }
+    return hdr_len;
+}
+#if 0
+static void ssv6xxx_dump_tx_desc(struct sk_buff *skb)
+{
+    struct ssv6200_tx_desc *tx_desc;
+    int s;
+    u8 *dat;
+    tx_desc = (struct ssv6200_tx_desc *)skb->data;
+    printk(">> Tx Frame:\n");
+    for(s=0, dat=skb->data; s<tx_desc->hdr_len; s++) {
+        printk("%02x ", dat[sizeof(*tx_desc)+s]);
+        if (((s+1)& 0x0F) == 0)
+            printk("\n");
+    }
+    printk("length: %d, c_type=%d, f80211=%d, qos=%d, ht=%d, use_4addr=%d, sec=%d\n",
+        tx_desc->len, tx_desc->c_type, tx_desc->f80211, tx_desc->qos, tx_desc->ht,
+        tx_desc->use_4addr, tx_desc->security);
+    printk("more_data=%d, sub_type=%x, extra_info=%d\n", tx_desc->more_data,
+        tx_desc->stype_b5b4, tx_desc->extra_info);
+    printk("fcmd=0x%08x, hdr_offset=%d, frag=%d, unicast=%d, hdr_len=%d\n",
+        tx_desc->fCmd, tx_desc->hdr_offset, tx_desc->frag, tx_desc->unicast,
+        tx_desc->hdr_len);
+    printk("tx_burst=%d, ack_policy=%d, do_rts_cts=%d, reason=%d, payload_offset=%d\n",
+        tx_desc->tx_burst, tx_desc->ack_policy, tx_desc->do_rts_cts,
+        tx_desc->reason, tx_desc->payload_offset);
+    printk("fcmdidx=%d, wsid=%d, txq_idx=%d\n",
+         tx_desc->fCmdIdx, tx_desc->wsid, tx_desc->txq_idx);
+    printk("RTS/CTS Nav=%d, frame_time=%d, crate_idx=%d, drate_idx=%d, dl_len=%d\n",
+        tx_desc->rts_cts_nav, tx_desc->frame_consume_time, tx_desc->crate_idx, tx_desc->drate_idx,
+        tx_desc->dl_length);
+}
+static void ssv6xxx_dump_rx_desc(struct sk_buff *skb)
+{
+    struct ssv6200_rx_desc *rx_desc;
+    rx_desc = (struct ssv6200_rx_desc *)skb->data;
+    printk(">> RX Descriptor:\n");
+    printk("len=%d, c_type=%d, f80211=%d, qos=%d, ht=%d, use_4addr=%d, l3cs_err=%d, l4_cs_err=%d\n",
+        rx_desc->len, rx_desc->c_type, rx_desc->f80211, rx_desc->qos, rx_desc->ht, rx_desc->use_4addr,
+        rx_desc->l3cs_err, rx_desc->l4cs_err);
+    printk("align2=%d, psm=%d, stype_b5b4=%d, extra_info=%d\n",
+        rx_desc->align2, rx_desc->psm, rx_desc->stype_b5b4, rx_desc->extra_info);
+    printk("hdr_offset=%d, reason=%d, rx_result=%d\n", rx_desc->hdr_offset,
+        rx_desc->reason, rx_desc->RxResult);
+}
+#endif
+static u32 ssv6xxx_ht_txtime(u8 rix, int pktlen, int width,
+                int half_gi, bool is_gf)
+{
+    u32 nbits, nsymbits, duration, nsymbols;
+    int streams;
+    streams = 1;
+    nbits = (pktlen << 3) + OFDM_PLCP_BITS;
+    nsymbits = bits_per_symbol[rix % 8][width] * streams;
+    nsymbols = (nbits + nsymbits - 1) / nsymbits;
+    if (!half_gi)
+        duration = SYMBOL_TIME(nsymbols);
+    else
+    {
+        if (!is_gf)
+            duration = DIV_ROUND_UP(SYMBOL_TIME_HALFGI(nsymbols), 4)<<2;
+        else
+        duration = SYMBOL_TIME_HALFGI(nsymbols);
+    }
+    duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams)+HT_SIGNAL_EXT;
+    if (is_gf)
+        duration -=12;
+    duration += HT_SIFS_TIME;
+    return duration;
+}
+static u32 ssv6xxx_non_ht_txtime(u8 phy, int kbps,
+                                 u32 frameLen, bool shortPreamble)
+{
+    u32 bits_per_symbol, num_bits, num_symbols;
+    u32 phy_time, tx_time;
+    if (kbps == 0)
+        return 0;
+    switch (phy) {
+    case WLAN_RC_PHY_CCK:
+        phy_time = CCK_PREAMBLE_BITS + CCK_PLCP_BITS;
+        if (shortPreamble)
+            phy_time >>= 1;
+        num_bits = frameLen << 3;
+        tx_time = CCK_SIFS_TIME + phy_time + ((num_bits * 1000) / kbps);
+        break;
+    case WLAN_RC_PHY_OFDM:
+        bits_per_symbol = (kbps * OFDM_SYMBOL_TIME) / 1000;
+        num_bits = OFDM_PLCP_BITS + (frameLen << 3);
+        num_symbols = DIV_ROUND_UP(num_bits, bits_per_symbol);
+        tx_time = OFDM_SIFS_TIME + OFDM_PREAMBLE_TIME
+            + (num_symbols * OFDM_SYMBOL_TIME);
+        break;
+    default:
+        printk("Unknown phy %u\n", phy);
+                BUG_ON(1);
+        tx_time = 0;
+        break;
+    }
+    return tx_time;
+}
+static u32 ssv6xxx_set_frame_duration(struct ieee80211_tx_info *info,
+            struct ssv_rate_info *ssv_rate, u16 len,
+            struct ssv6200_tx_desc *tx_desc, struct fw_rc_retry_params *rc_params,
+            struct ssv_softc *sc)
+{
+    struct ieee80211_tx_rate *tx_drate;
+    u32 frame_time=0, ack_time=0, rts_cts_nav=0, frame_consume_time=0;
+    u32 l_length=0, drate_kbps=0, crate_kbps=0;
+    bool ctrl_short_preamble=false, is_sgi, is_ht40;
+    bool is_ht, is_gf;
+    int d_phy ,c_phy, nRCParams, mcsidx;
+    struct ssv_rate_ctrl *ssv_rc = NULL;
+    tx_drate = &info->control.rates[0];
+ is_sgi = !!(tx_drate->flags & IEEE80211_TX_RC_SHORT_GI);
+ is_ht40 = !!(tx_drate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
+    is_ht = !!(tx_drate->flags & IEEE80211_TX_RC_MCS);
+    is_gf = !!(tx_drate->flags & IEEE80211_TX_RC_GREEN_FIELD);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+ if ((info->control.short_preamble) ||
+  (tx_drate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
+  ctrl_short_preamble = true;
+#else
+    if ((info->control.vif &&
+        info->control.vif->bss_conf.use_short_preamble) ||
+  (tx_drate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
+        ctrl_short_preamble = true;
+#endif
+#ifdef FW_RC_RETRY_DEBUG
+    printk("mcs = %d, data rate idx=%d\n",tx_drate->idx, tx_drate[3].count);
+#endif
+    for (nRCParams = 0; (nRCParams < SSV62XX_TX_MAX_RATES) ; nRCParams++)
+    {
+        if ((rc_params == NULL) || (sc == NULL))
+        {
+            mcsidx = tx_drate->idx;
+            drate_kbps = ssv_rate->drate_kbps;
+            crate_kbps = ssv_rate->crate_kbps;
+        }
+        else
+        {
+            if(rc_params[nRCParams].count == 0)
+            {
+                break;
+            }
+            ssv_rc = sc->rc;
+            mcsidx = (rc_params[nRCParams].drate - SSV62XX_RATE_MCS_INDEX) % MCS_GROUP_RATES;
+            drate_kbps = ssv_rc->rc_table[rc_params[nRCParams].drate].rate_kbps;
+            crate_kbps = ssv_rc->rc_table[rc_params[nRCParams].crate].rate_kbps;
+        }
+        if (tx_drate->flags & IEEE80211_TX_RC_MCS) {
+            frame_time = ssv6xxx_ht_txtime(mcsidx,
+                    len, is_ht40, is_sgi, is_gf);
+            d_phy = 0;
+        }
+        else {
+            if ((info->band == INDEX_80211_BAND_2GHZ) &&
+                        !(ssv_rate->d_flags & IEEE80211_RATE_ERP_G))
+                            d_phy = WLAN_RC_PHY_CCK;
+                    else
+                            d_phy = WLAN_RC_PHY_OFDM;
+            frame_time = ssv6xxx_non_ht_txtime(d_phy, drate_kbps,
+                len, ctrl_short_preamble);
+        }
+        if ((info->band == INDEX_80211_BAND_2GHZ) &&
+                        !(ssv_rate->c_flags & IEEE80211_RATE_ERP_G))
+                            c_phy = WLAN_RC_PHY_CCK;
+                    else
+                            c_phy = WLAN_RC_PHY_OFDM;
+        if (tx_desc->unicast) {
+            if (info->flags & IEEE80211_TX_CTL_AMPDU){
+                ack_time = ssv6xxx_non_ht_txtime(c_phy,
+                    crate_kbps, BA_LEN, ctrl_short_preamble);
+            } else {
+                ack_time = ssv6xxx_non_ht_txtime(c_phy,
+                    crate_kbps, ACK_LEN, ctrl_short_preamble);
+            }
+        }
+        if (tx_desc->do_rts_cts & IEEE80211_TX_RC_USE_RTS_CTS) {
+            rts_cts_nav = frame_time;
+            rts_cts_nav += ack_time;
+            rts_cts_nav += ssv6xxx_non_ht_txtime(c_phy,
+                crate_kbps, CTS_LEN, ctrl_short_preamble);
+            frame_consume_time = rts_cts_nav;
+            frame_consume_time += ssv6xxx_non_ht_txtime(c_phy,
+                crate_kbps, RTS_LEN, ctrl_short_preamble);
+        }else if (tx_desc->do_rts_cts & IEEE80211_TX_RC_USE_CTS_PROTECT) {
+            rts_cts_nav = frame_time;
+            rts_cts_nav += ack_time;
+            frame_consume_time = rts_cts_nav;
+            frame_consume_time += ssv6xxx_non_ht_txtime(c_phy,
+                crate_kbps, CTS_LEN, ctrl_short_preamble);
+        }
+        else{;}
+        if (tx_drate->flags & IEEE80211_TX_RC_MCS) {
+            l_length = frame_time - HT_SIFS_TIME;
+            l_length = ((l_length-(HT_SIGNAL_EXT+20))+3)>>2;
+            l_length += ((l_length<<1) - 3);
+        }
+        if((rc_params == NULL) || (sc == NULL))
+        {
+            tx_desc->rts_cts_nav = rts_cts_nav;
+            tx_desc->frame_consume_time = (frame_consume_time>>5)+1;;
+            tx_desc->dl_length = l_length;
+            break;
+        }
+        else
+        {
+            rc_params[nRCParams].rts_cts_nav = rts_cts_nav;
+            rc_params[nRCParams].frame_consume_time = (frame_consume_time>>5)+1;
+            rc_params[nRCParams].dl_length = l_length;
+            if(nRCParams == 0)
+            {
+                tx_desc->drate_idx = rc_params[nRCParams].drate;
+                tx_desc->crate_idx = rc_params[nRCParams].crate;
+                tx_desc->rts_cts_nav = rc_params[nRCParams].rts_cts_nav;
+                tx_desc->frame_consume_time = rc_params[nRCParams].frame_consume_time;
+                tx_desc->dl_length = rc_params[nRCParams].dl_length;
+            }
+        }
+    }
+    return ack_time;
+}
+static void ssv6200_hw_set_pair_type(struct ssv_hw *sh,u8 type)
+{
+    u32 temp;
+    SMAC_REG_READ(sh,ADR_SCRT_SET,&temp);
+    temp = (temp & PAIR_SCRT_I_MSK);
+    temp |= (type << PAIR_SCRT_SFT);
+    SMAC_REG_WRITE(sh,ADR_SCRT_SET, temp);
+    printk("==>%s: write cipher type %d into hw\n",__func__,type);
+}
+static u32 ssv6200_hw_get_pair_type(struct ssv_hw *sh)
+{
+    u32 temp;
+    SMAC_REG_READ(sh,ADR_SCRT_SET,&temp);
+    temp &= PAIR_SCRT_MSK;
+    temp = (temp >> PAIR_SCRT_SFT);
+    SMAC_REG_WRITE(sh,ADR_SCRT_SET, temp);
+    printk("==>%s: read cipher type %d from hw\n",__func__, temp);
+    return temp;
+}
+static void ssv6200_hw_set_group_type(struct ssv_hw *sh,u8 type)
+{
+    u32 temp;
+    SMAC_REG_READ(sh,ADR_SCRT_SET,&temp);
+    temp = temp & GRP_SCRT_I_MSK;
+    temp |= (type << GRP_SCRT_SFT);
+    SMAC_REG_WRITE(sh,ADR_SCRT_SET, temp);
+    printk(KERN_ERR "Set group key type %d\n", type);
+}
+void ssv6xxx_reset_sec_module(struct ssv_softc *sc)
+{
+    ssv6200_hw_set_group_type(sc->sh, ME_NONE);
+    ssv6200_hw_set_pair_type(sc->sh, ME_NONE);
+}
+#ifdef FW_WSID_WATCH_LIST
+static int hw_update_watch_wsid(struct ssv_softc *sc, struct ieee80211_sta *sta,
+        struct ssv_sta_info *sta_info, int sta_idx, int rx_hw_sec, int ops)
+{
+    int ret = 0;
+    int retry_cnt=20;
+    struct sk_buff *skb = NULL;
+    struct cfg_host_cmd *host_cmd;
+    struct ssv6xxx_wsid_params *ptr;
+    printk("cmd=%d for fw wsid list, wsid %d \n", ops, sta_idx);
+    skb = ssv_skb_alloc(HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_wsid_params));
+    if(skb == NULL || sta_info == NULL || sc == NULL)
+        return -1;
+    skb->data_len = HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_wsid_params);
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_WSID_OP;
+    host_cmd->len = skb->data_len;
+    ptr = (struct ssv6xxx_wsid_params *)host_cmd->dat8;
+    ptr->cmd = ops;
+    ptr->hw_security = rx_hw_sec;
+    if ((ptr->cmd != SSV6XXX_WSID_OPS_HWWSID_PAIRWISE_SET_TYPE)
+        && (ptr->cmd != SSV6XXX_WSID_OPS_HWWSID_GROUP_SET_TYPE)) {
+        ptr->wsid_idx = (u8)(sta_idx - SSV_NUM_HW_STA);
+    } else {
+        ptr->wsid_idx = (u8)(sta_idx);
+    };
+    memcpy(&ptr->target_wsid, &sta->addr[0], 6);
+    while(((sc->sh->hci.hci_ops->hci_send_cmd(skb)) != 0) && (retry_cnt))
+    {
+        printk(KERN_INFO "WSID cmd=%d retry=%d!!\n", ops, retry_cnt);
+        retry_cnt--;
+    }
+    printk("%s: wsid_idx = %u\n", __FUNCTION__, ptr->wsid_idx);
+    ssv_skb_free(skb);
+    if(ops == SSV6XXX_WSID_OPS_ADD)
+        sta_info->hw_wsid = sta_idx;
+    return ret;
+}
+#endif
+static void hw_crypto_key_clear(struct ieee80211_hw *hw, int index, struct ieee80211_key_conf *key,
+                                struct ssv_vif_priv_data *vif_priv, struct ssv_sta_priv_data *sta_priv)
+{
+#ifdef FW_WSID_WATCH_LIST
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_sta_info *sta_info = NULL;
+    if ((index == 0) && (sta_priv == NULL))
+        return;
+#endif
+    if ((index < 0) || (index >= 4))
+        return;
+    #if 0
+    if(sta_info){
+        sta_info->s_flags &= ~STA_FLAG_ENCRYPT;
+    }
+    #endif
+    if (index > 0)
+    {
+        if (vif_priv)
+            vif_priv->group_key_idx = 0;
+        if (sta_priv)
+            sta_priv->group_key_idx = 0;
+    }
+#ifdef FW_WSID_WATCH_LIST
+    if(sta_priv)
+    {
+        sta_info = &sc->sta_info[sta_priv->sta_idx];
+        if ((index == 0) && (sta_priv->has_hw_decrypt == true) && (sta_info->hw_wsid >= SSV_NUM_HW_STA))
+        {
+            hw_update_watch_wsid(sc, sta_info->sta, sta_info, sta_priv->sta_idx, SSV6XXX_WSID_SEC_PAIRWISE
+                , SSV6XXX_WSID_OPS_DISABLE_CAPS);
+        }
+    }
+    if(vif_priv)
+    {
+        if((index != 0) && !list_empty(&vif_priv->sta_list))
+        {
+            struct ssv_sta_priv_data *sta_priv_iter;
+            list_for_each_entry(sta_priv_iter, &vif_priv->sta_list, list)
+            {
+                if (((sta_priv_iter->sta_info->s_flags & STA_FLAG_VALID) == 0)
+                     || (sta_priv_iter->sta_info->hw_wsid < SSV_NUM_HW_STA))
+                    continue;
+                hw_update_watch_wsid(sc, sta_priv_iter->sta_info->sta,
+                    sta_priv_iter->sta_info, sta_priv_iter->sta_idx, SSV6XXX_WSID_SEC_GROUP
+                    , SSV6XXX_WSID_OPS_DISABLE_CAPS);
+            }
+        }
+    }
+#endif
+    #if 0
+    if (index == 0) {
+        address = sec_key_tbl+(3*sizeof(struct ssv6xxx_hw_key))
+            + wsid*sizeof(struct ssv6xxx_hw_sta_key);
+        for(i=0;i<(sizeof(struct ssv6xxx_hw_sta_key)/4);i++)
+            SMAC_REG_WRITE(sc->sh, address+i*4, 0x0);
+    }
+    else{
+        address = sec_key_tbl+((index-1)*sizeof(struct ssv6xxx_hw_key));
+        for(i=0;i<(sizeof(struct ssv6xxx_hw_key)/4);i++)
+            SMAC_REG_WRITE(sc->sh,address+i*4, 0x0);
+    }
+    #endif
+}
+static void _set_wep_sw_crypto_key (struct ssv_softc *sc,
+                                         struct ssv_vif_info *vif_info,
+                                         struct ssv_sta_info *sta_info,
+                                         void *param)
+{
+    struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *)sta_info->sta->drv_priv;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif_info->vif->drv_priv;
+    sta_priv->has_hw_encrypt = vif_priv->has_hw_encrypt;
+    sta_priv->has_hw_decrypt = vif_priv->has_hw_decrypt;
+    sta_priv->need_sw_encrypt = vif_priv->need_sw_encrypt;
+    sta_priv->need_sw_decrypt = vif_priv->need_sw_decrypt;
+#ifdef USE_LOCAL_WEP_CRYPTO
+    sta_priv->crypto_data.ops = vif_priv->crypto_data.ops;
+    sta_priv->crypto_data.priv = vif_priv->crypto_data.priv;
+#endif
+}
+static void _set_wep_hw_crypto_pair_key (struct ssv_softc *sc,
+                                         struct ssv_vif_info *vif_info,
+                                         struct ssv_sta_info *sta_info,
+                                         void *param)
+{
+    int wsid = sta_info->hw_wsid;
+    struct ssv6xxx_hw_sec *sram_key = (struct ssv6xxx_hw_sec *)param;
+    int address = 0;
+    int *pointer = NULL;
+#ifdef SSV6200_ECO
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key[0];
+#else
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key;
+#endif
+    u32 sec_key_tbl = sec_key_tbl_base;
+    int i;
+    u8 *key = sram_key->sta_key[0].pair.key;
+    u32 key_len = *(u16 *)&sram_key->sta_key[0].reserve[0];
+    struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *)sta_info->sta->drv_priv;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif_info->vif->drv_priv;
+    if (wsid == (-1))
+        return;
+    sram_key->sta_key[wsid].pair_key_idx = 0;
+    sram_key->sta_key[wsid].group_key_idx = 0;
+    sta_priv->has_hw_encrypt = vif_priv->has_hw_encrypt;
+    sta_priv->has_hw_decrypt = vif_priv->has_hw_decrypt;
+    sta_priv->need_sw_encrypt = vif_priv->need_sw_encrypt;
+    sta_priv->need_sw_decrypt = vif_priv->need_sw_decrypt;
+    if (wsid != 0)
+        memcpy(sram_key->sta_key[wsid].pair.key, key, key_len);
+    address = sec_key_tbl
+              + (3*sizeof(struct ssv6xxx_hw_key))
+              + wsid*sizeof(struct ssv6xxx_hw_sta_key);
+#ifdef SSV6200_ECO
+    address += (0x10000*wsid);
+#endif
+    pointer = (int *)&sram_key->sta_key[wsid];
+    #if 0
+    printk(KERN_ERR "Set STA %d WEP pairwise key to %08X.", wsid, address);
+    printk(KERN_ERR "Set WEP %02X %02X %02X %02X %02X %02X %02X %02X... \n",
+           key[0], key[1], key[2], key[3], key[4], key[5], key[6], key[7]);
+    #endif
+    for (i = 0; i < (sizeof(struct ssv6xxx_hw_sta_key)/4); i++)
+        SMAC_REG_WRITE(sc->sh, address+(i*4), *(pointer++));
+}
+static void _set_wep_hw_crypto_group_key (struct ssv_softc *sc,
+                                          struct ssv_vif_info *vif_info,
+                                          struct ssv_sta_info *sta_info,
+                                          void *param)
+{
+    int wsid = sta_info->hw_wsid;
+    struct ssv6xxx_hw_sec *sram_key = (struct ssv6xxx_hw_sec *)param;
+    int address = 0;
+    int *pointer = NULL;
+    u32 key_idx = sram_key->sta_key[0].pair_key_idx;
+#ifdef SSV6200_ECO
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key[0];
+    u32 key_len = *(u16 *)&sram_key->sta_key[0].reserve[0];
+    u8 *key = sram_key->group_key[key_idx - 1].key;
+#else
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key;
+#endif
+    u32 sec_key_tbl = sec_key_tbl_base;
+    struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *)sta_info->sta->drv_priv;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif_info->vif->drv_priv;
+    if (wsid == (-1))
+        return;
+    if (wsid != 0)
+    {
+        sram_key->sta_key[wsid].pair_key_idx = key_idx;
+        sram_key->sta_key[wsid].group_key_idx = key_idx;
+        sta_priv->has_hw_encrypt = vif_priv->has_hw_encrypt;
+        sta_priv->has_hw_decrypt = vif_priv->has_hw_decrypt;
+        sta_priv->need_sw_encrypt = vif_priv->need_sw_encrypt;
+        sta_priv->need_sw_decrypt = vif_priv->need_sw_decrypt;
+    }
+#ifdef SSV6200_ECO
+    if (wsid != 0)
+        memcpy(sram_key->group_key[key_idx - 1].key, key, key_len);
+    sec_key_tbl += (0x10000 * wsid);
+    address = sec_key_tbl
+              + ((key_idx - 1) * sizeof(struct ssv6xxx_hw_key));
+    pointer = (int *)&sram_key->group_key[key_idx - 1];
+    {
+    int i;
+    for (i = 0; i < (sizeof(struct ssv6xxx_hw_key)/4); i++)
+        SMAC_REG_WRITE(sc->sh, address+(i*4), *(pointer++));
+    }
+#endif
+    address = sec_key_tbl
+              + (3*sizeof(struct ssv6xxx_hw_key))
+              + (wsid*sizeof(struct ssv6xxx_hw_sta_key));
+    pointer = (int *)&sram_key->sta_key[wsid];
+    SMAC_REG_WRITE(sc->sh, address, *(pointer));
+}
+static int hw_crypto_key_write_wep(struct ieee80211_hw *hw,
+                                   struct ieee80211_key_conf *key,
+                                   u8 algorithm,
+                                   struct ssv_vif_info *vif_info)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv6xxx_hw_sec *sramKey = &vif_info->sramKey;
+#ifndef SSV6200_ECO
+    int address = 0x00;
+    int *pointer=NULL;
+    u32 sec_key_tbl=sc->sh->hw_sec_key;
+    int i;
+#endif
+#ifdef FW_WSID_WATCH_LIST
+#endif
+    if (key->keyidx == 0)
+    {
+        ssv6xxx_foreach_vif_sta(sc, vif_info, _set_wep_hw_crypto_pair_key, sramKey);
+    }
+    else
+    {
+#ifndef SSV6200_ECO
+        address = sec_key_tbl
+                  + ((key->keyidx-1) * sizeof(struct ssv6xxx_hw_key));
+        pointer = (int *)&sramKey->group_key[key->keyidx-1];
+        for (i=0;i<(sizeof(struct ssv6xxx_hw_key)/4);i++)
+           SMAC_REG_WRITE(sc->sh, address+(i*4), *(pointer++));
+#endif
+        ssv6xxx_foreach_vif_sta(sc, vif_info, _set_wep_hw_crypto_group_key, sramKey);
+    }
+    return 0;
+}
+static void _set_aes_tkip_hw_crypto_group_key (struct ssv_softc *sc,
+                                               struct ssv_vif_info *vif_info,
+                                               struct ssv_sta_info *sta_info,
+                                               void *param)
+{
+    int wsid = sta_info->hw_wsid;
+#ifdef SSV6200_ECO
+    int j;
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key[0];
+#else
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key;
+#endif
+    u32 sec_key_tbl = sec_key_tbl_base;
+    int address = 0;
+    int *pointer = 0;
+    struct ssv6xxx_hw_sec *sramKey = &(vif_info->sramKey);
+    int index = *(u8 *)param;
+    if (wsid == (-1))
+        return;
+    BUG_ON(index == 0);
+    sramKey->sta_key[wsid].group_key_idx = index;
+#ifdef SSV6200_ECO
+    sec_key_tbl += (0x10000 * wsid);
+    address = sec_key_tbl
+              + ((index-1) * sizeof(struct ssv6xxx_hw_key));
+    if (vif_info->vif_priv != NULL)
+        dev_info(sc->dev, "Write group key %d to VIF %d to %08X\n",
+                 index, vif_info->vif_priv->vif_idx, address);
+    else
+        dev_err(sc->dev, "NULL VIF.\n");
+    pointer = (int *)&sramKey->group_key[index-1];
+    for (j = 0; j < (sizeof(struct ssv6xxx_hw_key)/4); j++)
+        SMAC_REG_WRITE(sc->sh, address+(j*4), *(pointer++));
+#endif
+    address = sec_key_tbl
+              + (3*sizeof(struct ssv6xxx_hw_key))
+              + (wsid * sizeof(struct ssv6xxx_hw_sta_key));
+    pointer = (int *)&sramKey->sta_key[wsid];
+    SMAC_REG_WRITE(sc->sh, address, *(pointer));
+#ifdef FW_WSID_WATCH_LIST
+    if (wsid >= SSV_NUM_HW_STA)
+    {
+        hw_update_watch_wsid(sc, sta_info->sta, sta_info,
+            wsid, SSV6XXX_WSID_SEC_GROUP, SSV6XXX_WSID_OPS_ENABLE_CAPS);
+    }
+#endif
+}
+static int _write_pairwise_key_to_hw (struct ssv_softc *sc,
+                                      int index, u8 algorithm,
+                                      const u8 *key, int key_len,
+                                      struct ieee80211_key_conf *keyconf,
+                                      struct ssv_vif_priv_data *vif_priv,
+                                      struct ssv_sta_priv_data *sta_priv)
+{
+    int i;
+    struct ssv6xxx_hw_sec *sramKey;
+    int address = 0;
+    int *pointer = NULL;
+#ifdef SSV6200_ECO
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key[0];
+#else
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key;
+#endif
+    u32 sec_key_tbl;
+    int wsid = (-1);
+    if (sta_priv == NULL)
+    {
+        dev_err(sc->dev, "Set pair-wise key with NULL STA.\n");
+        return -EOPNOTSUPP;
+    }
+    wsid = sta_priv->sta_info->hw_wsid;
+    if ((wsid < 0) || (wsid >= SSV_NUM_STA))
+    {
+        dev_err(sc->dev, "Set pair-wise key to invalid WSID %d.\n", wsid);
+        return -EOPNOTSUPP;
+    }
+    #if 0
+    sta_info->s_flags |= STA_FLAG_ENCRYPT;
+    #endif
+    dev_info(sc->dev, "Set STA %d's pair-wise key of %d bytes.\n", wsid, key_len);
+    sramKey = &(sc->vif_info[vif_priv->vif_idx].sramKey);
+    sramKey->sta_key[wsid].pair_key_idx = 0;
+    sramKey->sta_key[wsid].group_key_idx = vif_priv->group_key_idx;
+    memcpy(sramKey->sta_key[wsid].pair.key, key, key_len);
+    sec_key_tbl = sec_key_tbl_base;
+    #ifdef SSV6200_ECO
+    sec_key_tbl += (0x10000 * wsid);
+    #endif
+    address = sec_key_tbl
+              + (3 * sizeof(struct ssv6xxx_hw_key))
+              + wsid * sizeof(struct ssv6xxx_hw_sta_key);
+    pointer = (int *)&sramKey->sta_key[wsid];
+    for (i = 0; i < (sizeof(struct ssv6xxx_hw_sta_key)/4); i++)
+        SMAC_REG_WRITE(sc->sh, (address + (i*4)), *(pointer++));
+#ifdef FW_WSID_WATCH_LIST
+    if (wsid >= SSV_NUM_HW_STA)
+    {
+        hw_update_watch_wsid(sc, sta_priv->sta_info->sta, sta_priv->sta_info,
+            sta_priv->sta_idx, SSV6XXX_WSID_SEC_PAIRWISE, SSV6XXX_WSID_OPS_ENABLE_CAPS);
+    }
+#endif
+    return 0;
+}
+static int _write_group_key_to_hw (struct ssv_softc *sc,
+                                   int index, u8 algorithm,
+                                   const u8 *key, int key_len,
+                                   struct ieee80211_key_conf *keyconf,
+                                   struct ssv_vif_priv_data *vif_priv,
+                                   struct ssv_sta_priv_data *sta_priv)
+{
+    struct ssv6xxx_hw_sec *sramKey;
+#ifndef SSV6200_ECO
+    u32 sec_key_tbl_base = sc->sh->hw_sec_key;
+    int address = 0;
+    int *pointer = NULL;
+    int i;
+#endif
+    int wsid = sta_priv ? sta_priv->sta_info->hw_wsid : (-1);
+    int ret = 0;
+    if (vif_priv == NULL)
+    {
+        dev_err(sc->dev, "Setting group key to NULL VIF\n");
+        return -EOPNOTSUPP;
+    }
+    dev_info(sc->dev, "Setting VIF %d group key %d of length %d to WSID %d.\n",
+             vif_priv->vif_idx, index, key_len, wsid);
+    sramKey = &(sc->vif_info[vif_priv->vif_idx].sramKey);
+    vif_priv->group_key_idx = index;
+    if (sta_priv)
+        sta_priv->group_key_idx = index;
+    memcpy(sramKey->group_key[index-1].key, key, key_len);
+    #ifndef SSV6200_ECO
+    address = sec_key_tbl_base + ((index-1)*sizeof(struct ssv6xxx_hw_key));
+    pointer = (int *)&sramKey->group_key[index-1];
+    for (i = 0; i < (sizeof(struct ssv6xxx_hw_key)/4); i++)
+         SMAC_REG_WRITE(sc->sh, address+(i*4), *(pointer++));
+    #endif
+    WARN_ON(sc->vif_info[vif_priv->vif_idx].vif_priv == NULL);
+    ssv6xxx_foreach_vif_sta(sc, &sc->vif_info[vif_priv->vif_idx],
+                            _set_aes_tkip_hw_crypto_group_key, &index);
+    ret = 0;
+    return ret;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+static enum SSV_CIPHER_E _prepare_key (struct ieee80211_key_conf *key)
+{
+    enum SSV_CIPHER_E cipher;
+    switch (key->cipher) {
+        case WLAN_CIPHER_SUITE_WEP40:
+            cipher = SSV_CIPHER_WEP40;
+            break;
+        case WLAN_CIPHER_SUITE_WEP104:
+            cipher = SSV_CIPHER_WEP104;
+            break;
+        case WLAN_CIPHER_SUITE_TKIP:
+            key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
+            cipher = SSV_CIPHER_TKIP;
+            break;
+        case WLAN_CIPHER_SUITE_CCMP:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+            key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
+#else
+            key->flags |= (IEEE80211_KEY_FLAG_SW_MGMT_TX | IEEE80211_KEY_FLAG_RX_MGMT);
+#endif
+            cipher = SSV_CIPHER_CCMP;
+            break;
+#ifdef CONFIG_SSV_WAPI
+        case WLAN_CIPHER_SUITE_SMS4:
+            printk("[I] %s, algorithm = WLAN_CIPHER_SUITE_SMS4\n", __func__);
+            cipher = SSV_CIPHER_SMS4;
+            break;
+#endif
+        default:
+            cipher = SSV_CIPHER_INVALID;
+            break;
+    }
+    return cipher;
+}
+#else
+static enum SSV_CIPHER_E _prepare_key (struct ieee80211_key_conf *key)
+{
+    enum SSV_CIPHER_E cipher;
+    switch (key->alg) {
+        case ALG_WEP:
+            if(key->keylen == 5)
+                cipher = SSV_CIPHER_WEP40;
+            else
+                cipher = SSV_CIPHER_WEP104;
+            break;
+        case ALG_TKIP:
+            cipher = SSV_CIPHER_TKIP;
+            key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
+            break;
+        case ALG_CCMP:
+            cipher = SSV_CIPHER_CCMP;
+            key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
+            break;
+        default:
+            cipher = SSV_CIPHER_INVALID;
+            break;
+    }
+    return cipher;
+}
+#endif
+int _set_key_wep (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                  struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                  struct ieee80211_key_conf *key)
+{
+    int ret = 0;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    struct ssv6xxx_hw_sec *sram_key = &vif_info->sramKey;
+    sram_key->sta_key[0].pair_key_idx = key->keyidx;
+    sram_key->sta_key[0].group_key_idx = key->keyidx;
+    *(u16 *)&sram_key->sta_key[0].reserve[0] = key->keylen;
+    printk(KERN_ERR "Set WEP %02X %02X %02X %02X %02X %02X %02X %02X... (%d %d)\n",
+           key->key[0], key->key[1], key->key[2], key->key[3],
+           key->key[4], key->key[5], key->key[6], key->key[7],
+           key->keyidx, key->keylen);
+    if (key->keyidx == 0)
+    {
+        memcpy(sram_key->sta_key[0].pair.key, key->key, key->keylen);
+    }
+    else
+    {
+        memcpy(sram_key->group_key[key->keyidx - 1].key, key->key, key->keylen);
+    }
+    #if 1
+    if (sc->sh->cfg.use_wpa2_only)
+    {
+        dev_warn(sc->dev, "Use WPA2 HW security mode only.\n");
+    }
+    #endif
+    if ( (sc->sh->cfg.use_wpa2_only == 0)
+        && vif_priv->vif_idx == 0)
+    {
+        vif_priv->has_hw_decrypt = true;
+        vif_priv->has_hw_encrypt = true;
+        vif_priv->need_sw_decrypt = false;
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->use_mac80211_decrypt = false;
+        ssv6200_hw_set_pair_type(sc->sh, cipher);
+        ssv6200_hw_set_group_type(sc->sh, cipher);
+        hw_crypto_key_write_wep(sc->hw, key, cipher,
+                                &sc->vif_info[vif_priv->vif_idx]);
+    }
+    else
+    #ifdef USE_LOCAL_WEP_CRYPTO
+    {
+        INIT_WRITE_CRYPTO_DATA(crypto_data, &vif_priv->crypto_data);
+        vif_priv->has_hw_decrypt = false;
+        vif_priv->has_hw_encrypt = false;
+        START_WRITE_CRYPTO_DATA(crypto_data);
+        if (crypto_data->ops && crypto_data->priv)
+        {
+            crypto_data->ops->deinit(crypto_data->priv);
+            crypto_data->ops = NULL;
+            crypto_data->priv = NULL;
+        }
+        crypto_data->ops = get_crypto_wep_ops();
+        crypto_data->priv = NULL;
+        if (crypto_data->ops)
+            crypto_data->priv = crypto_data->ops->init(key->keyidx);
+        if (crypto_data->priv)
+        {
+            crypto_data->ops->set_key(key->key, key->keylen, NULL, crypto_data->priv);
+            dev_err(sc->dev, "[Local Crypto]: VIF gets WEP crypto OK!\n");
+            dev_err(sc->dev, "[Local Crypto]: Use driver's encrypter.\n");
+            vif_priv->need_sw_decrypt = true;
+            vif_priv->need_sw_encrypt = true;
+            vif_priv->use_mac80211_decrypt = false;
+        }
+        else
+        {
+            dev_err(sc->dev, "[Local Crypto]: Failed to initialize driver's crypto!\n");
+            dev_info(sc->dev, "[Local Crypto]: Use MAC80211's encrypter.\n");
+            vif_priv->need_sw_decrypt = false;
+            vif_priv->need_sw_encrypt = false;
+            vif_priv->use_mac80211_decrypt = true;
+            ret = -EOPNOTSUPP;
+        }
+        ssv6xxx_foreach_vif_sta(sc, vif_info, _set_wep_sw_crypto_key, NULL);
+        END_WRITE_CRYPTO_DATA(crypto_data);
+    }
+    #else
+    {
+        vif_priv->has_hw_decrypt = false;
+        vif_priv->has_hw_encrypt = false;
+        vif_priv->need_sw_decrypt = false;
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->use_mac80211_decrypt = true;
+        ssv6xxx_foreach_vif_sta(sc, vif_info, _set_wep_sw_crypto_key, NULL);
+        ret = -EOPNOTSUPP;
+    }
+    #endif
+    vif_priv->pair_cipher = vif_priv->group_cipher = cipher;
+    vif_priv->is_security_valid = true;
+    return ret;
+}
+static int _set_pairwise_key_tkip_ccmp (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                                        struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                                        struct ieee80211_key_conf *key)
+{
+    int ret = 0;
+    const char *cipher_name = (cipher == SSV_CIPHER_CCMP) ? "CCMP" : "TKIP";
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    bool tdls_link = false, tdls_use_sw_cipher = false, tkip_use_sw_cipher = false;
+    bool use_non_ccmp = false;
+    int another_vif_idx = ((vif_priv->vif_idx + 1) % 2);
+    struct ssv_vif_priv_data *another_vif_priv =
+                                (struct ssv_vif_priv_data *)sc->vif_info[another_vif_idx].vif_priv;
+    if (sta_priv == NULL)
+    {
+        dev_err(sc->dev, "Setting pairwise TKIP/CCMP key to NULL STA.\n");
+        return -EOPNOTSUPP;
+    }
+    #if 1
+    if (sc->sh->cfg.use_wpa2_only)
+    {
+        dev_warn(sc->dev, "Use WPA2 HW security mode only.\n");
+    }
+    #endif
+    if (vif_info->if_type == NL80211_IFTYPE_STATION){
+        struct ssv_sta_priv_data *first_sta_priv =
+                list_first_entry(&vif_priv->sta_list, struct ssv_sta_priv_data, list);
+        if (first_sta_priv->sta_idx != sta_priv->sta_idx){
+            tdls_link = true;
+        }
+        printk("first sta idx %d, current sta idx %d\n",first_sta_priv->sta_idx,sta_priv->sta_idx);
+    }
+    if ((tdls_link) && (vif_priv->pair_cipher != SSV_CIPHER_CCMP)
+        && (sc->sh->cfg.use_wpa2_only == false)){
+        tdls_use_sw_cipher = true;
+    }
+    if (another_vif_priv != NULL){
+        if ((another_vif_priv->pair_cipher != SSV_CIPHER_CCMP)
+              && (another_vif_priv->pair_cipher != SSV_CIPHER_NONE)){
+            use_non_ccmp = true;
+            printk("another vif use none ccmp\n");
+        }
+    }
+    if ((((tdls_link) && (vif_priv->pair_cipher != SSV_CIPHER_CCMP)) || (use_non_ccmp))
+        && (sc->sh->cfg.use_wpa2_only == 1) && (cipher == SSV_CIPHER_CCMP)){
+        u32 val;
+        SMAC_REG_READ(sc->sh, ADR_RX_FLOW_DATA, &val);
+        if (((val >>4) & 0xF) != M_ENG_CPU){
+            SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, ((val & 0xf) | (M_ENG_CPU<<4)
+                | (val & 0xfffffff0) <<4));
+            dev_info(sc->dev, "orginal Rx_Flow %x , modified flow %x \n", val,
+            ((val & 0xf) | (M_ENG_CPU<<4) | (val & 0xfffffff0) <<4));
+        }
+    }
+    if ((cipher == SSV_CIPHER_TKIP) && (sc->sh->cfg.use_wpa2_only == 1)){
+      tkip_use_sw_cipher = true;
+    }
+    if(tkip_use_sw_cipher == true)
+        printk ("%s==> tkip use sw cipher\n",__func__);
+    if ((((vif_priv->vif_idx == 0) && (tdls_use_sw_cipher == false) && (tkip_use_sw_cipher == false)))
+        || ((cipher == SSV_CIPHER_CCMP) && (sc->sh->cfg.use_wpa2_only == 1)))
+    {
+        sta_priv->has_hw_decrypt = true;
+        sta_priv->need_sw_decrypt = false;
+        if ((cipher == SSV_CIPHER_TKIP)
+            || ((!(sc->sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_TX) ||
+                (sta_priv->sta_info->sta->ht_cap.ht_supported == false))
+                && (vif_priv->force_sw_encrypt == false)))
+        {
+            dev_info(sc->dev, "STA %d uses HW encrypter for pairwise.\n", sta_priv->sta_idx);
+            sta_priv->has_hw_encrypt = true;
+            sta_priv->need_sw_encrypt = false;
+            sta_priv->use_mac80211_decrypt = false;
+            ret = 0;
+        }
+        else
+        {
+            sta_priv->has_hw_encrypt = false;
+            #ifdef USE_LOCAL_CCMP_CRYPTO
+            sta_priv->need_sw_encrypt = true;
+            sta_priv->use_mac80211_decrypt = false;
+            ret = 0;
+            #else
+            sta_priv->need_sw_encrypt = false;
+            sta_priv->use_mac80211_decrypt = true;
+            ret = -EOPNOTSUPP;
+            #endif
+        }
+    }
+    else
+    {
+        sta_priv->has_hw_encrypt = false;
+        sta_priv->has_hw_decrypt = false;
+        #ifdef USE_LOCAL_CCMP_CRYPTO
+        sta_priv->need_sw_encrypt = true;
+        sta_priv->need_sw_decrypt = true;
+        sta_priv->use_mac80211_decrypt = false;
+        ret = 0;
+        #else
+        dev_err(sc->dev, "STA %d MAC80211's %s cipher.\n", sta_priv->sta_idx, cipher_name);
+        sta_priv->need_sw_encrypt = false;
+        sta_priv->need_sw_decrypt = false;
+        sta_priv->use_mac80211_decrypt = true;
+        ret = -EOPNOTSUPP;
+        #endif
+    }
+    #ifdef USE_LOCAL_CRYPTO
+    if (sta_priv->need_sw_encrypt || sta_priv->need_sw_decrypt)
+    {
+        struct ssv_crypto_ops *temp_crypt;
+        void *temp_crypt_priv = NULL;
+        INIT_WRITE_CRYPTO_DATA(crypto_data, &sta_priv->crypto_data);
+        START_WRITE_CRYPTO_DATA(crypto_data);
+        if (crypto_data->ops && crypto_data->priv)
+        {
+            crypto_data->ops->deinit(crypto_data->priv);
+        }
+        temp_crypt = (cipher == SSV_CIPHER_CCMP)
+                          #ifdef USE_LOCAL_CCMP_CRYPTO
+                          ? get_crypto_ccmp_ops()
+                          #else
+                          ? NULL
+                          #endif
+                          #ifdef USE_LOCAL_TKIP_CRYPTO
+                          : get_crypto_tkip_ops();
+                          #else
+                          : NULL;
+                          #endif
+        if (temp_crypt)
+            temp_crypt_priv = temp_crypt->init(key->keyidx);
+        if (temp_crypt_priv)
+        {
+            dev_err(sc->dev, "Use driver's %s cipher OK!\n", cipher_name);
+            temp_crypt->set_key(key->key, key->keylen, NULL, temp_crypt_priv);
+            crypto_data->priv = temp_crypt_priv;
+            crypto_data->ops = temp_crypt;
+        }
+        else
+        {
+            dev_err(sc->dev, "Failed to initialize driver's %s crypto! "
+                    "Use MAC80211's instead.\n", cipher_name);
+            sta_priv->need_sw_encrypt = false;
+            sta_priv->need_sw_decrypt = false;
+            sta_priv->use_mac80211_decrypt = true;
+            vif_priv->need_sw_encrypt = false;
+            vif_priv->need_sw_decrypt = false;
+            vif_priv->use_mac80211_decrypt = true;
+            ret = -EOPNOTSUPP;
+        }
+        END_WRITE_CRYPTO_DATA(crypto_data);
+    }
+    #endif
+    if (sta_priv->has_hw_encrypt || sta_priv->has_hw_decrypt)
+    {
+        ssv6200_hw_set_pair_type(sc->sh, cipher);
+#if 0
+        ssv6200_hw_set_pair_type(sc->sh, SSV_CIPHER_NONE);
+        sta_priv->has_hw_encrypt = false;
+        sta_priv->has_hw_decrypt = false;
+        sta_priv->need_sw_encrypt = true;
+        sta_priv->need_sw_encrypt = true;
+#endif
+        _write_pairwise_key_to_hw(sc, key->keyidx, cipher,
+                                  key->key, key->keylen, key,
+                                  vif_priv, sta_priv);
+    }
+    if ( (vif_priv->has_hw_encrypt || vif_priv->has_hw_decrypt)
+        && (vif_priv->group_key_idx > 0))
+    {
+        _set_aes_tkip_hw_crypto_group_key(sc, &sc->vif_info[vif_priv->vif_idx],
+                                          sta_priv->sta_info, &vif_priv->group_key_idx);
+    }
+    return ret;
+}
+static int _set_group_key_tkip_ccmp (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                                     struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                                     struct ieee80211_key_conf *key)
+{
+    int ret = 0;
+    const char *cipher_name = (cipher == SSV_CIPHER_CCMP) ? "CCMP" : "TKIP";
+    bool tkip_use_sw_cipher = false;
+    vif_priv->group_cipher = cipher;
+    #if 1
+    if (sc->sh->cfg.use_wpa2_only)
+    {
+        dev_warn(sc->dev, "Use WPA2 HW security mode only.\n");
+    }
+    #endif
+    if ((cipher == SSV_CIPHER_TKIP) && (sc->sh->cfg.use_wpa2_only == 1)){
+      tkip_use_sw_cipher = true;
+    }
+    if (((vif_priv->vif_idx == 0) && (tkip_use_sw_cipher == false))
+        || ((cipher == SSV_CIPHER_CCMP) && (sc->sh->cfg.use_wpa2_only == 1)))
+    {
+        dev_info(sc->dev, "VIF %d uses HW %s cipher for group.\n", vif_priv->vif_idx, cipher_name);
+        #ifdef USE_MAC80211_DECRYPT_BROADCAST
+        vif_priv->has_hw_decrypt = false;
+        ret = -EOPNOTSUPP;
+        #else
+        vif_priv->has_hw_decrypt = true;
+        #endif
+        vif_priv->has_hw_encrypt = true;
+        vif_priv->need_sw_decrypt = false;
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->use_mac80211_decrypt = false;
+    }
+    else
+    {
+        vif_priv->has_hw_decrypt = false;
+        vif_priv->has_hw_encrypt = false;
+        #ifdef USE_LOCAL_CRYPTO
+        vif_priv->need_sw_encrypt = true;
+        vif_priv->need_sw_decrypt = true;
+        vif_priv->use_mac80211_decrypt = false;
+        ret = 0;
+        #else
+        dev_err(sc->dev, "VIF %d uses MAC80211's %s cipher.\n", vif_priv->vif_idx, cipher_name);
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->use_mac80211_decrypt = true;
+        ret = -EOPNOTSUPP;
+        #endif
+    }
+    #ifdef USE_LOCAL_CRYPTO
+    if (vif_priv->need_sw_encrypt || vif_priv->need_sw_decrypt)
+    {
+        struct ssv_crypto_ops *temp_crypt = NULL;
+        void *temp_crypt_priv = NULL;
+        INIT_WRITE_CRYPTO_DATA(crypto_data, &vif_priv->crypto_data);
+        START_WRITE_CRYPTO_DATA(crypto_data);
+        if (crypto_data->ops && crypto_data->priv)
+            crypto_data->ops->deinit(crypto_data->priv);
+        crypto_data->priv = NULL;
+        temp_crypt = (cipher == SSV_CIPHER_CCMP)
+                          #ifdef USE_LOCAL_CCMP_CRYPTO
+                          ? get_crypto_ccmp_ops()
+                          #else
+                          ? NULL
+                          #endif
+                          #ifdef USE_LOCAL_TKIP_CRYPTO
+                          : get_crypto_tkip_ops();
+                          #else
+                          : NULL;
+                          #endif
+        if (temp_crypt)
+            temp_crypt_priv = temp_crypt->init(key->keyidx);
+        if (temp_crypt_priv)
+        {
+            dev_err(sc->dev, "VIF %d gets %s crypto OK! Use driver's crypto.\n",
+                    vif_priv->vif_idx, cipher_name);
+            temp_crypt->set_key(key->key, key->keylen, NULL, temp_crypt_priv);
+            crypto_data->priv = temp_crypt_priv;
+            crypto_data->ops = temp_crypt;
+        }
+        else
+        {
+            vif_priv->need_sw_encrypt = false;
+            vif_priv->need_sw_decrypt = false;
+            vif_priv->use_mac80211_decrypt = true;
+            dev_err(sc->dev, "VIF %d failed to initialize %s crypto!"
+                    " Use MAC80211's instead.\n", vif_priv->vif_idx, cipher_name);
+            ret = -EOPNOTSUPP;
+        }
+        END_WRITE_CRYPTO_DATA(crypto_data);
+    }
+    #endif
+    if (vif_priv->has_hw_encrypt || vif_priv->has_hw_decrypt)
+    {
+        #ifdef USE_MAC80211_DECRYPT_BROADCAST
+        ssv6200_hw_set_group_type(sc->sh, ME_NONE);
+        #else
+        ssv6200_hw_set_group_type(sc->sh, cipher);
+        #endif
+        key->hw_key_idx = key->keyidx;
+        _write_group_key_to_hw(sc, key->keyidx, cipher,
+                               key->key, key->keylen, key,
+                               vif_priv, sta_priv);
+    }
+    vif_priv->is_security_valid = true;
+    {
+        int another_vif_idx = ((vif_priv->vif_idx + 1) % 2);
+        struct ssv_vif_priv_data *another_vif_priv =
+                        (struct ssv_vif_priv_data *)sc->vif_info[another_vif_idx].vif_priv;
+        if ( another_vif_priv != NULL){
+            if (((SSV6XXX_USE_SW_DECRYPT(vif_priv)
+                    && SSV6XXX_USE_HW_DECRYPT (another_vif_priv)))
+                || ((SSV6XXX_USE_HW_DECRYPT (vif_priv)
+                    && (SSV6XXX_USE_SW_DECRYPT(another_vif_priv))))){
+                u32 val;
+                SMAC_REG_READ(sc->sh, ADR_RX_FLOW_DATA, &val);
+                if (((val >>4) & 0xF) != M_ENG_CPU){
+                    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, ((val & 0xf) | (M_ENG_CPU<<4)
+                        | (val & 0xfffffff0) <<4));
+                    dev_info(sc->dev, "orginal Rx_Flow %x , modified flow %x \n", val,
+                    ((val & 0xf) | (M_ENG_CPU<<4) | (val & 0xfffffff0) <<4));
+                } else {
+                    printk(" doesn't need to change rx flow\n");
+                }
+            }
+        }
+    }
+    return ret;
+}
+static int _set_key_tkip_ccmp (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                               struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                               struct ieee80211_key_conf *key)
+{
+    if (key->keyidx == 0)
+        return _set_pairwise_key_tkip_ccmp(sc, vif_priv, sta_priv, cipher, key);
+    else
+        return _set_group_key_tkip_ccmp(sc, vif_priv, sta_priv, cipher, key);
+}
+#ifdef USE_LOCAL_SMS4_CRYPTO
+static int _set_pairwise_key_sms4 (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                               struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                               struct ieee80211_key_conf *key)
+{
+    int ret = 0;
+    INIT_WRITE_CRYPTO_DATA(crypto_data, NULL);
+    if (sta_priv == NULL)
+    {
+        dev_err(sc->dev, "Setting pairwise SMS4 key to NULL STA.\n");
+        return -EOPNOTSUPP;
+    }
+    crypto_data = &sta_priv->crypto_data;
+    START_WRITE_CRYPTO_DATA(crypto_data);
+    sta_priv->has_hw_encrypt = false;
+    sta_priv->has_hw_decrypt = false;
+    sta_priv->need_sw_encrypt = true;
+    sta_priv->need_sw_decrypt = true;
+    sta_priv->use_mac80211_decrypt = false;
+    crypto_data->ops = get_crypto_wpi_ops();
+    if (crypto_data->ops)
+        crypto_data->priv = crypto_data->ops->init(key->keyidx);
+    if (crypto_data->priv)
+    {
+        dev_err(sc->dev, "Use driver's SMS4 cipher OK!\n");
+        crypto_data->ops->set_key(key->key, key->keylen, NULL, crypto_data->priv);
+    }
+    else
+    {
+        dev_err(sc->dev, "Failed to initialize driver's SMS4 crypto!\n");
+        crypto_data->ops = NULL;
+        sta_priv->need_sw_encrypt = false;
+        sta_priv->need_sw_decrypt = false;
+        ret = -EOPNOTSUPP;
+    }
+    END_WRITE_CRYPTO_DATA(crypto_data);
+    return ret;
+}
+static int _set_group_key_sms4 (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                                struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                                struct ieee80211_key_conf *key)
+{
+    int ret = 0;
+    INIT_WRITE_CRYPTO_DATA(crypto_data, &vif_priv->crypto_data);
+    vif_priv->has_hw_encrypt = false;
+    vif_priv->has_hw_decrypt = false;
+    vif_priv->need_sw_encrypt = true;
+    vif_priv->need_sw_decrypt = true;
+    vif_priv->use_mac80211_decrypt = false;
+    START_WRITE_CRYPTO_DATA(crypto_data);
+    crypto_data->ops = get_crypto_wpi_ops();
+    if (crypto_data->ops)
+        crypto_data->priv = crypto_data->ops->init(key->keyidx);
+    if (crypto_data->priv)
+    {
+        dev_err(sc->dev, "Use driver's SMS4 cipher OK!\n");
+        crypto_data->ops->set_key(key->key, key->keylen, NULL, crypto_data->priv);
+        vif_priv->is_security_valid = true;
+    }
+    else
+    {
+        dev_err(sc->dev, "Failed to initialize driver's SMS4 crypto!\n");
+        crypto_data->ops = NULL;
+        vif_priv->need_sw_encrypt = false;
+        vif_priv->need_sw_decrypt = false;
+        ret = -EOPNOTSUPP;
+        vif_priv->is_security_valid = false;
+    }
+    END_WRITE_CRYPTO_DATA(crypto_data);
+    return ret;
+}
+static int _set_key_sms4 (struct ssv_softc *sc, struct ssv_vif_priv_data *vif_priv,
+                          struct ssv_sta_priv_data *sta_priv, enum SSV_CIPHER_E cipher,
+                          struct ieee80211_key_conf *key)
+{
+ if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
+        return _set_pairwise_key_sms4(sc, vif_priv, sta_priv, cipher, key);
+    else
+        return _set_group_key_sms4(sc, vif_priv, sta_priv, cipher, key);
+}
+#endif
+static int ssv6200_set_key(struct ieee80211_hw *hw,
+                           enum set_key_cmd cmd,
+                           struct ieee80211_vif *vif,
+                           struct ieee80211_sta *sta,
+                           struct ieee80211_key_conf *key)
+{
+    struct ssv_softc *sc = hw->priv;
+    int ret = 0;
+    enum SSV_CIPHER_E cipher = SSV_CIPHER_NONE;
+    int sta_idx = (-1);
+    struct ssv_sta_info *sta_info = NULL;
+    struct ssv_sta_priv_data *sta_priv = NULL;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+#if 0
+    int another_vif_idx = ((vif_priv->vif_idx + 1) % 2);
+    struct ssv_vif_priv_data *another_vif_priv = NULL;
+    u32 another_vif_pair_cipher = 0;
+    u32 another_vif_group_cipher = 0;
+    if (sc->vif_info[another_vif_idx].vif)
+    {
+        another_vif_priv = sc->vif_info[another_vif_idx].vif_priv;
+        another_vif_pair_cipher = another_vif_priv->pair_cipher;
+        another_vif_group_cipher = another_vif_priv->group_cipher;
+    }
+#endif
+    if (sta)
+    {
+        sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+        sta_idx = sta_priv->sta_idx;
+        sta_info = sta_priv->sta_info;
+    }
+    BUG_ON((cmd!=SET_KEY) && (cmd!=DISABLE_KEY));
+    if (!(sc->sh->cfg.hw_caps & SSV6200_HW_CAP_SECURITY))
+    {
+        dev_warn(sc->dev, "HW does not support security.\n");
+        return -EOPNOTSUPP;
+    }
+    #ifndef USE_LOCAL_CRYPTO
+    if (sta_info && (sta_info->hw_wsid == (-1)))
+    {
+        dev_warn(sc->dev, "Add STA without HW resource. Use MAC80211's solution.\n");
+        return -EOPNOTSUPP;
+    }
+    #endif
+    cipher = _prepare_key(key);
+    dev_err(sc->dev,"Set key VIF %d VIF type %d STA %d algorithm = %d, key->keyidx = %d, cmd = %d\n",
+            vif_priv->vif_idx, vif->type, sta_idx, cipher, key->keyidx, cmd);
+    if (cipher == SSV_CIPHER_INVALID)
+    {
+        dev_warn(sc->dev, "Unsupported cipher type.\n");
+        return -EOPNOTSUPP;
+    }
+    mutex_lock(&sc->mutex);
+    switch (cmd)
+    {
+        case SET_KEY:
+            {
+                #if 0
+                int i;
+                printk("================================SET KEY=======================================\n");
+                if (sta_info == NULL)
+                {
+                    printk("NULL STA cmd[%d] alg[%d] keyidx[%d] ", cmd, algorithm, key->keyidx);
+                }
+                else
+                {
+                    printk("STA WSID[%d] cmd[%d] alg[%d] keyidx[%d] ", sta_info->hw_wsid, cmd, algorithm, key->keyidx);
+                }
+                printk("SET_KEY index[%d] flags[0x%x] algorithm[%d] key->keylen[%d]\n",
+                                                                            key->keyidx, key->flags, algorithm, key->keylen);
+                for(i = 0; i < key->keylen; i++)
+                {
+                    printk("[%02x]", key->key[i]);
+                }
+                printk("\n");
+                printk("===============================================================================\n");
+                #endif
+                switch (cipher)
+                {
+                    case SSV_CIPHER_WEP40:
+                    case SSV_CIPHER_WEP104:
+                        ret = _set_key_wep(sc, vif_priv, sta_priv, cipher, key);
+                        break;
+                    case SSV_CIPHER_TKIP:
+                    case SSV_CIPHER_CCMP:
+                        ret = _set_key_tkip_ccmp(sc, vif_priv, sta_priv, cipher, key);
+                        break;
+                    #ifdef CONFIG_SSV_WAPI
+                    case SSV_CIPHER_SMS4:
+                        ret = _set_key_sms4(sc, vif_priv, sta_priv, cipher, key);
+                        break;
+                    #endif
+                    default:
+                        break;
+                }
+                if (sta){
+                    struct ssv_sta_priv_data *first_sta_priv =
+                        list_first_entry(&vif_priv->sta_list, struct ssv_sta_priv_data, list);
+                    if (first_sta_priv->sta_idx == sta_priv->sta_idx){
+                      vif_priv->pair_cipher = cipher;
+                    }
+                    if (SSV6200_USE_HW_WSID(sta_idx)){
+                        if (SSV6XXX_USE_SW_DECRYPT(sta_priv)){
+                            u32 cipher_setting;
+                            cipher_setting = ssv6200_hw_get_pair_type(sc->sh);
+                            if (cipher_setting != ME_NONE) {
+                                u32 val;
+                                SMAC_REG_READ(sc->sh, ADR_RX_FLOW_DATA, &val);
+                                if (((val >>4) & 0xF) != M_ENG_CPU){
+                                    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA,
+                                        ((val & 0xf) | (M_ENG_CPU<<4)
+                                         | (val & 0xfffffff0) <<4));
+                                    dev_info(sc->dev, "orginal Rx_Flow %x , modified flow %x \n",
+                                        val, ((val & 0xf) | (M_ENG_CPU<<4) | (val & 0xfffffff0) <<4));
+                                } else {
+                                    printk(" doesn't need to change rx flow\n");
+                                }
+                            }
+                        }
+                        if (sta_priv->has_hw_decrypt){
+                            hw_update_watch_wsid(sc, sta, sta_info, sta_idx,
+                                SSV6XXX_WSID_SEC_HW, SSV6XXX_WSID_OPS_HWWSID_PAIRWISE_SET_TYPE);
+                            printk("set hw wsid %d cipher mode to HW cipher for pairwise key\n", sta_idx);
+                        }
+                    }
+                } else {
+                    if (vif_info->if_type == NL80211_IFTYPE_STATION){
+                        struct ssv_sta_priv_data *first_sta_priv =
+                            list_first_entry(&vif_priv->sta_list, struct ssv_sta_priv_data, list);
+                        if (SSV6200_USE_HW_WSID(first_sta_priv->sta_idx)){
+                            if (vif_priv->has_hw_decrypt){
+                                hw_update_watch_wsid(sc, sta, sta_info, first_sta_priv->sta_idx,
+                                    SSV6XXX_WSID_SEC_HW, SSV6XXX_WSID_OPS_HWWSID_GROUP_SET_TYPE);
+                                printk("set hw wsid %d cipher mode to HW cipher for group  key\n", first_sta_priv->sta_idx);
+                            }
+                        }
+                    }
+                }
+            }
+            break;
+        case DISABLE_KEY:
+            {
+                int another_vif_idx = ((vif_priv->vif_idx + 1) % 2);
+                struct ssv_vif_priv_data *another_vif_priv =
+                        (struct ssv_vif_priv_data *)sc->vif_info[another_vif_idx].vif_priv;
+#if 0
+               printk("================================DEL KEY=======================================\n");
+               if(sta_info == NULL){
+                    printk("NULL STA cmd[%d] alg[%d] keyidx[%d] ", cmd, cipher, key->keyidx);
+               }
+               else{
+                    printk("STA WSID[%d] cmd[%d] alg[%d] keyidx[%d] ", sta_info->hw_wsid, cmd, cipher, key->keyidx);
+               }
+                printk("DISABLE_KEY index[%d]\n",key->keyidx);
+                printk("==============================================================================\n");
+#endif
+                #if 0
+                if(key->keyidx == 0)
+                {
+                    sta_info->ampdu_ccmp_encrypt = false;
+                }
+                #endif
+                if (another_vif_priv != NULL) {
+                    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+                    if (vif_info->if_type != NL80211_IFTYPE_AP) {
+                        if ((SSV6XXX_USE_SW_DECRYPT(vif_priv)
+                                && SSV6XXX_USE_HW_DECRYPT (another_vif_priv))
+                            || (SSV6XXX_USE_SW_DECRYPT(another_vif_priv)
+                                && SSV6XXX_USE_HW_DECRYPT (vif_priv))){
+    #ifdef CONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+                            SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA,
+                                    M_ENG_MACRX|(M_ENG_HWHCI<<4));
+    #else
+                            SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA,
+                                    M_ENG_MACRX|(M_ENG_ENCRYPT_SEC<<4)|(M_ENG_HWHCI<<8));
+    #endif
+                            printk("redirect Rx flow for disconnect\n");
+                        }
+                    }else {
+                        if (sta == NULL) {
+                            if (SSV6XXX_USE_SW_DECRYPT(another_vif_priv)
+                                && SSV6XXX_USE_HW_DECRYPT (vif_priv)){
+    #ifdef CONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+                                SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA,
+                                    M_ENG_MACRX|(M_ENG_HWHCI<<4));
+    #else
+                                SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA,
+                                    M_ENG_MACRX|(M_ENG_ENCRYPT_SEC<<4)|(M_ENG_HWHCI<<8));
+    #endif
+                                printk("redirect Rx flow for disconnect\n");
+                            }
+                        }
+                    }
+                }
+                if ( sta == NULL){
+                    vif_priv->group_cipher = ME_NONE;
+                    if ((another_vif_priv == NULL)
+                        || ((another_vif_priv != NULL) && (!SSV6XXX_USE_HW_DECRYPT(another_vif_priv)))){
+                    #ifdef SSV_SUPPORT_HAL
+                        HAL_SET_GROUP_CIPHER_TYPE(sc->sh, ME_NONE);
+                    #else
+                        ssv6200_hw_set_group_type(sc->sh, ME_NONE);
+                    #endif
+                    }
+                } else {
+                    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+                    if ((vif_info->if_type != NL80211_IFTYPE_AP) && (another_vif_priv == NULL)){
+                        struct ssv_sta_priv_data *first_sta_priv =
+                            list_first_entry(&vif_priv->sta_list, struct ssv_sta_priv_data, list);
+                        if (sta_priv == first_sta_priv){
+                        #ifdef SSV_SUPPORT_HAL
+                            HAL_SET_PAIRWISE_CIPHER_TYPE(sc->sh, ME_NONE, sta_info->hw_wsid);
+                        #else
+                            ssv6200_hw_set_pair_type(sc->sh, ME_NONE);
+                        #endif
+                        }
+                    }
+                    vif_priv->pair_cipher = ME_NONE;
+                }
+                if ((cipher == ME_TKIP) || (cipher == ME_CCMP))
+                {
+                    printk(KERN_ERR "Clear key %d VIF %d, STA %d\n",
+                           key->keyidx, (vif != NULL), (sta != NULL));
+                    hw_crypto_key_clear(hw, key->keyidx, key, vif_priv, sta_priv);
+                }
+                {
+                    if ((key->keyidx == 0) && (sta_priv != NULL))
+                    {
+                        #ifdef USE_LOCAL_CRYPTO
+                        unsigned long flags;
+                        INIT_WRITE_CRYPTO_DATA(crypto_data, &sta_priv->crypto_data);
+                        #endif
+                        sta_priv->has_hw_decrypt = false;
+                        sta_priv->has_hw_encrypt = false;
+                        sta_priv->need_sw_encrypt = false;
+                        sta_priv->use_mac80211_decrypt = false;
+                        #ifdef USE_LOCAL_CRYPTO
+                        if (crypto_data->ops && crypto_data->priv)
+                        {
+                            u32 sta_addr0_3 = *(u32 *)&sta->addr[0];
+                            u32 sta_addr4_5 = (u32)*(u16 *)&sta->addr[4];
+                            u32 removed_skb_num;
+                            START_WRITE_CRYPTO_DATA(crypto_data);
+                            crypto_data->ops->deinit(crypto_data->priv);
+                            crypto_data->priv = NULL;
+                            crypto_data->ops = NULL;
+                            END_WRITE_CRYPTO_DATA(crypto_data);
+                            spin_lock_irqsave(&sc->crypt_st_lock, flags);
+                            removed_skb_num = _remove_sta_skb_from_q(sc, &sc->preprocess_q,
+                                                                     sta_addr0_3, sta_addr4_5);
+                            spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+                            dev_err(sc->dev, "Clean up %d skb for STA %pM.\n", removed_skb_num, sta->addr);
+                        }
+                        #endif
+                    }
+                    #ifdef USE_LOCAL_CRYPTO
+                    else
+                    {
+                        INIT_WRITE_CRYPTO_DATA(crypto_data, &vif_priv->crypto_data);
+                        START_WRITE_CRYPTO_DATA(crypto_data);
+                        if (crypto_data->ops && crypto_data->priv)
+                            crypto_data->ops->deinit(crypto_data->priv);
+                        crypto_data->priv = NULL;
+                        crypto_data->ops = NULL;
+                        END_WRITE_CRYPTO_DATA(crypto_data);
+                    }
+                    #endif
+                    if ((vif_priv->is_security_valid) && (key->keyidx != 0))
+                    {
+                        #if 0
+                        vif_priv->has_hw_decrypt = false;
+                        vif_priv->has_hw_encrypt = false;
+                        vif_priv->need_sw_encrypt = false;
+                        #endif
+                        vif_priv->is_security_valid = false;
+                    }
+                }
+                ret = 0;
+            }
+            break;
+        default:
+            ret = -EINVAL;
+    }
+    mutex_unlock(&sc->mutex);
+    if(sta_priv != NULL)
+    {
+        printk("sta: hw_en:%d, sw_en:%d, hw_de:%d, sw_de:%d,\n",
+            (sta_priv->has_hw_encrypt==true),(sta_priv->need_sw_encrypt==true),
+            (sta_priv->has_hw_decrypt==true),(sta_priv->need_sw_decrypt==true));
+    }
+    if(vif_priv)
+    {
+        printk("vif: hw_en:%d, sw_en:%d, hw_de:%d, sw_de:%d, use_mac80211 %d, valid:%d\n",
+            (vif_priv->has_hw_encrypt==true),(vif_priv->need_sw_encrypt==true),
+            (vif_priv->has_hw_decrypt==true),(vif_priv->need_sw_decrypt==true),
+            (vif_priv->use_mac80211_decrypt == true), (vif_priv->is_security_valid==true));
+    }
+#ifdef CONFIG_SSV_SW_ENCRYPT_HW_DECRYPT
+    ret = -EOPNOTSUPP;
+#endif
+#ifndef USE_LOCAL_CRYPTO
+    if ( vif_priv->force_sw_encrypt
+        || (sta_info && (sta_info->hw_wsid != 1) && (sta_info->hw_wsid != 0)))
+    {
+        if (vif_priv->force_sw_encrypt == false)
+            vif_priv->force_sw_encrypt = true;
+        ret = -EOPNOTSUPP;
+    }
+#endif
+    printk(KERN_ERR "SET KEY %d\n", ret);
+    return ret;
+}
+u32 _process_tx_done (struct ssv_softc *sc)
+{
+    struct ieee80211_tx_info *tx_info;
+    struct sk_buff *skb;
+    while ((skb = skb_dequeue(&sc->tx_done_q)))
+    {
+        struct ssv6200_tx_desc *tx_desc;
+        tx_info = IEEE80211_SKB_CB(skb);
+        tx_desc = (struct ssv6200_tx_desc *)skb->data;
+        if(tx_desc->c_type > M2_TXREQ)
+        {
+            ssv_skb_free(skb);
+            printk(KERN_INFO "free cmd skb!\n");
+            continue;
+        }
+        if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
+        {
+            ssv6200_ampdu_release_skb(skb, sc->hw);
+            continue;
+        }
+        skb_pull(skb, SSV6XXX_TX_DESC_LEN);
+        ieee80211_tx_info_clear_status(tx_info);
+        tx_info->flags |= IEEE80211_TX_STAT_ACK;
+        tx_info->status.ack_signal = 100;
+#ifdef REPORT_TX_DONE_IN_IRQ
+        ieee80211_tx_status_irqsafe(sc->hw, skb);
+#else
+        ieee80211_tx_status(sc->hw, skb);
+        if (skb_queue_len(&sc->rx_skb_q))
+            break;
+#endif
+    }
+    return skb_queue_len(&sc->tx_done_q);
+}
+#ifdef REPORT_TX_DONE_IN_IRQ
+void ssv6xxx_tx_cb(struct sk_buff_head *skb_head, void *args)
+{
+    struct ssv_softc *sc=(struct ssv_softc *)args;
+    _process_tx_done*(sc);
+}
+#else
+void ssv6xxx_tx_cb(struct sk_buff_head *skb_head, void *args)
+{
+    struct ssv_softc *sc=(struct ssv_softc *)args;
+    struct sk_buff *skb;
+    while ((skb=skb_dequeue(skb_head)))
+    {
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ssv6200_tx_desc *tx_desc;
+        tx_desc = (struct ssv6200_tx_desc *)skb->data;
+        if(tx_desc->c_type > M2_TXREQ)
+        {
+            ssv_skb_free(skb);
+            printk(KERN_INFO "free cmd skb!\n");
+            continue;
+        }
+        if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
+            ssv6xxx_ampdu_sent(sc->hw, skb);
+        skb_queue_tail(&sc->tx_done_q, skb);
+    }
+    wake_up_interruptible(&sc->rx_wait_q);
+}
+#endif
+#ifdef RATE_CONTROL_REALTIME_UPDATA
+void ssv6xxx_tx_rate_update(struct sk_buff *skb, void *args)
+{
+    struct ieee80211_hdr *hdr;
+    struct ssv_softc *sc = args;
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct ssv6200_tx_desc *tx_desc;
+    struct ssv_rate_info ssv_rate;
+    u32 nav=0;
+    int ret = 0;
+    tx_desc = (struct ssv6200_tx_desc *)skb->data;
+    if(tx_desc->c_type > M2_TXREQ)
+        return;
+    if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
+    {
+        hdr = (struct ieee80211_hdr *)(skb->data+SSV6XXX_TX_DESC_LEN);
+        if ( ( ieee80211_is_data_qos(hdr->frame_control)
+                || ieee80211_is_data(hdr->frame_control))
+            && (tx_desc->wsid < SSV_RC_MAX_HARDWARE_SUPPORT))
+        {
+            ret = ssv6xxx_rc_hw_rate_update_check(skb, sc, tx_desc->do_rts_cts);
+            if (ret & RC_FIRMWARE_REPORT_FLAG)
+            {
+                {
+                    tx_desc->RSVD_0 = SSV6XXX_RC_REPORT;
+                    tx_desc->tx_report = 1;
+                }
+                ret &= 0xf;
+            }
+            if(ret)
+            {
+                ssv6xxx_rc_hw_rate_idx(sc, info, &ssv_rate);
+                tx_desc->crate_idx = ssv_rate.crate_hw_idx;
+                tx_desc->drate_idx = ssv_rate.drate_hw_idx;
+                nav = ssv6xxx_set_frame_duration(info, &ssv_rate, skb->len+FCS_LEN, tx_desc, NULL, NULL);
+                if (tx_desc->tx_burst == 0)
+                {
+                    if (tx_desc->ack_policy != 0x01)
+                        hdr->duration_id = nav;
+                }
+            }
+        }
+    }
+    else
+    {
+    }
+    return;
+}
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
+#define RTS_CTS_PROTECT(_flg) \
+    ((_flg)&IEEE80211_TX_RC_USE_RTS_CTS)? 1: \
+    ((_flg)&IEEE80211_TX_RC_USE_CTS_PROTECT)? 2: 0
+#endif
+void ssv6xxx_update_txinfo (struct ssv_softc *sc, struct sk_buff *skb)
+{
+    struct ieee80211_hdr *hdr;
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct ieee80211_sta *sta;
+    struct ssv_sta_info *sta_info = NULL;
+    struct ssv_sta_priv_data *ssv_sta_priv = NULL;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)info->control.vif->drv_priv;
+    struct ssv6200_tx_desc *tx_desc = (struct ssv6200_tx_desc *)skb->data;
+    struct ieee80211_tx_rate *tx_drate;
+    struct ssv_rate_info ssv_rate;
+    int ac, hw_txqid;
+    u32 nav=0;
+    if (info->flags & IEEE80211_TX_CTL_AMPDU)
+    {
+        struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *)skb->head;
+        sta = ampdu_hdr->ampdu_tid->sta;
+        hdr = (struct ieee80211_hdr *)(skb->data + TXPB_OFFSET + AMPDU_DELIMITER_LEN);
+    }
+    else
+    {
+        struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+        sta = skb_info->sta;
+        hdr = (struct ieee80211_hdr *)(skb->data + TXPB_OFFSET);
+    }
+    if (sta)
+    {
+        ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+        sta_info = ssv_sta_priv->sta_info;
+    }
+    if ((!sc->bq4_dtim) &&
+        (ieee80211_is_mgmt(hdr->frame_control) ||
+        ieee80211_is_nullfunc(hdr->frame_control) ||
+        ieee80211_is_qos_nullfunc(hdr->frame_control))) {
+        ac = 4;
+        hw_txqid = 4;
+    }
+    else if((sc->bq4_dtim) &&
+        info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM){
+        hw_txqid = 4;
+        ac = 4;
+    }
+    else{
+        ac = skb_get_queue_mapping(skb);
+        hw_txqid = sc->tx.hw_txqid[ac];
+    }
+    tx_drate = &info->control.rates[0];
+    ssv6xxx_rc_hw_rate_idx(sc, info, &ssv_rate);
+    tx_desc->len = skb->len;
+    tx_desc->c_type = M2_TXREQ;
+    tx_desc->f80211 = 1;
+    tx_desc->qos = (ieee80211_is_data_qos(hdr->frame_control))? 1: 0;
+    if (tx_drate->flags & IEEE80211_TX_RC_MCS) {
+        if (ieee80211_is_mgmt(hdr->frame_control) &&
+            ieee80211_has_order(hdr->frame_control))
+            tx_desc->ht = 1;
+    }
+    tx_desc->use_4addr = (ieee80211_has_a4(hdr->frame_control))? 1: 0;
+    tx_desc->more_data = (ieee80211_has_morefrags(hdr->frame_control))? 1: 0;
+    tx_desc->stype_b5b4 = (cpu_to_le16(hdr->frame_control)>>4)&0x3;
+    tx_desc->frag = (tx_desc->more_data||(hdr->seq_ctrl&0xf))? 1: 0;
+    tx_desc->unicast = (is_multicast_ether_addr(hdr->addr1)) ? 0: 1;
+    tx_desc->tx_burst = (tx_desc->frag)? 1: 0;
+    tx_desc->wsid = (!sta_info || (sta_info->hw_wsid < 0)) ? 0x0F : sta_info->hw_wsid;
+    tx_desc->txq_idx = hw_txqid;
+    tx_desc->hdr_offset = TXPB_OFFSET;
+    tx_desc->hdr_len = ssv6xxx_frame_hdrlen(hdr, tx_desc->ht);
+    tx_desc->payload_offset = tx_desc->hdr_offset + tx_desc->hdr_len;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+ if(info->control.use_rts)
+  tx_desc->do_rts_cts = IEEE80211_TX_RC_USE_RTS_CTS;
+ else if(info->control.use_cts_prot)
+  tx_desc->do_rts_cts = IEEE80211_TX_RC_USE_CTS_PROTECT;
+#else
+    tx_desc->do_rts_cts = RTS_CTS_PROTECT(tx_drate->flags);
+#endif
+    if(tx_desc->do_rts_cts == IEEE80211_TX_RC_USE_CTS_PROTECT)
+        tx_desc->do_rts_cts = IEEE80211_TX_RC_USE_RTS_CTS;
+    if(tx_desc->do_rts_cts == IEEE80211_TX_RC_USE_CTS_PROTECT)
+    {
+  tx_desc->crate_idx = 0;
+    }
+    else
+        tx_desc->crate_idx = ssv_rate.crate_hw_idx;
+    tx_desc->drate_idx = ssv_rate.drate_hw_idx;
+    if (tx_desc->unicast == 0)
+        tx_desc->ack_policy = 1;
+    else if (tx_desc->qos == 1)
+        tx_desc->ack_policy = (*ieee80211_get_qos_ctl(hdr)&0x60)>>5;
+    else if(ieee80211_is_ctl(hdr->frame_control))
+        tx_desc->ack_policy = 1;
+    tx_desc->security = 0;
+    tx_desc->fCmdIdx = 0;
+    tx_desc->fCmd = (hw_txqid+M_ENG_TX_EDCA0);
+    if (info->flags & IEEE80211_TX_CTL_AMPDU)
+    {
+        #ifdef AMPDU_HAS_LEADING_FRAME
+        tx_desc->fCmd = (tx_desc->fCmd << 4) | M_ENG_CPU;
+        #else
+        tx_desc->RSVD_1 = 1;
+        #endif
+        tx_desc->aggregation = 1;
+        tx_desc->ack_policy = 0x01;
+        if ( (tx_desc->do_rts_cts == 0)
+            && ( (sc->hw->wiphy->rts_threshold == (-1))
+                || ((skb->len - sc->sh->tx_desc_len) > sc->hw->wiphy->rts_threshold)))
+        {
+            tx_drate->flags |= IEEE80211_TX_RC_USE_RTS_CTS;
+            tx_desc->do_rts_cts = 1;
+        }
+    }
+    if ( ieee80211_has_protected(hdr->frame_control)
+        && ( ieee80211_is_data_qos(hdr->frame_control)
+            || ieee80211_is_data(hdr->frame_control)))
+    {
+        if ( (tx_desc->unicast && ssv_sta_priv && ssv_sta_priv->has_hw_encrypt)
+            || (!tx_desc->unicast && vif_priv && vif_priv->has_hw_encrypt))
+        {
+            if (!tx_desc->unicast && !list_empty(&vif_priv->sta_list))
+            {
+                struct ssv_sta_priv_data *one_sta_priv;
+                int hw_wsid;
+                one_sta_priv = list_first_entry(&vif_priv->sta_list, struct ssv_sta_priv_data, list);
+                hw_wsid = one_sta_priv->sta_info->hw_wsid;
+                if (hw_wsid != (-1))
+                {
+                    tx_desc->wsid = hw_wsid;
+                }
+                #if 0
+                printk(KERN_ERR "HW ENC %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+                       tx_desc->wsid,
+                       hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                       hdr->addr1[3], hdr->addr1[4], hdr->addr1[5]);
+                _ssv6xxx_hexdump("M ", (const u8 *)skb->data, (skb->len > 128) ? 128 : skb->len);
+                tx_desc->fCmd = (tx_desc->fCmd << 4) | M_ENG_CPU;
+                #endif
+            }
+            tx_desc->fCmd = (tx_desc->fCmd << 4) | M_ENG_ENCRYPT;
+            #if 0
+            if (dump_count++ < 10)
+            {
+                printk(KERN_ERR "HW ENC %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+                       tx_desc->wsid,
+                       hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                       hdr->addr1[3], hdr->addr1[4], hdr->addr1[5]);
+                tx_desc->tx_report = 1;
+                _ssv6xxx_hexdump("M ", (const u8 *)skb->data, (skb->len > 128) ? 128 : skb->len);
+            }
+            #endif
+        }
+        else if (ssv_sta_priv->need_sw_encrypt)
+        {
+        }
+        else
+        {
+        }
+    }
+    else
+    {
+    }
+    tx_desc->fCmd = (tx_desc->fCmd << 4) | M_ENG_HWHCI;
+    #if 0
+    if ( ieee80211_is_data_qos(hdr->frame_control)
+        || ieee80211_is_data(hdr->frame_control))
+    #endif
+    #if 0
+    if (ieee80211_is_probe_resp(hdr->frame_control))
+    {
+        {
+            printk(KERN_ERR "Probe Resp %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+                   tx_desc->wsid,
+                   hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                   hdr->addr1[3], hdr->addr1[4], hdr->addr1[5]);
+            _ssv6xxx_hexdump("M ", (const u8 *)skb->data, (skb->len > 128) ? 128 : skb->len);
+        }
+    }
+    #endif
+#if 0
+    if ( (sc->sh->cfg.hw_caps & SSV6200_HW_CAP_SECURITY)
+        && (sc->algorithm != ME_NONE)) {
+        if ( (tx_desc->unicast == 0)
+            || (sc->algorithm == ME_WEP104 || sc->algorithm == ME_WEP40))
+        {
+            tx_desc->wsid = 0;
+        }
+    }
+#endif
+#if 0
+    if (tx_desc->aggregation) {
+        tx_desc->do_rts_cts = 0;
+        tx_desc->fCmd = M_ENG_HWHCI|((hw_txqid+M_ENG_TX_EDCA0)<<4);
+        tx_desc->ack_policy = 0x01;
+    }
+#endif
+    if (tx_desc->aggregation == 1)
+    {
+        struct ampdu_hdr_st *ampdu_hdr = (struct ampdu_hdr_st *)skb->head;
+        memcpy(&tx_desc->rc_params[0], ampdu_hdr->rates, sizeof(tx_desc->rc_params));
+        nav = ssv6xxx_set_frame_duration(info, &ssv_rate, (skb->len+FCS_LEN), tx_desc, &tx_desc->rc_params[0], sc);
+        #ifdef FW_RC_RETRY_DEBUG
+        {
+            printk("[FW_RC]:param[0]: drate =%d, count =%d, crate=%d, dl_length =%d, frame_consume_time =%d, rts_cts_nav=%d\n",
+                tx_desc->rc_params[0].drate,tx_desc->rc_params[0].count,tx_desc->rc_params[0].crate,
+                tx_desc->rc_params[0].dl_length, tx_desc->rc_params[0].frame_consume_time, tx_desc->rc_params[0].rts_cts_nav);
+            printk("[FW_RC]:param[1]: drate =%d, count =%d, crate=%d, dl_length =%d, frame_consume_time =%d, rts_cts_nav=%d\n",
+                tx_desc->rc_params[1].drate,tx_desc->rc_params[1].count,tx_desc->rc_params[1].crate,
+                tx_desc->rc_params[1].dl_length, tx_desc->rc_params[1].frame_consume_time, tx_desc->rc_params[1].rts_cts_nav);
+            printk("[FW_RC]:param[2]: drate =%d, count =%d, crate=%d, dl_length =%d, frame_consume_time =%d, rts_cts_nav=%d\n",
+                tx_desc->rc_params[2].drate,tx_desc->rc_params[2].count,tx_desc->rc_params[2].crate,
+                tx_desc->rc_params[2].dl_length, tx_desc->rc_params[2].frame_consume_time, tx_desc->rc_params[2].rts_cts_nav);
+        }
+        #endif
+    }
+    else
+    {
+        nav = ssv6xxx_set_frame_duration(info, &ssv_rate, (skb->len+FCS_LEN), tx_desc, NULL, NULL);
+    }
+    if ( (tx_desc->aggregation==0)) {
+        if (tx_desc->tx_burst == 0) {
+            if (tx_desc->ack_policy != 0x01)
+                hdr->duration_id = nav;
+        }
+        else {
+        }
+    }
+}
+void ssv6xxx_add_txinfo (struct ssv_softc *sc, struct sk_buff *skb)
+{
+    struct ssv6200_tx_desc *tx_desc;
+    skb_push(skb, sc->sh->tx_desc_len);
+    tx_desc = (struct ssv6200_tx_desc *)skb->data;
+    memset((void *)tx_desc, 0, sc->sh->tx_desc_len);
+    ssv6xxx_update_txinfo(sc, skb);
+}
+int ssv6xxx_get_real_index(struct ssv_softc *sc, struct sk_buff *skb)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct ieee80211_tx_rate *tx_drate;
+    struct ssv_rate_info ssv_rate;
+    tx_drate = &info->control.rates[0];
+    ssv6xxx_rc_hw_rate_idx(sc, info, &ssv_rate);
+    return ssv_rate.drate_hw_idx;
+}
+static void _ssv6xxx_tx (struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct ieee80211_vif *vif = info->control.vif;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+#ifdef USE_LOCAL_CRYPTO
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)info->control.vif->drv_priv;
+    struct ssv_sta_priv_data *ssv_sta_priv = sta
+                                              ? (struct ssv_sta_priv_data *)sta->drv_priv
+                                             : NULL;
+#endif
+    struct ssv6200_tx_desc *tx_desc;
+    int ret;
+    unsigned long flags;
+    bool send_hci=false;
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+    if(sc->ps_status == PWRSV_PREPARE)
+    {
+        if(ieee80211_is_data(hdr->frame_control))
+            ssv_wake_timeout(sc, 1);
+    }
+#endif
+    do {
+        if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
+            if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
+                sc->tx.seq_no += 0x10;
+            hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
+            hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
+        }
+        if (sc->dbg_tx_frame) {
+            printk("================================================\n");
+            _ssv6xxx_hexdump("TX frame", (const u8 *)skb->data, skb->len);
+        }
+#if 0
+        if ( (skb->protocol == cpu_to_be16(ETH_P_PAE))
+            && ieee80211_is_data_qos(hdr->frame_control))
+        {
+           printk(KERN_ERR "EAPOL frame is %d\n", skb_get_queue_mapping(skb));
+        }
+#endif
+#ifdef USE_LOCAL_CRYPTO
+        if (
+#ifdef MULTI_THREAD_ENCRYPT
+            (skb_info->crypt_st == PKT_CRYPT_ST_NOT_SUPPORT) &&
+#endif
+            ieee80211_has_protected(hdr->frame_control)
+            && ( ieee80211_is_data_qos(hdr->frame_control)
+                || ieee80211_is_data(hdr->frame_control)))
+        {
+            bool unicast = !is_broadcast_ether_addr(hdr->addr1);
+            if ( ( unicast
+                    && (ssv_sta_priv != NULL)
+                    && ssv_sta_priv->need_sw_encrypt)
+                || ( !unicast
+                    && vif_priv->is_security_valid
+                    && vif_priv->need_sw_encrypt))
+            {
+                if(ssv6xxx_skb_encrypt(skb, sc) == (-1))
+                {
+                    ssv_skb_free(skb);
+                    break;
+                }
+            }
+        }
+        else
+        {
+        }
+#endif
+        if (info->flags & IEEE80211_TX_CTL_AMPDU)
+        {
+            if(ssv6xxx_get_real_index(sc, skb) < SSV62XX_RATE_MCS_INDEX)
+            {
+                info->flags &= (~IEEE80211_TX_CTL_AMPDU);
+                goto tx_mpdu;
+            }
+            #if 0
+            u8 tidno;
+            struct ieee80211_sta *sta = info->control.sta;
+            struct ssv_sta_priv_data *ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+            tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK;
+            if((ssv_sta_priv->ampdu_tid[tidno].state == AMPDU_STATE_OPERATION) &&
+               (sc->ampdu_rekey_pause < AMPDU_REKEY_PAUSE_ONGOING))
+            #endif
+            if (ssv6200_ampdu_tx_handler(hw, skb))
+            {
+                break;
+            }
+            else
+            {
+                info->flags &= (~IEEE80211_TX_CTL_AMPDU);
+            }
+        }
+tx_mpdu:
+        ssv6xxx_add_txinfo(sc, skb);
+        if( vif &&
+            vif->type == NL80211_IFTYPE_AP &&
+            (sc->bq4_dtim) &&
+         info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM )
+        {
+            struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+            u8 buffered = 0;
+            spin_lock_irqsave(&sc->ps_state_lock, flags);
+            if (priv_vif->sta_asleep_mask)
+            {
+                buffered = ssv6200_bcast_enqueue(sc, &sc->bcast_txq, skb);
+                if (1 == buffered) {
+#ifdef BCAST_DEBUG
+                    printk("ssv6200_tx:ssv6200_bcast_start\n");
+#endif
+                    ssv6200_bcast_start(sc);
+                }
+            }
+            spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+            if (buffered)
+                break;
+        }
+        if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
+            struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+            dev_dbg(sc->dev, "vif[%d] sc->bq4_dtim[%d]\n", vif_priv->vif_idx, sc->bq4_dtim);
+        }
+        tx_desc = (struct ssv6200_tx_desc *)skb->data;
+        ret = HCI_SEND(sc->sh, skb, tx_desc->txq_idx);
+        send_hci = true;
+    } while (0);
+#ifdef ENABLE_TX_Q_FLOW_CONTROL
+    if ( (skb_queue_len(&sc->tx_skb_q) < LOW_TX_Q_LEN)
+        #ifdef MULTI_THREAD_ENCRYPT
+        && (skb_queue_len(&sc->preprocess_q) < LOW_CRYPTO_Q_LEN)
+        && (skb_queue_len(&sc->crypted_q) < LOW_CRYPTO_Q_LEN)
+        #endif
+       )
+    {
+       if (sc->tx.flow_ctrl_status != 0)
+       {
+           int ac;
+           for (ac = 0; ac < sc->hw->queues; ac++){
+               if ((sc->tx.flow_ctrl_status & BIT(ac)) == 0)
+                   ieee80211_wake_queue(sc->hw, ac);
+           }
+       }
+       else
+       {
+           ieee80211_wake_queues(sc->hw);
+       }
+    }
+#endif
+    if(sc->dbg_tx_frame){
+        if(send_hci)
+            printk("Tx frame send to HCI\n");
+        else
+            printk("Tx frame queued\n");
+        printk("================================================\n");
+    }
+}
+#ifdef MULTI_THREAD_ENCRYPT
+bool _is_encrypt_needed(struct sk_buff *skb)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)info->control.vif->drv_priv;
+    struct ssv_sta_priv_data *ssv_sta_priv = sta ? (struct ssv_sta_priv_data *)sta->drv_priv : NULL;
+    if ( ( !ieee80211_is_data_qos(hdr->frame_control)
+            && !ieee80211_is_data(hdr->frame_control))
+        || !ieee80211_has_protected(hdr->frame_control))
+        return false;
+    if (!is_unicast_ether_addr(hdr->addr1))
+    {
+        if ( vif_priv->is_security_valid
+            && vif_priv->need_sw_encrypt
+            #ifdef USE_LOCAL_CRYPTO
+            && (vif_priv->crypto_data.ops != NULL)
+            #endif
+           )
+        {
+            return true;
+        }
+    }
+    else if (ssv_sta_priv != NULL)
+    {
+        if ( ssv_sta_priv->need_sw_encrypt
+            #ifdef USE_LOCAL_CRYPTO
+            && (ssv_sta_priv->crypto_data.ops != NULL)
+            #endif
+           )
+            return true;
+    }
+    return false;
+}
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+static int ssv6200_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+static void ssv6200_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+#else
+static void ssv6200_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, struct sk_buff *skb)
+#endif
+{
+    struct ssv_softc *sc = (struct ssv_softc *)hw->priv;
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+#ifdef MULTI_THREAD_ENCRYPT
+    struct ssv_encrypt_task_list *ta = NULL;
+    unsigned long flags;
+    int ret = -EOPNOTSUPP;
+#endif
+    #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    skb_info->sta = info->control.sta;
+    #else
+    skb_info->sta = control ? control->sta : NULL;
+    #endif
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+ skb_info->timestamp = ktime_get();
+#endif
+#if 0
+    _ssv6xxx_tx(hw, skb);
+#else
+    #ifndef MULTI_THREAD_ENCRYPT
+    skb_queue_tail(&sc->tx_skb_q, skb);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (sc->max_tx_skb_q_len < skb_queue_len(&sc->tx_skb_q))
+        sc->max_tx_skb_q_len = skb_queue_len(&sc->tx_skb_q);
+    #endif
+    wake_up_interruptible(&sc->tx_wait_q);
+    #else
+    skb_info->crypt_st = PKT_CRYPT_ST_ENC_DONE;
+    if(_is_encrypt_needed(skb))
+    {
+        skb_info->crypt_st = PKT_CRYPT_ST_ENC_PRE;
+        ret = ssv6xxx_skb_pre_encrypt(skb, sc);
+    }
+    if (ret == 0)
+    {
+        spin_lock_irqsave(&sc->crypt_st_lock, flags);
+        __skb_queue_tail(&sc->preprocess_q, skb);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (sc->max_preprocess_q_len < skb_queue_len(&sc->preprocess_q))
+            sc->max_preprocess_q_len = skb_queue_len(&sc->preprocess_q);
+        #endif
+        spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+        list_for_each_entry(ta, &sc->encrypt_task_head, list)
+        {
+            if((cpu_online(ta->cpu_no)) && (ta->running == 0))
+            {
+                wake_up(&ta->encrypt_wait_q);
+                break;
+            }
+        }
+    }
+    else if(ret == -EOPNOTSUPP)
+    {
+        skb_info->crypt_st = PKT_CRYPT_ST_NOT_SUPPORT;
+        skb_queue_tail(&sc->tx_skb_q, skb);
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        if (sc->max_tx_skb_q_len < skb_queue_len(&sc->tx_skb_q))
+            sc->max_tx_skb_q_len = skb_queue_len(&sc->tx_skb_q);
+        #endif
+        wake_up_interruptible(&sc->tx_wait_q);
+    }
+    else
+    {
+        dev_err(sc->dev, "strange fail to pre-encrypt packet/n");
+    }
+    #endif
+#endif
+#ifdef ENABLE_TX_Q_FLOW_CONTROL
+    do {
+#ifdef MULTI_THREAD_ENCRYPT
+        if ( (skb_queue_len(&sc->preprocess_q) >= MAX_CRYPTO_Q_LEN)
+            || (skb_queue_len(&sc->crypted_q) >= MAX_CRYPTO_Q_LEN))
+        {
+            ieee80211_stop_queues(sc->hw);
+            break;
+        }
+#endif
+        if (skb_queue_len(&sc->tx_skb_q) >= MAX_TX_Q_LEN)
+            ieee80211_stop_queues(sc->hw);
+    } while (0);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+    return NETDEV_TX_OK;
+#endif
+}
+#ifdef MULTI_THREAD_ENCRYPT
+int ssv6xxx_encrypt_task (void *data)
+{
+    struct ssv_softc *sc = (struct ssv_softc *)data;
+    unsigned long flags;
+    struct ssv_encrypt_task_list *ta = NULL;
+    struct task_struct *this_task = current;
+    int ori_prio;
+    int min_prio;
+    int cur_prio;
+    u32 cont_crypto_failure = 0;
+    const u32 max_cont_crypto_failure = 10;
+    ori_prio = this_task->prio;
+    min_prio = 0;
+    cur_prio = ori_prio;
+    dev_err(sc->dev, "Crypto task %d running with priority %d.\n", this_task->pid, ori_prio);
+    list_for_each_entry(ta, &sc->encrypt_task_head, list)
+    {
+        if(ta->encrypt_task == current)
+            break;
+    }
+    while (!kthread_should_stop())
+    {
+        struct sk_buff *skb = NULL;
+        struct ieee80211_hdr *hdr = NULL;
+        unsigned long CPUMask = 0;
+        int enc_ret = 0;
+        volatile bool wakeup_tx;
+        if(skb_queue_len_safe(&sc->preprocess_q) == 0 || (ta->cpu_offline != 0) )
+        {
+            ta->running = 0;
+            set_current_state(TASK_UNINTERRUPTIBLE);
+            wait_event_timeout(ta->encrypt_wait_q,
+                                  ( (ta->cpu_offline == 0)
+                                   && (ta->paused == 0)
+                                   && skb_queue_len_safe(&sc->preprocess_q))
+                               || kthread_should_stop(),
+                               msecs_to_jiffies(60000));
+            set_current_state(TASK_RUNNING);
+            ta->running = 1;
+            CPUMask = *(cpumask_bits(&current->cpus_allowed));
+        }
+        if (kthread_should_stop())
+        {
+            printk("[MT-ENCRYPT]: Quit Encryption task loop ...\n");
+            ta->running = 0;
+            break;
+        }
+        spin_lock_irqsave(&sc->crypt_st_lock, flags);
+        if ((skb = __skb_dequeue(&sc->preprocess_q)) != NULL)
+        {
+            SKB_info * skb_info = (SKB_info *)skb->head;
+            __skb_queue_tail(&sc->crypted_q, skb);
+            #ifdef CONFIG_SSV6XXX_DEBUGFS
+            if (sc->max_crypted_q_len < skb_queue_len(&sc->crypted_q))
+                sc->max_crypted_q_len = skb_queue_len(&sc->crypted_q);
+            #endif
+            spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+            if(skb_info->crypt_st == PKT_CRYPT_ST_ENC_PRE)
+            {
+                enc_ret = ssv6xxx_skb_encrypt(skb, sc);
+                if (enc_ret == 0)
+                {
+                    skb_info->crypt_st = PKT_CRYPT_ST_ENC_DONE;
+                    cont_crypto_failure = 0;
+                    if (cur_prio != ori_prio)
+                    {
+                        struct sched_param sp = { .sched_priority = ori_prio };
+                        spin_lock_irqsave(&sc->crypt_st_lock, flags);
+                        dev_err(sc->dev, "Set crypto task %d priority to %d.\n",
+                                this_task->pid, sp.sched_priority);
+                        sched_setscheduler(this_task, this_task->policy, &sp);
+                        cur_prio = ori_prio;
+                        spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+                    }
+                }
+                else
+                {
+                    skb_info->crypt_st = PKT_CRYPT_ST_FAIL;
+                }
+            }
+            else if(skb_info->crypt_st == PKT_CRYPT_ST_DEC_PRE)
+            {
+                struct ieee80211_sta *sta = skb_info->sta;
+                struct ieee80211_rx_status *rxs = IEEE80211_SKB_RXCB(skb);
+                enc_ret = ssv6xxx_skb_decrypt(skb, sta, sc);
+                if (enc_ret >= 0)
+                {
+                    skb_info->crypt_st = PKT_CRYPT_ST_DEC_DONE;
+                    hdr = (struct ieee80211_hdr *)(skb->data);
+                    hdr->frame_control = hdr->frame_control & ~(cpu_to_le16(IEEE80211_FCTL_PROTECTED));
+                    rxs->flag |= (RX_FLAG_DECRYPTED|RX_FLAG_IV_STRIPPED);
+                }
+                else
+                {
+                    dev_err(sc->dev, "Decrypt fail, skb = %p\n", skb);
+                    skb_info->crypt_st = PKT_CRYPT_ST_FAIL;
+                }
+            }
+            if (skb_info->crypt_st == PKT_CRYPT_ST_FAIL)
+            {
+                spin_lock_irqsave(&sc->crypt_st_lock, flags);
+                __skb_unlink(skb, &sc->crypted_q);
+                #ifdef CONFIG_SMP
+                dev_err(sc->dev, "%d-%d(%d) crypto fail, skb = %p %d %d\n",
+                        this_task->on_cpu, this_task->pid, cur_prio, skb,
+                        cont_crypto_failure, ta->paused);
+                #endif
+                spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+                ssv_skb_free(skb);
+                skb = NULL;
+                if (cont_crypto_failure == max_cont_crypto_failure)
+                {
+                    spin_lock_irqsave(&sc->crypt_st_lock, flags);
+                    if (cur_prio != min_prio)
+                    {
+                        struct sched_param sp = { .sched_priority = min_prio };
+                        sched_setscheduler(this_task, this_task->policy, &sp);
+                        cur_prio = min_prio;
+                        dev_err(sc->dev, "Set crypto task %d priority to %d.\n",
+                                this_task->pid, sp.sched_priority);
+                    }
+                    spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+                }
+                else
+                {
+                    ++cont_crypto_failure;
+                }
+                schedule();
+            }
+        }
+        else
+        {
+            spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+        }
+        spin_lock_irqsave(&sc->crypt_st_lock, flags);
+        skb = NULL;
+        wakeup_tx = false;
+        while((skb = skb_peek(&sc->crypted_q)) != NULL)
+        {
+            SKB_info* skb_info = (SKB_info*)skb->head;
+            if(skb_info->crypt_st == PKT_CRYPT_ST_ENC_DONE)
+            {
+                __skb_unlink(skb, &sc->crypted_q);
+                skb_queue_tail(&sc->tx_skb_q, skb);
+                #ifdef CONFIG_SSV6XXX_DEBUGFS
+                if (sc->max_tx_skb_q_len < skb_queue_len(&sc->tx_skb_q))
+                    sc->max_tx_skb_q_len = skb_queue_len(&sc->tx_skb_q);
+                #endif
+                wakeup_tx = true;
+                skb = NULL;
+            }
+            else if(skb_info->crypt_st == PKT_CRYPT_ST_DEC_DONE)
+            {
+                __skb_unlink(skb, &sc->crypted_q);
+                ieee80211_rx_irqsafe(sc->hw, skb);
+            }
+            else
+                break;
+        }
+        spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+        skb = NULL;
+        if(wakeup_tx)
+        {
+            wake_up_interruptible(&sc->tx_wait_q);
+        }
+    }
+    return 0;
+}
+void _stop_crypto_task (struct ssv_softc *sc)
+{
+    struct ssv_encrypt_task_list *ta = NULL;
+    int num_running = 0;
+    list_for_each_entry(ta, &sc->encrypt_task_head, list)
+    {
+        ta->paused = 1;
+    }
+    do {
+        num_running = 0;
+        list_for_each_entry(ta, &sc->encrypt_task_head, list)
+        {
+            if (ta->running != 0)
+            {
+                int cpu_id = smp_processor_id();
+                if (ta->cpu_no == cpu_id)
+                {
+                    unsigned long flags;
+                    spin_lock_irqsave(&sc->crypt_st_lock, flags);
+                    dev_warn(sc->dev, "Crypto running on the same core. (%d, %d)\n", cpu_id, num_running);
+                    spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+                    continue;
+                }
+                ++num_running;
+                break;
+            }
+        }
+    } while (num_running != 0);
+}
+void _resume_crypto_task (struct ssv_softc *sc)
+{
+    struct ssv_encrypt_task_list *ta = NULL;
+    list_for_each_entry(ta, &sc->encrypt_task_head, list)
+    {
+        ta->paused = 0;
+        wake_up(&ta->encrypt_wait_q);
+    }
+}
+u32 _remove_sta_skb_from_q (struct ssv_softc *sc, struct sk_buff_head *q,
+                             u32 addr0_3, u32 addr4_5)
+{
+    struct sk_buff *skb, *skb_tmp;
+    u32 removed_skb_num = 0;
+    skb_queue_walk_safe(q, skb, skb_tmp)
+    {
+        struct ieee80211_sta *skb_sta;
+        u32 skb_addr0_3;
+        u32 skb_addr4_5;
+        struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+        skb_sta = skb_info->sta;
+        if (skb_sta == NULL)
+            continue;
+        skb_addr0_3 = *(u32 *)&skb_sta->addr[0];
+        skb_addr4_5 = (u32)*(u16 *)&skb_sta->addr[4];
+        if ((addr0_3 != skb_addr0_3) || (addr4_5 != skb_addr4_5))
+            continue;
+        __skb_unlink(skb, q);
+        ssv6xxx_txbuf_free_skb(skb, sc);
+        ++removed_skb_num;
+    }
+    return removed_skb_num;
+}
+void _clean_up_crypto_skb (struct ssv_softc *sc, struct ieee80211_sta *sta)
+{
+    unsigned long flags;
+    u32 sta_addr0_3 = *(u32 *)&sta->addr[0];
+    u32 sta_addr4_5 = (u32)*(u16 *)&sta->addr[4];
+    u32 removed_skb_num;
+    dev_info(sc->dev, "Clean up skb for STA %pM.\n", sta->addr);
+    _stop_crypto_task(sc);
+    spin_lock_irqsave(&sc->crypt_st_lock, flags);
+    removed_skb_num = _remove_sta_skb_from_q(sc, &sc->preprocess_q,
+                                             sta_addr0_3, sta_addr4_5);
+    dev_info(sc->dev, "Removed %u MPDU from precess queue.\n", removed_skb_num);
+    removed_skb_num = _remove_sta_skb_from_q(sc, &sc->crypted_q,
+                                             sta_addr0_3, sta_addr4_5);
+    dev_info(sc->dev, "Removed %u MPDU from encrypted queue.\n", removed_skb_num);
+    spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+    _resume_crypto_task(sc);
+}
+#endif
+int ssv6xxx_tx_task (void *data)
+{
+    struct ssv_softc *sc = (struct ssv_softc *)data;
+    u32 wait_period = SSV_AMPDU_timer_period / 2;
+    printk("SSV6XXX TX Task started.\n");
+    while (!kthread_should_stop())
+    {
+        u32 before_timeout = (-1);
+  set_current_state(TASK_INTERRUPTIBLE);
+        before_timeout = wait_event_interruptible_timeout(sc->tx_wait_q,
+                                                          ( skb_queue_len(&sc->tx_skb_q)
+                                                           || kthread_should_stop()
+                                                           || sc->tx_q_empty),
+                                                           msecs_to_jiffies(wait_period));
+        if (kthread_should_stop())
+        {
+            printk("Quit TX task loop...\n");
+            break;
+        }
+  set_current_state(TASK_RUNNING);
+        do {
+            struct sk_buff *tx_skb = skb_dequeue(&sc->tx_skb_q);
+            if (tx_skb == NULL)
+                break;
+            _ssv6xxx_tx(sc->hw, tx_skb);
+        } while (1);
+#ifdef CONFIG_DEBUG_SKB_TIMESTAMP
+  {
+   struct ssv_hw_txq *hw_txq = NULL;
+   struct ieee80211_tx_info *tx_info = NULL;
+   struct sk_buff *skb = NULL;
+   int txqid;
+   unsigned int timeout;
+   u32 status;
+   for (txqid=0; txqid<SSV_HW_TXQ_NUM; txqid++) {
+    hw_txq = &ssv_dbg_ctrl_hci->hw_txq[txqid];
+    skb = skb_peek(&hw_txq->qhead);
+    if (skb != NULL) {
+     tx_info = IEEE80211_SKB_CB(skb);
+     if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
+      timeout = cal_duration_of_ampdu(skb, SKB_DURATION_STAGE_IN_HWQ);
+     else
+      timeout = cal_duration_of_mpdu(skb);
+     if (timeout > SKB_DURATION_TIMEOUT_MS) {
+      HCI_IRQ_STATUS(ssv_dbg_ctrl_hci, &status);
+      printk("hci int_mask: %08x\n", ssv_dbg_ctrl_hci->int_mask);
+      printk("sdio status: %08x\n", status);
+      printk("hwq%d len: %d\n", txqid, skb_queue_len(&hw_txq->qhead));
+     }
+    }
+   }
+  }
+#endif
+        if (sc->tx_q_empty || (before_timeout == 0))
+        {
+            u32 flused_ampdu = ssv6xxx_ampdu_flush(sc->hw);
+            sc->tx_q_empty = false;
+            if (flused_ampdu == 0 && before_timeout == 0)
+            {
+                wait_period *= 2;
+                if (wait_period > 1000)
+                    wait_period = 1000;
+            }
+        }
+        else
+            wait_period = SSV_AMPDU_timer_period / 2;
+    }
+    return 0;
+}
+int ssv6xxx_rx_task (void *data)
+{
+    struct ssv_softc *sc = (struct ssv_softc *)data;
+    unsigned long wait_period = msecs_to_jiffies(200);
+    unsigned long last_timeout_check_jiffies = jiffies;
+    unsigned long cur_jiffies;
+    printk("SSV6XXX RX Task started.\n");
+    while (!kthread_should_stop())
+    {
+        u32 before_timeout = (-1);
+        set_current_state(TASK_INTERRUPTIBLE);
+        before_timeout = wait_event_interruptible_timeout(sc->rx_wait_q,
+                                                          ( skb_queue_len(&sc->rx_skb_q)
+                                                           || skb_queue_len(&sc->tx_done_q)
+                                                           || kthread_should_stop()),
+                                                           wait_period);
+        if (kthread_should_stop())
+        {
+            printk("Quit RX task loop...\n");
+            break;
+        }
+        set_current_state(TASK_RUNNING);
+        cur_jiffies = jiffies;
+        if ( (before_timeout == 0)
+            || time_before((last_timeout_check_jiffies + wait_period), cur_jiffies))
+        {
+            ssv6xxx_ampdu_check_timeout(sc->hw);
+            last_timeout_check_jiffies = cur_jiffies;
+        }
+        if (skb_queue_len(&sc->rx_skb_q))
+            _process_rx_q(sc, &sc->rx_skb_q, NULL);
+        if (skb_queue_len(&sc->tx_done_q))
+            _process_tx_done(sc);
+    }
+    return 0;
+}
+#ifdef CONFIG_SSV_CABRIO_E
+struct ssv6xxx_iqk_cfg init_iqk_cfg = {
+    SSV6XXX_IQK_CFG_XTAL_26M,
+#ifdef CONFIG_SSV_DPD
+    SSV6XXX_IQK_CFG_PA_LI_MPB,
+#else
+    SSV6XXX_IQK_CFG_PA_DEF,
+#endif
+    0,
+    0,
+    26,
+    3,
+    0x75,
+    0x75,
+    0x80,
+    0x80,
+    SSV6XXX_IQK_CMD_INIT_CALI,
+    { SSV6XXX_IQK_TEMPERATURE
+    + SSV6XXX_IQK_RXDC
+    + SSV6XXX_IQK_RXRC
+    + SSV6XXX_IQK_TXDC
+    + SSV6XXX_IQK_TXIQ
+    + SSV6XXX_IQK_RXIQ
+#ifdef CONFIG_SSV_DPD
+    + SSV6XXX_IQK_PAPD
+#endif
+    },
+};
+#endif
+static int ssv6200_start(struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc=hw->priv;
+    struct ssv_hw *sh=sc->sh;
+    struct ieee80211_channel *chan;
+    mutex_lock(&sc->mutex);
+    if (ssv6xxx_init_mac(sc->sh) != 0) {
+        printk("Initialize ssv6200 mac fail!!\n");
+        ssv6xxx_deinit_mac(sc);
+  mutex_unlock(&sc->mutex);
+        return -1;
+    }
+#ifdef CONFIG_P2P_NOA
+    ssv6xxx_noa_reset(sc);
+#endif
+    HCI_START(sh);
+    ieee80211_wake_queues(hw);
+    ssv6200_ampdu_init(hw);
+    sc->watchdog_flag = WD_KICKED;
+    mutex_unlock(&sc->mutex);
+    mod_timer(&sc->watchdog_timeout, jiffies + WATCHDOG_TIMEOUT);
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+#ifdef CONFIG_SSV_SMARTLINK
+        {
+            extern int ksmartlink_init(void);
+            (void)ksmartlink_init();
+        }
+#endif
+#endif
+#ifdef CONFIG_SSV_CABRIO_E
+    {
+         int ret = ssv6xxx_do_iq_calib(sc->sh, &init_iqk_cfg);
+         if (ret != 0) {
+             printk("IQ Calibration failed (%d)!!\n", ret);
+             return ret;
+         }
+    }
+
+    printk("+++++++++++++++++++++++++++222222222222222!!\n");
+
+	SMAC_REG_WRITE(sc->sh, ADR_PHY_EN_1, 0x217f);
+    if((sh->cfg.chip_identity == SSV6051Z) || (sc->sh->cfg.chip_identity == SSV6051P))
+    {
+        int i;
+        for (i = 0; i < sh->ch_cfg_size; i++)
+        {
+            SMAC_REG_READ(sh, sh->p_ch_cfg[i].reg_addr, &sh->p_ch_cfg[i].ch1_12_value);
+        }
+    }
+#endif
+    #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    chan = hw->conf.channel;
+    #else
+    chan = hw->conf.chandef.chan;
+    #endif
+    sc->cur_channel = chan;
+    printk("%s(): current channel: %d,sc->ps_status=%d\n", __FUNCTION__, sc->cur_channel->hw_value,sc->ps_status);
+    ssv6xxx_set_channel(sc, chan->hw_value);
+    ssv6xxx_rf_enable(sh);
+    return 0;
+}
+static void ssv6200_stop(struct ieee80211_hw *hw)
+{
+    struct ssv_softc *sc=hw->priv;
+    u32 count=0;
+#ifdef CONFIG_SSV_RSSI
+        struct rssi_res_st *rssi_tmp0, *rssi_tmp1;
+#endif
+    printk(KERN_INFO "%s(): sc->ps_status=%d\n", __FUNCTION__,sc->ps_status);
+    mutex_lock(&sc->mutex);
+#ifdef CONFIG_SSV_RSSI
+    list_for_each_entry_safe(rssi_tmp0, rssi_tmp1, &rssi_res.rssi_list, rssi_list) {
+        list_del(&rssi_tmp0->rssi_list);
+        kfree(rssi_tmp0);
+    }
+#endif
+    ssv6200_ampdu_deinit(hw);
+    ssv6xxx_rf_disable(sc->sh);
+    HCI_STOP(sc->sh);
+#ifndef NO_USE_RXQ_LOCK
+    while(0) {
+#else
+    while (skb_queue_len(&sc->rx.rxq_head)) {
+#endif
+        printk("sc->rx.rxq_count=%d\n", sc->rx.rxq_count);
+        count ++;
+        if (count > 90000000) {
+            printk("ERROR....ERROR......ERROR..........\n");
+            break;
+        }
+    }
+    HCI_TXQ_FLUSH(sc->sh, (TXQ_EDCA_0|TXQ_EDCA_1|TXQ_EDCA_2|
+        TXQ_EDCA_3|TXQ_MGMT));
+#if 0
+    cancel_work_sync(&sc->rx_work);
+#endif
+    if((sc->ps_status == PWRSV_PREPARE)||(sc->ps_status == PWRSV_ENABLE)){
+           ssv6xxx_enable_ps(sc);
+           ssv6xxx_rf_enable(sc->sh);
+    }
+    sc->watchdog_flag = WD_SLEEP;
+    mutex_unlock(&sc->mutex);
+    del_timer_sync(&sc->watchdog_timeout);
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+#ifdef CONFIG_SSV_SMARTLINK
+        {
+            extern void ksmartlink_exit(void);
+            ksmartlink_exit();
+        }
+#endif
+#endif
+    printk("%s(): leave\n", __FUNCTION__);
+}
+void inline ssv62xxx_set_bssid(struct ssv_softc *sc, u8 *bssid)
+{
+    memcpy(sc->bssid, bssid, 6);
+    SMAC_REG_WRITE(sc->sh, ADR_BSSID_0, *((u32 *)&sc->bssid[0]));
+    SMAC_REG_WRITE(sc->sh, ADR_BSSID_1, *((u32 *)&sc->bssid[4]));
+}
+struct ssv_vif_priv_data * ssv6xxx_config_vif_res(struct ssv_softc *sc,
+    struct ieee80211_vif *vif)
+{
+    int i;
+    struct ssv_vif_priv_data *priv_vif;
+    struct ssv_vif_info *vif_info;
+    lockdep_assert_held(&sc->mutex);
+    for(i=0 ; i<SSV6200_MAX_VIF ;i++){
+        if (sc->vif_info[i].vif == NULL)
+            break;
+    }
+    BUG_ON(i >= SSV6200_MAX_VIF);
+    printk("ssv6xxx_config_vif_res id[%d].\n", i);
+    priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    memset(priv_vif, 0, sizeof(struct ssv_vif_priv_data));
+    priv_vif->vif_idx = i;
+    memset(&sc->vif_info[i], 0, sizeof(sc->vif_info[0]));
+    sc->vif_info[i].vif = vif;
+    sc->vif_info[i].vif_priv = priv_vif;
+    INIT_LIST_HEAD(&priv_vif->sta_list);
+    priv_vif->pair_cipher = SSV_CIPHER_NONE;
+    priv_vif->group_cipher = SSV_CIPHER_NONE;
+    priv_vif->has_hw_decrypt = false;
+    priv_vif->has_hw_encrypt = false;
+    priv_vif->need_sw_encrypt = false;
+    priv_vif->need_sw_decrypt = false;
+    priv_vif->use_mac80211_decrypt = false;
+    priv_vif->is_security_valid = false;
+    priv_vif->force_sw_encrypt = (vif->type == NL80211_IFTYPE_AP);
+    #ifdef USE_LOCAL_CRYPTO
+    priv_vif->crypto_data.ops = NULL;
+    priv_vif->crypto_data.priv = NULL;
+    #ifdef HAS_CRYPTO_LOCK
+    rwlock_init(&priv_vif->crypto_data.lock);
+    #endif
+    #endif
+    vif_info = &sc->vif_info[priv_vif->vif_idx];
+    vif_info->if_type = vif->type;
+    vif_info->vif = vif;
+    return priv_vif;
+}
+static int ssv6200_add_interface(struct ieee80211_hw *hw,
+                                 struct ieee80211_vif *vif)
+{
+    struct ssv_softc *sc=hw->priv;
+    int ret=0;
+    struct ssv_vif_priv_data *vif_priv = NULL;
+    printk("[I] %s(): vif->type = %d, NL80211_IFTYPE_AP=%d\n", __FUNCTION__, vif->type,NL80211_IFTYPE_AP);
+    if ( (sc->nvif >= SSV6200_MAX_VIF)
+        || ( ( (vif->type == NL80211_IFTYPE_AP)
+                || (vif->p2p))
+            && (sc->ap_vif != NULL)))
+    {
+        dev_err(sc->dev, "Add interface of type %d (p2p: %d) failed.\n", vif->type, vif->p2p);
+        return -EOPNOTSUPP;
+    }
+    mutex_lock(&sc->mutex);
+    vif_priv = ssv6xxx_config_vif_res(sc, vif);
+    if ((vif_priv->vif_idx == 0) && (vif->p2p == 0) && (vif->type == NL80211_IFTYPE_AP))
+    {
+        printk("VIF[0] set bssid and config opmode to ap\n");
+        ssv62xxx_set_bssid(sc, sc->sh->cfg.maddr[0]);
+        SMAC_REG_SET_BITS(sc->sh, ADR_GLBLE_SET, SSV6200_OPMODE_AP, OP_MODE_MSK);
+    }
+    if (vif->type == NL80211_IFTYPE_AP)
+    {
+        BUG_ON(sc->ap_vif != NULL);
+        sc->ap_vif = vif;
+        if ( !vif->p2p
+            && (vif_priv->vif_idx == 0))
+        {
+            printk("Normal AP mode. Config Q4 to DTIM Q.\n");
+            SMAC_REG_SET_BITS(sc->sh, ADR_MTX_BCN_EN_MISC,
+                              MTX_HALT_MNG_UNTIL_DTIM_MSK,
+                              MTX_HALT_MNG_UNTIL_DTIM_MSK);
+            sc->bq4_dtim = true;
+        }
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+        if(vif->p2p == 0)
+        {
+            printk(KERN_INFO "AP mode init wifi_alive_lock\n");
+            ssv_wake_lock(sc);
+			SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_CONTROL, 0x00160200);
+			SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_1, 0x20380050);
+        }
+#endif
+    }
+    sc->nvif++;
+    dev_err(sc->dev, "VIF %02x:%02x:%02x:%02x:%02x:%02x of type %d is added.\n",
+             vif->addr[0], vif->addr[1], vif->addr[2],
+             vif->addr[3], vif->addr[4], vif->addr[5], vif->type);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    ssv6xxx_debugfs_add_interface(sc, vif);
+#endif
+    mutex_unlock(&sc->mutex);
+    return ret;
+}
+static void ssv6200_remove_interface(struct ieee80211_hw *hw,
+                                     struct ieee80211_vif *vif)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+    #ifdef USE_LOCAL_CRYPTO
+    INIT_WRITE_CRYPTO_DATA(crypto_data, &vif_priv->crypto_data);
+    #endif
+    dev_err(sc->dev,
+             "Removing interface %02x:%02x:%02x:%02x:%02x:%02x. PS=%d\n",
+             vif->addr[0], vif->addr[1], vif->addr[2],
+             vif->addr[3], vif->addr[4], vif->addr[5], sc->ps_status);
+    mutex_lock(&sc->mutex);
+    #ifdef USE_LOCAL_CRYPTO
+    START_WRITE_CRYPTO_DATA(crypto_data);
+    if (crypto_data->ops && crypto_data->priv)
+    {
+        crypto_data->ops->deinit(crypto_data->priv);
+    }
+    crypto_data->ops = NULL;
+    crypto_data->priv = NULL;
+    END_WRITE_CRYPTO_DATA(crypto_data);
+    #endif
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    ssv6xxx_debugfs_remove_interface(sc, vif);
+    #endif
+    if (vif->type == NL80211_IFTYPE_AP)
+    {
+        if (sc->bq4_dtim)
+        {
+            sc->bq4_dtim = false;
+            ssv6200_release_bcast_frame_res(sc, vif);
+            SMAC_REG_SET_BITS(sc->sh, ADR_MTX_BCN_EN_MISC,
+                              0, MTX_HALT_MNG_UNTIL_DTIM_MSK);
+            printk("Config Q4 to normal Q \n");
+        }
+        ssv6xxx_beacon_release(sc);
+        sc->ap_vif = NULL;
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+        if(vif->p2p == 0)
+        {
+            ssv_wake_unlock(sc);
+			SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_CONTROL, 0x0);
+            SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_1, 0x20300050);
+            printk(KERN_INFO "AP mode destroy wifi_alive_lock\n");
+        }
+#endif
+    }
+    memset(&sc->vif_info[vif_priv->vif_idx], 0, sizeof(struct ssv_vif_info));
+    sc->nvif--;
+    mutex_unlock(&sc->mutex);
+}
+void ssv6xxx_ps_callback_func(unsigned long data)
+{
+    struct ssv_softc *sc = (struct ssv_softc *)data;
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int retry_cnt=20;
+#ifdef SSV_WAKEUP_HOST
+    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8));
+    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8));
+    SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_TB0+6*4, (sc->mac_deci_tbl[6]|1));
+#else
+    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4));
+    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4));
+    SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_TRASH_CAN<<4));
+#endif
+    skb = ssv_skb_alloc(sizeof(struct cfg_host_cmd));
+    skb->data_len = sizeof(struct cfg_host_cmd);
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->RSVD0 = 0;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_PS;
+    host_cmd->len = skb->data_len;
+#ifdef SSV_WAKEUP_HOST
+    host_cmd->dummy = sc->ps_aid;
+#else
+ host_cmd->dummy = 0;
+#endif
+    sc->ps_aid = 0;
+    while((HCI_SEND_CMD(sc->sh, skb)!=0)&&(retry_cnt)){
+        printk(KERN_INFO "PS cmd retry=%d!!\n",retry_cnt);
+        retry_cnt--;
+    }
+    ssv_skb_free(skb);
+    printk(KERN_INFO "SSV6XXX_HOST_CMD_PS,ps_aid = %d,len=%d,tabl=0x%x\n",host_cmd->dummy,skb->len,(sc->mac_deci_tbl[6]|1));
+}
+void ssv6xxx_enable_ps(struct ssv_softc *sc)
+{
+    sc->ps_status = PWRSV_ENABLE;
+}
+void ssv6xxx_disable_ps(struct ssv_softc *sc)
+{
+    sc->ps_status = PWRSV_DISABLE;
+    printk(KERN_INFO "PowerSave disabled\n");
+}
+int ssv6xxx_watchdog_controller(struct ssv_hw *sh ,u8 flag)
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int ret = 0;
+    printk("ssv6xxx_watchdog_controller %d\n",flag);
+    skb = ssv_skb_alloc(HOST_CMD_HDR_LEN);
+    if(skb == NULL)
+    {
+        printk("init ssv6xxx_watchdog_controller fail!!!\n");
+        return (-1);
+    }
+    skb->data_len = HOST_CMD_HDR_LEN;
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)flag;
+    host_cmd->len = skb->data_len;
+    sh->hci.hci_ops->hci_send_cmd(skb);
+    ssv_skb_free(skb);
+    return ret;
+}
+static int ssv6200_config(struct ieee80211_hw *hw, u32 changed)
+{
+    struct ssv_softc *sc=hw->priv;
+    int ret=0;
+    mutex_lock(&sc->mutex);
+    if (changed & IEEE80211_CONF_CHANGE_PS) {
+        struct ieee80211_conf *conf = &hw->conf;
+        if (conf->flags & IEEE80211_CONF_PS) {
+            printk("Enable IEEE80211_CONF_PS ps_aid=%d\n",sc->ps_aid);
+        }else{
+            printk("Disable IEEE80211_CONF_PS ps_aid=%d\n",sc->ps_aid);
+        }
+    }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+    if (changed & IEEE80211_CONF_CHANGE_QOS) {
+        struct ieee80211_conf *conf = &hw->conf;
+        bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
+        SMAC_REG_SET_BITS(sc->sh, ADR_GLBLE_SET,
+            (qos_active<<QOS_EN_SFT), QOS_EN_MSK);
+    }
+#endif
+    if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
+        struct ieee80211_channel *chan;
+        #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+        chan = hw->conf.channel;
+        #else
+        chan = hw->conf.chandef.chan;
+        #endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+                {
+                    struct ieee80211_channel *curchan = hw->conf.channel;
+                    if(sc->bScanning == true &&
+                        sc->channel_center_freq != curchan->center_freq && sc->isAssoc){
+                        hw->conf.flags |= IEEE80211_CONF_OFFCHANNEL;
+                    }
+                    else{
+                        hw->conf.flags &= ~IEEE80211_CONF_OFFCHANNEL;
+                    }
+                }
+#endif
+#ifdef CONFIG_P2P_NOA
+        if(sc->p2p_noa.active_noa_vif){
+            printk("NOA operating-active vif[%02x] skip scan\n", sc->p2p_noa.active_noa_vif);
+            goto out;
+        }
+#endif
+        if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
+        {
+            if ( (sc->ap_vif == NULL)
+                || list_empty(&((struct ssv_vif_priv_data *)sc->ap_vif->drv_priv)->sta_list))
+            {
+                HCI_PAUSE(sc->sh, (TXQ_EDCA_0|TXQ_EDCA_1|TXQ_EDCA_2|TXQ_EDCA_3| TXQ_MGMT));
+                sc->sc_flags |= SC_OP_OFFCHAN;
+                ssv6xxx_set_channel(sc, chan->hw_value);
+                sc->hw_chan = chan->hw_value;
+                HCI_RESUME(sc->sh, TXQ_MGMT);
+            }
+            else
+            {
+                dev_dbg(sc->dev, "Off-channel to %d is ignored when AP mode enabled.\n", chan->hw_value);
+            }
+        }
+        else {
+            if ( (sc->cur_channel == NULL)
+                || (sc->sc_flags & SC_OP_OFFCHAN)
+                || (sc->hw_chan != chan->hw_value))
+            {
+                HCI_PAUSE(sc->sh, (TXQ_EDCA_0|TXQ_EDCA_1|TXQ_EDCA_2|TXQ_EDCA_3| TXQ_MGMT));
+                ssv6xxx_set_channel(sc, chan->hw_value);
+                sc->cur_channel = chan;
+                HCI_RESUME(sc->sh, (TXQ_EDCA_0|TXQ_EDCA_1|TXQ_EDCA_2|TXQ_EDCA_3|TXQ_MGMT));
+                sc->sc_flags &= ~SC_OP_OFFCHAN;
+            }
+            else
+            {
+                dev_dbg(sc->dev, "Change to the same channel %d\n", chan->hw_value);
+            }
+        }
+    }
+#ifdef CONFIG_P2P_NOA
+out:
+#endif
+    mutex_unlock(&sc->mutex);
+    return ret;
+}
+#if 0
+static int sv6200_conf_tx(struct ieee80211_hw *hw,
+                             struct ieee80211_vif *vif, u16 queue,
+                             const struct ieee80211_tx_queue_params *params)
+{
+    struct ssv_softc *sc = hw->priv;
+    u32 cw;
+    u8 hw_txqid = sc->tx.hw_txqid[queue];
+    printk("[I] sv6200_conf_tx qos[%d] queue[%d] aifsn[%d] cwmin[%d] cwmax[%d] txop[%d] \n",
+    vif->bss_conf.qos, queue, params->aifs, params->cw_min, params->cw_max, params->txop);
+    if (queue > NL80211_TXQ_Q_BK)
+        return 1;
+    mutex_lock(&sc->mutex);
+    #define QOS_EN_MSK 0x00000010
+    #define QOS_EN_I_MSK 0xffffffef
+    #define QOS_EN_SFT 4
+    #define QOS_EN_HI 4
+    #define QOS_EN_SZ 1
+    SMAC_REG_SET_BITS(sc->sh, ADR_GLBLE_SET, (vif->bss_conf.qos<<QOS_EN_SFT), QOS_EN_MSK);
+    cw = params->aifs&0xf;
+    cw|= ((ilog2(params->cw_min+1))&0xf)<<8;
+    cw|= ((ilog2(params->cw_max+1))&0xf)<<12;
+    cw|= ((params->txop)&0xff)<<16;
+    SMAC_REG_WRITE(sc->sh, ADR_TXQ0_MTX_Q_AIFSN+0x100*hw_txqid, cw);
+    mutex_unlock(&sc->mutex);
+    return 0;
+}
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)
+#define SUPPORTED_FILTERS \
+    (FIF_PROMISC_IN_BSS | \
+    FIF_ALLMULTI | \
+    FIF_CONTROL | \
+    FIF_PSPOLL | \
+    FIF_OTHER_BSS | \
+    FIF_BCN_PRBRESP_PROMISC | \
+    FIF_PROBE_REQ | \
+    FIF_FCSFAIL)
+#else
+#define SUPPORTED_FILTERS \
+    (FIF_ALLMULTI | \
+    FIF_CONTROL | \
+    FIF_PSPOLL | \
+    FIF_OTHER_BSS | \
+    FIF_BCN_PRBRESP_PROMISC | \
+    FIF_PROBE_REQ | \
+    FIF_FCSFAIL)
+#endif
+static void ssv6200_config_filter(struct ieee80211_hw *hw,
+    unsigned int changed_flags,
+    unsigned int *total_flags,
+    u64 multicast)
+{
+    changed_flags &= SUPPORTED_FILTERS;
+    *total_flags &= SUPPORTED_FILTERS;
+}
+static void ssv6200_bss_info_changed(struct ieee80211_hw *hw,
+        struct ieee80211_vif *vif, struct ieee80211_bss_conf *info,
+        u32 changed)
+{
+    struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    struct ssv_softc *sc = hw->priv;
+#ifdef CONFIG_P2P_NOA
+    u8 null_address[6]={0};
+#endif
+    mutex_lock(&sc->mutex);
+    if (changed & BSS_CHANGED_ERP_PREAMBLE) {
+        printk("BSS Changed use_short_preamble[%d]\n", info->use_short_preamble);
+        if (info->use_short_preamble)
+            sc->sc_flags |= SC_OP_SHORT_PREAMBLE;
+        else
+            sc->sc_flags &= ~SC_OP_SHORT_PREAMBLE;
+    }
+    if (!priv_vif->vif_idx)
+    {
+        if (changed & BSS_CHANGED_BSSID)
+        {
+#ifdef CONFIG_P2P_NOA
+            struct ssv_vif_priv_data *vif_priv;
+            vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+#endif
+      ssv62xxx_set_bssid(sc, (u8*)info->bssid);
+         printk("BSS_CHANGED_BSSID: %02x:%02x:%02x:%02x:%02x:%02x\n",
+            info->bssid[0], info->bssid[1], info->bssid[2],
+            info->bssid[3], info->bssid[4], info->bssid[5]);
+#ifdef CONFIG_P2P_NOA
+            if(memcmp(info->bssid, null_address, 6))
+                ssv6xxx_noa_hdl_bss_change(sc, MONITOR_NOA_CONF_ADD, vif_priv->vif_idx);
+            else
+                ssv6xxx_noa_hdl_bss_change(sc, MONITOR_NOA_CONF_REMOVE, vif_priv->vif_idx);
+#endif
+        }
+        if (changed & BSS_CHANGED_ERP_SLOT)
+        {
+            u32 regval=0;
+            printk("BSS_CHANGED_ERP_SLOT: use_short_slot[%d]\n", info->use_short_slot);
+            if (info->use_short_slot)
+            {
+                SMAC_REG_READ(sc->sh, ADR_MTX_DUR_IFS, &regval);
+                regval = regval & MTX_DUR_SLOT_I_MSK;
+                regval |= 9 << MTX_DUR_SLOT_SFT;
+                SMAC_REG_WRITE(sc->sh, ADR_MTX_DUR_IFS, regval);
+                SMAC_REG_READ(sc->sh, ADR_MTX_DUR_SIFS_G, &regval);
+#if 1
+                regval = regval & MTX_DUR_BURST_SIFS_G_I_MSK;
+                regval |= 0xa << MTX_DUR_BURST_SIFS_G_SFT;
+#endif
+                regval = regval & MTX_DUR_SLOT_G_I_MSK;
+                regval |= 9 << MTX_DUR_SLOT_G_SFT;
+                SMAC_REG_WRITE(sc->sh, ADR_MTX_DUR_SIFS_G, regval);
+            }
+            else
+            {
+                SMAC_REG_READ(sc->sh, ADR_MTX_DUR_IFS, &regval);
+                regval = regval & MTX_DUR_SLOT_I_MSK;
+                regval |= 20 << MTX_DUR_SLOT_SFT;
+                SMAC_REG_WRITE(sc->sh, ADR_MTX_DUR_IFS, regval);
+                SMAC_REG_READ(sc->sh, ADR_MTX_DUR_SIFS_G, &regval);
+#if 1
+                regval = regval & MTX_DUR_BURST_SIFS_G_I_MSK;
+                regval |= 0xa << MTX_DUR_BURST_SIFS_G_SFT;
+#endif
+                regval = regval & MTX_DUR_SLOT_G_I_MSK;
+                regval |= 20 << MTX_DUR_SLOT_G_SFT;
+                SMAC_REG_WRITE(sc->sh, ADR_MTX_DUR_SIFS_G, regval);
+            }
+        }
+    }
+    if (changed & BSS_CHANGED_HT) {
+        printk("BSS_CHANGED_HT: Untreated!!\n");
+    }
+    if (changed & BSS_CHANGED_BASIC_RATES)
+    {
+        printk("ssv6xxx_rc_update_basic_rate!!\n");
+        ssv6xxx_rc_update_basic_rate(sc, info->basic_rates);
+    }
+    if (vif->type == NL80211_IFTYPE_STATION){
+        printk("NL80211_IFTYPE_STATION!!\n");
+        if ((changed & BSS_CHANGED_ASSOC) && (vif->p2p == 0)){
+            sc->isAssoc = info->assoc;
+            if(!sc->isAssoc){
+                sc->channel_center_freq = 0;
+                sc->ps_aid = 0;
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+                SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_EN3, 0x0400);
+#endif
+                SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_CONTROL, 0x0);
+            }
+            else{
+                struct ieee80211_channel *curchan;
+                #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+                curchan = hw->conf.channel;
+                #else
+                curchan = hw->conf.chandef.chan;
+                #endif
+                sc->channel_center_freq = curchan->center_freq;
+                printk(KERN_INFO "!!info->aid = %d\n",info->aid);
+                sc->ps_aid = info->aid;
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+                SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_EN3, 0x1000);
+#endif
+            }
+        }
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+        else if((changed & BSS_CHANGED_ASSOC) && vif->p2p == 1)
+        {
+            if(info->assoc)
+                SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_EN3, 0x0400);
+            else if(sc->ps_aid != 0)
+                SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_EN3, 0x1000);
+        }
+#endif
+    }
+    if (vif->type == NL80211_IFTYPE_AP)
+    {
+        if (changed & ( BSS_CHANGED_BEACON
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+                       | BSS_CHANGED_SSID
+#endif
+                       | BSS_CHANGED_BSSID
+                       | BSS_CHANGED_BASIC_RATES))
+        {
+#ifdef BROADCAST_DEBUG
+             printk("[A] ssv6200_bss_info_changed:beacon changed\n");
+#endif
+             queue_work(sc->config_wq, &sc->set_tim_work);
+        }
+        if (changed & BSS_CHANGED_BEACON_INT)
+        {
+            printk("[A] BSS_CHANGED_BEACON_INT beacon_interval(%d)\n", info->beacon_int);
+            if (sc->beacon_interval != info->beacon_int)
+            {
+                sc->beacon_interval = info->beacon_int;
+                ssv6xxx_beacon_set_info(sc, sc->beacon_interval, sc->beacon_dtim_cnt);
+            }
+        }
+        if (changed & BSS_CHANGED_BEACON_ENABLED)
+        {
+#ifdef BEACON_DEBUG
+            printk("[A] BSS_CHANGED_BEACON_ENABLED (0x%x)\n", info->enable_beacon);
+#endif
+            if (0 != ssv6xxx_beacon_enable(sc, info->enable_beacon))
+            {
+                dev_err(sc->dev, "Beacon enable %d error.\n", info->enable_beacon);
+            }
+        }
+    }
+    mutex_unlock(&sc->mutex);
+ printk("[I] %s(): leave\n", __FUNCTION__);
+}
+static int ssv6200_sta_add(struct ieee80211_hw *hw,
+                           struct ieee80211_vif *vif,
+                           struct ieee80211_sta *sta)
+{
+    struct ssv_sta_priv_data *sta_priv_dat=NULL;
+    struct ssv_softc *sc=hw->priv;
+    struct ssv_sta_info *sta_info;
+    u32 reg_wsid[] = {ADR_WSID0, ADR_WSID1};
+    int s,i;
+    u32 reg_wsid_tid0[] = {ADR_WSID0_TID0_RX_SEQ, ADR_WSID1_TID0_RX_SEQ};
+    u32 reg_wsid_tid7[] = {ADR_WSID0_TID7_RX_SEQ, ADR_WSID1_TID7_RX_SEQ};
+    unsigned long flags;
+    int ret = 0;
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+#ifdef FW_WSID_WATCH_LIST
+    int fw_sec_caps = SSV6XXX_WSID_SEC_NONE;
+#endif
+    bool tdls_use_sw_cipher = false, tdls_link= false;
+ printk("[I] %s(): vif[%d] ", __FUNCTION__, vif_priv->vif_idx);
+    if (sc->force_triger_reset == true)
+    {
+        vif_priv->sta_asleep_mask = 0;
+        do {
+            spin_lock_irqsave(&sc->ps_state_lock, flags);
+            for (s=0; s<SSV_NUM_STA; s++, sta_info++)
+            {
+                sta_info = &sc->sta_info[s];
+                if ((sta_info->s_flags & STA_FLAG_VALID))
+                {
+                    if (sta_info->sta == sta)
+                    {
+                        printk("search stat %02x:%02x:%02x:%02x:%02x:%02x to  wsid=%d\n",
+                            sta->addr[0], sta->addr[1], sta->addr[2],
+                            sta->addr[3], sta->addr[4], sta->addr[5], sta_info->hw_wsid);
+                        spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+                        return ret;
+                    }
+                }
+            }
+            spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+            if (s >= SSV_NUM_STA)
+            {
+                break;
+            }
+        } while(0);
+    }
+    do {
+        spin_lock_irqsave(&sc->ps_state_lock, flags);
+        if ( !list_empty(&vif_priv->sta_list) && vif->type == NL80211_IFTYPE_STATION){
+            tdls_link = true;
+        }
+        if ((tdls_link) && (vif_priv->pair_cipher != SSV_CIPHER_NONE)
+            && (vif_priv->pair_cipher != SSV_CIPHER_CCMP)
+            && (sc->sh->cfg.use_wpa2_only == false)){
+            tdls_use_sw_cipher = true;
+        }
+        #if 1
+        if (((vif_priv->vif_idx == 0) && (tdls_use_sw_cipher == false))
+            || sc->sh->cfg.use_wpa2_only)
+            s = 0;
+        else
+            s = 2;
+        #else
+        #endif
+        for (; s < SSV_NUM_STA; s++)
+        {
+            sta_info = &sc->sta_info[s];
+            if ((sta_info->s_flags & STA_FLAG_VALID) == 0)
+            {
+                sta_info->aid = sta->aid;
+                sta_info->sta = sta;
+                sta_info->vif = vif;
+                sta_info->s_flags = STA_FLAG_VALID;
+                sta_priv_dat =
+                    (struct ssv_sta_priv_data *)sta->drv_priv;
+                sta_priv_dat->sta_idx = s;
+                sta_priv_dat->sta_info = sta_info;
+                sta_priv_dat->has_hw_encrypt = false;
+                sta_priv_dat->has_hw_decrypt = false;
+                sta_priv_dat->need_sw_decrypt = false;
+                sta_priv_dat->need_sw_encrypt = false;
+                sta_priv_dat->use_mac80211_decrypt = false;
+                #ifdef USE_LOCAL_CRYPTO
+                sta_priv_dat->crypto_data.ops = NULL;
+                sta_priv_dat->crypto_data.priv = NULL;
+                #ifdef HAS_CRYPTO_LOCK
+                rwlock_init(&sta_priv_dat->crypto_data.lock);
+                #endif
+                #endif
+                if ( (vif_priv->pair_cipher == SSV_CIPHER_WEP40)
+                    || (vif_priv->pair_cipher == SSV_CIPHER_WEP104))
+                {
+                    #ifdef USE_LOCAL_CRYPTO
+                    if (vif_priv->crypto_data.ops != NULL)
+                    {
+                        sta_priv_dat->crypto_data.ops = vif_priv->crypto_data.ops;
+                        sta_priv_dat->crypto_data.priv = vif_priv->crypto_data.priv;
+                    }
+                    #endif
+                    sta_priv_dat->has_hw_encrypt = vif_priv->has_hw_encrypt;
+                    sta_priv_dat->has_hw_decrypt = vif_priv->has_hw_decrypt;
+                    sta_priv_dat->need_sw_encrypt = vif_priv->need_sw_encrypt;
+                    sta_priv_dat->need_sw_decrypt = vif_priv->need_sw_decrypt;
+                }
+                list_add_tail(&sta_priv_dat->list, &vif_priv->sta_list);
+                break;
+            }
+        }
+        spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+        if (s >= SSV_NUM_STA)
+        {
+            dev_err(sc->dev, "Number of STA exceeds driver limitation %d\n.", SSV_NUM_STA);
+            ret = -1;
+            break;
+        }
+        #ifdef CONFIG_SSV6XXX_DEBUGFS
+        ssv6xxx_debugfs_add_sta(sc, sta_info);
+        #endif
+        sta_info->hw_wsid = -1;
+        if (sta_priv_dat->sta_idx < SSV_NUM_HW_STA)
+        {
+            #if 0
+            SMAC_REG_READ(sc->sh, reg_wsid[s], &reg_val);
+            if ((reg_val & 0x01) == 0)
+            {
+            #endif
+            SMAC_REG_WRITE(sc->sh, reg_wsid[s]+4, *((u32 *)&sta->addr[0]));
+            SMAC_REG_WRITE(sc->sh, reg_wsid[s]+8, *((u32 *)&sta->addr[4]));
+            SMAC_REG_WRITE(sc->sh, reg_wsid[s], 1);
+            for (i = reg_wsid_tid0[s]; i <= reg_wsid_tid7[s]; i += 4)
+                 SMAC_REG_WRITE(sc->sh, i, 0);
+            ssv6xxx_rc_hw_reset(sc, sta_priv_dat->rc_idx, s);
+            sta_info->hw_wsid = sta_priv_dat->sta_idx;
+        }
+        #ifdef FW_WSID_WATCH_LIST
+        else if ( (vif_priv->vif_idx == 0)
+                 || sc->sh->cfg.use_wpa2_only
+                )
+        {
+            sta_info->hw_wsid = sta_priv_dat->sta_idx;
+        }
+        #endif
+#ifdef SSV6200_ECO
+        if ((sta_priv_dat->has_hw_encrypt || sta_priv_dat->has_hw_decrypt) &&
+            ((vif_priv->pair_cipher == SSV_CIPHER_WEP40) || (vif_priv->pair_cipher == SSV_CIPHER_WEP104)))
+        {
+            struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+            struct ssv6xxx_hw_sec *sramKey = &vif_info->sramKey;
+            _set_wep_hw_crypto_pair_key(sc, vif_info, sta_info, (void*)sramKey);
+            if (sramKey->sta_key[0].pair_key_idx != 0)
+            {
+                _set_wep_hw_crypto_group_key(sc, vif_info, sta_info, (void*)sramKey);
+            }
+        }
+#endif
+        ssv6200_ampdu_tx_add_sta(hw, sta);
+        #ifdef FW_WSID_WATCH_LIST
+        if (sta_info->hw_wsid >= SSV_NUM_HW_STA)
+        {
+            if (sta_priv_dat->has_hw_decrypt)
+                fw_sec_caps = SSV6XXX_WSID_SEC_PAIRWISE;
+            if (vif_priv->has_hw_decrypt)
+                fw_sec_caps |= SSV6XXX_WSID_SEC_GROUP;
+            hw_update_watch_wsid(sc, sta, sta_info, sta_priv_dat->sta_idx,
+                fw_sec_caps, SSV6XXX_WSID_OPS_ADD);
+        } else if (SSV6200_USE_HW_WSID(sta_priv_dat->sta_idx)) {
+           hw_update_watch_wsid(sc, sta, sta_info, sta_priv_dat->sta_idx,
+                SSV6XXX_WSID_SEC_SW, SSV6XXX_WSID_OPS_HWWSID_PAIRWISE_SET_TYPE);
+              hw_update_watch_wsid(sc, sta, sta_info, sta_priv_dat->sta_idx,
+                SSV6XXX_WSID_SEC_SW, SSV6XXX_WSID_OPS_HWWSID_GROUP_SET_TYPE);
+        }
+        #endif
+        printk("Add %02x:%02x:%02x:%02x:%02x:%02x to VIF %d sw_idx=%d, wsid=%d\n",
+               sta->addr[0], sta->addr[1], sta->addr[2],
+               sta->addr[3], sta->addr[4], sta->addr[5],
+               vif_priv->vif_idx,
+               sta_priv_dat->sta_idx, sta_info->hw_wsid);
+    } while (0);
+    return ret;
+}
+void ssv6200_rx_flow_check(struct ssv_sta_priv_data *sta_priv_dat,
+    struct ssv_softc *sc)
+ {
+    if (SSV6200_USE_HW_WSID(sta_priv_dat->sta_idx) && (sta_priv_dat->need_sw_decrypt)){
+        int other_hw_wsid = (sta_priv_dat->sta_idx+ 1) & 1;
+        struct ssv_sta_info *sta_info = &sc->sta_info[other_hw_wsid];
+        struct ieee80211_sta *sta = sta_info->sta;
+        struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *) sta->drv_priv;
+        mutex_lock(&sc->mutex);
+        if ((sta_info-> s_flags == 0)
+            || ((sta_info-> s_flags && STA_FLAG_VALID) && (sta_priv->has_hw_decrypt))){
+            #ifdef CONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+                SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+            #else
+                SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_ENCRYPT_SEC<<4)|(M_ENG_HWHCI<<8));
+            #endif
+            printk("redirect Rx flow for sta %d  disconnect\n",sta_priv_dat->sta_idx);
+        }
+        mutex_unlock(&sc->mutex);
+    }
+}
+static int ssv6200_sta_remove(struct ieee80211_hw *hw,
+   struct ieee80211_vif *vif,
+   struct ieee80211_sta *sta)
+{
+    u32 reg_wsid[] = {ADR_WSID0, ADR_WSID1};
+    struct ssv_sta_priv_data *sta_priv_dat = (struct ssv_sta_priv_data *)sta->drv_priv;
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_sta_info *sta_info = sta_priv_dat->sta_info;
+    unsigned long flags;
+    u32 bit;
+    struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    u8 hw_wsid = -1;
+    #ifdef USE_LOCAL_CRYPTO
+    INIT_WRITE_CRYPTO_DATA(crypto_data, &sta_priv_dat->crypto_data);
+    #endif
+    BUG_ON(sta_priv_dat->sta_idx >= SSV_NUM_STA);
+    dev_notice(sc->dev,
+               "Removing STA %d (%02X:%02X:%02X:%02X:%02X:%02X) from VIF %d\n.",
+               sta_priv_dat->sta_idx, sta->addr[0], sta->addr[1], sta->addr[2],
+               sta->addr[3], sta->addr[4], sta->addr[5], priv_vif->vif_idx);
+    ssv6200_rx_flow_check(sta_priv_dat, sc);
+    spin_lock_irqsave(&sc->ps_state_lock, flags);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    #endif
+    #ifdef USE_LOCAL_CRYPTO
+    START_WRITE_CRYPTO_DATA(crypto_data);
+    if (crypto_data->ops)
+    {
+        if ( (priv_vif->crypto_data.ops != crypto_data->ops)
+            && crypto_data->priv)
+        {
+            crypto_data->ops->deinit(crypto_data->priv);
+            dev_info(sc->dev, "STA releases crypto OK!\n");
+        }
+        crypto_data->priv = NULL;
+        crypto_data->ops = NULL;
+    }
+    END_WRITE_CRYPTO_DATA(crypto_data);
+    #ifdef MULTI_THREAD_ENCRYPT
+    _clean_up_crypto_skb(sc, sta);
+    #endif
+    #endif
+#if 0
+    if ((sc->ps_status == PWRSV_PREPARE)||(sc->ps_status == PWRSV_ENABLE)) {
+        memset(sta_info, 0, sizeof(*sta_info));
+        sta_priv_dat->sta_idx = -1;
+        list_del(&sta_priv_dat->list);
+        spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+        return 0;
+    }
+#endif
+    bit = BIT(sta_priv_dat->sta_idx);
+    priv_vif->sta_asleep_mask &= ~bit;
+    if (sta_info->hw_wsid != -1) {
+#ifndef FW_WSID_WATCH_LIST
+        BUG_ON(sta_info->hw_wsid >= SSV_NUM_HW_STA);
+#endif
+        hw_wsid = sta_info->hw_wsid;
+    }
+#ifdef FW_WSID_WATCH_LIST
+    if (sta_info->hw_wsid >= SSV_NUM_HW_STA)
+    {
+        spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+        hw_update_watch_wsid(sc, sta, sta_info, sta_info->hw_wsid, 0, SSV6XXX_WSID_OPS_DEL);
+        spin_lock_irqsave(&sc->ps_state_lock, flags);
+    }
+#endif
+#if 0
+    printk("%s(): sw_idx=%d, hw_idx=%d sta_asleep_mask[%08x]\n", __FUNCTION__,
+        sta_priv_dat->sta_idx , sta_info->hw_wsid, sc->sta_asleep_mask);
+    printk("Remove %02x:%02x:%02x:%02x:%02x:%02x to sw_idx=%d, wsid=%d\n",
+    sta->addr[0], sta->addr[1], sta->addr[2],
+    sta->addr[3], sta->addr[4], sta->addr[5], sta_priv_dat->sta_idx, sta_info->hw_wsid);
+#endif
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    {
+    ssv6xxx_debugfs_remove_sta(sc, sta_info);
+    }
+    #endif
+    memset(sta_info, 0, sizeof(*sta_info));
+    sta_priv_dat->sta_idx = -1;
+    list_del(&sta_priv_dat->list);
+    if (list_empty(&priv_vif->sta_list) && vif->type == NL80211_IFTYPE_STATION)
+    {
+        priv_vif->pair_cipher = 0;
+        priv_vif->group_cipher = 0;
+    }
+    spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+#if 0
+    sta_info = sc->sta_info;
+    for(s=0; s<SSV_NUM_STA; s++, sta_info++) {
+        if (sta_info->s_flags & STA_FLAG_VALID)
+            continue;
+        if (sta_info->sta == sta &&
+            sta_info->vif == vif)
+    sta_info->s_flags = 0;
+    }
+#endif
+#ifndef FW_WSID_WATCH_LIST
+    if(hw_wsid != -1)
+#else
+    if((hw_wsid != -1) && (hw_wsid < SSV_NUM_HW_STA))
+#endif
+        SMAC_REG_WRITE(sc->sh, reg_wsid[hw_wsid], 0x00);
+    return 0;
+}
+static void ssv6200_sta_notify(struct ieee80211_hw *hw,
+                                 struct ieee80211_vif *vif,
+                                 enum sta_notify_cmd cmd,
+                                 struct ieee80211_sta *sta)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    struct ssv_sta_priv_data *sta_priv_dat =
+        sta != NULL ? (struct ssv_sta_priv_data *)sta->drv_priv : NULL;
+    struct ssv_sta_info *sta_info;
+    u32 bit, prev;
+    unsigned long flags;
+#ifdef BROADCAST_DEBUG
+#endif
+    spin_lock_irqsave(&sc->ps_state_lock, flags);
+    if (sta_priv_dat != NULL){
+        bit = BIT(sta_priv_dat->sta_idx);
+     prev = priv_vif->sta_asleep_mask & bit;
+     sta_info = sta_priv_dat->sta_info;
+        switch (cmd)
+        {
+            case STA_NOTIFY_SLEEP:
+                if(!prev)
+                {
+                    sta_info->sleeping = true;
+                    if ( (vif->type == NL80211_IFTYPE_AP)
+                        && sc->bq4_dtim
+                        && !priv_vif->sta_asleep_mask
+                        && ssv6200_bcast_queue_len(&sc->bcast_txq)){
+                        printk("%s(): ssv6200_bcast_start\n", __FUNCTION__);
+                        ssv6200_bcast_start(sc);
+                    }
+        priv_vif->sta_asleep_mask |= bit;
+                }
+                break;
+            case STA_NOTIFY_AWAKE:
+                if(prev)
+                {
+                    sta_info->sleeping = false;
+        priv_vif->sta_asleep_mask &= ~bit;
+                }
+                break;
+            default:
+                break;
+        }
+    }
+    spin_unlock_irqrestore(&sc->ps_state_lock, flags);
+}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
+static u64 ssv6200_get_tsf(struct ieee80211_hw *hw)
+#else
+static u64 ssv6200_get_tsf(struct ieee80211_hw *hw,
+                           struct ieee80211_vif *vif)
+#endif
+{
+    u64 time = jiffies*1000*1000/HZ;
+    //struct timeval tv;
+
+    //do_gettimeofday(&tv);
+    //time = tv.tv_sec * 1000 * 1000 + tv.tv_usec;
+    printk("%s(): time = %llu\n", __FUNCTION__, time);
+    return time;
+    //return 0;
+}
+
+static u64 ssv6200_get_systime_us(void)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+	struct timespec ts;
+	get_monotonic_boottime(&ts);
+	return ((u64)ts.tv_sec * 1000000) + ts.tv_nsec / 1000;
+#else
+	struct timeval tv;
+	do_gettimeofday(&tv);
+	return ((u64)tv.tv_sec * 1000000) + tv.tv_usec;
+#endif
+}
+
+static u32 pre_11b_cca_control;
+static u32 pre_11b_cca_1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
+static void ssv6200_sw_scan_start(struct ieee80211_hw *hw,
+         struct ieee80211_vif *vif, const u8 *mac_addr)
+#else
+static void ssv6200_sw_scan_start(struct ieee80211_hw *hw)
+#endif
+{
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+    ((struct ssv_softc *)(hw->priv))->bScanning = true;
+//#endif
+ SMAC_REG_READ(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_CONTROL, &pre_11b_cca_control);
+    SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_CONTROL, 0x0);
+ SMAC_REG_READ(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_1, &pre_11b_cca_1);
+ SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_1, RX_11B_CCA_IN_SCAN);
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+    SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_MRX_FLT_EN3, 0x0400);
+#endif
+    printk("--------------%s(): \n", __FUNCTION__);
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
+static void ssv6200_sw_scan_complete(struct ieee80211_hw *hw,
+         struct ieee80211_vif *vif)
+#else
+static void ssv6200_sw_scan_complete(struct ieee80211_hw *hw)
+#endif
+{
+
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+    bool is_p2p_assoc;
+#endif
+	((struct ssv_softc *)(hw->priv))->bScanning = false;
+    SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_CONTROL, pre_11b_cca_control);
+    SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_RX_11B_CCA_1, pre_11b_cca_1);
+#ifdef CONFIG_SSV_MRX_EN3_CTRL
+    is_p2p_assoc = ((struct ssv_softc *)(hw->priv))->vif_info[1].vif->bss_conf.assoc;
+    if(((struct ssv_softc *)(hw->priv))->ps_aid != 0 && (!is_p2p_assoc))
+    SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_MRX_FLT_EN3, 0x1000);
+#endif
+    printk("==============%s(): \n", __FUNCTION__);
+}
+static int ssv6200_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
+                            bool set)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ssv_sta_info *sta_info = sta
+                                    ? ((struct ssv_sta_priv_data *)sta->drv_priv)->sta_info
+                                    : NULL;
+    if (sta_info && (sta_info->tim_set^set))
+    {
+#ifdef BROADCAST_DEBUG
+           printk("[I] [A] ssvcabrio_set_tim");
+#endif
+        sta_info->tim_set = set;
+        queue_work(sc->config_wq, &sc->set_tim_work);
+    }
+    return 0;
+}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
+static int ssv6200_conf_tx(struct ieee80211_hw *hw, u16 queue,
+           const struct ieee80211_tx_queue_params *params)
+#else
+static int ssv6200_conf_tx(struct ieee80211_hw *hw,
+                             struct ieee80211_vif *vif, u16 queue,
+                             const struct ieee80211_tx_queue_params *params)
+#endif
+{
+    struct ssv_softc *sc = hw->priv;
+    u32 cw;
+    u8 hw_txqid = sc->tx.hw_txqid[queue];
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+    struct ssv_vif_priv_data *priv_vif = (struct ssv_vif_priv_data *)vif->drv_priv;
+    printk("[I] sv6200_conf_tx vif[%d] qos[%d] queue[%d] aifsn[%d] cwmin[%d] cwmax[%d] txop[%d] \n",
+  priv_vif->vif_idx ,vif->bss_conf.qos, queue, params->aifs, params->cw_min, params->cw_max, params->txop);
+#else
+    printk("[I] sv6200_conf_tx queue[%d] aifsn[%d] cwmin[%d] cwmax[%d] txop[%d] \n",
+        queue, params->aifs, params->cw_min, params->cw_max, params->txop);
+#endif
+    if (queue > NL80211_TXQ_Q_BK)
+        return 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+    if (priv_vif->vif_idx != 0) {
+        dev_warn(sc->dev, "WMM setting applicable to primary interface only.\n");
+        return 1;
+    }
+#endif
+    mutex_lock(&sc->mutex);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+    SMAC_REG_SET_BITS(sc->sh, ADR_GLBLE_SET,
+            (vif->bss_conf.qos<<QOS_EN_SFT), QOS_EN_MSK);
+#endif
+#if 0
+    {
+        cw = 0x4;
+        SMAC_REG_WRITE(sc->sh, ADR_TXQ0_MTX_Q_MISC_EN+0x100*hw_txqid, cw);
+        cw = 0x0;
+        SMAC_REG_WRITE(sc->sh, ADR_TXQ0_MTX_Q_BKF_CNT+0x100*hw_txqid, cw);
+    }
+#endif
+#if 1
+    cw = (params->aifs-1)&0xf;
+#else
+    cw = params->aifs&0xf;
+#endif
+    cw|= ((ilog2(params->cw_min+1))&0xf)<<TXQ1_MTX_Q_ECWMIN_SFT;
+    cw|= ((ilog2(params->cw_max+1))&0xf)<<TXQ1_MTX_Q_ECWMAX_SFT;
+    cw|= ((params->txop)&0xff)<<TXQ1_MTX_Q_TXOP_LIMIT_SFT;
+    SMAC_REG_WRITE(sc->sh, ADR_TXQ0_MTX_Q_AIFSN+0x100*hw_txqid, cw);
+    mutex_unlock(&sc->mutex);
+    return 0;
+}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+static int ssv6200_ampdu_action(struct ieee80211_hw *hw,
+              struct ieee80211_vif *vif,
+              enum ieee80211_ampdu_mlme_action action,
+              struct ieee80211_sta *sta,
+              u16 tid, u16 *ssn)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) && LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
+static int ssv6200_ampdu_action(struct ieee80211_hw *hw,
+              struct ieee80211_vif *vif,
+              enum ieee80211_ampdu_mlme_action action,
+              struct ieee80211_sta *sta,
+              u16 tid, u16 *ssn, u8 buf_size)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0) && LINUX_VERSION_CODE < KERNEL_VERSION(4,4,69)
+static int ssv6200_ampdu_action(struct ieee80211_hw *hw,
+              struct ieee80211_vif *vif,
+              enum ieee80211_ampdu_mlme_action action,
+              struct ieee80211_sta *sta,
+              u16 tid, u16 *ssn, u8 buf_size, bool amsdu)
+#else
+static int ssv6200_ampdu_action(struct ieee80211_hw *hw,
+              struct ieee80211_vif *vif,
+              struct ieee80211_ampdu_params *params)
+#endif
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+    u8 buf_size = 32;
+#endif
+    struct ssv_softc *sc = hw->priv;
+    int ret = 0;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,69)
+    struct ieee80211_sta *sta = params->sta;
+    enum ieee80211_ampdu_mlme_action action = params->action;
+    u16 tid = params->tid;
+    u16 *ssn = &(params->ssn);
+    u8 buf_size = params->buf_size;
+#endif
+    if(sta == NULL)
+        return ret;
+    #if (!Enable_AMPDU_Rx)
+    if(action == IEEE80211_AMPDU_RX_START || action == IEEE80211_AMPDU_RX_STOP )
+    {
+        ampdu_db_log("Disable AMPDU_RX for test(1).\n");
+        return -EOPNOTSUPP;
+    }
+    #endif
+    #if (!Enable_AMPDU_Tx)
+    if(action == IEEE80211_AMPDU_TX_START || action == IEEE80211_AMPDU_TX_STOP || action == IEEE80211_AMPDU_TX_OPERATIONAL )
+    {
+        ampdu_db_log("Disable AMPDU_TX for test(1).\n");
+        return -EOPNOTSUPP;
+    }
+    #endif
+    if((action == IEEE80211_AMPDU_RX_START || action == IEEE80211_AMPDU_RX_STOP ) &&
+        (!(sc->sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_RX)))
+    {
+        ampdu_db_log("Disable AMPDU_RX(2).\n");
+        return -EOPNOTSUPP;
+    }
+    if( ( action == IEEE80211_AMPDU_TX_START
+           #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+           || action == IEEE80211_AMPDU_TX_STOP
+           #else
+           || action == IEEE80211_AMPDU_TX_STOP_CONT
+           || action == IEEE80211_AMPDU_TX_STOP_FLUSH
+           || action == IEEE80211_AMPDU_TX_STOP_FLUSH_CONT
+           #endif
+           || action == IEEE80211_AMPDU_TX_OPERATIONAL )
+       && (!(sc->sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_TX)))
+    {
+        ampdu_db_log("Disable AMPDU_TX(2).\n");
+        return -EOPNOTSUPP;
+    }
+    switch (action)
+    {
+        case IEEE80211_AMPDU_RX_START:
+#ifdef WIFI_CERTIFIED
+            if (sc->rx_ba_session_count >= SSV6200_RX_BA_MAX_SESSIONS)
+            {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,1,0)
+                ieee80211_stop_rx_ba_session(vif,
+           (1<<(sc->ba_tid)),
+           sc->ba_ra_addr);
+#endif
+                sc->rx_ba_session_count--;
+            }
+#else
+            if ((sc->rx_ba_session_count >= SSV6200_RX_BA_MAX_SESSIONS) && (sc->rx_ba_sta != sta))
+            {
+                ret = -EBUSY;
+                break;
+            }
+            else if ((sc->rx_ba_session_count >= SSV6200_RX_BA_MAX_SESSIONS) && (sc->rx_ba_sta == sta))
+            {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,1,0)
+                ieee80211_stop_rx_ba_session(vif,(1<<(sc->ba_tid)),sc->ba_ra_addr);
+#endif
+                sc->rx_ba_session_count--;
+            }
+#endif
+            printk(KERN_ERR "IEEE80211_AMPDU_RX_START %02X:%02X:%02X:%02X:%02X:%02X %d.\n",
+                   sta->addr[0], sta->addr[1], sta->addr[2], sta->addr[3],
+                   sta->addr[4], sta->addr[5], tid);
+            sc->rx_ba_session_count++;
+            sc->rx_ba_sta = sta;
+            sc->ba_tid = tid;
+            sc->ba_ssn = *ssn;
+            memcpy(sc->ba_ra_addr, sta->addr, ETH_ALEN);
+            queue_work(sc->config_wq, &sc->set_ampdu_rx_add_work);
+            break;
+        case IEEE80211_AMPDU_RX_STOP:
+            sc->rx_ba_session_count--;
+            if (sc->rx_ba_session_count == 0)
+                sc->rx_ba_sta = NULL;
+            queue_work(sc->config_wq, &sc->set_ampdu_rx_del_work);
+            break;
+        case IEEE80211_AMPDU_TX_START:
+            printk(KERN_ERR "AMPDU_TX_START %02X:%02X:%02X:%02X:%02X:%02X %d.\n",
+                   sta->addr[0], sta->addr[1], sta->addr[2], sta->addr[3],
+                   sta->addr[4], sta->addr[5], tid);
+            ssv6200_ampdu_tx_start(tid, sta, hw, ssn);
+            ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
+            break;
+        #if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+        case IEEE80211_AMPDU_TX_STOP:
+        #else
+        case IEEE80211_AMPDU_TX_STOP_CONT:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
+        #endif
+            printk(KERN_ERR "AMPDU_TX_STOP %02X:%02X:%02X:%02X:%02X:%02X %d.\n",
+                   sta->addr[0], sta->addr[1], sta->addr[2], sta->addr[3],
+                   sta->addr[4], sta->addr[5], tid);
+            ssv6200_ampdu_tx_stop(tid, sta, hw);
+            ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
+            break;
+        case IEEE80211_AMPDU_TX_OPERATIONAL:
+            printk(KERN_ERR "AMPDU_TX_OPERATIONAL %02X:%02X:%02X:%02X:%02X:%02X %d.\n",
+                   sta->addr[0], sta->addr[1], sta->addr[2], sta->addr[3],
+                   sta->addr[4], sta->addr[5], tid);
+            ssv6200_ampdu_tx_operation(tid, sta, hw, buf_size);
+            break;
+        default:
+            ret = -EOPNOTSUPP;
+            break;
+    }
+    return ret;
+}
+#ifdef CONFIG_PM
+int ssv6xxx_suspend (struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)
+{
+    printk("ssv6xxx_suspend \n");
+    return 0;
+}
+int ssv6xxx_resume (struct ieee80211_hw *hw)
+{
+    printk("ssv6xxx_resume \n");
+    return 0;
+}
+#endif
+struct ieee80211_ops ssv6200_ops =
+{
+    .tx = ssv6200_tx,
+    .start = ssv6200_start,
+    .stop = ssv6200_stop,
+    .add_interface = ssv6200_add_interface,
+    .remove_interface = ssv6200_remove_interface,
+    .config = ssv6200_config,
+    .configure_filter = ssv6200_config_filter,
+    .bss_info_changed = ssv6200_bss_info_changed,
+    .sta_add = ssv6200_sta_add,
+    .sta_remove = ssv6200_sta_remove,
+    .sta_notify = ssv6200_sta_notify,
+    .set_key = ssv6200_set_key,
+    .sw_scan_start = ssv6200_sw_scan_start,
+    .sw_scan_complete = ssv6200_sw_scan_complete,
+    .get_tsf = ssv6200_get_tsf,
+    .set_tim = ssv6200_set_tim,
+    .conf_tx = ssv6200_conf_tx,
+    .ampdu_action = ssv6200_ampdu_action,
+#ifdef CONFIG_PM
+    .suspend = ssv6xxx_suspend,
+    .resume = ssv6xxx_resume,
+#endif
+};
+#ifdef USE_LOCAL_CRYPTO
+#ifdef MULTI_THREAD_ENCRYPT
+struct ssv_crypto_data * ssv6xxx_skb_get_tx_cryptops(struct sk_buff *mpdu)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(mpdu);
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)mpdu->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    u32 unicast = (is_multicast_ether_addr(hdr->addr1))? 0: 1;
+    struct ssv_sta_priv_data *sta_priv_dat = NULL;
+    BUG_ON((size_t)info < (size_t)0x01000);
+    if (unicast)
+    {
+        if (sta)
+        {
+            sta_priv_dat = (struct ssv_sta_priv_data *)sta->drv_priv;
+            return &sta_priv_dat->crypto_data;
+        }
+        else
+        {
+            printk(KERN_ERR
+                   "Unicast to NULL STA frame. "
+                   "%02X:%02X:%02X:%02X:%02X:%02X -> %02X:%02X:%02X:%02X:%02X:%02X)\n",
+                   hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                   hdr->addr1[3], hdr->addr1[4], hdr->addr1[5],
+                   hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                   hdr->addr2[3], hdr->addr2[4], hdr->addr2[5]);
+            return NULL;
+        }
+    }
+    else
+    {
+        struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)info->control.vif->drv_priv;
+        return &vif_priv->crypto_data;
+    }
+}
+int ssv6xxx_skb_pre_encrypt(struct sk_buff *mpdu, struct ssv_softc *sc)
+{
+    struct ssv_crypto_data *crypto_data = NULL;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    int ret = -1;
+    crypto_data = ssv6xxx_skb_get_tx_cryptops(mpdu);
+    if (crypto_data == NULL)
+        return -EOPNOTSUPP;
+    START_READ_CRYPTO_DATA(crypto_data);
+    if ((crypto_data->ops != NULL) && (crypto_data->ops->encrypt_prepare != NULL))
+    {
+        u32 hdrlen = ieee80211_hdrlen(hdr->frame_control);
+        ret = crypto_data->ops->encrypt_prepare(mpdu, hdrlen, crypto_data->priv);
+    }
+    else
+    {
+        ret = -EOPNOTSUPP;
+    }
+    END_READ_CRYPTO_DATA(crypto_data);
+    return ret;
+}
+int ssv6xxx_skb_pre_decrypt(struct sk_buff *mpdu, struct ieee80211_sta *sta, struct ssv_softc *sc)
+{
+    struct ssv_crypto_data *crypto_data = NULL;
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    int ret = -1;
+    crypto_data = ssv6xxx_skb_get_rx_cryptops(sc, sta, mpdu);
+    if (crypto_data == NULL)
+        return -EOPNOTSUPP;
+    START_READ_CRYPTO_DATA(crypto_data);
+    if ((crypto_data->ops != NULL) && (crypto_data->ops->decrypt_prepare != NULL))
+    {
+        u32 hdrlen = ieee80211_hdrlen(hdr->frame_control);
+        ret = crypto_data->ops->decrypt_prepare(mpdu, hdrlen, crypto_data->priv);
+    }
+    else
+    {
+        ret = -EOPNOTSUPP;
+    }
+    END_READ_CRYPTO_DATA(crypto_data);
+    return ret;
+}
+#endif
+int ssv6xxx_skb_encrypt(struct sk_buff *mpdu, struct ssv_softc *sc)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+ int ret = 0;
+#ifndef MULTI_THREAD_ENCRYPT
+    struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(mpdu);
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)mpdu->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ssv_sta_priv_data *sta_priv_dat = NULL;
+#endif
+    struct ssv_crypto_data *crypto_data = NULL;
+#ifndef MULTI_THREAD_ENCRYPT
+    if (sta || unicast)
+    {
+        sta_priv_dat = (struct ssv_sta_priv_data *)sta->drv_priv;
+        crypto_data = &sta_priv_data->crypto_data;
+    }
+    else
+    {
+        struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)tx_info->control.vif->drv_priv;
+        crypto_data = &vif_priv->crypto_data;
+    }
+#else
+    crypto_data = ssv6xxx_skb_get_tx_cryptops(mpdu);
+#endif
+    START_READ_CRYPTO_DATA(crypto_data);
+    if ((crypto_data == NULL) || (crypto_data->ops == NULL) || (crypto_data->priv == NULL))
+    {
+        #if 0
+        u32 unicast = (is_multicast_ether_addr(hdr->addr1))? 0: 1;
+        dev_err(sc->dev, "[Local Crypto]: Encrypt %c %d %02X:%02X:%02X:%02X:%02X:%02X with NULL crypto.\n",
+                unicast ? 'U' : 'B', mpdu->protocol,
+                hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                hdr->addr1[3], hdr->addr1[4], hdr->addr1[5]);
+        #endif
+        ret = -1;
+    }
+    else
+    {
+        u32 hdrlen = ieee80211_hdrlen(hdr->frame_control);
+        ret = crypto_data->ops->encrypt_mpdu(mpdu, hdrlen, crypto_data->priv);
+    }
+    END_READ_CRYPTO_DATA(crypto_data);
+ return ret;
+}
+struct ssv_crypto_data *ssv6xxx_skb_get_rx_cryptops(struct ssv_softc *sc, struct ieee80211_sta *sta, struct sk_buff *mpdu)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    struct ssv_sta_priv_data *sta_priv;
+    struct ssv_vif_priv_data *vif_priv;
+    struct ssv_vif_info *vif_info;
+    u32 unicast = 0;
+    if(sta == NULL)
+    {
+        printk("No sta, fail to get rx cryptops\n");
+        return NULL;
+    }
+    sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    vif_priv = (struct ssv_vif_priv_data *)sta_priv->sta_info->vif->drv_priv;
+    vif_info = &sc->vif_info[vif_priv->vif_idx];
+    if (vif_info->if_type == NL80211_IFTYPE_STATION)
+        unicast = (is_multicast_ether_addr(hdr->addr1))?0:1;
+    if((sta->drv_priv != NULL) && (vif_info->if_type == NL80211_IFTYPE_AP))
+    {
+        return &sta_priv->crypto_data;
+    }
+    else if((sta->drv_priv != NULL) && (unicast == 1))
+    {
+        return &sta_priv->crypto_data;
+    }
+    else if((unicast != 1) && (vif_priv != NULL))
+    {
+        return &vif_priv->crypto_data;
+    }
+    else
+    {
+        printk("[Local Crypto]: No useful drv_priv, sta = %p, unicast = %d, vif_priv = %p", sta, unicast, vif_priv);
+        if(sta != NULL)
+            printk(", sta_priv = %p", sta->drv_priv);
+        printk("\n");
+    }
+    return NULL;
+}
+int ssv6xxx_skb_decrypt(struct sk_buff *mpdu, struct ieee80211_sta *sta, struct ssv_softc *sc)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    struct ssv_crypto_data *crypto_data = NULL;
+    u32 hdrlen = ieee80211_hdrlen(hdr->frame_control);
+    crypto_data = ssv6xxx_skb_get_rx_cryptops(sc, sta, mpdu);
+    if (crypto_data != NULL)
+    {
+        int ret = -1;
+        START_READ_CRYPTO_DATA(crypto_data);
+        if ((crypto_data->ops != NULL) && (crypto_data->priv != NULL))
+            ret = crypto_data->ops->decrypt_mpdu(mpdu, hdrlen, crypto_data->priv);
+        END_READ_CRYPTO_DATA(crypto_data);
+        return ret;
+    }
+ printk("[Local Crypto]: crytp is null\n");
+    return -1;
+}
+#endif
+int ssv6200_tx_flow_control(void *dev, int hw_txqid, bool fc_en,int debug)
+{
+    struct ssv_softc *sc=dev;
+    int ac;
+    BUG_ON(hw_txqid > 4);
+    if (hw_txqid == 4)
+        return 0;
+    ac = sc->tx.ac_txqid[hw_txqid];
+    if (fc_en == false) {
+        if (sc->tx.flow_ctrl_status & (1<<ac)) {
+                ieee80211_wake_queue(sc->hw, ac);
+                sc->tx.flow_ctrl_status &= ~(1<<ac);
+        } else {
+        }
+    }
+    else {
+        if ((sc->tx.flow_ctrl_status & (1<<ac))==0) {
+            ieee80211_stop_queue(sc->hw, ac);
+            sc->tx.flow_ctrl_status |= (1<<ac);
+        } else {
+        }
+    }
+    return 0;
+}
+void ssv6xxx_tx_q_empty_cb (u32 txq_no, void *cb_data)
+{
+    struct ssv_softc *sc = cb_data;
+    BUG_ON(sc == NULL);
+    sc->tx_q_empty = true;
+    smp_mb();
+    wake_up_interruptible(&sc->tx_wait_q);
+}
+struct ssv6xxx_b_cca_control {
+    u32 down_level;
+    u32 upper_level;
+ u32 adjust_cca_control;
+    u32 adjust_cca_1;
+};
+struct ssv6xxx_b_cca_control adjust_cci[] = {
+    { 0 , 43, 0x00162000, 0x20380050},
+    { 40, 48, 0x00161000, 0x20380050},
+    { 45, 53, 0x00160800, 0x20380050},
+    { 50, 63, 0x00160400, 0x20380050},
+    { 60, 68, 0x00160200, 0x20380050},
+    { 65, 73, 0x00160100, 0x20380050},
+    { 70, 128,0x00000000, 0x20300050},
+};
+#define MAX_CCI_LEVEL 128
+static unsigned long last_jiffies = INITIAL_JIFFIES;
+static s32 size = sizeof(adjust_cci)/sizeof(adjust_cci[0]);
+static u32 current_level = MAX_CCI_LEVEL;
+static u32 current_gate = (sizeof(adjust_cci)/sizeof(adjust_cci[0])) - 1;
+void mitigate_cci(struct ssv_softc *sc, u32 input_level)
+{
+ s32 i;
+    if(input_level > MAX_CCI_LEVEL) {
+        printk("mitigate_cci input error[%d]!!\n",input_level);
+        return;
+    }
+    if (time_after(jiffies, last_jiffies + msecs_to_jiffies(3000))) {
+#ifdef DEBUG_MITIGATE_CCI
+  printk("jiffies=%lu, input_level=%d\n", jiffies, input_level);
+#endif
+  last_jiffies = jiffies;
+  if(( input_level >= adjust_cci[current_gate].down_level) && (input_level <= adjust_cci[current_gate].upper_level)) {
+            current_level = input_level;
+#ifdef DEBUG_MITIGATE_CCI
+   printk("Keep the 0xce0020a0[%x] 0xce002008[%x]!!\n"
+       ,adjust_cci[current_gate].adjust_cca_control,adjust_cci[current_gate].adjust_cca_1);
+#endif
+  }
+  else {
+            if(current_level < input_level) {
+                for (i = 0; i < size; i++) {
+                 if (input_level <= adjust_cci[i].upper_level) {
+#ifdef DEBUG_MITIGATE_CCI
+                 printk("gate=%d, input_level=%d, adjust_cci[%d].upper_level=%d, value=%08x\n",
+                             current_gate, input_level, i, adjust_cci[i].upper_level, adjust_cci[i].adjust_cca_control);
+#endif
+                        current_level = input_level;
+                        current_gate = i;
+                        SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_CONTROL, adjust_cci[i].adjust_cca_control);
+                        SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_1, adjust_cci[i].adjust_cca_1);
+#ifdef DEBUG_MITIGATE_CCI
+                        printk("##Set to the 0xce0020a0[%x] 0xce002008[%x]##!!\n"
+                   ,adjust_cci[current_gate].adjust_cca_control,adjust_cci[current_gate].adjust_cca_1);
+#endif
+                     return;
+                 }
+             }
+            }
+            else {
+                for (i = (size -1); i >= 0; i--) {
+                 if (input_level >= adjust_cci[i].down_level) {
+#ifdef DEBUG_MITIGATE_CCI
+                     printk("gate=%d, input_level=%d, adjust_cci[%d].down_level=%d, value=%08x\n",
+                             current_gate, input_level, i, adjust_cci[i].down_level, adjust_cci[i].adjust_cca_control);
+#endif
+                        current_level = input_level;
+                        current_gate = i;
+                        SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_CONTROL, adjust_cci[i].adjust_cca_control);
+                        SMAC_REG_WRITE(sc->sh, ADR_RX_11B_CCA_1, adjust_cci[i].adjust_cca_1);
+#ifdef DEBUG_MITIGATE_CCI
+                        printk("##Set to the 0xce0020a0[%x] 0xce002008[%x]##!!\n"
+                   ,adjust_cci[current_gate].adjust_cca_control,adjust_cci[current_gate].adjust_cca_1);
+#endif
+                     return;
+                 }
+             }
+            }
+  }
+    }
+}
+#define RSSI_SMOOTHING_SHIFT 5
+#define RSSI_DECIMAL_POINT_SHIFT 6
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+extern void ssv6xxx_send_deauth_toself(struct ssv_softc *sc,const u8 *bssid,const u8 *self_addr);
+#endif
+static void _proc_data_rx_skb (struct ssv_softc *sc, struct sk_buff *rx_skb)
+{
+    struct ieee80211_rx_status *rxs;
+    struct ieee80211_hdr *hdr;
+    __le16 fc;
+    struct ssv6200_rx_desc *rxdesc;
+    struct ssv6200_rxphy_info_padding *rxphypad;
+    struct ssv6200_rxphy_info *rxphy;
+    struct ieee80211_channel *chan;
+    struct ieee80211_vif *vif = NULL;
+    struct ieee80211_sta *sta = NULL;
+    bool rx_hw_dec = false;
+    bool do_sw_dec = false;
+    struct ssv_sta_priv_data *sta_priv = NULL;
+    struct ssv_vif_priv_data *vif_priv = NULL;
+    SKB_info *skb_info = NULL;
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+ const u8 *p = NULL;
+ struct ieee80211_mgmt *mgmt = NULL;
+ static u8 diff_channel_cnt = 0;
+#endif
+ u8 is_beacon;
+ u8 is_probe_resp;
+#ifdef CONFIG_SSV_RSSI
+    s32 found = 0;
+#endif
+#ifdef USE_LOCAL_CRYPTO
+    int ret = 0;
+#ifdef MULTI_THREAD_ENCRYPT
+    struct ssv_encrypt_task_list *ta = NULL;
+    unsigned long flags;
+#endif
+#endif
+#ifdef CONFIG_SSV_SMARTLINK
+    {
+        extern int ksmartlink_smartlink_started(void);
+        void smartlink_nl_send_msg(struct sk_buff *skb);
+        if (unlikely(ksmartlink_smartlink_started()))
+        {
+            skb_pull(rx_skb, SSV6XXX_RX_DESC_LEN);
+            skb_trim(rx_skb, rx_skb->len-sc->sh->rx_pinfo_pad);
+            smartlink_nl_send_msg(rx_skb);
+            return;
+        }
+    }
+#endif
+    rxdesc = (struct ssv6200_rx_desc *)rx_skb->data;
+    rxphy = (struct ssv6200_rxphy_info *)(rx_skb->data + sizeof(*rxdesc));
+    rxphypad = (struct ssv6200_rxphy_info_padding *)(rx_skb->data + rx_skb->len - sizeof(struct ssv6200_rxphy_info_padding));
+    hdr = (struct ieee80211_hdr *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
+    fc = hdr->frame_control;
+    skb_info = (SKB_info *)rx_skb->head;
+    if (rxdesc->wsid >= SSV_RC_MAX_HARDWARE_SUPPORT)
+    {
+        if ( (ieee80211_is_data(hdr->frame_control))
+            && (!(ieee80211_is_nullfunc(hdr->frame_control))))
+        {
+            ssv6xxx_rc_rx_data_handler(sc->hw, rx_skb, rxdesc->rate_idx);
+        }
+    }
+    rxs = IEEE80211_SKB_RXCB(rx_skb);
+    memset(rxs, 0, sizeof(struct ieee80211_rx_status));
+    ssv6xxx_rc_mac8011_rate_idx(sc, rxdesc->rate_idx, rxs);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+//    printk("mactime=%u, len=%d\r\n", *((u32 *)&rx_skb->data[28]), rxdesc->len);    //+++
+    rxs->mactime = *((u32 *)&rx_skb->data[28]);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    chan = sc->hw->conf.channel;
+#else
+    chan = sc->hw->conf.chandef.chan;
+#endif
+    rxs->band = chan->band;
+    rxs->freq = chan->center_freq;
+    rxs->antenna = 1;
+ is_beacon = ieee80211_is_beacon(hdr->frame_control);
+ is_probe_resp = ieee80211_is_probe_resp(hdr->frame_control);
+   if (is_beacon)                      //+++
+   {
+      struct ieee80211_mgmt *mgmt_tmp = NULL;
+      mgmt_tmp = (struct ieee80211_mgmt *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
+      mgmt_tmp->u.beacon.timestamp = cpu_to_le64(ssv6200_get_systime_us());  
+      printk("beacon timestamp = %lld\n", mgmt_tmp->u.beacon.timestamp);
+   }
+   if (is_probe_resp)
+   {
+       struct ieee80211_mgmt *mgmt_tmp = NULL;
+      mgmt_tmp = (struct ieee80211_mgmt *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
+      mgmt_tmp->u.probe_resp.timestamp = cpu_to_le64(ssv6200_get_systime_us());
+      printk("probe_resp timestamp = %lld\n", mgmt_tmp->u.probe_resp.timestamp);
+   }
+
+    if (rxdesc->rate_idx < SSV62XX_G_RATE_INDEX && rxphypad->RSVD == 0)
+    {
+        if (is_beacon || is_probe_resp)
+        {
+            sta = ssv6xxx_find_sta_by_rx_skb(sc, rx_skb);
+            if(sta)
+            {
+                sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+#ifdef SSV_RSSI_DEBUG
+                printk(KERN_DEBUG "b_beacon %02X:%02X:%02X:%02X:%02X:%02X rssi=%d, snr=%d\n",
+                                       hdr->addr2[0], hdr->addr2[1],hdr->addr2[2], hdr->addr2[3],
+                                       hdr->addr2[4], hdr->addr2[5],rxphypad->rpci, rxphypad->snr);
+#endif
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+                if(is_beacon)
+                {
+                    mgmt = (struct ieee80211_mgmt *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
+                    p = cfg80211_find_ie(WLAN_EID_DS_PARAMS, mgmt->u.beacon.variable, rx_skb->len);
+                    if (p)
+                    {
+                        u32 beacon_channel = (int)p[2];
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+                        struct ieee80211_channel *chan;
+                        u32 bss_chan_hw_value;
+                        chan = sc->hw->conf.channel;
+                        bss_chan_hw_value = chan->hw_value;
+#else
+                        u32 bss_chan_hw_value = sc->vif_info[0].vif->bss_conf.chandef.chan->hw_value;
+#endif
+                        if( beacon_channel != bss_chan_hw_value )
+                        {
+                            diff_channel_cnt++;
+                            if(diff_channel_cnt >= 25)
+                            {
+                                printk(KERN_DEBUG "ssv6xxx_send_deauth_toself by channel change\n");
+                                ssv6xxx_send_deauth_toself(sc, sc->vif_info[0].vif->bss_conf.bssid, sc->vif_info[0].vif->addr);
+                                diff_channel_cnt = 0;
+                            }
+                        }
+                        else
+                        diff_channel_cnt = 0;
+                    }
+                }
+#endif
+                if(sta_priv->beacon_rssi)
+                {
+                    sta_priv->beacon_rssi = ((rxphypad->rpci << RSSI_DECIMAL_POINT_SHIFT)
+                        + ((sta_priv->beacon_rssi<<RSSI_SMOOTHING_SHIFT) - sta_priv->beacon_rssi)) >> RSSI_SMOOTHING_SHIFT;
+                    rxphypad->rpci = (sta_priv->beacon_rssi >> RSSI_DECIMAL_POINT_SHIFT);
+                }
+                else
+                    sta_priv->beacon_rssi = (rxphypad->rpci << RSSI_DECIMAL_POINT_SHIFT);
+#ifdef SSV_RSSI_DEBUG
+                printk("Beacon smoothing RSSI %d\n",rxphypad->rpci);
+#endif
+                mitigate_cci(sc, rxphypad->rpci);
+            }
+#ifdef CONFIG_SSV_RSSI
+            else {
+                mutex_lock(&sc->mutex);
+                list_for_each_entry(p_rssi_res, &rssi_res.rssi_list, rssi_list) {
+                    if (!memcmp(p_rssi_res->bssid, hdr->addr2, ETH_ALEN)) {
+                        {
+                            p_rssi_res->rssi = ((rxphypad->rpci << RSSI_DECIMAL_POINT_SHIFT)
+                                + ((p_rssi_res->rssi<<RSSI_SMOOTHING_SHIFT) - p_rssi_res->rssi)) >> RSSI_SMOOTHING_SHIFT;
+                            rxphypad->rpci = (p_rssi_res->rssi >> RSSI_DECIMAL_POINT_SHIFT);
+                        }
+                        p_rssi_res->cache_jiffies = jiffies;
+                        found = 1;
+                        break;
+                    }
+                    else {
+                        if(p_rssi_res->rssi) {
+                            if (time_after(jiffies, p_rssi_res->cache_jiffies + msecs_to_jiffies(40000))) {
+                                p_rssi_res->timeout = 1;
+                            }
+                        }
+                    }
+                }
+                if (!found) {
+                    p_rssi_res = kmalloc(sizeof(struct rssi_res_st), GFP_KERNEL);
+                    memcpy(p_rssi_res->bssid, hdr->addr2, ETH_ALEN);
+                    p_rssi_res->cache_jiffies = jiffies;
+                    p_rssi_res->rssi = (rxphypad->rpci << RSSI_DECIMAL_POINT_SHIFT);
+                    p_rssi_res->timeout = 0;
+                    INIT_LIST_HEAD(&p_rssi_res->rssi_list);
+                    list_add_tail_rcu(&(p_rssi_res->rssi_list), &(rssi_res.rssi_list));
+                }
+                mutex_unlock(&sc->mutex);
+            }
+#endif
+            if(rxphypad->rpci > 88)
+                rxphypad->rpci = 88;
+#if 0
+            printk("beacon %02X:%02X:%02X:%02X:%02X:%02X rxphypad-rpci=%d RxResult=%x wsid=%x\n",
+                   hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                   hdr->addr2[3], hdr->addr2[4], hdr->addr2[5], rxphypad->rpci, rxdesc->RxResult, rxdesc->wsid);
+#endif
+        }
+        if(sc->sh->cfg.rssi_ctl){
+            rxs->signal = (-rxphypad->rpci) + sc->sh->cfg.rssi_ctl;
+        }
+        else{
+            rxs->signal = (-rxphypad->rpci);
+        }
+    }
+    else if (rxdesc->rate_idx >= SSV62XX_G_RATE_INDEX && rxphy->service == 0)
+    {
+        if (is_beacon || is_probe_resp)
+        {
+            sta = ssv6xxx_find_sta_by_rx_skb(sc, rx_skb);
+            if(sta)
+            {
+                sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+#ifdef SSV_RSSI_DEBUG
+    printk("gn_beacon %02X:%02X:%02X:%02X:%02X:%02X rssi=%d, snr=%d\n",
+           hdr->addr2[0], hdr->addr2[1],hdr->addr2[2], hdr->addr2[3],
+           hdr->addr2[4], hdr->addr2[5],rxphy->rpci, rxphy->snr);
+#endif
+                if(sta_priv->beacon_rssi)
+                {
+                    sta_priv->beacon_rssi = ((rxphy->rpci << RSSI_DECIMAL_POINT_SHIFT)
+                        + ((sta_priv->beacon_rssi<<RSSI_SMOOTHING_SHIFT) - sta_priv->beacon_rssi)) >> RSSI_SMOOTHING_SHIFT;
+                    rxphy->rpci = (sta_priv->beacon_rssi >> RSSI_DECIMAL_POINT_SHIFT);
+                }
+                else
+                    sta_priv->beacon_rssi = (rxphy->rpci << RSSI_DECIMAL_POINT_SHIFT);
+#ifdef SSV_RSSI_DEBUG
+                printk("Beacon smoothing RSSI %d\n",rxphy->rpci);
+#endif
+            }
+            if(rxphy->rpci > 88)
+                rxphy->rpci = 88;
+#if 0
+            printk("beacon %02X:%02X:%02X:%02X:%02X:%02X rxphy-rpci=%d RxResult=%x wsid=%x\n",
+                   hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                   hdr->addr2[3], hdr->addr2[4], hdr->addr2[5], rxphy->rpci, rxdesc->RxResult, rxdesc->wsid);
+#endif
+        }
+        if(sc->sh->cfg.rssi_ctl){
+            rxs->signal = (-rxphy->rpci) + sc->sh->cfg.rssi_ctl;
+        }else{
+            rxs->signal = (-rxphy->rpci);
+        }
+    }
+    else {
+#ifdef SSV_RSSI_DEBUG
+        printk("########unicast: %d, b_rssi/snr: %d/%d, gn_rssi/snr: %d/%d, rate:%d###############\n",
+                rxdesc->unicast, (-rxphy->rpci), rxphy->snr, (-rxphypad->rpci), rxphypad->snr, rxdesc->rate_idx);
+  printk("RSSI, %d, rate_idx, %d\n", rxs->signal, rxdesc->rate_idx);
+  printk("rxdesc->RxResult = %x,rxdesc->wsid = %d\n",rxdesc->RxResult,rxdesc->wsid);
+#endif
+        sta = ssv6xxx_find_sta_by_rx_skb(sc, rx_skb);
+        if(sta)
+        {
+            sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+            rxs->signal = -(sta_priv->beacon_rssi >> RSSI_DECIMAL_POINT_SHIFT);
+        }
+#ifdef SSV_RSSI_DEBUG
+        printk("Others signal %d\n",rxs->signal);
+#endif
+    }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    rxs->flag = RX_FLAG_MACTIME_MPDU;
+#else
+//    rxs->flag = RX_FLAG_MACTIME_START;          //+++
+#endif
+    rxs->rx_flags = 0;
+#endif
+#if LINUX_VERSION_CODE >= 0x030400
+    if (rxphy->aggregate)
+        rxs->flag |= RX_FLAG_NO_SIGNAL_VAL;
+#endif
+    sc->hw_mng_used = rxdesc->mng_used;
+    if ( (ieee80211_is_data(fc) || ieee80211_is_data_qos(fc))
+        && ieee80211_has_protected(fc))
+    {
+        sta = ssv6xxx_find_sta_by_rx_skb(sc, rx_skb);
+        if (sta == NULL)
+            goto drop_rx;
+        sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+        vif = sta_priv->sta_info->vif;
+        if (vif == NULL)
+            goto drop_rx;
+        if (is_broadcast_ether_addr(hdr->addr1))
+        {
+            vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+            rx_hw_dec = vif_priv->has_hw_decrypt;
+            do_sw_dec = vif_priv->need_sw_decrypt;
+        }
+        else
+        {
+            rx_hw_dec = sta_priv->has_hw_decrypt;
+            do_sw_dec = sta_priv->need_sw_decrypt;
+        }
+        #if 0
+        if (rx_count++ < 20)
+        {
+            printk(KERN_ERR "HW DEC (%d - %d) %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+                   rx_hw_dec, do_sw_dec, rxdesc->wsid,
+                   hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+                   hdr->addr1[3], hdr->addr1[4], hdr->addr1[5]);
+            _ssv6xxx_hexdump("M ", (const u8 *)rx_skb->data, (rx_skb->len > 128) ? 128 : rx_skb->len);
+        }
+        #endif
+        #if 0
+        dev_err(sc->dev, "R %02X:%02X:%02X:%02X:%02X:%02X %d %d\n",
+                hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                hdr->addr2[3], hdr->addr2[4], hdr->addr2[5],
+                rx_hw_dec, do_sw_dec);
+        _ssv6xxx_hexdump("R ", (const u8 *)rx_skb->data,
+                         (rx_skb->len > 128) ? 128 : rx_skb->len);
+        #endif
+    }
+    if (sc->dbg_rx_frame)
+    {
+        _ssv6xxx_hexdump("================================================================\n"
+                         "RX frame", (const u8 *)rx_skb->data, rx_skb->len);
+    }
+    skb_pull(rx_skb, SSV6XXX_RX_DESC_LEN);
+    skb_trim(rx_skb, rx_skb->len-sc->sh->rx_pinfo_pad);
+#ifdef CONFIG_P2P_NOA
+    if (is_beacon)
+        ssv6xxx_noa_detect(sc, hdr, rx_skb->len);
+#endif
+#ifdef USE_LOCAL_CRYPTO
+    if ((rx_hw_dec == false) && (do_sw_dec == true))
+    {
+#ifndef MULTI_THREAD_ENCRYPT
+        ret = ssv6xxx_skb_decrypt(rx_skb, sta, sc);
+        if (ret < 0)
+        {
+            dev_err(sc->dev, "[Local Crypto]: Fail to decrypt local: %02X:%02X:%02X:%02X:%02X:%02X, ret = %d.\n",
+                hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                hdr->addr2[3], hdr->addr2[4], hdr->addr2[5], ret);
+            goto drop_rx;
+        }
+#else
+        skb_info->sta = sta;
+        ret = ssv6xxx_skb_pre_decrypt(rx_skb, sta, sc);
+        if (ret == 0)
+        {
+            skb_info->crypt_st = PKT_CRYPT_ST_DEC_PRE;
+            spin_lock_irqsave(&sc->crypt_st_lock, flags);
+            __skb_queue_tail(&sc->preprocess_q, rx_skb);
+            #ifdef CONFIG_SSV6XXX_DEBUGFS
+            if (sc->max_preprocess_q_len < skb_queue_len(&sc->preprocess_q))
+                sc->max_preprocess_q_len = skb_queue_len(&sc->preprocess_q);
+            #endif
+            spin_unlock_irqrestore(&sc->crypt_st_lock, flags);
+            list_for_each_entry_reverse(ta, &sc->encrypt_task_head, list)
+            {
+                if ((cpu_online(ta->cpu_no)) && (ta->running == 0))
+                {
+                    wake_up(&ta->encrypt_wait_q);
+                    return;
+                }
+            }
+            return;
+        }
+        else if (ret ==(-EOPNOTSUPP))
+        {
+            ret = ssv6xxx_skb_decrypt(rx_skb, sta, sc);
+            if (ret < 0)
+            {
+                dev_err(sc->dev, "[Local Crypto]: Fail to decrypt local: %02X:%02X:%02X:%02X:%02X:%02X, ret = %d.\n",
+                    hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+                    hdr->addr2[3], hdr->addr2[4], hdr->addr2[5], ret);
+                goto drop_rx;
+            }
+        }
+        else
+        {
+            printk("[MT-CRYPTO]: Failed to do pre-decrypt (%d)\n", ret);
+            dev_kfree_skb_any(rx_skb);
+            return;
+        }
+#endif
+    }
+#endif
+    if (rx_hw_dec || do_sw_dec)
+    {
+        hdr = (struct ieee80211_hdr *)rx_skb->data;
+        rxs = IEEE80211_SKB_RXCB(rx_skb);
+        hdr->frame_control = hdr->frame_control & ~(cpu_to_le16(IEEE80211_FCTL_PROTECTED));
+        rxs->flag |= (RX_FLAG_DECRYPTED|RX_FLAG_IV_STRIPPED);
+    }
+#if 0
+    if ( is_broadcast_ether_addr(hdr->addr1)
+        && (ieee80211_is_data_qos(fc) || ieee80211_is_data(fc)))
+#endif
+#if 0
+    if (ieee80211_is_probe_req(fc))
+    {
+        #if 0
+        printk(KERN_ERR "RX M: 1 %02X:%02X:%02X:%02X:%02X:%02X  (%d - %d - %d)\n",
+               hdr->addr1[0], hdr->addr1[1], hdr->addr1[2],
+               hdr->addr1[3], hdr->addr1[4], hdr->addr1[5],
+               (le16_to_cpu(hdr->seq_ctrl) >> 4),
+               rxdesc->wsid, ieee80211_has_protected(fc));
+        #endif
+        printk(KERN_ERR "Probe Req: 2 %02X:%02X:%02X:%02X:%02X:%02X\n",
+               hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+               hdr->addr2[3], hdr->addr2[4], hdr->addr2[5]);
+        #if 0
+        printk(KERN_ERR "RX M: 3 %02X:%02X:%02X:%02X:%02X:%02X\n",
+               hdr->addr3[0], hdr->addr3[1], hdr->addr3[2],
+               hdr->addr3[3], hdr->addr3[4], hdr->addr3[5]);
+        #endif
+        _ssv6xxx_hexdump("RX frame", (const u8 *)rx_skb->data,
+                         (rx_skb->len > 128) ? 128 : rx_skb->len);
+    }
+#endif
+    #if defined(USE_THREAD_RX) && !defined(IRQ_PROC_RX_DATA)
+    local_bh_disable();
+    ieee80211_rx(sc->hw, rx_skb);
+    local_bh_enable();
+    #else
+    ieee80211_rx_irqsafe(sc->hw, rx_skb);
+    #endif
+ return;
+drop_rx:
+#if 0
+    dev_err(sc->dev, "D %02X:%02X:%02X:%02X:%02X:%02X\n",
+            hdr->addr2[0], hdr->addr2[1], hdr->addr2[2],
+            hdr->addr2[3], hdr->addr2[4], hdr->addr2[5]);
+#endif
+    dev_kfree_skb_any(rx_skb);
+}
+#ifdef IRQ_PROC_RX_DATA
+static struct sk_buff *_proc_rx_skb (struct ssv_softc *sc, struct sk_buff *rx_skb)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
+    struct ssv6200_rx_desc *rxdesc = (struct ssv6200_rx_desc *)rx_skb->data;
+    if ( ieee80211_is_back(hdr->frame_control)
+        || (rxdesc->c_type == HOST_EVENT))
+        return rx_skb;
+    _proc_data_rx_skb(sc, rx_skb);
+    return NULL;
+}
+#endif
+void _process_rx_q (struct ssv_softc *sc, struct sk_buff_head *rx_q, spinlock_t *rx_q_lock)
+{
+    struct sk_buff *skb;
+    struct ieee80211_hdr *hdr;
+    struct ssv6200_rx_desc *rxdesc;
+    unsigned long flags=0;
+    #ifdef USE_FLUSH_RETRY
+    bool has_ba_processed = false;
+    #endif
+    while (1) {
+        if (rx_q_lock != NULL)
+        {
+            spin_lock_irqsave(rx_q_lock, flags);
+            skb = __skb_dequeue(rx_q);
+        }
+        else
+            skb = skb_dequeue(rx_q);
+        if (!skb)
+        {
+            if (rx_q_lock != NULL)
+                spin_unlock_irqrestore(rx_q_lock, flags);
+            break;
+        }
+        sc->rx.rxq_count --;
+        if (rx_q_lock != NULL)
+            spin_unlock_irqrestore(rx_q_lock, flags);
+        rxdesc = (struct ssv6200_rx_desc *)skb->data;
+        if (rxdesc->c_type == HOST_EVENT)
+        {
+            struct cfg_host_event *h_evt = (struct cfg_host_event *)rxdesc;
+            if (h_evt->h_event == SOC_EVT_NO_BA)
+            {
+                ssv6200_ampdu_no_BA_handler(sc->hw, skb);
+                #ifdef USE_FLUSH_RETRY
+                has_ba_processed = true;
+                #endif
+            }
+            else if (h_evt->h_event == SOC_EVT_RC_MPDU_REPORT)
+            {
+                #if 0
+                struct cfg_host_event *host_event;
+                struct firmware_rate_control_report_data *report_data;
+                host_event = (struct cfg_host_event *)rxdesc;
+                report_data = (struct firmware_rate_control_report_data *)&host_event->dat[0];
+                printk("MPDU report get!!wsid[%d]didx[%d]F[%d]S[%d]\n",report_data->wsid,report_data->rates[0].data_rate,report_data->ampdu_len,report_data->ampdu_ack_len);
+                #endif
+                skb_queue_tail(&sc->rc_report_queue, skb);
+                if (sc->rc_sample_sechedule == 0)
+                    queue_work(sc->rc_sample_workqueue, &sc->rc_sample_work);
+            }
+            else if (h_evt->h_event == SOC_EVT_SDIO_TEST_COMMAND)
+            {
+                if(h_evt->evt_seq_no == 0)
+                {
+                    printk("SOC_EVT_SDIO_TEST_COMMAND\n");
+                    sc->sdio_rx_evt_size = h_evt->len;
+                    sc->sdio_throughput_timestamp = jiffies;
+                }
+                else
+                {
+                    sc->sdio_rx_evt_size += h_evt->len;
+                    if (time_after(jiffies, sc->sdio_throughput_timestamp + msecs_to_jiffies(1000)))
+                    {
+                        printk("data[%ld] SDIO RX throughput %ld Kbps\n",sc->sdio_rx_evt_size,(sc->sdio_rx_evt_size << 3) / jiffies_to_msecs(jiffies - sc->sdio_throughput_timestamp));
+                        sc->sdio_throughput_timestamp = jiffies;
+                        sc->sdio_rx_evt_size = 0;
+                    }
+                }
+                dev_kfree_skb_any(skb);
+            }
+            else if (h_evt->h_event == SOC_EVT_WATCHDOG_TRIGGER)
+            {
+                dev_kfree_skb_any(skb);
+//		if(sc->watchdog_flag != WD_SLEEP)     //+++
+                sc->watchdog_flag = WD_KICKED;
+            }
+            else if (h_evt->h_event == SOC_EVT_RESET_HOST)
+            {
+                dev_kfree_skb_any(skb);
+                if ((sc->ap_vif == NULL) || !(sc->sh->cfg.ignore_reset_in_ap))
+                {
+                    ssv6xxx_restart_hw(sc);
+                }
+                else
+                {
+                    dev_warn(sc->dev, "Reset event ignored.\n");
+                }
+            }
+#ifdef CONFIG_P2P_NOA
+            else if(h_evt->h_event == SOC_EVT_NOA)
+            {
+                ssv6xxx_process_noa_event(sc, skb);
+                dev_kfree_skb_any(skb);
+            }
+#endif
+   else if (h_evt->h_event == SOC_EVT_SDIO_TXTPUT_RESULT) {
+    printk("data SDIO TX throughput %d Kbps\n", h_evt->evt_seq_no);
+                dev_kfree_skb_any(skb);
+            }
+            else if (h_evt->h_event == SOC_EVT_TXLOOPBK_RESULT){
+                if (h_evt->evt_seq_no == SSV6XXX_STATE_OK) {
+                    printk("FW TX LOOPBACK OK\n");
+                    sc->iq_cali_done = IQ_CALI_OK;
+                } else {
+                    printk(KERN_ERR "FW TX LOOPBACK FAILED\n");
+                    sc->iq_cali_done = IQ_CALI_FAILED;
+                }
+                dev_kfree_skb_any(skb);
+                wake_up_interruptible(&sc->fw_wait_q);
+            }
+   else
+   {
+                dev_warn(sc->dev, "Unkown event %d received\n", h_evt->h_event);
+                dev_kfree_skb_any(skb);
+            }
+            continue;
+        }
+        hdr = (struct ieee80211_hdr *)(skb->data + SSV6XXX_RX_DESC_LEN);
+        if (ieee80211_is_back(hdr->frame_control))
+        {
+            ssv6200_ampdu_BA_handler(sc->hw, skb);
+            #ifdef USE_FLUSH_RETRY
+            has_ba_processed = true;
+            #endif
+            continue;
+        }
+        _proc_data_rx_skb(sc, skb);
+    }
+    #ifdef USE_FLUSH_RETRY
+    if (has_ba_processed)
+    {
+        ssv6xxx_ampdu_postprocess_BA(sc->hw);
+    }
+    #endif
+}
+#if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+int ssv6200_rx(struct sk_buff_head *rx_skb_q, void *args)
+#else
+int ssv6200_rx(struct sk_buff *rx_skb, void *args)
+#endif
+{
+    struct ssv_softc *sc=args;
+    #ifdef IRQ_PROC_RX_DATA
+    struct sk_buff *skb;
+    skb = _proc_rx_skb(sc, rx_skb);
+    if (skb == NULL)
+        return 0;
+    #endif
+    #if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+    {
+    unsigned long flags;
+    spin_lock_irqsave(&sc->rx_skb_q.lock, flags);
+    while (skb_queue_len(rx_skb_q))
+        __skb_queue_tail(&sc->rx_skb_q, __skb_dequeue(rx_skb_q));
+    spin_unlock_irqrestore(&sc->rx_skb_q.lock, flags);
+    }
+    #else
+    skb_queue_tail(&sc->rx_skb_q, rx_skb);
+    #endif
+    wake_up_interruptible(&sc->rx_wait_q);
+    return 0;
+}
+struct ieee80211_sta *ssv6xxx_find_sta_by_rx_skb (struct ssv_softc *sc, struct sk_buff *skb)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data + SSV6XXX_RX_DESC_LEN);
+    struct ssv6200_rx_desc *rxdesc = (struct ssv6200_rx_desc *)skb->data;;
+    if ((rxdesc->wsid >= 0) && (rxdesc->wsid < SSV_NUM_STA))
+        return sc->sta_info[rxdesc->wsid].sta;
+    else
+        return ssv6xxx_find_sta_by_addr(sc, hdr->addr2);
+}
+struct ieee80211_sta *ssv6xxx_find_sta_by_addr (struct ssv_softc *sc, u8 addr[6])
+{
+    struct ieee80211_sta *sta;
+    int i;
+    for (i = 0; i < SSV6200_MAX_VIF; i++)
+    {
+        if (sc->vif_info[i].vif == NULL)
+            continue;
+        sta = ieee80211_find_sta(sc->vif_info[i].vif, addr);
+        if (sta != NULL)
+            return sta;
+    }
+    return NULL;
+}
+void ssv6xxx_foreach_sta (struct ssv_softc *sc, void (*sta_func)(struct ssv_softc *, struct ssv_sta_info *, void *), void *param)
+{
+    int i;
+    BUG_ON(sta_func == NULL);
+#if 0
+    for (i = 0; i < SSV6200_MAX_VIF; i++)
+    {
+        struct ssv_vif_priv_data *vif_priv;
+        int j;
+        if (sc->vif_info[i].vif == NULL)
+            continue;
+        vif_priv = (struct ssv_vif_priv_data *)sc->vif[i]->drv_priv;
+        for (j = 0; j < SSV_NUM_STA; j++)
+        {
+            if ((vif_priv->sta_info[j].s_flags & STA_FLAG_VALID) == 0)
+                continue;
+            (*sta_func)(sc, &vif_priv->sta_info[j], param);
+        }
+    }
+#else
+    for (i = 0; i < SSV_NUM_STA; i++)
+    {
+        if ((sc->sta_info[i].s_flags & STA_FLAG_VALID) == 0)
+            continue;
+        (*sta_func)(sc, &sc->sta_info[i], param);
+    }
+#endif
+}
+void ssv6xxx_foreach_vif_sta (struct ssv_softc *sc,
+                              struct ssv_vif_info *vif_info,
+                              void (*sta_func)(struct ssv_softc *,
+                                               struct ssv_vif_info *,
+                                               struct ssv_sta_info *,
+                                               void *),
+                              void *param)
+{
+    struct ssv_vif_priv_data *vif_priv;
+    struct ssv_sta_priv_data *sta_priv_iter;
+    BUG_ON(vif_info == NULL);
+    BUG_ON((size_t)vif_info < 0x30000);
+    vif_priv = (struct ssv_vif_priv_data *)vif_info->vif->drv_priv;
+    BUG_ON((size_t)vif_info->vif < 0x30000);
+    BUG_ON((size_t)vif_priv < 0x30000);
+    list_for_each_entry(sta_priv_iter, &vif_priv->sta_list, list)
+    {
+        BUG_ON(sta_priv_iter == NULL);
+        BUG_ON((size_t)sta_priv_iter < 0x30000);
+        BUG_ON(sta_priv_iter->sta_info == NULL);
+        BUG_ON((size_t)sta_priv_iter->sta_info < 0x30000);
+        if ((sta_priv_iter->sta_info->s_flags & STA_FLAG_VALID) == 0)
+            continue;
+        (*sta_func)(sc, vif_info, sta_priv_iter->sta_info, param);
+    }
+}
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+ssize_t ssv6xxx_tx_queue_status_dump (struct ssv_softc *sc, char *status_buf,
+                                      ssize_t length)
+{
+    ssize_t buf_size = length;
+    ssize_t prt_size;
+    prt_size = snprintf(status_buf, buf_size, "\nSMAC driver queue status:.\n");
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    #ifdef MULTI_THREAD_ENCRYPT
+    prt_size = snprintf(status_buf, buf_size, "\tCrypto pre-process queue: %d.\n",
+                        skb_queue_len(&sc->preprocess_q));
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(status_buf, buf_size, "\tMax pre-process queue: %d.\n",
+                        sc->max_preprocess_q_len);
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(status_buf, buf_size, "\tCrypto process queue: %d.\n",
+                        skb_queue_len(&sc->crypted_q));
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(status_buf, buf_size, "\tMax process queue: %d.\n",
+                        sc->max_crypted_q_len);
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    #endif
+    prt_size = snprintf(status_buf, buf_size, "\tTX queue: %d\n",
+                        skb_queue_len(&sc->tx_skb_q));
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    prt_size = snprintf(status_buf, buf_size, "\tMax TX queue: %d\n",
+                        sc->max_tx_skb_q_len);
+    status_buf += prt_size;
+    buf_size -= prt_size;
+    return (length - buf_size);
+}
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.h
new file mode 100644
index 0000000000000..2085ea55d38cb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.h
@@ -0,0 +1,564 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DEV_H_
+#define _DEV_H_ 
+#include <linux/version.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#include <linux/wakelock.h>
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+#endif
+#include <net/mac80211.h>
+#include "ampdu.h"
+#include "ssv_rc_common.h"
+#include "drv_comm.h"
+#include "sec.h"
+#include "p2p.h"
+#include <linux/kthread.h>
+#define SSV6200_MAX_HW_MAC_ADDR 2
+#define SSV6200_MAX_VIF 2
+#define SSV6200_RX_BA_MAX_SESSIONS 1
+#define SSV6200_OPMODE_STA 0
+#define SSV6200_OPMODE_AP 1
+#define SSV6200_OPMODE_IBSS 2
+#define SSV6200_OPMODE_WDS 3
+#define SSV6200_USE_HW_WSID(_sta_idx) ((_sta_idx == 0) || (_sta_idx == 1))
+#define HW_MAX_RATE_TRIES 7
+#define MAC_DECITBL1_SIZE 16
+#define MAC_DECITBL2_SIZE 9
+#define RX_11B_CCA_IN_SCAN 0x20230050
+//#define WATCHDOG_TIMEOUT (10*HZ)
+#define WATCHDOG_TIMEOUT (99999*HZ)
+#ifndef USE_GENERIC_DECI_TBL
+extern u16 ap_deci_tbl[];
+extern u16 sta_deci_tbl[];
+#else
+extern u16 generic_deci_tbl[];
+#define ap_deci_tbl generic_deci_tbl
+#define sta_deci_tbl generic_deci_tbl
+#endif
+#define HT_SIGNAL_EXT 6
+#define HT_SIFS_TIME 10
+#define BITS_PER_BYTE 8
+#define HT_RC_2_STREAMS(_rc) ((((_rc) & 0x78) >> 3) + 1)
+#define ACK_LEN (14)
+#define BA_LEN (32)
+#define RTS_LEN (20)
+#define CTS_LEN (14)
+#define L_STF 8
+#define L_LTF 8
+#define L_SIG 4
+#define HT_SIG 8
+#define HT_STF 4
+#define HT_LTF(_ns) (4 * (_ns))
+#define SYMBOL_TIME(_ns) ((_ns) << 2)
+#define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5)
+#define CCK_SIFS_TIME 10
+#define CCK_PREAMBLE_BITS 144
+#define CCK_PLCP_BITS 48
+#define OFDM_SIFS_TIME 16
+#define OFDM_PREAMBLE_TIME 20
+#define OFDM_PLCP_BITS 22
+#define OFDM_SYMBOL_TIME 4
+#define WMM_AC_VO 0
+#define WMM_AC_VI 1
+#define WMM_AC_BE 2
+#define WMM_AC_BK 3
+#define WMM_NUM_AC 4
+#define WMM_TID_NUM 8
+#define TXQ_EDCA_0 0x01
+#define TXQ_EDCA_1 0x02
+#define TXQ_EDCA_2 0x04
+#define TXQ_EDCA_3 0x08
+#define TXQ_MGMT 0x10
+#define IS_SSV_HT(dsc) ((dsc)->rate_idx >= 15)
+#define IS_SSV_SHORT_GI(dsc) ((dsc)->rate_idx>=23 && (dsc)->rate_idx<=30)
+#define IS_SSV_HT_GF(dsc) ((dsc)->rate_idx >= 31)
+#define IS_SSV_SHORT_PRE(dsc) ((dsc)->rate_idx>=4 && (dsc)->rate_idx<=14)
+#define SMAC_REG_WRITE(_s,_r,_v) \
+        (_s)->hci.hci_ops->hci_write_word(_r,_v)
+#define SMAC_REG_READ(_s,_r,_v) \
+        (_s)->hci.hci_ops->hci_read_word(_r, _v)
+#define SMAC_LOAD_FW(_s,_r,_v) \
+        (_s)->hci.hci_ops->hci_load_fw(_r, _v)
+#define SMAC_IFC_RESET(_s) (_s)->hci.hci_ops->hci_interface_reset()
+#define SMAC_REG_CONFIRM(_s,_r,_v) \
+{ \
+    u32 _regval; \
+    SMAC_REG_READ(_s, _r, &_regval); \
+    if (_regval != (_v)) { \
+        printk("ERROR!!Please check interface!\n"); \
+        printk("[0x%08x]: 0x%08x!=0x%08x\n", \
+        (_r), (_v), _regval); \
+        printk("SOS!SOS!\n"); \
+        return -1; \
+    } \
+}
+#define SMAC_REG_SET_BITS(_sh,_reg,_set,_clr) \
+({ \
+    int ret; \
+    u32 _regval; \
+    ret = SMAC_REG_READ(_sh, _reg, &_regval); \
+    _regval &= ~(_clr); \
+    _regval |= (_set); \
+    if (ret == 0) \
+        ret = SMAC_REG_WRITE(_sh, _reg, _regval); \
+    ret; \
+})
+#define HCI_START(_sh) \
+    (_sh)->hci.hci_ops->hci_start()
+#define HCI_STOP(_sh) \
+    (_sh)->hci.hci_ops->hci_stop()
+#define HCI_SEND(_sh,_sk,_q) \
+    (_sh)->hci.hci_ops->hci_tx(_sk, _q, 0)
+#define HCI_PAUSE(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_tx_pause(_mk)
+#define HCI_RESUME(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_tx_resume(_mk)
+#define HCI_TXQ_FLUSH(_sh,_mk) \
+    (_sh)->hci.hci_ops->hci_txq_flush(_mk)
+#define HCI_TXQ_FLUSH_BY_STA(_sh,_aid) \
+  (_sh)->hci.hci_ops->hci_txq_flush_by_sta(_aid)
+#define HCI_TXQ_EMPTY(_sh,_txqid) \
+  (_sh)->hci.hci_ops->hci_txq_empty(_txqid)
+#define HCI_WAKEUP_PMU(_sh) \
+    (_sh)->hci.hci_ops->hci_pmu_wakeup()
+#define HCI_SEND_CMD(_sh,_sk) \
+        (_sh)->hci.hci_ops->hci_send_cmd(_sk)
+#define SSV6XXX_SET_HW_TABLE(sh_,tbl_) \
+({ \
+    int ret = 0; \
+    u32 i=0; \
+    for(; i<sizeof(tbl_)/sizeof(struct ssv6xxx_dev_table); i++) { \
+        ret = SMAC_REG_WRITE(sh_, tbl_[i].address, tbl_[i].data); \
+        if (ret) break; \
+    } \
+    ret; \
+})
+#define SSV6XXX_USE_HW_DECRYPT(_priv) (_priv->has_hw_decrypt)
+#define SSV6XXX_USE_SW_DECRYPT(_priv) (SSV6XXX_USE_LOCAL_SW_DECRYPT(_priv) || SSV6XXX_USE_MAC80211_DECRYPT(_priv))
+#define SSV6XXX_USE_LOCAL_SW_DECRYPT(_priv) (_priv->need_sw_decrypt)
+#define SSV6XXX_USE_MAC80211_DECRYPT(_priv) (_priv->use_mac80211_decrypt)
+struct ssv_softc;
+#ifdef CONFIG_P2P_NOA
+struct ssv_p2p_noa;
+#endif
+#define SSV6200_HT_TX_STREAMS 1
+#define SSV6200_HT_RX_STREAMS 1
+#define SSV6200_RX_HIGHEST_RATE 72
+enum PWRSV_STATUS{
+    PWRSV_DISABLE,
+    PWRSV_ENABLE,
+    PWRSV_PREPARE,
+};
+#ifdef CONFIG_SSV_RSSI
+struct rssi_res_st {
+    struct list_head rssi_list;
+    unsigned long cache_jiffies;
+    s32 rssi;
+    s32 timeout;
+    u8 bssid[ETH_ALEN];
+};
+#endif
+struct ssv_hw {
+    struct ssv_softc *sc;
+    struct ssv6xxx_platform_data *priv;
+    struct ssv6xxx_hci_info hci;
+    char chip_id[24];
+    u64 chip_tag;
+    u32 tx_desc_len;
+    u32 rx_desc_len;
+    u32 rx_pinfo_pad;
+    u32 tx_page_available;
+    u32 ampdu_divider;
+    u8 page_count[SSV6200_ID_NUMBER];
+#ifdef SSV6200_ECO
+    u32 hw_buf_ptr[SSV_RC_MAX_STA];
+    u32 hw_sec_key[SSV_RC_MAX_STA];
+#else
+    u32 hw_buf_ptr;
+    u32 hw_sec_key;
+#endif
+    u32 hw_pinfo;
+    struct ssv6xxx_cfg cfg;
+    u32 n_addresses;
+    struct mac_address maddr[SSV6200_MAX_HW_MAC_ADDR];
+#if defined CONFIG_SSV_CABRIO_E
+    u8 ipd_channel_touch;
+    struct ssv6xxx_ch_cfg *p_ch_cfg;
+    u32 ch_cfg_size;
+#endif
+};
+struct ssv_tx {
+    u16 seq_no;
+    int hw_txqid[WMM_NUM_AC];
+    int ac_txqid[WMM_NUM_AC];
+    u32 flow_ctrl_status;
+    u32 tx_pkt[SSV_HW_TXQ_NUM];
+    u32 tx_frag[SSV_HW_TXQ_NUM];
+    struct list_head ampdu_tx_que;
+    spinlock_t ampdu_tx_que_lock;
+    u16 ampdu_tx_group_id;
+};
+struct ssv_rx {
+    struct sk_buff *rx_buf;
+    spinlock_t rxq_lock;
+    struct sk_buff_head rxq_head;
+    u32 rxq_count;
+};
+#ifdef MULTI_THREAD_ENCRYPT
+struct ssv_encrypt_task_list {
+    struct task_struct* encrypt_task;
+    wait_queue_head_t encrypt_wait_q;
+    volatile int started;
+    volatile int running;
+    volatile int paused;
+    volatile int cpu_offline;
+    u32 cpu_no;
+    struct list_head list;
+};
+#endif
+#define SSV6XXX_GET_STA_INFO(_sc,_s) \
+    &(_sc)->sta_info[((struct ssv_sta_priv_data *)((_s)->drv_priv))->sta_idx]
+#define STA_FLAG_VALID 0x00001
+#define STA_FLAG_QOS 0x00002
+#define STA_FLAG_AMPDU 0x00004
+#define STA_FLAG_ENCRYPT 0x00008
+struct ssv_sta_info {
+    u16 aid;
+    u16 s_flags;
+    int hw_wsid;
+    struct ieee80211_sta *sta;
+    struct ieee80211_vif *vif;
+    bool sleeping;
+    bool tim_set;
+    #if 0
+    struct ssv_crypto_ops *crypt;
+    void *crypt_priv;
+    u32 KeySelect;
+    bool ampdu_ccmp_encrypt;
+    #endif
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct dentry *debugfs_dir;
+ #endif
+};
+struct ssv_vif_info {
+    struct ieee80211_vif *vif;
+    struct ssv_vif_priv_data *vif_priv;
+    enum nl80211_iftype if_type;
+    struct ssv6xxx_hw_sec sramKey;
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct dentry *debugfs_dir;
+    #endif
+};
+struct ssv_sta_priv_data {
+    int sta_idx;
+    int rc_idx;
+    int rx_data_rate;
+    struct ssv_sta_info *sta_info;
+    struct list_head list;
+    u32 ampdu_mib_total_BA_counter;
+    AMPDU_TID ampdu_tid[WMM_TID_NUM];
+    bool has_hw_encrypt;
+    bool need_sw_encrypt;
+    bool has_hw_decrypt;
+    bool need_sw_decrypt;
+    bool use_mac80211_decrypt;
+    u8 group_key_idx;
+    #ifdef USE_LOCAL_CRYPTO
+    struct ssv_crypto_data crypto_data;
+    #endif
+    u32 beacon_rssi;
+};
+struct ssv_vif_priv_data {
+    int vif_idx;
+    struct list_head sta_list;
+    u32 sta_asleep_mask;
+    u32 pair_cipher;
+    u32 group_cipher;
+    bool is_security_valid;
+    bool has_hw_encrypt;
+    bool need_sw_encrypt;
+    bool has_hw_decrypt;
+    bool need_sw_decrypt;
+    bool use_mac80211_decrypt;
+    bool force_sw_encrypt;
+    u8 group_key_idx;
+    #ifdef USE_LOCAL_CRYPTO
+    struct ssv_crypto_data crypto_data;
+    #endif
+};
+#define SC_OP_INVALID 0x00000001
+#define SC_OP_HW_RESET 0x00000002
+#define SC_OP_OFFCHAN 0x00000004
+#define SC_OP_FIXED_RATE 0x00000008
+#define SC_OP_SHORT_PREAMBLE 0x00000010
+struct ssv6xxx_beacon_info {
+ u32 pubf_addr;
+ u16 len;
+ u8 tim_offset;
+ u8 tim_cnt;
+};
+#define SSV6200_MAX_BCAST_QUEUE_LEN 16
+struct ssv6xxx_bcast_txq {
+    spinlock_t txq_lock;
+    struct sk_buff_head qhead;
+    int cur_qsize;
+};
+#ifdef DEBUG_AMPDU_FLUSH
+typedef struct AMPDU_TID_st AMPDU_TID;
+#define MAX_TID (24)
+#endif
+struct ssv_softc {
+    struct ieee80211_hw *hw;
+    struct device *dev;
+    u32 restart_counter;
+    bool force_triger_reset;
+    unsigned long sdio_throughput_timestamp;
+    unsigned long sdio_rx_evt_size;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+    struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
+#else
+    struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
+#endif
+    struct ieee80211_channel *cur_channel;
+    u16 hw_chan;
+    struct mutex mutex;
+    struct ssv_hw *sh;
+    struct ssv_tx tx;
+    struct ssv_rx rx;
+    struct ssv_vif_info vif_info[SSV_NUM_VIF];
+    struct ssv_sta_info sta_info[SSV_NUM_STA];
+    struct ieee80211_vif *ap_vif;
+    u8 nvif;
+    u32 sc_flags;
+    void *rc;
+    int max_rate_idx;
+    struct workqueue_struct *rc_sample_workqueue;
+    struct sk_buff_head rc_report_queue;
+    struct work_struct rc_sample_work;
+    #ifdef DEBUG_AMPDU_FLUSH
+    struct AMPDU_TID_st *tid[MAX_TID];
+    #endif
+    u16 rc_sample_sechedule;
+    u16 *mac_deci_tbl;
+    struct workqueue_struct *config_wq;
+    bool bq4_dtim;
+    struct work_struct set_tim_work;
+    u8 enable_beacon;
+    u8 beacon_interval;
+    u8 beacon_dtim_cnt;
+    u8 beacon_usage;
+    struct ssv6xxx_beacon_info beacon_info[2];
+    struct sk_buff *beacon_buf;
+    struct work_struct bcast_start_work;
+    struct delayed_work bcast_stop_work;
+    struct delayed_work bcast_tx_work;
+    struct delayed_work thermal_monitor_work;
+    struct workqueue_struct *thermal_wq;
+    int is_sar_enabled;
+    bool aid0_bit_set;
+    u8 hw_mng_used;
+    struct ssv6xxx_bcast_txq bcast_txq;
+    int bcast_interval;
+    u8 bssid[6];
+    struct mutex mem_mutex;
+    spinlock_t ps_state_lock;
+    u8 hw_wsid_bit;
+    #if 0
+    struct work_struct ampdu_tx_encry_work;
+    bool ampdu_encry_work_scheduled;
+    bool ampdu_ccmp_encrypt;
+    struct work_struct sync_hwkey_work;
+    bool sync_hwkey_write;
+    struct ssv_sta_info *key_sync_sta_info;
+    AMPDU_REKEY_PAUSE_STATE ampdu_rekey_pause;
+    #endif
+    int rx_ba_session_count;
+    struct ieee80211_sta *rx_ba_sta;
+    u8 rx_ba_bitmap;
+    u8 ba_ra_addr[ETH_ALEN];
+    u16 ba_tid;
+    u16 ba_ssn;
+    struct work_struct set_ampdu_rx_add_work;
+ struct work_struct set_ampdu_rx_del_work;
+    bool isAssoc;
+    u16 channel_center_freq;
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+    bool bScanning;
+//#endif
+    int ps_status;
+    u16 ps_aid;
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_EARLYSUSPEND
+    struct early_suspend early_suspend;
+#endif
+#ifdef CONFIG_HAS_WAKELOCK
+    struct wake_lock ssv_wake_lock_;
+#endif
+#endif
+    u16 tx_wait_q_woken;
+    wait_queue_head_t tx_wait_q;
+    struct sk_buff_head tx_skb_q;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    u32 max_tx_skb_q_len;
+#endif
+    struct task_struct *tx_task;
+    bool tx_q_empty;
+    struct sk_buff_head tx_done_q;
+    u16 rx_wait_q_woken;
+    wait_queue_head_t rx_wait_q;
+    struct sk_buff_head rx_skb_q;
+    struct task_struct *rx_task;
+#ifdef MULTI_THREAD_ENCRYPT
+    struct list_head encrypt_task_head;
+    struct notifier_block cpu_nfb;
+    struct sk_buff_head preprocess_q;
+    struct sk_buff_head crypted_q;
+    spinlock_t crypt_st_lock;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    u32 max_preprocess_q_len;
+    u32 max_crypted_q_len;
+#endif
+#endif
+    bool dbg_rx_frame;
+    bool dbg_tx_frame;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct dentry *debugfs_dir;
+#endif
+#ifdef CONFIG_P2P_NOA
+    struct ssv_p2p_noa p2p_noa;
+#endif
+    struct timer_list watchdog_timeout;
+    u32 watchdog_flag;
+    wait_queue_head_t fw_wait_q;
+    u32 iq_cali_done;
+    u32 sr_bhvr;
+};
+enum {
+    IQ_CALI_RUNNING,
+    IQ_CALI_OK,
+    IQ_CALI_FAILED
+};
+enum {
+    WD_SLEEP,
+    WD_BARKING,
+    WD_KICKED,
+    WD_MAX
+};
+void ssv6xxx_txbuf_free_skb(struct sk_buff *skb , void *args);
+void ssv6200_rx_process(struct work_struct *work);
+#if !defined(USE_THREAD_RX) || defined(USE_BATCH_RX)
+int ssv6200_rx(struct sk_buff_head *rx_skb_q, void *args);
+#else
+int ssv6200_rx(struct sk_buff *rx_skb, void *args);
+#endif
+void ssv6xxx_tx_cb(struct sk_buff_head *skb_head, void *args);
+#ifdef RATE_CONTROL_REALTIME_UPDATA
+void ssv6xxx_tx_rate_update(struct sk_buff *skb, void *args);
+#endif
+int ssv6200_tx_flow_control(void *dev, int hw_txqid, bool fc_en, int debug);
+void ssv6xxx_tx_q_empty_cb (u32 txq_no, void *);
+int ssv6xxx_rf_disable(struct ssv_hw *sh);
+int ssv6xxx_rf_enable(struct ssv_hw *sh);
+int ssv6xxx_set_channel(struct ssv_softc *sc, int ch);
+#ifdef CONFIG_SSV_SMARTLINK
+int ssv6xxx_get_channel(struct ssv_softc *sc, int *pch);
+int ssv6xxx_set_promisc(struct ssv_softc *sc, int accept);
+int ssv6xxx_get_promisc(struct ssv_softc *sc, int *paccept);
+#endif
+int ssv6xxx_tx_task (void *data);
+int ssv6xxx_rx_task (void *data);
+u32 ssv6xxx_pbuf_alloc(struct ssv_softc *sc, int size, int type);
+bool ssv6xxx_pbuf_free(struct ssv_softc *sc, u32 pbuf_addr);
+void ssv6xxx_add_txinfo(struct ssv_softc *sc, struct sk_buff *skb);
+void ssv6xxx_update_txinfo (struct ssv_softc *sc, struct sk_buff *skb);
+int ssv6xxx_update_decision_table(struct ssv_softc *sc);
+void ssv6xxx_ps_callback_func(unsigned long data);
+void ssv6xxx_enable_ps(struct ssv_softc *sc);
+void ssv6xxx_disable_ps(struct ssv_softc *sc);
+int ssv6xxx_watchdog_controller(struct ssv_hw *sh ,u8 flag);
+int ssv6xxx_skb_encrypt(struct sk_buff *mpdu,struct ssv_softc *sc);
+int ssv6xxx_skb_decrypt(struct sk_buff *mpdu, struct ieee80211_sta *sta,struct ssv_softc *sc);
+void ssv6200_sync_hw_key_sequence(struct ssv_softc *sc, struct ssv_sta_info* sta_info, bool bWrite);
+struct ieee80211_sta *ssv6xxx_find_sta_by_rx_skb (struct ssv_softc *sc, struct sk_buff *skb);
+struct ieee80211_sta *ssv6xxx_find_sta_by_addr (struct ssv_softc *sc, u8 addr[6]);
+void ssv6xxx_foreach_sta (struct ssv_softc *sc,
+                          void (*sta_func)(struct ssv_softc *,
+                                           struct ssv_sta_info *,
+                                           void *),
+                          void *param);
+void ssv6xxx_foreach_vif_sta (struct ssv_softc *sc,
+                              struct ssv_vif_info *vif_info,
+                              void (*sta_func)(struct ssv_softc *,
+                                               struct ssv_vif_info *,
+                                               struct ssv_sta_info *,
+                                               void *),
+                              void *param);
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void ssv6xxx_early_suspend(struct early_suspend *h);
+void ssv6xxx_late_resume(struct early_suspend *h);
+#endif
+#endif
+#ifdef USE_LOCAL_CRYPTO
+#ifdef MULTI_THREAD_ENCRYPT
+struct ssv_crypto_data *ssv6xxx_skb_get_tx_cryptops(struct sk_buff *mpdu);
+struct ssv_crypto_data *ssv6xxx_skb_get_rx_cryptops(struct ssv_softc *sc,
+                                                    struct ieee80211_sta *sta,
+                                                    struct sk_buff *mpdu);
+int ssv6xxx_skb_pre_encrypt(struct sk_buff *mpdu, struct ssv_softc *sc);
+int ssv6xxx_skb_pre_decrypt(struct sk_buff *mpdu, struct ieee80211_sta *sta, struct ssv_softc *sc);
+int ssv6xxx_encrypt_task (void *data);
+#endif
+#ifdef HAS_CRYPTO_LOCK
+    #define INIT_WRITE_CRYPTO_DATA(data, init) \
+        struct ssv_crypto_data *data = (init); \
+        unsigned long data##_flags;
+    #define START_WRITE_CRYPTO_DATA(data) \
+        do { \
+            write_lock_irqsave(&(data)->lock, data##_flags); \
+        } while (0)
+    #define END_WRITE_CRYPTO_DATA(data) \
+        do { \
+            write_unlock_irqrestore(&(data)->lock, data##_flags); \
+        } while (0)
+    #define START_READ_CRYPTO_DATA(data) \
+        do { \
+            read_lock(&(data)->lock); \
+        } while (0)
+    #define END_READ_CRYPTO_DATA(data) \
+        do { \
+            read_unlock(&(data)->lock); \
+        } while (0)
+#else
+    #define INIT_WRITE_CRYPTO_DATA(data, init) \
+        struct ssv_crypto_data *data = (init);
+    #define START_WRITE_CRYPTO_DATA(data) do { } while (0)
+    #define END_WRITE_CRYPTO_DATA(data) do { } while (0)
+    #define START_READ_CRYPTO_DATA(data) do { } while (0)
+    #define END_READ_CRYPTO_DATA(data) do { } while (0)
+#endif
+#endif
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+ssize_t ssv6xxx_tx_queue_status_dump (struct ssv_softc *sc, char *status_buf,
+                                      ssize_t buf_size);
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev_tbl.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev_tbl.h
new file mode 100644
index 0000000000000..7ce0c905c64d8
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev_tbl.h
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DEV_TBL_H_
+#define _DEV_TBL_H_ 
+#include "ssv6200_configuration.h"
+#include "drv_comm.h"
+struct ssv6xxx_dev_table {
+    u32 address;
+    u32 data;
+};
+#define ssv6200_phy_tbl phy_setting
+#ifdef CONFIG_SSV_CABRIO_E
+#define ssv6200_rf_tbl asic_rf_setting
+#else
+#undef ssv6200_rf_tbl
+#define ssv6200_rf_tbl fpga_rf_setting
+#endif
+#define ACTION_DO_NOTHING 0
+#define ACTION_UPDATE_NAV 1
+#define ACTION_RESET_NAV 2
+#define ACTION_SIGNAL_ACK 3
+#define FRAME_ACCEPT 0
+#define FRAME_DROP 1
+#define SET_DEC_TBL(_type,_mask,_action,_drop) \
+    (_type<<9| \
+    _mask <<3| \
+    _action<<1| \
+    _drop)
+#ifndef USE_GENERIC_DECI_TBL
+ u16 sta_deci_tbl[] =
+ {
+  SET_DEC_TBL(0x1e, 0x3e, ACTION_RESET_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x18, 0x3e, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x1a, 0x3f, ACTION_SIGNAL_ACK, FRAME_DROP),
+  SET_DEC_TBL(0x10, 0x38, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x25, 0x3f, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x26, 0x36, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x08, 0x3f, ACTION_DO_NOTHING, FRAME_ACCEPT),
+  SET_DEC_TBL(0x05, 0x3f, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x0b, 0x3f, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x01, 0x3d, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x20, 0x30, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_UPDATE_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_RESET_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_DROP),
+  0x2008,
+  0x1001,
+#if 0
+  0x8408,
+  0x1000,
+#else
+  0x0808,
+  0x1040,
+#endif
+  0x2008,
+  0x800E,
+  0x0BB8,
+  0x2B88,
+  0x0800,
+ };
+ u16 ap_deci_tbl[] =
+ {
+  SET_DEC_TBL(0x1e, 0x3e, ACTION_RESET_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x18, 0x3e, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x1a, 0x3f, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x10, 0x38, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x25, 0x3f, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x26, 0x36, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x08, 0x3f, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x20, 0x30, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_ACCEPT),
+  SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_ACCEPT),
+  SET_DEC_TBL(0x20, 0x30, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+  SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_UPDATE_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_RESET_NAV, FRAME_DROP),
+  SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_DROP),
+  0x2008,
+  0x1001,
+  0x0888,
+  0x1040,
+  0x2008,
+  0x800E,
+  0x0800,
+  0x2008,
+  0x0800,
+ };
+#else
+u16 generic_deci_tbl[] =
+    {
+            SET_DEC_TBL(0x1e, 0x3e, ACTION_RESET_NAV, FRAME_DROP),
+            SET_DEC_TBL(0x18, 0x3e, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+            SET_DEC_TBL(0x1a, 0x3f, ACTION_DO_NOTHING, FRAME_ACCEPT),
+            SET_DEC_TBL(0x10, 0x38, ACTION_DO_NOTHING, FRAME_DROP),
+            0,
+            0,
+            0,
+            SET_DEC_TBL(0x05, 0x3f, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+            SET_DEC_TBL(0x0b, 0x3f, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+            SET_DEC_TBL(0x01, 0x3d, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+            SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_ACCEPT),
+            SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_ACCEPT),
+            SET_DEC_TBL(0x00, 0x00, ACTION_DO_NOTHING, FRAME_DROP),
+            SET_DEC_TBL(0x00, 0x00, ACTION_UPDATE_NAV, FRAME_DROP),
+            SET_DEC_TBL(0x00, 0x00, ACTION_RESET_NAV, FRAME_DROP),
+            SET_DEC_TBL(0x00, 0x00, ACTION_SIGNAL_ACK, FRAME_DROP),
+            0x2008,
+            0x1001,
+            0x0400,
+            0x0400,
+            0x2000,
+            0x800E,
+            0x0800,
+            0x0B88,
+            0x0800,
+    };
+#endif
+#define SET_PHY_INFO(_ctsdur,_ba_rate_idx,_ack_rate_idx,_llength_idx,_llength_enable) \
+         (_ctsdur<<16| \
+         _ba_rate_idx <<10| \
+         _ack_rate_idx<<4| \
+         _llength_idx<<1| \
+         _llength_enable)
+#define SET_PHY_L_LENGTH(_l_ba,_l_rts,_l_cts_ack) (_l_ba<<12|_l_rts<<6 |_l_cts_ack)
+#ifdef CONFIG_SSV_CABRIO_E
+static u32 phy_info_6051z[] =
+{
+        0x18000000, 0x18000100, 0x18000200, 0x18000300, 0x18000140,
+        0x18000240, 0x18000340, 0x0C000001, 0x0C000101, 0x0C000201,
+        0x0C000301, 0x18000401, 0x18000501, 0x18000601, 0x18000701,
+        0x0C030002, 0x0C030102, 0x0C030202, 0x18030302, 0x18030402,
+        0x18030502, 0x18030602, 0x1C030702, 0x0C030082, 0x0C030182,
+        0x0C030282, 0x18030382, 0x18030482, 0x18030582, 0x18030682,
+        0x1C030782, 0x0C030042, 0x0C030142, 0x0C030242, 0x18030342,
+        0x18030442, 0x18030542, 0x18030642, 0x1C030742
+};
+#endif
+static u32 phy_info_tbl[] =
+ {
+  0x0C000000, 0x0C000100, 0x0C000200, 0x0C000300, 0x0C000140,
+  0x0C000240, 0x0C000340, 0x00000001, 0x00000101, 0x00000201,
+  0x00000301, 0x0C000401, 0x0C000501, 0x0C000601, 0x0C000701,
+  0x00030002, 0x00030102, 0x00030202, 0x0C030302, 0x0C030402,
+  0x0C030502, 0x0C030602, 0x10030702, 0x00030082, 0x00030182,
+  0x00030282, 0x0C030382, 0x0C030482, 0x0C030582, 0x0C030682,
+  0x10030782, 0x00030042, 0x00030142, 0x00030242, 0x0C030342,
+  0x0C030442, 0x0C030542, 0x0C030642, 0x10030742,
+  SET_PHY_INFO(314, 0, 0, 0, 0),
+  SET_PHY_INFO(258, 0, 1, 0, 0),
+  SET_PHY_INFO(223, 0, 1, 0, 0),
+  SET_PHY_INFO(213, 0, 1, 0, 0),
+  SET_PHY_INFO(162, 0, 4, 0, 0),
+  SET_PHY_INFO(127, 0, 4, 0, 0),
+  SET_PHY_INFO(117, 0, 4, 0, 0),
+  SET_PHY_INFO(60, 7, 7, 0, 0),
+  SET_PHY_INFO(52, 7, 7, 0, 0),
+  SET_PHY_INFO(48, 9, 9, 0, 0),
+  SET_PHY_INFO(44, 9, 9, 0, 0),
+  SET_PHY_INFO(44, 11, 11, 0, 0),
+  SET_PHY_INFO(40, 11, 11, 0, 0),
+  SET_PHY_INFO(40, 11, 11, 0, 0),
+  SET_PHY_INFO(40, 11, 11, 0, 0),
+  SET_PHY_INFO(76, 7, 7, 0, 1),
+  SET_PHY_INFO(64, 9, 9, 1, 1),
+  SET_PHY_INFO(60, 9, 9, 2, 1),
+  SET_PHY_INFO(60, 11, 11, 3, 1),
+  SET_PHY_INFO(56, 11, 11, 4, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(76, 7, 7, 6, 1),
+  SET_PHY_INFO(64, 9, 9, 1, 1),
+  SET_PHY_INFO(60, 9, 9, 2, 1),
+  SET_PHY_INFO(60, 11, 11, 3, 1),
+  SET_PHY_INFO(56, 11, 11, 4, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(56, 11, 11, 5, 1),
+  SET_PHY_INFO(64, 7, 7, 0, 0),
+  SET_PHY_INFO(52, 9, 9, 0, 0),
+  SET_PHY_INFO(48, 9, 9, 0, 0),
+  SET_PHY_INFO(48, 11, 11, 0, 0),
+  SET_PHY_INFO(44, 11, 11, 0, 0),
+  SET_PHY_INFO(44, 11, 11, 0, 0),
+  SET_PHY_INFO(44, 11, 11, 0, 0),
+  SET_PHY_INFO(44, 11, 11, 0, 0),
+  SET_PHY_L_LENGTH(50, 38, 35),
+  SET_PHY_L_LENGTH(35, 29, 26),
+  SET_PHY_L_LENGTH(29, 26, 23),
+  SET_PHY_L_LENGTH(26, 23, 23),
+  SET_PHY_L_LENGTH(23, 23, 20),
+  SET_PHY_L_LENGTH(23, 20, 20),
+  SET_PHY_L_LENGTH(47, 38, 35),
+  SET_PHY_L_LENGTH( 0, 0, 0),
+ };
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/drv_comm.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/drv_comm.h
new file mode 100644
index 0000000000000..16be60ab2b87a
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/drv_comm.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DRV_COMM_H_
+#define _DRV_COMM_H_ 
+#define PHY_INFO_TBL1_SIZE 39
+#define PHY_INFO_TBL2_SIZE 39
+#define PHY_INFO_TBL3_SIZE 8
+#define ampdu_fw_rate_info_status_no_use BIT(0)
+#define ampdu_fw_rate_info_status_in_use BIT(1)
+#define ampdu_fw_rate_info_status_reset BIT(2)
+#define SSV_NUM_STA 8
+#define SSV_NUM_VIF 2
+#define SECURITY_KEY_LEN (32)
+enum SSV_CIPHER_E {
+    SSV_CIPHER_NONE,
+    SSV_CIPHER_WEP40,
+    SSV_CIPHER_WEP104,
+    SSV_CIPHER_TKIP,
+    SSV_CIPHER_CCMP,
+    SSV_CIPHER_SMS4,
+    SSV_CIPHER_INVALID = (-1)
+};
+#define ME_NONE 0
+#define ME_WEP40 1
+#define ME_WEP104 2
+#define ME_TKIP 3
+#define ME_CCMP 4
+#define ME_SMS4 5
+struct ssv6xxx_hw_key {
+    u8 key[SECURITY_KEY_LEN];
+ u32 tx_pn_l;
+    u32 tx_pn_h;
+ u32 rx_pn_l;
+    u32 rx_pn_h;
+}__attribute__((packed));
+struct ssv6xxx_hw_sta_key {
+ u8 pair_key_idx:4;
+ u8 group_key_idx:4;
+    u8 valid;
+ u8 reserve[2];
+ struct ssv6xxx_hw_key pair;
+}__attribute__((packed));
+struct ssv6xxx_hw_sec {
+    struct ssv6xxx_hw_key group_key[3];
+    struct ssv6xxx_hw_sta_key sta_key[8];
+}__attribute__((packed));
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.c
new file mode 100644
index 0000000000000..e677508358f07
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.c
@@ -0,0 +1,380 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/etherdevice.h>
+#include <ssv6200.h>
+#include "efuse.h"
+mm_segment_t oldfs;
+struct file *openFile(char *path,int flag,int mode)
+{
+    struct file *fp=NULL;
+    fp=filp_open(path, flag, 0);
+    if(IS_ERR(fp))
+        return NULL;
+    else
+        return fp;
+}
+int readFile(struct file *fp,char *buf,int readlen)
+{
+    if (fp->f_op && fp->f_op->read)
+        return fp->f_op->read(fp,buf,readlen, &fp->f_pos);
+    else
+    return -1;
+}
+int closeFile(struct file *fp)
+{
+    filp_close(fp,NULL);
+    return 0;
+}
+void initKernelEnv(void)
+{
+    oldfs = get_fs();
+    set_fs(KERNEL_DS);
+}
+void parseMac(char* mac, u_int8_t addr[])
+{
+    long b;
+    int i;
+    for (i = 0; i < 6; i++)
+    {
+        b = simple_strtol(mac+(3*i), (char **) NULL, 16);
+        addr[i] = (char)b;
+    }
+}
+static int readfile_mac(u8 *path,u8 *mac_addr)
+{
+    char buf[128];
+    struct file *fp=NULL;
+    int ret=0;
+    fp=openFile(path,O_RDONLY,0);
+    if (fp!=NULL)
+    {
+        initKernelEnv();
+        memset(buf,0,128);
+        if ((ret=readFile(fp,buf,128))>0)
+        {
+            parseMac(buf,(uint8_t *)mac_addr);
+        }
+        else
+            printk("read file error %d=[%s]\n",ret,path);
+        set_fs(oldfs);
+        closeFile(fp);
+    }
+    else
+        printk("Read open File fail[%s]!!!! \n",path);
+    return ret;
+}
+static int write_mac_to_file(u8 *mac_path,u8 *mac_addr)
+{
+    char buf[128];
+    struct file *fp=NULL;
+    int ret=0,len;
+    mm_segment_t old_fs;
+    fp=openFile(mac_path,O_WRONLY|O_CREAT,0640);
+    if (fp!=NULL)
+    {
+        initKernelEnv();
+        memset(buf,0,128);
+        sprintf(buf,"%x:%x:%x:%x:%x:%x",mac_addr[0],mac_addr[1],mac_addr[2],mac_addr[3],mac_addr[4],mac_addr[5]);
+        len = strlen(buf)+1;
+        old_fs = get_fs();
+        set_fs(KERNEL_DS);
+        fp->f_op->write(fp, (char *)buf, len, &fp->f_pos);
+        set_fs(old_fs);
+        closeFile(fp);
+    }
+    else
+        printk("Write open File fail!!!![%s] \n",mac_path);
+    return ret;
+}
+static struct efuse_map SSV_EFUSE_ITEM_TABLE[] = {
+    {4, 0, 0},
+    {4, 8, 0},
+    {4, 8, 0},
+    {4, 48, 0},
+    {4, 8, 0},
+    {4, 8, 0},
+    {4, 8, 0},
+};
+static u8 read_efuse(struct ssv_hw *sh, u8 *pbuf)
+{
+    extern struct ssv6xxx_cfg ssv_cfg;
+    u32 val, i;
+    u32 *temp = (u32 *)pbuf;
+    SMAC_REG_WRITE(sh,0xC0000328,0x11);
+    SMAC_REG_WRITE(sh, SSV_EFUSE_ID_READ_SWITCH, 0x1);
+    SMAC_REG_READ(sh, SSV_EFUSE_ID_RAW_DATA_BASE, &val);
+    ssv_cfg.chip_identity = val;
+ SMAC_REG_WRITE(sh, SSV_EFUSE_READ_SWITCH, 0x1);
+    SMAC_REG_READ(sh, SSV_EFUSE_RAW_DATA_BASE, &val);
+    if (val == 0x00) {
+    return 0;
+    }
+    for (i = 0; i < (EFUSE_MAX_SECTION_MAP); i++)
+    {
+        SMAC_REG_WRITE(sh, SSV_EFUSE_READ_SWITCH+i*4, 0x1);
+        SMAC_REG_READ(sh, SSV_EFUSE_RAW_DATA_BASE+i*4, &val);
+        *temp++ = val;
+    }
+    SMAC_REG_WRITE(sh,0xC0000328,0x1800000a);
+    return 1;
+}
+static u16 parser_efuse(u8 *pbuf, u8 *mac_addr)
+{
+    u8 *rtemp8,idx=0;
+ u16 shift=0,i;
+    u16 efuse_real_content_len = 0;
+ rtemp8 = pbuf;
+    if (*rtemp8 == 0x00) {
+  return efuse_real_content_len;
+    }
+ do
+ {
+  idx = (*(rtemp8) >> shift)&0xf;
+  switch(idx)
+  {
+   case EFUSE_R_CALIBRATION_RESULT:
+   case EFUSE_CRYSTAL_FREQUENCY_OFFSET:
+   case EFUSE_TX_POWER_INDEX_1:
+   case EFUSE_TX_POWER_INDEX_2:
+   case EFUSE_SAR_RESULT:
+    if(shift)
+    {
+     rtemp8 ++;
+     SSV_EFUSE_ITEM_TABLE[idx].value = (u16)((u8)(*((u16*)rtemp8)) & ((1<< SSV_EFUSE_ITEM_TABLE[idx].byte_cnts) - 1));
+    }
+    else
+    {
+     SSV_EFUSE_ITEM_TABLE[idx].value = (u16)((u8)(*((u16*)rtemp8) >> 4) & ((1<< SSV_EFUSE_ITEM_TABLE[idx].byte_cnts) - 1));
+    }
+    efuse_real_content_len += (SSV_EFUSE_ITEM_TABLE[idx].offset + SSV_EFUSE_ITEM_TABLE[idx].byte_cnts);
+    break;
+   case EFUSE_MAC:
+                if(shift)
+    {
+     rtemp8 ++;
+     memcpy(mac_addr,rtemp8,6);
+    }
+    else
+    {
+     for(i=0;i<6;i++)
+     {
+      mac_addr[i] = (u16)(*((u16*)rtemp8) >> 4) & 0xff;
+      rtemp8++;
+     }
+    }
+    efuse_real_content_len += (SSV_EFUSE_ITEM_TABLE[idx].offset + SSV_EFUSE_ITEM_TABLE[idx].byte_cnts);
+    break;
+#if 0
+   case EFUSE_IQ_CALIBRAION_RESULT:
+    if(shift)
+    {
+     rtemp8 ++;
+     SSV_EFUSE_ITEM_TABLE[idx].value = (u16)(*((u16*)rtemp8)) & ((1<< SSV_EFUSE_ITEM_TABLE[idx].byte_cnts) - 1);
+    }
+    else
+    {
+     SSV_EFUSE_ITEM_TABLE[idx].value = (u16)(*((u16*)rtemp8) >> 4) & ((1<< SSV_EFUSE_ITEM_TABLE[idx].byte_cnts) - 1);
+    }
+    efuse_real_content_len += (SSV_EFUSE_ITEM_TABLE[idx].offset + SSV_EFUSE_ITEM_TABLE[idx].byte_cnts);
+    break;
+#endif
+   default:
+                idx = 0;
+    break;
+  }
+  shift = efuse_real_content_len % 8;
+  rtemp8 = &pbuf[efuse_real_content_len / 8];
+ }while(idx != 0);
+    return efuse_real_content_len;
+}
+void addr_increase_copy(u8 *dst, u8 *src)
+{
+#if 0
+ u16 *a = (u16 *)dst;
+ const u16 *b = (const u16 *)src;
+ a[0] = b[0];
+ a[1] = b[1];
+ if (b[2] == 0xffff)
+  a[2] = b[2] - 1;
+ else
+  a[2] = b[2] + 1;
+#endif
+    u8 *a = (u8 *)dst;
+    const u8 *b = (const u8 *)src;
+    a[0] = b[0];
+    a[1] = b[1];
+    a[2] = b[2];
+    a[3] = b[3];
+    a[4] = b[4];
+    if (b[5]&0x1)
+        a[5] = b[5] - 1;
+    else
+        a[5] = b[5] + 1;
+}
+static u8 key_char2num(u8 ch)
+{
+    if((ch>='0')&&(ch<='9'))
+        return ch - '0';
+    else if ((ch>='a')&&(ch<='f'))
+        return ch - 'a' + 10;
+    else if ((ch>='A')&&(ch<='F'))
+        return ch - 'A' + 10;
+    else
+        return 0xff;
+}
+u8 key_2char2num(u8 hch, u8 lch)
+{
+    return ((key_char2num(hch) << 4) | key_char2num(lch));
+}
+extern struct ssv6xxx_cfg ssv_cfg;
+extern char* ssv_initmac;
+#ifdef ROCKCHIP_3126_SUPPORT
+extern int rockchip_wifi_mac_addr(unsigned char *buf);
+#endif
+#ifdef AML_WIFI_MAC
+extern u8 *wifi_get_mac(void);
+#endif
+void efuse_read_all_map(struct ssv_hw *sh)
+{
+    u8 mac[ETH_ALEN] = {0};
+    int jj,kk;
+    u8 efuse_mapping_table[EFUSE_HWSET_MAX_SIZE/8];
+#ifndef CONFIG_SSV_RANDOM_MAC
+    u8 pseudo_mac0[ETH_ALEN] = { 0x00, 0x33, 0x33, 0x33, 0x33, 0x33 };
+#endif
+    u8 rom_mac0[ETH_ALEN];
+#ifdef EFUSE_DEBUG
+    int i;
+#endif
+    memset(rom_mac0,0x00,ETH_ALEN);
+ memset(efuse_mapping_table,0x00,EFUSE_HWSET_MAX_SIZE/8);
+    read_efuse(sh, efuse_mapping_table);
+#ifdef EFUSE_DEBUG
+    for(i=0;i<(EFUSE_HWSET_MAX_SIZE/8);i++)
+    {
+        if(i%4 == 0)
+            printk("\n");
+        printk("%02x-",efuse_mapping_table[i]);
+    }
+    printk("\n");
+#endif
+    parser_efuse(efuse_mapping_table,rom_mac0);
+    ssv_cfg.r_calbration_result = (u8)SSV_EFUSE_ITEM_TABLE[EFUSE_R_CALIBRATION_RESULT].value;
+    ssv_cfg.sar_result = (u8)SSV_EFUSE_ITEM_TABLE[EFUSE_SAR_RESULT].value;
+    ssv_cfg.crystal_frequency_offset = (u8)SSV_EFUSE_ITEM_TABLE[EFUSE_CRYSTAL_FREQUENCY_OFFSET].value;
+    ssv_cfg.tx_power_index_1 = (u8)SSV_EFUSE_ITEM_TABLE[EFUSE_TX_POWER_INDEX_1].value;
+    ssv_cfg.tx_power_index_2 = (u8)SSV_EFUSE_ITEM_TABLE[EFUSE_TX_POWER_INDEX_2].value;
+    if (!is_valid_ether_addr(&sh->cfg.maddr[0][0]))
+    {
+#ifdef AML_WIFI_MAC
+        memcpy(mac, wifi_get_mac(),ETH_ALEN);
+        if (is_valid_ether_addr(mac)) {
+            printk("Aml  get mac address from key " \
+                    "[%02x:%02x:%02x:%02x:%02x:%02x]\n", \
+                     mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+             memcpy(&sh->cfg.maddr[0][0], mac, ETH_ALEN);
+             addr_increase_copy(&sh->cfg.maddr[1][0], mac);
+            goto Done;
+        }
+        else {
+            printk(">=========Aml invalid_wifi_addr=========< \n");
+        }
+#endif
+#ifdef ROCKCHIP_3126_SUPPORT
+        if (!rockchip_wifi_mac_addr(mac)) {
+            printk("=========> get mac address from flash [%02x:%02x:%02x:%02x:%02x:%02x]\n", mac[0], mac[1],
+                    mac[2], mac[3], mac[4], mac[5]);
+            if(is_valid_ether_addr(mac)) {
+                memcpy(&sh->cfg.maddr[0][0],mac,ETH_ALEN);
+                addr_increase_copy(&sh->cfg.maddr[1][0],mac);
+                goto Done;
+            }
+        }
+#endif
+        if(!sh->cfg.ignore_efuse_mac)
+        {
+            if (is_valid_ether_addr(rom_mac0)) {
+                printk("MAC address from e-fuse\n");
+                memcpy(&sh->cfg.maddr[0][0], rom_mac0, ETH_ALEN);
+                addr_increase_copy(&sh->cfg.maddr[1][0], rom_mac0);
+                goto Done;
+            }
+        }
+        if (ssv_initmac != NULL)
+        {
+            for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) {
+                mac[jj] = key_2char2num(ssv_initmac[kk], ssv_initmac[kk+ 1]);
+            }
+            if(is_valid_ether_addr(mac)) {
+                printk("MAC address from insert module\n");
+                memcpy(&sh->cfg.maddr[0][0],mac,ETH_ALEN);
+                addr_increase_copy(&sh->cfg.maddr[1][0],mac);
+                goto Done;
+            }
+        }
+        if (sh->cfg.mac_address_path[0] != 0x00)
+        {
+            if((readfile_mac(sh->cfg.mac_address_path,&sh->cfg.maddr[0][0])) && (is_valid_ether_addr(&sh->cfg.maddr[0][0])))
+            {
+                printk("MAC address from sh->cfg.mac_address_path[wifi.cfg]\n");
+                addr_increase_copy(&sh->cfg.maddr[1][0], &sh->cfg.maddr[0][0]);
+                goto Done;
+            }
+        }
+        switch (sh->cfg.mac_address_mode) {
+        case 1:
+            get_random_bytes(&sh->cfg.maddr[0][0],ETH_ALEN);
+            sh->cfg.maddr[0][0] = sh->cfg.maddr[0][0] & 0xF0;
+            addr_increase_copy(&sh->cfg.maddr[1][0], &sh->cfg.maddr[0][0]);
+            break;
+        case 2:
+            if((readfile_mac(sh->cfg.mac_output_path,&sh->cfg.maddr[0][0])) && (is_valid_ether_addr(&sh->cfg.maddr[0][0])))
+            {
+                addr_increase_copy(&sh->cfg.maddr[1][0], &sh->cfg.maddr[0][0]);
+            }
+            else
+            {
+                {
+                    get_random_bytes(&sh->cfg.maddr[0][0],ETH_ALEN);
+                    sh->cfg.maddr[0][0] = sh->cfg.maddr[0][0] & 0xF0;
+                    addr_increase_copy(&sh->cfg.maddr[1][0], &sh->cfg.maddr[0][0]);
+                    if (sh->cfg.mac_output_path[0] != 0x00)
+                        write_mac_to_file(sh->cfg.mac_output_path,&sh->cfg.maddr[0][0]);
+                }
+            }
+            break;
+        default:
+            memcpy(&sh->cfg.maddr[0][0], pseudo_mac0, ETH_ALEN);
+            addr_increase_copy(&sh->cfg.maddr[1][0], pseudo_mac0);
+            break;
+        }
+        printk("MAC address from Software MAC mode[%d]\n",sh->cfg.mac_address_mode);
+    }
+Done:
+    printk("EFUSE configuration\n");
+    printk("Read efuse chip identity[%08x]\n",ssv_cfg.chip_identity);
+    printk("r_calbration_result- %x\n",ssv_cfg.r_calbration_result);
+    printk("sar_result- %x\n",ssv_cfg.sar_result);
+    printk("crystal_frequency_offset- %x\n",ssv_cfg.crystal_frequency_offset);
+    printk("tx_power_index_1- %x\n",ssv_cfg.tx_power_index_1);
+    printk("tx_power_index_2- %x\n",ssv_cfg.tx_power_index_2);
+ printk("MAC address - %pM\n", rom_mac0);
+    sh->cfg.crystal_frequency_offset = ssv_cfg.crystal_frequency_offset;
+    sh->cfg.tx_power_index_1 = ssv_cfg.tx_power_index_1;
+    sh->cfg.tx_power_index_2 = ssv_cfg.tx_power_index_2;
+    sh->cfg.chip_identity = ssv_cfg.chip_identity;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.h
new file mode 100644
index 0000000000000..16f8a78e82e54
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/efuse.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_EFUSE_H_
+#define _SSV_EFUSE_H_ 
+#include "dev.h"
+struct efuse_map {
+    u8 offset;
+    u8 byte_cnts;
+    u16 value;
+};
+enum efuse_data_item {
+   EFUSE_R_CALIBRATION_RESULT = 1,
+   EFUSE_SAR_RESULT,
+   EFUSE_MAC,
+   EFUSE_CRYSTAL_FREQUENCY_OFFSET,
+   EFUSE_TX_POWER_INDEX_1,
+   EFUSE_TX_POWER_INDEX_2
+};
+#define EFUSE_HWSET_MAX_SIZE (256-32)
+#define EFUSE_MAX_SECTION_MAP (EFUSE_HWSET_MAX_SIZE>>5)
+#define SSV_EFUSE_ID_READ_SWITCH 0xC2000128
+#define SSV_EFUSE_ID_RAW_DATA_BASE 0xC200014C
+#define SSV_EFUSE_READ_SWITCH 0xC200012C
+#define SSV_EFUSE_RAW_DATA_BASE 0xC2000150
+void efuse_read_all_map(struct ssv_hw *sh);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.c
new file mode 100644
index 0000000000000..2ec41cb149d68
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.c
@@ -0,0 +1,1694 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/nl80211.h>
+#include <linux/kthread.h>
+#include <linux/etherdevice.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+#include <crypto/hash.h>
+#else
+#include <linux/crypto.h>
+#endif
+#include <ssv6200.h>
+#include <hci/hctrl.h>
+#include <ssv_version.h>
+#include <ssv_firmware_version.h>
+#include "dev_tbl.h"
+#include "dev.h"
+#include "lib.h"
+#include "ssv_rc.h"
+#include "ap.h"
+#include "efuse.h"
+#include "sar.h"
+#include "ssv_cfgvendor.h"
+
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#include "ssv_pm.h"
+#endif
+#include "linux_80211.h"
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+#include "linux_2_6_35.h"
+#endif
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+#include "ssv6xxx_debugfs.h"
+#endif
+#ifdef MULTI_THREAD_ENCRYPT
+#include <linux/cpu.h>
+#include <linux/notifier.h>
+#endif
+MODULE_AUTHOR("iComm Semiconductor Co., Ltd");
+MODULE_DESCRIPTION("Support for SSV6xxx wireless LAN cards.");
+MODULE_SUPPORTED_DEVICE("SSV6xxx 802.11n WLAN cards");
+MODULE_LICENSE("Dual BSD/GPL");
+#define WIFI_FIRMWARE_NAME "ssv6051-sw.bin"
+static const struct ieee80211_iface_limit ssv6xxx_p2p_limits[] = {
+ {
+  .max = 2,
+  .types = BIT(NL80211_IFTYPE_STATION),
+ },
+ {
+  .max = 1,
+  .types = BIT(NL80211_IFTYPE_P2P_GO) |
+       BIT(NL80211_IFTYPE_P2P_CLIENT) |
+    BIT(NL80211_IFTYPE_AP),
+ },
+};
+static const struct ieee80211_iface_combination
+ssv6xxx_iface_combinations_p2p[] = {
+ { .num_different_channels = 1,
+   .max_interfaces = SSV6200_MAX_VIF,
+   .beacon_int_infra_match = true,
+   .limits = ssv6xxx_p2p_limits,
+   .n_limits = ARRAY_SIZE(ssv6xxx_p2p_limits),
+ },
+};
+#define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
+    (((a) & 0xff00ff00) >> 8))
+#define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
+#define CHAN2G(_freq,_idx) { \
+    .band = INDEX_80211_BAND_2GHZ, \
+    .center_freq = (_freq), \
+    .hw_value = (_idx), \
+    .max_power = 20, \
+}
+#ifndef WLAN_CIPHER_SUITE_SMS4
+#define WLAN_CIPHER_SUITE_SMS4 0x00147201
+#endif
+#define SHPCHECK(__hw_rate,__flags) \
+    ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate +3 ) : 0)
+#define RATE(_bitrate,_hw_rate,_flags) { \
+    .bitrate = (_bitrate), \
+    .flags = (_flags), \
+    .hw_value = (_hw_rate), \
+    .hw_value_short = SHPCHECK(_hw_rate,_flags) \
+}
+extern struct ssv6xxx_cfg ssv_cfg;
+static const struct ieee80211_channel ssv6200_2ghz_chantable[] =
+{
+    CHAN2G(2412, 1 ),
+    CHAN2G(2417, 2 ),
+    CHAN2G(2422, 3 ),
+    CHAN2G(2427, 4 ),
+    CHAN2G(2432, 5 ),
+    CHAN2G(2437, 6 ),
+    CHAN2G(2442, 7 ),
+    CHAN2G(2447, 8 ),
+    CHAN2G(2452, 9 ),
+    CHAN2G(2457, 10),
+    CHAN2G(2462, 11),
+    CHAN2G(2467, 12),
+    CHAN2G(2472, 13),
+    CHAN2G(2484, 14),
+};
+static struct ieee80211_rate ssv6200_legacy_rates[] =
+{
+    RATE(10, 0x00, 0),
+    RATE(20, 0x01, IEEE80211_RATE_SHORT_PREAMBLE),
+    RATE(55, 0x02, IEEE80211_RATE_SHORT_PREAMBLE),
+    RATE(110, 0x03, IEEE80211_RATE_SHORT_PREAMBLE),
+    RATE(60, 0x07, 0),
+    RATE(90, 0x08, 0),
+    RATE(120, 0x09, 0),
+    RATE(180, 0x0a, 0),
+    RATE(240, 0x0b, 0),
+    RATE(360, 0x0c, 0),
+    RATE(480, 0x0d, 0),
+    RATE(540, 0x0e, 0),
+};
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+extern struct ssv_softc * ssv_notify_sc;
+#endif
+#ifdef CONFIG_SSV_CABRIO_E
+struct ssv6xxx_ch_cfg ch_cfg_z[] = {
+ {ADR_ABB_REGISTER_1, 0, 0x151559fc},
+ {ADR_LDO_REGISTER, 0, 0x00eb7c1c},
+ {ADR_RX_ADC_REGISTER, 0, 0x20d000d2}
+};
+struct ssv6xxx_ch_cfg ch_cfg_p[] = {
+ {ADR_ABB_REGISTER_1, 0, 0x151559fc},
+ {ADR_RX_ADC_REGISTER, 0, 0x20d000d2}
+};
+int ssv6xxx_do_iq_calib(struct ssv_hw *sh, struct ssv6xxx_iqk_cfg *p_cfg)
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int ret = 0;
+    printk("# Do init_cali (iq)\n");
+    skb = ssv_skb_alloc(HOST_CMD_HDR_LEN + IQK_CFG_LEN + PHY_SETTING_SIZE + RF_SETTING_SIZE);
+    if(skb == NULL)
+    {
+        printk("init ssv6xxx_do_iq_calib fail!!!\n");
+        return (-1);
+    }
+    if((PHY_SETTING_SIZE > MAX_PHY_SETTING_TABLE_SIZE) ||
+        (RF_SETTING_SIZE > MAX_RF_SETTING_TABLE_SIZE))
+    {
+        printk("Please recheck RF or PHY table size!!!\n");
+        WARN_ON(1);
+        return (-1);
+    }
+    skb->data_len = HOST_CMD_HDR_LEN + IQK_CFG_LEN + PHY_SETTING_SIZE + RF_SETTING_SIZE;
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_INIT_CALI;
+    host_cmd->len = skb->data_len;
+    p_cfg->phy_tbl_size = PHY_SETTING_SIZE;
+    p_cfg->rf_tbl_size = RF_SETTING_SIZE;
+    memcpy(host_cmd->dat32, p_cfg, IQK_CFG_LEN);
+    memcpy(host_cmd->dat8+IQK_CFG_LEN, phy_setting, PHY_SETTING_SIZE);
+    memcpy(host_cmd->dat8+IQK_CFG_LEN+PHY_SETTING_SIZE, ssv6200_rf_tbl, RF_SETTING_SIZE);
+    sh->hci.hci_ops->hci_send_cmd(skb);
+    ssv_skb_free(skb);
+    {
+    u32 timeout;
+    sh->sc->iq_cali_done = IQ_CALI_RUNNING;
+    set_current_state(TASK_INTERRUPTIBLE);
+    timeout = wait_event_interruptible_timeout(sh->sc->fw_wait_q,
+                                               sh->sc->iq_cali_done,
+                                               msecs_to_jiffies(500));
+    set_current_state(TASK_RUNNING);
+    if (timeout == 0)
+        return -ETIME;
+    if (sh->sc->iq_cali_done != IQ_CALI_OK)
+        return (-1);
+    }
+    return ret;
+}
+#endif
+#define HT_CAP_RX_STBC_ONE_STREAM 0x1
+#ifdef CONFIG_SSV_WAPI
+static const u32 ssv6xxx_cipher_suites[] = {
+    WLAN_CIPHER_SUITE_WEP40,
+    WLAN_CIPHER_SUITE_WEP104,
+    WLAN_CIPHER_SUITE_TKIP,
+    WLAN_CIPHER_SUITE_CCMP,
+    WLAN_CIPHER_SUITE_SMS4,
+    WLAN_CIPHER_SUITE_AES_CMAC
+};
+#endif
+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+static const struct wiphy_wowlan_support wowlan_support = {
+#ifdef SSV_WAKEUP_HOST
+    .flags = WIPHY_WOWLAN_ANY,
+#else
+    .flags = WIPHY_WOWLAN_DISCONNECT,
+#endif
+    .n_patterns = 0,
+    .pattern_max_len = 0,
+    .pattern_min_len = 0,
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+    .max_pkt_offset = 0,
+#endif
+};
+#endif
+static void ssv6xxx_set_80211_hw_capab(struct ssv_softc *sc)
+{
+    struct ieee80211_hw *hw=sc->hw;
+    struct ssv_hw *sh=sc->sh;
+    struct ieee80211_sta_ht_cap *ht_info;
+#ifdef CONFIG_SSV_WAPI
+    hw->wiphy->cipher_suites = ssv6xxx_cipher_suites;
+    hw->wiphy->n_cipher_suites = ARRAY_SIZE(ssv6xxx_cipher_suites);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)
+    hw->flags = IEEE80211_HW_SIGNAL_DBM;
+#else
+    ieee80211_hw_set(hw, SIGNAL_DBM);
+#endif
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#endif
+    hw->rate_control_algorithm = "ssv6xxx_rate_control";
+    ht_info = &sc->sbands[INDEX_80211_BAND_2GHZ].ht_cap;
+    ampdu_db_log("sh->cfg.hw_caps = 0x%x\n", sh->cfg.hw_caps);
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_HT) {
+        if (sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_RX)
+        {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)
+            hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
+            ampdu_db_log("set IEEE80211_HW_AMPDU_AGGREGATION(0x%x)\n", ((hw->flags)&IEEE80211_HW_AMPDU_AGGREGATION));
+#else
+            ieee80211_hw_set(hw, AMPDU_AGGREGATION);
+            ampdu_db_log("set IEEE80211_HW_AMPDU_AGGREGATION(%d)\n", ieee80211_hw_check(hw, AMPDU_AGGREGATION));
+#endif
+        }
+        ht_info->cap = IEEE80211_HT_CAP_SM_PS;
+        if (sh->cfg.hw_caps & SSV6200_HW_CAP_GF) {
+            ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
+            ht_info->cap |= HT_CAP_RX_STBC_ONE_STREAM<<IEEE80211_HT_CAP_RX_STBC_SHIFT;
+        }
+        if (sh->cfg.hw_caps & SSV6200_HT_CAP_SGI_20)
+            ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
+        ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_32K;
+        ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
+        memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
+        ht_info->mcs.rx_mask[0] = 0xff;
+        ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
+     ht_info->mcs.rx_highest = cpu_to_le16(SSV6200_RX_HIGHEST_RATE);
+        ht_info->ht_supported = true;
+    }
+    hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_P2P) {
+        hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_P2P_CLIENT);
+        hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_P2P_GO);
+        hw->wiphy->iface_combinations = ssv6xxx_iface_combinations_p2p;
+  hw->wiphy->n_iface_combinations = ARRAY_SIZE(ssv6xxx_iface_combinations_p2p);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
+        hw->wiphy->flags |= WIPHY_FLAG_ENFORCE_COMBINATIONS;
+#endif
+    }
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,5,0)
+    hw->wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
+#endif
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_AP){
+        hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,1,0)
+        hw->wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
+#endif
+    }
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 2, 0)
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_TDLS){
+      hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
+      hw->wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
+      printk("TDLS function enabled in sta.cfg\n");
+    }
+#endif
+    hw->queues = 4;
+ hw->max_rates = 4;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)
+ hw->channel_change_time = 5000;
+#endif
+ hw->max_listen_interval = 1;
+ hw->max_rate_tries = HW_MAX_RATE_TRIES;
+    hw->extra_tx_headroom = TXPB_OFFSET + AMPDU_DELIMITER_LEN;
+    if (sizeof(struct ampdu_hdr_st) > SSV_SKB_info_size)
+        hw->extra_tx_headroom += sizeof(struct ampdu_hdr_st);
+    else
+        hw->extra_tx_headroom += SSV_SKB_info_size;
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_2GHZ) {
+  hw->wiphy->bands[INDEX_80211_BAND_2GHZ] =
+   &sc->sbands[INDEX_80211_BAND_2GHZ];
+    }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_TX)
+        #ifdef PREFER_RX
+        hw->max_rx_aggregation_subframes = 64;
+        #else
+        hw->max_rx_aggregation_subframes = 16;
+        #endif
+    else
+        hw->max_rx_aggregation_subframes = 12;
+    hw->max_tx_aggregation_subframes = 64;
+#endif
+    hw->sta_data_size = sizeof(struct ssv_sta_priv_data);
+    hw->vif_data_size = sizeof(struct ssv_vif_priv_data);
+    memcpy(sh->maddr[0].addr, &sh->cfg.maddr[0][0], ETH_ALEN);
+    hw->wiphy->addresses = sh->maddr;
+    hw->wiphy->n_addresses = 1;
+    if (sh->cfg.hw_caps & SSV6200_HW_CAP_P2P) {
+        int i;
+        for (i = 1; i < SSV6200_MAX_HW_MAC_ADDR; i++) {
+      memcpy(sh->maddr[i].addr, sh->maddr[i-1].addr,
+             ETH_ALEN);
+      sh->maddr[i].addr[5]++;
+      hw->wiphy->n_addresses++;
+     }
+    }
+    if (!is_zero_ether_addr(sh->cfg.maddr[1]))
+    {
+        memcpy(sh->maddr[1].addr, sh->cfg.maddr[1], ETH_ALEN);
+        if (hw->wiphy->n_addresses < 2)
+            hw->wiphy->n_addresses = 2;
+    }
+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0))
+    hw->wiphy->wowlan = wowlan_support;
+#else
+    hw->wiphy->wowlan = &wowlan_support;
+#endif
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(3, 14, 0)) || defined(CONFIG_SSV_VENDOR_EXT_SUPPORT)
+    {
+        int err = 0;
+        struct ssv_softc *softc = (struct ssv_softc *)hw->priv;
+        if (softc)
+        {
+            set_wiphy_dev(hw->wiphy, softc->dev);
+            *((struct ssv_softc **)wiphy_priv(hw->wiphy)) = softc;
+        }
+       	printk("Registering Vendor80211\n");
+       	err = ssv_cfgvendor_attach(hw->wiphy);
+       	if (unlikely(err < 0)) {
+       		printk("Couldn not attach vendor commands (%d)\n", err);
+       	}
+    }
+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(3, 14, 0)) || defined(WL_VENDOR_EXT_SUPPORT) */
+
+}
+#ifdef MULTI_THREAD_ENCRYPT
+int ssv6xxx_cpu_callback(struct notifier_block *nfb,
+                         unsigned long action,
+                         void *hcpu)
+{
+    struct ssv_softc *sc = container_of(nfb, struct ssv_softc, cpu_nfb);
+    int hotcpu = (unsigned long)hcpu;
+    struct ssv_encrypt_task_list *ta = NULL;
+    switch (action) {
+    case CPU_UP_PREPARE:
+    case CPU_UP_PREPARE_FROZEN:
+    case CPU_DOWN_FAILED: {
+            int cpu = 0;
+            list_for_each_entry(ta, &sc->encrypt_task_head, list)
+            {
+                if(cpu == hotcpu)
+                    break;
+                cpu++;
+            }
+            if(ta->encrypt_task->state & TASK_UNINTERRUPTIBLE)
+            {
+                kthread_bind(ta->encrypt_task, hotcpu);
+            }
+            printk("encrypt_task %p state is %ld\n", ta->encrypt_task, ta->encrypt_task->state);
+            break;
+        }
+    case CPU_ONLINE:
+    case CPU_ONLINE_FROZEN: {
+            int cpu = 0;
+            list_for_each_entry(ta, &sc->encrypt_task_head, list)
+            {
+                if(cpu == hotcpu)
+                {
+                    ta->cpu_offline = 0;
+                    if ( (ta->started == 0) && (cpu_online(cpu)) )
+                    {
+                        wake_up_process(ta->encrypt_task);
+                        ta->started = 1;
+                        printk("wake up encrypt_task %p state is %ld, cpu = %d\n", ta->encrypt_task, ta->encrypt_task->state, cpu);
+                    }
+                    break;
+                }
+                cpu++;
+            }
+            printk("encrypt_task %p state is %ld\n", ta->encrypt_task, ta->encrypt_task->state);
+            break;
+        }
+#ifdef CONFIG_HOTPLUG_CPU
+    case CPU_UP_CANCELED:
+    case CPU_UP_CANCELED_FROZEN:
+    case CPU_DOWN_PREPARE: {
+            int cpu = 0;
+            list_for_each_entry(ta, &sc->encrypt_task_head, list)
+            {
+                if(cpu == hotcpu)
+                {
+                    ta->cpu_offline = 1;
+                    break;
+                }
+                cpu++;
+            }
+            printk("p = %p\n",ta->encrypt_task);
+            break;
+        }
+    case CPU_DEAD:
+    case CPU_DEAD_FROZEN: {
+            break;
+        }
+#endif
+    }
+    return NOTIFY_OK;
+}
+#endif
+void ssv6xxx_watchdog_restart_hw(struct ssv_softc *sc)
+{
+    printk("%s(): \n", __FUNCTION__);
+    sc->restart_counter++;
+    sc->force_triger_reset = true;
+    sc->beacon_info[0].pubf_addr = 0x00;
+    sc->beacon_info[1].pubf_addr = 0x00;
+    ieee80211_restart_hw(sc->hw);
+}
+#ifdef CONFIG_SSV_RSSI
+extern struct rssi_res_st rssi_res;
+#endif
+void ssv6200_watchdog_timeout(unsigned long arg)
+{
+#ifdef CONFIG_SSV_RSSI
+    static u32 count=0;
+    struct rssi_res_st *rssi_tmp0 = NULL, *rssi_tmp1 = NULL;
+#endif
+    struct ssv_softc *sc = (struct ssv_softc *)arg;
+    if(sc->watchdog_flag == WD_BARKING) {
+        ssv6xxx_watchdog_restart_hw(sc);
+        mod_timer(&sc->watchdog_timeout, jiffies + WATCHDOG_TIMEOUT);
+        return;
+    }
+    if (sc->watchdog_flag != WD_SLEEP)
+        sc->watchdog_flag = WD_BARKING;
+#ifdef CONFIG_SSV_RSSI
+    count++;
+    if(count == 6) {
+        count = 0;
+        if (list_empty(&rssi_res.rssi_list)) {
+            return;
+        }
+        list_for_each_entry_safe(rssi_tmp0, rssi_tmp1, &rssi_res.rssi_list, rssi_list) {
+            if (rssi_tmp0->timeout) {
+                list_del_rcu(&rssi_tmp0->rssi_list);
+                kfree(rssi_tmp0);
+            }
+        }
+    }
+#endif
+    mod_timer(&sc->watchdog_timeout, jiffies + WATCHDOG_TIMEOUT);
+    return;
+}
+static void ssv6xxx_preload_sw_cipher(void)
+{
+#ifdef USE_LOCAL_CRYPTO
+    struct crypto_blkcipher *tmpblkcipher;
+    struct crypto_cipher *tmpcipher;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+    struct crypto_ahash *tmphash;
+#else
+    struct crypto_hash *tmphash;
+#endif
+    printk("Pre-load cipher\n");
+    tmpblkcipher = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
+ if (IS_ERR(tmpblkcipher)) {
+    printk(" ARC4 cipher allocate fail \n");
+ } else {
+    crypto_free_blkcipher(tmpblkcipher);
+    }
+ tmpcipher = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
+ if (IS_ERR(tmpcipher)) {
+     printk(" aes cipher allocate fail \n");
+ } else {
+    crypto_free_cipher(tmpcipher);
+ }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ tmphash =crypto_alloc_ahash("michael_mic", 0, CRYPTO_ALG_ASYNC);
+#else
+ tmphash =crypto_alloc_hash("michael_mic", 0, CRYPTO_ALG_ASYNC);
+#endif
+ if (IS_ERR(tmphash)) {
+     printk(" mic hash allocate fail \n");
+ } else {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ crypto_free_ahash(tmphash);
+#else
+ crypto_free_hash(tmphash);
+#endif
+ }
+#endif
+}
+static int ssv6xxx_init_softc(struct ssv_softc *sc)
+{
+    void *channels;
+    int ret=0;
+#ifdef MULTI_THREAD_ENCRYPT
+    unsigned int cpu;
+#endif
+    sc->sc_flags = SC_OP_INVALID;
+    mutex_init(&sc->mutex);
+    mutex_init(&sc->mem_mutex);
+    sc->config_wq= create_singlethread_workqueue("ssv6xxx_cong_wq");
+    sc->thermal_wq= create_singlethread_workqueue("ssv6xxx_thermal_wq");
+    INIT_DELAYED_WORK(&sc->thermal_monitor_work, thermal_monitor);
+    INIT_WORK(&sc->set_tim_work, ssv6200_set_tim_work);
+    INIT_WORK(&sc->bcast_start_work, ssv6200_bcast_start_work);
+    INIT_DELAYED_WORK(&sc->bcast_stop_work, ssv6200_bcast_stop_work);
+    INIT_DELAYED_WORK(&sc->bcast_tx_work, ssv6200_bcast_tx_work);
+    INIT_WORK(&sc->set_ampdu_rx_add_work, ssv6xxx_set_ampdu_rx_add_work);
+    INIT_WORK(&sc->set_ampdu_rx_del_work, ssv6xxx_set_ampdu_rx_del_work);
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_EARLYSUSPEND
+    sc->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 20;
+    sc->early_suspend.suspend = ssv6xxx_early_suspend;
+    sc->early_suspend.resume = ssv6xxx_late_resume;
+    register_early_suspend(&sc->early_suspend);
+#endif
+    ssv_wakelock_init(sc);
+#endif
+    sc->mac_deci_tbl = sta_deci_tbl;
+    memset((void *)&sc->tx, 0, sizeof(struct ssv_tx));
+    sc->tx.hw_txqid[WMM_AC_VO] = 3; sc->tx.ac_txqid[3] = WMM_AC_VO;
+    sc->tx.hw_txqid[WMM_AC_VI] = 2; sc->tx.ac_txqid[2] = WMM_AC_VI;
+    sc->tx.hw_txqid[WMM_AC_BE] = 1; sc->tx.ac_txqid[1] = WMM_AC_BE;
+    sc->tx.hw_txqid[WMM_AC_BK] = 0; sc->tx.ac_txqid[0] = WMM_AC_BK;
+    INIT_LIST_HEAD(&sc->tx.ampdu_tx_que);
+    spin_lock_init(&sc->tx.ampdu_tx_que_lock);
+    memset((void *)&sc->rx, 0, sizeof(struct ssv_rx));
+    spin_lock_init(&sc->rx.rxq_lock);
+    skb_queue_head_init(&sc->rx.rxq_head);
+    sc->rx.rx_buf = ssv_skb_alloc(MAX_FRAME_SIZE);
+    if (sc->rx.rx_buf == NULL)
+        return -ENOMEM;
+ memset(&sc->bcast_txq, 0, sizeof(struct ssv6xxx_bcast_txq));
+ spin_lock_init(&sc->bcast_txq.txq_lock);
+ skb_queue_head_init(&sc->bcast_txq.qhead);
+ spin_lock_init(&sc->ps_state_lock);
+#ifdef CONFIG_P2P_NOA
+ spin_lock_init(&sc->p2p_noa.p2p_config_lock);
+#endif
+ if (sc->sh->cfg.hw_caps & SSV6200_HW_CAP_2GHZ) {
+        channels = kmemdup(ssv6200_2ghz_chantable,
+   sizeof(ssv6200_2ghz_chantable), GFP_KERNEL);
+  if (!channels) {
+            kfree(sc->rx.rx_buf);
+      return -ENOMEM;
+        }
+  sc->sbands[INDEX_80211_BAND_2GHZ].channels = channels;
+  sc->sbands[INDEX_80211_BAND_2GHZ].band = INDEX_80211_BAND_2GHZ;
+  sc->sbands[INDEX_80211_BAND_2GHZ].n_channels =
+   ARRAY_SIZE(ssv6200_2ghz_chantable);
+  sc->sbands[INDEX_80211_BAND_2GHZ].bitrates = ssv6200_legacy_rates;
+  sc->sbands[INDEX_80211_BAND_2GHZ].n_bitrates =
+   ARRAY_SIZE(ssv6200_legacy_rates);
+ }
+ sc->cur_channel = NULL;
+ sc->hw_chan = (-1);
+    ssv6xxx_set_80211_hw_capab(sc);
+    ret = ssv6xxx_rate_control_register();
+    if (ret != 0) {
+        printk("%s(): Failed to register rc algorithm.\n", __FUNCTION__);
+    }
+#ifdef MULTI_THREAD_ENCRYPT
+    skb_queue_head_init(&sc->preprocess_q);
+    skb_queue_head_init(&sc->crypted_q);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    sc->max_preprocess_q_len = 0;
+    sc->max_crypted_q_len = 0;
+    #endif
+    spin_lock_init(&sc->crypt_st_lock);
+    INIT_LIST_HEAD(&sc->encrypt_task_head);
+    for_each_cpu(cpu, cpu_present_mask)
+    {
+        struct ssv_encrypt_task_list *ta = kzalloc(sizeof(*ta), GFP_KERNEL);
+  memset(ta, 0, sizeof(*ta));
+        ta->encrypt_task = kthread_create_on_node(ssv6xxx_encrypt_task, sc, cpu_to_node(cpu), "%d/ssv6xxx_encrypt_task", cpu);
+        init_waitqueue_head(&ta->encrypt_wait_q);
+        if (!IS_ERR(ta->encrypt_task))
+        {
+            printk("[MT-ENCRYPT]: create kthread %p for CPU %d, ret = %d\n", ta->encrypt_task, cpu, ret);
+#ifdef KTHREAD_BIND
+            kthread_bind(ta->encrypt_task, cpu);
+#endif
+            list_add_tail(&ta->list, &sc->encrypt_task_head);
+            if (cpu_online(cpu))
+            {
+             wake_up_process(ta->encrypt_task);
+                ta->started = 1;
+            }
+            ta->cpu_no = cpu;
+        }
+        else
+        {
+            printk("[MT-ENCRYPT]: Fail to create kthread\n");
+        }
+    }
+    sc->cpu_nfb.notifier_call = ssv6xxx_cpu_callback;
+#ifdef KTHREAD_BIND
+    register_cpu_notifier(&sc->cpu_nfb);
+#endif
+#endif
+    init_waitqueue_head(&sc->tx_wait_q);
+    sc->tx_wait_q_woken = 0;
+    skb_queue_head_init(&sc->tx_skb_q);
+    #ifdef CONFIG_SSV6XXX_DEBUGFS
+    sc->max_tx_skb_q_len = 0;
+    #endif
+    sc->tx_task = kthread_run(ssv6xxx_tx_task, sc, "ssv6xxx_tx_task");
+    sc->tx_q_empty = false;
+    skb_queue_head_init(&sc->tx_done_q);
+    init_waitqueue_head(&sc->rx_wait_q);
+    sc->rx_wait_q_woken = 0;
+    skb_queue_head_init(&sc->rx_skb_q);
+    sc->rx_task = kthread_run(ssv6xxx_rx_task, sc, "ssv6xxx_rx_task");
+    ssv6xxx_preload_sw_cipher();
+    init_timer(&sc->watchdog_timeout);
+    sc->watchdog_timeout.expires = jiffies + 20*HZ;
+    sc->watchdog_timeout.data = (unsigned long)sc;
+    sc->watchdog_timeout.function = ssv6200_watchdog_timeout;
+    init_waitqueue_head(&sc->fw_wait_q);
+#ifdef CONFIG_SSV_RSSI
+    INIT_LIST_HEAD(&rssi_res.rssi_list);
+    rssi_res.rssi = 0;
+#endif
+    add_timer(&sc->watchdog_timeout);
+    //if(get_flash_info(sc) == 1)
+    sc->is_sar_enabled = get_flash_info(sc);
+    if (sc->is_sar_enabled)
+        queue_delayed_work(sc->thermal_wq, &sc->thermal_monitor_work, THERMAL_MONITOR_TIME);
+        //schedule_delayed_work(&sc->thermal_monitor_work, THERMAL_MONITOR_TIME);
+    return ret;
+}
+
+void ssv6xxx_deinit_prepare(void)
+{
+    printk("%s\n", __FUNCTION__); 
+
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+	printk("%s :ps_status = %d\n", __FUNCTION__,PWRSV_PREPARE); 
+    ssv6xxx_watchdog_controller(ssv_notify_sc->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_STOP);
+    ssv_notify_sc->ps_status = PWRSV_PREPARE;                                                                                                                
+	
+	while(ssv_notify_sc->bScanning == true){
+        printk("+");
+        msleep(100);    
+    }
+	printk("\n");
+#endif	
+
+}
+
+
+static int ssv6xxx_deinit_softc(struct ssv_softc *sc)
+{
+    void *channels;
+ struct sk_buff* skb;
+    u8 remain_size;
+#ifdef MULTI_THREAD_ENCRYPT
+    struct ssv_encrypt_task_list *qtask = NULL;
+    int counter = 0;
+#endif
+    printk("%s():\n", __FUNCTION__);
+    if (sc->sh->cfg.hw_caps & SSV6200_HW_CAP_2GHZ) {
+        channels = sc->sbands[INDEX_80211_BAND_2GHZ].channels;
+        kfree(channels);
+    }
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_EARLYSUSPEND
+    unregister_early_suspend(&sc->early_suspend);
+#endif
+    ssv_wakelock_destroy(sc);
+#endif
+    ssv_skb_free(sc->rx.rx_buf);
+    sc->rx.rx_buf = NULL;
+    ssv6xxx_rate_control_unregister();
+    cancel_delayed_work_sync(&sc->bcast_tx_work);
+    //ssv6xxx_watchdog_controller(sc->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_STOP);
+    del_timer_sync(&sc->watchdog_timeout);
+    cancel_delayed_work(&sc->thermal_monitor_work);
+    sc->ps_status = PWRSV_PREPARE;
+    flush_workqueue(sc->thermal_wq);
+    destroy_workqueue(sc->thermal_wq);
+ do{
+  skb = ssv6200_bcast_dequeue(&sc->bcast_txq, &remain_size);
+  if(skb)
+            ssv6xxx_txbuf_free_skb(skb, (void*)sc);
+  else
+   break;
+ }while(remain_size);
+#ifdef MULTI_THREAD_ENCRYPT
+    unregister_cpu_notifier(&sc->cpu_nfb);
+    if (!list_empty(&sc->encrypt_task_head))
+    {
+        for (qtask = list_entry((&sc->encrypt_task_head)->next, typeof(*qtask), list);
+                !list_empty(&sc->encrypt_task_head);
+                qtask = list_entry((&sc->encrypt_task_head)->next, typeof(*qtask), list))
+        {
+            counter++;
+            printk("Stopping encrypt task %d: ...\n", counter);
+            kthread_stop(qtask->encrypt_task);
+            printk("Stopped encrypt task %d: ...\n", counter);
+            list_del(&qtask->list);
+            kfree(qtask);
+        }
+    }
+#endif
+    if (sc->tx_task != NULL)
+    {
+        printk("Stopping TX task...\n");
+        kthread_stop(sc->tx_task);
+  sc->tx_task = NULL;
+        printk("Stopped TX task.\n");
+    }
+    if (sc->rx_task != NULL)
+    {
+        printk("Stopping RX task...\n");
+        kthread_stop(sc->rx_task);
+  sc->rx_task = NULL;
+        printk("Stopped RX task.\n");
+    }
+#ifdef MULTI_THREAD_ENCRYPT
+    while((skb = skb_dequeue(&sc->preprocess_q)) != NULL)
+    {
+        SKB_info *skb_info = (SKB_info *)skb->head;
+        if(skb_info->crypt_st == PKT_CRYPT_ST_ENC_PRE)
+            ssv6xxx_txbuf_free_skb(skb, (void*)sc);
+        else
+            dev_kfree_skb_any(skb);
+    }
+    while((skb = skb_dequeue(&sc->crypted_q)) != NULL)
+    {
+        SKB_info *skb_info = (SKB_info *)skb->head;
+        if(skb_info->crypt_st == PKT_CRYPT_ST_ENC_DONE)
+            ssv6xxx_txbuf_free_skb(skb, (void*)sc);
+        else
+            dev_kfree_skb_any(skb);
+    }
+    printk("[MT-ENCRYPT]: end of de-init\n");
+#endif
+    destroy_workqueue(sc->config_wq);
+    return 0;
+}
+static void ssv6xxx_hw_set_replay_ignore(struct ssv_hw *sh,u8 ignore)
+{
+    u32 temp;
+    SMAC_REG_READ(sh,ADR_SCRT_SET,&temp);
+    temp = temp & SCRT_RPLY_IGNORE_I_MSK;
+    temp |= (ignore << SCRT_RPLY_IGNORE_SFT);
+    SMAC_REG_WRITE(sh,ADR_SCRT_SET, temp);
+}
+extern char *cfgfirmwarepath ;
+int ssv6xxx_init_mac(struct ssv_hw *sh)
+{
+    struct ssv_softc *sc=sh->sc;
+    int i = 0 , ret=0;
+    u8 temp_path[256] = "";
+#ifdef SSV6200_ECO
+    u32 *ptr, id_len, regval, temp[0x8];
+#else
+     u32 *ptr, id_len, regval;
+#endif
+ char *chip_id = sh->chip_id;
+    printk(KERN_INFO "SVN version %d\n", ssv_root_version);
+    printk(KERN_INFO "SVN ROOT URL %s \n", SSV_ROOT_URl);
+    printk(KERN_INFO "COMPILER HOST %s \n", COMPILERHOST);
+    printk(KERN_INFO "COMPILER DATE %s \n", COMPILERDATE);
+    printk(KERN_INFO "COMPILER OS %s \n", COMPILEROS);
+    printk(KERN_INFO "COMPILER OS ARCH %s \n", COMPILEROSARCH);
+    SMAC_REG_READ(sh, ADR_IC_TIME_TAG_1, &regval);
+    sh->chip_tag = ((u64)regval<<32);
+    SMAC_REG_READ(sh, ADR_IC_TIME_TAG_0, &regval);
+    sh->chip_tag |= (regval);
+    printk(KERN_INFO "CHIP TAG: %llx \n", sh->chip_tag);
+    SMAC_REG_READ(sh, ADR_CHIP_ID_3, &regval);
+    *((u32 *)&chip_id[0]) = (u32)LONGSWAP(regval);
+    SMAC_REG_READ(sh, ADR_CHIP_ID_2, &regval);
+    *((u32 *)&chip_id[4]) = (u32)LONGSWAP(regval);
+    SMAC_REG_READ(sh, ADR_CHIP_ID_1, &regval);
+    *((u32 *)&chip_id[8]) = (u32)LONGSWAP(regval);
+    SMAC_REG_READ(sh, ADR_CHIP_ID_0, &regval);
+    *((u32 *)&chip_id[12]) = (u32)LONGSWAP(regval);
+    chip_id[12+sizeof(u32)] = 0;
+    printk(KERN_INFO "CHIP ID: %s \n",chip_id);
+    if(sc->ps_status == PWRSV_ENABLE){
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+        printk(KERN_INFO "%s: wifi Alive lock timeout after 3 secs!\n",__FUNCTION__);
+        {
+            ssv_wake_timeout(sc, 3);
+            printk(KERN_INFO "wifi Alive lock!\n");
+        }
+#endif
+#ifdef CONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+        SMAC_REG_WRITE(sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+#else
+        SMAC_REG_WRITE(sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_ENCRYPT_SEC<<4)|(M_ENG_HWHCI<<8));
+#endif
+        SMAC_REG_WRITE(sc->sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+#if Enable_AMPDU_FW_Retry
+        SMAC_REG_WRITE(sh, ADR_RX_FLOW_CTRL, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8));
+#else
+        SMAC_REG_WRITE(sh, ADR_RX_FLOW_CTRL, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+#endif
+        SMAC_REG_WRITE(sc->sh, ADR_MRX_FLT_TB0+6*4, (sc->mac_deci_tbl[6]));
+        return ret;
+    }
+    SMAC_REG_SET_BITS(sh, ADR_PHY_EN_1, (0 << RG_PHY_MD_EN_SFT), RG_PHY_MD_EN_MSK);
+    SMAC_REG_WRITE(sh, ADR_BRG_SW_RST, 1 << MAC_SW_RST_SFT);
+    do
+    {
+        SMAC_REG_READ(sh, ADR_BRG_SW_RST, & regval);
+        i ++;
+        if (i >10000){
+            printk("MAC reset fail !!!!\n");
+            WARN_ON(1);
+            ret = 1;
+            goto exit;
+        }
+    } while (regval != 0);
+ SMAC_REG_WRITE(sc->sh, ADR_TXQ4_MTX_Q_AIFSN, 0xffff2101);
+    SMAC_REG_SET_BITS(sc->sh, ADR_MTX_BCN_EN_MISC, 0, MTX_HALT_MNG_UNTIL_DTIM_MSK);
+    SMAC_REG_WRITE(sh, ADR_CONTROL, 0x12000006);
+    SMAC_REG_WRITE(sh, ADR_RX_TIME_STAMP_CFG, ((28<<MRX_STP_OFST_SFT)|0x01));
+    SMAC_REG_WRITE(sh, ADR_HCI_TX_RX_INFO_SIZE,
+          ((u32)(TXPB_OFFSET) << TX_PBOFFSET_SFT) |
+          ((u32)(sh->tx_desc_len) << TX_INFO_SIZE_SFT) |
+          ((u32)(sh->rx_desc_len) << RX_INFO_SIZE_SFT) |
+          ((u32)(sh->rx_pinfo_pad) << RX_LAST_PHY_SIZE_SFT )
+    );
+    SMAC_REG_READ(sh,ADR_MMU_CTRL, &regval);
+ regval |= (0xff<<MMU_SHARE_MCU_SFT);
+    SMAC_REG_WRITE(sh,ADR_MMU_CTRL, regval);
+    SMAC_REG_READ(sh,ADR_MRX_WATCH_DOG, &regval);
+    regval &= 0xfffffff0;
+    SMAC_REG_WRITE(sh,ADR_MRX_WATCH_DOG, regval);
+    SMAC_REG_READ(sh, ADR_TRX_ID_THRESHOLD, &id_len);
+    id_len = (id_len&0xffff0000 ) |
+             (SSV6200_ID_TX_THRESHOLD<<TX_ID_THOLD_SFT)|
+             (SSV6200_ID_RX_THRESHOLD<<RX_ID_THOLD_SFT);
+    SMAC_REG_WRITE(sh, ADR_TRX_ID_THRESHOLD, id_len);
+    SMAC_REG_READ(sh, ADR_ID_LEN_THREADSHOLD1, &id_len);
+    id_len = (id_len&0x0f )|
+             (SSV6200_PAGE_TX_THRESHOLD<<ID_TX_LEN_THOLD_SFT)|
+             (SSV6200_PAGE_RX_THRESHOLD<<ID_RX_LEN_THOLD_SFT);
+    SMAC_REG_WRITE(sh, ADR_ID_LEN_THREADSHOLD1, id_len);
+#ifdef CONFIG_SSV_CABRIO_MB_DEBUG
+ SMAC_REG_READ(sh, ADR_MB_DBG_CFG3, &regval);
+    regval |= (debug_buffer<<0);
+    SMAC_REG_WRITE(sh, ADR_MB_DBG_CFG3, regval);
+ SMAC_REG_READ(sh, ADR_MB_DBG_CFG2, &regval);
+    regval |= (DEBUG_SIZE<<16);
+    SMAC_REG_WRITE(sh, ADR_MB_DBG_CFG2, regval);
+    SMAC_REG_READ(sh, ADR_MB_DBG_CFG1, &regval);
+    regval |= (1<<MB_DBG_EN_SFT);
+    SMAC_REG_WRITE(sh, ADR_MB_DBG_CFG1, regval);
+    SMAC_REG_READ(sh, ADR_MBOX_HALT_CFG, &regval);
+    regval |= (1<<MB_ERR_AUTO_HALT_EN_SFT);
+    SMAC_REG_WRITE(sh, ADR_MBOX_HALT_CFG, regval);
+#endif
+SMAC_REG_READ(sc->sh, ADR_MTX_BCN_EN_MISC, &regval);
+regval|=(1<<MTX_TSF_TIMER_EN_SFT);
+SMAC_REG_WRITE(sc->sh, ADR_MTX_BCN_EN_MISC, regval);
+#ifdef SSV6200_ECO
+    SMAC_REG_WRITE(sh, 0xcd010004, 0x1213);
+    for(i=0;i<SSV_RC_MAX_STA;i++)
+    {
+        if(i==0)
+        {
+            sh->hw_buf_ptr[i] = ssv6xxx_pbuf_alloc(sc, sizeof(phy_info_tbl)+
+                                                    sizeof(struct ssv6xxx_hw_sec), NOTYPE_BUF);
+         if((sh->hw_buf_ptr[i]>>28) != 8)
+         {
+          printk("opps allocate pbuf error\n");
+          WARN_ON(1);
+          ret = 1;
+          goto exit;
+         }
+        }
+        else
+        {
+            sh->hw_buf_ptr[i] = ssv6xxx_pbuf_alloc(sc, sizeof(struct ssv6xxx_hw_sec), NOTYPE_BUF);
+            if((sh->hw_buf_ptr[i]>>28) != 8)
+            {
+                printk("opps allocate pbuf error\n");
+                WARN_ON(1);
+                ret = 1;
+                goto exit;
+            }
+        }
+    }
+    for (i = 0; i < 0x8; i++) {
+        temp[i] = 0;
+        temp[i] = ssv6xxx_pbuf_alloc(sc, 256,NOTYPE_BUF);
+    }
+    for (i = 0; i < 0x8; i++) {
+        if(temp[i] == 0x800e0000)
+            printk("0x800e0000\n");
+        else
+            ssv6xxx_pbuf_free(sc,temp[i]);
+    }
+#else
+    sh->hw_buf_ptr = ssv6xxx_pbuf_alloc(sc, sizeof(phy_info_tbl)+
+                                            sizeof(struct ssv6xxx_hw_sec), NOTYPE_BUF);
+ if((sh->hw_buf_ptr>>28) != 8)
+ {
+  printk("opps allocate pbuf error\n");
+  WARN_ON(1);
+  ret = 1;
+  goto exit;
+ }
+#endif
+#ifdef SSV6200_ECO
+    for(i=0;i<SSV_RC_MAX_STA;i++)
+        sh->hw_sec_key[i] = sh->hw_buf_ptr[i];
+    for(i=0;i<SSV_RC_MAX_STA;i++)
+    {
+  int x;
+        for(x=0; x<sizeof(struct ssv6xxx_hw_sec); x+=4) {
+            SMAC_REG_WRITE(sh, sh->hw_sec_key[i]+x, 0);
+        }
+    }
+    SMAC_REG_READ(sh, ADR_SCRT_SET, &regval);
+ regval &= SCRT_PKT_ID_I_MSK;
+ regval |= ((sh->hw_sec_key[0] >> 16) << SCRT_PKT_ID_SFT);
+ SMAC_REG_WRITE(sh, ADR_SCRT_SET, regval);
+    sh->hw_pinfo = sh->hw_sec_key[0] + sizeof(struct ssv6xxx_hw_sec);
+    for(i=0, ptr=phy_info_tbl; i<PHY_INFO_TBL1_SIZE; i++, ptr++) {
+        SMAC_REG_WRITE(sh, ADR_INFO0+i*4, *ptr);
+        SMAC_REG_CONFIRM(sh, ADR_INFO0+i*4, *ptr);
+    }
+#else
+    sh->hw_sec_key = sh->hw_buf_ptr;
+    for(i=0; i<sizeof(struct ssv6xxx_hw_sec); i+=4) {
+        SMAC_REG_WRITE(sh, sh->hw_sec_key+i, 0);
+    }
+    SMAC_REG_READ(sh, ADR_SCRT_SET, &regval);
+ regval &= SCRT_PKT_ID_I_MSK;
+ regval |= ((sh->hw_sec_key >> 16) << SCRT_PKT_ID_SFT);
+ SMAC_REG_WRITE(sh, ADR_SCRT_SET, regval);
+    sh->hw_pinfo = sh->hw_sec_key + sizeof(struct ssv6xxx_hw_sec);
+    for(i=0, ptr=phy_info_tbl; i<PHY_INFO_TBL1_SIZE; i++, ptr++) {
+        SMAC_REG_WRITE(sh, ADR_INFO0+i*4, *ptr);
+        SMAC_REG_CONFIRM(sh, ADR_INFO0+i*4, *ptr);
+    }
+#endif
+ for(i=0; i<PHY_INFO_TBL2_SIZE; i++, ptr++) {
+        SMAC_REG_WRITE(sh, sh->hw_pinfo+i*4, *ptr);
+        SMAC_REG_CONFIRM(sh, sh->hw_pinfo+i*4, *ptr);
+    }
+    for(i=0; i<PHY_INFO_TBL3_SIZE; i++, ptr++) {
+        SMAC_REG_WRITE(sh, sh->hw_pinfo+
+        (PHY_INFO_TBL2_SIZE<<2)+i*4, *ptr);
+        SMAC_REG_CONFIRM(sh, sh->hw_pinfo+
+        (PHY_INFO_TBL2_SIZE<<2)+i*4, *ptr);
+    }
+    SMAC_REG_WRITE(sh, ADR_INFO_RATE_OFFSET, 0x00040000);
+ SMAC_REG_WRITE(sh, ADR_INFO_IDX_ADDR, sh->hw_pinfo);
+    SMAC_REG_WRITE(sh, ADR_INFO_LEN_ADDR, sh->hw_pinfo+(PHY_INFO_TBL2_SIZE)*4);
+ printk("ADR_INFO_IDX_ADDR[%08x] ADR_INFO_LEN_ADDR[%08x]\n", sh->hw_pinfo, sh->hw_pinfo+(PHY_INFO_TBL2_SIZE)*4);
+    SMAC_REG_WRITE(sh, ADR_GLBLE_SET,
+          (0 << OP_MODE_SFT) |
+          (0 << SNIFFER_MODE_SFT) |
+          (1 << DUP_FLT_SFT) |
+          (SSV6200_TX_PKT_RSVD_SETTING << TX_PKT_RSVD_SFT) |
+          ((u32)(RXPB_OFFSET) << PB_OFFSET_SFT)
+    );
+    SMAC_REG_WRITE(sh, ADR_STA_MAC_0, *((u32 *)&sh->cfg.maddr[0][0]));
+    SMAC_REG_WRITE(sh, ADR_STA_MAC_1, *((u32 *)&sh->cfg.maddr[0][4]));
+    SMAC_REG_WRITE(sh, ADR_BSSID_0, *((u32 *)&sc->bssid[0]));
+    SMAC_REG_WRITE(sh, ADR_BSSID_1, *((u32 *)&sc->bssid[4]));
+    SMAC_REG_WRITE(sh, ADR_TX_ETHER_TYPE_0, 0x00000000);
+    SMAC_REG_WRITE(sh, ADR_TX_ETHER_TYPE_1, 0x00000000);
+    SMAC_REG_WRITE(sh, ADR_RX_ETHER_TYPE_0, 0x00000000);
+    SMAC_REG_WRITE(sh, ADR_RX_ETHER_TYPE_1, 0x00000000);
+    SMAC_REG_WRITE(sh, ADR_REASON_TRAP0, 0x7FBC7F87);
+    SMAC_REG_WRITE(sh, ADR_REASON_TRAP1, 0x0000003F);
+#ifndef FW_WSID_WATCH_LIST
+    SMAC_REG_WRITE(sh, ADR_TRAP_HW_ID, M_ENG_HWHCI);
+#else
+    SMAC_REG_WRITE(sh, ADR_TRAP_HW_ID, M_ENG_CPU);
+#endif
+    SMAC_REG_WRITE(sh, ADR_WSID0, 0x00000000);
+    SMAC_REG_WRITE(sh, ADR_WSID1, 0x00000000);
+#ifdef CONFIG_SSV_HW_ENCRYPT_SW_DECRYPT
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+#else
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_DATA, M_ENG_MACRX|(M_ENG_ENCRYPT_SEC<<4)|(M_ENG_HWHCI<<8));
+#endif
+#if defined(CONFIG_P2P_NOA) || defined(CONFIG_RX_MGMT_CHECK)
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8));
+#else
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_MNG, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+#endif
+    #if Enable_AMPDU_FW_Retry
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_CTRL, M_ENG_MACRX|(M_ENG_CPU<<4)|(M_ENG_HWHCI<<8));
+    #else
+    SMAC_REG_WRITE(sh, ADR_RX_FLOW_CTRL, M_ENG_MACRX|(M_ENG_HWHCI<<4));
+    #endif
+    ssv6xxx_hw_set_replay_ignore(sh, 1);
+    ssv6xxx_update_decision_table(sc);
+    SMAC_REG_SET_BITS(sc->sh, ADR_GLBLE_SET, SSV6200_OPMODE_STA, OP_MODE_MSK);
+    SMAC_REG_WRITE(sh, ADR_SDIO_MASK, 0xfffe1fff);
+#ifdef CONFIG_SSV_TX_LOWTHRESHOLD
+    SMAC_REG_WRITE(sh, ADR_TX_LIMIT_INTR, 0x80000000 |
+        SSV6200_TX_LOWTHRESHOLD_ID_TRIGGER << 16 |SSV6200_TX_LOWTHRESHOLD_PAGE_TRIGGER);
+#else
+    SMAC_REG_WRITE(sh, ADR_MB_THRESHOLD6, 0x80000000);
+    SMAC_REG_WRITE(sh, ADR_MB_THRESHOLD8, 0x04020000);
+    SMAC_REG_WRITE(sh, ADR_MB_THRESHOLD9, 0x00000404);
+#endif
+#ifdef CONFIG_SSV_SUPPORT_BTCX
+        SMAC_REG_WRITE(sh, ADR_BTCX0,COEXIST_EN_MSK|(WIRE_MODE_SZ<<WIRE_MODE_SFT)
+                           |WIFI_TX_SW_POL_MSK | BT_SW_POL_MSK);
+        SMAC_REG_WRITE(sh, ADR_BTCX1,SSV6200_BT_PRI_SMP_TIME|(SSV6200_BT_STA_SMP_TIME<<BT_STA_SMP_TIME_SFT)
+                           |(SSV6200_WLAN_REMAIN_TIME<<WLAN_REMAIN_TIME_SFT));
+        SMAC_REG_WRITE(sh, ADR_SWITCH_CTL,BT_2WIRE_EN_MSK);
+        SMAC_REG_WRITE(sh, ADR_PAD7, 1);
+        SMAC_REG_WRITE(sh, ADR_PAD8, 0);
+        SMAC_REG_WRITE(sh, ADR_PAD9, 1);
+        SMAC_REG_WRITE(sh, ADR_PAD25, 1);
+        SMAC_REG_WRITE(sh, ADR_PAD27, 8);
+        SMAC_REG_WRITE(sh, ADR_PAD28, 8);
+#endif
+    if (cfgfirmwarepath != NULL)
+    {
+        sprintf(temp_path,"%s%s",cfgfirmwarepath,WIFI_FIRMWARE_NAME);
+        ret = SMAC_LOAD_FW(sh,temp_path,1);
+        printk(KERN_INFO "Firmware name cfgfirmwarepath=%s\n", temp_path);
+    }
+    else if (sh->cfg.firmware_path[0] != 0x00)
+    {
+        sprintf(temp_path,"%s%s",sh->cfg.firmware_path,WIFI_FIRMWARE_NAME);
+        ret = SMAC_LOAD_FW(sh,temp_path,1);
+        printk(KERN_INFO "Firmware name sh->cfg.firmware_path=%s\n", temp_path);
+    }
+    else
+    {
+        printk(KERN_INFO "Firmware name CABRIO_E_FIRMWARE_NAME=%s\n", WIFI_FIRMWARE_NAME);
+        ret = SMAC_LOAD_FW(sh,WIFI_FIRMWARE_NAME,0);
+    }
+    SMAC_REG_READ(sh, FW_VERSION_REG, &regval);
+    if (regval == ssv_firmware_version)
+    {
+        SMAC_REG_SET_BITS(sh, ADR_PHY_EN_1, (1 << RG_PHY_MD_EN_SFT), RG_PHY_MD_EN_MSK);
+        printk(KERN_INFO "Firmware version %d\n", regval);
+    }
+    else
+    {
+        printk(KERN_INFO "!! SOS !! SOS !!\n");
+        printk(KERN_INFO "Firmware version not mapping %d\n", regval);
+        ret = -1;
+    }
+    ssv6xxx_watchdog_controller(sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_START);
+exit:
+    return ret;
+}
+void ssv6xxx_deinit_mac(struct ssv_softc *sc)
+{
+#ifdef SSV6200_ECO
+    int i;
+    for(i = 0; i < SSV_RC_MAX_STA; i++)
+    {
+        if(sc->sh->hw_buf_ptr[i])
+            ssv6xxx_pbuf_free(sc, sc->sh->hw_buf_ptr[i]);
+    }
+#else
+    if(sc->sh->hw_buf_ptr)
+     ssv6xxx_pbuf_free(sc, sc->sh->hw_buf_ptr);
+#endif
+}
+void inline ssv6xxx_deinit_hw(struct ssv_softc *sc)
+{
+    printk("%s(): \n", __FUNCTION__);
+ ssv6xxx_deinit_mac(sc);
+}
+void ssv6xxx_restart_hw(struct ssv_softc *sc)
+{
+    printk("%s(): \n", __FUNCTION__);
+    printk("**************************\n");
+    printk("*** Software MAC reset ***\n");
+    printk("**************************\n");
+    sc->restart_counter++;
+    sc->force_triger_reset = true;
+    HCI_STOP(sc->sh);
+    SMAC_REG_WRITE(sc->sh, 0xce000004, 0x0);
+    sc->beacon_info[0].pubf_addr = 0x00;
+    sc->beacon_info[1].pubf_addr = 0x00;
+    ieee80211_restart_hw(sc->hw);
+}
+#ifdef CONFIG_SSV_CABRIO_E
+extern struct ssv6xxx_iqk_cfg init_iqk_cfg;
+#endif
+static int ssv6xxx_init_hw(struct ssv_hw *sh)
+{
+    int ret=0,i=0,x=0;
+#ifdef CONFIG_SSV_CABRIO_E
+    u32 regval;
+#endif
+    sh->tx_desc_len = SSV6XXX_TX_DESC_LEN;
+    sh->rx_desc_len = SSV6XXX_RX_DESC_LEN;
+    sh->rx_pinfo_pad = 0x04;
+    sh->tx_page_available = SSV6200_PAGE_TX_THRESHOLD;
+    sh->ampdu_divider = SSV6XXX_AMPDU_DIVIDER;
+    memset(sh->page_count, 0, sizeof(sh->page_count));
+#ifdef CONFIG_SSV_CABRIO_E
+    if (sh->cfg.force_chip_identity)
+    {
+        printk("Force use external RF setting [%08x]\n",sh->cfg.force_chip_identity);
+        sh->cfg.chip_identity = sh->cfg.force_chip_identity;
+    }
+    if(sh->cfg.chip_identity == SSV6051Z)
+    {
+        sh->p_ch_cfg = &ch_cfg_z[0];
+        sh->ch_cfg_size = sizeof(ch_cfg_z) / sizeof(struct ssv6xxx_ch_cfg);
+        memcpy(phy_info_tbl,phy_info_6051z,sizeof(phy_info_6051z));
+    }
+    else if(sh->cfg.chip_identity == SSV6051P)
+    {
+        sh->p_ch_cfg = &ch_cfg_p[0];
+        sh->ch_cfg_size = sizeof(ch_cfg_p) / sizeof(struct ssv6xxx_ch_cfg);
+    }
+    switch (sh->cfg.chip_identity) {
+        case SSV6051Q_P1:
+        case SSV6051Q_P2:
+        case SSV6051Q:
+            printk("SSV6051Q setting\n");
+            for (i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++){
+                if (ssv6200_rf_tbl[i].address == 0xCE010008)
+                    ssv6200_rf_tbl[i].data = 0x008DF61B;
+                if (ssv6200_rf_tbl[i].address == 0xCE010014)
+                    ssv6200_rf_tbl[i].data = 0x3D3E84FE;
+                if (ssv6200_rf_tbl[i].address == 0xCE010018)
+                    ssv6200_rf_tbl[i].data = 0x01457D79;
+                if (ssv6200_rf_tbl[i].address == 0xCE01001C)
+                    ssv6200_rf_tbl[i].data = 0x000103A7;
+                if (ssv6200_rf_tbl[i].address == 0xCE010020)
+                    ssv6200_rf_tbl[i].data = 0x000103A6;
+                if (ssv6200_rf_tbl[i].address == 0xCE01002C)
+                    ssv6200_rf_tbl[i].data = 0x00032CA8;
+                if (ssv6200_rf_tbl[i].address == 0xCE010048)
+                    ssv6200_rf_tbl[i].data = 0xFCCCCF27;
+                if (ssv6200_rf_tbl[i].address == 0xCE010050)
+                    ssv6200_rf_tbl[i].data = 0x0047C000;
+            }
+            break;
+        case SSV6051Z:
+            printk("SSV6051Z setting\n");
+            for (i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++){
+                if (ssv6200_rf_tbl[i].address == 0xCE010008)
+                    ssv6200_rf_tbl[i].data = 0x004D561C;
+                if (ssv6200_rf_tbl[i].address == 0xCE010014)
+                    ssv6200_rf_tbl[i].data = 0x3D9E84FE;
+                if (ssv6200_rf_tbl[i].address == 0xCE010018)
+                    ssv6200_rf_tbl[i].data = 0x00457D79;
+                if (ssv6200_rf_tbl[i].address == 0xCE01001C)
+                    ssv6200_rf_tbl[i].data = 0x000103EB;
+                if (ssv6200_rf_tbl[i].address == 0xCE010020)
+                    ssv6200_rf_tbl[i].data = 0x000103EA;
+                if (ssv6200_rf_tbl[i].address == 0xCE01002C)
+                    ssv6200_rf_tbl[i].data = 0x00062CA8;
+                if (ssv6200_rf_tbl[i].address == 0xCE010048)
+                    ssv6200_rf_tbl[i].data = 0xFCCCCF27;
+                if (ssv6200_rf_tbl[i].address == 0xCE010050)
+                    ssv6200_rf_tbl[i].data = 0x0047C000;
+            }
+            break;
+        case SSV6051P:
+            printk("SSV6051P setting\n");
+            for (i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++){
+                if (ssv6200_rf_tbl[i].address == 0xCE010008)
+                    ssv6200_rf_tbl[i].data = 0x008B7C1C;
+                if (ssv6200_rf_tbl[i].address == 0xCE010014)
+                    ssv6200_rf_tbl[i].data = 0x3D7E84FE;
+                if (ssv6200_rf_tbl[i].address == 0xCE010018)
+                    ssv6200_rf_tbl[i].data = 0x01457D79;
+                if (ssv6200_rf_tbl[i].address == 0xCE01001C)
+                    ssv6200_rf_tbl[i].data = 0x000103EB;
+                if (ssv6200_rf_tbl[i].address == 0xCE010020)
+                    ssv6200_rf_tbl[i].data = 0x000103EA;
+                if (ssv6200_rf_tbl[i].address == 0xCE01002C)
+                    ssv6200_rf_tbl[i].data = 0x00032CA8;
+                if (ssv6200_rf_tbl[i].address == 0xCE010048)
+                    ssv6200_rf_tbl[i].data = 0xFCCCCC27;
+                if (ssv6200_rf_tbl[i].address == 0xCE010050)
+                    ssv6200_rf_tbl[i].data = 0x0047C000;
+                if (ssv6200_rf_tbl[i].address == 0xC0001D00)
+                    ssv6200_rf_tbl[i].data = 0x5E000040;
+            }
+            break;
+        default:
+            printk("No RF setting\n");
+            while(1){
+                printk("**************\n");
+                printk("* Call Help! *\n");
+                printk("**************\n");
+                WARN_ON(1);
+                msleep(10000);
+            };
+            break;
+    }
+    if(sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_26M)
+    {
+        init_iqk_cfg.cfg_xtal = SSV6XXX_IQK_CFG_XTAL_26M;
+        printk("SSV6XXX_IQK_CFG_XTAL_26M\n");
+    }
+    else if(sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_40M)
+    {
+        init_iqk_cfg.cfg_xtal = SSV6XXX_IQK_CFG_XTAL_40M;
+        printk("SSV6XXX_IQK_CFG_XTAL_40M\n");
+    }
+    else if(sh->cfg.crystal_type == SSV6XXX_IQK_CFG_XTAL_24M)
+    {
+        printk("SSV6XXX_IQK_CFG_XTAL_24M\n");
+        init_iqk_cfg.cfg_xtal = SSV6XXX_IQK_CFG_XTAL_24M;
+        for(i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++)
+        {
+            if(ssv6200_rf_tbl[i].address == ADR_SX_ENABLE_REGISTER)
+                ssv6200_rf_tbl[i].data = 0x0003E07C;
+            if(ssv6200_rf_tbl[i].address == ADR_DPLL_DIVIDER_REGISTER)
+                ssv6200_rf_tbl[i].data = 0x00406000;
+            if(ssv6200_rf_tbl[i].address == ADR_DPLL_FB_DIVIDER_REGISTERS_I)
+                ssv6200_rf_tbl[i].data = 0x00000028;
+            if(ssv6200_rf_tbl[i].address == ADR_DPLL_FB_DIVIDER_REGISTERS_II)
+                ssv6200_rf_tbl[i].data = 0x00000000;
+        }
+    }
+    else
+    {
+        printk("Illegal xtal setting !![No XX.cfg]\n");
+        printk("default value is SSV6XXX_IQK_CFG_XTAL_26M!!\n");
+    }
+    for(i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++)
+    {
+        if(ssv6200_rf_tbl[i].address == ADR_SYN_KVCO_XO_FINE_TUNE_CBANK)
+        {
+            if(sh->cfg.crystal_frequency_offset)
+            {
+                ssv6200_rf_tbl[i].data &= RG_XOSC_CBANK_XO_I_MSK;
+                ssv6200_rf_tbl[i].data |= (sh->cfg.crystal_frequency_offset << RG_XOSC_CBANK_XO_SFT);
+            }
+        }
+    }
+    for (i=0; i<sizeof(phy_setting)/sizeof(struct ssv6xxx_dev_table); i++){
+        if (phy_setting[i].address == ADR_TX_GAIN_FACTOR){
+            switch (sh->cfg.chip_identity) {
+                case SSV6051Q_P1:
+                case SSV6051Q_P2:
+                case SSV6051Q:
+                    printk("SSV6051Q setting [0x5B606C72]\n");
+                    phy_setting[i].data = 0x5B606C72;
+                    break;
+                case SSV6051Z:
+                    printk("SSV6051Z setting [0x60606060]\n");
+                    phy_setting[i].data = 0x60606060;
+                    break;
+                case SSV6051P:
+                    printk("SSV6051P setting [0x6C726C72]\n");
+                    phy_setting[i].data = 0x6C726C72;
+                    break;
+                default:
+                    printk("Use default power setting\n");
+                    break;
+            }
+            if (sh->cfg.wifi_tx_gain_level_b){
+                phy_setting[i].data &= 0xffff0000;
+                phy_setting[i].data |= wifi_tx_gain[sh->cfg.wifi_tx_gain_level_b] & 0x0000ffff;
+            }
+            if (sh->cfg.wifi_tx_gain_level_gn){
+                phy_setting[i].data &= 0x0000ffff;
+                phy_setting[i].data |= wifi_tx_gain[sh->cfg.wifi_tx_gain_level_gn] & 0xffff0000;
+            }
+            printk("TX power setting 0x%x\n",phy_setting[i].data);
+            init_iqk_cfg.cfg_def_tx_scale_11b = (phy_setting[i].data>>0) & 0xff;
+            init_iqk_cfg.cfg_def_tx_scale_11b_p0d5 = (phy_setting[i].data>>8) & 0xff;
+            init_iqk_cfg.cfg_def_tx_scale_11g = (phy_setting[i].data>>16) & 0xff;
+            init_iqk_cfg.cfg_def_tx_scale_11g_p0d5 = (phy_setting[i].data>>24) & 0xff;
+            break;
+        }
+    }
+    if(sh->cfg.volt_regulator == SSV6XXX_VOLT_LDO_CONVERT)
+    {
+        printk("Volt regulator LDO\n");
+        for(i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++)
+        {
+            if(ssv6200_rf_tbl[i].address == ADR_PMU_2)
+            {
+                ssv6200_rf_tbl[i].data &= 0xFFFFFFFE;
+                ssv6200_rf_tbl[i].data |= 0x00000000;
+            }
+        }
+    }
+    else if(sh->cfg.volt_regulator == SSV6XXX_VOLT_DCDC_CONVERT)
+    {
+        printk("Volt regulator DCDC\n");
+        for(i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++)
+        {
+            if(ssv6200_rf_tbl[i].address == ADR_PMU_2)
+            {
+                ssv6200_rf_tbl[i].data &= 0xFFFFFFFE;
+                ssv6200_rf_tbl[i].data |= 0x00000001;
+            }
+        }
+    }
+    else
+    {
+        printk("Illegal volt regulator setting !![No XX.cfg]\n");
+        printk("default value is SSV6XXX_VOLT_DCDC_CONVERT!!\n");
+    }
+#endif
+    while(ssv_cfg.configuration[x][0])
+    {
+        for(i=0; i<sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table); i++)
+        {
+            if(ssv6200_rf_tbl[i].address == ssv_cfg.configuration[x][0])
+            {
+                ssv6200_rf_tbl[i].data = ssv_cfg.configuration[x][1];
+                break;
+            }
+        }
+        for(i=0; i<sizeof(phy_setting)/sizeof(struct ssv6xxx_dev_table); i++)
+        {
+            if(phy_setting[i].address == ssv_cfg.configuration[x][0])
+            {
+                phy_setting[i].data = ssv_cfg.configuration[x][1];
+                break;
+            }
+        }
+        x++;
+    };
+    if (ret == 0) ret = SSV6XXX_SET_HW_TABLE(sh, ssv6200_rf_tbl);
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_PHY_EN_1, 0x00000000);
+#ifdef CONFIG_SSV_CABRIO_E
+    SMAC_REG_READ(sh, ADR_PHY_EN_0, &regval);
+    if (regval & (1<<RG_RF_BB_CLK_SEL_SFT)) {
+        printk("already do clock switch\n");
+    }
+    else {
+        printk("reset PLL\n");
+        SMAC_REG_READ(sh, ADR_DPLL_CP_PFD_REGISTER, &regval);
+        regval |= ((1<<RG_DP_BBPLL_PD_SFT) | (1<<RG_DP_BBPLL_SDM_EDGE_SFT));
+        SMAC_REG_WRITE(sh, ADR_DPLL_CP_PFD_REGISTER, regval);
+        regval &= ~((1<<RG_DP_BBPLL_PD_SFT) | (1<<RG_DP_BBPLL_SDM_EDGE_SFT));
+        SMAC_REG_WRITE(sh, ADR_DPLL_CP_PFD_REGISTER, regval);
+        mdelay(10);
+    }
+#endif
+    if (ret == 0) ret = SSV6XXX_SET_HW_TABLE(sh, ssv6200_phy_tbl);
+#ifdef CONFIG_SSV_CABRIO_E
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_TRX_DUMMY_REGISTER, 0xEAAAAAAA);
+    SMAC_REG_READ(sh,ADR_TRX_DUMMY_REGISTER,&regval);
+    if (regval != 0xEAAAAAAA)
+    {
+        printk("@@@@@@@@@@@@\n");
+        printk(" SDIO issue -- please check 0xCE01008C %08x!!\n",regval);
+        printk(" It shouble be 0xEAAAAAAA!!\n");
+        printk("@@@@@@@@@@@@ \n");
+    }
+#endif
+#ifdef CONFIG_SSV_CABRIO_E
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_PAD53, 0x21);
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_PAD54, 0x3000);
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_PIN_SEL_0, 0x4000);
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, 0xc0000304, 0x01);
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, 0xc0000308, 0x01);
+#endif
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_CLOCK_SELECTION, 0x3);
+#ifdef CONFIG_SSV_CABRIO_E
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_TRX_DUMMY_REGISTER, 0xAAAAAAAA);
+#endif
+    if ((ret=ssv6xxx_set_channel(sh->sc, sh->cfg.def_chan)))
+        return ret;
+    if (ret == 0) ret = SMAC_REG_WRITE(sh, ADR_PHY_EN_1,
+                                (RG_PHYRX_MD_EN_MSK | RG_PHYTX_MD_EN_MSK |
+                                RG_PHY11GN_MD_EN_MSK | RG_PHY11B_MD_EN_MSK |
+                                RG_PHYRXFIFO_MD_EN_MSK | RG_PHYTXFIFO_MD_EN_MSK |
+                                RG_PHY11BGN_MD_EN_MSK));
+    return ret;
+}
+static void ssv6xxx_check_mac2(struct ssv_hw *sh)
+{
+  const u8 addr_mask[6]={0xfd, 0xff, 0xff, 0xff, 0xff, 0xfc};
+  u8 i;
+  bool invalid = false;
+  for ( i=0; i<6; i++) {
+       if ((ssv_cfg.maddr[0][i] & addr_mask[i]) !=
+               (ssv_cfg.maddr[1][i] & addr_mask[i])){
+           invalid = true;
+           printk (" i %d , mac1[i] %x, mac2[i] %x, mask %x \n",i, ssv_cfg.maddr[0][i] ,ssv_cfg.maddr[1][i],addr_mask[i]);
+           break;
+       }
+   }
+   if (invalid){
+       memcpy(&ssv_cfg.maddr[1][0], &ssv_cfg.maddr[0][0], 6);
+       ssv_cfg.maddr[1][5] ^= 0x01;
+       if (ssv_cfg.maddr[1][5] < ssv_cfg.maddr[0][5]){
+           u8 temp;
+           temp = ssv_cfg.maddr[0][5];
+           ssv_cfg.maddr[0][5] = ssv_cfg.maddr[1][5];
+           ssv_cfg.maddr[1][5] = temp;
+           sh->cfg.maddr[0][5] = ssv_cfg.maddr[0][5];
+       }
+       printk("MAC 2 address invalid!!\n" );
+       printk("After modification, MAC1 %pM, MAC2 %pM\n",ssv_cfg.maddr[0],
+           ssv_cfg.maddr[1]);
+   }
+}
+static int ssv6xxx_read_configuration(struct ssv_hw *sh)
+{
+    extern u32 sdio_sr_bhvr;
+    if(is_valid_ether_addr(&ssv_cfg.maddr[0][0]))
+        memcpy(&sh->cfg.maddr[0][0], &ssv_cfg.maddr[0][0], ETH_ALEN);
+    if(is_valid_ether_addr(&ssv_cfg.maddr[1][0])){
+        ssv6xxx_check_mac2(sh);
+        memcpy(&sh->cfg.maddr[1][0], &ssv_cfg.maddr[1][0], ETH_ALEN);
+    }
+    if(ssv_cfg.hw_caps)
+        sh->cfg.hw_caps = ssv_cfg.hw_caps;
+    else
+        sh->cfg.hw_caps = SSV6200_HW_CAP_HT |
+                    SSV6200_HW_CAP_2GHZ |
+                    SSV6200_HW_CAP_SECURITY |
+                    SSV6200_HW_CAP_P2P|
+                    SSV6200_HT_CAP_SGI_20|
+                    SSV6200_HW_CAP_AMPDU_RX|
+                    SSV6200_HW_CAP_AMPDU_TX|
+                    SSV6200_HW_CAP_AP;
+    if(ssv_cfg.def_chan)
+        sh->cfg.def_chan = ssv_cfg.def_chan;
+    else
+        sh->cfg.def_chan = 6;
+    sh->cfg.use_wpa2_only = ssv_cfg.use_wpa2_only;
+    if(ssv_cfg.crystal_type == 26)
+        sh->cfg.crystal_type = SSV6XXX_IQK_CFG_XTAL_26M;
+    else if(ssv_cfg.crystal_type == 40)
+        sh->cfg.crystal_type = SSV6XXX_IQK_CFG_XTAL_40M;
+    else if(ssv_cfg.crystal_type == 24)
+        sh->cfg.crystal_type = SSV6XXX_IQK_CFG_XTAL_24M;
+    else
+    {
+        printk("Please redefine xtal_clock(wifi.cfg)!!\n");
+        WARN_ON(1);
+        return 1;
+    }
+    if(ssv_cfg.volt_regulator < 2)
+        sh->cfg.volt_regulator = ssv_cfg.volt_regulator;
+    else
+    {
+        printk("Please redefine volt_regulator(wifi.cfg)!!\n");
+        WARN_ON(1);
+        return 1;
+    }
+    sh->cfg.wifi_tx_gain_level_gn = ssv_cfg.wifi_tx_gain_level_gn;
+    sh->cfg.wifi_tx_gain_level_b = ssv_cfg.wifi_tx_gain_level_b;
+    sh->cfg.rssi_ctl = ssv_cfg.rssi_ctl;
+    sh->cfg.sr_bhvr = ssv_cfg.sr_bhvr;
+    sdio_sr_bhvr = ssv_cfg.sr_bhvr;
+    sh->cfg.force_chip_identity = ssv_cfg.force_chip_identity;
+    strncpy(sh->cfg.firmware_path,ssv_cfg.firmware_path,sizeof(sh->cfg.firmware_path)-1);
+    strncpy(sh->cfg.flash_bin_path, ssv_cfg.flash_bin_path,sizeof(sh->cfg.flash_bin_path) - 1);
+    strncpy(sh->cfg.mac_address_path,ssv_cfg.mac_address_path,sizeof(sh->cfg.mac_address_path)-1);
+    strncpy(sh->cfg.mac_output_path,ssv_cfg.mac_output_path,sizeof(sh->cfg.mac_output_path)-1);
+    sh->cfg.ignore_efuse_mac = ssv_cfg.ignore_efuse_mac;
+    sh->cfg.mac_address_mode = ssv_cfg.mac_address_mode;
+    return 0;
+}
+static int ssv6xxx_read_hw_info(struct ssv_softc *sc)
+{
+    struct ssv_hw *sh;
+    sh = kzalloc(sizeof(struct ssv_hw), GFP_KERNEL);
+    if (sh == NULL)
+        return -ENOMEM;
+    memset((void *)sh, 0, sizeof(struct ssv_hw));
+    sc->sh = sh;
+    sh->sc = sc;
+    sh->priv = sc->dev->platform_data;
+    if(ssv6xxx_read_configuration(sh))
+        return -ENOMEM;
+    sh->hci.dev = sc->dev;
+    sh->hci.hci_ops = NULL;
+    sh->hci.hci_rx_cb = ssv6200_rx;
+    sh->hci.rx_cb_args = (void *)sc;
+    sh->hci.hci_tx_cb= ssv6xxx_tx_cb;
+    sh->hci.tx_cb_args = (void *)sc;
+#ifdef RATE_CONTROL_REALTIME_UPDATA
+    sh->hci.hci_skb_update_cb = ssv6xxx_tx_rate_update;
+    sh->hci.skb_update_args = (void *)sc;
+#else
+    sh->hci.hci_skb_update_cb = NULL;
+    sh->hci.skb_update_args = NULL;
+#endif
+    sh->hci.hci_tx_flow_ctrl_cb = ssv6200_tx_flow_control;
+    sh->hci.tx_fctrl_cb_args = (void *)sc;
+    sh->hci.hci_tx_q_empty_cb = ssv6xxx_tx_q_empty_cb;
+    sh->hci.tx_q_empty_args = (void *)sc;
+    sh->hci.if_ops = sh->priv->ops;
+    sh->hci.hci_tx_buf_free_cb = ssv6xxx_txbuf_free_skb;
+    sh->hci.tx_buf_free_args = (void *)sc;
+    return 0;
+}
+static int ssv6xxx_init_device(struct ssv_softc *sc, const char *name)
+{
+    struct ieee80211_hw *hw = sc->hw;
+    struct ssv_hw *sh;
+    int error = 0;
+    BUG_ON(!sc->dev->platform_data);
+    if ((error=ssv6xxx_read_hw_info(sc)) != 0) {
+        return error;
+    }
+    sh = sc->sh;
+    if (sh->cfg.hw_caps == 0)
+        return -1;
+    ssv6xxx_hci_register(&sh->hci);
+    efuse_read_all_map(sh);
+    if ((error=ssv6xxx_init_softc(sc)) != 0) {
+        ssv6xxx_deinit_softc(sc);
+      ssv6xxx_hci_deregister();
+      kfree(sh);
+        return error;
+    }
+    if ((error=ssv6xxx_init_hw(sc->sh)) != 0) {
+        ssv6xxx_deinit_hw(sc);
+      ssv6xxx_deinit_softc(sc);
+      ssv6xxx_hci_deregister();
+      kfree(sh);
+        return error;
+    }
+    if ((error=ieee80211_register_hw(hw)) != 0) {
+        printk(KERN_ERR "Failed to register w. %d.\n", error);
+        ssv6xxx_deinit_hw(sc);
+      ssv6xxx_deinit_softc(sc);
+      ssv6xxx_hci_deregister();
+        kfree(sh);
+      return error;
+    }
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    ssv6xxx_init_debugfs(sc, name);
+#endif
+    return 0;
+}
+static void ssv6xxx_deinit_device(struct ssv_softc *sc)
+{
+    printk("%s(): \n", __FUNCTION__);
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    ssv6xxx_deinit_debugfs(sc);
+#endif
+    ssv6xxx_rf_disable(sc->sh);
+    ieee80211_unregister_hw(sc->hw);
+    ssv6xxx_deinit_hw(sc);
+    ssv6xxx_deinit_softc(sc);
+    ssv6xxx_hci_deregister();
+    kfree(sc->sh);
+}
+extern struct ieee80211_ops ssv6200_ops;
+int ssv6xxx_dev_probe(struct platform_device *pdev)
+{
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+    extern struct ssv_softc *ssv_dbg_sc;
+#endif
+#ifdef CONFIG_SSV_SMARTLINK
+    extern struct ssv_softc *ssv_smartlink_sc;
+#endif
+    struct ssv_softc *softc;
+    struct ieee80211_hw *hw;
+    int ret;
+    if (!pdev->dev.platform_data) {
+        dev_err(&pdev->dev, "no platform data specified!\n");
+        return -EINVAL;
+    }
+    printk("%s(): ssv6200 device found !\n", __FUNCTION__);
+    hw = ieee80211_alloc_hw(sizeof(struct ssv_softc), &ssv6200_ops);
+    if (hw == NULL) {
+        dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
+        return -ENOMEM;
+    }
+    SET_IEEE80211_DEV(hw, &pdev->dev);
+    dev_set_drvdata(&pdev->dev, hw);
+    memset((void *)hw->priv, 0, sizeof(struct ssv_softc));
+    softc = hw->priv;
+    softc->hw = hw;
+    softc->dev = &pdev->dev;
+    ret = ssv6xxx_init_device(softc, pdev->name);
+    if (ret) {
+        dev_err(&pdev->dev, "Failed to initialize device\n");
+        ieee80211_free_hw(hw);
+        return ret;
+    }
+#ifdef CONFIG_SSV6200_CLI_ENABLE
+ ssv_dbg_sc = softc;
+#endif
+#ifdef CONFIG_SSV_SMARTLINK
+    ssv_smartlink_sc = softc;
+#endif
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+    ssv_notify_sc = softc;
+#endif
+    wiphy_info(hw->wiphy, "%s\n", "SSV6200 of South Silicon Valley");
+    return 0;
+}
+EXPORT_SYMBOL(ssv6xxx_dev_probe);
+int ssv6xxx_dev_remove(struct platform_device *pdev)
+{
+    struct ieee80211_hw *hw=dev_get_drvdata(&pdev->dev);
+    struct ssv_softc *softc=hw->priv;
+    printk("ssv6xxx_dev_remove(): pdev=%p, hw=%p\n", pdev, hw);
+    ssv6xxx_deinit_device(softc);
+    printk("ieee80211_free_hw(): \n");
+    ieee80211_free_hw(hw);
+    pr_info("ssv6200: Driver unloaded\n");
+    return 0;
+}
+EXPORT_SYMBOL(ssv6xxx_dev_remove);
+static const struct platform_device_id ssv6xxx_id_table[] = {
+    {
+        .name = "ssv6200",
+        .driver_data = 0x00,
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(platform, ssv6xxx_id_table);
+static struct platform_driver ssv6xxx_driver =
+{
+    .probe = ssv6xxx_dev_probe,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)
+    .remove = __devexit_p(ssv6xxx_dev_remove),
+#else
+    .remove = ssv6xxx_dev_remove,
+#endif
+    .id_table = ssv6xxx_id_table,
+    .driver = {
+        .name = "SSV WLAN driver",
+        .owner = THIS_MODULE,
+    }
+};
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+int ssv6xxx_init(void)
+#else
+static int __init ssv6xxx_init(void)
+#endif
+{
+    extern void *ssv_dbg_phy_table;
+    extern u32 ssv_dbg_phy_len;
+    extern void *ssv_dbg_rf_table;
+    extern u32 ssv_dbg_rf_len;
+    ssv_dbg_phy_table = (void *)ssv6200_phy_tbl;
+    ssv_dbg_phy_len = sizeof(ssv6200_phy_tbl)/sizeof(struct ssv6xxx_dev_table);
+    ssv_dbg_rf_table = (void *)ssv6200_rf_tbl;
+    ssv_dbg_rf_len = sizeof(ssv6200_rf_tbl)/sizeof(struct ssv6xxx_dev_table);
+    return platform_driver_register(&ssv6xxx_driver);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+void ssv6xxx_exit(void)
+#else
+static void __exit ssv6xxx_exit(void)
+#endif
+{
+    platform_driver_unregister(&ssv6xxx_driver);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ssv6xxx_init);
+EXPORT_SYMBOL(ssv6xxx_exit);
+#else
+module_init(ssv6xxx_init);
+module_exit(ssv6xxx_exit);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.h
new file mode 100644
index 0000000000000..c27f43cf6e9a5
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/init.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _INIT_H_
+#define _INIT_H_ 
+int ssv6xxx_init_mac(struct ssv_hw *sh);
+int ssv6xxx_do_iq_calib(struct ssv_hw *sh, struct ssv6xxx_iqk_cfg *p_cfg);
+void ssv6xxx_deinit_mac(struct ssv_softc *sc);
+void ssv6xxx_restart_hw(struct ssv_softc *sc);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.c
new file mode 100644
index 0000000000000..442ea6549db68
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <ssv6200.h>
+#include "lib.h"
+struct sk_buff *ssv_skb_alloc(s32 len)
+{
+    struct sk_buff *skb;
+    skb = __dev_alloc_skb(len + 128 , GFP_KERNEL);
+    if (skb != NULL) {
+        skb_put(skb,0x20);
+        skb_pull(skb,0x20);
+    }
+    return skb;
+}
+void ssv_skb_free(struct sk_buff *skb)
+{
+    dev_kfree_skb_any(skb);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.h
new file mode 100644
index 0000000000000..ef5a6642984b5
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/lib.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LIB_H_
+#define _LIB_H_ 
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+struct sk_buff *ssv_skb_alloc(s32 len);
+void ssv_skb_free(struct sk_buff *skb);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_2_6_35.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_2_6_35.h
new file mode 100644
index 0000000000000..2264379499aa6
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_2_6_35.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LINUX_2_6_35_H_
+#define _LINUX_2_6_35_H_ 
+#include <net/mac80211.h>
+enum ieee80211_ac_numbers {
+ IEEE80211_AC_VO = 0,
+ IEEE80211_AC_VI = 1,
+ IEEE80211_AC_BE = 2,
+ IEEE80211_AC_BK = 3,
+};
+#define IEEE80211_NUM_ACS 4
+#define wiphy_info(wiphy,format,args...) \
+ dev_info(&(wiphy)->dev, format, ##args)
+#define IEEE80211_CONF_OFFCHANNEL (1<<30)
+#define FIF_PROBE_REQ (1<<8)
+#define BSS_CHANGED_SSID (1<<15)
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_3_0_0.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_3_0_0.h
new file mode 100644
index 0000000000000..782b1b741f0cf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_3_0_0.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LINUX_3_0_0_H_
+#define _LINUX_3_0_0_H_ 
+#define BSS_CHANGED_SSID (1<<15)
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_80211.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_80211.h
new file mode 100644
index 0000000000000..35777237260a8
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/linux_80211.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LINUX_80211_H_
+#define _LINUX_80211_H_ 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+#define INDEX_80211_BAND_2GHZ IEEE80211_BAND_2GHZ
+#else
+#define INDEX_80211_BAND_2GHZ NL80211_BAND_2GHZ
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.c
new file mode 100644
index 0000000000000..e8e2dab5566de
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.c
@@ -0,0 +1,306 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <ssv6200.h>
+#include <linux/types.h>
+#include <linux/nl80211.h>
+#include <net/mac80211.h>
+#include <linux/nl80211.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/time.h>
+#include <linux/kthread.h>
+#include <net/mac80211.h>
+#include <ssv6200.h>
+#include "p2p.h"
+#include "dev.h"
+#include "lib.h"
+#ifdef CONFIG_P2P_NOA
+#define P2P_IE_VENDOR_TYPE 0x506f9a09
+#define P2P_NOA_DETECT_INTERVAL (5 * HZ)
+#ifndef MAC2STR
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
+#define COMPACT_MACSTR "%02x%02x%02x%02x%02x%02x"
+#endif
+void ssv6xxx_send_noa_cmd(struct ssv_softc *sc, struct ssv6xxx_p2p_noa_param *p2p_noa_param);
+static inline u32 WPA_GET_BE32(const u8 *a)
+{
+ return (a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3];
+}
+static inline u16 WPA_GET_LE16(const u8 *a)
+{
+ return (a[1] << 8) | a[0];
+}
+static inline u32 WPA_GET_LE32(const u8 *a)
+{
+ return (a[3] << 24) |(a[2] << 16) |(a[1] << 8) | a[0];
+}
+#define IEEE80211_HDRLEN 24
+enum p2p_attr_id {
+ P2P_ATTR_STATUS = 0,
+ P2P_ATTR_MINOR_REASON_CODE = 1,
+ P2P_ATTR_CAPABILITY = 2,
+ P2P_ATTR_DEVICE_ID = 3,
+ P2P_ATTR_GROUP_OWNER_INTENT = 4,
+ P2P_ATTR_CONFIGURATION_TIMEOUT = 5,
+ P2P_ATTR_LISTEN_CHANNEL = 6,
+ P2P_ATTR_GROUP_BSSID = 7,
+ P2P_ATTR_EXT_LISTEN_TIMING = 8,
+ P2P_ATTR_INTENDED_INTERFACE_ADDR = 9,
+ P2P_ATTR_MANAGEABILITY = 10,
+ P2P_ATTR_CHANNEL_LIST = 11,
+ P2P_ATTR_NOTICE_OF_ABSENCE = 12,
+ P2P_ATTR_DEVICE_INFO = 13,
+ P2P_ATTR_GROUP_INFO = 14,
+ P2P_ATTR_GROUP_ID = 15,
+ P2P_ATTR_INTERFACE = 16,
+ P2P_ATTR_OPERATING_CHANNEL = 17,
+ P2P_ATTR_INVITATION_FLAGS = 18,
+ P2P_ATTR_OOB_GO_NEG_CHANNEL = 19,
+ P2P_ATTR_VENDOR_SPECIFIC = 221
+};
+struct ssv6xxx_p2p_noa_attribute {
+    u8 index;
+    u16 ctwindows_oppps;
+    struct ssv6xxx_p2p_noa_param noa_param;
+};
+extern void _ssv6xxx_hexdump(const char *title, const u8 *buf,
+                             size_t len);
+bool p2p_find_noa(const u8 *ies, struct ssv6xxx_p2p_noa_attribute *noa_attr)
+{
+    const u8 *end, *pos, *ie;
+    u32 len;
+ len = ie[1] - 4;
+ pos = ie + 6;
+ end = pos+len;
+ while (pos < end) {
+  u16 attr_len;
+  if (pos + 2 >= end) {
+   return false;
+  }
+  attr_len = WPA_GET_LE16(pos + 1);
+  if (pos + 3 + attr_len > end) {
+   return false;
+  }
+        if(pos[0] != P2P_ATTR_NOTICE_OF_ABSENCE){
+            pos += 3 + attr_len;
+            continue;
+        }
+        if(attr_len<15){
+            printk("*********************NOA descriptor does not exist len[%d]\n", attr_len);
+            break;
+        }
+        if(attr_len>15)
+            printk("More than one NOA descriptor\n");
+        noa_attr->index = pos[3];
+        noa_attr->ctwindows_oppps = pos[4];
+        noa_attr->noa_param.count = pos[5];
+        noa_attr->noa_param.duration = WPA_GET_LE32(&pos[6]);
+        noa_attr->noa_param.interval = WPA_GET_LE32(&pos[10]);
+        noa_attr->noa_param.start_time = WPA_GET_LE32(&pos[14]);
+        return true;
+ }
+ return false;
+}
+bool p2p_get_attribute_noa(const u8 *ies, u32 oui_type, struct ssv6xxx_p2p_noa_attribute *noa_attr)
+{
+ const u8 *end, *pos, *ie;
+    u32 len;
+ pos = ies;
+ end = ies + ies_len;
+ ie = NULL;
+ while (pos + 1 < end) {
+  if (pos + 2 + pos[1] > end)
+   return false;
+  if (pos[0] == WLAN_EID_VENDOR_SPECIFIC && pos[1] >= 4 &&
+      WPA_GET_BE32(&pos[2]) == oui_type) {
+   ie = pos;
+            if(p2p_find_noa(ie, 0, noa_attr) == true)
+                return true;
+  }
+  pos += 2 + pos[1];
+ }
+ return false;
+}
+void ssv6xxx_process_noa_event(struct ssv_softc *sc, struct sk_buff *skb)
+{
+    struct cfg_host_event *host_event;
+    struct ssv62xx_noa_evt *noa_evt;
+    host_event = (struct cfg_host_event *)skb->data;
+    noa_evt= (struct ssv62xx_noa_evt *)&host_event->dat[0];
+    switch(noa_evt->evt_id){
+        case SSV6XXX_NOA_START:
+            sc->p2p_noa.active_noa_vif |= (1<<noa_evt->vif);
+            printk("SSV6XXX_NOA_START===>[%08x]\n", sc->p2p_noa.active_noa_vif);
+            break;
+        case SSV6XXX_NOA_STOP:
+            sc->p2p_noa.active_noa_vif &= ~(1<<noa_evt->vif);
+            printk("SSV6XXX_NOA_STOP===>[%08x]\n", sc->p2p_noa.active_noa_vif);
+            break;
+        default:
+            printk("--------->NOA wrong command<---------\n");
+            break;
+    }
+}
+void ssv6xxx_noa_reset(struct ssv_softc *sc){
+    unsigned long flags;
+    printk("Reset NOA param...\n");
+    spin_lock_irqsave(&sc->p2p_noa.p2p_config_lock, flags);
+    memset(&sc->p2p_noa.noa_detect, 0, sizeof(struct ssv_p2p_noa_detect)*SSV_NUM_VIF);
+    sc->p2p_noa.active_noa_vif = 0;
+    sc->p2p_noa.monitor_noa_vif = 0;
+    spin_unlock_irqrestore(&sc->p2p_noa.p2p_config_lock, flags);
+}
+void ssv6xxx_noa_host_stop_noa(struct ssv_softc *sc, u8 vif_id){
+    struct ssv6xxx_p2p_noa_attribute noa_attr;
+    if(sc->p2p_noa.noa_detect[vif_id].p2p_noa_index>=0){
+        sc->p2p_noa.noa_detect[vif_id].p2p_noa_index = -1;
+        sc->p2p_noa.active_noa_vif &= ~(1<<vif_id);
+        memset(&sc->p2p_noa.noa_detect[vif_id].noa_param_cmd, 0, sizeof(struct ssv6xxx_p2p_noa_param));
+        printk("->remove NOA operating vif[%d]\n", vif_id);
+        noa_attr.noa_param.enable = 0;
+        noa_attr.noa_param.vif_id = vif_id;
+        ssv6xxx_send_noa_cmd(sc, &noa_attr.noa_param);
+    }
+}
+void ssv6xxx_noa_detect(struct ssv_softc *sc, struct ieee80211_hdr * hdr, u32 len){
+    int i;
+    unsigned long flags;
+    struct ieee80211_mgmt * mgmt =(struct ieee80211_mgmt *)hdr;
+    struct ssv6xxx_p2p_noa_attribute noa_attr;
+    spin_lock_irqsave(&sc->p2p_noa.p2p_config_lock, flags);
+    if(sc->p2p_noa.monitor_noa_vif == 0)
+        goto out;
+    for(i=0;i<SSV_NUM_VIF;i++){
+        if(sc->p2p_noa.noa_detect[i].noa_addr == NULL)
+            continue;
+        if(memcmp(mgmt->bssid, sc->p2p_noa.noa_detect[i].noa_addr, 6) != 0)
+            continue;
+        if(sc->p2p_noa.active_noa_vif &&
+            ((sc->p2p_noa.active_noa_vif & 1<<i) == 0))
+            continue;
+  sc->p2p_noa.noa_detect[i].last_rx = jiffies;
+        if(p2p_get_attribute_noa((const u8*)mgmt->u.beacon.variable,
+                len - (IEEE80211_HDRLEN + sizeof(mgmt->u.beacon)),
+                P2P_IE_VENDOR_TYPE,
+                &noa_attr)== false){
+            continue;
+        }
+        if(sc->p2p_noa.noa_detect[i].p2p_noa_index == noa_attr.index){
+            goto out;
+        }
+        printk(MACSTR"->set NOA element\n", MAC2STR(mgmt->bssid));
+        sc->p2p_noa.active_noa_vif |= (1<<i);
+        sc->p2p_noa.noa_detect[i].p2p_noa_index = noa_attr.index;
+        memcpy(&sc->p2p_noa.noa_detect[i].noa_param_cmd, &noa_attr.noa_param, sizeof(struct ssv6xxx_p2p_noa_param));
+        noa_attr.noa_param.enable = 1;
+        noa_attr.noa_param.vif_id = i;
+        memcpy(noa_attr.noa_param.addr, hdr->addr2, 6);
+        ssv6xxx_send_noa_cmd(sc, &noa_attr.noa_param);
+    }
+out:
+    spin_unlock_irqrestore(&sc->p2p_noa.p2p_config_lock, flags);
+}
+void ssv6xxx_noa_hdl_bss_change(struct ssv_softc *sc, enum ssv6xxx_noa_conf conf, u8 vif_idx){
+    unsigned long flags;
+    if(sc->vif_info[vif_idx].vif->type != NL80211_IFTYPE_STATION ||
+        sc->vif_info[vif_idx].vif->p2p != true)
+        return;
+    spin_lock_irqsave(&sc->p2p_noa.p2p_config_lock, flags);
+    printk("====>[NOA]ssv6xxx_noa_hdl_bss_change conf[%d] vif_idx[%d]\n", conf, vif_idx);
+    switch(conf)
+    {
+        case MONITOR_NOA_CONF_ADD:
+            memset(&sc->p2p_noa.noa_detect[vif_idx], 0, sizeof(struct ssv_p2p_noa_detect));
+            sc->p2p_noa.noa_detect[vif_idx].noa_addr = sc->vif_info[vif_idx].vif->bss_conf.bssid;
+            sc->p2p_noa.noa_detect[vif_idx].p2p_noa_index = -1;
+            sc->p2p_noa.noa_detect[vif_idx].last_rx = jiffies;
+            sc->p2p_noa.monitor_noa_vif |= 1<< vif_idx;
+            break;
+        case MONITOR_NOA_CONF_REMOVE:
+            sc->p2p_noa.monitor_noa_vif &= ~(1<< vif_idx);
+            sc->p2p_noa.noa_detect[vif_idx].noa_addr = NULL;
+            ssv6xxx_noa_host_stop_noa(sc, vif_idx);
+            break;
+        default:
+            break;
+    }
+    spin_unlock_irqrestore(&sc->p2p_noa.p2p_config_lock, flags);
+}
+void ssv6xxx_send_noa_cmd(struct ssv_softc *sc, struct ssv6xxx_p2p_noa_param *p2p_noa_param)
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int retry_cnt = 5;
+    skb = ssv_skb_alloc(HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_p2p_noa_param));
+    skb->data_len = HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_p2p_noa_param);
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_SET_NOA;
+    host_cmd->len = skb->data_len;
+    memcpy(host_cmd->dat32, p2p_noa_param, sizeof(struct ssv6xxx_p2p_noa_param));
+    printk("Noa cmd NOA Parameter:\nEnable=%d\nInterval=%d\nDuration=%d\nStart_time=0x%08x\nCount=%d\nAddr=[%02x:%02x:%02x:%02x:%02x:%02x]vif[%d]\n\n",
+                        p2p_noa_param->enable,
+                        p2p_noa_param->interval,
+                        p2p_noa_param->duration,
+                        p2p_noa_param->start_time,
+                        p2p_noa_param->count,
+                        p2p_noa_param->addr[0],
+                        p2p_noa_param->addr[1],
+                        p2p_noa_param->addr[2],
+                        p2p_noa_param->addr[3],
+                        p2p_noa_param->addr[4],
+                        p2p_noa_param->addr[5],
+                        p2p_noa_param->vif_id);
+    while((HCI_SEND_CMD(sc->sh, skb)!=0)&&(retry_cnt)){
+        printk(KERN_INFO "NOA cmd retry=%d!!\n",retry_cnt);
+        retry_cnt--;
+    }
+    ssv_skb_free(skb);
+}
+#if 0
+void ssv6200_cmd_work(struct work_struct *work)
+{
+    struct ssv_softc *sc =
+            container_of(work, struct ssv_softc, cmd_work);
+    struct sk_buff *skb;
+    bool cmd_mode;
+    int retry_cnt = 5;
+    do{
+        if(sc->cmd_info.state == SSC_CMD_STATE_IDLE){
+            struct cfg_host_cmd *host_cmd;
+            skb = skb_peek(&sc->cmd_info.cmd_que);
+            if(skb == NULL)
+                break;
+            host_cmd = (struct cfg_host_cmd *)skb->data;
+            while((HCI_SEND_CMD(sc->sh, skb)!=0)&&(retry_cnt)){
+                    printk(KERN_INFO "cmd retry=%d!!\n",retry_cnt);
+                    retry_cnt--;
+            }
+            if(retry_cnt)
+                sc->cmd_info.state = SSC_CMD_STATE_WAIT_RSP;
+        }else{
+            skb = skb_dequeue(&sc->cmd_info.evt_que);
+            if(skb == NULL)
+                break;
+        }
+    }while(1);
+}
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.h
new file mode 100644
index 0000000000000..870d789590a4f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/p2p.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _P2P_H_
+#define _P2P_H_ 
+#include <net/mac80211.h>
+#include <ssv6200.h>
+#include "drv_comm.h"
+#ifdef CONFIG_P2P_NOA
+#define P2P_MAX_NOA_INTERFACE 1
+struct ssv_p2p_noa_detect {
+    const u8 *noa_addr;
+    s16 p2p_noa_index;
+    unsigned long last_rx;
+    struct ssv6xxx_p2p_noa_param noa_param_cmd;
+};
+struct ssv_p2p_noa {
+    spinlock_t p2p_config_lock;
+    struct ssv_p2p_noa_detect noa_detect[SSV_NUM_VIF];
+    u8 active_noa_vif;
+    u8 monitor_noa_vif;
+};
+enum ssv_cmd_state{
+    SSC_CMD_STATE_IDLE,
+    SSC_CMD_STATE_WAIT_RSP,
+};
+struct ssv_cmd_Info{
+    struct sk_buff_head cmd_que;
+    struct sk_buff_head evt_que;
+    enum ssv_cmd_state state;
+};
+enum ssv6xxx_noa_conf {
+ MONITOR_NOA_CONF_ADD,
+ MONITOR_NOA_CONF_REMOVE,
+};
+struct ssv_softc;
+void ssv6xxx_process_noa_event(struct ssv_softc *sc, struct sk_buff *skb);
+void ssv6xxx_noa_hdl_bss_change(struct ssv_softc *sc, enum ssv6xxx_noa_conf conf, u8 vif_idx);
+void ssv6xxx_process_noa_event(struct ssv_softc *sc, struct sk_buff *skb);
+void ssv6xxx_noa_detect(struct ssv_softc *sc, struct ieee80211_hdr * hdr, u32 len);
+void ssv6xxx_noa_reset(struct ssv_softc *sc);
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.c
new file mode 100644
index 0000000000000..f77b224f34c23
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.c
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <ssv6200_reg.h>
+#include <ssv6200_aux.h>
+#include <linux/fs.h>
+#include "dev.h"
+#include "sar.h"
+
+WIFI_FLASH_CCFG flash_cfg = {
+    //16bytes
+    0x6051, 0x3009, 0x20170519, 0x1, 0x0, 0x0,
+    {   //16bytes
+        {0x47c000, 0x47c000, 0x47c000, 0x9, 0x1d, 0x0},
+        //16bytes
+        {0x79807980, 0x79807980, 0x79807980, 0x9, 0x1d, 0x0}
+    }
+};
+WIFI_FLASH_CCFG *pflash_cfg;
+
+struct t_sar_info sar_info[] = {
+    { SAR_LVL_INVALID, 0x0047c000, NULL},
+    { SAR_LVL_INVALID, 0x79807980, NULL}
+};
+
+int sar_info_size = sizeof(sar_info) / sizeof(sar_info[0]); 
+
+void flash_hexdump(void)
+{
+    unsigned i;
+    const u8 *buf = (const char *)pflash_cfg;
+    size_t len = sizeof(flash_cfg);
+    printk("-----------------------------\n");
+    printk("0x00h:");
+    if (buf == NULL) {
+        printk(" [NULL]");
+    } else {
+        for (i = 0; i < len; i++) {
+            printk(" %02x", buf[i]);
+            if ((i + 1) % 16 == 0) {
+                printk("\n");
+                if (i + 1 < len)
+                    printk("0x%02xh:", i + 1);
+            }
+        }
+    }
+    printk("-----------------------------\n");
+}
+
+static u8 get_sar_lvl(u32 sar)
+{
+    static u32 prev_sar = 0;
+    int i;
+    u8 changed = 0x0;
+ 
+    if (sar == prev_sar)
+        return changed;
+ 
+    printk("[thermal_sar] %d\n", (int)sar);
+
+    for (i = 0; i < sar_info_size; i++) {
+        if (sar_info[i].lvl == SAR_LVL_INVALID) {//if driver loaded under LT/HT env, it would cause wrong settings at this time.
+            sar_info[i].lvl = SAR_LVL_RT;
+            sar_info[i].value = sar_info[i].p->rt;	
+            changed |= BIT(i);
+        }
+        else if (sar_info[i].lvl == SAR_LVL_RT) {
+            if (sar < prev_sar) {
+                if (sar <= (u32)(sar_info[i].p->lt_ts - 2)) { //we need check if (g_tt_lt - 1) < SAR_MIN
+                    sar_info[i].lvl = SAR_LVL_LT;
+                    sar_info[i].value = sar_info[i].p->lt;
+                    changed |= BIT(i);
+                }
+            }
+            else if (sar > prev_sar){
+                if (sar >= (u32)(sar_info[i].p->ht_ts + 2)) { //we need check if (g_tt_lt + 1) > SAR_MAX
+                    sar_info[i].lvl = SAR_LVL_HT;
+                    sar_info[i].value = sar_info[i].p->ht;
+                    changed |= BIT(i);
+                }    
+            }
+        }
+        else if (sar_info[i].lvl == SAR_LVL_LT) {
+            if (sar >= (u32)(sar_info[i].p->lt_ts + 2)) {
+                sar_info[i].lvl = SAR_LVL_RT;
+                sar_info[i].value = sar_info[i].p->rt;
+                changed |= BIT(i);
+            }
+        }
+        else if (sar_info[i].lvl == SAR_LVL_HT) {
+            if (sar <= (u32)(sar_info[i].p->ht_ts - 2)) {
+                sar_info[i].lvl = SAR_LVL_RT;
+                sar_info[i].value = sar_info[i].p->rt;
+                changed |= BIT(i);
+            }
+        }
+    }
+    if (changed) {
+        printk("changed: 0x%x\n", changed);
+	}
+    prev_sar = sar;
+    return changed;
+}
+
+void sar_monitor(u32 curr_sar, struct ssv_softc *sc)
+{
+    //static u32 prev_sar_lvl = SAR_LVL_INVALID; //sar = 0, temparature < -25C
+    u8 changed;
+    changed = get_sar_lvl(curr_sar);
+
+    if (changed & BIT(SAR_TXGAIN_INDEX)) {
+        printk("TXGAIN: 0x%08x\n", sar_info[SAR_TXGAIN_INDEX].value);
+        SMAC_REG_WRITE(sc->sh, ADR_TX_GAIN_FACTOR, sar_info[SAR_TXGAIN_INDEX].value);
+    }
+    if (changed & BIT(SAR_XTAL_INDEX)) {
+        printk("XTAL: 0x%08x\n", sar_info[SAR_XTAL_INDEX].value);
+        SMAC_REG_WRITE(sc->sh, ADR_SYN_KVCO_XO_FINE_TUNE_CBANK, sar_info[SAR_XTAL_INDEX].value);
+    }
+}
+
+/*
+    SET_RG_SARADC_THERMAL(1);     //ce010030[26]
+    SET_RG_EN_SARADC(1);          //ce010030[30]
+    while(!GET_SAR_ADC_FSM_RDY);  //ce010094[23]
+    sar_code = GET_RG_SARADC_BIT; //ce010094[21:16]
+    SET_RG_SARADC_THERMAL(0);
+    SET_RG_EN_SARADC(0);
+*/
+void thermal_monitor(struct work_struct *work)
+{
+    struct ssv_softc *sc = container_of(work, struct ssv_softc, thermal_monitor_work.work);
+    u32 curr_sar;
+
+    u32 temp;
+    if (sc->ps_status == PWRSV_PREPARE) {
+        printk("sar PWRSV_PREPARE\n");
+        return;
+    }
+
+    mutex_lock(&sc->mutex);
+    SMAC_REG_READ(sc->sh, ADR_RX_11B_CCA_1, &temp);
+    if (temp == RX_11B_CCA_IN_SCAN) {
+        printk("in scan\n");
+        mutex_unlock(&sc->mutex);
+        queue_delayed_work(sc->thermal_wq, &sc->thermal_monitor_work, THERMAL_MONITOR_TIME);
+        return;
+    }
+    SMAC_REG_READ(sc->sh, ADR_RX_ADC_REGISTER, &temp);
+    //printk("ori %08x:%08x\n", ADR_RX_ADC_REGISTER, temp);
+    SMAC_REG_SET_BITS(sc->sh, ADR_RX_ADC_REGISTER, (1 << RG_SARADC_THERMAL_SFT),
+              RG_SARADC_THERMAL_MSK);
+    SMAC_REG_SET_BITS(sc->sh, ADR_RX_ADC_REGISTER, (1 <<  RG_EN_SARADC_SFT),
+              RG_EN_SARADC_MSK);
+
+    do {
+        msleep(1);
+        SMAC_REG_READ(sc->sh, ADR_READ_ONLY_FLAGS_1, &temp);
+    } while (((temp & SAR_ADC_FSM_RDY_MSK) >> SAR_ADC_FSM_RDY_SFT) != 1);
+    //printk("SAR_ADC_FSM_RDY_STAT %d\n", (temp & SAR_ADC_FSM_RDY_MSK) >> SAR_ADC_FSM_RDY_SFT);
+    curr_sar = (temp & RG_SARADC_BIT_MSK) >> RG_SARADC_BIT_SFT;
+    SMAC_REG_READ(sc->sh, ADR_RX_ADC_REGISTER, &temp);
+
+    //printk("new %08x:%08x\n", ADR_RX_ADC_REGISTER, temp);
+    
+    SMAC_REG_SET_BITS(sc->sh, ADR_RX_ADC_REGISTER, (0 << RG_SARADC_THERMAL_SFT),
+              RG_SARADC_THERMAL_MSK);
+    SMAC_REG_SET_BITS(sc->sh, ADR_RX_ADC_REGISTER, (0 <<  RG_EN_SARADC_SFT),
+              RG_EN_SARADC_MSK);
+    sar_monitor(curr_sar, sc);
+
+    mutex_unlock(&sc->mutex);
+
+    queue_delayed_work(sc->thermal_wq, &sc->thermal_monitor_work, THERMAL_MONITOR_TIME);
+}
+
+int get_flash_info(struct ssv_softc *sc)
+{
+    struct file *fp = (struct file *)NULL;
+    mm_segment_t fs;
+    int i, ret;
+
+    pflash_cfg = &flash_cfg;
+
+    if (sc->sh->cfg.flash_bin_path[0] != 0x00) {
+        fp = filp_open(sc->sh->cfg.flash_bin_path, O_RDONLY, 0);
+		 if (IS_ERR(fp) || fp == NULL) {
+             fp = filp_open(SEC_CFG_BIN_NAME, O_RDONLY, 0);
+         }
+    }
+    else{
+        fp = filp_open(DEFAULT_CFG_BIN_NAME, O_RDONLY, 0);
+		if (IS_ERR(fp) || fp == NULL) {
+			fp = filp_open(SEC_CFG_BIN_NAME, O_RDONLY, 0);
+		}
+    }
+    if (IS_ERR(fp) || fp == NULL) {
+        printk("flash_file %s not found, disable sar\n",DEFAULT_CFG_BIN_NAME);
+        //WARN_ON(1);
+        ret = 0;
+        return ret;
+    }
+
+    fs = get_fs();
+    set_fs(get_ds());
+    fp->f_op->read(fp, (char *)pflash_cfg, sizeof(flash_cfg), &fp->f_pos);
+    set_fs(fs);
+    
+    filp_close(fp, NULL);
+    ret = 1;
+
+    flash_hexdump();
+    for (i = 0; i < sar_info_size; i++) {
+        sar_info[i].p = &flash_cfg.sar_rlh[i];
+        printk("rt = %x, lt = %x, ht = %x\n", sar_info[i].p->rt, sar_info[i].p->lt, sar_info[i].p->ht);
+        printk("lt_ts = %x, ht_ts = %x\n", sar_info[i].p->lt_ts, sar_info[i].p->ht_ts);
+    }
+    return ret;
+}
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.h
new file mode 100644
index 0000000000000..9d36fc4658d5b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sar.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _CFG_H_
+#define _CFG_H_
+#include <linux/kthread.h>
+
+#define SAR_XTAL_INDEX     (0)
+#define SAR_TXGAIN_INDEX    (1)
+#define THERMAL_MONITOR_TIME (10 * HZ)
+#define DEFAULT_CFG_BIN_NAME "/tmp/flash.bin"
+#define SEC_CFG_BIN_NAME "/system/etc/wifi/ssv6051/flash.bin"
+enum {
+    SAR_LVL_LT,
+    SAR_LVL_RT,
+    SAR_LVL_HT,
+    SAR_LVL_INVALID
+};
+
+struct flash_thermal_info {
+    u32 rt;
+    u32 lt;
+    u32 ht;
+    u8 lt_ts;
+    u8 ht_ts;
+    u16 reserve;
+};
+typedef struct t_WIFI_FLASH_CCFG {
+    //16bytes
+    u16 chip_id;
+    u16 sid;
+    u32 date;
+    u16 version;
+    u16 reserve_1;
+    u32 reserve_2;
+    //16bytes
+    struct flash_thermal_info sar_rlh[2];
+#if 0
+    u32 x_rt;
+    u32 x_lt;
+    u32 x_ht;
+    u8 x_tt_lt;
+    u8 x_tt_ht;
+    u16 reserve_3;
+    //16bytes
+    u32 g_rt;
+    u32 g_lt;
+    u32 g_ht;
+    u8 g_tt_lt;
+    u8 g_tt_ht;
+    u16 reserve_4;
+#endif
+} WIFI_FLASH_CCFG;
+
+
+struct t_sar_info {
+    u32 lvl;
+    u32 value;
+    struct flash_thermal_info *p;
+};
+
+void thermal_monitor(struct work_struct *work);
+int get_flash_info(struct ssv_softc *sc);
+void flash_hexdump(void);
+
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec.h
new file mode 100644
index 0000000000000..bc5ea18058c0d
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef SEC_H
+#define SEC_H 
+#include <linux/types.h>
+#include <linux/ieee80211.h>
+#include <net/mac80211.h>
+#define CCMP_TK_LEN 16
+#define TKIP_KEY_LEN 32
+#define WEP_KEY_LEN 13
+struct ssv_crypto_ops {
+ const char *name;
+ struct list_head list;
+ void *(*init) (int keyidx);
+ void (*deinit) (void *priv);
+ int (*encrypt_mpdu) (struct sk_buff * skb, int hdr_len, void *priv);
+ int (*decrypt_mpdu) (struct sk_buff * skb, int hdr_len, void *priv);
+ int (*encrypt_msdu) (struct sk_buff * skb, int hdr_len, void *priv);
+ int (*decrypt_msdu) (struct sk_buff * skb, int keyidx, int hdr_len,
+        void *priv);
+ int (*set_tx_pn) (u8 * seq, void *priv);
+ int (*set_key) (void *key, int len, u8 * seq, void *priv);
+ int (*get_key) (void *key, int len, u8 * seq, void *priv);
+ char *(*print_stats) (char *p, void *priv);
+ unsigned long (*get_flags) (void *priv);
+ unsigned long (*set_flags) (unsigned long flags, void *priv);
+#ifdef MULTI_THREAD_ENCRYPT
+ int (*encrypt_prepare) (struct sk_buff * skb, int hdr_len, void *priv);
+ int (*decrypt_prepare) (struct sk_buff * skb, int hdr_len, void *priv);
+#endif
+ int extra_mpdu_prefix_len, extra_mpdu_postfix_len;
+ int extra_msdu_prefix_len, extra_msdu_postfix_len;
+};
+struct ssv_crypto_data {
+    struct ssv_crypto_ops *ops;
+    void *priv;
+    #ifdef HAS_CRYPTO_LOCK
+    rwlock_t lock;
+    #endif
+};
+struct ssv_crypto_ops *get_crypto_ccmp_ops(void);
+struct ssv_crypto_ops *get_crypto_tkip_ops(void);
+struct ssv_crypto_ops *get_crypto_wep_ops(void);
+#ifdef CONFIG_SSV_WAPI
+struct ssv_crypto_ops *get_crypto_wpi_ops(void);
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_ccmp.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_ccmp.c
new file mode 100644
index 0000000000000..64cab200c64fb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_ccmp.c
@@ -0,0 +1,802 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/if_ether.h>
+#include <linux/if_arp.h>
+#include <asm/string.h>
+#include <linux/wireless.h>
+#include <linux/ieee80211.h>
+#include <linux/crypto.h>
+#include <linux/module.h>
+#include "sec.h"
+#define PRINT_DEBUG 0
+#define AES_BLOCK_LEN 16
+#define CCMP_HDR_LEN 8
+#define CCMP_MIC_LEN 8
+#define CCMP_PN_LEN 6
+#ifdef MULTI_THREAD_ENCRYPT
+int prepare_mask = 0x0b0e0e0f;
+#endif
+struct lib80211_ccmp_data {
+ u8 key[CCMP_TK_LEN];
+ int key_set;
+ u8 tx_pn[CCMP_PN_LEN];
+ u8 rx_pn[CCMP_PN_LEN];
+#ifdef MULTI_THREAD_ENCRYPT
+    u8 pre_rx_pn[CCMP_PN_LEN];
+#endif
+ u32 dot11RSNAStatsCCMPFormatErrors;
+ u32 dot11RSNAStatsCCMPReplays;
+ u32 dot11RSNAStatsCCMPDecryptErrors;
+ int key_idx;
+ struct crypto_cipher *tfm;
+#ifndef MULTI_THREAD_ENCRYPT
+ u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
+     tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
+    u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
+#else
+ u8 *tx_b0, *tx_b, *tx_e, *tx_s0;
+    u8 *rx_b0, *rx_b, *rx_a;
+#endif
+};
+static inline void lib80211_ccmp_aes_encrypt(struct crypto_cipher *tfm,
+           const u8 pt[16], u8 ct[16])
+{
+ crypto_cipher_encrypt_one(tfm, ct, pt);
+}
+static void *lib80211_ccmp_init(int key_idx)
+{
+ struct lib80211_ccmp_data *priv;
+ const char *cipher_name = "aes";
+#ifdef MULTI_THREAD_ENCRYPT
+    unsigned int buf_size = num_present_cpus()*AES_BLOCK_LEN*sizeof(u8);
+#endif
+ priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
+ if (priv == NULL)
+  goto fail;
+ priv->key_idx = key_idx;
+ priv->tfm = crypto_alloc_cipher(cipher_name, 0, CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->tfm)) {
+         printk(KERN_ERR "Failed to allocate cipher %s\n", cipher_name);
+  priv->tfm = NULL;
+  goto fail;
+ }
+ else
+ {
+     printk(KERN_ERR "Found %s in driver %s (M %s).\n",
+             priv->tfm->base.__crt_alg->cra_name,
+             priv->tfm->base.__crt_alg->cra_driver_name,
+             priv->tfm->base.__crt_alg->cra_module->name);
+ }
+#ifdef MULTI_THREAD_ENCRYPT
+        priv->tx_b0 = priv->tx_b = priv->tx_e = priv->tx_s0 = NULL;
+        priv->tx_b0 = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->tx_b = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->tx_e = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->tx_s0 = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->rx_b0 = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->rx_b = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        priv->rx_a = (u8 *)kzalloc(buf_size, GFP_ATOMIC);
+        if( (priv->tx_b0 == NULL) || (priv->tx_b == NULL) || (priv->tx_e == NULL) ||
+                (priv->tx_s0 == NULL) ||(priv->rx_b0 == NULL) || (priv->rx_b == NULL) || (priv->rx_a == NULL) )
+        {
+            printk("#######fail to create memory for ccmp!!!\n");
+            goto fail;
+        }
+#endif
+ return priv;
+      fail:
+ if (priv) {
+  if (priv->tfm)
+   crypto_free_cipher(priv->tfm);
+#ifdef MULTI_THREAD_ENCRYPT
+        if(priv->tx_b0 != NULL)
+            kfree(priv->tx_b0);
+        if(priv->tx_b != NULL)
+            kfree(priv->tx_b);
+        if(priv->tx_e != NULL)
+            kfree(priv->tx_e);
+        if(priv->tx_s0 != NULL)
+            kfree(priv->tx_s0);
+        if(priv->rx_b0 != NULL)
+            kfree(priv->rx_b0);
+        if(priv->rx_b != NULL)
+            kfree(priv->rx_b);
+        if(priv->rx_a != NULL)
+            kfree(priv->rx_a);
+#endif
+  kfree(priv);
+ }
+ return NULL;
+}
+static void lib80211_ccmp_deinit(void *priv)
+{
+ struct lib80211_ccmp_data *_priv = priv;
+ if (_priv && _priv->tfm)
+  crypto_free_cipher(_priv->tfm);
+#ifdef MULTI_THREAD_ENCRYPT
+    if(_priv->tx_b0 != NULL)
+        kfree(_priv->tx_b0);
+    if(_priv->tx_b != NULL)
+        kfree(_priv->tx_b);
+    if(_priv->tx_e != NULL)
+        kfree(_priv->tx_e);
+    if(_priv->tx_s0 != NULL)
+        kfree(_priv->tx_s0);
+    if(_priv->rx_b0 != NULL)
+        kfree(_priv->rx_b0);
+    if(_priv->rx_b != NULL)
+        kfree(_priv->rx_b);
+    if(_priv->rx_a != NULL)
+        kfree(_priv->rx_a);
+#endif
+ kfree(priv);
+}
+static inline void xor_block(u8 * b, u8 * a, size_t len)
+{
+ int i;
+ for (i = 0; i < len; i++)
+  b[i] ^= a[i];
+}
+static void ccmp_init_blocks(struct crypto_cipher *tfm,
+        struct ieee80211_hdr *hdr,
+        u8 * pn, size_t dlen, u8 * b0, u8 * auth, u8 * s0)
+{
+ u8 *pos, qc = 0;
+ size_t aad_len;
+ int a4_included, qc_included;
+ u8 aad[2 * AES_BLOCK_LEN];
+ a4_included = ieee80211_has_a4(hdr->frame_control);
+ qc_included = ieee80211_is_data_qos(hdr->frame_control);
+ aad_len = 22;
+ if (a4_included)
+  aad_len += 6;
+ if (qc_included) {
+  pos = (u8 *) & hdr->addr4;
+  if (a4_included)
+   pos += 6;
+  qc = *pos & 0x0f;
+  aad_len += 2;
+ }
+ b0[0] = 0x59;
+ b0[1] = qc;
+ memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
+ memcpy(b0 + 8, pn, CCMP_PN_LEN);
+ b0[14] = (dlen >> 8) & 0xff;
+ b0[15] = dlen & 0xff;
+ pos = (u8 *) hdr;
+ aad[0] = 0;
+ aad[1] = aad_len & 0xff;
+ aad[2] = pos[0] & 0x8f;
+ aad[3] = pos[1] & 0xc7;
+ memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
+ pos = (u8 *) & hdr->seq_ctrl;
+ aad[22] = pos[0] & 0x0f;
+ aad[23] = 0;
+ memset(aad + 24, 0, 8);
+ if (a4_included)
+  memcpy(aad + 24, hdr->addr4, ETH_ALEN);
+ if (qc_included) {
+  aad[a4_included ? 30 : 24] = qc;
+ }
+ lib80211_ccmp_aes_encrypt(tfm, b0, auth);
+ xor_block(auth, aad, AES_BLOCK_LEN);
+ lib80211_ccmp_aes_encrypt(tfm, auth, auth);
+ xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
+ lib80211_ccmp_aes_encrypt(tfm, auth, auth);
+ b0[0] &= 0x07;
+ b0[14] = b0[15] = 0;
+ lib80211_ccmp_aes_encrypt(tfm, b0, s0);
+}
+static int lib80211_ccmp_hdr(struct sk_buff *skb, int hdr_len,
+         u8 *aeskey, int keylen, void *priv)
+{
+ struct lib80211_ccmp_data *key = priv;
+ int i;
+ u8 *pos;
+ if (skb_headroom(skb) < CCMP_HDR_LEN || skb->len < hdr_len)
+  return -1;
+ if (aeskey != NULL && keylen >= CCMP_TK_LEN)
+  memcpy(aeskey, key->key, CCMP_TK_LEN);
+ pos = skb_push(skb, CCMP_HDR_LEN);
+ memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
+ pos += hdr_len;
+ i = CCMP_PN_LEN - 1;
+ while (i >= 0) {
+  key->tx_pn[i]++;
+  if (key->tx_pn[i] != 0)
+   break;
+  i--;
+ }
+ *pos++ = key->tx_pn[5];
+ *pos++ = key->tx_pn[4];
+ *pos++ = 0;
+ *pos++ = (key->key_idx << 6) | (1 << 5) ;
+ *pos++ = key->tx_pn[3];
+ *pos++ = key->tx_pn[2];
+ *pos++ = key->tx_pn[1];
+ *pos++ = key->tx_pn[0];
+ return CCMP_HDR_LEN;
+}
+static int lib80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+ struct lib80211_ccmp_data *key = priv;
+ int data_len, i, blocks, last, len;
+ u8 *pos, *mic;
+ struct ieee80211_hdr *hdr;
+#ifndef MULTI_THREAD_ENCRYPT
+ u8 *b0 = key->tx_b0;
+ u8 *b = key->tx_b;
+ u8 *e = key->tx_e;
+ u8 *s0 = key->tx_s0;
+ int ret;
+#else
+ unsigned int offset = smp_processor_id()*AES_BLOCK_LEN*sizeof(u8);
+ u8 *b0 = (key->tx_b0 + offset);
+ u8 *b = (key->tx_b + offset);
+ u8 *e = (key->tx_e + offset);
+ u8 *s0 = (key->tx_s0 + offset);
+ u8 tmp_tx_pn[CCMP_PN_LEN], *ccmp_hdr_ptr = NULL;
+ void *mask_ptr = NULL;
+#endif
+#ifndef MULTI_THREAD_ENCRYPT
+ ret = skb_padto(skb, skb->len + CCMP_MIC_LEN);
+    if (ret)
+    {
+        printk(KERN_ERR "Failed to extand skb for CCMP encryption.");
+        return -1;
+    }
+ if (skb->len < hdr_len)
+  return -1;
+#endif
+#ifndef MULTI_THREAD_ENCRYPT
+    data_len = skb->len - hdr_len;
+ len = lib80211_ccmp_hdr(skb, hdr_len, NULL, 0, priv);
+ if (len < 0)
+  return -1;
+#else
+ mask_ptr = (void *)((size_t)skb_end_pointer(skb) - sizeof(prepare_mask));
+ if(memcmp(mask_ptr, &prepare_mask, sizeof(prepare_mask)) != 0)
+ {
+  printk("no prepared skb\n");
+  return -1;
+ }
+ data_len = skb->len - (hdr_len + CCMP_HDR_LEN);
+ ccmp_hdr_ptr = (u8 *)(skb->data + hdr_len);
+ tmp_tx_pn[5] = ccmp_hdr_ptr[0];
+ tmp_tx_pn[4] = ccmp_hdr_ptr[1];
+ tmp_tx_pn[3] = ccmp_hdr_ptr[4];
+ tmp_tx_pn[2] = ccmp_hdr_ptr[5];
+ tmp_tx_pn[1] = ccmp_hdr_ptr[6];
+ tmp_tx_pn[0] = ccmp_hdr_ptr[7];
+#endif
+ pos = skb->data + hdr_len + CCMP_HDR_LEN;
+ hdr = (struct ieee80211_hdr *)skb->data;
+#ifndef MULTI_THREAD_ENCRYPT
+ ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
+#else
+ ccmp_init_blocks(key->tfm, hdr, tmp_tx_pn, data_len, b0, b, s0);
+#endif
+ blocks = DIV_ROUND_UP(data_len, AES_BLOCK_LEN);
+ last = data_len % AES_BLOCK_LEN;
+ for (i = 1; i <= blocks; i++) {
+  len = (i == blocks && last) ? last : AES_BLOCK_LEN;
+  xor_block(b, pos, len);
+  lib80211_ccmp_aes_encrypt(key->tfm, b, b);
+  b0[14] = (i >> 8) & 0xff;
+  b0[15] = i & 0xff;
+  lib80211_ccmp_aes_encrypt(key->tfm, b0, e);
+  xor_block(pos, e, len);
+  pos += len;
+ }
+ mic = skb_put(skb, CCMP_MIC_LEN);
+ for (i = 0; i < CCMP_MIC_LEN; i++)
+  mic[i] = b[i] ^ s0[i];
+ return 0;
+}
+static inline int ccmp_replay_check(u8 *pn_n, u8 *pn_o)
+{
+ u32 iv32_n, iv16_n;
+ u32 iv32_o, iv16_o;
+ iv32_n = (pn_n[0] << 24) | (pn_n[1] << 16) | (pn_n[2] << 8) | pn_n[3];
+ iv16_n = (pn_n[4] << 8) | pn_n[5];
+ iv32_o = (pn_o[0] << 24) | (pn_o[1] << 16) | (pn_o[2] << 8) | pn_o[3];
+ iv16_o = (pn_o[4] << 8) | pn_o[5];
+ if ((s32)iv32_n - (s32)iv32_o < 0 ||
+     (iv32_n == iv32_o && iv16_n <= iv16_o))
+  return 1;
+ return 0;
+}
+static int lib80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+ struct lib80211_ccmp_data *key = priv;
+ u8 keyidx, *pos;
+ struct ieee80211_hdr *hdr;
+#ifndef MULTI_THREAD_ENCRYPT
+ u8 *b0 = key->rx_b0;
+ u8 *b = key->rx_b;
+ u8 *a = key->rx_a;
+#else
+    unsigned int offset = smp_processor_id()*AES_BLOCK_LEN*sizeof(u8);
+    u8 *b0 = (key->rx_b0 + offset);
+ u8 *b = (key->rx_b + offset);
+ u8 *a = (key->rx_a + offset);
+#endif
+ u8 pn[6];
+ int i, blocks, last, len;
+ size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
+ u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
+#ifndef MULTI_THREAD_ENCRYPT
+ if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
+  key->dot11RSNAStatsCCMPFormatErrors++;
+  return -1;
+ }
+#endif
+ hdr = (struct ieee80211_hdr *)skb->data;
+ pos = skb->data + hdr_len;
+ keyidx = pos[3];
+#ifndef MULTI_THREAD_ENCRYPT
+ if (!(keyidx & (1 << 5))) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "CCMP: received packet without ExtIV"
+          " flag from %pM (%02X)\n", hdr->addr2, keyidx);
+  }
+  key->dot11RSNAStatsCCMPFormatErrors++;
+  return -2;
+ }
+ keyidx >>= 6;
+ if (key->key_idx != keyidx) {
+  printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
+         "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
+  return -6;
+ }
+ if (!key->key_set) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "CCMP: received packet from %pM"
+          " with keyid=%d that does not have a configured"
+          " key\n", hdr->addr2, keyidx);
+  }
+  return -3;
+ }
+#endif
+ pn[0] = pos[7];
+ pn[1] = pos[6];
+ pn[2] = pos[5];
+ pn[3] = pos[4];
+ pn[4] = pos[1];
+ pn[5] = pos[0];
+ pos += 8;
+#if 0
+ if (ccmp_replay_check(pn, key->rx_pn)) {
+#ifdef CONFIG_LIB80211_DEBUG
+  if (net_ratelimit())
+        {
+   printk(KERN_DEBUG "CCMP: replay detected: STA=%pM "
+     "previous PN %02x%02x%02x%02x%02x%02x "
+     "received PN %02x%02x%02x%02x%02x%02x\n",
+     hdr->addr2,
+     key->rx_pn[0], key->rx_pn[1], key->rx_pn[2],
+     key->rx_pn[3], key->rx_pn[4], key->rx_pn[5],
+     pn[0], pn[1], pn[2], pn[3], pn[4], pn[5]);
+  }
+#endif
+  key->dot11RSNAStatsCCMPReplays++;
+  return -4;
+ }
+#endif
+ ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
+ xor_block(mic, b, CCMP_MIC_LEN);
+ blocks = DIV_ROUND_UP(data_len, AES_BLOCK_LEN);
+ last = data_len % AES_BLOCK_LEN;
+ for (i = 1; i <= blocks; i++) {
+  len = (i == blocks && last) ? last : AES_BLOCK_LEN;
+  b0[14] = (i >> 8) & 0xff;
+  b0[15] = i & 0xff;
+  lib80211_ccmp_aes_encrypt(key->tfm, b0, b);
+  xor_block(pos, b, len);
+  xor_block(a, pos, len);
+  lib80211_ccmp_aes_encrypt(key->tfm, a, a);
+  pos += len;
+ }
+ if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "CCMP: decrypt failed: STA="
+          "%pM\n", hdr->addr2);
+  }
+  key->dot11RSNAStatsCCMPDecryptErrors++;
+  return -5;
+ }
+#ifndef MULTI_THREAD_ENCRYPT
+ memcpy(key->rx_pn, pn, CCMP_PN_LEN);
+#else
+    if (!ccmp_replay_check(pn, key->rx_pn))
+        memcpy(key->rx_pn, pn, CCMP_PN_LEN);
+#endif
+ memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
+ skb_pull(skb, CCMP_HDR_LEN);
+ skb_trim(skb, skb->len - CCMP_MIC_LEN);
+ return keyidx;
+}
+static int lib80211_ccmp_set_key(void *key, int len, u8 * seq, void *priv)
+{
+ struct lib80211_ccmp_data *data = priv;
+ int keyidx;
+ struct crypto_cipher *tfm = data->tfm;
+#ifdef MULTI_THREAD_ENCRYPT
+ u8 *tx_b0 = data->tx_b0;
+ u8 *tx_b = data->tx_b;
+ u8 *tx_e = data->tx_e;
+ u8 *tx_s0 = data->tx_s0;
+    u8 *rx_b0 = data->rx_b0;
+ u8 *rx_b = data->rx_b;
+ u8 *rx_a = data->rx_a;
+#endif
+ keyidx = data->key_idx;
+ memset(data, 0, sizeof(*data));
+ data->key_idx = keyidx;
+ data->tfm = tfm;
+ if (len == CCMP_TK_LEN) {
+  memcpy(data->key, key, CCMP_TK_LEN);
+  data->key_set = 1;
+  if (seq) {
+   data->rx_pn[0] = seq[5];
+   data->rx_pn[1] = seq[4];
+   data->rx_pn[2] = seq[3];
+   data->rx_pn[3] = seq[2];
+   data->rx_pn[4] = seq[1];
+   data->rx_pn[5] = seq[0];
+#ifdef MULTI_THREAD_ENCRYPT
+            memcpy(data->pre_rx_pn, data->rx_pn, CCMP_PN_LEN);
+#endif
+  }
+  crypto_cipher_setkey(data->tfm, data->key, CCMP_TK_LEN);
+#ifdef MULTI_THREAD_ENCRYPT
+  data->tx_b0 = tx_b0;
+  data->tx_b = tx_b;
+  data->tx_e = tx_e;
+  data->tx_s0 = tx_s0;
+        data->rx_b0 = rx_b0;
+  data->rx_b = rx_b;
+  data->rx_a = rx_a;
+#endif
+ } else if (len == 0)
+  data->key_set = 0;
+ else
+  return -1;
+ return 0;
+}
+static int lib80211_ccmp_get_key(void *key, int len, u8 * seq, void *priv)
+{
+ struct lib80211_ccmp_data *data = priv;
+ if (len < CCMP_TK_LEN)
+  return -1;
+ if (!data->key_set)
+  return 0;
+ memcpy(key, data->key, CCMP_TK_LEN);
+ if (seq) {
+  seq[0] = data->tx_pn[5];
+  seq[1] = data->tx_pn[4];
+  seq[2] = data->tx_pn[3];
+  seq[3] = data->tx_pn[2];
+  seq[4] = data->tx_pn[1];
+  seq[5] = data->tx_pn[0];
+ }
+ return CCMP_TK_LEN;
+}
+static int lib80211_ccmp_set_tx_pn(u8 * seq, void *priv)
+{
+ struct lib80211_ccmp_data *data = priv;
+ if (seq) {
+  data->tx_pn[0] = seq[0];
+  data->tx_pn[1] = seq[1];
+  data->tx_pn[2] = seq[2];
+  data->tx_pn[3] = seq[3];
+  data->tx_pn[4] = seq[4];
+  data->tx_pn[5] = seq[5];
+ }
+ return 0;
+}
+static char *lib80211_ccmp_print_stats(char *p, void *priv)
+{
+ struct lib80211_ccmp_data *ccmp = priv;
+ p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
+       "tx_pn=%02x%02x%02x%02x%02x%02x "
+       "rx_pn=%02x%02x%02x%02x%02x%02x "
+       "format_errors=%d replays=%d decrypt_errors=%d\n",
+       ccmp->key_idx, ccmp->key_set,
+       ccmp->tx_pn[0], ccmp->tx_pn[1], ccmp->tx_pn[2],
+       ccmp->tx_pn[3], ccmp->tx_pn[4], ccmp->tx_pn[5],
+       ccmp->rx_pn[0], ccmp->rx_pn[1], ccmp->rx_pn[2],
+       ccmp->rx_pn[3], ccmp->rx_pn[4], ccmp->rx_pn[5],
+       ccmp->dot11RSNAStatsCCMPFormatErrors,
+       ccmp->dot11RSNAStatsCCMPReplays,
+       ccmp->dot11RSNAStatsCCMPDecryptErrors);
+ return p;
+}
+#ifdef MULTI_THREAD_ENCRYPT
+static int lib80211_ccmp_encrypt_prepare (struct sk_buff * skb, int hdr_len, void *priv)
+{
+    int data_len, len, ret;
+    void *ptr = NULL;
+    if (skb_tailroom(skb) < CCMP_MIC_LEN)
+    {
+        ret = skb_padto(skb, skb->len + CCMP_MIC_LEN);
+        if (ret != 0)
+        {
+            printk(KERN_ERR "Failed to extand skb for CCMP encryption, ret = %d.", ret);
+            return -1;
+        }
+    }
+    if (skb->len < hdr_len)
+  return -1;
+    data_len = skb->len - hdr_len;
+    len = lib80211_ccmp_hdr(skb, hdr_len, NULL, 0, priv);
+    if (len < 0)
+        return -1;
+    ptr = (void *)((size_t)skb_end_pointer(skb) - sizeof(prepare_mask));
+    memcpy(ptr, &prepare_mask, sizeof(prepare_mask));
+    return 0;
+}
+static int lib80211_ccmp_decrypt_prepare (struct sk_buff * skb, int hdr_len, void *priv)
+{
+    struct lib80211_ccmp_data *key = priv;
+ u8 keyidx, *pos;
+ struct ieee80211_hdr *hdr;
+ u8 pn[6];
+ if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN)
+    {
+  key->dot11RSNAStatsCCMPFormatErrors++;
+  return -1;
+ }
+ hdr = (struct ieee80211_hdr *)skb->data;
+ pos = skb->data + hdr_len;
+ keyidx = pos[3];
+ if (!(keyidx & (1 << 5)))
+    {
+        {
+   printk(KERN_DEBUG "CCMP: received packet without ExtIV"
+          " flag from %pM (%02X)\n", hdr->addr2, keyidx);
+  }
+  key->dot11RSNAStatsCCMPFormatErrors++;
+  return -2;
+ }
+ keyidx >>= 6;
+ if (key->key_idx != keyidx)
+    {
+  printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
+         "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
+  return -6;
+ }
+ if (!key->key_set)
+    {
+        {
+   printk(KERN_DEBUG "CCMP: received packet from %pM"
+          " with keyid=%d that does not have a configured"
+          " key\n", hdr->addr2, keyidx);
+  }
+  return -3;
+ }
+ pn[0] = pos[7];
+ pn[1] = pos[6];
+ pn[2] = pos[5];
+ pn[3] = pos[4];
+ pn[4] = pos[1];
+ pn[5] = pos[0];
+#if 0
+    if (ccmp_replay_check(pn, key->pre_rx_pn))
+    {
+#if 1
+        {
+   printk(KERN_DEBUG "CCMP: replay detected: STA=%pM "
+     "previous PN %02x%02x%02x%02x%02x%02x "
+     "received PN %02x%02x%02x%02x%02x%02x\n",
+     hdr->addr2,
+     key->rx_pn[0], key->rx_pn[1], key->rx_pn[2],
+     key->rx_pn[3], key->rx_pn[4], key->rx_pn[5],
+     pn[0], pn[1], pn[2], pn[3], pn[4], pn[5]);
+  }
+#endif
+  key->dot11RSNAStatsCCMPReplays++;
+  return -4;
+ }
+#endif
+    memcpy(key->pre_rx_pn, pn, CCMP_PN_LEN);
+    return 0;
+}
+#endif
+static struct ssv_crypto_ops ssv_crypt_ccmp = {
+ .name = "CCMP",
+ .init = lib80211_ccmp_init,
+ .deinit = lib80211_ccmp_deinit,
+ .encrypt_mpdu = lib80211_ccmp_encrypt,
+ .decrypt_mpdu = lib80211_ccmp_decrypt,
+ .encrypt_msdu = NULL,
+ .decrypt_msdu = NULL,
+ .set_tx_pn = lib80211_ccmp_set_tx_pn,
+ .set_key = lib80211_ccmp_set_key,
+ .get_key = lib80211_ccmp_get_key,
+ .print_stats = lib80211_ccmp_print_stats,
+ .extra_mpdu_prefix_len = CCMP_HDR_LEN,
+ .extra_mpdu_postfix_len = CCMP_MIC_LEN,
+#ifdef MULTI_THREAD_ENCRYPT
+ .encrypt_prepare = lib80211_ccmp_encrypt_prepare,
+    .decrypt_prepare = lib80211_ccmp_decrypt_prepare,
+#endif
+};
+struct ssv_crypto_ops *get_crypto_ccmp_ops(void)
+{
+    return &ssv_crypt_ccmp;
+}
+#if 0
+static inline int ccmp_replay_check(u8 *pn_n, u8 *pn_o)
+{
+ u32 iv32_n, iv16_n;
+ u32 iv32_o, iv16_o;
+ iv32_n = (pn_n[5] << 24) | (pn_n[4] << 16) | (pn_n[3] << 8) | pn_n[2];
+ iv16_n = (pn_n[1] << 8) | pn_n[0];
+ iv32_o = (pn_o[5] << 24) | (pn_o[4] << 16) | (pn_o[3] << 8) | pn_o[2];
+ iv16_o = (pn_o[1] << 8) | pn_o[0];
+ if (((u32)iv32_n < (u32)iv32_o) ||
+     (iv32_n == iv32_o && iv16_n <= iv16_o))
+  return 1;
+ return 0;
+}
+static void ccmp_special_blocks(struct sk_buff *skb, u8 *pn, u8 *scratch, int encrypted)
+{
+ u16 mask_fc;
+ u8 a4_included=0, mgmt=0;
+ u8 qos_tid;
+ u8 *b_0, *aad;
+ u16 data_len, len_a;
+ unsigned int hdrlen;
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+ mask_fc = hdr->frame_control;
+ b_0 = scratch + 3 * AES_BLOCK_LEN;
+ aad = scratch + 4 * AES_BLOCK_LEN;
+ if((mask_fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
+  mgmt = 1;
+ else
+  mgmt = 0;
+ mask_fc &= ~IEEE80211_FCTL_RETRY;
+ mask_fc &= ~IEEE80211_FCTL_PM;
+ mask_fc &= ~IEEE80211_FCTL_MOREDATA;
+ if (!mgmt)
+  mask_fc &= ~0x0070;
+ hdrlen = ieee80211_hdrlen(hdr->frame_control);
+ len_a = hdrlen - 2;
+ if( (mask_fc & (IEEE80211_FCTL_FROMDS|IEEE80211_FCTL_TODS)) == (IEEE80211_FCTL_FROMDS|IEEE80211_FCTL_TODS))
+  a4_included = 1;
+ else
+  a4_included = 0;
+ if (ieee80211_is_data_qos(hdr->frame_control))
+  qos_tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK;
+ else
+  qos_tid = 0;
+#if 0
+ if ((mask_fc & (IEEE80211_FCTL_FTYPE | IEEE80211_STYPE_QOS_DATA)) == (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA))
+ {
+  if(a4_included)
+   qos_tid = (*((u8 *)ppkt + ppkt->hdr_offset+30)) & IEEE80211_QOS_CTL_TID_MASK;
+  else
+   qos_tid = (*((u8 *)ppkt + ppkt->hdr_offset+24)) & IEEE80211_QOS_CTL_TID_MASK;
+ }
+ else
+  qos_tid = 0;
+#endif
+ data_len = skb->len - hdrlen;
+ if (encrypted)
+ {
+  data_len -= CCMP_MIC_LEN;
+  data_len -= CCMP_HDR_LEN;
+ }
+ b_0[0] = 0x59;
+ b_0[1] = qos_tid | (mgmt << 4);
+ memcpy(&b_0[2], hdr->addr2, ETH_ALEN);
+ memcpy(&b_0[8], pn, CCMP_PN_LEN);
+ put_unaligned_be16(data_len, &b_0[14]);
+ put_unaligned_be16(len_a, &aad[0]);
+ put_unaligned(mask_fc, (__le16 *)&aad[2]);
+ memcpy(&aad[4], &hdr->addr1, 3 * ETH_ALEN);
+ aad[22] = *((u8 *) &hdr->seq_ctrl) & 0x0f;
+ aad[23] = 0;
+ if (a4_included) {
+  memcpy(&aad[24], hdr->addr4, ETH_ALEN);
+  aad[30] = qos_tid;
+  aad[31] = 0;
+ } else {
+  memset(&aad[24], 0, ETH_ALEN + IEEE80211_QOS_CTL_LEN);
+  aad[24] = qos_tid;
+ }
+}
+static void ccmp_pn2hdr(u8 *hdr, int key_id, u8 *pn)
+{
+#if 0
+ hdr[0] = pn[0];
+ hdr[1] = pn[1];
+ hdr[2] = 0;
+ hdr[3] = 0x20 | (key_id << 6);
+ hdr[4] = pn[2];
+ hdr[5] = pn[3];
+ hdr[6] = pn[4];
+ hdr[7] = pn[5];
+#endif
+    hdr[0] = pn[5];
+    hdr[1] = pn[4];
+    hdr[2] = 0;
+    hdr[3] = 0x20 | (key_id << 6);
+    hdr[4] = pn[3];
+    hdr[5] = pn[2];
+    hdr[6] = pn[1];
+    hdr[7] = pn[0];
+}
+#if 0
+static void ccmp_hdr2pn(u8 *hdr, u8 *pn)
+{
+ pn[0] = hdr[0];
+ pn[1] = hdr[1];
+ pn[2] = hdr[4];
+ pn[3] = hdr[5];
+ pn[4] = hdr[6];
+ pn[5] = hdr[7];
+}
+#endif
+int ieee80211_crypto_ccmp_encrypt(struct sk_buff *skb, u8 *key, u8 keyidx, u8 *tx_pn)
+{
+ u8 *data;
+ u32 data_len;
+ u8 crypto_buf[6 * AES_BLOCK_LEN];
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+    u32 hdrlen = ieee80211_hdrlen(hdr->frame_control);
+    u64 pn64;
+    u8 pn[6];
+    data_len = skb->len - hdrlen;
+ data = ((u8*)skb->data)+hdrlen;
+#ifdef SECURITY_DUMP
+ fpga_dump(ppkt,"case-",key,16,0);
+#endif
+#if PRINT_DEBUG
+ printk("CCMP encrypt: PN =             0x%02x%02x%02x%02x%02x%02x\n",tx_pn[5],tx_pn[4],tx_pn[3],tx_pn[2],tx_pn[1],tx_pn[0]);
+#endif
+    hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
+#if 0
+ frame = (u16*)((u8 *)ppkt + ppkt->hdr_offset);
+ *frame |= IEEE80211_FCTL_PROTECTED;
+#endif
+ pn64 = (*(u64*)tx_pn)++;
+ pn[5] = pn64;
+ pn[4] = pn64 >> 8;
+ pn[3] = pn64 >> 16;
+ pn[2] = pn64 >> 24;
+ pn[1] = pn64 >> 32;
+ pn[0] = pn64 >> 40;
+    ccmp_special_blocks(skb, pn, crypto_buf, 0);
+    data = skb_push(skb, CCMP_HDR_LEN);
+ memmove(data, data + CCMP_HDR_LEN, hdrlen);
+ ccmp_pn2hdr(data+hdrlen, keyidx, pn);
+ ieee80211_aes_ccm_encrypt(crypto_buf ,key , data+CCMP_HDR_LEN+hdrlen , data_len, skb_put(skb, CCMP_MIC_LEN));
+#ifdef SECURITY_DUMP
+ fpga_dump(ppkt,"case-",key,16,1);
+#endif
+ return true;
+}
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_tkip.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_tkip.c
new file mode 100644
index 0000000000000..709ad3c870a27
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_tkip.c
@@ -0,0 +1,786 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/scatterlist.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/mm.h>
+#include <linux/if_ether.h>
+#include <linux/if_arp.h>
+#include <asm/string.h>
+#include <linux/version.h>
+#include <linux/wireless.h>
+#include <linux/ieee80211.h>
+#include <net/iw_handler.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+#include <crypto/hash.h>
+#include <crypto/skcipher.h>
+#else
+#include <linux/crypto.h>
+#endif
+#include <linux/crc32.h>
+#include <net/lib80211.h>
+#include "sec.h"
+#define TKIP_HDR_LEN 8
+struct lib80211_tkip_data {
+ u8 key[TKIP_KEY_LEN];
+ int key_set;
+ u32 tx_iv32;
+ u16 tx_iv16;
+ u16 tx_ttak[5];
+ int tx_phase1_done;
+ u32 rx_iv32;
+ u16 rx_iv16;
+ u16 rx_ttak[5];
+ int rx_phase1_done;
+ u32 rx_iv32_new;
+ u16 rx_iv16_new;
+ u32 dot11RSNAStatsTKIPReplays;
+ u32 dot11RSNAStatsTKIPICVErrors;
+ u32 dot11RSNAStatsTKIPLocalMICFailures;
+ int key_idx;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ struct crypto_skcipher *rx_tfm_arc4;
+ struct crypto_ahash *rx_tfm_michael;
+ struct crypto_skcipher *tx_tfm_arc4;
+ struct crypto_ahash *tx_tfm_michael;
+#else
+ struct crypto_blkcipher *rx_tfm_arc4;
+ struct crypto_hash *rx_tfm_michael;
+ struct crypto_blkcipher *tx_tfm_arc4;
+ struct crypto_hash *tx_tfm_michael;
+#endif
+ u8 rx_hdr[16], tx_hdr[16];
+ unsigned long flags;
+};
+static unsigned long lib80211_tkip_set_flags(unsigned long flags, void *priv)
+{
+ struct lib80211_tkip_data *_priv = priv;
+ unsigned long old_flags = _priv->flags;
+ _priv->flags = flags;
+ return old_flags;
+}
+static unsigned long lib80211_tkip_get_flags(void *priv)
+{
+ struct lib80211_tkip_data *_priv = priv;
+ return _priv->flags;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+static void *lib80211_tkip_init(int key_idx)
+{
+ struct lib80211_tkip_data *priv;
+ priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
+ if (priv == NULL)
+  goto fail;
+ priv->key_idx = key_idx;
+ priv->tx_tfm_arc4 = crypto_alloc_skcipher("ecb(arc4)", 0,
+        CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->tx_tfm_arc4)) {
+  priv->tx_tfm_arc4 = NULL;
+  goto fail;
+ }
+ priv->tx_tfm_michael = crypto_alloc_ahash("michael_mic", 0,
+        CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->tx_tfm_michael)) {
+  priv->tx_tfm_michael = NULL;
+  goto fail;
+ }
+ priv->rx_tfm_arc4 = crypto_alloc_skcipher("ecb(arc4)", 0,
+        CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->rx_tfm_arc4)) {
+  priv->rx_tfm_arc4 = NULL;
+  goto fail;
+ }
+ priv->rx_tfm_michael = crypto_alloc_ahash("michael_mic", 0,
+        CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->rx_tfm_michael)) {
+  priv->rx_tfm_michael = NULL;
+  goto fail;
+ }
+ return priv;
+      fail:
+ if (priv) {
+  crypto_free_ahash(priv->tx_tfm_michael);
+  crypto_free_skcipher(priv->tx_tfm_arc4);
+  crypto_free_ahash(priv->rx_tfm_michael);
+  crypto_free_skcipher(priv->rx_tfm_arc4);
+  kfree(priv);
+ }
+ return NULL;
+}
+#else
+static void *lib80211_tkip_init(int key_idx)
+{
+ struct lib80211_tkip_data *priv;
+ priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
+ if (priv == NULL)
+  goto fail;
+ priv->key_idx = key_idx;
+ priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
+      CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->tx_tfm_arc4)) {
+  priv->tx_tfm_arc4 = NULL;
+  goto fail;
+ }
+ priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
+       CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->tx_tfm_michael)) {
+  priv->tx_tfm_michael = NULL;
+  goto fail;
+ }
+ priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
+      CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->rx_tfm_arc4)) {
+  priv->rx_tfm_arc4 = NULL;
+  goto fail;
+ }
+ priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
+       CRYPTO_ALG_ASYNC);
+ if (IS_ERR(priv->rx_tfm_michael)) {
+  priv->rx_tfm_michael = NULL;
+  goto fail;
+ }
+ return priv;
+      fail:
+ if (priv) {
+  if (priv->tx_tfm_michael)
+   crypto_free_hash(priv->tx_tfm_michael);
+  if (priv->tx_tfm_arc4)
+   crypto_free_blkcipher(priv->tx_tfm_arc4);
+  if (priv->rx_tfm_michael)
+   crypto_free_hash(priv->rx_tfm_michael);
+  if (priv->rx_tfm_arc4)
+   crypto_free_blkcipher(priv->rx_tfm_arc4);
+  kfree(priv);
+ }
+ return NULL;
+}
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+static void lib80211_tkip_deinit(void *priv)
+{
+ struct lib80211_tkip_data *_priv = priv;
+ if (_priv) {
+  crypto_free_ahash(_priv->tx_tfm_michael);
+  crypto_free_skcipher(_priv->tx_tfm_arc4);
+  crypto_free_ahash(_priv->rx_tfm_michael);
+  crypto_free_skcipher(_priv->rx_tfm_arc4);
+ }
+ kfree(priv);
+}
+#else
+static void lib80211_tkip_deinit(void *priv)
+{
+ struct lib80211_tkip_data *_priv = priv;
+ if (_priv) {
+  if (_priv->tx_tfm_michael)
+   crypto_free_hash(_priv->tx_tfm_michael);
+  if (_priv->tx_tfm_arc4)
+   crypto_free_blkcipher(_priv->tx_tfm_arc4);
+  if (_priv->rx_tfm_michael)
+   crypto_free_hash(_priv->rx_tfm_michael);
+  if (_priv->rx_tfm_arc4)
+   crypto_free_blkcipher(_priv->rx_tfm_arc4);
+ }
+ kfree(priv);
+}
+#endif
+static inline u16 RotR1(u16 val)
+{
+ return (val >> 1) | (val << 15);
+}
+static inline u8 Lo8(u16 val)
+{
+ return val & 0xff;
+}
+static inline u8 Hi8(u16 val)
+{
+ return val >> 8;
+}
+static inline u16 Lo16(u32 val)
+{
+ return val & 0xffff;
+}
+static inline u16 Hi16(u32 val)
+{
+ return val >> 16;
+}
+static inline u16 Mk16(u8 hi, u8 lo)
+{
+ return lo | (((u16) hi) << 8);
+}
+static inline u16 Mk16_le(__le16 * v)
+{
+ return le16_to_cpu(*v);
+}
+static const u16 Sbox[256] = {
+ 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
+ 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
+ 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
+ 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
+ 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
+ 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
+ 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
+ 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
+ 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
+ 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
+ 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
+ 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
+ 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
+ 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
+ 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
+ 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
+ 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
+ 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
+ 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
+ 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
+ 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
+ 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
+ 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
+ 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
+ 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
+ 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
+ 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
+ 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
+ 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
+ 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
+ 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
+ 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
+};
+static inline u16 _S_(u16 v)
+{
+ u16 t = Sbox[Hi8(v)];
+ return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
+}
+#define PHASE1_LOOP_COUNT 8
+static void tkip_mixing_phase1(u16 * TTAK, const u8 * TK, const u8 * TA,
+          u32 IV32)
+{
+ int i, j;
+ TTAK[0] = Lo16(IV32);
+ TTAK[1] = Hi16(IV32);
+ TTAK[2] = Mk16(TA[1], TA[0]);
+ TTAK[3] = Mk16(TA[3], TA[2]);
+ TTAK[4] = Mk16(TA[5], TA[4]);
+ for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
+  j = 2 * (i & 1);
+  TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
+  TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
+  TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
+  TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
+  TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
+ }
+}
+static void tkip_mixing_phase2(u8 * WEPSeed, const u8 * TK, const u16 * TTAK,
+          u16 IV16)
+{
+ u16 *PPK = (u16 *) & WEPSeed[4];
+ PPK[0] = TTAK[0];
+ PPK[1] = TTAK[1];
+ PPK[2] = TTAK[2];
+ PPK[3] = TTAK[3];
+ PPK[4] = TTAK[4];
+ PPK[5] = TTAK[4] + IV16;
+ PPK[0] += _S_(PPK[5] ^ Mk16_le((__le16 *) & TK[0]));
+ PPK[1] += _S_(PPK[0] ^ Mk16_le((__le16 *) & TK[2]));
+ PPK[2] += _S_(PPK[1] ^ Mk16_le((__le16 *) & TK[4]));
+ PPK[3] += _S_(PPK[2] ^ Mk16_le((__le16 *) & TK[6]));
+ PPK[4] += _S_(PPK[3] ^ Mk16_le((__le16 *) & TK[8]));
+ PPK[5] += _S_(PPK[4] ^ Mk16_le((__le16 *) & TK[10]));
+ PPK[0] += RotR1(PPK[5] ^ Mk16_le((__le16 *) & TK[12]));
+ PPK[1] += RotR1(PPK[0] ^ Mk16_le((__le16 *) & TK[14]));
+ PPK[2] += RotR1(PPK[1]);
+ PPK[3] += RotR1(PPK[2]);
+ PPK[4] += RotR1(PPK[3]);
+ PPK[5] += RotR1(PPK[4]);
+ WEPSeed[0] = Hi8(IV16);
+ WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
+ WEPSeed[2] = Lo8(IV16);
+ WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((__le16 *) & TK[0])) >> 1);
+#ifdef __BIG_ENDIAN
+ {
+  int i;
+  for (i = 0; i < 6; i++)
+   PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
+ }
+#endif
+}
+static int lib80211_tkip_hdr(struct sk_buff *skb, int hdr_len,
+         u8 * rc4key, int keylen, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+ u8 *pos;
+ struct ieee80211_hdr *hdr;
+ hdr = (struct ieee80211_hdr *)skb->data;
+ if (skb_headroom(skb) < TKIP_HDR_LEN || skb->len < hdr_len)
+  return -1;
+ if (rc4key == NULL || keylen < 16)
+  return -1;
+ if (!tkey->tx_phase1_done) {
+  tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
+       tkey->tx_iv32);
+  tkey->tx_phase1_done = 1;
+ }
+ tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
+ pos = skb_push(skb, TKIP_HDR_LEN);
+ memmove(pos, pos + TKIP_HDR_LEN, hdr_len);
+ pos += hdr_len;
+ *pos++ = *rc4key;
+ *pos++ = *(rc4key + 1);
+ *pos++ = *(rc4key + 2);
+ *pos++ = (tkey->key_idx << 6) | (1 << 5) ;
+ *pos++ = tkey->tx_iv32 & 0xff;
+ *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
+ *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
+ *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
+ tkey->tx_iv16++;
+ if (tkey->tx_iv16 == 0) {
+  tkey->tx_phase1_done = 0;
+  tkey->tx_iv32++;
+ }
+ return TKIP_HDR_LEN;
+}
+static int lib80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ SKCIPHER_REQUEST_ON_STACK(req, tkey->tx_tfm_arc4);
+ int err;
+#else
+ struct blkcipher_desc desc = { .tfm = tkey->tx_tfm_arc4 };
+#endif
+ int len;
+ u8 rc4key[16], *pos, *icv;
+ u32 crc;
+ struct scatterlist sg;
+ if (tkey->flags & IEEE80211_CRYPTO_TKIP_COUNTERMEASURES) {
+  if (net_ratelimit()) {
+   struct ieee80211_hdr *hdr =
+       (struct ieee80211_hdr *)skb->data;
+   printk(KERN_DEBUG ": TKIP countermeasures: dropped "
+          "TX packet to %pM\n", hdr->addr1);
+  }
+  return -1;
+ }
+ if (skb_tailroom(skb) < 4 || skb->len < hdr_len)
+  return -1;
+ len = skb->len - hdr_len;
+ pos = skb->data + hdr_len;
+ if ((lib80211_tkip_hdr(skb, hdr_len, rc4key, 16, priv)) < 0)
+  return -1;
+ crc = ~crc32_le(~0, pos, len);
+ icv = skb_put(skb, 4);
+ icv[0] = crc;
+ icv[1] = crc >> 8;
+ icv[2] = crc >> 16;
+ icv[3] = crc >> 24;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ crypto_skcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
+ sg_init_one(&sg, pos, len + 4);
+ skcipher_request_set_tfm(req, tkey->tx_tfm_arc4);
+ skcipher_request_set_callback(req, 0, NULL, NULL);
+ skcipher_request_set_crypt(req, &sg, &sg, len + 4, NULL);
+ err = crypto_skcipher_encrypt(req);
+ skcipher_request_zero(req);
+ return err;
+#else
+ crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
+ sg_init_one(&sg, pos, len + 4);
+ return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
+#endif
+}
+static inline int tkip_replay_check(u32 iv32_n, u16 iv16_n,
+        u32 iv32_o, u16 iv16_o)
+{
+ if ((s32)iv32_n - (s32)iv32_o < 0 ||
+     (iv32_n == iv32_o && iv16_n <= iv16_o))
+  return 1;
+ return 0;
+}
+static int lib80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ SKCIPHER_REQUEST_ON_STACK(req, tkey->rx_tfm_arc4);
+ int err;
+#else
+ struct blkcipher_desc desc = { .tfm = tkey->rx_tfm_arc4 };
+#endif
+ u8 rc4key[16];
+ u8 keyidx, *pos;
+ u32 iv32;
+ u16 iv16;
+ struct ieee80211_hdr *hdr;
+ u8 icv[4];
+ u32 crc;
+ struct scatterlist sg;
+ int plen;
+ hdr = (struct ieee80211_hdr *)skb->data;
+ if (tkey->flags & IEEE80211_CRYPTO_TKIP_COUNTERMEASURES) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG ": TKIP countermeasures: dropped "
+          "received packet from %pM\n", hdr->addr2);
+  }
+  return -1;
+ }
+ if (skb->len < hdr_len + TKIP_HDR_LEN + 4)
+  return -1;
+ pos = skb->data + hdr_len;
+ keyidx = pos[3];
+ if (!(keyidx & (1 << 5))) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "TKIP: received packet without ExtIV"
+          " flag from %pM\n", hdr->addr2);
+  }
+  return -2;
+ }
+ keyidx >>= 6;
+ if (tkey->key_idx != keyidx) {
+  printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
+         "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
+  return -6;
+ }
+ if (!tkey->key_set) {
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "TKIP: received packet from %pM"
+          " with keyid=%d that does not have a configured"
+          " key\n", hdr->addr2, keyidx);
+  }
+  return -3;
+ }
+ iv16 = (pos[0] << 8) | pos[2];
+ iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
+ pos += TKIP_HDR_LEN;
+ if (tkip_replay_check(iv32, iv16, tkey->rx_iv32, tkey->rx_iv16)) {
+#ifdef CONFIG_LIB80211_DEBUG
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
+          " previous TSC %08x%04x received TSC "
+          "%08x%04x\n", hdr->addr2,
+          tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
+  }
+#endif
+  tkey->dot11RSNAStatsTKIPReplays++;
+  return -4;
+ }
+ if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
+  tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
+  tkey->rx_phase1_done = 1;
+ }
+ tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
+ plen = skb->len - hdr_len - 12;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ crypto_skcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
+ sg_init_one(&sg, pos, plen + 4);
+ skcipher_request_set_tfm(req, tkey->rx_tfm_arc4);
+ skcipher_request_set_callback(req, 0, NULL, NULL);
+ skcipher_request_set_crypt(req, &sg, &sg, plen + 4, NULL);
+ err = crypto_skcipher_decrypt(req);
+ skcipher_request_zero(req);
+ if (err) {
+#else
+ crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
+ sg_init_one(&sg, pos, plen + 4);
+ if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
+#endif
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG ": TKIP: failed to decrypt "
+          "received packet from %pM\n",
+          hdr->addr2);
+  }
+  return -7;
+ }
+ crc = ~crc32_le(~0, pos, plen);
+ icv[0] = crc;
+ icv[1] = crc >> 8;
+ icv[2] = crc >> 16;
+ icv[3] = crc >> 24;
+ if (memcmp(icv, pos + plen, 4) != 0) {
+  if (iv32 != tkey->rx_iv32) {
+   tkey->rx_phase1_done = 0;
+  }
+#ifdef CONFIG_LIB80211_DEBUG
+  if (net_ratelimit()) {
+   printk(KERN_DEBUG "TKIP: ICV error detected: STA="
+          "%pM\n", hdr->addr2);
+  }
+#endif
+  tkey->dot11RSNAStatsTKIPICVErrors++;
+  return -5;
+ }
+ tkey->rx_iv32_new = iv32;
+ tkey->rx_iv16_new = iv16;
+ memmove(skb->data + TKIP_HDR_LEN, skb->data, hdr_len);
+ skb_pull(skb, TKIP_HDR_LEN);
+ skb_trim(skb, skb->len - 4);
+ return keyidx;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+static int michael_mic(struct crypto_ahash *tfm_michael, u8 * key, u8 * hdr,
+         u8 * data, size_t data_len, u8 * mic)
+{
+ AHASH_REQUEST_ON_STACK(req, tfm_michael);
+ struct scatterlist sg[2];
+ int err;
+ if (tfm_michael == NULL) {
+  pr_warn("%s(): tfm_michael == NULL\n", __func__);
+  return -1;
+ }
+ sg_init_table(sg, 2);
+ sg_set_buf(&sg[0], hdr, 16);
+ sg_set_buf(&sg[1], data, data_len);
+ if (crypto_ahash_setkey(tfm_michael, key, 8))
+  return -1;
+ ahash_request_set_tfm(req, tfm_michael);
+ ahash_request_set_callback(req, 0, NULL, NULL);
+ ahash_request_set_crypt(req, sg, mic, data_len + 16);
+ err = crypto_ahash_digest(req);
+ ahash_request_zero(req);
+ return err;
+}
+#else
+static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
+         u8 * data, size_t data_len, u8 * mic)
+{
+ struct hash_desc desc;
+ struct scatterlist sg[2];
+ if (tfm_michael == NULL) {
+  pr_warn("%s(): tfm_michael == NULL\n", __func__);
+  return -1;
+ }
+ sg_init_table(sg, 2);
+ sg_set_buf(&sg[0], hdr, 16);
+ sg_set_buf(&sg[1], data, data_len);
+ if (crypto_hash_setkey(tfm_michael, key, 8))
+  return -1;
+ desc.tfm = tfm_michael;
+ desc.flags = 0;
+ return crypto_hash_digest(&desc, sg, data_len + 16, mic);
+}
+#endif
+static void michael_mic_hdr(struct sk_buff *skb, u8 * hdr)
+{
+ struct ieee80211_hdr *hdr11;
+ hdr11 = (struct ieee80211_hdr *)skb->data;
+ switch (le16_to_cpu(hdr11->frame_control) &
+  (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
+ case IEEE80211_FCTL_TODS:
+  memcpy(hdr, hdr11->addr3, ETH_ALEN);
+  memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN);
+  break;
+ case IEEE80211_FCTL_FROMDS:
+  memcpy(hdr, hdr11->addr1, ETH_ALEN);
+  memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN);
+  break;
+ case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
+  memcpy(hdr, hdr11->addr3, ETH_ALEN);
+  memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN);
+  break;
+ case 0:
+  memcpy(hdr, hdr11->addr1, ETH_ALEN);
+  memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN);
+  break;
+ }
+ if (ieee80211_is_data_qos(hdr11->frame_control)) {
+  hdr[12] = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(hdr11)))
+   & IEEE80211_QOS_CTL_TID_MASK;
+ } else
+  hdr[12] = 0;
+ hdr[13] = hdr[14] = hdr[15] = 0;
+}
+static int lib80211_michael_mic_add(struct sk_buff *skb, int hdr_len,
+         void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+ u8 *pos;
+ if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
+  printk(KERN_DEBUG "Invalid packet for Michael MIC add "
+         "(tailroom=%d hdr_len=%d skb->len=%d)\n",
+         skb_tailroom(skb), hdr_len, skb->len);
+  return -1;
+ }
+ michael_mic_hdr(skb, tkey->tx_hdr);
+ pos = skb_put(skb, 8);
+ if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
+   skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
+  return -1;
+ return 0;
+}
+#ifdef CONFIG_WEXT_CORE
+static void lib80211_michael_mic_failure(struct net_device *dev,
+       struct ieee80211_hdr *hdr,
+       int keyidx)
+{
+ union iwreq_data wrqu;
+ struct iw_michaelmicfailure ev;
+ memset(&ev, 0, sizeof(ev));
+ ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
+ if (hdr->addr1[0] & 0x01)
+  ev.flags |= IW_MICFAILURE_GROUP;
+ else
+  ev.flags |= IW_MICFAILURE_PAIRWISE;
+ ev.src_addr.sa_family = ARPHRD_ETHER;
+ memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
+ memset(&wrqu, 0, sizeof(wrqu));
+ wrqu.data.length = sizeof(ev);
+ wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *)&ev);
+}
+#endif
+static int lib80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
+     int hdr_len, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+ u8 mic[8];
+ if (!tkey->key_set)
+  return -1;
+ michael_mic_hdr(skb, tkey->rx_hdr);
+ if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
+   skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
+  return -1;
+ if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
+  struct ieee80211_hdr *hdr;
+  hdr = (struct ieee80211_hdr *)skb->data;
+  printk(KERN_DEBUG "%s: Michael MIC verification failed for "
+         "MSDU from %pM keyidx=%d\n",
+         skb->dev ? skb->dev->name : "N/A", hdr->addr2,
+         keyidx);
+#ifdef CONFIG_WEXT_CORE
+  if (skb->dev)
+   lib80211_michael_mic_failure(skb->dev, hdr, keyidx);
+#endif
+  tkey->dot11RSNAStatsTKIPLocalMICFailures++;
+  return -1;
+ }
+ tkey->rx_iv32 = tkey->rx_iv32_new;
+ tkey->rx_iv16 = tkey->rx_iv16_new;
+ skb_trim(skb, skb->len - 8);
+ return 0;
+}
+static int lib80211_tkip_set_key(void *key, int len, u8 * seq, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+ int keyidx;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
+ struct crypto_ahash *tfm = tkey->tx_tfm_michael;
+ struct crypto_skcipher *tfm2 = tkey->tx_tfm_arc4;
+ struct crypto_ahash *tfm3 = tkey->rx_tfm_michael;
+ struct crypto_skcipher *tfm4 = tkey->rx_tfm_arc4;
+#else
+ struct crypto_hash *tfm = tkey->tx_tfm_michael;
+ struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
+ struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
+ struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
+#endif
+ keyidx = tkey->key_idx;
+ memset(tkey, 0, sizeof(*tkey));
+ tkey->key_idx = keyidx;
+ tkey->tx_tfm_michael = tfm;
+ tkey->tx_tfm_arc4 = tfm2;
+ tkey->rx_tfm_michael = tfm3;
+ tkey->rx_tfm_arc4 = tfm4;
+ if (len == TKIP_KEY_LEN) {
+  memcpy(tkey->key, key, TKIP_KEY_LEN);
+  tkey->key_set = 1;
+  tkey->tx_iv16 = 1;
+  if (seq) {
+   tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
+       (seq[3] << 8) | seq[2];
+   tkey->rx_iv16 = (seq[1] << 8) | seq[0];
+  }
+ } else if (len == 0)
+  tkey->key_set = 0;
+ else
+  return -1;
+ return 0;
+}
+static int lib80211_tkip_get_key(void *key, int len, u8 * seq, void *priv)
+{
+ struct lib80211_tkip_data *tkey = priv;
+ if (len < TKIP_KEY_LEN)
+  return -1;
+ if (!tkey->key_set)
+  return 0;
+ memcpy(key, tkey->key, TKIP_KEY_LEN);
+ if (seq) {
+  u16 iv16 = tkey->tx_iv16;
+  u32 iv32 = tkey->tx_iv32;
+  if (iv16 == 0)
+   iv32--;
+  iv16--;
+  seq[0] = tkey->tx_iv16;
+  seq[1] = tkey->tx_iv16 >> 8;
+  seq[2] = tkey->tx_iv32;
+  seq[3] = tkey->tx_iv32 >> 8;
+  seq[4] = tkey->tx_iv32 >> 16;
+  seq[5] = tkey->tx_iv32 >> 24;
+ }
+ return TKIP_KEY_LEN;
+}
+static char *lib80211_tkip_print_stats(char *p, void *priv)
+{
+ struct lib80211_tkip_data *tkip = priv;
+ p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
+       "tx_pn=%02x%02x%02x%02x%02x%02x "
+       "rx_pn=%02x%02x%02x%02x%02x%02x "
+       "replays=%d icv_errors=%d local_mic_failures=%d\n",
+       tkip->key_idx, tkip->key_set,
+       (tkip->tx_iv32 >> 24) & 0xff,
+       (tkip->tx_iv32 >> 16) & 0xff,
+       (tkip->tx_iv32 >> 8) & 0xff,
+       tkip->tx_iv32 & 0xff,
+       (tkip->tx_iv16 >> 8) & 0xff,
+       tkip->tx_iv16 & 0xff,
+       (tkip->rx_iv32 >> 24) & 0xff,
+       (tkip->rx_iv32 >> 16) & 0xff,
+       (tkip->rx_iv32 >> 8) & 0xff,
+       tkip->rx_iv32 & 0xff,
+       (tkip->rx_iv16 >> 8) & 0xff,
+       tkip->rx_iv16 & 0xff,
+       tkip->dot11RSNAStatsTKIPReplays,
+       tkip->dot11RSNAStatsTKIPICVErrors,
+       tkip->dot11RSNAStatsTKIPLocalMICFailures);
+ return p;
+}
+static struct ssv_crypto_ops ssv_crypt_tkip = {
+ .name = "TKIP",
+ .init = lib80211_tkip_init,
+ .deinit = lib80211_tkip_deinit,
+ .encrypt_mpdu = lib80211_tkip_encrypt,
+ .decrypt_mpdu = lib80211_tkip_decrypt,
+ .encrypt_msdu = lib80211_michael_mic_add,
+ .decrypt_msdu = lib80211_michael_mic_verify,
+ .set_key = lib80211_tkip_set_key,
+ .get_key = lib80211_tkip_get_key,
+ .print_stats = lib80211_tkip_print_stats,
+ .extra_mpdu_prefix_len = 4 + 4,
+ .extra_mpdu_postfix_len = 4,
+ .extra_msdu_postfix_len = 8,
+ .get_flags = lib80211_tkip_get_flags,
+ .set_flags = lib80211_tkip_set_flags,
+#ifdef MULTI_THREAD_ENCRYPT
+ .encrypt_prepare = NULL,
+    .decrypt_prepare = NULL,
+#endif
+};
+struct ssv_crypto_ops *get_crypto_tkip_ops(void)
+{
+    return &ssv_crypt_tkip;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wep.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wep.c
new file mode 100644
index 0000000000000..dfa68a8f48bc3
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wep.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/scatterlist.h>
+#include <linux/skbuff.h>
+#include <linux/mm.h>
+#include <asm/string.h>
+#include <net/lib80211.h>
+#include <linux/crypto.h>
+#include <linux/crc32.h>
+#include "sec.h"
+struct lib80211_wep_data
+{
+    u32 iv;
+    u8 key[WEP_KEY_LEN + 1];
+    u8 key_len;
+    u8 key_idx;
+    struct crypto_blkcipher *tx_tfm;
+    struct crypto_blkcipher *rx_tfm;
+};
+static void *lib80211_wep_init (int keyidx)
+{
+    struct lib80211_wep_data *priv;
+    priv = kzalloc (sizeof (*priv), GFP_ATOMIC);
+    if (priv == NULL)
+        goto fail;
+    priv->key_idx = keyidx;
+    priv->tx_tfm = crypto_alloc_blkcipher ("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
+    if (IS_ERR (priv->tx_tfm))
+    {
+        priv->tx_tfm = NULL;
+        goto fail;
+    }
+    priv->rx_tfm = crypto_alloc_blkcipher ("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
+    if (IS_ERR (priv->rx_tfm))
+    {
+        priv->rx_tfm = NULL;
+        goto fail;
+    }
+    get_random_bytes (&priv->iv, 4);
+    return priv;
+fail:
+    if (priv)
+    {
+        if (priv->tx_tfm)
+            crypto_free_blkcipher (priv->tx_tfm);
+        if (priv->rx_tfm)
+            crypto_free_blkcipher (priv->rx_tfm);
+        kfree (priv);
+    }
+    return NULL;
+}
+static void lib80211_wep_deinit (void *priv)
+{
+    struct lib80211_wep_data *_priv = priv;
+    if (_priv)
+    {
+        if (_priv->tx_tfm)
+            crypto_free_blkcipher (_priv->tx_tfm);
+        if (_priv->rx_tfm)
+            crypto_free_blkcipher (_priv->rx_tfm);
+    }
+    kfree (priv);
+}
+static int lib80211_wep_build_iv (struct sk_buff *skb, int hdr_len,
+                                  u8 *key, int keylen, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    u32 klen;
+    u8 *pos;
+    if (skb_headroom (skb) < 4 || skb->len < hdr_len)
+        return -1;
+    pos = skb_push (skb, 4);
+    memmove (pos, pos + 4, hdr_len);
+    pos += hdr_len;
+    klen = 3 + wep->key_len;
+    wep->iv++;
+    if ((wep->iv & 0xff00) == 0xff00)
+    {
+        u8 B = (wep->iv >> 16) & 0xff;
+        if (B >= 3 && B < klen)
+            wep->iv += 0x0100;
+    }
+    *pos++ = (wep->iv >> 16) & 0xff;
+    *pos++ = (wep->iv >> 8) & 0xff;
+    *pos++ = wep->iv & 0xff;
+    *pos++ = wep->key_idx << 6;
+    return 0;
+}
+static int lib80211_wep_encrypt (struct sk_buff *skb, int hdr_len, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
+    u32 crc, klen, len;
+    u8 *pos, *icv;
+    struct scatterlist sg;
+    u8 key[WEP_KEY_LEN + 3];
+    if (skb_tailroom (skb) < 4)
+    {
+        printk("####%s: too few tailroom\n", __FUNCTION__);
+        return -1;
+    }
+    if (lib80211_wep_build_iv (skb, hdr_len, NULL, 0, priv))
+    {
+        printk("####%s: build iv failure\n", __FUNCTION__);
+        return -1;
+    }
+    skb_copy_from_linear_data_offset (skb, hdr_len, key, 3);
+    memcpy (key + 3, wep->key, wep->key_len);
+    len = skb->len - hdr_len - 4;
+    pos = skb->data + hdr_len + 4;
+    klen = 3 + wep->key_len;
+    crc = ~crc32_le (~0, pos, len);
+    icv = skb_put (skb, 4);
+    icv[0] = crc;
+    icv[1] = crc >> 8;
+    icv[2] = crc >> 16;
+    icv[3] = crc >> 24;
+    crypto_blkcipher_setkey (wep->tx_tfm, key, klen);
+    sg_init_one (&sg, pos, len + 4);
+    return crypto_blkcipher_encrypt (&desc, &sg, &sg, len + 4);
+}
+static int lib80211_wep_decrypt (struct sk_buff *skb, int hdr_len, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
+    u32 crc, klen, plen;
+    u8 key[WEP_KEY_LEN + 3];
+    u8 keyidx, *pos, icv[4], *pos2;
+    struct scatterlist sg;
+    if (skb->len < hdr_len + 8)
+    {
+        printk ("%s::skb->len = %d\n", __FUNCTION__, skb->len);
+        return -1;
+    }
+    pos = skb->data + hdr_len;
+    key[0] = *pos++;
+    key[1] = *pos++;
+    key[2] = *pos++;
+    keyidx = *pos++ >> 6;
+    if (keyidx != wep->key_idx)
+        return -1;
+    klen = 3 + wep->key_len;
+    memcpy (key + 3, wep->key, wep->key_len);
+    plen = skb->len - hdr_len - 8;
+    crypto_blkcipher_setkey (wep->rx_tfm, key, klen);
+    sg_init_one (&sg, pos, plen + 4);
+    if (crypto_blkcipher_decrypt (&desc, &sg, &sg, plen + 4))
+        return -7;
+    crc = ~crc32_le (~0, pos, plen);
+    icv[0] = crc;
+    icv[1] = crc >> 8;
+    icv[2] = crc >> 16;
+    icv[3] = crc >> 24;
+    pos2 = (pos + plen);
+    if (memcmp (icv, pos + plen, 4) != 0)
+    {
+        return -2;
+    }
+    memmove (skb->data + 4, skb->data, hdr_len);
+    skb_pull (skb, 4);
+    skb_trim (skb, skb->len - 4);
+    return 0;
+}
+static int lib80211_wep_set_key (void *key, int len, u8 * seq, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    if (len < 0 || len > WEP_KEY_LEN)
+        return -1;
+    memcpy (wep->key, key, len);
+    wep->key_len = len;
+    return 0;
+}
+static int lib80211_wep_get_key (void *key, int len, u8 * seq, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    if (len < wep->key_len)
+        return -1;
+    memcpy (key, wep->key, wep->key_len);
+    return wep->key_len;
+}
+static char *lib80211_wep_print_stats (char *p, void *priv)
+{
+    struct lib80211_wep_data *wep = priv;
+    p += sprintf (p, "key[%d] alg=WEP len=%d\n", wep->key_idx, wep->key_len);
+    return p;
+}
+static struct ssv_crypto_ops ssv_crypt_wep = {
+    .name = "WEP",
+    .init = lib80211_wep_init,
+    .deinit = lib80211_wep_deinit,
+    .encrypt_mpdu = lib80211_wep_encrypt,
+    .decrypt_mpdu = lib80211_wep_decrypt,
+    .encrypt_msdu = NULL,
+    .decrypt_msdu = NULL,
+    .set_key = lib80211_wep_set_key,
+    .get_key = lib80211_wep_get_key,
+    .print_stats = lib80211_wep_print_stats,
+    .extra_mpdu_prefix_len = 4,
+    .extra_mpdu_postfix_len = 4,
+#ifdef MULTI_THREAD_ENCRYPT
+ .encrypt_prepare = NULL,
+    .decrypt_prepare = NULL,
+#endif
+};
+struct ssv_crypto_ops *get_crypto_wep_ops (void)
+{
+    return &ssv_crypt_wep;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.c
new file mode 100644
index 0000000000000..9922d2caaa44c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.c
@@ -0,0 +1,473 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <net/cfg80211.h>
+#include <net/mac80211.h>
+#include <linux/etherdevice.h>
+#include "wapi_sms4.h"
+#include "sec_wpi.h"
+#include "sec.h"
+#define IWAPIELEMENT 68
+#define WID_WAPI_KEY 0x3033
+u8 g_wapi_oui[3] = {0x00,0x14,0x72};
+const u16 frame_cntl_mask = 0x8FC7;
+const u16 seq_cntl_mask = 0x0F00;
+struct lib80211_wpi_data {
+ TRUTH_VALUE_T wapi_enable;
+ TRUTH_VALUE_T wapi_key_ok;
+ u8 wapi_version[2];
+ u8 ap_address[ETH_ALEN];
+ u8 key_index;
+ u8 pn_key[WAPI_PN_LEN];
+ u8 pmsk_key[3][WAPI_PN_LEN];
+ u8 mic_key[3][WAPI_PN_LEN];
+};
+TRUTH_VALUE_T mget_wapi_key_ok(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    return data->wapi_key_ok;
+}
+void mset_wapi_key_ok(TRUTH_VALUE_T val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    data->wapi_key_ok = val;
+}
+TRUTH_VALUE_T mget_wapi_enable(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    return data->wapi_enable;
+}
+void mset_wapi_enable(TRUTH_VALUE_T val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    data->wapi_enable = val;
+}
+u8* mget_wapi_version(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    return data->wapi_version;
+}
+void mset_wapi_version(u8* val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ memcpy(data->wapi_version,val,2);
+}
+u8* mget_wapi_address(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ return data->ap_address;
+}
+void mset_wapi_address(u8* val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ memcpy(data->ap_address,val, ETH_ALEN);
+}
+u8 mget_key_index(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ return data->key_index;
+}
+void mset_key_index(int index, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ if(index <= 3 )
+ {
+  data->key_index = index;
+ }
+}
+u8* mget_pn_key(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ return data->pn_key;
+}
+void mset_pn_key(u8* val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ memcpy(data->pn_key,val,WAPI_PN_LEN);
+}
+u8 *inc_pn_key(void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ int i;
+ data->pn_key[15] += 2;
+ if( data->pn_key[15] == 0x00 )
+ {
+  for(i = 14 ; i >= 0 ; i--)
+  {
+   if( (data->pn_key[i] += 1) != 0x00 )
+   {
+    break;
+   }
+  }
+ }
+ return data->pn_key;
+}
+u8 *mget_pmsk_key(int index, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ return ( index >= 3 ) ? NULL : data->pmsk_key[index];
+}
+void mset_pmsk_key(int index,u8* val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ if(index < 3 )
+ {
+  memcpy(data->pmsk_key[index],val, WAPI_MIC_LEN);
+ }
+}
+u8* mget_mic_key(int index, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ return ( index >= 3 ) ? NULL : data->mic_key[index];
+}
+void mset_mic_key(int index,u8* val, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+ if(index < 3 )
+ {
+  memcpy(data->mic_key[index],val,WAPI_MIC_LEN);
+ }
+}
+u16 wlan_tx_wapi_encryption(u8 * header,
+            u8 * data,u16 data_len,
+                                    u8 * mic_pos, void *priv)
+{
+ int i = 0;
+ u16 offset = 0;
+ BOOL_T qos_in = BFALSE;
+ BOOL_T valid_addr4 = BTRUE;
+ u8 ptk_header[36] = {0};
+ u16 ptk_headr_len = 32;
+ u8 *p_ptk_header = ptk_header;
+ u8 *data_mic = mic_pos;
+    u8 *iv = NULL;
+ u8 keyid = 0;
+ keyid = mget_key_index(priv);
+#ifdef MULTI_THREAD_ENCRYPT
+    iv = kzalloc(WAPI_PN_LEN, GFP_KERNEL);
+    memcpy(iv, data + WAPI_KEYID_LEN + WAPI_RESERVD_LEN, WAPI_PN_LEN);
+    data_len -= WAPI_IV_LEN;
+#else
+ iv = inc_pn_key(priv);
+#endif
+ *data = keyid;
+ *(data + 1) = 0x00;
+ data += 2;
+ for( i = 15 ; i >= 0 ; i-- ) {
+  *data = iv[i];
+  data++;
+ }
+ *p_ptk_header = header[offset] & (frame_cntl_mask >> 8);
+ *(p_ptk_header + 1) = header[offset + 1] & (frame_cntl_mask & 0xFF);
+ if(*p_ptk_header & 0x80) {
+  qos_in = BTRUE;
+  ptk_headr_len += 2;
+ }
+ if((*(p_ptk_header + 1) & 0x03 ) != 0x03) {
+  valid_addr4 = BFALSE;
+ }
+ p_ptk_header += 2;
+ offset += 2;
+ offset += 2;
+ memcpy(p_ptk_header, &header[offset], ADDID_LEN);
+ p_ptk_header += ADDID_LEN;
+ offset += ADDID_LEN;
+ *p_ptk_header = header[offset + ETH_ALEN] & (seq_cntl_mask >> 8);
+ *(p_ptk_header + 1) = header[offset + ETH_ALEN + 1] & (seq_cntl_mask & 0xFF);
+ p_ptk_header += 2;
+ memcpy(p_ptk_header, &header[offset], ETH_ALEN);
+ p_ptk_header += ETH_ALEN;
+ offset += ETH_ALEN;
+ offset += 2;
+ if(valid_addr4) {
+  memcpy(p_ptk_header, &header[offset], ETH_ALEN);
+  p_ptk_header += ETH_ALEN;
+  offset += ETH_ALEN;
+ }
+ else {
+  memset(p_ptk_header,0x00, ETH_ALEN);
+  p_ptk_header += ETH_ALEN;
+ }
+ if(qos_in) {
+  memcpy(p_ptk_header, &header[offset], 2);
+  p_ptk_header += 2;
+  offset += 2;
+ }
+ *p_ptk_header = keyid;
+ p_ptk_header++;
+ *p_ptk_header = 0x00;
+ p_ptk_header++;
+ *p_ptk_header = (data_len >> 8);
+ *(p_ptk_header+1) = data_len & 0xFF;
+ WapiCryptoSms4Mic(iv,
+                   mget_mic_key(keyid, priv),
+                   ptk_header, ptk_headr_len, data, data_len, data_mic);
+ data_len += WAPI_MIC_LEN;
+ WapiCryptoSms4(iv,
+       mget_pmsk_key(keyid, priv),
+       data, data_len,
+                data);
+#ifdef MULTI_THREAD_ENCRYPT
+    kfree(iv);
+#endif
+ return data_len + WAPI_IV_LEN;
+}
+BOOL_T is_group(u8* addr)
+{
+    if((addr[0] & BIT(0)) != 0)
+        return BTRUE;
+    return BFALSE;
+}
+u16 wlan_rx_wapi_decryption(u8 * input_ptk,u16 header_len,u16 data_len,
+                                    u8 * output_buf, void *priv)
+{
+ u16 offset = 0;
+ BOOL_T qos_in = BFALSE;
+ BOOL_T valid_addr4 = BTRUE;
+ BOOL_T is_group_ptk = BFALSE;
+ u8 ptk_header[36] = {0};
+ u16 ptk_headr_len = 32;
+ u8 * p_ptk_header = ptk_header;
+ u8 data_mic[WAPI_MIC_LEN] = {0};
+ u8 calc_data_mic[WAPI_MIC_LEN] = {0};
+ u8 iv[WAPI_PN_LEN] = {0};
+ u8 keyid = {0};
+ u16 ral_data_len = 0;
+ u16 encryp_data_len = 0;
+ int i = 0;
+ *p_ptk_header = input_ptk[offset] & (frame_cntl_mask >> 8);
+ *(p_ptk_header+1) = input_ptk[offset+1] & (frame_cntl_mask & 0xFF);
+ if(*p_ptk_header & 0x80) {
+  qos_in = BTRUE;
+  ptk_headr_len += 2;
+ }
+ if((*(p_ptk_header+1) & 0x03 ) != 0x03) {
+  valid_addr4 = BFALSE;
+ }
+ p_ptk_header += 2;
+ offset += 2;
+ offset += 2;
+ memcpy(p_ptk_header, &input_ptk[offset], ADDID_LEN);
+ is_group_ptk = is_group(p_ptk_header);
+ p_ptk_header += ADDID_LEN;
+ offset += ADDID_LEN;
+ *p_ptk_header = input_ptk[offset+6] & (seq_cntl_mask >> 8);
+ *(p_ptk_header+1) = input_ptk[offset+6+1] & (seq_cntl_mask & 0xFF);
+ p_ptk_header += 2;
+ memcpy(p_ptk_header, &input_ptk[offset], ETH_ALEN);
+ p_ptk_header += ETH_ALEN;
+ offset += ETH_ALEN;
+ offset += 2;
+ if(valid_addr4) {
+  memcpy(p_ptk_header, &input_ptk[offset], ETH_ALEN);
+  p_ptk_header += ETH_ALEN;
+  offset += ETH_ALEN;
+ }
+ else {
+  memset(p_ptk_header, 0x00, ETH_ALEN);
+  p_ptk_header += ETH_ALEN;
+ }
+ if(qos_in) {
+  memcpy(p_ptk_header,&input_ptk[offset], 2);
+  p_ptk_header += 2;
+  offset += 2;
+ }
+ *p_ptk_header = input_ptk[offset];
+ keyid = input_ptk[offset];
+ p_ptk_header++;
+ offset++;
+ *p_ptk_header = input_ptk[offset];
+ p_ptk_header++;
+ offset++;
+ encryp_data_len = data_len - WAPI_IV_LEN;
+ ral_data_len = data_len - WAPI_IV_LEN - WAPI_MIC_LEN;
+ *p_ptk_header = (ral_data_len >> 8);
+ *(p_ptk_header+1) = ral_data_len & 0xFF;
+ for( i = 15 ; i >= 0 ; i-- ) {
+  iv[i] = input_ptk[offset];
+  offset++;
+ }
+ if(is_group_ptk) {
+        printk("%s, is_group_ptk\n", __func__);
+ }
+ else {
+  if( (iv[15] & 0x01) != 0x01 ) {
+            printk(KERN_ALERT "decry pairwise error,iv[15]=%x\n", iv[15]);
+   return 0;
+  }
+ }
+ WapiCryptoSms4(iv,
+       mget_pmsk_key(keyid, priv),
+       (input_ptk + header_len + WAPI_IV_LEN), encryp_data_len,
+                output_buf);
+ memcpy(data_mic, output_buf + ral_data_len, WAPI_MIC_LEN);
+ WapiCryptoSms4Mic(iv,
+                   mget_mic_key(keyid, priv),
+                   ptk_header, ptk_headr_len,
+                   (output_buf), ral_data_len,
+                   calc_data_mic);
+ if( memcmp(calc_data_mic, data_mic, WAPI_MIC_LEN) != 0 ) {
+        printk(KERN_ALERT "calc_data_mic != data_mic\n");
+  return 0;
+ }
+ else {
+  return ral_data_len;
+ }
+}
+int lib80211_wpi_encrypt(struct sk_buff *mpdu, int hdr_len, void *priv)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)mpdu->data;
+    u8 *pos, *mic_pos;
+    int hdrlen = 0, len = 0, out_len = 0;
+    u8 *pdata = NULL;
+#ifdef MULTI_THREAD_ENCRYPT
+    u32 wapi_iv_icv_offset = WAPI_IV_ICV_OFFSET - WAPI_IV_LEN;
+#else
+  u32 wapi_iv_icv_offset = WAPI_IV_ICV_OFFSET;
+#endif
+    hdrlen = ieee80211_hdrlen(hdr->frame_control);
+    pdata = (mpdu->data) + hdrlen;
+    if (mpdu->protocol != cpu_to_be16(0x88b4)) {
+        if (WARN_ON(skb_headroom(mpdu) < wapi_iv_icv_offset)) {
+            printk("[I] skb_headroom(skb) < %d\n", wapi_iv_icv_offset);
+            return 0;
+        }
+        len = mpdu->len - hdrlen;
+        pos = skb_push(mpdu, wapi_iv_icv_offset);
+#ifdef MULTI_THREAD_ENCRYPT
+        memmove(pos, pos + wapi_iv_icv_offset, mpdu->len - WAPI_MIC_LEN);
+#else
+  memmove(pos, pos + wapi_iv_icv_offset, hdrlen);
+  memmove(pos + hdrlen + WAPI_IV_LEN, pos + wapi_iv_icv_offset + hdrlen, len);
+#endif
+        hdr = (struct ieee80211_hdr *)pos;
+  pos += hdrlen;
+  mic_pos = mpdu->data + mpdu->len - WAPI_MIC_LEN;
+        out_len = wlan_tx_wapi_encryption((u8 *)hdr, pos, len, mic_pos, priv);
+    }
+    else {
+        if (ieee80211_has_protected(hdr->frame_control))
+            hdr->frame_control &= ~(cpu_to_le16(IEEE80211_FCTL_PROTECTED));
+        printk("[I] send WAPI WAI data pkt\n");
+    }
+    return 1;
+}
+int lib80211_wpi_decrypt(struct sk_buff *rx_skb, int hdr_len, void *priv)
+{
+    struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(rx_skb->data);
+    int hdrlen, len, dcry_len;
+    char *pdata = NULL;
+    int ret = 0;
+    hdrlen = ieee80211_hdrlen(hdr->frame_control);
+    pdata = ((char*)(rx_skb->data)) + hdrlen;
+    len = rx_skb->len - hdrlen;
+    dcry_len = wlan_rx_wapi_decryption((u8 *)rx_skb->data, hdrlen, len, pdata, priv);
+    if (dcry_len) {
+  skb_trim(rx_skb, hdrlen + dcry_len);
+        hdr->frame_control &= ~(cpu_to_le16(IEEE80211_FCTL_PROTECTED));
+        ret = dcry_len;
+    }
+    return ret;
+}
+void *lib80211_wpi_init(int key_idx)
+{
+    struct lib80211_wpi_data *priv;
+ priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
+ if (priv == NULL) {
+        printk("allocate lib80211_wpi_data failed\n");
+  return NULL;
+    }
+    priv->key_index = key_idx;
+    return priv;
+}
+void lib80211_wpi_deinit(void *priv)
+{
+    if (priv) {
+        printk("%s\n", __func__);
+        kfree(priv);
+        priv = NULL;
+    }
+    else
+        printk("%s, passing NULL lib80211_wpi_data?\n", __func__);
+}
+#ifdef MULTI_THREAD_ENCRYPT
+int lib80211_wpi_encrypt_prepare(struct sk_buff *mpdu, int hdr_len, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    u8 *pos = NULL;
+    unsigned char *iv = NULL;
+    if (mpdu->protocol != cpu_to_be16(0x88b4) &&
+            (skb_headroom(mpdu) >= WAPI_IV_LEN)) {
+        pos = skb_push(mpdu, WAPI_IV_LEN);
+        memmove(pos, pos + WAPI_IV_LEN, hdr_len);
+        pos += hdr_len;
+        *pos = data->key_index;
+        pos++;
+        *pos = 0x00;
+        pos++;
+        iv = inc_pn_key(priv);
+        memcpy(pos, iv, WAPI_PN_LEN);
+        return 0;
+    }
+    printk("%s, pass through\n", __func__);
+    return 0;
+}
+#endif
+int lib80211_wpi_set_key(void *key, int len, u8 *seq, void *priv)
+{
+    struct lib80211_wpi_data *data = priv;
+    int keyidx = data->key_index;
+    u8 WapiASUEPNInitialValueSrc[16] = {
+        0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36,
+        0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36
+    };
+    printk("%s\n", __func__);
+    mset_key_index(keyidx, priv);
+    mset_pn_key(WapiASUEPNInitialValueSrc, priv);
+    mset_pmsk_key(keyidx, key, priv);
+    mset_mic_key(keyidx, key + WAPI_PN_LEN, priv);
+    if (seq) {
+        memcpy(data->ap_address, (u8 *)seq, ETH_ALEN);
+        printk("%s: set ap_address %pM\n", __func__, data->ap_address);
+    }
+ mset_wapi_key_ok(TV_TRUE, priv);
+    return 0;
+}
+static struct ssv_crypto_ops ssv_crypto_wpi = {
+   .name = "WPI",
+ .init = lib80211_wpi_init,
+ .deinit = lib80211_wpi_deinit,
+ .encrypt_mpdu = lib80211_wpi_encrypt,
+ .decrypt_mpdu = lib80211_wpi_decrypt,
+ .encrypt_msdu = NULL,
+ .decrypt_msdu = NULL,
+ .set_tx_pn = NULL,
+ .set_key = lib80211_wpi_set_key,
+ .get_key = NULL,
+ .print_stats = NULL,
+ .extra_mpdu_prefix_len = WAPI_IV_LEN,
+ .extra_mpdu_postfix_len = WAPI_MIC_LEN,
+#ifdef MULTI_THREAD_ENCRYPT
+ .encrypt_prepare = lib80211_wpi_encrypt_prepare,
+    .decrypt_prepare = NULL,
+#endif
+};
+struct ssv_crypto_ops *get_crypto_wpi_ops(void)
+{
+    return &ssv_crypto_wpi;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.h
new file mode 100644
index 0000000000000..1212745018c72
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/sec_wpi.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef WAPI_WPI_H
+#define WAPI_WPI_H 
+#define WAPI_KEYID_LEN 1
+#define WAPI_RESERVD_LEN 1
+#define WAPI_PN_LEN 16
+#define WAPI_IV_LEN (WAPI_KEYID_LEN + WAPI_RESERVD_LEN + WAPI_PN_LEN)
+#define WAPI_MIC_LEN 16
+#define ADDID_LEN (ETH_ALEN + ETH_ALEN)
+#define WAPI_IV_ICV_OFFSET (WAPI_IV_LEN + WAPI_MIC_LEN)
+typedef enum {BFALSE = 0,
+              BTRUE = 1
+} BOOL_T;
+typedef enum {TV_TRUE = 1,
+              TV_FALSE = 2
+} TRUTH_VALUE_T;
+int lib80211_wpi_set_key(void *key, int len, u8 *seq, void *priv);
+int lib80211_wpi_encrypt(struct sk_buff *mpdu, int hdr_len, void *priv);
+int lib80211_wpi_decrypt(struct sk_buff *mpdu, int hdr_len, void *priv);
+void *lib80211_wpi_init(int key_idx);
+void lib80211_wpi_deinit(void *priv);
+#ifdef MULTI_THREAD_ENCRYPT
+int lib80211_wpi_encrypt_prepare(struct sk_buff *mpdu, int hdr_len, void *priv);
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/smartlink.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/smartlink.c
new file mode 100644
index 0000000000000..f708c92993dfd
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/smartlink.c
@@ -0,0 +1,352 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <net/sock.h>
+#include <linux/socket.h>
+#include <linux/net.h>
+#include <asm/types.h>
+#include <linux/netlink.h>
+#include <linux/skbuff.h>
+#include <linux/version.h>
+#include <ssv6200.h>
+#include "lib.h"
+#include "dev.h"
+#define NETLINK_SMARTLINK (31)
+#define MAX_PAYLOAD (2048)
+static struct sock *nl_sk = NULL;
+struct ssv_softc *ssv_smartlink_sc = NULL;
+EXPORT_SYMBOL(ssv_smartlink_sc);
+u32 ssv_smartlink_status=0;
+static int _ksmartlink_start_smartlink(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s\n", __FUNCTION__);
+#endif
+    ssv_smartlink_status = 1;
+    *pOutBufLen = 0;
+    return 0;
+}
+int ksmartlink_smartlink_started(void)
+{
+    return ssv_smartlink_status;
+}
+EXPORT_SYMBOL(ksmartlink_smartlink_started);
+static int _ksmartlink_stop_smartlink(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s\n", __FUNCTION__);
+#endif
+    ssv_smartlink_status = 0;
+    *pOutBufLen = 0;
+    return 0;
+}
+static int _ksmartlink_set_channel(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+    int ret=-10;
+    int ch=(int)(*pInBuf);
+    struct ssv_softc *sc=ssv_smartlink_sc;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s %d\n", __FUNCTION__, ch);
+#endif
+    if (!sc)
+    {
+        goto out;
+    }
+    mutex_lock(&sc->mutex);
+    ret = ssv6xxx_set_channel(sc, ch);
+    mutex_unlock(&sc->mutex);
+    *pOutBufLen = 0;
+out:
+    return ret;
+}
+static int _ksmartlink_get_channel(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+    int ret=-10;
+    int ch=0;
+    struct ssv_softc *sc=ssv_smartlink_sc;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s\n", __FUNCTION__);
+#endif
+    if (!sc)
+    {
+        goto out;
+    }
+    mutex_lock(&sc->mutex);
+    ret = ssv6xxx_get_channel(sc, &ch);
+    mutex_unlock(&sc->mutex);
+    *pOutBuf = ch;
+    *pOutBufLen = 1;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s %d\n", __FUNCTION__, ch);
+#endif
+out:
+    return ret;
+}
+static int _ksmartlink_set_promisc(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+    int ret=-10;
+    int accept=(int)(*pInBuf);
+    struct ssv_softc *sc=ssv_smartlink_sc;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s %d\n", __FUNCTION__, accept);
+#endif
+    if (!sc)
+    {
+        goto out;
+    }
+    mutex_lock(&sc->mutex);
+    ret = ssv6xxx_set_promisc(sc, accept);
+    mutex_unlock(&sc->mutex);
+    *pOutBufLen = 0;
+out:
+    return ret;
+}
+static int _ksmartlink_get_promisc(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+    int ret=-10;
+    int accept=(int)(*pInBuf);
+    struct ssv_softc *sc=ssv_smartlink_sc;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s\n", __FUNCTION__);
+#endif
+    if (!sc)
+    {
+        goto out;
+    }
+    mutex_lock(&sc->mutex);
+    ret = ssv6xxx_get_promisc(sc, &accept);
+    mutex_unlock(&sc->mutex);
+    *pOutBuf = accept;
+    *pOutBufLen = 1;
+#ifdef KSMARTLINK_DEBUG
+    printk(KERN_INFO "%s %d\n", __FUNCTION__, accept);
+#endif
+out:
+    return ret;
+}
+#define SMARTLINK_CMD_FIXED_LEN (10)
+#define SMARTLINK_CMD_FIXED_TOT_LEN (SMARTLINK_CMD_FIXED_LEN+1)
+#define SMARTLINK_RES_FIXED_LEN (SMARTLINK_CMD_FIXED_LEN)
+#define SMARTLINK_RES_FIXED_TOT_LEN (SMARTLINK_RES_FIXED_LEN+2)
+struct ksmartlink_cmd
+{
+    char *cmd;
+    int (*process_func)(u8 *, u32, u8 *, u32 *);
+};
+static struct ksmartlink_cmd _ksmartlink_cmd_table[] =
+{
+    {"startairki", _ksmartlink_start_smartlink},
+    {"stopairkis", _ksmartlink_stop_smartlink},
+    {"setchannel", _ksmartlink_set_channel},
+    {"getchannel", _ksmartlink_get_channel},
+    {"setpromisc", _ksmartlink_set_promisc},
+    {"getpromisc", _ksmartlink_get_promisc},
+};
+static u32 _ksmartlink_cmd_table_size=sizeof(_ksmartlink_cmd_table)/sizeof(struct ksmartlink_cmd);
+#ifdef KSMARTLINK_DEBUG
+static void _ksmartlink_hex_dump(u8 *pInBuf, u32 inBufLen)
+{
+    u32 i=0;
+    printk(KERN_INFO "\nKernel Hex Dump(len=%d):\n", inBufLen);
+    printk(KERN_INFO ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
+    for (i=0; i<inBufLen; i++)
+    {
+        if ((i) && ((i & 0xf) == 0))
+        {
+            printk("\n");
+        }
+        printk("%02x ", pInBuf[i]);
+    }
+    printk(KERN_INFO "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<\n");
+}
+#endif
+static int _ksmartlink_process_msg(u8 *pInBuf, u32 inBufLen, u8 *pOutBuf, u32 *pOutBufLen)
+{
+    int ret=0;
+    u32 i=0;
+    struct ksmartlink_cmd *pCmd;
+    if (!pInBuf || !pOutBuf || !pOutBufLen)
+    {
+        printk(KERN_ERR "NULL pointer\n");
+        return -1;
+    }
+    for (i=0; i<_ksmartlink_cmd_table_size; i++)
+    {
+        if (!strncmp(_ksmartlink_cmd_table[i].cmd, pInBuf, SMARTLINK_CMD_FIXED_LEN))
+        {
+            break;
+        }
+    }
+    if (i < _ksmartlink_cmd_table_size)
+    {
+        pCmd = &_ksmartlink_cmd_table[i];
+        if (!pCmd->process_func)
+        {
+            printk(KERN_ERR "CMD %s has NULL process_func\n", pCmd->cmd);
+            return -3;
+        }
+        ret = pCmd->process_func(pInBuf+SMARTLINK_CMD_FIXED_LEN, inBufLen, pOutBuf, pOutBufLen);
+    #ifdef CONFIG_SSV_NETLINK_RESPONSE
+        if (ret < 0)
+        {
+            *pOutBufLen = SMARTLINK_RES_FIXED_TOT_LEN;
+        }
+        else
+        {
+            if (*pOutBufLen > 0)
+            {
+                pOutBuf[SMARTLINK_RES_FIXED_LEN] = (u8)ret;
+                pOutBuf[SMARTLINK_RES_FIXED_LEN+1]= *pOutBuf;
+            }
+            else
+            {
+                pOutBuf[SMARTLINK_RES_FIXED_LEN] = (u8)ret;
+                pOutBuf[SMARTLINK_RES_FIXED_LEN+1]= 0;
+            }
+            *pOutBufLen = SMARTLINK_RES_FIXED_TOT_LEN;
+        }
+        memcpy(pOutBuf, pCmd->cmd, SMARTLINK_RES_FIXED_LEN);
+    #else
+        (void)pOutBuf;
+        (void)pOutBufLen;
+    #endif
+        return 0;
+    }
+    else
+    {
+        printk(KERN_INFO "Unknow CMD or Packet?\n");
+    }
+    return 0;
+}
+static u8 gkBuf[MAX_PAYLOAD]={0};
+static int ssv_usr_pid=0;
+void smartlink_nl_recv_msg(struct sk_buff *skb)
+{
+    struct nlmsghdr *nlh;
+#ifdef CONFIG_SSV_NETLINK_RESPONSE
+    struct sk_buff *skb_out;
+#endif
+    int ret=0;
+    u8 *pInBuf=NULL;
+    u32 inBufLen=0;
+    u32 outBufLen=0;
+    nlh = (struct nlmsghdr *)skb->data;
+    ssv_usr_pid = nlh->nlmsg_pid;
+    pInBuf = (u8 *)nlmsg_data(nlh);
+    inBufLen = nlmsg_len(nlh);
+    #ifdef KSMARTLINK_DEBUG
+    _ksmartlink_hex_dump(pInBuf, inBufLen);
+    #endif
+    outBufLen = 0;
+    memset(gkBuf, 0, MAX_PAYLOAD);
+    ret = _ksmartlink_process_msg(pInBuf, inBufLen, gkBuf, &outBufLen);
+#ifdef CONFIG_SSV_NETLINK_RESPONSE
+    if (outBufLen == 0)
+    {
+        memcpy(gkBuf, "Nothing", 8);
+        outBufLen = strlen(gkBuf);
+    }
+    skb_out = nlmsg_new(outBufLen, 0);
+    if (!skb_out)
+    {
+        printk(KERN_ERR "Failed to allocate new skb\n");
+        return;
+    }
+    nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, outBufLen, 0);
+    NETLINK_CB(skb_out).dst_group = 0;
+    memcpy(nlmsg_data(nlh), gkBuf, outBufLen);
+    ret = nlmsg_unicast(nl_sk, skb_out, ssv_usr_pid);
+    if (ret < 0)
+    {
+        printk(KERN_ERR "Error while sending bak to user\n");
+    }
+#endif
+    return;
+}
+void smartlink_nl_send_msg(struct sk_buff *skb)
+{
+    struct nlmsghdr *nlh;
+    struct sk_buff *skb_out;
+    int ret=0;
+    u8 *pOutBuf=skb->data;
+    u32 outBufLen=skb->len;
+    #ifdef KSMARTLINK_DEBUG
+    #endif
+    skb_out = nlmsg_new(outBufLen, 0);
+    if (!skb_out)
+    {
+        printk(KERN_ERR "Allocate new skb failed!\n");
+        return;
+    }
+    nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, outBufLen, 0);
+    NETLINK_CB(skb_out).dst_group = 0;
+    memcpy(nlmsg_data(nlh), pOutBuf, outBufLen);
+    ret = nlmsg_unicast(nl_sk, skb_out, ssv_usr_pid);
+    if (ret < 0)
+    {
+        printk(KERN_ERR "nlmsg_unicast failed!\n");
+    }
+    kfree_skb(skb);
+    return;
+}
+EXPORT_SYMBOL(smartlink_nl_send_msg);
+int ksmartlink_init(void)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+    nl_sk = netlink_kernel_create(&init_net,
+                                  NETLINK_SMARTLINK,
+                                  0,
+                                  smartlink_nl_recv_msg,
+                                  NULL,
+                                  THIS_MODULE);
+#else
+    struct netlink_kernel_cfg cfg =
+            {
+                .groups = 0,
+                .input = smartlink_nl_recv_msg,
+            };
+    nl_sk = netlink_kernel_create(&init_net,
+                                  NETLINK_SMARTLINK,
+                                  &cfg);
+#endif
+    printk(KERN_INFO "***************SmartLink Init-S**************\n");
+    if(!nl_sk)
+    {
+        printk(KERN_ERR "Error creating socket.\n");
+        return -10;
+    }
+    printk(KERN_INFO "***************SmartLink Init-E**************\n");
+    return 0;
+}
+void ksmartlink_exit(void)
+{
+    printk(KERN_INFO "%s\n", __FUNCTION__);
+    if (nl_sk)
+    {
+        netlink_kernel_release(nl_sk);
+        nl_sk = NULL;
+    }
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ksmartlink_init);
+EXPORT_SYMBOL(ksmartlink_exit);
+#else
+module_init(ksmartlink_init);
+module_exit(ksmartlink_exit);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.c
new file mode 100644
index 0000000000000..8d06c1a6b0911
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.c
@@ -0,0 +1,208 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/nl80211.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/time.h>
+#include <net/mac80211.h>
+#include <ssv6200.h>
+#include "dev.h"
+#include "ssv6xxx_debugfs.h"
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+#define QUEUE_STATUS_BUF_SIZE (4096)
+static ssize_t queue_status_read (struct file *file,
+                                  char __user *user_buf, size_t count,
+                                  loff_t *ppos)
+{
+    struct ssv_softc *sc = (struct ssv_softc *)file->private_data;
+    char *status_buf = kzalloc(QUEUE_STATUS_BUF_SIZE, GFP_KERNEL);
+    ssize_t status_size;
+    ssize_t ret;
+    if (!status_buf)
+        return -ENOMEM;
+    status_size = ssv6xxx_tx_queue_status_dump(sc, status_buf,
+                                       QUEUE_STATUS_BUF_SIZE);
+    ret = simple_read_from_buffer(user_buf, count, ppos, status_buf,
+                                  status_size);
+    kfree(status_buf);
+    return ret;
+}
+static int queue_status_open (struct inode *inode, struct file *file)
+{
+    file->private_data = inode->i_private;
+    return 0;
+}
+static const struct file_operations queue_status_fops
+    = { .read = queue_status_read,
+        .open = queue_status_open };
+#endif
+int ssv6xxx_init_debugfs (struct ssv_softc *sc, const char *name)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct ieee80211_hw *hw = sc->hw;
+    struct dentry *phy_debugfs_dir = hw->wiphy->debugfsdir;
+    struct dentry *drv_debugfs_dir;
+    drv_debugfs_dir = debugfs_create_dir(name, phy_debugfs_dir);
+    if (!drv_debugfs_dir)
+    {
+        dev_err(sc->dev, "Failed to create debugfs.\n");
+        return -ENOMEM;
+    }
+    sc->debugfs_dir = drv_debugfs_dir;
+    sc->sh->hci.hci_ops->hci_init_debugfs(sc->debugfs_dir);
+    debugfs_create_file("queue_status", 00444, drv_debugfs_dir,
+                        sc, &queue_status_fops);
+#endif
+    return 0;
+}
+void ssv6xxx_deinit_debugfs (struct ssv_softc *sc)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    if (!sc->debugfs_dir)
+        return;
+    sc->sh->hci.hci_ops->hci_deinit_debugfs();
+    debugfs_remove_recursive(sc->debugfs_dir);
+    sc->debugfs_dir = NULL;
+#endif
+}
+int ssv6xxx_debugfs_add_interface(struct ssv_softc *sc, struct ieee80211_vif *vif)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct dentry *drv_debugfs_dir = sc->debugfs_dir;
+    struct dentry *vif_debugfs_dir;
+    char vif_addr[18];
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    snprintf(vif_addr, sizeof(vif_addr), "%02X-%02X-%02X-%02X-%02X-%02X",
+            vif->addr[0], vif->addr[1], vif->addr[2],
+            vif->addr[3], vif->addr[4], vif->addr[5]);
+    vif_debugfs_dir = debugfs_create_dir(vif_addr, drv_debugfs_dir);
+    if (!vif_debugfs_dir)
+    {
+        dev_err(sc->dev, "Failed to create interface debugfs for %s.\n", vif_addr);
+        return -ENOMEM;
+    }
+    sc->debugfs_dir = drv_debugfs_dir;
+    vif_info->debugfs_dir = vif_debugfs_dir;
+#endif
+    return 0;
+}
+int ssv6xxx_debugfs_remove_interface(struct ssv_softc *sc, struct ieee80211_vif *vif)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)vif->drv_priv;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    if ((vif_info->debugfs_dir == NULL) || (sc->debugfs_dir == NULL))
+        return 0;
+    debugfs_remove_recursive(vif_info->debugfs_dir);
+    vif_info->debugfs_dir = NULL;
+#endif
+    return 0;
+}
+int ssv6xxx_debugfs_remove_sta(struct ssv_softc *sc, struct ssv_sta_info *sta)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)sta->vif->drv_priv;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    if ((sc->debugfs_dir == NULL) || (vif_info->debugfs_dir == NULL) || (sta->debugfs_dir == NULL))
+        return 0;
+    debugfs_remove_recursive(sta->debugfs_dir);
+    sta->debugfs_dir = NULL;
+#endif
+    return 0;
+}
+int ssv6xxx_debugfs_add_sta(struct ssv_softc *sc, struct ssv_sta_info *sta)
+{
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+    struct ssv_vif_priv_data *vif_priv = (struct ssv_vif_priv_data *)sta->vif->drv_priv;
+    struct ssv_vif_info *vif_info = &sc->vif_info[vif_priv->vif_idx];
+    struct dentry *vif_debugfs_dir = vif_info->debugfs_dir;
+    struct dentry *sta_debugfs_dir;
+    char sta_addr[18];
+    if (vif_debugfs_dir == NULL)
+        return 0;
+    snprintf(sta_addr, sizeof(sta_addr), "%02X-%02X-%02X-%02X-%02X-%02X",
+             sta->sta->addr[0], sta->sta->addr[1], sta->sta->addr[2],
+             sta->sta->addr[3], sta->sta->addr[4], sta->sta->addr[5]);
+    sta_debugfs_dir = debugfs_create_dir(sta_addr, vif_debugfs_dir);
+    if (!sta_debugfs_dir)
+    {
+        dev_err(sc->dev, "Failed to create interface debugfs for %s.\n", sta_addr);
+        return -ENOMEM;
+    }
+    sta->debugfs_dir = sta_debugfs_dir;
+#endif
+    return 0;
+}
+#define DEBUGFS_ADD_FILE(name,parent,mode) do { \
+    if (!debugfs_create_file(#name, mode, parent, priv, \
+                 &ssv_dbgfs_##name##_ops)) \
+        goto err; \
+} while (0)
+#define DEBUGFS_ADD_BOOL(name,parent,ptr) do { \
+    struct dentry *__tmp; \
+    __tmp = debugfs_create_bool(#name, S_IWUSR | S_IRUSR, \
+                    parent, ptr); \
+    if (IS_ERR(__tmp) || !__tmp) \
+        goto err; \
+} while (0)
+#define DEBUGFS_ADD_X32(name,parent,ptr) do { \
+    struct dentry *__tmp; \
+    __tmp = debugfs_create_x32(#name, S_IWUSR | S_IRUSR, \
+                   parent, ptr); \
+    if (IS_ERR(__tmp) || !__tmp) \
+        goto err; \
+} while (0)
+#define DEBUGFS_ADD_U32(name,parent,ptr,mode) do { \
+    struct dentry *__tmp; \
+    __tmp = debugfs_create_u32(#name, mode, \
+                   parent, ptr); \
+    if (IS_ERR(__tmp) || !__tmp) \
+        goto err; \
+} while (0)
+#define DEBUGFS_READ_FUNC(name) \
+static ssize_t ssv_dbgfs_##name##_read(struct file *file, \
+                    char __user *user_buf, \
+                    size_t count, loff_t *ppos);
+#define DEBUGFS_WRITE_FUNC(name) \
+static ssize_t ssv_dbgfs_##name##_write(struct file *file, \
+                    const char __user *user_buf, \
+                    size_t count, loff_t *ppos);
+#define DEBUGFS_READ_FILE_OPS(name) \
+    DEBUGFS_READ_FUNC(name); \
+static const struct file_operations ssv_dbgfs_##name##_ops = { \
+    .read = ssv_dbgfs_##name##_read, \
+    .open = ssv_dbgfs_open_file_generic, \
+    .llseek = generic_file_llseek, \
+};
+#define DEBUGFS_WRITE_FILE_OPS(name) \
+    DEBUGFS_WRITE_FUNC(name); \
+static const struct file_operations ssv_dbgfs_##name##_ops = { \
+    .write = ssv_dbgfs_##name##_write, \
+    .open = ssv_dbgfs_open_file_generic, \
+    .llseek = generic_file_llseek, \
+};
+#define DEBUGFS_READ_WRITE_FILE_OPS(name) \
+    DEBUGFS_READ_FUNC(name); \
+    DEBUGFS_WRITE_FUNC(name); \
+static const struct file_operations ssv_dbgfs_##name##_ops = { \
+    .write = ssv_dbgfs_##name##_write, \
+    .read = ssv_dbgfs_##name##_read, \
+    .open = ssv_dbgfs_open_file_generic, \
+    .llseek = generic_file_llseek, \
+};
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.h
new file mode 100644
index 0000000000000..f1599fa422ccc
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv6xxx_debugfs.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __SSV6XXX_DBGFS_H__
+#define __SSV6XXX_DBGFS_H__ 
+int ssv6xxx_init_debugfs (struct ssv_softc *sc, const char *name);
+void ssv6xxx_deinit_debugfs (struct ssv_softc *sc);
+int ssv6xxx_debugfs_remove_interface(struct ssv_softc *sc, struct ieee80211_vif *vif);
+int ssv6xxx_debugfs_add_interface(struct ssv_softc *sc, struct ieee80211_vif *vif);
+int ssv6xxx_debugfs_remove_sta(struct ssv_softc *sc, struct ssv_sta_info *sta);
+int ssv6xxx_debugfs_add_sta(struct ssv_softc *sc, struct ssv_sta_info *sta);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.c
new file mode 100644
index 0000000000000..c73713f6dd1aa
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.c
@@ -0,0 +1,1254 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2012 - 2018 icomm Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include "dev.h"
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(CONFIG_SSV_VENDOR_EXT_SUPPORT)
+
+
+#include <linux/kernel.h>
+#include <linux/if_arp.h>
+#include <asm/uaccess.h>
+
+#include <linux/kernel.h>
+#include <linux/kthread.h>
+#include <linux/netdevice.h>
+#include <linux/sched.h>
+#include <linux/etherdevice.h>
+#include <linux/wireless.h>
+#include <linux/ieee80211.h>
+#include <linux/wait.h>
+#include <net/cfg80211.h>
+
+#include <net/rtnetlink.h>
+#include "ssv_cfgvendor.h"
+
+#define DBG_SSV_LEVEL(lev, x, ...) do {printk(x,##__VA_ARGS__);} while(0)
+#define DBG_SSV(x, ...) do {printk(x,##__VA_ARGS__);} while(0)
+
+#define wiphy_to_softc(x) (*((struct ssv_softc**)wiphy_priv(x)))
+#define FUNC_NDEV_FMT "%s"
+#define FUNC_NDEV_ARG(ndev) __func__
+
+#define _drv_always_		1
+#define _drv_emerg_			2
+#define _drv_alert_			3
+#define _drv_crit_			4
+#define _drv_err_			5
+#define _drv_warning_		6
+#define _drv_notice_		7
+#define _drv_info_			8
+#define _drv_dump_			9
+#define _drv_debug_			10
+
+
+#if 1
+struct sk_buff * ssv_cfg80211_vendor_event_alloc(
+		struct wiphy *wiphy, int len, int event_id, gfp_t gfp)
+{
+	struct sk_buff *skb;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0))
+	skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp);
+#else
+	skb = cfg80211_vendor_event_alloc(wiphy, NULL, len, event_id, gfp);
+#endif
+	return skb;
+}
+
+#define ssv_cfg80211_vendor_event(skb, gfp) \
+	cfg80211_vendor_event(skb, gfp)
+	
+#define ssv_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \
+	cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len)
+
+#define ssv_cfg80211_vendor_cmd_reply(skb) \
+	cfg80211_vendor_cmd_reply(skb)
+
+#endif
+
+/*
+ * This API is to be used for asynchronous vendor events. This
+ * shouldn't be used in response to a vendor command from its
+ * do_it handler context (instead ssv_cfgvendor_send_cmd_reply should
+ * be used).
+ */
+int ssv_cfgvendor_send_async_event(struct wiphy *wiphy,
+	struct net_device *dev, int event_id, const void  *data, int len)
+{
+	u16 kflags;
+	struct sk_buff *skb;
+
+	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
+
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_event_alloc(wiphy, len, event_id, kflags);
+	if (!skb) {
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev));
+		return -ENOMEM;
+	}
+
+	/* Push the data to the skb */
+	nla_put_nohdr(skb, len, data);
+
+	ssv_cfg80211_vendor_event(skb, kflags);
+
+	return 0;
+}
+
+static int ssv_cfgvendor_send_cmd_reply(struct wiphy *wiphy,
+	struct net_device *dev, const void  *data, int len)
+{
+	struct sk_buff *skb;
+
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len);
+	if (unlikely(!skb)) {
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev));
+		return -ENOMEM;
+	}
+
+	/* Push the data to the skb */
+	nla_put_nohdr(skb, len, data);
+
+	return ssv_cfg80211_vendor_cmd_reply(skb);
+}
+
+#define WIFI_FEATURE_INFRA              0x0001      /* Basic infrastructure mode        */
+#define WIFI_FEATURE_INFRA_5G           0x0002      /* Support for 5 GHz Band           */
+#define WIFI_FEATURE_HOTSPOT            0x0004      /* Support for GAS/ANQP             */
+#define WIFI_FEATURE_P2P                0x0008      /* Wifi-Direct                      */
+#define WIFI_FEATURE_SOFT_AP            0x0010      /* Soft AP                          */
+#define WIFI_FEATURE_GSCAN              0x0020      /* Google-Scan APIs                 */
+#define WIFI_FEATURE_NAN                0x0040      /* Neighbor Awareness Networking    */
+#define WIFI_FEATURE_D2D_RTT            0x0080      /* Device-to-device RTT             */
+#define WIFI_FEATURE_D2AP_RTT           0x0100      /* Device-to-AP RTT                 */
+#define WIFI_FEATURE_BATCH_SCAN         0x0200      /* Batched Scan (legacy)            */
+#define WIFI_FEATURE_PNO                0x0400      /* Preferred network offload        */
+#define WIFI_FEATURE_ADDITIONAL_STA     0x0800      /* Support for two STAs             */
+#define WIFI_FEATURE_TDLS               0x1000      /* Tunnel directed link setup       */
+#define WIFI_FEATURE_TDLS_OFFCHANNEL    0x2000      /* Support for TDLS off channel     */
+#define WIFI_FEATURE_EPR                0x4000      /* Enhanced power reporting         */
+#define WIFI_FEATURE_AP_STA             0x8000      /* Support for AP STA Concurrency   */
+
+#define MAX_FEATURE_SET_CONCURRRENT_GROUPS  3
+
+int ssv_dev_get_feature_set(struct net_device *dev)
+{
+	int feature_set = 0;
+
+	feature_set |= WIFI_FEATURE_INFRA;
+
+	feature_set |= WIFI_FEATURE_P2P;
+	feature_set |= WIFI_FEATURE_SOFT_AP;
+
+#if defined(GSCAN_SUPPORT)
+	feature_set |= WIFI_FEATURE_GSCAN;
+#endif
+
+#if defined(RTT_SUPPORT)
+	feature_set |= WIFI_FEATURE_NAN;
+	feature_set |= WIFI_FEATURE_D2D_RTT;
+	feature_set |= WIFI_FEATURE_D2AP_RTT;
+#endif
+
+	return feature_set;
+}
+
+int *ssv_dev_get_feature_set_matrix(struct net_device *dev, int *num)
+{
+	int feature_set_full, mem_needed;
+	int *ret;
+
+	*num = 0;
+	mem_needed = sizeof(int) * MAX_FEATURE_SET_CONCURRRENT_GROUPS;
+	ret = (int *)kmalloc(mem_needed,in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
+
+	if (!ret) {
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" failed to allocate %d bytes\n"
+			, FUNC_NDEV_ARG(dev), mem_needed);
+		return ret;
+	}
+
+	feature_set_full = ssv_dev_get_feature_set(dev);
+
+	ret[0] = (feature_set_full & WIFI_FEATURE_INFRA) |
+	         (feature_set_full & WIFI_FEATURE_INFRA_5G) |
+	         (feature_set_full & WIFI_FEATURE_NAN) |
+	         (feature_set_full & WIFI_FEATURE_D2D_RTT) |
+	         (feature_set_full & WIFI_FEATURE_D2AP_RTT) |
+	         (feature_set_full & WIFI_FEATURE_PNO) |
+	         (feature_set_full & WIFI_FEATURE_BATCH_SCAN) |
+	         (feature_set_full & WIFI_FEATURE_GSCAN) |
+	         (feature_set_full & WIFI_FEATURE_HOTSPOT) |
+	         (feature_set_full & WIFI_FEATURE_ADDITIONAL_STA) |
+	         (feature_set_full & WIFI_FEATURE_EPR);
+
+	ret[1] = (feature_set_full & WIFI_FEATURE_INFRA) |
+	         (feature_set_full & WIFI_FEATURE_INFRA_5G) |
+	         /* Not yet verified NAN with P2P */
+	         /* (feature_set_full & WIFI_FEATURE_NAN) | */
+	         (feature_set_full & WIFI_FEATURE_P2P) |
+	         (feature_set_full & WIFI_FEATURE_D2AP_RTT) |
+	         (feature_set_full & WIFI_FEATURE_D2D_RTT) |
+	         (feature_set_full & WIFI_FEATURE_EPR);
+
+	ret[2] = (feature_set_full & WIFI_FEATURE_INFRA) |
+	         (feature_set_full & WIFI_FEATURE_INFRA_5G) |
+	         (feature_set_full & WIFI_FEATURE_NAN) |
+	         (feature_set_full & WIFI_FEATURE_D2D_RTT) |
+	         (feature_set_full & WIFI_FEATURE_D2AP_RTT) |
+	         (feature_set_full & WIFI_FEATURE_TDLS) |
+	         (feature_set_full & WIFI_FEATURE_TDLS_OFFCHANNEL) |
+	         (feature_set_full & WIFI_FEATURE_EPR);
+	*num = MAX_FEATURE_SET_CONCURRRENT_GROUPS;
+
+	return ret;
+}
+
+#define wdev_to_ndev(wdev) NULL
+
+static int ssv_cfgvendor_get_feature_set(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	int reply;
+
+    DBG_SSV("++++++++++++++++in ssv_cfgvendor_get_feature_set\n");
+
+	reply = ssv_dev_get_feature_set(wdev_to_ndev(wdev));
+
+	err =  ssv_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &reply, sizeof(int));
+
+	if (unlikely(err))
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" Vendor Command reply failed ret:%d \n"
+			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err);
+
+	return err;
+}
+
+static int ssv_cfgvendor_get_feature_set_matrix(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct sk_buff *skb;
+	int *reply;
+	int num, mem_needed, i;
+    DBG_SSV("++++++++++++++++in ssv_cfgvendor_get_feature_set_matrix\n");
+
+	reply = ssv_dev_get_feature_set_matrix(wdev_to_ndev(wdev), &num);
+
+	if (!reply) {
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" Could not get feature list matrix\n"
+			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)));
+		err = -EINVAL;
+		return err;
+	}
+
+	mem_needed = VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * num) +
+	             ATTRIBUTE_U32_LEN;
+
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed);
+	if (unlikely(!skb)) {
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(wdev_to_ndev(wdev)));
+		err = -ENOMEM;
+		goto exit;
+	}
+
+	nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, num);
+	for (i = 0; i < num; i++) {
+		nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_FEATURE_SET, reply[i]);
+	}
+
+	err =  ssv_cfg80211_vendor_cmd_reply(skb);
+
+	if (unlikely(err))
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT" Vendor Command reply failed ret:%d \n"
+			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err);
+exit:
+	kfree((void *)reply);
+	return err;
+}
+
+#if defined(GSCAN_SUPPORT) && 0
+int wl_cfgvendor_send_hotlist_event(struct wiphy *wiphy,
+	struct net_device *dev, void  *data, int len, wl_vendor_event_t event)
+{
+	u16 kflags;
+	const void *ptr;
+	struct sk_buff *skb;
+	int malloc_len, total, iter_cnt_to_send, cnt;
+	gscan_results_cache_t *cache = (gscan_results_cache_t *)data;
+
+	total = len/sizeof(wifi_gscan_result_t);
+	while (total > 0) {
+		malloc_len = (total * sizeof(wifi_gscan_result_t)) + VENDOR_DATA_OVERHEAD;
+		if (malloc_len > NLMSG_DEFAULT_SIZE) {
+			malloc_len = NLMSG_DEFAULT_SIZE;
+		}
+		iter_cnt_to_send =
+		   (malloc_len - VENDOR_DATA_OVERHEAD)/sizeof(wifi_gscan_result_t);
+		total = total - iter_cnt_to_send;
+
+		kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
+
+		/* Alloc the SKB for vendor_event */
+		skb = ssv_cfg80211_vendor_event_alloc(wiphy, malloc_len, event, kflags);
+		if (!skb) {
+			WL_ERR(("skb alloc failed"));
+			return -ENOMEM;
+		}
+
+		while (cache && iter_cnt_to_send) {
+			ptr = (const void *) &cache->results[cache->tot_consumed];
+
+			if (iter_cnt_to_send < (cache->tot_count - cache->tot_consumed))
+				cnt = iter_cnt_to_send;
+			else
+				cnt = (cache->tot_count - cache->tot_consumed);
+
+			iter_cnt_to_send -= cnt;
+			cache->tot_consumed += cnt;
+			/* Push the data to the skb */
+			nla_append(skb, cnt * sizeof(wifi_gscan_result_t), ptr);
+			if (cache->tot_consumed == cache->tot_count)
+				cache = cache->next;
+
+		}
+
+		ssv_cfg80211_vendor_event(skb, kflags);
+	}
+
+	return 0;
+}
+
+
+static int wl_cfgvendor_gscan_get_capabilities(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	dhd_pno_gscan_capabilities_t *reply = NULL;
+	uint32 reply_len = 0;
+
+
+	reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg),
+	   DHD_PNO_GET_CAPABILITIES, NULL, &reply_len);
+	if (!reply) {
+		WL_ERR(("Could not get capabilities\n"));
+		err = -EINVAL;
+		return err;
+	}
+
+	err =  ssv_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg),
+	        reply, reply_len);
+
+	if (unlikely(err))
+		WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+
+	kfree(reply);
+	return err;
+}
+
+static int wl_cfgvendor_gscan_get_channel_list(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0, type, band;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	uint16 *reply = NULL;
+	uint32 reply_len = 0, num_channels, mem_needed;
+	struct sk_buff *skb;
+
+	type = nla_type(data);
+
+	if (type == GSCAN_ATTRIBUTE_BAND) {
+		band = nla_get_u32(data);
+	} else {
+		return -1;
+	}
+
+	reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg),
+	   DHD_PNO_GET_CHANNEL_LIST, &band, &reply_len);
+
+	if (!reply) {
+		WL_ERR(("Could not get channel list\n"));
+		err = -EINVAL;
+		return err;
+	}
+	num_channels =  reply_len/ sizeof(uint32);
+	mem_needed = reply_len + VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * 2);
+
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed);
+	if (unlikely(!skb)) {
+		WL_ERR(("skb alloc failed"));
+		err = -ENOMEM;
+		goto exit;
+	}
+
+	nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_CHANNELS, num_channels);
+	nla_put(skb, GSCAN_ATTRIBUTE_CHANNEL_LIST, reply_len, reply);
+
+	err =  ssv_cfg80211_vendor_cmd_reply(skb);
+
+	if (unlikely(err))
+		WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+exit:
+	kfree(reply);
+	return err;
+}
+
+static int wl_cfgvendor_gscan_get_batch_results(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	gscan_results_cache_t *results, *iter;
+	uint32 reply_len, complete = 0, num_results_iter;
+	int32 mem_needed;
+	wifi_gscan_result_t *ptr;
+	uint16 num_scan_ids, num_results;
+	struct sk_buff *skb;
+	struct nlattr *scan_hdr;
+
+	dhd_dev_wait_batch_results_complete(bcmcfg_to_prmry_ndev(cfg));
+	dhd_dev_pno_lock_access_batch_results(bcmcfg_to_prmry_ndev(cfg));
+	results = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg),
+	             DHD_PNO_GET_BATCH_RESULTS, NULL, &reply_len);
+
+	if (!results) {
+		WL_ERR(("No results to send %d\n", err));
+		err =  ssv_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg),
+		        results, 0);
+
+		if (unlikely(err))
+			WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+		dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg));
+		return err;
+	}
+	num_scan_ids = reply_len & 0xFFFF;
+	num_results = (reply_len & 0xFFFF0000) >> 16;
+	mem_needed = (num_results * sizeof(wifi_gscan_result_t)) +
+	             (num_scan_ids * GSCAN_BATCH_RESULT_HDR_LEN) +
+	             VENDOR_REPLY_OVERHEAD + SCAN_RESULTS_COMPLETE_FLAG_LEN;
+
+	if (mem_needed > (int32)NLMSG_DEFAULT_SIZE) {
+		mem_needed = (int32)NLMSG_DEFAULT_SIZE;
+		complete = 0;
+	} else {
+		complete = 1;
+	}
+
+	WL_TRACE(("complete %d mem_needed %d max_mem %d\n", complete, mem_needed,
+		(int)NLMSG_DEFAULT_SIZE));
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed);
+	if (unlikely(!skb)) {
+		WL_ERR(("skb alloc failed"));
+		dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg));
+		return -ENOMEM;
+	}
+	iter = results;
+
+	nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, complete);
+
+	mem_needed = mem_needed - (SCAN_RESULTS_COMPLETE_FLAG_LEN + VENDOR_REPLY_OVERHEAD);
+
+	while (iter && ((mem_needed - GSCAN_BATCH_RESULT_HDR_LEN)  > 0)) {
+		scan_hdr = nla_nest_start(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS);
+		nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_ID, iter->scan_id);
+		nla_put_u8(skb, GSCAN_ATTRIBUTE_SCAN_FLAGS, iter->flag);
+		num_results_iter =
+		    (mem_needed - GSCAN_BATCH_RESULT_HDR_LEN)/sizeof(wifi_gscan_result_t);
+
+		if ((iter->tot_count - iter->tot_consumed) < num_results_iter)
+			num_results_iter = iter->tot_count - iter->tot_consumed;
+
+		nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_OF_RESULTS, num_results_iter);
+		if (num_results_iter) {
+			ptr = &iter->results[iter->tot_consumed];
+			iter->tot_consumed += num_results_iter;
+			nla_put(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS,
+			 num_results_iter * sizeof(wifi_gscan_result_t), ptr);
+		}
+		nla_nest_end(skb, scan_hdr);
+		mem_needed -= GSCAN_BATCH_RESULT_HDR_LEN +
+		    (num_results_iter * sizeof(wifi_gscan_result_t));
+		iter = iter->next;
+	}
+
+	dhd_dev_gscan_batch_cache_cleanup(bcmcfg_to_prmry_ndev(cfg));
+	dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg));
+
+	return ssv_cfg80211_vendor_cmd_reply(skb);
+}
+
+static int wl_cfgvendor_initiate_gscan(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	int type, tmp = len;
+	int run = 0xFF;
+	int flush = 0;
+	const struct nlattr *iter;
+
+	nla_for_each_attr(iter, data, len, tmp) {
+		type = nla_type(iter);
+		if (type == GSCAN_ATTRIBUTE_ENABLE_FEATURE)
+			run = nla_get_u32(iter);
+		else if (type == GSCAN_ATTRIBUTE_FLUSH_FEATURE)
+			flush = nla_get_u32(iter);
+	}
+
+	if (run != 0xFF) {
+		err = dhd_dev_pno_run_gscan(bcmcfg_to_prmry_ndev(cfg), run, flush);
+
+		if (unlikely(err))
+			WL_ERR(("Could not run gscan:%d \n", err));
+		return err;
+	} else {
+		return -1;
+	}
+
+
+}
+
+static int wl_cfgvendor_enable_full_scan_result(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	int type;
+	bool real_time = FALSE;
+
+	type = nla_type(data);
+
+	if (type == GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS) {
+		real_time = nla_get_u32(data);
+
+		err = dhd_dev_pno_enable_full_scan_result(bcmcfg_to_prmry_ndev(cfg), real_time);
+
+		if (unlikely(err))
+			WL_ERR(("Could not run gscan:%d \n", err));
+
+	} else {
+		err = -1;
+	}
+
+	return err;
+}
+
+static int wl_cfgvendor_set_scan_cfg(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	gscan_scan_params_t *scan_param;
+	int j = 0;
+	int type, tmp, tmp1, tmp2, k = 0;
+	const struct nlattr *iter, *iter1, *iter2;
+	struct dhd_pno_gscan_channel_bucket  *ch_bucket;
+
+	scan_param = kzalloc(sizeof(gscan_scan_params_t), GFP_KERNEL);
+	if (!scan_param) {
+		WL_ERR(("Could not set GSCAN scan cfg, mem alloc failure\n"));
+		err = -EINVAL;
+		return err;
+
+	}
+
+	scan_param->scan_fr = PNO_SCAN_MIN_FW_SEC;
+	nla_for_each_attr(iter, data, len, tmp) {
+		type = nla_type(iter);
+
+		if (j >= GSCAN_MAX_CH_BUCKETS)
+			break;
+
+		switch (type) {
+			case GSCAN_ATTRIBUTE_BASE_PERIOD:
+				scan_param->scan_fr = nla_get_u32(iter)/1000;
+				break;
+			case GSCAN_ATTRIBUTE_NUM_BUCKETS:
+				scan_param->nchannel_buckets = nla_get_u32(iter);
+				break;
+			case GSCAN_ATTRIBUTE_CH_BUCKET_1:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_2:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_3:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_4:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_5:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_6:
+			case GSCAN_ATTRIBUTE_CH_BUCKET_7:
+				nla_for_each_nested(iter1, iter, tmp1) {
+					type = nla_type(iter1);
+					ch_bucket =
+					scan_param->channel_bucket;
+
+					switch (type) {
+						case GSCAN_ATTRIBUTE_BUCKET_ID:
+						break;
+						case GSCAN_ATTRIBUTE_BUCKET_PERIOD:
+							ch_bucket[j].bucket_freq_multiple =
+							    nla_get_u32(iter1)/1000;
+							break;
+						case GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS:
+							ch_bucket[j].num_channels =
+							     nla_get_u32(iter1);
+							break;
+						case GSCAN_ATTRIBUTE_BUCKET_CHANNELS:
+							nla_for_each_nested(iter2, iter1, tmp2) {
+								if (k >= PFN_SWC_RSSI_WINDOW_MAX)
+									break;
+								ch_bucket[j].chan_list[k] =
+								     nla_get_u32(iter2);
+								k++;
+							}
+							k = 0;
+							break;
+						case GSCAN_ATTRIBUTE_BUCKETS_BAND:
+							ch_bucket[j].band = (uint16)
+							     nla_get_u32(iter1);
+							break;
+						case GSCAN_ATTRIBUTE_REPORT_EVENTS:
+							ch_bucket[j].report_flag = (uint8)
+							     nla_get_u32(iter1);
+							break;
+					}
+				}
+				j++;
+				break;
+		}
+	}
+
+	if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg),
+	     DHD_PNO_SCAN_CFG_ID, scan_param, 0) < 0) {
+		WL_ERR(("Could not set GSCAN scan cfg\n"));
+		err = -EINVAL;
+	}
+
+	kfree(scan_param);
+	return err;
+
+}
+
+static int wl_cfgvendor_hotlist_cfg(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	gscan_hotlist_scan_params_t *hotlist_params;
+	int tmp, tmp1, tmp2, type, j = 0, dummy;
+	const struct nlattr *outer, *inner, *iter;
+	uint8 flush = 0;
+	struct bssid_t *pbssid;
+
+	hotlist_params = (gscan_hotlist_scan_params_t *)kzalloc(len, GFP_KERNEL);
+	if (!hotlist_params) {
+		WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes \n", len));
+		return -1;
+	}
+
+	hotlist_params->lost_ap_window = GSCAN_LOST_AP_WINDOW_DEFAULT;
+
+	nla_for_each_attr(iter, data, len, tmp2) {
+		type = nla_type(iter);
+		switch (type) {
+			case GSCAN_ATTRIBUTE_HOTLIST_BSSIDS:
+				pbssid = hotlist_params->bssid;
+				nla_for_each_nested(outer, iter, tmp) {
+					nla_for_each_nested(inner, outer, tmp1) {
+						type = nla_type(inner);
+
+						switch (type) {
+							case GSCAN_ATTRIBUTE_BSSID:
+								memcpy(&(pbssid[j].macaddr),
+								  nla_data(inner), ETHER_ADDR_LEN);
+								break;
+							case GSCAN_ATTRIBUTE_RSSI_LOW:
+								pbssid[j].rssi_reporting_threshold =
+								         (int8) nla_get_u8(inner);
+								break;
+							case GSCAN_ATTRIBUTE_RSSI_HIGH:
+								dummy = (int8) nla_get_u8(inner);
+								break;
+						}
+					}
+					j++;
+				}
+				hotlist_params->nbssid = j;
+				break;
+			case GSCAN_ATTRIBUTE_HOTLIST_FLUSH:
+				flush = nla_get_u8(iter);
+				break;
+			case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE:
+				hotlist_params->lost_ap_window = nla_get_u32(iter);
+				break;
+			}
+
+	}
+
+	if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg),
+	      DHD_PNO_GEOFENCE_SCAN_CFG_ID, hotlist_params, flush) < 0) {
+		WL_ERR(("Could not set GSCAN HOTLIST cfg\n"));
+		err = -EINVAL;
+		goto exit;
+	}
+exit:
+	kfree(hotlist_params);
+	return err;
+}
+static int wl_cfgvendor_set_batch_scan_cfg(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0, tmp, type;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	gscan_batch_params_t batch_param;
+	const struct nlattr *iter;
+
+	batch_param.mscan = batch_param.bestn = 0;
+	batch_param.buffer_threshold = GSCAN_BATCH_NO_THR_SET;
+
+	nla_for_each_attr(iter, data, len, tmp) {
+		type = nla_type(iter);
+
+		switch (type) {
+			case GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN:
+				batch_param.bestn = nla_get_u32(iter);
+				break;
+			case GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE:
+				batch_param.mscan = nla_get_u32(iter);
+				break;
+			case GSCAN_ATTRIBUTE_REPORT_THRESHOLD:
+				batch_param.buffer_threshold = nla_get_u32(iter);
+				break;
+		}
+	}
+
+	if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg),
+	       DHD_PNO_BATCH_SCAN_CFG_ID, &batch_param, 0) < 0) {
+		WL_ERR(("Could not set batch cfg\n"));
+		err = -EINVAL;
+		return err;
+	}
+
+	return err;
+}
+
+static int wl_cfgvendor_significant_change_cfg(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	gscan_swc_params_t *significant_params;
+	int tmp, tmp1, tmp2, type, j = 0;
+	const struct nlattr *outer, *inner, *iter;
+	uint8 flush = 0;
+	wl_pfn_significant_bssid_t *pbssid;
+
+	significant_params = (gscan_swc_params_t *) kzalloc(len, GFP_KERNEL);
+	if (!significant_params) {
+		WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes \n", len));
+		return -1;
+	}
+
+
+	nla_for_each_attr(iter, data, len, tmp2) {
+		type = nla_type(iter);
+
+		switch (type) {
+			case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH:
+			flush = nla_get_u8(iter);
+			break;
+			case GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE:
+				significant_params->rssi_window = nla_get_u16(iter);
+				break;
+			case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE:
+				significant_params->lost_ap_window = nla_get_u16(iter);
+				break;
+			case GSCAN_ATTRIBUTE_MIN_BREACHING:
+				significant_params->swc_threshold = nla_get_u16(iter);
+				break;
+			case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS:
+				pbssid = significant_params->bssid_elem_list;
+				nla_for_each_nested(outer, iter, tmp) {
+					nla_for_each_nested(inner, outer, tmp1) {
+							switch (nla_type(inner)) {
+								case GSCAN_ATTRIBUTE_BSSID:
+								memcpy(&(pbssid[j].macaddr),
+								     nla_data(inner),
+								     ETHER_ADDR_LEN);
+								break;
+								case GSCAN_ATTRIBUTE_RSSI_HIGH:
+								pbssid[j].rssi_high_threshold =
+								       (int8) nla_get_u8(inner);
+								break;
+								case GSCAN_ATTRIBUTE_RSSI_LOW:
+								pbssid[j].rssi_low_threshold =
+								      (int8) nla_get_u8(inner);
+								break;
+							}
+						}
+					j++;
+				}
+				break;
+		}
+	}
+	significant_params->nbssid = j;
+
+	if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg),
+	    DHD_PNO_SIGNIFICANT_SCAN_CFG_ID, significant_params, flush) < 0) {
+		WL_ERR(("Could not set GSCAN significant cfg\n"));
+		err = -EINVAL;
+		goto exit;
+	}
+exit:
+	kfree(significant_params);
+	return err;
+}
+#endif /* GSCAN_SUPPORT */
+
+#if defined(RTT_SUPPORT) && 0
+void wl_cfgvendor_rtt_evt(void *ctx, void *rtt_data)
+{
+	struct wireless_dev *wdev = (struct wireless_dev *)ctx;
+	struct wiphy *wiphy;
+	struct sk_buff *skb;
+	uint32 tot_len = NLMSG_DEFAULT_SIZE, entry_len = 0;
+	gfp_t kflags;
+	rtt_report_t *rtt_report = NULL;
+	rtt_result_t *rtt_result = NULL;
+	struct list_head *rtt_list;
+	wiphy = wdev->wiphy;
+
+	WL_DBG(("In\n"));
+	/* Push the data to the skb */
+	if (!rtt_data) {
+		WL_ERR(("rtt_data is NULL\n"));
+		goto exit;
+	}
+	rtt_list = (struct list_head *)rtt_data;
+	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
+	/* Alloc the SKB for vendor_event */
+	skb = ssv_cfg80211_vendor_event_alloc(wiphy, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags);
+	if (!skb) {
+		WL_ERR(("skb alloc failed"));
+		goto exit;
+	}
+	/* fill in the rtt results on each entry */
+	list_for_each_entry(rtt_result, rtt_list, list) {
+		entry_len = 0;
+		if (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) {
+			entry_len = sizeof(rtt_report_t);
+			rtt_report = kzalloc(entry_len, kflags);
+			if (!rtt_report) {
+				WL_ERR(("rtt_report alloc failed"));
+				goto exit;
+			}
+			rtt_report->addr = rtt_result->peer_mac;
+			rtt_report->num_measurement = 1; /* ONE SHOT */
+			rtt_report->status = rtt_result->err_code;
+			rtt_report->type = (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) ? RTT_ONE_WAY: RTT_TWO_WAY;
+			rtt_report->peer = rtt_result->target_info->peer;
+			rtt_report->channel = rtt_result->target_info->channel;
+			rtt_report->rssi = rtt_result->avg_rssi;
+			/* tx_rate */
+			rtt_report->tx_rate = rtt_result->tx_rate;
+			/* RTT */
+			rtt_report->rtt = rtt_result->meanrtt;
+			rtt_report->rtt_sd = rtt_result->sdrtt;
+			/* convert to centi meter */
+			if (rtt_result->distance != 0xffffffff)
+				rtt_report->distance = (rtt_result->distance >> 2) * 25;
+			else /* invalid distance */
+				rtt_report->distance = -1;
+
+			rtt_report->ts = rtt_result->ts;
+			nla_append(skb, entry_len, rtt_report);
+			kfree(rtt_report);
+		}
+	}
+	ssv_cfg80211_vendor_event(skb, kflags);
+exit:
+	return;
+}
+
+static int wl_cfgvendor_rtt_set_config(struct wiphy *wiphy, struct wireless_dev *wdev,
+					const void *data, int len) {
+	int err = 0, rem, rem1, rem2, type;
+	rtt_config_params_t rtt_param;
+	rtt_target_info_t* rtt_target = NULL;
+	const struct nlattr *iter, *iter1, *iter2;
+	int8 eabuf[ETHER_ADDR_STR_LEN];
+	int8 chanbuf[CHANSPEC_STR_LEN];
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+
+	WL_DBG(("In\n"));
+	err = dhd_dev_rtt_register_noti_callback(wdev->netdev, wdev, wl_cfgvendor_rtt_evt);
+	if (err < 0) {
+		WL_ERR(("failed to register rtt_noti_callback\n"));
+		goto exit;
+	}
+	memset(&rtt_param, 0, sizeof(rtt_param));
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+		case RTT_ATTRIBUTE_TARGET_CNT:
+			rtt_param.rtt_target_cnt = nla_get_u8(iter);
+			if (rtt_param.rtt_target_cnt > RTT_MAX_TARGET_CNT) {
+				WL_ERR(("exceed max target count : %d\n",
+					rtt_param.rtt_target_cnt));
+				err = BCME_RANGE;
+			}
+			break;
+		case RTT_ATTRIBUTE_TARGET_INFO:
+			rtt_target = rtt_param.target_info;
+			nla_for_each_nested(iter1, iter, rem1) {
+				nla_for_each_nested(iter2, iter1, rem2) {
+					type = nla_type(iter2);
+					switch (type) {
+					case RTT_ATTRIBUTE_TARGET_MAC:
+						memcpy(&rtt_target->addr, nla_data(iter2), ETHER_ADDR_LEN);
+						break;
+					case RTT_ATTRIBUTE_TARGET_TYPE:
+						rtt_target->type = nla_get_u8(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_PEER:
+						rtt_target->peer= nla_get_u8(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_CHAN:
+						memcpy(&rtt_target->channel, nla_data(iter2),
+							sizeof(rtt_target->channel));
+						break;
+					case RTT_ATTRIBUTE_TARGET_MODE:
+						rtt_target->continuous = nla_get_u8(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_INTERVAL:
+						rtt_target->interval = nla_get_u32(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT:
+						rtt_target->measure_cnt = nla_get_u32(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_NUM_PKT:
+						rtt_target->ftm_cnt = nla_get_u32(iter2);
+						break;
+					case RTT_ATTRIBUTE_TARGET_NUM_RETRY:
+						rtt_target->retry_cnt = nla_get_u32(iter2);
+					}
+				}
+				/* convert to chanspec value */
+				rtt_target->chanspec = dhd_rtt_convert_to_chspec(rtt_target->channel);
+				if (rtt_target->chanspec == 0) {
+					WL_ERR(("Channel is not valid \n"));
+					goto exit;
+				}
+				WL_INFORM(("Target addr %s, Channel : %s for RTT \n",
+					bcm_ether_ntoa((const struct ether_addr *)&rtt_target->addr, eabuf),
+					wf_chspec_ntoa(rtt_target->chanspec, chanbuf)));
+				rtt_target++;
+			}
+			break;
+		}
+	}
+	WL_DBG(("leave :target_cnt : %d\n", rtt_param.rtt_target_cnt));
+	if (dhd_dev_rtt_set_cfg(bcmcfg_to_prmry_ndev(cfg), &rtt_param) < 0) {
+		WL_ERR(("Could not set RTT configuration\n"));
+		err = -EINVAL;
+	}
+exit:
+	return err;
+}
+
+static int wl_cfgvendor_rtt_cancel_config(struct wiphy *wiphy, struct wireless_dev *wdev,
+					const void *data, int len)
+{
+	int err = 0, rem, type, target_cnt = 0;
+	const struct nlattr *iter;
+	struct ether_addr *mac_list = NULL, *mac_addr = NULL;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+		case RTT_ATTRIBUTE_TARGET_CNT:
+			target_cnt = nla_get_u8(iter);
+			mac_list = (struct ether_addr *)kzalloc(target_cnt * ETHER_ADDR_LEN , GFP_KERNEL);
+			if (mac_list == NULL) {
+				WL_ERR(("failed to allocate mem for mac list\n"));
+				goto exit;
+			}
+			mac_addr = &mac_list[0];
+			break;
+		case RTT_ATTRIBUTE_TARGET_MAC:
+			if (mac_addr)
+				memcpy(mac_addr++, nla_data(iter), ETHER_ADDR_LEN);
+			else {
+				WL_ERR(("mac_list is NULL\n"));
+				goto exit;
+			}
+			break;
+		}
+		if (dhd_dev_rtt_cancel_cfg(bcmcfg_to_prmry_ndev(cfg), mac_list, target_cnt) < 0) {
+			WL_ERR(("Could not cancel RTT configuration\n"));
+			err = -EINVAL;
+			goto exit;
+		}
+	}
+exit:
+	if (mac_list)
+		kfree(mac_list);
+	return err;
+}
+static int wl_cfgvendor_rtt_get_capability(struct wiphy *wiphy, struct wireless_dev *wdev,
+					const void *data, int len)
+{
+	int err = 0;
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	rtt_capabilities_t capability;
+
+	err = dhd_dev_rtt_capability(bcmcfg_to_prmry_ndev(cfg), &capability);
+	if (unlikely(err)) {
+		WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+		goto exit;
+	}
+	err =  ssv_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg),
+	        &capability, sizeof(capability));
+
+	if (unlikely(err)) {
+		WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+	}
+exit:
+	return err;
+}
+
+#endif /* RTT_SUPPORT */
+static int wl_cfgvendor_priv_string_handler(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	u8 resp[1] = {'\0'};
+
+	DBG_SSV_LEVEL(_drv_always_, FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
+	err =  ssv_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), resp, 1);
+	if (unlikely(err))
+		DBG_SSV_LEVEL(_drv_err_, FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n"
+			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err);
+
+	return err;
+#if 0
+	struct bcm_cfg80211 *cfg = wiphy_priv(wiphy);
+	int err = 0;
+	int data_len = 0;
+
+	bzero(cfg->ioctl_buf, WLC_IOCTL_MAXLEN);
+
+	if (strncmp((char *)data, RTK_VENDOR_SCMD_CAPA, strlen(RTK_VENDOR_SCMD_CAPA)) == 0) {
+		err = wldev_iovar_getbuf(bcmcfg_to_prmry_ndev(cfg), "cap", NULL, 0,
+			cfg->ioctl_buf, WLC_IOCTL_MAXLEN, &cfg->ioctl_buf_sync);
+		if (unlikely(err)) {
+			WL_ERR(("error (%d)\n", err));
+			return err;
+		}
+		data_len = strlen(cfg->ioctl_buf);
+		cfg->ioctl_buf[data_len] = '\0';
+	}
+
+	err =  ssv_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg),
+		cfg->ioctl_buf, data_len+1);
+	if (unlikely(err))
+		WL_ERR(("Vendor Command reply failed ret:%d \n", err));
+	else
+		WL_INFORM(("Vendor Command reply sent successfully!\n"));
+
+	return err;
+#endif
+}
+
+static const struct wiphy_vendor_command ssv_vendor_cmds [] = {
+	{
+		{
+			.vendor_id = OUI_SSV,
+			.subcmd = RTK_VENDOR_SCMD_PRIV_STR
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_priv_string_handler
+	},
+#if defined(GSCAN_SUPPORT) && 0
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_GET_CAPABILITIES
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_gscan_get_capabilities
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_SET_CONFIG
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_set_scan_cfg
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_SET_SCAN_CONFIG
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_set_batch_scan_cfg
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_ENABLE_GSCAN
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_initiate_gscan
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_enable_full_scan_result
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_SET_HOTLIST
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_hotlist_cfg
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_significant_change_cfg
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_GET_SCAN_RESULTS
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_gscan_get_batch_results
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = GSCAN_SUBCMD_GET_CHANNEL_LIST
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_gscan_get_channel_list
+	},
+#endif /* GSCAN_SUPPORT */
+#if defined(RTT_SUPPORT) && 0
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = RTT_SUBCMD_SET_CONFIG
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_rtt_set_config
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = RTT_SUBCMD_CANCEL_CONFIG
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_rtt_cancel_config
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = RTT_SUBCMD_GETCAPABILITY
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = wl_cfgvendor_rtt_get_capability
+	},
+#endif /* RTT_SUPPORT */
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = ANDR_WIFI_SUBCMD_GET_FEATURE_SET
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = ssv_cfgvendor_get_feature_set
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = ANDR_WIFI_SUBCMD_GET_FEATURE_SET_MATRIX
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = ssv_cfgvendor_get_feature_set_matrix
+	}
+};
+
+static const struct  nl80211_vendor_cmd_info ssv_vendor_events [] = {
+		{ OUI_SSV, RTK_VENDOR_EVENT_UNSPEC },
+		{ OUI_SSV, RTK_VENDOR_EVENT_PRIV_STR },
+#if defined(GSCAN_SUPPORT) && 0
+		{ OUI_GOOGLE, GOOGLE_GSCAN_SIGNIFICANT_EVENT },
+		{ OUI_GOOGLE, GOOGLE_GSCAN_GEOFENCE_FOUND_EVENT },
+		{ OUI_GOOGLE, GOOGLE_GSCAN_BATCH_SCAN_EVENT },
+		{ OUI_GOOGLE, GOOGLE_SCAN_FULL_RESULTS_EVENT },
+#endif /* GSCAN_SUPPORT */
+#if defined(RTT_SUPPORT) && 0
+		{ OUI_GOOGLE, GOOGLE_RTT_COMPLETE_EVENT },
+#endif /* RTT_SUPPORT */
+#if defined(GSCAN_SUPPORT) && 0
+		{ OUI_GOOGLE, GOOGLE_SCAN_COMPLETE_EVENT },
+		{ OUI_GOOGLE, GOOGLE_GSCAN_GEOFENCE_LOST_EVENT }
+#endif /* GSCAN_SUPPORT */
+};
+
+int ssv_cfgvendor_attach(struct wiphy *wiphy)
+{
+
+	DBG_SSV("Register SSV cfg80211 vendor cmd(0x%x) interface \n", NL80211_CMD_VENDOR);
+
+	wiphy->vendor_commands	= ssv_vendor_cmds;
+	wiphy->n_vendor_commands = ARRAY_SIZE(ssv_vendor_cmds);
+	wiphy->vendor_events	= ssv_vendor_events;
+	wiphy->n_vendor_events	= ARRAY_SIZE(ssv_vendor_events);
+
+	return 0;
+}
+
+int ssv_cfgvendor_detach(struct wiphy *wiphy)
+{
+	DBG_SSV("Vendor: Unregister SSV cfg80211 vendor interface \n");
+
+	wiphy->vendor_commands  = NULL;
+	wiphy->vendor_events    = NULL;
+	wiphy->n_vendor_commands = 0;
+	wiphy->n_vendor_events  = 0;
+
+	return 0;
+}
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(SSV_VENDOR_EXT_SUPPORT) */
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.h
new file mode 100644
index 0000000000000..2f8e74e24681b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_cfgvendor.h
@@ -0,0 +1,245 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#ifndef _RTW_CFGVENDOR_H_
+#define _RTW_CFGVENDOR_H_
+
+#define OUI_SSV		0x00E04C
+#define OUI_GOOGLE	0x001A11
+#define ATTRIBUTE_U32_LEN                  (NLA_HDRLEN  + 4)
+#define VENDOR_ID_OVERHEAD                 ATTRIBUTE_U32_LEN
+#define VENDOR_SUBCMD_OVERHEAD             ATTRIBUTE_U32_LEN
+#define VENDOR_DATA_OVERHEAD               (NLA_HDRLEN)
+
+#define SCAN_RESULTS_COMPLETE_FLAG_LEN       ATTRIBUTE_U32_LEN
+#define SCAN_INDEX_HDR_LEN                   (NLA_HDRLEN)
+#define SCAN_ID_HDR_LEN                      ATTRIBUTE_U32_LEN
+#define SCAN_FLAGS_HDR_LEN                   ATTRIBUTE_U32_LEN
+#define GSCAN_NUM_RESULTS_HDR_LEN            ATTRIBUTE_U32_LEN
+#define GSCAN_RESULTS_HDR_LEN                (NLA_HDRLEN)
+#define GSCAN_BATCH_RESULT_HDR_LEN  (SCAN_INDEX_HDR_LEN + SCAN_ID_HDR_LEN + \
+									SCAN_FLAGS_HDR_LEN + \
+							        GSCAN_NUM_RESULTS_HDR_LEN + \
+									GSCAN_RESULTS_HDR_LEN)
+
+#define VENDOR_REPLY_OVERHEAD       (VENDOR_ID_OVERHEAD + \
+									VENDOR_SUBCMD_OVERHEAD + \
+									VENDOR_DATA_OVERHEAD)
+typedef enum {
+	/* don't use 0 as a valid subcommand */
+	VENDOR_NL80211_SUBCMD_UNSPECIFIED,
+
+	/* define all vendor startup commands between 0x0 and 0x0FFF */
+	VENDOR_NL80211_SUBCMD_RANGE_START = 0x0001,
+	VENDOR_NL80211_SUBCMD_RANGE_END   = 0x0FFF,
+
+	/* define all GScan related commands between 0x1000 and 0x10FF */
+	ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START = 0x1000,
+	ANDROID_NL80211_SUBCMD_GSCAN_RANGE_END   = 0x10FF,
+
+	/* define all NearbyDiscovery related commands between 0x1100 and 0x11FF */
+	ANDROID_NL80211_SUBCMD_NBD_RANGE_START = 0x1100,
+	ANDROID_NL80211_SUBCMD_NBD_RANGE_END   = 0x11FF,
+
+	/* define all RTT related commands between 0x1100 and 0x11FF */
+	ANDROID_NL80211_SUBCMD_RTT_RANGE_START = 0x1100,
+	ANDROID_NL80211_SUBCMD_RTT_RANGE_END   = 0x11FF,
+
+	ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START = 0x1200,
+	ANDROID_NL80211_SUBCMD_LSTATS_RANGE_END   = 0x12FF,
+
+	ANDROID_NL80211_SUBCMD_TDLS_RANGE_START = 0x1300,
+	ANDROID_NL80211_SUBCMD_TDLS_RANGE_END	= 0x13FF,
+	/* This is reserved for future usage */
+
+} ANDROID_VENDOR_SUB_COMMAND;
+
+enum wl_vendor_subcmd {
+	RTK_VENDOR_SCMD_UNSPEC,
+	RTK_VENDOR_SCMD_PRIV_STR,
+	GSCAN_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START,
+	GSCAN_SUBCMD_SET_CONFIG,
+	GSCAN_SUBCMD_SET_SCAN_CONFIG,
+	GSCAN_SUBCMD_ENABLE_GSCAN,
+	GSCAN_SUBCMD_GET_SCAN_RESULTS,
+	GSCAN_SUBCMD_SCAN_RESULTS,
+	GSCAN_SUBCMD_SET_HOTLIST,
+	GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG,
+	GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS,
+	GSCAN_SUBCMD_GET_CHANNEL_LIST,
+	ANDR_WIFI_SUBCMD_GET_FEATURE_SET,
+	ANDR_WIFI_SUBCMD_GET_FEATURE_SET_MATRIX,
+	RTT_SUBCMD_SET_CONFIG = ANDROID_NL80211_SUBCMD_RTT_RANGE_START,
+	RTT_SUBCMD_CANCEL_CONFIG,
+	RTT_SUBCMD_GETCAPABILITY,
+    /* Add more sub commands here */
+    VENDOR_SUBCMD_MAX
+};
+
+enum gscan_attributes {
+    GSCAN_ATTRIBUTE_NUM_BUCKETS = 10,
+    GSCAN_ATTRIBUTE_BASE_PERIOD,
+    GSCAN_ATTRIBUTE_BUCKETS_BAND,
+    GSCAN_ATTRIBUTE_BUCKET_ID,
+    GSCAN_ATTRIBUTE_BUCKET_PERIOD,
+    GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS,
+    GSCAN_ATTRIBUTE_BUCKET_CHANNELS,
+    GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN,
+    GSCAN_ATTRIBUTE_REPORT_THRESHOLD,
+    GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE,
+    GSCAN_ATTRIBUTE_BAND = GSCAN_ATTRIBUTE_BUCKETS_BAND,
+
+    GSCAN_ATTRIBUTE_ENABLE_FEATURE = 20,
+    GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE,
+    GSCAN_ATTRIBUTE_FLUSH_FEATURE,
+    GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS,
+    GSCAN_ATTRIBUTE_REPORT_EVENTS,
+    /* remaining reserved for additional attributes */
+    GSCAN_ATTRIBUTE_NUM_OF_RESULTS = 30,
+    GSCAN_ATTRIBUTE_FLUSH_RESULTS,
+    GSCAN_ATTRIBUTE_SCAN_RESULTS,                       /* flat array of wifi_scan_result */
+    GSCAN_ATTRIBUTE_SCAN_ID,                            /* indicates scan number */
+    GSCAN_ATTRIBUTE_SCAN_FLAGS,                         /* indicates if scan was aborted */
+    GSCAN_ATTRIBUTE_AP_FLAGS,                           /* flags on significant change event */
+    GSCAN_ATTRIBUTE_NUM_CHANNELS,
+    GSCAN_ATTRIBUTE_CHANNEL_LIST,
+
+	/* remaining reserved for additional attributes */
+
+    GSCAN_ATTRIBUTE_SSID = 40,
+    GSCAN_ATTRIBUTE_BSSID,
+    GSCAN_ATTRIBUTE_CHANNEL,
+    GSCAN_ATTRIBUTE_RSSI,
+    GSCAN_ATTRIBUTE_TIMESTAMP,
+    GSCAN_ATTRIBUTE_RTT,
+    GSCAN_ATTRIBUTE_RTTSD,
+
+    /* remaining reserved for additional attributes */
+
+    GSCAN_ATTRIBUTE_HOTLIST_BSSIDS = 50,
+    GSCAN_ATTRIBUTE_RSSI_LOW,
+    GSCAN_ATTRIBUTE_RSSI_HIGH,
+    GSCAN_ATTRIBUTE_HOSTLIST_BSSID_ELEM,
+    GSCAN_ATTRIBUTE_HOTLIST_FLUSH,
+
+    /* remaining reserved for additional attributes */
+    GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE = 60,
+    GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE,
+    GSCAN_ATTRIBUTE_MIN_BREACHING,
+    GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS,
+    GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH,
+    GSCAN_ATTRIBUTE_MAX
+};
+
+enum gscan_bucket_attributes {
+	GSCAN_ATTRIBUTE_CH_BUCKET_1,
+	GSCAN_ATTRIBUTE_CH_BUCKET_2,
+	GSCAN_ATTRIBUTE_CH_BUCKET_3,
+	GSCAN_ATTRIBUTE_CH_BUCKET_4,
+	GSCAN_ATTRIBUTE_CH_BUCKET_5,
+	GSCAN_ATTRIBUTE_CH_BUCKET_6,
+	GSCAN_ATTRIBUTE_CH_BUCKET_7
+};
+
+enum gscan_ch_attributes {
+	GSCAN_ATTRIBUTE_CH_ID_1,
+	GSCAN_ATTRIBUTE_CH_ID_2,
+	GSCAN_ATTRIBUTE_CH_ID_3,
+	GSCAN_ATTRIBUTE_CH_ID_4,
+	GSCAN_ATTRIBUTE_CH_ID_5,
+	GSCAN_ATTRIBUTE_CH_ID_6,
+	GSCAN_ATTRIBUTE_CH_ID_7
+};
+
+enum rtt_attributes {
+	RTT_ATTRIBUTE_TARGET_CNT,
+	RTT_ATTRIBUTE_TARGET_INFO,
+	RTT_ATTRIBUTE_TARGET_MAC,
+	RTT_ATTRIBUTE_TARGET_TYPE,
+	RTT_ATTRIBUTE_TARGET_PEER,
+	RTT_ATTRIBUTE_TARGET_CHAN,
+	RTT_ATTRIBUTE_TARGET_MODE,
+	RTT_ATTRIBUTE_TARGET_INTERVAL,
+	RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT,
+	RTT_ATTRIBUTE_TARGET_NUM_PKT,
+	RTT_ATTRIBUTE_TARGET_NUM_RETRY
+};
+
+typedef enum wl_vendor_event {
+	RTK_VENDOR_EVENT_UNSPEC,
+	RTK_VENDOR_EVENT_PRIV_STR,
+	GOOGLE_GSCAN_SIGNIFICANT_EVENT,
+	GOOGLE_GSCAN_GEOFENCE_FOUND_EVENT,
+	GOOGLE_GSCAN_BATCH_SCAN_EVENT,
+	GOOGLE_SCAN_FULL_RESULTS_EVENT,
+	GOOGLE_RTT_COMPLETE_EVENT,
+	GOOGLE_SCAN_COMPLETE_EVENT,
+	GOOGLE_GSCAN_GEOFENCE_LOST_EVENT
+} wl_vendor_event_t;
+
+enum andr_wifi_feature_set_attr {
+    ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET,
+    ANDR_WIFI_ATTRIBUTE_FEATURE_SET
+};
+
+typedef enum wl_vendor_gscan_attribute {
+	ATTR_START_GSCAN,
+	ATTR_STOP_GSCAN,
+	ATTR_SET_SCAN_BATCH_CFG_ID, /* set batch scan params */
+	ATTR_SET_SCAN_GEOFENCE_CFG_ID, /* set list of bssids to track */
+	ATTR_SET_SCAN_SIGNIFICANT_CFG_ID, /* set list of bssids, rssi threshold etc.. */
+	ATTR_SET_SCAN_CFG_ID, /* set common scan config params here */
+	ATTR_GET_GSCAN_CAPABILITIES_ID,
+    /* Add more sub commands here */
+    ATTR_GSCAN_MAX
+} wl_vendor_gscan_attribute_t;
+
+typedef enum gscan_batch_attribute {
+	ATTR_GSCAN_BATCH_BESTN,
+	ATTR_GSCAN_BATCH_MSCAN,
+	ATTR_GSCAN_BATCH_BUFFER_THRESHOLD
+} gscan_batch_attribute_t;
+
+typedef enum gscan_geofence_attribute {
+	ATTR_GSCAN_NUM_HOTLIST_BSSID,
+	ATTR_GSCAN_HOTLIST_BSSID
+} gscan_geofence_attribute_t;
+
+typedef enum gscan_complete_event {
+	WIFI_SCAN_BUFFER_FULL,
+	WIFI_SCAN_COMPLETE
+} gscan_complete_event_t;
+
+/* Capture the RTK_VENDOR_SUBCMD_PRIV_STRINGS* here */
+#define RTK_VENDOR_SCMD_CAPA	"cap"
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(SSV_VENDOR_EXT_SUPPORT)
+extern int ssv_cfgvendor_attach(struct wiphy *wiphy);
+extern int ssv_cfgvendor_detach(struct wiphy *wiphy);
+extern int ssv_cfgvendor_send_async_event(struct wiphy *wiphy,
+                  struct net_device *dev, int event_id, const void  *data, int len);
+#if defined(GSCAN_SUPPORT) && 0
+extern int wl_cfgvendor_send_hotlist_event(struct wiphy *wiphy,
+                struct net_device *dev, void  *data, int len, wl_vendor_event_t event);
+#endif
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */
+
+#endif /* _RTW_CFGVENDOR_H_ */
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.c
new file mode 100644
index 0000000000000..75af81a0cc932
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.c
@@ -0,0 +1,637 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/version.h>
+#include <ssv6200.h>
+#include "dev.h"
+#include "ssv_ht_rc.h"
+#include "ssv_rc.h"
+#define SAMPLE_COUNT 4
+#define HT_CW_MIN 15
+#define HT_SEGMENT_SIZE 6000
+#define AVG_PKT_SIZE 12000
+#define SAMPLE_COLUMNS 10
+#define EWMA_LEVEL 75
+#define MCS_NBITS (AVG_PKT_SIZE << 3)
+#define MCS_NSYMS(bps) ((MCS_NBITS + (bps) - 1) / (bps))
+#define MCS_SYMBOL_TIME(sgi,syms) \
+    (sgi ? \
+      ((syms) * 18 + 4) / 5 : \
+      (syms) << 2 \
+    )
+#define MCS_DURATION(streams,sgi,bps) MCS_SYMBOL_TIME(sgi, MCS_NSYMS((streams) * (bps)))
+#define MCS_GROUP(_streams,_sgi,_ht40) { \
+    .duration = { \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 54 : 26), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 108 : 52), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 162 : 78), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 216 : 104), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 324 : 156), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 432 : 208), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 486 : 234), \
+        MCS_DURATION(_streams, _sgi, _ht40 ? 540 : 260) \
+    } \
+}
+const struct mcs_group minstrel_mcs_groups_ssv[] = {
+    MCS_GROUP(1, 0, 0),
+    MCS_GROUP(1, 1, 0),
+};
+const u16 ampdu_max_transmit_length[RATE_TABLE_SIZE] =
+{
+    0, 0, 0, 0, 0, 0, 0,
+    0, 0, 0, 0, 0, 0, 0, 0,
+    4600, 9200, 13800, 18500, 27700, 37000, 41600, 46200,
+    5100, 10200, 15400, 20500, 30800, 41100, 46200, 51300,
+    4600, 9200, 13800, 18500, 27700, 37000, 41600, 46200
+};
+static u8 sample_table[SAMPLE_COLUMNS][MCS_GROUP_RATES];
+static int minstrel_ewma(int old, int new, int weight)
+{
+    return (new * (100 - weight) + old * weight) / 100;
+}
+static inline struct minstrel_rate_stats *minstrel_get_ratestats(struct ssv62xx_ht *mi, int index)
+{
+    return &mi->groups.rates[index % MCS_GROUP_RATES];
+}
+static void minstrel_calc_rate_ewma(struct minstrel_rate_stats *mr)
+{
+    if (unlikely(mr->attempts > 0)) {
+        mr->sample_skipped = 0;
+        mr->cur_prob = MINSTREL_FRAC(mr->success, mr->attempts);
+        if (!mr->att_hist)
+            mr->probability = mr->cur_prob;
+        else
+            mr->probability = minstrel_ewma(mr->probability,
+                mr->cur_prob, EWMA_LEVEL);
+        mr->att_hist += mr->attempts;
+        mr->succ_hist += mr->success;
+    } else {
+        mr->sample_skipped++;
+    }
+    mr->last_success = mr->success;
+    mr->last_attempts = mr->attempts;
+    mr->success = 0;
+    mr->attempts = 0;
+}
+static void minstrel_ht_calc_tp(struct ssv62xx_ht *mi, struct ssv_sta_rc_info *rc_sta, int rate)
+{
+    struct minstrel_rate_stats *mr;
+    unsigned int usecs,group_id;
+    if(rc_sta->ht_rc_type == RC_TYPE_HT_LGI_20)
+        group_id = 0;
+    else
+        group_id = 1;
+    mr = &mi->groups.rates[rate];
+    if (mr->probability < MINSTREL_FRAC(1, 10)) {
+        mr->cur_tp = 0;
+        return;
+    }
+    usecs = mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
+    usecs += minstrel_mcs_groups_ssv[group_id].duration[rate];
+    mr->cur_tp = MINSTREL_TRUNC((1000000 / usecs) * mr->probability);
+}
+static void rate_control_ht_sample(struct ssv62xx_ht *mi,struct ssv_sta_rc_info *rc_sta)
+{
+    struct minstrel_mcs_group_data *mg;
+    struct minstrel_rate_stats *mr;
+    int cur_prob, cur_prob_tp, cur_tp, cur_tp2;
+    int i, index;
+    if (mi->ampdu_packets > 0) {
+        mi->avg_ampdu_len = minstrel_ewma(mi->avg_ampdu_len,
+            MINSTREL_FRAC(mi->ampdu_len, mi->ampdu_packets), EWMA_LEVEL);
+        mi->ampdu_len = 0;
+        mi->ampdu_packets = 0;
+    }
+    else
+        return;
+    mi->sample_slow = 0;
+    mi->sample_count = 0;
+    {
+        cur_prob = 0;
+        cur_prob_tp = 0;
+        cur_tp = 0;
+        cur_tp2 = 0;
+        mg = &mi->groups;
+        mg->max_tp_rate = 0;
+        mg->max_tp_rate2 = 0;
+        mg->max_prob_rate = 0;
+        for (i = 0; i < MCS_GROUP_RATES; i++) {
+            if (!(rc_sta->ht_supp_rates & BIT(i)))
+                continue;
+            mr = &mg->rates[i];
+            index = i;
+            minstrel_calc_rate_ewma(mr);
+            minstrel_ht_calc_tp(mi, rc_sta, i);
+#ifdef RATE_CONTROL_HT_PARAMETER_DEBUG
+            if(mr->cur_prob)
+                printk("rate[%d]probability[%08d]cur_prob[%08d]TP[%04d]\n",i,mr->probability,mr->cur_prob,mr->cur_tp);
+#endif
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+            printk("HT sample result max_tp_rate[%d]max_tp_rate2[%d]max_prob_rate[%d]\n",mg->max_tp_rate,mg->max_tp_rate2,mg->max_prob_rate);
+            printk("rate[%d]probability[%08d]TP[%d]\n",i,mr->probability,mr->cur_tp);
+#endif
+            if (!mr->cur_tp)
+                continue;
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+            printk("HT--1 mr->cur_tp[%d]cur_prob_tp[%d]\n",mr->cur_tp,cur_prob_tp);
+#endif
+            if ((mr->cur_tp > cur_prob_tp && mr->probability >
+                 MINSTREL_FRAC(3, 4)) || mr->probability > cur_prob) {
+                mg->max_prob_rate = index;
+                cur_prob = mr->probability;
+                cur_prob_tp = mr->cur_tp;
+            }
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+            printk("HT--2 mr->cur_tp[%d]cur_tp[%d]\n",mr->cur_tp,cur_tp);
+#endif
+            if (mr->cur_tp > cur_tp) {
+                swap(index, mg->max_tp_rate);
+                cur_tp = mr->cur_tp;
+                mr = minstrel_get_ratestats(mi, index);
+            }
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+            if(index != i)
+                printk("HT--3 index[%d]i[%d]mg->max_tp_rate[%d]\n",index,i,mg->max_tp_rate);
+#endif
+            if (index >= mg->max_tp_rate)
+                continue;
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+            if(index != i)
+                printk("HT--4 mr->cur_tp[%d]cur_tp2[%d]\n",mr->cur_tp,cur_tp2);
+#endif
+            if (mr->cur_tp > cur_tp2) {
+                mg->max_tp_rate2 = index;
+                cur_tp2 = mr->cur_tp;
+            }
+        }
+    }
+    mi->sample_count = SAMPLE_COUNT;
+#if 0
+    cur_prob = 0;
+    cur_prob_tp = 0;
+    cur_tp = 0;
+    cur_tp2 = 0;
+    {
+        mg = &mi->groups;
+        mr = minstrel_get_ratestats(mi, mg->max_prob_rate);
+        if (cur_prob_tp < mr->cur_tp) {
+            mi->max_prob_rate = mg->max_prob_rate;
+            cur_prob = mr->cur_prob;
+            cur_prob_tp = mr->cur_tp;
+        }
+        mr = minstrel_get_ratestats(mi, mg->max_tp_rate);
+        if (cur_tp < mr->cur_tp) {
+            mi->max_tp_rate2 = mi->max_tp_rate;
+            cur_tp2 = cur_tp;
+            mi->max_tp_rate = mg->max_tp_rate;
+            cur_tp = mr->cur_tp;
+        }
+        mr = minstrel_get_ratestats(mi, mg->max_tp_rate2);
+        if (cur_tp2 < mr->cur_tp) {
+            mi->max_tp_rate2 = mg->max_tp_rate2;
+            cur_tp2 = mr->cur_tp;
+        }
+    }
+#else
+    mi->max_tp_rate = mg->max_tp_rate;
+    mi->max_tp_rate2 = mg->max_tp_rate2;
+    mi->max_prob_rate = mg->max_prob_rate;
+#endif
+#ifdef RATE_CONTROL_HT_STUPID_DEBUG
+        printk("HT sample result max_tp_rate[%d]max_tp_rate2[%d]max_prob_rate[%d]\n",mi->max_tp_rate,mi->max_tp_rate2,mi->max_prob_rate);
+#endif
+    mi->stats_update = jiffies;
+}
+#if 0
+static void minstrel_calc_retransmit(struct ssv62xx_ht *mi,int index, struct ssv_sta_rc_info *rc_sta)
+{
+    struct minstrel_rate_stats *mr;
+    const struct mcs_group *group;
+    unsigned int tx_time, tx_time_rtscts, tx_time_data;
+    unsigned int cw = HT_CW_MIN;
+    unsigned int cw_max = 1023;
+    unsigned int ctime = 0;
+    unsigned int t_slot = 9;
+    unsigned int ampdu_len = MINSTREL_TRUNC(mi->avg_ampdu_len);
+    unsigned int group_id;
+    if(rc_sta->ht_rc_type == RC_TYPE_HT_LGI_20)
+        group_id = 0;
+    else
+        group_id = 1;
+    mr = minstrel_get_ratestats(mi, index);
+    if (mr->probability < MINSTREL_FRAC(1, 10)) {
+        mr->retry_count = 1;
+        mr->retry_count_rtscts = 1;
+        return;
+    }
+    mr->retry_count = 2;
+    mr->retry_count_rtscts = 2;
+    mr->retry_updated = true;
+    group = &minstrel_mcs_groups_ssv[group_id];
+    tx_time_data = group->duration[index % MCS_GROUP_RATES] * ampdu_len;
+    ctime = (t_slot * cw) >> 1;
+    cw = min((cw << 1) | 1, cw_max);
+    ctime += (t_slot * cw) >> 1;
+    cw = min((cw << 1) | 1, cw_max);
+    tx_time = ctime + 2 * (mi->overhead + tx_time_data);
+    tx_time_rtscts = ctime + 2 * (mi->overhead_rtscts + tx_time_data);
+    do {
+        ctime = (t_slot * cw) >> 1;
+        cw = min((cw << 1) | 1, cw_max);
+        tx_time += ctime + mi->overhead + tx_time_data;
+        tx_time_rtscts += ctime + mi->overhead_rtscts + tx_time_data;
+        if (tx_time_rtscts < HT_SEGMENT_SIZE)
+            mr->retry_count_rtscts++;
+    } while ((tx_time < HT_SEGMENT_SIZE) &&
+             (++mr->retry_count < HW_MAX_RATE_TRIES));
+}
+#endif
+static void minstrel_ht_set_rate(struct ssv62xx_ht *mi,
+                     struct fw_rc_retry_params *rate, int index,
+                     bool sample, bool rtscts, struct ssv_sta_rc_info *rc_sta,
+                     struct ssv_rate_ctrl *ssv_rc)
+{
+    struct minstrel_rate_stats *mr;
+    mr = minstrel_get_ratestats(mi, index);
+#if 0
+    if (!mr->retry_updated)
+        minstrel_calc_retransmit(mi, index, rc_sta);
+    if (sample)
+        rate->count = 1;
+    else if (mr->probability < MINSTREL_FRAC(20, 100))
+        rate->count = 2;
+    else if (rtscts)
+        rate->count = mr->retry_count_rtscts;
+    else
+        rate->count = mr->retry_count;
+#endif
+    rate->drate = ssv_rc->rc_table[mr->rc_index].hw_rate_idx;
+    rate->crate = ssv_rc->rc_table[mr->rc_index].ctrl_rate_idx;
+}
+static inline int minstrel_get_duration(int index, struct ssv_sta_rc_info *rc_sta)
+{
+    unsigned int group_id;
+    const struct mcs_group *group;
+    if(rc_sta->ht_rc_type == RC_TYPE_HT_LGI_20)
+        group_id = 0;
+    else
+        group_id = 1;
+    group = &minstrel_mcs_groups_ssv[group_id];
+    return group->duration[index % MCS_GROUP_RATES];
+}
+static void minstrel_next_sample_idx(struct ssv62xx_ht *mi)
+{
+    struct minstrel_mcs_group_data *mg;
+    for (;;) {
+        mg = &mi->groups;
+        if (++mg->index >= MCS_GROUP_RATES) {
+            mg->index = 0;
+            if (++mg->column >= ARRAY_SIZE(sample_table))
+                mg->column = 0;
+        }
+        break;
+    }
+}
+static int minstrel_get_sample_rate(struct ssv62xx_ht *mi, struct ssv_sta_rc_info *rc_sta)
+{
+    struct minstrel_rate_stats *mr;
+    struct minstrel_mcs_group_data *mg;
+    int sample_idx = 0;
+    if (mi->sample_wait > 0) {
+        mi->sample_wait--;
+        return -1;
+    }
+    if (!mi->sample_tries)
+        return -1;
+    mi->sample_tries--;
+    mg = &mi->groups;
+    sample_idx = sample_table[mg->column][mg->index];
+    mr = &mg->rates[sample_idx];
+    minstrel_next_sample_idx(mi);
+    if (minstrel_get_duration(sample_idx, rc_sta) >
+        minstrel_get_duration(mi->max_tp_rate, rc_sta)) {
+        if (mr->sample_skipped < 20)
+        {
+            return -1;
+        }
+        if (mi->sample_slow++ > 2)
+        {
+            return -1;
+        }
+    }
+    return sample_idx;
+}
+static void _fill_txinfo_rates (struct ssv_rate_ctrl *ssv_rc, struct sk_buff *skb, struct fw_rc_retry_params *ar)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+    info->control.rates[0].idx = ssv_rc->rc_table[ar[0].drate].dot11_rate_idx;
+    info->control.rates[0].count = 1;
+    info->control.rates[SSV_DRATE_IDX].count = ar[0].drate;
+    info->control.rates[SSV_CRATE_IDX].count = ar[0].crate;
+}
+extern const u16 ssv6xxx_rc_rate_set[RC_TYPE_MAX][13];
+s32 ssv62xx_ht_rate_update(struct sk_buff *skb, struct ssv_softc *sc, struct fw_rc_retry_params *ar)
+{
+    struct ssv_rate_ctrl *ssv_rc = sc->rc;
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ssv62xx_ht *mi = NULL;
+    int sample_idx;
+    bool sample = false;
+    struct ssv_sta_rc_info *rc_sta;
+    struct ssv_sta_priv_data *sta_priv;
+    struct rc_pid_sta_info *spinfo;
+    int ret = 0;
+    if (sc->sc_flags & SC_OP_FIXED_RATE)
+    {
+        ar[0].count = 3;
+        ar[0].drate = ssv_rc->rc_table[sc->max_rate_idx].hw_rate_idx;
+        ar[0].crate = ssv_rc->rc_table[sc->max_rate_idx].ctrl_rate_idx;
+        ar[1].count = 2;
+        ar[1].drate = ssv_rc->rc_table[sc->max_rate_idx].hw_rate_idx;
+        ar[1].crate = ssv_rc->rc_table[sc->max_rate_idx].ctrl_rate_idx;
+        ar[2].count = 2;
+        ar[2].drate = ssv_rc->rc_table[sc->max_rate_idx].hw_rate_idx;
+        ar[2].crate = ssv_rc->rc_table[sc->max_rate_idx].ctrl_rate_idx;
+        _fill_txinfo_rates(ssv_rc, skb, ar);
+        return ssv_rc->rc_table[sc->max_rate_idx].hw_rate_idx;
+    }
+    if(sta == NULL)
+    {
+        printk("@Q@...station NULL\n");
+        BUG_ON(1);
+    }
+    sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    rc_sta = &ssv_rc->sta_rc_info[sta_priv->rc_idx];
+    spinfo= &rc_sta->spinfo;
+    if ((rc_sta->rc_wsid >= SSV_RC_MAX_HARDWARE_SUPPORT) || (rc_sta->rc_wsid < 0))
+    {
+        struct ssv_sta_priv_data *ssv_sta_priv;
+        int rateidx=99;
+        ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+        {
+            if ((rc_sta->ht_rc_type >= RC_TYPE_HT_SGI_20) &&
+                (ssv_sta_priv->rx_data_rate < SSV62XX_RATE_MCS_INDEX))
+            {
+                if(ssv6xxx_rc_rate_set[rc_sta->ht_rc_type][0] == 12)
+                    rateidx = (int)rc_sta->pinfo.rinfo[4].rc_index;
+                else
+                    rateidx = (int)rc_sta->pinfo.rinfo[0].rc_index;
+        #if 0
+                printk("RC %d rx %d tx %d\n", ssv_sta_priv->sta_idx,
+                       ssv_sta_priv->rx_data_rate, rateidx);
+        #endif
+            }
+            else
+            {
+                rateidx = (int)ssv_sta_priv->rx_data_rate;
+                rateidx -= SSV62XX_RATE_MCS_INDEX;
+                rateidx %= 8;
+                if(rc_sta->ht_rc_type == RC_TYPE_HT_SGI_20)
+                    rateidx += SSV62XX_RATE_MCS_SGI_INDEX;
+                else if(rc_sta->ht_rc_type == RC_TYPE_HT_LGI_20)
+                    rateidx += SSV62XX_RATE_MCS_LGI_INDEX;
+                else
+                    rateidx += SSV62XX_RATE_MCS_GREENFIELD_INDEX;
+            }
+        }
+        ar[0].count = 3;
+        ar[2].drate = ar[1].drate = ar[0].drate = ssv_rc->rc_table[rateidx].hw_rate_idx;
+        ar[2].crate = ar[1].crate = ar[0].crate = ssv_rc->rc_table[rateidx].ctrl_rate_idx;
+        ar[1].count = 2;
+        ar[2].count = 2;
+        _fill_txinfo_rates(ssv_rc, skb, ar);
+        return rateidx;
+    }
+    mi = &rc_sta->ht;
+    sample_idx = minstrel_get_sample_rate(mi, rc_sta);
+    if (sample_idx >= 0) {
+        sample = true;
+        minstrel_ht_set_rate(mi, &ar[0], sample_idx,
+            true, false, rc_sta, ssv_rc);
+    } else {
+        minstrel_ht_set_rate(mi, &ar[0], mi->max_tp_rate,
+            false, false, rc_sta, ssv_rc);
+    }
+    ar[0].count = mi->first_try_count;
+    ret = ar[0].drate;
+    {
+        if (sample_idx >= 0)
+            minstrel_ht_set_rate(mi, &ar[1], mi->max_tp_rate,
+                false, false, rc_sta, ssv_rc);
+        else
+            minstrel_ht_set_rate(mi, &ar[1], mi->max_tp_rate2,
+                false, true, rc_sta, ssv_rc);
+        ar[1].count = mi->second_try_count;
+        if(ret > ar[1].drate)
+            ret = ar[1].drate;
+        minstrel_ht_set_rate(mi, &ar[2], mi->max_prob_rate,
+                     false, !sample, rc_sta, ssv_rc);
+        ar[2].count = mi->other_try_count;
+        if(ret > ar[2].drate)
+            ret = ar[2].drate;
+    }
+    mi->total_packets++;
+    if (mi->total_packets == ~0) {
+        mi->total_packets = 0;
+        mi->sample_packets = 0;
+    }
+    if(spinfo->real_hw_index < SSV62XX_RATE_MCS_INDEX)
+        return spinfo->real_hw_index;
+    _fill_txinfo_rates(ssv_rc, skb, ar);
+    return ret;
+}
+static void init_sample_table(void)
+{
+    int col, i, new_idx;
+    u8 rnd[MCS_GROUP_RATES];
+    memset(sample_table, 0xff, sizeof(sample_table));
+    for (col = 0; col < SAMPLE_COLUMNS; col++) {
+        for (i = 0; i < MCS_GROUP_RATES; i++) {
+            get_random_bytes(rnd, sizeof(rnd));
+            new_idx = (i + rnd[i]) % MCS_GROUP_RATES;
+            while (sample_table[col][new_idx] != 0xff)
+                new_idx = (new_idx + 1) % MCS_GROUP_RATES;
+            sample_table[col][new_idx] = i;
+        }
+    }
+}
+void ssv62xx_ht_rc_caps(const u16 ssv6xxx_rc_rate_set[RC_TYPE_MAX][13],struct ssv_sta_rc_info *rc_sta)
+{
+    struct ssv62xx_ht *mi = &rc_sta->ht;
+    int ack_dur;
+    int i;
+#if 1
+    unsigned int group_id;
+    if(rc_sta->ht_rc_type == RC_TYPE_HT_LGI_20)
+        group_id = 0;
+    else
+        group_id = 1;
+    for (i = 0; i < MCS_GROUP_RATES; i++) {
+            printk("[RC]HT duration[%d][%d]\n",i,minstrel_mcs_groups_ssv[group_id].duration[i]);
+    }
+#endif
+    init_sample_table();
+    memset(mi, 0, sizeof(*mi));
+    mi->stats_update = jiffies;
+    ack_dur = pide_frame_duration( 10, 60, 0, 0);
+    mi->overhead = pide_frame_duration( 0, 60, 0, 0) + ack_dur;
+    mi->overhead_rtscts = mi->overhead + 2 * ack_dur;
+    mi->avg_ampdu_len = MINSTREL_FRAC(1, 1);
+    mi->sample_count = 16;
+    mi->sample_wait = 0;
+    mi->sample_tries = 4;
+#ifdef DISABLE_RATE_CONTROL_SAMPLE
+    mi->max_tp_rate = MCS_GROUP_RATES - 1;
+    mi->max_tp_rate2 = MCS_GROUP_RATES - 1;
+    mi->max_prob_rate = MCS_GROUP_RATES - 1;
+#endif
+#if (HW_MAX_RATE_TRIES == 7)
+    {
+        mi->first_try_count = 3;
+        mi->second_try_count = 2;
+        mi->other_try_count = 2;
+    }
+#else
+    {
+        mi->first_try_count = 2;
+        mi->second_try_count = 1;
+        mi->other_try_count = 1;
+    }
+#endif
+    for (i = 0; i < MCS_GROUP_RATES; i++) {
+        mi->groups.rates[i].rc_index = ssv6xxx_rc_rate_set[rc_sta->ht_rc_type][i+1];
+    }
+}
+static bool minstrel_ht_txstat_valid(struct ssv62xx_tx_rate *rate)
+{
+    if (!rate->count)
+        return false;
+    if (rate->data_rate < 0)
+        return false;
+    return true;
+}
+void ssv6xxx_ht_report_handler(struct ssv_softc *sc,struct sk_buff *skb,struct ssv_sta_rc_info *rc_sta)
+{
+    struct cfg_host_event *host_event;
+    struct firmware_rate_control_report_data *report_data;
+    struct ssv62xx_ht *mi;
+    struct minstrel_rate_stats *rate;
+    bool last = false;
+    int i = 0;
+    u16 report_ampdu_packets = 0;
+    unsigned long period;
+    host_event = (struct cfg_host_event *)skb->data;
+    report_data = (struct firmware_rate_control_report_data *)&host_event->dat[0];
+    if(host_event->h_event == SOC_EVT_RC_AMPDU_REPORT) {
+#if 0
+        printk("SC HT AMPDU wsid[%d]ampdu_len[%d]ampdu_ack_len[%d]\n",report_data->wsid,report_data->ampdu_len,report_data->ampdu_ack_len);
+        for (i = 0; i < SSV62XX_TX_MAX_RATES ; i++) {
+            if(report_data->rates[i].data_rate == -1)
+                break;
+            if(report_data->rates[i].count == 0) {
+                    printk("*********************************\n");
+                    printk("       Illegal HT report         \n");
+                    printk("*********************************\n");
+            }
+            printk("        i=[%d] rate[%d] count[%d]\n",i,report_data->rates[i].data_rate,report_data->rates[i].count);
+        }
+#endif
+        report_ampdu_packets = 1;
+    }
+    else if(host_event->h_event == SOC_EVT_RC_MPDU_REPORT) {
+        report_data->ampdu_len = 1;
+        report_ampdu_packets = report_data->ampdu_len;
+#if 0
+        printk("SC MPDU wsid[%d]ampdu_len[%d]ampdu_ack_len[%d]\n",report_data->wsid,report_data->ampdu_len,report_data->ampdu_ack_len);
+        for (i = 0; i < SSV62XX_TX_MAX_RATES ; i++) {
+            if(report_data->rates[i].data_rate == -1)
+                break;
+            if(report_data->rates[i].count == 0) {
+                    printk("*********************************\n");
+                    printk("       Illegal MPDU report       \n");
+                    printk("*********************************\n");
+            }
+            printk("        i=[%d] rate[%d] count[%d]\n",i,report_data->rates[i].data_rate,report_data->rates[i].count);
+        }
+#endif
+    }
+    else
+    {
+        printk("RC work get garbage!!\n");
+        return;
+    }
+    mi = &rc_sta->ht;
+    mi->ampdu_packets += report_ampdu_packets;
+    mi->ampdu_len += report_data->ampdu_len;
+    if (!mi->sample_wait && !mi->sample_tries && mi->sample_count > 0) {
+        mi->sample_wait = 16 + 2 * MINSTREL_TRUNC(mi->avg_ampdu_len);
+        mi->sample_tries = 2;
+        mi->sample_count--;
+    }
+    for (i = 0; !last; i++) {
+        last = (i == SSV62XX_TX_MAX_RATES - 1) ||
+               !minstrel_ht_txstat_valid(&report_data->rates[i+1]);
+        if (!minstrel_ht_txstat_valid(&report_data->rates[i]))
+            break;
+#ifdef RATE_CONTROL_DEBUG
+        if((report_data->rates[i].data_rate < SSV62XX_RATE_MCS_INDEX) || (report_data->rates[i].data_rate >= SSV62XX_RATE_MCS_GREENFIELD_INDEX)) {
+            printk("[RC]ssv6xxx_ht_report_handler get error report rate[%d]\n",report_data->rates[i].data_rate);
+            break;
+        }
+#endif
+        rate = &mi->groups.rates[(report_data->rates[i].data_rate - SSV62XX_RATE_MCS_INDEX) % MCS_GROUP_RATES];
+        if (last)
+            rate->success += report_data->ampdu_ack_len;
+        rate->attempts += report_data->rates[i].count * report_data->ampdu_len;
+    }
+#if 0
+    rate = minstrel_get_ratestats(mi, mi->max_tp_rate);
+    if (rate->attempts > 30 &&
+        MINSTREL_FRAC(rate->success, rate->attempts) <
+        MINSTREL_FRAC(20, 100))
+        minstrel_downgrade_rate(mi, &mi->max_tp_rate, true);
+    rate2 = minstrel_get_ratestats(mi, mi->max_tp_rate2);
+    if (rate2->attempts > 30 &&
+        MINSTREL_FRAC(rate2->success, rate2->attempts) <
+        MINSTREL_FRAC(20, 100))
+        minstrel_downgrade_rate(mi, &mi->max_tp_rate2, false);
+#endif
+    period = msecs_to_jiffies(SSV_RC_HT_INTERVAL/2);
+    if (time_after(jiffies, mi->stats_update + period)) {
+        rate_control_ht_sample(mi,rc_sta);
+    }
+#if 0
+    period = msecs_to_jiffies(HT_RC_UPDATE_INTERVAL);
+    if (time_after(jiffies, mi->stats_update + period)) {
+        struct rc_pid_sta_info *spinfo;
+        spinfo = &rc_sta->spinfo;
+#if 1
+        printk("AMPDU rate update time!!\n");
+#endif
+        if(rc_sta->rc_num_rate == 12)
+        {
+            if(spinfo->txrate_idx >= 4)
+                rc_sta->ht.max_tp_rate = spinfo->txrate_idx - 4;
+            else
+                rc_sta->ht.max_tp_rate = 0;
+        }
+        else
+            rc_sta->ht.max_tp_rate = spinfo->txrate_idx;
+        mi->stats_update = jiffies;
+    }
+#endif
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.h
new file mode 100644
index 0000000000000..e058e4a2e0fcc
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_ht_rc.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_RC_HT_H_
+#define _SSV_RC_HT_H_ 
+#include "ssv_rc_common.h"
+#define MINSTREL_SCALE 16
+#define MINSTREL_FRAC(val,div) (((val) << MINSTREL_SCALE) / div)
+#define MINSTREL_TRUNC(val) ((val) >> MINSTREL_SCALE)
+#define SSV_RC_HT_INTERVAL 100
+extern const u16 ampdu_max_transmit_length[];
+s32 ssv62xx_ht_rate_update(struct sk_buff *skb, struct ssv_softc *sc, struct fw_rc_retry_params *ar);
+void ssv62xx_ht_rc_caps(const u16 ssv6xxx_rc_rate_set[RC_TYPE_MAX][13],struct ssv_sta_rc_info *rc_sta);
+void ssv6xxx_ht_report_handler(struct ssv_softc *sc,struct sk_buff *skb,struct ssv_sta_rc_info *rc_sta);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
new file mode 100644
index 0000000000000..86f6dee6cc179
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <ssv6200.h>
+#include "dev.h"
+#include "sar.h"
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_WAKELOCK
+#include <linux/wakelock.h>
+#endif
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#elif LINUX_VERSION_CODE > KERNEL_VERSION(3, 4, 0)
+#include <linux/notifier.h>
+#include <linux/fb.h>
+#endif
+struct ssv_softc *ssv_notify_sc = NULL;
+EXPORT_SYMBOL(ssv_notify_sc);
+#if defined(CONFIG_HAS_EARLYSUSPEND) || (LINUX_VERSION_CODE > KERNEL_VERSION(3, 4, 0))
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void ssv6xxx_early_suspend(struct early_suspend *h)
+#else
+void ssv6xxx_early_suspend(void)
+#endif
+{
+#ifdef CONFIG_HAS_EARLYSUSPEND
+    struct ssv_softc *sc = container_of(h, struct ssv_softc, early_suspend);
+#else
+    struct ssv_softc *sc = ssv_notify_sc;
+#endif
+    sc->ps_status = PWRSV_PREPARE;
+    if (sc->is_sar_enabled) {
+        cancel_delayed_work(&sc->thermal_monitor_work);
+        flush_workqueue(sc->thermal_wq);
+    }
+    printk(KERN_INFO "ssv6xxx_early_suspend\n");
+    ssv6xxx_watchdog_controller(sc->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_STOP);
+    sc->watchdog_flag = WD_SLEEP;
+}
+#define DEAUTH_DISASSOC_LEN (24 + 2 )
+void ssv6xxx_send_deauth_toself(struct ssv_softc *sc,const u8 *bssid,const u8 *self_addr)
+{
+    struct sk_buff *deauth_skb ;
+ u8 frame_buf[DEAUTH_DISASSOC_LEN];
+    struct ieee80211_mgmt *mgmt = (void *)frame_buf;
+ mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DEAUTH);
+ mgmt->duration = 0;
+ mgmt->seq_ctrl = 0;
+ memcpy(mgmt->da, self_addr, ETH_ALEN);
+ memcpy(mgmt->sa, bssid, ETH_ALEN);
+ memcpy(mgmt->bssid, bssid, ETH_ALEN);
+ mgmt->u.deauth.reason_code = cpu_to_le16(2);
+ {
+  deauth_skb = dev_alloc_skb(DEAUTH_DISASSOC_LEN);
+  if (!deauth_skb)
+   return;
+  memcpy(skb_put(deauth_skb, DEAUTH_DISASSOC_LEN),
+         mgmt, DEAUTH_DISASSOC_LEN);
+        #if defined(USE_THREAD_RX) && !defined(IRQ_PROC_RX_DATA)
+        local_bh_disable();
+        ieee80211_rx(sc->hw, deauth_skb);
+        local_bh_enable();
+        #else
+        ieee80211_rx_irqsafe(sc->hw, deauth_skb);
+        #endif
+     return;
+ }
+}
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void ssv6xxx_late_resume(struct early_suspend *h)
+#else
+void ssv6xxx_late_resume(void)
+#endif
+{
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ struct ssv_softc *sc = container_of(h, struct ssv_softc, early_suspend);
+#else
+ struct ssv_softc *sc = ssv_notify_sc;
+#endif
+    if(sc->ps_status == PWRSV_ENABLE)
+    {
+        if(sc->vif_info[0].vif)
+        {
+            if(sc->vif_info[0].vif->bss_conf.assoc)
+            {
+                printk("sc->vif_info[0].vif->bss_conf.assoc\n");
+                if ((sc->vif_info[0].vif->type == NL80211_IFTYPE_STATION) || (sc->vif_info[0].vif->p2p))
+                {
+                    printk("sc->vif_info[0].vif->bss_conf.assoc ssv6xxx_send_deauth_toself\n");
+                    ssv6xxx_send_deauth_toself(sc, sc->vif_info[0].vif->bss_conf.bssid, sc->vif_info[0].vif->addr);
+                }
+            }
+        }
+        if(sc->vif_info[1].vif)
+        {
+            if(sc->vif_info[1].vif->bss_conf.assoc)
+            {
+                printk("sc->vif_info[1].vif->bss_conf.assoc\n");
+                if ((sc->vif_info[1].vif->type == NL80211_IFTYPE_STATION) || (sc->vif_info[1].vif->p2p))
+                {
+                    printk("sc->vif_info[1].vif->bss_conf.assoc ssv6xxx_send_deauth_toself\n");
+                    ssv6xxx_send_deauth_toself(sc, sc->vif_info[1].vif->bss_conf.bssid, sc->vif_info[1].vif->addr);
+                }
+            }
+        }
+    }
+    if(sc)
+        ssv6xxx_disable_ps(sc);
+    else
+        printk(KERN_INFO "ssv6xxx_late_resume,sc=NULL\n");
+    if (sc->is_sar_enabled) {
+        queue_delayed_work(sc->thermal_wq, &sc->thermal_monitor_work, THERMAL_MONITOR_TIME);
+    }
+    ssv6xxx_watchdog_controller(sc->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_START);
+    sc->watchdog_flag = WD_KICKED;
+    printk(KERN_INFO "ssv6xxx_late_resume\n");
+}
+#ifndef CONFIG_HAS_EARLYSUSPEND
+static int ssv_wlan_fb_event_notify(struct notifier_block *self,
+                       unsigned long action, void *data)
+{
+        struct fb_event *event = data;
+        int blank_mode = *((int *)event->data);
+        if (action == FB_EARLY_EVENT_BLANK) {
+                switch (blank_mode) {
+                case FB_BLANK_UNBLANK:
+                        break;
+                default:
+      ssv6xxx_early_suspend();
+                        break;
+                }
+        }
+   else if (action == FB_EVENT_BLANK) {
+                switch (blank_mode) {
+                case FB_BLANK_UNBLANK:
+      ssv6xxx_late_resume();
+                        break;
+                default:
+                        break;
+                }
+        }
+        return NOTIFY_OK;
+}
+struct notifier_block ssv_wlan_fb_notifier = {
+    .notifier_call = ssv_wlan_fb_event_notify,
+};
+#endif
+#endif
+void ssv_wakelock_init(struct ssv_softc *sc)
+{
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock_init(&sc->ssv_wake_lock_, WAKE_LOCK_SUSPEND, "ssv6051");
+#endif
+#ifndef CONFIG_HAS_EARLYSUSPEND
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)
+ fb_register_client(&ssv_wlan_fb_notifier);
+#endif
+#endif
+}
+void ssv_wakelock_destroy(struct ssv_softc *sc)
+{
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock_destroy(&sc->ssv_wake_lock_);
+#endif
+#ifndef CONFIG_HAS_EARLYSUSPEND
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)
+ fb_unregister_client(&ssv_wlan_fb_notifier);
+#endif
+#endif
+}
+void ssv_wake_lock(struct ssv_softc *sc)
+{
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock(&sc->ssv_wake_lock_);
+#endif
+}
+void ssv_wake_timeout(struct ssv_softc *sc, int secs)
+{
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_lock_timeout(&sc->ssv_wake_lock_,secs*HZ);
+#endif
+}
+void ssv_wake_unlock(struct ssv_softc *sc)
+{
+#ifdef CONFIG_HAS_WAKELOCK
+    wake_unlock(&sc->ssv_wake_lock_);
+#endif
+}
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.h
new file mode 100644
index 0000000000000..e76c11ee19ae4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_PM_H_
+#define _SSV_PM_H_ 
+#include <linux/version.h>
+#ifdef CONFIG_SSV_SUPPORT_ANDROID
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void ssv6xxx_early_suspend(struct early_suspend *h);
+void ssv6xxx_late_resume(struct early_suspend *h);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)
+void ssv6xxx_early_suspend(void);
+void ssv6xxx_late_resume(void);
+#endif
+#ifdef CONFIG_HAS_WAKELOCK
+void ssv_wakelock_init(struct ssv_softc *sc);
+void ssv_wakelock_destroy(struct ssv_softc *sc);
+void ssv_wake_lock(struct ssv_softc *sc);
+void ssv_wake_timeout(struct ssv_softc *sc, int secs);
+void ssv_wake_unlock(struct ssv_softc *sc);
+#endif
+#endif
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.c
new file mode 100644
index 0000000000000..78f80e3815cde
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.c
@@ -0,0 +1,1724 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/version.h>
+#include <ssv6200.h>
+#include "dev.h"
+#include "ssv_ht_rc.h"
+#include "ssv_rc.h"
+#include "ssv_rc_common.h"
+static struct ssv_rc_rate ssv_11bgn_rate_table[] =
+{
+        [0] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 1000,
+                .dot11_rate_idx = 0,
+                .ctrl_rate_idx = 0,
+                .hw_rate_idx = 0,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [1] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 2000,
+                .dot11_rate_idx = 1,
+                .ctrl_rate_idx = 1,
+                .hw_rate_idx = 1,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [2] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 5500,
+                .dot11_rate_idx = 2,
+                .ctrl_rate_idx = 1,
+                .hw_rate_idx = 2,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [3] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 11000,
+                .dot11_rate_idx = 3,
+                .ctrl_rate_idx = 1,
+                .hw_rate_idx = 3,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [4] = { .rc_flags = RC_FLAG_LEGACY | RC_FLAG_SHORT_PREAMBLE,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 2000,
+                .dot11_rate_idx = 1,
+                .ctrl_rate_idx = 4,
+                .hw_rate_idx = 4,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [5] = { .rc_flags = RC_FLAG_LEGACY | RC_FLAG_SHORT_PREAMBLE,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 5500,
+                .dot11_rate_idx = 2,
+                .ctrl_rate_idx = 4,
+                .hw_rate_idx = 5,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [6] = { .rc_flags = RC_FLAG_LEGACY | RC_FLAG_SHORT_PREAMBLE,
+                .phy_type = WLAN_RC_PHY_CCK,
+                .rate_kbps = 11000,
+                .dot11_rate_idx = 3,
+                .ctrl_rate_idx = 4,
+                .hw_rate_idx = 6,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [7] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_OFDM,
+                .rate_kbps = 6000,
+                .dot11_rate_idx = 4,
+                .ctrl_rate_idx = 7,
+                .hw_rate_idx = 7,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [8] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_OFDM,
+                .rate_kbps = 9000,
+                .dot11_rate_idx = 5,
+                .ctrl_rate_idx = 7,
+                .hw_rate_idx = 8,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [9] = { .rc_flags = RC_FLAG_LEGACY,
+                .phy_type = WLAN_RC_PHY_OFDM,
+                .rate_kbps = 12000,
+                .dot11_rate_idx = 6,
+                .ctrl_rate_idx = 9,
+                .hw_rate_idx = 9,
+                .arith_shift = 8,
+                .target_pf = 26,
+           },
+        [10] = { .rc_flags = RC_FLAG_LEGACY,
+                 .phy_type = WLAN_RC_PHY_OFDM,
+                 .rate_kbps = 18000,
+                 .dot11_rate_idx = 7,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 10,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [11] = { .rc_flags = RC_FLAG_LEGACY,
+                 .phy_type = WLAN_RC_PHY_OFDM,
+                 .rate_kbps = 24000,
+                 .dot11_rate_idx = 8,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 11,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [12] = { .rc_flags = RC_FLAG_LEGACY,
+                 .phy_type = WLAN_RC_PHY_OFDM,
+                 .rate_kbps = 36000,
+                 .dot11_rate_idx = 9,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 12,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [13] = { .rc_flags = RC_FLAG_LEGACY,
+                 .phy_type = WLAN_RC_PHY_OFDM,
+                 .rate_kbps = 48000,
+                 .dot11_rate_idx = 10,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 13,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [14] = { .rc_flags = RC_FLAG_LEGACY,
+                 .phy_type = WLAN_RC_PHY_OFDM,
+                 .rate_kbps = 54000,
+                 .dot11_rate_idx = 11,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 14,
+                 .arith_shift = 8,
+                 .target_pf = 8
+               },
+        [15] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 6500,
+                 .dot11_rate_idx = 0,
+                 .ctrl_rate_idx = 7,
+                 .hw_rate_idx = 15,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [16] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 13000,
+                 .dot11_rate_idx = 1,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 16,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [17] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 19500,
+                 .dot11_rate_idx = 2,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 17,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+                 },
+        [18] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 26000,
+                 .dot11_rate_idx = 3,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 18,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [19] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 39000,
+                 .dot11_rate_idx = 4,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 19,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [20] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 52000,
+                 .dot11_rate_idx = 5,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 20,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [21] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 58500,
+                 .dot11_rate_idx = 6,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 21,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [22] = { .rc_flags = RC_FLAG_HT,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_LGI,
+                 .rate_kbps = 65000,
+                 .dot11_rate_idx = 7,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 22,
+                 .arith_shift = 8,
+                 .target_pf = 8
+               },
+        [23] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 7200,
+                 .dot11_rate_idx = 0,
+                 .ctrl_rate_idx = 7,
+                 .hw_rate_idx = 23,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [24] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 14400,
+                 .dot11_rate_idx = 1,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 24,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [25] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 21700,
+                 .dot11_rate_idx = 2,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 25,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [26] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 28900,
+                 .dot11_rate_idx = 3,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 26,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [27] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 43300,
+                 .dot11_rate_idx = 4,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 27,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [28] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 57800,
+                 .dot11_rate_idx = 5,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 28,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [29] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 65000,
+                 .dot11_rate_idx = 6,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 29,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [30] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_SGI,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_SGI,
+                 .rate_kbps = 72200,
+                 .dot11_rate_idx = 7,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 30,
+                 .arith_shift = 8,
+                 .target_pf = 8
+               },
+        [31] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 6500,
+                 .dot11_rate_idx = 0,
+                 .ctrl_rate_idx = 7,
+                 .hw_rate_idx = 31,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [32] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 13000,
+                 .dot11_rate_idx = 1,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 32,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [33] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 19500,
+                 .dot11_rate_idx = 2,
+                 .ctrl_rate_idx = 9,
+                 .hw_rate_idx = 33,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [34] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 26000,
+                 .dot11_rate_idx = 3,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 34,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [35] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 39000,
+                 .dot11_rate_idx = 4,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 35,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [36] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 52000,
+                 .dot11_rate_idx = 5,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 36,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [37] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 58500,
+                 .dot11_rate_idx = 6,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 37,
+                 .arith_shift = 8,
+                 .target_pf = 26,
+               },
+        [38] = { .rc_flags = RC_FLAG_HT | RC_FLAG_HT_GF,
+                 .phy_type = WLAN_RC_PHY_HT_20_SS_GF,
+                 .rate_kbps = 65000,
+                 .dot11_rate_idx = 7,
+                 .ctrl_rate_idx = 11,
+                 .hw_rate_idx = 38,
+                 .arith_shift = 8,
+                 .target_pf = 8
+                },
+};
+const u16 ssv6xxx_rc_rate_set[RC_TYPE_MAX][13] =
+{
+    [RC_TYPE_B_ONLY] = { 4, 0, 1, 2, 3},
+    [RC_TYPE_LEGACY_GB] = { 12, 0, 1, 2, 7, 8, 3, 9, 10, 11, 12, 13, 14 },
+#if 0
+    [RC_TYPE_SGI_20] = { 12, 0, 1, 2, 3, 23, 24, 25, 26, 27, 28, 29, 30 },
+    [RC_TYPE_LGI_20] = { 12, 0, 1, 2, 3, 15, 16, 17, 18, 19, 20, 21, 22 },
+#else
+    [RC_TYPE_SGI_20] = { 8, 23, 24, 25, 26, 27, 28, 29, 30 },
+    [RC_TYPE_LGI_20] = { 8, 15, 16, 17, 18, 19, 20, 21, 22 },
+#endif
+    [RC_TYPE_HT_SGI_20] = { 8, 23, 24, 25, 26, 27, 28, 29, 30 },
+    [RC_TYPE_HT_LGI_20] = { 8, 15, 16, 17, 18, 19, 20, 21, 22 },
+    [RC_TYPE_HT_GF] = { 8, 31, 32, 33, 34, 35, 36, 37, 38 },
+};
+static u32 ssv6xxx_rate_supported(struct ssv_sta_rc_info *rc_sta, u32 index)
+{
+    return (rc_sta->rc_supp_rates & BIT(index));
+}
+#if 1
+static u8 ssv6xxx_rate_lowest_index(struct ssv_sta_rc_info *rc_sta)
+{
+    int i;
+    for (i = 0; i < rc_sta->rc_num_rate; i++)
+        if (ssv6xxx_rate_supported(rc_sta, i))
+            return i;
+    return 0;
+}
+#endif
+#ifdef DISABLE_RATE_CONTROL_SAMPLE
+static u8 ssv6xxx_rate_highest_index(struct ssv_sta_rc_info *rc_sta)
+{
+    int i;
+    for (i=rc_sta->rc_num_rate-1; i >= 0; i--)
+        if (ssv6xxx_rate_supported(rc_sta, i))
+            return i;
+    return 0;
+}
+#endif
+static void rate_control_pid_adjust_rate(struct ssv_sta_rc_info *rc_sta,
+            struct rc_pid_sta_info *spinfo, int adj,struct rc_pid_rateinfo *rinfo)
+{
+    int cur_sorted, new_sorted, probe, tmp, n_bitrates;
+    int cur = spinfo->txrate_idx;
+    n_bitrates = rc_sta->rc_num_rate;
+    cur_sorted = rinfo[cur].index;
+    new_sorted = cur_sorted + adj;
+    if (new_sorted < 0)
+        new_sorted = rinfo[0].index;
+    else if (new_sorted >= n_bitrates)
+        new_sorted = rinfo[n_bitrates - 1].index;
+    tmp = new_sorted;
+ if (adj < 0) {
+  for (probe = cur_sorted; probe >= new_sorted; probe--)
+   if (rinfo[probe].diff <= rinfo[cur_sorted].diff &&
+       ssv6xxx_rate_supported(rc_sta, rinfo[probe].index))
+    tmp = probe;
+ } else {
+  for (probe = new_sorted + 1; probe < n_bitrates; probe++)
+   if (rinfo[probe].diff <= rinfo[new_sorted].diff &&
+       ssv6xxx_rate_supported(rc_sta, rinfo[probe].index))
+    tmp = probe;
+ }
+    BUG_ON(tmp<0 || tmp>=n_bitrates);
+ do {
+  if (ssv6xxx_rate_supported(rc_sta, rinfo[tmp].index)) {
+   spinfo->tmp_rate_idx = rinfo[tmp].index;
+   break;
+  }
+  if (adj < 0)
+   tmp--;
+  else
+   tmp++;
+ } while (tmp < n_bitrates && tmp >= 0);
+    spinfo->oldrate = spinfo->txrate_idx;
+ if (spinfo->tmp_rate_idx != spinfo->txrate_idx) {
+  spinfo->monitoring = 1;
+#ifdef RATE_CONTROL_PARAMETER_DEBUG
+        printk("Trigger monitor tmp_rate_idx=[%d]\n",spinfo->tmp_rate_idx);
+#endif
+  spinfo->probe_cnt = MAXPROBES;
+ }
+}
+static void rate_control_pid_normalize(struct rc_pid_info *pinfo, int l)
+{
+        int i, norm_offset = RC_PID_NORM_OFFSET;
+        struct rc_pid_rateinfo *r = pinfo->rinfo;
+        if (r[0].diff > norm_offset)
+                r[0].diff -= norm_offset;
+        else if (r[0].diff < -norm_offset)
+                r[0].diff += norm_offset;
+        for (i = 0; i < l - 1; i++)
+                if (r[i + 1].diff > r[i].diff + norm_offset)
+                        r[i + 1].diff -= norm_offset;
+                else if (r[i + 1].diff <= r[i].diff)
+                        r[i + 1].diff += norm_offset;
+}
+#ifdef RATE_CONTROL_DEBUG
+    unsigned int txrate_dlr=0;
+#endif
+static void rate_control_pid_sample(struct ssv_rate_ctrl* ssv_rc,struct rc_pid_info *pinfo,
+        struct ssv_sta_rc_info *rc_sta,
+        struct rc_pid_sta_info *spinfo)
+{
+ struct rc_pid_rateinfo *rinfo = pinfo->rinfo;
+ u8 pf;
+ s32 err_avg;
+ s32 err_prop;
+ s32 err_int;
+ s32 err_der;
+ int adj, i, j, tmp;
+    struct ssv_rc_rate *rc_table;
+ unsigned int dlr;
+ unsigned int perfect_time = 0;
+ unsigned int this_thp, ewma_thp;
+ struct rc_pid_rateinfo *rate;
+ if (!spinfo->monitoring)
+ {
+#if 0
+  period = msecs_to_jiffies(pinfo->sampling_period);
+  if (jiffies - spinfo->last_sample > 2 * period)
+   spinfo->sharp_cnt = RC_PID_SHARPENING_DURATION;
+#endif
+        if (spinfo->tx_num_xmit == 0)
+            return;
+  spinfo->last_sample = jiffies;
+  pf = spinfo->tx_num_failed * 100 / spinfo->tx_num_xmit;
+  if (pinfo->rinfo[spinfo->txrate_idx].this_attempt > 0)
+  {
+   rate = &pinfo->rinfo[spinfo->txrate_idx];
+            rc_table = &ssv_rc->rc_table[spinfo->txrate_idx];
+   dlr = 100 - rate->this_fail * 100 / rate->this_attempt;
+   perfect_time = rate->perfect_tx_time;
+   if (!perfect_time)
+    perfect_time = 1000000;
+   this_thp = dlr * (1000000 / perfect_time);
+   ewma_thp = rate->throughput;
+   if (ewma_thp == 0)
+    rate->throughput = this_thp;
+   else
+    rate->throughput = (ewma_thp + this_thp) >> 1;
+   rate->attempt += rate->this_attempt;
+   rate->success += rate->this_success;
+   rate->fail += rate->this_fail;
+   spinfo->tx_num_xmit = 0;
+   spinfo->tx_num_failed = 0;
+   rate->this_fail = 0;
+   rate->this_success = 0;
+   rate->this_attempt = 0;
+            if (pinfo->oldrate<0 || pinfo->oldrate>=rc_sta->rc_num_rate)
+            {
+                WARN_ON(1);
+            }
+            if (spinfo->txrate_idx<0 || spinfo->txrate_idx>=rc_sta->rc_num_rate)
+            {
+                WARN_ON(1);
+            }
+   if (pinfo->oldrate != spinfo->txrate_idx) {
+    i = rinfo[pinfo->oldrate].index;
+    j = rinfo[spinfo->txrate_idx].index;
+                tmp = (pf - spinfo->last_pf);
+    tmp = RC_PID_DO_ARITH_RIGHT_SHIFT(tmp, rc_table->arith_shift);
+    rinfo[j].diff = rinfo[i].diff + tmp;
+    pinfo->oldrate = spinfo->txrate_idx;
+   }
+   rate_control_pid_normalize(pinfo, rc_sta->rc_num_rate);
+   err_prop = (rc_table->target_pf - pf) << rc_table->arith_shift;
+   err_avg = spinfo->err_avg_sc >> RC_PID_SMOOTHING_SHIFT;
+   spinfo->err_avg_sc = spinfo->err_avg_sc - err_avg + err_prop;
+   err_int = spinfo->err_avg_sc >> RC_PID_SMOOTHING_SHIFT;
+   err_der = pf - spinfo->last_pf;
+   spinfo->last_pf = pf;
+   spinfo->last_dlr = dlr;
+   spinfo->oldrate = spinfo->txrate_idx;
+#if 0
+   if (spinfo->sharp_cnt)
+    spinfo->sharp_cnt--;
+#endif
+   adj = (err_prop * RC_PID_COEFF_P + err_int * RC_PID_COEFF_I + err_der * RC_PID_COEFF_D);
+   adj = RC_PID_DO_ARITH_RIGHT_SHIFT(adj, rc_table->arith_shift<<1);
+   if (adj) {
+#ifdef RATE_CONTROL_PARAMETER_DEBUG
+                if((spinfo->txrate_idx!=11) || ((spinfo->txrate_idx==11)&&(adj < 0)))
+                printk("[RC]Probe adjust[%d] dlr[%d%%] this_thp[%d] ewma_thp[%d] index[%d]\n",adj ,dlr,this_thp,ewma_thp,spinfo->txrate_idx);
+#endif
+    rate_control_pid_adjust_rate(rc_sta, spinfo, adj, rinfo);
+   }
+  }
+ }
+ else
+    {
+        if((spinfo->feedback_probes >= MAXPROBES) || (spinfo->feedback_probes && spinfo->probe_cnt))
+        {
+      rate = &pinfo->rinfo[spinfo->txrate_idx];
+#if 0
+      period = msecs_to_jiffies(pinfo->sampling_period);
+      if (jiffies - spinfo->last_sample > 2 * period)
+       spinfo->sharp_cnt = RC_PID_SHARPENING_DURATION;
+#endif
+      spinfo->last_sample = jiffies;
+      if (rate->this_attempt > 0) {
+       dlr = 100 - rate->this_fail * 100 / rate->this_attempt;
+#ifdef RATE_CONTROL_DEBUG
+#ifdef PROBE
+                txrate_dlr=dlr;
+#endif
+#endif
+       spinfo->last_dlr = dlr;
+       perfect_time = rate->perfect_tx_time;
+       if (!perfect_time)
+        perfect_time = 1000000;
+       this_thp = dlr * (1000000 / perfect_time);
+       ewma_thp = rate->throughput;
+       if (ewma_thp == 0)
+        rate->throughput = this_thp;
+       else
+        rate->throughput = (ewma_thp + this_thp) >> 1;
+       rate->attempt += rate->this_attempt;
+       rate->success += rate->this_success;
+       rinfo[spinfo->txrate_idx].fail += rate->this_fail;
+       rate->this_fail = 0;
+       rate->this_success = 0;
+       rate->this_attempt = 0;
+      }
+            else
+            {
+#ifdef RATE_CONTROL_DEBUG
+#ifdef PROBE
+                txrate_dlr=0;
+#endif
+#endif
+            }
+            rate = &pinfo->rinfo[spinfo->tmp_rate_idx];
+            if (rate->this_attempt > 0) {
+                dlr = 100 - ((rate->this_fail * 100) / rate->this_attempt);
+                {
+                    perfect_time = rate->perfect_tx_time;
+                    if (!perfect_time)
+                        perfect_time = 1000000;
+                    if(dlr)
+                        this_thp = dlr * (1000000 / perfect_time);
+                    else
+                        this_thp = 0;
+                    ewma_thp = rate->throughput;
+                    if (ewma_thp == 0)
+                        rate->throughput = this_thp;
+                    else
+                        rate->throughput = (ewma_thp + this_thp) >> 1;
+                    if (rate->throughput > pinfo->rinfo[spinfo->txrate_idx].throughput)
+                    {
+#ifdef RATE_CONTROL_PARAMETER_DEBUG
+                        printk("[RC]UPDATE probe rate idx[%d] [%d][%d%%] Old idx[%d] [%d][%d%%] feedback[%d] \n",spinfo->tmp_rate_idx,rate->throughput,dlr,spinfo->txrate_idx,pinfo->rinfo[spinfo->txrate_idx].throughput,txrate_dlr,spinfo->feedback_probes);
+#endif
+                        spinfo->txrate_idx = spinfo->tmp_rate_idx;
+                    }
+                    else
+                    {
+#ifdef RATE_CONTROL_PARAMETER_DEBUG
+                        printk("[RC]Fail probe rate idx[%d] [%d][%d%%] Old idx[%d] [%d][%d%%] feedback[%d] \n",spinfo->tmp_rate_idx,rate->throughput,dlr,spinfo->txrate_idx,pinfo->rinfo[spinfo->txrate_idx].throughput,txrate_dlr,spinfo->feedback_probes);
+#endif
+                        ;
+                    }
+                    rate->attempt += rate->this_attempt;
+                    rate->success += rate->this_success;
+                    rate->fail += rate->this_fail;
+                    rate->this_fail = 0;
+                    rate->this_success = 0;
+                    rate->this_attempt = 0;
+                    spinfo->oldrate = spinfo->txrate_idx;
+                }
+            }
+#ifdef RATE_CONTROL_DEBUG
+            else
+                printk("SHIT-2!!!!\n");
+#endif
+            spinfo->feedback_probes = 0;
+            spinfo->tx_num_xmit = 0;
+            spinfo->tx_num_failed = 0;
+            spinfo->monitoring = 0;
+#ifdef RATE_CONTROL_PARAMETER_DEBUG
+            printk("Disable monitor\n");
+#endif
+            spinfo->probe_report_flag = 0;
+            spinfo->probe_wating_times = 0;
+        }
+        else
+        {
+            spinfo->probe_wating_times ++;
+#ifdef RATE_CONTROL_DEBUG
+            if(spinfo->probe_wating_times > 3)
+            {
+                printk("[RC]@@@@@ PROBE LOSE @@@@@ feedback=[%d] need=[%d] probe_cnt=[%d] wating times[%d]\n",
+                    spinfo->feedback_probes,MAXPROBES,spinfo->probe_cnt,spinfo->probe_wating_times);
+                spinfo->feedback_probes = 0;
+                spinfo->tx_num_xmit = 0;
+                spinfo->tx_num_failed = 0;
+                spinfo->monitoring = 0;
+                spinfo->probe_report_flag = 0;
+                spinfo->probe_wating_times = 0;
+            }
+#else
+            if(spinfo->probe_wating_times > 3)
+            {
+                spinfo->feedback_probes = 0;
+                spinfo->tx_num_xmit = 0;
+                spinfo->tx_num_failed = 0;
+                spinfo->monitoring = 0;
+                spinfo->probe_report_flag = 0;
+                spinfo->probe_wating_times = 0;
+            }
+#endif
+        }
+    }
+}
+#ifdef RATE_CONTROL_PERCENTAGE_TRACE
+int percentage = 0;
+int percentageCounter = 0;
+#endif
+void ssv6xxx_legacy_report_handler(struct ssv_softc *sc,struct sk_buff *skb,struct ssv_sta_rc_info *rc_sta)
+{
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    struct cfg_host_event *host_event;
+    struct firmware_rate_control_report_data *report_data;
+    struct rc_pid_info *pinfo;
+    struct rc_pid_sta_info *spinfo;
+    struct rc_pid_rateinfo * pidrate;
+    struct rc_pid_rateinfo *rate;
+    s32 report_data_index = 0;
+    unsigned long period;
+    host_event = (struct cfg_host_event *)skb->data;
+    report_data = (struct firmware_rate_control_report_data *)&host_event->dat[0];
+    if ( (report_data->wsid != (-1))
+        && sc->sta_info[report_data->wsid].sta == NULL)
+    {
+        dev_warn(sc->dev, "RC report has no valid STA.(%d)\n", report_data->wsid);
+        return;
+    }
+    pinfo = &rc_sta->pinfo;
+    spinfo = &rc_sta->spinfo;
+    pidrate = rc_sta->pinfo.rinfo;
+    if(host_event->h_event == SOC_EVT_RC_AMPDU_REPORT)
+    {
+#if 1
+        period = msecs_to_jiffies(HT_RC_UPDATE_INTERVAL);
+        if (time_after(jiffies, spinfo->last_sample + period))
+        {
+            if(rc_sta->rc_num_rate == 12)
+                spinfo->txrate_idx = rc_sta->ht.max_tp_rate + 4;
+            else
+                spinfo->txrate_idx = rc_sta->ht.max_tp_rate;
+#ifdef RATE_CONTROL_DEBUG
+            printk("MPDU rate update time txrate_idx[%d]!!\n",spinfo->txrate_idx);
+#endif
+            spinfo->last_sample = jiffies;
+        }
+#endif
+        return;
+    }
+    else if(host_event->h_event == SOC_EVT_RC_MPDU_REPORT)
+    {
+#if 0
+        printk("SC report !MPDU! wsid[%d]rate[%d]M[%d]S[%d]R[%d]\n",report_data->wsid,report_data->rates[0].data_rate,
+               report_data->ampdu_len,report_data->ampdu_ack_len,report_data->rates[0].count);
+#endif
+        ;
+    }
+    else
+    {
+        printk("RC work get garbage!!\n");
+        return;
+    }
+    if(report_data->rates[0].data_rate < 7)
+    {
+        if(report_data->rates[0].data_rate>3)
+        {
+            report_data->rates[0].data_rate -= 3;
+        }
+    }
+    if(ssv_rc->rc_table[rc_sta->pinfo.rinfo[spinfo->txrate_idx].rc_index].hw_rate_idx == report_data->rates[0].data_rate)
+    {
+        report_data_index = rc_sta->pinfo.rinfo[spinfo->txrate_idx].index;
+    }
+    else if(ssv_rc->rc_table[rc_sta->pinfo.rinfo[spinfo->tmp_rate_idx].rc_index].hw_rate_idx == report_data->rates[0].data_rate)
+    {
+        report_data_index = rc_sta->pinfo.rinfo[spinfo->tmp_rate_idx].index;
+    }
+    if((report_data_index != spinfo->tmp_rate_idx) && (report_data_index != spinfo->txrate_idx))
+    {
+#ifdef RATE_CONTROL_DEBUG
+        printk("Rate control report mismatch report_rate_idx[%d] tmp_rate_idx[%d]rate[%d] txrate_idx[%d]rate[%d]!!\n",
+            report_data->rates[0].data_rate,spinfo->tmp_rate_idx,
+            ssv_rc->rc_table[rc_sta->pinfo.rinfo[spinfo->tmp_rate_idx].rc_index].hw_rate_idx,
+            spinfo->txrate_idx,
+            ssv_rc->rc_table[rc_sta->pinfo.rinfo[spinfo->txrate_idx].rc_index].hw_rate_idx);
+#endif
+        return;
+    }
+    if(report_data_index == spinfo->txrate_idx)
+    {
+        spinfo->tx_num_xmit += report_data->rates[0].count;
+        spinfo->tx_num_failed += (report_data->rates[0].count - report_data->ampdu_ack_len );
+        rate = &pidrate[spinfo->txrate_idx];
+        rate->this_fail += ( report_data->rates[0].count - report_data->ampdu_ack_len );
+        rate->this_attempt += report_data->rates[0].count;
+        rate->this_success += report_data->ampdu_ack_len;
+    }
+    if (report_data_index != spinfo->txrate_idx && report_data_index == spinfo->tmp_rate_idx)
+    {
+        spinfo->feedback_probes += report_data->ampdu_len;
+        rate = &pidrate[spinfo->tmp_rate_idx];
+        rate->this_fail += ( report_data->rates[0].count - report_data->ampdu_ack_len );
+        rate->this_attempt += report_data->rates[0].count;
+        rate->this_success += report_data->ampdu_ack_len;
+    }
+    period = msecs_to_jiffies(RC_PID_INTERVAL);
+    if (time_after(jiffies, spinfo->last_sample + period))
+    {
+#ifdef RATE_CONTROL_PERCENTAGE_TRACE
+        rate = &pidrate[spinfo->txrate_idx];
+        if(rate->this_success > rate->this_attempt)
+        {
+            printk("#############################\n");
+            printk("this_success[%ld] this_attempt[%ld]\n",rate->this_success,rate->this_attempt);
+            printk("#############################\n");
+        }
+        else
+        {
+            if(percentage == 0)
+                percentage = (int)((rate->this_success*100)/rate->this_attempt);
+            else
+                percentage = (percentage + (int)((rate->this_success*100)/rate->this_attempt))/2;
+            printk("Percentage[%d]\n",percentage);
+            if((percentageCounter % 16)==1)
+                percentage = 0;
+        }
+#endif
+#ifdef RATE_CONTROL_STUPID_DEBUG
+        if (spinfo->txrate_idx != spinfo->tmp_rate_idx)
+        {
+            rate = &pidrate[spinfo->tmp_rate_idx];
+            if (spinfo->monitoring && ((rate->this_attempt == 0)||(rate->this_attempt!=MAXPROBES)))
+            {
+                printk("Probe result a[%ld]s[%ld]f[%ld]",rate->this_attempt,rate->this_success,rate->this_fail);
+            }
+            rate = &pidrate[spinfo->txrate_idx];
+            printk("New a[%ld]s[%ld]f[%ld] \n",rate->this_attempt,rate->this_success,rate->this_fail);
+        }
+        else
+        {
+            rate = &pidrate[spinfo->txrate_idx];
+            printk("New a[%ld]s[%ld]f[%ld] \n",rate->this_attempt,rate->this_success,rate->this_fail);
+        }
+        printk("w[%d]x%03d-f%03d\n",rc_sta->rc_wsid,spinfo->tx_num_xmit,spinfo->tx_num_failed);
+#endif
+        rate_control_pid_sample(sc->rc, pinfo, rc_sta, spinfo);
+    }
+}
+void ssv6xxx_sample_work(struct work_struct *work)
+{
+    struct ssv_softc *sc = container_of(work, struct ssv_softc, rc_sample_work);
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    struct sk_buff *skb;
+    struct cfg_host_event *host_event;
+    struct ssv_sta_rc_info *rc_sta=NULL;
+    struct firmware_rate_control_report_data *report_data;
+    struct ssv_sta_info *ssv_sta;
+    u8 hw_wsid = 0;
+    sc->rc_sample_sechedule = 1;
+    while(1)
+    {
+        skb = skb_dequeue(&sc->rc_report_queue);
+        if(skb == NULL)
+            break;
+#ifdef DISABLE_RATE_CONTROL_SAMPLE
+        {
+            dev_kfree_skb_any(skb);
+            continue;
+        }
+#endif
+        host_event = (struct cfg_host_event *)skb->data;
+        if((host_event->h_event == SOC_EVT_RC_AMPDU_REPORT) || (host_event->h_event == SOC_EVT_RC_MPDU_REPORT))
+        {
+            report_data = (struct firmware_rate_control_report_data *)&host_event->dat[0];
+            hw_wsid = report_data->wsid;
+        }
+        else
+        {
+            printk("RC work get garbage!!\n");
+            dev_kfree_skb_any(skb);
+            continue;
+        }
+        if(hw_wsid >= SSV_RC_MAX_HARDWARE_SUPPORT)
+        {
+#ifdef RATE_CONTROL_DEBUG
+            printk("[RC]rc_sta is NULL pointer Check-0!!\n");
+#endif
+            dev_kfree_skb_any(skb);
+            continue;
+        }
+        ssv_sta = &sc->sta_info[hw_wsid];
+        if (ssv_sta->sta == NULL)
+        {
+            dev_err(sc->dev, "Null STA %d for RC report.\n", hw_wsid);
+            rc_sta = NULL;
+        }
+        else
+        {
+            struct ssv_sta_priv_data *ssv_sta_priv = (struct ssv_sta_priv_data *)ssv_sta->sta->drv_priv;
+            rc_sta = &ssv_rc->sta_rc_info[ssv_sta_priv->rc_idx];
+            if (rc_sta->rc_wsid != hw_wsid)
+            {
+                rc_sta = NULL;
+            }
+        }
+        if(rc_sta == NULL)
+        {
+            dev_err(sc->dev, "[RC]rc_sta is NULL pointer Check-1!!\n");
+            dev_kfree_skb_any(skb);
+            continue;
+        }
+#if 0
+        if(rc_sta->rc_wsid != hw_wsid)
+        {
+            printk("[RC] wsid mapping [ERROR] feedback wsid[%d] rc_wsid[%d]...><\n",hw_wsid,rc_sta->rc_wsid);
+#if 1
+            for(i=0;i<SSV_RC_MAX_STA;i++)
+            {
+                rc_sta = &ssv_rc->sta_rc_info[i];
+                if(rc_sta == NULL)
+                    break;
+                if(hw_wsid == rc_sta->rc_wsid)
+                {
+                    printk("[RC] Get new mapping-%d-%d...@o@\n",hw_wsid, i);
+                    break;
+                }
+            }
+   if(i == SSV_RC_MAX_STA)
+#endif
+                rc_sta = NULL;
+        }
+#endif
+        if(rc_sta == NULL)
+        {
+#ifdef RATE_CONTROL_DEBUG
+            printk("[RC]rc_sta is NULL pointer Check-2!!\n");
+#endif
+            dev_kfree_skb_any(skb);
+            continue;
+        }
+        if(rc_sta->is_ht)
+        {
+            ssv6xxx_legacy_report_handler(sc,skb,rc_sta);
+            ssv6xxx_ht_report_handler(sc,skb,rc_sta);
+        }
+        else
+            ssv6xxx_legacy_report_handler(sc,skb,rc_sta);
+        dev_kfree_skb_any(skb);
+    }
+    sc->rc_sample_sechedule = 0;
+}
+static void ssv6xxx_tx_status(void *priv, struct ieee80211_supported_band *sband,
+                  struct ieee80211_sta *sta, void *priv_sta,
+                  struct sk_buff *skb)
+{
+    struct ssv_softc *sc;
+    struct ieee80211_hdr *hdr;
+    __le16 fc;
+    hdr = (struct ieee80211_hdr *)skb->data;
+    fc = hdr->frame_control;
+    if (!priv_sta || !ieee80211_is_data_qos(fc))
+        return;
+    sc = (struct ssv_softc *)priv;
+    if ( conf_is_ht(&sc->hw->conf)
+        && (!(skb->protocol == cpu_to_be16(ETH_P_PAE))))
+    {
+        if (skb_get_queue_mapping(skb) != IEEE80211_AC_VO)
+            ssv6200_ampdu_tx_update_state(priv, sta, skb);
+    }
+    return;
+}
+#if 1
+static void rateControlGetRate(u8 rateIndex, char * pointer)
+{
+    switch(rateIndex)
+    {
+        case 0:
+            sprintf(pointer, "1Mbps");
+            return;
+        case 1:
+        case 4:
+            sprintf(pointer, "2Mbps");
+            return;
+        case 2:
+        case 5:
+            sprintf(pointer, "5.5Mbps");
+            return;
+        case 3:
+        case 6:
+            sprintf(pointer, "11Mbps");
+            return;
+        case 7:
+            sprintf(pointer, "6Mbps");
+            return;
+        case 8:
+            sprintf(pointer, "9Mbps");
+            return;
+        case 9:
+            sprintf(pointer, "12Mbps");
+            return;
+        case 10:
+            sprintf(pointer, "18Mbps");
+            return;
+        case 11:
+            sprintf(pointer, "24Mbps");
+            return;
+        case 12:
+            sprintf(pointer, "36Mbps");
+            return;
+        case 13:
+            sprintf(pointer, "48Mbps");
+            return;
+        case 14:
+            sprintf(pointer, "54Mbps");
+            return;
+        case 15:
+        case 31:
+            sprintf(pointer, "MCS0-l");
+            return;
+        case 16:
+        case 32:
+            sprintf(pointer, "MCS1-l");
+            return;
+        case 17:
+        case 33:
+            sprintf(pointer, "MCS2-l");
+            return;
+        case 18:
+        case 34:
+            sprintf(pointer, "MCS3-l");
+            return;
+        case 19:
+        case 35:
+            sprintf(pointer, "MCS4-l");
+            return;
+        case 20:
+        case 36:
+            sprintf(pointer, "MCS5-l");
+            return;
+        case 21:
+        case 37:
+            sprintf(pointer, "MCS6-l");
+            return;
+        case 22:
+        case 38:
+            sprintf(pointer, "MCS7-l");
+            return;
+        case 23:
+            sprintf(pointer, "MCS0-s");
+            return;
+        case 24:
+            sprintf(pointer, "MCS1-s");
+            return;
+        case 25:
+            sprintf(pointer, "MCS2-s");
+            return;
+        case 26:
+            sprintf(pointer, "MCS3-s");
+            return;
+        case 27:
+            sprintf(pointer, "MCS4-s");
+            return;
+        case 28:
+            sprintf(pointer, "MCS5-s");
+            return;
+        case 29:
+            sprintf(pointer, "MCS6-s");
+            return;
+        case 30:
+            sprintf(pointer, "MCS7-s");
+            return;
+        default:
+            sprintf(pointer, "Unknow");
+            return;
+    };
+}
+#endif
+static void ssv6xxx_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
+                 struct ieee80211_tx_rate_control *txrc)
+{
+    struct ssv_softc *sc=priv;
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    struct ssv_sta_rc_info *rc_sta=priv_sta;
+    struct sk_buff *skb = txrc->skb;
+    struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+    struct ieee80211_tx_rate *rates = tx_info->control.rates;
+    struct rc_pid_sta_info *spinfo=&rc_sta->spinfo;
+    struct ssv_rc_rate *rc_rate = NULL;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    int rateidx = 99;
+    #if 0
+    if ( (tx_info->control.vif != NULL)
+        && (tx_info->control.vif->p2p))
+    {
+        tx_info->flags |= IEEE80211_TX_CTL_NO_CCK_RATE;
+    }
+    #endif
+    if (rate_control_send_low(sta, priv_sta, txrc))
+    {
+        int i = 0;
+        int total_rates = (sizeof(ssv_11bgn_rate_table) / sizeof(ssv_11bgn_rate_table[0]));
+#if 1
+        if ((txrc->rate_idx_mask & (1 << rates[0].idx)) == 0)
+        {
+            u32 rate_idx = rates[0].idx + 1;
+            u32 rate_idx_mask = txrc->rate_idx_mask >> rate_idx;
+            while (rate_idx_mask && (rate_idx_mask & 1) == 0)
+            {
+                rate_idx_mask >>= 1;
+                rate_idx++;
+            }
+            if (rate_idx_mask)
+                rates[0].idx = rate_idx;
+            else
+            {
+                WARN_ON(rate_idx_mask == 0);
+            }
+        }
+#endif
+        for (i = 0; i < total_rates; i++)
+        {
+            if (rates[0].idx == ssv_11bgn_rate_table[i].dot11_rate_idx)
+            {
+                break;
+            }
+        }
+        if (i < total_rates)
+            rc_rate = &ssv_rc->rc_table[i];
+        else
+        {
+            WARN_ON("Failed to find matching low rate.");
+        }
+    }
+    if (rc_rate == NULL) {
+        if (conf_is_ht(&sc->hw->conf) &&
+                (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
+            tx_info->flags |= IEEE80211_TX_CTL_LDPC;
+        if (conf_is_ht(&sc->hw->conf) &&
+                (sta->ht_cap.cap & IEEE80211_HT_CAP_TX_STBC))
+            tx_info->flags |= (1 << IEEE80211_TX_CTL_STBC_SHIFT);
+        if (sc->sc_flags & SC_OP_FIXED_RATE) {
+            rateidx = sc->max_rate_idx;
+        }
+        else {
+            if (rc_sta->rc_valid == false) {
+                rateidx = 0;
+            }
+            else {
+                if ((rc_sta->rc_wsid >= SSV_RC_MAX_HARDWARE_SUPPORT) || (rc_sta->rc_wsid < 0))
+                {
+                    ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+                    {
+                        if ((rc_sta->ht_rc_type >= RC_TYPE_HT_SGI_20) &&
+                            (ssv_sta_priv->rx_data_rate < SSV62XX_RATE_MCS_INDEX))
+                        {
+                            rateidx = rc_sta->pinfo.rinfo[spinfo->txrate_idx].rc_index;
+                            #if 0
+                            printk("RC %d rx %d tx %d\n", ssv_sta_priv->sta_idx,
+                                   ssv_sta_priv->rx_data_rate, rateidx);
+                            #endif
+                        }
+                        else
+                        {
+                            rateidx = ssv_sta_priv->rx_data_rate;
+                        }
+                    }
+                }
+                else
+                {
+                    if (rc_sta->is_ht)
+                    {
+#ifdef DISABLE_RATE_CONTROL_SAMPLE
+                        rateidx = rc_sta->ht.groups.rates[MCS_GROUP_RATES-1].rc_index;
+#else
+                        rateidx = rc_sta->pinfo.rinfo[spinfo->txrate_idx].rc_index;
+#endif
+                    }
+                    else
+                    {
+#if 0
+                        if (spinfo->monitoring && spinfo->probe_cnt > 0) {
+                            rateidx = rc_sta->pinfo.rinfo[spinfo->tmp_rate_idx].rc_index;
+                            spinfo->probe_cnt--;
+                        }
+                        else
+#endif
+                        {
+                            BUG_ON(spinfo->txrate_idx >= rc_sta->rc_num_rate);
+                            rateidx = rc_sta->pinfo.rinfo[spinfo->txrate_idx].rc_index;
+                        }
+                        if(rateidx<4)
+                        {
+                            if(rateidx)
+                            {
+                                if ((sc->sc_flags & SC_OP_SHORT_PREAMBLE)||(txrc->short_preamble))
+                                {
+                                    rateidx += 3;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+        rc_rate = &ssv_rc->rc_table[rateidx];
+#if 1
+        if (spinfo->real_hw_index != rc_rate->hw_rate_idx)
+        {
+            char string[24];
+            rateControlGetRate(rc_rate->hw_rate_idx,string);
+        }
+#endif
+  spinfo->real_hw_index = rc_rate->hw_rate_idx;
+        rates[0].count = 4;
+        rates[0].idx = rc_rate->dot11_rate_idx;
+        tx_info->control.rts_cts_rate_idx =
+            ssv_rc->rc_table[rc_rate->ctrl_rate_idx].dot11_rate_idx;
+        if (rc_rate->rc_flags & RC_FLAG_SHORT_PREAMBLE)
+            rates[0].flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
+        if (rc_rate->rc_flags & RC_FLAG_HT) {
+            rates[0].flags |= IEEE80211_TX_RC_MCS;
+            if (rc_rate->rc_flags & RC_FLAG_HT_SGI)
+                rates[0].flags |= IEEE80211_TX_RC_SHORT_GI;
+            if (rc_rate->rc_flags & RC_FLAG_HT_GF)
+                rates[0].flags |= IEEE80211_TX_RC_GREEN_FIELD;
+        }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
+        if (txrc->rts)
+        {
+            rates[0].flags |= IEEE80211_TX_RC_USE_RTS_CTS;
+        }
+        if ((tx_info->control.vif &&
+            tx_info->control.vif->bss_conf.use_cts_prot) &&
+            (rc_rate->phy_type==WLAN_RC_PHY_OFDM ||
+            rc_rate->phy_type>WLAN_RC_PHY_OFDM))
+        {
+            rates[0].flags |= IEEE80211_TX_RC_USE_CTS_PROTECT;
+            tx_info->control.rts_cts_rate_idx = 1;
+        }
+#endif
+    }
+    rates[1].count = 0;
+    rates[1].idx = -1;
+    rates[SSV_DRATE_IDX].count = rc_rate->hw_rate_idx;
+ rc_rate = &ssv_rc->rc_table[rc_rate->ctrl_rate_idx];
+ rates[SSV_CRATE_IDX].count = rc_rate->hw_rate_idx;
+}
+int pide_frame_duration(size_t len,
+                 int rate, int short_preamble, int flags)
+{
+    int dur=0;
+    if (flags == WLAN_RC_PHY_CCK)
+    {
+        dur = 10;
+        dur += short_preamble ? (72 + 24) : (144 + 48);
+        dur += DIV_ROUND_UP(8 * (len + 4) * 10, rate);
+    }
+    else {
+        dur = 16;
+        dur += 16;
+        dur += 4;
+        dur += 4 * DIV_ROUND_UP((16 + 8 * (len + 4) + 6) * 10,
+                    4 * rate);
+    }
+    return dur;
+}
+static void ssv62xx_rc_caps(struct ssv_sta_rc_info *rc_sta)
+{
+    struct rc_pid_sta_info *spinfo;
+    struct rc_pid_info *pinfo;
+    struct rc_pid_rateinfo *rinfo;
+    int i;
+    spinfo = &rc_sta->spinfo;
+    pinfo = &rc_sta->pinfo;
+    memset(spinfo, 0, sizeof(struct rc_pid_sta_info));
+    memset(pinfo, 0, sizeof(struct rc_pid_info));
+    rinfo = rc_sta->pinfo.rinfo;
+    for(i=0; i<rc_sta->rc_num_rate; i++) {
+        rinfo[i].rc_index = ssv6xxx_rc_rate_set[rc_sta->rc_type][i+1];
+        rinfo[i].diff = i * RC_PID_NORM_OFFSET;
+        rinfo[i].index = (u16)i;
+        rinfo[i].perfect_tx_time = TDIFS + (TSLOT * 15 >> 1) + pide_frame_duration(1530,
+            ssv_11bgn_rate_table[rinfo[i].rc_index].rate_kbps/100, 1,ssv_11bgn_rate_table[rinfo[i].rc_index].phy_type) +
+            pide_frame_duration(10, ssv_11bgn_rate_table[rinfo[i].rc_index].rate_kbps/100, 1,ssv_11bgn_rate_table[rinfo[i].rc_index].phy_type);
+#if 1
+        printk("[RC]Init perfect_tx_time[%d][%d]\n",i,rinfo[i].perfect_tx_time);
+#endif
+        rinfo[i].throughput = 0;
+    }
+    if(rc_sta->is_ht)
+    {
+        if(ssv6xxx_rc_rate_set[rc_sta->ht_rc_type][0] == 12)
+            spinfo->txrate_idx = 4;
+        else
+            spinfo->txrate_idx = 0;
+    }
+    else
+    {
+        spinfo->txrate_idx = ssv6xxx_rate_lowest_index(rc_sta);
+#ifdef DISABLE_RATE_CONTROL_SAMPLE
+        spinfo->txrate_idx = ssv6xxx_rate_highest_index(rc_sta);
+#endif
+    }
+    spinfo->real_hw_index = 0;
+    spinfo->probe_cnt = MAXPROBES;
+    spinfo->tmp_rate_idx = spinfo->txrate_idx;
+    spinfo->oldrate = spinfo->txrate_idx;
+    spinfo->last_sample = jiffies;
+    spinfo->last_report = jiffies;
+}
+static void ssv6xxx_rate_update_rc_type(void *priv, struct ieee80211_supported_band *sband,
+                  struct ieee80211_sta *sta, void *priv_sta)
+{
+    struct ssv_softc *sc=priv;
+    struct ssv_hw *sh=sc->sh;
+    struct ssv_sta_rc_info *rc_sta=priv_sta;
+    int i;
+    u32 ht_supp_rates = 0;
+    BUG_ON(rc_sta->rc_valid == false);
+    printk("[I] %s(): \n", __FUNCTION__);
+    rc_sta->ht_supp_rates = 0;
+    rc_sta->rc_supp_rates = 0;
+    rc_sta->is_ht = 0;
+#ifndef CONFIG_CH14_SUPPORT_GN_MODE
+    if(sc->cur_channel->hw_value == 14)
+    {
+        printk("[RC init ]Channel 14 support\n");
+        if((sta->supp_rates[sband->band] & (~0xfL)) == 0x0)
+        {
+            printk("[RC init ]B only mode\n");
+            rc_sta->rc_type = RC_TYPE_B_ONLY;
+        }
+        else
+        {
+            printk("[RC init ]GB mode\n");
+            rc_sta->rc_type = RC_TYPE_LEGACY_GB;
+        }
+    }
+    else
+#endif
+    if (sta->ht_cap.ht_supported == true) {
+        printk("[RC init ]HT support wsid\n");
+        for (i = 0; i < SSV_HT_RATE_MAX; i++) {
+            if (sta->ht_cap.mcs.rx_mask[i/MCS_GROUP_RATES] & (1<<(i%MCS_GROUP_RATES)))
+                ht_supp_rates |= BIT(i);
+        }
+        rc_sta->ht_supp_rates = ht_supp_rates;
+        if (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD)
+        {
+            rc_sta->rc_type = RC_TYPE_HT_GF;
+            rc_sta->ht_rc_type = RC_TYPE_HT_GF;
+        }
+        else if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
+        {
+            rc_sta->rc_type = RC_TYPE_SGI_20;
+            rc_sta->ht_rc_type = RC_TYPE_HT_SGI_20;
+        }
+        else
+        {
+            rc_sta->rc_type = RC_TYPE_LGI_20;
+            rc_sta->ht_rc_type = RC_TYPE_HT_LGI_20;
+        }
+    }
+    else
+    {
+        if((sta->supp_rates[sband->band] & (~0xfL)) == 0x0){
+            rc_sta->rc_type = RC_TYPE_B_ONLY;
+            printk("[RC init ]B only mode\n");
+        }
+        else{
+            rc_sta->rc_type = RC_TYPE_LEGACY_GB;
+            printk("[RC init ]legacy G mode\n");
+        }
+    }
+#ifdef CONFIG_SSV_DPD
+#ifdef CONFIG_SSV_CABRIO_E
+    if(rc_sta->rc_type == RC_TYPE_B_ONLY)
+    {
+        SMAC_REG_WRITE(sh, ADR_TX_FE_REGISTER, 0x3D3E84FE);
+        SMAC_REG_WRITE(sh, ADR_RX_FE_REGISTER_1, 0x1457D79);
+        SMAC_REG_WRITE(sh, ADR_DPD_CONTROL, 0x0);
+    }
+    else
+    {
+        SMAC_REG_WRITE(sh, ADR_TX_FE_REGISTER, 0x3CBE84FE);
+        SMAC_REG_WRITE(sh, ADR_RX_FE_REGISTER_1, 0x4507F9);
+        SMAC_REG_WRITE(sh, ADR_DPD_CONTROL, 0x3);
+    }
+#endif
+#endif
+    if((rc_sta->rc_type != RC_TYPE_B_ONLY) && (rc_sta->rc_type != RC_TYPE_LEGACY_GB))
+    {
+        if ((sta->ht_cap.ht_supported) && (sh->cfg.hw_caps & SSV6200_HW_CAP_AMPDU_TX))
+        {
+            rc_sta->is_ht = 1;
+            ssv62xx_ht_rc_caps(ssv6xxx_rc_rate_set, rc_sta);
+        }
+    }
+    {
+        rc_sta->rc_num_rate = (u8)ssv6xxx_rc_rate_set[rc_sta->rc_type][0];
+        if((rc_sta->rc_type == RC_TYPE_HT_GF) ||
+            (rc_sta->rc_type == RC_TYPE_LGI_20) || (rc_sta->rc_type == RC_TYPE_SGI_20))
+        {
+            if(rc_sta->rc_num_rate == 12)
+            {
+                rc_sta->rc_supp_rates = sta->supp_rates[sband->band] & 0xfL;
+                rc_sta->rc_supp_rates |= (ht_supp_rates << 4);
+            }
+            else
+                rc_sta->rc_supp_rates = ht_supp_rates;
+        }
+        else if(rc_sta->rc_type == RC_TYPE_LEGACY_GB)
+            rc_sta->rc_supp_rates = sta->supp_rates[sband->band];
+        else if(rc_sta->rc_type == RC_TYPE_B_ONLY)
+            rc_sta->rc_supp_rates = sta->supp_rates[sband->band] & 0xfL;
+        ssv62xx_rc_caps(rc_sta);
+    }
+}
+#if LINUX_VERSION_CODE > 0x030500
+static void ssv6xxx_rate_update(void *priv, struct ieee80211_supported_band *sband,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,13,0)
+                            struct cfg80211_chan_def *chandef,
+#endif
+                            struct ieee80211_sta *sta, void *priv_sta,
+                            u32 changed)
+#else
+static void ssv6xxx_rate_update(void *priv, struct ieee80211_supported_band *sband,
+                            struct ieee80211_sta *sta, void *priv_sta,
+                            u32 changed, enum nl80211_channel_type oper_chan_type)
+#endif
+{
+    printk("%s: changed=%d\n",__FUNCTION__,changed);
+    return;
+}
+static void ssv6xxx_rate_init(void *priv, struct ieee80211_supported_band *sband,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,13,0)
+                  struct cfg80211_chan_def *chandef,
+#endif
+                  struct ieee80211_sta *sta, void *priv_sta)
+{
+    ssv6xxx_rate_update_rc_type(priv, sband, sta, priv_sta);
+}
+static void *ssv6xxx_rate_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp)
+{
+    struct ssv_sta_priv_data *sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+#ifndef RC_STA_DIRECT_MAP
+    struct ssv_softc *sc = priv;
+    struct ssv_rate_ctrl *ssv_rc = sc->rc;
+    int s;
+    sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    for(s=0; s<SSV_RC_MAX_STA; s++) {
+        if (ssv_rc->sta_rc_info[s].rc_valid == false) {
+            printk("%s(): use index %d\n", __FUNCTION__, s);
+            memset(&ssv_rc->sta_rc_info[s], 0, sizeof(struct ssv_sta_rc_info));
+            ssv_rc->sta_rc_info[s].rc_valid = true;
+            ssv_rc->sta_rc_info[s].rc_wsid = -1;
+            sta_priv->rc_idx = s;
+            return &ssv_rc->sta_rc_info[s];
+        }
+    }
+    return NULL;
+#else
+    sta_priv->rc_idx = (-1);
+    return sta_priv;
+#endif
+}
+static void ssv6xxx_rate_free_sta(void *priv, struct ieee80211_sta *sta,
+                              void *priv_sta)
+{
+    struct ssv_sta_rc_info *rc_sta=priv_sta;
+    rc_sta->rc_valid = false;
+}
+static void *ssv6xxx_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir)
+{
+    struct ssv_softc *sc=hw->priv;
+    struct ssv_rate_ctrl *ssv_rc;
+    sc->rc = kzalloc(sizeof(struct ssv_rate_ctrl), GFP_KERNEL);
+    if (!sc->rc) {
+        printk("%s(): Unable to allocate RC structure !\n",
+            __FUNCTION__);
+        return NULL;
+    }
+    memset(sc->rc, 0, sizeof(struct ssv_rate_ctrl));
+    ssv_rc = (struct ssv_rate_ctrl *)sc->rc;
+    ssv_rc->rc_table = ssv_11bgn_rate_table;
+    skb_queue_head_init(&sc->rc_report_queue);
+    INIT_WORK(&sc->rc_sample_work,ssv6xxx_sample_work);
+    sc->rc_sample_workqueue = create_workqueue("ssv6xxx_rc_sample");
+    sc->rc_sample_sechedule = 0;
+    return hw->priv;
+}
+static void ssv6xxx_rate_free(void *priv)
+{
+    struct ssv_softc *sc=priv;
+    if (sc->rc) {
+        kfree(sc->rc);
+        sc->rc = NULL;
+    }
+    sc->rc_sample_sechedule = 0;
+    cancel_work_sync(&sc->rc_sample_work);
+    flush_workqueue(sc->rc_sample_workqueue);
+    destroy_workqueue(sc->rc_sample_workqueue);
+}
+static struct rate_control_ops ssv_rate_ops =
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)
+    .module = NULL,
+#endif
+    .name = "ssv6xxx_rate_control",
+    .tx_status = ssv6xxx_tx_status,
+    .get_rate = ssv6xxx_get_rate,
+    .rate_init = ssv6xxx_rate_init,
+    .rate_update = ssv6xxx_rate_update,
+    .alloc = ssv6xxx_rate_alloc,
+    .free = ssv6xxx_rate_free,
+    .alloc_sta = ssv6xxx_rate_alloc_sta,
+    .free_sta = ssv6xxx_rate_free_sta,
+};
+void ssv6xxx_rc_mac8011_rate_idx(struct ssv_softc *sc,
+            int hw_rate_idx, struct ieee80211_rx_status *rxs)
+{
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    struct ssv_rc_rate *rc_rate;
+    BUG_ON(hw_rate_idx>=RATE_TABLE_SIZE &&
+        hw_rate_idx < 0);
+    rc_rate = &ssv_rc->rc_table[hw_rate_idx];
+    if (rc_rate->rc_flags & RC_FLAG_HT) {
+        rxs->flag |= RX_FLAG_HT;
+        if (rc_rate->rc_flags & RC_FLAG_HT_SGI)
+            rxs->flag |= RX_FLAG_SHORT_GI;
+    }
+    else {
+        if (rc_rate->rc_flags & RC_FLAG_SHORT_PREAMBLE)
+            rxs->flag |= RX_FLAG_SHORTPRE;
+    }
+    rxs->rate_idx = rc_rate->dot11_rate_idx;
+}
+void ssv6xxx_rc_hw_rate_idx(struct ssv_softc *sc,
+            struct ieee80211_tx_info *info, struct ssv_rate_info *sr)
+{
+    struct ieee80211_tx_rate *tx_rate;
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    tx_rate = &info->control.rates[0];
+    sr->d_flags = (ssv_rc->rc_table[tx_rate[SSV_DRATE_IDX].count].phy_type == WLAN_RC_PHY_OFDM) ? IEEE80211_RATE_ERP_G:0;
+    sr->d_flags |= (ssv_rc->rc_table[tx_rate[SSV_DRATE_IDX].count].rc_flags & RC_FLAG_SHORT_PREAMBLE)? IEEE80211_RATE_SHORT_PREAMBLE:0;
+    sr->c_flags = (ssv_rc->rc_table[tx_rate[SSV_CRATE_IDX].count].phy_type == WLAN_RC_PHY_OFDM) ? IEEE80211_RATE_ERP_G:0;
+    sr->c_flags |= (ssv_rc->rc_table[tx_rate[SSV_CRATE_IDX].count].rc_flags & RC_FLAG_SHORT_PREAMBLE)? IEEE80211_RATE_SHORT_PREAMBLE:0;
+    sr->drate_kbps = ssv_rc->rc_table[tx_rate[SSV_DRATE_IDX].count].rate_kbps;
+    sr->drate_hw_idx = tx_rate[SSV_DRATE_IDX].count;
+    sr->crate_kbps = ssv_rc->rc_table[tx_rate[SSV_CRATE_IDX].count].rate_kbps;
+    sr->crate_hw_idx = tx_rate[SSV_CRATE_IDX].count;
+}
+#ifdef RATE_CONTROL_REALTIME_UPDATA
+u8 ssv6xxx_rc_hw_rate_update_check(struct sk_buff *skb, struct ssv_softc *sc, u32 do_rts_cts)
+{
+    int ret = 0;
+    struct ssv_rate_ctrl *ssv_rc = sc->rc;
+    struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+    struct SKB_info_st *skb_info = (struct SKB_info_st *)skb->head;
+    struct ieee80211_sta *sta = skb_info->sta;
+    struct ieee80211_tx_rate *rates = &tx_info->control.rates[0];
+    struct ssv_rc_rate *rc_rate = NULL;
+    u8 rateidx=0;
+    struct ssv_sta_rc_info *rc_sta = NULL;
+    struct rc_pid_sta_info *spinfo;
+    struct ssv_sta_priv_data *sta_priv = NULL;
+    unsigned long period=0;
+    if (sc->sc_flags & SC_OP_FIXED_RATE)
+        return ret;
+    if(sta == NULL)
+        return ret;
+    sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    if(sta_priv == NULL)
+    {
+#ifdef RATE_CONTROL_DEBUG
+        printk("%s sta_priv == NULL \n\r", __FUNCTION__);
+#endif
+        return ret;
+    }
+    if((sta_priv->rc_idx < 0)||(sta_priv->rc_idx >= SSV_RC_MAX_STA))
+    {
+#ifdef RATE_CONTROL_DEBUG
+        printk("%s rc_idx %x illegal \n\r", __FUNCTION__, sta_priv->rc_idx);
+#endif
+        return ret;
+    }
+    rc_sta = &ssv_rc->sta_rc_info[sta_priv->rc_idx];
+    if(rc_sta->rc_valid == false)
+    {
+#ifdef RATE_CONTROL_DEBUG
+        printk("%s rc_valid false \n\r", __FUNCTION__);
+#endif
+        return ret;
+    }
+    spinfo= &rc_sta->spinfo;
+    period = msecs_to_jiffies(RC_PID_REPORT_INTERVAL);
+    if (time_after(jiffies, spinfo->last_report + period))
+    {
+        ret |= RC_FIRMWARE_REPORT_FLAG;
+        spinfo->last_report = jiffies;
+    }
+    {
+        if (spinfo->monitoring)
+        {
+            if(spinfo->probe_report_flag == 0)
+            {
+                ret |= RC_FIRMWARE_REPORT_FLAG;
+                spinfo->last_report = jiffies;
+                spinfo->probe_report_flag = 1;
+                rateidx = spinfo->real_hw_index;
+            }
+            else if (spinfo->probe_cnt > 0 && spinfo->probe_report_flag) {
+                rateidx = rc_sta->pinfo.rinfo[spinfo->tmp_rate_idx].rc_index;
+                spinfo->probe_cnt--;
+                if(spinfo->probe_cnt == 0)
+                {
+                    ret |= RC_FIRMWARE_REPORT_FLAG;
+                    spinfo->last_report = jiffies;
+                }
+            }
+            else
+                rateidx = spinfo->real_hw_index;
+        }
+        else
+            rateidx = spinfo->real_hw_index;
+    }
+    if(rateidx >= RATE_TABLE_SIZE)
+    {
+        printk("[ERROR]rateidx over range\n\r");
+        return 0;
+    }
+    rc_rate = &ssv_rc->rc_table[rateidx];
+#ifdef RATE_CONTROL_STUPID_DEBUG
+    if (spinfo->monitoring && (spinfo->probe_cnt))
+    {
+        char string[24];
+        rateControlGetRate(rc_rate->hw_rate_idx,string);
+        printk("[RC]Probe rate[%s]\n",string);
+    }
+#endif
+    if(rc_rate == NULL)
+        return ret;
+    if(rc_rate->hw_rate_idx != rates[SSV_DRATE_IDX].count)
+    {
+        rates[0].flags = 0;
+        if (rc_rate->rc_flags & RC_FLAG_SHORT_PREAMBLE)
+            rates[0].flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
+        if (rc_rate->rc_flags & RC_FLAG_HT) {
+            rates[0].flags |= IEEE80211_TX_RC_MCS;
+            if (rc_rate->rc_flags & RC_FLAG_HT_SGI)
+                rates[0].flags |= IEEE80211_TX_RC_SHORT_GI;
+            if (rc_rate->rc_flags & RC_FLAG_HT_GF)
+                rates[0].flags |= IEEE80211_TX_RC_GREEN_FIELD;
+        }
+        rates[SSV_DRATE_IDX].count = rc_rate->hw_rate_idx;
+        if (do_rts_cts & IEEE80211_TX_RC_USE_CTS_PROTECT)
+        {
+            rates[SSV_CRATE_IDX].count = 0;
+        }
+        else
+        {
+            rc_rate = &ssv_rc->rc_table[rc_rate->ctrl_rate_idx];
+            rates[SSV_CRATE_IDX].count = rc_rate->hw_rate_idx;
+        }
+        ret |= 0x1;
+    }
+    return ret;
+}
+#endif
+void ssv6xxx_rc_hw_reset(struct ssv_softc *sc, int rc_idx, int hwidx)
+{
+    struct ssv_rate_ctrl *ssv_rc=sc->rc;
+    struct ssv_sta_rc_info *rc_sta;
+    u32 rc_hw_reg[] = { ADR_MTX_MIB_WSID0, ADR_MTX_MIB_WSID1 };
+    BUG_ON(rc_idx >= SSV_RC_MAX_STA);
+    rc_sta = &ssv_rc->sta_rc_info[rc_idx];
+    if (hwidx >=0 && hwidx<SSV_NUM_HW_STA) {
+        rc_sta->rc_wsid = hwidx;
+        printk("rc_wsid[%d] rc_idx[%d]\n",rc_sta[rc_idx].rc_wsid,rc_idx);
+        SMAC_REG_WRITE(sc->sh, rc_hw_reg[hwidx], 0x40000000);
+    }
+    else
+    {
+        rc_sta->rc_wsid = -1;
+    }
+}
+#define UPDATE_PHY_INFO_ACK_RATE(_phy_info,_ack_rate_idx) ( _phy_info = (_phy_info&0xfffffc0f)|(_ack_rate_idx<<4))
+int ssv6xxx_rc_update_bmode_ctrl_rate(struct ssv_softc *sc, int rate_tbl_idx, int ctrl_rate_idx)
+{
+     u32 temp32;
+     struct ssv_hw *sh = sc->sh;
+     u32 addr;
+    addr = sh->hw_pinfo+rate_tbl_idx*4;
+    ssv_11bgn_rate_table[rate_tbl_idx].ctrl_rate_idx = ctrl_rate_idx;
+    SMAC_REG_READ(sh, addr, &temp32);
+    UPDATE_PHY_INFO_ACK_RATE(temp32, ctrl_rate_idx);
+    SMAC_REG_WRITE(sh, addr, temp32);
+    SMAC_REG_CONFIRM(sh, addr, temp32);
+    return 0;
+}
+void ssv6xxx_rc_update_basic_rate(struct ssv_softc *sc, u32 basic_rates)
+{
+    int i;
+    int rate_idx, pre_rate_idx = 0;
+    for(i=0;i<4;i++)
+    {
+        if(((basic_rates>>i)&0x01))
+        {
+            rate_idx = i;
+            pre_rate_idx = i;
+        }
+        else
+            rate_idx = pre_rate_idx;
+        ssv6xxx_rc_update_bmode_ctrl_rate(sc, i, rate_idx);
+        if(i)
+            ssv6xxx_rc_update_bmode_ctrl_rate(sc, i+3, rate_idx);
+    }
+}
+int ssv6xxx_rate_control_register(void)
+{
+    return ieee80211_rate_control_register(&ssv_rate_ops);
+}
+void ssv6xxx_rate_control_unregister(void)
+{
+    ieee80211_rate_control_unregister(&ssv_rate_ops);
+}
+void ssv6xxx_rc_rx_data_handler(struct ieee80211_hw *hw, struct sk_buff *skb, u32 rate_index)
+{
+    struct ssv_softc *sc = hw->priv;
+    struct ieee80211_sta *sta;
+    struct ssv_sta_priv_data *ssv_sta_priv;
+    sta = ssv6xxx_find_sta_by_rx_skb(sc, skb);
+    if(sta == NULL)
+    {
+        return;
+    }
+    ssv_sta_priv = (struct ssv_sta_priv_data *)sta->drv_priv;
+    ssv_sta_priv->rx_data_rate = rate_index;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.h
new file mode 100644
index 0000000000000..7cf602316fd91
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_RC_H_
+#define _SSV_RC_H_ 
+#include "ssv_rc_common.h"
+#define RC_PID_REPORT_INTERVAL 40
+#define RC_PID_INTERVAL 125
+#define RC_PID_DO_ARITH_RIGHT_SHIFT(x,y) \
+ ((x) < 0 ? -((-(x)) >> (y)) : (x) >> (y))
+#define RC_PID_NORM_OFFSET 3
+#define RC_PID_SMOOTHING_SHIFT 1
+#define RC_PID_SMOOTHING (1 << RC_PID_SMOOTHING_SHIFT)
+#define RC_PID_COEFF_P 15
+#define RC_PID_COEFF_I 15
+#define RC_PID_COEFF_D 5
+#define MAXPROBES 3
+#define SSV_DRATE_IDX (2)
+#define SSV_CRATE_IDX (3)
+struct ssv_softc;
+struct ssv_rc_rate *ssv6xxx_rc_get_rate(int rc_index);
+void ssv6xxx_rc_hw_rate_idx(struct ssv_softc *sc,
+            struct ieee80211_tx_info *info, struct ssv_rate_info *sr);
+#ifdef RATE_CONTROL_REALTIME_UPDATA
+u8 ssv6xxx_rc_hw_rate_update_check(struct sk_buff *skb, struct ssv_softc *sc, u32 do_rts_cts);
+#endif
+void ssv6xxx_rc_mac8011_rate_idx(struct ssv_softc *sc, int hw_rate_idx,
+                struct ieee80211_rx_status *rxs);
+void ssv6xxx_rc_hw_reset(struct ssv_softc *sc, int rc_idx, int hwidx);
+void ssv6xxx_rc_update_basic_rate(struct ssv_softc *sc, u32 basic_rates);
+int ssv6xxx_rate_control_register(void);
+void ssv6xxx_rate_control_unregister(void);
+void ssv6xxx_rc_rx_data_handler(struct ieee80211_hw *hw, struct sk_buff *skb, u32 rate_index);
+int pide_frame_duration(size_t len, int rate, int short_preamble, int flags);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc_common.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc_common.h
new file mode 100644
index 0000000000000..61c03c0a5beb9
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_rc_common.h
@@ -0,0 +1,184 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_RC_COM_H_
+#define _SSV_RC_COM_H_ 
+#define SSV_RC_MAX_STA 8
+#define MCS_GROUP_RATES 8
+#define SSV_HT_RATE_MAX 8
+#define TDIFS 34
+#define TSLOT 9
+#define SSV_RC_MAX_HARDWARE_SUPPORT 2
+#define RC_FIRMWARE_REPORT_FLAG 0x80
+#define RC_FLAG_INVALID 0x00000001
+#define RC_FLAG_LEGACY 0x00000002
+#define RC_FLAG_HT 0x00000004
+#define RC_FLAG_HT_SGI 0x00000008
+#define RC_FLAG_HT_GF 0x00000010
+#define RC_FLAG_SHORT_PREAMBLE 0x00000020
+enum ssv6xxx_rc_phy_type {
+    WLAN_RC_PHY_CCK,
+    WLAN_RC_PHY_OFDM,
+    WLAN_RC_PHY_HT_20_SS_LGI,
+    WLAN_RC_PHY_HT_20_SS_SGI,
+    WLAN_RC_PHY_HT_20_SS_GF,
+};
+#define RATE_TABLE_SIZE 39
+#define RC_STA_VALID 0x00000001
+#define RC_STA_CAP_HT 0x00000002
+#define RC_STA_CAP_GF 0x00000004
+#define RC_STA_CAP_SGI_20 0x00000008
+#define RC_STA_CAP_SHORT_PREAMBLE 0x00000010
+#define SSV62XX_G_RATE_INDEX 7
+#define SSV62XX_RATE_MCS_INDEX 15
+#define SSV62XX_RATE_MCS_LGI_INDEX 15
+#define SSV62XX_RATE_MCS_SGI_INDEX 23
+#define SSV62XX_RATE_MCS_GREENFIELD_INDEX 31
+enum ssv_rc_rate_type {
+    RC_TYPE_B_ONLY=0,
+    RC_TYPE_LEGACY_GB,
+    RC_TYPE_SGI_20,
+    RC_TYPE_LGI_20,
+    RC_TYPE_HT_SGI_20,
+    RC_TYPE_HT_LGI_20,
+    RC_TYPE_HT_GF,
+    RC_TYPE_MAX,
+};
+struct ssv_rate_info {
+    int crate_kbps;
+    int crate_hw_idx;
+    int drate_kbps;
+    int drate_hw_idx;
+    u32 d_flags;
+    u32 c_flags;
+};
+struct ssv_rc_rate {
+    u32 rc_flags;
+    u16 phy_type;
+    u32 rate_kbps;
+    u8 dot11_rate_idx;
+    u8 ctrl_rate_idx;
+    u8 hw_rate_idx;
+    u8 arith_shift;
+    u8 target_pf;
+};
+struct rc_pid_sta_info {
+    unsigned long last_sample;
+    unsigned long last_report;
+    u16 tx_num_failed;
+    u16 tx_num_xmit;
+    u8 probe_report_flag;
+    u8 probe_wating_times;
+    u8 real_hw_index;
+    int txrate_idx;
+    u8 last_pf;
+    s32 err_avg_sc;
+    int last_dlr;
+    u8 feedback_probes;
+    u8 monitoring;
+    u8 oldrate;
+    u8 tmp_rate_idx;
+    u8 probe_cnt;
+};
+struct rc_pid_rateinfo {
+    u16 rc_index;
+    u16 index;
+ s32 diff;
+ u16 perfect_tx_time;
+ u32 throughput;
+ unsigned long this_attempt;
+ unsigned long this_success;
+ unsigned long this_fail;
+ u64 attempt;
+ u64 success;
+ u64 fail;
+};
+struct rc_pid_info {
+ unsigned int target;
+#if 0
+ u8 coeff_p;
+ u8 coeff_i;
+ u8 coeff_d;
+ u8 smoothing_shift;
+ u8 sharpen_factor;
+ u8 sharpen_duration;
+ u8 norm_offset;
+#endif
+ int oldrate;
+ struct rc_pid_rateinfo rinfo[12];
+};
+struct mcs_group {
+    unsigned int duration[MCS_GROUP_RATES];
+};
+struct minstrel_rate_stats {
+    u16 rc_index;
+    unsigned int attempts, last_attempts;
+    unsigned int success, last_success;
+    u64 att_hist, succ_hist;
+    unsigned int cur_tp;
+    unsigned int cur_prob, probability;
+    unsigned int retry_count;
+    unsigned int retry_count_rtscts;
+    u8 sample_skipped;
+};
+struct minstrel_mcs_group_data {
+    u8 index;
+    u8 column;
+    unsigned int max_tp_rate;
+    unsigned int max_tp_rate2;
+    unsigned int max_prob_rate;
+    struct minstrel_rate_stats rates[MCS_GROUP_RATES];
+};
+struct ssv62xx_ht {
+    unsigned int ampdu_len;
+    unsigned int ampdu_packets;
+    unsigned int avg_ampdu_len;
+    unsigned int max_tp_rate;
+    unsigned int max_tp_rate2;
+    unsigned int max_prob_rate;
+    int first_try_count;
+    int second_try_count;
+    int other_try_count;
+    unsigned long stats_update;
+    unsigned int overhead;
+    unsigned int overhead_rtscts;
+    unsigned int total_packets;
+    unsigned int sample_packets;
+    u8 sample_wait;
+    u8 sample_tries;
+    u8 sample_count;
+    u8 sample_slow;
+    struct minstrel_mcs_group_data groups;
+};
+struct ssv_sta_rc_info {
+    u8 rc_valid;
+    u8 rc_type;
+    u8 rc_num_rate;
+    s8 rc_wsid;
+    u8 ht_rc_type;
+    u8 is_ht;
+    u32 rc_supp_rates;
+    u32 ht_supp_rates;
+    struct rc_pid_info pinfo;
+    struct rc_pid_sta_info spinfo;
+    struct ssv62xx_ht ht;
+};
+struct ssv_rate_ctrl {
+    struct ssv_rc_rate *rc_table;
+    struct ssv_sta_rc_info sta_rc_info[SSV_RC_MAX_STA];
+};
+#define HT_RC_UPDATE_INTERVAL 1000
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.c
new file mode 100644
index 0000000000000..b1f275591632b
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.c
@@ -0,0 +1,259 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#define SHA256_BLOCK_SIZE 64
+#define SHA256_DIGEST_SIZE 32
+typedef enum{
+    FALSE = 0,
+    TRUE = 1
+}CsrBool;
+#define BYTES_PER_WORD 4
+#define BYTE_LEN 8
+#define WORD_LEN (BYTE_LEN * BYTES_PER_WORD)
+#define TEXT_LEN 128
+#define MK_LEN (TEXT_LEN / WORD_LEN)
+#define RK_LEN 32
+#define TEXT_BYTES (TEXT_LEN / BYTE_LEN)
+#define CK_INCREMENT 7
+#define KEY_MULTIPLIER 0x80040100
+#define TEXT_MULTIPLIER 0xa0202080
+#define FK_PARAMETER_0 0xa3b1bac6
+#define FK_PARAMETER_1 0x56aa3350
+#define FK_PARAMETER_2 0x677d9197
+#define FK_PARAMETER_3 0xb27022dc
+static const u8 S_Box[] = {
+       0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,
+       0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99,
+       0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62,
+       0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6,
+       0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8,
+       0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35,
+       0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87,
+       0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e,
+       0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1,
+       0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3,
+       0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f,
+       0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51,
+       0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8,
+       0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0,
+       0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84,
+       0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48 };
+static const u32 FK_Parameter[] = { FK_PARAMETER_0, FK_PARAMETER_1, FK_PARAMETER_2, FK_PARAMETER_3 };
+static const u8 S_XState[] = {
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
+          0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
+};
+static const u32 g_NextInputTable[RK_LEN] =
+{
+    0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
+    0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
+    0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
+    0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
+    0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
+    0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
+    0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
+    0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279
+};
+static const u32 CipherDataIdx[MK_LEN][MK_LEN] =
+{
+    {3, 2, 1, 0},
+    {0, 3, 2, 1},
+    {1, 0 ,3, 2},
+    {2, 1, 0, 3}
+};
+#define PARITY_MACRO(Value) (S_XState[(Value) >> 24] ^ S_XState[((Value) >> 16) & 0xFF] ^ S_XState[((Value) >> 8) & 0xFF] ^ S_XState[(Value) & 0xFF])
+#define XOR_MACRO(A,B) ((A) ^ (B))
+#define L_TRANSFORM_MACRO(Word,Key) MultiplyCircular(Word, Key ? KEY_MULTIPLIER : TEXT_MULTIPLIER )
+static u32 T_Transform(u32 Word)
+{
+    u32 j;
+    u32 New_Word;
+ int offset = 0;
+    New_Word = 0;
+    for (j = 0; j < MK_LEN; j++)
+    {
+        New_Word = (New_Word << BYTE_LEN);
+  offset = ((u32)(Word >> (WORD_LEN - BYTE_LEN))) & ((u32)((1 << BYTE_LEN) - 1));
+  New_Word = New_Word | (u32)S_Box[offset];
+  Word = (Word << BYTE_LEN);
+    }
+    return (New_Word);
+}
+static u32 MultiplyCircular(u32 Word, u32 Basis)
+{
+    u32 New_Word;
+    u32 i;
+    New_Word = 0;
+    for (i = 0; i < WORD_LEN; i++)
+    {
+  New_Word = (New_Word << 1) | PARITY_MACRO(Word & Basis);
+        Basis = (Basis >> 1) | ((Basis & 1) << (WORD_LEN - 1));
+    }
+    return (New_Word);
+}
+static u32 Iterate(CsrBool Key, u32 Next_Input, u32 *Cipher_Text, u32 curIdx)
+{
+    u32 New_State;
+    New_State = Next_Input;
+    New_State = XOR_MACRO(New_State, Cipher_Text[CipherDataIdx[curIdx][0]]);
+    New_State = XOR_MACRO(New_State, Cipher_Text[CipherDataIdx[curIdx][1]]);
+    New_State = XOR_MACRO(New_State, Cipher_Text[CipherDataIdx[curIdx][2]]);
+    New_State = L_TRANSFORM_MACRO(T_Transform(New_State), Key);
+    New_State = XOR_MACRO(New_State, Cipher_Text[CipherDataIdx[curIdx][3]]);
+    Cipher_Text[curIdx] = New_State;
+    return (New_State);
+}
+static void CalculateEnKey(u8 *Key, u32 *Key_Store)
+{
+    u32 Cipher_Text[MK_LEN];
+    u32 Next, i, j, Next_Input;
+    for (j = 0; j < MK_LEN; j++)
+    {
+        Next = 0;
+        for (i = 0; i < BYTES_PER_WORD; i++)
+        {
+      Next = (Next << BYTE_LEN);
+      Next = Next | Key[(j <<2) + i];
+        }
+        Cipher_Text[j] = XOR_MACRO(Next, FK_Parameter[j]);
+    }
+    for (i = 0; i < RK_LEN; i++)
+    {
+        Next_Input = g_NextInputTable[i];
+        Key_Store[i] = Iterate(TRUE, Next_Input, Cipher_Text, i & (MK_LEN - 1));
+    }
+}
+static void SMS4_Run(u32 *Key_Store, u8 *PlainText, u8 *CipherText)
+{
+    u32 i, j;
+    u32 Next;
+    u32 Next_Input;
+    u32 Plain_Text[MK_LEN];
+    for (j = 0; j < MK_LEN; j++)
+    {
+        Next = 0;
+        for (i = 0; i < BYTES_PER_WORD; i++)
+        {
+   Next = (Next << BYTE_LEN);
+            Next = Next | PlainText[(j<<2) + i];
+        }
+        Plain_Text[j] = Next;
+    }
+    for (i = 0; i < RK_LEN; i++)
+    {
+        Next_Input = Key_Store[i];
+        (void)Iterate(FALSE, Next_Input, Plain_Text, i & (MK_LEN - 1));
+    }
+    for (j = 0; j < MK_LEN; j++)
+    {
+        Next = Plain_Text[(MK_LEN - 1) - j];
+        for (i = 0; i < BYTES_PER_WORD; i++)
+        {
+            CipherText[(j << 2) + i] = (u8)((Next >> (WORD_LEN - BYTE_LEN)) & ((1 << BYTE_LEN) - 1));
+   Next = (Next << BYTE_LEN);
+        }
+    }
+}
+void WapiCryptoSms4(u8 *iv, u8 *key, u8 *input, u32 length, u8 *output)
+{
+    u32 i;
+    u8 sms4Output[TEXT_BYTES];
+ u8 tmp_data[TEXT_BYTES];
+    u32 Key_Store[RK_LEN];
+    u32 j = 0;
+    u8 * p[2];
+    p[0] = sms4Output;
+    p[1] = tmp_data;
+    memcpy(tmp_data, iv, TEXT_BYTES);
+    CalculateEnKey(key, Key_Store);
+    for (i = 0; i < length; i++)
+    {
+        if ((i & (TEXT_BYTES - 1)) == 0)
+        {
+            SMS4_Run(Key_Store, p[1-j], p[j]);
+            j = 1 - j;
+        }
+        output[i] = input[i] ^ p[1-j][i & (TEXT_BYTES - 1)];
+    }
+}
+void WapiCryptoSms4Mic(u8 *iv, u8 *key, u8 *header, u32 headerLength,
+                      const u8 *input, u32 dataLength, u8 *mic)
+{
+    u32 i, j = 0, totalLength;
+    u8 sms4Output[TEXT_BYTES], sms4Input[TEXT_BYTES];
+ u32 tmp_headerLength = 0;
+ u32 tmp_dataLength = 0;
+ u32 header_cnt = 0 ;
+ u32 header0_cnt = 0;
+ u32 data_cnt = 0;
+ u32 data0_cnt = 0;
+    u32 Key_Store[RK_LEN];
+    memcpy(sms4Input, iv, TEXT_BYTES);
+    totalLength = headerLength + dataLength;
+ tmp_headerLength = ((headerLength & (TEXT_BYTES-1)) == 0) ? 0 : (TEXT_BYTES - (headerLength & (TEXT_BYTES-1)));
+ tmp_dataLength = ((dataLength & (TEXT_BYTES-1)) == 0) ? 0 : (TEXT_BYTES - (dataLength & (TEXT_BYTES-1)));
+    totalLength += tmp_headerLength;
+ totalLength += tmp_dataLength;
+    CalculateEnKey(key, Key_Store);
+    for (i = 0; i < totalLength; i++)
+    {
+        if ((i & (TEXT_BYTES-1)) == 0)
+        {
+            SMS4_Run(Key_Store, sms4Input, sms4Output);
+        }
+        if ((dataLength == 0) && (headerLength == 0))
+        {
+            sms4Input[i & (TEXT_BYTES-1)] = 0 ^ sms4Output[i & (TEXT_BYTES-1)];
+   data0_cnt++;
+        }
+        else if ( (headerLength == 0) && (tmp_headerLength == 0) )
+        {
+   sms4Input[i & (TEXT_BYTES-1)] = input[j] ^ sms4Output[i & (TEXT_BYTES-1)];
+   j++;
+            dataLength--;
+   data_cnt++;
+        }
+  else if( headerLength == 0 )
+  {
+   sms4Input[i & (TEXT_BYTES-1)] = 0 ^ sms4Output[i & (TEXT_BYTES-1)];
+   tmp_headerLength--;
+   header0_cnt++;
+  }
+        else
+        {
+            sms4Input[i & (TEXT_BYTES-1)] = header[i] ^ sms4Output[i & (TEXT_BYTES-1)];
+            headerLength--;
+   header_cnt++;
+        }
+    }
+    SMS4_Run(Key_Store, sms4Input, mic);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.h
new file mode 100644
index 0000000000000..09c92e9bee5a3
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/wapi_sms4.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef WAPI_SMS4_H
+#define WAPI_SMS4_H 
+void WapiCryptoSms4(u8 *iv, u8 *key, u8 *input, u16 length, u8 *output);
+void WapiCryptoSms4Mic(u8 *iv, u8 *Key, u8 *header, u16 headerLength,
+                             const u8 *input, u16 dataLength, u8 *output);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051-generic-wlan.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051-generic-wlan.c
new file mode 100644
index 0000000000000..00aa0fcffb170
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051-generic-wlan.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/delay.h>
+#include <linux/regulator/consumer.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#include <linux/printk.h>
+#include <linux/err.h>
+#else
+#include <config/printk.h>
+#endif
+extern int rockchip_wifi_power(int on);
+extern int rockchip_wifi_set_carddetect(int val);
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+extern char wifi_chip_type_string[];
+#endif
+#define GPIO_REG_WRITEL(val, reg)                                              \
+	do {                                                                   \
+		__raw_writel(val, CTL_PIN_BASE + (reg));                       \
+	} while (0)
+static int g_wifidev_registered = 0;
+extern int ssvdevice_init(void);
+extern void ssvdevice_exit(void);
+extern int ssv6xxx_get_dev_status(void);
+
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+extern int aes_init(void);
+extern void aes_fini(void);
+extern int sha1_mod_init(void);
+extern void sha1_mod_fini(void);
+#endif
+
+void ssv_wifi_power(void)
+{
+	/*
+	rockchip_wifi_set_carddetect(0);
+	msleep(150);
+	rockchip_wifi_power(0);
+	msleep(150);
+	rockchip_wifi_power(1);
+	msleep(150);
+	rockchip_wifi_set_carddetect(1);*/
+	msleep(150);
+}
+
+int initWlan(void)
+{
+	int ret = 0;
+	int time = 5;
+	ssv_wifi_power();
+	msleep(120);
+	g_wifidev_registered = 1;
+	ret = ssvdevice_init();
+	while(time-- > 0){
+		msleep(500);
+		if(ssv6xxx_get_dev_status() == 1)
+			break;
+		printk("%s : Retry to carddetect\n",__func__);
+		ssv_wifi_power();
+	}
+#ifdef ROCKCHIP_WIFI_AUTO_SUPPORT
+    if (!ret) {
+        strcpy(wifi_chip_type_string, "ssv6051");
+        printk(KERN_INFO "wifi_chip_type_string : %s\n" ,wifi_chip_type_string);
+    }
+#endif
+	return ret;
+}
+void exitWlan(void)
+{
+    if (g_wifidev_registered)
+    {
+        ssvdevice_exit();
+        msleep(50);
+#ifndef ROCKCHIP_WIFI_AUTO_SUPPORT
+        rockchip_wifi_set_carddetect(0);
+#endif
+        rockchip_wifi_power(0);
+        g_wifidev_registered = 0;
+    }
+    return;
+}
+static __init int generic_wifi_init_module(void)
+{
+	printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+	sha1_mod_init();
+	aes_init();
+#endif
+	return initWlan();
+}
+static __exit void generic_wifi_exit_module(void)
+{
+	printk("%s\n", __func__);
+#ifdef CONFIG_SSV_SUPPORT_AES_ASM
+	aes_fini();
+	sha1_mod_fini();
+#endif
+    msleep(100);
+	exitWlan();
+}
+EXPORT_SYMBOL(generic_wifi_init_module);
+EXPORT_SYMBOL(generic_wifi_exit_module);
+module_init(generic_wifi_init_module);
+module_exit(generic_wifi_exit_module);
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051.cfg b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051.cfg
new file mode 100644
index 0000000000000..3f3dfed85bf77
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssv6051.cfg
@@ -0,0 +1,22 @@
+############################################################
+# RK3128
+############################################################
+ccflags-y += -DCONFIG_SSV_SUPPORT_ANDROID
+#ccflags-y += -DCONFIG_SSV_SUPPORT_AES_ASM
+ccflags-y += -DCONFIG_FW_ALIGNMENT_CHECK
+ccflags-y += -DCONFIG_PLATFORM_SDIO_OUTPUT_TIMING=3
+ccflags-y += -DCONFIG_PLATFORM_SDIO_BLOCK_SIZE=128
+ccflags-y += -DMULTI_THREAD_ENCRYPT
+ccflags-y += -DKTHREAD_BIND
+#ccflags-y += -DROCKCHIP_WIFI_AUTO_SUPPORT
+ccflags-y += -DCONFIG_SSV_RSSI
+ccflags-y += -DCONFIG_SSV_VENDOR_EXT_SUPPORT
+
+############################################################
+# Compiler path
+############################################################
+SSV_CROSS = $(ANDROID_BUILD_TOP)/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
+SSV_KERNEL_PATH = $(ANDROID_BUILD_TOP)/kernel
+SSV_ARCH = arm
+KMODDESTDIR = $(MODDESTDIR)
+
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/Makefile
new file mode 100644
index 0000000000000..e11de471f14e2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/Makefile
@@ -0,0 +1,18 @@
+ifeq ($(KBUILD_TOP),)
+    ifneq ($(KBUILD_EXTMOD),)
+    KBUILD_DIR := $(KBUILD_EXTMOD)
+    else
+    KBUILD_DIR := $(PWD)
+    endif
+KBUILD_TOP := $(KBUILD_DIR)/../
+endif
+
+include $(KBUILD_TOP)/config.mak
+
+
+KMODULE_NAME=ssvdevicetype
+KERN_SRCS := ssvdevice.c
+KERN_SRCS += ssv_cmd.c
+
+
+include $(KBUILD_TOP)/rules.mak
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/backup b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/backup
new file mode 100644
index 0000000000000..bd0a4f7ca5abb
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/backup
@@ -0,0 +1,18 @@
+obj-m     += ssvdevicetype.o
+
+ssvdevicetype-objs += ssvdevice.o
+
+ifndef ($(KBUILD_EXTMOD),)
+KDIR=/lib/modules/`uname -r`/build
+
+_all:
+	$(MAKE) -C $(KDIR) M=$(PWD) modules 2>&1 | tee make.log
+	
+clean:
+	$(MAKE) -C $(KDIR) M=$(PWD) clean
+	rm make.log
+	
+install:
+	$(MAKE) INSTALL_MOD_DIR=kernel/drivers/net/wireless/ssv6200 -C $(KDIR) M=$(PWD) modules_install
+
+endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
new file mode 100644
index 0000000000000..033e7a09b40e4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
@@ -0,0 +1,1727 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+#include <linux/export.h>
+#else
+#include <linux/module.h>
+#endif
+#include <linux/platform_device.h>
+#include <linux/string.h>
+#include <ssv_conf_parser.h>
+#include <ssv6200_reg.h>
+#include <ssv6200.h>
+#include <hci/hctrl.h>
+#include <smac/dev.h>
+#include "ssv_cmd.h"
+#include <ssv_version.h>
+#ifndef CONFIG_SSV_CABRIO_A
+#include <ssv6200_configuration.h>
+#endif
+#define SSV_CMD_PRINTF() 
+struct ssv6xxx_dev_table {
+    u32 address;
+    u32 val;
+};
+struct ssv6xxx_debug {
+    struct device *dev;
+    struct platform_device *pdev;
+    struct ssv6xxx_hwif_ops *ifops;
+};
+static struct ssv6xxx_debug *ssv6xxx_debug_ifops;
+static char sg_cmd_buffer[CLI_BUFFER_SIZE+1];
+static char *sg_argv[CLI_ARG_SIZE];
+static u32 sg_argc;
+extern char *ssv6xxx_result_buf;
+#if defined (CONFIG_ARM64) || defined (__x86_64__)
+u64 ssv6xxx_ifdebug_info[3] = { 0, 0, 0 };
+#else
+u32 ssv6xxx_ifdebug_info[3] = { 0, 0, 0 };
+#endif
+EXPORT_SYMBOL(ssv6xxx_ifdebug_info);
+struct sk_buff *ssvdevice_skb_alloc(s32 len)
+{
+    struct sk_buff *skb;
+    skb = __dev_alloc_skb(len + SSV6200_ALLOC_RSVD , GFP_KERNEL);
+    if (skb != NULL) {
+        skb_put(skb,0x20);
+        skb_pull(skb,0x20);
+    }
+    return skb;
+}
+void ssvdevice_skb_free(struct sk_buff *skb)
+{
+    dev_kfree_skb_any(skb);
+}
+static int ssv_cmd_help(int argc, char *argv[])
+{
+    extern struct ssv_cmd_table cmd_table[];
+    struct ssv_cmd_table *sc_tbl;
+    char tmpbf[161];
+    int total_cmd=0;
+    {
+        sprintf(ssv6xxx_result_buf, "Usage:\n");
+        for( sc_tbl=&cmd_table[3]; sc_tbl->cmd; sc_tbl ++ ) {
+            sprintf(tmpbf, "%-20s\t\t%s\n", sc_tbl->cmd, sc_tbl->usage);
+            strcat(ssv6xxx_result_buf, tmpbf);
+            total_cmd ++;
+        }
+        sprintf(tmpbf, "Total CMDs: %d\n\nType cli help [CMD] for more detail command.\n\n", total_cmd);
+        strcat(ssv6xxx_result_buf, tmpbf);
+    }
+    return 0;
+}
+static int ssv_cmd_reg(int argc, char *argv[])
+{
+    u32 addr, value, count;
+    char tmpbf[64], *endp;
+    int s;
+    if (argc == 4 && strcmp(argv[1], "w")==0) {
+        addr = simple_strtoul(argv[2], &endp, 16);
+        value = simple_strtoul(argv[3], &endp, 16);
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, addr, value));
+        sprintf(ssv6xxx_result_buf, " => write [0x%08x]: 0x%08x\n",
+            addr, value);
+        return 0;
+    }
+    else if ((argc==4||argc==3) && strcmp(argv[1], "r")==0) {
+        count = (argc==3)? 1: simple_strtoul(argv[3], &endp, 10);
+        addr = simple_strtoul(argv[2], &endp, 16);
+        sprintf(ssv6xxx_result_buf, "ADDRESS: 0x%08x\n", addr);
+        for(s=0; s<count; s++, addr+=4) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+            sprintf(tmpbf, "%08x ", value);
+            strcat(ssv6xxx_result_buf, tmpbf);
+            if (((s+1)&0x07) == 0)
+                strcat(ssv6xxx_result_buf, "\n");
+        }
+        strcat(ssv6xxx_result_buf, "\n");
+        return 0;
+    }
+    else
+    {
+        sprintf(tmpbf, "reg [r|w] [address] [value|word-count]\n\n");
+        strcat(ssv6xxx_result_buf, tmpbf);
+        return 0;
+    }
+    return -1;
+}
+struct ssv6xxx_cfg ssv_cfg;
+EXPORT_SYMBOL(ssv_cfg);
+#if 0
+static int __string2s32(u8 *val_str, void *val)
+{
+    char *endp;
+    int base=10;
+    if (val_str[0]=='0' && ((val_str[1]=='x')||(val_str[1]=='X')))
+        base = 16;
+    *(int *)val = simple_strtoul(val_str, &endp, base);
+    return 0;
+}
+#endif
+#if 0
+static int __string2bool(u8 *u8str, void *val, u32 arg)
+{
+    char *endp;
+ *(u8 *)val = !!simple_strtoul(u8str, &endp, 10);
+    return 0;
+}
+#endif
+static int __string2u32(u8 *u8str, void *val, u32 arg)
+{
+    char *endp;
+    int base=10;
+    if (u8str[0]=='0' && ((u8str[1]=='x')||(u8str[1]=='X')))
+        base = 16;
+    *(u32 *)val = simple_strtoul(u8str, &endp, base);
+    return 0;
+}
+static int __string2flag32(u8 *flag_str, void *flag, u32 arg)
+{
+    u32 *val=(u32 *)flag;
+    if (arg >= (sizeof(u32)<<3))
+        return -1;
+    if (strcmp(flag_str, "on")==0) {
+        *val |= (1<<arg);
+        return 0;
+    }
+    if (strcmp(flag_str, "off")==0) {
+        *val &= ~(1<<arg);
+        return 0;
+    }
+    return -1;
+}
+static int __string2mac(u8 *mac_str, void *val, u32 arg)
+{
+    int s, macaddr[6];
+    u8 *mac=(u8 *)val;
+    s = sscanf(mac_str, "%02x:%02x:%02x:%02x:%02x:%02x",
+        &macaddr[0], &macaddr[1], &macaddr[2],
+        &macaddr[3], &macaddr[4], &macaddr[5]);
+    if (s != 6)
+        return -1;
+    mac[0] = (u8)macaddr[0], mac[1] = (u8)macaddr[1];
+    mac[2] = (u8)macaddr[2], mac[3] = (u8)macaddr[3];
+    mac[4] = (u8)macaddr[4], mac[5] = (u8)macaddr[5];
+    return 0;
+}
+static int __string2str(u8 *path, void *val, u32 arg)
+{
+    u8 *temp=(u8 *)val;
+    sprintf(temp,"%s",path);
+    return 0;
+}
+static int __string2configuration(u8 *mac_str, void *val, u32 arg)
+{
+    unsigned int address,value;
+    int i;
+    i = sscanf(mac_str, "%08x:%08x", &address, &value);
+    if (i != 2)
+        return -1;
+    for(i=0; i<EXTERNEL_CONFIG_SUPPORT; i++)
+    {
+        if(ssv_cfg.configuration[i][0] == 0x0)
+        {
+            ssv_cfg.configuration[i][0] = address;
+            ssv_cfg.configuration[i][1] = value;
+            return 0;
+        }
+    }
+    return 0;
+}
+struct ssv6xxx_cfg_cmd_table cfg_cmds[] = {
+    { "hw_mac", (void *)&ssv_cfg.maddr[0][0], 0, __string2mac },
+    { "hw_mac_2", (void *)&ssv_cfg.maddr[1][0], 0, __string2mac },
+    { "def_chan", (void *)&ssv_cfg.def_chan, 0, __string2u32 },
+    { "hw_cap_ht", (void *)&ssv_cfg.hw_caps, 0, __string2flag32 },
+    { "hw_cap_gf", (void *)&ssv_cfg.hw_caps, 1, __string2flag32 },
+    { "hw_cap_2ghz", (void *)&ssv_cfg.hw_caps, 2, __string2flag32 },
+    { "hw_cap_5ghz", (void *)&ssv_cfg.hw_caps, 3, __string2flag32 },
+    { "hw_cap_security", (void *)&ssv_cfg.hw_caps, 4, __string2flag32 },
+    { "hw_cap_sgi_20", (void *)&ssv_cfg.hw_caps, 5, __string2flag32 },
+    { "hw_cap_sgi_40", (void *)&ssv_cfg.hw_caps, 6, __string2flag32 },
+    { "hw_cap_ap", (void *)&ssv_cfg.hw_caps, 7, __string2flag32 },
+    { "hw_cap_p2p", (void *)&ssv_cfg.hw_caps, 8, __string2flag32 },
+    { "hw_cap_ampdu_rx", (void *)&ssv_cfg.hw_caps, 9, __string2flag32 },
+    { "hw_cap_ampdu_tx", (void *)&ssv_cfg.hw_caps, 10, __string2flag32 },
+    { "hw_cap_tdls", (void *)&ssv_cfg.hw_caps, 11, __string2flag32 },
+    { "use_wpa2_only", (void *)&ssv_cfg.use_wpa2_only, 0, __string2u32 },
+    { "wifi_tx_gain_level_gn",(void *)&ssv_cfg.wifi_tx_gain_level_gn, 0, __string2u32 },
+    { "wifi_tx_gain_level_b", (void *)&ssv_cfg.wifi_tx_gain_level_b, 0, __string2u32 },
+    { "rssi_ctl", (void *)&ssv_cfg.rssi_ctl, 0, __string2u32 },
+    { "xtal_clock", (void *)&ssv_cfg.crystal_type, 0, __string2u32 },
+    { "volt_regulator", (void *)&ssv_cfg.volt_regulator, 0, __string2u32 },
+    { "force_chip_identity", (void *)&ssv_cfg.force_chip_identity, 0, __string2u32 },
+    { "firmware_path", (void *)&ssv_cfg.firmware_path[0], 0, __string2str },
+    { "flash_bin_path",(void *)&ssv_cfg.flash_bin_path[0],0,__string2str },
+    { "mac_address_path", (void *)&ssv_cfg.mac_address_path[0], 0, __string2str },
+    { "mac_output_path", (void *)&ssv_cfg.mac_output_path[0], 0, __string2str },
+    { "ignore_efuse_mac", (void *)&ssv_cfg.ignore_efuse_mac, 0, __string2u32 },
+    { "mac_address_mode", (void *)&ssv_cfg.mac_address_mode, 0, __string2u32 },
+    { "sr_bhvr", (void *)&ssv_cfg.sr_bhvr, 0, __string2u32 },
+    { "register", NULL, 0, __string2configuration },
+    { NULL, NULL, 0, NULL },
+};
+EXPORT_SYMBOL(cfg_cmds);
+static int ssv_cmd_cfg(int argc, char *argv[])
+{
+    char temp_buf[64];
+    int s;
+    if (argc==2 && strcmp(argv[1], "reset")==0) {
+        memset(&ssv_cfg, 0, sizeof(ssv_cfg));
+        return 0;
+    }
+    else if (argc==2 && strcmp(argv[1], "show")==0) {
+        strcpy(ssv6xxx_result_buf, ">> ssv6xxx config:\n");
+        sprintf(temp_buf, "    hw_caps = 0x%08x\n", ssv_cfg.hw_caps);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    def_chan = %d\n", ssv_cfg.def_chan);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    wifi_tx_gain_level_gn = %d\n", ssv_cfg.wifi_tx_gain_level_gn);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    wifi_tx_gain_level_b = %d\n", ssv_cfg.wifi_tx_gain_level_b);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    rssi_ctl = %d\n", ssv_cfg.rssi_ctl);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    sr_bhvr = %d\n", ssv_cfg.sr_bhvr);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        sprintf(temp_buf, "    sta-mac = %02x:%02x:%02x:%02x:%02x:%02x",
+            ssv_cfg.maddr[0][0], ssv_cfg.maddr[0][1], ssv_cfg.maddr[0][2],
+            ssv_cfg.maddr[0][3], ssv_cfg.maddr[0][4], ssv_cfg.maddr[0][5]);
+        strcat(ssv6xxx_result_buf, temp_buf);
+        strcat(ssv6xxx_result_buf, "\n");
+        return 0;
+    }
+    if (argc != 4)
+        return -1;
+    for(s=0; cfg_cmds[s].cfg_cmd!=NULL; s++) {
+        if (strcmp(cfg_cmds[s].cfg_cmd, argv[1])==0) {
+            cfg_cmds[s].translate_func(argv[3],
+                cfg_cmds[s].var, cfg_cmds[s].arg);
+            strcpy(ssv6xxx_result_buf, "");
+            return 0;
+        }
+    }
+    return -1;
+}
+void *ssv_dbg_phy_table = NULL;
+EXPORT_SYMBOL(ssv_dbg_phy_table);
+u32 ssv_dbg_phy_len = 0;
+EXPORT_SYMBOL(ssv_dbg_phy_len);
+void *ssv_dbg_rf_table = NULL;
+EXPORT_SYMBOL(ssv_dbg_rf_table);
+u32 ssv_dbg_rf_len = 0;
+EXPORT_SYMBOL(ssv_dbg_rf_len);
+struct ssv_softc *ssv_dbg_sc = NULL;
+EXPORT_SYMBOL(ssv_dbg_sc);
+struct ssv6xxx_hci_ctrl *ssv_dbg_ctrl_hci = NULL;
+EXPORT_SYMBOL(ssv_dbg_ctrl_hci);
+struct Dump_Sta_Info {
+    char *dump_buf;
+    int sta_idx;
+};
+static void _dump_sta_info (struct ssv_softc *sc,
+                            struct ssv_vif_info *vif_info,
+                            struct ssv_sta_info *sta_info,
+                            void *param)
+{
+    char tmpbf[128];
+    struct Dump_Sta_Info *dump_sta_info = (struct Dump_Sta_Info *)param;
+    struct ssv_sta_priv_data *priv_sta = (struct ssv_sta_priv_data *)sta_info->sta->drv_priv;
+    if ((sta_info->s_flags & STA_FLAG_VALID) == 0)
+        sprintf(tmpbf,
+                "        Station %d: %d is not valid\n",
+                dump_sta_info->sta_idx, priv_sta->sta_idx);
+    else
+        sprintf(tmpbf,
+                "        Station %d: %d\n"
+                "             Address: %02X:%02X:%02X:%02X:%02X:%02X\n"
+                "             WISD: %d\n"
+                "             AID: %d\n"
+                "             Sleep: %d\n",
+                dump_sta_info->sta_idx, priv_sta->sta_idx,
+                sta_info->sta->addr[0], sta_info->sta->addr[1], sta_info->sta->addr[2],
+                sta_info->sta->addr[3], sta_info->sta->addr[4], sta_info->sta->addr[5],
+                sta_info->hw_wsid, sta_info->aid, sta_info->sleeping);
+    dump_sta_info->sta_idx++;
+    strcat(dump_sta_info->dump_buf, tmpbf);
+}
+void ssv6xxx_dump_sta_info (struct ssv_softc *sc, char *target_buf)
+{
+    int j;
+    char tmpbf[128];
+    struct Dump_Sta_Info dump_sta_info = {target_buf, 0};
+    sprintf(tmpbf, "  >>>> bcast queue len[%d]\n", sc->bcast_txq.cur_qsize);
+    strcat(target_buf, tmpbf);
+    for (j=0; j<SSV6200_MAX_VIF; j++) {
+        struct ieee80211_vif *vif = sc->vif_info[j].vif;
+        struct ssv_vif_priv_data *priv_vif;
+        struct ssv_sta_priv_data *sta_priv_iter;
+        if (vif == NULL)
+        {
+            sprintf(tmpbf, "    VIF: %d is not used.\n", j);
+            strcat(target_buf, tmpbf);
+            continue;
+        }
+        sprintf(tmpbf,
+                "    VIF: %d - [%02X:%02X:%02X:%02X:%02X:%02X] type[%d] p2p[%d]\n", j,
+                vif->addr[0], vif->addr[1], vif->addr[2],
+                vif->addr[3], vif->addr[4], vif->addr[5], vif->type, vif->p2p);
+        strcat(target_buf, tmpbf);
+        priv_vif = (struct ssv_vif_priv_data *)(vif->drv_priv);
+        list_for_each_entry(sta_priv_iter, &priv_vif->sta_list, list)
+        {
+            if ((sta_priv_iter->sta_info->s_flags & STA_FLAG_VALID) == 0)
+            {
+                sprintf(tmpbf, "    VIF: %d  is not valid.\n", j);
+                strcat(target_buf, tmpbf);
+                continue;
+            }
+            _dump_sta_info(sc, &sc->vif_info[priv_vif->vif_idx],
+                           sta_priv_iter->sta_info, &dump_sta_info);
+        }
+    }
+#if 0
+    sta set channel 7
+    if (argc >= 2 && strcmp(argv[1], "set")==0) {
+        if (argc==4 && strcmp(argv[2], "channel")==0) {
+            char *endp;
+            int ch=simple_strtoul(argv[3], &endp, 10);
+            if (ch>=0 && ch<=13) {
+            }
+            return -1;
+        }
+    }
+#endif
+}
+static int ssv_cmd_sta(int argc, char *argv[])
+{
+    if (argc >= 2 && strcmp(argv[1], "show")==0)
+        ssv6xxx_dump_sta_info(ssv_dbg_sc, ssv6xxx_result_buf);
+    else
+        strcat(ssv6xxx_result_buf, "sta show\n\n");
+    return 0;
+}
+static int ssv_cmd_dump(int argc, char *argv[])
+{
+    u32 addr, regval;
+    char tmpbf[64];
+    int s;
+ if(!ssv6xxx_result_buf)
+ {
+  strcpy(ssv6xxx_result_buf, "ssv6xxx_result_buf = NULL!!\n");
+  return -1;
+ }
+    if (argc != 2)
+    {
+        sprintf(tmpbf, "dump [wsid|decision|phy-info|phy-reg|rf-reg]\n");
+        strcat(ssv6xxx_result_buf, tmpbf);
+        return 0;
+    }
+    if (strcmp(argv[1], "wsid") == 0) {
+        const u32 reg_wsid[]={ ADR_WSID0, ADR_WSID1 };
+     const u32 reg_wsid_tid0[]={ ADR_WSID0_TID0_RX_SEQ, ADR_WSID1_TID0_RX_SEQ };
+     const u32 reg_wsid_tid7[]={ ADR_WSID0_TID7_RX_SEQ, ADR_WSID1_TID7_RX_SEQ };
+        const u8 *op_mode_str[]={"STA", "AP", "AD-HOC", "WDS"};
+        const u8 *ht_mode_str[]={"Non-HT", "HT-MF", "HT-GF", "RSVD"};
+        for(s=0; s<SSV_NUM_HW_STA; s++) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, reg_wsid[s], &regval));
+            sprintf(tmpbf, "==>WSID[%d]\n\tvalid[%d] qos[%d] op_mode[%s] ht_mode[%s]\n",
+                s, regval&0x1, (regval>>1)&0x1, op_mode_str[((regval>>2)&3)], ht_mode_str[((regval>>4)&3)]);
+            strcat(ssv6xxx_result_buf, tmpbf);
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, reg_wsid[s]+4, &regval));
+            sprintf(tmpbf, "\tMAC[%02x:%02x:%02x:%02x:",
+                   (regval&0xff), ((regval>>8)&0xff), ((regval>>16)&0xff), ((regval>>24)&0xff));
+            strcat(ssv6xxx_result_buf, tmpbf);
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, reg_wsid[s]+8, &regval));
+            sprintf(tmpbf, "%02x:%02x]\n",
+                   (regval&0xff), ((regval>>8)&0xff));
+            strcat(ssv6xxx_result_buf, tmpbf);
+            for(addr=reg_wsid_tid0[s]; addr<=reg_wsid_tid7[s]; addr+=4){
+                if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &regval));
+                sprintf(tmpbf, "\trx_seq%d[%d]\n", ((addr-reg_wsid_tid0[s])>>2), ((regval)&0xffff));
+                strcat(ssv6xxx_result_buf, tmpbf);
+            }
+        }
+        return 0;
+    }
+    if (strcmp(argv[1], "decision") ==0 ) {
+        strcpy(ssv6xxx_result_buf, ">> Decision Table:\n");
+        for(s=0,addr=ADR_MRX_FLT_TB0; s<16; s++, addr+=4) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &regval));
+            sprintf(tmpbf, "   [%d]: ADDR[0x%08x] = 0x%08x\n",
+                s, addr, regval);
+            strcat(ssv6xxx_result_buf, tmpbf);
+        }
+        strcat(ssv6xxx_result_buf, "\n\n>> Decision Mask:\n");
+        for(s=0,addr=ADR_MRX_FLT_EN0; s<9; s++, addr+=4) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &regval));
+            sprintf(tmpbf, "   [%d]: ADDR[0x%08x] = 0x%08x\n",
+                s, addr, regval);
+            strcat(ssv6xxx_result_buf, tmpbf);
+        }
+        strcat(ssv6xxx_result_buf, "\n\n");
+        return 0;
+    }
+    if (strcmp(argv[1], "phy-info") == 0) {
+        return 0;
+    }
+    if (strcmp(argv[1], "phy-reg") == 0) {
+        struct ssv6xxx_dev_table *raw;
+        raw = (struct ssv6xxx_dev_table *)ssv_dbg_phy_table;
+        strcpy(ssv6xxx_result_buf, ">> PHY Register Table:\n");
+        for(s=0; s<ssv_dbg_phy_len; s++, raw++) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, raw->address, &regval));
+            sprintf(tmpbf, "   ADDR[0x%08x] = 0x%08x\n",
+                raw->address, regval);
+            strcat(ssv6xxx_result_buf, tmpbf);
+        }
+        strcat(ssv6xxx_result_buf, "\n\n");
+        return 0;
+    }
+    if (strcmp(argv[1], "rf-reg") == 0) {
+        struct ssv6xxx_dev_table *raw;
+        raw = (struct ssv6xxx_dev_table *)ssv_dbg_rf_table;
+        strcpy(ssv6xxx_result_buf, ">> RF Register Table:\n");
+        for(s=0; s<ssv_dbg_rf_len; s++, raw++) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, raw->address, &regval));
+            sprintf(tmpbf, "   ADDR[0x%08x] = 0x%08x\n",
+                raw->address, regval);
+            strcat(ssv6xxx_result_buf, tmpbf);
+        }
+        strcat(ssv6xxx_result_buf, "\n\n");
+        return 0;
+    }
+    return -1;
+}
+static int ssv_cmd_irq(int argc, char *argv[])
+{
+    char *endp;
+    u32 irq_sts;
+    if (argc>=3 && strcmp(argv[1], "set")==0) {
+        if (strcmp(argv[2], "mask")==0 && argc==4) {
+            irq_sts = simple_strtoul(argv[3], &endp, 16);
+       if(!ssv6xxx_debug_ifops->ifops->irq_setmask) {
+             sprintf(ssv6xxx_result_buf, "The interface doesn't provide irq_setmask operation.\n");
+             return 0;
+       }
+            ssv6xxx_debug_ifops->ifops->irq_setmask(
+                ssv6xxx_debug_ifops->dev, irq_sts);
+            sprintf(ssv6xxx_result_buf, "set sdio irq mask to 0x%08x\n", irq_sts);
+            return 0;
+        }
+        if (strcmp(argv[2], "enable")==0) {
+       if(!ssv6xxx_debug_ifops->ifops->irq_enable) {
+             sprintf(ssv6xxx_result_buf, "The interface doesn't provide irq_enable operation.\n");
+             return 0;
+       }
+            ssv6xxx_debug_ifops->ifops->irq_enable(
+                ssv6xxx_debug_ifops->dev);
+            strcpy(ssv6xxx_result_buf, "enable sdio irq.\n");
+            return 0;
+        }
+        if (strcmp(argv[2], "disable")==0) {
+       if(!ssv6xxx_debug_ifops->ifops->irq_disable) {
+             sprintf(ssv6xxx_result_buf, "The interface doesn't provide irq_disable operation.\n");
+             return 0;
+       }
+            ssv6xxx_debug_ifops->ifops->irq_disable(
+                ssv6xxx_debug_ifops->dev, false);
+            strcpy(ssv6xxx_result_buf, "disable sdio irq.\n");
+            return 0;
+        }
+        return -1;
+    }
+    else if (argc==3 && strcmp(argv[1], "get")==0) {
+        if (strcmp(argv[2], "mask") == 0) {
+       if(!ssv6xxx_debug_ifops->ifops->irq_getmask) {
+             sprintf(ssv6xxx_result_buf, "The interface doesn't provide irq_getmask operation.\n");
+             return 0;
+       }
+            ssv6xxx_debug_ifops->ifops->irq_getmask(
+                ssv6xxx_debug_ifops->dev, &irq_sts);
+            sprintf(ssv6xxx_result_buf, "sdio irq mask: 0x%08x, int_mask=0x%08x\n", irq_sts,
+                ssv_dbg_ctrl_hci->int_mask);
+            return 0;
+        }
+        if (strcmp(argv[2], "status") == 0) {
+       if(!ssv6xxx_debug_ifops->ifops->irq_getstatus) {
+             sprintf(ssv6xxx_result_buf, "The interface doesn't provide irq_getstatus operation.\n");
+             return 0;
+       }
+            ssv6xxx_debug_ifops->ifops->irq_getstatus(
+                ssv6xxx_debug_ifops->dev, &irq_sts);
+            sprintf(ssv6xxx_result_buf, "sdio irq status: 0x%08x\n", irq_sts);
+            return 0;
+        }
+        return -1;
+    }
+    else
+    {
+        sprintf(ssv6xxx_result_buf, "irq [set|get] [mask|enable|disable|status]\n");
+    }
+    return 0;
+}
+static int ssv_cmd_mac(int argc, char *argv[])
+{
+    char temp_str[128], *endp;
+    u32 s;
+    int i;
+    if (argc==3 && !strcmp(argv[1], "wsid") && !strcmp(argv[2], "show")) {
+        for(s=0; s<SSV_NUM_HW_STA; s++) {
+        }
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "rx")){
+        if(!strcmp(argv[2], "enable")){
+            ssv_dbg_sc->dbg_rx_frame = 1;
+        }
+        else{
+            ssv_dbg_sc->dbg_rx_frame = 0;
+        }
+        sprintf(temp_str, "  dbg_rx_frame %d\n", ssv_dbg_sc->dbg_rx_frame);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "tx")){
+        if(!strcmp(argv[2], "enable")){
+            ssv_dbg_sc->dbg_tx_frame = 1;
+        }
+        else{
+            ssv_dbg_sc->dbg_tx_frame = 0;
+        }
+        sprintf(temp_str, "  dbg_tx_frame %d\n", ssv_dbg_sc->dbg_tx_frame);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "rxq") && !strcmp(argv[2], "show")) {
+        sprintf(temp_str, ">> MAC RXQ: (%s)\n    cur_qsize=%d\n",
+            ((ssv_dbg_sc->sc_flags&SC_OP_OFFCHAN)? "off channel": "on channel"),
+            ssv_dbg_sc->rx.rxq_count);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+#if 0
+    if (argc==3 && !strcmp(argv[1], "tx") && !strcmp(argv[2], "status")) {
+        sprintf(temp_str, ">> MAC TX Status:\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "    txq flow control: 0x%x\n", ssv_dbg_sc->tx.flow_ctrl_status);
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "    rxq cur_qsize: %d\n", ssv_dbg_sc->rx.rxq_count);
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+#endif
+    else if (argc==4 && !strcmp(argv[1], "set") && !strcmp(argv[2], "rate")) {
+        if (strcmp(argv[3], "auto")==0) {
+            ssv_dbg_sc->sc_flags &= ~SC_OP_FIXED_RATE;
+            return 0;
+        }
+        i = simple_strtoul(argv[3], &endp, 10);
+        if (i<0 || i>38) {
+            strcpy(ssv6xxx_result_buf, " Invalid rat index !!\n");
+            return -1;
+        }
+        ssv_dbg_sc->max_rate_idx = i;
+        ssv_dbg_sc->sc_flags |= SC_OP_FIXED_RATE;
+        sprintf(temp_str, " Set rate to index %d\n", i);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "get") && !strcmp(argv[2], "rate")) {
+        if (ssv_dbg_sc->sc_flags & SC_OP_FIXED_RATE)
+            sprintf(temp_str, " Current Rate Index: %d\n", ssv_dbg_sc->max_rate_idx);
+        else sprintf(temp_str, "  Current Rate Index: auto\n");
+        strcpy(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else
+    {
+        sprintf(temp_str, "mac [security|wsid|rxq]  [show]\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "mac [set|get] [rate] [auto|idx]\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "mac [rx|tx] [eable|disable]\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    return 0;
+}
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+void print_irq_count(void)
+{
+ char temp_str[512];
+ sprintf(temp_str, "irq debug (%s)\n",ssv_dbg_ctrl_hci->irq_enable?"enable":"disable");
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "total irq (%d)\n",ssv_dbg_ctrl_hci->irq_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "invalid irq (%d)\n",ssv_dbg_ctrl_hci->invalid_irq_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+ sprintf(temp_str, "rx irq (%d)\n",ssv_dbg_ctrl_hci->rx_irq_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+ sprintf(temp_str, "tx irq (%d)\n",ssv_dbg_ctrl_hci->tx_irq_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+ sprintf(temp_str, "real tx count irq (%d)\n",ssv_dbg_ctrl_hci->real_tx_irq_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+ sprintf(temp_str, "tx  packet count (%d)\n",ssv_dbg_ctrl_hci->irq_tx_pkt_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+ sprintf(temp_str, "rx packet (%d)\n",ssv_dbg_ctrl_hci->irq_rx_pkt_count);
+    strcat(ssv6xxx_result_buf, temp_str);
+}
+#endif
+void print_isr_info(void)
+{
+    char temp_str[512];
+    sprintf(temp_str, ">>>> HCI Calculate ISR TIME(%s) unit:us\n",
+        ((ssv_dbg_ctrl_hci->isr_summary_eable)? "enable": "disable"));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_routine_time(%d)\n",
+        jiffies_to_usecs(ssv_dbg_ctrl_hci->isr_routine_time));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_tx_time(%d)\n",
+        jiffies_to_usecs(ssv_dbg_ctrl_hci->isr_tx_time));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_rx_time(%d)\n",
+        jiffies_to_usecs(ssv_dbg_ctrl_hci->isr_rx_time));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_idle_time(%d)\n",
+        jiffies_to_usecs(ssv_dbg_ctrl_hci->isr_idle_time));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_rx_idle_time(%d)\n",
+        jiffies_to_usecs(ssv_dbg_ctrl_hci->isr_rx_idle_time));
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "isr_miss_cnt(%d)\n",
+        ssv_dbg_ctrl_hci->isr_miss_cnt);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "prev_isr_jiffes(%lu)\n",
+        ssv_dbg_ctrl_hci->prev_isr_jiffes);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str, "prev_rx_isr_jiffes(%lu)\n",
+        ssv_dbg_ctrl_hci->prev_rx_isr_jiffes);
+    strcat(ssv6xxx_result_buf, temp_str);
+}
+static int ssv_cmd_hci(int argc, char *argv[])
+{
+    struct ssv_hw_txq *txq;
+    char temp_str[512];
+    int s,ac = 0;
+    if (argc==3 && !strcmp(argv[1], "txq") && !strcmp(argv[2], "show") )
+    {
+        for(s=0; s<WMM_NUM_AC; s++) {
+            if (ssv_dbg_sc != NULL)
+                ac = ssv_dbg_sc->tx.ac_txqid[s];
+            txq = &ssv_dbg_ctrl_hci->hw_txq[s];
+            sprintf(temp_str, ">> txq[%d]", txq->txq_no);
+            if (ssv_dbg_sc != NULL)
+                sprintf(temp_str, "(%s): ",((ssv_dbg_sc->sc_flags&SC_OP_OFFCHAN)? "off channel": "on channel"));
+            sprintf(temp_str, "cur_qsize=%d\n", skb_queue_len(&txq->qhead));
+            strcat(ssv6xxx_result_buf, temp_str);
+            sprintf(temp_str, "            max_qsize=%d, pause=%d, resume_thres=%d",
+                txq->max_qsize, txq->paused, txq->resum_thres);\
+            if (ssv_dbg_sc != NULL)
+                sprintf(temp_str, " flow_control[%d]\n", !!(ssv_dbg_sc->tx.flow_ctrl_status&(1<<ac)));
+            strcat(ssv6xxx_result_buf, temp_str);
+            sprintf(temp_str, "            Total %d frame sent\n", txq->tx_pkt);
+            strcat(ssv6xxx_result_buf, temp_str);
+        }
+        sprintf(temp_str, ">> HCI Debug Counters:\n    read_rs0_info_fail=%d, read_rs1_info_fail=%d\n",
+                    ssv_dbg_ctrl_hci->read_rs0_info_fail, ssv_dbg_ctrl_hci->read_rs1_info_fail);
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "    rx_work_running=%d, isr_running=%d, xmit_running=%d\n",
+                ssv_dbg_ctrl_hci->rx_work_running, ssv_dbg_ctrl_hci->isr_running,
+                ssv_dbg_ctrl_hci->xmit_running);
+        strcat(ssv6xxx_result_buf, temp_str);
+        if (ssv_dbg_sc != NULL)
+            sprintf(temp_str, "    flow_ctrl_status=%08x\n", ssv_dbg_sc->tx.flow_ctrl_status);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "rxq") && !strcmp(argv[2], "show") ) {
+        sprintf(temp_str, ">> HCI RX Queue (%s): cur_qsize=%d\n",
+            ((ssv_dbg_sc->sc_flags&SC_OP_OFFCHAN)? "off channel": "on channel"),
+            ssv_dbg_ctrl_hci->rx_pkt);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "isr_time") && !strcmp(argv[2], "start") ) {
+        ssv_dbg_ctrl_hci->isr_summary_eable = 1;
+        ssv_dbg_ctrl_hci->isr_routine_time = 0;
+        ssv_dbg_ctrl_hci->isr_tx_time = 0;
+        ssv_dbg_ctrl_hci->isr_rx_time = 0;
+        ssv_dbg_ctrl_hci->isr_idle_time = 0;
+        ssv_dbg_ctrl_hci->isr_rx_idle_time = 0;
+        ssv_dbg_ctrl_hci->isr_miss_cnt = 0;
+        ssv_dbg_ctrl_hci->prev_isr_jiffes = 0;
+        ssv_dbg_ctrl_hci->prev_rx_isr_jiffes = 0;
+        print_isr_info();
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "isr_time") && !strcmp(argv[2], "stop") ) {
+        ssv_dbg_ctrl_hci->isr_summary_eable = 0;
+        print_isr_info();
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "isr_time") && !strcmp(argv[2], "show") ) {
+        print_isr_info();
+        return 0;
+    }
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+ else if (argc==3 && !strcmp(argv[1], "isr_debug") && !strcmp(argv[2], "reset") ) {
+  ssv_dbg_ctrl_hci->irq_enable= 0;
+        ssv_dbg_ctrl_hci->irq_count = 0;
+        ssv_dbg_ctrl_hci->invalid_irq_count = 0;
+        ssv_dbg_ctrl_hci->tx_irq_count = 0;
+        ssv_dbg_ctrl_hci->real_tx_irq_count = 0;
+        ssv_dbg_ctrl_hci->rx_irq_count = 0;
+        ssv_dbg_ctrl_hci->isr_rx_idle_time = 0;
+        ssv_dbg_ctrl_hci->irq_rx_pkt_count = 0;
+        ssv_dbg_ctrl_hci->irq_tx_pkt_count = 0;
+        strcat(ssv6xxx_result_buf, "irq debug reset count\n");
+        return 0;
+    }
+    else if (argc==3 && !strcmp(argv[1], "isr_debug") && !strcmp(argv[2], "show") ) {
+  print_irq_count();
+        return 0;
+    }
+ else if (argc==3 && !strcmp(argv[1], "isr_debug") && !strcmp(argv[2], "stop") ) {
+  ssv_dbg_ctrl_hci->irq_enable= 0;
+  strcat(ssv6xxx_result_buf, "irq debug stop\n");
+        return 0;
+    }
+ else if (argc==3 && !strcmp(argv[1], "isr_debug") && !strcmp(argv[2], "start") ) {
+  ssv_dbg_ctrl_hci->irq_enable= 1;
+  strcat(ssv6xxx_result_buf, "irq debug start\n");
+        return 0;
+    }
+#endif
+    else
+    {
+        strcat(ssv6xxx_result_buf, "hci [txq|rxq] [show]\nhci [isr_time] [start|stop|show]\n\n");
+        return 0;
+    }
+    return -1;
+}
+static int ssv_cmd_hwq(int argc, char *argv[])
+{
+#undef GET_FFO0_CNT
+#undef GET_FFO1_CNT
+#undef GET_FFO2_CNT
+#undef GET_FFO3_CNT
+#undef GET_FFO4_CNT
+#undef GET_FFO5_CNT
+#undef GET_FFO6_CNT
+#undef GET_FFO7_CNT
+#undef GET_FFO8_CNT
+#undef GET_FFO9_CNT
+#undef GET_FFO10_CNT
+#undef GET_FFO11_CNT
+#undef GET_FFO12_CNT
+#undef GET_FFO13_CNT
+#undef GET_FFO14_CNT
+#undef GET_FFO15_CNT
+#undef GET_FF0_CNT
+#undef GET_FF1_CNT
+#undef GET_FF3_CNT
+#undef GET_FF5_CNT
+#undef GET_FF6_CNT
+#undef GET_FF7_CNT
+#undef GET_FF8_CNT
+#undef GET_FF9_CNT
+#undef GET_FF10_CNT
+#undef GET_FF11_CNT
+#undef GET_FF12_CNT
+#undef GET_FF13_CNT
+#undef GET_FF14_CNT
+#undef GET_FF15_CNT
+#undef GET_FF4_CNT
+#undef GET_FF2_CNT
+#undef GET_TX_ID_ALC_LEN
+#undef GET_RX_ID_ALC_LEN
+#undef GET_AVA_TAG
+#define GET_FFO0_CNT ((value & 0x0000001f ) >> 0)
+#define GET_FFO1_CNT ((value & 0x000003e0 ) >> 5)
+#define GET_FFO2_CNT ((value & 0x00000c00 ) >> 10)
+#define GET_FFO3_CNT ((value & 0x000f8000 ) >> 15)
+#define GET_FFO4_CNT ((value & 0x00300000 ) >> 20)
+#define GET_FFO5_CNT ((value & 0x0e000000 ) >> 25)
+#define GET_FFO6_CNT ((value1 & 0x0000000f ) >> 0)
+#define GET_FFO7_CNT ((value1 & 0x000003e0 ) >> 5)
+#define GET_FFO8_CNT ((value1 & 0x00007c00 ) >> 10)
+#define GET_FFO9_CNT ((value1 & 0x000f8000 ) >> 15)
+#define GET_FFO10_CNT ((value1 & 0x00f00000 ) >> 20)
+#define GET_FFO11_CNT ((value1 & 0x3e000000 ) >> 25)
+#define GET_FFO12_CNT ((value2 & 0x00000007 ) >> 0)
+#define GET_FFO13_CNT ((value2 & 0x00000060 ) >> 5)
+#define GET_FFO14_CNT ((value2 & 0x00000c00 ) >> 10)
+#define GET_FFO15_CNT ((value2 & 0x001f8000 ) >> 15)
+#define GET_FF0_CNT ((value & 0x0000001f ) >> 0)
+#define GET_FF1_CNT ((value & 0x000001e0 ) >> 5)
+#define GET_FF3_CNT ((value & 0x00003800 ) >> 11)
+#define GET_FF5_CNT ((value & 0x000e0000 ) >> 17)
+#define GET_FF6_CNT ((value & 0x00700000 ) >> 20)
+#define GET_FF7_CNT ((value & 0x03800000 ) >> 23)
+#define GET_FF8_CNT ((value & 0x1c000000 ) >> 26)
+#define GET_FF9_CNT ((value & 0xe0000000 ) >> 29)
+#define GET_FF10_CNT ((value1 & 0x00000007 ) >> 0)
+#define GET_FF11_CNT ((value1 & 0x00000038 ) >> 3)
+#define GET_FF12_CNT ((value1 & 0x000001c0 ) >> 6)
+#define GET_FF13_CNT ((value1 & 0x00000600 ) >> 9)
+#define GET_FF14_CNT ((value1 & 0x00001800 ) >> 11)
+#define GET_FF15_CNT ((value1 & 0x00006000 ) >> 13)
+#define GET_FF4_CNT ((value1 & 0x000f8000 ) >> 15)
+#define GET_FF2_CNT ((value1 & 0x00700000 ) >> 20)
+#define GET_TX_ID_ALC_LEN ((value & 0x0003fe00 ) >> 9)
+#define GET_RX_ID_ALC_LEN ((value & 0x07fc0000 ) >> 18)
+#define GET_AVA_TAG ((value1 & 0x01ff0000 ) >> 16)
+    u32 addr, value, value1, value2;
+    char temp_str[512];
+    addr = ADR_RD_FFOUT_CNT1;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+    addr = ADR_RD_FFOUT_CNT2;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value1));
+    addr = ADR_RD_FFOUT_CNT3;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value2));
+    sprintf(temp_str, "\n[TAG]  MCU - HCI - SEC -  RX - MIC - TX0 - TX1 - TX2 - TX3 - TX4 - SEC - MIC - TSH\n");
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"OUTPUT %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d\n",
+   GET_FFO0_CNT, GET_FFO1_CNT, GET_FFO3_CNT, GET_FFO4_CNT, GET_FFO5_CNT, GET_FFO6_CNT,
+   GET_FFO7_CNT, GET_FFO8_CNT, GET_FFO9_CNT, GET_FFO10_CNT, GET_FFO11_CNT, GET_FFO12_CNT, GET_FFO15_CNT);
+    strcat(ssv6xxx_result_buf, temp_str);
+    addr = ADR_RD_IN_FFCNT1;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+    addr = ADR_RD_IN_FFCNT2;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value1));
+    sprintf(temp_str, "INPUT  %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d - %3d\n",
+   GET_FF0_CNT, GET_FF1_CNT, GET_FF3_CNT, GET_FF4_CNT, GET_FF5_CNT, GET_FF6_CNT,
+   GET_FF7_CNT, GET_FF8_CNT, GET_FF9_CNT, GET_FF10_CNT, GET_FF11_CNT, GET_FF12_CNT, GET_FF15_CNT);
+    strcat(ssv6xxx_result_buf, temp_str);
+    addr = ADR_ID_LEN_THREADSHOLD2;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+    addr = ADR_TAG_STATUS;
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value1));
+    sprintf(temp_str, "TX[%d]RX[%d]AVA[%d]\n",GET_TX_ID_ALC_LEN, GET_RX_ID_ALC_LEN, GET_AVA_TAG);
+    strcat(ssv6xxx_result_buf, temp_str);
+    return 0;
+}
+#ifdef CONFIG_P2P_NOA
+#if 0
+struct ssv6xxx_p2p_noa_param {
+    u32 duration;
+    u32 interval;
+    u32 start_time;
+    u32 enable:8;
+    u32 count:8;
+    u8 addr[6];
+};
+#endif
+static struct ssv6xxx_p2p_noa_param cmd_noa_param = {
+    50,
+    100,
+    0x12345678,
+    1,
+    255,
+    {0x4c, 0xe6, 0x76, 0xa2, 0x4e, 0x7c}
+};
+void noa_dump(char* temp_str)
+{
+    sprintf(temp_str, "NOA Parameter:\nEnable=%d\nInterval=%d\nDuration=%d\nStart_time=0x%08x\nCount=%d\nAddr=[%02x:%02x:%02x:%02x:%02x:%02x]\n",
+                                cmd_noa_param.enable,
+                                cmd_noa_param.interval,
+                                cmd_noa_param.duration,
+                                cmd_noa_param.start_time,
+                                cmd_noa_param.count,
+                                cmd_noa_param.addr[0],
+                                cmd_noa_param.addr[1],
+                                cmd_noa_param.addr[2],
+                                cmd_noa_param.addr[3],
+                                cmd_noa_param.addr[4],
+                                cmd_noa_param.addr[5]);
+     strcat(ssv6xxx_result_buf, temp_str);
+}
+void ssv6xxx_send_noa_cmd(struct ssv_softc *sc, struct ssv6xxx_p2p_noa_param *p2p_noa_param)
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int retry_cnt = 5;
+    skb = ssvdevice_skb_alloc(HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_p2p_noa_param));
+    skb->data_len = HOST_CMD_HDR_LEN + sizeof(struct ssv6xxx_p2p_noa_param);
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_SET_NOA;
+    host_cmd->len = skb->data_len;
+    memcpy(host_cmd->dat32, p2p_noa_param, sizeof(struct ssv6xxx_p2p_noa_param));
+    while((HCI_SEND_CMD(sc->sh, skb)!=0)&&(retry_cnt)){
+        printk(KERN_INFO "NOA cmd retry=%d!!\n",retry_cnt);
+        retry_cnt--;
+    }
+    ssvdevice_skb_free(skb);
+}
+static int ssv_cmd_noa(int argc, char *argv[])
+{
+    char temp_str[512];
+    char *endp;
+    if (argc==2 && !strcmp(argv[1], "show") ) {
+     ;
+    }else if (argc==3 && !strcmp(argv[1], "duration") ){
+        cmd_noa_param.duration= simple_strtoul(argv[2], &endp, 0);
+    }else if (argc==3 && !strcmp(argv[1], "interval") ) {
+        cmd_noa_param.interval= simple_strtoul(argv[2], &endp, 0);
+    }else if (argc==3 && !strcmp(argv[1], "start") ) {
+        cmd_noa_param.start_time= simple_strtoul(argv[2], &endp, 0);
+    }else if (argc==3 && !strcmp(argv[1], "enable") ) {
+        cmd_noa_param.enable= simple_strtoul(argv[2], &endp, 0);
+    }else if (argc==3 && !strcmp(argv[1], "count") ) {
+         cmd_noa_param.count= simple_strtoul(argv[2], &endp, 0);
+    }else if (argc==8 && !strcmp(argv[1], "addr") ) {
+         cmd_noa_param.addr[0]= simple_strtoul(argv[2], &endp, 16);
+         cmd_noa_param.addr[1]= simple_strtoul(argv[3], &endp, 16);
+         cmd_noa_param.addr[2]= simple_strtoul(argv[4], &endp, 16);
+         cmd_noa_param.addr[3]= simple_strtoul(argv[5], &endp, 16);
+         cmd_noa_param.addr[4]= simple_strtoul(argv[6], &endp, 16);
+         cmd_noa_param.addr[5]= simple_strtoul(argv[7], &endp, 16);
+    }else if (argc==2 && !strcmp(argv[1], "send") ) {
+        ssv6xxx_send_noa_cmd(ssv_dbg_sc, &cmd_noa_param);
+    }else{
+        sprintf(temp_str,"## wrong command\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    noa_dump(temp_str);
+    return 0;
+}
+#endif
+static int ssv_cmd_mib(int argc, char *argv[])
+{
+    u32 addr, value;
+    char temp_str[512];
+    int i;
+    if (argc==2 && !strcmp(argv[1], "reset") ) {
+        addr = MIB_REG_BASE;
+        value = 0x0;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, MIB_REG_BASE, value));
+        value = 0xffffffff;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, MIB_REG_BASE, value));
+        value = 0x0;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE0023F8, value));
+        value = 0x100000;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE0023F8, value));
+        value = 0x0;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE0043F8, value));
+        value = 0x100000;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE0043F8, value));
+        value = 0x0;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE000088, value));
+        value = 0x80000000;
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, 0xCE000088, value));
+        sprintf(temp_str, " => MIB reseted\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }else if (argc==2 && !strcmp(argv[1], "list") ) {
+        addr = MIB_REG_BASE;
+        for(i=0; i<120; i++, addr+=4) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+            sprintf(temp_str, "%08x ", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+            if (((i+1)&0x07) == 0)
+                strcat(ssv6xxx_result_buf, "\n");
+        }
+        strcat(ssv6xxx_result_buf, "\n");
+    }
+    else if (argc == 2 && strcmp(argv[1], "rx")==0) {
+         sprintf(temp_str, "%-10s\t\t%-10s\t\t%-10s\t\t%-10s\n","MRX_FCS_SUCC", "MRX_FCS_ERR", "MRX_ALC_FAIL", "MRX_MISS");
+         strcat(ssv6xxx_result_buf, temp_str);
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_FCS_SUCC, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_FCS_ERR, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_ALC_FAIL, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_MISS, &value)) {
+            sprintf(temp_str, "[%08x]\n", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         sprintf(temp_str, "%-10s\t\t%-10s\t\t%-10s\t%-10s\n", "MRX_MB_MISS", "MRX_NIDLE_MISS", "DBG_LEN_ALC_FAIL", "DBG_LEN_CRC_FAIL");
+         strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_MB_MISS, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_MRX_NIDLE_MISS, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_DBG_LEN_ALC_FAIL, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_DBG_LEN_CRC_FAIL, &value)) {
+            sprintf(temp_str, "[%08x]\n\n", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+          strcat(ssv6xxx_result_buf, temp_str);
+          }
+          if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_DBG_AMPDU_PASS, &value)) {
+             sprintf(temp_str, "[%08x]\t\t", value);
+             strcat(ssv6xxx_result_buf, temp_str);
+          }
+          if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_DBG_AMPDU_FAIL, &value)) {
+             sprintf(temp_str, "[%08x]\t\t", value);
+             strcat(ssv6xxx_result_buf, temp_str);
+          }
+          if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_ID_ALC_FAIL1, &value)) {
+             sprintf(temp_str, "[%08x]\t\t", value);
+             strcat(ssv6xxx_result_buf, temp_str);
+          }
+          if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_ID_ALC_FAIL2, &value)) {
+             sprintf(temp_str, "[%08x]\n\n", value);
+             strcat(ssv6xxx_result_buf, temp_str);
+         sprintf(temp_str, "PHY B mode:\n");
+         strcat(ssv6xxx_result_buf, temp_str);
+         sprintf(temp_str, "%-10s\t\t%-10s\t\t%-10s\n", "CRC error","CCA","counter");
+         strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0023E8, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0023EC, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", (value>>16)&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+            sprintf(temp_str, "[%08x]\t\t\n\n", value&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "PHY G/N mode:\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str, "%-10s\t\t%-10s\t\t%-10s\n", "CRC error","CCA","counter");
+        strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0043E8, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", value&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+         if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0043EC, &value)) {
+            sprintf(temp_str, "[%08x]\t\t", (value>>16)&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+            sprintf(temp_str, "[%08x]\t\t\n\n", value&0xffff);
+            strcat(ssv6xxx_result_buf, temp_str);
+         }
+    }
+    else
+    {
+        sprintf(temp_str, "mib [reset|list|rx]\n\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    return 0;
+}
+static int ssv_cmd_sdio(int argc, char *argv[])
+{
+    u32 addr, value;
+    char temp_str[512], *endp;
+    int ret=0;
+    if (argc==4 && !strcmp(argv[1], "reg") && !strcmp(argv[2], "r") ) {
+        addr = simple_strtoul(argv[3], &endp, 16);
+   if(!ssv6xxx_debug_ifops->ifops->cmd52_read){
+      sprintf(temp_str,"The interface doesn't provide cmd52 read\n");
+      strcat(ssv6xxx_result_buf, temp_str);
+   return 0;
+  }
+  ret = ssv6xxx_debug_ifops->ifops->cmd52_read(
+            ssv6xxx_debug_ifops->dev,
+            addr,
+            &value
+        );
+        if (ret >= 0) {
+            sprintf(temp_str,"  ==> %x\n", value);
+            strcat(ssv6xxx_result_buf, temp_str);
+            return 0;
+        }
+    }
+    else if (argc==5 && !strcmp(argv[1], "reg") && !strcmp(argv[2], "w") ) {
+        addr = simple_strtoul(argv[3], &endp, 16);
+        value = simple_strtoul(argv[4], &endp, 16);
+        if(!ssv6xxx_debug_ifops->ifops->cmd52_write){
+      sprintf(temp_str,"The interface doesn't provide cmd52 write\n");
+      strcat(ssv6xxx_result_buf, temp_str);
+   return 0;
+  }
+        ret = ssv6xxx_debug_ifops->ifops->cmd52_write(
+            ssv6xxx_debug_ifops->dev,
+            addr,
+            value
+        );
+        if (ret >= 0) {
+            sprintf(temp_str,"  ==> write odne.\n");
+            strcat(ssv6xxx_result_buf, temp_str);
+            return 0;
+        }
+    }
+    sprintf(temp_str,"sdio cmd52 fail: %d\n", ret);
+    strcat(ssv6xxx_result_buf, temp_str);
+    return 0;
+}
+#ifdef CONFIG_SSV_CABRIO_E
+static struct ssv6xxx_iqk_cfg cmd_iqk_cfg = {
+    SSV6XXX_IQK_CFG_XTAL_26M,
+    SSV6XXX_IQK_CFG_PA_DEF,
+    0,
+    0,
+    26,
+    3,
+    0x75,
+    0x75,
+    0x80,
+    0x80,
+    SSV6XXX_IQK_CMD_INIT_CALI,
+    { SSV6XXX_IQK_TEMPERATURE
+    + SSV6XXX_IQK_RXDC
+    + SSV6XXX_IQK_RXRC
+    + SSV6XXX_IQK_TXDC
+    + SSV6XXX_IQK_TXIQ
+    + SSV6XXX_IQK_RXIQ
+    },
+};
+static int ssv_cmd_iqk (int argc, char *argv[]) {
+    char temp_str[512], *endp;
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    u32 rxcnt_total, rxcnt_error;
+    sprintf(temp_str,"# got iqk command\n");
+    strcat(ssv6xxx_result_buf, temp_str);
+    if ((argc == 3) && (strcmp(argv[1], "cfg-pa") == 0)) {
+        cmd_iqk_cfg.cfg_pa = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## set cfg_pa as %d\n", cmd_iqk_cfg.cfg_pa);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "cfg-tssi-trgt") == 0)) {
+        cmd_iqk_cfg.cfg_tssi_trgt = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## set cfg_tssi_trgt as %d\n", cmd_iqk_cfg.cfg_tssi_trgt);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "init-cali") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_INIT_CALI;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do init-cali\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "rtbl-load") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_RTBL_LOAD;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do rtbl-load\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "rtbl-load-def") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_RTBL_LOAD_DEF;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do rtbl-load\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "rtbl-reset") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_RTBL_RESET;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do rtbl-reset\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "rtbl-set") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_RTBL_SET;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do rtbl-set\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "rtbl-export") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_RTBL_EXPORT;
+        cmd_iqk_cfg.fx_sel = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do rtbl-export\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "tk-evm") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_TK_EVM;
+        cmd_iqk_cfg.argv = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do tk-evm\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "tk-tone") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_TK_TONE;
+        cmd_iqk_cfg.argv = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do tk-tone\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 3) && (strcmp(argv[1], "channel") == 0)) {
+        cmd_iqk_cfg.cmd_sel = SSV6XXX_IQK_CMD_TK_CHCH;
+        cmd_iqk_cfg.argv = simple_strtoul(argv[2], &endp, 0);
+        sprintf(temp_str,"## do change channel\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else if ((argc == 2) && (strcmp(argv[1], "tk-rxcnt-report") == 0)) {
+        if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0043E8, &rxcnt_error));
+        if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0043EC, &rxcnt_total));
+        sprintf(temp_str,"## GN Rx error rate = (%06d/%06d)\n", rxcnt_error, rxcnt_total);
+        strcat(ssv6xxx_result_buf, temp_str);
+        if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0023E8, &rxcnt_error));
+        if(SSV_REG_READ1(ssv6xxx_debug_ifops, 0xCE0023EC, &rxcnt_total));
+        sprintf(temp_str,"## B Rx error rate = (%06d/%06d)\n", rxcnt_error, rxcnt_total);
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    else {
+        sprintf(temp_str,"## invalid iqk command\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"## cmd: cfg-pa/cfg-tssi-trgt\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"## cmd: init-cali/rtbl-load/rtbl-load-def/rtbl-reset/rtbl-set/rtbl-export/tk-evm/tk-tone/tk-channel\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"## fx_sel: 0x0008: RXDC\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0010: RXRC\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0020: TXDC\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0040: TXIQ\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0080: RXIQ\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0100: TSSI\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        sprintf(temp_str,"           0x0200: PAPD\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+        return 0;
+    }
+    skb = ssvdevice_skb_alloc(HOST_CMD_HDR_LEN + IQK_CFG_LEN + PHY_SETTING_SIZE + RF_SETTING_SIZE);
+    if(skb == NULL)
+    {
+        printk("ssv command ssvdevice_skb_alloc fail!!!\n");
+        return 0;
+    }
+    if((PHY_SETTING_SIZE > MAX_PHY_SETTING_TABLE_SIZE) ||
+        (RF_SETTING_SIZE > MAX_RF_SETTING_TABLE_SIZE))
+    {
+        printk("Please check RF or PHY table size!!!\n");
+        BUG_ON(1);
+        return 0;
+    }
+    skb->data_len = HOST_CMD_HDR_LEN + IQK_CFG_LEN + PHY_SETTING_SIZE + RF_SETTING_SIZE;
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_INIT_CALI;
+    host_cmd->len = skb->data_len;
+    cmd_iqk_cfg.phy_tbl_size = PHY_SETTING_SIZE;
+    cmd_iqk_cfg.rf_tbl_size = RF_SETTING_SIZE;
+    memcpy(host_cmd->dat32, &cmd_iqk_cfg, IQK_CFG_LEN);
+    memcpy(host_cmd->dat8+IQK_CFG_LEN, phy_setting, PHY_SETTING_SIZE);
+    memcpy(host_cmd->dat8+IQK_CFG_LEN+PHY_SETTING_SIZE, asic_rf_setting, RF_SETTING_SIZE);
+    if(ssv_dbg_ctrl_hci->shi->hci_ops->hci_send_cmd(skb) == 0) {
+        sprintf(temp_str,"## hci send cmd success\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    else {
+        sprintf(temp_str,"## hci send cmd fail\n");
+        strcat(ssv6xxx_result_buf, temp_str);
+    }
+    ssvdevice_skb_free(skb);
+    return 0;
+}
+#endif
+#define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
+    (((a) & 0xff00ff00) >> 8))
+#define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
+static int ssv_cmd_version (int argc, char *argv[]) {
+    char temp_str[256];
+    u32 regval;
+    u64 chip_tag=0;
+    char chip_id[24]="";
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_IC_TIME_TAG_1, &regval));
+    chip_tag = ((u64)regval<<32);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_IC_TIME_TAG_0, &regval));
+    chip_tag |= (regval);
+    sprintf(temp_str,"CHIP TAG: %llx \n",chip_tag);
+    strcat(ssv6xxx_result_buf, temp_str);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_CHIP_ID_3, &regval));
+    *((u32 *)&chip_id[0]) = (u32)LONGSWAP(regval);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_CHIP_ID_2, &regval));
+    *((u32 *)&chip_id[4]) = (u32)LONGSWAP(regval);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_CHIP_ID_1, &regval));
+    *((u32 *)&chip_id[8]) = (u32)LONGSWAP(regval);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_CHIP_ID_0, &regval));
+    *((u32 *)&chip_id[12]) = (u32)LONGSWAP(regval);
+    sprintf(temp_str,"CHIP ID: %s \n",chip_id);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"# current Software mac version: %d\n", ssv_root_version);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"SVN ROOT URL %s \n", SSV_ROOT_URl);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"COMPILER HOST %s \n", COMPILERHOST);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"COMPILER DATE %s \n", COMPILERDATE);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"COMPILER OS %s \n", COMPILEROS);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"COMPILER OS ARCH %s \n", COMPILEROSARCH);
+    strcat(ssv6xxx_result_buf, temp_str);
+    if(SSV_REG_READ1(ssv6xxx_debug_ifops, FW_VERSION_REG, &regval));
+    sprintf(temp_str,"Firmware image version: %d\n", regval);
+    strcat(ssv6xxx_result_buf, temp_str);
+    sprintf(temp_str,"\n[Compiler Option!!]\n");
+    strcat(ssv6xxx_result_buf, temp_str);
+    regval = sizeof(conf_parser)/ sizeof(*conf_parser);
+    while(regval)
+    {
+        sprintf(temp_str,"Define %s \n", conf_parser[--regval]);
+        strcat(ssv6xxx_result_buf, temp_str);
+    };
+    return 0;
+}
+static int ssv_cmd_tool(int argc, char *argv[])
+{
+    u32 addr, value, count;
+    char tmpbf[12], *endp;
+    int s;
+    if (argc == 4 && strcmp(argv[1], "w")==0) {
+        addr = simple_strtoul(argv[2], &endp, 16);
+        value = simple_strtoul(argv[3], &endp, 16);
+        if(SSV_REG_WRITE1(ssv6xxx_debug_ifops, addr, value));
+        sprintf(ssv6xxx_result_buf, "ok");
+        return 0;
+    }
+    if ((argc==4||argc==3) && strcmp(argv[1], "r")==0) {
+        count = (argc==3)? 1: simple_strtoul(argv[3], &endp, 10);
+        addr = simple_strtoul(argv[2], &endp, 16);
+        for(s=0; s<count; s++, addr+=4) {
+            if(SSV_REG_READ1(ssv6xxx_debug_ifops, addr, &value));
+            sprintf(tmpbf, "%08x\n", value);
+            strcat(ssv6xxx_result_buf, tmpbf);
+        }
+        return 0;
+    }
+    return -1;
+}
+struct _ssv6xxx_txtput{
+    struct task_struct *txtput_tsk;
+    struct sk_buff *skb;
+    u32 size_per_frame;
+    u32 loop_times;
+    u32 occupied_tx_pages;
+};
+struct _ssv6xxx_txtput *ssv6xxx_txtput;
+struct _ssv6xxx_txtput ssv_txtput = { NULL, NULL, 0, 0, 0};
+static int txtput_thread_m2(void *data)
+{
+#define Q_DELAY_MS 20
+ struct sk_buff *skb = NULL;
+ struct ssv6200_tx_desc *tx_desc;
+ int qlen = 0, max_qlen, q_delay_urange[2];
+ max_qlen = (200 * 1000 / 8 * Q_DELAY_MS) / ssv6xxx_txtput->size_per_frame;
+ q_delay_urange[0] = Q_DELAY_MS * 1000;
+ q_delay_urange[1] = q_delay_urange[0] + 1000;
+ printk("max_qlen: %d\n", max_qlen);
+ while (!kthread_should_stop() && ssv6xxx_txtput->loop_times > 0) {
+  ssv6xxx_txtput->loop_times--;
+  skb = ssvdevice_skb_alloc(ssv6xxx_txtput->size_per_frame);
+  if (skb == NULL) {
+   printk("ssv command txtput_generate_m2 "
+   "ssvdevice_skb_alloc fail!!!\n");
+   goto end;
+  }
+  skb->data_len = ssv6xxx_txtput->size_per_frame;
+  skb->len = ssv6xxx_txtput->size_per_frame;
+  tx_desc = (struct ssv6200_tx_desc *)skb->data;
+  memset((void *)tx_desc, 0xff, SSV6XXX_TX_DESC_LEN);
+  tx_desc->len = skb->len;
+  tx_desc->c_type = M2_TXREQ;
+  tx_desc->fCmd = (M_ENG_CPU << 4) | M_ENG_HWHCI;
+  tx_desc->reason = ID_TRAP_SW_TXTPUT;
+  qlen = ssv_dbg_ctrl_hci->shi->hci_ops->hci_tx(skb, 0, 0);
+  if (qlen >= max_qlen) {
+   usleep_range(q_delay_urange[0], q_delay_urange[1]);
+  }
+ }
+end:
+ ssv6xxx_txtput->txtput_tsk = NULL;
+ return 0;
+}
+static int txtput_thread(void *data)
+{
+    struct sk_buff *skb = ssv6xxx_txtput->skb;
+    struct ssv6xxx_hci_txq_info2 txq_info2;
+    u32 ret = 0, free_tx_page;
+    int send_cnt;
+    unsigned long start_time, end_time, throughput, time_elapse;
+    throughput = ssv6xxx_txtput->loop_times * ssv6xxx_txtput->size_per_frame * 8;
+    start_time = jiffies;
+    while (!kthread_should_stop() && ssv6xxx_txtput->loop_times > 0) {
+        ret = SSV_REG_READ1(ssv6xxx_debug_ifops, ADR_TX_ID_ALL_INFO2, (u32 *)&txq_info2);
+        if (ret < 0) {
+            printk("%s, read ADR_TX_ID_ALL_INFO2 failed\n", __func__);
+            goto end;
+        }
+        free_tx_page = SSV6200_PAGE_TX_THRESHOLD - txq_info2.tx_use_page;
+        send_cnt = free_tx_page / ssv6xxx_txtput->occupied_tx_pages;
+        while (send_cnt > 0 && ssv6xxx_txtput->loop_times > 0) {
+            send_cnt--;
+            ssv6xxx_txtput->loop_times--;
+            ssv_dbg_ctrl_hci->shi->hci_ops->hci_send_cmd(skb);
+        }
+    }
+    end_time = jiffies;
+    ssvdevice_skb_free(skb);
+    time_elapse = ((end_time - start_time) * 1000) / HZ;
+    if (time_elapse > 0) {
+        throughput = throughput / time_elapse;
+        printk("duration %ldms, avg. throughput %d Kbps\n", time_elapse, (int)throughput);
+    }
+end:
+    ssv6xxx_txtput->txtput_tsk = NULL;
+    return 0;
+}
+int txtput_generate_m2(u32 size_per_frame, u32 loop_times)
+{
+ ssv6xxx_txtput->size_per_frame = size_per_frame;
+ ssv6xxx_txtput->loop_times = loop_times;
+ ssv6xxx_txtput->txtput_tsk = kthread_run(txtput_thread_m2, NULL, "txtput_thread_m2");
+ return 0;
+}
+int txtput_generate_host_cmd(u32 size_per_frame, u32 loop_times)
+{
+#define PAGESIZE 256
+ struct cfg_host_cmd *host_cmd;
+ struct sk_buff *skb;
+ skb = ssvdevice_skb_alloc(size_per_frame);
+ if(skb == NULL) {
+  printk("ssv command txtput_generate_host_cmd ssvdevice_skb_alloc fail!!!\n");
+  return 0;
+ }
+ skb->data_len = size_per_frame;
+ skb->len = skb->data_len;
+ host_cmd = (struct cfg_host_cmd *)skb->data;
+ host_cmd->c_type = TEST_CMD;
+ host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_TX_TPUT;
+ host_cmd->len = skb->data_len;
+ memcpy(host_cmd->dat32, skb->data, size_per_frame);
+ ssv6xxx_txtput->occupied_tx_pages = (size_per_frame/PAGESIZE)+((size_per_frame%PAGESIZE)!=0);
+ ssv6xxx_txtput->size_per_frame = size_per_frame;
+ ssv6xxx_txtput->loop_times = loop_times;
+ ssv6xxx_txtput->skb = skb;
+ ssv6xxx_txtput->txtput_tsk = kthread_run(txtput_thread, NULL, "txtput_thread");
+ return 0 ;
+}
+int txtput_tsk_cleanup(void)
+{
+ int ret = 0;
+ if (ssv6xxx_txtput->txtput_tsk) {
+  ret = kthread_stop(ssv6xxx_txtput->txtput_tsk);
+  ssv6xxx_txtput->txtput_tsk = NULL;
+ }
+ return ret;
+}
+int watchdog_controller(struct ssv_hw *sh ,u8 flag)
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+    int ret = 0;
+    printk("watchdog_controller %d\n",flag);
+    skb = ssvdevice_skb_alloc(HOST_CMD_HDR_LEN);
+    if(skb == NULL)
+    {
+        printk("init watchdog_controller fail!!!\n");
+        return (-1);
+    }
+    skb->data_len = HOST_CMD_HDR_LEN;
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)flag;
+    host_cmd->len = skb->data_len;
+    sh->hci.hci_ops->hci_send_cmd(skb);
+    ssvdevice_skb_free(skb);
+    return ret;
+}
+static int ssv_cmd_txtput(int argc, char *argv[])
+{
+ char tmpbf[64], *endp;
+ u32 size_per_frame, loop_times, pkt_type;
+ ssv6xxx_txtput = &ssv_txtput;
+ if (argc == 2 && !strcmp(argv[1], "stop")) {
+  txtput_tsk_cleanup();
+  return 0;
+ }
+ if (argc != 4) {
+  sprintf(tmpbf, "* txtput stop\n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  sprintf(tmpbf, "* txtput [type] [size] [frames]\n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  sprintf(tmpbf, "    type(packet type):\n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  sprintf(tmpbf, "         0 = host_cmd\n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  sprintf(tmpbf, "         1 = m2_type \n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  sprintf(tmpbf, " EX: txtput 1 14000 9999 \n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  return 0;
+ }
+ pkt_type = simple_strtoul(argv[1], &endp, 10);
+ size_per_frame = simple_strtoul(argv[2], &endp, 10);
+ loop_times = simple_strtoul(argv[3], &endp, 10);
+ sprintf(tmpbf, "type&size&frames:%d&%d&%d\n", pkt_type, size_per_frame, loop_times);
+ strncat(ssv6xxx_result_buf, tmpbf, sizeof(tmpbf));
+ if (ssv6xxx_txtput->txtput_tsk) {
+  sprintf(tmpbf, "txtput already in progress\n");
+  strcat(ssv6xxx_result_buf, tmpbf);
+  return 0;
+ }
+    watchdog_controller(((struct ssv_softc *)ssv_dbg_sc)->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_STOP);
+    ((struct ssv_softc *)ssv_dbg_sc)->watchdog_flag = WD_SLEEP;
+ if (pkt_type)
+  txtput_generate_m2(size_per_frame + SSV6XXX_TX_DESC_LEN, loop_times);
+ else
+  txtput_generate_host_cmd(size_per_frame + HOST_CMD_HDR_LEN, loop_times);
+ return 0;
+}
+static int ssv_cmd_rxtput(int argc, char *argv[])
+{
+    struct sk_buff *skb;
+    struct cfg_host_cmd *host_cmd;
+ struct sdio_rxtput_cfg cmd_rxtput_cfg;
+    char tmpbf[32], *endp;
+    if (argc != 3) {
+        sprintf(ssv6xxx_result_buf, "rxtput [size] [frames]\n");
+  return 0;
+    }
+    skb = ssvdevice_skb_alloc(HOST_CMD_HDR_LEN + sizeof(struct sdio_rxtput_cfg));
+    if(skb == NULL)
+    {
+        printk("ssv command ssvdevice_skb_alloc fail!!!\n");
+        return 0;
+    }
+    watchdog_controller(((struct ssv_softc *)ssv_dbg_sc)->sh ,(u8)SSV6XXX_HOST_CMD_WATCHDOG_STOP);
+    ((struct ssv_softc *)ssv_dbg_sc)->watchdog_flag = WD_SLEEP;
+ cmd_rxtput_cfg.size_per_frame = simple_strtoul(argv[1], &endp, 10);
+ cmd_rxtput_cfg.total_frames = simple_strtoul(argv[2], &endp, 10);
+    sprintf(tmpbf, "size&frames:%d&%d\n", cmd_rxtput_cfg.size_per_frame, cmd_rxtput_cfg.total_frames);
+    strcat(ssv6xxx_result_buf, tmpbf);
+    skb->data_len = HOST_CMD_HDR_LEN + sizeof(struct sdio_rxtput_cfg);
+    skb->len = skb->data_len;
+    host_cmd = (struct cfg_host_cmd *)skb->data;
+    host_cmd->c_type = HOST_CMD;
+    host_cmd->h_cmd = (u8)SSV6XXX_HOST_CMD_RX_TPUT;
+    host_cmd->len = skb->data_len;
+    memcpy(host_cmd->dat32, &cmd_rxtput_cfg, sizeof(struct sdio_rxtput_cfg));
+    if(ssv_dbg_ctrl_hci->shi->hci_ops->hci_send_cmd(skb) == 0) {
+        strcat(ssv6xxx_result_buf, "## hci cmd was sent successfully\n");
+    }
+    else {
+        strcat(ssv6xxx_result_buf, "## hci cmd was sent failed\n");
+    }
+    ssvdevice_skb_free(skb);
+ return 0;
+}
+static int ssv_cmd_check(int argc, char *argv[])
+{
+    u32 size,i,j,x,y,id,value,address,id_value;
+    char *endp;
+    u32 id_base_address[4];
+    id_base_address[0] = 0xcd010008;
+    id_base_address[1] = 0xcd01000c;
+    id_base_address[2] = 0xcd010054;
+    id_base_address[3] = 0xcd010058;
+    if (argc != 2) {
+        sprintf(ssv6xxx_result_buf, "check [packet size]\n");
+        return 0;
+    }
+    size = simple_strtoul(argv[1], &endp, 10);
+    size = size >> 2;
+    for(x=0;x<4;x++)
+    {
+        if(SSV_REG_READ1(ssv6xxx_debug_ifops, id_base_address[x], &id_value));
+        for(y=0;y<32 && id_value;y++,id_value>>=1)
+        {
+            if(id_value&0x1)
+            {
+                id = 32*x + y;
+                address = 0x80000000 + (id<<16);
+                {
+                    printk("        ");
+                    for (i= 0;i<size;i+=8)
+                    {
+                        if(SSV_REG_READ1(ssv6xxx_debug_ifops, address, &value));
+                        printk("\n%08X:%08X", address,value);
+                        address += 4;
+                        for (j = 1; j < 8; j++)
+                        {
+                            if(SSV_REG_READ1(ssv6xxx_debug_ifops, address, &value));
+                            printk(" %08X", value);
+                            address += 4;
+                        }
+                    }
+                    printk("\n");
+                }
+            }
+        }
+    }
+    return 0;
+}
+struct ssv_cmd_table cmd_table[] = {
+    { "help", ssv_cmd_help, "ssv6200 command usage." },
+    { "-h", ssv_cmd_help, "ssv6200 command usage." },
+    { "--help", ssv_cmd_help, "ssv6200 command usage." },
+    { "reg", ssv_cmd_reg, "ssv6200 register read/write." },
+    { "cfg", ssv_cmd_cfg, "ssv6200 configuration." },
+    { "sta", ssv_cmd_sta, "svv6200 station info." },
+    { "dump", ssv_cmd_dump, "dump ssv6200 tables." },
+    { "hwq", ssv_cmd_hwq, "hardware queue staus" },
+#ifdef CONFIG_P2P_NOA
+ { "noa", ssv_cmd_noa, "config noa param" },
+#endif
+ { "irq", ssv_cmd_irq, "get sdio irq status." },
+    { "mac", ssv_cmd_mac, "ieee80211 swmac." },
+    { "hci", ssv_cmd_hci, "HCI command." },
+    { "sdio", ssv_cmd_sdio, "SDIO command." },
+#ifdef CONFIG_SSV_CABRIO_E
+    { "iqk", ssv_cmd_iqk, "iqk command" },
+#endif
+    { "version",ssv_cmd_version,"version information" },
+    { "mib", ssv_cmd_mib, "mib counter related" },
+    { "tool", ssv_cmd_tool, "ssv6200 tool register read/write." },
+    { "rxtput", ssv_cmd_rxtput, "test rx sdio throughput" },
+    { "txtput", ssv_cmd_txtput, "test tx sdio throughput" },
+    { "check", ssv_cmd_check, "dump all allocate packet buffer" },
+    { NULL, NULL, NULL },
+};
+int ssv_cmd_submit(char *cmd)
+{
+    struct ssv_cmd_table *sc_tbl;
+    char *pch, ch;
+    int ret;
+    ssv6xxx_debug_ifops = (void *)ssv6xxx_ifdebug_info;
+    strcpy(sg_cmd_buffer, cmd);
+    for( sg_argc=0,ch=0, pch=sg_cmd_buffer;
+        (*pch!=0x00)&&(sg_argc<CLI_ARG_SIZE); pch++ )
+    {
+        if ( (ch==0) && (*pch!=' ') )
+        {
+            ch = 1;
+            sg_argv[sg_argc] = pch;
+        }
+        if ( (ch==1) && (*pch==' ') )
+        {
+            *pch = 0x00;
+            ch = 0;
+            sg_argc ++;
+        }
+    }
+    if ( ch == 1)
+    {
+        sg_argc ++;
+    }
+    else if ( sg_argc > 0 )
+    {
+        *(pch-1) = ' ';
+    }
+    if ( sg_argc > 0 )
+    {
+        for( sc_tbl=cmd_table; sc_tbl->cmd; sc_tbl ++ )
+        {
+            if ( !strcmp(sg_argv[0], sc_tbl->cmd) )
+            {
+    if( (sc_tbl->cmd_func_ptr != ssv_cmd_cfg) &&
+     (!ssv6xxx_debug_ifops->dev||
+     !ssv6xxx_debug_ifops->ifops||
+     !ssv6xxx_debug_ifops->pdev))
+    {
+     strcpy(ssv6xxx_result_buf, "Member of ssv6xxx_ifdebug_info is NULL !\n");
+     return -1;
+    }
+                ssv6xxx_result_buf[0] = 0x00;
+                ret = sc_tbl->cmd_func_ptr(sg_argc, sg_argv);
+                if (ret < 0) {
+                    strcpy(ssv6xxx_result_buf, "Invalid command !\n");
+                }
+                return 0;
+            }
+        }
+     strcpy(ssv6xxx_result_buf, "Command not found !\n");
+    }
+    else
+    {
+        strcpy(ssv6xxx_result_buf, "./cli -h\n");
+    }
+    return 0;
+}
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.h b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.h
new file mode 100644
index 0000000000000..68468b62e68c2
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SSV_CMD_H_
+#define _SSV_CMD_H_ 
+#define CLI_BUFFER_SIZE 256
+#define CLI_ARG_SIZE 10
+#define CLI_RESULT_BUF_SIZE (4096)
+#define DEBUG_DIR_ENTRY "ssv"
+#define DEBUG_DEVICETYPE_ENTRY "ssv_devicetype"
+#define DEBUG_CMD_ENTRY "ssv_cmd"
+#define MAX_CHARS_PER_LINE 256
+struct ssv_cmd_table {
+    const char *cmd;
+    int (*cmd_func_ptr)(int, char **);
+    const char *usage;
+};
+struct ssv6xxx_cfg_cmd_table {
+    u8 *cfg_cmd;
+    void *var;
+    u32 arg;
+    int (*translate_func)(u8 *, void *, u32);
+};
+#define SSV_REG_READ1(ops,reg,val) \
+        (ops)->ifops->readreg((ops)->dev, reg, val)
+#define SSV_REG_WRITE1(ops,reg,val) \
+        (ops)->ifops->writereg((ops)->dev, reg, val)
+#define SSV_REG_SET_BITS1(ops,reg,set,clr) \
+    { \
+        u32 reg_val; \
+        SSV_REG_READ(ops, reg, &reg_val); \
+        reg_val &= ~(clr); \
+        reg_val |= (set); \
+        SSV_REG_WRITE(ops, reg, reg_val); \
+    }
+int ssv_cmd_submit(char *cmd);
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssvdevice.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssvdevice.c
new file mode 100644
index 0000000000000..d94a5f501ebbf
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssvdevice.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/proc_fs.h>
+#include <asm/uaccess.h>
+#include <linux/errno.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+#include "ssv_cmd.h"
+#include "ssv_cfg.h"
+#include <linux/fs.h>
+#include <asm/segment.h>
+#include <asm/uaccess.h>
+#include <linux/buffer_head.h>
+#include <linux/ctype.h>
+MODULE_AUTHOR("iComm Semiconductor Co., Ltd");
+MODULE_DESCRIPTION("Shared library for SSV wireless LAN cards.");
+MODULE_LICENSE("Dual BSD/GPL");
+static char *stacfgpath = NULL;
+EXPORT_SYMBOL(stacfgpath);
+module_param(stacfgpath, charp, 0000);
+MODULE_PARM_DESC(stacfgpath, "Get path of sta cfg");
+char *cfgfirmwarepath = NULL;
+EXPORT_SYMBOL(cfgfirmwarepath);
+module_param(cfgfirmwarepath, charp, 0000);
+MODULE_PARM_DESC(cfgfirmwarepath, "Get firmware path");
+char* ssv_initmac = NULL;
+EXPORT_SYMBOL(ssv_initmac);
+module_param(ssv_initmac, charp, 0644);
+MODULE_PARM_DESC(ssv_initmac, "Wi-Fi MAC address");
+u32 ssv_devicetype = 0;
+EXPORT_SYMBOL(ssv_devicetype);
+#ifdef CONFIG_DEBUG_FS
+static struct dentry *debugfs;
+#endif
+struct proc_dir_entry *procfs;
+static char *ssv6xxx_cmd_buf;
+char *ssv6xxx_result_buf;
+extern struct ssv6xxx_cfg_cmd_table cfg_cmds[];
+extern struct ssv6xxx_cfg ssv_cfg;
+char DEFAULT_CFG_PATH[] = "/vendor/etc/firmware/ssv6051-wifi.cfg";
+static int ssv6xxx_dbg_open(struct inode *inode, struct file *filp)
+{
+    filp->private_data = inode->i_private;
+    return 0;
+}
+static ssize_t ssv6xxx_dbg_read(struct file *filp, char __user *buffer,
+                size_t count, loff_t *ppos)
+{
+    int len;
+    if (*ppos != 0)
+        return 0;
+    len = strlen(ssv6xxx_result_buf) + 1;
+    if (len == 1)
+        return 0;
+    if (copy_to_user(buffer, ssv6xxx_result_buf, len))
+        return -EFAULT;
+    ssv6xxx_result_buf[0] = 0x00;
+    return len;
+}
+static ssize_t ssv6xxx_dbg_write(struct file *filp, const char __user *buffer,
+                size_t count, loff_t *ppos)
+{
+    if (*ppos != 0 || count > 255)
+        return 0;
+    if (copy_from_user(ssv6xxx_cmd_buf, buffer, count))
+        return -EFAULT;
+    ssv6xxx_cmd_buf[count-1] = 0x00;
+    ssv_cmd_submit(ssv6xxx_cmd_buf);
+    return count;
+}
+size_t read_line(struct file *fp, char *buf, size_t size)
+{
+ size_t num_read = 0;
+ size_t total_read = 0;
+ char *buffer;
+ char ch;
+ size_t start_ignore = 0;
+ if (size <= 0 || buf == NULL) {
+  total_read = -EINVAL;
+  return -EINVAL;
+ }
+ buffer = buf;
+ for (;;) {
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,37)
+  if (fp->f_op && fp->f_op->read)
+   num_read = fp->f_op->read(fp, &ch, 1, &fp->f_pos);
+#else
+  num_read = vfs_read(fp, &ch, 1, &fp->f_pos);
+#endif
+  if (num_read < 0) {
+   if (num_read == EINTR)
+    continue;
+   else
+    return -1;
+  }
+  else if (num_read == 0) {
+   if (total_read == 0)
+    return 0;
+   else
+    break;
+  }
+  else {
+   if (ch == '#')
+    start_ignore = 1;
+   if (total_read < size - 1) {
+    total_read++;
+    if (start_ignore)
+     *buffer++ = '\0';
+    else
+     *buffer++ = ch;
+   }
+   if (ch == '\n')
+    break;
+  }
+ }
+ *buffer = '\0';
+ return total_read;
+}
+int ischar(char *c)
+{
+ int is_char = 1;
+ while(*c) {
+  if (isalpha(*c) || isdigit(*c) || *c == '_' || *c == ':' || *c == '/' || *c == '.' || *c == '-')
+   c++;
+  else {
+   is_char = 0;
+   break;
+  }
+ }
+ return is_char;
+}
+void sta_cfg_set(char *stacfgpath)
+{
+ struct file *fp = (struct file *) NULL;
+ char buf[MAX_CHARS_PER_LINE], cfg_cmd[32], cfg_value[32];
+ mm_segment_t fs;
+ size_t s, read_len = 0, is_cmd_support = 0;
+ printk("\n*** %s, %s ***\n\n", __func__, stacfgpath);
+    if (stacfgpath == NULL) {
+        stacfgpath = DEFAULT_CFG_PATH;
+        printk("redirect to %s\n", stacfgpath);
+    }
+ memset(&ssv_cfg, 0, sizeof(ssv_cfg));
+ memset(buf, 0, sizeof(buf));
+ fp = filp_open(stacfgpath, O_RDONLY, 0);
+ if (IS_ERR(fp) || fp == NULL) {
+  printk("ERROR: filp_open\n");
+        WARN_ON(1);
+  return;
+ }
+ if (fp->f_path.dentry == NULL) {
+  printk("ERROR: dentry NULL\n");
+        WARN_ON(1);
+  return;
+ }
+ do {
+  memset(cfg_cmd, '\0', sizeof(cfg_cmd));
+  memset(cfg_value, '\0', sizeof(cfg_value));
+  fs = get_fs();
+  set_fs(get_ds());
+  read_len = read_line(fp, buf, MAX_CHARS_PER_LINE);
+  set_fs(fs);
+  sscanf(buf, "%s = %s", cfg_cmd, cfg_value);
+  if (!ischar(cfg_cmd) || !ischar(cfg_value)) {
+   printk("ERORR invalid parameter: %s\n", buf);
+   WARN_ON(1);
+   continue;
+  }
+  is_cmd_support = 0;
+  for(s=0; cfg_cmds[s].cfg_cmd != NULL; s++) {
+   if (strcmp(cfg_cmds[s].cfg_cmd, cfg_cmd)==0) {
+    cfg_cmds[s].translate_func(cfg_value,
+     cfg_cmds[s].var, cfg_cmds[s].arg);
+    is_cmd_support = 1;
+    break;
+   }
+  }
+  if (!is_cmd_support && strlen(cfg_cmd) > 0) {
+   printk("ERROR Unsupported command: %s", cfg_cmd);
+   WARN_ON(1);
+  }
+ } while (read_len > 0);
+ filp_close(fp, NULL);
+}
+static struct file_operations ssv6xxx_dbg_fops = {
+    .owner = THIS_MODULE,
+    .open = ssv6xxx_dbg_open,
+    .read = ssv6xxx_dbg_read,
+    .write = ssv6xxx_dbg_write,
+};
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+extern int ssv6xxx_hci_init(void);
+extern void ssv6xxx_hci_exit(void);
+extern int ssv6xxx_init(void);
+extern void ssv6xxx_exit(void);
+extern int ssv6xxx_sdio_init(void);
+extern void ssv6xxx_sdio_exit(void);
+#endif
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+int ssvdevice_init(void)
+#else
+static int __init ssvdevice_init(void)
+#endif
+{
+    ssv6xxx_cmd_buf = (char *)kzalloc(CLI_BUFFER_SIZE+CLI_RESULT_BUF_SIZE, GFP_KERNEL);
+    if (!ssv6xxx_cmd_buf)
+        return -ENOMEM;
+    ssv6xxx_result_buf = ssv6xxx_cmd_buf+CLI_BUFFER_SIZE;
+    ssv6xxx_cmd_buf[0] = 0x00;
+    ssv6xxx_result_buf[0] = 0x00;
+#ifdef CONFIG_DEBUG_FS
+    debugfs = debugfs_create_dir(DEBUG_DIR_ENTRY,
+         NULL);
+ if (!debugfs)
+  return -ENOMEM;
+ debugfs_create_u32(DEBUG_DEVICETYPE_ENTRY, S_IRUGO|S_IWUSR, debugfs, &ssv_devicetype);
+    debugfs_create_file(DEBUG_CMD_ENTRY, S_IRUGO|S_IWUSR, debugfs, NULL, &ssv6xxx_dbg_fops);
+#endif
+ procfs = proc_mkdir(DEBUG_DIR_ENTRY, NULL);
+ if (!procfs)
+  return -ENOMEM;
+    proc_create(DEBUG_CMD_ENTRY, S_IRUGO|S_IWUGO, procfs, &ssv6xxx_dbg_fops);
+ sta_cfg_set(stacfgpath);
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+    {
+        int ret;
+        ret = ssv6xxx_hci_init();
+        if(!ret){
+            ret = ssv6xxx_init();
+        }if(!ret){
+            ret = ssv6xxx_sdio_init();
+        }
+        return ret;
+    }
+#endif
+    return 0;
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+void ssvdevice_exit(void)
+#else
+static void __exit ssvdevice_exit(void)
+#endif
+{
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+    ssv6xxx_exit();
+    ssv6xxx_hci_exit();
+    ssv6xxx_sdio_exit();
+#endif
+#ifdef CONFIG_DEBUG_FS
+    debugfs_remove_recursive(debugfs);
+#endif
+ remove_proc_entry(DEBUG_CMD_ENTRY, procfs);
+ remove_proc_entry(DEBUG_DIR_ENTRY, NULL);
+    kfree(ssv6xxx_cmd_buf);
+}
+#if (defined(CONFIG_SSV_SUPPORT_ANDROID)||defined(CONFIG_SSV_BUILD_AS_ONE_KO))
+EXPORT_SYMBOL(ssvdevice_init);
+EXPORT_SYMBOL(ssvdevice_exit);
+#else
+module_init(ssvdevice_init);
+module_exit(ssvdevice_exit);
+module_param_named(devicetype,ssv_devicetype, uint , S_IRUSR | S_IWUSR);
+MODULE_PARM_DESC(devicetype, "Enable sdio bridge Mode/Wifi Mode.");
+#endif
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ver_info.pl b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ver_info.pl
new file mode 100644
index 0000000000000..d08689182112f
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ver_info.pl
@@ -0,0 +1,85 @@
+#!/usr/bin/perl
+use strict;
+
+my @tmp_string;
+my $svn_status;
+my $svn_filename;
+my $svn_version;
+
+my $svn_root = ".";
+my $svn_root_version;
+my $svn_root_url;
+
+my @header_defines = (
+    "#ifndef _SSV_VERSION_H_",
+    "#define _SSV_VERSION_H_",
+    "",
+);
+
+sub get_version {
+    foreach (@_) {
+        if($_ =~ m/^Last Changed Rev: (\d*)/) {
+            return $1;
+        }
+    } 
+    # file doesn't exist on svn
+    return -1;
+}
+
+sub get_url {
+    foreach (@_) {
+        if($_ =~ m/^URL: (.*)/) {
+            return $1;
+        }
+    } 
+    # file doesn't exist on svn
+    return -1;
+}
+
+printf("## script to generate version infomation header ##\n");
+
+# step-0: get root svn number 
+$svn_root_version = get_version(qx(svn info $svn_root));
+
+if ($svn_root_version == -1) {
+    exit 0;
+}
+
+# step-1: get root svn url 
+$svn_root_url = get_url(qx(svn info $svn_root));
+
+OUTPUT_HEADER:
+# step-3: output header files
+if (defined($ARGV[0])) {
+    open HEADER, ">", $ARGV[0];
+    select HEADER;
+}
+else {
+    print "Error! Please specify header file\n";
+}
+
+
+foreach (@header_defines) {
+    printf("%s\n", $_);
+}
+
+##
+printf("static u32 ssv_root_version = %d;\n\n", $svn_root_version);
+printf("#define SSV_ROOT_URl \"$svn_root_url\"\n");
+
+use Sys::Hostname;
+my $host = hostname();
+printf("#define COMPILERHOST \"$host\"\n");
+
+use POSIX qw(strftime);
+my $date = strftime "%m-%d-%Y-%H:%M:%S", localtime;
+printf("#define COMPILERDATE \"$date\"\n");
+##
+
+use Config;
+printf("#define COMPILEROS \"$Config{osname}\"\n");
+printf("#define COMPILEROSARCH \"$Config{archname}\"\n");
+
+printf("\n#endif\n\n");
+
+exit 1;
diff --git a/drivers/net/wireless/rockchip_wlan/wifi_sys/rkwifi_sys_iface.c b/drivers/net/wireless/rockchip_wlan/wifi_sys/rkwifi_sys_iface.c
index f79fe447ce1f2..d7871ba4a0821 100644
--- a/drivers/net/wireless/rockchip_wlan/wifi_sys/rkwifi_sys_iface.c
+++ b/drivers/net/wireless/rockchip_wlan/wifi_sys/rkwifi_sys_iface.c
@@ -138,6 +138,10 @@ static ssize_t wifi_chip_read(struct class *cls, struct class_attribute *attr, c
 	    printk("Current WiFi chip is ESP8089.\n");
 	}
 
+        if(type == WIFI_SSV6051) {
+            count = sprintf(_buf, "%s", "SSV6051");
+            printk("Current WiFi chip is SSV6051.\n");
+        }
     return count;
 }
 
diff --git a/include/linux/rfkill-wlan.h b/include/linux/rfkill-wlan.h
index 85188c4ad9c18..92f9522bef74a 100644
--- a/include/linux/rfkill-wlan.h
+++ b/include/linux/rfkill-wlan.h
@@ -74,6 +74,7 @@ enum {
     WIFI_RTL_SERIES,
     WIFI_ESP8089,
     WIFI_MVL88W8977,
+    WIFI_SSV6051,
     TYPE_MAX,
 };
 
diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c
index 07c1c7c453508..f8ee30532b8c9 100644
--- a/net/rfkill/rfkill-wlan.c
+++ b/net/rfkill/rfkill-wlan.c
@@ -158,6 +158,8 @@ int get_wifi_chip_type(void)
         type = WIFI_ESP8089;
     } else if (strcmp(wifi_chip_type_string, "mvl88w8977") == 0) {
         type = WIFI_MVL88W8977;
+    } else if (strcmp(wifi_chip_type_string, "ssv6051") == 0) {
+        type = WIFI_SSV6051;
     } else {
         type = WIFI_AP6210;
     }

From 346f1b2ffcd4161a0ab5a757e5929b0da8584fc8 Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Wed, 12 Oct 2016 20:31:41 +0800
Subject: [PATCH 0659/1852] UPSTREAM: clk: rockchip: don't return NULL when
 failing to register ddrclk branch

rockchip_clk_register_ddrclk should not return NULL when failing
to call clk_register, otherwise rockchip_clk_register_branches
prints "unknown clock type". The actual case is that it's a known
clock type but we fail to register it, which may makes user confuse
the reason of failure. And the pr_err here is pointless as
rockchip_clk_register_branches will also print the similar message.

Change-Id: Id09f496979ab839d04b5ec4cf5c623fde9215440
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 4a262b14c57d6ec88982d40273e742f7b9151560)
---
 drivers/clk/rockchip/clk-ddr.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-ddr.c b/drivers/clk/rockchip/clk-ddr.c
index 90d40388bb9b5..4e0e3e505d044 100644
--- a/drivers/clk/rockchip/clk-ddr.c
+++ b/drivers/clk/rockchip/clk-ddr.c
@@ -366,11 +366,8 @@ rockchip_clk_register_ddrclk(const char *name, int flags,
 	ddrclk->ddr_flag = ddr_flag;
 
 	clk = clk_register(NULL, &ddrclk->hw);
-	if (IS_ERR(clk)) {
-		pr_err("%s: could not register ddrclk %s\n", __func__,	name);
+	if (IS_ERR(clk))
 		kfree(ddrclk);
-		return NULL;
-	}
 
 	return clk;
 }

From 23ed1b357519e0608c9a1d1bc407b1b2c8f5c49b Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 27 Jun 2018 17:06:04 +0800
Subject: [PATCH 0660/1852] media: soc_camera: add
 "rockchip,pwr-2nd-gpio"/"rockchip,pwr-3rd-gpio"

Change-Id: I742f85643f6c324b0ef1a9f55b15f73787eaaa1d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../soc_camera/rockchip/rk_camera_module.c    | 58 +++++++++++++++----
 1 file changed, 48 insertions(+), 10 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
index dccfd4fd916ac..18f44a0737a8b 100644
--- a/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
+++ b/drivers/media/i2c/soc_camera/rockchip/rk_camera_module.c
@@ -40,6 +40,8 @@
 
 #define OF_OV_GPIO_PD "rockchip,pd-gpio"
 #define OF_OV_GPIO_PWR "rockchip,pwr-gpio"
+#define OF_OV_GPIO_PWR_2ND "rockchip,pwr-2nd-gpio"
+#define OF_OV_GPIO_PWR_3RD "rockchip,pwr-3rd-gpio"
 #define OF_OV_GPIO_FLASH "rockchip,flash-gpio"
 #define OF_OV_GPIO_TORCH "rockchip,torch-gpio"
 #define OF_OV_GPIO_RESET "rockchip,rst-gpio"
@@ -73,6 +75,8 @@
 
 const char *PLTFRM_CAMERA_MODULE_PIN_PD = OF_OV_GPIO_PD;
 const char *PLTFRM_CAMERA_MODULE_PIN_PWR = OF_OV_GPIO_PWR;
+const char *PLTFRM_CAMERA_MODULE_PIN_PWR_2ND = OF_OV_GPIO_PWR_2ND;
+const char *PLTFRM_CAMERA_MODULE_PIN_PWR_3RD = OF_OV_GPIO_PWR_3RD;
 const char *PLTFRM_CAMERA_MODULE_PIN_FLASH = OF_OV_GPIO_FLASH;
 const char *PLTFRM_CAMERA_MODULE_PIN_TORCH = OF_OV_GPIO_TORCH;
 const char *PLTFRM_CAMERA_MODULE_PIN_RESET = OF_OV_GPIO_RESET;
@@ -152,7 +156,7 @@ struct pltfrm_camera_module_itf {
 };
 
 struct pltfrm_camera_module_data {
-	struct pltfrm_camera_module_gpio gpios[6];
+	struct pltfrm_camera_module_gpio gpios[8];
 	struct pinctrl *pinctrl;
 	struct pinctrl_state *pins_default;
 	struct pinctrl_state *pins_sleep;
@@ -475,33 +479,47 @@ static struct pltfrm_camera_module_data *pltfrm_camera_module_get_data(
 		0,
 		&pdata->gpios[1].active_low);
 
-	pdata->gpios[2].label = PLTFRM_CAMERA_MODULE_PIN_FLASH;
+	pdata->gpios[2].label = PLTFRM_CAMERA_MODULE_PIN_PWR_2ND;
 	pdata->gpios[2].pltfrm_gpio = of_get_named_gpio_flags(
 		np,
 		pdata->gpios[2].label,
 		0,
 		&pdata->gpios[2].active_low);
 
-	/*set fl_ctrl  flash reference*/
-	pdata->fl_ctrl.fl_flash = &pdata->gpios[2];
-
-	pdata->gpios[3].label = PLTFRM_CAMERA_MODULE_PIN_TORCH;
+	pdata->gpios[3].label = PLTFRM_CAMERA_MODULE_PIN_PWR_3RD;
 	pdata->gpios[3].pltfrm_gpio = of_get_named_gpio_flags(
 		np,
 		pdata->gpios[3].label,
 		0,
 		&pdata->gpios[3].active_low);
 
-	/*set fl_ctrl torch reference*/
-	pdata->fl_ctrl.fl_torch = &pdata->gpios[3];
-
-	pdata->gpios[4].label = PLTFRM_CAMERA_MODULE_PIN_RESET;
+	pdata->gpios[4].label = PLTFRM_CAMERA_MODULE_PIN_FLASH;
 	pdata->gpios[4].pltfrm_gpio = of_get_named_gpio_flags(
 		np,
 		pdata->gpios[4].label,
 		0,
 		&pdata->gpios[4].active_low);
 
+	/*set fl_ctrl  flash reference*/
+	pdata->fl_ctrl.fl_flash = &pdata->gpios[4];
+
+	pdata->gpios[5].label = PLTFRM_CAMERA_MODULE_PIN_TORCH;
+	pdata->gpios[5].pltfrm_gpio = of_get_named_gpio_flags(
+		np,
+		pdata->gpios[5].label,
+		0,
+		&pdata->gpios[5].active_low);
+
+	/*set fl_ctrl torch reference*/
+	pdata->fl_ctrl.fl_torch = &pdata->gpios[5];
+
+	pdata->gpios[6].label = PLTFRM_CAMERA_MODULE_PIN_RESET;
+	pdata->gpios[6].pltfrm_gpio = of_get_named_gpio_flags(
+		np,
+		pdata->gpios[6].label,
+		0,
+		&pdata->gpios[6].active_low);
+
 	ret = of_property_read_string(np, OF_CAMERA_MODULE_NAME,
 			&pdata->info.module_name);
 	ret |= of_property_read_string(np, OF_CAMERA_MODULE_LEN_NAME,
@@ -1424,6 +1442,16 @@ int pltfrm_camera_module_set_pm_state(
 			PLTFRM_CAMERA_MODULE_PIN_PWR,
 			PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
 
+		pltfrm_camera_module_set_pin_state(
+			sd,
+			PLTFRM_CAMERA_MODULE_PIN_PWR_2ND,
+			PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+
+		pltfrm_camera_module_set_pin_state(
+			sd,
+			PLTFRM_CAMERA_MODULE_PIN_PWR_3RD,
+			PLTFRM_CAMERA_MODULE_PIN_STATE_ACTIVE);
+
 		pltfrm_camera_module_set_pin_state(
 			sd,
 			PLTFRM_CAMERA_MODULE_PIN_RESET,
@@ -1456,6 +1484,16 @@ int pltfrm_camera_module_set_pm_state(
 	} else {
 		clk_disable_unprepare(pdata->mclk);
 
+		pltfrm_camera_module_set_pin_state(
+			sd,
+			PLTFRM_CAMERA_MODULE_PIN_PWR_3RD,
+			PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+
+		pltfrm_camera_module_set_pin_state(
+			sd,
+			PLTFRM_CAMERA_MODULE_PIN_PWR_2ND,
+			PLTFRM_CAMERA_MODULE_PIN_STATE_INACTIVE);
+
 		pltfrm_camera_module_set_pin_state(
 			sd,
 			PLTFRM_CAMERA_MODULE_PIN_PWR,

From 6d36ba820fa76d08560c7bc3ff92b8dd037bed95 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Sat, 20 Jun 2015 16:06:02 +0200
Subject: [PATCH 0661/1852] UPSTREAM: clk: rockchip: convert manually created
 factor clocks to the new type

Clean up the init code and move the creation of factor clocks to the
appropriate positions coming from the clock architecture diagrams.

This also unifies the artificial separation of the hclk_vcodec etc clocks
again.

We do keep the separate definition of some watchdog and usb480m pseudo
clocks for now, as they're not real factor clocks from the clock-tree
but placeholders for fixes to come (usb480m gets supplied by the
missing driver for the new usbphy type and the watchdog-gate is sitting
somewhere else together which we cannot model currently).

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 36714529f8bbd4f8eaf93b50f4a64c52a24879aa)

Change-Id: I43b579b4d0b16b191e220a1748b6d11c7a30b4be
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3036.c | 31 ++++++-------------------------
 drivers/clk/rockchip/clk-rk3188.c |  9 ++-------
 drivers/clk/rockchip/clk-rk3228.c |  4 ++++
 drivers/clk/rockchip/clk-rk3288.c | 22 +++++-----------------
 drivers/clk/rockchip/clk-rk3368.c | 28 ++++++----------------------
 5 files changed, 23 insertions(+), 71 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 9685228b20a67..39ee1add918da 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -185,6 +185,8 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 	GATE(0, "gpll_armclk", "gpll", CLK_IGNORE_UNUSED,
 			RK2928_CLKGATE_CON(0), 6, GFLAGS),
 
+	FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
+
 	/*
 	 * Clock-Architecture Diagram 2
 	 */
@@ -195,6 +197,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 			RK2928_CLKGATE_CON(0), 8, GFLAGS),
 	COMPOSITE_NOGATE(0, "ddrphy2x", mux_ddrphy_p, CLK_IGNORE_UNUSED,
 			RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
+	FACTOR(0, "ddrphy", "ddrphy2x", 0, 1, 2),
 
 	COMPOSITE_NOMUX(0, "pclk_dbg", "armclk", CLK_IGNORE_UNUSED,
 			RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
@@ -271,6 +274,8 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 	COMPOSITE(ACLK_VCODEC, "aclk_vcodec", mux_pll_src_dmyapll_dpll_gpll_p, 0,
 			RK2928_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
 			RK2928_CLKGATE_CON(3), 11, GFLAGS),
+	FACTOR_GATE(HCLK_VCODEC, "hclk_vcodec", "aclk_vcodec", 0, 1, 4,
+			RK2928_CLKGATE_CON(3), 12, GFLAGS),
 
 	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_dmyapll_dpll_gpll_p, 0,
 			RK2928_CLKSEL_CON(20), 0, 2, MFLAGS, 2, 5, DFLAGS,
@@ -359,6 +364,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 	COMPOSITE_NOMUX(SCLK_MAC, "mac_clk", "mac_clk_ref", 0,
 			RK2928_CLKSEL_CON(21), 4, 5, DFLAGS,
 			RK2928_CLKGATE_CON(2), 6, GFLAGS),
+	FACTOR(0, "sclk_macref_out", "hclk_peri_src", 0, 1, 2),
 
 	MUX(SCLK_HDMI, "dclk_hdmi", mux_dclk_p, 0,
 			RK2928_CLKSEL_CON(31), 0, 1, MFLAGS),
@@ -387,8 +393,6 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 	GATE(HCLK_VIO_BUS, "hclk_vio_bus", "hclk_disp_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(6), 12, GFLAGS),
 	GATE(HCLK_LCDC, "hclk_lcdc", "hclk_disp_pre", 0, RK2928_CLKGATE_CON(9), 5, GFLAGS),
 
-	/* hclk_video gates */
-	GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_vcodec_pre", 0, RK2928_CLKGATE_CON(3), 12, GFLAGS),
 
 	/* xin24m gates */
 	GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK2928_CLKGATE_CON(10), 0, GFLAGS),
@@ -467,34 +471,11 @@ static void __init rk3036_clk_init(struct device_node *np)
 		return;
 	}
 
-	/* xin12m is created by an cru-internal divider */
-	clk = clk_register_fixed_factor(NULL, "xin12m", "xin24m", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock xin12m: %ld\n",
-			__func__, PTR_ERR(clk));
-
 	clk = clk_register_fixed_factor(NULL, "usb480m", "xin24m", 0, 20, 1);
 	if (IS_ERR(clk))
 		pr_warn("%s: could not register clock usb480m: %ld\n",
 			__func__, PTR_ERR(clk));
 
-	clk = clk_register_fixed_factor(NULL, "ddrphy", "ddrphy2x", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock ddrphy: %ld\n",
-			__func__, PTR_ERR(clk));
-
-	clk = clk_register_fixed_factor(NULL, "hclk_vcodec_pre",
-					"aclk_vcodec", 0, 1, 4);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock hclk_vcodec_pre: %ld\n",
-			__func__, PTR_ERR(clk));
-
-	clk = clk_register_fixed_factor(NULL, "sclk_macref_out",
-					"hclk_peri_src", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock sclk_macref_out: %ld\n",
-			__func__, PTR_ERR(clk));
-
 	rockchip_clk_register_plls(ctx, rk3036_pll_clks,
 				   ARRAY_SIZE(rk3036_pll_clks),
 				   RK3036_GRF_SOC_STATUS0);
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 271630ed7effb..56a1ba236ddf0 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -345,6 +345,8 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
 	INVERTER(PCLK_CIF0, "pclk_cif0", "pclkin_cif0",
 			RK2928_CLKSEL_CON(30), 8, IFLAGS),
 
+	FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
+
 	/*
 	 * the 480m are generated inside the usb block from these clocks,
 	 * but they are also a source for the hsicphy clock.
@@ -763,7 +765,6 @@ static struct rockchip_clk_provider *__init rk3188_common_clk_init(struct device
 {
 	struct rockchip_clk_provider *ctx;
 	void __iomem *reg_base;
-	struct clk *clk;
 
 	reg_base = of_iomap(np, 0);
 	if (!reg_base) {
@@ -778,12 +779,6 @@ static struct rockchip_clk_provider *__init rk3188_common_clk_init(struct device
 		return ERR_PTR(-ENOMEM);
 	}
 
-	/* xin12m is created by an cru-internal divider */
-	clk = clk_register_fixed_factor(NULL, "xin12m", "xin24m", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock xin12m: %ld\n",
-			__func__, PTR_ERR(clk));
-
 	rockchip_clk_register_branches(ctx, common_clk_branches,
 				  ARRAY_SIZE(common_clk_branches));
 
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index d2e91ea853c96..885d35a0d3910 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -228,6 +228,10 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
 	FACTOR(0, "clk_ddrphy", "clk_ddrc", 0, 1, 4),
 	GATE(0, "ddrphy4x", "clk_ddrc", CLK_IGNORE_UNUSED,
 			RK2928_CLKGATE_CON(7), 1, GFLAGS),
+	GATE(0, "ddrc", "ddrphy_pre", CLK_IGNORE_UNUSED,
+			RK2928_CLKGATE_CON(8), 5, GFLAGS),
+	FACTOR_GATE(0, "ddrphy", "ddrphy4x", CLK_IGNORE_UNUSED, 1, 4,
+			RK2928_CLKGATE_CON(7), 0, GFLAGS),
 
 	/* PD_CORE */
 	GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index d0ac6fa7738c0..ca6c2ad3de96e 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -340,6 +340,8 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
 			RK3288_CLKGATE_CON(0), 7, GFLAGS),
 
+	FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
+
 	COMPOSITE(SCLK_I2S_SRC, "i2s_src", mux_pll_src_cpll_gpll_p, 0,
 			RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3288_CLKGATE_CON(4), 1, GFLAGS),
@@ -406,12 +408,10 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 	 */
 	GATE(ACLK_VCODEC, "aclk_vcodec", "aclk_vdpu", 0,
 		RK3288_CLKGATE_CON(9), 0, GFLAGS),
-	/*
-	 * We introduce a virtul node of hclk_vodec_pre_v to split one clock
-	 * struct with a gate and a fix divider into two node in software.
-	 */
-	GATE(0, "hclk_vcodec_pre_v", "aclk_vdpu", 0,
+
+	FACTOR_GATE(0, "hclk_vcodec_pre", "aclk_vdpu", 0, 1, 4,
 		RK3288_CLKGATE_CON(3), 10, GFLAGS),
+
 	GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_vcodec_pre", 0,
 		RK3288_CLKGATE_CON(9), 1, GFLAGS),
 
@@ -917,18 +917,6 @@ static void __init rk3288_clk_init(struct device_node *np)
 		return;
 	}
 
-	/* xin12m is created by an cru-internal divider */
-	clk = clk_register_fixed_factor(NULL, "xin12m", "xin24m", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock xin12m: %ld\n",
-			__func__, PTR_ERR(clk));
-
-	clk = clk_register_fixed_factor(NULL, "hclk_vcodec_pre",
-					"hclk_vcodec_pre_v", 0, 1, 4);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock hclk_vcodec_pre: %ld\n",
-			__func__, PTR_ERR(clk));
-
 	/* Watchdog pclk is controlled by RK3288_SGRF_SOC_CON0[1]. */
 	clk = clk_register_fixed_factor(NULL, "pclk_wdt", "pclk_pd_alive", 0, 1, 1);
 	if (IS_ERR(clk))
diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index ad96b42032099..86238e6c73718 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -308,6 +308,8 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 	 * Clock-Architecture Diagram 2
 	 */
 
+	FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
+
 	MUX(SCLK_USBPHY480M, "usbphy_480m", mux_usbphy480m_p, CLK_SET_RATE_PARENT,
 			RK3368_CLKSEL_CON(13), 8, 1, MFLAGS),
 
@@ -362,7 +364,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 	COMPOSITE_NOGATE_DIVTBL(0, "ddrphy_src", mux_ddrphy_p, CLK_IGNORE_UNUSED,
 			RK3368_CLKSEL_CON(13), 4, 1, MFLAGS, 0, 2, DFLAGS, div_ddrphy_t),
 
-	GATE(0, "sclk_ddr", "ddrphy_div4", CLK_IGNORE_UNUSED,
+	FACTOR_GATE(0, "sclk_ddr", "ddrphy_src", CLK_IGNORE_UNUSED, 1, 4,
 			RK3368_CLKGATE_CON(6), 14, GFLAGS),
 	GATE(0, "sclk_ddr4x", "ddrphy_src", CLK_IGNORE_UNUSED,
 			RK3368_CLKGATE_CON(6), 15, GFLAGS),
@@ -454,10 +456,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 			RK3368_CLKGATE_CON(4), 7, GFLAGS),
 
 	/*
-	 * We introduce a virtual node of hclk_vodec_pre_v to split one clock
-	 * struct with a gate and a fix divider into two node in software.
+	 * We use aclk_vdpu by default ---GRF_SOC_CON0[7] setting in system,
+	 * so we ignore the mux and make clocks nodes as following,
 	 */
-	GATE(0, "hclk_video_pre_v", "aclk_vdpu", 0,
+	FACTOR_GATE(0, "hclk_video_pre", "aclk_vdpu", 0, 1, 4,
 		RK3368_CLKGATE_CON(4), 8, GFLAGS),
 
 	COMPOSITE(0, "sclk_hevc_cabac_src", mux_pll_src_cpll_gpll_npll_usb_p, 0,
@@ -913,24 +915,6 @@ static void __init rk3368_clk_init(struct device_node *np)
 		return;
 	}
 
-	/* xin12m is created by a cru-internal divider */
-	clk = clk_register_fixed_factor(NULL, "xin12m", "xin24m", 0, 1, 2);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock xin12m: %ld\n",
-			__func__, PTR_ERR(clk));
-
-	/* ddrphy_div4 is created by a cru-internal divider */
-	clk = clk_register_fixed_factor(NULL, "ddrphy_div4", "ddrphy_src", 0, 1, 4);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock xin12m: %ld\n",
-			__func__, PTR_ERR(clk));
-
-	clk = clk_register_fixed_factor(NULL, "hclk_video_pre",
-					"hclk_video_pre_v", 0, 1, 4);
-	if (IS_ERR(clk))
-		pr_warn("%s: could not register clock hclk_vcodec_pre: %ld\n",
-			__func__, PTR_ERR(clk));
-
 	/* Watchdog pclk is controlled by sgrf_soc_con3[7]. */
 	clk = clk_register_fixed_factor(NULL, "pclk_wdt", "pclk_pd_alive", 0, 1, 1);
 	if (IS_ERR(clk))

From 974fba2c192aab9ef83d3c1f007043799eb4b24f Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Tue, 24 Jul 2018 15:20:58 +0800
Subject: [PATCH 0662/1852] ARM64: dts: rockchip: reorder some codes

Patch reorder some codes to sync with upstream codes

Change-Id: Iba1971dcee9b5cfb25b62e8bfa2135f0576398e9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d180c6a1e07b1..cb369260b3e7c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -116,8 +116,8 @@
 			reg = <0x0 0x0>;
 			enable-method = "psci";
 			#cooling-cells = <2>; /* min followed by max */
-			dynamic-power-coefficient = <100>;
 			clocks = <&cru ARMCLKL>;
+			dynamic-power-coefficient = <100>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
@@ -154,8 +154,8 @@
 			reg = <0x0 0x100>;
 			enable-method = "psci";
 			#cooling-cells = <2>; /* min followed by max */
-			dynamic-power-coefficient = <436>;
 			clocks = <&cru ARMCLKB>;
+			dynamic-power-coefficient = <436>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
@@ -267,7 +267,6 @@
 	gmac: ethernet@fe300000 {
 		compatible = "rockchip,rk3399-gmac";
 		reg = <0x0 0xfe300000 0x0 0x10000>;
-		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "macirq";
 		clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
@@ -278,9 +277,10 @@
 			      "mac_clk_tx", "clk_mac_ref",
 			      "clk_mac_refout", "aclk_mac",
 			      "pclk_mac";
+		power-domains = <&power RK3399_PD_GMAC>;
 		resets = <&cru SRST_A_GMAC>;
 		reset-names = "stmmaceth";
-		power-domains = <&power RK3399_PD_GMAC>;
+		rockchip,grf = <&grf>;
 		status = "disabled";
 	};
 
@@ -807,19 +807,19 @@
 		compatible = "rockchip,rk3399-tsadc";
 		reg = <0x0 0xff260000 0x0 0x100>;
 		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
-		rockchip,grf = <&grf>;
-		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
-		clock-names = "tsadc", "apb_pclk";
 		assigned-clocks = <&cru SCLK_TSADC>;
 		assigned-clock-rates = <750000>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
 		resets = <&cru SRST_TSADC>;
 		reset-names = "tsadc-apb";
+		rockchip,grf = <&grf>;
+		rockchip,hw-tshut-temp = <120000>;
 		pinctrl-names = "init", "default", "sleep";
 		pinctrl-0 = <&otp_gpio>;
 		pinctrl-1 = <&otp_out>;
 		pinctrl-2 = <&otp_gpio>;
 		#thermal-sensor-cells = <1>;
-		rockchip,hw-tshut-temp = <120000>;
 		status = "disabled";
 	};
 
@@ -1599,7 +1599,6 @@
 	tcphy0: phy@ff7c0000 {
 		compatible = "rockchip,rk3399-typec-phy";
 		reg = <0x0 0xff7c0000 0x0 0x40000>;
-		rockchip,grf = <&grf>;
 		#phy-cells = <1>;
 		clocks = <&cru SCLK_UPHY0_TCPDCORE>,
 			 <&cru SCLK_UPHY0_TCPDPHY_REF>;
@@ -1611,6 +1610,7 @@
 			 <&cru SRST_UPHY0_PIPE_L00>,
 			 <&cru SRST_P_UPHY0_TCPHY>;
 		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+		rockchip,grf = <&grf>;
 		rockchip,typec-conn-dir = <0xe580 0 16>;
 		rockchip,usb3tousb2-en = <0xe580 3 19>;
 		rockchip,usb3-host-disable = <0x2434 0 16>;
@@ -1632,7 +1632,6 @@
 	tcphy1: phy@ff800000 {
 		compatible = "rockchip,rk3399-typec-phy";
 		reg = <0x0 0xff800000 0x0 0x40000>;
-		rockchip,grf = <&grf>;
 		#phy-cells = <1>;
 		clocks = <&cru SCLK_UPHY1_TCPDCORE>,
 			 <&cru SCLK_UPHY1_TCPDPHY_REF>;
@@ -1644,6 +1643,7 @@
 			 <&cru SRST_UPHY1_PIPE_L00>,
 			 <&cru SRST_P_UPHY1_TCPHY>;
 		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+		rockchip,grf = <&grf>;
 		rockchip,typec-conn-dir = <0xe58c 0 16>;
 		rockchip,usb3tousb2-en = <0xe58c 3 19>;
 		rockchip,usb3-host-disable = <0x2444 0 16>;

From 7ee7d7724030e54b0eb2c796685f5c4970fb286b Mon Sep 17 00:00:00 2001
From: Brian Norris <briannorris@chromium.org>
Date: Fri, 23 Jun 2017 10:07:37 -0700
Subject: [PATCH 0663/1852] UPSTREAM: arm64: dts: rockchip: set rk3399 dynamic
 CPU power coefficients

Provide the dynamic power coefficient of the big and little CPU
clusters. These numbers are currently in use on the Samsung Chromebook
Plus ("Kevin").

The power allocator thermal governor doesn't know how to do anything if
it doesn't get power parameters from its cooling devices (in this case,
CPUfreq). So this effectively enables the power-allocator governor.

Signed-off-by: Brian Norris <briannorris@chromium.org>
[set the property in each core node]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(Cherry-picked from f4697bd7021f17ed540c16abafee72be73577826)

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3399.dtsi

Change-Id: I8899a2224fe6cbf6e6f874006bf115eee62b7041
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cb369260b3e7c..550ee28d1ab3b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -117,8 +117,8 @@
 			enable-method = "psci";
 			#cooling-cells = <2>; /* min followed by max */
 			clocks = <&cru ARMCLKL>;
-			dynamic-power-coefficient = <100>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		cpu_l1: cpu@1 {
@@ -128,6 +128,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLKL>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		cpu_l2: cpu@2 {
@@ -137,6 +138,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLKL>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		cpu_l3: cpu@3 {
@@ -146,6 +148,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLKL>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		cpu_b0: cpu@100 {
@@ -155,8 +158,8 @@
 			enable-method = "psci";
 			#cooling-cells = <2>; /* min followed by max */
 			clocks = <&cru ARMCLKB>;
-			dynamic-power-coefficient = <436>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		cpu_b1: cpu@101 {
@@ -166,6 +169,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLKB>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+			dynamic-power-coefficient = <100>;
 		};
 
 		idle-states {

From f7f33241b594727bb3f2360e1b8d5c98fb9d08cb Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Tue, 25 Jul 2017 17:22:55 +0800
Subject: [PATCH 0664/1852] UPSTREAM: arm64: dts: rockchip: update
 dynamic-power-coefficient for rk3399

This patch updates the dynamic-power-coefficient for big cluster on
rk3399 SoCs.

The dynamic power consumption of the CPU is proportional to the square of
the Voltage (V) and the clock frequency (f). The coefficient is used to
calculate the dynamic power as below -
Pdyn = dynamic-power-coefficient * V^2 * f
Where Voltage is in uV, frequency is in MHz.

As the following is the tested data on rk3399's big cluster.
frequency(MHz)  Voltage(V)  Current(mA) Dynamic-power-coefficient
24              0.8         15
48              0.8         23          ~417
96              0.8         40          ~443
216             0.8         82          ~438
312             0.8         115         ~430
408             0.8         150         ~455
So the dynamic-power-coefficient average value is about 436.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3399.dtsi

Change-Id: I05a573eb7e0a74301f35fdeb2517f7fe3be9b8fb
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 550ee28d1ab3b..5a7b70a5203e2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -159,7 +159,7 @@
 			#cooling-cells = <2>; /* min followed by max */
 			clocks = <&cru ARMCLKB>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-			dynamic-power-coefficient = <100>;
+			dynamic-power-coefficient = <436>;
 		};
 
 		cpu_b1: cpu@101 {
@@ -169,7 +169,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLKB>;
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
-			dynamic-power-coefficient = <100>;
+			dynamic-power-coefficient = <436>;
 		};
 
 		idle-states {

From 1eefebf4c678d63d1051a38f6ffd06eb1bd66fe0 Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Tue, 24 Jul 2018 15:56:18 +0800
Subject: [PATCH 0665/1852] ARM64: dts: rockchip: rk3399 efuse node sync with
 upstream

Modify "efuse_id" to "cpu_id"

Change-Id: Iac229325d611c2db86b075eb47d6fe84dbbc0020
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-android-6.0.dtsi    | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-android.dtsi        | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399.dtsi                | 6 +++---
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android-6.0.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android-6.0.dtsi
index f43c56038a615..ede5757e0e033 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-android-6.0.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android-6.0.dtsi
@@ -57,7 +57,7 @@
 
 	cpuinfo {
 		compatible = "rockchip,cpuinfo";
-		nvmem-cells = <&efuse_id>;
+		nvmem-cells = <&cpu_id>;
 		nvmem-cell-names = "id";
 	};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index 3e917c077f79f..b9f5ad1857b62 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -53,7 +53,7 @@
 
 	cpuinfo {
 		compatible = "rockchip,cpuinfo";
-		nvmem-cells = <&efuse_id>;
+		nvmem-cells = <&cpu_id>;
 		nvmem-cell-names = "id";
 	};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
index f2d5c4bfc0283..7cd13371b9a43 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
@@ -59,7 +59,7 @@
 
 	cpuinfo {
 		compatible = "rockchip,cpuinfo";
-		nvmem-cells = <&efuse_id>;
+		nvmem-cells = <&cpu_id>;
 		nvmem-cell-names = "id";
 	};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 5a7b70a5203e2..cf6cea1b5db8c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1439,10 +1439,10 @@
 		clock-names = "pclk_efuse";
 
 		/* Data cells */
-		efuse_id: id@7 {
+		cpu_id: cpu-id@7 {
 			reg = <0x07 0x10>;
 		};
-		cpub_leakage: cpub-leakage@17 {
+		cpub_leakage: cpu-leakage@17 {
 			reg = <0x17 0x1>;
 		};
 		gpu_leakage: gpu-leakage@18 {
@@ -1451,7 +1451,7 @@
 		center_leakage: center-leakage@19 {
 			reg = <0x19 0x1>;
 		};
-		cpul_leakage: cpul-leakage@1a {
+		cpul_leakage: cpu-leakage@1a {
 			reg = <0x1a 0x1>;
 		};
 		logic_leakage: logic-leakage@1b {

From 72de51942147afa87aebe4328577a3af59ee8b2a Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Tue, 24 Jul 2018 16:05:01 +0800
Subject: [PATCH 0666/1852] ARM64: dts: rockchip: rk3399 sync codes with
 upstream

Change-Id: Idcefe76d4b823593a7f316e0e24d740ead46c7a0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cf6cea1b5db8c..29b3cfe3fd7c0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1774,10 +1774,10 @@
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>, <&cru DCLK_VOP1_DIV>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
+		iommus = <&vopl_mmu>;
+		power-domains = <&power RK3399_PD_VOPL>;
 		resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
 		reset-names = "axi", "ahb", "dclk";
-		power-domains = <&power RK3399_PD_VOPL>;
-		iommus = <&vopl_mmu>;
 		status = "disabled";
 
 		vopl_out: port {
@@ -1966,16 +1966,18 @@
 	hdmi: hdmi@ff940000 {
 		compatible = "rockchip,rk3399-dw-hdmi";
 		reg = <0x0 0xff940000 0x0 0x20000>;
-		reg-io-width = <4>;
-		rockchip,grf = <&grf>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>;
-		power-domains = <&power RK3399_PD_HDCP>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
-		clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>,
-			 <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>,
+		clocks = <&cru PCLK_HDMI_CTRL>,
+			 <&cru SCLK_HDMI_SFR>,
+			 <&cru PLL_VPLL>,
+			 <&cru PCLK_VIO_GRF>,
 			 <&cru SCLK_HDMI_CEC>;
 		clock-names = "iahb", "isfr", "vpll", "grf", "cec";
+		power-domains = <&power RK3399_PD_HDCP>;
+		reg-io-width = <4>;
+		rockchip,grf = <&grf>;
 		status = "disabled";
 
 		ports {
@@ -2001,13 +2003,13 @@
 		clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
 			 <&cru SCLK_DPHY_TX0_CFG>;
 		clock-names = "ref", "pclk", "phy_cfg";
+		power-domains = <&power RK3399_PD_VIO>;
 		resets = <&cru SRST_P_MIPI_DSI0>;
 		reset-names = "apb";
-		power-domains = <&power RK3399_PD_VIO>;
 		rockchip,grf = <&grf>;
+		status = "disabled";
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
 
 		ports {
 			port {
@@ -2034,13 +2036,13 @@
 		clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI1>,
 			 <&cru SCLK_DPHY_TX1RX1_CFG>;
 		clock-names = "ref", "pclk", "phy_cfg";
+		power-domains = <&power RK3399_PD_VIO>;
 		resets = <&cru SRST_P_MIPI_DSI1>;
 		reset-names = "apb";
-		power-domains = <&power RK3399_PD_VIO>;
 		rockchip,grf = <&grf>;
+		status = "disabled";
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
 
 		ports {
 			port {

From 7b5ad2eb065a060f2041244bde572765fae8333d Mon Sep 17 00:00:00 2001
From: huweiguo <hwg@rock-chips.com>
Date: Thu, 26 Jul 2018 08:55:54 +0800
Subject: [PATCH 0667/1852] arm: rockchip_defconfig: add ssv6051

Change-Id: I1746973993b4c8980036e305fcdada1afefe4ddb
Signed-off-by: huweiguo <hwg@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index c69c1a0e1a81f..179a0924ee661 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -319,6 +319,7 @@ CONFIG_RTL8723BS=m
 CONFIG_RTL8723BU=m
 CONFIG_RTL8723CS=m
 CONFIG_RTL8723DS=m
+CONFIG_SSV6051=m
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_KEYRESET=y

From 2ec1927ebcacfbf4e3d3ef1150c8f7861feb443c Mon Sep 17 00:00:00 2001
From: huweiguo <hwg@rock-chips.com>
Date: Thu, 26 Jul 2018 09:05:51 +0800
Subject: [PATCH 0668/1852] arm: dts: rk3128h-box: add ssv6051 wifi

Change-Id: Ice915d2ad532eead129627a410f23ea2f0f290be
Signed-off-by: huweiguo <hwg@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3128h-box.dts b/arch/arm/boot/dts/rk3128h-box.dts
index 0c86a5f5c8339..9c272f8c31bd2 100644
--- a/arch/arm/boot/dts/rk3128h-box.dts
+++ b/arch/arm/boot/dts/rk3128h-box.dts
@@ -238,13 +238,13 @@
 		pinctrl-1 = <&uart11_rts_gpio>;
 		BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
 		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
-		status = "disabled";
+		status = "okay";
 	};
 
 	wireless-wlan {
 		compatible = "wlan-platdata";
 		rockchip,grf = <&grf>;
-		wifi_chip_type = "ap6335";
+		wifi_chip_type = "ssv6051";
 		sdio_vref = <1800>;
 		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
 		status = "okay";
@@ -539,7 +539,7 @@
 	non-removable;
 	ignore-pm-notify;
 	keep-power-in-suspend;
-	max-frequency = <150000000>;
+	max-frequency = <37500000>;
 	supports-sdio;
 };
 

From 595b417a7fc437315a7258dfb9ffaeb534abeb39 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Mon, 30 May 2016 11:12:33 +0900
Subject: [PATCH 0669/1852] UPSTREAM: arm64: dts: drop "arm,amba-bus" in favor
 of "simple-bus" part 2

Tree-wide replacement was done by commit 2ef7d5f342c1 (ARM, ARM64:
dts: drop "arm,amba-bus" in favor of "simple-bus"), but we have some
new users of "arm,amba-bus" at Linux 4.7-rc1.  Eliminate them now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Chanho Min <chanho.min@lge.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
(cherry picked from commit 15b7cc78f0951e418c940d8b3b6a7a3b962b7748)

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/lg/lg1312.dtsi

Change-Id: I249c73ade56946fa0548b9f36889abaa7e77d3df
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 29b3cfe3fd7c0..0f31821d71f31 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -240,7 +240,7 @@
 	};
 
 	amba {
-		compatible = "arm,amba-bus";
+		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;

From 77d0a29de0d4776538aab3c3ccb1d174cd7fdb75 Mon Sep 17 00:00:00 2001
From: Brian Norris <briannorris@chromium.org>
Date: Tue, 4 Oct 2016 11:12:10 -0700
Subject: [PATCH 0670/1852] UPSTREAM: arm64: dts: rockchip: Arch counter
 doesn't tick in system suspend

The "arm,no-tick-in-suspend" property was introduced to note
implementations where the system counter does not quite follow the ARM
specification that it "must be implemented in an always-on power
domain".

Particularly, RK3399's counter stops ticking when we switch from the
24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as
such.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
(cherry picked from commit e6186820a74546ac201a6669ebbee42399583b8b)

Change-Id: Ib1d54426c985235ba0a383012a6e4437a9fae80c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0f31821d71f31..927c67407db9b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -216,6 +216,7 @@
 			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
 			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
+		arm,no-tick-in-suspend;
 	};
 
 	xin24m: xin24m {

From a2978f70f2603dd1260773d825cf8f9ac1d53365 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 5 Jun 2018 14:55:13 +0800
Subject: [PATCH 0671/1852] media: rk-isp10: fix compile warning

Change-Id: Ie4c1c04d20d53528430dbde33920bbe340e2b926
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_isp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_isp.c b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
index 3bf900622b733..24ae83191847b 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_isp.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_isp.c
@@ -443,7 +443,7 @@ static int cifisp_dpcc_param(struct cif_isp10_isp_dev *isp_dev,
 		goto end;
 	}
 
-	method = &arg->methods[i];
+	method = &arg->methods[0];
 	for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
 		if ((method->method &
 		    CIFISP_DPCC_METHODS_SET_RESERVED) ||

From 44b1074e24a63fd020d9db3ac3170bbeb5db1982 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Thu, 26 Jul 2018 15:06:26 +0800
Subject: [PATCH 0672/1852] ARM: rk3308_linux_aarch32[_debug]_defconfig:
 coherent_pool=4k

If coherent_pool size is zero, kernel will panic when arm_dma_free.
It seems kernel do not like without atomic_pool, so keep this pool
as small as possible.

Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = deb70000
[00000004] *pgd=1e571835, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP THUMB2
Modules linked in:
CPU: 2 PID: 674 Comm: sh Not tainted 4.4.138 #187
Hardware name: Generic DT based system
task: deb89540 task.stack: df37a000
PC is at addr_in_gen_pool+0x10/0x3c
LR is at addr_in_gen_pool+0xf/0x3c
pc : [<c0154b24>]    lr : [<c0154b23>]    psr: 00000033
sp : df37be80  ip : df37a07c  fp : 000686ec
r10: debc6f48  r9 : 1e406000  r8 : 00000000
r7 : e091d000  r6 : e091d000  r5 : e091efff  r4 : 00000000
r3 : 00000001  r2 : deb89540  r1 : e091d000  r0 : 00000000
[<c0154b24>] (addr_in_gen_pool) from [<c0064a55>] (arch_free_from_atomic_pool+0x19/0x54)
[<c0064a55>] (arch_free_from_atomic_pool) from [<c0064ae3>] (__arm_dma_free+0x53/0xb0)
[<c0064ae3>] (__arm_dma_free) from [<c0064b61>] (arm_dma_free+0xf/0x12)
[<c0064b61>] (arm_dma_free) from [<c017f1a7>] (serial8250_release_dma+0x71/0xd2)
[<c017f1a7>] (serial8250_release_dma) from [<c017dda1>] (serial8250_do_shutdown+0x23/0x98)
[<c017dda1>] (serial8250_do_shutdown) from [<c017ad6b>] (uart_shutdown+0x87/0xba)
[<c017ad6b>] (uart_shutdown) from [<c017b543>] (uart_close+0x8b/0x116)
[<c017b543>] (uart_close) from [<c0174539>] (tty_release+0x20d/0x318)
[<c0174539>] (tty_release) from [<c00db5af>] (__fput+0x8b/0x120)
[<c00db5af>] (__fput) from [<c007b83b>] (task_work_run+0x6b/0x7c)
[<c007b83b>] (task_work_run) from [<c005f551>] (do_work_pending+0x65/0x66)
[<c005f551>] (do_work_pending) from [<c005d301>] (slow_work_pending+0x9/0x18)

Change-Id: If3fc962e4e936132fee021f5e6932cdabfd5ffda
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 2 +-
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 973cee6d34827..2145ff8f4ebc3 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -41,7 +41,7 @@ CONFIG_THUMB2_KERNEL=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
 CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
-CONFIG_CMDLINE="coherent_pool=0 user_debug=31"
+CONFIG_CMDLINE="coherent_pool=4k user_debug=31"
 CONFIG_CMDLINE_EXTEND=y
 CONFIG_CPU_FREQ=y
 # CONFIG_CPU_FREQ_TIMES is not set
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 04378de8971ce..b5b02a4ccfd53 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -41,7 +41,7 @@ CONFIG_THUMB2_KERNEL=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
 CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
-CONFIG_CMDLINE="coherent_pool=0 loglevel=0"
+CONFIG_CMDLINE="coherent_pool=4k loglevel=0"
 CONFIG_CMDLINE_EXTEND=y
 CONFIG_CPU_FREQ=y
 # CONFIG_CPU_FREQ_TIMES is not set

From fa02a9fe16b07d310f9a88d1c07f8125ff0ec690 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Thu, 26 Jul 2018 15:17:59 +0800
Subject: [PATCH 0673/1852] Revert "ARM: dma-mapping: silence warning if
 atomic_pool_size=0"

This reverts commit 234d4214216483b28eb9c2df07944c3adb3cb70b.
We do not use coherent_pool=0 anymore.

Change-Id: I3b05f15955c8f4b156cf8a4dfd8c0977e33a24b9
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/mm/dma-mapping.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ea4b5ef7f2870..d539dee3c78d4 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -338,9 +338,6 @@ static int __init atomic_pool_init(void)
 	struct page *page;
 	void *ptr;
 
-	if (!atomic_pool_size)
-		return 0;
-
 	atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
 	if (!atomic_pool)
 		goto out;

From b354b56823d327c301db5b6b6b354ad356ebac0b Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Tue, 24 Jul 2018 15:59:27 +0800
Subject: [PATCH 0674/1852] ARM64: dts: rockchip: rk3399 reorder nodes

Sync with upstream

Change-Id: I24aa7e127c21d1b4f2516a70b6d2c27339da0bbc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48 ++++++++++++------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 927c67407db9b..778233be1cd2e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1512,15 +1512,6 @@
 			status = "disabled";
 		};
 
-		emmc_phy: phy@f780 {
-			compatible = "rockchip,rk3399-emmc-phy";
-			reg = <0xf780 0x24>;
-			clocks = <&sdhci>;
-			clock-names = "emmcclk";
-			#phy-cells = <0>;
-			status = "disabled";
-		};
-
 		u2phy0: usb2-phy@e450 {
 			compatible = "rockchip,rk3399-usb2phy";
 			reg = <0xe450 0x10>;
@@ -1530,6 +1521,13 @@
 			clock-output-names = "clk_usbphy0_480m";
 			status = "disabled";
 
+			u2phy0_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
 			u2phy0_otg: otg-port {
 				#phy-cells = <0>;
 				interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -1539,13 +1537,6 @@
 						  "linestate";
 				status = "disabled";
 			};
-
-			u2phy0_host: host-port {
-				#phy-cells = <0>;
-				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
-				interrupt-names = "linestate";
-				status = "disabled";
-			};
 		};
 
 		u2phy1: usb2-phy@e460 {
@@ -1557,6 +1548,13 @@
 			clock-output-names = "clk_usbphy1_480m";
 			status = "disabled";
 
+			u2phy1_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
 			u2phy1_otg: otg-port {
 				#phy-cells = <0>;
 				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -1566,13 +1564,15 @@
 						  "linestate";
 				status = "disabled";
 			};
+		};
 
-			u2phy1_host: host-port {
-				#phy-cells = <0>;
-				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
-				interrupt-names = "linestate";
-				status = "disabled";
-			};
+		emmc_phy: phy@f780 {
+			compatible = "rockchip,rk3399-emmc-phy";
+			reg = <0xf780 0x24>;
+			clocks = <&sdhci>;
+			clock-names = "emmcclk";
+			#phy-cells = <0>;
+			status = "disabled";
 		};
 
 		mipi_dphy_rx0: mipi-dphy-rx0 {
@@ -2206,8 +2206,8 @@
 		compatible = "rockchip,rk3399-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmugrf>;
-		#address-cells = <0x2>;
-		#size-cells = <0x2>;
+		#address-cells = <2>;
+		#size-cells = <2>;
 		ranges;
 
 		gpio0: gpio0@ff720000 {

From 81b12c46b62df51e2236fd2abb694b63a1ccaa78 Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Thu, 26 Jul 2018 16:18:40 +0800
Subject: [PATCH 0675/1852] ARM64: rockchip: rk3399 reorder codes in
 rk3399-cdn-dp

Sync with upstream codes.

Change-Id: Ic5306bdf16125e46892b5a85339afec67ad85482
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 778233be1cd2e..9d1b3904ef5e5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -465,11 +465,11 @@
 		compatible = "rockchip,rk3399-cdn-dp";
 		reg = <0x0 0xfec00000 0x0 0x100000>;
 		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
+		assigned-clocks = <&cru SCLK_DP_CORE>;
+		assigned-clock-rates = <100000000>;
 		clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
 			 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
 		clock-names = "core-clk", "pclk", "spdif", "grf";
-		assigned-clocks = <&cru SCLK_DP_CORE>;
-		assigned-clock-rates = <100000000>;
 		power-domains = <&power RK3399_PD_HDCP>;
 		phys = <&tcphy0_dp>, <&tcphy1_dp>;
 		resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,

From 5076c9fa5af29015108ccace92e61b1d28470204 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 26 Jul 2018 15:54:51 +0800
Subject: [PATCH 0676/1852] ASoC: rk3308_codec: add support
 'rockchip,delay-start-play-ms' property

It may be that many amplifiers have a long startup delay.
If the playback is too early before the amplifier is
turned on and stable, it may cause loss of audio data.
Therefore, we need to delay playback according to
different amplifier performance.

Change-Id: I7d54f89217df560a68c080e82313eb2399d44b0a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index fb92c353599e4..9894d816b303f 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -149,6 +149,7 @@ struct rk3308_codec_priv {
 	u32 i2s_sdis[ADC_LR_GROUP_MAX];
 	u32 to_i2s_grps;
 	u32 delay_loopback_handle_ms;
+	u32 delay_start_play_ms;
 	int which_i2s;
 	int irq;
 	int adc_grp0_using_linein;
@@ -1001,6 +1002,9 @@ static int rk3308_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
 				rk3308_speaker_ctl(rk3308, 1);
 			else if (rk3308->dac_output == DAC_HPOUT)
 				rk3308_headphone_ctl(rk3308, 1);
+
+			if (rk3308->delay_start_play_ms)
+				msleep(rk3308->delay_start_play_ms);
 #endif
 			for (dgain = 0x7; dgain >= 0x2; dgain--) {
 				/*
@@ -3830,6 +3834,10 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	ret = of_property_read_u32(np, "rockchip,delay-loopback-handle-ms",
 				   &rk3308->delay_loopback_handle_ms);
 
+	rk3308->delay_start_play_ms = 0;
+	ret = of_property_read_u32(np, "rockchip,delay-start-play-ms",
+				   &rk3308->delay_start_play_ms);
+
 	rk3308->loopback_grp = NOT_USED;
 	ret = of_property_read_u32(np, "rockchip,loopback-grp",
 				   &rk3308->loopback_grp);

From ca2d7a8b0c2754ba3edfcc5042b04da49ecb8882 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 26 Jul 2018 16:00:57 +0800
Subject: [PATCH 0677/1852] ASoC: rk3308_codec: add
 'rockchip,delay-start-play-ms' property

Change-Id: I7e2c6737899bb44ccf453a68ae5ca20335d513b1
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,rk3308-codec.txt         | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
index 5384c24424f1e..ad3bdf71ad49c 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
@@ -40,6 +40,8 @@ Optional properties:
 
 - rockchip,delay-loopback-handle-ms: This property points out that the delay for
   handling ADC after enable PAs during loopback.
+- rockchip,delay-start-play-ms: This property points out the delay ms of start
+  playback according to different amplifier performance.
 - rockchip,en-always-grps: This property will keep the needed ADCs enabled
   always after enabling once.
 - rockchip,loopback-grp: It points out the ADC group which is the loopback used.

From ee84d19870c1c53d4926d9ddf168456210957c8e Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 26 Jul 2018 16:09:08 +0800
Subject: [PATCH 0678/1852] ARM: dts: rockchip: rk3308-voice-module: enable
 200ms delay play property

Due to the PA CS8509 on rk3308 voice module startup time
is ~200ms, we need to hold it some times, avoid lossing
audio data during start playback.

Change-Id: I44ac3caa0ceddbe7720d8eb63179ae56baa168a9
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index ef8c465376931..92a27328cd32d 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -182,6 +182,7 @@
 	status = "disabled";
 
 	rockchip,no-hp-det;
+	rockchip,delay-start-play-ms = <200>;
 	rockchip,loopback-grp = <1>;
 	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
 };

From 509d3277d8a304f4bd9a2669ecf59524cd57639c Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Fri, 27 Jul 2018 11:09:24 +0800
Subject: [PATCH 0679/1852] net: wireless: rockchip_wlan: ssv6051 solve
 parser-conf.sh permission problem

Change-Id: I57853c091246cc7664568b79f6efb807d076e48c
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh b/drivers/net/wireless/rockchip_wlan/ssv6xxx/parser-conf.sh
old mode 100644
new mode 100755

From 8dc0be824a3c15014b423283503cc6676d08673f Mon Sep 17 00:00:00 2001
From: huweiguo <hwg@rock-chips.com>
Date: Thu, 26 Jul 2018 11:32:45 +0800
Subject: [PATCH 0680/1852] mac80211: add p2p interface

Change-Id: Id17f68b9ccae0e216dd1892a3a841c3fe2e03acd
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 net/mac80211/main.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 2ee53dc1ddf71..7add5a0596cf9 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -1083,6 +1083,15 @@ int ieee80211_register_hw(struct ieee80211_hw *hw)
 				   "Failed to add default virtual iface\n");
 	}
 
+	if (local->hw.wiphy->interface_modes & (BIT(NL80211_IFTYPE_P2P_GO) |
+	    BIT(NL80211_IFTYPE_P2P_CLIENT)) &&
+	    !ieee80211_hw_check(hw, NO_AUTO_VIF)) {
+		result = ieee80211_if_add(local, "p2p%d", NET_NAME_ENUM, NULL,
+					  NL80211_IFTYPE_STATION, NULL);
+
+		if (result)
+			wiphy_warn(local->hw.wiphy, "Failed to add p2p iface\n");
+	}
 	rtnl_unlock();
 
 #ifdef CONFIG_INET

From c315dca05b7041787ee117a11442cd88825852bb Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 27 Jun 2018 17:08:02 +0800
Subject: [PATCH 0681/1852] media: rk-isp10: add check of iommu status

Change-Id: I31057963bff7d51ef0c208b5cc24797f4384e59f
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
index 98a865a97cd40..c9011716b8ec9 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
@@ -817,6 +817,7 @@ int cif_isp10_pltfrm_dev_init(
 	struct device_node *np;
 	struct device_node *of_node = pdev->dev.of_node;
 	const char *compatible;
+	const char *iommu_status;
 	int err = 0;
 #endif
 
@@ -905,6 +906,19 @@ int cif_isp10_pltfrm_dev_init(
 		pdata->irq_handlers[i].mis = -EINVAL;
 
 #ifdef CIF_ISP10_MODE_DMA_SG
+		np = of_parse_phandle(of_node, "iommus", 0);
+		WARN_ON(!np);
+		if (np) {
+			of_property_read_string(np, "status", &iommu_status);
+			if (strcmp(iommu_status, "okay") != 0) {
+				dev_warn(dev, "Please check isp_mmu node is okay! CIF_ISP10_MODE_DMA_SG is turn on in cif isp10 driver.\n");
+				WARN_ON(1);
+				of_node_put(np);
+				goto err;
+			}
+			of_node_put(np);
+		}
+
 		of_property_read_string(of_node, "compatible", &compatible);
 		if ((strcmp(compatible, "rockchip,rk3399-cif-isp") == 0) &&
 			(res->start == 0xFF920000)) {

From bdad17bbe006fb14f1cea117a42408caa47002be Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 4 Jul 2018 18:58:01 +0800
Subject: [PATCH 0682/1852] media: rk-isp10: support stream on/off/on/off...

Change-Id: Ia4683924cfdd5cdc3b15ff3cef1a78b36cb6420f
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c   | 31 ++++---------------
 .../media/platform/rk-isp10/cif_isp10_v4l2.c  |  4 +--
 2 files changed, 8 insertions(+), 27 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 2adfce69eb8fd..e3506cb81d706 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -3522,7 +3522,7 @@ static void cif_isp10_init_stream(
 
 		ret = cif_isp10_img_src_select_strm_fmt(dev);
 		if (IS_ERR_VALUE(ret)) {
-			dev->mp_stream.updt_cfg = false;
+			dev->sp_stream.updt_cfg = false;
 		} else {
 			frm_fmt.pix_fmt = CIF_YUV420SP;
 			frm_fmt.width =
@@ -4911,6 +4911,9 @@ static int cif_isp10_stop(
 			CIF_ISP10_PM_STATE_SW_STNDBY)))
 			cif_isp10_pltfrm_pr_dbg(dev->dev,
 			"unable to put CIF into standby\n");
+
+		dev->mp_stream.updt_cfg = true;
+		dev->sp_stream.updt_cfg = true;
 	} else if (stop_sp) {
 		if (!dev->config.mi_config.async_updt) {
 			cif_isp10_stop_mi(dev, true, false);
@@ -5688,31 +5691,9 @@ int cif_isp10_streamoff(
 	ret = cif_isp10_stop(dev, streamoff_sp, streamoff_mp);
 	if (IS_ERR_VALUE(ret))
 		goto err;
-	if ((streamoff_sp) &&
-		(dev->sp_stream.state == CIF_ISP10_STATE_READY))
-		dev->sp_stream.state = CIF_ISP10_STATE_INACTIVE;
-	if (streamoff_mp) {
-		dev->config.jpeg_config.enable = false;
-		dev->config.mi_config.raw_enable = false;
-		dev->config.mi_config.mp.output.width = 0;
-		dev->config.mi_config.mp.output.height = 0;
-		dev->config.mi_config.mp.output.pix_fmt =
-			CIF_UNKNOWN_FORMAT;
-		if (dev->mp_stream.state == CIF_ISP10_STATE_READY)
-			dev->mp_stream.state = CIF_ISP10_STATE_INACTIVE;
-	}
-	if (streamoff_dma) {
+
+	if (streamoff_dma)
 		cif_isp10_stop_dma(dev);
-		if (dev->dma_stream.state == CIF_ISP10_STATE_READY)
-			dev->dma_stream.state = CIF_ISP10_STATE_INACTIVE;
-	}
-	if ((dev->dma_stream.state <= CIF_ISP10_STATE_INACTIVE) &&
-		(dev->mp_stream.state <= CIF_ISP10_STATE_INACTIVE) &&
-		(dev->sp_stream.state <= CIF_ISP10_STATE_INACTIVE)) {
-		dev->isp_dev.input_width = 0;
-		dev->isp_dev.input_height = 0;
-		dev->config.isp_config.ism_config.ism_en = false;
-	}
 
 	cif_isp10_pltfrm_pr_dbg(dev->dev,
 		"SP state = %s, MP state = %s, DMA state = %s, # frames received = %d\n",
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index e97fa4c20fdab..4084222cec608 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -593,8 +593,6 @@ static int cif_isp10_v4l2_do_streamoff(
 		ret = -EFAULT;
 	}
 
-	vb2_queue_release(queue);
-
 	if (IS_ERR_VALUE(ret))
 		cif_isp10_pltfrm_pr_err(dev->dev,
 			"failed with error %d\n", ret);
@@ -1100,6 +1098,8 @@ static int cif_isp10_v4l2_release(struct file *file)
 
 		/* Last close, so uninitialize hardware */
 		ret = cif_isp10_release(dev, stream_id);
+
+		vb2_queue_release(queue);
 	}
 
 	if (node->owner == fh)

From 898d63e546179f733fc1f8c915d691b61bdf94f2 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 16 Jul 2018 11:12:28 +0800
Subject: [PATCH 0683/1852] media: rk-isp10: get correct isp out width/height

Change-Id: I7d5b9fae16c56ebe108673ba46faa10d9a962b10
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c      |  3 +++
 drivers/media/platform/rk-isp10/cif_isp10_v4l2.c | 15 +++++++++++++++
 2 files changed, 18 insertions(+)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index e3506cb81d706..2b74085aef90d 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -5843,6 +5843,9 @@ int cif_isp10_init(
 		dev->config.isp_config.si_enable = false;
 		dev->config.isp_config.ie_config.effect =
 			CIF_ISP10_IE_NONE;
+
+		memset(&dev->config.isp_config.output, 0,
+			sizeof(dev->config.isp_config.output));
 	}
 
 	if (stream_ids & CIF_ISP10_STREAM_SP)
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index 4084222cec608..e0dbe9a4c0815 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -1333,6 +1333,8 @@ static long v4l2_default_ioctl(struct file *file, void *fh,
 			       bool valid_prio, unsigned int cmd, void *arg)
 {
 	int ret = -EINVAL;
+	u32 h_offs;
+	u32 v_offs;
 	struct vb2_queue *queue = to_vb2_queue(file);
 	struct cif_isp10_device *dev = to_cif_isp10_device(queue);
 
@@ -1369,6 +1371,19 @@ static long v4l2_default_ioctl(struct file *file, void *fh,
 			dev->config.isp_config.output.width;
 		p_mode_data->isp_output_height =
 			dev->config.isp_config.output.height;
+		if (p_mode_data->isp_output_width == 0 ||
+		    p_mode_data->isp_output_height == 0) {
+			ret = cif_isp10_calc_isp_cropping(dev,
+				&p_mode_data->isp_output_width,
+				&p_mode_data->isp_output_height,
+				&h_offs,
+				&v_offs);
+			if (IS_ERR_VALUE(ret)) {
+				cif_isp10_pltfrm_pr_err(dev->dev,
+					"failed to get isp_output data\n");
+				return ret;
+			}
+		}
 	} else if (cmd == RK_VIDIOC_CAMERA_MODULEINFO) {
 		struct camera_module_info_s *p_camera_module =
 		(struct camera_module_info_s *)arg;

From 933b31f650dc961874e2818cc9dc1e5b868c6cc5 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 16 Jul 2018 11:53:26 +0800
Subject: [PATCH 0684/1852] media: rk-isp10: fix the issue cannot set exposure
 by mp path device

Change-Id: Id057859035356b52e9538df14b908ca631df836c
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_v4l2.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
index e0dbe9a4c0815..e076da360f514 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_v4l2.c
@@ -1788,6 +1788,7 @@ const struct v4l2_ioctl_ops cif_isp10_v4l2_mp_ioctlops = {
 	.vidioc_s_ctrl = cif_isp10_v4l2_s_ctrl,
 	.vidioc_s_fmt_vid_cap = cif_isp10_v4l2_s_fmt,
 	.vidioc_g_fmt_vid_cap = cif_isp10_v4l2_g_fmt,
+	.vidioc_s_ext_ctrls = v4l2_s_ext_ctrls,
 	.vidioc_enum_fmt_vid_cap = v4l2_enum_fmt_cap,
 	.vidioc_enum_framesizes = cif_isp10_v4l2_enum_framesizes,
 	.vidioc_expbuf = vb2_ioctl_expbuf,

From 3f580ee5be4905f01f74201475a4c21757f83260 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 25 Jul 2018 15:13:21 +0800
Subject: [PATCH 0685/1852] media: rk-isp10: update to v0.2.0

Change-Id: I81dbc96a5464a266fbb5adc753a18f433fa58bc7
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_version.h | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_version.h b/drivers/media/platform/rk-isp10/cif_isp10_version.h
index 31c95cf827304..baf64e2a24805 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_version.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_version.h
@@ -106,8 +106,16 @@
  *v0.1.0xf
  *1. merge modification from rv1108 project.
  *
+ *v0.2.0x0
+ *1. fix compile warning.
+ *2. add check of iommu status.
+ *3. support stream on/off/on/off...
+ *4. get correct isp out width/height.
+ *5. fix the issue that setting of isp0 mipi affect txrx dphy.
+ *6. fix the issue cannot set exposure by mp path device.
+ *
  */
 
-#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 1, 0xf)
+#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 2, 0x0)
 
 #endif

From 407cacb78e37abb910fe0f5da10e9295237c18ef Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 25 Jul 2018 10:18:54 +0800
Subject: [PATCH 0686/1852] ASoC: rockchip: multicodecs: add support sound
 daifmt

This patch supports parse sound daifmt dynamically.

Change-Id: I63761499dd9e1c16a84a1aba8a04e6dff67a70cc
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/rockchip/rockchip_multicodecs.c | 72 +++++++++++++++++++----
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_multicodecs.c b/sound/soc/rockchip/rockchip_multicodecs.c
index 8a97063cc0eb7..e40be38cbc1b4 100644
--- a/sound/soc/rockchip/rockchip_multicodecs.c
+++ b/sound/soc/rockchip/rockchip_multicodecs.c
@@ -37,6 +37,7 @@
 
 struct multicodecs_data {
 	struct snd_soc_card snd_card;
+	struct snd_soc_dai_link dai_link;
 	unsigned int mclk_fs;
 	bool codec_hp_det;
 };
@@ -92,19 +93,59 @@ static int rk_dailink_init(struct snd_soc_pcm_runtime *rtd)
 	return 0;
 }
 
+static int rk_multicodecs_parse_daifmt(struct device_node *node,
+				       struct device_node *codec,
+				       struct multicodecs_data *mc_data,
+				       const char *prefix)
+{
+	struct snd_soc_dai_link *dai_link = &mc_data->dai_link;
+	struct device_node *bitclkmaster = NULL;
+	struct device_node *framemaster = NULL;
+	unsigned int daifmt;
+
+	daifmt = snd_soc_of_parse_daifmt(node, prefix,
+					 &bitclkmaster, &framemaster);
+
+	daifmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
+
+	if (strlen(prefix) && !bitclkmaster && !framemaster) {
+		/*
+		 * No dai-link level and master setting was not found from
+		 * sound node level, revert back to legacy DT parsing and
+		 * take the settings from codec node.
+		 */
+		pr_debug("%s: Revert to legacy daifmt parsing\n", __func__);
+
+		daifmt = snd_soc_of_parse_daifmt(codec, NULL, NULL, NULL) |
+			(daifmt & ~SND_SOC_DAIFMT_CLOCK_MASK);
+	} else {
+		if (codec == bitclkmaster)
+			daifmt |= (codec == framemaster) ?
+				SND_SOC_DAIFMT_CBM_CFM : SND_SOC_DAIFMT_CBM_CFS;
+		else
+			daifmt |= (codec == framemaster) ?
+				SND_SOC_DAIFMT_CBS_CFM : SND_SOC_DAIFMT_CBS_CFS;
+	}
+
+	/*
+	 * If there is NULL format means that the format isn't specified, we
+	 * need to set i2s format by default.
+	 */
+	if (!(daifmt & SND_SOC_DAIFMT_FORMAT_MASK))
+		daifmt |= SND_SOC_DAIFMT_I2S;
+
+	dai_link->dai_fmt = daifmt;
+
+	of_node_put(bitclkmaster);
+	of_node_put(framemaster);
+
+	return 0;
+}
+
 static struct snd_soc_ops rk_ops = {
 	.hw_params = rk_multicodecs_hw_params,
 };
 
-static struct snd_soc_dai_link rk_dailink = {
-	.name = "MULTICODECS",
-	.stream_name = "MULTICODECS",
-	.init = rk_dailink_init,
-	.ops = &rk_ops,
-	.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-		SND_SOC_DAIFMT_CBS_CFS,
-};
-
 static int rk_multicodecs_probe(struct platform_device *pdev)
 {
 	struct snd_soc_card *card;
@@ -117,6 +158,7 @@ static int rk_multicodecs_probe(struct platform_device *pdev)
 	u32 val;
 	int count;
 	int ret = 0, i = 0, idx = 0;
+	const char *prefix = "rockchip,";
 
 	mc_data = devm_kzalloc(&pdev->dev, sizeof(*mc_data), GFP_KERNEL);
 	if (!mc_data)
@@ -130,8 +172,13 @@ static int rk_multicodecs_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
-	link = &rk_dailink;
-	card->dai_link = &rk_dailink;
+	link = &mc_data->dai_link;
+	link->name = "dailink-multicodecs";
+	link->stream_name = link->name;
+	link->init = rk_dailink_init;
+	link->ops = &rk_ops;
+
+	card->dai_link = link;
 	card->num_links = 1;
 	card->num_aux_devs = 0;
 
@@ -175,6 +222,9 @@ static int rk_multicodecs_probe(struct platform_device *pdev)
 		idx++;
 	}
 
+	/* Only reference the codecs[0].of_node which maybe as master. */
+	rk_multicodecs_parse_daifmt(np, codecs[0].of_node, mc_data, prefix);
+
 	link->cpu_of_node = of_parse_phandle(np, "rockchip,cpu", 0);
 	if (!link->cpu_of_node)
 		return -ENODEV;

From b31f4ba7576ac45f8f7c41812943d583cea6a86c Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 25 Jul 2018 10:30:22 +0800
Subject: [PATCH 0687/1852] ASoC: rockchip: update properties for daifmt

Change-Id: Id10b0280c43f941f81afaa8b979903053975f7f9
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../bindings/sound/rockchip,multicodecs.txt    | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt b/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
index f2d1fe583695b..72b485dddc4cb 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
@@ -5,13 +5,27 @@ Required properties:
 - rockchip,cpu: The phandle of the Rockchip I2S/PDM controller that's
   connected to the CODEC
 - rockchip,codec: The phandle of audio codecs
-- rockchip,mclk-fs: Multiplication factor between stream rate and codec mclk,
-  applied only for the dai-link.
 
 Optional properties:
 - rockchip,card-name: User specified audio sound card name, one string property.
 - rockchip,codec-hp-det : Detect the headphone via internal codec.
 
+Optional dai-link subnode properties:
+- rockchip,format			: CPU/CODEC common audio format.
+					  "i2s", "right_j", "left_j" , "dsp_a"
+					  "dsp_b", "ac97", "pdm", "msb", "lsb".
+- rockchip,frame-master			: Indicates dai-link frame master.
+					  phandle to a cpu or codec subnode.
+- rockchip,bitclock-master		: Indicates dai-link bit clock master.
+					  phandle to a cpu or codec subnode.
+- rockchip,bitclock-inversion		: bool property. Add this if the
+					  dai-link uses bit clock inversion.
+- rockchip,frame-inversion		: bool property. Add this if the
+					  dai-link uses frame clock inversion.
+- rockchip,mclk-fs     			: Multiplication factor between stream
+					  rate and codec mclk, applied only for
+					  the dai-link.
+
 Example:
 
 sound {

From cdd58010b2133265c39b118abb5ba3795ddf881c Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Thu, 26 Jul 2018 15:26:34 +0800
Subject: [PATCH 0688/1852] cpufreq: rockchip: correct the offset of bin flag
 in efuse for rk3288w

Change-Id: I15154876e3b54d64b63c9659cfe2548d19ccb7a9
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi      | 10 ++++++++--
 drivers/cpufreq/rockchip-cpufreq.c | 13 ++++++++++---
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8b76ce9606214..8e51132ef7e44 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -135,9 +135,11 @@
 		rockchip,avs-scale = <17>;
 		rockchip,max-volt = <1350000>;
 		nvmem-cells = <&cpu_leakage>, <&special_function>,
-			      <&performance>, <&process_version>;
+			      <&performance>, <&process_version>,
+			      <&performance_w>;
 		nvmem-cell-names = "leakage", "special",
-				   "performance", "process";
+				   "performance", "process",
+				   "performance-w";
 		rockchip,bin-scaling-sel = <
 			0               17
 			1               25
@@ -1798,6 +1800,10 @@
 		cpu_leakage: cpu-leakage@17 {
 			reg = <0x17 0x1>;
 		};
+		performance_w: performance@1c {
+			reg = <0x1c 0x1>;
+			bits = <4 3>;
+		};
 		performance: performance@1d {
 			reg = <0x1d 0x1>;
 			bits = <4 3>;
diff --git a/drivers/cpufreq/rockchip-cpufreq.c b/drivers/cpufreq/rockchip-cpufreq.c
index 07726dcdfdb0d..00b9bd874ed34 100644
--- a/drivers/cpufreq/rockchip-cpufreq.c
+++ b/drivers/cpufreq/rockchip-cpufreq.c
@@ -29,6 +29,7 @@
 #include <linux/slab.h>
 #include <linux/soc/rockchip/pvtm.h>
 #include <linux/thermal.h>
+#include <linux/rockchip/cpu.h>
 #include <soc/rockchip/rockchip_opp_select.h>
 
 #include "../clk/rockchip/clk.h"
@@ -57,6 +58,7 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 			       int *bin, int *process)
 {
 	int ret = 0, value = -EINVAL;
+	char *name;
 
 	if (!bin)
 		goto next;
@@ -71,9 +73,14 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 		else
 			*bin = 1;
 	}
-	if (of_property_match_string(np, "nvmem-cell-names",
-				     "performance") >= 0) {
-		ret = rockchip_get_efuse_value(np, "performance", &value);
+
+	if (soc_is_rk3288w())
+		name = "performance-w";
+	else
+		name = "performance";
+
+	if (of_property_match_string(np, "nvmem-cell-names", name) >= 0) {
+		ret = rockchip_get_efuse_value(np, name, &value);
 		if (ret) {
 			dev_err(dev, "Failed to get soc performance value\n");
 			goto out;

From a37a3ce76cfc81ae202bf99080dded644209c0e4 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 24 Jul 2018 23:17:38 +0800
Subject: [PATCH 0689/1852] ASoC: rockchip: multicodecs: add support property
 'rockchip,wait-card-locked'

Some times, we would like to specify the order of
loading sound card, and can use this property to
wait other sound cards are locked. Therefore, this
sound card with the property should be slave card.

Change-Id: I3dcd77a527ad902a5a3c00bcce2c81cf6e782549
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/rockchip/rockchip_multicodecs.c | 61 +++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_multicodecs.c b/sound/soc/rockchip/rockchip_multicodecs.c
index e40be38cbc1b4..517d081abac86 100644
--- a/sound/soc/rockchip/rockchip_multicodecs.c
+++ b/sound/soc/rockchip/rockchip_multicodecs.c
@@ -33,6 +33,7 @@
 
 #define DRV_NAME "rk-multicodecs"
 #define MAX_CODECS	2
+#define WAIT_CARDS	(SNDRV_CARDS - 1)
 #define DEFAULT_MCLK_FS	256
 
 struct multicodecs_data {
@@ -142,6 +143,60 @@ static int rk_multicodecs_parse_daifmt(struct device_node *node,
 	return 0;
 }
 
+static int wait_locked_card(struct device_node *np, struct device *dev)
+{
+	char *propname = "rockchip,wait-card-locked";
+	u32 cards[WAIT_CARDS];
+	int num, i;
+	int ret;
+
+	ret = of_property_count_u32_elems(np, propname);
+	if (ret < 0) {
+		if (ret == -EINVAL) {
+			/*
+			 * -EINVAL means the property does not exist, this is
+			 * fine.
+			 */
+			return 0;
+		}
+
+		dev_err(dev, "Property '%s' elems could not be read: %d\n",
+			propname, ret);
+		return ret;
+	}
+
+	num = ret;
+	if (num > WAIT_CARDS)
+		num = WAIT_CARDS;
+
+	ret = of_property_read_u32_array(np, propname, cards, num);
+	if (ret < 0) {
+		if (ret == -EINVAL) {
+			/*
+			 * -EINVAL means the property does not exist, this is
+			 * fine.
+			 */
+			return 0;
+		}
+
+		dev_err(dev, "Property '%s' could not be read: %d\n",
+			propname, ret);
+		return ret;
+	}
+
+	ret = 0;
+	for (i = 0; i < num; i++) {
+		if (!snd_card_locked(cards[i])) {
+			dev_warn(dev, "card: %d has not been locked, re-probe again\n",
+				 cards[i]);
+			ret = -EPROBE_DEFER;
+			break;
+		}
+	}
+
+	return ret;
+}
+
 static struct snd_soc_ops rk_ops = {
 	.hw_params = rk_multicodecs_hw_params,
 };
@@ -160,6 +215,12 @@ static int rk_multicodecs_probe(struct platform_device *pdev)
 	int ret = 0, i = 0, idx = 0;
 	const char *prefix = "rockchip,";
 
+	ret = wait_locked_card(np, &pdev->dev);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "check_lock_card failed: %d\n", ret);
+		return ret;
+	}
+
 	mc_data = devm_kzalloc(&pdev->dev, sizeof(*mc_data), GFP_KERNEL);
 	if (!mc_data)
 		return -ENOMEM;

From d6cb622ad5c1796d05390e6bf6c5c3b8dfb956a7 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 25 Jul 2018 10:56:29 +0800
Subject: [PATCH 0690/1852] ASoC: rockchip: add property
 'rockchip,wait-card-locked'

Change-Id: I6c81abfe3f57c5db8c547c74929202bd7484ca9a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,multicodecs.txt         | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt b/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
index 72b485dddc4cb..194bbb60d3a8b 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,multicodecs.txt
@@ -9,6 +9,9 @@ Required properties:
 Optional properties:
 - rockchip,card-name: User specified audio sound card name, one string property.
 - rockchip,codec-hp-det : Detect the headphone via internal codec.
+- rockchip,wait-card-locked : This is a variable length array, user specified
+			      these sound cards need to be prepared and locked,
+			      otherwise the local slave card can be probed.
 
 Optional dai-link subnode properties:
 - rockchip,format			: CPU/CODEC common audio format.

From c90f0fdb604381824ae1ebbc5aac52ceea113431 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 25 Jul 2018 10:58:49 +0800
Subject: [PATCH 0691/1852] arm64: dts: rockchip: rk3308-evb: switch to
 multicodecs for bluetooth_sound

Dues to the loading order of multiple sound cards is
not constant, we need to specify bluetooth pcm sound
as the slave card via 'rockchip,wait-card-locked'
property. It looks like this:

========
From
[    1.180441] ALSA device list:
[    1.180458]   #0: rockchip,rk3308-pcm
[    1.180467]   #1: rockchip,rk3308-vad

To
[    1.175590] ALSA device list:
[    1.175606]   #0: rockchip,rk3308-vad
[    1.175614]   #1: rockchip,rk3308-pcm
========

Change-Id: Ic4d7625ca3b06106a317a59defcc45bab190ae95
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 .../boot/dts/rockchip/rk3308-evb-v10.dtsi     | 27 +++++++------------
 .../boot/dts/rockchip/rk3308-evb-v11.dtsi     | 27 +++++++------------
 2 files changed, 20 insertions(+), 34 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 0e2c72f25259f..5ee978ff5dc16 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -113,23 +113,16 @@
 
 	bluetooth_sound: bluetooth-sound {
 		status = "disabled";
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "dsp_b";
-		simple-audio-card,name = "rockchip,rk3308-pcm";
-		simple-audio-card,mclk-fs = <128>;
-		simple-audio-card,bitclock-inversion = <0>;
-		simple-audio-card,bitclock-master = <&bt_codec>;
-		simple-audio-card,frame-master = <&bt_codec>;
-		simple-audio-card,cpu {
-			sound-dai = <&i2s_2ch_0>;
-		};
-		bt_codec: simple-audio-card,codec {
-			/*
-			 * Using dummy_codec to supports CVSD(8K) and mSBC(16K)
-			 * for HFP.
-			 */
-			sound-dai = <&dummy_codec>;
-		};
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-pcm";
+		rockchip,mclk-fs = <128>;
+		rockchip,cpu = <&i2s_2ch_0>;
+		rockchip,codec = <&dummy_codec>;
+		rockchip,format = "dsp_b";
+		rockchip,bitclock-inversion = <0>;
+		rockchip,bitclock-master = <&dummy_codec>;
+		rockchip,frame-master = <&dummy_codec>;
+		rockchip,wait-card-locked = <0>;
 	};
 
 	spdif_tx_sound: spdif-tx-sound {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index f7785807bf5bc..fc97ee63b55d8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -98,23 +98,16 @@
 
 	bluetooth_sound: bluetooth-sound {
 		status = "disabled";
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "dsp_b";
-		simple-audio-card,name = "rockchip,rk3308-pcm";
-		simple-audio-card,mclk-fs = <128>;
-		simple-audio-card,bitclock-inversion = <0>;
-		simple-audio-card,bitclock-master = <&bt_codec>;
-		simple-audio-card,frame-master = <&bt_codec>;
-		simple-audio-card,cpu {
-			sound-dai = <&i2s_2ch_0>;
-		};
-		bt_codec: simple-audio-card,codec {
-			/*
-			 * Using dummy_codec to supports CVSD(8K) and mSBC(16K)
-			 * for HFP.
-			 */
-			sound-dai = <&dummy_codec>;
-		};
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-pcm";
+		rockchip,mclk-fs = <128>;
+		rockchip,cpu = <&i2s_2ch_0>;
+		rockchip,codec = <&dummy_codec>;
+		rockchip,format = "dsp_b";
+		rockchip,bitclock-inversion = <0>;
+		rockchip,bitclock-master = <&dummy_codec>;
+		rockchip,frame-master = <&dummy_codec>;
+		rockchip,wait-card-locked = <0>;
 	};
 
 	spdif_tx_sound: spdif-tx-sound {

From 13bcb16bfff4b9ff363a38fe6e7e0c1d435b3e75 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 23 Jul 2018 09:27:55 +0800
Subject: [PATCH 0692/1852] usb: dwc2: add pm runtime support

Adds pm_runtime support for dwc2, so that power domain is
enabled only when there is a transaction going on to help
save power.

Change-Id: I318552774d20eeaed521ff179f99b2551ee24183
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc2/platform.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index cd83869a47e79..0805f39ecf854 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -472,6 +472,9 @@ static int dwc2_driver_remove(struct platform_device *dev)
 	if (hsotg->gadget_enabled)
 		dwc2_hsotg_remove(hsotg);
 
+	pm_runtime_put_sync(hsotg->dev);
+	pm_runtime_disable(hsotg->dev);
+
 	if (hsotg->ll_hw_enabled)
 		dwc2_lowlevel_hw_disable(hsotg);
 
@@ -604,6 +607,11 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	if (retval)
 		return retval;
 
+	pm_runtime_enable(hsotg->dev);
+	retval = pm_runtime_get_sync(hsotg->dev);
+	if (retval < 0)
+		goto error;
+
 	retval = dwc2_get_dr_mode(hsotg);
 	if (retval)
 		goto error;
@@ -670,6 +678,8 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	return 0;
 
 error:
+	pm_runtime_put_sync(hsotg->dev);
+	pm_runtime_disable(hsotg->dev);
 	dwc2_lowlevel_hw_disable(hsotg);
 	return retval;
 }

From 12fb5a1c04ea860d7f210ae157294e11f7c50b80 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 27 Jul 2018 10:26:53 +0800
Subject: [PATCH 0693/1852] usb: gadget: f_uac1: disable ep in
 f_audio_disable()

The f_audio_disable() doesn't disable usb ep, and
this cause usb enumeration fail. So add usb ep
disable operation.

This patch also reinitializes the opts->bound flag
to false in f_audio_free(), and then it can setup
ALSA audio device again in f_audio_bind().

Change-Id: I7b10630f5085b1a03792bc4b9e7eabb02d2bd5a2
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/gadget/function/f_uac1.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/gadget/function/f_uac1.c b/drivers/usb/gadget/function/f_uac1.c
index 366e7b6045e45..cda2159ba2cdc 100644
--- a/drivers/usb/gadget/function/f_uac1.c
+++ b/drivers/usb/gadget/function/f_uac1.c
@@ -671,6 +671,11 @@ static int f_audio_get_alt(struct usb_function *f, unsigned intf)
 
 static void f_audio_disable(struct usb_function *f)
 {
+	struct f_audio *audio = func_to_audio(f);
+	struct usb_ep *out_ep = audio->out_ep;
+
+	usb_ep_disable(out_ep);
+
 	return;
 }
 
@@ -969,6 +974,7 @@ static void f_audio_free(struct usb_function *f)
 
 	gaudio_cleanup(&audio->card);
 	opts = container_of(f->fi, struct f_uac1_opts, func_inst);
+	opts->bound = false;
 	kfree(audio);
 	mutex_lock(&opts->lock);
 	--opts->refcnt;

From 942841864892ca446b28d7a1dc84ca6827f1ffc2 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 27 Jul 2018 12:32:13 +0800
Subject: [PATCH 0694/1852] usb: gadget: f_uac1: set period size and buffer
 size

The default period size is only 64 frames, this
will cause usb audio playback with noise via
internal audio codec. This patch sets the period
size to (snd->rate / 10), and also sets the buffer
size to snd->rate.

Change-Id: I4a4eb1b4dd79aec65f5c44eacd8a2fa101dfbd1b
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/gadget/function/u_uac1.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/gadget/function/u_uac1.c b/drivers/usb/gadget/function/u_uac1.c
index c78c84138a28d..4100a019ace6a 100644
--- a/drivers/usb/gadget/function/u_uac1.c
+++ b/drivers/usb/gadget/function/u_uac1.c
@@ -122,6 +122,10 @@ static int playback_default_hw_params(struct gaudio_snd_dev *snd)
 			snd->channels, 0);
 	_snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_RATE,
 			snd->rate, 0);
+	_snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
+			      snd->rate / 10, 0);
+	_snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
+			      snd->rate, 0);
 
 	snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL);
 	snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_HW_PARAMS, params);

From 4650b8c9f9dc2ac5e7c70960745588951e3673c8 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 27 Jul 2018 12:40:10 +0800
Subject: [PATCH 0695/1852] usb: dwc2: gadget: fix frame overrun issue

The frame_overrun flag is used to indicates
SOF number (current_frame) overrun in DSTS
and the target_frame over DSTS_SOFFN_LIMIT.

Clear the frame_overrun flag only if target_frame
below DSTS_SOFFN_LIMIT and current_frame less
than target_frame.

Change-Id: I91cf9001324a9bbbcc4bc28b335695d607fb69d4
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc2/gadget.c | 39 +++++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 18 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index a2dd5fe4553c7..af21f44c25634 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -97,6 +97,23 @@ static inline bool using_dma(struct dwc2_hsotg *hsotg)
 	return hsotg->g_using_dma;
 }
 
+/**
+* dwc2_hsotg_read_frameno - read current frame number
+* @hsotg: The device instance
+*
+* Return the current frame number
+*/
+static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg)
+{
+	u32 dsts;
+
+	dsts = dwc2_readl(hsotg->regs + DSTS);
+	dsts &= DSTS_SOFFN_MASK;
+	dsts >>= DSTS_SOFFN_SHIFT;
+
+	return dsts;
+}
+
 /**
  * dwc2_gadget_incr_frame_num - Increments the targeted frame number.
  * @hs_ep: The endpoint
@@ -107,11 +124,14 @@ static inline bool using_dma(struct dwc2_hsotg *hsotg)
  */
 static inline void dwc2_gadget_incr_frame_num(struct dwc2_hsotg_ep *hs_ep)
 {
+	struct dwc2_hsotg *hsotg = hs_ep->parent;
+	u32 current_frame = dwc2_hsotg_read_frameno(hsotg);
+
 	hs_ep->target_frame += hs_ep->interval;
 	if (hs_ep->target_frame > DSTS_SOFFN_LIMIT) {
 		hs_ep->frame_overrun = 1;
 		hs_ep->target_frame &= DSTS_SOFFN_LIMIT;
-	} else {
+	} else if (current_frame <= hs_ep->target_frame) {
 		hs_ep->frame_overrun = 0;
 	}
 }
@@ -524,23 +544,6 @@ static unsigned get_ep_limit(struct dwc2_hsotg_ep *hs_ep)
 	return maxsize;
 }
 
-/**
-* dwc2_hsotg_read_frameno - read current frame number
-* @hsotg: The device instance
-*
-* Return the current frame number
-*/
-static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg)
-{
-	u32 dsts;
-
-	dsts = dwc2_readl(hsotg->regs + DSTS);
-	dsts &= DSTS_SOFFN_MASK;
-	dsts >>= DSTS_SOFFN_SHIFT;
-
-	return dsts;
-}
-
 /**
  * dwc2_hsotg_start_req - start a USB request from an endpoint's queue
  * @hsotg: The controller state.

From 13462a1fd1984caf052b3aeee05eeaa441406a07 Mon Sep 17 00:00:00 2001
From: xiaoyao <xiaoyao@rock-chips.com>
Date: Thu, 26 Jul 2018 18:09:41 +0800
Subject: [PATCH 0696/1852] net: wifi: clk: rk3308: Add external clock instead
 of crystal vibration

Change-Id: Iadc3c1976fe09060308cca9bde11f4fab5fd47e2
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
---
 include/linux/rfkill-wlan.h |  2 ++
 net/rfkill/rfkill-wlan.c    | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/include/linux/rfkill-wlan.h b/include/linux/rfkill-wlan.h
index 92f9522bef74a..2cead6d09a152 100644
--- a/include/linux/rfkill-wlan.h
+++ b/include/linux/rfkill-wlan.h
@@ -5,6 +5,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/clk.h>
 
 struct rksdmmc_iomux {
     char    *name;  //set the MACRO of gpio
@@ -42,6 +43,7 @@ struct rksdmmc_gpio_wifi_moudle {
     struct rksdmmc_gpio   ANTSEL3;  //pin6--ANTSEL3 
     struct rksdmmc_gpio   GPS_LAN;  //pin33--GPS_LAN
     struct regmap *grf;
+	struct clk *ext_clk;
 };
 
 enum {
diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c
index f8ee30532b8c9..7c1e3da3383a3 100644
--- a/net/rfkill/rfkill-wlan.c
+++ b/net/rfkill/rfkill-wlan.c
@@ -597,6 +597,7 @@ static int wlan_platdata_parse_dt(struct device *dev,
     u32 value;
     int gpio,ret;
     enum of_gpio_flags flags;
+	u32 ext_clk_value = 0;
 
     if (!node)
         return -ENODEV;
@@ -677,6 +678,28 @@ static int wlan_platdata_parse_dt(struct device *dev,
         } else data->wifi_int_b.io = -1;
 	}
 
+	data->ext_clk = devm_clk_get(dev, "clk_wifi");
+	if (IS_ERR(data->ext_clk)) {
+		LOG("%s: The ref_wifi_clk not found !\n", __func__);
+	} else {
+		of_property_read_u32(node, "ref-clock-frequency",
+				     &ext_clk_value);
+		if (ext_clk_value > 0) {
+			ret = clk_set_rate(data->ext_clk, ext_clk_value);
+			if (ret)
+				LOG("%s: set ref clk error!\n", __func__);
+			ret = clk_prepare_enable(data->ext_clk);
+			if (ret)
+				LOG("%s: enable ref clk error!\n", __func__);
+			/* WIFI clock (REF_CLKOUT) output enable.
+			 * 1'b0: drive disable
+			 * 1'b1: output enable
+			 */
+			if (of_machine_is_compatible("rockchip,rk3308"))
+				regmap_write(data->grf, 0x0314, 0x00020002);
+		}
+	}
+
     return 0;
 }
 #endif //CONFIG_OF

From 8646fbcbd5b88571cff4c89b26a79b3d21bfdece Mon Sep 17 00:00:00 2001
From: xiaoyao <xiaoyao@rock-chips.com>
Date: Thu, 26 Jul 2018 18:12:52 +0800
Subject: [PATCH 0697/1852] ARM: dts: rockchip: wireless-wlan support ext clk
 for rk3308-voice-module-mainboard-v10-aarch32

Change-Id: I13bf086f7b8f58606609e16e3ce0acac13f6dbc1
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
---
 .../boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi    | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
index 85e11b26617a6..8d70f702402e1 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
@@ -26,6 +26,9 @@
 	wireless-wlan {
 		compatible = "wlan-platdata";
 		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_WIFI>;
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&wifi_wake_host>;
 		wifi_chip_type = "rtl8723ds";

From aeb3d6675be43cc8c08e33fd3f9d95e8df2a902f Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Wed, 25 Jul 2018 15:47:26 +0800
Subject: [PATCH 0698/1852] Bluetooth: hci_ldisc: fix race between open, close
 and send data

Fix the bug below, it may be reproduced after open and close bt about 7000 times:

<1>[73036.938137] Unable to handle kernel NULL pointer dereference at virtual address 0000001c
<1>[73036.939316] pgd = ffffff800886d000
<1>[73036.939627] [0000001c] *pgd=000000000fffe003, *pud=000000000fffe003, *pmd=0000000000000000
<0>[73036.940396] Internal error: Oops: 96000006 [#1] PREEMPT SMP
<4>[73036.940899] Modules linked in:
<4>[73036.941193] CPU: 2 PID: 2989 Comm: kworker/2:2 Not tainted 4.4.138 #3
<4>[73036.942409] Workqueue: events hci_uart_write_work
<4>[73036.942836] task: ffffffc00d688ac0 task.stack: ffffffc00b184000
<4>[73036.943365] PC is at _raw_spin_lock_irqsave+0x1c/0x50
<4>[73036.943815] LR is at skb_dequeue+0x20/0x74
<4>[73036.944185] pc : [<ffffff8008576398>] lr : [<ffffff800840f9a4>] pstate: 800001c5
<4>[73036.944832] sp : ffffffc00b187d00
<4>[73036.945127] x29: ffffffc00b187d00 x28: 0000000000000000
<4>[73036.945620] x27: 0000000000000000 x26: 0000000000000000
<4>[73036.946114] x25: ffffffc00e1280e0 x24: ffffffc00038d000
<4>[73036.946606] x23: ffffffc00e1271f8 x22: ffffffc00e127f00
<4>[73036.947099] x21: 000000000000001c x20: 0000000000000008
<4>[73036.947592] x19: 0000000000000000 x18: 0000000000000000
<4>[73036.948086] x17: 0000007fade08530 x16: ffffff80080e308c
<4>[73036.948579] x15: 0000000000000000 x14: 65736f6c63207568
<4>[73036.949073] x13: 205d303537373339 x12: 2e36333033375b0a
<4>[73036.949566] x11: 3220746e63666572 x10: 00000000000006f0
<4>[73036.950060] x9 : ffffffc00b187d30 x8 : ffffffc00d689210
<4>[73036.950553] x7 : 0000000000002d31 x6 : 0000000000000400
<4>[73036.951046] x5 : 0000000000113d82 x4 : 0000000000002f32
<4>[73036.951539] x3 : 0000000000000140 x2 : ffffffc00d688ac0
<4>[73036.952032] x1 : 0000000000000001 x0 : 000000000000001c
<4>[73037.068289] [<ffffff8008576398>] _raw_spin_lock_irqsave+0x1c/0x50
<4>[73037.068858] [<ffffff8008377094>] h4_dequeue+0x14/0x1c
<4>[73037.069335] [<ffffff8008376924>] hci_uart_write_work+0x50/0x12c
<4>[73037.069893] [<ffffff80080abbc8>] process_one_work+0x1b0/0x294
<4>[73037.070426] [<ffffff80080ac920>] worker_thread+0x2d8/0x398
<4>[73037.070935] [<ffffff80080b0f28>] kthread+0xc8/0xd8
<4>[73037.071388] [<ffffff8008082e80>] ret_from_fork+0x10/0x50

	thread0               		thread1
	   |				   |
	hci_uart_tty_close		hci_uart_write_work
	   |				   |
	h4_close			h4_dequeue
	   |				   |
	free (h4_struct) h4		   |
	   |             _raw_spin_lock_irqsave access h4 null pointer

Change-Id: I61d8ad5fb4c9349e0a304d2e87332681240f22e2
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 drivers/bluetooth/hci_ldisc.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 61bb2192a80b0..9c4c9d299599f 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -142,6 +142,11 @@ static void hci_uart_write_work(struct work_struct *work)
 	struct hci_dev *hdev = hu->hdev;
 	struct sk_buff *skb;
 
+	if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
+		clear_bit(HCI_UART_SENDING, &hu->tx_state);
+		return;
+	}
+
 	/* REVISIT: should we cope with bad skbs or ->write() returning
 	 * and error value ?
 	 */
@@ -250,6 +255,9 @@ static int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb)
 
 	BT_DBG("%s: type %d len %d", hdev->name, bt_cb(skb)->pkt_type, skb->len);
 
+	if (!test_bit(HCI_UART_PROTO_READY, &hu->flags))
+		return -EUNATCH;
+
 	hu->proto->enqueue(hu, skb);
 
 	hci_uart_tx_wakeup(hu);
@@ -495,9 +503,9 @@ static void hci_uart_tty_close(struct tty_struct *tty)
 	if (hdev)
 		hci_uart_close(hdev);
 
-	cancel_work_sync(&hu->write_work);
-
 	if (test_and_clear_bit(HCI_UART_PROTO_READY, &hu->flags)) {
+		cancel_work_sync(&hu->write_work);
+
 		if (hdev) {
 			if (test_bit(HCI_UART_REGISTERED, &hu->flags))
 				hci_unregister_dev(hdev);
@@ -644,15 +652,15 @@ static int hci_uart_set_proto(struct hci_uart *hu, int id)
 		return err;
 
 	hu->proto = p;
-	set_bit(HCI_UART_PROTO_READY, &hu->flags);
 
 	err = hci_uart_register_dev(hu);
 	if (err) {
-		clear_bit(HCI_UART_PROTO_READY, &hu->flags);
 		p->close(hu);
 		return err;
 	}
 
+	set_bit(HCI_UART_PROTO_READY, &hu->flags);
+
 	return 0;
 }
 

From 846c243939d42d0d546adbe7210523e91fef875b Mon Sep 17 00:00:00 2001
From: Jian Qiu <qiujian@rock-chips.com>
Date: Mon, 30 Jul 2018 08:56:00 +0800
Subject: [PATCH 0699/1852] staging: android: sync: fix CVE-2016-6684

CVE-2016-6684

An information disclosure vulnerability in Sync could enable a local
malicious application to access data outside of its permission levels.
The format specifier %p can leak kernel addresses while not valuing
the kptr_restrict system settings.
The fix is designed to use %pK instead of %p, which also evaluates
whether kptr_restrict is set.

Change-Id: I6d52a4d6193770b3fa1479a1086a5d73a210de07
Signed-off-by: Jian Qiu <qiujian@rock-chips.com>
---
 drivers/staging/android/sync.c       | 4 ++--
 drivers/staging/android/sync_debug.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/android/sync.c b/drivers/staging/android/sync.c
index da101a506cd26..9b8d17ce3a5eb 100644
--- a/drivers/staging/android/sync.c
+++ b/drivers/staging/android/sync.c
@@ -390,7 +390,7 @@ int sync_fence_wait(struct sync_fence *fence, long timeout)
 		return ret;
 	} else if (ret == 0) {
 		if (timeout) {
-			pr_info("fence timeout on [%p] after %dms\n", fence,
+			pr_info("fence timeout on [%pK] after %dms\n", fence,
 				jiffies_to_msecs(timeout));
 			sync_dump();
 		}
@@ -399,7 +399,7 @@ int sync_fence_wait(struct sync_fence *fence, long timeout)
 
 	ret = atomic_read(&fence->status);
 	if (ret) {
-		pr_info("fence error %ld on [%p]\n", ret, fence);
+		pr_info("fence error %ld on [%pK]\n", ret, fence);
 		sync_dump();
 	}
 	return ret;
diff --git a/drivers/staging/android/sync_debug.c b/drivers/staging/android/sync_debug.c
index 91ed2c4cff45b..efdb9f01d0df6 100644
--- a/drivers/staging/android/sync_debug.c
+++ b/drivers/staging/android/sync_debug.c
@@ -149,7 +149,7 @@ static void sync_print_fence(struct seq_file *s, struct sync_fence *fence)
 	unsigned long flags;
 	int i;
 
-	seq_printf(s, "[%p] %s: %s\n", fence, fence->name,
+	seq_printf(s, "[%pK] %s: %s\n", fence, fence->name,
 		   sync_status_str(atomic_read(&fence->status)));
 
 	for (i = 0; i < fence->num_fences; ++i) {
@@ -169,7 +169,7 @@ static void sync_print_fence(struct seq_file *s, struct sync_fence *fence)
 
 		waiter = container_of(pos, struct sync_fence_waiter, work);
 
-		seq_printf(s, "waiter %pF\n", waiter->callback);
+		seq_printf(s, "waiter %pK\n", waiter->callback);
 	}
 	spin_unlock_irqrestore(&fence->wq.lock, flags);
 }

From 435352c31d1bb21d939ddfb16aca069c4c78e98a Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Mon, 30 Jul 2018 15:36:23 +0800
Subject: [PATCH 0700/1852] net: wireless: rockchip_wlan: ssv6051 remove debug
 log

Change-Id: I989a0375daf7c7f4885fa1a3213be2dbada18781
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
index a063928f79e11..119b175cd1536 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
@@ -4836,14 +4836,12 @@ static void _proc_data_rx_skb (struct ssv_softc *sc, struct sk_buff *rx_skb)
       struct ieee80211_mgmt *mgmt_tmp = NULL;
       mgmt_tmp = (struct ieee80211_mgmt *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
       mgmt_tmp->u.beacon.timestamp = cpu_to_le64(ssv6200_get_systime_us());  
-      printk("beacon timestamp = %lld\n", mgmt_tmp->u.beacon.timestamp);
    }
    if (is_probe_resp)
    {
        struct ieee80211_mgmt *mgmt_tmp = NULL;
       mgmt_tmp = (struct ieee80211_mgmt *)(rx_skb->data + SSV6XXX_RX_DESC_LEN);
       mgmt_tmp->u.probe_resp.timestamp = cpu_to_le64(ssv6200_get_systime_us());
-      printk("probe_resp timestamp = %lld\n", mgmt_tmp->u.probe_resp.timestamp);
    }
 
     if (rxdesc->rate_idx < SSV62XX_G_RATE_INDEX && rxphypad->RSVD == 0)

From e29862d2fb02fef7d407c0528b4c51e8709c64ac Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 27 Jul 2018 19:46:07 +0800
Subject: [PATCH 0701/1852] clk: Fix error parent when show and change parent
 clock

This patch fixes the following crash:

Internal error: Accessing user space memory outside uaccess.h routines:
96000005 [#1] PREEMPT SMP
Modules linked in: bcmdhd
CPU: 2 PID: 1293 Comm: cat Not tainted 4.4.138 #873
Hardware name: Rockchip PX30 evb ddr3 board (DT)
task: ffffffc044f0de80 task.stack: ffffffc044040000
PC is at clock_available_parent_show+0x58/0x78
LR is at seq_read+0x120/0x404
pc : [<ffffff800885a470>] lr : [<ffffff80081e2128>] pstate: 80400145
sp : ffffffc044043cd0
x29: ffffffc044043cd0 x28: ffffffc053f8c880
x27: ffffffc044fce400 x26: ffffffc044043d78
x25: ffffffc044043eb0 x24: 0000005b07cd4868
x23: ffffff8009196000 x22: ffffffc00a28d100
x21: ffffff8008f89317 x20: ffffffc053f8c840
x19: 0000000000000000 x18: 00000075016fd000
x17: 0000007501694f4c x16: ffffff80081c0dac
x15: aaaaaaaaaaaaaaab x14: 0000007501000000
x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000001 x10: 0101010101010101
x9 : 0000000000001000 x8 : 000000000000003f
x7 : ffffff8009196000 x6 : ffffff80081e2008
x5 : ffffff8008c75170 x4 : 0000000000000000
x3 : 0000000000000000 x2 : ffffff800885a418
x1 : 0000000000000001 x0 : 0000000000000000

Internal error: Accessing user space memory outside uaccess.h routines:
96000005 [#1] PREEMPT SMP
Modules linked in: bcmdhd
CPU: 1 PID: 1036 Comm: sh Not tainted 4.4.138 #871
Hardware name: Rockchip PX30 evb ddr3 board (DT)
task: ffffffc04c2e1b00 task.stack: ffffffc052868000
PC is at clock_parent_write+0x100/0x158
LR is at clock_parent_write+0xe4/0x158
pc : [<ffffff800885c310>] lr : [<ffffff800885c2f4>] pstate: 80400145
sp : ffffffc05286bb40
x29: ffffffc05286bb40 x28: ffffffc04c2e1b00
x27: ffffff8008b62000 x26: 0000000000000040
x25: 000000000000011d x24: ffffffc00a28d100
x23: ffffff8009196000 x22: 0000000000000008
x21: ffffff8009196000 x20: 0000000000000000
x19: 000000000000000e x18: 0000007a98c56000
x17: 0000007a98bee57c x16: ffffff80081c0e68
x15: aaaaaaaaaaaaaaab x14: 0000007a98600000
x13: 000000000000000d x12: 0000000000000019
x11: 0000000000000000 x10: 0000000000000001
x9 : 0000000000000000 x8 : ffffff80091c5850
x7 : ffffff80093efcd0 x6 : ffffffc05286bb96
x5 : ffffffc05286bb96 x4 : 0000000000000140
x3 : ffffffc052873b87 x2 : cb88537fdc8ba68a
x1 : 0000000000000000 x0 : 0000000000000000

Fixes: cd6fa34b83d7 ("clk: add/modify debugfs support for clocks")
Change-Id: I5988376845ef5ad096219c548055972c0998e02c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/clk.c | 36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index f674703bdf86c..221d521bb00d6 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2170,28 +2170,26 @@ static int clock_debug_rate_get(void *data, u64 *val)
 DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_debug_rate_get,
 			clock_debug_rate_set, "%llu\n");
 
-static int clock_available_parent_show(struct seq_file *s, void *data)
+static int possible_parents_show(struct seq_file *s, void *data)
 {
-	struct clk_core *core = (struct clk_core *)s->private;
+	struct clk_core *core = s->private;
 	int i;
 
-	for (i = 0; i < core->num_parents; i++) {
-		if (!core->parents[i])
-			continue;
-		seq_printf(s, "%s ", core->parents[i]->name);
-	}
-	seq_puts(s, "\n");
+	for (i = 0; i < core->num_parents - 1; i++)
+		seq_printf(s, "%s ", core->parent_names[i]);
+
+	seq_printf(s, "%s\n", core->parent_names[i]);
 
 	return 0;
 }
 
-static int clock_available_parent_open(struct inode *inode, struct file *file)
+static int possible_parents_open(struct inode *inode, struct file *file)
 {
-	return single_open(file, clock_available_parent_show, inode->i_private);
+	return single_open(file, possible_parents_show, inode->i_private);
 }
 
-static const struct file_operations clock_available_parent_fops = {
-	.open		= clock_available_parent_open,
+static const struct file_operations possible_parents_fops = {
+	.open		= possible_parents_open,
 	.read		= seq_read,
 	.llseek		= seq_lseek,
 	.release	= single_release,
@@ -2224,6 +2222,9 @@ static ssize_t clock_parent_write(struct file *filp, const char __user *buf,
 	if (ret != 1)
 		return -EINVAL;
 
+	if (core->num_parents <= 1)
+		return cnt;
+
 	for (i = 0; i < core->num_parents; i++) {
 		if (!core->parents[i])
 			continue;
@@ -2400,10 +2401,13 @@ static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
 	if (!d)
 		goto err_out;
 
-	d = debugfs_create_file("clk_available_parent", S_IRUGO, core->dentry,
-				core, &clock_available_parent_fops);
-	if (!d)
-		goto err_out;
+	if (core->num_parents > 1) {
+		d = debugfs_create_file("clk_possible_parents", S_IRUGO,
+					core->dentry, core,
+					&possible_parents_fops);
+		if (!d)
+			goto err_out;
+	}
 
 	d = debugfs_create_file("clk_parent", S_IRUGO  | S_IWUSR, core->dentry,
 				core, &clock_parent_fops);

From 7e548387c4fc41b4c7640fbe8da19edb48fe6f53 Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers@google.com>
Date: Fri, 3 Mar 2017 15:40:12 -0800
Subject: [PATCH 0702/1852] tracing: do not leak kernel addresses

CVE-2017-0630

This likely breaks tracing tools like trace-cmd.  It logs in the same
format but now addresses are all 0x0.

Bug: 34277115
Change-Id: Ifb0d4d2a184bf0d95726de05b1acee0287a375d9
Signed-off-by: Jian Qiu <qiujian@rock-chips.com>
---
 kernel/trace/trace_printk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/trace/trace_printk.c b/kernel/trace/trace_printk.c
index ad1d6164e9460..e82cff5c842c6 100644
--- a/kernel/trace/trace_printk.c
+++ b/kernel/trace/trace_printk.c
@@ -304,7 +304,7 @@ static int t_show(struct seq_file *m, void *v)
 	if (!*fmt)
 		return 0;
 
-	seq_printf(m, "0x%lx : \"", *(unsigned long *)fmt);
+	seq_printf(m, "0x%lx : \"", 0L);
 
 	/*
 	 * Tabs and new lines need to be converted.

From b053ac2915bb6bf2d66245e66ae1c3cf903cfe28 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Fri, 27 Jul 2018 17:50:35 +0800
Subject: [PATCH 0703/1852] ARM: dts: rockchip: rk3308-dot-v10-aarch32: wifi
 ext_clk_freq change to ref-clock-frequency

Change-Id: I2e796ba38736cc7da40436fcd8635f2ab4e0dbd5
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
index 57124b97caeeb..813a2d0fded4e 100644
--- a/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
@@ -164,7 +164,7 @@
 		rockchip,grf = <&grf>;
 		clocks = <&cru SCLK_WIFI>;
 		clock-names = "clk_wifi";
-		ext_clk_freq = <24000000>;
+		ref-clock-frequency = <24000000>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&wifi_wake_host>;
 		wifi_chip_type = "rtl8723ds";

From 10f9bb4b4843dccf2e4c49d00925731d2af0fdcc Mon Sep 17 00:00:00 2001
From: Jaehoon Chung <jh80.chung@samsung.com>
Date: Thu, 3 Nov 2016 15:21:34 +0900
Subject: [PATCH 0704/1852] UPSTREAM: arm64: dts: rockchip: replace to
 "max-frequency" instead of "clock-freq-min-max"

In drivers/mmc/core/host.c, there is "max-freqeuncy" property.
It should be same behavior, So Use the "max-frequency" instead of
"clock-freq-min-max".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c49590691f3819bb6be3f77938ef39038eb76643)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts

Change-Id: I92f321b167cf4af9bb91e4814e797f0429ad80af
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +++---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 46617af933392..55692ae3647ea 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -509,7 +509,7 @@
 	sdmmc: dwmmc@ff0c0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0c0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -521,7 +521,7 @@
 	sdio0: dwmmc@ff0d0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0d0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -533,7 +533,7 @@
 	emmc: dwmmc@ff0f0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0f0000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9d1b3904ef5e5..fdef9c01a48ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -294,7 +294,7 @@
 			     "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe310000 0x0 0x4000>;
 		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -308,7 +308,7 @@
 			     "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe320000 0x0 0x4000>;
 		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";

From f7bf6b1a6ff28799219122b0d939c86c19ff77a3 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Fri, 26 Aug 2016 08:00:44 +0800
Subject: [PATCH 0705/1852] UPSTREAM: arm64: dts: rockchip: set to CCI clock of
 RK3399 to 600M

Per testing, this can reduce the memory latency and d8 gets
better scores.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit bb4b6201d21653c99e41d1e57b3b26524be0e87e)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I6f305e0bc60a91f18f606fb7a8012d80fcd378b5
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index fdef9c01a48ed..bedae782ee533 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1486,7 +1486,7 @@
 			<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
 			<&cru PCLK_PERIHP>,
 			<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
-			<&cru PCLK_PERILP0>,
+			<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
 			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
 		assigned-clock-rates =
 			 <400000000>,  <200000000>,
@@ -1497,7 +1497,7 @@
 			 <150000000>,   <75000000>,
 			  <37500000>,
 			 <100000000>,  <100000000>,
-			  <50000000>,
+			  <50000000>, <600000000>,
 			 <100000000>,   <50000000>;
 	};
 

From 8af749bda7f2b407b3789cd86378451694ae554d Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Mon, 12 Mar 2018 09:50:48 +0800
Subject: [PATCH 0706/1852] UPSTREAM: arm64: dts: rockchip: assign clock rate
 for ACLK_VIO on rk3399

The ACLK_VIO is a parent clock used by a several children,
its suggested clock rate is 400MHz. Right now it gets 400MHz
because it sources from CPLL(800M) and divides by 2 after reset.
It's good not to rely on default values like this, so let's
explicitly set it.
NOTE: it's expected that at least one board may override cru node and
set the CPLL to 1.6 GHz. On that board it will be very important to be
explicit about aclk-vio being 400 MHz.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 3f7f3b0fb4563947424673d9b6786f46111462d9)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi

Change-Id: Iadd22356e399e8d9b3a1f2bec981f2b41d813f3c
---
 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 21 ++++++++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3399.dtsi     |  6 ++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 41ae17e5ea473..58bcc6a9e4d34 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -515,6 +515,27 @@
 	cpu-supply = <&ppvar_bigcpu>;
 };
 
+&cru {
+	assigned-clocks =
+		<&cru PLL_GPLL>, <&cru PLL_CPLL>,
+		<&cru PLL_NPLL>,
+		<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
+		<&cru PCLK_PERIHP>,
+		<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
+		<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
+		<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
+		<&cru ACLK_VIO>;
+	assigned-clock-rates =
+		<600000000>, <800000000>,
+		<1000000000>,
+		<150000000>, <75000000>,
+		<37500000>,
+		<100000000>, <100000000>,
+		<50000000>, <800000000>,
+		<100000000>, <50000000>,
+		<400000000>;
+};
+
 &emmc_phy {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index bedae782ee533..13713424531f3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1487,7 +1487,8 @@
 			<&cru PCLK_PERIHP>,
 			<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
 			<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
-			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
+			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
+			<&cru ACLK_VIO>;
 		assigned-clock-rates =
 			 <400000000>,  <200000000>,
 			 <400000000>,  <200000000>,
@@ -1498,7 +1499,8 @@
 			  <37500000>,
 			 <100000000>,  <100000000>,
 			  <50000000>, <600000000>,
-			 <100000000>,   <50000000>;
+			 <100000000>,   <50000000>,
+			 <400000000>;
 	};
 
 	grf: syscon@ff770000 {

From f0c92ab0816fd4b9e70c6e515e334eab7e943cb6 Mon Sep 17 00:00:00 2001
From: Lin Huang <hl@rock-chips.com>
Date: Tue, 20 Mar 2018 10:06:29 +0800
Subject: [PATCH 0707/1852] UPSTREAM: arm64: dts: rockchip: assign clock rate
 for cpll child clocks on rk3399

These clocks do not assign default clock frequency, and use the
default cru register value to get frequency, so if cpll increase
frequency, these clocks also increase their frequency, that may
exceed their signed off frequency. So assign default clock for
them to avoid it.

NOTE: on none of the boards currently in mainline do we expect
CPLL to be anything other than 800 MHz, but some future boards
might have it. It's still good to be explicit about the clock
rates to make diffing against future boards easier and also to
rely less on BIOS muxing.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit e702e13f0b4ffbe3178a39bb878b37121cbd05e2)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: If6a2341e2797f3c35f90fe1c621b1df13632694e
---
 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi |  8 ++++++--
 arch/arm64/boot/dts/rockchip/rk3399.dtsi     | 14 ++++++++++----
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 58bcc6a9e4d34..cc38780344756 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -524,7 +524,9 @@
 		<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
 		<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
 		<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
-		<&cru ACLK_VIO>;
+		<&cru ACLK_VIO>, <&cru ACLK_HDCP>,
+		<&cru ACLK_GIC_PRE>,
+		<&cru PCLK_DDR>;
 	assigned-clock-rates =
 		<600000000>, <800000000>,
 		<1000000000>,
@@ -533,7 +535,9 @@
 		<100000000>, <100000000>,
 		<50000000>, <800000000>,
 		<100000000>, <50000000>,
-		<400000000>;
+		<400000000>, <400000000>,
+		<200000000>,
+		<200000000>;
 };
 
 &emmc_phy {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 13713424531f3..476fdacd4d601 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -309,6 +309,8 @@
 		reg = <0x0 0xfe320000 0x0 0x4000>;
 		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
 		max-frequency = <150000000>;
+		assigned-clocks = <&cru HCLK_SD>;
+		assigned-clock-rates = <200000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -465,8 +467,8 @@
 		compatible = "rockchip,rk3399-cdn-dp";
 		reg = <0x0 0xfec00000 0x0 0x100000>;
 		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
-		assigned-clocks = <&cru SCLK_DP_CORE>;
-		assigned-clock-rates = <100000000>;
+		assigned-clocks = <&cru SCLK_DP_CORE>, <&cru SCLK_SPDIF_REC_DPTX>;
+		assigned-clock-rates = <100000000>, <200000000>;
 		clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
 			 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
 		clock-names = "core-clk", "pclk", "spdif", "grf";
@@ -1488,7 +1490,9 @@
 			<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
 			<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
 			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
-			<&cru ACLK_VIO>;
+			<&cru ACLK_VIO>, <&cru ACLK_HDCP>,
+			<&cru ACLK_GIC_PRE>,
+			<&cru PCLK_DDR>;
 		assigned-clock-rates =
 			 <400000000>,  <200000000>,
 			 <400000000>,  <200000000>,
@@ -1500,7 +1504,9 @@
 			 <100000000>,  <100000000>,
 			  <50000000>, <600000000>,
 			 <100000000>,   <50000000>,
-			 <400000000>;
+			 <400000000>, <400000000>,
+			 <200000000>,
+			 <200000000>;
 	};
 
 	grf: syscon@ff770000 {

From d34fb16a9cc71581a1ffe41220c6d94f1c270b5c Mon Sep 17 00:00:00 2001
From: Herman Chen <herman.chen@rock-chips.com>
Date: Tue, 10 Jul 2018 16:48:32 +0800
Subject: [PATCH 0708/1852] video: rockchip: Fix error on device remove

Fix vcodec_remove errors:
1. vcodec_remove needs to call corresponding subdev remove according to
subdev count.
2. Kernel vpu_session has to be freed with main device rather than
subdev remove.
3. Workqueue should be clear on device remove.
4. devfreq_unregister_opp_notifier and dev_pm_opp_of_remove_table
should be call to insure next insmod's success.
5. These is a great defect on subdev probe: the subdev has no
corresponding driver. The connection on main device and subdev is only
the dts name. This should be fixed in next framework. And now we have
to clear the resource allocated in subdev then we can insure next
insmod's success.

Change-Id: I336331e9e88564a5602796755f02af1786ddd7f9
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
---
 .../video/rockchip/vcodec/vcodec_service.c    | 112 ++++++++++++++----
 1 file changed, 88 insertions(+), 24 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index e18693586972c..accf449273e4e 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -111,6 +111,7 @@
 #define RK3328_CABAC_RATE_OFF			(100 * MHZ)
 
 #define FALLBACK_STATIC_TEMPERATURE		55000
+#define MAX_VCODEC_SUBDEV_COUNT			2
 
 static int debug;
 module_param(debug, int, S_IRUGO | S_IWUSR);
@@ -300,6 +301,7 @@ struct vpu_subdev_data {
 	int irq_dec;
 	struct vpu_service_info *pservice;
 
+	struct resource *res;
 	u32 *regs;
 	enum VCODEC_RUNNING_MODE mode;
 	struct list_head lnk_service;
@@ -424,6 +426,7 @@ struct vpu_service_info {
 	char *name;
 
 	u32 subcnt;
+	struct platform_device *sub_pdev[MAX_VCODEC_SUBDEV_COUNT];
 	struct list_head subdev_list;
 
 	u32 alloc_type;
@@ -538,7 +541,8 @@ static void vcodec_enter_mode(struct vpu_subdev_data *data)
 	 * For the RK3228H, it is not necessary to write a register to
 	 * switch vpu combo mode, it is unsafe to write the grf.
 	 */
-	if (pservice->subcnt < 2 || pservice->mode_ctrl == 0) {
+	if (pservice->subcnt < MAX_VCODEC_SUBDEV_COUNT ||
+	    pservice->mode_ctrl == 0) {
 		if (data->mmu_dev && !test_bit(MMU_ACTIVATED, &data->state)) {
 			set_bit(MMU_ACTIVATED, &data->state);
 
@@ -1945,7 +1949,7 @@ static int vpu_service_check_hw(struct vpu_subdev_data *data)
 	u32 hw_id = readl_relaxed(data->regs);
 
 	hw_id = (hw_id >> 16) & 0xFFFF;
-	dev_info(data->dev, "checking hw id %x\n", hw_id);
+	dev_dbg(data->dev, "checking hw id %x\n", hw_id);
 	data->hw_info = NULL;
 
 	for (i = 0; i < ARRAY_SIZE(vcodec_info_set); i++) {
@@ -2036,7 +2040,7 @@ static int vpu_service_release(struct inode *inode, struct file *filp)
 	filp->private_data = NULL;
 	mutex_unlock(&pservice->lock);
 
-	dev_info(pservice->dev, "closed\n");
+	dev_dbg(pservice->dev, "closed\n");
 	vpu_debug_leave();
 	return 0;
 }
@@ -2677,7 +2681,6 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 {
 	u8 *regs = NULL;
 	s32 ret = 0;
-	struct resource *res = NULL;
 	struct vpu_hw_info *hw_info = NULL;
 	struct device *dev = &pdev->dev;
 	struct device_node *np = pdev->dev.of_node;
@@ -2719,8 +2722,8 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 	}
 
 	if (!pservice->reg_base) {
-		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-		data->regs = devm_ioremap_resource(dev, res);
+		data->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+		data->regs = devm_ioremap_resource(dev, data->res);
 		if (IS_ERR(data->regs)) {
 			ret = PTR_ERR(data->regs);
 			goto err;
@@ -2762,8 +2765,6 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 			(dev, vcodec_iovmm_fault_hdl);
 	}
 
-	dev_info(dev, "vpu mmu dec %p\n", data->mmu_dev);
-
 #define BIT_VCODEC_CLK_SEL	BIT(10)
 	if (of_machine_is_compatible("rockchip,rk3126") ||
 	    of_machine_is_compatible("rockchip,rk3128"))
@@ -2777,8 +2778,10 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 	of_property_read_u32(np, "allocator", (u32 *)&pservice->alloc_type);
 	data->iommu_info = vcodec_iommu_info_create(dev, data->mmu_dev,
 						    pservice->alloc_type);
-	dev_info(dev, "allocator is %s\n", pservice->alloc_type == 1 ? "drm" :
-		(pservice->alloc_type == 2 ? "ion" : "null"));
+	dev_info(dev, "%s allocator with mmu %s\n",
+		 pservice->alloc_type == 1 ? "drm" :
+		 (pservice->alloc_type == 2 ? "ion" : "null"),
+		 data->mmu_dev ? "enabled" : "disabled");
 	if (pservice->alloc_type == 1) {
 		struct vcodec_iommu_drm_info *drm_info =
 			data->iommu_info->private;
@@ -2902,27 +2905,56 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 	return -1;
 }
 
-static void vcodec_subdev_remove(struct vpu_subdev_data *data)
+static void vcodec_subdev_remove(struct platform_device *pdev)
 {
+	struct vpu_subdev_data *data = platform_get_drvdata(pdev);
 	struct vpu_service_info *pservice = data->pservice;
-	struct vpu_session *session = list_first_entry(&pservice->session,
-						       struct vpu_session,
-						       list_session);
-
-	vcodec_iommu_clear(data->iommu_info, session);
-	vcodec_iommu_info_destroy(data->iommu_info);
-	data->iommu_info = NULL;
-	kfree(session);
+	struct device *dev = &pdev->dev;
 
+	/* Insure device is power off and detached */
 	mutex_lock(&pservice->lock);
+	cancel_work_sync(&data->set_work);
 	cancel_delayed_work_sync(&pservice->power_off_work);
 	vpu_service_power_off(pservice);
 	mutex_unlock(&pservice->lock);
 
+	if (data->iommu_info) {
+		struct vpu_session *session =
+			list_first_entry(&pservice->session, struct vpu_session,
+					 list_session);
+
+		vcodec_iommu_clear(data->iommu_info, session);
+		vcodec_iommu_info_destroy(data->iommu_info);
+		data->iommu_info = NULL;
+	}
+
+	if (data->irq_enc > 0)
+		devm_free_irq(dev, data->irq_enc, (void *)data);
+
+	if (data->irq_dec > 0)
+		devm_free_irq(dev, data->irq_dec, (void *)data);
+
+	if (data->mmu_dev) {
+		platform_set_sysmmu(NULL, dev);
+		data->mmu_dev = NULL;
+	}
+
+	if (!pservice->reg_base && data->regs) {
+		struct resource *res = data->res;
+
+		devm_iounmap(dev, data->regs);
+		devm_release_mem_region(dev, res->start, resource_size(res));
+		data->regs = NULL;
+	}
+
 	device_destroy(data->cls, data->dev_t);
-	class_destroy(data->cls);
 	cdev_del(&data->cdev);
 	unregister_chrdev_region(data->dev_t, 1);
+	class_destroy(data->cls);
+
+	dev_info(dev, "removed");
+	platform_set_drvdata(pdev, NULL);
+	devm_kfree(dev, data);
 }
 
 static void vcodec_read_property(struct device_node *np,
@@ -2931,6 +2963,8 @@ static void vcodec_read_property(struct device_node *np,
 	pservice->mode_bit = 0;
 	pservice->mode_ctrl = 0;
 	pservice->subcnt = 0;
+	pservice->sub_pdev[0] = NULL;
+	pservice->sub_pdev[1] = NULL;
 
 	of_property_read_u32(np, "subcnt", &pservice->subcnt);
 
@@ -2938,6 +2972,10 @@ static void vcodec_read_property(struct device_node *np,
 		of_property_read_u32(np, "mode_bit", &pservice->mode_bit);
 		of_property_read_u32(np, "mode_ctrl", &pservice->mode_ctrl);
 	}
+	WARN_ON(pservice->subcnt > MAX_VCODEC_SUBDEV_COUNT);
+	/* Limit sub-device count to not larger than 2 */
+	if (pservice->subcnt > MAX_VCODEC_SUBDEV_COUNT)
+		pservice->subcnt = MAX_VCODEC_SUBDEV_COUNT;
 
 	pservice->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
 	if (IS_ERR_OR_NULL(pservice->grf)) {
@@ -3278,7 +3316,6 @@ static int vcodec_devfreq_notifier_call(struct notifier_block *nb,
 
 static int vcodec_probe(struct platform_device *pdev)
 {
-	int i;
 	int ret = 0;
 	const struct of_device_id *match = NULL;
 	struct resource *res = NULL;
@@ -3443,7 +3480,8 @@ static int vcodec_probe(struct platform_device *pdev)
 	list_add_tail(&session->list_session, &pservice->session);
 	mutex_unlock(&pservice->lock);
 
-	if (of_property_read_bool(np, "subcnt")) {
+	if (pservice->subcnt) {
+		u32 i;
 		struct vpu_subdev_data *data = NULL;
 
 		data = devm_kzalloc(dev, sizeof(struct vpu_subdev_data),
@@ -3457,12 +3495,14 @@ static int vcodec_probe(struct platform_device *pdev)
 		data->pservice = pservice;
 		platform_set_drvdata(pdev, data);
 
+		/* NOTE: only has max 2 sub device */
 		for (i = 0; i < pservice->subcnt; i++) {
 			struct device_node *sub_np;
 			struct platform_device *sub_pdev;
 
 			sub_np = of_parse_phandle(np, "rockchip,sub", i);
 			sub_pdev = of_find_device_by_node(sub_np);
+			pservice->sub_pdev[i] = sub_pdev;
 
 			vcodec_subdev_probe(sub_pdev, pservice);
 		}
@@ -3501,10 +3541,34 @@ static int vcodec_probe(struct platform_device *pdev)
 static int vcodec_remove(struct platform_device *pdev)
 {
 	struct vpu_subdev_data *data = platform_get_drvdata(pdev);
+	struct vpu_service_info *pservice = data->pservice;
+	struct vpu_session *session = list_first_entry(&pservice->session,
+						       struct vpu_session,
+						       list_session);
 
-	vcodec_subdev_remove(data);
+	/* Stop workqueue first */
+	if (pservice->set_workq) {
+		destroy_workqueue(pservice->set_workq);
+		pservice->set_workq = NULL;
+	}
+
+	/* Then remove sub device */
+	if (pservice->subcnt) {
+		u32 i;
+
+		for (i = 0; i < pservice->subcnt; i++)
+			vcodec_subdev_remove(pservice->sub_pdev[i]);
+	} else {
+		vcodec_subdev_remove(pdev);
+	}
+
+	kfree(session);
+
+	devfreq_unregister_opp_notifier(&pdev->dev, pservice->devfreq);
+	dev_pm_opp_of_remove_table(&pdev->dev);
 
 	pm_runtime_disable(data->pservice->dev);
+	wake_lock_destroy(&pservice->wake_lock);
 
 	return 0;
 }
@@ -3516,7 +3580,7 @@ static void vcodec_shutdown(struct platform_device *pdev)
 	int val;
 	int ret;
 
-	dev_info(&pdev->dev, "vcodec shutdown");
+	dev_info(&pdev->dev, "shutdown");
 
 	/*
 	 * just wait for hardware finishing his work

From 688b865b09474fe0fafcde7ac6fcc9cb5575f68b Mon Sep 17 00:00:00 2001
From: Tang Yun ping <typ@rock-chips.com>
Date: Thu, 26 Jul 2018 09:02:48 +0800
Subject: [PATCH 0709/1852] PM / devfreq: rockchip_dmc: add rk322x dfs init
 code

Change-Id: I5d81d19286dda9ddd096e648ec59370389c296e1
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
---
 drivers/devfreq/rockchip_dmc.c | 100 ++++++++++++++++++++++++++++++++-
 1 file changed, 97 insertions(+), 3 deletions(-)

diff --git a/drivers/devfreq/rockchip_dmc.c b/drivers/devfreq/rockchip_dmc.c
index 3989ba3210aa2..06591a609a64a 100644
--- a/drivers/devfreq/rockchip_dmc.c
+++ b/drivers/devfreq/rockchip_dmc.c
@@ -309,6 +309,52 @@ struct rk3128_ddr_dts_config_timing {
 	u32 available;
 };
 
+static const char * const rk3228_dts_timing[] = {
+	"dram_spd_bin",
+	"sr_idle",
+	"pd_idle",
+	"dram_dll_disb_freq",
+	"phy_dll_disb_freq",
+	"dram_odt_disb_freq",
+	"phy_odt_disb_freq",
+	"ddr3_drv",
+	"ddr3_odt",
+	"lpddr3_drv",
+	"lpddr3_odt",
+	"lpddr2_drv",
+	"phy_ddr3_clk_drv",
+	"phy_ddr3_cmd_drv",
+	"phy_ddr3_dqs_drv",
+	"phy_ddr3_odt",
+	"phy_lp23_clk_drv",
+	"phy_lp23_cmd_drv",
+	"phy_lp23_dqs_drv",
+	"phy_lp3_odt"
+};
+
+struct rk3228_ddr_dts_config_timing {
+	u32 dram_spd_bin;
+	u32 sr_idle;
+	u32 pd_idle;
+	u32 dram_dll_dis_freq;
+	u32 phy_dll_dis_freq;
+	u32 dram_odt_dis_freq;
+	u32 phy_odt_dis_freq;
+	u32 ddr3_drv;
+	u32 ddr3_odt;
+	u32 lpddr3_drv;
+	u32 lpddr3_odt;
+	u32 lpddr2_drv;
+	u32 phy_ddr3_clk_drv;
+	u32 phy_ddr3_cmd_drv;
+	u32 phy_ddr3_dqs_drv;
+	u32 phy_ddr3_odt;
+	u32 phy_lp23_clk_drv;
+	u32 phy_lp23_cmd_drv;
+	u32 phy_lp23_dqs_drv;
+	u32 phy_lp3_odt;
+};
+
 static const char * const rk3288_dts_timing[] = {
 	"ddr3_speed_bin",
 	"pd_idle",
@@ -1325,6 +1371,32 @@ static void of_get_rk3128_timings(struct device *dev,
 	of_node_put(np_tim);
 }
 
+static uint32_t of_get_rk3228_timings(struct device *dev,
+				      struct device_node *np, uint32_t *timing)
+{
+	struct device_node *np_tim;
+	u32 *p;
+	int ret = 0;
+	u32 i;
+
+	p = timing + DTS_PAR_OFFSET / 4;
+	np_tim = of_parse_phandle(np, "rockchip,dram_timing", 0);
+	if (!np_tim) {
+		ret = -EINVAL;
+		goto end;
+	}
+	for (i = 0; i < ARRAY_SIZE(rk3228_dts_timing); i++) {
+		ret |= of_property_read_u32(np_tim, rk3228_dts_timing[i],
+					p + i);
+	}
+end:
+	if (ret)
+		dev_err(dev, "of_get_ddr_timings: fail\n");
+
+	of_node_put(np_tim);
+	return ret;
+}
+
 static void of_get_rk3288_timings(struct device *dev,
 				  struct device_node *np, uint32_t *timing)
 {
@@ -1781,9 +1853,31 @@ static __maybe_unused int rk3128_dmc_init(struct platform_device *pdev,
 static __maybe_unused int rk3228_dmc_init(struct platform_device *pdev,
 					  struct rockchip_dmcfreq *dmcfreq)
 {
-	/*
-	 * dmc_init have been done in uboot.
-	 */
+	struct arm_smccc_res res;
+
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(sizeof(
+					struct rk3228_ddr_dts_config_timing),
+					4096) + 1, SHARE_PAGE_TYPE_DDR);
+	if (res.a0) {
+		dev_err(&pdev->dev, "no ATF memory for init\n");
+		return -ENOMEM;
+	}
+
+	ddr_psci_param = (struct share_params *)res.a1;
+	if (of_get_rk3228_timings(&pdev->dev, pdev->dev.of_node,
+				  (uint32_t *)ddr_psci_param))
+		return -ENOMEM;
+
+	ddr_psci_param->hz = 0;
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_INIT);
+
+	if (res.a0) {
+		dev_err(&pdev->dev, "rockchip_sip_config_dram_init error:%lx\n",
+			res.a0);
+		return -ENOMEM;
+	}
+
 	dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
 
 	return 0;

From 1147e5dc1d9744a37ff1e8c105cfb36d30213e15 Mon Sep 17 00:00:00 2001
From: Herman Chen <herman.chen@rock-chips.com>
Date: Thu, 12 Jul 2018 09:37:19 +0800
Subject: [PATCH 0710/1852] video: rockchip: Fix warning by checkpatch

Fix warning reported by checkpatch.sh

Change-Id: I3973c7387c64a2c3b5b21f311869fe58ed49597c
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
---
 .../video/rockchip/vcodec/vcodec_hw_info.h    |   4 +-
 drivers/video/rockchip/vcodec/vcodec_hw_rkv.h |  22 +--
 drivers/video/rockchip/vcodec/vcodec_hw_vpu.h |  11 +-
 .../video/rockchip/vcodec/vcodec_hw_vpu2.h    |  34 ++---
 .../video/rockchip/vcodec/vcodec_service.c    | 133 +++++++++---------
 5 files changed, 98 insertions(+), 106 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_info.h b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
index a394650a653fe..3904f718cf750 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_info.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
@@ -216,8 +216,8 @@ struct vcodec_info {
 };
 
 struct vcodec_device_info {
-	int32_t device_type;
-	int8_t *name;
+	s32 device_type;
+	s8 *name;
 };
 
 #define DEF_FMT_TRANS_TBL(fmt, args...) \
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h b/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
index ba0456a13ffa9..7a9acbc24d72d 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
@@ -38,10 +38,10 @@
 #define HEVC_DEC_BUFFER_EMPTY_BIT	BIT(16)
 #define HEVC_DEC_COLMV_ERROR_BIT	BIT(17)
 #define HEVC_DEC_ERR_MASK		(HEVC_DEC_BUS_ERROR_BIT \
-					|HEVC_DEC_STR_ERROR_BIT \
-					|HEVC_DEC_TIMEOUT_BIT \
-					|HEVC_DEC_BUFFER_EMPTY_BIT \
-					|HEVC_DEC_COLMV_ERROR_BIT)
+					| HEVC_DEC_STR_ERROR_BIT \
+					| HEVC_DEC_TIMEOUT_BIT \
+					| HEVC_DEC_BUFFER_EMPTY_BIT \
+					| HEVC_DEC_COLMV_ERROR_BIT)
 
 #define RKV_DEC_INTERRUPT_REGISTER	1
 #define RKV_DEC_INTERRUPT_BIT		BIT(8)
@@ -53,10 +53,10 @@
 #define RKV_DEC_BUFFER_EMPTY_BIT	BIT(16)
 #define RKV_DEC_COLMV_ERROR_BIT		BIT(17)
 #define RKV_DEC_ERR_MASK		(RKV_DEC_BUS_ERROR_BIT \
-					|RKV_DEC_STR_ERROR_BIT \
-					|RKV_DEC_TIMEOUT_BIT \
-					|RKV_DEC_BUFFER_EMPTY_BIT \
-					|RKV_DEC_COLMV_ERROR_BIT)
+					| RKV_DEC_STR_ERROR_BIT \
+					| RKV_DEC_TIMEOUT_BIT \
+					| RKV_DEC_BUFFER_EMPTY_BIT \
+					| RKV_DEC_COLMV_ERROR_BIT)
 
 static const enum FORMAT_TYPE rkv_dec_fmt_tbl[] = {
 	[0]  = FMT_H265D,
@@ -202,8 +202,8 @@ DEF_FMT_TRANS_TBL(rkv_vp9d,
 const struct vpu_trans_info trans_rkv[FMT_TYPE_BUTT] = {
 	EMPTY_FMT_TBL(FMT_JPEGD),
 	EMPTY_FMT_TBL(FMT_H263D),
-	SETUP_FMT_TBL(FMT_H264D , rkv_h264d),
-	SETUP_FMT_TBL(FMT_H265D , rkv_h265d),
+	SETUP_FMT_TBL(FMT_H264D, rkv_h264d),
+	SETUP_FMT_TBL(FMT_H265D, rkv_h265d),
 
 	EMPTY_FMT_TBL(FMT_MPEG1D),
 	EMPTY_FMT_TBL(FMT_MPEG2D),
@@ -212,7 +212,7 @@ const struct vpu_trans_info trans_rkv[FMT_TYPE_BUTT] = {
 	EMPTY_FMT_TBL(FMT_VP6D),
 	EMPTY_FMT_TBL(FMT_VP7D),
 	EMPTY_FMT_TBL(FMT_VP8D),
-	SETUP_FMT_TBL(FMT_VP9D  , rkv_vp9d),
+	SETUP_FMT_TBL(FMT_VP9D, rkv_vp9d),
 
 	EMPTY_FMT_TBL(FMT_PP),
 
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h b/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
index ae771b62a7c46..a00c97320911f 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
@@ -31,7 +31,6 @@
 #define REG_NUM_ENC_4831		(164)
 #define REG_SIZE_ENC_4831		(0x400)
 
-
 /* enable and gating register */
 #define VPU_REG_EN_ENC			14
 #define VPU_REG_ENC_GATE		2
@@ -58,9 +57,9 @@
 #define VPU_DEC_SLICE_DONE_BIT		BIT(17)
 #define VPU_DEC_TIMEOUT_BIT		BIT(18)
 #define VPU_DEC_ERR_MASK		(VPU_DEC_BUS_ERROR_BIT \
-					|VPU_DEC_BUFFER_EMPTY_BIT \
-					|VPU_DEC_STREAM_ERROR_BIT \
-					|VPU_DEC_TIMEOUT_BIT)
+					| VPU_DEC_BUFFER_EMPTY_BIT \
+					| VPU_DEC_STREAM_ERROR_BIT \
+					| VPU_DEC_TIMEOUT_BIT)
 
 #define VPU_PP_INTERRUPT_REGISTER	60
 #define VPU_PP_PIPELINE_MODE_BIT	BIT(1)
@@ -76,8 +75,8 @@
 #define VPU_ENC_BUFFER_FULL_BIT		BIT(5)
 #define VPU_ENC_TIMEOUT_BIT		BIT(6)
 #define VPU_ENC_ERR_MASK		(VPU_ENC_BUS_ERROR_BIT \
-					|VPU_ENC_BUFFER_FULL_BIT \
-					|VPU_ENC_TIMEOUT_BIT)
+					| VPU_ENC_BUFFER_FULL_BIT \
+					| VPU_ENC_TIMEOUT_BIT)
 
 static const enum FORMAT_TYPE vpu_dec_fmt_tbl[] = {
 	[0]  = FMT_H264D,
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
index 86c1e1682ec6d..96e2d49909935 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
@@ -54,9 +54,9 @@
 #define VPU2_DEC_STREAM_ERROR_BIT	BIT(12)
 #define VPU2_DEC_TIMEOUT_BIT		BIT(13)
 #define VPU2_DEC_ERR_MASK		(VPU2_DEC_BUS_ERROR_BIT \
-					|VPU2_DEC_BUFFER_EMPTY_BIT \
-					|VPU2_DEC_STREAM_ERROR_BIT \
-					|VPU2_DEC_TIMEOUT_BIT)
+					| VPU2_DEC_BUFFER_EMPTY_BIT \
+					| VPU2_DEC_STREAM_ERROR_BIT \
+					| VPU2_DEC_TIMEOUT_BIT)
 
 #define VPU2_PP_INTERRUPT_REGISTER	40
 #define VPU2_PP_INTERRUPT_BIT		BIT(0)
@@ -73,8 +73,8 @@
 #define VPU2_ENC_BUFFER_FULL_BIT	BIT(5)
 #define VPU2_ENC_TIMEOUT_BIT		BIT(6)
 #define VPU2_ENC_ERR_MASK		(VPU2_ENC_BUS_ERROR_BIT \
-					|VPU2_ENC_BUFFER_FULL_BIT \
-					|VPU2_ENC_TIMEOUT_BIT)
+					| VPU2_ENC_BUFFER_FULL_BIT \
+					| VPU2_ENC_TIMEOUT_BIT)
 
 static const enum FORMAT_TYPE vpu2_dec_fmt_tbl[] = {
 	[0]  = FMT_H264D,
@@ -251,28 +251,28 @@ DEF_FMT_TRANS_TBL(vpu2_default_enc,
 );
 
 const struct vpu_trans_info trans_vpu2[FMT_TYPE_BUTT] = {
-	SETUP_FMT_TBL(FMT_JPEGD , vpu2_jpegd),
-	SETUP_FMT_TBL(FMT_H263D , vpu2_default_dec),
-	SETUP_FMT_TBL(FMT_H264D , vpu2_h264d),
+	SETUP_FMT_TBL(FMT_JPEGD, vpu2_jpegd),
+	SETUP_FMT_TBL(FMT_H263D, vpu2_default_dec),
+	SETUP_FMT_TBL(FMT_H264D, vpu2_h264d),
 	EMPTY_FMT_TBL(FMT_H265D),
 
 	SETUP_FMT_TBL(FMT_MPEG1D, vpu2_default_dec),
 	SETUP_FMT_TBL(FMT_MPEG2D, vpu2_default_dec),
 	SETUP_FMT_TBL(FMT_MPEG4D, vpu2_default_dec),
 
-	SETUP_FMT_TBL(FMT_VP6D  , vpu2_vp6d),
-	SETUP_FMT_TBL(FMT_VP7D  , vpu2_default_dec),
-	SETUP_FMT_TBL(FMT_VP8D  , vpu2_vp8d),
+	SETUP_FMT_TBL(FMT_VP6D, vpu2_vp6d),
+	SETUP_FMT_TBL(FMT_VP7D, vpu2_default_dec),
+	SETUP_FMT_TBL(FMT_VP8D, vpu2_vp8d),
 	EMPTY_FMT_TBL(FMT_VP9D),
 
-	SETUP_FMT_TBL(FMT_PP    , vpu2_default_pp),
+	SETUP_FMT_TBL(FMT_PP, vpu2_default_pp),
 
-	SETUP_FMT_TBL(FMT_VC1D  , vpu2_vc1d),
-	SETUP_FMT_TBL(FMT_AVSD  , vpu2_default_dec),
+	SETUP_FMT_TBL(FMT_VC1D, vpu2_vc1d),
+	SETUP_FMT_TBL(FMT_AVSD, vpu2_default_dec),
 
-	SETUP_FMT_TBL(FMT_JPEGE , vpu2_default_enc),
-	SETUP_FMT_TBL(FMT_H264E , vpu2_default_enc),
-	SETUP_FMT_TBL(FMT_VP8E  , vpu2_default_enc),
+	SETUP_FMT_TBL(FMT_JPEGE, vpu2_default_enc),
+	SETUP_FMT_TBL(FMT_H264E, vpu2_default_enc),
+	SETUP_FMT_TBL(FMT_VP8E, vpu2_default_enc),
 };
 
 #endif
diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index accf449273e4e..0f177d9ab4c24 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -577,11 +577,12 @@ static void vcodec_enter_mode(struct vpu_subdev_data *data)
 
 	if (data->mmu_dev && !test_bit(MMU_ACTIVATED, &data->state)) {
 		set_bit(MMU_ACTIVATED, &data->state);
-		if (atomic_read(&pservice->enabled))
+		if (atomic_read(&pservice->enabled)) {
 			vcodec_iommu_attach(data->iommu_info);
-		else
-			/* FIXME BUG_ON should not be used in mass produce */
-			BUG_ON(!atomic_read(&pservice->enabled));
+		} else {
+			WARN_ON(!atomic_read(&pservice->enabled));
+			pr_err("reset mmu when service is disabled, do nothing\n");
+		}
 	}
 
 	pservice->prev_mode = pservice->curr_mode;
@@ -634,10 +635,9 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
 		if (IS_ERR(pservice->aclk_vcodec)) {
 			dev_err(dev, "failed on clk_get aclk_vcodec\n");
 			return -1;
-		} else {
-			pservice->aclk_vcodec_default_rate =
-				clk_get_rate(pservice->aclk_vcodec);
 		}
+		pservice->aclk_vcodec_default_rate =
+			clk_get_rate(pservice->aclk_vcodec);
 
 		pservice->hclk_vcodec = devm_clk_get(dev, "hclk_vcodec");
 		if (IS_ERR(pservice->hclk_vcodec)) {
@@ -645,7 +645,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
 			pservice->hclk_vcodec = NULL;
 			return -1;
 		}
-		if (pservice->pd_video == NULL) {
+		if (!pservice->pd_video) {
 			pservice->pd_video = devm_clk_get(dev, "pd_video");
 			if (IS_ERR(pservice->pd_video)) {
 				pservice->pd_video = NULL;
@@ -687,9 +687,9 @@ static void _vpu_reset(struct vpu_subdev_data *data)
 	struct vpu_service_info *pservice = data->pservice;
 
 	dev_info(pservice->dev, "resetting...\n");
-	WARN_ON(pservice->reg_codec != NULL);
-	WARN_ON(pservice->reg_pproc != NULL);
-	WARN_ON(pservice->reg_resev != NULL);
+	WARN_ON(pservice->reg_codec);
+	WARN_ON(pservice->reg_pproc);
+	WARN_ON(pservice->reg_resev);
 	pservice->reg_codec = NULL;
 	pservice->reg_pproc = NULL;
 	pservice->reg_resev = NULL;
@@ -746,8 +746,8 @@ static void vpu_reset(struct vpu_subdev_data *data)
 			/* Need to reset iommu */
 			vcodec_iommu_detach(data->iommu_info);
 		} else {
-			/* FIXME BUG_ON should not be used in mass produce */
-			BUG_ON(!atomic_read(&pservice->enabled));
+			WARN_ON(!atomic_read(&pservice->enabled));
+			pr_err("reset mmu when service is disabled, do nothing\n");
 		}
 	}
 
@@ -908,8 +908,7 @@ static dma_addr_t vcodec_fd_to_iova(struct vpu_subdev_data *data,
 		return hdl;
 
 	mem_region = kzalloc(sizeof(*mem_region), GFP_KERNEL);
-	if (mem_region == NULL) {
-		vpu_err("allocate memory for iommu memory region failed\n");
+	if (!mem_region) {
 		vcodec_iommu_free(data->iommu_info, session, hdl);
 		return -ENOMEM;
 	}
@@ -988,8 +987,8 @@ static int fill_scaling_list_pps(struct vpu_subdev_data *data,
 
 	if (scaling_fd > 0) {
 		int i = 0;
-		u32 tmp = vcodec_fd_to_iova(data, reg->session, reg,
-					    scaling_fd, -1);
+		dma_addr_t tmp = vcodec_fd_to_iova(data, reg->session, reg,
+						   scaling_fd, -1);
 
 		if (IS_ERR_VALUE(tmp))
 			return tmp;
@@ -1021,7 +1020,7 @@ static int vcodec_bufid_to_iova(struct vpu_subdev_data *data,
 	int ret = 0;
 	int i;
 
-	if (tbl == NULL || size <= 0) {
+	if (!tbl || size <= 0) {
 		dev_err(pservice->dev, "input arguments invalidate\n");
 		return -EINVAL;
 	}
@@ -1133,8 +1132,8 @@ static int vcodec_bufid_to_iova(struct vpu_subdev_data *data,
 		reg->reg[tbl[i]] = iova + offset;
 	}
 
-	if (ext_inf != NULL && ext_inf->magic == EXTRA_INFO_MAGIC) {
-		for (i = 0; i < ext_inf->cnt; i++) {
+	if (ext_inf && ext_inf->magic == EXTRA_INFO_MAGIC) {
+		for (i = 0; i < (int)ext_inf->cnt; i++) {
 			vpu_debug(DEBUG_IOMMU, "reg[%d] + offset %d\n",
 				  ext_inf->elem[i].index,
 				  ext_inf->elem[i].offset);
@@ -1215,7 +1214,7 @@ static struct vpu_reg *reg_init(struct vpu_subdev_data *data,
 
 	mutex_lock(&pservice->reset_lock);
 	if (vcodec_reg_address_translate(data, session, reg, &extra_info) < 0) {
-		int i = 0;
+		u32 i = 0;
 
 		mutex_unlock(&pservice->reset_lock);
 		vpu_err("error: translate reg address failed, dumping regs\n");
@@ -1255,7 +1254,7 @@ static void reg_deinit(struct vpu_subdev_data *data, struct vpu_reg *reg)
 
 	/* release memory region attach to this registers table. */
 	list_for_each_entry_safe(mem_region, n,
-			&reg->mem_region_list, reg_lnk) {
+				 &reg->mem_region_list, reg_lnk) {
 		vcodec_iommu_unmap_iommu(data->iommu_info, reg->session,
 					 mem_region->hdl);
 		vcodec_iommu_free(data->iommu_info, reg->session,
@@ -1281,7 +1280,7 @@ static void reg_from_wait_to_run(struct vpu_service_info *pservice,
 
 static void reg_copy_from_hw(struct vpu_reg *reg, u32 *src, u32 count)
 {
-	int i;
+	u32 i;
 	u32 *dst = reg->reg;
 
 	vpu_debug_enter();
@@ -1386,7 +1385,7 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, struct vpu_reg *reg)
 	struct vpu_service_info *pservice = data->pservice;
 	struct vpu_task_info *task = reg->task;
 	struct vpu_hw_info *hw_info = data->hw_info;
-	int i;
+	u32 i;
 	u32 *src = (u32 *)&reg->reg[0];
 	u32 enable_mask = task->enable_mask;
 	u32 gating_mask = task->gating_mask;
@@ -1676,7 +1675,7 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd,
 	vpu_debug(DEBUG_IOCTL, "cmd %x, VPU_IOC_SET_CLIENT_TYPE %x\n", cmd,
 		  (u32)VPU_IOC_SET_CLIENT_TYPE);
 
-	if (NULL == session)
+	if (!session)
 		return -EINVAL;
 
 	switch (cmd) {
@@ -1699,7 +1698,8 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd,
 		if (copy_from_user(&req, (void __user *)arg, sizeof(req))) {
 			vpu_err("error: get hw status copy_from_user failed\n");
 			return -EFAULT;
-		} else {
+		}
+		{
 			void *config = (session->type != VPU_ENC) ?
 				       ((void *)&pservice->dec_config) :
 				       ((void *)&pservice->enc_config);
@@ -1737,11 +1737,10 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd,
 		}
 
 		reg = reg_init(data, session, (void __user *)req.req, req.size);
-		if (NULL == reg) {
+		if (!reg)
 			return -EFAULT;
-		} else {
-			queue_work(pservice->set_workq, &data->set_work);
-		}
+
+		queue_work(pservice->set_workq, &data->set_work);
 	} break;
 	case VPU_IOC_GET_REG: {
 		struct vpu_request req;
@@ -1845,7 +1844,7 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd,
 			regmap_write(pservice->grf, 0x5d8, val);
 	} break;
 	default: {
-		vpu_err("error: unknow vpu service ioctl cmd %x\n", cmd);
+		vpu_err("error: unknown vpu service ioctl cmd %x\n", cmd);
 		return -ENOIOCTLCMD;
 	} break;
 	}
@@ -1945,7 +1944,8 @@ static long compat_vpu_service_ioctl(struct file *file, unsigned int cmd,
 
 static int vpu_service_check_hw(struct vpu_subdev_data *data)
 {
-	int ret = -EINVAL, i = 0;
+	int ret = -EINVAL;
+	u32 i = 0;
 	u32 hw_id = readl_relaxed(data->regs);
 
 	hw_id = (hw_id >> 16) & 0xFFFF;
@@ -1977,10 +1977,8 @@ static int vpu_service_open(struct inode *inode, struct file *filp)
 	vpu_debug_enter();
 
 	session = kzalloc(sizeof(*session), GFP_KERNEL);
-	if (!session) {
-		vpu_err("error: unable to allocate memory for vpu_session.");
+	if (!session)
 		return -ENOMEM;
-	}
 
 	data->iommu_info->debug_level = debug;
 
@@ -2011,7 +2009,7 @@ static int vpu_service_release(struct inode *inode, struct file *filp)
 	struct vpu_session *session = (struct vpu_session *)filp->private_data;
 
 	vpu_debug_enter();
-	if (NULL == session)
+	if (!session)
 		return -EINVAL;
 
 	task_running = atomic_read(&session->task_running);
@@ -2348,7 +2346,7 @@ static void rkvdec_set_clk(struct vpu_service_info *pservice,
 }
 
 static void vcodec_set_freq_rk3328(struct vpu_service_info *pservice,
-				    struct vpu_reg *reg)
+				   struct vpu_reg *reg)
 {
 	enum VPU_FREQ curr = atomic_read(&pservice->freq_status);
 
@@ -2399,7 +2397,6 @@ static void vcodec_set_freq_rk322x(struct vpu_service_info *pservice,
 			       300 * MHZ,
 			       300 * MHZ,
 			       EVENT_ADJUST);
-
 	}
 }
 
@@ -2457,7 +2454,7 @@ _vcodec_sys_fault_hdl(struct device *dev, unsigned long iova, int status)
 	if (pservice->reg_codec) {
 		struct vpu_reg *reg = pservice->reg_codec;
 		struct vcodec_mem_region *mem = NULL, *n = NULL;
-		int i = 0;
+		u32 i = 0;
 
 		dev_err(dev, "vcodec, fault addr 0x%08lx status %x\n", iova,
 			status);
@@ -2502,10 +2499,10 @@ _vcodec_sys_fault_hdl(struct device *dev, unsigned long iova, int status)
 		 */
 		if (IOMMU_GET_BUS_ID(status) == 2 && data->pa_hdl >= 0) {
 			/* avoid another page fault occur after page fault */
-			if (data->pa_iova != -1)
-				vcodec_iommu_unmap_iommu_with_iova(data->iommu_info,
-								   session,
-								   data->pa_hdl);
+			if (data->pa_iova != (unsigned long)-1)
+				vcodec_iommu_unmap_iommu_with_iova
+					(data->iommu_info, session,
+					 data->pa_hdl);
 
 			/* get the page align iova */
 			data->pa_iova = round_down(iova, IOMMU_PAGE_SIZE);
@@ -2523,19 +2520,19 @@ _vcodec_sys_fault_hdl(struct device *dev, unsigned long iova, int status)
 	return 0;
 }
 
-int vcodec_iommu_fault_hdl(struct iommu_domain *iommu,
-			   struct device *iommu_dev,
-			   unsigned long iova, int status, void *arg)
+static int vcodec_iommu_fault_hdl(struct iommu_domain *iommu,
+				  struct device *iommu_dev,
+				  unsigned long iova, int status, void *arg)
 {
 	struct device *dev = (struct device *)arg;
 
 	return _vcodec_sys_fault_hdl(dev, iova, status);
 }
 
-int vcodec_iovmm_fault_hdl(struct device *dev,
-			   enum rk_iommu_inttype itype,
-			   unsigned long pgtable_base,
-			   unsigned long fault_addr, unsigned int status)
+static int vcodec_iovmm_fault_hdl(struct device *dev,
+				  enum rk_iommu_inttype itype,
+				  unsigned long pgtable_base,
+				  unsigned long fault_addr, unsigned int status)
 {
 	return _vcodec_sys_fault_hdl(dev, fault_addr, status);
 }
@@ -2651,9 +2648,8 @@ static struct vcodec_hw_var rkvd_device_info = {
 
 static void vcodec_set_hw_ops(struct vpu_service_info *pservice)
 {
-	if (pservice->hw_var) {
+	if (pservice->hw_var)
 		pservice->hw_ops = pservice->hw_var->ops;
-	}
 
 	if (!pservice->hw_ops) {
 		pservice->hw_ops = &hw_ops_default;
@@ -2804,7 +2800,7 @@ static int vcodec_subdev_probe(struct platform_device *pdev,
 
 	vcodec_iommu_map_iommu(data->iommu_info, session,
 			       data->pa_hdl, NULL, NULL);
-	data->pa_iova = -1;
+	data->pa_iova = (unsigned long)-1;
 	vcodec_exit_mode(data);
 
 	hw_info = data->hw_info;
@@ -3258,7 +3254,8 @@ static int vcodec_power_model_simple_init(struct vpu_service_info *pservice)
 		return -ENODEV;
 	}
 
-	if (of_property_read_string(power_model_node, "thermal-zone", &tz_name)) {
+	if (of_property_read_string(power_model_node, "thermal-zone",
+				    &tz_name)) {
 		dev_err(pservice->dev, "ts in power_model not available\n");
 		return -EINVAL;
 	}
@@ -3415,7 +3412,7 @@ static int vcodec_probe(struct platform_device *pdev)
 	pservice->secure_isr = false;
 	pservice->secure_irq_status = true;
 
-	if (0 > vpu_get_clk(pservice))
+	if (vpu_get_clk(pservice) < 0)
 		goto err;
 
 	if (!IS_ERR(pservice->vdd_vcodec)) {
@@ -3463,7 +3460,6 @@ static int vcodec_probe(struct platform_device *pdev)
 	 */
 	session = kzalloc(sizeof(*session), GFP_KERNEL);
 	if (!session) {
-		vpu_err("error: unable to allocate memory for vpu_session.");
 		ret = -ENOMEM;
 		goto err;
 	}
@@ -3487,7 +3483,6 @@ static int vcodec_probe(struct platform_device *pdev)
 		data = devm_kzalloc(dev, sizeof(struct vpu_subdev_data),
 				    GFP_KERNEL);
 		if (!data) {
-			vpu_err("error: unable to allocate memory for vpu_subdev_data");
 			ret = -ENOMEM;
 			goto err;
 		}
@@ -3513,10 +3508,9 @@ static int vcodec_probe(struct platform_device *pdev)
 	ret = vcodec_power_model_simple_init(pservice);
 
 	if (!ret && pservice->devfreq) {
-		pservice->devfreq_cooling =
-		    of_devfreq_cooling_register_power(pservice->dev->of_node,
-						      pservice->devfreq,
-						      &vcodec_cooling_power_data);
+		pservice->devfreq_cooling = of_devfreq_cooling_register_power
+			(pservice->dev->of_node, pservice->devfreq,
+			 &vcodec_cooling_power_data);
 		if (IS_ERR_OR_NULL(pservice->devfreq_cooling)) {
 			ret = PTR_ERR(pservice->devfreq_cooling);
 			dev_err(pservice->dev,
@@ -3778,22 +3772,21 @@ static irqreturn_t vdpu_isr(int irq, void *dev_id)
 						       struct vpu_session,
 						       list_session);
 
-
 	if (atomic_read(&pservice->secure_mode))
 		return IRQ_HANDLED;
 
 	mutex_lock(&pservice->lock);
 	if (atomic_read(&dev->irq_count_codec)) {
 		atomic_sub(1, &dev->irq_count_codec);
-		if (pservice->reg_codec == NULL) {
+		if (!pservice->reg_codec) {
 			vpu_err("error: dec isr with no task waiting\n");
 		} else {
 			if (test_bit(MMU_PAGEFAULT, &data->state) &&
-			    data->pa_iova != -1) {
-				vcodec_iommu_unmap_iommu_with_iova(data->iommu_info,
-								   session,
-								   data->pa_hdl);
-				data->pa_iova = -1;
+			    data->pa_iova != (unsigned long)-1) {
+				vcodec_iommu_unmap_iommu_with_iova
+					(data->iommu_info, session,
+					 data->pa_hdl);
+				data->pa_iova = (unsigned long)-1;
 				clear_bit(MMU_PAGEFAULT, &data->state);
 			}
 			reg_from_run_to_done(data, pservice->reg_codec);
@@ -3805,7 +3798,7 @@ static irqreturn_t vdpu_isr(int irq, void *dev_id)
 
 	if (atomic_read(&dev->irq_count_pp)) {
 		atomic_sub(1, &dev->irq_count_pp);
-		if (pservice->reg_pproc == NULL)
+		if (!pservice->reg_pproc)
 			vpu_err("error: pp isr with no task waiting\n");
 		else
 			reg_from_run_to_done(data, pservice->reg_pproc);
@@ -3864,7 +3857,7 @@ static irqreturn_t vepu_isr(int irq, void *dev_id)
 	mutex_lock(&pservice->lock);
 	if (atomic_read(&dev->irq_count_codec)) {
 		atomic_sub(1, &dev->irq_count_codec);
-		if (NULL == pservice->reg_codec)
+		if (!pservice->reg_codec)
 			vpu_err("error: enc isr with no task waiting\n");
 		else
 			reg_from_run_to_done(data, pservice->reg_codec);

From e02834d8c8369093756f83951e8c71435486b2e4 Mon Sep 17 00:00:00 2001
From: Yao Xiao <xiaoyao@rock-chips.com>
Date: Mon, 30 Jul 2018 11:51:44 +0800
Subject: [PATCH 0711/1852] mmc: core: export retune_enable/disable api for
 wifi drivers

Change-Id: I084e155ed71057fa7f39e160a4f3fde964557185
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
---
 drivers/mmc/core/host.c  | 2 ++
 drivers/mmc/core/host.h  | 2 --
 include/linux/mmc/host.h | 3 +++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 5b21aad3ea919..05ce52e3dff24 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -66,6 +66,7 @@ void mmc_retune_enable(struct mmc_host *host)
 		mod_timer(&host->retune_timer,
 			  jiffies + host->retune_period * HZ);
 }
+EXPORT_SYMBOL(mmc_retune_enable);
 
 void mmc_retune_disable(struct mmc_host *host)
 {
@@ -74,6 +75,7 @@ void mmc_retune_disable(struct mmc_host *host)
 	host->retune_now = 0;
 	host->need_retune = 0;
 }
+EXPORT_SYMBOL(mmc_retune_disable);
 
 void mmc_retune_timer_stop(struct mmc_host *host)
 {
diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h
index bf38533406fd8..3005e66be3882 100644
--- a/drivers/mmc/core/host.h
+++ b/drivers/mmc/core/host.h
@@ -17,8 +17,6 @@
 int mmc_register_host_class(void);
 void mmc_unregister_host_class(void);
 
-void mmc_retune_enable(struct mmc_host *host);
-void mmc_retune_disable(struct mmc_host *host);
 void mmc_retune_hold(struct mmc_host *host);
 void mmc_retune_release(struct mmc_host *host);
 int mmc_retune(struct mmc_host *host);
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index b72f88db3adff..35e0a013e466d 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -561,4 +561,7 @@ static inline void mmc_retune_recheck(struct mmc_host *host)
 		host->retune_now = 1;
 }
 
+void mmc_retune_enable(struct mmc_host *host);
+void mmc_retune_disable(struct mmc_host *host);
+
 #endif /* LINUX_MMC_HOST_H */

From 69fd210ac82650f3e229d9f71daf9278f4b74a63 Mon Sep 17 00:00:00 2001
From: Ziyuan Xu <xzy.xu@rock-chips.com>
Date: Mon, 30 Jul 2018 11:53:50 +0800
Subject: [PATCH 0712/1852] net: wireless: bcmdhd: fixup sdio wifi deivice
 response crc error while resume

Change-Id: I3a9aa6f5346c2393ae0c90ab1592bc043c5f2d25
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
---
 .../rockchip_wlan/rkwifi/bcmdhd/dhd_sdio.c       | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_sdio.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_sdio.c
index d7b2144434224..a4b20b94ee9d8 100644
--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_sdio.c
+++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_sdio.c
@@ -68,6 +68,10 @@
 #include <sdiovar.h>
 #include <dhd_config.h>
 
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/host.h>
+#include "bcmsdh_sdmmc.h"
+
 #ifdef PROP_TXSTATUS
 #include <dhd_wlfc.h>
 #endif
@@ -1044,8 +1048,18 @@ dhdsdio_clk_kso_enab(dhd_bus_t *bus, bool on)
 
 	wr_val |= (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 
-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
+	{
+		struct mmc_host *host;
+		struct sdioh_info *sd = (struct sdioh_info *)(bus->sdh->sdioh);
+		struct sdio_func *func = sd->func[SDIO_FUNC_0];
+
+		host = func->card->host;
 
+		mmc_retune_disable(host);
+		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR,
+				 wr_val, &err);
+		mmc_retune_enable(host);
+	}
 
 	/* In case of 43012 chip, the chip could go down immediately after KSO bit is cleared.
 	 * So the further reads of KSO register could fail. Thereby just bailing out immediately

From 7a4876a680b7a2019a095f37fb52aa3ebe80a2fb Mon Sep 17 00:00:00 2001
From: Chen Jinsen <kevin.chen@rock-chips.com>
Date: Tue, 31 Jul 2018 10:26:15 +0800
Subject: [PATCH 0713/1852] ARM: dts: rk3288-th804: bind dsi to vopb for panel

The aclk_vop is limited by vio_limit_freq and RK3288_LIMIT_PLL_VIO1
set as 410MHZ. if bind dsi to vopl (the clk freq will be 272MHZ),
it will be some scenarios with insufficient frame rates

Change-Id: I2fe15d51c579dbc5fe666cfb320055f0e179d2fc
Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-th804.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288-th804.dts b/arch/arm/boot/dts/rk3288-th804.dts
index b8a173f1c539a..8e26104313819 100644
--- a/arch/arm/boot/dts/rk3288-th804.dts
+++ b/arch/arm/boot/dts/rk3288-th804.dts
@@ -575,10 +575,27 @@
 	status = "okay";
 };
 
+&dsi0_in_vopl {
+	status = "disabled";
+};
+
+&dsi0_in_vopb {
+	status = "okay";
+};
+
 &route_dsi0 {
+	connect = <&vopb_out_dsi0>;
 	status = "okay";
 };
 
+&hdmi_in_vopl {
+	status = "okay";
+};
+
+&hdmi_in_vopb {
+	status = "disabled";
+};
+
 &hdmi {
 	#address-cells = <1>;
 	#size-cells = <0>;
@@ -586,6 +603,11 @@
 	status = "okay";
 };
 
+&route_hdmi {
+	connect = <&vopl_out_hdmi>;
+	status = "okay";
+};
+
 &hdmi_analog_sound {
 	status = "okay";
 	compatible = "rockchip,rk3288-hdmi-analog",

From 2923712756aede2d071144f7c1f0fde4b906461d Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 5 Mar 2018 16:17:04 +0800
Subject: [PATCH 0714/1852] clk: rockchip: px30: Add div50 clocks for sdmmc,
 emmc, sdio and nandc

Change-Id: I45d06b01b05afbe14a4a8b86e7abec7a6f25e267
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c      | 44 +++++++++++++++++++++++++---
 include/dt-bindings/clock/px30-cru.h |  2 ++
 2 files changed, 42 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index f9ef001d90ccf..7b2ffc11d601a 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -178,6 +178,10 @@ PNAME(mux_uart5_p)		= { "clk_uart5_src", "clk_uart5_np5", "clk_uart5_frac" };
 PNAME(mux_cif_out_p)		= { "xin24m", "dummy_cpll", "npll", "usb480m" };
 PNAME(mux_dclk_vopb_p)		= { "dclk_vopb_src", "dclk_vopb_frac", "xin24m" };
 PNAME(mux_dclk_vopl_p)		= { "dclk_vopl_src", "dclk_vopl_frac", "xin24m" };
+PNAME(mux_nandc_p)		= { "clk_nandc_div", "clk_nandc_div50" };
+PNAME(mux_sdio_p)		= { "clk_sdio_div", "clk_sdio_div50" };
+PNAME(mux_emmc_p)		= { "clk_emmc_div", "clk_emmc_div50" };
+PNAME(mux_sdmmc_p)		= { "clk_sdmmc_div", "clk_sdmmc_div50" };
 PNAME(mux_gmac_p)		= { "clk_gmac_src", "gmac_clkin" };
 PNAME(mux_gmac_rmii_sel_p)	= { "clk_gmac_rx_tx_div20", "clk_gmac_rx_tx_div2" };
 PNAME(mux_rtc32k_pmu_p)		= { "xin32k", "pmu_pvtm_32k", "clk_rtc32k_frac", };
@@ -465,16 +469,40 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	/* PD_MMC_NAND */
 	GATE(HCLK_MMC_NAND, "hclk_mmc_nand", "hclk_peri_pre", 0,
 			PX30_CLKGATE_CON(6), 0, GFLAGS),
-	COMPOSITE(SCLK_NANDC, "clk_nandc", mux_gpll_cpll_npll_p, 0,
+	COMPOSITE(SCLK_NANDC_DIV, "clk_nandc_div", mux_gpll_cpll_npll_p, 0,
 			PX30_CLKSEL_CON(15), 6, 2, MFLAGS, 0, 5, DFLAGS,
+			PX30_CLKGATE_CON(5), 11, GFLAGS),
+	COMPOSITE(SCLK_NANDC_DIV50, "clk_nandc_div50", mux_gpll_cpll_npll_p, 0,
+			PX30_CLKSEL_CON(15), 6, 2, MFLAGS, 8, 5, DFLAGS,
+			PX30_CLKGATE_CON(5), 12, GFLAGS),
+	COMPOSITE_NODIV(SCLK_NANDC, "clk_nandc", mux_nandc_p,
+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+			PX30_CLKSEL_CON(15), 15, 1, MFLAGS,
 			PX30_CLKGATE_CON(5), 13, GFLAGS),
 
-	COMPOSITE(SCLK_SDIO, "clk_sdio", mux_gpll_cpll_npll_xin24m_p, 0,
+	COMPOSITE(SCLK_SDIO_DIV, "clk_sdio_div", mux_gpll_cpll_npll_xin24m_p, 0,
 			PX30_CLKSEL_CON(18), 14, 2, MFLAGS, 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 1, GFLAGS),
+	COMPOSITE_DIV_OFFSET(SCLK_SDIO_DIV50, "clk_sdio_div50",
+			mux_gpll_cpll_npll_xin24m_p, 0,
+			PX30_CLKSEL_CON(18), 14, 2, MFLAGS,
+			PX30_CLKSEL_CON(19), 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 2, GFLAGS),
+	COMPOSITE_NODIV(SCLK_SDIO, "clk_sdio", mux_sdio_p,
+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+			PX30_CLKSEL_CON(19), 15, 1, MFLAGS,
 			PX30_CLKGATE_CON(6), 3, GFLAGS),
 
-	COMPOSITE(SCLK_EMMC, "clk_emmc", mux_gpll_cpll_npll_xin24m_p, 0,
+	COMPOSITE(SCLK_EMMC_DIV, "clk_emmc_div", mux_gpll_cpll_npll_xin24m_p, 0,
 			PX30_CLKSEL_CON(20), 14, 2, MFLAGS, 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 4, GFLAGS),
+	COMPOSITE_DIV_OFFSET(SCLK_EMMC_DIV50, "clk_emmc_div50", mux_gpll_cpll_npll_xin24m_p, 0,
+			PX30_CLKSEL_CON(20), 14, 2, MFLAGS,
+			PX30_CLKSEL_CON(21), 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 5, GFLAGS),
+	COMPOSITE_NODIV(SCLK_EMMC, "clk_emmc", mux_emmc_p,
+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+			PX30_CLKSEL_CON(21), 15, 1, MFLAGS,
 			PX30_CLKGATE_CON(6), 6, GFLAGS),
 
 	COMPOSITE(SCLK_SFC, "clk_sfc", mux_gpll_cpll_p, 0,
@@ -499,8 +527,16 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	/* PD_SDCARD */
 	GATE(0, "hclk_sdmmc_pre", "hclk_peri_pre", 0,
 			PX30_CLKGATE_CON(6), 12, GFLAGS),
-	COMPOSITE(SCLK_SDMMC, "clk_sdmmc", mux_gpll_cpll_npll_xin24m_p, 0,
+	COMPOSITE(SCLK_SDMMC_DIV, "clk_sdmmc_div", mux_gpll_cpll_npll_xin24m_p, 0,
 			PX30_CLKSEL_CON(16), 14, 2, MFLAGS, 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 13, GFLAGS),
+	COMPOSITE_DIV_OFFSET(SCLK_SDMMC_DIV50, "clk_sdmmc_div50", mux_gpll_cpll_npll_xin24m_p, 0,
+			PX30_CLKSEL_CON(16), 14, 2, MFLAGS,
+			PX30_CLKSEL_CON(17), 0, 8, DFLAGS,
+			PX30_CLKGATE_CON(6), 14, GFLAGS),
+	COMPOSITE_NODIV(SCLK_SDMMC, "clk_sdmmc", mux_sdmmc_p,
+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+			PX30_CLKSEL_CON(17), 15, 1, MFLAGS,
 			PX30_CLKGATE_CON(6), 15, GFLAGS),
 
 	/* PD_USB */
diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h
index db9fc2a0bb213..cf0d34315902f 100644
--- a/include/dt-bindings/clock/px30-cru.h
+++ b/include/dt-bindings/clock/px30-cru.h
@@ -98,6 +98,8 @@
 #define SCLK_EMMC_DIV50		83
 #define SCLK_DDRCLK		84
 #define SCLK_UART1_SRC		85
+#define SCLK_SDMMC_DIV		86
+#define SCLK_SDMMC_DIV50	87
 
 /* dclk gates */
 #define DCLK_VOPB		150

From 30f5af20acca8e2727bb596350c810b43d45da6f Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 5 Mar 2018 16:26:51 +0800
Subject: [PATCH 0715/1852] arm64: dts: rockchip: Assign nandc, emmc, sdio and
 sdmmc clock to DIV50 for px30

Change-Id: Iebfe0235c01f0b4c7093f1c9ef3aafe2fc2a2041
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 6d72cb4f3ca8b..6043f20cb98e3 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1185,6 +1185,8 @@
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		assigned-clocks = <&cru SCLK_SDMMC>;
+		assigned-clock-parents = <&cru SCLK_SDMMC_DIV50>;
 		power-domains = <&power PX30_PD_SDCARD>;
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@@ -1200,6 +1202,8 @@
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		assigned-clocks = <&cru SCLK_SDIO>;
+		assigned-clock-parents = <&cru SCLK_SDIO_DIV50>;
 		power-domains = <&power PX30_PD_MMC_NAND>;
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
@@ -1215,6 +1219,8 @@
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		assigned-clocks = <&cru SCLK_EMMC>;
+		assigned-clock-parents = <&cru SCLK_EMMC_DIV50>;
 		power-domains = <&power PX30_PD_MMC_NAND>;
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1228,6 +1234,8 @@
 		nandc_id = <0>;
 		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
 		clock-names = "clk_nandc", "hclk_nandc";
+		assigned-clocks = <&cru SCLK_NANDC>;
+		assigned-clock-parents = <&cru SCLK_NANDC_DIV50>;
 		power-domains = <&power PX30_PD_MMC_NAND>;
 		status = "disabled";
 	};

From ffd6e575327efdb4ba63848bf4bc11342a5a0124 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Fri, 17 Mar 2017 09:38:06 +0100
Subject: [PATCH 0716/1852] UPSTREAM: arm64: dts: rockchip: add rk3399 dw-mmc
 resets

dw-mmc got its reset-properties specified, so add the softresets
for it on the rk3399.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
(Cherry-picked from 04dc7f62037b0d3aead0dc62231efad89affa9f3)

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3399.dtsi

Change-Id: I69b8cfeef113a259b930308965e33b915026a3d7
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 476fdacd4d601..36fbafe89e19d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -300,6 +300,8 @@
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		power-domains = <&power RK3399_PD_SDIOAUDIO>;
+		resets = <&cru SRST_SDIO0>;
+		reset-names = "reset";
 		status = "disabled";
 	};
 
@@ -316,6 +318,8 @@
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		power-domains = <&power RK3399_PD_SD>;
+		resets = <&cru SRST_SDMMC>;
+		reset-names = "reset";
 		status = "disabled";
 	};
 

From a9fb92fa77b052514e69c479c0b9277c503af83d Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Fri, 27 Jul 2018 18:15:56 +0800
Subject: [PATCH 0717/1852] ARM: rockchip_defconfig: update by savedefconfig

Change-Id: I08c55a80089d439d4750fae427fec8eb471cdb88
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index 179a0924ee661..b637d1c583dd0 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -377,8 +377,8 @@ CONFIG_BATTERY_EC=y
 CONFIG_BATTERY_CW2015=y
 CONFIG_BATTERY_RK816=y
 CONFIG_BATTERY_RK818=y
-CONFIG_POWER_RESET=y
 CONFIG_CHARGER_RK818=y
+CONFIG_POWER_RESET=y
 CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_POWER_AVS=y
 CONFIG_ROCKCHIP_IODOMAIN=y
@@ -404,8 +404,6 @@ CONFIG_REGULATOR_RK808=y
 CONFIG_REGULATOR_RK818=y
 CONFIG_REGULATOR_SYR82X=y
 CONFIG_REGULATOR_XZ3216=y
-CONFIG_CEC_CORE=y
-CONFIG_CEC_NOTIFIER=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_RC_SUPPORT=y

From cbfcdcba4d214415ac89ecbe39a17a83b4389939 Mon Sep 17 00:00:00 2001
From: Yao Xiao <xiaoyao@rock-chips.com>
Date: Tue, 31 Jul 2018 09:53:55 +0800
Subject: [PATCH 0718/1852] net: wireless: fix wifi disconnect when suspended

Change-Id: Ifbe36bc9cbfd12a7cd206ab0828cfda20af43b6a
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
(cherry picked from commit 9eb169172a8140fd6a0bc2dc79a21c4f7ce0185b (develop-3.10))
---
 net/wireless/sysfs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/wireless/sysfs.c b/net/wireless/sysfs.c
index 9cee0220665d3..86440be2bfde2 100644
--- a/net/wireless/sysfs.c
+++ b/net/wireless/sysfs.c
@@ -104,8 +104,8 @@ static int wiphy_suspend(struct device *dev)
 
 	rtnl_lock();
 	if (rdev->wiphy.registered) {
-		if (!rdev->wiphy.wowlan_config)
-			cfg80211_leave_all(rdev);
+		//if (!rdev->wiphy.wowlan_config)
+		//	cfg80211_leave_all(rdev);
 		if (rdev->ops->suspend)
 			ret = rdev_suspend(rdev, rdev->wiphy.wowlan_config);
 		if (ret == 1) {

From 9da6fce13085bbbdd58945fa17afb67ee3eec331 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Wed, 1 Aug 2018 09:13:11 +0800
Subject: [PATCH 0719/1852] drm/rockchip: lvds: Reverse sample clock direction
 on px30

Fix display corruption when vdd_log equals 0.95v.

Change-Id: Ie3b44322b557889a2f91b5af59662f96d73af44c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_lvds.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_lvds.h | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
index 04f20e212cd79..af34354f44de9 100644
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
@@ -748,6 +748,8 @@ static int px30_lvds_power_on(struct rockchip_lvds *lvds)
 			     PX30_LVDS_OUTPUT_FORMAT(lvds->format) |
 			     PX30_LVDS_MSBSEL(LVDS_MSB_D7) |
 			     PX30_DPHY_FORCERXMODE(1));
+		lvds_msk_reg(lvds, MIPIPHY_REG8,
+			     m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
 	}
 
 	return innov1_lvds_power_on(lvds);
diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h
index 5e311008c3526..d517d75ba365e 100644
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.h
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h
@@ -155,6 +155,10 @@
 #define MIPIPHY_REG4		0x0010
 #define v_FBDIV_LSB(x)		BITS_MASK(x, 0xff, 0)
 
+#define MIPIPHY_REG8			0x0020
+#define m_SAMPLE_CLK_DIR		BIT(4)
+#define v_SAMPLE_CLK_DIR_REVERSE	BIT(4)
+
 #define MIPIPHY_REGE0		0x0380
 #define m_MSB_SEL		BIT(0)
 #define m_DIG_INTER_RST		BIT(2)

From 9bd922ba0820e3fceab3327c36c12df979c542dd Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 1 Aug 2018 17:23:11 +0800
Subject: [PATCH 0720/1852] arm64: rockchip_defconfig: Add VTI support

https://android.googlesource.com/kernel/configs
7a4e85661078 ("Enable options required by netd.")

The netd in master requires some additional options to be enabled for
the new (non-optional) XfrmController functionality.

Change-Id: I12677ee23774c2cdf899b04d5da204ff1ffc74de
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index c97898b72e224..09ea5340a1d84 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -106,6 +106,7 @@ CONFIG_IP_ROUTE_VERBOSE=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
@@ -118,6 +119,7 @@ CONFIG_INET6_AH=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_IPV6_SUBTREES=y
 CONFIG_NETFILTER=y

From f00143530d5528f3fa7f442eec547f3fb3de5c9a Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 1 Aug 2018 17:38:49 +0800
Subject: [PATCH 0721/1852] ARM: rockchip_defconfig: Add VTI support

https://android.googlesource.com/kernel/configs
7a4e85661078 ("Enable options required by netd.")

The netd in master requires some additional options to be enabled for
the new (non-optional) XfrmController functionality.

Change-Id: I3e96ef1e9b09758f4b8d149f9025573ff01e09ec
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index b637d1c583dd0..047442a986e84 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -93,6 +93,7 @@ CONFIG_IP_MULTIPLE_TABLES=y
 CONFIG_IP_ROUTE_VERBOSE=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
+CONFIG_NET_IPVTI=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
@@ -105,6 +106,7 @@ CONFIG_INET6_AH=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_IPV6_SUBTREES=y
 CONFIG_NETFILTER=y

From 88fdb59d27655e6100b4dd5b970d51f356b29160 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 20 Jul 2018 18:33:01 +0800
Subject: [PATCH 0722/1852] arm64: dts: rockchip: rk3308: Raise voltage for
 1008MHz, 1200MHz and 1296MHz

In order to cover the chips passed cp test program(1.3g 1.175v).

Change-Id: I4e19aefd914258e8d1e6d331b6f584aa7d0c4822
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 276247d21db92..3668e86e42fed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -119,18 +119,18 @@
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
-			opp-microvolt = <1100000 1100000 1340000>;
+			opp-microvolt = <1150000 1150000 1340000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1200000000 {
 			opp-hz = /bits/ 64 <1200000000>;
-			opp-microvolt = <1200000 1200000 1340000>;
+			opp-microvolt = <1250000 1250000 1340000>;
 			clock-latency-ns = <40000>;
 			status = "disabled";
 		};
 		opp-1296000000 {
 			opp-hz = /bits/ 64 <1296000000>;
-			opp-microvolt = <1250000 1250000 1340000>;
+			opp-microvolt = <1300000 1300000 1340000>;
 			clock-latency-ns = <40000>;
 			status = "disabled";
 		};

From aac4bad18a3f3a61c843a5d202de4a5642dc8260 Mon Sep 17 00:00:00 2001
From: "allon.huang" <allon.huang@rock-chips.com>
Date: Wed, 18 Jul 2018 19:35:01 +0800
Subject: [PATCH 0723/1852] media: rockchip: mipi: reorder mipi dphy
 configuration sequence

Reorder mipi configuration sequence for rk3288/rk3399
according to ip reference

Add comments to explain the sequence and running state

All mipi phy1 are controlled by isp

Change-Id: Ib5ad9edac4229acb5fa7f2088a9601d210a816f4
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
---
 .../platform/rockchip/isp1/mipi_dphy_sy.c     | 165 ++++++++++++++----
 1 file changed, 127 insertions(+), 38 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
index c76ad313e9fdf..9f7b30d68cb26 100644
--- a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -666,39 +666,70 @@ static int mipidphy_rx_stream_on(struct mipidphy_priv *priv,
 			break;
 		}
 	}
+
+	/* RK3288 isp connected to phy0-rx */
 	write_grf_reg(priv, GRF_CON_ISP_DPHY_SEL, 0);
-	write_grf_reg(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
-	write_grf_reg(priv, GRF_DPHY_RX0_FORCETXSTOPMODE, 0);
-	/* Disable lan turn around, which is ignored in receive mode */
-	write_grf_reg(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
-	write_grf_reg(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
 
-	write_grf_reg(priv, GRF_DPHY_RX0_ENABLE, GENMASK(sensor->lanes - 1, 0));
+	/* Belowed is the sequence of mipi configuration */
+	/* Step1: set RSTZ = 1'b0, phy0 controlled by isp0 */
 
-	/* dphy start */
+	/* Step2: set SHUTDOWNZ = 1'b0, controlled by isp0 */
+
+	/* Step3: set TESTCLEAR = 1'b1 */
 	write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
 	write_grf_reg(priv, GRF_DPHY_RX0_TESTCLR, 1);
 	usleep_range(100, 150);
+
+	/* Step4: apply REFCLK signal with the appropriate frequency */
+
+	/* Step5: apply CFG_CLK signal with the appropriate frequency */
+
+	/* Step6: set MASTERSLAVEZ = 1'b0 (for SLAVE), phy0 default is slave */
+
+	/* Step7: set BASEDIR_N = 1’b1 (for SLAVE), phy0 default is slave */
+
+	/*
+	 * Step8: set all REQUEST inputs to zero, need to wait 15ns:
+	 * step8.1:set lan turndisab as 1
+	 * step8.2:set lan turnrequest as 0
+	 */
+	write_grf_reg(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
+	write_grf_reg(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
+	write_grf_reg(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
+	usleep_range(100, 150);
+
+	/* Step9: set TESTCLR to low, need to wait 15ns */
 	write_grf_reg(priv, GRF_DPHY_RX0_TESTCLR, 0);
 	usleep_range(100, 150);
 
-	/* set clock lane */
-	/* HS hsfreq_range & lane 0  settle bypass */
+	/*
+	 * Step10: configure Test Code 0x44 hsfreqrange according to values
+	 * step10.1:set clock lane
+	 * step10.2:set hsfreqrange by lane0(test code 0x44)
+	 */
+	hsfreq <<= 1;
 	mipidphy0_wr_reg(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
-	/* HS RX Control of lane0 */
-	mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
-	/* HS RX Control of lane1 */
-	mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, 0);
-	/* HS RX Control of lane2 */
-	mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, 0);
-	/* HS RX Control of lane3 */
-	mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, 0);
-	/* HS RX Data Lanes Settle State Time Control */
-	mipidphy0_wr_reg(priv, HS_RX_DATA_LANES_THS_SETTLE_CONTROL,
-			 THS_SETTLE_COUNTER_THRESHOLD);
-
-	/* Normal operation */
-	mipidphy0_wr_reg(priv, 0x0, 0);
+	mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);
+	mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, hsfreq);
+	mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, hsfreq);
+	mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, hsfreq);
+
+	/* Step11: Configure analog references: of Test Code 0x22 */
+
+	/* Step12: Set ENABLE_N=1'b1, need to wait 5ns */
+	/* set lane num */
+	write_grf_reg(priv, GRF_DPHY_RX0_ENABLE, GENMASK(sensor->lanes - 1, 0));
+
+	/* Step13: Set SHUTDOWNZ=1'b1, controlled by isp need to wait 5ns */
+
+	/* Step14: Set RSTZ=1'b1, controlled by isp */
+
+	/*
+	 * Step15: Wait until STOPSTATEDATA_N & STOPSTATECLK
+	 *         outputs are asserted
+	 */
+
+	usleep_range(100, 150);
 
 	return 0;
 }
@@ -719,40 +750,98 @@ static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 			break;
 		}
 	}
+
+	/*
+	 *Config rk3288:
+	 *step1:rk3288 isp connected to phy1-rx
+	 *step2:rk3288 phy1-rx test bus connected to csi host
+	 *step3:rk3288 phy1-rx source selected as: isp = 1'b1,csi-host = 1'b0
+	 */
 	write_grf_reg(priv, GRF_CON_ISP_DPHY_SEL, 1);
 	write_grf_reg(priv, GRF_DSI_CSI_TESTBUS_SEL, 1);
 	write_grf_reg(priv, GRF_DPHY_RX1_SRC_SEL, 1);
+
+	/*
+	 * Config rk3399：
+	 * step1:rk3399 phy1-rx source selected as:1'b0=isp1,1'b1=isp0
+	 */
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_SRC_SEL, 0);
+
+	/* Belowed is the sequence of mipi configuration */
+	/* Step1: set RSTZ = 1'b0, phy1-rx controlled by isp */
+
+	/* Step2: set SHUTDOWNZ = 1'b0, phy1-rx controlled by isp */
+
+	/* Step3: set TESTCLR= 1'b1,TESTCLK=1'b1 */
+	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLR | PHY_TESTCLK);
+	usleep_range(100, 150);
+
+	/* Step4: apply REFCLK signal with the appropriate frequency */
+
+	/* Step5: apply CFG_CLK signal with the appropriate frequency */
+
+	/*
+	 * Step6: set MASTERSLAVEZ = 1'b0 (for SLAVE),
+	 *        phy1 is set as slave,controlled by isp
+	 */
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_MASTERSLAVEZ, 0);
+
+	/*
+	 * Step7: set BASEDIR_N = 1’b1 (for SLAVE),
+	 *        phy1 is set as slave,controlled by isp
+	 */
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_BASEDIR, 1);
-	/* Disable lan turn around, which is ignored in receive mode */
+
+	/* Step8: set all REQUEST inputs to zero, need to wait 15ns */
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_FORCERXMODE, 0);
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_FORCETXSTOPMODE, 0);
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_TURNREQUEST, 0);
 	write_grf_reg(priv, GRF_DPHY_TX1RX1_TURNDISABLE, 0xf);
-	write_grf_reg(priv, GRF_DPHY_TX1RX1_ENABLE,
-		      GENMASK(sensor->lanes - 1, 0));
-	/* dphy start */
-	write_txrx_reg(priv, TXRX_PHY_SHUTDOWNZ, 0x00);
-	write_txrx_reg(priv, TXRX_PHY_RSTZ, 0x00);
-	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLK);
-	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLR);
 	usleep_range(100, 150);
+
+	/* Step9: set TESTCLR=1'b0,TESTCLK=1'b1 need to wait 15ns */
 	write_txrx_reg(priv, TXRX_PHY_TEST_CTRL0, PHY_TESTCLK);
 	usleep_range(100, 150);
 
-	/* set clock lane */
+	/*
+	 * Step10: configure Test Code 0x44 hsfreqrange according to values
+	 * step10.1:set clock lane
+	 * step10.2:set hsfreqrange by lane0(test code 0x44)
+	 */
+	hsfreq <<= 1;
 	mipidphy1_wr_reg(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
-	mipidphy1_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
+	mipidphy1_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);
 	mipidphy1_wr_reg(priv, LANE1_HS_RX_CONTROL, 0);
 	mipidphy1_wr_reg(priv, LANE2_HS_RX_CONTROL, 0);
 	mipidphy1_wr_reg(priv, LANE3_HS_RX_CONTROL, 0);
-	/* HS RX Data Lanes Settle State Time Control */
-	mipidphy1_wr_reg(priv, HS_RX_DATA_LANES_THS_SETTLE_CONTROL,
-			 THS_SETTLE_COUNTER_THRESHOLD);
 
-	/* Normal operation */
-	mipidphy1_wr_reg(priv, 0x0, 0);
+	/* Step11: Configure analog references: of Test Code 0x22 */
+
+	/*
+	 * Step12: Set ENABLE_N=1'b1, need to wait 5ns
+	 * Set lane num:
+	 * for 3288,controlled by isp,enable lanes actually
+	 * is set by grf_soc_con9[12:15];
+	 * for 3399,controlled by isp1,enable lanes actually
+	 * is set by isp1,
+	 * if run 3399 here operates grf_soc_con23[0:3]
+	 */
+	write_grf_reg(priv, GRF_DPHY_TX1RX1_ENABLE,
+		      GENMASK(sensor->lanes - 1, 0));
+
+	/*
+	 * Step13:Set SHUTDOWNZ=1'b1, phy1-rx controlled by isp,
+	 *        need to wait 5ns
+	 */
+
+	/* Step14:Set RSTZ=1'b1, phy1-rx controlled by isp*/
+
+	/*
+	 * Step15:Wait until STOPSTATEDATA_N & STOPSTATECLK
+	 *        outputs are asserted
+	 */
+
+	usleep_range(100, 150);
 
 	return 0;
 }

From 354c9f38e1ccf3c95f11b1558af64454c31ed628 Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Thu, 2 Aug 2018 14:45:31 +0800
Subject: [PATCH 0724/1852] arm64: dts: rockchip: remove unused #dma-cells for
 px30

Change-Id: Ibb85ffe525246285e54bb034b8acbf66025516ba
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 6043f20cb98e3..460e1bdf41dff 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -452,7 +452,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 0>, <&dmac 1>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 		status = "disabled";
@@ -610,7 +609,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 2>, <&dmac 3>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 		status = "disabled";
@@ -625,7 +623,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 4>, <&dmac 5>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart2m0_xfer>;
 		status = "disabled";
@@ -640,7 +637,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 6>, <&dmac 7>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart3m1_xfer &uart3m1_cts &uart3m1_rts>;
 		status = "disabled";
@@ -655,7 +651,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 8>, <&dmac 9>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
 		status = "disabled";
@@ -670,7 +665,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 10>, <&dmac 11>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart5_xfer &uart5_cts &uart5_rts>;
 		status = "disabled";
@@ -737,7 +731,6 @@
 		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 12>, <&dmac 13>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
@@ -754,7 +747,6 @@
 		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 14>, <&dmac 15>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>;

From 42d21cbea3c5d5c18cee641c087afee7e4c004db Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Thu, 2 Aug 2018 14:47:09 +0800
Subject: [PATCH 0725/1852] arm64: dts: rockchip: remove unused #dma-cells for
 rk3308

Change-Id: I74edbf82a77e1aaccc75c196ed70714fa0182787
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 3668e86e42fed..5f4e4c318b818 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -443,7 +443,6 @@
 		reg-io-width = <4>;
 		dmas = <&dmac0 4>, <&dmac0 5>;
 		dma-names = "tx", "rx";
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 		status = "disabled";
@@ -459,7 +458,6 @@
 		reg-io-width = <4>;
 		dmas = <&dmac0 6>, <&dmac0 7>;
 		dma-names = "tx", "rx";
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 		status = "disabled";
@@ -475,7 +473,6 @@
 		reg-io-width = <4>;
 		dmas = <&dmac0 8>, <&dmac0 9>;
 		dma-names = "tx", "rx";
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart2m0_xfer>;
 		status = "disabled";
@@ -491,7 +488,6 @@
 		reg-io-width = <4>;
 		dmas = <&dmac0 10>, <&dmac0 11>;
 		dma-names = "tx", "rx";
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart3_xfer>;
 		status = "disabled";
@@ -507,7 +503,6 @@
 		reg-io-width = <4>;
 		dmas = <&dmac1 18>, <&dmac1 19>;
 		dma-names = "tx", "rx";
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
 		status = "disabled";
@@ -522,7 +517,6 @@
 		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 0>, <&dmac0 1>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>;
@@ -539,7 +533,6 @@
 		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 2>, <&dmac0 3>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>;
@@ -556,7 +549,6 @@
 		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac1 16>, <&dmac1 17>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>;

From f765f255de3181ef50e8dc1b124b58b5cf489c93 Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Thu, 2 Aug 2018 14:47:29 +0800
Subject: [PATCH 0726/1852] arm64: dts: rockchip: remove unused #dma-cells for
 rk3328

Change-Id: I936f240665b5c905e0af41a3e9dd97e0b7379473
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 41c6b4210a715..57ad638bfae6f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -218,7 +218,6 @@
 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 11>, <&dmac 12>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		status = "disabled";
 	};
@@ -230,7 +229,6 @@
 		clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 14>, <&dmac 15>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		status = "disabled";
 	};
@@ -242,7 +240,6 @@
 		clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 0>, <&dmac 1>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&i2s2m0_mclk
@@ -262,7 +259,6 @@
 		clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
 		clock-names = "mclk", "hclk";
 		dmas = <&dmac 10>;
-		#dma-cells = <1>;
 		dma-names = "tx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spdifm2_tx>;
@@ -275,7 +271,6 @@
 		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
 		clock-names = "pdm_clk", "pdm_hclk";
 		dmas = <&dmac 16>;
-		#dma-cells = <1>;
 		dma-names = "rx";
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&pdmm0_clk
@@ -443,7 +438,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 2>, <&dmac 3>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 		status = "disabled";
@@ -458,7 +452,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 4>, <&dmac 5>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 		status = "disabled";
@@ -473,7 +466,6 @@
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		dmas = <&dmac 6>, <&dmac 7>;
-		#dma-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart2m1_xfer>;
 		status = "disabled";
@@ -545,7 +537,6 @@
 		clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 8>, <&dmac 9>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;

From 45e99a3927289cf95e5108d552cafc9189971106 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 31 Jul 2018 16:50:20 +0800
Subject: [PATCH 0727/1852] ASoC: rockchip: add support for spdif receiver

The SPDIF receiver is a self-clocking, serial, unidirectional
interface for the interconnection of digital audio equipment
for consumer and professional applications.

Change-Id: Ic73337671b37c8c45352e523a875281edd552d1b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 .../bindings/sound/rockchip,spdifrx.txt       |  38 ++
 sound/soc/rockchip/Kconfig                    |   8 +
 sound/soc/rockchip/Makefile                   |   2 +
 sound/soc/rockchip/rockchip_spdifrx.c         | 403 ++++++++++++++++++
 sound/soc/rockchip/rockchip_spdifrx.h         | 113 +++++
 5 files changed, 564 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/rockchip,spdifrx.txt
 create mode 100644 sound/soc/rockchip/rockchip_spdifrx.c
 create mode 100644 sound/soc/rockchip/rockchip_spdifrx.h

diff --git a/Documentation/devicetree/bindings/sound/rockchip,spdifrx.txt b/Documentation/devicetree/bindings/sound/rockchip,spdifrx.txt
new file mode 100644
index 0000000000000..db718ec8fae13
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rockchip,spdifrx.txt
@@ -0,0 +1,38 @@
+* Rockchip SPDIF Receiver
+
+The S/PDIF audio block is a stereo receiver that allows the
+processor to receive and digital audio via an coaxial cable or
+a fibre cable.
+
+Required properties:
+
+- compatible: should be one of the following:
+   - "rockchip,rk3308-spdifrx"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: should contain the SPDIF interrupt.
+- dmas: DMA specifiers for rx dma. See the DMA client binding,
+  Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: should be "rx"
+- clocks: a list of phandle + clock-specifier pairs, one for each entry
+  in clock-names.
+- clock-names: should contain following:
+   - "hclk": clock for SPDIF controller
+   - "mclk" : clock for SPDIF bus
+- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
+- reset-names: reset names, should include "spdifrx-m".
+
+Example for the rk3308 SPDIF-RX controller:
+
+spdif_rx: spdif-rx@ff3b0000 {
+	compatible = "rockchip,rk3308-spdifrx";
+	reg = <0x0 0xff3b0000 0x0 0x1000>;
+	interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&cru SCLK_SPDIF_RX>, <&cru HCLK_SPDIFRX>;
+	clock-names = "mclk", "hclk";
+	dmas = <&dmac1 14>;
+	dma-names = "rx";
+	resets = <&cru SRST_SPDIFRX_M>;
+	reset-names = "spdifrx-m";
+	status = "disabled";
+};
diff --git a/sound/soc/rockchip/Kconfig b/sound/soc/rockchip/Kconfig
index e9a97eea68a63..bace3696ac8fd 100644
--- a/sound/soc/rockchip/Kconfig
+++ b/sound/soc/rockchip/Kconfig
@@ -55,6 +55,14 @@ config SND_SOC_ROCKCHIP_SPDIF
 	  Say Y or M if you want to add support for SPDIF driver for
 	  Rockchip SPDIF transceiver device.
 
+config SND_SOC_ROCKCHIP_SPDIFRX
+	tristate "Rockchip SPDIFRX Device Driver"
+	depends on CLKDEV_LOOKUP && SND_SOC_ROCKCHIP
+	select SND_SOC_GENERIC_DMAENGINE_PCM
+	help
+	  Say Y or M if you want to add support for SPDIFRX driver for
+	  Rockchip SPDIF receiver device.
+
 config SND_SOC_ROCKCHIP_VAD
 	tristate "Rockchip Voice Activity Detection Driver"
 	depends on CLKDEV_LOOKUP && SND_SOC_ROCKCHIP
diff --git a/sound/soc/rockchip/Makefile b/sound/soc/rockchip/Makefile
index 8518cbaa38229..dd14ed554d9d6 100644
--- a/sound/soc/rockchip/Makefile
+++ b/sound/soc/rockchip/Makefile
@@ -4,6 +4,7 @@ snd-soc-rockchip-i2s-tdm-objs := rockchip_i2s_tdm.o
 snd-soc-rockchip-multi-dais-objs := rockchip_multi_dais.o rockchip_multi_dais_pcm.o
 snd-soc-rockchip-pdm-objs := rockchip_pdm.o
 snd-soc-rockchip-spdif-objs := rockchip_spdif.o
+snd-soc-rockchip-spdifrx-objs := rockchip_spdifrx.o
 snd-soc-rockchip-vad-objs := rockchip_vad.o
 ifdef CONFIG_THUMB2_KERNEL
 snd-soc-rockchip-vad-$(CONFIG_THUMB2_KERNEL) += vad_preprocess_thumb.o
@@ -17,6 +18,7 @@ obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S_TDM) += snd-soc-rockchip-i2s-tdm.o
 obj-$(CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS) += snd-soc-rockchip-multi-dais.o
 obj-$(CONFIG_SND_SOC_ROCKCHIP_PDM) += snd-soc-rockchip-pdm.o
 obj-$(CONFIG_SND_SOC_ROCKCHIP_SPDIF) += snd-soc-rockchip-spdif.o
+obj-$(CONFIG_SND_SOC_ROCKCHIP_SPDIFRX) += snd-soc-rockchip-spdifrx.o
 obj-$(CONFIG_SND_SOC_ROCKCHIP_VAD) += snd-soc-rockchip-vad.o
 
 snd-soc-rockchip-da7219-objs := rockchip_da7219.o
diff --git a/sound/soc/rockchip/rockchip_spdifrx.c b/sound/soc/rockchip/rockchip_spdifrx.c
new file mode 100644
index 0000000000000..d5e7455c809ae
--- /dev/null
+++ b/sound/soc/rockchip/rockchip_spdifrx.c
@@ -0,0 +1,403 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ALSA SoC Audio Layer - Rockchip SPDIF_RX Controller driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/of_gpio.h>
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+#include <sound/pcm_params.h>
+#include <sound/dmaengine_pcm.h>
+
+#include "rockchip_spdifrx.h"
+
+struct rk_spdifrx_dev {
+	struct device *dev;
+	struct clk *mclk;
+	struct clk *hclk;
+	struct snd_dmaengine_dai_dma_data capture_dma_data;
+	struct regmap *regmap;
+	struct reset_control *reset;
+	int irq;
+};
+
+static int rk_spdifrx_runtime_suspend(struct device *dev)
+{
+	struct rk_spdifrx_dev *spdifrx = dev_get_drvdata(dev);
+
+	clk_disable_unprepare(spdifrx->mclk);
+	clk_disable_unprepare(spdifrx->hclk);
+
+	return 0;
+}
+
+static int rk_spdifrx_runtime_resume(struct device *dev)
+{
+	struct rk_spdifrx_dev *spdifrx = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(spdifrx->mclk);
+	if (ret) {
+		dev_err(spdifrx->dev, "mclk clock enable failed %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_prepare_enable(spdifrx->hclk);
+	if (ret) {
+		dev_err(spdifrx->dev, "hclk clock enable failed %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rk_spdifrx_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params,
+				struct snd_soc_dai *dai)
+{
+	struct rk_spdifrx_dev *spdifrx = snd_soc_dai_get_drvdata(dai);
+
+	regmap_update_bits(spdifrx->regmap, SPDIFRX_INTEN,
+			   SPDIFRX_INTEN_SYNCIE_MASK |
+			   SPDIFRX_INTEN_NSYNCIE_MASK,
+			   SPDIFRX_INTEN_SYNCIE_EN |
+			   SPDIFRX_INTEN_NSYNCIE_EN);
+	regmap_update_bits(spdifrx->regmap, SPDIFRX_DMACR,
+			   SPDIFRX_DMACR_RDL_MASK, SPDIFRX_DMACR_RDL(8));
+	regmap_update_bits(spdifrx->regmap, SPDIFRX_CDR,
+			   SPDIFRX_CDR_AVGSEL_MASK | SPDIFRX_CDR_BYPASS_MASK,
+			   SPDIFRX_CDR_AVGSEL_MIN | SPDIFRX_CDR_BYPASS_DIS);
+	return 0;
+}
+
+static void rk_spdifrx_reset(struct rk_spdifrx_dev *spdifrx)
+{
+	reset_control_assert(spdifrx->reset);
+	udelay(1);
+	reset_control_deassert(spdifrx->reset);
+}
+
+static int rk_spdifrx_trigger(struct snd_pcm_substream *substream,
+			      int cmd, struct snd_soc_dai *dai)
+{
+	struct rk_spdifrx_dev *spdifrx = snd_soc_dai_get_drvdata(dai);
+	int ret;
+
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+	case SNDRV_PCM_TRIGGER_RESUME:
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+		rk_spdifrx_reset(spdifrx);
+		ret = regmap_update_bits(spdifrx->regmap, SPDIFRX_DMACR,
+					 SPDIFRX_DMACR_RDE_MASK,
+					 SPDIFRX_DMACR_RDE_ENABLE);
+
+		if (ret != 0)
+			return ret;
+
+		ret = regmap_update_bits(spdifrx->regmap, SPDIFRX_CFGR,
+					 SPDIFRX_EN_MASK,
+					 SPDIFRX_EN);
+		break;
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+	case SNDRV_PCM_TRIGGER_STOP:
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+		ret = regmap_update_bits(spdifrx->regmap, SPDIFRX_DMACR,
+					 SPDIFRX_DMACR_RDE_MASK,
+					 SPDIFRX_DMACR_RDE_DISABLE);
+
+		if (ret != 0)
+			return ret;
+
+		ret = regmap_update_bits(spdifrx->regmap, SPDIFRX_CFGR,
+					 SPDIFRX_EN_MASK,
+					 SPDIFRX_DIS);
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+static int rk_spdifrx_dai_probe(struct snd_soc_dai *dai)
+{
+	struct rk_spdifrx_dev *spdifrx = snd_soc_dai_get_drvdata(dai);
+
+	dai->capture_dma_data = &spdifrx->capture_dma_data;
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops rk_spdifrx_dai_ops = {
+	.hw_params = rk_spdifrx_hw_params,
+	.trigger = rk_spdifrx_trigger,
+};
+
+static struct snd_soc_dai_driver rk_spdifrx_dai = {
+	.probe = rk_spdifrx_dai_probe,
+	.capture = {
+		.stream_name = "Capture",
+		.channels_min = 2,
+		.channels_max = 2,
+		.rates = (SNDRV_PCM_RATE_32000 |
+			  SNDRV_PCM_RATE_44100 |
+			  SNDRV_PCM_RATE_48000 |
+			  SNDRV_PCM_RATE_96000 |
+			  SNDRV_PCM_RATE_192000),
+		.formats = (SNDRV_PCM_FMTBIT_S16_LE |
+			    SNDRV_PCM_FMTBIT_S20_3LE |
+			    SNDRV_PCM_FMTBIT_S24_LE),
+	},
+	.ops = &rk_spdifrx_dai_ops,
+};
+
+static const struct snd_soc_component_driver rk_spdifrx_component = {
+	.name = "rockchip-spdifrx",
+};
+
+static bool rk_spdifrx_wr_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case SPDIFRX_CFGR:
+	case SPDIFRX_CLR:
+	case SPDIFRX_CDR:
+	case SPDIFRX_CDRST:
+	case SPDIFRX_DMACR:
+	case SPDIFRX_FIFOCTRL:
+	case SPDIFRX_INTEN:
+	case SPDIFRX_INTMASK:
+	case SPDIFRX_INTSR:
+	case SPDIFRX_INTCLR:
+	case SPDIFRX_SMPDR:
+	case SPDIFRX_BURSTINFO:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool rk_spdifrx_rd_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case SPDIFRX_CFGR:
+	case SPDIFRX_CLR:
+	case SPDIFRX_CDR:
+	case SPDIFRX_CDRST:
+	case SPDIFRX_DMACR:
+	case SPDIFRX_FIFOCTRL:
+	case SPDIFRX_INTEN:
+	case SPDIFRX_INTMASK:
+	case SPDIFRX_INTSR:
+	case SPDIFRX_INTCLR:
+	case SPDIFRX_SMPDR:
+	case SPDIFRX_BURSTINFO:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool rk_spdifrx_volatile_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case SPDIFRX_CLR:
+	case SPDIFRX_CDR:
+	case SPDIFRX_CDRST:
+	case SPDIFRX_FIFOCTRL:
+	case SPDIFRX_INTSR:
+	case SPDIFRX_INTCLR:
+	case SPDIFRX_BURSTINFO:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static const struct regmap_config rk_spdifrx_regmap_config = {
+	.reg_bits = 32,
+	.reg_stride = 4,
+	.val_bits = 32,
+	.max_register = SPDIFRX_BURSTINFO,
+	.writeable_reg = rk_spdifrx_wr_reg,
+	.readable_reg = rk_spdifrx_rd_reg,
+	.volatile_reg = rk_spdifrx_volatile_reg,
+	.cache_type = REGCACHE_FLAT,
+};
+
+static irqreturn_t rk_spdifrx_isr(int irq, void *dev_id)
+{
+	struct rk_spdifrx_dev *spdifrx = dev_id;
+	u32 intsr;
+
+	regmap_read(spdifrx->regmap, SPDIFRX_INTSR, &intsr);
+
+	if (intsr & BIT(7)) {
+		dev_dbg(spdifrx->dev, "NSYNC\n");
+		regmap_write(spdifrx->regmap, SPDIFRX_INTCLR, BIT(7));
+	}
+
+	if (intsr & BIT(9)) {
+		dev_dbg(spdifrx->dev, "SYNC\n");
+		regmap_write(spdifrx->regmap, SPDIFRX_INTCLR, BIT(9));
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int rk_spdifrx_probe(struct platform_device *pdev)
+{
+	struct rk_spdifrx_dev *spdifrx;
+	struct resource *res;
+	void __iomem *regs;
+	int ret;
+
+	spdifrx = devm_kzalloc(&pdev->dev, sizeof(*spdifrx), GFP_KERNEL);
+	if (!spdifrx)
+		return -ENOMEM;
+
+	spdifrx->reset = devm_reset_control_get(&pdev->dev, "spdifrx-m");
+	if (IS_ERR(spdifrx->reset)) {
+		ret = PTR_ERR(spdifrx->reset);
+		if (ret != -ENOENT)
+			return ret;
+	}
+
+	spdifrx->hclk = devm_clk_get(&pdev->dev, "hclk");
+	if (IS_ERR(spdifrx->hclk))
+		return PTR_ERR(spdifrx->hclk);
+
+	spdifrx->mclk = devm_clk_get(&pdev->dev, "mclk");
+	if (IS_ERR(spdifrx->mclk))
+		return PTR_ERR(spdifrx->mclk);
+
+	spdifrx->irq = platform_get_irq(pdev, 0);
+	if (spdifrx->irq < 0)
+		return spdifrx->irq;
+
+	ret = devm_request_threaded_irq(&pdev->dev, spdifrx->irq, NULL,
+					rk_spdifrx_isr,
+					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+					dev_name(&pdev->dev), spdifrx);
+	if (ret)
+		return ret;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	regs = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(regs))
+		return PTR_ERR(regs);
+
+	spdifrx->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
+						&rk_spdifrx_regmap_config);
+	if (IS_ERR(spdifrx->regmap))
+		return PTR_ERR(spdifrx->regmap);
+
+	spdifrx->capture_dma_data.addr = res->start + SPDIFRX_SMPDR;
+	spdifrx->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+	spdifrx->capture_dma_data.maxburst = 4;
+
+	spdifrx->dev = &pdev->dev;
+	dev_set_drvdata(&pdev->dev, spdifrx);
+
+	pm_runtime_enable(&pdev->dev);
+	if (!pm_runtime_enabled(&pdev->dev)) {
+		ret = rk_spdifrx_runtime_resume(&pdev->dev);
+		if (ret)
+			goto err_pm_runtime;
+	}
+
+	ret = devm_snd_soc_register_component(&pdev->dev,
+					      &rk_spdifrx_component,
+					      &rk_spdifrx_dai, 1);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not register DAI\n");
+		goto err_pm_suspend;
+	}
+
+	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not register PCM\n");
+		goto err_pm_suspend;
+	}
+
+	return 0;
+
+err_pm_suspend:
+	if (!pm_runtime_status_suspended(&pdev->dev))
+		rk_spdifrx_runtime_suspend(&pdev->dev);
+err_pm_runtime:
+	pm_runtime_disable(&pdev->dev);
+
+	return ret;
+}
+
+static int rk_spdifrx_remove(struct platform_device *pdev)
+{
+	pm_runtime_disable(&pdev->dev);
+	if (!pm_runtime_status_suspended(&pdev->dev))
+		rk_spdifrx_runtime_suspend(&pdev->dev);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int rockchip_spdifrx_suspend(struct device *dev)
+{
+	struct rk_spdifrx_dev *spdifrx = dev_get_drvdata(dev);
+
+	regcache_mark_dirty(spdifrx->regmap);
+
+	return 0;
+}
+
+static int rockchip_spdifrx_resume(struct device *dev)
+{
+	struct rk_spdifrx_dev *spdifrx = dev_get_drvdata(dev);
+	int ret;
+
+	ret = pm_runtime_get_sync(dev);
+	if (ret < 0)
+		return ret;
+	ret = regcache_sync(spdifrx->regmap);
+	pm_runtime_put(dev);
+
+	return ret;
+}
+#endif
+
+static const struct dev_pm_ops rk_spdifrx_pm_ops = {
+	SET_RUNTIME_PM_OPS(rk_spdifrx_runtime_suspend, rk_spdifrx_runtime_resume,
+			   NULL)
+	SET_SYSTEM_SLEEP_PM_OPS(rockchip_spdifrx_suspend, rockchip_spdifrx_resume)
+};
+
+static const struct of_device_id rk_spdifrx_match[] = {
+	{ .compatible = "rockchip,rk3308-spdifrx", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, rk_spdifrx_match);
+
+static struct platform_driver rk_spdifrx_driver = {
+	.probe = rk_spdifrx_probe,
+	.remove = rk_spdifrx_remove,
+	.driver = {
+		.name = "rockchip-spdifrx",
+		.of_match_table = of_match_ptr(rk_spdifrx_match),
+		.pm = &rk_spdifrx_pm_ops,
+	},
+};
+module_platform_driver(rk_spdifrx_driver);
+
+MODULE_ALIAS("platform:rockchip-spdifrx");
+MODULE_DESCRIPTION("ROCKCHIP SPDIFRX Controller Interface");
+MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/rockchip/rockchip_spdifrx.h b/sound/soc/rockchip/rockchip_spdifrx.h
new file mode 100644
index 0000000000000..e75b2d5afd046
--- /dev/null
+++ b/sound/soc/rockchip/rockchip_spdifrx.h
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * ALSA SoC Audio Layer - Rockchip SPDIF_RX Controller driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef _ROCKCHIP_SPDIFRX_H
+#define _ROCKCHIP_SPDIFRX_H
+
+/* CFGR */
+#define SPDIFRX_CFGR_TWAD_SHIFT		1
+#define SPDIFRX_CFGR_TWAD_DATA_ONLY	(0 << 1)
+#define SPDIFRX_CFGR_TWAD_STREAM	BIT(1)
+#define SPDIFRX_EN_MASK			BIT(0)
+#define SPDIFRX_EN			BIT(0)
+#define SPDIFRX_DIS			0
+
+/* CLR */
+#define SPDIFRX_CLR_RXSC		BIT(0)
+
+/* CDR */
+#define SPDIFRX_CDR_CS_MASK		GENMASK(10, 9)
+#define SPDIFRX_CDR_AVGSEL_MASK		BIT(1)
+#define SPDIFRX_CDR_AVGSEL_MIN		(0 << 1)
+#define SPDIFRX_CDR_AVGSEL_AVG		BIT(1)
+#define SPDIFRX_CDR_BYPASS_MASK		BIT(0)
+#define SPDIFRX_CDR_BYPASS_EN		BIT(0)
+#define SPDIFRX_CDR_BYPASS_DIS		0
+
+/* CDRST */
+#define SPDIFRX_CDRST_NOSTRTHR_MASK	GENMASK(31, 16)
+#define SPDIFRX_CDRST_MAXCNT_MASK	GENMASK(15, 8)
+#define SPDIFRX_CDRST_MINCNT_MASK	GENMASK(7, 0)
+
+/* DMACR */
+#define SPDIFRX_DMACR_RDE_MASK		BIT(5)
+#define SPDIFRX_DMACR_RDE_DISABLE	(0 << 5)
+#define SPDIFRX_DMACR_RDE_ENABLE	BIT(5)
+#define SPDIFRX_DMACR_RDL_MASK		GENMASK(4, 0)
+#define SPDIFRX_DMACR_RDL(x)		(((x) - 1) << 0)
+
+/* FIFOCTRL */
+#define SPDIFRX_FIFOCTRL_RFL_MASK	GENMASK(13, 8)
+#define SPDIFRX_FIFOCTRL_RFT_MASK	GENMASK(4, 0)
+
+/* INTEN */
+#define SPDIFRX_INTEN_UBCIE_MASK	BIT(10)
+#define SPDIFRX_INTEN_UBCIE_EN		BIT(10)
+#define SPDIFRX_INTEN_UBCIE_DIS		(0 << 10)
+#define SPDIFRX_INTEN_SYNCIE_MASK	BIT(9)
+#define SPDIFRX_INTEN_SYNCIE_EN		BIT(9)
+#define SPDIFRX_INTEN_SYNCIE_DIS	(0 << 9)
+#define SPDIFRX_INTEN_BTEIE_MASK	BIT(8)
+#define SPDIFRX_INTEN_BTEIE_EN		BIT(8)
+#define SPDIFRX_INTEN_BTEIE_DIS		(0 << 8)
+#define SPDIFRX_INTEN_NSYNCIE_MASK	BIT(7)
+#define SPDIFRX_INTEN_NSYNCIE_EN	BIT(7)
+#define SPDIFRX_INTEN_NSYNCIE_DIS	(0 << 7)
+
+/* INTMASK */
+#define SPDIFRX_INTMASK_UBCIMSK		BIT(10)
+#define SPDIFRX_INTMASK_UBCIUMSK	(0 << 10)
+#define SPDIFRX_INTMASK_SYNCIMSK	BIT(9)
+#define SPDIFRX_INTMASK_SYNCIUMSK	(0 << 9)
+#define SPDIFRX_INTMASK_BTEIMSK		BIT(8)
+#define SPDIFRX_INTMASK_BTEIUMSK	(0 << 8)
+#define SPDIFRX_INTMASK_NSYNCIMSK	BIT(7)
+#define SPDIFRX_INTMASK_NSYNCIUMSK	(0 << 7)
+
+/* INTSR */
+#define SPDIFRX_INTSR_UBCISR_ACTIVE	BIT(10)
+#define SPDIFRX_INTSR_SYNCISR_ACTIVE	BIT(9)
+#define SPDIFRX_INTSR_BTEISR_ACTIVE	BIT(8)
+#define SPDIFRX_INTSR_NSYNCISR_ACTIVE	BIT(7)
+
+/* INTCLR */
+#define SPDIFRX_INTCLR_UBCICLR_MASK	BIT(10)
+#define SPDIFRX_INTCLR_UBCICLR		BIT(10)
+#define SPDIFRX_INTCLR_SYNCICLR_MASK	BIT(9)
+#define SPDIFRX_INTCLR_SYNCICLR		BIT(9)
+#define SPDIFRX_INTCLR_BTECLR_MASK	BIT(8)
+#define SPDIFRX_INTCLR_BIECLR		BIT(8)
+#define SPDIFRX_INTCLR_NSYNCICLR_MASK	BIT(7)
+#define SPDIFRX_INTCLR_NSYNCICLR	BIT(7)
+
+/* BURSTINFO */
+#define SPDIFRX_BURSTINFO_PD_MASK	GENMASK(31, 16)
+#define SPDIFRX_BURSTINFO_BSNUM_MASK	GENMASK(15, 13)
+#define SPDIFRX_BURSTINFO_DATAINFO_MASK	GENMASK(12, 8)
+#define SPDIFRX_BURSTINFO_ERRFLAG_MASK	BIT(7)
+#define SPDIFRX_BURSTINFO_ERR		BIT(7)
+#define SPDIFRX_BURSTINFO_VALID		(0 << 7)
+#define SPDIFRX_BURSTINFO_DATATYPE_MASK	GENMASK(6, 0)
+
+#define SPDIFRX_VERSION			(0x0000)
+#define SPDIFRX_CFGR			(0x0004)
+#define SPDIFRX_CLR			(0x0008)
+#define SPDIFRX_CDR			(0x000c)
+#define SPDIFRX_CDRST			(0x0010)
+#define SPDIFRX_DMACR			(0x0014)
+#define SPDIFRX_FIFOCTRL		(0x0018)
+#define SPDIFRX_INTEN			(0x001C)
+#define SPDIFRX_INTMASK			(0x0020)
+#define SPDIFRX_INTSR			(0x0024)
+#define SPDIFRX_INTCLR			(0x0028)
+#define SPDIFRX_SMPDR			(0x002C)
+#define SPDIFRX_USRDRN			(0x0030)
+#define SPDIFRX_CHNSRN			(0x0060)
+#define SPDIFRX_BURSTINFO		(0x0100)
+
+#endif /* _ROCKCHIP_SPDIFRX_H */

From 0473191abe0622d9c3ca062ea756f1452ac5bdda Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 31 Jul 2018 17:10:53 +0800
Subject: [PATCH 0728/1852] arm64: dts: rockchip: rk3308: add spdifrx node

Change-Id: I3a2423ae362b169b870afb7d8b2d2414a2297ec1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 5f4e4c318b818..c25797f69a480 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -914,6 +914,21 @@
 		status = "disabled";
 	};
 
+	spdif_rx: spdif-rx@ff3b0000 {
+		compatible = "rockchip,rk3308-spdifrx";
+		reg = <0x0 0xff3b0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SPDIF_RX>, <&cru HCLK_SPDIFRX>;
+		clock-names = "mclk", "hclk";
+		dmas = <&dmac1 14>;
+		dma-names = "rx";
+		resets = <&cru SRST_SPDIFRX_M>;
+		reset-names = "spdifrx-m";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdif_in>;
+		status = "disabled";
+	};
+
 	vad: vad@ff3c0000 {
 		compatible = "rockchip,rk3308-vad", "rockchip,vad";
 		reg = <0x0 0xff3c0000 0x0 0x10000>, <0x0 0xfff88000 0x0 0x38000>;
@@ -1613,6 +1628,13 @@
 			};
 		};
 
+		spdif_in {
+			spdif_in: spdif-in {
+				rockchip,pins =
+					<0 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		spdif_out {
 			spdif_out: spdif-out {
 				rockchip,pins =

From 4f361da162f3f384282b3afe32f198e9dc4db053 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 31 Jul 2018 17:42:28 +0800
Subject: [PATCH 0729/1852] arm64: dts: rockchip: rk3308-evb-*: add spdifrx
 sound

Change-Id: I90a91f9d3364d8eeb3f1c8e757a682fe079c8150
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 12 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi | 12 ++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 5ee978ff5dc16..059df0fb8d2eb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -125,6 +125,18 @@
 		rockchip,wait-card-locked = <0>;
 	};
 
+	spdif_rx_sound: spdif-rx-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "rockchip,spdif-rx-sound";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif_rx>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+
 	spdif_tx_sound: spdif-tx-sound {
 		status = "disabled";
 		compatible = "simple-audio-card";
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index fc97ee63b55d8..32f4d225edd4f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -110,6 +110,18 @@
 		rockchip,wait-card-locked = <0>;
 	};
 
+	spdif_rx_sound: spdif-rx-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "rockchip,spdif-rx-sound";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif_rx>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+
 	spdif_tx_sound: spdif-tx-sound {
 		status = "disabled";
 		compatible = "simple-audio-card";

From 021dbad5ddc77eb3157114baa56c7587efe13ca7 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 31 Jul 2018 17:48:35 +0800
Subject: [PATCH 0730/1852] arm64: configs: rk3308_linux_defconfig: enable
 spdifrx

Change-Id: I07924238245bf07be4089774244ddc579937b547
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index 7702eb755c818..949b52132c74e 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -163,6 +163,7 @@ CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
 CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=y
 CONFIG_SND_SOC_ROCKCHIP_PDM=y
 CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
+CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=y
 CONFIG_SND_SOC_ROCKCHIP_VAD=y
 CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y
 CONFIG_SND_SOC_DUMMY_CODEC=y

From e37f68262db80ad0aed09ef890856814a727c17c Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 2 Aug 2018 10:21:36 +0800
Subject: [PATCH 0731/1852] drm/rockchip: rgb: Fix pinctrl handling

Change-Id: I473f51993b97b3f597d906044d4d61e1af2cf5a7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../display/rockchip/rockchip-rgb.txt         |  7 ++---
 drivers/gpu/drm/rockchip/rockchip_rgb.c       | 27 +++----------------
 2 files changed, 8 insertions(+), 26 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
index a53b1f6dea89f..cb3e490a43f2e 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
@@ -9,8 +9,9 @@ Required properties:
 	- "rockchip,rk3308-rgb";
 
 Optional properties:
-- pinctrl-names: must contain a "lcdc" entry.
-- pinctrl-0: pin control group to be used for this interface.
+- pinctrl-names: the pin control state names; should contain "default"
+- pinctrl-0: the default pinctrl state (active)
+- pinctrl-1: the "sleep" pinctrl state
 
 The rgb has two video ports described by:
 	Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -45,7 +46,7 @@ For Rockchip RV1108:
 
 	rgb: rgb {
 		compatible = "rockchip,rv1108-rgb";
-		pinctrl-names = "lcdc";
+		pinctrl-names = "default";
 		pinctrl-0 = <&lcdc_ctl>;
 
 		ports {
diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c
index 26ac585ba666c..0ff696be43421 100644
--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c
@@ -44,7 +44,6 @@ struct rockchip_rgb {
 	struct drm_bridge *bridge;
 	struct drm_connector connector;
 	struct drm_encoder encoder;
-	struct dev_pin_info *pins;
 	int output_mode;
 	struct regmap *grf;
 };
@@ -112,6 +111,8 @@ static void rockchip_rgb_encoder_enable(struct drm_encoder *encoder)
 {
 	struct rockchip_rgb *rgb = encoder_to_rgb(encoder);
 
+	pinctrl_pm_select_default_state(rgb->dev);
+
 	if (rgb->grf) {
 		int pipe = drm_of_encoder_active_endpoint_id(rgb->dev->of_node,
 							     encoder);
@@ -122,10 +123,6 @@ static void rockchip_rgb_encoder_enable(struct drm_encoder *encoder)
 	}
 
 	drm_panel_prepare(rgb->panel);
-	/* iomux to LCD data/sync mode */
-	if (rgb->pins && !IS_ERR(rgb->pins->default_state))
-		pinctrl_select_state(rgb->pins->p, rgb->pins->default_state);
-
 	drm_panel_enable(rgb->panel);
 }
 
@@ -135,6 +132,8 @@ static void rockchip_rgb_encoder_disable(struct drm_encoder *encoder)
 
 	drm_panel_disable(rgb->panel);
 	drm_panel_unprepare(rgb->panel);
+
+	pinctrl_pm_select_sleep_state(rgb->dev);
 }
 
 static int
@@ -366,24 +365,6 @@ static int rockchip_rgb_probe(struct platform_device *pdev)
 		}
 	}
 
-	rgb->pins = devm_kzalloc(rgb->dev, sizeof(*rgb->pins), GFP_KERNEL);
-	if (!rgb->pins)
-		return -ENOMEM;
-	rgb->pins->p = devm_pinctrl_get(rgb->dev);
-	if (IS_ERR(rgb->pins->p)) {
-		DRM_DEV_ERROR(dev, "no pinctrl handle\n");
-		devm_kfree(rgb->dev, rgb->pins);
-		rgb->pins = NULL;
-	} else {
-		rgb->pins->default_state =
-			pinctrl_lookup_state(rgb->pins->p, "lcdc");
-		if (IS_ERR(rgb->pins->default_state)) {
-			DRM_DEV_ERROR(dev, "no default pinctrl state\n");
-			devm_kfree(rgb->dev, rgb->pins);
-			rgb->pins = NULL;
-		}
-	}
-
 	dev_set_drvdata(dev, rgb);
 	ret = component_add(&pdev->dev, &rockchip_rgb_component_ops);
 	if (ret < 0)

From a1a864a38b2004b3179bb63b0f1edd4d6f34cce8 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 2 Aug 2018 19:11:06 +0800
Subject: [PATCH 0732/1852] arm64: dts: rockchip: Change vdd_log to 900000uV
 for rk3399-sapphire

As 900000uV is enough for vdd_log.

Change-Id: I479a857735e4f49141322e7635dea7c1bee0e118
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 8276ef1a72ee0..3d76b9733665e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -188,7 +188,7 @@
 
 		/* for rockchip boot on */
 		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		rockchip,pwm_voltage = <900000>;
 	};
 
 	xin32k: xin32k {

From b64bb9484ea8ad124e59fbe5cea998ea8005c817 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 2 Aug 2018 15:00:05 +0800
Subject: [PATCH 0733/1852] arm64: dts: rockchip: rk3399: Change vdd_log to
 900000uV

As 900000uV is enough for vdd_log.

Change-Id: I05194a4071aba066683f48e04c1d467f54bc77dc
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts   | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts        | 2 +-
 arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts        | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
index 7cd13371b9a43..2859986d630c9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
@@ -344,7 +344,7 @@
 
 		/* for rockchip boot on */
 		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		rockchip,pwm_voltage = <900000>;
 	};
 
 	vccadc_ref: vccadc-ref {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
index c3e076f7ff897..99d40a3f71154 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly-linux.dts
@@ -293,7 +293,7 @@
 
 		/* for rockchip boot on */
 		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		rockchip,pwm_voltage = <900000>;
 	};
 
 	vccadc_ref: vccadc-ref {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
index 66d503026a8d4..ffb32e289b837 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
@@ -140,7 +140,7 @@
 		compatible = "pwm-regulator";
 		pwms = <&pwm2 0 25000 1>;
 		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		rockchip,pwm_voltage = <900000>;
 		regulator-name = "vdd_log";
 		regulator-min-microvolt = <750000>;
 		regulator-max-microvolt = <1350000>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts b/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts
index 89985cf75361f..08b6444fbbd1c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1205g.dts
@@ -107,7 +107,7 @@
 		compatible = "pwm-regulator";
 		pwms = <&pwm2 0 25000 1>;
 		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		rockchip,pwm_voltage = <900000>;
 		regulator-name = "vdd_log";
 		regulator-min-microvolt = <750000>;
 		regulator-max-microvolt = <1350000>;

From 72f5d317ae442b4328879eb45e2ae4585e20ebe5 Mon Sep 17 00:00:00 2001
From: William Wu <wulf@rock-chips.com>
Date: Fri, 7 Apr 2017 22:02:20 +0800
Subject: [PATCH 0734/1852] usb: dwc_otg_310: support high bandwidth endpoints

According to 'DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
Programmer's Guide' 2.1.3.3 Dedicated FIFO Mode with Thresholding,
We can use threshold to support the following case:

1. To have a smaller FIFO size;
2. To have faster DMA response;

The threshold is useful for rockchip platforms which has a smaller
FIFO size and try to support three isochronous back-to-back packets
(high bandwidth).

And we also need to set GAHBCFG.HBstLen to INCR16 for high bandwidth
endpoints. If you want to support high bandwidth endpoints, it needs
to add a new property 'rockchip,high-bandwidth' in dts usb node.

Change-Id: I0c1d373cdaa51f22c15484912b752fb0b6ad4b9c
Signed-off-by: William Wu <wulf@rock-chips.com>
---
 .../devicetree/bindings/usb/rockchip-usb.txt   |  2 ++
 drivers/usb/dwc_otg_310/dwc_otg_cil.c          | 18 +++++++++++++++---
 drivers/usb/dwc_otg_310/dwc_otg_cil.h          |  3 +++
 drivers/usb/dwc_otg_310/dwc_otg_driver.c       | 10 ++++++++++
 4 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/rockchip-usb.txt b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
index e014cbc7388df..308b17f166eb0 100644
--- a/Documentation/devicetree/bindings/usb/rockchip-usb.txt
+++ b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
@@ -23,6 +23,8 @@ Optional properties:
    from PMIC.
  - rockchip,hc-halt-quirk: when set, force to halt a host channel
    even if it's used for a non-split periodic transfer.
+ - rockchip,high-bandwidth: If present, support high bandwidth
+   endpoints.
 
 Example:
  - RK3288
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.c b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
index 4d37990c6709d..ffe64e7a187f8 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
@@ -1394,7 +1394,11 @@ void dwc_otg_core_init(dwc_otg_core_if_t *core_if)
 		DWC_DEBUGPL(DBG_CIL, "Internal DMA Mode\n");
 		/* Old value was DWC_GAHBCFG_INT_DMA_BURST_INCR - done for
 		   Host mode ISOC in issue fix - vahrama */
-		ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+		if (core_if->high_bandwidth_en)
+			ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR16;
+		else
+			ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+
 		core_if->dma_enable = (core_if->core_params->dma_enable != 0);
 		core_if->dma_desc_enable =
 		    (core_if->core_params->dma_desc_enable != 0);
@@ -1714,7 +1718,11 @@ void dwc_otg_core_init_no_reset(dwc_otg_core_if_t *core_if)
 		DWC_DEBUGPL(DBG_CIL, "Internal DMA Mode\n");
 		/* Old value was DWC_GAHBCFG_INT_DMA_BURST_INCR - done for
 		   Host mode ISOC in issue fix - vahrama */
-		ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+		if (core_if->high_bandwidth_en)
+			ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR16;
+		else
+			ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+
 		core_if->dma_enable = (core_if->core_params->dma_enable != 0);
 		core_if->dma_desc_enable =
 		    (core_if->core_params->dma_desc_enable != 0);
@@ -1973,7 +1981,11 @@ void dwc_otg_core_dev_init(dwc_otg_core_if_t *core_if)
 	DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
 	dwc_udelay(10);
 
-	gahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+	if (core_if->high_bandwidth_en)
+		gahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR16;
+	else
+		gahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR8;
+
 	DWC_MODIFY_REG32(&global_regs->gahbcfg, 0, gahbcfg.d32);
 
 	/* Device configuration register */
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.h b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
index cdcf22789e6eb..b5486163c6fa6 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.h
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
@@ -852,6 +852,9 @@ struct dwc_otg_core_if {
 	/* Indicates need to force a host channel halt */
 	bool hc_halt_quirk;
 
+	/* True if support high bandwidth endpoints */
+	bool high_bandwidth_en;
+
 	/* Indicate USB get VBUS 5V from PMIC(e.g. rk81x) */
 	bool pmic_vbus;
 
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index d309af31e9fe2..7569fc6967635 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -1474,6 +1474,16 @@ static int otg20_driver_probe(struct platform_device *_dev)
 		goto fail;
 	}
 
+	dwc_otg_device->core_if->high_bandwidth_en = of_property_read_bool(node,
+						"rockchip,high-bandwidth");
+
+	/*
+	 * If support high bandwidth endpoint, use 'Dedicated FIFO Mode
+	 * with Thresholding', and enable thresholding for isochronous IN
+	 * endpoints. Note: Thresholding is supported only in device mode.
+	 */
+	if (dwc_otg_device->core_if->high_bandwidth_en)
+		dwc_otg_module_params.thr_ctl = 2;
 	/*
 	 * Validate parameter values.
 	 */

From 9098b9fb8eb1e9cb9314e82d838cfb872d3c2e73 Mon Sep 17 00:00:00 2001
From: William Wu <wulf@rock-chips.com>
Date: Thu, 13 Apr 2017 19:35:55 +0800
Subject: [PATCH 0735/1852] usb: dwc_otg_310: pcd: don't print info if no more
 ISOC requests

Change-Id: I672f3246cd14e6978fec6c62f471e16b2a3863bd
Signed-off-by: William Wu <wulf@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
index 9837b49db2736..760cd96f60e4d 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
@@ -284,7 +284,7 @@ void start_next_request(dwc_otg_pcd_ep_t *ep)
 #endif
 		dwc_otg_ep_start_transfer(GET_CORE_IF(ep->pcd), &ep->dwc_ep);
 	} else if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) {
-		DWC_PRINTF("There are no more ISOC requests \n");
+		DWC_DEBUGPL(DBG_PCD, "There are no more ISOC requests\n");
 		ep->dwc_ep.frame_num = 0xFFFFFFFF;
 	}
 }

From 5ac7677354fcc7541caf20f38ef8b2114e13460a Mon Sep 17 00:00:00 2001
From: Frank Wang <frank.wang@rock-chips.com>
Date: Tue, 14 Mar 2017 09:33:19 +0800
Subject: [PATCH 0736/1852] usb: dwc_otg_310: amend last_id property to support
 PM suspend

Move last_id property from static to struct dwc_otg_device as a static
global variable to support PM suspend process.

Change-Id: I7729095339aed3dcca6481005f249c855ebbdb3c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 .../devicetree/bindings/usb/rockchip-usb.txt   |  2 ++
 drivers/usb/dwc_otg_310/dwc_otg_cil.h          |  3 +++
 drivers/usb/dwc_otg_310/dwc_otg_driver.c       | 18 ++++++++++++++++++
 drivers/usb/dwc_otg_310/dwc_otg_driver.h       |  2 ++
 drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c    |  8 ++++----
 5 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/rockchip-usb.txt b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
index 308b17f166eb0..ace71f3941510 100644
--- a/Documentation/devicetree/bindings/usb/rockchip-usb.txt
+++ b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
@@ -25,6 +25,8 @@ Optional properties:
    even if it's used for a non-split periodic transfer.
  - rockchip,high-bandwidth: If present, support high bandwidth
    endpoints.
+ - rockchip,usb-pd-off: when set, support turning off usb pd at
+   PM suspend.
 
 Example:
  - RK3288
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.h b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
index b5486163c6fa6..aac00808fbc81 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.h
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
@@ -858,6 +858,9 @@ struct dwc_otg_core_if {
 	/* Indicate USB get VBUS 5V from PMIC(e.g. rk81x) */
 	bool pmic_vbus;
 
+	/* True if support power down usb in suspend */
+	bool usb_pd_off;
+
 #ifdef DWC_DEV_SRPCAP
 	/* This timer is needed to power on the hibernated host core if SRP is not
 	 * initiated on connected SRP capable device for limited period of time
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index 7569fc6967635..b0a2542c7209f 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -1134,6 +1134,9 @@ static int host20_driver_probe(struct platform_device *_dev)
 		goto fail;
 	}
 
+	/* Initialize last_id */
+	dwc_otg_device->last_id = -1;
+
 	clk_set_rate(pldata->phyclk_480m, 480000000);
 	/*
 	 * Enable the global interrupt after all the interrupt
@@ -1542,6 +1545,10 @@ static int otg20_driver_probe(struct platform_device *_dev)
 	dwc_otg_device->core_if->hc_halt_quirk =
 		of_property_read_bool(node, "rockchip,hc-halt-quirk");
 
+	/* usb pd off support */
+	dwc_otg_device->core_if->usb_pd_off =
+		of_property_read_bool(node, "rockchip,usb-pd-off");
+
 #ifndef DWC_HOST_ONLY
 	/*
 	 * Initialize the PCD
@@ -1564,6 +1571,9 @@ static int otg20_driver_probe(struct platform_device *_dev)
 		goto fail;
 	}
 #endif
+	/* Initialize last_id */
+	dwc_otg_device->last_id = -1;
+
 	/*
 	 * Enable the global interrupt after all the interrupt
 	 * handlers are installed if there is no ADP support else
@@ -1604,6 +1614,9 @@ static int dwc_otg_pm_suspend(struct device *dev)
 
 	dev_dbg(dev, "dwc_otg PM suspend\n");
 
+	if (dwc_otg_device->core_if->usb_pd_off)
+		cancel_delayed_work(&dwc_otg_device->pcd->check_id_work);
+
 	if (dwc_otg_device->core_if->op_state == B_PERIPHERAL)
 		return 0;
 
@@ -1622,6 +1635,11 @@ static int dwc_otg_pm_resume(struct device *dev)
 
 	dev_dbg(dev, "dwc_otg PM resume\n");
 
+	if (dwc_otg_device->core_if->usb_pd_off) {
+		dwc_otg_device->last_id = -1;
+		schedule_delayed_work(&dwc_otg_device->pcd->check_id_work, HZ);
+	}
+
 	if (dwc_otg_device->core_if->op_state == B_PERIPHERAL)
 		return 0;
 
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.h b/drivers/usb/dwc_otg_310/dwc_otg_driver.h
index 0e4d9715cd58a..234004fb163f5 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.h
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.h
@@ -69,6 +69,8 @@ typedef struct dwc_otg_device {
 	/** Flag to indicate whether the common IRQ handler is installed. */
 	uint8_t common_irq_installed;
 
+	/* The last ID value read from GRF IDDIG status */
+	int32_t last_id;
 } dwc_otg_device_t;
 
 /*We must clear S3C24XX_EINTPEND external interrupt register
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
index ede0ec7f4473c..7813b26b6ff8c 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
@@ -1614,11 +1614,11 @@ static void check_id(struct work_struct *work)
 	    container_of(work, dwc_otg_pcd_t, check_id_work.work);
 	struct dwc_otg_device *otg_dev = _pcd->otg_dev;
 	struct dwc_otg_platform_data *pldata = otg_dev->pldata;
-	static int last_id = -1;
 	int id = pldata->get_status(USB_STATUS_ID);
 
-	if (last_id != id) {
-		pr_info("[otg id chg] last id %d current id %d\n", last_id, id);
+	if (otg_dev->last_id != id) {
+		pr_info("[otg id chg] last id %d current id %d\n",
+			otg_dev->last_id, id);
 
 		if (pldata->phy_status == USB_PHY_SUSPEND) {
 			pldata->clock_enable(pldata, 1);
@@ -1628,7 +1628,7 @@ static void check_id(struct work_struct *work)
 		/* Force Device or Host by id */
 		id_status_change(otg_dev->core_if, id);
 	}
-	last_id = id;
+	otg_dev->last_id = id;
 	schedule_delayed_work(&_pcd->check_id_work, (HZ));
 }
 

From 0c6fa65432225cd7843cf8adf8838ed2d80086db Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Wed, 26 Apr 2017 17:54:54 +0800
Subject: [PATCH 0737/1852] usb: dwc_otg_310: set transmit threshold length to
 16 DWORDS

According to DWC2 databook V3.10a, 5.3.5.14 Device Threshold
Control Register (DTHRCTL), it recommends that the Transmit
Threshold Length (TxThrLen) is to be the same as the programmed
AHB Burst Length (GAHBCFG.HBstLen), on Rockchip platform the
value is 16.

Change-Id: I6427e3a3fc7b57e85229cdf4b9c5fff878b919b6
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_driver.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index b0a2542c7209f..7bcf93dbe9056 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -201,7 +201,7 @@ static struct dwc_otg_driver_module_params dwc_otg_module_params = {
 			     /* 15 */
 			     },
 	.thr_ctl = -1,
-	.tx_thr_length = -1,
+	.tx_thr_length = 16,
 	.rx_thr_length = -1,
 	.pti_enable = -1,
 	.mpi_enable = -1,

From 7d83feea70e052c70b55408373f296ae42aa6183 Mon Sep 17 00:00:00 2001
From: Frank Wang <frank.wang@rock-chips.com>
Date: Mon, 10 Jul 2017 09:22:35 +0800
Subject: [PATCH 0738/1852] usb: dwc_otg_310: fix usb devices reconnect failed

Sometimes we found the usb device could not connect to the HUBs when
the cable plug in and out constantly, the root cause is "USB RESET"
was missed from these HUBs, and we only try 2 times to reconnect.

This patch as one workaround to increase reconnect times to 6, and
add the delay time (3.5ms-4ms) after DCTL.SftDiscon bit was clear.

Change-Id: I57cfe5dc68e6d3d67c20771423dae29542ed047d
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
index 7813b26b6ff8c..1d3ae00f9d00a 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
@@ -61,6 +61,9 @@
 #include "dwc_otg_attr.h"
 
 #include "usbdev_rk.h"
+
+#define MAX_RECONNECT	6
+
 static struct gadget_wrapper {
 	dwc_otg_pcd_t *pcd;
 
@@ -1532,6 +1535,7 @@ static void dwc_phy_reconnect(struct work_struct *work)
 		dctl.b.sftdiscon = 0;
 		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl,
 				dctl.d32);
+		usleep_range(3500, 4000);
 		printk
 		    ("*******************soft connect!!!*******************\n");
 	}
@@ -1661,11 +1665,11 @@ static void dwc_otg_pcd_check_vbus_work(struct work_struct *work)
 				udelay(3);
 				pldata->clock_enable(pldata, 0);
 			}
-		} else if ((_pcd->conn_en) && (_pcd->conn_status >= 0)
-			   && (_pcd->conn_status < 2)) {
+		} else if ((_pcd->conn_en) && (_pcd->conn_status >= 0) &&
+			   (_pcd->conn_status < MAX_RECONNECT)) {
 			printk("**************soft reconnect**************\n");
 			goto connect;
-		} else if (_pcd->conn_status == 2) {
+		} else if (_pcd->conn_status == MAX_RECONNECT) {
 			_pcd->conn_status++;
 
 			if (pldata->bc_detect_cb && iddig) {

From bf44eb2a2471777eaf8c2b3bc3bdb03dd15ec956 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 20 Nov 2017 11:22:00 +0800
Subject: [PATCH 0739/1852] usb: dwc_otg_310: don't print info when start zl
 transfer

The dwc_otg_ep_start_zl_transfer() can be called from irq
handler in the top half, so don't print additional log to
avoid wasting too much time in interrupt handling.

If someone needs to dump verbose log, just set the debug
level to appropriate value.

Change-Id: If6fb8a22e0c42fb2b629c3a82d8e632254434784
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_cil.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.c b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
index ffe64e7a187f8..76beb5692b899 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
@@ -4463,7 +4463,6 @@ void dwc_otg_ep_start_zl_transfer(dwc_otg_core_if_t *core_if, dwc_ep_t *ep)
 	gintmsk_data_t intr_mask = {.d32 = 0 };
 
 	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s()\n", __func__);
-	DWC_PRINTF("zero length transfer is called\n");
 
 	/* IN endpoint */
 	if (ep->is_in == 1) {

From b1e5dd6cd6e91d7da817bf7e89840cd39e5c3603 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 28 Nov 2017 10:57:35 +0800
Subject: [PATCH 0740/1852] usb: dwc_otg_310: reinit isoc ep frame num when
 dequeue

The frame num of isoc ep is initialized to 0xFFFFFFFF in
ep_enable and start_next_request(), and then in the NAK
interrupt handler, it will check if the ep frame num is
0xFFFFFFFF, then reset the frame num to 0 and start next
request.

But if we dequeue the isoc ep request if it's already
enqueued, if may fail to call complete_ep() -> start_
next_request(), so the isoc ep frame num can't be reinit
to 0xFFFFFFFF, this cause NAK interrupt handler check
the frame num incorrectly, and fail to start next request.

Change-Id: Iab8526f6e3979347bdbe6c49525ec0ba8130d4bc
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
index 39fbbab27eb20..45f763e8031cf 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
@@ -2496,6 +2496,9 @@ int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t *pcd, void *ep_handle,
 		}
 
 		dwc_otg_request_done(ep, req, -DWC_E_RESTART);
+
+		if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC)
+			ep->dwc_ep.frame_num = 0xFFFFFFFF;
 	} else {
 		req = NULL;
 	}

From 9a86eb5a9b504fe96e898c481c571118aea39264 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 28 Nov 2017 11:43:01 +0800
Subject: [PATCH 0741/1852] usb: dwc_otg_310: use wait-till-ready timeout loop
 for ep deactivate

In some error case, it may fail to set the NAK bit
or Disable bit for endpoint when do ep deactivate
operation. We need to use wait-till-ready timeout
loop for ep deactivate instead of while loop.

Change-Id: I0e5ed61b2528f89910333c5eb907677e492fe3a0
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_cil.c | 109 +++++++++++++++-----------
 drivers/usb/dwc_otg_310/dwc_otg_cil.h |   5 ++
 drivers/usb/dwc_otg_310/dwc_otg_pcd.c |  15 ----
 3 files changed, 68 insertions(+), 61 deletions(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.c b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
index 76beb5692b899..b862a5a613089 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.c
@@ -3110,6 +3110,20 @@ void set_pid_isoc(dwc_hc_t *hc)
 	}
 }
 
+int dwc_otg_wait_bit_set(volatile u32 *reg, u32 bit, u32 timeout)
+{
+	int i;
+
+	for (i = 0; i < timeout; i++) {
+		if (DWC_READ_REG32(reg) & bit)
+			return 0;
+
+		dwc_udelay(1);
+	}
+
+	return -ETIMEDOUT;
+}
+
 /**
  * This function does the setup for a data transfer for a host channel and
  * starts the transfer. May be called in either Slave mode or DMA mode. In
@@ -3883,73 +3897,76 @@ void dwc_otg_ep_deactivate(dwc_otg_core_if_t *core_if, dwc_ep_t *ep)
 		depctl_data_t depctl = {.d32 = 0 };
 		if (ep->is_in) {
 			diepint_data_t diepint = {.d32 = 0 };
+			dwc_otg_dev_in_ep_regs_t *in_ep_reg;
+
+			in_ep_reg = core_if->dev_if->in_ep_regs[ep->num];
 
 			depctl.b.snak = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->
-					in_ep_regs[ep->num]->diepctl,
+			DWC_WRITE_REG32(&in_ep_reg->diepctl,
 					depctl.d32);
-			do {
-				dwc_udelay(10);
-				diepint.d32 =
-				    DWC_READ_REG32(&core_if->dev_if->
-						   in_ep_regs[ep->
-							      num]->diepint);
-			} while (!diepint.b.inepnakeff);
+
 			diepint.b.inepnakeff = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->
-					in_ep_regs[ep->num]->diepint,
-					diepint.d32);
+			if (dwc_otg_wait_bit_set(&in_ep_reg->diepint,
+						 diepint.d32, 1000)) {
+				DWC_WARN("%s: timeout diepctl.snak\n",
+					 __func__);
+			} else {
+				DWC_WRITE_REG32(&in_ep_reg->diepint,
+						diepint.d32);
+			}
+
 			depctl.d32 = 0;
 			depctl.b.epdis = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->
-					in_ep_regs[ep->num]->diepctl,
+			DWC_WRITE_REG32(&in_ep_reg->diepctl,
 					depctl.d32);
-			do {
-				dwc_udelay(10);
-				diepint.d32 =
-				    DWC_READ_REG32(&core_if->dev_if->
-						   in_ep_regs[ep->
-							      num]->diepint);
-			} while (!diepint.b.epdisabled);
+
+			diepint.d32 = 0;
 			diepint.b.epdisabled = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->
-					in_ep_regs[ep->num]->diepint,
-					diepint.d32);
+			if (dwc_otg_wait_bit_set(&in_ep_reg->diepint,
+						 diepint.d32, 1000)) {
+				DWC_WARN("%s: timeout diepctl.epdis\n",
+					 __func__);
+			} else {
+				DWC_WRITE_REG32(&in_ep_reg->diepint,
+						diepint.d32);
+			}
 		} else {
 			dctl_data_t dctl = {.d32 = 0 };
 			gintmsk_data_t gintsts = {.d32 = 0 };
 			doepint_data_t doepint = {.d32 = 0 };
+			dwc_otg_dev_out_ep_regs_t *out_ep_reg;
+
+			out_ep_reg = core_if->dev_if->out_ep_regs[ep->num];
+
 			dctl.b.sgoutnak = 1;
-			DWC_MODIFY_REG32(&core_if->dev_if->
-					 dev_global_regs->dctl, 0, dctl.d32);
-			do {
-				dwc_udelay(10);
-				gintsts.d32 =
-				    DWC_READ_REG32(&core_if->core_global_regs->
-						   gintsts);
-			} while (!gintsts.b.goutnakeff);
+			DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl,
+					 0, dctl.d32);
+
 			gintsts.d32 = 0;
 			gintsts.b.goutnakeff = 1;
-			DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,
-					gintsts.d32);
+			if (dwc_otg_wait_bit_set(&core_if->core_global_regs->gintsts,
+						 gintsts.d32, 1000)) {
+				DWC_WARN("%s: timeout dctl.sgoutnak\n",
+					 __func__);
+			} else {
+				DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,
+						gintsts.d32);
+			}
 
 			depctl.d32 = 0;
 			depctl.b.epdis = 1;
 			depctl.b.snak = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]->
-					doepctl, depctl.d32);
-			do {
-				dwc_udelay(10);
-				doepint.d32 =
-				    DWC_READ_REG32(&core_if->
-						   dev_if->out_ep_regs[ep->
-								       num]->
-						   doepint);
-			} while (!doepint.b.epdisabled);
+			DWC_WRITE_REG32(&out_ep_reg->doepctl, depctl.d32);
 
 			doepint.b.epdisabled = 1;
-			DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]->
-					doepint, doepint.d32);
+			if (dwc_otg_wait_bit_set(&out_ep_reg->doepint,
+						 doepint.d32, 1000)) {
+				DWC_WARN("%s: timeout doepctl.epdis\n",
+					 __func__);
+			} else {
+				DWC_WRITE_REG32(&out_ep_reg->doepint,
+						doepint.d32);
+			}
 
 			dctl.d32 = 0;
 			dctl.b.cgoutnak = 1;
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_cil.h b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
index aac00808fbc81..b7cee654ef9e4 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_cil.h
+++ b/drivers/usb/dwc_otg_310/dwc_otg_cil.h
@@ -1053,6 +1053,11 @@ extern void hc_xfer_timeout(void *ptr);
  */
 extern void ep_xfer_timeout(void *ptr);
 
+/*
+ * This function is called when set register and wait for completion.
+ */
+int dwc_otg_wait_bit_set(volatile u32 *reg, u32 bit, u32 timeout);
+
 /*
  * The following functions are functions for works
  * using during handling some interrupts
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
index 45f763e8031cf..ce7263df45565 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
@@ -1706,21 +1706,6 @@ int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t *pcd, void *ep_handle)
 
 }
 
-static int dwc_otg_wait_bit_set(volatile uint32_t *reg,
-				uint32_t bit, uint32_t timeout)
-{
-	int i;
-
-	for (i = 0; i < timeout; i++) {
-		if (DWC_READ_REG32(reg) & bit)
-			return 0;
-
-		dwc_udelay(1);
-	}
-
-	return -ETIMEDOUT;
-}
-
 static void dwc_otg_pcd_ep_stop_transfer(dwc_otg_core_if_t
 					 *core_if, dwc_ep_t *ep)
 {

From a839ef85bc773748a3a6b3cc69958981b7d243c8 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 28 Nov 2017 11:52:51 +0800
Subject: [PATCH 0742/1852] usb: dwc_otg_310: do not stop isoc ep transfer when
 ep dequeue

When dequeue req which already queued on the endpoint,
don't stop the transfer and also don't flush the Tx FIFO
for isoc endpoint, otherwise, it may fail when set NAK
bit and disable ep in dwc_otg_pcd_ep_stop_transfer().

Change-Id: Ib3c1215f9c9507c08cc12c966456209384811b6d
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
index ce7263df45565..292f0cae2623a 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd.c
@@ -2468,16 +2468,18 @@ int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t *pcd, void *ep_handle,
 	}
 
 	if (!DWC_CIRCLEQ_EMPTY_ENTRY(req, queue_entry)) {
-		dwc_otg_pcd_ep_stop_transfer(GET_CORE_IF(pcd),
-					     &ep->dwc_ep);
-		/* Flush the Tx FIFO */
-		if (ep->dwc_ep.is_in) {
-			dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd),
-					      ep->dwc_ep.tx_fifo_num);
-			release_perio_tx_fifo(GET_CORE_IF(pcd),
-					      ep->dwc_ep.tx_fifo_num);
-			release_tx_fifo(GET_CORE_IF(pcd),
-					ep->dwc_ep.tx_fifo_num);
+		if (ep->dwc_ep.type != DWC_OTG_EP_TYPE_ISOC) {
+			dwc_otg_pcd_ep_stop_transfer(GET_CORE_IF(pcd),
+						     &ep->dwc_ep);
+			/* Flush the Tx FIFO */
+			if (ep->dwc_ep.is_in) {
+				dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd),
+						      ep->dwc_ep.tx_fifo_num);
+				release_perio_tx_fifo(GET_CORE_IF(pcd),
+						      ep->dwc_ep.tx_fifo_num);
+				release_tx_fifo(GET_CORE_IF(pcd),
+						ep->dwc_ep.tx_fifo_num);
+			}
 		}
 
 		dwc_otg_request_done(ep, req, -DWC_E_RESTART);

From 1550f49fe8cd2497f5a9baab4670b1529fbd8709 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 28 Nov 2017 18:18:52 +0800
Subject: [PATCH 0743/1852] usb: dwc_otg_310: do not clear nak when prepare for
 setup packet
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

When prepare setup packet, don't clear nak before call
ep0_out_start(), because clear nak will make the usb
core to handle OUT transaction immediately without
NAK response, this may cause OUT transaction fail.

We can reproduce this issue in the following two case:
 - Configure usb device as rndis, connect to Windows PC;
 - Configure usb device as uvc, connect to Windows PC,
   and take still image;

Use the usb analyzer to capture data in case2，we can
easily to find the problem.

Without this patch, the Class request OUT transfer is:
 - SETUP transaction
 - OUT transaction
   - OUT packet
   - DATA1 packet
   - ACK pakcet
 - IN transactions
   - IN packet
   - NAK packet (response NAK forever)

With this patch, the Class request OUT transfer is:
 - SETUP transaction
 - OUT transaction
   - OUT packet
   - DATA1 packet
   - NAK packet
 - PING transactions
 - OUT transaction
   - OUT packet
   - DATA1 packet
   - ACK pakcet
 - IN transaction
   - IN packet
   - DATA1 packet
   - ACK pakcet

Change-Id: I5ea915bc425ffa2f2a06a1a830f6f88725c94b03
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c | 36 ----------------------
 1 file changed, 36 deletions(-)

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
index 760cd96f60e4d..96b0ff9085b41 100644
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_intr.c
@@ -4606,27 +4606,9 @@ do { \
 									ep->dwc_ep.stp_rollover = 0;
 									/* Prepare for more setup packets */
 									if (pcd->ep0state == EP0_IN_STATUS_PHASE || pcd->ep0state == EP0_IN_DATA_PHASE) {
-										depctl_data_t
-										    depctl
-										    = {
-										.d32 = 0};
-										depctl.b.cnak
-										    =
-										    1;
 										ep0_out_start
 										    (core_if,
 										     pcd);
-										/* Core not updating setup packet count
-										 * in case of PET testing - @TODO vahrama
-										 * to check with HW team further */
-										if (!core_if->otg_ver) {
-											DWC_MODIFY_REG32
-											    (&core_if->dev_if->
-											     out_ep_regs
-											     [0]->doepctl,
-											     0,
-											     depctl.d32);
-										}
 									}
 									goto exit_xfercompl;
 								} else {
@@ -4796,27 +4778,9 @@ do { \
 										    (pcd);
 										/* Prepare for setup packets if ep0in was enabled */
 										if (pcd->ep0state == EP0_IN_STATUS_PHASE) {
-											depctl_data_t
-											    depctl
-											    = {
-											.d32 = 0};
-											depctl.b.cnak
-											    =
-											    1;
 											ep0_out_start
 											    (core_if,
 											     pcd);
-											/* Core not updating setup packet count
-											 * in case of PET testing - @TODO vahrama
-											 * to check with HW team further */
-											if (!core_if->otg_ver) {
-												DWC_MODIFY_REG32
-												    (&core_if->dev_if->
-												     out_ep_regs
-												     [0]->doepctl,
-												     0,
-												     depctl.d32);
-											}
 										}
 										goto exit_xfercompl;
 									} else {

From abd9df9e75b15752daad1d3b0c7b0c7e99d55d1f Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 2 Aug 2018 11:29:40 +0800
Subject: [PATCH 0744/1852] usb: gadget: uvc: fix bFrameIndex of streaming
 interface descriptor

The bFrameIndex of video streaming interface descriptor
is initialized to 1 in uvcg_frame_make(), but never be
setted for different frame resolutions, this cause host
to fail to select the correct frame resolution. This patch
increases the bFrameIndex in order.

Change-Id: Ic0609976e09d9e3d6f82595c00e2ac7b356e4f5f
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/gadget/function/uvc_configfs.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/function/uvc_configfs.c b/drivers/usb/gadget/function/uvc_configfs.c
index 01656f1c6d650..26c6ba1501938 100644
--- a/drivers/usb/gadget/function/uvc_configfs.c
+++ b/drivers/usb/gadget/function/uvc_configfs.c
@@ -1871,6 +1871,7 @@ static int __uvcg_iter_strm_cls(struct uvcg_streaming_header *h,
 			if (ret)
 				return ret;
 		}
+		j = 0;
 	}
 
 	return ret;
@@ -2005,12 +2006,15 @@ static int __uvcg_fill_strm(void *priv1, void *priv2, void *priv3, int n,
 			sizeof(*frm->dw_frame_interval);
 		memcpy(*dest, frm->dw_frame_interval, sz);
 		*dest += sz;
-		if (frm->fmt_type == UVCG_UNCOMPRESSED)
+		if (frm->fmt_type == UVCG_UNCOMPRESSED) {
 			h->bLength = UVC_DT_FRAME_UNCOMPRESSED_SIZE(
 				frm->frame.b_frame_interval_type);
-		else if (frm->fmt_type == UVCG_MJPEG)
+			frm->frame.b_frame_index = n + 1;
+		} else if (frm->fmt_type == UVCG_MJPEG) {
 			h->bLength = UVC_DT_FRAME_MJPEG_SIZE(
 				frm->frame.b_frame_interval_type);
+			frm->frame.b_frame_index = n + 1;
+		}
 	}
 	break;
 	}

From 459cf3bb42f3cbd1c224ee24c0d4a0b9acef7e01 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 2 Aug 2018 11:51:51 +0800
Subject: [PATCH 0745/1852] arm64: rockchip_defconfig: enable usb configfs uvc

Change-Id: Iade4b2959450e51cb1f75b1b4b1ccbe9cc3fc2e3
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 09ea5340a1d84..ebc02e10fbb03 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -673,6 +673,7 @@ CONFIG_USB_CONFIGFS_F_ACC=y
 CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
 CONFIG_USB_CONFIGFS_UEVENT=y
 CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_UVC=y
 CONFIG_USB20_HOST=y
 CONFIG_USB20_OTG=y
 CONFIG_MMC=y

From ac529ca7f0d165e1416bc0a708ceeb891ec7c242 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Thu, 2 Aug 2018 11:53:31 +0800
Subject: [PATCH 0746/1852] ARM: rockchip_defconfig: enable usb configfs uvc

Change-Id: Iccb30e546eecc90ceaa5e4e3039c2f29f2542bde
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index 047442a986e84..bfd39a11a2c37 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -589,6 +589,7 @@ CONFIG_USB_CONFIGFS_F_ACC=y
 CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
 CONFIG_USB_CONFIGFS_UEVENT=y
 CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_UVC=y
 CONFIG_USB20_HOST=y
 CONFIG_USB20_OTG=y
 CONFIG_MMC=y

From b31f9c5bef55d5199b3b4899d09ec01bcc4c5f0e Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@free-electrons.com>
Date: Thu, 14 Apr 2016 21:17:26 +0200
Subject: [PATCH 0747/1852] UPSTREAM: leds: pwm: Use pwm_get_args() where
 appropriate

The PWM framework has clarified the concept of reference PWM config (the
platform dependent config retrieved from the DT or the PWM lookup table)
and real PWM state.

Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.

This is part of the rework allowing the PWM framework to support
hardware readout and expose real PWM state even when the PWM has just
been requested (before the user calls pwm_config/enable/disable()).

Change-Id: I8286b16dc8d828ba8a66a17675fe6fbedcba480b
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 1b50673dfa6486a69895bd45bb5eeaaede0a2b93)
---
 drivers/leds/leds-pwm.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c
index 1d07e3e83d29e..27f2c5108e8ac 100644
--- a/drivers/leds/leds-pwm.c
+++ b/drivers/leds/leds-pwm.c
@@ -100,6 +100,7 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv,
 		       struct led_pwm *led, struct device_node *child)
 {
 	struct led_pwm_data *led_data = &priv->leds[priv->num_leds];
+	struct pwm_args pargs;
 	int ret;
 
 	led_data->active_low = led->active_low;
@@ -125,7 +126,15 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv,
 	if (led_data->can_sleep)
 		INIT_WORK(&led_data->work, led_pwm_work);
 
-	led_data->period = pwm_get_period(led_data->pwm);
+	/*
+	 * FIXME: pwm_apply_args() should be removed when switching to the
+	 * atomic PWM API.
+	 */
+	pwm_apply_args(led_data->pwm);
+
+	pwm_get_args(led_data->pwm, &pargs);
+
+	led_data->period = pargs.period;
 	if (!led_data->period && (led->pwm_period_ns > 0))
 		led_data->period = led->pwm_period_ns;
 

From 6524426ffe98ef5231fa82ab1910a8c645c86ad9 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 1 Aug 2018 09:18:52 +0800
Subject: [PATCH 0748/1852] media: rockchip: isp1: fix dq timeout

After enter->capture->video->exit->enter ...... long time test,
the shadow register of mi buffer base address can't update
automatically any more.

In application layer, we will get dq timeout error log.

Add CIF_IRCL_MI_SW_RST in rkisp1_isp_stop can fix this bug.

Change-Id: I386d6b2d2c3882fc76eb9f7283e1bc2309ee3210
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/rkisp1.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 88f20b7fcd970..8d64c82aa7118 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -421,7 +421,8 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
 		 readl(base + CIF_ISP_CTRL),
 		 readl(base + CIF_MIPI_CTRL));
 
-	writel(CIF_IRCL_MIPI_SW_RST | CIF_IRCL_ISP_SW_RST, base + CIF_IRCL);
+	writel(CIF_IRCL_MIPI_SW_RST | CIF_IRCL_ISP_SW_RST | CIF_IRCL_MI_SW_RST,
+	       base + CIF_IRCL);
 	writel(0x0, base + CIF_IRCL);
 
 	return 0;

From 0584202e1d016b22ed3517be323d968dfc7e6025 Mon Sep 17 00:00:00 2001
From: Li Huang <putin.li@rock-chips.com>
Date: Wed, 1 Aug 2018 21:45:27 +0800
Subject: [PATCH 0749/1852] video/rockchip: rga: Remove MMU struct unuse member

it will set alpha_rop_mode to 0, fixup rga blend error.

Change-Id: I6c10df0e4d198ab8da8d352239151ddc3605e860
Signed-off-by: Li Huang <putin.li@rock-chips.com>
---
 drivers/video/rockchip/rga/rga.h | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/video/rockchip/rga/rga.h b/drivers/video/rockchip/rga/rga.h
index 4f6ccedf803d5..8a337b86ad63c 100644
--- a/drivers/video/rockchip/rga/rga.h
+++ b/drivers/video/rockchip/rga/rga.h
@@ -187,16 +187,6 @@ typedef struct MMU
     unsigned char mmu_en;
     unsigned long base_addr;
 	uint32_t mmu_flag;
-
-	unsigned long src0_base_addr;
-	unsigned long src1_base_addr;
-	unsigned long dst_base_addr;
-	unsigned long els_base_addr;
-
-	u8 src0_mmu_flag;
-	u8 src1_mmu_flag;
-	u8 dst_mmu_flag;
-	u8 els_mmu_flag;
 } MMU;
 
 

From 98b8c8090d6430b93fae2478cd5a149bf3b5ef58 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Sat, 12 May 2018 02:49:30 -0700
Subject: [PATCH 0750/1852] xfrm6: avoid potential infinite loop in
 _decode_session6()

[ Upstream commit d9f92772e8ec388d070752ee8f187ef8fa18621f ]

syzbot found a way to trigger an infinitie loop by overflowing
@offset variable that has been forced to use u16 for some very
obscure reason in the past.

We probably want to look at NEXTHDR_FRAGMENT handling which looks
wrong, in a separate patch.

In net-next, we shall try to use skb_header_pointer() instead of
pskb_may_pull().

watchdog: BUG: soft lockup - CPU#1 stuck for 134s! [syz-executor738:4553]
Modules linked in:
irq event stamp: 13885653
hardirqs last  enabled at (13885652): [<ffffffff878009d5>] restore_regs_and_return_to_kernel+0x0/0x2b
hardirqs last disabled at (13885653): [<ffffffff87800905>] interrupt_entry+0xb5/0xf0 arch/x86/entry/entry_64.S:625
softirqs last  enabled at (13614028): [<ffffffff84df0809>] tun_napi_alloc_frags drivers/net/tun.c:1478 [inline]
softirqs last  enabled at (13614028): [<ffffffff84df0809>] tun_get_user+0x1dd9/0x4290 drivers/net/tun.c:1825
softirqs last disabled at (13614032): [<ffffffff84df1b6f>] tun_get_user+0x313f/0x4290 drivers/net/tun.c:1942
CPU: 1 PID: 4553 Comm: syz-executor738 Not tainted 4.17.0-rc3+ #40
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:check_kcov_mode kernel/kcov.c:67 [inline]
RIP: 0010:__sanitizer_cov_trace_pc+0x20/0x50 kernel/kcov.c:101
RSP: 0018:ffff8801d8cfe250 EFLAGS: 00000246 ORIG_RAX: ffffffffffffff13
RAX: ffff8801d88a8080 RBX: ffff8801d7389e40 RCX: 0000000000000006
RDX: 0000000000000000 RSI: ffffffff868da4ad RDI: ffff8801c8a53277
RBP: ffff8801d8cfe250 R08: ffff8801d88a8080 R09: ffff8801d8cfe3e8
R10: ffffed003b19fc87 R11: ffff8801d8cfe43f R12: ffff8801c8a5327f
R13: 0000000000000000 R14: ffff8801c8a4e5fe R15: ffff8801d8cfe3e8
FS:  0000000000d88940(0000) GS:ffff8801daf00000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: ffffffffff600400 CR3: 00000001acab3000 CR4: 00000000001406e0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
 _decode_session6+0xc1d/0x14f0 net/ipv6/xfrm6_policy.c:150
 __xfrm_decode_session+0x71/0x140 net/xfrm/xfrm_policy.c:2368
 xfrm_decode_session_reverse include/net/xfrm.h:1213 [inline]
 icmpv6_route_lookup+0x395/0x6e0 net/ipv6/icmp.c:372
 icmp6_send+0x1982/0x2da0 net/ipv6/icmp.c:551
 icmpv6_send+0x17a/0x300 net/ipv6/ip6_icmp.c:43
 ip6_input_finish+0x14e1/0x1a30 net/ipv6/ip6_input.c:305
 NF_HOOK include/linux/netfilter.h:288 [inline]
 ip6_input+0xe1/0x5e0 net/ipv6/ip6_input.c:327
 dst_input include/net/dst.h:450 [inline]
 ip6_rcv_finish+0x29c/0xa10 net/ipv6/ip6_input.c:71
 NF_HOOK include/linux/netfilter.h:288 [inline]
 ipv6_rcv+0xeb8/0x2040 net/ipv6/ip6_input.c:208
 __netif_receive_skb_core+0x2468/0x3650 net/core/dev.c:4646
 __netif_receive_skb+0x2c/0x1e0 net/core/dev.c:4711
 netif_receive_skb_internal+0x126/0x7b0 net/core/dev.c:4785
 napi_frags_finish net/core/dev.c:5226 [inline]
 napi_gro_frags+0x631/0xc40 net/core/dev.c:5299
 tun_get_user+0x3168/0x4290 drivers/net/tun.c:1951
 tun_chr_write_iter+0xb9/0x154 drivers/net/tun.c:1996
 call_write_iter include/linux/fs.h:1784 [inline]
 do_iter_readv_writev+0x859/0xa50 fs/read_write.c:680
 do_iter_write+0x185/0x5f0 fs/read_write.c:959
 vfs_writev+0x1c7/0x330 fs/read_write.c:1004
 do_writev+0x112/0x2f0 fs/read_write.c:1039
 __do_sys_writev fs/read_write.c:1112 [inline]
 __se_sys_writev fs/read_write.c:1109 [inline]
 __x64_sys_writev+0x75/0xb0 fs/read_write.c:1109
 do_syscall_64+0x1b1/0x800 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x49/0xbe

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Nicolas Dichtel <nicolas.dichtel@6wind.com>
Reported-by: syzbot+0053c8...@syzkaller.appspotmail.com
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/xfrm6_policy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c
index 1a8608cc104cb..4d0c7115f78e0 100644
--- a/net/ipv6/xfrm6_policy.c
+++ b/net/ipv6/xfrm6_policy.c
@@ -124,7 +124,7 @@ _decode_session6(struct sk_buff *skb, struct flowi *fl, int reverse)
 	struct flowi6 *fl6 = &fl->u.ip6;
 	int onlyproto = 0;
 	const struct ipv6hdr *hdr = ipv6_hdr(skb);
-	u16 offset = sizeof(*hdr);
+	u32 offset = sizeof(*hdr);
 	struct ipv6_opt_hdr *exthdr;
 	const unsigned char *nh = skb_network_header(skb);
 	u16 nhoff = IP6CB(skb)->nhoff;

From debb5c90ff761b9e7519f89c1d9abc7568826406 Mon Sep 17 00:00:00 2001
From: Paolo Abeni <pabeni@redhat.com>
Date: Fri, 27 Apr 2018 10:45:31 +0200
Subject: [PATCH 0751/1852] netfilter: ebtables: handle string from userspace
 with care

[ Upstream commit 94c752f99954797da583a84c4907ff19e92550a4 ]

strlcpy() can't be safely used on a user-space provided string,
as it can try to read beyond the buffer's end, if the latter is
not NULL terminated.

Leveraging the above, syzbot has been able to trigger the following
splat:

BUG: KASAN: stack-out-of-bounds in strlcpy include/linux/string.h:300
[inline]
BUG: KASAN: stack-out-of-bounds in compat_mtw_from_user
net/bridge/netfilter/ebtables.c:1957 [inline]
BUG: KASAN: stack-out-of-bounds in ebt_size_mwt
net/bridge/netfilter/ebtables.c:2059 [inline]
BUG: KASAN: stack-out-of-bounds in size_entry_mwt
net/bridge/netfilter/ebtables.c:2155 [inline]
BUG: KASAN: stack-out-of-bounds in compat_copy_entries+0x96c/0x14a0
net/bridge/netfilter/ebtables.c:2194
Write of size 33 at addr ffff8801b0abf888 by task syz-executor0/4504

CPU: 0 PID: 4504 Comm: syz-executor0 Not tainted 4.17.0-rc2+ #40
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS
Google 01/01/2011
Call Trace:
  __dump_stack lib/dump_stack.c:77 [inline]
  dump_stack+0x1b9/0x294 lib/dump_stack.c:113
  print_address_description+0x6c/0x20b mm/kasan/report.c:256
  kasan_report_error mm/kasan/report.c:354 [inline]
  kasan_report.cold.7+0x242/0x2fe mm/kasan/report.c:412
  check_memory_region_inline mm/kasan/kasan.c:260 [inline]
  check_memory_region+0x13e/0x1b0 mm/kasan/kasan.c:267
  memcpy+0x37/0x50 mm/kasan/kasan.c:303
  strlcpy include/linux/string.h:300 [inline]
  compat_mtw_from_user net/bridge/netfilter/ebtables.c:1957 [inline]
  ebt_size_mwt net/bridge/netfilter/ebtables.c:2059 [inline]
  size_entry_mwt net/bridge/netfilter/ebtables.c:2155 [inline]
  compat_copy_entries+0x96c/0x14a0 net/bridge/netfilter/ebtables.c:2194
  compat_do_replace+0x483/0x900 net/bridge/netfilter/ebtables.c:2285
  compat_do_ebt_set_ctl+0x2ac/0x324 net/bridge/netfilter/ebtables.c:2367
  compat_nf_sockopt net/netfilter/nf_sockopt.c:144 [inline]
  compat_nf_setsockopt+0x9b/0x140 net/netfilter/nf_sockopt.c:156
  compat_ip_setsockopt+0xff/0x140 net/ipv4/ip_sockglue.c:1279
  inet_csk_compat_setsockopt+0x97/0x120 net/ipv4/inet_connection_sock.c:1041
  compat_tcp_setsockopt+0x49/0x80 net/ipv4/tcp.c:2901
  compat_sock_common_setsockopt+0xb4/0x150 net/core/sock.c:3050
  __compat_sys_setsockopt+0x1ab/0x7c0 net/compat.c:403
  __do_compat_sys_setsockopt net/compat.c:416 [inline]
  __se_compat_sys_setsockopt net/compat.c:413 [inline]
  __ia32_compat_sys_setsockopt+0xbd/0x150 net/compat.c:413
  do_syscall_32_irqs_on arch/x86/entry/common.c:323 [inline]
  do_fast_syscall_32+0x345/0xf9b arch/x86/entry/common.c:394
  entry_SYSENTER_compat+0x70/0x7f arch/x86/entry/entry_64_compat.S:139
RIP: 0023:0xf7fb3cb9
RSP: 002b:00000000fff0c26c EFLAGS: 00000282 ORIG_RAX: 000000000000016e
RAX: ffffffffffffffda RBX: 0000000000000003 RCX: 0000000000000000
RDX: 0000000000000080 RSI: 0000000020000300 RDI: 00000000000005f4
RBP: 0000000000000000 R08: 0000000000000000 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000
R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000

The buggy address belongs to the page:
page:ffffea0006c2afc0 count:0 mapcount:0 mapping:0000000000000000 index:0x0
flags: 0x2fffc0000000000()
raw: 02fffc0000000000 0000000000000000 0000000000000000 00000000ffffffff
raw: 0000000000000000 ffffea0006c20101 0000000000000000 0000000000000000
page dumped because: kasan: bad access detected

Fix the issue replacing the unsafe function with strscpy() and
taking care of possible errors.

Fixes: 81e675c227ec ("netfilter: ebtables: add CONFIG_COMPAT support")
Reported-and-tested-by: syzbot+4e42a04e0bc33cb6c087@syzkaller.appspotmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/netfilter/ebtables.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c
index 51eab9b5baa1a..9f70c267a7a54 100644
--- a/net/bridge/netfilter/ebtables.c
+++ b/net/bridge/netfilter/ebtables.c
@@ -1912,7 +1912,8 @@ static int compat_mtw_from_user(struct compat_ebt_entry_mwt *mwt,
 	int off, pad = 0;
 	unsigned int size_kern, match_size = mwt->match_size;
 
-	strlcpy(name, mwt->u.name, sizeof(name));
+	if (strscpy(name, mwt->u.name, sizeof(name)) < 0)
+		return -EINVAL;
 
 	if (state->buf_kern_start)
 		dst = state->buf_kern_start + state->buf_kern_offset;

From 2134b59087077a36e19b4046811353f960b45c08 Mon Sep 17 00:00:00 2001
From: Julian Anastasov <ja@ssi.bg>
Date: Sat, 19 May 2018 18:22:35 +0300
Subject: [PATCH 0752/1852] ipvs: fix buffer overflow with sync daemon and
 service

[ Upstream commit 52f96757905bbf0edef47f3ee6c7c784e7f8ff8a ]

syzkaller reports for buffer overflow for interface name
when starting sync daemons [1]

What we do is that we copy user structure into larger stack
buffer but later we search NUL past the stack buffer.
The same happens for sched_name when adding/editing virtual server.

We are restricted by IP_VS_SCHEDNAME_MAXLEN and IP_VS_IFNAME_MAXLEN
being used as size in include/uapi/linux/ip_vs.h, so they
include the space for NUL.

As using strlcpy is wrong for unsafe source, replace it with
strscpy and add checks to return EINVAL if source string is not
NUL-terminated. The incomplete strlcpy fix comes from 2.6.13.

For the netlink interface reduce the len parameter for
IPVS_DAEMON_ATTR_MCAST_IFN and IPVS_SVC_ATTR_SCHED_NAME,
so that we get proper EINVAL.

[1]
kernel BUG at lib/string.c:1052!
invalid opcode: 0000 [#1] SMP KASAN
Dumping ftrace buffer:
    (ftrace buffer empty)
Modules linked in:
CPU: 1 PID: 373 Comm: syz-executor936 Not tainted 4.17.0-rc4+ #45
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS
Google 01/01/2011
RIP: 0010:fortify_panic+0x13/0x20 lib/string.c:1051
RSP: 0018:ffff8801c976f800 EFLAGS: 00010282
RAX: 0000000000000022 RBX: 0000000000000040 RCX: 0000000000000000
RDX: 0000000000000022 RSI: ffffffff8160f6f1 RDI: ffffed00392edef6
RBP: ffff8801c976f800 R08: ffff8801cf4c62c0 R09: ffffed003b5e4fb0
R10: ffffed003b5e4fb0 R11: ffff8801daf27d87 R12: ffff8801c976fa20
R13: ffff8801c976fae4 R14: ffff8801c976fae0 R15: 000000000000048b
FS:  00007fd99f75e700(0000) GS:ffff8801daf00000(0000)
knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00000000200001c0 CR3: 00000001d6843000 CR4: 00000000001406e0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
Call Trace:
  strlen include/linux/string.h:270 [inline]
  strlcpy include/linux/string.h:293 [inline]
  do_ip_vs_set_ctl+0x31c/0x1d00 net/netfilter/ipvs/ip_vs_ctl.c:2388
  nf_sockopt net/netfilter/nf_sockopt.c:106 [inline]
  nf_setsockopt+0x7d/0xd0 net/netfilter/nf_sockopt.c:115
  ip_setsockopt+0xd8/0xf0 net/ipv4/ip_sockglue.c:1253
  udp_setsockopt+0x62/0xa0 net/ipv4/udp.c:2487
  ipv6_setsockopt+0x149/0x170 net/ipv6/ipv6_sockglue.c:917
  tcp_setsockopt+0x93/0xe0 net/ipv4/tcp.c:3057
  sock_common_setsockopt+0x9a/0xe0 net/core/sock.c:3046
  __sys_setsockopt+0x1bd/0x390 net/socket.c:1903
  __do_sys_setsockopt net/socket.c:1914 [inline]
  __se_sys_setsockopt net/socket.c:1911 [inline]
  __x64_sys_setsockopt+0xbe/0x150 net/socket.c:1911
  do_syscall_64+0x1b1/0x800 arch/x86/entry/common.c:287
  entry_SYSCALL_64_after_hwframe+0x49/0xbe
RIP: 0033:0x447369
RSP: 002b:00007fd99f75dda8 EFLAGS: 00000246 ORIG_RAX: 0000000000000036
RAX: ffffffffffffffda RBX: 00000000006e39e4 RCX: 0000000000447369
RDX: 000000000000048b RSI: 0000000000000000 RDI: 0000000000000003
RBP: 0000000000000000 R08: 0000000000000018 R09: 0000000000000000
R10: 00000000200001c0 R11: 0000000000000246 R12: 00000000006e39e0
R13: 75a1ff93f0896195 R14: 6f745f3168746576 R15: 0000000000000001
Code: 08 5b 41 5c 41 5d 41 5e 41 5f 5d c3 0f 0b 48 89 df e8 d2 8f 48 fa eb
de 55 48 89 fe 48 c7 c7 60 65 64 88 48 89 e5 e8 91 dd f3 f9 <0f> 0b 90 90
90 90 90 90 90 90 90 90 90 55 48 89 e5 41 57 41 56
RIP: fortify_panic+0x13/0x20 lib/string.c:1051 RSP: ffff8801c976f800

Reported-and-tested-by: syzbot+aac887f77319868646df@syzkaller.appspotmail.com
Fixes: e4ff67513096 ("ipvs: add sync_maxlen parameter for the sync daemon")
Fixes: 4da62fc70d7c ("[IPVS]: Fix for overflows")
Signed-off-by: Julian Anastasov <ja@ssi.bg>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netfilter/ipvs/ip_vs_ctl.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index c0656510c4dc8..3167ec76903a2 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -2349,8 +2349,10 @@ do_ip_vs_set_ctl(struct sock *sk, int cmd, void __user *user, unsigned int len)
 			struct ipvs_sync_daemon_cfg cfg;
 
 			memset(&cfg, 0, sizeof(cfg));
-			strlcpy(cfg.mcast_ifn, dm->mcast_ifn,
-				sizeof(cfg.mcast_ifn));
+			ret = -EINVAL;
+			if (strscpy(cfg.mcast_ifn, dm->mcast_ifn,
+				    sizeof(cfg.mcast_ifn)) <= 0)
+				goto out_dec;
 			cfg.syncid = dm->syncid;
 			ret = start_sync_thread(ipvs, &cfg, dm->state);
 		} else {
@@ -2388,12 +2390,19 @@ do_ip_vs_set_ctl(struct sock *sk, int cmd, void __user *user, unsigned int len)
 		}
 	}
 
+	if ((cmd == IP_VS_SO_SET_ADD || cmd == IP_VS_SO_SET_EDIT) &&
+	    strnlen(usvc.sched_name, IP_VS_SCHEDNAME_MAXLEN) ==
+	    IP_VS_SCHEDNAME_MAXLEN) {
+		ret = -EINVAL;
+		goto out_unlock;
+	}
+
 	/* Check for valid protocol: TCP or UDP or SCTP, even for fwmark!=0 */
 	if (usvc.protocol != IPPROTO_TCP && usvc.protocol != IPPROTO_UDP &&
 	    usvc.protocol != IPPROTO_SCTP) {
-		pr_err("set_ctl: invalid protocol: %d %pI4:%d %s\n",
+		pr_err("set_ctl: invalid protocol: %d %pI4:%d\n",
 		       usvc.protocol, &usvc.addr.ip,
-		       ntohs(usvc.port), usvc.sched_name);
+		       ntohs(usvc.port));
 		ret = -EFAULT;
 		goto out_unlock;
 	}
@@ -2822,7 +2831,7 @@ static const struct nla_policy ip_vs_cmd_policy[IPVS_CMD_ATTR_MAX + 1] = {
 static const struct nla_policy ip_vs_daemon_policy[IPVS_DAEMON_ATTR_MAX + 1] = {
 	[IPVS_DAEMON_ATTR_STATE]	= { .type = NLA_U32 },
 	[IPVS_DAEMON_ATTR_MCAST_IFN]	= { .type = NLA_NUL_STRING,
-					    .len = IP_VS_IFNAME_MAXLEN },
+					    .len = IP_VS_IFNAME_MAXLEN - 1 },
 	[IPVS_DAEMON_ATTR_SYNC_ID]	= { .type = NLA_U32 },
 	[IPVS_DAEMON_ATTR_SYNC_MAXLEN]	= { .type = NLA_U16 },
 	[IPVS_DAEMON_ATTR_MCAST_GROUP]	= { .type = NLA_U32 },
@@ -2840,7 +2849,7 @@ static const struct nla_policy ip_vs_svc_policy[IPVS_SVC_ATTR_MAX + 1] = {
 	[IPVS_SVC_ATTR_PORT]		= { .type = NLA_U16 },
 	[IPVS_SVC_ATTR_FWMARK]		= { .type = NLA_U32 },
 	[IPVS_SVC_ATTR_SCHED_NAME]	= { .type = NLA_NUL_STRING,
-					    .len = IP_VS_SCHEDNAME_MAXLEN },
+					    .len = IP_VS_SCHEDNAME_MAXLEN - 1 },
 	[IPVS_SVC_ATTR_PE_NAME]		= { .type = NLA_NUL_STRING,
 					    .len = IP_VS_PENAME_MAXLEN },
 	[IPVS_SVC_ATTR_FLAGS]		= { .type = NLA_BINARY,

From 94d353407e9ed4ff552433ab01a2d1493e75bb03 Mon Sep 17 00:00:00 2001
From: Ivan Bornyakov <brnkv.i1@gmail.com>
Date: Fri, 25 May 2018 20:49:52 +0300
Subject: [PATCH 0753/1852] atm: zatm: fix memcmp casting

[ Upstream commit f9c6442a8f0b1dde9e755eb4ff6fa22bcce4eabc ]

memcmp() returns int, but eprom_try_esi() cast it to unsigned char. One
can lose significant bits and get 0 from non-0 value returned by the
memcmp().

Signed-off-by: Ivan Bornyakov <brnkv.i1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/atm/zatm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/atm/zatm.c b/drivers/atm/zatm.c
index 6eab52b92e017..c302f47f6323f 100644
--- a/drivers/atm/zatm.c
+++ b/drivers/atm/zatm.c
@@ -1149,8 +1149,8 @@ static void eprom_get_byte(struct zatm_dev *zatm_dev, unsigned char *byte,
 }
 
 
-static unsigned char eprom_try_esi(struct atm_dev *dev, unsigned short cmd,
-				   int offset, int swap)
+static int eprom_try_esi(struct atm_dev *dev, unsigned short cmd, int offset,
+			 int swap)
 {
 	unsigned char buf[ZEPROM_SIZE];
 	struct zatm_dev *zatm_dev;

From d6ade244be016ed7ce317831cfab9e89c02b60c6 Mon Sep 17 00:00:00 2001
From: Josh Hill <josh@joshuajhill.com>
Date: Sun, 27 May 2018 20:10:41 -0400
Subject: [PATCH 0754/1852] net: qmi_wwan: Add Netgear Aircard 779S
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 2415f3bd059fe050eb98aedf93664d000ceb4e92 ]

Add support for Netgear Aircard 779S

Signed-off-by: Josh Hill <josh@joshuajhill.com>
Acked-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/qmi_wwan.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index d72205f06a1de..3b67140eed73d 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -635,6 +635,7 @@ static const struct usb_device_id products[] = {
 	{QMI_FIXED_INTF(0x05c6, 0x920d, 0)},
 	{QMI_FIXED_INTF(0x05c6, 0x920d, 5)},
 	{QMI_FIXED_INTF(0x0846, 0x68a2, 8)},
+	{QMI_FIXED_INTF(0x0846, 0x68d3, 8)},	/* Netgear Aircard 779S */
 	{QMI_FIXED_INTF(0x12d1, 0x140c, 1)},	/* Huawei E173 */
 	{QMI_FIXED_INTF(0x12d1, 0x14ac, 1)},	/* Huawei E1820 */
 	{QMI_FIXED_INTF(0x1435, 0xd181, 3)},	/* Wistron NeWeb D18Q1 */

From 797f60d3b6a6fbbc6740ca178bfbc23d597ad5f9 Mon Sep 17 00:00:00 2001
From: Finn Thain <fthain@telegraphics.com.au>
Date: Wed, 30 May 2018 13:03:51 +1000
Subject: [PATCH 0755/1852] net/sonic: Use dma_mapping_error()

[ Upstream commit 26de0b76d9ba3200f09c6cb9d9618bda338be5f7 ]

With CONFIG_DMA_API_DEBUG=y, calling sonic_open() produces the
message, "DMA-API: device driver failed to check map error".
Add the missing dma_mapping_error() call.

Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/natsemi/sonic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/natsemi/sonic.c b/drivers/net/ethernet/natsemi/sonic.c
index 1bd419dbda6dc..0798b4adb0394 100644
--- a/drivers/net/ethernet/natsemi/sonic.c
+++ b/drivers/net/ethernet/natsemi/sonic.c
@@ -71,7 +71,7 @@ static int sonic_open(struct net_device *dev)
 	for (i = 0; i < SONIC_NUM_RRS; i++) {
 		dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE),
 		                                  SONIC_RBSIZE, DMA_FROM_DEVICE);
-		if (!laddr) {
+		if (dma_mapping_error(lp->device, laddr)) {
 			while(i > 0) { /* free any that were mapped successfully */
 				i--;
 				dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);

From 86544f0d46db15a44046503fcd078423e98d4e34 Mon Sep 17 00:00:00 2001
From: Sasha Levin <Alexander.Levin@microsoft.com>
Date: Fri, 15 Jun 2018 02:39:22 +0000
Subject: [PATCH 0756/1852] Revert "Btrfs: fix scrub to repair raid6
 corruption"

This reverts commit 95b286daf7ba784191023ad110122703eb2ebabc.

This commit used an incorrect log message.

Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/raid56.c  | 18 ++++--------------
 fs/btrfs/volumes.c |  9 +--------
 2 files changed, 5 insertions(+), 22 deletions(-)

diff --git a/fs/btrfs/raid56.c b/fs/btrfs/raid56.c
index b9fa99577bf7a..1a33d3eb36de1 100644
--- a/fs/btrfs/raid56.c
+++ b/fs/btrfs/raid56.c
@@ -2160,21 +2160,11 @@ int raid56_parity_recover(struct btrfs_root *root, struct bio *bio,
 	}
 
 	/*
-	 * Loop retry:
-	 * for 'mirror == 2', reconstruct from all other stripes.
-	 * for 'mirror_num > 2', select a stripe to fail on every retry.
+	 * reconstruct from the q stripe if they are
+	 * asking for mirror 3
 	 */
-	if (mirror_num > 2) {
-		/*
-		 * 'mirror == 3' is to fail the p stripe and
-		 * reconstruct from the q stripe.  'mirror > 3' is to
-		 * fail a data stripe and reconstruct from p+q stripe.
-		 */
-		rbio->failb = rbio->real_stripes - (mirror_num - 1);
-		ASSERT(rbio->failb > 0);
-		if (rbio->failb <= rbio->faila)
-			rbio->failb--;
-	}
+	if (mirror_num == 3)
+		rbio->failb = rbio->real_stripes - 2;
 
 	ret = lock_stripe_add(rbio);
 
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index b4d63a9842fac..ed75d70b4bc27 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -5056,14 +5056,7 @@ int btrfs_num_copies(struct btrfs_fs_info *fs_info, u64 logical, u64 len)
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID5)
 		ret = 2;
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID6)
-		/*
-		 * There could be two corrupted data stripes, we need
-		 * to loop retry in order to rebuild the correct data.
-		 *
-		 * Fail a stripe at a time on every retry except the
-		 * stripe under reconstruction.
-		 */
-		ret = map->num_stripes;
+		ret = 3;
 	else
 		ret = 1;
 	free_extent_map(em);

From fb4c5db2232985b4514500613b6c3898b384f5c2 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Sun, 10 Dec 2017 17:55:02 -0800
Subject: [PATCH 0757/1852] tcp: do not overshoot window_clamp in
 tcp_rcv_space_adjust()

commit 02db55718d53f9d426cee504c27fb768e9ed4ffe upstream.

While rcvbuf is properly clamped by tcp_rmem[2], rcvwin
is left to a potentially too big value.

It has no serious effect, since :
1) tcp_grow_window() has very strict checks.
2) window_clamp can be mangled by user space to any value anyway.

tcp_init_buffer_space() and companions use tcp_full_space(),
we use tcp_win_from_space() to avoid reloading sk->sk_rcvbuf

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Wei Wang <weiwan@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Benjamin Gilbert <benjamin.gilbert@coreos.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index ca04c59555cfc..a1b9875ad0650 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -613,7 +613,7 @@ void tcp_rcv_space_adjust(struct sock *sk)
 			sk->sk_rcvbuf = rcvbuf;
 
 			/* Make the window clamp follow along.  */
-			tp->window_clamp = rcvwin;
+			tp->window_clamp = tcp_win_from_space(rcvbuf);
 		}
 	}
 	tp->rcvq_space.space = copied;

From 21b7895466b1c818b20fe7b556a98aa57d6fad90 Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.li.liu@oracle.com>
Date: Fri, 15 Jun 2018 02:39:23 +0000
Subject: [PATCH 0758/1852] Btrfs: make raid6 rebuild retry more

[ Upstream commit 8810f7517a3bc4ca2d41d022446d3f5fd6b77c09 ]

There is a scenario that can end up with rebuild process failing to
return good content, i.e.
suppose that all disks can be read without problems and if the content
that was read out doesn't match its checksum, currently for raid6
btrfs at most retries twice,

- the 1st retry is to rebuild with all other stripes, it'll eventually
  be a raid5 xor rebuild,
- if the 1st fails, the 2nd retry will deliberately fail parity p so
  that it will do raid6 style rebuild,

however, the chances are that another non-parity stripe content also
has something corrupted, so that the above retries are not able to
return correct content, and users will think of this as data loss.
More seriouly, if the loss happens on some important internal btree
roots, it could refuse to mount.

This extends btrfs to do more retries and each retry fails only one
stripe.  Since raid6 can tolerate 2 disk failures, if there is one
more failure besides the failure on which we're recovering, this can
always work.

The worst case is to retry as many times as the number of raid6 disks,
but given the fact that such a scenario is really rare in practice,
it's still acceptable.

Signed-off-by: Liu Bo <bo.li.liu@oracle.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/raid56.c  | 18 ++++++++++++++----
 fs/btrfs/volumes.c |  9 ++++++++-
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/fs/btrfs/raid56.c b/fs/btrfs/raid56.c
index 1a33d3eb36de1..b9fa99577bf7a 100644
--- a/fs/btrfs/raid56.c
+++ b/fs/btrfs/raid56.c
@@ -2160,11 +2160,21 @@ int raid56_parity_recover(struct btrfs_root *root, struct bio *bio,
 	}
 
 	/*
-	 * reconstruct from the q stripe if they are
-	 * asking for mirror 3
+	 * Loop retry:
+	 * for 'mirror == 2', reconstruct from all other stripes.
+	 * for 'mirror_num > 2', select a stripe to fail on every retry.
 	 */
-	if (mirror_num == 3)
-		rbio->failb = rbio->real_stripes - 2;
+	if (mirror_num > 2) {
+		/*
+		 * 'mirror == 3' is to fail the p stripe and
+		 * reconstruct from the q stripe.  'mirror > 3' is to
+		 * fail a data stripe and reconstruct from p+q stripe.
+		 */
+		rbio->failb = rbio->real_stripes - (mirror_num - 1);
+		ASSERT(rbio->failb > 0);
+		if (rbio->failb <= rbio->faila)
+			rbio->failb--;
+	}
 
 	ret = lock_stripe_add(rbio);
 
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index ed75d70b4bc27..b4d63a9842fac 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -5056,7 +5056,14 @@ int btrfs_num_copies(struct btrfs_fs_info *fs_info, u64 logical, u64 len)
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID5)
 		ret = 2;
 	else if (map->type & BTRFS_BLOCK_GROUP_RAID6)
-		ret = 3;
+		/*
+		 * There could be two corrupted data stripes, we need
+		 * to loop retry in order to rebuild the correct data.
+		 *
+		 * Fail a stripe at a time on every retry except the
+		 * stripe under reconstruction.
+		 */
+		ret = map->num_stripes;
 	else
 		ret = 1;
 	free_extent_map(em);

From f92f1ce01e23845bc811f5526b7c6df57408dd95 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gl=C3=B6ckner?= <dg@emlix.com>
Date: Mon, 14 May 2018 09:40:05 -0500
Subject: [PATCH 0759/1852] usb: musb: fix remote wakeup racing with suspend
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit ebc3dd688cd988754a304147753b13e58de1b5a1 ]

It has been observed that writing 0xF2 to the power register while it
reads as 0xF4 results in the register having the value 0xF0, i.e. clearing
RESUME and setting SUSPENDM in one go does not work. It might also violate
the USB spec to transition directly from resume to suspend, especially
when not taking T_DRSMDN into account. But this is what happens when a
remote wakeup occurs between SetPortFeature USB_PORT_FEAT_SUSPEND on the
root hub and musb_bus_suspend being called.

This commit returns -EBUSY when musb_bus_suspend is called while remote
wakeup is signalled and thus avoids to reset the RESUME bit. Ignoring
this error when musb_port_suspend is called from musb_hub_control is ok.

Signed-off-by: Daniel Glöckner <dg@emlix.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/musb/musb_host.c    |  5 ++++-
 drivers/usb/musb/musb_host.h    |  7 +++++--
 drivers/usb/musb/musb_virthub.c | 25 +++++++++++++++----------
 3 files changed, 24 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 494823f21c28d..7ec66f1db418d 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2580,8 +2580,11 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
 {
 	struct musb	*musb = hcd_to_musb(hcd);
 	u8		devctl;
+	int		ret;
 
-	musb_port_suspend(musb, true);
+	ret = musb_port_suspend(musb, true);
+	if (ret)
+		return ret;
 
 	if (!is_host_active(musb))
 		return 0;
diff --git a/drivers/usb/musb/musb_host.h b/drivers/usb/musb/musb_host.h
index 7bbf01bf4bb0b..54d02ed032df0 100644
--- a/drivers/usb/musb/musb_host.h
+++ b/drivers/usb/musb/musb_host.h
@@ -92,7 +92,7 @@ extern void musb_host_rx(struct musb *, u8);
 extern void musb_root_disconnect(struct musb *musb);
 extern void musb_host_resume_root_hub(struct musb *musb);
 extern void musb_host_poke_root_hub(struct musb *musb);
-extern void musb_port_suspend(struct musb *musb, bool do_suspend);
+extern int musb_port_suspend(struct musb *musb, bool do_suspend);
 extern void musb_port_reset(struct musb *musb, bool do_reset);
 extern void musb_host_finish_resume(struct work_struct *work);
 #else
@@ -124,7 +124,10 @@ static inline void musb_root_disconnect(struct musb *musb)	{}
 static inline void musb_host_resume_root_hub(struct musb *musb)	{}
 static inline void musb_host_poll_rh_status(struct musb *musb)	{}
 static inline void musb_host_poke_root_hub(struct musb *musb)	{}
-static inline void musb_port_suspend(struct musb *musb, bool do_suspend) {}
+static inline int musb_port_suspend(struct musb *musb, bool do_suspend)
+{
+	return 0;
+}
 static inline void musb_port_reset(struct musb *musb, bool do_reset) {}
 static inline void musb_host_finish_resume(struct work_struct *work) {}
 #endif
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
index 92d5f718659b7..ac5458a69de5a 100644
--- a/drivers/usb/musb/musb_virthub.c
+++ b/drivers/usb/musb/musb_virthub.c
@@ -74,14 +74,14 @@ void musb_host_finish_resume(struct work_struct *work)
 	spin_unlock_irqrestore(&musb->lock, flags);
 }
 
-void musb_port_suspend(struct musb *musb, bool do_suspend)
+int musb_port_suspend(struct musb *musb, bool do_suspend)
 {
 	struct usb_otg	*otg = musb->xceiv->otg;
 	u8		power;
 	void __iomem	*mbase = musb->mregs;
 
 	if (!is_host_active(musb))
-		return;
+		return 0;
 
 	/* NOTE:  this doesn't necessarily put PHY into low power mode,
 	 * turning off its clock; that's a function of PHY integration and
@@ -92,16 +92,20 @@ void musb_port_suspend(struct musb *musb, bool do_suspend)
 	if (do_suspend) {
 		int retries = 10000;
 
-		power &= ~MUSB_POWER_RESUME;
-		power |= MUSB_POWER_SUSPENDM;
-		musb_writeb(mbase, MUSB_POWER, power);
+		if (power & MUSB_POWER_RESUME)
+			return -EBUSY;
 
-		/* Needed for OPT A tests */
-		power = musb_readb(mbase, MUSB_POWER);
-		while (power & MUSB_POWER_SUSPENDM) {
+		if (!(power & MUSB_POWER_SUSPENDM)) {
+			power |= MUSB_POWER_SUSPENDM;
+			musb_writeb(mbase, MUSB_POWER, power);
+
+			/* Needed for OPT A tests */
 			power = musb_readb(mbase, MUSB_POWER);
-			if (retries-- < 1)
-				break;
+			while (power & MUSB_POWER_SUSPENDM) {
+				power = musb_readb(mbase, MUSB_POWER);
+				if (retries-- < 1)
+					break;
+			}
 		}
 
 		dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
@@ -138,6 +142,7 @@ void musb_port_suspend(struct musb *musb, bool do_suspend)
 		schedule_delayed_work(&musb->finish_resume_work,
 				      msecs_to_jiffies(USB_RESUME_TIMEOUT));
 	}
+	return 0;
 }
 
 void musb_port_reset(struct musb *musb, bool do_reset)

From df9636d536c5dbea6fb12d5445618904c5ba1e59 Mon Sep 17 00:00:00 2001
From: Xiangning Yu <yuxiangning@gmail.com>
Date: Thu, 7 Jun 2018 13:39:59 +0800
Subject: [PATCH 0760/1852] bonding: re-evaluate force_primary when the primary
 slave name changes

[ Upstream commit eb55bbf865d9979098c6a7a17cbdb41237ece951 ]

There is a timing issue under active-standy mode, when bond_enslave() is
called, bond->params.primary might not be initialized yet.

Any time the primary slave string changes, bond->force_primary should be
set to true to make sure the primary becomes the active slave.

Signed-off-by: Xiangning Yu <yuxiangning@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/bonding/bond_options.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/bonding/bond_options.c b/drivers/net/bonding/bond_options.c
index 55e93b6b6d215..66560a8fcfa2f 100644
--- a/drivers/net/bonding/bond_options.c
+++ b/drivers/net/bonding/bond_options.c
@@ -1115,6 +1115,7 @@ static int bond_option_primary_set(struct bonding *bond,
 				    slave->dev->name);
 			rcu_assign_pointer(bond->primary_slave, slave);
 			strcpy(bond->params.primary, slave->dev->name);
+			bond->force_primary = true;
 			bond_select_active_slave(bond);
 			goto out;
 		}

From 428da3a531482a665ef1933e820992d742ef03a0 Mon Sep 17 00:00:00 2001
From: Frank van der Linden <fllinden@amazon.com>
Date: Tue, 12 Jun 2018 23:09:37 +0000
Subject: [PATCH 0761/1852] tcp: verify the checksum of the first data segment
 in a new connection

[ Upstream commit 4fd44a98ffe0d048246efef67ed640fdf2098a62 ]

commit 079096f103fa ("tcp/dccp: install syn_recv requests into ehash
table") introduced an optimization for the handling of child sockets
created for a new TCP connection.

But this optimization passes any data associated with the last ACK of the
connection handshake up the stack without verifying its checksum, because it
calls tcp_child_process(), which in turn calls tcp_rcv_state_process()
directly.  These lower-level processing functions do not do any checksum
verification.

Insert a tcp_checksum_complete call in the TCP_NEW_SYN_RECEIVE path to
fix this.

Fixes: 079096f103fa ("tcp/dccp: install syn_recv requests into ehash table")
Signed-off-by: Frank van der Linden <fllinden@amazon.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Tested-by: Balbir Singh <bsingharora@gmail.com>
Reviewed-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_ipv4.c | 4 ++++
 net/ipv6/tcp_ipv6.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c
index 8a5552c46b431..4a3ba7cc27b36 100644
--- a/net/ipv4/tcp_ipv4.c
+++ b/net/ipv4/tcp_ipv4.c
@@ -1630,6 +1630,10 @@ int tcp_v4_rcv(struct sk_buff *skb)
 			reqsk_put(req);
 			goto discard_it;
 		}
+		if (tcp_checksum_complete(skb)) {
+			reqsk_put(req);
+			goto csum_error;
+		}
 		if (unlikely(sk->sk_state != TCP_LISTEN)) {
 			inet_csk_reqsk_queue_drop_and_put(sk, req);
 			goto lookup;
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 7e29a31dd4f06..eddb0fac3e303 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -1417,6 +1417,10 @@ static int tcp_v6_rcv(struct sk_buff *skb)
 			reqsk_put(req);
 			goto discard_it;
 		}
+		if (tcp_checksum_complete(skb)) {
+			reqsk_put(req);
+			goto csum_error;
+		}
 		if (unlikely(sk->sk_state != TCP_LISTEN)) {
 			inet_csk_reqsk_queue_drop_and_put(sk, req);
 			goto lookup;

From bc73e61b0d29860fe2776ea11733eefc27329db7 Mon Sep 17 00:00:00 2001
From: Lukas Czerner <lczerner@redhat.com>
Date: Sun, 13 May 2018 19:28:35 -0400
Subject: [PATCH 0762/1852] ext4: update mtime in ext4_punch_hole even if no
 blocks are released

commit eee597ac931305eff3d3fd1d61d6aae553bc0984 upstream.

Currently in ext4_punch_hole we're going to skip the mtime update if
there are no actual blocks to release. However we've actually modified
the file by zeroing the partial block so the mtime should be updated.

Moreover the sync and datasync handling is skipped as well, which is
also wrong. Fix it.

Signed-off-by: Lukas Czerner <lczerner@redhat.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Reported-by: Joe Habermann <joe.habermann@quantum.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/inode.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 9f8c9a3ab3162..6ea6cb62f85ca 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -3841,28 +3841,28 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
 		EXT4_BLOCK_SIZE_BITS(sb);
 	stop_block = (offset + length) >> EXT4_BLOCK_SIZE_BITS(sb);
 
-	/* If there are no blocks to remove, return now */
-	if (first_block >= stop_block)
-		goto out_stop;
+	/* If there are blocks to remove, do it */
+	if (stop_block > first_block) {
 
-	down_write(&EXT4_I(inode)->i_data_sem);
-	ext4_discard_preallocations(inode);
+		down_write(&EXT4_I(inode)->i_data_sem);
+		ext4_discard_preallocations(inode);
 
-	ret = ext4_es_remove_extent(inode, first_block,
-				    stop_block - first_block);
-	if (ret) {
-		up_write(&EXT4_I(inode)->i_data_sem);
-		goto out_stop;
-	}
+		ret = ext4_es_remove_extent(inode, first_block,
+					    stop_block - first_block);
+		if (ret) {
+			up_write(&EXT4_I(inode)->i_data_sem);
+			goto out_stop;
+		}
 
-	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
-		ret = ext4_ext_remove_space(inode, first_block,
-					    stop_block - 1);
-	else
-		ret = ext4_ind_remove_space(handle, inode, first_block,
-					    stop_block);
+		if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
+			ret = ext4_ext_remove_space(inode, first_block,
+						    stop_block - 1);
+		else
+			ret = ext4_ind_remove_space(handle, inode, first_block,
+						    stop_block);
 
-	up_write(&EXT4_I(inode)->i_data_sem);
+		up_write(&EXT4_I(inode)->i_data_sem);
+	}
 	if (IS_SYNC(inode))
 		ext4_handle_sync(handle);
 

From e78a055edc2a4e0284d4067d5c17195581af5856 Mon Sep 17 00:00:00 2001
From: Jan Kara <jack@suse.cz>
Date: Fri, 25 May 2018 12:51:25 -0400
Subject: [PATCH 0763/1852] ext4: fix fencepost error in check for inode count
 overflow during resize

commit 4f2f76f751433908364ccff82f437a57d0e6e9b7 upstream.

ext4_resize_fs() has an off-by-one bug when checking whether growing of
a filesystem will not overflow inode count. As a result it allows a
filesystem with 8192 inodes per group to grow to 64TB which overflows
inode count to 0 and makes filesystem unusable. Fix it.

Cc: stable@vger.kernel.org
Fixes: 3f8a6411fbada1fa482276591e037f3b1adcf55b
Reported-by: Jaco Kroon <jaco@uls.co.za>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Reviewed-by: Andreas Dilger <adilger@dilger.ca>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/resize.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c
index 74516efd874cf..d2421fd388335 100644
--- a/fs/ext4/resize.c
+++ b/fs/ext4/resize.c
@@ -1903,7 +1903,7 @@ int ext4_resize_fs(struct super_block *sb, ext4_fsblk_t n_blocks_count)
 		return 0;
 
 	n_group = ext4_get_group_number(sb, n_blocks_count - 1);
-	if (n_group > (0xFFFFFFFFUL / EXT4_INODES_PER_GROUP(sb))) {
+	if (n_group >= (0xFFFFFFFFUL / EXT4_INODES_PER_GROUP(sb))) {
 		ext4_warning(sb, "resize would cause inodes_count overflow");
 		return -EINVAL;
 	}

From 6fcb9fff24382335b677b9e0875abff4159a0851 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Mon, 7 May 2018 19:10:31 +0900
Subject: [PATCH 0764/1852] driver core: Don't ignore
 class_dir_create_and_add() failure.

commit 84d0c27d6233a9ba0578b20f5a09701eb66cee42 upstream.

syzbot is hitting WARN() at kernfs_add_one() [1].
This is because kernfs_create_link() is confused by previous device_add()
call which continued without setting dev->kobj.parent field when
get_device_parent() failed by memory allocation fault injection.
Fix this by propagating the error from class_dir_create_and_add() to
the calllers of get_device_parent().

[1] https://syzkaller.appspot.com/bug?id=fae0fb607989ea744526d1c082a5b8de6529116f

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+df47f81c226b31d89fb1@syzkaller.appspotmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/base/core.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/base/core.c b/drivers/base/core.c
index afe0457927966..049ccc070ce56 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -759,7 +759,7 @@ class_dir_create_and_add(struct class *class, struct kobject *parent_kobj)
 
 	dir = kzalloc(sizeof(*dir), GFP_KERNEL);
 	if (!dir)
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 
 	dir->class = class;
 	kobject_init(&dir->kobj, &class_dir_ktype);
@@ -769,7 +769,7 @@ class_dir_create_and_add(struct class *class, struct kobject *parent_kobj)
 	retval = kobject_add(&dir->kobj, parent_kobj, "%s", class->name);
 	if (retval < 0) {
 		kobject_put(&dir->kobj);
-		return NULL;
+		return ERR_PTR(retval);
 	}
 	return &dir->kobj;
 }
@@ -1076,6 +1076,10 @@ int device_add(struct device *dev)
 
 	parent = get_device(dev->parent);
 	kobj = get_device_parent(dev, parent);
+	if (IS_ERR(kobj)) {
+		error = PTR_ERR(kobj);
+		goto parent_error;
+	}
 	if (kobj)
 		dev->kobj.parent = kobj;
 
@@ -1174,6 +1178,7 @@ int device_add(struct device *dev)
 	kobject_del(&dev->kobj);
  Error:
 	cleanup_glue_dir(dev, glue_dir);
+parent_error:
 	put_device(parent);
 name_error:
 	kfree(dev->p);
@@ -1990,6 +1995,11 @@ int device_move(struct device *dev, struct device *new_parent,
 	device_pm_lock();
 	new_parent = get_device(new_parent);
 	new_parent_kobj = get_device_parent(dev, new_parent);
+	if (IS_ERR(new_parent_kobj)) {
+		error = PTR_ERR(new_parent_kobj);
+		put_device(new_parent);
+		goto out;
+	}
 
 	pr_debug("device: '%s': %s: moving to '%s'\n", dev_name(dev),
 		 __func__, new_parent ? dev_name(new_parent) : "<NULL>");

From 495e9a722cea87c1cfc7a4fa14a3d4f64ab7cf6e Mon Sep 17 00:00:00 2001
From: Qu Wenruo <wqu@suse.com>
Date: Tue, 5 Jun 2018 12:36:56 +0800
Subject: [PATCH 0765/1852] btrfs: scrub: Don't use inode pages for device
 replace

commit ac0b4145d662a3b9e34085dea460fb06ede9b69b upstream.

[BUG]
Btrfs can create compressed extent without checksum (even though it
shouldn't), and if we then try to replace device containing such extent,
the result device will contain all the uncompressed data instead of the
compressed one.

Test case already submitted to fstests:
https://patchwork.kernel.org/patch/10442353/

[CAUSE]
When handling compressed extent without checksum, device replace will
goe into copy_nocow_pages() function.

In that function, btrfs will get all inodes referring to this data
extents and then use find_or_create_page() to get pages direct from that
inode.

The problem here is, pages directly from inode are always uncompressed.
And for compressed data extent, they mismatch with on-disk data.
Thus this leads to corrupted compressed data extent written to replace
device.

[FIX]
In this attempt, we could just remove the "optimization" branch, and let
unified scrub_pages() to handle it.

Although scrub_pages() won't bother reusing page cache, it will be a
little slower, but it does the correct csum checking and won't cause
such data corruption caused by "optimization".

Note about the fix: this is the minimal fix that can be backported to
older stable trees without conflicts. The whole callchain from
copy_nocow_pages() can be deleted, and will be in followup patches.

Fixes: ff023aac3119 ("Btrfs: add code to scrub to copy read data to another disk")
CC: stable@vger.kernel.org # 4.4+
Reported-by: James Harvey <jamespharvey20@gmail.com>
Reviewed-by: James Harvey <jamespharvey20@gmail.com>
Signed-off-by: Qu Wenruo <wqu@suse.com>
[ remove code removal, add note why ]
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/scrub.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/btrfs/scrub.c b/fs/btrfs/scrub.c
index b091d94ceef68..6dca9f937bf62 100644
--- a/fs/btrfs/scrub.c
+++ b/fs/btrfs/scrub.c
@@ -2513,7 +2513,7 @@ static int scrub_extent(struct scrub_ctx *sctx, u64 logical, u64 len,
 			have_csum = scrub_find_csum(sctx, logical, csum);
 			if (have_csum == 0)
 				++sctx->stat.no_csum;
-			if (sctx->is_dev_replace && !have_csum) {
+			if (0 && sctx->is_dev_replace && !have_csum) {
 				ret = copy_nocow_pages(sctx, logical, l,
 						       mirror_num,
 						      physical_for_dev_replace);

From 2348c08f5037263301f7f7b977d93bbe7d22b264 Mon Sep 17 00:00:00 2001
From: Bo Chen <chenbo@pdx.edu>
Date: Thu, 31 May 2018 15:35:18 -0700
Subject: [PATCH 0766/1852] ALSA: hda - Handle kzalloc() failure in
 snd_hda_attach_pcm_stream()

commit a3aa60d511746bd6c0d0366d4eb90a7998bcde8b upstream.

When 'kzalloc()' fails in 'snd_hda_attach_pcm_stream()', a new pcm instance is
created without setting its operators via 'snd_pcm_set_ops()'. Following
operations on the new pcm instance can trigger kernel null pointer dereferences
and cause kernel oops.

This bug was found with my work on building a gray-box fault-injection tool for
linux-kernel-module binaries. A kernel null pointer dereference was confirmed
from line 'substream->ops->open()' in function 'snd_pcm_open_substream()' in
file 'sound/core/pcm_native.c'.

This patch fixes the bug by calling 'snd_device_free()' in the error handling
path of 'kzalloc()', which removes the new pcm instance from the snd card before
returns with an error code.

Signed-off-by: Bo Chen <chenbo@pdx.edu>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/hda_controller.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index 9c6e10fb479f4..273364c39171c 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -547,8 +547,10 @@ int snd_hda_attach_pcm_stream(struct hda_bus *_bus, struct hda_codec *codec,
 		return err;
 	strlcpy(pcm->name, cpcm->name, sizeof(pcm->name));
 	apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
-	if (apcm == NULL)
+	if (apcm == NULL) {
+		snd_device_free(chip->card, pcm);
 		return -ENOMEM;
+	}
 	apcm->chip = chip;
 	apcm->pcm = pcm;
 	apcm->codec = codec;

From d98929d7124230cd2840914491730a1392e4cec3 Mon Sep 17 00:00:00 2001
From: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Date: Tue, 12 Jun 2018 07:10:59 +0200
Subject: [PATCH 0767/1852] ALSA: hda: add dock and led support for HP
 EliteBook 830 G5

commit 2861751f67b91e1d24e68010ced96614fb3140f4 upstream.

This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP EliteBook 830 G5

Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_conexant.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 9fae1d2483185..88118458b48e3 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -851,6 +851,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = {
 	SND_PCI_QUIRK(0x103c, 0x8079, "HP EliteBook 840 G3", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x807C, "HP EliteBook 820 G3", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x80FD, "HP ProBook 640 G2", CXT_FIXUP_HP_DOCK),
+	SND_PCI_QUIRK(0x103c, 0x83b3, "HP EliteBook 830 G5", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x8174, "HP Spectre x360", CXT_FIXUP_HP_SPECTRE),
 	SND_PCI_QUIRK(0x103c, 0x8115, "HP Z1 Gen3", CXT_FIXUP_HP_GATE_MIC),
 	SND_PCI_QUIRK(0x1043, 0x138d, "Asus", CXT_FIXUP_HEADPHONE_MIC_PIN),

From 0e4987dfe6b7a2b37aeaa5b38162d808d6a739e9 Mon Sep 17 00:00:00 2001
From: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Date: Tue, 12 Jun 2018 07:11:11 +0200
Subject: [PATCH 0768/1852] ALSA: hda: add dock and led support for HP ProBook
 640 G4

commit 7eef32c1ef895a3a96463f9cbd04203007cd5555 upstream.

This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP ProBook 640 G4

Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_conexant.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 88118458b48e3..cb19af145f46e 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -852,6 +852,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = {
 	SND_PCI_QUIRK(0x103c, 0x807C, "HP EliteBook 820 G3", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x80FD, "HP ProBook 640 G2", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x83b3, "HP EliteBook 830 G5", CXT_FIXUP_HP_DOCK),
+	SND_PCI_QUIRK(0x103c, 0x83d3, "HP ProBook 640 G4", CXT_FIXUP_HP_DOCK),
 	SND_PCI_QUIRK(0x103c, 0x8174, "HP Spectre x360", CXT_FIXUP_HP_SPECTRE),
 	SND_PCI_QUIRK(0x103c, 0x8115, "HP Z1 Gen3", CXT_FIXUP_HP_GATE_MIC),
 	SND_PCI_QUIRK(0x1043, 0x138d, "Asus", CXT_FIXUP_HEADPHONE_MIC_PIN),

From 4f78f93c8a6ab5b5d0b1c5b7670f5dab59db460e Mon Sep 17 00:00:00 2001
From: Tao Wang <kevin.wangtao@hisilicon.com>
Date: Sat, 26 May 2018 15:16:48 +0800
Subject: [PATCH 0769/1852] cpufreq: Fix new policy initialization during
 limits updates via sysfs

commit c7d1f119c48f64bebf0fa1e326af577c6152fe30 upstream.

If the policy limits are updated via cpufreq_update_policy() and
subsequently via sysfs, the limits stored in user_policy may be
set incorrectly.

For example, if both min and max are set via sysfs to the maximum
available frequency, user_policy.min and user_policy.max will also
be the maximum.  If a policy notifier triggered by
cpufreq_update_policy() lowers both the min and the max at this
point, that change is not reflected by the user_policy limits, so
if the max is updated again via sysfs to the same lower value,
then user_policy.max will be lower than user_policy.min which
shouldn't happen.  In particular, if one of the policy CPUs is
then taken offline and back online, cpufreq_set_policy() will
fail for it due to a failing limits check.

To prevent that from happening, initialize the min and max fields
of the new_policy object to the ones stored in user_policy that
were previously set via sysfs.

Signed-off-by: Kevin Wangtao <kevin.wangtao@hisilicon.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[ rjw: Subject & changelog ]
Cc: All applicable <stable@vger.kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpufreq/cpufreq.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 2a6593dde250c..875f22f177459 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -699,6 +699,8 @@ static ssize_t store_##file_name					\
 	struct cpufreq_policy new_policy;				\
 									\
 	memcpy(&new_policy, policy, sizeof(*policy));			\
+	new_policy.min = policy->user_policy.min;			\
+	new_policy.max = policy->user_policy.max;			\
 									\
 	ret = sscanf(buf, "%u", &new_policy.object);			\
 	if (ret != 1)							\

From 26c248a07cee688ed80c176f98c4886fe4448163 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Wed, 6 Sep 2017 09:56:29 +0100
Subject: [PATCH 0770/1852] libata: zpodd: make arrays cdb static, reduces
 object code size

commit 795ef788145ed2fa023efdf11e8d5d7bedc21462 upstream.

Don't populate the arrays cdb on the stack, instead make them static.
Makes the object code smaller by 230 bytes:

Before:
   text	   data	    bss	    dec	    hex	filename
   3797	    240	      0	   4037	    fc5	drivers/ata/libata-zpodd.o

After:
   text	   data	    bss	    dec	    hex	filename
   3407	    400	      0	   3807	    edf	drivers/ata/libata-zpodd.o

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-zpodd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/ata/libata-zpodd.c b/drivers/ata/libata-zpodd.c
index f3a65a3140d3c..db64f81a4840c 100644
--- a/drivers/ata/libata-zpodd.c
+++ b/drivers/ata/libata-zpodd.c
@@ -34,7 +34,7 @@ struct zpodd {
 static int eject_tray(struct ata_device *dev)
 {
 	struct ata_taskfile tf;
-	const char cdb[] = {  GPCMD_START_STOP_UNIT,
+	static const char cdb[] = {  GPCMD_START_STOP_UNIT,
 		0, 0, 0,
 		0x02,     /* LoEj */
 		0, 0, 0, 0, 0, 0, 0,
@@ -55,7 +55,7 @@ static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev)
 	unsigned int ret;
 	struct rm_feature_desc *desc = (void *)(buf + 8);
 	struct ata_taskfile tf;
-	char cdb[] = {  GPCMD_GET_CONFIGURATION,
+	static const char cdb[] = {  GPCMD_GET_CONFIGURATION,
 			2,      /* only 1 feature descriptor requested */
 			0, 3,   /* 3, removable medium feature */
 			0, 0, 0,/* reserved */

From cb8f48767b9d32d2a2340ede53bb7c72fef1b400 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 29 May 2018 12:13:24 +0300
Subject: [PATCH 0771/1852] libata: zpodd: small read overflow in eject_tray()

commit 18c9a99bce2a57dfd7e881658703b5d7469cc7b9 upstream.

We read from the cdb[] buffer in ata_exec_internal_sg().  It has to be
ATAPI_CDB_LEN (16) bytes long, but this buffer is only 12 bytes.

Fixes: 213342053db5 ("libata: handle power transition of ODD")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-zpodd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ata/libata-zpodd.c b/drivers/ata/libata-zpodd.c
index db64f81a4840c..0ad96c647541a 100644
--- a/drivers/ata/libata-zpodd.c
+++ b/drivers/ata/libata-zpodd.c
@@ -34,7 +34,7 @@ struct zpodd {
 static int eject_tray(struct ata_device *dev)
 {
 	struct ata_taskfile tf;
-	static const char cdb[] = {  GPCMD_START_STOP_UNIT,
+	static const char cdb[ATAPI_CDB_LEN] = {  GPCMD_START_STOP_UNIT,
 		0, 0, 0,
 		0x02,     /* LoEj */
 		0, 0, 0, 0, 0, 0, 0,

From 8d5de71fa4d42737e39a8498f4b36909b329e0ce Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Thu, 31 May 2018 13:21:07 +0200
Subject: [PATCH 0772/1852] libata: Drop SanDisk SD7UB3Q*G1001 NOLPM quirk

commit 2cfce3a86b64b53f0a70e92a6a659c720c319b45 upstream.

Commit 184add2ca23c ("libata: Apply NOLPM quirk for SanDisk
SD7UB3Q*G1001 SSDs") disabled LPM for SanDisk SD7UB3Q*G1001 SSDs.

This has lead to several reports of users of that SSD where LPM
was working fine and who know have a significantly increased idle
power consumption on their laptops.

Likely there is another problem on the T450s from the original
reporter which gets exposed by the uncore reaching deeper sleep
states (higher PC-states) due to LPM being enabled. The problem as
reported, a hardfreeze about once a day, already did not sound like
it would be caused by LPM and the reports of the SSD working fine
confirm this. The original reporter is ok with dropping the quirk.

A X250 user has reported the same hard freeze problem and for him
the problem went away after unrelated updates, I suspect some GPU
driver stack changes fixed things.

TL;DR: The original reporters problem were triggered by LPM but not
an LPM issue, so drop the quirk for the SSD in question.

BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1583207
Cc: stable@vger.kernel.org
Cc: Richard W.M. Jones <rjones@redhat.com>
Cc: Lorenzo Dalrio <lorenzo.dalrio@gmail.com>
Reported-by: Lorenzo Dalrio <lorenzo.dalrio@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: "Richard W.M. Jones" <rjones@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-core.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index f9b86a1d922d7..9afd06ee5b301 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4247,9 +4247,6 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
 						ATA_HORKAGE_ZERO_AFTER_TRIM |
 						ATA_HORKAGE_NOLPM, },
 
-	/* Sandisk devices which are known to not handle LPM well */
-	{ "SanDisk SD7UB3Q*G1001",	NULL,	ATA_HORKAGE_NOLPM, },
-
 	/* devices that don't properly handle queued TRIM commands */
 	{ "Micron_M500IT_*",		"MU01",	ATA_HORKAGE_NO_NCQ_TRIM |
 						ATA_HORKAGE_ZERO_AFTER_TRIM, },

From f4e25eefcc3f9ca02e49422cda319370689c7b3f Mon Sep 17 00:00:00 2001
From: Stefan Potyra <Stefan.Potyra@elektrobit.com>
Date: Wed, 2 May 2018 10:55:31 +0200
Subject: [PATCH 0773/1852] w1: mxc_w1: Enable clock before calling
 clk_get_rate() on it

commit 955bc61328dc0a297fb3baccd84e9d3aee501ed8 upstream.

According to the API, you may only call clk_get_rate() after actually
enabling it.

Found by Linux Driver Verification project (linuxtesting.org).

Fixes: a5fd9139f74c ("w1: add 1-wire master driver for i.MX27 / i.MX31")
Signed-off-by: Stefan Potyra <Stefan.Potyra@elektrobit.com>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/w1/masters/mxc_w1.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index a4621757a47f5..dacb5919970c5 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -113,6 +113,10 @@ static int mxc_w1_probe(struct platform_device *pdev)
 	if (IS_ERR(mdev->clk))
 		return PTR_ERR(mdev->clk);
 
+	err = clk_prepare_enable(mdev->clk);
+	if (err)
+		return err;
+
 	clkrate = clk_get_rate(mdev->clk);
 	if (clkrate < 10000000)
 		dev_warn(&pdev->dev,
@@ -126,12 +130,10 @@ static int mxc_w1_probe(struct platform_device *pdev)
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	mdev->regs = devm_ioremap_resource(&pdev->dev, res);
-	if (IS_ERR(mdev->regs))
-		return PTR_ERR(mdev->regs);
-
-	err = clk_prepare_enable(mdev->clk);
-	if (err)
-		return err;
+	if (IS_ERR(mdev->regs)) {
+		err = PTR_ERR(mdev->regs);
+		goto out_disable_clk;
+	}
 
 	/* Software reset 1-Wire module */
 	writeb(MXC_W1_RESET_RST, mdev->regs + MXC_W1_RESET);
@@ -147,8 +149,12 @@ static int mxc_w1_probe(struct platform_device *pdev)
 
 	err = w1_add_master_device(&mdev->bus_master);
 	if (err)
-		clk_disable_unprepare(mdev->clk);
+		goto out_disable_clk;
 
+	return 0;
+
+out_disable_clk:
+	clk_disable_unprepare(mdev->clk);
 	return err;
 }
 

From 2bcc4de4599fdcc8e0d809bca8f0a3ea7391eead Mon Sep 17 00:00:00 2001
From: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Date: Thu, 7 Jun 2018 17:11:01 -0700
Subject: [PATCH 0774/1852] fs/binfmt_misc.c: do not allow offset overflow

commit 5cc41e099504b77014358b58567c5ea6293dd220 upstream.

WHen registering a new binfmt_misc handler, it is possible to overflow
the offset to get a negative value, which might crash the system, or
possibly leak kernel data.

Here is a crash log when 2500000000 was used as an offset:

  BUG: unable to handle kernel paging request at ffff989cfd6edca0
  IP: load_misc_binary+0x22b/0x470 [binfmt_misc]
  PGD 1ef3e067 P4D 1ef3e067 PUD 0
  Oops: 0000 [#1] SMP NOPTI
  Modules linked in: binfmt_misc kvm_intel ppdev kvm irqbypass joydev input_leds serio_raw mac_hid parport_pc qemu_fw_cfg parpy
  CPU: 0 PID: 2499 Comm: bash Not tainted 4.15.0-22-generic #24-Ubuntu
  Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.11.1-1 04/01/2014
  RIP: 0010:load_misc_binary+0x22b/0x470 [binfmt_misc]
  Call Trace:
    search_binary_handler+0x97/0x1d0
    do_execveat_common.isra.34+0x667/0x810
    SyS_execve+0x31/0x40
    do_syscall_64+0x73/0x130
    entry_SYSCALL_64_after_hwframe+0x3d/0xa2

Use kstrtoint instead of simple_strtoul.  It will work as the code
already set the delimiter byte to '\0' and we only do it when the field
is not empty.

Tested with offsets -1, 2500000000, UINT_MAX and INT_MAX.  Also tested
with examples documented at Documentation/admin-guide/binfmt-misc.rst
and other registrations from packages on Ubuntu.

Link: http://lkml.kernel.org/r/20180529135648.14254-1-cascardo@canonical.com
Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/binfmt_misc.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/fs/binfmt_misc.c b/fs/binfmt_misc.c
index 78f005f378476..dd784bcf7c968 100644
--- a/fs/binfmt_misc.c
+++ b/fs/binfmt_misc.c
@@ -369,8 +369,13 @@ static Node *create_entry(const char __user *buffer, size_t count)
 		s = strchr(p, del);
 		if (!s)
 			goto einval;
-		*s++ = '\0';
-		e->offset = simple_strtoul(p, &p, 10);
+		*s = '\0';
+		if (p != s) {
+			int r = kstrtoint(p, 10, &e->offset);
+			if (r != 0 || e->offset < 0)
+				goto einval;
+		}
+		p = s;
 		if (*p++)
 			goto einval;
 		pr_debug("register: offset: %#x\n", e->offset);
@@ -410,7 +415,8 @@ static Node *create_entry(const char __user *buffer, size_t count)
 		if (e->mask &&
 		    string_unescape_inplace(e->mask, UNESCAPE_HEX) != e->size)
 			goto einval;
-		if (e->size + e->offset > BINPRM_BUF_SIZE)
+		if (e->size > BINPRM_BUF_SIZE ||
+		    BINPRM_BUF_SIZE - e->size < e->offset)
 			goto einval;
 		pr_debug("register: magic/mask length: %i\n", e->size);
 		if (USE_DEBUG) {

From 7a44caadc543b97ba8ab8ad989427464bd869381 Mon Sep 17 00:00:00 2001
From: Dan Williams <dan.j.williams@intel.com>
Date: Thu, 7 Jun 2018 09:13:48 -0700
Subject: [PATCH 0775/1852] x86/spectre_v1: Disable compiler optimizations over
 array_index_mask_nospec()

commit eab6870fee877258122a042bfd99ee7908c40280 upstream.

Mark Rutland noticed that GCC optimization passes have the potential to elide
necessary invocations of the array_index_mask_nospec() instruction sequence,
so mark the asm() volatile.

Mark explains:

"The volatile will inhibit *some* cases where the compiler could lift the
 array_index_nospec() call out of a branch, e.g. where there are multiple
 invocations of array_index_nospec() with the same arguments:

        if (idx < foo) {
                idx1 = array_idx_nospec(idx, foo)
                do_something(idx1);
        }

        < some other code >

        if (idx < foo) {
                idx2 = array_idx_nospec(idx, foo);
                do_something_else(idx2);
        }

 ... since the compiler can determine that the two invocations yield the same
 result, and reuse the first result (likely the same register as idx was in
 originally) for the second branch, effectively re-writing the above as:

        if (idx < foo) {
                idx = array_idx_nospec(idx, foo);
                do_something(idx);
        }

        < some other code >

        if (idx < foo) {
                do_something_else(idx);
        }

 ... if we don't take the first branch, then speculatively take the second, we
 lose the nospec protection.

 There's more info on volatile asm in the GCC docs:

   https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Volatile
 "

Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: <stable@vger.kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Fixes: babdde2698d4 ("x86: Implement array_index_mask_nospec")
Link: https://lkml.kernel.org/lkml/152838798950.14521.4893346294059739135.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/barrier.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index 814ef83c67203..e3a6f66d288c5 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -38,7 +38,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
 {
 	unsigned long mask;
 
-	asm ("cmp %1,%2; sbb %0,%0;"
+	asm volatile ("cmp %1,%2; sbb %0,%0;"
 			:"=r" (mask)
 			:"r"(size),"r" (index)
 			:"cc");

From 9e4fd9627031ceb4b449bc3155ee4b6519f09b0e Mon Sep 17 00:00:00 2001
From: Michael Schmitz <schmitzmic@gmail.com>
Date: Mon, 14 May 2018 23:10:53 +1200
Subject: [PATCH 0776/1852] m68k/mm: Adjust VM area to be unmapped by gap size
 for __iounmap()

commit 3f90f9ef2dda316d64e420d5d51ba369587ccc55 upstream.

If 020/030 support is enabled, get_io_area() leaves an IO_SIZE gap
between mappings which is added to the vm_struct representing the
mapping.  __ioremap() uses the actual requested size (after alignment),
while __iounmap() is passed the size from the vm_struct.

On 020/030, early termination descriptors are used to set up mappings of
extent 'size', which are validated on unmapping. The unmapped gap of
size IO_SIZE defeats the sanity check of the pmd tables, causing
__iounmap() to loop forever on 030.

On 040/060, unmapping of page table entries does not check for a valid
mapping, so the umapping loop always completes there.

Adjust size to be unmapped by the gap that had been added in the
vm_struct prior.

This fixes the hang in atari_platform_init() reported a long time ago,
and a similar one reported by Finn recently (addressed by removing
ioremap() use from the SWIM driver.

Tested on my Falcon in 030 mode - untested but should work the same on
040/060 (the extra page tables cleared there would never have been set
up anyway).

Signed-off-by: Michael Schmitz <schmitzmic@gmail.com>
[geert: Minor commit description improvements]
[geert: This was fixed in 2.4.23, but not in 2.5.x]
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/m68k/mm/kmap.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 6e4955bc542bf..fcd52cefee296 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -88,7 +88,8 @@ static inline void free_io_area(void *addr)
 	for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
 		if (tmp->addr == addr) {
 			*p = tmp->next;
-			__iounmap(tmp->addr, tmp->size);
+			/* remove gap added in get_io_area() */
+			__iounmap(tmp->addr, tmp->size - IO_SIZE);
 			kfree(tmp);
 			return;
 		}

From f6197c1f624288a8b6bf8716d3a989965e75ddab Mon Sep 17 00:00:00 2001
From: Daniel Wagner <daniel.wagner@siemens.com>
Date: Tue, 8 May 2018 10:55:09 +0200
Subject: [PATCH 0777/1852] serial: sh-sci: Use spin_{try}lock_irqsave instead
 of open coding version

commit 8afb1d2c12163f77777f84616a8e9444d0050ebe upstream.

Commit 40f70c03e33a ("serial: sh-sci: add locking to console write
function to avoid SMP lockup") copied the strategy to avoid locking
problems in conjuncture with the console from the UART8250
driver. Instead using directly spin_{try}lock_irqsave(),
local_irq_save() followed by spin_{try}lock() was used. While this is
correct on mainline, for -rt it is a problem. spin_{try}lock() will
check if it is running in a valid context. Since the local_irq_save()
has already been executed, the context has changed and
spin_{try}lock() will complain. The reason why spin_{try}lock()
complains is that on -rt the spin locks are turned into mutexes and
therefore can sleep. Sleeping with interrupts disabled is not valid.

BUG: sleeping function called from invalid context at /home/wagi/work/rt/v4.4-cip-rt/kernel/locking/rtmutex.c:995
in_atomic(): 0, irqs_disabled(): 128, pid: 778, name: irq/76-eth0
CPU: 0 PID: 778 Comm: irq/76-eth0 Not tainted 4.4.126-test-cip22-rt14-00403-gcd03665c8318 #12
Hardware name: Generic RZ/G1 (Flattened Device Tree)
Backtrace:
[<c00140a0>] (dump_backtrace) from [<c001424c>] (show_stack+0x18/0x1c)
 r7:c06b01f0 r6:60010193 r5:00000000 r4:c06b01f0
[<c0014234>] (show_stack) from [<c01d3c94>] (dump_stack+0x78/0x94)
[<c01d3c1c>] (dump_stack) from [<c004c134>] (___might_sleep+0x134/0x194)
 r7:60010113 r6:c06d3559 r5:00000000 r4:ffffe000
[<c004c000>] (___might_sleep) from [<c04ded60>] (rt_spin_lock+0x20/0x74)
 r5:c06f4d60 r4:c06f4d60
[<c04ded40>] (rt_spin_lock) from [<c02577e4>] (serial_console_write+0x100/0x118)
 r5:c06f4d60 r4:c06f4d60
[<c02576e4>] (serial_console_write) from [<c0061060>] (call_console_drivers.constprop.15+0x10c/0x124)
 r10:c06d2894 r9:c04e18b0 r8:00000028 r7:00000000 r6:c06d3559 r5:c06d2798
 r4:c06b9914 r3:c02576e4
[<c0060f54>] (call_console_drivers.constprop.15) from [<c0062984>] (console_unlock+0x32c/0x430)
 r10:c06d30d8 r9:00000028 r8:c06dd518 r7:00000005 r6:00000000 r5:c06d2798
 r4:c06d2798 r3:00000028
[<c0062658>] (console_unlock) from [<c0062e1c>] (vprintk_emit+0x394/0x4f0)
 r10:c06d2798 r9:c06d30ee r8:00000006 r7:00000005 r6:c06a78fc r5:00000027
 r4:00000003
[<c0062a88>] (vprintk_emit) from [<c0062fa0>] (vprintk+0x28/0x30)
 r10:c060bd46 r9:00001000 r8:c06b9a90 r7:c06b9a90 r6:c06b994c r5:c06b9a3c
 r4:c0062fa8
[<c0062f78>] (vprintk) from [<c0062fb8>] (vprintk_default+0x10/0x14)
[<c0062fa8>] (vprintk_default) from [<c009cd30>] (printk+0x78/0x84)
[<c009ccbc>] (printk) from [<c025afdc>] (credit_entropy_bits+0x17c/0x2cc)
 r3:00000001 r2:decade60 r1:c061a5ee r0:c061a523
 r4:00000006
[<c025ae60>] (credit_entropy_bits) from [<c025bf74>] (add_interrupt_randomness+0x160/0x178)
 r10:466e7196 r9:1f536000 r8:fffeef74 r7:00000000 r6:c06b9a60 r5:c06b9a3c
 r4:dfbcf680
[<c025be14>] (add_interrupt_randomness) from [<c006536c>] (irq_thread+0x1e8/0x248)
 r10:c006537c r9:c06cdf21 r8:c0064fcc r7:df791c24 r6:df791c00 r5:ffffe000
 r4:df525180
[<c0065184>] (irq_thread) from [<c003fba4>] (kthread+0x108/0x11c)
 r10:00000000 r9:00000000 r8:c0065184 r7:df791c00 r6:00000000 r5:df791d00
 r4:decac000
[<c003fa9c>] (kthread) from [<c00101b8>] (ret_from_fork+0x14/0x3c)
 r8:00000000 r7:00000000 r6:00000000 r5:c003fa9c r4:df791d00

Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Daniel Wagner <daniel.wagner@siemens.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[dw: Backported to 4.4.]
Signed-off-by: Daniel Wagner <daniel.wagner@siemens.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/sh-sci.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 8dd822feb972e..b63920481b1dd 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -2419,13 +2419,12 @@ static void serial_console_write(struct console *co, const char *s,
 	unsigned long flags;
 	int locked = 1;
 
-	local_irq_save(flags);
 	if (port->sysrq)
 		locked = 0;
 	else if (oops_in_progress)
-		locked = spin_trylock(&port->lock);
+		locked = spin_trylock_irqsave(&port->lock, flags);
 	else
-		spin_lock(&port->lock);
+		spin_lock_irqsave(&port->lock, flags);
 
 	/* first save the SCSCR then disable the interrupts */
 	ctrl = serial_port_in(port, SCSCR);
@@ -2442,8 +2441,7 @@ static void serial_console_write(struct console *co, const char *s,
 	serial_port_out(port, SCSCR, ctrl);
 
 	if (locked)
-		spin_unlock(&port->lock);
-	local_irq_restore(flags);
+		spin_unlock_irqrestore(&port->lock, flags);
 }
 
 static int serial_console_setup(struct console *co, char *options)

From aa77608da5f1076216bfef10d6245e37bed1009f Mon Sep 17 00:00:00 2001
From: "Eric W. Biederman" <ebiederm@xmission.com>
Date: Fri, 20 Apr 2018 09:14:56 -0500
Subject: [PATCH 0778/1852] signal/xtensa: Consistenly use SIGBUS in
 do_unaligned_user

commit 7de712ccc096b81d23cc0a941cd9b8cb3956605d upstream.

While working on changing this code to use force_sig_fault I
discovered that do_unaliged_user is sets si_signo to SIGBUS and passes
SIGSEGV to force_sig_info.  Which is just b0rked.

The code is reporting a SIGBUS error so replace the SIGSEGV with SIGBUS.

Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: linux-xtensa@linux-xtensa.org
Cc: stable@vger.kernel.org
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Fixes: 5a0015d62668 ("[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3")
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/xtensa/kernel/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index 42d441f7898b9..1edce040f470a 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -309,7 +309,7 @@ do_unaligned_user (struct pt_regs *regs)
 	info.si_errno = 0;
 	info.si_code = BUS_ADRALN;
 	info.si_addr = (void *) regs->excvaddr;
-	force_sig_info(SIGSEGV, &info, current);
+	force_sig_info(SIGBUS, &info, current);
 
 }
 #endif

From 1385f871098044e65d76ca00430b1eff66ce168b Mon Sep 17 00:00:00 2001
From: Maxim Moseychuk <franchesko.salias.hudro.pedros@gmail.com>
Date: Thu, 4 Jan 2018 21:43:03 +0300
Subject: [PATCH 0779/1852] usb: do not reset if a low-speed or full-speed
 device timed out

commit 6e01827ed93947895680fbdad68c072a0f4e2450 upstream.

Some low-speed and full-speed devices (for example, bluetooth)
do not have time to initialize. For them, ETIMEDOUT is a valid error.
We need to give them another try. Otherwise, they will
never be initialized correctly and in dmesg will be messages
"Bluetooth: hci0 command 0x1002 tx timeout" or similars.

Fixes: 264904ccc33c ("usb: retry reset if a device times out")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Maxim Moseychuk <franchesko.salias.hudro.pedros@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/core/hub.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 6adc4dc345176..f20524695839f 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -4443,7 +4443,9 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
 				 * reset. But only on the first attempt,
 				 * lest we get into a time out/reset loop
 				 */
-				if (r == 0  || (r == -ETIMEDOUT && retries == 0))
+				if (r == 0 || (r == -ETIMEDOUT &&
+						retries == 0 &&
+						udev->speed > USB_SPEED_FULL))
 					break;
 			}
 			udev->descriptor.bMaxPacketSize0 =

From 08890c1a14e921b3cfb9e4718f654bb7a80f2888 Mon Sep 17 00:00:00 2001
From: Ingo Flaschberger <ingo.flaschberger@gmail.com>
Date: Tue, 1 May 2018 16:10:33 +0200
Subject: [PATCH 0780/1852] 1wire: family module autoload fails because of
 upper/lower case mismatch.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 065c09563c872e52813a17218c52cd642be1dca6 upstream.

1wire family module autoload fails because of upper/lower
  case mismatch.

Signed-off-by: Ingo Flaschberger <ingo.flaschberger@gmail.com>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/w1/w1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index 39886edfa2221..88c1b8c014730 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -741,7 +741,7 @@ int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn)
 
 	/* slave modules need to be loaded in a context with unlocked mutex */
 	mutex_unlock(&dev->mutex);
-	request_module("w1-family-0x%02x", rn->family);
+	request_module("w1-family-0x%02X", rn->family);
 	mutex_lock(&dev->mutex);
 
 	spin_lock(&w1_flock);

From 3f11ee09fb25ecfb9ce134ede5286f502f6f58a9 Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Mon, 4 Jun 2018 12:13:26 +0100
Subject: [PATCH 0781/1852] ASoC: dapm: delete dapm_kcontrol_data paths list
 before freeing it

commit ff2faf1289c1f81b5b26b9451dd1c2006aac8db8 upstream.

dapm_kcontrol_data is freed as part of dapm_kcontrol_free(), leaving the
paths pointer dangling in the list.

This leads to system crash when we try to unload and reload sound card.
I hit this bug during ADSP crash/reboot test case on Dragon board DB410c.

Without this patch, on SLAB Poisoning enabled build, kernel crashes with
"BUG kmalloc-128 (Tainted: G        W        ): Poison overwritten"

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/soc-dapm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 6a438a3615922..9e784cc3e5d29 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -425,6 +425,8 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
 static void dapm_kcontrol_free(struct snd_kcontrol *kctl)
 {
 	struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl);
+
+	list_del(&data->paths);
 	kfree(data->wlist);
 	kfree(data);
 }

From c6f787744c52486e782ff1c31a559b2a1679fe93 Mon Sep 17 00:00:00 2001
From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Date: Sat, 28 Apr 2018 22:51:38 +0200
Subject: [PATCH 0782/1852] ASoC: cirrus: i2s: Fix LRCLK configuration

commit 2d534113be9a2aa532a1ae127a57e83558aed358 upstream.

The bit responsible for LRCLK polarity is i2s_tlrs (0), not i2s_trel (2)
(refer to "EP93xx User's Guide").

Previously card drivers which specified SND_SOC_DAIFMT_NB_IF actually got
SND_SOC_DAIFMT_NB_NF, an adaptation is necessary to retain the old
behavior.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/cirrus/edb93xx.c     | 2 +-
 sound/soc/cirrus/ep93xx-i2s.c  | 8 ++++----
 sound/soc/cirrus/snappercl15.c | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/sound/soc/cirrus/edb93xx.c b/sound/soc/cirrus/edb93xx.c
index 85962657aabe0..517963ef48472 100644
--- a/sound/soc/cirrus/edb93xx.c
+++ b/sound/soc/cirrus/edb93xx.c
@@ -67,7 +67,7 @@ static struct snd_soc_dai_link edb93xx_dai = {
 	.cpu_dai_name	= "ep93xx-i2s",
 	.codec_name	= "spi0.0",
 	.codec_dai_name	= "cs4271-hifi",
-	.dai_fmt	= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
+	.dai_fmt	= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
 			  SND_SOC_DAIFMT_CBS_CFS,
 	.ops		= &edb93xx_ops,
 };
diff --git a/sound/soc/cirrus/ep93xx-i2s.c b/sound/soc/cirrus/ep93xx-i2s.c
index 934f8aefdd90b..38c240c970417 100644
--- a/sound/soc/cirrus/ep93xx-i2s.c
+++ b/sound/soc/cirrus/ep93xx-i2s.c
@@ -213,24 +213,24 @@ static int ep93xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 	case SND_SOC_DAIFMT_NB_NF:
 		/* Negative bit clock, lrclk low on left word */
-		clk_cfg &= ~(EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL);
+		clk_cfg &= ~(EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_LRS);
 		break;
 
 	case SND_SOC_DAIFMT_NB_IF:
 		/* Negative bit clock, lrclk low on right word */
 		clk_cfg &= ~EP93XX_I2S_CLKCFG_CKP;
-		clk_cfg |= EP93XX_I2S_CLKCFG_REL;
+		clk_cfg |= EP93XX_I2S_CLKCFG_LRS;
 		break;
 
 	case SND_SOC_DAIFMT_IB_NF:
 		/* Positive bit clock, lrclk low on left word */
 		clk_cfg |= EP93XX_I2S_CLKCFG_CKP;
-		clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
+		clk_cfg &= ~EP93XX_I2S_CLKCFG_LRS;
 		break;
 
 	case SND_SOC_DAIFMT_IB_IF:
 		/* Positive bit clock, lrclk low on right word */
-		clk_cfg |= EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL;
+		clk_cfg |= EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_LRS;
 		break;
 	}
 
diff --git a/sound/soc/cirrus/snappercl15.c b/sound/soc/cirrus/snappercl15.c
index 98089df08df62..c6737a573bc08 100644
--- a/sound/soc/cirrus/snappercl15.c
+++ b/sound/soc/cirrus/snappercl15.c
@@ -72,7 +72,7 @@ static struct snd_soc_dai_link snappercl15_dai = {
 	.codec_dai_name	= "tlv320aic23-hifi",
 	.codec_name	= "tlv320aic23-codec.0-001a",
 	.platform_name	= "ep93xx-i2s",
-	.dai_fmt	= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
+	.dai_fmt	= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
 			  SND_SOC_DAIFMT_CBS_CFS,
 	.ops		= &snappercl15_ops,
 };

From b75a04f1eefbad5ecd062e3e88d0a2063c90abcb Mon Sep 17 00:00:00 2001
From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Date: Sat, 28 Apr 2018 22:51:39 +0200
Subject: [PATCH 0783/1852] ASoC: cirrus: i2s: Fix {TX|RX}LinCtrlData setup
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 5d302ed3cc80564fb835bed5fdba1e1250ecc9e5 upstream.

According to "EP93xx User’s Guide", I2STXLinCtrlData and I2SRXLinCtrlData
registers actually have different format. The only currently used bit
(Left_Right_Justify) has different position. Fix this and simplify the
whole setup taking into account the fact that both registers have zero
default value.

The practical effect of the above is repaired SND_SOC_DAIFMT_RIGHT_J
support (currently unused).

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/cirrus/ep93xx-i2s.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/sound/soc/cirrus/ep93xx-i2s.c b/sound/soc/cirrus/ep93xx-i2s.c
index 38c240c970417..0dc3852c46219 100644
--- a/sound/soc/cirrus/ep93xx-i2s.c
+++ b/sound/soc/cirrus/ep93xx-i2s.c
@@ -51,7 +51,9 @@
 #define EP93XX_I2S_WRDLEN_24		(1 << 0)
 #define EP93XX_I2S_WRDLEN_32		(2 << 0)
 
-#define EP93XX_I2S_LINCTRLDATA_R_JUST	(1 << 2) /* Right justify */
+#define EP93XX_I2S_RXLINCTRLDATA_R_JUST	BIT(1) /* Right justify */
+
+#define EP93XX_I2S_TXLINCTRLDATA_R_JUST	BIT(2) /* Right justify */
 
 #define EP93XX_I2S_CLKCFG_LRS		(1 << 0) /* lrclk polarity */
 #define EP93XX_I2S_CLKCFG_CKP		(1 << 1) /* Bit clock polarity */
@@ -170,25 +172,25 @@ static int ep93xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 				  unsigned int fmt)
 {
 	struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai);
-	unsigned int clk_cfg, lin_ctrl;
+	unsigned int clk_cfg;
+	unsigned int txlin_ctrl = 0;
+	unsigned int rxlin_ctrl = 0;
 
 	clk_cfg  = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXCLKCFG);
-	lin_ctrl = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXLINCTRLDATA);
 
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_I2S:
 		clk_cfg |= EP93XX_I2S_CLKCFG_REL;
-		lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
 		break;
 
 	case SND_SOC_DAIFMT_LEFT_J:
 		clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
-		lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
 		break;
 
 	case SND_SOC_DAIFMT_RIGHT_J:
 		clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
-		lin_ctrl |= EP93XX_I2S_LINCTRLDATA_R_JUST;
+		rxlin_ctrl |= EP93XX_I2S_RXLINCTRLDATA_R_JUST;
+		txlin_ctrl |= EP93XX_I2S_TXLINCTRLDATA_R_JUST;
 		break;
 
 	default:
@@ -237,8 +239,8 @@ static int ep93xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 	/* Write new register values */
 	ep93xx_i2s_write_reg(info, EP93XX_I2S_RXCLKCFG, clk_cfg);
 	ep93xx_i2s_write_reg(info, EP93XX_I2S_TXCLKCFG, clk_cfg);
-	ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, lin_ctrl);
-	ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, lin_ctrl);
+	ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, rxlin_ctrl);
+	ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, txlin_ctrl);
 	return 0;
 }
 

From 2cadf935a4519614767363a3408414b640fc2cca Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 1 Jun 2018 11:28:22 +0200
Subject: [PATCH 0784/1852] lib/vsprintf: Remove atomic-unsafe support for %pCr

commit 666902e42fd8344b923c02dc5b0f37948ff4f225 upstream.

"%pCr" formats the current rate of a clock, and calls clk_get_rate().
The latter obtains a mutex, hence it must not be called from atomic
context.

Remove support for this rarely-used format, as vsprintf() (and e.g.
printk()) must be callable from any context.

Any remaining out-of-tree users will start seeing the clock's name
printed instead of its rate.

Reported-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Fixes: 900cca2944254edd ("lib/vsprintf: add %pC{,n,r} format specifiers for clocks")
Link: http://lkml.kernel.org/r/1527845302-12159-5-git-send-email-geert+renesas@glider.be
To: Jia-Ju Bai <baijiaju1990@gmail.com>
To: Jonathan Corbet <corbet@lwn.net>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Zhang Rui <rui.zhang@intel.com>
To: Eduardo Valentin <edubezval@gmail.com>
To: Eric Anholt <eric@anholt.net>
To: Stefan Wahren <stefan.wahren@i2se.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
Cc: Petr Mladek <pmladek@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: linux-doc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: stable@vger.kernel.org # 4.1+
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Petr Mladek <pmladek@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/printk-formats.txt | 3 +--
 lib/vsprintf.c                   | 3 ---
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/Documentation/printk-formats.txt b/Documentation/printk-formats.txt
index b784c270105f4..ed6f6abaad577 100644
--- a/Documentation/printk-formats.txt
+++ b/Documentation/printk-formats.txt
@@ -273,11 +273,10 @@ struct clk:
 
 	%pC	pll1
 	%pCn	pll1
-	%pCr	1560000000
 
 	For printing struct clk structures. '%pC' and '%pCn' print the name
 	(Common Clock Framework) or address (legacy clock framework) of the
-	structure; '%pCr' prints the current clock rate.
+	structure.
 
 	Passed by reference.
 
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index f9cee8e1233c0..646009db41980 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -1345,9 +1345,6 @@ char *clock(char *buf, char *end, struct clk *clk, struct printf_spec spec,
 		return string(buf, end, NULL, spec);
 
 	switch (fmt[1]) {
-	case 'r':
-		return number(buf, end, clk_get_rate(clk), spec);
-
 	case 'n':
 	default:
 #ifdef CONFIG_COMMON_CLK

From 1e91671c78c8031a80db89c639380633dbd0d5bc Mon Sep 17 00:00:00 2001
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sat, 24 Mar 2018 17:57:49 +0100
Subject: [PATCH 0785/1852] mips: ftrace: fix static function graph tracing

commit 6fb8656646f996d1eef42e6d56203c4915cb9e08 upstream.

ftrace_graph_caller was never run after calling ftrace_trace_function,
breaking the function graph tracer. Fix this, bringing it in line with the
x86 implementation.

While we're at it, also streamline the control flow of _mcount a bit to
reduce the number of branches.

This issue was reported before:
https://www.linux-mips.org/archives/linux-mips/2014-11/msg00295.html

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Tested-by: Matt Redfearn <matt.redfearn@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/18929/
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: stable@vger.kernel.org # v3.17+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/mcount.S | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S
index 2f7c734771f4e..0df911e772ae0 100644
--- a/arch/mips/kernel/mcount.S
+++ b/arch/mips/kernel/mcount.S
@@ -116,10 +116,20 @@ ftrace_stub:
 NESTED(_mcount, PT_SIZE, ra)
 	PTR_LA	t1, ftrace_stub
 	PTR_L	t2, ftrace_trace_function /* Prepare t2 for (1) */
-	bne	t1, t2, static_trace
+	beq	t1, t2, fgraph_trace
 	 nop
 
+	MCOUNT_SAVE_REGS
+
+	move	a0, ra		/* arg1: self return address */
+	jalr	t2		/* (1) call *ftrace_trace_function */
+	 move	a1, AT		/* arg2: parent's return address */
+
+	MCOUNT_RESTORE_REGS
+
+fgraph_trace:
 #ifdef	CONFIG_FUNCTION_GRAPH_TRACER
+	PTR_LA	t1, ftrace_stub
 	PTR_L	t3, ftrace_graph_return
 	bne	t1, t3, ftrace_graph_caller
 	 nop
@@ -128,24 +138,11 @@ NESTED(_mcount, PT_SIZE, ra)
 	bne	t1, t3, ftrace_graph_caller
 	 nop
 #endif
-	b	ftrace_stub
-#ifdef CONFIG_32BIT
-	 addiu sp, sp, 8
-#else
-	 nop
-#endif
 
-static_trace:
-	MCOUNT_SAVE_REGS
-
-	move	a0, ra		/* arg1: self return address */
-	jalr	t2		/* (1) call *ftrace_trace_function */
-	 move	a1, AT		/* arg2: parent's return address */
-
-	MCOUNT_RESTORE_REGS
 #ifdef CONFIG_32BIT
 	addiu sp, sp, 8
 #endif
+
 	.globl ftrace_stub
 ftrace_stub:
 	RETURN_BACK

From c22fab921b6ec6bf869e85751f2fbe32e7769c52 Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Wed, 30 May 2018 08:19:22 -0400
Subject: [PATCH 0786/1852] branch-check: fix long->int truncation when
 profiling branches

commit 2026d35741f2c3ece73c11eb7e4a15d7c2df9ebe upstream.

The function __builtin_expect returns long type (see the gcc
documentation), and so do macros likely and unlikely. Unfortunatelly, when
CONFIG_PROFILE_ANNOTATED_BRANCHES is selected, the macros likely and
unlikely expand to __branch_check__ and __branch_check__ truncates the
long type to int. This unintended truncation may cause bugs in various
kernel code (we found a bug in dm-writecache because of it), so it's
better to fix __branch_check__ to return long.

Link: http://lkml.kernel.org/r/alpine.LRH.2.02.1805300818140.24812@file01.intranet.prod.int.rdu2.redhat.com

Cc: Ingo Molnar <mingo@redhat.com>
Cc: stable@vger.kernel.org
Fixes: 1f0d69a9fc815 ("tracing: profile likely and unlikely annotations")
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/compiler.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 6fc9a6dd5ed23..0db1fa621d8a5 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -111,7 +111,7 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
 #define unlikely_notrace(x)	__builtin_expect(!!(x), 0)
 
 #define __branch_check__(x, expect) ({					\
-			int ______r;					\
+			long ______r;					\
 			static struct ftrace_branch_data		\
 				__attribute__((__aligned__(4)))		\
 				__attribute__((section("_ftrace_annotated_branch"))) \

From 570e712d0075d3bdccc4d17524018640cce84f52 Mon Sep 17 00:00:00 2001
From: Corey Minyard <cminyard@mvista.com>
Date: Tue, 22 May 2018 08:14:51 -0500
Subject: [PATCH 0787/1852] ipmi:bt: Set the timeout before doing a
 capabilities check

commit fe50a7d0393a552e4539da2d31261a59d6415950 upstream.

There was one place where the timeout value for an operation was
not being set, if a capabilities request was done from idle.  Move
the timeout value setting to before where that change might be
requested.

IMHO the cause here is the invisible returns in the macros.  Maybe
that's a job for later, though.

Reported-by: Nordmark Claes <Claes.Nordmark@tieto.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/ipmi/ipmi_bt_sm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/char/ipmi/ipmi_bt_sm.c b/drivers/char/ipmi/ipmi_bt_sm.c
index feafdab734ae2..4835b588b7833 100644
--- a/drivers/char/ipmi/ipmi_bt_sm.c
+++ b/drivers/char/ipmi/ipmi_bt_sm.c
@@ -522,11 +522,12 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time)
 		if (status & BT_H_BUSY)		/* clear a leftover H_BUSY */
 			BT_CONTROL(BT_H_BUSY);
 
+		bt->timeout = bt->BT_CAP_req2rsp;
+
 		/* Read BT capabilities if it hasn't been done yet */
 		if (!bt->BT_CAP_outreqs)
 			BT_STATE_CHANGE(BT_STATE_CAPABILITIES_BEGIN,
 					SI_SM_CALL_WITHOUT_DELAY);
-		bt->timeout = bt->BT_CAP_req2rsp;
 		BT_SI_SM_RETURN(SI_SM_IDLE);
 
 	case BT_STATE_XACTION_START:

From f3a72738dc0cfc1bb594af53990cf9ab5f86e5c2 Mon Sep 17 00:00:00 2001
From: Amit Pundir <amit.pundir@linaro.org>
Date: Mon, 16 Apr 2018 12:10:24 +0530
Subject: [PATCH 0788/1852] Bluetooth: hci_qca: Avoid missing rampatch failure
 with userspace fw loader

commit 7dc5fe0814c35ec4e7d2e8fa30abab72e0e6a172 upstream.

AOSP use userspace firmware loader to load firmwares, which will
return -EAGAIN in case qca/rampatch_00440302.bin is not found.
Since there is no rampatch for dragonboard820c QCA controller
revision, just make it work as is.

CC: Loic Poulain <loic.poulain@linaro.org>
CC: Nicolas Dechesne <nicolas.dechesne@linaro.org>
CC: Marcel Holtmann <marcel@holtmann.org>
CC: Johan Hedberg <johan.hedberg@gmail.com>
CC: Stable <stable@vger.kernel.org>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/bluetooth/hci_qca.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 8a3bf0a8c31d7..476d39c7ba208 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -939,6 +939,12 @@ static int qca_setup(struct hci_uart *hu)
 	} else if (ret == -ENOENT) {
 		/* No patch/nvm-config found, run with original fw/config */
 		ret = 0;
+	} else if (ret == -EAGAIN) {
+		/*
+		 * Userspace firmware loader will return -EAGAIN in case no
+		 * patch/nvm-config is found, so run with original fw/config.
+		 */
+		ret = 0;
 	}
 
 	/* Setup bdaddr */

From f5ff698ea79e4609bf3263aab58a01eebeb1e1dd Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 8 Feb 2018 15:17:38 +0100
Subject: [PATCH 0789/1852] fuse: atomic_o_trunc should truncate pagecache

commit df0e91d488276086bc07da2e389986cae0048c37 upstream.

Fuse has an "atomic_o_trunc" mode, where userspace filesystem uses the
O_TRUNC flag in the OPEN request to truncate the file atomically with the
open.

In this mode there's no need to send a SETATTR request to userspace after
the open, so fuse_do_setattr() checks this mode and returns.  But this
misses the important step of truncating the pagecache.

Add the missing parts of truncation to the ATTR_OPEN branch.

Reported-by: Chad Austin <chadaustin@fb.com>
Fixes: 6ff958edbf39 ("fuse: add atomic open+truncate support")
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/dir.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c
index bfa274c066663..62fcec0f6d01b 100644
--- a/fs/fuse/dir.c
+++ b/fs/fuse/dir.c
@@ -1654,8 +1654,19 @@ int fuse_do_setattr(struct inode *inode, struct iattr *attr,
 		return err;
 
 	if (attr->ia_valid & ATTR_OPEN) {
-		if (fc->atomic_o_trunc)
+		/* This is coming from open(..., ... | O_TRUNC); */
+		WARN_ON(!(attr->ia_valid & ATTR_SIZE));
+		WARN_ON(attr->ia_size != 0);
+		if (fc->atomic_o_trunc) {
+			/*
+			 * No need to send request to userspace, since actual
+			 * truncation has already been done by OPEN.  But still
+			 * need to truncate page cache.
+			 */
+			i_size_write(inode, 0);
+			truncate_pagecache(inode, 0);
 			return 0;
+		}
 		file = NULL;
 	}
 

From 937aff1c310a1bed7e2946264f1ee4b9c9d536c3 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Tue, 1 May 2018 13:12:14 +0900
Subject: [PATCH 0790/1852] fuse: don't keep dead fuse_conn at
 fuse_fill_super().

commit 543b8f8662fe6d21f19958b666ab0051af9db21a upstream.

syzbot is reporting use-after-free at fuse_kill_sb_blk() [1].
Since sb->s_fs_info field is not cleared after fc was released by
fuse_conn_put() when initialization failed, fuse_kill_sb_blk() finds
already released fc and tries to hold the lock. Fix this by clearing
sb->s_fs_info field after calling fuse_conn_put().

[1] https://syzkaller.appspot.com/bug?id=a07a680ed0a9290585ca424546860464dd9658db

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+ec3986119086fe4eec97@syzkaller.appspotmail.com>
Fixes: 3b463ae0c626 ("fuse: invalidation reverse calls")
Cc: John Muir <john@jmuir.com>
Cc: Csaba Henk <csaba@gluster.com>
Cc: Anand Avati <avati@redhat.com>
Cc: <stable@vger.kernel.org> # v2.6.31
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/inode.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 0d5e8e59b390e..f0b73e0c6d481 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -1158,6 +1158,7 @@ static int fuse_fill_super(struct super_block *sb, void *data, int silent)
  err_put_conn:
 	fuse_bdi_destroy(fc);
 	fuse_conn_put(fc);
+	sb->s_fs_info = NULL;
  err_fput:
 	fput(file);
  err:

From 2116e94f2b1b4f9021cc8758e2d8bf74184b0ccc Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 31 May 2018 12:26:10 +0200
Subject: [PATCH 0791/1852] fuse: fix control dir setup and teardown

commit 6becdb601bae2a043d7fb9762c4d48699528ea6e upstream.

syzbot is reporting NULL pointer dereference at fuse_ctl_remove_conn() [1].
Since fc->ctl_ndents is incremented by fuse_ctl_add_conn() when new_inode()
failed, fuse_ctl_remove_conn() reaches an inode-less dentry and tries to
clear d_inode(dentry)->i_private field.

Fix by only adding the dentry to the array after being fully set up.

When tearing down the control directory, do d_invalidate() on it to get rid
of any mounts that might have been added.

[1] https://syzkaller.appspot.com/bug?id=f396d863067238959c91c0b7cfc10b163638cac6
Reported-by: syzbot <syzbot+32c236387d66c4516827@syzkaller.appspotmail.com>
Fixes: bafa96541b25 ("[PATCH] fuse: add control filesystem")
Cc: <stable@vger.kernel.org> # v2.6.18
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/control.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/fs/fuse/control.c b/fs/fuse/control.c
index f863ac6647ac3..89a4b231e79cb 100644
--- a/fs/fuse/control.c
+++ b/fs/fuse/control.c
@@ -211,10 +211,11 @@ static struct dentry *fuse_ctl_add_dentry(struct dentry *parent,
 	if (!dentry)
 		return NULL;
 
-	fc->ctl_dentry[fc->ctl_ndents++] = dentry;
 	inode = new_inode(fuse_control_sb);
-	if (!inode)
+	if (!inode) {
+		dput(dentry);
 		return NULL;
+	}
 
 	inode->i_ino = get_next_ino();
 	inode->i_mode = mode;
@@ -228,6 +229,9 @@ static struct dentry *fuse_ctl_add_dentry(struct dentry *parent,
 	set_nlink(inode, nlink);
 	inode->i_private = fc;
 	d_add(dentry, inode);
+
+	fc->ctl_dentry[fc->ctl_ndents++] = dentry;
+
 	return dentry;
 }
 
@@ -284,7 +288,10 @@ void fuse_ctl_remove_conn(struct fuse_conn *fc)
 	for (i = fc->ctl_ndents - 1; i >= 0; i--) {
 		struct dentry *dentry = fc->ctl_dentry[i];
 		d_inode(dentry)->i_private = NULL;
-		d_drop(dentry);
+		if (!i) {
+			/* Get rid of submounts: */
+			d_invalidate(dentry);
+		}
 		dput(dentry);
 	}
 	drop_nlink(d_inode(fuse_control_sb->s_root));

From 85b3093a69107aeabe47e56641c95214483e57e2 Mon Sep 17 00:00:00 2001
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Date: Wed, 30 May 2018 18:48:04 +0530
Subject: [PATCH 0792/1852] powerpc/mm/hash: Add missing isync prior to kernel
 stack SLB switch

commit 91d06971881f71d945910de128658038513d1b24 upstream.

Currently we do not have an isync, or any other context synchronizing
instruction prior to the slbie/slbmte in _switch() that updates the
SLB entry for the kernel stack.

However that is not correct as outlined in the ISA.

From Power ISA Version 3.0B, Book III, Chapter 11, page 1133:

  "Changing the contents of ... the contents of SLB entries ... can
   have the side effect of altering the context in which data
   addresses and instruction addresses are interpreted, and in which
   instructions are executed and data accesses are performed.
   ...
   These side effects need not occur in program order, and therefore
   may require explicit synchronization by software.
   ...
   The synchronizing instruction before the context-altering
   instruction ensures that all instructions up to and including that
   synchronizing instruction are fetched and executed in the context
   that existed before the alteration."

And page 1136:

  "For data accesses, the context synchronizing instruction before the
   slbie, slbieg, slbia, slbmte, tlbie, or tlbiel instruction ensures
   that all preceding instructions that access data storage have
   completed to a point at which they have reported all exceptions
   they will cause."

We're not aware of any bugs caused by this, but it should be fixed
regardless.

Add the missing isync when updating kernel stack SLB entry.

Cc: stable@vger.kernel.org
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
[mpe: Flesh out change log with more ISA text & explanation]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/entry_64.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2837232bbffb9..59be969173696 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -574,6 +574,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
 	 * actually hit this code path.
 	 */
 
+	isync
 	slbie	r6
 	slbie	r6		/* Workaround POWER5 < DD2.1 issue */
 	slbmte	r7,r0

From 0d56565b4bae0414cbe885497da9e7eec226fd92 Mon Sep 17 00:00:00 2001
From: Michael Neuling <mikey@neuling.org>
Date: Thu, 17 May 2018 15:37:15 +1000
Subject: [PATCH 0793/1852] powerpc/ptrace: Fix setting 512B aligned
 breakpoints with PTRACE_SET_DEBUGREG

commit 4f7c06e26ec9cf7fe9f0c54dc90079b6a4f4b2c3 upstream.

In commit e2a800beaca1 ("powerpc/hw_brk: Fix off by one error when
validating DAWR region end") we fixed setting the DAWR end point to
its max value via PPC_PTRACE_SETHWDEBUG. Unfortunately we broke
PTRACE_SET_DEBUGREG when setting a 512 byte aligned breakpoint.

PTRACE_SET_DEBUGREG currently sets the length of the breakpoint to
zero (memset() in hw_breakpoint_init()). This worked with
arch_validate_hwbkpt_settings() before the above patch was applied but
is now broken if the breakpoint is 512byte aligned.

This sets the length of the breakpoint to 8 bytes when using
PTRACE_SET_DEBUGREG.

Fixes: e2a800beaca1 ("powerpc/hw_brk: Fix off by one error when validating DAWR region end")
Cc: stable@vger.kernel.org # v3.11+
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/ptrace.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index b38fd081b2223..3b63655efa3c5 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1004,6 +1004,7 @@ static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 	/* Create a new breakpoint request if one doesn't exist already */
 	hw_breakpoint_init(&attr);
 	attr.bp_addr = hw_brk.address;
+	attr.bp_len = 8;
 	arch_bp_generic_fields(hw_brk.type,
 			       &attr.bp_type);
 

From 15aeaedc412cbf88965836ef527444b580b4d3af Mon Sep 17 00:00:00 2001
From: Michael Neuling <mikey@neuling.org>
Date: Thu, 17 May 2018 15:37:14 +1000
Subject: [PATCH 0794/1852] powerpc/ptrace: Fix enforcement of DAWR constraints

commit cd6ef7eebf171bfcba7dc2df719c2a4958775040 upstream.

Back when we first introduced the DAWR, in commit 4ae7ebe9522a
("powerpc: Change hardware breakpoint to allow longer ranges"), we
screwed up the constraint making it a 1024 byte boundary rather than a
512. This makes the check overly permissive. Fortunately GDB is the
only real user and it always did they right thing, so we never
noticed.

This fixes the constraint to 512 bytes.

Fixes: 4ae7ebe9522a ("powerpc: Change hardware breakpoint to allow longer ranges")
Cc: stable@vger.kernel.org # v3.9+
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/hw_breakpoint.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index fdf48785d3e9f..56e4571e3a023 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -174,8 +174,8 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
 	if (cpu_has_feature(CPU_FTR_DAWR)) {
 		length_max = 512 ; /* 64 doublewords */
 		/* DAWR region can't cross 512 boundary */
-		if ((bp->attr.bp_addr >> 10) != 
-		    ((bp->attr.bp_addr + bp->attr.bp_len - 1) >> 10))
+		if ((bp->attr.bp_addr >> 9) !=
+		    ((bp->attr.bp_addr + bp->attr.bp_len - 1) >> 9))
 			return -EINVAL;
 	}
 	if (info->len >

From 571c22535abc16ce6c803e8e65362e2860f8ff90 Mon Sep 17 00:00:00 2001
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Date: Thu, 31 May 2018 17:45:09 +0530
Subject: [PATCH 0795/1852] cpuidle: powernv: Fix promotion from snooze if next
 state disabled

commit 0a4ec6aa035a52c422eceb2ed51ed88392a3d6c2 upstream.

The commit 78eaa10f027c ("cpuidle: powernv/pseries: Auto-promotion of
snooze to deeper idle state") introduced a timeout for the snooze idle
state so that it could be eventually be promoted to a deeper idle
state. The snooze timeout value is static and set to the target
residency of the next idle state, which would train the cpuidle
governor to pick the next idle state eventually.

The unfortunate side-effect of this is that if the next idle state(s)
is disabled, the CPU will forever remain in snooze, despite the fact
that the system is completely idle, and other deeper idle states are
available.

This patch fixes the issue by dynamically setting the snooze timeout
to the target residency of the next enabled state on the device.

Before Patch:
  POWER8 : Only nap disabled.
  $ cpupower monitor sleep 30
  sleep took 30.01297 seconds and exited with status 0
                |Idle_Stats
  PKG |CORE|CPU | snoo | Nap  | Fast
     0|   8|   0| 96.41|  0.00|  0.00
     0|   8|   1| 96.43|  0.00|  0.00
     0|   8|   2| 96.47|  0.00|  0.00
     0|   8|   3| 96.35|  0.00|  0.00
     0|   8|   4| 96.37|  0.00|  0.00
     0|   8|   5| 96.37|  0.00|  0.00
     0|   8|   6| 96.47|  0.00|  0.00
     0|   8|   7| 96.47|  0.00|  0.00

  POWER9: Shallow states (stop0lite, stop1lite, stop2lite, stop0, stop1,
  stop2) disabled:
  $ cpupower monitor sleep 30
  sleep took 30.05033 seconds and exited with status 0
                |Idle_Stats
  PKG |CORE|CPU | snoo | stop | stop | stop | stop | stop | stop | stop | stop
     0|  16|   0| 89.79|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00
     0|  16|   1| 90.12|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00
     0|  16|   2| 90.21|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00
     0|  16|   3| 90.29|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00

After Patch:
  POWER8 : Only nap disabled.
  $ cpupower monitor sleep 30
  sleep took 30.01200 seconds and exited with status 0
                |Idle_Stats
  PKG |CORE|CPU | snoo | Nap  | Fast
     0|   8|   0| 16.58|  0.00| 77.21
     0|   8|   1| 18.42|  0.00| 75.38
     0|   8|   2|  4.70|  0.00| 94.09
     0|   8|   3| 17.06|  0.00| 81.73
     0|   8|   4|  3.06|  0.00| 95.73
     0|   8|   5|  7.00|  0.00| 96.80
     0|   8|   6|  1.00|  0.00| 98.79
     0|   8|   7|  5.62|  0.00| 94.17

  POWER9: Shallow states (stop0lite, stop1lite, stop2lite, stop0, stop1,
  stop2) disabled:

  $ cpupower monitor sleep 30
  sleep took 30.02110 seconds and exited with status 0
                |Idle_Stats
  PKG |CORE|CPU | snoo | stop | stop | stop | stop | stop | stop | stop | stop
     0|   0|   0|  0.69|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  9.39| 89.70
     0|   0|   1|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.05| 93.21
     0|   0|   2|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00| 89.93
     0|   0|   3|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00|  0.00| 93.26

Fixes: 78eaa10f027c ("cpuidle: powernv/pseries: Auto-promotion of snooze to deeper idle state")
Cc: stable@vger.kernel.org # v4.2+
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Reviewed-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cpuidle/cpuidle-powernv.c | 32 +++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
index c44a843cb405f..44ebda8bbc848 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -29,9 +29,31 @@ struct cpuidle_driver powernv_idle_driver = {
 
 static int max_idle_state;
 static struct cpuidle_state *cpuidle_state_table;
-static u64 snooze_timeout;
+static u64 default_snooze_timeout;
 static bool snooze_timeout_en;
 
+static u64 get_snooze_timeout(struct cpuidle_device *dev,
+			      struct cpuidle_driver *drv,
+			      int index)
+{
+	int i;
+
+	if (unlikely(!snooze_timeout_en))
+		return default_snooze_timeout;
+
+	for (i = index + 1; i < drv->state_count; i++) {
+		struct cpuidle_state *s = &drv->states[i];
+		struct cpuidle_state_usage *su = &dev->states_usage[i];
+
+		if (s->disabled || su->disable)
+			continue;
+
+		return s->target_residency * tb_ticks_per_usec;
+	}
+
+	return default_snooze_timeout;
+}
+
 static int snooze_loop(struct cpuidle_device *dev,
 			struct cpuidle_driver *drv,
 			int index)
@@ -41,7 +63,7 @@ static int snooze_loop(struct cpuidle_device *dev,
 	local_irq_enable();
 	set_thread_flag(TIF_POLLING_NRFLAG);
 
-	snooze_exit_time = get_tb() + snooze_timeout;
+	snooze_exit_time = get_tb() + get_snooze_timeout(dev, drv, index);
 	ppc64_runlatch_off();
 	while (!need_resched()) {
 		HMT_low();
@@ -286,11 +308,9 @@ static int powernv_idle_probe(void)
 		cpuidle_state_table = powernv_states;
 		/* Device tree can indicate more idle states */
 		max_idle_state = powernv_add_idle_states();
-		if (max_idle_state > 1) {
+		default_snooze_timeout = TICK_USEC * tb_ticks_per_usec;
+		if (max_idle_state > 1)
 			snooze_timeout_en = true;
-			snooze_timeout = powernv_states[1].target_residency *
-					 tb_ticks_per_usec;
-		}
  	} else
  		return -ENODEV;
 

From c07be88a2215b0a0b298f0a52ac4203ae9e9e33c Mon Sep 17 00:00:00 2001
From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Date: Fri, 27 Apr 2018 11:53:18 +0530
Subject: [PATCH 0796/1852] powerpc/fadump: Unregister fadump on kexec down
 path.

commit 722cde76d68e8cc4f3de42e71c82fd40dea4f7b9 upstream.

Unregister fadump on kexec down path otherwise the fadump registration
in new kexec-ed kernel complains that fadump is already registered.
This makes new kernel to continue using fadump registered by previous
kernel which may lead to invalid vmcore generation. Hence this patch
fixes this issue by un-registering fadump in fadump_cleanup() which is
called during kexec path so that new kernel can register fadump with
new valid values.

Fixes: b500afff11f6 ("fadump: Invalidate registration and release reserved memory for general use.")
Cc: stable@vger.kernel.org # v3.4+
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/fadump.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 26d091a1a54cf..791d4c3329c3a 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -1025,6 +1025,9 @@ void fadump_cleanup(void)
 		init_fadump_mem_struct(&fdm,
 			be64_to_cpu(fdm_active->cpu_state_data.destination_address));
 		fadump_invalidate_dump(&fdm);
+	} else if (fw_dump.dump_registered) {
+		/* Un-register Firmware-assisted dump if it was registered. */
+		fadump_unregister_dump(&fdm);
 	}
 }
 

From 19588c9ef56bda5cb58597fc4d310c23a1b37eca Mon Sep 17 00:00:00 2001
From: David Rivshin <DRivshin@allworx.com>
Date: Wed, 25 Apr 2018 21:15:01 +0100
Subject: [PATCH 0797/1852] ARM: 8764/1: kgdb: fix NUMREGBYTES so that
 gdb_regs[] is the correct size

commit 76ed0b803a2ab793a1b27d1dfe0de7955282cd34 upstream.

NUMREGBYTES (which is used as the size for gdb_regs[]) is incorrectly
based on DBG_MAX_REG_NUM instead of GDB_MAX_REGS. DBG_MAX_REG_NUM
is the number of total registers, while GDB_MAX_REGS is the number
of 'unsigned longs' it takes to serialize those registers. Since
FP registers require 3 'unsigned longs' each, DBG_MAX_REG_NUM is
smaller than GDB_MAX_REGS.

This causes GDB 8.0 give the following error on connect:
"Truncated register 19 in remote 'g' packet"

This also causes the register serialization/deserialization logic
to overflow gdb_regs[], overwriting whatever follows.

Fixes: 834b2964b7ab ("kgdb,arm: fix register dump")
Cc: <stable@vger.kernel.org> # 2.6.37+
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rabin Vincent <rabin@rab.in>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/include/asm/kgdb.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h
index 0a9d5dd932941..6949c7d4481c4 100644
--- a/arch/arm/include/asm/kgdb.h
+++ b/arch/arm/include/asm/kgdb.h
@@ -76,7 +76,7 @@ extern int kgdb_fault_expected;
 
 #define KGDB_MAX_NO_CPUS	1
 #define BUFMAX			400
-#define NUMREGBYTES		(DBG_MAX_REG_NUM << 2)
+#define NUMREGBYTES		(GDB_MAX_REGS << 2)
 #define NUMCRITREGBYTES		(32 << 2)
 
 #define _R0			0

From 0f624f37c1d5d83ecab664425ab8d02b7a37f650 Mon Sep 17 00:00:00 2001
From: Stefan M Schaeckeler <sschaeck@cisco.com>
Date: Mon, 21 May 2018 16:26:14 -0700
Subject: [PATCH 0798/1852] of: unittest: for strings, account for trailing \0
 in property length field

commit 3b9cf7905fe3ab35ab437b5072c883e609d3498d upstream.

For strings, account for trailing \0 in property length field:

This is consistent with how dtc builds string properties.

Function __of_prop_dup() would misbehave on such properties as it duplicates
properties based on the property length field creating new string values
without trailing \0s.

Signed-off-by: Stefan M Schaeckeler <sschaeck@cisco.com>
Reviewed-by: Frank Rowand <frank.rowand@sony.com>
Tested-by: Frank Rowand <frank.rowand@sony.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/of/unittest.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index e16ea5717b7f7..2a547ca3d4432 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -156,20 +156,20 @@ static void __init of_unittest_dynamic(void)
 	/* Add a new property - should pass*/
 	prop->name = "new-property";
 	prop->value = "new-property-data";
-	prop->length = strlen(prop->value);
+	prop->length = strlen(prop->value) + 1;
 	unittest(of_add_property(np, prop) == 0, "Adding a new property failed\n");
 
 	/* Try to add an existing property - should fail */
 	prop++;
 	prop->name = "new-property";
 	prop->value = "new-property-data-should-fail";
-	prop->length = strlen(prop->value);
+	prop->length = strlen(prop->value) + 1;
 	unittest(of_add_property(np, prop) != 0,
 		 "Adding an existing property should have failed\n");
 
 	/* Try to modify an existing property - should pass */
 	prop->value = "modify-property-data-should-pass";
-	prop->length = strlen(prop->value);
+	prop->length = strlen(prop->value) + 1;
 	unittest(of_update_property(np, prop) == 0,
 		 "Updating an existing property should have passed\n");
 
@@ -177,7 +177,7 @@ static void __init of_unittest_dynamic(void)
 	prop++;
 	prop->name = "modify-property";
 	prop->value = "modify-missing-property-data-should-pass";
-	prop->length = strlen(prop->value);
+	prop->length = strlen(prop->value) + 1;
 	unittest(of_update_property(np, prop) == 0,
 		 "Updating a missing property should have passed\n");
 

From cf1b89e8dfb781128e3feb5a6acb74f18628de6a Mon Sep 17 00:00:00 2001
From: Mike Marciniszyn <mike.marciniszyn@intel.com>
Date: Fri, 18 May 2018 17:07:01 -0700
Subject: [PATCH 0799/1852] IB/qib: Fix DMA api warning with debug kernel

commit 0252f73334f9ef68868e4684200bea3565a4fcee upstream.

The following error occurs in a debug build when running MPI PSM:

[  307.415911] WARNING: CPU: 4 PID: 23867 at lib/dma-debug.c:1158
check_unmap+0x4ee/0xa20
[  307.455661] ib_qib 0000:05:00.0: DMA-API: device driver failed to check map
error[device address=0x00000000df82b000] [size=4096 bytes] [mapped as page]
[  307.517494] Modules linked in:
[  307.531584]  ib_isert iscsi_target_mod ib_srpt target_core_mod rpcrdma
sunrpc ib_srp scsi_transport_srp scsi_tgt ib_iser libiscsi ib_ipoib
scsi_transport_iscsi rdma_ucm ib_ucm ib_uverbs ib_umad rdma_cm ib_cm iw_cm
ib_qib intel_powerclamp coretemp rdmavt intel_rapl iosf_mbi kvm_intel kvm
irqbypass crc32_pclmul ghash_clmulni_intel ipmi_ssif ib_core aesni_intel sg
ipmi_si lrw gf128mul dca glue_helper ipmi_devintf iTCO_wdt gpio_ich hpwdt
iTCO_vendor_support ablk_helper hpilo acpi_power_meter cryptd ipmi_msghandler
ie31200_edac shpchp pcc_cpufreq lpc_ich pcspkr ip_tables xfs libcrc32c sd_mod
crc_t10dif crct10dif_generic mgag200 i2c_algo_bit drm_kms_helper syscopyarea
sysfillrect sysimgblt fb_sys_fops ttm ahci crct10dif_pclmul crct10dif_common
drm crc32c_intel libahci tg3 libata serio_raw ptp i2c_core
[  307.846113]  pps_core dm_mirror dm_region_hash dm_log dm_mod
[  307.866505] CPU: 4 PID: 23867 Comm: mpitests-IMB-MP Kdump: loaded Not
tainted 3.10.0-862.el7.x86_64.debug #1
[  307.911178] Hardware name: HP ProLiant DL320e Gen8, BIOS J05 11/09/2013
[  307.944206] Call Trace:
[  307.956973]  [<ffffffffbd9e915b>] dump_stack+0x19/0x1b
[  307.982201]  [<ffffffffbd2a2f58>] __warn+0xd8/0x100
[  308.005999]  [<ffffffffbd2a2fdf>] warn_slowpath_fmt+0x5f/0x80
[  308.034260]  [<ffffffffbd5f667e>] check_unmap+0x4ee/0xa20
[  308.060801]  [<ffffffffbd41acaa>] ? page_add_file_rmap+0x2a/0x1d0
[  308.090689]  [<ffffffffbd5f6c4d>] debug_dma_unmap_page+0x9d/0xb0
[  308.120155]  [<ffffffffbd4082e0>] ? might_fault+0xa0/0xb0
[  308.146656]  [<ffffffffc07761a5>] qib_tid_free.isra.14+0x215/0x2a0 [ib_qib]
[  308.180739]  [<ffffffffc0776bf4>] qib_write+0x894/0x1280 [ib_qib]
[  308.210733]  [<ffffffffbd540b00>] ? __inode_security_revalidate+0x70/0x80
[  308.244837]  [<ffffffffbd53c2b7>] ? security_file_permission+0x27/0xb0
[  308.266025] qib_ib0.8006: multicast join failed for
ff12:401b:8006:0000:0000:0000:ffff:ffff, status -22
[  308.323421]  [<ffffffffbd46f5d3>] vfs_write+0xc3/0x1f0
[  308.347077]  [<ffffffffbd492a5c>] ? fget_light+0xfc/0x510
[  308.372533]  [<ffffffffbd47045a>] SyS_write+0x8a/0x100
[  308.396456]  [<ffffffffbd9ff355>] system_call_fastpath+0x1c/0x21

The code calls a qib_map_page() which has never correctly tested for a
mapping error.

Fix by testing for pci_dma_mapping_error() in all cases and properly
handling the failure in the caller.

Additionally, streamline qib_map_page() arguments to satisfy just
the single caller.

Cc: <stable@vger.kernel.org>
Reviewed-by: Alex Estrin <alex.estrin@intel.com>
Tested-by: Don Dutile <ddutile@redhat.com>
Reviewed-by: Don Dutile <ddutile@redhat.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/qib/qib.h            |  3 +--
 drivers/infiniband/hw/qib/qib_file_ops.c   | 10 +++++++---
 drivers/infiniband/hw/qib/qib_user_pages.c | 20 ++++++++++++--------
 3 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h
index 7df16f74bb458..c6c75b99cf2c4 100644
--- a/drivers/infiniband/hw/qib/qib.h
+++ b/drivers/infiniband/hw/qib/qib.h
@@ -1451,8 +1451,7 @@ u64 qib_sps_ints(void);
 /*
  * dma_addr wrappers - all 0's invalid for hw
  */
-dma_addr_t qib_map_page(struct pci_dev *, struct page *, unsigned long,
-			  size_t, int);
+int qib_map_page(struct pci_dev *d, struct page *p, dma_addr_t *daddr);
 const char *qib_get_unit_name(int unit);
 
 /*
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c
index 24f4a782e0f43..5908fd3af00d7 100644
--- a/drivers/infiniband/hw/qib/qib_file_ops.c
+++ b/drivers/infiniband/hw/qib/qib_file_ops.c
@@ -364,6 +364,8 @@ static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
 		goto done;
 	}
 	for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
+		dma_addr_t daddr;
+
 		for (; ntids--; tid++) {
 			if (tid == tidcnt)
 				tid = 0;
@@ -380,12 +382,14 @@ static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
 			ret = -ENOMEM;
 			break;
 		}
+		ret = qib_map_page(dd->pcidev, pagep[i], &daddr);
+		if (ret)
+			break;
+
 		tidlist[i] = tid + tidoff;
 		/* we "know" system pages and TID pages are same size */
 		dd->pageshadow[ctxttid + tid] = pagep[i];
-		dd->physshadow[ctxttid + tid] =
-			qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
-				     PCI_DMA_FROMDEVICE);
+		dd->physshadow[ctxttid + tid] = daddr;
 		/*
 		 * don't need atomic or it's overhead
 		 */
diff --git a/drivers/infiniband/hw/qib/qib_user_pages.c b/drivers/infiniband/hw/qib/qib_user_pages.c
index 74f90b2619f6f..ab1588ae1c855 100644
--- a/drivers/infiniband/hw/qib/qib_user_pages.c
+++ b/drivers/infiniband/hw/qib/qib_user_pages.c
@@ -98,23 +98,27 @@ static int __qib_get_user_pages(unsigned long start_page, size_t num_pages,
  *
  * I'm sure we won't be so lucky with other iommu's, so FIXME.
  */
-dma_addr_t qib_map_page(struct pci_dev *hwdev, struct page *page,
-			unsigned long offset, size_t size, int direction)
+int qib_map_page(struct pci_dev *hwdev, struct page *page, dma_addr_t *daddr)
 {
 	dma_addr_t phys;
 
-	phys = pci_map_page(hwdev, page, offset, size, direction);
+	phys = pci_map_page(hwdev, page, 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
+	if (pci_dma_mapping_error(hwdev, phys))
+		return -ENOMEM;
 
-	if (phys == 0) {
-		pci_unmap_page(hwdev, phys, size, direction);
-		phys = pci_map_page(hwdev, page, offset, size, direction);
+	if (!phys) {
+		pci_unmap_page(hwdev, phys, PAGE_SIZE, PCI_DMA_FROMDEVICE);
+		phys = pci_map_page(hwdev, page, 0, PAGE_SIZE,
+				    PCI_DMA_FROMDEVICE);
+		if (pci_dma_mapping_error(hwdev, phys))
+			return -ENOMEM;
 		/*
 		 * FIXME: If we get 0 again, we should keep this page,
 		 * map another, then free the 0 page.
 		 */
 	}
-
-	return phys;
+	*daddr = phys;
+	return 0;
 }
 
 /**

From 8651158b2c5d122c45eacea7b7f5dcbca7f4670d Mon Sep 17 00:00:00 2001
From: Leon Romanovsky <leonro@mellanox.com>
Date: Tue, 29 May 2018 14:56:14 +0300
Subject: [PATCH 0800/1852] RDMA/mlx4: Discard unknown SQP work requests

commit 6b1ca7ece15e94251d1d0d919f813943e4a58059 upstream.

There is no need to crash the machine if unknown work request was
received in SQP MAD.

Cc: <stable@vger.kernel.org> # 3.6
Fixes: 37bfc7c1e83f ("IB/mlx4: SR-IOV multiplex and demultiplex MADs")
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/mlx4/mad.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c
index d862b9b7910e4..199a9cdd0d12a 100644
--- a/drivers/infiniband/hw/mlx4/mad.c
+++ b/drivers/infiniband/hw/mlx4/mad.c
@@ -1780,7 +1780,6 @@ static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
 					       "buf:%lld\n", wc.wr_id);
 				break;
 			default:
-				BUG_ON(1);
 				break;
 			}
 		} else  {

From 6c89a38b866ac335aa492324c59818eb21ad415f Mon Sep 17 00:00:00 2001
From: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Date: Wed, 30 May 2018 18:32:26 +0900
Subject: [PATCH 0801/1852] mtd: cfi_cmdset_0002: Change write buffer to check
 correct value

commit dfeae1073583dc35c33b32150e18b7048bbb37e6 upstream.

For the word write it is checked if the chip has the correct value.
But it is not checked for the write buffer as only checked if ready.
To make sure for the write buffer change to check the value.

It is enough as this patch is only checking the last written word.
Since it is described by data sheets to check the operation status.

Signed-off-by: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: linux-mtd@lists.infradead.org
Cc: stable@vger.kernel.org
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 31448a2b39ae8..2e94c02d52111 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1878,7 +1878,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
 		if (time_after(jiffies, timeo) && !chip_ready(map, adr))
 			break;
 
-		if (chip_ready(map, adr)) {
+		if (chip_good(map, adr, datum)) {
 			xip_enable(map, chip, adr);
 			goto op_done;
 		}

From 7b42a6adbae57baa27537f0d8ec32d5e6d25b718 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Date: Wed, 6 Jun 2018 12:13:27 +0200
Subject: [PATCH 0802/1852] mtd: cfi_cmdset_0002: Use right chip in
 do_ppb_xxlock()

commit f93aa8c4de307069c270b2d81741961162bead6c upstream.

do_ppb_xxlock() fails to add chip->start when querying for lock status
(and chip_ready test), which caused false status reports.
Fix that by adding adr += chip->start and adjust call sites
accordingly.

Fixes: 1648eaaa1575 ("mtd: cfi_cmdset_0002: Support Persistent Protection Bits (PPB) locking")
Cc: stable@vger.kernel.org
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 2e94c02d52111..45e8bedf69847 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2551,8 +2551,9 @@ static int __maybe_unused do_ppb_xxlock(struct map_info *map,
 	unsigned long timeo;
 	int ret;
 
+	adr += chip->start;
 	mutex_lock(&chip->mutex);
-	ret = get_chip(map, chip, adr + chip->start, FL_LOCKING);
+	ret = get_chip(map, chip, adr, FL_LOCKING);
 	if (ret) {
 		mutex_unlock(&chip->mutex);
 		return ret;
@@ -2570,8 +2571,8 @@ static int __maybe_unused do_ppb_xxlock(struct map_info *map,
 
 	if (thunk == DO_XXLOCK_ONEBLOCK_LOCK) {
 		chip->state = FL_LOCKING;
-		map_write(map, CMD(0xA0), chip->start + adr);
-		map_write(map, CMD(0x00), chip->start + adr);
+		map_write(map, CMD(0xA0), adr);
+		map_write(map, CMD(0x00), adr);
 	} else if (thunk == DO_XXLOCK_ONEBLOCK_UNLOCK) {
 		/*
 		 * Unlocking of one specific sector is not supported, so we
@@ -2609,7 +2610,7 @@ static int __maybe_unused do_ppb_xxlock(struct map_info *map,
 	map_write(map, CMD(0x00), chip->start);
 
 	chip->state = FL_READY;
-	put_chip(map, chip, adr + chip->start);
+	put_chip(map, chip, adr);
 	mutex_unlock(&chip->mutex);
 
 	return ret;

From ea9bbb80e188c89aeb5870603117dfc5fda3613c Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Date: Wed, 6 Jun 2018 12:13:28 +0200
Subject: [PATCH 0803/1852] mtd: cfi_cmdset_0002: fix SEGV unlocking multiple
 chips

commit 5fdfc3dbad099281bf027a353d5786c09408a8e5 upstream.

cfi_ppb_unlock() tries to relock all sectors that were locked before
unlocking the whole chip.
This locking used the chip start address + the FULL offset from the
first flash chip, thereby forming an illegal address. Fix that by using
the chip offset(adr).

Fixes: 1648eaaa1575 ("mtd: cfi_cmdset_0002: Support Persistent Protection Bits (PPB) locking")
Cc: stable@vger.kernel.org
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 45e8bedf69847..9b5cada414fec 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2533,7 +2533,7 @@ static int cfi_atmel_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 
 struct ppb_lock {
 	struct flchip *chip;
-	loff_t offset;
+	unsigned long adr;
 	int locked;
 };
 
@@ -2669,7 +2669,7 @@ static int __maybe_unused cfi_ppb_unlock(struct mtd_info *mtd, loff_t ofs,
 		 */
 		if ((adr < ofs) || (adr >= (ofs + len))) {
 			sect[sectors].chip = &cfi->chips[chipnum];
-			sect[sectors].offset = offset;
+			sect[sectors].adr = adr;
 			sect[sectors].locked = do_ppb_xxlock(
 				map, &cfi->chips[chipnum], adr, 0,
 				DO_XXLOCK_ONEBLOCK_GETLOCK);
@@ -2713,7 +2713,7 @@ static int __maybe_unused cfi_ppb_unlock(struct mtd_info *mtd, loff_t ofs,
 	 */
 	for (i = 0; i < sectors; i++) {
 		if (sect[i].locked)
-			do_ppb_xxlock(map, sect[i].chip, sect[i].offset, 0,
+			do_ppb_xxlock(map, sect[i].chip, sect[i].adr, 0,
 				      DO_XXLOCK_ONEBLOCK_LOCK);
 	}
 

From 27425ae9b32a496ec9ecd6b2ee029c176852b751 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Date: Wed, 6 Jun 2018 12:13:29 +0200
Subject: [PATCH 0804/1852] mtd: cfi_cmdset_0002: Fix unlocking requests
 crossing a chip boudary

commit 0cd8116f172eed018907303dbff5c112690eeb91 upstream.

The "sector is in requested range" test used to determine whether
sectors should be re-locked or not is done on a variable that is reset
everytime we cross a chip boundary, which can lead to some blocks being
re-locked while the caller expect them to be unlocked.
Fix the check to make sure this cannot happen.

Fixes: 1648eaaa1575 ("mtd: cfi_cmdset_0002: Support Persistent Protection Bits (PPB) locking")
Cc: stable@vger.kernel.org
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 9b5cada414fec..cfddd0f9985ac 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2667,7 +2667,7 @@ static int __maybe_unused cfi_ppb_unlock(struct mtd_info *mtd, loff_t ofs,
 		 * sectors shall be unlocked, so lets keep their locking
 		 * status at "unlocked" (locked=0) for the final re-locking.
 		 */
-		if ((adr < ofs) || (adr >= (ofs + len))) {
+		if ((offset < ofs) || (offset >= (ofs + len))) {
 			sect[sectors].chip = &cfi->chips[chipnum];
 			sect[sectors].adr = adr;
 			sect[sectors].locked = do_ppb_xxlock(

From 6e2df0da046dc860754d579d6ac55ac25e80ced6 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Date: Wed, 6 Jun 2018 12:13:30 +0200
Subject: [PATCH 0805/1852] mtd: cfi_cmdset_0002: Avoid walking all chips when
 unlocking.

commit f1ce87f6080b1dda7e7b1eda3da332add19d87b9 upstream.

cfi_ppb_unlock() walks all flash chips when unlocking sectors,
avoid walking chips unaffected by the unlock operation.

Fixes: 1648eaaa1575 ("mtd: cfi_cmdset_0002: Support Persistent Protection Bits (PPB) locking")
Cc: stable@vger.kernel.org
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index cfddd0f9985ac..c484ca8c909c7 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2683,6 +2683,8 @@ static int __maybe_unused cfi_ppb_unlock(struct mtd_info *mtd, loff_t ofs,
 			i++;
 
 		if (adr >> cfi->chipshift) {
+			if (offset >= (ofs + len))
+				break;
 			adr = 0;
 			chipnum++;
 

From 8363be0e45112cd1d1ed94d428773b512b6a68cd Mon Sep 17 00:00:00 2001
From: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Date: Sun, 3 Jun 2018 23:02:01 +0900
Subject: [PATCH 0806/1852] MIPS: BCM47XX: Enable 74K Core ExternalSync for
 PCIe erratum
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 2a027b47dba6b77ab8c8e47b589ae9bbc5ac6175 upstream.

The erratum and workaround are described by BCM5300X-ES300-RDS.pdf as
below.

  R10: PCIe Transactions Periodically Fail

    Description: The BCM5300X PCIe does not maintain transaction ordering.
                 This may cause PCIe transaction failure.
    Fix Comment: Add a dummy PCIe configuration read after a PCIe
                 configuration write to ensure PCIe configuration access
                 ordering. Set ES bit of CP0 configu7 register to enable
                 sync function so that the sync instruction is functional.
    Resolution:  hndpci.c: extpci_write_config()
                 hndmips.c: si_mips_init()
                 mipsinc.h CONF7_ES

This is fixed by the CFE MIPS bcmsi chipset driver also for BCM47XX.
Also the dummy PCIe configuration read is already implemented in the
Linux BCMA driver.

Enable ExternalSync in Config7 when CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
too so that the sync instruction is externalised.

Signed-off-by: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Reviewed-by: Paul Burton <paul.burton@mips.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/19461/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/bcm47xx/setup.c        | 6 ++++++
 arch/mips/include/asm/mipsregs.h | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 6d38948f0f1ed..4ca33175ec059 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -249,6 +249,12 @@ static int __init bcm47xx_cpu_fixes(void)
 		 */
 		if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
 			cpu_wait = NULL;
+
+		/*
+		 * BCM47XX Erratum "R10: PCIe Transactions Periodically Fail"
+		 * Enable ExternalSync for sync instruction to take effect
+		 */
+		set_c0_config7(MIPS_CONF7_ES);
 		break;
 #endif
 	}
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index c785da1d86607..202159557e4b4 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -606,6 +606,8 @@
 #define MIPS_CONF7_WII		(_ULCAST_(1) << 31)
 
 #define MIPS_CONF7_RPS		(_ULCAST_(1) << 2)
+/* ExternalSync */
+#define MIPS_CONF7_ES		(_ULCAST_(1) << 8)
 
 #define MIPS_CONF7_IAR		(_ULCAST_(1) << 10)
 #define MIPS_CONF7_AR		(_ULCAST_(1) << 16)
@@ -2013,6 +2015,7 @@ __BUILD_SET_C0(status)
 __BUILD_SET_C0(cause)
 __BUILD_SET_C0(config)
 __BUILD_SET_C0(config5)
+__BUILD_SET_C0(config7)
 __BUILD_SET_C0(intcontrol)
 __BUILD_SET_C0(intctl)
 __BUILD_SET_C0(srsmap)

From 07147f5f7db95a6fb0c7e119014afa00ded5f5cf Mon Sep 17 00:00:00 2001
From: Mika Westerberg <mika.westerberg@linux.intel.com>
Date: Wed, 23 May 2018 17:14:39 -0500
Subject: [PATCH 0807/1852] PCI: pciehp: Clear Presence Detect and Data Link
 Layer Status Changed on resume

commit 13c65840feab8109194f9490c9870587173cb29d upstream.

After a suspend/resume cycle the Presence Detect or Data Link Layer Status
Changed bits might be set.  If we don't clear them those events will not
fire anymore and nothing happens for instance when a device is now
hot-unplugged.

Fix this by clearing those bits in a newly introduced function
pcie_reenable_notification().  This should be fine because immediately
after, we check if the adapter is still present by reading directly from
the status register.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/hotplug/pciehp.h      |  2 +-
 drivers/pci/hotplug/pciehp_core.c |  2 +-
 drivers/pci/hotplug/pciehp_hpc.c  | 13 ++++++++++++-
 3 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 62d6fe6c37145..cbe58480b4745 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -134,7 +134,7 @@ struct controller *pcie_init(struct pcie_device *dev);
 int pcie_init_notification(struct controller *ctrl);
 int pciehp_enable_slot(struct slot *p_slot);
 int pciehp_disable_slot(struct slot *p_slot);
-void pcie_enable_notification(struct controller *ctrl);
+void pcie_reenable_notification(struct controller *ctrl);
 int pciehp_power_on_slot(struct slot *slot);
 void pciehp_power_off_slot(struct slot *slot);
 void pciehp_get_power_status(struct slot *slot, u8 *status);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 612b21a14df59..8f6ded43760a7 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -295,7 +295,7 @@ static int pciehp_resume(struct pcie_device *dev)
 	ctrl = get_service_data(dev);
 
 	/* reinitialize the chipset's event detection logic */
-	pcie_enable_notification(ctrl);
+	pcie_reenable_notification(ctrl);
 
 	slot = ctrl->slot;
 
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 5c24e938042fd..63c6c7fce3ebb 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -628,7 +628,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-void pcie_enable_notification(struct controller *ctrl)
+static void pcie_enable_notification(struct controller *ctrl)
 {
 	u16 cmd, mask;
 
@@ -666,6 +666,17 @@ void pcie_enable_notification(struct controller *ctrl)
 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);
 }
 
+void pcie_reenable_notification(struct controller *ctrl)
+{
+	/*
+	 * Clear both Presence and Data Link Layer Changed to make sure
+	 * those events still fire after we have re-enabled them.
+	 */
+	pcie_capability_write_word(ctrl->pcie->port, PCI_EXP_SLTSTA,
+				   PCI_EXP_SLTSTA_PDC | PCI_EXP_SLTSTA_DLLSC);
+	pcie_enable_notification(ctrl);
+}
+
 static void pcie_disable_notification(struct controller *ctrl)
 {
 	u16 mask;

From 6f9a1a0bd06783cdab86b7e74f332fc802cdfc17 Mon Sep 17 00:00:00 2001
From: Huacai Chen <chenhc@lemote.com>
Date: Tue, 12 Jun 2018 17:54:42 +0800
Subject: [PATCH 0808/1852] MIPS: io: Add barrier after register read in inX()

commit 18f3e95b90b28318ef35910d21c39908de672331 upstream.

While a barrier is present in the outX() functions before the register
write, a similar barrier is missing in the inX() functions after the
register read. This could allow memory accesses following inX() to
observe stale data.

This patch is very similar to commit a1cc7034e33d12dc1 ("MIPS: io: Add
barrier after register read in readX()"). Because war_io_reorder_wmb()
is both used by writeX() and outX(), if readX() need a barrier then so
does inX().

Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Patchwork: https://patchwork.linux-mips.org/patch/19516/
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: James Hogan <james.hogan@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/include/asm/io.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index d10fd80dbb7e9..75fa296836fc4 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -411,6 +411,8 @@ static inline type pfx##in##bwlq##p(unsigned long port)			\
 	__val = *__addr;						\
 	slow;								\
 									\
+	/* prevent prefetching of coherent DMA data prematurely */	\
+	rmb();								\
 	return pfx##ioswab##bwlq(__addr, __val);			\
 }
 

From a00df24d0a6da42e544905eabaf367669f1a87b3 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: Fri, 22 Jun 2018 16:33:57 +0200
Subject: [PATCH 0809/1852] time: Make sure jiffies_to_msecs() preserves
 non-zero time periods
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit abcbcb80cd09cd40f2089d912764e315459b71f7 upstream.

For the common cases where 1000 is a multiple of HZ, or HZ is a multiple of
1000, jiffies_to_msecs() never returns zero when passed a non-zero time
period.

However, if HZ > 1000 and not an integer multiple of 1000 (e.g. 1024 or
1200, as used on alpha and DECstation), jiffies_to_msecs() may return zero
for small non-zero time periods.  This may break code that relies on
receiving back a non-zero value.

jiffies_to_usecs() does not need such a fix: one jiffy can only be less
than one µs if HZ > 1000000, and such large values of HZ are already
rejected at build time, twice:

  - include/linux/jiffies.h does #error if HZ >= 12288,
  - kernel/time/time.c has BUILD_BUG_ON(HZ > USEC_PER_SEC).

Broken since forever.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-alpha@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180622143357.7495-1-geert@linux-m68k.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/time/time.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/kernel/time/time.c b/kernel/time/time.c
index 86751c68e08d8..de70ac1f84d0a 100644
--- a/kernel/time/time.c
+++ b/kernel/time/time.c
@@ -28,6 +28,7 @@
  */
 
 #include <linux/export.h>
+#include <linux/kernel.h>
 #include <linux/timex.h>
 #include <linux/capability.h>
 #include <linux/timekeeper_internal.h>
@@ -258,9 +259,10 @@ unsigned int jiffies_to_msecs(const unsigned long j)
 	return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
 #else
 # if BITS_PER_LONG == 32
-	return (HZ_TO_MSEC_MUL32 * j) >> HZ_TO_MSEC_SHR32;
+	return (HZ_TO_MSEC_MUL32 * j + (1ULL << HZ_TO_MSEC_SHR32) - 1) >>
+	       HZ_TO_MSEC_SHR32;
 # else
-	return (j * HZ_TO_MSEC_NUM) / HZ_TO_MSEC_DEN;
+	return DIV_ROUND_UP(j * HZ_TO_MSEC_NUM, HZ_TO_MSEC_DEN);
 # endif
 #endif
 }

From cfadba7e5111b01dcc1b63bd2f2e9e5d1f81ada3 Mon Sep 17 00:00:00 2001
From: Omar Sandoval <osandov@fb.com>
Date: Tue, 22 May 2018 15:02:12 -0700
Subject: [PATCH 0810/1852] Btrfs: fix clone vs chattr NODATASUM race

commit b5c40d598f5408bd0ca22dfffa82f03cd9433f23 upstream.

In btrfs_clone_files(), we must check the NODATASUM flag while the
inodes are locked. Otherwise, it's possible that btrfs_ioctl_setflags()
will change the flags after we check and we can end up with a party
checksummed file.

The race window is only a few instructions in size, between the if and
the locks which is:

3834         if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode))
3835                 return -EISDIR;

where the setflags must be run and toggle the NODATASUM flag (provided
the file size is 0).  The clone will block on the inode lock, segflags
takes the inode lock, changes flags, releases log and clone continues.

Not impossible but still needs a lot of bad luck to hit unintentionally.

Fixes: 0e7b824c4ef9 ("Btrfs: don't make a file partly checksummed through file clone")
CC: stable@vger.kernel.org # 4.4+
Signed-off-by: Omar Sandoval <osandov@fb.com>
Reviewed-by: Nikolay Borisov <nborisov@suse.com>
Reviewed-by: David Sterba <dsterba@suse.com>
[ update changelog ]
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ adjusted for 4.4 ]
Signed-off-by: Nikolay Borisov <nborisov@suse.com>
---
 fs/btrfs/ioctl.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index 4e3c889c18766..6caeb946fc1d1 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -3923,11 +3923,6 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd,
 	if (!(src_file.file->f_mode & FMODE_READ))
 		goto out_fput;
 
-	/* don't make the dst file partly checksummed */
-	if ((BTRFS_I(src)->flags & BTRFS_INODE_NODATASUM) !=
-	    (BTRFS_I(inode)->flags & BTRFS_INODE_NODATASUM))
-		goto out_fput;
-
 	ret = -EISDIR;
 	if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode))
 		goto out_fput;
@@ -3942,6 +3937,13 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd,
 		mutex_lock(&src->i_mutex);
 	}
 
+	/* don't make the dst file partly checksummed */
+	if ((BTRFS_I(src)->flags & BTRFS_INODE_NODATASUM) !=
+	    (BTRFS_I(inode)->flags & BTRFS_INODE_NODATASUM)) {
+		ret = -EINVAL;
+		goto out_unlock;
+	}
+
 	/* determine range to clone */
 	ret = -EINVAL;
 	if (off + len > src->i_size || off + len < off)

From 0f0a527887e310bb54ef3e91973ad85f34992346 Mon Sep 17 00:00:00 2001
From: Martin Kelly <mkelly@xevo.com>
Date: Mon, 26 Mar 2018 14:27:51 -0700
Subject: [PATCH 0811/1852] iio:buffer: make length types match kfifo types

commit c043ec1ca5baae63726aae32abbe003192bc6eec upstream.

Currently, we use int for buffer length and bytes_per_datum. However,
kfifo uses unsigned int for length and size_t for element size. We need
to make sure these matches or we will have bugs related to overflow (in
the range between INT_MAX and UINT_MAX for length, for example).

In addition, set_bytes_per_datum uses size_t while bytes_per_datum is an
int, which would cause bugs for large values of bytes_per_datum.

Change buffer length to use unsigned int and bytes_per_datum to use
size_t.

Signed-off-by: Martin Kelly <mkelly@xevo.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
[bwh: Backported to 4.4:
 - Drop change to iio_dma_buffer_set_length()
 - Adjust filename, context]
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/iio/buffer/kfifo_buf.c | 4 ++--
 include/linux/iio/buffer.h     | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/iio/buffer/kfifo_buf.c b/drivers/iio/buffer/kfifo_buf.c
index 7ef9b13262a80..e44181f9eb367 100644
--- a/drivers/iio/buffer/kfifo_buf.c
+++ b/drivers/iio/buffer/kfifo_buf.c
@@ -19,7 +19,7 @@ struct iio_kfifo {
 #define iio_to_kfifo(r) container_of(r, struct iio_kfifo, buffer)
 
 static inline int __iio_allocate_kfifo(struct iio_kfifo *buf,
-				int bytes_per_datum, int length)
+			size_t bytes_per_datum, unsigned int length)
 {
 	if ((length == 0) || (bytes_per_datum == 0))
 		return -EINVAL;
@@ -71,7 +71,7 @@ static int iio_set_bytes_per_datum_kfifo(struct iio_buffer *r, size_t bpd)
 	return 0;
 }
 
-static int iio_set_length_kfifo(struct iio_buffer *r, int length)
+static int iio_set_length_kfifo(struct iio_buffer *r, unsigned int length)
 {
 	/* Avoid an invalid state */
 	if (length < 2)
diff --git a/include/linux/iio/buffer.h b/include/linux/iio/buffer.h
index 1600c55828e0f..93a774ce49224 100644
--- a/include/linux/iio/buffer.h
+++ b/include/linux/iio/buffer.h
@@ -49,7 +49,7 @@ struct iio_buffer_access_funcs {
 	int (*request_update)(struct iio_buffer *buffer);
 
 	int (*set_bytes_per_datum)(struct iio_buffer *buffer, size_t bpd);
-	int (*set_length)(struct iio_buffer *buffer, int length);
+	int (*set_length)(struct iio_buffer *buffer, unsigned int length);
 
 	void (*release)(struct iio_buffer *buffer);
 
@@ -78,8 +78,8 @@ struct iio_buffer_access_funcs {
  * @watermark:		[INTERN] number of datums to wait for poll/read.
  */
 struct iio_buffer {
-	int					length;
-	int					bytes_per_datum;
+	unsigned int				length;
+	size_t					bytes_per_datum;
 	struct attribute_group			*scan_el_attrs;
 	long					*scan_mask;
 	bool					scan_timestamp;

From 5d8c3cfa77e337b982e322bf3d7e4dfb54f4793b Mon Sep 17 00:00:00 2001
From: Himanshu Madhani <himanshu.madhani@cavium.com>
Date: Sun, 3 Jun 2018 22:09:53 -0700
Subject: [PATCH 0812/1852] scsi: qla2xxx: Fix setting lower transfer speed if
 GPSC fails

commit 413c2f33489b134e3cc65d9c3ff7861e8fdfe899 upstream.

This patch prevents driver from setting lower default speed of 1 GB/sec,
if the switch does not support Get Port Speed Capabilities (GPSC)
command. Setting this default speed results into much lower write
performance for large sequential WRITE.  This patch modifies driver to
check for gpsc_supported flags and prevents driver from issuing
MBC_SET_PORT_PARAM (001Ah) to set default speed of 1 GB/sec. If driver
does not send this mailbox command, firmware assumes maximum supported
link speed and will operate at the max speed.

Cc: stable@vger.kernel.org
Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com>
Reported-by: Eda Zhou <ezhou@redhat.com>
Reviewed-by: Ewan D. Milne <emilne@redhat.com>
Tested-by: Ewan D. Milne <emilne@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/qla2xxx/qla_init.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index aa18c729d23a7..a9eb3cd453be6 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -3261,7 +3261,8 @@ qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
 		return;
 
 	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
-	    fcport->fp_speed > ha->link_data_rate)
+	    fcport->fp_speed > ha->link_data_rate ||
+	    !ha->flags.gpsc_supported)
 		return;
 
 	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,

From c51b19940c77ed16d23e582283b1c297ed26856b Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:43 +0200
Subject: [PATCH 0813/1852] scsi: zfcp: fix missing SCSI trace for result of
 eh_host_reset_handler

commit df30781699f53e4fd4c494c6f7dd16e3d5c21d30 upstream.

For problem determination we need to see whether and why we were successful
or not. This allows deduction of scsi_eh escalation.

Example trace record formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : SCSI
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1
Tag            : schrh_r        SCSI host reset handler result
Request ID     : 0x0000000000000000                     none (invalid)
SCSI ID        : 0xffffffff                             none (invalid)
SCSI LUN       : 0xffffffff                             none (invalid)
SCSI LUN high  : 0xffffffff                             none (invalid)
SCSI result    : 0x00002002     field re-used for midlayer value: SUCCESS
                                or in other cases: 0x2009 == FAST_IO_FAIL
SCSI retries   : 0xff                                   none (invalid)
SCSI allowed   : 0xff                                   none (invalid)
SCSI scribble  : 0xffffffffffffffff                     none (invalid)
SCSI opcode    : ffffffff ffffffff ffffffff ffffffff    none (invalid)
FCP rsp inf cod: 0xff                                   none (invalid)
FCP rsp IU     : 00000000 00000000 00000000 00000000    none (invalid)
                 00000000 00000000

v2.6.35 commit a1dbfddd02d2 ("[SCSI] zfcp: Pass return code from
fc_block_scsi_eh to scsi eh") introduced the first return with something
other than the previously hardcoded single SUCCESS return path.

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Fixes: a1dbfddd02d2 ("[SCSI] zfcp: Pass return code from fc_block_scsi_eh to scsi eh")
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_dbf.c  | 40 +++++++++++++++++++++++++++++++++++
 drivers/s390/scsi/zfcp_ext.h  |  2 ++
 drivers/s390/scsi/zfcp_scsi.c | 11 +++++-----
 3 files changed, 48 insertions(+), 5 deletions(-)

diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index 4534a7ce77b82..b6caad0fee24c 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -625,6 +625,46 @@ void zfcp_dbf_scsi(char *tag, int level, struct scsi_cmnd *sc,
 	spin_unlock_irqrestore(&dbf->scsi_lock, flags);
 }
 
+/**
+ * zfcp_dbf_scsi_eh() - Trace event for special cases of scsi_eh callbacks.
+ * @tag: Identifier for event.
+ * @adapter: Pointer to zfcp adapter as context for this event.
+ * @scsi_id: SCSI ID/target to indicate scope of task management function (TMF).
+ * @ret: Return value of calling function.
+ *
+ * This SCSI trace variant does not depend on any of:
+ * scsi_cmnd, zfcp_fsf_req, scsi_device.
+ */
+void zfcp_dbf_scsi_eh(char *tag, struct zfcp_adapter *adapter,
+		      unsigned int scsi_id, int ret)
+{
+	struct zfcp_dbf *dbf = adapter->dbf;
+	struct zfcp_dbf_scsi *rec = &dbf->scsi_buf;
+	unsigned long flags;
+	static int const level = 1;
+
+	if (unlikely(!debug_level_enabled(adapter->dbf->scsi, level)))
+		return;
+
+	spin_lock_irqsave(&dbf->scsi_lock, flags);
+	memset(rec, 0, sizeof(*rec));
+
+	memcpy(rec->tag, tag, ZFCP_DBF_TAG_LEN);
+	rec->id = ZFCP_DBF_SCSI_CMND;
+	rec->scsi_result = ret; /* re-use field, int is 4 bytes and fits */
+	rec->scsi_retries = ~0;
+	rec->scsi_allowed = ~0;
+	rec->fcp_rsp_info = ~0;
+	rec->scsi_id = scsi_id;
+	rec->scsi_lun = (u32)ZFCP_DBF_INVALID_LUN;
+	rec->scsi_lun_64_hi = (u32)(ZFCP_DBF_INVALID_LUN >> 32);
+	rec->host_scribble = ~0;
+	memset(rec->scsi_opcode, 0xff, ZFCP_DBF_SCSI_OPCODE);
+
+	debug_event(dbf->scsi, level, rec, sizeof(*rec));
+	spin_unlock_irqrestore(&dbf->scsi_lock, flags);
+}
+
 static debug_info_t *zfcp_dbf_reg(const char *name, int size, int rec_size)
 {
 	struct debug_info *d;
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 7a7984a50683e..7eaa2e13721ff 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -52,6 +52,8 @@ extern void zfcp_dbf_san_res(char *, struct zfcp_fsf_req *);
 extern void zfcp_dbf_san_in_els(char *, struct zfcp_fsf_req *);
 extern void zfcp_dbf_scsi(char *, int, struct scsi_cmnd *,
 			  struct zfcp_fsf_req *);
+extern void zfcp_dbf_scsi_eh(char *tag, struct zfcp_adapter *adapter,
+			     unsigned int scsi_id, int ret);
 
 /* zfcp_erp.c */
 extern void zfcp_erp_set_adapter_status(struct zfcp_adapter *, u32);
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index bb99db2948ab2..fbabf7e15cb70 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -322,15 +322,16 @@ static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *scpnt)
 {
 	struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(scpnt->device);
 	struct zfcp_adapter *adapter = zfcp_sdev->port->adapter;
-	int ret;
+	int ret = SUCCESS, fc_ret;
 
 	zfcp_erp_adapter_reopen(adapter, 0, "schrh_1");
 	zfcp_erp_wait(adapter);
-	ret = fc_block_scsi_eh(scpnt);
-	if (ret)
-		return ret;
+	fc_ret = fc_block_scsi_eh(scpnt);
+	if (fc_ret)
+		ret = fc_ret;
 
-	return SUCCESS;
+	zfcp_dbf_scsi_eh("schrh_r", adapter, ~0, ret);
+	return ret;
 }
 
 struct scsi_transport_template *zfcp_scsi_transport_template;

From ed1873df749e12231c9777fd0c9c20c6faa0c111 Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:44 +0200
Subject: [PATCH 0814/1852] scsi: zfcp: fix missing SCSI trace for retry of
 abort / scsi_eh TMF

commit 81979ae63e872ef650a7197f6ce6590059d37172 upstream.

We already have a SCSI trace for the end of abort and scsi_eh TMF. Due to
zfcp_erp_wait() and fc_block_scsi_eh() time can pass between the start of
our eh callback and an actual send/recv of an abort / TMF request.  In order
to see the temporal sequence including any abort / TMF send retries, add a
trace before the above two blocking functions.  This supports problem
determination with scsi_eh and parallel zfcp ERP.

No need to explicitly trace the beginning of our eh callback, since we
typically can send an abort / TMF and see its HBA response (in the worst
case, it's a pseudo response on dismiss all of adapter recovery, e.g. due to
an FSF request timeout [fsrth_1] of the abort / TMF). If we cannot send, we
now get a trace record for the first "abrt_wt" or "[lt]r_wait" which denotes
almost the beginning of the callback.

No need to explicitly trace the wakeup after the above two blocking
functions because the next retry loop causes another trace in any case and
that is sufficient.

Example trace records formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : SCSI
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1
Tag            : abrt_wt        abort, before zfcp_erp_wait()
Request ID     : 0x0000000000000000                     none (invalid)
SCSI ID        : 0x<scsi_id>
SCSI LUN       : 0x<scsi_lun>
SCSI LUN high  : 0x<scsi_lun_high>
SCSI result    : 0x<scsi_result_of_cmd_to_be_aborted>
SCSI retries   : 0x<retries_of_cmd_to_be_aborted>
SCSI allowed   : 0x<allowed_retries_of_cmd_to_be_aborted>
SCSI scribble  : 0x<req_id_of_cmd_to_be_aborted>
SCSI opcode    : <CDB_of_cmd_to_be_aborted>
FCP rsp inf cod: 0x..                                   none (invalid)
FCP rsp IU     : ...                                    none (invalid)

Timestamp      : ...
Area           : SCSI
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1
Tag            : lr_wait        LUN reset, before zfcp_erp_wait()
Request ID     : 0x0000000000000000                     none (invalid)
SCSI ID        : 0x<scsi_id>
SCSI LUN       : 0x<scsi_lun>
SCSI LUN high  : 0x<scsi_lun_high>
SCSI result    : 0x...                                  unrelated
SCSI retries   : 0x..                                   unrelated
SCSI allowed   : 0x..                                   unrelated
SCSI scribble  : 0x...                                  unrelated
SCSI opcode    : ...                                    unrelated
FCP rsp inf cod: 0x..                                   none (invalid)
FCP rsp IU     : ...                                    none (invalid)

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Fixes: 63caf367e1c9 ("[SCSI] zfcp: Improve reliability of SCSI eh handlers in zfcp")
Fixes: af4de36d911a ("[SCSI] zfcp: Block scsi_eh thread for rport state BLOCKED")
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_scsi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index fbabf7e15cb70..e7a36109c79c6 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -180,6 +180,7 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
 		if (abrt_req)
 			break;
 
+		zfcp_dbf_scsi_abort("abrt_wt", scpnt, NULL);
 		zfcp_erp_wait(adapter);
 		ret = fc_block_scsi_eh(scpnt);
 		if (ret) {
@@ -276,6 +277,7 @@ static int zfcp_task_mgmt_function(struct scsi_cmnd *scpnt, u8 tm_flags)
 		if (fsf_req)
 			break;
 
+		zfcp_dbf_scsi_devreset("wait", scpnt, tm_flags, NULL);
 		zfcp_erp_wait(adapter);
 		ret = fc_block_scsi_eh(scpnt);
 		if (ret) {

From b80eddf6b3dfaaf03cc691ba4a375dabf7b0afa6 Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:45 +0200
Subject: [PATCH 0815/1852] scsi: zfcp: fix misleading REC trigger trace where
 erp_action setup failed

commit 512857a795cbbda5980efa4cdb3c0b6602330408 upstream.

If a SCSI device is deleted during scsi_eh host reset, we cannot get a
reference to the SCSI device anymore since scsi_device_get returns !=0 by
design. Assuming the recovery of adapter and port(s) was successful,
zfcp_erp_strategy_followup_success() attempts to trigger a LUN reset for the
half-gone SCSI device. Unfortunately, it causes the following confusing
trace record which states that zfcp will do a LUN recovery as "ERP need" is
ZFCP_ERP_ACTION_REOPEN_LUN == 1 and equals "ERP want".

Old example trace record formatted with zfcpdbf from s390-tools:

Tag:           : ersfs_3 ERP, trigger, unit reopen, port reopen succeeded
LUN            : 0x<FCP_LUN>
WWPN           : 0x<WWPN>
D_ID           : 0x<N_Port-ID>
Adapter status : 0x5400050b
Port status    : 0x54000001
LUN status     : 0x40000000     ZFCP_STATUS_COMMON_RUNNING
                                but not ZFCP_STATUS_COMMON_UNBLOCKED as it
                                was closed on close part of adapter reopen
ERP want       : 0x01
ERP need       : 0x01           misleading

However, zfcp_erp_setup_act() returns NULL as it cannot get the reference.
Hence, zfcp_erp_action_enqueue() takes an early goto out and _NO_ recovery
actually happens.

We always do want the recovery trigger trace record even if no erp_action
could be enqueued as in this case. For other cases where we did not enqueue
an erp_action, 'need' has always been zero to indicate this. In order to
indicate above goto out, introduce an eyecatcher "flag" to mark the "ERP
need" as 'not needed' but still keep the information which erp_action type,
that zfcp_erp_required_act() had decided upon, is needed.  0xc_ is chosen to
be visibly different from 0x0_ in "ERP want".

New example trace record formatted with zfcpdbf from s390-tools:

Tag:           : ersfs_3 ERP, trigger, unit reopen, port reopen succeeded
LUN            : 0x<FCP_LUN>
WWPN           : 0x<WWPN>
D_ID           : 0x<N_Port-ID>
Adapter status : 0x5400050b
Port status    : 0x54000001
LUN status     : 0x40000000
ERP want       : 0x01
ERP need       : 0xc1           would need LUN ERP, but no action set up
                   ^

Before v2.6.38 commit ae0904f60fab ("[SCSI] zfcp: Redesign of the debug
tracing for recovery actions.") we could detect this case because the
"erp_action" field in the trace was NULL. The rework removed erp_action as
argument and field from the trace.

This patch here is for tracing. A fix to allow LUN recovery in the case at
hand is a topic for a separate patch.

See also commit fdbd1c5e27da ("[SCSI] zfcp: Allow running unit/LUN shutdown
without acquiring reference") for a similar case and background info.

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Fixes: ae0904f60fab ("[SCSI] zfcp: Redesign of the debug tracing for recovery actions.")
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_erp.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 3b23d67545982..ae624789a6c42 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -34,11 +34,23 @@ enum zfcp_erp_steps {
 	ZFCP_ERP_STEP_LUN_OPENING	= 0x2000,
 };
 
+/**
+ * enum zfcp_erp_act_type - Type of ERP action object.
+ * @ZFCP_ERP_ACTION_REOPEN_LUN: LUN recovery.
+ * @ZFCP_ERP_ACTION_REOPEN_PORT: Port recovery.
+ * @ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: Forced port recovery.
+ * @ZFCP_ERP_ACTION_REOPEN_ADAPTER: Adapter recovery.
+ * @ZFCP_ERP_ACTION_NONE: Eyecatcher pseudo flag to bitwise or-combine with
+ *			  either of the other enum values.
+ *			  Used to indicate that an ERP action could not be
+ *			  set up despite a detected need for some recovery.
+ */
 enum zfcp_erp_act_type {
 	ZFCP_ERP_ACTION_REOPEN_LUN         = 1,
 	ZFCP_ERP_ACTION_REOPEN_PORT	   = 2,
 	ZFCP_ERP_ACTION_REOPEN_PORT_FORCED = 3,
 	ZFCP_ERP_ACTION_REOPEN_ADAPTER     = 4,
+	ZFCP_ERP_ACTION_NONE		   = 0xc0,
 };
 
 enum zfcp_erp_act_state {
@@ -256,8 +268,10 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
 		goto out;
 
 	act = zfcp_erp_setup_act(need, act_status, adapter, port, sdev);
-	if (!act)
+	if (!act) {
+		need |= ZFCP_ERP_ACTION_NONE; /* marker for trace */
 		goto out;
+	}
 	atomic_or(ZFCP_STATUS_ADAPTER_ERP_PENDING, &adapter->status);
 	++adapter->erp_total_count;
 	list_add_tail(&act->list, &adapter->erp_ready_head);

From 94a7f73a05a249a9b82cb5af4e0e3fd2a972c14d Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:46 +0200
Subject: [PATCH 0816/1852] scsi: zfcp: fix missing REC trigger trace on
 terminate_rport_io early return

commit 96d9270499471545048ed8a6d7f425a49762283d upstream.

get_device() and its internally used kobject_get() only return NULL if they
get passed NULL as argument. zfcp_get_port_by_wwpn() loops over
adapter->port_list so the iteration variable port is always non-NULL.
Struct device is embedded in struct zfcp_port so &port->dev is always
non-NULL. This is the argument to get_device().  However, if we get an
fc_rport in terminate_rport_io() for which we cannot find a match within
zfcp_get_port_by_wwpn(), the latter can return NULL.  v2.6.30 commit
70932935b61e ("[SCSI] zfcp: Fix oops when port disappears") introduced an
early return without adding a trace record for this case.  Even if we don't
need recovery in this case, for debugging we should still see that our
callback was invoked originally by scsi_transport_fc.

Example trace record formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : REC
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1
Tag            : sctrpin        SCSI terminate rport I/O, no zfcp port
LUN            : 0xffffffffffffffff                     none (invalid)
WWPN           : 0x<wwpn>               WWPN
D_ID           : 0x<n_port_id>          N_Port-ID
Adapter status : 0x...
Port status    : 0xffffffff             unknown (-1)
LUN status     : 0x00000000                             none (invalid)
Ready count    : 0x...
Running count  : 0x...
ERP want       : 0x03                   ZFCP_ERP_ACTION_REOPEN_PORT_FORCED
ERP need       : 0xc0                   ZFCP_ERP_ACTION_NONE

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Fixes: 70932935b61e ("[SCSI] zfcp: Fix oops when port disappears")
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_erp.c  | 20 ++++++++++++++++++++
 drivers/s390/scsi/zfcp_ext.h  |  3 +++
 drivers/s390/scsi/zfcp_scsi.c |  5 +++++
 3 files changed, 28 insertions(+)

diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index ae624789a6c42..e60c16b2ba45c 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -282,6 +282,26 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
 	return retval;
 }
 
+void zfcp_erp_port_forced_no_port_dbf(char *id, struct zfcp_adapter *adapter,
+				      u64 port_name, u32 port_id)
+{
+	unsigned long flags;
+	static /* don't waste stack */ struct zfcp_port tmpport;
+
+	write_lock_irqsave(&adapter->erp_lock, flags);
+	/* Stand-in zfcp port with fields just good enough for
+	 * zfcp_dbf_rec_trig() and zfcp_dbf_set_common().
+	 * Under lock because tmpport is static.
+	 */
+	atomic_set(&tmpport.status, -1); /* unknown */
+	tmpport.wwpn = port_name;
+	tmpport.d_id = port_id;
+	zfcp_dbf_rec_trig(id, adapter, &tmpport, NULL,
+			  ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
+			  ZFCP_ERP_ACTION_NONE);
+	write_unlock_irqrestore(&adapter->erp_lock, flags);
+}
+
 static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter,
 				    int clear_mask, char *id)
 {
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 7eaa2e13721ff..b326f05c7f89f 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -58,6 +58,9 @@ extern void zfcp_dbf_scsi_eh(char *tag, struct zfcp_adapter *adapter,
 /* zfcp_erp.c */
 extern void zfcp_erp_set_adapter_status(struct zfcp_adapter *, u32);
 extern void zfcp_erp_clear_adapter_status(struct zfcp_adapter *, u32);
+extern void zfcp_erp_port_forced_no_port_dbf(char *id,
+					     struct zfcp_adapter *adapter,
+					     u64 port_name, u32 port_id);
 extern void zfcp_erp_adapter_reopen(struct zfcp_adapter *, int, char *);
 extern void zfcp_erp_adapter_shutdown(struct zfcp_adapter *, int, char *);
 extern void zfcp_erp_set_port_status(struct zfcp_port *, u32);
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index e7a36109c79c6..3afb200b2829c 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -603,6 +603,11 @@ static void zfcp_scsi_terminate_rport_io(struct fc_rport *rport)
 	if (port) {
 		zfcp_erp_port_forced_reopen(port, 0, "sctrpi1");
 		put_device(&port->dev);
+	} else {
+		zfcp_erp_port_forced_no_port_dbf(
+			"sctrpin", adapter,
+			rport->port_name /* zfcp_scsi_rport_register */,
+			rport->port_id /* zfcp_scsi_rport_register */);
 	}
 }
 

From 43cdde00efd596380e5048a2f97cbb403f2941cc Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:47 +0200
Subject: [PATCH 0817/1852] scsi: zfcp: fix missing REC trigger trace on
 terminate_rport_io for ERP_FAILED

commit d70aab55924b44f213fec2b900b095430b33eec6 upstream.

For problem determination we always want to see when we were invoked on the
terminate_rport_io callback whether we perform something or not.

Temporal event sequence of interest with a long fast_io_fail_tmo of 27 sec:

loose remote port

t   workqueue
[s] zfcp_q_<dev>       IRQ                 zfcperp<dev>

=== ================== =================== ============================

  0                    recv RSCN
                       q p.test_link_work
    block rport
     start fast_io_fail_tmo
    send ADISC ELS
  4                    recv ADISC fail
                       block zfcp_port
                                           port forced reopen
                                           send open port
 12                    recv open port fail
                                           q p.gid_pn_work
                                           zfcp_erp_wakeup
                                           (zfcp_erp_wait would return)
    GID_PN fail

Before this point, we got a SCSI trace with tag "sctrpi1" on fast_io_fail,
e.g. with the typical 5 sec setting.

    port.status |= ERP_FAILED

If fast_io_fail_tmo triggers after this point, we missed a SCSI trace.

    workqueue
    fc_dl_<host>
    ==================
 27 fc_timeout_fail_rport_io
    fc_terminate_rport_io
    zfcp_scsi_terminate_rport_io
    zfcp_erp_port_forced_reopen
    _zfcp_erp_port_forced_reopen
     if (port.status & ERP_FAILED)
      return;

Therefore, write a trace before above early return.

Example trace record formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : REC
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1                      ZFCP_DBF_REC_TRIG
Tag            : sctrpi1                SCSI terminate rport I/O
LUN            : 0xffffffffffffffff                     none (invalid)
WWPN           : 0x<wwpn>
D_ID           : 0x<n_port_id>
Adapter status : 0x...
Port status    : 0x...
LUN status     : 0x00000000                             none (invalid)
Ready count    : 0x...
Running count  : 0x...
ERP want       : 0x03                   ZFCP_ERP_ACTION_REOPEN_PORT_FORCED
ERP need       : 0xe0                   ZFCP_ERP_ACTION_FAILED

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_erp.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index e60c16b2ba45c..e695f95ac3c2f 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -41,9 +41,13 @@ enum zfcp_erp_steps {
  * @ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: Forced port recovery.
  * @ZFCP_ERP_ACTION_REOPEN_ADAPTER: Adapter recovery.
  * @ZFCP_ERP_ACTION_NONE: Eyecatcher pseudo flag to bitwise or-combine with
- *			  either of the other enum values.
+ *			  either of the first four enum values.
  *			  Used to indicate that an ERP action could not be
  *			  set up despite a detected need for some recovery.
+ * @ZFCP_ERP_ACTION_FAILED: Eyecatcher pseudo flag to bitwise or-combine with
+ *			    either of the first four enum values.
+ *			    Used to indicate that ERP not needed because
+ *			    the object has ZFCP_STATUS_COMMON_ERP_FAILED.
  */
 enum zfcp_erp_act_type {
 	ZFCP_ERP_ACTION_REOPEN_LUN         = 1,
@@ -51,6 +55,7 @@ enum zfcp_erp_act_type {
 	ZFCP_ERP_ACTION_REOPEN_PORT_FORCED = 3,
 	ZFCP_ERP_ACTION_REOPEN_ADAPTER     = 4,
 	ZFCP_ERP_ACTION_NONE		   = 0xc0,
+	ZFCP_ERP_ACTION_FAILED		   = 0xe0,
 };
 
 enum zfcp_erp_act_state {
@@ -378,8 +383,12 @@ static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear,
 	zfcp_erp_port_block(port, clear);
 	zfcp_scsi_schedule_rport_block(port);
 
-	if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
+	if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
+		zfcp_dbf_rec_trig(id, port->adapter, port, NULL,
+				  ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
+				  ZFCP_ERP_ACTION_FAILED);
 		return;
+	}
 
 	zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
 				port->adapter, port, NULL, id, 0);

From 30fa41f73036b22fdf6f04f7eb4e40e12b6f52f5 Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:48 +0200
Subject: [PATCH 0818/1852] scsi: zfcp: fix missing REC trigger trace for all
 objects in ERP_FAILED

commit 8c3d20aada70042a39c6a6625be037c1472ca610 upstream.

That other commit introduced an inconsistency because it would trace on
ERP_FAILED for all callers of port forced reopen triggers (not just
terminate_rport_io), but it would not trace on ERP_FAILED for all callers of
other ERP triggers such as adapter, port regular, LUN.

Therefore, generalize that other commit. zfcp_erp_action_enqueue() already
had two early outs which re-used the one zfcp_dbf_rec_trig() call.  All ERP
trigger functions finally run through zfcp_erp_action_enqueue().  So move
the special handling for ZFCP_STATUS_COMMON_ERP_FAILED into
zfcp_erp_action_enqueue() and add another early out with new trace marker
for pseudo ERP need in this case. This removes all early returns from all
ERP trigger functions so we always end up at zfcp_dbf_rec_trig().

Example trace record formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : REC
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1                      ZFCP_DBF_REC_TRIG
Tag            : .......
LUN            : 0x...
WWPN           : 0x...
D_ID           : 0x...
Adapter status : 0x...
Port status    : 0x...
LUN status     : 0x...
Ready count    : 0x...
Running count  : 0x...
ERP want       : 0x0.                   ZFCP_ERP_ACTION_REOPEN_...
ERP need       : 0xe0                   ZFCP_ERP_ACTION_FAILED

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_erp.c | 79 +++++++++++++++++++++++-------------
 1 file changed, 51 insertions(+), 28 deletions(-)

diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index e695f95ac3c2f..0ac35f8e44294 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -142,6 +142,49 @@ static void zfcp_erp_action_dismiss_adapter(struct zfcp_adapter *adapter)
 	}
 }
 
+static int zfcp_erp_handle_failed(int want, struct zfcp_adapter *adapter,
+				  struct zfcp_port *port,
+				  struct scsi_device *sdev)
+{
+	int need = want;
+	struct zfcp_scsi_dev *zsdev;
+
+	switch (want) {
+	case ZFCP_ERP_ACTION_REOPEN_LUN:
+		zsdev = sdev_to_zfcp(sdev);
+		if (atomic_read(&zsdev->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
+			need = 0;
+		break;
+	case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+		if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
+			need = 0;
+		break;
+	case ZFCP_ERP_ACTION_REOPEN_PORT:
+		if (atomic_read(&port->status) &
+		    ZFCP_STATUS_COMMON_ERP_FAILED) {
+			need = 0;
+			/* ensure propagation of failed status to new devices */
+			zfcp_erp_set_port_status(
+				port, ZFCP_STATUS_COMMON_ERP_FAILED);
+		}
+		break;
+	case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+		if (atomic_read(&adapter->status) &
+		    ZFCP_STATUS_COMMON_ERP_FAILED) {
+			need = 0;
+			/* ensure propagation of failed status to new devices */
+			zfcp_erp_set_adapter_status(
+				adapter, ZFCP_STATUS_COMMON_ERP_FAILED);
+		}
+		break;
+	default:
+		need = 0;
+		break;
+	}
+
+	return need;
+}
+
 static int zfcp_erp_required_act(int want, struct zfcp_adapter *adapter,
 				 struct zfcp_port *port,
 				 struct scsi_device *sdev)
@@ -265,6 +308,12 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
 	int retval = 1, need;
 	struct zfcp_erp_action *act;
 
+	need = zfcp_erp_handle_failed(want, adapter, port, sdev);
+	if (!need) {
+		need = ZFCP_ERP_ACTION_FAILED; /* marker for trace */
+		goto out;
+	}
+
 	if (!adapter->erp_thread)
 		return -EIO;
 
@@ -313,12 +362,6 @@ static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter,
 	zfcp_erp_adapter_block(adapter, clear_mask);
 	zfcp_scsi_schedule_rports_block(adapter);
 
-	/* ensure propagation of failed status to new devices */
-	if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
-		zfcp_erp_set_adapter_status(adapter,
-					    ZFCP_STATUS_COMMON_ERP_FAILED);
-		return -EIO;
-	}
 	return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER,
 				       adapter, NULL, NULL, id, 0);
 }
@@ -337,12 +380,8 @@ void zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear, char *id)
 	zfcp_scsi_schedule_rports_block(adapter);
 
 	write_lock_irqsave(&adapter->erp_lock, flags);
-	if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
-		zfcp_erp_set_adapter_status(adapter,
-					    ZFCP_STATUS_COMMON_ERP_FAILED);
-	else
-		zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER, adapter,
-					NULL, NULL, id, 0);
+	zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER, adapter,
+				NULL, NULL, id, 0);
 	write_unlock_irqrestore(&adapter->erp_lock, flags);
 }
 
@@ -383,13 +422,6 @@ static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear,
 	zfcp_erp_port_block(port, clear);
 	zfcp_scsi_schedule_rport_block(port);
 
-	if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
-		zfcp_dbf_rec_trig(id, port->adapter, port, NULL,
-				  ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
-				  ZFCP_ERP_ACTION_FAILED);
-		return;
-	}
-
 	zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
 				port->adapter, port, NULL, id, 0);
 }
@@ -415,12 +447,6 @@ static int _zfcp_erp_port_reopen(struct zfcp_port *port, int clear, char *id)
 	zfcp_erp_port_block(port, clear);
 	zfcp_scsi_schedule_rport_block(port);
 
-	if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
-		/* ensure propagation of failed status to new devices */
-		zfcp_erp_set_port_status(port, ZFCP_STATUS_COMMON_ERP_FAILED);
-		return -EIO;
-	}
-
 	return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT,
 				       port->adapter, port, NULL, id, 0);
 }
@@ -460,9 +486,6 @@ static void _zfcp_erp_lun_reopen(struct scsi_device *sdev, int clear, char *id,
 
 	zfcp_erp_lun_block(sdev, clear);
 
-	if (atomic_read(&zfcp_sdev->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
-		return;
-
 	zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_LUN, adapter,
 				zfcp_sdev->port, sdev, id, act_status);
 }

From a6e1c6ca86359481fb7f468cf34e77d93d7b053d Mon Sep 17 00:00:00 2001
From: Steffen Maier <maier@linux.ibm.com>
Date: Thu, 17 May 2018 19:14:49 +0200
Subject: [PATCH 0819/1852] scsi: zfcp: fix missing REC trigger trace on
 enqueue without ERP thread

commit 6a76550841d412330bd86aed3238d1888ba70f0e upstream.

Example trace record formatted with zfcpdbf from s390-tools:

Timestamp      : ...
Area           : REC
Subarea        : 00
Level          : 1
Exception      : -
CPU ID         : ..
Caller         : 0x...
Record ID      : 1                      ZFCP_DBF_REC_TRIG
Tag            : .......
LUN            : 0x...
WWPN           : 0x...
D_ID           : 0x...
Adapter status : 0x...
Port status    : 0x...
LUN status     : 0x...
Ready count    : 0x...
Running count  : 0x...
ERP want       : 0x0.                   ZFCP_ERP_ACTION_REOPEN_...
ERP need       : 0xc0                   ZFCP_ERP_ACTION_NONE

Signed-off-by: Steffen Maier <maier@linux.ibm.com>
Cc: <stable@vger.kernel.org> #2.6.38+
Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/s390/scsi/zfcp_erp.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 0ac35f8e44294..2abcd331b05d3 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -314,8 +314,11 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
 		goto out;
 	}
 
-	if (!adapter->erp_thread)
-		return -EIO;
+	if (!adapter->erp_thread) {
+		need = ZFCP_ERP_ACTION_NONE; /* marker for trace */
+		retval = -EIO;
+		goto out;
+	}
 
 	need = zfcp_erp_required_act(want, adapter, port, sdev);
 	if (!need)

From f38abc5ce16d70653dc402184fe164e086726a05 Mon Sep 17 00:00:00 2001
From: Robert Elliott <elliott@hpe.com>
Date: Thu, 31 May 2018 18:36:36 -0500
Subject: [PATCH 0820/1852] linvdimm, pmem: Preserve read-only setting for pmem
 devices

commit 254a4cd50b9fe2291a12b8902e08e56dcc4e9b10 upstream.

The pmem driver does not honor a forced read-only setting for very long:
	$ blockdev --setro /dev/pmem0
	$ blockdev --getro /dev/pmem0
	1

followed by various commands like these:
	$ blockdev --rereadpt /dev/pmem0
	or
	$ mkfs.ext4 /dev/pmem0

results in this in the kernel serial log:
	 nd_pmem namespace0.0: region0 read-write, marking pmem0 read-write

with the read-only setting lost:
	$ blockdev --getro /dev/pmem0
	0

That's from bus.c nvdimm_revalidate_disk(), which always applies the
setting from nd_region (which is initially based on the ACPI NFIT
NVDIMM state flags not_armed bit).

In contrast, commit 20bd1d026aac ("scsi: sd: Keep disk read-only when
re-reading partition") fixed this issue for SCSI devices to preserve
the previous setting if it was set to read-only.

This patch modifies bus.c to preserve any previous read-only setting.
It also eliminates the kernel serial log print except for cases where
read-write is changed to read-only, so it doesn't print read-only to
read-only non-changes.

Cc: <stable@vger.kernel.org>
Fixes: 581388209405 ("libnvdimm, nfit: handle unarmed dimms, mark namespaces read-only")
Signed-off-by: Robert Elliott <elliott@hpe.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/nvdimm/bus.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/nvdimm/bus.c b/drivers/nvdimm/bus.c
index 254b0ee370395..a71187c783b74 100644
--- a/drivers/nvdimm/bus.c
+++ b/drivers/nvdimm/bus.c
@@ -237,14 +237,18 @@ int nvdimm_revalidate_disk(struct gendisk *disk)
 {
 	struct device *dev = disk->driverfs_dev;
 	struct nd_region *nd_region = to_nd_region(dev->parent);
-	const char *pol = nd_region->ro ? "only" : "write";
+	int disk_ro = get_disk_ro(disk);
 
-	if (nd_region->ro == get_disk_ro(disk))
+	/*
+	 * Upgrade to read-only if the region is read-only preserve as
+	 * read-only if the disk is already read-only.
+	 */
+	if (disk_ro || nd_region->ro == disk_ro)
 		return 0;
 
-	dev_info(dev, "%s read-%s, marking %s read-%s\n",
-			dev_name(&nd_region->dev), pol, disk->disk_name, pol);
-	set_disk_ro(disk, nd_region->ro);
+	dev_info(dev, "%s read-only, marking %s read-only\n",
+			dev_name(&nd_region->dev), disk->disk_name);
+	set_disk_ro(disk, 1);
 
 	return 0;
 

From b776f7307190245257016ff18343c6aed0fc12da Mon Sep 17 00:00:00 2001
From: NeilBrown <neilb@suse.com>
Date: Thu, 26 Apr 2018 14:46:29 +1000
Subject: [PATCH 0821/1852] md: fix two problems with setting the "re-add"
 device state.

commit 011abdc9df559ec75779bb7c53a744c69b2a94c6 upstream.

If "re-add" is written to the "state" file for a device
which is faulty, this has an effect similar to removing
and re-adding the device.  It should take up the
same slot in the array that it previously had, and
an accelerated (e.g. bitmap-based) rebuild should happen.

The slot that "it previously had" is determined by
rdev->saved_raid_disk.
However this is not set when a device fails (only when a device
is added), and it is cleared when resync completes.
This means that "re-add" will normally work once, but may not work a
second time.

This patch includes two fixes.
1/ when a device fails, record the ->raid_disk value in
    ->saved_raid_disk before clearing ->raid_disk
2/ when "re-add" is written to a device for which
    ->saved_raid_disk is not set, fail.

I think this is suitable for stable as it can
cause re-adding a device to be forced to do a full
resync which takes a lot longer and so puts data at
more risk.

Cc: <stable@vger.kernel.org> (v4.1)
Fixes: 97f6cd39da22 ("md-cluster: re-add capabilities")
Signed-off-by: NeilBrown <neilb@suse.com>
Reviewed-by: Goldwyn Rodrigues <rgoldwyn@suse.com>
Signed-off-by: Shaohua Li <shli@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/md.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/md/md.c b/drivers/md/md.c
index 62c3328e2a1dd..0663463df2f72 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -2690,7 +2690,8 @@ state_store(struct md_rdev *rdev, const char *buf, size_t len)
 			err = 0;
 		}
 	} else if (cmd_match(buf, "re-add")) {
-		if (test_bit(Faulty, &rdev->flags) && (rdev->raid_disk == -1)) {
+		if (test_bit(Faulty, &rdev->flags) && (rdev->raid_disk == -1) &&
+			rdev->saved_raid_disk >= 0) {
 			/* clear_bit is performed _after_ all the devices
 			 * have their local Faulty bit cleared. If any writes
 			 * happen in the meantime in the local node, they
@@ -8153,6 +8154,7 @@ static int remove_and_add_spares(struct mddev *mddev,
 			if (mddev->pers->hot_remove_disk(
 				    mddev, rdev) == 0) {
 				sysfs_unlink_rdev(mddev, rdev);
+				rdev->saved_raid_disk = rdev->raid_disk;
 				rdev->raid_disk = -1;
 				removed++;
 			}

From f45731832bbca6ae67a895aafd1d5c2f34fbbc6c Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Wed, 16 May 2018 22:17:03 +0200
Subject: [PATCH 0822/1852] ubi: fastmap: Cancel work upon detach

commit 6e7d80161066c99d12580d1b985cb1408bb58cf1 upstream.

Ben Hutchings pointed out that 29b7a6fa1ec0 ("ubi: fastmap: Don't flush
fastmap work on detach") does not really fix the problem, it just
reduces the risk to hit the race window where fastmap work races against
free()'ing ubi->volumes[].

The correct approach is making sure that no more fastmap work is in
progress before we free ubi data structures.
So we cancel fastmap work right after the ubi background thread is
stopped.
By setting ubi->thread_enabled to zero we make sure that no further work
tries to wake the thread.

Fixes: 29b7a6fa1ec0 ("ubi: fastmap: Don't flush fastmap work on detach")
Fixes: 74cdaf24004a ("UBI: Fastmap: Fix memory leaks while closing the WL sub-system")
Cc: stable@vger.kernel.org
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Cc: Martin Townsend <mtownsend1973@gmail.com>

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/build.c | 3 +++
 drivers/mtd/ubi/wl.c    | 4 +---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index a2e6c7848b0ac..c9f5ae424af75 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -1132,6 +1132,9 @@ int ubi_detach_mtd_dev(int ubi_num, int anyway)
 	 */
 	get_device(&ubi->dev);
 
+#ifdef CONFIG_MTD_UBI_FASTMAP
+	cancel_work_sync(&ubi->fm_work);
+#endif
 	ubi_debugfs_exit_dev(ubi);
 	uif_close(ubi);
 
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index 75286588b8234..ca9746f41ff15 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -1479,6 +1479,7 @@ int ubi_thread(void *u)
 	}
 
 	dbg_wl("background thread \"%s\" is killed", ubi->bgt_name);
+	ubi->thread_enabled = 0;
 	return 0;
 }
 
@@ -1488,9 +1489,6 @@ int ubi_thread(void *u)
  */
 static void shutdown_work(struct ubi_device *ubi)
 {
-#ifdef CONFIG_MTD_UBI_FASTMAP
-	flush_work(&ubi->fm_work);
-#endif
 	while (!list_empty(&ubi->works)) {
 		struct ubi_work *wrk;
 

From 92cb2cbd2af7a26412b081bbd6d7130e4905aa8f Mon Sep 17 00:00:00 2001
From: Silvio Cesare <silvio.cesare@gmail.com>
Date: Fri, 4 May 2018 13:44:02 +1000
Subject: [PATCH 0823/1852] UBIFS: Fix potential integer overflow in allocation

commit 353748a359f1821ee934afc579cf04572406b420 upstream.

There is potential for the size and len fields in ubifs_data_node to be
too large causing either a negative value for the length fields or an
integer overflow leading to an incorrect memory allocation. Likewise,
when the len field is small, an integer underflow may occur.

Signed-off-by: Silvio Cesare <silvio.cesare@gmail.com>
Fixes: 1e51764a3c2ac ("UBIFS: add new flash file system")
Cc: stable@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ubifs/journal.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/ubifs/journal.c b/fs/ubifs/journal.c
index 0b9da5b6e0f96..22dba8837a861 100644
--- a/fs/ubifs/journal.c
+++ b/fs/ubifs/journal.c
@@ -1107,7 +1107,7 @@ static int recomp_data_node(const struct ubifs_info *c,
 	int err, len, compr_type, out_len;
 
 	out_len = le32_to_cpu(dn->size);
-	buf = kmalloc(out_len * WORST_COMPR_FACTOR, GFP_NOFS);
+	buf = kmalloc_array(out_len, WORST_COMPR_FACTOR, GFP_NOFS);
 	if (!buf)
 		return -ENOMEM;
 

From f4b61d6ccfa4c18b2ceb0c69b039bb43bd5fe41c Mon Sep 17 00:00:00 2001
From: Tobias Brunner <tobias@strongswan.org>
Date: Fri, 29 Jul 2016 09:57:32 +0200
Subject: [PATCH 0824/1852] xfrm: Ignore socket policies when rebuilding hash
 tables

commit 6916fb3b10b3cbe3b1f9f5b680675f53e4e299eb upstream.

Whenever thresholds are changed the hash tables are rebuilt.  This is
done by enumerating all policies and hashing and inserting them into
the right table according to the thresholds and direction.

Because socket policies are also contained in net->xfrm.policy_all but
no hash tables are defined for their direction (dir + XFRM_POLICY_MAX)
this causes a NULL or invalid pointer dereference after returning from
policy_hash_bysel() if the rebuild is done while any socket policies
are installed.

Since the rebuild after changing thresholds is scheduled this crash
could even occur if the userland sets thresholds seemingly before
installing any socket policies.

Fixes: 53c2e285f970 ("xfrm: Do not hash socket policies")
Signed-off-by: Tobias Brunner <tobias@strongswan.org>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Zubin Mithra <zsm@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_policy.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 0e9ae80472f0e..6afdcb4d30130 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -626,6 +626,10 @@ static void xfrm_hash_rebuild(struct work_struct *work)
 
 	/* re-insert all policies by order of creation */
 	list_for_each_entry_reverse(policy, &net->xfrm.policy_all, walk.all) {
+		if (xfrm_policy_id2dir(policy->index) >= XFRM_POLICY_MAX) {
+			/* skip socket policies */
+			continue;
+		}
 		newpos = NULL;
 		chain = policy_hash_bysel(net, &policy->selector,
 					  policy->family,

From f3e49e715f8dc70b863f57ed83571055d8d00605 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Wed, 27 Dec 2017 23:25:45 +0100
Subject: [PATCH 0825/1852] xfrm: skip policies marked as dead while rehashing

commit 862591bf4f519d1b8d859af720fafeaebdd0162a upstream.

syzkaller triggered following KASAN splat:

BUG: KASAN: slab-out-of-bounds in xfrm_hash_rebuild+0xdbe/0xf00 net/xfrm/xfrm_policy.c:618
read of size 2 at addr ffff8801c8e92fe4 by task kworker/1:1/23 [..]
Workqueue: events xfrm_hash_rebuild [..]
 __asan_report_load2_noabort+0x14/0x20 mm/kasan/report.c:428
 xfrm_hash_rebuild+0xdbe/0xf00 net/xfrm/xfrm_policy.c:618
 process_one_work+0xbbf/0x1b10 kernel/workqueue.c:2112
 worker_thread+0x223/0x1990 kernel/workqueue.c:2246 [..]

The reproducer triggers:
1016                 if (error) {
1017                         list_move_tail(&walk->walk.all, &x->all);
1018                         goto out;
1019                 }

in xfrm_policy_walk() via pfkey (it sets tiny rcv space, dump
callback returns -ENOBUFS).

In this case, *walk is located the pfkey socket struct, so this socket
becomes visible in the global policy list.

It looks like this is intentional -- phony walker has walk.dead set to 1
and all other places skip such "policies".

Ccing original authors of the two commits that seem to expose this
issue (first patch missed ->dead check, second patch adds pfkey
sockets to policies dumper list).

Fixes: 880a6fab8f6ba5b ("xfrm: configure policy hash table thresholds by netlink")
Fixes: 12a169e7d8f4b1c ("ipsec: Put dumpers on the dump list")
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Timo Teras <timo.teras@iki.fi>
Cc: Christophe Gouault <christophe.gouault@6wind.com>
Reported-by: syzbot <bot+c028095236fcb6f4348811565b75084c754dc729@syzkaller.appspotmail.com>
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Zubin Mithra <zsm@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_policy.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 6afdcb4d30130..6173a55af2145 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -626,7 +626,8 @@ static void xfrm_hash_rebuild(struct work_struct *work)
 
 	/* re-insert all policies by order of creation */
 	list_for_each_entry_reverse(policy, &net->xfrm.policy_all, walk.all) {
-		if (xfrm_policy_id2dir(policy->index) >= XFRM_POLICY_MAX) {
+		if (policy->walk.dead ||
+		    xfrm_policy_id2dir(policy->index) >= XFRM_POLICY_MAX) {
 			/* skip socket policies */
 			continue;
 		}

From 694a9e5c85e42dec8309b598b304683286d69272 Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Mon, 20 Nov 2017 11:45:44 +0100
Subject: [PATCH 0826/1852] backlight: as3711_bl: Fix Device Tree node lookup

commit 4a9c8bb2aca5b5a2a15744333729745dd9903562 upstream.

Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.

To make things worse, the parent mfd node was also prematurely freed.

Cc: stable <stable@vger.kernel.org>     # 3.10
Fixes: 59eb2b5e57ea ("drivers/video/backlight/as3711_bl.c: add OF support")
Signed-off-by: Johan Hovold <johan@kernel.org>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/video/backlight/as3711_bl.c | 33 ++++++++++++++++++++---------
 1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/video/backlight/as3711_bl.c b/drivers/video/backlight/as3711_bl.c
index 734a9158946b1..e55304d5cf071 100644
--- a/drivers/video/backlight/as3711_bl.c
+++ b/drivers/video/backlight/as3711_bl.c
@@ -262,10 +262,10 @@ static int as3711_bl_register(struct platform_device *pdev,
 static int as3711_backlight_parse_dt(struct device *dev)
 {
 	struct as3711_bl_pdata *pdata = dev_get_platdata(dev);
-	struct device_node *bl =
-		of_find_node_by_name(dev->parent->of_node, "backlight"), *fb;
+	struct device_node *bl, *fb;
 	int ret;
 
+	bl = of_get_child_by_name(dev->parent->of_node, "backlight");
 	if (!bl) {
 		dev_dbg(dev, "backlight node not found\n");
 		return -ENODEV;
@@ -279,7 +279,7 @@ static int as3711_backlight_parse_dt(struct device *dev)
 		if (pdata->su1_max_uA <= 0)
 			ret = -EINVAL;
 		if (ret < 0)
-			return ret;
+			goto err_put_bl;
 	}
 
 	fb = of_parse_phandle(bl, "su2-dev", 0);
@@ -292,7 +292,7 @@ static int as3711_backlight_parse_dt(struct device *dev)
 		if (pdata->su2_max_uA <= 0)
 			ret = -EINVAL;
 		if (ret < 0)
-			return ret;
+			goto err_put_bl;
 
 		if (of_find_property(bl, "su2-feedback-voltage", NULL)) {
 			pdata->su2_feedback = AS3711_SU2_VOLTAGE;
@@ -314,8 +314,10 @@ static int as3711_backlight_parse_dt(struct device *dev)
 			pdata->su2_feedback = AS3711_SU2_CURR_AUTO;
 			count++;
 		}
-		if (count != 1)
-			return -EINVAL;
+		if (count != 1) {
+			ret = -EINVAL;
+			goto err_put_bl;
+		}
 
 		count = 0;
 		if (of_find_property(bl, "su2-fbprot-lx-sd4", NULL)) {
@@ -334,8 +336,10 @@ static int as3711_backlight_parse_dt(struct device *dev)
 			pdata->su2_fbprot = AS3711_SU2_GPIO4;
 			count++;
 		}
-		if (count != 1)
-			return -EINVAL;
+		if (count != 1) {
+			ret = -EINVAL;
+			goto err_put_bl;
+		}
 
 		count = 0;
 		if (of_find_property(bl, "su2-auto-curr1", NULL)) {
@@ -355,11 +359,20 @@ static int as3711_backlight_parse_dt(struct device *dev)
 		 * At least one su2-auto-curr* must be specified iff
 		 * AS3711_SU2_CURR_AUTO is used
 		 */
-		if (!count ^ (pdata->su2_feedback != AS3711_SU2_CURR_AUTO))
-			return -EINVAL;
+		if (!count ^ (pdata->su2_feedback != AS3711_SU2_CURR_AUTO)) {
+			ret = -EINVAL;
+			goto err_put_bl;
+		}
 	}
 
+	of_node_put(bl);
+
 	return 0;
+
+err_put_bl:
+	of_node_put(bl);
+
+	return ret;
 }
 
 static int as3711_backlight_probe(struct platform_device *pdev)

From c8ab4c8b4c3d34435c9aa922268d8602e1d94ecf Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Mon, 20 Nov 2017 11:45:45 +0100
Subject: [PATCH 0827/1852] backlight: max8925_bl: Fix Device Tree node lookup

commit d1cc0ec3da23e44c23712579515494b374f111c9 upstream.

Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.

To make things worse, the parent mfd node was also prematurely freed,
while the child backlight node was leaked.

Cc: stable <stable@vger.kernel.org>     # 3.9
Fixes: 47ec340cb8e2 ("mfd: max8925: Support dt for backlight")
Signed-off-by: Johan Hovold <johan@kernel.org>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/video/backlight/max8925_bl.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/video/backlight/max8925_bl.c b/drivers/video/backlight/max8925_bl.c
index 7b738d60ecc22..f3aa6088f1d97 100644
--- a/drivers/video/backlight/max8925_bl.c
+++ b/drivers/video/backlight/max8925_bl.c
@@ -116,7 +116,7 @@ static void max8925_backlight_dt_init(struct platform_device *pdev)
 	if (!pdata)
 		return;
 
-	np = of_find_node_by_name(nproot, "backlight");
+	np = of_get_child_by_name(nproot, "backlight");
 	if (!np) {
 		dev_err(&pdev->dev, "failed to find backlight node\n");
 		return;
@@ -125,6 +125,8 @@ static void max8925_backlight_dt_init(struct platform_device *pdev)
 	if (!of_property_read_u32(np, "maxim,max8925-dual-string", &val))
 		pdata->dual_string = val;
 
+	of_node_put(np);
+
 	pdev->dev.platform_data = pdata;
 }
 

From e16f7a17169826d90cfacb2dedf70cbc0fe6614f Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Mon, 20 Nov 2017 11:45:46 +0100
Subject: [PATCH 0828/1852] backlight: tps65217_bl: Fix Device Tree node lookup

commit 2b12dfa124dbadf391cb9a616aaa6b056823bf75 upstream.

Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.

This would only cause trouble if the child node is missing while there
is an unrelated node named "backlight" elsewhere in the tree.

Cc: stable <stable@vger.kernel.org>     # 3.7
Fixes: eebfdc17cc6c ("backlight: Add TPS65217 WLED driver")
Signed-off-by: Johan Hovold <johan@kernel.org>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/video/backlight/tps65217_bl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/backlight/tps65217_bl.c b/drivers/video/backlight/tps65217_bl.c
index 61d72bffd402f..dc920e2aa0944 100644
--- a/drivers/video/backlight/tps65217_bl.c
+++ b/drivers/video/backlight/tps65217_bl.c
@@ -184,11 +184,11 @@ static struct tps65217_bl_pdata *
 tps65217_bl_parse_dt(struct platform_device *pdev)
 {
 	struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent);
-	struct device_node *node = of_node_get(tps->dev->of_node);
+	struct device_node *node;
 	struct tps65217_bl_pdata *pdata, *err;
 	u32 val;
 
-	node = of_find_node_by_name(node, "backlight");
+	node = of_get_child_by_name(tps->dev->of_node, "backlight");
 	if (!node)
 		return ERR_PTR(-ENODEV);
 

From 31c211ab4c046e6b6534f89999aa320f7033a4c4 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Tue, 24 Apr 2018 18:00:10 +0300
Subject: [PATCH 0829/1852] mfd: intel-lpss: Program REMAP register in PIO mode

commit d28b62520830b2d0bffa2d98e81afc9f5e537e8b upstream.

According to documentation REMAP register has to be programmed in
either DMA or PIO mode of the slice.

Move the DMA capability check below to let REMAP register be programmed
in PIO mode.

Cc: stable@vger.kernel.org # 4.3+
Fixes: 4b45efe85263 ("mfd: Add support for Intel Sunrisepoint LPSS devices")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mfd/intel-lpss.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c
index fe89e5e337d54..ac867489b5a9b 100644
--- a/drivers/mfd/intel-lpss.c
+++ b/drivers/mfd/intel-lpss.c
@@ -269,11 +269,11 @@ static void intel_lpss_init_dev(const struct intel_lpss *lpss)
 
 	intel_lpss_deassert_reset(lpss);
 
+	intel_lpss_set_remap_addr(lpss);
+
 	if (!intel_lpss_has_idma(lpss))
 		return;
 
-	intel_lpss_set_remap_addr(lpss);
-
 	/* Make sure that SPI multiblock DMA transfers are re-enabled */
 	if (lpss->type == LPSS_DEV_SPI)
 		writel(value, lpss->priv + LPSS_PRIV_SSP_REG);

From 461241edb1c27ea417fec32861cded3ae3a4b4cd Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Mon, 4 Jun 2018 15:56:54 +0300
Subject: [PATCH 0830/1852] perf tools: Fix symbol and object code resolution
 for vdso32 and vdsox32

commit aef4feace285f27c8ed35830a5d575bec7f3e90a upstream.

Fix __kmod_path__parse() so that perf tools does not treat vdso32 and
vdsox32 as kernel modules and fail to find the object.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: stable@vger.kernel.org
Fixes: 1f121b03d058 ("perf tools: Deal with kernel module names in '[]' correctly")
Link: http://lkml.kernel.org/r/1528117014-30032-3-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/dso.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/perf/util/dso.c b/tools/perf/util/dso.c
index 425df5c86c9c9..4255971866773 100644
--- a/tools/perf/util/dso.c
+++ b/tools/perf/util/dso.c
@@ -249,6 +249,8 @@ int __kmod_path__parse(struct kmod_path *m, const char *path,
 		if ((strncmp(name, "[kernel.kallsyms]", 17) == 0) ||
 		    (strncmp(name, "[guest.kernel.kallsyms", 22) == 0) ||
 		    (strncmp(name, "[vdso]", 6) == 0) ||
+		    (strncmp(name, "[vdso32]", 8) == 0) ||
+		    (strncmp(name, "[vdsox32]", 9) == 0) ||
 		    (strncmp(name, "[vsyscall]", 10) == 0)) {
 			m->kmod = false;
 

From 5f3cdd49d124ad53a8283a8f65489b487dfd4f49 Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Thu, 31 May 2018 13:23:42 +0300
Subject: [PATCH 0831/1852] perf intel-pt: Fix sync_switch
 INTEL_PT_SS_NOT_TRACING

commit dbcb82b93f3e8322891e47472c89e63058b81e99 upstream.

sync_switch is a facility to synchronize decoding more closely with the
point in the kernel when the context actually switched.

In one case, INTEL_PT_SS_NOT_TRACING state was not correctly
transitioning to INTEL_PT_SS_TRACING state due to a missing case clause.
Add it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-2-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/intel-pt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 3693cb26ec661..523989165c260 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -1246,6 +1246,7 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
 
 	if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
 		switch (ptq->switch_state) {
+		case INTEL_PT_SS_NOT_TRACING:
 		case INTEL_PT_SS_UNKNOWN:
 		case INTEL_PT_SS_EXPECTING_SWITCH_IP:
 			err = intel_pt_next_tid(pt, ptq);

From e6369b70c345d85f8d45641e9edd42c91fd110e0 Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Thu, 31 May 2018 13:23:43 +0300
Subject: [PATCH 0832/1852] perf intel-pt: Fix decoding to accept CBR between
 FUP and corresponding TIP

commit bd2e49ec48feb1855f7624198849eea4610e2286 upstream.

It is possible to have a CBR packet between a FUP packet and
corresponding TIP packet. Stop treating it as an error.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-3-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index 0b540b84f8b79..c0596a11f20b3 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1487,7 +1487,6 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 		case INTEL_PT_PSB:
 		case INTEL_PT_TSC:
 		case INTEL_PT_TMA:
-		case INTEL_PT_CBR:
 		case INTEL_PT_MODE_TSX:
 		case INTEL_PT_BAD:
 		case INTEL_PT_PSBEND:
@@ -1496,6 +1495,10 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 			decoder->pkt_step = 0;
 			return -ENOENT;
 
+		case INTEL_PT_CBR:
+			intel_pt_calc_cbr(decoder);
+			break;
+
 		case INTEL_PT_OVF:
 			return intel_pt_overflow(decoder);
 

From 864972e638210bc85fc20d83062a69b368b2ea60 Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Thu, 31 May 2018 13:23:44 +0300
Subject: [PATCH 0833/1852] perf intel-pt: Fix MTC timing after overflow

commit dd27b87ab5fcf3ea1c060b5e3ab5d31cc78e9f4c upstream.

On some platforms, overflows will clear before MTC wraparound, and there
is no following TSC/TMA packet. In that case the previous TMA is valid.
Since there will be a valid TMA either way, stop setting 'have_tma' to
false upon overflow.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-4-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index c0596a11f20b3..492d13637be03 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1268,7 +1268,6 @@ static int intel_pt_overflow(struct intel_pt_decoder *decoder)
 {
 	intel_pt_log("ERROR: Buffer overflow\n");
 	intel_pt_clear_tx_flags(decoder);
-	decoder->have_tma = false;
 	decoder->cbr = 0;
 	decoder->timestamp_insn_cnt = 0;
 	decoder->pkt_state = INTEL_PT_STATE_ERR_RESYNC;

From 076d453e8044adbea02bf5beb6111008929fe532 Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Thu, 31 May 2018 13:23:45 +0300
Subject: [PATCH 0834/1852] perf intel-pt: Fix "Unexpected indirect branch"
 error

commit 9fb523363f6e3984457fee95bb7019395384ffa7 upstream.

Some Atom CPUs can produce FUP packets that contain NLIP (next linear
instruction pointer) instead of CLIP (current linear instruction
pointer).  That will result in "Unexpected indirect branch" errors. Fix
by comparing IP to NLIP in that case.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-5-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../util/intel-pt-decoder/intel-pt-decoder.c    | 17 +++++++++++++++--
 .../util/intel-pt-decoder/intel-pt-decoder.h    |  9 +++++++++
 tools/perf/util/intel-pt.c                      |  4 ++++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index 492d13637be03..dc17c881275d4 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -111,6 +111,7 @@ struct intel_pt_decoder {
 	bool have_cyc;
 	bool fixup_last_mtc;
 	bool have_last_ip;
+	enum intel_pt_param_flags flags;
 	uint64_t pos;
 	uint64_t last_ip;
 	uint64_t ip;
@@ -213,6 +214,8 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params)
 	decoder->data               = params->data;
 	decoder->return_compression = params->return_compression;
 
+	decoder->flags              = params->flags;
+
 	decoder->period             = params->period;
 	decoder->period_type        = params->period_type;
 
@@ -1010,6 +1013,15 @@ static int intel_pt_walk_insn(struct intel_pt_decoder *decoder,
 	return err;
 }
 
+static inline bool intel_pt_fup_with_nlip(struct intel_pt_decoder *decoder,
+					  struct intel_pt_insn *intel_pt_insn,
+					  uint64_t ip, int err)
+{
+	return decoder->flags & INTEL_PT_FUP_WITH_NLIP && !err &&
+	       intel_pt_insn->branch == INTEL_PT_BR_INDIRECT &&
+	       ip == decoder->ip + intel_pt_insn->length;
+}
+
 static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 {
 	struct intel_pt_insn intel_pt_insn;
@@ -1022,7 +1034,8 @@ static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 		err = intel_pt_walk_insn(decoder, &intel_pt_insn, ip);
 		if (err == INTEL_PT_RETURN)
 			return 0;
-		if (err == -EAGAIN) {
+		if (err == -EAGAIN ||
+		    intel_pt_fup_with_nlip(decoder, &intel_pt_insn, ip, err)) {
 			if (decoder->set_fup_tx_flags) {
 				decoder->set_fup_tx_flags = false;
 				decoder->tx_flags = decoder->fup_tx_flags;
@@ -1032,7 +1045,7 @@ static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 				decoder->state.flags = decoder->fup_tx_flags;
 				return 0;
 			}
-			return err;
+			return -EAGAIN;
 		}
 		decoder->set_fup_tx_flags = false;
 		if (err)
diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
index 89a3eda6a3183..e420bd3be1594 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
@@ -53,6 +53,14 @@ enum {
 	INTEL_PT_ERR_MAX,
 };
 
+enum intel_pt_param_flags {
+	/*
+	 * FUP packet can contain next linear instruction pointer instead of
+	 * current linear instruction pointer.
+	 */
+	INTEL_PT_FUP_WITH_NLIP	= 1 << 0,
+};
+
 struct intel_pt_state {
 	enum intel_pt_sample_type type;
 	int err;
@@ -91,6 +99,7 @@ struct intel_pt_params {
 	unsigned int mtc_period;
 	uint32_t tsc_ctc_ratio_n;
 	uint32_t tsc_ctc_ratio_d;
+	enum intel_pt_param_flags flags;
 };
 
 struct intel_pt_decoder;
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 523989165c260..c8f2d084a8ce3 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -676,6 +676,7 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 						   unsigned int queue_nr)
 {
 	struct intel_pt_params params = { .get_trace = 0, };
+	struct perf_env *env = pt->machine->env;
 	struct intel_pt_queue *ptq;
 
 	ptq = zalloc(sizeof(struct intel_pt_queue));
@@ -753,6 +754,9 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 		}
 	}
 
+	if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
+		params.flags |= INTEL_PT_FUP_WITH_NLIP;
+
 	ptq->decoder = intel_pt_decoder_new(&params);
 	if (!ptq->decoder)
 		goto out_free;

From c4c2dafc06eaf8ad68754a45340d4eb9911c3842 Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Thu, 7 Jun 2018 14:30:02 +0300
Subject: [PATCH 0835/1852] perf intel-pt: Fix packet decoding of CYC packets

commit 621a5a327c1e36ffd7bb567f44a559f64f76358f upstream.

Use a 64-bit type so that the cycle count is not limited to 32-bits.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1528371002-8862-1-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c
index 7528ae4f7e28e..e5c6caf913f3e 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c
@@ -281,7 +281,7 @@ static int intel_pt_get_cyc(unsigned int byte, const unsigned char *buf,
 		if (len < offs)
 			return INTEL_PT_NEED_MORE_BYTES;
 		byte = buf[offs++];
-		payload |= (byte >> 1) << shift;
+		payload |= ((uint64_t)byte >> 1) << shift;
 	}
 
 	packet->type = INTEL_PT_CYC;

From 15bdf0c99b8d53d2884b193fbfd4641aafadbfec Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Date: Wed, 11 Apr 2018 11:47:32 -0400
Subject: [PATCH 0836/1852] media: v4l2-compat-ioctl32: prevent go past max
 size

commit ea72fbf588ac9c017224dcdaa2019ff52ca56fee upstream.

As warned by smatch:
	drivers/media/v4l2-core/v4l2-compat-ioctl32.c:879 put_v4l2_ext_controls32() warn: check for integer overflow 'count'

The access_ok() logic should check for too big arrays too.

Cc: stable@vger.kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/v4l2-core/v4l2-compat-ioctl32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
index 524886d5c7a88..017ad89ceff59 100644
--- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
+++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
@@ -873,7 +873,7 @@ static int put_v4l2_ext_controls32(struct file *file,
 	    get_user(kcontrols, &kp->controls))
 		return -EFAULT;
 
-	if (!count)
+	if (!count || count > (U32_MAX/sizeof(*ucontrols)))
 		return 0;
 	if (get_user(p, &up->controls))
 		return -EFAULT;

From 8bf391fd619b0cd5af7731dcd5621e1011e9e806 Mon Sep 17 00:00:00 2001
From: Kai-Heng Feng <kai.heng.feng@canonical.com>
Date: Mon, 26 Mar 2018 02:06:16 -0400
Subject: [PATCH 0837/1852] media: cx231xx: Add support for AverMedia DVD
 EZMaker 7

commit 29e61d6ef061b012d320327af7dbb3990e75be45 upstream.

User reports AverMedia DVD EZMaker 7 can be driven by VIDEO_GRABBER.
Add the device to the id_table to make it work.

BugLink: https://bugs.launchpad.net/bugs/1620762

Cc: stable@vger.kernel.org
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Hans Verkuil <hansverk@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/usb/cx231xx/cx231xx-cards.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/media/usb/cx231xx/cx231xx-cards.c b/drivers/media/usb/cx231xx/cx231xx-cards.c
index 04ae212784403..77f54e4198d3a 100644
--- a/drivers/media/usb/cx231xx/cx231xx-cards.c
+++ b/drivers/media/usb/cx231xx/cx231xx-cards.c
@@ -864,6 +864,9 @@ struct usb_device_id cx231xx_id_table[] = {
 	 .driver_info = CX231XX_BOARD_CNXT_RDE_250},
 	{USB_DEVICE(0x0572, 0x58A0),
 	 .driver_info = CX231XX_BOARD_CNXT_RDU_250},
+	/* AverMedia DVD EZMaker 7 */
+	{USB_DEVICE(0x07ca, 0xc039),
+	 .driver_info = CX231XX_BOARD_CNXT_VIDEO_GRABBER},
 	{USB_DEVICE(0x2040, 0xb110),
 	 .driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL},
 	{USB_DEVICE(0x2040, 0xb111),

From 1a81e681e984c46424a8f8d6d03c042727239e59 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Date: Thu, 5 Apr 2018 05:30:52 -0400
Subject: [PATCH 0838/1852] media: dvb_frontend: fix locking issues at
 dvb_frontend_get_event()

commit 76d81243a487c09619822ef8e7201a756e58a87d upstream.

As warned by smatch:
	drivers/media/dvb-core/dvb_frontend.c:314 dvb_frontend_get_event() warn: inconsistent returns 'sem:&fepriv->sem'.
	  Locked on:   line 288
	               line 295
	               line 306
	               line 314
	  Unlocked on: line 303

The lock implementation for get event is wrong, as, if an
interrupt occurs, down_interruptible() will fail, and the
routine will call up() twice when userspace calls the ioctl
again.

The bad code is there since when Linux migrated to git, in
2005.

Cc: stable@vger.kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/dvb-core/dvb_frontend.c | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/media/dvb-core/dvb_frontend.c b/drivers/media/dvb-core/dvb_frontend.c
index e2a3833170e32..2c835e69c4df9 100644
--- a/drivers/media/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb-core/dvb_frontend.c
@@ -230,8 +230,20 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe,
 	wake_up_interruptible (&events->wait_queue);
 }
 
+static int dvb_frontend_test_event(struct dvb_frontend_private *fepriv,
+				   struct dvb_fe_events *events)
+{
+	int ret;
+
+	up(&fepriv->sem);
+	ret = events->eventw != events->eventr;
+	down(&fepriv->sem);
+
+	return ret;
+}
+
 static int dvb_frontend_get_event(struct dvb_frontend *fe,
-			    struct dvb_frontend_event *event, int flags)
+			          struct dvb_frontend_event *event, int flags)
 {
 	struct dvb_frontend_private *fepriv = fe->frontend_priv;
 	struct dvb_fe_events *events = &fepriv->events;
@@ -249,13 +261,8 @@ static int dvb_frontend_get_event(struct dvb_frontend *fe,
 		if (flags & O_NONBLOCK)
 			return -EWOULDBLOCK;
 
-		up(&fepriv->sem);
-
-		ret = wait_event_interruptible (events->wait_queue,
-						events->eventw != events->eventr);
-
-		if (down_interruptible (&fepriv->sem))
-			return -ERESTARTSYS;
+		ret = wait_event_interruptible(events->wait_queue,
+					       dvb_frontend_test_event(fepriv, events));
 
 		if (ret < 0)
 			return ret;

From 23e1d510205e3988b10ffa0a34a4518d83497e94 Mon Sep 17 00:00:00 2001
From: Scott Mayhew <smayhew@redhat.com>
Date: Mon, 7 May 2018 09:01:08 -0400
Subject: [PATCH 0839/1852] nfsd: restrict rd_maxcount to svc_max_payload in
 nfsd_encode_readdir

commit 9c2ece6ef67e9d376f32823086169b489c422ed0 upstream.

nfsd4_readdir_rsize restricts rd_maxcount to svc_max_payload when
estimating the size of the readdir reply, but nfsd_encode_readdir
restricts it to INT_MAX when encoding the reply.  This can result in log
messages like "kernel: RPC request reserved 32896 but used 1049444".

Restrict rd_dircount similarly (no reason it should be larger than
svc_max_payload).

Signed-off-by: Scott Mayhew <smayhew@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/nfsd/nfs4xdr.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 544672b440dea..57e3262ec57ac 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -3595,7 +3595,8 @@ nfsd4_encode_readdir(struct nfsd4_compoundres *resp, __be32 nfserr, struct nfsd4
 		nfserr = nfserr_resource;
 		goto err_no_verf;
 	}
-	maxcount = min_t(u32, readdir->rd_maxcount, INT_MAX);
+	maxcount = svc_max_payload(resp->rqstp);
+	maxcount = min_t(u32, readdir->rd_maxcount, maxcount);
 	/*
 	 * Note the rfc defines rd_maxcount as the size of the
 	 * READDIR4resok structure, which includes the verifier above
@@ -3609,7 +3610,7 @@ nfsd4_encode_readdir(struct nfsd4_compoundres *resp, __be32 nfserr, struct nfsd4
 
 	/* RFC 3530 14.2.24 allows us to ignore dircount when it's 0: */
 	if (!readdir->rd_dircount)
-		readdir->rd_dircount = INT_MAX;
+		readdir->rd_dircount = svc_max_payload(resp->rqstp);
 
 	readdir->xdr = xdr;
 	readdir->rd_maxcount = maxcount;

From 3ad55df8b82c115f9f33b66aa7bf8c573691372c Mon Sep 17 00:00:00 2001
From: Dave Wysochanski <dwysocha@redhat.com>
Date: Tue, 29 May 2018 17:47:30 -0400
Subject: [PATCH 0840/1852] NFSv4: Fix possible 1-byte stack overflow in
 nfs_idmap_read_and_verify_message

commit d68894800ec5712d7ddf042356f11e36f87d7f78 upstream.

In nfs_idmap_read_and_verify_message there is an incorrect sprintf '%d'
that converts the __u32 'im_id' from struct idmap_msg to 'id_str', which
is a stack char array variable of length NFS_UINT_MAXLEN == 11.
If a uid or gid value is > 2147483647 = 0x7fffffff, the conversion
overflows into a negative value, for example:
crash> p (unsigned) (0x80000000)
$1 = 2147483648
crash> p (signed) (0x80000000)
$2 = -2147483648
The '-' sign is written to the buffer and this causes a 1 byte overflow
when the NULL byte is written, which corrupts kernel stack memory.  If
CONFIG_CC_STACKPROTECTOR_STRONG is set we see a stack-protector panic:

[11558053.616565] Kernel panic - not syncing: stack-protector: Kernel stack is corrupted in: ffffffffa05b8a8c
[11558053.639063] CPU: 6 PID: 9423 Comm: rpc.idmapd Tainted: G        W      ------------ T 3.10.0-514.el7.x86_64 #1
[11558053.641990] Hardware name: Red Hat OpenStack Compute, BIOS 1.10.2-3.el7_4.1 04/01/2014
[11558053.644462]  ffffffff818c7bc0 00000000b1f3aec1 ffff880de0f9bd48 ffffffff81685eac
[11558053.646430]  ffff880de0f9bdc8 ffffffff8167f2b3 ffffffff00000010 ffff880de0f9bdd8
[11558053.648313]  ffff880de0f9bd78 00000000b1f3aec1 ffffffff811dcb03 ffffffffa05b8a8c
[11558053.650107] Call Trace:
[11558053.651347]  [<ffffffff81685eac>] dump_stack+0x19/0x1b
[11558053.653013]  [<ffffffff8167f2b3>] panic+0xe3/0x1f2
[11558053.666240]  [<ffffffff811dcb03>] ? kfree+0x103/0x140
[11558053.682589]  [<ffffffffa05b8a8c>] ? idmap_pipe_downcall+0x1cc/0x1e0 [nfsv4]
[11558053.689710]  [<ffffffff810855db>] __stack_chk_fail+0x1b/0x30
[11558053.691619]  [<ffffffffa05b8a8c>] idmap_pipe_downcall+0x1cc/0x1e0 [nfsv4]
[11558053.693867]  [<ffffffffa00209d6>] rpc_pipe_write+0x56/0x70 [sunrpc]
[11558053.695763]  [<ffffffff811fe12d>] vfs_write+0xbd/0x1e0
[11558053.702236]  [<ffffffff810acccc>] ? task_work_run+0xac/0xe0
[11558053.704215]  [<ffffffff811fec4f>] SyS_write+0x7f/0xe0
[11558053.709674]  [<ffffffff816964c9>] system_call_fastpath+0x16/0x1b

Fix this by calling the internally defined nfs_map_numeric_to_string()
function which properly uses '%u' to convert this __u32.  For consistency,
also replace the one other place where snprintf is called.

Signed-off-by: Dave Wysochanski <dwysocha@redhat.com>
Reported-by: Stephen Johnston <sjohnsto@redhat.com>
Fixes: cf4ab538f1516 ("NFSv4: Fix the string length returned by the idmapper")
Cc: stable@vger.kernel.org # v3.4+
Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/nfs/nfs4idmap.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/nfs/nfs4idmap.c b/fs/nfs/nfs4idmap.c
index 1ee62e62ea766..c99a887100dba 100644
--- a/fs/nfs/nfs4idmap.c
+++ b/fs/nfs/nfs4idmap.c
@@ -343,7 +343,7 @@ static ssize_t nfs_idmap_lookup_name(__u32 id, const char *type, char *buf,
 	int id_len;
 	ssize_t ret;
 
-	id_len = snprintf(id_str, sizeof(id_str), "%u", id);
+	id_len = nfs_map_numeric_to_string(id, id_str, sizeof(id_str));
 	ret = nfs_idmap_get_key(id_str, id_len, type, buf, buflen, idmap);
 	if (ret < 0)
 		return -EINVAL;
@@ -626,7 +626,8 @@ static int nfs_idmap_read_and_verify_message(struct idmap_msg *im,
 		if (strcmp(upcall->im_name, im->im_name) != 0)
 			break;
 		/* Note: here we store the NUL terminator too */
-		len = sprintf(id_str, "%d", im->im_id) + 1;
+		len = 1 + nfs_map_numeric_to_string(im->im_id, id_str,
+						    sizeof(id_str));
 		ret = nfs_idmap_instantiate(key, authkey, id_str, len);
 		break;
 	case IDMAP_CONV_IDTONAME:

From 6c575c9448b7ffa8b7840b68277802783b8feff7 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Fri, 11 May 2018 18:24:12 +1000
Subject: [PATCH 0841/1852] video: uvesafb: Fix integer overflow in allocation

commit 9f645bcc566a1e9f921bdae7528a01ced5bc3713 upstream.

cmap->len can get close to INT_MAX/2, allowing for an integer overflow in
allocation. This uses kmalloc_array() instead to catch the condition.

Reported-by: Dr Silvio Cesare of InfoSect <silvio.cesare@gmail.com>
Fixes: 8bdb3a2d7df48 ("uvesafb: the driver core")
Cc: stable@vger.kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/video/fbdev/uvesafb.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/video/fbdev/uvesafb.c b/drivers/video/fbdev/uvesafb.c
index 178ae93b7ebd6..381236ff34d9c 100644
--- a/drivers/video/fbdev/uvesafb.c
+++ b/drivers/video/fbdev/uvesafb.c
@@ -1059,7 +1059,8 @@ static int uvesafb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
 		    info->cmap.len || cmap->start < info->cmap.start)
 			return -EINVAL;
 
-		entries = kmalloc(sizeof(*entries) * cmap->len, GFP_KERNEL);
+		entries = kmalloc_array(cmap->len, sizeof(*entries),
+					GFP_KERNEL);
 		if (!entries)
 			return -ENOMEM;
 

From 8f9d514ce165ea1ba0005eecdd9987a6e044a414 Mon Sep 17 00:00:00 2001
From: Alexandr Savca <alexandr.savca@saltedge.com>
Date: Thu, 21 Jun 2018 17:12:54 -0700
Subject: [PATCH 0842/1852] Input: elan_i2c - add ELAN0618 (Lenovo v330 15IKB)
 ACPI ID

commit 8938fc7b8fe9ccfa11751ead502a8d385b607967 upstream.

Add ELAN0618 to the list of supported touchpads; this ID is used in
Lenovo v330 15IKB devices.

Signed-off-by: Alexandr Savca <alexandr.savca@saltedge.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c_core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index aeb8250ab0793..2d6481f3e89b3 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1250,6 +1250,7 @@ static const struct acpi_device_id elan_acpi_id[] = {
 	{ "ELAN060C", 0 },
 	{ "ELAN0611", 0 },
 	{ "ELAN0612", 0 },
+	{ "ELAN0618", 0 },
 	{ "ELAN1000", 0 },
 	{ }
 };

From f4f2b81f250d0f505a033d105cb0c44716569c39 Mon Sep 17 00:00:00 2001
From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Date: Thu, 21 Jun 2018 13:29:44 -0400
Subject: [PATCH 0843/1852] xen: Remove unnecessary BUG_ON from
 __unbind_from_irq()

commit eef04c7b3786ff0c9cb1019278b6c6c2ea0ad4ff upstream.

Commit 910f8befdf5b ("xen/pirq: fix error path cleanup when binding
MSIs") fixed a couple of errors in error cleanup path of
xen_bind_pirq_msi_to_irq(). This cleanup allowed a call to
__unbind_from_irq() with an unbound irq, which would result in
triggering the BUG_ON there.

Since there is really no reason for the BUG_ON (xen_free_irq() can
operate on unbound irqs) we can remove it.

Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: stable@vger.kernel.org
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/xen/events/events_base.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c
index 468961c59fa55..21d679f88dfa5 100644
--- a/drivers/xen/events/events_base.c
+++ b/drivers/xen/events/events_base.c
@@ -637,8 +637,6 @@ static void __unbind_from_irq(unsigned int irq)
 		xen_irq_info_cleanup(info);
 	}
 
-	BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
-
 	xen_free_irq(irq);
 }
 

From 21a0c577d5cb7a414adfe7ac9986fc6a4fc5c011 Mon Sep 17 00:00:00 2001
From: Jan Kara <jack@suse.cz>
Date: Wed, 13 Jun 2018 12:09:22 +0200
Subject: [PATCH 0844/1852] udf: Detect incorrect directory size

commit fa65653e575fbd958bdf5fb9c4a71a324e39510d upstream.

Detect when a directory entry is (possibly partially) beyond directory
size and return EIO in that case since it means the filesystem is
corrupted. Otherwise directory operations can further corrupt the
directory and possibly also oops the kernel.

CC: Anatoly Trosinenko <anatoly.trosinenko@gmail.com>
CC: stable@vger.kernel.org
Reported-and-tested-by: Anatoly Trosinenko <anatoly.trosinenko@gmail.com>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/udf/directory.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/udf/directory.c b/fs/udf/directory.c
index c763fda257bf3..637114e8c7fde 100644
--- a/fs/udf/directory.c
+++ b/fs/udf/directory.c
@@ -150,6 +150,9 @@ struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t *nf_pos,
 			       sizeof(struct fileIdentDesc));
 		}
 	}
+	/* Got last entry outside of dir size - fs is corrupted! */
+	if (*nf_pos > dir->i_size)
+		return NULL;
 	return fi;
 }
 

From 39f9ee9dafdc45f108115b57b0cc9f94599d1b66 Mon Sep 17 00:00:00 2001
From: Ben Hutchings <ben.hutchings@codethink.co.uk>
Date: Tue, 19 Jun 2018 11:17:32 -0700
Subject: [PATCH 0845/1852] Input: elan_i2c_smbus - fix more potential stack
 buffer overflows

commit 50fc7b61959af4b95fafce7fe5dd565199e0b61a upstream.

Commit 40f7090bb1b4 ("Input: elan_i2c_smbus - fix corrupted stack")
fixed most of the functions using i2c_smbus_read_block_data() to
allocate a buffer with the maximum block size.  However three
functions were left unchanged:

* In elan_smbus_initialize(), increase the buffer size in the same
  way.
* In elan_smbus_calibrate_result(), the buffer is provided by the
  caller (calibrate_store()), so introduce a bounce buffer.  Also
  name the result buffer size.
* In elan_smbus_get_report(), the buffer is provided by the caller
  but happens to be the right length.  Add a compile-time assertion
  to ensure this remains the case.

Cc: <stable@vger.kernel.org> # 3.19+
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c.h       |  2 ++
 drivers/input/mouse/elan_i2c_core.c  |  2 +-
 drivers/input/mouse/elan_i2c_smbus.c | 10 ++++++++--
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/input/mouse/elan_i2c.h b/drivers/input/mouse/elan_i2c.h
index c0ec261187328..83dd0ce3ad2a5 100644
--- a/drivers/input/mouse/elan_i2c.h
+++ b/drivers/input/mouse/elan_i2c.h
@@ -27,6 +27,8 @@
 #define ETP_DISABLE_POWER	0x0001
 #define ETP_PRESSURE_OFFSET	25
 
+#define ETP_CALIBRATE_MAX_LEN	3
+
 /* IAP Firmware handling */
 #define ETP_PRODUCT_ID_FORMAT_STRING	"%d.0"
 #define ETP_FW_NAME		"elan_i2c_" ETP_PRODUCT_ID_FORMAT_STRING ".bin"
diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index 2d6481f3e89b3..97f6e05cffce4 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -595,7 +595,7 @@ static ssize_t calibrate_store(struct device *dev,
 	int tries = 20;
 	int retval;
 	int error;
-	u8 val[3];
+	u8 val[ETP_CALIBRATE_MAX_LEN];
 
 	retval = mutex_lock_interruptible(&data->sysfs_mutex);
 	if (retval)
diff --git a/drivers/input/mouse/elan_i2c_smbus.c b/drivers/input/mouse/elan_i2c_smbus.c
index 25dba1d7aa57f..2ac85f5cbf313 100644
--- a/drivers/input/mouse/elan_i2c_smbus.c
+++ b/drivers/input/mouse/elan_i2c_smbus.c
@@ -56,7 +56,7 @@
 static int elan_smbus_initialize(struct i2c_client *client)
 {
 	u8 check[ETP_SMBUS_HELLOPACKET_LEN] = { 0x55, 0x55, 0x55, 0x55, 0x55 };
-	u8 values[ETP_SMBUS_HELLOPACKET_LEN] = { 0, 0, 0, 0, 0 };
+	u8 values[I2C_SMBUS_BLOCK_MAX] = {0};
 	int len, error;
 
 	/* Get hello packet */
@@ -117,12 +117,16 @@ static int elan_smbus_calibrate(struct i2c_client *client)
 static int elan_smbus_calibrate_result(struct i2c_client *client, u8 *val)
 {
 	int error;
+	u8 buf[I2C_SMBUS_BLOCK_MAX] = {0};
+
+	BUILD_BUG_ON(ETP_CALIBRATE_MAX_LEN > sizeof(buf));
 
 	error = i2c_smbus_read_block_data(client,
-					  ETP_SMBUS_CALIBRATE_QUERY, val);
+					  ETP_SMBUS_CALIBRATE_QUERY, buf);
 	if (error < 0)
 		return error;
 
+	memcpy(val, buf, ETP_CALIBRATE_MAX_LEN);
 	return 0;
 }
 
@@ -466,6 +470,8 @@ static int elan_smbus_get_report(struct i2c_client *client, u8 *report)
 {
 	int len;
 
+	BUILD_BUG_ON(I2C_SMBUS_BLOCK_MAX > ETP_SMBUS_REPORT_LEN);
+
 	len = i2c_smbus_read_block_data(client,
 					ETP_SMBUS_PACKET_QUERY,
 					&report[ETP_SMBUS_REPORT_OFFSET]);

From b1b5a12f0275716b925287c7e8110243b3f1c692 Mon Sep 17 00:00:00 2001
From: Aaron Ma <aaron.ma@canonical.com>
Date: Thu, 21 Jun 2018 17:14:01 -0700
Subject: [PATCH 0846/1852] Input: elantech - enable middle button of touchpads
 on ThinkPad P52

commit 24bb555e6e46d96e2a954aa0295029a81cc9bbaa upstream.

PNPID is better way to identify the type of touchpads.
Enable middle button support on 2 types of touchpads on Lenovo P52.

Cc: stable@vger.kernel.org
Signed-off-by: Aaron Ma <aaron.ma@canonical.com>
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elantech.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index 06ea28e5d7b4c..706442f4a3d0c 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -1177,6 +1177,12 @@ static const struct dmi_system_id elantech_dmi_has_middle_button[] = {
 	{ }
 };
 
+static const char * const middle_button_pnp_ids[] = {
+	"LEN2131", /* ThinkPad P52 w/ NFC */
+	"LEN2132", /* ThinkPad P52 */
+	NULL
+};
+
 /*
  * Set the appropriate event bits for the input subsystem
  */
@@ -1196,7 +1202,8 @@ static int elantech_set_input_params(struct psmouse *psmouse)
 	__clear_bit(EV_REL, dev->evbit);
 
 	__set_bit(BTN_LEFT, dev->keybit);
-	if (dmi_check_system(elantech_dmi_has_middle_button))
+	if (dmi_check_system(elantech_dmi_has_middle_button) ||
+			psmouse_matches_pnp_id(psmouse, middle_button_pnp_ids))
 		__set_bit(BTN_MIDDLE, dev->keybit);
 	__set_bit(BTN_RIGHT, dev->keybit);
 

From 1b0ee778e451593af06afb2fb1852d3ba6deea9d Mon Sep 17 00:00:00 2001
From: ??? <kt.liao@emc.com.tw>
Date: Thu, 21 Jun 2018 17:15:32 -0700
Subject: [PATCH 0847/1852] Input: elantech - fix V4 report decoding for module
 with middle key

commit e0ae2519ca004a628fa55aeef969c37edce522d3 upstream.

Some touchpad has middle key and it will be indicated in bit 2 of packet[0].
We need to fix V4 formation's byte mask to prevent error decoding.

Signed-off-by: KT Liao <kt.liao@emc.com.tw>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elantech.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index 706442f4a3d0c..174bb52c578bf 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -804,7 +804,7 @@ static int elantech_packet_check_v4(struct psmouse *psmouse)
 	else if (ic_version == 7 && etd->samples[1] == 0x2A)
 		sanity_check = ((packet[3] & 0x1c) == 0x10);
 	else
-		sanity_check = ((packet[0] & 0x0c) == 0x04 &&
+		sanity_check = ((packet[0] & 0x08) == 0x00 &&
 				(packet[3] & 0x1c) == 0x10);
 
 	if (!sanity_check)

From 5b69338ccd3859dd0fc6c2d75d889a292f5e8ba6 Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Fri, 22 Jun 2018 12:17:45 +0200
Subject: [PATCH 0848/1852] ALSA: hda/realtek - Add a quirk for FSC ESPRIMO
 U9210

commit 275ec0cb946cb75ac8977f662e608fce92f8b8a8 upstream.

Fujitsu Seimens ESPRIMO Mobile U9210 requires the same fixup as H270
for the correct pin configs.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200107
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_realtek.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 580b8943b965c..d706a416b5873 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -2447,6 +2447,7 @@ static const struct snd_pci_quirk alc262_fixup_tbl[] = {
 	SND_PCI_QUIRK(0x10cf, 0x1397, "Fujitsu Lifebook S7110", ALC262_FIXUP_FSC_S7110),
 	SND_PCI_QUIRK(0x10cf, 0x142d, "Fujitsu Lifebook E8410", ALC262_FIXUP_BENQ),
 	SND_PCI_QUIRK(0x10f1, 0x2915, "Tyan Thunder n6650W", ALC262_FIXUP_TYAN),
+	SND_PCI_QUIRK(0x1734, 0x1141, "FSC ESPRIMO U9210", ALC262_FIXUP_FSC_H270),
 	SND_PCI_QUIRK(0x1734, 0x1147, "FSC Celsius H270", ALC262_FIXUP_FSC_H270),
 	SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000", ALC262_FIXUP_LENOVO_3000),
 	SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_FIXUP_BENQ),

From 137cbb944b57da985f00602d38628f5944e06c92 Mon Sep 17 00:00:00 2001
From: Liu Bo <bo.li.liu@oracle.com>
Date: Wed, 31 Jan 2018 17:09:13 -0700
Subject: [PATCH 0849/1852] Btrfs: fix unexpected cow in run_delalloc_nocow

commit 5811375325420052fcadd944792a416a43072b7f upstream.

Fstests generic/475 provides a way to fail metadata reads while
checking if checksum exists for the inode inside run_delalloc_nocow(),
and csum_exist_in_range() interprets error (-EIO) as inode having
checksum and makes its caller enter the cow path.

In case of free space inode, this ends up with a warning in
cow_file_range().

The same problem applies to btrfs_cross_ref_exist() since it may also
read metadata in between.

With this, run_delalloc_nocow() bails out when errors occur at the two
places.

cc: <stable@vger.kernel.org> v2.6.28+
Fixes: 17d217fe970d ("Btrfs: fix nodatasum handling in balancing code")
Signed-off-by: Liu Bo <bo.li.liu@oracle.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/inode.c | 33 ++++++++++++++++++++++++++++++---
 1 file changed, 30 insertions(+), 3 deletions(-)

diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 1f01a8172308a..b895be3d43112 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -1202,6 +1202,8 @@ static noinline int csum_exist_in_range(struct btrfs_root *root,
 		list_del(&sums->list);
 		kfree(sums);
 	}
+	if (ret < 0)
+		return ret;
 	return 1;
 }
 
@@ -1351,10 +1353,23 @@ static noinline int run_delalloc_nocow(struct inode *inode,
 				goto out_check;
 			if (btrfs_extent_readonly(root, disk_bytenr))
 				goto out_check;
-			if (btrfs_cross_ref_exist(trans, root, ino,
+			ret = btrfs_cross_ref_exist(trans, root, ino,
 						  found_key.offset -
-						  extent_offset, disk_bytenr))
+						  extent_offset, disk_bytenr);
+			if (ret) {
+				/*
+				 * ret could be -EIO if the above fails to read
+				 * metadata.
+				 */
+				if (ret < 0) {
+					if (cow_start != (u64)-1)
+						cur_offset = cow_start;
+					goto error;
+				}
+
+				WARN_ON_ONCE(nolock);
 				goto out_check;
+			}
 			disk_bytenr += extent_offset;
 			disk_bytenr += cur_offset - found_key.offset;
 			num_bytes = min(end + 1, extent_end) - cur_offset;
@@ -1372,8 +1387,20 @@ static noinline int run_delalloc_nocow(struct inode *inode,
 			 * this ensure that csum for a given extent are
 			 * either valid or do not exist.
 			 */
-			if (csum_exist_in_range(root, disk_bytenr, num_bytes))
+			ret = csum_exist_in_range(root, disk_bytenr, num_bytes);
+			if (ret) {
+				/*
+				 * ret could be -EIO if the above fails to read
+				 * metadata.
+				 */
+				if (ret < 0) {
+					if (cow_start != (u64)-1)
+						cur_offset = cow_start;
+					goto error;
+				}
+				WARN_ON_ONCE(nolock);
 				goto out_check;
+			}
 			nocow = 1;
 		} else if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
 			extent_end = found_key.offset +

From c3966ecdc19864381dd9c6077cdec7a7e4ea2f02 Mon Sep 17 00:00:00 2001
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: Fri, 2 Mar 2018 15:55:09 +0100
Subject: [PATCH 0850/1852] spi: Fix scatterlist elements size in spi_map_buf

commit ce99319a182fe766be67f96338386f3ec73e321c upstream.

When SPI transfers can be offloaded using DMA, the SPI core need to
build a scatterlist to make sure that the buffer to be transferred is
dma-able.

This patch fixes the scatterlist entry size computation in the case
where the maximum acceptable scatterlist entry supported by the DMA
controller is less than PAGE_SIZE, when the buffer is vmalloced.

For each entry, the actual size is given by the minimum between the
desc_len (which is the max buffer size supported by the DMA controller)
and the remaining buffer length until we cross a page boundary.

Fixes: 65598c13fd66 ("spi: Fix per-page mapping of unaligned vmalloc-ed buffer")
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/spi/spi.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index dee1cb87d24f4..04fd651f9e3e3 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -707,8 +707,14 @@ static int spi_map_buf(struct spi_master *master, struct device *dev,
 	for (i = 0; i < sgs; i++) {
 
 		if (vmalloced_buf) {
-			min = min_t(size_t,
-				    len, desc_len - offset_in_page(buf));
+			/*
+			 * Next scatterlist entry size is the minimum between
+			 * the desc_len and the remaining buffer length that
+			 * fits in a page.
+			 */
+			min = min_t(size_t, desc_len,
+				    min_t(size_t, len,
+					  PAGE_SIZE - offset_in_page(buf)));
 			vm_page = vmalloc_to_page(buf);
 			if (!vm_page) {
 				sg_free_table(sgt);

From 51b2727da83cdac78b10ebc47dc462d746796896 Mon Sep 17 00:00:00 2001
From: Keith Busch <keith.busch@intel.com>
Date: Tue, 26 Jun 2018 09:14:58 -0600
Subject: [PATCH 0851/1852] block: Fix transfer when chunk sectors exceeds max

commit 15bfd21fbc5d35834b9ea383dc458a1f0c9e3434 upstream.

A device may have boundary restrictions where the number of sectors
between boundaries exceeds its max transfer size. In this case, we need
to cap the max size to the smaller of the two limits.

Reported-by: Jitendra Bhivare <jitendra.bhivare@broadcom.com>
Tested-by: Jitendra Bhivare <jitendra.bhivare@broadcom.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/blkdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index e4c22be9108e0..490d06de44b50 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -885,8 +885,8 @@ static inline unsigned int blk_max_size_offset(struct request_queue *q,
 	if (!q->limits.chunk_sectors)
 		return q->limits.max_sectors;
 
-	return q->limits.chunk_sectors -
-			(offset & (q->limits.chunk_sectors - 1));
+	return min(q->limits.max_sectors, (unsigned int)(q->limits.chunk_sectors -
+			(offset & (q->limits.chunk_sectors - 1))));
 }
 
 static inline unsigned int blk_rq_get_max_sectors(struct request *rq)

From aac6967accde7f3738047cf6803293d0f70bea69 Mon Sep 17 00:00:00 2001
From: Mike Snitzer <snitzer@redhat.com>
Date: Tue, 26 Jun 2018 12:04:23 -0400
Subject: [PATCH 0852/1852] dm thin: handle running out of data space vs
 concurrent discard

commit a685557fbbc3122ed11e8ad3fa63a11ebc5de8c3 upstream.

Discards issued to a DM thin device can complete to userspace (via
fstrim) _before_ the metadata changes associated with the discards is
reflected in the thinp superblock (e.g. free blocks).  As such, if a
user constructs a test that loops repeatedly over these steps, block
allocation can fail due to discards not having completed yet:
1) fill thin device via filesystem file
2) remove file
3) fstrim

From initial report, here:
https://www.redhat.com/archives/dm-devel/2018-April/msg00022.html

"The root cause of this issue is that dm-thin will first remove
mapping and increase corresponding blocks' reference count to prevent
them from being reused before DISCARD bios get processed by the
underlying layers. However. increasing blocks' reference count could
also increase the nr_allocated_this_transaction in struct sm_disk
which makes smd->old_ll.nr_allocated +
smd->nr_allocated_this_transaction bigger than smd->old_ll.nr_blocks.
In this case, alloc_data_block() will never commit metadata to reset
the begin pointer of struct sm_disk, because sm_disk_get_nr_free()
always return an underflow value."

While there is room for improvement to the space-map accounting that
thinp is making use of: the reality is this test is inherently racey and
will result in the previous iteration's fstrim's discard(s) completing
vs concurrent block allocation, via dd, in the next iteration of the
loop.

No amount of space map accounting improvements will be able to allow
user's to use a block before a discard of that block has completed.

So the best we can really do is allow DM thinp to gracefully handle such
aggressive use of all the pool's data by degrading the pool into
out-of-data-space (OODS) mode.  We _should_ get that behaviour already
(if space map accounting didn't falsely cause alloc_data_block() to
believe free space was available).. but short of that we handle the
current reality that dm_pool_alloc_data_block() can return -ENOSPC.

Reported-by: Dennis Yang <dennisyang@qnap.com>
Cc: stable@vger.kernel.org
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/dm-thin.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index a1cc797fe88f4..315767e8ae4da 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -1299,6 +1299,8 @@ static void schedule_external_copy(struct thin_c *tc, dm_block_t virt_block,
 
 static void set_pool_mode(struct pool *pool, enum pool_mode new_mode);
 
+static void requeue_bios(struct pool *pool);
+
 static void check_for_space(struct pool *pool)
 {
 	int r;
@@ -1311,8 +1313,10 @@ static void check_for_space(struct pool *pool)
 	if (r)
 		return;
 
-	if (nr_free)
+	if (nr_free) {
 		set_pool_mode(pool, PM_WRITE);
+		requeue_bios(pool);
+	}
 }
 
 /*
@@ -1389,7 +1393,10 @@ static int alloc_data_block(struct thin_c *tc, dm_block_t *result)
 
 	r = dm_pool_alloc_data_block(pool->pmd, result);
 	if (r) {
-		metadata_operation_failed(pool, "dm_pool_alloc_data_block", r);
+		if (r == -ENOSPC)
+			set_pool_mode(pool, PM_OUT_OF_DATA_SPACE);
+		else
+			metadata_operation_failed(pool, "dm_pool_alloc_data_block", r);
 		return r;
 	}
 

From e6717395de695936d55e7a95cc39a8c3146e0c1c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
Date: Fri, 8 Jun 2018 09:15:24 +0200
Subject: [PATCH 0853/1852] cdc_ncm: avoid padding beyond end of skb
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 49c2c3f246e2fc3009039e31a826333dcd0283cd upstream.

Commit 4a0e3e989d66 ("cdc_ncm: Add support for moving NDP to end
of NCM frame") added logic to reserve space for the NDP at the
end of the NTB/skb.  This reservation did not take the final
alignment of the NDP into account, causing us to reserve too
little space. Additionally the padding prior to NDP addition did
not ensure there was enough space for the NDP.

The NTB/skb with the NDP appended would then exceed the configured
max size. This caused the final padding of the NTB to use a
negative count, padding to almost INT_MAX, and resulting in:

[60103.825970] BUG: unable to handle kernel paging request at ffff9641f2004000
[60103.825998] IP: __memset+0x24/0x30
[60103.826001] PGD a6a06067 P4D a6a06067 PUD 4f65a063 PMD 72003063 PTE 0
[60103.826013] Oops: 0002 [#1] SMP NOPTI
[60103.826018] Modules linked in: (removed(
[60103.826158] CPU: 0 PID: 5990 Comm: Chrome_DevTools Tainted: G           O 4.14.0-3-amd64 #1 Debian 4.14.17-1
[60103.826162] Hardware name: LENOVO 20081 BIOS 41CN28WW(V2.04) 05/03/2012
[60103.826166] task: ffff964193484fc0 task.stack: ffffb2890137c000
[60103.826171] RIP: 0010:__memset+0x24/0x30
[60103.826174] RSP: 0000:ffff964316c03b68 EFLAGS: 00010216
[60103.826178] RAX: 0000000000000000 RBX: 00000000fffffffd RCX: 000000001ffa5000
[60103.826181] RDX: 0000000000000005 RSI: 0000000000000000 RDI: ffff9641f2003ffc
[60103.826184] RBP: ffff964192f6c800 R08: 00000000304d434e R09: ffff9641f1d2c004
[60103.826187] R10: 0000000000000002 R11: 00000000000005ae R12: ffff9642e6957a80
[60103.826190] R13: ffff964282ff2ee8 R14: 000000000000000d R15: ffff9642e4843900
[60103.826194] FS:  00007f395aaf6700(0000) GS:ffff964316c00000(0000) knlGS:0000000000000000
[60103.826197] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[60103.826200] CR2: ffff9641f2004000 CR3: 0000000013b0c000 CR4: 00000000000006f0
[60103.826204] Call Trace:
[60103.826212]  <IRQ>
[60103.826225]  cdc_ncm_fill_tx_frame+0x5e3/0x740 [cdc_ncm]
[60103.826236]  cdc_ncm_tx_fixup+0x57/0x70 [cdc_ncm]
[60103.826246]  usbnet_start_xmit+0x5d/0x710 [usbnet]
[60103.826254]  ? netif_skb_features+0x119/0x250
[60103.826259]  dev_hard_start_xmit+0xa1/0x200
[60103.826267]  sch_direct_xmit+0xf2/0x1b0
[60103.826273]  __dev_queue_xmit+0x5e3/0x7c0
[60103.826280]  ? ip_finish_output2+0x263/0x3c0
[60103.826284]  ip_finish_output2+0x263/0x3c0
[60103.826289]  ? ip_output+0x6c/0xe0
[60103.826293]  ip_output+0x6c/0xe0
[60103.826298]  ? ip_forward_options+0x1a0/0x1a0
[60103.826303]  tcp_transmit_skb+0x516/0x9b0
[60103.826309]  tcp_write_xmit+0x1aa/0xee0
[60103.826313]  ? sch_direct_xmit+0x71/0x1b0
[60103.826318]  tcp_tasklet_func+0x177/0x180
[60103.826325]  tasklet_action+0x5f/0x110
[60103.826332]  __do_softirq+0xde/0x2b3
[60103.826337]  irq_exit+0xae/0xb0
[60103.826342]  do_IRQ+0x81/0xd0
[60103.826347]  common_interrupt+0x98/0x98
[60103.826351]  </IRQ>
[60103.826355] RIP: 0033:0x7f397bdf2282
[60103.826358] RSP: 002b:00007f395aaf57d8 EFLAGS: 00000206 ORIG_RAX: ffffffffffffff6e
[60103.826362] RAX: 0000000000000000 RBX: 00002f07bc6d0900 RCX: 00007f39752d7fe7
[60103.826365] RDX: 0000000000000022 RSI: 0000000000000147 RDI: 00002f07baea02c0
[60103.826368] RBP: 0000000000000001 R08: 0000000000000000 R09: 0000000000000000
[60103.826371] R10: 00000000ffffffff R11: 0000000000000000 R12: 00002f07baea02c0
[60103.826373] R13: 00002f07bba227a0 R14: 00002f07bc6d090c R15: 0000000000000000
[60103.826377] Code: 90 90 90 90 90 90 90 0f 1f 44 00 00 49 89 f9 48 89 d1 83
e2 07 48 c1 e9 03 40 0f b6 f6 48 b8 01 01 01 01 01 01 01 01 48 0f af c6 <f3> 48
ab 89 d1 f3 aa 4c 89 c8 c3 90 49 89 f9 40 88 f0 48 89 d1
[60103.826442] RIP: __memset+0x24/0x30 RSP: ffff964316c03b68
[60103.826444] CR2: ffff9641f2004000

Commit e1069bbfcf3b ("net: cdc_ncm: Reduce memory use when kernel
memory low") made this bug much more likely to trigger by reducing
the NTB size under memory pressure.

Link: https://bugs.debian.org/893393
Reported-by: Горбешко Богдан <bodqhrohro@gmail.com>
Reported-and-tested-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Cc: Enrico Mioso <mrkiko.rs@gmail.com>
Fixes: 4a0e3e989d66 ("cdc_ncm: Add support for moving NDP to end of NCM frame")
[ bmork:  tx_curr_size => tx_max and context fixup for v4.12 and older ]
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/cdc_ncm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index c8e98c8e29fac..36e1377fc9540 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -1075,7 +1075,7 @@ cdc_ncm_fill_tx_frame(struct usbnet *dev, struct sk_buff *skb, __le32 sign)
 	 * accordingly. Otherwise, we should check here.
 	 */
 	if (ctx->drvflags & CDC_NCM_FLAG_NDP_TO_END)
-		delayed_ndp_size = ctx->max_ndp_size;
+		delayed_ndp_size = ALIGN(ctx->max_ndp_size, ctx->tx_ndp_modulus);
 	else
 		delayed_ndp_size = 0;
 
@@ -1208,7 +1208,7 @@ cdc_ncm_fill_tx_frame(struct usbnet *dev, struct sk_buff *skb, __le32 sign)
 	/* If requested, put NDP at end of frame. */
 	if (ctx->drvflags & CDC_NCM_FLAG_NDP_TO_END) {
 		nth16 = (struct usb_cdc_ncm_nth16 *)skb_out->data;
-		cdc_ncm_align_tail(skb_out, ctx->tx_ndp_modulus, 0, ctx->tx_max);
+		cdc_ncm_align_tail(skb_out, ctx->tx_ndp_modulus, 0, ctx->tx_max - ctx->max_ndp_size);
 		nth16->wNdpIndex = cpu_to_le16(skb_out->len);
 		memcpy(skb_put(skb_out, ctx->max_ndp_size), ctx->delayed_ndp16, ctx->max_ndp_size);
 

From 8ad8e8f6ede8a02d90fb5fdd126a87f2842fe35d Mon Sep 17 00:00:00 2001
From: Szymon Janc <szymon.janc@codecoup.pl>
Date: Tue, 3 Apr 2018 13:40:06 +0200
Subject: [PATCH 0854/1852] Bluetooth: Fix connection if directed advertising
 and privacy is used

commit 082f2300cfa1a3d9d5221c38c5eba85d4ab98bd8 upstream.

Local random address needs to be updated before creating connection if
RPA from LE Direct Advertising Report was resolved in host. Otherwise
remote device might ignore connection request due to address mismatch.

This was affecting following qualification test cases:
GAP/CONN/SCEP/BV-03-C, GAP/CONN/GCEP/BV-05-C, GAP/CONN/DCEP/BV-05-C

Before patch:
< HCI Command: LE Set Random Address (0x08|0x0005) plen 6          #11350 [hci0] 84680.231216
        Address: 56:BC:E8:24:11:68 (Resolvable)
          Identity type: Random (0x01)
          Identity: F2:F1:06:3D:9C:42 (Static)
> HCI Event: Command Complete (0x0e) plen 4                        #11351 [hci0] 84680.246022
      LE Set Random Address (0x08|0x0005) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Set Scan Parameters (0x08|0x000b) plen 7         #11352 [hci0] 84680.246417
        Type: Passive (0x00)
        Interval: 60.000 msec (0x0060)
        Window: 30.000 msec (0x0030)
        Own address type: Random (0x01)
        Filter policy: Accept all advertisement, inc. directed unresolved RPA (0x02)
> HCI Event: Command Complete (0x0e) plen 4                        #11353 [hci0] 84680.248854
      LE Set Scan Parameters (0x08|0x000b) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Set Scan Enable (0x08|0x000c) plen 2             #11354 [hci0] 84680.249466
        Scanning: Enabled (0x01)
        Filter duplicates: Enabled (0x01)
> HCI Event: Command Complete (0x0e) plen 4                        #11355 [hci0] 84680.253222
      LE Set Scan Enable (0x08|0x000c) ncmd 1
        Status: Success (0x00)
> HCI Event: LE Meta Event (0x3e) plen 18                          #11356 [hci0] 84680.458387
      LE Direct Advertising Report (0x0b)
        Num reports: 1
        Event type: Connectable directed - ADV_DIRECT_IND (0x01)
        Address type: Random (0x01)
        Address: 53:38:DA:46:8C:45 (Resolvable)
          Identity type: Public (0x00)
          Identity: 11:22:33:44:55:66 (OUI 11-22-33)
        Direct address type: Random (0x01)
        Direct address: 7C:D6:76:8C:DF:82 (Resolvable)
          Identity type: Random (0x01)
          Identity: F2:F1:06:3D:9C:42 (Static)
        RSSI: -74 dBm (0xb6)
< HCI Command: LE Set Scan Enable (0x08|0x000c) plen 2             #11357 [hci0] 84680.458737
        Scanning: Disabled (0x00)
        Filter duplicates: Disabled (0x00)
> HCI Event: Command Complete (0x0e) plen 4                        #11358 [hci0] 84680.469982
      LE Set Scan Enable (0x08|0x000c) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Create Connection (0x08|0x000d) plen 25          #11359 [hci0] 84680.470444
        Scan interval: 60.000 msec (0x0060)
        Scan window: 60.000 msec (0x0060)
        Filter policy: White list is not used (0x00)
        Peer address type: Random (0x01)
        Peer address: 53:38:DA:46:8C:45 (Resolvable)
          Identity type: Public (0x00)
          Identity: 11:22:33:44:55:66 (OUI 11-22-33)
        Own address type: Random (0x01)
        Min connection interval: 30.00 msec (0x0018)
        Max connection interval: 50.00 msec (0x0028)
        Connection latency: 0 (0x0000)
        Supervision timeout: 420 msec (0x002a)
        Min connection length: 0.000 msec (0x0000)
        Max connection length: 0.000 msec (0x0000)
> HCI Event: Command Status (0x0f) plen 4                          #11360 [hci0] 84680.474971
      LE Create Connection (0x08|0x000d) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Create Connection Cancel (0x08|0x000e) plen 0    #11361 [hci0] 84682.545385
> HCI Event: Command Complete (0x0e) plen 4                        #11362 [hci0] 84682.551014
      LE Create Connection Cancel (0x08|0x000e) ncmd 1
        Status: Success (0x00)
> HCI Event: LE Meta Event (0x3e) plen 19                          #11363 [hci0] 84682.551074
      LE Connection Complete (0x01)
        Status: Unknown Connection Identifier (0x02)
        Handle: 0
        Role: Master (0x00)
        Peer address type: Public (0x00)
        Peer address: 00:00:00:00:00:00 (OUI 00-00-00)
        Connection interval: 0.00 msec (0x0000)
        Connection latency: 0 (0x0000)
        Supervision timeout: 0 msec (0x0000)
        Master clock accuracy: 0x00

After patch:
< HCI Command: LE Set Scan Parameters (0x08|0x000b) plen 7    #210 [hci0] 667.152459
        Type: Passive (0x00)
        Interval: 60.000 msec (0x0060)
        Window: 30.000 msec (0x0030)
        Own address type: Random (0x01)
        Filter policy: Accept all advertisement, inc. directed unresolved RPA (0x02)
> HCI Event: Command Complete (0x0e) plen 4                   #211 [hci0] 667.153613
      LE Set Scan Parameters (0x08|0x000b) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Set Scan Enable (0x08|0x000c) plen 2        #212 [hci0] 667.153704
        Scanning: Enabled (0x01)
        Filter duplicates: Enabled (0x01)
> HCI Event: Command Complete (0x0e) plen 4                   #213 [hci0] 667.154584
      LE Set Scan Enable (0x08|0x000c) ncmd 1
        Status: Success (0x00)
> HCI Event: LE Meta Event (0x3e) plen 18                     #214 [hci0] 667.182619
      LE Direct Advertising Report (0x0b)
        Num reports: 1
        Event type: Connectable directed - ADV_DIRECT_IND (0x01)
        Address type: Random (0x01)
        Address: 50:52:D9:A6:48:A0 (Resolvable)
          Identity type: Public (0x00)
          Identity: 11:22:33:44:55:66 (OUI 11-22-33)
        Direct address type: Random (0x01)
        Direct address: 7C:C1:57:A5:B7:A8 (Resolvable)
          Identity type: Random (0x01)
          Identity: F4:28:73:5D:38:B0 (Static)
        RSSI: -70 dBm (0xba)
< HCI Command: LE Set Scan Enable (0x08|0x000c) plen 2       #215 [hci0] 667.182704
        Scanning: Disabled (0x00)
        Filter duplicates: Disabled (0x00)
> HCI Event: Command Complete (0x0e) plen 4                  #216 [hci0] 667.183599
      LE Set Scan Enable (0x08|0x000c) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Set Random Address (0x08|0x0005) plen 6    #217 [hci0] 667.183645
        Address: 7C:C1:57:A5:B7:A8 (Resolvable)
          Identity type: Random (0x01)
          Identity: F4:28:73:5D:38:B0 (Static)
> HCI Event: Command Complete (0x0e) plen 4                  #218 [hci0] 667.184590
      LE Set Random Address (0x08|0x0005) ncmd 1
        Status: Success (0x00)
< HCI Command: LE Create Connection (0x08|0x000d) plen 25    #219 [hci0] 667.184613
        Scan interval: 60.000 msec (0x0060)
        Scan window: 60.000 msec (0x0060)
        Filter policy: White list is not used (0x00)
        Peer address type: Random (0x01)
        Peer address: 50:52:D9:A6:48:A0 (Resolvable)
          Identity type: Public (0x00)
          Identity: 11:22:33:44:55:66 (OUI 11-22-33)
        Own address type: Random (0x01)
        Min connection interval: 30.00 msec (0x0018)
        Max connection interval: 50.00 msec (0x0028)
        Connection latency: 0 (0x0000)
        Supervision timeout: 420 msec (0x002a)
        Min connection length: 0.000 msec (0x0000)
        Max connection length: 0.000 msec (0x0000)
> HCI Event: Command Status (0x0f) plen 4                    #220 [hci0] 667.186558
      LE Create Connection (0x08|0x000d) ncmd 1
        Status: Success (0x00)
> HCI Event: LE Meta Event (0x3e) plen 19                    #221 [hci0] 667.485824
      LE Connection Complete (0x01)
        Status: Success (0x00)
        Handle: 0
        Role: Master (0x00)
        Peer address type: Random (0x01)
        Peer address: 50:52:D9:A6:48:A0 (Resolvable)
          Identity type: Public (0x00)
          Identity: 11:22:33:44:55:66 (OUI 11-22-33)
        Connection interval: 50.00 msec (0x0028)
        Connection latency: 0 (0x0000)
        Supervision timeout: 420 msec (0x002a)
        Master clock accuracy: 0x07
@ MGMT Event: Device Connected (0x000b) plen 13          {0x0002} [hci0] 667.485996
        LE Address: 11:22:33:44:55:66 (OUI 11-22-33)
        Flags: 0x00000000
        Data length: 0

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Cc: stable@vger.kernel.org
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/bluetooth/hci_core.h |  2 +-
 net/bluetooth/hci_conn.c         | 27 ++++++++++++++++++++-------
 net/bluetooth/hci_event.c        | 15 +++++++++++----
 3 files changed, 32 insertions(+), 12 deletions(-)

diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index 1878d0a96333c..876688b5a356c 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -878,7 +878,7 @@ struct hci_conn *hci_connect_le_scan(struct hci_dev *hdev, bdaddr_t *dst,
 				     u16 conn_timeout, u8 role);
 struct hci_conn *hci_connect_le(struct hci_dev *hdev, bdaddr_t *dst,
 				u8 dst_type, u8 sec_level, u16 conn_timeout,
-				u8 role);
+				u8 role, bdaddr_t *direct_rpa);
 struct hci_conn *hci_connect_acl(struct hci_dev *hdev, bdaddr_t *dst,
 				 u8 sec_level, u8 auth_type);
 struct hci_conn *hci_connect_sco(struct hci_dev *hdev, int type, bdaddr_t *dst,
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 24e9410923d04..80be0ee17ff34 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -708,7 +708,8 @@ static void create_le_conn_complete(struct hci_dev *hdev, u8 status, u16 opcode)
 }
 
 static void hci_req_add_le_create_conn(struct hci_request *req,
-				       struct hci_conn *conn)
+				       struct hci_conn *conn,
+				       bdaddr_t *direct_rpa)
 {
 	struct hci_cp_le_create_conn cp;
 	struct hci_dev *hdev = conn->hdev;
@@ -716,11 +717,23 @@ static void hci_req_add_le_create_conn(struct hci_request *req,
 
 	memset(&cp, 0, sizeof(cp));
 
-	/* Update random address, but set require_privacy to false so
-	 * that we never connect with an non-resolvable address.
+	/* If direct address was provided we use it instead of current
+	 * address.
 	 */
-	if (hci_update_random_address(req, false, &own_addr_type))
-		return;
+	if (direct_rpa) {
+		if (bacmp(&req->hdev->random_addr, direct_rpa))
+			hci_req_add(req, HCI_OP_LE_SET_RANDOM_ADDR, 6,
+								direct_rpa);
+
+		/* direct address is always RPA */
+		own_addr_type = ADDR_LE_DEV_RANDOM;
+	} else {
+		/* Update random address, but set require_privacy to false so
+		 * that we never connect with an non-resolvable address.
+		 */
+		if (hci_update_random_address(req, false, &own_addr_type))
+			return;
+	}
 
 	/* Set window to be the same value as the interval to enable
 	 * continuous scanning.
@@ -782,7 +795,7 @@ static void hci_req_directed_advertising(struct hci_request *req,
 
 struct hci_conn *hci_connect_le(struct hci_dev *hdev, bdaddr_t *dst,
 				u8 dst_type, u8 sec_level, u16 conn_timeout,
-				u8 role)
+				u8 role, bdaddr_t *direct_rpa)
 {
 	struct hci_conn_params *params;
 	struct hci_conn *conn, *conn_unfinished;
@@ -913,7 +926,7 @@ struct hci_conn *hci_connect_le(struct hci_dev *hdev, bdaddr_t *dst,
 		hci_dev_set_flag(hdev, HCI_LE_SCAN_INTERRUPTED);
 	}
 
-	hci_req_add_le_create_conn(&req, conn);
+	hci_req_add_le_create_conn(&req, conn, direct_rpa);
 
 create_conn:
 	err = hci_req_run(&req, create_le_conn_complete);
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index d57c11c1c6b54..d40d32a2c12df 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -4632,7 +4632,8 @@ static void hci_le_conn_update_complete_evt(struct hci_dev *hdev,
 /* This function requires the caller holds hdev->lock */
 static struct hci_conn *check_pending_le_conn(struct hci_dev *hdev,
 					      bdaddr_t *addr,
-					      u8 addr_type, u8 adv_type)
+					      u8 addr_type, u8 adv_type,
+					      bdaddr_t *direct_rpa)
 {
 	struct hci_conn *conn;
 	struct hci_conn_params *params;
@@ -4683,7 +4684,8 @@ static struct hci_conn *check_pending_le_conn(struct hci_dev *hdev,
 	}
 
 	conn = hci_connect_le(hdev, addr, addr_type, BT_SECURITY_LOW,
-			      HCI_LE_AUTOCONN_TIMEOUT, HCI_ROLE_MASTER);
+			      HCI_LE_AUTOCONN_TIMEOUT, HCI_ROLE_MASTER,
+			      direct_rpa);
 	if (!IS_ERR(conn)) {
 		/* If HCI_AUTO_CONN_EXPLICIT is set, conn is already owned
 		 * by higher layer that tried to connect, if no then
@@ -4780,8 +4782,13 @@ static void process_adv_report(struct hci_dev *hdev, u8 type, bdaddr_t *bdaddr,
 		bdaddr_type = irk->addr_type;
 	}
 
-	/* Check if we have been requested to connect to this device */
-	conn = check_pending_le_conn(hdev, bdaddr, bdaddr_type, type);
+	/* Check if we have been requested to connect to this device.
+	 *
+	 * direct_addr is set only for directed advertising reports (it is NULL
+	 * for advertising reports) and is already verified to be RPA above.
+	 */
+	conn = check_pending_le_conn(hdev, bdaddr, bdaddr_type, type,
+								direct_addr);
 	if (conn && type == LE_ADV_IND) {
 		/* Store report for later inclusion by
 		 * mgmt_device_connected

From 0f7e2bbb3e66d0935d5e81f402b6f1032c15ad39 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Tue, 3 Jul 2018 11:21:35 +0200
Subject: [PATCH 0855/1852] Linux 4.4.139

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 5e639f9f601de..0fffe8b787204 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 138
+SUBLEVEL = 139
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 6992e1b9db9f4802663e481c439dd7f6bb427f68 Mon Sep 17 00:00:00 2001
From: Houston Yaroschoff <hstn@4ever3.net>
Date: Mon, 11 Jun 2018 12:39:09 +0200
Subject: [PATCH 0856/1852] usb: cdc_acm: Add quirk for Uniden UBC125 scanner

commit 4a762569a2722b8a48066c7bacf0e1dc67d17fa1 upstream.

Uniden UBC125 radio scanner has USB interface which fails to work
with cdc_acm driver:
  usb 1-1.5: new full-speed USB device number 4 using xhci_hcd
  cdc_acm 1-1.5:1.0: Zero length descriptor references
  cdc_acm: probe of 1-1.5:1.0 failed with error -22

Adding the NO_UNION_NORMAL quirk for the device fixes the issue:
  usb 1-4: new full-speed USB device number 15 using xhci_hcd
  usb 1-4: New USB device found, idVendor=1965, idProduct=0018
  usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
  usb 1-4: Product: UBC125XLT
  usb 1-4: Manufacturer: Uniden Corp.
  usb 1-4: SerialNumber: 0001
  cdc_acm 1-4:1.0: ttyACM0: USB ACM device

`lsusb -v` of the device:

  Bus 001 Device 015: ID 1965:0018 Uniden Corporation
  Device Descriptor:
    bLength                18
    bDescriptorType         1
    bcdUSB               2.00
    bDeviceClass            2 Communications
    bDeviceSubClass         0
    bDeviceProtocol         0
    bMaxPacketSize0        64
    idVendor           0x1965 Uniden Corporation
    idProduct          0x0018
    bcdDevice            0.01
    iManufacturer           1 Uniden Corp.
    iProduct                2 UBC125XLT
    iSerial                 3 0001
    bNumConfigurations      1
    Configuration Descriptor:
      bLength                 9
      bDescriptorType         2
      wTotalLength           48
      bNumInterfaces          2
      bConfigurationValue     1
      iConfiguration          0
      bmAttributes         0x80
        (Bus Powered)
      MaxPower              500mA
      Interface Descriptor:
        bLength                 9
        bDescriptorType         4
        bInterfaceNumber        0
        bAlternateSetting       0
        bNumEndpoints           1
        bInterfaceClass         2 Communications
        bInterfaceSubClass      2 Abstract (modem)
        bInterfaceProtocol      0 None
        iInterface              0
        Endpoint Descriptor:
          bLength                 7
          bDescriptorType         5
          bEndpointAddress     0x87  EP 7 IN
          bmAttributes            3
            Transfer Type            Interrupt
            Synch Type               None
            Usage Type               Data
          wMaxPacketSize     0x0008  1x 8 bytes
          bInterval              10
      Interface Descriptor:
        bLength                 9
        bDescriptorType         4
        bInterfaceNumber        1
        bAlternateSetting       0
        bNumEndpoints           2
        bInterfaceClass        10 CDC Data
        bInterfaceSubClass      0 Unused
        bInterfaceProtocol      0
        iInterface              0
        Endpoint Descriptor:
          bLength                 7
          bDescriptorType         5
          bEndpointAddress     0x81  EP 1 IN
          bmAttributes            2
            Transfer Type            Bulk
            Synch Type               None
            Usage Type               Data
          wMaxPacketSize     0x0040  1x 64 bytes
          bInterval               0
        Endpoint Descriptor:
          bLength                 7
          bDescriptorType         5
          bEndpointAddress     0x02  EP 2 OUT
          bmAttributes            2
            Transfer Type            Bulk
            Synch Type               None
            Usage Type               Data
          wMaxPacketSize     0x0040  1x 64 bytes
          bInterval               0
  Device Status:     0x0000
    (Bus Powered)

Signed-off-by: Houston Yaroschoff <hstn@4ever3.net>
Cc: stable <stable@vger.kernel.org>
Acked-by: Oliver Neukum <oneukum@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/class/cdc-acm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index edd8ef4ee502d..7ed30d0b5273f 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -1698,6 +1698,9 @@ static const struct usb_device_id acm_ids[] = {
 	{ USB_DEVICE(0x11ca, 0x0201), /* VeriFone Mx870 Gadget Serial */
 	.driver_info = SINGLE_RX_URB,
 	},
+	{ USB_DEVICE(0x1965, 0x0018), /* Uniden UBC125XLT */
+	.driver_info = NO_UNION_NORMAL, /* has no union descriptor */
+	},
 	{ USB_DEVICE(0x22b8, 0x7000), /* Motorola Q Phone */
 	.driver_info = NO_UNION_NORMAL, /* has no union descriptor */
 	},

From 0539ebe00fd2c096dd74524fc9943de5fff2d645 Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Mon, 18 Jun 2018 10:24:03 +0200
Subject: [PATCH 0857/1852] USB: serial: cp210x: add CESINEL device ids

commit 24160628a34af962ac99f2f58e547ac3c4cbd26f upstream.

Add device ids for CESINEL products.

Reported-by: Carlos Barcala Lara <cabl@cesinel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/cp210x.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index e7a051386b326..041fa09f0505a 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -91,6 +91,9 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x8156) }, /* B&G H3000 link cable */
 	{ USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */
 	{ USB_DEVICE(0x10C4, 0x815F) }, /* Timewave HamLinkUSB */
+	{ USB_DEVICE(0x10C4, 0x817C) }, /* CESINEL MEDCAL N Power Quality Monitor */
+	{ USB_DEVICE(0x10C4, 0x817D) }, /* CESINEL MEDCAL NT Power Quality Monitor */
+	{ USB_DEVICE(0x10C4, 0x817E) }, /* CESINEL MEDCAL S Power Quality Monitor */
 	{ USB_DEVICE(0x10C4, 0x818B) }, /* AVIT Research USB to TTL */
 	{ USB_DEVICE(0x10C4, 0x819F) }, /* MJS USB Toslink Switcher */
 	{ USB_DEVICE(0x10C4, 0x81A6) }, /* ThinkOptics WavIt */
@@ -108,6 +111,9 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demonstration module */
 	{ USB_DEVICE(0x10C4, 0x8281) }, /* Nanotec Plug & Drive */
 	{ USB_DEVICE(0x10C4, 0x8293) }, /* Telegesis ETRX2USB */
+	{ USB_DEVICE(0x10C4, 0x82EF) }, /* CESINEL FALCO 6105 AC Power Supply */
+	{ USB_DEVICE(0x10C4, 0x82F1) }, /* CESINEL MEDCAL EFD Earth Fault Detector */
+	{ USB_DEVICE(0x10C4, 0x82F2) }, /* CESINEL MEDCAL ST Network Analyzer */
 	{ USB_DEVICE(0x10C4, 0x82F4) }, /* Starizona MicroTouch */
 	{ USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
 	{ USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
@@ -120,7 +126,9 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x8470) }, /* Juniper Networks BX Series System Console */
 	{ USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
 	{ USB_DEVICE(0x10C4, 0x84B6) }, /* Starizona Hyperion */
+	{ USB_DEVICE(0x10C4, 0x851E) }, /* CESINEL MEDCAL PT Network Analyzer */
 	{ USB_DEVICE(0x10C4, 0x85A7) }, /* LifeScan OneTouch Verio IQ */
+	{ USB_DEVICE(0x10C4, 0x85B8) }, /* CESINEL ReCon T Energy Logger */
 	{ USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
 	{ USB_DEVICE(0x10C4, 0x85EB) }, /* AC-Services CIS-IBUS */
 	{ USB_DEVICE(0x10C4, 0x85F8) }, /* Virtenio Preon32 */
@@ -130,10 +138,13 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x8857) },	/* CEL EM357 ZigBee USB Stick */
 	{ USB_DEVICE(0x10C4, 0x88A4) }, /* MMB Networks ZigBee USB Device */
 	{ USB_DEVICE(0x10C4, 0x88A5) }, /* Planet Innovation Ingeni ZigBee USB Device */
+	{ USB_DEVICE(0x10C4, 0x88FB) }, /* CESINEL MEDCAL STII Network Analyzer */
+	{ USB_DEVICE(0x10C4, 0x8938) }, /* CESINEL MEDCAL S II Network Analyzer */
 	{ USB_DEVICE(0x10C4, 0x8946) }, /* Ketra N1 Wireless Interface */
 	{ USB_DEVICE(0x10C4, 0x8962) }, /* Brim Brothers charging dock */
 	{ USB_DEVICE(0x10C4, 0x8977) },	/* CEL MeshWorks DevKit Device */
 	{ USB_DEVICE(0x10C4, 0x8998) }, /* KCF Technologies PRN */
+	{ USB_DEVICE(0x10C4, 0x89A4) }, /* CESINEL FTBC Flexible Thyristor Bridge Controller */
 	{ USB_DEVICE(0x10C4, 0x8A2A) }, /* HubZ dual ZigBee and Z-Wave dongle */
 	{ USB_DEVICE(0x10C4, 0x8A5E) }, /* CEL EM3588 ZigBee USB Stick Long Range */
 	{ USB_DEVICE(0x10C4, 0x8B34) }, /* Qivicon ZigBee USB Radio Stick */

From 586060c1d49a003693092bb00cb04c7d3b52b536 Mon Sep 17 00:00:00 2001
From: Karoly Pados <pados@pados.hu>
Date: Sat, 9 Jun 2018 13:26:08 +0200
Subject: [PATCH 0858/1852] USB: serial: cp210x: add Silicon Labs IDs for
 Windows Update

commit 2f839823382748664b643daa73f41ee0cc01ced6 upstream.

Silicon Labs defines alternative VID/PID pairs for some chips that when
used will automatically install drivers for Windows users without manual
intervention. Unfortunately, these IDs are not recognized by the Linux
module, so using these IDs improves user experience on one platform but
degrades it on Linux. This patch addresses this problem.

Signed-off-by: Karoly Pados <pados@pados.hu>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/cp210x.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 041fa09f0505a..73835027a7cc8 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -150,8 +150,11 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x8B34) }, /* Qivicon ZigBee USB Radio Stick */
 	{ USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */
 	{ USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */
+	{ USB_DEVICE(0x10C4, 0xEA63) }, /* Silicon Labs Windows Update (CP2101-4/CP2102N) */
 	{ USB_DEVICE(0x10C4, 0xEA70) }, /* Silicon Labs factory default */
 	{ USB_DEVICE(0x10C4, 0xEA71) }, /* Infinity GPS-MIC-1 Radio Monophone */
+	{ USB_DEVICE(0x10C4, 0xEA7A) }, /* Silicon Labs Windows Update (CP2105) */
+	{ USB_DEVICE(0x10C4, 0xEA7B) }, /* Silicon Labs Windows Update (CP2108) */
 	{ USB_DEVICE(0x10C4, 0xF001) }, /* Elan Digital Systems USBscope50 */
 	{ USB_DEVICE(0x10C4, 0xF002) }, /* Elan Digital Systems USBwave12 */
 	{ USB_DEVICE(0x10C4, 0xF003) }, /* Elan Digital Systems USBpulse100 */

From 81e0959694d94e4b522f6c64ce7b83a29ffca121 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Sat, 26 May 2018 09:53:13 +0900
Subject: [PATCH 0859/1852] n_tty: Fix stall at n_tty_receive_char_special().

commit 3d63b7e4ae0dc5e02d28ddd2fa1f945defc68d81 upstream.

syzbot is reporting stalls at n_tty_receive_char_special() [1]. This is
because comparison is not working as expected since ldata->read_head can
change at any moment. Mitigate this by explicitly masking with buffer size
when checking condition for "while" loops.

[1] https://syzkaller.appspot.com/bug?id=3d7481a346958d9469bebbeb0537d5f056bdd6e8

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+18df353d7540aa6b5467@syzkaller.appspotmail.com>
Fixes: bc5a5e3f45d04784 ("n_tty: Don't wrap input buffer indices at buffer size")
Cc: stable <stable@vger.kernel.org>
Cc: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/n_tty.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 190e5dc15738b..1d4d20e65dc37 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -128,6 +128,8 @@ struct n_tty_data {
 	struct mutex output_lock;
 };
 
+#define MASK(x) ((x) & (N_TTY_BUF_SIZE - 1))
+
 static inline size_t read_cnt(struct n_tty_data *ldata)
 {
 	return ldata->read_head - ldata->read_tail;
@@ -1006,14 +1008,15 @@ static void eraser(unsigned char c, struct tty_struct *tty)
 	}
 
 	seen_alnums = 0;
-	while (ldata->read_head != ldata->canon_head) {
+	while (MASK(ldata->read_head) != MASK(ldata->canon_head)) {
 		head = ldata->read_head;
 
 		/* erase a single possibly multibyte character */
 		do {
 			head--;
 			c = read_buf(ldata, head);
-		} while (is_continuation(c, tty) && head != ldata->canon_head);
+		} while (is_continuation(c, tty) &&
+			 MASK(head) != MASK(ldata->canon_head));
 
 		/* do not partially erase */
 		if (is_continuation(c, tty))
@@ -1055,7 +1058,7 @@ static void eraser(unsigned char c, struct tty_struct *tty)
 				 * This info is used to go back the correct
 				 * number of columns.
 				 */
-				while (tail != ldata->canon_head) {
+				while (MASK(tail) != MASK(ldata->canon_head)) {
 					tail--;
 					c = read_buf(ldata, tail);
 					if (c == '\t') {
@@ -1332,7 +1335,7 @@ n_tty_receive_char_special(struct tty_struct *tty, unsigned char c)
 			finish_erasing(ldata);
 			echo_char(c, tty);
 			echo_char_raw('\n', ldata);
-			while (tail != ldata->read_head) {
+			while (MASK(tail) != MASK(ldata->read_head)) {
 				echo_char(read_buf(ldata, tail), tty);
 				tail++;
 			}
@@ -2479,7 +2482,7 @@ static unsigned long inq_canon(struct n_tty_data *ldata)
 	tail = ldata->read_tail;
 	nr = head - tail;
 	/* Skip EOF-chars.. */
-	while (head != tail) {
+	while (MASK(head) != MASK(tail)) {
 		if (test_bit(tail & (N_TTY_BUF_SIZE - 1), ldata->read_flags) &&
 		    read_buf(ldata, tail) == __DISABLED_CHAR)
 			nr--;

From 8184e8ee101eca452e395c0e9896f68755f2443b Mon Sep 17 00:00:00 2001
From: Laura Abbott <labbott@redhat.com>
Date: Mon, 11 Jun 2018 11:06:53 -0700
Subject: [PATCH 0860/1852] staging: android: ion: Return an ERR_PTR in
 ion_map_kernel

commit 0a2bc00341dcfcc793c0dbf4f8d43adf60458b05 upstream.

The expected return value from ion_map_kernel is an ERR_PTR. The error
path for a vmalloc failure currently just returns NULL, triggering
a warning in ion_buffer_kmap_get. Encode the vmalloc failure as an ERR_PTR.

Reported-by: syzbot+55b1d9f811650de944c6@syzkaller.appspotmail.com
Signed-off-by: Laura Abbott <labbott@redhat.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/staging/android/ion/ion_heap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/android/ion/ion_heap.c b/drivers/staging/android/ion/ion_heap.c
index ca15a87f6fd3d..13a9b4c42b267 100644
--- a/drivers/staging/android/ion/ion_heap.c
+++ b/drivers/staging/android/ion/ion_heap.c
@@ -38,7 +38,7 @@ void *ion_heap_map_kernel(struct ion_heap *heap,
 	struct page **tmp = pages;
 
 	if (!pages)
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 
 	if (buffer->flags & ION_FLAG_CACHED)
 		pgprot = PAGE_KERNEL;

From ee8d7819514e50c6f76c3f3a49c67d562d35a854 Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Sat, 26 May 2018 09:53:14 +0900
Subject: [PATCH 0861/1852] n_tty: Access echo_* variables carefully.

commit ebec3f8f5271139df618ebdf8427e24ba102ba94 upstream.

syzbot is reporting stalls at __process_echoes() [1]. This is because
since ldata->echo_commit < ldata->echo_tail becomes true for some reason,
the discard loop is serving as almost infinite loop. This patch tries to
avoid falling into ldata->echo_commit < ldata->echo_tail situation by
making access to echo_* variables more carefully.

Since reset_buffer_flags() is called without output_lock held, it should
not touch echo_* variables. And omit a call to reset_buffer_flags() from
n_tty_open() by using vzalloc().

Since add_echo_byte() is called without output_lock held, it needs memory
barrier between storing into echo_buf[] and incrementing echo_head counter.
echo_buf() needs corresponding memory barrier before reading echo_buf[].
Lack of handling the possibility of not-yet-stored multi-byte operation
might be the reason of falling into ldata->echo_commit < ldata->echo_tail
situation, for if I do WARN_ON(ldata->echo_commit == tail + 1) prior to
echo_buf(ldata, tail + 1), the WARN_ON() fires.

Also, explicitly masking with buffer for the former "while" loop, and
use ldata->echo_commit > tail for the latter "while" loop.

[1] https://syzkaller.appspot.com/bug?id=17f23b094cd80df750e5b0f8982c521ee6bcbf40

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+108696293d7a21ab688f@syzkaller.appspotmail.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/n_tty.c | 42 ++++++++++++++++++++++++------------------
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 1d4d20e65dc37..b1ec202099b2e 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -147,6 +147,7 @@ static inline unsigned char *read_buf_addr(struct n_tty_data *ldata, size_t i)
 
 static inline unsigned char echo_buf(struct n_tty_data *ldata, size_t i)
 {
+	smp_rmb(); /* Matches smp_wmb() in add_echo_byte(). */
 	return ldata->echo_buf[i & (N_TTY_BUF_SIZE - 1)];
 }
 
@@ -324,9 +325,7 @@ static inline void put_tty_queue(unsigned char c, struct n_tty_data *ldata)
 static void reset_buffer_flags(struct n_tty_data *ldata)
 {
 	ldata->read_head = ldata->canon_head = ldata->read_tail = 0;
-	ldata->echo_head = ldata->echo_tail = ldata->echo_commit = 0;
 	ldata->commit_head = 0;
-	ldata->echo_mark = 0;
 	ldata->line_start = 0;
 
 	ldata->erasing = 0;
@@ -647,12 +646,19 @@ static size_t __process_echoes(struct tty_struct *tty)
 	old_space = space = tty_write_room(tty);
 
 	tail = ldata->echo_tail;
-	while (ldata->echo_commit != tail) {
+	while (MASK(ldata->echo_commit) != MASK(tail)) {
 		c = echo_buf(ldata, tail);
 		if (c == ECHO_OP_START) {
 			unsigned char op;
 			int no_space_left = 0;
 
+			/*
+			 * Since add_echo_byte() is called without holding
+			 * output_lock, we might see only portion of multi-byte
+			 * operation.
+			 */
+			if (MASK(ldata->echo_commit) == MASK(tail + 1))
+				goto not_yet_stored;
 			/*
 			 * If the buffer byte is the start of a multi-byte
 			 * operation, get the next byte, which is either the
@@ -664,6 +670,8 @@ static size_t __process_echoes(struct tty_struct *tty)
 				unsigned int num_chars, num_bs;
 
 			case ECHO_OP_ERASE_TAB:
+				if (MASK(ldata->echo_commit) == MASK(tail + 2))
+					goto not_yet_stored;
 				num_chars = echo_buf(ldata, tail + 2);
 
 				/*
@@ -758,7 +766,8 @@ static size_t __process_echoes(struct tty_struct *tty)
 	/* If the echo buffer is nearly full (so that the possibility exists
 	 * of echo overrun before the next commit), then discard enough
 	 * data at the tail to prevent a subsequent overrun */
-	while (ldata->echo_commit - tail >= ECHO_DISCARD_WATERMARK) {
+	while (ldata->echo_commit > tail &&
+	       ldata->echo_commit - tail >= ECHO_DISCARD_WATERMARK) {
 		if (echo_buf(ldata, tail) == ECHO_OP_START) {
 			if (echo_buf(ldata, tail + 1) == ECHO_OP_ERASE_TAB)
 				tail += 3;
@@ -768,6 +777,7 @@ static size_t __process_echoes(struct tty_struct *tty)
 			tail++;
 	}
 
+ not_yet_stored:
 	ldata->echo_tail = tail;
 	return old_space - space;
 }
@@ -778,6 +788,7 @@ static void commit_echoes(struct tty_struct *tty)
 	size_t nr, old, echoed;
 	size_t head;
 
+	mutex_lock(&ldata->output_lock);
 	head = ldata->echo_head;
 	ldata->echo_mark = head;
 	old = ldata->echo_commit - ldata->echo_tail;
@@ -786,10 +797,12 @@ static void commit_echoes(struct tty_struct *tty)
 	 * is over the threshold (and try again each time another
 	 * block is accumulated) */
 	nr = head - ldata->echo_tail;
-	if (nr < ECHO_COMMIT_WATERMARK || (nr % ECHO_BLOCK > old % ECHO_BLOCK))
+	if (nr < ECHO_COMMIT_WATERMARK ||
+	    (nr % ECHO_BLOCK > old % ECHO_BLOCK)) {
+		mutex_unlock(&ldata->output_lock);
 		return;
+	}
 
-	mutex_lock(&ldata->output_lock);
 	ldata->echo_commit = head;
 	echoed = __process_echoes(tty);
 	mutex_unlock(&ldata->output_lock);
@@ -840,7 +853,9 @@ static void flush_echoes(struct tty_struct *tty)
 
 static inline void add_echo_byte(unsigned char c, struct n_tty_data *ldata)
 {
-	*echo_buf_addr(ldata, ldata->echo_head++) = c;
+	*echo_buf_addr(ldata, ldata->echo_head) = c;
+	smp_wmb(); /* Matches smp_rmb() in echo_buf(). */
+	ldata->echo_head++;
 }
 
 /**
@@ -1920,31 +1935,22 @@ static int n_tty_open(struct tty_struct *tty)
 	struct n_tty_data *ldata;
 
 	/* Currently a malloc failure here can panic */
-	ldata = vmalloc(sizeof(*ldata));
+	ldata = vzalloc(sizeof(*ldata));
 	if (!ldata)
-		goto err;
+		return -ENOMEM;
 
 	ldata->overrun_time = jiffies;
 	mutex_init(&ldata->atomic_read_lock);
 	mutex_init(&ldata->output_lock);
 
 	tty->disc_data = ldata;
-	reset_buffer_flags(tty->disc_data);
-	ldata->column = 0;
-	ldata->canon_column = 0;
 	ldata->minimum_to_wake = 1;
-	ldata->num_overrun = 0;
-	ldata->no_room = 0;
-	ldata->lnext = 0;
 	tty->closing = 0;
 	/* indicate buffer work may resume */
 	clear_bit(TTY_LDISC_HALTED, &tty->flags);
 	n_tty_set_termios(tty, NULL);
 	tty_unthrottle(tty);
-
 	return 0;
-err:
-	return -ENOMEM;
 }
 
 static inline int input_available_p(struct tty_struct *tty, int poll)

From 90d935f2b3e6c4fed3b64a0027c43ddd1d655b46 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Tue, 22 Dec 2015 14:52:38 -0800
Subject: [PATCH 0862/1852] x86/boot: Fix early command-line parsing when
 matching at end

commit 02afeaae9843733a39cd9b11053748b2d1dc5ae7 upstream.

The x86 early command line parsing in cmdline_find_option_bool() is
buggy. If it matches a specified 'option' all the way to the end of the
command-line, it will consider it a match.

For instance,

  cmdline = "foo";
  cmdline_find_option_bool(cmdline, "fool");

will return 1. This is particularly annoying since we have actual FPU
options like "noxsave" and "noxsaves" So, command-line "foo bar noxsave"
will match *BOTH* a "noxsave" and "noxsaves". (This turns out not to be
an actual problem because "noxsave" implies "noxsaves", but it's still
confusing.)

To fix this, we simplify the code and stop tracking 'len'. 'len'
was trying to indicate either the NULL terminator *OR* the end of a
non-NULL-terminated command line at 'COMMAND_LINE_SIZE'. But, each of the
three states is *already* checking 'cmdline' for a NULL terminator.

We _only_ need to check if we have overrun 'COMMAND_LINE_SIZE', and that
we can do without keeping 'len' around.

Also add some commends to clarify what is going on.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: fenghua.yu@intel.com
Cc: yu-cheng.yu@intel.com
Link: http://lkml.kernel.org/r/20151222225238.9AEB560C@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/lib/cmdline.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/arch/x86/lib/cmdline.c b/arch/x86/lib/cmdline.c
index a744506856b1d..88ce150186c64 100644
--- a/arch/x86/lib/cmdline.c
+++ b/arch/x86/lib/cmdline.c
@@ -21,12 +21,14 @@ static inline int myisspace(u8 c)
  * @option: option string to look for
  *
  * Returns the position of that @option (starts counting with 1)
- * or 0 on not found.
+ * or 0 on not found.  @option will only be found if it is found
+ * as an entire word in @cmdline.  For instance, if @option="car"
+ * then a cmdline which contains "cart" will not match.
  */
 int cmdline_find_option_bool(const char *cmdline, const char *option)
 {
 	char c;
-	int len, pos = 0, wstart = 0;
+	int pos = 0, wstart = 0;
 	const char *opptr = NULL;
 	enum {
 		st_wordstart = 0,	/* Start of word/after whitespace */
@@ -37,11 +39,14 @@ int cmdline_find_option_bool(const char *cmdline, const char *option)
 	if (!cmdline)
 		return -1;      /* No command line */
 
-	len = min_t(int, strlen(cmdline), COMMAND_LINE_SIZE);
-	if (!len)
+	if (!strlen(cmdline))
 		return 0;
 
-	while (len--) {
+	/*
+	 * This 'pos' check ensures we do not overrun
+	 * a non-NULL-terminated 'cmdline'
+	 */
+	while (pos < COMMAND_LINE_SIZE) {
 		c = *(char *)cmdline++;
 		pos++;
 
@@ -58,17 +63,26 @@ int cmdline_find_option_bool(const char *cmdline, const char *option)
 			/* fall through */
 
 		case st_wordcmp:
-			if (!*opptr)
+			if (!*opptr) {
+				/*
+				 * We matched all the way to the end of the
+				 * option we were looking for.  If the
+				 * command-line has a space _or_ ends, then
+				 * we matched!
+				 */
 				if (!c || myisspace(c))
 					return wstart;
 				else
 					state = st_wordskip;
-			else if (!c)
+			} else if (!c) {
+				/*
+				 * Hit the NULL terminator on the end of
+				 * cmdline.
+				 */
 				return 0;
-			else if (c != *opptr++)
+			} else if (c != *opptr++) {
 				state = st_wordskip;
-			else if (!len)		/* last word and is matching */
-				return wstart;
+			}
 			break;
 
 		case st_wordskip:

From 7b5e96b386c4799dd159dd1328709f511c47befe Mon Sep 17 00:00:00 2001
From: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Date: Mon, 26 Sep 2016 21:56:24 +0300
Subject: [PATCH 0863/1852] ath10k: fix rfc1042 header retrieval in QCA4019
 with eth decap mode

commit 2f38c3c01de945234d23dd163e3528ccb413066d upstream.

Chipset from QCA99X0 onwards (QCA99X0, QCA9984, QCA4019 & future)
rx_hdr_status is not padded to align in 4-byte boundary. Define a
new hw_params field to handle different alignment behaviour between
different hw. This patch fixes improper retrieval of rfc1042 header
with QCA4019. This patch along with "ath10k: Properly remove padding
from the start of rx payload" will fix traffic failure in ethernet
decap mode for QCA4019.

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
[bwh: This just adds the part that was left out of the previous backport,
 commit b88fb9ea475a.]
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/ath10k/htt_rx.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/htt_rx.c b/drivers/net/wireless/ath/ath10k/htt_rx.c
index d26cb37b1fbd1..b32c47fe926de 100644
--- a/drivers/net/wireless/ath/ath10k/htt_rx.c
+++ b/drivers/net/wireless/ath/ath10k/htt_rx.c
@@ -1166,6 +1166,7 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
 	size_t hdr_len, crypto_len;
 	void *rfc1042;
 	bool is_first, is_last, is_amsdu;
+	int bytes_aligned = ar->hw_params.decap_align_bytes;
 
 	rxd = (void *)msdu->data - sizeof(*rxd);
 	hdr = (void *)rxd->rx_hdr_status;
@@ -1182,8 +1183,8 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
 		hdr_len = ieee80211_hdrlen(hdr->frame_control);
 		crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
 
-		rfc1042 += round_up(hdr_len, 4) +
-			   round_up(crypto_len, 4);
+		rfc1042 += round_up(hdr_len, bytes_aligned) +
+			   round_up(crypto_len, bytes_aligned);
 	}
 
 	if (is_amsdu)

From 5b75fff516e133e14adbb1a609f752076ed535db Mon Sep 17 00:00:00 2001
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Tue, 18 Apr 2017 20:38:35 +0200
Subject: [PATCH 0864/1852] i2c: rcar: fix resume by always initializing
 registers before transfer

commit ae481cc139658e89eb3ea671dd00b67bd87f01a3 upstream.

Resume failed because of uninitialized registers. Instead of adding a
resume callback, we simply initialize registers before every transfer.
This lightweight change is more robust and will keep us safe if we ever
need support for power domains or dynamic frequency changes.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-rcar.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 6f89484765e30..dfe1a53ce4ad3 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -484,6 +484,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
 
 	pm_runtime_get_sync(dev);
 
+	rcar_i2c_init(priv);
+
 	ret = rcar_i2c_bus_barrier(priv);
 	if (ret < 0)
 		goto out;
@@ -624,7 +626,6 @@ static int rcar_i2c_probe(struct platform_device *pdev)
 	if (ret < 0)
 		goto out_pm_put;
 
-	rcar_i2c_init(priv);
 	pm_runtime_put(dev);
 
 	irq = platform_get_irq(pdev, 0);

From ace3c7ced5b73698ab44947fadc7ff213a21e831 Mon Sep 17 00:00:00 2001
From: Ben Hutchings <ben.hutchings@codethink.co.uk>
Date: Tue, 19 Jun 2018 18:47:52 +0100
Subject: [PATCH 0865/1852] ipv4: Fix error return value in
 fib_convert_metrics()

The validation code modified by commit 5b5e7a0de2bb ("net: metrics:
add proper netlink validation") is organised differently in older
kernel versions.  The fib_convert_metrics() function that is modified
in the backports to 4.4 and 4.9 needs to returns an error code, not a
success flag.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/fib_semantics.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/ipv4/fib_semantics.c b/net/ipv4/fib_semantics.c
index 9d144cbd4e62a..03ebff3950d84 100644
--- a/net/ipv4/fib_semantics.c
+++ b/net/ipv4/fib_semantics.c
@@ -980,7 +980,7 @@ fib_convert_metrics(struct fib_info *fi, const struct fib_config *cfg)
 				return -EINVAL;
 		} else {
 			if (nla_len(nla) != sizeof(u32))
-				return false;
+				return -EINVAL;
 			val = nla_get_u32(nla);
 		}
 		if (type == RTAX_ADVMSS && val > 65535 - 40)

From bf5636c730c6d640baa9efaff435364cbf86a868 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Wed, 29 Mar 2017 14:00:25 +0900
Subject: [PATCH 0866/1852] kprobes/x86: Do not modify singlestep buffer while
 resuming

commit 804dec5bda9b4fcdab5f67fe61db4a0498af5221 upstream.

Do not modify singlestep execution buffer (kprobe.ainsn.insn)
while resuming from single-stepping, instead, modifies
the buffer to add a jump back instruction at preparing
buffer.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: David S . Miller <davem@davemloft.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ye Xiaolong <xiaolong.ye@intel.com>
Link: http://lkml.kernel.org/r/149076361560.22469.1610155860343077495.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Signed-off-by: Alexey Makhalov <amakhalov@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/kprobes/core.c | 42 ++++++++++++++++------------------
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c
index 30bc638760357..c8f352e7e062c 100644
--- a/arch/x86/kernel/kprobes/core.c
+++ b/arch/x86/kernel/kprobes/core.c
@@ -412,25 +412,38 @@ void free_insn_page(void *page)
 	module_memfree(page);
 }
 
+/* Prepare reljump right after instruction to boost */
+static void prepare_boost(struct kprobe *p, int length)
+{
+	if (can_boost(p->ainsn.insn, p->addr) &&
+	    MAX_INSN_SIZE - length >= RELATIVEJUMP_SIZE) {
+		/*
+		 * These instructions can be executed directly if it
+		 * jumps back to correct address.
+		 */
+		synthesize_reljump(p->ainsn.insn + length, p->addr + length);
+		p->ainsn.boostable = 1;
+	} else {
+		p->ainsn.boostable = -1;
+	}
+}
+
 static int arch_copy_kprobe(struct kprobe *p)
 {
-	int ret;
+	int len;
 
 	set_memory_rw((unsigned long)p->ainsn.insn & PAGE_MASK, 1);
 
 	/* Copy an instruction with recovering if other optprobe modifies it.*/
-	ret = __copy_instruction(p->ainsn.insn, p->addr);
-	if (!ret)
+	len = __copy_instruction(p->ainsn.insn, p->addr);
+	if (!len)
 		return -EINVAL;
 
 	/*
 	 * __copy_instruction can modify the displacement of the instruction,
 	 * but it doesn't affect boostable check.
 	 */
-	if (can_boost(p->ainsn.insn, p->addr))
-		p->ainsn.boostable = 0;
-	else
-		p->ainsn.boostable = -1;
+	prepare_boost(p, len);
 
 	set_memory_ro((unsigned long)p->ainsn.insn & PAGE_MASK, 1);
 
@@ -895,21 +908,6 @@ static void resume_execution(struct kprobe *p, struct pt_regs *regs,
 		break;
 	}
 
-	if (p->ainsn.boostable == 0) {
-		if ((regs->ip > copy_ip) &&
-		    (regs->ip - copy_ip) + 5 < MAX_INSN_SIZE) {
-			/*
-			 * These instructions can be executed directly if it
-			 * jumps back to correct address.
-			 */
-			synthesize_reljump((void *)regs->ip,
-				(void *)orig_ip + (regs->ip - copy_ip));
-			p->ainsn.boostable = 1;
-		} else {
-			p->ainsn.boostable = -1;
-		}
-	}
-
 	regs->ip += orig_ip - copy_ip;
 
 no_change:

From 657904393c1c9d67e5d5f4a1d4b01349e75552ef Mon Sep 17 00:00:00 2001
From: Keith Busch <keith.busch@intel.com>
Date: Thu, 14 Sep 2017 13:54:39 -0400
Subject: [PATCH 0867/1852] nvme-pci: initialize queue memory before interrupts

commit 161b8be2bd6abad250d4b3f674bdd5480f15beeb upstream.

A spurious interrupt before the nvme driver has initialized the completion
queue may inadvertently cause the driver to believe it has a completion
to process. This may result in a NULL dereference since the nvmeq's tags
are not set at this point.

The patch initializes the host's CQ memory so that a spurious interrupt
isn't mistaken for a real completion.

Signed-off-by: Keith Busch <keith.busch@intel.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
[bwh: Backported to 4.4: adjust context]
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/nvme/host/pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index e6f17c53c5aaa..be33d66e21345 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1589,11 +1589,11 @@ static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
 	if (result < 0)
 		goto release_cq;
 
+	nvme_init_queue(nvmeq, qid);
 	result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
 	if (result < 0)
 		goto release_sq;
 
-	nvme_init_queue(nvmeq, qid);
 	return result;
 
  release_sq:
@@ -1797,6 +1797,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
 		goto free_nvmeq;
 
 	nvmeq->cq_vector = 0;
+	nvme_init_queue(nvmeq, 0);
 	result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
 	if (result) {
 		nvmeq->cq_vector = -1;
@@ -3170,7 +3171,6 @@ static void nvme_probe_work(struct work_struct *work)
 		goto disable;
 	}
 
-	nvme_init_queue(dev->queues[0], 0);
 	result = nvme_alloc_admin_tags(dev);
 	if (result)
 		goto disable;

From ce9adfc59baacce88a88e2bf22ec03596749c195 Mon Sep 17 00:00:00 2001
From: Taehee Yoo <ap420073@gmail.com>
Date: Mon, 11 Jun 2018 22:16:33 +0900
Subject: [PATCH 0868/1852] netfilter: nf_tables: use WARN_ON_ONCE instead of
 BUG_ON in nft_do_chain()

commit adc972c5b88829d38ede08b1069718661c7330ae upstream.

When depth of chain is bigger than NFT_JUMP_STACK_SIZE, the nft_do_chain
crashes. But there is no need to crash hard here.

Suggested-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Taehee Yoo <ap420073@gmail.com>
Acked-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netfilter/nf_tables_core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/netfilter/nf_tables_core.c b/net/netfilter/nf_tables_core.c
index f3695a4974086..99bc2f87a9742 100644
--- a/net/netfilter/nf_tables_core.c
+++ b/net/netfilter/nf_tables_core.c
@@ -167,7 +167,8 @@ nft_do_chain(struct nft_pktinfo *pkt, void *priv)
 
 	switch (regs.verdict.code) {
 	case NFT_JUMP:
-		BUG_ON(stackptr >= NFT_JUMP_STACK_SIZE);
+		if (WARN_ON_ONCE(stackptr >= NFT_JUMP_STACK_SIZE))
+			return NF_DROP;
 		jumpstack[stackptr].chain = chain;
 		jumpstack[stackptr].rule  = rule;
 		jumpstack[stackptr].rulenum = rulenum;

From 08e22045a2b325fad3f4a318c6720bf04c70f744 Mon Sep 17 00:00:00 2001
From: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Date: Tue, 22 May 2018 19:45:09 +0200
Subject: [PATCH 0869/1852] ARM: dts: imx6q: Use correct SDMA script for SPI5
 core

commit df07101e1c4a29e820df02f9989a066988b160e6 upstream.

According to the reference manual the shp_2_mcu / mcu_2_shp
scripts must be used for devices connected through the SPBA.

This fixes an issue we saw with DMA transfers.
Sometimes the SPI controller RX FIFO was not empty after a DMA
transfer and the driver got stuck in the next PIO transfer when
it read one word more than expected.

commit dd4b487b32a35 ("ARM: dts: imx6: Use correct SDMA script
for SPI cores") is fixing the same issue but only for SPI1 - 4.

Fixes: 677940258dd8e ("ARM: dts: imx6q: enable dma for ecspi5")
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/imx6q.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 399103b8e2c94..c81fb8fdc41ff 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -95,7 +95,7 @@
 					clocks = <&clks IMX6Q_CLK_ECSPI5>,
 						 <&clks IMX6Q_CLK_ECSPI5>;
 					clock-names = "ipg", "per";
-					dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
+					dmas = <&sdma 11 8 1>, <&sdma 12 8 2>;
 					dma-names = "rx", "tx";
 					status = "disabled";
 				};

From 0c02f23d3bfd40d14759623be601e738cb4fffb7 Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Mon, 28 May 2018 22:04:32 +0200
Subject: [PATCH 0870/1852] ubi: fastmap: Correctly handle interrupted erasures
 in EBA

commit 781932375ffc6411713ee0926ccae8596ed0261c upstream.

Fastmap cannot track the LEB unmap operation, therefore it can
happen that after an interrupted erasure the mapping still looks
good from Fastmap's point of view, while reading from the PEB will
cause an ECC error and confuses the upper layer.

Instead of teaching users of UBI how to deal with that, we read back
the VID header and check for errors. If the PEB is empty or shows ECC
errors we fixup the mapping and schedule the PEB for erasure.

Fixes: dbb7d2a88d2a ("UBI: Add fastmap core")
Cc: <stable@vger.kernel.org>
Reported-by: martin bayern <Martinbayern@outlook.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/eba.c | 92 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 91 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c
index 4dd0391d29428..c4a25c858c07d 100644
--- a/drivers/mtd/ubi/eba.c
+++ b/drivers/mtd/ubi/eba.c
@@ -350,6 +350,82 @@ int ubi_eba_unmap_leb(struct ubi_device *ubi, struct ubi_volume *vol,
 	return err;
 }
 
+#ifdef CONFIG_MTD_UBI_FASTMAP
+/**
+ * check_mapping - check and fixup a mapping
+ * @ubi: UBI device description object
+ * @vol: volume description object
+ * @lnum: logical eraseblock number
+ * @pnum: physical eraseblock number
+ *
+ * Checks whether a given mapping is valid. Fastmap cannot track LEB unmap
+ * operations, if such an operation is interrupted the mapping still looks
+ * good, but upon first read an ECC is reported to the upper layer.
+ * Normaly during the full-scan at attach time this is fixed, for Fastmap
+ * we have to deal with it while reading.
+ * If the PEB behind a LEB shows this symthom we change the mapping to
+ * %UBI_LEB_UNMAPPED and schedule the PEB for erasure.
+ *
+ * Returns 0 on success, negative error code in case of failure.
+ */
+static int check_mapping(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
+			 int *pnum)
+{
+	int err;
+	struct ubi_vid_hdr *vid_hdr;
+
+	if (!ubi->fast_attach)
+		return 0;
+
+	vid_hdr = ubi_zalloc_vid_hdr(ubi, GFP_NOFS);
+	if (!vid_hdr)
+		return -ENOMEM;
+
+	err = ubi_io_read_vid_hdr(ubi, *pnum, vid_hdr, 0);
+	if (err > 0 && err != UBI_IO_BITFLIPS) {
+		int torture = 0;
+
+		switch (err) {
+			case UBI_IO_FF:
+			case UBI_IO_FF_BITFLIPS:
+			case UBI_IO_BAD_HDR:
+			case UBI_IO_BAD_HDR_EBADMSG:
+				break;
+			default:
+				ubi_assert(0);
+		}
+
+		if (err == UBI_IO_BAD_HDR_EBADMSG || err == UBI_IO_FF_BITFLIPS)
+			torture = 1;
+
+		down_read(&ubi->fm_eba_sem);
+		vol->eba_tbl[lnum] = UBI_LEB_UNMAPPED;
+		up_read(&ubi->fm_eba_sem);
+		ubi_wl_put_peb(ubi, vol->vol_id, lnum, *pnum, torture);
+
+		*pnum = UBI_LEB_UNMAPPED;
+	} else if (err < 0) {
+		ubi_err(ubi, "unable to read VID header back from PEB %i: %i",
+			*pnum, err);
+
+		goto out_free;
+	}
+
+	err = 0;
+
+out_free:
+	ubi_free_vid_hdr(ubi, vid_hdr);
+
+	return err;
+}
+#else
+static int check_mapping(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
+		  int *pnum)
+{
+	return 0;
+}
+#endif
+
 /**
  * ubi_eba_read_leb - read data.
  * @ubi: UBI device description object
@@ -381,7 +457,13 @@ int ubi_eba_read_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
 		return err;
 
 	pnum = vol->eba_tbl[lnum];
-	if (pnum < 0) {
+	if (pnum >= 0) {
+		err = check_mapping(ubi, vol, lnum, &pnum);
+		if (err < 0)
+			goto out_unlock;
+	}
+
+	if (pnum == UBI_LEB_UNMAPPED) {
 		/*
 		 * The logical eraseblock is not mapped, fill the whole buffer
 		 * with 0xFF bytes. The exception is static volumes for which
@@ -696,6 +778,14 @@ int ubi_eba_write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
 		return err;
 
 	pnum = vol->eba_tbl[lnum];
+	if (pnum >= 0) {
+		err = check_mapping(ubi, vol, lnum, &pnum);
+		if (err < 0) {
+			leb_write_unlock(ubi, vol_id, lnum);
+			return err;
+		}
+	}
+
 	if (pnum >= 0) {
 		dbg_eba("write %d bytes at offset %d of LEB %d:%d, PEB %d",
 			len, offset, vol_id, lnum, pnum);

From 3d514a3195d90f059bcc1bdb574d78ac00a270f4 Mon Sep 17 00:00:00 2001
From: Cannon Matthews <cannonmatthews@google.com>
Date: Tue, 3 Jul 2018 17:02:43 -0700
Subject: [PATCH 0871/1852] mm: hugetlb: yield when prepping struct pages

commit 520495fe96d74e05db585fc748351e0504d8f40d upstream.

When booting with very large numbers of gigantic (i.e.  1G) pages, the
operations in the loop of gather_bootmem_prealloc, and specifically
prep_compound_gigantic_page, takes a very long time, and can cause a
softlockup if enough pages are requested at boot.

For example booting with 3844 1G pages requires prepping
(set_compound_head, init the count) over 1 billion 4K tail pages, which
takes considerable time.

Add a cond_resched() to the outer loop in gather_bootmem_prealloc() to
prevent this lockup.

Tested: Booted with softlockup_panic=1 hugepagesz=1G hugepages=3844 and
no softlockup is reported, and the hugepages are reported as
successfully setup.

Link: http://lkml.kernel.org/r/20180627214447.260804-1-cannonmatthews@google.com
Signed-off-by: Cannon Matthews <cannonmatthews@google.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Reviewed-by: Mike Kravetz <mike.kravetz@oracle.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Andres Lagar-Cavilla <andreslc@google.com>
Cc: Peter Feiner <pfeiner@google.com>
Cc: Greg Thelen <gthelen@google.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/hugetlb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 7294301d8495b..a813b03021b71 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -2038,6 +2038,7 @@ static void __init gather_bootmem_prealloc(void)
 		 */
 		if (hstate_is_gigantic(h))
 			adjust_managed_page_count(page, 1 << h->order);
+		cond_resched();
 	}
 }
 

From a94ab7eda8b6130f13da33804a58c9321b0fc622 Mon Sep 17 00:00:00 2001
From: Changbin Du <changbin.du@intel.com>
Date: Wed, 31 Jan 2018 23:48:49 +0800
Subject: [PATCH 0872/1852] tracing: Fix missing return symbol in
 function_graph output

commit 1fe4293f4b8de75824935f8d8e9a99c7fc6873da upstream.

The function_graph tracer does not show the interrupt return marker for the
leaf entry. On leaf entries, we see an unbalanced interrupt marker (the
interrupt was entered, but nevern left).

Before:
 1)               |  SyS_write() {
 1)               |    __fdget_pos() {
 1)   0.061 us    |      __fget_light();
 1)   0.289 us    |    }
 1)               |    vfs_write() {
 1)   0.049 us    |      rw_verify_area();
 1) + 15.424 us   |      __vfs_write();
 1)   ==========> |
 1)   6.003 us    |      smp_apic_timer_interrupt();
 1)   0.055 us    |      __fsnotify_parent();
 1)   0.073 us    |      fsnotify();
 1) + 23.665 us   |    }
 1) + 24.501 us   |  }

After:
 0)               |  SyS_write() {
 0)               |    __fdget_pos() {
 0)   0.052 us    |      __fget_light();
 0)   0.328 us    |    }
 0)               |    vfs_write() {
 0)   0.057 us    |      rw_verify_area();
 0)               |      __vfs_write() {
 0)   ==========> |
 0)   8.548 us    |      smp_apic_timer_interrupt();
 0)   <========== |
 0) + 36.507 us   |      } /* __vfs_write */
 0)   0.049 us    |      __fsnotify_parent();
 0)   0.066 us    |      fsnotify();
 0) + 50.064 us   |    }
 0) + 50.952 us   |  }

Link: http://lkml.kernel.org/r/1517413729-20411-1-git-send-email-changbin.du@intel.com

Cc: stable@vger.kernel.org
Fixes: f8b755ac8e0cc ("tracing/function-graph-tracer: Output arrows signal on hardirq call/return")
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_functions_graph.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/kernel/trace/trace_functions_graph.c b/kernel/trace/trace_functions_graph.c
index a804ee1b3ec68..55002f20950f8 100644
--- a/kernel/trace/trace_functions_graph.c
+++ b/kernel/trace/trace_functions_graph.c
@@ -774,6 +774,7 @@ print_graph_entry_leaf(struct trace_iterator *iter,
 	struct ftrace_graph_ret *graph_ret;
 	struct ftrace_graph_ent *call;
 	unsigned long long duration;
+	int cpu = iter->cpu;
 	int i;
 
 	graph_ret = &ret_entry->ret;
@@ -782,7 +783,6 @@ print_graph_entry_leaf(struct trace_iterator *iter,
 
 	if (data) {
 		struct fgraph_cpu_data *cpu_data;
-		int cpu = iter->cpu;
 
 		cpu_data = per_cpu_ptr(data->cpu_data, cpu);
 
@@ -812,6 +812,9 @@ print_graph_entry_leaf(struct trace_iterator *iter,
 
 	trace_seq_printf(s, "%ps();\n", (void *)call->func);
 
+	print_graph_irq(iter, graph_ret->func, TRACE_GRAPH_RET,
+			cpu, iter->ent->pid, flags);
+
 	return trace_handle_return(s);
 }
 

From 6a2f8f08b25025440b70f851072b631085c8d1c1 Mon Sep 17 00:00:00 2001
From: Jann Horn <jannh@google.com>
Date: Mon, 25 Jun 2018 16:25:44 +0200
Subject: [PATCH 0873/1852] scsi: sg: mitigate read/write abuse

commit 26b5b874aff5659a7e26e5b1997e3df2c41fa7fd upstream.

As Al Viro noted in commit 128394eff343 ("sg_write()/bsg_write() is not fit
to be called under KERNEL_DS"), sg improperly accesses userspace memory
outside the provided buffer, permitting kernel memory corruption via
splice().  But it doesn't just do it on ->write(), also on ->read().

As a band-aid, make sure that the ->read() and ->write() handlers can not
be called in weird contexts (kernel context or credentials different from
file opener), like for ib_safe_file_access().

If someone needs to use these interfaces from different security contexts,
a new interface should be written that goes through the ->ioctl() handler.

I've mostly copypasted ib_safe_file_access() over as sg_safe_file_access()
because I couldn't find a good common header - please tell me if you know a
better way.

[mkp: s/_safe_/_check_/]

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jann Horn <jannh@google.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sg.c | 42 ++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 40 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 841f3fbec77ce..4302880a20b33 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -51,6 +51,7 @@ static int sg_version_num = 30536;	/* 2 digits for each component */
 #include <linux/atomic.h>
 #include <linux/ratelimit.h>
 #include <linux/uio.h>
+#include <linux/cred.h> /* for sg_check_file_access() */
 
 #include "scsi.h"
 #include <scsi/scsi_dbg.h>
@@ -221,6 +222,33 @@ static void sg_device_destroy(struct kref *kref);
 	sdev_prefix_printk(prefix, (sdp)->device,		\
 			   (sdp)->disk->disk_name, fmt, ##a)
 
+/*
+ * The SCSI interfaces that use read() and write() as an asynchronous variant of
+ * ioctl(..., SG_IO, ...) are fundamentally unsafe, since there are lots of ways
+ * to trigger read() and write() calls from various contexts with elevated
+ * privileges. This can lead to kernel memory corruption (e.g. if these
+ * interfaces are called through splice()) and privilege escalation inside
+ * userspace (e.g. if a process with access to such a device passes a file
+ * descriptor to a SUID binary as stdin/stdout/stderr).
+ *
+ * This function provides protection for the legacy API by restricting the
+ * calling context.
+ */
+static int sg_check_file_access(struct file *filp, const char *caller)
+{
+	if (filp->f_cred != current_real_cred()) {
+		pr_err_once("%s: process %d (%s) changed security contexts after opening file descriptor, this is not allowed.\n",
+			caller, task_tgid_vnr(current), current->comm);
+		return -EPERM;
+	}
+	if (unlikely(segment_eq(get_fs(), KERNEL_DS))) {
+		pr_err_once("%s: process %d (%s) called from kernel context, this is not allowed.\n",
+			caller, task_tgid_vnr(current), current->comm);
+		return -EACCES;
+	}
+	return 0;
+}
+
 static int sg_allow_access(struct file *filp, unsigned char *cmd)
 {
 	struct sg_fd *sfp = filp->private_data;
@@ -405,6 +433,14 @@ sg_read(struct file *filp, char __user *buf, size_t count, loff_t * ppos)
 	struct sg_header *old_hdr = NULL;
 	int retval = 0;
 
+	/*
+	 * This could cause a response to be stranded. Close the associated
+	 * file descriptor to free up any resources being held.
+	 */
+	retval = sg_check_file_access(filp, __func__);
+	if (retval)
+		return retval;
+
 	if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp)))
 		return -ENXIO;
 	SCSI_LOG_TIMEOUT(3, sg_printk(KERN_INFO, sdp,
@@ -592,9 +628,11 @@ sg_write(struct file *filp, const char __user *buf, size_t count, loff_t * ppos)
 	struct sg_header old_hdr;
 	sg_io_hdr_t *hp;
 	unsigned char cmnd[SG_MAX_CDB_SIZE];
+	int retval;
 
-	if (unlikely(segment_eq(get_fs(), KERNEL_DS)))
-		return -EINVAL;
+	retval = sg_check_file_access(filp, __func__);
+	if (retval)
+		return retval;
 
 	if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp)))
 		return -ENXIO;

From c62f97ad05627edc36d73a4b2d8ca1883818f584 Mon Sep 17 00:00:00 2001
From: Christian Borntraeger <borntraeger@de.ibm.com>
Date: Thu, 21 Jun 2018 14:49:38 +0200
Subject: [PATCH 0874/1852] s390: Correct register corruption in critical
 section cleanup
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 891f6a726cacbb87e5b06076693ffab53bd378d7 upstream.

In the critical section cleanup we must not mess with r1.  For march=z9
or older, larl + ex (instead of exrl) are used with r1 as a temporary
register. This can clobber r1 in several interrupt handlers. Fix this by
using r11 as a temp register.  r11 is being saved by all callers of
cleanup_critical.

Fixes: 6dd85fbb87 ("s390: move expoline assembler macros to a header")
Cc: stable@vger.kernel.org #v4.16
Reported-by: Oliver Kurz <okurz@suse.com>
Reported-by: Petr Tesařík <ptesarik@suse.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/kernel/entry.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 5416d5d68308e..4cad1adff16bf 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -1170,7 +1170,7 @@ cleanup_critical:
 	jl	0f
 	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
 	jl	.Lcleanup_load_fpu_regs
-0:	BR_EX	%r14
+0:	BR_EX	%r14,%r11
 
 	.align	8
 .Lcleanup_table:
@@ -1200,7 +1200,7 @@ cleanup_critical:
 	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
 	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
 	larl	%r9,sie_exit			# skip forward to sie_exit
-	BR_EX	%r14
+	BR_EX	%r14,%r11
 #endif
 
 .Lcleanup_system_call:

From 011f211019022f22df2d0c47e1ff936cbc5773de Mon Sep 17 00:00:00 2001
From: Lars Ellenberg <lars.ellenberg@linbit.com>
Date: Mon, 25 Jun 2018 11:39:52 +0200
Subject: [PATCH 0875/1852] drbd: fix access after free

commit 64dafbc9530c10300acffc57fae3269d95fa8f93 upstream.

We have
  struct drbd_requests { ... struct bio *private_bio;  ... }
to hold a bio clone for local submission.

On local IO completion, we put that bio, and in case we want to use the
result later, we overload that member to hold the ERR_PTR() of the
completion result,

Which, before v4.3, used to be the passed in "int error",
so we could first bio_put(), then assign.

v4.3-rc1~100^2~21 4246a0b63bd8 block: add a bi_error field to struct bio
changed that:
  	bio_put(req->private_bio);
 -	req->private_bio = ERR_PTR(error);
 +	req->private_bio = ERR_PTR(bio->bi_error);

Which introduces an access after free,
because it was non obvious that req->private_bio == bio.

Impact of that was mostly unnoticable, because we only use that value
in a multiple-failure case, and even then map any "unexpected" error
code to EIO, so worst case we could potentially mask a more specific
error with EIO in a multiple failure case.

Unless the pointed to memory region was unmapped, as is the case with
CONFIG_DEBUG_PAGEALLOC, in which case this results in

  BUG: unable to handle kernel paging request

v4.13-rc1~70^2~75 4e4cbee93d56 block: switch bios to blk_status_t
changes it further to
  	bio_put(req->private_bio);
  	req->private_bio = ERR_PTR(blk_status_to_errno(bio->bi_status));

And blk_status_to_errno() now contains a WARN_ON_ONCE() for unexpected
values, which catches this "sometimes", if the memory has been reused
quickly enough for other things.

Should also go into stable since 4.3, with the trivial change around 4.13.

Cc: stable@vger.kernel.org
Fixes: 4246a0b63bd8 block: add a bi_error field to struct bio
Reported-by: Sarah Newman <srn@prgmr.com>
Signed-off-by: Lars Ellenberg <lars.ellenberg@linbit.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/block/drbd/drbd_worker.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c
index 5578c1477ba66..8bfd4fd7e9ec0 100644
--- a/drivers/block/drbd/drbd_worker.c
+++ b/drivers/block/drbd/drbd_worker.c
@@ -256,8 +256,8 @@ void drbd_request_endio(struct bio *bio)
 	} else
 		what = COMPLETED_OK;
 
-	bio_put(req->private_bio);
 	req->private_bio = ERR_PTR(bio->bi_error);
+	bio_put(bio);
 
 	/* not req_mod(), we need irqsave here! */
 	spin_lock_irqsave(&device->resource->req_lock, flags);

From 08905e7cfec84d7d35c25a666a2c042afe5f06a1 Mon Sep 17 00:00:00 2001
From: Paulo Alcantara <paulo@paulo.ac>
Date: Thu, 5 Jul 2018 13:46:34 -0300
Subject: [PATCH 0876/1852] cifs: Fix infinite loop when using hard mount
 option

commit 7ffbe65578b44fafdef577a360eb0583929f7c6e upstream.

For every request we send, whether it is SMB1 or SMB2+, we attempt to
reconnect tcon (cifs_reconnect_tcon or smb2_reconnect) before carrying
out the request.

So, while server->tcpStatus != CifsNeedReconnect, we wait for the
reconnection to succeed on wait_event_interruptible_timeout(). If it
returns, that means that either the condition was evaluated to true, or
timeout elapsed, or it was interrupted by a signal.

Since we're not handling the case where the process woke up due to a
received signal (-ERESTARTSYS), the next call to
wait_event_interruptible_timeout() will _always_ fail and we end up
looping forever inside either cifs_reconnect_tcon() or smb2_reconnect().

Here's an example of how to trigger that:

$ mount.cifs //foo/share /mnt/test -o
username=foo,password=foo,vers=1.0,hard

(break connection to server before executing bellow cmd)
$ stat -f /mnt/test & sleep 140
[1] 2511

$ ps -aux -q 2511
USER       PID %CPU %MEM    VSZ   RSS TTY      STAT START   TIME COMMAND
root      2511  0.0  0.0  12892  1008 pts/0    S    12:24   0:00 stat -f
/mnt/test

$ kill -9 2511

(wait for a while; process is stuck in the kernel)
$ ps -aux -q 2511
USER       PID %CPU %MEM    VSZ   RSS TTY      STAT START   TIME COMMAND
root      2511 83.2  0.0  12892  1008 pts/0    R    12:24  30:01 stat -f
/mnt/test

By using 'hard' mount point means that cifs.ko will keep retrying
indefinitely, however we must allow the process to be killed otherwise
it would hang the system.

Signed-off-by: Paulo Alcantara <palcantara@suse.de>
Cc: stable@vger.kernel.org
Reviewed-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <stfrench@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/cifssmb.c | 10 ++++++++--
 fs/cifs/smb2pdu.c | 18 ++++++++++++------
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 8632380d2b941..63aea21e62982 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -150,8 +150,14 @@ cifs_reconnect_tcon(struct cifs_tcon *tcon, int smb_command)
 	 * greater than cifs socket timeout which is 7 seconds
 	 */
 	while (server->tcpStatus == CifsNeedReconnect) {
-		wait_event_interruptible_timeout(server->response_q,
-			(server->tcpStatus != CifsNeedReconnect), 10 * HZ);
+		rc = wait_event_interruptible_timeout(server->response_q,
+						      (server->tcpStatus != CifsNeedReconnect),
+						      10 * HZ);
+		if (rc < 0) {
+			cifs_dbg(FYI, "%s: aborting reconnect due to a received"
+				 " signal by the process\n", __func__);
+			return -ERESTARTSYS;
+		}
 
 		/* are we still trying to reconnect? */
 		if (server->tcpStatus != CifsNeedReconnect)
diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c
index 807e989f436aa..5f5ba807b4141 100644
--- a/fs/cifs/smb2pdu.c
+++ b/fs/cifs/smb2pdu.c
@@ -158,7 +158,7 @@ smb2_hdr_assemble(struct smb2_hdr *hdr, __le16 smb2_cmd /* command */ ,
 static int
 smb2_reconnect(__le16 smb2_command, struct cifs_tcon *tcon)
 {
-	int rc = 0;
+	int rc;
 	struct nls_table *nls_codepage;
 	struct cifs_ses *ses;
 	struct TCP_Server_Info *server;
@@ -169,10 +169,10 @@ smb2_reconnect(__le16 smb2_command, struct cifs_tcon *tcon)
 	 * for those three - in the calling routine.
 	 */
 	if (tcon == NULL)
-		return rc;
+		return 0;
 
 	if (smb2_command == SMB2_TREE_CONNECT)
-		return rc;
+		return 0;
 
 	if (tcon->tidStatus == CifsExiting) {
 		/*
@@ -215,8 +215,14 @@ smb2_reconnect(__le16 smb2_command, struct cifs_tcon *tcon)
 			return -EAGAIN;
 		}
 
-		wait_event_interruptible_timeout(server->response_q,
-			(server->tcpStatus != CifsNeedReconnect), 10 * HZ);
+		rc = wait_event_interruptible_timeout(server->response_q,
+						      (server->tcpStatus != CifsNeedReconnect),
+						      10 * HZ);
+		if (rc < 0) {
+			cifs_dbg(FYI, "%s: aborting reconnect due to a received"
+				 " signal by the process\n", __func__);
+			return -ERESTARTSYS;
+		}
 
 		/* are we still trying to reconnect? */
 		if (server->tcpStatus != CifsNeedReconnect)
@@ -234,7 +240,7 @@ smb2_reconnect(__le16 smb2_command, struct cifs_tcon *tcon)
 	}
 
 	if (!tcon->ses->need_reconnect && !tcon->need_reconnect)
-		return rc;
+		return 0;
 
 	nls_codepage = load_nls_default();
 

From 4d32aed1d1fc73c27f829117bd973a37d872e4cb Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sat, 16 Jun 2018 20:21:45 -0400
Subject: [PATCH 0877/1852] jbd2: don't mark block as modified if the handle is
 out of credits

commit e09463f220ca9a1a1ecfda84fcda658f99a1f12a upstream.

Do not set the b_modified flag in block's journal head should not
until after we're sure that jbd2_journal_dirty_metadat() will not
abort with an error due to there not being enough space reserved in
the jbd2 handle.

Otherwise, future attempts to modify the buffer may lead a large
number of spurious errors and warnings.

This addresses CVE-2018-10883.

https://bugzilla.kernel.org/show_bug.cgi?id=200071

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/jbd2/transaction.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/fs/jbd2/transaction.c b/fs/jbd2/transaction.c
index f3a31f55f3721..bce343febb9e5 100644
--- a/fs/jbd2/transaction.c
+++ b/fs/jbd2/transaction.c
@@ -1363,6 +1363,13 @@ int jbd2_journal_dirty_metadata(handle_t *handle, struct buffer_head *bh)
 		if (jh->b_transaction == transaction &&
 		    jh->b_jlist != BJ_Metadata) {
 			jbd_lock_bh_state(bh);
+			if (jh->b_transaction == transaction &&
+			    jh->b_jlist != BJ_Metadata)
+				pr_err("JBD2: assertion failure: h_type=%u "
+				       "h_line_no=%u block_no=%llu jlist=%u\n",
+				       handle->h_type, handle->h_line_no,
+				       (unsigned long long) bh->b_blocknr,
+				       jh->b_jlist);
 			J_ASSERT_JH(jh, jh->b_transaction != transaction ||
 					jh->b_jlist == BJ_Metadata);
 			jbd_unlock_bh_state(bh);
@@ -1382,11 +1389,11 @@ int jbd2_journal_dirty_metadata(handle_t *handle, struct buffer_head *bh)
 		 * of the transaction. This needs to be done
 		 * once a transaction -bzzz
 		 */
-		jh->b_modified = 1;
 		if (handle->h_buffer_credits <= 0) {
 			ret = -ENOSPC;
 			goto out_unlock_bh;
 		}
+		jh->b_modified = 1;
 		handle->h_buffer_credits--;
 	}
 

From 52e0641d1e30228c36e8f3f64ed8031e4bc22a2e Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Wed, 13 Jun 2018 23:08:26 -0400
Subject: [PATCH 0878/1852] ext4: make sure bitmaps and the inode table don't
 overlap with bg descriptors

commit 77260807d1170a8cf35dbb06e07461a655f67eee upstream.

It's really bad when the allocation bitmaps and the inode table
overlap with the block group descriptors, since it causes random
corruption of the bg descriptors.  So we really want to head those off
at the pass.

https://bugzilla.kernel.org/show_bug.cgi?id=199865

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/super.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 8cff133ff5f3a..9ea4744b5ea89 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -2101,6 +2101,7 @@ static int ext4_check_descriptors(struct super_block *sb,
 	struct ext4_sb_info *sbi = EXT4_SB(sb);
 	ext4_fsblk_t first_block = le32_to_cpu(sbi->s_es->s_first_data_block);
 	ext4_fsblk_t last_block;
+	ext4_fsblk_t last_bg_block = sb_block + ext4_bg_num_gdb(sb, 0) + 1;
 	ext4_fsblk_t block_bitmap;
 	ext4_fsblk_t inode_bitmap;
 	ext4_fsblk_t inode_table;
@@ -2133,6 +2134,14 @@ static int ext4_check_descriptors(struct super_block *sb,
 			if (!(sb->s_flags & MS_RDONLY))
 				return 0;
 		}
+		if (block_bitmap >= sb_block + 1 &&
+		    block_bitmap <= last_bg_block) {
+			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "
+				 "Block bitmap for group %u overlaps "
+				 "block group descriptors", i);
+			if (!(sb->s_flags & MS_RDONLY))
+				return 0;
+		}
 		if (block_bitmap < first_block || block_bitmap > last_block) {
 			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "
 			       "Block bitmap for group %u not in group "
@@ -2147,6 +2156,14 @@ static int ext4_check_descriptors(struct super_block *sb,
 			if (!(sb->s_flags & MS_RDONLY))
 				return 0;
 		}
+		if (inode_bitmap >= sb_block + 1 &&
+		    inode_bitmap <= last_bg_block) {
+			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "
+				 "Inode bitmap for group %u overlaps "
+				 "block group descriptors", i);
+			if (!(sb->s_flags & MS_RDONLY))
+				return 0;
+		}
 		if (inode_bitmap < first_block || inode_bitmap > last_block) {
 			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "
 			       "Inode bitmap for group %u not in group "
@@ -2161,6 +2178,14 @@ static int ext4_check_descriptors(struct super_block *sb,
 			if (!(sb->s_flags & MS_RDONLY))
 				return 0;
 		}
+		if (inode_table >= sb_block + 1 &&
+		    inode_table <= last_bg_block) {
+			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "
+				 "Inode table for group %u overlaps "
+				 "block group descriptors", i);
+			if (!(sb->s_flags & MS_RDONLY))
+				return 0;
+		}
 		if (inode_table < first_block ||
 		    inode_table + sbi->s_itb_per_group - 1 > last_block) {
 			ext4_msg(sb, KERN_ERR, "ext4_check_descriptors: "

From 7c28132412d6f54a2d5b0fc214a8fd14ee1f17bd Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Wed, 13 Jun 2018 23:00:48 -0400
Subject: [PATCH 0879/1852] ext4: always check block group bounds in
 ext4_init_block_bitmap()

commit 819b23f1c501b17b9694325471789e6b5cc2d0d2 upstream.

Regardless of whether the flex_bg feature is set, we should always
check to make sure the bits we are setting in the block bitmap are
within the block group bounds.

https://bugzilla.kernel.org/show_bug.cgi?id=199865

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/balloc.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c
index c57a94f1c198c..7d3451808bf3c 100644
--- a/fs/ext4/balloc.c
+++ b/fs/ext4/balloc.c
@@ -183,7 +183,6 @@ static int ext4_init_block_bitmap(struct super_block *sb,
 	unsigned int bit, bit_max;
 	struct ext4_sb_info *sbi = EXT4_SB(sb);
 	ext4_fsblk_t start, tmp;
-	int flex_bg = 0;
 	struct ext4_group_info *grp;
 
 	J_ASSERT_BH(bh, buffer_locked(bh));
@@ -216,22 +215,19 @@ static int ext4_init_block_bitmap(struct super_block *sb,
 
 	start = ext4_group_first_block_no(sb, block_group);
 
-	if (ext4_has_feature_flex_bg(sb))
-		flex_bg = 1;
-
 	/* Set bits for block and inode bitmaps, and inode table */
 	tmp = ext4_block_bitmap(sb, gdp);
-	if (!flex_bg || ext4_block_in_group(sb, tmp, block_group))
+	if (ext4_block_in_group(sb, tmp, block_group))
 		ext4_set_bit(EXT4_B2C(sbi, tmp - start), bh->b_data);
 
 	tmp = ext4_inode_bitmap(sb, gdp);
-	if (!flex_bg || ext4_block_in_group(sb, tmp, block_group))
+	if (ext4_block_in_group(sb, tmp, block_group))
 		ext4_set_bit(EXT4_B2C(sbi, tmp - start), bh->b_data);
 
 	tmp = ext4_inode_table(sb, gdp);
 	for (; tmp < ext4_inode_table(sb, gdp) +
 		     sbi->s_itb_per_group; tmp++) {
-		if (!flex_bg || ext4_block_in_group(sb, tmp, block_group))
+		if (ext4_block_in_group(sb, tmp, block_group))
 			ext4_set_bit(EXT4_B2C(sbi, tmp - start), bh->b_data);
 	}
 

From bacd615983d2c1ac2e6f1f21d6bd6c294c67d1e0 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Thu, 14 Jun 2018 00:58:00 -0400
Subject: [PATCH 0880/1852] ext4: only look at the bg_flags field if it is
 valid

commit 8844618d8aa7a9973e7b527d038a2a589665002c upstream.

The bg_flags field in the block group descripts is only valid if the
uninit_bg or metadata_csum feature is enabled.  We were not
consistently looking at this field; fix this.

Also block group #0 must never have uninitialized allocation bitmaps,
or need to be zeroed, since that's where the root inode, and other
special inodes are set up.  Check for these conditions and mark the
file system as corrupted if they are detected.

This addresses CVE-2018-10876.

https://bugzilla.kernel.org/show_bug.cgi?id=199403

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/balloc.c  | 11 ++++++++++-
 fs/ext4/ialloc.c  | 14 ++++++++++++--
 fs/ext4/mballoc.c |  6 ++++--
 fs/ext4/super.c   | 11 ++++++++++-
 4 files changed, 36 insertions(+), 6 deletions(-)

diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c
index 7d3451808bf3c..092da164bdc0b 100644
--- a/fs/ext4/balloc.c
+++ b/fs/ext4/balloc.c
@@ -450,7 +450,16 @@ ext4_read_block_bitmap_nowait(struct super_block *sb, ext4_group_t block_group)
 		goto verify;
 	}
 	ext4_lock_group(sb, block_group);
-	if (desc->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) {
+	if (ext4_has_group_desc_csum(sb) &&
+	    (desc->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT))) {
+		if (block_group == 0) {
+			ext4_unlock_group(sb, block_group);
+			unlock_buffer(bh);
+			ext4_error(sb, "Block bitmap for bg 0 marked "
+				   "uninitialized");
+			err = -EFSCORRUPTED;
+			goto out;
+		}
 		err = ext4_init_block_bitmap(sb, bh, block_group, desc);
 		set_bitmap_uptodate(bh);
 		set_buffer_uptodate(bh);
diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c
index 9fe55b7d4c2c7..48d818eba9c33 100644
--- a/fs/ext4/ialloc.c
+++ b/fs/ext4/ialloc.c
@@ -152,7 +152,16 @@ ext4_read_inode_bitmap(struct super_block *sb, ext4_group_t block_group)
 	}
 
 	ext4_lock_group(sb, block_group);
-	if (desc->bg_flags & cpu_to_le16(EXT4_BG_INODE_UNINIT)) {
+	if (ext4_has_group_desc_csum(sb) &&
+	    (desc->bg_flags & cpu_to_le16(EXT4_BG_INODE_UNINIT))) {
+		if (block_group == 0) {
+			ext4_unlock_group(sb, block_group);
+			unlock_buffer(bh);
+			ext4_error(sb, "Inode bitmap for bg 0 marked "
+				   "uninitialized");
+			err = -EFSCORRUPTED;
+			goto out;
+		}
 		memset(bh->b_data, 0, (EXT4_INODES_PER_GROUP(sb) + 7) / 8);
 		ext4_mark_bitmap_end(EXT4_INODES_PER_GROUP(sb),
 				     sb->s_blocksize * 8, bh->b_data);
@@ -919,7 +928,8 @@ struct inode *__ext4_new_inode(handle_t *handle, struct inode *dir,
 
 		/* recheck and clear flag under lock if we still need to */
 		ext4_lock_group(sb, group);
-		if (gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) {
+		if (ext4_has_group_desc_csum(sb) &&
+		    (gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT))) {
 			gdp->bg_flags &= cpu_to_le16(~EXT4_BG_BLOCK_UNINIT);
 			ext4_free_group_clusters_set(sb, gdp,
 				ext4_free_clusters_after_init(sb, group, gdp));
diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
index 03b874f3fefd1..671552273b077 100644
--- a/fs/ext4/mballoc.c
+++ b/fs/ext4/mballoc.c
@@ -2445,7 +2445,8 @@ int ext4_mb_add_groupinfo(struct super_block *sb, ext4_group_t group,
 	 * initialize bb_free to be able to skip
 	 * empty groups without initialization
 	 */
-	if (desc->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) {
+	if (ext4_has_group_desc_csum(sb) &&
+	    (desc->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT))) {
 		meta_group_info[i]->bb_free =
 			ext4_free_clusters_after_init(sb, group, desc);
 	} else {
@@ -2967,7 +2968,8 @@ ext4_mb_mark_diskspace_used(struct ext4_allocation_context *ac,
 #endif
 	ext4_set_bits(bitmap_bh->b_data, ac->ac_b_ex.fe_start,
 		      ac->ac_b_ex.fe_len);
-	if (gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT)) {
+	if (ext4_has_group_desc_csum(sb) &&
+	    (gdp->bg_flags & cpu_to_le16(EXT4_BG_BLOCK_UNINIT))) {
 		gdp->bg_flags &= cpu_to_le16(~EXT4_BG_BLOCK_UNINIT);
 		ext4_free_group_clusters_set(sb, gdp,
 					     ext4_free_clusters_after_init(sb,
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 9ea4744b5ea89..2367a4a62c5f3 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -2866,13 +2866,22 @@ static ext4_group_t ext4_has_uninit_itable(struct super_block *sb)
 	ext4_group_t group, ngroups = EXT4_SB(sb)->s_groups_count;
 	struct ext4_group_desc *gdp = NULL;
 
+	if (!ext4_has_group_desc_csum(sb))
+		return ngroups;
+
 	for (group = 0; group < ngroups; group++) {
 		gdp = ext4_get_group_desc(sb, group, NULL);
 		if (!gdp)
 			continue;
 
-		if (!(gdp->bg_flags & cpu_to_le16(EXT4_BG_INODE_ZEROED)))
+		if (gdp->bg_flags & cpu_to_le16(EXT4_BG_INODE_ZEROED))
+			continue;
+		if (group != 0)
 			break;
+		ext4_error(sb, "Inode table for bg 0 marked as "
+			   "needing zeroing");
+		if (sb->s_flags & MS_RDONLY)
+			return ngroups;
 	}
 
 	return group;

From d882c6ae81fc54582539c7acabcf6775dcd3c758 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Thu, 14 Jun 2018 12:55:10 -0400
Subject: [PATCH 0881/1852] ext4: verify the depth of extent tree in
 ext4_find_extent()

commit bc890a60247171294acc0bd67d211fa4b88d40ba upstream.

If there is a corupted file system where the claimed depth of the
extent tree is -1, this can cause a massive buffer overrun leading to
sadness.

This addresses CVE-2018-10877.

https://bugzilla.kernel.org/show_bug.cgi?id=199417

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/ext4_extents.h | 1 +
 fs/ext4/extents.c      | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/fs/ext4/ext4_extents.h b/fs/ext4/ext4_extents.h
index 3c93815470947..2d8e737935121 100644
--- a/fs/ext4/ext4_extents.h
+++ b/fs/ext4/ext4_extents.h
@@ -103,6 +103,7 @@ struct ext4_extent_header {
 };
 
 #define EXT4_EXT_MAGIC		cpu_to_le16(0xf30a)
+#define EXT4_MAX_EXTENT_DEPTH 5
 
 #define EXT4_EXTENT_TAIL_OFFSET(hdr) \
 	(sizeof(struct ext4_extent_header) + \
diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c
index 4705c21f9d031..1708597659a14 100644
--- a/fs/ext4/extents.c
+++ b/fs/ext4/extents.c
@@ -876,6 +876,12 @@ ext4_find_extent(struct inode *inode, ext4_lblk_t block,
 
 	eh = ext_inode_hdr(inode);
 	depth = ext_depth(inode);
+	if (depth < 0 || depth > EXT4_MAX_EXTENT_DEPTH) {
+		EXT4_ERROR_INODE(inode, "inode has invalid extent depth: %d",
+				 depth);
+		ret = -EFSCORRUPTED;
+		goto err;
+	}
 
 	if (path) {
 		ext4_ext_drop_refs(path);

From 732bdd9423d4ec4e745321e6d5c427bd55ae1247 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Fri, 15 Jun 2018 12:27:16 -0400
Subject: [PATCH 0882/1852] ext4: include the illegal physical block in the bad
 map ext4_error msg

commit bdbd6ce01a70f02e9373a584d0ae9538dcf0a121 upstream.

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/inode.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 6ea6cb62f85ca..0c9b2fa150169 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -381,9 +381,9 @@ static int __check_block_validity(struct inode *inode, const char *func,
 	if (!ext4_data_block_valid(EXT4_SB(inode->i_sb), map->m_pblk,
 				   map->m_len)) {
 		ext4_error_inode(inode, func, line, map->m_pblk,
-				 "lblock %lu mapped to illegal pblock "
+				 "lblock %lu mapped to illegal pblock %llu "
 				 "(length %d)", (unsigned long) map->m_lblk,
-				 map->m_len);
+				 map->m_pblk, map->m_len);
 		return -EFSCORRUPTED;
 	}
 	return 0;

From 991eabb455e74ea9b0be7f5be43ad44b855d37cb Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Fri, 15 Jun 2018 12:28:16 -0400
Subject: [PATCH 0883/1852] ext4: clear i_data in ext4_inode_info when removing
 inline data

commit 6e8ab72a812396996035a37e5ca4b3b99b5d214b upstream.

When converting from an inode from storing the data in-line to a data
block, ext4_destroy_inline_data_nolock() was only clearing the on-disk
copy of the i_blocks[] array.  It was not clearing copy of the
i_blocks[] in ext4_inode_info, in i_data[], which is the copy actually
used by ext4_map_blocks().

This didn't matter much if we are using extents, since the extents
header would be invalid and thus the extents could would re-initialize
the extents tree.  But if we are using indirect blocks, the previous
contents of the i_blocks array will be treated as block numbers, with
potentially catastrophic results to the file system integrity and/or
user data.

This gets worse if the file system is using a 1k block size and
s_first_data is zero, but even without this, the file system can get
quite badly corrupted.

This addresses CVE-2018-10881.

https://bugzilla.kernel.org/show_bug.cgi?id=200015

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/inline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/ext4/inline.c b/fs/ext4/inline.c
index 30c851e4707e0..18e642911a3d1 100644
--- a/fs/ext4/inline.c
+++ b/fs/ext4/inline.c
@@ -435,6 +435,7 @@ static int ext4_destroy_inline_data_nolock(handle_t *handle,
 
 	memset((void *)ext4_raw_inode(&is.iloc)->i_block,
 		0, EXT4_MIN_INLINE_DATA_SIZE);
+	memset(ei->i_data, 0, EXT4_MIN_INLINE_DATA_SIZE);
 
 	if (ext4_has_feature_extents(inode->i_sb)) {
 		if (S_ISDIR(inode->i_mode) ||

From 660eeaaf8fe83914004181f9b4ba67597fe5a4bb Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sun, 17 Jun 2018 00:41:14 -0400
Subject: [PATCH 0884/1852] ext4: add more inode number paranoia checks

commit c37e9e013469521d9adb932d17a1795c139b36db upstream.

If there is a directory entry pointing to a system inode (such as a
journal inode), complain and declare the file system to be corrupted.

Also, if the superblock's first inode number field is too small,
refuse to mount the file system.

This addresses CVE-2018-10882.

https://bugzilla.kernel.org/show_bug.cgi?id=200069

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/ext4.h  | 5 -----
 fs/ext4/inode.c | 3 ++-
 fs/ext4/super.c | 5 +++++
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index 40992b68e6391..8452a5a405f47 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -1471,11 +1471,6 @@ static inline struct timespec ext4_current_time(struct inode *inode)
 static inline int ext4_valid_inum(struct super_block *sb, unsigned long ino)
 {
 	return ino == EXT4_ROOT_INO ||
-		ino == EXT4_USR_QUOTA_INO ||
-		ino == EXT4_GRP_QUOTA_INO ||
-		ino == EXT4_BOOT_LOADER_INO ||
-		ino == EXT4_JOURNAL_INO ||
-		ino == EXT4_RESIZE_INO ||
 		(ino >= EXT4_FIRST_INO(sb) &&
 		 ino <= le32_to_cpu(EXT4_SB(sb)->s_es->s_inodes_count));
 }
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 0c9b2fa150169..d9eb83e8c3351 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -4045,7 +4045,8 @@ static int __ext4_get_inode_loc(struct inode *inode,
 	int			inodes_per_block, inode_offset;
 
 	iloc->bh = NULL;
-	if (!ext4_valid_inum(sb, inode->i_ino))
+	if (inode->i_ino < EXT4_ROOT_INO ||
+	    inode->i_ino > le32_to_cpu(EXT4_SB(sb)->s_es->s_inodes_count))
 		return -EFSCORRUPTED;
 
 	iloc->block_group = (inode->i_ino - 1) / EXT4_INODES_PER_GROUP(sb);
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 2367a4a62c5f3..b4f747f52dead 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -3548,6 +3548,11 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 	} else {
 		sbi->s_inode_size = le16_to_cpu(es->s_inode_size);
 		sbi->s_first_ino = le32_to_cpu(es->s_first_ino);
+		if (sbi->s_first_ino < EXT4_GOOD_OLD_FIRST_INO) {
+			ext4_msg(sb, KERN_ERR, "invalid first ino: %u",
+				 sbi->s_first_ino);
+			goto failed_mount;
+		}
 		if ((sbi->s_inode_size < EXT4_GOOD_OLD_INODE_SIZE) ||
 		    (!is_power_of_2(sbi->s_inode_size)) ||
 		    (sbi->s_inode_size > blocksize)) {

From ae38b7f840a3a599c6254f97a2007bc5cf28543d Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sun, 17 Jun 2018 18:11:20 -0400
Subject: [PATCH 0885/1852] ext4: add more mount time checks of the superblock

commit bfe0a5f47ada40d7984de67e59a7d3390b9b9ecc upstream.

The kernel's ext4 mount-time checks were more permissive than
e2fsprogs's libext2fs checks when opening a file system.  The
superblock is considered too insane for debugfs or e2fsck to operate
on it, the kernel has no business trying to mount it.

This will make file system fuzzing tools work harder, but the failure
cases that they find will be more useful and be easier to evaluate.

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/super.c | 37 ++++++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index b4f747f52dead..1cfcf3edff851 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -3484,6 +3484,13 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 			 le32_to_cpu(es->s_log_block_size));
 		goto failed_mount;
 	}
+	if (le32_to_cpu(es->s_log_cluster_size) >
+	    (EXT4_MAX_CLUSTER_LOG_SIZE - EXT4_MIN_BLOCK_LOG_SIZE)) {
+		ext4_msg(sb, KERN_ERR,
+			 "Invalid log cluster size: %u",
+			 le32_to_cpu(es->s_log_cluster_size));
+		goto failed_mount;
+	}
 
 	if (le16_to_cpu(sbi->s_es->s_reserved_gdt_blocks) > (blocksize / 4)) {
 		ext4_msg(sb, KERN_ERR,
@@ -3629,13 +3636,6 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 				 "block size (%d)", clustersize, blocksize);
 			goto failed_mount;
 		}
-		if (le32_to_cpu(es->s_log_cluster_size) >
-		    (EXT4_MAX_CLUSTER_LOG_SIZE - EXT4_MIN_BLOCK_LOG_SIZE)) {
-			ext4_msg(sb, KERN_ERR,
-				 "Invalid log cluster size: %u",
-				 le32_to_cpu(es->s_log_cluster_size));
-			goto failed_mount;
-		}
 		sbi->s_cluster_bits = le32_to_cpu(es->s_log_cluster_size) -
 			le32_to_cpu(es->s_log_block_size);
 		sbi->s_clusters_per_group =
@@ -3656,10 +3656,10 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 		}
 	} else {
 		if (clustersize != blocksize) {
-			ext4_warning(sb, "fragment/cluster size (%d) != "
-				     "block size (%d)", clustersize,
-				     blocksize);
-			clustersize = blocksize;
+			ext4_msg(sb, KERN_ERR,
+				 "fragment/cluster size (%d) != "
+				 "block size (%d)", clustersize, blocksize);
+			goto failed_mount;
 		}
 		if (sbi->s_blocks_per_group > blocksize * 8) {
 			ext4_msg(sb, KERN_ERR,
@@ -3713,6 +3713,13 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 			 ext4_blocks_count(es));
 		goto failed_mount;
 	}
+	if ((es->s_first_data_block == 0) && (es->s_log_block_size == 0) &&
+	    (sbi->s_cluster_ratio == 1)) {
+		ext4_msg(sb, KERN_WARNING, "bad geometry: first data "
+			 "block is 0 with a 1k block and cluster size");
+		goto failed_mount;
+	}
+
 	blocks_count = (ext4_blocks_count(es) -
 			le32_to_cpu(es->s_first_data_block) +
 			EXT4_BLOCKS_PER_GROUP(sb) - 1);
@@ -3748,6 +3755,14 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 		ret = -ENOMEM;
 		goto failed_mount;
 	}
+	if (((u64)sbi->s_groups_count * sbi->s_inodes_per_group) !=
+	    le32_to_cpu(es->s_inodes_count)) {
+		ext4_msg(sb, KERN_ERR, "inodes count not valid: %u vs %llu",
+			 le32_to_cpu(es->s_inodes_count),
+			 ((u64)sbi->s_groups_count * sbi->s_inodes_per_group));
+		ret = -EINVAL;
+		goto failed_mount;
+	}
 
 	bgl_lock_init(sbi->s_blockgroup_lock);
 

From 333e455ca71676c2af4a657a32cbc679b6132c90 Mon Sep 17 00:00:00 2001
From: Jon Derrick <jonathan.derrick@intel.com>
Date: Mon, 2 Jul 2018 18:45:18 -0400
Subject: [PATCH 0886/1852] ext4: check superblock mapped prior to committing

commit a17712c8e4be4fa5404d20e9cd3b2b21eae7bc56 upstream.

This patch attempts to close a hole leading to a BUG seen with hot
removals during writes [1].

A block device (NVME namespace in this test case) is formatted to EXT4
without partitions. It's mounted and write I/O is run to a file, then
the device is hot removed from the slot. The superblock attempts to be
written to the drive which is no longer present.

The typical chain of events leading to the BUG:
ext4_commit_super()
  __sync_dirty_buffer()
    submit_bh()
      submit_bh_wbc()
        BUG_ON(!buffer_mapped(bh));

This fix checks for the superblock's buffer head being mapped prior to
syncing.

[1] https://www.spinics.net/lists/linux-ext4/msg56527.html

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/super.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 1cfcf3edff851..c5ba22bdeaa93 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -4445,6 +4445,14 @@ static int ext4_commit_super(struct super_block *sb, int sync)
 
 	if (!sbh || block_device_ejected(sb))
 		return error;
+
+	/*
+	 * The superblock bh should be mapped, but it might not be if the
+	 * device was hot-removed. Not much we can do but fail the I/O.
+	 */
+	if (!buffer_mapped(sbh))
+		return error;
+
 	if (buffer_write_io_error(sbh)) {
 		/*
 		 * Oh, dear.  A previous attempt to write the

From b3ce066e1d616233843d4d761143eac9b26cc37c Mon Sep 17 00:00:00 2001
From: Jason Andryuk <jandryuk@gmail.com>
Date: Fri, 22 Jun 2018 12:25:49 -0400
Subject: [PATCH 0887/1852] HID: i2c-hid: Fix "incomplete report" noise

commit ef6eaf27274c0351f7059163918f3795da13199c upstream.

Commit ac75a041048b ("HID: i2c-hid: fix size check and type usage") started
writing messages when the ret_size is <= 2 from i2c_master_recv.  However, my
device i2c-DLL07D1 returns 2 for a short period of time (~0.5s) after I stop
moving the pointing stick or touchpad.  It varies, but you get ~50 messages
each time which spams the log hard.

[  95.925055] i2c_hid i2c-DLL07D1:01: i2c_hid_get_input: incomplete report (83/2)

This has also been observed with a i2c-ALP0017.

[ 1781.266353] i2c_hid i2c-ALP0017:00: i2c_hid_get_input: incomplete report (30/2)

Only print the message when ret_size is totally invalid and less than 2 to cut
down on the log spam.

Fixes: ac75a041048b ("HID: i2c-hid: fix size check and type usage")
Reported-by: John Smith <john-s-84@gmx.net>
Cc: stable@vger.kernel.org
Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/i2c-hid/i2c-hid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
index a98607ad0088f..780f82f9d966e 100644
--- a/drivers/hid/i2c-hid/i2c-hid.c
+++ b/drivers/hid/i2c-hid/i2c-hid.c
@@ -448,7 +448,7 @@ static void i2c_hid_get_input(struct i2c_hid *ihid)
 		return;
 	}
 
-	if ((ret_size > size) || (ret_size <= 2)) {
+	if ((ret_size > size) || (ret_size < 2)) {
 		dev_err(&ihid->client->dev, "%s: incomplete report (%d/%d)\n",
 			__func__, size, ret_size);
 		return;

From f4d5adb97f96f4acec6edbd38fd3be63bf678e5f Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Fri, 29 Jun 2018 17:08:44 -0500
Subject: [PATCH 0888/1852] HID: hiddev: fix potential Spectre v1

commit 4f65245f2d178b9cba48350620d76faa4a098841 upstream.

uref->field_index, uref->usage_index, finfo.field_index and cinfo.index can be
indirectly controlled by user-space, hence leading to a potential exploitation
of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

drivers/hid/usbhid/hiddev.c:473 hiddev_ioctl_usage() warn: potential spectre issue 'report->field' (local cap)
drivers/hid/usbhid/hiddev.c:477 hiddev_ioctl_usage() warn: potential spectre issue 'field->usage' (local cap)
drivers/hid/usbhid/hiddev.c:757 hiddev_ioctl() warn: potential spectre issue 'report->field' (local cap)
drivers/hid/usbhid/hiddev.c:801 hiddev_ioctl() warn: potential spectre issue 'hid->collection' (local cap)

Fix this by sanitizing such structure fields before using them to index
report->field, field->usage and hid->collection

Notice that given that speculation windows are large, the policy is
to kill the speculation on the first load and not worry if it can be
completed with a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2

Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/usbhid/hiddev.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c
index 700145b150889..b59b15d4caa96 100644
--- a/drivers/hid/usbhid/hiddev.c
+++ b/drivers/hid/usbhid/hiddev.c
@@ -35,6 +35,7 @@
 #include <linux/hiddev.h>
 #include <linux/compat.h>
 #include <linux/vmalloc.h>
+#include <linux/nospec.h>
 #include "usbhid.h"
 
 #ifdef CONFIG_USB_DYNAMIC_MINORS
@@ -478,10 +479,14 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd,
 
 		if (uref->field_index >= report->maxfield)
 			goto inval;
+		uref->field_index = array_index_nospec(uref->field_index,
+						       report->maxfield);
 
 		field = report->field[uref->field_index];
 		if (uref->usage_index >= field->maxusage)
 			goto inval;
+		uref->usage_index = array_index_nospec(uref->usage_index,
+						       field->maxusage);
 
 		uref->usage_code = field->usage[uref->usage_index].hid;
 
@@ -508,6 +513,8 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd,
 
 			if (uref->field_index >= report->maxfield)
 				goto inval;
+			uref->field_index = array_index_nospec(uref->field_index,
+							       report->maxfield);
 
 			field = report->field[uref->field_index];
 
@@ -761,6 +768,8 @@ static long hiddev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 
 		if (finfo.field_index >= report->maxfield)
 			break;
+		finfo.field_index = array_index_nospec(finfo.field_index,
+						       report->maxfield);
 
 		field = report->field[finfo.field_index];
 		memset(&finfo, 0, sizeof(finfo));
@@ -801,6 +810,8 @@ static long hiddev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 
 		if (cinfo.index >= hid->maxcollection)
 			break;
+		cinfo.index = array_index_nospec(cinfo.index,
+						 hid->maxcollection);
 
 		cinfo.type = hid->collection[cinfo.index].type;
 		cinfo.usage = hid->collection[cinfo.index].usage;

From 01680a974fbdb2fd644fe8d5493b87722aa973b2 Mon Sep 17 00:00:00 2001
From: Daniel Rosenberg <drosen@google.com>
Date: Mon, 2 Jul 2018 16:59:37 -0700
Subject: [PATCH 0889/1852] HID: debug: check length before copy_to_user()

commit 717adfdaf14704fd3ec7fa2c04520c0723247eac upstream.

If our length is greater than the size of the buffer, we
overflow the buffer

Cc: stable@vger.kernel.org
Signed-off-by: Daniel Rosenberg <drosen@google.com>
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/hid-debug.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c
index 2886b645ced73..6c60f4b63d21d 100644
--- a/drivers/hid/hid-debug.c
+++ b/drivers/hid/hid-debug.c
@@ -1152,6 +1152,8 @@ static ssize_t hid_debug_events_read(struct file *file, char __user *buffer,
 			goto out;
 		if (list->tail > list->head) {
 			len = list->tail - list->head;
+			if (len > count)
+				len = count;
 
 			if (copy_to_user(buffer + ret, &list->hid_debug_buf[list->head], len)) {
 				ret = -EFAULT;
@@ -1161,6 +1163,8 @@ static ssize_t hid_debug_events_read(struct file *file, char __user *buffer,
 			list->head += len;
 		} else {
 			len = HID_DEBUG_BUFSIZE - list->head;
+			if (len > count)
+				len = count;
 
 			if (copy_to_user(buffer, &list->hid_debug_buf[list->head], len)) {
 				ret = -EFAULT;
@@ -1168,7 +1172,9 @@ static ssize_t hid_debug_events_read(struct file *file, char __user *buffer,
 			}
 			list->head = 0;
 			ret += len;
-			goto copy_rest;
+			count -= len;
+			if (count > 0)
+				goto copy_rest;
 		}
 
 	}

From 741d5e212e353c35fb22231507abaaa3dc3ba9f0 Mon Sep 17 00:00:00 2001
From: Yazen Ghannam <Yazen.Ghannam@amd.com>
Date: Sat, 30 Apr 2016 14:33:57 +0200
Subject: [PATCH 0890/1852] x86/mce: Detect local MCEs properly

commit fead35c68926682c90c995f22b48f1c8d78865c1 upstream.

Check the MCG_STATUS_LMCES bit on Intel to verify that current MCE is
local. It is always local on AMD.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
[ Massaged it a bit. Reflowed comments. Shut up -Wmaybe-uninitialized. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462019637-16474-8-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 33 +++++++++++++++++++-------------
 1 file changed, 20 insertions(+), 13 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 6edb9530d7e99..474526a57284e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -980,11 +980,12 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 	int i;
 	int worst = 0;
 	int severity;
+
 	/*
 	 * Establish sequential order between the CPUs entering the machine
 	 * check handler.
 	 */
-	int order;
+	int order = -1;
 	/*
 	 * If no_way_out gets set, there is no safe way to recover from this
 	 * MCE.  If mca_cfg.tolerant is cranked up, we'll try anyway.
@@ -1000,7 +1001,12 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 	char *msg = "Unknown";
 	u64 recover_paddr = ~0ull;
 	int flags = MF_ACTION_REQUIRED;
-	int lmce = 0;
+
+	/*
+	 * MCEs are always local on AMD. Same is determined by MCG_STATUS_LMCES
+	 * on Intel.
+	 */
+	int lmce = 1;
 
 	/* If this CPU is offline, just bail out. */
 	if (cpu_is_offline(smp_processor_id())) {
@@ -1039,19 +1045,20 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 		kill_it = 1;
 
 	/*
-	 * Check if this MCE is signaled to only this logical processor
+	 * Check if this MCE is signaled to only this logical processor,
+	 * on Intel only.
 	 */
-	if (m.mcgstatus & MCG_STATUS_LMCES)
-		lmce = 1;
-	else {
-		/*
-		 * Go through all the banks in exclusion of the other CPUs.
-		 * This way we don't report duplicated events on shared banks
-		 * because the first one to see it will clear it.
-		 * If this is a Local MCE, then no need to perform rendezvous.
-		 */
+	if (m.cpuvendor == X86_VENDOR_INTEL)
+		lmce = m.mcgstatus & MCG_STATUS_LMCES;
+
+	/*
+	 * Go through all banks in exclusion of the other CPUs. This way we
+	 * don't report duplicated events on shared banks because the first one
+	 * to see it will clear it. If this is a Local MCE, then no need to
+	 * perform rendezvous.
+	 */
+	if (!lmce)
 		order = mce_start(&no_way_out);
-	}
 
 	for (i = 0; i < cfg->banks; i++) {
 		__clear_bit(i, toclear);

From 8f9922f47c9e6c44310615ed4edfa5d6d7e2a6ed Mon Sep 17 00:00:00 2001
From: Tony Luck <tony.luck@intel.com>
Date: Fri, 22 Jun 2018 11:54:23 +0200
Subject: [PATCH 0891/1852] x86/mce: Fix incorrect "Machine check from unknown
 source" message

commit 40c36e2741d7fe1e66d6ec55477ba5fd19c9c5d2 upstream.

Some injection testing resulted in the following console log:

  mce: [Hardware Error]: CPU 22: Machine Check Exception: f Bank 1: bd80000000100134
  mce: [Hardware Error]: RIP 10:<ffffffffc05292dd> {pmem_do_bvec+0x11d/0x330 [nd_pmem]}
  mce: [Hardware Error]: TSC c51a63035d52 ADDR 3234bc4000 MISC 88
  mce: [Hardware Error]: PROCESSOR 0:50654 TIME 1526502199 SOCKET 0 APIC 38 microcode 2000043
  mce: [Hardware Error]: Run the above through 'mcelog --ascii'
  Kernel panic - not syncing: Machine check from unknown source

This confused everybody because the first line quite clearly shows
that we found a logged error in "Bank 1", while the last line says
"unknown source".

The problem is that the Linux code doesn't do the right thing
for a local machine check that results in a fatal error.

It turns out that we know very early in the handler whether the
machine check is fatal. The call to mce_no_way_out() has checked
all the banks for the CPU that took the local machine check. If
it says we must crash, we can do so right away with the right
messages.

We do scan all the banks again. This means that we might initially
not see a problem, but during the second scan find something fatal.
If this happens we print a slightly different message (so I can
see if it actually every happens).

[ bp: Remove unneeded severity assignment. ]

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: stable@vger.kernel.org # 4.2
Link: http://lkml.kernel.org/r/52e049a497e86fd0b71c529651def8871c804df0.1527283897.git.tony.luck@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 474526a57284e..ddc9b81259181 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1052,13 +1052,18 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 		lmce = m.mcgstatus & MCG_STATUS_LMCES;
 
 	/*
+	 * Local machine check may already know that we have to panic.
+	 * Broadcast machine check begins rendezvous in mce_start()
 	 * Go through all banks in exclusion of the other CPUs. This way we
 	 * don't report duplicated events on shared banks because the first one
-	 * to see it will clear it. If this is a Local MCE, then no need to
-	 * perform rendezvous.
+	 * to see it will clear it.
 	 */
-	if (!lmce)
+	if (lmce) {
+		if (no_way_out)
+			mce_panic("Fatal local machine check", &m, msg);
+	} else {
 		order = mce_start(&no_way_out);
+	}
 
 	for (i = 0; i < cfg->banks; i++) {
 		__clear_bit(i, toclear);
@@ -1135,12 +1140,17 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 			no_way_out = worst >= MCE_PANIC_SEVERITY;
 	} else {
 		/*
-		 * Local MCE skipped calling mce_reign()
-		 * If we found a fatal error, we need to panic here.
+		 * If there was a fatal machine check we should have
+		 * already called mce_panic earlier in this function.
+		 * Since we re-read the banks, we might have found
+		 * something new. Check again to see if we found a
+		 * fatal error. We call "mce_severity()" again to
+		 * make sure we have the right "msg".
 		 */
-		 if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
-			mce_panic("Machine check from unknown source",
-				NULL, NULL);
+		if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) {
+			mce_severity(&m, cfg->tolerant, &msg, true);
+			mce_panic("Local fatal machine check!", &m, msg);
+		}
 	}
 
 	/*

From e1e8aa8047ecd8da10ff48a0d27394e84d391a54 Mon Sep 17 00:00:00 2001
From: Brad Love <brad@nextdimension.cc>
Date: Tue, 6 Mar 2018 14:15:34 -0500
Subject: [PATCH 0892/1852] media: cx25840: Use subdev host data for PLL
 override

commit 3ee9bc12342cf546313d300808ff47d7dbb8e7db upstream.

The cx25840 driver currently configures 885, 887, and 888 using
default divisors for each chip. This check to see if the cx23885
driver has passed the cx25840 a non-default clock rate for a
specific chip. If a cx23885 board has left clk_freq at 0, the
clock default values will be used to configure the PLLs.

This patch only has effect on 888 boards who set clk_freq to 25M.

Signed-off-by: Brad Love <brad@nextdimension.cc>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/i2c/cx25840/cx25840-core.c | 28 +++++++++++++++++++-----
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/media/i2c/cx25840/cx25840-core.c b/drivers/media/i2c/cx25840/cx25840-core.c
index a47ab1947cc45..17d217c3585a5 100644
--- a/drivers/media/i2c/cx25840/cx25840-core.c
+++ b/drivers/media/i2c/cx25840/cx25840-core.c
@@ -467,8 +467,13 @@ static void cx23885_initialize(struct i2c_client *client)
 {
 	DEFINE_WAIT(wait);
 	struct cx25840_state *state = to_state(i2c_get_clientdata(client));
+	u32 clk_freq = 0;
 	struct workqueue_struct *q;
 
+	/* cx23885 sets hostdata to clk_freq pointer */
+	if (v4l2_get_subdev_hostdata(&state->sd))
+		clk_freq = *((u32 *)v4l2_get_subdev_hostdata(&state->sd));
+
 	/*
 	 * Come out of digital power down
 	 * The CX23888, at least, needs this, otherwise registers aside from
@@ -504,8 +509,13 @@ static void cx23885_initialize(struct i2c_client *client)
 		 * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
 		 * 572.73 MHz before post divide
 		 */
-		/* HVR1850 or 50MHz xtal */
-		cx25840_write(client, 0x2, 0x71);
+		if (clk_freq == 25000000) {
+			/* 888/ImpactVCBe or 25Mhz xtal */
+			; /* nothing to do */
+		} else {
+			/* HVR1850 or 50MHz xtal */
+			cx25840_write(client, 0x2, 0x71);
+		}
 		cx25840_write4(client, 0x11c, 0x01d1744c);
 		cx25840_write4(client, 0x118, 0x00000416);
 		cx25840_write4(client, 0x404, 0x0010253e);
@@ -548,9 +558,15 @@ static void cx23885_initialize(struct i2c_client *client)
 	/* HVR1850 */
 	switch (state->id) {
 	case CX23888_AV:
-		/* 888/HVR1250 specific */
-		cx25840_write4(client, 0x10c, 0x13333333);
-		cx25840_write4(client, 0x108, 0x00000515);
+		if (clk_freq == 25000000) {
+			/* 888/ImpactVCBe or 25MHz xtal */
+			cx25840_write4(client, 0x10c, 0x01b6db7b);
+			cx25840_write4(client, 0x108, 0x00000512);
+		} else {
+			/* 888/HVR1250 or 50MHz xtal */
+			cx25840_write4(client, 0x10c, 0x13333333);
+			cx25840_write4(client, 0x108, 0x00000515);
+		}
 		break;
 	default:
 		cx25840_write4(client, 0x10c, 0x002be2c9);
@@ -577,7 +593,7 @@ static void cx23885_initialize(struct i2c_client *client)
 		 * 368.64 MHz before post divide
 		 * 122.88 MHz / 0xa = 12.288 MHz
 		 */
-		/* HVR1850  or 50MHz xtal */
+		/* HVR1850 or 50MHz xtal or 25MHz xtal */
 		cx25840_write4(client, 0x114, 0x017dbf48);
 		cx25840_write4(client, 0x110, 0x000a030e);
 		break;

From 3b6d5494e1d1b9cfde10d326d58e321d43825c55 Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Thu, 7 Jun 2018 17:09:29 -0700
Subject: [PATCH 0893/1852] mm, page_alloc: do not break __GFP_THISNODE by
 zonelist reset

commit 7810e6781e0fcbca78b91cf65053f895bf59e85f upstream.

In __alloc_pages_slowpath() we reset zonelist and preferred_zoneref for
allocations that can ignore memory policies.  The zonelist is obtained
from current CPU's node.  This is a problem for __GFP_THISNODE
allocations that want to allocate on a different node, e.g.  because the
allocating thread has been migrated to a different CPU.

This has been observed to break SLAB in our 4.4-based kernel, because
there it relies on __GFP_THISNODE working as intended.  If a slab page
is put on wrong node's list, then further list manipulations may corrupt
the list because page_to_nid() is used to determine which node's
list_lock should be locked and thus we may take a wrong lock and race.

Current SLAB implementation seems to be immune by luck thanks to commit
511e3a058812 ("mm/slab: make cache_grow() handle the page allocated on
arbitrary node") but there may be others assuming that __GFP_THISNODE
works as promised.

We can fix it by simply removing the zonelist reset completely.  There
is actually no reason to reset it, because memory policies and cpusets
don't affect the zonelist choice in the first place.  This was different
when commit 183f6371aac2 ("mm: ignore mempolicies when using
ALLOC_NO_WATERMARK") introduced the code, as mempolicies provided their
own restricted zonelists.

We might consider this for 4.17 although I don't know if there's
anything currently broken.

SLAB is currently not affected, but in kernels older than 4.7 that don't
yet have 511e3a058812 ("mm/slab: make cache_grow() handle the page
allocated on arbitrary node") it is.  That's at least 4.4 LTS.  Older
ones I'll have to check.

So stable backports should be more important, but will have to be
reviewed carefully, as the code went through many changes.  BTW I think
that also the ac->preferred_zoneref reset is currently useless if we
don't also reset ac->nodemask from a mempolicy to NULL first (which we
probably should for the OOM victims etc?), but I would leave that for a
separate patch.

Link: http://lkml.kernel.org/r/20180525130853.13915-1-vbabka@suse.cz
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Fixes: 183f6371aac2 ("mm: ignore mempolicies when using ALLOC_NO_WATERMARK")
Acked-by: Mel Gorman <mgorman@techsingularity.net>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: David Rientjes <rientjes@google.com>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/page_alloc.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 15d86c744f971..2a5271aa8ccd5 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -3114,8 +3114,6 @@ __alloc_pages_slowpath(gfp_t gfp_mask, unsigned int order,
 		 * the allocation is high priority and these type of
 		 * allocations are system rather than user orientated
 		 */
-		ac->zonelist = node_zonelist(numa_node_id(), gfp_mask);
-
 		page = __alloc_pages_high_priority(gfp_mask, order, ac);
 
 		if (page) {

From ac9e081b4c40d9bb68670bff35017040445f394d Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Wed, 23 Nov 2016 17:04:00 -0500
Subject: [PATCH 0894/1852] dm bufio: drop the lock when doing GFP_NOIO
 allocation

commit 41c73a49df31151f4ff868f28fe4f129f113fa2c upstream.

If the first allocation attempt using GFP_NOWAIT fails, drop the lock
and retry using GFP_NOIO allocation (lock is dropped because the
allocation can take some time).

Note that we won't do GFP_NOIO allocation when we loop for the second
time, because the lock shouldn't be dropped between __wait_for_free_buffer
and __get_unclaimed_buffer.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/dm-bufio.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c
index d566c32e222a7..767b5c0497362 100644
--- a/drivers/md/dm-bufio.c
+++ b/drivers/md/dm-bufio.c
@@ -813,6 +813,7 @@ enum new_flag {
 static struct dm_buffer *__alloc_buffer_wait_no_callback(struct dm_bufio_client *c, enum new_flag nf)
 {
 	struct dm_buffer *b;
+	bool tried_noio_alloc = false;
 
 	/*
 	 * dm-bufio is resistant to allocation failures (it just keeps
@@ -837,6 +838,15 @@ static struct dm_buffer *__alloc_buffer_wait_no_callback(struct dm_bufio_client
 		if (nf == NF_PREFETCH)
 			return NULL;
 
+		if (dm_bufio_cache_size_latch != 1 && !tried_noio_alloc) {
+			dm_bufio_unlock(c);
+			b = alloc_buffer(c, GFP_NOIO | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN);
+			dm_bufio_lock(c);
+			if (b)
+				return b;
+			tried_noio_alloc = true;
+		}
+
 		if (!list_empty(&c->reserved_buffers)) {
 			b = list_entry(c->reserved_buffers.next,
 				       struct dm_buffer, lru_list);

From b367248b443f4222e8b151fdfcaebd1be5478292 Mon Sep 17 00:00:00 2001
From: Martin Kaiser <martin@kaiser.cx>
Date: Mon, 18 Jun 2018 22:41:03 +0200
Subject: [PATCH 0895/1852] mtd: rawnand: mxc: set spare area size register
 explicitly

commit 3f77f244d8ec28e3a0a81240ffac7d626390060c upstream.

The v21 version of the NAND flash controller contains a Spare Area Size
Register (SPAS) at offset 0x10. Its setting defaults to the maximum
spare area size of 218 bytes. The size that is set in this register is
used by the controller when it calculates the ECC bytes internally in
hardware.

Usually, this register is updated from settings in the IIM fuses when
the system is booting from NAND flash. For other boot media, however,
the SPAS register remains at the default setting, which may not work for
the particular flash chip on the board. The same goes for flash chips
whose configuration cannot be set in the IIM fuses (e.g. chips with 2k
sector size and 128 bytes spare area size can't be configured in the IIM
fuses on imx25 systems).

Set the SPAS register explicitly during the preset operation. Derive the
register value from mtd->oobsize that was detected during probe by
decoding the flash chip's ID bytes.

While at it, rename the define for the spare area register's offset to
NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is
different from the register on v21 controllers.

Fixes: d484018 ("mtd: mxc_nand: set NFC registers after reset")
Cc: stable@vger.kernel.org
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/nand/mxc_nand.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 136e73a3e07e5..53fe795fd716d 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -49,7 +49,7 @@
 #define NFC_V1_V2_CONFIG		(host->regs + 0x0a)
 #define NFC_V1_V2_ECC_STATUS_RESULT	(host->regs + 0x0c)
 #define NFC_V1_V2_RSLTMAIN_AREA		(host->regs + 0x0e)
-#define NFC_V1_V2_RSLTSPARE_AREA	(host->regs + 0x10)
+#define NFC_V21_RSLTSPARE_AREA		(host->regs + 0x10)
 #define NFC_V1_V2_WRPROT		(host->regs + 0x12)
 #define NFC_V1_UNLOCKSTART_BLKADDR	(host->regs + 0x14)
 #define NFC_V1_UNLOCKEND_BLKADDR	(host->regs + 0x16)
@@ -1034,6 +1034,9 @@ static void preset_v2(struct mtd_info *mtd)
 	writew(config1, NFC_V1_V2_CONFIG1);
 	/* preset operation */
 
+	/* spare area size in 16-bit half-words */
+	writew(mtd->oobsize / 2, NFC_V21_RSLTSPARE_AREA);
+
 	/* Unlock the internal RAM Buffer */
 	writew(0x2, NFC_V1_V2_CONFIG);
 

From 8b7154e4c3d45664656db12a19ae6eebcec90725 Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Wed, 23 Nov 2016 16:52:01 -0500
Subject: [PATCH 0896/1852] dm bufio: don't take the lock in
 dm_bufio_shrink_count

commit d12067f428c037b4575aaeb2be00847fc214c24a upstream.

dm_bufio_shrink_count() is called from do_shrink_slab to find out how many
freeable objects are there. The reported value doesn't have to be precise,
so we don't need to take the dm-bufio lock.

Suggested-by: David Rientjes <rientjes@google.com>
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/dm-bufio.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c
index 767b5c0497362..b1d5fa0bc8f7b 100644
--- a/drivers/md/dm-bufio.c
+++ b/drivers/md/dm-bufio.c
@@ -1574,19 +1574,11 @@ dm_bufio_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
 static unsigned long
 dm_bufio_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
 {
-	struct dm_bufio_client *c;
-	unsigned long count;
-	unsigned long retain_target;
-
-	c = container_of(shrink, struct dm_bufio_client, shrinker);
-	if (sc->gfp_mask & __GFP_FS)
-		dm_bufio_lock(c);
-	else if (!dm_bufio_trylock(c))
-		return 0;
+	struct dm_bufio_client *c = container_of(shrink, struct dm_bufio_client, shrinker);
+	unsigned long count = READ_ONCE(c->n_buffers[LIST_CLEAN]) +
+			      READ_ONCE(c->n_buffers[LIST_DIRTY]);
+	unsigned long retain_target = get_retain_buffers(c);
 
-	count = c->n_buffers[LIST_CLEAN] + c->n_buffers[LIST_DIRTY];
-	retain_target = get_retain_buffers(c);
-	dm_bufio_unlock(c);
 	return (count < retain_target) ? 0 : (count - retain_target);
 }
 

From 17fa97307b02cb89489538b9616673817293c7f2 Mon Sep 17 00:00:00 2001
From: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Date: Wed, 30 May 2018 18:32:27 +0900
Subject: [PATCH 0897/1852] mtd: cfi_cmdset_0002: Change definition naming to
 retry write operation

commit 85a82e28b023de9b259a86824afbd6ba07bd6475 upstream.

The definition can be used for other program and erase operations also.
So change the naming to MAX_RETRIES from MAX_WORD_RETRIES.

Signed-off-by: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: linux-mtd@lists.infradead.org
Cc: stable@vger.kernel.org
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index c484ca8c909c7..1a615ea229909 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -42,7 +42,7 @@
 #define AMD_BOOTLOC_BUG
 #define FORCE_WORD_WRITE 0
 
-#define MAX_WORD_RETRIES 3
+#define MAX_RETRIES 3
 
 #define SST49LF004B	        0x0060
 #define SST49LF040B	        0x0050
@@ -1645,7 +1645,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
 		map_write( map, CMD(0xF0), chip->start );
 		/* FIXME - should have reset delay before continuing */
 
-		if (++retry_cnt <= MAX_WORD_RETRIES)
+		if (++retry_cnt <= MAX_RETRIES)
 			goto retry;
 
 		ret = -EIO;
@@ -2104,7 +2104,7 @@ static int do_panic_write_oneword(struct map_info *map, struct flchip *chip,
 		map_write(map, CMD(0xF0), chip->start);
 		/* FIXME - should have reset delay before continuing */
 
-		if (++retry_cnt <= MAX_WORD_RETRIES)
+		if (++retry_cnt <= MAX_RETRIES)
 			goto retry;
 
 		ret = -EIO;

From 34182f2365f3534c9e937e1bf33c77dfecc6138b Mon Sep 17 00:00:00 2001
From: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Date: Wed, 30 May 2018 18:32:28 +0900
Subject: [PATCH 0898/1852] mtd: cfi_cmdset_0002: Change erase functions to
 retry for error

commit 45f75b8a919a4255f52df454f1ffdee0e42443b2 upstream.

For the word write functions it is retried for error.
But it is not implemented to retry for the erase functions.
To make sure for the erase functions change to retry as same.

This is needed to prevent the flash erase error caused only once.
It was caused by the error case of chip_good() in the do_erase_oneblock().
Also it was confirmed on the MACRONIX flash device MX29GL512FHT2I-11G.
But the error issue behavior is not able to reproduce at this moment.
The flash controller is parallel Flash interface integrated on BCM53003.

Signed-off-by: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: linux-mtd@lists.infradead.org
Cc: stable@vger.kernel.org
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 1a615ea229909..b99e51f778b42 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2239,6 +2239,7 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
 	unsigned long int adr;
 	DECLARE_WAITQUEUE(wait, current);
 	int ret = 0;
+	int retry_cnt = 0;
 
 	adr = cfi->addr_unlock1;
 
@@ -2256,6 +2257,7 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
 	ENABLE_VPP(map);
 	xip_disable(map, chip, adr);
 
+ retry:
 	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 	cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 	cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
@@ -2310,6 +2312,9 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
 		map_write( map, CMD(0xF0), chip->start );
 		/* FIXME - should have reset delay before continuing */
 
+		if (++retry_cnt <= MAX_RETRIES)
+			goto retry;
+
 		ret = -EIO;
 	}
 
@@ -2329,6 +2334,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 	unsigned long timeo = jiffies + HZ;
 	DECLARE_WAITQUEUE(wait, current);
 	int ret = 0;
+	int retry_cnt = 0;
 
 	adr += chip->start;
 
@@ -2346,6 +2352,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 	ENABLE_VPP(map);
 	xip_disable(map, chip, adr);
 
+ retry:
 	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 	cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 	cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
@@ -2403,6 +2410,9 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 		map_write( map, CMD(0xF0), chip->start );
 		/* FIXME - should have reset delay before continuing */
 
+		if (++retry_cnt <= MAX_RETRIES)
+			goto retry;
+
 		ret = -EIO;
 	}
 

From 1a9dc0b912d64e3832adecae97120fa4ee44d22c Mon Sep 17 00:00:00 2001
From: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Date: Wed, 30 May 2018 18:32:29 +0900
Subject: [PATCH 0899/1852] mtd: cfi_cmdset_0002: Change erase functions to
 check chip good only

commit 79ca484b613041ca223f74b34608bb6f5221724b upstream.

Currently the functions use to check both chip ready and good.
But the chip ready is not enough to check the operation status.
So change this to check the chip good instead of this.
About the retry functions to make sure the error handling remain it.

Signed-off-by: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: linux-mtd@lists.infradead.org
Cc: stable@vger.kernel.org
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index b99e51f778b42..fb5a3052f1441 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -2294,12 +2294,13 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
 			chip->erase_suspended = 0;
 		}
 
-		if (chip_ready(map, adr))
+		if (chip_good(map, adr, map_word_ff(map)))
 			break;
 
 		if (time_after(jiffies, timeo)) {
 			printk(KERN_WARNING "MTD %s(): software timeout\n",
 				__func__ );
+			ret = -EIO;
 			break;
 		}
 
@@ -2307,15 +2308,15 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
 		UDELAY(map, chip, adr, 1000000/HZ);
 	}
 	/* Did we succeed? */
-	if (!chip_good(map, adr, map_word_ff(map))) {
+	if (ret) {
 		/* reset on all failures. */
 		map_write( map, CMD(0xF0), chip->start );
 		/* FIXME - should have reset delay before continuing */
 
-		if (++retry_cnt <= MAX_RETRIES)
+		if (++retry_cnt <= MAX_RETRIES) {
+			ret = 0;
 			goto retry;
-
-		ret = -EIO;
+		}
 	}
 
 	chip->state = FL_READY;
@@ -2389,7 +2390,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 			chip->erase_suspended = 0;
 		}
 
-		if (chip_ready(map, adr)) {
+		if (chip_good(map, adr, map_word_ff(map))) {
 			xip_enable(map, chip, adr);
 			break;
 		}
@@ -2398,6 +2399,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 			xip_enable(map, chip, adr);
 			printk(KERN_WARNING "MTD %s(): software timeout\n",
 				__func__ );
+			ret = -EIO;
 			break;
 		}
 
@@ -2405,15 +2407,15 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
 		UDELAY(map, chip, adr, 1000000/HZ);
 	}
 	/* Did we succeed? */
-	if (!chip_good(map, adr, map_word_ff(map))) {
+	if (ret) {
 		/* reset on all failures. */
 		map_write( map, CMD(0xF0), chip->start );
 		/* FIXME - should have reset delay before continuing */
 
-		if (++retry_cnt <= MAX_RETRIES)
+		if (++retry_cnt <= MAX_RETRIES) {
+			ret = 0;
 			goto retry;
-
-		ret = -EIO;
+		}
 	}
 
 	chip->state = FL_READY;

From 37c4ac9a2138b73e6e327254a02d4400091f7566 Mon Sep 17 00:00:00 2001
From: Jann Horn <jannh@google.com>
Date: Mon, 25 Jun 2018 17:22:00 +0200
Subject: [PATCH 0900/1852] netfilter: nf_log: don't hold nf_log_mutex during
 user access

commit ce00bf07cc95a57cd20b208e02b3c2604e532ae8 upstream.

The old code would indefinitely block other users of nf_log_mutex if
a userspace access in proc_dostring() blocked e.g. due to a userfaultfd
region. Fix it by moving proc_dostring() out of the locked region.

This is a followup to commit 266d07cb1c9a ("netfilter: nf_log: fix
sleeping function called from invalid context"), which changed this code
from using rcu_read_lock() to taking nf_log_mutex.

Fixes: 266d07cb1c9a ("netfilter: nf_log: fix sleeping function calle[...]")
Signed-off-by: Jann Horn <jannh@google.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netfilter/nf_log.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/net/netfilter/nf_log.c b/net/netfilter/nf_log.c
index 2c89f90cd7bc9..f94a2e1172f04 100644
--- a/net/netfilter/nf_log.c
+++ b/net/netfilter/nf_log.c
@@ -422,14 +422,17 @@ static int nf_log_proc_dostring(struct ctl_table *table, int write,
 		rcu_assign_pointer(net->nf.nf_loggers[tindex], logger);
 		mutex_unlock(&nf_log_mutex);
 	} else {
+		struct ctl_table tmp = *table;
+
+		tmp.data = buf;
 		mutex_lock(&nf_log_mutex);
 		logger = nft_log_dereference(net->nf.nf_loggers[tindex]);
 		if (!logger)
-			table->data = "NONE";
+			strlcpy(buf, "NONE", sizeof(buf));
 		else
-			table->data = logger->name;
-		r = proc_dostring(table, write, buffer, lenp, ppos);
+			strlcpy(buf, logger->name, sizeof(buf));
 		mutex_unlock(&nf_log_mutex);
+		r = proc_dostring(&tmp, write, buffer, lenp, ppos);
 	}
 
 	return r;

From 347b83077aa78217b812ca2635dca8eb97c485d8 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 5 Jun 2018 12:36:30 +0300
Subject: [PATCH 0901/1852] staging: comedi: quatech_daqp_cs: fix no-op loop
 daqp_ao_insn_write()

commit 1376b0a2160319125c3a2822e8c09bd283cd8141 upstream.

There is a '>' vs '<' typo so this loop is a no-op.

Fixes: d35dcc89fc93 ("staging: comedi: quatech_daqp_cs: fix daqp_ao_insn_write()")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/staging/comedi/drivers/quatech_daqp_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
index e9e43139157d9..769a940151176 100644
--- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c
+++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
@@ -642,7 +642,7 @@ static int daqp_ao_insn_write(struct comedi_device *dev,
 	/* Make sure D/A update mode is direct update */
 	outb(0, dev->iobase + DAQP_AUX_REG);
 
-	for (i = 0; i > insn->n; i++) {
+	for (i = 0; i < insn->n; i++) {
 		unsigned val = data[i];
 		int ret;
 

From f31f32deadb54b6b0f0a0bb786442873dd72f1eb Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 11 Jul 2018 16:03:52 +0200
Subject: [PATCH 0902/1852] Linux 4.4.140

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 0fffe8b787204..fa51797773ccc 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 139
+SUBLEVEL = 140
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 2552d5082a03363a4acc146efcbce300da8b1f0a Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@mips.com>
Date: Thu, 5 Jul 2018 14:37:52 -0700
Subject: [PATCH 0903/1852] MIPS: Fix ioremap() RAM check

commit 523402fa9101090c91d2033b7ebdfdcf65880488 upstream.

We currently attempt to check whether a physical address range provided
to __ioremap() may be in use by the page allocator by examining the
value of PageReserved for each page in the region - lowmem pages not
marked reserved are presumed to be in use by the page allocator, and
requests to ioremap them fail.

The way we check this has been broken since commit 92923ca3aace ("mm:
meminit: only set page reserved in the memblock region"), because
memblock will typically not have any knowledge of non-RAM pages and
therefore those pages will not have the PageReserved flag set. Thus when
we attempt to ioremap a region outside of RAM we incorrectly fail
believing that the region is RAM that may be in use.

In most cases ioremap() on MIPS will take a fast-path to use the
unmapped kseg1 or xkphys virtual address spaces and never hit this path,
so the only way to hit it is for a MIPS32 system to attempt to ioremap()
an address range in lowmem with flags other than _CACHE_UNCACHED.
Perhaps the most straightforward way to do this is using
ioremap_uncached_accelerated(), which is how the problem was discovered.

Fix this by making use of walk_system_ram_range() to test the address
range provided to __ioremap() against only RAM pages, rather than all
lowmem pages. This means that if we have a lowmem I/O region, which is
very common for MIPS systems, we're free to ioremap() address ranges
within it. A nice bonus is that the test is no longer limited to lowmem.

The approach here matches the way x86 performed the same test after
commit c81c8a1eeede ("x86, ioremap: Speed up check for RAM pages") until
x86 moved towards a slightly more complicated check using walk_mem_res()
for unrelated reasons with commit 0e4c12b45aa8 ("x86/mm, resource: Use
PAGE_KERNEL protection for ioremap of memory pages").

Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Fixes: 92923ca3aace ("mm: meminit: only set page reserved in the memblock region")
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v4.2+
Patchwork: https://patchwork.linux-mips.org/patch/19786/
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/mm/ioremap.c | 37 +++++++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index 8d5008cbdc0f0..a853a83f29449 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -9,6 +9,7 @@
 #include <linux/module.h>
 #include <asm/addrspace.h>
 #include <asm/byteorder.h>
+#include <linux/ioport.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
 #include <linux/vmalloc.h>
@@ -97,6 +98,20 @@ static int remap_area_pages(unsigned long address, phys_addr_t phys_addr,
 	return error;
 }
 
+static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages,
+			       void *arg)
+{
+	unsigned long i;
+
+	for (i = 0; i < nr_pages; i++) {
+		if (pfn_valid(start_pfn + i) &&
+		    !PageReserved(pfn_to_page(start_pfn + i)))
+			return 1;
+	}
+
+	return 0;
+}
+
 /*
  * Generic mapping function (not visible outside):
  */
@@ -115,8 +130,8 @@ static int remap_area_pages(unsigned long address, phys_addr_t phys_addr,
 
 void __iomem * __ioremap(phys_addr_t phys_addr, phys_addr_t size, unsigned long flags)
 {
+	unsigned long offset, pfn, last_pfn;
 	struct vm_struct * area;
-	unsigned long offset;
 	phys_addr_t last_addr;
 	void * addr;
 
@@ -136,18 +151,16 @@ void __iomem * __ioremap(phys_addr_t phys_addr, phys_addr_t size, unsigned long
 		return (void __iomem *) CKSEG1ADDR(phys_addr);
 
 	/*
-	 * Don't allow anybody to remap normal RAM that we're using..
+	 * Don't allow anybody to remap RAM that may be allocated by the page
+	 * allocator, since that could lead to races & data clobbering.
 	 */
-	if (phys_addr < virt_to_phys(high_memory)) {
-		char *t_addr, *t_end;
-		struct page *page;
-
-		t_addr = __va(phys_addr);
-		t_end = t_addr + (size - 1);
-
-		for(page = virt_to_page(t_addr); page <= virt_to_page(t_end); page++)
-			if(!PageReserved(page))
-				return NULL;
+	pfn = PFN_DOWN(phys_addr);
+	last_pfn = PFN_DOWN(last_addr);
+	if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL,
+				  __ioremap_check_ram) == 1) {
+		WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n",
+			  &phys_addr, &last_addr);
+		return NULL;
 	}
 
 	/*

From 0c20f7652f887ba9ddb49d7288bca19cba240dca Mon Sep 17 00:00:00 2001
From: Jann Horn <jannh@google.com>
Date: Sat, 7 Jul 2018 04:16:33 +0200
Subject: [PATCH 0904/1852] ibmasm: don't write out of bounds in read handler

commit a0341fc1981a950c1e902ab901e98f60e0e243f3 upstream.

This read handler had a lot of custom logic and wrote outside the bounds of
the provided buffer. This could lead to kernel and userspace memory
corruption. Just use simple_read_from_buffer() with a stack buffer.

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Cc: stable@vger.kernel.org
Signed-off-by: Jann Horn <jannh@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/misc/ibmasm/ibmasmfs.c | 27 +++------------------------
 1 file changed, 3 insertions(+), 24 deletions(-)

diff --git a/drivers/misc/ibmasm/ibmasmfs.c b/drivers/misc/ibmasm/ibmasmfs.c
index e8b933111e0df..92109cadc3fc0 100644
--- a/drivers/misc/ibmasm/ibmasmfs.c
+++ b/drivers/misc/ibmasm/ibmasmfs.c
@@ -507,35 +507,14 @@ static int remote_settings_file_close(struct inode *inode, struct file *file)
 static ssize_t remote_settings_file_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
 {
 	void __iomem *address = (void __iomem *)file->private_data;
-	unsigned char *page;
-	int retval;
 	int len = 0;
 	unsigned int value;
-
-	if (*offset < 0)
-		return -EINVAL;
-	if (count == 0 || count > 1024)
-		return 0;
-	if (*offset != 0)
-		return 0;
-
-	page = (unsigned char *)__get_free_page(GFP_KERNEL);
-	if (!page)
-		return -ENOMEM;
+	char lbuf[20];
 
 	value = readl(address);
-	len = sprintf(page, "%d\n", value);
-
-	if (copy_to_user(buf, page, len)) {
-		retval = -EFAULT;
-		goto exit;
-	}
-	*offset += len;
-	retval = len;
+	len = snprintf(lbuf, sizeof(lbuf), "%d\n", value);
 
-exit:
-	free_page((unsigned long)page);
-	return retval;
+	return simple_read_from_buffer(buf, count, offset, lbuf, len);
 }
 
 static ssize_t remote_settings_file_write(struct file *file, const char __user *ubuff, size_t count, loff_t *offset)

From 4c98cd1e5b1b87bcf349baf9ee0c62ccb3f317bb Mon Sep 17 00:00:00 2001
From: Nadav Amit <namit@vmware.com>
Date: Mon, 2 Jul 2018 19:27:13 -0700
Subject: [PATCH 0905/1852] vmw_balloon: fix inflation with batching

commit 90d72ce079791399ac255c75728f3c9e747b093d upstream.

Embarrassingly, the recent fix introduced worse problem than it solved,
causing the balloon not to inflate. The VM informed the hypervisor that
the pages for lock/unlock are sitting in the wrong address, as it used
the page that is used the uninitialized page variable.

Fixes: b23220fe054e9 ("vmw_balloon: fixing double free when batching mode is off")
Cc: stable@vger.kernel.org
Reviewed-by: Xavier Deguillard <xdeguillard@vmware.com>
Signed-off-by: Nadav Amit <namit@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/misc/vmw_balloon.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/vmw_balloon.c b/drivers/misc/vmw_balloon.c
index fe90b7e044279..5e047bfc0cc4a 100644
--- a/drivers/misc/vmw_balloon.c
+++ b/drivers/misc/vmw_balloon.c
@@ -467,7 +467,7 @@ static int vmballoon_send_batched_lock(struct vmballoon *b,
 		unsigned int num_pages, bool is_2m_pages, unsigned int *target)
 {
 	unsigned long status;
-	unsigned long pfn = page_to_pfn(b->page);
+	unsigned long pfn = PHYS_PFN(virt_to_phys(b->batch_page));
 
 	STATS_INC(b->stats.lock[is_2m_pages]);
 
@@ -515,7 +515,7 @@ static bool vmballoon_send_batched_unlock(struct vmballoon *b,
 		unsigned int num_pages, bool is_2m_pages, unsigned int *target)
 {
 	unsigned long status;
-	unsigned long pfn = page_to_pfn(b->page);
+	unsigned long pfn = PHYS_PFN(virt_to_phys(b->batch_page));
 
 	STATS_INC(b->stats.unlock[is_2m_pages]);
 

From c652142bbe5fa81edbc42d0ec695d8b80b3eca18 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Sun, 1 Jul 2018 12:15:46 +0200
Subject: [PATCH 0906/1852] ahci: Disable LPM on Lenovo 50 series laptops with
 a too old BIOS

commit 240630e61870e62e39a97225048f9945848fa5f5 upstream.

There have been several reports of LPM related hard freezes about once
a day on multiple Lenovo 50 series models. Strange enough these reports
where not disk model specific as LPM issues usually are and some users
with the exact same disk + laptop where seeing them while other users
where not seeing these issues.

It turns out that enabling LPM triggers a firmware bug somewhere, which
has been fixed in later BIOS versions.

This commit adds a new ahci_broken_lpm() function and a new ATA_FLAG_NO_LPM
for dealing with this.

The ahci_broken_lpm() function contains DMI match info for the 4 models
which are known to be affected by this and the DMI BIOS date field for
known good BIOS versions. If the BIOS date is older then the one in the
table LPM will be disabled and a warning will be printed.

Note the BIOS dates are for known good versions, some older versions may
work too, but we don't know for sure, the table is using dates from BIOS
versions for which users have confirmed that upgrading to that version
makes the problem go away.

Unfortunately I've been unable to get hold of the reporter who reported
that BIOS version 2.35 fixed the problems on the W541 for him. I've been
able to verify the DMI_SYS_VENDOR and DMI_PRODUCT_VERSION from an older
dmidecode, but I don't know the exact BIOS date as reported in the DMI.
Lenovo keeps a changelog with dates in their release notes, but the
dates there are the release dates not the build dates which are in DMI.
So I've chosen to set the date to which we compare to one day past the
release date of the 2.34 BIOS. I plan to fix this with a follow up
commit once I've the necessary info.

Cc: stable@vger.kernel.org
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/ahci.c        | 59 +++++++++++++++++++++++++++++++++++++++
 drivers/ata/libata-core.c |  3 ++
 include/linux/libata.h    |  1 +
 3 files changed, 63 insertions(+)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 5ce328f086c4e..012abdcd83751 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1231,6 +1231,59 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
 	return strcmp(buf, dmi->driver_data) < 0;
 }
 
+static bool ahci_broken_lpm(struct pci_dev *pdev)
+{
+	static const struct dmi_system_id sysids[] = {
+		/* Various Lenovo 50 series have LPM issues with older BIOSen */
+		{
+			.matches = {
+				DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+				DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X250"),
+			},
+			.driver_data = "20180406", /* 1.31 */
+		},
+		{
+			.matches = {
+				DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+				DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L450"),
+			},
+			.driver_data = "20180420", /* 1.28 */
+		},
+		{
+			.matches = {
+				DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+				DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T450s"),
+			},
+			.driver_data = "20180315", /* 1.33 */
+		},
+		{
+			.matches = {
+				DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+				DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad W541"),
+			},
+			/*
+			 * Note date based on release notes, 2.35 has been
+			 * reported to be good, but I've been unable to get
+			 * a hold of the reporter to get the DMI BIOS date.
+			 * TODO: fix this.
+			 */
+			.driver_data = "20180310", /* 2.35 */
+		},
+		{ }	/* terminate list */
+	};
+	const struct dmi_system_id *dmi = dmi_first_match(sysids);
+	int year, month, date;
+	char buf[9];
+
+	if (!dmi)
+		return false;
+
+	dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
+	snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
+
+	return strcmp(buf, dmi->driver_data) < 0;
+}
+
 static bool ahci_broken_online(struct pci_dev *pdev)
 {
 #define ENCODE_BUSDEVFN(bus, slot, func)			\
@@ -1590,6 +1643,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 			"quirky BIOS, skipping spindown on poweroff\n");
 	}
 
+	if (ahci_broken_lpm(pdev)) {
+		pi.flags |= ATA_FLAG_NO_LPM;
+		dev_warn(&pdev->dev,
+			 "BIOS update required for Link Power Management support\n");
+	}
+
 	if (ahci_broken_suspend(pdev)) {
 		hpriv->flags |= AHCI_HFLAG_NO_SUSPEND;
 		dev_warn(&pdev->dev,
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 9afd06ee5b301..ba514fa733def 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -2209,6 +2209,9 @@ int ata_dev_configure(struct ata_device *dev)
 	    (id[ATA_ID_SATA_CAPABILITY] & 0xe) == 0x2)
 		dev->horkage |= ATA_HORKAGE_NOLPM;
 
+	if (ap->flags & ATA_FLAG_NO_LPM)
+		dev->horkage |= ATA_HORKAGE_NOLPM;
+
 	if (dev->horkage & ATA_HORKAGE_NOLPM) {
 		ata_dev_warn(dev, "LPM support broken, forcing max_power\n");
 		dev->link->ap->target_lpm_policy = ATA_LPM_MAX_POWER;
diff --git a/include/linux/libata.h b/include/linux/libata.h
index b20a2752f934f..6428ac4746dee 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -210,6 +210,7 @@ enum {
 	ATA_FLAG_SLAVE_POSS	= (1 << 0), /* host supports slave dev */
 					    /* (doesn't imply presence) */
 	ATA_FLAG_SATA		= (1 << 1),
+	ATA_FLAG_NO_LPM		= (1 << 2), /* host not happy with LPM */
 	ATA_FLAG_NO_LOG_PAGE	= (1 << 5), /* do not issue log page read */
 	ATA_FLAG_NO_ATAPI	= (1 << 6), /* No ATAPI support */
 	ATA_FLAG_PIO_DMA	= (1 << 7), /* PIO cmds via DMA */

From be86fb8d6ca213be9e732b395648848f54e2e0ac Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Wed, 4 Jul 2018 12:29:38 +0300
Subject: [PATCH 0907/1852] USB: serial: ch341: fix type promotion bug in
 ch341_control_in()

commit e33eab9ded328ccc14308afa51b5be7cbe78d30b upstream.

The "r" variable is an int and "bufsize" is an unsigned int so the
comparison is type promoted to unsigned.  If usb_control_msg() returns a
negative that is treated as a high positive value and the error handling
doesn't work.

Fixes: 2d5a9c72d0c4 ("USB: serial: ch341: fix control-message error handling")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/ch341.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 71133d96f97d9..f73ea14e81736 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -118,7 +118,7 @@ static int ch341_control_in(struct usb_device *dev,
 	r = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), request,
 			    USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
 			    value, index, buf, bufsize, DEFAULT_TIMEOUT);
-	if (r < bufsize) {
+	if (r < (int)bufsize) {
 		if (r >= 0) {
 			dev_err(&dev->dev,
 				"short control message received (%d < %u)\n",

From cffb84f55cf2187f800f1b0833611fe2b097e45d Mon Sep 17 00:00:00 2001
From: Olli Salonen <olli.salonen@iki.fi>
Date: Wed, 4 Jul 2018 14:07:42 +0300
Subject: [PATCH 0908/1852] USB: serial: cp210x: add another USB ID for Qivicon
 ZigBee stick

commit 367b160fe4717c14a2a978b6f9ffb75a7762d3ed upstream.

There are two versions of the Qivicon Zigbee stick in circulation. This
adds the second USB ID to the cp210x driver.

Signed-off-by: Olli Salonen <olli.salonen@iki.fi>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/cp210x.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 73835027a7cc8..97382301c3939 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -145,6 +145,7 @@ static const struct usb_device_id id_table[] = {
 	{ USB_DEVICE(0x10C4, 0x8977) },	/* CEL MeshWorks DevKit Device */
 	{ USB_DEVICE(0x10C4, 0x8998) }, /* KCF Technologies PRN */
 	{ USB_DEVICE(0x10C4, 0x89A4) }, /* CESINEL FTBC Flexible Thyristor Bridge Controller */
+	{ USB_DEVICE(0x10C4, 0x89FB) }, /* Qivicon ZigBee USB Radio Stick */
 	{ USB_DEVICE(0x10C4, 0x8A2A) }, /* HubZ dual ZigBee and Z-Wave dongle */
 	{ USB_DEVICE(0x10C4, 0x8A5E) }, /* CEL EM3588 ZigBee USB Stick Long Range */
 	{ USB_DEVICE(0x10C4, 0x8B34) }, /* Qivicon ZigBee USB Radio Stick */

From 549c853369c8a0a7d160731035cf320600936510 Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Wed, 4 Jul 2018 17:02:16 +0200
Subject: [PATCH 0909/1852] USB: serial: keyspan_pda: fix modem-status error
 handling

commit 01b3cdfca263a17554f7b249d20a247b2a751521 upstream.

Fix broken modem-status error handling which could lead to bits of slab
data leaking to user space.

Fixes: 3b36a8fd6777 ("usb: fix uninitialized variable warning in keyspan_pda")
Cc: stable <stable@vger.kernel.org>     # 2.6.27
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/keyspan_pda.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
index 6b09424289170..8a4047de43dce 100644
--- a/drivers/usb/serial/keyspan_pda.c
+++ b/drivers/usb/serial/keyspan_pda.c
@@ -373,8 +373,10 @@ static int keyspan_pda_get_modem_info(struct usb_serial *serial,
 			     3, /* get pins */
 			     USB_TYPE_VENDOR|USB_RECIP_INTERFACE|USB_DIR_IN,
 			     0, 0, data, 1, 2000);
-	if (rc >= 0)
+	if (rc == 1)
 		*value = *data;
+	else if (rc >= 0)
+		rc = -EIO;
 
 	kfree(data);
 	return rc;

From ea275d349c26265b76aa3fa4e5cbc1947bd40835 Mon Sep 17 00:00:00 2001
From: Jann Horn <jannh@google.com>
Date: Fri, 6 Jul 2018 17:12:56 +0200
Subject: [PATCH 0910/1852] USB: yurex: fix out-of-bounds uaccess in read
 handler

commit f1e255d60ae66a9f672ff9a207ee6cd8e33d2679 upstream.

In general, accessing userspace memory beyond the length of the supplied
buffer in VFS read/write handlers can lead to both kernel memory corruption
(via kernel_read()/kernel_write(), which can e.g. be triggered via
sys_splice()) and privilege escalation inside userspace.

Fix it by using simple_read_from_buffer() instead of custom logic.

Fixes: 6bc235a2e24a ("USB: add driver for Meywa-Denki & Kayac YUREX")
Signed-off-by: Jann Horn <jannh@google.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/misc/yurex.c | 23 ++++++-----------------
 1 file changed, 6 insertions(+), 17 deletions(-)

diff --git a/drivers/usb/misc/yurex.c b/drivers/usb/misc/yurex.c
index 343fa6ff9f4ba..512c84adcace1 100644
--- a/drivers/usb/misc/yurex.c
+++ b/drivers/usb/misc/yurex.c
@@ -414,8 +414,7 @@ static ssize_t yurex_read(struct file *file, char __user *buffer, size_t count,
 			  loff_t *ppos)
 {
 	struct usb_yurex *dev;
-	int retval = 0;
-	int bytes_read = 0;
+	int len = 0;
 	char in_buffer[20];
 	unsigned long flags;
 
@@ -423,26 +422,16 @@ static ssize_t yurex_read(struct file *file, char __user *buffer, size_t count,
 
 	mutex_lock(&dev->io_mutex);
 	if (!dev->interface) {		/* already disconnected */
-		retval = -ENODEV;
-		goto exit;
+		mutex_unlock(&dev->io_mutex);
+		return -ENODEV;
 	}
 
 	spin_lock_irqsave(&dev->lock, flags);
-	bytes_read = snprintf(in_buffer, 20, "%lld\n", dev->bbu);
+	len = snprintf(in_buffer, 20, "%lld\n", dev->bbu);
 	spin_unlock_irqrestore(&dev->lock, flags);
-
-	if (*ppos < bytes_read) {
-		if (copy_to_user(buffer, in_buffer + *ppos, bytes_read - *ppos))
-			retval = -EFAULT;
-		else {
-			retval = bytes_read - *ppos;
-			*ppos += bytes_read;
-		}
-	}
-
-exit:
 	mutex_unlock(&dev->io_mutex);
-	return retval;
+
+	return simple_read_from_buffer(buffer, count, ppos, in_buffer, len);
 }
 
 static ssize_t yurex_write(struct file *file, const char __user *user_buffer,

From 8ba9597feecb2bec33adbad446a110ebbf8913e9 Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan@kernel.org>
Date: Wed, 4 Jul 2018 17:02:17 +0200
Subject: [PATCH 0911/1852] USB: serial: mos7840: fix status-register error
 handling

commit 794744abfffef8b1f3c0c8a4896177d6d13d653d upstream.

Add missing transfer-length sanity check to the status-register
completion handler to avoid leaking bits of uninitialised slab data to
user space.

Fixes: 3f5429746d91 ("USB: Moschip 7840 USB-Serial Driver")
Cc: stable <stable@vger.kernel.org>     # 2.6.19
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/mos7840.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index ed883a7ad5339..58ba6904a087f 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -482,6 +482,9 @@ static void mos7840_control_callback(struct urb *urb)
 	}
 
 	dev_dbg(dev, "%s urb buffer size is %d\n", __func__, urb->actual_length);
+	if (urb->actual_length < 1)
+		goto out;
+
 	dev_dbg(dev, "%s mos7840_port->MsrLsr is %d port %d\n", __func__,
 		mos7840_port->MsrLsr, mos7840_port->port_num);
 	data = urb->transfer_buffer;

From c462007df74a760575957ac5ae0f968f5409e659 Mon Sep 17 00:00:00 2001
From: Nico Sneck <snecknico@gmail.com>
Date: Mon, 2 Jul 2018 19:26:07 +0300
Subject: [PATCH 0912/1852] usb: quirks: add delay quirks for Corsair Strafe

commit bba57eddadda936c94b5dccf73787cb9e159d0a5 upstream.

Corsair Strafe appears to suffer from the same issues
as the Corsair Strafe RGB.
Apply the same quirks (control message delay and init delay)
that the RGB version has to 1b1c:1b15.

With these quirks in place the keyboard works correctly upon
booting the system, and no longer requires reattaching the device.

Signed-off-by: Nico Sneck <snecknico@gmail.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/core/quirks.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index 957176d2e7460..64496a1af12ef 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -239,6 +239,10 @@ static const struct usb_device_id usb_quirk_list[] = {
 	/* Corsair K70 RGB */
 	{ USB_DEVICE(0x1b1c, 0x1b13), .driver_info = USB_QUIRK_DELAY_INIT },
 
+	/* Corsair Strafe */
+	{ USB_DEVICE(0x1b1c, 0x1b15), .driver_info = USB_QUIRK_DELAY_INIT |
+	  USB_QUIRK_DELAY_CTRL_MSG },
+
 	/* Corsair Strafe RGB */
 	{ USB_DEVICE(0x1b1c, 0x1b20), .driver_info = USB_QUIRK_DELAY_INIT |
 	  USB_QUIRK_DELAY_CTRL_MSG },

From 2a5a5aa67713fdd48165196ce2565575dd93d0bc Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Wed, 4 Jul 2018 12:48:53 +0300
Subject: [PATCH 0913/1852] xhci: xhci-mem: off by one in
 xhci_stream_id_to_ring()

commit 313db3d6488bb03b61b99de9dbca061f1fd838e1 upstream.

The > should be >= here so that we don't read one element beyond the end
of the ep->stream_info->stream_rings[] array.

Fixes: e9df17eb1408 ("USB: xhci: Correct assumptions about number of rings per endpoint.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/host/xhci-mem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index e4cf3322bcb34..0ec809a35a3f0 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -638,7 +638,7 @@ struct xhci_ring *xhci_stream_id_to_ring(
 	if (!ep->stream_info)
 		return NULL;
 
-	if (stream_id > ep->stream_info->num_streams)
+	if (stream_id >= ep->stream_info->num_streams)
 		return NULL;
 	return ep->stream_info->stream_rings[stream_id];
 }

From 9e7e9022693c73f6fe43f13b919890b645fae4b4 Mon Sep 17 00:00:00 2001
From: Tomasz Kramkowski <tk@the-tk.com>
Date: Tue, 14 Feb 2017 23:14:33 +0000
Subject: [PATCH 0914/1852] HID: usbhid: add quirk for innomedia INNEX
 GENESIS/ATARI adapter

commit 9547837bdccb4af127528b36a73377150658b4ac upstream.

The (1292:4745) Innomedia INNEX GENESIS/ATARI adapter needs
HID_QUIRK_MULTI_INPUT to split the device up into two controllers
instead of inputs from both being merged into one.

Signed-off-by: Tomasz Kramkowski <tk@the-tk.com>
Acked-By: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/hid-ids.h           | 3 +++
 drivers/hid/usbhid/hid-quirks.c | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index cc7c3e7020311..329bbac02a153 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -517,6 +517,9 @@
 #define USB_VENDOR_ID_IRTOUCHSYSTEMS	0x6615
 #define USB_DEVICE_ID_IRTOUCH_INFRARED_USB	0x0070
 
+#define USB_VENDOR_ID_INNOMEDIA			0x1292
+#define USB_DEVICE_ID_INNEX_GENESIS_ATARI	0x4745
+
 #define USB_VENDOR_ID_ITE               0x048d
 #define USB_DEVICE_ID_ITE_LENOVO_YOGA   0x8386
 #define USB_DEVICE_ID_ITE_LENOVO_YOGA2  0x8350
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index ce1543d69acbc..c9a11315493b2 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -152,6 +152,7 @@ static const struct hid_blacklist {
 	{ USB_VENDOR_ID_MULTIPLE_1781, USB_DEVICE_ID_RAPHNET_4NES4SNES_OLD, HID_QUIRK_MULTI_INPUT },
 	{ USB_VENDOR_ID_DRACAL_RAPHNET, USB_DEVICE_ID_RAPHNET_2NES2SNES, HID_QUIRK_MULTI_INPUT },
 	{ USB_VENDOR_ID_DRACAL_RAPHNET, USB_DEVICE_ID_RAPHNET_4NES4SNES, HID_QUIRK_MULTI_INPUT },
+	{ USB_VENDOR_ID_INNOMEDIA, USB_DEVICE_ID_INNEX_GENESIS_ATARI, HID_QUIRK_MULTI_INPUT },
 
 	{ 0, 0 }
 };

From b65281becd4f7039718deadb85a203219d8c8a6f Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 3 Jul 2018 17:10:19 -0700
Subject: [PATCH 0915/1852] Fix up non-directory creation in SGID directories

commit 0fa3ecd87848c9c93c2c828ef4c3a8ca36ce46c7 upstream.

sgid directories have special semantics, making newly created files in
the directory belong to the group of the directory, and newly created
subdirectories will also become sgid.  This is historically used for
group-shared directories.

But group directories writable by non-group members should not imply
that such non-group members can magically join the group, so make sure
to clear the sgid bit on non-directories for non-members (but remember
that sgid without group execute means "mandatory locking", just to
confuse things even more).

Reported-by: Jann Horn <jannh@google.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/inode.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/fs/inode.c b/fs/inode.c
index bd16497b3bbaf..48185da625ce6 100644
--- a/fs/inode.c
+++ b/fs/inode.c
@@ -1943,8 +1943,14 @@ void inode_init_owner(struct inode *inode, const struct inode *dir,
 	inode->i_uid = current_fsuid();
 	if (dir && dir->i_mode & S_ISGID) {
 		inode->i_gid = dir->i_gid;
+
+		/* Directories are special, and always inherit S_ISGID */
 		if (S_ISDIR(mode))
 			mode |= S_ISGID;
+		else if ((mode & (S_ISGID | S_IXGRP)) == (S_ISGID | S_IXGRP) &&
+			 !in_group_p(inode->i_gid) &&
+			 !capable_wrt_inode_uidgid(dir, CAP_FSETID))
+			mode &= ~S_ISGID;
 	} else
 		inode->i_gid = current_fsgid();
 	inode->i_mode = mode;

From 9f3ba76a79c4f7d7aa50a1500627f7a4f5bb2376 Mon Sep 17 00:00:00 2001
From: Paul Menzel <pmenzel@molgen.mpg.de>
Date: Tue, 5 Jun 2018 19:00:22 +0200
Subject: [PATCH 0916/1852] tools build: fix # escaping in .cmd files for
 future Make

commit 9feeb638cde083c737e295c0547f1b4f28e99583 upstream.

In 2016 GNU Make made a backwards incompatible change to the way '#'
characters were handled in Makefiles when used inside functions or
macros:

http://git.savannah.gnu.org/cgit/make.git/commit/?id=c6966b323811c37acedff05b57

Due to this change, when attempting to run `make prepare' I get a
spurious make syntax error:

    /home/earnest/linux/tools/objtool/.fixdep.o.cmd:1: *** missing separator.  Stop.

When inspecting `.fixdep.o.cmd' it includes two lines which use
unescaped comment characters at the top:

    \# cannot find fixdep (/home/earnest/linux/tools/objtool//fixdep)
    \# using basic dep data

This is because `tools/build/Build.include' prints these '\#'
characters:

    printf '\# cannot find fixdep (%s)\n' $(fixdep) > $(dot-target).cmd; \
    printf '\# using basic dep data\n\n' >> $(dot-target).cmd;           \

This completes commit 9564a8cf422d ("Kbuild: fix # escaping in .cmd files
for future Make").

Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: stable@vger.kernel.org
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/build/Build.include | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/build/Build.include b/tools/build/Build.include
index 4d000bc959b49..1c570528baf7d 100644
--- a/tools/build/Build.include
+++ b/tools/build/Build.include
@@ -62,8 +62,8 @@ dep-cmd = $(if $(wildcard $(fixdep)),
            $(fixdep) $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;           \
            rm -f $(depfile);                                                    \
            mv -f $(dot-target).tmp $(dot-target).cmd,                           \
-           printf '\# cannot find fixdep (%s)\n' $(fixdep) > $(dot-target).cmd; \
-           printf '\# using basic dep data\n\n' >> $(dot-target).cmd;           \
+           printf '$(pound) cannot find fixdep (%s)\n' $(fixdep) > $(dot-target).cmd; \
+           printf '$(pound) using basic dep data\n\n' >> $(dot-target).cmd;           \
            cat $(depfile) >> $(dot-target).cmd;                                 \
            printf '%s\n' 'cmd_$@ := $(make-cmd)' >> $(dot-target).cmd)
 

From 71e4a3a9eb28979b23f986220eb47bb4e4bf90c5 Mon Sep 17 00:00:00 2001
From: Steve Wise <swise@opengridcomputing.com>
Date: Thu, 21 Jun 2018 07:43:21 -0700
Subject: [PATCH 0917/1852] iw_cxgb4: correctly enforce the max reg_mr depth

commit 7b72717a20bba8bdd01b14c0460be7d15061cd6b upstream.

The code was mistakenly using the length of the page array memory instead
of the depth of the page array.

This would cause MR creation to fail in some cases.

Fixes: 8376b86de7d3 ("iw_cxgb4: Support the new memory registration API")
Cc: stable@vger.kernel.org
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/cxgb4/mem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index e1629ab58db78..8218d714fa014 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -926,7 +926,7 @@ static int c4iw_set_page(struct ib_mr *ibmr, u64 addr)
 {
 	struct c4iw_mr *mhp = to_c4iw_mr(ibmr);
 
-	if (unlikely(mhp->mpl_len == mhp->max_mpl_len))
+	if (unlikely(mhp->mpl_len == mhp->attr.pbl_size))
 		return -ENOMEM;
 
 	mhp->mpl[mhp->mpl_len++] = addr;

From 3f8528ce41367a98d74cec9589980eb9a2503d3d Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:01 -0700
Subject: [PATCH 0918/1852] x86/cpufeature: Move some of the scattered feature
 bits to x86_capability

commit 2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6 upstream

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 54 ++++++++++++++++++-------------
 arch/x86/kernel/cpu/common.c      |  5 +++
 arch/x86/kernel/cpu/scattered.c   | 20 ------------
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 232621c5e8593..999e166407a77 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,7 +12,7 @@
 #include <asm/disabled-features.h>
 #endif
 
-#define NCAPINTS	14	/* N 32-bit words worth of info */
+#define NCAPINTS	16	/* N 32-bit words worth of info */
 #define NBUGINTS	1	/* N 32-bit bug flags */
 
 /*
@@ -181,23 +181,18 @@
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
  */
-#define X86_FEATURE_IDA		( 7*32+ 0) /* Intel Dynamic Acceleration */
-#define X86_FEATURE_ARAT	( 7*32+ 1) /* Always Running APIC Timer */
+
 #define X86_FEATURE_CPB		( 7*32+ 2) /* AMD Core Performance Boost */
 #define X86_FEATURE_EPB		( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
 #define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 4) /* Effectively INVPCID && CR4.PCIDE=1 */
-#define X86_FEATURE_PLN		( 7*32+ 5) /* Intel Power Limit Notification */
-#define X86_FEATURE_PTS		( 7*32+ 6) /* Intel Package Thermal Status */
-#define X86_FEATURE_DTHERM	( 7*32+ 7) /* Digital Thermal Sensor */
+
 #define X86_FEATURE_HW_PSTATE	( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-#define X86_FEATURE_HWP		( 7*32+ 10) /* "hwp" Intel HWP */
-#define X86_FEATURE_HWP_NOTIFY	( 7*32+ 11) /* Intel HWP_NOTIFY */
-#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
-#define X86_FEATURE_HWP_EPP	( 7*32+13) /* Intel HWP_EPP */
-#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+
 #define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
 #define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* Fill RSB on context switches */
 
@@ -212,16 +207,7 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT         ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID        ( 8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT		( 8*32+ 5) /* AMD Nested Page Table support */
-#define X86_FEATURE_LBRV	( 8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML	( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS	( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save */
-#define X86_FEATURE_TSCRATEMSR  ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling support */
-#define X86_FEATURE_VMCBCLEAN   ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */
-#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */
+
 #define X86_FEATURE_VMMCALL     ( 8*32+15) /* Prefer vmmcall to vmcall */
 #define X86_FEATURE_XENPV       ( 8*32+16) /* "" Xen paravirtual guest */
 
@@ -266,6 +252,30 @@
 /* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
 
+/* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
+#define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA		(14*32+ 1) /* Intel Dynamic Acceleration */
+#define X86_FEATURE_ARAT	(14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN		(14*32+ 4) /* Intel Power Limit Notification */
+#define X86_FEATURE_PTS		(14*32+ 6) /* Intel Package Thermal Status */
+#define X86_FEATURE_HWP		(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY	(14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP	(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 0x8000000a (edx), word 15 */
+#define X86_FEATURE_NPT		(15*32+ 0) /* Nested Page Table support */
+#define X86_FEATURE_LBRV	(15*32+ 1) /* LBR Virtualization support */
+#define X86_FEATURE_SVML	(15*32+ 2) /* "svm_lock" SVM locking MSR */
+#define X86_FEATURE_NRIPS	(15*32+ 3) /* "nrip_save" SVM next_rip save */
+#define X86_FEATURE_TSCRATEMSR  (15*32+ 4) /* "tsc_scale" TSC scaling support */
+#define X86_FEATURE_VMCBCLEAN   (15*32+ 5) /* "vmcb_clean" VMCB clean bits support */
+#define X86_FEATURE_FLUSHBYASID (15*32+ 6) /* flush-by-ASID support */
+#define X86_FEATURE_DECODEASSISTS (15*32+ 7) /* Decode Assists support */
+#define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
+#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
+
 /*
  * BUG word(s)
  */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 0498ad3702f5a..2007dfc5b9998 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -695,6 +695,8 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
 
 		c->x86_capability[9] = ebx;
+
+		c->x86_capability[14] = cpuid_eax(0x00000006);
 	}
 
 	/* Extended state features: level 0x0000000d */
@@ -756,6 +758,9 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 	if (c->extended_cpuid_level >= 0x80000007)
 		c->x86_power = cpuid_edx(0x80000007);
 
+	if (c->extended_cpuid_level >= 0x8000000a)
+		c->x86_capability[15] = cpuid_edx(0x8000000a);
+
 	init_scattered_cpuid_features(c);
 }
 
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 608fb26c72544..8cb57df9398d9 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -31,32 +31,12 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
 	const struct cpuid_bit *cb;
 
 	static const struct cpuid_bit cpuid_bits[] = {
-		{ X86_FEATURE_DTHERM,		CR_EAX, 0, 0x00000006, 0 },
-		{ X86_FEATURE_IDA,		CR_EAX, 1, 0x00000006, 0 },
-		{ X86_FEATURE_ARAT,		CR_EAX, 2, 0x00000006, 0 },
-		{ X86_FEATURE_PLN,		CR_EAX, 4, 0x00000006, 0 },
-		{ X86_FEATURE_PTS,		CR_EAX, 6, 0x00000006, 0 },
-		{ X86_FEATURE_HWP,		CR_EAX, 7, 0x00000006, 0 },
-		{ X86_FEATURE_HWP_NOTIFY,	CR_EAX, 8, 0x00000006, 0 },
-		{ X86_FEATURE_HWP_ACT_WINDOW,	CR_EAX, 9, 0x00000006, 0 },
-		{ X86_FEATURE_HWP_EPP,		CR_EAX,10, 0x00000006, 0 },
-		{ X86_FEATURE_HWP_PKG_REQ,	CR_EAX,11, 0x00000006, 0 },
 		{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },
 		{ X86_FEATURE_APERFMPERF,	CR_ECX, 0, 0x00000006, 0 },
 		{ X86_FEATURE_EPB,		CR_ECX, 3, 0x00000006, 0 },
 		{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },
 		{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
 		{ X86_FEATURE_PROC_FEEDBACK,	CR_EDX,11, 0x80000007, 0 },
-		{ X86_FEATURE_NPT,		CR_EDX, 0, 0x8000000a, 0 },
-		{ X86_FEATURE_LBRV,		CR_EDX, 1, 0x8000000a, 0 },
-		{ X86_FEATURE_SVML,		CR_EDX, 2, 0x8000000a, 0 },
-		{ X86_FEATURE_NRIPS,		CR_EDX, 3, 0x8000000a, 0 },
-		{ X86_FEATURE_TSCRATEMSR,	CR_EDX, 4, 0x8000000a, 0 },
-		{ X86_FEATURE_VMCBCLEAN,	CR_EDX, 5, 0x8000000a, 0 },
-		{ X86_FEATURE_FLUSHBYASID,	CR_EDX, 6, 0x8000000a, 0 },
-		{ X86_FEATURE_DECODEASSISTS,	CR_EDX, 7, 0x8000000a, 0 },
-		{ X86_FEATURE_PAUSEFILTER,	CR_EDX,10, 0x8000000a, 0 },
-		{ X86_FEATURE_PFTHRESHOLD,	CR_EDX,12, 0x8000000a, 0 },
 		{ 0, 0, 0, 0, 0 }
 	};
 

From 5adceb4423edc7011038d20aa937a1c7070c1ea9 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:09 -0700
Subject: [PATCH 0919/1852] x86/cpufeature: Cleanup get_cpu_cap()

commit 39c06df4dc10a41de5fe706f4378ee5f09beba73 upstream

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 20 +++++++++++++
 arch/x86/kernel/cpu/centaur.c     |  2 +-
 arch/x86/kernel/cpu/common.c      | 47 +++++++++++++++----------------
 arch/x86/kernel/cpu/transmeta.c   |  4 +--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 999e166407a77..54c7a0b9662aa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -299,6 +299,26 @@
 #include <asm/asm.h>
 #include <linux/bitops.h>
 
+enum cpuid_leafs
+{
+	CPUID_1_EDX		= 0,
+	CPUID_8000_0001_EDX,
+	CPUID_8086_0001_EDX,
+	CPUID_LNX_1,
+	CPUID_1_ECX,
+	CPUID_C000_0001_EDX,
+	CPUID_8000_0001_ECX,
+	CPUID_LNX_2,
+	CPUID_LNX_3,
+	CPUID_7_0_EBX,
+	CPUID_D_1_EAX,
+	CPUID_F_0_EDX,
+	CPUID_F_1_EDX,
+	CPUID_8000_0008_EBX,
+	CPUID_6_EAX,
+	CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c15fbd8..ae20be6e483c7 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
 		/* store Centaur Extended Feature Flags as
 		 * word 5 of the CPU capability bit array
 		 */
-		c->x86_capability[5] = cpuid_edx(0xC0000001);
+		c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC0000001);
 	}
 #ifdef CONFIG_X86_32
 	/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2007dfc5b9998..5b6e43b4c3290 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -676,52 +676,47 @@ static void apply_forced_caps(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-	u32 tfms, xlvl;
-	u32 ebx;
+	u32 eax, ebx, ecx, edx;
 
 	/* Intel-defined flags: level 0x00000001 */
 	if (c->cpuid_level >= 0x00000001) {
-		u32 capability, excap;
+		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
 
-		cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
-		c->x86_capability[0] = capability;
-		c->x86_capability[4] = excap;
+		c->x86_capability[CPUID_1_ECX] = ecx;
+		c->x86_capability[CPUID_1_EDX] = edx;
 	}
 
 	/* Additional Intel-defined flags: level 0x00000007 */
 	if (c->cpuid_level >= 0x00000007) {
-		u32 eax, ebx, ecx, edx;
-
 		cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
 
-		c->x86_capability[9] = ebx;
+		c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-		c->x86_capability[14] = cpuid_eax(0x00000006);
+		c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006);
 	}
 
 	/* Extended state features: level 0x0000000d */
 	if (c->cpuid_level >= 0x0000000d) {
-		u32 eax, ebx, ecx, edx;
-
 		cpuid_count(0x0000000d, 1, &eax, &ebx, &ecx, &edx);
 
-		c->x86_capability[10] = eax;
+		c->x86_capability[CPUID_D_1_EAX] = eax;
 	}
 
 	/* Additional Intel-defined flags: level 0x0000000F */
 	if (c->cpuid_level >= 0x0000000F) {
-		u32 eax, ebx, ecx, edx;
 
 		/* QoS sub-leaf, EAX=0Fh, ECX=0 */
 		cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx);
-		c->x86_capability[11] = edx;
+		c->x86_capability[CPUID_F_0_EDX] = edx;
+
 		if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
 			/* will be overridden if occupancy monitoring exists */
 			c->x86_cache_max_rmid = ebx;
 
 			/* QoS sub-leaf, EAX=0Fh, ECX=1 */
 			cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx);
-			c->x86_capability[12] = edx;
+			c->x86_capability[CPUID_F_1_EDX] = edx;
+
 			if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
 				c->x86_cache_max_rmid = ecx;
 				c->x86_cache_occ_scale = ebx;
@@ -733,22 +728,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 	}
 
 	/* AMD-defined flags: level 0x80000001 */
-	xlvl = cpuid_eax(0x80000000);
-	c->extended_cpuid_level = xlvl;
+	eax = cpuid_eax(0x80000000);
+	c->extended_cpuid_level = eax;
+
+	if ((eax & 0xffff0000) == 0x80000000) {
+		if (eax >= 0x80000001) {
+			cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 
-	if ((xlvl & 0xffff0000) == 0x80000000) {
-		if (xlvl >= 0x80000001) {
-			c->x86_capability[1] = cpuid_edx(0x80000001);
-			c->x86_capability[6] = cpuid_ecx(0x80000001);
+			c->x86_capability[CPUID_8000_0001_ECX] = ecx;
+			c->x86_capability[CPUID_8000_0001_EDX] = edx;
 		}
 	}
 
 	if (c->extended_cpuid_level >= 0x80000008) {
-		u32 eax = cpuid_eax(0x80000008);
+		cpuid(0x80000008, &eax, &ebx, &ecx, &edx);
 
 		c->x86_virt_bits = (eax >> 8) & 0xff;
 		c->x86_phys_bits = eax & 0xff;
-		c->x86_capability[13] = cpuid_ebx(0x80000008);
+		c->x86_capability[CPUID_8000_0008_EBX] = ebx;
 	}
 #ifdef CONFIG_X86_32
 	else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
@@ -759,7 +756,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		c->x86_power = cpuid_edx(0x80000007);
 
 	if (c->extended_cpuid_level >= 0x8000000a)
-		c->x86_capability[15] = cpuid_edx(0x8000000a);
+		c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a);
 
 	init_scattered_cpuid_features(c);
 }
diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 3fa0e5ad86b44..252da7aceca67 100644
--- a/arch/x86/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
@@ -12,7 +12,7 @@ static void early_init_transmeta(struct cpuinfo_x86 *c)
 	xlvl = cpuid_eax(0x80860000);
 	if ((xlvl & 0xffff0000) == 0x80860000) {
 		if (xlvl >= 0x80860001)
-			c->x86_capability[2] = cpuid_edx(0x80860001);
+			c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
 	}
 }
 
@@ -82,7 +82,7 @@ static void init_transmeta(struct cpuinfo_x86 *c)
 	/* Unhide possibly hidden capability flags */
 	rdmsr(0x80860004, cap_mask, uk);
 	wrmsr(0x80860004, ~0, uk);
-	c->x86_capability[0] = cpuid_edx(0x00000001);
+	c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
 	wrmsr(0x80860004, cap_mask, uk);
 
 	/* All Transmeta CPUs have a constant TSC */

From 67e9995ed2454fb035fade346f6d038edf409e07 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:17 -0700
Subject: [PATCH 0920/1852] x86/cpu: Provide a config option to disable
 static_cpu_has

commit 6e1315fe82308cd29e7550eab967262e8bbc71a3 upstream

This brings .text savings of about ~1.6K when building a tinyconfig. It
is off by default so nothing changes for the default.

Kconfig help text from Josh.

Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/Kconfig                  | 11 +++++++++++
 arch/x86/include/asm/cpufeature.h |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ad1f3bfafe75f..b00e3f0ed0c01 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -369,6 +369,17 @@ config X86_FEATURE_NAMES
 
 	  If in doubt, say Y.
 
+config X86_FAST_FEATURE_TESTS
+	bool "Fast CPU feature tests" if EMBEDDED
+	default y
+	---help---
+	  Some fast-paths in the kernel depend on the capabilities of the CPU.
+	  Say Y here for the kernel to patch in the appropriate code at runtime
+	  based on the capabilities of the CPU. The infrastructure for patching
+	  code at runtime takes up some additional space; space-constrained
+	  embedded systems may wish to say N here to produce smaller, slightly
+	  slower code.
+
 config X86_X2APIC
 	bool "Support x2apic"
 	depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 54c7a0b9662aa..67f917b96651e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -422,7 +422,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4
+#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern void warn_pre_alternatives(void);
 extern bool __static_cpu_has_safe(u16 bit);
 

From 86cc79718a13d8edbd6342e95037926d100201f6 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:25 -0700
Subject: [PATCH 0921/1852] x86/fpu: Add an XSTATE_OP() macro

commit b74a0cf1b3db30173eefa00c411775d2b1697700 upstream

Add an XSTATE_OP() macro which contains the XSAVE* fault handling
and replace all non-alternatives users of xstate_fault() with
it.

This fixes also the buglet in copy_xregs_to_user() and
copy_user_to_xregs() where the inline asm didn't have @xstate as
memory reference and thus potentially causing unwanted
reordering of accesses to the extended state.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1447932326-4371-2-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/internal.h | 68 +++++++++++++----------------
 1 file changed, 31 insertions(+), 37 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 146d838e6ee77..839e7b6490702 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -238,6 +238,20 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 	_ASM_EXTABLE(1b, 3b)		\
 	: [_err] "=r" (__err)
 
+#define XSTATE_OP(op, st, lmask, hmask, err)				\
+	asm volatile("1:" op "\n\t"					\
+		     "xor %[err], %[err]\n"				\
+		     "2:\n\t"						\
+		     ".pushsection .fixup,\"ax\"\n\t"			\
+		     "3: movl $-2,%[err]\n\t"				\
+		     "jmp 2b\n\t"					\
+		     ".popsection\n\t"					\
+		     _ASM_EXTABLE(1b, 3b)				\
+		     : [err] "=r" (err)					\
+		     : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)	\
+		     : "memory")
+
+
 /*
  * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
@@ -247,22 +261,14 @@ static inline void copy_xregs_to_kernel_booting(struct xregs_state *xstate)
 	u64 mask = -1;
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
-	int err = 0;
+	int err;
 
 	WARN_ON(system_state != SYSTEM_BOOTING);
 
-	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		asm volatile("1:"XSAVES"\n\t"
-			"2:\n\t"
-			     xstate_fault(err)
-			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)
-			: "memory");
+	if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+		XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
 	else
-		asm volatile("1:"XSAVE"\n\t"
-			"2:\n\t"
-			     xstate_fault(err)
-			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)
-			: "memory");
+		XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
 
 	/* We should never fault when copying to a kernel buffer: */
 	WARN_ON_FPU(err);
@@ -277,22 +283,14 @@ static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)
 	u64 mask = -1;
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
-	int err = 0;
+	int err;
 
 	WARN_ON(system_state != SYSTEM_BOOTING);
 
-	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		asm volatile("1:"XRSTORS"\n\t"
-			"2:\n\t"
-			     xstate_fault(err)
-			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)
-			: "memory");
+	if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+		XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 	else
-		asm volatile("1:"XRSTOR"\n\t"
-			"2:\n\t"
-			     xstate_fault(err)
-			: "D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask), "0" (err)
-			: "memory");
+		XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
 
 	/* We should never fault when copying from a kernel buffer: */
 	WARN_ON_FPU(err);
@@ -389,12 +387,10 @@ static inline int copy_xregs_to_user(struct xregs_state __user *buf)
 	if (unlikely(err))
 		return -EFAULT;
 
-	__asm__ __volatile__(ASM_STAC "\n"
-			     "1:"XSAVE"\n"
-			     "2: " ASM_CLAC "\n"
-			     xstate_fault(err)
-			     : "D" (buf), "a" (-1), "d" (-1), "0" (err)
-			     : "memory");
+	stac();
+	XSTATE_OP(XSAVE, buf, -1, -1, err);
+	clac();
+
 	return err;
 }
 
@@ -406,14 +402,12 @@ static inline int copy_user_to_xregs(struct xregs_state __user *buf, u64 mask)
 	struct xregs_state *xstate = ((__force struct xregs_state *)buf);
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
-	int err = 0;
+	int err;
+
+	stac();
+	XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
+	clac();
 
-	__asm__ __volatile__(ASM_STAC "\n"
-			     "1:"XRSTOR"\n"
-			     "2: " ASM_CLAC "\n"
-			     xstate_fault(err)
-			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (err)
-			     : "memory");	/* memory required? */
 	return err;
 }
 

From 8bcd099c61a8e49f6ddbabd069e45b6ed2cc4e6c Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:34 -0700
Subject: [PATCH 0922/1852] x86/fpu: Get rid of xstate_fault()

commit b7106fa0f29f9fd83d2d1905ab690d334ef855c1 upstream

Add macros for the alternative XSAVE*/XRSTOR* operations which
contain the fault handling and use them. Kill xstate_fault().

Also, copy_xregs_to_kernel() didn't have the extended state as
memory reference in the asm.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1447932326-4371-3-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/fpu/internal.h | 105 ++++++++++++++--------------
 1 file changed, 52 insertions(+), 53 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 839e7b6490702..60c984ab526a3 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -225,19 +225,6 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 #define XRSTOR		".byte " REX_PREFIX "0x0f,0xae,0x2f"
 #define XRSTORS		".byte " REX_PREFIX "0x0f,0xc7,0x1f"
 
-/* xstate instruction fault handler: */
-#define xstate_fault(__err)		\
-					\
-	".section .fixup,\"ax\"\n"	\
-					\
-	"3:  movl $-2,%[_err]\n"	\
-	"    jmp  2b\n"			\
-					\
-	".previous\n"			\
-					\
-	_ASM_EXTABLE(1b, 3b)		\
-	: [_err] "=r" (__err)
-
 #define XSTATE_OP(op, st, lmask, hmask, err)				\
 	asm volatile("1:" op "\n\t"					\
 		     "xor %[err], %[err]\n"				\
@@ -251,6 +238,54 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 		     : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)	\
 		     : "memory")
 
+/*
+ * If XSAVES is enabled, it replaces XSAVEOPT because it supports a compact
+ * format and supervisor states in addition to modified optimization in
+ * XSAVEOPT.
+ *
+ * Otherwise, if XSAVEOPT is enabled, XSAVEOPT replaces XSAVE because XSAVEOPT
+ * supports modified optimization which is not supported by XSAVE.
+ *
+ * We use XSAVE as a fallback.
+ *
+ * The 661 label is defined in the ALTERNATIVE* macros as the address of the
+ * original instruction which gets replaced. We need to use it here as the
+ * address of the instruction where we might get an exception at.
+ */
+#define XSTATE_XSAVE(st, lmask, hmask, err)				\
+	asm volatile(ALTERNATIVE_2(XSAVE,				\
+				   XSAVEOPT, X86_FEATURE_XSAVEOPT,	\
+				   XSAVES,   X86_FEATURE_XSAVES)	\
+		     "\n"						\
+		     "xor %[err], %[err]\n"				\
+		     "3:\n"						\
+		     ".pushsection .fixup,\"ax\"\n"			\
+		     "4: movl $-2, %[err]\n"				\
+		     "jmp 3b\n"						\
+		     ".popsection\n"					\
+		     _ASM_EXTABLE(661b, 4b)				\
+		     : [err] "=r" (err)					\
+		     : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)	\
+		     : "memory")
+
+/*
+ * Use XRSTORS to restore context if it is enabled. XRSTORS supports compact
+ * XSAVE area format.
+ */
+#define XSTATE_XRESTORE(st, lmask, hmask, err)				\
+	asm volatile(ALTERNATIVE(XRSTOR,				\
+				 XRSTORS, X86_FEATURE_XSAVES)		\
+		     "\n"						\
+		     "xor %[err], %[err]\n"				\
+		     "3:\n"						\
+		     ".pushsection .fixup,\"ax\"\n"			\
+		     "4: movl $-2, %[err]\n"				\
+		     "jmp 3b\n"						\
+		     ".popsection\n"					\
+		     _ASM_EXTABLE(661b, 4b)				\
+		     : [err] "=r" (err)					\
+		     : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)	\
+		     : "memory")
 
 /*
  * This function is called only during boot time when x86 caps are not set
@@ -304,33 +339,11 @@ static inline void copy_xregs_to_kernel(struct xregs_state *xstate)
 	u64 mask = -1;
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
-	int err = 0;
+	int err;
 
 	WARN_ON(!alternatives_patched);
 
-	/*
-	 * If xsaves is enabled, xsaves replaces xsaveopt because
-	 * it supports compact format and supervisor states in addition to
-	 * modified optimization in xsaveopt.
-	 *
-	 * Otherwise, if xsaveopt is enabled, xsaveopt replaces xsave
-	 * because xsaveopt supports modified optimization which is not
-	 * supported by xsave.
-	 *
-	 * If none of xsaves and xsaveopt is enabled, use xsave.
-	 */
-	alternative_input_2(
-		"1:"XSAVE,
-		XSAVEOPT,
-		X86_FEATURE_XSAVEOPT,
-		XSAVES,
-		X86_FEATURE_XSAVES,
-		[xstate] "D" (xstate), "a" (lmask), "d" (hmask) :
-		"memory");
-	asm volatile("2:\n\t"
-		     xstate_fault(err)
-		     : "0" (err)
-		     : "memory");
+	XSTATE_XSAVE(xstate, lmask, hmask, err);
 
 	/* We should never fault when copying to a kernel buffer: */
 	WARN_ON_FPU(err);
@@ -343,23 +356,9 @@ static inline void copy_kernel_to_xregs(struct xregs_state *xstate, u64 mask)
 {
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
-	int err = 0;
+	int err;
 
-	/*
-	 * Use xrstors to restore context if it is enabled. xrstors supports
-	 * compacted format of xsave area which is not supported by xrstor.
-	 */
-	alternative_input(
-		"1: " XRSTOR,
-		XRSTORS,
-		X86_FEATURE_XSAVES,
-		"D" (xstate), "m" (*xstate), "a" (lmask), "d" (hmask)
-		: "memory");
-
-	asm volatile("2:\n"
-		     xstate_fault(err)
-		     : "0" (err)
-		     : "memory");
+	XSTATE_XRESTORE(xstate, lmask, hmask, err);
 
 	/* We should never fault when copying from a kernel buffer: */
 	WARN_ON_FPU(err);

From 188539a29bc2a8ffbeeb1ea36c7c78a8d850a8ca Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Sat, 14 Jul 2018 02:26:43 -0700
Subject: [PATCH 0923/1852] x86/headers: Don't include asm/processor.h in
 asm/atomic.h

commit 153a4334c439cfb62e1d31cee0c790ba4157813d upstream

asm/atomic.h doesn't really need asm/processor.h anymore. Everything
it uses has moved to other header files. So remove that include.

processor.h is a nasty header that includes lots of
other headers and makes it prone to include loops. Removing the
include here makes asm/atomic.h a "leaf" header that can
be safely included in most other headers.

The only fallout is in the lib/atomic tester which relied on
this implicit include. Give it an explicit include.
(the include is in ifdef because the user is also in ifdef)

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: rostedt@goodmis.org
Link: http://lkml.kernel.org/r/1449018060-1742-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/atomic.h      | 1 -
 arch/x86/include/asm/atomic64_32.h | 1 -
 lib/atomic64_test.c                | 4 ++++
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index ae5fb83e6d91c..3e86742881984 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -3,7 +3,6 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
-#include <asm/processor.h>
 #include <asm/alternative.h>
 #include <asm/cmpxchg.h>
 #include <asm/rmwcc.h>
diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h
index a11c30b77fb57..a984111135b16 100644
--- a/arch/x86/include/asm/atomic64_32.h
+++ b/arch/x86/include/asm/atomic64_32.h
@@ -3,7 +3,6 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
-#include <asm/processor.h>
 //#include <asm/cmpxchg.h>
 
 /* An 64bit atomic type */
diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c
index 83c33a5bcffb1..d51e25aa5f1d1 100644
--- a/lib/atomic64_test.c
+++ b/lib/atomic64_test.c
@@ -16,6 +16,10 @@
 #include <linux/kernel.h>
 #include <linux/atomic.h>
 
+#ifdef CONFIG_X86
+#include <asm/processor.h>	/* for boot_cpu_has below */
+#endif
+
 #define TEST(bit, op, c_op, val)				\
 do {								\
 	atomic##bit##_set(&v, v0);				\

From c0c4869283afc4810df8a08d0479d9d49283f758 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:26:52 -0700
Subject: [PATCH 0924/1852] x86/cpufeature: Carve out X86_FEATURE_*

commit cd4d09ec6f6c12a2cc3db5b7d8876a325a53545b upstream

Move them to a separate header and have the following
dependency:

  x86/cpufeatures.h <- x86/processor.h <- x86/cpufeature.h

This makes it easier to use the header in asm code and not
include the whole cpufeature.h and add guards for asm.

Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1453842730-28463-5-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/kernel-parameters.txt      |   2 +-
 arch/x86/boot/cpuflags.h                 |   2 +-
 arch/x86/boot/mkcpustr.c                 |   2 +-
 arch/x86/crypto/crc32-pclmul_glue.c      |   2 +-
 arch/x86/crypto/crc32c-intel_glue.c      |   2 +-
 arch/x86/crypto/crct10dif-pclmul_glue.c  |   2 +-
 arch/x86/entry/common.c                  |   1 +
 arch/x86/entry/entry_32.S                |   2 +-
 arch/x86/entry/vdso/vdso32-setup.c       |   1 -
 arch/x86/entry/vdso/vdso32/system_call.S |   2 +-
 arch/x86/entry/vdso/vma.c                |   1 +
 arch/x86/include/asm/alternative.h       |   6 -
 arch/x86/include/asm/apic.h              |   1 -
 arch/x86/include/asm/arch_hweight.h      |   2 +
 arch/x86/include/asm/cmpxchg.h           |   1 +
 arch/x86/include/asm/cpufeature.h        | 293 +---------------------
 arch/x86/include/asm/cpufeatures.h       | 297 +++++++++++++++++++++++
 arch/x86/include/asm/fpu/internal.h      |   1 +
 arch/x86/include/asm/irq_work.h          |   2 +-
 arch/x86/include/asm/mwait.h             |   2 +
 arch/x86/include/asm/nospec-branch.h     |   2 +-
 arch/x86/include/asm/processor.h         |   3 +-
 arch/x86/include/asm/smap.h              |   2 +-
 arch/x86/include/asm/smp.h               |   1 -
 arch/x86/include/asm/thread_info.h       |   2 +-
 arch/x86/include/asm/tlbflush.h          |   1 +
 arch/x86/include/asm/uaccess_64.h        |   2 +-
 arch/x86/kernel/cpu/Makefile             |   2 +-
 arch/x86/kernel/cpu/centaur.c            |   2 +-
 arch/x86/kernel/cpu/cyrix.c              |   1 +
 arch/x86/kernel/cpu/intel.c              |   2 +-
 arch/x86/kernel/cpu/intel_cacheinfo.c    |   2 +-
 arch/x86/kernel/cpu/match.c              |   2 +-
 arch/x86/kernel/cpu/mkcapflags.sh        |   6 +-
 arch/x86/kernel/cpu/mtrr/main.c          |   2 +-
 arch/x86/kernel/cpu/transmeta.c          |   2 +-
 arch/x86/kernel/e820.c                   |   1 +
 arch/x86/kernel/head_32.S                |   2 +-
 arch/x86/kernel/hpet.c                   |   1 +
 arch/x86/kernel/msr.c                    |   2 +-
 arch/x86/kernel/verify_cpu.S             |   2 +-
 arch/x86/lib/clear_page_64.S             |   2 +-
 arch/x86/lib/copy_page_64.S              |   2 +-
 arch/x86/lib/copy_user_64.S              |   2 +-
 arch/x86/lib/memcpy_64.S                 |   2 +-
 arch/x86/lib/memmove_64.S                |   2 +-
 arch/x86/lib/memset_64.S                 |   2 +-
 arch/x86/lib/retpoline.S                 |   2 +-
 arch/x86/mm/setup_nx.c                   |   1 +
 arch/x86/oprofile/op_model_amd.c         |   1 -
 arch/x86/um/asm/barrier.h                |   2 +-
 lib/atomic64_test.c                      |   2 +-
 52 files changed, 347 insertions(+), 339 deletions(-)
 create mode 100644 arch/x86/include/asm/cpufeatures.h

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index fe5a4133dd5e9..a227ed8b0cdcb 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -653,7 +653,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 
 	clearcpuid=BITNUM [X86]
 			Disable CPUID feature X for the kernel. See
-			arch/x86/include/asm/cpufeature.h for the valid bit
+			arch/x86/include/asm/cpufeatures.h for the valid bit
 			numbers. Note the Linux specific bits are not necessarily
 			stable over kernel options, but the vendor specific
 			ones should be.
diff --git a/arch/x86/boot/cpuflags.h b/arch/x86/boot/cpuflags.h
index ea97697e51e40..4cb404fd45cea 100644
--- a/arch/x86/boot/cpuflags.h
+++ b/arch/x86/boot/cpuflags.h
@@ -1,7 +1,7 @@
 #ifndef BOOT_CPUFLAGS_H
 #define BOOT_CPUFLAGS_H
 
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/processor-flags.h>
 
 struct cpu_features {
diff --git a/arch/x86/boot/mkcpustr.c b/arch/x86/boot/mkcpustr.c
index 637097e66a62a..f72498dc90d23 100644
--- a/arch/x86/boot/mkcpustr.c
+++ b/arch/x86/boot/mkcpustr.c
@@ -17,7 +17,7 @@
 
 #include "../include/asm/required-features.h"
 #include "../include/asm/disabled-features.h"
-#include "../include/asm/cpufeature.h"
+#include "../include/asm/cpufeatures.h"
 #include "../kernel/cpu/capflags.c"
 
 int main(void)
diff --git a/arch/x86/crypto/crc32-pclmul_glue.c b/arch/x86/crypto/crc32-pclmul_glue.c
index 07d2c6c86a548..27226df3f7d8a 100644
--- a/arch/x86/crypto/crc32-pclmul_glue.c
+++ b/arch/x86/crypto/crc32-pclmul_glue.c
@@ -33,7 +33,7 @@
 #include <linux/crc32.h>
 #include <crypto/internal/hash.h>
 
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/cpu_device_id.h>
 #include <asm/fpu/api.h>
 
diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c
index 15f5c7675d426..715399b14ed76 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -30,7 +30,7 @@
 #include <linux/kernel.h>
 #include <crypto/internal/hash.h>
 
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/cpu_device_id.h>
 #include <asm/fpu/internal.h>
 
diff --git a/arch/x86/crypto/crct10dif-pclmul_glue.c b/arch/x86/crypto/crct10dif-pclmul_glue.c
index a3fcfc97a311d..cd4df93225014 100644
--- a/arch/x86/crypto/crct10dif-pclmul_glue.c
+++ b/arch/x86/crypto/crct10dif-pclmul_glue.c
@@ -30,7 +30,7 @@
 #include <linux/string.h>
 #include <linux/kernel.h>
 #include <asm/fpu/api.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/cpu_device_id.h>
 
 asmlinkage __u16 crc_t10dif_pcl(__u16 crc, const unsigned char *buf,
diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c
index b5eb1cca70a0a..071582a3b5c06 100644
--- a/arch/x86/entry/common.c
+++ b/arch/x86/entry/common.c
@@ -27,6 +27,7 @@
 #include <asm/traps.h>
 #include <asm/vdso.h>
 #include <asm/uaccess.h>
+#include <asm/cpufeature.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/syscalls.h>
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index d437f3871e532..49a8c9f7a3797 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -40,7 +40,7 @@
 #include <asm/processor-flags.h>
 #include <asm/ftrace.h>
 #include <asm/irq_vectors.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 #include <asm/asm.h>
 #include <asm/smap.h>
diff --git a/arch/x86/entry/vdso/vdso32-setup.c b/arch/x86/entry/vdso/vdso32-setup.c
index a7508d7e20b7c..3f9d1a83891ad 100644
--- a/arch/x86/entry/vdso/vdso32-setup.c
+++ b/arch/x86/entry/vdso/vdso32-setup.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/mm_types.h>
 
-#include <asm/cpufeature.h>
 #include <asm/processor.h>
 #include <asm/vdso.h>
 
diff --git a/arch/x86/entry/vdso/vdso32/system_call.S b/arch/x86/entry/vdso/vdso32/system_call.S
index 3a1d9297074bc..0109ac6cb79cc 100644
--- a/arch/x86/entry/vdso/vdso32/system_call.S
+++ b/arch/x86/entry/vdso/vdso32/system_call.S
@@ -3,7 +3,7 @@
 */
 
 #include <asm/dwarf2.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 /*
diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c
index b8f69e264ac41..5471ac3621476 100644
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -20,6 +20,7 @@
 #include <asm/page.h>
 #include <asm/hpet.h>
 #include <asm/desc.h>
+#include <asm/cpufeature.h>
 
 #if defined(CONFIG_X86_64)
 unsigned int __read_mostly vdso64_enabled = 1;
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index 215ea9214215c..002fcd901f073 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -153,12 +153,6 @@ static inline int alternatives_text_reserved(void *start, void *end)
 	ALTINSTR_REPLACEMENT(newinstr2, feature2, 2)			\
 	".popsection\n"
 
-/*
- * This must be included *after* the definition of ALTERNATIVE due to
- * <asm/arch_hweight.h>
- */
-#include <asm/cpufeature.h>
-
 /*
  * Alternative instructions for different CPU types or capabilities.
  *
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 163769d824754..fd810a57ab1b1 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -6,7 +6,6 @@
 
 #include <asm/alternative.h>
 #include <asm/cpufeature.h>
-#include <asm/processor.h>
 #include <asm/apicdef.h>
 #include <linux/atomic.h>
 #include <asm/fixmap.h>
diff --git a/arch/x86/include/asm/arch_hweight.h b/arch/x86/include/asm/arch_hweight.h
index 44f825c80ed55..e7cd63175de44 100644
--- a/arch/x86/include/asm/arch_hweight.h
+++ b/arch/x86/include/asm/arch_hweight.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_HWEIGHT_H
 #define _ASM_X86_HWEIGHT_H
 
+#include <asm/cpufeatures.h>
+
 #ifdef CONFIG_64BIT
 /* popcnt %edi, %eax */
 #define POPCNT32 ".byte 0xf3,0x0f,0xb8,0xc7"
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index ad19841eddfe1..9733361fed6f4 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -2,6 +2,7 @@
 #define ASM_X86_CMPXCHG_H
 
 #include <linux/compiler.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative.h> /* Provides LOCK_PREFIX */
 
 /*
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 67f917b96651e..f62e872e670e7 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -1,298 +1,7 @@
-/*
- * Defines x86 CPU feature bits
- */
 #ifndef _ASM_X86_CPUFEATURE_H
 #define _ASM_X86_CPUFEATURE_H
 
-#ifndef _ASM_X86_REQUIRED_FEATURES_H
-#include <asm/required-features.h>
-#endif
-
-#ifndef _ASM_X86_DISABLED_FEATURES_H
-#include <asm/disabled-features.h>
-#endif
-
-#define NCAPINTS	16	/* N 32-bit words worth of info */
-#define NBUGINTS	1	/* N 32-bit bug flags */
-
-/*
- * Note: If the comment begins with a quoted string, that string is used
- * in /proc/cpuinfo instead of the macro name.  If the string is "",
- * this feature bit is not displayed in /proc/cpuinfo at all.
- */
-
-/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
-#define X86_FEATURE_FPU		( 0*32+ 0) /* Onboard FPU */
-#define X86_FEATURE_VME		( 0*32+ 1) /* Virtual Mode Extensions */
-#define X86_FEATURE_DE		( 0*32+ 2) /* Debugging Extensions */
-#define X86_FEATURE_PSE		( 0*32+ 3) /* Page Size Extensions */
-#define X86_FEATURE_TSC		( 0*32+ 4) /* Time Stamp Counter */
-#define X86_FEATURE_MSR		( 0*32+ 5) /* Model-Specific Registers */
-#define X86_FEATURE_PAE		( 0*32+ 6) /* Physical Address Extensions */
-#define X86_FEATURE_MCE		( 0*32+ 7) /* Machine Check Exception */
-#define X86_FEATURE_CX8		( 0*32+ 8) /* CMPXCHG8 instruction */
-#define X86_FEATURE_APIC	( 0*32+ 9) /* Onboard APIC */
-#define X86_FEATURE_SEP		( 0*32+11) /* SYSENTER/SYSEXIT */
-#define X86_FEATURE_MTRR	( 0*32+12) /* Memory Type Range Registers */
-#define X86_FEATURE_PGE		( 0*32+13) /* Page Global Enable */
-#define X86_FEATURE_MCA		( 0*32+14) /* Machine Check Architecture */
-#define X86_FEATURE_CMOV	( 0*32+15) /* CMOV instructions */
-					  /* (plus FCMOVcc, FCOMI with FPU) */
-#define X86_FEATURE_PAT		( 0*32+16) /* Page Attribute Table */
-#define X86_FEATURE_PSE36	( 0*32+17) /* 36-bit PSEs */
-#define X86_FEATURE_PN		( 0*32+18) /* Processor serial number */
-#define X86_FEATURE_CLFLUSH	( 0*32+19) /* CLFLUSH instruction */
-#define X86_FEATURE_DS		( 0*32+21) /* "dts" Debug Store */
-#define X86_FEATURE_ACPI	( 0*32+22) /* ACPI via MSR */
-#define X86_FEATURE_MMX		( 0*32+23) /* Multimedia Extensions */
-#define X86_FEATURE_FXSR	( 0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
-#define X86_FEATURE_XMM		( 0*32+25) /* "sse" */
-#define X86_FEATURE_XMM2	( 0*32+26) /* "sse2" */
-#define X86_FEATURE_SELFSNOOP	( 0*32+27) /* "ss" CPU self snoop */
-#define X86_FEATURE_HT		( 0*32+28) /* Hyper-Threading */
-#define X86_FEATURE_ACC		( 0*32+29) /* "tm" Automatic clock control */
-#define X86_FEATURE_IA64	( 0*32+30) /* IA-64 processor */
-#define X86_FEATURE_PBE		( 0*32+31) /* Pending Break Enable */
-
-/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
-/* Don't duplicate feature flags which are redundant with Intel! */
-#define X86_FEATURE_SYSCALL	( 1*32+11) /* SYSCALL/SYSRET */
-#define X86_FEATURE_MP		( 1*32+19) /* MP Capable. */
-#define X86_FEATURE_NX		( 1*32+20) /* Execute Disable */
-#define X86_FEATURE_MMXEXT	( 1*32+22) /* AMD MMX extensions */
-#define X86_FEATURE_FXSR_OPT	( 1*32+25) /* FXSAVE/FXRSTOR optimizations */
-#define X86_FEATURE_GBPAGES	( 1*32+26) /* "pdpe1gb" GB pages */
-#define X86_FEATURE_RDTSCP	( 1*32+27) /* RDTSCP */
-#define X86_FEATURE_LM		( 1*32+29) /* Long Mode (x86-64) */
-#define X86_FEATURE_3DNOWEXT	( 1*32+30) /* AMD 3DNow! extensions */
-#define X86_FEATURE_3DNOW	( 1*32+31) /* 3DNow! */
-
-/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
-#define X86_FEATURE_RECOVERY	( 2*32+ 0) /* CPU in recovery mode */
-#define X86_FEATURE_LONGRUN	( 2*32+ 1) /* Longrun power control */
-#define X86_FEATURE_LRTI	( 2*32+ 3) /* LongRun table interface */
-
-/* Other features, Linux-defined mapping, word 3 */
-/* This range is used for feature bits which conflict or are synthesized */
-#define X86_FEATURE_CXMMX	( 3*32+ 0) /* Cyrix MMX extensions */
-#define X86_FEATURE_K6_MTRR	( 3*32+ 1) /* AMD K6 nonstandard MTRRs */
-#define X86_FEATURE_CYRIX_ARR	( 3*32+ 2) /* Cyrix ARRs (= MTRRs) */
-#define X86_FEATURE_CENTAUR_MCR	( 3*32+ 3) /* Centaur MCRs (= MTRRs) */
-/* cpu types for specific tunings: */
-#define X86_FEATURE_K8		( 3*32+ 4) /* "" Opteron, Athlon64 */
-#define X86_FEATURE_K7		( 3*32+ 5) /* "" Athlon */
-#define X86_FEATURE_P3		( 3*32+ 6) /* "" P3 */
-#define X86_FEATURE_P4		( 3*32+ 7) /* "" P4 */
-#define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* TSC ticks at a constant rate */
-#define X86_FEATURE_UP		( 3*32+ 9) /* smp kernel running on up */
-/* free, was #define X86_FEATURE_FXSAVE_LEAK ( 3*32+10) * "" FXSAVE leaks FOP/FIP/FOP */
-#define X86_FEATURE_ARCH_PERFMON ( 3*32+11) /* Intel Architectural PerfMon */
-#define X86_FEATURE_PEBS	( 3*32+12) /* Precise-Event Based Sampling */
-#define X86_FEATURE_BTS		( 3*32+13) /* Branch Trace Store */
-#define X86_FEATURE_SYSCALL32	( 3*32+14) /* "" syscall in ia32 userspace */
-#define X86_FEATURE_SYSENTER32	( 3*32+15) /* "" sysenter in ia32 userspace */
-#define X86_FEATURE_REP_GOOD	( 3*32+16) /* rep microcode works well */
-#define X86_FEATURE_MFENCE_RDTSC ( 3*32+17) /* "" Mfence synchronizes RDTSC */
-#define X86_FEATURE_LFENCE_RDTSC ( 3*32+18) /* "" Lfence synchronizes RDTSC */
-/* free, was #define X86_FEATURE_11AP	( 3*32+19) * "" Bad local APIC aka 11AP */
-#define X86_FEATURE_NOPL	( 3*32+20) /* The NOPL (0F 1F) instructions */
-#define X86_FEATURE_ALWAYS	( 3*32+21) /* "" Always-present feature */
-#define X86_FEATURE_XTOPOLOGY	( 3*32+22) /* cpu topology enum extensions */
-#define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */
-#define X86_FEATURE_NONSTOP_TSC	( 3*32+24) /* TSC does not stop in C states */
-/* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */
-#define X86_FEATURE_EXTD_APICID	( 3*32+26) /* has extended APICID (8 bits) */
-#define X86_FEATURE_AMD_DCM     ( 3*32+27) /* multi-node processor */
-#define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */
-/* free, was #define X86_FEATURE_EAGER_FPU	( 3*32+29) * "eagerfpu" Non lazy FPU restore */
-#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */
-
-/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_XMM3	( 4*32+ 0) /* "pni" SSE-3 */
-#define X86_FEATURE_PCLMULQDQ	( 4*32+ 1) /* PCLMULQDQ instruction */
-#define X86_FEATURE_DTES64	( 4*32+ 2) /* 64-bit Debug Store */
-#define X86_FEATURE_MWAIT	( 4*32+ 3) /* "monitor" Monitor/Mwait support */
-#define X86_FEATURE_DSCPL	( 4*32+ 4) /* "ds_cpl" CPL Qual. Debug Store */
-#define X86_FEATURE_VMX		( 4*32+ 5) /* Hardware virtualization */
-#define X86_FEATURE_SMX		( 4*32+ 6) /* Safer mode */
-#define X86_FEATURE_EST		( 4*32+ 7) /* Enhanced SpeedStep */
-#define X86_FEATURE_TM2		( 4*32+ 8) /* Thermal Monitor 2 */
-#define X86_FEATURE_SSSE3	( 4*32+ 9) /* Supplemental SSE-3 */
-#define X86_FEATURE_CID		( 4*32+10) /* Context ID */
-#define X86_FEATURE_SDBG	( 4*32+11) /* Silicon Debug */
-#define X86_FEATURE_FMA		( 4*32+12) /* Fused multiply-add */
-#define X86_FEATURE_CX16	( 4*32+13) /* CMPXCHG16B */
-#define X86_FEATURE_XTPR	( 4*32+14) /* Send Task Priority Messages */
-#define X86_FEATURE_PDCM	( 4*32+15) /* Performance Capabilities */
-#define X86_FEATURE_PCID	( 4*32+17) /* Process Context Identifiers */
-#define X86_FEATURE_DCA		( 4*32+18) /* Direct Cache Access */
-#define X86_FEATURE_XMM4_1	( 4*32+19) /* "sse4_1" SSE-4.1 */
-#define X86_FEATURE_XMM4_2	( 4*32+20) /* "sse4_2" SSE-4.2 */
-#define X86_FEATURE_X2APIC	( 4*32+21) /* x2APIC */
-#define X86_FEATURE_MOVBE	( 4*32+22) /* MOVBE instruction */
-#define X86_FEATURE_POPCNT      ( 4*32+23) /* POPCNT instruction */
-#define X86_FEATURE_TSC_DEADLINE_TIMER	( 4*32+24) /* Tsc deadline timer */
-#define X86_FEATURE_AES		( 4*32+25) /* AES instructions */
-#define X86_FEATURE_XSAVE	( 4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
-#define X86_FEATURE_OSXSAVE	( 4*32+27) /* "" XSAVE enabled in the OS */
-#define X86_FEATURE_AVX		( 4*32+28) /* Advanced Vector Extensions */
-#define X86_FEATURE_F16C	( 4*32+29) /* 16-bit fp conversions */
-#define X86_FEATURE_RDRAND	( 4*32+30) /* The RDRAND instruction */
-#define X86_FEATURE_HYPERVISOR	( 4*32+31) /* Running on a hypervisor */
-
-/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
-#define X86_FEATURE_XSTORE	( 5*32+ 2) /* "rng" RNG present (xstore) */
-#define X86_FEATURE_XSTORE_EN	( 5*32+ 3) /* "rng_en" RNG enabled */
-#define X86_FEATURE_XCRYPT	( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
-#define X86_FEATURE_XCRYPT_EN	( 5*32+ 7) /* "ace_en" on-CPU crypto enabled */
-#define X86_FEATURE_ACE2	( 5*32+ 8) /* Advanced Cryptography Engine v2 */
-#define X86_FEATURE_ACE2_EN	( 5*32+ 9) /* ACE v2 enabled */
-#define X86_FEATURE_PHE		( 5*32+10) /* PadLock Hash Engine */
-#define X86_FEATURE_PHE_EN	( 5*32+11) /* PHE enabled */
-#define X86_FEATURE_PMM		( 5*32+12) /* PadLock Montgomery Multiplier */
-#define X86_FEATURE_PMM_EN	( 5*32+13) /* PMM enabled */
-
-/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
-#define X86_FEATURE_LAHF_LM	( 6*32+ 0) /* LAHF/SAHF in long mode */
-#define X86_FEATURE_CMP_LEGACY	( 6*32+ 1) /* If yes HyperThreading not valid */
-#define X86_FEATURE_SVM		( 6*32+ 2) /* Secure virtual machine */
-#define X86_FEATURE_EXTAPIC	( 6*32+ 3) /* Extended APIC space */
-#define X86_FEATURE_CR8_LEGACY	( 6*32+ 4) /* CR8 in 32-bit mode */
-#define X86_FEATURE_ABM		( 6*32+ 5) /* Advanced bit manipulation */
-#define X86_FEATURE_SSE4A	( 6*32+ 6) /* SSE-4A */
-#define X86_FEATURE_MISALIGNSSE ( 6*32+ 7) /* Misaligned SSE mode */
-#define X86_FEATURE_3DNOWPREFETCH ( 6*32+ 8) /* 3DNow prefetch instructions */
-#define X86_FEATURE_OSVW	( 6*32+ 9) /* OS Visible Workaround */
-#define X86_FEATURE_IBS		( 6*32+10) /* Instruction Based Sampling */
-#define X86_FEATURE_XOP		( 6*32+11) /* extended AVX instructions */
-#define X86_FEATURE_SKINIT	( 6*32+12) /* SKINIT/STGI instructions */
-#define X86_FEATURE_WDT		( 6*32+13) /* Watchdog timer */
-#define X86_FEATURE_LWP		( 6*32+15) /* Light Weight Profiling */
-#define X86_FEATURE_FMA4	( 6*32+16) /* 4 operands MAC instructions */
-#define X86_FEATURE_TCE		( 6*32+17) /* translation cache extension */
-#define X86_FEATURE_NODEID_MSR	( 6*32+19) /* NodeId MSR */
-#define X86_FEATURE_TBM		( 6*32+21) /* trailing bit manipulations */
-#define X86_FEATURE_TOPOEXT	( 6*32+22) /* topology extensions CPUID leafs */
-#define X86_FEATURE_PERFCTR_CORE ( 6*32+23) /* core performance counter extensions */
-#define X86_FEATURE_PERFCTR_NB  ( 6*32+24) /* NB performance counter extensions */
-#define X86_FEATURE_BPEXT	(6*32+26) /* data breakpoint extension */
-#define X86_FEATURE_PERFCTR_L2	( 6*32+28) /* L2 performance counter extensions */
-#define X86_FEATURE_MWAITX	( 6*32+29) /* MWAIT extension (MONITORX/MWAITX) */
-
-/*
- * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7.
- *
- * Reuse free bits when adding new feature flags!
- */
-
-#define X86_FEATURE_CPB		( 7*32+ 2) /* AMD Core Performance Boost */
-#define X86_FEATURE_EPB		( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
-#define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 4) /* Effectively INVPCID && CR4.PCIDE=1 */
-
-#define X86_FEATURE_HW_PSTATE	( 7*32+ 8) /* AMD HW-PState */
-#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-
-#define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
-#define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* Fill RSB on context switches */
-
-#define X86_FEATURE_RETPOLINE	( 7*32+29) /* Generic Retpoline mitigation for Spectre variant 2 */
-#define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* AMD Retpoline mitigation for Spectre variant 2 */
-/* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
-#define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
-
-/* Virtualization flags: Linux defined, word 8 */
-#define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
-#define X86_FEATURE_VNMI        ( 8*32+ 1) /* Intel Virtual NMI */
-#define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
-#define X86_FEATURE_EPT         ( 8*32+ 3) /* Intel Extended Page Table */
-#define X86_FEATURE_VPID        ( 8*32+ 4) /* Intel Virtual Processor ID */
-
-#define X86_FEATURE_VMMCALL     ( 8*32+15) /* Prefer vmmcall to vmcall */
-#define X86_FEATURE_XENPV       ( 8*32+16) /* "" Xen paravirtual guest */
-
-
-/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
-#define X86_FEATURE_FSGSBASE	( 9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
-#define X86_FEATURE_TSC_ADJUST	( 9*32+ 1) /* TSC adjustment MSR 0x3b */
-#define X86_FEATURE_BMI1	( 9*32+ 3) /* 1st group bit manipulation extensions */
-#define X86_FEATURE_HLE		( 9*32+ 4) /* Hardware Lock Elision */
-#define X86_FEATURE_AVX2	( 9*32+ 5) /* AVX2 instructions */
-#define X86_FEATURE_SMEP	( 9*32+ 7) /* Supervisor Mode Execution Protection */
-#define X86_FEATURE_BMI2	( 9*32+ 8) /* 2nd group bit manipulation extensions */
-#define X86_FEATURE_ERMS	( 9*32+ 9) /* Enhanced REP MOVSB/STOSB */
-#define X86_FEATURE_INVPCID	( 9*32+10) /* Invalidate Processor Context ID */
-#define X86_FEATURE_RTM		( 9*32+11) /* Restricted Transactional Memory */
-#define X86_FEATURE_CQM		( 9*32+12) /* Cache QoS Monitoring */
-#define X86_FEATURE_MPX		( 9*32+14) /* Memory Protection Extension */
-#define X86_FEATURE_AVX512F	( 9*32+16) /* AVX-512 Foundation */
-#define X86_FEATURE_RDSEED	( 9*32+18) /* The RDSEED instruction */
-#define X86_FEATURE_ADX		( 9*32+19) /* The ADCX and ADOX instructions */
-#define X86_FEATURE_SMAP	( 9*32+20) /* Supervisor Mode Access Prevention */
-#define X86_FEATURE_PCOMMIT	( 9*32+22) /* PCOMMIT instruction */
-#define X86_FEATURE_CLFLUSHOPT	( 9*32+23) /* CLFLUSHOPT instruction */
-#define X86_FEATURE_CLWB	( 9*32+24) /* CLWB instruction */
-#define X86_FEATURE_AVX512PF	( 9*32+26) /* AVX-512 Prefetch */
-#define X86_FEATURE_AVX512ER	( 9*32+27) /* AVX-512 Exponential and Reciprocal */
-#define X86_FEATURE_AVX512CD	( 9*32+28) /* AVX-512 Conflict Detection */
-#define X86_FEATURE_SHA_NI	( 9*32+29) /* SHA1/SHA256 Instruction Extensions */
-
-/* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */
-#define X86_FEATURE_XSAVEOPT	(10*32+ 0) /* XSAVEOPT */
-#define X86_FEATURE_XSAVEC	(10*32+ 1) /* XSAVEC */
-#define X86_FEATURE_XGETBV1	(10*32+ 2) /* XGETBV with ECX = 1 */
-#define X86_FEATURE_XSAVES	(10*32+ 3) /* XSAVES/XRSTORS */
-
-/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:0 (edx), word 11 */
-#define X86_FEATURE_CQM_LLC	(11*32+ 1) /* LLC QoS if 1 */
-
-/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (edx), word 12 */
-#define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring if 1 */
-
-/* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
-#define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
-
-/* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
-#define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
-#define X86_FEATURE_IDA		(14*32+ 1) /* Intel Dynamic Acceleration */
-#define X86_FEATURE_ARAT	(14*32+ 2) /* Always Running APIC Timer */
-#define X86_FEATURE_PLN		(14*32+ 4) /* Intel Power Limit Notification */
-#define X86_FEATURE_PTS		(14*32+ 6) /* Intel Package Thermal Status */
-#define X86_FEATURE_HWP		(14*32+ 7) /* Intel Hardware P-states */
-#define X86_FEATURE_HWP_NOTIFY	(14*32+ 8) /* HWP Notification */
-#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
-#define X86_FEATURE_HWP_EPP	(14*32+10) /* HWP Energy Perf. Preference */
-#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
-
-/* AMD SVM Feature Identification, CPUID level 0x8000000a (edx), word 15 */
-#define X86_FEATURE_NPT		(15*32+ 0) /* Nested Page Table support */
-#define X86_FEATURE_LBRV	(15*32+ 1) /* LBR Virtualization support */
-#define X86_FEATURE_SVML	(15*32+ 2) /* "svm_lock" SVM locking MSR */
-#define X86_FEATURE_NRIPS	(15*32+ 3) /* "nrip_save" SVM next_rip save */
-#define X86_FEATURE_TSCRATEMSR  (15*32+ 4) /* "tsc_scale" TSC scaling support */
-#define X86_FEATURE_VMCBCLEAN   (15*32+ 5) /* "vmcb_clean" VMCB clean bits support */
-#define X86_FEATURE_FLUSHBYASID (15*32+ 6) /* flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS (15*32+ 7) /* Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
-
-/*
- * BUG word(s)
- */
-#define X86_BUG(x)		(NCAPINTS*32 + (x))
-
-#define X86_BUG_F00F		X86_BUG(0) /* Intel F00F */
-#define X86_BUG_FDIV		X86_BUG(1) /* FPU FDIV */
-#define X86_BUG_COMA		X86_BUG(2) /* Cyrix 6x86 coma */
-#define X86_BUG_AMD_TLB_MMATCH	X86_BUG(3) /* "tlb_mmatch" AMD Erratum 383 */
-#define X86_BUG_AMD_APIC_C1E	X86_BUG(4) /* "apic_c1e" AMD Erratum 400 */
-#define X86_BUG_11AP		X86_BUG(5) /* Bad local APIC aka 11AP */
-#define X86_BUG_FXSAVE_LEAK	X86_BUG(6) /* FXSAVE leaks FOP/FIP/FOP */
-#define X86_BUG_CLFLUSH_MONITOR	X86_BUG(7) /* AAI65, CLFLUSH required before MONITOR */
-#define X86_BUG_SYSRET_SS_ATTRS	X86_BUG(8) /* SYSRET doesn't fix up SS attrs */
-#define X86_BUG_CPU_MELTDOWN	X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */
-#define X86_BUG_SPECTRE_V1	X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditional branches */
-#define X86_BUG_SPECTRE_V2	X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirect branches */
+#include <asm/processor.h>
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
new file mode 100644
index 0000000000000..255ea74c52e8f
--- /dev/null
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -0,0 +1,297 @@
+#ifndef _ASM_X86_CPUFEATURES_H
+#define _ASM_X86_CPUFEATURES_H
+
+#ifndef _ASM_X86_REQUIRED_FEATURES_H
+#include <asm/required-features.h>
+#endif
+
+#ifndef _ASM_X86_DISABLED_FEATURES_H
+#include <asm/disabled-features.h>
+#endif
+
+/*
+ * Defines x86 CPU feature bits
+ */
+#define NCAPINTS	16	/* N 32-bit words worth of info */
+#define NBUGINTS	1	/* N 32-bit bug flags */
+
+/*
+ * Note: If the comment begins with a quoted string, that string is used
+ * in /proc/cpuinfo instead of the macro name.  If the string is "",
+ * this feature bit is not displayed in /proc/cpuinfo at all.
+ */
+
+/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
+#define X86_FEATURE_FPU		( 0*32+ 0) /* Onboard FPU */
+#define X86_FEATURE_VME		( 0*32+ 1) /* Virtual Mode Extensions */
+#define X86_FEATURE_DE		( 0*32+ 2) /* Debugging Extensions */
+#define X86_FEATURE_PSE		( 0*32+ 3) /* Page Size Extensions */
+#define X86_FEATURE_TSC		( 0*32+ 4) /* Time Stamp Counter */
+#define X86_FEATURE_MSR		( 0*32+ 5) /* Model-Specific Registers */
+#define X86_FEATURE_PAE		( 0*32+ 6) /* Physical Address Extensions */
+#define X86_FEATURE_MCE		( 0*32+ 7) /* Machine Check Exception */
+#define X86_FEATURE_CX8		( 0*32+ 8) /* CMPXCHG8 instruction */
+#define X86_FEATURE_APIC	( 0*32+ 9) /* Onboard APIC */
+#define X86_FEATURE_SEP		( 0*32+11) /* SYSENTER/SYSEXIT */
+#define X86_FEATURE_MTRR	( 0*32+12) /* Memory Type Range Registers */
+#define X86_FEATURE_PGE		( 0*32+13) /* Page Global Enable */
+#define X86_FEATURE_MCA		( 0*32+14) /* Machine Check Architecture */
+#define X86_FEATURE_CMOV	( 0*32+15) /* CMOV instructions */
+					  /* (plus FCMOVcc, FCOMI with FPU) */
+#define X86_FEATURE_PAT		( 0*32+16) /* Page Attribute Table */
+#define X86_FEATURE_PSE36	( 0*32+17) /* 36-bit PSEs */
+#define X86_FEATURE_PN		( 0*32+18) /* Processor serial number */
+#define X86_FEATURE_CLFLUSH	( 0*32+19) /* CLFLUSH instruction */
+#define X86_FEATURE_DS		( 0*32+21) /* "dts" Debug Store */
+#define X86_FEATURE_ACPI	( 0*32+22) /* ACPI via MSR */
+#define X86_FEATURE_MMX		( 0*32+23) /* Multimedia Extensions */
+#define X86_FEATURE_FXSR	( 0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
+#define X86_FEATURE_XMM		( 0*32+25) /* "sse" */
+#define X86_FEATURE_XMM2	( 0*32+26) /* "sse2" */
+#define X86_FEATURE_SELFSNOOP	( 0*32+27) /* "ss" CPU self snoop */
+#define X86_FEATURE_HT		( 0*32+28) /* Hyper-Threading */
+#define X86_FEATURE_ACC		( 0*32+29) /* "tm" Automatic clock control */
+#define X86_FEATURE_IA64	( 0*32+30) /* IA-64 processor */
+#define X86_FEATURE_PBE		( 0*32+31) /* Pending Break Enable */
+
+/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
+/* Don't duplicate feature flags which are redundant with Intel! */
+#define X86_FEATURE_SYSCALL	( 1*32+11) /* SYSCALL/SYSRET */
+#define X86_FEATURE_MP		( 1*32+19) /* MP Capable. */
+#define X86_FEATURE_NX		( 1*32+20) /* Execute Disable */
+#define X86_FEATURE_MMXEXT	( 1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_FXSR_OPT	( 1*32+25) /* FXSAVE/FXRSTOR optimizations */
+#define X86_FEATURE_GBPAGES	( 1*32+26) /* "pdpe1gb" GB pages */
+#define X86_FEATURE_RDTSCP	( 1*32+27) /* RDTSCP */
+#define X86_FEATURE_LM		( 1*32+29) /* Long Mode (x86-64) */
+#define X86_FEATURE_3DNOWEXT	( 1*32+30) /* AMD 3DNow! extensions */
+#define X86_FEATURE_3DNOW	( 1*32+31) /* 3DNow! */
+
+/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
+#define X86_FEATURE_RECOVERY	( 2*32+ 0) /* CPU in recovery mode */
+#define X86_FEATURE_LONGRUN	( 2*32+ 1) /* Longrun power control */
+#define X86_FEATURE_LRTI	( 2*32+ 3) /* LongRun table interface */
+
+/* Other features, Linux-defined mapping, word 3 */
+/* This range is used for feature bits which conflict or are synthesized */
+#define X86_FEATURE_CXMMX	( 3*32+ 0) /* Cyrix MMX extensions */
+#define X86_FEATURE_K6_MTRR	( 3*32+ 1) /* AMD K6 nonstandard MTRRs */
+#define X86_FEATURE_CYRIX_ARR	( 3*32+ 2) /* Cyrix ARRs (= MTRRs) */
+#define X86_FEATURE_CENTAUR_MCR	( 3*32+ 3) /* Centaur MCRs (= MTRRs) */
+/* cpu types for specific tunings: */
+#define X86_FEATURE_K8		( 3*32+ 4) /* "" Opteron, Athlon64 */
+#define X86_FEATURE_K7		( 3*32+ 5) /* "" Athlon */
+#define X86_FEATURE_P3		( 3*32+ 6) /* "" P3 */
+#define X86_FEATURE_P4		( 3*32+ 7) /* "" P4 */
+#define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* TSC ticks at a constant rate */
+#define X86_FEATURE_UP		( 3*32+ 9) /* smp kernel running on up */
+/* free, was #define X86_FEATURE_FXSAVE_LEAK ( 3*32+10) * "" FXSAVE leaks FOP/FIP/FOP */
+#define X86_FEATURE_ARCH_PERFMON ( 3*32+11) /* Intel Architectural PerfMon */
+#define X86_FEATURE_PEBS	( 3*32+12) /* Precise-Event Based Sampling */
+#define X86_FEATURE_BTS		( 3*32+13) /* Branch Trace Store */
+#define X86_FEATURE_SYSCALL32	( 3*32+14) /* "" syscall in ia32 userspace */
+#define X86_FEATURE_SYSENTER32	( 3*32+15) /* "" sysenter in ia32 userspace */
+#define X86_FEATURE_REP_GOOD	( 3*32+16) /* rep microcode works well */
+#define X86_FEATURE_MFENCE_RDTSC ( 3*32+17) /* "" Mfence synchronizes RDTSC */
+#define X86_FEATURE_LFENCE_RDTSC ( 3*32+18) /* "" Lfence synchronizes RDTSC */
+/* free, was #define X86_FEATURE_11AP	( 3*32+19) * "" Bad local APIC aka 11AP */
+#define X86_FEATURE_NOPL	( 3*32+20) /* The NOPL (0F 1F) instructions */
+#define X86_FEATURE_ALWAYS	( 3*32+21) /* "" Always-present feature */
+#define X86_FEATURE_XTOPOLOGY	( 3*32+22) /* cpu topology enum extensions */
+#define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */
+#define X86_FEATURE_NONSTOP_TSC	( 3*32+24) /* TSC does not stop in C states */
+/* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */
+#define X86_FEATURE_EXTD_APICID	( 3*32+26) /* has extended APICID (8 bits) */
+#define X86_FEATURE_AMD_DCM     ( 3*32+27) /* multi-node processor */
+#define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */
+/* free, was #define X86_FEATURE_EAGER_FPU	( 3*32+29) * "eagerfpu" Non lazy FPU restore */
+#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */
+
+/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
+#define X86_FEATURE_XMM3	( 4*32+ 0) /* "pni" SSE-3 */
+#define X86_FEATURE_PCLMULQDQ	( 4*32+ 1) /* PCLMULQDQ instruction */
+#define X86_FEATURE_DTES64	( 4*32+ 2) /* 64-bit Debug Store */
+#define X86_FEATURE_MWAIT	( 4*32+ 3) /* "monitor" Monitor/Mwait support */
+#define X86_FEATURE_DSCPL	( 4*32+ 4) /* "ds_cpl" CPL Qual. Debug Store */
+#define X86_FEATURE_VMX		( 4*32+ 5) /* Hardware virtualization */
+#define X86_FEATURE_SMX		( 4*32+ 6) /* Safer mode */
+#define X86_FEATURE_EST		( 4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2		( 4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_SSSE3	( 4*32+ 9) /* Supplemental SSE-3 */
+#define X86_FEATURE_CID		( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG	( 4*32+11) /* Silicon Debug */
+#define X86_FEATURE_FMA		( 4*32+12) /* Fused multiply-add */
+#define X86_FEATURE_CX16	( 4*32+13) /* CMPXCHG16B */
+#define X86_FEATURE_XTPR	( 4*32+14) /* Send Task Priority Messages */
+#define X86_FEATURE_PDCM	( 4*32+15) /* Performance Capabilities */
+#define X86_FEATURE_PCID	( 4*32+17) /* Process Context Identifiers */
+#define X86_FEATURE_DCA		( 4*32+18) /* Direct Cache Access */
+#define X86_FEATURE_XMM4_1	( 4*32+19) /* "sse4_1" SSE-4.1 */
+#define X86_FEATURE_XMM4_2	( 4*32+20) /* "sse4_2" SSE-4.2 */
+#define X86_FEATURE_X2APIC	( 4*32+21) /* x2APIC */
+#define X86_FEATURE_MOVBE	( 4*32+22) /* MOVBE instruction */
+#define X86_FEATURE_POPCNT      ( 4*32+23) /* POPCNT instruction */
+#define X86_FEATURE_TSC_DEADLINE_TIMER	( 4*32+24) /* Tsc deadline timer */
+#define X86_FEATURE_AES		( 4*32+25) /* AES instructions */
+#define X86_FEATURE_XSAVE	( 4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
+#define X86_FEATURE_OSXSAVE	( 4*32+27) /* "" XSAVE enabled in the OS */
+#define X86_FEATURE_AVX		( 4*32+28) /* Advanced Vector Extensions */
+#define X86_FEATURE_F16C	( 4*32+29) /* 16-bit fp conversions */
+#define X86_FEATURE_RDRAND	( 4*32+30) /* The RDRAND instruction */
+#define X86_FEATURE_HYPERVISOR	( 4*32+31) /* Running on a hypervisor */
+
+/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+#define X86_FEATURE_XSTORE	( 5*32+ 2) /* "rng" RNG present (xstore) */
+#define X86_FEATURE_XSTORE_EN	( 5*32+ 3) /* "rng_en" RNG enabled */
+#define X86_FEATURE_XCRYPT	( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
+#define X86_FEATURE_XCRYPT_EN	( 5*32+ 7) /* "ace_en" on-CPU crypto enabled */
+#define X86_FEATURE_ACE2	( 5*32+ 8) /* Advanced Cryptography Engine v2 */
+#define X86_FEATURE_ACE2_EN	( 5*32+ 9) /* ACE v2 enabled */
+#define X86_FEATURE_PHE		( 5*32+10) /* PadLock Hash Engine */
+#define X86_FEATURE_PHE_EN	( 5*32+11) /* PHE enabled */
+#define X86_FEATURE_PMM		( 5*32+12) /* PadLock Montgomery Multiplier */
+#define X86_FEATURE_PMM_EN	( 5*32+13) /* PMM enabled */
+
+/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
+#define X86_FEATURE_LAHF_LM	( 6*32+ 0) /* LAHF/SAHF in long mode */
+#define X86_FEATURE_CMP_LEGACY	( 6*32+ 1) /* If yes HyperThreading not valid */
+#define X86_FEATURE_SVM		( 6*32+ 2) /* Secure virtual machine */
+#define X86_FEATURE_EXTAPIC	( 6*32+ 3) /* Extended APIC space */
+#define X86_FEATURE_CR8_LEGACY	( 6*32+ 4) /* CR8 in 32-bit mode */
+#define X86_FEATURE_ABM		( 6*32+ 5) /* Advanced bit manipulation */
+#define X86_FEATURE_SSE4A	( 6*32+ 6) /* SSE-4A */
+#define X86_FEATURE_MISALIGNSSE ( 6*32+ 7) /* Misaligned SSE mode */
+#define X86_FEATURE_3DNOWPREFETCH ( 6*32+ 8) /* 3DNow prefetch instructions */
+#define X86_FEATURE_OSVW	( 6*32+ 9) /* OS Visible Workaround */
+#define X86_FEATURE_IBS		( 6*32+10) /* Instruction Based Sampling */
+#define X86_FEATURE_XOP		( 6*32+11) /* extended AVX instructions */
+#define X86_FEATURE_SKINIT	( 6*32+12) /* SKINIT/STGI instructions */
+#define X86_FEATURE_WDT		( 6*32+13) /* Watchdog timer */
+#define X86_FEATURE_LWP		( 6*32+15) /* Light Weight Profiling */
+#define X86_FEATURE_FMA4	( 6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE		( 6*32+17) /* translation cache extension */
+#define X86_FEATURE_NODEID_MSR	( 6*32+19) /* NodeId MSR */
+#define X86_FEATURE_TBM		( 6*32+21) /* trailing bit manipulations */
+#define X86_FEATURE_TOPOEXT	( 6*32+22) /* topology extensions CPUID leafs */
+#define X86_FEATURE_PERFCTR_CORE ( 6*32+23) /* core performance counter extensions */
+#define X86_FEATURE_PERFCTR_NB  ( 6*32+24) /* NB performance counter extensions */
+#define X86_FEATURE_BPEXT	(6*32+26) /* data breakpoint extension */
+#define X86_FEATURE_PERFCTR_L2	( 6*32+28) /* L2 performance counter extensions */
+#define X86_FEATURE_MWAITX	( 6*32+29) /* MWAIT extension (MONITORX/MWAITX) */
+
+/*
+ * Auxiliary flags: Linux defined - For features scattered in various
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
+ */
+
+#define X86_FEATURE_CPB		( 7*32+ 2) /* AMD Core Performance Boost */
+#define X86_FEATURE_EPB		( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
+#define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 4) /* Effectively INVPCID && CR4.PCIDE=1 */
+
+#define X86_FEATURE_HW_PSTATE	( 7*32+ 8) /* AMD HW-PState */
+#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
+
+#define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
+#define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* Fill RSB on context switches */
+
+#define X86_FEATURE_RETPOLINE	( 7*32+29) /* Generic Retpoline mitigation for Spectre variant 2 */
+#define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* AMD Retpoline mitigation for Spectre variant 2 */
+/* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
+#define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
+
+/* Virtualization flags: Linux defined, word 8 */
+#define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
+#define X86_FEATURE_VNMI        ( 8*32+ 1) /* Intel Virtual NMI */
+#define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
+#define X86_FEATURE_EPT         ( 8*32+ 3) /* Intel Extended Page Table */
+#define X86_FEATURE_VPID        ( 8*32+ 4) /* Intel Virtual Processor ID */
+
+#define X86_FEATURE_VMMCALL     ( 8*32+15) /* Prefer vmmcall to vmcall */
+#define X86_FEATURE_XENPV       ( 8*32+16) /* "" Xen paravirtual guest */
+
+
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
+#define X86_FEATURE_FSGSBASE	( 9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
+#define X86_FEATURE_TSC_ADJUST	( 9*32+ 1) /* TSC adjustment MSR 0x3b */
+#define X86_FEATURE_BMI1	( 9*32+ 3) /* 1st group bit manipulation extensions */
+#define X86_FEATURE_HLE		( 9*32+ 4) /* Hardware Lock Elision */
+#define X86_FEATURE_AVX2	( 9*32+ 5) /* AVX2 instructions */
+#define X86_FEATURE_SMEP	( 9*32+ 7) /* Supervisor Mode Execution Protection */
+#define X86_FEATURE_BMI2	( 9*32+ 8) /* 2nd group bit manipulation extensions */
+#define X86_FEATURE_ERMS	( 9*32+ 9) /* Enhanced REP MOVSB/STOSB */
+#define X86_FEATURE_INVPCID	( 9*32+10) /* Invalidate Processor Context ID */
+#define X86_FEATURE_RTM		( 9*32+11) /* Restricted Transactional Memory */
+#define X86_FEATURE_CQM		( 9*32+12) /* Cache QoS Monitoring */
+#define X86_FEATURE_MPX		( 9*32+14) /* Memory Protection Extension */
+#define X86_FEATURE_AVX512F	( 9*32+16) /* AVX-512 Foundation */
+#define X86_FEATURE_RDSEED	( 9*32+18) /* The RDSEED instruction */
+#define X86_FEATURE_ADX		( 9*32+19) /* The ADCX and ADOX instructions */
+#define X86_FEATURE_SMAP	( 9*32+20) /* Supervisor Mode Access Prevention */
+#define X86_FEATURE_PCOMMIT	( 9*32+22) /* PCOMMIT instruction */
+#define X86_FEATURE_CLFLUSHOPT	( 9*32+23) /* CLFLUSHOPT instruction */
+#define X86_FEATURE_CLWB	( 9*32+24) /* CLWB instruction */
+#define X86_FEATURE_AVX512PF	( 9*32+26) /* AVX-512 Prefetch */
+#define X86_FEATURE_AVX512ER	( 9*32+27) /* AVX-512 Exponential and Reciprocal */
+#define X86_FEATURE_AVX512CD	( 9*32+28) /* AVX-512 Conflict Detection */
+#define X86_FEATURE_SHA_NI	( 9*32+29) /* SHA1/SHA256 Instruction Extensions */
+
+/* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */
+#define X86_FEATURE_XSAVEOPT	(10*32+ 0) /* XSAVEOPT */
+#define X86_FEATURE_XSAVEC	(10*32+ 1) /* XSAVEC */
+#define X86_FEATURE_XGETBV1	(10*32+ 2) /* XGETBV with ECX = 1 */
+#define X86_FEATURE_XSAVES	(10*32+ 3) /* XSAVES/XRSTORS */
+
+/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:0 (edx), word 11 */
+#define X86_FEATURE_CQM_LLC	(11*32+ 1) /* LLC QoS if 1 */
+
+/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (edx), word 12 */
+#define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring if 1 */
+
+/* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
+#define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
+
+/* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
+#define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA		(14*32+ 1) /* Intel Dynamic Acceleration */
+#define X86_FEATURE_ARAT	(14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN		(14*32+ 4) /* Intel Power Limit Notification */
+#define X86_FEATURE_PTS		(14*32+ 6) /* Intel Package Thermal Status */
+#define X86_FEATURE_HWP		(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY	(14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP	(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 0x8000000a (edx), word 15 */
+#define X86_FEATURE_NPT		(15*32+ 0) /* Nested Page Table support */
+#define X86_FEATURE_LBRV	(15*32+ 1) /* LBR Virtualization support */
+#define X86_FEATURE_SVML	(15*32+ 2) /* "svm_lock" SVM locking MSR */
+#define X86_FEATURE_NRIPS	(15*32+ 3) /* "nrip_save" SVM next_rip save */
+#define X86_FEATURE_TSCRATEMSR  (15*32+ 4) /* "tsc_scale" TSC scaling support */
+#define X86_FEATURE_VMCBCLEAN   (15*32+ 5) /* "vmcb_clean" VMCB clean bits support */
+#define X86_FEATURE_FLUSHBYASID (15*32+ 6) /* flush-by-ASID support */
+#define X86_FEATURE_DECODEASSISTS (15*32+ 7) /* Decode Assists support */
+#define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
+#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
+
+/*
+ * BUG word(s)
+ */
+#define X86_BUG(x)		(NCAPINTS*32 + (x))
+
+#define X86_BUG_F00F		X86_BUG(0) /* Intel F00F */
+#define X86_BUG_FDIV		X86_BUG(1) /* FPU FDIV */
+#define X86_BUG_COMA		X86_BUG(2) /* Cyrix 6x86 coma */
+#define X86_BUG_AMD_TLB_MMATCH	X86_BUG(3) /* "tlb_mmatch" AMD Erratum 383 */
+#define X86_BUG_AMD_APIC_C1E	X86_BUG(4) /* "apic_c1e" AMD Erratum 400 */
+#define X86_BUG_11AP		X86_BUG(5) /* Bad local APIC aka 11AP */
+#define X86_BUG_FXSAVE_LEAK	X86_BUG(6) /* FXSAVE leaks FOP/FIP/FOP */
+#define X86_BUG_CLFLUSH_MONITOR	X86_BUG(7) /* AAI65, CLFLUSH required before MONITOR */
+#define X86_BUG_SYSRET_SS_ATTRS	X86_BUG(8) /* SYSRET doesn't fix up SS attrs */
+#define X86_BUG_CPU_MELTDOWN	X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */
+#define X86_BUG_SPECTRE_V1	X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditional branches */
+#define X86_BUG_SPECTRE_V2	X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirect branches */
+
+#endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 60c984ab526a3..94e7570b1e1c1 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -17,6 +17,7 @@
 #include <asm/user.h>
 #include <asm/fpu/api.h>
 #include <asm/fpu/xstate.h>
+#include <asm/cpufeature.h>
 
 /*
  * High level FPU state handling functions:
diff --git a/arch/x86/include/asm/irq_work.h b/arch/x86/include/asm/irq_work.h
index 78162f8e248bd..d0afb05c84fc1 100644
--- a/arch/x86/include/asm/irq_work.h
+++ b/arch/x86/include/asm/irq_work.h
@@ -1,7 +1,7 @@
 #ifndef _ASM_IRQ_WORK_H
 #define _ASM_IRQ_WORK_H
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 
 static inline bool arch_irq_work_has_interrupt(void)
 {
diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
index c70689b5e5aa4..0deeb2d26df7c 100644
--- a/arch/x86/include/asm/mwait.h
+++ b/arch/x86/include/asm/mwait.h
@@ -3,6 +3,8 @@
 
 #include <linux/sched.h>
 
+#include <asm/cpufeature.h>
+
 #define MWAIT_SUBSTATE_MASK		0xf
 #define MWAIT_CSTATE_MASK		0xf
 #define MWAIT_SUBSTATE_SIZE		4
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 249f1c769f21f..8b910416243ce 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -5,7 +5,7 @@
 
 #include <asm/alternative.h>
 #include <asm/alternative-asm.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 
 /*
  * Fill the CPU return stack buffer.
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 9e77cea2a8efb..8e415cf654574 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -13,7 +13,7 @@ struct vm86;
 #include <asm/types.h>
 #include <uapi/asm/sigcontext.h>
 #include <asm/current.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/page.h>
 #include <asm/pgtable_types.h>
 #include <asm/percpu.h>
@@ -24,7 +24,6 @@ struct vm86;
 #include <asm/fpu/types.h>
 
 #include <linux/personality.h>
-#include <linux/cpumask.h>
 #include <linux/cache.h>
 #include <linux/threads.h>
 #include <linux/math64.h>
diff --git a/arch/x86/include/asm/smap.h b/arch/x86/include/asm/smap.h
index ba665ebd17bb8..db333300bd4be 100644
--- a/arch/x86/include/asm/smap.h
+++ b/arch/x86/include/asm/smap.h
@@ -15,7 +15,7 @@
 
 #include <linux/stringify.h>
 #include <asm/nops.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 
 /* "Raw" instruction opcodes */
 #define __ASM_CLAC	.byte 0x0f,0x01,0xca
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index a438c5598a905..04d6eef5f8a5c 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -16,7 +16,6 @@
 #endif
 #include <asm/thread_info.h>
 #include <asm/cpumask.h>
-#include <asm/cpufeature.h>
 
 extern int smp_num_siblings;
 extern unsigned int num_processors;
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 0c977fc124a77..030c53dcb2ed7 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -49,7 +49,7 @@
  */
 #ifndef __ASSEMBLY__
 struct task_struct;
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <linux/atomic.h>
 
 struct thread_info {
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index a691b66cc40ac..e2a89d2577fb6 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -5,6 +5,7 @@
 #include <linux/sched.h>
 
 #include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/special_insns.h>
 #include <asm/smp.h>
 
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 2957c8237c28d..ec9d2bcc8c249 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -8,7 +8,7 @@
 #include <linux/errno.h>
 #include <linux/lockdep.h>
 #include <asm/alternative.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/page.h>
 
 /*
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 606ebe494756c..1e5184092ee6a 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -66,7 +66,7 @@ ifdef CONFIG_X86_FEATURE_NAMES
 quiet_cmd_mkcapflags = MKCAP   $@
       cmd_mkcapflags = $(CONFIG_SHELL) $(srctree)/$(src)/mkcapflags.sh $< $@
 
-cpufeature = $(src)/../../include/asm/cpufeature.h
+cpufeature = $(src)/../../include/asm/cpufeatures.h
 
 targets += capflags.c
 $(obj)/capflags.c: $(cpufeature) $(src)/mkcapflags.sh FORCE
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index ae20be6e483c7..6608c03c21267 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -1,7 +1,7 @@
 #include <linux/bitops.h>
 #include <linux/kernel.h>
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/e820.h>
 #include <asm/mtrr.h>
 #include <asm/msr.h>
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index aaf152e796373..15e47c1cd4126 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -8,6 +8,7 @@
 #include <linux/timer.h>
 #include <asm/pci-direct.h>
 #include <asm/tsc.h>
+#include <asm/cpufeature.h>
 
 #include "cpu.h"
 
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 565648bc1a0ae..9299e3bdfad6b 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -8,7 +8,7 @@
 #include <linux/module.h>
 #include <linux/uaccess.h>
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/pgtable.h>
 #include <asm/msr.h>
 #include <asm/bugs.h>
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 3fa72317ad784..3557b3ceab147 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -14,7 +14,7 @@
 #include <linux/sysfs.h>
 #include <linux/pci.h>
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/amd_nb.h>
 #include <asm/smp.h>
 
diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c
index afa9f0d487ea0..fbb5e90557a52 100644
--- a/arch/x86/kernel/cpu/match.c
+++ b/arch/x86/kernel/cpu/match.c
@@ -1,5 +1,5 @@
 #include <asm/cpu_device_id.h>
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <linux/cpu.h>
 #include <linux/module.h>
 #include <linux/slab.h>
diff --git a/arch/x86/kernel/cpu/mkcapflags.sh b/arch/x86/kernel/cpu/mkcapflags.sh
index 3f20710a5b23b..6988c74409a82 100644
--- a/arch/x86/kernel/cpu/mkcapflags.sh
+++ b/arch/x86/kernel/cpu/mkcapflags.sh
@@ -1,6 +1,6 @@
 #!/bin/sh
 #
-# Generate the x86_cap/bug_flags[] arrays from include/asm/cpufeature.h
+# Generate the x86_cap/bug_flags[] arrays from include/asm/cpufeatures.h
 #
 
 IN=$1
@@ -49,8 +49,8 @@ dump_array()
 trap 'rm "$OUT"' EXIT
 
 (
-	echo "#ifndef _ASM_X86_CPUFEATURE_H"
-	echo "#include <asm/cpufeature.h>"
+	echo "#ifndef _ASM_X86_CPUFEATURES_H"
+	echo "#include <asm/cpufeatures.h>"
 	echo "#endif"
 	echo ""
 
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index f924f41af89a9..49bd700d9b7f5 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -47,7 +47,7 @@
 #include <linux/smp.h>
 #include <linux/syscore_ops.h>
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/e820.h>
 #include <asm/mtrr.h>
 #include <asm/msr.h>
diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 252da7aceca67..a19a663282b57 100644
--- a/arch/x86/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
@@ -1,6 +1,6 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/msr.h>
 #include "cpu.h"
 
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 52a2526c3fbe4..19bc19d5e1741 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -24,6 +24,7 @@
 #include <asm/e820.h>
 #include <asm/proto.h>
 #include <asm/setup.h>
+#include <asm/cpufeature.h>
 
 /*
  * The e820 map is the map that gets modified e.g. with command line parameters
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 70284d38fdc26..1c0b49fd63654 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -19,7 +19,7 @@
 #include <asm/setup.h>
 #include <asm/processor-flags.h>
 #include <asm/msr-index.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/percpu.h>
 #include <asm/nops.h>
 #include <asm/bootparam.h>
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index f48eb8eeefe2b..3fdc1e53aaac7 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -12,6 +12,7 @@
 #include <linux/pm.h>
 #include <linux/io.h>
 
+#include <asm/cpufeature.h>
 #include <asm/irqdomain.h>
 #include <asm/fixmap.h>
 #include <asm/hpet.h>
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 113e70784854f..f95ac5d435aa0 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -40,7 +40,7 @@
 #include <linux/uaccess.h>
 #include <linux/gfp.h>
 
-#include <asm/processor.h>
+#include <asm/cpufeature.h>
 #include <asm/msr.h>
 
 static struct class *msr_class;
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index 4cf401f581e7e..b7c9db5deebe5 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -30,7 +30,7 @@
  * 	appropriately. Either display a message or halt.
  */
 
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/msr-index.h>
 
 verify_cpu:
diff --git a/arch/x86/lib/clear_page_64.S b/arch/x86/lib/clear_page_64.S
index a2fe51b00ccef..65be7cfaf9472 100644
--- a/arch/x86/lib/clear_page_64.S
+++ b/arch/x86/lib/clear_page_64.S
@@ -1,5 +1,5 @@
 #include <linux/linkage.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 /*
diff --git a/arch/x86/lib/copy_page_64.S b/arch/x86/lib/copy_page_64.S
index 009f98216b7eb..24ef1c2104d42 100644
--- a/arch/x86/lib/copy_page_64.S
+++ b/arch/x86/lib/copy_page_64.S
@@ -1,7 +1,7 @@
 /* Written 2003 by Andi Kleen, based on a kernel by Evandro Menezes */
 
 #include <linux/linkage.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 /*
diff --git a/arch/x86/lib/copy_user_64.S b/arch/x86/lib/copy_user_64.S
index 423644c230e76..accf7f2f557f3 100644
--- a/arch/x86/lib/copy_user_64.S
+++ b/arch/x86/lib/copy_user_64.S
@@ -10,7 +10,7 @@
 #include <asm/current.h>
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 #include <asm/asm.h>
 #include <asm/smap.h>
diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
index 16698bba87deb..a0de849435ad6 100644
--- a/arch/x86/lib/memcpy_64.S
+++ b/arch/x86/lib/memcpy_64.S
@@ -1,7 +1,7 @@
 /* Copyright 2002 Andi Kleen */
 
 #include <linux/linkage.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 /*
diff --git a/arch/x86/lib/memmove_64.S b/arch/x86/lib/memmove_64.S
index ca2afdd6d98ed..90ce01bee00c1 100644
--- a/arch/x86/lib/memmove_64.S
+++ b/arch/x86/lib/memmove_64.S
@@ -6,7 +6,7 @@
  *	- Copyright 2011 Fenghua Yu <fenghua.yu@intel.com>
  */
 #include <linux/linkage.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 #undef memmove
diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S
index 2661fad058271..c9c81227ea37d 100644
--- a/arch/x86/lib/memset_64.S
+++ b/arch/x86/lib/memset_64.S
@@ -1,7 +1,7 @@
 /* Copyright 2002 Andi Kleen, SuSE Labs */
 
 #include <linux/linkage.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 
 .weak memset
diff --git a/arch/x86/lib/retpoline.S b/arch/x86/lib/retpoline.S
index 3d06b482ebc7e..7bbb853e36bd4 100644
--- a/arch/x86/lib/retpoline.S
+++ b/arch/x86/lib/retpoline.S
@@ -3,7 +3,7 @@
 #include <linux/stringify.h>
 #include <linux/linkage.h>
 #include <asm/dwarf2.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/alternative-asm.h>
 #include <asm-generic/export.h>
 #include <asm/nospec-branch.h>
diff --git a/arch/x86/mm/setup_nx.c b/arch/x86/mm/setup_nx.c
index 92e2eacb33216..f65a33f505b68 100644
--- a/arch/x86/mm/setup_nx.c
+++ b/arch/x86/mm/setup_nx.c
@@ -4,6 +4,7 @@
 
 #include <asm/pgtable.h>
 #include <asm/proto.h>
+#include <asm/cpufeature.h>
 
 static int disable_nx;
 
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 50d86c0e9ba49..660a83c8287b6 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -24,7 +24,6 @@
 #include <asm/nmi.h>
 #include <asm/apic.h>
 #include <asm/processor.h>
-#include <asm/cpufeature.h>
 
 #include "op_x86_model.h"
 #include "op_counter.h"
diff --git a/arch/x86/um/asm/barrier.h b/arch/x86/um/asm/barrier.h
index 755481f14d90f..764ac2fc53fe8 100644
--- a/arch/x86/um/asm/barrier.h
+++ b/arch/x86/um/asm/barrier.h
@@ -3,7 +3,7 @@
 
 #include <asm/asm.h>
 #include <asm/segment.h>
-#include <asm/cpufeature.h>
+#include <asm/cpufeatures.h>
 #include <asm/cmpxchg.h>
 #include <asm/nops.h>
 
diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c
index d51e25aa5f1d1..de67fea3cf46c 100644
--- a/lib/atomic64_test.c
+++ b/lib/atomic64_test.c
@@ -17,7 +17,7 @@
 #include <linux/atomic.h>
 
 #ifdef CONFIG_X86
-#include <asm/processor.h>	/* for boot_cpu_has below */
+#include <asm/cpufeature.h>	/* for boot_cpu_has below */
 #endif
 
 #define TEST(bit, op, c_op, val)				\

From 33161c1d05c2e4a47b4af33c5633411cfd8aedea Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:27:01 -0700
Subject: [PATCH 0925/1852] x86/cpufeature: Replace the old static_cpu_has()
 with safe variant

commit bc696ca05f5a8927329ec276a892341e006b00ba upstream

So the old one didn't work properly before alternatives had run.
And it was supposed to provide an optimized JMP because the
assumption was that the offset it is jumping to is within a
signed byte and thus a two-byte JMP.

So I did an x86_64 allyesconfig build and dumped all possible
sites where static_cpu_has() was used. The optimization amounted
to all in all 12(!) places where static_cpu_has() had generated
a 2-byte JMP. Which has saved us a whopping 36 bytes!

This clearly is not worth the trouble so we can remove it. The
only place where the optimization might count - in __switch_to()
- we will handle differently. But that's not subject of this
patch.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1453842730-28463-6-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/Kconfig.debug               |  10 ---
 arch/x86/include/asm/cpufeature.h    | 100 ++-------------------------
 arch/x86/include/asm/fpu/internal.h  |  12 ++--
 arch/x86/kernel/apic/apic_numachip.c |   4 +-
 arch/x86/kernel/cpu/common.c         |  12 +---
 arch/x86/kernel/vm86_32.c            |   2 +-
 fs/btrfs/disk-io.c                   |   2 +-
 7 files changed, 19 insertions(+), 123 deletions(-)

diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index e5031f46c443d..3cb8e179f2f23 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -355,16 +355,6 @@ config DEBUG_IMR_SELFTEST
 
 	  If unsure say N here.
 
-config X86_DEBUG_STATIC_CPU_HAS
-	bool "Debug alternatives"
-	depends on DEBUG_KERNEL
-	---help---
-	  This option causes additional code to be generated which
-	  fails if static_cpu_has() is used before alternatives have
-	  run.
-
-	  If unsure, say N.
-
 config X86_DEBUG_FPU
 	bool "Debug the x86 FPU code"
 	depends on DEBUG_KERNEL
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index f62e872e670e7..b60598cd8d6a1 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -127,103 +127,19 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 #define cpu_has_osxsave		boot_cpu_has(X86_FEATURE_OSXSAVE)
 #define cpu_has_hypervisor	boot_cpu_has(X86_FEATURE_HYPERVISOR)
 /*
- * Do not add any more of those clumsy macros - use static_cpu_has_safe() for
+ * Do not add any more of those clumsy macros - use static_cpu_has() for
  * fast paths and boot_cpu_has() otherwise!
  */
 
 #if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
-extern void warn_pre_alternatives(void);
-extern bool __static_cpu_has_safe(u16 bit);
+extern bool __static_cpu_has(u16 bit);
 
 /*
  * Static testing of CPU features.  Used the same as boot_cpu_has().
  * These are only valid after alternatives have run, but will statically
  * patch the target code for additional performance.
  */
-static __always_inline __pure bool __static_cpu_has(u16 bit)
-{
-#ifdef CC_HAVE_ASM_GOTO
-
-#ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS
-
-		/*
-		 * Catch too early usage of this before alternatives
-		 * have run.
-		 */
-		asm_volatile_goto("1: jmp %l[t_warn]\n"
-			 "2:\n"
-			 ".section .altinstructions,\"a\"\n"
-			 " .long 1b - .\n"
-			 " .long 0\n"		/* no replacement */
-			 " .word %P0\n"		/* 1: do replace */
-			 " .byte 2b - 1b\n"	/* source len */
-			 " .byte 0\n"		/* replacement len */
-			 " .byte 0\n"		/* pad len */
-			 ".previous\n"
-			 /* skipping size check since replacement size = 0 */
-			 : : "i" (X86_FEATURE_ALWAYS) : : t_warn);
-
-#endif
-
-		asm_volatile_goto("1: jmp %l[t_no]\n"
-			 "2:\n"
-			 ".section .altinstructions,\"a\"\n"
-			 " .long 1b - .\n"
-			 " .long 0\n"		/* no replacement */
-			 " .word %P0\n"		/* feature bit */
-			 " .byte 2b - 1b\n"	/* source len */
-			 " .byte 0\n"		/* replacement len */
-			 " .byte 0\n"		/* pad len */
-			 ".previous\n"
-			 /* skipping size check since replacement size = 0 */
-			 : : "i" (bit) : : t_no);
-		return true;
-	t_no:
-		return false;
-
-#ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS
-	t_warn:
-		warn_pre_alternatives();
-		return false;
-#endif
-
-#else /* CC_HAVE_ASM_GOTO */
-
-		u8 flag;
-		/* Open-coded due to __stringify() in ALTERNATIVE() */
-		asm volatile("1: movb $0,%0\n"
-			     "2:\n"
-			     ".section .altinstructions,\"a\"\n"
-			     " .long 1b - .\n"
-			     " .long 3f - .\n"
-			     " .word %P1\n"		/* feature bit */
-			     " .byte 2b - 1b\n"		/* source len */
-			     " .byte 4f - 3f\n"		/* replacement len */
-			     " .byte 0\n"		/* pad len */
-			     ".previous\n"
-			     ".section .discard,\"aw\",@progbits\n"
-			     " .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check */
-			     ".previous\n"
-			     ".section .altinstr_replacement,\"ax\"\n"
-			     "3: movb $1,%0\n"
-			     "4:\n"
-			     ".previous\n"
-			     : "=qm" (flag) : "i" (bit));
-		return flag;
-
-#endif /* CC_HAVE_ASM_GOTO */
-}
-
-#define static_cpu_has(bit)					\
-(								\
-	__builtin_constant_p(boot_cpu_has(bit)) ?		\
-		boot_cpu_has(bit) :				\
-	__builtin_constant_p(bit) ?				\
-		__static_cpu_has(bit) :				\
-		boot_cpu_has(bit)				\
-)
-
-static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
+static __always_inline __pure bool _static_cpu_has(u16 bit)
 {
 #ifdef CC_HAVE_ASM_GOTO
 		asm_volatile_goto("1: jmp %l[t_dynamic]\n"
@@ -257,7 +173,7 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
 	t_no:
 		return false;
 	t_dynamic:
-		return __static_cpu_has_safe(bit);
+		return __static_cpu_has(bit);
 #else
 		u8 flag;
 		/* Open-coded due to __stringify() in ALTERNATIVE() */
@@ -295,22 +211,21 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
 			     ".previous\n"
 			     : "=qm" (flag)
 			     : "i" (bit), "i" (X86_FEATURE_ALWAYS));
-		return (flag == 2 ? __static_cpu_has_safe(bit) : flag);
+		return (flag == 2 ? __static_cpu_has(bit) : flag);
 #endif /* CC_HAVE_ASM_GOTO */
 }
 
-#define static_cpu_has_safe(bit)				\
+#define static_cpu_has(bit)					\
 (								\
 	__builtin_constant_p(boot_cpu_has(bit)) ?		\
 		boot_cpu_has(bit) :				\
-		_static_cpu_has_safe(bit)			\
+		_static_cpu_has(bit)				\
 )
 #else
 /*
  * gcc 3.x is too stupid to do the static test; fall back to dynamic.
  */
 #define static_cpu_has(bit)		boot_cpu_has(bit)
-#define static_cpu_has_safe(bit)	boot_cpu_has(bit)
 #endif
 
 #define cpu_has_bug(c, bit)		cpu_has(c, (bit))
@@ -318,7 +233,6 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
 #define clear_cpu_bug(c, bit)		clear_cpu_cap(c, (bit))
 
 #define static_cpu_has_bug(bit)		static_cpu_has((bit))
-#define static_cpu_has_bug_safe(bit)	static_cpu_has_safe((bit))
 #define boot_cpu_has_bug(bit)		cpu_has_bug(&boot_cpu_data, (bit))
 
 #define MAX_CPU_FEATURES		(NCAPINTS * 32)
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 94e7570b1e1c1..ec2aedb6f92a5 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -64,17 +64,17 @@ static __always_inline __pure bool use_eager_fpu(void)
 
 static __always_inline __pure bool use_xsaveopt(void)
 {
-	return static_cpu_has_safe(X86_FEATURE_XSAVEOPT);
+	return static_cpu_has(X86_FEATURE_XSAVEOPT);
 }
 
 static __always_inline __pure bool use_xsave(void)
 {
-	return static_cpu_has_safe(X86_FEATURE_XSAVE);
+	return static_cpu_has(X86_FEATURE_XSAVE);
 }
 
 static __always_inline __pure bool use_fxsr(void)
 {
-	return static_cpu_has_safe(X86_FEATURE_FXSR);
+	return static_cpu_has(X86_FEATURE_FXSR);
 }
 
 /*
@@ -301,7 +301,7 @@ static inline void copy_xregs_to_kernel_booting(struct xregs_state *xstate)
 
 	WARN_ON(system_state != SYSTEM_BOOTING);
 
-	if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+	if (static_cpu_has(X86_FEATURE_XSAVES))
 		XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
 	else
 		XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
@@ -323,7 +323,7 @@ static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)
 
 	WARN_ON(system_state != SYSTEM_BOOTING);
 
-	if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+	if (static_cpu_has(X86_FEATURE_XSAVES))
 		XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 	else
 		XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
@@ -461,7 +461,7 @@ static inline void copy_kernel_to_fpregs(union fpregs_state *fpstate)
 	 * pending. Clear the x87 state here by setting it to fixed values.
 	 * "m" is a random variable that should be in L1.
 	 */
-	if (unlikely(static_cpu_has_bug_safe(X86_BUG_FXSAVE_LEAK))) {
+	if (unlikely(static_cpu_has_bug(X86_BUG_FXSAVE_LEAK))) {
 		asm volatile(
 			"fnclex\n\t"
 			"emms\n\t"
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 2bd2292a316d4..bac0805ea1d9d 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -30,7 +30,7 @@ static unsigned int numachip1_get_apic_id(unsigned long x)
 	unsigned long value;
 	unsigned int id = (x >> 24) & 0xff;
 
-	if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) {
+	if (static_cpu_has(X86_FEATURE_NODEID_MSR)) {
 		rdmsrl(MSR_FAM10H_NODE_ID, value);
 		id |= (value << 2) & 0xff00;
 	}
@@ -178,7 +178,7 @@ static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
 	this_cpu_write(cpu_llc_id, node);
 
 	/* Account for nodes per socket in multi-core-module processors */
-	if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) {
+	if (static_cpu_has(X86_FEATURE_NODEID_MSR)) {
 		rdmsrl(MSR_FAM10H_NODE_ID, val);
 		nodes = ((val >> 3) & 7) + 1;
 	}
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 5b6e43b4c3290..f31b26befca1a 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1576,19 +1576,11 @@ void cpu_init(void)
 }
 #endif
 
-#ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS
-void warn_pre_alternatives(void)
-{
-	WARN(1, "You're using static_cpu_has before alternatives have run!\n");
-}
-EXPORT_SYMBOL_GPL(warn_pre_alternatives);
-#endif
-
-inline bool __static_cpu_has_safe(u16 bit)
+inline bool __static_cpu_has(u16 bit)
 {
 	return boot_cpu_has(bit);
 }
-EXPORT_SYMBOL_GPL(__static_cpu_has_safe);
+EXPORT_SYMBOL_GPL(__static_cpu_has);
 
 static void bsp_resume(void)
 {
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index d6d64a5195591..7f4839ef3608b 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -358,7 +358,7 @@ static long do_sys_vm86(struct vm86plus_struct __user *user_vm86, bool plus)
 	/* make room for real-mode segments */
 	tsk->thread.sp0 += 16;
 
-	if (static_cpu_has_safe(X86_FEATURE_SEP))
+	if (static_cpu_has(X86_FEATURE_SEP))
 		tsk->thread.sysenter_cs = 0;
 
 	load_sp0(tss, &tsk->thread);
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 7efd70bfeaf78..d106b981d86f7 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -923,7 +923,7 @@ static int check_async_write(struct inode *inode, unsigned long bio_flags)
 	if (bio_flags & EXTENT_BIO_TREE_LOG)
 		return 0;
 #ifdef CONFIG_X86
-	if (static_cpu_has_safe(X86_FEATURE_XMM4_2))
+	if (static_cpu_has(X86_FEATURE_XMM4_2))
 		return 0;
 #endif
 	return 1;

From 06913d093bf899729231b1e6b76efc3c255b0e75 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@alien8.de>
Date: Sat, 14 Jul 2018 02:27:10 -0700
Subject: [PATCH 0926/1852] x86/cpufeature: Get rid of the non-asm goto variant

commit a362bf9f5e7dd659b96d01382da7b855f4e5a7a1 upstream

I can simply quote hpa from the mail:

  "Get rid of the non-asm goto variant and just fall back to
   dynamic if asm goto is unavailable. It doesn't make any sense,
   really, if it is supposed to be safe, and by now the asm
   goto-capable gcc is in more wide use. (Originally the gcc 3.x
   fallback to pure dynamic didn't exist, either.)"

Booy, am I lazy.

Cleanup the whole CC_HAVE_ASM_GOTO ifdeffery too, while at it.

Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160127084325.GB30712@pd.tnic
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 49 ++++---------------------------
 1 file changed, 5 insertions(+), 44 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index b60598cd8d6a1..53de4615e6ba5 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -131,17 +131,16 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
+#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern bool __static_cpu_has(u16 bit);
 
 /*
  * Static testing of CPU features.  Used the same as boot_cpu_has().
- * These are only valid after alternatives have run, but will statically
- * patch the target code for additional performance.
+ * These will statically patch the target code for additional
+ * performance.
  */
 static __always_inline __pure bool _static_cpu_has(u16 bit)
 {
-#ifdef CC_HAVE_ASM_GOTO
 		asm_volatile_goto("1: jmp %l[t_dynamic]\n"
 			 "2:\n"
 			 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
@@ -174,45 +173,6 @@ static __always_inline __pure bool _static_cpu_has(u16 bit)
 		return false;
 	t_dynamic:
 		return __static_cpu_has(bit);
-#else
-		u8 flag;
-		/* Open-coded due to __stringify() in ALTERNATIVE() */
-		asm volatile("1: movb $2,%0\n"
-			     "2:\n"
-			     ".section .altinstructions,\"a\"\n"
-			     " .long 1b - .\n"		/* src offset */
-			     " .long 3f - .\n"		/* repl offset */
-			     " .word %P2\n"		/* always replace */
-			     " .byte 2b - 1b\n"		/* source len */
-			     " .byte 4f - 3f\n"		/* replacement len */
-			     " .byte 0\n"		/* pad len */
-			     ".previous\n"
-			     ".section .discard,\"aw\",@progbits\n"
-			     " .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check */
-			     ".previous\n"
-			     ".section .altinstr_replacement,\"ax\"\n"
-			     "3: movb $0,%0\n"
-			     "4:\n"
-			     ".previous\n"
-			     ".section .altinstructions,\"a\"\n"
-			     " .long 1b - .\n"		/* src offset */
-			     " .long 5f - .\n"		/* repl offset */
-			     " .word %P1\n"		/* feature bit */
-			     " .byte 4b - 3b\n"		/* src len */
-			     " .byte 6f - 5f\n"		/* repl len */
-			     " .byte 0\n"		/* pad len */
-			     ".previous\n"
-			     ".section .discard,\"aw\",@progbits\n"
-			     " .byte 0xff + (6f-5f) - (4b-3b)\n" /* size check */
-			     ".previous\n"
-			     ".section .altinstr_replacement,\"ax\"\n"
-			     "5: movb $1,%0\n"
-			     "6:\n"
-			     ".previous\n"
-			     : "=qm" (flag)
-			     : "i" (bit), "i" (X86_FEATURE_ALWAYS));
-		return (flag == 2 ? __static_cpu_has(bit) : flag);
-#endif /* CC_HAVE_ASM_GOTO */
 }
 
 #define static_cpu_has(bit)					\
@@ -223,7 +183,8 @@ static __always_inline __pure bool _static_cpu_has(u16 bit)
 )
 #else
 /*
- * gcc 3.x is too stupid to do the static test; fall back to dynamic.
+ * Fall back to dynamic for gcc versions which don't support asm goto. Should be
+ * a minority now anyway.
  */
 #define static_cpu_has(bit)		boot_cpu_has(bit)
 #endif

From 8cd5d17cac358e1e6e57118948bbc25f1aee6b1a Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:27:19 -0700
Subject: [PATCH 0927/1852] x86/alternatives: Add an auxilary section

commit 337e4cc84021212a87b04b77b65cccc49304909e upstream

Add .altinstr_aux for additional instructions which will be used
before and/or during patching. All stuff which needs more
sophisticated patching should go there. See next patch.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1453842730-28463-8-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/vmlinux.lds.S | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 31355fb1a2ccb..3611136b1455c 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -200,6 +200,17 @@ SECTIONS
 	:init
 #endif
 
+	/*
+	 * Section for code used exclusively before alternatives are run. All
+	 * references to such code must be patched out by alternatives, normally
+	 * by using X86_FEATURE_ALWAYS CPU feature bit.
+	 *
+	 * See static_cpu_has() for an example.
+	 */
+	.altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
+		*(.altinstr_aux)
+	}
+
 	INIT_DATA_SECTION(16)
 
 	.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {

From 95e2cff5782f8859719ac4f6cc7a815e7202e707 Mon Sep 17 00:00:00 2001
From: Brian Gerst <brgerst@gmail.com>
Date: Sat, 14 Jul 2018 02:27:28 -0700
Subject: [PATCH 0928/1852] x86/alternatives: Discard dynamic check after init

commit 2476f2fa20568bd5d9e09cd35bcd73e99a6f4cc6 upstream

Move the code to do the dynamic check to the altinstr_aux
section so that it is discarded after alternatives have run and
a static branch has been chosen.

This way we're changing the dynamic branch from C code to
assembly, which makes it *substantially* smaller while avoiding
a completely unnecessary call to an out of line function.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
[ Changed it to do TESTB, as hpa suggested. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kristen Carlson Accardi <kristen@linux.intel.com>
Cc: Laura Abbott <labbott@fedoraproject.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1452972124-7380-1-git-send-email-brgerst@gmail.com
Link: http://lkml.kernel.org/r/20160127084525.GC30712@pd.tnic
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 19 ++++++++++++-------
 arch/x86/kernel/cpu/common.c      |  6 ------
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 53de4615e6ba5..1c9d6c5d6d8c6 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -132,8 +132,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  */
 
 #if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
-extern bool __static_cpu_has(u16 bit);
-
 /*
  * Static testing of CPU features.  Used the same as boot_cpu_has().
  * These will statically patch the target code for additional
@@ -141,7 +139,7 @@ extern bool __static_cpu_has(u16 bit);
  */
 static __always_inline __pure bool _static_cpu_has(u16 bit)
 {
-		asm_volatile_goto("1: jmp %l[t_dynamic]\n"
+		asm_volatile_goto("1: jmp 6f\n"
 			 "2:\n"
 			 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
 			         "((5f-4f) - (2b-1b)),0x90\n"
@@ -166,13 +164,20 @@ static __always_inline __pure bool _static_cpu_has(u16 bit)
 			 " .byte 0\n"			/* repl len */
 			 " .byte 0\n"			/* pad len */
 			 ".previous\n"
-			 : : "i" (bit), "i" (X86_FEATURE_ALWAYS)
-			 : : t_dynamic, t_no);
+			 ".section .altinstr_aux,\"ax\"\n"
+			 "6:\n"
+			 " testb %[bitnum],%[cap_byte]\n"
+			 " jnz %l[t_yes]\n"
+			 " jmp %l[t_no]\n"
+			 ".previous\n"
+			 : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
+			     [bitnum] "i" (1 << (bit & 7)),
+			     [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
+			 : : t_yes, t_no);
+	t_yes:
 		return true;
 	t_no:
 		return false;
-	t_dynamic:
-		return __static_cpu_has(bit);
 }
 
 #define static_cpu_has(bit)					\
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index f31b26befca1a..58d56c44d1d80 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1576,12 +1576,6 @@ void cpu_init(void)
 }
 #endif
 
-inline bool __static_cpu_has(u16 bit)
-{
-	return boot_cpu_has(bit);
-}
-EXPORT_SYMBOL_GPL(__static_cpu_has);
-
 static void bsp_resume(void)
 {
 	if (this_cpu->c_bsp_resume)

From 8d9a9febf1f760360441ae296dec09bd85030ec7 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:27:37 -0700
Subject: [PATCH 0929/1852] x86/vdso: Use static_cpu_has()

commit 8c725306993198f845038dc9e45a1267099867a6 upstream

... and simplify and speed up a tad.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1453842730-28463-10-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/entry/vdso/vma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c
index 5471ac3621476..6b46648588d88 100644
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -255,7 +255,7 @@ static void vgetcpu_cpu_init(void *arg)
 #ifdef CONFIG_NUMA
 	node = cpu_to_node(cpu);
 #endif
-	if (cpu_has(&cpu_data(cpu), X86_FEATURE_RDTSCP))
+	if (static_cpu_has(X86_FEATURE_RDTSCP))
 		write_rdtscp_aux((node << 12) | cpu);
 
 	/*

From 3ffe4b9a515288e9cf025b0589a67b4454d170be Mon Sep 17 00:00:00 2001
From: Alexander Kuleshov <kuleshovmail@gmail.com>
Date: Sat, 14 Jul 2018 02:27:46 -0700
Subject: [PATCH 0930/1852] x86/boot: Simplify kernel load address alignment
 check

commit a4733143085d6c782ac1e6c85778655b6bac1d4e upstream

We are using %rax as temporary register to check the kernel
address alignment. We don't really have to since the TEST
instruction does not clobber the destination operand.

Suggested-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Alexander Kuleshov <kuleshovmail@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1453531828-19291-1-git-send-email-kuleshovmail@gmail.com
Link: http://lkml.kernel.org/r/1453842730-28463-11-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/head_64.S | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 4034e905741a9..734ba1d0f6868 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -76,9 +76,7 @@ startup_64:
 	subq	$_text - __START_KERNEL_map, %rbp
 
 	/* Is the address not 2M aligned? */
-	movq	%rbp, %rax
-	andl	$~PMD_PAGE_MASK, %eax
-	testl	%eax, %eax
+	testl	$~PMD_PAGE_MASK, %ebp
 	jnz	bad_address
 
 	/*

From cf62120c2bd4eed02f0645dac96d7a5ba24765e6 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:27:55 -0700
Subject: [PATCH 0931/1852] x86/cpufeature: Speed up cpu_feature_enabled()

commit f2cc8e0791c70833758101d9756609a08dd601ec upstream

When GCC cannot do constant folding for this macro, it falls back to
cpu_has(). But static_cpu_has() is optimal and it works at all times
now. So use it and speedup the fallback case.

Before we had this:

  mov    0x99d674(%rip),%rdx        # ffffffff81b0d9f4 <boot_cpu_data+0x34>
  shr    $0x2e,%rdx
  and    $0x1,%edx
  jne    ffffffff811704e9 <do_munmap+0x3f9>

After alternatives patching, it turns into:

		  jmp    0xffffffff81170390
		  nopl   (%rax)
		  ...
		  callq  ffffffff81056e00 <mpx_notify_unmap>
ffffffff81170390: mov    0x170(%r12),%rdi

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1455578358-28347-1-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 1c9d6c5d6d8c6..03ca602821b28 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -88,8 +88,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * is not relevant.
  */
 #define cpu_feature_enabled(bit)	\
-	(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 :	\
-	 cpu_has(&boot_cpu_data, bit))
+	(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
 
 #define boot_cpu_has(bit)	cpu_has(&boot_cpu_data, bit)
 

From b42a4bf24e16e7dcf90080c0ba273947919091e4 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:04 -0700
Subject: [PATCH 0932/1852] x86/cpufeature, x86/mm/pkeys: Add protection keys
 related CPUID definitions

commit dfb4a70f20c5b3880da56ee4c9484bdb4e8f1e65 upstream

There are two CPUID bits for protection keys.  One is for whether
the CPU contains the feature, and the other will appear set once
the OS enables protection keys.  Specifically:

	Bit 04: OSPKE. If 1, OS has set CR4.PKE to enable
	Protection keys (and the RDPKRU/WRPKRU instructions)

This is because userspace can not see CR4 contents, but it can
see CPUID contents.

X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:

	CPUID.(EAX=07H,ECX=0H):ECX.PKU [bit 3]

X86_FEATURE_OSPKE is "OSPKU":

	CPUID.(EAX=07H,ECX=0H):ECX.OSPKE [bit 4]

These are the first CPU features which need to look at the
ECX word in CPUID leaf 0x7, so this patch also includes
fetching that word in to the cpuinfo->x86_capability[] array.

Add it to the disabled-features mask when its config option is
off.  Even though we are not using it here, we also extend the
REQUIRED_MASK_BIT_SET() macro to keep it mirroring the
DISABLED_MASK_BIT_SET() version.

This means that in almost all code, you should use:

	cpu_has(c, X86_FEATURE_PKU)

and *not* the CONFIG option.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210201.7714C250@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h        | 59 ++++++++++++++++--------
 arch/x86/include/asm/cpufeatures.h       |  2 +-
 arch/x86/include/asm/disabled-features.h | 15 ++++++
 arch/x86/include/asm/required-features.h |  7 +++
 arch/x86/kernel/cpu/common.c             |  1 +
 5 files changed, 63 insertions(+), 21 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 03ca602821b28..7fdd7170ac449 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -26,6 +26,7 @@ enum cpuid_leafs
 	CPUID_8000_0008_EBX,
 	CPUID_6_EAX,
 	CPUID_8000_000A_EDX,
+	CPUID_7_ECX,
 };
 
 #ifdef CONFIG_X86_FEATURE_NAMES
@@ -48,28 +49,42 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	 test_bit(bit, (unsigned long *)((c)->x86_capability))
 
 #define REQUIRED_MASK_BIT_SET(bit)					\
-	 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) ||	\
-	   (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) ||	\
-	   (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) ||	\
-	   (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) ||	\
-	   (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) ||	\
-	   (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) ||	\
-	   (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ||	\
-	   (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ||	\
-	   (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8)) ||	\
-	   (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9)) )
+	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & REQUIRED_MASK0 )) ||	\
+	   (((bit)>>5)==1  && (1UL<<((bit)&31) & REQUIRED_MASK1 )) ||	\
+	   (((bit)>>5)==2  && (1UL<<((bit)&31) & REQUIRED_MASK2 )) ||	\
+	   (((bit)>>5)==3  && (1UL<<((bit)&31) & REQUIRED_MASK3 )) ||	\
+	   (((bit)>>5)==4  && (1UL<<((bit)&31) & REQUIRED_MASK4 )) ||	\
+	   (((bit)>>5)==5  && (1UL<<((bit)&31) & REQUIRED_MASK5 )) ||	\
+	   (((bit)>>5)==6  && (1UL<<((bit)&31) & REQUIRED_MASK6 )) ||	\
+	   (((bit)>>5)==7  && (1UL<<((bit)&31) & REQUIRED_MASK7 )) ||	\
+	   (((bit)>>5)==8  && (1UL<<((bit)&31) & REQUIRED_MASK8 )) ||	\
+	   (((bit)>>5)==9  && (1UL<<((bit)&31) & REQUIRED_MASK9 )) ||	\
+	   (((bit)>>5)==10 && (1UL<<((bit)&31) & REQUIRED_MASK10)) ||	\
+	   (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) ||	\
+	   (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
+	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
 
 #define DISABLED_MASK_BIT_SET(bit)					\
-	 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & DISABLED_MASK0)) ||	\
-	   (((bit)>>5)==1 && (1UL<<((bit)&31) & DISABLED_MASK1)) ||	\
-	   (((bit)>>5)==2 && (1UL<<((bit)&31) & DISABLED_MASK2)) ||	\
-	   (((bit)>>5)==3 && (1UL<<((bit)&31) & DISABLED_MASK3)) ||	\
-	   (((bit)>>5)==4 && (1UL<<((bit)&31) & DISABLED_MASK4)) ||	\
-	   (((bit)>>5)==5 && (1UL<<((bit)&31) & DISABLED_MASK5)) ||	\
-	   (((bit)>>5)==6 && (1UL<<((bit)&31) & DISABLED_MASK6)) ||	\
-	   (((bit)>>5)==7 && (1UL<<((bit)&31) & DISABLED_MASK7)) ||	\
-	   (((bit)>>5)==8 && (1UL<<((bit)&31) & DISABLED_MASK8)) ||	\
-	   (((bit)>>5)==9 && (1UL<<((bit)&31) & DISABLED_MASK9)) )
+	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) ||	\
+	   (((bit)>>5)==1  && (1UL<<((bit)&31) & DISABLED_MASK1 )) ||	\
+	   (((bit)>>5)==2  && (1UL<<((bit)&31) & DISABLED_MASK2 )) ||	\
+	   (((bit)>>5)==3  && (1UL<<((bit)&31) & DISABLED_MASK3 )) ||	\
+	   (((bit)>>5)==4  && (1UL<<((bit)&31) & DISABLED_MASK4 )) ||	\
+	   (((bit)>>5)==5  && (1UL<<((bit)&31) & DISABLED_MASK5 )) ||	\
+	   (((bit)>>5)==6  && (1UL<<((bit)&31) & DISABLED_MASK6 )) ||	\
+	   (((bit)>>5)==7  && (1UL<<((bit)&31) & DISABLED_MASK7 )) ||	\
+	   (((bit)>>5)==8  && (1UL<<((bit)&31) & DISABLED_MASK8 )) ||	\
+	   (((bit)>>5)==9  && (1UL<<((bit)&31) & DISABLED_MASK9 )) ||	\
+	   (((bit)>>5)==10 && (1UL<<((bit)&31) & DISABLED_MASK10)) ||	\
+	   (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) ||	\
+	   (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
+	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
+	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
 
 #define cpu_has(c, bit)							\
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
@@ -79,6 +94,10 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : 	\
 	 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
 
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
+#define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
+#define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
+
 /*
  * This macro is for detection of features which need kernel
  * infrastructure to be used.  It may *not* directly test the CPU
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 255ea74c52e8f..6ebb4c2dad843 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -12,7 +12,7 @@
 /*
  * Defines x86 CPU feature bits
  */
-#define NCAPINTS	16	/* N 32-bit words worth of info */
+#define NCAPINTS	17	/* N 32-bit words worth of info */
 #define NBUGINTS	1	/* N 32-bit bug flags */
 
 /*
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 8b17c2ad1048f..522a069c9abd2 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -30,6 +30,14 @@
 # define DISABLE_PCID		(1<<(X86_FEATURE_PCID & 31))
 #endif /* CONFIG_X86_64 */
 
+#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
+# define DISABLE_PKU		(1<<(X86_FEATURE_PKU))
+# define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE))
+#else
+# define DISABLE_PKU		0
+# define DISABLE_OSPKE		0
+#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
+
 /*
  * Make sure to add features to the correct mask
  */
@@ -43,5 +51,12 @@
 #define DISABLED_MASK7	0
 #define DISABLED_MASK8	0
 #define DISABLED_MASK9	(DISABLE_MPX)
+#define DISABLED_MASK10	0
+#define DISABLED_MASK11	0
+#define DISABLED_MASK12	0
+#define DISABLED_MASK13	0
+#define DISABLED_MASK14	0
+#define DISABLED_MASK15	0
+#define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE)
 
 #endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index 5c6e4fb370f5a..4916144e3c426 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -92,5 +92,12 @@
 #define REQUIRED_MASK7	0
 #define REQUIRED_MASK8	0
 #define REQUIRED_MASK9	0
+#define REQUIRED_MASK10	0
+#define REQUIRED_MASK11	0
+#define REQUIRED_MASK12	0
+#define REQUIRED_MASK13	0
+#define REQUIRED_MASK14	0
+#define REQUIRED_MASK15	0
+#define REQUIRED_MASK16	0
 
 #endif /* _ASM_X86_REQUIRED_FEATURES_H */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 58d56c44d1d80..d6a7b6f214d40 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -693,6 +693,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		c->x86_capability[CPUID_7_0_EBX] = ebx;
 
 		c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006);
+		c->x86_capability[CPUID_7_ECX] = ecx;
 	}
 
 	/* Extended state features: level 0x0000000d */

From 17a7243caaa1080cfac1453f80603590f51c70b2 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:13 -0700
Subject: [PATCH 0933/1852] x86/mm/pkeys: Fix mismerge of protection keys CPUID
 bits

commit 0d47638f80a02b15869f1fe1fc09e5bf996750fd upstream

Kirill Shutemov pointed this out to me.

The tip tree currently has commit:

	dfb4a70f2 [x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions]

whioch added support for two new CPUID bits: X86_FEATURE_PKU and
X86_FEATURE_OSPKE.  But, those bits were mis-merged and put in
cpufeature.h instead of cpufeatures.h.

This didn't cause any breakage *except* it keeps the "ospke" and
"pku" bits from showing up in cpuinfo.

Now cpuinfo has the two new flags:

	flags	: ...  pku ospke

BTW, is it really wise to have cpufeature.h and cpufeatures.h?
It seems like they can only cause confusion and mahem with tab
completion.

Reported-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Dave Hansen <dave@sr71.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160310221213.06F9DB53@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h  | 4 ----
 arch/x86/include/asm/cpufeatures.h | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 7fdd7170ac449..b953fb74aba66 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -94,10 +94,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : 	\
 	 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
 
-/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
-#define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
-#define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
-
 /*
  * This macro is for detection of features which need kernel
  * infrastructure to be used.  It may *not* directly test the CPU
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 6ebb4c2dad843..f19b9010764ff 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -276,6 +276,10 @@
 #define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
 #define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
 
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
+#define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
+#define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
+
 /*
  * BUG word(s)
  */

From 6ff55989294ee9391706a2dd729533923dad7515 Mon Sep 17 00:00:00 2001
From: Yazen Ghannam <Yazen.Ghannam@amd.com>
Date: Sat, 14 Jul 2018 02:28:21 -0700
Subject: [PATCH 0934/1852] x86/cpu: Add detection of AMD RAS Capabilities

commit 71faad43060d3d2040583635fbf7d1bdb3d04118 upstream

Add a new CPUID leaf to hold the contents of CPUID 0x80000007_EBX (RasCap).

Define bits that are currently in use:

 Bit 0: McaOverflowRecov
 Bit 1: SUCCOR
 Bit 3: ScalableMca

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
[ Shorten comment. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462971509-3856-5-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h  |  1 +
 arch/x86/include/asm/cpufeatures.h |  7 ++++++-
 arch/x86/kernel/cpu/common.c       | 10 +++++++---
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index b953fb74aba66..1d02ad682b20d 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -27,6 +27,7 @@ enum cpuid_leafs
 	CPUID_6_EAX,
 	CPUID_8000_000A_EDX,
 	CPUID_7_ECX,
+	CPUID_8000_0007_EBX,
 };
 
 #ifdef CONFIG_X86_FEATURE_NAMES
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f19b9010764ff..205ce70c1d6c9 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -12,7 +12,7 @@
 /*
  * Defines x86 CPU feature bits
  */
-#define NCAPINTS	17	/* N 32-bit words worth of info */
+#define NCAPINTS	18	/* N 32-bit words worth of info */
 #define NBUGINTS	1	/* N 32-bit bug flags */
 
 /*
@@ -280,6 +280,11 @@
 #define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
 #define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
 
+/* AMD-defined CPU features, CPUID level 0x80000007 (ebx), word 17 */
+#define X86_FEATURE_OVERFLOW_RECOV (17*32+0) /* MCA overflow recovery support */
+#define X86_FEATURE_SUCCOR	(17*32+1) /* Uncorrectable error containment and recovery */
+#define X86_FEATURE_SMCA	(17*32+3) /* Scalable MCA */
+
 /*
  * BUG word(s)
  */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d6a7b6f214d40..814276d0eed19 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -741,6 +741,13 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		}
 	}
 
+	if (c->extended_cpuid_level >= 0x80000007) {
+		cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
+
+		c->x86_capability[CPUID_8000_0007_EBX] = ebx;
+		c->x86_power = edx;
+	}
+
 	if (c->extended_cpuid_level >= 0x80000008) {
 		cpuid(0x80000008, &eax, &ebx, &ecx, &edx);
 
@@ -753,9 +760,6 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		c->x86_phys_bits = 36;
 #endif
 
-	if (c->extended_cpuid_level >= 0x80000007)
-		c->x86_power = cpuid_edx(0x80000007);
-
 	if (c->extended_cpuid_level >= 0x8000000a)
 		c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a);
 

From 70486fa63bbb3306e264a58c2e2a12718bf379e8 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:30 -0700
Subject: [PATCH 0935/1852] x86/cpufeature, x86/mm/pkeys: Fix broken
 compile-time disabling of pkeys

commit e8df1a95b685af84a81698199ee206e0e66a8b44 upstream

When I added support for the Memory Protection Keys processor
feature, I had to reindent the REQUIRED/DISABLED_MASK macros, and
also consult the later cpufeature words.

I'm not quite sure how I bungled it, but I consulted the wrong
word at the end.  This only affected required or disabled cpu
features in cpufeature words 14, 15 and 16.  So, only Protection
Keys itself was screwed over here.

The result was that if you disabled pkeys in your .config, you
might still see some code show up that should have been compiled
out.  There should be no functional problems, though.

In verifying this patch I also realized that the DISABLE_PKU/OSPKE
macros were defined backwards and that the cpu_has() check in
setup_pku() was not doing the compile-time disabled checks.

So also fix the macro for DISABLE_PKU/OSPKE and add a compile-time
check for pkeys being enabled in setup_pku().

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: <stable@vger.kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Fixes: dfb4a70f20c5 ("x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions")
Link: http://lkml.kernel.org/r/20160513221328.C200930B@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h        | 12 ++++++------
 arch/x86/include/asm/disabled-features.h |  6 +++---
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 1d02ad682b20d..aa7785ec34038 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -64,9 +64,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) ||	\
 	   (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) ||	\
 	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
-	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
+	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
+	   (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
+	   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
 
 #define DISABLED_MASK_BIT_SET(bit)					\
 	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) ||	\
@@ -83,9 +83,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) ||	\
 	   (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) ||	\
 	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
-	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
+	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
+	   (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
+	   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
 
 #define cpu_has(c, bit)							\
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 522a069c9abd2..0403b224a9444 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -31,11 +31,11 @@
 #endif /* CONFIG_X86_64 */
 
 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
-# define DISABLE_PKU		(1<<(X86_FEATURE_PKU))
-# define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE))
-#else
 # define DISABLE_PKU		0
 # define DISABLE_OSPKE		0
+#else
+# define DISABLE_PKU		(1<<(X86_FEATURE_PKU & 31))
+# define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE & 31))
 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
 
 /*

From 925aeccfafaa0cdac7e5a9b24d82742a93746712 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:40 -0700
Subject: [PATCH 0936/1852] x86/cpufeature: Update cpufeaure macros

commit 6e17cb9c2d5efd8fcc3934e983733302b9912ff8 upstream

We had a new CPUID "NCAPINT" word added, but the REQUIRED_MASK and
DISABLED_MASK macros did not get updated.  Update them.

None of the features was needed in these masks, so there was no
harm, but we should keep them updated anyway.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160629200107.8D3C9A31@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h        | 6 ++++--
 arch/x86/include/asm/disabled-features.h | 1 +
 arch/x86/include/asm/required-features.h | 1 +
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index aa7785ec34038..c7e38daae4f43 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -66,7 +66,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) ||	\
 	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
 	   (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
-	   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
+	   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) ||	\
+	   (((bit)>>5)==17 && (1UL<<((bit)&31) & REQUIRED_MASK17)))
 
 #define DISABLED_MASK_BIT_SET(bit)					\
 	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) ||	\
@@ -85,7 +86,8 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) ||	\
 	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
 	   (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
-	   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
+	   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) ||	\
+	   (((bit)>>5)==17 && (1UL<<((bit)&31) & DISABLED_MASK17)))
 
 #define cpu_has(c, bit)							\
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 0403b224a9444..ab6b05ccb3f9f 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -58,5 +58,6 @@
 #define DISABLED_MASK14	0
 #define DISABLED_MASK15	0
 #define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE)
+#define DISABLED_MASK17	0
 
 #endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index 4916144e3c426..fad4277d582e9 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -99,5 +99,6 @@
 #define REQUIRED_MASK14	0
 #define REQUIRED_MASK15	0
 #define REQUIRED_MASK16	0
+#define REQUIRED_MASK17	0
 
 #endif /* _ASM_X86_REQUIRED_FEATURES_H */

From cf061330e20a94e785aed67d0beee55cdb590200 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:49 -0700
Subject: [PATCH 0937/1852] x86/cpufeature: Make sure DISABLED/REQUIRED macros
 are updated

commit 1e61f78baf893c7eb49f633d23ccbb420c8f808e upstream

x86 has two macros which allow us to evaluate some CPUID-based
features at compile time:

	REQUIRED_MASK_BIT_SET()
	DISABLED_MASK_BIT_SET()

They're both defined by having the compiler check the bit
argument against some constant masks of features.

But, when adding new CPUID leaves, we need to check new words
for these macros.  So make sure that those macros and the
REQUIRED_MASK* and DISABLED_MASK* get updated when necessary.

This looks kinda silly to have an open-coded value ("18" in
this case) open-coded in 5 places in the code.  But, we really do
need 5 places updated when NCAPINTS gets bumped, so now we just
force the issue.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160629200108.92466F6F@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h        | 8 ++++++--
 arch/x86/include/asm/disabled-features.h | 1 +
 arch/x86/include/asm/required-features.h | 1 +
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index c7e38daae4f43..3d5a6b563251c 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -67,7 +67,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
 	   (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
 	   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) ||	\
-	   (((bit)>>5)==17 && (1UL<<((bit)&31) & REQUIRED_MASK17)))
+	   (((bit)>>5)==17 && (1UL<<((bit)&31) & REQUIRED_MASK17)) ||	\
+	   REQUIRED_MASK_CHECK					   ||	\
+	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
 
 #define DISABLED_MASK_BIT_SET(bit)					\
 	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) ||	\
@@ -87,7 +89,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
 	   (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
 	   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) ||	\
-	   (((bit)>>5)==17 && (1UL<<((bit)&31) & DISABLED_MASK17)))
+	   (((bit)>>5)==17 && (1UL<<((bit)&31) & DISABLED_MASK17)) ||	\
+	   DISABLED_MASK_CHECK					   ||	\
+	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
 
 #define cpu_has(c, bit)							\
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index ab6b05ccb3f9f..21c5ac15657b2 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -59,5 +59,6 @@
 #define DISABLED_MASK15	0
 #define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE)
 #define DISABLED_MASK17	0
+#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
 
 #endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index fad4277d582e9..fac9a5c0abe94 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -100,5 +100,6 @@
 #define REQUIRED_MASK15	0
 #define REQUIRED_MASK16	0
 #define REQUIRED_MASK17	0
+#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
 
 #endif /* _ASM_X86_REQUIRED_FEATURES_H */

From a738f9aa04edfbf894015aafd0c10077fc74df7a Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:28:57 -0700
Subject: [PATCH 0938/1852] x86/cpufeature: Add helper macro for mask check
 macros

commit 8eda072e9d7c3429a372e3635dc5851f4a42dee1 upstream

Every time we add a word to our cpu features, we need to add
something like this in two places:

	(((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16))

The trick is getting the "16" in this case in both places.  I've
now screwed this up twice, so as pennance, I've come up with
this patch to keep me and other poor souls from doing the same.

I also commented the logic behind the bit manipulation showcased
above.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160629200110.1BA8949E@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h | 90 +++++++++++++++++--------------
 1 file changed, 50 insertions(+), 40 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d5a6b563251c..dd0089841a0fa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -49,48 +49,58 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 #define test_cpu_cap(c, bit)						\
 	 test_bit(bit, (unsigned long *)((c)->x86_capability))
 
-#define REQUIRED_MASK_BIT_SET(bit)					\
-	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & REQUIRED_MASK0 )) ||	\
-	   (((bit)>>5)==1  && (1UL<<((bit)&31) & REQUIRED_MASK1 )) ||	\
-	   (((bit)>>5)==2  && (1UL<<((bit)&31) & REQUIRED_MASK2 )) ||	\
-	   (((bit)>>5)==3  && (1UL<<((bit)&31) & REQUIRED_MASK3 )) ||	\
-	   (((bit)>>5)==4  && (1UL<<((bit)&31) & REQUIRED_MASK4 )) ||	\
-	   (((bit)>>5)==5  && (1UL<<((bit)&31) & REQUIRED_MASK5 )) ||	\
-	   (((bit)>>5)==6  && (1UL<<((bit)&31) & REQUIRED_MASK6 )) ||	\
-	   (((bit)>>5)==7  && (1UL<<((bit)&31) & REQUIRED_MASK7 )) ||	\
-	   (((bit)>>5)==8  && (1UL<<((bit)&31) & REQUIRED_MASK8 )) ||	\
-	   (((bit)>>5)==9  && (1UL<<((bit)&31) & REQUIRED_MASK9 )) ||	\
-	   (((bit)>>5)==10 && (1UL<<((bit)&31) & REQUIRED_MASK10)) ||	\
-	   (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) ||	\
-	   (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) ||	\
-	   (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) ||	\
-	   (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) ||	\
-	   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) ||	\
-	   (((bit)>>5)==17 && (1UL<<((bit)&31) & REQUIRED_MASK17)) ||	\
-	   REQUIRED_MASK_CHECK					   ||	\
+/*
+ * There are 32 bits/features in each mask word.  The high bits
+ * (selected with (bit>>5) give us the word number and the low 5
+ * bits give us the bit/feature number inside the word.
+ * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
+ * see if it is set in the mask word.
+ */
+#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit)	\
+	(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
+
+#define REQUIRED_MASK_BIT_SET(feature_bit)		\
+	 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  0, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  1, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  2, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  3, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  4, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  5, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  6, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  7, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  8, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK,  9, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) ||	\
+	   REQUIRED_MASK_CHECK					  ||	\
 	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
 
-#define DISABLED_MASK_BIT_SET(bit)					\
-	 ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) ||	\
-	   (((bit)>>5)==1  && (1UL<<((bit)&31) & DISABLED_MASK1 )) ||	\
-	   (((bit)>>5)==2  && (1UL<<((bit)&31) & DISABLED_MASK2 )) ||	\
-	   (((bit)>>5)==3  && (1UL<<((bit)&31) & DISABLED_MASK3 )) ||	\
-	   (((bit)>>5)==4  && (1UL<<((bit)&31) & DISABLED_MASK4 )) ||	\
-	   (((bit)>>5)==5  && (1UL<<((bit)&31) & DISABLED_MASK5 )) ||	\
-	   (((bit)>>5)==6  && (1UL<<((bit)&31) & DISABLED_MASK6 )) ||	\
-	   (((bit)>>5)==7  && (1UL<<((bit)&31) & DISABLED_MASK7 )) ||	\
-	   (((bit)>>5)==8  && (1UL<<((bit)&31) & DISABLED_MASK8 )) ||	\
-	   (((bit)>>5)==9  && (1UL<<((bit)&31) & DISABLED_MASK9 )) ||	\
-	   (((bit)>>5)==10 && (1UL<<((bit)&31) & DISABLED_MASK10)) ||	\
-	   (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) ||	\
-	   (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) ||	\
-	   (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) ||	\
-	   (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) ||	\
-	   (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) ||	\
-	   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) ||	\
-	   (((bit)>>5)==17 && (1UL<<((bit)&31) & DISABLED_MASK17)) ||	\
-	   DISABLED_MASK_CHECK					   ||	\
+#define DISABLED_MASK_BIT_SET(feature_bit)				\
+	 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  0, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  1, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  2, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  3, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  4, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  5, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  6, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  7, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  8, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  9, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) ||	\
+	   DISABLED_MASK_CHECK					  ||	\
 	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
 
 #define cpu_has(c, bit)							\

From 21ed24f18d94a193e5765842f9727923aa0df3b5 Mon Sep 17 00:00:00 2001
From: Oleg Nesterov <oleg@redhat.com>
Date: Fri, 18 May 2018 18:27:39 +0200
Subject: [PATCH 0939/1852] uprobes/x86: Remove incorrect WARN_ON() in
 uprobe_init_insn()

commit 90718e32e1dcc2479acfa208ccfc6442850b594c upstream.

insn_get_length() has the side-effect of processing the entire instruction
but only if it was decoded successfully, otherwise insn_complete() can fail
and in this case we need to just return an error without warning.

Reported-by: syzbot+30d675e3ca03c1c351e7@syzkaller.appspotmail.com
Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: syzkaller-bugs@googlegroups.com
Link: https://lkml.kernel.org/lkml/20180518162739.GA5559@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/uprobes.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index c6aace2bbe083..b8105289c60b6 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -290,7 +290,7 @@ static int uprobe_init_insn(struct arch_uprobe *auprobe, struct insn *insn, bool
 	insn_init(insn, auprobe->insn, sizeof(auprobe->insn), x86_64);
 	/* has the side-effect of processing the entire instruction */
 	insn_get_length(insn);
-	if (WARN_ON_ONCE(!insn_complete(insn)))
+	if (!insn_complete(insn))
 		return -ENOEXEC;
 
 	if (is_prefix_bad(insn))

From 7504b0b1d49f5b85a707998341e4a09adbbf1bb0 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Wed, 13 Jun 2018 09:13:39 -0700
Subject: [PATCH 0940/1852] netfilter: nf_queue: augment nfqa_cfg_policy

commit ba062ebb2cd561d404e0fba8ee4b3f5ebce7cbfc upstream.

Three attributes are currently not verified, thus can trigger KMSAN
warnings such as :

BUG: KMSAN: uninit-value in __arch_swab32 arch/x86/include/uapi/asm/swab.h:10 [inline]
BUG: KMSAN: uninit-value in __fswab32 include/uapi/linux/swab.h:59 [inline]
BUG: KMSAN: uninit-value in nfqnl_recv_config+0x939/0x17d0 net/netfilter/nfnetlink_queue.c:1268
CPU: 1 PID: 4521 Comm: syz-executor120 Not tainted 4.17.0+ #5
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x185/0x1d0 lib/dump_stack.c:113
 kmsan_report+0x188/0x2a0 mm/kmsan/kmsan.c:1117
 __msan_warning_32+0x70/0xc0 mm/kmsan/kmsan_instr.c:620
 __arch_swab32 arch/x86/include/uapi/asm/swab.h:10 [inline]
 __fswab32 include/uapi/linux/swab.h:59 [inline]
 nfqnl_recv_config+0x939/0x17d0 net/netfilter/nfnetlink_queue.c:1268
 nfnetlink_rcv_msg+0xb2e/0xc80 net/netfilter/nfnetlink.c:212
 netlink_rcv_skb+0x37e/0x600 net/netlink/af_netlink.c:2448
 nfnetlink_rcv+0x2fe/0x680 net/netfilter/nfnetlink.c:513
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1680/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec8/0x1320 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x15b/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x43fd59
RSP: 002b:00007ffde0e30d28 EFLAGS: 00000213 ORIG_RAX: 000000000000002e
RAX: ffffffffffffffda RBX: 00000000004002c8 RCX: 000000000043fd59
RDX: 0000000000000000 RSI: 0000000020000080 RDI: 0000000000000003
RBP: 00000000006ca018 R08: 00000000004002c8 R09: 00000000004002c8
R10: 00000000004002c8 R11: 0000000000000213 R12: 0000000000401680
R13: 0000000000401710 R14: 0000000000000000 R15: 0000000000000000

Uninit was created at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_internal_poison_shadow+0xb8/0x1b0 mm/kmsan/kmsan.c:189
 kmsan_kmalloc+0x94/0x100 mm/kmsan/kmsan.c:315
 kmsan_slab_alloc+0x10/0x20 mm/kmsan/kmsan.c:322
 slab_post_alloc_hook mm/slab.h:446 [inline]
 slab_alloc_node mm/slub.c:2753 [inline]
 __kmalloc_node_track_caller+0xb35/0x11b0 mm/slub.c:4395
 __kmalloc_reserve net/core/skbuff.c:138 [inline]
 __alloc_skb+0x2cb/0x9e0 net/core/skbuff.c:206
 alloc_skb include/linux/skbuff.h:988 [inline]
 netlink_alloc_large_skb net/netlink/af_netlink.c:1182 [inline]
 netlink_sendmsg+0x76e/0x1350 net/netlink/af_netlink.c:1876
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec8/0x1320 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x15b/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9

Fixes: fdb694a01f1f ("netfilter: Add fail-open support")
Fixes: 829e17a1a602 ("[NETFILTER]: nfnetlink_queue: allow changing queue length through netlink")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netfilter/nfnetlink_queue.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/netfilter/nfnetlink_queue.c b/net/netfilter/nfnetlink_queue.c
index 7edcfda288c4c..54cde78c27183 100644
--- a/net/netfilter/nfnetlink_queue.c
+++ b/net/netfilter/nfnetlink_queue.c
@@ -1106,6 +1106,9 @@ nfqnl_recv_unsupp(struct sock *ctnl, struct sk_buff *skb,
 static const struct nla_policy nfqa_cfg_policy[NFQA_CFG_MAX+1] = {
 	[NFQA_CFG_CMD]		= { .len = sizeof(struct nfqnl_msg_config_cmd) },
 	[NFQA_CFG_PARAMS]	= { .len = sizeof(struct nfqnl_msg_config_params) },
+	[NFQA_CFG_QUEUE_MAXLEN]	= { .type = NLA_U32 },
+	[NFQA_CFG_MASK]		= { .type = NLA_U32 },
+	[NFQA_CFG_FLAGS]	= { .type = NLA_U32 },
 };
 
 static const struct nf_queue_handler nfqh = {

From 5b3691fc1c12a2206f4527188ebceb638e2ab688 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Thu, 7 Jun 2018 21:34:43 +0200
Subject: [PATCH 0941/1852] netfilter: x_tables: initialise match/target check
 parameter struct

commit c568503ef02030f169c9e19204def610a3510918 upstream.

syzbot reports following splat:

BUG: KMSAN: uninit-value in ebt_stp_mt_check+0x24b/0x450
 net/bridge/netfilter/ebt_stp.c:162
 ebt_stp_mt_check+0x24b/0x450 net/bridge/netfilter/ebt_stp.c:162
 xt_check_match+0x1438/0x1650 net/netfilter/x_tables.c:506
 ebt_check_match net/bridge/netfilter/ebtables.c:372 [inline]
 ebt_check_entry net/bridge/netfilter/ebtables.c:702 [inline]

The uninitialised access is
   xt_mtchk_param->nft_compat

... which should be set to 0.
Fix it by zeroing the struct beforehand, same for tgchk.

ip(6)tables targetinfo uses c99-style initialiser, so no change
needed there.

Reported-by: syzbot+da4494182233c23a5fcf@syzkaller.appspotmail.com
Fixes: 55917a21d0cc0 ("netfilter: x_tables: add context to know if extension runs from nft_compat")
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/netfilter/ebtables.c | 2 ++
 net/ipv4/netfilter/ip_tables.c  | 1 +
 net/ipv6/netfilter/ip6_tables.c | 1 +
 3 files changed, 4 insertions(+)

diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c
index 9f70c267a7a54..665fd87cc1050 100644
--- a/net/bridge/netfilter/ebtables.c
+++ b/net/bridge/netfilter/ebtables.c
@@ -701,6 +701,8 @@ ebt_check_entry(struct ebt_entry *e, struct net *net,
 	}
 	i = 0;
 
+	memset(&mtpar, 0, sizeof(mtpar));
+	memset(&tgpar, 0, sizeof(tgpar));
 	mtpar.net	= tgpar.net       = net;
 	mtpar.table     = tgpar.table     = name;
 	mtpar.entryinfo = tgpar.entryinfo = e;
diff --git a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c
index dac62b5e7fe32..9363c1a70f161 100644
--- a/net/ipv4/netfilter/ip_tables.c
+++ b/net/ipv4/netfilter/ip_tables.c
@@ -663,6 +663,7 @@ find_check_entry(struct ipt_entry *e, struct net *net, const char *name,
 		return -ENOMEM;
 
 	j = 0;
+	memset(&mtpar, 0, sizeof(mtpar));
 	mtpar.net	= net;
 	mtpar.table     = name;
 	mtpar.entryinfo = &e->ip;
diff --git a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c
index 795c343347ece..6cb9e35d23ac8 100644
--- a/net/ipv6/netfilter/ip6_tables.c
+++ b/net/ipv6/netfilter/ip6_tables.c
@@ -676,6 +676,7 @@ find_check_entry(struct ip6t_entry *e, struct net *net, const char *name,
 		return -ENOMEM;
 
 	j = 0;
+	memset(&mtpar, 0, sizeof(mtpar));
 	mtpar.net	= net;
 	mtpar.table     = name;
 	mtpar.entryinfo = &e->ipv6;

From d2cdca3383981f8b2109b26983d4483a5f9b560c Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Mon, 7 May 2018 11:37:58 -0400
Subject: [PATCH 0942/1852] loop: add recursion validation to LOOP_CHANGE_FD

commit d2ac838e4cd7e5e9891ecc094d626734b0245c99 upstream.

Refactor the validation code used in LOOP_SET_FD so it is also used in
LOOP_CHANGE_FD.  Otherwise it is possible to construct a set of loop
devices that all refer to each other.  This can lead to a infinite
loop in starting with "while (is_loop_device(f)) .." in loop_set_fd().

Fix this by refactoring out the validation code and using it for
LOOP_CHANGE_FD as well as LOOP_SET_FD.

Reported-by: syzbot+4349872271ece473a7c91190b68b4bac7c5dbc87@syzkaller.appspotmail.com
Reported-by: syzbot+40bd32c4d9a3cc12a339@syzkaller.appspotmail.com
Reported-by: syzbot+769c54e66f994b041be7@syzkaller.appspotmail.com
Reported-by: syzbot+0a89a9ce473936c57065@syzkaller.appspotmail.com
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/block/loop.c | 68 +++++++++++++++++++++++++-------------------
 1 file changed, 38 insertions(+), 30 deletions(-)

diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index e8165ec55e6f5..aaa7000a43429 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -651,6 +651,36 @@ static void loop_reread_partitions(struct loop_device *lo,
 			__func__, lo->lo_number, lo->lo_file_name, rc);
 }
 
+static inline int is_loop_device(struct file *file)
+{
+	struct inode *i = file->f_mapping->host;
+
+	return i && S_ISBLK(i->i_mode) && MAJOR(i->i_rdev) == LOOP_MAJOR;
+}
+
+static int loop_validate_file(struct file *file, struct block_device *bdev)
+{
+	struct inode	*inode = file->f_mapping->host;
+	struct file	*f = file;
+
+	/* Avoid recursion */
+	while (is_loop_device(f)) {
+		struct loop_device *l;
+
+		if (f->f_mapping->host->i_bdev == bdev)
+			return -EBADF;
+
+		l = f->f_mapping->host->i_bdev->bd_disk->private_data;
+		if (l->lo_state == Lo_unbound) {
+			return -EINVAL;
+		}
+		f = l->lo_backing_file;
+	}
+	if (!S_ISREG(inode->i_mode) && !S_ISBLK(inode->i_mode))
+		return -EINVAL;
+	return 0;
+}
+
 /*
  * loop_change_fd switched the backing store of a loopback device to
  * a new file. This is useful for operating system installers to free up
@@ -680,14 +710,15 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev,
 	if (!file)
 		goto out;
 
+	error = loop_validate_file(file, bdev);
+	if (error)
+		goto out_putf;
+
 	inode = file->f_mapping->host;
 	old_file = lo->lo_backing_file;
 
 	error = -EINVAL;
 
-	if (!S_ISREG(inode->i_mode) && !S_ISBLK(inode->i_mode))
-		goto out_putf;
-
 	/* size of the new backing store needs to be the same */
 	if (get_loop_size(lo, file) != get_loop_size(lo, old_file))
 		goto out_putf;
@@ -708,13 +739,6 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev,
 	return error;
 }
 
-static inline int is_loop_device(struct file *file)
-{
-	struct inode *i = file->f_mapping->host;
-
-	return i && S_ISBLK(i->i_mode) && MAJOR(i->i_rdev) == LOOP_MAJOR;
-}
-
 /* loop sysfs attributes */
 
 static ssize_t loop_attr_show(struct device *dev, char *page,
@@ -872,7 +896,7 @@ static int loop_prepare_queue(struct loop_device *lo)
 static int loop_set_fd(struct loop_device *lo, fmode_t mode,
 		       struct block_device *bdev, unsigned int arg)
 {
-	struct file	*file, *f;
+	struct file	*file;
 	struct inode	*inode;
 	struct address_space *mapping;
 	unsigned lo_blocksize;
@@ -892,29 +916,13 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode,
 	if (lo->lo_state != Lo_unbound)
 		goto out_putf;
 
-	/* Avoid recursion */
-	f = file;
-	while (is_loop_device(f)) {
-		struct loop_device *l;
-
-		if (f->f_mapping->host->i_bdev == bdev)
-			goto out_putf;
-
-		l = f->f_mapping->host->i_bdev->bd_disk->private_data;
-		if (l->lo_state == Lo_unbound) {
-			error = -EINVAL;
-			goto out_putf;
-		}
-		f = l->lo_backing_file;
-	}
+	error = loop_validate_file(file, bdev);
+	if (error)
+		goto out_putf;
 
 	mapping = file->f_mapping;
 	inode = mapping->host;
 
-	error = -EINVAL;
-	if (!S_ISREG(inode->i_mode) && !S_ISBLK(inode->i_mode))
-		goto out_putf;
-
 	if (!(file->f_mode & FMODE_WRITE) || !(mode & FMODE_WRITE) ||
 	    !file->f_op->write_iter)
 		lo_flags |= LO_FLAGS_READ_ONLY;

From 45b3d041faafc56e790e5cd53d71678d9329f26e Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Sat, 26 May 2018 09:59:36 +0900
Subject: [PATCH 0943/1852] PM / hibernate: Fix oops at snapshot_write()

commit fc14eebfc20854a38fd9f1d93a42b1783dad4d17 upstream.

syzbot is reporting NULL pointer dereference at snapshot_write() [1].
This is because data->handle is zero-cleared by ioctl(SNAPSHOT_FREE).
Fix this by checking data_of(data->handle) != NULL before using it.

[1] https://syzkaller.appspot.com/bug?id=828a3c71bd344a6de8b6a31233d51a72099f27fd

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+ae590932da6e45d6564d@syzkaller.appspotmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/power/user.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/kernel/power/user.c b/kernel/power/user.c
index 35310b6273888..bc6dde1f1567d 100644
--- a/kernel/power/user.c
+++ b/kernel/power/user.c
@@ -186,6 +186,11 @@ static ssize_t snapshot_write(struct file *filp, const char __user *buf,
 		res = PAGE_SIZE - pg_offp;
 	}
 
+	if (!data_of(data->handle)) {
+		res = -EINVAL;
+		goto unlock;
+	}
+
 	res = simple_write_to_buffer(data_of(data->handle), res, &pg_offp,
 			buf, count);
 	if (res > 0)

From 2df46f7e8b2e3c399dfd111edc160f28eed95f48 Mon Sep 17 00:00:00 2001
From: Leon Romanovsky <leonro@mellanox.com>
Date: Wed, 23 May 2018 08:22:11 +0300
Subject: [PATCH 0944/1852] RDMA/ucm: Mark UCM interface as BROKEN

commit 7a8690ed6f5346f6738971892205e91d39b6b901 upstream.

In commit 357d23c811a7 ("Remove the obsolete libibcm library")
in rdma-core [1], we removed obsolete library which used the
/dev/infiniband/ucmX interface.

Following multiple syzkaller reports about non-sanitized
user input in the UCMA module, the short audit reveals the same
issues in UCM module too.

It is better to disable this interface in the kernel,
before syzkaller team invests time and energy to harden
this unused interface.

[1] https://github.com/linux-rdma/rdma-core/pull/279

Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/Kconfig       | 12 ++++++++++++
 drivers/infiniband/core/Makefile |  4 ++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig
index aa26f3c3416bb..c151bb625179c 100644
--- a/drivers/infiniband/Kconfig
+++ b/drivers/infiniband/Kconfig
@@ -33,6 +33,18 @@ config INFINIBAND_USER_ACCESS
 	  libibverbs, libibcm and a hardware driver library from
 	  <http://www.openfabrics.org/git/>.
 
+config INFINIBAND_USER_ACCESS_UCM
+	bool "Userspace CM (UCM, DEPRECATED)"
+	depends on BROKEN
+	depends on INFINIBAND_USER_ACCESS
+	help
+	  The UCM module has known security flaws, which no one is
+	  interested to fix. The user-space part of this code was
+	  dropped from the upstream a long time ago.
+
+	  This option is DEPRECATED and planned to be removed.
+
+
 config INFINIBAND_USER_MEM
 	bool
 	depends on INFINIBAND_USER_ACCESS != n
diff --git a/drivers/infiniband/core/Makefile b/drivers/infiniband/core/Makefile
index d43a8994ac5c1..737612a442be1 100644
--- a/drivers/infiniband/core/Makefile
+++ b/drivers/infiniband/core/Makefile
@@ -5,8 +5,8 @@ obj-$(CONFIG_INFINIBAND) +=		ib_core.o ib_mad.o ib_sa.o \
 					ib_cm.o iw_cm.o ib_addr.o \
 					$(infiniband-y)
 obj-$(CONFIG_INFINIBAND_USER_MAD) +=	ib_umad.o
-obj-$(CONFIG_INFINIBAND_USER_ACCESS) +=	ib_uverbs.o ib_ucm.o \
-					$(user_access-y)
+obj-$(CONFIG_INFINIBAND_USER_ACCESS) += ib_uverbs.o $(user_access-y)
+obj-$(CONFIG_INFINIBAND_USER_ACCESS_UCM) += ib_ucm.o $(user_access-y)
 
 ib_core-y :=			packer.o ud_header.o verbs.o sysfs.o \
 				device.o fmr_pool.o cache.o netlink.o \

From e26c05f28f3b1b831feafcad5cf86bcab35e13dc Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Fri, 4 May 2018 10:58:09 -0600
Subject: [PATCH 0945/1852] loop: remember whether sysfs_create_group() was
 done

commit d3349b6b3c373ac1fbfb040b810fcee5e2adc7e0 upstream.

syzbot is hitting WARN() triggered by memory allocation fault
injection [1] because loop module is calling sysfs_remove_group()
when sysfs_create_group() failed.
Fix this by remembering whether sysfs_create_group() succeeded.

[1] https://syzkaller.appspot.com/bug?id=3f86c0edf75c86d2633aeb9dd69eccc70bc7e90b

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+9f03168400f56df89dbc6f1751f4458fe739ff29@syzkaller.appspotmail.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Renamed sysfs_ready -> sysfs_inited.

Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/block/loop.c | 11 ++++++-----
 drivers/block/loop.h |  1 +
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index aaa7000a43429..da3902ac16c86 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -835,16 +835,17 @@ static struct attribute_group loop_attribute_group = {
 	.attrs= loop_attrs,
 };
 
-static int loop_sysfs_init(struct loop_device *lo)
+static void loop_sysfs_init(struct loop_device *lo)
 {
-	return sysfs_create_group(&disk_to_dev(lo->lo_disk)->kobj,
-				  &loop_attribute_group);
+	lo->sysfs_inited = !sysfs_create_group(&disk_to_dev(lo->lo_disk)->kobj,
+						&loop_attribute_group);
 }
 
 static void loop_sysfs_exit(struct loop_device *lo)
 {
-	sysfs_remove_group(&disk_to_dev(lo->lo_disk)->kobj,
-			   &loop_attribute_group);
+	if (lo->sysfs_inited)
+		sysfs_remove_group(&disk_to_dev(lo->lo_disk)->kobj,
+				   &loop_attribute_group);
 }
 
 static void loop_config_discard(struct loop_device *lo)
diff --git a/drivers/block/loop.h b/drivers/block/loop.h
index fb2237c73e618..60f0fd2c0c652 100644
--- a/drivers/block/loop.h
+++ b/drivers/block/loop.h
@@ -59,6 +59,7 @@ struct loop_device {
 	struct kthread_worker	worker;
 	struct task_struct	*worker_task;
 	bool			use_dio;
+	bool			sysfs_inited;
 
 	struct request_queue	*lo_queue;
 	struct blk_mq_tag_set	tag_set;

From 62bce4f721eb07402c294438dca1eab9b73cd03c Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Tue, 17 Jul 2018 11:31:46 +0200
Subject: [PATCH 0946/1852] Linux 4.4.141

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index fa51797773ccc..4ba7bb971f93c 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 140
+SUBLEVEL = 141
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From f4db35032d36701eda9da6e60ce738d254340734 Mon Sep 17 00:00:00 2001
From: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Date: Sun, 8 Apr 2018 23:35:28 +0200
Subject: [PATCH 0947/1852] Kbuild: fix # escaping in .cmd files for future
 Make
MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit

commit 9564a8cf422d7b58f6e857e3546d346fa970191e upstream.

I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with

orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
  if (elf_getshdrnum(elf, &nr_sections)) {

Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.

Now, that new Make behaviour is documented in their NEWS file:

  * WARNING: Backward-incompatibility!
    Number signs (#) appearing inside a macro reference or function invocation
    no longer introduce comments and should not be escaped with backslashes:
    thus a call such as:
      foo := $(shell echo '#')
    is legal.  Previously the number sign needed to be escaped, for example:
      foo := $(shell echo '\#')
    Now this latter will resolve to "\#".  If you want to write makefiles
    portable to both versions, assign the number sign to a variable:
      C := \#
      foo := $(shell echo '$C')
    This was claimed to be fixed in 3.81, but wasn't, for some reason.
    To detect this change search for 'nocomment' in the .FEATURES variable.

This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 scripts/Kbuild.include         | 5 +++--
 tools/build/Build.include      | 5 +++--
 tools/scripts/Makefile.include | 2 ++
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 8a1bb64f1dcd3..0924291ef059e 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -7,6 +7,7 @@ quote   := "
 squote  := '
 empty   :=
 space   := $(empty) $(empty)
+pound   := \#
 
 ###
 # Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
@@ -250,11 +251,11 @@ endif
 
 # Replace >$< with >$$< to preserve $ when reloading the .cmd file
 # (needed for make)
-# Replace >#< with >\#< to avoid starting a comment in the .cmd file
+# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
 # (needed for make)
 # Replace >'< with >'\''< to be able to enclose the whole string in '...'
 # (needed for the shell)
-make-cmd = $(call escsq,$(subst \#,\\\#,$(subst $$,$$$$,$(cmd_$(1)))))
+make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
 
 # Find any prerequisites that is newer than target or that does not exist.
 # PHONY targets skipped in both cases.
diff --git a/tools/build/Build.include b/tools/build/Build.include
index 1c570528baf7d..0340d8a51daba 100644
--- a/tools/build/Build.include
+++ b/tools/build/Build.include
@@ -12,6 +12,7 @@
 # Convenient variables
 comma   := ,
 squote  := '
+pound   := \#
 
 ###
 # Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
@@ -43,11 +44,11 @@ echo-cmd = $(if $($(quiet)cmd_$(1)),\
 ###
 # Replace >$< with >$$< to preserve $ when reloading the .cmd file
 # (needed for make)
-# Replace >#< with >\#< to avoid starting a comment in the .cmd file
+# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
 # (needed for make)
 # Replace >'< with >'\''< to be able to enclose the whole string in '...'
 # (needed for the shell)
-make-cmd = $(call escsq,$(subst \#,\\\#,$(subst $$,$$$$,$(cmd_$(1)))))
+make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
 
 ###
 # Find any prerequisites that is newer than target or that does not exist.
diff --git a/tools/scripts/Makefile.include b/tools/scripts/Makefile.include
index 19edc1a7a2322..7ea4438b801dd 100644
--- a/tools/scripts/Makefile.include
+++ b/tools/scripts/Makefile.include
@@ -92,3 +92,5 @@ ifneq ($(silent),1)
 	QUIET_INSTALL  = @printf '  INSTALL  %s\n' $1;
   endif
 endif
+
+pound := \#

From 3c03da8bbc71ecebc12341d09dd18af8d110a755 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Thu, 15 Dec 2016 10:14:42 -0800
Subject: [PATCH 0948/1852] x86/cpu: Probe CPUID leaf 6 even when cpuid_level
 == 6

commit 3df8d9208569ef0b2313e516566222d745f3b94b upstream.

A typo (or mis-merge?) resulted in leaf 6 only being probed if
cpuid_level >= 7.

Fixes: 2ccd71f1b278 ("x86/cpufeature: Move some of the scattered feature bits to x86_capability")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Acked-by: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Link: http://lkml.kernel.org/r/6ea30c0e9daec21e488b54761881a6dfcf3e04d0.1481825597.git.luto@kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Brad Spengler <spender@grsecurity.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 814276d0eed19..736e2843139bf 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -686,13 +686,14 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		c->x86_capability[CPUID_1_EDX] = edx;
 	}
 
+	/* Thermal and Power Management Leaf: level 0x00000006 (eax) */
+	if (c->cpuid_level >= 0x00000006)
+		c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006);
+
 	/* Additional Intel-defined flags: level 0x00000007 */
 	if (c->cpuid_level >= 0x00000007) {
 		cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
-
 		c->x86_capability[CPUID_7_0_EBX] = ebx;
-
-		c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006);
 		c->x86_capability[CPUID_7_ECX] = ecx;
 	}
 

From 556d325337919e21f6b7f99d309740f523d149d6 Mon Sep 17 00:00:00 2001
From: Arnaldo Carvalho de Melo <acme@redhat.com>
Date: Thu, 7 Jul 2016 18:28:43 -0300
Subject: [PATCH 0949/1852] perf tools: Move syscall number fallbacks from
 perf-sys.h to tools/arch/x86/include/asm/

commit cec07f53c398f22576df77052c4777dc13f14962 upstream.

And remove the empty tools/arch/x86/include/asm/unistd_{32,64}.h files
introduced by eae7a755ee81 ("perf tools, x86: Build perf on older
user-space as well").

This way we get closer to mirroring the kernel for cases where __NR_
can't be found for some include path/_GNU_SOURCE/whatever scenario.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-kpj6m3mbjw82kg6krk2z529e@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/arch/x86/include/asm/unistd_32.h  |  9 +++++++++
 tools/arch/x86/include/asm/unistd_64.h  |  9 +++++++++
 tools/perf/config/Makefile              |  1 +
 tools/perf/perf-sys.h                   | 18 ------------------
 tools/perf/util/include/asm/unistd_32.h |  1 -
 tools/perf/util/include/asm/unistd_64.h |  1 -
 6 files changed, 19 insertions(+), 20 deletions(-)
 create mode 100644 tools/arch/x86/include/asm/unistd_32.h
 create mode 100644 tools/arch/x86/include/asm/unistd_64.h
 delete mode 100644 tools/perf/util/include/asm/unistd_32.h
 delete mode 100644 tools/perf/util/include/asm/unistd_64.h

diff --git a/tools/arch/x86/include/asm/unistd_32.h b/tools/arch/x86/include/asm/unistd_32.h
new file mode 100644
index 0000000000000..cf33ab09273df
--- /dev/null
+++ b/tools/arch/x86/include/asm/unistd_32.h
@@ -0,0 +1,9 @@
+#ifndef __NR_perf_event_open
+# define __NR_perf_event_open 336
+#endif
+#ifndef __NR_futex
+# define __NR_futex 240
+#endif
+#ifndef __NR_gettid
+# define __NR_gettid 224
+#endif
diff --git a/tools/arch/x86/include/asm/unistd_64.h b/tools/arch/x86/include/asm/unistd_64.h
new file mode 100644
index 0000000000000..2c9835695b56e
--- /dev/null
+++ b/tools/arch/x86/include/asm/unistd_64.h
@@ -0,0 +1,9 @@
+#ifndef __NR_perf_event_open
+# define __NR_perf_event_open 298
+#endif
+#ifndef __NR_futex
+# define __NR_futex 202
+#endif
+#ifndef __NR_gettid
+# define __NR_gettid 186
+#endif
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 405c1c1e2975f..9a4988cf7b385 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -200,6 +200,7 @@ CFLAGS += -I$(src-perf)/arch/$(ARCH)/include
 CFLAGS += -I$(srctree)/tools/include/
 CFLAGS += -I$(srctree)/arch/$(ARCH)/include/uapi
 CFLAGS += -I$(srctree)/arch/$(ARCH)/include
+CFLAGS += -I$(srctree)/tools/arch/$(ARCH)/include
 CFLAGS += -I$(srctree)/include/uapi
 CFLAGS += -I$(srctree)/include
 
diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h
index 83a25cef82fdd..5cee8a3d0455c 100644
--- a/tools/perf/perf-sys.h
+++ b/tools/perf/perf-sys.h
@@ -11,29 +11,11 @@
 #if defined(__i386__)
 #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
 #define CPUINFO_PROC	{"model name"}
-#ifndef __NR_perf_event_open
-# define __NR_perf_event_open 336
-#endif
-#ifndef __NR_futex
-# define __NR_futex 240
-#endif
-#ifndef __NR_gettid
-# define __NR_gettid 224
-#endif
 #endif
 
 #if defined(__x86_64__)
 #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
 #define CPUINFO_PROC	{"model name"}
-#ifndef __NR_perf_event_open
-# define __NR_perf_event_open 298
-#endif
-#ifndef __NR_futex
-# define __NR_futex 202
-#endif
-#ifndef __NR_gettid
-# define __NR_gettid 186
-#endif
 #endif
 
 #ifdef __powerpc__
diff --git a/tools/perf/util/include/asm/unistd_32.h b/tools/perf/util/include/asm/unistd_32.h
deleted file mode 100644
index 8b137891791fe..0000000000000
--- a/tools/perf/util/include/asm/unistd_32.h
+++ /dev/null
@@ -1 +0,0 @@
-
diff --git a/tools/perf/util/include/asm/unistd_64.h b/tools/perf/util/include/asm/unistd_64.h
deleted file mode 100644
index 8b137891791fe..0000000000000
--- a/tools/perf/util/include/asm/unistd_64.h
+++ /dev/null
@@ -1 +0,0 @@
-

From 99f75f0be7587fb5264136a6d9a35e0997642044 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Thu, 19 Jul 2018 15:35:58 +0200
Subject: [PATCH 0950/1852] Linux 4.4.142

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 4ba7bb971f93c..8290a2ddcdf7e 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 141
+SUBLEVEL = 142
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From a9c74d0ff8f68e0e03244043e6f14ba4c681cc1a Mon Sep 17 00:00:00 2001
From: Roman Kiryanov <rkir@google.com>
Date: Wed, 6 Jun 2018 10:48:00 -0700
Subject: [PATCH 0951/1852] ANDROID: Update arm64 ranchu64_defconfig

======== Summary =========
Device Manifest?    GOOD
Device Matrix?      GOOD
Framework Manifest? GOOD
Framework Matrix?   GOOD
Device HAL Manifest <==> Framework Compatibility Matrix? GOOD
Framework HAL Manifest <==> Device Compatibility Matrix? GOOD
Runtime info <==> Framework Compatibility Matrix?        GOOD
VintfObject::CheckCompatibility?                         GOOD

Bug: 109735735
Test: emulator -verbose -show-kernel -kernel /tmp/qemu-kernel-arm64-ranchu/kernel-qemu
Change-Id: I459e73fea6ba00a35446da856a18ebe3e530bd04
Signed-off-by: Roman Kiryanov <rkir@google.com>
---
 arch/arm64/configs/ranchu64_defconfig | 71 ++++++++++++++++++++++-----
 1 file changed, 59 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/configs/ranchu64_defconfig b/arch/arm64/configs/ranchu64_defconfig
index fc55008d8c4c9..7f847fc40d147 100644
--- a/arch/arm64/configs/ranchu64_defconfig
+++ b/arch/arm64/configs/ranchu64_defconfig
@@ -1,6 +1,7 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 # CONFIG_SWAP is not set
 CONFIG_POSIX_MQUEUE=y
+# CONFIG_USELIB is not set
 CONFIG_AUDIT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -17,14 +18,19 @@ CONFIG_CGROUP_DEBUG=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
+CONFIG_CC_STACKPROTECTOR_STRONG=y
 CONFIG_ARCH_MMAP_RND_BITS=24
 CONFIG_ARCH_MMAP_RND_COMPAT_BITS=16
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 CONFIG_ARCH_VEXPRESS=y
@@ -36,6 +42,8 @@ CONFIG_ARMV8_DEPRECATED=y
 CONFIG_SWP_EMULATION=y
 CONFIG_CP15_BARRIER_EMULATION=y
 CONFIG_SETEND_EMULATION=y
+CONFIG_ARM64_SW_TTBR0_PAN=y
+CONFIG_RANDOMIZE_BASE=y
 CONFIG_CMDLINE="console=ttyAMA0"
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_COMPAT=y
@@ -50,15 +58,16 @@ CONFIG_UNIX=y
 CONFIG_XFRM_USER=y
 CONFIG_NET_KEY=y
 CONFIG_INET=y
-CONFIG_INET_DIAG_DESTROY=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_ADVANCED_ROUTER=y
 CONFIG_IP_MULTIPLE_TABLES=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
+CONFIG_NET_IPVTI=y
 CONFIG_INET_ESP=y
 # CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG_DESTROY=y
 CONFIG_IPV6_ROUTER_PREF=y
 CONFIG_IPV6_ROUTE_INFO=y
 CONFIG_IPV6_OPTIMISTIC_DAD=y
@@ -66,6 +75,7 @@ CONFIG_INET6_AH=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_NETFILTER=y
 CONFIG_NF_CONNTRACK=y
@@ -124,6 +134,10 @@ CONFIG_IP_NF_MATCH_RPFILTER=y
 CONFIG_IP_NF_MATCH_TTL=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
 CONFIG_IP_NF_MANGLE=y
 CONFIG_IP_NF_TARGET_ECN=y
 CONFIG_IP_NF_TARGET_TTL=y
@@ -141,6 +155,7 @@ CONFIG_IP6_NF_MATCH_OPTS=y
 CONFIG_IP6_NF_MATCH_HL=y
 CONFIG_IP6_NF_MATCH_IPV6HEADER=y
 CONFIG_IP6_NF_MATCH_MH=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
 CONFIG_IP6_NF_MATCH_RT=y
 CONFIG_IP6_NF_TARGET_HL=y
 CONFIG_IP6_NF_FILTER=y
@@ -154,12 +169,14 @@ CONFIG_NET_CLS_U32=y
 CONFIG_NET_EMATCH=y
 CONFIG_NET_EMATCH_U32=y
 CONFIG_NET_CLS_ACT=y
-# CONFIG_WIRELESS is not set
+CONFIG_MAC80211=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_VIRTIO_BLK=y
+CONFIG_UID_SYS_STATS=y
+CONFIG_MEMORY_STATE_TIME=y
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
@@ -180,13 +197,22 @@ CONFIG_PPP_DEFLATE=y
 CONFIG_PPP_MPPE=y
 CONFIG_PPPOLAC=y
 CONFIG_PPPOPNS=y
-# CONFIG_WLAN is not set
+CONFIG_USB_USBNET=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_KEYRESET=y
 CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
+CONFIG_KEYBOARD_GOLDFISH_ROTARY=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
 CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_KEYCHORD=y
 CONFIG_INPUT_UINPUT=y
@@ -199,7 +225,8 @@ CONFIG_INPUT_GPIO=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_VIRTIO_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_BATTERY_GOLDFISH=y
 # CONFIG_HWMON is not set
 CONFIG_MEDIA_SUPPORT=y
@@ -228,8 +255,10 @@ CONFIG_DRAGONRISE_FF=y
 CONFIG_HID_EMS_FF=y
 CONFIG_HID_ELECOM=y
 CONFIG_HID_EZKEY=y
+CONFIG_HID_HOLTEK=y
 CONFIG_HID_KEYTOUCH=y
 CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
 CONFIG_HID_WALTOP=y
 CONFIG_HID_GYRATION=y
 CONFIG_HID_TWINHAN=y
@@ -244,14 +273,17 @@ CONFIG_HID_MAGICMOUSE=y
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
 CONFIG_HID_ORTEK=y
 CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_PICOLCD=y
 CONFIG_HID_PRIMAX=y
+CONFIG_HID_ROCCAT=y
 CONFIG_HID_SAITEK=y
 CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
 CONFIG_HID_SPEEDLINK=y
 CONFIG_HID_SUNPLUS=y
 CONFIG_HID_GREENASIA=y
@@ -265,7 +297,18 @@ CONFIG_HID_WACOM=y
 CONFIG_HID_WIIMOTE=y
 CONFIG_HID_ZEROPLUS=y
 CONFIG_HID_ZYDACRON=y
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_MTP=y
+CONFIG_USB_CONFIGFS_F_PTP=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
 CONFIG_RTC_CLASS=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_STAGING=y
@@ -286,27 +329,31 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QFMT_V2=y
 CONFIG_FUSE_FS=y
 CONFIG_CUSE=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
+CONFIG_SDCARD_FS=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_RAM=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_PANIC_TIMEOUT=5
-# CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
-# CONFIG_FTRACE is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
 CONFIG_ATOMIC64_SELFTEST=y
-CONFIG_DEBUG_RODATA=y
+CONFIG_KEYS=y
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
+CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
+CONFIG_CRYPTO_SHA512=y

From 612adc3a657b61a243db8dc352b1b38b98a885df Mon Sep 17 00:00:00 2001
From: Lianjun Huang <huanglianjun@vivo.com>
Date: Sat, 16 Jun 2018 22:59:46 +0800
Subject: [PATCH 0952/1852] ANDROID: sdcardfs: fix potential crash when
 reserved_mb is not zero

sdcardfs_mkdir() calls check_min_free_space(). When reserved_mb is not zero, a negative dentry will be passed to
ext4_statfs() at last and ext4_statfs() will crash. The parent dentry is positive. So we use the parent dentry to
check free space.

Change-Id: I80ab9623fe59ba911f4cc9f0e029a1c6f7ee421b
Signed-off-by: Lianjun Huang <huanglianjun@vivo.com>
---
 fs/sdcardfs/inode.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/fs/sdcardfs/inode.c b/fs/sdcardfs/inode.c
index 2a4520a639931..75a8ab2ce5a81 100644
--- a/fs/sdcardfs/inode.c
+++ b/fs/sdcardfs/inode.c
@@ -270,6 +270,7 @@ static int sdcardfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode
 	struct dentry *lower_dentry;
 	struct vfsmount *lower_mnt;
 	struct dentry *lower_parent_dentry = NULL;
+	struct dentry *parent_dentry = NULL;
 	struct path lower_path;
 	struct sdcardfs_sb_info *sbi = SDCARDFS_SB(dentry->d_sb);
 	const struct cred *saved_cred = NULL;
@@ -289,11 +290,14 @@ static int sdcardfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode
 	OVERRIDE_CRED(SDCARDFS_SB(dir->i_sb), saved_cred, SDCARDFS_I(dir));
 
 	/* check disk space */
-	if (!check_min_free_space(dentry, 0, 1)) {
+	parent_dentry = dget_parent(dentry);
+	if (!check_min_free_space(parent_dentry, 0, 1)) {
 		pr_err("sdcardfs: No minimum free space.\n");
 		err = -ENOSPC;
+		dput(parent_dentry);
 		goto out_revert;
 	}
+	dput(parent_dentry);
 
 	/* the lower_dentry is negative here */
 	sdcardfs_get_lower_path(dentry, &lower_path);

From 47db108da9dec9a35b4bac443fa78e99a461afad Mon Sep 17 00:00:00 2001
From: Patrik Torstensson <totte@google.com>
Date: Fri, 13 Apr 2018 15:34:48 -0700
Subject: [PATCH 0953/1852] ANDROID: Add kconfig to make dm-verity
 check_at_most_once default enabled

This change adds a kernel config for default enable
the check_at_most_once dm-verity option. This is to give us
the ability to enforce the usage of at_most_once
for entry-level phones.

Change-Id: Id40416672c4c2209a9866997d8c164b5de5dc7dc
Signed-off-by: Patrik Torstensson <totte@google.com>
Bug: 72664474
---
 drivers/md/Kconfig            | 20 ++++++++++++++++++++
 drivers/md/dm-verity-target.c |  8 ++++++++
 2 files changed, 28 insertions(+)

diff --git a/drivers/md/Kconfig b/drivers/md/Kconfig
index 5649d1ab00838..95de7ee56dfc8 100644
--- a/drivers/md/Kconfig
+++ b/drivers/md/Kconfig
@@ -545,4 +545,24 @@ config DM_ANDROID_VERITY
 	  of the metadata contents are verified against the key included
 	  in the system keyring. Upon success, the underlying verity
 	  target is setup.
+
+config DM_ANDROID_VERITY_AT_MOST_ONCE_DEFAULT_ENABLED
+	bool "Verity will validate blocks at most once"
+   depends on DM_VERITY
+   ---help---
+	  Default enables at_most_once option for dm-verity
+
+	  Verify data blocks only the first time they are read from the
+	  data device, rather than every time.  This reduces the overhead
+	  of dm-verity so that it can be used on systems that are memory
+	  and/or CPU constrained.  However, it provides a reduced level
+	  of security because only offline tampering of the data device's
+	  content will be detected, not online tampering.
+
+	  Hash blocks are still verified each time they are read from the
+	  hash device, since verification of hash blocks is less performance
+	  critical than data blocks, and a hash block will not be verified
+	  any more after all the data blocks it covers have been verified anyway.
+
+	  If unsure, say N.
 endif # MD
diff --git a/drivers/md/dm-verity-target.c b/drivers/md/dm-verity-target.c
index ceff074b3b742..d2e3abc182b37 100644
--- a/drivers/md/dm-verity-target.c
+++ b/drivers/md/dm-verity-target.c
@@ -1053,6 +1053,14 @@ int verity_ctr(struct dm_target *ti, unsigned argc, char **argv)
 			goto bad;
 	}
 
+#ifdef CONFIG_DM_ANDROID_VERITY_AT_MOST_ONCE_DEFAULT_ENABLED
+	if (!v->validated_blocks) {
+		r = verity_alloc_most_once(v);
+		if (r)
+			goto bad;
+	}
+#endif
+
 	v->hash_per_block_bits =
 		__fls((1 << v->hash_dev_block_bits) / v->digest_size);
 

From 33b729436430c7f0161c7b496b0b5516dc6ca4c7 Mon Sep 17 00:00:00 2001
From: Artem Borisov <dedsa2002@gmail.com>
Date: Fri, 13 Jul 2018 14:28:33 +0300
Subject: [PATCH 0954/1852] cpufreq: Kconfig: Remove CPU_FREQ_DEFAULT_GOV_SCHED

Sched governor was removed in df147c9e336cfcb4183db1eb9552b0429060cd0d
and this probably was left here by mistake. Remove it to avoid confusion.

Signed-off-by: Artem Borisov <dedsa2002@gmail.com>
---
 drivers/cpufreq/Kconfig | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index ac1bb26fb158f..75ded53a74700 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -121,14 +121,6 @@ config CPU_FREQ_DEFAULT_GOV_INTERACTIVE
 	  loading your cpufreq low-level hardware driver, using the
 	  'interactive' governor for latency-sensitive workloads.
 
-config CPU_FREQ_DEFAULT_GOV_SCHED
-	bool "sched"
-	select CPU_FREQ_GOV_SCHED
-	help
-	  Use the CPUfreq governor 'sched' as default. This scales
-	  cpu frequency using CPU utilization estimates from the
-	  scheduler.
-
 config CPU_FREQ_DEFAULT_GOV_SCHEDUTIL
 	bool "schedutil"
 	depends on SMP

From bc48d49b7b289c133941eb39d8837a386aedf5fe Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Wed, 29 Nov 2017 22:29:47 +0900
Subject: [PATCH 0955/1852] UPSTREAM: android: binder: Check for errors in
 binder_alloc_shrinker_init().

Both list_lru_init() and register_shrinker() might return an error.

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Sherry Yang <sherryy@android.com>
Cc: Michal Hocko <mhocko@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 533dfb250d1c8d2bb8c9b65252f7b296b29913d4)

Change-Id: I5325ccaf34a04179ef3dae73dd8f3abfd6e21565
---
 drivers/android/binder.c       |  4 +++-
 drivers/android/binder_alloc.c | 12 +++++++++---
 drivers/android/binder_alloc.h |  2 +-
 3 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 67a1c13b8dda2..93e63ff7ce782 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -5718,7 +5718,9 @@ static int __init binder_init(void)
 	struct binder_device *device;
 	struct hlist_node *tmp;
 
-	binder_alloc_shrinker_init();
+	ret = binder_alloc_shrinker_init();
+	if (ret)
+		return ret;
 
 	atomic_set(&binder_transaction_log.cur, ~0U);
 	atomic_set(&binder_transaction_log_failed.cur, ~0U);
diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c
index 3a4279d219f7e..a1e123b5a2b6e 100644
--- a/drivers/android/binder_alloc.c
+++ b/drivers/android/binder_alloc.c
@@ -1010,8 +1010,14 @@ void binder_alloc_init(struct binder_alloc *alloc)
 	INIT_LIST_HEAD(&alloc->buffers);
 }
 
-void binder_alloc_shrinker_init(void)
+int binder_alloc_shrinker_init(void)
 {
-	list_lru_init(&binder_alloc_lru);
-	register_shrinker(&binder_shrinker);
+	int ret = list_lru_init(&binder_alloc_lru);
+
+	if (ret == 0) {
+		ret = register_shrinker(&binder_shrinker);
+		if (ret)
+			list_lru_destroy(&binder_alloc_lru);
+	}
+	return ret;
 }
diff --git a/drivers/android/binder_alloc.h b/drivers/android/binder_alloc.h
index 0b145307f1fd1..9ef64e5638566 100644
--- a/drivers/android/binder_alloc.h
+++ b/drivers/android/binder_alloc.h
@@ -130,7 +130,7 @@ extern struct binder_buffer *binder_alloc_new_buf(struct binder_alloc *alloc,
 						  size_t extra_buffers_size,
 						  int is_async);
 extern void binder_alloc_init(struct binder_alloc *alloc);
-void binder_alloc_shrinker_init(void);
+extern int binder_alloc_shrinker_init(void);
 extern void binder_alloc_vma_close(struct binder_alloc *alloc);
 extern struct binder_buffer *
 binder_alloc_prepare_to_free(struct binder_alloc *alloc,

From 8f0aaeaf4e699375e4b1437515921a813efe59a2 Mon Sep 17 00:00:00 2001
From: Xiongwei Song <sxwjean@gmail.com>
Date: Thu, 14 Dec 2017 12:15:42 +0800
Subject: [PATCH 0956/1852] UPSTREAM: ANDROID: binder: make
 binder_alloc_new_buf_locked static and indent its arguments
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The function binder_alloc_new_buf_locked() is only used in this file, so
make it static. Also clean up sparse warning:

drivers/android/binder_alloc.c:330:23: warning: no previous prototype
for ‘binder_alloc_new_buf_locked’ [-Wmissing-prototypes]

In addition, the line of the function name exceeds 80 characters when
add static for this function, hence indent its arguments anew.

Signed-off-by: Xiongwei Song <sxwjean@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 3f827245463a57f5ef64a665e1ca64eed0da00a5)

Change-Id: I6b379df815d30f9b3e9f1dd50334375123b25bbc
---
 drivers/android/binder_alloc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c
index a1e123b5a2b6e..9f0204a44ba05 100644
--- a/drivers/android/binder_alloc.c
+++ b/drivers/android/binder_alloc.c
@@ -328,11 +328,12 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
 	return vma ? -ENOMEM : -ESRCH;
 }
 
-struct binder_buffer *binder_alloc_new_buf_locked(struct binder_alloc *alloc,
-						  size_t data_size,
-						  size_t offsets_size,
-						  size_t extra_buffers_size,
-						  int is_async)
+static struct binder_buffer *binder_alloc_new_buf_locked(
+				struct binder_alloc *alloc,
+				size_t data_size,
+				size_t offsets_size,
+				size_t extra_buffers_size,
+				int is_async)
 {
 	struct rb_node *n = alloc->free_buffers.rb_node;
 	struct binder_buffer *buffer;

From 1d41d3c9b8150efa8131b8714169bbc84bf0bce3 Mon Sep 17 00:00:00 2001
From: Elad Wexler <elad.wexler@gmail.com>
Date: Fri, 29 Dec 2017 11:03:37 +0200
Subject: [PATCH 0957/1852] UPSTREAM: android: binder: Prefer __func__ to using
 hardcoded function name

Coding style fixup

Signed-off-by: Elad Wexler <elad.wexler@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 00c41cddebde8d1a635bf81a7b255b7e56fd0d15)

Change-Id: I795e2a9f525c4a8df5cd0a81842a88529ba54f21
---
 drivers/android/binder.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 93e63ff7ce782..5edba6bdac7d6 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -4848,7 +4848,7 @@ static int binder_mmap(struct file *filp, struct vm_area_struct *vma)
 	return ret;
 
 err_bad_arg:
-	pr_err("binder_mmap: %d %lx-%lx %s failed %d\n",
+	pr_err("%s: %d %lx-%lx %s failed %d\n", __func__,
 	       proc->pid, vma->vm_start, vma->vm_end, failure_string, ret);
 	return ret;
 }
@@ -4858,7 +4858,7 @@ static int binder_open(struct inode *nodp, struct file *filp)
 	struct binder_proc *proc;
 	struct binder_device *binder_dev;
 
-	binder_debug(BINDER_DEBUG_OPEN_CLOSE, "binder_open: %d:%d\n",
+	binder_debug(BINDER_DEBUG_OPEN_CLOSE, "%s: %d:%d\n", __func__,
 		     current->group_leader->pid, current->pid);
 
 	proc = kzalloc(sizeof(*proc), GFP_KERNEL);

From dcfc634c2b12bdbc131b90c0809b64c91c949ec8 Mon Sep 17 00:00:00 2001
From: Harsh Shandilya <harsh@prjkt.io>
Date: Fri, 22 Dec 2017 19:37:02 +0530
Subject: [PATCH 0958/1852] UPSTREAM: android: binder: Use octal permissions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

checkpatch warns against the use of symbolic permissions,
this patch migrates all symbolic permissions in the binder
driver to octal permissions.

Test: debugfs nodes created by binder have the same unix
permissions prior to and after this patch was applied.

Signed-off-by: Harsh Shandilya <harsh@prjkt.io>
Cc: "Arve Hjønnevåg" <arve@android.com>
Cc: Todd Kjos <tkjos@android.com>
Cc: Martijn Coenen <maco@android.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 21d02ddf716669e182a13b69b4dd928cf8ef5e0f)

Change-Id: I8152fe280ead1d04d89593e813a722f9eb5def27
---
 drivers/android/binder.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 5edba6bdac7d6..c629c9dd15828 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -143,7 +143,7 @@ enum {
 };
 static uint32_t binder_debug_mask = BINDER_DEBUG_USER_ERROR |
 	BINDER_DEBUG_FAILED_TRANSACTION | BINDER_DEBUG_DEAD_TRANSACTION;
-module_param_named(debug_mask, binder_debug_mask, uint, S_IWUSR | S_IRUGO);
+module_param_named(debug_mask, binder_debug_mask, uint, 0644);
 
 static char *binder_devices_param = CONFIG_ANDROID_BINDER_DEVICES;
 module_param_named(devices, binder_devices_param, charp, S_IRUGO);
@@ -162,7 +162,7 @@ static int binder_set_stop_on_user_error(const char *val,
 	return ret;
 }
 module_param_call(stop_on_user_error, binder_set_stop_on_user_error,
-	param_get_int, &binder_stop_on_user_error, S_IWUSR | S_IRUGO);
+	param_get_int, &binder_stop_on_user_error, 0644);
 
 #define binder_debug(mask, x...) \
 	do { \
@@ -4903,7 +4903,7 @@ static int binder_open(struct inode *nodp, struct file *filp)
 		 * anyway print all contexts that a given PID has, so this
 		 * is not a problem.
 		 */
-		proc->debugfs_entry = debugfs_create_file(strbuf, S_IRUGO,
+		proc->debugfs_entry = debugfs_create_file(strbuf, 0444,
 			binder_debugfs_dir_entry_proc,
 			(void *)(unsigned long)proc->pid,
 			&binder_proc_fops);
@@ -5735,27 +5735,27 @@ static int __init binder_init(void)
 
 	if (binder_debugfs_dir_entry_root) {
 		debugfs_create_file("state",
-				    S_IRUGO,
+				    0444,
 				    binder_debugfs_dir_entry_root,
 				    NULL,
 				    &binder_state_fops);
 		debugfs_create_file("stats",
-				    S_IRUGO,
+				    0444,
 				    binder_debugfs_dir_entry_root,
 				    NULL,
 				    &binder_stats_fops);
 		debugfs_create_file("transactions",
-				    S_IRUGO,
+				    0444,
 				    binder_debugfs_dir_entry_root,
 				    NULL,
 				    &binder_transactions_fops);
 		debugfs_create_file("transaction_log",
-				    S_IRUGO,
+				    0444,
 				    binder_debugfs_dir_entry_root,
 				    &binder_transaction_log,
 				    &binder_transaction_log_fops);
 		debugfs_create_file("failed_transaction_log",
-				    S_IRUGO,
+				    0444,
 				    binder_debugfs_dir_entry_root,
 				    &binder_transaction_log_failed,
 				    &binder_transaction_log_fops);

From 8ff86f3b9002f58556207bc3ee0a697fc4e754ad Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Tue, 23 Jan 2018 12:04:27 -0600
Subject: [PATCH 0959/1852] UPSTREAM: android: binder: Use true and false for
 boolean values

Assign true or false to boolean variables instead of an integer value.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Cc: Todd Kjos <tkjos@android.com>
Cc: Martijn Coenen <maco@android.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 197410ad884eb18b31d48e9d8e64cb5a9e326f2f)

Change-Id: I30bed831d6b6ff2e9e3e521ccc5d6836f0b30944
---
 drivers/android/binder.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index c629c9dd15828..b9e5dd38cf1ff 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -251,7 +251,7 @@ static struct binder_transaction_log_entry *binder_transaction_log_add(
 	unsigned int cur = atomic_inc_return(&log->cur);
 
 	if (cur >= ARRAY_SIZE(log->entry))
-		log->full = 1;
+		log->full = true;
 	e = &log->entry[cur % ARRAY_SIZE(log->entry)];
 	WRITE_ONCE(e->debug_id_done, 0);
 	/*
@@ -2746,7 +2746,7 @@ static bool binder_proc_transaction(struct binder_transaction *t,
 			target_list = &node->async_todo;
 			wakeup = false;
 		} else {
-			node->has_async_transaction = 1;
+			node->has_async_transaction = true;
 		}
 	}
 
@@ -3608,7 +3608,7 @@ static int binder_thread_write(struct binder_proc *proc,
 				w = binder_dequeue_work_head_ilocked(
 						&buf_node->async_todo);
 				if (!w) {
-					buf_node->has_async_transaction = 0;
+					buf_node->has_async_transaction = false;
 				} else {
 					binder_enqueue_work_ilocked(
 							w, &proc->todo);

From 4784568c4f5b42dc856b15701770204ddb040bfc Mon Sep 17 00:00:00 2001
From: Ganesh Mahendran <opensource.ganesh@gmail.com>
Date: Wed, 10 Jan 2018 10:49:05 +0800
Subject: [PATCH 0960/1852] UPSTREAM: android: binder: use VM_ALLOC to get vm
 area

VM_IOREMAP is used to access hardware through a mechanism called
I/O mapped memory. Android binder is a IPC machanism which will
not access I/O memory.

And VM_IOREMAP has alignment requiement which may not needed in
binder.
    __get_vm_area_node()
    {
    ...
        if (flags & VM_IOREMAP)
            align = 1ul << clamp_t(int, fls_long(size),
               PAGE_SHIFT, IOREMAP_MAX_ORDER);
    ...
    }

This patch will save some kernel vm area, especially for 32bit os.

In 32bit OS, kernel vm area is only 240MB. We may got below
error when launching a app:

<3>[ 4482.440053] binder_alloc: binder_alloc_mmap_handler: 15728 8ce67000-8cf65000 get_vm_area failed -12
<3>[ 4483.218817] binder_alloc: binder_alloc_mmap_handler: 15745 8ce67000-8cf65000 get_vm_area failed -12

Signed-off-by: Ganesh Mahendran <opensource.ganesh@gmail.com>
Acked-by: Martijn Coenen <maco@android.com>
Acked-by: Todd Kjos <tkjos@google.com>
Cc: stable <stable@vger.kernel.org>

----
V3: update comments
V2: update comments
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit aac6830ec1cb681544212838911cdc57f2638216)

Change-Id: Ide458abc6a4d3ec07973733aa223c4247eef20e6
---
 drivers/android/binder_alloc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c
index 9f0204a44ba05..16d02de1f7008 100644
--- a/drivers/android/binder_alloc.c
+++ b/drivers/android/binder_alloc.c
@@ -671,7 +671,7 @@ int binder_alloc_mmap_handler(struct binder_alloc *alloc,
 		goto err_already_mapped;
 	}
 
-	area = get_vm_area(vma->vm_end - vma->vm_start, VM_IOREMAP);
+	area = get_vm_area(vma->vm_end - vma->vm_start, VM_ALLOC);
 	if (area == NULL) {
 		ret = -ENOMEM;
 		failure_string = "get_vm_area";

From a2d7090e75a2a6c82774ff5bb0e6bec0537e485d Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 29 Mar 2018 12:14:40 +0300
Subject: [PATCH 0961/1852] UPSTREAM: ANDROID: binder: re-order some conditions

It doesn't make any difference to runtime but I've switched these two
checks to make my static checker happy.

The problem is that "buffer->data_size" is user controlled and if it's
less than "sizeo(*hdr)" then that means "offset" can be more than
"buffer->data_size".  It's just cleaner to check it in the other order.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Martijn Coenen <maco@android.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 361f2ddbb0c9f9b4f336025a7bd0212cea4a34f0)

Change-Id: I098d525ba63d125caa9840e6e1d5004bf70edc3c
---
 drivers/android/binder.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index b9e5dd38cf1ff..41d09b1e93431 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -2154,8 +2154,8 @@ static size_t binder_validate_object(struct binder_buffer *buffer, u64 offset)
 	struct binder_object_header *hdr;
 	size_t object_size = 0;
 
-	if (offset > buffer->data_size - sizeof(*hdr) ||
-	    buffer->data_size < sizeof(*hdr) ||
+	if (buffer->data_size < sizeof(*hdr) ||
+	    offset > buffer->data_size - sizeof(*hdr) ||
 	    !IS_ALIGNED(offset, sizeof(u32)))
 		return 0;
 

From bffbc79ae462e2db7a2fa6840a4752dd640771f9 Mon Sep 17 00:00:00 2001
From: Martijn Coenen <maco@google.com>
Date: Fri, 11 May 2018 01:45:24 -0700
Subject: [PATCH 0962/1852] UPSTREAM: ANDROID: binder: remove 32-bit binder
 interface.

New devices launching with Android P need to use the 64-bit
binder interface, even on 32-bit SoCs [0].

This change removes the Kconfig option to select the 32-bit
binder interface. We don't think this will affect existing
userspace for the following reasons:
1) The latest Android common tree is 4.14, so we don't
   believe any Android devices are on kernels >4.14.
2) Android devices launch on an LTS release and stick with
   it, so we wouldn't expect devices running on <= 4.14 now
   to upgrade to 4.17 or later. But even if they did, they'd
   rebuild the world (kernel + userspace) anyway.
3) Other userspaces like 'anbox' are already using the
   64-bit interface.

Note that this change doesn't remove the 32-bit UAPI
itself; the reason for that is that Android userspace
always uses the latest UAPI headers from upstream, and
userspace retains 32-bit support for devices that are
upgrading. This will be removed as well in 2-3 years,
at which point we can remove the code from the UAPI
as well.

Finally, this change introduces build errors on archs where
64-bit get_user/put_user is not supported, so make binder
unavailable on m68k (which wouldn't want it anyway).

[0]: https://android-review.googlesource.com/c/platform/build/+/595193

Signed-off-by: Martijn Coenen <maco@android.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 1190b4e38f97023154e6b3bef61b251aa5f970d0)

Change-Id: I73dadf1d7b45a42bb18be5d5d3f5c090e61866de
---
 drivers/android/Kconfig  | 15 +--------------
 drivers/android/binder.c |  4 ----
 2 files changed, 1 insertion(+), 18 deletions(-)

diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig
index 01de42c8b74bd..63ed9ceebf7b0 100644
--- a/drivers/android/Kconfig
+++ b/drivers/android/Kconfig
@@ -9,7 +9,7 @@ if ANDROID
 
 config ANDROID_BINDER_IPC
 	bool "Android Binder IPC Driver"
-	depends on MMU
+	depends on MMU && !M68K
 	default n
 	---help---
 	  Binder is used in Android for both communication between processes,
@@ -31,19 +31,6 @@ config ANDROID_BINDER_DEVICES
 	  created. Each binder device has its own context manager, and is
 	  therefore logically separated from the other devices.
 
-config ANDROID_BINDER_IPC_32BIT
-	bool
-	depends on !64BIT && ANDROID_BINDER_IPC
-	default y
-	---help---
-	  The Binder API has been changed to support both 32 and 64bit
-	  applications in a mixed environment.
-
-	  Enable this to support an old 32-bit Android user-space (v4.4 and
-	  earlier).
-
-	  Note that enabling this will break newer Android user-space.
-
 config ANDROID_BINDER_IPC_SELFTEST
 	bool "Android Binder IPC Driver Selftest"
 	depends on ANDROID_BINDER_IPC
diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 41d09b1e93431..9ba376700f123 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -71,10 +71,6 @@
 #include <linux/security.h>
 #include <linux/spinlock.h>
 
-#ifdef CONFIG_ANDROID_BINDER_IPC_32BIT
-#define BINDER_IPC_32BIT 1
-#endif
-
 #include <uapi/linux/android/binder.h>
 #include "binder_alloc.h"
 #include "binder_trace.h"

From 0642c259bda8c5d19b888ca91d640c312886d71d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E5=AE=8B=E9=87=91=E6=97=B6?= <songjinshi@xiaomi.com>
Date: Thu, 10 May 2018 02:05:03 +0000
Subject: [PATCH 0963/1852] UPSTREAM: ANDROID: binder: correct the cmd print
 for BINDER_WORK_RETURN_ERROR

When to execute binder_stat_br the e->cmd has been modifying as BR_OK
instead of the original return error cmd, in fact we want to know the
original return error, such as BR_DEAD_REPLY or BR_FAILED_REPLY, etc.
instead of always BR_OK, in order to avoid the value of the e->cmd is
always BR_OK, so we need assign the value of the e->cmd to cmd before
e->cmd = BR_OK.

Signed-off-by: songjinshi <songjinshi@xiaomi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 838d5565669aa5bb7deb605684a5970d51d5eaf6)

Change-Id: I425b32c5419a491c6b9ceee7c00dde6513e0421d
---
 drivers/android/binder.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 9ba376700f123..3d11983cfaae6 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -4031,6 +4031,7 @@ static int binder_thread_read(struct binder_proc *proc,
 			binder_inner_proc_unlock(proc);
 			if (put_user(e->cmd, (uint32_t __user *)ptr))
 				return -EFAULT;
+			cmd = e->cmd;
 			e->cmd = BR_OK;
 			ptr += sizeof(uint32_t);
 

From 2af14ac8c06bdd9f951125cf2f1f7b7122609e02 Mon Sep 17 00:00:00 2001
From: Minchan Kim <minchan@kernel.org>
Date: Mon, 7 May 2018 23:15:37 +0900
Subject: [PATCH 0964/1852] UPSTREAM: ANDROID: binder: change down_write to
 down_read
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

binder_update_page_range needs down_write of mmap_sem because
vm_insert_page need to change vma->vm_flags to VM_MIXEDMAP unless
it is set. However, when I profile binder working, it seems
every binder buffers should be mapped in advance by binder_mmap.
It means we could set VM_MIXEDMAP in binder_mmap time which is
already hold a mmap_sem as down_write so binder_update_page_range
doesn't need to hold a mmap_sem as down_write.
Please use proper API down_read. It would help mmap_sem contention
problem as well as fixing down_write abuse.

Ganesh Mahendran tested app launching and binder throughput test
and he said he couldn't find any problem and I did binder latency
test per Greg KH request(Thanks Martijn to teach me how I can do)
I cannot find any problem, too.

Cc: Ganesh Mahendran <opensource.ganesh@gmail.com>
Cc: Joe Perches <joe@perches.com>
Cc: Arve Hjønnevåg <arve@android.com>
Cc: Todd Kjos <tkjos@google.com>
Reviewed-by: Martijn Coenen <maco@android.com>
Signed-off-by: Minchan Kim <minchan@kernel.org>
Reviewed-by: Joel Fernandes (Google) <joel@joelfernandes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 720c241924046aff83f5f2323232f34a30a4c281)

Change-Id: I8358ceaaab4030f7122c95308dcad59557cad411
---
 drivers/android/binder.c       | 4 +++-
 drivers/android/binder_alloc.c | 6 +++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 3d11983cfaae6..9b19463fda6a0 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -4836,7 +4836,9 @@ static int binder_mmap(struct file *filp, struct vm_area_struct *vma)
 		failure_string = "bad vm_flags";
 		goto err_bad_arg;
 	}
-	vma->vm_flags = (vma->vm_flags | VM_DONTCOPY) & ~VM_MAYWRITE;
+	vma->vm_flags |= VM_DONTCOPY | VM_MIXEDMAP;
+	vma->vm_flags &= ~VM_MAYWRITE;
+
 	vma->vm_ops = &binder_vm_ops;
 	vma->vm_private_data = proc;
 
diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c
index 16d02de1f7008..1d9db2ef26bdd 100644
--- a/drivers/android/binder_alloc.c
+++ b/drivers/android/binder_alloc.c
@@ -220,7 +220,7 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
 		mm = alloc->vma_vm_mm;
 
 	if (mm) {
-		down_write(&mm->mmap_sem);
+		down_read(&mm->mmap_sem);
 		vma = alloc->vma;
 	}
 
@@ -289,7 +289,7 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
 		/* vm_insert_page does not seem to increment the refcount */
 	}
 	if (mm) {
-		up_write(&mm->mmap_sem);
+		up_read(&mm->mmap_sem);
 		mmput(mm);
 	}
 	return 0;
@@ -322,7 +322,7 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
 	}
 err_no_vma:
 	if (mm) {
-		up_write(&mm->mmap_sem);
+		up_read(&mm->mmap_sem);
 		mmput(mm);
 	}
 	return vma ? -ENOMEM : -ESRCH;

From 84c4714a69c36f21cc01458895aa4df1809669df Mon Sep 17 00:00:00 2001
From: Martijn Coenen <maco@android.com>
Date: Fri, 15 Jun 2018 11:53:36 +0200
Subject: [PATCH 0965/1852] UPSTREAM: Revert "FROMLIST: binder: fix proc->files
 use-after-free"

This reverts commit f09daf140e6e6d3b34e34382bc47a06b854b774e.

Change-Id: I6d340f75e57e1badc5fe3f41e0aa8f148047c7bd
---
 drivers/android/binder.c | 63 +++++++++++++++++++++-------------------
 1 file changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 9b19463fda6a0..b54146a063f18 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -462,8 +462,9 @@ struct binder_ref {
 };
 
 enum binder_deferred_state {
-	BINDER_DEFERRED_FLUSH        = 0x01,
-	BINDER_DEFERRED_RELEASE      = 0x02,
+	BINDER_DEFERRED_PUT_FILES    = 0x01,
+	BINDER_DEFERRED_FLUSH        = 0x02,
+	BINDER_DEFERRED_RELEASE      = 0x04,
 };
 
 /**
@@ -500,6 +501,8 @@ struct binder_priority {
  *                        (invariant after initialized)
  * @tsk                   task_struct for group_leader of process
  *                        (invariant after initialized)
+ * @files                 files_struct for process
+ *                        (invariant after initialized)
  * @deferred_work_node:   element for binder_deferred_list
  *                        (protected by binder_deferred_lock)
  * @deferred_work:        bitmap of deferred work to perform
@@ -544,6 +547,7 @@ struct binder_proc {
 	struct list_head waiting_threads;
 	int pid;
 	struct task_struct *tsk;
+	struct files_struct *files;
 	struct hlist_node deferred_work_node;
 	int deferred_work;
 	bool is_dead;
@@ -891,34 +895,22 @@ static void binder_free_thread(struct binder_thread *thread);
 static void binder_free_proc(struct binder_proc *proc);
 static void binder_inc_node_tmpref_ilocked(struct binder_node *node);
 
-struct files_struct *binder_get_files_struct(struct binder_proc *proc)
-{
-	return get_files_struct(proc->tsk);
-}
-
 static int task_get_unused_fd_flags(struct binder_proc *proc, int flags)
 {
-	struct files_struct *files;
+	struct files_struct *files = proc->files;
 	unsigned long rlim_cur;
 	unsigned long irqs;
-	int ret;
 
-	files = binder_get_files_struct(proc);
 	if (files == NULL)
 		return -ESRCH;
 
-	if (!lock_task_sighand(proc->tsk, &irqs)) {
-		ret = -EMFILE;
-		goto err;
-	}
+	if (!lock_task_sighand(proc->tsk, &irqs))
+		return -EMFILE;
 
 	rlim_cur = task_rlimit(proc->tsk, RLIMIT_NOFILE);
 	unlock_task_sighand(proc->tsk, &irqs);
 
-	ret = __alloc_fd(files, 0, rlim_cur, flags);
-err:
-	put_files_struct(files);
-	return ret;
+	return __alloc_fd(files, 0, rlim_cur, flags);
 }
 
 /*
@@ -927,12 +919,8 @@ static int task_get_unused_fd_flags(struct binder_proc *proc, int flags)
 static void task_fd_install(
 	struct binder_proc *proc, unsigned int fd, struct file *file)
 {
-	struct files_struct *files = binder_get_files_struct(proc);
-
-	if (files) {
-		__fd_install(files, fd, file);
-		put_files_struct(files);
-	}
+	if (proc->files)
+		__fd_install(proc->files, fd, file);
 }
 
 /*
@@ -940,20 +928,18 @@ static void task_fd_install(
  */
 static long task_close_fd(struct binder_proc *proc, unsigned int fd)
 {
-	struct files_struct *files = binder_get_files_struct(proc);
 	int retval;
 
-	if (files == NULL)
+	if (proc->files == NULL)
 		return -ESRCH;
 
-	retval = __close_fd(files, fd);
+	retval = __close_fd(proc->files, fd);
 	/* can't restart close syscall because file table entry was cleared */
 	if (unlikely(retval == -ERESTARTSYS ||
 		     retval == -ERESTARTNOINTR ||
 		     retval == -ERESTARTNOHAND ||
 		     retval == -ERESTART_RESTARTBLOCK))
 		retval = -EINTR;
-	put_files_struct(files);
 
 	return retval;
 }
@@ -4800,6 +4786,7 @@ static void binder_vma_close(struct vm_area_struct *vma)
 		     (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
 		     (unsigned long)pgprot_val(vma->vm_page_prot));
 	binder_alloc_vma_close(&proc->alloc);
+	binder_defer_work(proc, BINDER_DEFERRED_PUT_FILES);
 }
 
 static int binder_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
@@ -4843,8 +4830,10 @@ static int binder_mmap(struct file *filp, struct vm_area_struct *vma)
 	vma->vm_private_data = proc;
 
 	ret = binder_alloc_mmap_handler(&proc->alloc, vma);
-
-	return ret;
+	if (ret)
+		return ret;
+	proc->files = get_files_struct(current);
+	return 0;
 
 err_bad_arg:
 	pr_err("%s: %d %lx-%lx %s failed %d\n", __func__,
@@ -5023,6 +5012,8 @@ static void binder_deferred_release(struct binder_proc *proc)
 	struct rb_node *n;
 	int threads, nodes, incoming_refs, outgoing_refs, active_transactions;
 
+	BUG_ON(proc->files);
+
 	mutex_lock(&binder_procs_lock);
 	hlist_del(&proc->proc_node);
 	mutex_unlock(&binder_procs_lock);
@@ -5104,6 +5095,8 @@ static void binder_deferred_release(struct binder_proc *proc)
 static void binder_deferred_func(struct work_struct *work)
 {
 	struct binder_proc *proc;
+	struct files_struct *files;
+
 	int defer;
 
 	do {
@@ -5120,11 +5113,21 @@ static void binder_deferred_func(struct work_struct *work)
 		}
 		mutex_unlock(&binder_deferred_lock);
 
+		files = NULL;
+		if (defer & BINDER_DEFERRED_PUT_FILES) {
+			files = proc->files;
+			if (files)
+				proc->files = NULL;
+		}
+
 		if (defer & BINDER_DEFERRED_FLUSH)
 			binder_deferred_flush(proc);
 
 		if (defer & BINDER_DEFERRED_RELEASE)
 			binder_deferred_release(proc); /* frees proc */
+
+		if (files)
+			put_files_struct(files);
 	} while (proc);
 }
 static DECLARE_WORK(binder_deferred_work, binder_deferred_func);

From 5739f6dde29e2feb7ff06fabea063cef0f048326 Mon Sep 17 00:00:00 2001
From: Todd Kjos <tkjos@android.com>
Date: Mon, 27 Nov 2017 09:32:33 -0800
Subject: [PATCH 0966/1852] UPSTREAM: binder: fix proc->files use-after-free

proc->files cleanup is initiated by binder_vma_close. Therefore
a reference on the binder_proc is not enough to prevent the
files_struct from being released while the binder_proc still has
a reference. This can lead to an attempt to dereference the
stale pointer obtained from proc->files prior to proc->files
cleanup. This has been seen once in task_get_unused_fd_flags()
when __alloc_fd() is called with a stale "files".

The fix is to protect proc->files with a mutex to prevent cleanup
while in use.

Signed-off-by: Todd Kjos <tkjos@google.com>
Cc: stable <stable@vger.kernel.org> # 4.14
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 7f3dc0088b98533f17128058fac73cd8b2752ef1)

Change-Id: I40982bb0b4615bda5459538c20eb2a913964042c
---
 drivers/android/binder.c | 44 ++++++++++++++++++++++++++++------------
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index b54146a063f18..3905e515d7c88 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -502,7 +502,8 @@ struct binder_priority {
  * @tsk                   task_struct for group_leader of process
  *                        (invariant after initialized)
  * @files                 files_struct for process
- *                        (invariant after initialized)
+ *                        (protected by @files_lock)
+ * @files_lock            mutex to protect @files
  * @deferred_work_node:   element for binder_deferred_list
  *                        (protected by binder_deferred_lock)
  * @deferred_work:        bitmap of deferred work to perform
@@ -548,6 +549,7 @@ struct binder_proc {
 	int pid;
 	struct task_struct *tsk;
 	struct files_struct *files;
+	struct mutex files_lock;
 	struct hlist_node deferred_work_node;
 	int deferred_work;
 	bool is_dead;
@@ -897,20 +899,26 @@ static void binder_inc_node_tmpref_ilocked(struct binder_node *node);
 
 static int task_get_unused_fd_flags(struct binder_proc *proc, int flags)
 {
-	struct files_struct *files = proc->files;
 	unsigned long rlim_cur;
 	unsigned long irqs;
+	int ret;
 
-	if (files == NULL)
-		return -ESRCH;
-
-	if (!lock_task_sighand(proc->tsk, &irqs))
-		return -EMFILE;
-
+	mutex_lock(&proc->files_lock);
+	if (proc->files == NULL) {
+		ret = -ESRCH;
+		goto err;
+	}
+	if (!lock_task_sighand(proc->tsk, &irqs)) {
+		ret = -EMFILE;
+		goto err;
+	}
 	rlim_cur = task_rlimit(proc->tsk, RLIMIT_NOFILE);
 	unlock_task_sighand(proc->tsk, &irqs);
 
-	return __alloc_fd(files, 0, rlim_cur, flags);
+	ret = __alloc_fd(proc->files, 0, rlim_cur, flags);
+err:
+	mutex_unlock(&proc->files_lock);
+	return ret;
 }
 
 /*
@@ -919,8 +927,10 @@ static int task_get_unused_fd_flags(struct binder_proc *proc, int flags)
 static void task_fd_install(
 	struct binder_proc *proc, unsigned int fd, struct file *file)
 {
+	mutex_lock(&proc->files_lock);
 	if (proc->files)
 		__fd_install(proc->files, fd, file);
+	mutex_unlock(&proc->files_lock);
 }
 
 /*
@@ -930,9 +940,11 @@ static long task_close_fd(struct binder_proc *proc, unsigned int fd)
 {
 	int retval;
 
-	if (proc->files == NULL)
-		return -ESRCH;
-
+	mutex_lock(&proc->files_lock);
+	if (proc->files == NULL) {
+		retval = -ESRCH;
+		goto err;
+	}
 	retval = __close_fd(proc->files, fd);
 	/* can't restart close syscall because file table entry was cleared */
 	if (unlikely(retval == -ERESTARTSYS ||
@@ -940,7 +952,8 @@ static long task_close_fd(struct binder_proc *proc, unsigned int fd)
 		     retval == -ERESTARTNOHAND ||
 		     retval == -ERESTART_RESTARTBLOCK))
 		retval = -EINTR;
-
+err:
+	mutex_unlock(&proc->files_lock);
 	return retval;
 }
 
@@ -4832,7 +4845,9 @@ static int binder_mmap(struct file *filp, struct vm_area_struct *vma)
 	ret = binder_alloc_mmap_handler(&proc->alloc, vma);
 	if (ret)
 		return ret;
+	mutex_lock(&proc->files_lock);
 	proc->files = get_files_struct(current);
+	mutex_unlock(&proc->files_lock);
 	return 0;
 
 err_bad_arg:
@@ -4856,6 +4871,7 @@ static int binder_open(struct inode *nodp, struct file *filp)
 	spin_lock_init(&proc->outer_lock);
 	get_task_struct(current->group_leader);
 	proc->tsk = current->group_leader;
+	mutex_init(&proc->files_lock);
 	INIT_LIST_HEAD(&proc->todo);
 	if (binder_supported_policy(current->policy)) {
 		proc->default_priority.sched_policy = current->policy;
@@ -5115,9 +5131,11 @@ static void binder_deferred_func(struct work_struct *work)
 
 		files = NULL;
 		if (defer & BINDER_DEFERRED_PUT_FILES) {
+			mutex_lock(&proc->files_lock);
 			files = proc->files;
 			if (files)
 				proc->files = NULL;
+			mutex_unlock(&proc->files_lock);
 		}
 
 		if (defer & BINDER_DEFERRED_FLUSH)

From 378470849eca7f908ad4c6aeefeb09a1de93bcc1 Mon Sep 17 00:00:00 2001
From: Christian Brauner <christian.brauner@ubuntu.com>
Date: Mon, 21 Aug 2017 16:13:28 +0200
Subject: [PATCH 0967/1852] UPSTREAM: binder: free memory on error

On binder_init() the devices string is duplicated and smashed into individual
device names which are passed along. However, the original duplicated string
wasn't freed in case binder_init() failed. Let's free it on error.

Signed-off-by: Christian Brauner <christian.brauner@ubuntu.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 22eb9476b5d80a393ac0ba235c42bccc90b82c76)

Change-Id: I78fdeecf70c31ba4248b3de17130f97546288f84
---
 drivers/android/binder.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 3905e515d7c88..01cfcac32e5a7 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -5734,7 +5734,7 @@ static int __init init_binder_device(const char *name)
 static int __init binder_init(void)
 {
 	int ret;
-	char *device_name, *device_names;
+	char *device_name, *device_names, *device_tmp;
 	struct binder_device *device;
 	struct hlist_node *tmp;
 
@@ -5792,7 +5792,8 @@ static int __init binder_init(void)
 	}
 	strcpy(device_names, binder_devices_param);
 
-	while ((device_name = strsep(&device_names, ","))) {
+	device_tmp = device_names;
+	while ((device_name = strsep(&device_tmp, ","))) {
 		ret = init_binder_device(device_name);
 		if (ret)
 			goto err_init_binder_device_failed;
@@ -5806,6 +5807,9 @@ static int __init binder_init(void)
 		hlist_del(&device->hlist);
 		kfree(device);
 	}
+
+	kfree(device_names);
+
 err_alloc_device_names_failed:
 	debugfs_remove_recursive(binder_debugfs_dir_entry_root);
 

From 430d16e89909dc4dddd806d8fe98852b157d12f6 Mon Sep 17 00:00:00 2001
From: Todd Kjos <tkjos@android.com>
Date: Wed, 7 Feb 2018 13:57:37 -0800
Subject: [PATCH 0968/1852] UPSTREAM: binder: replace "%p" with "%pK"

The format specifier "%p" can leak kernel addresses. Use
"%pK" instead. There were 4 remaining cases in binder.c.

Signed-off-by: Todd Kjos <tkjos@google.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 8ca86f1639ec5890d400fff9211aca22d0a392eb)

Change-Id: I309241853c53bcdfa65c17cb05876e786597afdd
---
 drivers/android/binder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 01cfcac32e5a7..b0c9d35481239 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -2290,7 +2290,7 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
 	int debug_id = buffer->debug_id;
 
 	binder_debug(BINDER_DEBUG_TRANSACTION,
-		     "%d buffer release %d, size %zd-%zd, failed at %p\n",
+		     "%d buffer release %d, size %zd-%zd, failed at %pK\n",
 		     proc->pid, buffer->debug_id,
 		     buffer->data_size, buffer->offsets_size, failed_at);
 
@@ -3826,7 +3826,7 @@ static int binder_thread_write(struct binder_proc *proc,
 				}
 			}
 			binder_debug(BINDER_DEBUG_DEAD_BINDER,
-				     "%d:%d BC_DEAD_BINDER_DONE %016llx found %p\n",
+				     "%d:%d BC_DEAD_BINDER_DONE %016llx found %pK\n",
 				     proc->pid, thread->pid, (u64)cookie,
 				     death);
 			if (death == NULL) {
@@ -5174,7 +5174,7 @@ static void print_binder_transaction_ilocked(struct seq_file *m,
 	spin_lock(&t->lock);
 	to_proc = t->to_proc;
 	seq_printf(m,
-		   "%s %d: %p from %d:%d to %d:%d code %x flags %x pri %d:%d r%d",
+		   "%s %d: %pK from %d:%d to %d:%d code %x flags %x pri %d:%d r%d",
 		   prefix, t->debug_id, t,
 		   t->from ? t->from->proc->pid : 0,
 		   t->from ? t->from->pid : 0,
@@ -5199,7 +5199,7 @@ static void print_binder_transaction_ilocked(struct seq_file *m,
 	}
 	if (buffer->target_node)
 		seq_printf(m, " node %d", buffer->target_node->debug_id);
-	seq_printf(m, " size %zd:%zd data %p\n",
+	seq_printf(m, " size %zd:%zd data %pK\n",
 		   buffer->data_size, buffer->offsets_size,
 		   buffer->data);
 }

From 8eb1570b8c0a6da20818d4dabf87475c34e2d3ab Mon Sep 17 00:00:00 2001
From: Connor O'Brien <connoro@google.com>
Date: Fri, 13 Jul 2018 14:31:40 -0700
Subject: [PATCH 0969/1852] ANDROID: Reduce use of #ifdef CONFIG_CPU_FREQ_TIMES

Add empty versions of functions to cpufreq_times.h to cut down on use
of #ifdef in .c files.

Test: kernel builds with and without CONFIG_CPU_FREQ_TIMES=y
Change-Id: I49ac364fac3d42bba0ca1801e23b15081094fb12
Signed-off-by: Connor O'Brien <connoro@google.com>
---
 include/linux/cpufreq_times.h | 4 ++++
 kernel/exit.c                 | 3 +--
 kernel/sched/core.c           | 2 --
 kernel/sched/cputime.c        | 5 +----
 4 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/include/linux/cpufreq_times.h b/include/linux/cpufreq_times.h
index 3fb38750c853f..6374d4205a5fc 100644
--- a/include/linux/cpufreq_times.h
+++ b/include/linux/cpufreq_times.h
@@ -31,6 +31,10 @@ void cpufreq_times_record_transition(struct cpufreq_freqs *freq);
 void cpufreq_task_times_remove_uids(uid_t uid_start, uid_t uid_end);
 int single_uid_time_in_state_open(struct inode *inode, struct file *file);
 #else
+static inline void cpufreq_task_times_init(struct task_struct *p) {}
+static inline void cpufreq_task_times_exit(struct task_struct *p) {}
+static inline void cpufreq_acct_update_power(struct task_struct *p,
+					     u64 cputime) {}
 static inline void cpufreq_times_create_policy(struct cpufreq_policy *policy) {}
 static inline void cpufreq_times_record_transition(
 	struct cpufreq_freqs *freq) {}
diff --git a/kernel/exit.c b/kernel/exit.c
index e9bfee5fcce5e..4479af833505b 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -174,9 +174,8 @@ void release_task(struct task_struct *p)
 {
 	struct task_struct *leader;
 	int zap_leader;
-#ifdef CONFIG_CPU_FREQ_TIMES
+
 	cpufreq_task_times_exit(p);
-#endif
 repeat:
 	/* don't need to get the RCU readlock here - the process is dead and
 	 * can't be modifying its own credentials. But shut RCU-lockdep up */
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index abaf6d5488e44..93eaa4570601c 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2199,9 +2199,7 @@ static void __sched_fork(unsigned long clone_flags, struct task_struct *p)
 	memset(&p->se.statistics, 0, sizeof(p->se.statistics));
 #endif
 
-#ifdef CONFIG_CPU_FREQ_TIMES
 	cpufreq_task_times_init(p);
-#endif
 
 	RB_CLEAR_NODE(&p->dl.rb_node);
 	init_dl_task_timer(&p->dl);
diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c
index c0763cba909da..fc2cfd6b2941d 100644
--- a/kernel/sched/cputime.c
+++ b/kernel/sched/cputime.c
@@ -167,10 +167,8 @@ void account_user_time(struct task_struct *p, cputime_t cputime,
 	/* Account for user time used */
 	acct_account_cputime(p);
 
-#ifdef CONFIG_CPU_FREQ_TIMES
 	/* Account power usage for user time */
 	cpufreq_acct_update_power(p, cputime);
-#endif
 }
 
 /*
@@ -221,10 +219,9 @@ void __account_system_time(struct task_struct *p, cputime_t cputime,
 
 	/* Account for system time used */
 	acct_account_cputime(p);
-#ifdef CONFIG_CPU_FREQ_TIMES
+
 	/* Account power usage for system time */
 	cpufreq_acct_update_power(p, cputime);
-#endif
 }
 
 /*

From a0f94c5cbd461a277d1ba2e19bdb35896f7a1b50 Mon Sep 17 00:00:00 2001
From: Sultan Alsawaf <sultanxda@gmail.com>
Date: Sun, 3 Jun 2018 10:47:51 -0700
Subject: [PATCH 0970/1852] ANDROID: Fix massive cpufreq_times memory leaks

Every time _cpu_up() is called for a CPU, idle_thread_get() is called
which then re-initializes a CPU's idle thread that was already
previously created and cached in a global variable in
smpboot.c. idle_thread_get() calls init_idle() which then calls
__sched_fork(). __sched_fork() is where cpufreq_task_times_init() is,
and cpufreq_task_times_init() allocates memory for the task struct's
time_in_state array.

Since idle_thread_get() reuses a task struct instance that was already
previously created, this means that every time it calls init_idle(),
cpufreq_task_times_init() allocates this array again and overwrites
the existing allocation that the idle thread already had.

This causes memory to be leaked every time a CPU is onlined. In order
to fix this, move allocation of time_in_state into _do_fork to avoid
allocating it at all for idle threads. The cpufreq times interface is
intended to be used for tracking userspace tasks, so we can safely
remove it from the kernel's idle threads without killing any
functionality.

But that's not all!

Task structs can be freed outside of release_task(), which creates
another memory leak because a task struct can be freed without having
its cpufreq times allocation freed. To fix this, free the cpufreq
times allocation at the same time that task struct allocations are
freed, in free_task().

Since free_task() can also be called in error paths of copy_process()
after dup_task_struct(), set time_in_state to NULL immediately after
calling dup_task_struct() to avoid possible double free.

Bug description and fix adapted from patch submitted by
Sultan Alsawaf <sultanxda@gmail.com> at
https://android-review.googlesource.com/c/kernel/msm/+/700134

Bug: 110044919
Test: Hikey960 builds, boots & reports /proc/<pid>/time_in_state
correctly
Change-Id: I12fe7611fc88eb7f6c39f8f7629ad27b6ec4722c
Signed-off-by: Connor O'Brien <connoro@google.com>
---
 drivers/cpufreq/cpufreq_times.c | 9 ++++++---
 include/linux/cpufreq_times.h   | 2 ++
 kernel/exit.c                   | 3 ---
 kernel/fork.c                   | 6 ++++++
 kernel/sched/core.c             | 2 --
 5 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/cpufreq/cpufreq_times.c b/drivers/cpufreq/cpufreq_times.c
index e5df7a47cc167..e7a8b636a5f45 100644
--- a/drivers/cpufreq/cpufreq_times.c
+++ b/drivers/cpufreq/cpufreq_times.c
@@ -234,16 +234,19 @@ static int uid_time_in_state_seq_show(struct seq_file *m, void *v)
 
 void cpufreq_task_times_init(struct task_struct *p)
 {
-	void *temp;
 	unsigned long flags;
-	unsigned int max_state;
 
 	spin_lock_irqsave(&task_time_in_state_lock, flags);
 	p->time_in_state = NULL;
 	spin_unlock_irqrestore(&task_time_in_state_lock, flags);
 	p->max_state = 0;
+}
 
-	max_state = READ_ONCE(next_offset);
+void cpufreq_task_times_alloc(struct task_struct *p)
+{
+	void *temp;
+	unsigned long flags;
+	unsigned int max_state = READ_ONCE(next_offset);
 
 	/* We use one array to avoid multiple allocs per task */
 	temp = kcalloc(max_state, sizeof(p->time_in_state[0]), GFP_ATOMIC);
diff --git a/include/linux/cpufreq_times.h b/include/linux/cpufreq_times.h
index 6374d4205a5fc..356a3fad03c9d 100644
--- a/include/linux/cpufreq_times.h
+++ b/include/linux/cpufreq_times.h
@@ -22,6 +22,7 @@
 
 #ifdef CONFIG_CPU_FREQ_TIMES
 void cpufreq_task_times_init(struct task_struct *p);
+void cpufreq_task_times_alloc(struct task_struct *p);
 void cpufreq_task_times_exit(struct task_struct *p);
 int proc_time_in_state_show(struct seq_file *m, struct pid_namespace *ns,
 			    struct pid *pid, struct task_struct *p);
@@ -32,6 +33,7 @@ void cpufreq_task_times_remove_uids(uid_t uid_start, uid_t uid_end);
 int single_uid_time_in_state_open(struct inode *inode, struct file *file);
 #else
 static inline void cpufreq_task_times_init(struct task_struct *p) {}
+static inline void cpufreq_task_times_alloc(struct task_struct *p) {}
 static inline void cpufreq_task_times_exit(struct task_struct *p) {}
 static inline void cpufreq_acct_update_power(struct task_struct *p,
 					     u64 cputime) {}
diff --git a/kernel/exit.c b/kernel/exit.c
index 4479af833505b..e57bff761b88e 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -54,7 +54,6 @@
 #include <linux/writeback.h>
 #include <linux/shm.h>
 #include <linux/kcov.h>
-#include <linux/cpufreq_times.h>
 
 #include "sched/tune.h"
 
@@ -174,8 +173,6 @@ void release_task(struct task_struct *p)
 {
 	struct task_struct *leader;
 	int zap_leader;
-
-	cpufreq_task_times_exit(p);
 repeat:
 	/* don't need to get the RCU readlock here - the process is dead and
 	 * can't be modifying its own credentials. But shut RCU-lockdep up */
diff --git a/kernel/fork.c b/kernel/fork.c
index a24b96015538f..80445ca0420b3 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -77,6 +77,7 @@
 #include <linux/compiler.h>
 #include <linux/sysctl.h>
 #include <linux/kcov.h>
+#include <linux/cpufreq_times.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -226,6 +227,7 @@ static void account_kernel_stack(unsigned long *stack, int account)
 
 void free_task(struct task_struct *tsk)
 {
+	cpufreq_task_times_exit(tsk);
 	account_kernel_stack(tsk->stack, -1);
 	arch_release_thread_stack(tsk->stack);
 	free_thread_stack(tsk->stack);
@@ -1360,6 +1362,8 @@ static struct task_struct *copy_process(unsigned long clone_flags,
 	if (!p)
 		goto fork_out;
 
+	cpufreq_task_times_init(p);
+
 	ftrace_graph_init_task(p);
 
 	rt_mutex_init_task(p);
@@ -1791,6 +1795,8 @@ long _do_fork(unsigned long clone_flags,
 		struct completion vfork;
 		struct pid *pid;
 
+		cpufreq_task_times_alloc(p);
+
 		trace_sched_process_fork(current, p);
 
 		pid = get_task_pid(p, PIDTYPE_PID);
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 93eaa4570601c..131a1711c96b1 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2199,8 +2199,6 @@ static void __sched_fork(unsigned long clone_flags, struct task_struct *p)
 	memset(&p->se.statistics, 0, sizeof(p->se.statistics));
 #endif
 
-	cpufreq_task_times_init(p);
-
 	RB_CLEAR_NODE(&p->dl.rb_node);
 	init_dl_task_timer(&p->dl);
 	__dl_clear_params(p);

From 3681ca231dfae1fba3a7d10ff4ce46a789738fed Mon Sep 17 00:00:00 2001
From: David Rientjes <rientjes@google.com>
Date: Tue, 6 Jun 2017 13:36:24 -0700
Subject: [PATCH 0971/1852] compiler, clang: suppress warning for unused static
 inline functions

commit abb2ea7dfd82451d85ce669b811310c05ab5ca46 upstream.

GCC explicitly does not warn for unused static inline functions for
-Wunused-function.  The manual states:

	Warn whenever a static function is declared but not defined or
	a non-inline static function is unused.

Clang does warn for static inline functions that are unused.

It turns out that suppressing the warnings avoids potentially complex
#ifdef directives, which also reduces LOC.

Suppress the warning for clang.

Signed-off-by: David Rientjes <rientjes@google.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/compiler-clang.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/linux/compiler-clang.h b/include/linux/compiler-clang.h
index de179993e039d..ea9126006a69f 100644
--- a/include/linux/compiler-clang.h
+++ b/include/linux/compiler-clang.h
@@ -15,3 +15,10 @@
  * with any version that can compile the kernel
  */
 #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
+
+/*
+ * GCC does not warn about unused static inline functions for
+ * -Wunused-function.  This turns out to avoid the need for complex #ifdef
+ * directives.  Suppress the warning in clang as well.
+ */
+#define inline inline __attribute__((unused))

From cd1a7735add384f9366645c265c580641759bbcc Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun, 11 Jun 2017 15:51:56 -0700
Subject: [PATCH 0972/1852] compiler, clang: properly override 'inline' for
 clang

commit 6d53cefb18e4646fb4bf62ccb6098fb3808486df upstream.

Commit abb2ea7dfd82 ("compiler, clang: suppress warning for unused
static inline functions") just caused more warnings due to re-defining
the 'inline' macro.

So undef it before re-defining it, and also add the 'notrace' attribute
like the gcc version that this is overriding does.

Maybe this makes clang happier.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/compiler-clang.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/linux/compiler-clang.h b/include/linux/compiler-clang.h
index ea9126006a69f..d614c5ea1b5ea 100644
--- a/include/linux/compiler-clang.h
+++ b/include/linux/compiler-clang.h
@@ -21,4 +21,5 @@
  * -Wunused-function.  This turns out to avoid the need for complex #ifdef
  * directives.  Suppress the warning in clang as well.
  */
-#define inline inline __attribute__((unused))
+#undef inline
+#define inline inline __attribute__((unused)) notrace

From d47552bb96b087e95a4505b7a2d308ac0ca72c43 Mon Sep 17 00:00:00 2001
From: David Rientjes <rientjes@google.com>
Date: Thu, 6 Jul 2017 15:35:24 -0700
Subject: [PATCH 0973/1852] compiler, clang: always inline when
 CONFIG_OPTIMIZE_INLINING is disabled

commit 9a04dbcfb33b4012d0ce8c0282f1e3ca694675b1 upstream.

The motivation for commit abb2ea7dfd82 ("compiler, clang: suppress
warning for unused static inline functions") was to suppress clang's
warnings about unused static inline functions.

For configs without CONFIG_OPTIMIZE_INLINING enabled, such as any non-x86
architecture, `inline' in the kernel implies that
__attribute__((always_inline)) is used.

Some code depends on that behavior, see
  https://lkml.org/lkml/2017/6/13/918:

  net/built-in.o: In function `__xchg_mb':
  arch/arm64/include/asm/cmpxchg.h:99: undefined reference to `__compiletime_assert_99'
  arch/arm64/include/asm/cmpxchg.h:99: undefined reference to `__compiletime_assert_99

The full fix would be to identify these breakages and annotate the
functions with __always_inline instead of `inline'.  But since we are
late in the 4.12-rc cycle, simply carry forward the forced inlining
behavior and work toward moving arm64, and other architectures, toward
CONFIG_OPTIMIZE_INLINING behavior.

Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1706261552200.1075@chino.kir.corp.google.com
Signed-off-by: David Rientjes <rientjes@google.com>
Reported-by: Sodagudi Prasad <psodagud@codeaurora.org>
Tested-by: Sodagudi Prasad <psodagud@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/compiler-clang.h | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/include/linux/compiler-clang.h b/include/linux/compiler-clang.h
index d614c5ea1b5ea..de179993e039d 100644
--- a/include/linux/compiler-clang.h
+++ b/include/linux/compiler-clang.h
@@ -15,11 +15,3 @@
  * with any version that can compile the kernel
  */
 #define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__)
-
-/*
- * GCC does not warn about unused static inline functions for
- * -Wunused-function.  This turns out to avoid the need for complex #ifdef
- * directives.  Suppress the warning in clang as well.
- */
-#undef inline
-#define inline inline __attribute__((unused)) notrace

From e2a7f87c89e921a54b5696edcf3e3b0b2b194ff8 Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers@google.com>
Date: Thu, 21 Jun 2018 09:23:22 -0700
Subject: [PATCH 0974/1852] compiler-gcc.h: Add __attribute__((gnu_inline)) to
 all inline declarations

commit d03db2bc26f0e4a6849ad649a09c9c73fccdc656 upstream.

Functions marked extern inline do not emit an externally visible
function when the gnu89 C standard is used. Some KBUILD Makefiles
overwrite KBUILD_CFLAGS. This is an issue for GCC 5.1+ users as without
an explicit C standard specified, the default is gnu11. Since c99, the
semantics of extern inline have changed such that an externally visible
function is always emitted. This can lead to multiple definition errors
of extern inline functions at link time of compilation units whose build
files have removed an explicit C standard compiler flag for users of GCC
5.1+ or Clang.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: H. Peter Anvin <hpa@zytor.com>
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@redhat.com
Cc: akataria@vmware.com
Cc: akpm@linux-foundation.org
Cc: andrea.parri@amarulasolutions.com
Cc: ard.biesheuvel@linaro.org
Cc: aryabinin@virtuozzo.com
Cc: astrachan@google.com
Cc: boris.ostrovsky@oracle.com
Cc: brijesh.singh@amd.com
Cc: caoj.fnst@cn.fujitsu.com
Cc: geert@linux-m68k.org
Cc: ghackmann@google.com
Cc: gregkh@linuxfoundation.org
Cc: jan.kiszka@siemens.com
Cc: jarkko.sakkinen@linux.intel.com
Cc: jpoimboe@redhat.com
Cc: keescook@google.com
Cc: kirill.shutemov@linux.intel.com
Cc: kstewart@linuxfoundation.org
Cc: linux-efi@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Cc: manojgupta@google.com
Cc: mawilcox@microsoft.com
Cc: michal.lkml@markovi.net
Cc: mjg59@google.com
Cc: mka@chromium.org
Cc: pombredanne@nexb.com
Cc: rientjes@google.com
Cc: rostedt@goodmis.org
Cc: sedat.dilek@gmail.com
Cc: thomas.lendacky@amd.com
Cc: tstellar@redhat.com
Cc: tweek@google.com
Cc: virtualization@lists.linux-foundation.org
Cc: will.deacon@arm.com
Cc: yamada.masahiro@socionext.com
Link: http://lkml.kernel.org/r/20180621162324.36656-2-ndesaulniers@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/compiler-gcc.h | 29 ++++++++++++++++++++++-------
 1 file changed, 22 insertions(+), 7 deletions(-)

diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h
index 557dae96ce740..143d40e8a1ea6 100644
--- a/include/linux/compiler-gcc.h
+++ b/include/linux/compiler-gcc.h
@@ -64,6 +64,18 @@
 #define __must_be_array(a)	BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
 #endif
 
+/*
+ * Feature detection for gnu_inline (gnu89 extern inline semantics). Either
+ * __GNUC_STDC_INLINE__ is defined (not using gnu89 extern inline semantics,
+ * and we opt in to the gnu89 semantics), or __GNUC_STDC_INLINE__ is not
+ * defined so the gnu89 semantics are the default.
+ */
+#ifdef __GNUC_STDC_INLINE__
+# define __gnu_inline	__attribute__((gnu_inline))
+#else
+# define __gnu_inline
+#endif
+
 /*
  * Force always-inline if the user requests it so via the .config,
  * or if gcc is too old.
@@ -71,19 +83,22 @@
  * -Wunused-function.  This turns out to avoid the need for complex #ifdef
  * directives.  Suppress the warning in clang as well by using "unused"
  * function attribute, which is redundant but not harmful for gcc.
+ * Prefer gnu_inline, so that extern inline functions do not emit an
+ * externally visible function. This makes extern inline behave as per gnu89
+ * semantics rather than c99. This prevents multiple symbol definition errors
+ * of extern inline functions at link time.
+ * A lot of inline functions can cause havoc with function tracing.
  */
 #if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) ||		\
     !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4)
-#define inline inline		__attribute__((always_inline,unused)) notrace
-#define __inline__ __inline__	__attribute__((always_inline,unused)) notrace
-#define __inline __inline	__attribute__((always_inline,unused)) notrace
+#define inline \
+	inline __attribute__((always_inline, unused)) notrace __gnu_inline
 #else
-/* A lot of inline functions can cause havoc with function tracing */
-#define inline inline		__attribute__((unused)) notrace
-#define __inline__ __inline__	__attribute__((unused)) notrace
-#define __inline __inline	__attribute__((unused)) notrace
+#define inline inline		__attribute__((unused)) notrace __gnu_inline
 #endif
 
+#define __inline__ inline
+#define __inline inline
 #define __always_inline	inline __attribute__((always_inline))
 #define  noinline	__attribute__((noinline))
 

From 55f7b91bcdab153b46dd1aafdfed80d261955a2d Mon Sep 17 00:00:00 2001
From: "H. Peter Anvin" <hpa@linux.intel.com>
Date: Thu, 21 Jun 2018 09:23:23 -0700
Subject: [PATCH 0975/1852] x86/asm: Add _ASM_ARG* constants for argument
 registers to <asm/asm.h>

commit 0e2e160033283e20f688d8bad5b89460cc5bfcc4 upstream.

i386 and x86-64 uses different registers for arguments; make them
available so we don't have to #ifdef in the actual code.

Native size and specified size (q, l, w, b) versions are provided.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Sedat Dilek <sedat.dilek@gmail.com>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@redhat.com
Cc: akataria@vmware.com
Cc: akpm@linux-foundation.org
Cc: andrea.parri@amarulasolutions.com
Cc: ard.biesheuvel@linaro.org
Cc: arnd@arndb.de
Cc: aryabinin@virtuozzo.com
Cc: astrachan@google.com
Cc: boris.ostrovsky@oracle.com
Cc: brijesh.singh@amd.com
Cc: caoj.fnst@cn.fujitsu.com
Cc: geert@linux-m68k.org
Cc: ghackmann@google.com
Cc: gregkh@linuxfoundation.org
Cc: jan.kiszka@siemens.com
Cc: jarkko.sakkinen@linux.intel.com
Cc: joe@perches.com
Cc: jpoimboe@redhat.com
Cc: keescook@google.com
Cc: kirill.shutemov@linux.intel.com
Cc: kstewart@linuxfoundation.org
Cc: linux-efi@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Cc: manojgupta@google.com
Cc: mawilcox@microsoft.com
Cc: michal.lkml@markovi.net
Cc: mjg59@google.com
Cc: mka@chromium.org
Cc: pombredanne@nexb.com
Cc: rientjes@google.com
Cc: rostedt@goodmis.org
Cc: thomas.lendacky@amd.com
Cc: tstellar@redhat.com
Cc: tweek@google.com
Cc: virtualization@lists.linux-foundation.org
Cc: will.deacon@arm.com
Cc: yamada.masahiro@socionext.com
Link: http://lkml.kernel.org/r/20180621162324.36656-3-ndesaulniers@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/asm.h | 59 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
index 858f8c354cead..f3d4f1edc9478 100644
--- a/arch/x86/include/asm/asm.h
+++ b/arch/x86/include/asm/asm.h
@@ -45,6 +45,65 @@
 #define _ASM_SI		__ASM_REG(si)
 #define _ASM_DI		__ASM_REG(di)
 
+#ifndef __x86_64__
+/* 32 bit */
+
+#define _ASM_ARG1	_ASM_AX
+#define _ASM_ARG2	_ASM_DX
+#define _ASM_ARG3	_ASM_CX
+
+#define _ASM_ARG1L	eax
+#define _ASM_ARG2L	edx
+#define _ASM_ARG3L	ecx
+
+#define _ASM_ARG1W	ax
+#define _ASM_ARG2W	dx
+#define _ASM_ARG3W	cx
+
+#define _ASM_ARG1B	al
+#define _ASM_ARG2B	dl
+#define _ASM_ARG3B	cl
+
+#else
+/* 64 bit */
+
+#define _ASM_ARG1	_ASM_DI
+#define _ASM_ARG2	_ASM_SI
+#define _ASM_ARG3	_ASM_DX
+#define _ASM_ARG4	_ASM_CX
+#define _ASM_ARG5	r8
+#define _ASM_ARG6	r9
+
+#define _ASM_ARG1Q	rdi
+#define _ASM_ARG2Q	rsi
+#define _ASM_ARG3Q	rdx
+#define _ASM_ARG4Q	rcx
+#define _ASM_ARG5Q	r8
+#define _ASM_ARG6Q	r9
+
+#define _ASM_ARG1L	edi
+#define _ASM_ARG2L	esi
+#define _ASM_ARG3L	edx
+#define _ASM_ARG4L	ecx
+#define _ASM_ARG5L	r8d
+#define _ASM_ARG6L	r9d
+
+#define _ASM_ARG1W	di
+#define _ASM_ARG2W	si
+#define _ASM_ARG3W	dx
+#define _ASM_ARG4W	cx
+#define _ASM_ARG5W	r8w
+#define _ASM_ARG6W	r9w
+
+#define _ASM_ARG1B	dil
+#define _ASM_ARG2B	sil
+#define _ASM_ARG3B	dl
+#define _ASM_ARG4B	cl
+#define _ASM_ARG5B	r8b
+#define _ASM_ARG6B	r9b
+
+#endif
+
 /* Exception table entry */
 #ifdef __ASSEMBLY__
 # define _ASM_EXTABLE(from,to)					\

From 07008fe2522563c06fbaf0525043f0b798bf612a Mon Sep 17 00:00:00 2001
From: "David S. Miller" <davem@davemloft.net>
Date: Tue, 6 Jun 2017 11:34:06 -0400
Subject: [PATCH 0976/1852] Revert "sit: reload iphdr in ipip6_rcv"

commit f4eb17e1efe538d4da7d574bedb00a8dafcc26b7 upstream.

This reverts commit b699d0035836f6712917a41e7ae58d84359b8ff9.

As per Eric Dumazet, the pskb_may_pull() is a NOP in this
particular case, so the 'iph' reload is unnecessary.

Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Dmitry Tunin <hanipouspilot@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/sit.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index dec4e7bda5f37..11282ffca567a 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -692,7 +692,6 @@ static int ipip6_rcv(struct sk_buff *skb)
 
 		if (iptunnel_pull_header(skb, 0, htons(ETH_P_IPV6)))
 			goto out;
-		iph = ip_hdr(skb);
 
 		err = IP_ECN_decapsulate(iph, skb);
 		if (unlikely(err)) {

From 1324db3992967d5097e85d9a6cea51270e9b2518 Mon Sep 17 00:00:00 2001
From: alex chen <alex.chen@huawei.com>
Date: Wed, 15 Nov 2017 17:31:48 -0800
Subject: [PATCH 0977/1852] ocfs2: subsystem.su_mutex is required while
 accessing the item->ci_parent

commit 853bc26a7ea39e354b9f8889ae7ad1492ffa28d2 upstream.

The subsystem.su_mutex is required while accessing the item->ci_parent,
otherwise, NULL pointer dereference to the item->ci_parent will be
triggered in the following situation:

add node                     delete node
sys_write
 vfs_write
  configfs_write_file
   o2nm_node_store
    o2nm_node_local_write
                             do_rmdir
                              vfs_rmdir
                               configfs_rmdir
                                mutex_lock(&subsys->su_mutex);
                                unlink_obj
                                 item->ci_group = NULL;
                                 item->ci_parent = NULL;
	 to_o2nm_cluster_from_node
	  node->nd_item.ci_parent->ci_parent
	  BUG since of NULL pointer dereference to nd_item.ci_parent

Moreover, the o2nm_cluster also should be protected by the
subsystem.su_mutex.

[alex.chen@huawei.com: v2]
  Link: http://lkml.kernel.org/r/59EEAA69.9080703@huawei.com
Link: http://lkml.kernel.org/r/59E9B36A.10700@huawei.com
Signed-off-by: Alex Chen <alex.chen@huawei.com>
Reviewed-by: Jun Piao <piaojun@huawei.com>
Reviewed-by: Joseph Qi <jiangqi903@gmail.com>
Cc: Mark Fasheh <mfasheh@versity.com>
Cc: Joel Becker <jlbec@evilplan.org>
Cc: Junxiao Bi <junxiao.bi@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Salvatore Bonaccorso <carnil@debian.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ocfs2/cluster/nodemanager.c | 63 +++++++++++++++++++++++++++++-----
 1 file changed, 55 insertions(+), 8 deletions(-)

diff --git a/fs/ocfs2/cluster/nodemanager.c b/fs/ocfs2/cluster/nodemanager.c
index 72afdca3cea70..3c45a9301a096 100644
--- a/fs/ocfs2/cluster/nodemanager.c
+++ b/fs/ocfs2/cluster/nodemanager.c
@@ -40,6 +40,9 @@ char *o2nm_fence_method_desc[O2NM_FENCE_METHODS] = {
 		"panic",	/* O2NM_FENCE_PANIC */
 };
 
+static inline void o2nm_lock_subsystem(void);
+static inline void o2nm_unlock_subsystem(void);
+
 struct o2nm_node *o2nm_get_node_by_num(u8 node_num)
 {
 	struct o2nm_node *node = NULL;
@@ -181,7 +184,10 @@ static struct o2nm_cluster *to_o2nm_cluster_from_node(struct o2nm_node *node)
 {
 	/* through the first node_set .parent
 	 * mycluster/nodes/mynode == o2nm_cluster->o2nm_node_group->o2nm_node */
-	return to_o2nm_cluster(node->nd_item.ci_parent->ci_parent);
+	if (node->nd_item.ci_parent)
+		return to_o2nm_cluster(node->nd_item.ci_parent->ci_parent);
+	else
+		return NULL;
 }
 
 enum {
@@ -194,7 +200,7 @@ static ssize_t o2nm_node_num_store(struct config_item *item, const char *page,
 				   size_t count)
 {
 	struct o2nm_node *node = to_o2nm_node(item);
-	struct o2nm_cluster *cluster = to_o2nm_cluster_from_node(node);
+	struct o2nm_cluster *cluster;
 	unsigned long tmp;
 	char *p = (char *)page;
 	int ret = 0;
@@ -214,6 +220,13 @@ static ssize_t o2nm_node_num_store(struct config_item *item, const char *page,
 	    !test_bit(O2NM_NODE_ATTR_PORT, &node->nd_set_attributes))
 		return -EINVAL; /* XXX */
 
+	o2nm_lock_subsystem();
+	cluster = to_o2nm_cluster_from_node(node);
+	if (!cluster) {
+		o2nm_unlock_subsystem();
+		return -EINVAL;
+	}
+
 	write_lock(&cluster->cl_nodes_lock);
 	if (cluster->cl_nodes[tmp])
 		ret = -EEXIST;
@@ -226,6 +239,8 @@ static ssize_t o2nm_node_num_store(struct config_item *item, const char *page,
 		set_bit(tmp, cluster->cl_nodes_bitmap);
 	}
 	write_unlock(&cluster->cl_nodes_lock);
+	o2nm_unlock_subsystem();
+
 	if (ret)
 		return ret;
 
@@ -269,7 +284,7 @@ static ssize_t o2nm_node_ipv4_address_store(struct config_item *item,
 					    size_t count)
 {
 	struct o2nm_node *node = to_o2nm_node(item);
-	struct o2nm_cluster *cluster = to_o2nm_cluster_from_node(node);
+	struct o2nm_cluster *cluster;
 	int ret, i;
 	struct rb_node **p, *parent;
 	unsigned int octets[4];
@@ -286,6 +301,13 @@ static ssize_t o2nm_node_ipv4_address_store(struct config_item *item,
 		be32_add_cpu(&ipv4_addr, octets[i] << (i * 8));
 	}
 
+	o2nm_lock_subsystem();
+	cluster = to_o2nm_cluster_from_node(node);
+	if (!cluster) {
+		o2nm_unlock_subsystem();
+		return -EINVAL;
+	}
+
 	ret = 0;
 	write_lock(&cluster->cl_nodes_lock);
 	if (o2nm_node_ip_tree_lookup(cluster, ipv4_addr, &p, &parent))
@@ -298,6 +320,8 @@ static ssize_t o2nm_node_ipv4_address_store(struct config_item *item,
 		rb_insert_color(&node->nd_ip_node, &cluster->cl_node_ip_tree);
 	}
 	write_unlock(&cluster->cl_nodes_lock);
+	o2nm_unlock_subsystem();
+
 	if (ret)
 		return ret;
 
@@ -315,7 +339,7 @@ static ssize_t o2nm_node_local_store(struct config_item *item, const char *page,
 				     size_t count)
 {
 	struct o2nm_node *node = to_o2nm_node(item);
-	struct o2nm_cluster *cluster = to_o2nm_cluster_from_node(node);
+	struct o2nm_cluster *cluster;
 	unsigned long tmp;
 	char *p = (char *)page;
 	ssize_t ret;
@@ -333,17 +357,26 @@ static ssize_t o2nm_node_local_store(struct config_item *item, const char *page,
 	    !test_bit(O2NM_NODE_ATTR_PORT, &node->nd_set_attributes))
 		return -EINVAL; /* XXX */
 
+	o2nm_lock_subsystem();
+	cluster = to_o2nm_cluster_from_node(node);
+	if (!cluster) {
+		ret = -EINVAL;
+		goto out;
+	}
+
 	/* the only failure case is trying to set a new local node
 	 * when a different one is already set */
 	if (tmp && tmp == cluster->cl_has_local &&
-	    cluster->cl_local_node != node->nd_num)
-		return -EBUSY;
+	    cluster->cl_local_node != node->nd_num) {
+		ret = -EBUSY;
+		goto out;
+	}
 
 	/* bring up the rx thread if we're setting the new local node. */
 	if (tmp && !cluster->cl_has_local) {
 		ret = o2net_start_listening(node);
 		if (ret)
-			return ret;
+			goto out;
 	}
 
 	if (!tmp && cluster->cl_has_local &&
@@ -358,7 +391,11 @@ static ssize_t o2nm_node_local_store(struct config_item *item, const char *page,
 		cluster->cl_local_node = node->nd_num;
 	}
 
-	return count;
+	ret = count;
+
+out:
+	o2nm_unlock_subsystem();
+	return ret;
 }
 
 CONFIGFS_ATTR(o2nm_node_, num);
@@ -750,6 +787,16 @@ static struct o2nm_cluster_group o2nm_cluster_group = {
 	},
 };
 
+static inline void o2nm_lock_subsystem(void)
+{
+	mutex_lock(&o2nm_cluster_group.cs_subsys.su_mutex);
+}
+
+static inline void o2nm_unlock_subsystem(void)
+{
+	mutex_unlock(&o2nm_cluster_group.cs_subsys.su_mutex);
+}
+
 int o2nm_depend_item(struct config_item *item)
 {
 	return configfs_depend_item(&o2nm_cluster_group.cs_subsys, item);

From 03c8cf13b9d84302f6b61d0e38269ba84a1050cf Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 1 Oct 2017 13:02:15 +0200
Subject: [PATCH 0978/1852] bcm63xx_enet: correct clock usage

commit 9c86b846ce02f7e35d7234cf090b80553eba5389 upstream.

Check the return code of prepare_enable and change one last instance of
enable only to prepare_enable. Also properly disable and release the
clock in error paths and on remove for enetsw.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bcm63xx_enet.c | 31 +++++++++++++++-----
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index 8b1929e9f698c..ee4f38d0c1051 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -1787,7 +1787,9 @@ static int bcm_enet_probe(struct platform_device *pdev)
 		ret = PTR_ERR(priv->mac_clk);
 		goto out;
 	}
-	clk_prepare_enable(priv->mac_clk);
+	ret = clk_prepare_enable(priv->mac_clk);
+	if (ret)
+		goto out_put_clk_mac;
 
 	/* initialize default and fetch platform data */
 	priv->rx_ring_size = BCMENET_DEF_RX_DESC;
@@ -1819,9 +1821,11 @@ static int bcm_enet_probe(struct platform_device *pdev)
 		if (IS_ERR(priv->phy_clk)) {
 			ret = PTR_ERR(priv->phy_clk);
 			priv->phy_clk = NULL;
-			goto out_put_clk_mac;
+			goto out_disable_clk_mac;
 		}
-		clk_prepare_enable(priv->phy_clk);
+		ret = clk_prepare_enable(priv->phy_clk);
+		if (ret)
+			goto out_put_clk_phy;
 	}
 
 	/* do minimal hardware init to be able to probe mii bus */
@@ -1921,13 +1925,16 @@ static int bcm_enet_probe(struct platform_device *pdev)
 out_uninit_hw:
 	/* turn off mdc clock */
 	enet_writel(priv, 0, ENET_MIISC_REG);
-	if (priv->phy_clk) {
+	if (priv->phy_clk)
 		clk_disable_unprepare(priv->phy_clk);
+
+out_put_clk_phy:
+	if (priv->phy_clk)
 		clk_put(priv->phy_clk);
-	}
 
-out_put_clk_mac:
+out_disable_clk_mac:
 	clk_disable_unprepare(priv->mac_clk);
+out_put_clk_mac:
 	clk_put(priv->mac_clk);
 out:
 	free_netdev(dev);
@@ -2772,7 +2779,9 @@ static int bcm_enetsw_probe(struct platform_device *pdev)
 		ret = PTR_ERR(priv->mac_clk);
 		goto out_unmap;
 	}
-	clk_enable(priv->mac_clk);
+	ret = clk_prepare_enable(priv->mac_clk);
+	if (ret)
+		goto out_put_clk;
 
 	priv->rx_chan = 0;
 	priv->tx_chan = 1;
@@ -2793,7 +2802,7 @@ static int bcm_enetsw_probe(struct platform_device *pdev)
 
 	ret = register_netdev(dev);
 	if (ret)
-		goto out_put_clk;
+		goto out_disable_clk;
 
 	netif_carrier_off(dev);
 	platform_set_drvdata(pdev, dev);
@@ -2802,6 +2811,9 @@ static int bcm_enetsw_probe(struct platform_device *pdev)
 
 	return 0;
 
+out_disable_clk:
+	clk_disable_unprepare(priv->mac_clk);
+
 out_put_clk:
 	clk_put(priv->mac_clk);
 
@@ -2833,6 +2845,9 @@ static int bcm_enetsw_remove(struct platform_device *pdev)
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	release_mem_region(res->start, resource_size(res));
 
+	clk_disable_unprepare(priv->mac_clk);
+	clk_put(priv->mac_clk);
+
 	free_netdev(dev);
 	return 0;
 }

From 02788cbbda228e3e843ffe025a770ddfdc2f4449 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 1 Oct 2017 13:02:16 +0200
Subject: [PATCH 0979/1852] bcm63xx_enet: do not write to random DMA channel on
 BCM6345

commit d6213c1f2ad54a964b77471690264ed685718928 upstream.

The DMA controller regs actually point to DMA channel 0, so the write to
ENETDMA_CFG_REG will actually modify a random DMA channel.

Since DMA controller registers do not exist on BCM6345, guard the write
with the usual check for dma_has_sram.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index ee4f38d0c1051..ec5834087e4b4 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_device *dev)
 	val = enet_readl(priv, ENET_CTL_REG);
 	val |= ENET_CTL_ENABLE_MASK;
 	enet_writel(priv, val, ENET_CTL_REG);
-	enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
+	if (priv->dma_has_sram)
+		enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
 	enet_dmac_writel(priv, priv->dma_chan_en_mask,
 			 ENETDMAC_CHANCFG, priv->rx_chan);
 

From b91d47ad3a4361ae5b3c45b27e9d270f32438492 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Fri, 25 Aug 2017 15:47:14 +0200
Subject: [PATCH 0980/1852] crypto: crypto4xx - remove bad list_del

commit a728a196d253530f17da5c86dc7dfbe58c5f7094 upstream.

alg entries are only added to the list, after the registration
was successful. If the registration failed, it was never added
to the list in the first place.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/crypto/amcc/crypto4xx_core.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index 58a630e55d5d6..d036b634374a3 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -1029,12 +1029,10 @@ int crypto4xx_register_alg(struct crypto4xx_device *sec_dev,
 			break;
 		}
 
-		if (rc) {
-			list_del(&alg->entry);
+		if (rc)
 			kfree(alg);
-		} else {
+		else
 			list_add_tail(&alg->entry, &sec_dev->alg_list);
-		}
 	}
 
 	return 0;

From d026f32a49299821663e68335d1059e032313251 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Fri, 25 Aug 2017 15:47:24 +0200
Subject: [PATCH 0981/1852] crypto: crypto4xx - fix crypto4xx_build_pdr,
 crypto4xx_build_sdr leak

commit 5d59ad6eea82ef8df92b4109615a0dde9d8093e9 upstream.

If one of the later memory allocations in rypto4xx_build_pdr()
fails: dev->pdr (and/or) dev->pdr_uinfo wouldn't be freed.

crypto4xx_build_sdr() has the same issue with dev->sdr.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/crypto/amcc/crypto4xx_core.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index d036b634374a3..78d0722feacb5 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -207,7 +207,7 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
 				  dev->pdr_pa);
 		return -ENOMEM;
 	}
-	memset(dev->pdr, 0,  sizeof(struct ce_pd) * PPC4XX_NUM_PD);
+	memset(dev->pdr, 0, sizeof(struct ce_pd) * PPC4XX_NUM_PD);
 	dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device,
 				   256 * PPC4XX_NUM_PD,
 				   &dev->shadow_sa_pool_pa,
@@ -240,13 +240,15 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
 
 static void crypto4xx_destroy_pdr(struct crypto4xx_device *dev)
 {
-	if (dev->pdr != NULL)
+	if (dev->pdr)
 		dma_free_coherent(dev->core_dev->device,
 				  sizeof(struct ce_pd) * PPC4XX_NUM_PD,
 				  dev->pdr, dev->pdr_pa);
+
 	if (dev->shadow_sa_pool)
 		dma_free_coherent(dev->core_dev->device, 256 * PPC4XX_NUM_PD,
 				  dev->shadow_sa_pool, dev->shadow_sa_pool_pa);
+
 	if (dev->shadow_sr_pool)
 		dma_free_coherent(dev->core_dev->device,
 			sizeof(struct sa_state_record) * PPC4XX_NUM_PD,
@@ -416,12 +418,12 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
 
 static void crypto4xx_destroy_sdr(struct crypto4xx_device *dev)
 {
-	if (dev->sdr != NULL)
+	if (dev->sdr)
 		dma_free_coherent(dev->core_dev->device,
 				  sizeof(struct ce_sd) * PPC4XX_NUM_SD,
 				  dev->sdr, dev->sdr_pa);
 
-	if (dev->scatter_buffer_va != NULL)
+	if (dev->scatter_buffer_va)
 		dma_free_coherent(dev->core_dev->device,
 				  dev->scatter_buffer_size * PPC4XX_NUM_SD,
 				  dev->scatter_buffer_va,
@@ -1186,7 +1188,7 @@ static int crypto4xx_probe(struct platform_device *ofdev)
 
 	rc = crypto4xx_build_gdr(core_dev->dev);
 	if (rc)
-		goto err_build_gdr;
+		goto err_build_pdr;
 
 	rc = crypto4xx_build_sdr(core_dev->dev);
 	if (rc)
@@ -1228,12 +1230,11 @@ static int crypto4xx_probe(struct platform_device *ofdev)
 err_request_irq:
 	irq_dispose_mapping(core_dev->irq);
 	tasklet_kill(&core_dev->tasklet);
-	crypto4xx_destroy_sdr(core_dev->dev);
 err_build_sdr:
+	crypto4xx_destroy_sdr(core_dev->dev);
 	crypto4xx_destroy_gdr(core_dev->dev);
-err_build_gdr:
-	crypto4xx_destroy_pdr(core_dev->dev);
 err_build_pdr:
+	crypto4xx_destroy_pdr(core_dev->dev);
 	kfree(core_dev->dev);
 err_alloc_dev:
 	kfree(core_dev);

From 5fa8c42993cf4ac5827bba85d79b906cbc96730e Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Fri, 29 Jun 2018 13:28:07 -0500
Subject: [PATCH 0982/1852] atm: zatm: Fix potential Spectre v1

[ Upstream commit ced9e191501e52b95e1b57b8e0db00943869eed0 ]

pool can be indirectly controlled by user-space, hence leading to
a potential exploitation of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

drivers/atm/zatm.c:1491 zatm_ioctl() warn: potential spectre issue
'zatm_dev->pool_info' (local cap)

Fix this by sanitizing pool before using it to index
zatm_dev->pool_info

Notice that given that speculation windows are large, the policy is
to kill the speculation on the first load and not worry if it can be
completed with a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/atm/zatm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/atm/zatm.c b/drivers/atm/zatm.c
index c302f47f6323f..94712e1c5cf9a 100644
--- a/drivers/atm/zatm.c
+++ b/drivers/atm/zatm.c
@@ -1481,6 +1481,8 @@ static int zatm_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
 					return -EFAULT;
 				if (pool < 0 || pool > ZATM_LAST_POOL)
 					return -EINVAL;
+				pool = array_index_nospec(pool,
+							  ZATM_LAST_POOL + 1);
 				if (copy_from_user(&info,
 				    &((struct zatm_pool_req __user *) arg)->info,
 				    sizeof(info))) return -EFAULT;

From e0167e8ec3a0cc0729e175617e2cec9fe1662bed Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Fri, 22 Jun 2018 06:44:14 -0700
Subject: [PATCH 0983/1852] net: dccp: avoid crash in
 ccid3_hc_rx_send_feedback()

[ Upstream commit 74174fe5634ffbf645a7ca5a261571f700b2f332 ]

On fast hosts or malicious bots, we trigger a DCCP_BUG() which
seems excessive.

syzbot reported :

BUG: delta (-6195) <= 0 at net/dccp/ccids/ccid3.c:628/ccid3_hc_rx_send_feedback()
CPU: 1 PID: 18 Comm: ksoftirqd/1 Not tainted 4.18.0-rc1+ #112
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x1c9/0x2b4 lib/dump_stack.c:113
 ccid3_hc_rx_send_feedback net/dccp/ccids/ccid3.c:628 [inline]
 ccid3_hc_rx_packet_recv.cold.16+0x38/0x71 net/dccp/ccids/ccid3.c:793
 ccid_hc_rx_packet_recv net/dccp/ccid.h:185 [inline]
 dccp_deliver_input_to_ccids+0xf0/0x280 net/dccp/input.c:180
 dccp_rcv_established+0x87/0xb0 net/dccp/input.c:378
 dccp_v4_do_rcv+0x153/0x180 net/dccp/ipv4.c:654
 sk_backlog_rcv include/net/sock.h:914 [inline]
 __sk_receive_skb+0x3ba/0xd80 net/core/sock.c:517
 dccp_v4_rcv+0x10f9/0x1f58 net/dccp/ipv4.c:875
 ip_local_deliver_finish+0x2eb/0xda0 net/ipv4/ip_input.c:215
 NF_HOOK include/linux/netfilter.h:287 [inline]
 ip_local_deliver+0x1e9/0x750 net/ipv4/ip_input.c:256
 dst_input include/net/dst.h:450 [inline]
 ip_rcv_finish+0x823/0x2220 net/ipv4/ip_input.c:396
 NF_HOOK include/linux/netfilter.h:287 [inline]
 ip_rcv+0xa18/0x1284 net/ipv4/ip_input.c:492
 __netif_receive_skb_core+0x2488/0x3680 net/core/dev.c:4628
 __netif_receive_skb+0x2c/0x1e0 net/core/dev.c:4693
 process_backlog+0x219/0x760 net/core/dev.c:5373
 napi_poll net/core/dev.c:5771 [inline]
 net_rx_action+0x7da/0x1980 net/core/dev.c:5837
 __do_softirq+0x2e8/0xb17 kernel/softirq.c:284
 run_ksoftirqd+0x86/0x100 kernel/softirq.c:645
 smpboot_thread_fn+0x417/0x870 kernel/smpboot.c:164
 kthread+0x345/0x410 kernel/kthread.c:240
 ret_from_fork+0x3a/0x50 arch/x86/entry/entry_64.S:412

Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: Gerrit Renker <gerrit@erg.abdn.ac.uk>
Cc: dccp@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dccp/ccids/ccid3.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/net/dccp/ccids/ccid3.c b/net/dccp/ccids/ccid3.c
index 119c04317d48e..b913ee062a81c 100644
--- a/net/dccp/ccids/ccid3.c
+++ b/net/dccp/ccids/ccid3.c
@@ -624,9 +624,8 @@ static void ccid3_hc_rx_send_feedback(struct sock *sk,
 	case CCID3_FBACK_PERIODIC:
 		delta = ktime_us_delta(now, hc->rx_tstamp_last_feedback);
 		if (delta <= 0)
-			DCCP_BUG("delta (%ld) <= 0", (long)delta);
-		else
-			hc->rx_x_recv = scaled_div32(hc->rx_bytes_recv, delta);
+			delta = 1;
+		hc->rx_x_recv = scaled_div32(hc->rx_bytes_recv, delta);
 		break;
 	default:
 		return;

From 6023eb70c8df0a9e7f1c2247f07193b80380d6d2 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Fri, 22 Jun 2018 06:44:15 -0700
Subject: [PATCH 0984/1852] net: dccp: switch rx_tstamp_last_feedback to
 monotonic clock

[ Upstream commit 0ce4e70ff00662ad7490e545ba0cd8c1fa179fca ]

To compute delays, better not use time of the day which can
be changed by admins or malicious programs.

Also change ccid3_first_li() to use s64 type for delta variable
to avoid potential overflows.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Gerrit Renker <gerrit@erg.abdn.ac.uk>
Cc: dccp@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dccp/ccids/ccid3.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/net/dccp/ccids/ccid3.c b/net/dccp/ccids/ccid3.c
index b913ee062a81c..03fcf3ee15346 100644
--- a/net/dccp/ccids/ccid3.c
+++ b/net/dccp/ccids/ccid3.c
@@ -599,7 +599,7 @@ static void ccid3_hc_rx_send_feedback(struct sock *sk,
 {
 	struct ccid3_hc_rx_sock *hc = ccid3_hc_rx_sk(sk);
 	struct dccp_sock *dp = dccp_sk(sk);
-	ktime_t now = ktime_get_real();
+	ktime_t now = ktime_get();
 	s64 delta = 0;
 
 	switch (fbtype) {
@@ -631,7 +631,7 @@ static void ccid3_hc_rx_send_feedback(struct sock *sk,
 		return;
 	}
 
-	ccid3_pr_debug("Interval %ldusec, X_recv=%u, 1/p=%u\n", (long)delta,
+	ccid3_pr_debug("Interval %lldusec, X_recv=%u, 1/p=%u\n", delta,
 		       hc->rx_x_recv, hc->rx_pinv);
 
 	hc->rx_tstamp_last_feedback = now;
@@ -678,7 +678,8 @@ static int ccid3_hc_rx_insert_options(struct sock *sk, struct sk_buff *skb)
 static u32 ccid3_first_li(struct sock *sk)
 {
 	struct ccid3_hc_rx_sock *hc = ccid3_hc_rx_sk(sk);
-	u32 x_recv, p, delta;
+	u32 x_recv, p;
+	s64 delta;
 	u64 fval;
 
 	if (hc->rx_rtt == 0) {
@@ -686,7 +687,9 @@ static u32 ccid3_first_li(struct sock *sk)
 		hc->rx_rtt = DCCP_FALLBACK_RTT;
 	}
 
-	delta  = ktime_to_us(net_timedelta(hc->rx_tstamp_last_feedback));
+	delta = ktime_us_delta(ktime_get(), hc->rx_tstamp_last_feedback);
+	if (delta <= 0)
+		delta = 1;
 	x_recv = scaled_div32(hc->rx_bytes_recv, delta);
 	if (x_recv == 0) {		/* would also trigger divide-by-zero */
 		DCCP_WARN("X_recv==0\n");

From 0b77b3888eb2eeb519b03ae4f4103b69822736db Mon Sep 17 00:00:00 2001
From: Alex Vesker <valex@mellanox.com>
Date: Fri, 25 May 2018 20:25:59 +0300
Subject: [PATCH 0985/1852] net/mlx5: Fix incorrect raw command length parsing

[ Upstream commit 603b7bcff824740500ddfa001d7a7168b0b38542 ]

The NULL character was not set correctly for the string containing
the command length, this caused failures reading the output of the
command due to a random length. The fix is to initialize the output
length string.

Fixes: e126ba97dba9 ("mlx5: Add driver for Mellanox Connect-IB adapters")
Signed-off-by: Alex Vesker <valex@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index 16bd585365a85..ea225f4a0497e 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -1126,7 +1126,7 @@ static ssize_t outlen_write(struct file *filp, const char __user *buf,
 {
 	struct mlx5_core_dev *dev = filp->private_data;
 	struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
-	char outlen_str[8];
+	char outlen_str[8] = {0};
 	int outlen;
 	void *ptr;
 	int err;
@@ -1141,8 +1141,6 @@ static ssize_t outlen_write(struct file *filp, const char __user *buf,
 	if (copy_from_user(outlen_str, buf, count))
 		return -EFAULT;
 
-	outlen_str[7] = 0;
-
 	err = sscanf(outlen_str, "%d", &outlen);
 	if (err < 0)
 		return err;

From 49ac88f4386472b791ba81d1bab30876357ad499 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Tue, 19 Jun 2018 19:18:50 -0700
Subject: [PATCH 0986/1852] net: sungem: fix rx checksum support

[ Upstream commit 12b03558cef6d655d0d394f5e98a6fd07c1f6c0f ]

After commit 88078d98d1bb ("net: pskb_trim_rcsum() and CHECKSUM_COMPLETE
are friends"), sungem owners reported the infamous "eth0: hw csum failure"
message.

CHECKSUM_COMPLETE has in fact never worked for this driver, but this
was masked by the fact that upper stacks had to strip the FCS, and
therefore skb->ip_summed was set back to CHECKSUM_NONE before
my recent change.

Driver configures a number of bytes to skip when the chip computes
the checksum, and for some reason only half of the Ethernet header
was skipped.

Then a second problem is that we should strip the FCS by default,
unless the driver is updated to eventually support NETIF_F_RXFCS in
the future.

Finally, a driver should check if NETIF_F_RXCSUM feature is enabled
or not, so that the admin can turn off rx checksum if wanted.

Many thanks to Andreas Schwab and Mathieu Malaterre for their
help in debugging this issue.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: Meelis Roos <mroos@linux.ee>
Reported-by: Mathieu Malaterre <malat@debian.org>
Reported-by: Andreas Schwab <schwab@linux-m68k.org>
Tested-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/sun/sungem.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c
index e23a642357e7c..eb4d8df493997 100644
--- a/drivers/net/ethernet/sun/sungem.c
+++ b/drivers/net/ethernet/sun/sungem.c
@@ -60,8 +60,7 @@
 #include <linux/sungem_phy.h>
 #include "sungem.h"
 
-/* Stripping FCS is causing problems, disabled for now */
-#undef STRIP_FCS
+#define STRIP_FCS
 
 #define DEFAULT_MSG	(NETIF_MSG_DRV		| \
 			 NETIF_MSG_PROBE	| \
@@ -435,7 +434,7 @@ static int gem_rxmac_reset(struct gem *gp)
 	writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW);
 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
 	val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) |
-	       ((14 / 2) << 13) | RXDMA_CFG_FTHRESH_128);
+	       (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128);
 	writel(val, gp->regs + RXDMA_CFG);
 	if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)
 		writel(((5 & RXDMA_BLANK_IPKTS) |
@@ -760,7 +759,6 @@ static int gem_rx(struct gem *gp, int work_to_do)
 	struct net_device *dev = gp->dev;
 	int entry, drops, work_done = 0;
 	u32 done;
-	__sum16 csum;
 
 	if (netif_msg_rx_status(gp))
 		printk(KERN_DEBUG "%s: rx interrupt, done: %d, rx_new: %d\n",
@@ -855,9 +853,13 @@ static int gem_rx(struct gem *gp, int work_to_do)
 			skb = copy_skb;
 		}
 
-		csum = (__force __sum16)htons((status & RXDCTRL_TCPCSUM) ^ 0xffff);
-		skb->csum = csum_unfold(csum);
-		skb->ip_summed = CHECKSUM_COMPLETE;
+		if (likely(dev->features & NETIF_F_RXCSUM)) {
+			__sum16 csum;
+
+			csum = (__force __sum16)htons((status & RXDCTRL_TCPCSUM) ^ 0xffff);
+			skb->csum = csum_unfold(csum);
+			skb->ip_summed = CHECKSUM_COMPLETE;
+		}
 		skb->protocol = eth_type_trans(skb, gp->dev);
 
 		napi_gro_receive(&gp->napi, skb);
@@ -1755,7 +1757,7 @@ static void gem_init_dma(struct gem *gp)
 	writel(0, gp->regs + TXDMA_KICK);
 
 	val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) |
-	       ((14 / 2) << 13) | RXDMA_CFG_FTHRESH_128);
+	       (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128);
 	writel(val, gp->regs + RXDMA_CFG);
 
 	writel(desc_dma >> 32, gp->regs + RXDMA_DBHI);
@@ -2973,8 +2975,8 @@ static int gem_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 	pci_set_drvdata(pdev, dev);
 
 	/* We can do scatter/gather and HW checksum */
-	dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
-	dev->features |= dev->hw_features | NETIF_F_RXCSUM;
+	dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
+	dev->features = dev->hw_features;
 	if (pci_using_dac)
 		dev->features |= NETIF_F_HIGHDMA;
 

From 6c291f31c223c97f2abd4515b342e41d69355954 Mon Sep 17 00:00:00 2001
From: Sudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>
Date: Sun, 1 Jul 2018 20:03:05 -0700
Subject: [PATCH 0987/1852] qed: Limit msix vectors in kdump kernel to the
 minimum required count.

[ Upstream commit bb7858ba1102f82470a917e041fd23e6385c31be ]

Memory size is limited in the kdump kernel environment. Allocation of more
msix-vectors (or queues) consumes few tens of MBs of memory, which might
lead to the kdump kernel failure.
This patch adds changes to limit the number of MSI-X vectors in kdump
kernel to minimum required value (i.e., 2 per engine).

Fixes: fe56b9e6a ("qed: Add module with basic common support")
Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qlogic/qed/qed_main.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c
index 174f7341c5c32..688b6da5a9bb7 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_main.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_main.c
@@ -22,6 +22,7 @@
 #include <linux/etherdevice.h>
 #include <linux/vmalloc.h>
 #include <linux/qed/qed_if.h>
+#include <linux/crash_dump.h>
 
 #include "qed.h"
 #include "qed_sp.h"
@@ -634,6 +635,14 @@ static int qed_slowpath_setup_int(struct qed_dev *cdev,
 	/* We want a minimum of one slowpath and one fastpath vector per hwfn */
 	cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 
+	if (is_kdump_kernel()) {
+		DP_INFO(cdev,
+			"Kdump kernel: Limit the max number of requested MSI-X vectors to %hd\n",
+			cdev->int_params.in.min_msix_cnt);
+		cdev->int_params.in.num_vectors =
+			cdev->int_params.in.min_msix_cnt;
+	}
+
 	rc = qed_set_int_mode(cdev, false);
 	if (rc)  {
 		DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");

From f728917bf65f5c046f36814b9d66c48a664dc36b Mon Sep 17 00:00:00 2001
From: Jiri Slaby <jslaby@suse.cz>
Date: Mon, 25 Jun 2018 09:26:27 +0200
Subject: [PATCH 0988/1852] r8152: napi hangup fix after disconnect

[ Upstream commit 0ee1f4734967af8321ecebaf9c74221ace34f2d5 ]

When unplugging an r8152 adapter while the interface is UP, the NIC
becomes unusable.  usb->disconnect (aka rtl8152_disconnect) deletes
napi. Then, rtl8152_disconnect calls unregister_netdev and that invokes
netdev->ndo_stop (aka rtl8152_close). rtl8152_close tries to
napi_disable, but the napi is already deleted by disconnect above. So
the first while loop in napi_disable never finishes. This results in
complete deadlock of the network layer as there is rtnl_mutex held by
unregister_netdev.

So avoid the call to napi_disable in rtl8152_close when the device is
already gone.

The other calls to usb_kill_urb, cancel_delayed_work_sync,
netif_stop_queue etc. seem to be fine. The urb and netdev is not
destroyed yet.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: linux-usb@vger.kernel.org
Cc: netdev@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/r8152.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 2991d71555405..2bb336cb13eeb 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -3139,7 +3139,8 @@ static int rtl8152_close(struct net_device *netdev)
 #ifdef CONFIG_PM_SLEEP
 	unregister_pm_notifier(&tp->pm_notifier);
 #endif
-	napi_disable(&tp->napi);
+	if (!test_bit(RTL8152_UNPLUG, &tp->flags))
+		napi_disable(&tp->napi);
 	clear_bit(WORK_ENABLE, &tp->flags);
 	usb_kill_urb(tp->intr_urb);
 	cancel_delayed_work_sync(&tp->schedule);

From a95f175670690bff61920ad96d87a78ee82ad9d0 Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Wed, 27 Jun 2018 16:04:48 -0700
Subject: [PATCH 0989/1852] tcp: fix Fast Open key endianness

[ Upstream commit c860e997e9170a6d68f9d1e6e2cf61f572191aaf ]

Fast Open key could be stored in different endian based on the CPU.
Previously hosts in different endianness in a server farm using
the same key config (sysctl value) would produce different cookies.
This patch fixes it by always storing it as little endian to keep
same API for LE hosts.

Reported-by: Daniele Iamartino <danielei@google.com>
Signed-off-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/sysctl_net_ipv4.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/net/ipv4/sysctl_net_ipv4.c b/net/ipv4/sysctl_net_ipv4.c
index 46123369144ff..a7fde12784d39 100644
--- a/net/ipv4/sysctl_net_ipv4.c
+++ b/net/ipv4/sysctl_net_ipv4.c
@@ -228,8 +228,9 @@ static int proc_tcp_fastopen_key(struct ctl_table *ctl, int write,
 {
 	struct ctl_table tbl = { .maxlen = (TCP_FASTOPEN_KEY_LENGTH * 2 + 10) };
 	struct tcp_fastopen_context *ctxt;
-	int ret;
 	u32  user_key[4]; /* 16 bytes, matching TCP_FASTOPEN_KEY_LENGTH */
+	__le32 key[4];
+	int ret, i;
 
 	tbl.data = kmalloc(tbl.maxlen, GFP_KERNEL);
 	if (!tbl.data)
@@ -238,11 +239,14 @@ static int proc_tcp_fastopen_key(struct ctl_table *ctl, int write,
 	rcu_read_lock();
 	ctxt = rcu_dereference(tcp_fastopen_ctx);
 	if (ctxt)
-		memcpy(user_key, ctxt->key, TCP_FASTOPEN_KEY_LENGTH);
+		memcpy(key, ctxt->key, TCP_FASTOPEN_KEY_LENGTH);
 	else
-		memset(user_key, 0, sizeof(user_key));
+		memset(key, 0, sizeof(key));
 	rcu_read_unlock();
 
+	for (i = 0; i < ARRAY_SIZE(key); i++)
+		user_key[i] = le32_to_cpu(key[i]);
+
 	snprintf(tbl.data, tbl.maxlen, "%08x-%08x-%08x-%08x",
 		user_key[0], user_key[1], user_key[2], user_key[3]);
 	ret = proc_dostring(&tbl, write, buffer, lenp, ppos);
@@ -258,12 +262,16 @@ static int proc_tcp_fastopen_key(struct ctl_table *ctl, int write,
 		 * first invocation of tcp_fastopen_cookie_gen
 		 */
 		tcp_fastopen_init_key_once(false);
-		tcp_fastopen_reset_cipher(user_key, TCP_FASTOPEN_KEY_LENGTH);
+
+		for (i = 0; i < ARRAY_SIZE(user_key); i++)
+			key[i] = cpu_to_le32(user_key[i]);
+
+		tcp_fastopen_reset_cipher(key, TCP_FASTOPEN_KEY_LENGTH);
 	}
 
 bad_key:
 	pr_debug("proc FO key set 0x%x-%x-%x-%x <- 0x%s: %u\n",
-	       user_key[0], user_key[1], user_key[2], user_key[3],
+		 user_key[0], user_key[1], user_key[2], user_key[3],
 	       (char *)tbl.data, ret);
 	kfree(tbl.data);
 	return ret;

From 13a9c19383897939049c24c3dc8259a8906f5095 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= <ilpo.jarvinen@helsinki.fi>
Date: Fri, 29 Jun 2018 13:07:53 +0300
Subject: [PATCH 0990/1852] tcp: prevent bogus FRTO undos with non-SACK flows
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 1236f22fbae15df3736ab4a984c64c0c6ee6254c ]

If SACK is not enabled and the first cumulative ACK after the RTO
retransmission covers more than the retransmitted skb, a spurious
FRTO undo will trigger (assuming FRTO is enabled for that RTO).
The reason is that any non-retransmitted segment acknowledged will
set FLAG_ORIG_SACK_ACKED in tcp_clean_rtx_queue even if there is
no indication that it would have been delivered for real (the
scoreboard is not kept with TCPCB_SACKED_ACKED bits in the non-SACK
case so the check for that bit won't help like it does with SACK).
Having FLAG_ORIG_SACK_ACKED set results in the spurious FRTO undo
in tcp_process_loss.

We need to use more strict condition for non-SACK case and check
that none of the cumulatively ACKed segments were retransmitted
to prove that progress is due to original transmissions. Only then
keep FLAG_ORIG_SACK_ACKED set, allowing FRTO undo to proceed in
non-SACK case.

(FLAG_ORIG_SACK_ACKED is planned to be renamed to FLAG_ORIG_PROGRESS
to better indicate its purpose but to keep this change minimal, it
will be done in another patch).

Besides burstiness and congestion control violations, this problem
can result in RTO loop: When the loss recovery is prematurely
undoed, only new data will be transmitted (if available) and
the next retransmission can occur only after a new RTO which in case
of multiple losses (that are not for consecutive packets) requires
one RTO per loss to recover.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi>
Tested-by: Neal Cardwell <ncardwell@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index a1b9875ad0650..07d9ab58d7fb0 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -3219,6 +3219,15 @@ static int tcp_clean_rtx_queue(struct sock *sk, int prior_fackets,
 
 		if (tcp_is_reno(tp)) {
 			tcp_remove_reno_sacks(sk, pkts_acked);
+
+			/* If any of the cumulatively ACKed segments was
+			 * retransmitted, non-SACK case cannot confirm that
+			 * progress was due to original transmission due to
+			 * lack of TCPCB_SACKED_ACKED bits even if some of
+			 * the packets may have been never retransmitted.
+			 */
+			if (flag & FLAG_RETRANS_DATA_ACKED)
+				flag &= ~FLAG_ORIG_SACK_ACKED;
 		} else {
 			int delta;
 

From f011bc122ce5c0e85d286e60a6a7024a756270db Mon Sep 17 00:00:00 2001
From: Jason Wang <jasowang@redhat.com>
Date: Thu, 21 Jun 2018 13:11:31 +0800
Subject: [PATCH 0991/1852] vhost_net: validate sock before trying to put its
 fd

[ Upstream commit b8f1f65882f07913157c44673af7ec0b308d03eb ]

Sock will be NULL if we pass -1 to vhost_net_set_backend(), but when
we meet errors during ubuf allocation, the code does not check for
NULL before calling sockfd_put(), this will lead NULL
dereferencing. Fixing by checking sock pointer before.

Fixes: bab632d69ee4 ("vhost: vhost TX zero-copy support")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/vhost/net.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c
index 44a5a8777053e..645b2197930e4 100644
--- a/drivers/vhost/net.c
+++ b/drivers/vhost/net.c
@@ -955,7 +955,8 @@ static long vhost_net_set_backend(struct vhost_net *n, unsigned index, int fd)
 	if (ubufs)
 		vhost_net_ubuf_put_wait_and_free(ubufs);
 err_ubufs:
-	sockfd_put(sock);
+	if (sock)
+		sockfd_put(sock);
 err_vq:
 	mutex_unlock(&vq->mutex);
 err:

From 95bebd3c2a08edbd31ace0196ac8e69e0be6fedd Mon Sep 17 00:00:00 2001
From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
Date: Fri, 15 Jun 2018 13:27:31 +0300
Subject: [PATCH 0992/1852] net_sched: blackhole: tell upper qdisc about
 dropped packets

[ Upstream commit 7e85dc8cb35abf16455f1511f0670b57c1a84608 ]

When blackhole is used on top of classful qdisc like hfsc it breaks
qlen and backlog counters because packets are disappear without notice.

In HFSC non-zero qlen while all classes are inactive triggers warning:
WARNING: ... at net/sched/sch_hfsc.c:1393 hfsc_dequeue+0xba4/0xe90 [sch_hfsc]
and schedules watchdog work endlessly.

This patch return __NET_XMIT_BYPASS in addition to NET_XMIT_SUCCESS,
this flag tells upper layer: this packet is gone and isn't queued.

Signed-off-by: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sched/sch_blackhole.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/sched/sch_blackhole.c b/net/sched/sch_blackhole.c
index 3fee70d9814f9..562edd50fa94b 100644
--- a/net/sched/sch_blackhole.c
+++ b/net/sched/sch_blackhole.c
@@ -20,7 +20,7 @@
 static int blackhole_enqueue(struct sk_buff *skb, struct Qdisc *sch)
 {
 	qdisc_drop(skb, sch);
-	return NET_XMIT_SUCCESS;
+	return NET_XMIT_SUCCESS | __NET_XMIT_BYPASS;
 }
 
 static struct sk_buff *blackhole_dequeue(struct Qdisc *sch)

From 437182fb41b362ec13f09e827a53ce0754aa95e6 Mon Sep 17 00:00:00 2001
From: Alex Vesker <valex@mellanox.com>
Date: Tue, 12 Jun 2018 16:14:31 +0300
Subject: [PATCH 0993/1852] net/mlx5: Fix command interface race in polling
 mode

[ Upstream commit d412c31dae053bf30a1bc15582a9990df297a660 ]

The command interface can work in two modes: Events and Polling.
In the general case, each time we invoke a command, a work is
queued to handle it.

When working in events, the interrupt handler completes the
command execution. On the other hand, when working in polling
mode, the work itself completes it.

Due to a bug in the work handler, a command could have been
completed by the interrupt handler, while the work handler
hasn't finished yet, causing the it to complete once again
if the command interface mode was changed from Events to
polling after the interrupt handler was called.

mlx5_unload_one()
        mlx5_stop_eqs()
                // Destroy the EQ before cmd EQ
                ...cmd_work_handler()
                        write_doorbell()
                        --> EVENT_TYPE_CMD
                                mlx5_cmd_comp_handler() // First free
                                        free_ent(cmd, ent->idx)
                                        complete(&ent->done)

        <-- mlx5_stop_eqs //cmd was complete
                // move to polling before destroying the last cmd EQ
                mlx5_cmd_use_polling()
                        cmd->mode = POLL;

                --> cmd_work_handler (continues)
                        if (cmd->mode == POLL)
                                mlx5_cmd_comp_handler() // Double free

The solution is to store the cmd->mode before writing the doorbell.

Fixes: e126ba97dba9 ("mlx5: Add driver for Mellanox Connect-IB adapters")
Signed-off-by: Alex Vesker <valex@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index ea225f4a0497e..9ac14df0ca3b2 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -643,6 +643,7 @@ static void cmd_work_handler(struct work_struct *work)
 	struct semaphore *sem;
 	unsigned long flags;
 	int alloc_ret;
+	int cmd_mode;
 
 	sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
 	down(sem);
@@ -688,6 +689,7 @@ static void cmd_work_handler(struct work_struct *work)
 	set_signature(ent, !cmd->checksum_disabled);
 	dump_command(dev, ent, 1);
 	ent->ts1 = ktime_get_ns();
+	cmd_mode = cmd->mode;
 
 	/* ring doorbell after the descriptor is valid */
 	mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
@@ -695,7 +697,7 @@ static void cmd_work_handler(struct work_struct *work)
 	iowrite32be(1 << ent->idx, &dev->iseg->cmd_dbell);
 	mmiowb();
 	/* if not in polling don't use ent after this point */
-	if (cmd->mode == CMD_MODE_POLLING) {
+	if (cmd_mode == CMD_MODE_POLLING) {
 		poll_timeout(ent);
 		/* make sure we read the descriptor after ownership is SW */
 		rmb();

From 24e1da187576faca7ec8363fa60ac4617b3bfdc7 Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Mon, 16 Jul 2018 20:59:58 -0500
Subject: [PATCH 0994/1852] net: cxgb3_main: fix potential Spectre v1

commit 676bcfece19f83621e905aa55b5ed2d45cc4f2d3 upstream.

t.qset_idx can be indirectly controlled by user-space, hence leading to
a potential exploitation of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c:2286 cxgb_extension_ioctl()
warn: potential spectre issue 'adapter->msix_info'

Fix this by sanitizing t.qset_idx before using it to index
adapter->msix_info

Notice that given that speculation windows are large, the policy is
to kill the speculation on the first load and not worry if it can be
completed with a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2

Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
index 8f7aa53a4c4be..7ae8374bff13e 100644
--- a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
@@ -50,6 +50,7 @@
 #include <linux/stringify.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
+#include <linux/nospec.h>
 #include <asm/uaccess.h>
 
 #include "common.h"
@@ -2256,6 +2257,7 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
 
 		if (t.qset_idx >= nqsets)
 			return -EINVAL;
+		t.qset_idx = array_index_nospec(t.qset_idx, nqsets);
 
 		q = &adapter->params.sge.qset[q1 + t.qset_idx];
 		t.rspq_size = q->rspq_size;

From 95db35b1590c2952f9e85608d6986992d252a8b3 Mon Sep 17 00:00:00 2001
From: Ping-Ke Shih <pkshih@realtek.com>
Date: Thu, 28 Jun 2018 10:02:27 +0800
Subject: [PATCH 0995/1852] rtlwifi: rtl8821ae: fix firmware is not ready to
 run

commit 9a98302de19991d51e067b88750585203b2a3ab6 upstream.

Without this patch, firmware will not run properly on rtl8821ae, and it
causes bad user experience. For example, bad connection performance with
low rate, higher power consumption, and so on.

rtl8821ae uses two kinds of firmwares for normal and WoWlan cases, and
each firmware has firmware data buffer and size individually. Original
code always overwrite size of normal firmware rtlpriv->rtlhal.fwsize, and
this mismatch causes firmware checksum error, then firmware can't start.

In this situation, driver gives message "Firmware is not ready to run!".

Fixes: fe89707f0afa ("rtlwifi: rtl8821ae: Simplify loading of WOWLAN firmware")
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Cc: Stable <stable@vger.kernel.org> # 4.0+
Reviewed-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/realtek/rtlwifi/core.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/net/wireless/realtek/rtlwifi/core.c b/drivers/net/wireless/realtek/rtlwifi/core.c
index 8b537a5a4b010..8006f0972ad1d 100644
--- a/drivers/net/wireless/realtek/rtlwifi/core.c
+++ b/drivers/net/wireless/realtek/rtlwifi/core.c
@@ -135,7 +135,6 @@ static void rtl_fw_do_work(const struct firmware *firmware, void *context,
 		       firmware->size);
 		rtlpriv->rtlhal.wowlan_fwsize = firmware->size;
 	}
-	rtlpriv->rtlhal.fwsize = firmware->size;
 	release_firmware(firmware);
 }
 

From 46c6523e6ef7b516e6c44c8df85b316524d0b5ef Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@mips.com>
Date: Fri, 22 Jun 2018 10:55:45 -0700
Subject: [PATCH 0996/1852] MIPS: Call dump_stack() from show_regs()

commit 5a267832c2ec47b2dad0fdb291a96bb5b8869315 upstream.

The generic nmi_cpu_backtrace() function calls show_regs() when a struct
pt_regs is available, and dump_stack() otherwise. If we were to make use
of the generic nmi_cpu_backtrace() with MIPS' current implementation of
show_regs() this would mean that we see only register data with no
accompanying stack information, in contrast with our current
implementation which calls dump_stack() regardless of whether register
state is available.

In preparation for making use of the generic nmi_cpu_backtrace() to
implement arch_trigger_cpumask_backtrace(), have our implementation of
show_regs() call dump_stack() and drop the explicit dump_stack() call in
arch_dump_stack() which is invoked by arch_trigger_cpumask_backtrace().

This will allow the output we produce to remain the same after a later
patch switches to using nmi_cpu_backtrace(). It may mean that we produce
extra stack output in other uses of show_regs(), but this:

  1) Seems harmless.
  2) Is good for consistency between arch_trigger_cpumask_backtrace()
     and other users of show_regs().
  3) Matches the behaviour of the ARM & PowerPC architectures.

Marked for stable back to v4.9 as a prerequisite of the following patch
"MIPS: Call dump_stack() from show_regs()".

Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19596/
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/process.c | 4 ++--
 arch/mips/kernel/traps.c   | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 054a22c0873b6..7c5008892ac9c 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -641,8 +641,8 @@ static void arch_dump_stack(void *info)
 
 	if (regs)
 		show_regs(regs);
-
-	dump_stack();
+	else
+		dump_stack();
 }
 
 void arch_trigger_all_cpu_backtrace(bool include_self)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e23f4775b10bb..da6997486709c 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -345,6 +345,7 @@ static void __show_regs(const struct pt_regs *regs)
 void show_regs(struct pt_regs *regs)
 {
 	__show_regs((struct pt_regs *)regs);
+	dump_stack();
 }
 
 void show_registers(struct pt_regs *regs)

From 0807b9d1a038978e4cebe8c4901e8df4eadcc459 Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@mips.com>
Date: Fri, 22 Jun 2018 10:55:46 -0700
Subject: [PATCH 0997/1852] MIPS: Use async IPIs for
 arch_trigger_cpumask_backtrace()

commit b63e132b6433a41cf311e8bc382d33fd2b73b505 upstream.

The current MIPS implementation of arch_trigger_cpumask_backtrace() is
broken because it attempts to use synchronous IPIs despite the fact that
it may be run with interrupts disabled.

This means that when arch_trigger_cpumask_backtrace() is invoked, for
example by the RCU CPU stall watchdog, we may:

  - Deadlock due to use of synchronous IPIs with interrupts disabled,
    causing the CPU that's attempting to generate the backtrace output
    to hang itself.

  - Not succeed in generating the desired output from remote CPUs.

  - Produce warnings about this from smp_call_function_many(), for
    example:

    [42760.526910] INFO: rcu_sched detected stalls on CPUs/tasks:
    [42760.535755]  0-...!: (1 GPs behind) idle=ade/140000000000000/0 softirq=526944/526945 fqs=0
    [42760.547874]  1-...!: (0 ticks this GP) idle=e4a/140000000000000/0 softirq=547885/547885 fqs=0
    [42760.559869]  (detected by 2, t=2162 jiffies, g=266689, c=266688, q=33)
    [42760.568927] ------------[ cut here ]------------
    [42760.576146] WARNING: CPU: 2 PID: 1216 at kernel/smp.c:416 smp_call_function_many+0x88/0x20c
    [42760.587839] Modules linked in:
    [42760.593152] CPU: 2 PID: 1216 Comm: sh Not tainted 4.15.4-00373-gee058bb4d0c2 #2
    [42760.603767] Stack : 8e09bd20 8e09bd20 8e09bd20 fffffff0 00000007 00000006 00000000 8e09bca8
    [42760.616937]         95b2b379 95b2b379 807a0080 00000007 81944518 0000018a 00000032 00000000
    [42760.630095]         00000000 00000030 80000000 00000000 806eca74 00000009 8017e2b8 000001a0
    [42760.643169]         00000000 00000002 00000000 8e09baa4 00000008 808b8008 86d69080 8e09bca0
    [42760.656282]         8e09ad50 805e20aa 00000000 00000000 00000000 8017e2b8 00000009 801070ca
    [42760.669424]         ...
    [42760.673919] Call Trace:
    [42760.678672] [<27fde568>] show_stack+0x70/0xf0
    [42760.685417] [<84751641>] dump_stack+0xaa/0xd0
    [42760.692188] [<699d671c>] __warn+0x80/0x92
    [42760.698549] [<68915d41>] warn_slowpath_null+0x28/0x36
    [42760.705912] [<f7c76c1c>] smp_call_function_many+0x88/0x20c
    [42760.713696] [<6bbdfc2a>] arch_trigger_cpumask_backtrace+0x30/0x4a
    [42760.722216] [<f845bd33>] rcu_dump_cpu_stacks+0x6a/0x98
    [42760.729580] [<796e7629>] rcu_check_callbacks+0x672/0x6ac
    [42760.737476] [<059b3b43>] update_process_times+0x18/0x34
    [42760.744981] [<6eb94941>] tick_sched_handle.isra.5+0x26/0x38
    [42760.752793] [<478d3d70>] tick_sched_timer+0x1c/0x50
    [42760.759882] [<e56ea39f>] __hrtimer_run_queues+0xc6/0x226
    [42760.767418] [<e88bbcae>] hrtimer_interrupt+0x88/0x19a
    [42760.775031] [<6765a19e>] gic_compare_interrupt+0x2e/0x3a
    [42760.782761] [<0558bf5f>] handle_percpu_devid_irq+0x78/0x168
    [42760.790795] [<90c11ba2>] generic_handle_irq+0x1e/0x2c
    [42760.798117] [<1b6d462c>] gic_handle_local_int+0x38/0x86
    [42760.805545] [<b2ada1c7>] gic_irq_dispatch+0xa/0x14
    [42760.812534] [<90c11ba2>] generic_handle_irq+0x1e/0x2c
    [42760.820086] [<c7521934>] do_IRQ+0x16/0x20
    [42760.826274] [<9aef3ce6>] plat_irq_dispatch+0x62/0x94
    [42760.833458] [<6a94b53c>] except_vec_vi_end+0x70/0x78
    [42760.840655] [<22284043>] smp_call_function_many+0x1ba/0x20c
    [42760.848501] [<54022b58>] smp_call_function+0x1e/0x2c
    [42760.855693] [<ab9fc705>] flush_tlb_mm+0x2a/0x98
    [42760.862730] [<0844cdd0>] tlb_flush_mmu+0x1c/0x44
    [42760.869628] [<cb259b74>] arch_tlb_finish_mmu+0x26/0x3e
    [42760.877021] [<1aeaaf74>] tlb_finish_mmu+0x18/0x66
    [42760.883907] [<b3fce717>] exit_mmap+0x76/0xea
    [42760.890428] [<c4c8a2f6>] mmput+0x80/0x11a
    [42760.896632] [<a41a08f4>] do_exit+0x1f4/0x80c
    [42760.903158] [<ee01cef6>] do_group_exit+0x20/0x7e
    [42760.909990] [<13fa8d54>] __wake_up_parent+0x0/0x1e
    [42760.917045] [<46cf89d0>] smp_call_function_many+0x1a2/0x20c
    [42760.924893] [<8c21a93b>] syscall_common+0x14/0x1c
    [42760.931765] ---[ end trace 02aa09da9dc52a60 ]---
    [42760.938342] ------------[ cut here ]------------
    [42760.945311] WARNING: CPU: 2 PID: 1216 at kernel/smp.c:291 smp_call_function_single+0xee/0xf8
    ...

This patch switches MIPS' arch_trigger_cpumask_backtrace() to use async
IPIs & smp_call_function_single_async() in order to resolve this
problem. We ensure use of the pre-allocated call_single_data_t
structures is serialized by maintaining a cpumask indicating that
they're busy, and refusing to attempt to send an IPI when a CPU's bit is
set in this mask. This should only happen if a CPU hasn't responded to a
previous backtrace IPI - ie. if it's hung - and we print a warning to
the console in this case.

I've marked this for stable branches as far back as v4.9, to which it
applies cleanly. Strictly speaking the faulty MIPS implementation can be
traced further back to commit 856839b76836 ("MIPS: Add
arch_trigger_all_cpu_backtrace() function") in v3.19, but kernel
versions v3.19 through v4.8 will require further work to backport due to
the rework performed in commit 9a01c3ed5cdb ("nmi_backtrace: add more
trigger_*_cpu_backtrace() methods").

Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19597/
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v4.9+
Fixes: 856839b76836 ("MIPS: Add arch_trigger_all_cpu_backtrace() function")
Fixes: 9a01c3ed5cdb ("nmi_backtrace: add more trigger_*_cpu_backtrace() methods")
[ Huacai: backported to 4.4: Restruction since generic NMI solution is unavailable ]
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/kernel/process.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 7c5008892ac9c..9684a0d22d975 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -633,21 +633,48 @@ unsigned long arch_align_stack(unsigned long sp)
 	return sp & ALMASK;
 }
 
+static DEFINE_PER_CPU(struct call_single_data, backtrace_csd);
+static struct cpumask backtrace_csd_busy;
+
 static void arch_dump_stack(void *info)
 {
 	struct pt_regs *regs;
+	static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
 
+	arch_spin_lock(&lock);
 	regs = get_irq_regs();
 
 	if (regs)
 		show_regs(regs);
 	else
 		dump_stack();
+	arch_spin_unlock(&lock);
+
+	cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
 }
 
 void arch_trigger_all_cpu_backtrace(bool include_self)
 {
-	smp_call_function(arch_dump_stack, NULL, 1);
+	struct call_single_data *csd;
+	int cpu;
+
+	for_each_cpu(cpu, cpu_online_mask) {
+		/*
+		 * If we previously sent an IPI to the target CPU & it hasn't
+		 * cleared its bit in the busy cpumask then it didn't handle
+		 * our previous IPI & it's not safe for us to reuse the
+		 * call_single_data_t.
+		 */
+		if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
+			pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
+				cpu);
+			continue;
+		}
+
+		csd = &per_cpu(backtrace_csd, cpu);
+		csd->func = arch_dump_stack;
+		smp_call_function_single_async(cpu, csd);
+	}
 }
 
 int mips_get_process_fp_mode(struct task_struct *task)

From dbf307e15c312efb38d8ba3a7d8f4f2d04ebadf5 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Wed, 6 Jun 2018 12:14:56 +0200
Subject: [PATCH 0998/1852] netfilter: ebtables: reject non-bridge targets

commit 11ff7288beb2b7da889a014aff0a7b80bf8efcf3 upstream.

the ebtables evaluation loop expects targets to return
positive values (jumps), or negative values (absolute verdicts).

This is completely different from what xtables does.
In xtables, targets are expected to return the standard netfilter
verdicts, i.e. NF_DROP, NF_ACCEPT, etc.

ebtables will consider these as jumps.

Therefore reject any target found due to unspec fallback.
v2: also reject watchers.  ebtables ignores their return value, so
a target that assumes skb ownership (and returns NF_STOLEN) causes
use-after-free.

The only watchers in the 'ebtables' front-end are log and nflog;
both have AF_BRIDGE specific wrappers on kernel side.

Reported-by: syzbot+2b43f681169a2a0d306a@syzkaller.appspotmail.com
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/netfilter/ebtables.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/net/bridge/netfilter/ebtables.c b/net/bridge/netfilter/ebtables.c
index 665fd87cc1050..8b8a43fda6ca4 100644
--- a/net/bridge/netfilter/ebtables.c
+++ b/net/bridge/netfilter/ebtables.c
@@ -404,6 +404,12 @@ ebt_check_watcher(struct ebt_entry_watcher *w, struct xt_tgchk_param *par,
 	watcher = xt_request_find_target(NFPROTO_BRIDGE, w->u.name, 0);
 	if (IS_ERR(watcher))
 		return PTR_ERR(watcher);
+
+	if (watcher->family != NFPROTO_BRIDGE) {
+		module_put(watcher->me);
+		return -ENOENT;
+	}
+
 	w->u.watcher = watcher;
 
 	par->target   = watcher;
@@ -724,6 +730,13 @@ ebt_check_entry(struct ebt_entry *e, struct net *net,
 		goto cleanup_watchers;
 	}
 
+	/* Reject UNSPEC, xtables verdicts/return values are incompatible */
+	if (target->family != NFPROTO_BRIDGE) {
+		module_put(target->me);
+		ret = -ENOENT;
+		goto cleanup_watchers;
+	}
+
 	t->u.target = target;
 	if (t->u.target == &ebt_standard_target) {
 		if (gap < sizeof(struct ebt_standard_target)) {

From 9afe57f56e2900bb742d5e779c30efc2b4c59695 Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Wed, 11 Jul 2018 10:46:29 -0700
Subject: [PATCH 0999/1852] KEYS: DNS: fix parsing multiple options

commit c604cb767049b78b3075497b80ebb8fd530ea2cc upstream.

My recent fix for dns_resolver_preparse() printing very long strings was
incomplete, as shown by syzbot which still managed to hit the
WARN_ONCE() in set_precision() by adding a crafted "dns_resolver" key:

    precision 50001 too large
    WARNING: CPU: 7 PID: 864 at lib/vsprintf.c:2164 vsnprintf+0x48a/0x5a0

The bug this time isn't just a printing bug, but also a logical error
when multiple options ("#"-separated strings) are given in the key
payload.  Specifically, when separating an option string into name and
value, if there is no value then the name is incorrectly considered to
end at the end of the key payload, rather than the end of the current
option.  This bypasses validation of the option length, and also means
that specifying multiple options is broken -- which presumably has gone
unnoticed as there is currently only one valid option anyway.

A similar problem also applied to option values, as the kstrtoul() when
parsing the "dnserror" option will read past the end of the current
option and into the next option.

Fix these bugs by correctly computing the length of the option name and
by copying the option value, null-terminated, into a temporary buffer.

Reproducer for the WARN_ONCE() that syzbot hit:

    perl -e 'print "#A#", "\0" x 50000' | keyctl padd dns_resolver desc @s

Reproducer for "dnserror" option being parsed incorrectly (expected
behavior is to fail when seeing the unknown option "foo", actual
behavior was to read the dnserror value as "1#foo" and fail there):

    perl -e 'print "#dnserror=1#foo\0"' | keyctl padd dns_resolver desc @s

Reported-by: syzbot <syzkaller@googlegroups.com>
Fixes: 4a2d789267e0 ("DNS: If the DNS server returns an error, allow that to be cached [ver #2]")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dns_resolver/dns_key.c | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/net/dns_resolver/dns_key.c b/net/dns_resolver/dns_key.c
index e26df2764e836..1689c7bdf1c97 100644
--- a/net/dns_resolver/dns_key.c
+++ b/net/dns_resolver/dns_key.c
@@ -87,35 +87,39 @@ dns_resolver_preparse(struct key_preparsed_payload *prep)
 		opt++;
 		kdebug("options: '%s'", opt);
 		do {
+			int opt_len, opt_nlen;
 			const char *eq;
-			int opt_len, opt_nlen, opt_vlen, tmp;
+			char optval[128];
 
 			next_opt = memchr(opt, '#', end - opt) ?: end;
 			opt_len = next_opt - opt;
-			if (opt_len <= 0 || opt_len > 128) {
+			if (opt_len <= 0 || opt_len > sizeof(optval)) {
 				pr_warn_ratelimited("Invalid option length (%d) for dns_resolver key\n",
 						    opt_len);
 				return -EINVAL;
 			}
 
-			eq = memchr(opt, '=', opt_len) ?: end;
-			opt_nlen = eq - opt;
-			eq++;
-			opt_vlen = next_opt - eq; /* will be -1 if no value */
+			eq = memchr(opt, '=', opt_len);
+			if (eq) {
+				opt_nlen = eq - opt;
+				eq++;
+				memcpy(optval, eq, next_opt - eq);
+				optval[next_opt - eq] = '\0';
+			} else {
+				opt_nlen = opt_len;
+				optval[0] = '\0';
+			}
 
-			tmp = opt_vlen >= 0 ? opt_vlen : 0;
-			kdebug("option '%*.*s' val '%*.*s'",
-			       opt_nlen, opt_nlen, opt, tmp, tmp, eq);
+			kdebug("option '%*.*s' val '%s'",
+			       opt_nlen, opt_nlen, opt, optval);
 
 			/* see if it's an error number representing a DNS error
 			 * that's to be recorded as the result in this key */
 			if (opt_nlen == sizeof(DNS_ERRORNO_OPTION) - 1 &&
 			    memcmp(opt, DNS_ERRORNO_OPTION, opt_nlen) == 0) {
 				kdebug("dns error number option");
-				if (opt_vlen <= 0)
-					goto bad_option_value;
 
-				ret = kstrtoul(eq, 10, &derrno);
+				ret = kstrtoul(optval, 10, &derrno);
 				if (ret < 0)
 					goto bad_option_value;
 

From e88351c92db297dce62c2a690a21fc94807af36b Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Date: Thu, 14 Jun 2018 11:52:34 -0700
Subject: [PATCH 1000/1852] rds: avoid unenecessary cong_update in loop
 transport

commit f1693c63ab133d16994cc50f773982b5905af264 upstream.

Loop transport which is self loopback, remote port congestion
update isn't relevant. Infact the xmit path already ignores it.
Receive path needs to do the same.

Reported-by: syzbot+4c20b3866171ce8441d2@syzkaller.appspotmail.com
Reviewed-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/rds/loop.c | 1 +
 net/rds/rds.h  | 5 +++++
 net/rds/recv.c | 5 +++++
 3 files changed, 11 insertions(+)

diff --git a/net/rds/loop.c b/net/rds/loop.c
index 6b12b68541ae9..05cab8c5a3791 100644
--- a/net/rds/loop.c
+++ b/net/rds/loop.c
@@ -191,4 +191,5 @@ struct rds_transport rds_loop_transport = {
 	.inc_copy_to_user	= rds_message_inc_copy_to_user,
 	.inc_free		= rds_loop_inc_free,
 	.t_name			= "loopback",
+	.t_type			= RDS_TRANS_LOOP,
 };
diff --git a/net/rds/rds.h b/net/rds/rds.h
index 4588860f4c3bb..254f1345cf7ec 100644
--- a/net/rds/rds.h
+++ b/net/rds/rds.h
@@ -401,6 +401,11 @@ struct rds_notifier {
 	int			n_status;
 };
 
+/* Available as part of RDS core, so doesn't need to participate
+ * in get_preferred transport etc
+ */
+#define	RDS_TRANS_LOOP	3
+
 /**
  * struct rds_transport -  transport specific behavioural hooks
  *
diff --git a/net/rds/recv.c b/net/rds/recv.c
index 0514af3ab378f..6275de19689c2 100644
--- a/net/rds/recv.c
+++ b/net/rds/recv.c
@@ -76,6 +76,11 @@ static void rds_recv_rcvbuf_delta(struct rds_sock *rs, struct sock *sk,
 		return;
 
 	rs->rs_rcv_bytes += delta;
+
+	/* loop transport doesn't send/recv congestion updates */
+	if (rs->rs_transport->t_type == RDS_TRANS_LOOP)
+		return;
+
 	now_congested = rs->rs_rcv_bytes > rds_sk_rcvbuf(rs);
 
 	rdsdebug("rs %p (%pI4:%u) recv bytes %d buf %d "

From d31b6d37cf12ed20d708760fe106c728de2f4fcf Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Wed, 18 Jul 2018 18:57:27 +0900
Subject: [PATCH 1001/1852] net/nfc: Avoid stalls when nfc_alloc_send_skb()
 returned NULL.

commit 3bc53be9db21040b5d2de4d455f023c8c494aa68 upstream.

syzbot is reporting stalls at nfc_llcp_send_ui_frame() [1]. This is
because nfc_llcp_send_ui_frame() is retrying the loop without any delay
when nonblocking nfc_alloc_send_skb() returned NULL.

Since there is no need to use MSG_DONTWAIT if we retry until
sock_alloc_send_pskb() succeeds, let's use blocking call.
Also, in case an unexpected error occurred, let's break the loop
if blocking nfc_alloc_send_skb() failed.

[1] https://syzkaller.appspot.com/bug?id=4a131cc571c3733e0eff6bc673f4e36ae48f19c6

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+d29d18215e477cfbfbdd@syzkaller.appspotmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/nfc/llcp_commands.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/net/nfc/llcp_commands.c b/net/nfc/llcp_commands.c
index d25212b135ea7..04f060488686f 100644
--- a/net/nfc/llcp_commands.c
+++ b/net/nfc/llcp_commands.c
@@ -754,11 +754,14 @@ int nfc_llcp_send_ui_frame(struct nfc_llcp_sock *sock, u8 ssap, u8 dsap,
 		pr_debug("Fragment %zd bytes remaining %zd",
 			 frag_len, remaining_len);
 
-		pdu = nfc_alloc_send_skb(sock->dev, &sock->sk, MSG_DONTWAIT,
+		pdu = nfc_alloc_send_skb(sock->dev, &sock->sk, 0,
 					 frag_len + LLCP_HEADER_SIZE, &err);
 		if (pdu == NULL) {
-			pr_err("Could not allocate PDU\n");
-			continue;
+			pr_err("Could not allocate PDU (error=%d)\n", err);
+			len -= remaining_len;
+			if (len == 0)
+				len = err;
+			break;
 		}
 
 		pdu = llcp_add_header(pdu, dsap, ssap, LLCP_PDU_UI);

From 682328f0114529f86fac643aff4ede7bf49849c5 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sun, 22 Jul 2018 14:25:54 +0200
Subject: [PATCH 1002/1852] Linux 4.4.143

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 8290a2ddcdf7e..ce42b27ec387e 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 142
+SUBLEVEL = 143
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From a490cd2e1ff5994ca270fe0ff43c7595ce224e88 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Fri, 3 Aug 2018 11:04:41 +0800
Subject: [PATCH 1003/1852] drivers: rkflash: add 25Q64JVSSIQ and 25Q64FWSSIG
 nor devices

Change-Id: I3b646acd838b22ce6ab49933454eacb4822e0fa8
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/sfc_nor.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index cc51cac0bc298..2856f1cd361be 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -20,10 +20,14 @@ static struct flash_info spi_flash_tbl[] = {
 	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
 	/* GD25Q512MC */
 	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	/* 25Q64JVSSIQ */
+	{0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* 25Q128FV */
 	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
 	/* 25Q256FV */
 	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	/* 25Q64FWSSIG */
+	{0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* XT25F128A */
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */

From a6601b6209f615cf26bc6fd708f8a124a707c80c Mon Sep 17 00:00:00 2001
From: CanYang He <hcy@rock-chips.com>
Date: Thu, 2 Aug 2018 17:49:08 +0800
Subject: [PATCH 1004/1852] arm64: dts: rockchip: prevent some lp4 scale
 frequency for rk3399 evb3 lp4

lpddr4 scale frequency when display on, cause the display shake and
vop POST_BUF_EMPTY

Change-Id: I2bfef85ae34c3c85609dcb3506272ff0e27cb0c7
Signed-off-by: CanYang He <hcy@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android-lp4.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android-lp4.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android-lp4.dts
index 8dd0a0bf36ee5..3afffea7b071f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android-lp4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android-lp4.dts
@@ -117,11 +117,11 @@
 		SYS_STATUS_NORMAL       800000
 		SYS_STATUS_REBOOT       400000
 		SYS_STATUS_SUSPEND      400000
-		SYS_STATUS_VIDEO_1080P  400000
+		SYS_STATUS_VIDEO_1080P  800000
 		SYS_STATUS_VIDEO_4K     800000
 		SYS_STATUS_VIDEO_4K_10B 800000
 		SYS_STATUS_PERFORMANCE  800000
-		SYS_STATUS_BOOST        400000
+		SYS_STATUS_BOOST        800000
 		SYS_STATUS_DUALVIEW     800000
 		SYS_STATUS_ISP          800000
 	>;

From 72ee108aff1d3c445a98f1c49f581604a22ebb64 Mon Sep 17 00:00:00 2001
From: Yao Xiao <xiaoyao@rock-chips.com>
Date: Wed, 1 Aug 2018 09:43:57 +0800
Subject: [PATCH 1005/1852] net: rockchip_wlan: rtl8189fs: support gpio to wake
 up for wowlan

Change-Id: I7500c96d21c07c453e4dd6e81a393c08f48728f7
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/rtl8189fs/Makefile        | 4 ++--
 drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/hal_com.c   | 2 +-
 .../net/wireless/rockchip_wlan/rtl8189fs/include/autoconf.h  | 2 +-
 drivers/net/wireless/rockchip_wlan/rtl8189fs/include/wifi.h  | 2 +-
 .../wireless/rockchip_wlan/rtl8189fs/platform/platform_ops.c | 5 +++++
 5 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8189fs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8189fs/Makefile
index 8bd53d427a40b..4bb099292b195 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8189fs/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/rtl8189fs/Makefile
@@ -71,8 +71,8 @@ CONFIG_ANTENNA_DIVERSITY = n
 CONFIG_TDLS = n
 CONFIG_WIFI_MONITOR = n
 ######################## Wake On Lan ##########################
-CONFIG_WOWLAN = n
-CONFIG_GPIO_WAKEUP = n
+CONFIG_WOWLAN = y
+CONFIG_GPIO_WAKEUP = y
 CONFIG_WAKEUP_GPIO_IDX = default
 CONFIG_HIGH_ACTIVE = n
 CONFIG_PNO_SUPPORT = n
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/hal_com.c b/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/hal_com.c
index ff6e59416d517..59a907fbfd960 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/hal_com.c
+++ b/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/hal_com.c
@@ -2039,7 +2039,7 @@ static void rtw_hal_release_rx_dma(_adapter *adapter)
 
 	rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
 
-	DBG_871X("%s, [0x%04x]: 0x%08x\n",
+	DBG_871X("%s, [0x%04x]: 0x%08lx\n",
 		 __func__, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
 }
 
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/autoconf.h b/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/autoconf.h
index 44efe42337103..6f40903512745 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/autoconf.h
+++ b/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/autoconf.h
@@ -224,7 +224,7 @@
 /*
  * Debug Related Config
  */
-#define CONFIG_DEBUG /* DBG_871X, etc... */
+//#define CONFIG_DEBUG /* DBG_871X, etc... */
 
 #ifdef CONFIG_DEBUG
 #define DBG	1	// for ODM & BTCOEX debug
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/wifi.h b/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/wifi.h
index 9d21a5afdbac8..0192f8918aacc 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/wifi.h
+++ b/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/wifi.h
@@ -25,7 +25,7 @@
 //#error	"BIT define occurred earlier elsewhere!\n"
 #undef BIT
 #endif
-#define BIT(x)	(1 << (x))
+#define BIT(x)	(1UL << (x))
 
 
 #define WLAN_ETHHDR_LEN		14
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8189fs/platform/platform_ops.c b/drivers/net/wireless/rockchip_wlan/rtl8189fs/platform/platform_ops.c
index e9b0191f8bb8f..6352cc598b94f 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8189fs/platform/platform_ops.c
+++ b/drivers/net/wireless/rockchip_wlan/rtl8189fs/platform/platform_ops.c
@@ -18,6 +18,10 @@
  *
  ******************************************************************************/
 #ifndef CONFIG_PLATFORM_OPS
+
+#include <linux/rfkill-wlan.h>
+extern unsigned int oob_irq;
+
 /*
  * Return:
  *	0:	power on successfully
@@ -27,6 +31,7 @@ int platform_wifi_power_on(void)
 {
 	int ret = 0;
 
+	oob_irq = rockchip_wifi_get_oob_irq();
 
 	return ret;
 }

From 841ce2bb9a88173b292523c975f37d16d6cde16d Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Thu, 2 Aug 2018 09:53:40 +0800
Subject: [PATCH 1006/1852] ARM64: dts: rockchip: rk3328: assign dclk parents
 for vop

Change-Id: Ie3a5d9dc9aad105deb2f7ac1d1d15494512d42f3
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 57ad638bfae6f..0d2251c903b1d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -924,6 +924,8 @@
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		assigned-clocks = <&cru DCLK_LCDC>;
+		assigned-clock-parents = <&cru HDMIPHY>;
 		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
 		reset-names = "axi", "ahb", "dclk";
 		iommus = <&vop_mmu>;

From 12b06847c578ccee4860d63365ecc473abaa9cc7 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 2 Aug 2018 16:02:01 +0800
Subject: [PATCH 1007/1852] media: rockchip: isp1: add suspend/resume to
 detach/attach isp iommu

when system goto suspend, isp will be powered off,
isp iommu will be disabled, need to attach on resume,
detach on suspend.

Change-Id: I2b5e775b44d2b72df4ddcf2db12b54518c3e1f2e
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 24 ++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 03c46cc243acd..cf7bf03412693 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -697,6 +697,27 @@ static int rkisp1_plat_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static int __maybe_unused rkisp1_suspend(struct device *dev)
+{
+	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
+
+	if (isp_dev->domain)
+		iommu_detach_device(isp_dev->domain, isp_dev->dev);
+
+	return 0;
+}
+
+static int __maybe_unused rkisp1_resume(struct device *dev)
+{
+	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
+	int ret = 0;
+
+	if (isp_dev->domain)
+		ret = iommu_attach_device(isp_dev->domain, isp_dev->dev);
+
+	return ret;
+}
+
 static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
 {
 	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
@@ -719,8 +740,7 @@ static int __maybe_unused rkisp1_runtime_resume(struct device *dev)
 }
 
 static const struct dev_pm_ops rkisp1_plat_pm_ops = {
-	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
-				pm_runtime_force_resume)
+	SET_SYSTEM_SLEEP_PM_OPS(rkisp1_suspend, rkisp1_resume)
 	SET_RUNTIME_PM_OPS(rkisp1_runtime_suspend, rkisp1_runtime_resume, NULL)
 };
 

From 8da35517c2f0e9995f1a40ac1e9ed6497294397e Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 31 Jul 2018 18:37:28 +0800
Subject: [PATCH 1008/1852] media: i2c: modify pixel rate of ov13850/ov4689

Change-Id: I4057edc2cb2292ef17f88c5a5787ec777deabe20
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/ov13850.c | 6 +++---
 drivers/media/i2c/ov4689.c  | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/media/i2c/ov13850.c b/drivers/media/i2c/ov13850.c
index 7df5ac335eea4..45718446e8ec7 100644
--- a/drivers/media/i2c/ov13850.c
+++ b/drivers/media/i2c/ov13850.c
@@ -24,8 +24,9 @@
 #define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
 #endif
 
-/* 45Mhz * 4 Binning */
-#define OV13850_PIXEL_RATE		(45 * 1000 * 1000 * 4)
+#define OV13850_LINK_FREQ_300MHZ	300000000
+/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
+#define OV13850_PIXEL_RATE		(OV13850_LINK_FREQ_300MHZ * 2 * 2 / 10)
 #define OV13850_XVCLK_FREQ		24000000
 
 #define CHIP_ID				0x00d850
@@ -589,7 +590,6 @@ static const struct ov13850_mode supported_modes[] = {
 	},
 };
 
-#define OV13850_LINK_FREQ_300MHZ		300000000
 static const s64 link_freq_menu_items[] = {
 	OV13850_LINK_FREQ_300MHZ
 };
diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c
index 819b856e98722..2f90ef707b84b 100644
--- a/drivers/media/i2c/ov4689.c
+++ b/drivers/media/i2c/ov4689.c
@@ -24,8 +24,9 @@
 #define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
 #endif
 
-/* 45Mhz * 4 Binning */
-#define OV4689_PIXEL_RATE		(45 * 1000 * 1000 * 4)
+#define OV4689_LINK_FREQ_500MHZ		500000000
+/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
+#define OV4689_PIXEL_RATE		(OV4689_LINK_FREQ_500MHZ * 2 * 2 / 10)
 #define OV4689_XVCLK_FREQ		24000000
 
 #define CHIP_ID				0x004688
@@ -398,7 +399,6 @@ static const struct ov4689_mode supported_modes[] = {
 	},
 };
 
-#define OV4689_LINK_FREQ_500MHZ		500000000
 static const s64 link_freq_menu_items[] = {
 	OV4689_LINK_FREQ_500MHZ
 };

From a6b100a6dfbd2574a9d15c7b45d1bd13e6a0000d Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 3 Aug 2018 17:01:02 +0800
Subject: [PATCH 1009/1852] ASoC: rk3308_codec: set fmt for all adcs

This patch fixup codec slave mode work abnormal, it is
because the mode bits have not been set. and whatever,
all adcs' fmt should be the same.

Change-Id: Ie5ea7cdddc25c41790797fd2b4ef760a1f2ed727
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 9894d816b303f..fd8be99d9a4c5 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -725,7 +725,7 @@ static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
 	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
 	unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
 	int idx, grp, is_master;
-	int type = ADC_TYPE_NORMAL;
+	int type = ADC_TYPE_ALL;
 
 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_CBS_CFS:

From 74c611d1a07b83cc5a5b16cf2a60fd42f39c1e39 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Tue, 31 Jul 2018 18:32:09 +0800
Subject: [PATCH 1010/1852] media: rockchip: isp1: adjust isp clk by pixel rate
 of sensor

Change-Id: I47e56b330a8f93f77cbeadd30dde97909ef18379
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 95 ++++++++++++++++++++--
 drivers/media/platform/rockchip/isp1/dev.h |  4 +-
 2 files changed, 90 insertions(+), 9 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index cf7bf03412693..aa50ea9699710 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -51,8 +51,10 @@
 
 struct isp_match_data {
 	const char * const *clks;
-	int size;
+	int num_clks;
 	enum rkisp1_isp_ver isp_ver;
+	const unsigned int *clk_rate_tbl;
+	int num_clk_rate_tbl;
 };
 
 int rkisp1_debug;
@@ -140,6 +142,54 @@ static int __isp_pipeline_s_power(struct rkisp1_pipeline *p, bool on)
 	return ret;
 }
 
+static int __isp_pipeline_s_isp_clk(struct rkisp1_pipeline *p)
+{
+	struct rkisp1_device *dev = container_of(p, struct rkisp1_device, pipe);
+	struct v4l2_subdev *sd;
+	struct v4l2_ctrl *ctrl;
+	u64 data_rate;
+	int i;
+
+	/* find the subdev of active sensor */
+	sd = p->subdevs[0];
+	for (i = 0; i < p->num_subdevs; i++) {
+		sd = p->subdevs[i];
+		if (sd->entity.type == MEDIA_ENT_T_V4L2_SUBDEV_SENSOR)
+			break;
+	}
+
+	if (i == p->num_subdevs) {
+		v4l2_warn(sd, "No active sensor\n");
+		return -EPIPE;
+	}
+
+	ctrl = v4l2_ctrl_find(sd->ctrl_handler, V4L2_CID_PIXEL_RATE);
+	if (!ctrl) {
+		v4l2_warn(sd, "No pixel rate control in subdev\n");
+		return -EPIPE;
+	}
+
+	/* calculate data rate */
+	data_rate = v4l2_ctrl_g_ctrl_int64(ctrl) *
+		    dev->isp_sdev.in_fmt.bus_width;
+	data_rate >>= 3;
+	do_div(data_rate, 1000 * 1000);
+
+	/* compare with isp clock adjustment table */
+	for (i = 0; i < dev->num_clk_rate_tbl; i++)
+		if (data_rate <= dev->clk_rate_tbl[i])
+			break;
+	if (i == dev->num_clk_rate_tbl)
+		i--;
+
+	/* set isp clock rate */
+	clk_set_rate(dev->clks[0], dev->clk_rate_tbl[i] * 1000000UL);
+	v4l2_dbg(1, rkisp1_debug, sd, "set isp clk = %luHz\n",
+		 clk_get_rate(dev->clks[0]));
+
+	return 0;
+}
+
 static int rkisp1_pipeline_open(struct rkisp1_pipeline *p,
 				struct media_entity *me,
 				bool prepare)
@@ -158,6 +208,10 @@ static int rkisp1_pipeline_open(struct rkisp1_pipeline *p,
 	if (!p->num_subdevs)
 		return -EINVAL;
 
+	ret = __isp_pipeline_s_isp_clk(p);
+	if (ret < 0)
+		return ret;
+
 	ret = __isp_pipeline_s_power(p, 1);
 	if (ret < 0)
 		return ret;
@@ -454,22 +508,45 @@ static const char * const rk3399_isp_clks[] = {
 	"pclk_isp_wrap"
 };
 
+/* isp clock adjustment table (MHz) */
+/* TODO: test on rk3288 */
+static const unsigned int rk3288_isp_clk_rate[] = {
+	300, 400, 600
+};
+
+/* isp clock adjustment table (MHz) */
+/* TODO: test on rk3326 */
+static const unsigned int rk3326_isp_clk_rate[] = {
+	300, 400, 600
+};
+
+/* isp clock adjustment table (MHz) */
+static const unsigned int rk3399_isp_clk_rate[] = {
+	300, 400, 600
+};
+
 static const struct isp_match_data rk3288_isp_match_data = {
 	.clks = rk3288_isp_clks,
-	.size = ARRAY_SIZE(rk3288_isp_clks),
+	.num_clks = ARRAY_SIZE(rk3288_isp_clks),
 	.isp_ver = ISP_V10,
+	.clk_rate_tbl = rk3288_isp_clk_rate,
+	.num_clk_rate_tbl = ARRAY_SIZE(rk3288_isp_clk_rate),
 };
 
 static const struct isp_match_data rk3326_isp_match_data = {
 	.clks = rk3326_isp_clks,
-	.size = ARRAY_SIZE(rk3326_isp_clks),
+	.num_clks = ARRAY_SIZE(rk3326_isp_clks),
 	.isp_ver = ISP_V12,
+	.clk_rate_tbl = rk3326_isp_clk_rate,
+	.num_clk_rate_tbl = ARRAY_SIZE(rk3326_isp_clk_rate),
 };
 
 static const struct isp_match_data rk3399_isp_match_data = {
 	.clks = rk3399_isp_clks,
-	.size = ARRAY_SIZE(rk3399_isp_clks),
+	.num_clks = ARRAY_SIZE(rk3399_isp_clks),
 	.isp_ver = ISP_V10,
+	.clk_rate_tbl = rk3399_isp_clk_rate,
+	.num_clk_rate_tbl = ARRAY_SIZE(rk3399_isp_clk_rate),
 };
 
 static const struct of_device_id rkisp1_plat_of_match[] = {
@@ -511,7 +588,7 @@ static void rkisp1_disable_sys_clk(struct rkisp1_device *rkisp1_dev)
 {
 	int i;
 
-	for (i = rkisp1_dev->clk_size - 1; i >= 0; i--)
+	for (i = rkisp1_dev->num_clks - 1; i >= 0; i--)
 		if (!IS_ERR(rkisp1_dev->clks[i]))
 			clk_disable_unprepare(rkisp1_dev->clks[i]);
 }
@@ -520,7 +597,7 @@ static int rkisp1_enable_sys_clk(struct rkisp1_device *rkisp1_dev)
 {
 	int i, ret = -EINVAL;
 
-	for (i = 0; i < rkisp1_dev->clk_size; i++) {
+	for (i = 0; i < rkisp1_dev->num_clks; i++) {
 		if (!IS_ERR(rkisp1_dev->clks[i])) {
 			ret = clk_prepare_enable(rkisp1_dev->clks[i]);
 			if (ret < 0)
@@ -623,15 +700,17 @@ static int rkisp1_plat_probe(struct platform_device *pdev)
 
 	isp_dev->irq = irq;
 	match_data = match->data;
-	for (i = 0; i < match_data->size; i++) {
+	for (i = 0; i < match_data->num_clks; i++) {
 		struct clk *clk = devm_clk_get(dev, match_data->clks[i]);
 
 		if (IS_ERR(clk))
 			dev_dbg(dev, "failed to get %s\n", match_data->clks[i]);
 		isp_dev->clks[i] = clk;
 	}
-	isp_dev->clk_size = match_data->size;
+	isp_dev->num_clks = match_data->num_clks;
 	isp_dev->isp_ver = match_data->isp_ver;
+	isp_dev->clk_rate_tbl = match_data->clk_rate_tbl;
+	isp_dev->num_clk_rate_tbl = match_data->num_clk_rate_tbl;
 
 	atomic_set(&isp_dev->pipe.power_cnt, 0);
 	atomic_set(&isp_dev->pipe.stream_cnt, 0);
diff --git a/drivers/media/platform/rockchip/isp1/dev.h b/drivers/media/platform/rockchip/isp1/dev.h
index 9f3b0fff29781..36b2eac5cea91 100644
--- a/drivers/media/platform/rockchip/isp1/dev.h
+++ b/drivers/media/platform/rockchip/isp1/dev.h
@@ -106,7 +106,7 @@ struct rkisp1_device {
 	int irq;
 	struct device *dev;
 	struct clk *clks[RKISP1_MAX_BUS_CLK];
-	int clk_size;
+	int num_clks;
 	struct v4l2_device v4l2_dev;
 	struct v4l2_ctrl_handler ctrl_handler;
 	struct media_device media_dev;
@@ -123,6 +123,8 @@ struct rkisp1_device {
 	struct vb2_alloc_ctx *alloc_ctx;
 	struct iommu_domain *domain;
 	enum rkisp1_isp_ver isp_ver;
+	const unsigned int *clk_rate_tbl;
+	int num_clk_rate_tbl;
 };
 
 #endif

From 6d75ab73f8d883afdcebe9df141ddf9223fde9e6 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 6 Aug 2018 17:03:29 +0800
Subject: [PATCH 1011/1852] Revert "UPSTREAM: ANDROID: binder: remove 32-bit
 binder interface."

This reverts commit 9ffd98e8155c716ae987491626544be016edd83c.
Which breaks 32bit Android <9
Make ANDROID_BINDER_IPC_32BIT depends on ANDROID_VERSION.

Change-Id: Ie599606ce998b27342471f31d1480d0a87135375
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/android/Kconfig  | 13 +++++++++++++
 drivers/android/binder.c |  4 ++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig
index 63ed9ceebf7b0..7502ac3086c13 100644
--- a/drivers/android/Kconfig
+++ b/drivers/android/Kconfig
@@ -31,6 +31,19 @@ config ANDROID_BINDER_DEVICES
 	  created. Each binder device has its own context manager, and is
 	  therefore logically separated from the other devices.
 
+config ANDROID_BINDER_IPC_32BIT
+	bool
+	depends on !64BIT && ANDROID_BINDER_IPC
+	default y if ANDROID_VERSION < 0x09000000
+	---help---
+	  The Binder API has been changed to support both 32 and 64bit
+	  applications in a mixed environment.
+
+	  Enable this to support an old 32-bit Android user-space (v4.4 and
+	  earlier).
+
+	  Note that enabling this will break newer Android user-space.
+
 config ANDROID_BINDER_IPC_SELFTEST
 	bool "Android Binder IPC Driver Selftest"
 	depends on ANDROID_BINDER_IPC
diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index b0c9d35481239..d1dfbe34fa7c7 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -71,6 +71,10 @@
 #include <linux/security.h>
 #include <linux/spinlock.h>
 
+#ifdef CONFIG_ANDROID_BINDER_IPC_32BIT
+#define BINDER_IPC_32BIT 1
+#endif
+
 #include <uapi/linux/android/binder.h>
 #include "binder_alloc.h"
 #include "binder_trace.h"

From 85ef8f9ed5c5a66791c7de49427330838d97d752 Mon Sep 17 00:00:00 2001
From: Zhen Chen <chenzhen@rock-chips.com>
Date: Tue, 7 Aug 2018 09:34:12 +0800
Subject: [PATCH 1012/1852] Mali: midgard: set "FMODE_UNSIGNED_OFFSET" bit in
 file flags of mali device file

According to commit "mmap: introduce sane default mmap limits"

Change-Id: I96bc78053c06fdeaef178662dda36770da867436
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
---
 drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 3a6e5aae0bceb..24bafe2bf32cc 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -1154,6 +1154,7 @@ static int kbase_open(struct inode *inode, struct file *filp)
 	}
 
 	init_waitqueue_head(&kctx->event_queue);
+	filp->f_mode |= FMODE_UNSIGNED_OFFSET;
 	filp->private_data = kctx;
 	kctx->filp = filp;
 

From 8ae4d7517e2d95786413b196e33247614ae8fea8 Mon Sep 17 00:00:00 2001
From: Jian Qiu <qiujian@rock-chips.com>
Date: Thu, 2 Aug 2018 08:52:46 +0800
Subject: [PATCH 1013/1852] arm64: dts: rockchip: px30-android: update bootargs

Remove androidboot.selinux=permissive

Change-Id: I6c5ff0a1abd8c4356408f14d68df8ecc1515b7a4
Signed-off-by: Jian Qiu <qiujian@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30-android.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-android.dtsi b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
index 80a9e73f337e2..5c1b66bdf5a72 100644
--- a/arch/arm64/boot/dts/rockchip/px30-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
@@ -6,7 +6,7 @@
 
 / {
 	chosen {
-		bootargs = "earlyprintk=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.selinux=permissive androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
+		bootargs = "earlyprintk=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
 	};
 
 	fiq-debugger {

From 0561e88bb344290560a3904f06b1ef96a581b9c1 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 6 Aug 2018 14:27:11 +0800
Subject: [PATCH 1014/1852] drm/rockchip: dsi: Don't hardcode/bypass phy
 default parameters

The parameters of Synopsys PHY is programmed with the default values
for the corresponding hsfreqrange (test code 8'h44, HS RX Control of Lane 0)

Change-Id: I92c6bb0a9cad55e7b1695ca600f9c68804361dac
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 188 +++++++------------------
 1 file changed, 47 insertions(+), 141 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index a3d8edfe17a07..0465025056dde 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -219,46 +219,16 @@
 #define PHY_STATUS_TIMEOUT_US		10000
 #define CMD_PKT_STATUS_TIMEOUT_US	20000
 
-#define BYPASS_VCO_RANGE	BIT(7)
-#define VCO_RANGE_CON_SEL(val)	(((val) & 0x7) << 3)
-#define VCO_IN_CAP_CON_DEFAULT	(0x0 << 1)
-#define VCO_IN_CAP_CON_LOW	(0x1 << 1)
-#define VCO_IN_CAP_CON_HIGH	(0x2 << 1)
-#define REF_BIAS_CUR_SEL	BIT(0)
-
-#define CP_CURRENT_3MA		BIT(3)
-#define CP_PROGRAM_EN		BIT(7)
-#define LPF_PROGRAM_EN		BIT(6)
-#define LPF_RESISTORS_20_KOHM	0
-
-#define HSFREQRANGE_SEL(val)	(((val) & 0x3f) << 1)
-
-#define INPUT_DIVIDER(val)	((val - 1) & 0x7f)
-#define LOW_PROGRAM_EN		0
-#define HIGH_PROGRAM_EN		BIT(7)
-#define LOOP_DIV_LOW_SEL(val)	((val - 1) & 0x1f)
-#define LOOP_DIV_HIGH_SEL(val)	(((val - 1) >> 5) & 0x1f)
-#define PLL_LOOP_DIV_EN		BIT(5)
-#define PLL_INPUT_DIV_EN	BIT(4)
-
-#define POWER_CONTROL		BIT(6)
-#define INTERNAL_REG_CURRENT	BIT(3)
-#define BIAS_BLOCK_ON		BIT(2)
-#define BANDGAP_ON		BIT(0)
-
-#define TER_RESISTOR_HIGH	BIT(7)
-#define	TER_RESISTOR_LOW	0
-#define LEVEL_SHIFTERS_ON	BIT(6)
-#define TER_CAL_DONE		BIT(5)
-#define SETRD_MAX		(0x7 << 2)
-#define POWER_MANAGE		BIT(1)
-#define TER_RESISTORS_ON	BIT(0)
-
-#define BIASEXTR_SEL(val)	((val) & 0x7)
-#define BANDGAP_SEL(val)	((val) & 0x7)
-#define TLP_PROGRAM_EN		BIT(7)
-#define THS_PRE_PROGRAM_EN	BIT(7)
-#define THS_ZERO_PROGRAM_EN	BIT(6)
+/* Test Code: 0x44 (HS RX Control of Lane 0) */
+#define HSFREQRANGE(x)			UPDATE(x, 6, 1)
+/* Test Code: 0x17 (PLL Input Divider Ratio) */
+#define INPUT_DIV(x)			UPDATE(x, 6, 0)
+/* Test Code: 0x18 (PLL Loop Divider Ratio) */
+#define FEEDBACK_DIV_LO(x)		UPDATE(x, 4, 0)
+#define FEEDBACK_DIV_HI(x)		(BIT(7) | UPDATE(x, 3, 0))
+/* Test Code: 0x19 (PLL Input and Loop Divider Ratios Control) */
+#define FEEDBACK_DIV_DEF_VAL_BYPASS	BIT(5)
+#define INPUT_DIV_DEF_VAL_BYPASS	BIT(4)
 
 enum soc_type {
 	PX30,
@@ -269,28 +239,6 @@ enum soc_type {
 	RK3399,
 };
 
-enum {
-	BANDGAP_97_07,
-	BANDGAP_98_05,
-	BANDGAP_99_02,
-	BANDGAP_100_00,
-	BANDGAP_93_17,
-	BANDGAP_94_15,
-	BANDGAP_95_12,
-	BANDGAP_96_10,
-};
-
-enum {
-	BIASEXTR_87_1,
-	BIASEXTR_91_5,
-	BIASEXTR_95_9,
-	BIASEXTR_100,
-	BIASEXTR_105_94,
-	BIASEXTR_111_88,
-	BIASEXTR_118_8,
-	BIASEXTR_127_7,
-};
-
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
 
 enum grf_reg_fields {
@@ -366,25 +314,6 @@ enum dw_mipi_dsi_mode {
 	DSI_VIDEO_MODE,
 };
 
-struct dphy_pll_testdin_map {
-	unsigned int max_mbps;
-	u8 testdin;
-};
-
-/* The table is based on 27MHz DPHY pll reference clock. */
-static const struct dphy_pll_testdin_map dptdin_map[] = {
-	{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
-	{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
-	{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
-	{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
-	{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
-	{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
-	{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
-	{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
-	{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
-	{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
-};
-
 static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 			    unsigned int val)
 {
@@ -404,17 +333,6 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	regmap_write(dsi->grf, reg, (val << lsb) | (GENMASK(msb, lsb) << 16));
 }
 
-static int max_mbps_to_testdin(unsigned int max_mbps)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
-		if (dptdin_map[i].max_mbps > max_mbps)
-			return dptdin_map[i].testdin;
-
-	return -EINVAL;
-}
-
 static inline struct dw_mipi_dsi *host_to_dsi(struct mipi_dsi_host *host)
 {
 	return container_of(host, struct dw_mipi_dsi, dsi_host);
@@ -698,61 +616,52 @@ static void dw_mipi_dsi_host_power_off(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_phy_pll_init(struct dw_mipi_dsi *dsi)
 {
 	struct mipi_dphy *dphy = &dsi->dphy;
+	u16 n, m;
+
+	n = dphy->input_div - 1;
+	m = dphy->feedback_div - 1;
 
-	regmap_write(dphy->regmap, 0x17, INPUT_DIVIDER(dphy->input_div));
-	regmap_write(dphy->regmap, 0x18,
-		     LOOP_DIV_LOW_SEL(dphy->feedback_div) | LOW_PROGRAM_EN);
-	regmap_write(dphy->regmap, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	regmap_write(dphy->regmap, 0x18,
-		     LOOP_DIV_HIGH_SEL(dphy->feedback_div) | HIGH_PROGRAM_EN);
-	regmap_write(dphy->regmap, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	regmap_write(dphy->regmap, 0x19,
+		     FEEDBACK_DIV_DEF_VAL_BYPASS | INPUT_DIV_DEF_VAL_BYPASS);
+	regmap_write(dphy->regmap, 0x17, INPUT_DIV(n));
+	regmap_write(dphy->regmap, 0x18, FEEDBACK_DIV_LO(m));
+	regmap_write(dphy->regmap, 0x18, FEEDBACK_DIV_HI(m >> 5));
 }
 
-static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
 	struct mipi_dphy *dphy = &dsi->dphy;
-	int testdin, vco;
-
-	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
-
-	testdin = max_mbps_to_testdin(dsi->lane_mbps);
-	if (testdin < 0) {
-		dev_err(dsi->dev,
-			"failed to get testdin for %dmbps lane clock\n",
-			dsi->lane_mbps);
-		return testdin;
-	}
+	/* Table 5-1 Frequency Ranges */
+	const struct {
+		unsigned long max_lane_mbps;
+		u8 hsfreqrange;
+	} hsfreqrange_table[] = {
+		{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+		{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+		{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+		{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+		{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+		{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+		{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+		{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+	};
+	u8 hsfreqrange;
+	unsigned int index;
+
+	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
+		if (dsi->lane_mbps <= hsfreqrange_table[index].max_lane_mbps)
+			break;
 
-	regmap_write(dphy->regmap, 0x10,
-		     BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) |
-		     VCO_IN_CAP_CON_LOW | REF_BIAS_CUR_SEL);
-	regmap_write(dphy->regmap, 0x11, CP_CURRENT_3MA);
-	regmap_write(dphy->regmap, 0x12,
-		     CP_PROGRAM_EN | LPF_PROGRAM_EN | LPF_RESISTORS_20_KOHM);
+	if (index == ARRAY_SIZE(hsfreqrange_table))
+		--index;
 
-	regmap_write(dphy->regmap, 0x44, HSFREQRANGE_SEL(testdin));
+	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
+	regmap_write(dphy->regmap, 0x44, HSFREQRANGE(hsfreqrange));
 
 	if (IS_DSI0(dsi))
 		dw_mipi_dsi_phy_pll_init(dsi);
-
-	regmap_write(dphy->regmap, 0x20,
-		     POWER_CONTROL | INTERNAL_REG_CURRENT |
-		     BIAS_BLOCK_ON | BANDGAP_ON);
-	regmap_write(dphy->regmap, 0x21,
-		     TER_RESISTOR_LOW | TER_CAL_DONE | SETRD_MAX |
-		     TER_RESISTORS_ON);
-	regmap_write(dphy->regmap, 0x21,
-		     TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
-		     SETRD_MAX | POWER_MANAGE | TER_RESISTORS_ON);
-	regmap_write(dphy->regmap, 0x22,
-		     LOW_PROGRAM_EN | BIASEXTR_SEL(BIASEXTR_127_7));
-	regmap_write(dphy->regmap, 0x22,
-		     HIGH_PROGRAM_EN | BANDGAP_SEL(BANDGAP_96_10));
-	regmap_write(dphy->regmap, 0x70, TLP_PROGRAM_EN | 0xf);
-	regmap_write(dphy->regmap, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
-	regmap_write(dphy->regmap, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
-
-	return 0;
 }
 
 static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
@@ -857,11 +766,8 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
 	if (dsi->master)
 		return 0;
 
-	if (device->lanes < 0 || device->lanes > 8) {
-		dev_err(dsi->dev, "the number of data lanes(%u) is too many\n",
-			device->lanes);
+	if (device->lanes < 1 || device->lanes > 8)
 		return -EINVAL;
-	}
 
 	dsi->client = device->dev.of_node;
 	dsi->lanes = device->lanes;

From af796c2f6cc1f21c376d2f1783ff09ab8be8e6cc Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 6 Aug 2018 14:28:16 +0800
Subject: [PATCH 1015/1852] drm/rockchip: dsi: Remove hardcode link skew

Change-Id: I73e4bbd89e0c688ce708d009526221312bce27d5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 0465025056dde..525e2282585e6 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -1090,7 +1090,7 @@ static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 	int pkt_size;
 
 	if (dsi->slave || dsi->master)
-		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2 + 4);
+		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2);
 	else
 		pkt_size = VID_PKT_SIZE(mode->hdisplay);
 

From 9decdb11de623c654a85ac7906ecd6c07d87918a Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Tue, 7 Aug 2018 11:13:25 +0800
Subject: [PATCH 1016/1852] drm/rockchip: rgb: Fix connector type

Change-Id: I4d4f76b21f2e805f68961416fe8caffd22e529e4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_rgb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c
index 0ff696be43421..0d47fa21234a5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c
@@ -262,7 +262,7 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 		connector->dpms = DRM_MODE_DPMS_OFF;
 		ret = drm_connector_init(drm_dev, connector,
 					 &rockchip_rgb_connector_funcs,
-					 DRM_MODE_CONNECTOR_Unknown);
+					 DRM_MODE_CONNECTOR_LVDS);
 		if (ret < 0) {
 			DRM_DEV_ERROR(drm_dev->dev,
 				      "failed to initialize connector: %d\n",

From 2b40d6f15a93626fefbc2859dfe2c7ae34873efc Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 7 Aug 2018 15:43:37 +0800
Subject: [PATCH 1017/1852] drivers: rkflash: make printk macro configurable

Change-Id: If4b768f0ebe8186a79b08ec424fd0b70a79f9c83
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl.h              |    5 +
 drivers/rkflash/rk_sftl_arm_v7.S       | 4648 +++++++++++-----------
 drivers/rkflash/rk_sftl_arm_v7_thumb.S | 4938 ++++++++++++------------
 drivers/rkflash/rk_sftl_arm_v8.S       | 4100 ++++++++++----------
 drivers/rkflash/rkflash_blk.c          |    9 +
 drivers/rkflash/rkflash_debug.h        |    4 +-
 6 files changed, 6952 insertions(+), 6752 deletions(-)

diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index a5d8f9661eba1..0f0e0d5085f6d 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -30,4 +30,9 @@ void *ftl_memset(void *s, int c, unsigned int n);
 void *ftl_memcpy(void *pv_to,
 		 const void *pv_from,
 		 unsigned int size);
+
+/*
+ * Function that needs to be defined
+ */
+void  __printf(1, 2)  sftl_printk(char *fmt, ...);
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 9332ff8827c25..269c66693e1ca 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,10 +2,44 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-19
+ * date: 2018-08-07
  */
 	.file	"rk_sftl.c"
+	.syntax divided
+	.macro	it, cond
+	.endm
+	.macro	itt, cond
+	.endm
+	.macro	ite, cond
+	.endm
+	.macro	ittt, cond
+	.endm
+	.macro	itte, cond
+	.endm
+	.macro	itet, cond
+	.endm
+	.macro	itee, cond
+	.endm
+	.macro	itttt, cond
+	.endm
+	.macro	ittte, cond
+	.endm
+	.macro	ittet, cond
+	.endm
+	.macro	ittee, cond
+	.endm
+	.macro	itett, cond
+	.endm
+	.macro	itete, cond
+	.endm
+	.macro	iteet, cond
+	.endm
+	.macro	iteee, cond
+	.endm
+
 	.global	__udivsi3
+	.arm
+	.syntax unified
 	.text
 	.align	2
 	.syntax unified
@@ -374,7 +408,7 @@ FtlBbmMapBadBlock:
 	str	r1, [sp]
 	mov	r1, r5
 	ldr	r0, .L39+4
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r4, #158]
 	mov	r0, #0
 	add	r3, r3, #1
@@ -921,7 +955,7 @@ INSERT_DATA_LIST:
 	mov	r2, #221
 	ldr	r1, .L117+4
 	ldr	r0, .L117+8
-	bl	printk
+	bl	sftl_printk
 	ldmfd	sp, {fp, sp, pc}
 .L118:
 	.align	2
@@ -1027,7 +1061,7 @@ INSERT_FREE_LIST:
 	mov	r2, #214
 	ldr	r1, .L130+4
 	ldr	r0, .L130+8
-	bl	printk
+	bl	sftl_printk
 	ldmfd	sp, {fp, sp, pc}
 .L131:
 	.align	2
@@ -1064,7 +1098,7 @@ List_remove_node:
 	movw	r2, #379
 	ldr	r1, .L139+4
 	ldr	r0, .L139+8
-	bl	printk
+	bl	sftl_printk
 .L133:
 	ldr	r3, [r8]
 	ldrh	r2, [r7, r6]
@@ -1258,7 +1292,7 @@ List_update_data_list:
 	movw	r2, #470
 	ldr	r1, .L172+4
 	ldr	r0, .L172+8
-	bl	printk
+	bl	sftl_printk
 .L164:
 	ldr	r3, [r8, r5, lsl #3]
 	cmn	r3, #1
@@ -1286,7 +1320,7 @@ List_update_data_list:
 	movw	r2, #481
 	ldr	r1, .L172+4
 	ldr	r0, .L172+8
-	bl	printk
+	bl	sftl_printk
 .L166:
 	ldrh	r3, [r4]
 	mov	r0, r5
@@ -1351,7 +1385,7 @@ select_l2p_ram_region:
 	mov	r2, #784
 	ldr	r1, .L184+8
 	ldr	r0, .L184+12
-	bl	printk
+	bl	sftl_printk
 	b	.L176
 .L177:
 	add	r1, r1, #1
@@ -1628,7 +1662,7 @@ make_superblock:
 	movw	r2, #2097
 	ldr	r1, .L224+4
 	ldr	r0, .L224+8
-	bl	printk
+	bl	sftl_printk
 .L220:
 	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
@@ -2490,7 +2524,7 @@ GetSwlReplaceBlock:
 	mov	r2, r7
 	str	r3, [sp]
 	ldr	r3, [r4, #2564]
-	bl	printk
+	bl	sftl_printk
 	mov	r3, #1
 	str	r3, [r4, #3160]
 	b	.L276
@@ -2571,7 +2605,7 @@ get_new_active_ppa:
 	movw	r2, #2707
 	ldr	r1, .L310
 	ldr	r0, .L310+4
-	bl	printk
+	bl	sftl_printk
 .L297:
 	ldr	r5, .L310+8
 	ldrh	r2, [r4, #2]
@@ -2581,7 +2615,7 @@ get_new_active_ppa:
 	movw	r2, #2708
 	ldr	r1, .L310
 	ldr	r0, .L310+4
-	bl	printk
+	bl	sftl_printk
 .L298:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
@@ -2589,7 +2623,7 @@ get_new_active_ppa:
 	movw	r2, #2709
 	ldr	r1, .L310
 	ldr	r0, .L310+4
-	bl	printk
+	bl	sftl_printk
 .L299:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	mov	r3, #0
@@ -2635,7 +2669,7 @@ get_new_active_ppa:
 	movw	r2, #2730
 	ldr	r1, .L310
 	ldr	r0, .L310+4
-	bl	printk
+	bl	sftl_printk
 .L296:
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
@@ -2959,7 +2993,7 @@ FtlGcRefreshBlock:
 	uxth	r4, r0
 	ldr	r0, .L353
 	mov	r1, r4
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, .L353+4
 	movw	ip, #3202
 	ldrh	lr, [r3, ip]
@@ -3005,7 +3039,7 @@ FtlGcMarkBadPhyBlk:
 	mov	r7, r0
 	ldrh	r1, [r4, r6]
 	ldr	r0, .L359+4
-	bl	printk
+	bl	sftl_printk
 	mov	r0, r7
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4, r6]
@@ -3130,25 +3164,60 @@ rknand_print_hex:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{fp, ip, lr, pc}
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #16
-	mul	r3, r2, r3
-	mov	ip, #0
-	str	r2, [sp]
-	str	ip, [sp, #12]
-	mov	r2, #2
-	stmib	sp, {r1, r3}
-	mov	r1, r0
-	mov	r3, #16
-	ldr	r0, .L374
-	bl	print_hex_dump
-	sub	sp, fp, #12
-	ldmfd	sp, {fp, sp, pc}
+	mov	r6, #0
+	mov	r10, r0
+	mov	r7, r1
+	mov	r8, r2
+	mov	r9, r3
+	mov	r5, r6
+	mov	r4, r6
+.L374:
+	cmp	r4, r9
+	bcc	.L380
+	ldr	r0, .L382
+	bl	sftl_printk
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L380:
+	cmp	r5, #0
+	bne	.L375
+	mov	r3, r6
+	mov	r2, r7
+	mov	r1, r10
+	ldr	r0, .L382+4
+	bl	sftl_printk
 .L375:
+	cmp	r8, #4
+	ldreq	r1, [r7, r4, lsl #2]
+	ldreq	r0, .L382+8
+	beq	.L381
+	cmp	r8, #2
+	lsleq	r3, r4, #1
+	ldreq	r0, .L382+12
+	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
+	ldrheq	r1, [r7, r3]
+	ldrne	r0, .L382+16
+.L381:
+	add	r5, r5, #1
+	bl	sftl_printk
+	cmp	r5, #15
+	bls	.L379
+	mov	r5, #0
+	ldr	r0, .L382
+	bl	sftl_printk
+.L379:
+	add	r4, r4, #1
+	add	r6, r6, r8
+	b	.L374
+.L383:
 	.align	2
-.L374:
+.L382:
+	.word	.LC79
 	.word	.LC75
+	.word	.LC76
+	.word	.LC77
+	.word	.LC78
 	.size	rknand_print_hex, .-rknand_print_hex
 	.align	2
 	.global	FlashReadPages
@@ -3164,31 +3233,31 @@ FlashReadPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L394
+	ldr	r5, .L402
 	mov	r7, r1
-	ldr	r9, .L394+4
+	ldr	r9, .L402+4
 	mov	r4, r0
-	ldr	r10, .L394+8
+	ldr	r10, .L402+8
 	ldrh	r8, [r5, #12]
-.L377:
+.L385:
 	cmp	r6, r7
-	bne	.L384
+	bne	.L392
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L384:
+.L392:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L378
+	beq	.L386
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	bne	.L379
-.L378:
-	mov	r2, #76
+	bne	.L387
+.L386:
+	mov	r2, #101
 	mov	r1, r9
 	mov	r0, r10
-	bl	printk
-.L379:
+	bl	sftl_printk
+.L387:
 	sub	r2, fp, #48
 	sub	r1, fp, #44
 	mov	r0, r4
@@ -3202,7 +3271,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L381
+	bne	.L389
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
@@ -3213,27 +3282,27 @@ FlashReadPages:
 	add	r1, r8, r1
 	blx	ip
 	cmn	r0, #1
-	beq	.L382
+	beq	.L390
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	cmn	r2, #1
-	bne	.L381
+	bne	.L389
 	ldr	r2, [r3, #8]
 	cmn	r2, #1
-	bne	.L381
+	bne	.L389
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L381
-.L382:
+	beq	.L389
+.L390:
 	mvn	r3, #0
 	str	r3, [r4]
-.L381:
+.L389:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L377
-.L395:
+	b	.L385
+.L403:
 	.align	2
-.L394:
+.L402:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3250,31 +3319,31 @@ FtlLoadFactoryBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L406
+	ldr	r4, .L414
 	mov	r6, #0
 	mvn	r9, #0
-	ldr	r10, .L406+4
+	ldr	r10, .L414+4
 	ldr	r3, [r4, #3280]
 	add	r7, r4, #162
 	ldr	r8, [r4, #3284]
 	str	r3, [r4, #3268]
 	str	r8, [r4, #3272]
-.L397:
+.L405:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L402
+	bcc	.L410
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L402:
+.L410:
 	ldrh	r5, [r4, #98]
 	strh	r9, [r7, #2]!	@ movhi
-.L399:
+.L407:
 	ldrh	r3, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L400
+	ble	.L408
 	mla	r3, r6, r3, r5
 	mov	r2, #1
 	mov	r1, r2
@@ -3284,18 +3353,18 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L399
+	beq	.L407
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L399
+	bne	.L407
 	strh	r5, [r7]	@ movhi
-.L400:
+.L408:
 	add	r6, r6, #1
-	b	.L397
-.L407:
+	b	.L405
+.L415:
 	.align	2
-.L406:
+.L414:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -3313,7 +3382,7 @@ FtlGetLastWrittenPage:
 	sub	fp, ip, #4
 	sub	sp, sp, #84
 	cmp	r1, #1
-	ldr	r3, .L416
+	ldr	r3, .L424
 	lsl	r6, r0, #10
 	mov	r2, r1
 	mov	r7, r1
@@ -3321,7 +3390,7 @@ FtlGetLastWrittenPage:
 	ldrheq	r4, [r3, #104]
 	mov	r1, #1
 	ldrhne	r4, [r3, #102]
-	ldr	r3, .L416+4
+	ldr	r3, .L424+4
 	sub	r4, r4, #1
 	sxth	r5, r4
 	str	r3, [fp, #-108]
@@ -3333,12 +3402,12 @@ FtlGetLastWrittenPage:
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
 	moveq	r8, #0
-	beq	.L412
-.L411:
+	beq	.L420
+.L419:
 	mov	r0, r5
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L415:
+.L423:
 	add	r4, r8, r5
 	mov	r2, r7
 	add	r4, r4, r4, lsr #31
@@ -3351,22 +3420,22 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
-	bne	.L413
+	bne	.L421
 	ldr	r3, [fp, #-92]
 	cmn	r3, #1
 	subeq	r4, r4, #1
 	sxtheq	r5, r4
-	beq	.L412
-.L413:
+	beq	.L420
+.L421:
 	add	r4, r4, #1
 	sxth	r8, r4
-.L412:
+.L420:
 	cmp	r8, r5
-	ble	.L415
-	b	.L411
-.L417:
+	ble	.L423
+	b	.L419
+.L425:
 	.align	2
-.L416:
+.L424:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -3384,7 +3453,7 @@ FlashProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #32
 	mov	r9, r3
-	ldr	r6, .L448
+	ldr	r6, .L456
 	mov	r10, r1
 	mov	r8, r2
 	mov	r4, r0
@@ -3392,28 +3461,28 @@ FlashProgPages:
 	mov	r7, #0
 	ldrh	r3, [r6, #12]
 	str	r3, [fp, #-72]
-.L419:
+.L427:
 	cmp	r7, r10
-	bne	.L427
+	bne	.L435
 	cmp	r9, #0
-	bne	.L434
-.L447:
+	bne	.L442
+.L455:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L427:
+.L435:
 	ldr	r3, [r5, #8]
 	cmp	r3, #0
-	beq	.L420
+	beq	.L428
 	ldr	r3, [r5, #12]
 	cmp	r3, #0
-	bne	.L421
-.L420:
-	mov	r2, #106
-	ldr	r1, .L448+4
-	ldr	r0, .L448+8
-	bl	printk
-.L421:
+	bne	.L429
+.L428:
+	mov	r2, #131
+	ldr	r1, .L456+4
+	ldr	r0, .L456+8
+	bl	sftl_printk
+.L429:
 	sub	r2, fp, #68
 	sub	r1, fp, #64
 	mov	r0, r5
@@ -3430,7 +3499,7 @@ FlashProgPages:
 	strne	r3, [r5]
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L425
+	bne	.L433
 	ldr	r0, [fp, #-72]
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -3444,11 +3513,11 @@ FlashProgPages:
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r5]
-.L425:
+.L433:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L419
-.L432:
+	b	.L427
+.L440:
 	mov	r3, #0
 	mov	r2, r8
 	str	r3, [r9]
@@ -3462,60 +3531,60 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	bne	.L429
+	bne	.L437
 	ldr	r1, [r4, #4]
-	ldr	r0, .L448+12
+	ldr	r0, .L456+12
 	str	r3, [fp, #-72]
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [fp, #-72]
 	str	r3, [r4]
-.L429:
+.L437:
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L430
+	beq	.L438
 	ldr	r2, [r3]
 	ldr	r3, [r6, #3288]
 	cmp	r2, r3
-	beq	.L430
+	beq	.L438
 	ldr	r1, [r4, #4]
-	ldr	r0, .L448+16
-	bl	printk
+	ldr	r0, .L456+16
+	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L430:
+.L438:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L431
+	beq	.L439
 	ldr	r2, [r3]
 	ldr	r3, [r9]
 	cmp	r2, r3
-	beq	.L431
+	beq	.L439
 	ldr	r1, [r4, #4]
-	ldr	r0, .L448+20
-	bl	printk
+	ldr	r0, .L456+20
+	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L431:
+.L439:
 	add	r5, r5, #1
 	add	r4, r4, #20
-.L428:
+.L436:
 	cmp	r7, r5
-	bne	.L432
-	b	.L447
-.L434:
+	bne	.L440
+	b	.L455
+.L442:
 	mov	r5, #0
-	ldr	r9, .L448+24
-	ldr	r10, .L448+28
-	b	.L428
-.L449:
+	ldr	r9, .L456+24
+	ldr	r10, .L456+28
+	b	.L436
+.L457:
 	.align	2
-.L448:
+.L456:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
-	.word	.LC76
-	.word	.LC77
-	.word	.LC78
+	.word	.LC80
+	.word	.LC81
+	.word	.LC82
 	.word	check_buf
 	.word	.LANCHOR0+3288
 	.size	FlashProgPages, .-FlashProgPages
@@ -3533,17 +3602,17 @@ FlashEraseBlocks:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L461
+	ldr	r5, .L469
 	mov	r7, r2
 	mov	r4, r0
 	ldrh	r8, [r5, #12]
-.L451:
+.L459:
 	cmp	r6, r7
-	bne	.L457
+	bne	.L465
 	mov	r0, #0
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L457:
+.L465:
 	sub	r2, fp, #40
 	sub	r1, fp, #36
 	mov	r0, r4
@@ -3558,7 +3627,7 @@ FlashEraseBlocks:
 	strne	r3, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L455
+	bne	.L463
 	ldr	r1, [fp, #-36]
 	ldr	r3, [r5, #3248]
 	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
@@ -3567,13 +3636,13 @@ FlashEraseBlocks:
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r4]
-.L455:
+.L463:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L451
-.L462:
+	b	.L459
+.L470:
 	.align	2
-.L461:
+.L469:
 	.word	.LANCHOR0
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
@@ -3595,12 +3664,12 @@ FtlFreeSysBlkQueueIn:
 	uxth	r3, r3
 	cmp	r3, r2
 	ldmfdhi	sp, {r4, r5, r6, fp, sp, pc}
-	ldr	r4, .L472
+	ldr	r4, .L480
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
 	cmp	r1, #0
-	beq	.L465
+	beq	.L473
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r6, r0
@@ -3618,7 +3687,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	add	r3, r3, #1
 	str	r3, [r4, #2560]
-.L465:
+.L473:
 	ldrh	r3, [r4, #218]
 	add	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3629,9 +3698,9 @@ FtlFreeSysBlkQueueIn:
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L473:
+.L481:
 	.align	2
-.L472:
+.L480:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
@@ -3652,34 +3721,34 @@ FtlLowFormatEraseBlock:
 	uxtb	r6, r1
 	str	r3, [fp, #-48]
 	mov	r5, r10
-	ldr	r3, .L516
+	ldr	r3, .L524
 	mov	r4, r10
 	ldr	r2, [fp, #-48]
 	mov	r9, #20
 	mov	r8, r3
 	str	r2, [r3, #3804]
-.L475:
+.L483:
 	ldrh	r1, [r8, #32]
 	uxth	r2, r10
 	cmp	r1, r2
-	bhi	.L479
+	bhi	.L487
 	cmp	r5, #0
-	beq	.L474
+	beq	.L482
 	mov	r7, #0
 	mov	r9, #20
 	mov	r2, r5
 	mov	r1, #0
 	ldr	r0, [r8, #3800]
 	bl	FlashEraseBlocks
-.L482:
+.L490:
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L484
-.L485:
+	bhi	.L492
+.L493:
 	cmp	r6, #0
 	ldrhne	r3, [r8, #104]
 	moveq	r3, #6
-	ldr	r8, .L516
+	ldr	r8, .L524
 	streq	r3, [fp, #-60]
 	moveq	r3, #1
 	strne	r3, [fp, #-52]
@@ -3692,16 +3761,16 @@ FtlLowFormatEraseBlock:
 	mov	r3, #0
 	streq	r6, [fp, #-56]
 	str	r3, [fp, #-44]
-.L494:
+.L502:
 	mov	r7, #0
 	mov	r5, r7
-.L486:
+.L494:
 	ldrh	r1, [r8, #32]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L489
+	bhi	.L497
 	cmp	r5, #0
-	beq	.L474
+	beq	.L482
 	ldr	r2, [fp, #-56]
 	mov	r3, #1
 	mov	r1, r5
@@ -3709,10 +3778,10 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	r9, #0
 	mov	r2, #20
-.L491:
+.L499:
 	uxth	r3, r9
 	cmp	r5, r3
-	bhi	.L493
+	bhi	.L501
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-60]
 	add	r7, r3, r2
@@ -3721,13 +3790,13 @@ FtlLowFormatEraseBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r3, [fp, #-52]
 	cmp	r3, r2
-	bhi	.L494
+	bhi	.L502
 	mov	r7, #0
 	mov	r9, #20
-.L495:
+.L503:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L497
+	bhi	.L505
 	ldr	r3, [fp, #-48]
 	adds	r6, r6, #0
 	movne	r6, #1
@@ -3735,16 +3804,16 @@ FtlLowFormatEraseBlock:
 	movhi	r8, r6
 	orrls	r8, r6, #1
 	cmp	r8, #0
-	beq	.L474
+	beq	.L482
 	mov	r2, r5
 	ldr	r1, [fp, #-56]
 	ldr	r0, [r10, #3800]
 	bl	FlashEraseBlocks
-.L474:
+.L482:
 	mov	r0, r4
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L479:
+.L487:
 	uxth	r2, r10
 	ldr	r0, [r8, #3800]
 	mov	r3, #0
@@ -3756,17 +3825,17 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r7, r0
-	beq	.L476
+	beq	.L484
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L477
-.L476:
+	bne	.L485
+.L484:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
 	addne	r4, r4, #1
 	uxthne	r4, r4
-	bne	.L477
+	bne	.L485
 	ldr	r1, [r8, #3800]
 	lsl	r7, r7, #10
 	ldr	r2, [r8, #3808]
@@ -3784,25 +3853,25 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #12]
-.L477:
+.L485:
 	add	r10, r10, #1
-	b	.L475
-.L484:
+	b	.L483
+.L492:
 	mul	r2, r9, r7
 	ldr	r1, [r8, #3800]
 	add	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cmn	r2, #1
-	bne	.L483
+	bne	.L491
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L483:
+.L491:
 	add	r7, r7, #1
-	b	.L482
-.L489:
+	b	.L490
+.L497:
 	uxth	r3, r7
 	mov	r2, #20
 	ldr	r0, [r8, #3800]
@@ -3815,15 +3884,15 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r9, r0
-	beq	.L487
+	beq	.L495
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L488
-.L487:
+	bne	.L496
+.L495:
 	mov	r0, r9
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
-	bne	.L488
+	bne	.L496
 	ldr	r1, [r8, #3800]
 	mov	r3, #20
 	mla	r1, r3, r5, r1
@@ -3843,16 +3912,16 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r0, r3
 	str	r3, [r1, #12]
-.L488:
+.L496:
 	add	r7, r7, #1
-	b	.L486
-.L493:
+	b	.L494
+.L501:
 	mul	r3, r2, r9
 	ldr	r1, [r10, #3800]
 	add	r0, r1, r3
 	ldr	r3, [r1, r3]
 	cmp	r3, #0
-	beq	.L492
+	beq	.L500
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	str	r2, [fp, #-64]
@@ -3860,28 +3929,28 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r2, [fp, #-64]
-.L492:
+.L500:
 	add	r9, r9, #1
-	b	.L491
-.L497:
+	b	.L499
+.L505:
 	cmp	r6, #0
-	beq	.L496
+	beq	.L504
 	mul	r3, r9, r7
 	ldr	r2, [r10, #3800]
 	add	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L496
+	bne	.L504
 	ldr	r0, [r1, #4]
 	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L496:
+.L504:
 	add	r7, r7, #1
-	b	.L495
-.L517:
+	b	.L503
+.L525:
 	.align	2
-.L516:
+.L524:
 	.word	.LANCHOR0
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
@@ -3896,12 +3965,12 @@ FtlFreeSysBlkQueueOut:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L525
-	ldr	r6, .L525+4
-.L519:
+	ldr	r4, .L533
+	ldr	r6, .L533+4
+.L527:
 	ldrh	r1, [r4, #218]
 	cmp	r1, #0
-	beq	.L520
+	beq	.L528
 	ldrh	r3, [r4, #214]
 	sub	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -3931,26 +4000,26 @@ FtlFreeSysBlkQueueOut:
 	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L524
+	bhi	.L529
+	mov	r0, r5
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L528:
+	ldr	r0, .L533+8
+	bl	sftl_printk
+.L531:
+	b	.L531
+.L529:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
-	bl	printk
-	b	.L519
-.L520:
-	ldr	r0, .L525+8
-	bl	printk
-.L523:
-	b	.L523
-.L524:
-	mov	r0, r5
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L526:
+	bl	sftl_printk
+	b	.L527
+.L534:
 	.align	2
-.L525:
+.L533:
 	.word	.LANCHOR0
-	.word	.LC80
-	.word	.LC79
+	.word	.LC84
+	.word	.LC83
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
@@ -3968,16 +4037,16 @@ ftl_map_blk_alloc_new_blk:
 	mov	r4, r0
 	mov	r3, #0
 	ldr	r2, [r0, #12]
-.L528:
+.L536:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L531
+	bcs	.L539
 	mov	r7, r2
 	add	r3, r3, #1
 	ldrh	r6, [r7]
 	add	r2, r2, #2
 	cmp	r6, #0
-	bne	.L528
+	bne	.L536
 	bl	FtlFreeSysBlkQueueOut
 	sub	r3, r0, #1
 	movw	r2, #65533
@@ -3985,14 +4054,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L529
-	ldr	r3, .L535
-	ldr	r0, .L535+4
+	bls	.L537
+	ldr	r3, .L543
+	ldr	r0, .L543+4
 	ldrh	r2, [r3, #218]
-	bl	printk
-.L530:
-	b	.L530
-.L529:
+	bl	sftl_printk
+.L538:
+	b	.L538
+.L537:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4001,22 +4070,22 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L531:
+.L539:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L533
+	bhi	.L541
 	movw	r2, #581
-	ldr	r1, .L535+8
-	ldr	r0, .L535+12
-	bl	printk
-.L533:
+	ldr	r1, .L543+8
+	ldr	r0, .L543+12
+	bl	sftl_printk
+.L541:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L536:
+.L544:
 	.align	2
-.L535:
+.L543:
 	.word	.LANCHOR0
-	.word	.LC81
+	.word	.LC85
 	.word	.LANCHOR1+160
 	.word	.LC1
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
@@ -4036,8 +4105,8 @@ FlashTestBlk:
 	uxth	r4, r0
 	cmp	r4, #11
 	movls	r4, #0
-	bls	.L537
-	ldr	r5, .L540
+	bls	.L545
+	ldr	r5, .L548
 	sub	r0, fp, #84
 	mov	r2, #32
 	mov	r1, #165
@@ -4045,7 +4114,7 @@ FlashTestBlk:
 	lsl	r4, r4, #10
 	str	r5, [fp, #-96]
 	bl	memset
-	ldr	r3, .L540+4
+	ldr	r3, .L548+4
 	mov	r2, #1
 	mov	r1, r2
 	sub	r0, fp, #104
@@ -4066,13 +4135,13 @@ FlashTestBlk:
 	movne	r4, #1
 	rsb	r4, r4, #0
 	bl	FlashEraseBlocks
-.L537:
+.L545:
 	mov	r0, r4
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L541:
+.L549:
 	.align	2
-.L540:
+.L548:
 	.word	ftl_temp_buf
 	.word	1515870810
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4088,7 +4157,7 @@ FlashGetBadBlockList:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L549
+	ldr	r5, .L557
 	mov	r4, r0
 	mov	r6, r1
 	mov	r2, #256
@@ -4100,30 +4169,30 @@ FlashGetBadBlockList:
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L543
+	bls	.L551
 	mov	r2, #256
 	mov	r1, #255
 	mov	r0, r4
 	bl	memset
 	mov	r0, #0
-.L543:
+.L551:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	moveq	r3, r4
 	addeq	r1, r3, r0, lsl #1
-	beq	.L545
+	beq	.L553
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L546:
+.L554:
 	ldrh	r2, [r3]
 	lsr	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-.L545:
+.L553:
 	cmp	r3, r1
-	bne	.L546
+	bne	.L554
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L550:
+.L558:
 	.align	2
-.L549:
+.L557:
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
@@ -4140,9 +4209,9 @@ ftl_memset:
 	sub	fp, ip, #4
 	cmp	r2, #0
 	mov	r4, r0
-	beq	.L552
+	beq	.L560
 	bl	memset
-.L552:
+.L560:
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
 	.size	ftl_memset, .-ftl_memset
@@ -4158,7 +4227,7 @@ FtlMemInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L657
+	ldr	r4, .L665
 	movw	r3, #65535
 	movw	r2, #3202
 	mov	r5, #0
@@ -4275,7 +4344,7 @@ FtlMemInit:
 	bl	ftl_malloc
 	str	r0, [r4, #3856]
 	ldrh	r0, [r4, r7]
-	ldr	r3, .L657+4
+	ldr	r3, .L665+4
 	add	r0, r0, #544
 	add	r0, r0, #3
 	lsr	r0, r0, #9
@@ -4363,141 +4432,141 @@ FtlMemInit:
 	str	r0, [r4, #180]
 	lsl	r2, r2, #2
 	mov	r1, r2
-.L557:
+.L565:
 	cmp	r3, lr
-	bcc	.L558
-	ldr	r2, .L657+8
+	bcc	.L566
+	ldr	r2, .L665+8
 	mov	r1, #0
 	add	r3, r2, r3, lsl #2
 	add	r2, r2, #56
 	add	r3, r3, #24
-.L559:
+.L567:
 	cmp	r2, r3
-	bne	.L560
+	bne	.L568
 	ldr	r3, [r4, #3868]
 	cmp	r3, #0
-	bne	.L561
-.L563:
-	ldr	r1, .L657+12
-	ldr	r0, .L657+16
-	bl	printk
+	bne	.L569
+.L571:
+	ldr	r1, .L665+12
+	ldr	r0, .L665+16
+	bl	sftl_printk
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L558:
+.L566:
 	ldr	r0, [r4, #180]
 	add	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [ip, #4]!
-	b	.L557
-.L560:
+	b	.L565
+.L568:
 	str	r1, [r3, #4]!
-	b	.L559
-.L561:
+	b	.L567
+.L569:
 	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3888]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3280]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L563
-	ldr	r3, .L657
+	beq	.L571
+	ldr	r3, .L665
 	ldr	r2, [r3, #3876]
 	cmp	r2, #0
-	beq	.L563
+	beq	.L571
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L563
+	beq	.L571
 	ldr	r3, [r3, #3884]
 	cmp	r3, #0
-	beq	.L563
+	beq	.L571
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L658:
+.L666:
 	.align	2
-.L657:
+.L665:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
-	.word	.LC82
+	.word	.LC86
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -4511,33 +4580,33 @@ FtlBbt2Bitmap:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r6, .L665
+	ldr	r6, .L673
 	movw	r3, #3900
 	mov	r4, r0
-	ldr	r8, .L665+4
+	ldr	r8, .L673+4
 	sub	r5, r4, #2
 	ldrh	r2, [r6, r3]
 	add	r4, r4, #1020
-	ldr	r9, .L665+8
+	ldr	r9, .L673+8
 	mov	r7, r1
 	add	r4, r4, #2
 	mov	r1, #0
 	mov	r0, r7
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.L662:
+.L670:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
 	ldmfdeq	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L661
+	bhi	.L669
 	mov	r2, #74
 	mov	r1, r8
 	mov	r0, r9
-	bl	printk
-.L661:
+	bl	sftl_printk
+.L669:
 	ldrh	r3, [r5, #2]!
 	mov	r0, #1
 	cmp	r4, r5
@@ -4546,11 +4615,11 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r3, r2, r0, lsl r3
 	str	r3, [r7, r1, lsl #2]
-	bne	.L662
+	bne	.L670
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L666:
+.L674:
 	.align	2
-.L665:
+.L673:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
@@ -4567,22 +4636,22 @@ load_l2p_region:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L673
+	ldr	r4, .L681
 	uxth	r6, r0
 	uxth	r8, r1
 	ldrh	r3, [r4, #136]
 	cmp	r3, r6
-	bcs	.L668
+	bcs	.L676
 	mov	r2, #492
-	ldr	r1, .L673+4
-	ldr	r0, .L673+8
-	bl	printk
-.L668:
+	ldr	r1, .L681+4
+	ldr	r0, .L681+8
+	bl	sftl_printk
+.L676:
 	ldr	r3, [r4, #3888]
 	mov	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
 	cmp	r7, #0
-	bne	.L669
+	bne	.L677
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	ldrh	r2, [r4, #110]
@@ -4595,14 +4664,14 @@ load_l2p_region:
 	ldr	r3, [r4, #2492]
 	add	r5, r3, r5
 	str	r7, [r5, #4]
-.L670:
+.L678:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L669:
+.L677:
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	mov	r2, #1
-	ldr	r0, .L673+12
+	ldr	r0, .L681+12
 	mov	r1, r2
 	str	r7, [r4, #3264]
 	add	r3, r3, r5
@@ -4614,46 +4683,46 @@ load_l2p_region:
 	ldr	r8, [r4, #3272]
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L671
+	beq	.L679
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L673+16
-	bl	printk
+	ldr	r0, .L681+16
+	bl	sftl_printk
 	mov	r3, #4
 	ldr	r1, [r4, #3272]
 	mov	r2, r3
-	ldr	r0, .L673+20
+	ldr	r0, .L681+20
 	bl	rknand_print_hex
 	ldrh	r3, [r4, #136]
 	mov	r2, #4
 	ldr	r1, [r4, #3888]
-	ldr	r0, .L673+24
+	ldr	r0, .L681+24
 	bl	rknand_print_hex
-.L671:
+.L679:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L672
+	beq	.L680
 	movw	r2, #513
-	ldr	r1, .L673+4
-	ldr	r0, .L673+8
-	bl	printk
-.L672:
+	ldr	r1, .L681+4
+	ldr	r0, .L681+8
+	bl	sftl_printk
+.L680:
 	ldr	r3, [r4, #2492]
 	mov	r1, #0
 	add	r2, r3, r5
 	str	r1, [r2, #4]
 	strh	r6, [r3, r5]	@ movhi
-	b	.L670
-.L674:
+	b	.L678
+.L682:
 	.align	2
-.L673:
+.L681:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0+3260
-	.word	.LC83
-	.word	.LC84
-	.word	.LC85
+	.word	.LC87
+	.word	.LC88
+	.word	.LC89
 	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_free_no_use_map_blk
@@ -4678,35 +4747,35 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	mov	r2, #0
-.L676:
+.L684:
 	ldrh	r1, [r4, #6]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L680
+	bhi	.L688
 	ldrh	r2, [r5]
 	mov	r7, #0
-	ldr	ip, .L689
+	ldr	ip, .L697
 	mov	r10, r7
-.L681:
+.L689:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L685
+	bhi	.L693
 	mov	r0, r10
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L680:
+.L688:
 	uxth	r3, r2
 	mov	r1, #0
 	ldr	r0, [r6, r3, lsl #2]
 	ubfx	r0, r0, #10, #16
-.L677:
+.L685:
 	ldrh	ip, [r4, #10]
 	uxth	r3, r1
 	cmp	ip, r3
 	addls	r2, r2, #1
-	bls	.L676
-.L679:
+	bls	.L684
+.L687:
 	uxth	r3, r1
 	add	r1, r1, #1
 	lsl	r3, r3, #1
@@ -4715,28 +4784,28 @@ ftl_free_no_use_map_blk:
 	ldrheq	ip, [r5, r3]
 	addeq	ip, ip, #1
 	strheq	ip, [r5, r3]	@ movhi
-	b	.L677
-.L685:
+	b	.L685
+.L693:
 	ldrh	r1, [r4]
 	uxth	r6, r7
 	cmp	r1, r3
-	bne	.L682
+	bne	.L690
 	ldrh	r0, [r4, #2]
 	ldrh	r1, [ip, #104]
 	cmp	r0, r1
 	lslcc	r0, r6, #1
 	strhcc	r1, [r5, r0]	@ movhi
-.L682:
+.L690:
 	lsl	r6, r6, #1
 	ldrh	r8, [r5, r6]
 	cmp	r2, r8
 	movhi	r10, r3
 	movhi	r2, r8
 	cmp	r8, #0
-	bne	.L684
+	bne	.L692
 	ldrh	r0, [r9, r6]
 	cmp	r0, #0
-	beq	.L684
+	beq	.L692
 	mov	r1, #1
 	str	ip, [fp, #-48]
 	str	r2, [fp, #-44]
@@ -4747,12 +4816,12 @@ ftl_free_no_use_map_blk:
 	ldr	r2, [fp, #-44]
 	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L684:
+.L692:
 	add	r7, r7, #1
-	b	.L681
-.L690:
+	b	.L689
+.L698:
 	.align	2
-.L689:
+.L697:
 	.word	.LANCHOR0
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
@@ -4772,15 +4841,15 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L692
+	bne	.L700
 	ldrh	r3, [r0, #8]
 	cmp	r3, #0
-	beq	.L693
+	beq	.L701
 	movw	r2, #641
-	ldr	r1, .L701
-	ldr	r0, .L701+4
-	bl	printk
-.L693:
+	ldr	r1, .L709
+	ldr	r0, .L709+4
+	bl	sftl_printk
+.L701:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4792,17 +4861,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	add	r3, r3, #1
 	str	r3, [r4, #28]
-.L694:
+.L702:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L692:
+.L700:
 	lsl	r3, r3, #1
 	ldr	r2, [r0, #28]
 	ldr	r6, [r0, #24]
 	mov	r1, #255
 	ldrh	r7, [r5, r3]
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L701+8
+	ldr	r5, .L709+8
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #3264]
 	ldr	r3, [r5, #3280]
@@ -4810,7 +4879,7 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r5, #3284]
 	str	r3, [r5, #3272]
 	str	r2, [r3, #4]
-	ldr	r2, .L701+12
+	ldr	r2, .L709+12
 	strh	r2, [r3, #8]	@ movhi
 	ldrh	r2, [r0, #4]
 	strh	r7, [r3, #2]	@ movhi
@@ -4821,27 +4890,27 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	mov	r2, #0
 	mov	r3, r2
-.L695:
+.L703:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L697
+	bhi	.L705
 	mov	r2, #1
 	mov	r3, #0
 	mov	r1, r2
-	ldr	r0, .L701+16
+	ldr	r0, .L709+16
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L694
-.L697:
+	b	.L702
+.L705:
 	uxth	r1, r2
 	ldr	r0, [r6, r1, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L696
+	bne	.L704
 	ldr	r0, [r5, #3280]
 	add	r3, r3, #1
 	uxth	r3, r3
@@ -4850,12 +4919,12 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r5, #3280]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L696:
+.L704:
 	add	r2, r2, #1
-	b	.L695
-.L702:
+	b	.L703
+.L710:
 	.align	2
-.L701:
+.L709:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
@@ -4874,13 +4943,13 @@ FtlMapWritePage:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r7, .L722
+	ldr	r7, .L730
 	mov	r4, r0
 	mov	r8, r1
 	mov	r9, r2
 	mov	r6, #0
 	mov	r5, r7
-.L704:
+.L712:
 	ldr	r3, [r7, #2524]
 	add	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -4888,35 +4957,35 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L705
+	bge	.L713
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L706
-.L705:
+	bne	.L714
+.L713:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L706:
+.L714:
 	ldrh	r3, [r4]
 	ldr	r2, [r4, #12]
 	lsl	r3, r3, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L707
+	bne	.L715
 	movw	r2, #699
-	ldr	r1, .L722+4
-	ldr	r0, .L722+8
-	bl	printk
-.L707:
+	ldr	r1, .L730+4
+	ldr	r0, .L730+8
+	bl	sftl_printk
+.L715:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L708
+	bcc	.L716
 	mov	r2, #700
-	ldr	r1, .L722+4
-	ldr	r0, .L722+8
-	bl	printk
-.L708:
+	ldr	r1, .L730+4
+	ldr	r0, .L730+8
+	bl	sftl_printk
+.L716:
 	ldrh	r3, [r4]
 	mov	r1, #16
 	ldr	r2, [r4, #12]
@@ -4931,7 +5000,7 @@ FtlMapWritePage:
 	bl	__memzero
 	ldr	r3, [r5, #3272]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L722+12
+	ldr	r0, .L730+12
 	strh	r8, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -4947,48 +5016,48 @@ FtlMapWritePage:
 	strh	r3, [r4, #2]	@ movhi
 	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	bne	.L709
+	bne	.L717
 	ldr	r1, [r5, #3264]
 	add	r6, r6, #1
-	ldr	r0, .L722+16
+	ldr	r0, .L730+16
 	uxth	r6, r6
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	ldrhls	r3, [r5, #104]
 	subls	r3, r3, #1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L711
+	bls	.L719
 	mov	r2, r6
 	ldr	r1, [r5, #3264]
-	ldr	r0, .L722+20
-	bl	printk
-.L712:
-	b	.L712
-.L711:
+	ldr	r0, .L730+20
+	bl	sftl_printk
+.L720:
+	b	.L720
+.L719:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L704
-.L721:
-	b	.L721
-.L709:
+	beq	.L712
+.L729:
+	b	.L729
+.L717:
 	cmp	r3, #1
-	beq	.L704
+	beq	.L712
 	ldr	r2, [r5, #3264]
 	mov	r0, #0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L723:
+.L731:
 	.align	2
-.L722:
+.L730:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+258
 	.word	.LC1
 	.word	.LANCHOR0+3260
-	.word	.LC86
-	.word	.LC87
+	.word	.LC90
+	.word	.LC91
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
 	.global	ftl_map_blk_gc
@@ -5009,18 +5078,18 @@ ftl_map_blk_gc:
 	bl	ftl_free_no_use_map_blk
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L736
+	ldr	r5, .L744
 	sub	r3, r3, #4
 	cmp	r2, r3
-	blt	.L725
+	blt	.L733
 	uxth	r0, r0
 	lsl	r0, r0, #1
 	ldrh	r8, [r6, r0]
 	cmp	r8, #0
-	beq	.L725
+	beq	.L733
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L725
+	bne	.L733
 	mov	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r6, r0]	@ movhi
@@ -5030,41 +5099,41 @@ ftl_map_blk_gc:
 	strh	r3, [r4, #8]	@ movhi
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L726
+	bcc	.L734
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L726:
-	ldr	r10, .L736+4
+.L734:
+	ldr	r10, .L744+4
 	mov	r6, #0
-.L727:
+.L735:
 	ldrh	r2, [r4, #6]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L731
+	bhi	.L739
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	mov	r3, #0
 	str	r3, [r4, #32]
-.L725:
+.L733:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L732
+	bcc	.L740
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L732:
+.L740:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L731:
+.L739:
 	uxth	r7, r6
 	ldr	r2, [r9, r7, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L728
+	bne	.L736
 	ldr	ip, [r5, #3284]
 	ldr	r2, [r5, #3844]
-	ldr	r0, .L736+8
+	ldr	r0, .L744+8
 	str	ip, [r5, #3272]
 	str	r2, [r5, #3268]
 	ldr	r2, [r9, r7, lsl #2]
@@ -5078,27 +5147,27 @@ ftl_map_blk_gc:
 	ldr	r3, [fp, #-48]
 	ldrh	r2, [ip, #8]
 	cmp	r2, r3
-	beq	.L729
+	beq	.L737
 	movw	r2, #613
 	mov	r1, r10
-	ldr	r0, .L736+12
-	bl	printk
-.L729:
+	ldr	r0, .L744+12
+	bl	sftl_printk
+.L737:
 	ldr	r3, [r5, #3260]
 	cmn	r3, #1
 	moveq	r3, #0
 	streq	r3, [r9, r7, lsl #2]
-	beq	.L728
+	beq	.L736
 	ldr	r2, [r5, #3268]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L728:
+.L736:
 	add	r6, r6, #1
-	b	.L727
-.L737:
+	b	.L735
+.L745:
 	.align	2
-.L736:
+.L744:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+274
 	.word	.LANCHOR0+3260
@@ -5116,7 +5185,7 @@ flush_l2p_region:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L739
+	ldr	r5, .L747
 	uxth	r0, r0
 	mov	r4, #12
 	mul	r4, r4, r0
@@ -5133,9 +5202,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L740:
+.L748:
 	.align	2
-.L739:
+.L747:
 	.word	.LANCHOR0
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	2
@@ -5152,7 +5221,7 @@ log2phys:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mvn	r6, #0
-	ldr	r4, .L755
+	ldr	r4, .L763
 	mov	r7, r1
 	mov	r10, r2
 	ldrh	r3, [r4, #108]
@@ -5163,20 +5232,20 @@ log2phys:
 	uxth	r8, r9
 	uxth	r6, r6
 	cmp	r0, r3
-	bcc	.L742
+	bcc	.L750
 	mov	r2, #808
-	ldr	r1, .L755+4
-	ldr	r0, .L755+8
-	bl	printk
-.L742:
+	ldr	r1, .L763+4
+	ldr	r0, .L763+8
+	bl	sftl_printk
+.L750:
 	ldrh	r1, [r4, #138]
 	mov	r2, #0
 	ldr	r0, [r4, #2492]
 	mov	r3, #12
-.L743:
+.L751:
 	uxth	r5, r2
 	cmp	r5, r1
-	bcc	.L748
+	bcc	.L756
 	str	r3, [fp, #-44]
 	bl	select_l2p_ram_region
 	ldr	r3, [fp, #-44]
@@ -5187,32 +5256,32 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L749
+	beq	.L757
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L749
+	bge	.L757
 	bl	flush_l2p_region
-.L749:
+.L757:
 	mov	r1, r5
 	uxth	r0, r9
 	bl	load_l2p_region
-	b	.L744
-.L748:
+	b	.L752
+.L756:
 	add	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r8
-	bne	.L743
-.L744:
+	bne	.L751
+.L752:
 	cmp	r10, #0
 	mov	r3, #12
-	bne	.L745
+	bne	.L753
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r5, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r6, lsl #2]
 	str	r3, [r7]
-.L746:
+.L754:
 	ldr	r2, [r4, #2492]
 	mov	r3, #12
 	mov	r0, #0
@@ -5222,7 +5291,7 @@ log2phys:
 	addne	r3, r3, #1
 	strne	r3, [r5, #4]
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L745:
+.L753:
 	mul	r3, r3, r5
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5234,12 +5303,12 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L755+12
+	ldr	r3, .L763+12
 	strh	r8, [r3]	@ movhi
-	b	.L746
-.L756:
+	b	.L754
+.L764:
 	.align	2
-.L755:
+.L763:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5259,7 +5328,7 @@ FtlReUsePrevPpa:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r6, r0
-	ldr	r7, .L767
+	ldr	r7, .L775
 	ubfx	r0, r1, #10, #16
 	str	r1, [fp, #-32]
 	bl	P2V_block_in_plane
@@ -5267,34 +5336,34 @@ FtlReUsePrevPpa:
 	lsl	r5, r0, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #0
-	bne	.L758
+	bne	.L766
 	ldr	r4, [r7, #2340]
 	cmp	r4, #0
-	beq	.L759
+	beq	.L767
 	movw	r2, #2344
 	movw	lr, #65535
 	ldrh	ip, [r7, r2]
 	ldr	r2, [r7, #2316]
 	sub	r4, r4, r2
 	ubfx	r4, r4, #3, #16
-.L760:
+.L768:
 	uxth	r1, r3
 	cmp	ip, r1
-	bls	.L759
+	bls	.L767
 	cmp	r4, r0
-	bne	.L761
+	bne	.L769
 	mov	r1, r4
-	ldr	r0, .L767+4
+	ldr	r0, .L775+4
 	bl	List_remove_node
 	movw	r3, #2344
 	ldrh	r3, [r7, r3]
 	cmp	r3, #0
-	bne	.L762
+	bne	.L770
 	movw	r2, #1688
-	ldr	r1, .L767+8
-	ldr	r0, .L767+12
-	bl	printk
-.L762:
+	ldr	r1, .L775+8
+	ldr	r0, .L775+12
+	bl	sftl_printk
+.L770:
 	movw	r2, #2344
 	mov	r0, r4
 	ldrh	r3, [r7, r2]
@@ -5303,25 +5372,25 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r7, #2324]
 	ldrh	r3, [r2, r5]
-.L758:
+.L766:
 	add	r3, r3, #1
 	strh	r3, [r2, r5]	@ movhi
-	b	.L759
-.L761:
+	b	.L767
+.L769:
 	lsl	r4, r4, #3
 	add	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L760
-.L759:
+	bne	.L768
+.L767:
 	mov	r2, #1
 	sub	r1, fp, #32
 	mov	r0, r6
 	bl	log2phys
 	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L768:
+.L776:
 	.align	2
-.L767:
+.L775:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2340
 	.word	.LANCHOR1+298
@@ -5341,39 +5410,39 @@ ftl_scan_all_data:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r6, .L777
+	ldr	r6, .L785
 	mov	r1, #0
-	ldr	r0, .L777+4
-	bl	printk
+	ldr	r0, .L785+4
+	bl	sftl_printk
 	mov	r4, r6
-.L770:
+.L778:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L776
+	bcc	.L784
 	sub	sp, fp, #28
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L776:
+.L784:
 	mov	r2, #0
 	sub	r1, fp, #32
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
 	cmp	r3, #0
-	bne	.L771
+	bne	.L779
 	ldr	r2, [fp, #-32]
 	mov	r1, r5
-	ldr	r0, .L777+8
-	bl	printk
-.L771:
+	ldr	r0, .L785+8
+	bl	sftl_printk
+.L779:
 	ldr	r3, [fp, #-32]
 	cmn	r3, #1
-	beq	.L773
+	beq	.L781
 	str	r3, [r4, #3264]
 	mov	r2, #0
 	ldr	r3, [r4, #3280]
 	mov	r1, #1
 	ldr	r7, [r4, #3284]
-	ldr	r0, .L777+12
+	ldr	r0, .L785+12
 	str	r3, [r4, #3268]
 	str	r5, [r4, #3276]
 	str	r7, [r4, #3272]
@@ -5382,14 +5451,14 @@ ftl_scan_all_data:
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
 	cmpne	r3, #256
-	beq	.L774
+	beq	.L782
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L773
-.L774:
+	beq	.L781
+.L782:
 	ldr	r2, [r4, #3268]
 	ldr	r3, [r4, #3272]
-	ldr	r0, .L777+16
+	ldr	r0, .L785+16
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5403,18 +5472,18 @@ ftl_scan_all_data:
 	str	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r2, [r4, #3264]
-	bl	printk
-.L773:
+	bl	sftl_printk
+.L781:
 	add	r5, r5, #1
-	b	.L770
-.L778:
+	b	.L778
+.L786:
 	.align	2
-.L777:
+.L785:
 	.word	.LANCHOR0
-	.word	.LC88
-	.word	.LC89
+	.word	.LC92
+	.word	.LC93
 	.word	.LANCHOR0+3260
-	.word	.LC90
+	.word	.LC94
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -5429,21 +5498,21 @@ FtlReadRefresh:
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #88
-	ldr	r3, .L792
+	ldr	r3, .L800
 	ldr	r0, [r3, #2716]
 	mov	r4, r3
 	cmp	r0, #0
-	beq	.L780
+	beq	.L788
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L781
+	bcs	.L789
 	mov	r5, #2048
-.L786:
+.L794:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L783
+	bcs	.L791
 	mov	r2, #0
 	sub	r1, fp, #108
 	bl	log2phys
@@ -5452,10 +5521,10 @@ FtlReadRefresh:
 	cmn	r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L784
+	beq	.L792
 	str	r3, [fp, #-88]
 	sub	r0, fp, #20
-	ldr	r3, .L792+4
+	ldr	r3, .L800+4
 	mov	r1, #1
 	str	r2, [fp, #-100]
 	mov	r2, #0
@@ -5466,53 +5535,53 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-104]
 	cmp	r3, #256
-	bne	.L783
+	bne	.L791
 	ldr	r0, [fp, #-108]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L783:
+.L791:
 	mvn	r0, #0
-.L779:
+.L787:
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L784:
+.L792:
 	subs	r5, r5, #1
-	bne	.L786
-	b	.L783
-.L781:
+	bne	.L794
+	b	.L791
+.L789:
 	ldr	r2, [r3, #2508]
 	mov	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L779
-.L780:
+	b	.L787
+.L788:
 	ldr	r1, [r3, #2508]
 	ldr	r2, [r3, #2712]
 	add	ip, r1, #1048576
 	cmp	r2, ip
-	bhi	.L789
+	bhi	.L797
 	ldr	r3, [r3, #2564]
 	mov	ip, #33554432
 	lsr	r3, r3, #10
 	add	r2, r2, ip, asr r3
 	cmp	r1, r2
-	bhi	.L789
-	ldr	r3, .L792+8
+	bhi	.L797
+	ldr	r3, .L800+8
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L779
-.L789:
+	bne	.L787
+.L797:
 	mov	r3, #1
 	mov	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L779
-.L793:
+	b	.L787
+.L801:
 	.align	2
-.L792:
+.L800:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.word	.LANCHOR0+2268
@@ -5531,116 +5600,116 @@ ftl_check_vpc:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r4, #0
-	ldr	r6, .L818
-	ldr	r1, .L818+4
-	ldr	r0, .L818+8
+	ldr	r6, .L826
+	ldr	r1, .L826+4
+	ldr	r0, .L826+8
 	mov	r5, r6
-	bl	printk
+	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L818+12
+	ldr	r0, .L826+12
 	bl	__memzero
-.L795:
+.L803:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L797
-	ldr	r8, .L818+12
+	bcc	.L805
+	ldr	r8, .L826+12
 	mov	r4, #0
-	ldr	r9, .L818+16
+	ldr	r9, .L826+16
 	mov	r6, r4
-.L798:
+.L806:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L800
+	bhi	.L808
 	ldr	r4, [r5, #2340]
 	cmp	r4, #0
-	beq	.L801
+	beq	.L809
 	movw	r3, #2344
-	ldr	r9, .L818+12
+	ldr	r9, .L826+12
 	ldrh	r8, [r5, r3]
 	mov	r7, #0
 	ldr	r3, [r5, #2316]
-	ldr	r10, .L818+20
+	ldr	r10, .L826+20
 	sub	r4, r4, r3
 	ubfx	r4, r4, #3, #16
-.L802:
+.L810:
 	uxth	r3, r7
 	cmp	r8, r3
-	bls	.L801
+	bls	.L809
 	ldr	r2, [r5, #2324]
 	lsl	r3, r4, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	beq	.L803
+	beq	.L811
 	mov	r6, #1
 	ldrh	r3, [r9, r3]
 	mov	r1, r4
 	mov	r0, r10
-	bl	printk
-.L803:
+	bl	sftl_printk
+.L811:
 	ldr	r3, [r5, #2316]
 	lsl	r4, r4, #3
 	add	r7, r7, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L802
-.L801:
+	bne	.L810
+.L809:
 	cmp	r6, #0
 	ldmibeq	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	movw	r2, #2321
-	ldr	r1, .L818+4
-	ldr	r0, .L818+24
-	bl	printk
+	ldr	r1, .L826+4
+	ldr	r0, .L826+24
+	bl	sftl_printk
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L797:
+.L805:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L796
+	beq	.L804
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, .L818+12
+	ldr	r2, .L826+12
 	lsl	r0, r0, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L796:
+.L804:
 	add	r4, r4, #1
-	b	.L795
-.L800:
+	b	.L803
+.L808:
 	uxth	r1, r4
 	ldr	r3, [r5, #2324]
 	lsl	r7, r1, #1
 	ldrh	r2, [r3, r7]
 	ldrh	r3, [r8, r7]
 	cmp	r2, r3
-	beq	.L799
+	beq	.L807
 	mov	r0, r9
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	movw	r2, #65535
 	ldrh	r3, [r3, r7]
 	cmp	r3, r2
-	beq	.L799
+	beq	.L807
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
 	movhi	r6, #1
-.L799:
+.L807:
 	add	r4, r4, #1
-	b	.L798
-.L819:
+	b	.L806
+.L827:
 	.align	2
-.L818:
+.L826:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+314
-	.word	.LC91
+	.word	.LC95
 	.word	check_vpc_table
-	.word	.LC92
-	.word	.LC93
+	.word	.LC96
+	.word	.LC97
 	.word	.LC1
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
@@ -5662,7 +5731,7 @@ FtlMapBlkWriteDump_data:
 	mov	r3, #0
 	ldrh	r5, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L827
+	ldr	r3, .L835
 	ldr	r2, [r0, #24]
 	sub	r5, r5, #1
 	uxth	r5, r5
@@ -5674,25 +5743,25 @@ FtlMapBlkWriteDump_data:
 	ldr	r2, [r2, r5, lsl #2]
 	cmp	r2, #0
 	str	r2, [r3, #3264]
-	beq	.L822
+	beq	.L830
 	mov	r2, #1
-	ldr	r0, .L827+4
+	ldr	r0, .L835+4
 	mov	r1, r2
 	bl	FlashReadPages
-.L823:
+.L831:
 	ldr	r2, [r4, #3268]
 	mov	r1, r5
 	mov	r0, r6
 	bl	FtlMapWritePage
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L822:
+.L830:
 	ldrh	r2, [r3, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L823
-.L828:
+	b	.L831
+.L836:
 	.align	2
-.L827:
+.L835:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
@@ -5710,7 +5779,7 @@ FtlScanSysBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r4, .L910
+	ldr	r4, .L918
 	movw	r3, #3944
 	mov	r1, r5
 	ldr	r2, [r4, #128]
@@ -5742,11 +5811,11 @@ FtlScanSysBlk:
 	str	r3, [r4, #2584]
 	ldrh	r3, [r4, #40]
 	str	r3, [fp, #-44]
-.L830:
+.L838:
 	ldrh	r3, [r6, #42]
 	ldr	r2, [fp, #-44]
 	cmp	r3, r2
-	bls	.L871
+	bls	.L879
 	ldr	r1, [r6, #3176]
 	mov	r7, #0
 	ldrh	r2, [r6, #32]
@@ -5755,9 +5824,9 @@ FtlScanSysBlk:
 	ldr	r3, [r6, #3172]
 	str	r1, [fp, #-48]
 	ldrh	r9, [r6, #112]
-	ldr	ip, .L910+4
-	b	.L872
-.L832:
+	ldr	ip, .L918+4
+	b	.L880
+.L840:
 	ldrb	r0, [ip, r7]	@ zero_extendqisi2
 	ldr	r1, [fp, #-44]
 	str	r3, [fp, #-64]
@@ -5770,7 +5839,7 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	ldr	r2, [fp, #-60]
 	ldr	r3, [fp, #-64]
-	bne	.L831
+	bne	.L839
 	mov	r1, #20
 	mla	r0, r1, r10, r8
 	ldr	r1, [fp, #-52]
@@ -5786,31 +5855,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, r10, #1
 	uxth	r10, r1
-.L831:
+.L839:
 	add	r7, r7, #1
-.L872:
+.L880:
 	uxth	r1, r7
 	cmp	r2, r1
-	bhi	.L832
+	bhi	.L840
 	cmp	r10, #0
-	bne	.L833
-.L870:
+	bne	.L841
+.L878:
 	ldr	r3, [fp, #-44]
 	add	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [fp, #-44]
-	b	.L830
-.L833:
+	b	.L838
+.L841:
 	mov	r2, #1
 	mov	r1, r10
 	mov	r0, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L909:
+.L917:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r10, r3
-	bls	.L870
+	bls	.L878
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
@@ -5822,9 +5891,9 @@ FtlScanSysBlk:
 	cmn	r3, #1
 	lsr	ip, r1, #10
 	uxth	r8, ip
-	bne	.L837
+	bne	.L845
 	mov	r3, #16
-.L839:
+.L847:
 	ldr	r0, [r4, #3832]
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
@@ -5840,72 +5909,72 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	cmp	r2, r3
 	ldr	r3, [fp, #-52]
-	bne	.L836
+	bne	.L844
 	ldr	r3, [r4, #3832]
 	mvn	r2, #0
 	str	r2, [r3, r9]
 	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r9]
 	cmp	r3, r2
-	bne	.L837
-.L838:
+	bne	.L845
+.L846:
 	mov	r1, #0
 	uxth	r0, ip
 	bl	FtlFreeSysBlkQueueIn
-	b	.L842
-.L836:
+	b	.L850
+.L844:
 	ldr	r2, [r4, #3832]
 	ldr	r2, [r2, r9]
 	cmn	r2, #1
-	bne	.L837
+	bne	.L845
 	sub	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #0
-	bne	.L839
-	b	.L838
-.L837:
+	bne	.L847
+	b	.L846
+.L845:
 	ldr	r2, [r6, #2540]
 	ldr	r3, [r7, #4]
 	cmn	r2, #1
-	beq	.L840
+	beq	.L848
 	cmp	r2, r3
-	bhi	.L841
-.L840:
+	bhi	.L849
+.L848:
 	cmn	r3, #1
 	addne	r2, r3, #1
 	strne	r2, [r5, #2540]
-.L841:
+.L849:
 	ldrh	r2, [r7]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L843
-	bhi	.L844
+	beq	.L851
+	bhi	.L852
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L845
-.L842:
+	beq	.L853
+.L850:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L909
-.L844:
+	b	.L917
+.L852:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L846
+	beq	.L854
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L838
-	b	.L842
-.L846:
-	ldr	r9, .L910+8
+	beq	.L846
+	b	.L850
+.L854:
+	ldr	r9, .L918+8
 	ldr	r3, [r4, #128]
 	ldrh	r2, [r9]
 	cmp	r2, r3
-	bls	.L848
+	bls	.L856
 	movw	r2, #1211
-	ldr	r1, .L910+12
-	ldr	r0, .L910+16
-	bl	printk
-.L848:
+	ldr	r1, .L918+12
+	ldr	r0, .L918+16
+	bl	sftl_printk
+.L856:
 	ldr	r0, [r4, #128]
 	ldrh	r2, [r9]
 	ldr	ip, [r4, #3892]
@@ -5916,34 +5985,34 @@ FtlScanSysBlk:
 	sxth	r3, r3
 	sxth	r1, r1
 	str	r1, [fp, #-52]
-.L849:
+.L857:
 	ldr	r1, [fp, #-52]
 	cmp	r3, r1
-	bgt	.L855
+	bgt	.L863
 	cmp	r3, #0
-	bge	.L887
-	b	.L842
-.L855:
+	bge	.L895
+	b	.L850
+.L863:
 	lsl	lr, r3, #2
 	ldr	r1, [r7, #4]
 	str	lr, [fp, #-56]
 	ldr	lr, [ip, r3, lsl #2]
 	cmp	r1, lr
-	bls	.L850
+	bls	.L858
 	ldr	r1, [ip]
 	cmp	r1, #0
-	bne	.L851
+	bne	.L859
 	cmp	r0, r2
 	addne	r2, r2, #1
 	strhne	r2, [r9]	@ movhi
-.L851:
+.L859:
 	uxth	ip, r3
 	mov	r1, #0
-.L852:
+.L860:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L853
+	bhi	.L861
 	ldr	r1, [r7, #4]
 	cmp	r3, #0
 	ldr	r2, [r5, #3892]
@@ -5952,16 +6021,16 @@ FtlScanSysBlk:
 	lsl	r2, r3, #1
 	ldr	r1, [r5, #3868]
 	strh	r8, [r1, r2]	@ movhi
-	blt	.L842
-	ldr	r2, .L910+8
+	blt	.L850
+	ldr	r2, .L918+8
 	ldr	r1, [r5, #128]
 	ldrh	r2, [r2]
 	sub	r1, r1, r2
 	sub	r1, r1, #1
 	sxth	r1, r1
 	cmp	r3, r1
-	bgt	.L842
-.L887:
+	bgt	.L850
+.L895:
 	add	r2, r2, #1
 	ldr	r1, [r7, #4]
 	strh	r2, [r9]	@ movhi
@@ -5969,10 +6038,10 @@ FtlScanSysBlk:
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
 	ldr	r2, [r4, #3868]
-.L907:
+.L915:
 	strh	r8, [r2, r3]	@ movhi
-	b	.L842
-.L853:
+	b	.L850
+.L861:
 	ldr	r0, [r6, #3892]
 	add	r1, r1, #1
 	add	lr, r0, r2, lsl #2
@@ -5983,21 +6052,21 @@ FtlScanSysBlk:
 	add	lr, r0, r2
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r2]	@ movhi
-	b	.L852
-.L850:
+	b	.L860
+.L858:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L849
-.L845:
+	b	.L857
+.L853:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L858
+	bls	.L866
 	movw	r2, #1252
-	ldr	r1, .L910+12
-	ldr	r0, .L910+16
-	bl	printk
-.L858:
+	ldr	r1, .L918+12
+	ldr	r0, .L918+16
+	bl	sftl_printk
+.L866:
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
 	ldr	ip, [r4, #3880]
@@ -6005,15 +6074,15 @@ FtlScanSysBlk:
 	sxth	r3, r0
 	sub	r0, r0, r1
 	str	r0, [fp, #-52]
-.L859:
+.L867:
 	ldr	r0, [fp, #-52]
 	cmp	r3, r0
-	ble	.L864
+	ble	.L872
 	ldr	r9, [ip, r3, lsl #2]
 	lsl	lr, r3, #2
 	ldr	r0, [r7, #4]
 	cmp	r0, r9
-	bls	.L860
+	bls	.L868
 	sub	r2, r2, r1
 	ldr	r0, [ip]
 	clz	r2, r2
@@ -6025,27 +6094,27 @@ FtlScanSysBlk:
 	addeq	r1, r1, #1
 	strheq	r1, [r5, #144]	@ movhi
 	mov	r1, #0
-.L862:
+.L870:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L863
+	bhi	.L871
 	ldr	r1, [r7, #4]
 	ldr	r2, [r5, #3880]
 	str	r1, [r2, lr]
 	lsl	r2, r3, #1
 	ldr	r1, [r5, #148]
 	strh	r8, [r1, r2]	@ movhi
-.L864:
+.L872:
 	cmp	r3, #0
-	blt	.L842
+	blt	.L850
 	ldrh	r2, [r5, #120]
 	ldrh	r1, [r5, #144]
 	sub	r2, r2, #1
 	sub	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L842
+	bgt	.L850
 	add	r1, r1, #1
 	ldr	r2, [r5, #3880]
 	strh	r1, [r5, #144]	@ movhi
@@ -6053,8 +6122,8 @@ FtlScanSysBlk:
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
 	ldr	r2, [r5, #148]
-	b	.L907
-.L863:
+	b	.L915
+.L871:
 	ldr	r0, [r6, #3880]
 	add	r1, r1, #1
 	add	r9, r0, r2, lsl #2
@@ -6065,81 +6134,81 @@ FtlScanSysBlk:
 	add	r9, r0, r2
 	ldrh	r9, [r9, #2]
 	strh	r9, [r0, r2]	@ movhi
-	b	.L862
-.L860:
+	b	.L870
+.L868:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L859
-.L843:
-	ldr	r9, .L910+20
+	b	.L867
+.L851:
+	ldr	r9, .L918+20
 	movw	r2, #65535
 	ldrh	r1, [r9]
 	cmp	r1, r2
 	strheq	r8, [r9]	@ movhi
-	beq	.L908
+	beq	.L916
 	ldrh	r0, [r9, #4]
 	cmp	r0, r2
-	beq	.L867
+	beq	.L875
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L867:
+.L875:
 	ldr	r3, [r7, #4]
 	ldr	r2, [r4, #2584]
 	cmp	r2, r3
 	strhcs	r8, [r9, #4]	@ movhi
-	bcs	.L842
+	bcs	.L850
 	ldrh	r3, [r9]
 	strh	r8, [r9]	@ movhi
 	strh	r3, [r9, #4]	@ movhi
 	ldr	r3, [r7, #4]
-.L908:
+.L916:
 	str	r3, [r4, #2584]
-	b	.L842
-.L871:
+	b	.L850
+.L879:
 	ldr	r2, [r6, #3868]
 	ldrh	r3, [r2]
 	cmp	r3, #0
-	beq	.L873
-.L876:
+	beq	.L881
+.L884:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L874
-.L875:
+	beq	.L882
+.L883:
 	movw	r3, #3944
 	ldrh	r2, [r4, r3]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L906
+	bls	.L914
 	movw	r2, #1377
-	ldr	r1, .L910+12
-	ldr	r0, .L910+16
-	bl	printk
-.L906:
+	ldr	r1, .L918+12
+	ldr	r0, .L918+16
+	bl	sftl_printk
+.L914:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L873:
+.L881:
 	movw	r1, #3944
 	ldrh	r1, [r6, r1]
 	cmp	r1, #0
 	ldrne	r1, [r6, #128]
-	beq	.L876
-.L877:
+	beq	.L884
+.L885:
 	sxth	ip, r3
 	cmp	ip, r1
-	bcs	.L876
+	bcs	.L884
 	lsl	r0, ip, #1
 	add	r3, r3, #1
 	ldrh	r0, [r2, r0]
 	cmp	r0, #0
-	beq	.L877
+	beq	.L885
 	mov	r3, ip
 	mov	lr, #0
-.L878:
+.L886:
 	ldr	r2, [r5, #128]
 	cmp	r3, r2
-	bcs	.L876
+	bcs	.L884
 	ldr	r1, [r5, #3868]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
@@ -6153,27 +6222,27 @@ FtlScanSysBlk:
 	str	r6, [r1, r0, lsl #2]
 	ldr	r1, [r5, #3868]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L878
-.L874:
+	b	.L886
+.L882:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
 	ldrhne	r0, [r4, #120]
-	beq	.L875
-.L883:
+	beq	.L883
+.L891:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	ip, r3
-	bge	.L875
+	bge	.L883
 	lsl	lr, r3, #1
 	add	r2, r2, #1
 	ldrh	lr, [r1, lr]
 	cmp	lr, #0
-	beq	.L883
+	beq	.L891
 	mov	lr, #0
-.L884:
+.L892:
 	ldrh	r2, [r5, #120]
 	cmp	r3, r2
-	bge	.L875
+	bge	.L883
 	ldr	r1, [r5, #148]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
@@ -6187,10 +6256,10 @@ FtlScanSysBlk:
 	str	r6, [r1, r0, lsl #2]
 	ldr	r1, [r5, #148]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L884
-.L911:
+	b	.L892
+.L919:
 	.align	2
-.L910:
+.L918:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR0+3944
@@ -6214,7 +6283,7 @@ FtlMapTblRecovery:
 	mov	r1, #0
 	ldr	r3, [r0, #24]
 	mov	r4, r0
-	ldr	r6, .L939
+	ldr	r6, .L947
 	mov	r7, #0
 	ldr	r8, [r0, #12]
 	str	r3, [fp, #-44]
@@ -6240,16 +6309,16 @@ FtlMapTblRecovery:
 	mov	r2, #1
 	str	r7, [r4, #28]
 	str	r2, [r4, #36]
-.L913:
+.L921:
 	ldr	r3, [fp, #-52]
 	sxth	r2, r7
 	cmp	r2, r3
-	bge	.L930
+	bge	.L938
 	ldr	r3, [fp, #-52]
 	lsl	r0, r2, #1
 	sub	r1, r3, #1
 	cmp	r2, r1
-	bne	.L914
+	bne	.L922
 	add	r10, r8, r0
 	mov	r1, #1
 	ldrh	r0, [r8, r0]
@@ -6260,26 +6329,26 @@ FtlMapTblRecovery:
 	sxth	r1, r0
 	ldr	r2, [fp, #-52]
 	add	r0, r0, #1
-	ldr	ip, .L939+4
+	ldr	ip, .L947+4
 	strh	r7, [r4]	@ movhi
 	add	r7, r1, #1
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r2, [r3, r2, lsl #2]
 	str	r2, [r4, #28]
-.L915:
+.L923:
 	sxth	r2, r8
 	cmp	r2, r7
-	blt	.L917
-.L930:
+	blt	.L925
+.L938:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L919
+	bne	.L927
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L919:
+.L927:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6287,7 +6356,7 @@ FtlMapTblRecovery:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L917:
+.L925:
 	ldrh	r1, [r10]
 	mov	r0, ip
 	str	ip, [fp, #-52]
@@ -6299,28 +6368,28 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #3260]
 	ldr	ip, [fp, #-52]
 	cmn	r2, #1
-	beq	.L916
+	beq	.L924
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L916
+	bls	.L924
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
 	ldreq	r1, [r6, #3264]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L916:
+.L924:
 	add	r8, r8, #1
-	b	.L915
-.L914:
+	b	.L923
+.L922:
 	ldr	r2, [r5, #3280]
 	add	r3, r8, r0
 	str	r3, [fp, #-60]
 	str	r2, [r5, #3268]
 	ldrh	r2, [r5, #104]
 	ldrh	r1, [r8, r0]
-	ldr	r0, .L939+4
+	ldr	r0, .L947+4
 	sub	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #3264]
@@ -6329,24 +6398,24 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	beq	.L932
+	beq	.L940
 	ldrh	r1, [r9]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L932
+	bne	.L940
 	ldrh	r1, [r9, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L921
-.L932:
+	beq	.L929
+.L940:
 	mov	r10, #0
-.L922:
+.L930:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r10
 	cmp	r2, r1
-	bge	.L928
+	bge	.L936
 	ldr	r3, [fp, #-60]
-	ldr	r0, .L939+4
+	ldr	r0, .L947+4
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #3264]
@@ -6355,33 +6424,33 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3260]
 	cmn	r2, #1
-	beq	.L926
+	beq	.L934
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L926
+	bls	.L934
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
 	ldreq	r1, [r5, #3264]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L926:
+.L934:
 	add	r10, r10, #1
-	b	.L922
-.L921:
+	b	.L930
+.L929:
 	mov	r0, #0
 	mov	lr, #4
-.L923:
+.L931:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	sub	r1, r1, #1
 	cmp	r2, r1
-	blt	.L925
-.L928:
+	blt	.L933
+.L936:
 	add	r7, r7, #1
-	b	.L913
-.L925:
+	b	.L921
+.L933:
 	ldr	ip, [r5, #3280]
 	add	r0, r0, #1
 	ldr	r3, [fp, #-48]
@@ -6393,10 +6462,10 @@ FtlMapTblRecovery:
 	movhi	r1, r10
 	ldrhi	r2, [ip, r2]
 	strhi	r2, [r3, r1, lsl #2]
-	b	.L923
-.L940:
+	b	.L931
+.L948:
 	.align	2
-.L939:
+.L947:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -6412,12 +6481,12 @@ FtlLoadVonderInfo:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L942
+	ldr	r3, .L950
 	ldrh	r2, [r3, #120]
 	add	r0, r3, #3936
 	add	r0, r0, #12
 	strh	r2, [r0, #10]	@ movhi
-	ldr	r2, .L942+4
+	ldr	r2, .L950+4
 	strh	r2, [r0, #4]	@ movhi
 	ldrh	r2, [r3, #144]
 	strh	r2, [r0, #8]	@ movhi
@@ -6434,9 +6503,9 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L943:
+.L951:
 	.align	2
-.L942:
+.L950:
 	.word	.LANCHOR0
 	.word	-3962
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6452,7 +6521,7 @@ FtlL2PDataInit:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L947
+	ldr	r4, .L955
 	mov	r1, #0
 	mvn	r5, #0
 	ldr	r2, [r4, #128]
@@ -6469,19 +6538,19 @@ FtlL2PDataInit:
 	mov	r3, r4
 	mov	lr, #12
 	mov	r4, r2
-.L945:
+.L953:
 	ldrh	r0, [r3, #138]
 	uxth	r1, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bhi	.L946
-	ldr	r2, .L947+4
+	bhi	.L954
+	ldr	r2, .L955+4
 	mvn	r1, #0
 	strh	r1, [r2, #2]	@ movhi
 	strh	r1, [r2]	@ movhi
 	ldr	r1, [r3, #128]
 	strh	r1, [r2, #10]	@ movhi
-	ldr	r1, .L947+8
+	ldr	r1, .L955+8
 	strh	r1, [r2, #4]	@ movhi
 	movw	r1, #3944
 	ldrh	r1, [r3, r1]
@@ -6497,7 +6566,7 @@ FtlL2PDataInit:
 	ldr	r2, [r3, #3888]
 	str	r2, [r3, #3928]
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L946:
+.L954:
 	uxth	r2, r2
 	ldr	r1, [r3, #2492]
 	mul	r0, lr, r2
@@ -6513,10 +6582,10 @@ FtlL2PDataInit:
 	add	r2, r0, r2
 	str	r2, [r1, #8]
 	mov	r2, ip
-	b	.L945
-.L948:
+	b	.L953
+.L956:
 	.align	2
-.L947:
+.L955:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3904
 	.word	-3902
@@ -6534,13 +6603,13 @@ FtlLoadMapInfo:
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
 	bl	FtlL2PDataInit
-	ldr	r0, .L950
+	ldr	r0, .L958
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L951:
+.L959:
 	.align	2
-.L950:
+.L958:
 	.word	.LANCHOR0+3904
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
@@ -6555,7 +6624,7 @@ FtlVariablesInit:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L953
+	ldr	r4, .L961
 	mvn	r3, #0
 	movw	r2, #3992
 	mov	r5, #0
@@ -6592,9 +6661,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L954:
+.L962:
 	.align	2
-.L953:
+.L961:
 	.word	.LANCHOR0
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	2
@@ -6611,7 +6680,7 @@ SupperBlkListInit:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, #0
-	ldr	r4, .L966
+	ldr	r4, .L974
 	mov	r1, #0
 	mov	r8, r5
 	mov	r7, r5
@@ -6627,20 +6696,20 @@ SupperBlkListInit:
 	strh	r5, [r3]	@ movhi
 	strh	r5, [r4, r2]	@ movhi
 	str	r3, [fp, #-48]
-.L956:
+.L964:
 	ldrh	r3, [r4, #40]
 	uxth	r10, r5
 	cmp	r10, r3
-	bcs	.L962
+	bcs	.L970
 	ldrh	r3, [r4, #102]
 	mov	r9, r10
 	ldrh	ip, [r4, #32]
 	str	r3, [fp, #-44]
 	mov	r3, #0
 	mov	r6, r3
-	b	.L963
-.L958:
-	ldr	r2, .L966+4
+	b	.L971
+.L966:
+	ldr	r2, .L974+4
 	mov	r1, r9
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
@@ -6654,67 +6723,67 @@ SupperBlkListInit:
 	add	r3, r3, #1
 	addeq	r6, r6, r2
 	uxtheq	r6, r6
-.L963:
+.L971:
 	uxth	r1, r3
 	cmp	ip, r1
-	bhi	.L958
+	bhi	.L966
 	cmp	r6, #0
 	moveq	r0, r6
-	beq	.L959
+	beq	.L967
 	mov	r1, r6
 	mov	r0, #32768
 	bl	__divsi3
-.L959:
+.L967:
 	ldr	r3, [r4, #2316]
 	add	r3, r3, r9, lsl #3
 	strh	r0, [r3, #4]	@ movhi
-	ldr	r3, .L966+8
+	ldr	r3, .L974+8
 	ldrh	r1, [r3]
 	cmp	r1, r10
-	beq	.L960
+	beq	.L968
 	ldrh	r1, [r3, #48]
 	cmp	r1, r10
-	beq	.L960
+	beq	.L968
 	ldrh	r3, [r3, #96]
 	cmp	r3, r10
-	beq	.L960
+	beq	.L968
 	ldr	r2, [r4, #2324]
 	lsl	r3, r9, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L961
+	bne	.L969
 	add	r8, r8, #1
 	mov	r0, r9
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L960:
+.L968:
 	add	r5, r5, #1
-	b	.L956
-.L961:
+	b	.L964
+.L969:
 	add	r7, r7, #1
 	mov	r0, r9
 	uxth	r7, r7
 	bl	INSERT_DATA_LIST
-	b	.L960
-.L962:
+	b	.L968
+.L970:
 	ldr	r2, [fp, #-48]
 	strh	r7, [r2]	@ movhi
 	add	r7, r7, r8
 	cmp	r7, r3
 	movw	r2, #2344
 	strh	r8, [r4, r2]	@ movhi
-	ble	.L964
+	ble	.L972
 	movw	r2, #2154
-	ldr	r1, .L966+12
-	ldr	r0, .L966+16
-	bl	printk
-.L964:
+	ldr	r1, .L974+12
+	ldr	r0, .L974+16
+	bl	sftl_printk
+.L972:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L967:
+.L975:
 	.align	2
-.L966:
+.L974:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR0+2348
@@ -6733,7 +6802,7 @@ FtlGcPageVarInit:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L969
+	ldr	r4, .L977
 	mov	r3, #0
 	movw	r2, #3192
 	mov	r1, #255
@@ -6752,9 +6821,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	ldmfd	sp, {r4, fp, sp, pc}
-.L970:
+.L978:
 	.align	2
-.L969:
+.L977:
 	.word	.LANCHOR0
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	2
@@ -6771,35 +6840,35 @@ FtlGcScanTempBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #20
 	mov	r6, r0
-	ldr	r3, .L994
+	ldr	r3, .L1002
 	mov	r10, r1
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L988
+	beq	.L996
 	cmp	r4, #0
-	bne	.L972
-.L973:
+	bne	.L980
+.L981:
 	bl	FtlGcPageVarInit
-	b	.L974
-.L988:
+	b	.L982
+.L996:
 	mov	r4, #0
-.L972:
-	ldr	r3, .L994+4
+.L980:
+	ldr	r3, .L1002+4
 	ldrh	r3, [r3, #102]
 	cmp	r3, r10
-	beq	.L973
-.L974:
-	ldr	r5, .L994+4
-	mov	r8, #0
+	beq	.L981
 .L982:
+	ldr	r5, .L1002+4
+	mov	r8, #0
+.L990:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	mov	r0, #0
 	strb	r0, [r6, #8]
 	cmp	r2, r3
-	beq	.L975
-.L985:
+	beq	.L983
+.L993:
 	ldrh	r3, [r5, #32]
 	mov	r2, #0
 	ldr	r0, [r5, #3832]
@@ -6815,34 +6884,34 @@ FtlGcScanTempBlk:
 	str	r3, [fp, #-56]
 	ldrh	r3, [r5, #112]
 	str	r3, [fp, #-60]
-.L976:
+.L984:
 	ldr	r1, [fp, #-44]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L978
+	bhi	.L986
 	mov	r9, #0
 	mov	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.L979:
+.L987:
 	uxth	r3, r9
 	cmp	r7, r3
-	bhi	.L983
+	bhi	.L991
 	add	r8, r8, #1
 	add	r4, r4, #1
 	cmp	r10, r8
 	uxth	r4, r4
-	bls	.L984
-.L986:
+	bls	.L992
+.L994:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L985
+	bhi	.L993
 	mov	r0, #0
-	b	.L975
-.L978:
+	b	.L983
+.L986:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L977
+	beq	.L985
 	mov	r1, #20
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r1, r7, r0
@@ -6867,10 +6936,10 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L977:
+.L985:
 	add	r2, r2, #1
-	b	.L976
-.L983:
+	b	.L984
+.L991:
 	mov	r3, #20
 	ldr	r2, [r5, #3832]
 	mul	r3, r3, r9
@@ -6886,7 +6955,7 @@ FtlGcScanTempBlk:
 	ldr	r3, [fp, #-56]
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L980
+	bne	.L988
 	ldr	ip, [fp, #-48]
 	movw	r2, #65535
 	add	r9, r9, #1
@@ -6894,11 +6963,11 @@ FtlGcScanTempBlk:
 	ldr	r3, [ip, #12]
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L981
+	bne	.L989
 	mov	r3, #1
 	str	r3, [r5, #4000]
-.L975:
-	ldr	r3, .L994
+.L983:
+	ldr	r3, .L1002
 	mvn	r2, #0
 	strb	r0, [r6, #6]
 	mov	r1, r4
@@ -6907,13 +6976,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r6
 	bl	ftl_sb_update_avl_pages
-	b	.L987
-.L981:
+	b	.L995
+.L989:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L979
-.L980:
+	b	.L987
+.L988:
 	ldrh	r3, [r6]
 	mov	r4, #0
 	ldr	r2, [r5, #2324]
@@ -6924,25 +6993,25 @@ FtlGcScanTempBlk:
 	mvn	r3, #0
 	strh	r3, [r6]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L982
-.L984:
-	ldr	r2, .L994
+	b	.L990
+.L992:
+	ldr	r2, .L1002
 	movw	r1, #65535
 	ldrh	r3, [r2, #4]
 	cmp	r3, r1
-	beq	.L986
+	beq	.L994
 	add	r3, r3, r8
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L986
-.L987:
+	bls	.L994
+.L995:
 	mvn	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L995:
+.L1003:
 	.align	2
-.L994:
+.L1002:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
@@ -6975,9 +7044,9 @@ FtlBbmTblFlush:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r5, #0
-	ldr	r4, .L1006
+	ldr	r4, .L1014
 	mov	r1, #0
-	ldr	r7, .L1006+4
+	ldr	r7, .L1014+4
 	ldr	r0, [r4, #3280]
 	add	r6, r4, #176
 	ldr	r3, [r4, #3284]
@@ -6985,20 +7054,20 @@ FtlBbmTblFlush:
 	str	r0, [r4, #3268]
 	str	r3, [r4, #3272]
 	bl	ftl_memset
-.L998:
+.L1006:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L999
+	blt	.L1007
 	ldr	r6, [r4, #3272]
 	mov	r2, #16
 	mov	r1, #255
-	ldr	r9, .L1006+8
-	ldr	r8, .L1006+12
+	ldr	r9, .L1014+8
+	ldr	r8, .L1014+12
 	mov	r5, #0
 	mov	r0, r6
 	mov	r7, r5
 	bl	memset
-	ldr	r3, .L1006+16
+	ldr	r3, .L1014+16
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #160]
 	str	r3, [r6, #4]
@@ -7010,7 +7079,7 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1000:
+.L1008:
 	ldr	r3, [r4, #3280]
 	mov	r10, #0
 	ldrh	r1, [r4, #152]
@@ -7025,7 +7094,7 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
-	bl	printk
+	bl	sftl_printk
 	mov	r3, #1
 	mov	r0, r8
 	mov	r2, r3
@@ -7035,7 +7104,7 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1001
+	blt	.L1009
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
 	ldr	r0, [r4, #3800]
@@ -7058,27 +7127,27 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1001:
+.L1009:
 	ldrh	r3, [r4, #154]
 	add	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	bne	.L1002
+	bne	.L1010
 	add	r5, r5, #1
 	ldr	r1, [r4, #3264]
 	uxth	r5, r5
-	ldr	r0, .L1006+20
-	bl	printk
+	ldr	r0, .L1014+20
+	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1000
+	bls	.L1008
 	mov	r2, r5
 	ldr	r1, [r4, #3264]
-	ldr	r0, .L1006+24
-	bl	printk
-.L1004:
-	b	.L1004
-.L999:
+	ldr	r0, .L1014+24
+	bl	sftl_printk
+.L1012:
+	b	.L1012
+.L1007:
 	ldrh	r2, [r7]
 	ldr	r3, [r4, #3268]
 	ldr	r1, [r6, #4]!
@@ -7087,25 +7156,25 @@ FtlBbmTblFlush:
 	add	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L998
-.L1005:
+	b	.L1006
+.L1013:
 	mov	r7, #1
-	b	.L1000
-.L1002:
+	b	.L1008
+.L1010:
 	cmp	r7, #0
-	beq	.L1005
+	beq	.L1013
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1007:
+.L1015:
 	.align	2
-.L1006:
+.L1014:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3900
-	.word	.LC94
+	.word	.LC98
 	.word	.LANCHOR0+3260
 	.word	-3887
-	.word	.LC95
-	.word	.LC96
+	.word	.LC99
+	.word	.LC100
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	2
 	.global	allocate_data_superblock
@@ -7121,25 +7190,25 @@ allocate_data_superblock:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, r0
-	ldr	r4, .L1043
+	ldr	r4, .L1051
 	add	r9, r4, #2336
-.L1009:
-	ldr	r7, .L1043+4
+.L1017:
+	ldr	r7, .L1051+4
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1010
+	ble	.L1018
 	movw	r2, #2585
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1010:
-	ldr	r3, .L1043+16
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1018:
+	ldr	r3, .L1051+16
 	cmp	r5, r3
 	movne	r1, #0
-	bne	.L1011
+	bne	.L1019
 	ldrh	r3, [r7]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7150,19 +7219,19 @@ allocate_data_superblock:
 	cmp	r1, #0
 	subne	r1, r1, #1
 	uxthne	r1, r1
-.L1011:
-	ldr	r0, .L1043+20
+.L1019:
+	ldr	r0, .L1051+20
 	bl	List_pop_index_node
 	ldrh	r3, [r7]
 	mov	r6, r0
 	uxth	r8, r0
 	cmp	r3, #0
-	bne	.L1012
+	bne	.L1020
 	movw	r2, #2594
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1012:
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1020:
 	ldrh	r3, [r7]
 	mov	r0, r5
 	sub	r3, r3, #1
@@ -7171,7 +7240,7 @@ allocate_data_superblock:
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1013
+	bne	.L1021
 	uxth	r0, r6
 	ldr	r2, [r4, #2324]
 	mvn	r1, #0
@@ -7183,24 +7252,24 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1009
+	ble	.L1017
 	movw	r2, #2605
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-	b	.L1009
-.L1013:
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+	b	.L1017
+.L1021:
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1015
+	ble	.L1023
 	mov	r2, #2608
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1015:
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1023:
 	ldr	r0, [r4, #3800]
 	mov	r2, #20
 	ldrh	r1, [r4, #32]
@@ -7210,30 +7279,30 @@ allocate_data_superblock:
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [fp, #-44]
-.L1016:
+.L1024:
 	ldr	r1, [fp, #-44]
 	cmp	r1, r3
-	bne	.L1018
+	bne	.L1026
 	cmp	r7, #0
-	bne	.L1019
+	bne	.L1027
 	movw	r2, #2619
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1019:
-	ldr	r3, .L1043+24
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1027:
+	ldr	r3, .L1051+24
 	ldrh	r3, [r3]
 	cmp	r3, r8
-	bne	.L1020
+	bne	.L1028
 	movw	r2, #2621
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1020:
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1028:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	cmp	r3, #0
-	bne	.L1021
+	bne	.L1029
 	ldr	r1, [r4, #2328]
 	lsl	r2, r6, #1
 	ldrh	r3, [r1, r2]
@@ -7248,7 +7317,7 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1024:
+.L1032:
 	ldr	r3, [r4, #2328]
 	lsl	r10, r6, #1
 	ldr	r2, [r4, #2564]
@@ -7265,17 +7334,17 @@ allocate_data_superblock:
 	ldr	r1, [r4, #3800]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1043+28
+	ldr	r0, .L1051+28
 	add	r3, r3, #1
 	str	r3, [r2, #16]
 	mov	r2, #20
 	mla	r2, r2, r7, r1
 	add	r3, r1, #4
 	add	r2, r2, #24
-.L1026:
+.L1034:
 	add	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1027
+	bne	.L1035
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3800]
@@ -7283,26 +7352,26 @@ allocate_data_superblock:
 	mov	r3, #0
 	mov	ip, #20
 	mov	r1, r3
-.L1028:
+.L1036:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L1030
+	bhi	.L1038
 	cmp	r1, #0
-	ble	.L1031
+	ble	.L1039
 	mov	r0, r6
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1031:
+.L1039:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1032
+	bne	.L1040
 	ldr	r3, [r4, #2324]
 	mvn	r2, #0
 	mov	r0, r6
 	strh	r2, [r3, r10]	@ movhi
 	bl	INSERT_DATA_LIST
-	b	.L1009
-.L1018:
+	b	.L1017
+.L1026:
 	str	lr, [r3, #8]
 	movw	r10, #65535
 	str	lr, [r3, #12]
@@ -7314,8 +7383,8 @@ allocate_data_superblock:
 	addne	r7, r7, #1
 	uxthne	r7, r7
 	strne	r1, [r10, #4]
-	b	.L1016
-.L1021:
+	b	.L1024
+.L1029:
 	ldr	r1, [r4, #2328]
 	lsl	r3, r6, #1
 	mov	r0, r6
@@ -7326,19 +7395,19 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1024
-.L1027:
+	b	.L1032
+.L1035:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1026
-.L1030:
+	b	.L1034
+.L1038:
 	mul	r2, ip, r3
 	ldr	lr, [r4, #3800]
 	add	r0, lr, r2
 	ldr	r2, [lr, r2]
 	cmn	r2, #1
-	bne	.L1029
+	bne	.L1037
 	ldr	r0, [r0, #4]
 	add	r1, r1, #1
 	str	ip, [fp, #-56]
@@ -7356,10 +7425,10 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	sub	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1029:
+.L1037:
 	add	r3, r3, #1
-	b	.L1028
-.L1032:
+	b	.L1036
+.L1040:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7378,22 +7447,22 @@ allocate_data_superblock:
 	strh	r3, [r1, r2]	@ movhi
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1033
+	beq	.L1041
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1034
-.L1033:
+	bne	.L1042
+.L1041:
 	movw	r2, #2674
-	ldr	r1, .L1043+8
-	ldr	r0, .L1043+12
-	bl	printk
-.L1034:
+	ldr	r1, .L1051+8
+	ldr	r0, .L1051+12
+	bl	sftl_printk
+.L1042:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1044:
+.L1052:
 	.align	2
-.L1043:
+.L1051:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2344
 	.word	.LANCHOR1+360
@@ -7417,76 +7486,76 @@ FtlGcFreeBadSuperBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	uxth	r3, r0
-	ldr	r6, .L1057
+	ldr	r6, .L1065
 	str	r3, [fp, #-44]
 	movw	r3, #3206
 	ldrh	r3, [r6, r3]
 	cmp	r3, #0
 	movne	r7, #0
-	ldrne	r10, .L1057+4
-	bne	.L1047
-.L1046:
+	ldrne	r10, .L1065+4
+	bne	.L1055
+.L1054:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1053:
+.L1061:
 	uxtah	r3, r6, r7
 	ldr	r1, [fp, #-44]
 	mov	r8, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1048:
+.L1056:
 	ldrh	r3, [r10]
 	uxth	r4, r8
 	cmp	r3, r4
-	bhi	.L1052
+	bhi	.L1060
 	add	r7, r7, #1
-.L1047:
+.L1055:
 	ldrh	r2, [r6, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1053
+	bhi	.L1061
 	bl	FtlGcReFreshBadBlk
-	b	.L1046
-.L1052:
+	b	.L1054
+.L1060:
 	uxth	r3, r8
-	ldr	r5, .L1057+8
+	ldr	r5, .L1065+8
 	lsl	r2, r3, #1
 	ldrh	r2, [r5, r2]
 	cmp	r2, r9
-	bne	.L1049
+	bne	.L1057
 	mov	r1, r9
-	ldr	r0, .L1057+12
+	ldr	r0, .L1065+12
 	str	r3, [fp, #-48]
-	bl	printk
+	bl	sftl_printk
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	ldr	r3, [fp, #-48]
 	ldrh	r2, [r10]
 	add	r3, r5, r3, lsl #1
-.L1050:
+.L1058:
 	cmp	r4, r2
-	bcc	.L1051
+	bcc	.L1059
 	sub	r2, r2, #1
 	strh	r2, [r10]	@ movhi
-.L1049:
+.L1057:
 	add	r8, r8, #1
-	b	.L1048
-.L1051:
+	b	.L1056
+.L1059:
 	ldrh	r1, [r3, #2]!
 	add	r4, r4, #1
 	uxth	r4, r4
 	strh	r1, [r3, #-2]	@ movhi
-	b	.L1050
-.L1058:
+	b	.L1058
+.L1066:
 	.align	2
-.L1057:
+.L1065:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3206
 	.word	.LANCHOR0+3208
-	.word	.LC97
+	.word	.LC101
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -7500,20 +7569,20 @@ update_vpc_list:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1069
+	ldr	r3, .L1077
 	uxth	r4, r0
 	ldr	r1, [r3, #2324]
 	lsl	r2, r4, #1
 	mov	r6, r3
 	ldrh	r0, [r1, r2]
 	cmp	r0, #0
-	bne	.L1060
+	bne	.L1068
 	movw	r2, #2588
 	ldrh	r1, [r3, r2]
 	cmp	r1, r4
 	mvneq	r3, #0
 	strheq	r3, [r6, r2]	@ movhi
-	beq	.L1062
+	beq	.L1070
 	movw	r2, #2348
 	ldrh	r2, [r3, r2]
 	cmp	r2, r4
@@ -7526,19 +7595,19 @@ update_vpc_list:
 	ldrh	r3, [r3, r2]
 	cmp	r3, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-.L1062:
-	ldr	r5, .L1069+4
+.L1070:
+	ldr	r5, .L1077+4
 	mov	r1, r4
-	ldr	r0, .L1069+8
+	ldr	r0, .L1077+8
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L1064
+	bne	.L1072
 	movw	r2, #2744
-	ldr	r1, .L1069+12
-	ldr	r0, .L1069+16
-	bl	printk
-.L1064:
+	ldr	r1, .L1077+12
+	ldr	r0, .L1077+16
+	bl	sftl_printk
+.L1072:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	sub	r3, r3, #1
@@ -7552,22 +7621,22 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r6, #40]
 	cmp	r3, r2
-	ble	.L1068
+	ble	.L1076
 	movw	r2, #2747
-	ldr	r1, .L1069+12
-	ldr	r0, .L1069+16
-	bl	printk
-.L1068:
+	ldr	r1, .L1077+12
+	ldr	r0, .L1077+16
+	bl	sftl_printk
+.L1076:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1060:
+.L1068:
 	mov	r0, r4
 	bl	List_update_data_list
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1070:
+.L1078:
 	.align	2
-.L1069:
+.L1077:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2336
 	.word	.LANCHOR0+2320
@@ -7589,44 +7658,44 @@ decrement_vpc_count:
 	uxth	r6, r0
 	movw	r3, #65535
 	cmp	r6, r3
-	ldr	r4, .L1083
-	beq	.L1072
+	ldr	r4, .L1091
+	beq	.L1080
 	ldr	r3, [r4, #2324]
 	lsl	r5, r6, #1
 	ldrh	r2, [r3, r5]
 	cmp	r2, #0
 	subne	r2, r2, #1
 	strhne	r2, [r3, r5]	@ movhi
-	bne	.L1072
+	bne	.L1080
 	mov	r1, r6
-	ldr	r0, .L1083+4
-	bl	printk
+	ldr	r0, .L1091+4
+	bl	sftl_printk
 	ldr	r3, [r4, #2324]
 	ldrh	r5, [r3, r5]
 	cmp	r5, #0
-	beq	.L1074
-.L1081:
+	beq	.L1082
+.L1089:
 	mov	r5, #0
-.L1071:
+.L1079:
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1074:
-	movw	r2, #2762
 .L1082:
-	ldr	r1, .L1083+8
-	ldr	r0, .L1083+12
-	bl	printk
-	b	.L1071
-.L1072:
+	movw	r2, #2762
+.L1090:
+	ldr	r1, .L1091+8
+	ldr	r0, .L1091+12
+	bl	sftl_printk
+	b	.L1079
+.L1080:
 	movw	r7, #3992
 	movw	r3, #65535
 	ldrh	r0, [r4, r7]
 	cmp	r0, r3
 	strheq	r6, [r4, r7]	@ movhi
-	beq	.L1081
-.L1076:
+	beq	.L1089
+.L1084:
 	cmp	r6, r0
-	beq	.L1081
+	beq	.L1089
 	bl	update_vpc_list
 	ldr	r2, [r4, #2316]
 	adds	r5, r0, #0
@@ -7645,14 +7714,14 @@ decrement_vpc_count:
 	lsr	r2, r2, #5
 	moveq	r2, #0
 	cmp	r2, #0
-	beq	.L1071
+	beq	.L1079
 	movw	r2, #2778
-	b	.L1082
-.L1084:
+	b	.L1090
+.L1092:
 	.align	2
-.L1083:
+.L1091:
 	.word	.LANCHOR0
-	.word	.LC98
+	.word	.LC102
 	.word	.LANCHOR1+401
 	.word	.LC1
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -7669,22 +7738,22 @@ FtlWriteDump_data:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #28
-	ldr	r6, .L1103
-	ldr	r4, .L1103+4
+	ldr	r6, .L1111
+	ldr	r4, .L1111+4
 	ldrh	r2, [r6, #4]
 	cmp	r2, #0
-	beq	.L1086
+	beq	.L1094
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1086
+	bne	.L1094
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1086
+	beq	.L1094
 	ldrb	r8, [r4, #2358]	@ zero_extendqisi2
 	cmp	r8, #0
-	bne	.L1085
+	bne	.L1093
 	ldr	r7, [r4, #2504]
 	mov	r2, r8
 	sub	r1, fp, #64
@@ -7701,37 +7770,37 @@ FtlWriteDump_data:
 	str	r0, [fp, #-52]
 	str	r5, [fp, #-48]
 	str	r8, [r5, #4]
-	beq	.L1088
+	beq	.L1096
 	mov	r2, r8
 	mov	r1, #1
 	sub	r0, fp, #60
 	bl	FlashReadPages
-.L1089:
-	ldr	ip, .L1103
+.L1097:
+	ldr	ip, .L1111
 	mov	r8, #0
-	ldr	r3, .L1103+8
+	ldr	r3, .L1111+8
 	lsl	r9, r9, #2
 	mov	r10, r8
 	strh	r3, [r5]	@ movhi
-.L1090:
+.L1098:
 	cmp	r9, r8
-	bne	.L1094
-.L1091:
+	bne	.L1102
+.L1099:
 	mov	r3, #1
-.L1102:
+.L1110:
 	strb	r3, [r4, #2358]
-.L1085:
+.L1093:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1088:
+.L1096:
 	ldrh	r2, [r4, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L1089
-.L1094:
+	b	.L1097
+.L1102:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1091
+	beq	.L1099
 	ldr	r3, [fp, #-56]
 	mov	r0, ip
 	str	r7, [r5, #8]
@@ -7756,13 +7825,13 @@ FtlWriteDump_data:
 	ldrh	r0, [r6]
 	bl	decrement_vpc_count
 	ldr	ip, [fp, #-68]
-	b	.L1090
-.L1086:
+	b	.L1098
+.L1094:
 	mov	r3, #0
-	b	.L1102
-.L1104:
+	b	.L1110
+.L1112:
 	.align	2
-.L1103:
+.L1111:
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0
 	.word	-3947
@@ -7779,31 +7848,31 @@ l2p_flush:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L1109
+	ldr	r5, .L1117
 	mov	r4, #0
 	mov	r6, #12
 	bl	FtlWriteDump_data
-.L1106:
+.L1114:
 	ldrh	r2, [r5, #138]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1108
+	bhi	.L1116
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1108:
+.L1116:
 	ldr	r3, [r5, #2492]
 	uxth	r0, r4
 	mla	r3, r6, r0, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1107
+	bge	.L1115
 	bl	flush_l2p_region
-.L1107:
+.L1115:
 	add	r4, r4, #1
-	b	.L1106
-.L1110:
+	b	.L1114
+.L1118:
 	.align	2
-.L1109:
+.L1117:
 	.word	.LANCHOR0
 	.size	l2p_flush, .-l2p_flush
 	.align	2
@@ -7823,9 +7892,9 @@ FtlRecoverySuperblock:
 	ldrh	r3, [r0]
 	mov	r10, r0
 	cmp	r3, r2
-	beq	.L1232
+	beq	.L1240
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L1239
+	ldr	r5, .L1247
 	str	r3, [fp, #-64]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [fp, #-64]
@@ -7835,27 +7904,27 @@ FtlRecoverySuperblock:
 	mov	r3, #0
 	strheq	r3, [r0, #4]	@ movhi
 	ldrhne	r0, [r0, #16]
-	bne	.L1115
-.L1237:
+	bne	.L1123
+.L1245:
 	strb	r3, [r10, #6]
-.L1232:
+.L1240:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1116:
+.L1124:
 	uxth	r1, r3
 	add	r1, r10, r1, lsl #1
 	ldrh	r0, [r1, #16]
-.L1115:
+.L1123:
 	cmp	r0, r2
 	uxth	r6, r3
 	add	r3, r3, #1
-	beq	.L1116
+	beq	.L1124
 	mov	r1, #1
 	bl	FtlGetLastWrittenPage
 	cmn	r0, #1
 	mov	r4, r0
-	beq	.L1117
+	beq	.L1125
 	ldrh	r3, [r5, #32]
 	mov	r2, #0
 	ldr	r0, [r5, #3832]
@@ -7872,12 +7941,12 @@ FtlRecoverySuperblock:
 	add	r3, r10, #16
 	mov	ip, r3
 	str	r3, [fp, #-76]
-.L1118:
+.L1126:
 	ldr	r1, [fp, #-56]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1122
-	ldr	r6, .L1239
+	bhi	.L1130
+	ldr	r6, .L1247
 	mov	r2, #0
 	mov	r1, r5
 	movw	r8, #65535
@@ -7890,15 +7959,15 @@ FtlRecoverySuperblock:
 	str	r3, [fp, #-56]
 	mov	r7, r9
 	mov	r3, #0
-.L1123:
+.L1131:
 	uxth	r2, r3
 	cmp	r5, r2
-	bhi	.L1128
+	bhi	.L1136
 	addeq	r3, r4, #1
 	uxtheq	r3, r3
 	streq	r3, [fp, #-60]
-	bne	.L1126
-.L1233:
+	bne	.L1134
+.L1241:
 	ldr	r0, [r9, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
@@ -7918,14 +7987,14 @@ FtlRecoverySuperblock:
 	cmpeq	r1, r0
 	moveq	r2, r1
 	moveq	r1, r3
-	beq	.L1238
+	beq	.L1246
 	movw	r3, #65535
 	cmp	r8, r3
-	bne	.L1132
+	bne	.L1140
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1133
-.L1132:
+	bne	.L1141
+.L1140:
 	ldr	r3, [r6, #4004]
 	uxth	r7, r4
 	uxth	r4, r4
@@ -7933,15 +8002,15 @@ FtlRecoverySuperblock:
 	ldreq	r3, [fp, #-56]
 	streq	r3, [r6, #4004]
 	ldr	r3, [fp, #-64]
-	ldr	r6, .L1239
+	ldr	r6, .L1247
 	add	r3, r3, #7
 	cmp	r4, r3
 	subgt	r4, r7, #7
 	ldrle	r4, [fp, #-64]
 	uxthgt	r4, r4
-.L1136:
+.L1144:
 	cmp	r4, r7
-	bhi	.L1143
+	bhi	.L1151
 	mov	r3, #0
 	ldrh	r8, [r6, #32]
 	ldr	r0, [r6, #3832]
@@ -7949,32 +8018,32 @@ FtlRecoverySuperblock:
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
 	mov	ip, #20
-	b	.L1144
-.L1117:
+	b	.L1152
+.L1125:
 	ldr	r3, [fp, #-64]
 	cmp	r3, #0
-	beq	.L1119
+	beq	.L1127
 	movw	r2, #1755
-	ldr	r1, .L1239+4
-	ldr	r0, .L1239+8
-	bl	printk
-.L1119:
+	ldr	r1, .L1247+4
+	ldr	r0, .L1247+8
+	bl	sftl_printk
+.L1127:
 	ldr	r3, [fp, #-80]
 	cmp	r3, #0
 	cmpne	r6, r3
-	beq	.L1120
+	beq	.L1128
 	movw	r2, #1756
-	ldr	r1, .L1239+4
-	ldr	r0, .L1239+8
-	bl	printk
-.L1120:
+	ldr	r1, .L1247+4
+	ldr	r0, .L1247+8
+	bl	sftl_printk
+.L1128:
 	mov	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L1237
-.L1122:
+	b	.L1245
+.L1130:
 	ldrh	r3, [ip], #2
 	cmp	r3, r7
-	beq	.L1121
+	beq	.L1129
 	mla	r1, r8, r5, r0
 	orr	r3, r4, r3, lsl #10
 	str	r3, [r1, #4]
@@ -7996,45 +8065,45 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1121:
+.L1129:
 	add	r2, r2, #1
-	b	.L1118
-.L1128:
+	b	.L1126
+.L1136:
 	ldr	r2, [r7]
 	cmp	r2, #0
-	bne	.L1124
+	bne	.L1132
 	ldr	ip, [r7, #12]
 	ldr	r2, [ip, #4]
 	cmn	r2, #1
-	beq	.L1125
-	ldr	r1, .L1239
+	beq	.L1133
+	ldr	r1, .L1247
 	mov	r0, r2
 	str	ip, [fp, #-68]
 	ldr	r1, [r1, #2544]
 	bl	ftl_cmp_data_ver
 	ldr	ip, [fp, #-68]
 	cmp	r0, #0
-	ldrne	r1, .L1239
+	ldrne	r1, .L1247
 	addne	r2, r2, #1
 	strne	r2, [r1, #2544]
-.L1125:
+.L1133:
 	ldr	r2, [ip]
 	cmn	r2, #1
-	bne	.L1127
-.L1126:
+	bne	.L1135
+.L1134:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [fp, #-60]
 	mov	r2, #20
 	mla	r9, r2, r3, r9
-	b	.L1233
-.L1124:
+	b	.L1241
+.L1132:
 	ldr	r8, [fp, #-60]
-.L1127:
+.L1135:
 	add	r3, r3, #1
 	add	r7, r7, #20
-	b	.L1123
-.L1138:
+	b	.L1131
+.L1146:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
@@ -8043,10 +8112,10 @@ FtlRecoverySuperblock:
 	orrne	r2, r4, r2, lsl #10
 	uxthne	r5, r5
 	strne	r2, [r9, #4]
-.L1144:
+.L1152:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L1138
+	bhi	.L1146
 	mov	r1, r5
 	mov	r2, #0
 	bl	FlashReadPages
@@ -8054,38 +8123,38 @@ FtlRecoverySuperblock:
 	mov	r2, #20
 	movw	r1, #65535
 	mla	r5, r2, r5, r3
-.L1139:
+.L1147:
 	cmp	r5, r3
 	addeq	r4, r4, #1
 	uxtheq	r4, r4
-	beq	.L1136
-.L1142:
+	beq	.L1144
+.L1150:
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L1133
+	bne	.L1141
 	ldr	r2, [r3, #12]
 	ldrh	r0, [r2]
 	cmp	r0, r1
-	beq	.L1141
+	beq	.L1149
 	ldr	r2, [r2, #4]
 	cmn	r2, #1
 	strne	r2, [r6, #4004]
-.L1141:
+.L1149:
 	add	r3, r3, #20
-	b	.L1139
-.L1143:
+	b	.L1147
+.L1151:
 	mvn	r3, #0
 	str	r3, [r6, #4004]
-.L1133:
-	ldr	r1, .L1239
+.L1141:
+	ldr	r1, .L1247
 	mov	r2, #1
 	movw	r3, #4008
-	ldr	r4, .L1239
+	ldr	r4, .L1247
 	add	r0, r1, #3904
 	strh	r2, [r1, r3]	@ movhi
 	bl	FtlMapBlkWriteDump_data
 	ldr	r8, [fp, #-64]
-.L1145:
+.L1153:
 	ldrh	ip, [r4, #32]
 	mov	r3, #0
 	ldr	r0, [r4, #3832]
@@ -8093,42 +8162,42 @@ FtlRecoverySuperblock:
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
 	mov	r5, #20
-.L1146:
+.L1154:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1148
+	bhi	.L1156
 	mov	r2, #0
 	mov	r1, r9
 	bl	FlashReadPages
 	mov	r3, #0
-.L1236:
+.L1244:
 	str	r3, [fp, #-72]
 	ldrh	r3, [fp, #-72]
 	cmp	r9, r3
-	bhi	.L1176
+	bhi	.L1184
 	add	r8, r8, #1
 	ldrh	r3, [r4, #102]
 	uxth	r8, r8
 	cmp	r3, r8
-	bne	.L1145
+	bne	.L1153
 	ldrh	r2, [r4, #32]
 	movw	r0, #65535
 	mov	r3, #0
 	strh	r8, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
-.L1177:
+.L1185:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1232
+	bcs	.L1240
 	ldr	r1, [fp, #-76]
 	ldrh	ip, [r1], #2
 	cmp	ip, r0
 	str	r1, [fp, #-76]
 	add	r1, r3, #1
-	bne	.L1237
+	bne	.L1245
 	mov	r3, r1
-	b	.L1177
-.L1148:
+	b	.L1185
+.L1156:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
@@ -8137,8 +8206,8 @@ FtlRecoverySuperblock:
 	addne	r9, r9, #1
 	uxthne	r9, r9
 	strne	r2, [r6, #4]
-	b	.L1146
-.L1176:
+	b	.L1154
+.L1184:
 	ldr	r3, [fp, #-72]
 	mov	r6, #20
 	ldr	r2, [r4, #3832]
@@ -8151,7 +8220,7 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [fp, #-64]
 	cmp	r8, r3
-	bcc	.L1150
+	bcc	.L1158
 	ldr	r2, [fp, #-80]
 	moveq	r3, #1
 	movne	r3, #0
@@ -8159,34 +8228,34 @@ FtlRecoverySuperblock:
 	movls	r3, #0
 	andhi	r3, r3, #1
 	cmp	r3, #0
-	bne	.L1150
+	bne	.L1158
 	ldr	r3, [fp, #-60]
 	ldr	r2, [fp, #-68]
 	cmp	r8, r3
 	cmpeq	r2, r0
-	beq	.L1151
+	beq	.L1159
 	ldr	r2, [fp, #-84]
 	ldr	r3, [r2, r6]
 	cmn	r3, #1
-	beq	.L1152
+	beq	.L1160
 	ldr	r7, [r7, #12]
 	movw	r3, #61589
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	beq	.L1153
-.L1160:
+	beq	.L1161
+.L1168:
 	ldrh	r0, [r10]
-.L1235:
+.L1243:
 	bl	decrement_vpc_count
-.L1150:
+.L1158:
 	ldr	r3, [fp, #-72]
 	add	r3, r3, #1
-	b	.L1236
-.L1153:
+	b	.L1244
+.L1161:
 	ldr	r3, [r7, #4]
 	cmn	r3, #1
 	str	r3, [fp, #-56]
-	beq	.L1154
+	beq	.L1162
 	mov	r0, r3
 	ldr	r1, [r4, #2544]
 	bl	ftl_cmp_data_ver
@@ -8194,16 +8263,16 @@ FtlRecoverySuperblock:
 	ldrne	r3, [fp, #-56]
 	addne	r3, r3, #1
 	strne	r3, [r4, #2544]
-.L1154:
+.L1162:
 	ldrh	r2, [r7]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1155
+	beq	.L1163
 	movw	r2, #1905
-	ldr	r1, .L1239+4
-	ldr	r0, .L1239+8
-	bl	printk
-.L1155:
+	ldr	r1, .L1247+4
+	ldr	r0, .L1247+8
+	bl	sftl_printk
+.L1163:
 	ldr	r5, [r7, #8]
 	sub	r1, fp, #48
 	ldr	r3, [r7, #12]
@@ -8213,14 +8282,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	r1, [r4, #4004]
 	cmn	r1, #1
-	beq	.L1156
+	beq	.L1164
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1156
+	beq	.L1164
 	ldr	r2, [fp, #-52]
 	cmn	r2, #1
-	beq	.L1157
+	beq	.L1165
 	ldr	r0, [r4, #3832]
 	mov	r1, #1
 	add	r0, r0, r6
@@ -8232,123 +8301,123 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r6]
 	add	r3, r2, r6
 	cmn	r1, #1
-	bne	.L1158
-.L1159:
+	bne	.L1166
+.L1167:
 	mvn	r3, #0
 	ldrh	r0, [r10]
 	str	r3, [fp, #-52]
 	bl	decrement_vpc_count
-.L1167:
+.L1175:
 	ldr	r6, [fp, #-52]
 	cmn	r6, #1
-	beq	.L1150
-.L1180:
+	beq	.L1158
+.L1188:
 	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #40]
 	mov	r5, r0
 	cmp	r3, r0
-	bhi	.L1172
+	bhi	.L1180
 	movw	r2, #2006
-	ldr	r1, .L1239+4
-	ldr	r0, .L1239+8
-	bl	printk
-.L1172:
-	ldr	r3, .L1239
+	ldr	r1, .L1247+4
+	ldr	r0, .L1247+8
+	bl	sftl_printk
+.L1180:
+	ldr	r3, .L1247
 	ldr	r2, [r3, #2324]
 	lsl	r3, r5, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1173
+	beq	.L1181
 	mov	r0, r5
-	b	.L1235
-.L1157:
+	b	.L1243
+.L1165:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	bne	.L1160
+	bne	.L1168
 	mov	r2, #1
 	sub	r1, fp, #52
 	mov	r0, r5
 	bl	log2phys
-	b	.L1160
-.L1158:
+	b	.L1168
+.L1166:
 	ldr	r1, [r7, #8]
 	cmp	r5, r1
-	bne	.L1159
+	bne	.L1167
 	ldr	r1, [r7, #4]
 	ldr	r0, [r4, #4004]
 	str	r1, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1159
+	beq	.L1167
 	ldr	r1, [fp, #-48]
 	ldr	r0, [fp, #-44]
 	cmp	r1, r0
-	bne	.L1162
-.L1165:
+	bne	.L1170
+.L1173:
 	ldr	r1, [fp, #-52]
 	mov	r0, r5
 	bl	FtlReUsePrevPpa
-	b	.L1159
-.L1162:
+	b	.L1167
+.L1170:
 	ldr	r0, [fp, #-52]
 	cmp	r1, r0
-	beq	.L1159
+	beq	.L1167
 	cmn	r1, #1
 	streq	r1, [r2, r6]
-	beq	.L1164
+	beq	.L1172
 	str	r1, [r3, #4]
 	mov	r2, #0
 	mov	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1164:
+.L1172:
 	ldr	r2, [r4, #3832]
 	ldr	r2, [r2, r6]
 	cmn	r2, #1
-	beq	.L1165
+	beq	.L1173
 	ldr	r3, [r7, #4]
 	ldr	r0, [r4, #4004]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1165
+	beq	.L1173
 	mov	r1, r3
 	ldr	r0, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1159
-	b	.L1165
-.L1156:
+	beq	.L1167
+	b	.L1173
+.L1164:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	beq	.L1167
+	beq	.L1175
 	mov	r2, #1
 	sub	r1, fp, #44
 	mov	r0, r5
 	bl	log2phys
 	ldr	r6, [fp, #-48]
 	cmn	r6, #1
-	beq	.L1167
+	beq	.L1175
 	ldr	r3, [fp, #-52]
 	cmp	r6, r3
-	beq	.L1180
+	beq	.L1188
 	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1239+12
+	ldr	r3, .L1247+12
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	beq	.L1171
+	beq	.L1179
 	ldrh	r2, [r3, #48]
 	cmp	r2, r0
-	beq	.L1171
+	beq	.L1179
 	ldrh	r3, [r3, #96]
 	cmp	r3, r0
-	bne	.L1167
-.L1171:
+	bne	.L1175
+.L1179:
 	ldr	r0, [r4, #3832]
 	mov	r2, #0
 	mov	r1, #1
@@ -8358,23 +8427,23 @@ FtlRecoverySuperblock:
 	ldr	r3, [r4, #3832]
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L1167
+	beq	.L1175
 	ldr	r1, [r7, #4]
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1167
+	bne	.L1175
 	mov	r2, #1
 	sub	r1, fp, #48
 	mov	r0, r5
 	bl	log2phys
-	b	.L1167
-.L1173:
+	b	.L1175
+.L1181:
 	mov	r1, r5
-	ldr	r0, .L1239+16
-	bl	printk
-	b	.L1150
-.L1152:
+	ldr	r0, .L1247+16
+	bl	sftl_printk
+	b	.L1158
+.L1160:
 	ldr	r3, [r4, #4012]
 	cmp	r3, #31
 	addls	r2, r4, r3, lsl #2
@@ -8386,33 +8455,33 @@ FtlRecoverySuperblock:
 	ldr	r3, [r4, #4004]
 	cmn	r3, #1
 	ldreq	r3, [fp, #-56]
-	beq	.L1234
+	beq	.L1242
 	ldr	r2, [fp, #-56]
 	cmp	r2, r3
-	bcs	.L1150
+	bcs	.L1158
 	mov	r3, r2
-.L1234:
+.L1242:
 	str	r3, [r4, #4004]
-	b	.L1150
-.L1151:
+	b	.L1158
+.L1159:
 	ldrb	r3, [fp, #-68]	@ zero_extendqisi2
 	ldr	r2, [fp, #-68]
 	ldr	r1, [fp, #-60]
 	strb	r3, [r10, #6]
 	ldrh	r3, [fp, #-60]
 	strh	r3, [r10, #2]	@ movhi
-.L1238:
+.L1246:
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L1232
-.L1240:
+	b	.L1240
+.L1248:
 	.align	2
-.L1239:
+.L1247:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
 	.word	.LANCHOR0+2348
-	.word	.LC99
+	.word	.LC103
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -8430,7 +8499,7 @@ FtlSuperblockPowerLostFix:
 	mvn	r3, #0
 	str	r3, [fp, #-36]
 	mov	r7, #0
-	ldr	r3, .L1252
+	ldr	r3, .L1260
 	movw	r1, #61589
 	mov	r4, r0
 	mov	r6, #7
@@ -8448,16 +8517,16 @@ FtlSuperblockPowerLostFix:
 	strh	r2, [r5, #2]	@ movhi
 	ldr	r2, [r3, #3280]
 	str	r1, [r2]
-	ldr	r1, .L1252+4
+	ldr	r1, .L1260+4
 	ldr	r2, [r3, #3280]
 	str	r1, [r2, #4]
-.L1242:
+.L1250:
 	subs	r6, r6, #1
-	beq	.L1244
+	beq	.L1252
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1243
-.L1244:
+	bne	.L1251
+.L1252:
 	ldrh	r3, [r4]
 	ldr	r1, [r8, #2324]
 	ldrh	r0, [r4, #4]
@@ -8472,12 +8541,12 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1243:
+.L1251:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	cmn	r0, #1
 	str	r0, [fp, #-48]
-	beq	.L1244
+	beq	.L1252
 	ldr	r3, [r8, #2544]
 	mov	r1, #1
 	sub	r0, fp, #52
@@ -8491,10 +8560,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1242
-.L1253:
+	b	.L1250
+.L1261:
 	.align	2
-.L1252:
+.L1260:
 	.word	.LANCHOR0
 	.word	305419896
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8510,8 +8579,8 @@ FtlLoadBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1286
-	ldr	r7, .L1286+4
+	ldr	r4, .L1294
+	ldr	r7, .L1294+4
 	ldr	r3, [r4, #3280]
 	ldr	r6, [r4, #3284]
 	str	r3, [r4, #3268]
@@ -8520,11 +8589,11 @@ FtlLoadBbt:
 	ldrh	r5, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1255:
+.L1263:
 	ldrh	r3, [r4, #98]
 	sub	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1258
+	ble	.L1266
 	lsl	r3, r5, #10
 	mov	r2, #1
 	mov	r1, r2
@@ -8533,7 +8602,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	bne	.L1256
+	bne	.L1264
 	ldr	r3, [r4, #3264]
 	mov	r2, #1
 	mov	r1, r2
@@ -8541,40 +8610,40 @@ FtlLoadBbt:
 	add	r3, r3, #1
 	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.L1256:
+.L1264:
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1257
+	beq	.L1265
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1257
+	bne	.L1265
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1258:
+.L1266:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1272
+	beq	.L1280
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1262
+	beq	.L1270
 	lsl	r3, r3, #10
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1286+4
+	ldr	r0, .L1294+4
 	str	r3, [r4, #3264]
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1262
+	beq	.L1270
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1262
+	bne	.L1270
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
@@ -8583,52 +8652,52 @@ FtlLoadBbt:
 	ldrhhi	r3, [r6, #8]
 	strhhi	r2, [r4, #152]	@ movhi
 	strhhi	r3, [r4, #156]	@ movhi
-.L1262:
-	ldr	r7, .L1286+4
+.L1270:
+	ldr	r7, .L1294+4
 	mov	r1, #1
 	ldrh	r0, [r4, #152]
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1264:
+.L1272:
 	cmp	r5, #0
-	bge	.L1267
+	bge	.L1275
 	mov	r2, #254
-	ldr	r1, .L1286+8
-	ldr	r0, .L1286+12
-	bl	printk
-.L1266:
+	ldr	r1, .L1294+8
+	ldr	r0, .L1294+12
+	bl	sftl_printk
+.L1274:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1269
+	beq	.L1277
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1269
+	beq	.L1277
 	ldrh	r3, [r4, #42]
 	lsr	r3, r3, #2
 	cmp	r0, r3
 	cmpcc	r2, r3
-	bcs	.L1269
+	bcs	.L1277
 	bl	FtlSysBlkNumInit
-.L1269:
-	ldr	r6, .L1286+16
+.L1277:
+	ldr	r6, .L1294+16
 	mov	r5, #0
-	ldr	r7, .L1286+20
-.L1270:
+	ldr	r7, .L1294+20
+.L1278:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1271
+	bcc	.L1279
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1257:
+.L1265:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1255
-.L1267:
+	b	.L1263
+.L1275:
 	ldrh	r3, [r4, #152]
 	mov	r2, #1
 	mov	r1, r2
@@ -8640,16 +8709,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1265
+	beq	.L1273
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1266
-.L1265:
+	beq	.L1274
+.L1273:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1264
-.L1271:
+	b	.L1272
+.L1279:
 	ldrh	r2, [r7]
 	ldr	r1, [r4, #3268]
 	ldr	r0, [r6, #4]!
@@ -8657,13 +8726,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	add	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1270
-.L1272:
+	b	.L1278
+.L1280:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1287:
+.L1295:
 	.align	2
-.L1286:
+.L1294:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+443
@@ -8685,47 +8754,47 @@ FtlMakeBbt:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r7, #0
-	ldr	r8, .L1307
+	ldr	r8, .L1315
 	bl	FtlBbtMemInit
 	bl	FtlLoadFactoryBbt
 	sub	r5, r8, #180
 	sub	r9, r8, #18
 	mov	r4, r5
-.L1289:
+.L1297:
 	ldrh	r3, [r5, #54]
 	cmp	r7, r3
-	bcc	.L1295
+	bcc	.L1303
 	mov	r0, #0
-.L1296:
+.L1304:
 	ldrh	r2, [r4, #114]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1297
+	bhi	.L1305
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1298:
+.L1306:
 	ldrh	r3, [r4, #164]
 	sub	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1302
+	ble	.L1310
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1299
+	beq	.L1307
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1300
+	beq	.L1308
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1299:
+.L1307:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1298
-.L1295:
+	b	.L1306
+.L1303:
 	ldrh	r3, [r9, #2]!
 	movw	r2, #65535
 	ldr	r0, [r5, #3280]
@@ -8733,11 +8802,11 @@ FtlMakeBbt:
 	cmp	r3, r2
 	str	r0, [r5, #3268]
 	str	r10, [r5, #3272]
-	beq	.L1290
+	beq	.L1298
 	ldrh	ip, [r5, #98]
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1307+4
+	ldr	r0, .L1315+4
 	mla	ip, r7, ip, r3
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
@@ -8750,29 +8819,29 @@ FtlMakeBbt:
 	asr	r2, r2, #3
 	bl	ftl_memcpy
 	ldr	ip, [fp, #-44]
-.L1291:
+.L1299:
 	uxth	r0, ip
 	add	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1289
-.L1290:
+	b	.L1297
+.L1298:
 	mov	r1, r7
 	bl	FlashGetBadBlockList
 	ldr	r1, [r8]
 	ldr	r0, [r5, #3268]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1293:
+.L1301:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1292:
+.L1300:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r7, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1293
+	beq	.L1301
 	mov	r1, #16
 	ldr	r0, [r4, #3284]
 	strh	r6, [r9]	@ movhi
@@ -8780,7 +8849,7 @@ FtlMakeBbt:
 	mov	r1, #4096
 	ldr	r0, [r4, #3280]
 	bl	__memzero
-	ldr	r3, .L1307+8
+	ldr	r3, .L1315+8
 	strh	r3, [r10]	@ movhi
 	mov	r3, #0
 	str	r3, [r10, #4]
@@ -8794,39 +8863,39 @@ FtlMakeBbt:
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
 	str	r3, [r4, #3264]
-	ldr	r3, .L1307+12
+	ldr	r3, .L1315+12
 	ldrh	r2, [r3]
 	lsl	r2, r2, #2
 	bl	ftl_memcpy
 	mov	r2, #1
-	ldr	r0, .L1307+4
+	ldr	r0, .L1315+4
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	mov	r3, #1
-	ldr	r0, .L1307+4
+	ldr	r0, .L1315+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [r4, #3260]
 	ldr	ip, [fp, #-44]
 	cmn	r3, #1
-	bne	.L1291
+	bne	.L1299
 	uxth	r0, ip
 	bl	FtlBbmMapBadBlock
-	b	.L1292
-.L1297:
+	b	.L1300
+.L1305:
 	uxth	r0, r0
 	bl	FtlBbmMapBadBlock
 	mov	r0, r5
-	b	.L1296
-.L1300:
+	b	.L1304
+.L1308:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
 	strheq	r5, [r4, #152]	@ movhi
-	beq	.L1299
-.L1301:
+	beq	.L1307
+.L1309:
 	strh	r5, [r4, #156]	@ movhi
-.L1302:
+.L1310:
 	ldrh	r3, [r4, #152]
 	mov	r5, #0
 	ldr	r0, [r4, #3800]
@@ -8856,9 +8925,9 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1308:
+.L1316:
 	.align	2
-.L1307:
+.L1315:
 	.word	.LANCHOR0+180
 	.word	.LANCHOR0+3260
 	.word	-3872
@@ -8878,26 +8947,26 @@ FtlVendorPartWrite:
 	sub	fp, ip, #4
 	sub	sp, sp, #100
 	mov	r7, r0
-	ldr	r4, .L1318
+	ldr	r4, .L1326
 	mov	r5, r1
 	str	r2, [fp, #-128]
 	add	r2, r0, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
 	mvnhi	r8, #0
-	bhi	.L1309
+	bhi	.L1317
 	ldrh	r6, [r4, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
 	lsl	r10, r6, #2
-.L1311:
+.L1319:
 	cmp	r5, #0
-	bne	.L1316
-.L1309:
+	bne	.L1324
+.L1317:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1316:
+.L1324:
 	ldr	r3, [r4, #3884]
 	mov	r0, r7
 	ldrh	r2, [r4, #58]
@@ -8917,7 +8986,7 @@ FtlVendorPartWrite:
 	cmpne	r9, r2
 	movne	r1, #1
 	moveq	r1, #0
-	beq	.L1313
+	beq	.L1321
 	ldr	r2, [r4, #3848]
 	sub	r0, fp, #124
 	str	ip, [fp, #-120]
@@ -8927,7 +8996,7 @@ FtlVendorPartWrite:
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.L1314:
+.L1322:
 	ldr	r3, [fp, #-132]
 	lsl	ip, r9, #9
 	ldr	r0, [r4, #3848]
@@ -8941,7 +9010,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	mov	r1, r6
 	ldr	r2, [r4, #3848]
-	ldr	r0, .L1318+4
+	ldr	r0, .L1326+4
 	add	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [fp, #-128]
@@ -8950,15 +9019,15 @@ FtlVendorPartWrite:
 	mvneq	r8, #0
 	add	r3, r3, ip
 	str	r3, [fp, #-128]
-	b	.L1311
-.L1313:
+	b	.L1319
+.L1321:
 	ldrh	r2, [r4, #110]
 	ldr	r0, [r4, #3848]
 	bl	ftl_memset
-	b	.L1314
-.L1319:
+	b	.L1322
+.L1327:
 	.align	2
-.L1318:
+.L1326:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3948
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -8974,12 +9043,12 @@ Ftl_save_ext_data:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1322
-	ldr	r2, .L1322+4
+	ldr	r3, .L1330
+	ldr	r2, .L1330+4
 	ldr	r1, [r3, #2636]
 	cmp	r1, r2
 	ldmfdne	sp, {fp, sp, pc}
-	ldr	r2, .L1322+8
+	ldr	r2, .L1330+8
 	mov	r1, #1
 	mov	r0, #0
 	str	r2, [r3, #2640]
@@ -9007,12 +9076,12 @@ Ftl_save_ext_data:
 	str	r2, [r3, #2680]
 	ldr	r2, [r3, #2568]
 	str	r2, [r3, #2684]
-	ldr	r2, .L1322+12
+	ldr	r2, .L1330+12
 	bl	FtlVendorPartWrite
 	ldmfd	sp, {fp, sp, pc}
-.L1323:
+.L1331:
 	.align	2
-.L1322:
+.L1330:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
@@ -9030,7 +9099,7 @@ FtlEctTblFlush:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1329
+	ldr	r2, .L1337
 	ldrh	r3, [r2, #-8]
 	cmp	r3, #31
 	addls	r3, r3, #1
@@ -9038,20 +9107,20 @@ FtlEctTblFlush:
 	strhls	r3, [r2, #-8]	@ movhi
 	movls	r2, #1
 	cmp	r0, #0
-	ldr	r3, .L1329+4
-	bne	.L1326
+	ldr	r3, .L1337+4
+	bne	.L1334
 	ldr	r1, [r3, #3860]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
 	cmp	r1, r2
-	bcc	.L1327
-.L1326:
+	bcc	.L1335
+.L1334:
 	ldr	r2, [r3, #3860]
 	mov	r0, #64
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	ldr	r1, .L1329+8
+	ldr	r1, .L1337+8
 	str	r1, [r2]
 	movw	r1, #3852
 	ldrh	r1, [r3, r1]
@@ -9065,12 +9134,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1327:
+.L1335:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1330:
+.L1338:
 	.align	2
-.L1329:
+.L1337:
 	.word	.LANCHOR3-4032
 	.word	.LANCHOR0
 	.word	1112818501
@@ -9089,26 +9158,26 @@ FtlVendorPartRead:
 	sub	fp, ip, #4
 	sub	sp, sp, #92
 	mov	r9, r2
-	ldr	r5, .L1340
+	ldr	r5, .L1348
 	mov	r7, r1
 	add	r1, r0, r1
 	mov	r10, r0
 	ldrh	r2, [r5, #96]
 	cmp	r1, r2
 	mvnhi	r8, #0
-	bhi	.L1331
+	bhi	.L1339
 	ldrh	r6, [r5, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
 	lsl	r6, r6, #2
-.L1333:
+.L1341:
 	cmp	r7, #0
-	bne	.L1338
-.L1331:
+	bne	.L1346
+.L1339:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1338:
+.L1346:
 	ldr	r2, [r5, #3884]
 	mov	r0, r10
 	ldrh	r4, [r5, #58]
@@ -9125,7 +9194,7 @@ FtlVendorPartRead:
 	cmp	ip, #0
 	lsl	r3, r4, #9
 	str	r3, [fp, #-128]
-	beq	.L1335
+	beq	.L1343
 	ldr	r2, [r5, #3848]
 	sub	r3, fp, #104
 	sub	r0, fp, #124
@@ -9144,22 +9213,22 @@ FtlVendorPartRead:
 	lsl	r2, r4, #9
 	mvneq	r8, #0
 	bl	ftl_memcpy
-.L1337:
+.L1345:
 	ldr	r3, [fp, #-128]
 	sub	r7, r7, r4
 	add	r10, r10, r4
 	add	r6, r6, #4
 	add	r9, r9, r3
-	b	.L1333
-.L1335:
+	b	.L1341
+.L1343:
 	lsl	r2, r4, #9
 	mov	r1, ip
 	mov	r0, r9
 	bl	ftl_memset
-	b	.L1337
-.L1341:
+	b	.L1345
+.L1349:
 	.align	2
-.L1340:
+.L1348:
 	.word	.LANCHOR0
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
@@ -9174,7 +9243,7 @@ FtlLoadEctTbl:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1344
+	ldr	r4, .L1352
 	movw	r5, #3852
 	mov	r0, #64
 	ldr	r2, [r4, #3860]
@@ -9182,26 +9251,26 @@ FtlLoadEctTbl:
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #3860]
 	ldr	r2, [r3]
-	ldr	r3, .L1344+4
+	ldr	r3, .L1352+4
 	cmp	r2, r3
-	beq	.L1343
-	ldr	r1, .L1344+8
-	ldr	r0, .L1344+12
-	bl	printk
+	beq	.L1351
+	ldr	r1, .L1352+8
+	ldr	r0, .L1352+12
+	bl	sftl_printk
 	ldrh	r2, [r4, r5]
 	mov	r1, #0
 	ldr	r0, [r4, #3860]
 	lsl	r2, r2, #9
 	bl	ftl_memset
-.L1343:
+.L1351:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1345:
+.L1353:
 	.align	2
-.L1344:
+.L1352:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC100
+	.word	.LC104
 	.word	.LC71
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.align	2
@@ -9216,23 +9285,23 @@ Ftl_load_ext_data:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1349
+	ldr	r4, .L1357
 	mov	r1, #1
 	mov	r0, #0
-	ldr	r2, .L1349+4
+	ldr	r2, .L1357+4
 	bl	FtlVendorPartRead
-	ldr	r5, .L1349+8
+	ldr	r5, .L1357+8
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1347
+	beq	.L1355
 	mov	r1, #512
-	ldr	r0, .L1349+4
+	ldr	r0, .L1357+4
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1347:
+.L1355:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1348
+	bne	.L1356
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9257,7 +9326,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1348:
+.L1356:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9266,9 +9335,9 @@ Ftl_load_ext_data:
 	bl	__udivsi3
 	str	r0, [r4, #2556]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1350:
+.L1358:
 	.align	2
-.L1349:
+.L1357:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2636
 	.word	1179929683
@@ -9285,10 +9354,10 @@ FtlVpcTblFlush:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1363
+	ldr	r4, .L1371
 	mov	r6, #0
 	mov	r1, #255
-	ldr	r10, .L1363+4
+	ldr	r10, .L1371+4
 	ldr	r3, [r4, #3280]
 	add	r5, r4, #2576
 	ldr	r7, [r4, #3284]
@@ -9299,15 +9368,15 @@ FtlVpcTblFlush:
 	str	r7, [r4, #3272]
 	str	r6, [r7, #12]
 	strh	r3, [r7, #2]	@ movhi
-	ldr	r3, .L1363+8
+	ldr	r3, .L1371+8
 	strh	r3, [r7]	@ movhi
 	ldr	r3, [r4, #2584]
 	str	r6, [r7, #8]
 	ldrh	r2, [r5, #-226]
 	str	r3, [r7, #4]
-	ldr	r3, .L1363+12
+	ldr	r3, .L1371+12
 	str	r3, [r4, #2268]
-	ldr	r3, .L1363+16
+	ldr	r3, .L1371+16
 	str	r3, [r4, #2272]
 	ldrh	r3, [r5, #6]
 	strh	r3, [r8, #8]	@ movhi
@@ -9371,7 +9440,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.L1352:
+.L1360:
 	ldr	r3, [r4, #3280]
 	mov	r0, r9
 	ldrh	r2, [r5]
@@ -9389,7 +9458,7 @@ FtlVpcTblFlush:
 	ldrh	r2, [r5, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1353
+	blt	.L1361
 	ldrh	r3, [r5]
 	ldrh	r8, [r5, #4]
 	strh	r3, [r5, #4]	@ movhi
@@ -9410,21 +9479,21 @@ FtlVpcTblFlush:
 	mov	r1, r3
 	mov	r0, r9
 	bl	FlashProgPages
-.L1353:
+.L1361:
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r4, #3260]
 	add	r3, r3, #1
 	uxth	r3, r3
 	cmn	r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1354
+	bne	.L1362
 	cmp	r3, #1
-	bne	.L1355
+	bne	.L1363
 	movw	r2, #1124
 	mov	r1, r10
-	ldr	r0, .L1363+20
-	bl	printk
-.L1355:
+	ldr	r0, .L1371+20
+	bl	sftl_printk
+.L1363:
 	ldrh	r3, [r5, #2]
 	add	r6, r6, #1
 	uxth	r6, r6
@@ -9433,35 +9502,35 @@ FtlVpcTblFlush:
 	subeq	r3, r3, #1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1352
+	bls	.L1360
 	mov	r2, r6
 	ldr	r1, [r4, #3264]
-	ldr	r0, .L1363+24
-	bl	printk
-.L1358:
-	b	.L1358
-.L1354:
+	ldr	r0, .L1371+24
+	bl	sftl_printk
+.L1366:
+	b	.L1366
+.L1362:
 	cmp	r3, #1
-	beq	.L1352
+	beq	.L1360
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1359
+	beq	.L1367
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.L1359:
+.L1367:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1364:
+.L1372:
 	.align	2
-.L1363:
+.L1371:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+454
 	.word	-3932
 	.word	1179929683
 	.word	1342177348
 	.word	.LC1
-	.word	.LC101
+	.word	.LC105
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -9477,36 +9546,36 @@ FtlVpcCheckAndModify:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r5, #0
-	ldr	r4, .L1377
-	ldr	r1, .L1377+4
-	ldr	r0, .L1377+8
-	bl	printk
+	ldr	r4, .L1385
+	ldr	r1, .L1385+4
+	ldr	r0, .L1385+8
+	bl	sftl_printk
 	ldrh	r2, [r4, #42]
 	mov	r1, #0
 	ldr	r0, [r4, #3864]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.L1366:
+.L1374:
 	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1368
-	ldr	r9, .L1377+12
+	bcc	.L1376
+	ldr	r9, .L1385+12
 	mov	r6, #0
-	ldr	r10, .L1377+16
-.L1369:
+	ldr	r10, .L1385+16
+.L1377:
 	ldrh	r3, [r4, #40]
 	uxth	r5, r6
 	cmp	r3, r5
-	bhi	.L1373
+	bhi	.L1381
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1368:
+.L1376:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r5
 	bl	log2phys
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L1367
+	beq	.L1375
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r4, #3864]
@@ -9514,10 +9583,10 @@ FtlVpcCheckAndModify:
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L1367:
+.L1375:
 	add	r5, r5, #1
-	b	.L1366
-.L1373:
+	b	.L1374
+.L1381:
 	uxth	r8, r6
 	ldr	r3, [r4, #2324]
 	movw	r1, #65535
@@ -9527,20 +9596,20 @@ FtlVpcCheckAndModify:
 	ldrh	r3, [r3, r7]
 	cmp	r2, r1
 	cmpne	r2, r3
-	beq	.L1371
+	beq	.L1379
 	mov	r1, r8
 	mov	r0, r9
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r10]
 	cmp	r3, r5
-	beq	.L1371
-	ldr	r3, .L1377+20
+	beq	.L1379
+	ldr	r3, .L1385+20
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1371
+	beq	.L1379
 	ldrh	r3, [r3, #-48]
 	cmp	r3, r5
-	beq	.L1371
+	beq	.L1379
 	ldr	r3, [r4, #3864]
 	mov	r0, r8
 	ldrh	r2, [r3, r7]
@@ -9549,16 +9618,16 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1371:
+.L1379:
 	add	r6, r6, #1
-	b	.L1369
-.L1378:
+	b	.L1377
+.L1386:
 	.align	2
-.L1377:
+.L1385:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC91
-	.word	.LC102
+	.word	.LC95
+	.word	.LC106
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0+2444
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -9574,49 +9643,49 @@ allocate_new_data_superblock:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1389
+	ldr	r4, .L1397
 	mov	r6, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bcs	.L1380
+	bcs	.L1388
 	movw	r2, #2681
-	ldr	r1, .L1389+4
-	ldr	r0, .L1389+8
-	bl	printk
-.L1380:
+	ldr	r1, .L1397+4
+	ldr	r0, .L1397+8
+	bl	sftl_printk
+.L1388:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1381
+	beq	.L1389
 	ldr	r2, [r4, #2324]
 	lsl	r3, r5, #1
 	mov	r0, r5
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1382
+	beq	.L1390
 	bl	INSERT_DATA_LIST
-.L1381:
+.L1389:
 	mov	r3, #1
 	strb	r3, [r6, #8]
 	movw	r3, #3992
 	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1383
+	beq	.L1391
 	cmp	r5, r0
-	bne	.L1384
+	bne	.L1392
 	ldr	r2, [r4, #2324]
 	lsl	r3, r0, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1385
-.L1384:
+	beq	.L1393
+.L1392:
 	bl	update_vpc_list
-.L1385:
+.L1393:
 	mvn	r2, #0
 	movw	r3, #3992
 	strh	r2, [r4, r3]	@ movhi
-.L1383:
+.L1391:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9625,12 +9694,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1382:
-	bl	INSERT_FREE_LIST
-	b	.L1381
 .L1390:
+	bl	INSERT_FREE_LIST
+	b	.L1389
+.L1398:
 	.align	2
-.L1389:
+.L1397:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -9649,26 +9718,26 @@ FtlProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r7, #0
-	ldr	r6, .L1405
+	ldr	r6, .L1413
 	mov	r4, r3
-	ldr	r10, .L1405+4
+	ldr	r10, .L1413+4
 	mov	r2, #0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r5, r0
 	mov	r9, r1
 	bl	FlashProgPages
-.L1392:
+.L1400:
 	cmp	r7, r9
-	beq	.L1399
+	beq	.L1407
 	mov	r8, #0
-	b	.L1400
-.L1395:
+	b	.L1408
+.L1403:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1393
+	bne	.L1401
 	ldr	r1, [r6, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r4, #4]
@@ -9679,13 +9748,13 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1393:
+.L1401:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1394
+	bne	.L1402
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1394:
+.L1402:
 	ldr	r3, [r6, #2732]
 	add	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -9701,19 +9770,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1400:
+.L1408:
 	ldr	r3, [r5]
 	cmn	r3, #1
-	beq	.L1395
+	beq	.L1403
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1396
+	bcc	.L1404
 	movw	r2, #933
 	mov	r1, r10
-	ldr	r0, .L1405+8
-	bl	printk
-.L1396:
+	ldr	r0, .L1413+8
+	bl	sftl_printk
+.L1404:
 	ldr	r3, [r5, #4]
 	sub	r1, fp, #40
 	mov	r2, #1
@@ -9728,41 +9797,41 @@ FtlProgPages:
 	ldr	r3, [fp, #-48]
 	mov	r8, r0
 	cmn	r3, #1
-	beq	.L1397
+	beq	.L1405
 	ldr	r2, [r6, #2324]
 	lsl	r3, r0, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	bne	.L1398
+	bne	.L1406
 	mov	r1, r0
-	ldr	r0, .L1405+12
-	bl	printk
-.L1398:
+	ldr	r0, .L1413+12
+	bl	sftl_printk
+.L1406:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1397:
+.L1405:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L1392
-.L1399:
+	b	.L1400
+.L1407:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1391
+	bcc	.L1399
 	mov	r2, #948
-	ldr	r1, .L1405+4
-	ldr	r0, .L1405+8
-	bl	printk
-.L1391:
+	ldr	r1, .L1413+4
+	ldr	r0, .L1413+8
+	bl	sftl_printk
+.L1399:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1406:
+.L1414:
 	.align	2
-.L1405:
+.L1413:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+519
 	.word	.LC1
-	.word	.LC103
+	.word	.LC107
 	.size	FtlProgPages, .-FtlProgPages
 	.align	2
 	.global	FtlCacheWriteBack
@@ -9776,23 +9845,23 @@ FtlCacheWriteBack:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1412
+	ldr	r4, .L1420
 	ldr	r0, [r4, #3988]
 	cmp	r0, #0
-	beq	.L1408
-	ldr	r3, .L1412+4
+	beq	.L1416
+	ldr	r3, .L1420+4
 	mov	r2, #0
 	mov	r1, #1
 	ldr	r3, [r3, #-4036]
 	bl	FtlProgPages
 	mov	r3, #0
 	str	r3, [r4, #3988]
-.L1408:
+.L1416:
 	mov	r0, #0
 	ldmfd	sp, {r4, fp, sp, pc}
-.L1413:
+.L1421:
 	.align	2
-.L1412:
+.L1420:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -9828,17 +9897,17 @@ sftl_deinit:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1417
+	ldr	r3, .L1425
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1416
+	bne	.L1424
 	bl	FtlSysFlush
-.L1416:
+.L1424:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1418:
+.L1426:
 	.align	2
-.L1417:
+.L1425:
 	.word	.LANCHOR2
 	.size	sftl_deinit, .-sftl_deinit
 	.align	2
@@ -9855,21 +9924,21 @@ FtlDiscard:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	add	r2, r0, r1
-	ldr	r6, .L1434
+	ldr	r6, .L1442
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r6, #140]
 	cmp	r2, r3
 	mvnhi	r0, #0
-	bhi	.L1419
+	bhi	.L1427
 	cmp	r1, #31
-	bhi	.L1421
-.L1426:
+	bhi	.L1429
+.L1434:
 	mov	r0, #0
-.L1419:
+.L1427:
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1421:
+.L1429:
 	bl	FtlCacheWriteBack
 	ldrh	r4, [r6, #58]
 	mov	r0, r7
@@ -9880,38 +9949,38 @@ FtlDiscard:
 	sub	r7, r7, r3
 	uxth	r7, r7
 	cmp	r7, #0
-	beq	.L1422
+	beq	.L1430
 	sub	r4, r4, r7
 	add	r8, r0, #1
 	cmp	r4, r5
 	movcs	r4, r5
 	uxth	r4, r4
 	sub	r5, r5, r4
-.L1422:
-	ldr	r4, .L1434+4
+.L1430:
+	ldr	r4, .L1442+4
 	mvn	r3, #0
 	str	r3, [fp, #-36]
-.L1423:
+.L1431:
 	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1425
-	ldr	r3, .L1434+4
+	bcs	.L1433
+	ldr	r3, .L1442+4
 	ldr	r2, [r3, #-4032]
 	cmp	r2, #32
-	bls	.L1426
+	bls	.L1434
 	mov	r4, #0
 	str	r4, [r3, #-4032]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1426
-.L1425:
+	b	.L1434
+.L1433:
 	mov	r2, #0
 	sub	r1, fp, #40
 	mov	r0, r8
 	bl	log2phys
 	ldr	r3, [fp, #-40]
 	cmn	r3, #1
-	beq	.L1424
+	beq	.L1432
 	ldr	r3, [r4, #-4032]
 	mov	r2, #1
 	sub	r1, fp, #36
@@ -9926,14 +9995,14 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1424:
+.L1432:
 	ldrh	r3, [r6, #58]
 	add	r8, r8, #1
 	sub	r5, r5, r3
-	b	.L1423
-.L1435:
+	b	.L1431
+.L1443:
 	.align	2
-.L1434:
+.L1442:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.size	FtlDiscard, .-FtlDiscard
@@ -9951,51 +10020,51 @@ FtlGcFreeTempBlock:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	movw	r3, #2444
-	ldr	r4, .L1462
+	ldr	r4, .L1470
 	movw	r2, #65535
 	ldrh	r5, [r4, r3]
 	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1437
-.L1447:
+	bne	.L1445
+.L1455:
 	mov	r3, #0
 	str	r3, [r4, #4000]
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1460
-.L1438:
+	bne	.L1468
+.L1446:
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1437:
+.L1445:
 	cmp	r0, #0
-	beq	.L1440
-	ldr	r3, .L1462+4
+	beq	.L1448
+	ldr	r3, .L1470+4
 	ldrh	r0, [r3, #4]
 	cmp	r0, r2
-	beq	.L1441
-.L1442:
+	beq	.L1449
+.L1450:
 	mov	r1, #2
-.L1440:
-	ldr	r0, .L1462+8
+.L1448:
+	ldr	r0, .L1470+8
 	bl	FtlGcScanTempBlk
 	cmn	r0, #1
 	str	r0, [fp, #-44]
-	beq	.L1443
+	beq	.L1451
 	ldr	r2, [r4, #2328]
 	lsl	r5, r5, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #4
-	bls	.L1444
+	bls	.L1452
 	sub	r3, r3, #5
 	mov	r0, #1
 	strh	r3, [r2, r5]	@ movhi
 	bl	FtlEctTblFlush
-.L1444:
+.L1452:
 	ldr	r3, [r4, #4000]
 	cmp	r3, #0
-	bne	.L1445
+	bne	.L1453
 	ldr	r3, [r4, #2732]
 	ldr	r0, [fp, #-44]
 	add	r3, r3, #1
@@ -10003,48 +10072,48 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1445:
+.L1453:
 	mov	r3, #0
 	str	r3, [r4, #4000]
-.L1456:
+.L1464:
 	mov	r0, #1
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1441:
+.L1449:
 	mov	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #17
-	bhi	.L1442
-	b	.L1440
-.L1443:
-	ldr	r3, .L1462+4
+	bhi	.L1450
+	b	.L1448
+.L1451:
+	ldr	r3, .L1470+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1456
-	b	.L1447
-.L1460:
+	bne	.L1464
+	b	.L1455
+.L1468:
 	bl	FtlCacheWriteBack
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
-	ldr	r6, .L1462+12
+	ldr	r6, .L1470+12
 	mul	r3, r3, r1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	beq	.L1448
+	beq	.L1456
 	mov	r2, #162
-	ldr	r1, .L1462+16
-	ldr	r0, .L1462+20
-	bl	printk
-.L1448:
+	ldr	r1, .L1470+16
+	ldr	r0, .L1470+20
+	bl	sftl_printk
+.L1456:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	movw	r3, #2444
 	ldrh	r0, [r4, #102]
 	mov	r5, #0
 	ldrh	r3, [r4, r3]
 	ldr	r1, [r4, #2324]
-	ldr	r10, .L1462+20
+	ldr	r10, .L1470+20
 	smulbb	r2, r2, r0
 	lsl	r3, r3, #1
 	strh	r2, [r1, r3]	@ movhi
@@ -10052,11 +10121,11 @@ FtlGcFreeTempBlock:
 	ldrh	r3, [r6]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1449:
+.L1457:
 	ldrh	r2, [r6]
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L1453
+	bhi	.L1461
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2444
@@ -10066,9 +10135,9 @@ FtlGcFreeTempBlock:
 	lsl	r2, r0, #1
 	ldrh	r2, [r1, r2]
 	cmp	r2, #0
-	beq	.L1454
+	beq	.L1462
 	bl	INSERT_DATA_LIST
-.L1455:
+.L1463:
 	mvn	r7, #0
 	movw	r3, #3192
 	strh	r7, [r4, r5]	@ movhi
@@ -10088,8 +10157,8 @@ FtlGcFreeTempBlock:
 	strhgt	r7, [r4, r3]	@ movhi
 	movwgt	r3, #3148
 	strhgt	r2, [r4, r3]	@ movhi
-	b	.L1438
-.L1453:
+	b	.L1446
+.L1461:
 	uxth	r3, r5
 	mov	r7, #12
 	ldr	r8, [r4, #3196]
@@ -10098,12 +10167,12 @@ FtlGcFreeTempBlock:
 	add	r9, r8, r7
 	ldr	r1, [r9, #8]
 	cmp	r1, r2
-	bcc	.L1450
+	bcc	.L1458
 	mov	r2, #168
-	ldr	r1, .L1462+16
+	ldr	r1, .L1470+16
 	mov	r0, r10
-	bl	printk
-.L1450:
+	bl	sftl_printk
+.L1458:
 	mov	r2, #0
 	sub	r1, fp, #44
 	ldr	r0, [r9, #8]
@@ -10111,7 +10180,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1451
+	bne	.L1459
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r2, #1
@@ -10120,24 +10189,24 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r9, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1461:
+.L1469:
 	bl	decrement_vpc_count
-.L1452:
+.L1460:
 	add	r5, r5, #1
-	b	.L1449
-.L1451:
+	b	.L1457
+.L1459:
 	ldr	r3, [r9, #4]
 	cmp	r2, r3
-	beq	.L1452
-	ldr	r3, .L1462+8
+	beq	.L1460
+	ldr	r3, .L1470+8
 	ldrh	r0, [r3]
-	b	.L1461
-.L1454:
+	b	.L1469
+.L1462:
 	bl	INSERT_FREE_LIST
-	b	.L1455
-.L1463:
+	b	.L1463
+.L1471:
 	.align	2
-.L1462:
+.L1470:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10157,8 +10226,8 @@ FtlGcPageRecovery:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1466
-	ldr	r5, .L1466+4
+	ldr	r4, .L1474
+	ldr	r5, .L1474+4
 	ldrh	r1, [r4, #102]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
@@ -10173,9 +10242,9 @@ FtlGcPageRecovery:
 	mov	r3, #0
 	str	r3, [r4, #4000]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1467:
+.L1475:
 	.align	2
-.L1466:
+.L1474:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -10191,7 +10260,7 @@ FtlPowerLostRecovery:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1469
+	ldr	r4, .L1477
 	mov	r6, #0
 	add	r5, r4, #2336
 	str	r6, [r4, #4012]
@@ -10211,9 +10280,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1470:
+.L1478:
 	.align	2
-.L1469:
+.L1477:
 	.word	.LANCHOR0
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	2
@@ -10228,7 +10297,7 @@ Ftl_gc_temp_data_write_back:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1478
+	ldr	r4, .L1486
 	mov	r3, #0
 	mov	r5, #0
 	mov	r6, #20
@@ -10236,14 +10305,14 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r4, #3164]
 	ldr	r0, [r4, #3836]
 	bl	FlashProgPages
-.L1472:
+.L1480:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1475
+	bhi	.L1483
 	ldr	r0, [r4, #3836]
 	bl	FtlGcBufFree
-	ldr	r3, .L1478+4
+	ldr	r3, .L1486+4
 	mov	r0, #0
 	str	r0, [r4, #3164]
 	ldrh	r3, [r3, #4]
@@ -10251,15 +10320,15 @@ Ftl_gc_temp_data_write_back:
 	ldmfdne	sp, {r4, r5, r6, fp, sp, pc}
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1477
-.L1475:
+	b	.L1485
+.L1483:
 	mul	r3, r6, r3
 	ldr	r2, [r4, #3836]
 	add	r5, r5, #1
 	ldr	r0, [r2, r3]
 	add	r1, r2, r3
 	cmn	r0, #1
-	bne	.L1473
+	bne	.L1481
 	movw	r1, #2444
 	ldr	ip, [r4, #2324]
 	ldrh	r2, [r4, r1]
@@ -10277,19 +10346,19 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1477:
+.L1485:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1473:
+.L1481:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1472
-.L1479:
+	b	.L1480
+.L1487:
 	.align	2
-.L1478:
+.L1486:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10305,39 +10374,39 @@ Ftl_get_new_temp_ppa:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1483
+	ldr	r4, .L1491
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1481
-	ldr	r3, .L1483+4
+	beq	.L1489
+	ldr	r3, .L1491+4
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L1482
-.L1481:
+	bne	.L1490
+.L1489:
 	bl	FtlCacheWriteBack
 	mov	r0, #0
 	mov	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1483+4
+	ldr	r0, .L1491+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	movw	r3, #3192
 	strh	r5, [r4, r3]	@ movhi
-	ldr	r3, .L1483+8
+	ldr	r3, .L1491+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1482:
-	ldr	r0, .L1483+4
+.L1490:
+	ldr	r0, .L1491+4
 	bl	get_new_active_ppa
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1484:
+.L1492:
 	.align	2
-.L1483:
+.L1491:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.word	.LANCHOR0+3200
@@ -10356,28 +10425,28 @@ rk_ftl_garbage_collect:
 	sub	fp, ip, #4
 	sub	sp, sp, #36
 	mov	r6, r0
-	ldr	r3, .L1598
+	ldr	r3, .L1606
 	ldr	r0, [r3, #3820]
 	mov	r5, r3
 	cmp	r0, #0
 	movne	r0, #0
-	bne	.L1485
+	bne	.L1493
 	add	r2, r3, #2336
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L1485
-	ldr	r2, .L1598+4
+	bls	.L1493
+	ldr	r2, .L1606+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1487
-.L1490:
+	bne	.L1495
+.L1498:
 	movw	r3, #3204
 	movw	r0, #65535
 	ldrh	r1, [r5, r3]
 	cmp	r1, r0
-	bne	.L1488
-.L1489:
+	bne	.L1496
+.L1497:
 	ldr	r3, [r5, #3152]
 	movw	r2, #2588
 	ldrh	r2, [r5, r2]
@@ -10386,16 +10455,16 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r6, lsl #7
 	cmp	r2, r4
 	str	r3, [r5, #3152]
-	bne	.L1491
+	bne	.L1499
 	movw	r1, #2444
 	ldrh	r4, [r5, r1]
 	cmp	r4, r2
 	movne	r4, r2
-	bne	.L1491
+	bne	.L1499
 	movw	r2, #3202
 	ldrh	r7, [r5, r2]
 	cmp	r7, r4
-	bne	.L1491
+	bne	.L1499
 	movw	r10, #2344
 	ldrh	r2, [r5, r10]
 	cmp	r2, #24
@@ -10403,8 +10472,8 @@ rk_ftl_garbage_collect:
 	movcs	r2, #1024
 	cmp	r3, r2
 	movls	r4, r7
-	bls	.L1491
-	ldr	r3, .L1598+8
+	bls	.L1499
+	ldr	r3, .L1606+8
 	mov	r9, #0
 	str	r9, [r5, #3152]
 	strh	r9, [r3, #-12]	@ movhi
@@ -10412,73 +10481,33 @@ rk_ftl_garbage_collect:
 	cmp	r0, r7
 	mov	r4, r0
 	movne	r7, r0
-	bne	.L1493
+	bne	.L1501
 	movw	r8, #3150
 	ldrh	r2, [r5, r10]
 	ldrh	r3, [r5, r8]
 	cmp	r2, r3
-	bcs	.L1494
+	bcs	.L1502
 	mov	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r4
-	beq	.L1496
+	beq	.L1504
 	mov	r0, r3
 	ldr	r3, [r5, #2324]
 	lsl	r0, r0, #1
 	ldrh	r3, [r3, r0]
 	cmp	r3, #7
-	bhi	.L1497
+	bhi	.L1505
 	mov	r0, r9
 	bl	List_get_gc_head_node
 	uxth	r7, r0
 	mov	r3, #128
 	strh	r3, [r5, r8]	@ movhi
 	cmp	r7, r4
-	beq	.L1496
-.L1493:
-	movw	r0, #3148
-	ldr	r3, [r5, #2324]
-	ldrh	r0, [r5, r0]
-	lsl	r1, r7, #1
-	movw	r2, #2344
-	ldrh	r3, [r3, r1]
-	mov	r4, r7
-	ldrh	r2, [r5, r2]
-	str	r0, [sp, #4]
-	ldr	r0, [r5, #2328]
-	ldrh	r1, [r0, r1]
-	ldr	r0, .L1598+12
-	str	r1, [sp]
-	mov	r1, r7
-	bl	printk
-	b	.L1496
-.L1487:
-	movw	r1, #2444
-	ldrh	r3, [r3, r1]
-	cmp	r3, r2
-	beq	.L1490
-	mov	r0, #1
-	bl	FtlGcFreeTempBlock
-	cmp	r0, #0
-	beq	.L1490
-	mov	r0, #1
-	b	.L1485
-.L1488:
-	movw	r2, #3202
-	ldrh	ip, [r5, r2]
-	cmp	ip, r0
-	strheq	r1, [r5, r2]	@ movhi
-	mvneq	r2, #0
-	strheq	r2, [r5, r3]	@ movhi
-	b	.L1489
-.L1497:
-	mov	r3, #64
-.L1590:
-	strh	r3, [r5, r8]	@ movhi
-.L1496:
+	bne	.L1501
+.L1504:
 	bl	FtlGcReFreshBadBlk
-.L1491:
+.L1499:
 	movw	r2, #65535
 	sub	r3, r4, r2
 	clz	r3, r3
@@ -10487,88 +10516,129 @@ rk_ftl_garbage_collect:
 	movne	r6, #0
 	andeq	r6, r3, #1
 	cmp	r6, #0
-	beq	.L1499
+	beq	.L1507
 	movw	r3, #2344
 	ldrh	r3, [r5, r3]
 	cmp	r3, #24
 	movhi	r6, #1
-	bhi	.L1500
+	bhi	.L1508
 	ldrh	r6, [r5, #102]
 	cmp	r3, #16
 	lsrhi	r6, r6, #5
-	bhi	.L1500
+	bhi	.L1508
 	cmp	r3, #12
 	lsrhi	r6, r6, #4
-	bhi	.L1500
+	bhi	.L1508
 	cmp	r3, #8
 	lsrhi	r6, r6, #2
-.L1500:
+.L1508:
 	movw	r2, #3148
 	ldrh	r1, [r5, r2]
 	cmp	r1, r3
-	bcs	.L1504
+	bcs	.L1512
 	movw	r3, #2444
 	movw	r1, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, r1
-	bne	.L1505
+	bne	.L1513
 	movw	r1, #3202
 	ldrh	r1, [r5, r1]
 	cmp	r1, r3
-	bne	.L1505
-	ldr	r3, .L1598+8
+	bne	.L1513
+	ldr	r3, .L1606+8
 	ldrh	r0, [r3, #-12]
 	cmp	r0, #0
-	bne	.L1506
+	bne	.L1514
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1591
-.L1506:
+	bcs	.L1599
+.L1514:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1591:
+.L1599:
 	strh	r3, [r5, r2]	@ movhi
 	mov	r3, #0
 	str	r3, [r5, #3160]
-.L1485:
+.L1493:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1494:
-	mov	r3, #80
-	b	.L1590
+.L1495:
+	movw	r1, #2444
+	ldrh	r3, [r3, r1]
+	cmp	r3, r2
+	beq	.L1498
+	mov	r0, #1
+	bl	FtlGcFreeTempBlock
+	cmp	r0, #0
+	beq	.L1498
+	mov	r0, #1
+	b	.L1493
+.L1496:
+	movw	r2, #3202
+	ldrh	ip, [r5, r2]
+	cmp	ip, r0
+	strheq	r1, [r5, r2]	@ movhi
+	mvneq	r2, #0
+	strheq	r2, [r5, r3]	@ movhi
+	b	.L1497
 .L1505:
+	mov	r3, #64
+.L1598:
+	strh	r3, [r5, r8]	@ movhi
+	b	.L1504
+.L1502:
+	mov	r3, #80
+	b	.L1598
+.L1501:
+	movw	r0, #3148
+	ldr	r3, [r5, #2324]
+	ldrh	r0, [r5, r0]
+	lsl	r1, r7, #1
+	movw	r2, #2344
+	ldrh	r3, [r3, r1]
+	mov	r4, r7
+	ldrh	r2, [r5, r2]
+	str	r0, [sp, #4]
+	ldr	r0, [r5, #2328]
+	ldrh	r1, [r0, r1]
+	ldr	r0, .L1606+12
+	str	r1, [sp]
+	mov	r1, r7
+	bl	sftl_printk
+	b	.L1504
+.L1513:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
 	strh	r3, [r5, r2]	@ movhi
-.L1504:
+.L1512:
 	movw	r3, #3206
 	movw	r4, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
 	addne	r6, r6, #32
 	uxthne	r6, r6
-.L1510:
+.L1518:
 	movw	r3, #2588
 	ldrh	r2, [r5, r3]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1519
+	bne	.L1527
 	cmp	r4, r2
 	strhne	r4, [r5, r3]	@ movhi
-	bne	.L1521
+	bne	.L1529
 	movw	r2, #3202
 	ldrh	r3, [r5, r2]
 	cmp	r3, r4
-	beq	.L1521
+	beq	.L1529
 	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
@@ -10581,27 +10651,27 @@ rk_ftl_garbage_collect:
 	strh	r1, [r5, r2]	@ movhi
 	mvn	r2, #0
 	strh	r2, [r5, r3]	@ movhi
-.L1521:
+.L1529:
 	movw	r7, #2588
 	mov	r3, #0
 	ldrh	r0, [r5, r7]
 	strb	r3, [r5, #2596]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1519
+	beq	.L1527
 	bl	IsBlkInGcList
 	cmp	r0, #0
-	ldr	r8, .L1598+16
+	ldr	r8, .L1606+16
 	mvnne	r3, #0
 	strhne	r3, [r5, r7]	@ movhi
 	movw	r7, #2588
 	ldrh	r2, [r5, r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1519
+	beq	.L1527
 	mov	r0, r8
 	bl	make_superblock
-	ldr	r2, .L1598+8
+	ldr	r2, .L1606+8
 	mov	r3, #0
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
@@ -10611,83 +10681,83 @@ rk_ftl_garbage_collect:
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
 	strh	r3, [r2, #-8]	@ movhi
-.L1519:
+.L1527:
 	movw	r3, #2588
 	movw	r2, #2348
 	ldrh	r3, [r5, r3]
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1525
+	beq	.L1533
 	movw	r2, #2396
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	ldrne	r7, .L1598
+	ldrne	r7, .L1606
 	movne	r5, r7
-	bne	.L1526
-.L1525:
+	bne	.L1534
+.L1533:
 	mvn	r2, #0
 	movw	r3, #2588
-.L1596:
+.L1604:
 	strh	r2, [r5, r3]	@ movhi
-	ldr	r3, .L1598+8
-.L1597:
+	ldr	r3, .L1606+8
+.L1605:
 	ldrh	r0, [r3, #-12]
-	b	.L1485
-.L1499:
+	b	.L1493
+.L1507:
 	movw	r1, #2444
 	ldrh	r7, [r5, r1]
 	cmp	r7, r2
-	bne	.L1568
+	bne	.L1576
 	movw	r2, #3202
 	ldrh	r2, [r5, r2]
 	cmp	r2, r7
 	movne	r3, #0
 	andeq	r3, r3, #1
 	cmp	r3, #0
-	beq	.L1568
+	beq	.L1576
 	movw	r3, #2588
 	ldrh	r3, [r5, r3]
 	cmp	r3, r7
-	beq	.L1511
-.L1516:
+	beq	.L1519
+.L1524:
 	mov	r4, r7
-.L1568:
+.L1576:
 	mov	r6, #1
-	b	.L1510
-.L1511:
+	b	.L1518
+.L1519:
 	movw	r3, #2344
 	movw	r2, #3148
 	ldrh	r8, [r5, r3]
 	ldrh	r3, [r5, r2]
 	str	r6, [r5, #3160]
-	ldr	r4, .L1598+8
+	ldr	r4, .L1606+8
 	cmp	r3, r8
-	bcs	.L1512
+	bcs	.L1520
 	ldrh	r3, [r4, #-12]
 	cmp	r3, #0
-	bne	.L1513
+	bne	.L1521
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1592
-.L1513:
+	bcs	.L1600
+.L1521:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1592:
+.L1600:
 	strh	r3, [r5, r2]	@ movhi
-.L1595:
+.L1603:
 	bl	FtlReadRefresh
 	ldrh	r0, [r4, #-12]
-	b	.L1485
-.L1512:
+	b	.L1493
+.L1520:
 	ldrh	r0, [r4, #-12]
 	cmp	r0, #0
-	bne	.L1516
+	bne	.L1524
 	movw	r3, #2572
 	ldrh	r6, [r5, r3]
 	add	r3, r6, r6, lsl #1
@@ -10703,20 +10773,20 @@ rk_ftl_garbage_collect:
 	mul	r3, r3, r1
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1517
+	ble	.L1525
 	sub	r6, r6, #1
 	cmp	r8, r6
-	bge	.L1595
-.L1517:
+	bge	.L1603
+.L1525:
 	cmp	r2, #0
-	bne	.L1516
+	bne	.L1524
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2344
 	ldrh	r0, [r5, r3]
 	add	r0, r0, #1
-	b	.L1485
-.L1529:
+	b	.L1493
+.L1537:
 	uxth	r2, r0
 	str	r1, [fp, #-52]
 	add	r10, r10, #1
@@ -10727,7 +10797,7 @@ rk_ftl_garbage_collect:
 	ldr	r2, [fp, #-48]
 	ldr	r1, [fp, #-52]
 	strhne	r10, [r9]	@ movhi
-	bne	.L1528
+	bne	.L1536
 	ldrh	lr, [r5, #32]
 	uxth	r10, r10
 	ldrh	r3, [r5, #102]
@@ -10738,78 +10808,78 @@ rk_ftl_garbage_collect:
 	ldrh	ip, [r0, r2]
 	add	lr, r3, r3, lsr #31
 	cmp	ip, lr, asr #1
-	bgt	.L1532
+	bgt	.L1540
 	cmp	ip, #8
 	cmphi	r10, #48
-	bls	.L1533
-	ldr	ip, .L1598+20
+	bls	.L1541
+	ldr	ip, .L1606+20
 	ldrh	ip, [ip]
 	cmp	ip, #35
-	bhi	.L1533
-.L1532:
-	ldr	lr, .L1598+24
+	bhi	.L1541
+.L1540:
+	ldr	lr, .L1606+24
 	mov	ip, #0
 	strh	ip, [lr]	@ movhi
-.L1533:
+.L1541:
 	ldrh	ip, [r0, r2]
 	movw	r0, #65535
 	cmp	r3, ip
 	cmple	r4, r0
 	moveq	r3, #1
 	movne	r3, #0
-	bne	.L1534
+	bne	.L1542
 	mvn	r2, #0
 	movw	r3, #2588
 	strh	r2, [r5, r3]	@ movhi
 	mov	r2, #0
 	movw	r3, #3156
-	b	.L1596
-.L1534:
+	b	.L1604
+.L1542:
 	cmp	ip, #0
-	bne	.L1535
+	bne	.L1543
 	bl	decrement_vpc_count
-	ldr	r3, .L1598+24
-	ldr	r2, .L1598+24
+	ldr	r3, .L1606+24
+	ldr	r2, .L1606+24
 	ldrh	r3, [r3]
 	add	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1528
-.L1535:
+	b	.L1536
+.L1543:
 	strb	r3, [r5, #2596]
-	ldr	r3, .L1598+28
+	ldr	r3, .L1606+28
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bne	.L1536
+	bne	.L1544
 	movw	r2, #658
-	ldr	r1, .L1598+32
-	ldr	r0, .L1598+36
-	bl	printk
-.L1536:
-	ldr	r3, .L1598+40
+	ldr	r1, .L1606+32
+	ldr	r0, .L1606+36
+	bl	sftl_printk
+.L1544:
+	ldr	r3, .L1606+40
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1537
+	bne	.L1545
 	movw	r2, #659
-	ldr	r1, .L1598+32
-	ldr	r0, .L1598+36
-	bl	printk
-.L1537:
-	ldr	r3, .L1598+44
+	ldr	r1, .L1606+32
+	ldr	r0, .L1606+36
+	bl	sftl_printk
+.L1545:
+	ldr	r3, .L1606+44
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1538
+	bne	.L1546
 	mov	r2, #660
-	ldr	r1, .L1598+32
-	ldr	r0, .L1598+36
-	bl	printk
-.L1538:
-	ldr	r0, .L1598+16
+	ldr	r1, .L1606+32
+	ldr	r0, .L1606+36
+	bl	sftl_printk
+.L1546:
+	ldr	r0, .L1606+16
 	bl	make_superblock
 	ldrh	r2, [r8]
 	mov	r3, #0
-	ldr	r1, .L1598+48
+	ldr	r1, .L1606+48
 	ldr	r0, [r5, #2324]
 	lsl	r2, r2, #1
 	strh	r3, [r1]	@ movhi
@@ -10817,7 +10887,7 @@ rk_ftl_garbage_collect:
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
 	strh	r2, [r1, #2]	@ movhi
-.L1527:
+.L1535:
 	bl	FtlReadRefresh
 	mov	r3, #1
 	str	r3, [r5, #3820]
@@ -10831,12 +10901,12 @@ rk_ftl_garbage_collect:
 	subgt	r6, r2, r3
 	mov	r3, #0
 	uxthgt	r6, r6
-.L1594:
+.L1602:
 	str	r3, [fp, #-52]
 	ldrh	r3, [fp, #-52]
-	ldr	r8, .L1598+16
+	ldr	r8, .L1606+16
 	cmp	r6, r3
-	bls	.L1548
+	bls	.L1556
 	ldrh	r9, [r8, #2]
 	mov	r2, #0
 	ldr	r3, [fp, #-52]
@@ -10846,8 +10916,8 @@ rk_ftl_garbage_collect:
 	add	r9, r9, r3
 	add	r3, r8, #14
 	mov	r8, r2
-	b	.L1549
-.L1542:
+	b	.L1557
+.L1550:
 	ldrh	r1, [r3, #2]!
 	add	r2, r2, #1
 	cmp	r1, r10
@@ -10857,22 +10927,22 @@ rk_ftl_garbage_collect:
 	addne	r8, r8, #1
 	uxthne	r8, r8
 	strne	r1, [lr, #4]
-.L1549:
+.L1557:
 	uxth	r1, r2
 	cmp	ip, r1
-	bhi	.L1542
+	bhi	.L1550
 	ldrb	r2, [r7, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L1593:
+.L1601:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r3, r8
 	ldrcs	r3, [fp, #-52]
 	addcs	r3, r3, #1
-	bcs	.L1594
-.L1547:
+	bcs	.L1602
+.L1555:
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
@@ -10880,22 +10950,22 @@ rk_ftl_garbage_collect:
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	cmn	r3, #1
-	beq	.L1544
+	beq	.L1552
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1544
+	bne	.L1552
 	ldr	r3, [r10, #8]
 	cmn	r3, #1
-	bne	.L1545
+	bne	.L1553
 	mov	r2, #696
-	ldr	r1, .L1598+32
-	ldr	r0, .L1598+36
+	ldr	r1, .L1606+32
+	ldr	r0, .L1606+36
 	str	r3, [fp, #-60]
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [fp, #-60]
-.L1545:
+.L1553:
 	mov	r2, #0
 	mov	r0, r3
 	sub	r1, fp, #44
@@ -10905,8 +10975,8 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1544
-	ldr	r3, .L1598+48
+	bne	.L1552
+	ldr	r3, .L1606+48
 	mov	r1, #20
 	ldr	lr, [r5, #3164]
 	ldr	r0, [r0, #16]
@@ -10934,7 +11004,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldr	r2, [fp, #-44]
 	str	r2, [r10, #12]
-	ldr	r2, .L1598+44
+	ldr	r2, .L1606+44
 	ldrh	r1, [r2]
 	str	r2, [fp, #-60]
 	strh	r1, [r10, #2]	@ movhi
@@ -10951,109 +11021,109 @@ rk_ftl_garbage_collect:
 	ldr	r1, [r5, #3164]
 	ldr	r3, [fp, #-68]
 	cmp	r0, r1
-	beq	.L1546
+	beq	.L1554
 	ldr	r2, [fp, #-60]
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1544
-.L1546:
+	bne	.L1552
+.L1554:
 	str	r3, [fp, #-60]
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	ldr	r3, [fp, #-60]
-	ldrne	r2, .L1598
+	ldrne	r2, .L1606
 	movne	r1, #0
 	strne	r1, [r2, #3820]
-	bne	.L1597
-.L1544:
+	bne	.L1605
+.L1552:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L1593
-.L1548:
+	b	.L1601
+.L1556:
 	ldrh	r3, [r8, #2]
 	add	r6, r6, r3
 	ldr	r3, [fp, #-56]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r8, #2]	@ movhi
-	ldr	r6, .L1598+8
-	bls	.L1550
+	ldr	r6, .L1606+8
+	bls	.L1558
 	ldrh	r2, [r6, #-10]
 	ldrh	r3, [r6, #-8]
 	cmp	r2, r3
-	bne	.L1551
-.L1550:
+	bne	.L1559
+.L1558:
 	ldr	r3, [r7, #3164]
 	cmp	r3, #0
-	beq	.L1552
+	beq	.L1560
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	movne	r3, #0
 	ldrhne	r0, [r6, #-12]
 	strne	r3, [r7, #3820]
-	bne	.L1485
-.L1552:
+	bne	.L1493
+.L1560:
 	ldrh	r1, [r6, #-10]
 	cmp	r1, #0
-	bne	.L1553
+	bne	.L1561
 	ldrh	r3, [r8]
 	ldr	r2, [r7, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	cmp	r0, #0
-	beq	.L1553
+	beq	.L1561
 	strh	r1, [r2, r3]	@ movhi
 	ldrh	r0, [r8]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1553:
+.L1561:
 	mvn	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1551:
-	ldr	r3, .L1598+52
+.L1559:
+	ldr	r3, .L1606+52
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1554
+	bhi	.L1562
 	ldrh	r6, [r7, #102]
-.L1526:
-	ldr	r8, .L1598+16
+.L1534:
+	ldr	r8, .L1606+16
 	movw	r3, #65535
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1527
+	bne	.L1535
 	add	r9, r8, #568
 	mov	r3, #0
 	str	r3, [r7, #3160]
-.L1528:
+.L1536:
 	ldrh	r10, [r9]
 	mov	r0, r10
 	bl	List_get_gc_head_node
-	ldr	r3, .L1598+16
+	ldr	r3, .L1606+16
 	uxth	r1, r0
 	strh	r1, [r3]	@ movhi
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L1529
+	bne	.L1537
 	mov	r3, #0
 	mov	r0, #8
 	strh	r3, [r9]	@ movhi
-	b	.L1485
-.L1554:
+	b	.L1493
+.L1562:
 	ldrh	r0, [r6, #-12]
 	mov	r2, #0
 	str	r2, [r7, #3820]
 	cmp	r0, r2
 	addeq	r0, r3, #1
-	b	.L1485
-.L1599:
+	b	.L1493
+.L1607:
 	.align	2
-.L1598:
+.L1606:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3-4016
-	.word	.LC104
+	.word	.LC108
 	.word	.LANCHOR0+2588
 	.word	.LANCHOR0+3192
 	.word	.LANCHOR0+3156
@@ -11100,19 +11170,19 @@ FtlRead:
 	str	r2, [fp, #-68]
 	cmp	r0, #16
 	mov	r9, r3
-	bne	.L1602
+	bne	.L1610
 	mov	r2, r3
 	ldr	r1, [fp, #-68]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [fp, #-48]
-.L1601:
+.L1609:
 	ldr	r0, [fp, #-48]
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1602:
+.L1610:
 	ldr	r3, [fp, #-68]
-	ldr	r10, .L1635
+	ldr	r10, .L1643
 	add	r3, r1, r3
 	str	r3, [fp, #-56]
 	ldr	r2, [fp, #-56]
@@ -11120,12 +11190,12 @@ FtlRead:
 	cmp	r2, r3
 	mvnhi	r3, #0
 	strhi	r3, [fp, #-48]
-	bhi	.L1601
-	ldr	r3, .L1635+4
+	bhi	.L1609
+	ldr	r3, .L1643+4
 	ldr	r7, [r3]
 	cmn	r7, #1
 	streq	r7, [fp, #-48]
-	beq	.L1601
+	beq	.L1609
 	bl	FtlCacheWriteBack
 	ldrh	r4, [r10, #58]
 	mov	r0, r6
@@ -11152,25 +11222,25 @@ FtlRead:
 	str	r8, [fp, #-48]
 	add	r3, r3, r2
 	str	r3, [r10, #2508]
-.L1604:
+.L1612:
 	ldr	r3, [fp, #-52]
 	cmp	r3, #0
-	bne	.L1620
-	ldr	r3, .L1635
+	bne	.L1628
+	ldr	r3, .L1643
 	movw	r2, #3206
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	bne	.L1621
+	bne	.L1629
 	movw	r2, #2344
 	ldrh	r3, [r3, r2]
 	cmp	r3, #31
-	bhi	.L1601
-.L1621:
+	bhi	.L1609
+.L1629:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1601
-.L1620:
+	b	.L1609
+.L1628:
 	sub	r1, fp, #44
 	mov	r2, #0
 	mov	r0, r4
@@ -11178,7 +11248,7 @@ FtlRead:
 	ldr	r1, [fp, #-44]
 	cmn	r1, #1
 	moveq	r10, #0
-	beq	.L1606
+	beq	.L1614
 	ldr	r2, [r7, #3832]
 	mov	r0, #20
 	ldr	r3, [fp, #-60]
@@ -11186,7 +11256,7 @@ FtlRead:
 	mla	r2, r0, r5, r2
 	cmp	r4, r3
 	str	r1, [r2, #4]
-	bne	.L1610
+	bne	.L1618
 	ldr	r1, [r7, #3816]
 	mov	r0, r6
 	str	r2, [fp, #-80]
@@ -11202,7 +11272,7 @@ FtlRead:
 	cmp	r3, r10
 	str	r3, [fp, #-76]
 	streq	r9, [r2, #8]
-.L1611:
+.L1619:
 	ldrh	r1, [r7, #112]
 	ldr	r0, [r7, #3812]
 	str	r4, [r2, #16]
@@ -11211,8 +11281,8 @@ FtlRead:
 	bic	r1, r1, #3
 	add	r1, r0, r1
 	str	r1, [r2, #12]
-	b	.L1609
-.L1608:
+	b	.L1617
+.L1616:
 	mla	r0, r0, r4, r10
 	ldr	r2, [fp, #-56]
 	cmp	r2, r0
@@ -11221,29 +11291,29 @@ FtlRead:
 	cmp	r6, r0
 	movhi	r2, #0
 	cmp	r2, #0
-	beq	.L1607
+	beq	.L1615
 	sub	r0, r0, r6
 	mov	r1, #512
 	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.L1607:
+.L1615:
 	add	r10, r10, #1
-.L1606:
+.L1614:
 	ldrh	r0, [r7, #58]
 	cmp	r10, r0
-	bcc	.L1608
-.L1609:
+	bcc	.L1616
+.L1617:
 	ldr	r3, [fp, #-52]
 	add	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [fp, #-52]
-	beq	.L1613
+	beq	.L1621
 	ldrh	r2, [r7, #32]
 	cmp	r5, r2, lsl #2
-	bne	.L1604
-.L1613:
+	bne	.L1612
+.L1621:
 	cmp	r5, #0
-	beq	.L1604
+	beq	.L1612
 	mov	r2, #0
 	mov	r1, r5
 	ldr	r0, [r7, #3832]
@@ -11257,7 +11327,7 @@ FtlRead:
 	ldr	r3, [fp, #-76]
 	lsl	r3, r3, #9
 	str	r3, [fp, #-84]
-.L1619:
+.L1627:
 	mov	r3, #20
 	ldr	r2, [r7, #3832]
 	mul	ip, r3, r10
@@ -11265,20 +11335,20 @@ FtlRead:
 	add	r2, r2, ip
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1615
+	bne	.L1623
 	ldr	r1, [r2, #8]
 	ldr	r2, [r7, #3816]
 	cmp	r1, r2
-	bne	.L1616
+	bne	.L1624
 	ldr	r3, [fp, #-80]
 	mov	r0, r9
 	ldr	r2, [fp, #-84]
 	str	ip, [fp, #-92]
 	add	r1, r1, r3
-.L1634:
+.L1642:
 	bl	ftl_memcpy
 	ldr	ip, [fp, #-92]
-.L1616:
+.L1624:
 	ldr	r2, [r7, #3832]
 	ldr	r0, [r2, ip]
 	add	lr, r2, ip
@@ -11289,21 +11359,21 @@ FtlRead:
 	streq	r1, [r7, #2708]
 	ldr	r2, [r2, ip]
 	cmp	r2, #256
-	bne	.L1618
+	bne	.L1626
 	ldr	r0, [lr, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1618:
+.L1626:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1619
+	bne	.L1627
 	mov	r5, #0
-	b	.L1604
-.L1610:
+	b	.L1612
+.L1618:
 	ldr	r3, [fp, #-64]
 	cmp	r4, r3
-	bne	.L1612
+	bne	.L1620
 	ldr	r1, [r7, #3808]
 	ldr	r3, [fp, #-56]
 	str	r1, [r2, #8]
@@ -11313,31 +11383,31 @@ FtlRead:
 	subeq	r1, r1, r6
 	addeq	r1, r9, r1, lsl #9
 	streq	r1, [r2, #8]
-	b	.L1611
-.L1612:
+	b	.L1619
+.L1620:
 	mul	r10, r4, r10
 	sub	r10, r10, r6
 	add	r10, r9, r10, lsl #9
 	str	r10, [r2, #8]
-	b	.L1611
-.L1615:
+	b	.L1619
+.L1623:
 	ldr	r3, [fp, #-64]
 	cmp	r3, r1
-	bne	.L1616
+	bne	.L1624
 	ldr	r1, [r2, #8]
 	ldr	r2, [r7, #3808]
 	cmp	r1, r2
-	bne	.L1616
+	bne	.L1624
 	ldrh	r0, [r7, #58]
 	str	ip, [fp, #-92]
 	ldr	r2, [fp, #-88]
 	mul	r0, r3, r0
 	sub	r0, r0, r6
 	add	r0, r9, r0, lsl #9
-	b	.L1634
-.L1636:
+	b	.L1642
+.L1644:
 	.align	2
-.L1635:
+.L1643:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.size	FtlRead, .-FtlRead
@@ -11397,27 +11467,27 @@ FtlWrite:
 	str	r2, [fp, #-76]
 	cmp	r0, #16
 	str	r3, [fp, #-80]
-	bne	.L1640
+	bne	.L1648
 	mov	r2, r3
 	ldr	r1, [fp, #-76]
 	add	r0, r8, #256
 	bl	FtlVendorPartWrite
-.L1639:
+.L1647:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1640:
+.L1648:
 	ldr	r3, [fp, #-76]
-	ldr	r9, .L1704
+	ldr	r9, .L1712
 	add	r6, r1, r3
 	ldr	r3, [r9, #140]
 	cmp	r6, r3
 	mvnhi	r0, #0
-	bhi	.L1639
-	ldr	r5, .L1704+4
+	bhi	.L1647
+	ldr	r5, .L1712+4
 	ldr	r0, [r5]
 	cmn	r0, #1
-	beq	.L1639
-	ldr	r3, .L1704+8
+	beq	.L1647
+	ldr	r3, .L1712+8
 	mov	r2, #2048
 	ldrh	r4, [r9, #58]
 	mov	r0, r8
@@ -11439,66 +11509,66 @@ FtlWrite:
 	ldr	r3, [r9, #2516]
 	add	r3, r3, r2
 	str	r3, [r9, #2516]
-	beq	.L1642
+	beq	.L1650
 	ldr	r3, [r10, #16]
 	ldr	r2, [fp, #-68]
 	cmp	r2, r3
-	beq	.L1643
+	beq	.L1651
 	bl	FtlCacheWriteBack
-.L1642:
+.L1650:
 	ldr	r3, [r5, #8]
-	ldr	r4, .L1704+12
+	ldr	r4, .L1712+12
 	cmp	r3, #0
-	beq	.L1645
+	beq	.L1653
 	ldrh	r3, [r4, #4]
 	add	r0, r4, #48
 	cmp	r3, #0
 	moveq	r4, r0
-.L1645:
+.L1653:
 	ldr	r5, [fp, #-68]
-	ldr	r7, .L1704
-.L1646:
+	ldr	r7, .L1712
+.L1654:
 	ldr	r3, [fp, #-72]
 	cmp	r3, #0
-	beq	.L1680
+	beq	.L1688
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1647
+	bcc	.L1655
 	mov	r2, #1012
-	ldr	r1, .L1704+16
-	ldr	r0, .L1704+20
-	bl	printk
-.L1647:
+	ldr	r1, .L1712+16
+	ldr	r0, .L1712+20
+	bl	sftl_printk
+.L1655:
 	ldrh	r9, [r4, #4]
 	cmp	r9, #0
-	bne	.L1648
+	bne	.L1656
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1704+12
-	ldr	r6, .L1704+4
+	ldr	r3, .L1712+12
+	ldr	r6, .L1712+4
 	cmp	r4, r3
-	bne	.L1649
+	bne	.L1657
 	add	r0, r4, #48
 	ldrh	r9, [r0, #4]
 	cmp	r9, #0
-	bne	.L1650
+	bne	.L1658
 	bl	allocate_new_data_superblock
 	str	r9, [r6, #8]
-.L1650:
-	ldr	r0, .L1704+12
+.L1658:
+	ldr	r0, .L1712+12
 	bl	allocate_new_data_superblock
-	ldr	r4, .L1704+12
+	ldr	r4, .L1712+12
 	ldr	r3, [r6, #8]
 	add	r0, r4, #48
 	cmp	r3, #0
 	movne	r4, r0
-.L1651:
+.L1659:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1648
+	bne	.L1656
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1648:
+.L1656:
 	ldrh	r3, [r4, #4]
 	ldr	r2, [fp, #-72]
 	cmp	r3, r2
@@ -11511,53 +11581,53 @@ FtlWrite:
 	str	r3, [fp, #-104]
 	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1652
+	bcc	.L1660
 	movw	r2, #1045
-	ldr	r1, .L1704+16
-	ldr	r0, .L1704+20
-	bl	printk
-.L1652:
+	ldr	r1, .L1712+16
+	ldr	r0, .L1712+20
+	bl	sftl_printk
+.L1660:
 	mov	r9, #0
-.L1653:
+.L1661:
 	ldr	r3, [fp, #-104]
 	cmp	r9, r3
-	bne	.L1674
-.L1654:
+	bne	.L1682
+.L1662:
 	ldr	r3, [r7, #3988]
 	cmp	r3, #0
-	beq	.L1675
+	beq	.L1683
 	ldr	r3, [fp, #-72]
 	subs	r9, r9, #1
 	sub	r3, r3, #1
 	str	r3, [fp, #-72]
-	bne	.L1675
-.L1680:
+	bne	.L1683
+.L1688:
 	ldr	r3, [fp, #-88]
 	mov	r0, #0
 	ldr	r2, [fp, #-68]
 	sub	r1, r3, r2
 	bl	rk_ftl_garbage_collect
-	ldr	r2, .L1704
+	ldr	r2, .L1712
 	movw	r3, #2344
 	ldrh	r3, [r2, r3]
 	cmp	r3, #15
-	bhi	.L1677
-	ldr	r4, .L1704+24
-	ldr	r5, .L1704+28
-.L1700:
+	bhi	.L1685
+	ldr	r4, .L1712+24
+	ldr	r5, .L1712+28
+.L1708:
 	ldrh	r3, [r4]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1681
+	bne	.L1689
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1681
+	bne	.L1689
 	mov	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1681:
-	ldr	r3, .L1704+32
+.L1689:
+	ldr	r3, .L1712+32
 	mov	r1, #1
 	mov	r2, #128
 	mov	r0, r1
@@ -11567,12 +11637,12 @@ FtlWrite:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1704+36
+	ldr	r3, .L1712+36
 	ldrh	r3, [r3]
 	cmp	r3, #8
-	bls	.L1700
-	b	.L1677
-.L1643:
+	bls	.L1708
+	b	.L1685
+.L1651:
 	ldr	r3, [r9, #2520]
 	mov	r1, r4
 	mov	r0, r8
@@ -11590,11 +11660,11 @@ FtlWrite:
 	add	r0, r3, r0, lsl #9
 	bl	ftl_memcpy
 	cmp	r6, #0
-	bne	.L1644
-.L1677:
+	bne	.L1652
+.L1685:
 	mov	r0, #0
-	b	.L1639
-.L1644:
+	b	.L1647
+.L1652:
 	ldr	r3, [fp, #-76]
 	add	r8, r8, r4
 	sub	r3, r3, r4
@@ -11607,20 +11677,20 @@ FtlWrite:
 	str	r3, [fp, #-68]
 	bl	FtlCacheWriteBack
 	str	r6, [fp, #-72]
-	b	.L1642
-.L1649:
+	b	.L1650
+.L1657:
 	ldrh	r2, [r3, #4]
 	str	r9, [r6, #8]
 	cmp	r2, #0
 	movne	r4, r3
-	bne	.L1648
+	bne	.L1656
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-	b	.L1651
-.L1674:
+	b	.L1659
+.L1682:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1654
+	beq	.L1662
 	mov	r2, #0
 	sub	r1, fp, #64
 	mov	r0, r5
@@ -11650,10 +11720,10 @@ FtlWrite:
 	cmp	r5, r2
 	cmpne	r5, r3
 	ldrh	r3, [r7, #58]
-	bne	.L1655
+	bne	.L1663
 	ldr	r2, [fp, #-68]
 	cmp	r5, r2
-	bne	.L1656
+	bne	.L1664
 	mov	r1, r3
 	mov	r0, r8
 	str	r3, [fp, #-84]
@@ -11665,34 +11735,34 @@ FtlWrite:
 	cmp	r3, r2
 	movcs	r3, r2
 	str	r3, [fp, #-84]
-.L1657:
+.L1665:
 	ldrh	r3, [r7, #58]
 	ldr	r2, [fp, #-84]
 	cmp	r2, r3
 	ldr	r3, [fp, #-68]
-	bne	.L1658
+	bne	.L1666
 	cmp	r5, r3
 	ldr	r3, [r7, #3840]
 	add	r6, r3, r6
 	ldreq	r3, [fp, #-80]
-	beq	.L1702
+	beq	.L1710
 	ldr	r3, [fp, #-84]
 	mul	r2, r3, r5
 	ldr	r3, [fp, #-80]
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r6, #8]
-.L1660:
+.L1668:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r7, #32]
 	cmp	r2, r3
-	bcc	.L1671
+	bcc	.L1679
 	movw	r2, #1119
-	ldr	r1, .L1704+16
-	ldr	r0, .L1704+20
-	bl	printk
-.L1671:
-	ldr	r3, .L1704+40
+	ldr	r1, .L1712+16
+	ldr	r0, .L1712+20
+	bl	sftl_printk
+.L1679:
+	ldr	r3, .L1712+40
 	add	r9, r9, #1
 	ldr	r2, [fp, #-100]
 	ldr	r1, [fp, #-96]
@@ -11709,8 +11779,8 @@ FtlWrite:
 	str	r3, [r10, #12]
 	ldrh	r3, [r4]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L1653
-.L1656:
+	b	.L1661
+.L1664:
 	ldr	r2, [fp, #-76]
 	smulbb	r3, r3, r5
 	add	r2, r8, r2
@@ -11719,8 +11789,8 @@ FtlWrite:
 	str	r3, [fp, #-84]
 	mov	r3, #0
 	str	r3, [fp, #-92]
-	b	.L1657
-.L1658:
+	b	.L1665
+.L1666:
 	cmp	r5, r3
 	ldr	r3, [r7, #3840]
 	ldreq	r2, [r7, #3816]
@@ -11729,7 +11799,7 @@ FtlWrite:
 	str	r2, [r3, #8]
 	ldr	r3, [fp, #-64]
 	cmn	r3, #1
-	beq	.L1663
+	beq	.L1671
 	str	r3, [fp, #-56]
 	mov	r1, #1
 	ldr	r3, [r7, #3840]
@@ -11747,31 +11817,31 @@ FtlWrite:
 	ldreq	r3, [r7, #2708]
 	addeq	r3, r3, #1
 	streq	r3, [r7, #2708]
-	beq	.L1667
+	beq	.L1675
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1666
+	beq	.L1674
 	ldr	r3, [r7, #2708]
 	mov	r2, r5
-	ldr	r0, .L1704+44
+	ldr	r0, .L1712+44
 	add	r3, r3, #1
 	str	r3, [r7, #2708]
 	ldr	r1, [r10, #8]
-	bl	printk
-.L1666:
+	bl	sftl_printk
+.L1674:
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1667
+	beq	.L1675
 	movw	r2, #1098
-	ldr	r1, .L1704+16
-	ldr	r0, .L1704+20
-	bl	printk
-.L1667:
+	ldr	r1, .L1712+16
+	ldr	r0, .L1712+20
+	bl	sftl_printk
+.L1675:
 	ldr	r3, [fp, #-68]
 	cmp	r5, r3
 	ldr	r3, [fp, #-84]
 	lsl	r2, r3, #9
-	bne	.L1668
+	bne	.L1676
 	ldr	r3, [r7, #3840]
 	ldr	r1, [fp, #-80]
 	add	r3, r3, r6
@@ -11781,25 +11851,25 @@ FtlWrite:
 	bl	ftl_memcpy
 	ldr	r3, [fp, #-88]
 	cmp	r5, r3
-	bne	.L1660
-.L1669:
+	bne	.L1668
+.L1677:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
 	ldrne	r3, [r7, #3840]
 	addne	r6, r3, r6
-	ldrne	r3, .L1704+8
+	ldrne	r3, .L1712+8
 	strne	r6, [r7, #3988]
 	strne	r4, [r3, #-4036]
-	b	.L1660
-.L1663:
+	b	.L1668
+.L1671:
 	ldr	r3, [r7, #3840]
 	mov	r1, #0
 	ldrh	r2, [r7, #110]
 	add	r3, r3, r6
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1667
-.L1668:
+	b	.L1675
+.L1676:
 	ldrh	r1, [r7, #58]
 	ldr	r0, [fp, #-80]
 	ldr	r3, [r7, #3840]
@@ -11809,18 +11879,18 @@ FtlWrite:
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
 	bl	ftl_memcpy
-	b	.L1669
-.L1655:
+	b	.L1677
+.L1663:
 	ldr	r2, [r7, #3840]
 	mul	r3, r5, r3
 	add	r6, r2, r6
 	ldr	r2, [fp, #-80]
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-.L1702:
+.L1710:
 	str	r3, [r6, #8]
-	b	.L1660
-.L1675:
+	b	.L1668
+.L1683:
 	mov	r3, r4
 	mov	r2, #0
 	mov	r1, r9
@@ -11828,19 +11898,19 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [fp, #-72]
 	cmp	r3, r9
-	bcs	.L1678
+	bcs	.L1686
 	movw	r2, #1134
-	ldr	r1, .L1704+16
-	ldr	r0, .L1704+20
-	bl	printk
-.L1678:
+	ldr	r1, .L1712+16
+	ldr	r0, .L1712+20
+	bl	sftl_printk
+.L1686:
 	ldr	r3, [fp, #-72]
 	sub	r3, r3, r9
 	str	r3, [fp, #-72]
-	b	.L1646
-.L1705:
+	b	.L1654
+.L1713:
 	.align	2
-.L1704:
+.L1712:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -11852,7 +11922,7 @@ FtlWrite:
 	.word	.LANCHOR0+3150
 	.word	.LANCHOR0+2344
 	.word	-3947
-	.word	.LC105
+	.word	.LC109
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
@@ -11904,7 +11974,7 @@ FtlLoadSysInfo:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1729
+	ldr	r4, .L1737
 	mov	r1, #0
 	ldr	r3, [r4, #3280]
 	add	r6, r4, #2576
@@ -11918,37 +11988,37 @@ FtlLoadSysInfo:
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1709
-.L1717:
+	bne	.L1717
+.L1725:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1709:
-	ldr	r7, .L1729+4
+.L1717:
+	ldr	r7, .L1737+4
 	mov	r1, #1
-	ldr	r8, .L1729+8
+	ldr	r8, .L1737+8
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1711:
+.L1719:
 	cmp	r5, #0
-	bge	.L1714
+	bge	.L1722
 	movw	r2, #1437
-	ldr	r1, .L1729+12
-	ldr	r0, .L1729+16
-	bl	printk
-.L1713:
+	ldr	r1, .L1737+12
+	ldr	r0, .L1737+16
+	bl	sftl_printk
+.L1721:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	add	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1716
+	bcs	.L1724
 	movw	r2, #1439
-	ldr	r1, .L1729+12
-	ldr	r0, .L1729+16
-	bl	printk
-.L1716:
-	ldr	r5, .L1729+20
+	ldr	r1, .L1737+12
+	ldr	r0, .L1737+16
+	bl	sftl_printk
+.L1724:
+	ldr	r5, .L1737+20
 	mov	r2, #48
 	ldr	r1, [r4, #3268]
 	mov	r0, r5
@@ -11970,16 +12040,16 @@ FtlLoadSysInfo:
 	add	r1, r3, r1
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1729+8
+	ldr	r3, .L1737+8
 	cmp	r2, r3
-	bne	.L1717
+	bne	.L1725
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r7, [r5, #8]
 	cmp	r2, r3
 	strh	r7, [r6, #6]	@ movhi
-	bne	.L1717
-	ldr	r3, .L1729+24
+	bne	.L1725
+	ldr	r3, .L1737+24
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
 	str	r7, [r3, #-4016]
@@ -11996,15 +12066,15 @@ FtlLoadSysInfo:
 	cmp	r7, r6
 	movw	r3, #2572
 	strh	r0, [r4, r3]	@ movhi
-	bls	.L1718
+	bls	.L1726
 	movw	r2, #1461
-	ldr	r1, .L1729+12
-	ldr	r0, .L1729+16
-	bl	printk
-.L1718:
+	ldr	r1, .L1737+12
+	ldr	r0, .L1737+16
+	bl	sftl_printk
+.L1726:
 	ldrh	r0, [r5, #14]
 	movw	r3, #2348
-	ldr	r1, .L1729+28
+	ldr	r1, .L1737+28
 	mvn	ip, #0
 	strh	r0, [r4, r3]	@ movhi
 	ldrh	r3, [r5, #16]
@@ -12059,37 +12129,37 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1721
-	ldr	r0, .L1729+28
+	beq	.L1729
+	ldr	r0, .L1737+28
 	bl	make_superblock
-.L1721:
+.L1729:
 	movw	r3, #2396
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1722
-	ldr	r0, .L1729+32
+	beq	.L1730
+	ldr	r0, .L1737+32
 	bl	make_superblock
-.L1722:
+.L1730:
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1723
-	ldr	r0, .L1729+36
+	beq	.L1731
+	ldr	r0, .L1737+36
 	bl	make_superblock
-.L1723:
+.L1731:
 	movw	r3, #2588
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1724
-	ldr	r0, .L1729+40
+	beq	.L1732
+	ldr	r0, .L1737+40
 	bl	make_superblock
-.L1724:
+.L1732:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1714:
+.L1722:
 	ldrh	r3, [r6]
 	mov	r2, #1
 	mov	r1, r2
@@ -12101,23 +12171,23 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmn	r3, #1
-	beq	.L1712
+	beq	.L1720
 	ldr	r3, [r4, #3280]
 	ldr	r3, [r3]
 	cmp	r3, r8
-	bne	.L1712
+	bne	.L1720
 	ldr	r3, [r4, #3284]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1713
-.L1712:
+	beq	.L1721
+.L1720:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1711
-.L1730:
+	b	.L1719
+.L1738:
 	.align	2
-.L1729:
+.L1737:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.word	1179929683
@@ -12142,7 +12212,7 @@ FtlSysBlkInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1747
+	ldr	r4, .L1755
 	mov	r2, #0
 	movw	r3, #4008
 	ldrh	r0, [r4, #36]
@@ -12153,16 +12223,16 @@ FtlSysBlkInit:
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1732
-.L1734:
+	bne	.L1740
+.L1742:
 	mvn	r8, #0
-.L1731:
+.L1739:
 	mov	r0, r8
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1732:
+.L1740:
 	bl	FtlLoadSysInfo
 	subs	r8, r0, #0
-	bne	.L1734
+	bne	.L1742
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12176,24 +12246,24 @@ FtlSysBlkInit:
 	mov	r3, r8
 	ldr	r2, [r4, #2492]
 	mov	r0, #12
-.L1735:
+.L1743:
 	cmp	r3, r1
-	bge	.L1740
+	bge	.L1748
 	mla	ip, r0, r3, r2
 	ldr	ip, [ip, #4]
 	cmp	ip, #0
-	bge	.L1736
-.L1740:
-	ldr	r5, .L1747+4
+	bge	.L1744
+.L1748:
+	ldr	r5, .L1755+4
 	cmp	r3, r1
 	ldrh	r2, [r5, #28]
 	add	r7, r5, #80
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	bge	.L1746
-.L1737:
-	ldr	r6, .L1747+8
-	ldr	r0, .L1747+12
+	bge	.L1754
+.L1745:
+	ldr	r6, .L1755+8
+	ldr	r0, .L1755+12
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
@@ -12219,7 +12289,7 @@ FtlSysBlkInit:
 	sub	r1, r1, ip
 	strh	r1, [r0, r2]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1747+16
+	ldr	r0, .L1755+16
 	strb	r3, [r4, #2402]
 	strh	r2, [r6, #2]	@ movhi
 	strh	r3, [r6, #4]	@ movhi
@@ -12232,28 +12302,28 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1741
-.L1736:
+	b	.L1749
+.L1744:
 	add	r3, r3, #1
-	b	.L1735
-.L1746:
+	b	.L1743
+.L1754:
 	movw	r3, #4008
 	ldrh	r3, [r4, r3]
 	cmp	r3, #0
-	bne	.L1737
-.L1741:
+	bne	.L1745
+.L1749:
 	movw	r3, #2348
 	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1742
+	beq	.L1750
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	bne	.L1742
-	ldr	r6, .L1747+8
+	bne	.L1750
+	ldr	r6, .L1755+8
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	bne	.L1742
+	bne	.L1750
 	bl	FtlGcRefreshBlock
 	movw	r3, #2396
 	ldrh	r0, [r4, r3]
@@ -12262,15 +12332,15 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	r0, r6
 	bl	allocate_new_data_superblock
-.L1742:
+.L1750:
 	ldrh	r3, [r5, #28]
 	tst	r3, #31
-	bne	.L1731
+	bne	.L1739
 	bl	FtlVpcCheckAndModify
-	b	.L1731
-.L1748:
+	b	.L1739
+.L1756:
 	.align	2
-.L1747:
+.L1755:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2268
 	.word	.LANCHOR0+2396
@@ -12289,7 +12359,7 @@ ftl_low_format:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1773
+	ldr	r4, .L1781
 	mov	r3, #0
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
@@ -12297,36 +12367,36 @@ ftl_low_format:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	beq	.L1750
+	beq	.L1758
 	bl	FtlMakeBbt
-.L1750:
-	ldr	r0, .L1773+4
+.L1758:
+	ldr	r0, .L1781+4
 	mov	r2, #0
-.L1751:
+.L1759:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	add	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1752
+	blt	.L1760
 	ldrh	r6, [r4, #40]
 	mov	r5, #0
-.L1753:
+.L1761:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1754
+	bhi	.L1762
 	ldrh	r1, [r4, #32]
 	sub	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1755
-.L1759:
+	bge	.L1763
+.L1767:
 	mov	r0, #0
 	mov	r6, r0
-.L1756:
+.L1764:
 	ldrh	r2, [r4, #40]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1760
+	bhi	.L1768
 	ldrh	r3, [r4, #42]
 	movw	r9, #2572
 	ldrh	r5, [r4, #32]
@@ -12343,7 +12413,7 @@ ftl_low_format:
 	mov	r3, #24
 	mul	r3, r3, r5
 	cmp	r6, r3
-	ble	.L1761
+	ble	.L1769
 	mov	r1, r5
 	sub	r0, r10, r6
 	bl	__udivsi3
@@ -12351,10 +12421,10 @@ ftl_low_format:
 	lsr	r0, r0, #5
 	add	r0, r0, #24
 	strh	r0, [r4, r9]	@ movhi
-.L1761:
+.L1769:
 	ldrh	r3, [r4, #94]
 	cmp	r3, #0
-	beq	.L1763
+	beq	.L1771
 	movw	r2, #2572
 	ldrh	r1, [r4, r2]
 	add	r1, r1, r3, lsr #1
@@ -12365,9 +12435,9 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r7, r3
 	strhlt	r3, [r4, r2]	@ movhi
-.L1763:
+.L1771:
 	movw	r3, #2572
-	ldr	r6, .L1773+8
+	ldr	r6, .L1781+8
 	ldrh	r2, [r4, r3]
 	mvn	r7, #0
 	ldr	r3, [r4, #2504]
@@ -12384,7 +12454,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	mov	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r5, .L1773+12
+	ldr	r5, .L1781+12
 	lsl	r2, r2, #1
 	sub	r5, r5, #240
 	bl	ftl_memset
@@ -12407,29 +12477,29 @@ ftl_low_format:
 	ldr	r0, [r4, #24]
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1765:
+.L1773:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1766
+	bne	.L1774
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1765
-.L1752:
+	b	.L1773
+.L1760:
 	ldr	ip, [r4, #3816]
 	mvn	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [ip, r3, lsl #2]
 	ldr	r1, [r4, #3808]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1751
-.L1754:
+	b	.L1759
+.L1762:
 	mov	r0, r6
 	mov	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12437,8 +12507,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1753
-.L1755:
+	b	.L1761
+.L1763:
 	mov	r0, r5
 	bl	__udivsi3
 	ldr	r3, [r4, #132]
@@ -12448,25 +12518,25 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1757:
+.L1765:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1759
+	bls	.L1767
 	mov	r0, r5
 	mov	r1, #1
 	add	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1757
-.L1760:
+	b	.L1765
+.L1768:
 	mov	r1, #0
 	uxth	r0, r0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	mov	r0, r5
 	uxth	r6, r6
-	b	.L1756
-.L1766:
+	b	.L1764
+.L1774:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -12477,7 +12547,7 @@ ftl_low_format:
 	ldr	r2, [r4, #2324]
 	strh	r1, [r2, r3]	@ movhi
 	mov	r3, #0
-	ldr	r2, .L1773+16
+	ldr	r2, .L1781+16
 	movw	r1, #2396
 	strb	r3, [r4, #2402]
 	strh	r3, [r2, #2]	@ movhi
@@ -12488,21 +12558,21 @@ ftl_low_format:
 	strh	r3, [r4, r1]	@ movhi
 	mov	r3, #1
 	strb	r3, [r4, #2404]
-.L1767:
+.L1775:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1768
+	bne	.L1776
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1767
-.L1768:
+	b	.L1775
+.L1776:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -12515,7 +12585,7 @@ ftl_low_format:
 	movw	r3, #2444
 	strh	r5, [r4, r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1773+20
+	ldr	r3, .L1781+20
 	mov	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6, #-4016]
@@ -12530,13 +12600,13 @@ ftl_low_format:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
 	mov	r0, #0
-	ldreq	r3, .L1773+24
+	ldreq	r3, .L1781+24
 	moveq	r2, #1
 	streq	r2, [r3]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1774:
+.L1782:
 	.align	2
-.L1773:
+.L1781:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -12557,13 +12627,13 @@ sftl_init:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1781
+	ldr	r4, .L1789
 	mvn	r3, #0
-	ldr	r5, .L1781+4
-	ldr	r1, .L1781+8
-	ldr	r0, .L1781+12
+	ldr	r5, .L1789+4
+	ldr	r1, .L1789+8
+	ldr	r0, .L1789+12
 	str	r3, [r5]
-	bl	printk
+	bl	sftl_printk
 	mov	r0, r4
 	bl	FtlConstantsInit
 	bl	FtlMemInit
@@ -12572,29 +12642,29 @@ sftl_init:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	bne	.L1779
+	bne	.L1787
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1779
+	bne	.L1787
 	mov	r3, #1
 	str	r3, [r5]
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #15
-	bhi	.L1779
+	bhi	.L1787
 	movw	r4, #8129
-.L1778:
+.L1786:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1778
-.L1779:
+	bne	.L1786
+.L1787:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1782:
+.L1790:
 	.align	2
-.L1781:
+.L1789:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -12627,7 +12697,7 @@ rk_sftl_vendor_dev_ops_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1787
+	ldr	r2, .L1795
 	ldr	r3, [r2, #-4012]
 	cmp	r3, #0
 	streq	r0, [r2, #-4012]
@@ -12635,9 +12705,9 @@ rk_sftl_vendor_dev_ops_register:
 	streq	r1, [r2, #-4008]
 	mvnne	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1788:
+.L1796:
 	.align	2
-.L1787:
+.L1795:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
 	.align	2
@@ -12653,35 +12723,28 @@ rk_sftl_vendor_storage_init:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	mov	r0, #65536
-	ldr	r4, .L1798
+	ldr	r4, .L1806
 	bl	ftl_malloc
 	cmp	r0, #0
 	str	r0, [r4, #-4004]
 	mvneq	r9, #11
-	beq	.L1789
-	ldr	r8, .L1798+4
+	beq	.L1797
+	ldr	r8, .L1806+4
 	mov	r6, #0
 	mov	r5, r6
 	mov	r7, r6
-.L1793:
+.L1801:
 	ldr	r3, [r4, #-4012]
 	mov	r1, #128
 	ldr	r2, [r4, #-4004]
 	lsl	r0, r7, #7
 	blx	r3
 	subs	r9, r0, #0
-	bne	.L1791
-	ldr	r1, [r4, #-4004]
-	ldr	r0, .L1798+8
-	add	r2, r1, #61440
-	ldr	r3, [r1, #4]
-	ldr	r2, [r2, #4092]
-	ldr	r1, [r1]
-	bl	printk
+	bne	.L1799
 	ldr	r2, [r4, #-4004]
 	ldr	r3, [r2]
 	cmp	r3, r8
-	bne	.L1792
+	bne	.L1800
 	add	r1, r2, #61440
 	ldr	r3, [r2, #4]
 	ldr	r1, [r1, #4092]
@@ -12693,26 +12756,26 @@ rk_sftl_vendor_storage_init:
 	cmp	r1, #0
 	movne	r6, r7
 	movne	r5, r3
-.L1792:
+.L1800:
 	add	r7, r7, #1
 	cmp	r7, #2
-	bne	.L1793
+	bne	.L1801
 	cmp	r5, #0
-	beq	.L1794
+	beq	.L1802
 	ldr	r3, [r4, #-4012]
 	mov	r1, #128
 	lsl	r0, r6, #7
 	blx	r3
 	subs	r9, r0, #0
-	beq	.L1789
-.L1791:
+	beq	.L1797
+.L1799:
 	ldr	r0, [r4, #-4004]
 	mvn	r9, #0
 	bl	kfree
 	mov	r3, #0
 	str	r3, [r4, #-4004]
-	b	.L1789
-.L1794:
+	b	.L1797
+.L1802:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
@@ -12722,18 +12785,17 @@ rk_sftl_vendor_storage_init:
 	str	r2, [r3, #4]
 	str	r8, [r3]
 	str	r2, [r1, #4092]
-	ldr	r2, .L1798+12
+	ldr	r2, .L1806+8
 	strh	r5, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1789:
+.L1797:
 	mov	r0, r9
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L1799:
+.L1807:
 	.align	2
-.L1798:
+.L1806:
 	.word	.LANCHOR3
 	.word	1380668996
-	.word	.LC106
 	.word	-1032
 	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
 	.align	2
@@ -12748,26 +12810,26 @@ rk_sftl_vendor_read:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1806
+	ldr	r3, .L1814
 	mov	r4, r0
 	mov	r0, r1
 	ldr	ip, [r3, #-4004]
 	cmp	ip, #0
 	ldrhne	lr, [ip, #10]
 	movne	r3, #0
-	bne	.L1802
-.L1805:
+	bne	.L1810
+.L1813:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1803:
+.L1811:
 	add	r3, r3, #1
-.L1802:
+.L1810:
 	cmp	r3, lr
-	bcs	.L1805
+	bcs	.L1813
 	add	r1, ip, r3, lsl #3
 	ldrh	r5, [r1, #16]
 	cmp	r5, r4
-	bne	.L1803
+	bne	.L1811
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -12778,9 +12840,9 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1807:
+.L1815:
 	.align	2
-.L1806:
+.L1814:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
@@ -12797,23 +12859,23 @@ rk_sftl_vendor_write:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	ip, r1
-	ldr	r8, .L1827
+	ldr	r8, .L1835
 	mov	r9, r2
 	ldr	r4, [r8, #-4004]
 	cmp	r4, #0
-	beq	.L1823
+	beq	.L1831
 	ldrh	r2, [r4, #10]
 	add	r7, r9, #63
 	ldrh	r3, [r4, #8]
 	bic	r7, r7, #63
 	mov	r5, #0
 	str	r3, [fp, #-44]
-.L1810:
+.L1818:
 	cmp	r5, r2
-	bcc	.L1818
+	bcc	.L1826
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1823
+	bhi	.L1831
 	add	r3, r4, r2, lsl #3
 	uxth	r7, r7
 	strh	r0, [r3, #16]	@ movhi
@@ -12845,31 +12907,31 @@ rk_sftl_vendor_write:
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
 	ldr	r3, [r8, #-4008]
-	b	.L1826
-.L1818:
+	b	.L1834
+.L1826:
 	add	r6, r4, r5, lsl #3
 	ldrh	r3, [r6, #16]
 	cmp	r3, r0
 	str	r3, [fp, #-48]
-	bne	.L1811
+	bne	.L1819
 	ldrh	r1, [r6, #20]
 	add	r3, r4, #1024
 	add	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r9, r1
 	str	r1, [fp, #-52]
-	bls	.L1812
+	bls	.L1820
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1823
+	bhi	.L1831
 	ldrh	r8, [r6, #18]
 	sub	r2, r2, #1
 	str	r2, [fp, #-56]
-.L1813:
+.L1821:
 	ldr	r2, [fp, #-56]
 	add	r6, r6, #8
 	cmp	r5, r2
-	bcc	.L1814
+	bcc	.L1822
 	ldrh	r2, [fp, #-48]
 	add	r5, r4, r5, lsl #3
 	uxth	r8, r8
@@ -12888,7 +12950,7 @@ rk_sftl_vendor_write:
 	strh	r8, [r4, #12]	@ movhi
 	add	r7, r7, r3
 	strh	r7, [r4, #14]	@ movhi
-.L1815:
+.L1823:
 	ldr	r3, [r4, #4]
 	add	r2, r4, #61440
 	add	r3, r3, #1
@@ -12900,19 +12962,19 @@ rk_sftl_vendor_write:
 	cmp	r3, #1
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1827
+	ldr	r3, .L1835
 	ldr	r3, [r3, #-4008]
-.L1826:
+.L1834:
 	ldr	r0, [fp, #-44]
 	mov	r2, r4
 	mov	r1, #128
 	lsl	r0, r0, #7
 	blx	r3
 	mov	r0, #0
-.L1808:
+.L1816:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1814:
+.L1822:
 	ldrh	r10, [r6, #20]
 	add	r0, r3, r8
 	ldrh	r2, [r6, #16]
@@ -12931,8 +12993,8 @@ rk_sftl_vendor_write:
 	bl	memcpy
 	ldr	ip, [fp, #-64]
 	ldr	r3, [fp, #-60]
-	b	.L1813
-.L1812:
+	b	.L1821
+.L1820:
 	add	r5, r4, r5, lsl #3
 	mov	r2, r9
 	mov	r1, ip
@@ -12940,16 +13002,16 @@ rk_sftl_vendor_write:
 	add	r0, r3, r0
 	bl	memcpy
 	strh	r9, [r6, #20]	@ movhi
-	b	.L1815
-.L1811:
+	b	.L1823
+.L1819:
 	add	r5, r5, #1
-	b	.L1810
-.L1823:
+	b	.L1818
+.L1831:
 	mvn	r0, #0
-	b	.L1808
-.L1828:
+	b	.L1816
+.L1836:
 	.align	2
-.L1827:
+.L1835:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
@@ -12970,18 +13032,18 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	subs	r4, r0, #0
 	mvneq	r5, #0
-	beq	.L1829
-	ldr	r3, .L1854
+	beq	.L1837
+	ldr	r3, .L1862
 	cmp	r6, r3
-	beq	.L1832
+	beq	.L1840
 	add	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1833
-.L1849:
+	beq	.L1841
+.L1857:
 	mvn	r5, #13
-	b	.L1831
-.L1832:
-	ldr	r6, .L1854+4
+	b	.L1839
+.L1840:
+	ldr	r6, .L1862+4
 	mov	r3, sp
 	and	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -12992,31 +13054,31 @@ rk_sftl_vendor_storage_ioctl:
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1839
+	bne	.L1847
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1849
+	bne	.L1857
 	ldr	r2, [r4]
-	ldr	r3, .L1854+8
+	ldr	r3, .L1862+8
 	cmp	r2, r3
-	beq	.L1837
-.L1838:
+	beq	.L1845
+.L1846:
 	mvn	r5, #0
-.L1831:
+.L1839:
 	mov	r0, r4
 	bl	kfree
-.L1829:
+.L1837:
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1837:
+.L1845:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	cmn	r0, #1
-	beq	.L1838
+	beq	.L1846
 	mov	r3, sp
 	uxth	r2, r0
 	and	r6, r6, r3
@@ -13030,15 +13092,15 @@ rk_sftl_vendor_storage_ioctl:
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1849
+	bne	.L1857
 	mov	r0, r5
 	mov	r1, r4
 	bl	arm_copy_to_user
 	subs	r5, r0, #0
-	beq	.L1831
-	b	.L1849
-.L1833:
-	ldr	r6, .L1854+4
+	beq	.L1839
+	b	.L1857
+.L1841:
+	ldr	r6, .L1862+4
 	mov	r3, sp
 	and	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13049,20 +13111,20 @@ rk_sftl_vendor_storage_ioctl:
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1839
+	bne	.L1847
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1849
+	bne	.L1857
 	ldr	r2, [r4]
-	ldr	r3, .L1854+8
+	ldr	r3, .L1862+8
 	cmp	r2, r3
-	bne	.L1838
+	bne	.L1846
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1838
+	bhi	.L1846
 	mov	r3, sp
 	add	r2, r2, #8
 	and	r6, r6, r3
@@ -13076,26 +13138,26 @@ rk_sftl_vendor_storage_ioctl:
 	cmp	r3, #0
 	movne	r1, r2
 	movne	r0, r4
-	bne	.L1853
+	bne	.L1861
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1849
+	bne	.L1857
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
 	mov	r5, r0
-	b	.L1831
-.L1839:
+	b	.L1839
+.L1847:
 	mov	r1, #8
-.L1853:
+.L1861:
 	bl	__memzero
-	b	.L1849
-.L1855:
+	b	.L1857
+.L1863:
 	.align	2
-.L1854:
+.L1862:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13112,12 +13174,12 @@ rk_sftl_vendor_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r0, .L1857
+	ldr	r0, .L1865
 	bl	misc_register
 	ldmfd	sp, {fp, sp, pc}
-.L1858:
+.L1866:
 	.align	2
-.L1857:
+.L1865:
 	.word	.LANCHOR2+12
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
@@ -13271,141 +13333,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3927, %object
-	.size	__func__.3927, 17
-__func__.3927:
+	.type	__func__.3929, %object
+	.size	__func__.3929, 17
+__func__.3929:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.3922, %object
-	.size	__func__.3922, 17
-__func__.3922:
+	.type	__func__.3924, %object
+	.size	__func__.3924, 17
+__func__.3924:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.3958, %object
-	.size	__func__.3958, 17
-__func__.3958:
+	.type	__func__.3960, %object
+	.size	__func__.3960, 17
+__func__.3960:
 	.ascii	"List_remove_node\000"
-	.type	__func__.3990, %object
-	.size	__func__.3990, 22
-__func__.3990:
+	.type	__func__.3992, %object
+	.size	__func__.3992, 22
+__func__.3992:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.4096, %object
-	.size	__func__.4096, 22
-__func__.4096:
+	.type	__func__.4098, %object
+	.size	__func__.4098, 22
+__func__.4098:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.4419, %object
-	.size	__func__.4419, 16
-__func__.4419:
+	.type	__func__.4421, %object
+	.size	__func__.4421, 16
+__func__.4421:
 	.ascii	"make_superblock\000"
-	.type	__func__.4594, %object
-	.size	__func__.4594, 19
-__func__.4594:
+	.type	__func__.4596, %object
+	.size	__func__.4596, 19
+__func__.4596:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.14923, %object
-	.size	__func__.14923, 15
-__func__.14923:
+	.type	__func__.14933, %object
+	.size	__func__.14933, 15
+__func__.14933:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.14940, %object
-	.size	__func__.14940, 15
-__func__.14940:
+	.type	__func__.14950, %object
+	.size	__func__.14950, 15
+__func__.14950:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.4032, %object
-	.size	__func__.4032, 26
-__func__.4032:
+	.type	__func__.4034, %object
+	.size	__func__.4034, 26
+__func__.4034:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.3536, %object
-	.size	__func__.3536, 11
-__func__.3536:
+	.type	__func__.3538, %object
+	.size	__func__.3538, 11
+__func__.3538:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.3762, %object
-	.size	__func__.3762, 14
-__func__.3762:
+	.type	__func__.3764, %object
+	.size	__func__.3764, 14
+__func__.3764:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.3999, %object
-	.size	__func__.3999, 16
-__func__.3999:
+	.type	__func__.4001, %object
+	.size	__func__.4001, 16
+__func__.4001:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.4057, %object
-	.size	__func__.4057, 31
-__func__.4057:
+	.type	__func__.4059, %object
+	.size	__func__.4059, 31
+__func__.4059:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.4071, %object
-	.size	__func__.4071, 16
-__func__.4071:
+	.type	__func__.4073, %object
+	.size	__func__.4073, 16
+__func__.4073:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.4043, %object
-	.size	__func__.4043, 15
-__func__.4043:
+	.type	__func__.4045, %object
+	.size	__func__.4045, 15
+__func__.4045:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.4113, %object
-	.size	__func__.4113, 9
-__func__.4113:
+	.type	__func__.4115, %object
+	.size	__func__.4115, 9
+__func__.4115:
 	.ascii	"log2phys\000"
-	.type	__func__.4328, %object
-	.size	__func__.4328, 16
-__func__.4328:
+	.type	__func__.4330, %object
+	.size	__func__.4330, 16
+__func__.4330:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.4481, %object
-	.size	__func__.4481, 14
-__func__.4481:
+	.type	__func__.4483, %object
+	.size	__func__.4483, 14
+__func__.4483:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.4208, %object
-	.size	__func__.4208, 14
-__func__.4208:
+	.type	__func__.4210, %object
+	.size	__func__.4210, 14
+__func__.4210:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.4440, %object
-	.size	__func__.4440, 18
-__func__.4440:
+	.type	__func__.4442, %object
+	.size	__func__.4442, 18
+__func__.4442:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.4566, %object
-	.size	__func__.4566, 25
-__func__.4566:
+	.type	__func__.4568, %object
+	.size	__func__.4568, 25
+__func__.4568:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.4607, %object
-	.size	__func__.4607, 16
-__func__.4607:
+	.type	__func__.4609, %object
+	.size	__func__.4609, 16
+__func__.4609:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.4614, %object
-	.size	__func__.4614, 20
-__func__.4614:
+	.type	__func__.4616, %object
+	.size	__func__.4616, 20
+__func__.4616:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.4362, %object
-	.size	__func__.4362, 22
-__func__.4362:
+	.type	__func__.4364, %object
+	.size	__func__.4364, 22
+__func__.4364:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.3805, %object
-	.size	__func__.3805, 11
-__func__.3805:
+	.type	__func__.3807, %object
+	.size	__func__.3807, 11
+__func__.3807:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.4186, %object
-	.size	__func__.4186, 15
-__func__.4186:
+	.type	__func__.4188, %object
+	.size	__func__.4188, 15
+__func__.4188:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.4465, %object
-	.size	__func__.4465, 21
-__func__.4465:
+	.type	__func__.4467, %object
+	.size	__func__.4467, 21
+__func__.4467:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.4587, %object
-	.size	__func__.4587, 29
-__func__.4587:
+	.type	__func__.4589, %object
+	.size	__func__.4589, 29
+__func__.4589:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.3660, %object
-	.size	__func__.3660, 13
-__func__.3660:
+	.type	__func__.3662, %object
+	.size	__func__.3662, 13
+__func__.3662:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.4684, %object
-	.size	__func__.4684, 19
-__func__.4684:
+	.type	__func__.4686, %object
+	.size	__func__.4686, 19
+__func__.4686:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.4790, %object
-	.size	__func__.4790, 23
-__func__.4790:
+	.type	__func__.4792, %object
+	.size	__func__.4792, 23
+__func__.4792:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.3688, %object
-	.size	__func__.3688, 9
-__func__.3688:
+	.type	__func__.3690, %object
+	.size	__func__.3690, 9
+__func__.3690:
 	.ascii	"FtlWrite\000"
-	.type	__func__.4265, %object
-	.size	__func__.4265, 15
-__func__.4265:
+	.type	__func__.4267, %object
+	.size	__func__.4267, 15
+__func__.4267:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -13435,7 +13497,7 @@ power_up_flag:
 	.size	rkflash_vender_storage_dev, 40
 rkflash_vender_storage_dev:
 	.word	255
-	.word	.LC107
+	.word	.LC110
 	.word	rk_sftl_vendor_storage_fops
 	.space	28
 	.bss
@@ -14219,70 +14281,76 @@ check_vpc_table:
 .LC74:
 	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
 .LC75:
-	.ascii	"\0014\000"
+	.ascii	"%s %p + 0x%x:\000"
 .LC76:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"0x%08x,\000"
 .LC77:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"0x%04x,\000"
 .LC78:
-	.ascii	"prog read d error: = %x %x %x\012\000"
+	.ascii	"0x%02x,\000"
 .LC79:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+	.ascii	"\012\000"
 .LC80:
+	.ascii	"prog read error: = %x\012\000"
+.LC81:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC82:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+.LC83:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC84:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-.LC81:
+.LC85:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
-.LC82:
+.LC86:
 	.ascii	"%s error allocating memory. return -1\012\000"
-.LC83:
+.LC87:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC84:
+.LC88:
 	.ascii	"spare:\000"
-.LC85:
+.LC89:
 	.ascii	"map_ppn:\000"
-.LC86:
+.LC90:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC87:
+.LC91:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-.LC88:
+.LC92:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC89:
+.LC93:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC90:
+.LC94:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC91:
+.LC95:
 	.ascii	"...%s enter...\012\000"
-.LC92:
+.LC96:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC93:
+.LC97:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC94:
+.LC98:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC95:
+.LC99:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC96:
+.LC100:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC97:
+.LC101:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC98:
+.LC102:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC99:
+.LC103:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC100:
+.LC104:
 	.ascii	"no ect\000"
-.LC101:
+.LC105:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC102:
+.LC106:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC103:
+.LC107:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC104:
+.LC108:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC105:
+.LC109:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC106:
-	.ascii	"\0013vendor storage %x,%x,%x\012\000"
-.LC107:
-	.ascii	"vendor_storage\000"
\ No newline at end of file
+.LC110:
+	.ascii	"vendor_storage\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v7_thumb.S b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
index 0ea7136a78fc2..cfc34a4080f78 100644
--- a/drivers/rkflash/rk_sftl_arm_v7_thumb.S
+++ b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-19
+ * date: 2018-08-07
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -15,7 +15,41 @@
 	.eabi_attribute 34, 1
 	.eabi_attribute 18, 4
 	.file	"rk_sftl.c"
+	.syntax unified
+	.macro	it, cond
+	.endm
+	.macro	itt, cond
+	.endm
+	.macro	ite, cond
+	.endm
+	.macro	ittt, cond
+	.endm
+	.macro	itte, cond
+	.endm
+	.macro	itet, cond
+	.endm
+	.macro	itee, cond
+	.endm
+	.macro	itttt, cond
+	.endm
+	.macro	ittte, cond
+	.endm
+	.macro	ittet, cond
+	.endm
+	.macro	ittee, cond
+	.endm
+	.macro	itett, cond
+	.endm
+	.macro	itete, cond
+	.endm
+	.macro	iteet, cond
+	.endm
+	.macro	iteee, cond
+	.endm
+
 	.global	__aeabi_uidiv
+	.thumb
+	.syntax unified
 	.text
 	.align	1
 	.syntax unified
@@ -397,7 +431,7 @@ FtlBbmMapBadBlock:
 	str	r0, [sp]
 	mov	r1, r5
 	ldr	r0, .L40+4
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r4, #158]
 	movs	r0, #0
 	adds	r3, r3, #1
@@ -971,7 +1005,7 @@ INSERT_DATA_LIST:
 	ldr	r1, .L117+4
 	ldr	r0, .L117+8
 	pop	{r3, lr}
-	b	printk
+	b	sftl_printk
 .L115:
 	pop	{r3, pc}
 .L118:
@@ -1086,7 +1120,7 @@ INSERT_FREE_LIST:
 	ldr	r1, .L130+4
 	ldr	r0, .L130+8
 	pop	{r3, lr}
-	b	printk
+	b	sftl_printk
 .L128:
 	pop	{r3, pc}
 .L131:
@@ -1126,7 +1160,7 @@ List_remove_node:
 	movw	r2, #379
 	ldr	r1, .L138+4
 	ldr	r0, .L138+8
-	bl	printk
+	bl	sftl_printk
 .L133:
 	ldr	r3, [r8]
 	movw	r1, #65535
@@ -1337,7 +1371,7 @@ List_update_data_list:
 	mov	r2, #470
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
-	bl	printk
+	bl	sftl_printk
 .L163:
 	ldrh	r3, [r8, #2]
 	movw	r2, #65535
@@ -1370,7 +1404,7 @@ List_update_data_list:
 	movw	r2, #481
 	ldr	r1, .L169+4
 	ldr	r0, .L169+8
-	bl	printk
+	bl	sftl_printk
 .L166:
 	ldrh	r3, [r4, #2336]
 	mov	r0, r5
@@ -1442,7 +1476,7 @@ select_l2p_ram_region:
 	mov	r2, #784
 	ldr	r1, .L181+4
 	ldr	r0, .L181+8
-	bl	printk
+	bl	sftl_printk
 	b	.L173
 .L174:
 	adds	r1, r1, #1
@@ -1726,7 +1760,7 @@ make_superblock:
 	movw	r2, #2097
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
-	bl	printk
+	bl	sftl_printk
 .L216:
 	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
@@ -2603,7 +2637,7 @@ GetSwlReplaceBlock:
 	ldrh	r3, [r3, fp]
 	str	r3, [sp]
 	ldr	r3, [r4, #2564]
-	bl	printk
+	bl	sftl_printk
 	movs	r3, #1
 	str	r3, [r4, #3160]
 	b	.L275
@@ -2689,7 +2723,7 @@ get_new_active_ppa:
 	movw	r2, #2707
 	ldr	r1, .L309
 	ldr	r0, .L309+4
-	bl	printk
+	bl	sftl_printk
 .L296:
 	ldr	r5, .L309+8
 	ldrh	r2, [r4, #2]
@@ -2699,14 +2733,14 @@ get_new_active_ppa:
 	movw	r2, #2708
 	ldr	r1, .L309
 	ldr	r0, .L309+4
-	bl	printk
+	bl	sftl_printk
 .L297:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L298
 	movw	r2, #2709
 	ldr	r1, .L309
 	ldr	r0, .L309+4
-	bl	printk
+	bl	sftl_printk
 .L298:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
@@ -2749,7 +2783,7 @@ get_new_active_ppa:
 	movw	r2, #2730
 	ldr	r1, .L309
 	ldr	r0, .L309+4
-	bl	printk
+	bl	sftl_printk
 .L295:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
@@ -3079,7 +3113,7 @@ FtlGcRefreshBlock:
 	mov	r1, r0
 	mov	r4, r0
 	ldr	r0, .L356
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, .L356+4
 	ldrh	r0, [r3, #3202]
 	cmp	r4, r0
@@ -3126,7 +3160,7 @@ FtlGcMarkBadPhyBlk:
 	mov	r6, r0
 	ldrh	r1, [r4, #3206]
 	ldr	r0, .L362+4
-	bl	printk
+	bl	sftl_printk
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4, #3206]
@@ -3247,27 +3281,62 @@ rknand_print_hex:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, lr}
-	.save {r4, lr}
-	.pad #16
-	muls	r3, r2, r3
-	movs	r4, #0
-	str	r1, [sp, #4]
-	mov	r1, r0
-	str	r4, [sp, #12]
-	str	r3, [sp, #8]
-	movs	r3, #16
-	str	r2, [sp]
-	movs	r2, #2
-	ldr	r0, .L377
-	bl	print_hex_dump
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, pc}
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	movs	r6, #0
+	ldr	fp, .L385+16
+	mov	r10, r0
+	mov	r7, r1
+	mov	r8, r2
+	mov	r9, r3
+	mov	r5, r6
+	mov	r4, r6
+.L377:
+	cmp	r4, r9
+	bcc	.L383
+	ldr	r0, .L385
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	b	sftl_printk
+.L383:
+	cbnz	r5, .L378
+	mov	r3, r6
+	mov	r2, r7
+	mov	r1, r10
+	ldr	r0, .L385+4
+	bl	sftl_printk
 .L378:
+	cmp	r8, #4
+	bne	.L379
+	ldr	r1, [r7, r4, lsl #2]
+	ldr	r0, .L385+8
+.L384:
+	adds	r5, r5, #1
+	bl	sftl_printk
+	cmp	r5, #15
+	bls	.L382
+	movs	r5, #0
+	ldr	r0, .L385
+	bl	sftl_printk
+.L382:
+	adds	r4, r4, #1
+	add	r6, r6, r8
+	b	.L377
+.L379:
+	cmp	r8, #2
+	ittee	eq
+	ldrheq	r1, [r7, r4, lsl #1]
+	moveq	r0, fp
+	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
+	ldrne	r0, .L385+12
+	b	.L384
+.L386:
 	.align	2
-.L377:
+.L385:
+	.word	.LC79
 	.word	.LC75
+	.word	.LC76
+	.word	.LC78
+	.word	.LC77
 	.fnend
 	.size	rknand_print_hex, .-rknand_print_hex
 	.align	1
@@ -3285,30 +3354,30 @@ FlashReadPages:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	mov	r8, r1
-	ldr	r5, .L397
+	ldr	r5, .L405
 	mov	r4, r0
 	movs	r6, #0
-	ldr	r10, .L397+4
+	ldr	r10, .L405+4
 	ldrh	r9, [r5, #12]
-	ldr	fp, .L397+8
-.L380:
+	ldr	fp, .L405+8
+.L388:
 	cmp	r6, r8
-	bne	.L387
+	bne	.L395
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L387:
+.L395:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L381
+	cbz	r3, .L389
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L382
-.L381:
-	movs	r2, #76
+	cbnz	r3, .L390
+.L389:
+	movs	r2, #101
 	mov	r1, r10
 	mov	r0, fp
-	bl	printk
-.L382:
+	bl	sftl_printk
+.L390:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r4
@@ -3322,7 +3391,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L384
+	bne	.L392
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #4]
@@ -3333,27 +3402,27 @@ FlashReadPages:
 	add	r1, r1, r9
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L385
+	beq	.L393
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L384
+	bne	.L392
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L384
+	bne	.L392
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L384
-.L385:
+	beq	.L392
+.L393:
 	mov	r3, #-1
 	str	r3, [r4]
-.L384:
+.L392:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L380
-.L398:
+	b	.L388
+.L406:
 	.align	2
-.L397:
+.L405:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3373,7 +3442,7 @@ FtlLoadFactoryBbt:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r6, #0
-	ldr	r4, .L409
+	ldr	r4, .L417
 	movw	r10, #61664
 	ldr	r3, [r4, #3280]
 	add	r7, r4, #162
@@ -3381,23 +3450,23 @@ FtlLoadFactoryBbt:
 	addw	r9, r4, #3260
 	str	r3, [r4, #3268]
 	str	r8, [r4, #3272]
-.L400:
+.L408:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L405
+	bcc	.L413
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L405:
+.L413:
 	ldrh	r5, [r4, #98]
 	movw	r3, #65535
 	strh	r3, [r7, #2]!	@ movhi
-.L402:
+.L410:
 	ldrh	r3, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L403
+	ble	.L411
 	mla	r3, r6, r3, r5
 	movs	r2, #1
 	mov	r1, r2
@@ -3407,17 +3476,17 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L402
+	beq	.L410
 	ldrh	r3, [r8]
 	cmp	r3, r10
-	bne	.L402
+	bne	.L410
 	strh	r5, [r7]	@ movhi
-.L403:
+.L411:
 	adds	r6, r6, #1
-	b	.L400
-.L410:
+	b	.L408
+.L418:
 	.align	2
-.L409:
+.L417:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -3432,7 +3501,7 @@ FtlGetLastWrittenPage:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L419
+	ldr	r3, .L427
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
@@ -3447,7 +3516,7 @@ FtlGetLastWrittenPage:
 	it	ne
 	ldrhne	r4, [r3, #102]
 	add	r0, sp, #4
-	ldr	r3, .L419+4
+	ldr	r3, .L427+4
 	subs	r4, r4, #1
 	sxth	r5, r4
 	str	r3, [sp, #12]
@@ -3458,17 +3527,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L414
+	bne	.L422
 	mov	r8, #0
-.L415:
+.L423:
 	cmp	r8, r5
-	ble	.L418
-.L414:
+	ble	.L426
+.L422:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L418:
+.L426:
 	add	r4, r8, r5
 	mov	r2, r6
 	add	r4, r4, r4, lsr #31
@@ -3481,20 +3550,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L416
+	bne	.L424
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L416
+	bne	.L424
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L415
-.L416:
+	b	.L423
+.L424:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L415
-.L420:
+	b	.L423
+.L428:
 	.align	2
-.L419:
+.L427:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -3513,7 +3582,7 @@ FlashProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	fp, r1
-	ldr	r6, .L451
+	ldr	r6, .L459
 	mov	r9, r2
 	mov	r4, r0
 	mov	r5, r0
@@ -3522,28 +3591,28 @@ FlashProgPages:
 	sub	sp, sp, #44
 	ldrh	r10, [r6, #12]
 	str	r3, [sp, #4]
-.L422:
+.L430:
 	cmp	r8, fp
-	bne	.L430
+	bne	.L438
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L437
-.L450:
+	bne	.L445
+.L458:
 	movs	r0, #0
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L430:
+.L438:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L423
+	cbz	r3, .L431
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L424
-.L423:
-	movs	r2, #106
-	ldr	r1, .L451+4
-	ldr	r0, .L451+8
-	bl	printk
-.L424:
+	cbnz	r3, .L432
+.L431:
+	movs	r2, #131
+	ldr	r1, .L459+4
+	ldr	r0, .L459+8
+	bl	sftl_printk
+.L432:
 	add	r2, sp, #12
 	add	r1, sp, #16
 	mov	r0, r5
@@ -3554,12 +3623,12 @@ FlashProgPages:
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r7, [r6, #3252]
 	blx	r7
-	cbnz	r0, .L425
+	cbnz	r0, .L433
 	str	r0, [r5]
-.L426:
+.L434:
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L428
+	bne	.L436
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
@@ -3569,18 +3638,18 @@ FlashProgPages:
 	ldr	r7, [r6, #3252]
 	add	r1, r1, r10
 	blx	r7
-	cbz	r0, .L428
+	cbz	r0, .L436
 	mov	r3, #-1
 	str	r3, [r5]
-.L428:
+.L436:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L422
-.L425:
+	b	.L430
+.L433:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L426
-.L435:
+	b	.L434
+.L443:
 	movs	r3, #0
 	mov	r2, r9
 	str	r3, [r7]
@@ -3594,61 +3663,61 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [sp, #20]
 	adds	r2, r3, #1
-	bne	.L432
+	bne	.L440
 	ldr	r1, [r4, #4]
 	mov	r0, fp
 	str	r3, [sp, #4]
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [sp, #4]
 	str	r3, [r4]
-.L432:
+.L440:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L433
+	cbz	r3, .L441
 	ldr	r2, [r3]
 	ldr	r3, [r6, #3288]
 	cmp	r2, r3
-	beq	.L433
+	beq	.L441
 	ldr	r1, [r4, #4]
-	ldr	r0, .L451+12
-	bl	printk
+	ldr	r0, .L459+12
+	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L433:
+.L441:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L434
+	cbz	r3, .L442
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L434
+	beq	.L442
 	ldr	r1, [r4, #4]
-	ldr	r0, .L451+16
-	bl	printk
+	ldr	r0, .L459+16
+	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L434:
+.L442:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-.L431:
+.L439:
 	cmp	r8, r5
-	bne	.L435
-	b	.L450
-.L437:
+	bne	.L443
+	b	.L458
+.L445:
 	movs	r5, #0
-	ldr	r7, .L451+20
-	ldr	r10, .L451+24
-	ldr	fp, .L451+28
-	b	.L431
-.L452:
+	ldr	r7, .L459+20
+	ldr	r10, .L459+24
+	ldr	fp, .L459+28
+	b	.L439
+.L460:
 	.align	2
-.L451:
+.L459:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
-	.word	.LC77
-	.word	.LC78
+	.word	.LC81
+	.word	.LC82
 	.word	check_buf
 	.word	.LANCHOR0+3288
-	.word	.LC76
+	.word	.LC80
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
 	.align	1
@@ -3666,19 +3735,19 @@ FlashEraseBlocks:
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
 	mov	r7, r2
-	ldr	r4, .L464
+	ldr	r4, .L472
 	mov	r5, r0
 	movs	r6, #0
 	mov	r9, #-1
 	ldrh	r8, [r4, #12]
-.L454:
+.L462:
 	cmp	r6, r7
-	bne	.L460
+	bne	.L468
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L460:
+.L468:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r5
@@ -3694,21 +3763,21 @@ FlashEraseBlocks:
 	str	r3, [r5]
 	ldrh	r3, [r4, #14]
 	cmp	r3, #4
-	bne	.L458
+	bne	.L466
 	ldr	r1, [sp, #4]
 	ldr	r3, [r4, #3248]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r1, r1, r8
 	blx	r3
-	cbz	r0, .L458
+	cbz	r0, .L466
 	str	r9, [r5]
-.L458:
+.L466:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L454
-.L465:
+	b	.L462
+.L473:
 	.align	2
-.L464:
+.L472:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -3730,12 +3799,12 @@ FtlFreeSysBlkQueueIn:
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L466
-	ldr	r4, .L475
+	bhi	.L474
+	ldr	r4, .L483
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
-	beq	.L466
-	cbz	r1, .L468
+	beq	.L474
+	cbz	r1, .L476
 	bl	P2V_block_in_plane
 	mov	r6, r0
 	ldr	r0, [r4, #3800]
@@ -3751,7 +3820,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	adds	r3, r3, #1
 	str	r3, [r4, #2560]
-.L468:
+.L476:
 	ldrh	r3, [r4, #218]
 	adds	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3761,11 +3830,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
-.L466:
+.L474:
 	pop	{r4, r5, r6, pc}
-.L476:
+.L484:
 	.align	2
-.L475:
+.L483:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -3783,7 +3852,7 @@ FtlLowFormatEraseBlock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, #0
-	ldr	r4, .L522
+	ldr	r4, .L530
 	mov	r7, r1
 	mov	r6, r10
 	mov	r5, r10
@@ -3793,79 +3862,79 @@ FtlLowFormatEraseBlock:
 	mov	fp, r4
 	str	r0, [sp]
 	str	r0, [r4, #3804]
-.L478:
+.L486:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r10
 	cmp	r1, r3
-	bhi	.L483
+	bhi	.L491
 	cmp	r6, #0
-	beq	.L477
+	beq	.L485
 	mov	r8, #0
 	mov	r9, #20
 	mov	r2, r6
 	movs	r1, #0
 	ldr	r0, [r4, #3800]
 	bl	FlashEraseBlocks
-.L486:
+.L494:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L488
+	bhi	.L496
 	cmp	r7, #0
-	beq	.L505
+	beq	.L513
 	ldrh	r3, [r4, #104]
 	mov	r10, #1
 	str	r3, [sp, #4]
 	lsrs	r3, r3, #2
 	str	r3, [sp, #8]
-.L489:
+.L497:
 	mov	r8, #0
 	mov	fp, #20
-.L499:
+.L507:
 	mov	r9, #0
 	mov	r6, r9
-.L490:
+.L498:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r9
 	cmp	r1, r3
-	bhi	.L494
-	cbz	r6, .L477
+	bhi	.L502
+	cbz	r6, .L485
 	mov	r9, #0
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r6
 	ldr	r0, [r4, #3800]
 	bl	FlashProgPages
-.L496:
+.L504:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L498
+	bhi	.L506
 	ldr	r3, [sp, #8]
 	add	r8, r8, r3
 	ldr	r3, [sp, #4]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L499
+	bhi	.L507
 	mov	r8, #0
 	mov	r9, #20
-.L500:
+.L508:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L502
+	bhi	.L510
 	ldr	r3, [sp]
 	cmp	r3, #63
-	bls	.L503
-	cbz	r7, .L477
-.L503:
+	bls	.L511
+	cbz	r7, .L485
+.L511:
 	mov	r2, r6
 	mov	r1, r10
 	ldr	r0, [r4, #3800]
 	bl	FlashEraseBlocks
-.L477:
+.L485:
 	mov	r0, r5
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L483:
+.L491:
 	uxth	r3, r10
 	ldr	r0, [r4, #3800]
 	movs	r2, #0
@@ -3876,13 +3945,13 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r8, r0
-	cbz	r7, .L479
+	cbz	r7, .L487
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L480
-.L479:
+	cbnz	r0, .L488
+.L487:
 	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L481
+	cbnz	r0, .L489
 	ldr	r1, [r4, #3800]
 	lsl	r3, r8, #10
 	ldr	r0, [fp, #3812]
@@ -3899,36 +3968,36 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L480:
+.L488:
 	add	r10, r10, #1
-	b	.L478
-.L481:
+	b	.L486
+.L489:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L480
-.L488:
+	b	.L488
+.L496:
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L487
+	bne	.L495
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L487:
+.L495:
 	add	r8, r8, #1
-	b	.L486
-.L505:
+	b	.L494
+.L513:
 	movs	r3, #6
 	mov	r10, r7
 	str	r3, [sp, #8]
 	movs	r3, #1
 	str	r3, [sp, #4]
-	b	.L489
-.L494:
+	b	.L497
+.L502:
 	uxth	r3, r9
 	ldr	r0, [r4, #3800]
 	movs	r2, #0
@@ -3939,16 +4008,16 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r7, .L491
+	cbz	r7, .L499
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L492
-.L491:
+	cbnz	r0, .L500
+.L499:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L492
+	cbnz	r0, .L500
 	ldr	r1, [r4, #3800]
 	ldr	r3, [sp, #12]
-	ldr	r2, .L522
+	ldr	r2, .L530
 	mla	r1, fp, r6, r1
 	ldr	r0, [r2, #3808]
 	add	r3, r8, r3, lsl #10
@@ -3964,40 +4033,40 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L492:
+.L500:
 	add	r9, r9, #1
-	b	.L490
-.L498:
+	b	.L498
+.L506:
 	mul	r3, fp, r9
 	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L497
+	cbz	r3, .L505
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L497:
+.L505:
 	add	r9, r9, #1
-	b	.L496
-.L502:
-	cbz	r7, .L501
+	b	.L504
+.L510:
+	cbz	r7, .L509
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3800]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L501
+	cbnz	r3, .L509
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L501:
+.L509:
 	add	r8, r8, #1
-	b	.L500
-.L523:
+	b	.L508
+.L531:
 	.align	2
-.L522:
+.L530:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -4014,11 +4083,11 @@ FtlFreeSysBlkQueueOut:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-	ldr	r4, .L531
-	ldr	r6, .L531+4
-.L525:
+	ldr	r4, .L539
+	ldr	r6, .L539+4
+.L533:
 	ldrh	r1, [r4, #218]
-	cbz	r1, .L526
+	cbz	r1, .L534
 	ldrh	r3, [r4, #214]
 	subs	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -4047,26 +4116,26 @@ FtlFreeSysBlkQueueOut:
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L530
+	bhi	.L535
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, pc}
+.L534:
+	ldr	r0, .L539+8
+	bl	sftl_printk
+.L537:
+	b	.L537
+.L535:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
-	bl	printk
-	b	.L525
-.L526:
-	ldr	r0, .L531+8
-	bl	printk
-.L529:
-	b	.L529
-.L530:
-	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, pc}
-.L532:
+	bl	sftl_printk
+	b	.L533
+.L540:
 	.align	2
-.L531:
+.L539:
 	.word	.LANCHOR0
-	.word	.LC80
-	.word	.LC79
+	.word	.LC84
+	.word	.LC83
 	.fnend
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	1
@@ -4086,16 +4155,16 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r1, [r0, #10]
 	movs	r3, #0
 	ldr	r2, [r0, #12]
-.L534:
+.L542:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L537
+	bcs	.L545
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L534
+	bne	.L542
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4103,14 +4172,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L535
-	ldr	r3, .L541
-	ldr	r0, .L541+4
+	bls	.L543
+	ldr	r3, .L549
+	ldr	r0, .L549+4
 	ldrh	r2, [r3, #218]
-	bl	printk
-.L536:
-	b	.L536
-.L535:
+	bl	sftl_printk
+.L544:
+	b	.L544
+.L543:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4119,22 +4188,22 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L537:
+.L545:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L539
+	bhi	.L547
 	movw	r2, #581
-	ldr	r1, .L541+8
-	ldr	r0, .L541+12
-	bl	printk
-.L539:
+	ldr	r1, .L549+8
+	ldr	r0, .L549+12
+	bl	sftl_printk
+.L547:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L542:
+.L550:
 	.align	2
-.L541:
+.L549:
 	.word	.LANCHOR0
-	.word	.LC81
+	.word	.LC85
 	.word	.LANCHOR1+160
 	.word	.LC1
 	.fnend
@@ -4156,8 +4225,8 @@ FlashTestBlk:
 	mov	r4, r0
 	.pad #92
 	sub	sp, sp, #92
-	bls	.L545
-	ldr	r5, .L546
+	bls	.L553
+	ldr	r5, .L554
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -4187,17 +4256,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L543:
+.L551:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L545:
+.L553:
 	movs	r4, #0
-	b	.L543
-.L547:
+	b	.L551
+.L555:
 	.align	2
-.L546:
+.L554:
 	.word	ftl_temp_buf
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4215,7 +4284,7 @@ FlashGetBadBlockList:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r2, #256
-	ldr	r5, .L555
+	ldr	r5, .L563
 	mov	r4, r0
 	mov	r6, r1
 	movs	r1, #255
@@ -4226,31 +4295,31 @@ FlashGetBadBlockList:
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L549
+	bls	.L557
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	memset
 	movs	r0, #0
-.L549:
+.L557:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L554
+	bne	.L562
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L551:
+.L559:
 	cmp	r3, r1
-	bne	.L552
-.L554:
+	bne	.L560
+.L562:
 	pop	{r4, r5, r6, pc}
-.L552:
+.L560:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L551
-.L556:
+	b	.L559
+.L564:
 	.align	2
-.L555:
+.L563:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -4268,9 +4337,9 @@ ftl_memset:
 	push	{r4, lr}
 	.save {r4, lr}
 	mov	r4, r0
-	cbz	r2, .L558
+	cbz	r2, .L566
 	bl	memset
-.L558:
+.L566:
 	mov	r0, r4
 	pop	{r4, pc}
 	.fnend
@@ -4289,7 +4358,7 @@ FtlMemInit:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r3, #65535
-	ldr	r4, .L663
+	ldr	r4, .L671
 	movs	r5, #0
 	movs	r6, #12
 	movs	r7, #20
@@ -4396,7 +4465,7 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r3, [r4, #3852]
 	str	r0, [r4, #3856]
-	ldr	r0, .L663+4
+	ldr	r0, .L671+4
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
@@ -4483,143 +4552,143 @@ FtlMemInit:
 	str	r0, [r4, #180]
 	lsls	r2, r2, #2
 	mov	r1, r2
-.L563:
+.L571:
 	cmp	r3, r6
-	bcc	.L564
-	ldr	r2, .L663+8
+	bcc	.L572
+	ldr	r2, .L671+8
 	movs	r1, #0
 	add	r3, r2, r3, lsl #2
 	adds	r2, r2, #56
 	adds	r3, r3, #24
-.L565:
+.L573:
 	cmp	r2, r3
-	bne	.L566
+	bne	.L574
 	ldr	r3, [r4, #3868]
-	cbnz	r3, .L567
-.L569:
-	ldr	r1, .L663+12
-	ldr	r0, .L663+16
-	bl	printk
+	cbnz	r3, .L575
+.L577:
+	ldr	r1, .L671+12
+	ldr	r0, .L671+16
+	bl	sftl_printk
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L564:
+.L572:
 	ldr	r0, [r4, #180]
 	adds	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [r5, #4]!
-	b	.L563
-.L566:
+	b	.L571
+.L574:
 	str	r1, [r3, #4]!
-	b	.L565
-.L664:
+	b	.L573
+.L672:
 	.align	2
-.L663:
+.L671:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
-	.word	.LC82
-.L567:
+	.word	.LC86
+.L575:
 	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3888]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3832]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3800]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3280]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3808]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #3856]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L569
-	ldr	r3, .L665
+	beq	.L577
+	ldr	r3, .L673
 	ldr	r2, [r3, #3876]
 	cmp	r2, #0
-	beq	.L569
+	beq	.L577
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L569
+	beq	.L577
 	ldr	r3, [r3, #3884]
 	cmp	r3, #0
-	beq	.L569
+	beq	.L577
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L666:
+.L674:
 	.align	2
-.L665:
+.L673:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMemInit, .-FtlMemInit
@@ -4637,30 +4706,30 @@ FtlBbt2Bitmap:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r5, r0
-	ldr	r6, .L673
+	ldr	r6, .L681
 	mov	r7, r1
 	subs	r4, r5, #2
 	movw	r8, #65535
-	ldr	r9, .L673+4
+	ldr	r9, .L681+4
 	addw	r5, r5, #1022
 	ldrh	r2, [r6, #3900]
 	movs	r1, #0
-	ldr	r10, .L673+8
+	ldr	r10, .L681+8
 	mov	r0, r7
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L670:
+.L678:
 	ldrh	r3, [r4, #2]
 	cmp	r3, r8
-	beq	.L667
+	beq	.L675
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L669
+	bhi	.L677
 	movs	r2, #74
 	mov	r1, r9
 	mov	r0, r10
-	bl	printk
-.L669:
+	bl	sftl_printk
+.L677:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -4670,12 +4739,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r7, r1, lsl #2]
-	bne	.L670
-.L667:
+	bne	.L678
+.L675:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L674:
+.L682:
 	.align	2
-.L673:
+.L681:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
@@ -4695,20 +4764,20 @@ load_l2p_region:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L681
+	ldr	r4, .L689
 	mov	r8, r1
 	ldrh	r3, [r4, #136]
 	cmp	r3, r0
-	bcs	.L676
+	bcs	.L684
 	mov	r2, #492
-	ldr	r1, .L681+4
-	ldr	r0, .L681+8
-	bl	printk
-.L676:
+	ldr	r1, .L689+4
+	ldr	r0, .L689+8
+	bl	sftl_printk
+.L684:
 	ldr	r3, [r4, #3888]
 	movs	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-	cbnz	r7, .L677
+	cbnz	r7, .L685
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	ldrh	r2, [r4, #110]
@@ -4721,14 +4790,14 @@ load_l2p_region:
 	ldr	r3, [r4, #2492]
 	add	r5, r5, r3
 	str	r7, [r5, #4]
-.L678:
+.L686:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L677:
+.L685:
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	movs	r2, #1
-	ldr	r0, .L681+12
+	ldr	r0, .L689+12
 	mov	r1, r2
 	str	r7, [r4, #3264]
 	add	r3, r3, r5
@@ -4740,46 +4809,46 @@ load_l2p_region:
 	ldr	r8, [r4, #3272]
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L679
+	beq	.L687
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L681+16
-	bl	printk
+	ldr	r0, .L689+16
+	bl	sftl_printk
 	movs	r3, #4
 	ldr	r1, [r4, #3272]
 	mov	r2, r3
-	ldr	r0, .L681+20
+	ldr	r0, .L689+20
 	bl	rknand_print_hex
 	ldrh	r3, [r4, #136]
 	movs	r2, #4
 	ldr	r1, [r4, #3888]
-	ldr	r0, .L681+24
+	ldr	r0, .L689+24
 	bl	rknand_print_hex
-.L679:
+.L687:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L680
+	beq	.L688
 	movw	r2, #513
-	ldr	r1, .L681+4
-	ldr	r0, .L681+8
-	bl	printk
-.L680:
+	ldr	r1, .L689+4
+	ldr	r0, .L689+8
+	bl	sftl_printk
+.L688:
 	ldr	r3, [r4, #2492]
 	movs	r1, #0
 	adds	r2, r3, r5
 	str	r1, [r2, #4]
 	strh	r6, [r3, r5]	@ movhi
-	b	.L678
-.L682:
+	b	.L686
+.L690:
 	.align	2
-.L681:
+.L689:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0+3260
-	.word	.LC83
-	.word	.LC84
-	.word	.LC85
+	.word	.LC87
+	.word	.LC88
+	.word	.LC89
 	.fnend
 	.size	load_l2p_region, .-load_l2p_region
 	.align	1
@@ -4806,37 +4875,37 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L684:
+.L692:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L688
+	bhi	.L696
 	ldrh	fp, [r5]
 	movs	r6, #0
-	ldr	r2, .L697
+	ldr	r2, .L705
 	mov	r10, r6
-.L689:
+.L697:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L693
+	bhi	.L701
 	mov	r0, r10
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L688:
+.L696:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L685:
+.L693:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L687
+	bhi	.L695
 	adds	r3, r3, #1
-	b	.L684
-.L687:
+	b	.L692
+.L695:
 	uxth	r0, r2
 	adds	r2, r2, #1
 	ldrh	r7, [r9, r0, lsl #1]
@@ -4845,27 +4914,27 @@ ftl_free_no_use_map_blk:
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L685
-.L693:
+	b	.L693
+.L701:
 	ldrh	r1, [r4]
 	uxth	r7, r6
 	cmp	r1, r3
-	bne	.L690
+	bne	.L698
 	ldrh	r1, [r2, #104]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L690:
+.L698:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	fp, r8
 	itt	hi
 	movhi	r10, r3
 	movhi	fp, r8
 	cmp	r8, #0
-	bne	.L692
+	bne	.L700
 	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L692
+	cbz	r0, .L700
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -4874,12 +4943,12 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L692:
+.L700:
 	adds	r6, r6, #1
-	b	.L689
-.L698:
+	b	.L697
+.L706:
 	.align	2
-.L697:
+.L705:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -4901,14 +4970,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L700
+	bne	.L708
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L701
+	cbz	r3, .L709
 	movw	r2, #641
-	ldr	r1, .L709
-	ldr	r0, .L709+4
-	bl	printk
-.L701:
+	ldr	r1, .L717
+	ldr	r0, .L717+4
+	bl	sftl_printk
+.L709:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4920,14 +4989,14 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L702:
+.L710:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L700:
+.L708:
 	ldrh	r6, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L709+8
+	ldr	r5, .L717+8
 	ldr	r2, [r0, #28]
 	ldr	r7, [r0, #24]
 	orr	r3, r3, r6, lsl #10
@@ -4948,27 +5017,27 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	movs	r2, #0
 	mov	r3, r2
-.L703:
+.L711:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L705
+	bhi	.L713
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L709+12
+	ldr	r0, .L717+12
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L702
-.L705:
+	b	.L710
+.L713:
 	uxth	r1, r2
 	ldr	r0, [r7, r1, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L704
+	bne	.L712
 	ldr	r0, [r5, #3280]
 	adds	r3, r3, #1
 	uxth	r3, r3
@@ -4977,12 +5046,12 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r5, #3280]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L704:
+.L712:
 	adds	r2, r2, #1
-	b	.L703
-.L710:
+	b	.L711
+.L718:
 	.align	2
-.L709:
+.L717:
 	.word	.LANCHOR1+227
 	.word	.LC1
 	.word	.LANCHOR0
@@ -5003,13 +5072,13 @@ FtlMapWritePage:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L730
+	ldr	r7, .L738
 	mov	r8, r1
 	mov	r10, r2
 	movs	r6, #0
-	ldr	r9, .L730+20
+	ldr	r9, .L738+20
 	mov	r5, r7
-.L712:
+.L720:
 	ldr	r3, [r7, #2524]
 	adds	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -5017,33 +5086,33 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L713
+	bge	.L721
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L714
-.L713:
+	bne	.L722
+.L721:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L714:
+.L722:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L715
+	cbnz	r3, .L723
 	movw	r2, #699
 	mov	r1, r9
-	ldr	r0, .L730+4
-	bl	printk
-.L715:
+	ldr	r0, .L738+4
+	bl	sftl_printk
+.L723:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L716
+	bcc	.L724
 	mov	r2, #700
 	mov	r1, r9
-	ldr	r0, .L730+4
-	bl	printk
-.L716:
+	ldr	r0, .L738+4
+	bl	sftl_printk
+.L724:
 	ldrh	r2, [r4]
 	movs	r1, #16
 	ldr	r3, [r4, #12]
@@ -5057,7 +5126,7 @@ FtlMapWritePage:
 	bl	__memzero
 	ldr	r3, [r5, #3272]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L730+8
+	ldr	r0, .L738+8
 	strh	r8, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -5073,12 +5142,12 @@ FtlMapWritePage:
 	strh	r3, [r4, #2]	@ movhi
 	ldr	r2, [r5, #3260]
 	adds	r2, r2, #1
-	bne	.L717
+	bne	.L725
 	ldr	r1, [r5, #3264]
 	adds	r6, r6, #1
-	ldr	r0, .L730+12
+	ldr	r0, .L738+12
 	uxth	r6, r6
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	ittt	ls
@@ -5086,35 +5155,35 @@ FtlMapWritePage:
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L719
+	bls	.L727
 	mov	r2, r6
 	ldr	r1, [r5, #3264]
-	ldr	r0, .L730+16
-	bl	printk
-.L720:
-	b	.L720
-.L719:
+	ldr	r0, .L738+16
+	bl	sftl_printk
+.L728:
+	b	.L728
+.L727:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L712
-.L729:
-	b	.L729
-.L717:
+	beq	.L720
+.L737:
+	b	.L737
+.L725:
 	cmp	r3, #1
-	beq	.L712
+	beq	.L720
 	ldr	r2, [r5, #3264]
 	movs	r0, #0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L731:
+.L739:
 	.align	2
-.L730:
+.L738:
 	.word	.LANCHOR0
 	.word	.LC1
 	.word	.LANCHOR0+3260
-	.word	.LC86
-	.word	.LC87
+	.word	.LC90
+	.word	.LC91
 	.word	.LANCHOR1+258
 	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
@@ -5138,16 +5207,16 @@ ftl_map_blk_gc:
 	bl	ftl_free_no_use_map_blk
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L744
+	ldr	r5, .L752
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L733
+	blt	.L741
 	uxth	r0, r0
 	ldrh	r8, [r6, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L733
+	beq	.L741
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L733
+	cbnz	r3, .L741
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r6, r0, lsl #1]	@ movhi
@@ -5157,41 +5226,41 @@ ftl_map_blk_gc:
 	strh	r3, [r4, #8]	@ movhi
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L734
+	bcc	.L742
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L734:
-	ldr	fp, .L744+12
+.L742:
+	ldr	fp, .L752+12
 	movs	r6, #0
-.L735:
+.L743:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L739
+	bhi	.L747
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L733:
+.L741:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L740
+	bcc	.L748
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L740:
+.L748:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L739:
+.L747:
 	uxth	r7, r6
 	ldr	r3, [r9, r7, lsl #2]
 	cmp	r8, r3, lsr #10
-	bne	.L736
+	bne	.L744
 	ldr	r3, [r5, #3844]
-	ldr	r0, .L744+4
+	ldr	r0, .L752+4
 	str	r3, [r5, #3268]
 	ldr	r3, [r5, #3284]
 	str	r3, [r5, #3272]
@@ -5204,29 +5273,29 @@ ftl_map_blk_gc:
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L737
+	beq	.L745
 	movw	r2, #613
-	ldr	r1, .L744+8
+	ldr	r1, .L752+8
 	mov	r0, fp
-	bl	printk
-.L737:
+	bl	sftl_printk
+.L745:
 	ldr	r3, [r5, #3260]
 	adds	r3, r3, #1
-	bne	.L738
+	bne	.L746
 	movs	r3, #0
 	str	r3, [r9, r7, lsl #2]
-.L736:
+.L744:
 	adds	r6, r6, #1
-	b	.L735
-.L738:
+	b	.L743
+.L746:
 	ldr	r2, [r5, #3268]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-	b	.L736
-.L745:
+	b	.L744
+.L753:
 	.align	2
-.L744:
+.L752:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+274
@@ -5247,7 +5316,7 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L747
+	ldr	r5, .L755
 	muls	r4, r0, r4
 	ldr	r3, [r5, #2492]
 	add	r0, r5, #3904
@@ -5262,9 +5331,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L748:
+.L756:
 	.align	2
-.L747:
+.L755:
 	.word	.LANCHOR0
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -5282,7 +5351,7 @@ log2phys:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r7, r1
-	ldr	r4, .L763
+	ldr	r4, .L771
 	mov	r9, r2
 	ldrh	r5, [r4, #108]
 	adds	r3, r5, #7
@@ -5295,20 +5364,20 @@ log2phys:
 	ands	r5, r5, r0
 	cmp	r0, r3
 	uxth	r5, r5
-	bcc	.L750
+	bcc	.L758
 	mov	r2, #808
-	ldr	r1, .L763+4
-	ldr	r0, .L763+8
-	bl	printk
-.L750:
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	sftl_printk
+.L758:
 	ldrh	r2, [r4, #138]
 	movs	r3, #0
 	ldr	r1, [r4, #2492]
 	mov	r10, #12
-.L751:
+.L759:
 	uxth	r6, r3
 	cmp	r6, r2
-	bcc	.L756
+	bcc	.L764
 	bl	select_l2p_ram_region
 	mul	r10, r10, r0
 	ldr	r3, [r4, #2492]
@@ -5317,44 +5386,44 @@ log2phys:
 	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L757
+	beq	.L765
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L757
+	bge	.L765
 	bl	flush_l2p_region
-.L757:
+.L765:
 	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-	b	.L752
-.L756:
+	b	.L760
+.L764:
 	adds	r3, r3, #1
 	mla	r0, r10, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L751
-.L752:
+	bne	.L759
+.L760:
 	movs	r3, #12
 	cmp	r9, #0
-	bne	.L753
+	bne	.L761
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L754:
+.L762:
 	ldr	r2, [r4, #2492]
 	movs	r3, #12
 	mla	r6, r3, r6, r2
 	ldr	r3, [r6, #4]
 	adds	r2, r3, #1
-	beq	.L760
+	beq	.L768
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
-.L760:
+.L768:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L753:
+.L761:
 	muls	r3, r6, r3
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5367,10 +5436,10 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L754
-.L764:
+	b	.L762
+.L772:
 	.align	2
-.L763:
+.L771:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5391,41 +5460,41 @@ FtlReUsePrevPpa:
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
 	mov	r6, r0
-	ldr	r5, .L775
+	ldr	r5, .L783
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5, #2324]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L766
+	cbnz	r3, .L774
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L767
+	cbz	r4, .L775
 	ldr	r1, [r5, #2316]
 	mov	ip, #6
-	ldr	r2, .L775+4
+	ldr	r2, .L783+4
 	movw	lr, #65535
 	ldrh	r0, [r5, #2344]
 	subs	r4, r4, r1
 	asrs	r4, r4, #1
 	muls	r4, r2, r4
 	uxth	r4, r4
-.L768:
+.L776:
 	uxth	r2, r3
 	cmp	r0, r2
-	bls	.L767
+	bls	.L775
 	cmp	r4, r7
-	bne	.L769
+	bne	.L777
 	mov	r1, r4
-	ldr	r0, .L775+8
+	ldr	r0, .L783+8
 	bl	List_remove_node
 	ldrh	r3, [r5, #2344]
-	cbnz	r3, .L770
+	cbnz	r3, .L778
 	mov	r2, #1688
-	ldr	r1, .L775+12
-	ldr	r0, .L775+16
-	bl	printk
-.L770:
+	ldr	r1, .L783+12
+	ldr	r0, .L783+16
+	bl	sftl_printk
+.L778:
 	ldrh	r3, [r5, #2344]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -5433,17 +5502,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5, #2324]
 	ldrh	r3, [r2, r7, lsl #1]
-.L766:
+.L774:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L767
-.L769:
+	b	.L775
+.L777:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, lr
-	bne	.L768
-.L767:
+	bne	.L776
+.L775:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -5451,9 +5520,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L776:
+.L784:
 	.align	2
-.L775:
+.L783:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.word	.LANCHOR0+2340
@@ -5475,42 +5544,42 @@ ftl_scan_all_data:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r6, .L791
+	ldr	r6, .L799
 	.pad #32
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L791+16
+	ldr	r8, .L799+16
 	mov	r4, r6
-	ldr	r0, .L791+4
-	bl	printk
-.L778:
+	ldr	r0, .L799+4
+	bl	sftl_printk
+.L786:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L784
+	bcc	.L792
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L784:
+.L792:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L779
+	cbnz	r3, .L787
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
-	bl	printk
-.L779:
+	bl	sftl_printk
+.L787:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L781
+	beq	.L789
 	str	r3, [r4, #3264]
 	movs	r2, #0
 	ldr	r3, [r4, #3280]
 	movs	r1, #1
 	ldr	r7, [r4, #3284]
-	ldr	r0, .L791+8
+	ldr	r0, .L799+8
 	str	r3, [r4, #3268]
 	str	r5, [r4, #3276]
 	str	r7, [r4, #3272]
@@ -5518,16 +5587,16 @@ ftl_scan_all_data:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	cmp	r3, #256
-	beq	.L782
+	beq	.L790
 	adds	r3, r3, #1
-	beq	.L782
+	beq	.L790
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L781
-.L782:
+	beq	.L789
+.L790:
 	ldr	r2, [r4, #3268]
 	ldr	r3, [r4, #3272]
-	ldr	r0, .L791+12
+	ldr	r0, .L799+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5541,18 +5610,18 @@ ftl_scan_all_data:
 	str	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r2, [r4, #3264]
-	bl	printk
-.L781:
+	bl	sftl_printk
+.L789:
 	adds	r5, r5, #1
-	b	.L778
-.L792:
+	b	.L786
+.L800:
 	.align	2
-.L791:
+.L799:
 	.word	.LANCHOR0
-	.word	.LC88
+	.word	.LC92
 	.word	.LANCHOR0+3260
-	.word	.LC90
-	.word	.LC89
+	.word	.LC94
+	.word	.LC93
 	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	1
@@ -5566,7 +5635,7 @@ FtlReadRefresh:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L806
+	ldr	r3, .L814
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	.pad #88
@@ -5574,17 +5643,17 @@ FtlReadRefresh:
 	mov	r4, r3
 	ldr	r0, [r3, #2716]
 	cmp	r0, #0
-	beq	.L794
+	beq	.L802
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L795
+	bcs	.L803
 	mov	r5, #2048
-.L800:
+.L808:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L797
+	bcs	.L805
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
@@ -5593,10 +5662,10 @@ FtlReadRefresh:
 	adds	r1, r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L798
+	beq	.L806
 	str	r3, [sp, #20]
 	add	r0, sp, #88
-	ldr	r3, .L806+4
+	ldr	r3, .L814+4
 	movs	r1, #1
 	str	r2, [sp, #8]
 	movs	r2, #0
@@ -5607,54 +5676,54 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L797
+	bne	.L805
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L797:
+.L805:
 	mov	r0, #-1
-.L793:
+.L801:
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L798:
+.L806:
 	subs	r5, r5, #1
-	bne	.L800
-	b	.L797
-.L795:
+	bne	.L808
+	b	.L805
+.L803:
 	ldr	r2, [r3, #2508]
 	movs	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L793
-.L794:
+	b	.L801
+.L802:
 	ldr	r1, [r3, #2508]
 	ldr	r6, [r3, #2712]
 	add	r2, r1, #1048576
 	cmp	r6, r2
-	bhi	.L803
+	bhi	.L811
 	ldr	r2, [r3, #2564]
 	lsrs	r5, r2, #10
 	mov	r2, #33554432
 	asrs	r2, r2, r5
 	add	r2, r2, r6
 	cmp	r1, r2
-	bhi	.L803
+	bhi	.L811
 	ldrb	r3, [r3, #2296]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L793
-.L803:
+	bne	.L801
+.L811:
 	movs	r3, #1
 	movs	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L793
-.L807:
+	b	.L801
+.L815:
 	.align	2
-.L806:
+.L814:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -5674,120 +5743,120 @@ ftl_check_vpc:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r4, #0
-	ldr	r6, .L832
-	ldr	r7, .L832+4
-	ldr	r1, .L832+8
+	ldr	r6, .L840
+	ldr	r7, .L840+4
+	ldr	r1, .L840+8
 	mov	r5, r6
-	ldr	r0, .L832+12
-	bl	printk
+	ldr	r0, .L840+12
+	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L832+4
+	ldr	r0, .L840+4
 	bl	__memzero
-.L809:
+.L817:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L811
-	ldr	r8, .L832+4
+	bcc	.L819
+	ldr	r8, .L840+4
 	movs	r4, #0
-	ldr	r10, .L832+24
+	ldr	r10, .L840+24
 	mov	r7, r4
 	movw	r9, #65535
-.L812:
+.L820:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L814
+	bhi	.L822
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L815
+	cbz	r4, .L823
 	ldr	r3, [r5, #2316]
 	movs	r6, #0
 	ldrh	r8, [r5, #2344]
 	mov	fp, #6
-	ldr	r9, .L832+4
+	ldr	r9, .L840+4
 	subs	r4, r4, r3
-	ldr	r3, .L832+16
+	ldr	r3, .L840+16
 	asrs	r4, r4, #1
-	ldr	r10, .L832+28
+	ldr	r10, .L840+28
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L816:
+.L824:
 	uxth	r3, r6
 	cmp	r8, r3
-	bls	.L815
+	bls	.L823
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L817
+	cbz	r2, .L825
 	movs	r7, #1
 	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
-	bl	printk
-.L817:
+	bl	sftl_printk
+.L825:
 	mul	r4, fp, r4
 	ldr	r3, [r5, #2316]
 	adds	r6, r6, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L816
-.L815:
-	cbz	r7, .L808
+	bne	.L824
+.L823:
+	cbz	r7, .L816
 	movw	r2, #2321
-	ldr	r1, .L832+8
-	ldr	r0, .L832+20
-	bl	printk
-.L808:
+	ldr	r1, .L840+8
+	ldr	r0, .L840+20
+	bl	sftl_printk
+.L816:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L811:
+.L819:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L810
+	beq	.L818
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r7, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L810:
+.L818:
 	adds	r4, r4, #1
-	b	.L809
-.L814:
+	b	.L817
+.L822:
 	ldr	r3, [r5, #2324]
 	uxth	r6, r4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L813
+	beq	.L821
 	mov	r1, r6
 	mov	r0, r10
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r9
-	beq	.L813
+	beq	.L821
 	ldrh	r2, [r8, r6, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r7, #1
-.L813:
+.L821:
 	adds	r4, r4, #1
-	b	.L812
-.L833:
+	b	.L820
+.L841:
 	.align	2
-.L832:
+.L840:
 	.word	.LANCHOR0
 	.word	check_vpc_table
 	.word	.LANCHOR1+314
-	.word	.LC91
+	.word	.LC95
 	.word	-1431655765
 	.word	.LC1
-	.word	.LC92
-	.word	.LC93
+	.word	.LC96
+	.word	.LC97
 	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	1
@@ -5805,10 +5874,10 @@ FtlMapBlkWriteDump_data:
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
 	ldr	r3, [r0, #36]
-	cbz	r3, .L834
+	cbz	r3, .L842
 	ldrh	r5, [r0, #6]
 	movs	r3, #0
-	ldr	r4, .L838
+	ldr	r4, .L846
 	ldr	r2, [r0, #24]
 	str	r3, [r0, #36]
 	subs	r5, r5, #1
@@ -5819,27 +5888,27 @@ FtlMapBlkWriteDump_data:
 	str	r1, [r4, #3272]
 	ldr	r2, [r2, r5, lsl #2]
 	str	r2, [r4, #3264]
-	cbz	r2, .L836
+	cbz	r2, .L844
 	movs	r2, #1
 	addw	r0, r4, #3260
 	mov	r1, r2
 	bl	FlashReadPages
-.L837:
+.L845:
 	ldr	r2, [r4, #3268]
 	mov	r1, r5
 	mov	r0, r6
 	pop	{r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L836:
+.L844:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L837
-.L834:
+	b	.L845
+.L842:
 	pop	{r4, r5, r6, pc}
-.L839:
+.L847:
 	.align	2
-.L838:
+.L846:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
@@ -5857,7 +5926,7 @@ FtlScanSysBlk:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r5, #0
-	ldr	r4, .L921
+	ldr	r4, .L929
 	mov	r1, r5
 	.pad #20
 	sub	sp, sp, #20
@@ -5887,10 +5956,10 @@ FtlScanSysBlk:
 	str	r3, [r4, #2576]
 	str	r3, [r4, #2580]
 	str	r3, [r4, #2584]
-.L841:
+.L849:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r8
-	bls	.L883
+	bls	.L891
 	movs	r5, #0
 	ldrh	fp, [r4, #32]
 	ldr	r9, [r4, #3832]
@@ -5899,11 +5968,11 @@ FtlScanSysBlk:
 	mov	r10, #20
 	ldr	r2, [r4, #3176]
 	ldrh	r6, [r4, #112]
-	b	.L884
-.L844:
+	b	.L892
+.L852:
 	str	r3, [sp, #8]
 	mov	r1, r8
-	ldr	r3, .L921+4
+	ldr	r3, .L929+4
 	str	r2, [sp, #12]
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
@@ -5911,7 +5980,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L842
+	cbnz	r0, .L850
 	ldr	r1, [sp, #4]
 	mla	r0, r10, r7, r9
 	lsls	r1, r1, #10
@@ -5926,27 +5995,27 @@ FtlScanSysBlk:
 	bic	r1, r1, #3
 	add	r1, r1, r2
 	str	r1, [r0, #12]
-.L842:
+.L850:
 	adds	r5, r5, #1
-.L884:
+.L892:
 	uxth	r1, r5
 	cmp	fp, r1
-	bhi	.L844
-	cbnz	r7, .L845
-.L882:
+	bhi	.L852
+	cbnz	r7, .L853
+.L890:
 	add	r8, r8, #1
 	uxth	r8, r8
-	b	.L841
-.L845:
+	b	.L849
+.L853:
 	mov	r0, r9
 	mov	r9, #0
 	movs	r2, #1
 	mov	r1, r7
 	bl	FlashReadPages
-.L846:
+.L854:
 	uxth	r3, r9
 	cmp	r7, r3
-	bls	.L882
+	bls	.L890
 	movs	r3, #20
 	mul	r10, r3, r9
 	ldr	r3, [r4, #3832]
@@ -5956,10 +6025,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L849
+	bne	.L857
 	mov	fp, #16
 	movw	r3, #65535
-.L851:
+.L859:
 	ldr	r0, [r4, #3832]
 	str	r3, [sp, #4]
 	add	r0, r0, r10
@@ -5972,71 +6041,71 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L848
+	bne	.L856
 	ldr	r3, [r4, #3832]
 	mov	r2, #-1
 	str	r2, [r3, r10]
 	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L849
-.L850:
+	bne	.L857
+.L858:
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L854
-.L848:
+	b	.L862
+.L856:
 	ldr	r2, [r4, #3832]
 	ldr	r2, [r2, r10]
 	adds	r2, r2, #1
-	bne	.L849
+	bne	.L857
 	add	fp, fp, #-1
 	uxth	fp, fp
 	cmp	fp, #0
-	bne	.L851
-	b	.L850
-.L849:
+	bne	.L859
+	b	.L858
+.L857:
 	ldr	r2, [r4, #2540]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L852
+	beq	.L860
 	cmp	r2, r3
-	bhi	.L853
-.L852:
+	bhi	.L861
+.L860:
 	adds	r2, r3, #1
 	itt	ne
 	addne	r2, r3, #1
 	strne	r2, [r4, #2540]
-.L853:
+.L861:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L855
-	bhi	.L856
+	beq	.L863
+	bhi	.L864
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L857
-.L854:
+	beq	.L865
+.L862:
 	add	r9, r9, #1
-	b	.L846
-.L856:
+	b	.L854
+.L864:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L858
+	beq	.L866
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L850
-	b	.L854
-.L858:
+	beq	.L858
+	b	.L862
+.L866:
 	ldrh	r2, [r4, #3944]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L860
+	bls	.L868
 	movw	r2, #1211
-	ldr	r1, .L921+8
-	ldr	r0, .L921+12
-	bl	printk
-.L860:
+	ldr	r1, .L929+8
+	ldr	r0, .L929+12
+	bl	sftl_printk
+.L868:
 	ldr	r1, [r4, #128]
 	ldrh	r0, [r4, #3944]
 	ldr	r10, [r4, #3892]
@@ -6046,58 +6115,58 @@ FtlScanSysBlk:
 	add	ip, ip, #-1
 	sxth	r3, r3
 	sxth	ip, ip
-.L861:
+.L869:
 	cmp	r3, ip
-	bgt	.L867
+	bgt	.L875
 	cmp	r3, #0
-	bge	.L899
-	b	.L854
-.L867:
+	bge	.L907
+	b	.L862
+.L875:
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	mov	lr, r2
 	ldr	r2, [r10, r3, lsl #2]
 	cmp	lr, r2
-	bls	.L862
+	bls	.L870
 	ldr	r2, [r10]
-	cbnz	r2, .L863
+	cbnz	r2, .L871
 	cmp	r1, r0
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #3944]	@ movhi
-.L863:
+.L871:
 	uxth	ip, r3
 	movs	r2, #0
-.L864:
+.L872:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L865
+	bhi	.L873
 	ldr	r2, [r4, #3892]
 	cmp	r3, #0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
 	ldr	r2, [r4, #3868]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	blt	.L854
+	blt	.L862
 	ldrh	r0, [r4, #3944]
 	ldr	r2, [r4, #128]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L854
-.L899:
+	bgt	.L862
+.L907:
 	ldr	r2, [r4, #3892]
 	adds	r0, r0, #1
 	ldr	r1, [r6, #4]
 	strh	r0, [r4, #3944]	@ movhi
 	str	r1, [r2, r3, lsl #2]
 	ldr	r2, [r4, #3868]
-.L919:
+.L927:
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L854
-.L865:
+	b	.L862
+.L873:
 	ldr	r0, [r4, #3892]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
@@ -6107,79 +6176,79 @@ FtlScanSysBlk:
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L864
-.L862:
+	b	.L872
+.L870:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L861
-.L922:
+	b	.L869
+.L930:
 	.align	2
-.L921:
+.L929:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR1+328
 	.word	.LC1
-.L857:
+.L865:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L870
+	bls	.L878
 	movw	r2, #1252
-	ldr	r1, .L923
-	ldr	r0, .L923+4
-	bl	printk
-.L870:
+	ldr	r1, .L931
+	ldr	r0, .L931+4
+	bl	sftl_printk
+.L878:
 	ldrh	lr, [r4, #120]
 	ldrh	r0, [r4, #144]
 	ldr	r10, [r4, #3880]
 	add	ip, lr, #-1
 	sxth	r3, ip
 	sub	ip, ip, r0
-.L871:
+.L879:
 	cmp	r3, ip
-	ble	.L876
+	ble	.L884
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	ldr	r1, [r10, r3, lsl #2]
 	cmp	r2, r1
-	bls	.L872
+	bls	.L880
 	ldr	r2, [r10]
-	cbnz	r2, .L873
+	cbnz	r2, .L881
 	cmp	lr, r0
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #144]	@ movhi
-.L873:
+.L881:
 	uxth	ip, r3
 	movs	r2, #0
-.L874:
+.L882:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L875
+	bhi	.L883
 	ldr	r2, [r4, #3880]
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
 	ldr	r2, [r4, #148]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L876:
+.L884:
 	cmp	r3, #0
-	blt	.L854
+	blt	.L862
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L854
+	bgt	.L862
 	adds	r1, r1, #1
 	ldr	r2, [r4, #3880]
 	strh	r1, [r4, #144]	@ movhi
 	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
 	ldr	r2, [r4, #148]
-	b	.L919
-.L875:
+	b	.L927
+.L883:
 	ldr	r0, [r4, #3880]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
@@ -6189,81 +6258,81 @@ FtlScanSysBlk:
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L874
-.L872:
+	b	.L882
+.L880:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L871
-.L855:
+	b	.L879
+.L863:
 	ldrh	r1, [r4, #2576]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L878
+	bne	.L886
 	strh	r5, [r4, #2576]	@ movhi
-.L920:
+.L928:
 	str	r3, [r4, #2584]
-	b	.L854
-.L878:
+	b	.L862
+.L886:
 	ldrh	r0, [r4, #2580]
 	cmp	r0, r2
-	beq	.L879
+	beq	.L887
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L879:
+.L887:
 	ldr	r2, [r4, #2584]
 	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L880
+	bcs	.L888
 	ldrh	r3, [r4, #2576]
 	strh	r5, [r4, #2576]	@ movhi
 	strh	r3, [r4, #2580]	@ movhi
 	ldr	r3, [r6, #4]
-	b	.L920
-.L880:
+	b	.L928
+.L888:
 	strh	r5, [r4, #2580]	@ movhi
-	b	.L854
-.L883:
+	b	.L862
+.L891:
 	ldr	r1, [r4, #3868]
 	ldrh	r3, [r1]
-	cbz	r3, .L885
-.L888:
+	cbz	r3, .L893
+.L896:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L886
-.L887:
+	beq	.L894
+.L895:
 	ldrh	r2, [r4, #3944]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L918
+	bls	.L926
 	movw	r2, #1377
-	ldr	r1, .L923
-	ldr	r0, .L923+4
-	bl	printk
-.L918:
+	ldr	r1, .L931
+	ldr	r0, .L931+4
+	bl	sftl_printk
+.L926:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L885:
+.L893:
 	ldrh	r2, [r4, #3944]
 	cmp	r2, #0
-	beq	.L888
+	beq	.L896
 	ldr	r0, [r4, #128]
-.L889:
+.L897:
 	sxth	r2, r3
 	cmp	r2, r0
-	bcs	.L888
+	bcs	.L896
 	ldrh	r5, [r1, r2, lsl #1]
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L889
+	beq	.L897
 	mov	r3, r2
 	movs	r5, #0
-.L890:
+.L898:
 	ldr	r1, [r4, #128]
 	cmp	r3, r1
-	bcs	.L888
+	bcs	.L896
 	ldr	r1, [r4, #3868]
 	subs	r0, r3, r2
 	ldrh	r6, [r1, r3, lsl #1]
@@ -6275,26 +6344,26 @@ FtlScanSysBlk:
 	strh	r5, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L890
-.L886:
+	b	.L898
+.L894:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
-	beq	.L887
+	beq	.L895
 	ldrh	r0, [r4, #120]
-.L895:
+.L903:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	r5, r3
-	bge	.L887
+	bge	.L895
 	ldrh	r6, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r6, #0
-	beq	.L895
+	beq	.L903
 	movs	r0, #0
-.L896:
+.L904:
 	ldrh	r2, [r4, #120]
 	cmp	r3, r2
-	bge	.L887
+	bge	.L895
 	ldr	r2, [r4, #148]
 	subs	r1, r3, r5
 	ldrh	r6, [r2, r3, lsl #1]
@@ -6306,10 +6375,10 @@ FtlScanSysBlk:
 	strh	r0, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L896
-.L924:
+	b	.L904
+.L932:
 	.align	2
-.L923:
+.L931:
 	.word	.LANCHOR1+328
 	.word	.LC1
 	.fnend
@@ -6335,7 +6404,7 @@ FtlMapTblRecovery:
 	ldrh	r10, [r0, #6]
 	str	r3, [sp, #4]
 	ldr	r3, [r0, #16]
-	ldr	r5, .L952
+	ldr	r5, .L960
 	ldr	r9, [r0, #12]
 	lsl	r2, r10, #2
 	str	r3, [sp, #12]
@@ -6359,14 +6428,14 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #8]
 	add	fp, r3, #-1
 	mov	r3, r5
-.L926:
+.L934:
 	ldr	r1, [sp, #8]
 	sxth	r2, r8
 	cmp	r2, r1
-	bge	.L943
+	bge	.L951
 	cmp	r2, fp
 	lsl	r7, r2, #1
-	bne	.L927
+	bne	.L935
 	ldrh	r0, [r9, fp, lsl #1]
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
@@ -6374,27 +6443,27 @@ FtlMapTblRecovery:
 	add	r7, r7, r9
 	strh	r8, [r4]	@ movhi
 	sxth	r9, r0
-	ldr	r8, .L952+4
+	ldr	r8, .L960+4
 	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
 	add	r9, r9, #1
 	ldr	r3, [r3, fp, lsl #2]
 	mov	fp, #0
 	str	r3, [r4, #28]
-.L928:
+.L936:
 	sxth	r2, fp
 	cmp	r2, r9
-	blt	.L930
-.L943:
+	blt	.L938
+.L951:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L932
+	bne	.L940
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L932:
+.L940:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6403,7 +6472,7 @@ FtlMapTblRecovery:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L930:
+.L938:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	orr	r2, r2, r1, lsl #10
@@ -6413,10 +6482,10 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3260]
 	adds	r2, r2, #1
-	beq	.L929
+	beq	.L937
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L929
+	bls	.L937
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r6]
 	cmp	r0, r1
@@ -6424,14 +6493,14 @@ FtlMapTblRecovery:
 	ldreq	r1, [r5, #3264]
 	ldreq	r3, [sp, #4]
 	streq	r1, [r3, r2, lsl #2]
-.L929:
+.L937:
 	add	fp, fp, #1
-	b	.L928
-.L927:
+	b	.L936
+.L935:
 	ldr	r1, [r5, #3280]
 	str	r3, [sp, #20]
 	add	r3, r9, r7
-	ldr	r0, .L952+4
+	ldr	r0, .L960+4
 	str	r1, [r5, #3268]
 	ldrh	r1, [r9, r2, lsl #1]
 	ldrh	r2, [r5, #104]
@@ -6445,24 +6514,24 @@ FtlMapTblRecovery:
 	ldr	r2, [r5, #3260]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L945
+	beq	.L953
 	ldrh	r1, [r6]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L945
+	bne	.L953
 	ldrh	r1, [r6, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L934
-.L945:
+	beq	.L942
+.L953:
 	movs	r7, #0
-.L935:
+.L943:
 	ldrh	r1, [r3, #104]
 	sxth	r2, r7
 	cmp	r2, r1
-	bge	.L941
+	bge	.L949
 	ldr	r1, [sp, #16]
-	ldr	r0, .L952+4
+	ldr	r0, .L960+4
 	str	r3, [sp, #20]
 	ldrh	r1, [r1]
 	orr	r2, r2, r1, lsl #10
@@ -6473,10 +6542,10 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #20]
 	ldr	r2, [r3, #3260]
 	adds	r2, r2, #1
-	beq	.L939
+	beq	.L947
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L939
+	bls	.L947
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
@@ -6484,37 +6553,37 @@ FtlMapTblRecovery:
 	ldreq	r1, [r3, #3264]
 	ldreq	r0, [sp, #4]
 	streq	r1, [r0, r2, lsl #2]
-.L939:
+.L947:
 	adds	r7, r7, #1
-	b	.L935
-.L934:
+	b	.L943
+.L942:
 	movs	r0, #0
 	mov	ip, #4
-.L936:
+.L944:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	subs	r1, r1, #1
 	cmp	r2, r1
-	blt	.L938
-.L941:
+	blt	.L946
+.L949:
 	add	r8, r8, #1
-	b	.L926
-.L938:
+	b	.L934
+.L946:
 	ldr	r7, [r5, #3280]
 	ldr	r1, [r7, r2, lsl #3]
 	uxth	lr, r1
 	cmp	r10, lr
-	bls	.L937
+	bls	.L945
 	add	r2, ip, r2, lsl #3
 	ldr	r2, [r7, r2]
 	ldr	r7, [sp, #4]
 	str	r2, [r7, lr, lsl #2]
-.L937:
+.L945:
 	adds	r0, r0, #1
-	b	.L936
-.L953:
+	b	.L944
+.L961:
 	.align	2
-.L952:
+.L960:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.fnend
@@ -6530,7 +6599,7 @@ FtlLoadVonderInfo:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L955
+	ldr	r0, .L963
 	push	{r3, lr}
 	.save {r3, lr}
 	ldrh	r3, [r0, #120]
@@ -6553,9 +6622,9 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L956:
+.L964:
 	.align	2
-.L955:
+.L963:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6573,7 +6642,7 @@ FtlL2PDataInit:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L960
+	ldr	r4, .L968
 	movs	r6, #12
 	ldr	r2, [r4, #128]
 	ldr	r0, [r4, #3872]
@@ -6589,12 +6658,12 @@ FtlL2PDataInit:
 	mov	r3, r4
 	movw	r1, #65535
 	mov	r7, r2
-.L958:
+.L966:
 	ldrh	r4, [r3, #138]
 	uxth	r0, r2
 	adds	r5, r2, #1
 	cmp	r4, r0
-	bhi	.L959
+	bhi	.L967
 	ldr	r2, [r3, #128]
 	strh	r1, [r3, #3906]	@ movhi
 	strh	r1, [r3, #3904]	@ movhi
@@ -6614,7 +6683,7 @@ FtlL2PDataInit:
 	ldr	r2, [r3, #3888]
 	str	r2, [r3, #3928]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L959:
+.L967:
 	uxth	r2, r2
 	ldr	r0, [r3, #2492]
 	mul	r4, r6, r2
@@ -6630,10 +6699,10 @@ FtlL2PDataInit:
 	add	r2, r2, r4
 	str	r2, [r0, #8]
 	mov	r2, r5
-	b	.L958
-.L961:
+	b	.L966
+.L969:
 	.align	2
-.L960:
+.L968:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -6651,13 +6720,13 @@ FtlLoadMapInfo:
 	push	{r3, lr}
 	.save {r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L963
+	ldr	r0, .L971
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L964:
+.L972:
 	.align	2
-.L963:
+.L971:
 	.word	.LANCHOR0+3904
 	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
@@ -6675,7 +6744,7 @@ FtlVariablesInit:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r5, #0
-	ldr	r4, .L966
+	ldr	r4, .L974
 	movw	r3, #65535
 	mov	r1, r5
 	ldrh	r2, [r4, #120]
@@ -6709,9 +6778,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L967:
+.L975:
 	.align	2
-.L966:
+.L974:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -6730,7 +6799,7 @@ SupperBlkListInit:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r6, #0
-	ldr	r4, .L979
+	ldr	r4, .L987
 	movs	r2, #6
 	mov	r9, r6
 	mov	r7, r6
@@ -6745,37 +6814,37 @@ SupperBlkListInit:
 	str	r6, [r4, #2332]
 	strh	r6, [r4, #2336]	@ movhi
 	strh	r6, [r4, #2344]	@ movhi
-.L969:
+.L977:
 	ldrh	r3, [r4, #40]
 	uxth	r8, r6
 	cmp	r8, r3
-	bcs	.L975
+	bcs	.L983
 	mov	r10, #0
 	ldrh	r2, [r4, #32]
 	ldrh	r3, [r4, #102]
 	mov	r5, r10
-	b	.L976
-.L971:
+	b	.L984
+.L979:
 	mov	r1, r8
 	ldrb	r0, [fp, r10]	@ zero_extendqisi2
 	stm	sp, {r2, r3}
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldm	sp, {r2, r3}
-	cbnz	r0, .L970
+	cbnz	r0, .L978
 	add	r5, r5, r3
 	uxth	r5, r5
-.L970:
+.L978:
 	add	r10, r10, #1
-.L976:
+.L984:
 	uxth	r1, r10
 	cmp	r2, r1
-	bhi	.L971
-	cbz	r5, .L978
+	bhi	.L979
+	cbz	r5, .L986
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L972:
+.L980:
 	ldr	r2, [r4, #2316]
 	uxth	r1, r6
 	movs	r3, #6
@@ -6783,50 +6852,50 @@ SupperBlkListInit:
 	strh	r0, [r3, #4]	@ movhi
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r8
-	beq	.L973
+	beq	.L981
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r8
-	beq	.L973
+	beq	.L981
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r8
-	beq	.L973
+	beq	.L981
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbnz	r3, .L974
+	cbnz	r3, .L982
 	add	r9, r9, #1
 	mov	r0, r8
 	uxth	r9, r9
 	bl	INSERT_FREE_LIST
-.L973:
+.L981:
 	adds	r6, r6, #1
-	b	.L969
-.L978:
+	b	.L977
+.L986:
 	mov	r0, r5
-	b	.L972
-.L974:
+	b	.L980
+.L982:
 	adds	r7, r7, #1
 	mov	r0, r8
 	uxth	r7, r7
 	bl	INSERT_DATA_LIST
-	b	.L973
-.L975:
+	b	.L981
+.L983:
 	strh	r7, [r4, #2336]	@ movhi
 	add	r7, r7, r9
 	cmp	r7, r3
 	strh	r9, [r4, #2344]	@ movhi
-	ble	.L977
+	ble	.L985
 	movw	r2, #2154
-	ldr	r1, .L979+4
-	ldr	r0, .L979+8
-	bl	printk
-.L977:
+	ldr	r1, .L987+4
+	ldr	r0, .L987+8
+	bl	sftl_printk
+.L985:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L980:
+.L988:
 	.align	2
-.L979:
+.L987:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+342
 	.word	.LC1
@@ -6846,7 +6915,7 @@ FtlGcPageVarInit:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r3, #0
-	ldr	r4, .L982
+	ldr	r4, .L990
 	movs	r1, #255
 	ldrh	r2, [r4, #106]
 	ldr	r0, [r4, #3188]
@@ -6862,9 +6931,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L983:
+.L991:
 	.align	2
-.L982:
+.L990:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -6879,7 +6948,7 @@ FtlGcScanTempBlk:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1009
+	ldr	r3, .L1017
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #28
@@ -6889,30 +6958,30 @@ FtlGcScanTempBlk:
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1003
-	cbnz	r4, .L985
-.L986:
+	beq	.L1011
+	cbnz	r4, .L993
+.L994:
 	bl	FtlGcPageVarInit
-	b	.L987
-.L1003:
+	b	.L995
+.L1011:
 	movs	r4, #0
-.L985:
-	ldr	r3, .L1009+4
+.L993:
+	ldr	r3, .L1017+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3, #102]
 	cmp	r3, r2
-	beq	.L986
-.L987:
+	beq	.L994
+.L995:
 	mov	fp, #0
 	movw	r8, #65535
-.L997:
+.L1005:
 	ldrh	r3, [r7]
 	movs	r0, #0
 	strb	r0, [r7, #8]
 	cmp	r3, r8
-	beq	.L988
-	ldr	r5, .L1009+4
-.L1000:
+	beq	.L996
+	ldr	r5, .L1017+4
+.L1008:
 	ldr	r3, [r5, #3832]
 	movs	r2, #0
 	ldrh	ip, [r5, #32]
@@ -6927,35 +6996,35 @@ FtlGcScanTempBlk:
 	str	r3, [sp, #16]
 	ldrh	r3, [r5, #112]
 	str	r3, [sp, #20]
-.L989:
+.L997:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L993
+	bhi	.L1001
 	mov	r9, #0
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.L994:
+.L1002:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L998
+	bhi	.L1006
 	ldr	r3, [sp, #8]
 	add	fp, fp, #1
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, fp
-	bls	.L999
-.L1001:
+	bls	.L1007
+.L1009:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L1000
+	bhi	.L1008
 	movs	r0, #0
-	b	.L988
-.L993:
+	b	.L996
+.L1001:
 	ldrh	r3, [lr], #2
 	cmp	r3, r8
-	beq	.L990
+	beq	.L998
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r9, r6, r1
@@ -6978,10 +7047,10 @@ FtlGcScanTempBlk:
 	str	r0, [r1, #8]
 	add	r3, r3, r10
 	str	r3, [r1, #12]
-.L990:
-	adds	r2, r2, #1
-	b	.L989
 .L998:
+	adds	r2, r2, #1
+	b	.L997
+.L1006:
 	movs	r3, #20
 	ldr	r2, [r5, #3832]
 	mul	r10, r3, r9
@@ -6994,18 +7063,18 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L995
+	cbnz	r2, .L1003
 	ldr	r3, [sp, #12]
 	add	r9, r9, #1
 	ldr	r1, [sp, #4]
 	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
 	cmp	r2, r8
-	bne	.L996
+	bne	.L1004
 	movs	r3, #1
 	str	r3, [r5, #4000]
-.L988:
-	ldr	r3, .L1009
+.L996:
+	ldr	r3, .L1017
 	movw	r2, #65535
 	strb	r0, [r7, #6]
 	mov	r1, r4
@@ -7014,13 +7083,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r7
 	bl	ftl_sb_update_avl_pages
-	b	.L1002
-.L996:
+	b	.L1010
+.L1004:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L994
-.L995:
+	b	.L1002
+.L1003:
 	ldrh	r2, [r7]
 	movs	r4, #0
 	ldr	r3, [r5, #2324]
@@ -7029,25 +7098,25 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	strh	r8, [r7]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L997
-.L999:
-	ldr	r2, .L1009
+	b	.L1005
+.L1007:
+	ldr	r2, .L1017
 	ldrh	r3, [r2, #4]
 	cmp	r3, r8
-	beq	.L1001
+	beq	.L1009
 	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L1001
-.L1002:
+	bls	.L1009
+.L1010:
 	mov	r0, #-1
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1010:
+.L1018:
 	.align	2
-.L1009:
+.L1017:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.fnend
@@ -7082,7 +7151,7 @@ FtlBbmTblFlush:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r5, #0
-	ldr	r4, .L1021
+	ldr	r4, .L1029
 	movs	r1, #0
 	ldr	r0, [r4, #3280]
 	add	r6, r4, #176
@@ -7091,18 +7160,18 @@ FtlBbmTblFlush:
 	str	r0, [r4, #3268]
 	str	r3, [r4, #3272]
 	bl	ftl_memset
-.L1013:
+.L1021:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1014
+	blt	.L1022
 	ldr	r6, [r4, #3272]
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r9, .L1021+12
-	ldr	r8, .L1021+4
+	ldr	r9, .L1029+12
+	ldr	r8, .L1029+4
 	movs	r5, #0
 	mov	r0, r6
-	ldr	r10, .L1021+16
+	ldr	r10, .L1029+16
 	bl	memset
 	movw	r3, #61649
 	mov	r7, r5
@@ -7117,7 +7186,7 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1015:
+.L1023:
 	ldr	r3, [r4, #3280]
 	mov	fp, #0
 	ldrh	r1, [r4, #152]
@@ -7132,9 +7201,9 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
-	bl	printk
+	bl	sftl_printk
 	movs	r3, #1
-	ldr	r0, .L1021+4
+	ldr	r0, .L1029+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -7142,7 +7211,7 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1016
+	blt	.L1024
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
 	ldr	r0, [r4, #3800]
@@ -7165,27 +7234,27 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1016:
+.L1024:
 	ldrh	r3, [r4, #154]
 	adds	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1017
+	bne	.L1025
 	adds	r5, r5, #1
 	ldr	r1, [r4, #3264]
 	uxth	r5, r5
 	mov	r0, r10
-	bl	printk
+	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1015
+	bls	.L1023
 	mov	r2, r5
 	ldr	r1, [r4, #3264]
-	ldr	r0, .L1021+8
-	bl	printk
-.L1019:
-	b	.L1019
-.L1014:
+	ldr	r0, .L1029+8
+	bl	sftl_printk
+.L1027:
+	b	.L1027
+.L1022:
 	ldrh	r2, [r4, #3900]
 	ldr	r3, [r4, #3268]
 	ldr	r1, [r6, #4]!
@@ -7194,25 +7263,25 @@ FtlBbmTblFlush:
 	adds	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1013
-.L1020:
+	b	.L1021
+.L1028:
 	movs	r7, #1
-	b	.L1015
-.L1017:
+	b	.L1023
+.L1025:
 	cmp	r7, #0
-	beq	.L1020
+	beq	.L1028
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1022:
+.L1030:
 	.align	2
-.L1021:
+.L1029:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
-	.word	.LC96
-	.word	.LC94
-	.word	.LC95
+	.word	.LC100
+	.word	.LC98
+	.word	.LC99
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	1
@@ -7229,28 +7298,28 @@ allocate_data_superblock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r5, r0
-	ldr	r4, .L1058
+	ldr	r4, .L1066
 	.pad #20
 	sub	sp, sp, #20
-	ldr	r9, .L1058+20
-.L1024:
-	ldr	r3, .L1058
-	ldr	r2, .L1058
+	ldr	r9, .L1066+20
+.L1032:
+	ldr	r3, .L1066
+	ldr	r2, .L1066
 	ldrh	r3, [r3, #2344]
 	ldrh	r2, [r2, #2336]
 	add	r3, r3, r2
-	ldr	r2, .L1058
+	ldr	r2, .L1066
 	ldrh	r2, [r2, #40]
 	cmp	r3, r2
-	ble	.L1025
+	ble	.L1033
 	movw	r2, #2585
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-.L1025:
-	ldr	r3, .L1058+8
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1033:
+	ldr	r3, .L1066+8
 	cmp	r5, r3
-	bne	.L1050
+	bne	.L1058
 	ldrh	r3, [r4, #2344]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7258,21 +7327,21 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L1026
+	cbz	r1, .L1034
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1026:
-	ldr	r0, .L1058+12
+.L1034:
+	ldr	r0, .L1066+12
 	bl	List_pop_index_node
 	ldrh	r3, [r4, #2344]
 	mov	r6, r0
 	uxth	r8, r0
-	cbnz	r3, .L1027
+	cbnz	r3, .L1035
 	movw	r2, #2594
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-.L1027:
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1035:
 	ldrh	r3, [r4, #2344]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7280,7 +7349,7 @@ allocate_data_superblock:
 	strh	r8, [r5]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1028
+	cbnz	r3, .L1036
 	ldr	r3, [r4, #2324]
 	uxth	r6, r6
 	movw	r2, #65535
@@ -7292,27 +7361,27 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1024
+	ble	.L1032
 	movw	r2, #2605
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-	b	.L1024
-.L1050:
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+	b	.L1032
+.L1058:
 	movs	r1, #0
-	b	.L1026
-.L1028:
+	b	.L1034
+.L1036:
 	ldrh	r2, [r4, #2336]
 	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1030
+	ble	.L1038
 	mov	r2, #2608
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-.L1030:
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1038:
 	ldr	r1, [r4, #3800]
 	mov	r10, #20
 	ldrh	r2, [r4, #32]
@@ -7323,35 +7392,35 @@ allocate_data_superblock:
 	mov	ip, r7
 	mla	r2, r10, r2, r1
 	str	r2, [sp, #4]
-.L1031:
+.L1039:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bne	.L1033
-	cbnz	r7, .L1034
+	bne	.L1041
+	cbnz	r7, .L1042
 	movw	r2, #2619
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-.L1034:
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1042:
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r8
-	bne	.L1035
+	bne	.L1043
 	movw	r2, #2621
 	mov	r1, r9
-	ldr	r0, .L1058+4
-	bl	printk
-.L1035:
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1043:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	ldr	r2, [r4, #2328]
 	cmp	r3, #0
-	bne	.L1036
+	bne	.L1044
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1037
+	beq	.L1045
 	ldrh	r1, [r4, #92]
 	add	r3, r3, r1
-.L1057:
+.L1065:
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	movs	r1, #0
 	ldr	r3, [r4, #2548]
@@ -7359,7 +7428,7 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1039:
+.L1047:
 	ldr	r3, [r4, #2328]
 	ldr	r2, [r4, #2564]
 	ldrh	r0, [r4, #92]
@@ -7376,17 +7445,17 @@ allocate_data_superblock:
 	ldr	r1, [r4, #3800]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1058+16
+	ldr	r0, .L1066+16
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
 	mla	r2, r2, r7, r1
 	adds	r3, r1, #4
 	adds	r2, r2, #24
-.L1041:
+.L1049:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1042
+	bne	.L1050
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3800]
@@ -7394,44 +7463,44 @@ allocate_data_superblock:
 	bl	FlashEraseBlocks
 	mov	r3, r10
 	movs	r1, #20
-.L1043:
+.L1051:
 	uxth	r2, r10
 	cmp	r7, r2
-	bhi	.L1045
+	bhi	.L1053
 	cmp	r3, #0
-	ble	.L1046
+	ble	.L1054
 	mov	r0, r8
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1046:
+.L1054:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1047
+	bne	.L1055
 	ldr	r3, [r4, #2324]
 	movw	r2, #65535
 	mov	r0, r8
 	strh	r2, [r3, r6, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	b	.L1024
-.L1033:
+	b	.L1032
+.L1041:
 	str	ip, [r3, #8]
 	movw	lr, #65535
 	str	ip, [r3, #12]
 	ldrh	r2, [r0], #2
 	cmp	r2, lr
-	beq	.L1032
+	beq	.L1040
 	mla	lr, r10, r7, r1
 	adds	r7, r7, #1
 	lsls	r2, r2, #10
 	uxth	r7, r7
 	str	r2, [lr, #4]
-.L1032:
+.L1040:
 	adds	r3, r3, #20
-	b	.L1031
-.L1037:
+	b	.L1039
+.L1045:
 	movs	r3, #2
-	b	.L1057
-.L1036:
+	b	.L1065
+.L1044:
 	ldrh	r3, [r2, r6, lsl #1]
 	mov	r0, r8
 	adds	r3, r3, #1
@@ -7440,19 +7509,19 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1039
-.L1042:
+	b	.L1047
+.L1050:
 	ldr	r1, [r3, #-20]
 	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1041
-.L1045:
+	b	.L1049
+.L1053:
 	mul	r2, r1, r10
 	ldr	r0, [r4, #3800]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1044
+	bne	.L1052
 	ldr	r0, [ip, #4]
 	adds	r3, r3, #1
 	str	r1, [sp, #12]
@@ -7467,11 +7536,11 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1044:
+.L1052:
 	add	r10, r10, #1
 	add	fp, fp, #2
-	b	.L1043
-.L1047:
+	b	.L1051
+.L1055:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7488,22 +7557,22 @@ allocate_data_superblock:
 	ldrh	r1, [r5]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1048
+	cbz	r3, .L1056
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1049
-.L1048:
+	cbnz	r3, .L1057
+.L1056:
 	movw	r2, #2674
-	ldr	r1, .L1058+20
-	ldr	r0, .L1058+4
-	bl	printk
-.L1049:
+	ldr	r1, .L1066+20
+	ldr	r0, .L1066+4
+	bl	sftl_printk
+.L1057:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1059:
+.L1067:
 	.align	2
-.L1058:
+.L1066:
 	.word	.LANCHOR0
 	.word	.LC1
 	.word	.LANCHOR0+2444
@@ -7526,67 +7595,67 @@ FtlGcFreeBadSuperBlk:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1072
+	ldr	r4, .L1080
 	ldrh	r3, [r4, #3206]
-	cbz	r3, .L1061
+	cbz	r3, .L1069
 	movs	r7, #0
 	addw	r10, r4, #3208
-.L1062:
+.L1070:
 	ldrh	r2, [r4, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1068
+	bhi	.L1076
 	bl	FtlGcReFreshBadBlk
-.L1061:
+.L1069:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1068:
+.L1076:
 	uxtah	r3, r4, r7
 	mov	r1, r8
 	mov	fp, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1063:
+.L1071:
 	ldrh	r3, [r4, #3206]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1067
+	bhi	.L1075
 	adds	r7, r7, #1
-	b	.L1062
-.L1067:
+	b	.L1070
+.L1075:
 	uxth	r6, fp
 	add	r3, r4, r6, lsl #1
 	ldrh	r3, [r3, #3208]
 	cmp	r3, r9
-	bne	.L1064
+	bne	.L1072
 	mov	r1, r9
-	ldr	r0, .L1072+4
-	bl	printk
+	ldr	r0, .L1080+4
+	bl	sftl_printk
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	ldrh	r1, [r4, #3206]
 	add	r3, r10, r6, lsl #1
-.L1065:
+.L1073:
 	cmp	r5, r1
-	bcc	.L1066
+	bcc	.L1074
 	subs	r1, r1, #1
 	strh	r1, [r4, #3206]	@ movhi
-.L1064:
+.L1072:
 	add	fp, fp, #1
-	b	.L1063
-.L1066:
+	b	.L1071
+.L1074:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1065
-.L1073:
+	b	.L1073
+.L1081:
 	.align	2
-.L1072:
+.L1080:
 	.word	.LANCHOR0
-	.word	.LC97
+	.word	.LC101
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	1
@@ -7600,7 +7669,7 @@ update_vpc_list:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1084
+	ldr	r2, .L1092
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r5, r0
@@ -7608,23 +7677,23 @@ update_vpc_list:
 	ldr	r3, [r2, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1075
+	bne	.L1083
 	ldrh	r1, [r2, #2588]
 	cmp	r1, r0
-	bne	.L1076
+	bne	.L1084
 	movw	r3, #65535
 	strh	r3, [r2, #2588]	@ movhi
-.L1077:
+.L1085:
 	mov	r1, r5
-	ldr	r0, .L1084+4
+	ldr	r0, .L1092+4
 	bl	List_remove_node
 	ldrh	r3, [r4, #2336]
-	cbnz	r3, .L1079
+	cbnz	r3, .L1087
 	movw	r2, #2744
-	ldr	r1, .L1084+8
-	ldr	r0, .L1084+12
-	bl	printk
-.L1079:
+	ldr	r1, .L1092+8
+	ldr	r0, .L1092+12
+	bl	sftl_printk
+.L1087:
 	ldrh	r3, [r4, #2336]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7637,34 +7706,34 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1083
+	ble	.L1091
 	movw	r2, #2747
-	ldr	r1, .L1084+8
-	ldr	r0, .L1084+12
-	bl	printk
-.L1083:
+	ldr	r1, .L1092+8
+	ldr	r0, .L1092+12
+	bl	sftl_printk
+.L1091:
 	movs	r3, #1
-	b	.L1074
-.L1076:
+	b	.L1082
+.L1084:
 	ldrh	r1, [r2, #2348]
 	cmp	r1, r0
-	beq	.L1074
+	beq	.L1082
 	ldrh	r1, [r2, #2396]
 	cmp	r1, r0
-	beq	.L1074
+	beq	.L1082
 	ldrh	r2, [r2, #2444]
 	cmp	r2, r0
-	bne	.L1077
-.L1074:
+	bne	.L1085
+.L1082:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1075:
+.L1083:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1074
-.L1085:
+	b	.L1082
+.L1093:
 	.align	2
-.L1084:
+.L1092:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2320
 	.word	.LANCHOR1+385
@@ -7687,42 +7756,42 @@ decrement_vpc_count:
 	.save {r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	ldr	r5, .L1095
-	beq	.L1087
+	ldr	r5, .L1103
+	beq	.L1095
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1088
+	cbnz	r2, .L1096
 	mov	r1, r0
-	ldr	r0, .L1095+4
-	bl	printk
+	ldr	r0, .L1103+4
+	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r6, [r3, r4, lsl #1]
-	cbz	r6, .L1089
-.L1093:
+	cbz	r6, .L1097
+.L1101:
 	movs	r6, #0
-.L1086:
+.L1094:
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1089:
+.L1097:
 	movw	r2, #2762
-.L1094:
-	ldr	r1, .L1095+8
-	ldr	r0, .L1095+12
-	bl	printk
-	b	.L1086
-.L1088:
+.L1102:
+	ldr	r1, .L1103+8
+	ldr	r0, .L1103+12
+	bl	sftl_printk
+	b	.L1094
+.L1096:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1087:
+.L1095:
 	ldrh	r0, [r5, #3992]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1091
+	bne	.L1099
 	strh	r4, [r5, #3992]	@ movhi
-	b	.L1093
-.L1091:
+	b	.L1101
+.L1099:
 	cmp	r4, r0
-	beq	.L1093
+	beq	.L1101
 	bl	update_vpc_list
 	ldr	r2, [r5, #2316]
 	adds	r6, r0, #0
@@ -7732,22 +7801,22 @@ decrement_vpc_count:
 	strh	r4, [r5, #3992]	@ movhi
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1095+16
+	ldr	r3, .L1103+16
 	muls	r3, r2, r3
 	ldr	r2, [r5, #2324]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1086
+	bne	.L1094
 	cmp	r4, r1
-	beq	.L1086
+	beq	.L1094
 	movw	r2, #2778
-	b	.L1094
-.L1096:
+	b	.L1102
+.L1104:
 	.align	2
-.L1095:
+.L1103:
 	.word	.LANCHOR0
-	.word	.LC98
+	.word	.LC102
 	.word	.LANCHOR1+401
 	.word	.LC1
 	.word	-1431655765
@@ -7768,20 +7837,20 @@ FtlWriteDump_data:
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1115
+	ldr	r4, .L1123
 	ldrh	r2, [r4, #2352]
 	cmp	r2, #0
-	beq	.L1098
+	beq	.L1106
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1098
+	bne	.L1106
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1098
+	beq	.L1106
 	ldrb	r7, [r4, #2358]	@ zero_extendqisi2
-	cbnz	r7, .L1097
+	cbnz	r7, .L1105
 	ldr	r6, [r4, #2504]
 	mov	r2, r7
 	mov	r1, sp
@@ -7798,38 +7867,38 @@ FtlWriteDump_data:
 	str	r0, [sp, #12]
 	str	r5, [sp, #16]
 	str	r7, [r5, #4]
-	beq	.L1100
+	beq	.L1108
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.L1101:
-	ldr	r9, .L1115+4
+.L1109:
+	ldr	r9, .L1123+4
 	movs	r7, #0
 	lsl	r8, r8, #2
 	mov	r10, r7
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1102:
+.L1110:
 	cmp	r8, r7
-	bne	.L1106
-.L1103:
+	bne	.L1114
+.L1111:
 	movs	r3, #1
-.L1114:
+.L1122:
 	strb	r3, [r4, #2358]
-.L1097:
+.L1105:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1100:
+.L1108:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L1101
-.L1106:
+	b	.L1109
+.L1114:
 	ldrh	r3, [r4, #2352]
 	cmp	r3, #0
-	beq	.L1103
+	beq	.L1111
 	ldr	r3, [sp, #8]
 	mov	r0, r9
 	str	r6, [r5, #8]
@@ -7853,13 +7922,13 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #2348]
 	bl	decrement_vpc_count
-	b	.L1102
-.L1098:
+	b	.L1110
+.L1106:
 	movs	r3, #0
-	b	.L1114
-.L1116:
+	b	.L1122
+.L1124:
 	.align	2
-.L1115:
+.L1123:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2348
 	.fnend
@@ -7878,30 +7947,30 @@ l2p_flush:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1121
+	ldr	r5, .L1129
 	movs	r6, #12
 	bl	FtlWriteDump_data
-.L1118:
+.L1126:
 	ldrh	r3, [r5, #138]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1120
+	bhi	.L1128
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1120:
+.L1128:
 	ldr	r2, [r5, #2492]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1119
+	bge	.L1127
 	bl	flush_l2p_region
-.L1119:
+.L1127:
 	adds	r4, r4, #1
-	b	.L1118
-.L1122:
+	b	.L1126
+.L1130:
 	.align	2
-.L1121:
+.L1129:
 	.word	.LANCHOR0
 	.fnend
 	.size	l2p_flush, .-l2p_flush
@@ -7924,9 +7993,9 @@ FtlRecoverySuperblock:
 	sub	sp, sp, #52
 	mov	fp, r0
 	cmp	r3, r2
-	beq	.L1248
+	beq	.L1256
 	ldrh	r3, [r0, #2]
-	ldr	r4, .L1255
+	ldr	r4, .L1263
 	str	r3, [sp, #8]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
@@ -7934,27 +8003,27 @@ FtlRecoverySuperblock:
 	ldrh	r3, [r4, #102]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1126
+	bne	.L1134
 	strh	r3, [r0, #4]	@ movhi
-.L1253:
+.L1261:
 	strb	r3, [fp, #6]
-.L1248:
+.L1256:
 	movs	r0, #0
 	add	sp, sp, #52
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1126:
+.L1134:
 	ldrh	r0, [r0, #16]
-.L1127:
+.L1135:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1128
+	beq	.L1136
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	adds	r7, r0, #1
 	mov	r6, r0
-	beq	.L1129
+	beq	.L1137
 	ldr	r3, [r4, #3172]
 	movs	r2, #0
 	ldrh	lr, [r4, #32]
@@ -7970,11 +8039,11 @@ FtlRecoverySuperblock:
 	add	r3, fp, #16
 	mov	ip, r3
 	str	r3, [sp, #20]
-.L1130:
+.L1138:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L1136
-	ldr	r5, .L1255
+	bhi	.L1144
+	ldr	r5, .L1263
 	movs	r2, #0
 	mov	r1, r4
 	movw	r9, #65535
@@ -7987,15 +8056,15 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #4]
 	mov	r7, r8
 	movs	r3, #0
-.L1137:
+.L1145:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1142
-	bne	.L1140
+	bhi	.L1150
+	bne	.L1148
 	adds	r3, r6, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1249:
+.L1257:
 	ldr	r0, [r8, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
@@ -8003,56 +8072,56 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #16]
 	str	r0, [sp, #12]
 	cmp	r3, r2
-	bne	.L1144
+	bne	.L1152
 	ldrh	r3, [sp, #16]
 	strh	r3, [fp, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [fp, #6]
 	strh	r3, [fp, #4]	@ movhi
-.L1144:
+.L1152:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bne	.L1145
+	bne	.L1153
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bne	.L1145
+	bne	.L1153
 	ldr	r1, [sp, #16]
 	mov	r2, r3
-.L1254:
+.L1262:
 	mov	r0, fp
 	bl	ftl_sb_update_avl_pages
-	b	.L1248
-.L1128:
+	b	.L1256
+.L1136:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1127
-.L1129:
+	b	.L1135
+.L1137:
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1131
+	cbz	r3, .L1139
 	movw	r2, #1755
-	ldr	r1, .L1255+4
-	ldr	r0, .L1255+8
-	bl	printk
-.L1131:
+	ldr	r1, .L1263+4
+	ldr	r0, .L1263+8
+	bl	sftl_printk
+.L1139:
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1132
+	cbz	r3, .L1140
 	cmp	r5, r3
-	beq	.L1132
+	beq	.L1140
 	movw	r2, #1756
-	ldr	r1, .L1255+4
-	ldr	r0, .L1255+8
-	bl	printk
-.L1132:
+	ldr	r1, .L1263+4
+	ldr	r0, .L1263+8
+	bl	sftl_printk
+.L1140:
 	movs	r3, #0
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1253
-.L1136:
+	b	.L1261
+.L1144:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L1133
+	beq	.L1141
 	mla	r1, r10, r4, r0
 	orr	r3, r6, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8074,51 +8143,51 @@ FtlRecoverySuperblock:
 	str	r5, [r1, #8]
 	add	r3, r3, r8
 	str	r3, [r1, #12]
-.L1133:
+.L1141:
 	adds	r2, r2, #1
-	b	.L1130
-.L1142:
+	b	.L1138
+.L1150:
 	ldr	r2, [r7]
-	cbnz	r2, .L1138
+	cbnz	r2, .L1146
 	ldr	r10, [r7, #12]
 	ldr	r2, [r10, #4]
 	adds	r0, r2, #1
-	beq	.L1139
+	beq	.L1147
 	ldr	r1, [r5, #2544]
 	mov	r0, r2
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1139
+	cbz	r0, .L1147
 	adds	r2, r2, #1
 	str	r2, [r5, #2544]
-.L1139:
+.L1147:
 	ldr	r2, [r10]
 	adds	r2, r2, #1
-	bne	.L1141
-.L1140:
+	bne	.L1149
+.L1148:
 	uxth	r2, r6
 	uxth	r3, r3
 	str	r2, [sp, #16]
 	movs	r2, #20
 	mla	r8, r2, r3, r8
-	b	.L1249
-.L1138:
+	b	.L1257
+.L1146:
 	ldr	r9, [sp, #12]
-.L1141:
+.L1149:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1137
-.L1145:
+	b	.L1145
+.L1153:
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1146
+	bne	.L1154
 	ldrb	r3, [fp, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1147
-.L1146:
+	bne	.L1155
+.L1154:
 	ldr	r3, [r5, #4004]
 	uxth	r8, r6
 	uxth	r6, r6
-	ldr	r7, .L1255
+	ldr	r7, .L1263
 	movw	r9, #65535
 	adds	r3, r3, #1
 	itt	eq
@@ -8131,68 +8200,68 @@ FtlRecoverySuperblock:
 	subgt	r4, r8, #7
 	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L1150:
+.L1158:
 	cmp	r4, r8
-	bhi	.L1157
+	bhi	.L1165
 	movs	r3, #0
 	ldrh	lr, [r7, #32]
 	ldr	r0, [r7, #3832]
 	mov	r6, r3
 	ldr	r1, [sp, #20]
 	mov	ip, #20
-	b	.L1158
-.L1152:
+	b	.L1166
+.L1160:
 	ldrh	r2, [r1], #2
 	cmp	r2, r9
-	beq	.L1151
+	beq	.L1159
 	mla	r10, ip, r6, r0
 	adds	r6, r6, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r6, r6
 	str	r2, [r10, #4]
-.L1151:
+.L1159:
 	adds	r3, r3, #1
-.L1158:
+.L1166:
 	uxth	r2, r3
 	cmp	r2, lr
-	bcc	.L1152
+	bcc	.L1160
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
 	ldr	r3, [r7, #3832]
 	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1153:
+.L1161:
 	cmp	r6, r3
-	bne	.L1156
+	bne	.L1164
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1150
-.L1156:
+	b	.L1158
+.L1164:
 	ldr	r2, [r3]
-	cbnz	r2, .L1147
+	cbnz	r2, .L1155
 	ldr	r2, [r3, #12]
 	ldrh	r1, [r2]
 	cmp	r1, r9
-	beq	.L1155
+	beq	.L1163
 	ldr	r2, [r2, #4]
 	adds	r1, r2, #1
 	it	ne
 	strne	r2, [r7, #4004]
-.L1155:
+.L1163:
 	adds	r3, r3, #20
-	b	.L1153
-.L1157:
+	b	.L1161
+.L1165:
 	mov	r3, #-1
 	str	r3, [r7, #4004]
-.L1147:
+.L1155:
 	movs	r3, #1
-	ldr	r0, .L1255+12
+	ldr	r0, .L1263+12
 	strh	r3, [r5, #4008]	@ movhi
-	ldr	r4, .L1255
+	ldr	r4, .L1263
 	bl	FtlMapBlkWriteDump_data
 	ldr	r5, [sp, #8]
-.L1159:
+.L1167:
 	ldrh	r6, [r4, #32]
 	movs	r3, #0
 	ldr	r0, [r4, #3832]
@@ -8200,61 +8269,61 @@ FtlRecoverySuperblock:
 	ldr	r1, [sp, #20]
 	movw	r7, #65535
 	mov	ip, #20
-.L1160:
+.L1168:
 	uxth	r2, r3
 	cmp	r6, r2
-	bhi	.L1162
+	bhi	.L1170
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
 	movs	r3, #0
-.L1252:
+.L1260:
 	str	r3, [sp, #28]
 	ldrh	r3, [sp, #28]
 	cmp	r10, r3
-	bhi	.L1192
+	bhi	.L1200
 	adds	r5, r5, #1
 	ldrh	r3, [r4, #102]
 	uxth	r5, r5
 	cmp	r3, r5
-	bne	.L1159
+	bne	.L1167
 	ldrh	r2, [r4, #32]
 	movw	r0, #65535
 	movs	r3, #0
 	strh	r5, [fp, #2]	@ movhi
 	strh	r3, [fp, #4]	@ movhi
-.L1193:
+.L1201:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1248
+	bcs	.L1256
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L1253
+	bne	.L1261
 	mov	r3, r1
-	b	.L1193
-.L1162:
+	b	.L1201
+.L1170:
 	ldrh	r2, [r1], #2
 	cmp	r2, r7
-	beq	.L1161
+	beq	.L1169
 	mla	lr, ip, r10, r0
 	add	r10, r10, #1
 	orr	r2, r5, r2, lsl #10
 	uxth	r10, r10
 	str	r2, [lr, #4]
-.L1161:
+.L1169:
 	adds	r3, r3, #1
-	b	.L1160
-.L1256:
+	b	.L1168
+.L1264:
 	.align	2
-.L1255:
+.L1263:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
 	.word	.LANCHOR0+3904
-.L1192:
+.L1200:
 	ldr	r3, [sp, #28]
 	movs	r7, #20
 	ldr	r9, [r4, #3832]
@@ -8266,57 +8335,57 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #8]
 	cmp	r5, r3
-	bcc	.L1164
-	bne	.L1165
+	bcc	.L1172
+	bne	.L1173
 	ldr	r3, [sp, #24]
 	cmp	r3, r0
-	bhi	.L1164
-.L1165:
+	bhi	.L1172
+.L1173:
 	ldr	r3, [sp, #16]
 	cmp	r5, r3
-	bne	.L1166
+	bne	.L1174
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L1167
-.L1166:
+	beq	.L1175
+.L1174:
 	ldr	r3, [r9, r7]
 	adds	r3, r3, #1
-	beq	.L1168
+	beq	.L1176
 	ldr	r8, [r8, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1169
-.L1176:
+	beq	.L1177
+.L1184:
 	ldrh	r0, [fp]
-.L1251:
+.L1259:
 	bl	decrement_vpc_count
-.L1164:
+.L1172:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1252
-.L1169:
+	b	.L1260
+.L1177:
 	ldr	r3, [r8, #4]
 	adds	r6, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1170
+	beq	.L1178
 	ldr	r1, [r4, #2544]
 	mov	r0, r3
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1170
+	cbz	r0, .L1178
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [r4, #2544]
-.L1170:
+.L1178:
 	ldrh	r2, [r8]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1171
+	beq	.L1179
 	movw	r2, #1905
-	ldr	r1, .L1257
-	ldr	r0, .L1257+4
-	bl	printk
-.L1171:
+	ldr	r1, .L1265
+	ldr	r0, .L1265+4
+	bl	sftl_printk
+.L1179:
 	ldr	r6, [r8, #8]
 	add	r1, sp, #40
 	ldr	r3, [r8, #12]
@@ -8326,14 +8395,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	r1, [r4, #4004]
 	adds	r0, r1, #1
-	beq	.L1172
+	beq	.L1180
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1172
+	beq	.L1180
 	ldr	r3, [sp, #36]
 	adds	r2, r3, #1
-	beq	.L1173
+	beq	.L1181
 	ldr	r0, [r4, #3832]
 	movs	r2, #0
 	movs	r1, #1
@@ -8345,122 +8414,122 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r7]
 	adds	r3, r2, r7
 	adds	r1, r1, #1
-	bne	.L1174
-.L1175:
+	bne	.L1182
+.L1183:
 	mov	r3, #-1
 	ldrh	r0, [fp]
 	str	r3, [sp, #36]
 	bl	decrement_vpc_count
-.L1183:
+.L1191:
 	ldr	r0, [sp, #36]
 	adds	r1, r0, #1
-	beq	.L1164
-.L1196:
+	beq	.L1172
+.L1204:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #40]
 	mov	r6, r0
 	cmp	r3, r0
-	bhi	.L1188
+	bhi	.L1196
 	movw	r2, #2006
-	ldr	r1, .L1257
-	ldr	r0, .L1257+4
-	bl	printk
-.L1188:
+	ldr	r1, .L1265
+	ldr	r0, .L1265+4
+	bl	sftl_printk
+.L1196:
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1189
+	beq	.L1197
 	mov	r0, r6
-	b	.L1251
-.L1173:
+	b	.L1259
+.L1181:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1176
+	bne	.L1184
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-	b	.L1176
-.L1174:
+	b	.L1184
+.L1182:
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1175
+	bne	.L1183
 	ldr	r9, [r8, #4]
 	ldr	r0, [r4, #4004]
 	mov	r1, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1175
+	beq	.L1183
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1178
-.L1181:
+	bne	.L1186
+.L1189:
 	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-	b	.L1175
-.L1178:
+	b	.L1183
+.L1186:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1175
+	beq	.L1183
 	adds	r0, r1, #1
-	beq	.L1179
+	beq	.L1187
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r8, [r3, #12]
 	bl	FlashReadPages
-.L1180:
+.L1188:
 	ldr	r3, [r4, #3832]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1181
+	beq	.L1189
 	ldr	r3, [r8, #4]
 	ldr	r0, [r4, #4004]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1181
+	beq	.L1189
 	mov	r1, r3
 	mov	r0, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1175
-	b	.L1181
-.L1179:
+	beq	.L1183
+	b	.L1189
+.L1187:
 	str	r1, [r2, r7]
-	b	.L1180
-.L1172:
+	b	.L1188
+.L1180:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1183
+	beq	.L1191
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r6
 	bl	log2phys
 	ldr	r8, [sp, #40]
 	cmp	r8, #-1
-	beq	.L1183
+	beq	.L1191
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1186
+	beq	.L1194
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
-	beq	.L1187
+	beq	.L1195
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
-	beq	.L1187
+	beq	.L1195
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
-	bne	.L1183
-.L1187:
+	bne	.L1191
+.L1195:
 	ldr	r0, [r4, #3832]
 	movs	r2, #0
 	movs	r1, #1
@@ -8470,23 +8539,23 @@ FtlRecoverySuperblock:
 	ldr	r3, [r4, #3832]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1183
+	beq	.L1191
 	ldr	r1, [r7, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1183
+	bne	.L1191
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-	b	.L1183
-.L1189:
+	b	.L1191
+.L1197:
 	mov	r1, r6
-	ldr	r0, .L1257+8
-	bl	printk
-	b	.L1164
-.L1168:
+	ldr	r0, .L1265+8
+	bl	sftl_printk
+	b	.L1172
+.L1176:
 	ldr	r3, [r4, #4012]
 	cmp	r3, #31
 	itttt	ls
@@ -8498,33 +8567,33 @@ FtlRecoverySuperblock:
 	bl	decrement_vpc_count
 	ldr	r3, [r4, #4004]
 	adds	r2, r3, #1
-	bne	.L1191
+	bne	.L1199
 	ldr	r3, [sp, #4]
-.L1250:
+.L1258:
 	str	r3, [r4, #4004]
-	b	.L1164
-.L1191:
+	b	.L1172
+.L1199:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bcs	.L1164
+	bcs	.L1172
 	mov	r3, r2
-	b	.L1250
-.L1167:
+	b	.L1258
+.L1175:
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
 	mov	r1, r5
 	strh	r5, [fp, #2]	@ movhi
 	ldr	r2, [sp, #12]
 	strb	r3, [fp, #6]
-	b	.L1254
-.L1186:
+	b	.L1262
+.L1194:
 	mov	r0, r8
-	b	.L1196
-.L1258:
+	b	.L1204
+.L1266:
 	.align	2
-.L1257:
+.L1265:
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LC99
+	.word	.LC103
 	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	1
@@ -8542,7 +8611,7 @@ FtlSuperblockPowerLostFix:
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1270
+	ldr	r4, .L1278
 	mov	r3, #-1
 	mov	r8, #0
 	movw	r1, #61589
@@ -8567,12 +8636,12 @@ FtlSuperblockPowerLostFix:
 	add	r1, r1, #1269760
 	addw	r1, r1, #1507
 	str	r1, [r2, #4]
-.L1260:
+.L1268:
 	subs	r7, r7, #1
-	beq	.L1262
+	beq	.L1270
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1261
-.L1262:
+	cbnz	r3, .L1269
+.L1270:
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
@@ -8587,12 +8656,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1261:
+.L1269:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1262
+	beq	.L1270
 	ldr	r3, [r4, #2544]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -8607,10 +8676,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-	b	.L1260
-.L1271:
+	b	.L1268
+.L1279:
 	.align	2
-.L1270:
+.L1278:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8628,7 +8697,7 @@ FtlLoadBbt:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r8, #61649
-	ldr	r4, .L1301
+	ldr	r4, .L1309
 	ldr	r3, [r4, #3280]
 	addw	r7, r4, #3260
 	ldr	r6, [r4, #3284]
@@ -8638,11 +8707,11 @@ FtlLoadBbt:
 	ldrh	r5, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1273:
+.L1281:
 	ldrh	r3, [r4, #98]
 	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1276
+	ble	.L1284
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -8651,7 +8720,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1274
+	bne	.L1282
 	ldr	r3, [r4, #3264]
 	movs	r2, #1
 	mov	r1, r2
@@ -8659,50 +8728,50 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #3264]
 	bl	FlashReadPages
-.L1274:
+.L1282:
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1275
+	beq	.L1283
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	bne	.L1275
+	bne	.L1283
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1276:
+.L1284:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1290
+	beq	.L1298
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1280
+	beq	.L1288
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1301+4
+	ldr	r0, .L1309+4
 	str	r3, [r4, #3264]
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1280
+	beq	.L1288
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1280
+	bne	.L1288
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
-	bls	.L1280
+	bls	.L1288
 	ldrh	r2, [r4, #156]
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r4, #152]	@ movhi
 	strh	r3, [r4, #156]	@ movhi
-.L1280:
-	ldr	r7, .L1301+4
+.L1288:
+	ldr	r7, .L1309+4
 	movs	r1, #1
 	ldrh	r0, [r4, #152]
 	movw	r8, #61649
@@ -8710,44 +8779,44 @@ FtlLoadBbt:
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1282:
+.L1290:
 	cmp	r5, #0
-	bge	.L1285
+	bge	.L1293
 	movs	r2, #254
-	ldr	r1, .L1301+8
-	ldr	r0, .L1301+12
-	bl	printk
-.L1284:
+	ldr	r1, .L1309+8
+	ldr	r0, .L1309+12
+	bl	sftl_printk
+.L1292:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1287
+	beq	.L1295
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1287
+	beq	.L1295
 	ldrh	r3, [r4, #42]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1287
+	bcs	.L1295
 	cmp	r0, r3
-	bcs	.L1287
+	bcs	.L1295
 	bl	FtlSysBlkNumInit
-.L1287:
-	ldr	r6, .L1301+16
+.L1295:
+	ldr	r6, .L1309+16
 	movs	r5, #0
-.L1288:
+.L1296:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1289
+	bcc	.L1297
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1275:
+.L1283:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1273
-.L1285:
+	b	.L1281
+.L1293:
 	ldrh	r3, [r4, #152]
 	movs	r2, #1
 	mov	r1, r2
@@ -8759,15 +8828,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1283
+	beq	.L1291
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	beq	.L1284
-.L1283:
+	beq	.L1292
+.L1291:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1282
-.L1289:
+	b	.L1290
+.L1297:
 	ldrh	r2, [r4, #3900]
 	ldr	r1, [r4, #3268]
 	ldr	r0, [r6, #4]!
@@ -8775,13 +8844,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1288
-.L1290:
+	b	.L1296
+.L1298:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1302:
+.L1310:
 	.align	2
-.L1301:
+.L1309:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3260
 	.word	.LANCHOR1+443
@@ -8803,47 +8872,47 @@ FtlMakeBbt:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, #0
-	ldr	r9, .L1322+4
+	ldr	r9, .L1330+4
 	bl	FtlBbtMemInit
 	sub	r5, r9, #180
 	sub	r10, r9, #18
 	mov	r4, r5
 	bl	FtlLoadFactoryBbt
-.L1304:
+.L1312:
 	ldrh	r3, [r5, #54]
 	cmp	r8, r3
-	bcc	.L1310
+	bcc	.L1318
 	movs	r5, #0
-.L1311:
+.L1319:
 	ldrh	r3, [r4, #114]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1312
+	bhi	.L1320
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1313:
+.L1321:
 	ldrh	r3, [r4, #164]
 	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1317
+	ble	.L1325
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1314
+	beq	.L1322
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1315
+	beq	.L1323
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1314:
+.L1322:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1313
-.L1310:
+	b	.L1321
+.L1318:
 	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
 	ldr	r0, [r5, #3280]
@@ -8851,11 +8920,11 @@ FtlMakeBbt:
 	cmp	r3, r2
 	str	r0, [r5, #3268]
 	str	fp, [r5, #3272]
-	beq	.L1305
+	beq	.L1313
 	ldrh	r7, [r5, #98]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1322
+	ldr	r0, .L1330
 	mla	r7, r8, r7, r3
 	lsls	r3, r7, #10
 	str	r3, [r5, #3264]
@@ -8866,29 +8935,29 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1306:
+.L1314:
 	uxth	r0, r7
 	add	r8, r8, #1
 	add	r9, r9, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1304
-.L1305:
+	b	.L1312
+.L1313:
 	mov	r1, r8
 	bl	FlashGetBadBlockList
 	ldr	r1, [r9]
 	ldr	r0, [r5, #3268]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1308:
+.L1316:
 	subs	r6, r6, #1
 	uxth	r6, r6
-.L1307:
+.L1315:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1308
+	beq	.L1316
 	movs	r1, #16
 	ldr	r0, [r4, #3284]
 	strh	r6, [r10]	@ movhi
@@ -8913,32 +8982,32 @@ FtlMakeBbt:
 	str	r3, [r4, #3264]
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1322
+	ldr	r0, .L1330
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1322
+	ldr	r0, .L1330
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	bne	.L1306
+	bne	.L1314
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L1307
-.L1312:
+	b	.L1315
+.L1320:
 	bl	FtlBbmMapBadBlock
-	b	.L1311
-.L1315:
+	b	.L1319
+.L1323:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
-	bne	.L1316
+	bne	.L1324
 	strh	r5, [r4, #152]	@ movhi
-	b	.L1314
-.L1316:
+	b	.L1322
+.L1324:
 	strh	r5, [r4, #156]	@ movhi
-.L1317:
+.L1325:
 	ldrh	r3, [r4, #152]
 	movs	r5, #0
 	ldr	r0, [r4, #3800]
@@ -8968,9 +9037,9 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1323:
+.L1331:
 	.align	2
-.L1322:
+.L1330:
 	.word	.LANCHOR0+3260
 	.word	.LANCHOR0+180
 	.fnend
@@ -8989,7 +9058,7 @@ FtlVendorPartWrite:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r4, .L1336
+	ldr	r4, .L1344
 	adds	r2, r0, r1
 	.pad #108
 	sub	sp, sp, #108
@@ -8997,19 +9066,19 @@ FtlVendorPartWrite:
 	mov	r6, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1332
+	bhi	.L1340
 	ldrh	r7, [r4, #108]
 	mov	r9, #0
 	lsr	r7, r0, r7
 	lsl	fp, r7, #2
-.L1326:
-	cbnz	r6, .L1331
-.L1324:
+.L1334:
+	cbnz	r6, .L1339
+.L1332:
 	mov	r0, r9
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1331:
+.L1339:
 	ldr	r3, [r4, #3884]
 	mov	r0, r8
 	ldr	r2, [r3, fp]
@@ -9026,9 +9095,9 @@ FtlVendorPartWrite:
 	cmp	r6, r5
 	it	cc
 	uxthcc	r5, r6
-	cbz	r2, .L1328
+	cbz	r2, .L1336
 	cmp	r5, r3
-	beq	.L1328
+	beq	.L1336
 	ldr	r3, [r4, #3848]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -9038,7 +9107,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1329:
+.L1337:
 	lsls	r3, r5, #9
 	ldr	r0, [r4, #3848]
 	mov	r1, r10
@@ -9052,7 +9121,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	mov	r1, r7
 	ldr	r2, [r4, #3848]
-	ldr	r0, .L1336+4
+	ldr	r0, .L1344+4
 	adds	r7, r7, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp, #8]
@@ -9060,19 +9129,19 @@ FtlVendorPartWrite:
 	it	eq
 	moveq	r9, #-1
 	add	r10, r10, r3
-	b	.L1326
-.L1328:
+	b	.L1334
+.L1336:
 	ldrh	r2, [r4, #110]
 	movs	r1, #0
 	ldr	r0, [r4, #3848]
 	bl	ftl_memset
-	b	.L1329
-.L1332:
+	b	.L1337
+.L1340:
 	mov	r9, #-1
-	b	.L1324
-.L1337:
+	b	.L1332
+.L1345:
 	.align	2
-.L1336:
+.L1344:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3948
 	.fnend
@@ -9089,12 +9158,12 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1340
-	ldr	r3, .L1340+4
+	ldr	r2, .L1348
+	ldr	r3, .L1348+4
 	ldr	r1, [r2, #2636]
 	cmp	r1, r3
-	bne	.L1338
-	ldr	r3, .L1340+8
+	bne	.L1346
+	ldr	r3, .L1348+8
 	addw	r2, r2, #2636
 	movs	r1, #1
 	movs	r0, #0
@@ -9124,11 +9193,11 @@ Ftl_save_ext_data:
 	ldr	r3, [r2, #-68]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1338:
+.L1346:
 	bx	lr
-.L1341:
+.L1349:
 	.align	2
-.L1340:
+.L1348:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
@@ -9145,7 +9214,7 @@ FtlEctTblFlush:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1347
+	ldr	r2, .L1355
 	push	{r3, lr}
 	.save {r3, lr}
 	ldrh	r3, [r2, #-200]
@@ -9155,20 +9224,20 @@ FtlEctTblFlush:
 	movhi	r2, #32
 	strhls	r3, [r2, #-200]	@ movhi
 	movls	r2, #1
-	ldr	r3, .L1347+4
-	cbnz	r0, .L1344
+	ldr	r3, .L1355+4
+	cbnz	r0, .L1352
 	ldr	r1, [r3, #3860]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
 	cmp	r1, r2
-	bcc	.L1345
-.L1344:
+	bcc	.L1353
+.L1352:
 	ldr	r2, [r3, #3860]
 	movs	r0, #64
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	ldr	r1, .L1347+8
+	ldr	r1, .L1355+8
 	str	r1, [r2]
 	ldrh	r1, [r3, #3852]
 	ldr	r2, [r3, #3860]
@@ -9181,12 +9250,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1345:
+.L1353:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1348:
+.L1356:
 	.align	2
-.L1347:
+.L1355:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
@@ -9222,7 +9291,7 @@ FtlVendorPartRead:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r5, .L1359
+	ldr	r5, .L1367
 	adds	r2, r0, r1
 	.pad #100
 	sub	sp, sp, #100
@@ -9230,19 +9299,19 @@ FtlVendorPartRead:
 	mov	r7, r1
 	ldrh	r3, [r5, #96]
 	cmp	r2, r3
-	bhi	.L1358
+	bhi	.L1366
 	ldrh	r6, [r5, #108]
 	mov	r9, #0
 	lsr	r6, r0, r6
 	lsls	r6, r6, #2
-.L1352:
-	cbnz	r7, .L1357
-.L1350:
+.L1360:
+	cbnz	r7, .L1365
+.L1358:
 	mov	r0, r9
 	add	sp, sp, #100
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1357:
+.L1365:
 	ldr	r3, [r5, #3884]
 	mov	r0, r8
 	ldrh	r4, [r5, #58]
@@ -9258,7 +9327,7 @@ FtlVendorPartRead:
 	it	cc
 	uxthcc	r4, r7
 	lsl	fp, r4, #9
-	cbz	r3, .L1354
+	cbz	r3, .L1362
 	str	r3, [sp, #16]
 	movs	r2, #1
 	ldr	r3, [r5, #3848]
@@ -9278,24 +9347,24 @@ FtlVendorPartRead:
 	moveq	r9, #-1
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1356:
+.L1364:
 	subs	r7, r7, r4
 	add	r8, r8, r4
 	add	r10, r10, fp
 	adds	r6, r6, #4
-	b	.L1352
-.L1354:
+	b	.L1360
+.L1362:
 	mov	r2, fp
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1356
-.L1358:
+	b	.L1364
+.L1366:
 	mov	r9, #-1
-	b	.L1350
-.L1360:
+	b	.L1358
+.L1368:
 	.align	2
-.L1359:
+.L1367:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -9313,32 +9382,32 @@ FtlLoadEctTbl:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r0, #64
-	ldr	r4, .L1363
+	ldr	r4, .L1371
 	ldr	r2, [r4, #3860]
 	ldrh	r1, [r4, #3852]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #3860]
 	ldr	r2, [r3]
-	ldr	r3, .L1363+4
+	ldr	r3, .L1371+4
 	cmp	r2, r3
-	beq	.L1362
-	ldr	r1, .L1363+8
-	ldr	r0, .L1363+12
-	bl	printk
+	beq	.L1370
+	ldr	r1, .L1371+8
+	ldr	r0, .L1371+12
+	bl	sftl_printk
 	ldrh	r2, [r4, #3852]
 	movs	r1, #0
 	ldr	r0, [r4, #3860]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1362:
+.L1370:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1364:
+.L1372:
 	.align	2
-.L1363:
+.L1371:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC100
+	.word	.LC104
 	.word	.LC71
 	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
@@ -9356,22 +9425,22 @@ Ftl_load_ext_data:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1368
+	ldr	r4, .L1376
 	movs	r0, #0
-	ldr	r5, .L1368+4
+	ldr	r5, .L1376+4
 	addw	r2, r4, #2636
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1366
+	beq	.L1374
 	mov	r1, #512
 	addw	r0, r4, #2636
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1366:
+.L1374:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1367
+	bne	.L1375
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9396,7 +9465,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1367:
+.L1375:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9405,9 +9474,9 @@ Ftl_load_ext_data:
 	bl	__aeabi_uidiv
 	str	r0, [r4, #2556]
 	pop	{r3, r4, r5, pc}
-.L1369:
+.L1377:
 	.align	2
-.L1368:
+.L1376:
 	.word	.LANCHOR0
 	.word	1179929683
 	.fnend
@@ -9442,14 +9511,14 @@ FtlVpcTblFlush:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
-	ldr	r4, .L1383
+	ldr	r4, .L1391
 	movs	r1, #255
 	movw	r7, #65535
-	ldr	r9, .L1383+16
+	ldr	r9, .L1391+16
 	ldr	r3, [r4, #3280]
 	addw	r8, r4, #3260
 	ldr	r6, [r4, #3284]
-	ldr	r10, .L1383+20
+	ldr	r10, .L1391+20
 	str	r3, [r4, #3268]
 	ldrh	r3, [r4, #2576]
 	str	r6, [r4, #3272]
@@ -9461,9 +9530,9 @@ FtlVpcTblFlush:
 	str	r5, [r6, #8]
 	ldrh	r2, [r4, #2350]
 	str	r3, [r6, #4]
-	ldr	r3, .L1383+4
+	ldr	r3, .L1391+4
 	str	r3, [r4, #2268]
-	ldr	r3, .L1383+8
+	ldr	r3, .L1391+8
 	str	r3, [r4, #2272]
 	ldrh	r3, [r4, #2582]
 	strh	r3, [r4, #2276]	@ movhi
@@ -9523,7 +9592,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.L1372:
+.L1380:
 	ldr	r3, [r4, #3280]
 	mov	r0, r8
 	ldrh	r2, [r4, #2576]
@@ -9541,7 +9610,7 @@ FtlVpcTblFlush:
 	ldrh	r2, [r4, #2578]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1373
+	blt	.L1381
 	ldrh	r3, [r4, #2576]
 	ldrh	r7, [r4, #2580]
 	strh	r3, [r4, #2580]	@ movhi
@@ -9562,21 +9631,21 @@ FtlVpcTblFlush:
 	mov	r1, r3
 	mov	r0, r8
 	bl	FlashProgPages
-.L1373:
+.L1381:
 	ldrh	r3, [r4, #2578]
 	ldr	r2, [r4, #3260]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r2, r2, #1
 	strh	r3, [r4, #2578]	@ movhi
-	bne	.L1374
+	bne	.L1382
 	cmp	r3, #1
-	bne	.L1375
+	bne	.L1383
 	movw	r2, #1124
 	mov	r1, r9
 	mov	r0, r10
-	bl	printk
-.L1375:
+	bl	sftl_printk
+.L1383:
 	ldrh	r3, [r4, #2578]
 	adds	r5, r5, #1
 	uxth	r5, r5
@@ -9586,32 +9655,32 @@ FtlVpcTblFlush:
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2578]	@ movhi
 	cmp	r5, #3
-	bls	.L1372
+	bls	.L1380
 	mov	r2, r5
 	ldr	r1, [r4, #3264]
-	ldr	r0, .L1383+12
-	bl	printk
-.L1378:
-	b	.L1378
-.L1374:
+	ldr	r0, .L1391+12
+	bl	sftl_printk
+.L1386:
+	b	.L1386
+.L1382:
 	cmp	r3, #1
-	beq	.L1372
+	beq	.L1380
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1379
+	beq	.L1387
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.L1379:
+.L1387:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1384:
+.L1392:
 	.align	2
-.L1383:
+.L1391:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177348
-	.word	.LC101
+	.word	.LC105
 	.word	.LANCHOR1+454
 	.word	.LC1
 	.fnend
@@ -9631,69 +9700,69 @@ FtlVpcCheckAndModify:
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
 	movs	r5, #0
-	ldr	r4, .L1397
-	ldr	r1, .L1397+4
-	ldr	r0, .L1397+8
-	bl	printk
+	ldr	r4, .L1405
+	ldr	r1, .L1405+4
+	ldr	r0, .L1405+8
+	bl	sftl_printk
 	ldrh	r2, [r4, #42]
 	movs	r1, #0
 	ldr	r0, [r4, #3864]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1386:
+.L1394:
 	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1388
-	ldr	r9, .L1397+12
+	bcc	.L1396
+	ldr	r9, .L1405+12
 	movs	r7, #0
 	movw	r8, #65535
-.L1389:
+.L1397:
 	ldrh	r3, [r4, #40]
 	uxth	r5, r7
 	cmp	r3, r5
-	bhi	.L1393
+	bhi	.L1401
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L1388:
+.L1396:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1387
+	beq	.L1395
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r4, #3864]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1387:
+.L1395:
 	adds	r5, r5, #1
-	b	.L1386
-.L1393:
+	b	.L1394
+.L1401:
 	ldr	r3, [r4, #2324]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4, #3864]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1391
+	beq	.L1399
 	cmp	r2, r8
-	beq	.L1391
+	beq	.L1399
 	mov	r1, r6
 	mov	r0, r9
-	bl	printk
+	bl	sftl_printk
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r5
-	beq	.L1391
+	beq	.L1399
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r5
-	beq	.L1391
+	beq	.L1399
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r5
-	beq	.L1391
+	beq	.L1399
 	ldr	r3, [r4, #3864]
 	mov	r0, r5
 	ldrh	r2, [r3, r6, lsl #1]
@@ -9702,16 +9771,16 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1391:
+.L1399:
 	adds	r7, r7, #1
-	b	.L1389
-.L1398:
+	b	.L1397
+.L1406:
 	.align	2
-.L1397:
+.L1405:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC91
-	.word	.LC102
+	.word	.LC95
+	.word	.LC106
 	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	1
@@ -9728,42 +9797,42 @@ allocate_new_data_superblock:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
-	ldr	r4, .L1409
+	ldr	r4, .L1417
 	ldrh	r5, [r0]
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bcs	.L1400
+	bcs	.L1408
 	movw	r2, #2681
-	ldr	r1, .L1409+4
-	ldr	r0, .L1409+8
-	bl	printk
-.L1400:
+	ldr	r1, .L1417+4
+	ldr	r0, .L1417+8
+	bl	sftl_printk
+.L1408:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1401
+	beq	.L1409
 	ldr	r3, [r4, #2324]
 	mov	r0, r5
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1402
+	cbz	r3, .L1410
 	bl	INSERT_DATA_LIST
-.L1401:
+.L1409:
 	ldrh	r0, [r4, #3992]
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1403
+	beq	.L1411
 	cmp	r5, r0
-	bne	.L1404
+	bne	.L1412
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1405
-.L1404:
+	cbz	r3, .L1413
+.L1412:
 	bl	update_vpc_list
-.L1405:
+.L1413:
 	movw	r3, #65535
 	strh	r3, [r4, #3992]	@ movhi
-.L1403:
+.L1411:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9772,12 +9841,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1402:
-	bl	INSERT_FREE_LIST
-	b	.L1401
 .L1410:
+	bl	INSERT_FREE_LIST
+	b	.L1409
+.L1418:
 	.align	2
-.L1409:
+.L1417:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -9797,29 +9866,29 @@ FtlProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r7, #0
-	ldr	r6, .L1425
+	ldr	r6, .L1433
 	.pad #20
 	sub	sp, sp, #20
 	mov	r4, r3
 	movs	r2, #0
-	ldr	r10, .L1425+8
+	ldr	r10, .L1433+8
 	mov	r5, r0
-	ldr	fp, .L1425+12
+	ldr	fp, .L1433+12
 	mov	r9, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1412:
+.L1420:
 	cmp	r7, r9
-	beq	.L1419
+	beq	.L1427
 	mov	r8, #0
-	b	.L1420
-.L1415:
+	b	.L1428
+.L1423:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1413
+	bne	.L1421
 	ldr	r1, [r6, #2324]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -9829,12 +9898,12 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1413:
+.L1421:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1414
+	cbnz	r3, .L1422
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1414:
+.L1422:
 	ldr	r3, [r6, #2732]
 	adds	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -9850,19 +9919,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1420:
+.L1428:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1415
+	beq	.L1423
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1416
+	bcc	.L1424
 	movw	r2, #933
 	mov	r1, r10
 	mov	r0, fp
-	bl	printk
-.L1416:
+	bl	sftl_printk
+.L1424:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9877,38 +9946,38 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r8, r0
 	adds	r3, r3, #1
-	beq	.L1417
+	beq	.L1425
 	ldr	r3, [r6, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1418
+	cbnz	r2, .L1426
 	mov	r1, r0
-	ldr	r0, .L1425+4
-	bl	printk
-.L1418:
+	ldr	r0, .L1433+4
+	bl	sftl_printk
+.L1426:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1417:
+.L1425:
 	adds	r7, r7, #1
 	adds	r5, r5, #20
-	b	.L1412
-.L1419:
+	b	.L1420
+.L1427:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1411
+	bcc	.L1419
 	mov	r2, #948
-	ldr	r1, .L1425+8
-	ldr	r0, .L1425+12
-	bl	printk
-.L1411:
+	ldr	r1, .L1433+8
+	ldr	r0, .L1433+12
+	bl	sftl_printk
+.L1419:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1426:
+.L1434:
 	.align	2
-.L1425:
+.L1433:
 	.word	.LANCHOR0
-	.word	.LC103
+	.word	.LC107
 	.word	.LANCHOR1+519
 	.word	.LC1
 	.fnend
@@ -9926,22 +9995,22 @@ FtlCacheWriteBack:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L1432
+	ldr	r4, .L1440
 	ldr	r0, [r4, #3988]
-	cbz	r0, .L1428
-	ldr	r3, .L1432+4
+	cbz	r0, .L1436
+	ldr	r3, .L1440+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3, #-196]
 	bl	FtlProgPages
 	movs	r3, #0
 	str	r3, [r4, #3988]
-.L1428:
+.L1436:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1433:
+.L1441:
 	.align	2
-.L1432:
+.L1440:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.fnend
@@ -9981,17 +10050,17 @@ sftl_deinit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1437
+	ldr	r3, .L1445
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1436
+	bne	.L1444
 	bl	FtlSysFlush
-.L1436:
+.L1444:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1438:
+.L1446:
 	.align	2
-.L1437:
+.L1445:
 	.word	.LANCHOR2
 	.fnend
 	.size	sftl_deinit, .-sftl_deinit
@@ -10010,21 +10079,21 @@ FtlDiscard:
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #8
 	adds	r2, r0, r1
-	ldr	r6, .L1454
+	ldr	r6, .L1462
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r6, #140]
 	cmp	r2, r3
-	bhi	.L1447
+	bhi	.L1455
 	cmp	r1, #31
-	bhi	.L1441
-.L1446:
+	bhi	.L1449
+.L1454:
 	movs	r0, #0
-.L1439:
+.L1447:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1441:
+.L1449:
 	bl	FtlCacheWriteBack
 	ldrh	r4, [r6, #58]
 	mov	r0, r7
@@ -10034,7 +10103,7 @@ FtlDiscard:
 	mov	r8, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1442
+	cbz	r7, .L1450
 	subs	r4, r4, r7
 	add	r8, r0, #1
 	cmp	r4, r5
@@ -10042,31 +10111,31 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1442:
-	ldr	r4, .L1454+4
+.L1450:
+	ldr	r4, .L1462+4
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1443:
+.L1451:
 	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1445
-	ldr	r3, .L1454+4
+	bcs	.L1453
+	ldr	r3, .L1462+4
 	ldr	r2, [r3, #-192]
 	cmp	r2, #32
-	bls	.L1446
+	bls	.L1454
 	movs	r4, #0
 	str	r4, [r3, #-192]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1446
-.L1445:
+	b	.L1454
+.L1453:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r8
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1444
+	beq	.L1452
 	ldr	r3, [r4, #-192]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -10081,17 +10150,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1444:
+.L1452:
 	ldrh	r3, [r6, #58]
 	add	r8, r8, #1
 	subs	r5, r5, r3
-	b	.L1443
-.L1447:
-	mov	r0, #-1
-	b	.L1439
+	b	.L1451
 .L1455:
+	mov	r0, #-1
+	b	.L1447
+.L1463:
 	.align	2
-.L1454:
+.L1462:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.fnend
@@ -10111,49 +10180,49 @@ FtlGcFreeTempBlock:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movw	r2, #65535
-	ldr	r4, .L1482
+	ldr	r4, .L1490
 	ldrh	r5, [r4, #2444]
 	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1457
-.L1467:
+	bne	.L1465
+.L1475:
 	ldrh	r2, [r4, #2444]
 	movs	r3, #0
 	str	r3, [r4, #4000]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1480
-.L1458:
+	bne	.L1488
+.L1466:
 	movs	r0, #0
-.L1456:
+.L1464:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1457:
-	cbz	r0, .L1460
-	ldr	r3, .L1482+4
+.L1465:
+	cbz	r0, .L1468
+	ldr	r3, .L1490+4
 	ldrh	r0, [r3, #4]
 	cmp	r0, r2
-	beq	.L1461
-.L1462:
+	beq	.L1469
+.L1470:
 	movs	r1, #2
-.L1460:
-	ldr	r0, .L1482+8
+.L1468:
+	ldr	r0, .L1490+8
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #4]
 	adds	r0, r0, #1
-	beq	.L1463
+	beq	.L1471
 	ldr	r2, [r4, #2328]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1464
+	bls	.L1472
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1464:
+.L1472:
 	ldr	r3, [r4, #4000]
-	cbnz	r3, .L1465
+	cbnz	r3, .L1473
 	ldr	r3, [r4, #2732]
 	ldr	r0, [sp, #4]
 	adds	r3, r3, #1
@@ -10161,67 +10230,67 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1465:
+.L1473:
 	movs	r3, #0
 	str	r3, [r4, #4000]
-.L1476:
+.L1484:
 	movs	r0, #1
-	b	.L1456
-.L1461:
+	b	.L1464
+.L1469:
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #17
-	bhi	.L1462
-	b	.L1460
-.L1463:
-	ldr	r3, .L1482+4
+	bhi	.L1470
+	b	.L1468
+.L1471:
+	ldr	r3, .L1490+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1476
-	b	.L1467
-.L1480:
+	bne	.L1484
+	b	.L1475
+.L1488:
 	bl	FtlCacheWriteBack
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	ldrh	r2, [r4, #3200]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1468
+	beq	.L1476
 	movs	r2, #162
-	ldr	r1, .L1482+12
-	ldr	r0, .L1482+16
-	bl	printk
-.L1468:
+	ldr	r1, .L1490+12
+	ldr	r0, .L1490+16
+	bl	sftl_printk
+.L1476:
 	ldrb	r3, [r4, #2451]	@ zero_extendqisi2
 	movs	r6, #0
 	ldrh	r0, [r4, #102]
 	mov	r9, #12
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r4, #2444]
-	ldr	r10, .L1482+12
+	ldr	r10, .L1490+12
 	smulbb	r3, r3, r0
-	ldr	fp, .L1482+16
+	ldr	fp, .L1490+16
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldr	r2, [r4, #2528]
 	ldrh	r3, [r4, #3200]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1469:
+.L1477:
 	ldrh	r2, [r4, #3200]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1473
+	bhi	.L1481
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2444]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1474
+	beq	.L1482
 	bl	INSERT_DATA_LIST
-.L1475:
+.L1483:
 	movs	r5, #0
 	movw	r6, #65535
 	strh	r6, [r4, #2444]	@ movhi
@@ -10233,12 +10302,12 @@ FtlGcFreeTempBlock:
 	ldrh	r2, [r4, #2344]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1458
+	ble	.L1466
 	movs	r3, #20
 	strh	r6, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3148]	@ movhi
-	b	.L1458
-.L1473:
+	b	.L1466
+.L1481:
 	uxth	r7, r6
 	ldr	r8, [r4, #3196]
 	ldr	r3, [r4, #2504]
@@ -10246,12 +10315,12 @@ FtlGcFreeTempBlock:
 	add	r5, r8, r7
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1470
+	bcc	.L1478
 	movs	r2, #168
 	mov	r1, r10
 	mov	r0, fp
-	bl	printk
-.L1470:
+	bl	sftl_printk
+.L1478:
 	movs	r2, #0
 	add	r1, sp, #4
 	ldr	r0, [r5, #8]
@@ -10259,7 +10328,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r8, r7]
 	ldr	r3, [sp, #4]
 	cmp	r0, r3
-	bne	.L1471
+	bne	.L1479
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -10268,23 +10337,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r5, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1481:
+.L1489:
 	bl	decrement_vpc_count
-.L1472:
+.L1480:
 	adds	r6, r6, #1
-	b	.L1469
-.L1471:
+	b	.L1477
+.L1479:
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1472
+	beq	.L1480
 	ldrh	r0, [r4, #2444]
-	b	.L1481
-.L1474:
+	b	.L1489
+.L1482:
 	bl	INSERT_FREE_LIST
-	b	.L1475
-.L1483:
+	b	.L1483
+.L1491:
 	.align	2
-.L1482:
+.L1490:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10305,25 +10374,25 @@ FtlGcPageRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L1486
+	ldr	r4, .L1494
 	ldrh	r1, [r4, #102]
 	addw	r0, r4, #2444
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r4, #2446]
 	ldrh	r3, [r4, #102]
 	cmp	r2, r3
-	bcc	.L1484
+	bcc	.L1492
 	add	r0, r4, #3904
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
 	movs	r3, #0
 	str	r3, [r4, #4000]
-.L1484:
+.L1492:
 	pop	{r4, pc}
-.L1487:
+.L1495:
 	.align	2
-.L1486:
+.L1494:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -10341,7 +10410,7 @@ FtlPowerLostRecovery:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r5, #0
-	ldr	r4, .L1489
+	ldr	r4, .L1497
 	addw	r6, r4, #2348
 	str	r5, [r4, #4012]
 	mov	r0, r6
@@ -10358,9 +10427,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1490:
+.L1498:
 	.align	2
-.L1489:
+.L1497:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
@@ -10378,35 +10447,35 @@ Ftl_gc_temp_data_write_back:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1498
+	ldr	r4, .L1506
 	movs	r5, #0
 	movs	r6, #20
 	mov	r2, r3
 	ldr	r1, [r4, #3164]
 	ldr	r0, [r4, #3836]
 	bl	FlashProgPages
-.L1492:
+.L1500:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1495
+	bhi	.L1503
 	ldr	r0, [r4, #3836]
 	bl	FtlGcBufFree
 	ldrh	r3, [r4, #2448]
 	movs	r0, #0
 	str	r0, [r4, #3164]
-	cbnz	r3, .L1491
+	cbnz	r3, .L1499
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1497
-.L1495:
+	b	.L1505
+.L1503:
 	muls	r3, r6, r3
 	ldr	r2, [r4, #3836]
 	adds	r5, r5, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r0, r2, #1
-	bne	.L1493
+	bne	.L1501
 	ldrh	r0, [r4, #2444]
 	movs	r5, #0
 	ldr	r1, [r4, #2324]
@@ -10422,20 +10491,20 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1497:
+.L1505:
 	movs	r0, #1
-.L1491:
+.L1499:
 	pop	{r4, r5, r6, pc}
-.L1493:
+.L1501:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1492
-.L1499:
+	b	.L1500
+.L1507:
 	.align	2
-.L1498:
+.L1506:
 	.word	.LANCHOR0
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10453,18 +10522,18 @@ Ftl_get_new_temp_ppa:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1503
+	ldr	r4, .L1511
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r3
-	beq	.L1501
+	beq	.L1509
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1502
-.L1501:
+	cbnz	r3, .L1510
+.L1509:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1503+4
+	ldr	r0, .L1511+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	strh	r5, [r4, #3192]	@ movhi
@@ -10473,13 +10542,13 @@ Ftl_get_new_temp_ppa:
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1502:
-	ldr	r0, .L1503+4
+.L1510:
+	ldr	r0, .L1511+4
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1504:
+.L1512:
 	.align	2
-.L1503:
+.L1511:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.fnend
@@ -10495,7 +10564,7 @@ rk_ftl_garbage_collect:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1624
+	ldr	r3, .L1632
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r7, r0
@@ -10504,21 +10573,21 @@ rk_ftl_garbage_collect:
 	mov	r4, r3
 	ldr	r0, [r3, #3820]
 	cmp	r0, #0
-	bne	.L1580
+	bne	.L1588
 	ldrh	r2, [r3, #2336]
 	cmp	r2, #47
-	bls	.L1505
-	ldr	r2, .L1624+4
+	bls	.L1513
+	ldr	r2, .L1632+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1507
-.L1510:
+	bne	.L1515
+.L1518:
 	ldrh	r2, [r4, #3204]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1508
-.L1509:
+	bne	.L1516
+.L1517:
 	ldr	r3, [r4, #3152]
 	movw	r5, #65535
 	ldrh	r1, [r4, #2588]
@@ -10526,190 +10595,190 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r7, lsl #7
 	cmp	r1, r5
 	str	r3, [r4, #3152]
-	bne	.L1511
+	bne	.L1519
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r1
-	bne	.L1512
+	bne	.L1520
 	ldrh	r8, [r4, #3202]
 	cmp	r8, r2
-	bne	.L1513
+	bne	.L1521
 	ldrh	r2, [r4, #2344]
 	cmp	r2, #24
 	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1513
-	ldr	r3, .L1624+8
+	bls	.L1521
+	ldr	r3, .L1632+8
 	movs	r6, #0
 	str	r6, [r4, #3152]
 	strh	r6, [r3, #-188]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1584
+	bne	.L1592
 	ldrh	r2, [r4, #2344]
 	ldrh	r3, [r4, #3150]
 	cmp	r2, r3
-	bcs	.L1516
+	bcs	.L1524
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1518
+	beq	.L1526
 	mov	r0, r3
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1519
+	bhi	.L1527
 	mov	r0, r6
 	bl	List_get_gc_head_node
 	uxth	r6, r0
 	movs	r3, #128
 	strh	r3, [r4, #3150]	@ movhi
 	cmp	r6, r5
-	beq	.L1518
-.L1515:
-	ldr	r3, [r4, #2324]
-	mov	r5, r6
-	ldrh	r1, [r4, #3148]
-	ldrh	r2, [r4, #2344]
-	ldrh	r3, [r3, r6, lsl #1]
-	str	r1, [sp, #4]
-	ldr	r1, [r4, #2328]
-	ldr	r0, .L1624+12
-	ldrh	r1, [r1, r6, lsl #1]
-	str	r1, [sp]
-	mov	r1, r6
-	bl	printk
-	b	.L1518
-.L1507:
-	ldrh	r3, [r3, #2444]
-	cmp	r3, r2
-	beq	.L1510
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-	cmp	r0, #0
-	beq	.L1510
-	movs	r0, #1
-	b	.L1505
-.L1508:
-	ldrh	r3, [r4, #3202]
-	cmp	r3, r1
-	itt	eq
-	strheq	r2, [r4, #3202]	@ movhi
-	strheq	r3, [r4, #3204]	@ movhi
-	b	.L1509
-.L1519:
-	movs	r3, #64
-.L1617:
-	strh	r3, [r4, #3150]	@ movhi
-.L1518:
+	bne	.L1523
+.L1526:
 	bl	FtlGcReFreshBadBlk
 	cmp	r7, #0
-	bne	.L1521
+	bne	.L1529
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1521
-.L1578:
+	bne	.L1529
+.L1586:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #24
-	bhi	.L1585
+	bhi	.L1593
 	cmp	r3, #16
 	ldrh	r6, [r4, #102]
-	bls	.L1523
+	bls	.L1531
 	lsrs	r6, r6, #5
-.L1522:
+.L1530:
 	ldrh	r2, [r4, #3148]
 	cmp	r2, r3
-	bcs	.L1526
+	bcs	.L1534
 	ldrh	r3, [r4, #2444]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1527
+	bne	.L1535
 	ldrh	r2, [r4, #3202]
 	cmp	r2, r3
-	bne	.L1527
-	ldr	r3, .L1624+8
+	bne	.L1535
+	ldr	r3, .L1632+8
 	ldrh	r0, [r3, #-188]
-	cbnz	r0, .L1528
+	cbnz	r0, .L1536
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1529
-.L1528:
+	bcs	.L1537
+.L1536:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1618:
+.L1626:
 	strh	r3, [r4, #3148]	@ movhi
 	movs	r3, #0
 	str	r3, [r4, #3160]
-.L1505:
+.L1513:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L1515:
+	ldrh	r3, [r3, #2444]
+	cmp	r3, r2
+	beq	.L1518
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	cmp	r0, #0
+	beq	.L1518
+	movs	r0, #1
+	b	.L1513
 .L1516:
+	ldrh	r3, [r4, #3202]
+	cmp	r3, r1
+	itt	eq
+	strheq	r2, [r4, #3202]	@ movhi
+	strheq	r3, [r4, #3204]	@ movhi
+	b	.L1517
+.L1527:
+	movs	r3, #64
+.L1625:
+	strh	r3, [r4, #3150]	@ movhi
+	b	.L1526
+.L1524:
 	movs	r3, #80
-	b	.L1617
-.L1584:
+	b	.L1625
+.L1592:
 	mov	r6, r0
-	b	.L1515
 .L1523:
+	ldr	r3, [r4, #2324]
+	mov	r5, r6
+	ldrh	r1, [r4, #3148]
+	ldrh	r2, [r4, #2344]
+	ldrh	r3, [r3, r6, lsl #1]
+	str	r1, [sp, #4]
+	ldr	r1, [r4, #2328]
+	ldr	r0, .L1632+12
+	ldrh	r1, [r1, r6, lsl #1]
+	str	r1, [sp]
+	mov	r1, r6
+	bl	sftl_printk
+	b	.L1526
+.L1531:
 	cmp	r3, #12
-	bls	.L1524
+	bls	.L1532
 	lsrs	r6, r6, #4
-	b	.L1522
-.L1524:
+	b	.L1530
+.L1532:
 	cmp	r3, #8
-	bls	.L1522
+	bls	.L1530
 	lsrs	r6, r6, #2
-	b	.L1522
-.L1585:
+	b	.L1530
+.L1593:
 	movs	r6, #1
-	b	.L1522
-.L1529:
+	b	.L1530
+.L1537:
 	movs	r3, #18
-	b	.L1618
-.L1527:
+	b	.L1626
+.L1535:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r4, #3148]	@ movhi
-.L1526:
+.L1534:
 	ldrh	r3, [r4, #3206]
-	cbz	r3, .L1586
+	cbz	r3, .L1594
 	adds	r6, r6, #32
 	uxth	r6, r6
-.L1586:
+.L1594:
 	movw	r5, #65535
-.L1532:
+.L1540:
 	ldrh	r3, [r4, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1541
+	bne	.L1549
 	cmp	r5, r3
-	beq	.L1542
+	beq	.L1550
 	strh	r5, [r4, #2588]	@ movhi
-.L1543:
+.L1551:
 	ldrh	r0, [r4, #2588]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	cmp	r0, r7
-	beq	.L1541
+	beq	.L1549
 	bl	IsBlkInGcList
-	cbz	r0, .L1546
+	cbz	r0, .L1554
 	strh	r7, [r4, #2588]	@ movhi
-.L1546:
+.L1554:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1541
-	ldr	r0, .L1624+16
+	beq	.L1549
+	ldr	r0, .L1632+16
 	bl	make_superblock
-	ldr	r2, .L1624+8
+	ldr	r2, .L1632+8
 	movs	r3, #0
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
@@ -10718,67 +10787,67 @@ rk_ftl_garbage_collect:
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
 	strh	r3, [r2, #-184]	@ movhi
-.L1541:
+.L1549:
 	ldrh	r3, [r4, #2588]
 	ldrh	r2, [r4, #2348]
 	cmp	r2, r3
-	beq	.L1547
+	beq	.L1555
 	ldrh	r2, [r4, #2396]
 	cmp	r2, r3
-	beq	.L1547
-	ldr	r7, .L1624+8
-.L1548:
+	beq	.L1555
+	ldr	r7, .L1632+8
+.L1556:
 	ldrh	r9, [r4, #2588]
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1549
+	bne	.L1557
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [r4, #3160]
-.L1550:
+.L1558:
 	ldrh	r8, [r4, #3156]
 	mov	r0, r8
 	bl	List_get_gc_head_node
 	uxth	fp, r0
 	cmp	fp, r9
 	strh	fp, [r4, #2588]	@ movhi
-	bne	.L1551
+	bne	.L1559
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1505
-.L1533:
+	b	.L1513
+.L1541:
 	movs	r3, #0
 	ldrh	r7, [r4, #2344]
 	str	r3, [r4, #3160]
 	ldrh	r3, [r4, #3148]
-	ldr	r5, .L1624+8
+	ldr	r5, .L1632+8
 	cmp	r3, r7
-	bcs	.L1534
+	bcs	.L1542
 	ldrh	r3, [r5, #-188]
-	cbnz	r3, .L1535
+	cbnz	r3, .L1543
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1536
-.L1535:
+	bcs	.L1544
+.L1543:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1619:
+.L1627:
 	strh	r3, [r4, #3148]	@ movhi
-.L1621:
+.L1629:
 	bl	FtlReadRefresh
 	ldrh	r0, [r5, #-188]
-	b	.L1505
-.L1536:
+	b	.L1513
+.L1544:
 	movs	r3, #18
-	b	.L1619
-.L1534:
+	b	.L1627
+.L1542:
 	ldrh	r0, [r5, #-188]
 	cmp	r0, #0
-	bne	.L1538
+	bne	.L1546
 	ldrh	r6, [r4, #2572]
 	add	r3, r6, r6, lsl #1
 	asrs	r3, r3, #2
@@ -10792,57 +10861,57 @@ rk_ftl_garbage_collect:
 	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1539
+	ble	.L1547
 	subs	r6, r6, #1
 	cmp	r7, r6
-	bge	.L1621
-.L1539:
+	bge	.L1629
+.L1547:
 	cmp	r2, #0
-	bne	.L1538
+	bne	.L1546
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2344]
 	adds	r0, r0, #1
-	b	.L1505
-.L1542:
+	b	.L1513
+.L1550:
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	beq	.L1543
+	beq	.L1551
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1544
+	cbnz	r3, .L1552
 	strh	r5, [r4, #3202]	@ movhi
-.L1544:
+.L1552:
 	ldrh	r3, [r4, #3202]
 	strh	r3, [r4, #2588]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r4, #3202]	@ movhi
-	b	.L1543
-.L1625:
+	b	.L1551
+.L1633:
 	.align	2
-.L1624:
+.L1632:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LC104
+	.word	.LC108
 	.word	.LANCHOR0+2588
-.L1547:
+.L1555:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1622:
-	ldr	r3, .L1626
+.L1630:
+	ldr	r3, .L1634
 	ldrh	r0, [r3, #-188]
-	b	.L1505
-.L1551:
+	b	.L1513
+.L1559:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r8, r8, #1
 	ldr	r3, [sp, #8]
-	cbz	r0, .L1552
+	cbz	r0, .L1560
 	strh	r8, [r4, #3156]	@ movhi
-	b	.L1550
-.L1552:
+	b	.L1558
+.L1560:
 	uxth	r0, r3
 	ldrh	ip, [r4, #32]
 	ldrh	r3, [r4, #102]
@@ -10853,64 +10922,64 @@ rk_ftl_garbage_collect:
 	ldrh	r1, [r2, r0, lsl #1]
 	add	ip, r3, r3, lsr #31
 	cmp	r1, ip, asr #1
-	bgt	.L1554
+	bgt	.L1562
 	cmp	r8, #48
-	bls	.L1555
+	bls	.L1563
 	cmp	r1, #8
-	bls	.L1555
+	bls	.L1563
 	ldrh	r1, [r4, #3192]
 	cmp	r1, #35
-	bhi	.L1555
-.L1554:
+	bhi	.L1563
+.L1562:
 	strh	r10, [r4, #3156]	@ movhi
-.L1555:
+.L1563:
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r3, r2
-	bgt	.L1556
+	bgt	.L1564
 	cmp	r5, r9
-	bne	.L1556
+	bne	.L1564
 	movs	r3, #0
 	strh	r5, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1622
-.L1556:
-	cbnz	r2, .L1557
+	b	.L1630
+.L1564:
+	cbnz	r2, .L1565
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #3156]
 	adds	r3, r3, #1
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1550
-.L1557:
+	b	.L1558
+.L1565:
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	ldrh	r3, [r4, #2348]
 	cmp	r3, fp
-	bne	.L1558
+	bne	.L1566
 	movw	r2, #658
-	ldr	r1, .L1626+4
-	ldr	r0, .L1626+8
-	bl	printk
-.L1558:
+	ldr	r1, .L1634+4
+	ldr	r0, .L1634+8
+	bl	sftl_printk
+.L1566:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2396]
 	cmp	r2, r3
-	bne	.L1559
+	bne	.L1567
 	movw	r2, #659
-	ldr	r1, .L1626+4
-	ldr	r0, .L1626+8
-	bl	printk
-.L1559:
+	ldr	r1, .L1634+4
+	ldr	r0, .L1634+8
+	bl	sftl_printk
+.L1567:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2444]
 	cmp	r2, r3
-	bne	.L1560
+	bne	.L1568
 	mov	r2, #660
-	ldr	r1, .L1626+4
-	ldr	r0, .L1626+8
-	bl	printk
-.L1560:
-	ldr	r0, .L1626+12
+	ldr	r1, .L1634+4
+	ldr	r0, .L1634+8
+	bl	sftl_printk
+.L1568:
+	ldr	r0, .L1634+12
 	bl	make_superblock
 	ldrh	r1, [r4, #2588]
 	movs	r3, #0
@@ -10920,7 +10989,7 @@ rk_ftl_garbage_collect:
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
 	strh	r2, [r7, #-184]	@ movhi
-.L1549:
+.L1557:
 	bl	FtlReadRefresh
 	movs	r3, #1
 	str	r3, [r4, #3820]
@@ -10936,11 +11005,11 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r6, r6
-.L1620:
+.L1628:
 	str	r3, [sp, #8]
 	ldrh	r3, [sp, #8]
 	cmp	r6, r3
-	bls	.L1570
+	bls	.L1578
 	ldr	r3, [sp, #8]
 	movw	r10, #65535
 	ldrh	r1, [r4, #2590]
@@ -10949,58 +11018,58 @@ rk_ftl_garbage_collect:
 	ldr	r0, [r4, #3180]
 	add	r1, r1, r3
 	movs	r3, #0
-	ldr	ip, .L1626+16
+	ldr	ip, .L1634+16
 	mov	r8, r3
-	b	.L1571
-.L1564:
+	b	.L1579
+.L1572:
 	ldrh	r2, [ip, #2]!
 	cmp	r2, r10
-	beq	.L1563
+	beq	.L1571
 	mla	r9, fp, r8, r0
 	add	r8, r8, #1
 	orr	r2, r1, r2, lsl #10
 	uxth	r8, r8
 	str	r2, [r9, #4]
-.L1563:
-	adds	r3, r3, #1
 .L1571:
+	adds	r3, r3, #1
+.L1579:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1564
+	bhi	.L1572
 	mov	fp, #0
 	ldrb	r2, [r4, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.L1565:
+.L1573:
 	uxth	r3, fp
 	cmp	r8, r3
-	bhi	.L1569
+	bhi	.L1577
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1620
-.L1569:
+	b	.L1628
+.L1577:
 	mov	r9, #20
 	ldr	r3, [r4, #3180]
 	mul	r9, r9, fp
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	adds	r3, r3, #1
-	beq	.L1566
+	beq	.L1574
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1566
+	bne	.L1574
 	ldr	r3, [r10, #8]
 	adds	r2, r3, #1
-	bne	.L1567
+	bne	.L1575
 	mov	r2, #696
-	ldr	r1, .L1626+4
-	ldr	r0, .L1626+8
+	ldr	r1, .L1634+4
+	ldr	r0, .L1634+8
 	str	r3, [sp, #16]
-	bl	printk
+	bl	sftl_printk
 	ldr	r3, [sp, #16]
-.L1567:
+.L1575:
 	movs	r2, #0
 	mov	r0, r3
 	add	r1, sp, #28
@@ -11010,7 +11079,7 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1566
+	bne	.L1574
 	ldrh	r3, [r7, #-186]
 	movs	r2, #20
 	ldr	r1, [r4, #3164]
@@ -11051,111 +11120,111 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	ldr	r3, [r4, #3164]
 	cmp	r2, r3
-	beq	.L1568
+	beq	.L1576
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1566
-.L1568:
+	cbnz	r3, .L1574
+.L1576:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1566
-.L1623:
+	cbz	r0, .L1574
+.L1631:
 	movs	r3, #0
 	ldrh	r0, [r7, #-188]
 	str	r3, [r4, #3820]
-	b	.L1505
-.L1566:
+	b	.L1513
+.L1574:
 	add	fp, fp, #1
-	b	.L1565
-.L1570:
+	b	.L1573
+.L1578:
 	ldrh	r3, [r4, #2590]
 	add	r6, r6, r3
 	ldr	r3, [sp, #12]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r4, #2590]	@ movhi
-	bls	.L1572
+	bls	.L1580
 	ldrh	r2, [r7, #-186]
 	ldrh	r3, [r7, #-184]
 	cmp	r2, r3
-	bne	.L1573
-.L1572:
+	bne	.L1581
+.L1580:
 	ldr	r3, [r4, #3164]
-	cbz	r3, .L1574
+	cbz	r3, .L1582
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1623
-.L1574:
+	bne	.L1631
+.L1582:
 	ldrh	r1, [r7, #-186]
-	cbnz	r1, .L1575
+	cbnz	r1, .L1583
 	ldrh	r2, [r4, #2588]
 	ldr	r3, [r4, #2324]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1575
+	cbz	r0, .L1583
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4, #2588]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1575:
+.L1583:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1573:
+.L1581:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #2
-	bhi	.L1576
+	bhi	.L1584
 	ldrh	r6, [r4, #102]
-	b	.L1548
-.L1576:
+	b	.L1556
+.L1584:
 	ldrh	r0, [r7, #-188]
 	movs	r2, #0
 	str	r2, [r4, #3820]
 	cmp	r0, #0
-	bne	.L1505
+	bne	.L1513
 	adds	r0, r3, #1
-	b	.L1505
-.L1580:
+	b	.L1513
+.L1588:
 	movs	r0, #0
-	b	.L1505
-.L1627:
+	b	.L1513
+.L1635:
 	.align	2
-.L1626:
+.L1634:
 	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
 	.word	.LANCHOR0+2588
 	.word	.LANCHOR0+2602
-.L1511:
+.L1519:
 	cmp	r7, #0
-	beq	.L1578
-.L1521:
+	beq	.L1586
+.L1529:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1589
-.L1579:
+	bne	.L1597
+.L1587:
 	ldrh	r3, [r4, #3202]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1589
+	bne	.L1597
 	cmp	r5, r3
-	bne	.L1589
+	bne	.L1597
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	beq	.L1533
-.L1538:
+	beq	.L1541
+.L1546:
 	movw	r5, #65535
-.L1589:
+.L1597:
 	movs	r6, #1
-	b	.L1532
-.L1513:
+	b	.L1540
+.L1521:
 	cmp	r7, #0
-	beq	.L1578
+	beq	.L1586
 	movw	r5, #65535
-	b	.L1579
-.L1512:
+	b	.L1587
+.L1520:
 	cmp	r7, #0
-	bne	.L1538
-	b	.L1578
+	bne	.L1546
+	b	.L1586
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	1
@@ -11194,30 +11263,30 @@ FtlRead:
 	mov	r7, r1
 	mov	r10, r3
 	str	r2, [sp, #28]
-	bne	.L1630
+	bne	.L1638
 	mov	r2, r3
 	ldr	r1, [sp, #28]
 	add	r0, r7, #256
 	bl	FtlVendorPartRead
 	mov	r8, r0
-.L1629:
+.L1637:
 	mov	r0, r8
 	add	sp, sp, #60
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1630:
+.L1638:
 	ldr	r3, [sp, #28]
-	ldr	r4, .L1661
+	ldr	r4, .L1669
 	adds	r3, r1, r3
 	str	r3, [sp, #8]
 	ldr	r2, [sp, #8]
 	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	bhi	.L1650
-	ldr	r3, .L1661+4
+	bhi	.L1658
+	ldr	r3, .L1669+4
 	ldr	r3, [r3]
 	adds	r5, r3, #1
-	beq	.L1651
+	beq	.L1659
 	bl	FtlCacheWriteBack
 	ldrh	r5, [r4, #58]
 	mov	r0, r7
@@ -11243,45 +11312,45 @@ FtlRead:
 	ldr	r3, [r4, #2508]
 	add	r3, r3, r2
 	str	r3, [r4, #2508]
-.L1632:
+.L1640:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L1648
-	ldr	r3, .L1661
+	cbnz	r3, .L1656
+	ldr	r3, .L1669
 	ldrh	r2, [r3, #3206]
-	cbnz	r2, .L1649
+	cbnz	r2, .L1657
 	ldrh	r3, [r3, #2344]
 	cmp	r3, #31
-	bhi	.L1629
-.L1649:
+	bhi	.L1637
+.L1657:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1629
-.L1648:
+	b	.L1637
+.L1656:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r5
 	bl	log2phys
 	ldr	r2, [sp, #52]
 	adds	r0, r2, #1
-	bne	.L1633
+	bne	.L1641
 	mov	fp, #0
-.L1634:
+.L1642:
 	ldrh	r0, [r4, #58]
 	cmp	fp, r0
-	bcc	.L1636
-.L1637:
+	bcc	.L1644
+.L1645:
 	ldr	r3, [sp, #4]
 	adds	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1641
+	beq	.L1649
 	ldrh	r3, [r4, #32]
 	cmp	r6, r3, lsl #2
-	bne	.L1632
-.L1641:
+	bne	.L1640
+.L1649:
 	cmp	r6, #0
-	beq	.L1632
+	beq	.L1640
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [r4, #3832]
@@ -11295,7 +11364,7 @@ FtlRead:
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-.L1647:
+.L1655:
 	movs	r3, #20
 	ldr	r2, [r4, #3832]
 	mul	r3, r3, fp
@@ -11303,20 +11372,20 @@ FtlRead:
 	add	r2, r2, r3
 	ldr	r1, [r2, #16]
 	cmp	r0, r1
-	bne	.L1643
+	bne	.L1651
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3816]
 	cmp	r1, r2
-	bne	.L1644
+	bne	.L1652
 	str	r3, [sp, #44]
 	mov	r0, r10
 	ldr	r3, [sp, #32]
 	ldr	r2, [sp, #36]
 	add	r1, r1, r3
-.L1660:
+.L1668:
 	bl	ftl_memcpy
 	ldr	r3, [sp, #44]
-.L1644:
+.L1652:
 	ldr	r2, [r4, #3832]
 	ldr	r0, [r2, r3]
 	add	ip, r2, r3
@@ -11328,32 +11397,32 @@ FtlRead:
 	streq	r1, [r4, #2708]
 	ldr	r3, [r2, r3]
 	cmp	r3, #256
-	bne	.L1646
+	bne	.L1654
 	ldr	r0, [ip, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1646:
+.L1654:
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L1647
+	bne	.L1655
 	movs	r6, #0
-	b	.L1632
-.L1636:
+	b	.L1640
+.L1644:
 	mla	r0, r0, r5, fp
 	cmp	r7, r0
-	bhi	.L1635
+	bhi	.L1643
 	ldr	r3, [sp, #8]
 	cmp	r3, r0
-	bls	.L1635
+	bls	.L1643
 	subs	r0, r0, r7
 	mov	r1, #512
 	add	r0, r10, r0, lsl #9
 	bl	__memzero
-.L1635:
+.L1643:
 	add	fp, fp, #1
-	b	.L1634
-.L1633:
+	b	.L1642
+.L1641:
 	ldr	r3, [r4, #3832]
 	movs	r1, #20
 	ldrh	fp, [r4, #58]
@@ -11361,7 +11430,7 @@ FtlRead:
 	str	r2, [r3, #4]
 	ldr	r2, [sp, #12]
 	cmp	r5, r2
-	bne	.L1638
+	bne	.L1646
 	ldr	r2, [r4, #3816]
 	mov	r1, fp
 	mov	r0, r7
@@ -11378,9 +11447,9 @@ FtlRead:
 	cmp	r3, fp
 	str	r3, [sp, #24]
 	ldr	r3, [sp, #32]
-	bne	.L1639
+	bne	.L1647
 	str	r10, [r3, #8]
-.L1639:
+.L1647:
 	ldrh	r2, [r4, #112]
 	ldr	r1, [r4, #3812]
 	str	r5, [r3, #16]
@@ -11389,34 +11458,34 @@ FtlRead:
 	bic	r2, r2, #3
 	add	r2, r2, r1
 	str	r2, [r3, #12]
-	b	.L1637
-.L1638:
+	b	.L1645
+.L1646:
 	ldr	r2, [sp, #16]
 	cmp	r5, r2
-	bne	.L1640
+	bne	.L1648
 	ldr	r2, [r4, #3808]
 	ldr	r1, [sp, #8]
 	str	r2, [r3, #8]
 	mul	r2, fp, r5
 	sub	r9, r1, r2
 	cmp	fp, r9
-	bne	.L1639
-.L1659:
+	bne	.L1647
+.L1667:
 	subs	r2, r2, r7
 	add	r2, r10, r2, lsl #9
 	str	r2, [r3, #8]
-	b	.L1639
-.L1640:
+	b	.L1647
+.L1648:
 	mul	r2, r5, fp
-	b	.L1659
-.L1643:
+	b	.L1667
+.L1651:
 	ldr	r0, [sp, #16]
 	cmp	r0, r1
-	bne	.L1644
+	bne	.L1652
 	ldr	r1, [r2, #8]
 	ldr	r2, [r4, #3808]
 	cmp	r1, r2
-	bne	.L1644
+	bne	.L1652
 	str	r3, [sp, #44]
 	ldrh	r0, [r4, #58]
 	ldr	r3, [sp, #16]
@@ -11424,16 +11493,16 @@ FtlRead:
 	muls	r0, r3, r0
 	subs	r0, r0, r7
 	add	r0, r10, r0, lsl #9
-	b	.L1660
-.L1650:
+	b	.L1668
+.L1658:
 	mov	r8, #-1
-	b	.L1629
-.L1651:
+	b	.L1637
+.L1659:
 	mov	r8, r3
-	b	.L1629
-.L1662:
+	b	.L1637
+.L1670:
 	.align	2
-.L1661:
+.L1669:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.fnend
@@ -11476,27 +11545,27 @@ FtlWrite:
 	mov	r8, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L1665
+	bne	.L1673
 	mov	r2, r3
 	ldr	r1, [sp, #12]
 	add	r0, r8, #256
 	bl	FtlVendorPartWrite
-.L1664:
+.L1672:
 	add	sp, sp, #68
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1665:
+.L1673:
 	ldr	r3, [sp, #12]
-	ldr	r4, .L1731
+	ldr	r4, .L1739
 	adds	r7, r1, r3
 	ldr	r3, [r4, #140]
 	cmp	r7, r3
-	bhi	.L1707
-	ldr	r6, .L1731+4
+	bhi	.L1715
+	ldr	r6, .L1739+4
 	ldr	r0, [r6]
 	adds	r5, r0, #1
-	beq	.L1664
-	ldr	r3, .L1731+8
+	beq	.L1672
+	ldr	r3, .L1739+8
 	mov	r2, #2048
 	ldrh	r5, [r4, #58]
 	mov	r0, r8
@@ -11517,66 +11586,66 @@ FtlWrite:
 	add	r3, r3, r2
 	str	r3, [r4, #2516]
 	cmp	fp, #0
-	beq	.L1667
+	beq	.L1675
 	ldr	r3, [fp, #16]
 	cmp	r10, r3
-	beq	.L1668
+	beq	.L1676
 	bl	FtlCacheWriteBack
-.L1667:
+.L1675:
 	ldr	r3, [r6, #8]
 	cmp	r3, #0
-	beq	.L1709
-	ldr	r5, .L1731+12
+	beq	.L1717
+	ldr	r5, .L1739+12
 	ldrh	r2, [r4, #2352]
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1670:
-	ldr	r4, .L1731
+.L1678:
+	ldr	r4, .L1739
 	mov	r6, r10
-.L1671:
+.L1679:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1705
+	beq	.L1713
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1672
+	bcc	.L1680
 	mov	r2, #1012
-	ldr	r1, .L1731+16
-	ldr	r0, .L1731+20
-	bl	printk
-.L1672:
+	ldr	r1, .L1739+16
+	ldr	r0, .L1739+20
+	bl	sftl_printk
+.L1680:
 	ldrh	r9, [r5, #4]
 	cmp	r9, #0
-	bne	.L1673
+	bne	.L1681
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1731+12
-	ldr	r7, .L1731+4
+	ldr	r3, .L1739+12
+	ldr	r7, .L1739+4
 	cmp	r5, r3
-	bne	.L1674
+	bne	.L1682
 	ldrh	r9, [r4, #2400]
 	cmp	r9, #0
-	bne	.L1675
+	bne	.L1683
 	add	r0, r5, #48
 	bl	allocate_new_data_superblock
 	str	r9, [r7, #8]
-.L1675:
-	ldr	r5, .L1731+12
-	ldr	r0, .L1731+12
+.L1683:
+	ldr	r5, .L1739+12
+	ldr	r0, .L1739+12
 	bl	allocate_new_data_superblock
 	ldr	r2, [r7, #8]
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1676:
+.L1684:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1673
+	cbnz	r3, .L1681
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1673:
+.L1681:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp, #8]
@@ -11591,48 +11660,48 @@ FtlWrite:
 	str	r2, [sp, #36]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1677
+	bcc	.L1685
 	movw	r2, #1045
-	ldr	r1, .L1731+16
-	ldr	r0, .L1731+20
-	bl	printk
-.L1677:
+	ldr	r1, .L1739+16
+	ldr	r0, .L1739+20
+	bl	sftl_printk
+.L1685:
 	mov	r9, #0
-.L1678:
+.L1686:
 	ldr	r3, [sp, #36]
 	cmp	r9, r3
-	bne	.L1699
-.L1679:
+	bne	.L1707
+.L1687:
 	ldr	r3, [r4, #3988]
 	cmp	r3, #0
-	beq	.L1700
+	beq	.L1708
 	ldr	r3, [sp, #8]
 	subs	r9, r9, #1
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-	bne	.L1700
-.L1705:
+	bne	.L1708
+.L1713:
 	ldr	r3, [sp, #20]
 	movs	r0, #0
-	ldr	r4, .L1731
+	ldr	r4, .L1739
 	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1702
+	bhi	.L1710
 	movw	r5, #65535
-.L1726:
+.L1734:
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	bne	.L1706
+	bne	.L1714
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	bne	.L1706
+	bne	.L1714
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1706:
+.L1714:
 	movs	r1, #1
 	movs	r3, #128
 	mov	r0, r1
@@ -11644,9 +11713,9 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #8
-	bls	.L1726
-	b	.L1702
-.L1668:
+	bls	.L1734
+	b	.L1710
+.L1676:
 	ldr	r3, [r4, #2520]
 	mov	r1, r5
 	mov	r0, r8
@@ -11665,11 +11734,11 @@ FtlWrite:
 	add	r0, r0, r3, lsl #9
 	mov	r2, r9
 	bl	ftl_memcpy
-	cbnz	r7, .L1669
-.L1702:
+	cbnz	r7, .L1677
+.L1710:
 	movs	r0, #0
-	b	.L1664
-.L1669:
+	b	.L1672
+.L1677:
 	ldr	r3, [sp, #12]
 	add	r8, r8, r5
 	add	r10, r10, #1
@@ -11680,24 +11749,24 @@ FtlWrite:
 	str	r3, [sp, #4]
 	bl	FtlCacheWriteBack
 	str	r7, [sp, #8]
-	b	.L1667
-.L1709:
-	ldr	r5, .L1731+12
-	b	.L1670
-.L1674:
+	b	.L1675
+.L1717:
+	ldr	r5, .L1739+12
+	b	.L1678
+.L1682:
 	ldrh	r2, [r4, #2352]
 	str	r9, [r7, #8]
-	cbnz	r2, .L1712
+	cbnz	r2, .L1720
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1676
-.L1712:
+	b	.L1684
+.L1720:
 	mov	r5, r3
-	b	.L1673
-.L1699:
+	b	.L1681
+.L1707:
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1679
+	beq	.L1687
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r6
@@ -11723,10 +11792,10 @@ FtlWrite:
 	mov	r0, fp
 	bl	ftl_memset
 	cmp	r6, r10
-	beq	.L1680
+	beq	.L1688
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1725
+	bne	.L1733
 	ldr	r3, [sp, #12]
 	add	r2, r8, r3
 	ldrh	r3, [r4, #58]
@@ -11736,8 +11805,8 @@ FtlWrite:
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L1683
-.L1680:
+	b	.L1691
+.L1688:
 	ldrh	r2, [r4, #58]
 	mov	r0, r8
 	mov	r1, r2
@@ -11752,36 +11821,36 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #16]
-.L1683:
+.L1691:
 	ldrh	r3, [r4, #58]
 	ldr	r2, [sp, #16]
 	cmp	r2, r3
 	ldr	r3, [r4, #3840]
-	bne	.L1684
+	bne	.L1692
 	cmp	r6, r10
 	add	r7, r7, r3
-	bne	.L1685
+	bne	.L1693
 	ldr	r3, [sp, #4]
-.L1729:
+.L1737:
 	str	r3, [r7, #8]
-	b	.L1686
-.L1685:
+	b	.L1694
+.L1693:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #4]
 	muls	r2, r6, r2
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-.L1686:
+.L1694:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1696
+	bcc	.L1704
 	movw	r2, #1119
-	ldr	r1, .L1731+16
-	ldr	r0, .L1731+20
-	bl	printk
-.L1696:
+	ldr	r1, .L1739+16
+	ldr	r0, .L1739+20
+	bl	sftl_printk
+.L1704:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
@@ -11800,17 +11869,17 @@ FtlWrite:
 	str	r3, [fp, #12]
 	ldrh	r3, [r5]
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1678
-.L1732:
+	b	.L1686
+.L1740:
 	.align	2
-.L1731:
+.L1739:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+574
 	.word	.LC1
-.L1684:
+.L1692:
 	cmp	r6, r10
 	add	r3, r3, r7
 	ite	eq
@@ -11819,7 +11888,7 @@ FtlWrite:
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #40]
 	adds	r1, r3, #1
-	beq	.L1689
+	beq	.L1697
 	str	r3, [sp, #48]
 	movs	r1, #1
 	ldr	r3, [r4, #3840]
@@ -11834,64 +11903,64 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1690
+	bne	.L1698
 	ldr	r3, [r4, #2708]
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
-.L1693:
+.L1701:
 	ldr	r3, [sp, #16]
 	cmp	r6, r10
 	lsl	r2, r3, #9
-	bne	.L1694
+	bne	.L1702
 	ldr	r3, [r4, #3840]
 	ldr	r1, [sp, #4]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #24]
 	add	r0, r0, r3, lsl #9
-.L1728:
+.L1736:
 	bl	ftl_memcpy
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1686
+	bne	.L1694
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1686
+	beq	.L1694
 	ldr	r3, [r4, #3840]
 	add	r7, r7, r3
-	ldr	r3, .L1733
+	ldr	r3, .L1741
 	str	r7, [r4, #3988]
 	str	r5, [r3, #-196]
-	b	.L1686
-.L1690:
+	b	.L1694
+.L1698:
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1692
+	beq	.L1700
 	ldr	r3, [r4, #2708]
 	mov	r2, r6
-	ldr	r0, .L1733+4
+	ldr	r0, .L1741+4
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
 	ldr	r1, [fp, #8]
-	bl	printk
-.L1692:
+	bl	sftl_printk
+.L1700:
 	ldr	r3, [fp, #8]
 	cmp	r6, r3
-	beq	.L1693
+	beq	.L1701
 	movw	r2, #1098
-	ldr	r1, .L1733+8
-	ldr	r0, .L1733+12
-	bl	printk
-	b	.L1693
-.L1689:
+	ldr	r1, .L1741+8
+	ldr	r0, .L1741+12
+	bl	sftl_printk
+	b	.L1701
+.L1697:
 	ldr	r3, [r4, #3840]
 	movs	r1, #0
 	ldrh	r2, [r4, #110]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1693
-.L1694:
+	b	.L1701
+.L1702:
 	ldrh	r1, [r4, #58]
 	ldr	r0, [sp, #4]
 	ldr	r3, [r4, #3840]
@@ -11900,8 +11969,8 @@ FtlWrite:
 	sub	r1, r1, r8
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-	b	.L1728
-.L1725:
+	b	.L1736
+.L1733:
 	ldr	r3, [r4, #3840]
 	ldr	r2, [sp, #4]
 	add	r7, r7, r3
@@ -11909,8 +11978,8 @@ FtlWrite:
 	muls	r3, r6, r3
 	sub	r3, r3, r8
 	add	r3, r2, r3, lsl #9
-	b	.L1729
-.L1700:
+	b	.L1737
+.L1708:
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, r9
@@ -11918,24 +11987,24 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	r3, r9
-	bcs	.L1703
+	bcs	.L1711
 	movw	r2, #1134
-	ldr	r1, .L1733+8
-	ldr	r0, .L1733+12
-	bl	printk
-.L1703:
+	ldr	r1, .L1741+8
+	ldr	r0, .L1741+12
+	bl	sftl_printk
+.L1711:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, r9
 	str	r3, [sp, #8]
-	b	.L1671
-.L1707:
+	b	.L1679
+.L1715:
 	mov	r0, #-1
-	b	.L1664
-.L1734:
+	b	.L1672
+.L1742:
 	.align	2
-.L1733:
+.L1741:
 	.word	.LANCHOR3
-	.word	.LC105
+	.word	.LC109
 	.word	.LANCHOR1+574
 	.word	.LC1
 	.fnend
@@ -11973,7 +12042,7 @@ FtlLoadSysInfo:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L1757
+	ldr	r4, .L1765
 	ldr	r3, [r4, #3280]
 	ldrh	r2, [r4, #40]
 	ldr	r0, [r4, #2324]
@@ -11985,39 +12054,39 @@ FtlLoadSysInfo:
 	ldrh	r0, [r4, #2576]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1737
-.L1745:
+	bne	.L1745
+.L1753:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1737:
-	ldr	r7, .L1757+4
+.L1745:
+	ldr	r7, .L1765+4
 	movs	r1, #1
 	addw	r6, r4, #3260
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #2578]	@ movhi
-.L1739:
+.L1747:
 	cmp	r5, #0
-	bge	.L1742
+	bge	.L1750
 	movw	r2, #1437
-	ldr	r1, .L1757+8
-	ldr	r0, .L1757+12
-	bl	printk
-.L1741:
+	ldr	r1, .L1765+8
+	ldr	r0, .L1765+12
+	bl	sftl_printk
+.L1749:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1744
+	bcs	.L1752
 	movw	r2, #1439
-	ldr	r1, .L1757+8
-	ldr	r0, .L1757+12
-	bl	printk
-.L1744:
+	ldr	r1, .L1765+8
+	ldr	r0, .L1765+12
+	bl	sftl_printk
+.L1752:
 	movs	r2, #48
 	ldr	r1, [r4, #3268]
-	ldr	r0, .L1757+16
+	ldr	r0, .L1765+16
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
 	ldr	r1, [r4, #3268]
@@ -12036,16 +12105,16 @@ FtlLoadSysInfo:
 	add	r1, r1, r3
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1757+4
+	ldr	r3, .L1765+4
 	cmp	r2, r3
-	bne	.L1745
+	bne	.L1753
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r5, [r4, #2276]
 	cmp	r2, r3
 	strh	r5, [r4, #2582]	@ movhi
-	bne	.L1745
-	ldr	r3, .L1757+20
+	bne	.L1753
+	ldr	r3, .L1765+20
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
 	str	r5, [r3, #-176]
@@ -12061,12 +12130,12 @@ FtlLoadSysInfo:
 	bl	__aeabi_uidiv
 	cmp	r5, r6
 	strh	r0, [r4, #2572]	@ movhi
-	bls	.L1746
+	bls	.L1754
 	movw	r2, #1461
-	ldr	r1, .L1757+8
-	ldr	r0, .L1757+12
-	bl	printk
-.L1746:
+	ldr	r1, .L1765+8
+	ldr	r0, .L1765+12
+	bl	sftl_printk
+.L1754:
 	ldrh	r3, [r4, #2284]
 	ldrh	r1, [r4, #2282]
 	lsrs	r2, r3, #6
@@ -12121,34 +12190,34 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L1749
-	ldr	r0, .L1757+24
+	beq	.L1757
+	ldr	r0, .L1765+24
 	bl	make_superblock
-.L1749:
+.L1757:
 	ldrh	r2, [r4, #2396]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1750
-	ldr	r0, .L1757+28
+	beq	.L1758
+	ldr	r0, .L1765+28
 	bl	make_superblock
-.L1750:
+.L1758:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1751
-	ldr	r0, .L1757+32
+	beq	.L1759
+	ldr	r0, .L1765+32
 	bl	make_superblock
-.L1751:
+.L1759:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1752
-	ldr	r0, .L1757+36
+	beq	.L1760
+	ldr	r0, .L1765+36
 	bl	make_superblock
-.L1752:
+.L1760:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1742:
+.L1750:
 	ldrh	r3, [r4, #2576]
 	movs	r2, #1
 	mov	r1, r2
@@ -12160,23 +12229,23 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3260]
 	adds	r3, r3, #1
-	beq	.L1740
+	beq	.L1748
 	ldr	r3, [r4, #3280]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	bne	.L1740
+	bne	.L1748
 	ldr	r3, [r4, #3284]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1741
-.L1740:
+	beq	.L1749
+.L1748:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1739
-.L1758:
+	b	.L1747
+.L1766:
 	.align	2
-.L1757:
+.L1765:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
@@ -12203,7 +12272,7 @@ FtlSysBlkInit:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1775
+	ldr	r4, .L1783
 	ldrh	r0, [r4, #36]
 	strh	r3, [r4, #4008]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
@@ -12211,17 +12280,17 @@ FtlSysBlkInit:
 	ldrh	r2, [r4, #2576]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1760
-.L1762:
+	bne	.L1768
+.L1770:
 	mov	r5, #-1
-.L1759:
+.L1767:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1760:
+.L1768:
 	bl	FtlLoadSysInfo
 	mov	r5, r0
 	cmp	r0, #0
-	bne	.L1762
+	bne	.L1770
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12235,23 +12304,23 @@ FtlSysBlkInit:
 	mov	r3, r5
 	ldr	r2, [r4, #2492]
 	movs	r0, #12
-.L1763:
+.L1771:
 	cmp	r3, r1
-	bge	.L1768
+	bge	.L1776
 	mla	r6, r0, r3, r2
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	bge	.L1764
-.L1768:
+	bge	.L1772
+.L1776:
 	ldrh	r2, [r4, #2296]
 	cmp	r3, r1
 	add	r2, r2, #1
 	strh	r2, [r4, #2296]	@ movhi
-	bge	.L1774
-.L1765:
-	ldr	r0, .L1775+4
+	bge	.L1782
+.L1773:
+	ldr	r0, .L1783+4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1775+8
+	ldr	r0, .L1783+8
 	bl	FtlSuperblockPowerLostFix
 	ldrh	r1, [r4, #2348]
 	ldr	r2, [r4, #2324]
@@ -12271,12 +12340,12 @@ FtlSysBlkInit:
 	subs	r2, r2, r6
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1775+12
+	ldr	r0, .L1783+12
 	strb	r3, [r4, #2402]
 	strh	r2, [r4, #2398]	@ movhi
 	strh	r3, [r4, #2400]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1775+16
+	ldr	r0, .L1783+16
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r4, #2298]
 	adds	r3, r3, #1
@@ -12284,39 +12353,39 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1769
-.L1764:
+	b	.L1777
+.L1772:
 	adds	r3, r3, #1
-	b	.L1763
-.L1774:
+	b	.L1771
+.L1782:
 	ldrh	r3, [r4, #4008]
 	cmp	r3, #0
-	bne	.L1765
-.L1769:
+	bne	.L1773
+.L1777:
 	ldrh	r0, [r4, #2348]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1770
+	beq	.L1778
 	ldrh	r3, [r4, #2352]
-	cbnz	r3, .L1770
+	cbnz	r3, .L1778
 	ldrh	r3, [r4, #2400]
-	cbnz	r3, .L1770
+	cbnz	r3, .L1778
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r4, #2396]
 	bl	FtlGcRefreshBlock
-	ldr	r0, .L1775+4
+	ldr	r0, .L1783+4
 	bl	allocate_new_data_superblock
-	ldr	r0, .L1775+8
+	ldr	r0, .L1783+8
 	bl	allocate_new_data_superblock
-.L1770:
+.L1778:
 	ldrh	r3, [r4, #2296]
 	lsls	r3, r3, #27
-	bne	.L1759
+	bne	.L1767
 	bl	FtlVpcCheckAndModify
-	b	.L1759
-.L1776:
+	b	.L1767
+.L1784:
 	.align	2
-.L1775:
+.L1783:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0+2396
@@ -12338,42 +12407,42 @@ ftl_low_format:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	movs	r3, #0
-	ldr	r4, .L1801
+	ldr	r4, .L1809
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
 	str	r3, [r4, #2544]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1778
+	cbz	r0, .L1786
 	bl	FtlMakeBbt
-.L1778:
-	ldr	r0, .L1801+4
+.L1786:
+	ldr	r0, .L1809+4
 	movs	r2, #0
-.L1779:
+.L1787:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1780
+	blt	.L1788
 	ldrh	r6, [r4, #40]
 	movs	r5, #0
-.L1781:
+.L1789:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1782
+	bhi	.L1790
 	ldrh	r1, [r4, #32]
 	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1783
-.L1787:
+	bge	.L1791
+.L1795:
 	movs	r5, #0
 	mov	r6, r5
-.L1784:
+.L1792:
 	ldrh	r3, [r4, #40]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1788
+	bhi	.L1796
 	ldrh	r3, [r4, #42]
 	ldrh	r5, [r4, #32]
 	ldr	r9, [r4, #44]
@@ -12389,7 +12458,7 @@ ftl_low_format:
 	movs	r3, #24
 	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1789
+	ble	.L1797
 	mov	r1, r5
 	sub	r0, r9, r6
 	bl	__aeabi_uidiv
@@ -12397,9 +12466,9 @@ ftl_low_format:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r4, #2572]	@ movhi
-.L1789:
+.L1797:
 	ldrh	r3, [r4, #94]
-	cbz	r3, .L1791
+	cbz	r3, .L1799
 	ldrh	r2, [r4, #2572]
 	add	r2, r2, r3, lsr #1
 	strh	r2, [r4, #2572]	@ movhi
@@ -12410,11 +12479,11 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r3, r7
 	strhlt	r3, [r4, #2572]	@ movhi
-.L1791:
+.L1799:
 	ldrh	r2, [r4, #2572]
 	movw	r6, #65535
 	ldr	r3, [r4, #2504]
-	ldr	r7, .L1801+8
+	ldr	r7, .L1809+8
 	subs	r3, r3, r2
 	muls	r5, r3, r5
 	ldrh	r3, [r4, #102]
@@ -12429,7 +12498,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	movs	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r7, .L1801+12
+	ldr	r7, .L1809+12
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r2, [r4, #40]
@@ -12448,28 +12517,28 @@ ftl_low_format:
 	strh	r6, [r4, #2588]	@ movhi
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1793:
+.L1801:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2348]
 	cmp	r3, #0
-	bne	.L1794
+	bne	.L1802
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2348]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2348]	@ movhi
-	b	.L1793
-.L1780:
+	b	.L1801
+.L1788:
 	ldr	r5, [r4, #3816]
 	mvns	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [r5, r3, lsl #2]
 	ldr	r1, [r4, #3808]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1779
-.L1782:
+	b	.L1787
+.L1790:
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12477,8 +12546,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1781
-.L1783:
+	b	.L1789
+.L1791:
 	mov	r0, r5
 	bl	__aeabi_uidiv
 	ldr	r3, [r4, #132]
@@ -12488,27 +12557,27 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1785:
+.L1793:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1787
+	bls	.L1795
 	mov	r0, r5
 	movs	r1, #1
 	adds	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1785
-.L1788:
+	b	.L1793
+.L1796:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L1784
-.L1794:
+	b	.L1792
+.L1802:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2352]
-	ldr	r7, .L1801+16
+	ldr	r7, .L1809+16
 	str	r3, [r4, #2360]
 	adds	r3, r3, #1
 	str	r3, [r4, #2540]
@@ -12522,19 +12591,19 @@ ftl_low_format:
 	strh	r3, [r4, #2396]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #2404]
-.L1795:
+.L1803:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2396]
-	cbnz	r3, .L1796
+	cbnz	r3, .L1804
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2396]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2396]	@ movhi
-	b	.L1795
-.L1796:
+	b	.L1803
+.L1804:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2400]
@@ -12557,16 +12626,16 @@ ftl_low_format:
 	str	r3, [r4, #2540]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1797
-	ldr	r3, .L1801+20
+	cbnz	r0, .L1805
+	ldr	r3, .L1809+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1797:
+.L1805:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1802:
+.L1810:
 	.align	2
-.L1801:
+.L1809:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -12589,12 +12658,12 @@ sftl_init:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L1809
-	ldr	r5, .L1809+4
-	ldr	r1, .L1809+8
-	ldr	r0, .L1809+12
+	ldr	r4, .L1817
+	ldr	r5, .L1817+4
+	ldr	r1, .L1817+8
+	ldr	r0, .L1817+12
 	str	r3, [r5]
-	bl	printk
+	bl	sftl_printk
 	mov	r0, r4
 	bl	FtlConstantsInit
 	bl	FtlMemInit
@@ -12602,27 +12671,27 @@ sftl_init:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1807
+	cbnz	r0, .L1815
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1807
+	cbnz	r0, .L1815
 	movs	r3, #1
 	str	r3, [r5]
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1807
+	bhi	.L1815
 	movw	r4, #8129
-.L1806:
+.L1814:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1806
-.L1807:
+	bne	.L1814
+.L1815:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1810:
+.L1818:
 	.align	2
-.L1809:
+.L1817:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -12656,19 +12725,19 @@ rk_sftl_vendor_dev_ops_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1815
+	ldr	r2, .L1823
 	ldr	r3, [r2, #-172]
-	cbnz	r3, .L1814
+	cbnz	r3, .L1822
 	str	r0, [r2, #-172]
 	mov	r0, r3
 	str	r1, [r2, #-168]
 	bx	lr
-.L1814:
+.L1822:
 	mov	r0, #-1
 	bx	lr
-.L1816:
+.L1824:
 	.align	2
-.L1815:
+.L1823:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -12683,65 +12752,58 @@ rk_sftl_vendor_storage_init:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	mov	r0, #65536
-	ldr	r4, .L1825
+	ldr	r4, .L1833
 	bl	ftl_malloc
 	str	r0, [r4, #-164]
 	cmp	r0, #0
-	beq	.L1823
-	ldr	fp, .L1825+4
-	mov	r8, #0
-	ldr	r9, .L1825+8
-	mov	r7, r8
-	mov	r6, r8
-.L1821:
+	beq	.L1831
+	ldr	r8, .L1833+4
+	mov	r9, #0
+	mov	r7, r9
+	mov	r6, r9
+.L1829:
 	ldr	r3, [r4, #-172]
 	movs	r1, #128
 	ldr	r2, [r4, #-164]
 	lsls	r0, r6, #7
 	blx	r3
 	mov	r5, r0
-	cbnz	r0, .L1819
-	ldr	r1, [r4, #-164]
-	movw	r10, #65532
-	mov	r0, fp
-	ldr	r3, [r1, #4]
-	ldr	r2, [r1, r10]
-	ldr	r1, [r1]
-	bl	printk
+	cbnz	r0, .L1827
 	ldr	r2, [r4, #-164]
 	ldr	r3, [r2]
-	cmp	r3, r9
-	bne	.L1820
-	ldr	r3, [r2, r10]
-	ldr	r1, [r2, #4]
-	cmp	r3, r1
-	bne	.L1820
-	cmp	r3, r7
+	cmp	r3, r8
+	bne	.L1828
+	movw	r3, #65532
+	ldr	r1, [r2, r3]
+	ldr	r3, [r2, #4]
+	cmp	r1, r3
+	bne	.L1828
+	cmp	r1, r7
 	itt	hi
-	movhi	r8, r6
-	movhi	r7, r3
-.L1820:
+	movhi	r9, r6
+	movhi	r7, r1
+.L1828:
 	adds	r6, r6, #1
 	cmp	r6, #2
-	bne	.L1821
-	cbz	r7, .L1822
+	bne	.L1829
+	cbz	r7, .L1830
 	ldr	r3, [r4, #-172]
 	movs	r1, #128
-	lsl	r0, r8, #7
+	lsl	r0, r9, #7
 	blx	r3
 	mov	r5, r0
-	cbz	r0, .L1817
-.L1819:
+	cbz	r0, .L1825
+.L1827:
 	ldr	r0, [r4, #-164]
 	mov	r5, #-1
 	bl	kfree
 	movs	r3, #0
 	str	r3, [r4, #-164]
-	b	.L1817
-.L1822:
+	b	.L1825
+.L1830:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
@@ -12749,22 +12811,21 @@ rk_sftl_vendor_storage_init:
 	movs	r2, #1
 	movw	r1, #65532
 	str	r2, [r3, #4]
-	str	r9, [r3]
+	str	r8, [r3]
 	str	r2, [r3, r1]
 	movw	r2, #64504
 	strh	r7, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1817:
+.L1825:
 	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1823:
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
+.L1831:
 	mvn	r5, #11
-	b	.L1817
-.L1826:
+	b	.L1825
+.L1834:
 	.align	2
-.L1825:
+.L1833:
 	.word	.LANCHOR3
-	.word	.LC106
 	.word	1380668996
 	.fnend
 	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
@@ -12782,23 +12843,23 @@ rk_sftl_vendor_read:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r3, .L1833
+	ldr	r3, .L1841
 	mov	r0, r1
 	ldr	r5, [r3, #-164]
-	cbz	r5, .L1832
+	cbz	r5, .L1840
 	ldrh	r6, [r5, #10]
 	movs	r3, #0
-.L1829:
+.L1837:
 	cmp	r3, r6
-	bcc	.L1831
-.L1832:
+	bcc	.L1839
+.L1840:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1831:
+.L1839:
 	add	r1, r5, r3, lsl #3
 	ldrh	r4, [r1, #16]
 	cmp	r4, r7
-	bne	.L1830
+	bne	.L1838
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -12810,12 +12871,12 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1830:
+.L1838:
 	adds	r3, r3, #1
-	b	.L1829
-.L1834:
+	b	.L1837
+.L1842:
 	.align	2
-.L1833:
+.L1841:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
@@ -12833,26 +12894,26 @@ rk_sftl_vendor_write:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r2
-	ldr	r2, .L1854
+	ldr	r2, .L1862
 	.pad #28
 	sub	sp, sp, #28
 	mov	r3, r1
 	ldr	r4, [r2, #-164]
 	mov	r9, r2
 	cmp	r4, #0
-	beq	.L1850
+	beq	.L1858
 	ldrh	r2, [r4, #10]
 	add	r6, r8, #63
 	ldrh	r1, [r4, #8]
 	bic	r6, r6, #63
 	movs	r7, #0
 	str	r1, [sp, #4]
-.L1837:
+.L1845:
 	cmp	r7, r2
-	bcc	.L1845
+	bcc	.L1853
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1850
+	bhi	.L1858
 	add	r2, r4, r2, lsl #3
 	uxth	r6, r6
 	strh	r0, [r2, #16]	@ movhi
@@ -12885,31 +12946,31 @@ rk_sftl_vendor_write:
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
 	ldr	r3, [r9, #-168]
-	b	.L1853
-.L1845:
+	b	.L1861
+.L1853:
 	add	r5, r4, r7, lsl #3
 	ldrh	r1, [r5, #16]
 	cmp	r1, r0
 	str	r1, [sp, #8]
-	bne	.L1838
+	bne	.L1846
 	ldrh	r1, [r5, #20]
 	add	fp, r4, #1024
 	adds	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r8, r1
 	str	r1, [sp, #12]
-	bls	.L1839
+	bls	.L1847
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1850
+	bhi	.L1858
 	ldrh	r10, [r5, #18]
 	subs	r2, r2, #1
 	str	r2, [sp, #16]
-.L1840:
+.L1848:
 	ldr	r2, [sp, #16]
 	adds	r5, r5, #8
 	cmp	r7, r2
-	bcc	.L1841
+	bcc	.L1849
 	ldrh	r2, [sp, #8]
 	add	r7, r4, r7, lsl #3
 	uxth	r5, r10
@@ -12928,7 +12989,7 @@ rk_sftl_vendor_write:
 	strh	r5, [r4, #12]	@ movhi
 	add	r6, r6, r3
 	strh	r6, [r4, #14]	@ movhi
-.L1842:
+.L1850:
 	ldr	r3, [r4, #4]
 	movw	r2, #65532
 	adds	r3, r3, #1
@@ -12941,20 +13002,20 @@ rk_sftl_vendor_write:
 	it	hi
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1854
+	ldr	r3, .L1862
 	ldr	r3, [r3, #-168]
-.L1853:
+.L1861:
 	ldr	r0, [sp, #4]
 	mov	r2, r4
 	movs	r1, #128
 	lsls	r0, r0, #7
 	blx	r3
 	movs	r0, #0
-.L1835:
+.L1843:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1841:
+.L1849:
 	ldrh	r9, [r5, #20]
 	add	r0, fp, r10
 	ldrh	r2, [r5, #16]
@@ -12971,24 +13032,24 @@ rk_sftl_vendor_write:
 	add	r10, r10, r9
 	bl	memcpy
 	ldr	r3, [sp, #20]
-	b	.L1840
-.L1839:
+	b	.L1848
+.L1847:
 	ldrh	r0, [r5, #18]
 	mov	r2, r8
 	mov	r1, r3
 	add	r0, r0, fp
 	bl	memcpy
 	strh	r8, [r5, #20]	@ movhi
-	b	.L1842
-.L1838:
+	b	.L1850
+.L1846:
 	adds	r7, r7, #1
-	b	.L1837
-.L1850:
+	b	.L1845
+.L1858:
 	mov	r0, #-1
-	b	.L1835
-.L1855:
+	b	.L1843
+.L1863:
 	.align	2
-.L1854:
+.L1862:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
@@ -13011,18 +13072,18 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	mov	r4, r0
 	cmp	r0, #0
-	beq	.L1870
-	ldr	r3, .L1882
+	beq	.L1878
+	ldr	r3, .L1890
 	cmp	r6, r3
-	beq	.L1859
+	beq	.L1867
 	adds	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1860
-.L1881:
+	beq	.L1868
+.L1889:
 	mvn	r5, #13
-	b	.L1858
-.L1859:
-	ldr	r6, .L1882+4
+	b	.L1866
+.L1867:
+	ldr	r6, .L1890+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13033,31 +13094,31 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1866
+	bne	.L1874
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1881
+	bne	.L1889
 	ldr	r2, [r4]
-	ldr	r3, .L1882+8
+	ldr	r3, .L1890+8
 	cmp	r2, r3
-	beq	.L1864
-.L1865:
+	beq	.L1872
+.L1873:
 	mov	r5, #-1
-.L1858:
+.L1866:
 	mov	r0, r4
 	bl	kfree
-.L1856:
+.L1864:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1864:
+.L1872:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	adds	r3, r0, #1
-	beq	.L1865
+	beq	.L1873
 	mov	r3, sp
 	uxth	r2, r0
 	ands	r6, r6, r3
@@ -13071,17 +13132,17 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1881
+	bne	.L1889
 	mov	r1, r4
 	mov	r0, r5
 	bl	arm_copy_to_user
 	cmp	r0, #0
-	bne	.L1881
-.L1872:
+	bne	.L1889
+.L1880:
 	mov	r5, r0
-	b	.L1858
-.L1860:
-	ldr	r6, .L1882+4
+	b	.L1866
+.L1868:
+	ldr	r6, .L1890+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13091,20 +13152,20 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1866
+	cbnz	r3, .L1874
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1881
+	bne	.L1889
 	ldr	r2, [r4]
-	ldr	r3, .L1882+8
+	ldr	r3, .L1890+8
 	cmp	r2, r3
-	bne	.L1865
+	bne	.L1873
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1865
+	bhi	.L1873
 	mov	r3, sp
 	adds	r2, r2, #8
 	ands	r6, r6, r3
@@ -13115,32 +13176,32 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1868
+	cbnz	r3, .L1876
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1881
+	bne	.L1889
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
-	b	.L1872
-.L1866:
+	b	.L1880
+.L1874:
 	movs	r1, #8
-.L1880:
+.L1888:
 	bl	__memzero
-	b	.L1881
-.L1868:
+	b	.L1889
+.L1876:
 	mov	r1, r2
 	mov	r0, r4
-	b	.L1880
-.L1870:
+	b	.L1888
+.L1878:
 	mov	r5, #-1
-	b	.L1856
-.L1883:
+	b	.L1864
+.L1891:
 	.align	2
-.L1882:
+.L1890:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13158,11 +13219,11 @@ rk_sftl_vendor_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1885
+	ldr	r0, .L1893
 	b	misc_register
-.L1886:
+.L1894:
 	.align	2
-.L1885:
+.L1893:
 	.word	.LANCHOR2+12
 	.fnend
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
@@ -13317,141 +13378,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6666, %object
-	.size	__func__.6666, 17
-__func__.6666:
+	.type	__func__.6668, %object
+	.size	__func__.6668, 17
+__func__.6668:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6661, %object
-	.size	__func__.6661, 17
-__func__.6661:
+	.type	__func__.6663, %object
+	.size	__func__.6663, 17
+__func__.6663:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6697, %object
-	.size	__func__.6697, 17
-__func__.6697:
+	.type	__func__.6699, %object
+	.size	__func__.6699, 17
+__func__.6699:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6729, %object
-	.size	__func__.6729, 22
-__func__.6729:
+	.type	__func__.6731, %object
+	.size	__func__.6731, 22
+__func__.6731:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6835, %object
-	.size	__func__.6835, 22
-__func__.6835:
+	.type	__func__.6837, %object
+	.size	__func__.6837, 22
+__func__.6837:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7158, %object
-	.size	__func__.7158, 16
-__func__.7158:
+	.type	__func__.7160, %object
+	.size	__func__.7160, 16
+__func__.7160:
 	.ascii	"make_superblock\000"
-	.type	__func__.7333, %object
-	.size	__func__.7333, 19
-__func__.7333:
+	.type	__func__.7335, %object
+	.size	__func__.7335, 19
+__func__.7335:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.17662, %object
-	.size	__func__.17662, 15
-__func__.17662:
+	.type	__func__.17672, %object
+	.size	__func__.17672, 15
+__func__.17672:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.17679, %object
-	.size	__func__.17679, 15
-__func__.17679:
+	.type	__func__.17689, %object
+	.size	__func__.17689, 15
+__func__.17689:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6771, %object
-	.size	__func__.6771, 26
-__func__.6771:
+	.type	__func__.6773, %object
+	.size	__func__.6773, 26
+__func__.6773:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6275, %object
-	.size	__func__.6275, 11
-__func__.6275:
+	.type	__func__.6277, %object
+	.size	__func__.6277, 11
+__func__.6277:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6501, %object
-	.size	__func__.6501, 14
-__func__.6501:
+	.type	__func__.6503, %object
+	.size	__func__.6503, 14
+__func__.6503:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6738, %object
-	.size	__func__.6738, 16
-__func__.6738:
+	.type	__func__.6740, %object
+	.size	__func__.6740, 16
+__func__.6740:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6796, %object
-	.size	__func__.6796, 31
-__func__.6796:
+	.type	__func__.6798, %object
+	.size	__func__.6798, 31
+__func__.6798:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6810, %object
-	.size	__func__.6810, 16
-__func__.6810:
+	.type	__func__.6812, %object
+	.size	__func__.6812, 16
+__func__.6812:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6782, %object
-	.size	__func__.6782, 15
-__func__.6782:
+	.type	__func__.6784, %object
+	.size	__func__.6784, 15
+__func__.6784:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6852, %object
-	.size	__func__.6852, 9
-__func__.6852:
+	.type	__func__.6854, %object
+	.size	__func__.6854, 9
+__func__.6854:
 	.ascii	"log2phys\000"
-	.type	__func__.7067, %object
-	.size	__func__.7067, 16
-__func__.7067:
+	.type	__func__.7069, %object
+	.size	__func__.7069, 16
+__func__.7069:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7220, %object
-	.size	__func__.7220, 14
-__func__.7220:
+	.type	__func__.7222, %object
+	.size	__func__.7222, 14
+__func__.7222:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6947, %object
-	.size	__func__.6947, 14
-__func__.6947:
+	.type	__func__.6949, %object
+	.size	__func__.6949, 14
+__func__.6949:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7179, %object
-	.size	__func__.7179, 18
-__func__.7179:
+	.type	__func__.7181, %object
+	.size	__func__.7181, 18
+__func__.7181:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7305, %object
-	.size	__func__.7305, 25
-__func__.7305:
+	.type	__func__.7307, %object
+	.size	__func__.7307, 25
+__func__.7307:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7346, %object
-	.size	__func__.7346, 16
-__func__.7346:
+	.type	__func__.7348, %object
+	.size	__func__.7348, 16
+__func__.7348:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7353, %object
-	.size	__func__.7353, 20
-__func__.7353:
+	.type	__func__.7355, %object
+	.size	__func__.7355, 20
+__func__.7355:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7101, %object
-	.size	__func__.7101, 22
-__func__.7101:
+	.type	__func__.7103, %object
+	.size	__func__.7103, 22
+__func__.7103:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6544, %object
-	.size	__func__.6544, 11
-__func__.6544:
+	.type	__func__.6546, %object
+	.size	__func__.6546, 11
+__func__.6546:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6925, %object
-	.size	__func__.6925, 15
-__func__.6925:
+	.type	__func__.6927, %object
+	.size	__func__.6927, 15
+__func__.6927:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7204, %object
-	.size	__func__.7204, 21
-__func__.7204:
+	.type	__func__.7206, %object
+	.size	__func__.7206, 21
+__func__.7206:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7326, %object
-	.size	__func__.7326, 29
-__func__.7326:
+	.type	__func__.7328, %object
+	.size	__func__.7328, 29
+__func__.7328:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6399, %object
-	.size	__func__.6399, 13
-__func__.6399:
+	.type	__func__.6401, %object
+	.size	__func__.6401, 13
+__func__.6401:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7423, %object
-	.size	__func__.7423, 19
-__func__.7423:
+	.type	__func__.7425, %object
+	.size	__func__.7425, 19
+__func__.7425:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7529, %object
-	.size	__func__.7529, 23
-__func__.7529:
+	.type	__func__.7531, %object
+	.size	__func__.7531, 23
+__func__.7531:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6427, %object
-	.size	__func__.6427, 9
-__func__.6427:
+	.type	__func__.6429, %object
+	.size	__func__.6429, 9
+__func__.6429:
 	.ascii	"FtlWrite\000"
-	.type	__func__.7004, %object
-	.size	__func__.7004, 15
-__func__.7004:
+	.type	__func__.7006, %object
+	.size	__func__.7006, 15
+__func__.7006:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -13481,7 +13542,7 @@ power_up_flag:
 	.size	rkflash_vender_storage_dev, 40
 rkflash_vender_storage_dev:
 	.word	255
-	.word	.LC107
+	.word	.LC110
 	.word	rk_sftl_vendor_storage_fops
 	.space	28
 	.bss
@@ -14265,70 +14326,77 @@ check_vpc_table:
 .LC74:
 	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
 .LC75:
-	.ascii	"\0014\000"
+	.ascii	"%s %p + 0x%x:\000"
 .LC76:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"0x%08x,\000"
 .LC77:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"0x%04x,\000"
 .LC78:
-	.ascii	"prog read d error: = %x %x %x\012\000"
+	.ascii	"0x%02x,\000"
 .LC79:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+	.ascii	"\012\000"
 .LC80:
+	.ascii	"prog read error: = %x\012\000"
+.LC81:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC82:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+.LC83:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC84:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-.LC81:
+.LC85:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
-.LC82:
+.LC86:
 	.ascii	"%s error allocating memory. return -1\012\000"
-.LC83:
+.LC87:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC84:
+.LC88:
 	.ascii	"spare:\000"
-.LC85:
+.LC89:
 	.ascii	"map_ppn:\000"
-.LC86:
+.LC90:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC87:
+.LC91:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-.LC88:
+.LC92:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC89:
+.LC93:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC90:
+.LC94:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC91:
+.LC95:
 	.ascii	"...%s enter...\012\000"
-.LC92:
+.LC96:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC93:
+.LC97:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC94:
+.LC98:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC95:
+.LC99:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC96:
+.LC100:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC97:
+.LC101:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC98:
+.LC102:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC99:
+.LC103:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC100:
+.LC104:
 	.ascii	"no ect\000"
-.LC101:
+.LC105:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC102:
+.LC106:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC103:
+.LC107:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC104:
+.LC108:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC105:
+.LC109:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC106:
-	.ascii	"\0013vendor storage %x,%x,%x\012\000"
-.LC107:
-	.ascii	"vendor_storage\000"
\ No newline at end of file
+.LC110:
+	.ascii	"vendor_storage\000"
+
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index add0746980252..e8896074a6c0b 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-07-19
+ * date: 2018-08-07
  */
 	.arch armv8-a
 	.file	"rk_sftl.c"
@@ -305,7 +305,7 @@ FtlBbmMapBadBlock:
 	str	w4, [x0, x5]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
-	bl	printk
+	bl	sftl_printk
 	ldrh	w0, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 6]
@@ -651,7 +651,7 @@ INSERT_DATA_LIST:
 	mov	w2, 221
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L84:
 	ldp	x29, x30, [sp], 16
 	ret
@@ -748,7 +748,7 @@ INSERT_FREE_LIST:
 	mov	w2, 214
 	add	x1, x1, 24
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L94:
 	ldp	x29, x30, [sp], 16
 	ret
@@ -783,7 +783,7 @@ List_remove_node:
 	mov	w2, 379
 	add	x1, x1, 48
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L98:
 	ldr	x0, [x23]
 	mov	w1, 65535
@@ -973,7 +973,7 @@ List_update_data_list:
 	mov	w2, 470
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L128:
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
@@ -1011,7 +1011,7 @@ List_update_data_list:
 	mov	w2, 481
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L131:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2400]
@@ -1069,7 +1069,7 @@ select_l2p_ram_region:
 	add	x1, x1, 96
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 	b	.L137
 .L138:
 	add	x3, x3, 1
@@ -1288,7 +1288,7 @@ make_superblock:
 	mov	w2, 2097
 	add	x1, x1, 120
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L174:
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x6, x19, 16
@@ -2123,7 +2123,7 @@ GetSwlReplaceBlock:
 	ldrh	w4, [x0, x7]
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
-	bl	printk
+	bl	sftl_printk
 	mov	w0, 1
 	str	w0, [x19, 3244]
 	b	.L228
@@ -2191,7 +2191,7 @@ get_new_active_ppa:
 	mov	w2, 2707
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L250:
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
@@ -2205,7 +2205,7 @@ get_new_active_ppa:
 	mov	w2, 2708
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L251:
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L252
@@ -2215,7 +2215,7 @@ get_new_active_ppa:
 	mov	w2, 2709
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L252:
 	ldrb	w0, [x19, 6]
 	add	x1, x20, :lo12:.LANCHOR0
@@ -2262,7 +2262,7 @@ get_new_active_ppa:
 	mov	w2, 2730
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 .L249:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
@@ -2525,7 +2525,7 @@ FtlGcRefreshBlock:
 	mov	w1, w19
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
-	bl	printk
+	bl	sftl_printk
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w3, [x0, 3320]
@@ -2568,7 +2568,7 @@ FtlGcMarkBadPhyBlk:
 	mov	w22, w0
 	adrp	x0, .LC74
 	add	x0, x0, :lo12:.LC74
-	bl	printk
+	bl	sftl_printk
 	mov	w0, w22
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x20, -4]
@@ -2659,21 +2659,74 @@ ftl_free:
 	.global	rknand_print_hex
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-	stp	x29, x30, [sp, -16]!
-	mul	w3, w3, w2
-	mov	x5, x1
-	mov	w4, w2
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	mov	x1, x0
-	sxtw	x6, w3
-	mov	w7, 0
-	mov	w3, 16
-	mov	w2, 2
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
-	bl	print_hex_dump
-	ldp	x29, x30, [sp], 16
+	stp	x21, x22, [sp, 32]
+	mov	x21, x1
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LC75
+	stp	x25, x26, [sp, 64]
+	mov	w23, w2
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LC78
+	mov	x27, x0
+	mov	w26, w3
+	add	x24, x24, :lo12:.LC75
+	add	x25, x25, :lo12:.LC78
+	stp	x19, x20, [sp, 16]
+	mov	w22, 0
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x28, .LC77
+.L314:
+	cmp	w26, w19
+	bhi	.L320
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	sftl_printk
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
+.L320:
+	cbnz	w20, .L315
+	mov	w3, w22
+	mov	x2, x21
+	mov	x1, x27
+	mov	x0, x24
+	bl	sftl_printk
+.L315:
+	cmp	w23, 4
+	bne	.L316
+	ldr	w1, [x21, x19, lsl 2]
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+.L322:
+	bl	sftl_printk
+	add	w20, w20, 1
+	cmp	w20, 15
+	bls	.L319
+	mov	w20, 0
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	sftl_printk
+.L319:
+	add	x19, x19, 1
+	add	w22, w22, w23
+	b	.L314
+.L316:
+	cmp	w23, 2
+	bne	.L318
+	ldrh	w1, [x21, x19, lsl 1]
+	add	x0, x28, :lo12:.LC77
+	b	.L322
+.L318:
+	ldrb	w1, [x21, x19]
+	mov	x0, x25
+	b	.L322
 	.size	rknand_print_hex, .-rknand_print_hex
 	.align	2
 	.global	FlashReadPages
@@ -2696,9 +2749,9 @@ FlashReadPages:
 	add	x23, x0, x1
 	add	x20, x20, 160
 	add	x21, x21, :lo12:.LC1
-.L316:
+.L324:
 	cmp	x19, x23
-	bne	.L323
+	bne	.L331
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2706,17 +2759,17 @@ FlashReadPages:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L323:
+.L331:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L317
+	cbz	x0, .L325
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L318
-.L317:
-	mov	w2, 76
+	cbnz	x0, .L326
+.L325:
+	mov	w2, 101
 	mov	x1, x20
 	mov	x0, x21
-	bl	printk
-.L318:
+	bl	sftl_printk
+.L326:
 	ldr	w0, [x19, 4]
 	add	x26, x22, :lo12:.LANCHOR0
 	add	x2, x29, 88
@@ -2730,7 +2783,7 @@ FlashReadPages:
 	str	w0, [x19]
 	ldrh	w0, [x26, 14]
 	cmp	w0, 4
-	bne	.L320
+	bne	.L328
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x26, 3392]
 	ldp	x2, x3, [x19, 8]
@@ -2740,23 +2793,23 @@ FlashReadPages:
 	add	w1, w25, w1
 	blr	x4
 	cmn	w0, #1
-	beq	.L321
+	beq	.L329
 	ldr	x0, [x19, 16]
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L320
+	bne	.L328
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L320
+	bne	.L328
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L320
-.L321:
+	beq	.L328
+.L329:
 	mov	w0, -1
 	str	w0, [x19]
-.L320:
+.L328:
 	add	x19, x19, 32
-	b	.L316
+	b	.L324
 	.size	FlashReadPages, .-FlashReadPages
 	.align	2
 	.global	FtlLoadFactoryBbt
@@ -2779,10 +2832,10 @@ FtlLoadFactoryBbt:
 	ldr	x1, [x0, 3432]
 	ldr	x24, [x0, 3440]
 	stp	x1, x24, [x23, 8]
-.L335:
+.L343:
 	ldrh	w0, [x19, 58]
 	cmp	w21, w0
-	bcc	.L340
+	bcc	.L348
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2790,17 +2843,17 @@ FtlLoadFactoryBbt:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L340:
+.L348:
 	ldrh	w20, [x19, 102]
 	mov	w0, -1
 	strh	w0, [x22]
-.L337:
+.L345:
 	ldrh	w0, [x19, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L338
+	ble	.L346
 	madd	w0, w0, w21, w20
 	mov	w2, 1
 	mov	w1, w2
@@ -2810,15 +2863,15 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L337
+	beq	.L345
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L337
+	bne	.L345
 	strh	w20, [x22]
-.L338:
+.L346:
 	add	w21, w21, 1
 	add	x22, x22, 2
-	b	.L335
+	b	.L343
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
@@ -2833,9 +2886,9 @@ FtlGetLastWrittenPage:
 	adrp	x1, .LANCHOR0
 	stp	x21, x22, [sp, 32]
 	add	x1, x1, :lo12:.LANCHOR0
-	bne	.L346
+	bne	.L354
 	ldrh	w19, [x1, 108]
-.L347:
+.L355:
 	sub	w19, w19, #1
 	adrp	x1, ftl_temp_buf
 	sxth	w19, w19
@@ -2852,23 +2905,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L348
+	bne	.L356
 	mov	w22, 0
 	mov	w24, 2
-.L349:
+.L357:
 	cmp	w22, w19
-	ble	.L352
-.L348:
+	ble	.L360
+.L356:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L346:
+.L354:
 	ldrh	w19, [x1, 106]
-	b	.L347
-.L352:
+	b	.L355
+.L360:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -2880,17 +2933,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L350
+	bne	.L358
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L350
+	bne	.L358
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L349
-.L350:
+	b	.L357
+.L358:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L349
+	b	.L357
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	2
 	.global	FlashProgPages
@@ -2917,11 +2970,11 @@ FlashProgPages:
 	mov	x19, x0
 	add	x22, x22, 176
 	add	x23, x23, :lo12:.LC1
-.L355:
+.L363:
 	cmp	x19, x24
-	bne	.L363
-	cbnz	w26, .L364
-.L382:
+	bne	.L371
+	cbnz	w26, .L372
+.L390:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2930,17 +2983,17 @@ FlashProgPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L363:
+.L371:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L356
+	cbz	x0, .L364
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L357
-.L356:
-	mov	w2, 106
+	cbnz	x0, .L365
+.L364:
+	mov	w2, 131
 	mov	x1, x22
 	mov	x0, x23
-	bl	printk
-.L357:
+	bl	sftl_printk
+.L365:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
@@ -2951,13 +3004,13 @@ FlashProgPages:
 	ldr	x4, [x0, 3384]
 	ldrb	w0, [x29, 104]
 	blr	x4
-	cbnz	w0, .L358
+	cbnz	w0, .L366
 	str	wzr, [x19]
-.L359:
+.L367:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 14]
 	cmp	w1, 4
-	bne	.L361
+	bne	.L369
 	ldr	x4, [x0, 3384]
 	ldrb	w0, [x29, 104]
 	ldp	x2, x3, [x19, 8]
@@ -2966,17 +3019,17 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-	cbz	w0, .L361
+	cbz	w0, .L369
 	mov	w0, -1
 	str	w0, [x19]
-.L361:
+.L369:
 	add	x19, x19, 32
-	b	.L355
-.L358:
+	b	.L363
+.L366:
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L359
-.L368:
+	b	.L367
+.L376:
 	str	wzr, [x21]
 	mov	w2, w25
 	str	wzr, [x23]
@@ -2988,50 +3041,50 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w24, [x29, 112]
 	cmn	w24, #1
-	bne	.L365
+	bne	.L373
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
-	bl	printk
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	sftl_printk
 	str	w24, [x20]
-.L365:
+.L373:
 	ldr	x0, [x20, 16]
-	cbz	x0, .L366
+	cbz	x0, .L374
 	ldr	w2, [x0]
 	ldr	w3, [x21]
 	cmp	w2, w3
-	beq	.L366
+	beq	.L374
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
-	bl	printk
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L366:
+.L374:
 	ldr	x0, [x20, 8]
-	cbz	x0, .L367
+	cbz	x0, .L375
 	ldr	w3, [x22, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L367
+	beq	.L375
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
-	bl	printk
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L367:
+.L375:
 	add	x20, x20, 32
-.L383:
+.L391:
 	cmp	x20, x19
-	bne	.L368
-	b	.L382
-.L364:
+	bne	.L376
+	b	.L390
+.L372:
 	add	x21, x21, :lo12:.LANCHOR0
 	adrp	x22, check_buf
 	add	x21, x21, 3448
 	add	x23, x22, :lo12:check_buf
-	b	.L383
+	b	.L391
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
@@ -3050,16 +3103,16 @@ FlashEraseBlocks:
 	add	x22, x0, x2
 	mov	w21, -1
 	ldrh	w23, [x19, 12]
-.L386:
+.L394:
 	cmp	x20, x22
-	bne	.L392
+	bne	.L400
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L392:
+.L400:
 	ldr	w0, [x20]
 	add	x2, x29, 72
 	add	x1, x29, 76
@@ -3073,17 +3126,17 @@ FlashEraseBlocks:
 	str	w0, [x20, -4]
 	ldrh	w0, [x19, 14]
 	cmp	w0, 4
-	bne	.L390
+	bne	.L398
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x19, 3376]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-	cbz	w0, .L390
+	cbz	w0, .L398
 	str	w21, [x20, -4]
-.L390:
+.L398:
 	add	x20, x20, 32
-	b	.L386
+	b	.L394
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
@@ -3097,15 +3150,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w21, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L397
+	bcc	.L405
 	adrp	x0, .LANCHOR0
 	add	x20, x0, :lo12:.LANCHOR0
 	mov	x19, x0
 	ldrh	w2, [x20, 262]
 	cmp	w2, 1024
-	beq	.L397
+	beq	.L405
 	and	w1, w1, 65535
-	cbz	w1, .L399
+	cbz	w1, .L407
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w22, w0, 65535
@@ -3124,7 +3177,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x20, 2640]
 	add	w0, w0, 1
 	str	w0, [x20, 2640]
-.L399:
+.L407:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 256
 	ldrh	w1, [x0, 6]
@@ -3136,7 +3189,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w21, [x2, 8]
-.L397:
+.L405:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -3163,11 +3216,11 @@ FtlLowFormatEraseBlock:
 	mov	w21, 0
 	mov	w19, 0
 	str	w24, [x5, 3968]
-.L408:
+.L416:
 	ldrh	w0, [x5, 36]
 	cmp	w0, w10
-	bhi	.L412
-	cbz	w21, .L407
+	bhi	.L420
+	cbz	w21, .L415
 	ldr	x0, [x5, 3960]
 	mov	w2, w21
 	mov	w1, 0
@@ -3175,40 +3228,40 @@ FtlLowFormatEraseBlock:
 	mov	x22, 0
 	add	x25, x20, :lo12:.LANCHOR0
 	bl	FlashEraseBlocks
-.L416:
+.L424:
 	ldr	x0, [x25, 3960]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L415
+	bne	.L423
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L415:
+.L423:
 	add	x22, x22, 32
 	cmp	x22, x21
-	bne	.L416
-	cbz	w23, .L429
+	bne	.L424
+	cbz	w23, .L437
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w25, 1
 	ldrh	w26, [x0, 108]
 	lsr	w0, w26, 2
 	str	w0, [x29, 124]
-.L417:
+.L425:
 	add	x27, x20, :lo12:.LANCHOR0
 	mov	w22, 0
 	add	x0, x27, 64
 	str	x0, [x29, 112]
-.L425:
+.L433:
 	mov	w5, 0
 	mov	w21, 0
-.L418:
+.L426:
 	ldrh	w0, [x27, 36]
 	cmp	w0, w5
-	bhi	.L421
-	cbz	w21, .L407
+	bhi	.L429
+	cbz	w21, .L415
 	ldr	x0, [x27, 3960]
 	mov	w1, w21
 	mov	w3, 1
@@ -3216,11 +3269,11 @@ FtlLowFormatEraseBlock:
 	mov	x28, 0
 	bl	FlashProgPages
 	ubfiz	x1, x21, 5, 16
-.L424:
+.L432:
 	ldr	x0, [x27, 3960]
 	add	x3, x0, x28
 	ldr	w0, [x0, x28]
-	cbz	w0, .L423
+	cbz	w0, .L431
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 104]
@@ -3228,40 +3281,40 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 104]
-.L423:
+.L431:
 	add	x28, x28, 32
 	cmp	x1, x28
-	bne	.L424
+	bne	.L432
 	ldr	w0, [x29, 124]
 	add	w22, w22, w0
 	and	w22, w22, 65535
 	cmp	w26, w22
-	bhi	.L425
+	bhi	.L433
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	x22, 0
-.L427:
-	cbz	w23, .L426
+.L435:
+	cbz	w23, .L434
 	ldr	x0, [x26, 3960]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L426
+	cbnz	w0, .L434
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L426:
+.L434:
 	add	x22, x22, 32
 	cmp	x22, x28
-	bne	.L427
+	bne	.L435
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L407
+	beq	.L415
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w2, w21
 	mov	w1, w25
 	ldr	x0, [x20, 3960]
 	bl	FlashEraseBlocks
-.L407:
+.L415:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3270,7 +3323,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L412:
+.L420:
 	ldr	x1, [x5, 3960]
 	ubfiz	x0, x10, 5, 16
 	str	wzr, [x1, x0]
@@ -3279,13 +3332,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L409
+	cbz	w23, .L417
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L410
-.L409:
+	cbnz	w0, .L418
+.L417:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L411
+	cbnz	w0, .L419
 	ldr	x0, [x5, 3960]
 	ubfiz	x2, x21, 5, 16
 	lsl	w6, w6, 10
@@ -3303,21 +3356,21 @@ FtlLowFormatEraseBlock:
 	sdiv	w0, w0, w9
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L410:
+.L418:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L408
-.L411:
+	b	.L416
+.L419:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L410
-.L429:
+	b	.L418
+.L437:
 	mov	w0, 6
 	mov	w25, 0
 	mov	w26, 1
 	str	w0, [x29, 124]
-	b	.L417
-.L421:
+	b	.L425
+.L429:
 	ldr	x1, [x27, 3960]
 	ubfiz	x0, x5, 5, 16
 	str	wzr, [x1, x0]
@@ -3327,13 +3380,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L419
+	cbz	w23, .L427
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L420
-.L419:
+	cbnz	w0, .L428
+.L427:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L420
+	cbnz	w0, .L428
 	ldr	x0, [x27, 3960]
 	ubfiz	x2, x21, 5, 16
 	add	w6, w22, w6, lsl 10
@@ -3352,10 +3405,10 @@ FtlLowFormatEraseBlock:
 	ldr	x2, [x27, 3976]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L420:
+.L428:
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L418
+	b	.L426
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
@@ -3368,12 +3421,12 @@ FtlFreeSysBlkQueueOut:
 	add	x19, x19, :lo12:.LANCHOR0
 	str	x23, [sp, 48]
 	add	x20, x19, 256
-	adrp	x23, .LC80
-	add	x23, x23, :lo12:.LC80
+	adrp	x23, .LC84
+	add	x23, x23, :lo12:.LC84
 	stp	x21, x22, [sp, 32]
-.L451:
+.L459:
 	ldrh	w1, [x20, 6]
-	cbz	w1, .L452
+	cbz	w1, .L460
 	ldrh	w0, [x20, 2]
 	sub	w1, w1, #1
 	strh	w1, [x20, 6]
@@ -3403,26 +3456,26 @@ FtlFreeSysBlkQueueOut:
 	str	w0, [x19, 2640]
 	mov	w0, 65533
 	cmp	w0, w1, uxth
-	bcs	.L456
-	ldrh	w2, [x20, 6]
-	mov	w1, w21
-	mov	x0, x23
-	bl	printk
-	b	.L451
-.L452:
-	adrp	x0, .LC79
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC79
-	bl	printk
-.L455:
-	b	.L455
-.L456:
+	bcc	.L461
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
+.L460:
+	adrp	x0, .LC83
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC83
+	bl	sftl_printk
+.L463:
+	b	.L463
+.L461:
+	ldrh	w2, [x20, 6]
+	mov	w1, w21
+	mov	x0, x23
+	bl	sftl_printk
+	b	.L459
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
@@ -3436,27 +3489,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldrh	w1, [x0, 10]
 	ldr	x0, [x0, 16]
-.L459:
+.L467:
 	cmp	w20, w1
-	beq	.L463
+	beq	.L471
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L460
+	cbnz	w2, .L468
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L461
+	bcs	.L469
 	adrp	x0, .LANCHOR0+262
 	ldrh	w2, [x0, #:lo12:.LANCHOR0+262]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	bl	printk
-.L462:
-	b	.L462
-.L461:
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	bl	sftl_printk
+.L470:
+	b	.L470
+.L469:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3465,27 +3518,27 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L463:
+.L471:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L465
+	bhi	.L473
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 581
 	add	x1, x1, 192
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L465:
+	bl	sftl_printk
+.L473:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L460:
+.L468:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L459
+	b	.L467
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	2
 	.global	ftl_memset
@@ -3701,117 +3754,117 @@ FtlMemInit:
 	str	x0, [x19, 192]
 	mov	w2, w4
 	mov	x0, x20
-.L470:
+.L478:
 	cmp	w1, w6
-	bcc	.L471
+	bcc	.L479
 	mov	w2, 8
 	add	x4, x0, :lo12:.LANCHOR0
 	sub	w2, w2, w1
 	add	x4, x4, 160
 	add	x2, x2, 1
 	mov	x3, 0
-.L472:
+.L480:
 	add	x3, x3, 1
 	cmp	x3, x2
-	bne	.L473
+	bne	.L481
 	add	x2, x0, :lo12:.LANCHOR0
 	ldr	x1, [x2, 4088]
-	cbnz	x1, .L474
-.L476:
+	cbnz	x1, .L482
+.L484:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 224
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	bl	printk
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	bl	sftl_printk
 	mov	w0, -1
-.L469:
+.L477:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L471:
+.L479:
 	ldr	x3, [x19, 192]
 	add	w1, w1, 1
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x5], 8
-	b	.L470
-.L473:
+	b	.L478
+.L481:
 	add	x5, x1, x3
 	add	x5, x4, x5, lsl 3
 	str	xzr, [x5, 24]
-	b	.L472
-.L474:
+	b	.L480
+.L482:
 	add	x1, x21, :lo12:.LANCHOR3
 	ldr	x3, [x1, -256]
-	cbz	x3, .L476
+	cbz	x3, .L484
 	ldr	x3, [x1, -224]
-	cbz	x3, .L476
+	cbz	x3, .L484
 	ldr	x3, [x1, -216]
-	cbz	x3, .L476
+	cbz	x3, .L484
 	ldr	x3, [x2, 2568]
-	cbz	x3, .L476
+	cbz	x3, .L484
 	ldr	x1, [x1, -208]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x2, 2360]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x2, 192]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x2, 2376]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	add	x1, x0, :lo12:.LANCHOR0
 	ldr	x2, [x1, 3296]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 3312]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 4016]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 4032]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 3960]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 3280]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 4024]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 3432]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x2, [x1, 4040]
-	cbz	x2, .L476
+	cbz	x2, .L484
 	ldr	x1, [x1, 4048]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x1, [x0, 3264]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3992]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3976]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3256]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3440]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3984]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 3272]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 2384]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, 4064]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x0, [x0, 152]
-	cbz	x0, .L476
+	cbz	x0, .L484
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	x1, [x0, -248]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x1, [x0, -240]
-	cbz	x1, .L476
+	cbz	x1, .L484
 	ldr	x0, [x0, -232]
-	cbz	x0, .L476
+	cbz	x0, .L484
 	mov	w0, 0
-	b	.L469
+	b	.L477
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -3836,20 +3889,20 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.L574:
+.L582:
 	ldrh	w0, [x22, x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L571
+	beq	.L579
 	ldrh	w1, [x23, 102]
 	cmp	w1, w0
-	bhi	.L573
+	bhi	.L581
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L573:
+	bl	sftl_printk
+.L581:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -3860,8 +3913,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x21, x0]
 	orr	w1, w1, w2
 	str	w1, [x21, x0]
-	bne	.L574
-.L571:
+	bne	.L582
+.L579:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -3923,21 +3976,21 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, 140]
 	cmp	w1, w20
-	bcs	.L583
+	bcs	.L591
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 492
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L583:
+	bl	sftl_printk
+.L591:
 	adrp	x22, .LANCHOR3
 	add	x22, x22, :lo12:.LANCHOR3
 	ubfiz	x0, x20, 2, 16
 	ldr	x1, [x22, -224]
 	ldr	w25, [x1, x0]
-	cbnz	w25, .L584
+	cbnz	w25, .L592
 	add	x24, x24, :lo12:.LANCHOR0
 	lsl	x19, x19, 4
 	mov	w1, 255
@@ -3951,7 +4004,7 @@ load_l2p_region:
 	ldr	x0, [x24, 2568]
 	add	x19, x0, x19
 	str	wzr, [x19, 4]
-.L585:
+.L593:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3959,7 +4012,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L584:
+.L592:
 	add	x23, x24, :lo12:.LANCHOR0
 	lsl	x19, x19, 4
 	add	x21, x23, 3400
@@ -3977,43 +4030,43 @@ load_l2p_region:
 	ldr	x26, [x23, 3416]
 	ldrh	w0, [x26, 8]
 	cmp	w0, w20
-	beq	.L586
+	beq	.L594
 	mov	w2, w25
 	mov	w1, w20
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
-	bl	printk
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	sftl_printk
 	ldr	x1, [x23, 3416]
 	mov	w3, 4
-	adrp	x0, .LC84
+	adrp	x0, .LC88
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
 	ldrh	w3, [x23, 140]
-	adrp	x0, .LC85
+	adrp	x0, .LC89
 	ldr	x1, [x22, -224]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC89
 	bl	rknand_print_hex
-.L586:
+.L594:
 	ldrh	w0, [x26, 8]
 	cmp	w0, w20
-	beq	.L587
+	beq	.L595
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 513
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L587:
+	bl	sftl_printk
+.L595:
 	add	x0, x24, :lo12:.LANCHOR0
 	ldr	x1, [x0, 2568]
 	add	x1, x1, x19
 	str	wzr, [x1, 4]
 	ldr	x0, [x0, 2568]
 	strh	w20, [x0, x19]
-	b	.L585
+	b	.L593
 	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_free_no_use_map_blk
@@ -4034,19 +4087,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L590:
+.L598:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L594
+	bhi	.L602
 	ldrh	w26, [x21]
 	adrp	x24, .LANCHOR0
 	add	x24, x24, :lo12:.LANCHOR0
 	mov	w25, 0
 	mov	w20, 0
-.L595:
+.L603:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L599
+	bhi	.L607
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4054,61 +4107,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L594:
+.L602:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L591:
+.L599:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L593
+	bhi	.L601
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L590
-.L593:
+	b	.L598
+.L601:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L592
+	bne	.L600
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L592:
+.L600:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L591
-.L599:
+	b	.L599
+.L607:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L596
+	bne	.L604
 	ldrh	w0, [x24, 108]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L596
+	bcs	.L604
 	strh	w0, [x21, x22, lsl 1]
-.L596:
+.L604:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L597
+	bls	.L605
 	mov	w25, w20
 	mov	w26, w0
-.L597:
-	cbnz	w0, .L598
+.L605:
+	cbnz	w0, .L606
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L598
+	cbz	w0, .L606
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L598:
+.L606:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L595
+	b	.L603
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
@@ -4124,17 +4177,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x0, 16]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L605
+	bne	.L613
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L606
+	cbz	w0, .L614
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, 272
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L606:
+	bl	sftl_printk
+.L614:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -4145,14 +4198,14 @@ Ftl_write_map_blk_to_last_page:
 	strh	wzr, [x19]
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-.L607:
+.L615:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L605:
+.L613:
 	ubfiz	x0, x0, 1, 16
 	adrp	x21, .LANCHOR0
 	ldr	w1, [x19, 48]
@@ -4179,10 +4232,10 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	mov	w0, 0
 	mov	w1, 0
-.L608:
+.L616:
 	ldrh	w2, [x19, 6]
 	cmp	w2, w1
-	bhi	.L610
+	bhi	.L618
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w2, 1
 	mov	w3, 0
@@ -4194,12 +4247,12 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L607
-.L610:
+	b	.L615
+.L618:
 	ubfiz	x2, x1, 2, 16
 	ldr	w3, [x23, x2]
 	cmp	w22, w3, lsr 10
-	bne	.L609
+	bne	.L617
 	add	w0, w0, 1
 	ldr	x4, [x20, 3432]
 	and	w0, w0, 65535
@@ -4209,10 +4262,10 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x2, [x20, 3432]
 	add	x2, x2, x3
 	str	w4, [x2, 4]
-.L609:
+.L617:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L608
+	b	.L616
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
@@ -4235,7 +4288,7 @@ FtlMapWritePage:
 	add	x22, x22, :lo12:.LANCHOR1
 	add	x20, x24, 3400
 	mov	w21, 0
-.L616:
+.L624:
 	add	x0, x23, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2604]
 	add	w1, w1, 1
@@ -4244,35 +4297,35 @@ FtlMapWritePage:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L617
+	bge	.L625
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L618
-.L617:
+	bne	.L626
+.L625:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L618:
+.L626:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L619
+	cbnz	w0, .L627
 	adrp	x0, .LC1
 	mov	w2, 699
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L619:
+	bl	sftl_printk
+.L627:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L620
+	bcc	.L628
 	adrp	x0, .LC1
 	mov	w2, 700
 	add	x1, x22, 304
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L620:
+	bl	sftl_printk
+.L628:
 	ldrh	w1, [x19]
 	mov	w2, 16
 	ldr	x0, [x19, 16]
@@ -4303,38 +4356,38 @@ FtlMapWritePage:
 	strh	w0, [x19, 2]
 	ldr	w1, [x20]
 	cmn	w1, #1
-	bne	.L621
+	bne	.L629
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	bl	printk
+	bl	sftl_printk
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L622
+	bhi	.L630
 	ldrh	w0, [x24, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L622:
+.L630:
 	cmp	w21, 3
-	bls	.L623
+	bls	.L631
 	add	x25, x25, :lo12:.LANCHOR0
-	adrp	x0, .LC87
+	adrp	x0, .LC91
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC91
 	ldr	w1, [x25, 3404]
-	bl	printk
-.L624:
-	b	.L624
-.L623:
+	bl	sftl_printk
+.L632:
+	b	.L632
+.L631:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L616
-.L633:
-	b	.L633
-.L621:
+	cbz	w0, .L624
+.L641:
+	b	.L641
+.L629:
 	cmp	w0, 1
-	beq	.L616
+	beq	.L624
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w26, uxtw 2]
@@ -4367,12 +4420,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L636
+	blt	.L644
 	ubfiz	x0, x0, 1, 16
 	ldrh	w24, [x20, x0]
-	cbz	w24, .L636
+	cbz	w24, .L644
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L636
+	cbnz	w1, .L644
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -4383,33 +4436,33 @@ ftl_map_blk_gc:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 108]
 	cmp	w1, w0
-	bcc	.L637
+	bcc	.L645
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L637:
+.L645:
 	add	x26, x22, :lo12:.LANCHOR0
 	adrp	x23, .LANCHOR1
 	add	x23, x23, :lo12:.LANCHOR1
 	add	x21, x26, 3400
 	add	x23, x23, 320
 	mov	w20, 0
-.L638:
+.L646:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L642
+	bhi	.L650
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L636:
+.L644:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x22, 108]
 	cmp	w1, w0
-	bcc	.L643
+	bcc	.L651
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L643:
+.L651:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4418,11 +4471,11 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L642:
+.L650:
 	ubfiz	x27, x20, 2, 16
 	ldr	w0, [x25, x27]
 	cmp	w24, w0, lsr 10
-	bne	.L639
+	bne	.L647
 	ldr	x28, [x26, 3440]
 	mov	w2, 1
 	ldr	x0, [x26, 4040]
@@ -4434,27 +4487,27 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L640
+	beq	.L648
 	adrp	x0, .LC1
 	mov	w2, 613
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L640:
+	bl	sftl_printk
+.L648:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L641
+	bne	.L649
 	str	wzr, [x25, x27]
-.L639:
+.L647:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L638
-.L641:
+	b	.L646
+.L649:
 	ldr	x2, [x21, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L639
+	b	.L647
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
 	.global	flush_l2p_region
@@ -4509,23 +4562,23 @@ log2phys:
 	and	w19, w19, w0
 	cmp	w0, w1
 	and	x19, x19, 65535
-	bcc	.L651
+	bcc	.L659
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 808
 	add	x1, x1, 336
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L651:
+	bl	sftl_printk
+.L659:
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 142]
 	ldr	x2, [x0, 2568]
 	mov	x0, 0
-.L652:
+.L660:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L657
+	bcc	.L665
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	add	x2, x24, :lo12:.LANCHOR0
@@ -4536,39 +4589,39 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L658
+	beq	.L666
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L658
+	tbz	w1, #31, .L666
 	bl	flush_l2p_region
-.L658:
+.L666:
 	mov	w1, w25
 	mov	w0, w21
 	bl	load_l2p_region
-	b	.L653
-.L657:
+	b	.L661
+.L665:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w21
-	bne	.L652
-.L653:
-	cbnz	w23, .L654
+	bne	.L660
+.L661:
+	cbnz	w23, .L662
 	add	x0, x24, :lo12:.LANCHOR0
 	ldr	x0, [x0, 2568]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x22]
-.L655:
+.L663:
 	add	x24, x24, :lo12:.LANCHOR0
 	ldr	x0, [x24, 2568]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L660
+	beq	.L668
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L660:
+.L668:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4576,7 +4629,7 @@ log2phys:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L654:
+.L662:
 	add	x2, x24, :lo12:.LANCHOR0
 	lsl	x0, x20, 4
 	mov	x1, x0
@@ -4591,7 +4644,7 @@ log2phys:
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	b	.L655
+	b	.L663
 	.size	log2phys, .-log2phys
 	.align	2
 	.global	FtlReUsePrevPpa
@@ -4612,9 +4665,9 @@ FtlReUsePrevPpa:
 	ubfiz	x20, x0, 1, 16
 	ldr	x3, [x2, 2376]
 	ldrh	w1, [x3, x20]
-	cbnz	w1, .L666
+	cbnz	w1, .L674
 	ldr	x19, [x2, 2408]
-	cbz	x19, .L667
+	cbz	x19, .L675
 	ldrh	w3, [x2, 2416]
 	mov	x4, -6148914691236517206
 	ldr	x2, [x2, 2360]
@@ -4625,25 +4678,25 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x4
 	mov	w4, 6
 	and	w19, w19, 65535
-.L668:
+.L676:
 	cmp	w1, w3
-	beq	.L667
+	beq	.L675
 	cmp	w19, w0
-	bne	.L669
+	bne	.L677
 	add	x23, x22, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x23, 2408
 	bl	List_remove_node
 	ldrh	w0, [x23, 2416]
-	cbnz	w0, .L670
+	cbnz	w0, .L678
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1688
 	add	x1, x1, 352
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L670:
+	bl	sftl_printk
+.L678:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 2416]
 	sub	w0, w0, #1
@@ -4654,7 +4707,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L667:
+.L675:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -4664,27 +4717,27 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L669:
+.L677:
 	umull	x19, w19, w4
 	ldrh	w19, [x2, x19]
 	cmp	w19, w5
-	beq	.L667
+	beq	.L675
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L668
-.L666:
+	b	.L676
+.L674:
 	add	w1, w1, 1
 	strh	w1, [x3, x20]
-	b	.L667
+	b	.L675
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	2
 	.global	ftl_scan_all_data
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	sub	sp, sp, #96
-	adrp	x0, .LC88
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC88
+	add	x0, x0, :lo12:.LC92
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
@@ -4694,34 +4747,34 @@ ftl_scan_all_data:
 	str	x23, [sp, 64]
 	mov	w20, 0
 	add	x19, x21, 3400
-	bl	printk
-.L677:
+	bl	sftl_printk
+.L685:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	w0, [x0, 2584]
 	cmp	w20, w0
-	bcc	.L683
+	bcc	.L691
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L683:
+.L691:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w20
 	bl	log2phys
 	tst	x20, 2047
-	bne	.L678
+	bne	.L686
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC89
+	adrp	x0, .LC93
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC89
-	bl	printk
-.L678:
+	add	x0, x0, :lo12:.LC93
+	bl	sftl_printk
+.L686:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L680
+	beq	.L688
 	ldr	x23, [x21, 3440]
 	mov	w2, 0
 	stp	wzr, w0, [x19]
@@ -4735,25 +4788,25 @@ ftl_scan_all_data:
 	ldr	w0, [x19]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L681
+	beq	.L689
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L680
-.L681:
+	beq	.L688
+.L689:
 	ldp	x1, x0, [x19, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC90
+	adrp	x0, .LC94
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC94
 	ldr	w2, [x19, 4]
 	mov	w1, w20
-	bl	printk
-.L680:
+	bl	sftl_printk
+.L688:
 	add	w20, w20, 1
-	b	.L677
+	b	.L685
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -4763,22 +4816,22 @@ FtlReadRefresh:
 	add	x1, x0, :lo12:.LANCHOR0
 	add	x2, x1, 2720
 	ldr	w3, [x2, 80]
-	cbz	w3, .L686
+	cbz	w3, .L694
 	ldr	w0, [x1, 2584]
 	ldr	w3, [x2, 84]
 	cmp	w3, w0
-	bcs	.L687
+	bcs	.L695
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x1
 	mov	w20, 2048
 	str	x21, [sp, 32]
-.L692:
+.L700:
 	ldr	w1, [x19, 2584]
 	ldr	w0, [x19, 2804]
 	cmp	w0, w1
-	bcs	.L689
+	bcs	.L697
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
@@ -4787,7 +4840,7 @@ FtlReadRefresh:
 	add	w0, w0, 1
 	str	w0, [x19, 2804]
 	cmn	w1, #1
-	beq	.L690
+	beq	.L698
 	str	w0, [x29, 88]
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
@@ -4802,57 +4855,57 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L689
+	bne	.L697
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L689:
+.L697:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	ret
-.L690:
+.L698:
 	subs	w20, w20, #1
-	bne	.L692
-	b	.L689
-.L687:
+	bne	.L700
+	b	.L697
+.L695:
 	ldr	w0, [x1, 2588]
 	stp	w0, wzr, [x2, 76]
 	str	wzr, [x2, 84]
-.L696:
+.L704:
 	mov	w0, 0
 	ret
-.L686:
+.L694:
 	ldr	w3, [x1, 2588]
 	ldr	w5, [x2, 76]
 	add	w2, w3, 1048576
 	cmp	w5, w2
-	bhi	.L695
+	bhi	.L703
 	ldr	w2, [x1, 2644]
 	lsr	w4, w2, 10
 	mov	w2, 33554432
 	asr	w2, w2, w4
 	add	w2, w2, w5
 	cmp	w3, w2
-	bhi	.L695
+	bhi	.L703
 	ldrb	w1, [x1, 2340]
-	cbnz	w1, .L696
-.L695:
+	cbnz	w1, .L704
+.L703:
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 1
 	str	w3, [x0, 2796]
 	str	w1, [x0, 2800]
 	str	wzr, [x0, 2804]
-	b	.L696
+	b	.L704
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L710
+	cbz	w1, .L718
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR0
 	add	x2, x1, :lo12:.LANCHOR0
@@ -4873,11 +4926,11 @@ FtlMapBlkWriteDump_data:
 	str	wzr, [x19, 56]
 	ldr	w4, [x5, x4]
 	str	w4, [x0, 4]
-	cbz	w4, .L704
+	cbz	w4, .L712
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L705:
+.L713:
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	x0, x19
 	ldr	x2, [x1, 3408]
@@ -4887,13 +4940,13 @@ FtlMapBlkWriteDump_data:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L704:
+.L712:
 	ldrh	w2, [x2, 114]
 	mov	w1, 255
 	mov	x0, x3
 	bl	ftl_memset
-	b	.L705
-.L710:
+	b	.L713
+.L718:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
@@ -4941,24 +4994,24 @@ FtlScanSysBlk:
 	add	x0, x19, 2656
 	bl	ftl_memset
 	ldrh	w24, [x19, 44]
-.L714:
+.L722:
 	ldrh	w0, [x19, 46]
 	cmp	w0, w24
-	bls	.L754
+	bls	.L762
 	ldrh	w9, [x19, 36]
 	mov	x5, 0
 	ldrh	w8, [x19, 116]
 	mov	w21, 0
 	add	x7, x19, 64
 	mov	w6, 4
-	b	.L755
-.L716:
+	b	.L763
+.L724:
 	ldrb	w0, [x7, x5]
 	mov	w1, w24
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L715
+	cbnz	w0, .L723
 	ldr	x0, [x19, 4016]
 	ubfiz	x2, x21, 5, 16
 	lsl	w4, w4, 10
@@ -4975,17 +5028,17 @@ FtlScanSysBlk:
 	sdiv	w0, w0, w6
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L715:
+.L723:
 	add	x5, x5, 1
-.L755:
+.L763:
 	cmp	w9, w5, uxth
-	bhi	.L716
-	cbnz	w21, .L717
-.L753:
+	bhi	.L724
+	cbnz	w21, .L725
+.L761:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L714
-.L717:
+	b	.L722
+.L725:
 	ldr	x0, [x19, 4016]
 	mov	w1, w21
 	mov	w2, 1
@@ -4993,7 +5046,7 @@ FtlScanSysBlk:
 	mov	x23, 0
 	add	x28, x19, 2656
 	bl	FlashReadPages
-.L752:
+.L760:
 	ldr	x0, [x19, 4016]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
@@ -5001,10 +5054,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x26, 10, 16
-	bne	.L720
+	bne	.L728
 	mov	w3, 16
 	mov	w4, 65535
-.L722:
+.L730:
 	ldr	x0, [x19, 4016]
 	mov	w2, 1
 	stp	w4, w3, [x29, 104]
@@ -5020,72 +5073,72 @@ FtlScanSysBlk:
 	ldrh	w0, [x27]
 	cmp	w0, w4
 	ldr	x0, [x19, 4016]
-	bne	.L719
+	bne	.L727
 	mov	w1, -1
 	str	w1, [x0, x23]
 	ldr	x0, [x19, 4016]
 	ldr	w0, [x0, x23]
 	cmp	w0, w1
-	bne	.L720
-.L721:
+	bne	.L728
+.L729:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L725
-.L719:
+	b	.L733
+.L727:
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	bne	.L720
+	bne	.L728
 	sub	w3, w3, #1
 	ands	w3, w3, 65535
-	bne	.L722
-	b	.L721
-.L720:
+	bne	.L730
+	b	.L729
+.L728:
 	ldr	w1, [x19, 2620]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L723
+	beq	.L731
 	cmp	w1, w0
-	bhi	.L724
-.L723:
+	bhi	.L732
+.L731:
 	cmn	w0, #1
-	beq	.L724
+	beq	.L732
 	add	w1, w0, 1
 	str	w1, [x19, 2620]
-.L724:
+.L732:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L726
-	bhi	.L727
+	beq	.L734
+	bhi	.L735
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L728
-.L725:
+	beq	.L736
+.L733:
 	add	x23, x23, 32
 	cmp	x21, x23
-	bne	.L752
-	b	.L753
-.L727:
+	bne	.L760
+	b	.L761
+.L735:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L729
+	beq	.L737
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L721
-	b	.L725
-.L729:
+	beq	.L729
+	b	.L733
+.L737:
 	add	x0, x20, :lo12:.LANCHOR3
 	ldrh	w1, [x0, -128]
 	ldr	w0, [x19, 132]
 	cmp	w1, w0
-	bls	.L731
+	bls	.L739
 	adrp	x0, .LC1
 	mov	w2, 1211
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L731:
+	bl	sftl_printk
+.L739:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldr	w3, [x19, 132]
 	and	w2, w3, 65535
@@ -5096,45 +5149,45 @@ FtlScanSysBlk:
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	sxth	w2, w2
-.L732:
+.L740:
 	cmp	w0, w2
-	bgt	.L738
-	tbz	w0, #31, .L772
-	b	.L725
-.L738:
+	bgt	.L746
+	tbz	w0, #31, .L780
+	b	.L733
+.L746:
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L733
+	bls	.L741
 	ldr	w2, [x4]
-	cbnz	w2, .L734
+	cbnz	w2, .L742
 	cmp	w3, w1
-	beq	.L734
+	beq	.L742
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
 	strh	w1, [x2, -128]
-.L734:
+.L742:
 	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L735:
+.L743:
 	cmp	w1, w0
-	bne	.L736
+	bne	.L744
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w3, [x27, 4]
 	ldr	x2, [x1, -216]
 	str	w3, [x2, x6]
 	ldr	x2, [x19, 4088]
 	strh	w26, [x2, x5, lsl 1]
-	tbnz	w0, #31, .L725
+	tbnz	w0, #31, .L733
 	ldrh	w1, [x1, -128]
 	ldr	w2, [x19, 132]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L725
-.L772:
+	bgt	.L733
+.L780:
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
 	ldr	w3, [x27, 4]
@@ -5142,10 +5195,10 @@ FtlScanSysBlk:
 	ldr	x1, [x2, -216]
 	str	w3, [x1, x0, lsl 2]
 	ldr	x1, [x19, 4088]
-.L790:
+.L798:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L725
-.L736:
+	b	.L733
+.L744:
 	ldr	x4, [x7, -216]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
@@ -5159,22 +5212,22 @@ FtlScanSysBlk:
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L735
-.L733:
+	b	.L743
+.L741:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L732
-.L728:
+	b	.L740
+.L736:
 	ldrh	w1, [x19, 148]
 	ldrh	w0, [x19, 124]
 	cmp	w1, w0
-	bls	.L741
+	bls	.L749
 	adrp	x0, .LC1
 	mov	w2, 1252
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L741:
+	bl	sftl_printk
+.L749:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldrh	w3, [x19, 124]
 	ldrh	w1, [x19, 148]
@@ -5182,41 +5235,41 @@ FtlScanSysBlk:
 	ldr	x4, [x4, -240]
 	sxth	x0, w2
 	sub	w2, w2, w1
-.L742:
+.L750:
 	cmp	w0, w2
-	ble	.L747
+	ble	.L755
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L743
+	bls	.L751
 	ldr	w2, [x4]
-	cbnz	w2, .L744
+	cbnz	w2, .L752
 	cmp	w3, w1
-	beq	.L744
+	beq	.L752
 	add	w1, w1, 1
 	strh	w1, [x19, 148]
-.L744:
+.L752:
 	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L745:
+.L753:
 	cmp	w1, w0
-	bne	.L746
+	bne	.L754
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w2, [x27, 4]
 	ldr	x1, [x1, -240]
 	str	w2, [x1, x6]
 	ldr	x1, [x19, 152]
 	strh	w26, [x1, x5, lsl 1]
-.L747:
-	tbnz	w0, #31, .L725
+.L755:
+	tbnz	w0, #31, .L733
 	ldrh	w1, [x19, 124]
 	ldrh	w2, [x19, 148]
 	sub	w1, w1, #1
 	sub	w1, w1, w2
 	cmp	w0, w1, sxth
-	bgt	.L725
+	bgt	.L733
 	add	x1, x20, :lo12:.LANCHOR3
 	add	w2, w2, 1
 	strh	w2, [x19, 148]
@@ -5224,8 +5277,8 @@ FtlScanSysBlk:
 	ldr	x1, [x1, -240]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x19, 152]
-	b	.L790
-.L746:
+	b	.L798
+.L754:
 	ldr	x4, [x7, -240]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
@@ -5239,63 +5292,63 @@ FtlScanSysBlk:
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L745
-.L743:
+	b	.L753
+.L751:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L742
-.L726:
+	b	.L750
+.L734:
 	ldrh	w2, [x28]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L749
+	bne	.L757
 	strh	w26, [x28]
-.L791:
+.L799:
 	str	w0, [x28, 8]
-	b	.L725
-.L749:
+	b	.L733
+.L757:
 	ldrh	w0, [x28, 4]
 	cmp	w0, w1
-	beq	.L750
+	beq	.L758
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L750:
+.L758:
 	ldr	w0, [x27, 4]
 	ldr	w1, [x28, 8]
 	cmp	w1, w0
-	bcs	.L751
+	bcs	.L759
 	ldrh	w0, [x28]
 	strh	w0, [x28, 4]
 	strh	w26, [x28]
 	ldr	w0, [x27, 4]
-	b	.L791
-.L751:
+	b	.L799
+.L759:
 	strh	w26, [x28, 4]
-	b	.L725
-.L754:
+	b	.L733
+.L762:
 	ldr	x1, [x19, 4088]
 	ldrh	w0, [x1]
-	cbz	w0, .L756
-.L759:
+	cbz	w0, .L764
+.L767:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x1, [x0, 152]
 	ldrh	w2, [x1]
-	cbz	w2, .L757
-.L758:
+	cbz	w2, .L765
+.L766:
 	add	x20, x20, :lo12:.LANCHOR3
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w1, [x20, -128]
 	ldr	w0, [x22, 132]
 	cmp	w1, w0
-	bls	.L788
+	bls	.L796
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1377
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L788:
+	bl	sftl_printk
+.L796:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5304,24 +5357,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L756:
+.L764:
 	add	x0, x20, :lo12:.LANCHOR3
 	ldrh	w0, [x0, -128]
-	cbz	w0, .L759
+	cbz	w0, .L767
 	ldr	w2, [x19, 132]
 	mov	w0, 0
-.L760:
+.L768:
 	cmp	w0, w2
-	bcs	.L759
+	bcs	.L767
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L761
+	cbz	w3, .L769
 	mov	w1, w0
 	add	x3, x22, :lo12:.LANCHOR0
 	add	x7, x20, :lo12:.LANCHOR3
-.L762:
+.L770:
 	ldr	w2, [x3, 132]
 	cmp	w1, w2
-	bcs	.L759
+	bcs	.L767
 	ldr	x5, [x3, 4088]
 	sxtw	x6, w1
 	lsl	x4, x6, 1
@@ -5336,28 +5389,28 @@ FtlScanSysBlk:
 	str	w6, [x5, x2, lsl 2]
 	ldr	x2, [x3, 4088]
 	strh	wzr, [x2, x4]
-	b	.L762
-.L761:
+	b	.L770
+.L769:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L760
-.L757:
+	b	.L768
+.L765:
 	ldrh	w2, [x0, 148]
-	cbz	w2, .L758
+	cbz	w2, .L766
 	ldrh	w2, [x0, 124]
 	mov	w0, 0
-.L767:
+.L775:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L758
+	bge	.L766
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L768
+	cbz	w3, .L776
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x7, x20, :lo12:.LANCHOR3
-.L769:
+.L777:
 	ldrh	w1, [x2, 124]
 	cmp	w0, w1
-	bge	.L758
+	bge	.L766
 	ldr	x4, [x2, 152]
 	sxtw	x5, w0
 	lsl	x3, x5, 1
@@ -5372,11 +5425,11 @@ FtlScanSysBlk:
 	str	w5, [x4, x1, lsl 2]
 	ldr	x1, [x2, 152]
 	strh	wzr, [x1, x3]
-	b	.L769
-.L768:
+	b	.L777
+.L776:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L767
+	b	.L775
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	2
 	.global	FtlMapTblRecovery
@@ -5417,14 +5470,14 @@ FtlMapTblRecovery:
 	ldr	w0, [x29, 116]
 	sub	w0, w0, #1
 	str	w0, [x29, 112]
-.L793:
+.L801:
 	ldr	w0, [x29, 116]
 	cmp	w27, w0
-	bge	.L810
+	bge	.L818
 	ldr	w0, [x29, 112]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L794
+	bne	.L802
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x20, x23, x0
@@ -5440,20 +5493,20 @@ FtlMapTblRecovery:
 	ldr	w0, [x26, x28, lsl 2]
 	add	w26, w1, 1
 	str	w0, [x19, 48]
-.L795:
+.L803:
 	cmp	w23, w26
-	blt	.L797
-.L810:
+	blt	.L805
+.L818:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bne	.L799
+	bne	.L807
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L799:
+.L807:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -5466,7 +5519,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L797:
+.L805:
 	ldrh	w0, [x20]
 	mov	w2, 1
 	mov	w1, w2
@@ -5476,23 +5529,23 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L796
+	beq	.L804
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L796
+	bls	.L804
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L796
+	bne	.L804
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x25, 4]
 	str	w1, [x2, x0]
-.L796:
+.L804:
 	add	w23, w23, 1
 	sxth	w23, w23
-	b	.L795
-.L794:
+	b	.L803
+.L802:
 	ldr	x0, [x25, 3432]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -5508,21 +5561,21 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L812
+	beq	.L820
 	ldrh	w1, [x22]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L812
+	bne	.L820
 	ldrh	w1, [x22, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L801
-.L812:
+	beq	.L809
+.L820:
 	mov	w5, 0
-.L802:
+.L810:
 	ldrh	w0, [x25, 108]
 	cmp	w5, w0
-	bge	.L808
+	bge	.L816
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -5534,48 +5587,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L806
+	beq	.L814
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L806
+	bls	.L814
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L806
+	bne	.L814
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x2, x0]
-.L806:
+.L814:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L802
-.L801:
+	b	.L810
+.L809:
 	mov	w0, 0
-.L803:
+.L811:
 	ldrh	w1, [x25, 108]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L805
-.L808:
+	blt	.L813
+.L816:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L793
-.L805:
+	b	.L801
+.L813:
 	ldr	x2, [x25, 3432]
 	sbfiz	x5, x0, 3, 32
 	ldrh	w1, [x2, x5]
 	cmp	w24, w1
-	bls	.L804
+	bls	.L812
 	add	x2, x2, x5
 	ldr	x3, [x29, 120]
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x2, 4]
 	str	w2, [x3, x1]
-.L804:
+.L812:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L803
+	b	.L811
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
@@ -5635,10 +5688,10 @@ FtlL2PDataInit:
 	mov	x1, x20
 	mov	w0, 0
 	mov	w5, -1
-.L823:
+.L831:
 	ldrh	w2, [x1, 142]
 	cmp	w2, w0
-	bhi	.L824
+	bhi	.L832
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w2, -1
 	strh	w2, [x0, -190]
@@ -5663,7 +5716,7 @@ FtlL2PDataInit:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L824:
+.L832:
 	ldr	x3, [x1, 2568]
 	ubfiz	x2, x0, 4, 16
 	add	x3, x3, x2
@@ -5681,7 +5734,7 @@ FtlL2PDataInit:
 	and	x2, x2, -4
 	add	x2, x4, x2
 	str	x2, [x3, 8]
-	b	.L823
+	b	.L831
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
 	.global	FtlLoadMapInfo
@@ -5772,80 +5825,80 @@ SupperBlkListInit:
 	str	xzr, [x19, 2368]
 	str	xzr, [x19, 2392]
 	str	xzr, [x19, 2408]
-.L831:
+.L839:
 	ldrh	w0, [x19, 44]
 	cmp	w20, w0
-	bcs	.L837
+	bcs	.L845
 	ldrh	w8, [x19, 36]
 	mov	x6, 0
 	ldrh	w7, [x19, 106]
 	mov	w5, 0
-	b	.L838
-.L833:
+	b	.L846
+.L841:
 	ldrb	w0, [x23, x6]
 	mov	w1, w20
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L832
+	cbnz	w0, .L840
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L832:
+.L840:
 	add	x6, x6, 1
-.L838:
+.L846:
 	cmp	w8, w6, uxth
-	bhi	.L833
-	cbz	w5, .L840
+	bhi	.L841
+	cbz	w5, .L848
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L834:
+.L842:
 	ldr	x1, [x19, 2360]
 	mov	w0, 6
 	umaddl	x0, w20, w0, x1
 	strh	w5, [x0, 4]
 	ldrh	w0, [x19, 2424]
 	cmp	w0, w20
-	beq	.L835
+	beq	.L843
 	ldrh	w0, [x19, 2472]
 	cmp	w0, w20
-	beq	.L835
+	beq	.L843
 	ldrh	w0, [x19, 2520]
 	cmp	w0, w20
-	beq	.L835
+	beq	.L843
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L836
+	cbnz	w0, .L844
 	add	w22, w22, 1
 	mov	w0, w20
 	and	w22, w22, 65535
 	bl	INSERT_FREE_LIST
-.L835:
+.L843:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L831
-.L840:
+	b	.L839
+.L848:
 	mov	w5, 0
-	b	.L834
-.L836:
+	b	.L842
+.L844:
 	add	w21, w21, 1
 	mov	w0, w20
 	and	w21, w21, 65535
 	bl	INSERT_DATA_LIST
-	b	.L835
-.L837:
+	b	.L843
+.L845:
 	strh	w21, [x19, 2400]
 	add	w21, w21, w22
 	strh	w22, [x19, 2416]
 	cmp	w21, w0
-	ble	.L839
+	ble	.L847
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2154
 	add	x1, x1, 384
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L839:
+	bl	sftl_printk
+.L847:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -5858,8 +5911,8 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR0
@@ -5873,55 +5926,55 @@ ftl_check_vpc:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	adrp	x22, check_vpc_table
-	bl	printk
+	bl	sftl_printk
 	add	x19, x22, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L843:
+.L851:
 	ldr	w0, [x24, 2584]
 	cmp	w23, w0
-	bcc	.L845
-	adrp	x25, .LC92
+	bcc	.L853
+	adrp	x25, .LC96
 	add	x23, x20, :lo12:.LANCHOR0
 	add	x26, x22, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC92
+	add	x25, x25, :lo12:.LC96
 	mov	w24, 0
 	mov	w19, 0
 	mov	w4, 65535
-.L846:
+.L854:
 	ldrh	w0, [x23, 44]
 	cmp	w0, w19
-	bhi	.L848
+	bhi	.L856
 	ldr	x19, [x23, 2408]
-	cbz	x19, .L849
+	cbz	x19, .L857
 	ldr	x0, [x23, 2360]
-	adrp	x25, .LC93
+	adrp	x25, .LC97
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:check_vpc_table
 	sub	x19, x19, x0
 	mov	x0, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x0, 0xaaab, lsl 0
-	add	x25, x25, :lo12:.LC93
+	add	x25, x25, :lo12:.LC97
 	ldrh	w26, [x23, 2416]
 	mov	w27, 6
 	mov	w23, 0
 	mul	x19, x19, x0
 	and	w19, w19, 65535
-.L850:
+.L858:
 	cmp	w23, w26
-	bne	.L852
-.L849:
-	cbz	w24, .L842
+	bne	.L860
+.L857:
+	cbz	w24, .L850
 	add	x1, x21, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2321
 	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L842:
+	bl	sftl_printk
+.L850:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -5929,67 +5982,67 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L845:
+.L853:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w23
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L844
+	beq	.L852
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L844:
+.L852:
 	add	w23, w23, 1
-	b	.L843
-.L848:
+	b	.L851
+.L856:
 	ldr	x0, [x23, 2376]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L847
+	beq	.L855
+	mov	x0, x25
 	str	w4, [x29, 108]
 	mov	w1, w19
-	mov	x0, x25
-	bl	printk
+	bl	sftl_printk
 	ldr	x0, [x23, 2376]
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L847
+	beq	.L855
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w24, w24, wzr, ls
-.L847:
+.L855:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L846
-.L852:
+	b	.L854
+.L860:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L851
+	cbz	w2, .L859
 	ldrh	w3, [x22, w19, sxtw 1]
 	mov	w24, 1
 	mov	w1, w19
 	mov	x0, x25
-	bl	printk
-.L851:
+	bl	sftl_printk
+.L859:
 	ldr	x0, [x20, 2360]
 	umull	x19, w19, w27
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L849
+	beq	.L857
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L850
+	b	.L858
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
 	.global	FtlGcPageVarInit
@@ -6035,29 +6088,29 @@ FtlGcScanTempBlk:
 	ldrh	w19, [x0, 4]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L886
-	cbnz	w19, .L870
-.L871:
+	beq	.L894
+	cbnz	w19, .L878
+.L879:
 	bl	FtlGcPageVarInit
-	b	.L872
-.L886:
+	b	.L880
+.L894:
 	mov	w19, 0
-.L870:
+.L878:
 	adrp	x0, .LANCHOR0+106
 	ldrh	w0, [x0, #:lo12:.LANCHOR0+106]
 	cmp	w0, w25
-	beq	.L871
-.L872:
+	beq	.L879
+.L880:
 	adrp	x26, .LANCHOR0
 	add	x22, x26, :lo12:.LANCHOR0
 	mov	w24, 0
-.L880:
+.L888:
 	ldrh	w1, [x21]
 	mov	w0, 65535
 	strb	wzr, [x21, 8]
 	cmp	w1, w0
-	beq	.L887
-.L883:
+	beq	.L895
+.L891:
 	add	x0, x26, :lo12:.LANCHOR0
 	add	x2, x21, 16
 	mov	w20, 0
@@ -6068,9 +6121,9 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x0, 36]
 	add	x0, x0, 8
 	add	x0, x21, x0, lsl 1
-.L874:
+.L882:
 	cmp	x0, x2
-	bne	.L876
+	bne	.L884
 	ldr	x0, [x22, 4016]
 	mov	w1, w20
 	mov	w2, 0
@@ -6078,25 +6131,25 @@ FtlGcScanTempBlk:
 	bl	FlashReadPages
 	mov	x10, 0
 	mov	w11, 65535
-.L877:
+.L885:
 	cmp	x10, x20
-	bne	.L881
+	bne	.L889
 	add	w19, w19, 1
 	add	w24, w24, 1
 	and	w19, w19, 65535
 	cmp	w25, w24
-	bls	.L882
-.L884:
+	bls	.L890
+.L892:
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bhi	.L883
-.L887:
+	bhi	.L891
+.L895:
 	mov	w2, 0
-	b	.L873
-.L876:
+	b	.L881
+.L884:
 	ldrh	w1, [x2]
 	cmp	w1, w9
-	beq	.L875
+	beq	.L883
 	ldr	x4, [x22, 4016]
 	ubfiz	x6, x20, 5, 16
 	orr	w1, w19, w1, lsl 10
@@ -6116,10 +6169,10 @@ FtlGcScanTempBlk:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 16]
-.L875:
+.L883:
 	add	x2, x2, 2
-	b	.L874
-.L881:
+	b	.L882
+.L889:
 	ldr	x6, [x22, 4016]
 	add	x5, x6, x10
 	ldr	w4, [x5, 4]
@@ -6127,16 +6180,16 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x10]
-	cbnz	w0, .L878
+	cbnz	w0, .L886
 	ldr	x0, [x5, 16]
 	add	x10, x10, 32
 	ldrh	w1, [x0]
 	cmp	w1, w11
-	bne	.L879
+	bne	.L887
 	adrp	x0, .LANCHOR3-40
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR3-40]
-.L873:
+.L881:
 	add	x23, x23, :lo12:.LANCHOR2
 	strh	w19, [x21, 2]
 	strb	w2, [x21, 6]
@@ -6145,13 +6198,13 @@ FtlGcScanTempBlk:
 	strh	w0, [x23, 4]
 	mov	x0, x21
 	bl	ftl_sb_update_avl_pages
-	b	.L885
-.L879:
+	b	.L893
+.L887:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L877
-.L878:
+	b	.L885
+.L886:
 	ldr	x0, [x22, 2376]
 	mov	w19, 0
 	ldrh	w1, [x21]
@@ -6161,19 +6214,19 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x21]
 	bl	FtlGcPageVarInit
-	b	.L880
-.L882:
+	b	.L888
+.L890:
 	add	x1, x23, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x1, 4]
 	cmp	w0, w2
-	beq	.L884
+	beq	.L892
 	add	w0, w0, w24
 	strh	w0, [x1, 4]
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bls	.L884
-.L885:
+	bls	.L892
+.L893:
 	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6191,7 +6244,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L895
+	bls	.L903
 	add	x0, x29, 64
 	mov	w2, 32
 	mov	w1, 165
@@ -6221,14 +6274,14 @@ FlashTestBlk:
 	add	x0, x29, 32
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L893:
+.L901:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L895:
+.L903:
 	mov	w19, 0
-	b	.L893
+	b	.L901
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	2
 	.global	FlashGetBadBlockList
@@ -6251,32 +6304,32 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L898
+	bls	.L906
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x20
 	bl	ftl_memset
 	mov	w0, 0
-.L898:
+.L906:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 14]
 	cmp	w1, 4
-	bne	.L902
+	bne	.L910
 	mov	x1, 0
-.L900:
+.L908:
 	cmp	w0, w1, uxth
-	bhi	.L901
-.L902:
+	bhi	.L909
+.L910:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L901:
+.L909:
 	ldrh	w2, [x20, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x20, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L900
+	b	.L908
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
 	.global	ftl_memcpy
@@ -6312,22 +6365,22 @@ FtlBbmTblFlush:
 	ldrh	w2, [x19, 114]
 	str	x0, [x19, 3408]
 	bl	ftl_memset
-.L907:
+.L915:
 	ldrh	w0, [x19, 58]
 	add	x20, x19, 3400
 	cmp	w21, w0
-	blt	.L908
+	blt	.L916
 	ldr	x24, [x20, 16]
 	mov	w1, 255
 	mov	w2, 16
-	adrp	x22, .LC94
+	adrp	x22, .LC98
 	mov	x0, x24
 	bl	ftl_memset
 	mov	w0, -3887
 	add	x1, x19, 160
 	strh	w0, [x24]
 	add	x25, x25, :lo12:.LANCHOR0
-	add	x22, x22, :lo12:.LC94
+	add	x22, x22, :lo12:.LC98
 	mov	w21, 0
 	ldr	w0, [x19, 168]
 	mov	w23, 0
@@ -6341,7 +6394,7 @@ FtlBbmTblFlush:
 	ldr	w0, [x19, 32]
 	mov	x19, x1
 	strh	w0, [x24, 12]
-.L909:
+.L917:
 	ldr	x0, [x25, 3432]
 	str	x0, [x20, 8]
 	ldr	x0, [x25, 3440]
@@ -6354,7 +6407,7 @@ FtlBbmTblFlush:
 	str	wzr, [x20]
 	str	w0, [x20, 4]
 	mov	x0, x22
-	bl	printk
+	bl	sftl_printk
 	mov	w3, 1
 	mov	x0, x20
 	mov	w1, w3
@@ -6364,7 +6417,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L910
+	blt	.L918
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19]
@@ -6388,29 +6441,29 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L910:
+.L918:
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L911
+	bne	.L919
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC95
+	adrp	x0, .LC99
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC95
-	bl	printk
+	add	x0, x0, :lo12:.LC99
+	bl	sftl_printk
 	cmp	w21, 3
-	bls	.L909
+	bls	.L917
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC96
+	adrp	x0, .LC100
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC96
-	bl	printk
-.L913:
-	b	.L913
-.L908:
+	add	x0, x0, :lo12:.LC100
+	bl	sftl_printk
+.L921:
+	b	.L921
+.L916:
 	ldrh	w2, [x22, -200]
 	ldr	x1, [x23], 8
 	ldr	x0, [x20, 8]
@@ -6419,12 +6472,12 @@ FtlBbmTblFlush:
 	add	w21, w21, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L907
-.L914:
+	b	.L915
+.L922:
 	mov	w23, 1
-	b	.L909
-.L911:
-	cbz	w23, .L914
+	b	.L917
+.L919:
+	cbz	w23, .L922
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6449,23 +6502,23 @@ allocate_data_superblock:
 	add	x23, x22, 2520
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L917:
+.L925:
 	ldrh	w1, [x22, 2400]
 	ldrh	w0, [x22, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x22, 44]
 	cmp	w0, w1
-	ble	.L918
+	ble	.L926
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2585
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L918:
+	bl	sftl_printk
+.L926:
 	cmp	x20, x23
-	bne	.L943
+	bne	.L951
 	ldrh	w0, [x19, 2416]
 	ldr	w1, [x19, 3244]
 	mul	w1, w0, w1
@@ -6473,23 +6526,23 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L919
+	beq	.L927
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L919:
+.L927:
 	add	x0, x19, 2408
 	bl	List_pop_index_node
 	and	w24, w0, 65535
 	ldrh	w0, [x19, 2416]
-	cbnz	w0, .L920
+	cbnz	w0, .L928
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2594
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L920:
+	bl	sftl_printk
+.L928:
 	ldrh	w0, [x19, 2416]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2416]
@@ -6497,7 +6550,7 @@ allocate_data_superblock:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L921
+	cbnz	w0, .L929
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x24, 1, 16
 	mov	w2, -1
@@ -6509,72 +6562,72 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L917
+	ble	.L925
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2605
 	add	x1, x1, 424
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-	b	.L917
-.L943:
+	bl	sftl_printk
+	b	.L925
+.L951:
 	mov	w1, 0
-	b	.L919
-.L921:
+	b	.L927
+.L929:
 	ldrh	w1, [x19, 2400]
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L923
+	ble	.L931
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2608
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L923:
+	bl	sftl_printk
+.L931:
 	add	x27, x20, 16
 	ldrh	w4, [x19, 36]
 	mov	x3, x27
 	mov	x0, 0
 	mov	w25, 0
 	mov	w5, 65535
-.L924:
+.L932:
 	cmp	w4, w0, uxth
-	bhi	.L926
-	cbnz	w25, .L927
+	bhi	.L934
+	cbnz	w25, .L935
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2619
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L927:
+	bl	sftl_printk
+.L935:
 	ldrh	w0, [x19, 2672]
 	cmp	w0, w24
-	bne	.L928
+	bne	.L936
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2621
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L928:
+	bl	sftl_printk
+.L936:
 	ldrb	w0, [x20, 8]
 	uxtw	x26, w24
-	cbnz	w0, .L929
+	cbnz	w0, .L937
 	ldr	x2, [x19, 2384]
 	lsl	x1, x26, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L930
+	cbz	w0, .L938
 	ldrh	w3, [x19, 96]
 	add	w0, w0, w3
-.L951:
+.L959:
 	strh	w0, [x2, x1]
 	mov	w1, 0
 	ldr	w0, [x19, 2628]
@@ -6582,15 +6635,15 @@ allocate_data_superblock:
 	str	w0, [x19, 2628]
 	mov	w0, w24
 	bl	ftl_set_blk_mode
-.L932:
+.L940:
 	ldr	x0, [x19, 2384]
 	lsl	x26, x26, 1
 	ldr	w1, [x19, 2644]
 	ldrh	w0, [x0, x26]
 	cmp	w0, w1
-	bls	.L933
+	bls	.L941
 	str	w0, [x19, 2644]
-.L933:
+.L941:
 	ldr	w1, [x19, 2632]
 	ubfiz	x3, x25, 5, 16
 	ldrh	w0, [x19, 96]
@@ -6604,53 +6657,53 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	x0, 0
-.L934:
+.L942:
 	cmp	x3, x0
-	bne	.L935
+	bne	.L943
 	ldrb	w1, [x20, 8]
 	mov	w2, w25
 	ldr	x0, [x19, 3960]
 	mov	x28, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L936:
+.L944:
 	cmp	w25, w28, uxth
-	bhi	.L938
+	bhi	.L946
 	cmp	w1, 0
-	ble	.L939
+	ble	.L947
 	mov	w0, w24
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L939:
+.L947:
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L940
+	cbnz	w0, .L948
 	ldr	x0, [x19, 2376]
 	mov	w1, -1
 	strh	w1, [x0, x26]
 	mov	w0, w24
 	bl	INSERT_DATA_LIST
-	b	.L917
-.L926:
+	b	.L925
+.L934:
 	ldr	x1, [x19, 3960]
 	add	x2, x1, x0, lsl 5
 	stp	xzr, xzr, [x2, 8]
 	ldrh	w2, [x3]
 	cmp	w2, w5
-	beq	.L925
+	beq	.L933
 	ubfiz	x6, x25, 5, 16
 	add	w25, w25, 1
 	add	x1, x1, x6
 	and	w25, w25, 65535
 	lsl	w2, w2, 10
 	str	w2, [x1, 4]
-.L925:
+.L933:
 	add	x0, x0, 1
 	add	x3, x3, 2
-	b	.L924
-.L930:
+	b	.L932
+.L938:
 	mov	w0, 2
-	b	.L951
-.L929:
+	b	.L959
+.L937:
 	ldr	x2, [x19, 2384]
 	lsl	x0, x26, 1
 	ldrh	w1, [x2, x0]
@@ -6661,22 +6714,22 @@ allocate_data_superblock:
 	str	w0, [x19, 2632]
 	mov	w0, w24
 	bl	ftl_set_blk_mode.part.7
-	b	.L932
-.L935:
+	b	.L940
+.L943:
 	ldr	x1, [x19, 3960]
 	add	x1, x1, x0
 	add	x0, x0, 32
 	ldr	w2, [x1, 4]
 	and	w2, w2, -1024
 	str	w2, [x1, 4]
-	b	.L934
-.L938:
+	b	.L942
+.L946:
 	ldr	x2, [x19, 3960]
 	lsl	x0, x28, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L937
+	bne	.L945
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 104]
@@ -6687,11 +6740,11 @@ allocate_data_superblock:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-.L937:
+.L945:
 	add	x28, x28, 1
 	add	x27, x27, 2
-	b	.L936
-.L940:
+	b	.L944
+.L948:
 	add	x21, x21, :lo12:.LANCHOR0
 	strh	wzr, [x20, 2]
 	strb	wzr, [x20, 6]
@@ -6708,18 +6761,18 @@ allocate_data_superblock:
 	ldrh	w2, [x20]
 	strh	w0, [x1, x2, lsl 1]
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L941
+	cbz	w0, .L949
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L942
-.L941:
+	cbnz	w0, .L950
+.L949:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2674
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L942:
+	bl	sftl_printk
+.L950:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6744,16 +6797,16 @@ FtlGcFreeBadSuperBlk:
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x19, 3324]
 	str	x27, [sp, 80]
-	cbz	w0, .L953
+	cbz	w0, .L961
 	add	x23, x19, 64
 	add	x24, x19, 3328
 	mov	w21, 0
-.L954:
+.L962:
 	ldrh	w0, [x19, 36]
 	cmp	w0, w21
-	bhi	.L960
+	bhi	.L968
 	bl	FtlGcReFreshBadBlk
-.L953:
+.L961:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6762,50 +6815,50 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L960:
+.L968:
 	ldrb	w0, [x23, w21, sxtw]
 	mov	w1, w22
-	adrp	x26, .LC97
-	add	x26, x26, :lo12:.LC97
+	adrp	x26, .LC101
+	add	x26, x26, :lo12:.LC101
 	mov	w20, 0
 	bl	V2P_block
 	and	w25, w0, 65535
-.L955:
+.L963:
 	ldrh	w0, [x19, 3324]
 	cmp	w0, w20
-	bhi	.L959
+	bhi	.L967
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L954
-.L959:
+	b	.L962
+.L967:
 	ldrh	w0, [x24, w20, sxtw 1]
 	add	w27, w20, 1
 	cmp	w0, w25
-	bne	.L956
+	bne	.L964
 	mov	w1, w25
 	mov	x0, x26
-	bl	printk
+	bl	sftl_printk
 	mov	w0, w25
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	ldrh	w0, [x19, 3324]
 	mov	w1, w27
-.L957:
+.L965:
 	cmp	w20, w0
-	bcc	.L958
+	bcc	.L966
 	sub	w0, w0, #1
 	strh	w0, [x19, 3324]
-.L956:
+.L964:
 	and	w20, w27, 65535
-	b	.L955
-.L958:
+	b	.L963
+.L966:
 	sub	w2, w1, #1
 	ldrh	w3, [x24, w1, sxtw 1]
 	add	w20, w20, 1
 	add	w1, w1, 1
 	and	w20, w20, 65535
 	strh	w3, [x24, w2, sxtw 1]
-	b	.L957
+	b	.L965
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -6821,27 +6874,27 @@ update_vpc_list:
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, 2376]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L966
+	cbnz	w1, .L974
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w19
-	bne	.L967
+	bne	.L975
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L968:
+.L976:
 	add	x21, x20, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x21, 2368
 	bl	List_remove_node
 	ldrh	w0, [x21, 2400]
-	cbnz	w0, .L970
+	cbnz	w0, .L978
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2744
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L970:
+	bl	sftl_printk
+.L978:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20, 2400]
 	sub	w0, w0, #1
@@ -6851,42 +6904,42 @@ update_vpc_list:
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
 	ldrh	w1, [x20, 2400]
-	mov	w19, 1
 	ldrh	w0, [x20, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x20, 44]
 	cmp	w0, w1
-	ble	.L965
+	ble	.L982
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2747
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L965:
-	mov	w0, w19
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L967:
+	bl	sftl_printk
+.L982:
+	mov	w0, 1
+	b	.L973
+.L975:
 	ldrh	w1, [x0, 2424]
 	cmp	w1, w19
-	beq	.L973
+	beq	.L981
 	ldrh	w1, [x0, 2472]
 	cmp	w1, w19
-	beq	.L973
+	beq	.L981
 	ldrh	w0, [x0, 2520]
 	cmp	w0, w19
-	bne	.L968
+	bne	.L976
+.L981:
+	mov	w0, 0
 .L973:
-	mov	w19, 0
-	b	.L965
-.L966:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L974:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L973
+	b	.L981
 	.size	update_vpc_list, .-update_vpc_list
 	.align	2
 	.global	decrement_vpc_count
@@ -6899,53 +6952,53 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L977
+	beq	.L985
 	adrp	x20, .LANCHOR0
 	add	x20, x20, :lo12:.LANCHOR0
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, 2376]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L978
+	cbnz	w0, .L986
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
-	bl	printk
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
+	bl	sftl_printk
 	ldr	x0, [x20, 2376]
 	ldrh	w0, [x0, x21]
-	cbz	w0, .L979
-.L984:
+	cbz	w0, .L987
+.L992:
 	mov	w21, 0
-.L976:
+.L984:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L979:
+.L987:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2762
 	add	x1, x1, 472
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-	b	.L984
-.L978:
+	bl	sftl_printk
+	b	.L992
+.L986:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L977:
+.L985:
 	adrp	x20, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w1, 65535
 	ldrh	w0, [x20, -48]
 	cmp	w0, w1
-	bne	.L981
+	bne	.L989
 	strh	w19, [x20, -48]
-	b	.L984
-.L981:
+	b	.L992
+.L989:
 	cmp	w19, w0
-	beq	.L984
+	beq	.L992
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR0
@@ -6962,17 +7015,17 @@ decrement_vpc_count:
 	mul	x0, x0, x2
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L976
+	cbnz	w1, .L984
 	cmp	w19, w0, uxth
-	beq	.L976
+	beq	.L984
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2778
 	add	x1, x1, 472
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-	b	.L976
+	bl	sftl_printk
+	b	.L984
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	2
 	.global	FtlWriteDump_data
@@ -6987,16 +7040,16 @@ FtlWriteDump_data:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrh	w2, [x20, 2428]
-	cbz	w2, .L986
+	cbz	w2, .L994
 	ldrb	w1, [x20, 2432]
-	cbnz	w1, .L986
+	cbnz	w1, .L994
 	ldrb	w1, [x20, 2431]
 	ldrh	w3, [x20, 106]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L986
+	beq	.L994
 	ldrb	w0, [x20, 2434]
-	cbnz	w0, .L985
+	cbnz	w0, .L993
 	ldr	w22, [x20, 2584]
 	add	x1, x29, 92
 	ldrh	w24, [x20, 36]
@@ -7012,41 +7065,41 @@ FtlWriteDump_data:
 	stp	x1, x21, [x29, 104]
 	str	w22, [x29, 120]
 	str	wzr, [x21, 4]
-	beq	.L988
+	beq	.L996
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.L989:
+.L997:
 	add	x25, x19, :lo12:.LANCHOR0
 	lsl	w24, w24, 2
 	add	x20, x25, 2424
 	mov	w0, -3947
 	mov	w23, 0
 	strh	w0, [x21]
-.L990:
+.L998:
 	cmp	w24, w23
-	bne	.L994
-.L991:
+	bne	.L1002
+.L999:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	strb	w0, [x19, 2434]
-.L985:
+.L993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L988:
+.L996:
 	ldrh	w2, [x20, 114]
 	mov	w1, 255
 	ldr	x0, [x20, 3432]
 	bl	ftl_memset
-	b	.L989
-.L994:
+	b	.L997
+.L1002:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L991
+	cbz	w0, .L999
 	ldr	w0, [x29, 100]
 	add	w23, w23, 1
 	stp	w22, w0, [x21, 8]
@@ -7068,11 +7121,11 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-	b	.L990
-.L986:
+	b	.L998
+.L994:
 	add	x19, x19, :lo12:.LANCHOR0
 	strb	wzr, [x19, 2434]
-	b	.L985
+	b	.L993
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	2
 	.global	l2p_flush
@@ -7085,26 +7138,26 @@ l2p_flush:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w19, 0
 	bl	FtlWriteDump_data
-.L1004:
+.L1012:
 	ldrh	w0, [x20, 142]
 	cmp	w0, w19
-	bhi	.L1006
+	bhi	.L1014
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1006:
+.L1014:
 	ldr	x1, [x20, 2568]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1005
+	tbz	w0, #31, .L1013
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1005:
+.L1013:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1004
+	b	.L1012
 	.size	l2p_flush, .-l2p_flush
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -7121,7 +7174,7 @@ FtlRecoverySuperblock:
 	stp	x27, x28, [sp, 80]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	beq	.L1126
+	beq	.L1134
 	ldrb	w0, [x19, 6]
 	adrp	x20, .LANCHOR0
 	str	w0, [x29, 156]
@@ -7129,11 +7182,11 @@ FtlRecoverySuperblock:
 	ldrh	w27, [x19, 2]
 	ldrh	w0, [x0, 106]
 	cmp	w0, w27
-	bne	.L1011
+	bne	.L1019
 	strh	wzr, [x19, 4]
-.L1132:
+.L1140:
 	strb	wzr, [x19, 6]
-.L1126:
+.L1134:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7142,17 +7195,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1011:
+.L1019:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L1012:
+.L1020:
 	cmp	w0, w1
-	beq	.L1013
+	beq	.L1021
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w24, w0
 	cmn	w0, #1
-	beq	.L1014
+	beq	.L1022
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x19, 16
 	str	x1, [x29, 144]
@@ -7165,9 +7218,9 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	ldrh	w9, [x0, 116]
 	add	x1, x19, x1, lsl 1
-.L1015:
+.L1023:
 	cmp	x5, x1
-	bne	.L1019
+	bne	.L1027
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w1, w21
@@ -7180,68 +7233,68 @@ FtlRecoverySuperblock:
 	mov	w7, 65535
 	mov	x6, x4
 	mov	w3, 0
-.L1020:
+.L1028:
 	cmp	w21, w3
-	bne	.L1025
+	bne	.L1033
 	add	w23, w24, 1
 	ldr	w0, [x4, 4]
 	and	w23, w23, 65535
-.L1128:
+.L1136:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w28, w0, 65535
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 106]
 	cmp	w0, w23
-	bne	.L1027
+	bne	.L1035
 	strh	w23, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1027:
+.L1035:
 	ldr	w0, [x29, 156]
 	cmp	w23, w27
 	ccmp	w28, w0, 0, eq
-	bne	.L1028
-.L1133:
+	bne	.L1036
+.L1141:
 	mov	w2, w28
 	mov	w1, w23
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1126
-.L1013:
+	b	.L1134
+.L1021:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1012
-.L1014:
-	cbz	w27, .L1016
+	b	.L1020
+.L1022:
+	cbz	w27, .L1024
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1755
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1016:
+	bl	sftl_printk
+.L1024:
 	ldr	w0, [x29, 156]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L1017
+	beq	.L1025
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1756
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1017:
+	bl	sftl_printk
+.L1025:
 	strh	wzr, [x19, 2]
-	b	.L1132
-.L1019:
+	b	.L1140
+.L1027:
 	ldrh	w2, [x5]
 	cmp	w2, w10
-	beq	.L1018
+	beq	.L1026
 	ldr	x4, [x0, 4016]
 	ubfiz	x7, x21, 5, 16
 	orr	w2, w24, w2, lsl 10
@@ -7261,77 +7314,77 @@ FtlRecoverySuperblock:
 	sdiv	w2, w2, w6
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 16]
-.L1018:
+.L1026:
 	add	x5, x5, 2
-	b	.L1015
-.L1025:
+	b	.L1023
+.L1033:
 	ldr	w0, [x6]
-	cbnz	w0, .L1021
+	cbnz	w0, .L1029
 	ldr	x8, [x6, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1022
+	beq	.L1030
 	ldr	w1, [x23, 2624]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1022
+	cbz	w0, .L1030
 	add	w5, w5, 1
 	str	w5, [x23, 2624]
-.L1022:
+.L1030:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1024
+	bne	.L1032
 	ubfiz	x3, x3, 5, 16
 	and	w23, w24, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1128
-.L1021:
+	b	.L1136
+.L1029:
 	mov	w7, w9
-.L1024:
+.L1032:
 	add	w3, w3, 1
 	add	x6, x6, 32
 	and	w3, w3, 65535
-	b	.L1020
-.L1028:
+	b	.L1028
+.L1036:
 	mov	w0, 65535
 	adrp	x21, .LANCHOR3
 	cmp	w7, w0
-	bne	.L1029
+	bne	.L1037
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1030
-.L1029:
+	cbnz	w0, .L1038
+.L1037:
 	add	x0, x21, :lo12:.LANCHOR3
 	and	w3, w24, 65535
 	ldr	w1, [x0, -36]
 	cmn	w1, #1
-	bne	.L1031
+	bne	.L1039
 	str	w22, [x0, -36]
-.L1031:
+.L1039:
 	add	w0, w27, 7
 	cmp	w0, w24, uxth
-	bge	.L1079
+	bge	.L1087
 	sub	w25, w3, #7
 	and	w25, w25, 65535
-.L1032:
+.L1040:
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	w4, 65535
-.L1033:
+.L1041:
 	cmp	w25, w3
-	bhi	.L1040
+	bhi	.L1048
 	ldrh	w0, [x26, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-	b	.L1041
-.L1079:
+	b	.L1049
+.L1087:
 	mov	w25, w27
-	b	.L1032
-.L1035:
+	b	.L1040
+.L1043:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1034
+	beq	.L1042
 	ldr	x5, [x26, 4016]
 	ubfiz	x6, x24, 5, 16
 	add	w24, w24, 1
@@ -7339,11 +7392,11 @@ FtlRecoverySuperblock:
 	add	x5, x5, x6
 	and	w24, w24, 65535
 	str	w2, [x5, 4]
-.L1034:
+.L1042:
 	add	x1, x1, 2
-.L1041:
+.L1049:
 	cmp	x0, x1
-	bne	.L1035
+	bne	.L1043
 	ldr	x0, [x26, 4016]
 	mov	w1, w24
 	mov	w2, 0
@@ -7358,31 +7411,31 @@ FtlRecoverySuperblock:
 	ldr	w3, [x29, 136]
 	add	x0, x1, 16
 	add	x24, x1, x24
-.L1036:
+.L1044:
 	cmp	x24, x0
-	bne	.L1039
+	bne	.L1047
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1033
-.L1039:
+	b	.L1041
+.L1047:
 	ldr	w1, [x0, -16]
-	cbnz	w1, .L1030
+	cbnz	w1, .L1038
 	ldr	x1, [x0]
 	ldrh	w5, [x1]
 	cmp	w5, w4
-	beq	.L1038
+	beq	.L1046
 	ldr	w1, [x1, 4]
 	cmn	w1, #1
-	beq	.L1038
+	beq	.L1046
 	str	w1, [x2, -36]
-.L1038:
+.L1046:
 	add	x0, x0, 32
-	b	.L1036
-.L1040:
+	b	.L1044
+.L1048:
 	add	x0, x21, :lo12:.LANCHOR3
 	mov	w1, -1
 	str	w1, [x0, -36]
-.L1030:
+.L1038:
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, 1
 	mov	w25, w27
@@ -7392,16 +7445,16 @@ FtlRecoverySuperblock:
 	bl	FtlMapBlkWriteDump_data
 	sub	x0, x21, #24
 	str	x0, [x29, 112]
-.L1042:
+.L1050:
 	ldrh	w0, [x20, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	mov	w4, 65535
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-.L1043:
+.L1051:
 	cmp	x0, x1
-	bne	.L1045
+	bne	.L1053
 	ldr	x0, [x20, 4016]
 	mov	w1, w24
 	mov	w2, 0
@@ -7413,34 +7466,34 @@ FtlRecoverySuperblock:
 	add	x0, x0, 496
 	mov	x24, 0
 	str	x0, [x29, 128]
-.L1046:
+.L1054:
 	ldr	x0, [x29, 120]
 	cmp	x0, x24
-	bne	.L1073
+	bne	.L1081
 	add	w25, w25, 1
 	ldrh	w0, [x20, 106]
 	and	w25, w25, 65535
 	cmp	w0, w25
-	bne	.L1042
+	bne	.L1050
 	ldrh	w1, [x20, 36]
 	mov	w0, 0
 	strh	w25, [x19, 2]
 	mov	w2, 65535
 	strh	wzr, [x19, 4]
-.L1074:
+.L1082:
 	cmp	w0, w1
-	beq	.L1126
+	beq	.L1134
 	ldr	x4, [x29, 144]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 144]
 	cmp	w3, w2
-	beq	.L1075
+	beq	.L1083
 	strb	w0, [x19, 6]
-	b	.L1126
-.L1045:
+	b	.L1134
+.L1053:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1044
+	beq	.L1052
 	ldr	x3, [x20, 4016]
 	ubfiz	x5, x24, 5, 16
 	add	w24, w24, 1
@@ -7448,10 +7501,10 @@ FtlRecoverySuperblock:
 	add	x3, x3, x5
 	and	w24, w24, 65535
 	str	w2, [x3, 4]
-.L1044:
+.L1052:
 	add	x1, x1, 2
-	b	.L1043
-.L1073:
+	b	.L1051
+.L1081:
 	ldr	x4, [x20, 4016]
 	add	x4, x4, x24
 	ldr	w5, [x4, 4]
@@ -7460,53 +7513,53 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w25, w27
-	bcc	.L1047
+	bcc	.L1055
 	ldr	w1, [x29, 156]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1047
+	bhi	.L1055
 	cmp	w25, w23
 	ccmp	w28, w0, 0, eq
-	beq	.L1048
+	beq	.L1056
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1049
+	beq	.L1057
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1050
-.L1057:
+	beq	.L1058
+.L1065:
 	ldrh	w0, [x19]
-.L1131:
+.L1139:
 	bl	decrement_vpc_count
-.L1047:
+.L1055:
 	add	x24, x24, 32
-	b	.L1046
-.L1050:
+	b	.L1054
+.L1058:
 	ldr	w22, [x3, 4]
 	cmn	w22, #1
-	beq	.L1051
+	beq	.L1059
 	ldr	w1, [x20, 2624]
 	mov	w0, w22
 	str	x3, [x29, 136]
 	bl	ftl_cmp_data_ver
 	ldr	x3, [x29, 136]
-	cbz	w0, .L1051
+	cbz	w0, .L1059
 	add	w0, w22, 1
 	str	w0, [x20, 2624]
-.L1051:
+.L1059:
 	ldrh	w1, [x3]
 	mov	w0, 61589
 	cmp	w1, w0
-	beq	.L1052
+	beq	.L1060
 	ldr	x1, [x29, 128]
 	mov	w2, 1905
 	str	x3, [x29, 136]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 	ldr	x3, [x29, 136]
-.L1052:
+.L1060:
 	ldp	w26, w0, [x3, 8]
 	add	x1, x29, 168
 	str	w0, [x29, 164]
@@ -7515,13 +7568,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x21, -36]
 	cmn	w1, #1
-	beq	.L1053
+	beq	.L1061
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1053
+	cbz	w0, .L1061
 	ldr	w1, [x29, 164]
 	cmn	w1, #1
-	beq	.L1054
+	beq	.L1062
 	ldr	x0, [x20, 4016]
 	mov	w2, 0
 	add	x0, x0, x24
@@ -7537,72 +7590,72 @@ FtlRecoverySuperblock:
 	add	x3, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L1055
-.L1056:
+	bne	.L1063
+.L1064:
 	mov	w0, -1
 	str	w0, [x29, 164]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L1064:
+.L1072:
 	ldr	w4, [x29, 164]
 	cmn	w4, #1
-	beq	.L1047
-.L1078:
+	beq	.L1055
+.L1086:
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	and	w26, w0, 65535
 	ldrh	w0, [x20, 44]
 	mov	w3, w26
 	cmp	w0, w26
-	bhi	.L1069
+	bhi	.L1077
 	ldr	x1, [x29, 128]
 	mov	w2, 2006
 	adrp	x0, .LC1
 	str	w26, [x29, 136]
 	add	x0, x0, :lo12:.LC1
-	bl	printk
+	bl	sftl_printk
 	ldr	w3, [x29, 136]
-.L1069:
+.L1077:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x26, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1070
+	cbz	w0, .L1078
 	mov	w0, w3
-	b	.L1131
-.L1054:
+	b	.L1139
+.L1062:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	bne	.L1057
+	bne	.L1065
 	mov	w2, 1
 	add	x1, x29, 164
 	mov	w0, w26
 	bl	log2phys
-	b	.L1057
-.L1055:
+	b	.L1065
+.L1063:
 	ldr	w0, [x4, 8]
 	cmp	w26, w0
-	bne	.L1056
+	bne	.L1064
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x21, -36]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1056
+	cbz	w0, .L1064
 	ldp	w0, w1, [x29, 168]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 164]
-	bne	.L1059
-.L1129:
+	bne	.L1067
+.L1137:
 	mov	w0, w26
 	bl	FtlReUsePrevPpa
-	b	.L1056
-.L1059:
+	b	.L1064
+.L1067:
 	cmp	w0, w1
-	beq	.L1056
+	beq	.L1064
 	cmn	w0, #1
-	beq	.L1060
+	beq	.L1068
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -7612,54 +7665,54 @@ FtlRecoverySuperblock:
 	add	x0, x0, x24
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L1061:
+.L1069:
 	adrp	x0, .LANCHOR0+4016
 	ldr	x0, [x0, #:lo12:.LANCHOR0+4016]
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	beq	.L1062
+	beq	.L1070
 	ldr	w3, [x4, 4]
 	ldr	w0, [x21, -36]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1062
+	cbz	w0, .L1070
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1056
-.L1062:
+	cbz	w0, .L1064
+.L1070:
 	ldr	w1, [x29, 164]
-	b	.L1129
-.L1060:
+	b	.L1137
+.L1068:
 	str	w0, [x3]
-	b	.L1061
-.L1053:
+	b	.L1069
+.L1061:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	beq	.L1064
+	beq	.L1072
 	mov	w2, 1
 	add	x1, x29, 172
 	mov	w0, w26
 	bl	log2phys
 	ldr	w4, [x29, 168]
 	cmn	w4, #1
-	beq	.L1064
+	beq	.L1072
 	ldr	w0, [x29, 164]
 	cmp	w4, w0
-	beq	.L1078
+	beq	.L1086
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20, 2424]
 	and	w0, w0, 65535
 	cmp	w1, w0
-	beq	.L1068
+	beq	.L1076
 	ldrh	w1, [x20, 2472]
 	cmp	w1, w0
-	beq	.L1068
+	beq	.L1076
 	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1064
-.L1068:
+	bne	.L1072
+.L1076:
 	ldr	x0, [x20, 4016]
 	mov	w2, 0
 	mov	w1, 1
@@ -7671,52 +7724,52 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, 4016]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1064
+	beq	.L1072
 	ldr	x3, [x29, 136]
 	mov	w0, w22
 	ldr	w1, [x3, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1064
+	cbnz	w0, .L1072
 	mov	w2, 1
 	add	x1, x29, 168
 	mov	w0, w26
 	bl	log2phys
-	b	.L1064
-.L1070:
+	b	.L1072
+.L1078:
 	mov	w1, w26
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
-	bl	printk
-	b	.L1047
-.L1049:
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
+	bl	sftl_printk
+	b	.L1055
+.L1057:
 	ldr	w0, [x21, -28]
 	cmp	w0, 31
-	bhi	.L1071
+	bhi	.L1079
 	ldr	x1, [x29, 112]
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x21, -28]
-.L1071:
+.L1079:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x21, -36]
 	cmn	w0, #1
-	bne	.L1072
-.L1130:
+	bne	.L1080
+.L1138:
 	str	w22, [x21, -36]
-	b	.L1047
-.L1072:
+	b	.L1055
+.L1080:
 	cmp	w22, w0
-	bcs	.L1047
-	b	.L1130
-.L1075:
+	bcs	.L1055
+	b	.L1138
+.L1083:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1074
-.L1048:
+	b	.L1082
+.L1056:
 	strb	w28, [x19, 6]
 	strh	w23, [x19, 2]
-	b	.L1133
+	b	.L1141
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -7752,12 +7805,12 @@ FtlSuperblockPowerLostFix:
 	movk	w3, 0x1234, lsl 16
 	ldr	x1, [x0, 3432]
 	str	w3, [x1, 4]
-.L1135:
+.L1143:
 	subs	w22, w22, #1
-	beq	.L1137
+	beq	.L1145
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1136
-.L1137:
+	cbnz	w0, .L1144
+.L1145:
 	add	x2, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x19]
 	ldrh	w4, [x19, 4]
@@ -7775,12 +7828,12 @@ FtlSuperblockPowerLostFix:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1136:
+.L1144:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 68]
 	cmn	w0, #1
-	beq	.L1137
+	beq	.L1145
 	ldr	w0, [x20, 2624]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -7794,7 +7847,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1135
+	b	.L1143
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLoadBbt
@@ -7816,11 +7869,11 @@ FtlLoadBbt:
 	ldrh	w20, [x23, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-.L1147:
+.L1155:
 	ldrh	w0, [x23, 102]
 	sub	w0, w0, #16
 	cmp	w20, w0
-	ble	.L1150
+	ble	.L1158
 	lsl	w0, w20, 10
 	mov	w2, 1
 	str	w0, [x21, 4]
@@ -7829,7 +7882,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1148
+	bne	.L1156
 	ldr	w0, [x21, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -7837,27 +7890,27 @@ FtlLoadBbt:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-.L1148:
+.L1156:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1149
+	beq	.L1157
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1149
+	bne	.L1157
 	ldr	w1, [x22, 4]
 	str	w1, [x23, 168]
 	strh	w20, [x23, 160]
 	ldrh	w1, [x22, 8]
 	strh	w1, [x23, 164]
-.L1150:
+.L1158:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x21, 160]
 	cmp	w1, w0
-	beq	.L1164
+	beq	.L1172
 	ldrh	w1, [x21, 164]
 	cmp	w1, w0
-	beq	.L1154
+	beq	.L1162
 	add	x0, x21, 3400
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -7866,21 +7919,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21, 3400]
 	cmn	w0, #1
-	beq	.L1154
+	beq	.L1162
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1154
+	bne	.L1162
 	ldr	w1, [x21, 168]
 	ldr	w0, [x22, 4]
 	cmp	w0, w1
-	bls	.L1154
+	bls	.L1162
 	str	w0, [x21, 168]
 	ldrh	w1, [x21, 164]
 	ldrh	w0, [x22, 8]
 	strh	w1, [x21, 160]
 	strh	w0, [x21, 164]
-.L1154:
+.L1162:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w1, 1
 	add	x23, x20, 3400
@@ -7890,55 +7943,55 @@ FtlLoadBbt:
 	sxth	w21, w0
 	add	w0, w0, 1
 	strh	w0, [x20, 162]
-.L1156:
-	tbz	w21, #31, .L1159
+.L1164:
+	tbz	w21, #31, .L1167
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 254
 	add	x1, x1, 520
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1158:
+	bl	sftl_printk
+.L1166:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 10]
 	mov	w2, 65535
 	strh	w0, [x1, 166]
 	ldrh	w0, [x22, 12]
 	cmp	w0, w2
-	beq	.L1161
+	beq	.L1169
 	ldr	w2, [x1, 32]
 	cmp	w0, w2
-	beq	.L1161
+	beq	.L1169
 	ldrh	w1, [x1, 46]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1161
+	bcs	.L1169
 	cmp	w0, w1
-	bcs	.L1161
+	bcs	.L1169
 	bl	FtlSysBlkNumInit
-.L1161:
+.L1169:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x21, .LANCHOR3
 	add	x22, x19, 192
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w20, 0
-.L1162:
+.L1170:
 	ldrh	w0, [x19, 58]
 	cmp	w20, w0
-	bcc	.L1163
+	bcc	.L1171
 	mov	w0, 0
-.L1146:
+.L1154:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1149:
+.L1157:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L1147
-.L1159:
+	b	.L1155
+.L1167:
 	ldrh	w0, [x20, 160]
 	mov	w2, 1
 	mov	w1, w2
@@ -7950,15 +8003,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1157
+	beq	.L1165
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	beq	.L1158
-.L1157:
+	beq	.L1166
+.L1165:
 	sub	w21, w21, #1
 	sxth	w21, w21
-	b	.L1156
-.L1163:
+	b	.L1164
+.L1171:
 	ldrh	w2, [x21, -200]
 	ldr	x0, [x19, 3408]
 	mul	w1, w2, w20
@@ -7967,10 +8020,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x22], 8
 	bl	ftl_memcpy
-	b	.L1162
-.L1164:
+	b	.L1170
+.L1172:
 	mov	w0, -1
-	b	.L1146
+	b	.L1154
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
@@ -7995,47 +8048,47 @@ FtlMakeBbt:
 	add	x25, x0, 172
 	mov	x19, x0
 	add	x20, x0, 3400
-.L1177:
+.L1185:
 	ldrh	w0, [x19, 58]
 	cmp	w24, w0
-	bcc	.L1183
+	bcc	.L1191
 	add	x20, x21, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1184:
+.L1192:
 	ldrh	w0, [x20, 118]
 	cmp	w0, w19
-	bhi	.L1185
+	bhi	.L1193
 	add	x20, x20, 160
 	ldrh	w19, [x20, 12]
 	mov	w22, 65535
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1186:
+.L1194:
 	ldrh	w0, [x20, 12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1190
+	ble	.L1198
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1187
+	beq	.L1195
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1188
+	cbz	w0, .L1196
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1187:
+.L1195:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1186
-.L1183:
+	b	.L1194
+.L1191:
 	ldr	x0, [x19, 3432]
 	mov	w2, 65535
 	ldr	x27, [x19, 3440]
 	ldrh	w1, [x25]
 	stp	x0, x27, [x20, 8]
 	cmp	w1, w2
-	beq	.L1178
+	beq	.L1186
 	ldrh	w23, [x19, 102]
 	mov	w2, 1
 	madd	w23, w23, w24, w1
@@ -8050,29 +8103,29 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1179:
+.L1187:
 	mov	w0, w23
 	add	w24, w24, 1
 	bl	FtlBbmMapBadBlock
 	add	x26, x26, 8
 	add	x25, x25, 2
-	b	.L1177
-.L1178:
+	b	.L1185
+.L1186:
 	mov	w1, w24
 	bl	FlashGetBadBlockList
 	ldr	x0, [x20, 8]
 	ldr	x1, [x26]
 	bl	FtlBbt2Bitmap
 	ldrh	w22, [x19, 102]
-.L1181:
+.L1189:
 	sub	w22, w22, #1
 	and	w22, w22, 65535
-.L1180:
+.L1188:
 	ldrh	w0, [x19, 102]
 	madd	w0, w24, w0, w22
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1181
+	beq	.L1189
 	ldr	x0, [x19, 3440]
 	mov	w2, 16
 	strh	w22, [x25]
@@ -8108,25 +8161,25 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1179
+	bne	.L1187
 	mov	w0, w23
 	bl	FtlBbmMapBadBlock
-	b	.L1180
-.L1185:
+	b	.L1188
+.L1193:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1184
-.L1188:
+	b	.L1192
+.L1196:
 	ldrh	w0, [x20]
 	cmp	w0, w22
-	bne	.L1189
+	bne	.L1197
 	strh	w19, [x20]
-	b	.L1187
-.L1189:
+	b	.L1195
+.L1197:
 	strh	w19, [x20, 4]
-.L1190:
+.L1198:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w2, 2
 	ldr	x1, [x21, 3960]
@@ -8183,16 +8236,16 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x0, 100]
 	cmp	w2, w1
-	bhi	.L1204
+	bhi	.L1212
 	ldrh	w21, [x0, 112]
 	adrp	x26, .LANCHOR3
 	add	x25, x26, :lo12:.LANCHOR3
 	mov	w23, 0
 	sub	x25, x25, #120
 	lsr	w21, w27, w21
-.L1198:
-	cbnz	w28, .L1203
-.L1196:
+.L1206:
+	cbnz	w28, .L1211
+.L1204:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8201,7 +8254,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1203:
+.L1211:
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x0, x26, :lo12:.LANCHOR3
 	ldrh	w1, [x2, 62]
@@ -8214,9 +8267,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w28, w19
 	csel	w19, w0, w19, cc
-	cbz	w4, .L1200
+	cbz	w4, .L1208
 	cmp	w19, w1
-	beq	.L1200
+	beq	.L1208
 	ldr	x0, [x2, 4048]
 	mov	w2, 1
 	str	x0, [x29, 120]
@@ -8226,7 +8279,7 @@ FtlVendorPartWrite:
 	str	w4, [x29, 116]
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1201:
+.L1209:
 	add	x5, x22, :lo12:.LANCHOR0
 	lsl	w4, w19, 9
 	lsl	w20, w20, 9
@@ -8250,17 +8303,17 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1198
-.L1200:
+	b	.L1206
+.L1208:
 	add	x0, x22, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrh	w2, [x0, 114]
 	ldr	x0, [x0, 4048]
 	bl	ftl_memset
-	b	.L1201
-.L1204:
+	b	.L1209
+.L1212:
 	mov	w23, -1
-	b	.L1196
+	b	.L1204
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
@@ -8272,7 +8325,7 @@ Ftl_save_ext_data:
 	movk	w1, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w1
-	bne	.L1212
+	bne	.L1220
 	stp	x29, x30, [sp, -16]!
 	add	x2, x0, 2720
 	mov	w1, 68
@@ -8307,7 +8360,7 @@ Ftl_save_ext_data:
 	bl	FtlVendorPartWrite
 	ldp	x29, x30, [sp], 16
 	ret
-.L1212:
+.L1220:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
@@ -8318,21 +8371,21 @@ FtlEctTblFlush:
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w2, [x1, 104]
 	cmp	w2, 31
-	bhi	.L1219
+	bhi	.L1227
 	add	w2, w2, 1
 	strh	w2, [x1, 104]
 	mov	w2, 1
-.L1216:
+.L1224:
 	adrp	x1, .LANCHOR0
-	cbnz	w0, .L1217
+	cbnz	w0, .L1225
 	add	x0, x1, :lo12:.LANCHOR0
 	ldr	x0, [x0, 4072]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w2, w2, w3
 	cmp	w0, w2
-	bcc	.L1221
-.L1217:
+	bcc	.L1229
+.L1225:
 	add	x0, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
@@ -8357,10 +8410,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1219:
+.L1227:
 	mov	w2, 32
-	b	.L1216
-.L1221:
+	b	.L1224
+.L1229:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -8393,16 +8446,16 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x20, 100]
 	cmp	w1, w0
-	bhi	.L1233
+	bhi	.L1241
 	ldrh	w3, [x20, 112]
 	adrp	x24, .LANCHOR3
 	mov	x23, x2
 	add	x24, x24, :lo12:.LANCHOR3
 	mov	w22, 0
 	lsr	w25, w28, w3
-.L1227:
-	cbnz	w27, .L1232
-.L1225:
+.L1235:
+	cbnz	w27, .L1240
+.L1233:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8411,7 +8464,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1232:
+.L1240:
 	ldrh	w19, [x20, 62]
 	ldr	x0, [x24, -232]
 	udiv	w21, w28, w19
@@ -8423,7 +8476,7 @@ FtlVendorPartRead:
 	cmp	w27, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w1, .L1229
+	cbz	w1, .L1237
 	ldr	x0, [x20, 4048]
 	mov	w2, 1
 	str	x0, [x29, 104]
@@ -8443,21 +8496,21 @@ FtlVendorPartRead:
 	csinv	w22, w22, wzr, ne
 	add	x1, x1, x21, sxtw 2
 	bl	ftl_memcpy
-.L1231:
+.L1239:
 	add	w25, w25, 1
 	sub	w27, w27, w19
 	add	w28, w28, w19
 	add	x23, x23, x26, sxtw
-	b	.L1227
-.L1229:
+	b	.L1235
+.L1237:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-	b	.L1231
-.L1233:
+	b	.L1239
+.L1241:
 	mov	w22, -1
-	b	.L1225
+	b	.L1233
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
@@ -8477,18 +8530,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1236
-	adrp	x1, .LC100
+	beq	.L1244
+	adrp	x1, .LC104
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC100
+	add	x1, x1, :lo12:.LC104
 	add	x0, x0, :lo12:.LC71
-	bl	printk
+	bl	sftl_printk
 	ldr	x0, [x19, 4072]
 	mov	w1, 0
 	ldrh	w2, [x19, 4056]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1236:
+.L1244:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8513,19 +8566,19 @@ Ftl_load_ext_data:
 	ldr	w0, [x20, 2720]
 	movk	w21, 0x4654, lsl 16
 	cmp	w0, w21
-	beq	.L1239
+	beq	.L1247
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x22
 	bl	ftl_memset
 	str	w21, [x20, 2720]
-.L1239:
+.L1247:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w2
-	bne	.L1240
+	bne	.L1248
 	ldr	w2, [x0, 2808]
 	str	w2, [x0, 2612]
 	ldr	w2, [x0, 2812]
@@ -8550,7 +8603,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 2764]
 	str	w1, [x0, 2648]
 	str	w2, [x0, 2644]
-.L1240:
+.L1248:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x0, 2632]
 	ldrh	w1, [x0, 96]
@@ -8672,7 +8725,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.L1245:
+.L1253:
 	ldr	x0, [x19, 3432]
 	mov	w3, 1
 	str	x0, [x20, 8]
@@ -8690,7 +8743,7 @@ FtlVpcTblFlush:
 	ldrh	w1, [x19, 2658]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1246
+	blt	.L1254
 	ldrh	w0, [x19, 2656]
 	ldrh	w24, [x19, 2660]
 	strh	wzr, [x19, 2658]
@@ -8710,51 +8763,51 @@ FtlVpcTblFlush:
 	mov	x0, x20
 	mov	w1, w3
 	bl	FlashProgPages
-.L1246:
+.L1254:
 	ldrh	w0, [x19, 2658]
 	ldr	w1, [x20]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2658]
 	cmn	w1, #1
-	bne	.L1247
+	bne	.L1255
 	cmp	w0, 1
-	bne	.L1248
+	bne	.L1256
 	adrp	x0, .LC1
 	mov	w2, 1124
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1248:
+	bl	sftl_printk
+.L1256:
 	ldrh	w0, [x19, 2658]
 	cmp	w0, 1
-	bne	.L1249
+	bne	.L1257
 	ldrh	w0, [x19, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2658]
-.L1249:
+.L1257:
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	cmp	w22, 3
-	bls	.L1245
+	bls	.L1253
 	add	x23, x23, :lo12:.LANCHOR0
-	adrp	x0, .LC101
+	adrp	x0, .LC105
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC105
 	ldr	w1, [x23, 3404]
-	bl	printk
-.L1251:
-	b	.L1251
-.L1247:
+	bl	sftl_printk
+.L1259:
+	b	.L1259
+.L1255:
 	cmp	w0, 1
-	beq	.L1245
+	beq	.L1253
 	mov	w0, 65535
 	cmp	w24, w0
-	beq	.L1252
+	beq	.L1260
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.L1252:
+.L1260:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8770,48 +8823,48 @@ FtlVpcCheckAndModify:
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC91
+	adrp	x0, .LC95
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
 	add	x1, x1, 552
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC95
 	str	x23, [sp, 48]
-	bl	printk
+	bl	sftl_printk
 	ldr	x0, [x19, 4080]
 	mov	w21, 0
 	ldrh	w2, [x19, 46]
 	mov	w1, 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1258:
+.L1266:
 	ldr	w0, [x19, 2584]
 	cmp	w21, w0
-	bcc	.L1260
-	adrp	x22, .LC102
+	bcc	.L1268
+	adrp	x22, .LC106
 	add	x20, x20, :lo12:.LANCHOR0
-	add	x22, x22, :lo12:.LC102
+	add	x22, x22, :lo12:.LC106
 	mov	w19, 0
 	mov	w23, 65535
-.L1261:
+.L1269:
 	ldrh	w0, [x20, 44]
 	cmp	w0, w19
-	bhi	.L1265
+	bhi	.L1273
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1260:
+.L1268:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1259
+	beq	.L1267
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldr	x2, [x19, 4080]
@@ -8819,31 +8872,31 @@ FtlVpcCheckAndModify:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1259:
+.L1267:
 	add	w21, w21, 1
-	b	.L1258
-.L1265:
+	b	.L1266
+.L1273:
 	ldr	x0, [x20, 2376]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, 4080]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1263
+	beq	.L1271
 	cmp	w2, w23
-	beq	.L1263
-	mov	w1, w19
+	beq	.L1271
 	mov	x0, x22
-	bl	printk
+	mov	w1, w19
+	bl	sftl_printk
 	ldrh	w0, [x20, 2424]
 	cmp	w0, w19
-	beq	.L1263
+	beq	.L1271
 	ldrh	w0, [x20, 2520]
 	cmp	w0, w19
-	beq	.L1263
+	beq	.L1271
 	ldrh	w0, [x20, 2472]
 	cmp	w0, w19
-	beq	.L1263
+	beq	.L1271
 	ldr	x0, [x20, 4080]
 	ldrh	w1, [x0, x21]
 	ldr	x0, [x20, 2376]
@@ -8852,10 +8905,10 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1263:
+.L1271:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1261
+	b	.L1269
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	allocate_new_data_superblock
@@ -8871,26 +8924,26 @@ allocate_new_data_superblock:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 44]
 	cmp	w0, w21
-	bcs	.L1271
+	bcs	.L1279
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2681
 	add	x1, x1, 576
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1271:
+	bl	sftl_printk
+.L1279:
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L1272
+	beq	.L1280
 	add	x1, x19, :lo12:.LANCHOR0
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, 2376]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1273
+	cbz	w0, .L1281
 	mov	w0, w21
 	bl	INSERT_DATA_LIST
-.L1272:
+.L1280:
 	mov	w0, 1
 	adrp	x1, .LANCHOR3
 	strb	w0, [x22, 8]
@@ -8899,21 +8952,21 @@ allocate_new_data_superblock:
 	mov	x20, x1
 	ldrh	w0, [x0, -48]
 	cmp	w0, w2
-	beq	.L1274
+	beq	.L1282
 	cmp	w21, w0
-	bne	.L1275
+	bne	.L1283
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x19, 2376]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1276
-.L1275:
+	cbz	w1, .L1284
+.L1283:
 	bl	update_vpc_list
-.L1276:
+.L1284:
 	add	x1, x20, :lo12:.LANCHOR3
 	mov	w0, -1
 	strh	w0, [x1, -48]
-.L1274:
+.L1282:
 	mov	x0, x22
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8925,10 +8978,10 @@ allocate_new_data_superblock:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1273:
+.L1281:
 	mov	w0, w21
 	bl	INSERT_FREE_LIST
-	b	.L1272
+	b	.L1280
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
@@ -8953,18 +9006,18 @@ FtlProgPages:
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x20, x0, 4
 	bl	FlashProgPages
-.L1282:
+.L1290:
 	cmp	x20, x24
-	beq	.L1289
+	beq	.L1297
 	sub	x23, x20, #4
-	b	.L1290
-.L1285:
+	b	.L1298
+.L1293:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1283
+	bne	.L1291
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -8975,12 +9028,12 @@ FtlProgPages:
 	ldrh	w0, [x21, 106]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1283:
+.L1291:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1284
+	cbnz	w0, .L1292
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1284:
+.L1292:
 	ldr	w0, [x21, 2816]
 	add	w0, w0, 1
 	str	w0, [x21, 2816]
@@ -8996,20 +9049,20 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x23
 	bl	FlashProgPages
-.L1290:
+.L1298:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1285
+	beq	.L1293
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x21, 36]
 	cmp	w1, w0
-	bcc	.L1286
+	bcc	.L1294
 	adrp	x0, .LC1
 	mov	w2, 933
 	add	x1, x25, 608
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1286:
+	bl	sftl_printk
+.L1294:
 	add	x1, x29, 96
 	ldr	w0, [x23, 4]
 	mov	w2, 1
@@ -9023,35 +9076,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w23, w1
 	cmn	w4, #1
-	beq	.L1287
+	beq	.L1295
 	ldr	x2, [x21, 2376]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1288
-	adrp	x0, .LC103
+	cbnz	w0, .L1296
+	adrp	x0, .LC107
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC103
-	bl	printk
-.L1288:
+	add	x0, x0, :lo12:.LC107
+	bl	sftl_printk
+.L1296:
 	mov	w0, w23
 	bl	decrement_vpc_count
-.L1287:
+.L1295:
 	add	x20, x20, 32
-	b	.L1282
-.L1289:
+	b	.L1290
+.L1297:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x22, 36]
 	cmp	w1, w0
-	bcc	.L1281
+	bcc	.L1289
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 948
 	add	x1, x1, 608
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1281:
+	bl	sftl_printk
+.L1289:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9069,13 +9122,13 @@ FtlCacheWriteBack:
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
 	ldr	x0, [x19, -56]
-	cbz	x0, .L1297
+	cbz	x0, .L1305
 	ldr	x3, [x19, 112]
 	mov	w2, 0
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, -56]
-.L1297:
+.L1305:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -9103,14 +9156,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	bne	.L1307
+	bne	.L1315
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1307:
+.L1315:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9129,55 +9182,55 @@ FtlDiscard:
 	add	w1, w0, w1
 	ldr	w0, [x22, 144]
 	cmp	w1, w0
-	bhi	.L1318
+	bhi	.L1326
 	cmp	w19, 31
-	bhi	.L1312
-.L1326:
+	bhi	.L1320
+.L1334:
 	mov	w0, 0
-.L1310:
+.L1318:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1312:
+.L1320:
 	bl	FtlCacheWriteBack
 	ldrh	w1, [x22, 62]
 	udiv	w22, w21, w1
 	msub	w21, w1, w22, w21
 	ands	w21, w21, 65535
-	beq	.L1313
+	beq	.L1321
 	sub	w1, w1, w21
 	add	w22, w22, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1313:
+.L1321:
 	adrp	x21, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, -1
 	str	w0, [x29, 60]
-.L1314:
+.L1322:
 	ldrh	w0, [x20, 62]
 	cmp	w19, w0
-	bcs	.L1316
+	bcs	.L1324
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	w1, [x0, 120]
 	cmp	w1, 32
-	bls	.L1326
+	bls	.L1334
 	str	wzr, [x0, 120]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1326
-.L1316:
+	b	.L1334
+.L1324:
 	mov	w2, 0
 	add	x1, x29, 56
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 56]
 	cmn	w0, #1
-	beq	.L1315
+	beq	.L1323
 	ldr	w0, [x21, 120]
 	mov	w2, 1
 	add	x1, x29, 60
@@ -9192,14 +9245,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1315:
+.L1323:
 	ldrh	w0, [x20, 62]
 	add	w22, w22, 1
 	sub	w19, w19, w0
-	b	.L1314
-.L1318:
+	b	.L1322
+.L1326:
 	mov	w0, -1
-	b	.L1310
+	b	.L1318
 	.size	FtlDiscard, .-FtlDiscard
 	.align	2
 	.global	FtlGcFreeTempBlock
@@ -9217,8 +9270,8 @@ FtlGcFreeTempBlock:
 	ldrh	w20, [x2, 2520]
 	ldrh	w1, [x2, 106]
 	cmp	w20, w3
-	bne	.L1328
-.L1338:
+	bne	.L1336
+.L1346:
 	add	x20, x19, :lo12:.LANCHOR0
 	adrp	x0, .LANCHOR3-40
 	add	x21, x20, 2520
@@ -9226,47 +9279,47 @@ FtlGcFreeTempBlock:
 	mov	w0, 65535
 	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1351
-.L1354:
+	bne	.L1359
+.L1362:
 	mov	w0, 0
-.L1327:
+.L1335:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1328:
-	cbz	w0, .L1331
+.L1336:
+	cbz	w0, .L1339
 	adrp	x0, .LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w4, [x0, 4]
 	cmp	w4, w3
-	beq	.L1332
-.L1333:
+	beq	.L1340
+.L1341:
 	mov	w1, 2
-.L1331:
+.L1339:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x0, x21, 2520
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1334
+	beq	.L1342
 	ldr	x1, [x21, 2384]
 	ubfiz	x20, x20, 1, 16
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1335
+	bls	.L1343
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1335:
+.L1343:
 	adrp	x0, .LANCHOR3
 	add	x1, x0, :lo12:.LANCHOR3
 	mov	x20, x0
 	ldr	w1, [x1, -40]
-	cbnz	w1, .L1336
+	cbnz	w1, .L1344
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
@@ -9275,41 +9328,41 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1336:
+.L1344:
 	add	x0, x20, :lo12:.LANCHOR3
 	str	wzr, [x0, -40]
-.L1347:
+.L1355:
 	mov	w0, 1
-	b	.L1327
-.L1332:
+	b	.L1335
+.L1340:
 	strh	wzr, [x0, 4]
 	ldrh	w0, [x2, 2416]
 	cmp	w0, 17
-	bhi	.L1333
-	b	.L1331
-.L1334:
+	bhi	.L1341
+	b	.L1339
+.L1342:
 	adrp	x0, .LANCHOR2+4
 	ldrh	w1, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1347
-	b	.L1338
-.L1351:
+	bne	.L1355
+	b	.L1346
+.L1359:
 	bl	FtlCacheWriteBack
 	ldrb	w0, [x21, 7]
 	ldrh	w2, [x20, 106]
 	ldrh	w1, [x20, 3304]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1339
+	beq	.L1347
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 162
 	add	x1, x1, 624
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1339:
+	bl	sftl_printk
+.L1347:
 	add	x0, x19, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR1
 	add	x22, x22, :lo12:.LANCHOR1
@@ -9327,20 +9380,20 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x0, 3304]
 	add	w1, w1, w2
 	str	w1, [x0, 2608]
-.L1340:
+.L1348:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x21, 3304]
 	cmp	w0, w20
-	bhi	.L1344
+	bhi	.L1352
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x21, 2520]
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1345
+	cbz	w1, .L1353
 	bl	INSERT_DATA_LIST
-.L1346:
+.L1354:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w20, -1
 	strh	wzr, [x19, 3304]
@@ -9352,12 +9405,12 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x19, 2416]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1354
+	ble	.L1362
 	mov	w0, 20
 	strh	w20, [x19, 2672]
 	strh	w0, [x19, 3232]
-	b	.L1354
-.L1344:
+	b	.L1362
+.L1352:
 	mov	w24, 12
 	ldr	x26, [x21, 3312]
 	ldr	w0, [x21, 2584]
@@ -9365,12 +9418,12 @@ FtlGcFreeTempBlock:
 	add	x23, x26, x24
 	ldr	w1, [x23, 8]
 	cmp	w1, w0
-	bcc	.L1341
+	bcc	.L1349
 	mov	w2, 168
 	mov	x1, x22
 	mov	x0, x25
-	bl	printk
-.L1341:
+	bl	sftl_printk
+.L1349:
 	ldr	w0, [x23, 8]
 	add	x1, x29, 92
 	mov	w2, 0
@@ -9378,7 +9431,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x26, x24]
 	ldr	w1, [x29, 92]
 	cmp	w0, w1
-	bne	.L1342
+	bne	.L1350
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w21, w0
@@ -9387,22 +9440,22 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w21
-.L1353:
+.L1361:
 	bl	decrement_vpc_count
-.L1343:
+.L1351:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1340
-.L1342:
+	b	.L1348
+.L1350:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	beq	.L1343
+	beq	.L1351
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 2520]
-	b	.L1353
-.L1345:
+	b	.L1361
+.L1353:
 	bl	INSERT_FREE_LIST
-	b	.L1346
+	b	.L1354
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
 	.global	FtlGcPageRecovery
@@ -9420,7 +9473,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2522]
 	ldrh	w0, [x19, 106]
 	cmp	w1, w0
-	bcc	.L1355
+	bcc	.L1363
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
 	sub	x0, x19, #192
@@ -9428,7 +9481,7 @@ FtlGcPageRecovery:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	str	wzr, [x19, -40]
-.L1355:
+.L1363:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9477,25 +9530,25 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x19, 4024]
 	bl	FlashProgPages
 	mov	w10, 0
-.L1361:
+.L1369:
 	ldr	w1, [x19, 3248]
 	cmp	w10, w1
-	bcc	.L1364
+	bcc	.L1372
 	ldr	x0, [x19, 4024]
 	bl	FtlGcBufFree
 	str	wzr, [x19, 3248]
 	ldrh	w0, [x19, 2524]
-	cbnz	w0, .L1365
+	cbnz	w0, .L1373
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1367
-.L1364:
+	b	.L1375
+.L1372:
 	ldr	x0, [x19, 4024]
 	ubfiz	x1, x10, 5, 16
 	add	x3, x0, x1
 	ldr	w0, [x0, x1]
 	cmn	w0, #1
-	bne	.L1362
+	bne	.L1370
 	ldrh	w3, [x19, 2520]
 	ldr	x2, [x19, 2376]
 	strh	wzr, [x2, x3, lsl 1]
@@ -9510,23 +9563,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1367:
+.L1375:
 	mov	w0, 1
-.L1360:
+.L1368:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1362:
+.L1370:
 	ldr	x0, [x3, 16]
 	ldr	w1, [x3, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L1361
-.L1365:
+	b	.L1369
+.L1373:
 	mov	w0, 0
-	b	.L1360
+	b	.L1368
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
 	.global	Ftl_get_new_temp_ppa
@@ -9541,10 +9594,10 @@ Ftl_get_new_temp_ppa:
 	ldrh	w2, [x0, 2520]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L1369
+	beq	.L1377
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1370
-.L1369:
+	cbnz	w0, .L1378
+.L1377:
 	bl	FtlCacheWriteBack
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w0, 0
@@ -9558,7 +9611,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1370:
+.L1378:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 2520
 	bl	get_new_active_ppa
@@ -9580,23 +9633,23 @@ rk_ftl_garbage_collect:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w2, [x1, 4000]
-	cbnz	w2, .L1444
+	cbnz	w2, .L1452
 	ldrh	w2, [x1, 2400]
 	cmp	w2, 47
-	bls	.L1444
+	bls	.L1452
 	mov	w23, w0
 	adrp	x0, .LANCHOR2+4
 	ldrh	w2, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1374
-.L1377:
+	bne	.L1382
+.L1385:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	ldrh	w1, [x0, 3322]
 	cmp	w1, w2
-	bne	.L1375
-.L1376:
+	bne	.L1383
+.L1384:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w20, 65535
 	ldr	w1, [x21, 3236]
@@ -9605,129 +9658,93 @@ rk_ftl_garbage_collect:
 	add	w1, w1, w23, lsl 7
 	str	w1, [x21, 3236]
 	cmp	w0, w20
-	bne	.L1378
+	bne	.L1386
 	ldrh	w20, [x21, 2520]
 	cmp	w20, w0
-	bne	.L1447
+	bne	.L1455
 	ldrh	w22, [x21, 3320]
 	cmp	w22, w20
-	bne	.L1378
+	bne	.L1386
 	ldrh	w0, [x21, 2416]
 	mov	w2, 1024
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L1450
+	bls	.L1458
 	adrp	x0, .LANCHOR3+124
 	str	wzr, [x21, 3236]
 	strh	wzr, [x0, #:lo12:.LANCHOR3+124]
 	bl	GetSwlReplaceBlock
 	and	w20, w0, 65535
 	cmp	w20, w22
-	bne	.L1451
+	bne	.L1459
 	ldrh	w1, [x21, 2416]
 	ldrh	w0, [x21, 3234]
 	cmp	w1, w0
-	bcs	.L1381
+	bcs	.L1389
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
 	cmp	w0, w20
-	beq	.L1383
+	beq	.L1391
 	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1384
+	bhi	.L1392
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	and	w22, w0, 65535
 	mov	w0, 128
 	strh	w0, [x21, 3234]
 	cmp	w22, w20
-	beq	.L1383
-.L1380:
-	add	x0, x19, :lo12:.LANCHOR0
-	ubfiz	x1, x22, 1, 32
-	mov	w20, w22
-	ldr	x2, [x0, 2376]
-	ldr	x3, [x0, 2384]
-	ldrh	w5, [x0, 3232]
-	ldrh	w4, [x3, x1]
-	ldrh	w3, [x2, x1]
-	mov	w1, w22
-	ldrh	w2, [x0, 2416]
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
-	bl	printk
-	b	.L1383
-.L1374:
-	ldrh	w1, [x1, 2520]
-	cmp	w1, w0
-	beq	.L1377
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1377
-	mov	w0, 1
-	b	.L1372
-.L1375:
-	ldrh	w3, [x0, 3320]
-	cmp	w3, w2
-	bne	.L1376
-	strh	w1, [x0, 3320]
-	mov	w1, -1
-	strh	w1, [x0, 3322]
-	b	.L1376
-.L1384:
-	mov	w0, 64
-.L1476:
-	strh	w0, [x21, 3234]
-.L1383:
+	bne	.L1388
+.L1391:
 	bl	FtlGcReFreshBadBlk
-.L1378:
+.L1386:
 	cmp	w23, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1386
+	bne	.L1394
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 24
-	bhi	.L1452
+	bhi	.L1460
 	cmp	w0, 16
 	ldrh	w21, [x1, 106]
-	bls	.L1388
+	bls	.L1396
 	lsr	w21, w21, 5
-.L1387:
+.L1395:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1, 3232]
 	cmp	w2, w0
-	bcs	.L1391
+	bcs	.L1399
 	ldrh	w0, [x1, 2520]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1392
+	bne	.L1400
 	ldrh	w2, [x1, 3320]
 	cmp	w2, w0
-	bne	.L1392
+	bne	.L1400
 	adrp	x0, .LANCHOR3+124
 	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
-	cbnz	w0, .L1393
+	cbnz	w0, .L1401
 	ldr	w2, [x1, 2584]
 	ldr	w3, [x1, 2580]
 	add	w2, w2, w2, lsl 1
 	cmp	w3, w2, lsr 2
-	bcs	.L1394
-.L1393:
+	bcs	.L1402
+.L1401:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x2, 2652]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x2, 3232]
-.L1395:
+.L1403:
 	add	x19, x19, :lo12:.LANCHOR0
 	str	wzr, [x19, 3244]
-.L1372:
+.L1380:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9735,77 +9752,113 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1381:
+.L1382:
+	ldrh	w1, [x1, 2520]
+	cmp	w1, w0
+	beq	.L1385
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	cbz	w0, .L1385
+	mov	w0, 1
+	b	.L1380
+.L1383:
+	ldrh	w3, [x0, 3320]
+	cmp	w3, w2
+	bne	.L1384
+	strh	w1, [x0, 3320]
+	mov	w1, -1
+	strh	w1, [x0, 3322]
+	b	.L1384
+.L1392:
+	mov	w0, 64
+.L1484:
+	strh	w0, [x21, 3234]
+	b	.L1391
+.L1389:
 	mov	w0, 80
-	b	.L1476
-.L1451:
+	b	.L1484
+.L1459:
 	mov	w22, w20
-	b	.L1380
-.L1447:
+.L1388:
+	add	x0, x19, :lo12:.LANCHOR0
+	ubfiz	x1, x22, 1, 32
+	mov	w20, w22
+	ldr	x2, [x0, 2376]
+	ldr	x3, [x0, 2384]
+	ldrh	w5, [x0, 3232]
+	ldrh	w4, [x3, x1]
+	ldrh	w3, [x2, x1]
+	mov	w1, w22
+	ldrh	w2, [x0, 2416]
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
+	bl	sftl_printk
+	b	.L1391
+.L1455:
 	mov	w20, w0
-	b	.L1378
-.L1450:
+	b	.L1386
+.L1458:
 	mov	w20, w22
-	b	.L1378
-.L1388:
+	b	.L1386
+.L1396:
 	cmp	w0, 12
-	bls	.L1389
+	bls	.L1397
 	lsr	w21, w21, 4
-	b	.L1387
-.L1389:
+	b	.L1395
+.L1397:
 	mov	w1, w21
 	cmp	w0, 9
 	lsr	w21, w21, 2
 	csel	w21, w21, w1, cs
-	b	.L1387
-.L1452:
+	b	.L1395
+.L1460:
 	mov	w21, 1
-	b	.L1387
-.L1394:
+	b	.L1395
+.L1402:
 	mov	w2, 18
 	strh	w2, [x1, 3232]
-	b	.L1395
-.L1392:
+	b	.L1403
+.L1400:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x1, 3232]
-.L1391:
+.L1399:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 3324]
-	cbz	w0, .L1453
+	cbz	w0, .L1461
 	add	w21, w21, 32
 	and	w21, w21, 65535
-.L1453:
+.L1461:
 	mov	w20, 65535
-.L1397:
+.L1405:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w2
-	bne	.L1406
+	bne	.L1414
 	cmp	w20, w1
-	beq	.L1407
+	beq	.L1415
 	strh	w20, [x0, 2672]
-.L1408:
+.L1416:
 	add	x5, x19, :lo12:.LANCHOR0
 	mov	w1, 65535
 	ldrh	w0, [x5, 2672]
 	strb	wzr, [x5, 2680]
 	cmp	w0, w1
-	beq	.L1406
+	beq	.L1414
 	bl	IsBlkInGcList
-	cbz	w0, .L1411
+	cbz	w0, .L1419
 	mov	w0, -1
 	strh	w0, [x5, 2672]
-.L1411:
+.L1419:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	add	x23, x22, 2672
 	ldrh	w1, [x22, 2672]
 	cmp	w1, w0
-	beq	.L1406
+	beq	.L1414
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR3
@@ -9817,87 +9870,87 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x0, 126]
 	ldrh	w1, [x1, x2, lsl 1]
 	strh	w1, [x0, 128]
-.L1406:
+.L1414:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w2, [x0, 2424]
 	cmp	w2, w1
-	beq	.L1412
+	beq	.L1420
 	ldrh	w0, [x0, 2472]
 	cmp	w0, w1
-	beq	.L1412
+	beq	.L1420
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x24, x24, 648
-.L1413:
+.L1421:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w23, [x22, 2672]
 	cmp	w23, w0
-	bne	.L1414
+	bne	.L1422
 	mov	w25, 2
 	str	wzr, [x22, 3244]
-.L1415:
+.L1423:
 	ldrh	w5, [x22, 3240]
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x22, 2672]
 	cmp	w6, w23
-	bne	.L1416
+	bne	.L1424
 	strh	wzr, [x22, 3240]
 	mov	w0, 8
-	b	.L1372
-.L1386:
+	b	.L1380
+.L1394:
 	add	x5, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x5, 2520]
 	cmp	w1, w0
-	bne	.L1456
+	bne	.L1464
 	ldrh	w0, [x5, 3320]
 	cmp	w0, w1
-	bne	.L1456
+	bne	.L1464
 	cmp	w20, w0
-	bne	.L1456
+	bne	.L1464
 	ldrh	w0, [x5, 2672]
 	cmp	w0, w20
-	beq	.L1398
-.L1456:
+	beq	.L1406
+.L1464:
 	mov	w21, 1
-	b	.L1397
-.L1398:
+	b	.L1405
+.L1406:
 	ldrh	w7, [x5, 2416]
 	adrp	x21, .LANCHOR3
 	ldrh	w0, [x5, 3232]
 	str	wzr, [x5, 3244]
 	cmp	w0, w7
-	bcs	.L1399
+	bcs	.L1407
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L1400
+	cbnz	w0, .L1408
 	ldr	w0, [x5, 2584]
 	ldr	w1, [x5, 2580]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1401
-.L1400:
+	bcs	.L1409
+.L1408:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x19, 3232]
-.L1402:
+.L1410:
 	bl	FtlReadRefresh
-.L1477:
+.L1485:
 	add	x21, x21, :lo12:.LANCHOR3
-	b	.L1478
-.L1401:
+	b	.L1486
+.L1409:
 	mov	w0, 18
 	strh	w0, [x5, 3232]
-	b	.L1402
-.L1399:
+	b	.L1410
+.L1407:
 	add	x21, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x21, 124]
-	cbnz	w0, .L1456
+	cbnz	w0, .L1464
 	ldrh	w6, [x5, 2652]
 	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
@@ -9913,55 +9966,55 @@ rk_ftl_garbage_collect:
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L1404
+	ble	.L1412
 	sub	w6, w6, #1
 	cmp	w7, w6
-	blt	.L1404
+	blt	.L1412
 	bl	FtlReadRefresh
-.L1478:
+.L1486:
 	ldrh	w0, [x21, 124]
-	b	.L1372
-.L1404:
-	cbnz	w1, .L1456
+	b	.L1380
+.L1412:
+	cbnz	w1, .L1464
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, 1
-	b	.L1372
-.L1407:
+	b	.L1380
+.L1415:
 	ldrh	w1, [x0, 3320]
 	cmp	w1, w20
-	beq	.L1408
+	beq	.L1416
 	ldr	x2, [x0, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1409
+	cbnz	w1, .L1417
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-.L1409:
+.L1417:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3320]
 	strh	w1, [x0, 2672]
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-	b	.L1408
-.L1412:
+	b	.L1416
+.L1420:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	w0, [x19, 2672]
-.L1479:
+.L1487:
 	adrp	x0, .LANCHOR3+124
 	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
-	b	.L1372
-.L1416:
+	b	.L1380
+.L1424:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1417
+	cbz	w0, .L1425
 	strh	w5, [x22, 3240]
-	b	.L1415
-.L1417:
+	b	.L1423
+.L1425:
 	ldrh	w4, [x22, 36]
 	ubfiz	x1, x6, 1, 16
 	ldrh	w0, [x22, 106]
@@ -9972,69 +10025,69 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	sdiv	w4, w0, w25
 	cmp	w3, w4
-	bgt	.L1419
+	bgt	.L1427
 	cmp	w5, 48
-	bls	.L1420
+	bls	.L1428
 	cmp	w3, 8
-	bls	.L1420
+	bls	.L1428
 	ldrh	w3, [x22, 3292]
 	cmp	w3, 35
-	bhi	.L1420
-.L1419:
+	bhi	.L1428
+.L1427:
 	strh	wzr, [x22, 3240]
-.L1420:
+.L1428:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1421
+	bgt	.L1429
 	cmp	w20, w23
-	bne	.L1421
+	bne	.L1429
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	wzr, [x19, 3240]
 	strh	w0, [x19, 2672]
-	b	.L1479
-.L1421:
-	cbnz	w1, .L1422
+	b	.L1487
+.L1429:
+	cbnz	w1, .L1430
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x22, 3240]
 	add	w0, w0, 1
 	strh	w0, [x22, 3240]
-	b	.L1415
-.L1422:
+	b	.L1423
+.L1430:
 	add	x0, x19, :lo12:.LANCHOR0
 	strb	wzr, [x0, 2680]
 	ldrh	w0, [x0, 2424]
 	cmp	w0, w6
-	bne	.L1423
+	bne	.L1431
 	adrp	x0, .LC1
 	mov	w2, 658
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1423:
+	bl	sftl_printk
+.L1431:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2472]
 	cmp	w1, w0
-	bne	.L1424
+	bne	.L1432
 	adrp	x0, .LC1
 	mov	w2, 659
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1424:
+	bl	sftl_printk
+.L1432:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2520]
 	cmp	w1, w0
-	bne	.L1425
+	bne	.L1433
 	adrp	x0, .LC1
 	mov	w2, 660
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1425:
+	bl	sftl_printk
+.L1433:
 	add	x23, x19, :lo12:.LANCHOR0
 	add	x22, x23, 2672
 	mov	x0, x22
@@ -10048,7 +10101,7 @@ rk_ftl_garbage_collect:
 	strh	w1, [x0, 128]
 	strh	wzr, [x23, 2674]
 	strb	wzr, [x23, 2678]
-.L1414:
+.L1422:
 	bl	FtlReadRefresh
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 1
@@ -10057,14 +10110,14 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, 2674]
 	add	w1, w0, w21
 	cmp	w1, w26
-	ble	.L1426
+	ble	.L1434
 	sub	w21, w26, w0
 	and	w21, w21, 65535
-.L1426:
+.L1434:
 	mov	w25, 0
-.L1427:
+.L1435:
 	cmp	w21, w25, uxth
-	bls	.L1435
+	bls	.L1443
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w23, 0
 	add	x3, x0, 2688
@@ -10073,11 +10126,11 @@ rk_ftl_garbage_collect:
 	ldrh	w4, [x0, 2674]
 	ldrh	w7, [x0, 36]
 	add	w4, w4, w25
-	b	.L1436
-.L1429:
+	b	.L1444
+.L1437:
 	ldrh	w2, [x3]
 	cmp	w2, w6
-	beq	.L1428
+	beq	.L1436
 	ldr	x5, [x0, 3280]
 	ubfiz	x8, x23, 5, 16
 	add	w23, w23, 1
@@ -10085,13 +10138,13 @@ rk_ftl_garbage_collect:
 	add	x5, x5, x8
 	and	w23, w23, 65535
 	str	w2, [x5, 4]
-.L1428:
+.L1436:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-.L1436:
+.L1444:
 	cmp	w1, w7
-	bne	.L1429
+	bne	.L1437
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w1, w23
 	mov	x27, 0
@@ -10100,32 +10153,32 @@ rk_ftl_garbage_collect:
 	bl	FlashReadPages
 	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 104]
-.L1430:
+.L1438:
 	ldr	x0, [x29, 104]
 	cmp	x27, x0
-	bne	.L1434
+	bne	.L1442
 	add	w25, w25, 1
-	b	.L1427
-.L1434:
+	b	.L1435
+.L1442:
 	ldr	x0, [x22, 3280]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	beq	.L1431
+	beq	.L1439
 	ldr	x23, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1431
+	bne	.L1439
 	ldr	w28, [x23, 8]
 	cmn	w28, #1
-	bne	.L1432
+	bne	.L1440
 	adrp	x0, .LC1
 	mov	w2, 696
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1432:
+	bl	sftl_printk
+.L1440:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w28
@@ -10135,7 +10188,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x27
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1431
+	bne	.L1439
 	adrp	x28, .LANCHOR3
 	add	x2, x28, :lo12:.LANCHOR3
 	ldr	w0, [x0, 24]
@@ -10175,21 +10228,21 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x22, 2527]
 	ldr	w0, [x22, 3248]
 	cmp	w1, w0
-	beq	.L1433
+	beq	.L1441
 	ldrh	w0, [x22, 2524]
-	cbnz	w0, .L1431
-.L1433:
+	cbnz	w0, .L1439
+.L1441:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1431
+	cbz	w0, .L1439
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x28, x28, :lo12:.LANCHOR3
 	str	wzr, [x19, 4000]
 	ldrh	w0, [x28, 124]
-	b	.L1372
-.L1431:
+	b	.L1380
+.L1439:
 	add	x27, x27, 32
-	b	.L1430
-.L1435:
+	b	.L1438
+.L1443:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2674]
 	add	w21, w21, w0
@@ -10197,57 +10250,57 @@ rk_ftl_garbage_collect:
 	strh	w21, [x1, 2674]
 	cmp	w26, w21
 	adrp	x21, .LANCHOR3
-	bls	.L1437
+	bls	.L1445
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w1, [x0, 126]
 	ldrh	w0, [x0, 128]
 	cmp	w1, w0
-	bne	.L1438
-.L1437:
+	bne	.L1446
+.L1445:
 	add	x22, x19, :lo12:.LANCHOR0
 	ldr	w0, [x22, 3248]
-	cbz	w0, .L1439
+	cbz	w0, .L1447
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1439
+	cbz	w0, .L1447
 	str	wzr, [x22, 4000]
-	b	.L1477
-.L1439:
+	b	.L1485
+.L1447:
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, 126]
-	cbnz	w0, .L1440
+	cbnz	w0, .L1448
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2672]
 	ldr	x2, [x1, 2376]
 	lsl	x0, x0, 1
 	ldrh	w3, [x2, x0]
-	cbz	w3, .L1440
+	cbz	w3, .L1448
 	strh	wzr, [x2, x0]
 	ldrh	w0, [x1, 2672]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1440:
+.L1448:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L1438:
+.L1446:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 2
-	bhi	.L1441
+	bhi	.L1449
 	ldrh	w21, [x1, 106]
-	b	.L1413
-.L1441:
+	b	.L1421
+.L1449:
 	add	x21, x21, :lo12:.LANCHOR3
 	str	wzr, [x1, 4000]
 	ldrh	w1, [x21, 124]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1372
-.L1444:
+	b	.L1380
+.L1452:
 	mov	w0, 0
-	b	.L1372
+	b	.L1380
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
 	.global	sftl_gc
@@ -10277,13 +10330,13 @@ FtlRead:
 	mov	w27, w2
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	bne	.L1483
+	bne	.L1491
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1482:
+.L1490:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10292,7 +10345,7 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1483:
+.L1491:
 	add	w0, w1, w2
 	str	w0, [x29, 128]
 	adrp	x0, .LANCHOR0
@@ -10301,11 +10354,11 @@ FtlRead:
 	str	x0, [x29, 96]
 	ldr	w1, [x25, 144]
 	cmp	w2, w1
-	bhi	.L1503
+	bhi	.L1511
 	adrp	x0, .LANCHOR2
 	ldr	w21, [x0, #:lo12:.LANCHOR2]
 	cmn	w21, #1
-	beq	.L1482
+	beq	.L1490
 	bl	FtlCacheWriteBack
 	mov	w28, 0
 	ldrh	w0, [x25, 62]
@@ -10322,42 +10375,42 @@ FtlRead:
 	add	w22, w22, 1
 	add	w0, w0, w22
 	str	w0, [x25, 2588]
-.L1485:
-	cbnz	w22, .L1501
+.L1493:
+	cbnz	w22, .L1509
 	ldr	x0, [x29, 96]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3324]
-	cbnz	w1, .L1502
+	cbnz	w1, .L1510
 	ldrh	w0, [x0, 2416]
 	cmp	w0, 31
-	bhi	.L1482
-.L1502:
+	bhi	.L1490
+.L1510:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1482
-.L1501:
+	b	.L1490
+.L1509:
 	add	x1, x29, 156
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 156]
 	cmn	w1, #1
-	bne	.L1486
+	bne	.L1494
 	mov	w5, 0
-.L1487:
+.L1495:
 	ldrh	w0, [x25, 62]
 	cmp	w5, w0
-	bcc	.L1489
-.L1490:
+	bcc	.L1497
+.L1498:
 	add	w20, w20, 1
 	subs	w22, w22, #1
-	beq	.L1494
+	beq	.L1502
 	ldrh	w0, [x25, 36]
 	cmp	w28, w0, lsl 2
-	bne	.L1485
-.L1494:
-	cbz	w28, .L1485
+	bne	.L1493
+.L1502:
+	cbz	w28, .L1493
 	ldr	x0, [x25, 4016]
 	mov	w1, w28
 	mov	w2, 0
@@ -10374,54 +10427,54 @@ FtlRead:
 	ubfiz	x0, x28, 5, 32
 	mov	x28, 0
 	str	x0, [x29, 104]
-.L1500:
+.L1508:
 	ldr	x0, [x25, 4016]
 	add	x0, x0, x28
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1496
+	bne	.L1504
 	ldr	x1, [x0, 8]
 	ldr	x0, [x25, 3992]
 	cmp	x1, x0
-	bne	.L1497
+	bne	.L1505
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 116]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1513:
+.L1521:
 	bl	ftl_memcpy
-.L1497:
+.L1505:
 	ldr	x0, [x25, 4016]
 	add	x1, x0, x28
 	ldr	w2, [x0, x28]
 	cmn	w2, #1
-	bne	.L1498
+	bne	.L1506
 	ldr	w0, [x25, 2792]
 	mov	w21, w2
 	add	w0, w0, 1
 	str	w0, [x25, 2792]
-.L1498:
+.L1506:
 	ldr	w0, [x1]
 	cmp	w0, 256
-	bne	.L1499
+	bne	.L1507
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1499:
+.L1507:
 	ldr	x0, [x29, 104]
 	add	x28, x28, 32
 	cmp	x0, x28
-	bne	.L1500
+	bne	.L1508
 	mov	w28, 0
-	b	.L1485
-.L1489:
+	b	.L1493
+.L1497:
 	madd	w0, w20, w0, w5
 	cmp	w19, w0
-	bhi	.L1488
+	bhi	.L1496
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bls	.L1488
+	bls	.L1496
 	sub	w0, w0, w19
 	str	w5, [x29, 120]
 	lsl	w0, w0, 9
@@ -10430,17 +10483,17 @@ FtlRead:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	w5, [x29, 120]
-.L1488:
+.L1496:
 	add	w5, w5, 1
-	b	.L1487
-.L1486:
+	b	.L1495
+.L1494:
 	ldr	x0, [x25, 4016]
 	ubfiz	x2, x28, 5, 32
 	cmp	w20, w26
 	add	x0, x0, x2
 	str	w1, [x0, 4]
 	ldrh	w0, [x25, 62]
-	bne	.L1491
+	bne	.L1499
 	ldr	x1, [x25, 4016]
 	ldr	x5, [x25, 3992]
 	add	x1, x1, x2
@@ -10453,9 +10506,9 @@ FtlRead:
 	csel	w3, w27, w5, ls
 	str	w3, [x29, 136]
 	cmp	w3, w0
-	bne	.L1492
+	bne	.L1500
 	str	x23, [x1, 8]
-.L1492:
+.L1500:
 	ldr	x0, [x25, 4016]
 	ldr	x1, [x25, 3984]
 	add	x2, x0, x2
@@ -10466,10 +10519,10 @@ FtlRead:
 	and	x0, x0, 4294967292
 	add	x0, x1, x0
 	str	x0, [x2, 16]
-	b	.L1490
-.L1491:
+	b	.L1498
+.L1499:
 	cmp	w20, w24
-	bne	.L1493
+	bne	.L1501
 	ldr	x5, [x25, 4016]
 	ldr	x1, [x25, 3976]
 	add	x5, x5, x2
@@ -10479,13 +10532,13 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 132]
 	cmp	w0, w3
-	bne	.L1492
+	bne	.L1500
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x5, 8]
-	b	.L1492
-.L1493:
+	b	.L1500
+.L1501:
 	ldr	x1, [x25, 4016]
 	mul	w0, w0, w20
 	add	x1, x1, x2
@@ -10493,24 +10546,24 @@ FtlRead:
 	lsl	w0, w0, 9
 	add	x0, x23, x0
 	str	x0, [x1, 8]
-	b	.L1492
-.L1496:
+	b	.L1500
+.L1504:
 	cmp	w24, w1
-	bne	.L1497
+	bne	.L1505
 	ldr	x1, [x0, 8]
 	ldr	x0, [x25, 3976]
 	cmp	x1, x0
-	bne	.L1497
+	bne	.L1505
 	ldrh	w0, [x25, 62]
 	ldr	w2, [x29, 112]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1513
-.L1503:
+	b	.L1521
+.L1511:
 	mov	w21, -1
-	b	.L1482
+	b	.L1490
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
@@ -10542,12 +10595,12 @@ FtlWrite:
 	mov	x27, x3
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1517
+	bne	.L1525
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w23, 256
 	bl	FtlVendorPartWrite
-.L1516:
+.L1524:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10555,18 +10608,18 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1517:
+.L1525:
 	add	w3, w1, w2
 	adrp	x20, .LANCHOR0
 	add	x2, x20, :lo12:.LANCHOR0
 	ldr	w0, [x2, 144]
 	cmp	w3, w0
-	bhi	.L1559
+	bhi	.L1567
 	adrp	x1, .LANCHOR2
 	str	x1, [x29, 136]
 	ldr	w0, [x1, #:lo12:.LANCHOR2]
 	cmn	w0, #1
-	beq	.L1516
+	beq	.L1524
 	ldrh	w1, [x2, 62]
 	adrp	x4, .LANCHOR3
 	sub	w3, w3, #1
@@ -10583,56 +10636,56 @@ FtlWrite:
 	add	w25, w24, 1
 	add	w0, w0, w25
 	str	w0, [x2, 2596]
-	cbz	x3, .L1519
+	cbz	x3, .L1527
 	ldr	w0, [x3, 24]
 	cmp	w22, w0
-	beq	.L1520
+	beq	.L1528
 	bl	FtlCacheWriteBack
-.L1519:
+.L1527:
 	ldr	x0, [x29, 136]
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
-	cbz	w0, .L1561
+	cbz	w0, .L1569
 	ldrh	w1, [x19, 2428]
 	add	x0, x19, 2424
 	add	x19, x19, 2472
 	cmp	w1, 0
 	csel	x19, x19, x0, eq
-.L1522:
+.L1530:
 	adrp	x0, .LANCHOR1
 	mov	w21, w22
 	add	x0, x0, :lo12:.LANCHOR1
 	add	x0, x0, 672
 	str	x0, [x29, 160]
-.L1523:
-	cbz	w25, .L1557
+.L1531:
+	cbz	w25, .L1565
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1524
+	bcc	.L1532
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1012
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1524:
+	bl	sftl_printk
+.L1532:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1525
+	cbnz	w0, .L1533
 	bl	FtlCacheWriteBack
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x0, 2424
 	cmp	x19, x1
-	bne	.L1526
+	bne	.L1534
 	add	x0, x0, 2472
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1527
+	cbnz	w1, .L1535
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-.L1527:
+.L1535:
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x24, x19, 2424
 	add	x19, x19, 2472
@@ -10643,12 +10696,12 @@ FtlWrite:
 	ldr	w0, [x0, 8]
 	cmp	w0, 0
 	csel	x19, x19, x24, ne
-.L1528:
+.L1536:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1525
+	cbnz	w0, .L1533
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1525:
+.L1533:
 	ldrh	w0, [x19, 4]
 	ldrb	w1, [x19, 7]
 	cmp	w0, w25
@@ -10661,29 +10714,29 @@ FtlWrite:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1529
+	bcc	.L1537
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1045
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1529:
+	bl	sftl_printk
+.L1537:
 	str	xzr, [x29, 168]
-.L1530:
+.L1538:
 	ldr	w1, [x29, 132]
 	ldr	w28, [x29, 168]
 	cmp	w28, w1
-	bcc	.L1551
+	bcc	.L1559
 	mov	x28, x1
-.L1531:
+.L1539:
 	ldr	x0, [x29, 104]
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	x0, [x0, -56]
-	cbz	x0, .L1552
+	cbz	x0, .L1560
 	sub	w25, w25, #1
 	subs	w28, w28, #1
-	bne	.L1552
-.L1557:
+	bne	.L1560
+.L1565:
 	ldr	w0, [x29, 148]
 	add	x20, x20, :lo12:.LANCHOR0
 	sub	w1, w0, w22
@@ -10691,20 +10744,20 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x20, 2416]
 	cmp	w0, 15
-	bhi	.L1554
+	bhi	.L1562
 	mov	w21, 65535
 	mov	w19, 128
-.L1577:
+.L1585:
 	ldrh	w0, [x20, 2672]
 	cmp	w0, w21
-	bne	.L1558
+	bne	.L1566
 	ldrh	w0, [x20, 3320]
 	cmp	w0, w21
-	bne	.L1558
+	bne	.L1566
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1558:
+.L1566:
 	mov	w1, 1
 	strh	w19, [x20, 3234]
 	mov	w0, w1
@@ -10715,9 +10768,9 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x20, 2416]
 	cmp	w0, 8
-	bls	.L1577
-	b	.L1554
-.L1520:
+	bls	.L1585
+	b	.L1562
+.L1528:
 	ldr	w0, [x2, 2600]
 	ldr	x3, [x3, 8]
 	add	w0, w0, 1
@@ -10732,36 +10785,36 @@ FtlWrite:
 	mov	x1, x27
 	mov	w2, w21
 	bl	ftl_memcpy
-	cbnz	w24, .L1521
-.L1554:
+	cbnz	w24, .L1529
+.L1562:
 	mov	w0, 0
-	b	.L1516
-.L1521:
+	b	.L1524
+.L1529:
 	sub	w26, w26, w19
 	add	w23, w23, w19
 	add	x27, x27, x21
 	add	w22, w22, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w24
-	b	.L1519
-.L1561:
+	b	.L1527
+.L1569:
 	add	x19, x19, 2424
-	b	.L1522
-.L1526:
+	b	.L1530
+.L1534:
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1564
+	cbnz	w0, .L1572
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1528
-.L1564:
+	b	.L1536
+.L1572:
 	mov	x19, x1
-	b	.L1525
-.L1551:
+	b	.L1533
+.L1559:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1531
+	cbz	w0, .L1539
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w21
@@ -10794,9 +10847,9 @@ FtlWrite:
 	cmp	w21, w22
 	ldr	x3, [x29, 152]
 	ccmp	w21, w0, 4, ne
-	bne	.L1532
+	bne	.L1540
 	cmp	w21, w22
-	bne	.L1533
+	bne	.L1541
 	ldrh	w2, [x3, 62]
 	udiv	w0, w23, w2
 	msub	w0, w0, w2, w23
@@ -10805,29 +10858,29 @@ FtlWrite:
 	cmp	w2, w26
 	csel	w0, w2, w26, ls
 	str	w0, [x29, 152]
-.L1534:
+.L1542:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w2, [x29, 152]
 	ldrh	w1, [x0, 62]
 	cmp	w2, w1
-	bne	.L1535
+	bne	.L1543
 	ldr	x0, [x0, 4032]
 	cmp	w21, w22
 	add	x24, x0, x24
-	bne	.L1536
+	bne	.L1544
 	str	x27, [x24, 8]
-.L1537:
+.L1545:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1548
+	bcc	.L1556
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1119
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1548:
+	bl	sftl_printk
+.L1556:
 	ldp	x1, x2, [x29, 112]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -10846,35 +10899,35 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1530
-.L1533:
+	b	.L1538
+.L1541:
 	ldrh	w0, [x3, 62]
 	add	w2, w23, w26
 	str	wzr, [x29, 144]
 	msub	w2, w21, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 152]
-	b	.L1534
-.L1536:
+	b	.L1542
+.L1544:
 	ldr	w0, [x29, 152]
-.L1580:
+.L1588:
 	mul	w0, w0, w21
 	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x27, x0
 	str	x0, [x24, 8]
-	b	.L1537
-.L1535:
+	b	.L1545
+.L1543:
 	ldr	x1, [x0, 4032]
 	cmp	w21, w22
 	add	x1, x1, x24
-	bne	.L1538
+	bne	.L1546
 	ldr	x0, [x0, 3992]
-.L1579:
+.L1587:
 	str	x0, [x1, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1540
+	beq	.L1548
 	add	x3, x20, :lo12:.LANCHOR0
 	str	w0, [x29, 196]
 	str	w21, [x29, 216]
@@ -10890,16 +10943,16 @@ FtlWrite:
 	ldr	w0, [x29, 192]
 	ldr	x3, [x29, 96]
 	cmn	w0, #1
-	bne	.L1541
+	bne	.L1549
 	ldr	w0, [x3, 2792]
 	add	w0, w0, 1
 	str	w0, [x3, 2792]
-.L1544:
+.L1552:
 	ldr	w0, [x29, 152]
 	cmp	w21, w22
 	lsl	w2, w0, 9
 	add	x0, x20, :lo12:.LANCHOR0
-	bne	.L1545
+	bne	.L1553
 	ldr	x1, [x0, 4032]
 	ldr	w0, [x29, 144]
 	add	x1, x1, x24
@@ -10910,10 +10963,10 @@ FtlWrite:
 	bl	ftl_memcpy
 	ldr	w0, [x29, 148]
 	cmp	w21, w0
-	bne	.L1537
-.L1546:
+	bne	.L1545
+.L1554:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1537
+	cbz	w0, .L1545
 	ldr	x0, [x29, 104]
 	add	x1, x0, :lo12:.LANCHOR3
 	add	x0, x20, :lo12:.LANCHOR0
@@ -10921,33 +10974,33 @@ FtlWrite:
 	str	x19, [x1, 112]
 	add	x24, x0, x24
 	str	x24, [x1, -56]
-	b	.L1537
-.L1538:
+	b	.L1545
+.L1546:
 	ldr	x0, [x0, 3976]
-	b	.L1579
-.L1541:
+	b	.L1587
+.L1549:
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1543
+	beq	.L1551
 	ldr	w0, [x3, 2792]
 	mov	w2, w21
 	add	w0, w0, 1
 	str	w0, [x3, 2792]
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x28, 8]
-	bl	printk
-.L1543:
+	bl	sftl_printk
+.L1551:
 	ldr	w0, [x28, 8]
 	cmp	w21, w0
-	beq	.L1544
+	beq	.L1552
 	ldr	x1, [x29, 160]
 	mov	w2, 1098
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-	b	.L1544
-.L1540:
+	bl	sftl_printk
+	b	.L1552
+.L1548:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldr	x0, [x1, 4032]
 	ldrh	w2, [x1, 114]
@@ -10955,8 +11008,8 @@ FtlWrite:
 	add	x0, x0, x24
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1544
-.L1545:
+	b	.L1552
+.L1553:
 	ldrh	w1, [x0, 62]
 	ldr	x0, [x0, 4032]
 	add	x0, x0, x24
@@ -10966,13 +11019,13 @@ FtlWrite:
 	lsl	w1, w1, 9
 	add	x1, x27, x1
 	bl	ftl_memcpy
-	b	.L1546
-.L1532:
+	b	.L1554
+.L1540:
 	ldr	x0, [x3, 4032]
 	add	x24, x0, x24
 	ldrh	w0, [x3, 62]
-	b	.L1580
-.L1552:
+	b	.L1588
+.L1560:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	x3, x19
 	mov	w2, 0
@@ -10980,18 +11033,18 @@ FtlWrite:
 	ldr	x0, [x0, 4032]
 	bl	FtlProgPages
 	cmp	w25, w28
-	bcs	.L1555
+	bcs	.L1563
 	ldr	x1, [x29, 160]
 	adrp	x0, .LC1
 	mov	w2, 1134
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1555:
+	bl	sftl_printk
+.L1563:
 	sub	w25, w25, w28
-	b	.L1523
-.L1559:
+	b	.L1531
+.L1567:
 	mov	w0, -1
-	b	.L1516
+	b	.L1524
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
@@ -11031,16 +11084,16 @@ FtlLoadSysInfo:
 	ldrh	w0, [x19, 2656]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1584
-.L1592:
+	bne	.L1592
+.L1600:
 	mov	w0, -1
-.L1583:
+.L1591:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1584:
+.L1592:
 	add	x23, x19, 2656
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -11050,30 +11103,30 @@ FtlLoadSysInfo:
 	strh	w0, [x23, 2]
 	mov	w23, 19539
 	movk	w23, 0x4654, lsl 16
-.L1586:
-	tbz	w22, #31, .L1589
+.L1594:
+	tbz	w22, #31, .L1597
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1437
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1588:
+	bl	sftl_printk
+.L1596:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 44]
 	ldrh	w1, [x1, 114]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1591
+	bcs	.L1599
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1439
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1591:
+	bl	sftl_printk
+.L1599:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w2, 48
 	add	x21, x19, 2312
@@ -11100,13 +11153,13 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1592
+	bne	.L1600
 	ldrh	w1, [x19, 2320]
 	ldrb	w2, [x19, 2322]
 	ldrh	w0, [x19, 58]
 	strh	w1, [x19, 2662]
 	cmp	w2, w0
-	bne	.L1592
+	bne	.L1600
 	adrp	x0, .LANCHOR3+136
 	ldrh	w2, [x19, 62]
 	ldrh	w3, [x19, 36]
@@ -11123,15 +11176,15 @@ FtlLoadSysInfo:
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	strh	w0, [x19, 2652]
-	bls	.L1593
+	bls	.L1601
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 1461
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
-	bl	printk
-.L1593:
+	bl	sftl_printk
+.L1601:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w3, -1
 	ldrh	w2, [x0, 2328]
@@ -11177,50 +11230,50 @@ FtlLoadSysInfo:
 	ldr	w2, [x0, 2620]
 	str	wzr, [x0, 2600]
 	cmp	w1, w2
-	bls	.L1594
+	bls	.L1602
 	str	w1, [x0, 2620]
-.L1594:
+.L1602:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2348]
 	ldr	w2, [x0, 2624]
 	cmp	w1, w2
-	bls	.L1595
+	bls	.L1603
 	str	w1, [x0, 2624]
-.L1595:
+.L1603:
 	mov	w0, 65535
 	cmp	w4, w0
-	beq	.L1596
+	beq	.L1604
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x0, x0, 2424
 	bl	make_superblock
-.L1596:
+.L1604:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2472
 	ldrh	w2, [x1, 2472]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1597
+	beq	.L1605
 	bl	make_superblock
-.L1597:
+.L1605:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2520
 	ldrh	w2, [x1, 2520]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1598
+	beq	.L1606
 	bl	make_superblock
-.L1598:
+.L1606:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
 	add	x0, x20, 2672
 	ldrh	w2, [x20, 2672]
 	cmp	w2, w1
-	beq	.L1599
+	beq	.L1607
 	bl	make_superblock
-.L1599:
+.L1607:
 	mov	w0, 0
-	b	.L1583
-.L1589:
+	b	.L1591
+.L1597:
 	ldrh	w0, [x19, 2656]
 	mov	w2, 1
 	mov	w1, w2
@@ -11232,19 +11285,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1587
+	beq	.L1595
 	ldr	x0, [x19, 3432]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1587
+	bne	.L1595
 	ldr	x0, [x19, 3440]
 	ldrh	w0, [x0]
 	cmp	w0, w24
-	beq	.L1588
-.L1587:
+	beq	.L1596
+.L1595:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1586
+	b	.L1594
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	2
 	.global	FtlSysBlkInit
@@ -11266,20 +11319,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x19, 2656]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1606
-.L1608:
+	bne	.L1614
+.L1616:
 	mov	w24, -1
-.L1605:
+.L1613:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1606:
+.L1614:
 	bl	FtlLoadSysInfo
 	mov	w24, w0
-	cbnz	w0, .L1608
+	cbnz	w0, .L1616
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11293,19 +11346,19 @@ FtlSysBlkInit:
 	mov	w0, 0
 	ldrh	w3, [x19, 142]
 	add	x1, x1, 4
-.L1609:
+.L1617:
 	cmp	w0, w3
-	bge	.L1614
+	bge	.L1622
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L1610
-.L1614:
+	tbz	w2, #31, .L1618
+.L1622:
 	add	x1, x20, :lo12:.LANCHOR0
 	cmp	w0, w3
 	ldrh	w2, [x1, 2340]
 	add	w2, w2, 1
 	strh	w2, [x1, 2340]
-	bge	.L1620
-.L1611:
+	bge	.L1628
+.L1619:
 	add	x19, x20, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR3
 	add	x23, x19, 2424
@@ -11346,26 +11399,26 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1615
-.L1610:
+	b	.L1623
+.L1618:
 	add	w0, w0, 1
-	b	.L1609
-.L1620:
+	b	.L1617
+.L1628:
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, -32]
-	cbnz	w0, .L1611
-.L1615:
+	cbnz	w0, .L1619
+.L1623:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
 	add	x22, x19, 2424
 	ldrh	w0, [x19, 2424]
 	cmp	w0, w1
-	beq	.L1616
+	beq	.L1624
 	ldrh	w1, [x19, 2428]
-	cbnz	w1, .L1616
+	cbnz	w1, .L1624
 	ldrh	w1, [x19, 2476]
 	add	x21, x19, 2472
-	cbnz	w1, .L1616
+	cbnz	w1, .L1624
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x19, 2472]
 	bl	FtlGcRefreshBlock
@@ -11373,13 +11426,13 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.L1616:
+.L1624:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20, 2340]
 	tst	x0, 31
-	bne	.L1605
+	bne	.L1613
 	bl	FtlVpcCheckAndModify
-	b	.L1605
+	b	.L1613
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
@@ -11397,36 +11450,36 @@ ftl_low_format:
 	ldrh	w0, [x0, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1623
+	cbz	w0, .L1631
 	bl	FtlMakeBbt
-.L1623:
+.L1631:
 	mov	w4, 23752
 	add	x1, x20, :lo12:.LANCHOR0
 	mov	w0, 0
 	movk	w4, 0xa0f, lsl 16
-.L1624:
+.L1632:
 	ldrh	w2, [x1, 62]
 	cmp	w0, w2, lsl 7
-	blt	.L1625
+	blt	.L1633
 	ldrh	w21, [x1, 44]
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1626:
+.L1634:
 	ldrh	w0, [x22, 46]
 	cmp	w0, w21
-	bhi	.L1627
+	bhi	.L1635
 	ldrh	w0, [x22, 36]
 	sub	w1, w19, #3
 	cmp	w1, w0, lsl 1
-	bge	.L1628
-.L1632:
+	bge	.L1636
+.L1640:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w21, 0
 	mov	w22, 0
-.L1629:
+.L1637:
 	ldrh	w0, [x19, 44]
 	cmp	w0, w22
-	bhi	.L1633
+	bhi	.L1641
 	ldrh	w2, [x19, 36]
 	ldr	w1, [x19, 48]
 	ldrh	w0, [x19, 46]
@@ -11439,28 +11492,28 @@ ftl_low_format:
 	mov	w0, 24
 	mul	w0, w2, w0
 	cmp	w21, w0
-	ble	.L1634
+	ble	.L1642
 	sub	w1, w1, w21
 	udiv	w1, w1, w2
 	str	w1, [x19, 2584]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x19, 2652]
-.L1634:
+.L1642:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 98]
-	cbz	w1, .L1636
+	cbz	w1, .L1644
 	ldrh	w5, [x0, 2652]
 	add	w5, w5, w1, lsr 1
 	strh	w5, [x0, 2652]
 	mul	w5, w1, w2
 	cmp	w21, w5
-	bge	.L1636
+	bge	.L1644
 	add	w1, w1, 32
 	str	w4, [x0, 2584]
 	add	w1, w3, w1
 	strh	w1, [x0, 2652]
-.L1636:
+.L1644:
 	add	x19, x20, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR3
 	add	x21, x19, 2424
@@ -11498,20 +11551,20 @@ ftl_low_format:
 	strh	wzr, [x19, 2424]
 	str	wzr, [x19, 2580]
 	bl	ftl_memset
-.L1638:
+.L1646:
 	mov	x0, x21
 	bl	make_superblock
 	ldrb	w1, [x21, 7]
 	ldrh	w0, [x21]
-	cbnz	w1, .L1639
+	cbnz	w1, .L1647
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x21]
 	add	w0, w0, 1
 	strh	w0, [x21]
-	b	.L1638
-.L1625:
+	b	.L1646
+.L1633:
 	ldr	x5, [x1, 3992]
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
@@ -11521,8 +11574,8 @@ ftl_low_format:
 	str	w2, [x5, x3]
 	ldr	x2, [x1, 3976]
 	str	w4, [x2, x3]
-	b	.L1624
-.L1627:
+	b	.L1632
+.L1635:
 	mov	w0, w21
 	mov	w1, 1
 	add	w21, w21, 1
@@ -11530,8 +11583,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w21, w21, 65535
 	and	w19, w19, 65535
-	b	.L1626
-.L1628:
+	b	.L1634
+.L1636:
 	udiv	w0, w19, w0
 	ldr	w19, [x22, 136]
 	add	x21, x20, :lo12:.LANCHOR0
@@ -11540,17 +11593,17 @@ ftl_low_format:
 	ldrh	w0, [x22, 40]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x22, 44]
-.L1630:
+.L1638:
 	ldrh	w0, [x21, 46]
 	cmp	w0, w19
-	bls	.L1632
+	bls	.L1640
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1630
-.L1633:
+	b	.L1638
+.L1641:
 	mov	w0, w22
 	mov	w1, 0
 	add	w22, w22, 1
@@ -11558,8 +11611,8 @@ ftl_low_format:
 	add	w21, w21, w0
 	and	w22, w22, 65535
 	and	w21, w21, 65535
-	b	.L1629
-.L1639:
+	b	.L1637
+.L1647:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x21, 12]
@@ -11579,20 +11632,20 @@ ftl_low_format:
 	strb	w1, [x19, 2480]
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	x20, x0
-.L1640:
+.L1648:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w1, [x20, 7]
 	ldrh	w0, [x20]
-	cbnz	w1, .L1641
+	cbnz	w1, .L1649
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w21, [x1, x0]
 	ldrh	w0, [x20]
 	add	w0, w0, 1
 	strh	w0, [x20]
-	b	.L1640
-.L1641:
+	b	.L1648
+.L1649:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x20, 12]
@@ -11616,11 +11669,11 @@ ftl_low_format:
 	str	w0, [x19, 2620]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1642
+	cbnz	w0, .L1650
 	adrp	x0, .LANCHOR2
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR2]
-.L1642:
+.L1650:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -11644,7 +11697,7 @@ sftl_init:
 	str	w0, [x20, #:lo12:.LANCHOR2]
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
-	bl	printk
+	bl	sftl_printk
 	mov	x0, x19
 	bl	FtlConstantsInit
 	bl	FtlMemInit
@@ -11652,22 +11705,22 @@ sftl_init:
 	ldrh	w0, [x19, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1651
+	cbnz	w0, .L1659
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1651
+	cbnz	w0, .L1659
 	mov	w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 2416]
 	cmp	w0, 15
-	bhi	.L1651
+	bhi	.L1659
 	mov	w19, 8129
-.L1650:
+.L1658:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1650
-.L1651:
+	bne	.L1658
+.L1659:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11691,11 +11744,11 @@ rk_sftl_vendor_dev_ops_register:
 	adrp	x2, .LANCHOR3
 	add	x2, x2, :lo12:.LANCHOR3
 	ldr	x3, [x2, 144]
-	cbnz	x3, .L1658
+	cbnz	x3, .L1666
 	stp	x0, x1, [x2, 144]
 	mov	w0, 0
 	ret
-.L1658:
+.L1666:
 	mov	w0, -1
 	ret
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -11703,75 +11756,65 @@ rk_sftl_vendor_dev_ops_register:
 	.global	rk_sftl_vendor_storage_init
 	.type	rk_sftl_vendor_storage_init, %function
 rk_sftl_vendor_storage_init:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	mov	w0, 65536
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR3
 	stp	x21, x22, [sp, 32]
-	add	x21, x20, :lo12:.LANCHOR3
+	add	x22, x20, :lo12:.LANCHOR3
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
 	bl	ftl_malloc
-	str	x0, [x21, 160]
-	cbz	x0, .L1665
-	adrp	x25, .LC106
-	mov	w27, 22084
-	add	x25, x25, :lo12:.LC106
-	mov	w26, 0
+	str	x0, [x22, 160]
+	cbz	x0, .L1673
+	mov	w26, 22084
+	mov	w25, 0
 	mov	w24, 0
 	mov	w23, 0
-	movk	w27, 0x524b, lsl 16
-.L1663:
-	ldr	x3, [x21, 144]
+	movk	w26, 0x524b, lsl 16
+.L1671:
+	ldr	x3, [x22, 144]
 	mov	w1, 128
-	ldr	x2, [x21, 160]
+	ldr	x2, [x22, 160]
 	lsl	w0, w23, 7
 	blr	x3
-	mov	w22, w0
-	cbnz	w0, .L1661
-	ldr	x0, [x21, 160]
-	add	x1, x0, 61440
-	ldr	w3, [x0, 4]
-	ldr	w2, [x1, 4092]
-	ldr	w1, [x0]
-	mov	x0, x25
-	bl	printk
-	ldr	x19, [x21, 160]
+	mov	w21, w0
+	cbnz	w0, .L1669
+	ldr	x19, [x22, 160]
 	ldr	w0, [x19]
-	cmp	w0, w27
-	bne	.L1662
+	cmp	w0, w26
+	bne	.L1670
 	add	x0, x19, 61440
 	ldr	w1, [x19, 4]
 	ldr	w0, [x0, 4092]
 	cmp	w0, w1
-	bne	.L1662
+	bne	.L1670
 	cmp	w0, w24
-	bls	.L1662
-	mov	w26, w23
+	bls	.L1670
+	mov	w25, w23
 	mov	w24, w0
-.L1662:
+.L1670:
 	add	w23, w23, 1
 	cmp	w23, 2
-	bne	.L1663
-	cbz	w24, .L1664
+	bne	.L1671
+	cbz	w24, .L1672
 	add	x0, x20, :lo12:.LANCHOR3
 	mov	x2, x19
 	mov	w1, 128
 	ldr	x3, [x0, 144]
-	lsl	w0, w26, 7
+	lsl	w0, w25, 7
 	blr	x3
-	mov	w22, w0
-	cbz	w0, .L1659
-.L1661:
+	mov	w21, w0
+	cbz	w0, .L1667
+.L1669:
 	add	x20, x20, :lo12:.LANCHOR3
-	mov	w22, -1
+	mov	w21, -1
 	ldr	x0, [x20, 160]
 	bl	kfree
 	str	xzr, [x20, 160]
-	b	.L1659
-.L1664:
+	b	.L1667
+.L1672:
 	mov	w1, 0
 	mov	x2, 65536
 	mov	x0, x19
@@ -11784,18 +11827,17 @@ rk_sftl_vendor_storage_init:
 	str	w0, [x1, 4092]
 	mov	w0, -1032
 	strh	w0, [x19, 14]
-.L1659:
-	mov	w0, w22
-	ldr	x27, [sp, 80]
+.L1667:
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L1665:
-	mov	w22, -12
-	b	.L1659
+.L1673:
+	mov	w21, -12
+	b	.L1667
 	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
 	.align	2
 	.global	rk_sftl_vendor_read
@@ -11803,20 +11845,20 @@ rk_sftl_vendor_storage_init:
 rk_sftl_vendor_read:
 	adrp	x3, .LANCHOR3+160
 	ldr	x4, [x3, #:lo12:.LANCHOR3+160]
-	cbz	x4, .L1673
+	cbz	x4, .L1681
 	ldrh	w6, [x4, 10]
 	add	x5, x4, 16
 	mov	w3, 0
-.L1670:
+.L1678:
 	cmp	w3, w6
-	bcc	.L1672
-.L1673:
+	bcc	.L1680
+.L1681:
 	mov	w0, -1
 	ret
-.L1672:
+.L1680:
 	ldrh	w7, [x5], 8
 	cmp	w7, w0
-	bne	.L1671
+	bne	.L1679
 	stp	x29, x30, [sp, -32]!
 	add	x3, x4, x3, uxtw 3
 	mov	x0, x1
@@ -11834,9 +11876,9 @@ rk_sftl_vendor_read:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1671:
+.L1679:
 	add	w3, w3, 1
-	b	.L1670
+	b	.L1678
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
 	.global	rk_sftl_vendor_write
@@ -11852,7 +11894,7 @@ rk_sftl_vendor_write:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x19, [x3, 160]
-	cbz	x19, .L1693
+	cbz	x19, .L1701
 	add	w21, w2, 63
 	ldrh	w3, [x19, 10]
 	ldrh	w24, [x19, 8]
@@ -11861,12 +11903,12 @@ rk_sftl_vendor_write:
 	and	w21, w21, -64
 	add	x1, x19, 16
 	mov	w20, 0
-.L1680:
+.L1688:
 	cmp	w20, w3
-	bcc	.L1688
+	bcc	.L1696
 	ldrh	w1, [x19, 14]
 	cmp	w21, w1
-	bhi	.L1693
+	bhi	.L1701
 	add	x3, x19, x3, uxth 3
 	and	w21, w21, 65535
 	uxtw	x2, w28
@@ -11886,11 +11928,11 @@ rk_sftl_vendor_write:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-	b	.L1695
-.L1688:
+	b	.L1703
+.L1696:
 	ldrh	w6, [x1], 8
 	cmp	w6, w0
-	bne	.L1681
+	bne	.L1689
 	uxtw	x27, w20
 	add	x5, x19, 1024
 	add	x22, x19, x27, lsl 3
@@ -11898,17 +11940,17 @@ rk_sftl_vendor_write:
 	add	w25, w25, 63
 	and	w25, w25, -64
 	cmp	w28, w25
-	bls	.L1682
+	bls	.L1690
 	ldrh	w0, [x19, 14]
 	cmp	w21, w0
-	bhi	.L1693
+	bhi	.L1701
 	add	x27, x27, 2
 	ldrh	w22, [x22, 18]
 	add	x27, x19, x27, lsl 3
 	sub	w26, w3, #1
-.L1683:
+.L1691:
 	cmp	w20, w26
-	bcc	.L1684
+	bcc	.L1692
 	add	x20, x19, x20, uxtw 3
 	and	w22, w22, 65535
 	add	x0, x5, x22, uxth
@@ -11925,7 +11967,7 @@ rk_sftl_vendor_write:
 	sub	w21, w0, w21
 	add	w25, w21, w25
 	strh	w25, [x19, 14]
-.L1695:
+.L1703:
 	ldr	w0, [x19, 4]
 	add	x1, x19, 61440
 	add	x23, x23, :lo12:.LANCHOR3
@@ -11944,7 +11986,7 @@ rk_sftl_vendor_write:
 	lsl	w0, w24, 7
 	blr	x3
 	mov	w0, 0
-.L1678:
+.L1686:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11952,7 +11994,7 @@ rk_sftl_vendor_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1684:
+.L1692:
 	add	w20, w20, 1
 	str	x4, [x29, 104]
 	add	x0, x19, x20, uxtw 3
@@ -11976,21 +12018,21 @@ rk_sftl_vendor_write:
 	ldr	x4, [x29, 104]
 	add	w22, w22, w3
 	ldr	x5, [x29, 120]
-	b	.L1683
-.L1682:
+	b	.L1691
+.L1690:
 	ldrh	w0, [x22, 18]
 	uxtw	x2, w28
 	mov	x1, x4
 	add	x0, x5, x0
 	bl	memcpy
 	strh	w28, [x22, 20]
-	b	.L1695
-.L1681:
+	b	.L1703
+.L1689:
 	add	w20, w20, 1
-	b	.L1680
-.L1693:
+	b	.L1688
+.L1701:
 	mov	w0, -1
-	b	.L1678
+	b	.L1686
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
 	.global	rk_sftl_vendor_storage_ioctl
@@ -12004,19 +12046,19 @@ rk_sftl_vendor_storage_ioctl:
 	str	x21, [sp, 32]
 	mov	w21, w1
 	bl	ftl_malloc
-	cbz	x0, .L1710
+	cbz	x0, .L1718
 	mov	w1, 30209
 	mov	x19, x0
 	movk	w1, 0x4004, lsl 16
 	cmp	w21, w1
-	beq	.L1699
+	beq	.L1707
 	add	w1, w1, 1
 	cmp	w21, w1
-	beq	.L1700
-.L1720:
+	beq	.L1708
+.L1728:
 	mov	x20, -14
-	b	.L1698
-.L1699:
+	b	.L1706
+.L1707:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12029,34 +12071,34 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1706
+	cbz	x3, .L1714
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1720
+	cbnz	x0, .L1728
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	beq	.L1704
-.L1705:
+	beq	.L1712
+.L1713:
 	mov	x20, -1
-.L1698:
+.L1706:
 	mov	x0, x19
 	bl	kfree
-.L1696:
+.L1704:
 	mov	x0, x20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1704:
+.L1712:
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_read
 	cmn	w0, #1
-	beq	.L1705
+	beq	.L1713
 	strh	w0, [x19, 6]
 	and	x2, x0, 65535
 	add	x2, x2, 8
@@ -12067,14 +12109,14 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1720
+	cbz	x3, .L1728
 	mov	x0, x20
 	mov	x1, x19
 	mov	x20, 0
 	bl	__arch_copy_to_user
-	cbz	x0, .L1698
-	b	.L1720
-.L1700:
+	cbz	x0, .L1706
+	b	.L1728
+.L1708:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12087,19 +12129,19 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1706
+	cbz	x3, .L1714
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1720
+	cbnz	x0, .L1728
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	bne	.L1705
+	bne	.L1713
 	ldrh	w2, [x19, 6]
 	cmp	w2, 4087
-	bhi	.L1705
+	bhi	.L1713
 	add	w2, w2, 8
 	mov	x0, x20
 	sxtw	x2, w2
@@ -12109,28 +12151,28 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1708
+	cbz	x3, .L1716
 	mov	x1, x20
 	mov	x0, x19
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1720
+	cbnz	x0, .L1728
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_write
 	sxtw	x20, w0
-	b	.L1698
-.L1706:
+	b	.L1706
+.L1714:
 	str	xzr, [x19]
-	b	.L1720
-.L1708:
+	b	.L1728
+.L1716:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-	b	.L1720
-.L1710:
+	b	.L1728
+.L1718:
 	mov	x20, -1
-	b	.L1696
+	b	.L1704
 	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
 	.align	2
 	.global	rk_sftl_vendor_register
@@ -12296,169 +12338,169 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3767, %object
-	.size	__func__.3767, 17
-__func__.3767:
+	.type	__func__.3769, %object
+	.size	__func__.3769, 17
+__func__.3769:
 	.string	"INSERT_DATA_LIST"
 	.zero	7
-	.type	__func__.3762, %object
-	.size	__func__.3762, 17
-__func__.3762:
+	.type	__func__.3764, %object
+	.size	__func__.3764, 17
+__func__.3764:
 	.string	"INSERT_FREE_LIST"
 	.zero	7
-	.type	__func__.3798, %object
-	.size	__func__.3798, 17
-__func__.3798:
+	.type	__func__.3800, %object
+	.size	__func__.3800, 17
+__func__.3800:
 	.string	"List_remove_node"
 	.zero	7
-	.type	__func__.3830, %object
-	.size	__func__.3830, 22
-__func__.3830:
+	.type	__func__.3832, %object
+	.size	__func__.3832, 22
+__func__.3832:
 	.string	"List_update_data_list"
 	.zero	2
-	.type	__func__.3936, %object
-	.size	__func__.3936, 22
-__func__.3936:
+	.type	__func__.3938, %object
+	.size	__func__.3938, 22
+__func__.3938:
 	.string	"select_l2p_ram_region"
 	.zero	2
-	.type	__func__.4259, %object
-	.size	__func__.4259, 16
-__func__.4259:
+	.type	__func__.4261, %object
+	.size	__func__.4261, 16
+__func__.4261:
 	.string	"make_superblock"
-	.type	__func__.4434, %object
-	.size	__func__.4434, 19
-__func__.4434:
+	.type	__func__.4436, %object
+	.size	__func__.4436, 19
+__func__.4436:
 	.string	"get_new_active_ppa"
 	.zero	5
-	.type	__func__.16008, %object
-	.size	__func__.16008, 15
-__func__.16008:
+	.type	__func__.16018, %object
+	.size	__func__.16018, 15
+__func__.16018:
 	.string	"FlashReadPages"
 	.zero	1
-	.type	__func__.16025, %object
-	.size	__func__.16025, 15
-__func__.16025:
+	.type	__func__.16035, %object
+	.size	__func__.16035, 15
+__func__.16035:
 	.string	"FlashProgPages"
 	.zero	1
-	.type	__func__.3872, %object
-	.size	__func__.3872, 26
-__func__.3872:
+	.type	__func__.3874, %object
+	.size	__func__.3874, 26
+__func__.3874:
 	.string	"ftl_map_blk_alloc_new_blk"
 	.zero	6
-	.type	__func__.3376, %object
-	.size	__func__.3376, 11
-__func__.3376:
+	.type	__func__.3378, %object
+	.size	__func__.3378, 11
+__func__.3378:
 	.string	"FtlMemInit"
 	.zero	5
-	.type	__func__.3602, %object
-	.size	__func__.3602, 14
-__func__.3602:
+	.type	__func__.3604, %object
+	.size	__func__.3604, 14
+__func__.3604:
 	.string	"FtlBbt2Bitmap"
 	.zero	2
-	.type	__func__.3839, %object
-	.size	__func__.3839, 16
-__func__.3839:
+	.type	__func__.3841, %object
+	.size	__func__.3841, 16
+__func__.3841:
 	.string	"load_l2p_region"
-	.type	__func__.3897, %object
-	.size	__func__.3897, 31
-__func__.3897:
+	.type	__func__.3899, %object
+	.size	__func__.3899, 31
+__func__.3899:
 	.string	"Ftl_write_map_blk_to_last_page"
 	.zero	1
-	.type	__func__.3911, %object
-	.size	__func__.3911, 16
-__func__.3911:
+	.type	__func__.3913, %object
+	.size	__func__.3913, 16
+__func__.3913:
 	.string	"FtlMapWritePage"
-	.type	__func__.3883, %object
-	.size	__func__.3883, 15
-__func__.3883:
+	.type	__func__.3885, %object
+	.size	__func__.3885, 15
+__func__.3885:
 	.string	"ftl_map_blk_gc"
 	.zero	1
-	.type	__func__.3953, %object
-	.size	__func__.3953, 9
-__func__.3953:
+	.type	__func__.3955, %object
+	.size	__func__.3955, 9
+__func__.3955:
 	.string	"log2phys"
 	.zero	7
-	.type	__func__.4168, %object
-	.size	__func__.4168, 16
-__func__.4168:
+	.type	__func__.4170, %object
+	.size	__func__.4170, 16
+__func__.4170:
 	.string	"FtlReUsePrevPpa"
-	.type	__func__.4048, %object
-	.size	__func__.4048, 14
-__func__.4048:
+	.type	__func__.4050, %object
+	.size	__func__.4050, 14
+__func__.4050:
 	.string	"FtlScanSysBlk"
 	.zero	2
-	.type	__func__.4280, %object
-	.size	__func__.4280, 18
-__func__.4280:
+	.type	__func__.4282, %object
+	.size	__func__.4282, 18
+__func__.4282:
 	.string	"SupperBlkListInit"
 	.zero	6
-	.type	__func__.4321, %object
-	.size	__func__.4321, 14
-__func__.4321:
+	.type	__func__.4323, %object
+	.size	__func__.4323, 14
+__func__.4323:
 	.string	"ftl_check_vpc"
 	.zero	2
-	.type	__func__.4406, %object
-	.size	__func__.4406, 25
-__func__.4406:
+	.type	__func__.4408, %object
+	.size	__func__.4408, 25
+__func__.4408:
 	.string	"allocate_data_superblock"
 	.zero	7
-	.type	__func__.4447, %object
-	.size	__func__.4447, 16
-__func__.4447:
+	.type	__func__.4449, %object
+	.size	__func__.4449, 16
+__func__.4449:
 	.string	"update_vpc_list"
-	.type	__func__.4454, %object
-	.size	__func__.4454, 20
-__func__.4454:
+	.type	__func__.4456, %object
+	.size	__func__.4456, 20
+__func__.4456:
 	.string	"decrement_vpc_count"
 	.zero	4
-	.type	__func__.4202, %object
-	.size	__func__.4202, 22
-__func__.4202:
+	.type	__func__.4204, %object
+	.size	__func__.4204, 22
+__func__.4204:
 	.string	"FtlRecoverySuperblock"
 	.zero	2
-	.type	__func__.3645, %object
-	.size	__func__.3645, 11
-__func__.3645:
+	.type	__func__.3647, %object
+	.size	__func__.3647, 11
+__func__.3647:
 	.string	"FtlLoadBbt"
 	.zero	5
-	.type	__func__.4026, %object
-	.size	__func__.4026, 15
-__func__.4026:
+	.type	__func__.4028, %object
+	.size	__func__.4028, 15
+__func__.4028:
 	.string	"FtlVpcTblFlush"
 	.zero	1
-	.type	__func__.4305, %object
-	.size	__func__.4305, 21
-__func__.4305:
+	.type	__func__.4307, %object
+	.size	__func__.4307, 21
+__func__.4307:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.4427, %object
-	.size	__func__.4427, 29
-__func__.4427:
+	.type	__func__.4429, %object
+	.size	__func__.4429, 29
+__func__.4429:
 	.string	"allocate_new_data_superblock"
 	.zero	3
-	.type	__func__.3500, %object
-	.size	__func__.3500, 13
-__func__.3500:
+	.type	__func__.3502, %object
+	.size	__func__.3502, 13
+__func__.3502:
 	.string	"FtlProgPages"
 	.zero	3
-	.type	__func__.4524, %object
-	.size	__func__.4524, 19
-__func__.4524:
+	.type	__func__.4526, %object
+	.size	__func__.4526, 19
+__func__.4526:
 	.string	"FtlGcFreeTempBlock"
 	.zero	5
-	.type	__func__.4630, %object
-	.size	__func__.4630, 23
-__func__.4630:
+	.type	__func__.4632, %object
+	.size	__func__.4632, 23
+__func__.4632:
 	.string	"rk_ftl_garbage_collect"
 	.zero	1
-	.type	__func__.3528, %object
-	.size	__func__.3528, 9
-__func__.3528:
+	.type	__func__.3530, %object
+	.size	__func__.3530, 9
+__func__.3530:
 	.string	"FtlWrite"
 	.zero	7
-	.type	__func__.4105, %object
-	.size	__func__.4105, 15
-__func__.4105:
+	.type	__func__.4107, %object
+	.size	__func__.4107, 15
+__func__.4107:
 	.string	"FtlLoadSysInfo"
 	.zero	1
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -12490,7 +12532,7 @@ power_up_flag:
 rkflash_vender_storage_dev:
 	.word	255
 	.zero	4
-	.xword	.LC107
+	.xword	.LC110
 	.xword	rk_sftl_vendor_storage_fops
 	.zero	56
 	.bss
@@ -13280,68 +13322,76 @@ check_vpc_table:
 .LC74:
 	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
 .LC75:
-	.string	"\0014"
+	.string	"%s %p + 0x%x:"
 .LC76:
-	.string	"prog read error: = %x\n"
+	.string	"0x%08x,"
 .LC77:
-	.string	"prog read s error: = %x %x %x\n"
+	.string	"0x%04x,"
 .LC78:
-	.string	"prog read d error: = %x %x %x\n"
+	.string	"0x%02x,"
 .LC79:
-	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+	.string	"\n"
 .LC80:
-	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
+	.string	"prog read error: = %x\n"
 .LC81:
-	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
+	.string	"prog read s error: = %x %x %x\n"
 .LC82:
-	.string	"%s error allocating memory. return -1\n"
+	.string	"prog read d error: = %x %x %x\n"
 .LC83:
-	.string	"region_id = %x phyAddr = %x\n"
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
 .LC84:
-	.string	"spare:"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 .LC85:
-	.string	"map_ppn:"
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 .LC86:
-	.string	"FtlMapWritePage error = %x \n"
+	.string	"%s error allocating memory. return -1\n"
 .LC87:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC88:
-	.string	"ftl_scan_all_data = %x\n"
+	.string	"spare:"
 .LC89:
-	.string	"scan lpa = %x ppa= %x\n"
+	.string	"map_ppn:"
 .LC90:
-	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"FtlMapWritePage error = %x \n"
 .LC91:
-	.string	"...%s enter...\n"
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 .LC92:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"ftl_scan_all_data = %x\n"
 .LC93:
-	.string	"free blk vpc error %x = %x  %x\n"
+	.string	"scan lpa = %x ppa= %x\n"
 .LC94:
-	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC95:
-	.string	"FtlBbmTblFlush error:%x\n"
+	.string	"...%s enter...\n"
 .LC96:
-	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC97:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.string	"free blk vpc error %x = %x  %x\n"
 .LC98:
-	.string	"decrement_vpc_count %x = %d\n"
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
 .LC99:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"FtlBbmTblFlush error:%x\n"
 .LC100:
-	.string	"no ect"
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 .LC101:
-	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 .LC102:
-	.string	"FtlCheckVpc %x = %x  %x\n"
+	.string	"decrement_vpc_count %x = %d\n"
 .LC103:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.string	"spuer block %x vpn is 0\n "
 .LC104:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.string	"no ect"
 .LC105:
-	.string	"FtlWrite: lpa error:%x %x\n"
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 .LC106:
-	.string	"\0013vendor storage %x,%x,%x\n"
+	.string	"FtlCheckVpc %x = %x  %x\n"
 .LC107:
-	.string	"vendor_storage"
\ No newline at end of file
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+.LC108:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+.LC109:
+	.string	"FtlWrite: lpa error:%x %x\n"
+.LC110:
+	.string	"vendor_storage"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 16bc33826aa02..862269c9227ae 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -33,6 +33,15 @@
 
 #include "../soc/rockchip/flash_vendor_storage.h"
 
+void __printf(1, 2) sftl_printk(char *fmt, ...)
+{
+	va_list ap;
+
+	va_start(ap, fmt);
+	vprintk(fmt, ap);
+	va_end(ap);
+}
+
 static struct flash_boot_ops nandc_nand_ops = {
 #ifdef	CONFIG_RK_NANDC_NAND
 	FLASH_TYPE_NANDC_NAND,
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
index 6f41f530eb7bc..850a9e41b67b9 100644
--- a/drivers/rkflash/rkflash_debug.h
+++ b/drivers/rkflash/rkflash_debug.h
@@ -37,13 +37,13 @@ extern unsigned int rkflash_debug;
 #define	PRINT_BIT_SFC_E		BIT(1)
 #define PRINT_BIT_SFC_HEX	BIT(2)
 #define	PRINT_BIT_SFC\
-		(PRINT_BIT_SFC_I | PRINT_BIT_SFC_E | PRINT_BIT_SFC_HEX)
+		(PRINT_BIT_SFC_E | PRINT_BIT_SFC_HEX)
 
 #define	PRINT_BIT_NANDC_I	BIT(4)
 #define	PRINT_BIT_NANDC_E	BIT(5)
 #define PRINT_BIT_NANDC_HEX	BIT(5)
 #define	PRINT_BIT_NANDC\
-		(PRINT_BIT_NANDC_I | PRINT_BIT_NANDC_E | PRINT_BIT_NANDC_HEX)
+		(PRINT_BIT_NANDC_E | PRINT_BIT_NANDC_HEX)
 
 #if (PRINT_SWI_SFC_I)
 #define PRINT_SFC_I(...) {if (rkflash_debug & PRINT_BIT_SFC_I)\

From 0c6c14277ee29f71581bcb9b733d45de70dc6e5a Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 7 Aug 2018 22:54:25 +0800
Subject: [PATCH 1018/1852] drivers: rkflash: add new spi flash

1.SPI nand including HYF, MXIC, XTX
2.SPI nor including XMC, ESMT, MXIC

Change-Id: I35197254e70f65ad85475a8f952ea24111e3499a
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/sfc_nand.c | 16 ++++++++++++++--
 drivers/rkflash/sfc_nor.c  |  6 ++++++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 83d1fe89b241f..b551ade0a5830 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -21,6 +21,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
 	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* MX66L1G45G */
+	{0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
 	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
@@ -35,10 +37,20 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF2GQ4UHCCAE */
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	/* F50L1G41LB */
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0xFF, 20, 36, NULL},
+	/* XT26G02A */
+	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	/* XT26G01A */
+	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
 };
 
 static u8 id_byte[8];
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 2856f1cd361be..3561ea984b092 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -32,6 +32,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */
 	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+	/* XM25QH64A */
+	{0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0},
+	/* XM25QH128A */
+	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	/* EN25QH128A */
+	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
 };
 
 static const u8 sfnor_dev_code[] = {

From 32898c8077c062a5718b786ca6863dbcf4a9c2e7 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 8 Aug 2018 15:43:43 +0800
Subject: [PATCH 1019/1852] clk: rockchip: px30: Set max parent rate for uart
 fractional divider

Change-Id: Ia77fe3a34de60246ed43c1e43e60ec6fb15dcb19
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 7b2ffc11d601a..0d72d5495aa7a 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -21,8 +21,7 @@
 #include "clk.h"
 
 #define PX30_GRF_SOC_STATUS0		0x480
-#define PX30_I2S_FRAC_MAX_PRATE		600000000
-#define PX30_PDM_FRAC_MAX_PRATE		600000000
+#define PX30_FRAC_MAX_PRATE		600000000
 
 enum px30_plls {
 	apll, dpll, cpll, npll, apll_b_h, apll_b_l,
@@ -596,7 +595,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_pdm_frac", "clk_pdm_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(27), 0,
 			PX30_CLKGATE_CON(9), 10, GFLAGS,
-			&px30_pdm_fracmux, PX30_PDM_FRAC_MAX_PRATE),
+			&px30_pdm_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(9), 11, GFLAGS),
 
@@ -606,7 +605,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_i2s0_tx_frac", "clk_i2s0_tx_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(29), 0,
 			PX30_CLKGATE_CON(9), 13, GFLAGS,
-			&px30_i2s0_tx_fracmux, PX30_I2S_FRAC_MAX_PRATE),
+			&px30_i2s0_tx_fracmux, PX30_FRAC_MAX_PRATE),
 	COMPOSITE_NODIV(SCLK_I2S0_TX, "clk_i2s0_tx", mux_i2s0_tx_rx_p, CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(28), 12, 1, MFLAGS,
 			PX30_CLKGATE_CON(9), 14, GFLAGS),
@@ -622,7 +621,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_i2s0_rx_frac", "clk_i2s0_rx_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(59), 0,
 			PX30_CLKGATE_CON(17), 1, GFLAGS,
-			&px30_i2s0_rx_fracmux, PX30_I2S_FRAC_MAX_PRATE),
+			&px30_i2s0_rx_fracmux, PX30_FRAC_MAX_PRATE),
 	COMPOSITE_NODIV(SCLK_I2S0_RX, "clk_i2s0_rx", mux_i2s0_rx_tx_p, CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(58), 12, 1, MFLAGS,
 			PX30_CLKGATE_CON(17), 2, GFLAGS),
@@ -638,7 +637,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_i2s1_frac", "clk_i2s1_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(31), 0,
 			PX30_CLKGATE_CON(10), 1, GFLAGS,
-			&px30_i2s1_fracmux, PX30_I2S_FRAC_MAX_PRATE),
+			&px30_i2s1_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(10), 2, GFLAGS),
 	COMPOSITE_NODIV(0, "clk_i2s1_out_pre", mux_i2s1_out_p, 0,
@@ -653,7 +652,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_i2s2_frac", "clk_i2s2_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(33), 0,
 			PX30_CLKGATE_CON(10), 5, GFLAGS,
-			&px30_i2s2_fracmux, PX30_I2S_FRAC_MAX_PRATE),
+			&px30_i2s2_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_I2S2, "clk_i2s2", "clk_i2s2_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(10), 6, GFLAGS),
 	COMPOSITE_NODIV(0, "clk_i2s2_out_pre", mux_i2s2_out_p, 0,
@@ -671,7 +670,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_uart1_frac", "clk_uart1_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(36), 0,
 			PX30_CLKGATE_CON(10), 14, GFLAGS,
-			&px30_uart1_fracmux, 0),
+			&px30_uart1_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_UART1, "clk_uart1", "clk_uart1_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(10), 15, GFLAGS),
 
@@ -684,7 +683,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_uart2_frac", "clk_uart2_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(39), 0,
 			PX30_CLKGATE_CON(11), 2, GFLAGS,
-			&px30_uart2_fracmux, 0),
+			&px30_uart2_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_UART2, "clk_uart2", "clk_uart2_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(11), 3, GFLAGS),
 
@@ -697,7 +696,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_uart3_frac", "clk_uart3_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(42), 0,
 			PX30_CLKGATE_CON(11), 6, GFLAGS,
-			&px30_uart3_fracmux, 0),
+			&px30_uart3_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_UART3, "clk_uart3", "clk_uart3_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(11), 7, GFLAGS),
 
@@ -710,7 +709,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_uart4_frac", "clk_uart4_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(45), 0,
 			PX30_CLKGATE_CON(11), 10, GFLAGS,
-			&px30_uart4_fracmux, 0),
+			&px30_uart4_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(11), 11, GFLAGS),
 
@@ -723,7 +722,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE_FRACMUX(0, "clk_uart5_frac", "clk_uart5_src", CLK_SET_RATE_PARENT,
 			PX30_CLKSEL_CON(48), 0,
 			PX30_CLKGATE_CON(11), 14, GFLAGS,
-			&px30_uart5_fracmux, 0),
+			&px30_uart5_fracmux, PX30_FRAC_MAX_PRATE),
 	GATE(SCLK_UART5, "clk_uart5", "clk_uart5_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(11), 15, GFLAGS),
 

From 5421b7cd998409023b0471f66e4be7ea5dafd862 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Tue, 10 Jul 2018 14:58:38 +0800
Subject: [PATCH 1020/1852] regulator: rk816: support rk816 ES2 chip

Change-Id: Ib9a17be35c5b21b0a8f4b4704b07ca316f02c69c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/mfd/rk808.c                 |  1 +
 drivers/regulator/rk808-regulator.c | 28 ++++++++++++++++++++++------
 include/linux/mfd/rk808.h           |  3 +++
 3 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index d73fd528c88d1..6b8059ca2533f 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -196,6 +196,7 @@ static bool rk818_is_volatile_reg(struct device *dev, unsigned int reg)
 	case RK808_VB_MON_REG:
 	case RK808_THERMAL_REG:
 	case RK808_DCDC_EN_REG:
+	case RK808_LDO_EN_REG:
 	case RK808_DCDC_UV_STS_REG:
 	case RK808_LDO_UV_STS_REG:
 	case RK808_DCDC_PG_REG:
diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c
index 62be2d5b4ec09..df992c516ac8d 100644
--- a/drivers/regulator/rk808-regulator.c
+++ b/drivers/regulator/rk808-regulator.c
@@ -356,13 +356,19 @@ static int rk816_regulator_set_voltage_sel_regmap(struct regulator_dev *rdev,
 						  unsigned int sel)
 {
 	int ret, real_sel, delay = 100;
+	int rk816_type;
+	int id = rdev_get_id(rdev);
 
+	regmap_read(rdev->regmap, RK816_CHIP_VER_REG, &rk816_type);
+	rk816_type &= RK816_CHIP_VERSION_MASK;
 	sel <<= ffs(rdev->desc->vsel_mask) - 1;
 
-	if (sel > 23)
-		rkclk_cpuclk_div_setting(4);
-	else
-		rkclk_cpuclk_div_setting(2);
+	if ((rk816_type != RK816_TYPE_ES2) && (id == 0)) {
+		if (sel > 23)
+			rkclk_cpuclk_div_setting(4);
+		else
+			rkclk_cpuclk_div_setting(2);
+	}
 
 	do {
 		ret = regmap_update_bits(rdev->regmap,
@@ -371,13 +377,23 @@ static int rk816_regulator_set_voltage_sel_regmap(struct regulator_dev *rdev,
 		if (ret)
 			return ret;
 
+		if (rk816_type == RK816_TYPE_ES2) {
+			ret = regmap_update_bits(rdev->regmap,
+						 RK816_DCDC_EN_REG2,
+						 RK816_BUCK_DVS_CONFIRM,
+						 RK816_BUCK_DVS_CONFIRM);
+			if (ret)
+				return ret;
+		}
+
 		regmap_read(rdev->regmap,
 			    rdev->desc->vsel_reg, &real_sel);
 		real_sel &= rdev->desc->vsel_mask;
 		delay--;
 	} while ((sel != real_sel) && (delay > 0));
 
-	rkclk_cpuclk_div_setting(1);
+	if ((rk816_type != RK816_TYPE_ES2) && (id == 0))
+		rkclk_cpuclk_div_setting(1);
 
 	return ret;
 }
@@ -1016,7 +1032,7 @@ static const struct regulator_desc rk816_reg[] = {
 		.of_match = of_match_ptr("DCDC_REG2"),
 		.regulators_node = of_match_ptr("regulators"),
 		.id = RK816_ID_DCDC2,
-		.ops = &rk8xx_buck_ops_range,
+		.ops = &rk816_buck_ops_range,
 		.type = REGULATOR_VOLTAGE,
 		.n_voltages = 64,
 		.linear_ranges = rk816_buck_voltage_ranges,
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index 28569148b23fb..f7d9e98a7141e 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -762,6 +762,9 @@ enum rk805_reg {
 #define BUCK3_4_IMAX_MAX			(0x3 << 3)
 #define BOOST_DISABLE				((0x1 << 5) | (0x0 << 1))
 #define BUCK4_VRP_3PERCENT			0xc0
+#define RK816_BUCK_DVS_CONFIRM			(0x1 << 7)
+#define RK816_TYPE_ES2				0x05
+#define RK816_CHIP_VERSION_MASK			0x0f
 
 #define TEMP105C			0x08
 #define TEMP115C			0x0c

From 36adfc7cd6a5e6cf0cd42524b5f74c99a495f7ea Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Tue, 26 Jun 2018 15:43:31 +0800
Subject: [PATCH 1021/1852] cpufreq: rockchip: implement get_soc_info() for
 px30/rk3326 SoCs

Change-Id: I3569ce6447ebda3bef901c0430818090cd5058ca
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 drivers/cpufreq/rockchip-cpufreq.c | 31 ++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/cpufreq/rockchip-cpufreq.c b/drivers/cpufreq/rockchip-cpufreq.c
index 00b9bd874ed34..7fde1331601ff 100644
--- a/drivers/cpufreq/rockchip-cpufreq.c
+++ b/drivers/cpufreq/rockchip-cpufreq.c
@@ -54,6 +54,29 @@ struct cluster_info {
 };
 static LIST_HEAD(cluster_info_list);
 
+static int px30_get_soc_info(struct device *dev, struct device_node *np,
+			     int *bin, int *process)
+{
+	int ret = 0, value = -EINVAL;
+
+	if (!bin)
+		return 0;
+
+	if (of_property_match_string(np, "nvmem-cell-names",
+				     "performance") >= 0) {
+		ret = rockchip_get_efuse_value(np, "performance", &value);
+		if (ret) {
+			dev_err(dev, "Failed to get soc performance value\n");
+			return ret;
+		}
+		*bin = value;
+	}
+	if (*bin >= 0)
+		dev_info(dev, "bin=%d\n", *bin);
+
+	return ret;
+}
+
 static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 			       int *bin, int *process)
 {
@@ -114,6 +137,10 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 }
 
 static const struct of_device_id rockchip_cpufreq_of_match[] = {
+	{
+		.compatible = "rockchip,px30",
+		.data = (void *)&px30_get_soc_info,
+	},
 	{
 		.compatible = "rockchip,rk3288",
 		.data = (void *)&rk3288_get_soc_info,
@@ -122,6 +149,10 @@ static const struct of_device_id rockchip_cpufreq_of_match[] = {
 		.compatible = "rockchip,rk3288w",
 		.data = (void *)&rk3288_get_soc_info,
 	},
+	{
+		.compatible = "rockchip,rk3326",
+		.data = (void *)&px30_get_soc_info,
+	},
 	{},
 };
 

From a74be11d2fdfa5bcbcbc8ac8609ab5d41ebfd99e Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Tue, 26 Jun 2018 15:46:27 +0800
Subject: [PATCH 1022/1852] arm64: dts: rockchip: adjust opp-table by pvtm for
 px30/rk3326

Change-Id: If01552784deb6e3a2d51146fe6e05216e316c132
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi   | 62 ++++++++++++++++++++++--
 arch/arm64/boot/dts/rockchip/rk3326.dtsi |  2 +
 2 files changed, 59 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 460e1bdf41dff..12b302a2c3604 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -112,12 +112,18 @@
 		rockchip,avs-scale = <4>;
 		rockchip,max-volt = <1350000>;
 		rockchip,evb-irdrop = <25000>;
-		nvmem-cells = <&cpu_leakage>;
-		nvmem-cell-names = "cpu_leakage";
+		nvmem-cells = <&cpu_leakage>, <&performance>;
+		nvmem-cell-names = "cpu_leakage", "performance";
+		rockchip,bin-scaling-sel = <
+			0               13
+			1               15
+		>;
 
 		rockchip,pvtm-voltage-sel = <
 			0        50000   0
-			50001    99999   1
+			50001    54000   1
+			54001    60000   2
+			60001    99999   3
 		>;
 		rockchip,pvtm-freq = <408000>;
 		rockchip,pvtm-volt = <1000000>;
@@ -134,6 +140,8 @@
 			opp-microvolt = <950000 950000 1350000>;
 			opp-microvolt-L0 = <950000 950000 1350000>;
 			opp-microvolt-L1 = <950000 950000 1350000>;
+			opp-microvolt-L2 = <950000 950000 1350000>;
+			opp-microvolt-L3 = <950000 950000 1350000>;
 			clock-latency-ns = <40000>;
 			opp-suspend;
 		};
@@ -142,6 +150,8 @@
 			opp-microvolt = <950000 950000 1350000>;
 			opp-microvolt-L0 = <950000 950000 1350000>;
 			opp-microvolt-L1 = <950000 950000 1350000>;
+			opp-microvolt-L2 = <950000 950000 1350000>;
+			opp-microvolt-L3 = <950000 950000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-816000000 {
@@ -149,6 +159,8 @@
 			opp-microvolt = <1050000 1050000 1350000>;
 			opp-microvolt-L0 = <1050000 1050000 1350000>;
 			opp-microvolt-L1 = <1000000 1000000 1350000>;
+			opp-microvolt-L2 = <1000000 1000000 1350000>;
+			opp-microvolt-L3 = <950000  950000  1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1008000000 {
@@ -156,6 +168,8 @@
 			opp-microvolt = <1175000 1175000 1350000>;
 			opp-microvolt-L0 = <1175000 1175000 1350000>;
 			opp-microvolt-L1 = <1125000 1125000 1350000>;
+			opp-microvolt-L2 = <1125000 1125000 1350000>;
+			opp-microvolt-L3 = <1050000 1050000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1200000000 {
@@ -163,6 +177,8 @@
 			opp-microvolt = <1300000 1300000 1350000>;
 			opp-microvolt-L0 = <1300000 1300000 1350000>;
 			opp-microvolt-L1 = <1275000 1275000 1350000>;
+			opp-microvolt-L2 = <1250000 1250000 1350000>;
+			opp-microvolt-L3 = <1200000 1200000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1248000000 {
@@ -170,6 +186,8 @@
 			opp-microvolt = <1350000 1350000 1350000>;
 			opp-microvolt-L0 = <1350000 1350000 1350000>;
 			opp-microvolt-L1 = <1300000 1300000 1350000>;
+			opp-microvolt-L2 = <1275000 1275000 1350000>;
+			opp-microvolt-L3 = <1225000 1225000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1296000000 {
@@ -177,6 +195,8 @@
 			opp-microvolt = <1350000 1350000 1350000>;
 			opp-microvolt-L0 = <1350000 1350000 1350000>;
 			opp-microvolt-L1 = <1350000 1350000 1350000>;
+			opp-microvolt-L2 = <1300000 1300000 1350000>;
+			opp-microvolt-L3 = <1250000 1250000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1416000000 {
@@ -184,6 +204,8 @@
 			opp-microvolt = <1350000 1350000 1350000>;
 			opp-microvolt-L0 = <1350000 1350000 1350000>;
 			opp-microvolt-L1 = <1350000 1350000 1350000>;
+			opp-microvolt-L2 = <1300000 1300000 1350000>;
+			opp-microvolt-L3 = <1250000 1250000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1512000000 {
@@ -191,6 +213,8 @@
 			opp-microvolt = <1350000 1350000 1350000>;
 			opp-microvolt-L0 = <1350000 1350000 1350000>;
 			opp-microvolt-L1 = <1350000 1350000 1350000>;
+			opp-microvolt-L2 = <1300000 1300000 1350000>;
+			opp-microvolt-L3 = <1250000 1250000 1350000>;
 			clock-latency-ns = <40000>;
 		};
 	};
@@ -971,6 +995,10 @@
 		cpu_leakage: cpu-leakage@17 {
 			reg = <0x17 0x1>;
 		};
+		performance: performance@1e {
+			reg = <0x1e 0x1>;
+			bits = <4 3>;
+		};
 	};
 
 	cru: clock-controller@ff2b0000 {
@@ -1266,7 +1294,9 @@
 
 		rockchip,pvtm-voltage-sel = <
 			0        50000   0
-			50001    99999   1
+			50001    54000   1
+			54001    60000   2
+			60001    99999   3
 		>;
 		rockchip,pvtm-ch = <0 0>;
 
@@ -1275,24 +1305,32 @@
 			opp-microvolt = <950000>;
 			opp-microvolt-L0 = <950000>;
 			opp-microvolt-L1 = <950000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-300000000 {
 			opp-hz = /bits/ 64 <300000000>;
 			opp-microvolt = <975000>;
 			opp-microvolt-L0 = <975000>;
 			opp-microvolt-L1 = <950000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-400000000 {
 			opp-hz = /bits/ 64 <400000000>;
 			opp-microvolt = <1050000>;
 			opp-microvolt-L0 = <1050000>;
 			opp-microvolt-L1 = <1025000>;
+			opp-microvolt-L2 = <975000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-480000000 {
 			opp-hz = /bits/ 64 <480000000>;
 			opp-microvolt = <1125000>;
 			opp-microvolt-L0 = <1125000>;
 			opp-microvolt-L1 = <1100000>;
+			opp-microvolt-L2 = <1050000>;
+			opp-microvolt-L3 = <1000000>;
 		};
 	};
 
@@ -1743,7 +1781,9 @@
 
 		rockchip,pvtm-voltage-sel = <
 			0        50000   0
-			50001    99999   1
+			50001    54000   1
+			54001    60000   2
+			60001    99999   3
 		>;
 		rockchip,pvtm-ch = <0 0>;
 
@@ -1752,36 +1792,48 @@
 			opp-microvolt = <950000>;
 			opp-microvolt-L0 = <950000>;
 			opp-microvolt-L1 = <950000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-328000000 {
 			opp-hz = /bits/ 64 <328000000>;
 			opp-microvolt = <950000>;
 			opp-microvolt-L0 = <950000>;
 			opp-microvolt-L1 = <950000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-450000000 {
 			opp-hz = /bits/ 64 <450000000>;
 			opp-microvolt = <950000>;
 			opp-microvolt-L0 = <950000>;
 			opp-microvolt-L1 = <950000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-528000000 {
 			opp-hz = /bits/ 64 <528000000>;
 			opp-microvolt = <975000>;
 			opp-microvolt-L0 = <975000>;
 			opp-microvolt-L1 = <975000>;
+			opp-microvolt-L2 = <950000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-666000000 {
 			opp-hz = /bits/ 64 <666000000>;
 			opp-microvolt = <1050000>;
 			opp-microvolt-L0 = <1050000>;
 			opp-microvolt-L1 = <1000000>;
+			opp-microvolt-L2 = <975000>;
+			opp-microvolt-L3 = <950000>;
 		};
 		opp-786000000 {
 			opp-hz = /bits/ 64 <786000000>;
 			opp-microvolt = <1100000>;
 			opp-microvolt-L0 = <1100000>;
 			opp-microvolt-L1 = <1050000>;
+			opp-microvolt-L2 = <1025000>;
+			opp-microvolt-L3 = <1000000>;
 			status = "disabled";
 		};
 	};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326.dtsi b/arch/arm64/boot/dts/rockchip/rk3326.dtsi
index 89661162d4dcc..314376b6990fd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326.dtsi
@@ -17,5 +17,7 @@
 		opp-microvolt = <1175000>;
 		opp-microvolt-L0 = <1175000>;
 		opp-microvolt-L1 = <1150000>;
+		opp-microvolt-L2 = <1100000>;
+		opp-microvolt-L3 = <1050000>;
 	};
 };

From 35fb6a78205585ca69eb7cbc29fe183eb726fb26 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Wed, 8 Aug 2018 15:42:43 +0800
Subject: [PATCH 1023/1852] phy: rockchip: rockchip-inno-usb2: and otg cfg for
 rk3368

This patch adds rk3368 otg-port phy configurations.
But actually, we don't use the otg phy configurations
for the time being, because we use dwc_otg_310 driver
for rk3368 otg controller, and this driver doesn't use
generic phy. This patch is useful if we switch to dwc2
driver for rk3368 otg in the feature.

Change-Id: Ibed3fde4ef64ad25e933ac4560f956b7c9f5c476
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 022d17874b043..baf41c0994d5f 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -2397,6 +2397,27 @@ static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
 		.num_ports	= 2,
 		.clkout_ctl	= { 0x0724, 15, 15, 1, 0 },
 		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0700, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+				.iddig_output	= { 0x0700, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0700, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0680, 6, 6, 0, 1 },
+				.idfall_det_st	= { 0x0690, 6, 6, 0, 1 },
+				.idfall_det_clr	= { 0x06a0, 6, 6, 0, 1 },
+				.idrise_det_en	= { 0x0680, 5, 5, 0, 1 },
+				.idrise_det_st	= { 0x0690, 5, 5, 0, 1 },
+				.idrise_det_clr	= { 0x06a0, 5, 5, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x04bc, 23, 23, 0, 1 },
+				.utmi_iddig     = { 0x04bc, 26, 26, 0, 1 },
+				.utmi_ls	= { 0x04bc, 25, 24, 0, 1 },
+				.vbus_det_en    = { 0x079c, 15, 15, 1, 0 },
+			},
 			[USB2PHY_PORT_HOST] = {
 				.phy_sus	= { 0x0728, 8, 0, 0, 0x1d1 },
 				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
@@ -2404,6 +2425,18 @@ static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
 				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
 			}
 		},
+		.chg_det = {
+			.opmode		= { 0x0700, 3, 0, 5, 1 },
+			.cp_det		= { 0x04b8, 30, 30, 0, 1 },
+			.dcp_det	= { 0x04b8, 29, 29, 0, 1 },
+			.dp_det		= { 0x04b8, 31, 31, 0, 1 },
+			.idm_sink_en	= { 0x0718, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0718, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0718, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0718, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0718, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0718, 11, 11, 0, 1 },
+		},
 	},
 	{ /* sentinel */ }
 };

From 7b29d748d2af74cbd1bb3bd210d473323e66c748 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Wed, 8 Aug 2018 15:52:46 +0800
Subject: [PATCH 1024/1852] arm64: dts: rockchip: and phy node for rk3368 usb
 otg

The usb otg doesn't need phy node, because it uses
legacy controller driver "dwc_otg_310". But the phy
node is needed for uboot which uses kernel dtb. And
it's also useful for otg controller driver if we
switch to dwc2 driver later.

Change-Id: I2f06f00861805f0ed3bf3f052aaa5a7e3bc416f8
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 55692ae3647ea..f263de7069511 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -838,6 +838,8 @@
 		g-rx-fifo-size = <280>;
 		g-tx-fifo-size = <256 128 128 64 32 16>;
 		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -1188,6 +1190,16 @@
 			assigned-clock-parents = <&u2phy>;
 			status = "disabled";
 
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
 			u2phy_host: host-port {
 				#phy-cells = <0>;
 				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;

From 63266cef4edc9fbb871c3a20c2df9c0fca864a22 Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Thu, 9 Aug 2018 10:03:08 +0800
Subject: [PATCH 1025/1852] nvme: make partition type depend on saved command
 line

nvme for rockchip platform could be used as both of main disk
or external storage. So it's not proper to fix the partition
type by checking CONFIG_ARCH_ROCKCHIP. Otherwise, if the nvme
is probed earily then the real main disk device, then the main
disk could be failed to mount.

Change-Id: If30940527e99d88d792fe3f19475fabf4b1a99d3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
 drivers/nvme/host/pci.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index be33d66e21345..9df60a96a67e9 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -2299,11 +2299,12 @@ static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
 	disk->queue = ns->queue;
 	disk->driverfs_dev = dev->device;
 	disk->flags = GENHD_FL_EXT_DEVT;
-#ifdef CONFIG_ARCH_ROCKCHIP
-	disk->is_rk_disk = true;
-#else
-	disk->is_rk_disk = false;
-#endif
+
+	if (strstr(saved_command_line, "storagemedia=nvme"))
+		disk->is_rk_disk = true;
+	else
+		disk->is_rk_disk = false;
+
 	sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
 
 	/*

From 167915625da3f653a52086e9c19d106c97a3b2e5 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 9 Aug 2018 12:42:46 +0800
Subject: [PATCH 1026/1852] arm64: dts: rockchip: rk3308-evb: switch PCM master
 for AP side

We may need to support a variety of different Bluetooth modules
which are from different vendors. In order to develop efficiently,
we need to uniformly set the PCM of the AP to master mode, and
the Bluetooth side as the slave.

Change-Id: I92e76a9e394eea7b3f700bada5ad97ae92a67c69
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 2 --
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi | 2 --
 2 files changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 059df0fb8d2eb..d10f5442550b1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -120,8 +120,6 @@
 		rockchip,codec = <&dummy_codec>;
 		rockchip,format = "dsp_b";
 		rockchip,bitclock-inversion = <0>;
-		rockchip,bitclock-master = <&dummy_codec>;
-		rockchip,frame-master = <&dummy_codec>;
 		rockchip,wait-card-locked = <0>;
 	};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 32f4d225edd4f..68483830fb532 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -105,8 +105,6 @@
 		rockchip,codec = <&dummy_codec>;
 		rockchip,format = "dsp_b";
 		rockchip,bitclock-inversion = <0>;
-		rockchip,bitclock-master = <&dummy_codec>;
-		rockchip,frame-master = <&dummy_codec>;
 		rockchip,wait-card-locked = <0>;
 	};
 

From 22cdb0875e1e75bdd781e228781a5df73bda2830 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 9 Aug 2018 15:16:22 +0800
Subject: [PATCH 1027/1852] ASoC: rk3308_codec: fix the outdated audio route

The GRF values may be kept the previous status after hot reboot,
if the property 'rockchip,adc-grps-route' is not set, we need to
recover default the order of sdi/sdo for i2s2_8ch/i2s3_8ch/i2s1_2ch.

Change-Id: Ic35b96388aaeca0ed4e0efd4e6ae3de178f88b06
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index fd8be99d9a4c5..56b2d9e0e95e0 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -1824,17 +1824,29 @@ static int rk3308_codec_adc_grps_route_config(struct rk3308_codec_priv *rk3308)
 /* Put default one-to-one mapping */
 static int rk3308_codec_adc_grps_route_default(struct rk3308_codec_priv *rk3308)
 {
-	unsigned int v, idx;
+	unsigned int idx;
 
-	rk3308->which_i2s = ACODEC_TO_I2S2_8CH;
-	rk3308->to_i2s_grps = ADC_LR_GROUP_MAX;
 	/*
 	 * The GRF values may be kept the previous status after hot reboot,
-	 * we need to update them.
+	 * if the property 'rockchip,adc-grps-route' is not set, we need to
+	 * recover default the order of sdi/sdo for i2s2_8ch/i2s3_8ch/i2s1_2ch.
 	 */
-	for (idx = 0; idx < rk3308->to_i2s_grps; idx++) {
-		regmap_read(rk3308->grf, GRF_SOC_CON1, &v);
-		rk3308->i2s_sdis[idx] = GRF_I2S2_8CH_SDI_R_MSK(idx, v);
+	regmap_write(rk3308->grf, GRF_SOC_CON1,
+		     GRF_I2S1_2CH_SDI(0));
+
+	for (idx = 0; idx < 2; idx++) {
+		regmap_write(rk3308->grf, GRF_SOC_CON1,
+			     GRF_I2S3_4CH_SDI(idx, idx));
+	}
+
+	/* Using i2s2_8ch by default. */
+	rk3308->which_i2s = ACODEC_TO_I2S2_8CH;
+	rk3308->to_i2s_grps = ADC_LR_GROUP_MAX;
+
+	for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
+		rk3308->i2s_sdis[idx] = idx;
+		regmap_write(rk3308->grf, GRF_SOC_CON1,
+			     GRF_I2S2_8CH_SDI(idx, idx));
 	}
 
 	return 0;

From 5969935c02419d94989b0bf18ad737a356f902c7 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 2 Aug 2018 11:46:04 +0800
Subject: [PATCH 1028/1852] arm64: dts: rockchip: rk3308: Reduce 25000uV for
 816MHz and 1008MHz

The latest Vmin test result on evb board is as the following.
/* KHz    uV */
1296000   1250000
1200000   1200000
1008000   1075000
816000    975000
600000    850000
408000    850000
Each frequency should add 50000uV margin.

Change-Id: Icbe99d2a4d88466381fd418fb74a8b8e9cac7323
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index c25797f69a480..61628a3013e95 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -114,12 +114,12 @@
 		};
 		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
-			opp-microvolt = <1050000 1050000 1340000>;
+			opp-microvolt = <1025000 1025000 1340000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
-			opp-microvolt = <1150000 1150000 1340000>;
+			opp-microvolt = <1125000 1125000 1340000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1200000000 {

From 16d7ff5cca1c49c14da01dd1ea223ddd6a6c6c4e Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Thu, 9 Aug 2018 14:09:36 +0800
Subject: [PATCH 1029/1852] cpufreq: rockchip: try old regulator name of cpu
 for PVTM

PVTM use "cpu-supply" as the name of regulator to get PVTM value to
select opp level, but old dts use "cpu0-supply" as the name of cpu,
so we need be compatible with the old regulator name of cpu.

Change-Id: Id6dbb0b4a85e6154b9be38ffb373e7eab7199781
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 drivers/cpufreq/rockchip-cpufreq.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/rockchip-cpufreq.c b/drivers/cpufreq/rockchip-cpufreq.c
index 7fde1331601ff..f77709ab3a86c 100644
--- a/drivers/cpufreq/rockchip-cpufreq.c
+++ b/drivers/cpufreq/rockchip-cpufreq.c
@@ -126,7 +126,7 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 			dev_err(dev, "Failed to get soc process version\n");
 			goto out;
 		}
-		if (value == 0 || value == 1)
+		if (soc_is_rk3288() && (value == 0 || value == 1))
 			*process = 0;
 	}
 	if (*process >= 0)
@@ -281,7 +281,9 @@ EXPORT_SYMBOL_GPL(rockchip_cpufreq_update_cur_volt);
 static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
 {
 	struct device_node *np;
+	struct property *pp;
 	struct device *dev;
+	char *reg_name = NULL;
 	int ret = 0, bin = -EINVAL;
 
 	cluster->process = -EINVAL;
@@ -292,6 +294,17 @@ static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
 	if (!dev)
 		return -ENODEV;
 
+	pp = of_find_property(dev->of_node, "cpu-supply", NULL);
+	if (pp) {
+		reg_name = "cpu";
+	} else {
+		pp = of_find_property(dev->of_node, "cpu0-supply", NULL);
+		if (pp)
+			reg_name = "cpu0";
+		else
+			return -ENOENT;
+	}
+
 	np = of_parse_phandle(dev->of_node, "operating-points-v2", 0);
 	if (!np) {
 		dev_warn(dev, "OPP-v2 not supported\n");
@@ -313,7 +326,7 @@ static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
 
 	rockchip_get_soc_info(dev, rockchip_cpufreq_of_match,
 			      &bin, &cluster->process);
-	rockchip_get_scale_volt_sel(dev, "cpu_leakage", "cpu",
+	rockchip_get_scale_volt_sel(dev, "cpu_leakage", reg_name,
 				    bin, cluster->process,
 				    &cluster->scale, &cluster->volt_sel);
 np_err:

From e1cf58d4e3c55f9c7e9d4a052ca599f535ffead9 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Wed, 25 Jul 2018 10:30:28 +0800
Subject: [PATCH 1030/1852] clk: rockchip: rk3399: fix up some regs description
 error

Change-Id: Ia992b20f13ba7037b93fcd2fbd67a4d6b3fd1266
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3399.c      | 21 ++++++++++-----------
 include/dt-bindings/clock/rk3399-cru.h |  2 +-
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 8717e57fe7a67..d1ddf7a97dcbe 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -185,8 +185,8 @@ PNAME(mux_pll_src_cpll_gpll_npll_ppll_upll_24m_p) = { "dummy_cpll", "gpll", "npl
  */
 PNAME(mux_pll_src_dmyvpll_cpll_gpll_npll_p)	= { "dummy_vpll", "dummy_cpll", "gpll",
 						    "npll" };
-PNAME(mux_pll_src_dmyvpll_cpll_gpll_24m_p)	= { "dummy_vpll", "dummy_cpll", "gpll",
-						    "xin24m" };
+PNAME(mux_pll_src_dmyvpll_cpll_gpll_gpll_p)	= { "dummy_vpll", "dummy_cpll", "gpll",
+						    "gpll" };
 PNAME(mux_pll_src_24m_32k_cpll_gpll_p)	= { "xin24m", "xin32k",
 					    "dummy_cpll", "gpll" };
 
@@ -239,8 +239,8 @@ PNAME(mux_pll_src_cpll_gpll_npll_ppll_upll_24m_p) = { "cpll", "gpll", "npll",
  */
 PNAME(mux_pll_src_dmyvpll_cpll_gpll_npll_p)	= { "dummy_vpll", "cpll", "gpll",
 						    "npll" };
-PNAME(mux_pll_src_dmyvpll_cpll_gpll_24m_p)	= { "dummy_vpll", "cpll", "gpll",
-						    "xin24m" };
+PNAME(mux_pll_src_dmyvpll_cpll_gpll_gpll_p)	= { "dummy_vpll", "cpll", "gpll",
+						    "gpll" };
 PNAME(mux_pll_src_24m_32k_cpll_gpll_p)	= { "xin24m", "xin32k",
 					    "cpll", "gpll" };
 
@@ -809,7 +809,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 	GATE(0, "gpll_cci_trace", "gpll", CLK_IGNORE_UNUSED,
 			RK3399_CLKGATE_CON(2), 6, GFLAGS),
 	COMPOSITE(SCLK_CCI_TRACE, "clk_cci_trace", mux_cci_trace_p, CLK_IGNORE_UNUSED,
-			RK3399_CLKSEL_CON(5), 15, 2, MFLAGS, 8, 5, DFLAGS,
+			RK3399_CLKSEL_CON(5), 15, 1, MFLAGS, 8, 5, DFLAGS,
 			RK3399_CLKGATE_CON(2), 7, GFLAGS),
 
 	GATE(0, "cpll_cs", "cpll", CLK_IGNORE_UNUSED,
@@ -938,7 +938,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(14), 8, 2, DFLAGS,
 			RK3399_CLKGATE_CON(5), 3, GFLAGS),
 	COMPOSITE_NOMUX(PCLK_PERIHP, "pclk_perihp", "aclk_perihp", CLK_IGNORE_UNUSED,
-			RK3399_CLKSEL_CON(14), 12, 2, DFLAGS,
+			RK3399_CLKSEL_CON(14), 12, 3, DFLAGS,
 			RK3399_CLKGATE_CON(5), 4, GFLAGS),
 
 	GATE(ACLK_PERF_PCIE, "aclk_perf_pcie", "aclk_perihp", 0,
@@ -1182,9 +1182,8 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKGATE_CON(29), 12, GFLAGS),
 
 	/* hdcp */
-	COMPOSITE(ACLK_HDCP, "aclk_hdcp", mux_pll_src_cpll_gpll_ppll_p, 0,
-			RK3399_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
-			RK3399_CLKGATE_CON(11), 12, GFLAGS),
+	COMPOSITE_NOGATE(ACLK_HDCP, "aclk_hdcp", mux_pll_src_cpll_gpll_ppll_p, 0,
+			RK3399_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS),
 	COMPOSITE_NOMUX(HCLK_HDCP, "hclk_hdcp", "aclk_hdcp", 0,
 			RK3399_CLKSEL_CON(43), 5, 5, DFLAGS,
 			RK3399_CLKGATE_CON(11), 3, GFLAGS),
@@ -1267,7 +1266,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(106), 0,
 			&rk3399_dclk_vop0_fracmux, 0),
 
-	COMPOSITE(SCLK_VOP0_PWM, "clk_vop0_pwm", mux_pll_src_dmyvpll_cpll_gpll_24m_p, 0,
+	COMPOSITE(SCLK_VOP0_PWM, "clk_vop0_pwm", mux_pll_src_dmyvpll_cpll_gpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(51), 6, 2, MFLAGS, 0, 5, DFLAGS,
 			RK3399_CLKGATE_CON(10), 14, GFLAGS),
 
@@ -1304,7 +1303,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
 			RK3399_CLKSEL_CON(107), 0,
 			&rk3399_dclk_vop1_fracmux, 0),
 
-	COMPOSITE(SCLK_VOP1_PWM, "clk_vop1_pwm", mux_pll_src_dmyvpll_cpll_gpll_24m_p, 0,
+	COMPOSITE(SCLK_VOP1_PWM, "clk_vop1_pwm", mux_pll_src_dmyvpll_cpll_gpll_gpll_p, 0,
 			RK3399_CLKSEL_CON(52), 6, 2, MFLAGS, 0, 5, DFLAGS,
 			RK3399_CLKGATE_CON(10), 15, GFLAGS),
 
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index d0b4740ca92e9..4ba4007f02a6a 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -442,7 +442,7 @@
 #define SRST_A_ADB400_GIC2COREB		40
 #define SRST_A_ADB400_COREB2GIC		41
 #define SRST_P_DBG_B			42
-#define SRST_L2_B_T			43
+#define SRST_L2_B_T			44
 #define SRST_ADB_B_T			45
 #define SRST_A_RKPERF_B			46
 #define SRST_PVTM_CORE_B		47

From 7aea95cd7c38db86b9325b1c8fe2df2059d97302 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Fri, 10 Aug 2018 09:11:30 +0800
Subject: [PATCH 1031/1852] arm: rk3308_linux_aarch32[_debug]_defconfig: enable
 zram support

Zram allows Linux to make more efficient use of RAM, since
the system can then hold more pages of memory in the compressed
swap than if the same amount of RAM had been used as application
memory or disk cache. This is particularly effective on machines
that do not have much ram space.

Enable:
echo 16M > /sys/block/zram0/disksize
mkswap /dev/zram0
swapon /dev/zram0

More detial: Documentation/blockdev/zram.txt

Change-Id: I23954dbc7df79d4faac02cf7f393dbfc37858ee6
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 5 +++--
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 2145ff8f4ebc3..3e57addaebbe7 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -1,7 +1,6 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_KERNEL_LZ4=y
 CONFIG_DEFAULT_HOSTNAME="localhost"
-# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
@@ -39,6 +38,7 @@ CONFIG_THUMB2_KERNEL=y
 # CONFIG_CPU_SW_DOMAIN_PAN is not set
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZSMALLOC=y
 CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
 CONFIG_CMDLINE="coherent_pool=4k user_debug=31"
@@ -83,7 +83,8 @@ CONFIG_RFKILL=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_ALLOW_DEV_COREDUMP is not set
-# CONFIG_BLK_DEV is not set
+CONFIG_ZRAM=y
+CONFIG_ZRAM_LZ4_COMPRESS=y
 CONFIG_NETDEVICES=y
 # CONFIG_NET_CORE is not set
 # CONFIG_ETHERNET is not set
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index b5b02a4ccfd53..fbacc3d30f302 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -1,7 +1,6 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_KERNEL_LZ4=y
 CONFIG_DEFAULT_HOSTNAME="localhost"
-# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
@@ -39,6 +38,7 @@ CONFIG_THUMB2_KERNEL=y
 # CONFIG_CPU_SW_DOMAIN_PAN is not set
 # CONFIG_COMPACTION is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZSMALLOC=y
 CONFIG_UACCESS_WITH_MEMCPY=y
 # CONFIG_SWIOTLB is not set
 CONFIG_CMDLINE="coherent_pool=4k loglevel=0"
@@ -83,7 +83,8 @@ CONFIG_RFKILL=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_ALLOW_DEV_COREDUMP is not set
-# CONFIG_BLK_DEV is not set
+CONFIG_ZRAM=y
+CONFIG_ZRAM_LZ4_COMPRESS=y
 CONFIG_NETDEVICES=y
 # CONFIG_NET_CORE is not set
 # CONFIG_ETHERNET is not set

From e3d31571b03b385fffd6745635b71de7f89e7a0e Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Wed, 8 Aug 2018 09:12:34 +0800
Subject: [PATCH 1032/1852] drm/panel: simple: handle small delay durations
 more precisely

Since msleep is based on jiffies the panel could take longer
than expected. So use msleep for values greater than 20 msec
otherwise usleep_range.

Change-Id: Ib03c6e381b44a31dd57aeaaa3a88a459578de313
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 28 ++++++++++++++++++----------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index daf891cd314f4..700ffd65c7c1a 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -137,6 +137,14 @@ enum MCU_IOCTL {
 	MCU_SETBYPASS,
 };
 
+static void panel_simple_sleep(unsigned int msec)
+{
+	if (msec > 20)
+		msleep(msec);
+	else
+		usleep_range(msec * 1000, (msec + 1) * 1000);
+}
+
 static inline int get_panel_cmd_type(const char *s)
 {
 	if (!s)
@@ -172,7 +180,7 @@ static int panel_simple_parse_cmds(struct device *dev,
 				   const u8 *data, int blen,
 				   struct panel_cmds *pcmds)
 {
-	int len;
+	unsigned int len;
 	char *buf, *bp;
 	struct cmd_ctrl_hdr *dchdr;
 	int i, cnt;
@@ -282,7 +290,7 @@ static int panel_simple_mcu_send_cmds(struct panel_simple *panel,
 		rockchip_drm_crtc_send_mcu_cmd(panel->base.drm, panel->np_crtc,
 					       cmd->dchdr.dtype, value);
 		if (cmd->dchdr.wait)
-			msleep(cmd->dchdr.wait);
+			panel_simple_sleep(cmd->dchdr.wait);
 	}
 	rockchip_drm_crtc_send_mcu_cmd(panel->base.drm,
 				       panel->np_crtc, MCU_SETBYPASS, 0);
@@ -309,7 +317,7 @@ static int panel_simple_spi_send_cmds(struct panel_simple *panel,
 		panel_simple_spi_write_cmd(panel, cmd->dchdr.dtype, value);
 
 		if (cmd->dchdr.wait)
-			msleep(cmd->dchdr.wait);
+			panel_simple_sleep(cmd->dchdr.wait);
 	}
 
 	return 0;
@@ -351,7 +359,7 @@ static int panel_simple_dsi_send_cmds(struct panel_simple *panel,
 				err);
 
 		if (cmd->dchdr.wait)
-			msleep(cmd->dchdr.wait);
+			panel_simple_sleep(cmd->dchdr.wait);
 	}
 
 	return 0;
@@ -569,7 +577,7 @@ static int panel_simple_disable(struct drm_panel *panel)
 	}
 
 	if (p->desc && p->desc->delay.disable)
-		msleep(p->desc->delay.disable);
+		panel_simple_sleep(p->desc->delay.disable);
 
 	if (p->cmd_type == CMD_TYPE_MCU) {
 		err = panel_simple_mcu_send_cmds(p, p->off_cmds);
@@ -607,7 +615,7 @@ static int panel_simple_unprepare(struct drm_panel *panel)
 	panel_simple_regulator_disable(panel);
 
 	if (p->desc && p->desc->delay.unprepare)
-		msleep(p->desc->delay.unprepare);
+		panel_simple_sleep(p->desc->delay.unprepare);
 
 	p->prepared = false;
 
@@ -632,19 +640,19 @@ static int panel_simple_prepare(struct drm_panel *panel)
 		gpiod_direction_output(p->enable_gpio, 1);
 
 	if (p->desc && p->desc->delay.prepare)
-		msleep(p->desc->delay.prepare);
+		panel_simple_sleep(p->desc->delay.prepare);
 
 	if (p->reset_gpio)
 		gpiod_direction_output(p->reset_gpio, 1);
 
 	if (p->desc && p->desc->delay.reset)
-		msleep(p->desc->delay.reset);
+		panel_simple_sleep(p->desc->delay.reset);
 
 	if (p->reset_gpio)
 		gpiod_direction_output(p->reset_gpio, 0);
 
 	if (p->desc && p->desc->delay.init)
-		msleep(p->desc->delay.init);
+		panel_simple_sleep(p->desc->delay.init);
 
 	if (p->on_cmds) {
 		if (p->dsi)
@@ -674,7 +682,7 @@ static int panel_simple_enable(struct drm_panel *panel)
 			dev_err(p->dev, "failed to send mcu on cmds\n");
 	}
 	if (p->desc && p->desc->delay.enable)
-		msleep(p->desc->delay.enable);
+		panel_simple_sleep(p->desc->delay.enable);
 
 	if (p->backlight) {
 		p->backlight->props.power = FB_BLANK_UNBLANK;

From cedbd5b8f3adaa197d26094342c66cda6ed02854 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Fri, 29 Jun 2018 11:52:00 +0800
Subject: [PATCH 1033/1852] media: rk-isp10: add isp reset function

Change-Id: Icb0e9ee27c4ae4329c0a1b9f19923f4b42be6405
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c   | 10 +-------
 .../platform/rk-isp10/cif_isp10_pltfrm.c      | 25 +++++++++++++++++++
 .../platform/rk-isp10/cif_isp10_pltfrm.h      |  3 +++
 3 files changed, 29 insertions(+), 9 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 2b74085aef90d..507c954cc81be 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -3379,15 +3379,7 @@ static int cif_isp10_config_cif(
 		cif_isp10_pltfrm_pr_dbg(dev->dev,
 			"CIF_ID 0x%08x\n", cif_id);
 
-		/*
-		 * Cancel isp reset internal here temporary for
-		 * isp bus may be dead when switch isp.
-		 */
-		/*
-		 * cif_iowrite32(CIF_IRCL_CIF_SW_RST,
-		 * dev->config.base_addr + CIF_IRCL);
-		 */
-
+		cif_isp10_pltfrm_reset(dev);
 		cif_isp10_config_clk(dev);
 
 		cifisp_frame_id_reset(&dev->isp_dev);
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
index c9011716b8ec9..2f3903532c25c 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.c
@@ -1054,6 +1054,31 @@ int cif_isp10_pltfrm_mipi_dphy_config(
 	return ret;
 }
 
+int cif_isp10_pltfrm_reset(
+	struct cif_isp10_device *cif_isp10_dev)
+{
+	struct pltfrm_soc_cfg_para cfg_para;
+	struct pltfrm_soc_cfg *soc_cfg;
+	int ret = 0;
+
+	soc_cfg = &cif_isp10_dev->soc_cfg;
+	if (!IS_ERR_OR_NULL(soc_cfg) &&
+		!IS_ERR_OR_NULL(soc_cfg->soc_cfg)) {
+		cfg_para.cmd =
+			PLTFRM_CLKRST;
+		cfg_para.cfg_para = 0;
+		cfg_para.isp_config = &soc_cfg->isp_config;
+		ret = soc_cfg->soc_cfg(&cfg_para);
+	}
+
+#ifdef CIF_ISP10_MODE_DMA_SG
+	cif_isp10_dma_detach_device(cif_isp10_dev);
+	cif_isp10_dma_attach_device(cif_isp10_dev);
+#endif
+
+	return ret;
+}
+
 int cif_isp10_pltfrm_pm_set_state(
 	struct device *dev,
 	enum cif_isp10_pm_state pm_state)
diff --git a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.h b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.h
index d61adc9c137ab..3d16bb4bc3bb6 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_pltfrm.h
@@ -201,4 +201,7 @@ int cif_isp10_pltfrm_soc_init(
 int cif_isp10_pltfrm_mipi_dphy_config(
 	struct cif_isp10_device *cif_isp10_dev);
 
+int cif_isp10_pltfrm_reset(
+	struct cif_isp10_device *cif_isp10_dev);
+
 #endif

From 3bc583f0a89e6879691ad693b11271fe298997f2 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 25 Jul 2018 10:30:38 +0800
Subject: [PATCH 1034/1852] media: rk-isp10: fix the issue that setting of isp0
 mipi affect txrx dphy.

Change-Id: I0c4a859caa42f1c5f9fd2ed51b2b8f92e84badd6
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../platform/rk-isp10/cif_isp10_rk3399.c      | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_rk3399.c b/drivers/media/platform/rk-isp10/cif_isp10_rk3399.c
index c19e68875fdaf..1817f423a4d45 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_rk3399.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10_rk3399.c
@@ -292,11 +292,22 @@ static int mipi_dphy_cfg(struct cif_isp10_rk3399 *isp_cfg, struct pltfrm_cam_mip
 		datalane_en |= (1 << i);
 
 	if (input_sel == 0) {
+		/*
+		 * According to the sequence of RK3399_TXRX_DPHY, the setting of isp0 mipi
+		 * will affect txrx dphy in default state of grf_soc_con24.
+		 */
+		write_grf_reg(GRF_SOC_CON24_OFFSET,
+			DPHY_TX1RX1_MASTERSLAVEZ_MASK |
+			(0x0 << DPHY_TX1RX1_MASTERSLAVEZ_BIT) |
+			DPHY_TX1RX1_BASEDIR_MASK |
+			(0x1 << DPHY_TX1RX1_BASEDIR_BIT) |
+			DPHY_RX1_MASK | 0x0 << DPHY_RX1_SEL_BIT);
+
 		write_grf_reg(GRF_SOC_CON21_OFFSET,
-					DPHY_RX0_FORCERXMODE_MASK |
-					(0x0 << DPHY_RX0_FORCERXMODE_BIT) |
-					DPHY_RX0_FORCETXSTOPMODE_MASK |
-					(0x0 << DPHY_RX0_FORCETXSTOPMODE_BIT));
+			DPHY_RX0_FORCERXMODE_MASK |
+			(0x0 << DPHY_RX0_FORCERXMODE_BIT) |
+			DPHY_RX0_FORCETXSTOPMODE_MASK |
+			(0x0 << DPHY_RX0_FORCETXSTOPMODE_BIT));
 
 		/* set lane num */
 		write_grf_reg(GRF_SOC_CON21_OFFSET,

From 93123a0331b957ea5959767ef1a4be5c4e5139d6 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Fri, 10 Aug 2018 08:22:22 +0800
Subject: [PATCH 1035/1852] media: rk-isp10: update to v0.2.1

Change-Id: Ia0656d830bf5dd0b9e89af108d469bfd17f8e64d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10_version.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10_version.h b/drivers/media/platform/rk-isp10/cif_isp10_version.h
index baf64e2a24805..0904b59e94d78 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10_version.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10_version.h
@@ -114,8 +114,12 @@
  *5. fix the issue that setting of isp0 mipi affect txrx dphy.
  *6. fix the issue cannot set exposure by mp path device.
  *
+ *v0.2.0x1
+ *1. add isp reset function.
+ *2. fix the issue that setting of isp0 mipi affect txrx dphy.
+ *
  */
 
-#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 2, 0x0)
+#define CONFIG_CIFISP10_DRIVER_VERSION KERNEL_VERSION(0, 2, 0x1)
 
 #endif

From cc4f3685ad4ea68c29758e85f848c53dafa51d5f Mon Sep 17 00:00:00 2001
From: Sun ChuanHu <aaron.sun@rock-chips.com>
Date: Fri, 10 Aug 2018 10:55:58 +0800
Subject: [PATCH 1036/1852] ARM: dts: rockchip:
 rk3308-voice-module-amic-mainboard-v10-aarch32 support blueetooth alsa card

Change-Id: I7910c76366edf40bc808f71d35a66402ce328ff7
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
---
 ...08-voice-module-amic-mainboard-v10-aarch32.dts |  4 ++++
 ...rk3308-voice-module-mainboard-v10-aarch32.dtsi |  2 +-
 .../boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 15 +++++++++++++++
 3 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
index 5dcc61371bc4e..770d4e91bd2b2 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
@@ -18,6 +18,10 @@
 	rockchip,en-always-grps = <1 2>;
 };
 
+&bluetooth_sound {
+	status = "okay";
+};
+
 &is31fl3236 {
 	reg = <0x3f>;
 };
diff --git a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
index 8d70f702402e1..36b1defbb57cb 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-mainboard-v10-aarch32.dtsi
@@ -41,7 +41,7 @@
 	status = "okay";
 	rockchip,no-deep-low-power;
 	/* ADC3-6 for 4ch capture, loopback to ADC7 */
-	rockchip,adc-grps-route = <1 2 3 0>;
+	rockchip,adc-grps-route = <2 3 1 0>;
 };
 
 &i2c1 {
diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 92a27328cd32d..7fe39a7ee84aa 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -97,6 +97,17 @@
 		status = "disabled";
 	};
 
+	bluetooth_sound: bluetooth-sound {
+		status = "disabled";
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-pcm";
+		rockchip,mclk-fs = <128>;
+		rockchip,cpu = <&i2s_2ch_0>;
+		rockchip,codec = <&dummy_codec>;
+		rockchip,format = "dsp_b";
+		rockchip,wait-card-locked = <0>;
+	};
+
 	spdif_tx_sound: spdif-tx-sound {
 		status = "disabled";
 		compatible = "simple-audio-card";
@@ -211,6 +222,10 @@
 	vccio5-supply = <&vcc_io>;
 };
 
+&i2s_2ch_0 {
+	status = "okay";
+};
+
 &i2s_8ch_2 {
 	status = "okay";
 };

From 68320180f9bbceb28ac9cc5a5efa4a4292a4d869 Mon Sep 17 00:00:00 2001
From: Bian Jin chen <kenjc.bian@rock-chips.com>
Date: Wed, 8 Aug 2018 14:43:48 +0800
Subject: [PATCH 1037/1852] arm64: rockchip_defconfig: Enable
 CONFIG_DM_VERITY_AVB for avb

This is needed to enable the AVB specific dm-verity error handler.

Change-Id: I331ba1e6f459ec51ff8584cf1471ad05dd90f6db
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index ebc02e10fbb03..63f0e2718b0c8 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -258,6 +258,7 @@ CONFIG_DM_CRYPT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_FEC=y
+CONFIG_DM_VERITY_AVB=y
 CONFIG_NETDEVICES=y
 CONFIG_TUN=y
 # CONFIG_NET_VENDOR_3COM is not set

From c53fffe85cf3a8bbfaa2a5157085fc82111c0c9b Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Wed, 8 Aug 2018 18:45:16 +0800
Subject: [PATCH 1038/1852] ARM: rockchip_defconfig: Enable
 CONFIG_DM_VERITY_AVB

This is needed to enable the AVB specific dm-verity error handler.

Change-Id: Ic367b266d0e39232a6303eb59c82b9b69fc1b9cc
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index bfd39a11a2c37..fd1ef2e1466be 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -244,6 +244,7 @@ CONFIG_DM_CRYPT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_FEC=y
+CONFIG_DM_VERITY_AVB=y
 CONFIG_NETDEVICES=y
 CONFIG_TUN=y
 # CONFIG_NET_VENDOR_ARC is not set

From d9f28751c62b4aff62213e5abf1160c7626537bb Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Sat, 11 Aug 2018 09:59:48 +0800
Subject: [PATCH 1039/1852] net: wireless: rockchip_wlan: ssv6051 solve panic
 occasionally in ssv6xxx_late_resume

Change-Id: I0318f3fb2e86f8f4258c5e951d904407a87b88d2
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c    | 6 +++---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c | 2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
index 119b175cd1536..3341c8bf08730 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
@@ -468,7 +468,7 @@ int ssv6xxx_set_channel(struct ssv_softc *sc, int ch)
                 printk("0xce0100a0 [%x]\n",regval);
                 printk("[%x][%x][%x]\n",vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_N,vt_tbl[sh->cfg.crystal_type][chidx].rf_ctrl_F,vt_tbl[sh->cfg.crystal_type][chidx].rf_precision_default);
 #endif
-                dev_info(sc->dev, "Lock to channel %d ([0xce010098]=%x)!!\n", vt_tbl[sh->cfg.crystal_type][chidx].channel_id, regval);
+                //dev_info(sc->dev, "Lock to channel %d ([0xce010098]=%x)!!\n", vt_tbl[sh->cfg.crystal_type][chidx].channel_id, regval);
                 sc->hw_chan = ch;
                 goto exit;
             }
@@ -4178,7 +4178,7 @@ static void ssv6200_sw_scan_start(struct ieee80211_hw *hw)
 #ifdef CONFIG_SSV_MRX_EN3_CTRL
     SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_MRX_FLT_EN3, 0x0400);
 #endif
-    printk("--------------%s(): \n", __FUNCTION__);
+    //printk("--------------%s(): \n", __FUNCTION__);
 }
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
 static void ssv6200_sw_scan_complete(struct ieee80211_hw *hw,
@@ -4199,7 +4199,7 @@ static void ssv6200_sw_scan_complete(struct ieee80211_hw *hw)
     if(((struct ssv_softc *)(hw->priv))->ps_aid != 0 && (!is_p2p_assoc))
     SMAC_REG_WRITE(((struct ssv_softc *)(hw->priv))->sh, ADR_MRX_FLT_EN3, 0x1000);
 #endif
-    printk("==============%s(): \n", __FUNCTION__);
+    //printk("==============%s(): \n", __FUNCTION__);
 }
 static int ssv6200_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
                             bool set)
diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
index 86f6dee6cc179..82d236539f949 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/ssv_pm.c
@@ -90,6 +90,8 @@ void ssv6xxx_late_resume(void)
 #else
  struct ssv_softc *sc = ssv_notify_sc;
 #endif
+	if (!sc)
+		return;
     if(sc->ps_status == PWRSV_ENABLE)
     {
         if(sc->vif_info[0].vif)

From 95dc78113b83b323e7c8927954fcc99281c757de Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Mon, 13 Aug 2018 10:03:14 +0800
Subject: [PATCH 1040/1852] arm: rk3308_linux_aarch32[_debug]_defconfig:
 support for LZ4 compressed squashfs

Change-Id: I27709370aa565d5d0622b5b5b1437247ba8dc3db
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 1 +
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 3e57addaebbe7..d8d4fbeec2db6 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -233,6 +233,7 @@ CONFIG_NTFS_FS=m
 CONFIG_TMPFS=y
 CONFIG_SQUASHFS=y
 CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+CONFIG_SQUASHFS_LZ4=y
 CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
 CONFIG_PSTORE=y
 CONFIG_PSTORE_CONSOLE=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index fbacc3d30f302..0ea6147348a8f 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -233,6 +233,7 @@ CONFIG_NTFS_FS=m
 CONFIG_TMPFS=y
 CONFIG_SQUASHFS=y
 CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+CONFIG_SQUASHFS_LZ4=y
 CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
 CONFIG_PSTORE=y
 CONFIG_PSTORE_CONSOLE=y

From 7ed17f78acd35ad7a79751106344e7fc9404f4f0 Mon Sep 17 00:00:00 2001
From: Putin Lee <putin.li@rock-chips.com>
Date: Thu, 2 Aug 2018 20:22:48 +0800
Subject: [PATCH 1041/1852] video/rockchip: rga: Fixup erroneous judgment
 conditions for scale limit

Change-Id: I9d61e4851d38f8e029ed14ee05699d5dc8b4531e
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
---
 drivers/video/rockchip/rga/rga_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/rockchip/rga/rga_drv.c b/drivers/video/rockchip/rga/rga_drv.c
index 26d68221c9902..31a8da79984ab 100755
--- a/drivers/video/rockchip/rga/rga_drv.c
+++ b/drivers/video/rockchip/rga/rga_drv.c
@@ -959,7 +959,7 @@ static int rga_blit(rga_session *session, struct rga_req *req)
 				goto err_put_dma_buf;
 			}
 
-			if (((daw >> 3) >= saw) || ((dah >> 3) >= daw)) {
+			if (((daw >> 3) >= saw) || ((dah >> 3) >= sah)) {
 				pr_err("unsupported to scaling more than 8 \n");
 				goto err_put_dma_buf;
 			}

From 27f1fbea13b41f4db8baa65e0d14c2c2703669d8 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Fri, 10 Aug 2018 09:53:33 +0800
Subject: [PATCH 1042/1852] pinctrl: rockchip: Disable GPIO_INTEN bit while
 gpio irq type setting

If the gpio IRQ type changes, it is possible to accidentally trigger
an interrupt, such as when the input is high, changed from level to
rise edge. For now, the best way to do this is to disable the INTEN
bit first, then configure the type to stagger this period of time.

Change-Id: I71351b9ed6f7920958c7451c2e51ab5f699875d1
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 30379c3f8118a..904d7f106cc4c 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3384,6 +3384,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
 	u32 polarity;
 	u32 level;
 	u32 data;
+	u32 inten;
 	unsigned long flags;
 	int ret;
 
@@ -3454,8 +3455,19 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
 		return -EINVAL;
 	}
 
+	/*
+	 * Accroding to the steps of gpio interrupt, write GPIO_INTEN[x] as
+	 * 1 to enable GPIO’s interrupt should be done after the level and
+	 * polarity configured.
+	 */
+
+	inten = readl_relaxed(gc->reg_base + GPIO_INTEN);
+	inten &= ~mask;
+	writel_relaxed(inten, gc->reg_base + GPIO_INTEN);
 	writel_relaxed(level, gc->reg_base + GPIO_INTTYPE_LEVEL);
 	writel_relaxed(polarity, gc->reg_base + GPIO_INT_POLARITY);
+	inten |= mask;
+	writel_relaxed(inten, gc->reg_base + GPIO_INTEN);
 
 	irq_gc_unlock(gc);
 	raw_spin_unlock_irqrestore(&bank->slock, flags);

From 4790a93ddc7405dcf322d4799c9c034dd0c6fdb5 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 10 Aug 2018 16:22:03 +0800
Subject: [PATCH 1043/1852] media: soc_camera: ov9750 support as-master
 inexistence

as-master = <1>: will set ov9750 as master mode
as-master = <0>: will set ov9750 as slave mode
as-master inexistence: will set ov9750 as normal mode

Change-Id: Ibea5769be6c126b9365ed9333ac931d20ca20f2f
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 .../i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c  | 11 +++++++----
 .../media/i2c/soc_camera/rockchip/ov_camera_module.h  |  2 +-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
index 69b4be96ce662..3e7476860fd26 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
@@ -341,7 +341,7 @@ static struct ov_camera_module_config ov9750_configs[] = {
 
 static int ov9750_dual_mode(struct ov_camera_module *cam_mod)
 {
-	if (cam_mod->as_master) {
+	if (cam_mod->as_master == 1) {
 		ov_camera_module_write_reg(cam_mod, 0x3002, 0xa1);
 		ov_camera_module_write_reg(cam_mod, 0x3007, 0x02);
 		ov_camera_module_write_reg(cam_mod, 0x3816, 0x00);
@@ -350,10 +350,12 @@ static int ov9750_dual_mode(struct ov_camera_module *cam_mod)
 		ov_camera_module_write_reg(cam_mod, 0x3819, 0x01);
 		ov_camera_module_write_reg(cam_mod, 0x3823, 0x00);
 		ov_camera_module_write_reg(cam_mod, 0x3824, 0x00);
-	} else {
+	} else if (cam_mod->as_master == 0) {
 		ov_camera_module_write_reg(cam_mod, 0x3002, 0x21);
 		ov_camera_module_write_reg(cam_mod, 0x3823, 0x48);
 		ov_camera_module_write_reg(cam_mod, 0x3824, 0x11);
+	} else {
+		;/* do nothing */
 	}
 	return 0;
 }
@@ -971,6 +973,7 @@ static int ov9750_probe(struct i2c_client *client,
 	const struct i2c_device_id *id)
 {
 	int ret = 0;
+	int as_master = -1;
 	struct device_node *np = of_node_get(client->dev.of_node);
 
 	dev_info(&client->dev, "probing cam_num:%d 0x%x\n",
@@ -982,8 +985,8 @@ static int ov9750_probe(struct i2c_client *client,
 
 	ov9750[cam_num].custom = ov9750_custom_config;
 
-	of_property_read_u32(np, "as-master", &ret);
-	ov9750[cam_num].as_master = (ret == 0) ? false : true;
+	ret = of_property_read_u32(np, "as-master", &as_master);
+	ov9750[cam_num].as_master = (ret == 0) ? as_master : -1;
 	cam_num++;
 
 	dev_info(&client->dev, "probing successful\n");
diff --git a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
index 11644dc478344..1ae6576a1b74c 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
+++ b/drivers/media/i2c/soc_camera/rockchip/ov_camera_module.h
@@ -206,7 +206,7 @@ struct ov_camera_module {
 	u32 rotation;
 	void *pltfm_data;
 	bool inited;
-	bool as_master;
+	int as_master;
 	struct mutex lock;
 };
 

From e499f6d43f06e620814f9bd751bf26b756f1ef38 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 7 Aug 2018 16:37:25 +0800
Subject: [PATCH 1044/1852] PM / devfreq: rockchip_dmc: Optimize function
 rockchip_dmcfreq_probe()

Make the function rockchip_dmcfreq_probe() clearer.

Change-Id: Ia752b57000be6fb8135a2576e4892fd489130461
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/devfreq/rockchip_dmc.c | 575 ++++++++++++++++++++-------------
 1 file changed, 342 insertions(+), 233 deletions(-)

diff --git a/drivers/devfreq/rockchip_dmc.c b/drivers/devfreq/rockchip_dmc.c
index 06591a609a64a..75db293b3d970 100644
--- a/drivers/devfreq/rockchip_dmc.c
+++ b/drivers/devfreq/rockchip_dmc.c
@@ -56,11 +56,11 @@
 #include "governor.h"
 
 #define system_status_to_dmcfreq(nb) container_of(nb, struct rockchip_dmcfreq, \
-						  system_status_nb)
+						  status_nb)
 #define reboot_to_dmcfreq(nb) container_of(nb, struct rockchip_dmcfreq, \
 					   reboot_nb)
-#define df_update_to_dmcfreq(work) container_of(work, struct rockchip_dmcfreq, \
-						devfreq_update)
+#define boost_to_dmcfreq(work) container_of(work, struct rockchip_dmcfreq, \
+					    boost_work)
 #define input_hd_to_dmcfreq(hd) container_of(hd, struct rockchip_dmcfreq, \
 					     input_handler)
 
@@ -809,12 +809,12 @@ struct rockchip_dmcfreq {
 	struct mutex lock; /* serializes access to video_info_list */
 	struct dram_timing *timing;
 	struct regulator *vdd_center;
-	struct notifier_block system_status_nb;
+	struct notifier_block status_nb;
 	struct notifier_block reboot_nb;
 	struct notifier_block fb_nb;
 	struct list_head video_info_list;
 	struct freq_map_table *vop_bw_tbl;
-	struct work_struct devfreq_update;
+	struct work_struct boost_work;
 	struct input_handler input_handler;
 	struct thermal_opp_info *opp_info;
 
@@ -842,6 +842,7 @@ struct rockchip_dmcfreq {
 
 	unsigned int min_cpu_freq;
 	unsigned int auto_freq_en;
+	unsigned int system_status_en;
 	unsigned int refresh;
 	unsigned int last_refresh;
 	bool is_fixed;
@@ -1176,58 +1177,6 @@ static struct devfreq_dev_profile rockchip_devfreq_dmc_profile = {
 	.get_cur_freq	= rockchip_dmcfreq_get_cur_freq,
 };
 
-static __maybe_unused int rockchip_dmcfreq_suspend(struct device *dev)
-{
-	struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
-	int ret = 0;
-
-	if (!dmcfreq)
-		return 0;
-
-	if (dmcfreq->edev) {
-		ret = devfreq_event_disable_edev(dmcfreq->edev);
-		if (ret < 0) {
-			dev_err(dev, "failed to disable the devfreq-event devices\n");
-			return ret;
-		}
-	}
-
-	ret = devfreq_suspend_device(dmcfreq->devfreq);
-	if (ret < 0) {
-		dev_err(dev, "failed to suspend the devfreq devices\n");
-		return ret;
-	}
-
-	return 0;
-}
-
-static __maybe_unused int rockchip_dmcfreq_resume(struct device *dev)
-{
-	struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
-	int ret = 0;
-
-	if (!dmcfreq)
-		return 0;
-
-	if (dmcfreq->edev) {
-		ret = devfreq_event_enable_edev(dmcfreq->edev);
-		if (ret < 0) {
-			dev_err(dev, "failed to enable the devfreq-event devices\n");
-			return ret;
-		}
-	}
-
-	ret = devfreq_resume_device(dmcfreq->devfreq);
-	if (ret < 0) {
-		dev_err(dev, "failed to resume the devfreq devices\n");
-		return ret;
-	}
-	return ret;
-}
-
-static SIMPLE_DEV_PM_OPS(rockchip_dmcfreq_pm, rockchip_dmcfreq_suspend,
-			 rockchip_dmcfreq_resume);
-
 static int rockchip_dmcfreq_init_freq_table(struct device *dev,
 					    struct devfreq_dev_profile *devp)
 {
@@ -2834,9 +2783,247 @@ static struct devfreq_governor devfreq_dmc_ondemand = {
 	.event_handler = devfreq_dmc_ondemand_handler,
 };
 
-static void rockchip_dmcfreq_devfreq_update(struct work_struct *work)
+static int rockchip_dmcfreq_enable_event(struct rockchip_dmcfreq *dmcfreq)
+{
+	int ret;
+
+	if (!dmcfreq->auto_freq_en)
+		return 0;
+
+	ret = devfreq_event_enable_edev(dmcfreq->edev);
+	if (ret < 0) {
+		dev_err(dmcfreq->dev,
+			"failed to enable devfreq-event devices\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_dmcfreq_disable_event(struct rockchip_dmcfreq *dmcfreq)
+{
+	int ret;
+
+	if (!dmcfreq->auto_freq_en)
+		return 0;
+
+	ret = devfreq_event_disable_edev(dmcfreq->edev);
+	if (ret < 0) {
+		dev_err(dmcfreq->dev,
+			"failed to disable devfreq-event devices\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_dmcfreq_get_event(struct rockchip_dmcfreq *dmcfreq)
+{
+	struct device *dev = dmcfreq->dev;
+	struct device_node *events_np, *np = dev->of_node;
+	int ret = 0;
+
+	events_np = of_parse_phandle(np, "devfreq-events", 0);
+	if (!events_np)
+		return 0;
+	if (!of_device_is_available(events_np))
+		goto out;
+	dmcfreq->edev = devfreq_event_get_edev_by_phandle(dev, 0);
+	if (IS_ERR(dmcfreq->edev))
+		ret = -EPROBE_DEFER;
+	else
+		dmcfreq->auto_freq_en = true;
+out:
+	of_node_put(events_np);
+
+	return ret;
+}
+
+static int rockchip_dmcfreq_power_control(struct rockchip_dmcfreq *dmcfreq)
+{
+	struct device *dev = dmcfreq->dev;
+
+	dmcfreq->vdd_center = devm_regulator_get_optional(dev, "center");
+	if (IS_ERR(dmcfreq->vdd_center)) {
+		dev_err(dev, "Cannot get the regulator \"center\"\n");
+		return PTR_ERR(dmcfreq->vdd_center);
+	}
+
+	dmcfreq->dmc_clk = devm_clk_get(dev, "dmc_clk");
+	if (IS_ERR(dmcfreq->dmc_clk)) {
+		dev_err(dev, "Cannot get the clk dmc_clk\n");
+		return PTR_ERR(dmcfreq->dmc_clk);
+	}
+	dmcfreq->rate = clk_get_rate(dmcfreq->dmc_clk);
+
+	return 0;
+}
+
+static int rockchip_dmcfreq_dmc_init(struct platform_device *pdev,
+				     struct rockchip_dmcfreq *dmcfreq)
+{
+	const struct of_device_id *match;
+	int (*init)(struct platform_device *pdev,
+		    struct rockchip_dmcfreq *data);
+	int ret;
+
+	match = of_match_node(rockchip_dmcfreq_of_match, pdev->dev.of_node);
+	if (match) {
+		init = match->data;
+		if (init) {
+			ret = init(pdev, dmcfreq);
+			if (ret)
+				return ret;
+		}
+	}
+
+	return 0;
+}
+
+static void rockchip_dmcfreq_parse_dt(struct rockchip_dmcfreq *dmcfreq)
+{
+	struct device *dev = dmcfreq->dev;
+	struct device_node *np = dev->of_node;
+
+	if (!rockchip_get_system_status_rate(np, "system-status-freq",
+					     dmcfreq))
+		dmcfreq->system_status_en = true;
+	of_property_read_u32(np, "min-cpu-freq", &dmcfreq->min_cpu_freq);
+
+	of_property_read_u32(np, "upthreshold",
+			     &dmcfreq->ondemand_data.upthreshold);
+	of_property_read_u32(np, "downdifferential",
+			     &dmcfreq->ondemand_data.downdifferential);
+	if (dmcfreq->auto_freq_en)
+		of_property_read_u32(np, "auto-freq-en",
+				     &dmcfreq->auto_freq_en);
+	of_property_read_u32(np, "auto-min-freq",
+			     (u32 *)&dmcfreq->auto_min_rate);
+	dmcfreq->auto_min_rate *= 1000;
+
+	if (rockchip_get_freq_map_talbe(np, "vop-bw-dmc-freq",
+					&dmcfreq->vop_bw_tbl))
+		dev_err(dev, "failed to get vop bandwidth to dmc rate\n");
+
+	of_property_read_u32(np, "touchboost_duration",
+			     (u32 *)&dmcfreq->touchboostpulse_duration_val);
+	if (dmcfreq->touchboostpulse_duration_val)
+		dmcfreq->touchboostpulse_duration_val *= USEC_PER_MSEC;
+	else
+		dmcfreq->touchboostpulse_duration_val = 500 * USEC_PER_MSEC;
+}
+
+static int rockchip_dmcfreq_set_volt_only(struct rockchip_dmcfreq *dmcfreq)
+{
+	struct device *dev = dmcfreq->dev;
+	struct dev_pm_opp *opp;
+	unsigned long opp_volt, opp_rate = dmcfreq->rate;
+	int ret;
+
+	rcu_read_lock();
+	opp = devfreq_recommended_opp(dev, &opp_rate, 0);
+	if (IS_ERR(opp)) {
+		rcu_read_unlock();
+		return PTR_ERR(opp);
+	}
+	opp_volt = dev_pm_opp_get_voltage(opp);
+	rcu_read_unlock();
+
+	ret = regulator_set_voltage(dmcfreq->vdd_center, opp_volt, INT_MAX);
+	if (ret) {
+		dev_err(dev, "Cannot set voltage %lu uV\n", opp_volt);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_dmcfreq_add_devfreq(struct rockchip_dmcfreq *dmcfreq)
+{
+	struct devfreq_dev_profile *devp = &rockchip_devfreq_dmc_profile;
+	struct device *dev = dmcfreq->dev;
+	struct dev_pm_opp *opp;
+	unsigned long opp_rate = dmcfreq->rate;
+
+	rcu_read_lock();
+	opp = devfreq_recommended_opp(dev, &opp_rate, 0);
+	if (IS_ERR(opp)) {
+		rcu_read_unlock();
+		return PTR_ERR(opp);
+	}
+	rcu_read_unlock();
+
+	if (rockchip_dmcfreq_init_freq_table(dev, devp)) {
+		dev_err(dev, "failed to set init freq talbe\n");
+		return -EFAULT;
+	}
+
+	devp->initial_freq = dmcfreq->rate;
+	dmcfreq->devfreq = devm_devfreq_add_device(dev, devp,
+						   "dmc_ondemand",
+						   &dmcfreq->ondemand_data);
+	if (IS_ERR(dmcfreq->devfreq)) {
+		dev_err(dev, "failed to add devfreq\n");
+		return PTR_ERR(dmcfreq->devfreq);
+	}
+
+	devm_devfreq_register_opp_notifier(dev, dmcfreq->devfreq);
+
+	dmcfreq->min = devp->freq_table[0];
+	dmcfreq->max =
+		devp->freq_table[devp->max_state ? devp->max_state - 1 : 0];
+	dmcfreq->devfreq->min_freq = dmcfreq->min;
+	dmcfreq->devfreq->max_freq = dmcfreq->max;
+	dmcfreq->devfreq->last_status.current_frequency = opp_rate;
+
+	reset_last_status(dmcfreq->devfreq);
+
+	return 0;
+}
+
+static void rockchip_dmcfreq_register_notifier(struct rockchip_dmcfreq *dmcfreq)
 {
-	struct rockchip_dmcfreq *dmcfreq = df_update_to_dmcfreq(work);
+	int ret;
+
+	if (vop_register_dmc())
+		dev_err(dmcfreq->dev, "fail to register notify to vop.\n");
+
+	dmcfreq->status_nb.notifier_call =
+		rockchip_dmcfreq_system_status_notifier;
+	ret = rockchip_register_system_status_notifier(&dmcfreq->status_nb);
+	if (ret)
+		dev_err(dmcfreq->dev, "failed to register system_status nb\n");
+
+	dmcfreq->reboot_nb.notifier_call = rockchip_dmcfreq_reboot_notifier;
+	ret = register_reboot_notifier(&dmcfreq->reboot_nb);
+	if (ret)
+		dev_err(dmcfreq->dev, "failed to register reboot nb\n");
+
+	dmcfreq->fb_nb.notifier_call = rockchip_dmcfreq_fb_notifier;
+	ret = fb_register_client(&dmcfreq->fb_nb);
+	if (ret)
+		dev_err(dmcfreq->dev, "failed to register fb nb\n");
+
+	dmc_devdata.data = dmcfreq->devfreq;
+	dmcfreq->opp_info = rockchip_register_thermal_notifier(dmcfreq->dev,
+							       &dmc_devdata);
+	if (IS_ERR(dmcfreq->opp_info)) {
+		dev_dbg(dmcfreq->dev, "without thermal notifier\n");
+		dmcfreq->opp_info = NULL;
+	}
+}
+
+static void rockchip_dmcfreq_add_interface(struct rockchip_dmcfreq *dmcfreq)
+{
+	if (sysfs_create_file(&dmcfreq->devfreq->dev.kobj,
+			      &dev_attr_system_status.attr))
+		dev_err(dmcfreq->dev,
+			"failed to register system_status sysfs file\n");
+}
+
+static void rockchip_dmcfreq_boost_work(struct work_struct *work)
+{
+	struct rockchip_dmcfreq *dmcfreq = boost_to_dmcfreq(work);
 
 	rockchip_dmcfreq_update_target(dmcfreq);
 }
@@ -2858,7 +3045,7 @@ static void rockchip_dmcfreq_input_event(struct input_handle *handle,
 		return;
 	dmcfreq->touchboostpulse_endtime = endtime;
 
-	schedule_work(&dmcfreq->devfreq_update);
+	schedule_work(&dmcfreq->boost_work);
 }
 
 static int rockchip_dmcfreq_input_connect(struct input_handler *handler,
@@ -2924,6 +3111,20 @@ static const struct input_device_id rockchip_dmcfreq_input_ids[] = {
 	{ },
 };
 
+static void rockchip_dmcfreq_boost_init(struct rockchip_dmcfreq *dmcfreq)
+{
+	if (!dmcfreq->boost_rate)
+		return;
+	INIT_WORK(&dmcfreq->boost_work, rockchip_dmcfreq_boost_work);
+	dmcfreq->input_handler.event = rockchip_dmcfreq_input_event;
+	dmcfreq->input_handler.connect = rockchip_dmcfreq_input_connect;
+	dmcfreq->input_handler.disconnect = rockchip_dmcfreq_input_disconnect;
+	dmcfreq->input_handler.name = "dmcfreq";
+	dmcfreq->input_handler.id_table = rockchip_dmcfreq_input_ids;
+	if (input_register_handler(&dmcfreq->input_handler))
+		dev_err(dmcfreq->dev, "failed to register input handler\n");
+}
+
 static unsigned long model_static_power(struct devfreq *devfreq,
 					unsigned long voltage)
 {
@@ -3023,223 +3224,131 @@ static int ddr_power_model_simple_init(struct rockchip_dmcfreq *dmcfreq)
 	return 0;
 }
 
+static void
+rockchip_dmcfreq_register_cooling_device(struct rockchip_dmcfreq *dmcfreq)
+{
+	int ret;
+
+	ret = ddr_power_model_simple_init(dmcfreq);
+	if (ret)
+		return;
+	dmcfreq->devfreq_cooling =
+		of_devfreq_cooling_register_power(dmcfreq->dev->of_node,
+						  dmcfreq->devfreq,
+						  &ddr_cooling_power_data);
+	if (IS_ERR_OR_NULL(dmcfreq->devfreq_cooling)) {
+		ret = PTR_ERR(dmcfreq->devfreq_cooling);
+		dev_err(dmcfreq->dev,
+			"Failed to register cooling device (%d)\n",
+			ret);
+	}
+}
+
 static int rockchip_dmcfreq_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct device_node *events_np, *np = pdev->dev.of_node;
 	struct rockchip_dmcfreq *data;
-	struct devfreq_dev_profile *devp = &rockchip_devfreq_dmc_profile;
-	struct dev_pm_opp *opp;
-	const struct of_device_id *match;
-	int (*init)(struct platform_device *pdev,
-		    struct rockchip_dmcfreq *data);
-	unsigned long opp_rate, opp_volt;
-	bool is_events_available = false;
 	int ret;
 
 	data = devm_kzalloc(dev, sizeof(struct rockchip_dmcfreq), GFP_KERNEL);
 	if (!data)
 		return -ENOMEM;
 
+	data->dev = dev;
 	mutex_init(&data->lock);
 	INIT_LIST_HEAD(&data->video_info_list);
 
-	data->vdd_center = devm_regulator_get_optional(dev, "center");
-	if (IS_ERR(data->vdd_center)) {
-		dev_err(dev, "Cannot get the regulator \"center\"\n");
-		return PTR_ERR(data->vdd_center);
-	}
-
-	data->dmc_clk = devm_clk_get(dev, "dmc_clk");
-	if (IS_ERR(data->dmc_clk)) {
-		dev_err(dev, "Cannot get the clk dmc_clk\n");
-		return PTR_ERR(data->dmc_clk);
-	}
+	ret = rockchip_dmcfreq_get_event(data);
+	if (ret)
+		return ret;
 
-	events_np = of_parse_phandle(np, "devfreq-events", 0);
-	if (events_np && of_device_is_available(events_np)) {
-		of_node_put(events_np);
-		data->edev = devfreq_event_get_edev_by_phandle(dev, 0);
-		if (IS_ERR(data->edev))
-			return -EPROBE_DEFER;
-
-		ret = devfreq_event_enable_edev(data->edev);
-		if (ret < 0) {
-			dev_err(dev, "failed to enable devfreq-event devices\n");
-			return ret;
-		}
-		is_events_available = true;
-	}
+	ret = rockchip_dmcfreq_power_control(data);
+	if (ret)
+		return ret;
 
-	match = of_match_node(rockchip_dmcfreq_of_match, pdev->dev.of_node);
-	if (match) {
-		init = match->data;
-		if (init) {
-			ret = init(pdev, data);
-			if (ret)
-				return ret;
-		}
-	}
+	ret = rockchip_dmcfreq_dmc_init(pdev, data);
+	if (ret)
+		return ret;
 
-	/*
-	 * We add a devfreq driver to our parent since it has a device tree node
-	 * with operating points.
-	 */
 	ret = rockchip_init_opp_table(dev, NULL, "ddr_leakage", "center");
-	if (ret) {
-		dev_err(dev, "Failed to init_opp_table (%d)\n", ret);
+	if (ret)
 		return ret;
-	}
 
-	if (rockchip_dmcfreq_init_freq_table(dev, devp))
-		return -EFAULT;
-
-	data->rate = clk_get_rate(data->dmc_clk);
-	devp->initial_freq = data->rate;
-	opp_rate = data->rate;
-
-	rcu_read_lock();
-	opp = devfreq_recommended_opp(dev, &opp_rate, 0);
-	if (IS_ERR(opp)) {
-		rcu_read_unlock();
-		return PTR_ERR(opp);
-	}
-	opp_volt = dev_pm_opp_get_voltage(opp);
-	rcu_read_unlock();
-
-	of_property_read_u32(np, "auto-freq-en", &data->auto_freq_en);
-	if (!is_events_available && data->auto_freq_en) {
-		dev_warn(dev, "events isn't available, close auto freq\n");
-		data->auto_freq_en = 0;
-	}
-	ret = rockchip_get_system_status_rate(np, "system-status-freq", data);
-	if (ret) {
-		dev_err(dev, "failed to get system status rate\n");
-		if (ret == -ENODEV && !data->auto_freq_en) {
-			dev_info(dev, "don't add devfreq feature\n");
-			if (data->edev)
-				devfreq_event_disable_edev(data->edev);
-			ret = regulator_set_voltage(data->vdd_center, opp_volt,
-						    INT_MAX);
-			if (ret) {
-				dev_err(dev, "Cannot set voltage %lu uV\n",
-					opp_volt);
-				return ret;
-			}
-			return 0;
-		}
+	rockchip_dmcfreq_parse_dt(data);
+	if (!data->system_status_en && !data->auto_freq_en) {
+		dev_info(dev, "don't add devfreq feature\n");
+		return rockchip_dmcfreq_set_volt_only(data);
 	}
 
-	of_property_read_u32(np, "upthreshold",
-			     &data->ondemand_data.upthreshold);
-	of_property_read_u32(np, "downdifferential",
-			     &data->ondemand_data.downdifferential);
-	of_property_read_u32(np, "min-cpu-freq", &data->min_cpu_freq);
-	of_property_read_u32(np, "auto-min-freq", (u32 *)&data->auto_min_rate);
-	data->auto_min_rate *= 1000;
-	if (rockchip_get_freq_map_talbe(np, "vop-bw-dmc-freq",
-					&data->vop_bw_tbl))
-		dev_err(dev, "failed to get vop bandwidth to dmc rate\n");
-	of_property_read_u32(np, "touchboost_duration",
-			     (u32 *)&data->touchboostpulse_duration_val);
-	if (data->touchboostpulse_duration_val)
-		data->touchboostpulse_duration_val *= USEC_PER_MSEC;
-	else
-		data->touchboostpulse_duration_val = 500 * USEC_PER_MSEC;
-
 	pm_qos_add_request(&pm_qos, PM_QOS_CPU_DMA_LATENCY,
 			   PM_QOS_DEFAULT_VALUE);
+	platform_set_drvdata(pdev, data);
 
 	ret = devfreq_add_governor(&devfreq_dmc_ondemand);
+	if (ret)
+		return ret;
+	ret = rockchip_dmcfreq_enable_event(data);
+	if (ret)
+		return ret;
+	ret = rockchip_dmcfreq_add_devfreq(data);
 	if (ret) {
-		dev_err(dev, "Failed to add rockchip governor: %d\n", ret);
+		rockchip_dmcfreq_disable_event(data);
 		return ret;
 	}
 
-	data->dev = dev;
-	platform_set_drvdata(pdev, data);
-
-	data->devfreq = devm_devfreq_add_device(dev, devp,
-						"dmc_ondemand",
-						&data->ondemand_data);
-	if (IS_ERR(data->devfreq))
-		return PTR_ERR(data->devfreq);
-
-	devm_devfreq_register_opp_notifier(dev, data->devfreq);
-
-	data->min = devp->freq_table[0];
-	data->max = devp->freq_table[devp->max_state ? devp->max_state - 1 : 0];
-	data->devfreq->min_freq = data->min;
-	data->devfreq->max_freq = data->max;
-	data->devfreq->last_status.current_frequency = opp_rate;
-	reset_last_status(data->devfreq);
+	rockchip_dmcfreq_register_notifier(data);
+	rockchip_dmcfreq_add_interface(data);
+	rockchip_dmcfreq_boost_init(data);
+	rockchip_dmcfreq_register_cooling_device(data);
 
-	if (vop_register_dmc())
-		dev_err(dev, "fail to register notify to vop.\n");
+	rockchip_set_system_status(SYS_STATUS_NORMAL);
 
-	data->system_status_nb.notifier_call =
-		rockchip_dmcfreq_system_status_notifier;
-	ret = rockchip_register_system_status_notifier(&data->system_status_nb);
-	if (ret)
-		dev_err(dev, "failed to register system_status nb\n");
+	return 0;
+}
 
-	data->reboot_nb.notifier_call = rockchip_dmcfreq_reboot_notifier;
-	ret = register_reboot_notifier(&data->reboot_nb);
-	if (ret)
-		dev_err(dev, "failed to register reboot nb\n");
+static __maybe_unused int rockchip_dmcfreq_suspend(struct device *dev)
+{
+	struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
+	int ret = 0;
 
-	data->fb_nb.notifier_call = rockchip_dmcfreq_fb_notifier;
-	ret = fb_register_client(&data->fb_nb);
-	if (ret)
-		dev_err(dev, "failed to register fb nb\n");
+	if (!dmcfreq)
+		return 0;
 
-	ret = sysfs_create_file(&data->devfreq->dev.kobj,
-				&dev_attr_system_status.attr);
+	ret = rockchip_dmcfreq_disable_event(dmcfreq);
 	if (ret)
-		dev_err(dev, "failed to register system_status sysfs file\n");
+		return ret;
 
-	if (data->boost_rate) {
-		INIT_WORK(&data->devfreq_update,
-			  rockchip_dmcfreq_devfreq_update);
-		data->input_handler.event = rockchip_dmcfreq_input_event;
-		data->input_handler.connect = rockchip_dmcfreq_input_connect;
-		data->input_handler.disconnect =
-			rockchip_dmcfreq_input_disconnect;
-		data->input_handler.name = "dmcfreq";
-		data->input_handler.id_table = rockchip_dmcfreq_input_ids;
-		ret = input_register_handler(&data->input_handler);
-		if (ret)
-			dev_err(dev, "failed to register input handler\n");
+	ret = devfreq_suspend_device(dmcfreq->devfreq);
+	if (ret < 0) {
+		dev_err(dev, "failed to suspend the devfreq devices\n");
+		return ret;
 	}
 
-	dmc_devdata.data = data->devfreq;
-	data->opp_info = rockchip_register_thermal_notifier(dev,
-							    &dmc_devdata);
-	if (IS_ERR(data->opp_info)) {
-		dev_dbg(dev, "without thermal notifier\n");
-		data->opp_info = NULL;
-	}
+	return 0;
+}
 
-	ret = ddr_power_model_simple_init(data);
+static __maybe_unused int rockchip_dmcfreq_resume(struct device *dev)
+{
+	struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
+	int ret = 0;
 
-	if (!ret) {
-		data->devfreq_cooling =
-		    of_devfreq_cooling_register_power(data->dev->of_node,
-						      data->devfreq,
-						      &ddr_cooling_power_data);
-		if (IS_ERR_OR_NULL(data->devfreq_cooling)) {
-			ret = PTR_ERR(data->devfreq_cooling);
-			dev_err(data->dev,
-				"Failed to register cooling device (%d)\n",
-				ret);
-		}
-	}
+	if (!dmcfreq)
+		return 0;
 
-	rockchip_set_system_status(SYS_STATUS_NORMAL);
+	ret = rockchip_dmcfreq_enable_event(dmcfreq);
+	if (ret)
+		return ret;
 
-	return 0;
+	ret = devfreq_resume_device(dmcfreq->devfreq);
+	if (ret < 0) {
+		dev_err(dev, "failed to resume the devfreq devices\n");
+		return ret;
+	}
+	return ret;
 }
 
+static SIMPLE_DEV_PM_OPS(rockchip_dmcfreq_pm, rockchip_dmcfreq_suspend,
+			 rockchip_dmcfreq_resume);
 static struct platform_driver rockchip_dmcfreq_driver = {
 	.probe	= rockchip_dmcfreq_probe,
 	.driver = {

From 646b29fc70284952def6f4f07327c7267bb47e19 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Sat, 11 Aug 2018 12:26:58 +0800
Subject: [PATCH 1045/1852] PM / devfreq: rockchip_dmc: Add support to get
 multiple events data

There are multiple devfreq events and they may be used simultaneously.

Change-Id: I6f4c8754d3bcf5c20215a0689eb843a8f617b7a6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/devfreq/rockchip_dmc.c | 151 +++++++++++++++++++++++++--------
 1 file changed, 116 insertions(+), 35 deletions(-)

diff --git a/drivers/devfreq/rockchip_dmc.c b/drivers/devfreq/rockchip_dmc.c
index 75db293b3d970..ba095fdfea96c 100644
--- a/drivers/devfreq/rockchip_dmc.c
+++ b/drivers/devfreq/rockchip_dmc.c
@@ -805,7 +805,7 @@ struct rockchip_dmcfreq {
 	struct devfreq *devfreq;
 	struct devfreq_simple_ondemand_data ondemand_data;
 	struct clk *dmc_clk;
-	struct devfreq_event_dev *edev;
+	struct devfreq_event_dev **edev;
 	struct mutex lock; /* serializes access to video_info_list */
 	struct dram_timing *timing;
 	struct regulator *vdd_center;
@@ -818,6 +818,7 @@ struct rockchip_dmcfreq {
 	struct input_handler input_handler;
 	struct thermal_opp_info *opp_info;
 
+	unsigned long *nocp_bw;
 	unsigned long rate, target_rate;
 	unsigned long volt, target_volt;
 
@@ -845,6 +846,9 @@ struct rockchip_dmcfreq {
 	unsigned int system_status_en;
 	unsigned int refresh;
 	unsigned int last_refresh;
+	int edev_count;
+	int dfi_id;
+
 	bool is_fixed;
 
 	struct thermal_cooling_device *devfreq_cooling;
@@ -1148,16 +1152,32 @@ static int rockchip_dmcfreq_get_dev_status(struct device *dev,
 {
 	struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
 	struct devfreq_event_data edata;
-	int ret = 0;
-
-	ret = devfreq_event_get_event(dmcfreq->edev, &edata);
-	if (ret < 0)
-		return ret;
-
-	stat->busy_time = edata.load_count;
-	stat->total_time = edata.total_count;
+	int i, j, ret = 0;
+
+	if (dmcfreq->dfi_id >= 0) {
+		ret = devfreq_event_get_event(dmcfreq->edev[dmcfreq->dfi_id],
+					      &edata);
+		if (ret < 0) {
+			dev_err(dev, "failed to get dfi event\n");
+			return ret;
+		}
+		stat->busy_time = edata.load_count;
+		stat->total_time = edata.total_count;
+	}
+
+	for (i = 0, j = 0; i < dmcfreq->edev_count; i++) {
+		if (i == dmcfreq->dfi_id)
+			continue;
+		ret = devfreq_event_get_event(dmcfreq->edev[i], &edata);
+		if (ret < 0) {
+			dev_err(dev, "failed to get event %s\n",
+				dmcfreq->edev[i]->desc->name);
+			return ret;
+		}
+		dmcfreq->nocp_bw[j++] = edata.load_count;
+	}
 
-	return ret;
+	return 0;
 }
 
 static int rockchip_dmcfreq_get_cur_freq(struct device *dev,
@@ -2785,16 +2805,18 @@ static struct devfreq_governor devfreq_dmc_ondemand = {
 
 static int rockchip_dmcfreq_enable_event(struct rockchip_dmcfreq *dmcfreq)
 {
-	int ret;
+	int i, ret;
 
 	if (!dmcfreq->auto_freq_en)
 		return 0;
 
-	ret = devfreq_event_enable_edev(dmcfreq->edev);
-	if (ret < 0) {
-		dev_err(dmcfreq->dev,
-			"failed to enable devfreq-event devices\n");
-		return ret;
+	for (i = 0; i < dmcfreq->edev_count; i++) {
+		ret = devfreq_event_enable_edev(dmcfreq->edev[i]);
+		if (ret < 0) {
+			dev_err(dmcfreq->dev,
+				"failed to enable devfreq-event\n");
+			return ret;
+		}
 	}
 
 	return 0;
@@ -2802,41 +2824,100 @@ static int rockchip_dmcfreq_enable_event(struct rockchip_dmcfreq *dmcfreq)
 
 static int rockchip_dmcfreq_disable_event(struct rockchip_dmcfreq *dmcfreq)
 {
-	int ret;
+	int i, ret;
 
 	if (!dmcfreq->auto_freq_en)
 		return 0;
 
-	ret = devfreq_event_disable_edev(dmcfreq->edev);
-	if (ret < 0) {
-		dev_err(dmcfreq->dev,
-			"failed to disable devfreq-event devices\n");
-		return ret;
+	for (i = 0; i < dmcfreq->edev_count; i++) {
+		ret = devfreq_event_disable_edev(dmcfreq->edev[i]);
+		if (ret < 0) {
+			dev_err(dmcfreq->dev,
+				"failed to disable devfreq-event\n");
+			return ret;
+		}
 	}
 
 	return 0;
 }
 
+static int rockchip_get_edev_id(struct rockchip_dmcfreq *dmcfreq,
+				const char *name)
+{
+	struct devfreq_event_dev *edev;
+	int i;
+
+	for (i = 0; i < dmcfreq->edev_count; i++) {
+		edev = dmcfreq->edev[i];
+		if (!strcmp(edev->desc->name, name))
+			return i;
+	}
+
+	return -EINVAL;
+}
+
 static int rockchip_dmcfreq_get_event(struct rockchip_dmcfreq *dmcfreq)
 {
 	struct device *dev = dmcfreq->dev;
 	struct device_node *events_np, *np = dev->of_node;
-	int ret = 0;
+	int i, j, count, available_count = 0;
 
-	events_np = of_parse_phandle(np, "devfreq-events", 0);
-	if (!events_np)
+	count = devfreq_event_get_edev_count(dev);
+	if (count < 0) {
+		dev_dbg(dev, "failed to get count of devfreq-event dev\n");
 		return 0;
-	if (!of_device_is_available(events_np))
-		goto out;
-	dmcfreq->edev = devfreq_event_get_edev_by_phandle(dev, 0);
-	if (IS_ERR(dmcfreq->edev))
-		ret = -EPROBE_DEFER;
-	else
-		dmcfreq->auto_freq_en = true;
-out:
-	of_node_put(events_np);
+	}
+	for (i = 0; i < count; i++) {
+		events_np = of_parse_phandle(np, "devfreq-events", i);
+		if (!events_np)
+			continue;
+		if (of_device_is_available(events_np))
+			available_count++;
+		of_node_put(events_np);
+	}
+	if (!available_count) {
+		dev_dbg(dev, "failed to get available devfreq-event\n");
+		return 0;
+	}
+	dmcfreq->edev_count = available_count;
+	dmcfreq->edev = devm_kzalloc(dev,
+				     sizeof(*dmcfreq->edev) * available_count,
+				     GFP_KERNEL);
+	if (!dmcfreq->edev)
+		return -ENOMEM;
 
-	return ret;
+	for (i = 0, j = 0; i < count; i++) {
+		events_np = of_parse_phandle(np, "devfreq-events", i);
+		if (!events_np)
+			continue;
+		if (of_device_is_available(events_np)) {
+			of_node_put(events_np);
+			if (j >= available_count) {
+				dev_err(dev, "invalid event conut\n");
+				return -EINVAL;
+			}
+			dmcfreq->edev[j] =
+				devfreq_event_get_edev_by_phandle(dev, i);
+			if (IS_ERR(dmcfreq->edev[j]))
+				return -EPROBE_DEFER;
+			j++;
+		} else {
+			of_node_put(events_np);
+		}
+	}
+	dmcfreq->auto_freq_en = true;
+	dmcfreq->dfi_id = rockchip_get_edev_id(dmcfreq, "dfi");
+	if (dmcfreq->dfi_id >= 0)
+		available_count--;
+	if (available_count <= 0)
+		return 0;
+	dmcfreq->nocp_bw =
+		devm_kzalloc(dev, sizeof(*dmcfreq->nocp_bw) * available_count,
+			     GFP_KERNEL);
+	if (!dmcfreq->nocp_bw)
+		return -ENOMEM;
+
+	return 0;
 }
 
 static int rockchip_dmcfreq_power_control(struct rockchip_dmcfreq *dmcfreq)

From 31e236375d76cf24c6b59e9b90df291ce734554d Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Mon, 13 Aug 2018 19:38:05 +0800
Subject: [PATCH 1046/1852] arm: dts: rk3128h-box: separate android fireware

Split DT source files to separate out android fireware specific DT
bindings.

Change-Id: I106afeff0485fa8346986693fb227e2c6e4913c2
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box.dts  | 688 +----------------------------
 arch/arm/boot/dts/rk3128h-box.dtsi | 687 ++++++++++++++++++++++++++++
 2 files changed, 705 insertions(+), 670 deletions(-)
 create mode 100644 arch/arm/boot/dts/rk3128h-box.dtsi

diff --git a/arch/arm/boot/dts/rk3128h-box.dts b/arch/arm/boot/dts/rk3128h-box.dts
index 9c272f8c31bd2..f82043f7fe423 100644
--- a/arch/arm/boot/dts/rk3128h-box.dts
+++ b/arch/arm/boot/dts/rk3128h-box.dts
@@ -1,686 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
 /dts-v1/;
 
-#include "rk3128x.dtsi"
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/input/input.h>
+#include "rk3128h-box.dtsi"
 
 / {
 	model = "Rockchip RK3128h box board";
 	compatible = "rockchip,rk3128h-box", "rockchip,rk3128h";
-
-	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0x11030000";
-	};
-
-	fiq-debugger {
-		compatible = "rockchip,fiq-debugger";
-		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
-		rockchip,serial-id = <2>;
-		rockchip,signal-irq = <159>;
-		rockchip,wake-irq = <0>;
-		rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
-		rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
-		pinctrl-names = "default";
-		pinctrl-0 = <&uart21_xfer>;
-	};
-
-	firmware {
-		android {
-			compatible = "android,firmware";
-			fstab {
-				compatible = "android,fstab";
-				system {
-					compatible = "android,system";
-					dev = "/dev/block/by-name/system";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait,verify";
-				};
-				vendor {
-					compatible = "android,vendor";
-					dev = "/dev/block/by-name/vendor";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait,verify";
-				};
-			};
-		};
-	};
-
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		drm_logo: drm-logo@00000000 {
-			compatible = "rockchip,drm-logo";
-			reg = <0x0 0x0>;
-		};
-
-		ramoops_mem: ramoops@62e00000 {
-			reg = <0x62e00000 0xf0000>;
-		};
-	};
-
-	ramoops {
-		compatible = "ramoops";
-		record-size = <0x0 0x20000>;
-		console-size = <0x0 0x80000>;
-		ftrace-size = <0x0 0x00000>;
-		pmsg-size = <0x0 0x50000>;
-		memory-region = <&ramoops_mem>;
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		autorepeat;
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&pwr_key>;
-
-		power_key: power-key {
-			label = "GPIO Key Power";
-			gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_POWER>;
-			debounce-interval = <100>;
-			wakeup-source;
-		};
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,name = "rockchip,rk3229";
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&codec>;
-		};
-	};
-
-	hdmi_sound: hdmi-sound {
-		status = "okay";
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <128>;
-		simple-audio-card,name = "rockchip,hdmi";
-		simple-audio-card,cpu {
-			sound-dai = <&i2s0>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&hdmi>;
-		};
-	};
-
-	regulators {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		vccio_1v8_reg: regulator@0 {
-			compatible = "regulator-fixed";
-			regulator-name = "vccio_1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			regulator-always-on;
-		};
-
-		vccio_3v3_reg: regulator@1 {
-			compatible = "regulator-fixed";
-			regulator-name = "vccio_3v3";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			regulator-always-on;
-		};
-	};
-
-	rtc-fake {
-		compatible = "rtc-fake";
-		status = "okay";
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&hym8563>;
-		/* clock-names = "ext_clock"; */
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-
-		/*
-		 * On the module itself this is one of these (depending
-		 * on the actual card populated):
-		 * - SDIO_RESET_L_WL_REG_ON
-		 * - PDN (power down when low)
-		 */
-		reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
-	};
-
-	spdif_out: spdif-out {
-		status = "okay";
-		compatible = "linux,spdif-dit";
-		#sound-dai-cells = <0>;
-	};
-
-	spdif-sound {
-		status = "okay";
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "ROCKCHIP,SPDIF";
-		simple-audio-card,cpu {
-			sound-dai = <&spdif>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&spdif_out>;
-		};
-	};
-
-	vcc_host: vcc-host-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-name = "vcc_host";
-		regulator-always-on;
-		regulator-boot-on;
-	};
-
-	vcc_otg_vbus: otg-vbus-regulator {
-		compatible = "regulator-fixed";
-		gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-name = "vcc_otg_vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		enable-active-high;
-	};
-
-	vcc_phy: vcc-phy-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		regulator-name = "vcc_phy";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		regulator-always-on;
-		regulator-boot-on;
-	};
-
-	vdd_arm: vdd-arm-regulator {
-		compatible = "pwm-regulator";
-		rockchip,pwm_id = <1>;
-		regulator-init-microvolt = <1200000>;
-		pwms = <&pwm1 0 5000 1>;
-		regulator-name = "vdd_arm";
-		regulator-min-microvolt = <950000>;
-		regulator-max-microvolt = <1400000>;
-		regulator-settling-time-up-us = <250>;
-		regulator-always-on;
-		regulator-boot-on;
-	};
-
-	wireless-bluetooth {
-		compatible = "bluetooth-platdata";
-		clocks = <&hym8563>;
-		clock-names = "ext_clock";
-		uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default", "rts_gpio";
-		pinctrl-0 = <&uart11_rts>;
-		pinctrl-1 = <&uart11_rts_gpio>;
-		BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
-		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
-		status = "okay";
-	};
-
-	wireless-wlan {
-		compatible = "wlan-platdata";
-		rockchip,grf = <&grf>;
-		wifi_chip_type = "ssv6051";
-		sdio_vref = <1800>;
-		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-		status = "okay";
-	};
-};
-
-&codec {
-	#sound-dai-cells = <0>;
-	status = "okay";
 };
 
-&cpu0 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&display_subsystem {
-	logo-memory-region = <&drm_logo>;
-	status = "okay";
-
-	route {
-		route_hdmi: route-hdmi {
-			status = "okay";
-			logo,uboot = "logo.bmp";
-			logo,kernel = "logo_kernel.bmp";
-			logo,mode = "center";
-			charge_logo,mode = "center";
-			connect = <&vop_out_hdmi>;
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait,verify";
 		};
-
-		route_tve: route-tve {
-			status = "okay";
-			logo,uboot = "logo.bmp";
-			logo,kernel = "logo_kernel.bmp";
-			logo,mode = "center";
-			charge_logo,mode = "center";
-			connect = <&vop_out_tve>;
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait,verify";
 		};
 	};
 };
-
-&dmc {
-	center-supply = <&vdd_arm>;
-	status = "okay";
-};
-
-&emmc {
-	broken-cd;
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
-	supports-emmc;
-	disable-wp;
-	non-removable;
-	num-slots = <1>;
-	/delete-property/ default-sample-phase;
-	/delete-property/ pinctrl-names;
-	/delete-property/ pinctrl-0;
-	status = "okay";
-};
-
-&gmac {
-	assigned-clocks = <&cru SCLK_MAC_SRC>;
-	assigned-clock-rates = <50000000>;
-	clock_in_out = "output";
-	phy-supply = <&vcc_phy>;
-	phy-mode = "rmii";
-	phy-is-integrated;
-	status = "okay";
-};
-
-&gpu {
-	status = "okay";
-	mali-supply = <&vdd_arm>;
-};
-
-&hdmi {
-	status = "okay";
-	#sound-dai-cells = <0>;
-	ddc-i2c-scl-high-time-ns = <9625>;
-	ddc-i2c-scl-low-time-ns = <10000>;
-};
-
-&hdmi_phy {
-	status = "okay";
-};
-
-&io_domains {
-	status = "okay";
-
-	vccio1-supply = <&vccio_3v3_reg>;
-	vccio2-supply = <&vccio_3v3_reg>;
-	vccio4-supply = <&vccio_3v3_reg>;
-};
-
-&i2c0 {
-	status = "okay";
-
-	hym8563: hym8563@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-	};
-};
-
-&i2s0 {
-	status = "okay";
-	rockchip,bclk-fs = <128>;
-	#sound-dai-cells = <0>;
-};
-
-&i2s1 {
-	#sound-dai-cells = <0>;
-	status = "okay";
-};
-
-&iep {
-	status = "okay";
-};
-
-&iep_mmu {
-	status = "okay";
-};
-
-&nandc {
-	status = "okay";
-};
-
-&pinctrl {
-	keys {
-		pwr_key: pwr-key {
-			rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	sdmmc {
-		sdmmc_pwr: sdmmc-pwr {
-			rockchip,pins = <1 14 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb {
-		host_vbus_drv: host-vbus-drv {
-			rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pwm1 {
-	status = "okay";
-	pinctrl-names = "active";
-	pinctrl-0 = <&pwm1_pin_pull_down>;
-};
-
-&pwm2 {
-	status = "okay";
-};
-
-&pwm3 {
-	status = "okay";
-	compatible = "rockchip,remotectl-pwm";
-	remote_pwm_id = <3>;
-	handle_cpu_id = <1>;
-	remote_support_psci = <1>;
-
-	ir_key1 {
-		rockchip,usercode = <0x4040>;
-		rockchip,key_table =
-			<0xf2	KEY_REPLY>,
-			<0xba	KEY_BACK>,
-			<0xf4	KEY_UP>,
-			<0xf1	KEY_DOWN>,
-			<0xef	KEY_LEFT>,
-			<0xee	KEY_RIGHT>,
-			<0xbd	KEY_HOME>,
-			<0xea	KEY_VOLUMEUP>,
-			<0xe3	KEY_VOLUMEDOWN>,
-			<0xe2	KEY_SEARCH>,
-			<0xb2	KEY_POWER>,
-			<0xbc	KEY_MUTE>,
-			<0xec	KEY_MENU>,
-			<0xbf	0x190>,
-			<0xe0	0x191>,
-			<0xe1	0x192>,
-			<0xe9	183>,
-			<0xe6	248>,
-			<0xe8	185>,
-			<0xe7	186>,
-			<0xf0	388>,
-			<0xbe	0x175>;
-	};
-
-	ir_key2 {
-		rockchip,usercode = <0xff00>;
-		rockchip,key_table =
-			<0xf9	KEY_HOME>,
-			<0xbf	KEY_BACK>,
-			<0xfb	KEY_MENU>,
-			<0xaa	KEY_REPLY>,
-			<0xb9	KEY_UP>,
-			<0xe9	KEY_DOWN>,
-			<0xb8	KEY_LEFT>,
-			<0xea	KEY_RIGHT>,
-			<0xeb	KEY_VOLUMEDOWN>,
-			<0xef	KEY_VOLUMEUP>,
-			<0xf7	KEY_MUTE>,
-			<0xe7	KEY_POWER>,
-			<0xfc	KEY_POWER>,
-			<0xa9	KEY_VOLUMEDOWN>,
-			<0xa8	KEY_PLAYPAUSE>,
-			<0xe0	KEY_VOLUMEDOWN>,
-			<0xa5	KEY_VOLUMEDOWN>,
-			<0xab	183>,
-			<0xb7	388>,
-			<0xe8	388>,
-			<0xf8	184>,
-			<0xaf	185>,
-			<0xed	KEY_VOLUMEDOWN>,
-			<0xee	186>,
-			<0xb3	KEY_VOLUMEDOWN>,
-			<0xf1	KEY_VOLUMEDOWN>,
-			<0xf2	KEY_VOLUMEDOWN>,
-			<0xf3	KEY_SEARCH>,
-			<0xb4	KEY_VOLUMEDOWN>,
-			<0xa4	KEY_SETUP>,
-			<0xbe	KEY_SEARCH>;
-	};
-
-	ir_key3 {
-		rockchip,usercode = <0x1dcc>;
-		rockchip,key_table =
-			<0xee	KEY_REPLY>,
-			<0xf0	KEY_BACK>,
-			<0xf8	KEY_UP>,
-			<0xbb	KEY_DOWN>,
-			<0xef	KEY_LEFT>,
-			<0xed	KEY_RIGHT>,
-			<0xfc	KEY_HOME>,
-			<0xf1	KEY_VOLUMEUP>,
-			<0xfd	KEY_VOLUMEDOWN>,
-			<0xb7	KEY_SEARCH>,
-			<0xff	KEY_POWER>,
-			<0xf3	KEY_MUTE>,
-			<0xbf	KEY_MENU>,
-			<0xf9	0x191>,
-			<0xf5	0x192>,
-			<0xb3	388>,
-			<0xbe	KEY_1>,
-			<0xba	KEY_2>,
-			<0xb2	KEY_3>,
-			<0xbd	KEY_4>,
-			<0xf9	KEY_5>,
-			<0xb1	KEY_6>,
-			<0xfc	KEY_7>,
-			<0xf8	KEY_8>,
-			<0xb0	KEY_9>,
-			<0xb6	KEY_0>,
-			<0xb5	KEY_BACKSPACE>;
-	};
-};
-
-&rockchip_suspend {
-	status = "okay";
-	rockchip,virtual-poweroff = <1>;
-	rockchip,sleep-mode-config = <
-		(0
-		|RKPM_CTR_GTCLKS
-		|RKPM_CTR_IDLESRAM_MD
-		|RKPM_CTR_PMIC
-		)
-	>;
-};
-
-&sdio {
-	status = "okay";
-	mmc-pwrseq = <&sdio_pwrseq>;
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	non-removable;
-	ignore-pm-notify;
-	keep-power-in-suspend;
-	max-frequency = <37500000>;
-	supports-sdio;
-};
-
-&sdmmc {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc_pwr &sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	card-detect-delay = <200>;
-	disable-wp;
-	max-frequency = <50000000>;
-	num-slots = <1>;
-	supports-sd;
-};
-
-&spdif {
-	status = "okay";
-	#sound-dai-cells = <0>;
-};
-
-&threshold {
-	temperature = <90000>; /* millicelsius */
-};
-
-&target {
-	temperature = <105000>; /* millicelsius */
-};
-
-&soc_crit {
-	temperature = <115000>; /* millicelsius */
-};
-
-&tsadc {
-	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
-	rockchip,hw-tshut-temp = <120000>;
-	status = "okay";
-};
-
-&tve {
-	status = "okay";
-};
-
-&u2phy0 {
-	status = "okay";
-
-	u2phy0_otg: otg-port {
-		status = "okay";
-	};
-
-	u2phy0_host: host-port {
-		status = "okay";
-	};
-};
-
-&u2phy1 {
-	status = "okay";
-
-	u2phy1_otg: otg-port {
-		status = "okay";
-	};
-
-	u2phy1_host: host-port {
-		status = "okay";
-	};
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart11_xfer &uart11_cts>;
-	status = "okay";
-};
-
-&usb_otg {
-	status = "okay";
-};
-
-&u2phy0_host {
-	phy-supply = <&vcc_host>;
-};
-
-&u2phy1_host {
-	phy-supply = <&vcc_host>;
-};
-
-&u2phy0_otg {
-	vbus-supply = <&vcc_otg_vbus>;
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usb_host2_ehci {
-	status = "okay";
-};
-
-&usb_host2_ohci {
-	status = "okay";
-};
-
-&vop {
-	assigned-clocks = <&cru DCLK_VOP>;
-	assigned-clock-parents = <&cru HDMIPHY>;
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vpu_service {
-	status = "okay";
-};
-
-&vpu_mmu {
-	status = "okay";
-};
-
-&rkvdec {
-	vcodec-supply = <&vdd_arm>;
-	status = "okay";
-};
-
-&rkvdec_mmu {
-	status = "okay";
-};
-
-&rk_rga {
-	status = "okay";
-};
diff --git a/arch/arm/boot/dts/rk3128h-box.dtsi b/arch/arm/boot/dts/rk3128h-box.dtsi
new file mode 100644
index 0000000000000..4d437656a736f
--- /dev/null
+++ b/arch/arm/boot/dts/rk3128h-box.dtsi
@@ -0,0 +1,687 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include "rk3128x.dtsi"
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	chosen: chosen {
+		bootargs = "earlycon=uart8250,mmio32,0x11030000";
+	};
+
+	fiq_debugger: fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,serial-id = <2>;
+		rockchip,signal-irq = <159>;
+		rockchip,wake-irq = <0>;
+		rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
+		rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart21_xfer>;
+	};
+
+	firmware {
+		firmware_android: android {};
+	};
+
+	reserved_memory: reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		drm_logo: drm-logo@00000000 {
+			compatible = "rockchip,drm-logo";
+			reg = <0x0 0x0>;
+		};
+
+		secure_memory: secure-memory@80000000 {
+			compatible = "rockchip,secure-memory";
+			reg = <0x80000000 0x0>;
+		};
+
+		ramoops_mem: ramoops@62e00000 {
+			reg = <0x62e00000 0xf0000>;
+		};
+	};
+
+	ramoops: ramoops {
+		compatible = "ramoops";
+		record-size = <0x0 0x20000>;
+		console-size = <0x0 0x80000>;
+		ftrace-size = <0x0 0x00000>;
+		pmsg-size = <0x0 0x50000>;
+		memory-region = <&ramoops_mem>;
+	};
+
+	gpio_keys: gpio-keys {
+		status = "okay";
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key &volume_up_key>;
+
+		power_key: power-key {
+			label = "GPIO Key Power";
+			gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+			debounce-interval = <100>;
+			wakeup-source;
+		};
+
+		volume_up: volume-up-key {
+			label = "GPIO Key Power";
+			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_VOLUMEUP>;
+		};
+	};
+
+	sound: sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "rockchip,rk3229";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&codec>;
+		};
+	};
+
+	hdmi_sound: hdmi-sound {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <128>;
+		simple-audio-card,name = "rockchip,hdmi";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s0>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
+	regulators: regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		vccio_1v8_reg: regulator@0 {
+			compatible = "regulator-fixed";
+			regulator-name = "vccio_1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+		};
+
+		vccio_3v3_reg: regulator@1 {
+			compatible = "regulator-fixed";
+			regulator-name = "vccio_3v3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+	};
+
+	rtc_fake: rtc-fake {
+		compatible = "rtc-fake";
+		status = "okay";
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&hym8563>;
+		/* clock-names = "ext_clock"; */
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
+	};
+
+	spdif_out: spdif-out {
+		status = "okay";
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+	};
+
+	spdif_sound: spdif-sound {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "ROCKCHIP,SPDIF";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	vcc_host: vcc-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc_otg_vbus: otg-vbus-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc_phy";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vdd_arm: vdd-arm-regulator {
+		compatible = "pwm-regulator";
+		rockchip,pwm_id = <1>;
+		regulator-init-microvolt = <1200000>;
+		pwms = <&pwm1 0 5000 1>;
+		regulator-name = "vdd_arm";
+		regulator-min-microvolt = <950000>;
+		regulator-max-microvolt = <1400000>;
+		regulator-settling-time-up-us = <250>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	wireless_bluetooth: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&hym8563>;
+		clock-names = "ext_clock";
+		uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		pinctrl-0 = <&uart11_rts>;
+		pinctrl-1 = <&uart11_rts_gpio>;
+		BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless_wlan: wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		wifi_chip_type = "ssv6051";
+		sdio_vref = <1800>;
+		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&codec {
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&display_subsystem {
+	logo-memory-region = <&drm_logo>;
+	secure-memory-region = <&secure_memory>;
+	status = "okay";
+
+	route {
+		route_hdmi: route-hdmi {
+			status = "okay";
+			logo,uboot = "logo.bmp";
+			logo,kernel = "logo_kernel.bmp";
+			logo,mode = "center";
+			charge_logo,mode = "center";
+			connect = <&vop_out_hdmi>;
+		};
+
+		route_tve: route-tve {
+			status = "okay";
+			logo,uboot = "logo.bmp";
+			logo,kernel = "logo_kernel.bmp";
+			logo,mode = "center";
+			charge_logo,mode = "center";
+			connect = <&vop_out_tve>;
+		};
+	};
+};
+
+&dmc {
+	center-supply = <&vdd_arm>;
+	status = "okay";
+};
+
+&emmc {
+	broken-cd;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	/delete-property/ default-sample-phase;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	status = "okay";
+};
+
+&gmac {
+	assigned-clocks = <&cru SCLK_MAC_SRC>;
+	assigned-clock-rates = <50000000>;
+	clock_in_out = "output";
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rmii";
+	phy-is-integrated;
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+	mali-supply = <&vdd_arm>;
+};
+
+&hdmi {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	ddc-i2c-scl-high-time-ns = <9625>;
+	ddc-i2c-scl-low-time-ns = <10000>;
+};
+
+&hdmi_phy {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vccio_3v3_reg>;
+	vccio2-supply = <&vccio_3v3_reg>;
+	vccio4-supply = <&vccio_3v3_reg>;
+};
+
+&i2c0 {
+	status = "okay";
+
+	hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&i2s0 {
+	status = "okay";
+	rockchip,bclk-fs = <128>;
+	#sound-dai-cells = <0>;
+};
+
+&i2s1 {
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&iep {
+	status = "okay";
+};
+
+&iep_mmu {
+	status = "okay";
+};
+
+&nandc {
+	status = "okay";
+};
+
+&pinctrl {
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		volume_up_key: volume-up {
+			rockchip,pins = <3 25 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <1 14 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm1 {
+	status = "okay";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm1_pin_pull_down>;
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&pwm3 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm3_pin>;
+	compatible = "rockchip,remotectl-pwm";
+	remote_pwm_id = <3>;
+	handle_cpu_id = <1>;
+	remote_support_psci = <1>;
+
+	ir_key1 {
+		rockchip,usercode = <0x4040>;
+		rockchip,key_table =
+			<0xf2	KEY_REPLY>,
+			<0xba	KEY_BACK>,
+			<0xf4	KEY_UP>,
+			<0xf1	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xee	KEY_RIGHT>,
+			<0xbd	KEY_HOME>,
+			<0xea	KEY_VOLUMEUP>,
+			<0xe3	KEY_VOLUMEDOWN>,
+			<0xe2	KEY_SEARCH>,
+			<0xb2	KEY_POWER>,
+			<0xbc	KEY_MUTE>,
+			<0xec	KEY_MENU>,
+			<0xbf	0x190>,
+			<0xe0	0x191>,
+			<0xe1	0x192>,
+			<0xe9	183>,
+			<0xe6	248>,
+			<0xe8	185>,
+			<0xe7	186>,
+			<0xf0	388>,
+			<0xbe	0x175>;
+	};
+
+	ir_key2 {
+		rockchip,usercode = <0xff00>;
+		rockchip,key_table =
+			<0xf9	KEY_HOME>,
+			<0xbf	KEY_BACK>,
+			<0xfb	KEY_MENU>,
+			<0xaa	KEY_REPLY>,
+			<0xb9	KEY_UP>,
+			<0xe9	KEY_DOWN>,
+			<0xb8	KEY_LEFT>,
+			<0xea	KEY_RIGHT>,
+			<0xeb	KEY_VOLUMEDOWN>,
+			<0xef	KEY_VOLUMEUP>,
+			<0xf7	KEY_MUTE>,
+			<0xe7	KEY_POWER>,
+			<0xfc	KEY_POWER>,
+			<0xa9	KEY_VOLUMEDOWN>,
+			<0xa8	KEY_PLAYPAUSE>,
+			<0xe0	KEY_VOLUMEDOWN>,
+			<0xa5	KEY_VOLUMEDOWN>,
+			<0xab	183>,
+			<0xb7	388>,
+			<0xe8	388>,
+			<0xf8	184>,
+			<0xaf	185>,
+			<0xed	KEY_VOLUMEDOWN>,
+			<0xee	186>,
+			<0xb3	KEY_VOLUMEDOWN>,
+			<0xf1	KEY_VOLUMEDOWN>,
+			<0xf2	KEY_VOLUMEDOWN>,
+			<0xf3	KEY_SEARCH>,
+			<0xb4	KEY_VOLUMEDOWN>,
+			<0xa4	KEY_SETUP>,
+			<0xbe	KEY_SEARCH>;
+	};
+
+	ir_key3 {
+		rockchip,usercode = <0x1dcc>;
+		rockchip,key_table =
+			<0xee	KEY_REPLY>,
+			<0xf0	KEY_BACK>,
+			<0xf8	KEY_UP>,
+			<0xbb	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xed	KEY_RIGHT>,
+			<0xfc	KEY_HOME>,
+			<0xf1	KEY_VOLUMEUP>,
+			<0xfd	KEY_VOLUMEDOWN>,
+			<0xb7	KEY_SEARCH>,
+			<0xff	KEY_POWER>,
+			<0xf3	KEY_MUTE>,
+			<0xbf	KEY_MENU>,
+			<0xf9	0x191>,
+			<0xf5	0x192>,
+			<0xb3	388>,
+			<0xbe	KEY_1>,
+			<0xba	KEY_2>,
+			<0xb2	KEY_3>,
+			<0xbd	KEY_4>,
+			<0xf9	KEY_5>,
+			<0xb1	KEY_6>,
+			<0xfc	KEY_7>,
+			<0xf8	KEY_8>,
+			<0xb0	KEY_9>,
+			<0xb6	KEY_0>,
+			<0xb5	KEY_BACKSPACE>;
+	};
+
+	ir_key80{
+		rockchip,usercode = <0x7f00>;
+		rockchip,key_table = <0xed	KEY_POWER>;
+	};
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,virtual-poweroff = <1>;
+	rockchip,sleep-mode-config = <
+		(0
+		|RKPM_CTR_GTCLKS
+		|RKPM_CTR_IDLESRAM_MD
+		|RKPM_CTR_PMIC
+		)
+	>;
+};
+
+&sdio {
+	status = "okay";
+	mmc-pwrseq = <&sdio_pwrseq>;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	non-removable;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	max-frequency = <37500000>;
+	supports-sdio;
+};
+
+&sdmmc {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_pwr &sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	max-frequency = <50000000>;
+	num-slots = <1>;
+	supports-sd;
+};
+
+&spdif {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&threshold {
+	temperature = <90000>; /* millicelsius */
+};
+
+&target {
+	temperature = <105000>; /* millicelsius */
+};
+
+&soc_crit {
+	temperature = <115000>; /* millicelsius */
+};
+
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-temp = <120000>;
+	status = "okay";
+};
+
+&tve {
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		status = "okay";
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		status = "okay";
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart11_xfer &uart11_cts>;
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&u2phy0_host {
+	phy-supply = <&vcc_host>;
+};
+
+&u2phy1_host {
+	phy-supply = <&vcc_host>;
+};
+
+&u2phy0_otg {
+	vbus-supply = <&vcc_otg_vbus>;
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usb_host2_ehci {
+	status = "okay";
+};
+
+&usb_host2_ohci {
+	status = "okay";
+};
+
+&vop {
+	assigned-clocks = <&cru DCLK_VOP>;
+	assigned-clock-parents = <&cru HDMIPHY>;
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
+
+&vpu_service {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&rkvdec {
+	vcodec-supply = <&vdd_arm>;
+	status = "okay";
+};
+
+&rkvdec_mmu {
+	status = "okay";
+};
+
+&rk_rga {
+	status = "okay";
+};

From bb9383ed7aa5f73dae693f603f9ac82ef2b23981 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Mon, 13 Aug 2018 19:45:29 +0800
Subject: [PATCH 1047/1852] ARM: dts: add new dts file for rk3128h box avb

Change-Id: If2cb3260823b67398451fd1221f165262d104187
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/Makefile            |  1 +
 arch/arm/boot/dts/rk3128h-box-avb.dts | 61 +++++++++++++++++++++++++++
 2 files changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3128h-box-avb.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d08e27d71aa54..530ecde208457 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -524,6 +524,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3126-evb.dtb \
 	rk3128-fireprime.dtb \
 	rk3128h-box.dtb \
+	rk3128h-box-avb.dtb \
 	rk3188-radxarock.dtb \
 	rk3228-evb.dtb \
 	rk3229-at-3nod.dtb \
diff --git a/arch/arm/boot/dts/rk3128h-box-avb.dts b/arch/arm/boot/dts/rk3128h-box-avb.dts
new file mode 100644
index 0000000000000..97e4cddf0e6d5
--- /dev/null
+++ b/arch/arm/boot/dts/rk3128h-box-avb.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include "rk3128h-box.dtsi"
+
+/ {
+	model = "Rockchip RK3128h box avb board";
+	compatible = "rockchip,rk3128h-box-avb", "rockchip,rk3128h";
+};
+
+&dmc_opp_table {
+	opp-300000000 {
+		status = "disabled";
+	};
+	opp-330000000 {
+		status = "disabled";
+	};
+	opp-588000000 {
+		opp-hz = /bits/ 64 <588000000>;
+		opp-microvolt = <1100000>;
+		opp-microvolt-L0 = <1100000>;
+		opp-microvolt-L1 = <1050000>;
+	};
+};
+
+&dmc {
+	system-status-freq = <
+		/*system status freq(KHz)*/
+		SYS_STATUS_NORMAL	588000
+	>;
+};
+
+&firmware_android {
+	compatible = "android,firmware";
+	vbmeta {
+		compatible = "android,vbmeta";
+		parts = "vbmeta,boot,system,vendor,dtbo";
+	};
+	fstab {
+		compatible = "android,fstab";
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/platform/30020000.dwmmc/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait,avb";
+		};
+	};
+};
+
+&secure_memory {
+	/*
+	 * enable like this:
+	 * reg = <0x80000000 0x10000000>;
+	 */
+	reg = <0x80000000 0x8000000>;
+};

From 5c466811eb18889a57673ed4e45aba40cec1992e Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 14 Aug 2018 14:33:22 +0800
Subject: [PATCH 1048/1852] drivers: rkflash: support kernel IDBlock update

1.Write IDBlock to corresponding PBA
2.Update gc and sys code

Change-Id: I486325ab430df1135d6449d654a8143d5ef9788e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl_arm_v7.S       | 8959 +++++++++++++-----------
 drivers/rkflash/rk_sftl_arm_v7_thumb.S | 8848 ++++++++++++-----------
 drivers/rkflash/rk_sftl_arm_v8.S       | 7279 ++++++++++---------
 3 files changed, 13315 insertions(+), 11771 deletions(-)

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 269c66693e1ca..eb59ee471ec02 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,44 +2,10 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-07
+ * date: 2018-08-14
  */
 	.file	"rk_sftl.c"
-	.syntax divided
-	.macro	it, cond
-	.endm
-	.macro	itt, cond
-	.endm
-	.macro	ite, cond
-	.endm
-	.macro	ittt, cond
-	.endm
-	.macro	itte, cond
-	.endm
-	.macro	itet, cond
-	.endm
-	.macro	itee, cond
-	.endm
-	.macro	itttt, cond
-	.endm
-	.macro	ittte, cond
-	.endm
-	.macro	ittet, cond
-	.endm
-	.macro	ittee, cond
-	.endm
-	.macro	itett, cond
-	.endm
-	.macro	itete, cond
-	.endm
-	.macro	iteet, cond
-	.endm
-	.macro	iteee, cond
-	.endm
-
 	.global	__udivsi3
-	.arm
-	.syntax unified
 	.text
 	.align	2
 	.syntax unified
@@ -352,6 +318,21 @@ IsBlkInVendorPart:
 	.word	.LANCHOR0
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	2
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.align	2
 	.global	sftl_get_density
 	.syntax unified
 	.arm
@@ -363,12 +344,12 @@ sftl_get_density:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L36
+	ldr	r3, .L37
 	ldr	r0, [r3, #140]
 	ldmfd	sp, {fp, sp, pc}
-.L37:
+.L38:
 	.align	2
-.L36:
+.L37:
 	.word	.LANCHOR0
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__umodsi3
@@ -386,7 +367,7 @@ FtlBbmMapBadBlock:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	uxth	r5, r0
-	ldr	r4, .L39
+	ldr	r4, .L40
 	mov	r0, r5
 	ldrh	r7, [r4, #98]
 	mov	r1, r7
@@ -407,16 +388,16 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r1, [sp]
 	mov	r1, r5
-	ldr	r0, .L39+4
+	ldr	r0, .L40+4
 	bl	sftl_printk
 	ldrh	r3, [r4, #158]
 	mov	r0, #0
 	add	r3, r3, #1
 	strh	r3, [r4, #158]	@ movhi
 	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L40:
+.L41:
 	.align	2
-.L39:
+.L40:
 	.word	.LANCHOR0
 	.word	.LC0
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
@@ -432,7 +413,7 @@ FtlBbmIsBadBlock:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L42
+	ldr	r5, .L43
 	uxth	r6, r0
 	ldrh	r7, [r5, #98]
 	mov	r0, r6
@@ -451,9 +432,9 @@ FtlBbmIsBadBlock:
 	lsr	r0, r0, r4
 	and	r0, r0, #1
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L43:
+.L44:
 	.align	2
-.L42:
+.L43:
 	.word	.LANCHOR0
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.align	2
@@ -482,7 +463,7 @@ FtlBbtMemInit:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r0, .L46
+	ldr	r0, .L47
 	mvn	r3, #0
 	mov	r2, #16
 	mov	r1, #255
@@ -492,9 +473,9 @@ FtlBbtMemInit:
 	add	r0, r0, #164
 	bl	memset
 	ldmfd	sp, {fp, sp, pc}
-.L47:
+.L48:
 	.align	2
-.L46:
+.L47:
 	.word	.LANCHOR0
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.align	2
@@ -509,28 +490,28 @@ FtlBbtCalcTotleCnt:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L55
+	ldr	r3, .L56
 	mov	r5, #0
 	mov	r4, r5
 	ldrh	r2, [r3, #98]
 	ldrh	r6, [r3, #54]
 	mul	r6, r6, r2
-.L49:
+.L50:
 	uxth	r0, r5
 	cmp	r0, r6
-	blt	.L51
+	blt	.L52
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L51:
+.L52:
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
 	add	r5, r5, #1
 	addne	r4, r4, #1
 	uxthne	r4, r4
-	b	.L49
-.L56:
+	b	.L50
+.L57:
 	.align	2
-.L55:
+.L56:
 	.word	.LANCHOR0
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.align	2
@@ -545,7 +526,7 @@ V2P_block:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L58
+	ldr	r4, .L59
 	uxth	r7, r0
 	uxth	r5, r1
 	ldrh	r6, [r4, #56]
@@ -562,9 +543,9 @@ V2P_block:
 	add	r0, r4, r0
 	uxth	r0, r0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L59:
+.L60:
 	.align	2
-.L58:
+.L59:
 	.word	.LANCHOR0
 	.size	V2P_block, .-V2P_block
 	.align	2
@@ -579,7 +560,7 @@ P2V_plane:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L61
+	ldr	r3, .L62
 	uxth	r5, r0
 	ldrh	r6, [r3, #56]
 	mov	r0, r5
@@ -592,9 +573,9 @@ P2V_plane:
 	add	r0, r4, r0
 	uxth	r0, r0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L62:
+.L63:
 	.align	2
-.L61:
+.L62:
 	.word	.LANCHOR0
 	.size	P2V_plane, .-P2V_plane
 	.align	2
@@ -609,7 +590,7 @@ P2V_block_in_plane:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L64
+	ldr	r4, .L65
 	uxth	r0, r0
 	ldrh	r1, [r4, #98]
 	bl	__umodsi3
@@ -618,9 +599,9 @@ P2V_block_in_plane:
 	bl	__udivsi3
 	uxth	r0, r0
 	ldmfd	sp, {r4, fp, sp, pc}
-.L65:
+.L66:
 	.align	2
-.L64:
+.L65:
 	.word	.LANCHOR0
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.align	2
@@ -636,13 +617,13 @@ ftl_cmp_data_ver:
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
 	cmp	r0, r1
-	bls	.L67
+	bls	.L68
 	sub	r0, r0, r1
 	cmp	r0, #-2147483648
 	movhi	r0, #0
 	movls	r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.L67:
+.L68:
 	sub	r0, r1, r0
 	cmp	r0, #-2147483648
 	movls	r0, #0
@@ -661,7 +642,7 @@ FtlFreeSysBlkQueueInit:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L70
+	ldr	r3, .L71
 	mov	r4, #0
 	mov	r1, #2048
 	strh	r0, [r3, #212]	@ movhi
@@ -672,9 +653,9 @@ FtlFreeSysBlkQueueInit:
 	bl	__memzero
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
-.L71:
+.L72:
 	.align	2
-.L70:
+.L71:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.align	2
@@ -689,14 +670,14 @@ FtlFreeSysBlkQueueEmpty:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L73
+	ldr	r3, .L74
 	ldrh	r0, [r3, #218]
 	clz	r0, r0
 	lsr	r0, r0, #5
 	ldmfd	sp, {fp, sp, pc}
-.L74:
+.L75:
 	.align	2
-.L73:
+.L74:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.align	2
@@ -711,15 +692,15 @@ FtlFreeSysBlkQueueFull:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L76
+	ldr	r3, .L77
 	ldrh	r0, [r3, #218]
 	sub	r0, r0, #1024
 	clz	r0, r0
 	lsr	r0, r0, #5
 	ldmfd	sp, {fp, sp, pc}
-.L77:
+.L78:
 	.align	2
-.L76:
+.L77:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.align	2
@@ -734,27 +715,27 @@ FtlFreeSysBLkSort:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L87
+	ldr	r3, .L88
 	ldrh	r2, [r3, #218]
 	cmp	r2, #0
 	ldmfdeq	sp, {r4, fp, sp, pc}
-	ldr	r2, .L87+4
+	ldr	r2, .L88+4
 	mov	r4, #0
 	ldrh	r1, [r3, #214]
 	mov	lr, r4
 	ldrh	ip, [r2, #28]
 	ldrh	r2, [r3, #216]
 	and	ip, ip, #31
-.L80:
+.L81:
 	uxth	r0, r4
 	add	r4, r4, #1
 	cmp	ip, r0
-	bgt	.L81
+	bgt	.L82
 	cmp	lr, #0
 	strhne	r1, [r3, #214]	@ movhi
 	strhne	r2, [r3, #216]	@ movhi
 	ldmfd	sp, {r4, fp, sp, pc}
-.L81:
+.L82:
 	add	r0, r3, r1, lsl #1
 	add	r1, r1, #1
 	ubfx	r1, r1, #0, #10
@@ -764,10 +745,10 @@ FtlFreeSysBLkSort:
 	mov	lr, #1
 	add	r2, r2, lr
 	ubfx	r2, r2, #0, #10
-	b	.L80
-.L88:
+	b	.L81
+.L89:
 	.align	2
-.L87:
+.L88:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2268
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -783,37 +764,75 @@ IsInFreeQueue:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L95
+	ldr	r3, .L96
 	uxth	r0, r0
 	ldrh	ip, [r3, #218]
 	cmp	ip, #1024
 	ldrhne	lr, [r3, #214]
 	movne	r1, #0
-	bne	.L91
-.L93:
+	bne	.L92
+.L94:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L92:
+.L93:
 	add	r2, r1, lr
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
 	ldrh	r2, [r2, #220]
 	cmp	r2, r0
-	beq	.L94
+	beq	.L95
 	add	r1, r1, #1
-.L91:
+.L92:
 	cmp	r1, ip
-	bcc	.L92
-	b	.L93
-.L94:
+	bcc	.L93
+	b	.L94
+.L95:
 	mov	r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.L96:
+.L97:
 	.align	2
-.L95:
+.L96:
 	.word	.LANCHOR0
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	2
+	.global	test_node_in_list
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	test_node_in_list, %function
+test_node_in_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r3, .L103
+	uxth	r1, r1
+	movw	ip, #65535
+	ldr	r2, [r0]
+	ldr	r0, [r3, #2316]
+	sub	r3, r2, r0
+	ubfx	r3, r3, #3, #16
+.L100:
+	cmp	r3, r1
+	beq	.L101
+	ldrh	r3, [r2]
+	cmp	r3, ip
+	beq	.L102
+	add	r2, r0, r3, lsl #3
+	b	.L100
+.L101:
+	mov	r0, #1
+	ldmfd	sp, {fp, sp, pc}
+.L102:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L104:
+	.align	2
+.L103:
+	.word	.LANCHOR0
+	.size	test_node_in_list, .-test_node_in_list
+	.align	2
 	.global	insert_data_list
 	.syntax unified
 	.arm
@@ -827,11 +846,11 @@ insert_data_list:
 	sub	fp, ip, #4
 	sub	sp, sp, #12
 	uxth	r0, r0
-	ldr	r1, .L113
+	ldr	r1, .L121
 	ldrh	r3, [r1, #40]
 	mov	lr, r1
 	cmp	r3, r0
-	bls	.L99
+	bls	.L107
 	ldr	r6, [r1, #2316]
 	lsl	r5, r0, #3
 	mvn	ip, #0
@@ -840,11 +859,11 @@ insert_data_list:
 	strh	ip, [r6, r5]	@ movhi
 	ldr	r3, [r1, #2320]
 	cmp	r3, #0
-	bne	.L100
-.L112:
+	bne	.L108
+.L120:
 	str	r2, [r1, #2320]
-	b	.L99
-.L100:
+	b	.L107
+.L108:
 	ldr	r7, [r1, #2324]
 	lsl	r4, r0, #1
 	ldrh	r1, [r2, #4]
@@ -862,7 +881,7 @@ insert_data_list:
 	add	lr, r8, r4
 	str	lr, [fp, #-52]
 	mov	lr, #0
-.L108:
+.L116:
 	ldr	r4, [fp, #-48]
 	add	lr, lr, #1
 	uxth	lr, lr
@@ -872,7 +891,7 @@ insert_data_list:
 	cmp	r0, r1
 	orreq	r4, r4, #1
 	cmp	r4, #0
-	bne	.L99
+	bne	.L107
 	lsl	r9, r1, #1
 	ldrh	r4, [r7, r9]
 	mov	ip, r4
@@ -882,51 +901,51 @@ insert_data_list:
 	ldr	ip, [fp, #-44]
 	mvneq	r4, #0
 	cmp	ip, r4
-	bne	.L104
+	bne	.L112
 	ldr	ip, [fp, #-52]
 	ldrh	r9, [r8, r9]
 	ldrh	r4, [ip]
 	cmp	r9, r4
-	bcc	.L106
-.L105:
+	bcc	.L114
+.L113:
 	strh	r1, [r6, r5]	@ movhi
 	ldrh	r1, [r3, #2]
 	strh	r1, [r2, #2]	@ movhi
-	ldr	r1, .L113
+	ldr	r1, .L121
 	ldr	ip, [r1, #2320]
 	cmp	r3, ip
-	bne	.L109
+	bne	.L117
 	strh	r0, [r3, #2]	@ movhi
-	b	.L112
-.L104:
-	bcc	.L105
-.L106:
+	b	.L120
+.L112:
+	bcc	.L113
+.L114:
 	ldrh	r4, [r3]
 	movw	ip, #65535
 	cmp	r4, ip
-	bne	.L107
+	bne	.L115
 	strh	r1, [r2, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L113
+	ldr	r3, .L121
 	str	r2, [r3, #2332]
-.L99:
+.L107:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L107:
+.L115:
 	add	r3, r10, r4, lsl #3
 	mov	r1, r4
-	b	.L108
-.L109:
+	b	.L116
+.L117:
 	ldrh	r2, [r3, #2]
 	ldr	r1, [r1, #2316]
 	lsl	r2, r2, #3
 	strh	r0, [r1, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-	b	.L99
-.L114:
+	b	.L107
+.L122:
 	.align	2
-.L113:
+.L121:
 	.word	.LANCHOR0
 	.size	insert_data_list, .-insert_data_list
 	.align	2
@@ -943,7 +962,7 @@ INSERT_DATA_LIST:
 	sub	fp, ip, #4
 	uxth	r0, r0
 	bl	insert_data_list
-	ldr	r2, .L117
+	ldr	r2, .L125
 	add	r1, r2, #2336
 	ldrh	r2, [r2, #40]
 	ldrh	r3, [r1]
@@ -953,13 +972,13 @@ INSERT_DATA_LIST:
 	strh	r3, [r1]	@ movhi
 	ldmfdcs	sp, {fp, sp, pc}
 	mov	r2, #221
-	ldr	r1, .L117+4
-	ldr	r0, .L117+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	bl	sftl_printk
 	ldmfd	sp, {fp, sp, pc}
-.L118:
+.L126:
 	.align	2
-.L117:
+.L125:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
@@ -979,8 +998,8 @@ insert_free_list:
 	uxth	r0, r0
 	movw	lr, #65535
 	cmp	r0, lr
-	beq	.L120
-	ldr	r2, .L126
+	beq	.L128
+	ldr	r2, .L134
 	lsl	r5, r0, #3
 	mvn	r3, #0
 	ldr	r6, [r2, #2316]
@@ -991,7 +1010,7 @@ insert_free_list:
 	ldr	r3, [r2, #2340]
 	cmp	r3, #0
 	streq	ip, [r2, #2340]
-	beq	.L120
+	beq	.L128
 	ldr	r8, [r2, #2328]
 	lsl	r2, r0, #1
 	ldr	r7, [r1, #2316]
@@ -999,24 +1018,24 @@ insert_free_list:
 	ldrh	r9, [r8, r2]
 	sub	r2, r3, r7
 	ubfx	r2, r2, #3, #16
-.L124:
+.L132:
 	lsl	lr, r2, #1
 	ldrh	lr, [r8, lr]
 	cmp	lr, r9
-	bcs	.L122
+	bcs	.L130
 	ldrh	lr, [r3]
 	cmp	lr, r4
-	bne	.L123
+	bne	.L131
 	strh	r2, [ip, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-.L120:
+.L128:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L123:
+.L131:
 	add	r3, r7, lr, lsl #3
 	mov	r2, lr
-	b	.L124
-.L122:
+	b	.L132
+.L130:
 	ldrh	lr, [r3, #2]
 	strh	lr, [ip, #2]	@ movhi
 	strh	r2, [r6, r5]	@ movhi
@@ -1029,10 +1048,10 @@ insert_free_list:
 	lslne	r2, r2, #3
 	strhne	r0, [r1, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L120
-.L127:
+	b	.L128
+.L135:
 	.align	2
-.L126:
+.L134:
 	.word	.LANCHOR0
 	.size	insert_free_list, .-insert_free_list
 	.align	2
@@ -1049,7 +1068,7 @@ INSERT_FREE_LIST:
 	sub	fp, ip, #4
 	uxth	r0, r0
 	bl	insert_free_list
-	ldr	r2, .L130
+	ldr	r2, .L138
 	movw	r1, #2344
 	ldrh	r3, [r2, r1]
 	add	r3, r3, #1
@@ -1059,13 +1078,13 @@ INSERT_FREE_LIST:
 	cmp	r2, r3
 	ldmfdcs	sp, {fp, sp, pc}
 	mov	r2, #214
-	ldr	r1, .L130+4
-	ldr	r0, .L130+8
+	ldr	r1, .L138+4
+	ldr	r0, .L138+8
 	bl	sftl_printk
 	ldmfd	sp, {fp, sp, pc}
-.L131:
+.L139:
 	.align	2
-.L130:
+.L138:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
@@ -1082,7 +1101,7 @@ List_remove_node:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L139
+	ldr	r4, .L147
 	uxth	r1, r1
 	movw	r3, #65535
 	mov	r8, r0
@@ -1091,20 +1110,20 @@ List_remove_node:
 	add	r5, r7, r6
 	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L133
+	bne	.L141
 	ldr	r3, [r0]
 	cmp	r5, r3
-	beq	.L133
-	movw	r2, #379
-	ldr	r1, .L139+4
-	ldr	r0, .L139+8
+	beq	.L141
+	movw	r2, #397
+	ldr	r1, .L147+4
+	ldr	r0, .L147+8
 	bl	sftl_printk
-.L133:
+.L141:
 	ldr	r3, [r8]
 	ldrh	r2, [r7, r6]
 	cmp	r5, r3
 	movw	r3, #65535
-	bne	.L134
+	bne	.L142
 	cmp	r2, r3
 	ldrne	r3, [r4, #2316]
 	moveq	r3, #0
@@ -1113,25 +1132,25 @@ List_remove_node:
 	mvnne	r3, #0
 	strne	r2, [r8]
 	strhne	r3, [r2, #2]	@ movhi
-.L136:
+.L144:
 	mvn	r3, #0
 	mov	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r5, #2]	@ movhi
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L134:
+.L142:
 	cmp	r2, r3
 	ldrh	r3, [r5, #2]
-	bne	.L137
+	bne	.L145
 	cmp	r3, r2
 	ldrne	r2, [r4, #2316]
 	lslne	r3, r3, #3
 	mvnne	r1, #0
-	beq	.L136
-.L138:
+	beq	.L144
+.L146:
 	strh	r1, [r2, r3]	@ movhi
-	b	.L136
-.L137:
+	b	.L144
+.L145:
 	ldr	r1, [r4, #2316]
 	add	r2, r1, r2, lsl #3
 	strh	r3, [r2, #2]	@ movhi
@@ -1139,10 +1158,10 @@ List_remove_node:
 	ldrh	r1, [r7, r6]
 	ldr	r2, [r4, #2316]
 	lsl	r3, r3, #3
-	b	.L138
-.L140:
+	b	.L146
+.L148:
 	.align	2
-.L139:
+.L147:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
@@ -1163,32 +1182,32 @@ List_pop_index_node:
 	uxth	r1, r1
 	cmp	r3, #0
 	movweq	r4, #65535
-	beq	.L141
-	ldr	r2, .L148
+	beq	.L149
+	ldr	r2, .L156
 	movw	ip, #65535
 	ldr	r4, [r2, #2316]
-.L143:
+.L151:
 	cmp	r1, #0
-	bne	.L144
-.L146:
+	bne	.L152
+.L154:
 	sub	r3, r3, r4
 	ubfx	r4, r3, #3, #16
 	mov	r1, r4
 	bl	List_remove_node
-.L141:
+.L149:
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
-.L144:
+.L152:
 	ldrh	r2, [r3]
 	cmp	r2, ip
-	beq	.L146
+	beq	.L154
 	sub	r1, r1, #1
 	add	r3, r4, r2, lsl #3
 	uxth	r1, r1
-	b	.L143
-.L149:
+	b	.L151
+.L157:
 	.align	2
-.L148:
+.L156:
 	.word	.LANCHOR0
 	.size	List_pop_index_node, .-List_pop_index_node
 	.align	2
@@ -1219,33 +1238,33 @@ List_get_gc_head_node:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r1, .L157
+	ldr	r1, .L165
 	uxth	r2, r0
 	ldr	r3, [r1, #2320]
 	cmp	r3, #0
 	ldrne	r1, [r1, #2316]
 	movwne	r0, #65535
-	bne	.L153
+	bne	.L161
 	movw	r0, #65535
 	ldmfd	sp, {fp, sp, pc}
-.L155:
+.L163:
 	sub	r2, r2, #1
 	add	r3, r1, r3, lsl #3
 	uxth	r2, r2
-.L153:
+.L161:
 	cmp	r2, #0
-	beq	.L154
+	beq	.L162
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L155
+	bne	.L163
 	ldmfd	sp, {fp, sp, pc}
-.L154:
+.L162:
 	sub	r3, r3, r1
 	ubfx	r0, r3, #3, #16
 	ldmfd	sp, {fp, sp, pc}
-.L158:
+.L166:
 	.align	2
-.L157:
+.L165:
 	.word	.LANCHOR0
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.align	2
@@ -1260,25 +1279,25 @@ List_update_data_list:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L172
+	ldr	r4, .L180
 	movw	r3, #2348
 	uxth	r5, r0
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
-	beq	.L161
+	beq	.L169
 	movw	r3, #2396
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
-	beq	.L161
+	beq	.L169
 	movw	r3, #2444
 	ldrh	r3, [r4, r3]
 	cmp	r3, r5
-	beq	.L161
+	beq	.L169
 	ldr	r8, [r4, #2316]
 	ldr	r3, [r4, #2320]
 	add	r7, r8, r5, lsl #3
 	cmp	r7, r3
-	beq	.L161
+	beq	.L169
 	ldr	r2, [r4, #2324]
 	lsl	r3, r5, #1
 	ldrh	r6, [r7, #4]
@@ -1288,15 +1307,15 @@ List_update_data_list:
 	mulne	r6, r6, r3
 	ldr	r3, [r8, r5, lsl #3]
 	cmn	r3, #1
-	bne	.L164
-	movw	r2, #470
-	ldr	r1, .L172+4
-	ldr	r0, .L172+8
+	bne	.L172
+	mov	r2, #488
+	ldr	r1, .L180+4
+	ldr	r0, .L180+8
 	bl	sftl_printk
-.L164:
+.L172:
 	ldr	r3, [r8, r5, lsl #3]
 	cmn	r3, #1
-	beq	.L161
+	beq	.L169
 	ldrh	r2, [r7, #2]
 	ldr	r1, [r4, #2324]
 	lsl	r2, r2, #3
@@ -1309,30 +1328,30 @@ List_update_data_list:
 	mulne	r3, r3, r0
 	mvneq	r3, #0
 	cmp	r6, r3
-	bcs	.L161
-	ldr	r4, .L172+12
+	bcs	.L169
+	ldr	r4, .L180+12
 	mov	r1, r5
-	ldr	r0, .L172+16
+	ldr	r0, .L180+16
 	bl	List_remove_node
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L166
-	movw	r2, #481
-	ldr	r1, .L172+4
-	ldr	r0, .L172+8
+	bne	.L174
+	movw	r2, #499
+	ldr	r1, .L180+4
+	ldr	r0, .L180+8
 	bl	sftl_printk
-.L166:
+.L174:
 	ldrh	r3, [r4]
 	mov	r0, r5
 	sub	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	bl	INSERT_DATA_LIST
-.L161:
+.L169:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L173:
+.L181:
 	.align	2
-.L172:
+.L180:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+51
 	.word	.LC1
@@ -1351,52 +1370,52 @@ select_l2p_ram_region:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L184
+	ldr	r3, .L192
 	mov	r1, #0
 	mov	r0, #12
 	movw	ip, #65535
 	ldrh	r2, [r3, #138]
 	ldr	r3, [r3, #2492]
-.L175:
+.L183:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L177
+	bcc	.L185
 	mov	r4, r2
 	mov	r1, #0
 	mov	r0, #-2147483648
 	mov	r5, #12
-.L178:
+.L186:
 	uxth	lr, r1
 	cmp	lr, r2
-	bcc	.L180
+	bcc	.L188
 	cmp	r4, r2
-	bcc	.L176
-	ldr	r1, .L184+4
+	bcc	.L184
+	ldr	r1, .L192+4
 	mov	r4, r2
 	mvn	r0, #0
 	ldrh	r5, [r1]
 	mov	r1, #0
-.L181:
+.L189:
 	uxth	ip, r1
 	cmp	ip, r2
-	bcc	.L183
+	bcc	.L191
 	cmp	r4, r2
-	bcc	.L176
-	mov	r2, #784
-	ldr	r1, .L184+8
-	ldr	r0, .L184+12
+	bcc	.L184
+	movw	r2, #823
+	ldr	r1, .L192+8
+	ldr	r0, .L192+12
 	bl	sftl_printk
-	b	.L176
-.L177:
+	b	.L184
+.L185:
 	add	r1, r1, #1
 	mla	lr, r0, r1, r3
 	ldrh	lr, [lr, #-12]
 	cmp	lr, ip
-	bne	.L175
-.L176:
+	bne	.L183
+.L184:
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L180:
+.L188:
 	mla	ip, r5, r1, r3
 	add	r1, r1, #1
 	ldr	ip, [ip, #4]
@@ -1408,22 +1427,22 @@ select_l2p_ram_region:
 	cmp	r6, #0
 	movne	r0, ip
 	movne	r4, lr
-	b	.L178
-.L183:
+	b	.L186
+.L191:
 	ldr	lr, [r3, #4]
 	cmp	r0, lr
-	bls	.L182
+	bls	.L190
 	ldrh	r6, [r3]
 	cmp	r6, r5
 	movne	r0, lr
 	movne	r4, ip
-.L182:
+.L190:
 	add	r1, r1, #1
 	add	r3, r3, #12
-	b	.L181
-.L185:
+	b	.L189
+.L193:
 	.align	2
-.L184:
+.L192:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2496
 	.word	.LANCHOR1+73
@@ -1441,17 +1460,17 @@ FtlUpdateVaildLpn:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	ip, .L192
+	ldr	ip, .L200
 	movw	r1, #2498
 	ldrh	r2, [ip, r1]
 	mov	r3, ip
 	cmp	r2, #4
 	cmpls	r0, #0
-	bne	.L187
+	bne	.L195
 	add	r2, r2, #1
 	strh	r2, [ip, r1]	@ movhi
 	ldmfd	sp, {fp, sp, pc}
-.L187:
+.L195:
 	mov	r2, #0
 	movw	lr, #65535
 	strh	r2, [ip, r1]	@ movhi
@@ -1459,20 +1478,20 @@ FtlUpdateVaildLpn:
 	ldrh	r1, [ip, #40]
 	ldr	r2, [ip, #2324]
 	add	r1, r2, r1, lsl #1
-.L188:
+.L196:
 	cmp	r2, r1
-	bne	.L190
+	bne	.L198
 	ldmfd	sp, {fp, sp, pc}
-.L190:
+.L198:
 	ldrh	ip, [r2], #2
 	cmp	ip, lr
 	ldrne	r0, [r3, #2500]
 	addne	r0, r0, ip
 	strne	r0, [r3, #2500]
-	b	.L188
-.L193:
+	b	.L196
+.L201:
 	.align	2
-.L192:
+.L200:
 	.word	.LANCHOR0
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	2
@@ -1489,11 +1508,11 @@ ftl_set_blk_mode:
 	sub	fp, ip, #4
 	cmp	r1, #0
 	uxth	r0, r0
-	beq	.L195
+	beq	.L203
 	bl	ftl_set_blk_mode.part.6
 	ldmfd	sp, {fp, sp, pc}
-.L195:
-	ldr	r3, .L197
+.L203:
+	ldr	r3, .L205
 	lsr	r1, r0, #5
 	mov	ip, #1
 	and	r0, r0, #31
@@ -1502,9 +1521,9 @@ ftl_set_blk_mode:
 	bic	r0, r3, ip, lsl r0
 	str	r0, [r2, r1, lsl #2]
 	ldmfd	sp, {fp, sp, pc}
-.L198:
+.L206:
 	.align	2
-.L197:
+.L205:
 	.word	.LANCHOR0
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.align	2
@@ -1519,7 +1538,7 @@ ftl_get_blk_mode:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L200
+	ldr	r3, .L208
 	uxth	r0, r0
 	ldr	r3, [r3, #24]
 	lsr	r2, r0, #5
@@ -1528,9 +1547,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.L201:
+.L209:
 	.align	2
-.L200:
+.L208:
 	.word	.LANCHOR0
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.align	2
@@ -1549,14 +1568,14 @@ ftl_sb_update_avl_pages:
 	uxth	r2, r2
 	uxth	r5, r1
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L209
+	ldr	r3, .L217
 	add	ip, r0, r2, lsl #1
 	movw	r1, #65535
 	add	ip, ip, #14
 	ldrh	lr, [r3, #32]
-.L203:
+.L211:
 	cmp	r2, lr
-	bcc	.L205
+	bcc	.L213
 	ldrh	r1, [r3, #102]
 	add	ip, r0, #16
 	mov	r3, #0
@@ -1564,12 +1583,12 @@ ftl_sb_update_avl_pages:
 	sub	r1, r1, #1
 	sub	r1, r1, r5
 	uxth	r1, r1
-.L206:
+.L214:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L208
+	bhi	.L216
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L205:
+.L213:
 	ldrh	r4, [ip, #2]!
 	add	r2, r2, #1
 	uxth	r2, r2
@@ -1577,18 +1596,18 @@ ftl_sb_update_avl_pages:
 	ldrhne	r4, [r0, #4]
 	addne	r4, r4, #1
 	strhne	r4, [r0, #4]	@ movhi
-	b	.L203
-.L208:
+	b	.L211
+.L216:
 	ldrh	r2, [ip], #2
 	add	r3, r3, #1
 	cmp	r2, r4
 	ldrhne	r2, [r0, #4]
 	addne	r2, r1, r2
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L206
-.L210:
+	b	.L214
+.L218:
 	.align	2
-.L209:
+.L217:
 	.word	.LANCHOR0
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	2
@@ -1614,14 +1633,14 @@ FtlSlcSuperblockCheck:
 	mov	lr, #0
 	add	r2, r0, r2, lsl #1
 	ldrh	r1, [r2, #16]
-	ldr	r2, .L217
+	ldr	r2, .L225
 	ldrh	ip, [r2, #32]
 	mov	r2, r3
-.L214:
+.L222:
 	cmp	r1, r2
-	beq	.L216
+	beq	.L224
 	ldmfd	sp, {fp, sp, pc}
-.L216:
+.L224:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	add	r3, r3, #1
 	uxtb	r3, r3
@@ -1634,10 +1653,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	add	r3, r0, r3, lsl #1
 	ldrh	r1, [r3, #16]
-	b	.L214
-.L218:
+	b	.L222
+.L226:
 	.align	2
-.L217:
+.L225:
 	.word	.LANCHOR0
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	2
@@ -1654,27 +1673,27 @@ make_superblock:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r4, r0
-	ldr	r6, .L224
+	ldr	r6, .L232
 	ldrh	r2, [r0]
 	ldrh	r3, [r6, #40]
 	cmp	r2, r3
-	bcc	.L220
-	movw	r2, #2097
-	ldr	r1, .L224+4
-	ldr	r0, .L224+8
+	bcc	.L228
+	movw	r2, #2146
+	ldr	r1, .L232+4
+	ldr	r0, .L232+8
 	bl	sftl_printk
-.L220:
+.L228:
 	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
-	ldr	r10, .L224+12
+	ldr	r10, .L232+12
 	mvn	r8, #0
 	mov	r5, #0
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L221:
+.L229:
 	uxth	r3, r5
 	cmp	r9, r3
-	bhi	.L223
+	bhi	.L231
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	mov	r0, #0
 	ldrh	r2, [r6, #102]
@@ -1683,7 +1702,7 @@ make_superblock:
 	mov	r3, #1
 	strb	r3, [r4, #9]
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L223:
+.L231:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	add	r7, r7, #2
 	ldrh	r1, [r4]
@@ -1698,10 +1717,10 @@ make_superblock:
 	ldrbeq	r3, [r4, #7]	@ zero_extendqisi2
 	addeq	r3, r3, #1
 	strbeq	r3, [r4, #7]
-	b	.L221
-.L225:
+	b	.L229
+.L233:
 	.align	2
-.L224:
+.L232:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+95
 	.word	.LC1
@@ -1719,7 +1738,7 @@ update_multiplier_value:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L232
+	ldr	r3, .L240
 	mov	r5, #0
 	uxth	r6, r0
 	mov	r4, r5
@@ -1727,23 +1746,23 @@ update_multiplier_value:
 	mov	r7, r3
 	ldrh	r9, [r3, #102]
 	add	r10, r3, #60
-.L227:
+.L235:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L229
+	bhi	.L237
 	cmp	r4, #0
 	moveq	r0, r4
-	beq	.L230
+	beq	.L238
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__divsi3
-.L230:
+.L238:
 	ldr	r1, [r7, #2316]
 	add	r1, r1, r6, lsl #3
 	strh	r0, [r1, #4]	@ movhi
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L229:
+.L237:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
@@ -1752,10 +1771,10 @@ update_multiplier_value:
 	add	r5, r5, #1
 	addeq	r4, r4, r9
 	uxtheq	r4, r4
-	b	.L227
-.L233:
+	b	.L235
+.L241:
 	.align	2
-.L232:
+.L240:
 	.word	.LANCHOR0
 	.size	update_multiplier_value, .-update_multiplier_value
 	.align	2
@@ -1770,7 +1789,7 @@ GetFreeBlockMinEraseCount:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L237
+	ldr	r3, .L245
 	ldr	r0, [r3, #2340]
 	cmp	r0, #0
 	ldrne	r2, [r3, #2316]
@@ -1780,9 +1799,9 @@ GetFreeBlockMinEraseCount:
 	lslne	r0, r0, #1
 	ldrhne	r0, [r3, r0]
 	ldmfd	sp, {fp, sp, pc}
-.L238:
+.L246:
 	.align	2
-.L237:
+.L245:
 	.word	.LANCHOR0
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.align	2
@@ -1797,7 +1816,7 @@ GetFreeBlockMaxEraseCount:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L247
+	ldr	r2, .L255
 	uxth	r4, r0
 	ldr	r0, [r2, #2340]
 	cmp	r0, #0
@@ -1813,26 +1832,26 @@ GetFreeBlockMaxEraseCount:
 	uxthgt	r4, r3
 	sub	r3, r0, ip
 	ubfx	r3, r3, #3, #16
-.L242:
+.L250:
 	uxth	r0, r1
 	cmp	r4, r0
-	bls	.L244
+	bls	.L252
 	lsl	r0, r3, #3
 	add	r1, r1, #1
 	ldrh	lr, [ip, r0]
 	cmp	lr, r5
-	bne	.L246
-.L244:
+	bne	.L254
+.L252:
 	ldr	r2, [r2, #2328]
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L246:
+.L254:
 	mov	r3, lr
-	b	.L242
-.L248:
+	b	.L250
+.L256:
 	.align	2
-.L247:
+.L255:
 	.word	.LANCHOR0
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.align	2
@@ -1849,386 +1868,386 @@ FtlPrintInfo2buf:
 	sub	fp, ip, #4
 	sub	sp, sp, #12
 	mov	r7, r0
-	ldr	r6, .L261
+	ldr	r6, .L269
 	add	r5, r7, #12
-	ldr	r1, .L261+4
+	ldr	r1, .L269+4
 	movw	r9, #2344
 	bl	strcpy
 	ldr	r2, [r6, #116]
 	mov	r0, r5
-	ldr	r1, .L261+8
+	ldr	r1, .L269+8
 	bl	sprintf
 	add	r5, r5, r0
-	ldr	r1, .L261+12
+	ldr	r1, .L269+12
 	mov	r0, r5
 	add	r5, r5, #10
 	bl	strcpy
 	ldr	r2, [r6, #2504]
 	mov	r0, r5
-	ldr	r1, .L261+16
+	ldr	r1, .L269+16
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2500]
-	ldr	r1, .L261+20
+	ldr	r1, .L269+20
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2508]
-	ldr	r1, .L261+24
+	ldr	r1, .L269+24
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2512]
-	ldr	r1, .L261+28
+	ldr	r1, .L269+28
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2516]
-	ldr	r1, .L261+32
+	ldr	r1, .L269+32
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2520]
-	ldr	r1, .L261+36
+	ldr	r1, .L269+36
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2524]
-	ldr	r1, .L261+40
+	ldr	r1, .L269+40
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2528]
-	ldr	r1, .L261+44
+	ldr	r1, .L269+44
 	mov	r0, r5
 	bl	sprintf
 	ldr	r2, [r6, #2532]
 	add	r5, r5, r0
-	ldr	r1, .L261+48
+	ldr	r1, .L269+48
 	mov	r0, r5
-	ldr	r4, .L261+52
-	ldr	r8, .L261+56
+	ldr	r4, .L269+52
+	ldr	r8, .L269+56
 	lsr	r2, r2, #11
 	bl	sprintf
 	ldr	r2, [r6, #2536]
 	add	r5, r5, r0
-	ldr	r1, .L261+60
+	ldr	r1, .L269+60
 	mov	r0, r5
 	lsr	r2, r2, #11
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2540]
-	ldr	r1, .L261+64
+	ldr	r1, .L269+64
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2544]
-	ldr	r1, .L261+68
+	ldr	r1, .L269+68
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #158]
-	ldr	r1, .L261+72
+	ldr	r1, .L269+72
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, r9]
-	ldr	r1, .L261+76
+	ldr	r1, .L269+76
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2548]
-	ldr	r1, .L261+80
+	ldr	r1, .L269+80
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2552]
-	ldr	r1, .L261+84
+	ldr	r1, .L269+84
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2556]
-	ldr	r1, .L261+88
+	ldr	r1, .L269+88
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2560]
-	ldr	r1, .L261+92
+	ldr	r1, .L269+92
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2564]
-	ldr	r1, .L261+96
+	ldr	r1, .L269+96
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2568]
-	ldr	r1, .L261+100
+	ldr	r1, .L269+100
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r4, #30]
-	ldr	r1, .L261+104
+	ldr	r1, .L269+104
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r4, #28]
-	ldr	r1, .L261+108
+	ldr	r1, .L269+108
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #140]
-	ldr	r1, .L261+112
+	ldr	r1, .L269+112
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #132]
-	ldr	r1, .L261+116
+	ldr	r1, .L269+116
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #28]
-	ldr	r1, .L261+120
+	ldr	r1, .L269+120
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #218]
-	ldr	r1, .L261+124
+	ldr	r1, .L269+124
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #40]
-	ldr	r1, .L261+128
+	ldr	r1, .L269+128
 	mov	r0, r5
 	bl	sprintf
 	movw	r3, #2572
 	add	r5, r5, r0
 	ldrh	r2, [r6, r3]
 	mov	r0, r5
-	ldr	r1, .L261+132
+	ldr	r1, .L269+132
 	movw	r4, #2348
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #44]
-	ldr	r1, .L261+136
+	ldr	r1, .L269+136
 	mov	r0, r5
 	bl	sprintf
 	add	r3, r6, #2576
 	add	r5, r5, r0
 	ldrh	r2, [r3]
 	mov	r0, r5
-	ldr	r1, .L261+140
+	ldr	r1, .L269+140
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #152]
-	ldr	r1, .L261+144
+	ldr	r1, .L269+144
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #2]
-	ldr	r1, .L261+148
+	ldr	r1, .L269+148
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
-	ldr	r1, .L261+152
+	ldr	r1, .L269+152
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, r4]
-	ldr	r1, .L261+156
+	ldr	r1, .L269+156
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
-	ldr	r1, .L261+160
+	ldr	r1, .L269+160
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #4]
-	ldr	r1, .L261+164
+	ldr	r1, .L269+164
 	mov	r0, r5
 	bl	sprintf
 	ldrh	r3, [r6, r4]
 	add	r5, r5, r0
 	ldr	r2, [r6, #2324]
 	mov	r0, r5
-	ldr	r1, .L261+168
+	ldr	r1, .L269+168
 	movw	r4, #2396
 	lsl	r3, r3, #1
 	ldrh	r2, [r2, r3]
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #50]
-	ldr	r1, .L261+172
+	ldr	r1, .L269+172
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
-	ldr	r1, .L261+176
+	ldr	r1, .L269+176
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, r4]
-	ldr	r1, .L261+180
+	ldr	r1, .L269+180
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
-	ldr	r1, .L261+184
+	ldr	r1, .L269+184
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #52]
-	ldr	r1, .L261+188
+	ldr	r1, .L269+188
 	mov	r0, r5
 	bl	sprintf
 	ldrh	r3, [r6, r4]
 	add	r5, r5, r0
 	ldr	r2, [r6, #2324]
 	mov	r0, r5
-	ldr	r1, .L261+192
+	ldr	r1, .L269+192
 	add	r4, r8, #96
 	lsl	r3, r3, #1
 	ldrh	r2, [r2, r3]
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #98]
-	ldr	r1, .L261+196
+	ldr	r1, .L269+196
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
-	ldr	r1, .L261+200
+	ldr	r1, .L269+200
 	mov	r0, r5
 	bl	sprintf
 	movw	r3, #2444
 	add	r5, r5, r0
 	ldrh	r2, [r6, r3]
 	mov	r0, r5
-	ldr	r1, .L261+204
+	ldr	r1, .L269+204
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
-	ldr	r1, .L261+208
+	ldr	r1, .L269+208
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r8, #100]
-	ldr	r1, .L261+212
+	ldr	r1, .L269+212
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r4, #146]
-	ldr	r1, .L261+216
+	ldr	r1, .L269+216
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
-	ldr	r1, .L261+220
+	ldr	r1, .L269+220
 	mov	r0, r5
 	bl	sprintf
 	movw	r8, #2588
 	add	r5, r5, r0
 	ldrh	r2, [r6, r8]
 	mov	r0, r5
-	ldr	r1, .L261+224
+	ldr	r1, .L269+224
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
-	ldr	r1, .L261+228
+	ldr	r1, .L269+228
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r4, #148]
-	ldr	r1, .L261+232
+	ldr	r1, .L269+232
 	mov	r0, r5
 	bl	sprintf
 	ldr	r3, [r6, #2712]
 	add	r5, r5, r0
 	ldr	r2, [r6, #2716]
 	mov	r0, r5
-	ldr	r1, .L261+236
+	ldr	r1, .L269+236
 	str	r3, [sp]
 	ldr	r3, [r6, #2720]
 	bl	sprintf
 	add	r4, r5, r0
 	ldr	r2, [r6, #2708]
-	ldr	r1, .L261+240
+	ldr	r1, .L269+240
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldr	r2, [r6, #2732]
-	ldr	r1, .L261+244
+	ldr	r1, .L269+244
 	mov	r0, r4
 	bl	sprintf
 	movw	r3, #3148
 	add	r4, r4, r0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+248
+	ldr	r1, .L269+248
 	bl	sprintf
 	movw	r3, #3150
 	add	r4, r4, r0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+252
+	ldr	r1, .L269+252
 	bl	sprintf
 	add	r4, r4, r0
 	ldr	r2, [r6, #3152]
-	ldr	r1, .L261+256
+	ldr	r1, .L269+256
 	mov	r0, r4
 	bl	sprintf
 	movw	r3, #3156
 	add	r4, r4, r0
 	ldrh	r2, [r6, r3]
 	mov	r0, r4
-	ldr	r1, .L261+260
+	ldr	r1, .L269+260
 	bl	sprintf
 	add	r4, r4, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L261+264
+	ldr	r1, .L269+264
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldrh	r0, [r6, r9]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L261+268
+	ldr	r1, .L269+268
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L261+272
+	ldr	r3, .L269+272
 	add	r4, r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L250
-.L255:
+	beq	.L258
+.L263:
 	sub	r0, r4, r7
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L250:
+.L258:
 	ldrh	r3, [r6, r8]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L252
+	beq	.L260
 	ldr	r2, [r6, #2324]
 	lsl	r3, r3, #1
 	mov	r0, r4
-	ldr	r1, .L261+276
+	ldr	r1, .L269+276
 	ldrh	r2, [r2, r3]
 	bl	sprintf
 	add	r4, r4, r0
-.L252:
+.L260:
 	mov	r0, #0
-	ldr	r9, .L261+280
+	ldr	r9, .L269+280
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	mov	r5, #0
 	movw	r10, #65535
-.L254:
+.L262:
 	cmp	r3, r10
-	beq	.L253
+	beq	.L261
 	ldr	r2, [r6, #2328]
 	lsl	r1, r3, #1
 	lsl	r8, r3, #3
@@ -2250,18 +2269,18 @@ FtlPrintInfo2buf:
 	cmp	r5, #16
 	add	r4, r4, r0
 	ldrh	r3, [r3, r8]
-	bne	.L254
-.L253:
+	bne	.L262
+.L261:
 	ldr	r3, [r6, #2340]
 	mov	r5, #0
 	ldr	r2, [r6, #2316]
 	movw	r9, #65535
-	ldr	r10, .L261+284
+	ldr	r10, .L269+284
 	sub	r3, r3, r2
 	ubfx	r3, r3, #3, #16
-.L256:
+.L264:
 	cmp	r3, r9
-	beq	.L255
+	beq	.L263
 	ldr	r1, [r6, #2328]
 	lsl	r2, r3, #1
 	lsl	r8, r3, #3
@@ -2278,13 +2297,13 @@ FtlPrintInfo2buf:
 	bl	sprintf
 	cmp	r5, #4
 	add	r4, r4, r0
-	beq	.L255
+	beq	.L263
 	ldr	r3, [r6, #2316]
 	ldrh	r3, [r3, r8]
-	b	.L256
-.L262:
+	b	.L264
+.L270:
 	.align	2
-.L261:
+.L269:
 	.word	.LANCHOR0
 	.word	.LC2
 	.word	.LC3
@@ -2370,9 +2389,9 @@ rknand_proc_ftlread:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L264
+	ldr	r2, .L272
 	mov	r5, r0
-	ldr	r1, .L264+4
+	ldr	r1, .L272+4
 	bl	sprintf
 	add	r4, r5, r0
 	mov	r0, r4
@@ -2380,9 +2399,9 @@ rknand_proc_ftlread:
 	add	r0, r4, r0
 	sub	r0, r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L265:
+.L273:
 	.align	2
-.L264:
+.L272:
 	.word	.LC70
 	.word	.LC71
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
@@ -2399,19 +2418,19 @@ GetSwlReplaceBlock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #16
-	ldr	r4, .L290
+	ldr	r4, .L298
 	ldr	r2, [r4, #2556]
 	ldr	r3, [r4, #2568]
 	cmp	r2, r3
-	bcs	.L267
+	bcs	.L275
 	ldr	r2, [r4, #2328]
 	mov	r3, #0
 	ldrh	r1, [r4, #40]
 	str	r3, [r4, #2548]
 	sub	r2, r2, #2
-.L268:
+.L276:
 	cmp	r3, r1
-	bcc	.L269
+	bcc	.L277
 	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__udivsi3
@@ -2421,48 +2440,48 @@ GetSwlReplaceBlock:
 	sub	r0, r5, r0
 	bl	__udivsi3
 	str	r0, [r4, #2548]
-.L270:
+.L278:
 	ldr	r6, [r4, #2568]
 	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L275
+	bls	.L283
 	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L275
-.L277:
+	bls	.L283
+.L285:
 	movw	r5, #65535
-.L276:
+.L284:
 	mov	r0, r5
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L269:
+.L277:
 	ldrh	r0, [r2, #2]!
 	add	r3, r3, #1
 	ldr	ip, [r4, #2548]
 	add	r0, r0, ip
 	str	r0, [r4, #2548]
-	b	.L268
-.L267:
+	b	.L276
+.L275:
 	ldr	r3, [r4, #2564]
 	cmp	r2, r3
 	addhi	r3, r3, #1
 	strhi	r3, [r4, #2564]
 	movhi	r3, #0
-	bls	.L270
-.L272:
+	bls	.L278
+.L280:
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	bcs	.L270
+	bcs	.L278
 	ldr	r0, [r4, #2328]
 	lsl	r1, r3, #1
 	add	r3, r3, #1
 	ldrh	r2, [r0, r1]
 	add	r2, r2, #1
 	strh	r2, [r0, r1]	@ movhi
-	b	.L272
-.L275:
+	b	.L280
+.L283:
 	movw	r3, #2344
 	ldrh	r0, [r4, r3]
 	add	r0, r0, r0, lsl #1
@@ -2471,53 +2490,53 @@ GetSwlReplaceBlock:
 	add	r3, r6, #64
 	mov	r9, r0
 	cmp	r0, r3
-	bcc	.L277
+	bcc	.L285
 	ldr	r3, [r4, #2320]
 	cmp	r3, #0
-	beq	.L277
+	beq	.L285
 	ldrh	r10, [r4, #40]
 	movw	r1, #65535
 	ldr	lr, [r4, #2316]
 	mov	r0, #0
 	ldr	r8, [r4, #2328]
 	mov	r2, r1
-.L278:
+.L286:
 	ldrh	ip, [r3]
 	movw	r5, #65535
 	cmp	ip, r5
-	bne	.L281
+	bne	.L289
 	mov	r5, r2
-.L280:
+.L288:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L277
+	beq	.L285
 	lsl	r3, r5, #1
 	ldrh	r10, [r8, r3]
 	cmp	r6, r10
-	bcs	.L282
+	bcs	.L290
 	str	r3, [fp, #-44]
 	bl	GetFreeBlockMinEraseCount
 	ldr	r3, [fp, #-44]
 	cmp	r6, r0
 	strcc	r1, [r4, #2568]
-.L282:
+.L290:
 	cmp	r7, r10
-	bls	.L277
+	bls	.L285
 	add	r2, r10, #128
 	cmp	r9, r2
-	ble	.L277
+	ble	.L285
 	add	r2, r10, #256
 	cmp	r7, r2
-	bhi	.L283
+	bhi	.L291
 	ldr	r2, [r4, #2564]
 	add	r10, r10, #768
 	cmp	r10, r2
-	bcs	.L277
-.L283:
+	bcs	.L285
+.L291:
 	str	r9, [sp, #8]
 	mov	r1, r5
 	ldrh	r2, [r8, r3]
-	ldr	r0, .L290+4
+	ldr	r0, .L298+4
 	str	r2, [sp, #4]
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3]
@@ -2527,31 +2546,31 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	mov	r3, #1
 	str	r3, [r4, #3160]
-	b	.L276
-.L281:
+	b	.L284
+.L289:
 	add	r0, r0, #1
 	uxth	r0, r0
 	cmp	r0, r10
-	bhi	.L277
+	bhi	.L285
 	ldrh	r5, [r3, #4]
 	cmp	r5, #0
-	beq	.L279
+	beq	.L287
 	sub	r3, r3, lr
 	asr	r3, r3, #3
 	uxth	r5, r3
 	lsl	r3, r5, #1
 	ldrh	r3, [r8, r3]
 	cmp	r6, r3
-	bcs	.L280
+	bcs	.L288
 	cmp	r1, r3
 	movhi	r1, r3
 	movhi	r2, r5
-.L279:
+.L287:
 	add	r3, lr, ip, lsl #3
-	b	.L278
-.L291:
+	b	.L286
+.L299:
 	.align	2
-.L290:
+.L298:
 	.word	.LANCHOR0
 	.word	.LC72
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
@@ -2570,19 +2589,19 @@ free_data_superblock:
 	uxth	r0, r0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L293
-	ldr	r3, .L294
+	beq	.L301
+	ldr	r3, .L302
 	mov	r1, #0
 	ldr	r2, [r3, #2324]
 	lsl	r3, r0, #1
 	strh	r1, [r2, r3]	@ movhi
 	bl	INSERT_FREE_LIST
-.L293:
+.L301:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L295:
+.L303:
 	.align	2
-.L294:
+.L302:
 	.word	.LANCHOR0
 	.size	free_data_superblock, .-free_data_superblock
 	.align	2
@@ -2601,30 +2620,30 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L297
-	movw	r2, #2707
-	ldr	r1, .L310
-	ldr	r0, .L310+4
+	bne	.L305
+	movw	r2, #2776
+	ldr	r1, .L318
+	ldr	r0, .L318+4
 	bl	sftl_printk
-.L297:
-	ldr	r5, .L310+8
+.L305:
+	ldr	r5, .L318+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r2, r3
-	bne	.L298
-	movw	r2, #2708
-	ldr	r1, .L310
-	ldr	r0, .L310+4
+	bne	.L306
+	movw	r2, #2777
+	ldr	r1, .L318
+	ldr	r0, .L318+4
 	bl	sftl_printk
-.L298:
+.L306:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L299
-	movw	r2, #2709
-	ldr	r1, .L310
-	ldr	r0, .L310+4
+	bne	.L307
+	movw	r2, #2778
+	ldr	r1, .L318
+	ldr	r0, .L318+4
 	bl	sftl_printk
-.L299:
+.L307:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	mov	r3, #0
 	ldrh	r1, [r5, #32]
@@ -2633,10 +2652,10 @@ get_new_active_ppa:
 	add	r2, r4, r2, lsl #1
 	ldrh	r0, [r2, #16]
 	mov	r2, r3
-.L300:
+.L308:
 	cmp	r0, ip
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L302
+	beq	.L310
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	sub	r2, r2, #1
@@ -2644,7 +2663,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L304:
+.L312:
 	add	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2655,7 +2674,7 @@ get_new_active_ppa:
 	add	ip, r4, r3, lsl #1
 	ldrh	ip, [ip, #16]
 	cmp	ip, r0
-	beq	.L304
+	beq	.L312
 	strb	r3, [r4, #6]
 	cmp	r2, #0
 	ldrh	r3, [r4, #2]
@@ -2665,15 +2684,15 @@ get_new_active_ppa:
 	lsr	r3, r3, #5
 	moveq	r3, #0
 	cmp	r3, #0
-	beq	.L296
-	movw	r2, #2730
-	ldr	r1, .L310
-	ldr	r0, .L310+4
+	beq	.L304
+	movw	r2, #2799
+	ldr	r1, .L318
+	ldr	r0, .L318+4
 	bl	sftl_printk
-.L296:
+.L304:
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L302:
+.L310:
 	add	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2685,10 +2704,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	add	r3, r4, r3, lsl #1
 	ldrh	r0, [r3, #16]
-	b	.L300
-.L311:
+	b	.L308
+.L319:
 	.align	2
-.L310:
+.L318:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
@@ -2705,26 +2724,26 @@ FtlGcBufInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L317
+	ldr	r3, .L325
 	mov	lr, #12
 	mov	r4, #1
 	mov	r5, #20
 	mov	r2, #0
 	str	r2, [r3, #3164]
-.L313:
+.L321:
 	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bcc	.L314
+	bcc	.L322
 	mov	ip, #12
 	mov	lr, #0
-.L315:
+.L323:
 	ldr	r2, [r3, #3184]
 	cmp	r1, r2
-	bcc	.L316
+	bcc	.L324
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L314:
+.L322:
 	uxth	r2, r2
 	ldr	r6, [r3, #3168]
 	mul	r0, lr, r2
@@ -2757,8 +2776,8 @@ FtlGcBufInit:
 	ldr	r1, [r6, #4]
 	str	r1, [r2, #12]
 	mov	r2, ip
-	b	.L313
-.L316:
+	b	.L321
+.L324:
 	mul	r4, ip, r1
 	ldr	r5, [r3, #3168]
 	add	r2, r5, r4
@@ -2785,10 +2804,10 @@ FtlGcBufInit:
 	bic	r2, r2, #3
 	add	r2, r4, r2
 	str	r2, [r0, #4]
-	b	.L315
-.L318:
+	b	.L323
+.L326:
 	.align	2
-.L317:
+.L325:
 	.word	.LANCHOR0
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
@@ -2803,37 +2822,37 @@ FtlGcBufFree:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L326
+	ldr	r3, .L334
 	mov	lr, #0
 	mov	r5, #20
 	mov	r7, #12
 	mov	r8, lr
 	ldr	r6, [r3, #3184]
 	ldr	r4, [r3, #3168]
-.L320:
+.L328:
 	uxth	r3, lr
 	cmp	r1, r3
 	ldmfdls	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	mla	ip, r5, r3, r0
 	mov	r2, #0
-.L321:
+.L329:
 	uxth	r3, r2
 	cmp	r6, r3
-	bls	.L322
+	bls	.L330
 	mul	r3, r7, r3
 	add	r2, r2, #1
 	ldr	r10, [r4, r3]
 	add	r9, r4, r3
 	ldr	r3, [ip, #8]
 	cmp	r10, r3
-	bne	.L321
+	bne	.L329
 	str	r8, [r9, #8]
-.L322:
+.L330:
 	add	lr, lr, #1
-	b	.L320
-.L327:
+	b	.L328
+.L335:
 	.align	2
-.L326:
+.L334:
 	.word	.LANCHOR0
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
@@ -2848,41 +2867,41 @@ FtlGcBufAlloc:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L335
+	ldr	r3, .L343
 	mov	ip, #0
 	mov	r6, #12
 	mov	r7, #1
 	mov	r8, #20
 	ldr	r4, [r3, #3184]
 	ldr	r5, [r3, #3168]
-.L329:
+.L337:
 	uxth	r2, ip
 	cmp	r1, r2
-	bhi	.L333
+	bhi	.L341
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L333:
+.L341:
 	mov	lr, #0
-.L330:
+.L338:
 	uxth	r3, lr
 	cmp	r4, r3
-	bls	.L331
+	bls	.L339
 	mla	r3, r6, r3, r5
 	add	lr, lr, #1
 	ldr	r9, [r3, #8]
 	cmp	r9, #0
-	bne	.L330
+	bne	.L338
 	mla	r2, r8, r2, r0
 	ldr	lr, [r3]
 	str	r7, [r3, #8]
 	str	lr, [r2, #8]
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L331:
+.L339:
 	add	ip, ip, #1
-	b	.L329
-.L336:
+	b	.L337
+.L344:
 	.align	2
-.L335:
+.L343:
 	.word	.LANCHOR0
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
@@ -2897,26 +2916,26 @@ IsBlkInGcList:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L342
+	ldr	r2, .L350
 	movw	r1, #3192
 	uxth	r0, r0
 	ldr	r3, [r2, #3188]
 	ldrh	r2, [r2, r1]
 	add	r2, r3, r2, lsl #1
-.L338:
+.L346:
 	cmp	r3, r2
-	bne	.L340
+	bne	.L348
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L340:
+.L348:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L338
+	bne	.L346
 	mov	r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.L343:
+.L351:
 	.align	2
-.L342:
+.L350:
 	.word	.LANCHOR0
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	2
@@ -2936,31 +2955,31 @@ FtlGcUpdatePage:
 	mov	r5, r1
 	mov	r6, r2
 	bl	P2V_block_in_plane
-	ldr	ip, .L348
+	ldr	ip, .L356
 	movw	r3, #3192
 	ldr	r2, [ip, #3188]
 	ldrh	lr, [ip, r3]
 	mov	r3, #0
 	sub	r1, r2, #2
-.L345:
+.L353:
 	uxth	r7, r3
 	cmp	r7, lr
-	bcc	.L347
-	bne	.L346
+	bcc	.L355
+	bne	.L354
 	lsl	r3, r7, #1
 	strh	r0, [r2, r3]	@ movhi
 	movw	r2, #3192
 	ldrh	r3, [ip, r2]
 	add	r3, r3, #1
 	strh	r3, [ip, r2]	@ movhi
-	b	.L346
-.L347:
+	b	.L354
+.L355:
 	ldrh	r7, [r1, #2]!
 	add	r3, r3, #1
 	cmp	r7, r0
-	bne	.L345
-.L346:
-	ldr	r0, .L348+4
+	bne	.L353
+.L354:
+	ldr	r0, .L356+4
 	mov	r3, #12
 	ldrh	r2, [r0]
 	mul	r3, r3, r2
@@ -2972,9 +2991,9 @@ FtlGcUpdatePage:
 	add	r3, r3, #1
 	strh	r3, [r0]	@ movhi
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L349:
+.L357:
 	.align	2
-.L348:
+.L356:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3200
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -2988,33 +3007,47 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, fp, ip, lr, pc}
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	uxth	r4, r0
-	ldr	r0, .L353
+	movw	r7, #3202
 	mov	r1, r4
+	ldr	r0, .L363
 	bl	sftl_printk
-	ldr	r3, .L353+4
-	movw	ip, #3202
+	ldr	r3, .L363+4
+	ldrh	r8, [r3, r7]
+	cmp	r4, r8
+	beq	.L359
+	movw	r5, #3204
+	ldrh	r6, [r3, r5]
+	cmp	r4, r6
+	beq	.L359
+	movw	ip, #3206
 	ldrh	lr, [r3, ip]
 	cmp	r4, lr
-	beq	.L351
-	movw	r2, #3204
-	ldrh	r0, [r3, r2]
+	beq	.L359
+	movw	r1, #3208
+	ldrh	r0, [r3, r1]
 	cmp	r4, r0
-	beq	.L351
-	movw	r1, #65535
-	cmp	lr, r1
+	beq	.L359
+	movw	r2, #65535
+	cmp	r8, r2
+	strheq	r4, [r3, r7]	@ movhi
+	beq	.L359
+	cmp	r6, r2
+	strheq	r4, [r3, r5]	@ movhi
+	beq	.L359
+	cmp	lr, r2
 	strheq	r4, [r3, ip]	@ movhi
-	beq	.L351
-	cmp	r0, r1
-	strheq	r4, [r3, r2]	@ movhi
-.L351:
+	beq	.L359
+	cmp	r0, r2
+	strheq	r4, [r3, r1]	@ movhi
+.L359:
 	mov	r0, #0
-	ldmfd	sp, {r4, fp, sp, pc}
-.L354:
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L364:
 	.align	2
-.L353:
+.L363:
 	.word	.LC73
 	.word	.LANCHOR0
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -3030,48 +3063,48 @@ FtlGcMarkBadPhyBlk:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L359
+	ldr	r4, .L369
 	uxth	r5, r0
-	movw	r6, #3206
+	movw	r6, #3210
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r2, r5
 	mov	r7, r0
 	ldrh	r1, [r4, r6]
-	ldr	r0, .L359+4
+	ldr	r0, .L369+4
 	bl	sftl_printk
 	mov	r0, r7
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4, r6]
 	mov	r2, #0
-	ldr	r0, .L359+8
-.L356:
+	ldr	r0, .L369+8
+.L366:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L358
+	bhi	.L368
 	cmp	r3, #15
-	movwls	r2, #3206
+	movwls	r2, #3210
 	addls	r1, r3, #1
 	strhls	r1, [r4, r2]	@ movhi
 	lslls	r3, r3, #1
-	ldrls	r2, .L359+8
+	ldrls	r2, .L369+8
 	strhls	r5, [r2, r3]	@ movhi
-	b	.L357
-.L358:
+	b	.L367
+.L368:
 	add	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L356
-.L357:
+	bne	.L366
+.L367:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L360:
+.L370:
 	.align	2
-.L359:
+.L369:
 	.word	.LANCHOR0
 	.word	.LC74
-	.word	.LANCHOR0+3208
+	.word	.LANCHOR0+3212
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.align	2
 	.global	FtlGcReFreshBadBlk
@@ -3085,24 +3118,24 @@ FtlGcReFreshBadBlk:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L367
-	movw	r3, #3206
+	ldr	r4, .L377
+	movw	r3, #3210
 	ldrh	r2, [r4, r3]
 	cmp	r2, #0
-	beq	.L362
+	beq	.L372
 	movw	r3, #3202
 	ldrh	r1, [r4, r3]
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L362
-	movw	r3, #3242
-	movw	r5, #3242
+	bne	.L372
+	movw	r3, #3246
+	movw	r5, #3246
 	ldrh	r1, [r4, r3]
 	cmp	r1, r2
 	movcs	r2, #0
 	strhcs	r2, [r4, r3]	@ movhi
 	ldrh	r3, [r4, r5]
-	ldr	r2, .L367+4
+	ldr	r2, .L377+4
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	bl	P2V_block_in_plane
@@ -3110,14 +3143,14 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4, r5]
 	add	r3, r3, #1
 	strh	r3, [r4, r5]	@ movhi
-.L362:
+.L372:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L368:
+.L378:
 	.align	2
-.L367:
+.L377:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3208
+	.word	.LANCHOR0+3212
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.align	2
 	.global	ftl_malloc
@@ -3131,12 +3164,12 @@ ftl_malloc:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r1, .L370
+	ldr	r1, .L380
 	bl	__kmalloc
 	ldmfd	sp, {fp, sp, pc}
-.L371:
+.L381:
 	.align	2
-.L370:
+.L380:
 	.word	37748929
 	.size	ftl_malloc, .-ftl_malloc
 	.align	2
@@ -3173,46 +3206,46 @@ rknand_print_hex:
 	mov	r9, r3
 	mov	r5, r6
 	mov	r4, r6
-.L374:
+.L384:
 	cmp	r4, r9
-	bcc	.L380
-	ldr	r0, .L382
+	bcc	.L390
+	ldr	r0, .L392
 	bl	sftl_printk
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L380:
+.L390:
 	cmp	r5, #0
-	bne	.L375
+	bne	.L385
 	mov	r3, r6
 	mov	r2, r7
 	mov	r1, r10
-	ldr	r0, .L382+4
+	ldr	r0, .L392+4
 	bl	sftl_printk
-.L375:
+.L385:
 	cmp	r8, #4
 	ldreq	r1, [r7, r4, lsl #2]
-	ldreq	r0, .L382+8
-	beq	.L381
+	ldreq	r0, .L392+8
+	beq	.L391
 	cmp	r8, #2
 	lsleq	r3, r4, #1
-	ldreq	r0, .L382+12
+	ldreq	r0, .L392+12
 	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
 	ldrheq	r1, [r7, r3]
-	ldrne	r0, .L382+16
-.L381:
+	ldrne	r0, .L392+16
+.L391:
 	add	r5, r5, #1
 	bl	sftl_printk
 	cmp	r5, #15
-	bls	.L379
+	bls	.L389
 	mov	r5, #0
-	ldr	r0, .L382
+	ldr	r0, .L392
 	bl	sftl_printk
-.L379:
+.L389:
 	add	r4, r4, #1
 	add	r6, r6, r8
-	b	.L374
-.L383:
+	b	.L384
+.L393:
 	.align	2
-.L382:
+.L392:
 	.word	.LC79
 	.word	.LC75
 	.word	.LC76
@@ -3233,37 +3266,37 @@ FlashReadPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L402
+	ldr	r5, .L412
 	mov	r7, r1
-	ldr	r9, .L402+4
+	ldr	r9, .L412+4
 	mov	r4, r0
-	ldr	r10, .L402+8
+	ldr	r10, .L412+8
 	ldrh	r8, [r5, #12]
-.L385:
+.L395:
 	cmp	r6, r7
-	bne	.L392
+	bne	.L402
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L392:
+.L402:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L386
+	beq	.L396
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	bne	.L387
-.L386:
+	bne	.L397
+.L396:
 	mov	r2, #101
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L387:
+.L397:
 	sub	r2, fp, #48
 	sub	r1, fp, #44
 	mov	r0, r4
 	bl	l2p_addr_tran
 	ldr	r3, [r4, #12]
-	ldr	ip, [r5, #3256]
+	ldr	ip, [r5, #3260]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
 	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
@@ -3271,38 +3304,38 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L389
+	bne	.L399
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
-	ldr	ip, [r5, #3256]
+	ldr	ip, [r5, #3260]
 	add	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [fp, #-48]	@ zero_extendqisi2
 	add	r1, r8, r1
 	blx	ip
 	cmn	r0, #1
-	beq	.L390
+	beq	.L400
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	cmn	r2, #1
-	bne	.L389
+	bne	.L399
 	ldr	r2, [r3, #8]
 	cmn	r2, #1
-	bne	.L389
+	bne	.L399
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L389
-.L390:
+	beq	.L399
+.L400:
 	mvn	r3, #0
 	str	r3, [r4]
-.L389:
+.L399:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L385
-.L403:
+	b	.L395
+.L413:
 	.align	2
-.L402:
+.L412:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3319,54 +3352,53 @@ FtlLoadFactoryBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L414
+	ldr	r4, .L424
 	mov	r6, #0
 	mvn	r9, #0
-	ldr	r10, .L414+4
-	ldr	r3, [r4, #3280]
+	ldr	r3, [r4, #3284]
 	add	r7, r4, #162
-	ldr	r8, [r4, #3284]
-	str	r3, [r4, #3268]
-	str	r8, [r4, #3272]
-.L405:
+	ldr	r8, [r4, #3288]
+	add	r10, r4, #3264
+	str	r3, [r4, #3272]
+	str	r8, [r4, #3276]
+.L415:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L410
+	bcc	.L420
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L410:
+.L420:
 	ldrh	r5, [r4, #98]
 	strh	r9, [r7, #2]!	@ movhi
-.L407:
+.L417:
 	ldrh	r3, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L408
+	ble	.L418
 	mla	r3, r6, r3, r5
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r10
 	lsl	r3, r3, #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L407
+	beq	.L417
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L407
+	bne	.L417
 	strh	r5, [r7]	@ movhi
-.L408:
+.L418:
 	add	r6, r6, #1
-	b	.L405
-.L415:
+	b	.L415
+.L425:
 	.align	2
-.L414:
+.L424:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
@@ -3382,17 +3414,17 @@ FtlGetLastWrittenPage:
 	sub	fp, ip, #4
 	sub	sp, sp, #84
 	cmp	r1, #1
-	ldr	r3, .L424
+	ldr	r3, .L437
 	lsl	r6, r0, #10
 	mov	r2, r1
 	mov	r7, r1
 	sub	r0, fp, #116
-	ldrheq	r4, [r3, #104]
+	ldrheq	r5, [r3, #104]
 	mov	r1, #1
-	ldrhne	r4, [r3, #102]
-	ldr	r3, .L424+4
-	sub	r4, r4, #1
-	sxth	r5, r4
+	ldrhne	r5, [r3, #102]
+	ldr	r3, .L437+4
+	sub	r5, r5, #1
+	sxth	r5, r5
 	str	r3, [fp, #-108]
 	sub	r3, fp, #96
 	str	r3, [fp, #-104]
@@ -3402,40 +3434,43 @@ FtlGetLastWrittenPage:
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
 	moveq	r8, #0
-	beq	.L420
-.L419:
+	beq	.L430
+.L429:
 	mov	r0, r5
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L423:
-	add	r4, r8, r5
+.L433:
+	add	r3, r8, r5
 	mov	r2, r7
-	add	r4, r4, r4, lsr #31
+	add	r3, r3, r3, lsr #31
 	mov	r1, #1
 	sub	r0, fp, #116
-	asr	r4, r4, #1
+	asr	r4, r3, #1
 	sxth	r3, r4
 	orr	r3, r3, r6
 	str	r3, [fp, #-112]
 	bl	FlashReadPages
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
-	bne	.L421
+	bne	.L431
 	ldr	r3, [fp, #-92]
 	cmn	r3, #1
-	subeq	r4, r4, #1
-	sxtheq	r5, r4
-	beq	.L420
-.L421:
+	bne	.L431
+	ldr	r3, [fp, #-116]
+	cmn	r3, #1
+	subne	r4, r4, #1
+	sxthne	r5, r4
+	bne	.L430
+.L431:
 	add	r4, r4, #1
 	sxth	r8, r4
-.L420:
+.L430:
 	cmp	r8, r5
-	ble	.L423
-	b	.L419
-.L425:
+	ble	.L433
+	b	.L429
+.L438:
 	.align	2
-.L424:
+.L437:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -3453,7 +3488,7 @@ FlashProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #32
 	mov	r9, r3
-	ldr	r6, .L456
+	ldr	r6, .L469
 	mov	r10, r1
 	mov	r8, r2
 	mov	r4, r0
@@ -3461,34 +3496,34 @@ FlashProgPages:
 	mov	r7, #0
 	ldrh	r3, [r6, #12]
 	str	r3, [fp, #-72]
-.L427:
+.L440:
 	cmp	r7, r10
-	bne	.L435
+	bne	.L448
 	cmp	r9, #0
-	bne	.L442
-.L455:
+	bne	.L455
+.L468:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L435:
+.L448:
 	ldr	r3, [r5, #8]
 	cmp	r3, #0
-	beq	.L428
+	beq	.L441
 	ldr	r3, [r5, #12]
 	cmp	r3, #0
-	bne	.L429
-.L428:
+	bne	.L442
+.L441:
 	mov	r2, #131
-	ldr	r1, .L456+4
-	ldr	r0, .L456+8
+	ldr	r1, .L469+4
+	ldr	r0, .L469+8
 	bl	sftl_printk
-.L429:
+.L442:
 	sub	r2, fp, #68
 	sub	r1, fp, #64
 	mov	r0, r5
 	bl	l2p_addr_tran
 	ldr	r3, [r5, #12]
-	ldr	ip, [r6, #3252]
+	ldr	ip, [r6, #3256]
 	ldr	r2, [r5, #8]
 	ldr	r1, [fp, #-64]
 	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
@@ -3499,13 +3534,13 @@ FlashProgPages:
 	strne	r3, [r5]
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L433
+	bne	.L446
 	ldr	r0, [fp, #-72]
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [fp, #-64]
 	add	r3, r3, #8
-	ldr	ip, [r6, #3252]
+	ldr	ip, [r6, #3256]
 	add	r2, r2, #2048
 	add	r1, r0, r1
 	ldrb	r0, [fp, #-68]	@ zero_extendqisi2
@@ -3513,16 +3548,16 @@ FlashProgPages:
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r5]
-.L433:
+.L446:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L427
-.L440:
+	b	.L440
+.L453:
 	mov	r3, #0
 	mov	r2, r8
 	str	r3, [r9]
 	mov	r1, #1
-	str	r3, [r6, #3288]
+	str	r3, [r6, #3292]
 	sub	r0, fp, #60
 	ldr	r3, [r4, #4]
 	str	r9, [fp, #-52]
@@ -3531,54 +3566,54 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	bne	.L437
+	bne	.L450
 	ldr	r1, [r4, #4]
-	ldr	r0, .L456+12
+	ldr	r0, .L469+12
 	str	r3, [fp, #-72]
 	bl	sftl_printk
 	ldr	r3, [fp, #-72]
 	str	r3, [r4]
-.L437:
+.L450:
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L438
+	beq	.L451
 	ldr	r2, [r3]
-	ldr	r3, [r6, #3288]
+	ldr	r3, [r6, #3292]
 	cmp	r2, r3
-	beq	.L438
+	beq	.L451
 	ldr	r1, [r4, #4]
-	ldr	r0, .L456+16
+	ldr	r0, .L469+16
 	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L438:
+.L451:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L439
+	beq	.L452
 	ldr	r2, [r3]
 	ldr	r3, [r9]
 	cmp	r2, r3
-	beq	.L439
+	beq	.L452
 	ldr	r1, [r4, #4]
-	ldr	r0, .L456+20
+	ldr	r0, .L469+20
 	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L439:
+.L452:
 	add	r5, r5, #1
 	add	r4, r4, #20
-.L436:
+.L449:
 	cmp	r7, r5
-	bne	.L440
-	b	.L455
-.L442:
+	bne	.L453
+	b	.L468
+.L455:
 	mov	r5, #0
-	ldr	r9, .L456+24
-	ldr	r10, .L456+28
-	b	.L436
-.L457:
+	ldr	r9, .L469+24
+	ldr	r10, .L469+28
+	b	.L449
+.L470:
 	.align	2
-.L456:
+.L469:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
@@ -3586,7 +3621,7 @@ FlashProgPages:
 	.word	.LC81
 	.word	.LC82
 	.word	check_buf
-	.word	.LANCHOR0+3288
+	.word	.LANCHOR0+3292
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
@@ -3602,22 +3637,22 @@ FlashEraseBlocks:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L469
+	ldr	r5, .L482
 	mov	r7, r2
 	mov	r4, r0
 	ldrh	r8, [r5, #12]
-.L459:
+.L472:
 	cmp	r6, r7
-	bne	.L465
+	bne	.L478
 	mov	r0, #0
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L465:
+.L478:
 	sub	r2, fp, #40
 	sub	r1, fp, #36
 	mov	r0, r4
 	bl	l2p_addr_tran
-	ldr	r3, [r5, #3248]
+	ldr	r3, [r5, #3252]
 	ldr	r1, [fp, #-36]
 	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
 	blx	r3
@@ -3627,22 +3662,22 @@ FlashEraseBlocks:
 	strne	r3, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L463
+	bne	.L476
 	ldr	r1, [fp, #-36]
-	ldr	r3, [r5, #3248]
+	ldr	r3, [r5, #3252]
 	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
 	add	r1, r8, r1
 	blx	r3
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r4]
-.L463:
+.L476:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L459
-.L470:
+	b	.L472
+.L483:
 	.align	2
-.L469:
+.L482:
 	.word	.LANCHOR0
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
@@ -3664,16 +3699,16 @@ FtlFreeSysBlkQueueIn:
 	uxth	r3, r3
 	cmp	r3, r2
 	ldmfdhi	sp, {r4, r5, r6, fp, sp, pc}
-	ldr	r4, .L480
+	ldr	r4, .L493
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
 	cmp	r1, #0
-	beq	.L473
+	beq	.L486
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r6, r0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	lsl	r3, r5, #10
 	mov	r2, #1
 	mov	r1, r2
@@ -3687,7 +3722,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	add	r3, r3, #1
 	str	r3, [r4, #2560]
-.L473:
+.L486:
 	ldrh	r3, [r4, #218]
 	add	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3698,9 +3733,9 @@ FtlFreeSysBlkQueueIn:
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L481:
+.L494:
 	.align	2
-.L480:
+.L493:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
@@ -3721,34 +3756,34 @@ FtlLowFormatEraseBlock:
 	uxtb	r6, r1
 	str	r3, [fp, #-48]
 	mov	r5, r10
-	ldr	r3, .L524
+	ldr	r3, .L537
 	mov	r4, r10
 	ldr	r2, [fp, #-48]
 	mov	r9, #20
 	mov	r8, r3
-	str	r2, [r3, #3804]
-.L483:
+	str	r2, [r3, #3808]
+.L496:
 	ldrh	r1, [r8, #32]
 	uxth	r2, r10
 	cmp	r1, r2
-	bhi	.L487
+	bhi	.L500
 	cmp	r5, #0
-	beq	.L482
+	beq	.L495
 	mov	r7, #0
 	mov	r9, #20
 	mov	r2, r5
 	mov	r1, #0
-	ldr	r0, [r8, #3800]
+	ldr	r0, [r8, #3804]
 	bl	FlashEraseBlocks
-.L490:
+.L503:
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L492
-.L493:
+	bhi	.L505
+.L506:
 	cmp	r6, #0
 	ldrhne	r3, [r8, #104]
 	moveq	r3, #6
-	ldr	r8, .L524
+	ldr	r8, .L537
 	streq	r3, [fp, #-60]
 	moveq	r3, #1
 	strne	r3, [fp, #-52]
@@ -3761,27 +3796,27 @@ FtlLowFormatEraseBlock:
 	mov	r3, #0
 	streq	r6, [fp, #-56]
 	str	r3, [fp, #-44]
-.L502:
+.L515:
 	mov	r7, #0
 	mov	r5, r7
-.L494:
+.L507:
 	ldrh	r1, [r8, #32]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L497
+	bhi	.L510
 	cmp	r5, #0
-	beq	.L482
+	beq	.L495
 	ldr	r2, [fp, #-56]
 	mov	r3, #1
 	mov	r1, r5
-	ldr	r0, [r8, #3800]
+	ldr	r0, [r8, #3804]
 	bl	FlashProgPages
 	mov	r9, #0
 	mov	r2, #20
-.L499:
+.L512:
 	uxth	r3, r9
 	cmp	r5, r3
-	bhi	.L501
+	bhi	.L514
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-60]
 	add	r7, r3, r2
@@ -3790,13 +3825,13 @@ FtlLowFormatEraseBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r3, [fp, #-52]
 	cmp	r3, r2
-	bhi	.L502
+	bhi	.L515
 	mov	r7, #0
 	mov	r9, #20
-.L503:
+.L516:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L505
+	bhi	.L518
 	ldr	r3, [fp, #-48]
 	adds	r6, r6, #0
 	movne	r6, #1
@@ -3804,18 +3839,18 @@ FtlLowFormatEraseBlock:
 	movhi	r8, r6
 	orrls	r8, r6, #1
 	cmp	r8, #0
-	beq	.L482
+	beq	.L495
 	mov	r2, r5
 	ldr	r1, [fp, #-56]
-	ldr	r0, [r10, #3800]
+	ldr	r0, [r10, #3804]
 	bl	FlashEraseBlocks
-.L482:
+.L495:
 	mov	r0, r4
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L487:
+.L500:
 	uxth	r2, r10
-	ldr	r0, [r8, #3800]
+	ldr	r0, [r8, #3804]
 	mov	r3, #0
 	mul	r1, r9, r2
 	add	r2, r8, r2
@@ -3825,20 +3860,20 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r7, r0
-	beq	.L484
+	beq	.L497
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L485
-.L484:
+	bne	.L498
+.L497:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
 	addne	r4, r4, #1
 	uxthne	r4, r4
-	bne	.L485
-	ldr	r1, [r8, #3800]
+	bne	.L498
+	ldr	r1, [r8, #3804]
 	lsl	r7, r7, #10
-	ldr	r2, [r8, #3808]
+	ldr	r2, [r8, #3812]
 	mla	r1, r9, r5, r1
 	str	r2, [r1, #8]
 	ldrh	r2, [r8, #112]
@@ -3849,32 +3884,32 @@ FtlLowFormatEraseBlock:
 	add	r0, r2, #3
 	cmp	r2, #0
 	movlt	r2, r0
-	ldr	r0, [r8, #3812]
+	ldr	r0, [r8, #3816]
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #12]
-.L485:
+.L498:
 	add	r10, r10, #1
-	b	.L483
-.L492:
+	b	.L496
+.L505:
 	mul	r2, r9, r7
-	ldr	r1, [r8, #3800]
+	ldr	r1, [r8, #3804]
 	add	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cmn	r2, #1
-	bne	.L491
+	bne	.L504
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L491:
+.L504:
 	add	r7, r7, #1
-	b	.L490
-.L497:
+	b	.L503
+.L510:
 	uxth	r3, r7
 	mov	r2, #20
-	ldr	r0, [r8, #3800]
+	ldr	r0, [r8, #3804]
 	mul	r1, r2, r3
 	mov	r2, #0
 	add	r3, r8, r3
@@ -3884,21 +3919,21 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r9, r0
-	beq	.L495
+	beq	.L508
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L496
-.L495:
+	bne	.L509
+.L508:
 	mov	r0, r9
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
-	bne	.L496
-	ldr	r1, [r8, #3800]
+	bne	.L509
+	ldr	r1, [r8, #3804]
 	mov	r3, #20
 	mla	r1, r3, r5, r1
 	ldr	r3, [fp, #-44]
 	add	r9, r3, r9, lsl #10
-	ldr	r3, [r8, #3816]
+	ldr	r3, [r8, #3820]
 	str	r9, [r1, #4]
 	str	r3, [r1, #8]
 	ldrh	r3, [r8, #112]
@@ -3908,20 +3943,20 @@ FtlLowFormatEraseBlock:
 	add	r0, r3, #3
 	cmp	r3, #0
 	movlt	r3, r0
-	ldr	r0, [r8, #3808]
+	ldr	r0, [r8, #3812]
 	bic	r3, r3, #3
 	add	r3, r0, r3
 	str	r3, [r1, #12]
-.L496:
+.L509:
 	add	r7, r7, #1
-	b	.L494
-.L501:
+	b	.L507
+.L514:
 	mul	r3, r2, r9
-	ldr	r1, [r10, #3800]
+	ldr	r1, [r10, #3804]
 	add	r0, r1, r3
 	ldr	r3, [r1, r3]
 	cmp	r3, #0
-	beq	.L500
+	beq	.L513
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	str	r2, [fp, #-64]
@@ -3929,28 +3964,28 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r2, [fp, #-64]
-.L500:
+.L513:
 	add	r9, r9, #1
-	b	.L499
-.L505:
+	b	.L512
+.L518:
 	cmp	r6, #0
-	beq	.L504
+	beq	.L517
 	mul	r3, r9, r7
-	ldr	r2, [r10, #3800]
+	ldr	r2, [r10, #3804]
 	add	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L504
+	bne	.L517
 	ldr	r0, [r1, #4]
 	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L504:
+.L517:
 	add	r7, r7, #1
-	b	.L503
-.L525:
+	b	.L516
+.L538:
 	.align	2
-.L524:
+.L537:
 	.word	.LANCHOR0
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
@@ -3965,12 +4000,12 @@ FtlFreeSysBlkQueueOut:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L533
-	ldr	r6, .L533+4
-.L527:
+	ldr	r4, .L546
+	ldr	r6, .L546+4
+.L540:
 	ldrh	r1, [r4, #218]
 	cmp	r1, #0
-	beq	.L528
+	beq	.L541
 	ldrh	r3, [r4, #214]
 	sub	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -3982,7 +4017,7 @@ FtlFreeSysBlkQueueOut:
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	lsl	r3, r5, #10
 	mov	r2, #1
 	mov	r1, r2
@@ -4000,23 +4035,23 @@ FtlFreeSysBlkQueueOut:
 	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L529
+	bhi	.L542
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L528:
-	ldr	r0, .L533+8
+.L541:
+	ldr	r0, .L546+8
 	bl	sftl_printk
-.L531:
-	b	.L531
-.L529:
+.L544:
+	b	.L544
+.L542:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	sftl_printk
-	b	.L527
-.L534:
+	b	.L540
+.L547:
 	.align	2
-.L533:
+.L546:
 	.word	.LANCHOR0
 	.word	.LC84
 	.word	.LC83
@@ -4037,16 +4072,16 @@ ftl_map_blk_alloc_new_blk:
 	mov	r4, r0
 	mov	r3, #0
 	ldr	r2, [r0, #12]
-.L536:
+.L549:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L539
+	bcs	.L552
 	mov	r7, r2
 	add	r3, r3, #1
 	ldrh	r6, [r7]
 	add	r2, r2, #2
 	cmp	r6, #0
-	bne	.L536
+	bne	.L549
 	bl	FtlFreeSysBlkQueueOut
 	sub	r3, r0, #1
 	movw	r2, #65533
@@ -4054,14 +4089,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L537
-	ldr	r3, .L543
-	ldr	r0, .L543+4
+	bls	.L550
+	ldr	r3, .L556
+	ldr	r0, .L556+4
 	ldrh	r2, [r3, #218]
 	bl	sftl_printk
-.L538:
-	b	.L538
-.L537:
+.L551:
+	b	.L551
+.L550:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4070,20 +4105,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L539:
+.L552:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L541
-	movw	r2, #581
-	ldr	r1, .L543+8
-	ldr	r0, .L543+12
+	bhi	.L554
+	movw	r2, #603
+	ldr	r1, .L556+8
+	ldr	r0, .L556+12
 	bl	sftl_printk
-.L541:
+.L554:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L544:
+.L557:
 	.align	2
-.L543:
+.L556:
 	.word	.LANCHOR0
 	.word	.LC85
 	.word	.LANCHOR1+160
@@ -4105,8 +4140,8 @@ FlashTestBlk:
 	uxth	r4, r0
 	cmp	r4, #11
 	movls	r4, #0
-	bls	.L545
-	ldr	r5, .L548
+	bls	.L558
+	ldr	r5, .L561
 	sub	r0, fp, #84
 	mov	r2, #32
 	mov	r1, #165
@@ -4114,7 +4149,7 @@ FlashTestBlk:
 	lsl	r4, r4, #10
 	str	r5, [fp, #-96]
 	bl	memset
-	ldr	r3, .L548+4
+	ldr	r3, .L561+4
 	mov	r2, #1
 	mov	r1, r2
 	sub	r0, fp, #104
@@ -4135,13 +4170,13 @@ FlashTestBlk:
 	movne	r4, #1
 	rsb	r4, r4, #0
 	bl	FlashEraseBlocks
-.L545:
+.L558:
 	mov	r0, r4
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L549:
+.L562:
 	.align	2
-.L548:
+.L561:
 	.word	ftl_temp_buf
 	.word	1515870810
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4157,42 +4192,42 @@ FlashGetBadBlockList:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L557
+	ldr	r5, .L570
 	mov	r4, r0
 	mov	r6, r1
 	mov	r2, #256
 	mov	r1, #255
 	bl	memset
-	ldr	r3, [r5, #3244]
+	ldr	r3, [r5, #3248]
 	mov	r1, r6
 	mov	r0, r4
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L551
+	bls	.L564
 	mov	r2, #256
 	mov	r1, #255
 	mov	r0, r4
 	bl	memset
 	mov	r0, #0
-.L551:
+.L564:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	moveq	r3, r4
 	addeq	r1, r3, r0, lsl #1
-	beq	.L553
+	beq	.L566
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L554:
+.L567:
 	ldrh	r2, [r3]
 	lsr	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-.L553:
+.L566:
 	cmp	r3, r1
-	bne	.L554
+	bne	.L567
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L558:
+.L571:
 	.align	2
-.L557:
+.L570:
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
@@ -4209,9 +4244,9 @@ ftl_memset:
 	sub	fp, ip, #4
 	cmp	r2, #0
 	mov	r4, r0
-	beq	.L560
+	beq	.L573
 	bl	memset
-.L560:
+.L573:
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
 	.size	ftl_memset, .-ftl_memset
@@ -4227,12 +4262,12 @@ FtlMemInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L665
+	ldr	r4, .L678
 	movw	r3, #65535
 	movw	r2, #3202
 	mov	r5, #0
 	mov	r6, #12
-	str	r3, [r4, #3824]
+	str	r3, [r4, #3828]
 	mvn	r3, #0
 	strh	r3, [r4, r2]	@ movhi
 	movw	r2, #3204
@@ -4247,10 +4282,10 @@ FtlMemInit:
 	strh	r2, [r4, r3]	@ movhi
 	movw	r3, #3156
 	strh	r5, [r4, r3]	@ movhi
-	movw	r3, #3206
+	movw	r3, #3210
 	strh	r5, [r4, r3]	@ movhi
 	lsl	r0, r0, #1
-	movw	r3, #3242
+	movw	r3, #3246
 	str	r5, [r4, #2544]
 	strh	r5, [r4, r3]	@ movhi
 	mov	r7, #20
@@ -4265,11 +4300,11 @@ FtlMemInit:
 	str	r5, [r4, #2560]
 	str	r5, [r4, #2564]
 	str	r5, [r4, #2568]
-	str	r5, [r4, #3820]
+	str	r5, [r4, #3824]
 	str	r5, [r4, #3160]
-	str	r5, [r4, #3828]
+	str	r5, [r4, #3832]
 	str	r5, [r4, #3152]
-	str	r5, [r4, #3804]
+	str	r5, [r4, #3808]
 	bl	ftl_malloc
 	str	r0, [r4, #3188]
 	ldrh	r0, [r4, #106]
@@ -4281,16 +4316,16 @@ FtlMemInit:
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-	str	r0, [r4, #3832]
+	str	r0, [r4, #3836]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3836]
+	str	r0, [r4, #3840]
 	mov	r0, r8
 	bl	ftl_malloc
-	str	r0, [r4, #3840]
+	str	r0, [r4, #3844]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3800]
+	str	r0, [r4, #3804]
 	mov	r0, r7
 	bl	ftl_malloc
 	ldrh	r3, [r4, #32]
@@ -4301,23 +4336,23 @@ FtlMemInit:
 	add	r3, r3, #1
 	str	r3, [r4, #3184]
 	bl	ftl_malloc
-	str	r0, [r4, #3280]
+	str	r0, [r4, #3284]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3844]
+	str	r0, [r4, #3848]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3848]
+	str	r0, [r4, #3852]
 	ldr	r0, [r4, #3184]
 	mul	r0, r0, r7
 	bl	ftl_malloc
 	str	r0, [r4, #3172]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3816]
+	str	r0, [r4, #3820]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3808]
+	str	r0, [r4, #3812]
 	ldr	r0, [r4, #3184]
 	mul	r0, r6, r0
 	bl	ftl_malloc
@@ -4327,12 +4362,12 @@ FtlMemInit:
 	mul	r7, r7, r3
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3284]
+	str	r0, [r4, #3288]
 	lsl	r0, r7, #2
-	movw	r7, #3852
+	add	r7, r4, #3856
 	bl	ftl_malloc
 	ldrh	r3, [r4, #112]
-	str	r0, [r4, #3812]
+	str	r0, [r4, #3816]
 	ldr	r0, [r4, #3184]
 	mul	r0, r0, r3
 	bl	ftl_malloc
@@ -4340,25 +4375,25 @@ FtlMemInit:
 	ldrh	r0, [r4, #42]
 	lsl	r0, r0, #1
 	uxth	r0, r0
-	strh	r0, [r4, r7]	@ movhi
+	strh	r0, [r7]	@ movhi
 	bl	ftl_malloc
-	str	r0, [r4, #3856]
-	ldrh	r0, [r4, r7]
-	ldr	r3, .L665+4
+	str	r0, [r4, #3860]
+	ldrh	r0, [r7]
+	ldr	r3, .L678+4
 	add	r0, r0, #544
 	add	r0, r0, #3
 	lsr	r0, r0, #9
-	strh	r0, [r4, r7]	@ movhi
+	strh	r0, [r7]	@ movhi
 	and	r0, r3, r0, lsl #9
 	bl	ftl_malloc
 	ldrh	r7, [r4, #42]
-	str	r0, [r4, #3860]
+	str	r0, [r4, #3864]
 	add	r0, r0, #32
 	str	r0, [r4, #2328]
 	lsl	r7, r7, #1
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3864]
+	str	r0, [r4, #3868]
 	mov	r0, r7
 	bl	ftl_malloc
 	ldr	r7, [r4, #128]
@@ -4366,10 +4401,10 @@ FtlMemInit:
 	lsl	r7, r7, #1
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3868]
+	str	r0, [r4, #3872]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3872]
+	str	r0, [r4, #3876]
 	ldrh	r0, [r4, #42]
 	lsr	r0, r0, #3
 	add	r0, r0, #4
@@ -4382,28 +4417,28 @@ FtlMemInit:
 	ldrh	r0, [r4, #120]
 	lsl	r0, r0, #1
 	bl	ftl_malloc
-	str	r0, [r4, #3876]
+	str	r0, [r4, #3880]
 	ldrh	r0, [r4, #120]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3880]
+	str	r0, [r4, #3884]
 	ldrh	r0, [r4, #122]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r4, #122]
 	mov	r1, r5
-	str	r0, [r4, #3884]
-	movw	r5, #3900
+	str	r0, [r4, #3888]
+	add	r5, r4, #3904
 	lsl	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r0, [r4, #136]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3888]
+	str	r0, [r4, #3892]
 	ldr	r0, [r4, #128]
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3892]
+	str	r0, [r4, #3896]
 	ldrh	r0, [r4, #138]
 	mul	r0, r6, r0
 	bl	ftl_malloc
@@ -4412,7 +4447,7 @@ FtlMemInit:
 	ldrh	r0, [r4, #110]
 	mul	r0, r0, r3
 	bl	ftl_malloc
-	str	r0, [r4, #3896]
+	str	r0, [r4, #3900]
 	ldrh	r0, [r4, #42]
 	lsl	r0, r0, #3
 	bl	ftl_malloc
@@ -4421,147 +4456,147 @@ FtlMemInit:
 	ldrh	r3, [r4, #54]
 	add	r0, r0, #31
 	asr	r0, r0, #5
-	strh	r0, [r4, r5]	@ movhi
+	strh	r0, [r5]	@ movhi
 	mul	r0, r0, r3
 	lsl	r0, r0, #2
 	bl	ftl_malloc
-	ldrh	r2, [r4, r5]
+	ldrh	r2, [r5]
 	add	ip, r4, #180
 	ldrh	lr, [r4, #54]
 	mov	r3, #1
 	str	r0, [r4, #180]
 	lsl	r2, r2, #2
 	mov	r1, r2
-.L565:
+.L578:
 	cmp	r3, lr
-	bcc	.L566
-	ldr	r2, .L665+8
+	bcc	.L579
+	ldr	r2, .L678+8
 	mov	r1, #0
 	add	r3, r2, r3, lsl #2
 	add	r2, r2, #56
 	add	r3, r3, #24
-.L567:
+.L580:
 	cmp	r2, r3
-	bne	.L568
-	ldr	r3, [r4, #3868]
+	bne	.L581
+	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	bne	.L569
-.L571:
-	ldr	r1, .L665+12
-	ldr	r0, .L665+16
+	bne	.L582
+.L584:
+	ldr	r1, .L678+12
+	ldr	r0, .L678+16
 	bl	sftl_printk
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L566:
+.L579:
 	ldr	r0, [r4, #180]
 	add	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [ip, #4]!
-	b	.L565
-.L568:
+	b	.L578
+.L581:
 	str	r1, [r3, #4]!
-	b	.L567
-.L569:
-	ldr	r3, [r4, #3872]
-	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3888]
+	b	.L580
+.L582:
+	ldr	r3, [r4, #3876]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
+	ldr	r3, [r4, #3896]
+	cmp	r3, #0
+	beq	.L584
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3896]
+	beq	.L584
+	ldr	r3, [r4, #3900]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3832]
+	beq	.L584
+	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3840]
+	beq	.L584
+	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3800]
+	beq	.L584
+	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3836]
-	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3280]
+	beq	.L584
+	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3844]
+	beq	.L584
+	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
+	ldr	r3, [r4, #3852]
+	cmp	r3, #0
+	beq	.L584
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3816]
+	beq	.L584
+	ldr	r3, [r4, #3820]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3808]
+	beq	.L584
+	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3284]
+	beq	.L584
+	ldr	r3, [r4, #3288]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3812]
+	beq	.L584
+	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, [r4, #3856]
+	beq	.L584
+	ldr	r3, [r4, #3860]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L571
-	ldr	r3, .L665
-	ldr	r2, [r3, #3876]
-	cmp	r2, #0
-	beq	.L571
+	beq	.L584
+	ldr	r3, .L678
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L571
-	ldr	r3, [r3, #3884]
+	beq	.L584
+	ldr	r2, [r3, #3884]
+	cmp	r2, #0
+	beq	.L584
+	ldr	r3, [r3, #3888]
 	cmp	r3, #0
-	beq	.L571
+	beq	.L584
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L666:
+.L679:
 	.align	2
-.L665:
+.L678:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
@@ -4578,35 +4613,34 @@ FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r6, .L673
-	movw	r3, #3900
+	ldr	r6, .L686
 	mov	r4, r0
-	ldr	r8, .L673+4
+	mov	r7, r1
+	ldr	r8, .L686+4
 	sub	r5, r4, #2
-	ldrh	r2, [r6, r3]
+	ldrh	r2, [r6]
 	add	r4, r4, #1020
-	ldr	r9, .L673+8
-	mov	r7, r1
 	add	r4, r4, #2
+	sub	r6, r6, #3904
 	mov	r1, #0
 	mov	r0, r7
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.L670:
+.L683:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	ldmfdeq	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
+	ldmfdeq	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L669
+	bhi	.L682
 	mov	r2, #74
 	mov	r1, r8
-	mov	r0, r9
+	ldr	r0, .L686+8
 	bl	sftl_printk
-.L669:
+.L682:
 	ldrh	r3, [r5, #2]!
 	mov	r0, #1
 	cmp	r4, r5
@@ -4615,123 +4649,23 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r3, r2, r0, lsl r3
 	str	r3, [r7, r1, lsl #2]
-	bne	.L670
-	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L674:
+	bne	.L683
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L687:
 	.align	2
-.L673:
-	.word	.LANCHOR0
+.L686:
+	.word	.LANCHOR0+3904
 	.word	.LANCHOR1+197
 	.word	.LC1
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.align	2
-	.global	load_l2p_region
+	.global	ftl_free_no_use_map_blk
 	.syntax unified
 	.arm
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	mov	ip, sp
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-	sub	fp, ip, #4
-	ldr	r4, .L681
-	uxth	r6, r0
-	uxth	r8, r1
-	ldrh	r3, [r4, #136]
-	cmp	r3, r6
-	bcs	.L676
-	mov	r2, #492
-	ldr	r1, .L681+4
-	ldr	r0, .L681+8
-	bl	sftl_printk
-.L676:
-	ldr	r3, [r4, #3888]
-	mov	r5, #12
-	ldr	r7, [r3, r6, lsl #2]
-	cmp	r7, #0
-	bne	.L677
-	mul	r5, r5, r8
-	ldr	r3, [r4, #2492]
-	ldrh	r2, [r4, #110]
-	mov	r1, #255
-	add	r3, r3, r5
-	ldr	r0, [r3, #8]
-	bl	ftl_memset
-	ldr	r3, [r4, #2492]
-	strh	r6, [r3, r5]	@ movhi
-	ldr	r3, [r4, #2492]
-	add	r5, r3, r5
-	str	r7, [r5, #4]
-.L678:
-	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L677:
-	mul	r5, r5, r8
-	ldr	r3, [r4, #2492]
-	mov	r2, #1
-	ldr	r0, .L681+12
-	mov	r1, r2
-	str	r7, [r4, #3264]
-	add	r3, r3, r5
-	ldr	r3, [r3, #8]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	str	r3, [r4, #3272]
-	bl	FlashReadPages
-	ldr	r8, [r4, #3272]
-	ldrh	r3, [r8, #8]
-	cmp	r3, r6
-	beq	.L679
-	mov	r2, r7
-	mov	r1, r6
-	ldr	r0, .L681+16
-	bl	sftl_printk
-	mov	r3, #4
-	ldr	r1, [r4, #3272]
-	mov	r2, r3
-	ldr	r0, .L681+20
-	bl	rknand_print_hex
-	ldrh	r3, [r4, #136]
-	mov	r2, #4
-	ldr	r1, [r4, #3888]
-	ldr	r0, .L681+24
-	bl	rknand_print_hex
-.L679:
-	ldrh	r3, [r8, #8]
-	cmp	r3, r6
-	beq	.L680
-	movw	r2, #513
-	ldr	r1, .L681+4
-	ldr	r0, .L681+8
-	bl	sftl_printk
-.L680:
-	ldr	r3, [r4, #2492]
-	mov	r1, #0
-	add	r2, r3, r5
-	str	r1, [r2, #4]
-	strh	r6, [r3, r5]	@ movhi
-	b	.L678
-.L682:
-	.align	2
-.L681:
-	.word	.LANCHOR0
-	.word	.LANCHOR1+211
-	.word	.LC1
-	.word	.LANCHOR0+3260
-	.word	.LC87
-	.word	.LC88
-	.word	.LC89
-	.size	load_l2p_region, .-load_l2p_region
-	.align	2
-	.global	ftl_free_no_use_map_blk
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
@@ -4747,35 +4681,35 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	mov	r2, #0
-.L684:
+.L689:
 	ldrh	r1, [r4, #6]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L688
+	bhi	.L693
 	ldrh	r2, [r5]
 	mov	r7, #0
-	ldr	ip, .L697
+	ldr	ip, .L702
 	mov	r10, r7
-.L689:
+.L694:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L693
+	bhi	.L698
 	mov	r0, r10
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L688:
+.L693:
 	uxth	r3, r2
 	mov	r1, #0
 	ldr	r0, [r6, r3, lsl #2]
 	ubfx	r0, r0, #10, #16
-.L685:
+.L690:
 	ldrh	ip, [r4, #10]
 	uxth	r3, r1
 	cmp	ip, r3
 	addls	r2, r2, #1
-	bls	.L684
-.L687:
+	bls	.L689
+.L692:
 	uxth	r3, r1
 	add	r1, r1, #1
 	lsl	r3, r3, #1
@@ -4784,28 +4718,28 @@ ftl_free_no_use_map_blk:
 	ldrheq	ip, [r5, r3]
 	addeq	ip, ip, #1
 	strheq	ip, [r5, r3]	@ movhi
-	b	.L685
-.L693:
+	b	.L690
+.L698:
 	ldrh	r1, [r4]
 	uxth	r6, r7
 	cmp	r1, r3
-	bne	.L690
+	bne	.L695
 	ldrh	r0, [r4, #2]
 	ldrh	r1, [ip, #104]
 	cmp	r0, r1
 	lslcc	r0, r6, #1
 	strhcc	r1, [r5, r0]	@ movhi
-.L690:
+.L695:
 	lsl	r6, r6, #1
 	ldrh	r8, [r5, r6]
 	cmp	r2, r8
 	movhi	r10, r3
 	movhi	r2, r8
 	cmp	r8, #0
-	bne	.L692
+	bne	.L697
 	ldrh	r0, [r9, r6]
 	cmp	r0, #0
-	beq	.L692
+	beq	.L697
 	mov	r1, #1
 	str	ip, [fp, #-48]
 	str	r2, [fp, #-44]
@@ -4816,12 +4750,12 @@ ftl_free_no_use_map_blk:
 	ldr	r2, [fp, #-44]
 	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L692:
+.L697:
 	add	r7, r7, #1
-	b	.L689
-.L698:
+	b	.L694
+.L703:
 	.align	2
-.L697:
+.L702:
 	.word	.LANCHOR0
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
@@ -4841,15 +4775,15 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L700
+	bne	.L705
 	ldrh	r3, [r0, #8]
 	cmp	r3, #0
-	beq	.L701
-	movw	r2, #641
-	ldr	r1, .L709
-	ldr	r0, .L709+4
+	beq	.L706
+	movw	r2, #677
+	ldr	r1, .L714
+	ldr	r0, .L714+4
 	bl	sftl_printk
-.L701:
+.L706:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4861,75 +4795,75 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	add	r3, r3, #1
 	str	r3, [r4, #28]
-.L702:
+.L707:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L700:
+.L705:
 	lsl	r3, r3, #1
 	ldr	r2, [r0, #28]
 	ldr	r6, [r0, #24]
 	mov	r1, #255
 	ldrh	r7, [r5, r3]
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L709+8
+	ldr	r5, .L714+8
 	orr	r3, r3, r7, lsl #10
-	str	r3, [r5, #3264]
-	ldr	r3, [r5, #3280]
 	str	r3, [r5, #3268]
 	ldr	r3, [r5, #3284]
 	str	r3, [r5, #3272]
+	ldr	r3, [r5, #3288]
+	str	r3, [r5, #3276]
 	str	r2, [r3, #4]
-	ldr	r2, .L709+12
+	ldr	r2, .L714+12
 	strh	r2, [r3, #8]	@ movhi
 	ldrh	r2, [r0, #4]
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
 	ldrh	r2, [r5, #104]
-	ldr	r0, [r5, #3280]
+	ldr	r0, [r5, #3284]
 	lsl	r2, r2, #3
 	bl	ftl_memset
 	mov	r2, #0
 	mov	r3, r2
-.L703:
+.L708:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L705
+	bhi	.L710
 	mov	r2, #1
 	mov	r3, #0
 	mov	r1, r2
-	ldr	r0, .L709+16
+	ldr	r0, .L714+16
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L702
-.L705:
+	b	.L707
+.L710:
 	uxth	r1, r2
 	ldr	r0, [r6, r1, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L704
-	ldr	r0, [r5, #3280]
+	bne	.L709
+	ldr	r0, [r5, #3284]
 	add	r3, r3, #1
 	uxth	r3, r3
 	str	r1, [r0, r3, lsl #3]
 	ldr	r0, [r6, r1, lsl #2]
-	ldr	r1, [r5, #3280]
+	ldr	r1, [r5, #3284]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L704:
+.L709:
 	add	r2, r2, #1
-	b	.L703
-.L710:
+	b	.L708
+.L715:
 	.align	2
-.L709:
-	.word	.LANCHOR1+227
+.L714:
+	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0
 	.word	-1291
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
@@ -4943,13 +4877,13 @@ FtlMapWritePage:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r7, .L730
+	ldr	r7, .L736
 	mov	r4, r0
 	mov	r8, r1
 	mov	r9, r2
 	mov	r6, #0
 	mov	r5, r7
-.L712:
+.L717:
 	ldr	r3, [r7, #2524]
 	add	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -4957,50 +4891,50 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L713
+	bge	.L718
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L714
-.L713:
+	bne	.L719
+.L718:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L714:
+.L719:
 	ldrh	r3, [r4]
 	ldr	r2, [r4, #12]
 	lsl	r3, r3, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L715
-	movw	r2, #699
-	ldr	r1, .L730+4
-	ldr	r0, .L730+8
+	bne	.L720
+	movw	r2, #735
+	ldr	r1, .L736+4
+	ldr	r0, .L736+8
 	bl	sftl_printk
-.L715:
+.L720:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L716
-	mov	r2, #700
-	ldr	r1, .L730+4
-	ldr	r0, .L730+8
+	bcc	.L721
+	mov	r2, #736
+	ldr	r1, .L736+4
+	ldr	r0, .L736+8
 	bl	sftl_printk
-.L716:
+.L721:
 	ldrh	r3, [r4]
 	mov	r1, #16
 	ldr	r2, [r4, #12]
-	ldr	r0, [r5, #3284]
+	ldr	r0, [r5, #3288]
 	lsl	r3, r3, #1
 	ldrh	r10, [r2, r3]
 	ldrh	r3, [r4, #2]
-	str	r0, [r5, #3272]
-	str	r9, [r5, #3268]
+	str	r0, [r5, #3276]
+	str	r9, [r5, #3272]
 	orr	r3, r3, r10, lsl #10
-	str	r3, [r5, #3264]
+	str	r3, [r5, #3268]
 	bl	__memzero
-	ldr	r3, [r5, #3272]
+	ldr	r3, [r5, #3276]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L730+12
+	ldr	r0, .L736+12
 	strh	r8, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -5010,16 +4944,16 @@ FtlMapWritePage:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	add	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r2, [r5, #3260]
-	cmn	r2, #1
-	bne	.L717
-	ldr	r1, [r5, #3264]
+	ldrh	r0, [r4, #2]
+	add	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r5, #3264]
+	cmn	r3, #1
+	bne	.L722
+	ldr	r1, [r5, #3268]
 	add	r6, r6, #1
-	ldr	r0, .L730+16
+	ldr	r0, .L736+16
 	uxth	r6, r6
 	bl	sftl_printk
 	ldrh	r3, [r4, #2]
@@ -5028,37 +4962,159 @@ FtlMapWritePage:
 	subls	r3, r3, #1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L719
+	bls	.L724
 	mov	r2, r6
-	ldr	r1, [r5, #3264]
-	ldr	r0, .L730+20
+	ldr	r1, [r5, #3268]
+	ldr	r0, .L736+20
 	bl	sftl_printk
-.L720:
-	b	.L720
-.L719:
+.L725:
+	b	.L725
+.L724:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L712
-.L729:
-	b	.L729
-.L717:
-	cmp	r3, #1
-	beq	.L712
-	ldr	r2, [r5, #3264]
-	mov	r0, #0
+	beq	.L717
+.L735:
+	b	.L735
+.L722:
+	cmp	r3, #0
+	strhne	r10, [r4, #40]	@ movhi
+	cmp	r0, #1
+	cmpne	r3, #256
+	moveq	r0, #1
+	movne	r0, #0
+	beq	.L717
+	ldr	r2, [r5, #3268]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L731:
+.L737:
+	.align	2
+.L736:
+	.word	.LANCHOR0
+	.word	.LANCHOR1+242
+	.word	.LC1
+	.word	.LANCHOR0+3264
+	.word	.LC87
+	.word	.LC88
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.align	2
+	.global	load_l2p_region
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r4, .L745
+	uxth	r6, r0
+	uxth	r8, r1
+	ldrh	r3, [r4, #136]
+	cmp	r3, r6
+	bcs	.L739
+	movw	r2, #510
+	ldr	r1, .L745+4
+	ldr	r0, .L745+8
+	bl	sftl_printk
+.L739:
+	ldr	r3, [r4, #3892]
+	mov	r5, #12
+	ldr	r7, [r3, r6, lsl #2]
+	cmp	r7, #0
+	bne	.L740
+	mul	r5, r5, r8
+	ldr	r3, [r4, #2492]
+	ldrh	r2, [r4, #110]
+	mov	r1, #255
+	add	r3, r3, r5
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r4, #2492]
+	strh	r6, [r3, r5]	@ movhi
+	ldr	r3, [r4, #2492]
+	add	r5, r3, r5
+	str	r7, [r5, #4]
+.L741:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L740:
+	mul	r5, r5, r8
+	ldr	r3, [r4, #2492]
+	mov	r2, #1
+	ldr	r0, .L745+12
+	mov	r1, r2
+	str	r7, [r4, #3268]
+	add	r3, r3, r5
+	ldr	r3, [r3, #8]
+	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	r3, [r4, #3276]
+	bl	FlashReadPages
+	ldr	r3, [r4, #3264]
+	ldr	r8, [r4, #3276]
+	cmp	r3, #256
+	bne	.L742
+	mov	r2, r7
+	mov	r1, r6
+	ldr	r0, .L745+16
+	bl	sftl_printk
+	ldr	r0, .L745+20
+	lsr	r3, r7, #10
+	mov	r1, r6
+	strh	r3, [r0, #40]	@ movhi
+	ldr	r3, [r4, #2492]
+	add	r3, r3, r5
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L742:
+	ldrh	r3, [r8, #8]
+	cmp	r3, r6
+	beq	.L743
+	mov	r2, r7
+	mov	r1, r6
+	ldr	r0, .L745+24
+	bl	sftl_printk
+	mov	r3, #4
+	ldr	r1, [r4, #3276]
+	mov	r2, r3
+	ldr	r0, .L745+28
+	bl	rknand_print_hex
+	ldrh	r3, [r4, #136]
+	mov	r2, #4
+	ldr	r1, [r4, #3892]
+	ldr	r0, .L745+32
+	bl	rknand_print_hex
+.L743:
+	ldrh	r3, [r8, #8]
+	cmp	r3, r6
+	beq	.L744
+	movw	r2, #535
+	ldr	r1, .L745+4
+	ldr	r0, .L745+8
+	bl	sftl_printk
+.L744:
+	ldr	r3, [r4, #2492]
+	mov	r1, #0
+	add	r2, r3, r5
+	str	r1, [r2, #4]
+	strh	r6, [r3, r5]	@ movhi
+	b	.L741
+.L746:
 	.align	2
-.L730:
+.L745:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+258
 	.word	.LC1
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
+	.word	.LC89
+	.word	.LANCHOR0+3908
 	.word	.LC90
 	.word	.LC91
-	.size	FtlMapWritePage, .-FtlMapWritePage
+	.word	.LC92
+	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_map_blk_gc
 	.syntax unified
@@ -5076,20 +5132,39 @@ ftl_map_blk_gc:
 	ldr	r6, [r0, #12]
 	ldr	r9, [r0, #24]
 	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
+	ldrh	ip, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldr	r5, .L744
-	sub	r3, r3, #4
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r5, .L770
+	cmp	r2, r3
+	bge	.L748
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L750
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	blt	.L733
+	bcc	.L751
+.L748:
+	movw	r3, #65535
 	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L752
+	ldrh	r2, [r5, #104]
+	ldrh	r3, [r4, #2]
+	cmp	r2, r3
+	subls	lr, r6, #2
+	movls	r2, #0
+	bls	.L753
+.L752:
 	lsl	r0, r0, #1
 	ldrh	r8, [r6, r0]
 	cmp	r8, #0
-	beq	.L733
+	beq	.L750
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L733
+	bne	.L750
 	mov	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r6, r0]	@ movhi
@@ -5099,78 +5174,112 @@ ftl_map_blk_gc:
 	strh	r3, [r4, #8]	@ movhi
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L734
+	bcc	.L757
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L734:
-	ldr	r10, .L744+4
+.L757:
 	mov	r6, #0
-.L735:
-	ldrh	r2, [r4, #6]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L739
+.L758:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L765
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	mov	r3, #0
 	str	r3, [r4, #32]
-.L733:
+.L750:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L740
+	bcc	.L751
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L740:
+.L751:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L739:
-	uxth	r7, r6
-	ldr	r2, [r9, r7, lsl #2]
-	cmp	r8, r2, lsr #10
-	bne	.L736
-	ldr	ip, [r5, #3284]
-	ldr	r2, [r5, #3844]
-	ldr	r0, .L744+8
-	str	ip, [r5, #3272]
-	str	r2, [r5, #3268]
+.L755:
+	ldrh	r10, [lr, #2]!
+	add	r8, r2, #1
+	cmp	r10, r1
+	beq	.L754
+	mov	r2, r8
+.L753:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L755
+	mov	r7, r0
+.L754:
+	uxth	r2, r2
+	ldr	r0, .L770+4
+	lsl	r2, r2, #1
+	ldrh	r2, [r6, r2]
+	bl	sftl_printk
+	mvn	r3, #0
+	mov	r0, r7
+	strh	r3, [r4, #40]	@ movhi
+	b	.L752
+.L765:
+	uxth	r7, r6
+	add	r3, r9, r7, lsl #2
+	str	r3, [fp, #-44]
+	ldr	r3, [r9, r7, lsl #2]
+	cmp	r8, r3, lsr #10
+	bne	.L759
+	ldr	r3, [r5, #3848]
+	ldr	r0, .L770+8
+	str	r3, [r5, #3272]
+	ldr	r3, [r5, #3288]
+	str	r3, [r5, #3276]
 	ldr	r2, [r9, r7, lsl #2]
 	str	r3, [fp, #-48]
-	str	ip, [fp, #-44]
-	str	r2, [r5, #3264]
+	str	r2, [r5, #3268]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	ip, [fp, #-44]
 	ldr	r3, [fp, #-48]
-	ldrh	r2, [ip, #8]
-	cmp	r2, r3
-	beq	.L737
-	movw	r2, #613
-	mov	r1, r10
-	ldr	r0, .L744+12
+	ldrh	r2, [r3, #8]
+	cmp	r2, r10
+	beq	.L760
+	movw	r2, #647
+	ldr	r1, .L770+12
+	ldr	r0, .L770+16
 	bl	sftl_printk
-.L737:
-	ldr	r3, [r5, #3260]
-	cmn	r3, #1
-	moveq	r3, #0
-	streq	r3, [r9, r7, lsl #2]
-	beq	.L736
-	ldr	r2, [r5, #3268]
+	ldr	r3, [fp, #-48]
+.L760:
+	ldr	r2, [r5, #3264]
+	cmn	r2, #1
+	bne	.L761
+.L763:
+	ldr	r2, [fp, #-44]
+	mov	r3, #0
+	str	r3, [r2]
+.L762:
+	b	.L762
+.L761:
+	ldrh	r2, [r3, #8]
+	cmp	r2, r10
+	bne	.L763
+	ldrh	r2, [r3]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L763
+	ldr	r2, [r5, #3272]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L736:
+.L759:
 	add	r6, r6, #1
-	b	.L735
-.L745:
+	b	.L758
+.L771:
 	.align	2
-.L744:
+.L770:
 	.word	.LANCHOR0
+	.word	.LC93
+	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+274
-	.word	.LANCHOR0+3260
 	.word	.LC1
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
@@ -5185,12 +5294,13 @@ flush_l2p_region:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L747
+	ldr	r5, .L773
 	uxth	r0, r0
 	mov	r4, #12
 	mul	r4, r4, r0
 	ldr	r3, [r5, #2492]
 	add	r0, r5, #3904
+	add	r0, r0, #4
 	add	r2, r3, r4
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
@@ -5202,9 +5312,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L748:
+.L774:
 	.align	2
-.L747:
+.L773:
 	.word	.LANCHOR0
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	2
@@ -5221,7 +5331,7 @@ log2phys:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mvn	r6, #0
-	ldr	r4, .L763
+	ldr	r4, .L789
 	mov	r7, r1
 	mov	r10, r2
 	ldrh	r3, [r4, #108]
@@ -5232,20 +5342,20 @@ log2phys:
 	uxth	r8, r9
 	uxth	r6, r6
 	cmp	r0, r3
-	bcc	.L750
-	mov	r2, #808
-	ldr	r1, .L763+4
-	ldr	r0, .L763+8
+	bcc	.L776
+	movw	r2, #847
+	ldr	r1, .L789+4
+	ldr	r0, .L789+8
 	bl	sftl_printk
-.L750:
+.L776:
 	ldrh	r1, [r4, #138]
 	mov	r2, #0
 	ldr	r0, [r4, #2492]
 	mov	r3, #12
-.L751:
+.L777:
 	uxth	r5, r2
 	cmp	r5, r1
-	bcc	.L756
+	bcc	.L782
 	str	r3, [fp, #-44]
 	bl	select_l2p_ram_region
 	ldr	r3, [fp, #-44]
@@ -5256,32 +5366,32 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L757
+	beq	.L783
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L757
+	bge	.L783
 	bl	flush_l2p_region
-.L757:
+.L783:
 	mov	r1, r5
 	uxth	r0, r9
 	bl	load_l2p_region
-	b	.L752
-.L756:
+	b	.L778
+.L782:
 	add	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r8
-	bne	.L751
-.L752:
+	bne	.L777
+.L778:
 	cmp	r10, #0
 	mov	r3, #12
-	bne	.L753
+	bne	.L779
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r5, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r6, lsl #2]
 	str	r3, [r7]
-.L754:
+.L780:
 	ldr	r2, [r4, #2492]
 	mov	r3, #12
 	mov	r0, #0
@@ -5291,7 +5401,7 @@ log2phys:
 	addne	r3, r3, #1
 	strne	r3, [r5, #4]
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L753:
+.L779:
 	mul	r3, r3, r5
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5303,12 +5413,12 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L763+12
+	ldr	r3, .L789+12
 	strh	r8, [r3]	@ movhi
-	b	.L754
-.L764:
+	b	.L780
+.L790:
 	.align	2
-.L763:
+.L789:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5328,7 +5438,7 @@ FtlReUsePrevPpa:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r6, r0
-	ldr	r7, .L775
+	ldr	r7, .L801
 	ubfx	r0, r1, #10, #16
 	str	r1, [fp, #-32]
 	bl	P2V_block_in_plane
@@ -5336,34 +5446,34 @@ FtlReUsePrevPpa:
 	lsl	r5, r0, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #0
-	bne	.L766
+	bne	.L792
 	ldr	r4, [r7, #2340]
 	cmp	r4, #0
-	beq	.L767
+	beq	.L793
 	movw	r2, #2344
 	movw	lr, #65535
 	ldrh	ip, [r7, r2]
 	ldr	r2, [r7, #2316]
 	sub	r4, r4, r2
 	ubfx	r4, r4, #3, #16
-.L768:
+.L794:
 	uxth	r1, r3
 	cmp	ip, r1
-	bls	.L767
+	bls	.L793
 	cmp	r4, r0
-	bne	.L769
+	bne	.L795
 	mov	r1, r4
-	ldr	r0, .L775+4
+	ldr	r0, .L801+4
 	bl	List_remove_node
 	movw	r3, #2344
 	ldrh	r3, [r7, r3]
 	cmp	r3, #0
-	bne	.L770
-	movw	r2, #1688
-	ldr	r1, .L775+8
-	ldr	r0, .L775+12
+	bne	.L796
+	movw	r2, #1737
+	ldr	r1, .L801+8
+	ldr	r0, .L801+12
 	bl	sftl_printk
-.L770:
+.L796:
 	movw	r2, #2344
 	mov	r0, r4
 	ldrh	r3, [r7, r2]
@@ -5372,25 +5482,25 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r7, #2324]
 	ldrh	r3, [r2, r5]
-.L766:
+.L792:
 	add	r3, r3, #1
 	strh	r3, [r2, r5]	@ movhi
-	b	.L767
-.L769:
+	b	.L793
+.L795:
 	lsl	r4, r4, #3
 	add	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L768
-.L767:
+	bne	.L794
+.L793:
 	mov	r2, #1
 	sub	r1, fp, #32
 	mov	r0, r6
 	bl	log2phys
 	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L776:
+.L802:
 	.align	2
-.L775:
+.L801:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2340
 	.word	.LANCHOR1+298
@@ -5410,55 +5520,55 @@ ftl_scan_all_data:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r6, .L785
+	ldr	r6, .L811
 	mov	r1, #0
-	ldr	r0, .L785+4
+	ldr	r0, .L811+4
 	bl	sftl_printk
 	mov	r4, r6
-.L778:
+.L804:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L784
+	bcc	.L810
 	sub	sp, fp, #28
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L784:
+.L810:
 	mov	r2, #0
 	sub	r1, fp, #32
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
 	cmp	r3, #0
-	bne	.L779
+	bne	.L805
 	ldr	r2, [fp, #-32]
 	mov	r1, r5
-	ldr	r0, .L785+8
+	ldr	r0, .L811+8
 	bl	sftl_printk
-.L779:
+.L805:
 	ldr	r3, [fp, #-32]
 	cmn	r3, #1
-	beq	.L781
-	str	r3, [r4, #3264]
+	beq	.L807
+	str	r3, [r4, #3268]
 	mov	r2, #0
-	ldr	r3, [r4, #3280]
+	ldr	r3, [r4, #3284]
 	mov	r1, #1
-	ldr	r7, [r4, #3284]
-	ldr	r0, .L785+12
-	str	r3, [r4, #3268]
-	str	r5, [r4, #3276]
-	str	r7, [r4, #3272]
-	str	r2, [r4, #3260]
+	ldr	r7, [r4, #3288]
+	ldr	r0, .L811+12
+	str	r3, [r4, #3272]
+	str	r5, [r4, #3280]
+	str	r7, [r4, #3276]
+	str	r2, [r4, #3264]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
 	cmpne	r3, #256
-	beq	.L782
+	beq	.L808
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L781
-.L782:
-	ldr	r2, [r4, #3268]
-	ldr	r3, [r4, #3272]
-	ldr	r0, .L785+16
+	beq	.L807
+.L808:
+	ldr	r2, [r4, #3272]
+	ldr	r3, [r4, #3276]
+	ldr	r0, .L811+16
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5471,19 +5581,19 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3264]
+	ldr	r2, [r4, #3268]
 	bl	sftl_printk
-.L781:
+.L807:
 	add	r5, r5, #1
-	b	.L778
-.L786:
+	b	.L804
+.L812:
 	.align	2
-.L785:
+.L811:
 	.word	.LANCHOR0
-	.word	.LC92
-	.word	.LC93
-	.word	.LANCHOR0+3260
 	.word	.LC94
+	.word	.LC95
+	.word	.LANCHOR0+3264
+	.word	.LC96
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -5498,21 +5608,21 @@ FtlReadRefresh:
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #88
-	ldr	r3, .L800
+	ldr	r3, .L826
 	ldr	r0, [r3, #2716]
 	mov	r4, r3
 	cmp	r0, #0
-	beq	.L788
+	beq	.L814
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L789
+	bcs	.L815
 	mov	r5, #2048
-.L794:
+.L820:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L791
+	bcs	.L817
 	mov	r2, #0
 	sub	r1, fp, #108
 	bl	log2phys
@@ -5521,10 +5631,10 @@ FtlReadRefresh:
 	cmn	r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L792
+	beq	.L818
 	str	r3, [fp, #-88]
 	sub	r0, fp, #20
-	ldr	r3, .L800+4
+	ldr	r3, .L826+4
 	mov	r1, #1
 	str	r2, [fp, #-100]
 	mov	r2, #0
@@ -5535,53 +5645,53 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-104]
 	cmp	r3, #256
-	bne	.L791
+	bne	.L817
 	ldr	r0, [fp, #-108]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L791:
+.L817:
 	mvn	r0, #0
-.L787:
+.L813:
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L792:
+.L818:
 	subs	r5, r5, #1
-	bne	.L794
-	b	.L791
-.L789:
+	bne	.L820
+	b	.L817
+.L815:
 	ldr	r2, [r3, #2508]
 	mov	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L787
-.L788:
+	b	.L813
+.L814:
 	ldr	r1, [r3, #2508]
 	ldr	r2, [r3, #2712]
 	add	ip, r1, #1048576
 	cmp	r2, ip
-	bhi	.L797
+	bhi	.L823
 	ldr	r3, [r3, #2564]
 	mov	ip, #33554432
 	lsr	r3, r3, #10
 	add	r2, r2, ip, asr r3
 	cmp	r1, r2
-	bhi	.L797
-	ldr	r3, .L800+8
+	bhi	.L823
+	ldr	r3, .L826+8
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L787
-.L797:
+	bne	.L813
+.L823:
 	mov	r3, #1
 	mov	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L787
-.L801:
+	b	.L813
+.L827:
 	.align	2
-.L800:
+.L826:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.word	.LANCHOR0+2268
@@ -5600,116 +5710,116 @@ ftl_check_vpc:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r4, #0
-	ldr	r6, .L826
-	ldr	r1, .L826+4
-	ldr	r0, .L826+8
+	ldr	r6, .L852
+	ldr	r1, .L852+4
+	ldr	r0, .L852+8
 	mov	r5, r6
 	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L826+12
+	ldr	r0, .L852+12
 	bl	__memzero
-.L803:
+.L829:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L805
-	ldr	r8, .L826+12
+	bcc	.L831
+	ldr	r8, .L852+12
 	mov	r4, #0
-	ldr	r9, .L826+16
+	ldr	r9, .L852+16
 	mov	r6, r4
-.L806:
+.L832:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L808
+	bhi	.L834
 	ldr	r4, [r5, #2340]
 	cmp	r4, #0
-	beq	.L809
+	beq	.L835
 	movw	r3, #2344
-	ldr	r9, .L826+12
+	ldr	r9, .L852+12
 	ldrh	r8, [r5, r3]
 	mov	r7, #0
 	ldr	r3, [r5, #2316]
-	ldr	r10, .L826+20
+	ldr	r10, .L852+20
 	sub	r4, r4, r3
 	ubfx	r4, r4, #3, #16
-.L810:
+.L836:
 	uxth	r3, r7
 	cmp	r8, r3
-	bls	.L809
+	bls	.L835
 	ldr	r2, [r5, #2324]
 	lsl	r3, r4, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	beq	.L811
+	beq	.L837
 	mov	r6, #1
 	ldrh	r3, [r9, r3]
 	mov	r1, r4
 	mov	r0, r10
 	bl	sftl_printk
-.L811:
+.L837:
 	ldr	r3, [r5, #2316]
 	lsl	r4, r4, #3
 	add	r7, r7, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L810
-.L809:
+	bne	.L836
+.L835:
 	cmp	r6, #0
 	ldmibeq	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-	movw	r2, #2321
-	ldr	r1, .L826+4
-	ldr	r0, .L826+24
+	movw	r2, #2373
+	ldr	r1, .L852+4
+	ldr	r0, .L852+24
 	bl	sftl_printk
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L805:
+.L831:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L804
+	beq	.L830
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, .L826+12
+	ldr	r2, .L852+12
 	lsl	r0, r0, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L804:
+.L830:
 	add	r4, r4, #1
-	b	.L803
-.L808:
+	b	.L829
+.L834:
 	uxth	r1, r4
 	ldr	r3, [r5, #2324]
 	lsl	r7, r1, #1
 	ldrh	r2, [r3, r7]
 	ldrh	r3, [r8, r7]
 	cmp	r2, r3
-	beq	.L807
+	beq	.L833
 	mov	r0, r9
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	movw	r2, #65535
 	ldrh	r3, [r3, r7]
 	cmp	r3, r2
-	beq	.L807
+	beq	.L833
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
 	movhi	r6, #1
-.L807:
+.L833:
 	add	r4, r4, #1
-	b	.L806
-.L827:
+	b	.L832
+.L853:
 	.align	2
-.L826:
+.L852:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+314
-	.word	.LC95
-	.word	check_vpc_table
-	.word	.LC96
 	.word	.LC97
+	.word	check_vpc_table
+	.word	.LC98
+	.word	.LC99
 	.word	.LC1
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
@@ -5731,39 +5841,38 @@ FtlMapBlkWriteDump_data:
 	mov	r3, #0
 	ldrh	r5, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L835
+	ldr	r3, .L861
 	ldr	r2, [r0, #24]
 	sub	r5, r5, #1
 	uxth	r5, r5
-	ldr	r0, [r3, #3844]
+	ldr	r0, [r3, #3848]
 	mov	r4, r3
-	ldr	r1, [r3, #3284]
-	str	r0, [r3, #3268]
-	str	r1, [r3, #3272]
+	ldr	r1, [r3, #3288]
+	str	r0, [r3, #3272]
+	str	r1, [r3, #3276]
 	ldr	r2, [r2, r5, lsl #2]
 	cmp	r2, #0
-	str	r2, [r3, #3264]
-	beq	.L830
+	str	r2, [r3, #3268]
+	beq	.L856
 	mov	r2, #1
-	ldr	r0, .L835+4
+	add	r0, r3, #3264
 	mov	r1, r2
 	bl	FlashReadPages
-.L831:
-	ldr	r2, [r4, #3268]
+.L857:
+	ldr	r2, [r4, #3272]
 	mov	r1, r5
 	mov	r0, r6
 	bl	FtlMapWritePage
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L830:
+.L856:
 	ldrh	r2, [r3, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L831
-.L836:
+	b	.L857
+.L862:
 	.align	2
-.L835:
+.L861:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
 	.global	FtlScanSysBlk
@@ -5779,24 +5888,24 @@ FtlScanSysBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r4, .L918
-	movw	r3, #3944
+	ldr	r4, .L944
 	mov	r1, r5
 	ldr	r2, [r4, #128]
+	add	r3, r4, #3952
+	ldr	r0, [r4, #3896]
 	mov	r6, r4
-	ldr	r0, [r4, #3892]
-	strh	r5, [r4, r3]	@ movhi
+	strh	r5, [r3]	@ movhi
 	strh	r5, [r4, #144]	@ movhi
 	lsl	r2, r2, #2
 	bl	ftl_memset
 	ldr	r2, [r4, #128]
 	mov	r1, r5
-	ldr	r0, [r4, #3868]
+	ldr	r0, [r4, #3872]
 	lsl	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #3880]
+	ldr	r0, [r4, #3884]
 	lsl	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r4, #120]
@@ -5811,22 +5920,22 @@ FtlScanSysBlk:
 	str	r3, [r4, #2584]
 	ldrh	r3, [r4, #40]
 	str	r3, [fp, #-44]
-.L838:
+.L864:
 	ldrh	r3, [r6, #42]
 	ldr	r2, [fp, #-44]
 	cmp	r3, r2
-	bls	.L879
+	bls	.L905
 	ldr	r1, [r6, #3176]
 	mov	r7, #0
 	ldrh	r2, [r6, #32]
 	mov	r10, r7
-	ldr	r8, [r6, #3832]
+	ldr	r8, [r6, #3836]
 	ldr	r3, [r6, #3172]
 	str	r1, [fp, #-48]
 	ldrh	r9, [r6, #112]
-	ldr	ip, .L918+4
-	b	.L880
-.L840:
+	ldr	ip, .L944+4
+	b	.L906
+.L866:
 	ldrb	r0, [ip, r7]	@ zero_extendqisi2
 	ldr	r1, [fp, #-44]
 	str	r3, [fp, #-64]
@@ -5839,7 +5948,7 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	ldr	r2, [fp, #-60]
 	ldr	r3, [fp, #-64]
-	bne	.L839
+	bne	.L865
 	mov	r1, #20
 	mla	r0, r1, r10, r8
 	ldr	r1, [fp, #-52]
@@ -5855,35 +5964,35 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, r10, #1
 	uxth	r10, r1
-.L839:
+.L865:
 	add	r7, r7, #1
-.L880:
+.L906:
 	uxth	r1, r7
 	cmp	r2, r1
-	bhi	.L840
+	bhi	.L866
 	cmp	r10, #0
-	bne	.L841
-.L878:
+	bne	.L867
+.L904:
 	ldr	r3, [fp, #-44]
 	add	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [fp, #-44]
-	b	.L838
-.L841:
+	b	.L864
+.L867:
 	mov	r2, #1
 	mov	r1, r10
 	mov	r0, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L917:
+.L943:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r10, r3
-	bls	.L878
+	bls	.L904
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r4, #3836]
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	ldr	r1, [r2, #4]
@@ -5891,10 +6000,10 @@ FtlScanSysBlk:
 	cmn	r3, #1
 	lsr	ip, r1, #10
 	uxth	r8, ip
-	bne	.L845
+	bne	.L871
 	mov	r3, #16
-.L847:
-	ldr	r0, [r4, #3832]
+.L873:
+	ldr	r0, [r4, #3836]
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
 	add	r0, r0, r9
@@ -5909,75 +6018,75 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	cmp	r2, r3
 	ldr	r3, [fp, #-52]
-	bne	.L844
-	ldr	r3, [r4, #3832]
+	bne	.L870
+	ldr	r3, [r4, #3836]
 	mvn	r2, #0
 	str	r2, [r3, r9]
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r9]
 	cmp	r3, r2
-	bne	.L845
-.L846:
+	bne	.L871
+.L872:
 	mov	r1, #0
 	uxth	r0, ip
 	bl	FtlFreeSysBlkQueueIn
-	b	.L850
-.L844:
-	ldr	r2, [r4, #3832]
+	b	.L876
+.L870:
+	ldr	r2, [r4, #3836]
 	ldr	r2, [r2, r9]
 	cmn	r2, #1
-	bne	.L845
+	bne	.L871
 	sub	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #0
-	bne	.L847
-	b	.L846
-.L845:
+	bne	.L873
+	b	.L872
+.L871:
 	ldr	r2, [r6, #2540]
 	ldr	r3, [r7, #4]
 	cmn	r2, #1
-	beq	.L848
+	beq	.L874
 	cmp	r2, r3
-	bhi	.L849
-.L848:
+	bhi	.L875
+.L874:
 	cmn	r3, #1
 	addne	r2, r3, #1
 	strne	r2, [r5, #2540]
-.L849:
+.L875:
 	ldrh	r2, [r7]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L851
-	bhi	.L852
+	beq	.L877
+	bhi	.L878
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L853
-.L850:
+	beq	.L879
+.L876:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L917
-.L852:
+	b	.L943
+.L878:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L854
+	beq	.L880
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L846
-	b	.L850
-.L854:
-	ldr	r9, .L918+8
+	beq	.L872
+	b	.L876
+.L880:
+	ldr	r9, .L944+8
 	ldr	r3, [r4, #128]
 	ldrh	r2, [r9]
 	cmp	r2, r3
-	bls	.L856
-	movw	r2, #1211
-	ldr	r1, .L918+12
-	ldr	r0, .L918+16
+	bls	.L882
+	movw	r2, #1256
+	ldr	r1, .L944+12
+	ldr	r0, .L944+16
 	bl	sftl_printk
-.L856:
+.L882:
 	ldr	r0, [r4, #128]
 	ldrh	r2, [r9]
-	ldr	ip, [r4, #3892]
+	ldr	ip, [r4, #3896]
 	uxth	r1, r0
 	sub	r3, r1, #1
 	sub	r1, r1, r2
@@ -5985,104 +6094,104 @@ FtlScanSysBlk:
 	sxth	r3, r3
 	sxth	r1, r1
 	str	r1, [fp, #-52]
-.L857:
+.L883:
 	ldr	r1, [fp, #-52]
 	cmp	r3, r1
-	bgt	.L863
+	bgt	.L889
 	cmp	r3, #0
-	bge	.L895
-	b	.L850
-.L863:
+	bge	.L921
+	b	.L876
+.L889:
 	lsl	lr, r3, #2
 	ldr	r1, [r7, #4]
 	str	lr, [fp, #-56]
 	ldr	lr, [ip, r3, lsl #2]
 	cmp	r1, lr
-	bls	.L858
+	bls	.L884
 	ldr	r1, [ip]
 	cmp	r1, #0
-	bne	.L859
+	bne	.L885
 	cmp	r0, r2
 	addne	r2, r2, #1
 	strhne	r2, [r9]	@ movhi
-.L859:
+.L885:
 	uxth	ip, r3
 	mov	r1, #0
-.L860:
+.L886:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L861
+	bhi	.L887
 	ldr	r1, [r7, #4]
 	cmp	r3, #0
-	ldr	r2, [r5, #3892]
+	ldr	r2, [r5, #3896]
 	ldr	r0, [fp, #-56]
 	str	r1, [r2, r0]
 	lsl	r2, r3, #1
-	ldr	r1, [r5, #3868]
+	ldr	r1, [r5, #3872]
 	strh	r8, [r1, r2]	@ movhi
-	blt	.L850
-	ldr	r2, .L918+8
+	blt	.L876
+	ldr	r2, .L944+8
 	ldr	r1, [r5, #128]
 	ldrh	r2, [r2]
 	sub	r1, r1, r2
 	sub	r1, r1, #1
 	sxth	r1, r1
 	cmp	r3, r1
-	bgt	.L850
-.L895:
+	bgt	.L876
+.L921:
 	add	r2, r2, #1
 	ldr	r1, [r7, #4]
 	strh	r2, [r9]	@ movhi
-	ldr	r2, [r4, #3892]
+	ldr	r2, [r4, #3896]
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
-	ldr	r2, [r4, #3868]
-.L915:
+	ldr	r2, [r4, #3872]
+.L941:
 	strh	r8, [r2, r3]	@ movhi
-	b	.L850
-.L861:
-	ldr	r0, [r6, #3892]
+	b	.L876
+.L887:
+	ldr	r0, [r6, #3896]
 	add	r1, r1, #1
 	add	lr, r0, r2, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r2, lsl #2]
 	lsl	r2, r2, #1
-	ldr	r0, [r6, #3868]
+	ldr	r0, [r6, #3872]
 	add	lr, r0, r2
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r2]	@ movhi
-	b	.L860
-.L858:
+	b	.L886
+.L884:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L857
-.L853:
+	b	.L883
+.L879:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L866
-	movw	r2, #1252
-	ldr	r1, .L918+12
-	ldr	r0, .L918+16
+	bls	.L892
+	movw	r2, #1297
+	ldr	r1, .L944+12
+	ldr	r0, .L944+16
 	bl	sftl_printk
-.L866:
+.L892:
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
-	ldr	ip, [r4, #3880]
+	ldr	ip, [r4, #3884]
 	sub	r0, r2, #1
 	sxth	r3, r0
 	sub	r0, r0, r1
 	str	r0, [fp, #-52]
-.L867:
+.L893:
 	ldr	r0, [fp, #-52]
 	cmp	r3, r0
-	ble	.L872
+	ble	.L898
 	ldr	r9, [ip, r3, lsl #2]
 	lsl	lr, r3, #2
 	ldr	r0, [r7, #4]
 	cmp	r0, r9
-	bls	.L868
+	bls	.L894
 	sub	r2, r2, r1
 	ldr	r0, [ip]
 	clz	r2, r2
@@ -6094,37 +6203,37 @@ FtlScanSysBlk:
 	addeq	r1, r1, #1
 	strheq	r1, [r5, #144]	@ movhi
 	mov	r1, #0
-.L870:
+.L896:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L871
+	bhi	.L897
 	ldr	r1, [r7, #4]
-	ldr	r2, [r5, #3880]
+	ldr	r2, [r5, #3884]
 	str	r1, [r2, lr]
 	lsl	r2, r3, #1
 	ldr	r1, [r5, #148]
 	strh	r8, [r1, r2]	@ movhi
-.L872:
+.L898:
 	cmp	r3, #0
-	blt	.L850
+	blt	.L876
 	ldrh	r2, [r5, #120]
 	ldrh	r1, [r5, #144]
 	sub	r2, r2, #1
 	sub	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L850
+	bgt	.L876
 	add	r1, r1, #1
-	ldr	r2, [r5, #3880]
+	ldr	r2, [r5, #3884]
 	strh	r1, [r5, #144]	@ movhi
 	ldr	r1, [r7, #4]
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
 	ldr	r2, [r5, #148]
-	b	.L915
-.L871:
-	ldr	r0, [r6, #3880]
+	b	.L941
+.L897:
+	ldr	r0, [r6, #3884]
 	add	r1, r1, #1
 	add	r9, r0, r2, lsl #2
 	ldr	r9, [r9, #4]
@@ -6134,135 +6243,135 @@ FtlScanSysBlk:
 	add	r9, r0, r2
 	ldrh	r9, [r9, #2]
 	strh	r9, [r0, r2]	@ movhi
-	b	.L870
-.L868:
+	b	.L896
+.L894:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L867
-.L851:
-	ldr	r9, .L918+20
+	b	.L893
+.L877:
+	ldr	r9, .L944+20
 	movw	r2, #65535
 	ldrh	r1, [r9]
 	cmp	r1, r2
 	strheq	r8, [r9]	@ movhi
-	beq	.L916
+	beq	.L942
 	ldrh	r0, [r9, #4]
 	cmp	r0, r2
-	beq	.L875
+	beq	.L901
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L875:
+.L901:
 	ldr	r3, [r7, #4]
 	ldr	r2, [r4, #2584]
 	cmp	r2, r3
 	strhcs	r8, [r9, #4]	@ movhi
-	bcs	.L850
+	bcs	.L876
 	ldrh	r3, [r9]
 	strh	r8, [r9]	@ movhi
 	strh	r3, [r9, #4]	@ movhi
 	ldr	r3, [r7, #4]
-.L916:
+.L942:
 	str	r3, [r4, #2584]
-	b	.L850
-.L879:
-	ldr	r2, [r6, #3868]
+	b	.L876
+.L905:
+	ldr	r2, [r6, #3872]
 	ldrh	r3, [r2]
 	cmp	r3, #0
-	beq	.L881
-.L884:
+	beq	.L907
+.L910:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L882
-.L883:
-	movw	r3, #3944
-	ldrh	r2, [r4, r3]
+	beq	.L908
+.L909:
+	ldr	r3, .L944+8
+	ldrh	r2, [r3]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L914
-	movw	r2, #1377
-	ldr	r1, .L918+12
-	ldr	r0, .L918+16
+	bls	.L940
+	movw	r2, #1422
+	ldr	r1, .L944+12
+	ldr	r0, .L944+16
 	bl	sftl_printk
-.L914:
+.L940:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L881:
-	movw	r1, #3944
-	ldrh	r1, [r6, r1]
+.L907:
+	ldr	r1, .L944+8
+	ldrh	r1, [r1]
 	cmp	r1, #0
 	ldrne	r1, [r6, #128]
-	beq	.L884
-.L885:
+	beq	.L910
+.L911:
 	sxth	ip, r3
 	cmp	ip, r1
-	bcs	.L884
+	bcs	.L910
 	lsl	r0, ip, #1
 	add	r3, r3, #1
 	ldrh	r0, [r2, r0]
 	cmp	r0, #0
-	beq	.L885
+	beq	.L911
 	mov	r3, ip
 	mov	lr, #0
-.L886:
+.L912:
 	ldr	r2, [r5, #128]
 	cmp	r3, r2
-	bcs	.L884
-	ldr	r1, [r5, #3868]
+	bcs	.L910
+	ldr	r1, [r5, #3872]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
 	lsl	r6, r0, #1
 	ldrh	r7, [r1, r2]
 	strh	r7, [r1, r6]	@ movhi
-	ldr	r1, [r5, #3892]
+	ldr	r1, [r5, #3896]
 	ldr	r6, [r1, r3, lsl #2]
 	add	r3, r3, #1
 	sxth	r3, r3
 	str	r6, [r1, r0, lsl #2]
-	ldr	r1, [r5, #3868]
+	ldr	r1, [r5, #3872]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L886
-.L882:
+	b	.L912
+.L908:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
 	ldrhne	r0, [r4, #120]
-	beq	.L883
-.L891:
+	beq	.L909
+.L917:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	ip, r3
-	bge	.L883
+	bge	.L909
 	lsl	lr, r3, #1
 	add	r2, r2, #1
 	ldrh	lr, [r1, lr]
 	cmp	lr, #0
-	beq	.L891
+	beq	.L917
 	mov	lr, #0
-.L892:
+.L918:
 	ldrh	r2, [r5, #120]
 	cmp	r3, r2
-	bge	.L883
+	bge	.L909
 	ldr	r1, [r5, #148]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
 	lsl	r6, r0, #1
 	ldrh	r7, [r1, r2]
 	strh	r7, [r1, r6]	@ movhi
-	ldr	r1, [r5, #3880]
+	ldr	r1, [r5, #3884]
 	ldr	r6, [r1, r3, lsl #2]
 	add	r3, r3, #1
 	sxth	r3, r3
 	str	r6, [r1, r0, lsl #2]
 	ldr	r1, [r5, #148]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L892
-.L919:
+	b	.L918
+.L945:
 	.align	2
-.L918:
+.L944:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
-	.word	.LANCHOR0+3944
+	.word	.LANCHOR0+3952
 	.word	.LANCHOR1+328
 	.word	.LC1
 	.word	.LANCHOR0+2576
@@ -6283,7 +6392,7 @@ FtlMapTblRecovery:
 	mov	r1, #0
 	ldr	r3, [r0, #24]
 	mov	r4, r0
-	ldr	r6, .L947
+	ldr	r6, .L971
 	mov	r7, #0
 	ldr	r8, [r0, #12]
 	str	r3, [fp, #-44]
@@ -6298,27 +6407,27 @@ FtlMapTblRecovery:
 	ldr	r3, [fp, #-48]
 	lsl	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, [r6, #3280]
+	ldr	r3, [r6, #3284]
 	mvn	r2, #0
-	ldr	r9, [r6, #3284]
+	ldr	r9, [r6, #3288]
 	str	r7, [r4, #32]
-	str	r3, [r6, #3268]
-	str	r9, [r6, #3272]
+	str	r3, [r6, #3272]
+	str	r9, [r6, #3276]
 	strh	r2, [r4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
 	mov	r2, #1
 	str	r7, [r4, #28]
 	str	r2, [r4, #36]
-.L921:
+.L947:
 	ldr	r3, [fp, #-52]
 	sxth	r2, r7
 	cmp	r2, r3
-	bge	.L938
+	bge	.L965
 	ldr	r3, [fp, #-52]
 	lsl	r0, r2, #1
 	sub	r1, r3, #1
 	cmp	r2, r1
-	bne	.L922
+	bne	.L948
 	add	r10, r8, r0
 	mov	r1, #1
 	ldrh	r0, [r8, r0]
@@ -6329,26 +6438,26 @@ FtlMapTblRecovery:
 	sxth	r1, r0
 	ldr	r2, [fp, #-52]
 	add	r0, r0, #1
-	ldr	ip, .L947+4
+	ldr	ip, .L971+4
 	strh	r7, [r4]	@ movhi
 	add	r7, r1, #1
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r2, [r3, r2, lsl #2]
 	str	r2, [r4, #28]
-.L923:
+.L949:
 	sxth	r2, r8
 	cmp	r2, r7
-	blt	.L925
-.L938:
+	blt	.L952
+.L965:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L927
+	bne	.L954
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L927:
+.L954:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6356,102 +6465,104 @@ FtlMapTblRecovery:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L925:
+.L952:
 	ldrh	r1, [r10]
 	mov	r0, ip
 	str	ip, [fp, #-52]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #3264]
+	str	r2, [r6, #3268]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, [r6, #3260]
+	ldr	r2, [r6, #3264]
 	ldr	ip, [fp, #-52]
 	cmn	r2, #1
-	beq	.L924
+	ldrheq	r2, [r10]
+	strheq	r2, [r4, #40]	@ movhi
+	beq	.L951
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L924
+	bls	.L951
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
-	ldreq	r1, [r6, #3264]
+	ldreq	r1, [r6, #3268]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L924:
+.L951:
 	add	r8, r8, #1
-	b	.L923
-.L922:
-	ldr	r2, [r5, #3280]
+	b	.L949
+.L948:
+	ldr	r2, [r5, #3284]
 	add	r3, r8, r0
 	str	r3, [fp, #-60]
-	str	r2, [r5, #3268]
+	str	r2, [r5, #3272]
 	ldrh	r2, [r5, #104]
 	ldrh	r1, [r8, r0]
-	ldr	r0, .L947+4
+	ldr	r0, .L971+4
 	sub	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3264]
+	str	r2, [r5, #3268]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, [r5, #3260]
+	ldr	r2, [r5, #3264]
 	cmn	r2, #1
-	beq	.L940
+	beq	.L967
 	ldrh	r1, [r9]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L940
+	bne	.L967
 	ldrh	r1, [r9, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L929
-.L940:
+	beq	.L956
+.L967:
 	mov	r10, #0
-.L930:
+.L957:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r10
 	cmp	r2, r1
-	bge	.L936
+	bge	.L963
 	ldr	r3, [fp, #-60]
-	ldr	r0, .L947+4
+	ldr	r0, .L971+4
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3264]
+	str	r2, [r5, #3268]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, [r5, #3260]
+	ldr	r2, [r5, #3264]
 	cmn	r2, #1
-	beq	.L934
+	beq	.L961
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L934
+	bls	.L961
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
-	ldreq	r1, [r5, #3264]
+	ldreq	r1, [r5, #3268]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L934:
+.L961:
 	add	r10, r10, #1
-	b	.L930
-.L929:
+	b	.L957
+.L956:
 	mov	r0, #0
 	mov	lr, #4
-.L931:
+.L958:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	sub	r1, r1, #1
 	cmp	r2, r1
-	blt	.L933
-.L936:
+	blt	.L960
+.L963:
 	add	r7, r7, #1
-	b	.L921
-.L933:
-	ldr	ip, [r5, #3280]
+	b	.L947
+.L960:
+	ldr	ip, [r5, #3284]
 	add	r0, r0, #1
 	ldr	r3, [fp, #-48]
 	ldr	r1, [ip, r2, lsl #3]
@@ -6462,12 +6573,12 @@ FtlMapTblRecovery:
 	movhi	r1, r10
 	ldrhi	r2, [ip, r2]
 	strhi	r2, [r3, r1, lsl #2]
-	b	.L931
-.L948:
+	b	.L958
+.L972:
 	.align	2
-.L947:
+.L971:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
@@ -6481,31 +6592,33 @@ FtlLoadVonderInfo:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L950
+	ldr	r3, .L974
 	ldrh	r2, [r3, #120]
-	add	r0, r3, #3936
-	add	r0, r0, #12
+	add	r0, r3, #3952
+	add	r0, r0, #4
 	strh	r2, [r0, #10]	@ movhi
-	ldr	r2, .L950+4
+	ldr	r2, .L974+4
 	strh	r2, [r0, #4]	@ movhi
 	ldrh	r2, [r3, #144]
 	strh	r2, [r0, #8]	@ movhi
 	ldrh	r2, [r3, #122]
 	strh	r2, [r0, #6]	@ movhi
 	ldr	r2, [r3, #148]
-	str	r2, [r3, #3960]
-	ldr	r2, [r3, #3880]
-	str	r2, [r3, #3964]
-	ldr	r2, [r3, #3876]
 	str	r2, [r3, #3968]
 	ldr	r2, [r3, #3884]
 	str	r2, [r3, #3972]
+	ldr	r2, [r3, #3880]
+	str	r2, [r3, #3976]
+	ldr	r2, [r3, #3888]
+	str	r2, [r3, #3980]
+	mvn	r3, #0
+	strh	r3, [r0, #40]	@ movhi
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L951:
+.L975:
 	.align	2
-.L950:
+.L974:
 	.word	.LANCHOR0
 	.word	-3962
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6521,52 +6634,53 @@ FtlL2PDataInit:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L955
+	ldr	r4, .L979
 	mov	r1, #0
 	mvn	r5, #0
 	ldr	r2, [r4, #128]
-	ldr	r0, [r4, #3872]
+	ldr	r0, [r4, #3876]
 	lsl	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r3, [r4, #110]
 	mov	r1, #255
 	ldrh	r2, [r4, #138]
-	ldr	r0, [r4, #3896]
+	ldr	r0, [r4, #3900]
 	mul	r2, r2, r3
 	bl	ftl_memset
 	mov	r2, #0
 	mov	r3, r4
 	mov	lr, #12
 	mov	r4, r2
-.L953:
+.L977:
 	ldrh	r0, [r3, #138]
 	uxth	r1, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bhi	.L954
-	ldr	r2, .L955+4
+	bhi	.L978
 	mvn	r1, #0
+	movw	r0, #3908
+	ldr	r2, .L979+4
+	strh	r1, [r3, r0]	@ movhi
+	ldr	r0, [r3, #128]
 	strh	r1, [r2, #2]	@ movhi
-	strh	r1, [r2]	@ movhi
-	ldr	r1, [r3, #128]
-	strh	r1, [r2, #10]	@ movhi
-	ldr	r1, .L955+8
-	strh	r1, [r2, #4]	@ movhi
-	movw	r1, #3944
-	ldrh	r1, [r3, r1]
-	strh	r1, [r2, #8]	@ movhi
-	ldrh	r1, [r3, #136]
-	strh	r1, [r2, #6]	@ movhi
-	ldr	r2, [r3, #3868]
-	str	r2, [r3, #3916]
-	ldr	r2, [r3, #3892]
-	str	r2, [r3, #3920]
-	ldr	r2, [r3, #3872]
-	str	r2, [r3, #3924]
-	ldr	r2, [r3, #3888]
-	str	r2, [r3, #3928]
+	strh	r1, [r2, #40]	@ movhi
+	strh	r0, [r2, #10]	@ movhi
+	ldr	r0, .L979+8
+	strh	r0, [r2, #4]	@ movhi
+	ldrh	r0, [r2, #44]
+	strh	r0, [r2, #8]	@ movhi
+	ldrh	r0, [r3, #136]
+	strh	r0, [r2, #6]	@ movhi
+	ldr	r0, [r3, #3872]
+	str	r0, [r3, #3920]
+	ldr	r0, [r3, #3896]
+	str	r0, [r3, #3924]
+	ldr	r0, [r3, #3876]
+	str	r0, [r3, #3928]
+	ldr	r0, [r3, #3892]
+	str	r0, [r3, #3932]
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L954:
+.L978:
 	uxth	r2, r2
 	ldr	r1, [r3, #2492]
 	mul	r0, lr, r2
@@ -6577,17 +6691,17 @@ FtlL2PDataInit:
 	add	r1, r1, r0
 	ldrh	r0, [r3, #110]
 	mul	r2, r2, r0
-	ldr	r0, [r3, #3896]
+	ldr	r0, [r3, #3900]
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #8]
 	mov	r2, ip
-	b	.L953
-.L956:
+	b	.L977
+.L980:
 	.align	2
-.L955:
+.L979:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3904
+	.word	.LANCHOR0+3908
 	.word	-3902
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
@@ -6603,14 +6717,14 @@ FtlLoadMapInfo:
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
 	bl	FtlL2PDataInit
-	ldr	r0, .L958
+	ldr	r0, .L982
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L959:
+.L983:
 	.align	2
-.L958:
-	.word	.LANCHOR0+3904
+.L982:
+	.word	.LANCHOR0+3908
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
 	.global	FtlVariablesInit
@@ -6624,19 +6738,18 @@ FtlVariablesInit:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L961
+	ldr	r4, .L985
 	mvn	r3, #0
-	movw	r2, #3992
 	mov	r5, #0
-	strh	r3, [r4, r2]	@ movhi
 	mov	r1, r5
-	ldrh	r2, [r4, #120]
+	add	r2, r4, #4000
 	ldr	r0, [r4, #148]
-	str	r3, [r4, #4004]
-	str	r5, [r4, #3988]
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4, #120]
+	str	r3, [r4, #4012]
+	str	r5, [r4, #4004]
+	str	r5, [r4, #4008]
 	lsl	r2, r2, #1
-	str	r5, [r4, #3996]
-	str	r5, [r4, #4000]
 	strh	r5, [r4, #144]	@ movhi
 	bl	ftl_memset
 	ldrh	r2, [r4, #42]
@@ -6646,7 +6759,7 @@ FtlVariablesInit:
 	bl	ftl_memset
 	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #3856]
+	ldr	r0, [r4, #3860]
 	lsl	r2, r2, #1
 	bl	ftl_memset
 	add	r0, r4, #2256
@@ -6661,9 +6774,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L962:
+.L986:
 	.align	2
-.L961:
+.L985:
 	.word	.LANCHOR0
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	2
@@ -6680,10 +6793,10 @@ SupperBlkListInit:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, #0
-	ldr	r4, .L974
+	ldr	r4, .L998
 	mov	r1, #0
 	mov	r8, r5
-	mov	r7, r5
+	mov	r6, r5
 	ldrh	r2, [r4, #42]
 	ldr	r0, [r4, #2316]
 	lsl	r2, r2, #3
@@ -6696,20 +6809,20 @@ SupperBlkListInit:
 	strh	r5, [r3]	@ movhi
 	strh	r5, [r4, r2]	@ movhi
 	str	r3, [fp, #-48]
-.L964:
+.L988:
 	ldrh	r3, [r4, #40]
 	uxth	r10, r5
 	cmp	r10, r3
-	bcs	.L970
+	bcs	.L995
 	ldrh	r3, [r4, #102]
 	mov	r9, r10
 	ldrh	ip, [r4, #32]
 	str	r3, [fp, #-44]
 	mov	r3, #0
-	mov	r6, r3
-	b	.L971
-.L966:
-	ldr	r2, .L974+4
+	mov	r7, r3
+	b	.L996
+.L990:
+	ldr	r2, .L998+4
 	mov	r1, r9
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
@@ -6721,69 +6834,75 @@ SupperBlkListInit:
 	ldreq	r2, [fp, #-44]
 	ldr	ip, [fp, #-56]
 	add	r3, r3, #1
-	addeq	r6, r6, r2
-	uxtheq	r6, r6
-.L971:
+	addeq	r7, r7, r2
+	uxtheq	r7, r7
+.L996:
 	uxth	r1, r3
 	cmp	ip, r1
-	bhi	.L966
-	cmp	r6, #0
-	moveq	r0, r6
-	beq	.L967
-	mov	r1, r6
+	bhi	.L990
+	cmp	r7, #0
+	beq	.L991
+	mov	r1, r7
 	mov	r0, #32768
 	bl	__divsi3
-.L967:
+	uxth	r7, r0
+.L992:
 	ldr	r3, [r4, #2316]
 	add	r3, r3, r9, lsl #3
-	strh	r0, [r3, #4]	@ movhi
-	ldr	r3, .L974+8
+	strh	r7, [r3, #4]	@ movhi
+	ldr	r3, .L998+8
 	ldrh	r1, [r3]
 	cmp	r1, r10
-	beq	.L968
+	beq	.L993
 	ldrh	r1, [r3, #48]
 	cmp	r1, r10
-	beq	.L968
+	beq	.L993
 	ldrh	r3, [r3, #96]
 	cmp	r3, r10
-	beq	.L968
+	beq	.L993
 	ldr	r2, [r4, #2324]
 	lsl	r3, r9, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L969
+	bne	.L994
 	add	r8, r8, #1
 	mov	r0, r9
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L968:
+.L993:
 	add	r5, r5, #1
-	b	.L964
-.L969:
-	add	r7, r7, #1
+	b	.L988
+.L991:
+	ldr	r1, [r4, #2324]
+	lsl	r3, r9, #1
+	mvn	r0, #0
+	strh	r0, [r1, r3]	@ movhi
+	b	.L992
+.L994:
+	add	r6, r6, #1
 	mov	r0, r9
-	uxth	r7, r7
+	uxth	r6, r6
 	bl	INSERT_DATA_LIST
-	b	.L968
-.L970:
+	b	.L993
+.L995:
 	ldr	r2, [fp, #-48]
-	strh	r7, [r2]	@ movhi
-	add	r7, r7, r8
-	cmp	r7, r3
+	strh	r6, [r2]	@ movhi
+	add	r6, r6, r8
+	cmp	r6, r3
 	movw	r2, #2344
 	strh	r8, [r4, r2]	@ movhi
-	ble	.L972
-	movw	r2, #2154
-	ldr	r1, .L974+12
-	ldr	r0, .L974+16
+	ble	.L997
+	movw	r2, #2206
+	ldr	r1, .L998+12
+	ldr	r0, .L998+16
 	bl	sftl_printk
-.L972:
+.L997:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L975:
+.L999:
 	.align	2
-.L974:
+.L998:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR0+2348
@@ -6802,7 +6921,7 @@ FtlGcPageVarInit:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L977
+	ldr	r4, .L1001
 	mov	r3, #0
 	movw	r2, #3192
 	mov	r1, #255
@@ -6821,9 +6940,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	ldmfd	sp, {r4, fp, sp, pc}
-.L978:
+.L1002:
 	.align	2
-.L977:
+.L1001:
 	.word	.LANCHOR0
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	2
@@ -6840,38 +6959,38 @@ FtlGcScanTempBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #20
 	mov	r6, r0
-	ldr	r3, .L1002
+	ldr	r3, .L1026
 	mov	r10, r1
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L996
+	beq	.L1020
 	cmp	r4, #0
-	bne	.L980
-.L981:
+	bne	.L1004
+.L1005:
 	bl	FtlGcPageVarInit
-	b	.L982
-.L996:
+	b	.L1006
+.L1020:
 	mov	r4, #0
-.L980:
-	ldr	r3, .L1002+4
+.L1004:
+	ldr	r3, .L1026+4
 	ldrh	r3, [r3, #102]
 	cmp	r3, r10
-	beq	.L981
-.L982:
-	ldr	r5, .L1002+4
+	beq	.L1005
+.L1006:
+	ldr	r5, .L1026+4
 	mov	r8, #0
-.L990:
+.L1014:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	mov	r0, #0
 	strb	r0, [r6, #8]
 	cmp	r2, r3
-	beq	.L983
-.L993:
+	beq	.L1007
+.L1017:
 	ldrh	r3, [r5, #32]
 	mov	r2, #0
-	ldr	r0, [r5, #3832]
+	ldr	r0, [r5, #3836]
 	add	ip, r6, #16
 	mov	r7, r2
 	movw	r9, #65535
@@ -6884,34 +7003,34 @@ FtlGcScanTempBlk:
 	str	r3, [fp, #-56]
 	ldrh	r3, [r5, #112]
 	str	r3, [fp, #-60]
-.L984:
+.L1008:
 	ldr	r1, [fp, #-44]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L986
+	bhi	.L1010
 	mov	r9, #0
 	mov	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.L987:
+.L1011:
 	uxth	r3, r9
 	cmp	r7, r3
-	bhi	.L991
+	bhi	.L1015
 	add	r8, r8, #1
 	add	r4, r4, #1
 	cmp	r10, r8
 	uxth	r4, r4
-	bls	.L992
-.L994:
+	bls	.L1016
+.L1018:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L993
+	bhi	.L1017
 	mov	r0, #0
-	b	.L983
-.L986:
+	b	.L1007
+.L1010:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L985
+	beq	.L1009
 	mov	r1, #20
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r1, r7, r0
@@ -6936,12 +7055,12 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L985:
+.L1009:
 	add	r2, r2, #1
-	b	.L984
-.L991:
+	b	.L1008
+.L1015:
 	mov	r3, #20
-	ldr	r2, [r5, #3832]
+	ldr	r2, [r5, #3836]
 	mul	r3, r3, r9
 	str	r2, [fp, #-52]
 	add	ip, r2, r3
@@ -6955,7 +7074,7 @@ FtlGcScanTempBlk:
 	ldr	r3, [fp, #-56]
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L988
+	bne	.L1012
 	ldr	ip, [fp, #-48]
 	movw	r2, #65535
 	add	r9, r9, #1
@@ -6963,11 +7082,11 @@ FtlGcScanTempBlk:
 	ldr	r3, [ip, #12]
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L989
+	bne	.L1013
 	mov	r3, #1
-	str	r3, [r5, #4000]
-.L983:
-	ldr	r3, .L1002
+	str	r3, [r5, #4008]
+.L1007:
+	ldr	r3, .L1026
 	mvn	r2, #0
 	strb	r0, [r6, #6]
 	mov	r1, r4
@@ -6976,13 +7095,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r6
 	bl	ftl_sb_update_avl_pages
-	b	.L995
-.L989:
+	b	.L1019
+.L1013:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L987
-.L988:
+	b	.L1011
+.L1012:
 	ldrh	r3, [r6]
 	mov	r4, #0
 	ldr	r2, [r5, #2324]
@@ -6993,25 +7112,25 @@ FtlGcScanTempBlk:
 	mvn	r3, #0
 	strh	r3, [r6]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L990
-.L992:
-	ldr	r2, .L1002
+	b	.L1014
+.L1016:
+	ldr	r2, .L1026
 	movw	r1, #65535
 	ldrh	r3, [r2, #4]
 	cmp	r3, r1
-	beq	.L994
+	beq	.L1018
 	add	r3, r3, r8
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L994
-.L995:
+	bls	.L1018
+.L1019:
 	mvn	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1003:
+.L1027:
 	.align	2
-.L1002:
+.L1026:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
@@ -7044,30 +7163,30 @@ FtlBbmTblFlush:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r5, #0
-	ldr	r4, .L1014
+	ldr	r4, .L1038
 	mov	r1, #0
-	ldr	r7, .L1014+4
-	ldr	r0, [r4, #3280]
+	ldr	r0, [r4, #3284]
 	add	r6, r4, #176
-	ldr	r3, [r4, #3284]
+	ldr	r3, [r4, #3288]
+	add	r7, r4, #3904
 	ldrh	r2, [r4, #110]
-	str	r0, [r4, #3268]
-	str	r3, [r4, #3272]
+	str	r0, [r4, #3272]
+	str	r3, [r4, #3276]
 	bl	ftl_memset
-.L1006:
+.L1030:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1007
-	ldr	r6, [r4, #3272]
+	blt	.L1031
+	ldr	r6, [r4, #3276]
 	mov	r2, #16
 	mov	r1, #255
-	ldr	r9, .L1014+8
-	ldr	r8, .L1014+12
+	ldr	r9, .L1038+4
+	ldr	r8, .L1038+8
 	mov	r5, #0
 	mov	r0, r6
 	mov	r7, r5
 	bl	memset
-	ldr	r3, .L1014+16
+	ldr	r3, .L1038+12
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #160]
 	str	r3, [r6, #4]
@@ -7079,24 +7198,24 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1008:
-	ldr	r3, [r4, #3280]
+.L1032:
+	ldr	r3, [r4, #3284]
 	mov	r10, #0
 	ldrh	r1, [r4, #152]
 	ldrh	r2, [r4, #154]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	str	r10, [r4, #3260]
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	r10, [r4, #3264]
+	str	r3, [r4, #3276]
 	orr	r3, r2, r1, lsl #10
 	ldrh	r0, [r6, #10]
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	sftl_printk
 	mov	r3, #1
-	mov	r0, r8
+	ldr	r0, .L1038+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -7104,10 +7223,10 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1009
+	blt	.L1033
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	add	r3, r3, #1
 	strh	r10, [r4, #154]	@ movhi
 	str	r3, [r4, #160]
@@ -7119,7 +7238,7 @@ FtlBbmTblFlush:
 	strh	r3, [r4, #152]	@ movhi
 	mov	r1, r2
 	lsl	r3, r3, #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	mov	r3, #1
@@ -7127,54 +7246,53 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1009:
+.L1033:
 	ldrh	r3, [r4, #154]
 	add	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	bne	.L1010
+	bne	.L1034
 	add	r5, r5, #1
-	ldr	r1, [r4, #3264]
+	ldr	r1, [r4, #3268]
 	uxth	r5, r5
-	ldr	r0, .L1014+20
+	ldr	r0, .L1038+16
 	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1008
+	bls	.L1032
 	mov	r2, r5
-	ldr	r1, [r4, #3264]
-	ldr	r0, .L1014+24
+	ldr	r1, [r4, #3268]
+	ldr	r0, .L1038+20
 	bl	sftl_printk
-.L1012:
-	b	.L1012
-.L1007:
+.L1036:
+	b	.L1036
+.L1031:
 	ldrh	r2, [r7]
-	ldr	r3, [r4, #3268]
+	ldr	r3, [r4, #3272]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
 	lsl	r2, r2, #2
 	add	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1006
-.L1013:
+	b	.L1030
+.L1037:
 	mov	r7, #1
-	b	.L1008
-.L1010:
+	b	.L1032
+.L1034:
 	cmp	r7, #0
-	beq	.L1013
+	beq	.L1037
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1015:
+.L1039:
 	.align	2
-.L1014:
+.L1038:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3900
-	.word	.LC98
-	.word	.LANCHOR0+3260
-	.word	-3887
-	.word	.LC99
 	.word	.LC100
+	.word	.LANCHOR0+3264
+	.word	-3887
+	.word	.LC101
+	.word	.LC102
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	2
 	.global	allocate_data_superblock
@@ -7190,25 +7308,25 @@ allocate_data_superblock:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, r0
-	ldr	r4, .L1051
+	ldr	r4, .L1075
 	add	r9, r4, #2336
-.L1017:
-	ldr	r7, .L1051+4
+.L1041:
+	ldr	r7, .L1075+4
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1018
-	movw	r2, #2585
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	ble	.L1042
+	movw	r2, #2654
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1018:
-	ldr	r3, .L1051+16
+.L1042:
+	ldr	r3, .L1075+16
 	cmp	r5, r3
 	movne	r1, #0
-	bne	.L1019
+	bne	.L1043
 	ldrh	r3, [r7]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7219,19 +7337,19 @@ allocate_data_superblock:
 	cmp	r1, #0
 	subne	r1, r1, #1
 	uxthne	r1, r1
-.L1019:
-	ldr	r0, .L1051+20
+.L1043:
+	ldr	r0, .L1075+20
 	bl	List_pop_index_node
 	ldrh	r3, [r7]
 	mov	r6, r0
 	uxth	r8, r0
 	cmp	r3, #0
-	bne	.L1020
-	movw	r2, #2594
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	bne	.L1044
+	movw	r2, #2663
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1020:
+.L1044:
 	ldrh	r3, [r7]
 	mov	r0, r5
 	sub	r3, r3, #1
@@ -7240,7 +7358,7 @@ allocate_data_superblock:
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1021
+	bne	.L1045
 	uxth	r0, r6
 	ldr	r2, [r4, #2324]
 	mvn	r1, #0
@@ -7252,25 +7370,25 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1017
-	movw	r2, #2605
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	ble	.L1041
+	movw	r2, #2674
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-	b	.L1017
-.L1021:
+	b	.L1041
+.L1045:
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1023
-	mov	r2, #2608
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	ble	.L1047
+	movw	r2, #2677
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1023:
-	ldr	r0, [r4, #3800]
+.L1047:
+	ldr	r0, [r4, #3804]
 	mov	r2, #20
 	ldrh	r1, [r4, #32]
 	mov	r7, #0
@@ -7279,30 +7397,30 @@ allocate_data_superblock:
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [fp, #-44]
-.L1024:
+.L1048:
 	ldr	r1, [fp, #-44]
 	cmp	r1, r3
-	bne	.L1026
+	bne	.L1050
 	cmp	r7, #0
-	bne	.L1027
-	movw	r2, #2619
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	bne	.L1051
+	mov	r2, #2688
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1027:
-	ldr	r3, .L1051+24
+.L1051:
+	ldr	r3, .L1075+24
 	ldrh	r3, [r3]
 	cmp	r3, r8
-	bne	.L1028
-	movw	r2, #2621
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	bne	.L1052
+	movw	r2, #2690
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1028:
+.L1052:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	cmp	r3, #0
-	bne	.L1029
+	bne	.L1053
 	ldr	r1, [r4, #2328]
 	lsl	r2, r6, #1
 	ldrh	r3, [r1, r2]
@@ -7317,7 +7435,7 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1032:
+.L1056:
 	ldr	r3, [r4, #2328]
 	lsl	r10, r6, #1
 	ldr	r2, [r4, #2564]
@@ -7330,48 +7448,46 @@ allocate_data_superblock:
 	ldr	r3, [r4, #2552]
 	mla	r0, r0, r2, r3
 	bl	__udivsi3
-	ldr	r2, [r4, #3860]
-	ldr	r1, [r4, #3800]
+	ldr	r2, [r4, #3864]
+	ldr	r1, [r4, #3804]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1051+28
+	ldr	r0, .L1075+28
 	add	r3, r3, #1
 	str	r3, [r2, #16]
 	mov	r2, #20
 	mla	r2, r2, r7, r1
 	add	r3, r1, #4
 	add	r2, r2, #24
-.L1034:
+.L1058:
 	add	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1035
+	bne	.L1059
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	bl	FlashEraseBlocks
 	mov	r3, #0
 	mov	ip, #20
 	mov	r1, r3
-.L1036:
+.L1060:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L1038
+	bhi	.L1062
 	cmp	r1, #0
-	ble	.L1039
+	ble	.L1063
 	mov	r0, r6
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1039:
+.L1063:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1040
+	bne	.L1064
 	ldr	r3, [r4, #2324]
 	mvn	r2, #0
-	mov	r0, r6
 	strh	r2, [r3, r10]	@ movhi
-	bl	INSERT_DATA_LIST
-	b	.L1017
-.L1026:
+	b	.L1041
+.L1050:
 	str	lr, [r3, #8]
 	movw	r10, #65535
 	str	lr, [r3, #12]
@@ -7383,8 +7499,8 @@ allocate_data_superblock:
 	addne	r7, r7, #1
 	uxthne	r7, r7
 	strne	r1, [r10, #4]
-	b	.L1024
-.L1029:
+	b	.L1048
+.L1053:
 	ldr	r1, [r4, #2328]
 	lsl	r3, r6, #1
 	mov	r0, r6
@@ -7395,19 +7511,19 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1032
-.L1035:
+	b	.L1056
+.L1059:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1034
-.L1038:
+	b	.L1058
+.L1062:
 	mul	r2, ip, r3
-	ldr	lr, [r4, #3800]
+	ldr	lr, [r4, #3804]
 	add	r0, lr, r2
 	ldr	r2, [lr, r2]
 	cmn	r2, #1
-	bne	.L1037
+	bne	.L1061
 	ldr	r0, [r0, #4]
 	add	r1, r1, #1
 	str	ip, [fp, #-56]
@@ -7425,10 +7541,10 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	sub	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1037:
+.L1061:
 	add	r3, r3, #1
-	b	.L1036
-.L1040:
+	b	.L1060
+.L1064:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7447,22 +7563,22 @@ allocate_data_superblock:
 	strh	r3, [r1, r2]	@ movhi
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1041
+	beq	.L1065
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1042
-.L1041:
-	movw	r2, #2674
-	ldr	r1, .L1051+8
-	ldr	r0, .L1051+12
+	bne	.L1066
+.L1065:
+	movw	r2, #2743
+	ldr	r1, .L1075+8
+	ldr	r0, .L1075+12
 	bl	sftl_printk
-.L1042:
+.L1066:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1052:
+.L1076:
 	.align	2
-.L1051:
+.L1075:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2344
 	.word	.LANCHOR1+360
@@ -7486,47 +7602,47 @@ FtlGcFreeBadSuperBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	uxth	r3, r0
-	ldr	r6, .L1065
+	ldr	r6, .L1089
 	str	r3, [fp, #-44]
-	movw	r3, #3206
+	movw	r3, #3210
 	ldrh	r3, [r6, r3]
 	cmp	r3, #0
 	movne	r7, #0
-	ldrne	r10, .L1065+4
-	bne	.L1055
-.L1054:
+	ldrne	r10, .L1089+4
+	bne	.L1079
+.L1078:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1061:
+.L1085:
 	uxtah	r3, r6, r7
 	ldr	r1, [fp, #-44]
 	mov	r8, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1056:
+.L1080:
 	ldrh	r3, [r10]
 	uxth	r4, r8
 	cmp	r3, r4
-	bhi	.L1060
+	bhi	.L1084
 	add	r7, r7, #1
-.L1055:
+.L1079:
 	ldrh	r2, [r6, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1061
+	bhi	.L1085
 	bl	FtlGcReFreshBadBlk
-	b	.L1054
-.L1060:
+	b	.L1078
+.L1084:
 	uxth	r3, r8
-	ldr	r5, .L1065+8
+	ldr	r5, .L1089+8
 	lsl	r2, r3, #1
 	ldrh	r2, [r5, r2]
 	cmp	r2, r9
-	bne	.L1057
+	bne	.L1081
 	mov	r1, r9
-	ldr	r0, .L1065+12
+	ldr	r0, .L1089+12
 	str	r3, [fp, #-48]
 	bl	sftl_printk
 	mov	r0, r9
@@ -7535,27 +7651,27 @@ FtlGcFreeBadSuperBlk:
 	ldr	r3, [fp, #-48]
 	ldrh	r2, [r10]
 	add	r3, r5, r3, lsl #1
-.L1058:
+.L1082:
 	cmp	r4, r2
-	bcc	.L1059
+	bcc	.L1083
 	sub	r2, r2, #1
 	strh	r2, [r10]	@ movhi
-.L1057:
+.L1081:
 	add	r8, r8, #1
-	b	.L1056
-.L1059:
+	b	.L1080
+.L1083:
 	ldrh	r1, [r3, #2]!
 	add	r4, r4, #1
 	uxth	r4, r4
 	strh	r1, [r3, #-2]	@ movhi
-	b	.L1058
-.L1066:
+	b	.L1082
+.L1090:
 	.align	2
-.L1065:
+.L1089:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3206
-	.word	.LANCHOR0+3208
-	.word	.LC101
+	.word	.LANCHOR0+3210
+	.word	.LANCHOR0+3212
+	.word	.LC103
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -7569,20 +7685,20 @@ update_vpc_list:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1077
+	ldr	r3, .L1101
 	uxth	r4, r0
 	ldr	r1, [r3, #2324]
 	lsl	r2, r4, #1
 	mov	r6, r3
 	ldrh	r0, [r1, r2]
 	cmp	r0, #0
-	bne	.L1068
+	bne	.L1092
 	movw	r2, #2588
 	ldrh	r1, [r3, r2]
 	cmp	r1, r4
 	mvneq	r3, #0
 	strheq	r3, [r6, r2]	@ movhi
-	beq	.L1070
+	beq	.L1094
 	movw	r2, #2348
 	ldrh	r2, [r3, r2]
 	cmp	r2, r4
@@ -7595,19 +7711,19 @@ update_vpc_list:
 	ldrh	r3, [r3, r2]
 	cmp	r3, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-.L1070:
-	ldr	r5, .L1077+4
+.L1094:
+	ldr	r5, .L1101+4
 	mov	r1, r4
-	ldr	r0, .L1077+8
+	ldr	r0, .L1101+8
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L1072
-	movw	r2, #2744
-	ldr	r1, .L1077+12
-	ldr	r0, .L1077+16
+	bne	.L1096
+	movw	r2, #2813
+	ldr	r1, .L1101+12
+	ldr	r0, .L1101+16
 	bl	sftl_printk
-.L1072:
+.L1096:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	sub	r3, r3, #1
@@ -7621,22 +7737,22 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r6, #40]
 	cmp	r3, r2
-	ble	.L1076
-	movw	r2, #2747
-	ldr	r1, .L1077+12
-	ldr	r0, .L1077+16
+	ble	.L1100
+	mov	r2, #2816
+	ldr	r1, .L1101+12
+	ldr	r0, .L1101+16
 	bl	sftl_printk
-.L1076:
+.L1100:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1068:
+.L1092:
 	mov	r0, r4
 	bl	List_update_data_list
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1078:
+.L1102:
 	.align	2
-.L1077:
+.L1101:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2336
 	.word	.LANCHOR0+2320
@@ -7655,75 +7771,112 @@ decrement_vpc_count:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	uxth	r6, r0
+	uxth	r4, r0
 	movw	r3, #65535
-	cmp	r6, r3
-	ldr	r4, .L1091
-	beq	.L1080
-	ldr	r3, [r4, #2324]
-	lsl	r5, r6, #1
-	ldrh	r2, [r3, r5]
+	cmp	r4, r3
+	ldr	r5, .L1118
+	beq	.L1104
+	ldr	r3, [r5, #2324]
+	lsl	r6, r4, #1
+	ldrh	r2, [r3, r6]
 	cmp	r2, #0
 	subne	r2, r2, #1
-	strhne	r2, [r3, r5]	@ movhi
-	bne	.L1080
-	mov	r1, r6
-	ldr	r0, .L1091+4
+	strhne	r2, [r3, r6]	@ movhi
+	bne	.L1104
+	mov	r1, r4
+	ldr	r0, .L1118+4
 	bl	sftl_printk
-	ldr	r3, [r4, #2324]
-	ldrh	r5, [r3, r5]
-	cmp	r5, #0
-	beq	.L1082
-.L1089:
-	mov	r5, #0
-.L1079:
-	mov	r0, r5
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1082:
-	movw	r2, #2762
-.L1090:
-	ldr	r1, .L1091+8
-	ldr	r0, .L1091+12
+	ldr	r3, [r5, #2324]
+	ldrh	r3, [r3, r6]
+	cmp	r3, #0
+	bne	.L1106
+	movw	r2, #2831
+	ldr	r1, .L1118+8
+	ldr	r0, .L1118+12
 	bl	sftl_printk
-	b	.L1079
-.L1080:
-	movw	r7, #3992
+.L1106:
+	ldr	r3, [r5, #2324]
+	mov	r2, #16
+	mov	r1, r4
+	ldr	r0, .L1118+16
+	strh	r2, [r3, r6]	@ movhi
+	bl	test_node_in_list
+	cmp	r0, #0
+	beq	.L1107
+	mov	r1, r4
+	ldr	r0, .L1118+16
+	bl	List_remove_node
+	movw	r3, #2344
+	ldrh	r3, [r5, r3]
+	cmp	r3, #0
+	bne	.L1108
+	movw	r2, #2835
+	ldr	r1, .L1118+8
+	ldr	r0, .L1118+12
+	bl	sftl_printk
+.L1108:
+	movw	r2, #2344
+	mov	r0, r4
+	ldrh	r3, [r5, r2]
+	sub	r3, r3, #1
+	strh	r3, [r5, r2]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r5, #2324]
+	mov	r1, r4
+	ldr	r0, .L1118+20
+	ldrh	r2, [r3, r6]
+	bl	sftl_printk
+.L1107:
+	mov	r0, r4
+	bl	FtlGcRefreshBlock
+.L1111:
+	mov	r6, #0
+	b	.L1103
+.L1104:
+	ldr	r7, .L1118+24
 	movw	r3, #65535
-	ldrh	r0, [r4, r7]
+	ldrh	r0, [r7]
 	cmp	r0, r3
-	strheq	r6, [r4, r7]	@ movhi
-	beq	.L1089
-.L1084:
-	cmp	r6, r0
-	beq	.L1089
+	strheq	r4, [r7]	@ movhi
+	beq	.L1111
+	cmp	r4, r0
+	beq	.L1111
 	bl	update_vpc_list
-	ldr	r2, [r4, #2316]
-	adds	r5, r0, #0
-	ldr	r3, [r4, #2320]
-	movne	r5, #1
-	ldr	r1, [r4, #2324]
-	strh	r6, [r4, r7]	@ movhi
+	ldr	r2, [r5, #2316]
+	adds	r6, r0, #0
+	ldr	r3, [r5, #2320]
+	movne	r6, #1
+	ldr	r1, [r5, #2324]
+	strh	r4, [r7]	@ movhi
 	sub	r3, r3, r2
 	asr	r3, r3, #3
 	uxth	r2, r3
 	uxth	r3, r3
 	lsl	r2, r2, #1
-	cmp	r3, r6
+	cmp	r3, r4
 	ldrh	r2, [r1, r2]
 	clz	r2, r2
 	lsr	r2, r2, #5
 	moveq	r2, #0
 	cmp	r2, #0
-	beq	.L1079
-	movw	r2, #2778
-	b	.L1090
-.L1092:
+	beq	.L1103
+	movw	r2, #2856
+	ldr	r1, .L1118+8
+	ldr	r0, .L1118+12
+	bl	sftl_printk
+.L1103:
+	mov	r0, r6
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1119:
 	.align	2
-.L1091:
+.L1118:
 	.word	.LANCHOR0
-	.word	.LC102
+	.word	.LC104
 	.word	.LANCHOR1+401
 	.word	.LC1
+	.word	.LANCHOR0+2340
+	.word	.LC105
+	.word	.LANCHOR0+4000
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	2
 	.global	FtlWriteDump_data
@@ -7738,22 +7891,22 @@ FtlWriteDump_data:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #28
-	ldr	r6, .L1111
-	ldr	r4, .L1111+4
+	ldr	r6, .L1138
+	ldr	r4, .L1138+4
 	ldrh	r2, [r6, #4]
 	cmp	r2, #0
-	beq	.L1094
+	beq	.L1121
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1094
+	bne	.L1121
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1094
+	beq	.L1121
 	ldrb	r8, [r4, #2358]	@ zero_extendqisi2
 	cmp	r8, #0
-	bne	.L1093
+	bne	.L1120
 	ldr	r7, [r4, #2504]
 	mov	r2, r8
 	sub	r1, fp, #64
@@ -7762,45 +7915,45 @@ FtlWriteDump_data:
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [fp, #-64]
-	ldr	r5, [r4, #3284]
-	ldr	r0, [r4, #3280]
+	ldr	r5, [r4, #3288]
+	ldr	r0, [r4, #3284]
 	cmn	r3, #1
 	str	r3, [fp, #-56]
 	str	r7, [fp, #-44]
 	str	r0, [fp, #-52]
 	str	r5, [fp, #-48]
 	str	r8, [r5, #4]
-	beq	.L1096
+	beq	.L1123
 	mov	r2, r8
 	mov	r1, #1
 	sub	r0, fp, #60
 	bl	FlashReadPages
-.L1097:
-	ldr	ip, .L1111
+.L1124:
+	ldr	ip, .L1138
 	mov	r8, #0
-	ldr	r3, .L1111+8
+	ldr	r3, .L1138+8
 	lsl	r9, r9, #2
 	mov	r10, r8
 	strh	r3, [r5]	@ movhi
-.L1098:
+.L1125:
 	cmp	r9, r8
-	bne	.L1102
-.L1099:
+	bne	.L1129
+.L1126:
 	mov	r3, #1
-.L1110:
+.L1137:
 	strb	r3, [r4, #2358]
-.L1093:
+.L1120:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1096:
+.L1123:
 	ldrh	r2, [r4, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L1097
-.L1102:
+	b	.L1124
+.L1129:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1099
+	beq	.L1126
 	ldr	r3, [fp, #-56]
 	mov	r0, ip
 	str	r7, [r5, #8]
@@ -7825,13 +7978,13 @@ FtlWriteDump_data:
 	ldrh	r0, [r6]
 	bl	decrement_vpc_count
 	ldr	ip, [fp, #-68]
-	b	.L1098
-.L1094:
+	b	.L1125
+.L1121:
 	mov	r3, #0
-	b	.L1110
-.L1112:
+	b	.L1137
+.L1139:
 	.align	2
-.L1111:
+.L1138:
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0
 	.word	-3947
@@ -7848,31 +8001,31 @@ l2p_flush:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L1117
+	ldr	r5, .L1144
 	mov	r4, #0
 	mov	r6, #12
 	bl	FtlWriteDump_data
-.L1114:
+.L1141:
 	ldrh	r2, [r5, #138]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1116
+	bhi	.L1143
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1116:
+.L1143:
 	ldr	r3, [r5, #2492]
 	uxth	r0, r4
 	mla	r3, r6, r0, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1115
+	bge	.L1142
 	bl	flush_l2p_region
-.L1115:
+.L1142:
 	add	r4, r4, #1
-	b	.L1114
-.L1118:
+	b	.L1141
+.L1145:
 	.align	2
-.L1117:
+.L1144:
 	.word	.LANCHOR0
 	.size	l2p_flush, .-l2p_flush
 	.align	2
@@ -7890,337 +8043,338 @@ FtlRecoverySuperblock:
 	sub	sp, sp, #44
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	mov	r10, r0
+	mov	r4, r0
 	cmp	r3, r2
-	beq	.L1240
+	beq	.L1267
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L1247
+	ldr	r6, .L1274
 	str	r3, [fp, #-64]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [fp, #-64]
 	str	r3, [fp, #-80]
-	ldrh	r3, [r5, #102]
+	ldrh	r3, [r6, #102]
 	cmp	r3, r1
 	mov	r3, #0
 	strheq	r3, [r0, #4]	@ movhi
 	ldrhne	r0, [r0, #16]
-	bne	.L1123
-.L1245:
-	strb	r3, [r10, #6]
-.L1240:
+	bne	.L1150
+.L1272:
+	strb	r3, [r4, #6]
+.L1267:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1124:
+.L1151:
 	uxth	r1, r3
-	add	r1, r10, r1, lsl #1
+	add	r1, r4, r1, lsl #1
 	ldrh	r0, [r1, #16]
-.L1123:
+.L1150:
 	cmp	r0, r2
-	uxth	r6, r3
+	uxth	r7, r3
 	add	r3, r3, #1
-	beq	.L1124
+	beq	.L1151
 	mov	r1, #1
 	bl	FtlGetLastWrittenPage
 	cmn	r0, #1
-	mov	r4, r0
-	beq	.L1125
-	ldrh	r3, [r5, #32]
+	mov	r5, r0
+	beq	.L1152
+	ldrh	r3, [r6, #32]
 	mov	r2, #0
-	ldr	r0, [r5, #3832]
-	movw	r7, #65535
-	ldr	lr, [r5, #3176]
-	mov	r8, #20
+	ldr	r0, [r6, #3836]
+	movw	r8, #65535
+	ldr	lr, [r6, #3176]
+	mov	r9, #20
 	str	r3, [fp, #-56]
-	ldr	r3, [r5, #3172]
-	ldrh	r6, [r5, #112]
+	ldr	r3, [r6, #3172]
+	ldrh	r7, [r6, #112]
 	str	r3, [fp, #-60]
-	ldrh	r3, [r5, #110]
-	mov	r5, r2
+	ldrh	r3, [r6, #110]
+	mov	r6, r2
 	str	r3, [fp, #-68]
-	add	r3, r10, #16
+	add	r3, r4, #16
 	mov	ip, r3
 	str	r3, [fp, #-76]
-.L1126:
+.L1153:
 	ldr	r1, [fp, #-56]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1130
-	ldr	r6, .L1247
+	bhi	.L1157
+	ldr	r7, .L1274
 	mov	r2, #0
-	mov	r1, r5
-	movw	r8, #65535
+	mov	r1, r6
 	bl	FlashReadPages
-	ldr	r3, [r6, #2544]
-	uxth	r2, r4
-	ldr	r9, [r6, #3832]
-	str	r2, [fp, #-60]
+	ldr	r3, [r7, #2544]
+	movw	r2, #65535
+	ldr	r9, [r7, #3836]
+	mov	r10, r7
+	str	r2, [fp, #-72]
+	uxth	r2, r5
 	sub	r3, r3, #1
 	str	r3, [fp, #-56]
-	mov	r7, r9
+	mov	r8, r9
 	mov	r3, #0
-.L1131:
+	str	r2, [fp, #-60]
+.L1158:
 	uxth	r2, r3
-	cmp	r5, r2
-	bhi	.L1136
-	addeq	r3, r4, #1
+	cmp	r6, r2
+	bhi	.L1163
+	addeq	r3, r5, #1
 	uxtheq	r3, r3
 	streq	r3, [fp, #-60]
-	bne	.L1134
-.L1241:
+	bne	.L1161
+.L1268:
 	ldr	r0, [r9, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldrh	r3, [r6, #102]
+	ldrh	r3, [r7, #102]
 	sub	r1, fp, #68
 	ldr	r2, [fp, #-60]
 	str	r0, [fp, #-68]
 	ldr	r0, [fp, #-80]
 	cmp	r3, r2
 	ldrheq	r3, [fp, #-60]
-	strheq	r3, [r10, #2]	@ movhi
+	strheq	r3, [r4, #2]	@ movhi
 	moveq	r3, #0
-	strbeq	r3, [r10, #6]
-	strheq	r3, [r10, #4]	@ movhi
+	strbeq	r3, [r4, #6]
+	strheq	r3, [r4, #4]	@ movhi
 	ldm	r1, {r1, r2, r3}
 	cmp	r3, r2
 	cmpeq	r1, r0
 	moveq	r2, r1
 	moveq	r1, r3
-	beq	.L1246
+	beq	.L1273
+	ldr	r2, [fp, #-72]
 	movw	r3, #65535
-	cmp	r8, r3
-	bne	.L1140
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	r2, r3
+	bne	.L1167
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1141
-.L1140:
-	ldr	r3, [r6, #4004]
-	uxth	r7, r4
-	uxth	r4, r4
+	bne	.L1168
+.L1167:
+	ldr	r3, [r7, #4012]
+	uxth	r8, r5
+	uxth	r5, r5
 	cmn	r3, #1
 	ldreq	r3, [fp, #-56]
-	streq	r3, [r6, #4004]
+	streq	r3, [r7, #4012]
 	ldr	r3, [fp, #-64]
-	ldr	r6, .L1247
+	ldr	r7, .L1274
 	add	r3, r3, #7
-	cmp	r4, r3
-	subgt	r4, r7, #7
-	ldrle	r4, [fp, #-64]
-	uxthgt	r4, r4
-.L1144:
-	cmp	r4, r7
-	bhi	.L1151
+	cmp	r5, r3
+	subgt	r5, r8, #7
+	ldrle	r5, [fp, #-64]
+	uxthgt	r5, r5
+.L1171:
+	cmp	r5, r8
+	bhi	.L1178
 	mov	r3, #0
-	ldrh	r8, [r6, #32]
-	ldr	r0, [r6, #3832]
-	mov	r5, r3
+	ldrh	r9, [r7, #32]
+	ldr	r0, [r7, #3836]
+	mov	r6, r3
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
 	mov	ip, #20
-	b	.L1152
-.L1125:
+	b	.L1179
+.L1152:
 	ldr	r3, [fp, #-64]
 	cmp	r3, #0
-	beq	.L1127
-	movw	r2, #1755
-	ldr	r1, .L1247+4
-	ldr	r0, .L1247+8
+	beq	.L1154
+	movw	r2, #1804
+	ldr	r1, .L1274+4
+	ldr	r0, .L1274+8
 	bl	sftl_printk
-.L1127:
+.L1154:
 	ldr	r3, [fp, #-80]
 	cmp	r3, #0
-	cmpne	r6, r3
-	beq	.L1128
-	movw	r2, #1756
-	ldr	r1, .L1247+4
-	ldr	r0, .L1247+8
+	cmpne	r7, r3
+	beq	.L1155
+	movw	r2, #1805
+	ldr	r1, .L1274+4
+	ldr	r0, .L1274+8
 	bl	sftl_printk
-.L1128:
+.L1155:
 	mov	r3, #0
-	strh	r3, [r10, #2]	@ movhi
-	b	.L1245
-.L1130:
+	strh	r3, [r4, #2]	@ movhi
+	b	.L1272
+.L1157:
 	ldrh	r3, [ip], #2
-	cmp	r3, r7
-	beq	.L1129
-	mla	r1, r8, r5, r0
-	orr	r3, r4, r3, lsl #10
+	cmp	r3, r8
+	beq	.L1156
+	mla	r1, r9, r6, r0
+	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
 	ldr	r3, [fp, #-68]
-	mul	r3, r3, r5
-	add	r9, r3, #3
+	mul	r3, r3, r6
+	add	r10, r3, #3
 	cmp	r3, #0
-	movlt	r3, r9
-	ldr	r9, [fp, #-60]
+	movlt	r3, r10
+	ldr	r10, [fp, #-60]
 	bic	r3, r3, #3
-	add	r3, r9, r3
+	add	r3, r10, r3
 	str	r3, [r1, #8]
-	mul	r3, r6, r5
-	add	r5, r5, #1
-	uxth	r5, r5
-	add	r9, r3, #3
+	mul	r3, r7, r6
+	add	r6, r6, #1
+	uxth	r6, r6
+	add	r10, r3, #3
 	cmp	r3, #0
-	movlt	r3, r9
+	movlt	r3, r10
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1129:
+.L1156:
 	add	r2, r2, #1
-	b	.L1126
-.L1136:
-	ldr	r2, [r7]
+	b	.L1153
+.L1163:
+	ldr	r2, [r8]
 	cmp	r2, #0
-	bne	.L1132
-	ldr	ip, [r7, #12]
+	bne	.L1159
+	ldr	ip, [r8, #12]
 	ldr	r2, [ip, #4]
 	cmn	r2, #1
-	beq	.L1133
-	ldr	r1, .L1247
+	beq	.L1160
+	ldr	r1, [r10, #2544]
 	mov	r0, r2
 	str	ip, [fp, #-68]
-	ldr	r1, [r1, #2544]
 	bl	ftl_cmp_data_ver
 	ldr	ip, [fp, #-68]
 	cmp	r0, #0
-	ldrne	r1, .L1247
 	addne	r2, r2, #1
-	strne	r2, [r1, #2544]
-.L1133:
+	strne	r2, [r10, #2544]
+.L1160:
 	ldr	r2, [ip]
 	cmn	r2, #1
-	bne	.L1135
-.L1134:
-	uxth	r2, r4
+	bne	.L1162
+.L1161:
+	uxth	r2, r5
 	uxth	r3, r3
 	str	r2, [fp, #-60]
 	mov	r2, #20
 	mla	r9, r2, r3, r9
-	b	.L1241
-.L1132:
-	ldr	r8, [fp, #-60]
-.L1135:
+	b	.L1268
+.L1159:
+	ldr	r2, [fp, #-60]
+	str	r2, [fp, #-72]
+.L1162:
 	add	r3, r3, #1
-	add	r7, r7, #20
-	b	.L1131
-.L1146:
+	add	r8, r8, #20
+	b	.L1158
+.L1173:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
-	mlane	r9, ip, r5, r0
-	addne	r5, r5, #1
-	orrne	r2, r4, r2, lsl #10
-	uxthne	r5, r5
-	strne	r2, [r9, #4]
-.L1152:
+	mlane	r10, ip, r6, r0
+	addne	r6, r6, #1
+	orrne	r2, r5, r2, lsl #10
+	uxthne	r6, r6
+	strne	r2, [r10, #4]
+.L1179:
 	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L1146
-	mov	r1, r5
+	cmp	r9, r2
+	bhi	.L1173
+	mov	r1, r6
 	mov	r2, #0
 	bl	FlashReadPages
-	ldr	r3, [r6, #3832]
+	ldr	r3, [r7, #3836]
 	mov	r2, #20
 	movw	r1, #65535
-	mla	r5, r2, r5, r3
-.L1147:
-	cmp	r5, r3
-	addeq	r4, r4, #1
-	uxtheq	r4, r4
-	beq	.L1144
-.L1150:
+	mla	r6, r2, r6, r3
+.L1174:
+	cmp	r6, r3
+	addeq	r5, r5, #1
+	uxtheq	r5, r5
+	beq	.L1171
+.L1177:
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L1141
+	bne	.L1168
 	ldr	r2, [r3, #12]
 	ldrh	r0, [r2]
 	cmp	r0, r1
-	beq	.L1149
+	beq	.L1176
 	ldr	r2, [r2, #4]
 	cmn	r2, #1
-	strne	r2, [r6, #4004]
-.L1149:
+	strne	r2, [r7, #4012]
+.L1176:
 	add	r3, r3, #20
-	b	.L1147
-.L1151:
+	b	.L1174
+.L1178:
 	mvn	r3, #0
-	str	r3, [r6, #4004]
-.L1141:
-	ldr	r1, .L1247
-	mov	r2, #1
-	movw	r3, #4008
-	ldr	r4, .L1247
-	add	r0, r1, #3904
-	strh	r2, [r1, r3]	@ movhi
+	str	r3, [r7, #4012]
+.L1168:
+	ldr	r5, .L1274+12
+	mov	r3, #1
+	mov	r0, r5
+	sub	r5, r5, #4016
+	strh	r3, [r0], #-108	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r8, [fp, #-64]
-.L1153:
-	ldrh	ip, [r4, #32]
+	ldr	r9, [fp, #-64]
+.L1180:
+	ldrh	ip, [r5, #32]
 	mov	r3, #0
-	ldr	r0, [r4, #3832]
-	mov	r9, r3
+	ldr	r0, [r5, #3836]
+	mov	r10, r3
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
-	mov	r5, #20
-.L1154:
+	mov	r6, #20
+.L1181:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1156
+	bhi	.L1183
 	mov	r2, #0
-	mov	r1, r9
+	mov	r1, r10
 	bl	FlashReadPages
 	mov	r3, #0
-.L1244:
+.L1271:
 	str	r3, [fp, #-72]
 	ldrh	r3, [fp, #-72]
-	cmp	r9, r3
-	bhi	.L1184
-	add	r8, r8, #1
-	ldrh	r3, [r4, #102]
-	uxth	r8, r8
-	cmp	r3, r8
-	bne	.L1153
-	ldrh	r2, [r4, #32]
+	cmp	r10, r3
+	bhi	.L1211
+	add	r9, r9, #1
+	ldrh	r3, [r5, #102]
+	uxth	r9, r9
+	cmp	r3, r9
+	bne	.L1180
+	ldrh	r2, [r5, #32]
 	movw	r0, #65535
 	mov	r3, #0
-	strh	r8, [r10, #2]	@ movhi
-	strh	r3, [r10, #4]	@ movhi
-.L1185:
+	strh	r9, [r4, #2]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L1212:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1240
+	bcs	.L1267
 	ldr	r1, [fp, #-76]
 	ldrh	ip, [r1], #2
 	cmp	ip, r0
 	str	r1, [fp, #-76]
 	add	r1, r3, #1
-	bne	.L1245
+	bne	.L1272
 	mov	r3, r1
-	b	.L1185
-.L1156:
+	b	.L1212
+.L1183:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
-	mlane	r6, r5, r9, r0
-	orrne	r2, r8, r2, lsl #10
-	addne	r9, r9, #1
-	uxthne	r9, r9
-	strne	r2, [r6, #4]
-	b	.L1154
-.L1184:
+	mlane	r7, r6, r10, r0
+	orrne	r2, r9, r2, lsl #10
+	addne	r10, r10, #1
+	uxthne	r10, r10
+	strne	r2, [r7, #4]
+	b	.L1181
+.L1211:
 	ldr	r3, [fp, #-72]
-	mov	r6, #20
-	ldr	r2, [r4, #3832]
-	mul	r6, r6, r3
+	mov	r7, #20
+	ldr	r2, [r5, #3836]
+	mul	r7, r7, r3
 	str	r2, [fp, #-84]
-	add	r7, r2, r6
-	ldr	r5, [r7, #4]
-	ubfx	r0, r5, #10, #16
-	str	r5, [fp, #-44]
+	add	r8, r2, r7
+	ldr	r6, [r8, #4]
+	ubfx	r0, r6, #10, #16
+	str	r6, [fp, #-44]
 	bl	P2V_plane
 	ldr	r3, [fp, #-64]
-	cmp	r8, r3
-	bcc	.L1158
+	cmp	r9, r3
+	bcc	.L1185
 	ldr	r2, [fp, #-80]
 	moveq	r3, #1
 	movne	r3, #0
@@ -8228,260 +8382,260 @@ FtlRecoverySuperblock:
 	movls	r3, #0
 	andhi	r3, r3, #1
 	cmp	r3, #0
-	bne	.L1158
+	bne	.L1185
 	ldr	r3, [fp, #-60]
 	ldr	r2, [fp, #-68]
-	cmp	r8, r3
+	cmp	r9, r3
 	cmpeq	r2, r0
-	beq	.L1159
+	beq	.L1186
 	ldr	r2, [fp, #-84]
-	ldr	r3, [r2, r6]
+	ldr	r3, [r2, r7]
 	cmn	r3, #1
-	beq	.L1160
-	ldr	r7, [r7, #12]
+	beq	.L1187
+	ldr	r8, [r8, #12]
 	movw	r3, #61589
-	ldrh	r2, [r7]
+	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1161
-.L1168:
-	ldrh	r0, [r10]
-.L1243:
+	beq	.L1188
+.L1195:
+	ldrh	r0, [r4]
+.L1270:
 	bl	decrement_vpc_count
-.L1158:
+.L1185:
 	ldr	r3, [fp, #-72]
 	add	r3, r3, #1
-	b	.L1244
-.L1161:
-	ldr	r3, [r7, #4]
+	b	.L1271
+.L1188:
+	ldr	r3, [r8, #4]
 	cmn	r3, #1
 	str	r3, [fp, #-56]
-	beq	.L1162
+	beq	.L1189
 	mov	r0, r3
-	ldr	r1, [r4, #2544]
+	ldr	r1, [r5, #2544]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
 	ldrne	r3, [fp, #-56]
 	addne	r3, r3, #1
-	strne	r3, [r4, #2544]
-.L1162:
-	ldrh	r2, [r7]
+	strne	r3, [r5, #2544]
+.L1189:
+	ldrh	r2, [r8]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1163
-	movw	r2, #1905
-	ldr	r1, .L1247+4
-	ldr	r0, .L1247+8
+	beq	.L1190
+	movw	r2, #1954
+	ldr	r1, .L1274+4
+	ldr	r0, .L1274+8
 	bl	sftl_printk
-.L1163:
-	ldr	r5, [r7, #8]
+.L1190:
+	ldr	r6, [r8, #8]
 	sub	r1, fp, #48
-	ldr	r3, [r7, #12]
+	ldr	r3, [r8, #12]
 	mov	r2, #0
-	mov	r0, r5
+	mov	r0, r6
 	str	r3, [fp, #-52]
 	bl	log2phys
-	ldr	r1, [r4, #4004]
+	ldr	r1, [r5, #4012]
 	cmn	r1, #1
-	beq	.L1164
+	beq	.L1191
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1164
+	beq	.L1191
 	ldr	r2, [fp, #-52]
 	cmn	r2, #1
-	beq	.L1165
-	ldr	r0, [r4, #3832]
+	beq	.L1192
+	ldr	r0, [r5, #3836]
 	mov	r1, #1
-	add	r0, r0, r6
+	add	r0, r0, r7
 	str	r2, [r0, #4]
 	mov	r2, #0
-	ldr	r7, [r0, #12]
+	ldr	r8, [r0, #12]
 	bl	FlashReadPages
-	ldr	r2, [r4, #3832]
-	ldr	r1, [r2, r6]
-	add	r3, r2, r6
+	ldr	r2, [r5, #3836]
+	ldr	r1, [r2, r7]
+	add	r3, r2, r7
 	cmn	r1, #1
-	bne	.L1166
-.L1167:
+	bne	.L1193
+.L1194:
 	mvn	r3, #0
-	ldrh	r0, [r10]
+	ldrh	r0, [r4]
 	str	r3, [fp, #-52]
 	bl	decrement_vpc_count
-.L1175:
-	ldr	r6, [fp, #-52]
-	cmn	r6, #1
-	beq	.L1158
-.L1188:
-	ubfx	r0, r6, #10, #16
+.L1202:
+	ldr	r7, [fp, #-52]
+	cmn	r7, #1
+	beq	.L1185
+.L1215:
+	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #40]
-	mov	r5, r0
+	ldrh	r3, [r5, #40]
+	mov	r6, r0
 	cmp	r3, r0
-	bhi	.L1180
-	movw	r2, #2006
-	ldr	r1, .L1247+4
-	ldr	r0, .L1247+8
+	bhi	.L1207
+	movw	r2, #2055
+	ldr	r1, .L1274+4
+	ldr	r0, .L1274+8
 	bl	sftl_printk
-.L1180:
-	ldr	r3, .L1247
-	ldr	r2, [r3, #2324]
-	lsl	r3, r5, #1
+.L1207:
+	ldr	r2, [r5, #2324]
+	lsl	r3, r6, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1181
-	mov	r0, r5
-	b	.L1243
-.L1165:
+	beq	.L1208
+	mov	r0, r6
+	b	.L1270
+.L1192:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	bne	.L1168
+	bne	.L1195
 	mov	r2, #1
 	sub	r1, fp, #52
-	mov	r0, r5
+	mov	r0, r6
 	bl	log2phys
-	b	.L1168
-.L1166:
-	ldr	r1, [r7, #8]
-	cmp	r5, r1
-	bne	.L1167
-	ldr	r1, [r7, #4]
-	ldr	r0, [r4, #4004]
+	b	.L1195
+.L1193:
+	ldr	r1, [r8, #8]
+	cmp	r6, r1
+	bne	.L1194
+	ldr	r1, [r8, #4]
+	ldr	r0, [r5, #4012]
 	str	r1, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1167
+	beq	.L1194
 	ldr	r1, [fp, #-48]
 	ldr	r0, [fp, #-44]
 	cmp	r1, r0
-	bne	.L1170
-.L1173:
+	bne	.L1197
+.L1200:
 	ldr	r1, [fp, #-52]
-	mov	r0, r5
+	mov	r0, r6
 	bl	FtlReUsePrevPpa
-	b	.L1167
-.L1170:
+	b	.L1194
+.L1197:
 	ldr	r0, [fp, #-52]
 	cmp	r1, r0
-	beq	.L1167
+	beq	.L1194
 	cmn	r1, #1
-	streq	r1, [r2, r6]
-	beq	.L1172
+	streq	r1, [r2, r7]
+	beq	.L1199
 	str	r1, [r3, #4]
 	mov	r2, #0
 	mov	r1, #1
 	mov	r0, r3
-	ldr	r7, [r3, #12]
+	ldr	r8, [r3, #12]
 	bl	FlashReadPages
-.L1172:
-	ldr	r2, [r4, #3832]
-	ldr	r2, [r2, r6]
+.L1199:
+	ldr	r2, [r5, #3836]
+	ldr	r2, [r2, r7]
 	cmn	r2, #1
-	beq	.L1173
-	ldr	r3, [r7, #4]
-	ldr	r0, [r4, #4004]
+	beq	.L1200
+	ldr	r3, [r8, #4]
+	ldr	r0, [r5, #4012]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1173
+	beq	.L1200
 	mov	r1, r3
 	ldr	r0, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1167
-	b	.L1173
-.L1164:
+	beq	.L1194
+	b	.L1200
+.L1191:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	beq	.L1175
+	beq	.L1202
 	mov	r2, #1
 	sub	r1, fp, #44
-	mov	r0, r5
+	mov	r0, r6
 	bl	log2phys
-	ldr	r6, [fp, #-48]
-	cmn	r6, #1
-	beq	.L1175
+	ldr	r7, [fp, #-48]
+	cmn	r7, #1
+	beq	.L1202
 	ldr	r3, [fp, #-52]
-	cmp	r6, r3
-	beq	.L1188
-	ubfx	r0, r6, #10, #16
+	cmp	r7, r3
+	beq	.L1215
+	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1247+12
+	ldr	r3, .L1274+16
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	beq	.L1179
+	beq	.L1206
 	ldrh	r2, [r3, #48]
 	cmp	r2, r0
-	beq	.L1179
+	beq	.L1206
 	ldrh	r3, [r3, #96]
 	cmp	r3, r0
-	bne	.L1175
-.L1179:
-	ldr	r0, [r4, #3832]
+	bne	.L1202
+.L1206:
+	ldr	r0, [r5, #3836]
 	mov	r2, #0
 	mov	r1, #1
-	str	r6, [r0, #4]
-	ldr	r7, [r0, #12]
+	str	r7, [r0, #4]
+	ldr	r8, [r0, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r5, #3836]
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L1175
-	ldr	r1, [r7, #4]
+	beq	.L1202
+	ldr	r1, [r8, #4]
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1175
+	bne	.L1202
 	mov	r2, #1
 	sub	r1, fp, #48
-	mov	r0, r5
+	mov	r0, r6
 	bl	log2phys
-	b	.L1175
-.L1181:
-	mov	r1, r5
-	ldr	r0, .L1247+16
+	b	.L1202
+.L1208:
+	mov	r1, r6
+	ldr	r0, .L1274+20
 	bl	sftl_printk
-	b	.L1158
-.L1160:
-	ldr	r3, [r4, #4012]
+	b	.L1185
+.L1187:
+	ldr	r3, [r5, #4020]
 	cmp	r3, #31
-	addls	r2, r4, r3, lsl #2
+	addls	r2, r5, r3, lsl #2
 	addls	r3, r3, #1
-	strls	r3, [r4, #4012]
-	strls	r5, [r2, #4016]
-	ldrh	r0, [r10]
+	strls	r3, [r5, #4020]
+	strls	r6, [r2, #4024]
+	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	ldr	r3, [r4, #4004]
+	ldr	r3, [r5, #4012]
 	cmn	r3, #1
 	ldreq	r3, [fp, #-56]
-	beq	.L1242
+	beq	.L1269
 	ldr	r2, [fp, #-56]
 	cmp	r2, r3
-	bcs	.L1158
+	bcs	.L1185
 	mov	r3, r2
-.L1242:
-	str	r3, [r4, #4004]
-	b	.L1158
-.L1159:
+.L1269:
+	str	r3, [r5, #4012]
+	b	.L1185
+.L1186:
 	ldrb	r3, [fp, #-68]	@ zero_extendqisi2
 	ldr	r2, [fp, #-68]
 	ldr	r1, [fp, #-60]
-	strb	r3, [r10, #6]
+	strb	r3, [r4, #6]
 	ldrh	r3, [fp, #-60]
-	strh	r3, [r10, #2]	@ movhi
-.L1246:
-	mov	r0, r10
+	strh	r3, [r4, #2]	@ movhi
+.L1273:
+	mov	r0, r4
 	bl	ftl_sb_update_avl_pages
-	b	.L1240
-.L1248:
+	b	.L1267
+.L1275:
 	.align	2
-.L1247:
+.L1274:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
+	.word	.LANCHOR0+4016
 	.word	.LANCHOR0+2348
-	.word	.LC103
+	.word	.LC106
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -8499,13 +8653,13 @@ FtlSuperblockPowerLostFix:
 	mvn	r3, #0
 	str	r3, [fp, #-36]
 	mov	r7, #0
-	ldr	r3, .L1260
+	ldr	r3, .L1287
 	movw	r1, #61589
 	mov	r4, r0
 	mov	r6, #7
-	ldr	r2, [r3, #3280]
+	ldr	r2, [r3, #3284]
 	mov	r8, r3
-	ldr	r5, [r3, #3284]
+	ldr	r5, [r3, #3288]
 	str	r2, [fp, #-44]
 	mvn	r2, #2
 	str	r5, [fp, #-40]
@@ -8515,18 +8669,18 @@ FtlSuperblockPowerLostFix:
 	ldrh	r2, [r0]
 	strh	r7, [r5]	@ movhi
 	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, [r3, #3280]
+	ldr	r2, [r3, #3284]
 	str	r1, [r2]
-	ldr	r1, .L1260+4
-	ldr	r2, [r3, #3280]
+	ldr	r1, .L1287+4
+	ldr	r2, [r3, #3284]
 	str	r1, [r2, #4]
-.L1250:
+.L1277:
 	subs	r6, r6, #1
-	beq	.L1252
+	beq	.L1279
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1251
-.L1252:
+	bne	.L1278
+.L1279:
 	ldrh	r3, [r4]
 	ldr	r1, [r8, #2324]
 	ldrh	r0, [r4, #4]
@@ -8541,12 +8695,12 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1251:
+.L1278:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	cmn	r0, #1
 	str	r0, [fp, #-48]
-	beq	.L1252
+	beq	.L1279
 	ldr	r3, [r8, #2544]
 	mov	r1, #1
 	sub	r0, fp, #52
@@ -8560,10 +8714,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1250
-.L1261:
+	b	.L1277
+.L1288:
 	.align	2
-.L1260:
+.L1287:
 	.word	.LANCHOR0
 	.word	305419896
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8579,71 +8733,71 @@ FtlLoadBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1294
-	ldr	r7, .L1294+4
-	ldr	r3, [r4, #3280]
-	ldr	r6, [r4, #3284]
-	str	r3, [r4, #3268]
-	str	r6, [r4, #3272]
+	ldr	r4, .L1321
+	ldr	r3, [r4, #3284]
+	add	r7, r4, #3264
+	ldr	r6, [r4, #3288]
+	str	r3, [r4, #3272]
+	str	r6, [r4, #3276]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1263:
+.L1290:
 	ldrh	r3, [r4, #98]
 	sub	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1266
+	ble	.L1293
 	lsl	r3, r5, #10
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
-	cmn	r3, #1
-	bne	.L1264
 	ldr	r3, [r4, #3264]
+	cmn	r3, #1
+	bne	.L1291
+	ldr	r3, [r4, #3268]
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	add	r3, r3, #1
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.L1264:
-	ldr	r3, [r4, #3260]
+.L1291:
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1265
+	beq	.L1292
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1265
+	bne	.L1292
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1266:
+.L1293:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1280
+	beq	.L1307
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1270
+	beq	.L1297
 	lsl	r3, r3, #10
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1294+4
-	str	r3, [r4, #3264]
+	ldr	r0, .L1321+4
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1270
+	beq	.L1297
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1270
+	bne	.L1297
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
@@ -8652,93 +8806,92 @@ FtlLoadBbt:
 	ldrhhi	r3, [r6, #8]
 	strhhi	r2, [r4, #152]	@ movhi
 	strhhi	r3, [r4, #156]	@ movhi
-.L1270:
-	ldr	r7, .L1294+4
+.L1297:
+	ldr	r7, .L1321+4
 	mov	r1, #1
 	ldrh	r0, [r4, #152]
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1272:
+.L1299:
 	cmp	r5, #0
-	bge	.L1275
+	bge	.L1302
 	mov	r2, #254
-	ldr	r1, .L1294+8
-	ldr	r0, .L1294+12
+	ldr	r1, .L1321+8
+	ldr	r0, .L1321+12
 	bl	sftl_printk
-.L1274:
+.L1301:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1277
+	beq	.L1304
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1277
+	beq	.L1304
 	ldrh	r3, [r4, #42]
 	lsr	r3, r3, #2
 	cmp	r0, r3
 	cmpcc	r2, r3
-	bcs	.L1277
+	bcs	.L1304
 	bl	FtlSysBlkNumInit
-.L1277:
-	ldr	r6, .L1294+16
+.L1304:
+	ldr	r6, .L1321+16
 	mov	r5, #0
-	ldr	r7, .L1294+20
-.L1278:
+	add	r7, r6, #3728
+.L1305:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1279
+	bcc	.L1306
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1265:
+.L1292:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1263
-.L1275:
+	b	.L1290
+.L1302:
 	ldrh	r3, [r4, #152]
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3264]
-	ldr	r3, [r4, #3280]
 	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1273
+	beq	.L1300
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1274
-.L1273:
+	beq	.L1301
+.L1300:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1272
-.L1279:
+	b	.L1299
+.L1306:
 	ldrh	r2, [r7]
-	ldr	r1, [r4, #3268]
+	ldr	r1, [r4, #3272]
 	ldr	r0, [r6, #4]!
 	lsl	r2, r2, #2
 	mla	r1, r5, r2, r1
 	add	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1278
-.L1280:
+	b	.L1305
+.L1307:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1295:
+.L1322:
 	.align	2
-.L1294:
+.L1321:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+443
 	.word	.LC1
 	.word	.LANCHOR0+176
-	.word	.LANCHOR0+3900
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
@@ -8754,102 +8907,102 @@ FtlMakeBbt:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r7, #0
-	ldr	r8, .L1315
+	ldr	r8, .L1342
 	bl	FtlBbtMemInit
 	bl	FtlLoadFactoryBbt
 	sub	r5, r8, #180
 	sub	r9, r8, #18
 	mov	r4, r5
-.L1297:
+.L1324:
 	ldrh	r3, [r5, #54]
 	cmp	r7, r3
-	bcc	.L1303
+	bcc	.L1330
 	mov	r0, #0
-.L1304:
+.L1331:
 	ldrh	r2, [r4, #114]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1305
+	bhi	.L1332
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1306:
+.L1333:
 	ldrh	r3, [r4, #164]
 	sub	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1310
+	ble	.L1337
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1307
+	beq	.L1334
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1308
+	beq	.L1335
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1307:
+.L1334:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1306
-.L1303:
+	b	.L1333
+.L1330:
 	ldrh	r3, [r9, #2]!
 	movw	r2, #65535
-	ldr	r0, [r5, #3280]
-	ldr	r10, [r5, #3284]
+	ldr	r0, [r5, #3284]
+	ldr	r10, [r5, #3288]
 	cmp	r3, r2
-	str	r0, [r5, #3268]
-	str	r10, [r5, #3272]
-	beq	.L1298
+	str	r0, [r5, #3272]
+	str	r10, [r5, #3276]
+	beq	.L1325
 	ldrh	ip, [r5, #98]
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1315+4
+	ldr	r0, .L1342+4
 	mla	ip, r7, ip, r3
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
-	str	r3, [r5, #3264]
+	str	r3, [r5, #3268]
 	bl	FlashReadPages
 	ldrh	r2, [r5, #98]
-	ldr	r1, [r5, #3268]
+	ldr	r1, [r5, #3272]
 	ldr	r0, [r8]
 	add	r2, r2, #7
 	asr	r2, r2, #3
 	bl	ftl_memcpy
 	ldr	ip, [fp, #-44]
-.L1299:
+.L1326:
 	uxth	r0, ip
 	add	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1297
-.L1298:
+	b	.L1324
+.L1325:
 	mov	r1, r7
 	bl	FlashGetBadBlockList
 	ldr	r1, [r8]
-	ldr	r0, [r5, #3268]
+	ldr	r0, [r5, #3272]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1301:
+.L1328:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1300:
+.L1327:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r7, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1301
+	beq	.L1328
 	mov	r1, #16
-	ldr	r0, [r4, #3284]
+	ldr	r0, [r4, #3288]
 	strh	r6, [r9]	@ movhi
 	bl	__memzero
 	mov	r1, #4096
-	ldr	r0, [r4, #3280]
+	ldr	r0, [r4, #3284]
 	bl	__memzero
-	ldr	r3, .L1315+8
+	ldr	r3, .L1342+8
 	strh	r3, [r10]	@ movhi
 	mov	r3, #0
 	str	r3, [r10, #4]
@@ -8858,47 +9011,47 @@ FtlMakeBbt:
 	strh	r3, [r10, #2]	@ movhi
 	ldrh	r3, [r9]
 	ldr	r1, [r8]
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	mla	ip, r7, ip, r3
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
-	str	r3, [r4, #3264]
-	ldr	r3, .L1315+12
+	str	r3, [r4, #3268]
+	ldr	r3, .L1342+12
 	ldrh	r2, [r3]
 	lsl	r2, r2, #2
 	bl	ftl_memcpy
 	mov	r2, #1
-	ldr	r0, .L1315+4
+	ldr	r0, .L1342+4
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	mov	r3, #1
-	ldr	r0, .L1315+4
+	ldr	r0, .L1342+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	ldr	ip, [fp, #-44]
 	cmn	r3, #1
-	bne	.L1299
+	bne	.L1326
 	uxth	r0, ip
 	bl	FtlBbmMapBadBlock
-	b	.L1300
-.L1305:
+	b	.L1327
+.L1332:
 	uxth	r0, r0
 	bl	FtlBbmMapBadBlock
 	mov	r0, r5
-	b	.L1304
-.L1308:
+	b	.L1331
+.L1335:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
 	strheq	r5, [r4, #152]	@ movhi
-	beq	.L1307
-.L1309:
+	beq	.L1334
+.L1336:
 	strh	r5, [r4, #156]	@ movhi
-.L1310:
+.L1337:
 	ldrh	r3, [r4, #152]
 	mov	r5, #0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	mov	r1, #1
 	str	r5, [r4, #160]
 	mov	r2, #2
@@ -8925,13 +9078,13 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1316:
+.L1343:
 	.align	2
-.L1315:
+.L1342:
 	.word	.LANCHOR0+180
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.word	-3872
-	.word	.LANCHOR0+3900
+	.word	.LANCHOR0+3904
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.align	2
 	.global	FtlVendorPartWrite
@@ -8947,27 +9100,27 @@ FtlVendorPartWrite:
 	sub	fp, ip, #4
 	sub	sp, sp, #100
 	mov	r7, r0
-	ldr	r4, .L1326
+	ldr	r4, .L1353
 	mov	r5, r1
 	str	r2, [fp, #-128]
 	add	r2, r0, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
 	mvnhi	r8, #0
-	bhi	.L1317
+	bhi	.L1344
 	ldrh	r6, [r4, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
 	lsl	r10, r6, #2
-.L1319:
+.L1346:
 	cmp	r5, #0
-	bne	.L1324
-.L1317:
+	bne	.L1351
+.L1344:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1324:
-	ldr	r3, [r4, #3884]
+.L1351:
+	ldr	r3, [r4, #3888]
 	mov	r0, r7
 	ldrh	r2, [r4, #58]
 	ldr	ip, [r3, r10]
@@ -8986,8 +9139,8 @@ FtlVendorPartWrite:
 	cmpne	r9, r2
 	movne	r1, #1
 	moveq	r1, #0
-	beq	.L1321
-	ldr	r2, [r4, #3848]
+	beq	.L1348
+	ldr	r2, [r4, #3852]
 	sub	r0, fp, #124
 	str	ip, [fp, #-120]
 	str	r2, [fp, #-116]
@@ -8996,10 +9149,10 @@ FtlVendorPartWrite:
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.L1322:
+.L1349:
 	ldr	r3, [fp, #-132]
 	lsl	ip, r9, #9
-	ldr	r0, [r4, #3848]
+	ldr	r0, [r4, #3852]
 	sub	r5, r5, r9
 	mov	r2, ip
 	ldr	r1, [fp, #-128]
@@ -9009,8 +9162,8 @@ FtlVendorPartWrite:
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
 	mov	r1, r6
-	ldr	r2, [r4, #3848]
-	ldr	r0, .L1326+4
+	ldr	r2, [r4, #3852]
+	ldr	r0, .L1353+4
 	add	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [fp, #-128]
@@ -9019,17 +9172,17 @@ FtlVendorPartWrite:
 	mvneq	r8, #0
 	add	r3, r3, ip
 	str	r3, [fp, #-128]
-	b	.L1319
-.L1321:
+	b	.L1346
+.L1348:
 	ldrh	r2, [r4, #110]
-	ldr	r0, [r4, #3848]
+	ldr	r0, [r4, #3852]
 	bl	ftl_memset
-	b	.L1322
-.L1327:
+	b	.L1349
+.L1354:
 	.align	2
-.L1326:
+.L1353:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3948
+	.word	.LANCHOR0+3956
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
@@ -9043,12 +9196,12 @@ Ftl_save_ext_data:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1330
-	ldr	r2, .L1330+4
+	ldr	r3, .L1357
+	ldr	r2, .L1357+4
 	ldr	r1, [r3, #2636]
 	cmp	r1, r2
 	ldmfdne	sp, {fp, sp, pc}
-	ldr	r2, .L1330+8
+	ldr	r2, .L1357+8
 	mov	r1, #1
 	mov	r0, #0
 	str	r2, [r3, #2640]
@@ -9076,15 +9229,15 @@ Ftl_save_ext_data:
 	str	r2, [r3, #2680]
 	ldr	r2, [r3, #2568]
 	str	r2, [r3, #2684]
-	ldr	r2, .L1330+12
+	ldr	r2, .L1357+12
 	bl	FtlVendorPartWrite
 	ldmfd	sp, {fp, sp, pc}
-.L1331:
+.L1358:
 	.align	2
-.L1330:
+.L1357:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177348
+	.word	1342177349
 	.word	.LANCHOR0+2636
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
@@ -9099,32 +9252,32 @@ FtlEctTblFlush:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1337
-	ldrh	r3, [r2, #-8]
+	ldr	r2, .L1364
+	ldrh	r3, [r2]
 	cmp	r3, #31
 	addls	r3, r3, #1
-	movhi	r2, #32
-	strhls	r3, [r2, #-8]	@ movhi
-	movls	r2, #1
+	movhi	r3, #32
+	strhls	r3, [r2]	@ movhi
+	movls	r3, #1
 	cmp	r0, #0
-	ldr	r3, .L1337+4
-	bne	.L1334
-	ldr	r1, [r3, #3860]
+	ldr	r2, .L1364+4
+	bne	.L1361
+	ldr	r1, [r2, #3864]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
-	add	r2, r2, r0
-	cmp	r1, r2
-	bcc	.L1335
-.L1334:
-	ldr	r2, [r3, #3860]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L1362
+.L1361:
+	ldr	r3, [r2, #3864]
 	mov	r0, #64
-	ldr	r1, [r2, #16]
-	str	r1, [r2, #20]
-	ldr	r1, .L1337+8
-	str	r1, [r2]
-	movw	r1, #3852
-	ldrh	r1, [r3, r1]
-	ldr	r2, [r3, #3860]
+	ldr	r1, [r3, #16]
+	str	r1, [r3, #20]
+	ldr	r1, .L1364+8
+	str	r1, [r3]
+	ldr	r3, .L1364+12
+	ldr	r2, [r2, #3864]
+	ldrh	r1, [r3]
 	lsl	r3, r1, #9
 	str	r3, [r2, #12]
 	ldr	r3, [r2, #8]
@@ -9134,15 +9287,16 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1335:
+.L1362:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1338:
+.L1365:
 	.align	2
-.L1337:
+.L1364:
 	.word	.LANCHOR3-4032
 	.word	.LANCHOR0
 	.word	1112818501
+	.word	.LANCHOR0+3856
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.align	2
 	.global	FtlVendorPartRead
@@ -9151,85 +9305,106 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 92
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #92
+	sub	sp, sp, #96
 	mov	r9, r2
-	ldr	r5, .L1348
-	mov	r7, r1
+	ldr	r3, .L1376
+	mov	r6, r1
 	add	r1, r0, r1
-	mov	r10, r0
-	ldrh	r2, [r5, #96]
+	mov	r7, r0
+	ldrh	r2, [r3, #96]
+	mov	r10, r3
 	cmp	r1, r2
 	mvnhi	r8, #0
-	bhi	.L1339
-	ldrh	r6, [r5, #108]
+	bhi	.L1366
+	ldrh	r5, [r3, #108]
 	mov	r8, #0
-	lsr	r6, r0, r6
-	lsl	r6, r6, #2
-.L1341:
-	cmp	r7, #0
-	bne	.L1346
-.L1339:
+	lsr	r5, r0, r5
+	lsl	r3, r5, #2
+	str	r3, [fp, #-128]
+.L1368:
+	cmp	r6, #0
+	bne	.L1374
+.L1366:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1346:
-	ldr	r2, [r5, #3884]
-	mov	r0, r10
-	ldrh	r4, [r5, #58]
-	ldr	ip, [r2, r6]
+.L1374:
+	ldr	r3, [fp, #-128]
+	mov	r0, r7
+	ldr	r2, [r10, #3888]
+	ldrh	r4, [r10, #58]
+	ldr	ip, [r2, r3]
 	mov	r1, r4
-	str	ip, [fp, #-128]
+	str	ip, [fp, #-136]
 	bl	__umodsi3
 	sub	r4, r4, r0
-	ldr	ip, [fp, #-128]
+	ldr	ip, [fp, #-136]
 	uxth	r4, r4
 	str	r0, [fp, #-132]
-	cmp	r7, r4
-	uxthcc	r4, r7
+	cmp	r6, r4
+	uxthcc	r4, r6
 	cmp	ip, #0
 	lsl	r3, r4, #9
-	str	r3, [fp, #-128]
-	beq	.L1343
-	ldr	r2, [r5, #3848]
-	sub	r3, fp, #104
+	str	r3, [fp, #-136]
+	beq	.L1370
+	ldr	r2, [r10, #3852]
 	sub	r0, fp, #124
-	str	r3, [fp, #-112]
 	str	ip, [fp, #-120]
+	str	ip, [fp, #-136]
 	str	r2, [fp, #-116]
+	sub	r2, fp, #104
+	str	r2, [fp, #-112]
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r1, [r5, #3848]
-	mov	r0, r9
-	ldr	r3, [fp, #-132]
 	ldr	r2, [fp, #-124]
-	add	r1, r1, r3, lsl #9
+	ldr	ip, [fp, #-136]
 	cmn	r2, #1
-	lsl	r2, r4, #9
+	ldr	r2, [r10, #3264]
 	mvneq	r8, #0
+	cmp	r2, #256
+	bne	.L1372
+	mov	r2, ip
+	mov	r1, r5
+	ldr	r0, .L1376+4
+	bl	sftl_printk
+	ldr	r2, [r10, #3852]
+	mov	r1, r5
+	ldr	r0, .L1376+8
+	bl	FtlMapWritePage
+.L1372:
+	ldr	r1, [r10, #3852]
+	lsl	r2, r4, #9
+	ldr	r3, [fp, #-132]
+	mov	r0, r9
+	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1345:
+.L1373:
 	ldr	r3, [fp, #-128]
-	sub	r7, r7, r4
-	add	r10, r10, r4
-	add	r6, r6, #4
-	add	r9, r9, r3
-	b	.L1341
-.L1343:
+	add	r5, r5, #1
+	sub	r6, r6, r4
+	add	r7, r7, r4
+	add	r9, r9, r4, lsl #9
+	add	r3, r3, #4
+	str	r3, [fp, #-128]
+	b	.L1368
+.L1370:
 	lsl	r2, r4, #9
 	mov	r1, ip
 	mov	r0, r9
 	bl	ftl_memset
-	b	.L1345
-.L1349:
+	b	.L1373
+.L1377:
 	.align	2
-.L1348:
+.L1376:
 	.word	.LANCHOR0
+	.word	.LC107
+	.word	.LANCHOR0+3956
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
@@ -9243,34 +9418,34 @@ FtlLoadEctTbl:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1352
-	movw	r5, #3852
+	ldr	r4, .L1380
 	mov	r0, #64
-	ldr	r2, [r4, #3860]
-	ldrh	r1, [r4, r5]
+	add	r5, r4, #3856
+	ldr	r2, [r4, #3864]
+	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-	ldr	r3, [r4, #3860]
+	ldr	r3, [r4, #3864]
 	ldr	r2, [r3]
-	ldr	r3, .L1352+4
+	ldr	r3, .L1380+4
 	cmp	r2, r3
-	beq	.L1351
-	ldr	r1, .L1352+8
-	ldr	r0, .L1352+12
+	beq	.L1379
+	ldr	r1, .L1380+8
+	ldr	r0, .L1380+12
 	bl	sftl_printk
-	ldrh	r2, [r4, r5]
+	ldrh	r2, [r5]
 	mov	r1, #0
-	ldr	r0, [r4, #3860]
+	ldr	r0, [r4, #3864]
 	lsl	r2, r2, #9
 	bl	ftl_memset
-.L1351:
+.L1379:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1353:
+.L1381:
 	.align	2
-.L1352:
+.L1380:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC104
+	.word	.LC108
 	.word	.LC71
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.align	2
@@ -9285,23 +9460,23 @@ Ftl_load_ext_data:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1357
+	ldr	r4, .L1385
 	mov	r1, #1
 	mov	r0, #0
-	ldr	r2, .L1357+4
+	ldr	r2, .L1385+4
 	bl	FtlVendorPartRead
-	ldr	r5, .L1357+8
+	ldr	r5, .L1385+8
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1355
+	beq	.L1383
 	mov	r1, #512
-	ldr	r0, .L1357+4
+	ldr	r0, .L1385+4
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1355:
+.L1383:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1356
+	bne	.L1384
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9326,7 +9501,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1356:
+.L1384:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9335,9 +9510,9 @@ Ftl_load_ext_data:
 	bl	__udivsi3
 	str	r0, [r4, #2556]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1358:
+.L1386:
 	.align	2
-.L1357:
+.L1385:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2636
 	.word	1179929683
@@ -9354,60 +9529,60 @@ FtlVpcTblFlush:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1371
+	ldr	r4, .L1396
 	mov	r6, #0
 	mov	r1, #255
-	ldr	r10, .L1371+4
-	ldr	r3, [r4, #3280]
+	ldr	r10, .L1396+4
+	ldr	r3, [r4, #3284]
 	add	r5, r4, #2576
-	ldr	r7, [r4, #3284]
-	sub	r8, r5, #308
-	add	r9, r5, #684
-	str	r3, [r4, #3268]
+	ldr	r8, [r4, #3288]
+	sub	r7, r5, #308
+	add	r9, r4, #3264
+	str	r3, [r4, #3272]
 	ldrh	r3, [r5]
-	str	r7, [r4, #3272]
-	str	r6, [r7, #12]
-	strh	r3, [r7, #2]	@ movhi
-	ldr	r3, .L1371+8
-	strh	r3, [r7]	@ movhi
+	str	r8, [r4, #3276]
+	str	r6, [r8, #12]
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r3, .L1396+8
+	strh	r3, [r8]	@ movhi
 	ldr	r3, [r4, #2584]
-	str	r6, [r7, #8]
+	str	r6, [r8, #8]
 	ldrh	r2, [r5, #-226]
-	str	r3, [r7, #4]
-	ldr	r3, .L1371+12
+	str	r3, [r8, #4]
+	ldr	r3, .L1396+12
 	str	r3, [r4, #2268]
-	ldr	r3, .L1371+16
+	ldr	r3, .L1396+16
 	str	r3, [r4, #2272]
 	ldrh	r3, [r5, #6]
-	strh	r3, [r8, #8]	@ movhi
+	strh	r3, [r7, #8]	@ movhi
 	ldrh	r3, [r4, #54]
 	strb	r3, [r4, #2278]
 	movw	r3, #2348
 	ldrh	r3, [r4, r3]
-	strh	r3, [r8, #14]	@ movhi
+	strh	r3, [r7, #14]	@ movhi
 	ldrb	r3, [r4, #2354]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
 	ldrh	r2, [r5, #-178]
-	strh	r3, [r8, #16]	@ movhi
+	strh	r3, [r7, #16]	@ movhi
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	strb	r3, [r4, #2279]
 	movw	r3, #2396
 	ldrh	r3, [r4, r3]
-	strh	r3, [r8, #18]	@ movhi
+	strh	r3, [r7, #18]	@ movhi
 	ldrb	r3, [r4, #2402]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
-	strh	r3, [r8, #20]	@ movhi
+	strh	r3, [r7, #20]	@ movhi
 	ldrb	r3, [r4, #2404]	@ zero_extendqisi2
 	strb	r3, [r4, #2280]
 	movw	r3, #2444
 	ldrh	r3, [r4, r3]
-	strh	r3, [r8, #22]	@ movhi
+	strh	r3, [r7, #22]	@ movhi
 	ldrh	r2, [r5, #-130]
 	ldrb	r3, [r4, #2450]	@ zero_extendqisi2
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	orr	r3, r3, r2, lsl #6
 	ldrh	r2, [r4, #110]
-	strh	r3, [r8, #24]	@ movhi
+	strh	r3, [r7, #24]	@ movhi
 	ldrb	r3, [r4, #2452]	@ zero_extendqisi2
 	strb	r3, [r4, #2281]
 	ldr	r3, [r4, #2548]
@@ -9416,20 +9591,26 @@ FtlVpcTblFlush:
 	str	r3, [r4, #2308]
 	ldr	r3, [r4, #2544]
 	str	r3, [r4, #2304]
+	movw	r3, #3202
+	ldrh	r3, [r4, r3]
+	strh	r3, [r7, #44]	@ movhi
+	movw	r3, #3204
+	ldrh	r3, [r4, r3]
+	strh	r3, [r7, #46]	@ movhi
 	bl	ftl_memset
-	mov	r1, r8
+	mov	r1, r7
 	mov	r2, #48
-	ldr	r0, [r4, #3268]
-	movw	r8, #65535
+	ldr	r0, [r4, #3272]
+	movw	r7, #65535
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	ldr	r1, [r4, #2324]
 	lsl	r2, r2, #1
 	add	r0, r0, #48
 	bl	ftl_memcpy
 	ldrh	r0, [r4, #40]
-	ldr	r3, [r4, #3268]
+	ldr	r3, [r4, #3272]
 	ldr	r1, [r4, #24]
 	lsr	r2, r0, #3
 	add	r0, r0, #24
@@ -9440,16 +9621,16 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.L1360:
-	ldr	r3, [r4, #3280]
+.L1388:
+	ldr	r3, [r4, #3284]
 	mov	r0, r9
 	ldrh	r2, [r5]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	r3, [r4, #3276]
 	ldrh	r3, [r5, #2]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	mov	r3, #1
 	mov	r2, r3
 	mov	r1, r3
@@ -9458,9 +9639,9 @@ FtlVpcTblFlush:
 	ldrh	r2, [r5, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1361
+	blt	.L1389
 	ldrh	r3, [r5]
-	ldrh	r8, [r5, #4]
+	ldrh	r7, [r5, #4]
 	strh	r3, [r5, #4]	@ movhi
 	mov	r3, #0
 	strh	r3, [r5, #2]	@ movhi
@@ -9471,29 +9652,29 @@ FtlVpcTblFlush:
 	str	r3, [r4, #2584]
 	str	r2, [r4, #2540]
 	lsl	r2, r0, #10
-	str	r2, [r4, #3264]
-	str	r3, [r7, #4]
+	str	r2, [r4, #3268]
+	str	r3, [r8, #4]
 	mov	r3, #1
-	strh	r0, [r7, #2]	@ movhi
+	strh	r0, [r8, #2]	@ movhi
 	mov	r2, r3
 	mov	r1, r3
 	mov	r0, r9
 	bl	FlashProgPages
-.L1361:
+.L1389:
 	ldrh	r3, [r5, #2]
-	ldr	r2, [r4, #3260]
+	ldr	r2, [r4, #3264]
 	add	r3, r3, #1
 	uxth	r3, r3
 	cmn	r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1362
+	bne	.L1390
 	cmp	r3, #1
-	bne	.L1363
-	movw	r2, #1124
+	bne	.L1391
+	movw	r2, #1169
 	mov	r1, r10
-	ldr	r0, .L1371+20
+	ldr	r0, .L1396+20
 	bl	sftl_printk
-.L1363:
+.L1391:
 	ldrh	r3, [r5, #2]
 	add	r6, r6, #1
 	uxth	r6, r6
@@ -9502,207 +9683,347 @@ FtlVpcTblFlush:
 	subeq	r3, r3, #1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1360
+	bls	.L1388
 	mov	r2, r6
-	ldr	r1, [r4, #3264]
-	ldr	r0, .L1371+24
+	ldr	r1, [r4, #3268]
+	ldr	r0, .L1396+24
 	bl	sftl_printk
-.L1366:
-	b	.L1366
-.L1362:
-	cmp	r3, #1
-	beq	.L1360
+.L1394:
+	b	.L1394
+.L1390:
+	cmp	r2, #256
+	cmpne	r3, #1
+	beq	.L1388
 	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1367
+	cmp	r7, r3
+	beq	.L1395
 	mov	r1, #1
-	mov	r0, r8
+	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.L1367:
+.L1395:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1372:
+.L1397:
 	.align	2
-.L1371:
+.L1396:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+454
 	.word	-3932
 	.word	1179929683
-	.word	1342177348
+	.word	1342177349
 	.word	.LC1
-	.word	.LC105
+	.word	.LC109
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	2
-	.global	FtlVpcCheckAndModify
+	.global	FtlSysFlush
 	.syntax unified
 	.arm
 	.fpu softvfp
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	@ args = 0, pretend = 0, frame = 4
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #4
-	mov	r5, #0
-	ldr	r4, .L1385
-	ldr	r1, .L1385+4
-	ldr	r0, .L1385+8
-	bl	sftl_printk
-	ldrh	r2, [r4, #42]
-	mov	r1, #0
-	ldr	r0, [r4, #3864]
-	lsl	r2, r2, #1
-	bl	ftl_memset
-.L1374:
-	ldr	r3, [r4, #2504]
-	cmp	r5, r3
-	bcc	.L1376
-	ldr	r9, .L1385+12
-	mov	r6, #0
-	ldr	r10, .L1385+16
-.L1377:
-	ldrh	r3, [r4, #40]
-	uxth	r5, r6
-	cmp	r3, r5
-	bhi	.L1381
-	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1376:
-	mov	r2, #0
-	sub	r1, fp, #44
-	mov	r0, r5
-	bl	log2phys
-	ldr	r0, [fp, #-44]
-	cmn	r0, #1
-	beq	.L1375
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r2, [r4, #3864]
-	lsl	r0, r0, #1
-	ldrh	r3, [r2, r0]
-	add	r3, r3, #1
-	strh	r3, [r2, r0]	@ movhi
-.L1375:
-	add	r5, r5, #1
-	b	.L1374
-.L1381:
-	uxth	r8, r6
-	ldr	r3, [r4, #2324]
-	movw	r1, #65535
-	lsl	r7, r8, #1
-	ldrh	r2, [r3, r7]
-	ldr	r3, [r4, #3864]
-	ldrh	r3, [r3, r7]
-	cmp	r2, r1
-	cmpne	r2, r3
-	beq	.L1379
-	mov	r1, r8
-	mov	r0, r9
-	bl	sftl_printk
-	ldrh	r3, [r10]
-	cmp	r3, r5
-	beq	.L1379
-	ldr	r3, .L1385+20
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L1379
-	ldrh	r3, [r3, #-48]
-	cmp	r3, r5
-	beq	.L1379
-	ldr	r3, [r4, #3864]
-	mov	r0, r8
-	ldrh	r2, [r3, r7]
-	ldr	r3, [r4, #2324]
-	strh	r2, [r3, r7]	@ movhi
-	bl	update_vpc_list
 	bl	l2p_flush
+	mov	r0, #1
+	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1379:
-	add	r6, r6, #1
-	b	.L1377
-.L1386:
-	.align	2
-.L1385:
-	.word	.LANCHOR0
-	.word	.LANCHOR1+469
-	.word	.LC95
-	.word	.LC106
-	.word	.LANCHOR0+2348
-	.word	.LANCHOR0+2444
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+	.size	FtlSysFlush, .-FtlSysFlush
 	.align	2
-	.global	allocate_new_data_superblock
+	.global	sftl_deinit
 	.syntax unified
 	.arm
 	.fpu softvfp
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
+	.type	sftl_deinit, %function
+sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, r5, r6, fp, ip, lr, pc}
+	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1397
-	mov	r6, r0
-	ldrh	r5, [r0]
-	ldrh	r3, [r4, #40]
-	cmp	r3, r5
-	bcs	.L1388
-	movw	r2, #2681
-	ldr	r1, .L1397+4
-	ldr	r0, .L1397+8
-	bl	sftl_printk
-.L1388:
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1389
-	ldr	r2, [r4, #2324]
-	lsl	r3, r5, #1
-	mov	r0, r5
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L1390
-	bl	INSERT_DATA_LIST
-.L1389:
-	mov	r3, #1
-	strb	r3, [r6, #8]
-	movw	r3, #3992
-	ldrh	r0, [r4, r3]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1391
-	cmp	r5, r0
-	bne	.L1392
-	ldr	r2, [r4, #2324]
+	ldr	r3, .L1401
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1400
+	bl	FtlSysFlush
+.L1400:
+	mov	r0, #0
+	ldmfd	sp, {fp, sp, pc}
+.L1402:
+	.align	2
+.L1401:
+	.word	.LANCHOR2
+	.size	sftl_deinit, .-sftl_deinit
+	.align	2
+	.global	FtlDiscard
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	sub	sp, sp, #8
+	add	r2, r0, r1
+	ldr	r6, .L1418
+	mov	r8, r0
+	mov	r5, r1
+	ldr	r3, [r6, #140]
+	cmp	r2, r3
+	mvnhi	r0, #0
+	bhi	.L1403
+	cmp	r1, #31
+	bhi	.L1405
+.L1410:
+	mov	r0, #0
+.L1403:
+	sub	sp, fp, #32
+	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
+.L1405:
+	ldrh	r4, [r6, #58]
+	mov	r1, r4
+	bl	__udivsi3
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	sub	r8, r8, r3
+	uxth	r8, r8
+	cmp	r8, #0
+	beq	.L1406
+	sub	r4, r4, r8
+	add	r7, r0, #1
+	cmp	r4, r5
+	movcs	r4, r5
+	uxth	r4, r4
+	sub	r5, r5, r4
+.L1406:
+	ldr	r4, .L1418+4
+	mvn	r3, #0
+	str	r3, [fp, #-36]
+.L1407:
+	ldrh	r3, [r6, #58]
+	cmp	r5, r3
+	bcs	.L1409
+	ldr	r3, .L1418+4
+	ldr	r2, [r3, #-4028]
+	cmp	r2, #32
+	bls	.L1410
+	mov	r4, #0
+	str	r4, [r3, #-4028]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1410
+.L1409:
+	mov	r2, #0
+	sub	r1, fp, #40
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [fp, #-40]
+	cmn	r3, #1
+	beq	.L1408
+	ldr	r3, [r4, #-4028]
+	mov	r2, #1
+	sub	r1, fp, #36
+	mov	r0, r7
+	add	r3, r3, #1
+	str	r3, [r4, #-4028]
+	ldr	r3, [r6, #2512]
+	add	r3, r3, #1
+	str	r3, [r6, #2512]
+	bl	log2phys
+	ldr	r0, [fp, #-40]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1408:
+	ldrh	r3, [r6, #58]
+	add	r7, r7, #1
+	sub	r5, r5, r3
+	b	.L1407
+.L1419:
+	.align	2
+.L1418:
+	.word	.LANCHOR0
+	.word	.LANCHOR3
+	.size	FtlDiscard, .-FtlDiscard
+	.align	2
+	.global	FtlVpcCheckAndModify
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+	@ args = 0, pretend = 0, frame = 4
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	sub	sp, sp, #4
+	mov	r5, #0
+	ldr	r4, .L1432
+	ldr	r1, .L1432+4
+	ldr	r0, .L1432+8
+	bl	sftl_printk
+	ldrh	r2, [r4, #42]
+	mov	r1, #0
+	ldr	r0, [r4, #3868]
+	lsl	r2, r2, #1
+	bl	ftl_memset
+.L1421:
+	ldr	r3, [r4, #2504]
+	cmp	r5, r3
+	bcc	.L1423
+	ldr	r9, .L1432+12
+	mov	r6, #0
+	ldr	r10, .L1432+16
+.L1424:
+	ldrh	r3, [r4, #40]
+	uxth	r5, r6
+	cmp	r3, r5
+	bhi	.L1428
+	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1423:
+	mov	r2, #0
+	sub	r1, fp, #44
+	mov	r0, r5
+	bl	log2phys
+	ldr	r0, [fp, #-44]
+	cmn	r0, #1
+	beq	.L1422
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r2, [r4, #3868]
+	lsl	r0, r0, #1
+	ldrh	r3, [r2, r0]
+	add	r3, r3, #1
+	strh	r3, [r2, r0]	@ movhi
+.L1422:
+	add	r5, r5, #1
+	b	.L1421
+.L1428:
+	uxth	r8, r6
+	ldr	r3, [r4, #2324]
+	movw	r1, #65535
+	lsl	r7, r8, #1
+	ldrh	r2, [r3, r7]
+	ldr	r3, [r4, #3868]
+	ldrh	r3, [r3, r7]
+	cmp	r2, r1
+	cmpne	r2, r3
+	beq	.L1426
+	mov	r1, r8
+	mov	r0, r9
+	bl	sftl_printk
+	ldrh	r3, [r10]
+	cmp	r3, r5
+	beq	.L1426
+	ldr	r3, .L1432+20
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L1426
+	ldrh	r3, [r3, #-48]
+	cmp	r3, r5
+	beq	.L1426
+	ldr	r3, [r4, #3868]
+	mov	r0, r8
+	ldrh	r2, [r3, r7]
+	ldr	r3, [r4, #2324]
+	strh	r2, [r3, r7]	@ movhi
+	bl	update_vpc_list
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1426:
+	add	r6, r6, #1
+	b	.L1424
+.L1433:
+	.align	2
+.L1432:
+	.word	.LANCHOR0
+	.word	.LANCHOR1+469
+	.word	.LC97
+	.word	.LC110
+	.word	.LANCHOR0+2348
+	.word	.LANCHOR0+2444
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.align	2
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.arm
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	mov	ip, sp
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+	sub	fp, ip, #4
+	ldr	r5, .L1444
+	mov	r7, r0
+	ldrh	r4, [r0]
+	ldrh	r3, [r5, #40]
+	cmp	r3, r4
+	bcs	.L1435
+	movw	r2, #2750
+	ldr	r1, .L1444+4
+	ldr	r0, .L1444+8
+	bl	sftl_printk
+.L1435:
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L1436
+	ldr	r2, [r5, #2324]
+	lsl	r3, r4, #1
+	mov	r0, r4
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L1437
+	bl	INSERT_DATA_LIST
+.L1436:
+	mov	r3, #1
+	movw	r2, #65535
+	strb	r3, [r7, #8]
+	ldr	r3, .L1444+12
+	ldrh	r0, [r3]
+	mov	r6, r3
+	cmp	r0, r2
+	beq	.L1438
+	cmp	r4, r0
+	bne	.L1439
+	ldr	r2, [r5, #2324]
 	lsl	r3, r0, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1393
-.L1392:
+	beq	.L1440
+.L1439:
 	bl	update_vpc_list
-.L1393:
-	mvn	r2, #0
-	movw	r3, #3992
-	strh	r2, [r4, r3]	@ movhi
-.L1391:
-	mov	r0, r6
+.L1440:
+	mvn	r3, #0
+	strh	r3, [r6]	@ movhi
+.L1438:
+	mov	r0, r7
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
 	mov	r0, #0
-	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1390:
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1437:
 	bl	INSERT_FREE_LIST
-	b	.L1389
-.L1398:
+	b	.L1436
+.L1445:
 	.align	2
-.L1397:
+.L1444:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
+	.word	.LANCHOR0+4000
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
@@ -9718,26 +10039,26 @@ FtlProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r7, #0
-	ldr	r6, .L1413
+	ldr	r6, .L1460
 	mov	r4, r3
-	ldr	r10, .L1413+4
+	ldr	r10, .L1460+4
 	mov	r2, #0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r5, r0
 	mov	r9, r1
 	bl	FlashProgPages
-.L1400:
+.L1447:
 	cmp	r7, r9
-	beq	.L1407
+	beq	.L1454
 	mov	r8, #0
-	b	.L1408
-.L1403:
+	b	.L1455
+.L1450:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1401
+	bne	.L1448
 	ldr	r1, [r6, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r4, #4]
@@ -9748,13 +10069,13 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1401:
+.L1448:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1402
+	bne	.L1449
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1402:
+.L1449:
 	ldr	r3, [r6, #2732]
 	add	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -9770,19 +10091,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1408:
+.L1455:
 	ldr	r3, [r5]
 	cmn	r3, #1
-	beq	.L1403
+	beq	.L1450
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1404
-	movw	r2, #933
+	bcc	.L1451
+	mov	r2, #936
 	mov	r1, r10
-	ldr	r0, .L1413+8
+	ldr	r0, .L1460+8
 	bl	sftl_printk
-.L1404:
+.L1451:
 	ldr	r3, [r5, #4]
 	sub	r1, fp, #40
 	mov	r2, #1
@@ -9797,216 +10118,43 @@ FtlProgPages:
 	ldr	r3, [fp, #-48]
 	mov	r8, r0
 	cmn	r3, #1
-	beq	.L1405
+	beq	.L1452
 	ldr	r2, [r6, #2324]
 	lsl	r3, r0, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	bne	.L1406
+	bne	.L1453
 	mov	r1, r0
-	ldr	r0, .L1413+12
+	ldr	r0, .L1460+12
 	bl	sftl_printk
-.L1406:
+.L1453:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1405:
+.L1452:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L1400
-.L1407:
+	b	.L1447
+.L1454:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1399
-	mov	r2, #948
-	ldr	r1, .L1413+4
-	ldr	r0, .L1413+8
+	bcc	.L1446
+	movw	r2, #951
+	ldr	r1, .L1460+4
+	ldr	r0, .L1460+8
 	bl	sftl_printk
-.L1399:
+.L1446:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1414:
+.L1461:
 	.align	2
-.L1413:
+.L1460:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+519
 	.word	.LC1
-	.word	.LC107
+	.word	.LC111
 	.size	FtlProgPages, .-FtlProgPages
 	.align	2
-	.global	FtlCacheWriteBack
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	mov	ip, sp
-	push	{r4, fp, ip, lr, pc}
-	sub	fp, ip, #4
-	ldr	r4, .L1420
-	ldr	r0, [r4, #3988]
-	cmp	r0, #0
-	beq	.L1416
-	ldr	r3, .L1420+4
-	mov	r2, #0
-	mov	r1, #1
-	ldr	r3, [r3, #-4036]
-	bl	FtlProgPages
-	mov	r3, #0
-	str	r3, [r4, #3988]
-.L1416:
-	mov	r0, #0
-	ldmfd	sp, {r4, fp, sp, pc}
-.L1421:
-	.align	2
-.L1420:
-	.word	.LANCHOR0
-	.word	.LANCHOR3
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.align	2
-	.global	FtlSysFlush
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	mov	ip, sp
-	push	{fp, ip, lr, pc}
-	sub	fp, ip, #4
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-	.size	FtlSysFlush, .-FtlSysFlush
-	.align	2
-	.global	sftl_deinit
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	sftl_deinit, %function
-sftl_deinit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	mov	ip, sp
-	push	{fp, ip, lr, pc}
-	sub	fp, ip, #4
-	ldr	r3, .L1425
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L1424
-	bl	FtlSysFlush
-.L1424:
-	mov	r0, #0
-	ldmfd	sp, {fp, sp, pc}
-.L1426:
-	.align	2
-.L1425:
-	.word	.LANCHOR2
-	.size	sftl_deinit, .-sftl_deinit
-	.align	2
-	.global	FtlDiscard
-	.syntax unified
-	.arm
-	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 1, uses_anonymous_args = 0
-	mov	ip, sp
-	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
-	sub	fp, ip, #4
-	sub	sp, sp, #8
-	add	r2, r0, r1
-	ldr	r6, .L1442
-	mov	r7, r0
-	mov	r5, r1
-	ldr	r3, [r6, #140]
-	cmp	r2, r3
-	mvnhi	r0, #0
-	bhi	.L1427
-	cmp	r1, #31
-	bhi	.L1429
-.L1434:
-	mov	r0, #0
-.L1427:
-	sub	sp, fp, #32
-	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1429:
-	bl	FtlCacheWriteBack
-	ldrh	r4, [r6, #58]
-	mov	r0, r7
-	mov	r1, r4
-	bl	__udivsi3
-	smulbb	r3, r0, r4
-	mov	r8, r0
-	sub	r7, r7, r3
-	uxth	r7, r7
-	cmp	r7, #0
-	beq	.L1430
-	sub	r4, r4, r7
-	add	r8, r0, #1
-	cmp	r4, r5
-	movcs	r4, r5
-	uxth	r4, r4
-	sub	r5, r5, r4
-.L1430:
-	ldr	r4, .L1442+4
-	mvn	r3, #0
-	str	r3, [fp, #-36]
-.L1431:
-	ldrh	r3, [r6, #58]
-	cmp	r5, r3
-	bcs	.L1433
-	ldr	r3, .L1442+4
-	ldr	r2, [r3, #-4032]
-	cmp	r2, #32
-	bls	.L1434
-	mov	r4, #0
-	str	r4, [r3, #-4032]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1434
-.L1433:
-	mov	r2, #0
-	sub	r1, fp, #40
-	mov	r0, r8
-	bl	log2phys
-	ldr	r3, [fp, #-40]
-	cmn	r3, #1
-	beq	.L1432
-	ldr	r3, [r4, #-4032]
-	mov	r2, #1
-	sub	r1, fp, #36
-	mov	r0, r8
-	add	r3, r3, #1
-	str	r3, [r4, #-4032]
-	ldr	r3, [r6, #2512]
-	add	r3, r3, #1
-	str	r3, [r6, #2512]
-	bl	log2phys
-	ldr	r0, [fp, #-40]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1432:
-	ldrh	r3, [r6, #58]
-	add	r8, r8, #1
-	sub	r5, r5, r3
-	b	.L1431
-.L1443:
-	.align	2
-.L1442:
-	.word	.LANCHOR0
-	.word	.LANCHOR3
-	.size	FtlDiscard, .-FtlDiscard
-	.align	2
 	.global	FtlGcFreeTempBlock
 	.syntax unified
 	.arm
@@ -10020,51 +10168,51 @@ FtlGcFreeTempBlock:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	movw	r3, #2444
-	ldr	r4, .L1470
+	ldr	r4, .L1488
 	movw	r2, #65535
 	ldrh	r5, [r4, r3]
 	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1445
-.L1455:
+	bne	.L1463
+.L1473:
 	mov	r3, #0
-	str	r3, [r4, #4000]
+	str	r3, [r4, #4008]
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1468
-.L1446:
+	bne	.L1486
+.L1464:
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1445:
+.L1463:
 	cmp	r0, #0
-	beq	.L1448
-	ldr	r3, .L1470+4
+	beq	.L1466
+	ldr	r3, .L1488+4
 	ldrh	r0, [r3, #4]
 	cmp	r0, r2
-	beq	.L1449
-.L1450:
+	beq	.L1467
+.L1468:
 	mov	r1, #2
-.L1448:
-	ldr	r0, .L1470+8
+.L1466:
+	ldr	r0, .L1488+8
 	bl	FtlGcScanTempBlk
 	cmn	r0, #1
 	str	r0, [fp, #-44]
-	beq	.L1451
+	beq	.L1469
 	ldr	r2, [r4, #2328]
 	lsl	r5, r5, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #4
-	bls	.L1452
+	bls	.L1470
 	sub	r3, r3, #5
 	mov	r0, #1
 	strh	r3, [r2, r5]	@ movhi
 	bl	FtlEctTblFlush
-.L1452:
-	ldr	r3, [r4, #4000]
+.L1470:
+	ldr	r3, [r4, #4008]
 	cmp	r3, #0
-	bne	.L1453
+	bne	.L1471
 	ldr	r3, [r4, #2732]
 	ldr	r0, [fp, #-44]
 	add	r3, r3, #1
@@ -10072,48 +10220,47 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1453:
+.L1471:
 	mov	r3, #0
-	str	r3, [r4, #4000]
-.L1464:
+	str	r3, [r4, #4008]
+.L1482:
 	mov	r0, #1
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1449:
+.L1467:
 	mov	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #17
-	bhi	.L1450
-	b	.L1448
-.L1451:
-	ldr	r3, .L1470+4
+	bhi	.L1468
+	b	.L1466
+.L1469:
+	ldr	r3, .L1488+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1464
-	b	.L1455
-.L1468:
-	bl	FtlCacheWriteBack
+	bne	.L1482
+	b	.L1473
+.L1486:
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
-	ldr	r6, .L1470+12
+	ldr	r6, .L1488+12
 	mul	r3, r3, r1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	beq	.L1456
+	beq	.L1474
 	mov	r2, #162
-	ldr	r1, .L1470+16
-	ldr	r0, .L1470+20
+	ldr	r1, .L1488+16
+	ldr	r0, .L1488+20
 	bl	sftl_printk
-.L1456:
+.L1474:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	movw	r3, #2444
 	ldrh	r0, [r4, #102]
 	mov	r5, #0
 	ldrh	r3, [r4, r3]
 	ldr	r1, [r4, #2324]
-	ldr	r10, .L1470+20
+	ldr	r10, .L1488+20
 	smulbb	r2, r2, r0
 	lsl	r3, r3, #1
 	strh	r2, [r1, r3]	@ movhi
@@ -10121,11 +10268,11 @@ FtlGcFreeTempBlock:
 	ldrh	r3, [r6]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1457:
+.L1475:
 	ldrh	r2, [r6]
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L1461
+	bhi	.L1479
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2444
@@ -10135,9 +10282,9 @@ FtlGcFreeTempBlock:
 	lsl	r2, r0, #1
 	ldrh	r2, [r1, r2]
 	cmp	r2, #0
-	beq	.L1462
+	beq	.L1480
 	bl	INSERT_DATA_LIST
-.L1463:
+.L1481:
 	mvn	r7, #0
 	movw	r3, #3192
 	strh	r7, [r4, r5]	@ movhi
@@ -10157,8 +10304,8 @@ FtlGcFreeTempBlock:
 	strhgt	r7, [r4, r3]	@ movhi
 	movwgt	r3, #3148
 	strhgt	r2, [r4, r3]	@ movhi
-	b	.L1446
-.L1461:
+	b	.L1464
+.L1479:
 	uxth	r3, r5
 	mov	r7, #12
 	ldr	r8, [r4, #3196]
@@ -10167,12 +10314,12 @@ FtlGcFreeTempBlock:
 	add	r9, r8, r7
 	ldr	r1, [r9, #8]
 	cmp	r1, r2
-	bcc	.L1458
+	bcc	.L1476
 	mov	r2, #168
-	ldr	r1, .L1470+16
+	ldr	r1, .L1488+16
 	mov	r0, r10
 	bl	sftl_printk
-.L1458:
+.L1476:
 	mov	r2, #0
 	sub	r1, fp, #44
 	ldr	r0, [r9, #8]
@@ -10180,7 +10327,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1459
+	bne	.L1477
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r2, #1
@@ -10189,24 +10336,24 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r9, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1469:
+.L1487:
 	bl	decrement_vpc_count
-.L1460:
+.L1478:
 	add	r5, r5, #1
-	b	.L1457
-.L1459:
+	b	.L1475
+.L1477:
 	ldr	r3, [r9, #4]
 	cmp	r2, r3
-	beq	.L1460
-	ldr	r3, .L1470+8
+	beq	.L1478
+	ldr	r3, .L1488+8
 	ldrh	r0, [r3]
-	b	.L1469
-.L1462:
+	b	.L1487
+.L1480:
 	bl	INSERT_FREE_LIST
-	b	.L1463
-.L1471:
+	b	.L1481
+.L1489:
 	.align	2
-.L1470:
+.L1488:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10226,8 +10373,8 @@ FtlGcPageRecovery:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1474
-	ldr	r5, .L1474+4
+	ldr	r4, .L1492
+	ldr	r5, .L1492+4
 	ldrh	r1, [r4, #102]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
@@ -10235,18 +10382,19 @@ FtlGcPageRecovery:
 	ldrh	r3, [r4, #102]
 	cmp	r2, r3
 	ldmfdcc	sp, {r4, r5, fp, sp, pc}
-	add	r0, r4, #3904
+	ldr	r0, .L1492+8
 	bl	FtlMapBlkWriteDump_data
 	mov	r0, #0
 	bl	FtlGcFreeTempBlock
 	mov	r3, #0
-	str	r3, [r4, #4000]
+	str	r3, [r4, #4008]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1475:
+.L1493:
 	.align	2
-.L1474:
+.L1492:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
+	.word	.LANCHOR0+3908
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.align	2
 	.global	FtlPowerLostRecovery
@@ -10260,10 +10408,10 @@ FtlPowerLostRecovery:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1477
+	ldr	r4, .L1495
 	mov	r6, #0
 	add	r5, r4, #2336
-	str	r6, [r4, #4012]
+	str	r6, [r4, #4020]
 	add	r5, r5, #12
 	add	r4, r4, #2384
 	mov	r0, r5
@@ -10280,9 +10428,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1478:
+.L1496:
 	.align	2
-.L1477:
+.L1495:
 	.word	.LANCHOR0
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	2
@@ -10297,22 +10445,22 @@ Ftl_gc_temp_data_write_back:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1486
+	ldr	r4, .L1504
 	mov	r3, #0
 	mov	r5, #0
 	mov	r6, #20
 	mov	r2, r3
 	ldr	r1, [r4, #3164]
-	ldr	r0, [r4, #3836]
+	ldr	r0, [r4, #3840]
 	bl	FlashProgPages
-.L1480:
+.L1498:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1483
-	ldr	r0, [r4, #3836]
+	bhi	.L1501
+	ldr	r0, [r4, #3840]
 	bl	FtlGcBufFree
-	ldr	r3, .L1486+4
+	ldr	r3, .L1504+4
 	mov	r0, #0
 	str	r0, [r4, #3164]
 	ldrh	r3, [r3, #4]
@@ -10320,15 +10468,15 @@ Ftl_gc_temp_data_write_back:
 	ldmfdne	sp, {r4, r5, r6, fp, sp, pc}
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1485
-.L1483:
+	b	.L1503
+.L1501:
 	mul	r3, r6, r3
-	ldr	r2, [r4, #3836]
+	ldr	r2, [r4, #3840]
 	add	r5, r5, #1
 	ldr	r0, [r2, r3]
 	add	r1, r2, r3
 	cmn	r0, #1
-	bne	.L1481
+	bne	.L1499
 	movw	r1, #2444
 	ldr	ip, [r4, #2324]
 	ldrh	r2, [r4, r1]
@@ -10339,26 +10487,26 @@ Ftl_gc_temp_data_write_back:
 	strh	r0, [r4, r1]	@ movhi
 	add	r2, r2, #1
 	str	r2, [r4, #2732]
-	ldr	r2, [r4, #3836]
+	ldr	r2, [r4, #3840]
 	add	r3, r2, r3
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1485:
+.L1503:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1481:
+.L1499:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1480
-.L1487:
+	b	.L1498
+.L1505:
 	.align	2
-.L1486:
+.L1504:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10374,39 +10522,38 @@ Ftl_get_new_temp_ppa:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1491
+	ldr	r4, .L1509
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1489
-	ldr	r3, .L1491+4
+	beq	.L1507
+	ldr	r3, .L1509+4
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L1490
-.L1489:
-	bl	FtlCacheWriteBack
+	bne	.L1508
+.L1507:
 	mov	r0, #0
 	mov	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1491+4
+	ldr	r0, .L1509+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	movw	r3, #3192
 	strh	r5, [r4, r3]	@ movhi
-	ldr	r3, .L1491+8
+	ldr	r3, .L1509+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1490:
-	ldr	r0, .L1491+4
+.L1508:
+	ldr	r0, .L1509+4
 	bl	get_new_active_ppa
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1492:
+.L1510:
 	.align	2
-.L1491:
+.L1509:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.word	.LANCHOR0+3200
@@ -10425,28 +10572,28 @@ rk_ftl_garbage_collect:
 	sub	fp, ip, #4
 	sub	sp, sp, #36
 	mov	r6, r0
-	ldr	r3, .L1606
-	ldr	r0, [r3, #3820]
+	ldr	r3, .L1623
+	ldr	r0, [r3, #3824]
 	mov	r5, r3
 	cmp	r0, #0
 	movne	r0, #0
-	bne	.L1493
+	bne	.L1511
 	add	r2, r3, #2336
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L1493
-	ldr	r2, .L1606+4
+	bls	.L1511
+	ldr	r2, .L1623+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1495
-.L1498:
-	movw	r3, #3204
-	movw	r0, #65535
-	ldrh	r1, [r5, r3]
-	cmp	r1, r0
-	bne	.L1496
-.L1497:
+	bne	.L1513
+.L1516:
+	movw	ip, #3204
+	movw	r2, #65535
+	ldrh	r7, [r5, ip]
+	cmp	r7, r2
+	bne	.L1514
+.L1515:
 	ldr	r3, [r5, #3152]
 	movw	r2, #2588
 	ldrh	r2, [r5, r2]
@@ -10455,16 +10602,16 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r6, lsl #7
 	cmp	r2, r4
 	str	r3, [r5, #3152]
-	bne	.L1499
+	bne	.L1517
 	movw	r1, #2444
 	ldrh	r4, [r5, r1]
 	cmp	r4, r2
 	movne	r4, r2
-	bne	.L1499
+	bne	.L1517
 	movw	r2, #3202
 	ldrh	r7, [r5, r2]
 	cmp	r7, r4
-	bne	.L1499
+	bne	.L1517
 	movw	r10, #2344
 	ldrh	r2, [r5, r10]
 	cmp	r2, #24
@@ -10472,42 +10619,42 @@ rk_ftl_garbage_collect:
 	movcs	r2, #1024
 	cmp	r3, r2
 	movls	r4, r7
-	bls	.L1499
-	ldr	r3, .L1606+8
+	bls	.L1517
+	ldr	r3, .L1623+8
 	mov	r9, #0
 	str	r9, [r5, #3152]
-	strh	r9, [r3, #-12]	@ movhi
+	strh	r9, [r3, #-8]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r7
 	mov	r4, r0
 	movne	r7, r0
-	bne	.L1501
+	bne	.L1519
 	movw	r8, #3150
 	ldrh	r2, [r5, r10]
 	ldrh	r3, [r5, r8]
 	cmp	r2, r3
-	bcs	.L1502
+	bcs	.L1520
 	mov	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r4
-	beq	.L1504
+	beq	.L1522
 	mov	r0, r3
 	ldr	r3, [r5, #2324]
 	lsl	r0, r0, #1
 	ldrh	r3, [r3, r0]
 	cmp	r3, #7
-	bhi	.L1505
+	bhi	.L1523
 	mov	r0, r9
 	bl	List_get_gc_head_node
 	uxth	r7, r0
 	mov	r3, #128
 	strh	r3, [r5, r8]	@ movhi
 	cmp	r7, r4
-	bne	.L1501
-.L1504:
+	bne	.L1519
+.L1522:
 	bl	FtlGcReFreshBadBlk
-.L1499:
+.L1517:
 	movw	r2, #65535
 	sub	r3, r4, r2
 	clz	r3, r3
@@ -10516,86 +10663,96 @@ rk_ftl_garbage_collect:
 	movne	r6, #0
 	andeq	r6, r3, #1
 	cmp	r6, #0
-	beq	.L1507
+	beq	.L1525
 	movw	r3, #2344
 	ldrh	r3, [r5, r3]
 	cmp	r3, #24
 	movhi	r6, #1
-	bhi	.L1508
+	bhi	.L1526
 	ldrh	r6, [r5, #102]
 	cmp	r3, #16
 	lsrhi	r6, r6, #5
-	bhi	.L1508
+	bhi	.L1526
 	cmp	r3, #12
 	lsrhi	r6, r6, #4
-	bhi	.L1508
+	bhi	.L1526
 	cmp	r3, #8
 	lsrhi	r6, r6, #2
-.L1508:
+.L1526:
 	movw	r2, #3148
 	ldrh	r1, [r5, r2]
 	cmp	r1, r3
-	bcs	.L1512
+	bcs	.L1530
 	movw	r3, #2444
 	movw	r1, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, r1
-	bne	.L1513
+	bne	.L1531
 	movw	r1, #3202
 	ldrh	r1, [r5, r1]
 	cmp	r1, r3
-	bne	.L1513
-	ldr	r3, .L1606+8
-	ldrh	r0, [r3, #-12]
+	bne	.L1531
+	ldr	r3, .L1623+8
+	ldrh	r0, [r3, #-8]
 	cmp	r0, #0
-	bne	.L1514
+	bne	.L1532
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1599
-.L1514:
+	bcs	.L1616
+.L1532:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1599:
+.L1616:
 	strh	r3, [r5, r2]	@ movhi
 	mov	r3, #0
 	str	r3, [r5, #3160]
-.L1493:
+.L1511:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1495:
+.L1513:
 	movw	r1, #2444
 	ldrh	r3, [r3, r1]
 	cmp	r3, r2
-	beq	.L1498
+	beq	.L1516
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1498
+	beq	.L1516
 	mov	r0, #1
-	b	.L1493
-.L1496:
-	movw	r2, #3202
-	ldrh	ip, [r5, r2]
-	cmp	ip, r0
-	strheq	r1, [r5, r2]	@ movhi
-	mvneq	r2, #0
-	strheq	r2, [r5, r3]	@ movhi
-	b	.L1497
-.L1505:
+	b	.L1511
+.L1514:
+	movw	r4, #3202
+	ldrh	r3, [r5, r4]
+	cmp	r3, r2
+	bne	.L1515
+	movw	r1, #3206
+	ldrh	lr, [r5, r1]
+	cmp	lr, r3
+	beq	.L1515
+	movw	r2, #3208
+	ldrh	r0, [r5, r2]
+	cmp	r0, r3
+	mvnne	r3, #0
+	strhne	r7, [r5, r4]	@ movhi
+	strhne	lr, [r5, ip]	@ movhi
+	strhne	r0, [r5, r1]	@ movhi
+	strhne	r3, [r5, r2]	@ movhi
+	b	.L1515
+.L1523:
 	mov	r3, #64
-.L1598:
+.L1615:
 	strh	r3, [r5, r8]	@ movhi
-	b	.L1504
-.L1502:
+	b	.L1522
+.L1520:
 	mov	r3, #80
-	b	.L1598
-.L1501:
+	b	.L1615
+.L1519:
 	movw	r0, #3148
 	ldr	r3, [r5, #2324]
 	ldrh	r0, [r5, r0]
@@ -10607,38 +10764,38 @@ rk_ftl_garbage_collect:
 	str	r0, [sp, #4]
 	ldr	r0, [r5, #2328]
 	ldrh	r1, [r0, r1]
-	ldr	r0, .L1606+12
+	ldr	r0, .L1623+12
 	str	r1, [sp]
 	mov	r1, r7
 	bl	sftl_printk
-	b	.L1504
-.L1513:
+	b	.L1522
+.L1531:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
 	strh	r3, [r5, r2]	@ movhi
-.L1512:
-	movw	r3, #3206
+.L1530:
+	movw	r3, #3210
 	movw	r4, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
 	addne	r6, r6, #32
 	uxthne	r6, r6
-.L1518:
+.L1536:
 	movw	r3, #2588
 	ldrh	r2, [r5, r3]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1527
+	bne	.L1545
 	cmp	r4, r2
 	strhne	r4, [r5, r3]	@ movhi
-	bne	.L1529
+	bne	.L1547
 	movw	r2, #3202
 	ldrh	r3, [r5, r2]
 	cmp	r3, r4
-	beq	.L1529
+	beq	.L1547
 	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
@@ -10651,113 +10808,113 @@ rk_ftl_garbage_collect:
 	strh	r1, [r5, r2]	@ movhi
 	mvn	r2, #0
 	strh	r2, [r5, r3]	@ movhi
-.L1529:
+.L1547:
 	movw	r7, #2588
 	mov	r3, #0
 	ldrh	r0, [r5, r7]
 	strb	r3, [r5, #2596]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1527
+	beq	.L1545
 	bl	IsBlkInGcList
 	cmp	r0, #0
-	ldr	r8, .L1606+16
+	ldr	r8, .L1623+16
 	mvnne	r3, #0
 	strhne	r3, [r5, r7]	@ movhi
 	movw	r7, #2588
 	ldrh	r2, [r5, r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1527
+	beq	.L1545
 	mov	r0, r8
 	bl	make_superblock
-	ldr	r2, .L1606+8
+	ldr	r2, .L1623+8
 	mov	r3, #0
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
-	strh	r3, [r2, #-10]	@ movhi
+	strh	r3, [r2, #-6]	@ movhi
 	ldrh	r3, [r5, r7]
 	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
-	strh	r3, [r2, #-8]	@ movhi
-.L1527:
+	strh	r3, [r2, #-4]	@ movhi
+.L1545:
 	movw	r3, #2588
 	movw	r2, #2348
 	ldrh	r3, [r5, r3]
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1533
+	beq	.L1551
 	movw	r2, #2396
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	ldrne	r7, .L1606
+	ldrne	r7, .L1623
 	movne	r5, r7
-	bne	.L1534
-.L1533:
+	bne	.L1552
+.L1551:
 	mvn	r2, #0
 	movw	r3, #2588
-.L1604:
+.L1621:
 	strh	r2, [r5, r3]	@ movhi
-	ldr	r3, .L1606+8
-.L1605:
-	ldrh	r0, [r3, #-12]
-	b	.L1493
-.L1507:
+	ldr	r3, .L1623+8
+.L1622:
+	ldrh	r0, [r3, #-8]
+	b	.L1511
+.L1525:
 	movw	r1, #2444
 	ldrh	r7, [r5, r1]
 	cmp	r7, r2
-	bne	.L1576
+	bne	.L1593
 	movw	r2, #3202
 	ldrh	r2, [r5, r2]
 	cmp	r2, r7
 	movne	r3, #0
 	andeq	r3, r3, #1
 	cmp	r3, #0
-	beq	.L1576
+	beq	.L1593
 	movw	r3, #2588
 	ldrh	r3, [r5, r3]
 	cmp	r3, r7
-	beq	.L1519
-.L1524:
+	beq	.L1537
+.L1542:
 	mov	r4, r7
-.L1576:
+.L1593:
 	mov	r6, #1
-	b	.L1518
-.L1519:
+	b	.L1536
+.L1537:
 	movw	r3, #2344
 	movw	r2, #3148
 	ldrh	r8, [r5, r3]
 	ldrh	r3, [r5, r2]
 	str	r6, [r5, #3160]
-	ldr	r4, .L1606+8
+	ldr	r4, .L1623+8
 	cmp	r3, r8
-	bcs	.L1520
-	ldrh	r3, [r4, #-12]
+	bcs	.L1538
+	ldrh	r3, [r4, #-8]
 	cmp	r3, #0
-	bne	.L1521
+	bne	.L1539
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1600
-.L1521:
+	bcs	.L1617
+.L1539:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1600:
+.L1617:
 	strh	r3, [r5, r2]	@ movhi
-.L1603:
+.L1620:
 	bl	FtlReadRefresh
-	ldrh	r0, [r4, #-12]
-	b	.L1493
-.L1520:
-	ldrh	r0, [r4, #-12]
+	ldrh	r0, [r4, #-8]
+	b	.L1511
+.L1538:
+	ldrh	r0, [r4, #-8]
 	cmp	r0, #0
-	bne	.L1524
+	bne	.L1542
 	movw	r3, #2572
 	ldrh	r6, [r5, r3]
 	add	r3, r6, r6, lsl #1
@@ -10773,20 +10930,20 @@ rk_ftl_garbage_collect:
 	mul	r3, r3, r1
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1525
+	ble	.L1543
 	sub	r6, r6, #1
 	cmp	r8, r6
-	bge	.L1603
-.L1525:
+	bge	.L1620
+.L1543:
 	cmp	r2, #0
-	bne	.L1524
+	bne	.L1542
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2344
 	ldrh	r0, [r5, r3]
 	add	r0, r0, #1
-	b	.L1493
-.L1537:
+	b	.L1511
+.L1555:
 	uxth	r2, r0
 	str	r1, [fp, #-52]
 	add	r10, r10, #1
@@ -10797,7 +10954,7 @@ rk_ftl_garbage_collect:
 	ldr	r2, [fp, #-48]
 	ldr	r1, [fp, #-52]
 	strhne	r10, [r9]	@ movhi
-	bne	.L1536
+	bne	.L1554
 	ldrh	lr, [r5, #32]
 	uxth	r10, r10
 	ldrh	r3, [r5, #102]
@@ -10808,78 +10965,78 @@ rk_ftl_garbage_collect:
 	ldrh	ip, [r0, r2]
 	add	lr, r3, r3, lsr #31
 	cmp	ip, lr, asr #1
-	bgt	.L1540
+	bgt	.L1558
 	cmp	ip, #8
 	cmphi	r10, #48
-	bls	.L1541
-	ldr	ip, .L1606+20
+	bls	.L1559
+	ldr	ip, .L1623+20
 	ldrh	ip, [ip]
 	cmp	ip, #35
-	bhi	.L1541
-.L1540:
-	ldr	lr, .L1606+24
+	bhi	.L1559
+.L1558:
+	ldr	lr, .L1623+24
 	mov	ip, #0
 	strh	ip, [lr]	@ movhi
-.L1541:
+.L1559:
 	ldrh	ip, [r0, r2]
 	movw	r0, #65535
 	cmp	r3, ip
 	cmple	r4, r0
 	moveq	r3, #1
 	movne	r3, #0
-	bne	.L1542
+	bne	.L1560
 	mvn	r2, #0
 	movw	r3, #2588
 	strh	r2, [r5, r3]	@ movhi
 	mov	r2, #0
 	movw	r3, #3156
-	b	.L1604
-.L1542:
+	b	.L1621
+.L1560:
 	cmp	ip, #0
-	bne	.L1543
+	bne	.L1561
 	bl	decrement_vpc_count
-	ldr	r3, .L1606+24
-	ldr	r2, .L1606+24
+	ldr	r3, .L1623+24
+	ldr	r2, .L1623+24
 	ldrh	r3, [r3]
 	add	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1536
-.L1543:
+	b	.L1554
+.L1561:
 	strb	r3, [r5, #2596]
-	ldr	r3, .L1606+28
+	ldr	r3, .L1623+28
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bne	.L1544
-	movw	r2, #658
-	ldr	r1, .L1606+32
-	ldr	r0, .L1606+36
+	bne	.L1562
+	movw	r2, #665
+	ldr	r1, .L1623+32
+	ldr	r0, .L1623+36
 	bl	sftl_printk
-.L1544:
-	ldr	r3, .L1606+40
+.L1562:
+	ldr	r3, .L1623+40
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1545
-	movw	r2, #659
-	ldr	r1, .L1606+32
-	ldr	r0, .L1606+36
+	bne	.L1563
+	movw	r2, #666
+	ldr	r1, .L1623+32
+	ldr	r0, .L1623+36
 	bl	sftl_printk
-.L1545:
-	ldr	r3, .L1606+44
+.L1563:
+	ldr	r3, .L1623+44
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1546
-	mov	r2, #660
-	ldr	r1, .L1606+32
-	ldr	r0, .L1606+36
+	bne	.L1564
+	movw	r2, #667
+	ldr	r1, .L1623+32
+	ldr	r0, .L1623+36
 	bl	sftl_printk
-.L1546:
-	ldr	r0, .L1606+16
+.L1564:
+	ldr	r0, .L1623+16
 	bl	make_superblock
 	ldrh	r2, [r8]
 	mov	r3, #0
-	ldr	r1, .L1606+48
+	ldr	r1, .L1623+48
 	ldr	r0, [r5, #2324]
 	lsl	r2, r2, #1
 	strh	r3, [r1]	@ movhi
@@ -10887,10 +11044,10 @@ rk_ftl_garbage_collect:
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
 	strh	r2, [r1, #2]	@ movhi
-.L1535:
+.L1553:
 	bl	FtlReadRefresh
 	mov	r3, #1
-	str	r3, [r5, #3820]
+	str	r3, [r5, #3824]
 	ldrh	r3, [r5, #102]
 	str	r3, [fp, #-56]
 	ldrh	r3, [r8, #2]
@@ -10901,48 +11058,48 @@ rk_ftl_garbage_collect:
 	subgt	r6, r2, r3
 	mov	r3, #0
 	uxthgt	r6, r6
-.L1602:
+.L1619:
 	str	r3, [fp, #-52]
 	ldrh	r3, [fp, #-52]
-	ldr	r8, .L1606+16
+	ldr	r8, .L1623+16
 	cmp	r6, r3
-	bls	.L1556
+	bls	.L1574
 	ldrh	r9, [r8, #2]
-	mov	r2, #0
+	add	r1, r8, #14
 	ldr	r3, [fp, #-52]
 	movw	r10, #65535
 	ldrh	ip, [r7, #32]
 	ldr	r0, [r7, #3180]
 	add	r9, r9, r3
-	add	r3, r8, #14
-	mov	r8, r2
-	b	.L1557
-.L1550:
-	ldrh	r1, [r3, #2]!
-	add	r2, r2, #1
-	cmp	r1, r10
+	mov	r3, #0
+	mov	r8, r3
+	b	.L1575
+.L1568:
+	ldrh	r2, [r1, #2]!
+	add	r3, r3, #1
+	cmp	r2, r10
 	movne	lr, #20
-	orrne	r1, r9, r1, lsl #10
+	orrne	r2, r9, r2, lsl #10
 	mlane	lr, lr, r8, r0
 	addne	r8, r8, #1
 	uxthne	r8, r8
-	strne	r1, [lr, #4]
-.L1557:
-	uxth	r1, r2
-	cmp	ip, r1
-	bhi	.L1550
+	strne	r2, [lr, #4]
+.L1575:
+	uxth	r2, r3
+	cmp	ip, r2
+	bhi	.L1568
 	ldrb	r2, [r7, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L1601:
+.L1618:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r3, r8
 	ldrcs	r3, [fp, #-52]
 	addcs	r3, r3, #1
-	bcs	.L1602
-.L1555:
+	bcs	.L1619
+.L1573:
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
@@ -10950,22 +11107,22 @@ rk_ftl_garbage_collect:
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	cmn	r3, #1
-	beq	.L1552
+	beq	.L1570
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1552
+	bne	.L1570
 	ldr	r3, [r10, #8]
 	cmn	r3, #1
-	bne	.L1553
-	mov	r2, #696
-	ldr	r1, .L1606+32
-	ldr	r0, .L1606+36
+	bne	.L1571
+	movw	r2, #703
+	ldr	r1, .L1623+32
+	ldr	r0, .L1623+36
 	str	r3, [fp, #-60]
 	bl	sftl_printk
 	ldr	r3, [fp, #-60]
-.L1553:
+.L1571:
 	mov	r2, #0
 	mov	r0, r3
 	sub	r1, fp, #44
@@ -10975,16 +11132,16 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1552
-	ldr	r3, .L1606+48
+	bne	.L1570
+	ldr	r3, .L1623+48
 	mov	r1, #20
 	ldr	lr, [r5, #3164]
 	ldr	r0, [r0, #16]
 	ldrh	r2, [r3]
 	str	r1, [fp, #-64]
 	add	r2, r2, #1
-	strh	r2, [r3], #10	@ movhi
-	ldr	r2, [r5, #3836]
+	strh	r2, [r3], #6	@ movhi
+	ldr	r2, [r5, #3840]
 	str	r3, [fp, #-68]
 	mla	r2, r1, lr, r2
 	str	r0, [r2, #16]
@@ -10994,7 +11151,7 @@ rk_ftl_garbage_collect:
 	ldr	r1, [fp, #-64]
 	str	r0, [r2, #4]
 	ldr	r0, [r5, #3164]
-	ldr	r2, [r5, #3836]
+	ldr	r2, [r5, #3840]
 	mla	r1, r1, r0, r2
 	ldr	r2, [r5, #3180]
 	add	r2, r2, r9
@@ -11004,7 +11161,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldr	r2, [fp, #-44]
 	str	r2, [r10, #12]
-	ldr	r2, .L1606+44
+	ldr	r2, .L1623+44
 	ldrh	r1, [r2]
 	str	r2, [fp, #-60]
 	strh	r1, [r10, #2]	@ movhi
@@ -11021,109 +11178,114 @@ rk_ftl_garbage_collect:
 	ldr	r1, [r5, #3164]
 	ldr	r3, [fp, #-68]
 	cmp	r0, r1
-	beq	.L1554
+	beq	.L1572
 	ldr	r2, [fp, #-60]
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1552
-.L1554:
+	bne	.L1570
+.L1572:
 	str	r3, [fp, #-60]
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	ldr	r3, [fp, #-60]
-	ldrne	r2, .L1606
+	ldrne	r2, .L1623
 	movne	r1, #0
-	strne	r1, [r2, #3820]
-	bne	.L1605
-.L1552:
+	strne	r1, [r2, #3824]
+	bne	.L1622
+.L1570:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L1601
-.L1556:
+	b	.L1618
+.L1574:
 	ldrh	r3, [r8, #2]
 	add	r6, r6, r3
 	ldr	r3, [fp, #-56]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r8, #2]	@ movhi
-	ldr	r6, .L1606+8
-	bls	.L1558
-	ldrh	r2, [r6, #-10]
-	ldrh	r3, [r6, #-8]
-	cmp	r2, r3
-	bne	.L1559
-.L1558:
+	bhi	.L1576
 	ldr	r3, [r7, #3164]
+	ldr	r9, .L1623+8
 	cmp	r3, #0
-	beq	.L1560
+	beq	.L1577
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	movne	r3, #0
-	ldrhne	r0, [r6, #-12]
-	strne	r3, [r7, #3820]
-	bne	.L1493
-.L1560:
-	ldrh	r1, [r6, #-10]
-	cmp	r1, #0
-	bne	.L1561
+	ldrhne	r0, [r9, #-8]
+	strne	r3, [r7, #3824]
+	bne	.L1511
+.L1577:
+	ldrh	r6, [r9, #-6]
+	cmp	r6, #0
+	bne	.L1578
+	ldrh	r1, [r8]
+	ldr	r2, [r7, #2324]
+	lsl	r3, r1, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L1578
+	ldrh	r0, [r9, #-4]
+	ldrh	r2, [r8, #2]
+	str	r3, [sp]
+	mov	r3, r6
+	str	r0, [sp, #4]
+	ldr	r0, .L1623+52
+	bl	sftl_printk
 	ldrh	r3, [r8]
 	ldr	r2, [r7, #2324]
 	lsl	r3, r3, #1
-	ldrh	r0, [r2, r3]
-	cmp	r0, #0
-	beq	.L1561
-	strh	r1, [r2, r3]	@ movhi
+	strh	r6, [r2, r3]	@ movhi
 	ldrh	r0, [r8]
 	bl	update_vpc_list
-	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1561:
+.L1578:
 	mvn	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1559:
-	ldr	r3, .L1606+52
+.L1576:
+	ldr	r3, .L1623+56
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1562
+	bhi	.L1579
 	ldrh	r6, [r7, #102]
-.L1534:
-	ldr	r8, .L1606+16
+.L1552:
+	ldr	r8, .L1623+16
 	movw	r3, #65535
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1535
+	bne	.L1553
 	add	r9, r8, #568
 	mov	r3, #0
 	str	r3, [r7, #3160]
-.L1536:
+.L1554:
 	ldrh	r10, [r9]
 	mov	r0, r10
 	bl	List_get_gc_head_node
-	ldr	r3, .L1606+16
+	ldr	r3, .L1623+16
 	uxth	r1, r0
 	strh	r1, [r3]	@ movhi
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L1537
+	bne	.L1555
 	mov	r3, #0
 	mov	r0, #8
 	strh	r3, [r9]	@ movhi
-	b	.L1493
-.L1562:
-	ldrh	r0, [r6, #-12]
+	b	.L1511
+.L1579:
 	mov	r2, #0
-	str	r2, [r7, #3820]
-	cmp	r0, r2
+	str	r2, [r7, #3824]
+	ldr	r2, .L1623+8
+	ldrh	r0, [r2, #-8]
+	cmp	r0, #0
 	addeq	r0, r3, #1
-	b	.L1493
-.L1607:
+	b	.L1511
+.L1624:
 	.align	2
-.L1606:
+.L1623:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3-4016
-	.word	.LC108
+	.word	.LC112
 	.word	.LANCHOR0+2588
 	.word	.LANCHOR0+3192
 	.word	.LANCHOR0+3156
@@ -11132,7 +11294,8 @@ rk_ftl_garbage_collect:
 	.word	.LC1
 	.word	.LANCHOR0+2396
 	.word	.LANCHOR0+2444
-	.word	.LANCHOR3-4026
+	.word	.LANCHOR3-4022
+	.word	.LC113
 	.word	.LANCHOR0+2344
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
@@ -11164,252 +11327,283 @@ FtlRead:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #52
+	sub	sp, sp, #72
 	uxtb	r0, r0
-	mov	r6, r1
-	str	r2, [fp, #-68]
+	mov	r7, r1
+	str	r2, [fp, #-72]
 	cmp	r0, #16
 	mov	r9, r3
-	bne	.L1610
+	bne	.L1627
 	mov	r2, r3
-	ldr	r1, [fp, #-68]
-	add	r0, r6, #256
+	ldr	r1, [fp, #-72]
+	add	r0, r7, #256
 	bl	FtlVendorPartRead
 	str	r0, [fp, #-48]
-.L1609:
+.L1626:
 	ldr	r0, [fp, #-48]
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1610:
-	ldr	r3, [fp, #-68]
-	ldr	r10, .L1643
+.L1627:
+	ldr	r3, [fp, #-72]
+	ldr	r4, .L1661
 	add	r3, r1, r3
 	str	r3, [fp, #-56]
 	ldr	r2, [fp, #-56]
-	ldr	r3, [r10, #140]
+	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	mvnhi	r3, #0
-	strhi	r3, [fp, #-48]
-	bhi	.L1609
-	ldr	r3, .L1643+4
-	ldr	r7, [r3]
-	cmn	r7, #1
-	streq	r7, [fp, #-48]
-	beq	.L1609
-	bl	FtlCacheWriteBack
-	ldrh	r4, [r10, #58]
-	mov	r0, r6
+	bhi	.L1648
+	ldr	r3, .L1661+4
+	ldr	r3, [r3]
+	cmn	r3, #1
+	beq	.L1649
+	ldrh	r5, [r4, #58]
+	mov	r0, r7
 	mov	r8, #0
-	mov	r7, r10
-	mov	r5, r8
-	mov	r1, r4
+	mov	r6, r8
+	mov	r1, r5
 	bl	__udivsi3
 	ldr	r3, [fp, #-56]
-	mov	r1, r4
+	mov	r1, r5
 	str	r0, [fp, #-60]
 	sub	r0, r3, #1
 	bl	__udivsi3
 	ldr	r3, [fp, #-60]
-	ldr	r4, [fp, #-60]
+	ldr	r5, [fp, #-60]
 	str	r0, [fp, #-64]
 	rsb	r3, r3, #1
-	str	r8, [fp, #-76]
+	str	r8, [fp, #-80]
 	add	r3, r3, r0
-	str	r8, [fp, #-72]
+	str	r8, [fp, #-76]
 	str	r3, [fp, #-52]
 	ldr	r2, [fp, #-52]
-	ldr	r3, [r10, #2508]
+	ldr	r3, [r4, #2508]
 	str	r8, [fp, #-48]
 	add	r3, r3, r2
-	str	r3, [r10, #2508]
-.L1612:
+	str	r3, [r4, #2508]
+.L1629:
 	ldr	r3, [fp, #-52]
 	cmp	r3, #0
-	bne	.L1628
-	ldr	r3, .L1643
-	movw	r2, #3206
+	bne	.L1646
+	ldr	r3, .L1661
+	movw	r2, #3210
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	bne	.L1629
+	bne	.L1647
 	movw	r2, #2344
 	ldrh	r3, [r3, r2]
 	cmp	r3, #31
-	bhi	.L1609
-.L1629:
+	bhi	.L1626
+.L1647:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1609
-.L1628:
-	sub	r1, fp, #44
+	b	.L1626
+.L1646:
 	mov	r2, #0
-	mov	r0, r4
+	sub	r1, fp, #44
+	mov	r0, r5
 	bl	log2phys
-	ldr	r1, [fp, #-44]
-	cmn	r1, #1
+	ldr	r2, [fp, #-44]
+	cmn	r2, #1
 	moveq	r10, #0
-	beq	.L1614
-	ldr	r2, [r7, #3832]
-	mov	r0, #20
-	ldr	r3, [fp, #-60]
-	ldrh	r10, [r7, #58]
-	mla	r2, r0, r5, r2
-	cmp	r4, r3
-	str	r1, [r2, #4]
-	bne	.L1618
-	ldr	r1, [r7, #3816]
-	mov	r0, r6
-	str	r2, [fp, #-80]
-	str	r1, [r2, #8]
+	beq	.L1631
+	ldr	r3, [r4, #3836]
+	mov	r1, #20
+	ldrh	r10, [r4, #58]
+	mla	r3, r1, r6, r3
+	str	r2, [r3, #4]
+	ldr	r2, [fp, #-60]
+	cmp	r5, r2
+	bne	.L1635
+	ldr	r2, [r4, #3820]
 	mov	r1, r10
+	mov	r0, r7
+	str	r3, [fp, #-68]
+	str	r2, [r3, #8]
 	bl	__umodsi3
-	ldr	r3, [fp, #-68]
-	sub	r1, r10, r0
-	ldr	r2, [fp, #-80]
-	str	r0, [fp, #-72]
-	cmp	r3, r1
-	movcs	r3, r1
+	ldr	r3, [fp, #-72]
+	sub	r2, r10, r0
+	str	r0, [fp, #-76]
+	cmp	r3, r2
+	movcs	r3, r2
 	cmp	r3, r10
-	str	r3, [fp, #-76]
-	streq	r9, [r2, #8]
-.L1619:
-	ldrh	r1, [r7, #112]
-	ldr	r0, [r7, #3812]
-	str	r4, [r2, #16]
-	mul	r1, r5, r1
-	add	r5, r5, #1
-	bic	r1, r1, #3
-	add	r1, r0, r1
-	str	r1, [r2, #12]
-	b	.L1617
-.L1616:
-	mla	r0, r0, r4, r10
-	ldr	r2, [fp, #-56]
-	cmp	r2, r0
-	movhi	r2, #1
-	movls	r2, #0
-	cmp	r6, r0
-	movhi	r2, #0
-	cmp	r2, #0
-	beq	.L1615
-	sub	r0, r0, r6
+	str	r3, [fp, #-80]
+	ldr	r3, [fp, #-68]
+	streq	r9, [r3, #8]
+.L1636:
+	ldrh	r2, [r4, #112]
+	ldr	r1, [r4, #3816]
+	str	r5, [r3, #16]
+	mul	r2, r6, r2
+	add	r6, r6, #1
+	bic	r2, r2, #3
+	add	r2, r1, r2
+	str	r2, [r3, #12]
+	b	.L1634
+.L1633:
+	mla	r0, r0, r5, r10
+	ldr	r3, [fp, #-56]
+	cmp	r3, r0
+	movhi	r3, #1
+	movls	r3, #0
+	cmp	r7, r0
+	movhi	r3, #0
+	cmp	r3, #0
+	beq	.L1632
+	sub	r0, r0, r7
 	mov	r1, #512
 	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.L1615:
+.L1632:
 	add	r10, r10, #1
-.L1614:
-	ldrh	r0, [r7, #58]
+.L1631:
+	ldrh	r0, [r4, #58]
 	cmp	r10, r0
-	bcc	.L1616
-.L1617:
+	bcc	.L1633
+.L1634:
 	ldr	r3, [fp, #-52]
-	add	r4, r4, #1
+	add	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [fp, #-52]
-	beq	.L1621
-	ldrh	r2, [r7, #32]
-	cmp	r5, r2, lsl #2
-	bne	.L1612
-.L1621:
-	cmp	r5, #0
-	beq	.L1612
+	beq	.L1638
+	ldrh	r3, [r4, #32]
+	cmp	r6, r3, lsl #2
+	bne	.L1629
+.L1638:
+	cmp	r6, #0
+	beq	.L1629
 	mov	r2, #0
-	mov	r1, r5
-	ldr	r0, [r7, #3832]
-	mov	r10, #0
+	mov	r1, r6
+	ldr	r0, [r4, #3836]
 	bl	FlashReadPages
 	lsl	r3, r8, #9
-	str	r3, [fp, #-88]
-	ldr	r3, [fp, #-72]
-	lsl	r3, r3, #9
-	str	r3, [fp, #-80]
+	str	r3, [fp, #-92]
 	ldr	r3, [fp, #-76]
 	lsl	r3, r3, #9
 	str	r3, [fp, #-84]
-.L1627:
-	mov	r3, #20
-	ldr	r2, [r7, #3832]
-	mul	ip, r3, r10
-	ldr	r3, [fp, #-60]
-	add	r2, r2, ip
-	ldr	r1, [r2, #16]
-	cmp	r3, r1
-	bne	.L1623
-	ldr	r1, [r2, #8]
-	ldr	r2, [r7, #3816]
-	cmp	r1, r2
-	bne	.L1624
 	ldr	r3, [fp, #-80]
+	lsl	r3, r3, #9
+	str	r3, [fp, #-88]
+	mov	r3, #0
+	str	r3, [fp, #-68]
+.L1645:
+	ldr	r3, [fp, #-68]
+	mov	ip, #20
+	ldr	r1, [fp, #-60]
+	mul	r10, ip, r3
+	ldr	r3, [r4, #3836]
+	add	r3, r3, r10
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L1640
+	ldr	r1, [r3, #8]
+	ldr	r3, [r4, #3820]
+	cmp	r1, r3
+	bne	.L1641
+	ldr	r3, [fp, #-84]
 	mov	r0, r9
-	ldr	r2, [fp, #-84]
-	str	ip, [fp, #-92]
+	ldr	r2, [fp, #-88]
 	add	r1, r1, r3
-.L1642:
+.L1660:
 	bl	ftl_memcpy
-	ldr	ip, [fp, #-92]
-.L1624:
-	ldr	r2, [r7, #3832]
-	ldr	r0, [r2, ip]
-	add	lr, r2, ip
-	cmn	r0, #1
-	ldreq	r1, [r7, #2708]
-	streq	r0, [fp, #-48]
-	addeq	r1, r1, #1
-	streq	r1, [r7, #2708]
-	ldr	r2, [r2, ip]
-	cmp	r2, #256
-	bne	.L1626
-	ldr	r0, [lr, #4]
+.L1641:
+	ldr	r1, [r4, #3836]
+	add	r1, r1, r10
+	ldr	r3, [r1, #12]
+	ldr	r2, [r1, #16]
+	ldr	r3, [r3, #8]
+	cmp	r2, r3
+	beq	.L1642
+	ldr	r3, [r4, #2708]
+	add	r3, r3, #1
+	str	r3, [r4, #2708]
+	ldr	r2, [r1, #8]
+	ldr	r3, [r1, #12]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #16]
+	ldr	r2, [r2]
+	ldr	r0, .L1661+8
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r1, #4]
+	ldr	r3, [r3]
+	ldr	r1, [r1, #16]
+	bl	sftl_printk
+.L1642:
+	ldr	r3, [r4, #3836]
+	ldr	r1, [r3, r10]
+	add	r0, r3, r10
+	cmn	r1, #1
+	ldreq	r2, [r4, #2708]
+	streq	r1, [fp, #-48]
+	addeq	r2, r2, #1
+	streq	r2, [r4, #2708]
+	ldr	r3, [r3, r10]
+	cmp	r3, #256
+	bne	.L1644
+	ldr	r0, [r0, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1626:
-	add	r10, r10, #1
-	cmp	r5, r10
-	bne	.L1627
-	mov	r5, #0
-	b	.L1612
-.L1618:
-	ldr	r3, [fp, #-64]
-	cmp	r4, r3
-	bne	.L1620
-	ldr	r1, [r7, #3808]
-	ldr	r3, [fp, #-56]
-	str	r1, [r2, #8]
-	mul	r1, r10, r4
-	sub	r8, r3, r1
+.L1644:
+	ldr	r3, [fp, #-68]
+	add	r3, r3, #1
+	cmp	r6, r3
+	str	r3, [fp, #-68]
+	bne	.L1645
+	mov	r6, #0
+	b	.L1629
+.L1635:
+	ldr	r2, [fp, #-64]
+	cmp	r5, r2
+	bne	.L1637
+	ldr	r2, [r4, #3812]
+	ldr	r1, [fp, #-56]
+	str	r2, [r3, #8]
+	mul	r2, r10, r5
+	sub	r8, r1, r2
 	cmp	r10, r8
-	subeq	r1, r1, r6
-	addeq	r1, r9, r1, lsl #9
-	streq	r1, [r2, #8]
-	b	.L1619
-.L1620:
-	mul	r10, r4, r10
-	sub	r10, r10, r6
+	subeq	r2, r2, r7
+	addeq	r2, r9, r2, lsl #9
+	streq	r2, [r3, #8]
+	b	.L1636
+.L1637:
+	mul	r10, r5, r10
+	sub	r10, r10, r7
 	add	r10, r9, r10, lsl #9
-	str	r10, [r2, #8]
-	b	.L1619
-.L1623:
-	ldr	r3, [fp, #-64]
-	cmp	r3, r1
-	bne	.L1624
-	ldr	r1, [r2, #8]
-	ldr	r2, [r7, #3808]
+	str	r10, [r3, #8]
+	b	.L1636
+.L1640:
+	ldr	r1, [fp, #-64]
 	cmp	r1, r2
-	bne	.L1624
-	ldrh	r0, [r7, #58]
-	str	ip, [fp, #-92]
-	ldr	r2, [fp, #-88]
+	bne	.L1641
+	ldr	r1, [r3, #8]
+	ldr	r3, [r4, #3812]
+	cmp	r1, r3
+	bne	.L1641
+	ldrh	r0, [r4, #58]
+	ldr	r3, [fp, #-64]
+	ldr	r2, [fp, #-92]
 	mul	r0, r3, r0
-	sub	r0, r0, r6
+	sub	r0, r0, r7
 	add	r0, r9, r0, lsl #9
-	b	.L1642
-.L1644:
+	b	.L1660
+.L1648:
+	mvn	r3, #0
+.L1649:
+	str	r3, [fp, #-48]
+	b	.L1626
+.L1662:
 	.align	2
-.L1643:
+.L1661:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
+	.word	.LC96
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
@@ -11456,356 +11650,264 @@ sftl_vendor_read:
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-	@ args = 0, pretend = 0, frame = 64
+	@ args = 0, pretend = 0, frame = 68
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #64
+	sub	sp, sp, #68
 	uxtb	r0, r0
-	mov	r8, r1
-	str	r2, [fp, #-76]
+	mov	r9, r1
+	str	r2, [fp, #-84]
 	cmp	r0, #16
 	str	r3, [fp, #-80]
-	bne	.L1648
+	bne	.L1666
 	mov	r2, r3
-	ldr	r1, [fp, #-76]
-	add	r0, r8, #256
+	ldr	r1, [fp, #-84]
+	add	r0, r9, #256
 	bl	FtlVendorPartWrite
-.L1647:
+.L1665:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1648:
-	ldr	r3, [fp, #-76]
-	ldr	r9, .L1712
+.L1666:
+	ldr	r3, [fp, #-84]
+	ldr	r4, .L1716
 	add	r6, r1, r3
-	ldr	r3, [r9, #140]
+	ldr	r3, [r4, #140]
 	cmp	r6, r3
 	mvnhi	r0, #0
-	bhi	.L1647
-	ldr	r5, .L1712+4
+	bhi	.L1665
+	ldr	r5, .L1716+4
 	ldr	r0, [r5]
 	cmn	r0, #1
-	beq	.L1647
-	ldr	r3, .L1712+8
+	beq	.L1665
+	ldr	r3, .L1716+8
 	mov	r2, #2048
-	ldrh	r4, [r9, #58]
-	mov	r0, r8
-	str	r2, [r3, #-4020]
-	mov	r1, r4
+	ldrh	r7, [r4, #58]
+	mov	r0, r9
+	str	r2, [r3, #-4016]
+	mov	r1, r7
 	bl	__udivsi3
-	mov	r1, r4
-	str	r0, [fp, #-68]
+	mov	r1, r7
+	str	r0, [fp, #-76]
 	sub	r0, r6, #1
 	bl	__udivsi3
-	ldr	r2, [fp, #-68]
-	ldr	r10, [r9, #3988]
-	str	r0, [fp, #-88]
-	sub	r6, r0, r2
-	add	r3, r6, #1
-	add	r2, r6, #1
+	ldr	r2, [fp, #-76]
+	str	r0, [fp, #-92]
+	sub	r3, r0, r2
+	str	r3, [fp, #-96]
+	add	r3, r3, #1
 	str	r3, [fp, #-72]
-	cmp	r10, #0
-	ldr	r3, [r9, #2516]
+	ldr	r2, [fp, #-72]
+	ldr	r3, [r4, #2516]
 	add	r3, r3, r2
-	str	r3, [r9, #2516]
-	beq	.L1650
-	ldr	r3, [r10, #16]
-	ldr	r2, [fp, #-68]
-	cmp	r2, r3
-	beq	.L1651
-	bl	FtlCacheWriteBack
-.L1650:
+	str	r3, [r4, #2516]
 	ldr	r3, [r5, #8]
-	ldr	r4, .L1712+12
+	ldr	r4, .L1716+12
 	cmp	r3, #0
-	beq	.L1653
+	beq	.L1668
 	ldrh	r3, [r4, #4]
 	add	r0, r4, #48
 	cmp	r3, #0
 	moveq	r4, r0
-.L1653:
-	ldr	r5, [fp, #-68]
-	ldr	r7, .L1712
-.L1654:
+.L1668:
+	ldr	r5, [fp, #-76]
+	ldr	r10, .L1716
+.L1669:
 	ldr	r3, [fp, #-72]
 	cmp	r3, #0
-	beq	.L1688
+	bne	.L1697
+	mov	r0, r3
+	ldr	r1, [fp, #-96]
+	bl	rk_ftl_garbage_collect
+	movw	r3, #2344
+	ldrh	r3, [r10, r3]
+	cmp	r3, #15
+	bls	.L1698
+.L1700:
+	mov	r0, #0
+	b	.L1665
+.L1697:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r7, #32]
+	ldrh	r3, [r10, #32]
 	cmp	r2, r3
-	bcc	.L1655
-	mov	r2, #1012
-	ldr	r1, .L1712+16
-	ldr	r0, .L1712+20
+	bcc	.L1670
+	movw	r2, #991
+	ldr	r1, .L1716+16
+	ldr	r0, .L1716+20
 	bl	sftl_printk
-.L1655:
-	ldrh	r9, [r4, #4]
-	cmp	r9, #0
-	bne	.L1656
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1712+12
-	ldr	r6, .L1712+4
+.L1670:
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	bne	.L1671
+	ldr	r3, .L1716+12
+	ldr	r6, .L1716+4
 	cmp	r4, r3
-	bne	.L1657
+	bne	.L1672
 	add	r0, r4, #48
-	ldrh	r9, [r0, #4]
-	cmp	r9, #0
-	bne	.L1658
+	ldrh	r7, [r0, #4]
+	cmp	r7, #0
+	bne	.L1673
 	bl	allocate_new_data_superblock
-	str	r9, [r6, #8]
-.L1658:
-	ldr	r0, .L1712+12
+	str	r7, [r6, #8]
+.L1673:
+	ldr	r0, .L1716+12
 	bl	allocate_new_data_superblock
-	ldr	r4, .L1712+12
+	ldr	r4, .L1716+12
 	ldr	r3, [r6, #8]
 	add	r0, r4, #48
 	cmp	r3, #0
 	movne	r4, r0
-.L1659:
+.L1674:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1656
+	bne	.L1671
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1656:
-	ldrh	r3, [r4, #4]
-	ldr	r2, [fp, #-72]
-	cmp	r3, r2
-	movcs	r3, r2
+.L1671:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldrh	r3, [r4, #4]
+	ldr	r1, [fp, #-72]
 	lsl	r2, r2, #2
-	cmp	r3, r2
-	movcs	r3, r2
+	cmp	r3, r1
+	movcs	r3, r1
+	cmp	r2, r3
+	movcc	r3, r2
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	str	r3, [fp, #-104]
-	ldrh	r3, [r7, #32]
+	str	r3, [fp, #-108]
+	ldrh	r3, [r10, #32]
 	cmp	r2, r3
-	bcc	.L1660
-	movw	r2, #1045
-	ldr	r1, .L1712+16
-	ldr	r0, .L1712+20
+	bcc	.L1675
+	mov	r2, #1024
+	ldr	r1, .L1716+16
+	ldr	r0, .L1716+20
 	bl	sftl_printk
-.L1660:
-	mov	r9, #0
-.L1661:
-	ldr	r3, [fp, #-104]
-	cmp	r9, r3
-	bne	.L1682
-.L1662:
-	ldr	r3, [r7, #3988]
-	cmp	r3, #0
-	beq	.L1683
-	ldr	r3, [fp, #-72]
-	subs	r9, r9, #1
-	sub	r3, r3, #1
-	str	r3, [fp, #-72]
-	bne	.L1683
-.L1688:
-	ldr	r3, [fp, #-88]
-	mov	r0, #0
-	ldr	r2, [fp, #-68]
-	sub	r1, r3, r2
-	bl	rk_ftl_garbage_collect
-	ldr	r2, .L1712
-	movw	r3, #2344
-	ldrh	r3, [r2, r3]
-	cmp	r3, #15
-	bhi	.L1685
-	ldr	r4, .L1712+24
-	ldr	r5, .L1712+28
-.L1708:
-	ldrh	r3, [r4]
-	movw	r2, #65535
+.L1675:
+	mov	r3, #0
+.L1715:
+	str	r3, [fp, #-68]
+	ldr	r3, [fp, #-68]
+	ldr	r2, [fp, #-108]
 	cmp	r3, r2
-	bne	.L1689
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L1689
-	mov	r0, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.L1689:
-	ldr	r3, .L1712+32
-	mov	r1, #1
-	mov	r2, #128
-	mov	r0, r1
-	strh	r2, [r3]	@ movhi
-	strh	r2, [r3, #-2]	@ movhi
-	bl	rk_ftl_garbage_collect
-	mov	r1, #1
-	mov	r0, #0
-	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1712+36
-	ldrh	r3, [r3]
-	cmp	r3, #8
-	bls	.L1708
-	b	.L1685
-.L1651:
-	ldr	r3, [r9, #2520]
-	mov	r1, r4
-	mov	r0, r8
-	add	r3, r3, #1
-	str	r3, [r9, #2520]
-	bl	__umodsi3
-	ldr	r3, [fp, #-76]
-	sub	r4, r4, r0
-	ldr	r1, [fp, #-80]
-	cmp	r3, r4
-	movcc	r4, r3
-	ldr	r3, [r10, #8]
-	lsl	r9, r4, #9
-	mov	r2, r9
-	add	r0, r3, r0, lsl #9
-	bl	ftl_memcpy
-	cmp	r6, #0
-	bne	.L1652
-.L1685:
-	mov	r0, #0
-	b	.L1647
-.L1652:
-	ldr	r3, [fp, #-76]
-	add	r8, r8, r4
-	sub	r3, r3, r4
-	str	r3, [fp, #-76]
-	ldr	r3, [fp, #-80]
-	add	r3, r3, r9
-	str	r3, [fp, #-80]
+	bne	.L1695
+.L1677:
+	mov	r3, r4
+	mov	r2, #0
+	ldr	r1, [fp, #-68]
+	ldr	r0, [r10, #3844]
+	bl	FtlProgPages
 	ldr	r3, [fp, #-68]
-	add	r3, r3, #1
-	str	r3, [fp, #-68]
-	bl	FtlCacheWriteBack
-	str	r6, [fp, #-72]
-	b	.L1650
-.L1657:
+	ldr	r2, [fp, #-72]
+	cmp	r3, r2
+	bls	.L1696
+	movw	r2, #1101
+	ldr	r1, .L1716+16
+	ldr	r0, .L1716+20
+	bl	sftl_printk
+.L1696:
+	ldr	r3, [fp, #-72]
+	ldr	r2, [fp, #-68]
+	sub	r3, r3, r2
+	str	r3, [fp, #-72]
+	b	.L1669
+.L1672:
+	str	r2, [r6, #8]
 	ldrh	r2, [r3, #4]
-	str	r9, [r6, #8]
 	cmp	r2, #0
 	movne	r4, r3
-	bne	.L1656
+	bne	.L1671
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-	b	.L1659
-.L1682:
+	b	.L1674
+.L1695:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1662
+	beq	.L1677
 	mov	r2, #0
 	sub	r1, fp, #64
 	mov	r0, r5
-	mov	r6, #20
+	mov	r7, #20
 	bl	log2phys
 	mov	r0, r4
-	mul	r6, r6, r9
 	bl	get_new_active_ppa
-	ldrh	r2, [r7, #112]
-	ldr	r3, [r7, #3840]
-	mul	r1, r2, r9
-	add	r3, r3, r6
-	str	r0, [r3, #4]
-	str	r5, [r3, #16]
+	ldrh	r2, [r10, #112]
+	ldr	r1, [fp, #-68]
+	ldr	r3, [fp, #-68]
+	mul	r1, r2, r1
+	mul	r7, r7, r3
+	ldr	r3, [r10, #3844]
 	bic	r1, r1, #3
-	str	r1, [fp, #-96]
-	ldr	r0, [fp, #-96]
-	ldr	r1, [r7, #3812]
-	add	r10, r1, r0
 	str	r1, [fp, #-100]
-	str	r10, [r3, #12]
+	add	r3, r3, r7
+	ldr	r1, [r10, #3816]
+	str	r0, [r3, #4]
+	ldr	r0, [fp, #-100]
+	str	r1, [fp, #-104]
+	str	r5, [r3, #16]
+	add	r8, r1, r0
 	mov	r1, #0
-	mov	r0, r10
+	str	r8, [r3, #12]
+	mov	r0, r8
 	bl	ftl_memset
-	ldr	r3, [fp, #-68]
-	ldr	r2, [fp, #-88]
+	ldr	r3, [fp, #-76]
+	ldr	r2, [fp, #-92]
+	ldrh	r6, [r10, #58]
 	cmp	r5, r2
 	cmpne	r5, r3
-	ldrh	r3, [r7, #58]
-	bne	.L1663
-	ldr	r2, [fp, #-68]
-	cmp	r5, r2
-	bne	.L1664
-	mov	r1, r3
-	mov	r0, r8
-	str	r3, [fp, #-84]
+	bne	.L1678
+	cmp	r5, r3
+	bne	.L1679
+	mov	r1, r6
+	mov	r0, r9
 	bl	__umodsi3
 	ldr	r3, [fp, #-84]
-	ldr	r2, [fp, #-76]
-	str	r0, [fp, #-92]
-	sub	r3, r3, r0
-	cmp	r3, r2
-	movcs	r3, r2
-	str	r3, [fp, #-84]
-.L1665:
-	ldrh	r3, [r7, #58]
-	ldr	r2, [fp, #-84]
-	cmp	r2, r3
-	ldr	r3, [fp, #-68]
-	bne	.L1666
+	sub	r6, r6, r0
+	str	r0, [fp, #-88]
+	cmp	r6, r3
+	movcs	r6, r3
+.L1680:
+	ldrh	r3, [r10, #58]
+	cmp	r6, r3
+	ldr	r3, [fp, #-76]
+	bne	.L1681
 	cmp	r5, r3
-	ldr	r3, [r7, #3840]
-	add	r6, r3, r6
+	ldr	r3, [r10, #3844]
+	add	r7, r3, r7
 	ldreq	r3, [fp, #-80]
-	beq	.L1710
-	ldr	r3, [fp, #-84]
-	mul	r2, r3, r5
+	streq	r3, [r7, #8]
+	beq	.L1683
+.L1712:
+	mul	r6, r5, r6
 	ldr	r3, [fp, #-80]
-	sub	r2, r2, r8
-	add	r2, r3, r2, lsl #9
-	str	r2, [r6, #8]
-.L1668:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r7, #32]
-	cmp	r2, r3
-	bcc	.L1679
-	movw	r2, #1119
-	ldr	r1, .L1712+16
-	ldr	r0, .L1712+20
-	bl	sftl_printk
-.L1679:
-	ldr	r3, .L1712+40
-	add	r9, r9, #1
-	ldr	r2, [fp, #-100]
-	ldr	r1, [fp, #-96]
-	strh	r3, [r2, r1]	@ movhi
-	ldr	r3, [r7, #2544]
-	str	r5, [r10, #8]
-	add	r5, r5, #1
-	str	r3, [r10, #4]
-	add	r3, r3, #1
-	cmn	r3, #1
-	moveq	r3, #0
-	str	r3, [r7, #2544]
-	ldr	r3, [fp, #-64]
-	str	r3, [r10, #12]
-	ldrh	r3, [r4]
-	strh	r3, [r10, #2]	@ movhi
-	b	.L1661
-.L1664:
-	ldr	r2, [fp, #-76]
-	smulbb	r3, r3, r5
-	add	r2, r8, r2
-	sub	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [fp, #-84]
+	sub	r6, r6, r9
+	add	r6, r3, r6, lsl #9
+	str	r6, [r7, #8]
+	b	.L1683
+.L1679:
+	ldr	r3, [fp, #-84]
+	add	r2, r9, r3
+	smulbb	r3, r6, r5
+	sub	r6, r2, r3
 	mov	r3, #0
-	str	r3, [fp, #-92]
-	b	.L1665
-.L1666:
+	uxth	r6, r6
+	str	r3, [fp, #-88]
+	b	.L1680
+.L1681:
 	cmp	r5, r3
-	ldr	r3, [r7, #3840]
-	ldreq	r2, [r7, #3816]
-	ldrne	r2, [r7, #3808]
-	add	r3, r3, r6
+	ldr	r3, [r10, #3844]
+	ldreq	r2, [r10, #3820]
+	ldrne	r2, [r10, #3812]
+	add	r3, r3, r7
 	str	r2, [r3, #8]
 	ldr	r3, [fp, #-64]
 	cmn	r3, #1
-	beq	.L1671
+	beq	.L1686
 	str	r3, [fp, #-56]
 	mov	r1, #1
-	ldr	r3, [r7, #3840]
+	ldr	r3, [r10, #3844]
 	sub	r0, fp, #60
 	str	r5, [fp, #-44]
-	add	r3, r3, r6
+	add	r3, r3, r7
 	ldr	r2, [r3, #8]
 	ldr	r3, [r3, #12]
 	str	r2, [fp, #-52]
@@ -11814,116 +11916,140 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	ldreq	r3, [r7, #2708]
+	ldreq	r3, [r10, #2708]
 	addeq	r3, r3, #1
-	streq	r3, [r7, #2708]
-	beq	.L1675
-	ldr	r3, [r10, #8]
+	streq	r3, [r10, #2708]
+	beq	.L1690
+	ldr	r3, [r8, #8]
 	cmp	r5, r3
-	beq	.L1674
-	ldr	r3, [r7, #2708]
+	beq	.L1689
+	ldr	r3, [r10, #2708]
 	mov	r2, r5
-	ldr	r0, .L1712+44
+	ldr	r0, .L1716+24
 	add	r3, r3, #1
-	str	r3, [r7, #2708]
-	ldr	r1, [r10, #8]
+	str	r3, [r10, #2708]
+	ldr	r1, [r8, #8]
 	bl	sftl_printk
-.L1674:
-	ldr	r3, [r10, #8]
+.L1689:
+	ldr	r3, [r8, #8]
 	cmp	r5, r3
-	beq	.L1675
-	movw	r2, #1098
-	ldr	r1, .L1712+16
-	ldr	r0, .L1712+20
+	beq	.L1690
+	movw	r2, #1077
+	ldr	r1, .L1716+16
+	ldr	r0, .L1716+20
 	bl	sftl_printk
-.L1675:
-	ldr	r3, [fp, #-68]
+.L1690:
+	ldr	r3, [fp, #-76]
+	lsl	r2, r6, #9
 	cmp	r5, r3
-	ldr	r3, [fp, #-84]
-	lsl	r2, r3, #9
-	bne	.L1676
-	ldr	r3, [r7, #3840]
+	bne	.L1691
+	ldr	r3, [r10, #3844]
 	ldr	r1, [fp, #-80]
-	add	r3, r3, r6
-	ldr	r0, [r3, #8]
-	ldr	r3, [fp, #-92]
+	add	r7, r3, r7
+	ldr	r3, [fp, #-88]
+	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
+.L1713:
 	bl	ftl_memcpy
-	ldr	r3, [fp, #-88]
-	cmp	r5, r3
-	bne	.L1668
-.L1677:
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	ldrne	r3, [r7, #3840]
-	addne	r6, r3, r6
-	ldrne	r3, .L1712+8
-	strne	r6, [r7, #3988]
-	strne	r4, [r3, #-4036]
-	b	.L1668
-.L1671:
-	ldr	r3, [r7, #3840]
+.L1683:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r10, #32]
+	cmp	r2, r3
+	bcc	.L1692
+	movw	r2, #1092
+	ldr	r1, .L1716+16
+	ldr	r0, .L1716+20
+	bl	sftl_printk
+.L1692:
+	ldr	r3, .L1716+28
+	ldr	r2, [fp, #-104]
+	ldr	r1, [fp, #-100]
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r3, [r10, #2544]
+	str	r5, [r8, #8]
+	add	r5, r5, #1
+	str	r3, [r8, #4]
+	add	r3, r3, #1
+	cmn	r3, #1
+	moveq	r3, #0
+	str	r3, [r10, #2544]
+	ldr	r3, [fp, #-64]
+	str	r3, [r8, #12]
+	ldrh	r3, [r4]
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r3, [fp, #-68]
+	add	r3, r3, #1
+	b	.L1715
+.L1686:
+	ldr	r3, [r10, #3844]
 	mov	r1, #0
-	ldrh	r2, [r7, #110]
-	add	r3, r3, r6
+	ldrh	r2, [r10, #110]
+	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1675
-.L1676:
-	ldrh	r1, [r7, #58]
-	ldr	r0, [fp, #-80]
-	ldr	r3, [r7, #3840]
+	b	.L1690
+.L1691:
+	ldrh	r1, [r10, #58]
+	ldr	r3, [r10, #3844]
 	mul	r1, r5, r1
-	add	r3, r3, r6
-	sub	r1, r1, r8
-	add	r1, r0, r1, lsl #9
-	ldr	r0, [r3, #8]
-	bl	ftl_memcpy
-	b	.L1677
-.L1663:
-	ldr	r2, [r7, #3840]
-	mul	r3, r5, r3
-	add	r6, r2, r6
-	ldr	r2, [fp, #-80]
-	sub	r3, r3, r8
-	add	r3, r2, r3, lsl #9
+	add	r7, r3, r7
+	ldr	r3, [fp, #-80]
+	ldr	r0, [r7, #8]
+	sub	r1, r1, r9
+	add	r1, r3, r1, lsl #9
+	b	.L1713
+.L1678:
+	ldr	r3, [r10, #3844]
+	add	r7, r3, r7
+	b	.L1712
+.L1698:
+	ldr	r4, .L1716+32
+	ldr	r5, .L1716+36
 .L1710:
-	str	r3, [r6, #8]
-	b	.L1668
-.L1683:
-	mov	r3, r4
-	mov	r2, #0
-	mov	r1, r9
-	ldr	r0, [r7, #3840]
-	bl	FtlProgPages
-	ldr	r3, [fp, #-72]
-	cmp	r3, r9
-	bcs	.L1686
-	movw	r2, #1134
-	ldr	r1, .L1712+16
-	ldr	r0, .L1712+20
-	bl	sftl_printk
-.L1686:
-	ldr	r3, [fp, #-72]
-	sub	r3, r3, r9
-	str	r3, [fp, #-72]
-	b	.L1654
-.L1713:
+	ldrh	r3, [r4]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1699
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L1699
+	mov	r0, #0
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L1699:
+	ldr	r3, .L1716+40
+	mov	r1, #1
+	mov	r2, #128
+	mov	r0, r1
+	strh	r2, [r3]	@ movhi
+	strh	r2, [r3, #-2]	@ movhi
+	bl	rk_ftl_garbage_collect
+	mov	r1, #1
+	mov	r0, #0
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L1716+44
+	ldrh	r3, [r3]
+	cmp	r3, #8
+	bls	.L1710
+	b	.L1700
+.L1717:
 	.align	2
-.L1712:
+.L1716:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR1+574
 	.word	.LC1
+	.word	.LC114
+	.word	-3947
 	.word	.LANCHOR0+2588
 	.word	.LANCHOR0+3202
 	.word	.LANCHOR0+3150
 	.word	.LANCHOR0+2344
-	.word	-3947
-	.word	.LC109
 	.size	FtlWrite, .-FtlWrite
+	.global	__modsi3
 	.align	2
 	.global	sftl_write
 	.syntax unified
@@ -11931,17 +12057,292 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 116
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{fp, ip, lr, pc}
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	mov	r3, r2
-	mov	r2, r1
+	sub	sp, sp, #120
+	add	ip, r0, r1
+	sub	lr, ip, #1
+	mov	r3, r1
+	cmp	lr, #63
+	mov	r10, r0
+	movhi	r3, #0
+	movls	r3, #1
+	cmp	r0, #576
+	orrhi	r3, r3, #1
+	str	r1, [fp, #-112]
+	cmp	r3, #0
+	str	r2, [fp, #-132]
+	ldr	r4, .L1749
+	beq	.L1719
+	ldr	r3, [r4, #-4012]
+	cmp	r3, #0
+	beq	.L1720
+	ldr	r2, .L1749+4
+	mov	r0, #512
+	ldrh	r3, [r2, #14]
+	str	r3, [fp, #-116]
+	ldrh	r3, [r2, #10]
+	ldrb	r1, [fp, #-116]	@ zero_extendqisi2
+	smulbb	r3, r3, r1
+	uxth	r3, r3
+	mov	r1, r3
+	str	r3, [fp, #-120]
+	bl	__udivsi3
+	ldr	r2, .L1749+8
+	mov	r3, #0
+	ldr	r1, .L1749+12
+	str	r0, [fp, #-108]
+	sub	ip, r2, #262144
+.L1724:
+	ldr	r0, [r2, #-4]
+	cmp	r0, #0
+	beq	.L1721
+.L1725:
+	ldr	r3, [fp, #-108]
+	mov	r4, #0
+	ldr	r2, [fp, #-120]
+	ldr	r9, .L1749+16
+	ldr	r5, .L1749+4
+	str	r4, [fp, #-124]
+	mul	r3, r3, r2
+	str	r3, [fp, #-144]
+	ldr	r3, [fp, #-108]
+	str	r3, [fp, #-128]
+.L1722:
+	mov	r1, #512
+	mov	r0, r9
+	bl	__memzero
+	ldrh	r8, [r5, #14]
+	mov	r0, r4
+	ldrh	r6, [r5, #10]
+	mov	r1, r8
+	uxtb	r7, r8
+	uxth	r3, r7
+	str	r3, [fp, #-136]
+	ldrh	r3, [fp, #-136]
+	smulbb	r6, r6, r3
+	bl	__udivsi3
+	uxth	r6, r6
+	mov	r1, r0
+	ldr	r3, [r5, #3252]
+	mov	r0, #0
+	blx	r3
+	cmp	r6, #512
+	bcs	.L1726
+	mov	r1, r8
+	add	r0, r6, r4
+	bl	__udivsi3
+	ldr	r3, [r5, #3252]
+	mov	r1, r0
+	mov	r0, #0
+	blx	r3
+.L1726:
+	mov	r1, r6
+	mov	r0, r4
+	bl	__umodsi3
+	mov	r6, #0
+	mov	r8, r0
+	sub	r3, r4, r0
+	str	r3, [fp, #-140]
+.L1727:
+	cmp	r6, #512
+	bcc	.L1728
+	ldrb	r7, [r5, #14]	@ zero_extendqisi2
+	mov	r0, r4
+	ldrh	r1, [r5, #10]
+	mov	r6, #0
+	uxth	r3, r7
+	str	r3, [fp, #-136]
+	ldrh	r3, [fp, #-136]
+	smulbb	r1, r1, r3
+	uxth	r1, r1
+	bl	__umodsi3
+	mov	r1, r7
+	mov	ip, r0
+	sub	r3, r4, r0
+	uxth	r0, r0
+	str	r3, [fp, #-140]
+	str	ip, [fp, #-148]
+	bl	__modsi3
+	ldr	ip, [fp, #-148]
+	uxth	r3, r0
+.L1729:
+	cmp	r6, #512
+	bcs	.L1733
+	ldr	r2, [fp, #-136]
+	add	r0, ip, r6
+	mov	r1, r7
+	str	ip, [fp, #-148]
+	str	r3, [fp, #-156]
+	sub	r8, r2, r3
+	add	r2, r9, r6, lsl #9
+	uxth	r8, r8
+	str	r2, [fp, #-152]
+	bl	__udivsi3
+	ldr	r2, [fp, #-140]
+	uxth	r0, r0
+	ldr	r3, [fp, #-156]
+	mov	r1, r7
+	add	r3, r3, r2
+	mla	r0, r7, r0, r3
+	bl	__udivsi3
+	ldr	ip, [r5, #3260]
+	mov	r1, r0
+	sub	r3, fp, #104
+	ldr	r2, [fp, #-152]
+	mov	r0, #0
+	blx	ip
+	cmn	r0, #1
+	ldr	ip, [fp, #-148]
+	bne	.L1730
+.L1733:
+	ldr	r3, .L1749+20
+	mov	r6, #0
+.L1731:
+	mov	r7, r3
+	ldr	r1, [r9, r6, lsl #2]
+	ldr	r2, [r7]
+	add	r3, r3, #4
+	cmp	r1, r2
+	beq	.L1734
+	mov	r1, #512
+	mov	r0, r9
+	bl	__memzero
+	ldr	r2, [r9, r6, lsl #2]
+	mov	r1, r4
+	str	r6, [sp]
+	ldr	r0, .L1749+24
+	ldr	r3, [r7]
+	bl	sftl_printk
+	ldr	r1, [fp, #-116]
+	mov	r0, r4
+	bl	__udivsi3
+	ldr	r3, [r5, #3252]
+	mov	r1, r0
+	mov	r0, #0
+	blx	r3
+	ldr	r3, [fp, #-108]
+	cmp	r3, #1
+	bls	.L1735
+	ldr	r3, [fp, #-120]
+	ldr	r1, [fp, #-116]
+	add	r0, r3, r4
+	bl	__udivsi3
+	ldr	r3, [r5, #3252]
 	mov	r1, r0
 	mov	r0, #0
+	blx	r3
+.L1735:
+	ldr	r2, [fp, #-128]
+	ldr	r3, [fp, #-108]
+	add	r3, r3, r2
+	ldr	r2, [fp, #-144]
+	add	r4, r4, r2
+	ldr	r2, [fp, #-128]
+	cmp	r2, #15
+	bls	.L1741
+.L1740:
+	ldr	r3, .L1749
+	mov	r2, #0
+	str	r2, [r3, #-4012]
+.L1720:
+	ldr	r3, [fp, #-132]
+	mov	r1, r10
+	ldr	r2, [fp, #-112]
+	mov	r0, #0
 	bl	FtlWrite
-	ldmfd	sp, {fp, sp, pc}
+	sub	sp, fp, #40
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
+.L1721:
+	ldr	r0, [ip, r3, lsl #2]
+	add	r3, r3, #1
+	cmp	r3, #4096
+	movhi	r3, #0
+	str	r0, [r2, #-4]!
+	cmp	r1, r2
+	bne	.L1724
+	b	.L1725
+.L1741:
+	str	r3, [fp, #-128]
+	b	.L1722
+.L1728:
+	mov	r1, r7
+	add	r0, r8, r6
+	bl	__udivsi3
+	uxth	ip, r0
+	mov	r1, r7
+	ldr	r0, [fp, #-140]
+	mul	r3, r7, ip
+	str	ip, [fp, #-152]
+	str	r3, [fp, #-104]
+	movw	r3, #61424
+	str	r3, [fp, #-100]
+	ldr	r3, .L1749+20
+	add	r2, r3, r6, lsl #9
+	str	r2, [fp, #-148]
+	bl	__udivsi3
+	ldr	ip, [fp, #-152]
+	sub	r3, fp, #104
+	ldr	r2, [fp, #-148]
+	add	r1, r0, ip
+	mov	r0, #0
+	ldr	ip, [r5, #3256]
+	blx	ip
+	ldr	r3, [fp, #-136]
+	add	r6, r3, r6
+	uxth	r6, r6
+	b	.L1727
+.L1730:
+	add	r6, r8, r6
+	mov	r3, #0
+	uxth	r6, r6
+	b	.L1729
+.L1734:
+	add	r6, r6, #1
+	cmp	r6, #65536
+	bne	.L1731
+	ldr	r3, [fp, #-124]
+	add	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [fp, #-124]
+	bls	.L1735
+	b	.L1740
+.L1719:
+	cmp	r0, #63
+	ldr	r0, .L1749+20
+	ldrls	r3, [fp, #-112]
+	rsbls	r1, r10, #64
+	ldrhi	r3, .L1749+28
+	ldrhi	r2, [fp, #-112]
+	subls	r2, r3, r1
+	ldrls	r3, [fp, #-132]
+	addhi	r3, r10, r3
+	ldrhi	r1, [fp, #-132]
+	addhi	r0, r0, r3, lsl #9
+	addls	r1, r3, r1, lsl #9
+	cmp	lr, #576
+	subhi	r2, r2, ip
+	subhi	r2, r2, #444
+	mov	r3, #1
+	subhi	r2, r2, #3
+	str	r3, [r4, #-4012]
+	lsl	r2, r2, #9
+	bl	memcpy
+	b	.L1720
+.L1750:
+	.align	2
+.L1749:
+	.word	.LANCHOR3
+	.word	.LANCHOR0
+	.word	idb_buf+262144
+	.word	idb_buf+16388
+	.word	gp_flash_check_buf
+	.word	idb_buf
+	.word	.LC115
+	.word	8388544
 	.size	sftl_write, .-sftl_write
 	.align	2
 	.global	sftl_vendor_write
@@ -11974,63 +12375,63 @@ FtlLoadSysInfo:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1737
+	ldr	r4, .L1773
 	mov	r1, #0
-	ldr	r3, [r4, #3280]
+	ldr	r3, [r4, #3284]
 	add	r6, r4, #2576
 	ldrh	r2, [r4, #40]
 	ldr	r0, [r4, #2324]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	lsl	r2, r2, #1
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	lsl	r2, r2, #1
+	str	r3, [r4, #3276]
 	bl	ftl_memset
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1717
-.L1725:
+	bne	.L1753
+.L1761:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1717:
-	ldr	r7, .L1737+4
+.L1753:
+	ldr	r8, .L1773+4
 	mov	r1, #1
-	ldr	r8, .L1737+8
+	add	r7, r4, #3264
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1719:
+.L1755:
 	cmp	r5, #0
-	bge	.L1722
-	movw	r2, #1437
-	ldr	r1, .L1737+12
-	ldr	r0, .L1737+16
+	bge	.L1758
+	movw	r2, #1482
+	ldr	r1, .L1773+8
+	ldr	r0, .L1773+12
 	bl	sftl_printk
-.L1721:
+.L1757:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	add	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1724
-	movw	r2, #1439
-	ldr	r1, .L1737+12
-	ldr	r0, .L1737+16
+	bcs	.L1760
+	movw	r2, #1484
+	ldr	r1, .L1773+8
+	ldr	r0, .L1773+12
 	bl	sftl_printk
-.L1724:
-	ldr	r5, .L1737+20
+.L1760:
+	ldr	r5, .L1773+16
 	mov	r2, #48
-	ldr	r1, [r4, #3268]
+	ldr	r1, [r4, #3272]
 	mov	r0, r5
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
-	ldr	r1, [r4, #3268]
+	ldr	r1, [r4, #3272]
 	ldr	r0, [r4, #2324]
 	lsl	r2, r2, #1
 	add	r1, r1, #48
 	bl	ftl_memcpy
 	ldrh	r1, [r4, #40]
-	ldr	r3, [r4, #3268]
+	ldr	r3, [r4, #3272]
 	ldr	r0, [r4, #24]
 	lsr	r2, r1, #3
 	add	r1, r1, #24
@@ -12040,19 +12441,19 @@ FtlLoadSysInfo:
 	add	r1, r3, r1
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1737+8
+	ldr	r3, .L1773+4
 	cmp	r2, r3
-	bne	.L1725
+	bne	.L1761
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r7, [r5, #8]
 	cmp	r2, r3
 	strh	r7, [r6, #6]	@ movhi
-	bne	.L1725
-	ldr	r3, .L1737+24
+	bne	.L1761
+	ldr	r3, .L1773+20
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
-	str	r7, [r3, #-4016]
+	str	r7, [r3, #-4008]
 	ldrh	r3, [r4, #102]
 	ldrh	r0, [r4, #158]
 	ldrh	r1, [r4, #32]
@@ -12066,15 +12467,15 @@ FtlLoadSysInfo:
 	cmp	r7, r6
 	movw	r3, #2572
 	strh	r0, [r4, r3]	@ movhi
-	bls	.L1726
-	movw	r2, #1461
-	ldr	r1, .L1737+12
-	ldr	r0, .L1737+16
+	bls	.L1762
+	movw	r2, #1506
+	ldr	r1, .L1773+8
+	ldr	r0, .L1773+12
 	bl	sftl_printk
-.L1726:
+.L1762:
 	ldrh	r0, [r5, #14]
 	movw	r3, #2348
-	ldr	r1, .L1737+28
+	ldr	r1, .L1773+24
 	mvn	ip, #0
 	strh	r0, [r4, r3]	@ movhi
 	ldrh	r3, [r5, #16]
@@ -12129,67 +12530,66 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1729
-	ldr	r0, .L1737+28
+	beq	.L1765
+	ldr	r0, .L1773+24
 	bl	make_superblock
-.L1729:
+.L1765:
 	movw	r3, #2396
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1730
-	ldr	r0, .L1737+32
+	beq	.L1766
+	ldr	r0, .L1773+28
 	bl	make_superblock
-.L1730:
+.L1766:
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1731
-	ldr	r0, .L1737+36
+	beq	.L1767
+	ldr	r0, .L1773+32
 	bl	make_superblock
-.L1731:
+.L1767:
 	movw	r3, #2588
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1732
-	ldr	r0, .L1737+40
+	beq	.L1768
+	ldr	r0, .L1773+36
 	bl	make_superblock
-.L1732:
+.L1768:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1722:
+.L1758:
 	ldrh	r3, [r6]
 	mov	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3264]
-	ldr	r3, [r4, #3280]
 	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1720
-	ldr	r3, [r4, #3280]
+	beq	.L1756
+	ldr	r3, [r4, #3284]
 	ldr	r3, [r3]
 	cmp	r3, r8
-	bne	.L1720
-	ldr	r3, [r4, #3284]
+	bne	.L1756
+	ldr	r3, [r4, #3288]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1721
-.L1720:
+	beq	.L1757
+.L1756:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1719
-.L1738:
+	b	.L1755
+.L1774:
 	.align	2
-.L1737:
+.L1773:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
 	.word	1179929683
 	.word	.LANCHOR1+583
 	.word	.LC1
@@ -12212,27 +12612,27 @@ FtlSysBlkInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1755
-	mov	r2, #0
-	movw	r3, #4008
+	ldr	r4, .L1799
+	mov	r3, #0
+	add	r6, r4, #4016
 	ldrh	r0, [r4, #36]
-	strh	r2, [r4, r3]	@ movhi
+	strh	r3, [r6]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	add	r3, r4, #2576
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1740
-.L1742:
+	bne	.L1776
+.L1778:
 	mvn	r8, #0
-.L1739:
+.L1775:
 	mov	r0, r8
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1740:
+.L1776:
 	bl	FtlLoadSysInfo
 	subs	r8, r0, #0
-	bne	.L1742
+	bne	.L1778
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12246,27 +12646,22 @@ FtlSysBlkInit:
 	mov	r3, r8
 	ldr	r2, [r4, #2492]
 	mov	r0, #12
-.L1743:
+.L1779:
 	cmp	r3, r1
-	bge	.L1748
+	bge	.L1784
 	mla	ip, r0, r3, r2
 	ldr	ip, [ip, #4]
 	cmp	ip, #0
-	bge	.L1744
-.L1748:
-	ldr	r5, .L1755+4
+	bge	.L1780
+.L1784:
+	ldr	r5, .L1799+4
 	cmp	r3, r1
 	ldrh	r2, [r5, #28]
 	add	r7, r5, #80
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	bge	.L1754
-.L1745:
-	ldr	r6, .L1755+8
-	ldr	r0, .L1755+12
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r6
-	bl	FtlSuperblockPowerLostFix
+	bge	.L1798
+.L1781:
 	movw	r3, #2348
 	ldr	r1, [r4, #2324]
 	ldrh	r3, [r4, r3]
@@ -12278,23 +12673,24 @@ FtlSysBlkInit:
 	movw	r2, #2396
 	ldrh	r2, [r4, r2]
 	ldrh	r3, [r4, #102]
-	ldr	r0, [r4, #2324]
-	ldrh	ip, [r6, #4]
+	ldr	r1, .L1799+8
+	ldr	ip, [r4, #2324]
 	lsl	r2, r2, #1
 	strh	r3, [r7, #2]	@ movhi
 	mov	r3, #0
+	ldrh	lr, [r1, #4]
 	strb	r3, [r4, #2354]
 	strh	r3, [r7, #4]	@ movhi
-	ldrh	r1, [r0, r2]
-	sub	r1, r1, ip
-	strh	r1, [r0, r2]	@ movhi
+	ldrh	r0, [ip, r2]
+	sub	r0, r0, lr
+	strh	r0, [ip, r2]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1755+16
+	ldr	r0, .L1799+12
+	strh	r3, [r1, #4]	@ movhi
+	strh	r2, [r1, #2]	@ movhi
 	strb	r3, [r4, #2402]
-	strh	r2, [r6, #2]	@ movhi
-	strh	r3, [r6, #4]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	add	r0, r6, #1552
+	ldr	r0, .L1799+16
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r5, #30]
 	add	r3, r3, #1
@@ -12302,50 +12698,103 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1749
-.L1744:
+	b	.L1785
+.L1780:
 	add	r3, r3, #1
-	b	.L1743
-.L1754:
-	movw	r3, #4008
-	ldrh	r3, [r4, r3]
+	b	.L1779
+.L1798:
+	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1745
-.L1749:
+	bne	.L1781
+.L1785:
+	ldrh	r6, [r5, #44]
+	movw	r2, #65533
+	sub	r3, r6, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bhi	.L1787
+	movw	r3, #3202
+	mov	r1, r6
+	ldr	r0, .L1799+20
+	strh	r6, [r4, r3]	@ movhi
+	bl	test_node_in_list
+	cmp	r0, #0
+	bne	.L1788
+	ldrh	r3, [r4, #40]
+	cmp	r3, r6
+	bls	.L1788
+	ldr	r3, [r4, #2324]
+	lsl	r6, r6, #1
+	ldrh	r3, [r3, r6]
+	cmp	r3, #0
+	bne	.L1787
+.L1788:
+	mvn	r2, #0
+	movw	r3, #3202
+	strh	r2, [r4, r3]	@ movhi
+.L1787:
+	ldrh	r6, [r5, #46]
+	movw	r2, #65533
+	sub	r3, r6, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bhi	.L1791
+	movw	r3, #3204
+	mov	r1, r6
+	ldr	r0, .L1799+20
+	strh	r6, [r4, r3]	@ movhi
+	bl	test_node_in_list
+	cmp	r0, #0
+	bne	.L1792
+	ldrh	r3, [r4, #40]
+	cmp	r3, r6
+	bls	.L1792
+	ldr	r3, [r4, #2324]
+	lsl	r6, r6, #1
+	ldrh	r3, [r3, r6]
+	cmp	r3, #0
+	bne	.L1791
+.L1792:
+	mvn	r2, #0
+	movw	r3, #3204
+	strh	r2, [r4, r3]	@ movhi
+.L1791:
 	movw	r3, #2348
 	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1750
+	beq	.L1794
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	bne	.L1750
-	ldr	r6, .L1755+8
+	bne	.L1794
+	ldr	r6, .L1799+8
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	bne	.L1750
+	bne	.L1794
 	bl	FtlGcRefreshBlock
 	movw	r3, #2396
 	ldrh	r0, [r4, r3]
 	bl	FtlGcRefreshBlock
+	bl	FtlVpcTblFlush
 	sub	r0, r6, #48
 	bl	allocate_new_data_superblock
 	mov	r0, r6
 	bl	allocate_new_data_superblock
-.L1750:
+.L1794:
 	ldrh	r3, [r5, #28]
 	tst	r3, #31
-	bne	.L1739
+	bne	.L1775
 	bl	FtlVpcCheckAndModify
-	b	.L1739
-.L1756:
+	b	.L1775
+.L1800:
 	.align	2
-.L1755:
+.L1799:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2268
 	.word	.LANCHOR0+2396
-	.word	.LANCHOR0+2348
-	.word	.LANCHOR0+3904
+	.word	.LANCHOR0+3908
+	.word	.LANCHOR0+3956
+	.word	.LANCHOR0+2340
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
@@ -12359,7 +12808,7 @@ ftl_low_format:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1781
+	ldr	r4, .L1825
 	mov	r3, #0
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
@@ -12367,41 +12816,41 @@ ftl_low_format:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	beq	.L1758
+	beq	.L1802
 	bl	FtlMakeBbt
-.L1758:
-	ldr	r0, .L1781+4
+.L1802:
+	ldr	r0, .L1825+4
 	mov	r2, #0
-.L1759:
+.L1803:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	add	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1760
+	blt	.L1804
 	ldrh	r6, [r4, #40]
 	mov	r5, #0
-.L1761:
+.L1805:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1762
+	bhi	.L1806
 	ldrh	r1, [r4, #32]
 	sub	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1763
-.L1767:
+	bge	.L1807
+.L1811:
 	mov	r0, #0
 	mov	r6, r0
-.L1764:
+.L1808:
 	ldrh	r2, [r4, #40]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1768
+	bhi	.L1812
 	ldrh	r3, [r4, #42]
 	movw	r9, #2572
 	ldrh	r5, [r4, #32]
 	ldr	r10, [r4, #44]
-	str	r3, [r4, #3804]
+	str	r3, [r4, #3808]
 	mov	r1, r5
 	mov	r0, r10
 	bl	__udivsi3
@@ -12413,7 +12862,7 @@ ftl_low_format:
 	mov	r3, #24
 	mul	r3, r3, r5
 	cmp	r6, r3
-	ble	.L1769
+	ble	.L1813
 	mov	r1, r5
 	sub	r0, r10, r6
 	bl	__udivsi3
@@ -12421,10 +12870,10 @@ ftl_low_format:
 	lsr	r0, r0, #5
 	add	r0, r0, #24
 	strh	r0, [r4, r9]	@ movhi
-.L1769:
+.L1813:
 	ldrh	r3, [r4, #94]
 	cmp	r3, #0
-	beq	.L1771
+	beq	.L1815
 	movw	r2, #2572
 	ldrh	r1, [r4, r2]
 	add	r1, r1, r3, lsr #1
@@ -12435,16 +12884,16 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r7, r3
 	strhlt	r3, [r4, r2]	@ movhi
-.L1771:
+.L1815:
 	movw	r3, #2572
-	ldr	r6, .L1781+8
+	ldr	r6, .L1825+8
 	ldrh	r2, [r4, r3]
 	mvn	r7, #0
 	ldr	r3, [r4, #2504]
 	sub	r3, r3, r2
 	mul	r5, r5, r3
 	ldrh	r3, [r4, #102]
-	str	r5, [r6, #-4016]
+	str	r5, [r6, #-4008]
 	mul	r5, r5, r3
 	ldrh	r3, [r4, #58]
 	str	r5, [r4, #2504]
@@ -12454,7 +12903,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	mov	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r5, .L1781+12
+	ldr	r5, .L1825+12
 	lsl	r2, r2, #1
 	sub	r5, r5, #240
 	bl	ftl_memset
@@ -12477,29 +12926,29 @@ ftl_low_format:
 	ldr	r0, [r4, #24]
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1773:
+.L1817:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1774
+	bne	.L1818
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1773
-.L1760:
-	ldr	ip, [r4, #3816]
+	b	.L1817
+.L1804:
+	ldr	ip, [r4, #3820]
 	mvn	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [ip, r3, lsl #2]
-	ldr	r1, [r4, #3808]
+	ldr	r1, [r4, #3812]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1759
-.L1762:
+	b	.L1803
+.L1806:
 	mov	r0, r6
 	mov	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12507,8 +12956,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1761
-.L1763:
+	b	.L1805
+.L1807:
 	mov	r0, r5
 	bl	__udivsi3
 	ldr	r3, [r4, #132]
@@ -12518,25 +12967,25 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1765:
+.L1809:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1767
+	bls	.L1811
 	mov	r0, r5
 	mov	r1, #1
 	add	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1765
-.L1768:
+	b	.L1809
+.L1812:
 	mov	r1, #0
 	uxth	r0, r0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	mov	r0, r5
 	uxth	r6, r6
-	b	.L1764
-.L1774:
+	b	.L1808
+.L1818:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -12547,7 +12996,7 @@ ftl_low_format:
 	ldr	r2, [r4, #2324]
 	strh	r1, [r2, r3]	@ movhi
 	mov	r3, #0
-	ldr	r2, .L1781+16
+	ldr	r2, .L1825+16
 	movw	r1, #2396
 	strb	r3, [r4, #2402]
 	strh	r3, [r2, #2]	@ movhi
@@ -12558,21 +13007,21 @@ ftl_low_format:
 	strh	r3, [r4, r1]	@ movhi
 	mov	r3, #1
 	strb	r3, [r4, #2404]
-.L1775:
+.L1819:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1776
+	bne	.L1820
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1775
-.L1776:
+	b	.L1819
+.L1820:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -12585,10 +13034,10 @@ ftl_low_format:
 	movw	r3, #2444
 	strh	r5, [r4, r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1781+20
+	ldr	r3, .L1825+20
 	mov	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r6, #-4016]
+	ldr	r2, [r6, #-4008]
 	strh	r5, [r3, #4]	@ movhi
 	strh	r0, [r3]	@ movhi
 	strh	r2, [r3, #6]	@ movhi
@@ -12600,13 +13049,13 @@ ftl_low_format:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
 	mov	r0, #0
-	ldreq	r3, .L1781+24
+	ldreq	r3, .L1825+24
 	moveq	r2, #1
 	streq	r2, [r3]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1782:
+.L1826:
 	.align	2
-.L1781:
+.L1825:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -12627,11 +13076,11 @@ sftl_init:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1789
+	ldr	r4, .L1833
 	mvn	r3, #0
-	ldr	r5, .L1789+4
-	ldr	r1, .L1789+8
-	ldr	r0, .L1789+12
+	ldr	r5, .L1833+4
+	ldr	r1, .L1833+8
+	ldr	r0, .L1833+12
 	str	r3, [r5]
 	bl	sftl_printk
 	mov	r0, r4
@@ -12642,29 +13091,29 @@ sftl_init:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	bne	.L1787
+	bne	.L1831
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1787
+	bne	.L1831
 	mov	r3, #1
 	str	r3, [r5]
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #15
-	bhi	.L1787
+	bhi	.L1831
 	movw	r4, #8129
-.L1786:
+.L1830:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1786
-.L1787:
+	bne	.L1830
+.L1831:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1790:
+.L1834:
 	.align	2
-.L1789:
+.L1833:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -12697,17 +13146,17 @@ rk_sftl_vendor_dev_ops_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1795
-	ldr	r3, [r2, #-4012]
+	ldr	r2, .L1839
+	ldr	r3, [r2, #-4004]
 	cmp	r3, #0
-	streq	r0, [r2, #-4012]
+	streq	r0, [r2, #-4004]
 	moveq	r0, r3
-	streq	r1, [r2, #-4008]
+	streq	r1, [r2, #-4000]
 	mvnne	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1796:
+.L1840:
 	.align	2
-.L1795:
+.L1839:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
 	.align	2
@@ -12723,28 +13172,28 @@ rk_sftl_vendor_storage_init:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	mov	r0, #65536
-	ldr	r4, .L1806
+	ldr	r4, .L1850
 	bl	ftl_malloc
 	cmp	r0, #0
-	str	r0, [r4, #-4004]
+	str	r0, [r4, #-3996]
 	mvneq	r9, #11
-	beq	.L1797
-	ldr	r8, .L1806+4
+	beq	.L1841
+	ldr	r8, .L1850+4
 	mov	r6, #0
 	mov	r5, r6
 	mov	r7, r6
-.L1801:
-	ldr	r3, [r4, #-4012]
+.L1845:
+	ldr	r3, [r4, #-4004]
 	mov	r1, #128
-	ldr	r2, [r4, #-4004]
+	ldr	r2, [r4, #-3996]
 	lsl	r0, r7, #7
 	blx	r3
 	subs	r9, r0, #0
-	bne	.L1799
-	ldr	r2, [r4, #-4004]
+	bne	.L1843
+	ldr	r2, [r4, #-3996]
 	ldr	r3, [r2]
 	cmp	r3, r8
-	bne	.L1800
+	bne	.L1844
 	add	r1, r2, #61440
 	ldr	r3, [r2, #4]
 	ldr	r1, [r1, #4092]
@@ -12756,44 +13205,44 @@ rk_sftl_vendor_storage_init:
 	cmp	r1, #0
 	movne	r6, r7
 	movne	r5, r3
-.L1800:
+.L1844:
 	add	r7, r7, #1
 	cmp	r7, #2
-	bne	.L1801
+	bne	.L1845
 	cmp	r5, #0
-	beq	.L1802
-	ldr	r3, [r4, #-4012]
+	beq	.L1846
+	ldr	r3, [r4, #-4004]
 	mov	r1, #128
 	lsl	r0, r6, #7
 	blx	r3
 	subs	r9, r0, #0
-	beq	.L1797
-.L1799:
-	ldr	r0, [r4, #-4004]
+	beq	.L1841
+.L1843:
+	ldr	r0, [r4, #-3996]
 	mvn	r9, #0
 	bl	kfree
 	mov	r3, #0
-	str	r3, [r4, #-4004]
-	b	.L1797
-.L1802:
+	str	r3, [r4, #-3996]
+	b	.L1841
+.L1846:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
-	ldr	r3, [r4, #-4004]
+	ldr	r3, [r4, #-3996]
 	mov	r2, #1
 	add	r1, r3, #61440
 	str	r2, [r3, #4]
 	str	r8, [r3]
 	str	r2, [r1, #4092]
-	ldr	r2, .L1806+8
+	ldr	r2, .L1850+8
 	strh	r5, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1797:
+.L1841:
 	mov	r0, r9
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L1807:
+.L1851:
 	.align	2
-.L1806:
+.L1850:
 	.word	.LANCHOR3
 	.word	1380668996
 	.word	-1032
@@ -12810,26 +13259,26 @@ rk_sftl_vendor_read:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1814
+	ldr	r3, .L1858
 	mov	r4, r0
 	mov	r0, r1
-	ldr	ip, [r3, #-4004]
+	ldr	ip, [r3, #-3996]
 	cmp	ip, #0
 	ldrhne	lr, [ip, #10]
 	movne	r3, #0
-	bne	.L1810
-.L1813:
+	bne	.L1854
+.L1857:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1811:
+.L1855:
 	add	r3, r3, #1
-.L1810:
+.L1854:
 	cmp	r3, lr
-	bcs	.L1813
+	bcs	.L1857
 	add	r1, ip, r3, lsl #3
 	ldrh	r5, [r1, #16]
 	cmp	r5, r4
-	bne	.L1811
+	bne	.L1855
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -12840,9 +13289,9 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1815:
+.L1859:
 	.align	2
-.L1814:
+.L1858:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
@@ -12859,23 +13308,23 @@ rk_sftl_vendor_write:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	ip, r1
-	ldr	r8, .L1835
+	ldr	r8, .L1879
 	mov	r9, r2
-	ldr	r4, [r8, #-4004]
+	ldr	r4, [r8, #-3996]
 	cmp	r4, #0
-	beq	.L1831
+	beq	.L1875
 	ldrh	r2, [r4, #10]
 	add	r7, r9, #63
 	ldrh	r3, [r4, #8]
 	bic	r7, r7, #63
 	mov	r5, #0
 	str	r3, [fp, #-44]
-.L1818:
+.L1862:
 	cmp	r5, r2
-	bcc	.L1826
+	bcc	.L1870
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1831
+	bhi	.L1875
 	add	r3, r4, r2, lsl #3
 	uxth	r7, r7
 	strh	r0, [r3, #16]	@ movhi
@@ -12906,32 +13355,32 @@ rk_sftl_vendor_write:
 	cmp	r3, #1
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, [r8, #-4008]
-	b	.L1834
-.L1826:
+	ldr	r3, [r8, #-4000]
+	b	.L1878
+.L1870:
 	add	r6, r4, r5, lsl #3
 	ldrh	r3, [r6, #16]
 	cmp	r3, r0
 	str	r3, [fp, #-48]
-	bne	.L1819
+	bne	.L1863
 	ldrh	r1, [r6, #20]
 	add	r3, r4, #1024
 	add	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r9, r1
 	str	r1, [fp, #-52]
-	bls	.L1820
+	bls	.L1864
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1831
+	bhi	.L1875
 	ldrh	r8, [r6, #18]
 	sub	r2, r2, #1
 	str	r2, [fp, #-56]
-.L1821:
+.L1865:
 	ldr	r2, [fp, #-56]
 	add	r6, r6, #8
 	cmp	r5, r2
-	bcc	.L1822
+	bcc	.L1866
 	ldrh	r2, [fp, #-48]
 	add	r5, r4, r5, lsl #3
 	uxth	r8, r8
@@ -12950,7 +13399,7 @@ rk_sftl_vendor_write:
 	strh	r8, [r4, #12]	@ movhi
 	add	r7, r7, r3
 	strh	r7, [r4, #14]	@ movhi
-.L1823:
+.L1867:
 	ldr	r3, [r4, #4]
 	add	r2, r4, #61440
 	add	r3, r3, #1
@@ -12962,19 +13411,19 @@ rk_sftl_vendor_write:
 	cmp	r3, #1
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1835
-	ldr	r3, [r3, #-4008]
-.L1834:
+	ldr	r3, .L1879
+	ldr	r3, [r3, #-4000]
+.L1878:
 	ldr	r0, [fp, #-44]
 	mov	r2, r4
 	mov	r1, #128
 	lsl	r0, r0, #7
 	blx	r3
 	mov	r0, #0
-.L1816:
+.L1860:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1822:
+.L1866:
 	ldrh	r10, [r6, #20]
 	add	r0, r3, r8
 	ldrh	r2, [r6, #16]
@@ -12993,8 +13442,8 @@ rk_sftl_vendor_write:
 	bl	memcpy
 	ldr	ip, [fp, #-64]
 	ldr	r3, [fp, #-60]
-	b	.L1821
-.L1820:
+	b	.L1865
+.L1864:
 	add	r5, r4, r5, lsl #3
 	mov	r2, r9
 	mov	r1, ip
@@ -13002,16 +13451,16 @@ rk_sftl_vendor_write:
 	add	r0, r3, r0
 	bl	memcpy
 	strh	r9, [r6, #20]	@ movhi
-	b	.L1823
-.L1819:
+	b	.L1867
+.L1863:
 	add	r5, r5, #1
-	b	.L1818
-.L1831:
+	b	.L1862
+.L1875:
 	mvn	r0, #0
-	b	.L1816
-.L1836:
+	b	.L1860
+.L1880:
 	.align	2
-.L1835:
+.L1879:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
@@ -13024,7 +13473,7 @@ rk_sftl_vendor_storage_ioctl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, r5, r6, fp, ip, lr, pc}
+	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	mov	r0, #4096
 	mov	r5, r2
@@ -13032,53 +13481,79 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	subs	r4, r0, #0
 	mvneq	r5, #0
-	beq	.L1837
-	ldr	r3, .L1862
+	beq	.L1881
+	ldr	r3, .L1907
 	cmp	r6, r3
-	beq	.L1840
+	beq	.L1884
 	add	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1841
-.L1857:
+	beq	.L1885
+.L1906:
 	mvn	r5, #13
-	b	.L1839
-.L1840:
-	ldr	r6, .L1862+4
+	b	.L1883
+.L1884:
+	ldr	r6, .L1907+4
 	mov	r3, sp
-	and	r3, r3, r6
-	ldr	r3, [r3, #72]
+	and	r2, r3, r6
+	ldr	r3, [r2, #72]
 	.syntax divided
 @ 552 "./arch/arm/include/asm/uaccess.h" 1
-	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+	adds r1, r5, #8; sbcccs r1, r1, r3; movcc r3, #0
 @ 0 "" 2
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1847
+	bne	.L1891
+	.syntax divided
+@ 91 "./arch/arm/include/asm/domain.h" 1
+	mrc	p15, 0, r7, c3, c0	@ get domain
+@ 0 "" 2
+	.arm
+	.syntax unified
+	bic	r3, r7, #12
+	orr	r3, r3, #4
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r3, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r7, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	cmp	r0, #0
-	bne	.L1857
+	bne	.L1906
 	ldr	r2, [r4]
-	ldr	r3, .L1862+8
+	ldr	r3, .L1907+8
 	cmp	r2, r3
-	beq	.L1845
-.L1846:
+	beq	.L1889
+.L1890:
 	mvn	r5, #0
-.L1839:
+.L1883:
 	mov	r0, r4
 	bl	kfree
-.L1837:
+.L1881:
 	mov	r0, r5
-	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1845:
+	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
+.L1889:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	cmn	r0, #1
-	beq	.L1846
+	beq	.L1890
 	mov	r3, sp
 	uxth	r2, r0
 	and	r6, r6, r3
@@ -13092,39 +13567,93 @@ rk_sftl_vendor_storage_ioctl:
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1857
-	mov	r0, r5
+	bne	.L1906
+	.syntax divided
+@ 91 "./arch/arm/include/asm/domain.h" 1
+	mrc	p15, 0, r6, c3, c0	@ get domain
+@ 0 "" 2
+	.arm
+	.syntax unified
+	bic	r3, r6, #12
+	orr	r3, r3, #4
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r3, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	mov	r1, r4
+	mov	r0, r5
 	bl	arm_copy_to_user
-	subs	r5, r0, #0
-	beq	.L1839
-	b	.L1857
-.L1841:
-	ldr	r6, .L1862+4
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r6, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
+	cmp	r0, #0
+	bne	.L1906
+.L1897:
+	mov	r5, r0
+	b	.L1883
+.L1885:
+	ldr	r6, .L1907+4
 	mov	r3, sp
-	and	r3, r3, r6
-	ldr	r3, [r3, #72]
+	and	r2, r3, r6
+	ldr	r3, [r2, #72]
 	.syntax divided
 @ 552 "./arch/arm/include/asm/uaccess.h" 1
-	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
+	adds r1, r5, #8; sbcccs r1, r1, r3; movcc r3, #0
 @ 0 "" 2
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1847
+	bne	.L1891
+	.syntax divided
+@ 91 "./arch/arm/include/asm/domain.h" 1
+	mrc	p15, 0, r7, c3, c0	@ get domain
+@ 0 "" 2
+	.arm
+	.syntax unified
+	bic	r3, r7, #12
+	orr	r3, r3, #4
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r3, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r7, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	cmp	r0, #0
-	bne	.L1857
+	bne	.L1906
 	ldr	r2, [r4]
-	ldr	r3, .L1862+8
+	ldr	r3, .L1907+8
 	cmp	r2, r3
-	bne	.L1846
+	bne	.L1890
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1846
+	bhi	.L1890
 	mov	r3, sp
 	add	r2, r2, #8
 	and	r6, r6, r3
@@ -13138,26 +13667,51 @@ rk_sftl_vendor_storage_ioctl:
 	cmp	r3, #0
 	movne	r1, r2
 	movne	r0, r4
-	bne	.L1861
+	bne	.L1905
+	.syntax divided
+@ 91 "./arch/arm/include/asm/domain.h" 1
+	mrc	p15, 0, r6, c3, c0	@ get domain
+@ 0 "" 2
+	.arm
+	.syntax unified
+	bic	r3, r6, #12
+	orr	r3, r3, #4
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r3, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
+	.syntax divided
+@ 101 "./arch/arm/include/asm/domain.h" 1
+	mcr	p15, 0, r6, c3, c0	@ set domain
+@ 0 "" 2
+@ 104 "./arch/arm/include/asm/domain.h" 1
+	isb 
+@ 0 "" 2
+	.arm
+	.syntax unified
 	cmp	r0, #0
-	bne	.L1857
+	bne	.L1906
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
-	mov	r5, r0
-	b	.L1839
-.L1847:
+	b	.L1897
+.L1891:
 	mov	r1, #8
-.L1861:
+.L1905:
 	bl	__memzero
-	b	.L1857
-.L1863:
+	b	.L1906
+.L1908:
 	.align	2
-.L1862:
+.L1907:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13174,12 +13728,12 @@ rk_sftl_vendor_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r0, .L1865
+	ldr	r0, .L1910
 	bl	misc_register
 	ldmfd	sp, {fp, sp, pc}
-.L1866:
+.L1911:
 	.align	2
-.L1865:
+.L1910:
 	.word	.LANCHOR2+12
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
@@ -13225,6 +13779,8 @@ rk_sftl_vendor_register:
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
 	.global	g_gc_next_blk_1
 	.global	g_gc_next_blk
 	.global	g_gc_cur_blk_max_valid_pages
@@ -13280,7 +13836,6 @@ rk_sftl_vendor_register:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -13333,141 +13888,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3929, %object
-	.size	__func__.3929, 17
-__func__.3929:
+	.type	__func__.3953, %object
+	.size	__func__.3953, 17
+__func__.3953:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.3924, %object
-	.size	__func__.3924, 17
-__func__.3924:
+	.type	__func__.3948, %object
+	.size	__func__.3948, 17
+__func__.3948:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.3960, %object
-	.size	__func__.3960, 17
-__func__.3960:
+	.type	__func__.3991, %object
+	.size	__func__.3991, 17
+__func__.3991:
 	.ascii	"List_remove_node\000"
-	.type	__func__.3992, %object
-	.size	__func__.3992, 22
-__func__.3992:
+	.type	__func__.4023, %object
+	.size	__func__.4023, 22
+__func__.4023:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.4098, %object
-	.size	__func__.4098, 22
-__func__.4098:
+	.type	__func__.4134, %object
+	.size	__func__.4134, 22
+__func__.4134:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.4421, %object
-	.size	__func__.4421, 16
-__func__.4421:
+	.type	__func__.4457, %object
+	.size	__func__.4457, 16
+__func__.4457:
 	.ascii	"make_superblock\000"
-	.type	__func__.4596, %object
-	.size	__func__.4596, 19
-__func__.4596:
+	.type	__func__.4632, %object
+	.size	__func__.4632, 19
+__func__.4632:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.14933, %object
-	.size	__func__.14933, 15
-__func__.14933:
+	.type	__func__.14402, %object
+	.size	__func__.14402, 15
+__func__.14402:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.14950, %object
-	.size	__func__.14950, 15
-__func__.14950:
+	.type	__func__.14419, %object
+	.size	__func__.14419, 15
+__func__.14419:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.4034, %object
-	.size	__func__.4034, 26
-__func__.4034:
+	.type	__func__.4065, %object
+	.size	__func__.4065, 26
+__func__.4065:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.3538, %object
-	.size	__func__.3538, 11
-__func__.3538:
+	.type	__func__.3484, %object
+	.size	__func__.3484, 11
+__func__.3484:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.3764, %object
-	.size	__func__.3764, 14
-__func__.3764:
+	.type	__func__.3788, %object
+	.size	__func__.3788, 14
+__func__.3788:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.4001, %object
-	.size	__func__.4001, 16
-__func__.4001:
-	.ascii	"load_l2p_region\000"
-	.type	__func__.4059, %object
-	.size	__func__.4059, 31
-__func__.4059:
+	.type	__func__.4095, %object
+	.size	__func__.4095, 31
+__func__.4095:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.4073, %object
-	.size	__func__.4073, 16
-__func__.4073:
+	.type	__func__.4109, %object
+	.size	__func__.4109, 16
+__func__.4109:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.4045, %object
-	.size	__func__.4045, 15
-__func__.4045:
+	.type	__func__.4032, %object
+	.size	__func__.4032, 16
+__func__.4032:
+	.ascii	"load_l2p_region\000"
+	.type	__func__.4080, %object
+	.size	__func__.4080, 15
+__func__.4080:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.4115, %object
-	.size	__func__.4115, 9
-__func__.4115:
+	.type	__func__.4151, %object
+	.size	__func__.4151, 9
+__func__.4151:
 	.ascii	"log2phys\000"
-	.type	__func__.4330, %object
-	.size	__func__.4330, 16
-__func__.4330:
+	.type	__func__.4366, %object
+	.size	__func__.4366, 16
+__func__.4366:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.4483, %object
-	.size	__func__.4483, 14
-__func__.4483:
+	.type	__func__.4519, %object
+	.size	__func__.4519, 14
+__func__.4519:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.4210, %object
-	.size	__func__.4210, 14
-__func__.4210:
+	.type	__func__.4246, %object
+	.size	__func__.4246, 14
+__func__.4246:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.4442, %object
-	.size	__func__.4442, 18
-__func__.4442:
+	.type	__func__.4478, %object
+	.size	__func__.4478, 18
+__func__.4478:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.4568, %object
-	.size	__func__.4568, 25
-__func__.4568:
+	.type	__func__.4604, %object
+	.size	__func__.4604, 25
+__func__.4604:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.4609, %object
-	.size	__func__.4609, 16
-__func__.4609:
+	.type	__func__.4645, %object
+	.size	__func__.4645, 16
+__func__.4645:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.4616, %object
-	.size	__func__.4616, 20
-__func__.4616:
+	.type	__func__.4652, %object
+	.size	__func__.4652, 20
+__func__.4652:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.4364, %object
-	.size	__func__.4364, 22
-__func__.4364:
+	.type	__func__.4400, %object
+	.size	__func__.4400, 22
+__func__.4400:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.3807, %object
-	.size	__func__.3807, 11
-__func__.3807:
+	.type	__func__.3831, %object
+	.size	__func__.3831, 11
+__func__.3831:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.4188, %object
-	.size	__func__.4188, 15
-__func__.4188:
+	.type	__func__.4224, %object
+	.size	__func__.4224, 15
+__func__.4224:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.4467, %object
-	.size	__func__.4467, 21
-__func__.4467:
+	.type	__func__.4503, %object
+	.size	__func__.4503, 21
+__func__.4503:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.4589, %object
-	.size	__func__.4589, 29
-__func__.4589:
+	.type	__func__.4625, %object
+	.size	__func__.4625, 29
+__func__.4625:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.3662, %object
-	.size	__func__.3662, 13
-__func__.3662:
+	.type	__func__.3608, %object
+	.size	__func__.3608, 13
+__func__.3608:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.4686, %object
-	.size	__func__.4686, 19
-__func__.4686:
+	.type	__func__.4723, %object
+	.size	__func__.4723, 19
+__func__.4723:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.4792, %object
-	.size	__func__.4792, 23
-__func__.4792:
+	.type	__func__.4829, %object
+	.size	__func__.4829, 23
+__func__.4829:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.3690, %object
-	.size	__func__.3690, 9
-__func__.3690:
+	.type	__func__.3636, %object
+	.size	__func__.3636, 9
+__func__.3636:
 	.ascii	"FtlWrite\000"
-	.type	__func__.4267, %object
-	.size	__func__.4267, 15
-__func__.4267:
+	.type	__func__.4303, %object
+	.size	__func__.4303, 15
+__func__.4303:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -13497,7 +14052,7 @@ power_up_flag:
 	.size	rkflash_vender_storage_dev, 40
 rkflash_vender_storage_dev:
 	.word	255
-	.word	.LC110
+	.word	.LC116
 	.word	rk_sftl_vendor_storage_fops
 	.space	28
 	.bss
@@ -13883,6 +14438,14 @@ g_gc_next_blk:
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
+	.space	2
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.space	2
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
 	.space	2
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
@@ -14023,22 +14586,18 @@ c_ftl_nand_bbm_buf_size:
 	.space	2
 	.space	2
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.space	2
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
+	.space	44
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -14074,10 +14633,6 @@ g_recovery_ppa_tbl:
 g_ect_tbl_power_up_flush:
 	.space	2
 	.space	2
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
-	.space	4
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -14098,6 +14653,10 @@ g_gc_cur_blk_max_valid_pages:
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
+	.space	4
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
 	.space	4
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
@@ -14127,6 +14686,18 @@ check_buf:
 	.size	check_vpc_table, 16384
 check_vpc_table:
 	.space	16384
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
@@ -14270,7 +14841,7 @@ check_vpc_table:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 .LC70:
-	.ascii	"SFTL version: 5.0.44 20180713\000"
+	.ascii	"SFTL version: 5.0.45 20180810\000"
 .LC71:
 	.ascii	"%s\012\000"
 .LC72:
@@ -14306,51 +14877,63 @@ check_vpc_table:
 .LC86:
 	.ascii	"%s error allocating memory. return -1\012\000"
 .LC87:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC88:
-	.ascii	"spare:\000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC89:
-	.ascii	"map_ppn:\000"
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 .LC90:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC91:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"spare:\000"
 .LC92:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"map_ppn:\000"
 .LC93:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
 .LC94:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC95:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC96:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC95:
+.LC97:
 	.ascii	"...%s enter...\012\000"
-.LC96:
+.LC98:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC97:
+.LC99:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC98:
+.LC100:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC99:
+.LC101:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC100:
+.LC102:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC101:
+.LC103:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC102:
+.LC104:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC103:
+.LC105:
+	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
+.LC106:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC104:
+.LC107:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+.LC108:
 	.ascii	"no ect\000"
-.LC105:
+.LC109:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC106:
+.LC110:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC107:
+.LC111:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC108:
+.LC112:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC109:
+.LC113:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+.LC114:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC110:
+.LC115:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC116:
 	.ascii	"vendor_storage\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v7_thumb.S b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
index cfc34a4080f78..f11da2ac7145f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7_thumb.S
+++ b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-07
+ * date: 2018-08-14
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -15,41 +15,7 @@
 	.eabi_attribute 34, 1
 	.eabi_attribute 18, 4
 	.file	"rk_sftl.c"
-	.syntax unified
-	.macro	it, cond
-	.endm
-	.macro	itt, cond
-	.endm
-	.macro	ite, cond
-	.endm
-	.macro	ittt, cond
-	.endm
-	.macro	itte, cond
-	.endm
-	.macro	itet, cond
-	.endm
-	.macro	itee, cond
-	.endm
-	.macro	itttt, cond
-	.endm
-	.macro	ittte, cond
-	.endm
-	.macro	ittet, cond
-	.endm
-	.macro	ittee, cond
-	.endm
-	.macro	itett, cond
-	.endm
-	.macro	itete, cond
-	.endm
-	.macro	iteet, cond
-	.endm
-	.macro	iteee, cond
-	.endm
-
 	.global	__aeabi_uidiv
-	.thumb
-	.syntax unified
 	.text
 	.align	1
 	.syntax unified
@@ -373,6 +339,22 @@ IsBlkInVendorPart:
 	.fnend
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.fnend
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.align	1
 	.global	sftl_get_density
 	.syntax unified
 	.thumb
@@ -384,12 +366,12 @@ sftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L37
+	ldr	r3, .L38
 	ldr	r0, [r3, #140]
 	bx	lr
-.L38:
+.L39:
 	.align	2
-.L37:
+.L38:
 	.word	.LANCHOR0
 	.fnend
 	.size	sftl_get_density, .-sftl_get_density
@@ -409,7 +391,7 @@ FtlBbmMapBadBlock:
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
 	mov	r5, r0
-	ldr	r4, .L40
+	ldr	r4, .L41
 	ldrh	r7, [r4, #98]
 	mov	r1, r7
 	bl	__aeabi_uidiv
@@ -430,7 +412,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L40+4
+	ldr	r0, .L41+4
 	bl	sftl_printk
 	ldrh	r3, [r4, #158]
 	movs	r0, #0
@@ -439,9 +421,9 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L41:
+.L42:
 	.align	2
-.L40:
+.L41:
 	.word	.LANCHOR0
 	.word	.LC0
 	.fnend
@@ -460,7 +442,7 @@ FtlBbmIsBadBlock:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r5, .L43
+	ldr	r5, .L44
 	ldrh	r6, [r5, #98]
 	mov	r1, r6
 	bl	__aeabi_uidivmod
@@ -477,9 +459,9 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L44:
+.L45:
 	.align	2
-.L43:
+.L44:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -510,7 +492,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L47
+	ldr	r0, .L48
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -519,9 +501,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #158]	@ movhi
 	adds	r0, r0, #164
 	b	memset
-.L48:
+.L49:
 	.align	2
-.L47:
+.L48:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -536,7 +518,7 @@ FtlBbtCalcTotleCnt:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L56
+	ldr	r3, .L57
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r5, #0
@@ -544,23 +526,23 @@ FtlBbtCalcTotleCnt:
 	ldrh	r2, [r3, #98]
 	ldrh	r6, [r3, #54]
 	muls	r6, r2, r6
-.L50:
+.L51:
 	uxth	r0, r5
 	cmp	r0, r6
-	blt	.L52
+	blt	.L53
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
-.L52:
+.L53:
 	bl	FtlBbmIsBadBlock
-	cbz	r0, .L51
+	cbz	r0, .L52
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L51:
+.L52:
 	adds	r5, r5, #1
-	b	.L50
-.L57:
+	b	.L51
+.L58:
 	.align	2
-.L56:
+.L57:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
@@ -578,7 +560,7 @@ V2P_block:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r4, .L59
+	ldr	r4, .L60
 	mov	r7, r0
 	ldrh	r6, [r4, #56]
 	mov	r1, r6
@@ -593,9 +575,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L60:
+.L61:
 	.align	2
-.L59:
+.L60:
 	.word	.LANCHOR0
 	.fnend
 	.size	V2P_block, .-V2P_block
@@ -610,7 +592,7 @@ P2V_plane:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L62
+	ldr	r3, .L63
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
@@ -624,9 +606,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L63:
+.L64:
 	.align	2
-.L62:
+.L63:
 	.word	.LANCHOR0
 	.fnend
 	.size	P2V_plane, .-P2V_plane
@@ -643,7 +625,7 @@ P2V_block_in_plane:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L65
+	ldr	r4, .L66
 	ldrh	r1, [r4, #98]
 	bl	__aeabi_uidivmod
 	uxth	r0, r1
@@ -651,9 +633,9 @@ P2V_block_in_plane:
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r4, pc}
-.L66:
+.L67:
 	.align	2
-.L65:
+.L66:
 	.word	.LANCHOR0
 	.fnend
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -670,14 +652,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L68
+	bls	.L69
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L68:
+.L69:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -697,7 +679,7 @@ FtlFreeSysBlkQueueInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L71
+	ldr	r3, .L72
 	mov	r1, #2048
 	push	{r4, lr}
 	.save {r4, lr}
@@ -710,9 +692,9 @@ FtlFreeSysBlkQueueInit:
 	bl	__memzero
 	mov	r0, r4
 	pop	{r4, pc}
-.L72:
+.L73:
 	.align	2
-.L71:
+.L72:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
@@ -728,14 +710,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L74
+	ldr	r3, .L75
 	ldrh	r0, [r3, #218]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L75:
+.L76:
 	.align	2
-.L74:
+.L75:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
@@ -751,15 +733,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L77
+	ldr	r3, .L78
 	ldrh	r0, [r3, #218]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L78:
+.L79:
 	.align	2
-.L77:
+.L78:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
@@ -774,28 +756,28 @@ FtlFreeSysBLkSort:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L88
+	ldr	r3, .L89
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	ldrh	r2, [r3, #218]
-	cbz	r2, .L79
+	cbz	r2, .L80
 	ldrh	r5, [r3, #2296]
 	movs	r0, #0
 	ldrh	r1, [r3, #214]
 	mov	r6, r0
 	ldrh	r2, [r3, #216]
 	and	r5, r5, #31
-.L81:
+.L82:
 	uxth	r4, r0
 	adds	r0, r0, #1
 	cmp	r5, r4
-	bgt	.L82
-	cbz	r6, .L79
+	bgt	.L83
+	cbz	r6, .L80
 	strh	r1, [r3, #214]	@ movhi
 	strh	r2, [r3, #216]	@ movhi
-.L79:
+.L80:
 	pop	{r4, r5, r6, pc}
-.L82:
+.L83:
 	add	r4, r3, r1, lsl #1
 	adds	r1, r1, #1
 	ubfx	r1, r1, #0, #10
@@ -805,10 +787,10 @@ FtlFreeSysBLkSort:
 	movs	r6, #1
 	add	r2, r2, r6
 	ubfx	r2, r2, #0, #10
-	b	.L81
-.L89:
+	b	.L82
+.L90:
 	.align	2
-.L88:
+.L89:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -823,39 +805,83 @@ IsInFreeQueue:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L96
+	ldr	r3, .L97
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
 	ldrh	r4, [r3, #218]
 	cmp	r4, #1024
-	beq	.L94
+	beq	.L95
 	ldrh	r5, [r3, #214]
 	movs	r1, #0
-.L92:
+.L93:
 	cmp	r1, r4
-	bcc	.L93
-.L94:
+	bcc	.L94
+.L95:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L93:
+.L94:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	add	r2, r3, r2, lsl #1
 	ldrh	r2, [r2, #220]
 	cmp	r2, r0
-	beq	.L95
+	beq	.L96
 	adds	r1, r1, #1
-	b	.L92
-.L95:
+	b	.L93
+.L96:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L97:
+.L98:
 	.align	2
-.L96:
+.L97:
 	.word	.LANCHOR0
 	.fnend
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	1
+	.global	test_node_in_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	test_node_in_list, %function
+test_node_in_list:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L104
+	push	{r4, r5, lr}
+	.save {r4, r5, lr}
+	movw	r5, #65535
+	ldr	r2, [r0]
+	ldr	r4, [r3, #2316]
+	subs	r3, r2, r4
+	asrs	r0, r3, #1
+	ldr	r3, .L104+4
+	muls	r3, r0, r3
+	movs	r0, #6
+	uxth	r3, r3
+.L101:
+	cmp	r3, r1
+	beq	.L102
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	beq	.L103
+	mla	r2, r0, r3, r4
+	b	.L101
+.L102:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L103:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L105:
+	.align	2
+.L104:
+	.word	.LANCHOR0
+	.word	-1431655765
+	.fnend
+	.size	test_node_in_list, .-test_node_in_list
+	.align	1
 	.global	insert_data_list
 	.syntax unified
 	.thumb
@@ -869,11 +895,11 @@ insert_data_list:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
-	ldr	r2, .L113
+	ldr	r2, .L121
 	ldrh	r3, [r2, #40]
 	mov	r5, r2
 	cmp	r3, r0
-	bls	.L100
+	bls	.L108
 	movs	r4, #6
 	ldr	ip, [r2, #2316]
 	muls	r4, r0, r4
@@ -882,27 +908,27 @@ insert_data_list:
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [ip, r4]	@ movhi
 	ldr	r3, [r2, #2320]
-	cbnz	r3, .L101
+	cbnz	r3, .L109
 	str	r1, [r2, #2320]
-.L100:
+.L108:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L101:
+.L109:
 	ldrh	r6, [r1, #4]
 	lsl	r10, r0, #1
 	ldr	r8, [r2, #2324]
 	ldrh	r2, [r8, r0, lsl #1]
 	cmp	r6, #0
-	beq	.L111
+	beq	.L119
 	muls	r6, r2, r6
-.L102:
+.L110:
 	ldr	lr, [r5, #2316]
 	ldrh	r7, [r5, #40]
 	sub	r2, r3, lr
 	asr	r9, r2, #1
-	ldr	r2, .L113+4
+	ldr	r2, .L121+4
 	str	r7, [sp]
 	mul	r2, r2, r9
 	ldr	r9, [r5, #2328]
@@ -910,30 +936,30 @@ insert_data_list:
 	uxth	r2, r2
 	str	r5, [sp, #4]
 	movs	r5, #0
-.L109:
+.L117:
 	adds	r5, r5, #1
 	ldr	r7, [sp]
 	uxth	r5, r5
 	cmp	r5, r7
-	bhi	.L100
+	bhi	.L108
 	cmp	r0, r2
-	beq	.L100
+	beq	.L108
 	ldrh	r7, [r3, #4]
 	lsl	r10, r2, #1
 	ldrh	fp, [r8, r2, lsl #1]
-	cbz	r7, .L112
+	cbz	r7, .L120
 	mul	r7, r7, fp
-.L104:
+.L112:
 	cmp	r6, r7
-	bne	.L105
+	bne	.L113
 	ldr	r7, [sp, #4]
 	ldrh	r10, [r9, r10]
 	ldrh	r7, [r7]
 	cmp	r10, r7
-	bcc	.L107
-.L106:
+	bcc	.L115
+.L114:
 	strh	r2, [ip, r4]	@ movhi
-	ldr	r4, .L113
+	ldr	r4, .L121
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
 	ldr	r2, [r4, #2320]
@@ -948,33 +974,33 @@ insert_data_list:
 	mulne	r2, r2, r5
 	strhne	r0, [r1, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L100
-.L111:
+	b	.L108
+.L119:
 	mov	r6, #-1
-	b	.L102
-.L112:
+	b	.L110
+.L120:
 	mov	r7, #-1
-	b	.L104
-.L105:
-	bcc	.L106
-.L107:
+	b	.L112
+.L113:
+	bcc	.L114
+.L115:
 	ldrh	r7, [r3]
 	movw	r10, #65535
 	cmp	r7, r10
-	bne	.L108
+	bne	.L116
 	strh	r2, [r1, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L113
+	ldr	r3, .L121
 	str	r1, [r3, #2332]
-	b	.L100
-.L108:
+	b	.L108
+.L116:
 	movs	r3, #6
 	mov	r2, r7
 	mla	r3, r3, r7, lr
-	b	.L109
-.L114:
+	b	.L117
+.L122:
 	.align	2
-.L113:
+.L121:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -993,24 +1019,24 @@ INSERT_DATA_LIST:
 	push	{r3, lr}
 	.save {r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L117
+	ldr	r2, .L125
 	ldrh	r3, [r2, #2336]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #2336]	@ movhi
 	ldrh	r2, [r2, #40]
 	cmp	r2, r3
-	bcs	.L115
+	bcs	.L123
 	movs	r2, #221
-	ldr	r1, .L117+4
-	ldr	r0, .L117+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	pop	{r3, lr}
 	b	sftl_printk
-.L115:
+.L123:
 	pop	{r3, pc}
-.L118:
+.L126:
 	.align	2
-.L117:
+.L125:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LC1
@@ -1031,8 +1057,8 @@ insert_free_list:
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movw	r4, #65535
 	cmp	r0, r4
-	beq	.L120
-	ldr	r2, .L126
+	beq	.L128
+	ldr	r2, .L134
 	movs	r1, #6
 	mul	r7, r1, r0
 	ldr	ip, [r2, #2316]
@@ -1041,36 +1067,36 @@ insert_free_list:
 	strh	r4, [r6, #2]	@ movhi
 	strh	r4, [ip, r7]	@ movhi
 	ldr	r3, [r2, #2340]
-	cbnz	r3, .L121
+	cbnz	r3, .L129
 	str	r6, [r2, #2340]
-.L120:
+.L128:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L121:
+.L129:
 	ldr	lr, [r2, #2316]
 	ldr	r8, [r2, #2328]
 	sub	r2, r3, lr
 	asr	r10, r2, #1
-	ldr	r2, .L126+4
+	ldr	r2, .L134+4
 	ldrh	r9, [r8, r0, lsl #1]
 	mul	r2, r2, r10
 	mov	r10, r4
 	uxth	r2, r2
-.L124:
+.L132:
 	ldrh	r4, [r8, r2, lsl #1]
 	cmp	r4, r9
-	bcs	.L122
+	bcs	.L130
 	ldrh	r4, [r3]
 	cmp	r4, r10
-	bne	.L123
+	bne	.L131
 	strh	r2, [r6, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L120
-.L123:
+	b	.L128
+.L131:
 	mla	r3, r1, r4, lr
 	mov	r2, r4
-	b	.L124
-.L122:
+	b	.L132
+.L130:
 	ldrh	r1, [r3, #2]
 	strh	r1, [r6, #2]	@ movhi
 	strh	r2, [ip, r7]	@ movhi
@@ -1086,10 +1112,10 @@ insert_free_list:
 	mulne	r2, r2, r4
 	strhne	r0, [r1, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L120
-.L127:
+	b	.L128
+.L135:
 	.align	2
-.L126:
+.L134:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -1108,24 +1134,24 @@ INSERT_FREE_LIST:
 	push	{r3, lr}
 	.save {r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L130
+	ldr	r2, .L138
 	ldrh	r3, [r2, #2344]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #2344]	@ movhi
 	ldrh	r2, [r2, #40]
 	cmp	r2, r3
-	bcs	.L128
+	bcs	.L136
 	movs	r2, #214
-	ldr	r1, .L130+4
-	ldr	r0, .L130+8
+	ldr	r1, .L138+4
+	ldr	r0, .L138+8
 	pop	{r3, lr}
 	b	sftl_printk
-.L128:
+.L136:
 	pop	{r3, pc}
-.L131:
+.L139:
 	.align	2
-.L130:
+.L138:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+17
 	.word	.LC1
@@ -1145,7 +1171,7 @@ List_remove_node:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r4, .L138
+	ldr	r4, .L146
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1153,20 +1179,20 @@ List_remove_node:
 	adds	r5, r7, r6
 	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L133
+	bne	.L141
 	ldr	r3, [r0]
 	cmp	r5, r3
-	beq	.L133
-	movw	r2, #379
-	ldr	r1, .L138+4
-	ldr	r0, .L138+8
+	beq	.L141
+	movw	r2, #397
+	ldr	r1, .L146+4
+	ldr	r0, .L146+8
 	bl	sftl_printk
-.L133:
+.L141:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r5, r3
 	ldrh	r3, [r7, r6]
-	bne	.L134
+	bne	.L142
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r4, #2316]
@@ -1177,24 +1203,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L136:
+.L144:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r5, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L134:
+.L142:
 	cmp	r3, r1
 	ldrh	r1, [r5, #2]
-	bne	.L137
+	bne	.L145
 	cmp	r1, r3
-	beq	.L136
+	beq	.L144
 	movs	r2, #6
 	ldr	r0, [r4, #2316]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L136
-.L137:
+	b	.L144
+.L145:
 	ldr	r0, [r4, #2316]
 	movs	r2, #6
 	mla	r3, r2, r3, r0
@@ -1204,10 +1230,10 @@ List_remove_node:
 	ldr	r3, [r4, #2316]
 	muls	r2, r0, r2
 	strh	r1, [r3, r2]	@ movhi
-	b	.L136
-.L139:
+	b	.L144
+.L147:
 	.align	2
-.L138:
+.L146:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+34
 	.word	.LC1
@@ -1227,15 +1253,15 @@ List_pop_index_node:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	ldr	r3, [r0]
-	cbz	r3, .L146
-	ldr	r2, .L147
+	cbz	r3, .L154
+	ldr	r2, .L155
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2, #2316]
-.L142:
-	cbnz	r1, .L143
-.L145:
-	ldr	r4, .L147+4
+.L150:
+	cbnz	r1, .L151
+.L153:
+	ldr	r4, .L155+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1243,20 +1269,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L143:
+.L151:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L145
+	beq	.L153
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L142
-.L146:
+	b	.L150
+.L154:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L148:
+.L156:
 	.align	2
-.L147:
+.L155:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -1288,37 +1314,37 @@ List_get_gc_head_node:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L156
+	ldr	r2, .L164
 	push	{r4, lr}
 	.save {r4, lr}
 	ldr	r3, [r2, #2320]
-	cbz	r3, .L155
+	cbz	r3, .L163
 	ldr	r1, [r2, #2316]
 	movs	r4, #6
 	movw	r2, #65535
-.L152:
-	cbz	r0, .L153
+.L160:
+	cbz	r0, .L161
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L154
-.L155:
+	bne	.L162
+.L163:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L154:
+.L162:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L152
-.L153:
-	ldr	r0, .L156+4
+	b	.L160
+.L161:
+	ldr	r0, .L164+4
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L157:
+.L165:
 	.align	2
-.L156:
+.L164:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -1337,53 +1363,53 @@ List_update_data_list:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	mov	r5, r0
-	ldr	r4, .L169
+	ldr	r4, .L177
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
-	beq	.L160
+	beq	.L168
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
-	beq	.L160
+	beq	.L168
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
-	beq	.L160
+	beq	.L168
 	movs	r7, #6
 	ldr	r9, [r4, #2316]
 	muls	r7, r0, r7
 	ldr	r3, [r4, #2320]
 	add	r8, r9, r7
 	cmp	r8, r3
-	beq	.L160
+	beq	.L168
 	ldrh	r6, [r8, #4]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r6, #0
-	beq	.L167
+	beq	.L175
 	muls	r6, r3, r6
-.L162:
+.L170:
 	ldrh	r3, [r8, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L163
+	bne	.L171
 	ldrh	r2, [r9, r7]
 	cmp	r2, r3
-	bne	.L163
-	mov	r2, #470
-	ldr	r1, .L169+4
-	ldr	r0, .L169+8
+	bne	.L171
+	mov	r2, #488
+	ldr	r1, .L177+4
+	ldr	r0, .L177+8
 	bl	sftl_printk
-.L163:
+.L171:
 	ldrh	r3, [r8, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L164
+	bne	.L172
 	ldrh	r2, [r9, r7]
 	cmp	r2, r3
-	beq	.L160
-.L164:
+	beq	.L168
+.L172:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L169+12
+	ldr	r3, .L177+12
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r4, #2324]
@@ -1391,38 +1417,38 @@ List_update_data_list:
 	ldr	r1, [r4, #2316]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L168
+	cbz	r3, .L176
 	muls	r3, r0, r3
-.L165:
+.L173:
 	cmp	r6, r3
-	bcs	.L160
+	bcs	.L168
 	mov	r1, r5
-	ldr	r0, .L169+16
+	ldr	r0, .L177+16
 	bl	List_remove_node
 	ldrh	r3, [r4, #2336]
-	cbnz	r3, .L166
-	movw	r2, #481
-	ldr	r1, .L169+4
-	ldr	r0, .L169+8
+	cbnz	r3, .L174
+	movw	r2, #499
+	ldr	r1, .L177+4
+	ldr	r0, .L177+8
 	bl	sftl_printk
-.L166:
+.L174:
 	ldrh	r3, [r4, #2336]
 	mov	r0, r5
 	subs	r3, r3, #1
 	strh	r3, [r4, #2336]	@ movhi
 	bl	INSERT_DATA_LIST
-.L160:
+.L168:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L167:
+.L175:
 	mov	r6, #-1
-	b	.L162
-.L168:
+	b	.L170
+.L176:
 	mov	r3, #-1
-	b	.L165
-.L170:
+	b	.L173
+.L178:
 	.align	2
-.L169:
+.L177:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+51
 	.word	.LC1
@@ -1444,77 +1470,77 @@ select_l2p_ram_region:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r5, .L181
+	ldr	r5, .L189
 	movs	r0, #12
 	movw	r6, #65535
 	ldrh	r2, [r5, #138]
 	ldr	r3, [r5, #2492]
-.L172:
+.L180:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L174
+	bcc	.L182
 	mov	r4, r2
 	movs	r1, #0
 	mov	r7, #-2147483648
 	mov	ip, #12
-.L175:
+.L183:
 	uxth	r6, r1
 	cmp	r6, r2
-	bcc	.L177
+	bcc	.L185
 	cmp	r4, r2
-	bcc	.L173
+	bcc	.L181
 	ldrh	r7, [r5, #2496]
 	mov	r4, r2
 	movs	r1, #0
 	mov	r0, #-1
-.L178:
+.L186:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L180
+	bcc	.L188
 	cmp	r4, r2
-	bcc	.L173
-	mov	r2, #784
-	ldr	r1, .L181+4
-	ldr	r0, .L181+8
+	bcc	.L181
+	movw	r2, #823
+	ldr	r1, .L189+4
+	ldr	r0, .L189+8
 	bl	sftl_printk
-	b	.L173
-.L174:
+	b	.L181
+.L182:
 	adds	r1, r1, #1
 	mla	r7, r0, r1, r3
 	ldrh	r7, [r7, #-12]
 	cmp	r7, r6
-	bne	.L172
-.L173:
+	bne	.L180
+.L181:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L177:
+.L185:
 	mla	r0, ip, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L176
+	blt	.L184
 	cmp	r7, r0
 	itt	hi
 	movhi	r7, r0
 	movhi	r4, r6
-.L176:
+.L184:
 	adds	r1, r1, #1
-	b	.L175
-.L180:
+	b	.L183
+.L188:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L179
+	bls	.L187
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L179:
+.L187:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L178
-.L182:
+	b	.L186
+.L190:
 	.align	2
-.L181:
+.L189:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+73
 	.word	.LC1
@@ -1531,18 +1557,18 @@ FtlUpdateVaildLpn:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L189
+	ldr	r1, .L197
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
 	mov	r3, r1
 	ldrh	r2, [r1, #2498]
 	cmp	r2, #4
-	bhi	.L184
-	cbnz	r0, .L184
+	bhi	.L192
+	cbnz	r0, .L192
 	adds	r2, r2, #1
 	strh	r2, [r1, #2498]	@ movhi
 	pop	{r4, r5, pc}
-.L184:
+.L192:
 	movs	r2, #0
 	ldrh	r1, [r3, #40]
 	strh	r2, [r3, #2498]	@ movhi
@@ -1550,21 +1576,21 @@ FtlUpdateVaildLpn:
 	str	r2, [r3, #2500]
 	ldr	r2, [r3, #2324]
 	add	r1, r2, r1, lsl #1
-.L185:
+.L193:
 	cmp	r2, r1
-	bne	.L187
+	bne	.L195
 	pop	{r4, r5, pc}
-.L187:
+.L195:
 	ldrh	r4, [r2], #2
 	cmp	r4, r5
 	ittt	ne
 	ldrne	r0, [r3, #2500]
 	addne	r0, r0, r4
 	strne	r0, [r3, #2500]
-	b	.L185
-.L190:
+	b	.L193
+.L198:
 	.align	2
-.L189:
+.L197:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -1581,10 +1607,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L192
+	cbz	r1, .L200
 	b	ftl_set_blk_mode.part.6
-.L192:
-	ldr	r2, .L193
+.L200:
+	ldr	r2, .L201
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2, #24]
@@ -1594,9 +1620,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L194:
+.L202:
 	.align	2
-.L193:
+.L201:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
@@ -1612,7 +1638,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L196
+	ldr	r3, .L204
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3, #24]
@@ -1620,9 +1646,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L197:
+.L205:
 	.align	2
-.L196:
+.L204:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
@@ -1643,12 +1669,12 @@ ftl_sb_update_avl_pages:
 	strh	r3, [r0, #4]	@ movhi
 	add	r4, r0, r2, lsl #1
 	movw	r7, #65535
-	ldr	r3, .L205
+	ldr	r3, .L213
 	adds	r4, r4, #14
 	ldrh	r5, [r3, #32]
-.L199:
+.L207:
 	cmp	r2, r5
-	bcc	.L201
+	bcc	.L209
 	ldrh	r3, [r3, #102]
 	add	r4, r0, #16
 	movw	r6, #65535
@@ -1656,12 +1682,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L202:
+.L210:
 	uxth	r2, r3
 	cmp	r5, r2
-	bhi	.L204
+	bhi	.L212
 	pop	{r4, r5, r6, r7, pc}
-.L201:
+.L209:
 	ldrh	r6, [r4, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1670,8 +1696,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r6, [r0, #4]
 	addne	r6, r6, #1
 	strhne	r6, [r0, #4]	@ movhi
-	b	.L199
-.L204:
+	b	.L207
+.L212:
 	ldrh	r2, [r4], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1679,10 +1705,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L202
-.L206:
+	b	.L210
+.L214:
 	.align	2
-.L205:
+.L213:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1700,24 +1726,24 @@ FtlSlcSuperblockCheck:
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
 	.save {r4, r5, lr}
-	cbz	r3, .L207
+	cbz	r3, .L215
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L207
+	beq	.L215
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L213
+	ldr	r2, .L221
 	ldrh	r4, [r2, #32]
 	mov	r2, r3
-.L210:
+.L218:
 	cmp	r1, r2
-	beq	.L212
-.L207:
+	beq	.L220
+.L215:
 	pop	{r4, r5, pc}
-.L212:
+.L220:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1731,10 +1757,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L210
-.L214:
+	b	.L218
+.L222:
 	.align	2
-.L213:
+.L221:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -1752,27 +1778,27 @@ make_superblock:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L220
+	ldr	r6, .L228
 	ldrh	r2, [r0]
 	ldrh	r3, [r6, #40]
 	cmp	r2, r3
-	bcc	.L216
-	movw	r2, #2097
-	ldr	r1, .L220+4
-	ldr	r0, .L220+8
+	bcc	.L224
+	movw	r2, #2146
+	ldr	r1, .L228+4
+	ldr	r0, .L228+8
 	bl	sftl_printk
-.L216:
+.L224:
 	ldrh	r9, [r6, #32]
 	add	r7, r4, #16
-	ldr	r10, .L220+12
+	ldr	r10, .L228+12
 	movw	r8, #65535
 	movs	r5, #0
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L217:
+.L225:
 	uxth	r3, r5
 	cmp	r9, r3
-	bhi	.L219
+	bhi	.L227
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	movs	r0, #0
 	ldrh	r2, [r6, #102]
@@ -1781,25 +1807,25 @@ make_superblock:
 	movs	r3, #1
 	strb	r3, [r4, #9]
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L219:
+.L227:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r8, [r7]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L218
+	cbnz	r0, .L226
 	strh	fp, [r7]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L218:
+.L226:
 	adds	r5, r5, #1
 	adds	r7, r7, #2
-	b	.L217
-.L221:
+	b	.L225
+.L229:
 	.align	2
-.L220:
+.L228:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+95
 	.word	.LC1
@@ -1820,44 +1846,44 @@ update_multiplier_value:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
-	ldr	r6, .L228
+	ldr	r6, .L236
 	mov	r7, r0
 	mov	r4, r5
 	ldrh	r8, [r6, #32]
 	add	r10, r6, #60
 	ldrh	r9, [r6, #102]
-.L223:
+.L231:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L225
-	cbz	r4, .L227
+	bhi	.L233
+	cbz	r4, .L235
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L226:
+.L234:
 	ldr	r1, [r6, #2316]
 	movs	r3, #6
 	mla	r1, r3, r7, r1
 	strh	r0, [r1, #4]	@ movhi
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L225:
+.L233:
 	mov	r1, r7
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L224
+	cbnz	r0, .L232
 	add	r4, r4, r9
 	uxth	r4, r4
-.L224:
+.L232:
 	adds	r5, r5, #1
-	b	.L223
-.L227:
+	b	.L231
+.L235:
 	mov	r0, r4
-	b	.L226
-.L229:
+	b	.L234
+.L237:
 	.align	2
-.L228:
+.L236:
 	.word	.LANCHOR0
 	.fnend
 	.size	update_multiplier_value, .-update_multiplier_value
@@ -1873,22 +1899,22 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L233
+	ldr	r2, .L241
 	ldr	r0, [r2, #2340]
-	cbz	r0, .L231
+	cbz	r0, .L239
 	ldr	r3, [r2, #2316]
 	subs	r0, r0, r3
-	ldr	r3, .L233+4
+	ldr	r3, .L241+4
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
 	ldr	r3, [r2, #2328]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L231:
+.L239:
 	bx	lr
-.L234:
+.L242:
 	.align	2
-.L233:
+.L241:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -1904,11 +1930,11 @@ GetFreeBlockMaxEraseCount:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L243
+	ldr	r1, .L251
 	push	{r4, r5, r6, r7, lr}
 	.save {r4, r5, r6, r7, lr}
 	ldr	r3, [r1, #2340]
-	cbz	r3, .L241
+	cbz	r3, .L249
 	ldrh	r2, [r1, #2344]
 	movs	r6, #6
 	ldr	r4, [r1, #2316]
@@ -1920,32 +1946,32 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L243+4
+	ldr	r2, .L251+4
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L238:
+.L246:
 	uxth	r5, r2
 	cmp	r0, r5
-	bls	.L240
+	bls	.L248
 	mul	r5, r6, r3
 	adds	r2, r2, #1
 	ldrh	r5, [r4, r5]
 	cmp	r5, r7
-	bne	.L242
-.L240:
+	bne	.L250
+.L248:
 	ldr	r2, [r1, #2328]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, r7, pc}
-.L242:
+.L250:
 	mov	r3, r5
-	b	.L238
-.L241:
+	b	.L246
+.L249:
 	mov	r0, r3
 	pop	{r4, r5, r6, r7, pc}
-.L244:
+.L252:
 	.align	2
-.L243:
+.L251:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.fnend
@@ -1964,325 +1990,325 @@ FtlPrintInfo2buf:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r7, r0
-	ldr	r6, .L257
+	ldr	r6, .L265
 	add	r5, r7, #12
 	.pad #20
 	sub	sp, sp, #20
-	ldr	r1, .L257+4
+	ldr	r1, .L265+4
 	bl	strcpy
 	ldr	r2, [r6, #116]
 	mov	r0, r5
-	ldr	r1, .L257+8
+	ldr	r1, .L265+8
 	bl	sprintf
 	add	r5, r5, r0
-	ldr	r1, .L257+12
+	ldr	r1, .L265+12
 	mov	r0, r5
 	adds	r5, r5, #10
 	bl	strcpy
 	ldr	r2, [r6, #2504]
 	mov	r0, r5
-	ldr	r1, .L257+16
+	ldr	r1, .L265+16
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2500]
-	ldr	r1, .L257+20
+	ldr	r1, .L265+20
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2508]
-	ldr	r1, .L257+24
+	ldr	r1, .L265+24
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2512]
-	ldr	r1, .L257+28
+	ldr	r1, .L265+28
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2516]
-	ldr	r1, .L257+32
+	ldr	r1, .L265+32
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2520]
-	ldr	r1, .L257+36
+	ldr	r1, .L265+36
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2524]
-	ldr	r1, .L257+40
+	ldr	r1, .L265+40
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2528]
-	ldr	r1, .L257+44
+	ldr	r1, .L265+44
 	mov	r0, r5
 	bl	sprintf
 	ldr	r2, [r6, #2532]
 	add	r5, r5, r0
-	ldr	r1, .L257+48
+	ldr	r1, .L265+48
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
 	ldr	r2, [r6, #2536]
 	add	r5, r5, r0
-	ldr	r1, .L257+52
+	ldr	r1, .L265+52
 	mov	r0, r5
 	lsrs	r2, r2, #11
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2540]
-	ldr	r1, .L257+56
+	ldr	r1, .L265+56
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2544]
-	ldr	r1, .L257+60
+	ldr	r1, .L265+60
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #158]
-	ldr	r1, .L257+64
+	ldr	r1, .L265+64
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2344]
-	ldr	r1, .L257+68
+	ldr	r1, .L265+68
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2548]
-	ldr	r1, .L257+72
+	ldr	r1, .L265+72
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2552]
-	ldr	r1, .L257+76
+	ldr	r1, .L265+76
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2556]
-	ldr	r1, .L257+80
+	ldr	r1, .L265+80
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2560]
-	ldr	r1, .L257+84
+	ldr	r1, .L265+84
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2564]
-	ldr	r1, .L257+88
+	ldr	r1, .L265+88
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #2568]
-	ldr	r1, .L257+92
+	ldr	r1, .L265+92
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2298]
-	ldr	r1, .L257+96
+	ldr	r1, .L265+96
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2296]
-	ldr	r1, .L257+100
+	ldr	r1, .L265+100
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #140]
-	ldr	r1, .L257+104
+	ldr	r1, .L265+104
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #132]
-	ldr	r1, .L257+108
+	ldr	r1, .L265+108
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #28]
-	ldr	r1, .L257+112
+	ldr	r1, .L265+112
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #218]
-	ldr	r1, .L257+116
+	ldr	r1, .L265+116
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #40]
-	ldr	r1, .L257+120
+	ldr	r1, .L265+120
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2572]
-	ldr	r1, .L257+124
+	ldr	r1, .L265+124
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldr	r2, [r6, #44]
-	ldr	r1, .L257+128
+	ldr	r1, .L265+128
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2576]
-	ldr	r1, .L257+132
+	ldr	r1, .L265+132
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #152]
-	ldr	r1, .L257+136
+	ldr	r1, .L265+136
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2350]
-	ldr	r1, .L257+140
+	ldr	r1, .L265+140
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
-	ldr	r1, .L257+144
+	ldr	r1, .L265+144
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2348]
-	ldr	r1, .L257+148
+	ldr	r1, .L265+148
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
-	ldr	r1, .L257+152
+	ldr	r1, .L265+152
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2352]
-	ldr	r1, .L257+156
+	ldr	r1, .L265+156
 	mov	r0, r5
 	bl	sprintf
 	ldr	r3, [r6, #2324]
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2348]
 	mov	r0, r5
-	ldr	r1, .L257+160
+	ldr	r1, .L265+160
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2398]
-	ldr	r1, .L257+164
+	ldr	r1, .L265+164
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
-	ldr	r1, .L257+168
+	ldr	r1, .L265+168
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2396]
-	ldr	r1, .L257+172
+	ldr	r1, .L265+172
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
-	ldr	r1, .L257+176
+	ldr	r1, .L265+176
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2400]
-	ldr	r1, .L257+180
+	ldr	r1, .L265+180
 	mov	r0, r5
 	bl	sprintf
 	ldr	r3, [r6, #2324]
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2396]
 	mov	r0, r5
-	ldr	r1, .L257+184
+	ldr	r1, .L265+184
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2446]
-	ldr	r1, .L257+188
+	ldr	r1, .L265+188
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
-	ldr	r1, .L257+192
+	ldr	r1, .L265+192
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2444]
-	ldr	r1, .L257+196
+	ldr	r1, .L265+196
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
-	ldr	r1, .L257+200
+	ldr	r1, .L265+200
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2448]
-	ldr	r1, .L257+204
+	ldr	r1, .L265+204
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2590]
-	ldr	r1, .L257+208
+	ldr	r1, .L265+208
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
-	ldr	r1, .L257+212
+	ldr	r1, .L265+212
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2588]
-	ldr	r1, .L257+216
+	ldr	r1, .L265+216
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
-	ldr	r1, .L257+220
+	ldr	r1, .L265+220
 	mov	r0, r5
 	bl	sprintf
 	add	r5, r5, r0
 	ldrh	r2, [r6, #2592]
-	ldr	r1, .L257+224
+	ldr	r1, .L265+224
 	mov	r0, r5
 	bl	sprintf
 	ldr	r3, [r6, #2712]
 	add	r5, r5, r0
 	ldr	r2, [r6, #2716]
 	mov	r0, r5
-	ldr	r1, .L257+228
+	ldr	r1, .L265+228
 	str	r3, [sp]
 	ldr	r3, [r6, #2720]
 	bl	sprintf
 	adds	r4, r5, r0
 	ldr	r2, [r6, #2708]
-	ldr	r1, .L257+232
+	ldr	r1, .L265+232
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldr	r2, [r6, #2732]
-	ldr	r1, .L257+236
+	ldr	r1, .L265+236
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldrh	r2, [r6, #3148]
-	ldr	r1, .L257+240
+	ldr	r1, .L265+240
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldrh	r2, [r6, #3150]
-	ldr	r1, .L257+244
+	ldr	r1, .L265+244
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldr	r2, [r6, #3152]
-	b	.L258
-.L259:
+	b	.L266
+.L267:
 	.align	2
-.L257:
+.L265:
 	.word	.LANCHOR0
 	.word	.LC2
 	.word	.LC3
@@ -2345,60 +2371,60 @@ FtlPrintInfo2buf:
 	.word	.LC60
 	.word	.LC61
 	.word	.LC62
-.L258:
-	ldr	r1, .L260
+.L266:
+	ldr	r1, .L268
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldrh	r2, [r6, #3156]
-	ldr	r1, .L260+4
+	ldr	r1, .L268+4
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L260+8
+	ldr	r1, .L268+8
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
 	add	r4, r4, r0
 	ldrh	r0, [r6, #2344]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L260+12
+	ldr	r1, .L268+12
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-	ldr	r3, .L260+16
+	ldr	r3, .L268+16
 	add	r4, r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L246
-.L251:
+	beq	.L254
+.L259:
 	subs	r0, r4, r7
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L246:
+.L254:
 	ldrh	r3, [r6, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L248
+	beq	.L256
 	ldr	r2, [r6, #2324]
 	mov	r0, r4
-	ldr	r1, .L260+20
+	ldr	r1, .L268+20
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
 	add	r4, r4, r0
-.L248:
+.L256:
 	movs	r0, #0
-	ldr	r9, .L260+28
+	ldr	r9, .L268+28
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	movs	r5, #0
 	movw	fp, #65535
 	mov	r10, #6
-.L250:
+.L258:
 	cmp	r3, fp
-	beq	.L249
+	beq	.L257
 	ldr	r2, [r6, #2328]
 	mul	r8, r10, r3
 	mov	r0, r4
@@ -2419,22 +2445,22 @@ FtlPrintInfo2buf:
 	cmp	r5, #16
 	add	r4, r4, r0
 	ldrh	r3, [r3, r8]
-	bne	.L250
-.L249:
+	bne	.L258
+.L257:
 	ldr	r2, [r6, #2316]
 	movs	r5, #0
 	ldr	r3, [r6, #2340]
 	movw	r9, #65535
-	ldr	fp, .L260+32
+	ldr	fp, .L268+32
 	mov	r10, #6
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L260+24
+	ldr	r3, .L268+24
 	muls	r3, r2, r3
 	uxth	r3, r3
-.L252:
+.L260:
 	cmp	r3, r9
-	beq	.L251
+	beq	.L259
 	ldr	r2, [r6, #2328]
 	mul	r8, r10, r3
 	mov	r0, r4
@@ -2450,13 +2476,13 @@ FtlPrintInfo2buf:
 	bl	sprintf
 	cmp	r5, #4
 	add	r4, r4, r0
-	beq	.L251
+	beq	.L259
 	ldr	r3, [r6, #2316]
 	ldrh	r3, [r3, r8]
-	b	.L252
-.L261:
+	b	.L260
+.L269:
 	.align	2
-.L260:
+.L268:
 	.word	.LC63
 	.word	.LC64
 	.word	.LC65
@@ -2482,8 +2508,8 @@ rknand_proc_ftlread:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r2, .L263
-	ldr	r1, .L263+4
+	ldr	r2, .L271
+	ldr	r1, .L271+4
 	bl	sprintf
 	adds	r4, r5, r0
 	mov	r0, r4
@@ -2491,9 +2517,9 @@ rknand_proc_ftlread:
 	add	r0, r0, r4
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
-.L264:
+.L272:
 	.align	2
-.L263:
+.L271:
 	.word	.LC70
 	.word	.LC71
 	.fnend
@@ -2513,18 +2539,18 @@ GetSwlReplaceBlock:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #28
 	sub	sp, sp, #28
-	ldr	r4, .L289
+	ldr	r4, .L297
 	ldr	r2, [r4, #2556]
 	ldr	r3, [r4, #2568]
 	cmp	r2, r3
-	bcs	.L266
+	bcs	.L274
 	ldrh	r1, [r4, #40]
 	movs	r3, #0
 	ldr	r0, [r4, #2328]
 	str	r3, [r4, #2548]
-.L267:
+.L275:
 	cmp	r3, r1
-	bcc	.L268
+	bcc	.L276
 	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__aeabi_uidiv
@@ -2534,48 +2560,48 @@ GetSwlReplaceBlock:
 	subs	r0, r5, r0
 	bl	__aeabi_uidiv
 	str	r0, [r4, #2548]
-.L269:
+.L277:
 	ldr	r6, [r4, #2568]
 	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L274
+	bls	.L282
 	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L274
-.L276:
+	bls	.L282
+.L284:
 	movw	r5, #65535
-.L275:
+.L283:
 	mov	r0, r5
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L268:
+.L276:
 	ldrh	r2, [r0, r3, lsl #1]
 	adds	r3, r3, #1
 	ldr	r5, [r4, #2548]
 	add	r2, r2, r5
 	str	r2, [r4, #2548]
-	b	.L267
-.L266:
+	b	.L275
+.L274:
 	ldr	r3, [r4, #2564]
 	cmp	r2, r3
-	bls	.L269
+	bls	.L277
 	adds	r3, r3, #1
 	str	r3, [r4, #2564]
 	movs	r3, #0
-.L271:
+.L279:
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	bcs	.L269
+	bcs	.L277
 	ldr	r1, [r4, #2328]
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	b	.L271
-.L274:
+	b	.L279
+.L282:
 	ldrh	r0, [r4, #2344]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
@@ -2583,10 +2609,10 @@ GetSwlReplaceBlock:
 	add	r3, r6, #64
 	mov	r9, r0
 	cmp	r0, r3
-	bcc	.L276
+	bcc	.L284
 	ldr	r3, [r4, #2320]
 	cmp	r3, #0
-	beq	.L276
+	beq	.L284
 	ldrh	r2, [r4, #40]
 	movw	r1, #65535
 	ldr	lr, [r4, #2316]
@@ -2596,42 +2622,42 @@ GetSwlReplaceBlock:
 	str	r2, [sp, #20]
 	mov	fp, #6
 	mov	r2, r1
-.L277:
+.L285:
 	ldrh	ip, [r3]
 	cmp	ip, r10
-	bne	.L280
+	bne	.L288
 	mov	r5, r2
-.L279:
+.L287:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L276
+	beq	.L284
 	ldrh	r10, [r8, r5, lsl #1]
 	lsl	fp, r5, #1
 	cmp	r6, r10
-	bcs	.L281
+	bcs	.L289
 	bl	GetFreeBlockMinEraseCount
 	cmp	r6, r0
 	it	cc
 	strcc	r1, [r4, #2568]
-.L281:
+.L289:
 	cmp	r7, r10
-	bls	.L276
+	bls	.L284
 	add	r3, r10, #128
 	cmp	r9, r3
-	ble	.L276
+	ble	.L284
 	add	r3, r10, #256
 	cmp	r7, r3
-	bhi	.L282
+	bhi	.L290
 	ldr	r3, [r4, #2564]
 	add	r10, r10, #768
 	cmp	r10, r3
-	bcs	.L276
-.L282:
+	bcs	.L284
+.L290:
 	str	r9, [sp, #8]
 	mov	r2, r7
 	ldrh	r3, [r8, fp]
 	mov	r1, r5
-	ldr	r0, .L289+4
+	ldr	r0, .L297+4
 	str	r3, [sp, #4]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, fp]
@@ -2640,33 +2666,33 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	movs	r3, #1
 	str	r3, [r4, #3160]
-	b	.L275
-.L280:
+	b	.L283
+.L288:
 	adds	r0, r0, #1
 	ldr	r5, [sp, #20]
 	uxth	r0, r0
 	cmp	r0, r5
-	bhi	.L276
+	bhi	.L284
 	ldrh	r5, [r3, #4]
-	cbz	r5, .L278
-	ldr	r5, .L289+8
+	cbz	r5, .L286
+	ldr	r5, .L297+8
 	sub	r3, r3, lr
 	asrs	r3, r3, #1
 	muls	r3, r5, r3
 	uxth	r5, r3
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r6, r3
-	bcs	.L279
+	bcs	.L287
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
 	movhi	r2, r5
-.L278:
+.L286:
 	mla	r3, fp, ip, lr
-	b	.L277
-.L290:
+	b	.L285
+.L298:
 	.align	2
-.L289:
+.L297:
 	.word	.LANCHOR0
 	.word	.LC72
 	.word	-1431655765
@@ -2687,18 +2713,18 @@ free_data_superblock:
 	push	{r3, lr}
 	.save {r3, lr}
 	cmp	r0, r2
-	beq	.L292
-	ldr	r2, .L293
+	beq	.L300
+	ldr	r2, .L301
 	movs	r1, #0
 	ldr	r2, [r2, #2324]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L292:
+.L300:
 	movs	r0, #0
 	pop	{r3, pc}
-.L294:
+.L302:
 	.align	2
-.L293:
+.L301:
 	.word	.LANCHOR0
 	.fnend
 	.size	free_data_superblock, .-free_data_superblock
@@ -2719,29 +2745,29 @@ get_new_active_ppa:
 	ldrh	r2, [r0]
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L296
-	movw	r2, #2707
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	bne	.L304
+	movw	r2, #2776
+	ldr	r1, .L317
+	ldr	r0, .L317+4
 	bl	sftl_printk
-.L296:
-	ldr	r5, .L309+8
+.L304:
+	ldr	r5, .L317+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r2, r3
-	bne	.L297
-	movw	r2, #2708
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	bne	.L305
+	movw	r2, #2777
+	ldr	r1, .L317
+	ldr	r0, .L317+4
 	bl	sftl_printk
-.L297:
+.L305:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L298
-	movw	r2, #2709
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	cbnz	r3, .L306
+	movw	r2, #2778
+	ldr	r1, .L317
+	ldr	r0, .L317+4
 	bl	sftl_printk
-.L298:
+.L306:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	ldrh	r1, [r5, #32]
@@ -2750,10 +2776,10 @@ get_new_active_ppa:
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
 	mov	r2, r3
-.L299:
+.L307:
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L301
+	beq	.L309
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	subs	r2, r2, #1
@@ -2761,7 +2787,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L303:
+.L311:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2773,21 +2799,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L303
+	beq	.L311
 	strb	r3, [r4, #6]
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r1, r3
-	bne	.L295
-	cbz	r2, .L295
-	movw	r2, #2730
-	ldr	r1, .L309
-	ldr	r0, .L309+4
+	bne	.L303
+	cbz	r2, .L303
+	movw	r2, #2799
+	ldr	r1, .L317
+	ldr	r0, .L317+4
 	bl	sftl_printk
-.L295:
+.L303:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L301:
+.L309:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2800,10 +2826,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L299
-.L310:
+	b	.L307
+.L318:
 	.align	2
-.L309:
+.L317:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
@@ -2820,7 +2846,7 @@ FtlGcBufInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L320
+	ldr	r3, .L328
 	mov	ip, #20
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
@@ -2829,21 +2855,21 @@ FtlGcBufInit:
 	movs	r2, #0
 	mov	r7, r3
 	str	r2, [r3, #3164]
-.L312:
+.L320:
 	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	adds	r4, r2, #1
 	cmp	r0, r1
-	bcc	.L315
-	ldr	r7, .L320
+	bcc	.L323
+	ldr	r7, .L328
 	mov	ip, #12
 	movs	r6, #0
-.L316:
+.L324:
 	ldr	r2, [r3, #3184]
 	cmp	r1, r2
-	bcc	.L319
+	bcc	.L327
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L315:
+.L323:
 	uxth	r2, r2
 	ldr	r8, [r3, #3168]
 	mul	lr, r9, r2
@@ -2874,8 +2900,8 @@ FtlGcBufInit:
 	ldr	r1, [r8, #4]
 	str	r1, [r2, #12]
 	mov	r2, r4
-	b	.L312
-.L319:
+	b	.L320
+.L327:
 	mul	r0, ip, r1
 	ldr	r4, [r3, #3168]
 	ldr	r5, [r3, #3172]
@@ -2900,10 +2926,10 @@ FtlGcBufInit:
 	add	r2, r2, r4
 	uxth	r1, r1
 	str	r2, [r0, #4]
-	b	.L316
-.L321:
+	b	.L324
+.L329:
 	.align	2
-.L320:
+.L328:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -2918,7 +2944,7 @@ FtlGcBufFree:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L329
+	ldr	r3, .L337
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
@@ -2927,32 +2953,32 @@ FtlGcBufFree:
 	mov	r8, r5
 	ldr	ip, [r3, #3184]
 	ldr	r6, [r3, #3168]
-.L323:
+.L331:
 	uxth	r3, r5
 	cmp	r1, r3
-	bls	.L322
+	bls	.L330
 	mla	r4, r10, r3, r0
 	movs	r2, #0
-.L324:
+.L332:
 	uxth	r3, r2
 	cmp	ip, r3
-	bls	.L325
+	bls	.L333
 	mul	r3, lr, r3
 	ldr	r7, [r4, #8]
 	adds	r2, r2, #1
 	add	r9, r6, r3
 	ldr	r3, [r6, r3]
 	cmp	r3, r7
-	bne	.L324
+	bne	.L332
 	str	r8, [r9, #8]
-.L325:
+.L333:
 	adds	r5, r5, #1
-	b	.L323
-.L322:
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+	b	.L331
 .L330:
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
+.L338:
 	.align	2
-.L329:
+.L337:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2967,7 +2993,7 @@ FtlGcBufAlloc:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L338
+	ldr	r3, .L346
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
@@ -2976,34 +3002,34 @@ FtlGcBufAlloc:
 	mov	r8, #20
 	ldr	r5, [r3, #3184]
 	ldr	r6, [r3, #3168]
-.L332:
+.L340:
 	uxth	r2, r4
 	cmp	r1, r2
-	bhi	.L336
+	bhi	.L344
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L336:
+.L344:
 	mov	r9, #0
-.L333:
+.L341:
 	uxth	r3, r9
 	cmp	r5, r3
-	bls	.L334
+	bls	.L342
 	mla	r3, ip, r3, r6
 	add	r9, r9, #1
 	ldr	r7, [r3, #8]
 	cmp	r7, #0
-	bne	.L333
+	bne	.L341
 	mla	r2, r8, r2, r0
 	ldr	r7, [r3]
 	str	lr, [r3, #8]
 	str	r7, [r2, #8]
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L334:
+.L342:
 	adds	r4, r4, #1
-	b	.L332
-.L339:
+	b	.L340
+.L347:
 	.align	2
-.L338:
+.L346:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -3019,24 +3045,24 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L345
+	ldr	r2, .L353
 	ldr	r3, [r2, #3188]
 	ldrh	r2, [r2, #3192]
 	add	r2, r3, r2, lsl #1
-.L341:
+.L349:
 	cmp	r3, r2
-	bne	.L343
+	bne	.L351
 	movs	r0, #0
 	bx	lr
-.L343:
+.L351:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L341
+	bne	.L349
 	movs	r0, #1
 	bx	lr
-.L346:
+.L354:
 	.align	2
-.L345:
+.L353:
 	.word	.LANCHOR0
 	.fnend
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3059,26 +3085,26 @@ FtlGcUpdatePage:
 	mov	r7, r2
 	movs	r4, #0
 	bl	P2V_block_in_plane
-	ldr	r3, .L351
+	ldr	r3, .L359
 	ldrh	r1, [r3, #3192]
 	ldr	r2, [r3, #3188]
-.L348:
+.L356:
 	uxth	ip, r4
 	cmp	ip, r1
-	bcc	.L350
-	bne	.L349
+	bcc	.L358
+	bne	.L357
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r0, [r3, #3192]
 	adds	r0, r0, #1
 	strh	r0, [r3, #3192]	@ movhi
-	b	.L349
-.L350:
+	b	.L357
+.L358:
 	adds	r4, r4, #1
 	add	ip, r2, r4, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L348
-.L349:
+	bne	.L356
+.L357:
 	ldrh	r2, [r3, #3200]
 	movs	r0, #12
 	muls	r0, r2, r0
@@ -3091,9 +3117,9 @@ FtlGcUpdatePage:
 	adds	r2, r2, #1
 	strh	r2, [r3, #3200]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L352:
+.L360:
 	.align	2
-.L351:
+.L359:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -3108,34 +3134,50 @@ FtlGcRefreshBlock:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
+	push	{r4, r5, r6, lr}
+	.save {r4, r5, r6, lr}
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L356
+	ldr	r0, .L366
 	bl	sftl_printk
-	ldr	r3, .L356+4
-	ldrh	r0, [r3, #3202]
+	ldr	r3, .L366+4
+	ldrh	r6, [r3, #3202]
+	cmp	r4, r6
+	beq	.L362
+	ldrh	r5, [r3, #3204]
+	cmp	r4, r5
+	beq	.L362
+	ldrh	r0, [r3, #3206]
 	cmp	r4, r0
-	beq	.L354
-	ldrh	r1, [r3, #3204]
+	beq	.L362
+	ldrh	r1, [r3, #3208]
 	cmp	r4, r1
-	beq	.L354
+	beq	.L362
 	movw	r2, #65535
-	cmp	r0, r2
-	bne	.L355
+	cmp	r6, r2
+	bne	.L363
 	strh	r4, [r3, #3202]	@ movhi
-.L354:
+.L362:
 	movs	r0, #0
-	pop	{r4, pc}
-.L355:
+	pop	{r4, r5, r6, pc}
+.L363:
+	cmp	r5, r2
+	bne	.L364
+	strh	r4, [r3, #3204]	@ movhi
+	b	.L362
+.L364:
+	cmp	r0, r2
+	bne	.L365
+	strh	r4, [r3, #3206]	@ movhi
+	b	.L362
+.L365:
 	cmp	r1, r2
 	it	eq
-	strheq	r4, [r3, #3204]	@ movhi
-	b	.L354
-.L357:
+	strheq	r4, [r3, #3208]	@ movhi
+	b	.L362
+.L367:
 	.align	2
-.L356:
+.L366:
 	.word	.LC73
 	.word	.LANCHOR0
 	.fnend
@@ -3154,41 +3196,41 @@ FtlGcMarkBadPhyBlk:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L362
+	ldr	r4, .L372
 	bl	P2V_block_in_plane
 	mov	r2, r5
 	mov	r6, r0
-	ldrh	r1, [r4, #3206]
-	ldr	r0, .L362+4
+	ldrh	r1, [r4, #3210]
+	ldr	r0, .L372+4
 	bl	sftl_printk
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #3206]
+	ldrh	r3, [r4, #3210]
 	movs	r2, #0
-	addw	r0, r4, #3208
-.L359:
+	addw	r0, r4, #3212
+.L369:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L361
+	bhi	.L371
 	cmp	r3, #15
 	itttt	ls
 	addls	r2, r3, #1
-	strhls	r2, [r4, #3206]	@ movhi
+	strhls	r2, [r4, #3210]	@ movhi
 	addls	r4, r4, r3, lsl #1
-	strhls	r5, [r4, #3208]	@ movhi
-	b	.L360
-.L361:
+	strhls	r5, [r4, #3212]	@ movhi
+	b	.L370
+.L371:
 	adds	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L359
-.L360:
+	bne	.L369
+.L370:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L363:
+.L373:
 	.align	2
-.L362:
+.L372:
 	.word	.LANCHOR0
 	.word	.LC74
 	.fnend
@@ -3206,32 +3248,32 @@ FtlGcReFreshBadBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L370
-	ldrh	r3, [r4, #3206]
-	cbz	r3, .L365
+	ldr	r4, .L380
+	ldrh	r3, [r4, #3210]
+	cbz	r3, .L375
 	ldrh	r1, [r4, #3202]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L365
-	ldrh	r2, [r4, #3242]
+	bne	.L375
+	ldrh	r2, [r4, #3246]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
-	strhcs	r3, [r4, #3242]	@ movhi
-	ldrh	r3, [r4, #3242]
+	strhcs	r3, [r4, #3246]	@ movhi
+	ldrh	r3, [r4, #3246]
 	add	r3, r4, r3, lsl #1
-	ldrh	r0, [r3, #3208]
+	ldrh	r0, [r3, #3212]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #3242]
+	ldrh	r3, [r4, #3246]
 	adds	r3, r3, #1
-	strh	r3, [r4, #3242]	@ movhi
-.L365:
+	strh	r3, [r4, #3246]	@ movhi
+.L375:
 	movs	r0, #0
 	pop	{r4, pc}
-.L371:
+.L381:
 	.align	2
-.L370:
+.L380:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -3247,11 +3289,11 @@ ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r1, .L373
+	ldr	r1, .L383
 	b	__kmalloc
-.L374:
+.L384:
 	.align	2
-.L373:
+.L383:
 	.word	37748929
 	.fnend
 	.size	ftl_malloc, .-ftl_malloc
@@ -3284,54 +3326,54 @@ rknand_print_hex:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r6, #0
-	ldr	fp, .L385+16
+	ldr	fp, .L395+16
 	mov	r10, r0
 	mov	r7, r1
 	mov	r8, r2
 	mov	r9, r3
 	mov	r5, r6
 	mov	r4, r6
-.L377:
+.L387:
 	cmp	r4, r9
-	bcc	.L383
-	ldr	r0, .L385
+	bcc	.L393
+	ldr	r0, .L395
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	b	sftl_printk
-.L383:
-	cbnz	r5, .L378
+.L393:
+	cbnz	r5, .L388
 	mov	r3, r6
 	mov	r2, r7
 	mov	r1, r10
-	ldr	r0, .L385+4
+	ldr	r0, .L395+4
 	bl	sftl_printk
-.L378:
+.L388:
 	cmp	r8, #4
-	bne	.L379
+	bne	.L389
 	ldr	r1, [r7, r4, lsl #2]
-	ldr	r0, .L385+8
-.L384:
+	ldr	r0, .L395+8
+.L394:
 	adds	r5, r5, #1
 	bl	sftl_printk
 	cmp	r5, #15
-	bls	.L382
+	bls	.L392
 	movs	r5, #0
-	ldr	r0, .L385
+	ldr	r0, .L395
 	bl	sftl_printk
-.L382:
+.L392:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L377
-.L379:
+	b	.L387
+.L389:
 	cmp	r8, #2
 	ittee	eq
 	ldrheq	r1, [r7, r4, lsl #1]
 	moveq	r0, fp
 	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
-	ldrne	r0, .L385+12
-	b	.L384
-.L386:
+	ldrne	r0, .L395+12
+	b	.L394
+.L396:
 	.align	2
-.L385:
+.L395:
 	.word	.LC79
 	.word	.LC75
 	.word	.LC76
@@ -3354,30 +3396,30 @@ FlashReadPages:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	mov	r8, r1
-	ldr	r5, .L405
+	ldr	r5, .L415
 	mov	r4, r0
 	movs	r6, #0
-	ldr	r10, .L405+4
+	ldr	r10, .L415+4
 	ldrh	r9, [r5, #12]
-	ldr	fp, .L405+8
-.L388:
+	ldr	fp, .L415+8
+.L398:
 	cmp	r6, r8
-	bne	.L395
+	bne	.L405
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L395:
+.L405:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L389
+	cbz	r3, .L399
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L390
-.L389:
+	cbnz	r3, .L400
+.L399:
 	movs	r2, #101
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L390:
+.L400:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r4
@@ -3386,43 +3428,43 @@ FlashReadPages:
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-	ldr	r7, [r5, #3256]
+	ldr	r7, [r5, #3260]
 	blx	r7
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L392
+	bne	.L402
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #8
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	ldr	r7, [r5, #3256]
+	ldr	r7, [r5, #3260]
 	add	r1, r1, r9
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L393
+	beq	.L403
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L392
+	bne	.L402
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L392
+	bne	.L402
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L392
-.L393:
+	beq	.L402
+.L403:
 	mov	r3, #-1
 	str	r3, [r4]
-.L392:
+.L402:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L388
-.L406:
+	b	.L398
+.L416:
 	.align	2
-.L405:
+.L415:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3442,51 +3484,51 @@ FtlLoadFactoryBbt:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r6, #0
-	ldr	r4, .L417
+	ldr	r4, .L427
 	movw	r10, #61664
-	ldr	r3, [r4, #3280]
+	ldr	r3, [r4, #3284]
 	add	r7, r4, #162
-	ldr	r8, [r4, #3284]
-	addw	r9, r4, #3260
-	str	r3, [r4, #3268]
-	str	r8, [r4, #3272]
-.L408:
+	ldr	r8, [r4, #3288]
+	add	r9, r4, #3264
+	str	r3, [r4, #3272]
+	str	r8, [r4, #3276]
+.L418:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L413
+	bcc	.L423
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L413:
+.L423:
 	ldrh	r5, [r4, #98]
 	movw	r3, #65535
 	strh	r3, [r7, #2]!	@ movhi
-.L410:
+.L420:
 	ldrh	r3, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L411
+	ble	.L421
 	mla	r3, r6, r3, r5
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r9
 	lsls	r3, r3, #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L410
+	beq	.L420
 	ldrh	r3, [r8]
 	cmp	r3, r10
-	bne	.L410
+	bne	.L420
 	strh	r5, [r7]	@ movhi
-.L411:
+.L421:
 	adds	r6, r6, #1
-	b	.L408
-.L418:
+	b	.L418
+.L428:
 	.align	2
-.L417:
+.L427:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -3501,69 +3543,72 @@ FtlGetLastWrittenPage:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L427
+	ldr	r3, .L440
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
-	lsl	r7, r0, #10
+	lsl	r6, r0, #10
 	.pad #88
 	sub	sp, sp, #88
 	mov	r2, r1
-	mov	r6, r1
+	mov	r7, r1
 	it	eq
-	ldrheq	r4, [r3, #104]
+	ldrheq	r5, [r3, #104]
 	mov	r1, #1
 	it	ne
-	ldrhne	r4, [r3, #102]
+	ldrhne	r5, [r3, #102]
 	add	r0, sp, #4
-	ldr	r3, .L427+4
-	subs	r4, r4, #1
-	sxth	r5, r4
+	ldr	r3, .L440+4
+	subs	r5, r5, #1
+	sxth	r5, r5
 	str	r3, [sp, #12]
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-	orr	r3, r5, r7
+	orr	r3, r5, r6
 	str	r3, [sp, #8]
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L422
+	bne	.L432
 	mov	r8, #0
-.L423:
+.L433:
 	cmp	r8, r5
-	ble	.L426
-.L422:
+	ble	.L436
+.L432:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L426:
-	add	r4, r8, r5
-	mov	r2, r6
-	add	r4, r4, r4, lsr #31
+.L436:
+	add	r3, r8, r5
+	mov	r2, r7
+	add	r3, r3, r3, lsr #31
 	movs	r1, #1
 	add	r0, sp, #4
-	asrs	r4, r4, #1
+	asrs	r4, r3, #1
 	sxth	r3, r4
-	orrs	r3, r3, r7
+	orrs	r3, r3, r6
 	str	r3, [sp, #8]
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L424
+	bne	.L434
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L424
+	bne	.L434
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L434
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L423
-.L424:
+	b	.L433
+.L434:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L423
-.L428:
+	b	.L433
+.L441:
 	.align	2
-.L427:
+.L440:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -3582,7 +3627,7 @@ FlashProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	fp, r1
-	ldr	r6, .L459
+	ldr	r6, .L472
 	mov	r9, r2
 	mov	r4, r0
 	mov	r5, r0
@@ -3591,28 +3636,28 @@ FlashProgPages:
 	sub	sp, sp, #44
 	ldrh	r10, [r6, #12]
 	str	r3, [sp, #4]
-.L430:
+.L443:
 	cmp	r8, fp
-	bne	.L438
+	bne	.L451
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L445
-.L458:
+	bne	.L458
+.L471:
 	movs	r0, #0
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L438:
+.L451:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L431
+	cbz	r3, .L444
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L432
-.L431:
+	cbnz	r3, .L445
+.L444:
 	movs	r2, #131
-	ldr	r1, .L459+4
-	ldr	r0, .L459+8
+	ldr	r1, .L472+4
+	ldr	r0, .L472+8
 	bl	sftl_printk
-.L432:
+.L445:
 	add	r2, sp, #12
 	add	r1, sp, #16
 	mov	r0, r5
@@ -3621,40 +3666,40 @@ FlashProgPages:
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	ldr	r7, [r6, #3252]
+	ldr	r7, [r6, #3256]
 	blx	r7
-	cbnz	r0, .L433
+	cbnz	r0, .L446
 	str	r0, [r5]
-.L434:
+.L447:
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L436
+	bne	.L449
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	adds	r3, r3, #8
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	add	r2, r2, #2048
-	ldr	r7, [r6, #3252]
+	ldr	r7, [r6, #3256]
 	add	r1, r1, r10
 	blx	r7
-	cbz	r0, .L436
+	cbz	r0, .L449
 	mov	r3, #-1
 	str	r3, [r5]
-.L436:
+.L449:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L430
-.L433:
+	b	.L443
+.L446:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L434
-.L443:
+	b	.L447
+.L456:
 	movs	r3, #0
 	mov	r2, r9
 	str	r3, [r7]
 	movs	r1, #1
-	str	r3, [r6, #3288]
+	str	r3, [r6, #3292]
 	add	r0, sp, #20
 	ldr	r3, [r4, #4]
 	str	r7, [sp, #28]
@@ -3663,60 +3708,60 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [sp, #20]
 	adds	r2, r3, #1
-	bne	.L440
+	bne	.L453
 	ldr	r1, [r4, #4]
 	mov	r0, fp
 	str	r3, [sp, #4]
 	bl	sftl_printk
 	ldr	r3, [sp, #4]
 	str	r3, [r4]
-.L440:
+.L453:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L441
+	cbz	r3, .L454
 	ldr	r2, [r3]
-	ldr	r3, [r6, #3288]
+	ldr	r3, [r6, #3292]
 	cmp	r2, r3
-	beq	.L441
+	beq	.L454
 	ldr	r1, [r4, #4]
-	ldr	r0, .L459+12
+	ldr	r0, .L472+12
 	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L441:
+.L454:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L442
+	cbz	r3, .L455
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L442
+	beq	.L455
 	ldr	r1, [r4, #4]
-	ldr	r0, .L459+16
+	ldr	r0, .L472+16
 	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L442:
+.L455:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-.L439:
+.L452:
 	cmp	r8, r5
-	bne	.L443
-	b	.L458
-.L445:
+	bne	.L456
+	b	.L471
+.L458:
 	movs	r5, #0
-	ldr	r7, .L459+20
-	ldr	r10, .L459+24
-	ldr	fp, .L459+28
-	b	.L439
-.L460:
+	ldr	r7, .L472+20
+	ldr	r10, .L472+24
+	ldr	fp, .L472+28
+	b	.L452
+.L473:
 	.align	2
-.L459:
+.L472:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
 	.word	.LC81
 	.word	.LC82
 	.word	check_buf
-	.word	.LANCHOR0+3288
+	.word	.LANCHOR0+3292
 	.word	.LC80
 	.fnend
 	.size	FlashProgPages, .-FlashProgPages
@@ -3735,24 +3780,24 @@ FlashEraseBlocks:
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
 	mov	r7, r2
-	ldr	r4, .L472
+	ldr	r4, .L485
 	mov	r5, r0
 	movs	r6, #0
 	mov	r9, #-1
 	ldrh	r8, [r4, #12]
-.L462:
+.L475:
 	cmp	r6, r7
-	bne	.L468
+	bne	.L481
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L468:
+.L481:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	l2p_addr_tran
-	ldr	r3, [r4, #3248]
+	ldr	r3, [r4, #3252]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
@@ -3763,21 +3808,21 @@ FlashEraseBlocks:
 	str	r3, [r5]
 	ldrh	r3, [r4, #14]
 	cmp	r3, #4
-	bne	.L466
+	bne	.L479
 	ldr	r1, [sp, #4]
-	ldr	r3, [r4, #3248]
+	ldr	r3, [r4, #3252]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r1, r1, r8
 	blx	r3
-	cbz	r0, .L466
+	cbz	r0, .L479
 	str	r9, [r5]
-.L466:
+.L479:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L462
-.L473:
+	b	.L475
+.L486:
 	.align	2
-.L472:
+.L485:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -3799,15 +3844,15 @@ FtlFreeSysBlkQueueIn:
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L474
-	ldr	r4, .L483
+	bhi	.L487
+	ldr	r4, .L496
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
-	beq	.L474
-	cbz	r1, .L476
+	beq	.L487
+	cbz	r1, .L489
 	bl	P2V_block_in_plane
 	mov	r6, r0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -3820,7 +3865,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	adds	r3, r3, #1
 	str	r3, [r4, #2560]
-.L476:
+.L489:
 	ldrh	r3, [r4, #218]
 	adds	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3830,11 +3875,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
-.L474:
+.L487:
 	pop	{r4, r5, r6, pc}
-.L484:
+.L497:
 	.align	2
-.L483:
+.L496:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -3852,7 +3897,7 @@ FtlLowFormatEraseBlock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, #0
-	ldr	r4, .L530
+	ldr	r4, .L543
 	mov	r7, r1
 	mov	r6, r10
 	mov	r5, r10
@@ -3861,82 +3906,82 @@ FtlLowFormatEraseBlock:
 	sub	sp, sp, #20
 	mov	fp, r4
 	str	r0, [sp]
-	str	r0, [r4, #3804]
-.L486:
+	str	r0, [r4, #3808]
+.L499:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r10
 	cmp	r1, r3
-	bhi	.L491
+	bhi	.L504
 	cmp	r6, #0
-	beq	.L485
+	beq	.L498
 	mov	r8, #0
 	mov	r9, #20
 	mov	r2, r6
 	movs	r1, #0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	bl	FlashEraseBlocks
-.L494:
+.L507:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L496
+	bhi	.L509
 	cmp	r7, #0
-	beq	.L513
+	beq	.L526
 	ldrh	r3, [r4, #104]
 	mov	r10, #1
 	str	r3, [sp, #4]
 	lsrs	r3, r3, #2
 	str	r3, [sp, #8]
-.L497:
+.L510:
 	mov	r8, #0
 	mov	fp, #20
-.L507:
+.L520:
 	mov	r9, #0
 	mov	r6, r9
-.L498:
+.L511:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r9
 	cmp	r1, r3
-	bhi	.L502
-	cbz	r6, .L485
+	bhi	.L515
+	cbz	r6, .L498
 	mov	r9, #0
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r6
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	bl	FlashProgPages
-.L504:
+.L517:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L506
+	bhi	.L519
 	ldr	r3, [sp, #8]
 	add	r8, r8, r3
 	ldr	r3, [sp, #4]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L507
+	bhi	.L520
 	mov	r8, #0
 	mov	r9, #20
-.L508:
+.L521:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L510
+	bhi	.L523
 	ldr	r3, [sp]
 	cmp	r3, #63
-	bls	.L511
-	cbz	r7, .L485
-.L511:
+	bls	.L524
+	cbz	r7, .L498
+.L524:
 	mov	r2, r6
 	mov	r1, r10
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	bl	FlashEraseBlocks
-.L485:
+.L498:
 	mov	r0, r5
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L491:
+.L504:
 	uxth	r3, r10
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	movs	r2, #0
 	mul	r1, r9, r3
 	add	r3, r3, r4
@@ -3945,19 +3990,19 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r8, r0
-	cbz	r7, .L487
+	cbz	r7, .L500
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L488
-.L487:
+	cbnz	r0, .L501
+.L500:
 	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L489
-	ldr	r1, [r4, #3800]
+	cbnz	r0, .L502
+	ldr	r1, [r4, #3804]
 	lsl	r3, r8, #10
-	ldr	r0, [fp, #3812]
+	ldr	r0, [fp, #3816]
 	mla	r1, r9, r6, r1
 	str	r3, [r1, #4]
-	ldr	r3, [r4, #3808]
+	ldr	r3, [r4, #3812]
 	str	r3, [r1, #8]
 	ldrh	r3, [r4, #112]
 	muls	r3, r6, r3
@@ -3968,38 +4013,38 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L488:
+.L501:
 	add	r10, r10, #1
-	b	.L486
-.L489:
+	b	.L499
+.L502:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L488
-.L496:
+	b	.L501
+.L509:
 	mul	r3, r9, r8
-	ldr	r2, [r4, #3800]
+	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L495
+	bne	.L508
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L495:
+.L508:
 	add	r8, r8, #1
-	b	.L494
-.L513:
+	b	.L507
+.L526:
 	movs	r3, #6
 	mov	r10, r7
 	str	r3, [sp, #8]
 	movs	r3, #1
 	str	r3, [sp, #4]
-	b	.L497
-.L502:
+	b	.L510
+.L515:
 	uxth	r3, r9
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	movs	r2, #0
 	mul	r1, fp, r3
 	add	r3, r3, r4
@@ -4008,21 +4053,21 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r7, .L499
+	cbz	r7, .L512
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L500
-.L499:
+	cbnz	r0, .L513
+.L512:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L500
-	ldr	r1, [r4, #3800]
+	cbnz	r0, .L513
+	ldr	r1, [r4, #3804]
 	ldr	r3, [sp, #12]
-	ldr	r2, .L530
+	ldr	r2, .L543
 	mla	r1, fp, r6, r1
-	ldr	r0, [r2, #3808]
+	ldr	r0, [r2, #3812]
 	add	r3, r8, r3, lsl #10
 	str	r3, [r1, #4]
-	ldr	r3, [r4, #3816]
+	ldr	r3, [r4, #3820]
 	str	r3, [r1, #8]
 	ldrh	r3, [r4, #112]
 	muls	r3, r6, r3
@@ -4033,40 +4078,40 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L500:
+.L513:
 	add	r9, r9, #1
-	b	.L498
-.L506:
+	b	.L511
+.L519:
 	mul	r3, fp, r9
-	ldr	r2, [r4, #3800]
+	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L505
+	cbz	r3, .L518
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L505:
+.L518:
 	add	r9, r9, #1
-	b	.L504
-.L510:
-	cbz	r7, .L509
+	b	.L517
+.L523:
+	cbz	r7, .L522
 	mul	r3, r9, r8
-	ldr	r2, [r4, #3800]
+	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L509
+	cbnz	r3, .L522
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L509:
+.L522:
 	add	r8, r8, #1
-	b	.L508
-.L531:
+	b	.L521
+.L544:
 	.align	2
-.L530:
+.L543:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -4083,11 +4128,11 @@ FtlFreeSysBlkQueueOut:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-	ldr	r4, .L539
-	ldr	r6, .L539+4
-.L533:
+	ldr	r4, .L552
+	ldr	r6, .L552+4
+.L546:
 	ldrh	r1, [r4, #218]
-	cbz	r1, .L534
+	cbz	r1, .L547
 	ldrh	r3, [r4, #214]
 	subs	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -4099,7 +4144,7 @@ FtlFreeSysBlkQueueOut:
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4116,23 +4161,23 @@ FtlFreeSysBlkQueueOut:
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L535
+	bhi	.L548
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L534:
-	ldr	r0, .L539+8
+.L547:
+	ldr	r0, .L552+8
 	bl	sftl_printk
-.L537:
-	b	.L537
-.L535:
+.L550:
+	b	.L550
+.L548:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	sftl_printk
-	b	.L533
-.L540:
+	b	.L546
+.L553:
 	.align	2
-.L539:
+.L552:
 	.word	.LANCHOR0
 	.word	.LC84
 	.word	.LC83
@@ -4155,16 +4200,16 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r1, [r0, #10]
 	movs	r3, #0
 	ldr	r2, [r0, #12]
-.L542:
+.L555:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L545
+	bcs	.L558
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L542
+	bne	.L555
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4172,14 +4217,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L543
-	ldr	r3, .L549
-	ldr	r0, .L549+4
+	bls	.L556
+	ldr	r3, .L562
+	ldr	r0, .L562+4
 	ldrh	r2, [r3, #218]
 	bl	sftl_printk
-.L544:
-	b	.L544
-.L543:
+.L557:
+	b	.L557
+.L556:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4188,20 +4233,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L545:
+.L558:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L547
-	movw	r2, #581
-	ldr	r1, .L549+8
-	ldr	r0, .L549+12
+	bhi	.L560
+	movw	r2, #603
+	ldr	r1, .L562+8
+	ldr	r0, .L562+12
 	bl	sftl_printk
-.L547:
+.L560:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L550:
+.L563:
 	.align	2
-.L549:
+.L562:
 	.word	.LANCHOR0
 	.word	.LC85
 	.word	.LANCHOR1+160
@@ -4225,8 +4270,8 @@ FlashTestBlk:
 	mov	r4, r0
 	.pad #92
 	sub	sp, sp, #92
-	bls	.L553
-	ldr	r5, .L554
+	bls	.L566
+	ldr	r5, .L567
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -4256,17 +4301,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L551:
+.L564:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L553:
+.L566:
 	movs	r4, #0
-	b	.L551
-.L555:
+	b	.L564
+.L568:
 	.align	2
-.L554:
+.L567:
 	.word	ftl_temp_buf
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4284,42 +4329,42 @@ FlashGetBadBlockList:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r2, #256
-	ldr	r5, .L563
+	ldr	r5, .L576
 	mov	r4, r0
 	mov	r6, r1
 	movs	r1, #255
 	bl	memset
-	ldr	r3, [r5, #3244]
+	ldr	r3, [r5, #3248]
 	mov	r1, r6
 	mov	r0, r4
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L557
+	bls	.L570
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	memset
 	movs	r0, #0
-.L557:
+.L570:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L562
+	bne	.L575
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L559:
+.L572:
 	cmp	r3, r1
-	bne	.L560
-.L562:
+	bne	.L573
+.L575:
 	pop	{r4, r5, r6, pc}
-.L560:
+.L573:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L559
-.L564:
+	b	.L572
+.L577:
 	.align	2
-.L563:
+.L576:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -4337,9 +4382,9 @@ ftl_memset:
 	push	{r4, lr}
 	.save {r4, lr}
 	mov	r4, r0
-	cbz	r2, .L566
+	cbz	r2, .L579
 	bl	memset
-.L566:
+.L579:
 	mov	r0, r4
 	pop	{r4, pc}
 	.fnend
@@ -4358,12 +4403,12 @@ FtlMemInit:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r3, #65535
-	ldr	r4, .L671
+	ldr	r4, .L684
 	movs	r5, #0
 	movs	r6, #12
 	movs	r7, #20
 	ldrh	r0, [r4, #106]
-	str	r3, [r4, #3824]
+	str	r3, [r4, #3828]
 	strh	r3, [r4, #3202]	@ movhi
 	strh	r3, [r4, #3204]	@ movhi
 	movs	r3, #32
@@ -4384,14 +4429,14 @@ FtlMemInit:
 	str	r5, [r4, #2560]
 	str	r5, [r4, #2564]
 	str	r5, [r4, #2568]
-	str	r5, [r4, #3820]
+	str	r5, [r4, #3824]
 	str	r5, [r4, #3160]
-	str	r5, [r4, #3828]
+	str	r5, [r4, #3832]
 	str	r5, [r4, #3152]
-	str	r5, [r4, #3804]
+	str	r5, [r4, #3808]
 	strh	r5, [r4, #3156]	@ movhi
-	strh	r5, [r4, #3206]	@ movhi
-	strh	r5, [r4, #3242]	@ movhi
+	strh	r5, [r4, #3210]	@ movhi
+	strh	r5, [r4, #3246]	@ movhi
 	bl	ftl_malloc
 	str	r0, [r4, #3188]
 	ldrh	r0, [r4, #106]
@@ -4403,16 +4448,16 @@ FtlMemInit:
 	lsl	r8, r7, #2
 	mov	r0, r8
 	bl	ftl_malloc
-	str	r0, [r4, #3832]
+	str	r0, [r4, #3836]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3836]
+	str	r0, [r4, #3840]
 	mov	r0, r8
 	bl	ftl_malloc
-	str	r0, [r4, #3840]
+	str	r0, [r4, #3844]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3800]
+	str	r0, [r4, #3804]
 	mov	r0, r7
 	bl	ftl_malloc
 	ldrh	r3, [r4, #32]
@@ -4423,23 +4468,23 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r4, #3184]
 	bl	ftl_malloc
-	str	r0, [r4, #3280]
+	str	r0, [r4, #3284]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3844]
+	str	r0, [r4, #3848]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3848]
+	str	r0, [r4, #3852]
 	ldr	r0, [r4, #3184]
 	muls	r0, r7, r0
 	bl	ftl_malloc
 	str	r0, [r4, #3172]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3816]
+	str	r0, [r4, #3820]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3808]
+	str	r0, [r4, #3812]
 	ldr	r0, [r4, #3184]
 	muls	r0, r6, r0
 	bl	ftl_malloc
@@ -4449,11 +4494,11 @@ FtlMemInit:
 	muls	r7, r3, r7
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3284]
+	str	r0, [r4, #3288]
 	lsls	r0, r7, #2
 	bl	ftl_malloc
 	ldrh	r3, [r4, #112]
-	str	r0, [r4, #3812]
+	str	r0, [r4, #3816]
 	ldr	r0, [r4, #3184]
 	muls	r0, r3, r0
 	bl	ftl_malloc
@@ -4461,24 +4506,24 @@ FtlMemInit:
 	ldrh	r0, [r4, #42]
 	lsls	r0, r0, #1
 	uxth	r0, r0
-	strh	r0, [r4, #3852]	@ movhi
+	strh	r0, [r4, #3856]	@ movhi
 	bl	ftl_malloc
-	ldrh	r3, [r4, #3852]
-	str	r0, [r4, #3856]
-	ldr	r0, .L671+4
+	ldrh	r3, [r4, #3856]
+	str	r0, [r4, #3860]
+	ldr	r0, .L684+4
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
-	strh	r3, [r4, #3852]	@ movhi
+	strh	r3, [r4, #3856]	@ movhi
 	bl	ftl_malloc
 	ldrh	r7, [r4, #42]
-	str	r0, [r4, #3860]
+	str	r0, [r4, #3864]
 	adds	r0, r0, #32
 	str	r0, [r4, #2328]
 	lsls	r7, r7, #1
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3864]
+	str	r0, [r4, #3868]
 	mov	r0, r7
 	bl	ftl_malloc
 	ldr	r7, [r4, #128]
@@ -4486,10 +4531,10 @@ FtlMemInit:
 	lsls	r7, r7, #1
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3868]
+	str	r0, [r4, #3872]
 	mov	r0, r7
 	bl	ftl_malloc
-	str	r0, [r4, #3872]
+	str	r0, [r4, #3876]
 	ldrh	r0, [r4, #42]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
@@ -4502,28 +4547,28 @@ FtlMemInit:
 	ldrh	r0, [r4, #120]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	str	r0, [r4, #3876]
+	str	r0, [r4, #3880]
 	ldrh	r0, [r4, #120]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3880]
+	str	r0, [r4, #3884]
 	ldrh	r0, [r4, #122]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r4, #122]
 	mov	r1, r5
-	str	r0, [r4, #3884]
+	str	r0, [r4, #3888]
 	add	r5, r4, #180
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r0, [r4, #136]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3888]
+	str	r0, [r4, #3892]
 	ldr	r0, [r4, #128]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	str	r0, [r4, #3892]
+	str	r0, [r4, #3896]
 	ldrh	r0, [r4, #138]
 	muls	r0, r6, r0
 	bl	ftl_malloc
@@ -4533,7 +4578,7 @@ FtlMemInit:
 	muls	r0, r3, r0
 	bl	ftl_malloc
 	ldrh	r3, [r4, #42]
-	str	r0, [r4, #3896]
+	str	r0, [r4, #3900]
 	movs	r0, #6
 	muls	r0, r3, r0
 	bl	ftl_malloc
@@ -4542,153 +4587,153 @@ FtlMemInit:
 	ldrh	r3, [r4, #54]
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
-	strh	r0, [r4, #3900]	@ movhi
+	strh	r0, [r4, #3904]	@ movhi
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldrh	r2, [r4, #3900]
+	ldrh	r2, [r4, #3904]
 	movs	r3, #1
 	ldrh	r6, [r4, #54]
 	str	r0, [r4, #180]
 	lsls	r2, r2, #2
 	mov	r1, r2
-.L571:
+.L584:
 	cmp	r3, r6
-	bcc	.L572
-	ldr	r2, .L671+8
+	bcc	.L585
+	ldr	r2, .L684+8
 	movs	r1, #0
 	add	r3, r2, r3, lsl #2
 	adds	r2, r2, #56
 	adds	r3, r3, #24
-.L573:
+.L586:
 	cmp	r2, r3
-	bne	.L574
-	ldr	r3, [r4, #3868]
-	cbnz	r3, .L575
-.L577:
-	ldr	r1, .L671+12
-	ldr	r0, .L671+16
+	bne	.L587
+	ldr	r3, [r4, #3872]
+	cbnz	r3, .L588
+.L590:
+	ldr	r1, .L684+12
+	ldr	r0, .L684+16
 	bl	sftl_printk
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L572:
+.L585:
 	ldr	r0, [r4, #180]
 	adds	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [r5, #4]!
-	b	.L571
-.L574:
+	b	.L584
+.L587:
 	str	r1, [r3, #4]!
-	b	.L573
-.L672:
+	b	.L586
+.L685:
 	.align	2
-.L671:
+.L684:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
 	.word	.LC86
-.L575:
-	ldr	r3, [r4, #3872]
-	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3888]
+.L588:
+	ldr	r3, [r4, #3876]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
+	ldr	r3, [r4, #3896]
+	cmp	r3, #0
+	beq	.L590
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3896]
+	beq	.L590
+	ldr	r3, [r4, #3900]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3832]
+	beq	.L590
+	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3840]
+	beq	.L590
+	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3800]
+	beq	.L590
+	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3836]
-	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3280]
+	beq	.L590
+	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3844]
+	beq	.L590
+	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
+	ldr	r3, [r4, #3852]
+	cmp	r3, #0
+	beq	.L590
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3816]
+	beq	.L590
+	ldr	r3, [r4, #3820]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3808]
+	beq	.L590
+	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3284]
+	beq	.L590
+	ldr	r3, [r4, #3288]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3812]
+	beq	.L590
+	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, [r4, #3856]
+	beq	.L590
+	ldr	r3, [r4, #3860]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L577
-	ldr	r3, .L673
-	ldr	r2, [r3, #3876]
-	cmp	r2, #0
-	beq	.L577
+	beq	.L590
+	ldr	r3, .L686
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L577
-	ldr	r3, [r3, #3884]
+	beq	.L590
+	ldr	r2, [r3, #3884]
+	cmp	r2, #0
+	beq	.L590
+	ldr	r3, [r3, #3888]
 	cmp	r3, #0
-	beq	.L577
+	beq	.L590
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L674:
+.L687:
 	.align	2
-.L673:
+.L686:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMemInit, .-FtlMemInit
@@ -4706,30 +4751,30 @@ FtlBbt2Bitmap:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r5, r0
-	ldr	r6, .L681
+	ldr	r6, .L694
 	mov	r7, r1
 	subs	r4, r5, #2
 	movw	r8, #65535
-	ldr	r9, .L681+4
+	ldr	r9, .L694+4
 	addw	r5, r5, #1022
-	ldrh	r2, [r6, #3900]
+	ldrh	r2, [r6, #3904]
 	movs	r1, #0
-	ldr	r10, .L681+8
+	ldr	r10, .L694+8
 	mov	r0, r7
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L678:
+.L691:
 	ldrh	r3, [r4, #2]
 	cmp	r3, r8
-	beq	.L675
+	beq	.L688
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L677
+	bhi	.L690
 	movs	r2, #74
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L677:
+.L690:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -4739,119 +4784,18 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r7, r1, lsl #2]
-	bne	.L678
-.L675:
+	bne	.L691
+.L688:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L682:
+.L695:
 	.align	2
-.L681:
+.L694:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
 	.fnend
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.align	1
-	.global	load_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r4, .L689
-	mov	r8, r1
-	ldrh	r3, [r4, #136]
-	cmp	r3, r0
-	bcs	.L684
-	mov	r2, #492
-	ldr	r1, .L689+4
-	ldr	r0, .L689+8
-	bl	sftl_printk
-.L684:
-	ldr	r3, [r4, #3888]
-	movs	r5, #12
-	ldr	r7, [r3, r6, lsl #2]
-	cbnz	r7, .L685
-	mul	r5, r5, r8
-	ldr	r3, [r4, #2492]
-	ldrh	r2, [r4, #110]
-	movs	r1, #255
-	add	r3, r3, r5
-	ldr	r0, [r3, #8]
-	bl	ftl_memset
-	ldr	r3, [r4, #2492]
-	strh	r6, [r3, r5]	@ movhi
-	ldr	r3, [r4, #2492]
-	add	r5, r5, r3
-	str	r7, [r5, #4]
-.L686:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L685:
-	mul	r5, r5, r8
-	ldr	r3, [r4, #2492]
-	movs	r2, #1
-	ldr	r0, .L689+12
-	mov	r1, r2
-	str	r7, [r4, #3264]
-	add	r3, r3, r5
-	ldr	r3, [r3, #8]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	str	r3, [r4, #3272]
-	bl	FlashReadPages
-	ldr	r8, [r4, #3272]
-	ldrh	r3, [r8, #8]
-	cmp	r3, r6
-	beq	.L687
-	mov	r2, r7
-	mov	r1, r6
-	ldr	r0, .L689+16
-	bl	sftl_printk
-	movs	r3, #4
-	ldr	r1, [r4, #3272]
-	mov	r2, r3
-	ldr	r0, .L689+20
-	bl	rknand_print_hex
-	ldrh	r3, [r4, #136]
-	movs	r2, #4
-	ldr	r1, [r4, #3888]
-	ldr	r0, .L689+24
-	bl	rknand_print_hex
-.L687:
-	ldrh	r3, [r8, #8]
-	cmp	r3, r6
-	beq	.L688
-	movw	r2, #513
-	ldr	r1, .L689+4
-	ldr	r0, .L689+8
-	bl	sftl_printk
-.L688:
-	ldr	r3, [r4, #2492]
-	movs	r1, #0
-	adds	r2, r3, r5
-	str	r1, [r2, #4]
-	strh	r6, [r3, r5]	@ movhi
-	b	.L686
-.L690:
-	.align	2
-.L689:
-	.word	.LANCHOR0
-	.word	.LANCHOR1+211
-	.word	.LC1
-	.word	.LANCHOR0+3260
-	.word	.LC87
-	.word	.LC88
-	.word	.LC89
-	.fnend
-	.size	load_l2p_region, .-load_l2p_region
-	.align	1
 	.global	ftl_free_no_use_map_blk
 	.syntax unified
 	.thumb
@@ -4875,37 +4819,37 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L692:
+.L697:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L696
+	bhi	.L701
 	ldrh	fp, [r5]
 	movs	r6, #0
-	ldr	r2, .L705
+	ldr	r2, .L710
 	mov	r10, r6
-.L697:
+.L702:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L701
+	bhi	.L706
 	mov	r0, r10
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L696:
+.L701:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L693:
+.L698:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L695
+	bhi	.L700
 	adds	r3, r3, #1
-	b	.L692
-.L695:
+	b	.L697
+.L700:
 	uxth	r0, r2
 	adds	r2, r2, #1
 	ldrh	r7, [r9, r0, lsl #1]
@@ -4914,27 +4858,27 @@ ftl_free_no_use_map_blk:
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L693
-.L701:
+	b	.L698
+.L706:
 	ldrh	r1, [r4]
 	uxth	r7, r6
 	cmp	r1, r3
-	bne	.L698
+	bne	.L703
 	ldrh	r1, [r2, #104]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L698:
+.L703:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	fp, r8
 	itt	hi
 	movhi	r10, r3
 	movhi	fp, r8
 	cmp	r8, #0
-	bne	.L700
+	bne	.L705
 	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L700
+	cbz	r0, .L705
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -4943,12 +4887,12 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L700:
+.L705:
 	adds	r6, r6, #1
-	b	.L697
-.L706:
+	b	.L702
+.L711:
 	.align	2
-.L705:
+.L710:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -4970,14 +4914,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L708
+	bne	.L713
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L709
-	movw	r2, #641
-	ldr	r1, .L717
-	ldr	r0, .L717+4
+	cbz	r3, .L714
+	movw	r2, #677
+	ldr	r1, .L722
+	ldr	r0, .L722+4
 	bl	sftl_printk
-.L709:
+.L714:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4989,22 +4933,22 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L710:
+.L715:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L708:
+.L713:
 	ldrh	r6, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L717+8
+	ldr	r5, .L722+8
 	ldr	r2, [r0, #28]
 	ldr	r7, [r0, #24]
 	orr	r3, r3, r6, lsl #10
-	str	r3, [r5, #3264]
-	ldr	r3, [r5, #3280]
 	str	r3, [r5, #3268]
 	ldr	r3, [r5, #3284]
 	str	r3, [r5, #3272]
+	ldr	r3, [r5, #3288]
+	str	r3, [r5, #3276]
 	str	r2, [r3, #4]
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
@@ -5012,50 +4956,50 @@ Ftl_write_map_blk_to_last_page:
 	strh	r6, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
 	ldrh	r2, [r5, #104]
-	ldr	r0, [r5, #3280]
+	ldr	r0, [r5, #3284]
 	lsls	r2, r2, #3
 	bl	ftl_memset
 	movs	r2, #0
 	mov	r3, r2
-.L711:
+.L716:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L713
+	bhi	.L718
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L717+12
+	ldr	r0, .L722+12
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L710
-.L713:
+	b	.L715
+.L718:
 	uxth	r1, r2
 	ldr	r0, [r7, r1, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L712
-	ldr	r0, [r5, #3280]
+	bne	.L717
+	ldr	r0, [r5, #3284]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r1, [r0, r3, lsl #3]
 	ldr	r0, [r7, r1, lsl #2]
-	ldr	r1, [r5, #3280]
+	ldr	r1, [r5, #3284]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L712:
+.L717:
 	adds	r2, r2, #1
-	b	.L711
-.L718:
+	b	.L716
+.L723:
 	.align	2
-.L717:
-	.word	.LANCHOR1+227
+.L722:
+	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.fnend
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	1
@@ -5072,13 +5016,13 @@ FtlMapWritePage:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L738
-	mov	r8, r1
-	mov	r10, r2
+	ldr	r7, .L753
+	mov	r9, r1
+	mov	fp, r2
 	movs	r6, #0
-	ldr	r9, .L738+20
+	ldr	r10, .L753+20
 	mov	r5, r7
-.L720:
+.L725:
 	ldr	r3, [r7, #2524]
 	adds	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -5086,51 +5030,51 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L721
+	bge	.L726
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L722
-.L721:
+	bne	.L727
+.L726:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L722:
+.L727:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L723
-	movw	r2, #699
-	mov	r1, r9
-	ldr	r0, .L738+4
+	cbnz	r3, .L728
+	movw	r2, #735
+	mov	r1, r10
+	ldr	r0, .L753+4
 	bl	sftl_printk
-.L723:
+.L728:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L724
-	mov	r2, #700
-	mov	r1, r9
-	ldr	r0, .L738+4
+	bcc	.L729
+	mov	r2, #736
+	mov	r1, r10
+	ldr	r0, .L753+4
 	bl	sftl_printk
-.L724:
+.L729:
 	ldrh	r2, [r4]
 	movs	r1, #16
 	ldr	r3, [r4, #12]
-	ldr	r0, [r5, #3284]
-	ldrh	fp, [r3, r2, lsl #1]
+	ldr	r0, [r5, #3288]
+	ldrh	r8, [r3, r2, lsl #1]
 	ldrh	r3, [r4, #2]
-	str	r0, [r5, #3272]
-	str	r10, [r5, #3268]
-	orr	r3, r3, fp, lsl #10
-	str	r3, [r5, #3264]
+	str	r0, [r5, #3276]
+	str	fp, [r5, #3272]
+	orr	r3, r3, r8, lsl #10
+	str	r3, [r5, #3268]
 	bl	__memzero
-	ldr	r3, [r5, #3272]
+	ldr	r3, [r5, #3276]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L738+8
-	strh	r8, [r3, #8]	@ movhi
+	ldr	r0, .L753+8
+	strh	r9, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
-	strh	fp, [r3, #2]	@ movhi
+	strh	r8, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
 	movs	r3, #1
 	mov	r2, r3
@@ -5140,12 +5084,12 @@ FtlMapWritePage:
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r2, [r5, #3260]
-	adds	r2, r2, #1
-	bne	.L725
-	ldr	r1, [r5, #3264]
+	ldr	r2, [r5, #3264]
+	adds	r1, r2, #1
+	bne	.L730
+	ldr	r1, [r5, #3268]
 	adds	r6, r6, #1
-	ldr	r0, .L738+12
+	ldr	r0, .L753+12
 	uxth	r6, r6
 	bl	sftl_printk
 	ldrh	r3, [r4, #2]
@@ -5155,149 +5099,327 @@ FtlMapWritePage:
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L727
+	bls	.L732
 	mov	r2, r6
-	ldr	r1, [r5, #3264]
-	ldr	r0, .L738+16
+	ldr	r1, [r5, #3268]
+	ldr	r0, .L753+16
 	bl	sftl_printk
-.L728:
-	b	.L728
-.L727:
+.L733:
+	b	.L733
+.L732:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L720
-.L737:
-	b	.L737
-.L725:
+	beq	.L725
+.L750:
+	b	.L750
+.L730:
+	cbz	r2, .L736
 	cmp	r3, #1
-	beq	.L720
-	ldr	r2, [r5, #3264]
+	strh	r8, [r4, #40]	@ movhi
+	beq	.L725
+	cmp	r2, #256
+.L752:
+	beq	.L725
+	ldr	r2, [r5, #3268]
 	movs	r0, #0
 	ldr	r3, [r4, #24]
-	str	r2, [r3, r8, lsl #2]
+	str	r2, [r3, r9, lsl #2]
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L739:
+.L736:
+	cmp	r3, #1
+	b	.L752
+.L754:
 	.align	2
-.L738:
+.L753:
 	.word	.LANCHOR0
 	.word	.LC1
-	.word	.LANCHOR0+3260
-	.word	.LC90
-	.word	.LC91
-	.word	.LANCHOR1+258
+	.word	.LANCHOR0+3264
+	.word	.LC87
+	.word	.LC88
+	.word	.LANCHOR1+242
 	.fnend
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	load_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
+	.type	load_l2p_region, %function
+load_l2p_region:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-	mov	r4, r0
-	ldr	r6, [r0, #12]
-	ldr	r9, [r0, #24]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	ldr	r5, .L752
-	subs	r3, r3, #4
-	cmp	r2, r3
-	blt	.L741
-	uxth	r0, r0
-	ldrh	r8, [r6, r0, lsl #1]
-	cmp	r8, #0
-	beq	.L741
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L741
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r6, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldrh	r3, [r5, #104]
-	cmp	r2, r3
-	bcc	.L742
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L742:
-	ldr	fp, .L752+12
-	movs	r6, #0
-.L743:
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
-	cmp	r3, r10
-	bhi	.L747
+	push	{r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L762
+	mov	r8, r1
+	ldrh	r3, [r4, #136]
+	cmp	r3, r0
+	bcs	.L756
+	mov	r2, #510
+	ldr	r1, .L762+4
+	ldr	r0, .L762+8
+	bl	sftl_printk
+.L756:
+	ldr	r3, [r4, #3892]
+	movs	r5, #12
+	ldr	r7, [r3, r6, lsl #2]
+	cbnz	r7, .L757
+	mul	r5, r5, r8
+	ldr	r3, [r4, #2492]
+	ldrh	r2, [r4, #110]
+	movs	r1, #255
+	add	r3, r3, r5
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r4, #2492]
+	strh	r6, [r3, r5]	@ movhi
+	ldr	r3, [r4, #2492]
+	add	r5, r5, r3
+	str	r7, [r5, #4]
+.L758:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L757:
+	mul	r5, r5, r8
+	ldr	r3, [r4, #2492]
+	movs	r2, #1
+	ldr	r0, .L762+12
+	mov	r1, r2
+	str	r7, [r4, #3268]
+	add	r3, r3, r5
+	ldr	r3, [r3, #8]
+	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	r3, [r4, #3276]
+	bl	FlashReadPages
+	ldr	r3, [r4, #3264]
+	ldr	r8, [r4, #3276]
+	cmp	r3, #256
+	bne	.L759
+	mov	r2, r7
+	mov	r1, r6
+	ldr	r0, .L762+16
+	bl	sftl_printk
+	lsrs	r3, r7, #10
+	mov	r1, r6
+	ldr	r0, .L762+20
+	strh	r3, [r4, #3948]	@ movhi
+	ldr	r3, [r4, #2492]
+	add	r3, r3, r5
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L759:
+	ldrh	r3, [r8, #8]
+	cmp	r3, r6
+	beq	.L760
+	mov	r2, r7
+	mov	r1, r6
+	ldr	r0, .L762+24
+	bl	sftl_printk
+	movs	r3, #4
+	ldr	r1, [r4, #3276]
+	mov	r2, r3
+	ldr	r0, .L762+28
+	bl	rknand_print_hex
+	ldrh	r3, [r4, #136]
+	movs	r2, #4
+	ldr	r1, [r4, #3892]
+	ldr	r0, .L762+32
+	bl	rknand_print_hex
+.L760:
+	ldrh	r3, [r8, #8]
+	cmp	r3, r6
+	beq	.L761
+	movw	r2, #535
+	ldr	r1, .L762+4
+	ldr	r0, .L762+8
+	bl	sftl_printk
+.L761:
+	ldr	r3, [r4, #2492]
+	movs	r1, #0
+	adds	r2, r3, r5
+	str	r1, [r2, #4]
+	strh	r6, [r3, r5]	@ movhi
+	b	.L758
+.L763:
+	.align	2
+.L762:
+	.word	.LANCHOR0
+	.word	.LANCHOR1+258
+	.word	.LC1
+	.word	.LANCHOR0+3264
+	.word	.LC89
+	.word	.LANCHOR0+3908
+	.word	.LC90
+	.word	.LC91
+	.word	.LC92
+	.fnend
+	.size	load_l2p_region, .-load_l2p_region
+	.align	1
+	.global	ftl_map_blk_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.pad #12
+	mov	r4, r0
+	ldr	r6, [r0, #12]
+	ldr	r10, [r0, #24]
+	bl	ftl_free_no_use_map_blk
+	ldrh	ip, [r4, #10]
+	ldrh	r2, [r4, #8]
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r5, .L788
+	cmp	r2, r3
+	bge	.L765
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L767
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5, #104]
+	cmp	r2, r3
+	bcc	.L768
+.L765:
+	movw	r3, #65535
+	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L769
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r5, #104]
+	cmp	r2, r3
+	bls	.L770
+.L769:
+	ldrh	r9, [r6, r0, lsl #1]
+	lsls	r2, r0, #1
+	cmp	r9, #0
+	beq	.L767
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L767
 	movs	r1, #1
-	mov	r0, r8
+	str	r1, [r4, #32]
+	strh	r3, [r6, r2]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldrh	r3, [r5, #104]
+	cmp	r2, r3
+	bcc	.L775
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L775:
+	movs	r6, #0
+.L776:
+	ldrh	r2, [r4, #6]
+	uxth	fp, r6
+	cmp	r2, fp
+	bhi	.L783
+	movs	r1, #1
+	mov	r0, r9
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L741:
+.L767:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L748
+	bcc	.L768
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L748:
+.L768:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L747:
+.L773:
+	ldrh	r8, [r6, r2, lsl #1]
+	add	lr, r2, #1
+	cmp	r8, r1
+	beq	.L771
+	mov	r2, lr
+.L772:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L773
+	mov	r7, r0
+.L771:
+	uxth	r2, r2
+	ldr	r0, .L788+4
+	ldrh	r2, [r6, r2, lsl #1]
+	bl	sftl_printk
+	movw	r3, #65535
+	mov	r0, r7
+	strh	r3, [r4, #40]	@ movhi
+	b	.L769
+.L770:
+	movs	r2, #0
+	b	.L772
+.L783:
 	uxth	r7, r6
-	ldr	r3, [r9, r7, lsl #2]
-	cmp	r8, r3, lsr #10
-	bne	.L744
-	ldr	r3, [r5, #3844]
-	ldr	r0, .L752+4
-	str	r3, [r5, #3268]
-	ldr	r3, [r5, #3284]
-	str	r3, [r5, #3272]
-	ldr	r2, [r9, r7, lsl #2]
+	ldr	r2, [r10, r7, lsl #2]
+	add	r3, r10, r7, lsl #2
 	str	r3, [sp, #4]
-	str	r2, [r5, #3264]
+	cmp	r9, r2, lsr #10
+	bne	.L777
+	ldr	r2, [r5, #3848]
+	ldr	r8, [r5, #3288]
+	ldr	r0, .L788+8
+	str	r2, [r5, #3272]
+	str	r8, [r5, #3276]
+	ldr	r2, [r10, r7, lsl #2]
+	str	r2, [r5, #3268]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r10
-	beq	.L745
-	movw	r2, #613
-	ldr	r1, .L752+8
-	mov	r0, fp
+	ldrh	r2, [r8, #8]
+	cmp	r2, fp
+	beq	.L778
+	movw	r2, #647
+	ldr	r1, .L788+12
+	ldr	r0, .L788+16
 	bl	sftl_printk
-.L745:
-	ldr	r3, [r5, #3260]
-	adds	r3, r3, #1
-	bne	.L746
+.L778:
+	ldr	r2, [r5, #3264]
+	adds	r2, r2, #1
+	bne	.L779
+.L781:
+	ldr	r2, [sp, #4]
 	movs	r3, #0
-	str	r3, [r9, r7, lsl #2]
-.L744:
-	adds	r6, r6, #1
-	b	.L743
-.L746:
-	ldr	r2, [r5, #3268]
+	str	r3, [r2]
+.L780:
+	b	.L780
+.L779:
+	ldrh	r2, [r8, #8]
+	cmp	r2, fp
+	bne	.L781
+	ldrh	r2, [r8]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L781
+	ldr	r2, [r5, #3272]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-	b	.L744
-.L753:
+.L777:
+	adds	r6, r6, #1
+	b	.L776
+.L789:
 	.align	2
-.L752:
+.L788:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LC93
+	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+274
 	.word	.LC1
 	.fnend
@@ -5316,10 +5438,10 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L755
+	ldr	r5, .L791
 	muls	r4, r0, r4
 	ldr	r3, [r5, #2492]
-	add	r0, r5, #3904
+	addw	r0, r5, #3908
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
 	ldr	r2, [r2, #8]
@@ -5331,9 +5453,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L756:
+.L792:
 	.align	2
-.L755:
+.L791:
 	.word	.LANCHOR0
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -5351,7 +5473,7 @@ log2phys:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r7, r1
-	ldr	r4, .L771
+	ldr	r4, .L807
 	mov	r9, r2
 	ldrh	r5, [r4, #108]
 	adds	r3, r5, #7
@@ -5364,20 +5486,20 @@ log2phys:
 	ands	r5, r5, r0
 	cmp	r0, r3
 	uxth	r5, r5
-	bcc	.L758
-	mov	r2, #808
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	bcc	.L794
+	movw	r2, #847
+	ldr	r1, .L807+4
+	ldr	r0, .L807+8
 	bl	sftl_printk
-.L758:
+.L794:
 	ldrh	r2, [r4, #138]
 	movs	r3, #0
 	ldr	r1, [r4, #2492]
 	mov	r10, #12
-.L759:
+.L795:
 	uxth	r6, r3
 	cmp	r6, r2
-	bcc	.L764
+	bcc	.L800
 	bl	select_l2p_ram_region
 	mul	r10, r10, r0
 	ldr	r3, [r4, #2492]
@@ -5386,44 +5508,44 @@ log2phys:
 	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L765
+	beq	.L801
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L765
+	bge	.L801
 	bl	flush_l2p_region
-.L765:
+.L801:
 	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-	b	.L760
-.L764:
+	b	.L796
+.L800:
 	adds	r3, r3, #1
 	mla	r0, r10, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L759
-.L760:
+	bne	.L795
+.L796:
 	movs	r3, #12
 	cmp	r9, #0
-	bne	.L761
+	bne	.L797
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L762:
+.L798:
 	ldr	r2, [r4, #2492]
 	movs	r3, #12
 	mla	r6, r3, r6, r2
 	ldr	r3, [r6, #4]
 	adds	r2, r3, #1
-	beq	.L768
+	beq	.L804
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
-.L768:
+.L804:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L761:
+.L797:
 	muls	r3, r6, r3
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5436,10 +5558,10 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L762
-.L772:
+	b	.L798
+.L808:
 	.align	2
-.L771:
+.L807:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5460,41 +5582,41 @@ FtlReUsePrevPpa:
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
 	mov	r6, r0
-	ldr	r5, .L783
+	ldr	r5, .L819
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5, #2324]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L774
+	cbnz	r3, .L810
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L775
+	cbz	r4, .L811
 	ldr	r1, [r5, #2316]
 	mov	ip, #6
-	ldr	r2, .L783+4
+	ldr	r2, .L819+4
 	movw	lr, #65535
 	ldrh	r0, [r5, #2344]
 	subs	r4, r4, r1
 	asrs	r4, r4, #1
 	muls	r4, r2, r4
 	uxth	r4, r4
-.L776:
+.L812:
 	uxth	r2, r3
 	cmp	r0, r2
-	bls	.L775
+	bls	.L811
 	cmp	r4, r7
-	bne	.L777
+	bne	.L813
 	mov	r1, r4
-	ldr	r0, .L783+8
+	ldr	r0, .L819+8
 	bl	List_remove_node
 	ldrh	r3, [r5, #2344]
-	cbnz	r3, .L778
-	mov	r2, #1688
-	ldr	r1, .L783+12
-	ldr	r0, .L783+16
+	cbnz	r3, .L814
+	movw	r2, #1737
+	ldr	r1, .L819+12
+	ldr	r0, .L819+16
 	bl	sftl_printk
-.L778:
+.L814:
 	ldrh	r3, [r5, #2344]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -5502,17 +5624,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5, #2324]
 	ldrh	r3, [r2, r7, lsl #1]
-.L774:
+.L810:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L775
-.L777:
+	b	.L811
+.L813:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, lr
-	bne	.L776
-.L775:
+	bne	.L812
+.L811:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -5520,9 +5642,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L784:
+.L820:
 	.align	2
-.L783:
+.L819:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.word	.LANCHOR0+2340
@@ -5544,59 +5666,59 @@ ftl_scan_all_data:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r6, .L799
+	ldr	r6, .L835
 	.pad #32
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L799+16
+	ldr	r8, .L835+16
 	mov	r4, r6
-	ldr	r0, .L799+4
+	ldr	r0, .L835+4
 	bl	sftl_printk
-.L786:
+.L822:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L792
+	bcc	.L828
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L792:
+.L828:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L787
+	cbnz	r3, .L823
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	sftl_printk
-.L787:
+.L823:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L789
-	str	r3, [r4, #3264]
+	beq	.L825
+	str	r3, [r4, #3268]
 	movs	r2, #0
-	ldr	r3, [r4, #3280]
+	ldr	r3, [r4, #3284]
 	movs	r1, #1
-	ldr	r7, [r4, #3284]
-	ldr	r0, .L799+8
-	str	r3, [r4, #3268]
-	str	r5, [r4, #3276]
-	str	r7, [r4, #3272]
-	str	r2, [r4, #3260]
+	ldr	r7, [r4, #3288]
+	ldr	r0, .L835+8
+	str	r3, [r4, #3272]
+	str	r5, [r4, #3280]
+	str	r7, [r4, #3276]
+	str	r2, [r4, #3264]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	cmp	r3, #256
-	beq	.L790
+	beq	.L826
 	adds	r3, r3, #1
-	beq	.L790
+	beq	.L826
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L789
-.L790:
-	ldr	r2, [r4, #3268]
-	ldr	r3, [r4, #3272]
-	ldr	r0, .L799+12
+	beq	.L825
+.L826:
+	ldr	r2, [r4, #3272]
+	ldr	r3, [r4, #3276]
+	ldr	r0, .L835+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5609,19 +5731,19 @@ ftl_scan_all_data:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	ldr	r3, [r3]
-	ldr	r2, [r4, #3264]
+	ldr	r2, [r4, #3268]
 	bl	sftl_printk
-.L789:
+.L825:
 	adds	r5, r5, #1
-	b	.L786
-.L800:
+	b	.L822
+.L836:
 	.align	2
-.L799:
+.L835:
 	.word	.LANCHOR0
-	.word	.LC92
-	.word	.LANCHOR0+3260
 	.word	.LC94
-	.word	.LC93
+	.word	.LANCHOR0+3264
+	.word	.LC96
+	.word	.LC95
 	.fnend
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	1
@@ -5635,7 +5757,7 @@ FtlReadRefresh:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L814
+	ldr	r3, .L850
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	.pad #88
@@ -5643,17 +5765,17 @@ FtlReadRefresh:
 	mov	r4, r3
 	ldr	r0, [r3, #2716]
 	cmp	r0, #0
-	beq	.L802
+	beq	.L838
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L803
+	bcs	.L839
 	mov	r5, #2048
-.L808:
+.L844:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L805
+	bcs	.L841
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
@@ -5662,10 +5784,10 @@ FtlReadRefresh:
 	adds	r1, r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L806
+	beq	.L842
 	str	r3, [sp, #20]
 	add	r0, sp, #88
-	ldr	r3, .L814+4
+	ldr	r3, .L850+4
 	movs	r1, #1
 	str	r2, [sp, #8]
 	movs	r2, #0
@@ -5676,54 +5798,54 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L805
+	bne	.L841
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L805:
+.L841:
 	mov	r0, #-1
-.L801:
+.L837:
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L806:
+.L842:
 	subs	r5, r5, #1
-	bne	.L808
-	b	.L805
-.L803:
+	bne	.L844
+	b	.L841
+.L839:
 	ldr	r2, [r3, #2508]
 	movs	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L801
-.L802:
+	b	.L837
+.L838:
 	ldr	r1, [r3, #2508]
 	ldr	r6, [r3, #2712]
 	add	r2, r1, #1048576
 	cmp	r6, r2
-	bhi	.L811
+	bhi	.L847
 	ldr	r2, [r3, #2564]
 	lsrs	r5, r2, #10
 	mov	r2, #33554432
 	asrs	r2, r2, r5
 	add	r2, r2, r6
 	cmp	r1, r2
-	bhi	.L811
+	bhi	.L847
 	ldrb	r3, [r3, #2296]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L801
-.L811:
+	bne	.L837
+.L847:
 	movs	r3, #1
 	movs	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L801
-.L815:
+	b	.L837
+.L851:
 	.align	2
-.L814:
+.L850:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -5743,120 +5865,120 @@ ftl_check_vpc:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r4, #0
-	ldr	r6, .L840
-	ldr	r7, .L840+4
-	ldr	r1, .L840+8
+	ldr	r6, .L876
+	ldr	r7, .L876+4
+	ldr	r1, .L876+8
 	mov	r5, r6
-	ldr	r0, .L840+12
+	ldr	r0, .L876+12
 	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L840+4
+	ldr	r0, .L876+4
 	bl	__memzero
-.L817:
+.L853:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L819
-	ldr	r8, .L840+4
+	bcc	.L855
+	ldr	r8, .L876+4
 	movs	r4, #0
-	ldr	r10, .L840+24
+	ldr	r10, .L876+24
 	mov	r7, r4
 	movw	r9, #65535
-.L820:
+.L856:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L822
+	bhi	.L858
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L823
+	cbz	r4, .L859
 	ldr	r3, [r5, #2316]
 	movs	r6, #0
 	ldrh	r8, [r5, #2344]
 	mov	fp, #6
-	ldr	r9, .L840+4
+	ldr	r9, .L876+4
 	subs	r4, r4, r3
-	ldr	r3, .L840+16
+	ldr	r3, .L876+16
 	asrs	r4, r4, #1
-	ldr	r10, .L840+28
+	ldr	r10, .L876+28
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L824:
+.L860:
 	uxth	r3, r6
 	cmp	r8, r3
-	bls	.L823
+	bls	.L859
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L825
+	cbz	r2, .L861
 	movs	r7, #1
 	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
 	bl	sftl_printk
-.L825:
+.L861:
 	mul	r4, fp, r4
 	ldr	r3, [r5, #2316]
 	adds	r6, r6, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L824
-.L823:
-	cbz	r7, .L816
-	movw	r2, #2321
-	ldr	r1, .L840+8
-	ldr	r0, .L840+20
+	bne	.L860
+.L859:
+	cbz	r7, .L852
+	movw	r2, #2373
+	ldr	r1, .L876+8
+	ldr	r0, .L876+20
 	bl	sftl_printk
-.L816:
+.L852:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L819:
+.L855:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L818
+	beq	.L854
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r7, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L818:
+.L854:
 	adds	r4, r4, #1
-	b	.L817
-.L822:
+	b	.L853
+.L858:
 	ldr	r3, [r5, #2324]
 	uxth	r6, r4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L821
+	beq	.L857
 	mov	r1, r6
 	mov	r0, r10
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r9
-	beq	.L821
+	beq	.L857
 	ldrh	r2, [r8, r6, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r7, #1
-.L821:
+.L857:
 	adds	r4, r4, #1
-	b	.L820
-.L841:
+	b	.L856
+.L877:
 	.align	2
-.L840:
+.L876:
 	.word	.LANCHOR0
 	.word	check_vpc_table
 	.word	.LANCHOR1+314
-	.word	.LC95
+	.word	.LC97
 	.word	-1431655765
 	.word	.LC1
-	.word	.LC96
-	.word	.LC97
+	.word	.LC98
+	.word	.LC99
 	.fnend
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	1
@@ -5874,41 +5996,41 @@ FtlMapBlkWriteDump_data:
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
 	ldr	r3, [r0, #36]
-	cbz	r3, .L842
+	cbz	r3, .L878
 	ldrh	r5, [r0, #6]
 	movs	r3, #0
-	ldr	r4, .L846
+	ldr	r4, .L882
 	ldr	r2, [r0, #24]
 	str	r3, [r0, #36]
 	subs	r5, r5, #1
-	ldr	r0, [r4, #3844]
+	ldr	r0, [r4, #3848]
 	uxth	r5, r5
-	ldr	r1, [r4, #3284]
-	str	r0, [r4, #3268]
-	str	r1, [r4, #3272]
+	ldr	r1, [r4, #3288]
+	str	r0, [r4, #3272]
+	str	r1, [r4, #3276]
 	ldr	r2, [r2, r5, lsl #2]
-	str	r2, [r4, #3264]
-	cbz	r2, .L844
+	str	r2, [r4, #3268]
+	cbz	r2, .L880
 	movs	r2, #1
-	addw	r0, r4, #3260
+	add	r0, r4, #3264
 	mov	r1, r2
 	bl	FlashReadPages
-.L845:
-	ldr	r2, [r4, #3268]
+.L881:
+	ldr	r2, [r4, #3272]
 	mov	r1, r5
 	mov	r0, r6
 	pop	{r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L844:
+.L880:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L845
-.L842:
+	b	.L881
+.L878:
 	pop	{r4, r5, r6, pc}
-.L847:
+.L883:
 	.align	2
-.L846:
+.L882:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
@@ -5926,24 +6048,24 @@ FtlScanSysBlk:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r5, #0
-	ldr	r4, .L929
+	ldr	r4, .L965
 	mov	r1, r5
 	.pad #20
 	sub	sp, sp, #20
 	ldr	r2, [r4, #128]
-	ldr	r0, [r4, #3892]
-	strh	r5, [r4, #3944]	@ movhi
+	ldr	r0, [r4, #3896]
+	strh	r5, [r4, #3952]	@ movhi
 	strh	r5, [r4, #144]	@ movhi
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldr	r2, [r4, #128]
 	mov	r1, r5
-	ldr	r0, [r4, #3868]
+	ldr	r0, [r4, #3872]
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r2, [r4, #120]
 	mov	r1, r5
-	ldr	r0, [r4, #3880]
+	ldr	r0, [r4, #3884]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r4, #120]
@@ -5956,23 +6078,23 @@ FtlScanSysBlk:
 	str	r3, [r4, #2576]
 	str	r3, [r4, #2580]
 	str	r3, [r4, #2584]
-.L849:
+.L885:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r8
-	bls	.L891
+	bls	.L927
 	movs	r5, #0
 	ldrh	fp, [r4, #32]
-	ldr	r9, [r4, #3832]
+	ldr	r9, [r4, #3836]
 	mov	r7, r5
 	ldr	r3, [r4, #3172]
 	mov	r10, #20
 	ldr	r2, [r4, #3176]
 	ldrh	r6, [r4, #112]
-	b	.L892
-.L852:
+	b	.L928
+.L888:
 	str	r3, [sp, #8]
 	mov	r1, r8
-	ldr	r3, .L929+4
+	ldr	r3, .L965+4
 	str	r2, [sp, #12]
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
@@ -5980,7 +6102,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L850
+	cbnz	r0, .L886
 	ldr	r1, [sp, #4]
 	mla	r0, r10, r7, r9
 	lsls	r1, r1, #10
@@ -5995,41 +6117,41 @@ FtlScanSysBlk:
 	bic	r1, r1, #3
 	add	r1, r1, r2
 	str	r1, [r0, #12]
-.L850:
+.L886:
 	adds	r5, r5, #1
-.L892:
+.L928:
 	uxth	r1, r5
 	cmp	fp, r1
-	bhi	.L852
-	cbnz	r7, .L853
-.L890:
+	bhi	.L888
+	cbnz	r7, .L889
+.L926:
 	add	r8, r8, #1
 	uxth	r8, r8
-	b	.L849
-.L853:
+	b	.L885
+.L889:
 	mov	r0, r9
 	mov	r9, #0
 	movs	r2, #1
 	mov	r1, r7
 	bl	FlashReadPages
-.L854:
+.L890:
 	uxth	r3, r9
 	cmp	r7, r3
-	bls	.L890
+	bls	.L926
 	movs	r3, #20
 	mul	r10, r3, r9
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r4, #3836]
 	add	r2, r3, r10
 	ldr	r3, [r3, r10]
 	ldr	r5, [r2, #4]
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L857
+	bne	.L893
 	mov	fp, #16
 	movw	r3, #65535
-.L859:
-	ldr	r0, [r4, #3832]
+.L895:
+	ldr	r0, [r4, #3836]
 	str	r3, [sp, #4]
 	add	r0, r0, r10
 	ldr	r2, [r0, #4]
@@ -6041,215 +6163,215 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L856
-	ldr	r3, [r4, #3832]
+	bne	.L892
+	ldr	r3, [r4, #3836]
 	mov	r2, #-1
 	str	r2, [r3, r10]
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L857
-.L858:
+	bne	.L893
+.L894:
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L862
-.L856:
-	ldr	r2, [r4, #3832]
+	b	.L898
+.L892:
+	ldr	r2, [r4, #3836]
 	ldr	r2, [r2, r10]
 	adds	r2, r2, #1
-	bne	.L857
+	bne	.L893
 	add	fp, fp, #-1
 	uxth	fp, fp
 	cmp	fp, #0
-	bne	.L859
-	b	.L858
-.L857:
+	bne	.L895
+	b	.L894
+.L893:
 	ldr	r2, [r4, #2540]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L860
+	beq	.L896
 	cmp	r2, r3
-	bhi	.L861
-.L860:
+	bhi	.L897
+.L896:
 	adds	r2, r3, #1
 	itt	ne
 	addne	r2, r3, #1
 	strne	r2, [r4, #2540]
-.L861:
+.L897:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L863
-	bhi	.L864
+	beq	.L899
+	bhi	.L900
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L865
-.L862:
+	beq	.L901
+.L898:
 	add	r9, r9, #1
-	b	.L854
-.L864:
+	b	.L890
+.L900:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L866
+	beq	.L902
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L858
-	b	.L862
-.L866:
-	ldrh	r2, [r4, #3944]
+	beq	.L894
+	b	.L898
+.L902:
+	ldrh	r2, [r4, #3952]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L868
-	movw	r2, #1211
-	ldr	r1, .L929+8
-	ldr	r0, .L929+12
+	bls	.L904
+	mov	r2, #1256
+	ldr	r1, .L965+8
+	ldr	r0, .L965+12
 	bl	sftl_printk
-.L868:
+.L904:
 	ldr	r1, [r4, #128]
-	ldrh	r0, [r4, #3944]
-	ldr	r10, [r4, #3892]
+	ldrh	r0, [r4, #3952]
+	ldr	r10, [r4, #3896]
 	uxth	ip, r1
 	add	r3, ip, #-1
 	sub	ip, ip, r0
 	add	ip, ip, #-1
 	sxth	r3, r3
 	sxth	ip, ip
-.L869:
+.L905:
 	cmp	r3, ip
-	bgt	.L875
+	bgt	.L911
 	cmp	r3, #0
-	bge	.L907
-	b	.L862
-.L875:
+	bge	.L943
+	b	.L898
+.L911:
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	mov	lr, r2
 	ldr	r2, [r10, r3, lsl #2]
 	cmp	lr, r2
-	bls	.L870
+	bls	.L906
 	ldr	r2, [r10]
-	cbnz	r2, .L871
+	cbnz	r2, .L907
 	cmp	r1, r0
 	itt	ne
 	addne	r0, r0, #1
-	strhne	r0, [r4, #3944]	@ movhi
-.L871:
+	strhne	r0, [r4, #3952]	@ movhi
+.L907:
 	uxth	ip, r3
 	movs	r2, #0
-.L872:
+.L908:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L873
-	ldr	r2, [r4, #3892]
+	bhi	.L909
+	ldr	r2, [r4, #3896]
 	cmp	r3, #0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
-	ldr	r2, [r4, #3868]
+	ldr	r2, [r4, #3872]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	blt	.L862
-	ldrh	r0, [r4, #3944]
+	blt	.L898
+	ldrh	r0, [r4, #3952]
 	ldr	r2, [r4, #128]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L862
-.L907:
-	ldr	r2, [r4, #3892]
+	bgt	.L898
+.L943:
+	ldr	r2, [r4, #3896]
 	adds	r0, r0, #1
 	ldr	r1, [r6, #4]
-	strh	r0, [r4, #3944]	@ movhi
+	strh	r0, [r4, #3952]	@ movhi
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, [r4, #3868]
-.L927:
+	ldr	r2, [r4, #3872]
+.L963:
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L862
-.L873:
-	ldr	r0, [r4, #3892]
+	b	.L898
+.L909:
+	ldr	r0, [r4, #3896]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
 	str	lr, [r0, r1, lsl #2]
-	ldr	r0, [r4, #3868]
+	ldr	r0, [r4, #3872]
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L872
-.L870:
+	b	.L908
+.L906:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L869
-.L930:
+	b	.L905
+.L966:
 	.align	2
-.L929:
+.L965:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR1+328
 	.word	.LC1
-.L865:
+.L901:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L878
-	movw	r2, #1252
-	ldr	r1, .L931
-	ldr	r0, .L931+4
+	bls	.L914
+	movw	r2, #1297
+	ldr	r1, .L967
+	ldr	r0, .L967+4
 	bl	sftl_printk
-.L878:
+.L914:
 	ldrh	lr, [r4, #120]
 	ldrh	r0, [r4, #144]
-	ldr	r10, [r4, #3880]
+	ldr	r10, [r4, #3884]
 	add	ip, lr, #-1
 	sxth	r3, ip
 	sub	ip, ip, r0
-.L879:
+.L915:
 	cmp	r3, ip
-	ble	.L884
+	ble	.L920
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	ldr	r1, [r10, r3, lsl #2]
 	cmp	r2, r1
-	bls	.L880
+	bls	.L916
 	ldr	r2, [r10]
-	cbnz	r2, .L881
+	cbnz	r2, .L917
 	cmp	lr, r0
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #144]	@ movhi
-.L881:
+.L917:
 	uxth	ip, r3
 	movs	r2, #0
-.L882:
+.L918:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L883
-	ldr	r2, [r4, #3880]
+	bhi	.L919
+	ldr	r2, [r4, #3884]
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
 	ldr	r2, [r4, #148]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L884:
+.L920:
 	cmp	r3, #0
-	blt	.L862
+	blt	.L898
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L862
+	bgt	.L898
 	adds	r1, r1, #1
-	ldr	r2, [r4, #3880]
+	ldr	r2, [r4, #3884]
 	strh	r1, [r4, #144]	@ movhi
 	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
 	ldr	r2, [r4, #148]
-	b	.L927
-.L883:
-	ldr	r0, [r4, #3880]
+	b	.L963
+.L919:
+	ldr	r0, [r4, #3884]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
 	ldr	lr, [lr, #4]
@@ -6258,127 +6380,127 @@ FtlScanSysBlk:
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L882
-.L880:
+	b	.L918
+.L916:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L879
-.L863:
+	b	.L915
+.L899:
 	ldrh	r1, [r4, #2576]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L886
+	bne	.L922
 	strh	r5, [r4, #2576]	@ movhi
-.L928:
+.L964:
 	str	r3, [r4, #2584]
-	b	.L862
-.L886:
+	b	.L898
+.L922:
 	ldrh	r0, [r4, #2580]
 	cmp	r0, r2
-	beq	.L887
+	beq	.L923
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L887:
+.L923:
 	ldr	r2, [r4, #2584]
 	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L888
+	bcs	.L924
 	ldrh	r3, [r4, #2576]
 	strh	r5, [r4, #2576]	@ movhi
 	strh	r3, [r4, #2580]	@ movhi
 	ldr	r3, [r6, #4]
-	b	.L928
-.L888:
+	b	.L964
+.L924:
 	strh	r5, [r4, #2580]	@ movhi
-	b	.L862
-.L891:
-	ldr	r1, [r4, #3868]
+	b	.L898
+.L927:
+	ldr	r1, [r4, #3872]
 	ldrh	r3, [r1]
-	cbz	r3, .L893
-.L896:
+	cbz	r3, .L929
+.L932:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L894
-.L895:
-	ldrh	r2, [r4, #3944]
+	beq	.L930
+.L931:
+	ldrh	r2, [r4, #3952]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L926
-	movw	r2, #1377
-	ldr	r1, .L931
-	ldr	r0, .L931+4
+	bls	.L962
+	movw	r2, #1422
+	ldr	r1, .L967
+	ldr	r0, .L967+4
 	bl	sftl_printk
-.L926:
+.L962:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L893:
-	ldrh	r2, [r4, #3944]
+.L929:
+	ldrh	r2, [r4, #3952]
 	cmp	r2, #0
-	beq	.L896
+	beq	.L932
 	ldr	r0, [r4, #128]
-.L897:
+.L933:
 	sxth	r2, r3
 	cmp	r2, r0
-	bcs	.L896
+	bcs	.L932
 	ldrh	r5, [r1, r2, lsl #1]
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L897
+	beq	.L933
 	mov	r3, r2
 	movs	r5, #0
-.L898:
+.L934:
 	ldr	r1, [r4, #128]
 	cmp	r3, r1
-	bcs	.L896
-	ldr	r1, [r4, #3868]
+	bcs	.L932
+	ldr	r1, [r4, #3872]
 	subs	r0, r3, r2
 	ldrh	r6, [r1, r3, lsl #1]
 	strh	r6, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, [r4, #3892]
+	ldr	r1, [r4, #3896]
 	ldr	r6, [r1, r3, lsl #2]
 	str	r6, [r1, r0, lsl #2]
-	ldr	r1, [r4, #3868]
+	ldr	r1, [r4, #3872]
 	strh	r5, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L898
-.L894:
+	b	.L934
+.L930:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
-	beq	.L895
+	beq	.L931
 	ldrh	r0, [r4, #120]
-.L903:
+.L939:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	r5, r3
-	bge	.L895
+	bge	.L931
 	ldrh	r6, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r6, #0
-	beq	.L903
+	beq	.L939
 	movs	r0, #0
-.L904:
+.L940:
 	ldrh	r2, [r4, #120]
 	cmp	r3, r2
-	bge	.L895
+	bge	.L931
 	ldr	r2, [r4, #148]
 	subs	r1, r3, r5
 	ldrh	r6, [r2, r3, lsl #1]
 	strh	r6, [r2, r1, lsl #1]	@ movhi
-	ldr	r2, [r4, #3880]
+	ldr	r2, [r4, #3884]
 	ldr	r6, [r2, r3, lsl #2]
 	str	r6, [r2, r1, lsl #2]
 	ldr	r2, [r4, #148]
 	strh	r0, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L904
-.L932:
+	b	.L940
+.L968:
 	.align	2
-.L931:
+.L967:
 	.word	.LANCHOR1+328
 	.word	.LC1
 	.fnend
@@ -6404,7 +6526,7 @@ FtlMapTblRecovery:
 	ldrh	r10, [r0, #6]
 	str	r3, [sp, #4]
 	ldr	r3, [r0, #16]
-	ldr	r5, .L960
+	ldr	r5, .L994
 	ldr	r9, [r0, #12]
 	lsl	r2, r10, #2
 	str	r3, [sp, #12]
@@ -6412,13 +6534,13 @@ FtlMapTblRecovery:
 	ldr	r0, [sp, #4]
 	str	r3, [sp, #8]
 	bl	ftl_memset
-	ldr	r3, [r5, #3280]
+	ldr	r3, [r5, #3284]
 	movs	r2, #1
-	ldr	r6, [r5, #3284]
+	ldr	r6, [r5, #3288]
 	str	r2, [r4, #36]
-	str	r3, [r5, #3268]
+	str	r3, [r5, #3272]
 	movw	r3, #65535
-	str	r6, [r5, #3272]
+	str	r6, [r5, #3276]
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6428,14 +6550,14 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #8]
 	add	fp, r3, #-1
 	mov	r3, r5
-.L934:
+.L970:
 	ldr	r1, [sp, #8]
 	sxth	r2, r8
 	cmp	r2, r1
-	bge	.L951
+	bge	.L988
 	cmp	r2, fp
 	lsl	r7, r2, #1
-	bne	.L935
+	bne	.L971
 	ldrh	r0, [r9, fp, lsl #1]
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
@@ -6443,27 +6565,27 @@ FtlMapTblRecovery:
 	add	r7, r7, r9
 	strh	r8, [r4]	@ movhi
 	sxth	r9, r0
-	ldr	r8, .L960+4
+	ldr	r8, .L994+4
 	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
 	add	r9, r9, #1
 	ldr	r3, [r3, fp, lsl #2]
 	mov	fp, #0
 	str	r3, [r4, #28]
-.L936:
+.L972:
 	sxth	r2, fp
 	cmp	r2, r9
-	blt	.L938
-.L951:
+	blt	.L975
+.L988:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L940
+	bne	.L977
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L940:
+.L977:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6472,120 +6594,124 @@ FtlMapTblRecovery:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L938:
+.L975:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3264]
+	str	r2, [r5, #3268]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, [r5, #3260]
+	ldr	r2, [r5, #3264]
 	adds	r2, r2, #1
-	beq	.L937
+	beq	.L973
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L937
-	ldrh	r1, [r4, #4]
+	bls	.L974
 	ldrh	r0, [r6]
+	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	ittt	eq
-	ldreq	r1, [r5, #3264]
-	ldreq	r3, [sp, #4]
-	streq	r1, [r3, r2, lsl #2]
-.L937:
+	bne	.L974
+	ldr	r1, [r5, #3268]
+	ldr	r3, [sp, #4]
+	str	r1, [r3, r2, lsl #2]
+.L974:
 	add	fp, fp, #1
-	b	.L936
-.L935:
-	ldr	r1, [r5, #3280]
+	b	.L972
+.L973:
+	ldrh	r2, [r7]
+	strh	r2, [r4, #40]	@ movhi
+	b	.L974
+.L971:
+	ldr	r1, [r5, #3284]
 	str	r3, [sp, #20]
 	add	r3, r9, r7
-	ldr	r0, .L960+4
-	str	r1, [r5, #3268]
+	ldr	r0, .L994+4
+	str	r1, [r5, #3272]
 	ldrh	r1, [r9, r2, lsl #1]
 	ldrh	r2, [r5, #104]
 	str	r3, [sp, #16]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #3264]
+	str	r2, [r5, #3268]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, [r5, #3260]
+	ldr	r2, [r5, #3264]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L953
+	beq	.L990
 	ldrh	r1, [r6]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L953
+	bne	.L990
 	ldrh	r1, [r6, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L942
-.L953:
+	beq	.L979
+.L990:
 	movs	r7, #0
-.L943:
+.L980:
 	ldrh	r1, [r3, #104]
 	sxth	r2, r7
 	cmp	r2, r1
-	bge	.L949
+	bge	.L986
 	ldr	r1, [sp, #16]
-	ldr	r0, .L960+4
+	ldr	r0, .L994+4
 	str	r3, [sp, #20]
 	ldrh	r1, [r1]
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #3264]
+	str	r2, [r3, #3268]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
 	ldr	r3, [sp, #20]
-	ldr	r2, [r3, #3260]
+	ldr	r2, [r3, #3264]
 	adds	r2, r2, #1
-	beq	.L947
+	beq	.L984
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L947
+	bls	.L984
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
 	ittt	eq
-	ldreq	r1, [r3, #3264]
+	ldreq	r1, [r3, #3268]
 	ldreq	r0, [sp, #4]
 	streq	r1, [r0, r2, lsl #2]
-.L947:
+.L984:
 	adds	r7, r7, #1
-	b	.L943
-.L942:
+	b	.L980
+.L979:
 	movs	r0, #0
 	mov	ip, #4
-.L944:
+.L981:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	subs	r1, r1, #1
 	cmp	r2, r1
-	blt	.L946
-.L949:
+	blt	.L983
+.L986:
 	add	r8, r8, #1
-	b	.L934
-.L946:
-	ldr	r7, [r5, #3280]
+	b	.L970
+.L983:
+	ldr	r7, [r5, #3284]
 	ldr	r1, [r7, r2, lsl #3]
 	uxth	lr, r1
 	cmp	r10, lr
-	bls	.L945
+	bls	.L982
 	add	r2, ip, r2, lsl #3
 	ldr	r2, [r7, r2]
 	ldr	r7, [sp, #4]
 	str	r2, [r7, lr, lsl #2]
-.L945:
+.L982:
 	adds	r0, r0, #1
-	b	.L944
-.L961:
+	b	.L981
+.L995:
 	.align	2
-.L960:
+.L994:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.fnend
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	1
@@ -6599,32 +6725,34 @@ FtlLoadVonderInfo:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L963
+	ldr	r0, .L997
 	push	{r3, lr}
 	.save {r3, lr}
 	ldrh	r3, [r0, #120]
-	strh	r3, [r0, #3958]	@ movhi
+	strh	r3, [r0, #3966]	@ movhi
 	movw	r3, #61574
-	strh	r3, [r0, #3952]	@ movhi
+	strh	r3, [r0, #3960]	@ movhi
 	ldrh	r3, [r0, #144]
-	strh	r3, [r0, #3956]	@ movhi
+	strh	r3, [r0, #3964]	@ movhi
 	ldrh	r3, [r0, #122]
-	strh	r3, [r0, #3954]	@ movhi
+	strh	r3, [r0, #3962]	@ movhi
 	ldr	r3, [r0, #148]
-	addw	r0, r0, #3948
+	addw	r0, r0, #3956
 	str	r3, [r0, #12]
-	ldr	r3, [r0, #-68]
-	str	r3, [r0, #16]
 	ldr	r3, [r0, #-72]
+	str	r3, [r0, #16]
+	ldr	r3, [r0, #-76]
 	str	r3, [r0, #20]
-	ldr	r3, [r0, #-64]
+	ldr	r3, [r0, #-68]
 	str	r3, [r0, #24]
+	movw	r3, #65535
+	strh	r3, [r0, #40]	@ movhi
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L964:
+.L998:
 	.align	2
-.L963:
+.L997:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6642,48 +6770,49 @@ FtlL2PDataInit:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L968
+	ldr	r4, .L1002
 	movs	r6, #12
 	ldr	r2, [r4, #128]
-	ldr	r0, [r4, #3872]
+	ldr	r0, [r4, #3876]
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r3, [r4, #110]
 	movs	r1, #255
 	ldrh	r2, [r4, #138]
-	ldr	r0, [r4, #3896]
+	ldr	r0, [r4, #3900]
 	muls	r2, r3, r2
 	bl	ftl_memset
 	movs	r2, #0
 	mov	r3, r4
 	movw	r1, #65535
 	mov	r7, r2
-.L966:
+.L1000:
 	ldrh	r4, [r3, #138]
 	uxth	r0, r2
 	adds	r5, r2, #1
 	cmp	r4, r0
-	bhi	.L967
+	bhi	.L1001
 	ldr	r2, [r3, #128]
-	strh	r1, [r3, #3906]	@ movhi
-	strh	r1, [r3, #3904]	@ movhi
-	strh	r2, [r3, #3914]	@ movhi
+	strh	r1, [r3, #3910]	@ movhi
+	strh	r1, [r3, #3908]	@ movhi
+	strh	r2, [r3, #3918]	@ movhi
 	movw	r2, #61634
-	strh	r2, [r3, #3908]	@ movhi
-	ldrh	r2, [r3, #3944]
 	strh	r2, [r3, #3912]	@ movhi
+	ldrh	r2, [r3, #3952]
+	strh	r1, [r3, #3948]	@ movhi
+	strh	r2, [r3, #3916]	@ movhi
 	ldrh	r2, [r3, #136]
-	strh	r2, [r3, #3910]	@ movhi
-	ldr	r2, [r3, #3868]
-	str	r2, [r3, #3916]
-	ldr	r2, [r3, #3892]
-	str	r2, [r3, #3920]
+	strh	r2, [r3, #3914]	@ movhi
 	ldr	r2, [r3, #3872]
+	str	r2, [r3, #3920]
+	ldr	r2, [r3, #3896]
 	str	r2, [r3, #3924]
-	ldr	r2, [r3, #3888]
+	ldr	r2, [r3, #3876]
 	str	r2, [r3, #3928]
+	ldr	r2, [r3, #3892]
+	str	r2, [r3, #3932]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L967:
+.L1001:
 	uxth	r2, r2
 	ldr	r0, [r3, #2492]
 	mul	r4, r6, r2
@@ -6694,15 +6823,15 @@ FtlL2PDataInit:
 	add	r0, r0, r4
 	ldrh	r4, [r3, #110]
 	muls	r2, r4, r2
-	ldr	r4, [r3, #3896]
+	ldr	r4, [r3, #3900]
 	bic	r2, r2, #3
 	add	r2, r2, r4
 	str	r2, [r0, #8]
 	mov	r2, r5
-	b	.L966
-.L969:
+	b	.L1000
+.L1003:
 	.align	2
-.L968:
+.L1002:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -6720,14 +6849,14 @@ FtlLoadMapInfo:
 	push	{r3, lr}
 	.save {r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L971
+	ldr	r0, .L1005
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L972:
+.L1006:
 	.align	2
-.L971:
-	.word	.LANCHOR0+3904
+.L1005:
+	.word	.LANCHOR0+3908
 	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	1
@@ -6744,18 +6873,17 @@ FtlVariablesInit:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r5, #0
-	ldr	r4, .L974
+	ldr	r4, .L1008
 	movw	r3, #65535
 	mov	r1, r5
 	ldrh	r2, [r4, #120]
-	strh	r3, [r4, #3992]	@ movhi
+	strh	r3, [r4, #4000]	@ movhi
 	mov	r3, #-1
 	ldr	r0, [r4, #148]
-	str	r3, [r4, #4004]
+	str	r3, [r4, #4012]
 	lsls	r2, r2, #1
-	str	r5, [r4, #3988]
-	str	r5, [r4, #3996]
-	str	r5, [r4, #4000]
+	str	r5, [r4, #4004]
+	str	r5, [r4, #4008]
 	strh	r5, [r4, #144]	@ movhi
 	bl	ftl_memset
 	ldrh	r2, [r4, #42]
@@ -6765,7 +6893,7 @@ FtlVariablesInit:
 	bl	ftl_memset
 	ldrh	r2, [r4, #42]
 	mov	r1, r5
-	ldr	r0, [r4, #3856]
+	ldr	r0, [r4, #3860]
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	addw	r0, r4, #2268
@@ -6778,9 +6906,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L975:
+.L1009:
 	.align	2
-.L974:
+.L1008:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -6793,109 +6921,119 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-	movs	r6, #0
-	ldr	r4, .L987
+	movs	r5, #0
+	ldr	r4, .L1021
 	movs	r2, #6
-	mov	r9, r6
-	mov	r7, r6
-	movs	r1, #0
+	mov	r9, r5
+	mov	r6, r5
+	movw	fp, #65535
+	.pad #20
+	sub	sp, sp, #20
 	ldrh	r3, [r4, #42]
-	add	fp, r4, #60
+	add	r10, r4, #60
+	movs	r1, #0
 	ldr	r0, [r4, #2316]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	str	r6, [r4, #2340]
-	str	r6, [r4, #2320]
-	str	r6, [r4, #2332]
-	strh	r6, [r4, #2336]	@ movhi
-	strh	r6, [r4, #2344]	@ movhi
-.L977:
+	str	r5, [r4, #2340]
+	str	r5, [r4, #2320]
+	str	r5, [r4, #2332]
+	strh	r5, [r4, #2336]	@ movhi
+	strh	r5, [r4, #2344]	@ movhi
+.L1011:
 	ldrh	r3, [r4, #40]
-	uxth	r8, r6
+	uxth	r8, r5
 	cmp	r8, r3
-	bcs	.L983
-	mov	r10, #0
-	ldrh	r2, [r4, #32]
+	bcs	.L1018
 	ldrh	r3, [r4, #102]
-	mov	r5, r10
-	b	.L984
-.L979:
+	ldrh	r2, [r4, #32]
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r7, r3
+	b	.L1019
+.L1013:
+	ldrb	r0, [r10, r3]	@ zero_extendqisi2
 	mov	r1, r8
-	ldrb	r0, [fp, r10]	@ zero_extendqisi2
-	stm	sp, {r2, r3}
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	ldm	sp, {r2, r3}
-	cbnz	r0, .L978
-	add	r5, r5, r3
-	uxth	r5, r5
-.L978:
-	add	r10, r10, #1
-.L984:
-	uxth	r1, r10
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L1012
+	ldr	r1, [sp, #4]
+	add	r7, r7, r1
+	uxth	r7, r7
+.L1012:
+	adds	r3, r3, #1
+.L1019:
+	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L979
-	cbz	r5, .L986
-	mov	r1, r5
+	bhi	.L1013
+	uxth	r3, r5
+	cbz	r7, .L1014
+	mov	r1, r7
+	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L980:
-	ldr	r2, [r4, #2316]
-	uxth	r1, r6
-	movs	r3, #6
-	mla	r3, r3, r1, r2
-	strh	r0, [r3, #4]	@ movhi
-	ldrh	r3, [r4, #2348]
-	cmp	r3, r8
-	beq	.L981
-	ldrh	r3, [r4, #2396]
-	cmp	r3, r8
-	beq	.L981
-	ldrh	r3, [r4, #2444]
-	cmp	r3, r8
-	beq	.L981
-	ldr	r3, [r4, #2324]
-	ldrh	r3, [r3, r1, lsl #1]
-	cbnz	r3, .L982
+	ldr	r3, [sp, #4]
+	uxth	r7, r0
+.L1015:
+	ldr	r1, [r4, #2316]
+	movs	r2, #6
+	mla	r2, r2, r3, r1
+	strh	r7, [r2, #4]	@ movhi
+	ldrh	r2, [r4, #2348]
+	cmp	r2, r8
+	beq	.L1016
+	ldrh	r2, [r4, #2396]
+	cmp	r2, r8
+	beq	.L1016
+	ldrh	r2, [r4, #2444]
+	cmp	r2, r8
+	beq	.L1016
+	ldr	r2, [r4, #2324]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L1017
 	add	r9, r9, #1
 	mov	r0, r8
 	uxth	r9, r9
 	bl	INSERT_FREE_LIST
-.L981:
+.L1016:
+	adds	r5, r5, #1
+	b	.L1011
+.L1014:
+	ldr	r2, [r4, #2324]
+	strh	fp, [r2, r3, lsl #1]	@ movhi
+	b	.L1015
+.L1017:
 	adds	r6, r6, #1
-	b	.L977
-.L986:
-	mov	r0, r5
-	b	.L980
-.L982:
-	adds	r7, r7, #1
 	mov	r0, r8
-	uxth	r7, r7
+	uxth	r6, r6
 	bl	INSERT_DATA_LIST
-	b	.L981
-.L983:
-	strh	r7, [r4, #2336]	@ movhi
-	add	r7, r7, r9
-	cmp	r7, r3
+	b	.L1016
+.L1018:
+	strh	r6, [r4, #2336]	@ movhi
+	add	r6, r6, r9
+	cmp	r6, r3
 	strh	r9, [r4, #2344]	@ movhi
-	ble	.L985
-	movw	r2, #2154
-	ldr	r1, .L987+4
-	ldr	r0, .L987+8
+	ble	.L1020
+	movw	r2, #2206
+	ldr	r1, .L1021+4
+	ldr	r0, .L1021+8
 	bl	sftl_printk
-.L985:
+.L1020:
 	movs	r0, #0
-	add	sp, sp, #12
+	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L988:
+.L1022:
 	.align	2
-.L987:
+.L1021:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+342
 	.word	.LC1
@@ -6915,7 +7053,7 @@ FtlGcPageVarInit:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r3, #0
-	ldr	r4, .L990
+	ldr	r4, .L1024
 	movs	r1, #255
 	ldrh	r2, [r4, #106]
 	ldr	r0, [r4, #3188]
@@ -6931,9 +7069,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L991:
+.L1025:
 	.align	2
-.L990:
+.L1024:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -6948,7 +7086,7 @@ FtlGcScanTempBlk:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1017
+	ldr	r3, .L1051
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #28
@@ -6958,31 +7096,31 @@ FtlGcScanTempBlk:
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1011
-	cbnz	r4, .L993
-.L994:
+	beq	.L1045
+	cbnz	r4, .L1027
+.L1028:
 	bl	FtlGcPageVarInit
-	b	.L995
-.L1011:
+	b	.L1029
+.L1045:
 	movs	r4, #0
-.L993:
-	ldr	r3, .L1017+4
+.L1027:
+	ldr	r3, .L1051+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3, #102]
 	cmp	r3, r2
-	beq	.L994
-.L995:
+	beq	.L1028
+.L1029:
 	mov	fp, #0
 	movw	r8, #65535
-.L1005:
+.L1039:
 	ldrh	r3, [r7]
 	movs	r0, #0
 	strb	r0, [r7, #8]
 	cmp	r3, r8
-	beq	.L996
-	ldr	r5, .L1017+4
-.L1008:
-	ldr	r3, [r5, #3832]
+	beq	.L1030
+	ldr	r5, .L1051+4
+.L1042:
+	ldr	r3, [r5, #3836]
 	movs	r2, #0
 	ldrh	ip, [r5, #32]
 	add	lr, r7, #16
@@ -6996,35 +7134,35 @@ FtlGcScanTempBlk:
 	str	r3, [sp, #16]
 	ldrh	r3, [r5, #112]
 	str	r3, [sp, #20]
-.L997:
+.L1031:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1001
+	bhi	.L1035
 	mov	r9, #0
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.L1002:
+.L1036:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L1006
+	bhi	.L1040
 	ldr	r3, [sp, #8]
 	add	fp, fp, #1
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, fp
-	bls	.L1007
-.L1009:
+	bls	.L1041
+.L1043:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L1008
+	bhi	.L1042
 	movs	r0, #0
-	b	.L996
-.L1001:
+	b	.L1030
+.L1035:
 	ldrh	r3, [lr], #2
 	cmp	r3, r8
-	beq	.L998
+	beq	.L1032
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r9, r6, r1
@@ -7047,12 +7185,12 @@ FtlGcScanTempBlk:
 	str	r0, [r1, #8]
 	add	r3, r3, r10
 	str	r3, [r1, #12]
-.L998:
+.L1032:
 	adds	r2, r2, #1
-	b	.L997
-.L1006:
+	b	.L1031
+.L1040:
 	movs	r3, #20
-	ldr	r2, [r5, #3832]
+	ldr	r2, [r5, #3836]
 	mul	r10, r3, r9
 	str	r2, [sp, #16]
 	add	r3, r2, r10
@@ -7063,18 +7201,18 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L1003
+	cbnz	r2, .L1037
 	ldr	r3, [sp, #12]
 	add	r9, r9, #1
 	ldr	r1, [sp, #4]
 	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
 	cmp	r2, r8
-	bne	.L1004
+	bne	.L1038
 	movs	r3, #1
-	str	r3, [r5, #4000]
-.L996:
-	ldr	r3, .L1017
+	str	r3, [r5, #4008]
+.L1030:
+	ldr	r3, .L1051
 	movw	r2, #65535
 	strb	r0, [r7, #6]
 	mov	r1, r4
@@ -7083,13 +7221,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r7
 	bl	ftl_sb_update_avl_pages
-	b	.L1010
-.L1004:
+	b	.L1044
+.L1038:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1002
-.L1003:
+	b	.L1036
+.L1037:
 	ldrh	r2, [r7]
 	movs	r4, #0
 	ldr	r3, [r5, #2324]
@@ -7098,25 +7236,25 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	strh	r8, [r7]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1005
-.L1007:
-	ldr	r2, .L1017
+	b	.L1039
+.L1041:
+	ldr	r2, .L1051
 	ldrh	r3, [r2, #4]
 	cmp	r3, r8
-	beq	.L1009
+	beq	.L1043
 	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L1009
-.L1010:
+	bls	.L1043
+.L1044:
 	mov	r0, #-1
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1018:
+.L1052:
 	.align	2
-.L1017:
+.L1051:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.fnend
@@ -7151,27 +7289,27 @@ FtlBbmTblFlush:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r5, #0
-	ldr	r4, .L1029
+	ldr	r4, .L1063
 	movs	r1, #0
-	ldr	r0, [r4, #3280]
+	ldr	r0, [r4, #3284]
 	add	r6, r4, #176
-	ldr	r3, [r4, #3284]
+	ldr	r3, [r4, #3288]
 	ldrh	r2, [r4, #110]
-	str	r0, [r4, #3268]
-	str	r3, [r4, #3272]
+	str	r0, [r4, #3272]
+	str	r3, [r4, #3276]
 	bl	ftl_memset
-.L1021:
+.L1055:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1022
-	ldr	r6, [r4, #3272]
+	blt	.L1056
+	ldr	r6, [r4, #3276]
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r9, .L1029+12
-	ldr	r8, .L1029+4
+	ldr	r9, .L1063+12
+	ldr	r8, .L1063+4
 	movs	r5, #0
 	mov	r0, r6
-	ldr	r10, .L1029+16
+	ldr	r10, .L1063+16
 	bl	memset
 	movw	r3, #61649
 	mov	r7, r5
@@ -7186,24 +7324,24 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1023:
-	ldr	r3, [r4, #3280]
+.L1057:
+	ldr	r3, [r4, #3284]
 	mov	fp, #0
 	ldrh	r1, [r4, #152]
 	ldrh	r2, [r4, #154]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	str	fp, [r4, #3260]
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	fp, [r4, #3264]
+	str	r3, [r4, #3276]
 	orr	r3, r2, r1, lsl #10
 	ldrh	r0, [r6, #10]
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	ldrh	r3, [r4, #156]
 	str	r0, [sp]
 	mov	r0, r9
 	bl	sftl_printk
 	movs	r3, #1
-	ldr	r0, .L1029+4
+	ldr	r0, .L1063+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -7211,10 +7349,10 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1024
+	blt	.L1058
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	adds	r3, r3, #1
 	strh	fp, [r4, #154]	@ movhi
 	str	r3, [r4, #160]
@@ -7226,7 +7364,7 @@ FtlBbmTblFlush:
 	strh	r3, [r4, #152]	@ movhi
 	mov	r1, r2
 	lsls	r3, r3, #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	movs	r3, #1
@@ -7234,54 +7372,54 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1024:
+.L1058:
 	ldrh	r3, [r4, #154]
 	adds	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	bne	.L1025
+	bne	.L1059
 	adds	r5, r5, #1
-	ldr	r1, [r4, #3264]
+	ldr	r1, [r4, #3268]
 	uxth	r5, r5
 	mov	r0, r10
 	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1023
+	bls	.L1057
 	mov	r2, r5
-	ldr	r1, [r4, #3264]
-	ldr	r0, .L1029+8
+	ldr	r1, [r4, #3268]
+	ldr	r0, .L1063+8
 	bl	sftl_printk
-.L1027:
-	b	.L1027
-.L1022:
-	ldrh	r2, [r4, #3900]
-	ldr	r3, [r4, #3268]
+.L1061:
+	b	.L1061
+.L1056:
+	ldrh	r2, [r4, #3904]
+	ldr	r3, [r4, #3272]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r5
 	lsls	r2, r2, #2
 	adds	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1021
-.L1028:
+	b	.L1055
+.L1062:
 	movs	r7, #1
-	b	.L1023
-.L1025:
+	b	.L1057
+.L1059:
 	cmp	r7, #0
-	beq	.L1028
+	beq	.L1062
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1030:
+.L1064:
 	.align	2
-.L1029:
+.L1063:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
+	.word	.LC102
 	.word	.LC100
-	.word	.LC98
-	.word	.LC99
+	.word	.LC101
 	.fnend
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.align	1
@@ -7298,28 +7436,28 @@ allocate_data_superblock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r5, r0
-	ldr	r4, .L1066
+	ldr	r4, .L1100
 	.pad #20
 	sub	sp, sp, #20
-	ldr	r9, .L1066+20
-.L1032:
-	ldr	r3, .L1066
-	ldr	r2, .L1066
+	ldr	r9, .L1100+20
+.L1066:
+	ldr	r3, .L1100
+	ldr	r2, .L1100
 	ldrh	r3, [r3, #2344]
 	ldrh	r2, [r2, #2336]
 	add	r3, r3, r2
-	ldr	r2, .L1066
+	ldr	r2, .L1100
 	ldrh	r2, [r2, #40]
 	cmp	r3, r2
-	ble	.L1033
-	movw	r2, #2585
+	ble	.L1067
+	movw	r2, #2654
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1033:
-	ldr	r3, .L1066+8
+.L1067:
+	ldr	r3, .L1100+8
 	cmp	r5, r3
-	bne	.L1058
+	bne	.L1092
 	ldrh	r3, [r4, #2344]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7327,21 +7465,21 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L1034
+	cbz	r1, .L1068
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1034:
-	ldr	r0, .L1066+12
+.L1068:
+	ldr	r0, .L1100+12
 	bl	List_pop_index_node
 	ldrh	r3, [r4, #2344]
 	mov	r6, r0
 	uxth	r8, r0
-	cbnz	r3, .L1035
-	movw	r2, #2594
+	cbnz	r3, .L1069
+	movw	r2, #2663
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1035:
+.L1069:
 	ldrh	r3, [r4, #2344]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7349,7 +7487,7 @@ allocate_data_superblock:
 	strh	r8, [r5]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1036
+	cbnz	r3, .L1070
 	ldr	r3, [r4, #2324]
 	uxth	r6, r6
 	movw	r2, #65535
@@ -7361,28 +7499,28 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1032
-	movw	r2, #2605
+	ble	.L1066
+	movw	r2, #2674
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-	b	.L1032
-.L1058:
+	b	.L1066
+.L1092:
 	movs	r1, #0
-	b	.L1034
-.L1036:
+	b	.L1068
+.L1070:
 	ldrh	r2, [r4, #2336]
 	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1038
-	mov	r2, #2608
+	ble	.L1072
+	movw	r2, #2677
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1038:
-	ldr	r1, [r4, #3800]
+.L1072:
+	ldr	r1, [r4, #3804]
 	mov	r10, #20
 	ldrh	r2, [r4, #32]
 	add	fp, r5, #16
@@ -7392,35 +7530,35 @@ allocate_data_superblock:
 	mov	ip, r7
 	mla	r2, r10, r2, r1
 	str	r2, [sp, #4]
-.L1039:
+.L1073:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bne	.L1041
-	cbnz	r7, .L1042
-	movw	r2, #2619
+	bne	.L1075
+	cbnz	r7, .L1076
+	mov	r2, #2688
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1042:
+.L1076:
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r8
-	bne	.L1043
-	movw	r2, #2621
+	bne	.L1077
+	movw	r2, #2690
 	mov	r1, r9
-	ldr	r0, .L1066+4
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1043:
+.L1077:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	ldr	r2, [r4, #2328]
 	cmp	r3, #0
-	bne	.L1044
+	bne	.L1078
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1045
+	beq	.L1079
 	ldrh	r1, [r4, #92]
 	add	r3, r3, r1
-.L1065:
+.L1099:
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	movs	r1, #0
 	ldr	r3, [r4, #2548]
@@ -7428,7 +7566,7 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1047:
+.L1081:
 	ldr	r3, [r4, #2328]
 	ldr	r2, [r4, #2564]
 	ldrh	r0, [r4, #92]
@@ -7441,66 +7579,64 @@ allocate_data_superblock:
 	ldr	r3, [r4, #2552]
 	mla	r0, r2, r0, r3
 	bl	__aeabi_uidiv
-	ldr	r2, [r4, #3860]
-	ldr	r1, [r4, #3800]
+	ldr	r2, [r4, #3864]
+	ldr	r1, [r4, #3804]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1066+16
+	ldr	r0, .L1100+16
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
 	mla	r2, r2, r7, r1
 	adds	r3, r1, #4
 	adds	r2, r2, #24
-.L1049:
+.L1083:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1050
+	bne	.L1084
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	mov	r10, #0
 	bl	FlashEraseBlocks
 	mov	r3, r10
 	movs	r1, #20
-.L1051:
+.L1085:
 	uxth	r2, r10
 	cmp	r7, r2
-	bhi	.L1053
+	bhi	.L1087
 	cmp	r3, #0
-	ble	.L1054
+	ble	.L1088
 	mov	r0, r8
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1054:
+.L1088:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1055
+	bne	.L1089
 	ldr	r3, [r4, #2324]
 	movw	r2, #65535
-	mov	r0, r8
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	b	.L1032
-.L1041:
+	b	.L1066
+.L1075:
 	str	ip, [r3, #8]
 	movw	lr, #65535
 	str	ip, [r3, #12]
 	ldrh	r2, [r0], #2
 	cmp	r2, lr
-	beq	.L1040
+	beq	.L1074
 	mla	lr, r10, r7, r1
 	adds	r7, r7, #1
 	lsls	r2, r2, #10
 	uxth	r7, r7
 	str	r2, [lr, #4]
-.L1040:
+.L1074:
 	adds	r3, r3, #20
-	b	.L1039
-.L1045:
+	b	.L1073
+.L1079:
 	movs	r3, #2
-	b	.L1065
-.L1044:
+	b	.L1099
+.L1078:
 	ldrh	r3, [r2, r6, lsl #1]
 	mov	r0, r8
 	adds	r3, r3, #1
@@ -7509,19 +7645,19 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1047
-.L1050:
+	b	.L1081
+.L1084:
 	ldr	r1, [r3, #-20]
 	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1049
-.L1053:
+	b	.L1083
+.L1087:
 	mul	r2, r1, r10
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1052
+	bne	.L1086
 	ldr	r0, [ip, #4]
 	adds	r3, r3, #1
 	str	r1, [sp, #12]
@@ -7536,11 +7672,11 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1052:
+.L1086:
 	add	r10, r10, #1
 	add	fp, fp, #2
-	b	.L1051
-.L1055:
+	b	.L1085
+.L1089:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7557,22 +7693,22 @@ allocate_data_superblock:
 	ldrh	r1, [r5]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1056
+	cbz	r3, .L1090
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1057
-.L1056:
-	movw	r2, #2674
-	ldr	r1, .L1066+20
-	ldr	r0, .L1066+4
+	cbnz	r3, .L1091
+.L1090:
+	movw	r2, #2743
+	ldr	r1, .L1100+20
+	ldr	r0, .L1100+4
 	bl	sftl_printk
-.L1057:
+.L1091:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1067:
+.L1101:
 	.align	2
-.L1066:
+.L1100:
 	.word	.LANCHOR0
 	.word	.LC1
 	.word	.LANCHOR0+2444
@@ -7595,67 +7731,67 @@ FtlGcFreeBadSuperBlk:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1080
-	ldrh	r3, [r4, #3206]
-	cbz	r3, .L1069
+	ldr	r4, .L1114
+	ldrh	r3, [r4, #3210]
+	cbz	r3, .L1103
 	movs	r7, #0
-	addw	r10, r4, #3208
-.L1070:
+	addw	r10, r4, #3212
+.L1104:
 	ldrh	r2, [r4, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1076
+	bhi	.L1110
 	bl	FtlGcReFreshBadBlk
-.L1069:
+.L1103:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1076:
+.L1110:
 	uxtah	r3, r4, r7
 	mov	r1, r8
 	mov	fp, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1071:
-	ldrh	r3, [r4, #3206]
+.L1105:
+	ldrh	r3, [r4, #3210]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1075
+	bhi	.L1109
 	adds	r7, r7, #1
-	b	.L1070
-.L1075:
+	b	.L1104
+.L1109:
 	uxth	r6, fp
 	add	r3, r4, r6, lsl #1
-	ldrh	r3, [r3, #3208]
+	ldrh	r3, [r3, #3212]
 	cmp	r3, r9
-	bne	.L1072
+	bne	.L1106
 	mov	r1, r9
-	ldr	r0, .L1080+4
+	ldr	r0, .L1114+4
 	bl	sftl_printk
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-	ldrh	r1, [r4, #3206]
+	ldrh	r1, [r4, #3210]
 	add	r3, r10, r6, lsl #1
-.L1073:
+.L1107:
 	cmp	r5, r1
-	bcc	.L1074
+	bcc	.L1108
 	subs	r1, r1, #1
-	strh	r1, [r4, #3206]	@ movhi
-.L1072:
+	strh	r1, [r4, #3210]	@ movhi
+.L1106:
 	add	fp, fp, #1
-	b	.L1071
-.L1074:
+	b	.L1105
+.L1108:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1073
-.L1081:
+	b	.L1107
+.L1115:
 	.align	2
-.L1080:
+.L1114:
 	.word	.LANCHOR0
-	.word	.LC101
+	.word	.LC103
 	.fnend
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	1
@@ -7669,7 +7805,7 @@ update_vpc_list:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1092
+	ldr	r2, .L1126
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r5, r0
@@ -7677,23 +7813,23 @@ update_vpc_list:
 	ldr	r3, [r2, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1083
+	bne	.L1117
 	ldrh	r1, [r2, #2588]
 	cmp	r1, r0
-	bne	.L1084
+	bne	.L1118
 	movw	r3, #65535
 	strh	r3, [r2, #2588]	@ movhi
-.L1085:
+.L1119:
 	mov	r1, r5
-	ldr	r0, .L1092+4
+	ldr	r0, .L1126+4
 	bl	List_remove_node
 	ldrh	r3, [r4, #2336]
-	cbnz	r3, .L1087
-	movw	r2, #2744
-	ldr	r1, .L1092+8
-	ldr	r0, .L1092+12
+	cbnz	r3, .L1121
+	movw	r2, #2813
+	ldr	r1, .L1126+8
+	ldr	r0, .L1126+12
 	bl	sftl_printk
-.L1087:
+.L1121:
 	ldrh	r3, [r4, #2336]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7706,34 +7842,34 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1091
-	movw	r2, #2747
-	ldr	r1, .L1092+8
-	ldr	r0, .L1092+12
+	ble	.L1125
+	mov	r2, #2816
+	ldr	r1, .L1126+8
+	ldr	r0, .L1126+12
 	bl	sftl_printk
-.L1091:
+.L1125:
 	movs	r3, #1
-	b	.L1082
-.L1084:
+	b	.L1116
+.L1118:
 	ldrh	r1, [r2, #2348]
 	cmp	r1, r0
-	beq	.L1082
+	beq	.L1116
 	ldrh	r1, [r2, #2396]
 	cmp	r1, r0
-	beq	.L1082
+	beq	.L1116
 	ldrh	r2, [r2, #2444]
 	cmp	r2, r0
-	bne	.L1085
-.L1082:
+	bne	.L1119
+.L1116:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1083:
+.L1117:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1082
-.L1093:
+	b	.L1116
+.L1127:
 	.align	2
-.L1092:
+.L1126:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2320
 	.word	.LANCHOR1+385
@@ -7756,69 +7892,102 @@ decrement_vpc_count:
 	.save {r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	ldr	r5, .L1103
-	beq	.L1095
+	ldr	r5, .L1140
+	beq	.L1129
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1096
+	cmp	r2, #0
+	bne	.L1130
 	mov	r1, r0
-	ldr	r0, .L1103+4
+	ldr	r0, .L1140+4
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
-	ldrh	r6, [r3, r4, lsl #1]
-	cbz	r6, .L1097
-.L1101:
-	movs	r6, #0
-.L1094:
-	mov	r0, r6
-	pop	{r4, r5, r6, pc}
-.L1097:
-	movw	r2, #2762
-.L1102:
-	ldr	r1, .L1103+8
-	ldr	r0, .L1103+12
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L1131
+	movw	r2, #2831
+	ldr	r1, .L1140+8
+	ldr	r0, .L1140+12
+	bl	sftl_printk
+.L1131:
+	ldr	r3, [r5, #2324]
+	movs	r2, #16
+	mov	r1, r4
+	ldr	r0, .L1140+16
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	test_node_in_list
+	cbz	r0, .L1132
+	mov	r1, r4
+	ldr	r0, .L1140+16
+	bl	List_remove_node
+	ldrh	r3, [r5, #2344]
+	cbnz	r3, .L1133
+	movw	r2, #2835
+	ldr	r1, .L1140+8
+	ldr	r0, .L1140+12
+	bl	sftl_printk
+.L1133:
+	ldrh	r3, [r5, #2344]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #2344]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r5, #2324]
+	mov	r1, r4
+	ldr	r0, .L1140+20
+	ldrh	r2, [r3, r4, lsl #1]
 	bl	sftl_printk
-	b	.L1094
-.L1096:
+.L1132:
+	mov	r0, r4
+	bl	FtlGcRefreshBlock
+.L1136:
+	movs	r6, #0
+	b	.L1128
+.L1130:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1095:
-	ldrh	r0, [r5, #3992]
+.L1129:
+	ldrh	r0, [r5, #4000]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1099
-	strh	r4, [r5, #3992]	@ movhi
-	b	.L1101
-.L1099:
+	bne	.L1135
+	strh	r4, [r5, #4000]	@ movhi
+	b	.L1136
+.L1135:
 	cmp	r4, r0
-	beq	.L1101
+	beq	.L1136
 	bl	update_vpc_list
 	ldr	r2, [r5, #2316]
 	adds	r6, r0, #0
 	ldr	r3, [r5, #2320]
 	it	ne
 	movne	r6, #1
-	strh	r4, [r5, #3992]	@ movhi
+	strh	r4, [r5, #4000]	@ movhi
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1103+16
+	ldr	r3, .L1140+24
 	muls	r3, r2, r3
 	ldr	r2, [r5, #2324]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1094
+	cbnz	r2, .L1128
 	cmp	r4, r1
-	beq	.L1094
-	movw	r2, #2778
-	b	.L1102
-.L1104:
+	beq	.L1128
+	movw	r2, #2856
+	ldr	r1, .L1140+8
+	ldr	r0, .L1140+12
+	bl	sftl_printk
+.L1128:
+	mov	r0, r6
+	pop	{r4, r5, r6, pc}
+.L1141:
 	.align	2
-.L1103:
+.L1140:
 	.word	.LANCHOR0
-	.word	.LC102
+	.word	.LC104
 	.word	.LANCHOR1+401
 	.word	.LC1
+	.word	.LANCHOR0+2340
+	.word	.LC105
 	.word	-1431655765
 	.fnend
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -7837,20 +8006,20 @@ FtlWriteDump_data:
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1123
+	ldr	r4, .L1160
 	ldrh	r2, [r4, #2352]
 	cmp	r2, #0
-	beq	.L1106
+	beq	.L1143
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1106
+	bne	.L1143
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1106
+	beq	.L1143
 	ldrb	r7, [r4, #2358]	@ zero_extendqisi2
-	cbnz	r7, .L1105
+	cbnz	r7, .L1142
 	ldr	r6, [r4, #2504]
 	mov	r2, r7
 	mov	r1, sp
@@ -7859,46 +8028,46 @@ FtlWriteDump_data:
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
-	ldr	r5, [r4, #3284]
-	ldr	r0, [r4, #3280]
+	ldr	r5, [r4, #3288]
+	ldr	r0, [r4, #3284]
 	str	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r6, [sp, #20]
 	str	r0, [sp, #12]
 	str	r5, [sp, #16]
 	str	r7, [r5, #4]
-	beq	.L1108
+	beq	.L1145
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.L1109:
-	ldr	r9, .L1123+4
+.L1146:
+	ldr	r9, .L1160+4
 	movs	r7, #0
 	lsl	r8, r8, #2
 	mov	r10, r7
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1110:
+.L1147:
 	cmp	r8, r7
-	bne	.L1114
-.L1111:
+	bne	.L1151
+.L1148:
 	movs	r3, #1
-.L1122:
+.L1159:
 	strb	r3, [r4, #2358]
-.L1105:
+.L1142:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1108:
+.L1145:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L1109
-.L1114:
+	b	.L1146
+.L1151:
 	ldrh	r3, [r4, #2352]
 	cmp	r3, #0
-	beq	.L1111
+	beq	.L1148
 	ldr	r3, [sp, #8]
 	mov	r0, r9
 	str	r6, [r5, #8]
@@ -7922,13 +8091,13 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #2348]
 	bl	decrement_vpc_count
-	b	.L1110
-.L1106:
+	b	.L1147
+.L1143:
 	movs	r3, #0
-	b	.L1122
-.L1124:
+	b	.L1159
+.L1161:
 	.align	2
-.L1123:
+.L1160:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2348
 	.fnend
@@ -7947,30 +8116,30 @@ l2p_flush:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1129
+	ldr	r5, .L1166
 	movs	r6, #12
 	bl	FtlWriteDump_data
-.L1126:
+.L1163:
 	ldrh	r3, [r5, #138]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1128
+	bhi	.L1165
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1128:
+.L1165:
 	ldr	r2, [r5, #2492]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1127
+	bge	.L1164
 	bl	flush_l2p_region
-.L1127:
+.L1164:
 	adds	r4, r4, #1
-	b	.L1126
-.L1130:
+	b	.L1163
+.L1167:
 	.align	2
-.L1129:
+.L1166:
 	.word	.LANCHOR0
 	.fnend
 	.size	l2p_flush, .-l2p_flush
@@ -7993,9 +8162,9 @@ FtlRecoverySuperblock:
 	sub	sp, sp, #52
 	mov	fp, r0
 	cmp	r3, r2
-	beq	.L1256
+	beq	.L1293
 	ldrh	r3, [r0, #2]
-	ldr	r4, .L1263
+	ldr	r4, .L1300
 	str	r3, [sp, #8]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
@@ -8003,32 +8172,32 @@ FtlRecoverySuperblock:
 	ldrh	r3, [r4, #102]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1134
+	bne	.L1171
 	strh	r3, [r0, #4]	@ movhi
-.L1261:
+.L1298:
 	strb	r3, [fp, #6]
-.L1256:
+.L1293:
 	movs	r0, #0
 	add	sp, sp, #52
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1134:
+.L1171:
 	ldrh	r0, [r0, #16]
-.L1135:
+.L1172:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1136
+	beq	.L1173
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	adds	r7, r0, #1
 	mov	r6, r0
-	beq	.L1137
+	beq	.L1174
 	ldr	r3, [r4, #3172]
 	movs	r2, #0
 	ldrh	lr, [r4, #32]
 	movw	r9, #65535
-	ldr	r0, [r4, #3832]
+	ldr	r0, [r4, #3836]
 	mov	r10, #20
 	str	r3, [sp, #4]
 	ldrh	r3, [r4, #110]
@@ -8039,32 +8208,32 @@ FtlRecoverySuperblock:
 	add	r3, fp, #16
 	mov	ip, r3
 	str	r3, [sp, #20]
-.L1138:
+.L1175:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L1144
-	ldr	r5, .L1263
+	bhi	.L1181
+	ldr	r5, .L1300
 	movs	r2, #0
 	mov	r1, r4
 	movw	r9, #65535
 	bl	FlashReadPages
 	ldr	r3, [r5, #2544]
 	uxth	r2, r6
-	ldr	r8, [r5, #3832]
+	ldr	r8, [r5, #3836]
 	str	r2, [sp, #12]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
 	mov	r7, r8
 	movs	r3, #0
-.L1145:
+.L1182:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1150
-	bne	.L1148
+	bhi	.L1187
+	bne	.L1185
 	adds	r3, r6, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1257:
+.L1294:
 	ldr	r0, [r8, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
@@ -8072,56 +8241,56 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #16]
 	str	r0, [sp, #12]
 	cmp	r3, r2
-	bne	.L1152
+	bne	.L1189
 	ldrh	r3, [sp, #16]
 	strh	r3, [fp, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [fp, #6]
 	strh	r3, [fp, #4]	@ movhi
-.L1152:
+.L1189:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bne	.L1153
+	bne	.L1190
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bne	.L1153
+	bne	.L1190
 	ldr	r1, [sp, #16]
 	mov	r2, r3
-.L1262:
+.L1299:
 	mov	r0, fp
 	bl	ftl_sb_update_avl_pages
-	b	.L1256
-.L1136:
+	b	.L1293
+.L1173:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1135
-.L1137:
+	b	.L1172
+.L1174:
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1139
-	movw	r2, #1755
-	ldr	r1, .L1263+4
-	ldr	r0, .L1263+8
+	cbz	r3, .L1176
+	movw	r2, #1804
+	ldr	r1, .L1300+4
+	ldr	r0, .L1300+8
 	bl	sftl_printk
-.L1139:
+.L1176:
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1140
+	cbz	r3, .L1177
 	cmp	r5, r3
-	beq	.L1140
-	movw	r2, #1756
-	ldr	r1, .L1263+4
-	ldr	r0, .L1263+8
+	beq	.L1177
+	movw	r2, #1805
+	ldr	r1, .L1300+4
+	ldr	r0, .L1300+8
 	bl	sftl_printk
-.L1140:
+.L1177:
 	movs	r3, #0
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1261
-.L1144:
+	b	.L1298
+.L1181:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L1141
+	beq	.L1178
 	mla	r1, r10, r4, r0
 	orr	r3, r6, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8143,56 +8312,56 @@ FtlRecoverySuperblock:
 	str	r5, [r1, #8]
 	add	r3, r3, r8
 	str	r3, [r1, #12]
-.L1141:
+.L1178:
 	adds	r2, r2, #1
-	b	.L1138
-.L1150:
+	b	.L1175
+.L1187:
 	ldr	r2, [r7]
-	cbnz	r2, .L1146
+	cbnz	r2, .L1183
 	ldr	r10, [r7, #12]
 	ldr	r2, [r10, #4]
 	adds	r0, r2, #1
-	beq	.L1147
+	beq	.L1184
 	ldr	r1, [r5, #2544]
 	mov	r0, r2
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1147
+	cbz	r0, .L1184
 	adds	r2, r2, #1
 	str	r2, [r5, #2544]
-.L1147:
+.L1184:
 	ldr	r2, [r10]
 	adds	r2, r2, #1
-	bne	.L1149
-.L1148:
+	bne	.L1186
+.L1185:
 	uxth	r2, r6
 	uxth	r3, r3
 	str	r2, [sp, #16]
 	movs	r2, #20
 	mla	r8, r2, r3, r8
-	b	.L1257
-.L1146:
+	b	.L1294
+.L1183:
 	ldr	r9, [sp, #12]
-.L1149:
+.L1186:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1145
-.L1153:
+	b	.L1182
+.L1190:
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1154
+	bne	.L1191
 	ldrb	r3, [fp, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1155
-.L1154:
-	ldr	r3, [r5, #4004]
+	bne	.L1192
+.L1191:
+	ldr	r3, [r5, #4012]
 	uxth	r8, r6
 	uxth	r6, r6
-	ldr	r7, .L1263
+	ldr	r7, .L1300
 	movw	r9, #65535
 	adds	r3, r3, #1
 	itt	eq
 	ldreq	r3, [sp, #4]
-	streq	r3, [r5, #4004]
+	streq	r3, [r5, #4012]
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #7
 	cmp	r6, r3
@@ -8200,133 +8369,133 @@ FtlRecoverySuperblock:
 	subgt	r4, r8, #7
 	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L1158:
+.L1195:
 	cmp	r4, r8
-	bhi	.L1165
+	bhi	.L1202
 	movs	r3, #0
 	ldrh	lr, [r7, #32]
-	ldr	r0, [r7, #3832]
+	ldr	r0, [r7, #3836]
 	mov	r6, r3
 	ldr	r1, [sp, #20]
 	mov	ip, #20
-	b	.L1166
-.L1160:
+	b	.L1203
+.L1197:
 	ldrh	r2, [r1], #2
 	cmp	r2, r9
-	beq	.L1159
+	beq	.L1196
 	mla	r10, ip, r6, r0
 	adds	r6, r6, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r6, r6
 	str	r2, [r10, #4]
-.L1159:
+.L1196:
 	adds	r3, r3, #1
-.L1166:
+.L1203:
 	uxth	r2, r3
 	cmp	r2, lr
-	bcc	.L1160
+	bcc	.L1197
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-	ldr	r3, [r7, #3832]
+	ldr	r3, [r7, #3836]
 	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1161:
+.L1198:
 	cmp	r6, r3
-	bne	.L1164
+	bne	.L1201
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1158
-.L1164:
+	b	.L1195
+.L1201:
 	ldr	r2, [r3]
-	cbnz	r2, .L1155
+	cbnz	r2, .L1192
 	ldr	r2, [r3, #12]
 	ldrh	r1, [r2]
 	cmp	r1, r9
-	beq	.L1163
+	beq	.L1200
 	ldr	r2, [r2, #4]
 	adds	r1, r2, #1
 	it	ne
-	strne	r2, [r7, #4004]
-.L1163:
+	strne	r2, [r7, #4012]
+.L1200:
 	adds	r3, r3, #20
-	b	.L1161
-.L1165:
+	b	.L1198
+.L1202:
 	mov	r3, #-1
-	str	r3, [r7, #4004]
-.L1155:
+	str	r3, [r7, #4012]
+.L1192:
 	movs	r3, #1
-	ldr	r0, .L1263+12
-	strh	r3, [r5, #4008]	@ movhi
-	ldr	r4, .L1263
+	ldr	r0, .L1300+12
+	strh	r3, [r5, #4016]	@ movhi
+	ldr	r4, .L1300
 	bl	FtlMapBlkWriteDump_data
 	ldr	r5, [sp, #8]
-.L1167:
+.L1204:
 	ldrh	r6, [r4, #32]
 	movs	r3, #0
-	ldr	r0, [r4, #3832]
+	ldr	r0, [r4, #3836]
 	mov	r10, r3
 	ldr	r1, [sp, #20]
 	movw	r7, #65535
 	mov	ip, #20
-.L1168:
+.L1205:
 	uxth	r2, r3
 	cmp	r6, r2
-	bhi	.L1170
+	bhi	.L1207
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
 	movs	r3, #0
-.L1260:
+.L1297:
 	str	r3, [sp, #28]
 	ldrh	r3, [sp, #28]
 	cmp	r10, r3
-	bhi	.L1200
+	bhi	.L1237
 	adds	r5, r5, #1
 	ldrh	r3, [r4, #102]
 	uxth	r5, r5
 	cmp	r3, r5
-	bne	.L1167
+	bne	.L1204
 	ldrh	r2, [r4, #32]
 	movw	r0, #65535
 	movs	r3, #0
 	strh	r5, [fp, #2]	@ movhi
 	strh	r3, [fp, #4]	@ movhi
-.L1201:
+.L1238:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1256
+	bcs	.L1293
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L1261
+	bne	.L1298
 	mov	r3, r1
-	b	.L1201
-.L1170:
+	b	.L1238
+.L1207:
 	ldrh	r2, [r1], #2
 	cmp	r2, r7
-	beq	.L1169
+	beq	.L1206
 	mla	lr, ip, r10, r0
 	add	r10, r10, #1
 	orr	r2, r5, r2, lsl #10
 	uxth	r10, r10
 	str	r2, [lr, #4]
-.L1169:
+.L1206:
 	adds	r3, r3, #1
-	b	.L1168
-.L1264:
+	b	.L1205
+.L1301:
 	.align	2
-.L1263:
+.L1300:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LANCHOR0+3904
-.L1200:
+	.word	.LANCHOR0+3908
+.L1237:
 	ldr	r3, [sp, #28]
 	movs	r7, #20
-	ldr	r9, [r4, #3832]
+	ldr	r9, [r4, #3836]
 	muls	r7, r3, r7
 	add	r8, r9, r7
 	ldr	r6, [r8, #4]
@@ -8335,57 +8504,57 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #8]
 	cmp	r5, r3
-	bcc	.L1172
-	bne	.L1173
+	bcc	.L1209
+	bne	.L1210
 	ldr	r3, [sp, #24]
 	cmp	r3, r0
-	bhi	.L1172
-.L1173:
+	bhi	.L1209
+.L1210:
 	ldr	r3, [sp, #16]
 	cmp	r5, r3
-	bne	.L1174
+	bne	.L1211
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L1175
-.L1174:
+	beq	.L1212
+.L1211:
 	ldr	r3, [r9, r7]
 	adds	r3, r3, #1
-	beq	.L1176
+	beq	.L1213
 	ldr	r8, [r8, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1177
-.L1184:
+	beq	.L1214
+.L1221:
 	ldrh	r0, [fp]
-.L1259:
+.L1296:
 	bl	decrement_vpc_count
-.L1172:
+.L1209:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1260
-.L1177:
+	b	.L1297
+.L1214:
 	ldr	r3, [r8, #4]
 	adds	r6, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1178
+	beq	.L1215
 	ldr	r1, [r4, #2544]
 	mov	r0, r3
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1178
+	cbz	r0, .L1215
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [r4, #2544]
-.L1178:
+.L1215:
 	ldrh	r2, [r8]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1179
-	movw	r2, #1905
-	ldr	r1, .L1265
-	ldr	r0, .L1265+4
+	beq	.L1216
+	movw	r2, #1954
+	ldr	r1, .L1302
+	ldr	r0, .L1302+4
 	bl	sftl_printk
-.L1179:
+.L1216:
 	ldr	r6, [r8, #8]
 	add	r1, sp, #40
 	ldr	r3, [r8, #12]
@@ -8393,207 +8562,207 @@ FtlRecoverySuperblock:
 	mov	r0, r6
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r1, [r4, #4004]
+	ldr	r1, [r4, #4012]
 	adds	r0, r1, #1
-	beq	.L1180
+	beq	.L1217
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1180
+	beq	.L1217
 	ldr	r3, [sp, #36]
 	adds	r2, r3, #1
-	beq	.L1181
-	ldr	r0, [r4, #3832]
+	beq	.L1218
+	ldr	r0, [r4, #3836]
 	movs	r2, #0
 	movs	r1, #1
 	add	r0, r0, r7
 	str	r3, [r0, #4]
 	ldr	r8, [r0, #12]
 	bl	FlashReadPages
-	ldr	r2, [r4, #3832]
+	ldr	r2, [r4, #3836]
 	ldr	r1, [r2, r7]
 	adds	r3, r2, r7
 	adds	r1, r1, #1
-	bne	.L1182
-.L1183:
+	bne	.L1219
+.L1220:
 	mov	r3, #-1
 	ldrh	r0, [fp]
 	str	r3, [sp, #36]
 	bl	decrement_vpc_count
-.L1191:
+.L1228:
 	ldr	r0, [sp, #36]
 	adds	r1, r0, #1
-	beq	.L1172
-.L1204:
+	beq	.L1209
+.L1241:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #40]
 	mov	r6, r0
 	cmp	r3, r0
-	bhi	.L1196
-	movw	r2, #2006
-	ldr	r1, .L1265
-	ldr	r0, .L1265+4
+	bhi	.L1233
+	movw	r2, #2055
+	ldr	r1, .L1302
+	ldr	r0, .L1302+4
 	bl	sftl_printk
-.L1196:
+.L1233:
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1197
+	beq	.L1234
 	mov	r0, r6
-	b	.L1259
-.L1181:
+	b	.L1296
+.L1218:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1184
+	bne	.L1221
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-	b	.L1184
-.L1182:
+	b	.L1221
+.L1219:
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1183
+	bne	.L1220
 	ldr	r9, [r8, #4]
-	ldr	r0, [r4, #4004]
+	ldr	r0, [r4, #4012]
 	mov	r1, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1183
+	beq	.L1220
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1186
-.L1189:
+	bne	.L1223
+.L1226:
 	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-	b	.L1183
-.L1186:
+	b	.L1220
+.L1223:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1183
+	beq	.L1220
 	adds	r0, r1, #1
-	beq	.L1187
+	beq	.L1224
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r8, [r3, #12]
 	bl	FlashReadPages
-.L1188:
-	ldr	r3, [r4, #3832]
+.L1225:
+	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1189
+	beq	.L1226
 	ldr	r3, [r8, #4]
-	ldr	r0, [r4, #4004]
+	ldr	r0, [r4, #4012]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1189
+	beq	.L1226
 	mov	r1, r3
 	mov	r0, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1183
-	b	.L1189
-.L1187:
+	beq	.L1220
+	b	.L1226
+.L1224:
 	str	r1, [r2, r7]
-	b	.L1188
-.L1180:
+	b	.L1225
+.L1217:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1191
+	beq	.L1228
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r6
 	bl	log2phys
 	ldr	r8, [sp, #40]
 	cmp	r8, #-1
-	beq	.L1191
+	beq	.L1228
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1194
+	beq	.L1231
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
-	beq	.L1195
+	beq	.L1232
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
-	beq	.L1195
+	beq	.L1232
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
-	bne	.L1191
-.L1195:
-	ldr	r0, [r4, #3832]
+	bne	.L1228
+.L1232:
+	ldr	r0, [r4, #3836]
 	movs	r2, #0
 	movs	r1, #1
 	str	r8, [r0, #4]
 	ldr	r7, [r0, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3832]
+	ldr	r3, [r4, #3836]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1191
+	beq	.L1228
 	ldr	r1, [r7, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1191
+	bne	.L1228
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-	b	.L1191
-.L1197:
+	b	.L1228
+.L1234:
 	mov	r1, r6
-	ldr	r0, .L1265+8
+	ldr	r0, .L1302+8
 	bl	sftl_printk
-	b	.L1172
-.L1176:
-	ldr	r3, [r4, #4012]
+	b	.L1209
+.L1213:
+	ldr	r3, [r4, #4020]
 	cmp	r3, #31
 	itttt	ls
 	addls	r2, r4, r3, lsl #2
 	addls	r3, r3, #1
-	strls	r3, [r4, #4012]
-	strls	r6, [r2, #4016]
+	strls	r3, [r4, #4020]
+	strls	r6, [r2, #4024]
 	ldrh	r0, [fp]
 	bl	decrement_vpc_count
-	ldr	r3, [r4, #4004]
+	ldr	r3, [r4, #4012]
 	adds	r2, r3, #1
-	bne	.L1199
+	bne	.L1236
 	ldr	r3, [sp, #4]
-.L1258:
-	str	r3, [r4, #4004]
-	b	.L1172
-.L1199:
+.L1295:
+	str	r3, [r4, #4012]
+	b	.L1209
+.L1236:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bcs	.L1172
+	bcs	.L1209
 	mov	r3, r2
-	b	.L1258
-.L1175:
+	b	.L1295
+.L1212:
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
 	mov	r1, r5
 	strh	r5, [fp, #2]	@ movhi
 	ldr	r2, [sp, #12]
 	strb	r3, [fp, #6]
-	b	.L1262
-.L1194:
+	b	.L1299
+.L1231:
 	mov	r0, r8
-	b	.L1204
-.L1266:
+	b	.L1241
+.L1303:
 	.align	2
-.L1265:
+.L1302:
 	.word	.LANCHOR1+421
 	.word	.LC1
-	.word	.LC103
+	.word	.LC106
 	.fnend
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	1
@@ -8611,15 +8780,15 @@ FtlSuperblockPowerLostFix:
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1278
+	ldr	r4, .L1315
 	mov	r3, #-1
 	mov	r8, #0
 	movw	r1, #61589
 	str	r3, [sp, #20]
 	mov	r5, r0
-	ldr	r2, [r4, #3280]
+	ldr	r2, [r4, #3284]
 	movs	r7, #7
-	ldr	r6, [r4, #3284]
+	ldr	r6, [r4, #3288]
 	str	r2, [sp, #12]
 	mvn	r2, #2
 	str	r6, [sp, #16]
@@ -8629,19 +8798,19 @@ FtlSuperblockPowerLostFix:
 	ldrh	r2, [r0]
 	strh	r8, [r6]	@ movhi
 	strh	r2, [r6, #2]	@ movhi
-	ldr	r2, [r4, #3280]
+	ldr	r2, [r4, #3284]
 	str	r1, [r2]
 	add	r1, r1, #304087040
-	ldr	r2, [r4, #3280]
+	ldr	r2, [r4, #3284]
 	add	r1, r1, #1269760
 	addw	r1, r1, #1507
 	str	r1, [r2, #4]
-.L1268:
+.L1305:
 	subs	r7, r7, #1
-	beq	.L1270
+	beq	.L1307
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1269
-.L1270:
+	cbnz	r3, .L1306
+.L1307:
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
@@ -8656,12 +8825,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1269:
+.L1306:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1270
+	beq	.L1307
 	ldr	r3, [r4, #2544]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -8676,10 +8845,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-	b	.L1268
-.L1279:
+	b	.L1305
+.L1316:
 	.align	2
-.L1278:
+.L1315:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8697,81 +8866,81 @@ FtlLoadBbt:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r8, #61649
-	ldr	r4, .L1309
-	ldr	r3, [r4, #3280]
-	addw	r7, r4, #3260
-	ldr	r6, [r4, #3284]
-	str	r3, [r4, #3268]
-	str	r6, [r4, #3272]
+	ldr	r4, .L1346
+	ldr	r3, [r4, #3284]
+	add	r7, r4, #3264
+	ldr	r6, [r4, #3288]
+	str	r3, [r4, #3272]
+	str	r6, [r4, #3276]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1281:
+.L1318:
 	ldrh	r3, [r4, #98]
 	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1284
+	ble	.L1321
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
-	adds	r3, r3, #1
-	bne	.L1282
 	ldr	r3, [r4, #3264]
+	adds	r3, r3, #1
+	bne	.L1319
+	ldr	r3, [r4, #3268]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	adds	r3, r3, #1
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.L1282:
-	ldr	r3, [r4, #3260]
+.L1319:
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1283
+	beq	.L1320
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	bne	.L1283
+	bne	.L1320
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1284:
+.L1321:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1298
+	beq	.L1335
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1288
+	beq	.L1325
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1309+4
-	str	r3, [r4, #3264]
+	ldr	r0, .L1346+4
+	str	r3, [r4, #3268]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1288
+	beq	.L1325
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1288
+	bne	.L1325
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
-	bls	.L1288
+	bls	.L1325
 	ldrh	r2, [r4, #156]
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r4, #152]	@ movhi
 	strh	r3, [r4, #156]	@ movhi
-.L1288:
-	ldr	r7, .L1309+4
+.L1325:
+	ldr	r7, .L1346+4
 	movs	r1, #1
 	ldrh	r0, [r4, #152]
 	movw	r8, #61649
@@ -8779,80 +8948,80 @@ FtlLoadBbt:
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1290:
+.L1327:
 	cmp	r5, #0
-	bge	.L1293
+	bge	.L1330
 	movs	r2, #254
-	ldr	r1, .L1309+8
-	ldr	r0, .L1309+12
+	ldr	r1, .L1346+8
+	ldr	r0, .L1346+12
 	bl	sftl_printk
-.L1292:
+.L1329:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1295
+	beq	.L1332
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1295
+	beq	.L1332
 	ldrh	r3, [r4, #42]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1295
+	bcs	.L1332
 	cmp	r0, r3
-	bcs	.L1295
+	bcs	.L1332
 	bl	FtlSysBlkNumInit
-.L1295:
-	ldr	r6, .L1309+16
+.L1332:
+	ldr	r6, .L1346+16
 	movs	r5, #0
-.L1296:
+.L1333:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1297
+	bcc	.L1334
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1283:
+.L1320:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1281
-.L1293:
+	b	.L1318
+.L1330:
 	ldrh	r3, [r4, #152]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r7
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3264]
-	ldr	r3, [r4, #3280]
 	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1291
+	beq	.L1328
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	beq	.L1292
-.L1291:
+	beq	.L1329
+.L1328:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1290
-.L1297:
-	ldrh	r2, [r4, #3900]
-	ldr	r1, [r4, #3268]
+	b	.L1327
+.L1334:
+	ldrh	r2, [r4, #3904]
+	ldr	r1, [r4, #3272]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1296
-.L1298:
+	b	.L1333
+.L1335:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1310:
+.L1347:
 	.align	2
-.L1309:
+.L1346:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3260
+	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+443
 	.word	.LC1
 	.word	.LANCHOR0+176
@@ -8872,98 +9041,98 @@ FtlMakeBbt:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, #0
-	ldr	r9, .L1330+4
+	ldr	r9, .L1367+4
 	bl	FtlBbtMemInit
 	sub	r5, r9, #180
 	sub	r10, r9, #18
 	mov	r4, r5
 	bl	FtlLoadFactoryBbt
-.L1312:
+.L1349:
 	ldrh	r3, [r5, #54]
 	cmp	r8, r3
-	bcc	.L1318
+	bcc	.L1355
 	movs	r5, #0
-.L1319:
+.L1356:
 	ldrh	r3, [r4, #114]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1320
+	bhi	.L1357
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1321:
+.L1358:
 	ldrh	r3, [r4, #164]
 	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1325
+	ble	.L1362
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1322
+	beq	.L1359
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1323
+	beq	.L1360
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1322:
+.L1359:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1321
-.L1318:
+	b	.L1358
+.L1355:
 	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
-	ldr	r0, [r5, #3280]
-	ldr	fp, [r5, #3284]
+	ldr	r0, [r5, #3284]
+	ldr	fp, [r5, #3288]
 	cmp	r3, r2
-	str	r0, [r5, #3268]
-	str	fp, [r5, #3272]
-	beq	.L1313
+	str	r0, [r5, #3272]
+	str	fp, [r5, #3276]
+	beq	.L1350
 	ldrh	r7, [r5, #98]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1330
+	ldr	r0, .L1367
 	mla	r7, r8, r7, r3
 	lsls	r3, r7, #10
-	str	r3, [r5, #3264]
+	str	r3, [r5, #3268]
 	bl	FlashReadPages
 	ldrh	r2, [r5, #98]
-	ldr	r1, [r5, #3268]
+	ldr	r1, [r5, #3272]
 	ldr	r0, [r9]
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1314:
+.L1351:
 	uxth	r0, r7
 	add	r8, r8, #1
 	add	r9, r9, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1312
-.L1313:
+	b	.L1349
+.L1350:
 	mov	r1, r8
 	bl	FlashGetBadBlockList
 	ldr	r1, [r9]
-	ldr	r0, [r5, #3268]
+	ldr	r0, [r5, #3272]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1316:
+.L1353:
 	subs	r6, r6, #1
 	uxth	r6, r6
-.L1315:
+.L1352:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1316
+	beq	.L1353
 	movs	r1, #16
-	ldr	r0, [r4, #3284]
+	ldr	r0, [r4, #3288]
 	strh	r6, [r10]	@ movhi
 	bl	__memzero
 	mov	r1, #4096
-	ldr	r0, [r4, #3280]
+	ldr	r0, [r4, #3284]
 	bl	__memzero
 	movw	r3, #61664
 	strh	r3, [fp]	@ movhi
@@ -8971,46 +9140,46 @@ FtlMakeBbt:
 	str	r3, [fp, #4]
 	ldrh	r3, [r10]
 	ldrh	r7, [r4, #98]
-	ldrh	r2, [r4, #3900]
+	ldrh	r2, [r4, #3904]
 	strh	r3, [fp, #2]	@ movhi
 	ldrh	r3, [r10]
 	ldr	r1, [r9]
 	lsls	r2, r2, #2
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	mla	r7, r8, r7, r3
 	lsls	r3, r7, #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1330
+	ldr	r0, .L1367
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1330
+	ldr	r0, .L1367
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	bne	.L1314
+	bne	.L1351
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L1315
-.L1320:
+	b	.L1352
+.L1357:
 	bl	FtlBbmMapBadBlock
-	b	.L1319
-.L1323:
+	b	.L1356
+.L1360:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
-	bne	.L1324
+	bne	.L1361
 	strh	r5, [r4, #152]	@ movhi
-	b	.L1322
-.L1324:
+	b	.L1359
+.L1361:
 	strh	r5, [r4, #156]	@ movhi
-.L1325:
+.L1362:
 	ldrh	r3, [r4, #152]
 	movs	r5, #0
-	ldr	r0, [r4, #3800]
+	ldr	r0, [r4, #3804]
 	movs	r1, #1
 	str	r5, [r4, #160]
 	movs	r2, #2
@@ -9037,10 +9206,10 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1331:
+.L1368:
 	.align	2
-.L1330:
-	.word	.LANCHOR0+3260
+.L1367:
+	.word	.LANCHOR0+3264
 	.word	.LANCHOR0+180
 	.fnend
 	.size	FtlMakeBbt, .-FtlMakeBbt
@@ -9058,7 +9227,7 @@ FtlVendorPartWrite:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r4, .L1344
+	ldr	r4, .L1381
 	adds	r2, r0, r1
 	.pad #108
 	sub	sp, sp, #108
@@ -9066,20 +9235,20 @@ FtlVendorPartWrite:
 	mov	r6, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1340
+	bhi	.L1377
 	ldrh	r7, [r4, #108]
 	mov	r9, #0
 	lsr	r7, r0, r7
 	lsl	fp, r7, #2
-.L1334:
-	cbnz	r6, .L1339
-.L1332:
+.L1371:
+	cbnz	r6, .L1376
+.L1369:
 	mov	r0, r9
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1339:
-	ldr	r3, [r4, #3884]
+.L1376:
+	ldr	r3, [r4, #3888]
 	mov	r0, r8
 	ldr	r2, [r3, fp]
 	ldrh	r3, [r4, #58]
@@ -9095,10 +9264,10 @@ FtlVendorPartWrite:
 	cmp	r6, r5
 	it	cc
 	uxthcc	r5, r6
-	cbz	r2, .L1336
+	cbz	r2, .L1373
 	cmp	r5, r3
-	beq	.L1336
-	ldr	r3, [r4, #3848]
+	beq	.L1373
+	ldr	r3, [r4, #3852]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
 	movs	r2, #1
@@ -9107,9 +9276,9 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1337:
+.L1374:
 	lsls	r3, r5, #9
-	ldr	r0, [r4, #3848]
+	ldr	r0, [r4, #3852]
 	mov	r1, r10
 	mov	r2, r3
 	str	r3, [sp, #8]
@@ -9120,8 +9289,8 @@ FtlVendorPartWrite:
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
 	mov	r1, r7
-	ldr	r2, [r4, #3848]
-	ldr	r0, .L1344+4
+	ldr	r2, [r4, #3852]
+	ldr	r0, .L1381+4
 	adds	r7, r7, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp, #8]
@@ -9129,21 +9298,21 @@ FtlVendorPartWrite:
 	it	eq
 	moveq	r9, #-1
 	add	r10, r10, r3
-	b	.L1334
-.L1336:
+	b	.L1371
+.L1373:
 	ldrh	r2, [r4, #110]
 	movs	r1, #0
-	ldr	r0, [r4, #3848]
+	ldr	r0, [r4, #3852]
 	bl	ftl_memset
-	b	.L1337
-.L1340:
+	b	.L1374
+.L1377:
 	mov	r9, #-1
-	b	.L1332
-.L1345:
+	b	.L1369
+.L1382:
 	.align	2
-.L1344:
+.L1381:
 	.word	.LANCHOR0
-	.word	.LANCHOR0+3948
+	.word	.LANCHOR0+3956
 	.fnend
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	1
@@ -9158,12 +9327,12 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1348
-	ldr	r3, .L1348+4
+	ldr	r2, .L1385
+	ldr	r3, .L1385+4
 	ldr	r1, [r2, #2636]
 	cmp	r1, r3
-	bne	.L1346
-	ldr	r3, .L1348+8
+	bne	.L1383
+	ldr	r3, .L1385+8
 	addw	r2, r2, #2636
 	movs	r1, #1
 	movs	r0, #0
@@ -9193,14 +9362,14 @@ Ftl_save_ext_data:
 	ldr	r3, [r2, #-68]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1346:
+.L1383:
 	bx	lr
-.L1349:
+.L1386:
 	.align	2
-.L1348:
+.L1385:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177348
+	.word	1342177349
 	.fnend
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	1
@@ -9214,33 +9383,33 @@ FtlEctTblFlush:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1355
+	ldr	r2, .L1392
 	push	{r3, lr}
 	.save {r3, lr}
-	ldrh	r3, [r2, #-200]
+	ldrh	r3, [r2, #-192]
 	cmp	r3, #31
 	itett	ls
 	addls	r3, r3, #1
 	movhi	r2, #32
-	strhls	r3, [r2, #-200]	@ movhi
+	strhls	r3, [r2, #-192]	@ movhi
 	movls	r2, #1
-	ldr	r3, .L1355+4
-	cbnz	r0, .L1352
-	ldr	r1, [r3, #3860]
+	ldr	r3, .L1392+4
+	cbnz	r0, .L1389
+	ldr	r1, [r3, #3864]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
 	cmp	r1, r2
-	bcc	.L1353
-.L1352:
-	ldr	r2, [r3, #3860]
+	bcc	.L1390
+.L1389:
+	ldr	r2, [r3, #3864]
 	movs	r0, #64
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	ldr	r1, .L1355+8
+	ldr	r1, .L1392+8
 	str	r1, [r2]
-	ldrh	r1, [r3, #3852]
-	ldr	r2, [r3, #3860]
+	ldrh	r1, [r3, #3856]
+	ldr	r2, [r3, #3864]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
 	ldr	r3, [r2, #8]
@@ -9250,12 +9419,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1353:
+.L1390:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1356:
+.L1393:
 	.align	2
-.L1355:
+.L1392:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
@@ -9286,86 +9455,105 @@ sftl_vendor_write:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 96
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r5, .L1367
+	ldr	r4, .L1405
 	adds	r2, r0, r1
-	.pad #100
-	sub	sp, sp, #100
+	.pad #108
+	sub	sp, sp, #108
 	mov	r8, r0
 	mov	r7, r1
-	ldrh	r3, [r5, #96]
+	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1366
-	ldrh	r6, [r5, #108]
+	bhi	.L1404
+	ldrh	r6, [r4, #108]
 	mov	r9, #0
 	lsr	r6, r0, r6
-	lsls	r6, r6, #2
-.L1360:
-	cbnz	r7, .L1365
-.L1358:
+	lsl	fp, r6, #2
+.L1397:
+	cbnz	r7, .L1403
+.L1395:
 	mov	r0, r9
-	add	sp, sp, #100
+	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1365:
-	ldr	r3, [r5, #3884]
+.L1403:
+	ldr	r3, [r4, #3888]
 	mov	r0, r8
-	ldrh	r4, [r5, #58]
-	ldr	r3, [r3, r6]
-	mov	r1, r4
-	str	r3, [sp, #4]
+	ldrh	r5, [r4, #58]
+	ldr	r3, [r3, fp]
+	mov	r1, r5
+	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-	subs	r4, r4, r1
-	ldr	r3, [sp, #4]
-	uxth	r4, r4
-	str	r1, [sp]
-	cmp	r7, r4
+	subs	r5, r5, r1
+	ldr	r3, [sp, #8]
+	uxth	r5, r5
+	str	r1, [sp, #4]
+	cmp	r7, r5
 	it	cc
-	uxthcc	r4, r7
-	lsl	fp, r4, #9
-	cbz	r3, .L1362
-	str	r3, [sp, #16]
+	uxthcc	r5, r7
+	lsls	r2, r5, #9
+	str	r2, [sp, #8]
+	cbz	r3, .L1399
+	ldr	r2, [r4, #3852]
+	add	r0, sp, #20
+	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	add	r2, sp, #40
+	str	r2, [sp, #32]
 	movs	r2, #1
-	ldr	r3, [r5, #3848]
 	mov	r1, r2
-	add	r0, sp, #12
-	str	r3, [sp, #20]
-	add	r3, sp, #32
-	str	r3, [sp, #24]
 	bl	FlashReadPages
+	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
-	mov	r2, fp
-	ldr	r1, [r5, #3848]
-	mov	r0, r10
-	adds	r3, r3, #1
-	ldr	r3, [sp]
+	adds	r2, r2, #1
+	ldr	r2, [r4, #3264]
 	it	eq
 	moveq	r9, #-1
+	cmp	r2, #256
+	bne	.L1401
+	mov	r2, r3
+	mov	r1, r6
+	ldr	r0, .L1405+4
+	bl	sftl_printk
+	ldr	r2, [r4, #3852]
+	mov	r1, r6
+	ldr	r0, .L1405+8
+	bl	FtlMapWritePage
+.L1401:
+	ldr	r1, [r4, #3852]
+	lsls	r2, r5, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1364:
-	subs	r7, r7, r4
-	add	r8, r8, r4
-	add	r10, r10, fp
-	adds	r6, r6, #4
-	b	.L1360
-.L1362:
-	mov	r2, fp
+.L1402:
+	ldr	r3, [sp, #8]
+	adds	r6, r6, #1
+	subs	r7, r7, r5
+	add	r8, r8, r5
+	add	fp, fp, #4
+	add	r10, r10, r3
+	b	.L1397
+.L1399:
+	lsls	r2, r5, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1364
-.L1366:
+	b	.L1402
+.L1404:
 	mov	r9, #-1
-	b	.L1358
-.L1368:
+	b	.L1395
+.L1406:
 	.align	2
-.L1367:
+.L1405:
 	.word	.LANCHOR0
+	.word	.LC107
+	.word	.LANCHOR0+3956
 	.fnend
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	1
@@ -9382,32 +9570,32 @@ FtlLoadEctTbl:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r0, #64
-	ldr	r4, .L1371
-	ldr	r2, [r4, #3860]
-	ldrh	r1, [r4, #3852]
+	ldr	r4, .L1409
+	ldr	r2, [r4, #3864]
+	ldrh	r1, [r4, #3856]
 	bl	FtlVendorPartRead
-	ldr	r3, [r4, #3860]
+	ldr	r3, [r4, #3864]
 	ldr	r2, [r3]
-	ldr	r3, .L1371+4
+	ldr	r3, .L1409+4
 	cmp	r2, r3
-	beq	.L1370
-	ldr	r1, .L1371+8
-	ldr	r0, .L1371+12
+	beq	.L1408
+	ldr	r1, .L1409+8
+	ldr	r0, .L1409+12
 	bl	sftl_printk
-	ldrh	r2, [r4, #3852]
+	ldrh	r2, [r4, #3856]
 	movs	r1, #0
-	ldr	r0, [r4, #3860]
+	ldr	r0, [r4, #3864]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1370:
+.L1408:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1372:
+.L1410:
 	.align	2
-.L1371:
+.L1409:
 	.word	.LANCHOR0
 	.word	1112818501
-	.word	.LC104
+	.word	.LC108
 	.word	.LC71
 	.fnend
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
@@ -9425,22 +9613,22 @@ Ftl_load_ext_data:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1376
+	ldr	r4, .L1414
 	movs	r0, #0
-	ldr	r5, .L1376+4
+	ldr	r5, .L1414+4
 	addw	r2, r4, #2636
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1374
+	beq	.L1412
 	mov	r1, #512
 	addw	r0, r4, #2636
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1374:
+.L1412:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1375
+	bne	.L1413
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9465,7 +9653,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1375:
+.L1413:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9474,9 +9662,9 @@ Ftl_load_ext_data:
 	bl	__aeabi_uidiv
 	str	r0, [r4, #2556]
 	pop	{r3, r4, r5, pc}
-.L1377:
+.L1415:
 	.align	2
-.L1376:
+.L1414:
 	.word	.LANCHOR0
 	.word	1179929683
 	.fnend
@@ -9511,17 +9699,17 @@ FtlVpcTblFlush:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
-	ldr	r4, .L1391
+	ldr	r4, .L1432
 	movs	r1, #255
 	movw	r7, #65535
-	ldr	r9, .L1391+16
-	ldr	r3, [r4, #3280]
-	addw	r8, r4, #3260
-	ldr	r6, [r4, #3284]
-	ldr	r10, .L1391+20
-	str	r3, [r4, #3268]
+	ldr	r9, .L1432+16
+	ldr	r3, [r4, #3284]
+	add	r8, r4, #3264
+	ldr	r6, [r4, #3288]
+	ldr	r10, .L1432+20
+	str	r3, [r4, #3272]
 	ldrh	r3, [r4, #2576]
-	str	r6, [r4, #3272]
+	str	r6, [r4, #3276]
 	str	r5, [r6, #12]
 	strh	r3, [r6, #2]	@ movhi
 	movw	r3, #61604
@@ -9530,9 +9718,9 @@ FtlVpcTblFlush:
 	str	r5, [r6, #8]
 	ldrh	r2, [r4, #2350]
 	str	r3, [r6, #4]
-	ldr	r3, .L1391+4
+	ldr	r3, .L1432+4
 	str	r3, [r4, #2268]
-	ldr	r3, .L1391+8
+	ldr	r3, .L1432+8
 	str	r3, [r4, #2272]
 	ldrh	r3, [r4, #2582]
 	strh	r3, [r4, #2276]	@ movhi
@@ -9555,7 +9743,7 @@ FtlVpcTblFlush:
 	strb	r3, [r4, #2280]
 	ldrh	r3, [r4, #2444]
 	ldrh	r2, [r4, #2446]
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	strh	r3, [r4, #2290]	@ movhi
 	ldrb	r3, [r4, #2450]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #6
@@ -9569,19 +9757,23 @@ FtlVpcTblFlush:
 	str	r3, [r4, #2308]
 	ldr	r3, [r4, #2544]
 	str	r3, [r4, #2304]
+	ldrh	r3, [r4, #3202]
+	strh	r3, [r4, #2312]	@ movhi
+	ldrh	r3, [r4, #3204]
+	strh	r3, [r4, #2314]	@ movhi
 	bl	ftl_memset
 	movs	r2, #48
 	addw	r1, r4, #2268
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
-	ldr	r0, [r4, #3268]
+	ldr	r0, [r4, #3272]
 	ldr	r1, [r4, #2324]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
 	ldrh	r0, [r4, #40]
-	ldr	r3, [r4, #3268]
+	ldr	r3, [r4, #3272]
 	ldr	r1, [r4, #24]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -9592,16 +9784,16 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.L1380:
-	ldr	r3, [r4, #3280]
+.L1418:
+	ldr	r3, [r4, #3284]
 	mov	r0, r8
 	ldrh	r2, [r4, #2576]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	str	r3, [r4, #3276]
 	ldrh	r3, [r4, #2578]
 	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #3264]
+	str	r3, [r4, #3268]
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
@@ -9610,7 +9802,7 @@ FtlVpcTblFlush:
 	ldrh	r2, [r4, #2578]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1381
+	blt	.L1419
 	ldrh	r3, [r4, #2576]
 	ldrh	r7, [r4, #2580]
 	strh	r3, [r4, #2580]	@ movhi
@@ -9623,7 +9815,7 @@ FtlVpcTblFlush:
 	str	r3, [r4, #2584]
 	str	r2, [r4, #2540]
 	lsls	r2, r0, #10
-	str	r2, [r4, #3264]
+	str	r2, [r4, #3268]
 	str	r3, [r6, #4]
 	movs	r3, #1
 	strh	r0, [r6, #2]	@ movhi
@@ -9631,21 +9823,21 @@ FtlVpcTblFlush:
 	mov	r1, r3
 	mov	r0, r8
 	bl	FlashProgPages
-.L1381:
+.L1419:
 	ldrh	r3, [r4, #2578]
-	ldr	r2, [r4, #3260]
+	ldr	r2, [r4, #3264]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	adds	r2, r2, #1
+	adds	r1, r2, #1
 	strh	r3, [r4, #2578]	@ movhi
-	bne	.L1382
+	bne	.L1420
 	cmp	r3, #1
-	bne	.L1383
-	movw	r2, #1124
+	bne	.L1421
+	movw	r2, #1169
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L1383:
+.L1421:
 	ldrh	r3, [r4, #2578]
 	adds	r5, r5, #1
 	uxth	r5, r5
@@ -9655,115 +9847,264 @@ FtlVpcTblFlush:
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2578]	@ movhi
 	cmp	r5, #3
-	bls	.L1380
+	bls	.L1418
 	mov	r2, r5
-	ldr	r1, [r4, #3264]
-	ldr	r0, .L1391+12
+	ldr	r1, [r4, #3268]
+	ldr	r0, .L1432+12
 	bl	sftl_printk
-.L1386:
-	b	.L1386
-.L1382:
+.L1424:
+	b	.L1424
+.L1420:
 	cmp	r3, #1
-	beq	.L1380
+	beq	.L1418
+	cmp	r2, #256
+	beq	.L1418
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1387
+	beq	.L1425
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.L1387:
+.L1425:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1392:
+.L1433:
 	.align	2
-.L1391:
+.L1432:
 	.word	.LANCHOR0
 	.word	1179929683
-	.word	1342177348
-	.word	.LC105
+	.word	1342177349
+	.word	.LC109
 	.word	.LANCHOR1+454
 	.word	.LC1
 	.fnend
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	1
-	.global	FtlVpcCheckAndModify
+	.global	FtlSysFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
+	.type	FtlSysFlush, %function
+FtlSysFlush:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
-	.save {r4, r5, r6, r7, r8, r9, lr}
-	.pad #12
-	movs	r5, #0
-	ldr	r4, .L1405
-	ldr	r1, .L1405+4
-	ldr	r0, .L1405+8
-	bl	sftl_printk
-	ldrh	r2, [r4, #42]
-	movs	r1, #0
-	ldr	r0, [r4, #3864]
-	lsls	r2, r2, #1
-	bl	ftl_memset
-.L1394:
-	ldr	r3, [r4, #2504]
-	cmp	r5, r3
-	bcc	.L1396
-	ldr	r9, .L1405+12
-	movs	r7, #0
-	movw	r8, #65535
-.L1397:
-	ldrh	r3, [r4, #40]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1401
-	add	sp, sp, #12
-	@ sp needed
+	push	{r3, lr}
+	.save {r3, lr}
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r3, pc}
+	.fnend
+	.size	FtlSysFlush, .-FtlSysFlush
+	.align	1
+	.global	sftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_deinit, %function
+sftl_deinit:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.save {r3, lr}
+	ldr	r3, .L1437
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1436
+	bl	FtlSysFlush
+.L1436:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1438:
+	.align	2
+.L1437:
+	.word	.LANCHOR2
+	.fnend
+	.size	sftl_deinit, .-sftl_deinit
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.save {r4, r5, r6, r7, r8, lr}
+	.pad #8
+	adds	r2, r0, r1
+	ldr	r6, .L1454
+	mov	r8, r0
+	mov	r5, r1
+	ldr	r3, [r6, #140]
+	cmp	r2, r3
+	bhi	.L1447
+	cmp	r1, #31
+	bhi	.L1441
+.L1446:
+	movs	r0, #0
+.L1439:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1441:
+	ldrh	r4, [r6, #58]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	sub	r8, r8, r3
+	uxth	r3, r8
+	cbz	r3, .L1442
+	subs	r4, r4, r3
+	adds	r7, r7, #1
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	subs	r5, r5, r4
+.L1442:
+	ldr	r4, .L1454+4
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L1443:
+	ldrh	r3, [r6, #58]
+	cmp	r5, r3
+	bcs	.L1445
+	ldr	r3, .L1454+4
+	ldr	r2, [r3, #-188]
+	cmp	r2, #32
+	bls	.L1446
+	movs	r4, #0
+	str	r4, [r3, #-188]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1446
+.L1445:
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+	beq	.L1444
+	ldr	r3, [r4, #-188]
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
+	adds	r3, r3, #1
+	str	r3, [r4, #-188]
+	ldr	r3, [r6, #2512]
+	adds	r3, r3, #1
+	str	r3, [r6, #2512]
+	bl	log2phys
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1444:
+	ldrh	r3, [r6, #58]
+	adds	r7, r7, #1
+	subs	r5, r5, r3
+	b	.L1443
+.L1447:
+	mov	r0, #-1
+	b	.L1439
+.L1455:
+	.align	2
+.L1454:
+	.word	.LANCHOR0
+	.word	.LANCHOR3
+	.fnend
+	.size	FtlDiscard, .-FtlDiscard
+	.align	1
+	.global	FtlVpcCheckAndModify
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
+	.save {r4, r5, r6, r7, r8, r9, lr}
+	.pad #12
+	movs	r5, #0
+	ldr	r4, .L1468
+	ldr	r1, .L1468+4
+	ldr	r0, .L1468+8
+	bl	sftl_printk
+	ldrh	r2, [r4, #42]
+	movs	r1, #0
+	ldr	r0, [r4, #3868]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L1457:
+	ldr	r3, [r4, #2504]
+	cmp	r5, r3
+	bcc	.L1459
+	ldr	r9, .L1468+12
+	movs	r7, #0
+	movw	r8, #65535
+.L1460:
+	ldrh	r3, [r4, #40]
+	uxth	r5, r7
+	cmp	r3, r5
+	bhi	.L1464
+	add	sp, sp, #12
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L1396:
+.L1459:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1395
+	beq	.L1458
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, [r4, #3864]
+	ldr	r2, [r4, #3868]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1395:
+.L1458:
 	adds	r5, r5, #1
-	b	.L1394
-.L1401:
+	b	.L1457
+.L1464:
 	ldr	r3, [r4, #2324]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4, #3864]
+	ldr	r3, [r4, #3868]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1399
+	beq	.L1462
 	cmp	r2, r8
-	beq	.L1399
+	beq	.L1462
 	mov	r1, r6
 	mov	r0, r9
 	bl	sftl_printk
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r5
-	beq	.L1399
+	beq	.L1462
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r5
-	beq	.L1399
+	beq	.L1462
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r5
-	beq	.L1399
-	ldr	r3, [r4, #3864]
+	beq	.L1462
+	ldr	r3, [r4, #3868]
 	mov	r0, r5
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4, #2324]
@@ -9771,16 +10112,16 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1399:
+.L1462:
 	adds	r7, r7, #1
-	b	.L1397
-.L1406:
+	b	.L1460
+.L1469:
 	.align	2
-.L1405:
+.L1468:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
-	.word	.LC95
-	.word	.LC106
+	.word	.LC97
+	.word	.LC110
 	.fnend
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	1
@@ -9797,42 +10138,42 @@ allocate_new_data_superblock:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
-	ldr	r4, .L1417
+	ldr	r4, .L1480
 	ldrh	r5, [r0]
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bcs	.L1408
-	movw	r2, #2681
-	ldr	r1, .L1417+4
-	ldr	r0, .L1417+8
+	bcs	.L1471
+	movw	r2, #2750
+	ldr	r1, .L1480+4
+	ldr	r0, .L1480+8
 	bl	sftl_printk
-.L1408:
+.L1471:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1409
+	beq	.L1472
 	ldr	r3, [r4, #2324]
 	mov	r0, r5
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1410
+	cbz	r3, .L1473
 	bl	INSERT_DATA_LIST
-.L1409:
-	ldrh	r0, [r4, #3992]
+.L1472:
+	ldrh	r0, [r4, #4000]
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1411
+	beq	.L1474
 	cmp	r5, r0
-	bne	.L1412
+	bne	.L1475
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1413
-.L1412:
+	cbz	r3, .L1476
+.L1475:
 	bl	update_vpc_list
-.L1413:
+.L1476:
 	movw	r3, #65535
-	strh	r3, [r4, #3992]	@ movhi
-.L1411:
+	strh	r3, [r4, #4000]	@ movhi
+.L1474:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9841,12 +10182,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1410:
+.L1473:
 	bl	INSERT_FREE_LIST
-	b	.L1409
-.L1418:
+	b	.L1472
+.L1481:
 	.align	2
-.L1417:
+.L1480:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -9866,29 +10207,29 @@ FtlProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r7, #0
-	ldr	r6, .L1433
+	ldr	r6, .L1496
 	.pad #20
 	sub	sp, sp, #20
 	mov	r4, r3
 	movs	r2, #0
-	ldr	r10, .L1433+8
+	ldr	r10, .L1496+8
 	mov	r5, r0
-	ldr	fp, .L1433+12
+	ldr	fp, .L1496+12
 	mov	r9, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1420:
+.L1483:
 	cmp	r7, r9
-	beq	.L1427
+	beq	.L1490
 	mov	r8, #0
-	b	.L1428
-.L1423:
+	b	.L1491
+.L1486:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1421
+	bne	.L1484
 	ldr	r1, [r6, #2324]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -9898,12 +10239,12 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1421:
+.L1484:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1422
+	cbnz	r3, .L1485
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1422:
+.L1485:
 	ldr	r3, [r6, #2732]
 	adds	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -9919,19 +10260,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1428:
+.L1491:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1423
+	beq	.L1486
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1424
-	movw	r2, #933
+	bcc	.L1487
+	mov	r2, #936
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L1424:
+.L1487:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9946,283 +10287,100 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r8, r0
 	adds	r3, r3, #1
-	beq	.L1425
+	beq	.L1488
 	ldr	r3, [r6, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1426
+	cbnz	r2, .L1489
 	mov	r1, r0
-	ldr	r0, .L1433+4
+	ldr	r0, .L1496+4
 	bl	sftl_printk
-.L1426:
+.L1489:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1425:
+.L1488:
 	adds	r7, r7, #1
 	adds	r5, r5, #20
-	b	.L1420
-.L1427:
+	b	.L1483
+.L1490:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1419
-	mov	r2, #948
-	ldr	r1, .L1433+8
-	ldr	r0, .L1433+12
+	bcc	.L1482
+	movw	r2, #951
+	ldr	r1, .L1496+8
+	ldr	r0, .L1496+12
 	bl	sftl_printk
-.L1419:
+.L1482:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1434:
+.L1497:
 	.align	2
-.L1433:
+.L1496:
 	.word	.LANCHOR0
-	.word	.LC107
+	.word	.LC111
 	.word	.LANCHOR1+519
 	.word	.LC1
 	.fnend
 	.size	FtlProgPages, .-FtlProgPages
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlGcFreeTempBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
 	.fnstart
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.save {r4, lr}
-	ldr	r4, .L1440
-	ldr	r0, [r4, #3988]
-	cbz	r0, .L1436
-	ldr	r3, .L1440+4
-	movs	r2, #0
-	movs	r1, #1
-	ldr	r3, [r3, #-196]
-	bl	FtlProgPages
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.pad #12
+	movw	r2, #65535
+	ldr	r4, .L1524
+	ldrh	r5, [r4, #2444]
+	ldrh	r1, [r4, #102]
+	cmp	r5, r2
+	bne	.L1499
+.L1509:
+	ldrh	r2, [r4, #2444]
 	movs	r3, #0
-	str	r3, [r4, #3988]
-.L1436:
+	str	r3, [r4, #4008]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1522
+.L1500:
 	movs	r0, #0
-	pop	{r4, pc}
-.L1441:
-	.align	2
-.L1440:
-	.word	.LANCHOR0
-	.word	.LANCHOR3
-	.fnend
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.save {r3, lr}
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	movs	r0, #0
-	pop	{r3, pc}
-	.fnend
-	.size	FtlSysFlush, .-FtlSysFlush
-	.align	1
-	.global	sftl_deinit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_deinit, %function
-sftl_deinit:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.save {r3, lr}
-	ldr	r3, .L1445
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L1444
-	bl	FtlSysFlush
-.L1444:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1446:
-	.align	2
-.L1445:
-	.word	.LANCHOR2
-	.fnend
-	.size	sftl_deinit, .-sftl_deinit
-	.align	1
-	.global	FtlDiscard
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.save {r4, r5, r6, r7, r8, lr}
-	.pad #8
-	adds	r2, r0, r1
-	ldr	r6, .L1462
-	mov	r7, r0
-	mov	r5, r1
-	ldr	r3, [r6, #140]
-	cmp	r2, r3
-	bhi	.L1455
-	cmp	r1, #31
-	bhi	.L1449
-.L1454:
-	movs	r0, #0
-.L1447:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1449:
-	bl	FtlCacheWriteBack
-	ldrh	r4, [r6, #58]
-	mov	r0, r7
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	smulbb	r3, r0, r4
-	mov	r8, r0
-	subs	r7, r7, r3
-	uxth	r7, r7
-	cbz	r7, .L1450
-	subs	r4, r4, r7
-	add	r8, r0, #1
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	subs	r5, r5, r4
-.L1450:
-	ldr	r4, .L1462+4
-	mov	r3, #-1
-	str	r3, [sp, #4]
-.L1451:
-	ldrh	r3, [r6, #58]
-	cmp	r5, r3
-	bcs	.L1453
-	ldr	r3, .L1462+4
-	ldr	r2, [r3, #-192]
-	cmp	r2, #32
-	bls	.L1454
-	movs	r4, #0
-	str	r4, [r3, #-192]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1454
-.L1453:
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r8
-	bl	log2phys
-	ldr	r3, [sp]
-	adds	r3, r3, #1
-	beq	.L1452
-	ldr	r3, [r4, #-192]
-	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r8
-	adds	r3, r3, #1
-	str	r3, [r4, #-192]
-	ldr	r3, [r6, #2512]
-	adds	r3, r3, #1
-	str	r3, [r6, #2512]
-	bl	log2phys
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1452:
-	ldrh	r3, [r6, #58]
-	add	r8, r8, #1
-	subs	r5, r5, r3
-	b	.L1451
-.L1455:
-	mov	r0, #-1
-	b	.L1447
-.L1463:
-	.align	2
-.L1462:
-	.word	.LANCHOR0
-	.word	.LANCHOR3
-	.fnend
-	.size	FtlDiscard, .-FtlDiscard
-	.align	1
-	.global	FtlGcFreeTempBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #12
-	movw	r2, #65535
-	ldr	r4, .L1490
-	ldrh	r5, [r4, #2444]
-	ldrh	r1, [r4, #102]
-	cmp	r5, r2
-	bne	.L1465
-.L1475:
-	ldrh	r2, [r4, #2444]
-	movs	r3, #0
-	str	r3, [r4, #4000]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1488
-.L1466:
-	movs	r0, #0
-.L1464:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1465:
-	cbz	r0, .L1468
-	ldr	r3, .L1490+4
-	ldrh	r0, [r3, #4]
-	cmp	r0, r2
-	beq	.L1469
-.L1470:
-	movs	r1, #2
-.L1468:
-	ldr	r0, .L1490+8
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	beq	.L1471
-	ldr	r2, [r4, #2328]
-	ldrh	r3, [r2, r5, lsl #1]
-	cmp	r3, #4
-	bls	.L1472
-	subs	r3, r3, #5
+.L1498:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L1499:
+	cbz	r0, .L1502
+	ldr	r3, .L1524+4
+	ldrh	r0, [r3, #4]
+	cmp	r0, r2
+	beq	.L1503
+.L1504:
+	movs	r1, #2
+.L1502:
+	ldr	r0, .L1524+8
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	beq	.L1505
+	ldr	r2, [r4, #2328]
+	ldrh	r3, [r2, r5, lsl #1]
+	cmp	r3, #4
+	bls	.L1506
+	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1472:
-	ldr	r3, [r4, #4000]
-	cbnz	r3, .L1473
+.L1506:
+	ldr	r3, [r4, #4008]
+	cbnz	r3, .L1507
 	ldr	r3, [r4, #2732]
 	ldr	r0, [sp, #4]
 	adds	r3, r3, #1
@@ -10230,67 +10388,66 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1473:
+.L1507:
 	movs	r3, #0
-	str	r3, [r4, #4000]
-.L1484:
+	str	r3, [r4, #4008]
+.L1518:
 	movs	r0, #1
-	b	.L1464
-.L1469:
+	b	.L1498
+.L1503:
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #17
-	bhi	.L1470
-	b	.L1468
-.L1471:
-	ldr	r3, .L1490+4
+	bhi	.L1504
+	b	.L1502
+.L1505:
+	ldr	r3, .L1524+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1484
-	b	.L1475
-.L1488:
-	bl	FtlCacheWriteBack
+	bne	.L1518
+	b	.L1509
+.L1522:
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	ldrh	r2, [r4, #3200]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1476
+	beq	.L1510
 	movs	r2, #162
-	ldr	r1, .L1490+12
-	ldr	r0, .L1490+16
+	ldr	r1, .L1524+12
+	ldr	r0, .L1524+16
 	bl	sftl_printk
-.L1476:
+.L1510:
 	ldrb	r3, [r4, #2451]	@ zero_extendqisi2
 	movs	r6, #0
 	ldrh	r0, [r4, #102]
 	mov	r9, #12
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r4, #2444]
-	ldr	r10, .L1490+12
+	ldr	r10, .L1524+12
 	smulbb	r3, r3, r0
-	ldr	fp, .L1490+16
+	ldr	fp, .L1524+16
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldr	r2, [r4, #2528]
 	ldrh	r3, [r4, #3200]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1477:
+.L1511:
 	ldrh	r2, [r4, #3200]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1481
+	bhi	.L1515
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2444]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1482
+	beq	.L1516
 	bl	INSERT_DATA_LIST
-.L1483:
+.L1517:
 	movs	r5, #0
 	movw	r6, #65535
 	strh	r6, [r4, #2444]	@ movhi
@@ -10302,12 +10459,12 @@ FtlGcFreeTempBlock:
 	ldrh	r2, [r4, #2344]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1466
+	ble	.L1500
 	movs	r3, #20
 	strh	r6, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3148]	@ movhi
-	b	.L1466
-.L1481:
+	b	.L1500
+.L1515:
 	uxth	r7, r6
 	ldr	r8, [r4, #3196]
 	ldr	r3, [r4, #2504]
@@ -10315,12 +10472,12 @@ FtlGcFreeTempBlock:
 	add	r5, r8, r7
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1478
+	bcc	.L1512
 	movs	r2, #168
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L1478:
+.L1512:
 	movs	r2, #0
 	add	r1, sp, #4
 	ldr	r0, [r5, #8]
@@ -10328,7 +10485,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r8, r7]
 	ldr	r3, [sp, #4]
 	cmp	r0, r3
-	bne	.L1479
+	bne	.L1513
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -10337,23 +10494,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r5, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1489:
+.L1523:
 	bl	decrement_vpc_count
-.L1480:
+.L1514:
 	adds	r6, r6, #1
-	b	.L1477
-.L1479:
+	b	.L1511
+.L1513:
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1480
+	beq	.L1514
 	ldrh	r0, [r4, #2444]
-	b	.L1489
-.L1482:
+	b	.L1523
+.L1516:
 	bl	INSERT_FREE_LIST
-	b	.L1483
-.L1491:
+	b	.L1517
+.L1525:
 	.align	2
-.L1490:
+.L1524:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10374,25 +10531,25 @@ FtlGcPageRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L1494
+	ldr	r4, .L1528
 	ldrh	r1, [r4, #102]
 	addw	r0, r4, #2444
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r4, #2446]
 	ldrh	r3, [r4, #102]
 	cmp	r2, r3
-	bcc	.L1492
-	add	r0, r4, #3904
+	bcc	.L1526
+	addw	r0, r4, #3908
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
 	movs	r3, #0
-	str	r3, [r4, #4000]
-.L1492:
+	str	r3, [r4, #4008]
+.L1526:
 	pop	{r4, pc}
-.L1495:
+.L1529:
 	.align	2
-.L1494:
+.L1528:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -10410,9 +10567,9 @@ FtlPowerLostRecovery:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r5, #0
-	ldr	r4, .L1497
+	ldr	r4, .L1531
 	addw	r6, r4, #2348
-	str	r5, [r4, #4012]
+	str	r5, [r4, #4020]
 	mov	r0, r6
 	addw	r4, r4, #2396
 	bl	FtlRecoverySuperblock
@@ -10427,9 +10584,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1498:
+.L1532:
 	.align	2
-.L1497:
+.L1531:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
@@ -10447,35 +10604,35 @@ Ftl_gc_temp_data_write_back:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1506
+	ldr	r4, .L1540
 	movs	r5, #0
 	movs	r6, #20
 	mov	r2, r3
 	ldr	r1, [r4, #3164]
-	ldr	r0, [r4, #3836]
+	ldr	r0, [r4, #3840]
 	bl	FlashProgPages
-.L1500:
+.L1534:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1503
-	ldr	r0, [r4, #3836]
+	bhi	.L1537
+	ldr	r0, [r4, #3840]
 	bl	FtlGcBufFree
 	ldrh	r3, [r4, #2448]
 	movs	r0, #0
 	str	r0, [r4, #3164]
-	cbnz	r3, .L1499
+	cbnz	r3, .L1533
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1505
-.L1503:
+	b	.L1539
+.L1537:
 	muls	r3, r6, r3
-	ldr	r2, [r4, #3836]
+	ldr	r2, [r4, #3840]
 	adds	r5, r5, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r0, r2, #1
-	bne	.L1501
+	bne	.L1535
 	ldrh	r0, [r4, #2444]
 	movs	r5, #0
 	ldr	r1, [r4, #2324]
@@ -10484,27 +10641,27 @@ Ftl_gc_temp_data_write_back:
 	ldr	r2, [r4, #2732]
 	adds	r2, r2, #1
 	str	r2, [r4, #2732]
-	ldr	r2, [r4, #3836]
+	ldr	r2, [r4, #3840]
 	add	r3, r3, r2
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1505:
+.L1539:
 	movs	r0, #1
-.L1499:
+.L1533:
 	pop	{r4, r5, r6, pc}
-.L1501:
+.L1535:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1500
-.L1507:
+	b	.L1534
+.L1541:
 	.align	2
-.L1506:
+.L1540:
 	.word	.LANCHOR0
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10522,18 +10679,17 @@ Ftl_get_new_temp_ppa:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1511
+	ldr	r4, .L1545
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r3
-	beq	.L1509
+	beq	.L1543
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1510
-.L1509:
-	bl	FtlCacheWriteBack
+	cbnz	r3, .L1544
+.L1543:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1511+4
+	ldr	r0, .L1545+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	strh	r5, [r4, #3192]	@ movhi
@@ -10542,13 +10698,13 @@ Ftl_get_new_temp_ppa:
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1510:
-	ldr	r0, .L1511+4
+.L1544:
+	ldr	r0, .L1545+4
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1512:
+.L1546:
 	.align	2
-.L1511:
+.L1545:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.fnend
@@ -10564,30 +10720,30 @@ rk_ftl_garbage_collect:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1632
+	ldr	r3, .L1665
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r7, r0
 	.pad #36
 	sub	sp, sp, #36
 	mov	r4, r3
-	ldr	r0, [r3, #3820]
+	ldr	r0, [r3, #3824]
 	cmp	r0, #0
-	bne	.L1588
+	bne	.L1621
 	ldrh	r2, [r3, #2336]
 	cmp	r2, #47
-	bls	.L1513
-	ldr	r2, .L1632+4
+	bls	.L1547
+	ldr	r2, .L1665+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1515
-.L1518:
-	ldrh	r2, [r4, #3204]
-	movw	r1, #65535
-	cmp	r2, r1
-	bne	.L1516
-.L1517:
+	bne	.L1549
+.L1552:
+	ldrh	r0, [r4, #3204]
+	movw	r2, #65535
+	cmp	r0, r2
+	bne	.L1550
+.L1551:
 	ldr	r3, [r4, #3152]
 	movw	r5, #65535
 	ldrh	r1, [r4, #2588]
@@ -10595,123 +10751,131 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r7, lsl #7
 	cmp	r1, r5
 	str	r3, [r4, #3152]
-	bne	.L1519
+	bne	.L1553
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r1
-	bne	.L1520
+	bne	.L1554
 	ldrh	r8, [r4, #3202]
 	cmp	r8, r2
-	bne	.L1521
+	bne	.L1555
 	ldrh	r2, [r4, #2344]
 	cmp	r2, #24
 	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1521
-	ldr	r3, .L1632+8
+	bls	.L1555
+	ldr	r3, .L1665+8
 	movs	r6, #0
 	str	r6, [r4, #3152]
-	strh	r6, [r3, #-188]	@ movhi
+	strh	r6, [r3, #-184]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1592
+	bne	.L1625
 	ldrh	r2, [r4, #2344]
 	ldrh	r3, [r4, #3150]
 	cmp	r2, r3
-	bcs	.L1524
+	bcs	.L1558
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1526
+	beq	.L1560
 	mov	r0, r3
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1527
+	bhi	.L1561
 	mov	r0, r6
 	bl	List_get_gc_head_node
 	uxth	r6, r0
 	movs	r3, #128
 	strh	r3, [r4, #3150]	@ movhi
 	cmp	r6, r5
-	bne	.L1523
-.L1526:
+	bne	.L1557
+.L1560:
 	bl	FtlGcReFreshBadBlk
 	cmp	r7, #0
-	bne	.L1529
+	bne	.L1563
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1529
-.L1586:
+	bne	.L1563
+.L1619:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #24
-	bhi	.L1593
+	bhi	.L1626
 	cmp	r3, #16
 	ldrh	r6, [r4, #102]
-	bls	.L1531
+	bls	.L1565
 	lsrs	r6, r6, #5
-.L1530:
+.L1564:
 	ldrh	r2, [r4, #3148]
 	cmp	r2, r3
-	bcs	.L1534
+	bcs	.L1568
 	ldrh	r3, [r4, #2444]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1535
+	bne	.L1569
 	ldrh	r2, [r4, #3202]
 	cmp	r2, r3
-	bne	.L1535
-	ldr	r3, .L1632+8
-	ldrh	r0, [r3, #-188]
-	cbnz	r0, .L1536
+	bne	.L1569
+	ldr	r3, .L1665+8
+	ldrh	r0, [r3, #-184]
+	cbnz	r0, .L1570
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1537
-.L1536:
+	bcs	.L1571
+.L1570:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1626:
+.L1659:
 	strh	r3, [r4, #3148]	@ movhi
 	movs	r3, #0
 	str	r3, [r4, #3160]
-.L1513:
+.L1547:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1515:
+.L1549:
 	ldrh	r3, [r3, #2444]
 	cmp	r3, r2
-	beq	.L1518
+	beq	.L1552
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1518
+	beq	.L1552
 	movs	r0, #1
-	b	.L1513
-.L1516:
+	b	.L1547
+.L1550:
 	ldrh	r3, [r4, #3202]
-	cmp	r3, r1
-	itt	eq
-	strheq	r2, [r4, #3202]	@ movhi
-	strheq	r3, [r4, #3204]	@ movhi
-	b	.L1517
-.L1527:
+	cmp	r3, r2
+	bne	.L1551
+	ldrh	r1, [r4, #3206]
+	cmp	r1, r3
+	beq	.L1551
+	ldrh	r2, [r4, #3208]
+	cmp	r2, r3
+	itttt	ne
+	strhne	r0, [r4, #3202]	@ movhi
+	strhne	r1, [r4, #3204]	@ movhi
+	strhne	r2, [r4, #3206]	@ movhi
+	strhne	r3, [r4, #3208]	@ movhi
+	b	.L1551
+.L1561:
 	movs	r3, #64
-.L1625:
+.L1658:
 	strh	r3, [r4, #3150]	@ movhi
-	b	.L1526
-.L1524:
+	b	.L1560
+.L1558:
 	movs	r3, #80
-	b	.L1625
-.L1592:
+	b	.L1658
+.L1625:
 	mov	r6, r0
-.L1523:
+.L1557:
 	ldr	r3, [r4, #2324]
 	mov	r5, r6
 	ldrh	r1, [r4, #3148]
@@ -10719,135 +10883,135 @@ rk_ftl_garbage_collect:
 	ldrh	r3, [r3, r6, lsl #1]
 	str	r1, [sp, #4]
 	ldr	r1, [r4, #2328]
-	ldr	r0, .L1632+12
+	ldr	r0, .L1665+12
 	ldrh	r1, [r1, r6, lsl #1]
 	str	r1, [sp]
 	mov	r1, r6
 	bl	sftl_printk
-	b	.L1526
-.L1531:
+	b	.L1560
+.L1565:
 	cmp	r3, #12
-	bls	.L1532
+	bls	.L1566
 	lsrs	r6, r6, #4
-	b	.L1530
-.L1532:
+	b	.L1564
+.L1566:
 	cmp	r3, #8
-	bls	.L1530
+	bls	.L1564
 	lsrs	r6, r6, #2
-	b	.L1530
-.L1593:
+	b	.L1564
+.L1626:
 	movs	r6, #1
-	b	.L1530
-.L1537:
+	b	.L1564
+.L1571:
 	movs	r3, #18
-	b	.L1626
-.L1535:
+	b	.L1659
+.L1569:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r4, #3148]	@ movhi
-.L1534:
-	ldrh	r3, [r4, #3206]
-	cbz	r3, .L1594
+.L1568:
+	ldrh	r3, [r4, #3210]
+	cbz	r3, .L1627
 	adds	r6, r6, #32
 	uxth	r6, r6
-.L1594:
+.L1627:
 	movw	r5, #65535
-.L1540:
+.L1574:
 	ldrh	r3, [r4, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1549
+	bne	.L1583
 	cmp	r5, r3
-	beq	.L1550
+	beq	.L1584
 	strh	r5, [r4, #2588]	@ movhi
-.L1551:
+.L1585:
 	ldrh	r0, [r4, #2588]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	cmp	r0, r7
-	beq	.L1549
+	beq	.L1583
 	bl	IsBlkInGcList
-	cbz	r0, .L1554
+	cbz	r0, .L1588
 	strh	r7, [r4, #2588]	@ movhi
-.L1554:
+.L1588:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1549
-	ldr	r0, .L1632+16
+	beq	.L1583
+	ldr	r0, .L1665+16
 	bl	make_superblock
-	ldr	r2, .L1632+8
+	ldr	r2, .L1665+8
 	movs	r3, #0
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
-	strh	r3, [r2, #-186]	@ movhi
+	strh	r3, [r2, #-182]	@ movhi
 	ldrh	r1, [r4, #2588]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
-	strh	r3, [r2, #-184]	@ movhi
-.L1549:
+	strh	r3, [r2, #-180]	@ movhi
+.L1583:
 	ldrh	r3, [r4, #2588]
 	ldrh	r2, [r4, #2348]
 	cmp	r2, r3
-	beq	.L1555
+	beq	.L1589
 	ldrh	r2, [r4, #2396]
 	cmp	r2, r3
-	beq	.L1555
-	ldr	r7, .L1632+8
-.L1556:
+	beq	.L1589
+	ldr	r7, .L1665+8
+.L1590:
 	ldrh	r9, [r4, #2588]
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1557
+	bne	.L1591
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [r4, #3160]
-.L1558:
+.L1592:
 	ldrh	r8, [r4, #3156]
 	mov	r0, r8
 	bl	List_get_gc_head_node
 	uxth	fp, r0
 	cmp	fp, r9
 	strh	fp, [r4, #2588]	@ movhi
-	bne	.L1559
+	bne	.L1593
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1513
-.L1541:
+	b	.L1547
+.L1575:
 	movs	r3, #0
 	ldrh	r7, [r4, #2344]
 	str	r3, [r4, #3160]
 	ldrh	r3, [r4, #3148]
-	ldr	r5, .L1632+8
+	ldr	r5, .L1665+8
 	cmp	r3, r7
-	bcs	.L1542
-	ldrh	r3, [r5, #-188]
-	cbnz	r3, .L1543
+	bcs	.L1576
+	ldrh	r3, [r5, #-184]
+	cbnz	r3, .L1577
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1544
-.L1543:
+	bcs	.L1578
+.L1577:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1627:
+.L1660:
 	strh	r3, [r4, #3148]	@ movhi
-.L1629:
+.L1662:
 	bl	FtlReadRefresh
-	ldrh	r0, [r5, #-188]
-	b	.L1513
-.L1544:
+	ldrh	r0, [r5, #-184]
+	b	.L1547
+.L1578:
 	movs	r3, #18
-	b	.L1627
-.L1542:
-	ldrh	r0, [r5, #-188]
+	b	.L1660
+.L1576:
+	ldrh	r0, [r5, #-184]
 	cmp	r0, #0
-	bne	.L1546
+	bne	.L1580
 	ldrh	r6, [r4, #2572]
 	add	r3, r6, r6, lsl #1
 	asrs	r3, r3, #2
@@ -10861,57 +11025,57 @@ rk_ftl_garbage_collect:
 	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1547
+	ble	.L1581
 	subs	r6, r6, #1
 	cmp	r7, r6
-	bge	.L1629
-.L1547:
+	bge	.L1662
+.L1581:
 	cmp	r2, #0
-	bne	.L1546
+	bne	.L1580
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2344]
 	adds	r0, r0, #1
-	b	.L1513
-.L1550:
+	b	.L1547
+.L1666:
+	.align	2
+.L1665:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LC112
+	.word	.LANCHOR0+2588
+.L1584:
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	beq	.L1551
+	beq	.L1585
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1552
+	cbnz	r3, .L1586
 	strh	r5, [r4, #3202]	@ movhi
-.L1552:
+.L1586:
 	ldrh	r3, [r4, #3202]
 	strh	r3, [r4, #2588]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r4, #3202]	@ movhi
-	b	.L1551
-.L1633:
-	.align	2
-.L1632:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LANCHOR3
-	.word	.LC108
-	.word	.LANCHOR0+2588
-.L1555:
+	b	.L1585
+.L1589:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1630:
-	ldr	r3, .L1634
-	ldrh	r0, [r3, #-188]
-	b	.L1513
-.L1559:
+.L1663:
+	ldr	r3, .L1667
+	ldrh	r0, [r3, #-184]
+	b	.L1547
+.L1593:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r8, r8, #1
 	ldr	r3, [sp, #8]
-	cbz	r0, .L1560
+	cbz	r0, .L1594
 	strh	r8, [r4, #3156]	@ movhi
-	b	.L1558
-.L1560:
+	b	.L1592
+.L1594:
 	uxth	r0, r3
 	ldrh	ip, [r4, #32]
 	ldrh	r3, [r4, #102]
@@ -10922,77 +11086,77 @@ rk_ftl_garbage_collect:
 	ldrh	r1, [r2, r0, lsl #1]
 	add	ip, r3, r3, lsr #31
 	cmp	r1, ip, asr #1
-	bgt	.L1562
+	bgt	.L1596
 	cmp	r8, #48
-	bls	.L1563
+	bls	.L1597
 	cmp	r1, #8
-	bls	.L1563
+	bls	.L1597
 	ldrh	r1, [r4, #3192]
 	cmp	r1, #35
-	bhi	.L1563
-.L1562:
+	bhi	.L1597
+.L1596:
 	strh	r10, [r4, #3156]	@ movhi
-.L1563:
+.L1597:
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r3, r2
-	bgt	.L1564
+	bgt	.L1598
 	cmp	r5, r9
-	bne	.L1564
+	bne	.L1598
 	movs	r3, #0
 	strh	r5, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1630
-.L1564:
-	cbnz	r2, .L1565
+	b	.L1663
+.L1598:
+	cbnz	r2, .L1599
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #3156]
 	adds	r3, r3, #1
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1558
-.L1565:
+	b	.L1592
+.L1599:
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	ldrh	r3, [r4, #2348]
 	cmp	r3, fp
-	bne	.L1566
-	movw	r2, #658
-	ldr	r1, .L1634+4
-	ldr	r0, .L1634+8
+	bne	.L1600
+	movw	r2, #665
+	ldr	r1, .L1667+4
+	ldr	r0, .L1667+8
 	bl	sftl_printk
-.L1566:
+.L1600:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2396]
 	cmp	r2, r3
-	bne	.L1567
-	movw	r2, #659
-	ldr	r1, .L1634+4
-	ldr	r0, .L1634+8
+	bne	.L1601
+	movw	r2, #666
+	ldr	r1, .L1667+4
+	ldr	r0, .L1667+8
 	bl	sftl_printk
-.L1567:
+.L1601:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2444]
 	cmp	r2, r3
-	bne	.L1568
-	mov	r2, #660
-	ldr	r1, .L1634+4
-	ldr	r0, .L1634+8
+	bne	.L1602
+	movw	r2, #667
+	ldr	r1, .L1667+4
+	ldr	r0, .L1667+8
 	bl	sftl_printk
-.L1568:
-	ldr	r0, .L1634+12
+.L1602:
+	ldr	r0, .L1667+12
 	bl	make_superblock
 	ldrh	r1, [r4, #2588]
 	movs	r3, #0
 	ldr	r2, [r4, #2324]
-	strh	r3, [r7, #-186]	@ movhi
+	strh	r3, [r7, #-182]	@ movhi
 	ldrh	r2, [r2, r1, lsl #1]
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
-	strh	r2, [r7, #-184]	@ movhi
-.L1557:
+	strh	r2, [r7, #-180]	@ movhi
+.L1591:
 	bl	FtlReadRefresh
 	movs	r3, #1
-	str	r3, [r4, #3820]
+	str	r3, [r4, #3824]
 	ldrh	r3, [r4, #102]
 	str	r3, [sp, #12]
 	ldrh	r3, [r4, #2590]
@@ -11005,11 +11169,11 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r6, r6
-.L1628:
+.L1661:
 	str	r3, [sp, #8]
 	ldrh	r3, [sp, #8]
 	cmp	r6, r3
-	bls	.L1578
+	bls	.L1612
 	ldr	r3, [sp, #8]
 	movw	r10, #65535
 	ldrh	r1, [r4, #2590]
@@ -11018,58 +11182,58 @@ rk_ftl_garbage_collect:
 	ldr	r0, [r4, #3180]
 	add	r1, r1, r3
 	movs	r3, #0
-	ldr	ip, .L1634+16
+	ldr	ip, .L1667+20
 	mov	r8, r3
-	b	.L1579
-.L1572:
+	b	.L1613
+.L1606:
 	ldrh	r2, [ip, #2]!
 	cmp	r2, r10
-	beq	.L1571
+	beq	.L1605
 	mla	r9, fp, r8, r0
 	add	r8, r8, #1
 	orr	r2, r1, r2, lsl #10
 	uxth	r8, r8
 	str	r2, [r9, #4]
-.L1571:
+.L1605:
 	adds	r3, r3, #1
-.L1579:
+.L1613:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1572
+	bhi	.L1606
 	mov	fp, #0
 	ldrb	r2, [r4, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.L1573:
+.L1607:
 	uxth	r3, fp
 	cmp	r8, r3
-	bhi	.L1577
+	bhi	.L1611
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1628
-.L1577:
+	b	.L1661
+.L1611:
 	mov	r9, #20
 	ldr	r3, [r4, #3180]
 	mul	r9, r9, fp
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	adds	r3, r3, #1
-	beq	.L1574
+	beq	.L1608
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1574
+	bne	.L1608
 	ldr	r3, [r10, #8]
 	adds	r2, r3, #1
-	bne	.L1575
-	mov	r2, #696
-	ldr	r1, .L1634+4
-	ldr	r0, .L1634+8
+	bne	.L1609
+	movw	r2, #703
+	ldr	r1, .L1667+4
+	ldr	r0, .L1667+8
 	str	r3, [sp, #16]
 	bl	sftl_printk
 	ldr	r3, [sp, #16]
-.L1575:
+.L1609:
 	movs	r2, #0
 	mov	r0, r3
 	add	r1, sp, #28
@@ -11079,21 +11243,21 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1574
-	ldrh	r3, [r7, #-186]
+	bne	.L1608
+	ldrh	r3, [r7, #-182]
 	movs	r2, #20
 	ldr	r1, [r4, #3164]
 	str	r2, [sp, #20]
 	adds	r3, r3, #1
-	strh	r3, [r7, #-186]	@ movhi
-	ldr	r3, [r4, #3836]
+	strh	r3, [r7, #-182]	@ movhi
+	ldr	r3, [r4, #3840]
 	mla	r3, r2, r1, r3
 	ldr	r1, [r0, #16]
 	str	r1, [r3, #16]
 	str	r3, [sp, #16]
 	bl	Ftl_get_new_temp_ppa
 	ldr	r3, [sp, #16]
-	ldr	r1, [r4, #3836]
+	ldr	r1, [r4, #3840]
 	ldr	r2, [sp, #20]
 	str	r0, [r3, #4]
 	ldr	r3, [r4, #3164]
@@ -11120,111 +11284,116 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	ldr	r3, [r4, #3164]
 	cmp	r2, r3
-	beq	.L1576
+	beq	.L1610
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1574
-.L1576:
+	cbnz	r3, .L1608
+.L1610:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1574
-.L1631:
+	cbz	r0, .L1608
+.L1664:
 	movs	r3, #0
-	ldrh	r0, [r7, #-188]
-	str	r3, [r4, #3820]
-	b	.L1513
-.L1574:
+	ldrh	r0, [r7, #-184]
+	str	r3, [r4, #3824]
+	b	.L1547
+.L1608:
 	add	fp, fp, #1
-	b	.L1573
-.L1578:
+	b	.L1607
+.L1612:
 	ldrh	r3, [r4, #2590]
 	add	r6, r6, r3
 	ldr	r3, [sp, #12]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r4, #2590]	@ movhi
-	bls	.L1580
-	ldrh	r2, [r7, #-186]
-	ldrh	r3, [r7, #-184]
-	cmp	r2, r3
-	bne	.L1581
-.L1580:
+	bhi	.L1614
 	ldr	r3, [r4, #3164]
-	cbz	r3, .L1582
+	cbz	r3, .L1615
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1631
-.L1582:
-	ldrh	r1, [r7, #-186]
-	cbnz	r1, .L1583
+	bne	.L1664
+.L1615:
+	ldrh	r6, [r7, #-182]
+	cbnz	r6, .L1616
+	ldrh	r1, [r4, #2588]
+	ldr	r3, [r4, #2324]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r3, .L1616
+	ldrh	r0, [r7, #-180]
+	ldrh	r2, [r4, #2590]
+	str	r3, [sp]
+	mov	r3, r6
+	str	r0, [sp, #4]
+	ldr	r0, .L1667+16
+	bl	sftl_printk
 	ldrh	r2, [r4, #2588]
 	ldr	r3, [r4, #2324]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1583
-	strh	r1, [r3, r2, lsl #1]	@ movhi
+	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4, #2588]
 	bl	update_vpc_list
-	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1583:
+.L1616:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1581:
+.L1614:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #2
-	bhi	.L1584
+	bhi	.L1617
 	ldrh	r6, [r4, #102]
-	b	.L1556
-.L1584:
-	ldrh	r0, [r7, #-188]
+	b	.L1590
+.L1617:
 	movs	r2, #0
-	str	r2, [r4, #3820]
+	str	r2, [r4, #3824]
+	ldr	r2, .L1667
+	ldrh	r0, [r2, #-184]
 	cmp	r0, #0
-	bne	.L1513
+	bne	.L1547
 	adds	r0, r3, #1
-	b	.L1513
-.L1588:
+	b	.L1547
+.L1621:
 	movs	r0, #0
-	b	.L1513
-.L1635:
+	b	.L1547
+.L1668:
 	.align	2
-.L1634:
+.L1667:
 	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
 	.word	.LANCHOR0+2588
+	.word	.LC113
 	.word	.LANCHOR0+2602
-.L1519:
+.L1553:
 	cmp	r7, #0
-	beq	.L1586
-.L1529:
+	beq	.L1619
+.L1563:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1597
-.L1587:
+	bne	.L1630
+.L1620:
 	ldrh	r3, [r4, #3202]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1597
+	bne	.L1630
 	cmp	r5, r3
-	bne	.L1597
+	bne	.L1630
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	beq	.L1541
-.L1546:
+	beq	.L1575
+.L1580:
 	movw	r5, #65535
-.L1597:
+.L1630:
 	movs	r6, #1
-	b	.L1540
-.L1521:
+	b	.L1574
+.L1554:
 	cmp	r7, #0
-	beq	.L1586
-	movw	r5, #65535
-	b	.L1587
-.L1520:
+	bne	.L1580
+	b	.L1619
+.L1555:
 	cmp	r7, #0
-	bne	.L1546
-	b	.L1586
+	beq	.L1619
+	movw	r5, #65535
+	b	.L1620
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	1
@@ -11258,253 +11427,274 @@ FtlRead:
 	cmp	r0, #16
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	.pad #60
-	sub	sp, sp, #60
+	.pad #84
+	sub	sp, sp, #84
 	mov	r7, r1
-	mov	r10, r3
-	str	r2, [sp, #28]
-	bne	.L1638
+	mov	r9, r3
+	str	r2, [sp, #56]
+	bne	.L1671
 	mov	r2, r3
-	ldr	r1, [sp, #28]
+	ldr	r1, [sp, #56]
 	add	r0, r7, #256
 	bl	FtlVendorPartRead
-	mov	r8, r0
-.L1637:
-	mov	r0, r8
-	add	sp, sp, #60
+	str	r0, [sp, #28]
+.L1670:
+	ldr	r0, [sp, #28]
+	add	sp, sp, #84
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1638:
-	ldr	r3, [sp, #28]
-	ldr	r4, .L1669
+.L1671:
+	ldr	r3, [sp, #56]
+	ldr	r4, .L1703
 	adds	r3, r1, r3
-	str	r3, [sp, #8]
-	ldr	r2, [sp, #8]
+	str	r3, [sp, #36]
+	ldr	r2, [sp, #36]
 	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	bhi	.L1658
-	ldr	r3, .L1669+4
+	bhi	.L1692
+	ldr	r3, .L1703+4
 	ldr	r3, [r3]
-	adds	r5, r3, #1
-	beq	.L1659
-	bl	FtlCacheWriteBack
+	adds	r0, r3, #1
+	beq	.L1693
 	ldrh	r5, [r4, #58]
 	mov	r0, r7
-	mov	r9, #0
-	mov	r6, r9
-	mov	r8, r9
+	mov	r8, #0
+	mov	r6, r8
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #8]
+	ldr	r3, [sp, #36]
 	mov	r1, r5
-	str	r0, [sp, #12]
+	str	r0, [sp, #40]
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #12]
-	ldr	r5, [sp, #12]
-	str	r0, [sp, #16]
+	ldr	r3, [sp, #40]
+	ldr	r5, [sp, #40]
+	str	r0, [sp, #44]
 	rsb	r3, r3, #1
-	str	r9, [sp, #24]
+	str	r8, [sp, #52]
 	add	r3, r3, r0
-	str	r9, [sp, #20]
-	str	r3, [sp, #4]
-	ldr	r2, [sp, #4]
+	str	r8, [sp, #48]
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #32]
 	ldr	r3, [r4, #2508]
+	str	r8, [sp, #28]
 	add	r3, r3, r2
 	str	r3, [r4, #2508]
-.L1640:
-	ldr	r3, [sp, #4]
-	cbnz	r3, .L1656
-	ldr	r3, .L1669
-	ldrh	r2, [r3, #3206]
-	cbnz	r2, .L1657
+.L1673:
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L1690
+	ldr	r3, .L1703
+	ldrh	r2, [r3, #3210]
+	cbnz	r2, .L1691
 	ldrh	r3, [r3, #2344]
 	cmp	r3, #31
-	bhi	.L1637
-.L1657:
+	bhi	.L1670
+.L1691:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1637
-.L1656:
+	b	.L1670
+.L1690:
+	add	r1, sp, #76
 	movs	r2, #0
-	add	r1, sp, #52
 	mov	r0, r5
 	bl	log2phys
-	ldr	r2, [sp, #52]
-	adds	r0, r2, #1
-	bne	.L1641
-	mov	fp, #0
-.L1642:
+	ldr	r3, [sp, #76]
+	adds	r1, r3, #1
+	bne	.L1674
+	mov	r10, #0
+.L1675:
 	ldrh	r0, [r4, #58]
-	cmp	fp, r0
-	bcc	.L1644
-.L1645:
-	ldr	r3, [sp, #4]
+	cmp	r10, r0
+	bcc	.L1677
+.L1678:
+	ldr	r3, [sp, #32]
 	adds	r5, r5, #1
 	subs	r3, r3, #1
-	str	r3, [sp, #4]
-	beq	.L1649
+	str	r3, [sp, #32]
+	beq	.L1682
 	ldrh	r3, [r4, #32]
 	cmp	r6, r3, lsl #2
-	bne	.L1640
-.L1649:
+	bne	.L1673
+.L1682:
 	cmp	r6, #0
-	beq	.L1640
+	beq	.L1673
 	movs	r2, #0
 	mov	r1, r6
-	ldr	r0, [r4, #3832]
+	ldr	r0, [r4, #3836]
 	mov	fp, #0
 	bl	FlashReadPages
-	lsl	r3, r9, #9
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #20]
+	lsl	r3, r8, #9
+	str	r3, [sp, #68]
+	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #24]
+	str	r3, [sp, #60]
+	ldr	r3, [sp, #52]
 	lsls	r3, r3, #9
-	str	r3, [sp, #36]
-.L1655:
+	str	r3, [sp, #64]
+.L1689:
 	movs	r3, #20
-	ldr	r2, [r4, #3832]
-	mul	r3, r3, fp
-	ldr	r0, [sp, #12]
-	add	r2, r2, r3
-	ldr	r1, [r2, #16]
-	cmp	r0, r1
-	bne	.L1651
-	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3816]
+	ldr	r1, [sp, #40]
+	mul	r10, r3, fp
+	ldr	r3, [r4, #3836]
+	add	r3, r3, r10
+	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L1652
-	str	r3, [sp, #44]
-	mov	r0, r10
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #36]
+	bne	.L1684
+	ldr	r1, [r3, #8]
+	ldr	r3, [r4, #3820]
+	cmp	r1, r3
+	bne	.L1685
+	ldr	r3, [sp, #60]
+	mov	r0, r9
+	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L1668:
+.L1702:
 	bl	ftl_memcpy
-	ldr	r3, [sp, #44]
-.L1652:
-	ldr	r2, [r4, #3832]
-	ldr	r0, [r2, r3]
-	add	ip, r2, r3
-	adds	r1, r0, #1
+.L1685:
+	ldr	r1, [r4, #3836]
+	add	r1, r1, r10
+	ldr	r3, [r1, #12]
+	ldr	r2, [r1, #16]
+	ldr	r3, [r3, #8]
+	cmp	r2, r3
+	beq	.L1686
+	ldr	r3, [r4, #2708]
+	adds	r3, r3, #1
+	str	r3, [r4, #2708]
+	ldr	r2, [r1, #8]
+	ldr	r3, [r1, #12]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #16]
+	ldr	r2, [r2]
+	ldr	r0, .L1703+8
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r1, #4]
+	ldr	r3, [r3]
+	ldr	r1, [r1, #16]
+	bl	sftl_printk
+.L1686:
+	ldr	r3, [r4, #3836]
+	ldr	r1, [r3, r10]
+	add	r0, r3, r10
+	adds	r2, r1, #1
 	itttt	eq
-	ldreq	r1, [r4, #2708]
-	moveq	r8, r0
-	addeq	r1, r1, #1
-	streq	r1, [r4, #2708]
-	ldr	r3, [r2, r3]
+	ldreq	r2, [r4, #2708]
+	streq	r1, [sp, #28]
+	addeq	r2, r2, #1
+	streq	r2, [r4, #2708]
+	ldr	r3, [r3, r10]
 	cmp	r3, #256
-	bne	.L1654
-	ldr	r0, [ip, #4]
+	bne	.L1688
+	ldr	r0, [r0, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1654:
+.L1688:
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L1655
+	bne	.L1689
 	movs	r6, #0
-	b	.L1640
-.L1644:
-	mla	r0, r0, r5, fp
+	b	.L1673
+.L1677:
+	mla	r0, r0, r5, r10
 	cmp	r7, r0
-	bhi	.L1643
-	ldr	r3, [sp, #8]
+	bhi	.L1676
+	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L1643
+	bls	.L1676
 	subs	r0, r0, r7
 	mov	r1, #512
-	add	r0, r10, r0, lsl #9
+	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.L1643:
-	add	fp, fp, #1
-	b	.L1642
-.L1641:
-	ldr	r3, [r4, #3832]
-	movs	r1, #20
-	ldrh	fp, [r4, #58]
-	mla	r3, r1, r6, r3
-	str	r2, [r3, #4]
-	ldr	r2, [sp, #12]
-	cmp	r5, r2
-	bne	.L1646
-	ldr	r2, [r4, #3816]
-	mov	r1, fp
+.L1676:
+	add	r10, r10, #1
+	b	.L1675
+.L1674:
+	ldr	r2, [r4, #3836]
+	mov	fp, #20
+	ldrh	r10, [r4, #58]
+	mla	fp, fp, r6, r2
+	str	r3, [fp, #4]
+	ldr	r3, [sp, #40]
+	cmp	r5, r3
+	bne	.L1679
+	ldr	r3, [r4, #3820]
+	mov	r1, r10
 	mov	r0, r7
-	str	r3, [sp, #32]
-	str	r2, [r3, #8]
+	str	r3, [fp, #8]
 	bl	__aeabi_uidivmod
-	sub	r2, fp, r1
-	str	r1, [sp, #20]
-	ldr	r1, [sp, #28]
-	mov	r3, r2
-	cmp	r2, r1
+	ldr	r2, [sp, #56]
+	sub	r3, r10, r1
+	str	r1, [sp, #48]
+	cmp	r3, r2
 	it	cs
-	movcs	r3, r1
-	cmp	r3, fp
-	str	r3, [sp, #24]
-	ldr	r3, [sp, #32]
-	bne	.L1647
-	str	r10, [r3, #8]
-.L1647:
-	ldrh	r2, [r4, #112]
-	ldr	r1, [r4, #3812]
-	str	r5, [r3, #16]
-	muls	r2, r6, r2
+	movcs	r3, r2
+	cmp	r3, r10
+	str	r3, [sp, #52]
+	bne	.L1680
+	str	r9, [fp, #8]
+.L1680:
+	ldrh	r3, [r4, #112]
+	ldr	r2, [r4, #3816]
+	str	r5, [fp, #16]
+	muls	r3, r6, r3
 	adds	r6, r6, #1
-	bic	r2, r2, #3
-	add	r2, r2, r1
-	str	r2, [r3, #12]
-	b	.L1645
-.L1646:
-	ldr	r2, [sp, #16]
-	cmp	r5, r2
-	bne	.L1648
-	ldr	r2, [r4, #3808]
-	ldr	r1, [sp, #8]
-	str	r2, [r3, #8]
-	mul	r2, fp, r5
-	sub	r9, r1, r2
-	cmp	fp, r9
-	bne	.L1647
-.L1667:
-	subs	r2, r2, r7
-	add	r2, r10, r2, lsl #9
-	str	r2, [r3, #8]
-	b	.L1647
-.L1648:
-	mul	r2, r5, fp
-	b	.L1667
-.L1651:
-	ldr	r0, [sp, #16]
-	cmp	r0, r1
-	bne	.L1652
-	ldr	r1, [r2, #8]
-	ldr	r2, [r4, #3808]
-	cmp	r1, r2
-	bne	.L1652
-	str	r3, [sp, #44]
-	ldrh	r0, [r4, #58]
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #40]
-	muls	r0, r3, r0
-	subs	r0, r0, r7
-	add	r0, r10, r0, lsl #9
-	b	.L1668
-.L1658:
-	mov	r8, #-1
-	b	.L1637
-.L1659:
-	mov	r8, r3
-	b	.L1637
-.L1670:
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [fp, #12]
+	b	.L1678
+.L1679:
+	ldr	r3, [sp, #44]
+	cmp	r5, r3
+	bne	.L1681
+	ldr	r3, [r4, #3812]
+	ldr	r2, [sp, #36]
+	str	r3, [fp, #8]
+	mul	r3, r10, r5
+	sub	r8, r2, r3
+	cmp	r10, r8
+	bne	.L1680
+.L1701:
+	subs	r3, r3, r7
+	add	r3, r9, r3, lsl #9
+	str	r3, [fp, #8]
+	b	.L1680
+.L1681:
+	mul	r3, r5, r10
+	b	.L1701
+.L1684:
+	ldr	r1, [sp, #44]
+	cmp	r1, r2
+	bne	.L1685
+	ldr	r1, [r3, #8]
+	ldr	r3, [r4, #3812]
+	cmp	r1, r3
+	bne	.L1685
+	ldrh	r0, [r4, #58]
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #68]
+	muls	r0, r3, r0
+	subs	r0, r0, r7
+	add	r0, r9, r0, lsl #9
+	b	.L1702
+.L1692:
+	mov	r3, #-1
+.L1693:
+	str	r3, [sp, #28]
+	b	.L1670
+.L1704:
 	.align	2
-.L1669:
+.L1703:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
+	.word	.LC96
 	.fnend
 	.size	FtlRead, .-FtlRead
 	.align	1
@@ -11542,113 +11732,116 @@ FtlWrite:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #68
 	sub	sp, sp, #68
-	mov	r8, r1
+	mov	r10, r1
 	str	r2, [sp, #12]
-	str	r3, [sp, #4]
-	bne	.L1673
+	str	r3, [sp, #8]
+	bne	.L1707
 	mov	r2, r3
 	ldr	r1, [sp, #12]
-	add	r0, r8, #256
+	add	r0, r10, #256
 	bl	FtlVendorPartWrite
-.L1672:
+.L1706:
 	add	sp, sp, #68
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1673:
+.L1707:
 	ldr	r3, [sp, #12]
-	ldr	r4, .L1739
-	adds	r7, r1, r3
-	ldr	r3, [r4, #140]
-	cmp	r7, r3
-	bhi	.L1715
-	ldr	r6, .L1739+4
-	ldr	r0, [r6]
-	adds	r5, r0, #1
-	beq	.L1672
-	ldr	r3, .L1739+8
+	ldr	r5, .L1757
+	adds	r6, r1, r3
+	ldr	r3, [r5, #140]
+	cmp	r6, r3
+	bhi	.L1743
+	ldr	r4, .L1757+4
+	ldr	r0, [r4]
+	adds	r7, r0, #1
+	beq	.L1706
+	ldr	r3, .L1757+8
 	mov	r2, #2048
-	ldrh	r5, [r4, #58]
-	mov	r0, r8
-	str	r2, [r3, #-180]
-	mov	r1, r5
+	ldrh	r7, [r5, #58]
+	mov	r0, r10
+	str	r2, [r3, #-176]
+	mov	r1, r7
 	bl	__aeabi_uidiv
-	mov	r1, r5
-	mov	r10, r0
-	subs	r0, r7, #1
+	mov	r1, r7
+	str	r0, [sp, #4]
+	subs	r0, r6, #1
 	bl	__aeabi_uidiv
-	sub	r7, r0, r10
-	ldr	fp, [r4, #3988]
-	adds	r3, r7, #1
-	adds	r2, r7, #1
-	str	r3, [sp, #8]
-	ldr	r3, [r4, #2516]
+	ldr	r2, [sp, #4]
 	str	r0, [sp, #20]
+	subs	r3, r0, r2
+	str	r3, [sp, #24]
+	adds	r3, r3, #1
+	str	r3, [sp]
+	ldr	r2, [sp]
+	ldr	r3, [r5, #2516]
 	add	r3, r3, r2
-	str	r3, [r4, #2516]
-	cmp	fp, #0
-	beq	.L1675
-	ldr	r3, [fp, #16]
-	cmp	r10, r3
-	beq	.L1676
-	bl	FtlCacheWriteBack
-.L1675:
-	ldr	r3, [r6, #8]
-	cmp	r3, #0
-	beq	.L1717
-	ldr	r5, .L1739+12
-	ldrh	r2, [r4, #2352]
-	add	r3, r5, #48
+	str	r3, [r5, #2516]
+	ldr	r3, [r4, #8]
+	cbz	r3, .L1745
+	ldrh	r2, [r5, #2352]
+	addw	r3, r5, #2348
+	addw	r5, r5, #2396
 	cmp	r2, #0
-	it	eq
-	moveq	r5, r3
-.L1678:
-	ldr	r4, .L1739
-	mov	r6, r10
-.L1679:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1713
+	it	ne
+	movne	r5, r3
+.L1709:
+	ldr	r7, [sp, #4]
+	ldr	r4, .L1757
+.L1710:
+	ldr	r3, [sp]
+	cbnz	r3, .L1739
+	mov	r0, r3
+	ldr	r1, [sp, #24]
+	bl	rk_ftl_garbage_collect
+	ldrh	r3, [r4, #2344]
+	cmp	r3, #15
+	bls	.L1740
+.L1742:
+	movs	r0, #0
+	b	.L1706
+.L1745:
+	addw	r5, r5, #2348
+	b	.L1709
+.L1739:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1680
-	mov	r2, #1012
-	ldr	r1, .L1739+16
-	ldr	r0, .L1739+20
+	bcc	.L1711
+	movw	r2, #991
+	ldr	r1, .L1757+12
+	ldr	r0, .L1757+16
 	bl	sftl_printk
-.L1680:
-	ldrh	r9, [r5, #4]
-	cmp	r9, #0
-	bne	.L1681
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1739+12
-	ldr	r7, .L1739+4
+.L1711:
+	ldrh	r2, [r5, #4]
+	cbnz	r2, .L1712
+	ldr	r3, .L1757+20
+	ldr	r6, .L1757+4
 	cmp	r5, r3
-	bne	.L1682
-	ldrh	r9, [r4, #2400]
-	cmp	r9, #0
-	bne	.L1683
+	bne	.L1713
+	ldrh	r8, [r4, #2400]
+	cmp	r8, #0
+	bne	.L1714
 	add	r0, r5, #48
 	bl	allocate_new_data_superblock
-	str	r9, [r7, #8]
-.L1683:
-	ldr	r5, .L1739+12
-	ldr	r0, .L1739+12
+	str	r8, [r6, #8]
+.L1714:
+	ldr	r5, .L1757+20
+	ldr	r0, .L1757+20
 	bl	allocate_new_data_superblock
-	ldr	r2, [r7, #8]
+	ldr	r2, [r6, #8]
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1684:
+.L1715:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1681
+	cbnz	r3, .L1712
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1681:
+.L1712:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	ldrh	r3, [r5, #4]
-	ldr	r1, [sp, #8]
+	ldr	r1, [sp]
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -11660,241 +11853,162 @@ FtlWrite:
 	str	r2, [sp, #36]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1685
-	movw	r2, #1045
-	ldr	r1, .L1739+16
-	ldr	r0, .L1739+20
+	bcc	.L1716
+	mov	r2, #1024
+	ldr	r1, .L1757+12
+	ldr	r0, .L1757+16
 	bl	sftl_printk
-.L1685:
-	mov	r9, #0
-.L1686:
+.L1716:
+	mov	fp, #0
+.L1717:
 	ldr	r3, [sp, #36]
-	cmp	r9, r3
-	bne	.L1707
-.L1687:
-	ldr	r3, [r4, #3988]
-	cmp	r3, #0
-	beq	.L1708
-	ldr	r3, [sp, #8]
-	subs	r9, r9, #1
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
-	bne	.L1708
-.L1713:
-	ldr	r3, [sp, #20]
-	movs	r0, #0
-	ldr	r4, .L1739
-	sub	r1, r3, r10
-	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r4, #2344]
-	cmp	r3, #15
-	bhi	.L1710
-	movw	r5, #65535
-.L1734:
-	ldrh	r3, [r4, #2588]
-	cmp	r3, r5
-	bne	.L1714
-	ldrh	r3, [r4, #3202]
-	cmp	r3, r5
-	bne	.L1714
-	movs	r0, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.L1714:
-	movs	r1, #1
-	movs	r3, #128
-	mov	r0, r1
-	strh	r3, [r4, #3150]	@ movhi
-	strh	r3, [r4, #3148]	@ movhi
-	bl	rk_ftl_garbage_collect
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r4, #2344]
-	cmp	r3, #8
-	bls	.L1734
+	cmp	fp, r3
+	bne	.L1737
+.L1718:
+	mov	r3, r5
+	movs	r2, #0
+	mov	r1, fp
+	ldr	r0, [r4, #3844]
+	bl	FtlProgPages
+	ldr	r3, [sp]
+	cmp	fp, r3
+	bls	.L1738
+	movw	r2, #1101
+	ldr	r1, .L1757+12
+	ldr	r0, .L1757+16
+	bl	sftl_printk
+.L1738:
+	ldr	r3, [sp]
+	sub	r3, r3, fp
+	str	r3, [sp]
 	b	.L1710
-.L1676:
-	ldr	r3, [r4, #2520]
-	mov	r1, r5
-	mov	r0, r8
-	adds	r3, r3, #1
-	str	r3, [r4, #2520]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	subs	r5, r5, r1
-	ldr	r0, [fp, #8]
-	mov	r3, r1
-	ldr	r1, [sp, #4]
-	cmp	r5, r2
-	it	cs
-	movcs	r5, r2
-	lsl	r9, r5, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r9
-	bl	ftl_memcpy
-	cbnz	r7, .L1677
-.L1710:
-	movs	r0, #0
-	b	.L1672
-.L1677:
-	ldr	r3, [sp, #12]
-	add	r8, r8, r5
-	add	r10, r10, #1
-	subs	r3, r3, r5
-	str	r3, [sp, #12]
-	ldr	r3, [sp, #4]
-	add	r3, r3, r9
-	str	r3, [sp, #4]
-	bl	FtlCacheWriteBack
-	str	r7, [sp, #8]
-	b	.L1675
-.L1717:
-	ldr	r5, .L1739+12
-	b	.L1678
-.L1682:
+.L1713:
+	str	r2, [r6, #8]
 	ldrh	r2, [r4, #2352]
-	str	r9, [r7, #8]
-	cbnz	r2, .L1720
+	cbnz	r2, .L1748
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1684
-.L1720:
+	b	.L1715
+.L1748:
 	mov	r5, r3
-	b	.L1681
-.L1707:
+	b	.L1712
+.L1737:
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1687
+	beq	.L1718
 	movs	r2, #0
 	add	r1, sp, #40
-	mov	r0, r6
-	movs	r7, #20
+	mov	r0, r7
+	mov	r8, #20
 	bl	log2phys
 	mov	r0, r5
-	mul	r7, r7, r9
+	mul	r8, r8, fp
 	bl	get_new_active_ppa
 	ldrh	r2, [r4, #112]
-	ldr	r3, [r4, #3840]
-	mul	r1, r2, r9
-	add	r3, r3, r7
+	ldr	r3, [r4, #3844]
+	mul	r1, r2, fp
+	add	r3, r3, r8
 	str	r0, [r3, #4]
-	str	r6, [r3, #16]
+	str	r7, [r3, #16]
 	bic	r1, r1, #3
 	str	r1, [sp, #28]
 	ldr	r0, [sp, #28]
-	ldr	r1, [r4, #3812]
-	add	fp, r1, r0
+	ldr	r1, [r4, #3816]
+	add	r9, r1, r0
 	str	r1, [sp, #32]
-	str	fp, [r3, #12]
+	str	r9, [r3, #12]
 	movs	r1, #0
-	mov	r0, fp
+	mov	r0, r9
 	bl	ftl_memset
-	cmp	r6, r10
-	beq	.L1688
+	ldr	r3, [sp, #4]
+	cmp	r7, r3
+	beq	.L1719
 	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1733
+	cmp	r7, r3
+	bne	.L1752
+	ldrh	r2, [r4, #58]
 	ldr	r3, [sp, #12]
-	add	r2, r8, r3
-	ldrh	r3, [r4, #58]
-	smulbb	r3, r3, r6
-	subs	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [sp, #16]
+	smulbb	r2, r2, r7
+	add	r6, r10, r3
 	movs	r3, #0
-	str	r3, [sp, #24]
-	b	.L1691
-.L1688:
-	ldrh	r2, [r4, #58]
-	mov	r0, r8
-	mov	r1, r2
-	str	r2, [sp, #16]
+	str	r3, [sp, #16]
+	subs	r6, r6, r2
+	uxth	r6, r6
+	b	.L1722
+.L1719:
+	ldrh	r6, [r4, #58]
+	mov	r0, r10
+	mov	r1, r6
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #16]
-	str	r1, [sp, #24]
-	subs	r2, r2, r1
-	ldr	r1, [sp, #12]
-	mov	r3, r2
-	cmp	r2, r1
+	ldr	r3, [sp, #12]
+	subs	r6, r6, r1
+	str	r1, [sp, #16]
+	cmp	r6, r3
 	it	cs
-	movcs	r3, r1
-	str	r3, [sp, #16]
-.L1691:
+	movcs	r6, r3
+.L1722:
 	ldrh	r3, [r4, #58]
-	ldr	r2, [sp, #16]
-	cmp	r2, r3
-	ldr	r3, [r4, #3840]
-	bne	.L1692
-	cmp	r6, r10
-	add	r7, r7, r3
-	bne	.L1693
-	ldr	r3, [sp, #4]
-.L1737:
-	str	r3, [r7, #8]
-	b	.L1694
-.L1693:
-	ldr	r2, [sp, #16]
+	cmp	r6, r3
 	ldr	r3, [sp, #4]
-	muls	r2, r6, r2
-	sub	r2, r2, r8
-	add	r2, r3, r2, lsl #9
-	str	r2, [r7, #8]
-.L1694:
+	bne	.L1723
+	cmp	r7, r3
+	ldr	r3, [r4, #3844]
+	itte	ne
+	mulne	r6, r6, r7
+	ldrne	r2, [sp, #8]
+	ldreq	r2, [sp, #8]
+	add	r3, r3, r8
+	itett	ne
+	subne	r6, r6, r10
+	streq	r2, [r3, #8]
+	addne	r6, r2, r6, lsl #9
+	strne	r6, [r3, #8]
+.L1725:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1704
-	movw	r2, #1119
-	ldr	r1, .L1739+16
-	ldr	r0, .L1739+20
+	bcc	.L1734
+	movw	r2, #1092
+	ldr	r1, .L1757+12
+	ldr	r0, .L1757+16
 	bl	sftl_printk
-.L1704:
+.L1734:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
-	add	r9, r9, #1
+	add	fp, fp, #1
 	strh	r3, [r2, r1]	@ movhi
 	ldr	r3, [r4, #2544]
-	str	r6, [fp, #8]
-	adds	r6, r6, #1
-	str	r3, [fp, #4]
+	str	r7, [r9, #8]
+	adds	r7, r7, #1
+	str	r3, [r9, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r4, #2544]
 	ldr	r3, [sp, #40]
-	str	r3, [fp, #12]
+	str	r3, [r9, #12]
 	ldrh	r3, [r5]
-	strh	r3, [fp, #2]	@ movhi
-	b	.L1686
-.L1740:
-	.align	2
-.L1739:
-	.word	.LANCHOR0
-	.word	.LANCHOR2
-	.word	.LANCHOR3
-	.word	.LANCHOR0+2348
-	.word	.LANCHOR1+574
-	.word	.LC1
-.L1692:
-	cmp	r6, r10
-	add	r3, r3, r7
+	strh	r3, [r9, #2]	@ movhi
+	b	.L1717
+.L1723:
+	cmp	r7, r3
+	ldr	r3, [r4, #3844]
 	ite	eq
-	ldreq	r2, [r4, #3816]
-	ldrne	r2, [r4, #3808]
+	ldreq	r2, [r4, #3820]
+	ldrne	r2, [r4, #3812]
+	add	r3, r3, r8
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #40]
 	adds	r1, r3, #1
-	beq	.L1697
+	beq	.L1728
 	str	r3, [sp, #48]
 	movs	r1, #1
-	ldr	r3, [r4, #3840]
+	ldr	r3, [r4, #3844]
 	add	r0, sp, #44
-	str	r6, [sp, #60]
-	add	r3, r3, r7
+	str	r7, [sp, #60]
+	add	r3, r3, r8
 	ldr	r2, [r3, #8]
 	ldr	r3, [r3, #12]
 	str	r2, [sp, #52]
@@ -11903,129 +12017,413 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1698
+	bne	.L1729
 	ldr	r3, [r4, #2708]
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
-.L1701:
-	ldr	r3, [sp, #16]
-	cmp	r6, r10
-	lsl	r2, r3, #9
-	bne	.L1702
-	ldr	r3, [r4, #3840]
-	ldr	r1, [sp, #4]
-	add	r3, r3, r7
+.L1732:
+	ldr	r3, [sp, #4]
+	lsls	r2, r6, #9
+	cmp	r7, r3
+	bne	.L1733
+	ldr	r3, [r4, #3844]
+	ldr	r1, [sp, #8]
+	add	r3, r3, r8
 	ldr	r0, [r3, #8]
-	ldr	r3, [sp, #24]
+	ldr	r3, [sp, #16]
 	add	r0, r0, r3, lsl #9
-.L1736:
+.L1755:
 	bl	ftl_memcpy
-	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1694
-	ldrh	r3, [r5, #4]
-	cmp	r3, #0
-	beq	.L1694
-	ldr	r3, [r4, #3840]
-	add	r7, r7, r3
-	ldr	r3, .L1741
-	str	r7, [r4, #3988]
-	str	r5, [r3, #-196]
-	b	.L1694
-.L1698:
-	ldr	r3, [fp, #8]
-	cmp	r6, r3
-	beq	.L1700
+	b	.L1725
+.L1758:
+	.align	2
+.L1757:
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR1+574
+	.word	.LC1
+	.word	.LANCHOR0+2348
+.L1729:
+	ldr	r3, [r9, #8]
+	cmp	r7, r3
+	beq	.L1731
 	ldr	r3, [r4, #2708]
-	mov	r2, r6
-	ldr	r0, .L1741+4
+	mov	r2, r7
+	ldr	r0, .L1759
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
-	ldr	r1, [fp, #8]
+	ldr	r1, [r9, #8]
 	bl	sftl_printk
-.L1700:
-	ldr	r3, [fp, #8]
-	cmp	r6, r3
-	beq	.L1701
-	movw	r2, #1098
-	ldr	r1, .L1741+8
-	ldr	r0, .L1741+12
+.L1731:
+	ldr	r3, [r9, #8]
+	cmp	r7, r3
+	beq	.L1732
+	movw	r2, #1077
+	ldr	r1, .L1759+4
+	ldr	r0, .L1759+8
 	bl	sftl_printk
-	b	.L1701
-.L1697:
-	ldr	r3, [r4, #3840]
+	b	.L1732
+.L1728:
+	ldr	r3, [r4, #3844]
 	movs	r1, #0
 	ldrh	r2, [r4, #110]
-	add	r3, r3, r7
+	add	r3, r3, r8
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1701
-.L1702:
+	b	.L1732
+.L1733:
 	ldrh	r1, [r4, #58]
-	ldr	r0, [sp, #4]
-	ldr	r3, [r4, #3840]
-	muls	r1, r6, r1
-	add	r3, r3, r7
-	sub	r1, r1, r8
+	ldr	r0, [sp, #8]
+	ldr	r3, [r4, #3844]
+	muls	r1, r7, r1
+	add	r3, r3, r8
+	sub	r1, r1, r10
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-	b	.L1736
-.L1733:
-	ldr	r3, [r4, #3840]
-	ldr	r2, [sp, #4]
-	add	r7, r7, r3
+	b	.L1755
+.L1752:
+	ldr	r3, [r4, #3844]
+	ldr	r2, [sp, #8]
+	add	r8, r8, r3
 	ldrh	r3, [r4, #58]
-	muls	r3, r6, r3
-	sub	r3, r3, r8
+	muls	r3, r7, r3
+	sub	r3, r3, r10
 	add	r3, r2, r3, lsl #9
-	b	.L1737
-.L1708:
-	mov	r3, r5
-	movs	r2, #0
-	mov	r1, r9
-	ldr	r0, [r4, #3840]
-	bl	FtlProgPages
-	ldr	r3, [sp, #8]
-	cmp	r3, r9
-	bcs	.L1711
-	movw	r2, #1134
-	ldr	r1, .L1741+8
-	ldr	r0, .L1741+12
-	bl	sftl_printk
-.L1711:
-	ldr	r3, [sp, #8]
-	sub	r3, r3, r9
-	str	r3, [sp, #8]
-	b	.L1679
-.L1715:
+	str	r3, [r8, #8]
+	b	.L1725
+.L1740:
+	movw	r5, #65535
+.L1753:
+	ldrh	r3, [r4, #2588]
+	cmp	r3, r5
+	bne	.L1741
+	ldrh	r3, [r4, #3202]
+	cmp	r3, r5
+	bne	.L1741
+	movs	r0, #0
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L1741:
+	movs	r1, #1
+	movs	r3, #128
+	mov	r0, r1
+	strh	r3, [r4, #3150]	@ movhi
+	strh	r3, [r4, #3148]	@ movhi
+	bl	rk_ftl_garbage_collect
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	ldrh	r3, [r4, #2344]
+	cmp	r3, #8
+	bls	.L1753
+	b	.L1742
+.L1743:
 	mov	r0, #-1
-	b	.L1672
-.L1742:
+	b	.L1706
+.L1760:
+	.align	2
+.L1759:
+	.word	.LC114
+	.word	.LANCHOR1+574
+	.word	.LC1
+	.fnend
+	.size	FtlWrite, .-FtlWrite
+	.global	__aeabi_idivmod
+	.align	1
+	.global	sftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_write, %function
+sftl_write:
+	.fnstart
+	@ args = 0, pretend = 0, frame = 112
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+	adds	r4, r0, r1
+	subs	r5, r4, #1
+	.pad #124
+	sub	sp, sp, #124
+	cmp	r5, #63
+	mov	fp, r0
+	str	r1, [sp, #16]
+	str	r2, [sp, #36]
+	ldr	r6, .L1793
+	bls	.L1762
+	cmp	r0, #576
+	bls	.L1763
+.L1762:
+	ldr	r3, [r6, #-172]
+	cmp	r3, #0
+	beq	.L1764
+	ldr	r2, .L1793+4
+	mov	r0, #512
+	ldrh	r3, [r2, #14]
+	str	r3, [sp, #20]
+	ldrh	r3, [r2, #10]
+	ldrb	r1, [sp, #20]	@ zero_extendqisi2
+	smulbb	r3, r3, r1
+	uxth	r3, r3
+	mov	r1, r3
+	str	r3, [sp, #24]
+	bl	__aeabi_uidiv
+	ldr	r2, .L1793+8
+	movs	r3, #0
+	ldr	r1, .L1793+12
+	str	r0, [sp, #12]
+	sub	r4, r2, #262144
+.L1768:
+	ldr	r0, [r2, #-4]
+	cmp	r0, #0
+	beq	.L1765
+.L1769:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	ldr	r2, [sp, #24]
+	ldr	r5, .L1793+4
+	str	r4, [sp, #28]
+	muls	r3, r2, r3
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #32]
+.L1766:
+	mov	r1, #512
+	ldr	r0, .L1793+16
+	bl	__memzero
+	ldrh	r7, [r5, #14]
+	mov	r0, r4
+	ldrh	r6, [r5, #10]
+	mov	r1, r7
+	uxtb	r8, r7
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	smulbb	r6, r6, r3
+	bl	__aeabi_uidiv
+	uxth	r6, r6
+	mov	r1, r0
+	ldr	r3, [r5, #3252]
+	movs	r0, #0
+	blx	r3
+	cmp	r6, #512
+	bcs	.L1770
+	mov	r1, r7
+	adds	r0, r6, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r5, #3252]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1770:
+	mov	r1, r6
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	movs	r6, #0
+	mov	r9, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #44]
+.L1771:
+	cmp	r6, #512
+	bcc	.L1772
+	ldrb	r8, [r5, #14]	@ zero_extendqisi2
+	mov	r0, r4
+	ldrh	r1, [r5, #10]
+	movs	r6, #0
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	smulbb	r1, r1, r3
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mov	r10, r1
+	subs	r3, r4, r1
+	uxth	r0, r10
+	mov	r1, r8
+	str	r3, [sp, #44]
+	bl	__aeabi_idivmod
+	uxth	r7, r1
+.L1773:
+	cmp	r6, #512
+	bcs	.L1777
+	ldr	r3, [sp, #40]
+	mov	r1, r8
+	add	r0, r10, r6
+	sub	r9, r3, r7
+	ldr	r3, .L1793+16
+	uxth	r9, r9
+	add	r2, r3, r6, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #44]
+	uxth	r0, r0
+	mov	r1, r8
+	add	r7, r7, r3
+	mla	r0, r8, r0, r7
+	bl	__aeabi_uidiv
+	ldr	r7, [r5, #3260]
+	mov	r1, r0
+	add	r3, sp, #56
+	ldr	r2, [sp, #52]
+	movs	r0, #0
+	blx	r7
+	adds	r0, r0, #1
+	bne	.L1774
+.L1777:
+	ldr	r1, .L1793+20
+	movs	r6, #0
+.L1775:
+	ldr	r3, .L1793+16
+	mov	r7, r1
+	adds	r1, r1, #4
+	ldr	r2, [r3, r6, lsl #2]
+	ldr	r3, [r7]
+	cmp	r2, r3
+	beq	.L1778
+	mov	r1, #512
+	ldr	r0, .L1793+16
+	bl	__memzero
+	ldr	r2, .L1793+16
+	mov	r1, r4
+	str	r6, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2, r6, lsl #2]
+	ldr	r0, .L1793+24
+	bl	sftl_printk
+	mov	r0, r4
+	ldr	r1, [sp, #20]
+	bl	__aeabi_uidiv
+	ldr	r3, [r5, #3252]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bls	.L1779
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #20]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r5, #3252]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1779:
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	ldr	r2, [sp, #48]
+	add	r4, r4, r2
+	ldr	r2, [sp, #32]
+	cmp	r2, #15
+	bls	.L1785
+.L1784:
+	ldr	r3, .L1793
+	movs	r2, #0
+	str	r2, [r3, #-172]
+.L1764:
+	ldr	r3, [sp, #36]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	movs	r0, #0
+	bl	FtlWrite
+	add	sp, sp, #124
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L1765:
+	ldr	r0, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r0, [r2, #-4]!
+	cmp	r1, r2
+	bne	.L1768
+	b	.L1769
+.L1785:
+	str	r3, [sp, #32]
+	b	.L1766
+.L1772:
+	mov	r1, r8
+	add	r0, r9, r6
+	bl	__aeabi_uidiv
+	uxth	r10, r0
+	mov	r1, r8
+	ldr	r0, [sp, #44]
+	mul	r3, r8, r10
+	str	r3, [sp, #56]
+	movw	r3, #61424
+	str	r3, [sp, #60]
+	ldr	r3, .L1793+20
+	add	r2, r3, r6, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	ldr	r7, [r5, #3256]
+	add	r3, sp, #56
+	add	r1, r0, r10
+	ldr	r2, [sp, #52]
+	movs	r0, #0
+	blx	r7
+	ldr	r3, [sp, #40]
+	add	r6, r6, r3
+	uxth	r6, r6
+	b	.L1771
+.L1774:
+	add	r6, r6, r9
+	movs	r7, #0
+	uxth	r6, r6
+	b	.L1773
+.L1778:
+	adds	r6, r6, #1
+	cmp	r6, #65536
+	bne	.L1775
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #28]
+	bls	.L1779
+	b	.L1784
+.L1763:
+	cmp	r0, #63
+	ldr	r0, .L1793+20
+	bhi	.L1781
+	ldr	r3, [sp, #16]
+	rsb	r1, fp, #64
+	subs	r2, r3, r1
+	ldr	r3, [sp, #36]
+	add	r1, r3, r1, lsl #9
+.L1782:
+	movs	r3, #1
+	cmp	r5, #576
+	str	r3, [r6, #-172]
+	ittt	hi
+	subhi	r2, r2, r4
+	mvnhi	r3, #446
+	addhi	r2, r2, r3
+	lsls	r2, r2, #9
+	bl	memcpy
+	b	.L1764
+.L1781:
+	ldr	r3, .L1793+28
+	ldr	r1, [sp, #36]
+	ldr	r2, [sp, #16]
+	add	r3, r3, fp
+	add	r0, r0, r3, lsl #9
+	b	.L1782
+.L1794:
 	.align	2
-.L1741:
+.L1793:
 	.word	.LANCHOR3
-	.word	.LC109
-	.word	.LANCHOR1+574
-	.word	.LC1
-	.fnend
-	.size	FtlWrite, .-FtlWrite
-	.align	1
-	.global	sftl_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_write, %function
-sftl_write:
-	.fnstart
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	mov	r1, r0
-	movs	r0, #0
-	b	FtlWrite
+	.word	.LANCHOR0
+	.word	idb_buf+262144
+	.word	idb_buf+16388
+	.word	gp_flash_check_buf
+	.word	idb_buf
+	.word	.LC115
+	.word	8388544
 	.fnend
 	.size	sftl_write, .-sftl_write
 	.align	1
@@ -12042,60 +12440,60 @@ FtlLoadSysInfo:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L1765
-	ldr	r3, [r4, #3280]
+	ldr	r4, .L1816
+	ldr	r3, [r4, #3284]
 	ldrh	r2, [r4, #40]
 	ldr	r0, [r4, #2324]
-	str	r3, [r4, #3268]
-	ldr	r3, [r4, #3284]
-	lsls	r2, r2, #1
 	str	r3, [r4, #3272]
+	ldr	r3, [r4, #3288]
+	lsls	r2, r2, #1
+	str	r3, [r4, #3276]
 	bl	ftl_memset
 	ldrh	r0, [r4, #2576]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1745
-.L1753:
+	bne	.L1796
+.L1804:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1745:
-	ldr	r7, .L1765+4
+.L1796:
+	ldr	r7, .L1816+4
 	movs	r1, #1
-	addw	r6, r4, #3260
+	add	r6, r4, #3264
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #2578]	@ movhi
-.L1747:
+.L1798:
 	cmp	r5, #0
-	bge	.L1750
-	movw	r2, #1437
-	ldr	r1, .L1765+8
-	ldr	r0, .L1765+12
+	bge	.L1801
+	movw	r2, #1482
+	ldr	r1, .L1816+8
+	ldr	r0, .L1816+12
 	bl	sftl_printk
-.L1749:
+.L1800:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1752
-	movw	r2, #1439
-	ldr	r1, .L1765+8
-	ldr	r0, .L1765+12
+	bcs	.L1803
+	movw	r2, #1484
+	ldr	r1, .L1816+8
+	ldr	r0, .L1816+12
 	bl	sftl_printk
-.L1752:
+.L1803:
 	movs	r2, #48
-	ldr	r1, [r4, #3268]
-	ldr	r0, .L1765+16
+	ldr	r1, [r4, #3272]
+	ldr	r0, .L1816+16
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
-	ldr	r1, [r4, #3268]
+	ldr	r1, [r4, #3272]
 	ldr	r0, [r4, #2324]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	bl	ftl_memcpy
 	ldrh	r1, [r4, #40]
-	ldr	r3, [r4, #3268]
+	ldr	r3, [r4, #3272]
 	ldr	r0, [r4, #24]
 	lsrs	r2, r1, #3
 	adds	r1, r1, #24
@@ -12105,19 +12503,19 @@ FtlLoadSysInfo:
 	add	r1, r1, r3
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1765+4
+	ldr	r3, .L1816+4
 	cmp	r2, r3
-	bne	.L1753
+	bne	.L1804
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r5, [r4, #2276]
 	cmp	r2, r3
 	strh	r5, [r4, #2582]	@ movhi
-	bne	.L1753
-	ldr	r3, .L1765+20
+	bne	.L1804
+	ldr	r3, .L1816+20
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
-	str	r5, [r3, #-176]
+	str	r5, [r3, #-168]
 	ldrh	r3, [r4, #102]
 	ldrh	r0, [r4, #158]
 	ldrh	r1, [r4, #32]
@@ -12130,12 +12528,12 @@ FtlLoadSysInfo:
 	bl	__aeabi_uidiv
 	cmp	r5, r6
 	strh	r0, [r4, #2572]	@ movhi
-	bls	.L1754
-	movw	r2, #1461
-	ldr	r1, .L1765+8
-	ldr	r0, .L1765+12
+	bls	.L1805
+	movw	r2, #1506
+	ldr	r1, .L1816+8
+	ldr	r0, .L1816+12
 	bl	sftl_printk
-.L1754:
+.L1805:
 	ldrh	r3, [r4, #2284]
 	ldrh	r1, [r4, #2282]
 	lsrs	r2, r3, #6
@@ -12190,62 +12588,62 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L1757
-	ldr	r0, .L1765+24
+	beq	.L1808
+	ldr	r0, .L1816+24
 	bl	make_superblock
-.L1757:
+.L1808:
 	ldrh	r2, [r4, #2396]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1758
-	ldr	r0, .L1765+28
+	beq	.L1809
+	ldr	r0, .L1816+28
 	bl	make_superblock
-.L1758:
+.L1809:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1759
-	ldr	r0, .L1765+32
+	beq	.L1810
+	ldr	r0, .L1816+32
 	bl	make_superblock
-.L1759:
+.L1810:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1760
-	ldr	r0, .L1765+36
+	beq	.L1811
+	ldr	r0, .L1816+36
 	bl	make_superblock
-.L1760:
+.L1811:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1750:
+.L1801:
 	ldrh	r3, [r4, #2576]
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r6
 	orr	r3, r5, r3, lsl #10
-	str	r3, [r4, #3264]
-	ldr	r3, [r4, #3280]
 	str	r3, [r4, #3268]
+	ldr	r3, [r4, #3284]
+	str	r3, [r4, #3272]
 	bl	FlashReadPages
-	ldr	r3, [r4, #3260]
+	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1748
-	ldr	r3, [r4, #3280]
+	beq	.L1799
+	ldr	r3, [r4, #3284]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	bne	.L1748
-	ldr	r3, [r4, #3284]
+	bne	.L1799
+	ldr	r3, [r4, #3288]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1749
-.L1748:
+	beq	.L1800
+.L1799:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1747
-.L1766:
+	b	.L1798
+.L1817:
 	.align	2
-.L1765:
+.L1816:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
@@ -12272,25 +12670,25 @@ FtlSysBlkInit:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1783
+	ldr	r4, .L1842
 	ldrh	r0, [r4, #36]
-	strh	r3, [r4, #4008]	@ movhi
+	strh	r3, [r4, #4016]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	ldrh	r2, [r4, #2576]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1768
-.L1770:
-	mov	r5, #-1
-.L1767:
-	mov	r0, r5
+	bne	.L1819
+.L1821:
+	mov	r6, #-1
+.L1818:
+	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1768:
+.L1819:
 	bl	FtlLoadSysInfo
-	mov	r5, r0
+	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1770
+	bne	.L1821
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12301,27 +12699,23 @@ FtlSysBlkInit:
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
 	ldrh	r1, [r4, #138]
-	mov	r3, r5
+	mov	r3, r6
 	ldr	r2, [r4, #2492]
 	movs	r0, #12
-.L1771:
+.L1822:
 	cmp	r3, r1
-	bge	.L1776
-	mla	r6, r0, r3, r2
-	ldr	r6, [r6, #4]
-	cmp	r6, #0
-	bge	.L1772
-.L1776:
+	bge	.L1827
+	mla	r5, r0, r3, r2
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	bge	.L1823
+.L1827:
 	ldrh	r2, [r4, #2296]
 	cmp	r3, r1
 	add	r2, r2, #1
 	strh	r2, [r4, #2296]	@ movhi
-	bge	.L1782
-.L1773:
-	ldr	r0, .L1783+4
-	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1783+8
-	bl	FtlSuperblockPowerLostFix
+	bge	.L1841
+.L1824:
 	ldrh	r1, [r4, #2348]
 	ldr	r2, [r4, #2324]
 	ldrh	r0, [r4, #2352]
@@ -12335,17 +12729,17 @@ FtlSysBlkInit:
 	movs	r3, #0
 	strb	r3, [r4, #2354]
 	strh	r3, [r4, #2352]	@ movhi
-	ldrh	r6, [r4, #2400]
+	ldrh	r5, [r4, #2400]
 	ldrh	r2, [r1, r0, lsl #1]
-	subs	r2, r2, r6
+	subs	r2, r2, r5
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1783+12
+	ldr	r0, .L1842+4
 	strb	r3, [r4, #2402]
 	strh	r2, [r4, #2398]	@ movhi
 	strh	r3, [r4, #2400]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1783+16
+	ldr	r0, .L1842+8
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r4, #2298]
 	adds	r3, r3, #1
@@ -12353,44 +12747,88 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1777
-.L1772:
+	b	.L1828
+.L1823:
 	adds	r3, r3, #1
-	b	.L1771
-.L1782:
-	ldrh	r3, [r4, #4008]
+	b	.L1822
+.L1841:
+	ldrh	r3, [r4, #4016]
 	cmp	r3, #0
-	bne	.L1773
-.L1777:
+	bne	.L1824
+.L1828:
+	ldrh	r5, [r4, #2312]
+	movw	r2, #65533
+	subs	r3, r5, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bhi	.L1830
+	mov	r1, r5
+	ldr	r0, .L1842+12
+	strh	r5, [r4, #3202]	@ movhi
+	bl	test_node_in_list
+	cbnz	r0, .L1831
+	ldrh	r3, [r4, #40]
+	cmp	r3, r5
+	bls	.L1831
+	ldr	r3, [r4, #2324]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbnz	r3, .L1830
+.L1831:
+	movw	r3, #65535
+	strh	r3, [r4, #3202]	@ movhi
+.L1830:
+	ldrh	r5, [r4, #2314]
+	movw	r2, #65533
+	subs	r3, r5, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bhi	.L1834
+	mov	r1, r5
+	ldr	r0, .L1842+12
+	strh	r5, [r4, #3204]	@ movhi
+	bl	test_node_in_list
+	cbnz	r0, .L1835
+	ldrh	r3, [r4, #40]
+	cmp	r3, r5
+	bls	.L1835
+	ldr	r3, [r4, #2324]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbnz	r3, .L1834
+.L1835:
+	movw	r3, #65535
+	strh	r3, [r4, #3204]	@ movhi
+.L1834:
 	ldrh	r0, [r4, #2348]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1778
+	beq	.L1837
 	ldrh	r3, [r4, #2352]
-	cbnz	r3, .L1778
+	cbnz	r3, .L1837
 	ldrh	r3, [r4, #2400]
-	cbnz	r3, .L1778
+	cbnz	r3, .L1837
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r4, #2396]
 	bl	FtlGcRefreshBlock
-	ldr	r0, .L1783+4
+	bl	FtlVpcTblFlush
+	ldr	r0, .L1842+16
 	bl	allocate_new_data_superblock
-	ldr	r0, .L1783+8
+	ldr	r0, .L1842+20
 	bl	allocate_new_data_superblock
-.L1778:
+.L1837:
 	ldrh	r3, [r4, #2296]
 	lsls	r3, r3, #27
-	bne	.L1767
+	bne	.L1818
 	bl	FtlVpcCheckAndModify
-	b	.L1767
-.L1784:
+	b	.L1818
+.L1843:
 	.align	2
-.L1783:
+.L1842:
 	.word	.LANCHOR0
+	.word	.LANCHOR0+3908
+	.word	.LANCHOR0+3956
+	.word	.LANCHOR0+2340
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0+2396
-	.word	.LANCHOR0+3904
-	.word	.LANCHOR0+3948
 	.fnend
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	1
@@ -12407,46 +12845,46 @@ ftl_low_format:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	movs	r3, #0
-	ldr	r4, .L1809
+	ldr	r4, .L1868
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
 	str	r3, [r4, #2544]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1786
+	cbz	r0, .L1845
 	bl	FtlMakeBbt
-.L1786:
-	ldr	r0, .L1809+4
+.L1845:
+	ldr	r0, .L1868+4
 	movs	r2, #0
-.L1787:
+.L1846:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1788
+	blt	.L1847
 	ldrh	r6, [r4, #40]
 	movs	r5, #0
-.L1789:
+.L1848:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1790
+	bhi	.L1849
 	ldrh	r1, [r4, #32]
 	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1791
-.L1795:
+	bge	.L1850
+.L1854:
 	movs	r5, #0
 	mov	r6, r5
-.L1792:
+.L1851:
 	ldrh	r3, [r4, #40]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1796
+	bhi	.L1855
 	ldrh	r3, [r4, #42]
 	ldrh	r5, [r4, #32]
 	ldr	r9, [r4, #44]
-	str	r3, [r4, #3804]
+	str	r3, [r4, #3808]
 	mov	r1, r5
 	mov	r0, r9
 	bl	__aeabi_uidiv
@@ -12458,7 +12896,7 @@ ftl_low_format:
 	movs	r3, #24
 	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1797
+	ble	.L1856
 	mov	r1, r5
 	sub	r0, r9, r6
 	bl	__aeabi_uidiv
@@ -12466,9 +12904,9 @@ ftl_low_format:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r4, #2572]	@ movhi
-.L1797:
+.L1856:
 	ldrh	r3, [r4, #94]
-	cbz	r3, .L1799
+	cbz	r3, .L1858
 	ldrh	r2, [r4, #2572]
 	add	r2, r2, r3, lsr #1
 	strh	r2, [r4, #2572]	@ movhi
@@ -12479,15 +12917,15 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r3, r7
 	strhlt	r3, [r4, #2572]	@ movhi
-.L1799:
+.L1858:
 	ldrh	r2, [r4, #2572]
 	movw	r6, #65535
 	ldr	r3, [r4, #2504]
-	ldr	r7, .L1809+8
+	ldr	r7, .L1868+8
 	subs	r3, r3, r2
 	muls	r5, r3, r5
 	ldrh	r3, [r4, #102]
-	str	r5, [r7, #-176]
+	str	r5, [r7, #-168]
 	muls	r5, r3, r5
 	ldrh	r3, [r4, #58]
 	str	r5, [r4, #2504]
@@ -12498,7 +12936,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	movs	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r7, .L1809+12
+	ldr	r7, .L1868+12
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r2, [r4, #40]
@@ -12517,28 +12955,28 @@ ftl_low_format:
 	strh	r6, [r4, #2588]	@ movhi
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1801:
+.L1860:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2348]
 	cmp	r3, #0
-	bne	.L1802
+	bne	.L1861
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2348]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2348]	@ movhi
-	b	.L1801
-.L1788:
-	ldr	r5, [r4, #3816]
+	b	.L1860
+.L1847:
+	ldr	r5, [r4, #3820]
 	mvns	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [r5, r3, lsl #2]
-	ldr	r1, [r4, #3808]
+	ldr	r1, [r4, #3812]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1787
-.L1790:
+	b	.L1846
+.L1849:
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12546,8 +12984,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1789
-.L1791:
+	b	.L1848
+.L1850:
 	mov	r0, r5
 	bl	__aeabi_uidiv
 	ldr	r3, [r4, #132]
@@ -12557,27 +12995,27 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1793:
+.L1852:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1795
+	bls	.L1854
 	mov	r0, r5
 	movs	r1, #1
 	adds	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1793
-.L1796:
+	b	.L1852
+.L1855:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L1792
-.L1802:
+	b	.L1851
+.L1861:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2352]
-	ldr	r7, .L1809+16
+	ldr	r7, .L1868+16
 	str	r3, [r4, #2360]
 	adds	r3, r3, #1
 	str	r3, [r4, #2540]
@@ -12591,19 +13029,19 @@ ftl_low_format:
 	strh	r3, [r4, #2396]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #2404]
-.L1803:
+.L1862:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2396]
-	cbnz	r3, .L1804
+	cbnz	r3, .L1863
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2396]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2396]	@ movhi
-	b	.L1803
-.L1804:
+	b	.L1862
+.L1863:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2400]
@@ -12617,7 +13055,7 @@ ftl_low_format:
 	movs	r3, #0
 	strh	r0, [r4, #2576]	@ movhi
 	strh	r3, [r4, #2578]	@ movhi
-	ldr	r3, [r5, #-176]
+	ldr	r3, [r5, #-168]
 	strh	r6, [r4, #2580]	@ movhi
 	strh	r3, [r4, #2582]	@ movhi
 	ldr	r3, [r4, #2540]
@@ -12626,16 +13064,16 @@ ftl_low_format:
 	str	r3, [r4, #2540]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1805
-	ldr	r3, .L1809+20
+	cbnz	r0, .L1864
+	ldr	r3, .L1868+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1805:
+.L1864:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1810:
+.L1869:
 	.align	2
-.L1809:
+.L1868:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -12658,10 +13096,10 @@ sftl_init:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L1817
-	ldr	r5, .L1817+4
-	ldr	r1, .L1817+8
-	ldr	r0, .L1817+12
+	ldr	r4, .L1876
+	ldr	r5, .L1876+4
+	ldr	r1, .L1876+8
+	ldr	r0, .L1876+12
 	str	r3, [r5]
 	bl	sftl_printk
 	mov	r0, r4
@@ -12671,27 +13109,27 @@ sftl_init:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1815
+	cbnz	r0, .L1874
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1815
+	cbnz	r0, .L1874
 	movs	r3, #1
 	str	r3, [r5]
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1815
+	bhi	.L1874
 	movw	r4, #8129
-.L1814:
+.L1873:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1814
-.L1815:
+	bne	.L1873
+.L1874:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1818:
+.L1877:
 	.align	2
-.L1817:
+.L1876:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -12725,19 +13163,19 @@ rk_sftl_vendor_dev_ops_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1823
-	ldr	r3, [r2, #-172]
-	cbnz	r3, .L1822
-	str	r0, [r2, #-172]
+	ldr	r2, .L1882
+	ldr	r3, [r2, #-164]
+	cbnz	r3, .L1881
+	str	r0, [r2, #-164]
 	mov	r0, r3
-	str	r1, [r2, #-168]
+	str	r1, [r2, #-160]
 	bx	lr
-.L1822:
+.L1881:
 	mov	r0, #-1
 	bx	lr
-.L1824:
+.L1883:
 	.align	2
-.L1823:
+.L1882:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -12755,59 +13193,59 @@ rk_sftl_vendor_storage_init:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	mov	r0, #65536
-	ldr	r4, .L1833
+	ldr	r4, .L1892
 	bl	ftl_malloc
-	str	r0, [r4, #-164]
+	str	r0, [r4, #-156]
 	cmp	r0, #0
-	beq	.L1831
-	ldr	r8, .L1833+4
+	beq	.L1890
+	ldr	r8, .L1892+4
 	mov	r9, #0
 	mov	r7, r9
 	mov	r6, r9
-.L1829:
-	ldr	r3, [r4, #-172]
+.L1888:
+	ldr	r3, [r4, #-164]
 	movs	r1, #128
-	ldr	r2, [r4, #-164]
+	ldr	r2, [r4, #-156]
 	lsls	r0, r6, #7
 	blx	r3
 	mov	r5, r0
-	cbnz	r0, .L1827
-	ldr	r2, [r4, #-164]
+	cbnz	r0, .L1886
+	ldr	r2, [r4, #-156]
 	ldr	r3, [r2]
 	cmp	r3, r8
-	bne	.L1828
+	bne	.L1887
 	movw	r3, #65532
 	ldr	r1, [r2, r3]
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1828
+	bne	.L1887
 	cmp	r1, r7
 	itt	hi
 	movhi	r9, r6
 	movhi	r7, r1
-.L1828:
+.L1887:
 	adds	r6, r6, #1
 	cmp	r6, #2
-	bne	.L1829
-	cbz	r7, .L1830
-	ldr	r3, [r4, #-172]
+	bne	.L1888
+	cbz	r7, .L1889
+	ldr	r3, [r4, #-164]
 	movs	r1, #128
 	lsl	r0, r9, #7
 	blx	r3
 	mov	r5, r0
-	cbz	r0, .L1825
-.L1827:
-	ldr	r0, [r4, #-164]
+	cbz	r0, .L1884
+.L1886:
+	ldr	r0, [r4, #-156]
 	mov	r5, #-1
 	bl	kfree
 	movs	r3, #0
-	str	r3, [r4, #-164]
-	b	.L1825
-.L1830:
+	str	r3, [r4, #-156]
+	b	.L1884
+.L1889:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
-	ldr	r3, [r4, #-164]
+	ldr	r3, [r4, #-156]
 	movs	r2, #1
 	movw	r1, #65532
 	str	r2, [r3, #4]
@@ -12816,15 +13254,15 @@ rk_sftl_vendor_storage_init:
 	movw	r2, #64504
 	strh	r7, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1825:
+.L1884:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1831:
+.L1890:
 	mvn	r5, #11
-	b	.L1825
-.L1834:
+	b	.L1884
+.L1893:
 	.align	2
-.L1833:
+.L1892:
 	.word	.LANCHOR3
 	.word	1380668996
 	.fnend
@@ -12843,23 +13281,23 @@ rk_sftl_vendor_read:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r3, .L1841
+	ldr	r3, .L1900
 	mov	r0, r1
-	ldr	r5, [r3, #-164]
-	cbz	r5, .L1840
+	ldr	r5, [r3, #-156]
+	cbz	r5, .L1899
 	ldrh	r6, [r5, #10]
 	movs	r3, #0
-.L1837:
+.L1896:
 	cmp	r3, r6
-	bcc	.L1839
-.L1840:
+	bcc	.L1898
+.L1899:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1839:
+.L1898:
 	add	r1, r5, r3, lsl #3
 	ldrh	r4, [r1, #16]
 	cmp	r4, r7
-	bne	.L1838
+	bne	.L1897
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -12871,12 +13309,12 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1838:
+.L1897:
 	adds	r3, r3, #1
-	b	.L1837
-.L1842:
+	b	.L1896
+.L1901:
 	.align	2
-.L1841:
+.L1900:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
@@ -12894,26 +13332,26 @@ rk_sftl_vendor_write:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r2
-	ldr	r2, .L1862
+	ldr	r2, .L1921
 	.pad #28
 	sub	sp, sp, #28
 	mov	r3, r1
-	ldr	r4, [r2, #-164]
+	ldr	r4, [r2, #-156]
 	mov	r9, r2
 	cmp	r4, #0
-	beq	.L1858
+	beq	.L1917
 	ldrh	r2, [r4, #10]
 	add	r6, r8, #63
 	ldrh	r1, [r4, #8]
 	bic	r6, r6, #63
 	movs	r7, #0
 	str	r1, [sp, #4]
-.L1845:
+.L1904:
 	cmp	r7, r2
-	bcc	.L1853
+	bcc	.L1912
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1858
+	bhi	.L1917
 	add	r2, r4, r2, lsl #3
 	uxth	r6, r6
 	strh	r0, [r2, #16]	@ movhi
@@ -12945,32 +13383,32 @@ rk_sftl_vendor_write:
 	it	hi
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, [r9, #-168]
-	b	.L1861
-.L1853:
+	ldr	r3, [r9, #-160]
+	b	.L1920
+.L1912:
 	add	r5, r4, r7, lsl #3
 	ldrh	r1, [r5, #16]
 	cmp	r1, r0
 	str	r1, [sp, #8]
-	bne	.L1846
+	bne	.L1905
 	ldrh	r1, [r5, #20]
 	add	fp, r4, #1024
 	adds	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r8, r1
 	str	r1, [sp, #12]
-	bls	.L1847
+	bls	.L1906
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1858
+	bhi	.L1917
 	ldrh	r10, [r5, #18]
 	subs	r2, r2, #1
 	str	r2, [sp, #16]
-.L1848:
+.L1907:
 	ldr	r2, [sp, #16]
 	adds	r5, r5, #8
 	cmp	r7, r2
-	bcc	.L1849
+	bcc	.L1908
 	ldrh	r2, [sp, #8]
 	add	r7, r4, r7, lsl #3
 	uxth	r5, r10
@@ -12989,7 +13427,7 @@ rk_sftl_vendor_write:
 	strh	r5, [r4, #12]	@ movhi
 	add	r6, r6, r3
 	strh	r6, [r4, #14]	@ movhi
-.L1850:
+.L1909:
 	ldr	r3, [r4, #4]
 	movw	r2, #65532
 	adds	r3, r3, #1
@@ -13002,20 +13440,20 @@ rk_sftl_vendor_write:
 	it	hi
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1862
-	ldr	r3, [r3, #-168]
-.L1861:
+	ldr	r3, .L1921
+	ldr	r3, [r3, #-160]
+.L1920:
 	ldr	r0, [sp, #4]
 	mov	r2, r4
 	movs	r1, #128
 	lsls	r0, r0, #7
 	blx	r3
 	movs	r0, #0
-.L1843:
+.L1902:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1849:
+.L1908:
 	ldrh	r9, [r5, #20]
 	add	r0, fp, r10
 	ldrh	r2, [r5, #16]
@@ -13032,24 +13470,24 @@ rk_sftl_vendor_write:
 	add	r10, r10, r9
 	bl	memcpy
 	ldr	r3, [sp, #20]
-	b	.L1848
-.L1847:
+	b	.L1907
+.L1906:
 	ldrh	r0, [r5, #18]
 	mov	r2, r8
 	mov	r1, r3
 	add	r0, r0, fp
 	bl	memcpy
 	strh	r8, [r5, #20]	@ movhi
-	b	.L1850
-.L1846:
+	b	.L1909
+.L1905:
 	adds	r7, r7, #1
-	b	.L1845
-.L1858:
+	b	.L1904
+.L1917:
 	mov	r0, #-1
-	b	.L1843
-.L1863:
+	b	.L1902
+.L1922:
 	.align	2
-.L1862:
+.L1921:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
@@ -13072,18 +13510,18 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	mov	r4, r0
 	cmp	r0, #0
-	beq	.L1878
-	ldr	r3, .L1890
+	beq	.L1937
+	ldr	r3, .L1949
 	cmp	r6, r3
-	beq	.L1867
+	beq	.L1926
 	adds	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1868
-.L1889:
+	beq	.L1927
+.L1948:
 	mvn	r5, #13
-	b	.L1866
-.L1867:
-	ldr	r6, .L1890+4
+	b	.L1925
+.L1926:
+	ldr	r6, .L1949+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13094,31 +13532,31 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1874
+	bne	.L1933
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1889
+	bne	.L1948
 	ldr	r2, [r4]
-	ldr	r3, .L1890+8
+	ldr	r3, .L1949+8
 	cmp	r2, r3
-	beq	.L1872
-.L1873:
+	beq	.L1931
+.L1932:
 	mov	r5, #-1
-.L1866:
+.L1925:
 	mov	r0, r4
 	bl	kfree
-.L1864:
+.L1923:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1872:
+.L1931:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	adds	r3, r0, #1
-	beq	.L1873
+	beq	.L1932
 	mov	r3, sp
 	uxth	r2, r0
 	ands	r6, r6, r3
@@ -13132,17 +13570,17 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1889
+	bne	.L1948
 	mov	r1, r4
 	mov	r0, r5
 	bl	arm_copy_to_user
 	cmp	r0, #0
-	bne	.L1889
-.L1880:
+	bne	.L1948
+.L1939:
 	mov	r5, r0
-	b	.L1866
-.L1868:
-	ldr	r6, .L1890+4
+	b	.L1925
+.L1927:
+	ldr	r6, .L1949+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13152,20 +13590,20 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1874
+	cbnz	r3, .L1933
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1889
+	bne	.L1948
 	ldr	r2, [r4]
-	ldr	r3, .L1890+8
+	ldr	r3, .L1949+8
 	cmp	r2, r3
-	bne	.L1873
+	bne	.L1932
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1873
+	bhi	.L1932
 	mov	r3, sp
 	adds	r2, r2, #8
 	ands	r6, r6, r3
@@ -13176,32 +13614,32 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1876
+	cbnz	r3, .L1935
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1889
+	bne	.L1948
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
-	b	.L1880
-.L1874:
+	b	.L1939
+.L1933:
 	movs	r1, #8
-.L1888:
+.L1947:
 	bl	__memzero
-	b	.L1889
-.L1876:
+	b	.L1948
+.L1935:
 	mov	r1, r2
 	mov	r0, r4
-	b	.L1888
-.L1878:
+	b	.L1947
+.L1937:
 	mov	r5, #-1
-	b	.L1864
-.L1891:
+	b	.L1923
+.L1950:
 	.align	2
-.L1890:
+.L1949:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13219,11 +13657,11 @@ rk_sftl_vendor_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1893
+	ldr	r0, .L1952
 	b	misc_register
-.L1894:
+.L1953:
 	.align	2
-.L1893:
+.L1952:
 	.word	.LANCHOR2+12
 	.fnend
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
@@ -13270,6 +13708,8 @@ rk_sftl_vendor_register:
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
 	.global	g_gc_next_blk_1
 	.global	g_gc_next_blk
 	.global	g_gc_cur_blk_max_valid_pages
@@ -13325,7 +13765,6 @@ rk_sftl_vendor_register:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -13378,141 +13817,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6668, %object
-	.size	__func__.6668, 17
-__func__.6668:
+	.type	__func__.6748, %object
+	.size	__func__.6748, 17
+__func__.6748:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6663, %object
-	.size	__func__.6663, 17
-__func__.6663:
+	.type	__func__.6743, %object
+	.size	__func__.6743, 17
+__func__.6743:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6699, %object
-	.size	__func__.6699, 17
-__func__.6699:
+	.type	__func__.6786, %object
+	.size	__func__.6786, 17
+__func__.6786:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6731, %object
-	.size	__func__.6731, 22
-__func__.6731:
+	.type	__func__.6818, %object
+	.size	__func__.6818, 22
+__func__.6818:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6837, %object
-	.size	__func__.6837, 22
-__func__.6837:
+	.type	__func__.6929, %object
+	.size	__func__.6929, 22
+__func__.6929:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7160, %object
-	.size	__func__.7160, 16
-__func__.7160:
+	.type	__func__.7252, %object
+	.size	__func__.7252, 16
+__func__.7252:
 	.ascii	"make_superblock\000"
-	.type	__func__.7335, %object
-	.size	__func__.7335, 19
-__func__.7335:
+	.type	__func__.7427, %object
+	.size	__func__.7427, 19
+__func__.7427:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.17672, %object
-	.size	__func__.17672, 15
-__func__.17672:
+	.type	__func__.17765, %object
+	.size	__func__.17765, 15
+__func__.17765:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.17689, %object
-	.size	__func__.17689, 15
-__func__.17689:
+	.type	__func__.17782, %object
+	.size	__func__.17782, 15
+__func__.17782:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6773, %object
-	.size	__func__.6773, 26
-__func__.6773:
+	.type	__func__.6860, %object
+	.size	__func__.6860, 26
+__func__.6860:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6277, %object
-	.size	__func__.6277, 11
-__func__.6277:
+	.type	__func__.6279, %object
+	.size	__func__.6279, 11
+__func__.6279:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6503, %object
-	.size	__func__.6503, 14
-__func__.6503:
+	.type	__func__.6583, %object
+	.size	__func__.6583, 14
+__func__.6583:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6740, %object
-	.size	__func__.6740, 16
-__func__.6740:
-	.ascii	"load_l2p_region\000"
-	.type	__func__.6798, %object
-	.size	__func__.6798, 31
-__func__.6798:
+	.type	__func__.6890, %object
+	.size	__func__.6890, 31
+__func__.6890:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6812, %object
-	.size	__func__.6812, 16
-__func__.6812:
+	.type	__func__.6904, %object
+	.size	__func__.6904, 16
+__func__.6904:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6784, %object
-	.size	__func__.6784, 15
-__func__.6784:
+	.type	__func__.6827, %object
+	.size	__func__.6827, 16
+__func__.6827:
+	.ascii	"load_l2p_region\000"
+	.type	__func__.6875, %object
+	.size	__func__.6875, 15
+__func__.6875:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6854, %object
-	.size	__func__.6854, 9
-__func__.6854:
+	.type	__func__.6946, %object
+	.size	__func__.6946, 9
+__func__.6946:
 	.ascii	"log2phys\000"
-	.type	__func__.7069, %object
-	.size	__func__.7069, 16
-__func__.7069:
+	.type	__func__.7161, %object
+	.size	__func__.7161, 16
+__func__.7161:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7222, %object
-	.size	__func__.7222, 14
-__func__.7222:
+	.type	__func__.7314, %object
+	.size	__func__.7314, 14
+__func__.7314:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.6949, %object
-	.size	__func__.6949, 14
-__func__.6949:
+	.type	__func__.7041, %object
+	.size	__func__.7041, 14
+__func__.7041:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7181, %object
-	.size	__func__.7181, 18
-__func__.7181:
+	.type	__func__.7273, %object
+	.size	__func__.7273, 18
+__func__.7273:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7307, %object
-	.size	__func__.7307, 25
-__func__.7307:
+	.type	__func__.7399, %object
+	.size	__func__.7399, 25
+__func__.7399:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7348, %object
-	.size	__func__.7348, 16
-__func__.7348:
+	.type	__func__.7440, %object
+	.size	__func__.7440, 16
+__func__.7440:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7355, %object
-	.size	__func__.7355, 20
-__func__.7355:
+	.type	__func__.7447, %object
+	.size	__func__.7447, 20
+__func__.7447:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7103, %object
-	.size	__func__.7103, 22
-__func__.7103:
+	.type	__func__.7195, %object
+	.size	__func__.7195, 22
+__func__.7195:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6546, %object
-	.size	__func__.6546, 11
-__func__.6546:
+	.type	__func__.6626, %object
+	.size	__func__.6626, 11
+__func__.6626:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.6927, %object
-	.size	__func__.6927, 15
-__func__.6927:
+	.type	__func__.7019, %object
+	.size	__func__.7019, 15
+__func__.7019:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7206, %object
-	.size	__func__.7206, 21
-__func__.7206:
+	.type	__func__.7298, %object
+	.size	__func__.7298, 21
+__func__.7298:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7328, %object
-	.size	__func__.7328, 29
-__func__.7328:
+	.type	__func__.7420, %object
+	.size	__func__.7420, 29
+__func__.7420:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6401, %object
-	.size	__func__.6401, 13
-__func__.6401:
+	.type	__func__.6403, %object
+	.size	__func__.6403, 13
+__func__.6403:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7425, %object
-	.size	__func__.7425, 19
-__func__.7425:
+	.type	__func__.7518, %object
+	.size	__func__.7518, 19
+__func__.7518:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7531, %object
-	.size	__func__.7531, 23
-__func__.7531:
+	.type	__func__.7624, %object
+	.size	__func__.7624, 23
+__func__.7624:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6429, %object
-	.size	__func__.6429, 9
-__func__.6429:
+	.type	__func__.6431, %object
+	.size	__func__.6431, 9
+__func__.6431:
 	.ascii	"FtlWrite\000"
-	.type	__func__.7006, %object
-	.size	__func__.7006, 15
-__func__.7006:
+	.type	__func__.7098, %object
+	.size	__func__.7098, 15
+__func__.7098:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -13542,7 +13981,7 @@ power_up_flag:
 	.size	rkflash_vender_storage_dev, 40
 rkflash_vender_storage_dev:
 	.word	255
-	.word	.LC110
+	.word	.LC116
 	.word	rk_sftl_vendor_storage_fops
 	.space	28
 	.bss
@@ -13928,6 +14367,14 @@ g_gc_next_blk:
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
+	.space	2
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.space	2
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
 	.space	2
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
@@ -14068,22 +14515,18 @@ c_ftl_nand_bbm_buf_size:
 	.space	2
 	.space	2
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.space	2
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
+	.space	44
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -14119,10 +14562,6 @@ g_recovery_ppa_tbl:
 g_ect_tbl_power_up_flush:
 	.space	2
 	.space	2
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
-	.space	4
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -14143,6 +14582,10 @@ g_gc_cur_blk_max_valid_pages:
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
+	.space	4
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
 	.space	4
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
@@ -14172,6 +14615,18 @@ check_buf:
 	.size	check_vpc_table, 16384
 check_vpc_table:
 	.space	16384
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
@@ -14315,7 +14770,7 @@ check_vpc_table:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 .LC70:
-	.ascii	"SFTL version: 5.0.44 20180713\000"
+	.ascii	"SFTL version: 5.0.45 20180810\000"
 .LC71:
 	.ascii	"%s\012\000"
 .LC72:
@@ -14351,52 +14806,63 @@ check_vpc_table:
 .LC86:
 	.ascii	"%s error allocating memory. return -1\012\000"
 .LC87:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC88:
-	.ascii	"spare:\000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC89:
-	.ascii	"map_ppn:\000"
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 .LC90:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC91:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"spare:\000"
 .LC92:
-	.ascii	"ftl_scan_all_data = %x\012\000"
+	.ascii	"map_ppn:\000"
 .LC93:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
 .LC94:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC95:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC96:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC95:
+.LC97:
 	.ascii	"...%s enter...\012\000"
-.LC96:
+.LC98:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC97:
+.LC99:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
-.LC98:
+.LC100:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC99:
+.LC101:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC100:
+.LC102:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC101:
+.LC103:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-.LC102:
+.LC104:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC103:
+.LC105:
+	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
+.LC106:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC104:
+.LC107:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+.LC108:
 	.ascii	"no ect\000"
-.LC105:
+.LC109:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC106:
+.LC110:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
-.LC107:
+.LC111:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC108:
+.LC112:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
-.LC109:
+.LC113:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+.LC114:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC110:
+.LC115:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC116:
 	.ascii	"vendor_storage\000"
-
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index e8896074a6c0b..2267cc9400a79 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-07
+ * date: 2018-08-14
  */
 	.arch armv8-a
 	.file	"rk_sftl.c"
@@ -271,6 +271,13 @@ IsBlkInVendorPart:
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	mov	w0, 0
+	ret
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
@@ -351,23 +358,23 @@ FtlBbtCalcTotleCnt:
 	ldrh	w0, [x0, 58]
 	mul	w6, w6, w0
 	cmp	w4, w6
-	blt	.L42
+	blt	.L43
 	mov	w0, w5
 	ret
-.L42:
+.L43:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L35:
+.L36:
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
-	cbz	w0, .L34
+	cbz	w0, .L35
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L34:
+.L35:
 	add	w4, w4, 1
 	and	w4, w4, 65535
 	cmp	w4, w6
-	blt	.L35
+	blt	.L36
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
 	ret
@@ -424,12 +431,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L47
+	bls	.L48
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L47:
+.L48:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -463,23 +470,23 @@ FtlFreeSysBLkSort:
 	add	x2, x0, :lo12:.LANCHOR0
 	add	x1, x2, 256
 	ldrh	w3, [x1, 6]
-	cbz	w3, .L51
+	cbz	w3, .L52
 	ldrh	w5, [x2, 2340]
 	mov	w6, 0
 	ldrh	w3, [x1, 2]
 	mov	w4, 0
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L53:
+.L54:
 	cmp	w5, w4
-	bgt	.L54
-	cbz	w6, .L51
+	bgt	.L55
+	cbz	w6, .L52
 	add	x0, x0, :lo12:.LANCHOR0
 	strh	w3, [x0, 258]
 	strh	w2, [x0, 260]
-.L51:
+.L52:
 	ret
-.L54:
+.L55:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -491,7 +498,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L53
+	b	.L54
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.align	2
 	.global	IsInFreeQueue
@@ -503,29 +510,60 @@ IsInFreeQueue:
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L64
+	beq	.L65
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L62:
+.L63:
 	cmp	w3, w4
-	bcc	.L63
-.L64:
+	bcc	.L64
+.L65:
 	mov	w0, 0
 	ret
-.L63:
+.L64:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L65
+	beq	.L66
 	add	w3, w3, 1
-	b	.L62
-.L65:
+	b	.L63
+.L66:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.align	2
+	.global	test_node_in_list
+	.type	test_node_in_list, %function
+test_node_in_list:
+	ldr	x2, [x0]
+	adrp	x0, .LANCHOR0+2360
+	mov	x4, -6148914691236517206
+	and	w1, w1, 65535
+	ldr	x3, [x0, #:lo12:.LANCHOR0+2360]
+	movk	x4, 0xaaab, lsl 0
+	mov	w5, 65535
+	sub	x0, x2, x3
+	asr	x0, x0, 1
+	mul	x0, x0, x4
+	mov	w4, 6
+	and	w0, w0, 65535
+.L69:
+	cmp	w0, w1
+	beq	.L70
+	ldrh	w0, [x2]
+	cmp	w0, w5
+	beq	.L71
+	umaddl	x2, w0, w4, x3
+	b	.L69
+.L70:
+	mov	w0, 1
+	ret
+.L71:
+	mov	w0, 0
+	ret
+	.size	test_node_in_list, .-test_node_in_list
+	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
@@ -534,7 +572,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w1, [x3, 44]
 	cmp	w1, w0
-	bls	.L82
+	bls	.L88
 	mov	w7, 6
 	ldr	x12, [x3, 2360]
 	mov	w1, -1
@@ -543,12 +581,12 @@ insert_data_list:
 	strh	w1, [x5, 2]
 	strh	w1, [x12, x11]
 	ldr	x1, [x3, 2368]
-	cbnz	x1, .L69
+	cbnz	x1, .L75
 	str	x5, [x3, 2368]
-.L82:
+.L88:
 	mov	w0, 0
 	ret
-.L69:
+.L75:
 	stp	x29, x30, [sp, -16]!
 	ubfiz	x8, x0, 1, 16
 	mov	x4, x2
@@ -573,13 +611,13 @@ insert_data_list:
 	add	x9, x15, x8
 	mov	w8, w7
 	and	w2, w2, 65535
-.L77:
+.L83:
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	cmp	w3, w18
-	bhi	.L68
+	bhi	.L74
 	cmp	w0, w2
-	beq	.L68
+	beq	.L74
 	ubfiz	x16, x2, 1, 16
 	ldrh	w17, [x1, 4]
 	cmp	w17, 0
@@ -587,48 +625,48 @@ insert_data_list:
 	mul	w7, w7, w17
 	csel	w7, w7, w10, ne
 	cmp	w6, w7
-	bne	.L73
+	bne	.L79
 	ldrh	w16, [x15, x16]
 	ldrh	w7, [x9]
 	cmp	w16, w7
-	bcc	.L75
-.L74:
+	bcc	.L81
+.L80:
 	strh	w2, [x12, x11]
 	ldrh	w2, [x1, 2]
 	strh	w2, [x5, 2]
 	add	x2, x4, :lo12:.LANCHOR0
 	ldr	x3, [x2, 2368]
 	cmp	x1, x3
-	bne	.L78
+	bne	.L84
 	strh	w0, [x1, 2]
 	str	x5, [x2, 2368]
-	b	.L68
-.L73:
-	bcc	.L74
-.L75:
+	b	.L74
+.L79:
+	bcc	.L80
+.L81:
 	ldrh	w7, [x1]
 	cmp	w7, w30
-	bne	.L76
+	bne	.L82
 	strh	w2, [x5, 2]
 	add	x2, x4, :lo12:.LANCHOR0
 	strh	w0, [x1]
 	str	x5, [x2, 2392]
-.L68:
+.L74:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L76:
+.L82:
 	umaddl	x1, w7, w8, x13
 	mov	w2, w7
-	b	.L77
-.L78:
+	b	.L83
+.L84:
 	ldrh	w3, [x1, 2]
 	mov	w4, 6
 	ldr	x2, [x2, 2360]
 	umull	x3, w3, w4
 	strh	w0, [x2, x3]
 	strh	w0, [x1, 2]
-	b	.L68
+	b	.L74
 	.size	insert_data_list, .-insert_data_list
 	.align	2
 	.global	INSERT_DATA_LIST
@@ -645,14 +683,14 @@ INSERT_DATA_LIST:
 	strh	w0, [x1, 2400]
 	ldrh	w1, [x1, 44]
 	cmp	w1, w0
-	bcs	.L84
+	bcs	.L90
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 221
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L84:
+.L90:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -663,7 +701,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L88
+	beq	.L94
 	adrp	x2, .LANCHOR0
 	add	x5, x2, :lo12:.LANCHOR0
 	mov	w6, 6
@@ -675,12 +713,12 @@ insert_free_list:
 	strh	w1, [x4, 2]
 	strh	w1, [x9, x8]
 	ldr	x1, [x5, 2408]
-	cbnz	x1, .L89
+	cbnz	x1, .L95
 	str	x4, [x5, 2408]
-.L88:
+.L94:
 	mov	w0, 0
 	ret
-.L89:
+.L95:
 	ldr	x11, [x5, 2384]
 	ubfiz	x2, x0, 1, 16
 	ldr	x10, [x5, 2360]
@@ -691,40 +729,40 @@ insert_free_list:
 	asr	x2, x2, 1
 	mul	x2, x2, x5
 	and	w2, w2, 65535
-.L92:
+.L98:
 	ubfiz	x5, x2, 1, 16
 	ldrh	w5, [x11, x5]
 	cmp	w5, w12
-	bcs	.L90
+	bcs	.L96
 	ldrh	w5, [x1]
 	cmp	w5, w7
-	bne	.L91
+	bne	.L97
 	strh	w2, [x4, 2]
 	strh	w0, [x1]
-	b	.L88
-.L91:
+	b	.L94
+.L97:
 	umaddl	x1, w5, w6, x10
 	mov	w2, w5
-	b	.L92
-.L90:
+	b	.L98
+.L96:
 	ldrh	w5, [x1, 2]
 	strh	w5, [x4, 2]
 	strh	w2, [x9, x8]
 	add	x2, x3, :lo12:.LANCHOR0
 	ldr	x3, [x2, 2408]
 	cmp	x1, x3
-	bne	.L93
+	bne	.L99
 	strh	w0, [x1, 2]
 	str	x4, [x2, 2408]
-	b	.L88
-.L93:
+	b	.L94
+.L99:
 	ldrh	w3, [x1, 2]
 	mov	w4, 6
 	ldr	x2, [x2, 2360]
 	umull	x3, w3, w4
 	strh	w0, [x2, x3]
 	strh	w0, [x1, 2]
-	b	.L88
+	b	.L94
 	.size	insert_free_list, .-insert_free_list
 	.align	2
 	.global	INSERT_FREE_LIST
@@ -741,7 +779,7 @@ INSERT_FREE_LIST:
 	strh	w0, [x1, 2416]
 	ldrh	w1, [x1, 44]
 	cmp	w1, w0
-	bcs	.L94
+	bcs	.L100
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -749,7 +787,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, 24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L94:
+.L100:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -773,27 +811,27 @@ List_remove_node:
 	add	x20, x22, x21
 	ldrh	w1, [x20, 2]
 	cmp	w1, w0
-	bne	.L98
+	bne	.L104
 	ldr	x0, [x23]
 	cmp	x20, x0
-	beq	.L98
+	beq	.L104
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 379
+	mov	w2, 397
 	add	x1, x1, 48
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L98:
+.L104:
 	ldr	x0, [x23]
 	mov	w1, 65535
 	cmp	x20, x0
 	ldrh	w0, [x22, x21]
-	bne	.L99
+	bne	.L105
 	cmp	w0, w1
-	bne	.L100
+	bne	.L106
 	str	xzr, [x23]
-.L101:
+.L107:
 	mov	w0, -1
 	strh	w0, [x22, x21]
 	strh	w0, [x20, 2]
@@ -803,7 +841,7 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L100:
+.L106:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w2, 6
 	ldr	x1, [x19, 2360]
@@ -811,21 +849,21 @@ List_remove_node:
 	mov	w1, -1
 	str	x0, [x23]
 	strh	w1, [x0, 2]
-	b	.L101
-.L99:
+	b	.L107
+.L105:
 	cmp	w0, w1
 	ldrh	w1, [x20, 2]
-	bne	.L102
+	bne	.L108
 	cmp	w1, w0
-	beq	.L101
+	beq	.L107
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x19, 2360]
 	strh	w2, [x0, x1]
-	b	.L101
-.L102:
+	b	.L107
+.L108:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w2, 6
 	ldr	x3, [x19, 2360]
@@ -836,14 +874,14 @@ List_remove_node:
 	ldrh	w3, [x22, x21]
 	umull	x0, w0, w2
 	strh	w3, [x1, x0]
-	b	.L101
+	b	.L107
 	.size	List_remove_node, .-List_remove_node
 	.align	2
 	.global	List_pop_index_node
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L110
+	cbz	x2, .L116
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR0+2360
 	and	w1, w1, 65535
@@ -852,9 +890,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR0+2360]
-.L106:
-	cbnz	w1, .L107
-.L109:
+.L112:
+	cbnz	w1, .L113
+.L115:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -867,15 +905,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L107:
+.L113:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L109
+	beq	.L115
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L106
-.L110:
+	b	.L112
+.L116:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -898,25 +936,25 @@ List_get_gc_head_node:
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x1, [x0, 2368]
-	cbz	x1, .L122
+	cbz	x1, .L128
 	ldr	x3, [x0, 2360]
 	mov	w4, 6
 	mov	w0, 65535
-.L119:
-	cbz	w2, .L120
+.L125:
+	cbz	w2, .L126
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L121
+	bne	.L127
 	ret
-.L121:
+.L127:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L119
-.L122:
+	b	.L125
+.L128:
 	mov	w0, 65535
 	ret
-.L120:
+.L126:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -939,20 +977,20 @@ List_update_data_list:
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 2424]
 	cmp	w1, w20
-	beq	.L125
+	beq	.L131
 	ldrh	w1, [x0, 2472]
 	cmp	w1, w20
-	beq	.L125
+	beq	.L131
 	ldrh	w1, [x0, 2520]
 	cmp	w1, w20
-	beq	.L125
+	beq	.L131
 	mov	w22, 6
 	ldr	x24, [x0, 2360]
 	ldr	x1, [x0, 2368]
 	umull	x22, w20, w22
 	add	x23, x24, x22
 	cmp	x23, x1
-	beq	.L125
+	beq	.L131
 	ldr	x2, [x0, 2376]
 	ubfiz	x1, x20, 1, 16
 	ldrh	w0, [x23, 4]
@@ -963,26 +1001,26 @@ List_update_data_list:
 	ldrh	w0, [x23, 2]
 	csinv	w21, w21, wzr, ne
 	cmp	w0, w1
-	bne	.L128
+	bne	.L134
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L128
+	bne	.L134
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 470
+	mov	w2, 488
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L128:
+.L134:
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L129
+	bne	.L135
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	beq	.L125
-.L129:
+	beq	.L131
+.L135:
 	mov	w1, 6
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	x2, -6148914691236517206
@@ -999,27 +1037,27 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w21, w0
-	bcs	.L125
+	bcs	.L131
 	mov	w1, w20
 	add	x0, x22, 2368
 	bl	List_remove_node
 	ldrh	w0, [x22, 2400]
-	cbnz	w0, .L131
+	cbnz	w0, .L137
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 481
+	mov	w2, 499
 	add	x1, x1, 72
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L131:
+.L137:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2400]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2400]
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L125:
+.L131:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1040,73 +1078,73 @@ select_l2p_ram_region:
 	mov	w4, 65535
 	ldrh	w2, [x0, 142]
 	ldr	x0, [x0, 2568]
-.L136:
+.L142:
 	and	w19, w3, 65535
 	cmp	w19, w2
-	bcc	.L138
+	bcc	.L144
 	add	x4, x0, 4
 	mov	w19, w2
 	mov	w6, -2147483648
 	mov	w3, 0
-.L139:
+.L145:
 	cmp	w3, w2
-	bne	.L141
+	bne	.L147
 	cmp	w19, w2
-	bcc	.L137
+	bcc	.L143
 	add	x1, x1, :lo12:.LANCHOR0
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, 2576]
 	mov	w1, 0
-.L142:
+.L148:
 	cmp	w1, w2
-	bne	.L144
+	bne	.L150
 	cmp	w19, w1
-	bcc	.L137
+	bcc	.L143
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 784
+	mov	w2, 823
 	add	x1, x1, 96
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L137
-.L138:
+	b	.L143
+.L144:
 	add	x3, x3, 1
 	add	x5, x0, x3, lsl 4
 	ldrh	w5, [x5, -16]
 	cmp	w5, w4
-	bne	.L136
-.L137:
+	bne	.L142
+.L143:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L141:
+.L147:
 	ldr	w5, [x4]
-	tbnz	w5, #31, .L140
+	tbnz	w5, #31, .L146
 	cmp	w6, w5
-	bls	.L140
+	bls	.L146
 	mov	w6, w5
 	mov	w19, w3
-.L140:
+.L146:
 	add	w3, w3, 1
 	add	x4, x4, 16
 	and	w3, w3, 65535
-	b	.L139
-.L144:
+	b	.L145
+.L150:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L143
+	bls	.L149
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L143:
+.L149:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L142
+	b	.L148
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.align	2
 	.global	FtlUpdateVaildLpn
@@ -1116,12 +1154,12 @@ FtlUpdateVaildLpn:
 	add	x3, x1, :lo12:.LANCHOR0
 	ldrh	w2, [x3, 2578]
 	cmp	w2, 4
-	bhi	.L147
-	cbnz	w0, .L147
+	bhi	.L153
+	cbnz	w0, .L153
 	add	w2, w2, 1
 	strh	w2, [x3, 2578]
 	ret
-.L147:
+.L153:
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w6, 65535
 	mov	x1, 0
@@ -1129,33 +1167,33 @@ FtlUpdateVaildLpn:
 	ldr	x5, [x0, 2376]
 	strh	wzr, [x0, 2578]
 	str	wzr, [x0, 2580]
-.L148:
+.L154:
 	cmp	w4, w1, uxth
-	bhi	.L150
+	bhi	.L156
 	ret
-.L150:
+.L156:
 	ldrh	w3, [x5, x1, lsl 1]
 	cmp	w3, w6
-	beq	.L149
+	beq	.L155
 	ldr	w2, [x0, 2580]
 	add	w2, w2, w3
 	str	w2, [x0, 2580]
-.L149:
+.L155:
 	add	x1, x1, 1
-	b	.L148
+	b	.L154
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.align	2
 	.global	ftl_set_blk_mode
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L153
+	cbz	w1, .L159
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	ftl_set_blk_mode.part.7
 	ldp	x29, x30, [sp], 16
 	ret
-.L153:
+.L159:
 	adrp	x1, .LANCHOR0+24
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1191,9 +1229,9 @@ ftl_sb_update_avl_pages:
 	strh	wzr, [x0, 4]
 	ldrh	w3, [x1, 36]
 	mov	w1, 65535
-.L161:
+.L167:
 	cmp	w3, w2, uxth
-	bhi	.L163
+	bhi	.L169
 	add	x4, x4, :lo12:.LANCHOR0
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1204,69 +1242,69 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L164:
+.L170:
 	cmp	x2, x3
-	bne	.L166
+	bne	.L172
 	ret
-.L163:
+.L169:
 	add	x5, x0, x2, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w1
-	beq	.L162
+	beq	.L168
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L162:
+.L168:
 	add	w2, w2, 1
-	b	.L161
-.L166:
+	b	.L167
+.L172:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L165
+	beq	.L171
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L165:
+.L171:
 	add	x2, x2, 2
-	b	.L164
+	b	.L170
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.align	2
 	.global	FtlSlcSuperblockCheck
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L167
+	cbz	w1, .L173
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L167
+	beq	.L173
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR0+36
 	ldrh	w4, [x2, #:lo12:.LANCHOR0+36]
 	mov	w2, w1
-.L170:
+.L176:
 	cmp	w3, w2
-	beq	.L172
-.L167:
+	beq	.L178
+.L173:
 	ret
-.L172:
+.L178:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L171
+	bne	.L177
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L171:
+.L177:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L170
+	b	.L176
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.align	2
 	.global	make_superblock
@@ -1281,15 +1319,15 @@ make_superblock:
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, 44]
 	cmp	w1, w0
-	bcc	.L174
+	bcc	.L180
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2097
+	mov	w2, 2146
 	add	x1, x1, 120
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L174:
+.L180:
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x6, x19, 16
 	add	x7, x0, 64
@@ -1298,9 +1336,9 @@ make_superblock:
 	mov	x5, 0
 	ldrh	w8, [x0, 36]
 	mov	w9, -1
-.L175:
+.L181:
 	cmp	w8, w5, uxth
-	bhi	.L177
+	bhi	.L183
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x20, 106]
@@ -1312,22 +1350,22 @@ make_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L177:
+.L183:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w9, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L176
+	cbnz	w0, .L182
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L176:
+.L182:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L175
+	b	.L181
 	.size	make_superblock, .-make_superblock
 	.align	2
 	.global	update_multiplier_value
@@ -1343,11 +1381,11 @@ update_multiplier_value:
 	ldrh	w10, [x1, 36]
 	ldrh	w11, [x1, 106]
 	cmp	w10, w9, uxth
-	bhi	.L191
-	cbz	w6, .L189
+	bhi	.L197
+	cbz	w6, .L195
 	mov	w0, 32768
 	sdiv	w6, w0, w6
-.L190:
+.L196:
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
 	ldr	x0, [x0, 2360]
@@ -1355,31 +1393,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w6, [x8, 4]
 	ret
-.L184:
+.L190:
 	mov	w6, 0
-	b	.L183
-.L189:
+	b	.L189
+.L195:
 	mov	w6, 0
-	b	.L190
-.L191:
+	b	.L196
+.L197:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L182:
+.L188:
 	ldrb	w0, [x7, x9]
 	mov	w1, w8
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L181
+	cbnz	w0, .L187
 	add	w6, w6, w11
 	and	w6, w6, 65535
-.L181:
+.L187:
 	add	x9, x9, 1
 	cmp	w10, w9, uxth
-	bhi	.L182
-	cbz	w6, .L184
+	bhi	.L188
+	cbz	w6, .L190
 	mov	w0, 32768
 	sdiv	w6, w0, w6
-.L183:
+.L189:
 	add	x0, x5, :lo12:.LANCHOR0
 	mov	w1, 6
 	ldr	x0, [x0, 2360]
@@ -1396,7 +1434,7 @@ GetFreeBlockMinEraseCount:
 	adrp	x1, .LANCHOR0
 	add	x1, x1, :lo12:.LANCHOR0
 	ldr	x0, [x1, 2408]
-	cbz	x0, .L194
+	cbz	x0, .L200
 	ldr	x2, [x1, 2360]
 	ldr	x1, [x1, 2384]
 	sub	x0, x0, x2
@@ -1407,7 +1445,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L194:
+.L200:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1419,7 +1457,7 @@ GetFreeBlockMaxEraseCount:
 	add	x4, x2, :lo12:.LANCHOR0
 	and	w0, w0, 65535
 	ldr	x1, [x4, 2408]
-	cbz	x1, .L202
+	cbz	x1, .L208
 	ldrh	w3, [x4, 2416]
 	mov	w5, 7
 	ldr	x4, [x4, 2360]
@@ -1436,25 +1474,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x3
 	mov	w3, 0
 	and	w1, w1, 65535
-.L198:
+.L204:
 	cmp	w0, w3
-	beq	.L201
+	beq	.L207
 	umull	x5, w1, w6
 	ldrh	w5, [x4, x5]
 	cmp	w5, w7
-	bne	.L199
-.L201:
+	bne	.L205
+.L207:
 	add	x2, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x2, 2384]
 	ldrh	w0, [x0, x1]
 	ret
-.L199:
+.L205:
 	add	w3, w3, 1
 	mov	w1, w5
 	and	w3, w3, 65535
-	b	.L198
-.L202:
+	b	.L204
+.L208:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1873,8 +1911,8 @@ FtlPrintInfo2buf:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	beq	.L204
-.L209:
+	beq	.L210
+.L215:
 	sub	w0, w19, w22
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -1883,11 +1921,11 @@ FtlPrintInfo2buf:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L204:
+.L210:
 	ldrh	w0, [x21, 2672]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L206
+	beq	.L212
 	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
@@ -1896,7 +1934,7 @@ FtlPrintInfo2buf:
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
 	add	x19, x19, x0, sxtw
-.L206:
+.L212:
 	mov	w0, 0
 	adrp	x24, .LC68
 	bl	List_get_gc_head_node
@@ -1906,9 +1944,9 @@ FtlPrintInfo2buf:
 	mov	w20, 0
 	mov	w27, 65535
 	mov	w26, 6
-.L208:
+.L214:
 	cmp	w3, w27
-	beq	.L207
+	beq	.L213
 	umull	x25, w3, w26
 	ldr	x0, [x21, 2360]
 	ldr	x2, [x21, 2376]
@@ -1927,8 +1965,8 @@ FtlPrintInfo2buf:
 	ldr	x0, [x21, 2360]
 	cmp	w20, 16
 	ldrh	w3, [x0, x25]
-	bne	.L208
-.L207:
+	bne	.L214
+.L213:
 	add	x23, x23, :lo12:.LANCHOR0
 	adrp	x21, .LC69
 	add	x21, x21, :lo12:.LC69
@@ -1943,9 +1981,9 @@ FtlPrintInfo2buf:
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.L210:
+.L216:
 	cmp	w3, w25
-	beq	.L209
+	beq	.L215
 	umull	x24, w3, w26
 	ldr	x0, [x23, 2360]
 	ldr	x2, [x23, 2384]
@@ -1960,10 +1998,10 @@ FtlPrintInfo2buf:
 	bl	sprintf
 	add	x19, x19, x0, sxtw
 	cmp	w20, 4
-	beq	.L209
+	beq	.L215
 	ldr	x0, [x23, 2360]
 	ldrh	w3, [x0, x24]
-	b	.L210
+	b	.L216
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.align	2
 	.global	rknand_proc_ftlread
@@ -1999,14 +2037,14 @@ GetSwlReplaceBlock:
 	ldr	w2, [x0, 2636]
 	ldr	w1, [x0, 2648]
 	cmp	w2, w1
-	bcs	.L219
+	bcs	.L225
 	ldrh	w2, [x0, 44]
 	mov	x1, 0
 	ldr	x4, [x0, 2384]
 	str	wzr, [x0, 2628]
-.L220:
+.L226:
 	cmp	w2, w1
-	bhi	.L221
+	bhi	.L227
 	add	x1, x8, :lo12:.LANCHOR0
 	ldr	w0, [x1, 2628]
 	udiv	w2, w0, w2
@@ -2016,50 +2054,50 @@ GetSwlReplaceBlock:
 	ldrh	w2, [x1, 96]
 	udiv	w0, w0, w2
 	str	w0, [x1, 2628]
-.L222:
+.L228:
 	add	x1, x8, :lo12:.LANCHOR0
 	ldr	w9, [x1, 2648]
 	ldr	w11, [x1, 2636]
 	add	w0, w9, 256
 	cmp	w0, w11
-	bls	.L227
+	bls	.L233
 	ldr	w1, [x1, 2644]
 	add	w0, w9, 768
 	cmp	w0, w1
-	bls	.L227
-.L229:
+	bls	.L233
+.L235:
 	mov	w20, 65535
-.L228:
+.L234:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L221:
+.L227:
 	ldrh	w3, [x4, x1, lsl 1]
 	add	x1, x1, 1
 	ldr	w5, [x0, 2628]
 	add	w3, w3, w5
 	str	w3, [x0, 2628]
-	b	.L220
-.L219:
+	b	.L226
+.L225:
 	ldr	w1, [x0, 2644]
 	cmp	w2, w1
-	bls	.L222
+	bls	.L228
 	add	w1, w1, 1
 	str	w1, [x0, 2644]
 	mov	w1, 0
-.L224:
+.L230:
 	ldrh	w2, [x0, 44]
 	cmp	w1, w2
-	bcs	.L222
+	bcs	.L228
 	ldr	x4, [x0, 2384]
 	ubfiz	x3, x1, 1, 32
 	add	w1, w1, 1
 	ldrh	w2, [x4, x3]
 	add	w2, w2, 1
 	strh	w2, [x4, x3]
-	b	.L224
-.L227:
+	b	.L230
+.L233:
 	add	x10, x8, :lo12:.LANCHOR0
 	ldrh	w0, [x10, 2416]
 	add	w0, w0, w0, lsl 1
@@ -2068,9 +2106,9 @@ GetSwlReplaceBlock:
 	and	w6, w0, 65535
 	add	w0, w9, 64
 	cmp	w6, w0
-	bcc	.L229
+	bcc	.L235
 	ldr	x0, [x10, 2368]
-	cbz	x0, .L229
+	cbz	x0, .L235
 	mov	w4, 65535
 	ldrh	w12, [x10, 44]
 	mov	x13, -6148914691236517206
@@ -2081,39 +2119,39 @@ GetSwlReplaceBlock:
 	mov	w1, 0
 	movk	x13, 0xaaab, lsl 0
 	mov	w14, 6
-.L230:
+.L236:
 	ldrh	w3, [x0]
 	cmp	w3, w10
-	bne	.L233
+	bne	.L239
 	mov	w20, w2
-.L232:
+.L238:
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L229
+	beq	.L235
 	ubfiz	x7, x20, 1, 32
 	ldrh	w3, [x5, x7]
 	cmp	w9, w3
-	bcs	.L234
+	bcs	.L240
 	bl	GetFreeBlockMinEraseCount
 	cmp	w9, w0, uxth
-	bcs	.L234
+	bcs	.L240
 	add	x0, x8, :lo12:.LANCHOR0
 	str	w4, [x0, 2648]
-.L234:
+.L240:
 	cmp	w11, w3
-	bls	.L229
+	bls	.L235
 	add	w0, w3, 128
 	cmp	w6, w0
-	ble	.L229
+	ble	.L235
 	add	w0, w3, 256
 	cmp	w11, w0
-	bhi	.L235
+	bhi	.L241
 	add	x0, x8, :lo12:.LANCHOR0
 	add	w3, w3, 768
 	ldr	w0, [x0, 2644]
 	cmp	w3, w0
-	bcs	.L229
-.L235:
+	bcs	.L235
+.L241:
 	add	x19, x8, :lo12:.LANCHOR0
 	ldrh	w5, [x5, x7]
 	mov	w2, w11
@@ -2126,14 +2164,14 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	mov	w0, 1
 	str	w0, [x19, 3244]
-	b	.L228
-.L233:
+	b	.L234
+.L239:
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	cmp	w1, w12
-	bhi	.L229
+	bhi	.L235
 	ldrh	w15, [x0, 4]
-	cbz	w15, .L231
+	cbz	w15, .L237
 	sub	x0, x0, x7
 	asr	x0, x0, 1
 	mul	x0, x0, x13
@@ -2141,14 +2179,14 @@ GetSwlReplaceBlock:
 	and	x0, x0, 65535
 	ldrh	w0, [x5, x0, lsl 1]
 	cmp	w9, w0
-	bcs	.L232
+	bcs	.L238
 	cmp	w4, w0
-	bls	.L231
+	bls	.L237
 	mov	w4, w0
 	mov	w2, w20
-.L231:
+.L237:
 	umaddl	x0, w3, w14, x7
-	b	.L230
+	b	.L236
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.align	2
 	.global	free_data_superblock
@@ -2157,7 +2195,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L246
+	beq	.L252
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR0+2376
 	ubfiz	x1, x0, 1, 16
@@ -2168,7 +2206,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L246:
+.L252:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2184,39 +2222,39 @@ get_new_active_ppa:
 	ldrh	w1, [x0]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L250
+	bne	.L256
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2707
+	mov	w2, 2776
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L250:
+.L256:
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, 106]
 	cmp	w1, w0
-	bne	.L251
+	bne	.L257
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2708
+	mov	w2, 2777
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L251:
+.L257:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L252
+	cbnz	w0, .L258
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2709
+	mov	w2, 2778
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L252:
+.L258:
 	ldrb	w0, [x19, 6]
 	add	x1, x20, :lo12:.LANCHOR0
 	strb	wzr, [x19, 10]
@@ -2224,9 +2262,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, 36]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L253:
+.L259:
 	cmp	w0, w1
-	beq	.L255
+	beq	.L261
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2235,56 +2273,56 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L257:
+.L263:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L256
+	bne	.L262
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L256:
+.L262:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L257
+	beq	.L263
 	add	x20, x20, :lo12:.LANCHOR0
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, 106]
 	cmp	w2, w0
-	bne	.L249
-	cbz	w1, .L249
+	bne	.L255
+	cbz	w1, .L255
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2730
+	mov	w2, 2799
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L249:
+.L255:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L255:
+.L261:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L254
+	bne	.L260
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L254:
+.L260:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L253
+	b	.L259
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	2
 	.global	FtlGcBufInit
@@ -2297,19 +2335,19 @@ FtlGcBufInit:
 	mov	w9, 1
 	mov	w5, 4
 	str	wzr, [x1, 3248]
-.L265:
+.L271:
 	ldrh	w2, [x1, 36]
 	cmp	w3, w2
-	bcc	.L266
+	bcc	.L272
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w6, 24
 	mov	w5, 4
-.L267:
+.L273:
 	ldr	w1, [x0, 3288]
 	cmp	w2, w1
-	bcc	.L268
+	bcc	.L274
 	ret
-.L266:
+.L272:
 	umull	x4, w3, w8
 	ldr	x6, [x1, 3256]
 	ldr	x7, [x1, 3264]
@@ -2337,8 +2375,8 @@ FtlGcBufInit:
 	str	x4, [x2, 8]
 	ldr	x4, [x6, 8]
 	str	x4, [x2, 16]
-	b	.L265
-.L268:
+	b	.L271
+.L274:
 	umull	x4, w2, w6
 	ldr	x3, [x0, 3256]
 	ldr	x7, [x0, 3264]
@@ -2359,7 +2397,7 @@ FtlGcBufInit:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
-	b	.L267
+	b	.L273
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
 	.global	FtlGcBufFree
@@ -2371,31 +2409,31 @@ FtlGcBufFree:
 	mov	w8, 24
 	ldr	w7, [x2, 3288]
 	ldr	x5, [x2, 3256]
-.L270:
+.L276:
 	cmp	w3, w1
-	bcs	.L269
+	bcs	.L275
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L275
-.L271:
+	b	.L281
+.L277:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L275:
+.L281:
 	cmp	w2, w7
-	bcs	.L272
+	bcs	.L278
 	umull	x6, w2, w8
 	add	x9, x5, x6
 	ldr	x10, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x10, x6
-	bne	.L271
+	bne	.L277
 	str	wzr, [x9, 16]
-.L272:
+.L278:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L270
-.L269:
+	b	.L276
+.L275:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
@@ -2409,20 +2447,20 @@ FtlGcBufAlloc:
 	mov	w8, 1
 	ldr	w5, [x2, 3288]
 	ldr	x6, [x2, 3256]
-.L277:
+.L283:
 	cmp	w3, w1
-	bcs	.L276
+	bcs	.L282
 	mov	w2, 0
-	b	.L282
-.L278:
+	b	.L288
+.L284:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L282:
+.L288:
 	cmp	w2, w5
-	bcs	.L279
+	bcs	.L285
 	umaddl	x4, w2, w7, x6
 	ldr	w9, [x4, 16]
-	cbnz	w9, .L278
+	cbnz	w9, .L284
 	ubfiz	x2, x3, 5, 16
 	ldr	x9, [x4]
 	add	x2, x0, x2
@@ -2430,11 +2468,11 @@ FtlGcBufAlloc:
 	str	x9, [x2, 8]
 	ldr	x4, [x4, 8]
 	str	x4, [x2, 16]
-.L279:
+.L285:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L277
-.L276:
+	b	.L283
+.L282:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
@@ -2447,17 +2485,17 @@ IsBlkInGcList:
 	ldrh	w2, [x1, 3292]
 	ldr	x3, [x1, 3296]
 	mov	x1, 0
-.L284:
+.L290:
 	cmp	w2, w1, uxth
-	bhi	.L286
+	bhi	.L292
 	mov	w0, 0
 	ret
-.L286:
+.L292:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L284
+	bne	.L290
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2478,25 +2516,25 @@ FtlGcUpdatePage:
 	ldrh	w1, [x4, 3292]
 	ldr	x6, [x4, 3296]
 	mov	x4, 0
-.L289:
+.L295:
 	and	w2, w4, 65535
 	cmp	w2, w1
-	bcc	.L291
-	bne	.L290
+	bcc	.L297
+	bne	.L296
 	and	x4, x4, 65535
 	strh	w0, [x6, x4, lsl 1]
 	add	x4, x3, :lo12:.LANCHOR0
 	ldrh	w0, [x4, 3292]
 	add	w0, w0, 1
 	strh	w0, [x4, 3292]
-	b	.L290
-.L291:
+	b	.L296
+.L297:
 	add	x4, x4, 1
 	add	x2, x6, x4, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w9
-	bne	.L289
-.L290:
+	bne	.L295
+.L296:
 	add	x0, x3, :lo12:.LANCHOR0
 	mov	w1, 12
 	ldrh	w3, [x0, 3304]
@@ -2528,26 +2566,42 @@ FtlGcRefreshBlock:
 	bl	sftl_printk
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w3, [x0, 3320]
+	ldrh	w5, [x0, 3320]
+	cmp	w19, w5
+	beq	.L300
+	ldrh	w4, [x0, 3322]
+	cmp	w19, w4
+	beq	.L300
+	ldrh	w3, [x0, 3324]
 	cmp	w19, w3
-	beq	.L294
-	ldrh	w2, [x0, 3322]
+	beq	.L300
+	ldrh	w2, [x0, 3326]
 	cmp	w19, w2
-	beq	.L294
+	beq	.L300
 	mov	w1, 65535
-	cmp	w3, w1
-	bne	.L295
+	cmp	w5, w1
+	bne	.L301
 	strh	w19, [x0, 3320]
-.L294:
+.L300:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L295:
-	cmp	w2, w1
-	bne	.L294
+.L301:
+	cmp	w4, w1
+	bne	.L302
 	strh	w19, [x0, 3322]
-	b	.L294
+	b	.L300
+.L302:
+	cmp	w3, w1
+	bne	.L303
+	strh	w19, [x0, 3324]
+	b	.L300
+.L303:
+	cmp	w2, w1
+	bne	.L300
+	strh	w19, [x0, 3326]
+	b	.L300
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
@@ -2560,10 +2614,10 @@ FtlGcMarkBadPhyBlk:
 	add	x20, x19, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	add	x20, x20, 3328
+	add	x20, x20, 3336
 	mov	w0, w21
 	bl	P2V_block_in_plane
-	ldrh	w1, [x20, -4]
+	ldrh	w1, [x20, -8]
 	mov	w2, w21
 	mov	w22, w0
 	adrp	x0, .LC74
@@ -2571,26 +2625,26 @@ FtlGcMarkBadPhyBlk:
 	bl	sftl_printk
 	mov	w0, w22
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x20, -4]
+	ldrh	w0, [x20, -8]
 	mov	x1, 0
-.L298:
+.L306:
 	cmp	w0, w1, uxth
-	bhi	.L300
+	bhi	.L308
 	cmp	w0, 15
-	bhi	.L299
+	bhi	.L307
 	add	x19, x19, :lo12:.LANCHOR0
 	add	w1, w0, 1
-	add	x19, x19, 3328
-	strh	w1, [x19, -4]
+	add	x19, x19, 3336
+	strh	w1, [x19, -8]
 	strh	w21, [x19, w0, sxtw 1]
-	b	.L299
-.L300:
+	b	.L307
+.L308:
 	add	x1, x1, 1
 	add	x2, x20, x1, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w21
-	bne	.L298
-.L299:
+	bne	.L306
+.L307:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2606,27 +2660,27 @@ FtlGcReFreshBadBlk:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3324]
-	cbz	w1, .L303
+	ldrh	w1, [x0, 3328]
+	cbz	w1, .L311
 	ldrh	w3, [x0, 3320]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L303
-	ldrh	w2, [x0, 3362]
+	bne	.L311
+	ldrh	w2, [x0, 3370]
 	cmp	w2, w1
-	bcc	.L304
-	strh	wzr, [x0, 3362]
-.L304:
+	bcc	.L312
+	strh	wzr, [x0, 3370]
+.L312:
 	add	x19, x19, :lo12:.LANCHOR0
-	add	x0, x19, 3328
-	ldrh	w1, [x19, 3362]
+	add	x0, x19, 3336
+	ldrh	w1, [x19, 3370]
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, 3362]
+	ldrh	w0, [x19, 3370]
 	add	w0, w0, 1
-	strh	w0, [x19, 3362]
-.L303:
+	strh	w0, [x19, 3370]
+.L311:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2678,9 +2732,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x28, .LC77
-.L314:
+.L322:
 	cmp	w26, w19
-	bhi	.L320
+	bhi	.L328
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	sftl_printk
@@ -2691,42 +2745,42 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L320:
-	cbnz	w20, .L315
+.L328:
+	cbnz	w20, .L323
 	mov	w3, w22
 	mov	x2, x21
 	mov	x1, x27
 	mov	x0, x24
 	bl	sftl_printk
-.L315:
+.L323:
 	cmp	w23, 4
-	bne	.L316
+	bne	.L324
 	ldr	w1, [x21, x19, lsl 2]
 	adrp	x0, .LC76
 	add	x0, x0, :lo12:.LC76
-.L322:
+.L330:
 	bl	sftl_printk
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L319
+	bls	.L327
 	mov	w20, 0
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	sftl_printk
-.L319:
+.L327:
 	add	x19, x19, 1
 	add	w22, w22, w23
-	b	.L314
-.L316:
+	b	.L322
+.L324:
 	cmp	w23, 2
-	bne	.L318
+	bne	.L326
 	ldrh	w1, [x21, x19, lsl 1]
 	add	x0, x28, :lo12:.LC77
-	b	.L322
-.L318:
+	b	.L330
+.L326:
 	ldrb	w1, [x21, x19]
 	mov	x0, x25
-	b	.L322
+	b	.L330
 	.size	rknand_print_hex, .-rknand_print_hex
 	.align	2
 	.global	FlashReadPages
@@ -2749,9 +2803,9 @@ FlashReadPages:
 	add	x23, x0, x1
 	add	x20, x20, 160
 	add	x21, x21, :lo12:.LC1
-.L324:
+.L332:
 	cmp	x19, x23
-	bne	.L331
+	bne	.L339
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2759,17 +2813,17 @@ FlashReadPages:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L331:
+.L339:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L325
+	cbz	x0, .L333
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L326
-.L325:
+	cbnz	x0, .L334
+.L333:
 	mov	w2, 101
 	mov	x1, x20
 	mov	x0, x21
 	bl	sftl_printk
-.L326:
+.L334:
 	ldr	w0, [x19, 4]
 	add	x26, x22, :lo12:.LANCHOR0
 	add	x2, x29, 88
@@ -2778,14 +2832,14 @@ FlashReadPages:
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x26, 3392]
+	ldr	x4, [x26, 3400]
 	blr	x4
 	str	w0, [x19]
 	ldrh	w0, [x26, 14]
 	cmp	w0, 4
-	bne	.L328
+	bne	.L336
 	ldrb	w0, [x29, 88]
-	ldr	x4, [x26, 3392]
+	ldr	x4, [x26, 3400]
 	ldp	x2, x3, [x19, 8]
 	ldr	w1, [x29, 92]
 	add	x3, x3, 8
@@ -2793,23 +2847,23 @@ FlashReadPages:
 	add	w1, w25, w1
 	blr	x4
 	cmn	w0, #1
-	beq	.L329
+	beq	.L337
 	ldr	x0, [x19, 16]
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L328
+	bne	.L336
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L328
+	bne	.L336
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L328
-.L329:
+	beq	.L336
+.L337:
 	mov	w0, -1
 	str	w0, [x19]
-.L328:
+.L336:
 	add	x19, x19, 32
-	b	.L324
+	b	.L332
 	.size	FlashReadPages, .-FlashReadPages
 	.align	2
 	.global	FtlLoadFactoryBbt
@@ -2826,16 +2880,16 @@ FtlLoadFactoryBbt:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, 3400
+	add	x23, x0, 3408
 	mov	x25, x23
 	mov	w26, 61664
-	ldr	x1, [x0, 3432]
-	ldr	x24, [x0, 3440]
+	ldr	x1, [x0, 3440]
+	ldr	x24, [x0, 3448]
 	stp	x1, x24, [x23, 8]
-.L343:
+.L351:
 	ldrh	w0, [x19, 58]
 	cmp	w21, w0
-	bcc	.L348
+	bcc	.L356
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2843,17 +2897,17 @@ FtlLoadFactoryBbt:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L348:
+.L356:
 	ldrh	w20, [x19, 102]
 	mov	w0, -1
 	strh	w0, [x22]
-.L345:
+.L353:
 	ldrh	w0, [x19, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L346
+	ble	.L354
 	madd	w0, w0, w21, w20
 	mov	w2, 1
 	mov	w1, w2
@@ -2863,15 +2917,15 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L345
+	beq	.L353
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L345
+	bne	.L353
 	strh	w20, [x22]
-.L346:
+.L354:
 	add	w21, w21, 1
 	add	x22, x22, 2
-	b	.L343
+	b	.L351
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
@@ -2886,9 +2940,9 @@ FtlGetLastWrittenPage:
 	adrp	x1, .LANCHOR0
 	stp	x21, x22, [sp, 32]
 	add	x1, x1, :lo12:.LANCHOR0
-	bne	.L354
+	bne	.L362
 	ldrh	w19, [x1, 108]
-.L355:
+.L363:
 	sub	w19, w19, #1
 	adrp	x1, ftl_temp_buf
 	sxth	w19, w19
@@ -2905,23 +2959,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L356
+	bne	.L364
 	mov	w22, 0
 	mov	w24, 2
-.L357:
+.L365:
 	cmp	w22, w19
-	ble	.L360
-.L356:
+	ble	.L368
+.L364:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L354:
+.L362:
 	ldrh	w19, [x1, 106]
-	b	.L355
-.L360:
+	b	.L363
+.L368:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -2933,17 +2987,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L358
+	bne	.L366
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L358
+	bne	.L366
+	ldr	w0, [x29, 64]
+	cmn	w0, #1
+	beq	.L366
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L357
-.L358:
+	b	.L365
+.L366:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L357
+	b	.L365
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	2
 	.global	FlashProgPages
@@ -2970,11 +3027,11 @@ FlashProgPages:
 	mov	x19, x0
 	add	x22, x22, 176
 	add	x23, x23, :lo12:.LC1
-.L363:
+.L374:
 	cmp	x19, x24
-	bne	.L371
-	cbnz	w26, .L372
-.L390:
+	bne	.L382
+	cbnz	w26, .L383
+.L401:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2983,17 +3040,17 @@ FlashProgPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L371:
+.L382:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L364
+	cbz	x0, .L375
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L365
-.L364:
+	cbnz	x0, .L376
+.L375:
 	mov	w2, 131
 	mov	x1, x22
 	mov	x0, x23
 	bl	sftl_printk
-.L365:
+.L376:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
@@ -3001,17 +3058,17 @@ FlashProgPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x0, 3384]
+	ldr	x4, [x0, 3392]
 	ldrb	w0, [x29, 104]
 	blr	x4
-	cbnz	w0, .L366
+	cbnz	w0, .L377
 	str	wzr, [x19]
-.L367:
+.L378:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 14]
 	cmp	w1, 4
-	bne	.L369
-	ldr	x4, [x0, 3384]
+	bne	.L380
+	ldr	x4, [x0, 3392]
 	ldrb	w0, [x29, 104]
 	ldp	x2, x3, [x19, 8]
 	ldr	w1, [x29, 108]
@@ -3019,17 +3076,17 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-	cbz	w0, .L369
+	cbz	w0, .L380
 	mov	w0, -1
 	str	w0, [x19]
-.L369:
+.L380:
 	add	x19, x19, 32
-	b	.L363
-.L366:
+	b	.L374
+.L377:
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L367
-.L376:
+	b	.L378
+.L387:
 	str	wzr, [x21]
 	mov	w2, w25
 	str	wzr, [x23]
@@ -3041,50 +3098,50 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w24, [x29, 112]
 	cmn	w24, #1
-	bne	.L373
+	bne	.L384
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	sftl_printk
 	str	w24, [x20]
-.L373:
+.L384:
 	ldr	x0, [x20, 16]
-	cbz	x0, .L374
+	cbz	x0, .L385
 	ldr	w2, [x0]
 	ldr	w3, [x21]
 	cmp	w2, w3
-	beq	.L374
+	beq	.L385
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L374:
+.L385:
 	ldr	x0, [x20, 8]
-	cbz	x0, .L375
+	cbz	x0, .L386
 	ldr	w3, [x22, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L375
+	beq	.L386
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC82
 	add	x0, x0, :lo12:.LC82
 	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L375:
+.L386:
 	add	x20, x20, 32
-.L391:
+.L402:
 	cmp	x20, x19
-	bne	.L376
-	b	.L390
-.L372:
+	bne	.L387
+	b	.L401
+.L383:
 	add	x21, x21, :lo12:.LANCHOR0
 	adrp	x22, check_buf
-	add	x21, x21, 3448
+	add	x21, x21, 3456
 	add	x23, x22, :lo12:check_buf
-	b	.L391
+	b	.L402
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
@@ -3103,40 +3160,40 @@ FlashEraseBlocks:
 	add	x22, x0, x2
 	mov	w21, -1
 	ldrh	w23, [x19, 12]
-.L394:
+.L405:
 	cmp	x20, x22
-	bne	.L400
+	bne	.L411
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L400:
+.L411:
 	ldr	w0, [x20]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
 	ldrb	w0, [x29, 72]
 	ldr	w1, [x29, 76]
-	ldr	x2, [x19, 3376]
+	ldr	x2, [x19, 3384]
 	blr	x2
 	cmp	w0, 0
 	csel	w0, w21, wzr, ne
 	str	w0, [x20, -4]
 	ldrh	w0, [x19, 14]
 	cmp	w0, 4
-	bne	.L398
+	bne	.L409
 	ldrb	w0, [x29, 72]
-	ldr	x2, [x19, 3376]
+	ldr	x2, [x19, 3384]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-	cbz	w0, .L398
+	cbz	w0, .L409
 	str	w21, [x20, -4]
-.L398:
+.L409:
 	add	x20, x20, 32
-	b	.L394
+	b	.L405
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
@@ -3150,24 +3207,24 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w21, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L405
+	bcc	.L416
 	adrp	x0, .LANCHOR0
 	add	x20, x0, :lo12:.LANCHOR0
 	mov	x19, x0
 	ldrh	w2, [x20, 262]
 	cmp	w2, 1024
-	beq	.L405
+	beq	.L416
 	and	w1, w1, 65535
-	cbz	w1, .L407
+	cbz	w1, .L418
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w22, w0, 65535
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 3968]
 	lsl	w1, w21, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 3968]
 	bl	FlashEraseBlocks
 	ldr	x2, [x20, 2384]
 	ubfiz	x0, x22, 1, 16
@@ -3177,7 +3234,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x20, 2640]
 	add	w0, w0, 1
 	str	w0, [x20, 2640]
-.L407:
+.L418:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 256
 	ldrh	w1, [x0, 6]
@@ -3189,7 +3246,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w21, [x2, 8]
-.L405:
+.L416:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -3215,65 +3272,65 @@ FtlLowFormatEraseBlock:
 	and	w24, w0, 65535
 	mov	w21, 0
 	mov	w19, 0
-	str	w24, [x5, 3968]
-.L416:
+	str	w24, [x5, 3976]
+.L427:
 	ldrh	w0, [x5, 36]
 	cmp	w0, w10
-	bhi	.L420
-	cbz	w21, .L415
-	ldr	x0, [x5, 3960]
+	bhi	.L431
+	cbz	w21, .L426
+	ldr	x0, [x5, 3968]
 	mov	w2, w21
 	mov	w1, 0
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	add	x25, x20, :lo12:.LANCHOR0
 	bl	FlashEraseBlocks
-.L424:
-	ldr	x0, [x25, 3960]
+.L435:
+	ldr	x0, [x25, 3968]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L423
+	bne	.L434
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L423:
+.L434:
 	add	x22, x22, 32
 	cmp	x22, x21
-	bne	.L424
-	cbz	w23, .L437
+	bne	.L435
+	cbz	w23, .L448
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w25, 1
 	ldrh	w26, [x0, 108]
 	lsr	w0, w26, 2
 	str	w0, [x29, 124]
-.L425:
+.L436:
 	add	x27, x20, :lo12:.LANCHOR0
 	mov	w22, 0
 	add	x0, x27, 64
 	str	x0, [x29, 112]
-.L433:
+.L444:
 	mov	w5, 0
 	mov	w21, 0
-.L426:
+.L437:
 	ldrh	w0, [x27, 36]
 	cmp	w0, w5
-	bhi	.L429
-	cbz	w21, .L415
-	ldr	x0, [x27, 3960]
+	bhi	.L440
+	cbz	w21, .L426
+	ldr	x0, [x27, 3968]
 	mov	w1, w21
 	mov	w3, 1
 	mov	w2, w25
 	mov	x28, 0
 	bl	FlashProgPages
 	ubfiz	x1, x21, 5, 16
-.L432:
-	ldr	x0, [x27, 3960]
+.L443:
+	ldr	x0, [x27, 3968]
 	add	x3, x0, x28
 	ldr	w0, [x0, x28]
-	cbz	w0, .L431
+	cbz	w0, .L442
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 104]
@@ -3281,40 +3338,40 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 104]
-.L431:
+.L442:
 	add	x28, x28, 32
 	cmp	x1, x28
-	bne	.L432
+	bne	.L443
 	ldr	w0, [x29, 124]
 	add	w22, w22, w0
 	and	w22, w22, 65535
 	cmp	w26, w22
-	bhi	.L433
+	bhi	.L444
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	x22, 0
-.L435:
-	cbz	w23, .L434
-	ldr	x0, [x26, 3960]
+.L446:
+	cbz	w23, .L445
+	ldr	x0, [x26, 3968]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L434
+	cbnz	w0, .L445
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L434:
+.L445:
 	add	x22, x22, 32
 	cmp	x22, x28
-	bne	.L435
+	bne	.L446
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L415
+	beq	.L426
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w2, w21
 	mov	w1, w25
-	ldr	x0, [x20, 3960]
+	ldr	x0, [x20, 3968]
 	bl	FlashEraseBlocks
-.L415:
+.L426:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3323,8 +3380,8 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L420:
-	ldr	x1, [x5, 3960]
+.L431:
+	ldr	x1, [x5, 3968]
 	ubfiz	x0, x10, 5, 16
 	str	wzr, [x1, x0]
 	mov	w1, w24
@@ -3332,22 +3389,22 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L417
+	cbz	w23, .L428
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L418
-.L417:
+	cbnz	w0, .L429
+.L428:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L419
-	ldr	x0, [x5, 3960]
+	cbnz	w0, .L430
+	ldr	x0, [x5, 3968]
 	ubfiz	x2, x21, 5, 16
 	lsl	w6, w6, 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
-	ldr	x1, [x5, 3960]
-	ldr	x0, [x5, 3976]
+	ldr	x1, [x5, 3968]
+	ldr	x0, [x5, 3984]
 	add	x1, x1, x2
-	ldr	x2, [x5, 3984]
+	ldr	x2, [x5, 3992]
 	str	x0, [x1, 8]
 	ldrh	w0, [x5, 116]
 	mul	w0, w0, w21
@@ -3356,22 +3413,22 @@ FtlLowFormatEraseBlock:
 	sdiv	w0, w0, w9
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L418:
+.L429:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L416
-.L419:
+	b	.L427
+.L430:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L418
-.L437:
+	b	.L429
+.L448:
 	mov	w0, 6
 	mov	w25, 0
 	mov	w26, 1
 	str	w0, [x29, 124]
-	b	.L425
-.L429:
-	ldr	x1, [x27, 3960]
+	b	.L436
+.L440:
+	ldr	x1, [x27, 3968]
 	ubfiz	x0, x5, 5, 16
 	str	wzr, [x1, x0]
 	mov	w1, w24
@@ -3380,20 +3437,20 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L427
+	cbz	w23, .L438
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L428
-.L427:
+	cbnz	w0, .L439
+.L438:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L428
-	ldr	x0, [x27, 3960]
+	cbnz	w0, .L439
+	ldr	x0, [x27, 3968]
 	ubfiz	x2, x21, 5, 16
 	add	w6, w22, w6, lsl 10
 	add	x0, x0, x2
 	str	w6, [x0, 4]
-	ldr	x1, [x27, 3960]
-	ldr	x0, [x27, 3992]
+	ldr	x1, [x27, 3968]
+	ldr	x0, [x27, 4000]
 	add	x1, x1, x2
 	mov	w2, 4
 	str	x0, [x1, 8]
@@ -3402,13 +3459,13 @@ FtlLowFormatEraseBlock:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	sdiv	w0, w0, w2
-	ldr	x2, [x27, 3976]
+	ldr	x2, [x27, 3984]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L428:
+.L439:
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L426
+	b	.L437
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
@@ -3424,9 +3481,9 @@ FtlFreeSysBlkQueueOut:
 	adrp	x23, .LC84
 	add	x23, x23, :lo12:.LC84
 	stp	x21, x22, [sp, 32]
-.L459:
+.L470:
 	ldrh	w1, [x20, 6]
-	cbz	w1, .L460
+	cbz	w1, .L471
 	ldrh	w0, [x20, 2]
 	sub	w1, w1, #1
 	strh	w1, [x20, 6]
@@ -3438,12 +3495,12 @@ FtlFreeSysBlkQueueOut:
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w22, w0, 65535
-	ldr	x0, [x19, 3960]
+	ldr	x0, [x19, 3968]
 	lsl	w1, w21, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
-	ldr	x0, [x19, 3960]
+	ldr	x0, [x19, 3968]
 	bl	FlashEraseBlocks
 	ldr	x2, [x19, 2384]
 	ubfiz	x0, x22, 1, 16
@@ -3456,26 +3513,26 @@ FtlFreeSysBlkQueueOut:
 	str	w0, [x19, 2640]
 	mov	w0, 65533
 	cmp	w0, w1, uxth
-	bcc	.L461
+	bcc	.L472
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L460:
+.L471:
 	adrp	x0, .LC83
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC83
 	bl	sftl_printk
-.L463:
-	b	.L463
-.L461:
+.L474:
+	b	.L474
+.L472:
 	ldrh	w2, [x20, 6]
 	mov	w1, w21
 	mov	x0, x23
 	bl	sftl_printk
-	b	.L459
+	b	.L470
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
@@ -3489,27 +3546,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldrh	w1, [x0, 10]
 	ldr	x0, [x0, 16]
-.L467:
+.L478:
 	cmp	w20, w1
-	beq	.L471
+	beq	.L482
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L468
+	cbnz	w2, .L479
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L469
+	bcs	.L480
 	adrp	x0, .LANCHOR0+262
 	ldrh	w2, [x0, #:lo12:.LANCHOR0+262]
 	adrp	x0, .LC85
 	add	x0, x0, :lo12:.LC85
 	bl	sftl_printk
-.L470:
-	b	.L470
-.L469:
+.L481:
+	b	.L481
+.L480:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3518,27 +3575,27 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L471:
+.L482:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L473
+	bhi	.L484
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 581
+	mov	w2, 603
 	add	x1, x1, 192
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L473:
+.L484:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L468:
+.L479:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L467
+	b	.L478
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	2
 	.global	ftl_memset
@@ -3555,7 +3612,7 @@ ftl_memset:
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -3565,31 +3622,32 @@ FtlMemInit:
 	add	x1, x19, 2560
 	add	x2, x19, 2560
 	strh	wzr, [x19, 3240]
-	strh	wzr, [x19, 3324]
 	stp	wzr, wzr, [x1, 28]
 	stp	wzr, wzr, [x1, 36]
 	str	wzr, [x19, 2604]
 	str	wzr, [x19, 2608]
 	stp	wzr, wzr, [x2, 60]
 	stp	wzr, wzr, [x2, 68]
-	str	w0, [x19, 4004]
+	str	w0, [x19, 4012]
 	mov	w0, -1
 	strh	w0, [x19, 3320]
 	strh	w0, [x19, 3322]
 	mov	w0, 32
-	str	wzr, [x19, 2640]
+	str	x23, [sp, 48]
 	strh	w0, [x19, 3232]
 	mov	w0, 128
-	str	wzr, [x19, 2644]
+	str	wzr, [x19, 2640]
 	strh	w0, [x19, 3234]
+	str	wzr, [x19, 2644]
 	str	wzr, [x19, 2648]
 	str	wzr, [x19, 3236]
 	str	wzr, [x19, 3244]
-	str	wzr, [x19, 3968]
-	str	wzr, [x19, 4000]
+	str	wzr, [x19, 3976]
 	str	wzr, [x19, 4008]
-	strh	wzr, [x19, 3362]
+	str	wzr, [x19, 4016]
+	strh	wzr, [x19, 3328]
 	ldrh	w0, [x19, 110]
+	strh	wzr, [x19, 3370]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	ldrh	w1, [x19, 110]
@@ -3603,16 +3661,16 @@ FtlMemInit:
 	lsl	w21, w21, 7
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 4016]
+	str	x0, [x19, 4024]
 	mov	w0, w22
 	bl	ftl_malloc
-	str	x0, [x19, 4024]
+	str	x0, [x19, 4032]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 4032]
+	str	x0, [x19, 4040]
 	mov	w0, w22
 	bl	ftl_malloc
-	str	x0, [x19, 3960]
+	str	x0, [x19, 3968]
 	mov	w0, w22
 	bl	ftl_malloc
 	str	x0, [x19, 3280]
@@ -3623,23 +3681,23 @@ FtlMemInit:
 	str	w0, [x19, 3288]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 3432]
+	str	x0, [x19, 3440]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 4040]
+	str	x0, [x19, 4048]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 4048]
+	str	x0, [x19, 4056]
 	ldr	w0, [x19, 3288]
 	mul	w0, w21, w0
 	bl	ftl_malloc
 	str	x0, [x19, 3264]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 3992]
+	str	x0, [x19, 4000]
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 3976]
+	str	x0, [x19, 3984]
 	ldr	w1, [x19, 3288]
 	mov	w0, 24
 	mul	w0, w1, w0
@@ -3650,10 +3708,10 @@ FtlMemInit:
 	mul	w21, w21, w0
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 3440]
+	str	x0, [x19, 3448]
 	lsl	w0, w21, 2
 	bl	ftl_malloc
-	str	x0, [x19, 3984]
+	str	x0, [x19, 3992]
 	ldrh	w1, [x19, 116]
 	ldr	w0, [x19, 3288]
 	mul	w0, w1, w0
@@ -3661,37 +3719,37 @@ FtlMemInit:
 	str	x0, [x19, 3272]
 	ldrh	w0, [x19, 46]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x19, 4056]
+	strh	w0, [x19, 4064]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	str	x0, [x19, 4064]
-	ldrh	w0, [x19, 4056]
+	str	x0, [x19, 4072]
+	ldrh	w0, [x19, 4064]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x19, 4056]
+	strh	w0, [x19, 4064]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	ldrh	w21, [x19, 46]
-	str	x0, [x19, 4072]
+	str	x0, [x19, 4080]
 	add	x0, x0, 32
 	str	x0, [x19, 2384]
 	lsl	w21, w21, 1
 	mov	w0, w21
 	bl	ftl_malloc
-	str	x0, [x19, 4080]
-	mov	w0, w21
-	bl	ftl_malloc
-	ldr	w21, [x19, 132]
-	str	x0, [x19, 2376]
-	lsl	w21, w21, 1
-	mov	w0, w21
-	bl	ftl_malloc
 	str	x0, [x19, 4088]
 	mov	w0, w21
+	bl	ftl_malloc
+	ldr	w23, [x19, 132]
 	adrp	x21, .LANCHOR3
 	add	x22, x21, :lo12:.LANCHOR3
+	str	x0, [x19, 2376]
+	lsl	w23, w23, 1
+	mov	w0, w23
 	bl	ftl_malloc
 	str	x0, [x22, -256]
+	mov	w0, w23
+	bl	ftl_malloc
+	str	x0, [x22, -248]
 	ldrh	w0, [x19, 46]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
@@ -3704,27 +3762,27 @@ FtlMemInit:
 	ldrh	w0, [x19, 124]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	str	x0, [x22, -248]
+	str	x0, [x22, -240]
 	ldrh	w0, [x19, 124]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	str	x0, [x22, -240]
+	str	x0, [x22, -232]
 	ldrh	w0, [x19, 126]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	ldrh	w2, [x19, 126]
 	mov	w1, 0
-	str	x0, [x22, -232]
+	str	x0, [x22, -224]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrh	w0, [x19, 140]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	str	x0, [x22, -224]
+	str	x0, [x22, -216]
 	ldr	w0, [x19, 132]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	str	x0, [x22, -216]
+	str	x0, [x22, -208]
 	ldrh	w0, [x19, 142]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
@@ -3733,7 +3791,7 @@ FtlMemInit:
 	ldrh	w0, [x19, 114]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	str	x0, [x22, -208]
+	str	x0, [x22, -200]
 	ldrh	w1, [x19, 46]
 	mov	w0, 6
 	mul	w0, w1, w0
@@ -3743,34 +3801,34 @@ FtlMemInit:
 	ldrh	w1, [x19, 58]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x22, -200]
+	strh	w0, [x22, -192]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w4, [x22, -200]
+	ldrh	w4, [x22, -192]
 	add	x5, x19, 200
 	ldrh	w6, [x19, 58]
 	mov	x1, 1
 	str	x0, [x19, 192]
 	mov	w2, w4
 	mov	x0, x20
-.L478:
+.L489:
 	cmp	w1, w6
-	bcc	.L479
+	bcc	.L490
 	mov	w2, 8
 	add	x4, x0, :lo12:.LANCHOR0
 	sub	w2, w2, w1
 	add	x4, x4, 160
 	add	x2, x2, 1
 	mov	x3, 0
-.L480:
+.L491:
 	add	x3, x3, 1
 	cmp	x3, x2
-	bne	.L481
-	add	x2, x0, :lo12:.LANCHOR0
-	ldr	x1, [x2, 4088]
-	cbnz	x1, .L482
-.L484:
+	bne	.L492
+	add	x1, x21, :lo12:.LANCHOR3
+	ldr	x2, [x1, -256]
+	cbnz	x2, .L493
+.L495:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 224
@@ -3778,93 +3836,94 @@ FtlMemInit:
 	add	x0, x0, :lo12:.LC86
 	bl	sftl_printk
 	mov	w0, -1
-.L477:
+.L488:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L479:
+.L490:
 	ldr	x3, [x19, 192]
 	add	w1, w1, 1
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x5], 8
-	b	.L478
-.L481:
+	b	.L489
+.L492:
 	add	x5, x1, x3
 	add	x5, x4, x5, lsl 3
 	str	xzr, [x5, 24]
-	b	.L480
-.L482:
-	add	x1, x21, :lo12:.LANCHOR3
-	ldr	x3, [x1, -256]
-	cbz	x3, .L484
-	ldr	x3, [x1, -224]
-	cbz	x3, .L484
-	ldr	x3, [x1, -216]
-	cbz	x3, .L484
+	b	.L491
+.L493:
+	ldr	x2, [x1, -248]
+	cbz	x2, .L495
+	ldr	x2, [x1, -216]
+	cbz	x2, .L495
+	ldr	x2, [x1, -208]
+	cbz	x2, .L495
+	add	x2, x0, :lo12:.LANCHOR0
 	ldr	x3, [x2, 2568]
-	cbz	x3, .L484
-	ldr	x1, [x1, -208]
-	cbz	x1, .L484
+	cbz	x3, .L495
+	ldr	x1, [x1, -200]
+	cbz	x1, .L495
 	ldr	x1, [x2, 2360]
-	cbz	x1, .L484
+	cbz	x1, .L495
 	ldr	x1, [x2, 192]
-	cbz	x1, .L484
+	cbz	x1, .L495
 	ldr	x1, [x2, 2376]
-	cbz	x1, .L484
-	add	x1, x0, :lo12:.LANCHOR0
-	ldr	x2, [x1, 3296]
-	cbz	x2, .L484
+	cbz	x1, .L495
+	mov	x1, x2
+	ldr	x2, [x2, 3296]
+	cbz	x2, .L495
 	ldr	x2, [x1, 3312]
-	cbz	x2, .L484
-	ldr	x2, [x1, 4016]
-	cbz	x2, .L484
-	ldr	x2, [x1, 4032]
-	cbz	x2, .L484
-	ldr	x2, [x1, 3960]
-	cbz	x2, .L484
-	ldr	x2, [x1, 3280]
-	cbz	x2, .L484
+	cbz	x2, .L495
 	ldr	x2, [x1, 4024]
-	cbz	x2, .L484
-	ldr	x2, [x1, 3432]
-	cbz	x2, .L484
+	cbz	x2, .L495
 	ldr	x2, [x1, 4040]
-	cbz	x2, .L484
-	ldr	x1, [x1, 4048]
-	cbz	x1, .L484
+	cbz	x2, .L495
+	ldr	x2, [x1, 3968]
+	cbz	x2, .L495
+	ldr	x2, [x1, 3280]
+	cbz	x2, .L495
+	ldr	x2, [x1, 4032]
+	cbz	x2, .L495
+	ldr	x2, [x1, 3440]
+	cbz	x2, .L495
+	ldr	x2, [x1, 4048]
+	cbz	x2, .L495
+	ldr	x1, [x1, 4056]
+	cbz	x1, .L495
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x1, [x0, 3264]
-	cbz	x1, .L484
-	ldr	x1, [x0, 3992]
-	cbz	x1, .L484
-	ldr	x1, [x0, 3976]
-	cbz	x1, .L484
-	ldr	x1, [x0, 3256]
-	cbz	x1, .L484
-	ldr	x1, [x0, 3440]
-	cbz	x1, .L484
+	cbz	x1, .L495
+	ldr	x1, [x0, 4000]
+	cbz	x1, .L495
 	ldr	x1, [x0, 3984]
-	cbz	x1, .L484
+	cbz	x1, .L495
+	ldr	x1, [x0, 3256]
+	cbz	x1, .L495
+	ldr	x1, [x0, 3448]
+	cbz	x1, .L495
+	ldr	x1, [x0, 3992]
+	cbz	x1, .L495
 	ldr	x1, [x0, 3272]
-	cbz	x1, .L484
+	cbz	x1, .L495
 	ldr	x1, [x0, 2384]
-	cbz	x1, .L484
-	ldr	x1, [x0, 4064]
-	cbz	x1, .L484
+	cbz	x1, .L495
+	ldr	x1, [x0, 4072]
+	cbz	x1, .L495
 	ldr	x0, [x0, 152]
-	cbz	x0, .L484
+	cbz	x0, .L495
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldr	x1, [x0, -248]
-	cbz	x1, .L484
 	ldr	x1, [x0, -240]
-	cbz	x1, .L484
-	ldr	x0, [x0, -232]
-	cbz	x0, .L484
+	cbz	x1, .L495
+	ldr	x1, [x0, -232]
+	cbz	x1, .L495
+	ldr	x0, [x0, -224]
+	cbz	x0, .L495
 	mov	w0, 0
-	b	.L477
+	b	.L488
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -3874,11 +3933,11 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	adrp	x0, .LANCHOR3-200
+	adrp	x0, .LANCHOR3-192
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR1
 	add	x20, x20, :lo12:.LANCHOR1
-	ldrh	w2, [x0, #:lo12:.LANCHOR3-200]
+	ldrh	w2, [x0, #:lo12:.LANCHOR3-192]
 	add	x20, x20, 240
 	str	x23, [sp, 48]
 	adrp	x23, .LANCHOR0
@@ -3889,20 +3948,20 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.L582:
+.L593:
 	ldrh	w0, [x22, x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L579
+	beq	.L590
 	ldrh	w1, [x23, 102]
 	cmp	w1, w0
-	bhi	.L581
+	bhi	.L592
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L581:
+.L592:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -3913,8 +3972,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x21, x0]
 	orr	w1, w1, w2
 	str	w1, [x21, x0]
-	bne	.L582
-.L579:
+	bne	.L593
+.L590:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -3960,115 +4019,6 @@ FtlFreeSysBlkQueueInit:
 	ret
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	and	x19, x1, 65535
-	adrp	x0, .LANCHOR0
-	add	x1, x0, :lo12:.LANCHOR0
-	stp	x23, x24, [sp, 48]
-	stp	x21, x22, [sp, 32]
-	mov	x24, x0
-	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x1, 140]
-	cmp	w1, w20
-	bcs	.L591
-	adrp	x1, .LANCHOR1
-	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC1
-	mov	w2, 492
-	add	x1, x1, 256
-	add	x0, x0, :lo12:.LC1
-	bl	sftl_printk
-.L591:
-	adrp	x22, .LANCHOR3
-	add	x22, x22, :lo12:.LANCHOR3
-	ubfiz	x0, x20, 2, 16
-	ldr	x1, [x22, -224]
-	ldr	w25, [x1, x0]
-	cbnz	w25, .L592
-	add	x24, x24, :lo12:.LANCHOR0
-	lsl	x19, x19, 4
-	mov	w1, 255
-	ldr	x0, [x24, 2568]
-	ldrh	w2, [x24, 114]
-	add	x0, x0, x19
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x24, 2568]
-	strh	w20, [x0, x19]
-	ldr	x0, [x24, 2568]
-	add	x19, x0, x19
-	str	wzr, [x19, 4]
-.L593:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L592:
-	add	x23, x24, :lo12:.LANCHOR0
-	lsl	x19, x19, 4
-	add	x21, x23, 3400
-	mov	w2, 1
-	mov	w1, w2
-	ldr	x0, [x23, 2568]
-	str	w25, [x23, 3404]
-	add	x0, x0, x19
-	ldr	x0, [x0, 8]
-	str	x0, [x23, 3408]
-	ldr	x0, [x23, 3440]
-	str	x0, [x23, 3416]
-	mov	x0, x21
-	bl	FlashReadPages
-	ldr	x26, [x23, 3416]
-	ldrh	w0, [x26, 8]
-	cmp	w0, w20
-	beq	.L594
-	mov	w2, w25
-	mov	w1, w20
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
-	bl	sftl_printk
-	ldr	x1, [x23, 3416]
-	mov	w3, 4
-	adrp	x0, .LC88
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC88
-	bl	rknand_print_hex
-	ldrh	w3, [x23, 140]
-	adrp	x0, .LC89
-	ldr	x1, [x22, -224]
-	mov	w2, 4
-	add	x0, x0, :lo12:.LC89
-	bl	rknand_print_hex
-.L594:
-	ldrh	w0, [x26, 8]
-	cmp	w0, w20
-	beq	.L595
-	adrp	x1, .LANCHOR1
-	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC1
-	mov	w2, 513
-	add	x1, x1, 256
-	add	x0, x0, :lo12:.LC1
-	bl	sftl_printk
-.L595:
-	add	x0, x24, :lo12:.LANCHOR0
-	ldr	x1, [x0, 2568]
-	add	x1, x1, x19
-	str	wzr, [x1, 4]
-	ldr	x0, [x0, 2568]
-	strh	w20, [x0, x19]
-	b	.L593
-	.size	load_l2p_region, .-load_l2p_region
-	.align	2
 	.global	ftl_free_no_use_map_blk
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
@@ -4087,19 +4037,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L598:
+.L602:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L602
+	bhi	.L606
 	ldrh	w26, [x21]
 	adrp	x24, .LANCHOR0
 	add	x24, x24, :lo12:.LANCHOR0
 	mov	w25, 0
 	mov	w20, 0
-.L603:
+.L607:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L607
+	bhi	.L611
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4107,61 +4057,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L602:
+.L606:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L599:
+.L603:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L601
+	bhi	.L605
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L598
-.L601:
+	b	.L602
+.L605:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L600
+	bne	.L604
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L600:
+.L604:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L599
-.L607:
+	b	.L603
+.L611:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L604
+	bne	.L608
 	ldrh	w0, [x24, 108]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L604
+	bcs	.L608
 	strh	w0, [x21, x22, lsl 1]
-.L604:
+.L608:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L605
+	bls	.L609
 	mov	w25, w20
 	mov	w26, w0
-.L605:
-	cbnz	w0, .L606
+.L609:
+	cbnz	w0, .L610
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L606
+	cbz	w0, .L610
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L606:
+.L610:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L603
+	b	.L607
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
@@ -4177,17 +4127,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x0, 16]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L613
+	bne	.L617
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L614
+	cbz	w0, .L618
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 641
-	add	x1, x1, 272
+	mov	w2, 677
+	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L614:
+.L618:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -4198,14 +4148,14 @@ Ftl_write_map_blk_to_last_page:
 	strh	wzr, [x19]
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-.L615:
+.L619:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L613:
+.L617:
 	ubfiz	x0, x0, 1, 16
 	adrp	x21, .LANCHOR0
 	ldr	w1, [x19, 48]
@@ -4214,11 +4164,11 @@ Ftl_write_map_blk_to_last_page:
 	add	x20, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2]
 	orr	w0, w0, w22, lsl 10
-	str	w0, [x20, 3404]
-	ldr	x0, [x20, 3432]
-	str	x0, [x20, 3408]
+	str	w0, [x20, 3412]
 	ldr	x0, [x20, 3440]
 	str	x0, [x20, 3416]
+	ldr	x0, [x20, 3448]
+	str	x0, [x20, 3424]
 	str	w1, [x0, 4]
 	mov	w1, -1291
 	strh	w1, [x0, 8]
@@ -4227,45 +4177,45 @@ Ftl_write_map_blk_to_last_page:
 	strh	w22, [x0, 2]
 	mov	w1, 255
 	ldrh	w2, [x20, 108]
-	ldr	x0, [x20, 3432]
+	ldr	x0, [x20, 3440]
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	mov	w0, 0
 	mov	w1, 0
-.L616:
+.L620:
 	ldrh	w2, [x19, 6]
 	cmp	w2, w1
-	bhi	.L618
+	bhi	.L622
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x0, 3400
+	add	x0, x0, 3408
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L615
-.L618:
+	b	.L619
+.L622:
 	ubfiz	x2, x1, 2, 16
 	ldr	w3, [x23, x2]
 	cmp	w22, w3, lsr 10
-	bne	.L617
+	bne	.L621
 	add	w0, w0, 1
-	ldr	x4, [x20, 3432]
+	ldr	x4, [x20, 3440]
 	and	w0, w0, 65535
 	ubfiz	x3, x0, 3, 16
 	str	w1, [x4, x3]
 	ldr	w4, [x23, x2]
-	ldr	x2, [x20, 3432]
+	ldr	x2, [x20, 3440]
 	add	x2, x2, x3
 	str	w4, [x2, 4]
-.L617:
+.L621:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L616
+	b	.L620
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
@@ -4274,22 +4224,22 @@ FtlMapWritePage:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR0
-	add	x24, x23, :lo12:.LANCHOR0
+	adrp	x24, .LANCHOR0
+	stp	x25, x26, [sp, 64]
+	add	x25, x24, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR1
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR1
 	stp	x27, x28, [sp, 80]
 	mov	w26, w1
 	mov	x27, x2
-	mov	x25, x23
-	add	x22, x22, :lo12:.LANCHOR1
-	add	x20, x24, 3400
-	mov	w21, 0
-.L624:
-	add	x0, x23, :lo12:.LANCHOR0
+	mov	x21, x24
+	add	x23, x23, :lo12:.LANCHOR1
+	add	x20, x25, 3408
+	mov	w22, 0
+.L628:
+	add	x0, x24, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2604]
 	add	w1, w1, 1
 	str	w1, [x0, 2604]
@@ -4297,35 +4247,35 @@ FtlMapWritePage:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L625
+	bge	.L629
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L626
-.L625:
+	bne	.L630
+.L629:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L626:
+.L630:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L627
+	cbnz	w0, .L631
 	adrp	x0, .LC1
-	mov	w2, 699
-	add	x1, x22, 304
+	mov	w2, 735
+	add	x1, x23, 288
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L627:
+.L631:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L628
+	bcc	.L632
 	adrp	x0, .LC1
-	mov	w2, 700
-	add	x1, x22, 304
+	mov	w2, 736
+	add	x1, x23, 288
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L628:
+.L632:
 	ldrh	w1, [x19]
 	mov	w2, 16
 	ldr	x0, [x19, 16]
@@ -4335,7 +4285,7 @@ FtlMapWritePage:
 	str	x27, [x20, 8]
 	orr	w0, w0, w28, lsl 10
 	str	w0, [x20, 4]
-	ldr	x0, [x24, 3440]
+	ldr	x0, [x25, 3448]
 	str	x0, [x20, 16]
 	bl	ftl_memset
 	ldr	x0, [x20, 16]
@@ -4356,40 +4306,46 @@ FtlMapWritePage:
 	strh	w0, [x19, 2]
 	ldr	w1, [x20]
 	cmn	w1, #1
-	bne	.L629
+	bne	.L633
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	add	w21, w21, 1
-	and	w21, w21, 65535
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	add	w22, w22, 1
+	and	w22, w22, 65535
 	bl	sftl_printk
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L630
-	ldrh	w0, [x24, 108]
+	bhi	.L634
+	ldrh	w0, [x25, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L630:
-	cmp	w21, 3
-	bls	.L631
-	add	x25, x25, :lo12:.LANCHOR0
-	adrp	x0, .LC91
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC91
-	ldr	w1, [x25, 3404]
+.L634:
+	cmp	w22, 3
+	bls	.L635
+	add	x21, x21, :lo12:.LANCHOR0
+	adrp	x0, .LC88
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC88
+	ldr	w1, [x21, 3412]
 	bl	sftl_printk
-.L632:
-	b	.L632
-.L631:
+.L636:
+	b	.L636
+.L635:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L624
-.L641:
-	b	.L641
-.L629:
+	cbz	w0, .L628
+.L653:
+	b	.L653
+.L633:
+	cbz	w1, .L639
+	strh	w28, [x19, 60]
 	cmp	w0, 1
-	beq	.L624
+	beq	.L628
+	cmp	w1, 256
+.L656:
+	beq	.L628
 	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
+	add	x21, x21, :lo12:.LANCHOR0
+	ldr	w1, [x21, 3412]
 	str	w1, [x0, w26, uxtw 2]
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -4399,70 +4355,220 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
+.L639:
+	cmp	w0, 1
+	b	.L656
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
-	.global	ftl_map_blk_gc
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	stp	x29, x30, [sp, -96]!
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	adrp	x19, .LANCHOR0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR0
+	and	w21, w0, 65535
+	add	x0, x19, :lo12:.LANCHOR0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldr	x20, [x0, 16]
-	ldr	x25, [x0, 40]
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19, 10]
-	ldrh	w2, [x19, 8]
-	sub	w1, w1, #4
-	cmp	w2, w1
-	blt	.L644
-	ubfiz	x0, x0, 1, 16
-	ldrh	w24, [x20, x0]
-	cbz	w24, .L644
-	ldr	w1, [x19, 52]
-	cbnz	w1, .L644
-	mov	w1, 1
-	str	w1, [x19, 52]
-	strh	wzr, [x20, x0]
-	ldrh	w0, [x19, 8]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	strh	w0, [x19, 8]
-	add	x0, x22, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 108]
-	cmp	w1, w0
-	bcc	.L645
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L645:
-	add	x26, x22, :lo12:.LANCHOR0
-	adrp	x23, .LANCHOR1
-	add	x23, x23, :lo12:.LANCHOR1
-	add	x21, x26, 3400
-	add	x23, x23, 320
+	and	x20, x1, 65535
+	ldrh	w0, [x0, 140]
+	cmp	w0, w21
+	bcs	.L658
+	adrp	x1, .LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR1
+	adrp	x0, .LC1
+	mov	w2, 510
+	add	x1, x1, 304
+	add	x0, x0, :lo12:.LC1
+	bl	sftl_printk
+.L658:
+	adrp	x22, .LANCHOR3
+	add	x26, x22, :lo12:.LANCHOR3
+	ubfiz	x0, x21, 2, 16
+	ldr	x1, [x26, -216]
+	ldr	w23, [x1, x0]
+	cbnz	w23, .L659
+	add	x19, x19, :lo12:.LANCHOR0
+	lsl	x20, x20, 4
+	mov	w1, 255
+	ldr	x0, [x19, 2568]
+	ldrh	w2, [x19, 114]
+	add	x0, x0, x20
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x19, 2568]
+	strh	w21, [x0, x20]
+	ldr	x0, [x19, 2568]
+	add	x20, x0, x20
+	str	wzr, [x20, 4]
+.L660:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L659:
+	add	x24, x19, :lo12:.LANCHOR0
+	lsl	x20, x20, 4
+	add	x25, x24, 3408
+	mov	w2, 1
+	mov	w1, w2
+	ldr	x0, [x24, 2568]
+	str	w23, [x24, 3412]
+	add	x0, x0, x20
+	ldr	x0, [x0, 8]
+	str	x0, [x24, 3416]
+	ldr	x0, [x24, 3448]
+	str	x0, [x24, 3424]
+	mov	x0, x25
+	bl	FlashReadPages
+	ldr	x25, [x24, 3424]
+	ldr	w0, [x24, 3408]
+	cmp	w0, 256
+	bne	.L661
+	mov	w2, w23
+	mov	w1, w21
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
+	bl	sftl_printk
+	lsr	w0, w23, 10
+	strh	w0, [x26, -124]
+	ldr	x0, [x24, 2568]
+	mov	w1, w21
+	add	x0, x0, x20
+	ldr	x2, [x0, 8]
+	sub	x0, x26, #184
+	bl	FtlMapWritePage
+.L661:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L662
+	mov	w2, w23
+	add	x23, x19, :lo12:.LANCHOR0
+	mov	w1, w21
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
+	bl	sftl_printk
+	ldr	x1, [x23, 3424]
+	add	x22, x22, :lo12:.LANCHOR3
+	mov	w3, 4
+	adrp	x0, .LC91
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC91
+	bl	rknand_print_hex
+	ldrh	w3, [x23, 140]
+	adrp	x0, .LC92
+	ldr	x1, [x22, -216]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC92
+	bl	rknand_print_hex
+.L662:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L663
+	adrp	x1, .LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR1
+	adrp	x0, .LC1
+	mov	w2, 535
+	add	x1, x1, 304
+	add	x0, x0, :lo12:.LC1
+	bl	sftl_printk
+.L663:
+	add	x19, x19, :lo12:.LANCHOR0
+	ldr	x0, [x19, 2568]
+	add	x0, x0, x20
+	str	wzr, [x0, 4]
+	ldr	x0, [x19, 2568]
+	strh	w21, [x0, x20]
+	b	.L660
+	.size	load_l2p_region, .-load_l2p_region
+	.align	2
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x22, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w4, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w4, #4
+	cmp	w2, w1
+	ldrh	w1, [x19, 60]
+	bge	.L666
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L668
+	add	x2, x21, :lo12:.LANCHOR0
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x2, 108]
+	cmp	w3, w2
+	bcc	.L669
+.L666:
+	mov	w2, 65535
+	and	w0, w0, 65535
+	cmp	w1, w2
+	beq	.L670
+	add	x2, x21, :lo12:.LANCHOR0
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x2, 108]
+	cmp	w2, w3
+	bls	.L671
+.L670:
+	ubfiz	x0, x0, 1, 32
+	ldrh	w26, [x20, x0]
+	cbz	w26, .L668
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L668
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 108]
+	cmp	w1, w0
+	bcc	.L676
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L676:
+	add	x27, x21, :lo12:.LANCHOR0
+	adrp	x24, .LANCHOR1
+	add	x24, x24, :lo12:.LANCHOR1
+	add	x23, x27, 3408
+	add	x24, x24, 320
 	mov	w20, 0
-.L646:
+.L677:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L650
+	bhi	.L684
 	mov	w1, 1
-	mov	w0, w24
+	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L644:
-	add	x22, x22, :lo12:.LANCHOR0
+.L668:
+	add	x21, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x22, 108]
+	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bcc	.L651
+	bcc	.L669
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L651:
+.L669:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4471,43 +4577,77 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L650:
-	ubfiz	x27, x20, 2, 16
-	ldr	w0, [x25, x27]
-	cmp	w24, w0, lsr 10
-	bne	.L647
-	ldr	x28, [x26, 3440]
+.L674:
+	ldrh	w6, [x20, x2, lsl 1]
+	add	x5, x2, 1
+	cmp	w6, w1
+	beq	.L672
+	mov	x2, x5
+.L673:
+	and	w23, w2, 65535
+	cmp	w23, w4
+	bcc	.L674
+	mov	w23, w0
+.L672:
+	and	x2, x2, 65535
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	ldrh	w2, [x20, x2, lsl 1]
+	bl	sftl_printk
+	mov	w0, -1
+	strh	w0, [x19, 60]
+	mov	w0, w23
+	b	.L670
+.L671:
+	mov	x2, 0
+	b	.L673
+.L684:
+	ubfiz	x0, x20, 2, 16
+	add	x28, x22, x0
+	ldr	w1, [x22, x0]
+	cmp	w26, w1, lsr 10
+	bne	.L678
+	ldr	x25, [x27, 3448]
 	mov	w2, 1
-	ldr	x0, [x26, 4040]
+	ldr	x1, [x27, 4048]
+	stp	x1, x25, [x23, 8]
 	mov	w1, w2
-	stp	x0, x28, [x21, 8]
-	ldr	w0, [x25, x27]
-	str	w0, [x21, 4]
-	mov	x0, x21
+	ldr	w0, [x22, x0]
+	str	w0, [x23, 4]
+	mov	x0, x23
 	bl	FlashReadPages
-	ldrh	w0, [x28, 8]
+	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L648
+	beq	.L679
 	adrp	x0, .LC1
-	mov	w2, 613
-	mov	x1, x23
+	mov	w2, 647
+	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L648:
-	ldr	w0, [x21]
+.L679:
+	ldr	w0, [x23]
 	cmn	w0, #1
-	bne	.L649
-	str	wzr, [x25, x27]
-.L647:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L646
-.L649:
-	ldr	x2, [x21, 8]
+	bne	.L680
+.L682:
+	str	wzr, [x28]
+.L681:
+	b	.L681
+.L680:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	bne	.L682
+	ldrh	w1, [x25]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L682
+	ldr	x2, [x23, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L647
+.L678:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L677
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
 	.global	flush_l2p_region
@@ -4525,7 +4665,7 @@ flush_l2p_region:
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #192
+	sub	x0, x0, #184
 	bl	FtlMapWritePage
 	ldr	x0, [x19, 2568]
 	add	x0, x0, x20
@@ -4562,23 +4702,23 @@ log2phys:
 	and	w19, w19, w0
 	cmp	w0, w1
 	and	x19, x19, 65535
-	bcc	.L659
+	bcc	.L693
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 808
+	mov	w2, 847
 	add	x1, x1, 336
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L659:
+.L693:
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 142]
 	ldr	x2, [x0, 2568]
 	mov	x0, 0
-.L660:
+.L694:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L665
+	bcc	.L699
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	add	x2, x24, :lo12:.LANCHOR0
@@ -4589,39 +4729,39 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L666
+	beq	.L700
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L666
+	tbz	w1, #31, .L700
 	bl	flush_l2p_region
-.L666:
+.L700:
 	mov	w1, w25
 	mov	w0, w21
 	bl	load_l2p_region
-	b	.L661
-.L665:
+	b	.L695
+.L699:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w21
-	bne	.L660
-.L661:
-	cbnz	w23, .L662
+	bne	.L694
+.L695:
+	cbnz	w23, .L696
 	add	x0, x24, :lo12:.LANCHOR0
 	ldr	x0, [x0, 2568]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x22]
-.L663:
+.L697:
 	add	x24, x24, :lo12:.LANCHOR0
 	ldr	x0, [x24, 2568]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L668
+	beq	.L702
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L668:
+.L702:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4629,7 +4769,7 @@ log2phys:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L662:
+.L696:
 	add	x2, x24, :lo12:.LANCHOR0
 	lsl	x0, x20, 4
 	mov	x1, x0
@@ -4644,7 +4784,7 @@ log2phys:
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	b	.L663
+	b	.L697
 	.size	log2phys, .-log2phys
 	.align	2
 	.global	FtlReUsePrevPpa
@@ -4665,9 +4805,9 @@ FtlReUsePrevPpa:
 	ubfiz	x20, x0, 1, 16
 	ldr	x3, [x2, 2376]
 	ldrh	w1, [x3, x20]
-	cbnz	w1, .L674
+	cbnz	w1, .L708
 	ldr	x19, [x2, 2408]
-	cbz	x19, .L675
+	cbz	x19, .L709
 	ldrh	w3, [x2, 2416]
 	mov	x4, -6148914691236517206
 	ldr	x2, [x2, 2360]
@@ -4678,25 +4818,25 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x4
 	mov	w4, 6
 	and	w19, w19, 65535
-.L676:
+.L710:
 	cmp	w1, w3
-	beq	.L675
+	beq	.L709
 	cmp	w19, w0
-	bne	.L677
+	bne	.L711
 	add	x23, x22, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x23, 2408
 	bl	List_remove_node
 	ldrh	w0, [x23, 2416]
-	cbnz	w0, .L678
+	cbnz	w0, .L712
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1688
+	mov	w2, 1737
 	add	x1, x1, 352
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L678:
+.L712:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 2416]
 	sub	w0, w0, #1
@@ -4707,7 +4847,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L675:
+.L709:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -4717,27 +4857,27 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L677:
+.L711:
 	umull	x19, w19, w4
 	ldrh	w19, [x2, x19]
 	cmp	w19, w5
-	beq	.L675
+	beq	.L709
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L676
-.L674:
+	b	.L710
+.L708:
 	add	w1, w1, 1
 	strh	w1, [x3, x20]
-	b	.L675
+	b	.L709
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	2
 	.global	ftl_scan_all_data
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	sub	sp, sp, #96
-	adrp	x0, .LC92
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
@@ -4746,40 +4886,40 @@ ftl_scan_all_data:
 	stp	x19, x20, [sp, 32]
 	str	x23, [sp, 64]
 	mov	w20, 0
-	add	x19, x21, 3400
+	add	x19, x21, 3408
 	bl	sftl_printk
-.L685:
+.L719:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	w0, [x0, 2584]
 	cmp	w20, w0
-	bcc	.L691
+	bcc	.L725
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L691:
+.L725:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w20
 	bl	log2phys
 	tst	x20, 2047
-	bne	.L686
+	bne	.L720
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC93
+	adrp	x0, .LC95
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC93
+	add	x0, x0, :lo12:.LC95
 	bl	sftl_printk
-.L686:
+.L720:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L688
-	ldr	x23, [x21, 3440]
+	beq	.L722
+	ldr	x23, [x21, 3448]
 	mov	w2, 0
 	stp	wzr, w0, [x19]
 	mov	w1, 1
-	ldr	x0, [x21, 3432]
+	ldr	x0, [x21, 3440]
 	str	x0, [x19, 8]
 	mov	x0, x19
 	str	x23, [x19, 16]
@@ -4788,25 +4928,25 @@ ftl_scan_all_data:
 	ldr	w0, [x19]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L689
+	beq	.L723
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L688
-.L689:
+	beq	.L722
+.L723:
 	ldp	x1, x0, [x19, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC94
+	adrp	x0, .LC96
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC96
 	ldr	w2, [x19, 4]
 	mov	w1, w20
 	bl	sftl_printk
-.L688:
+.L722:
 	add	w20, w20, 1
-	b	.L685
+	b	.L719
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -4816,22 +4956,22 @@ FtlReadRefresh:
 	add	x1, x0, :lo12:.LANCHOR0
 	add	x2, x1, 2720
 	ldr	w3, [x2, 80]
-	cbz	w3, .L694
+	cbz	w3, .L728
 	ldr	w0, [x1, 2584]
 	ldr	w3, [x2, 84]
 	cmp	w3, w0
-	bcs	.L695
+	bcs	.L729
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x1
 	mov	w20, 2048
 	str	x21, [sp, 32]
-.L700:
+.L734:
 	ldr	w1, [x19, 2584]
 	ldr	w0, [x19, 2804]
 	cmp	w0, w1
-	bcs	.L697
+	bcs	.L731
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
@@ -4840,7 +4980,7 @@ FtlReadRefresh:
 	add	w0, w0, 1
 	str	w0, [x19, 2804]
 	cmn	w1, #1
-	beq	.L698
+	beq	.L732
 	str	w0, [x29, 88]
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
@@ -4855,57 +4995,57 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L697
+	bne	.L731
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L697:
+.L731:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	ret
-.L698:
+.L732:
 	subs	w20, w20, #1
-	bne	.L700
-	b	.L697
-.L695:
+	bne	.L734
+	b	.L731
+.L729:
 	ldr	w0, [x1, 2588]
 	stp	w0, wzr, [x2, 76]
 	str	wzr, [x2, 84]
-.L704:
+.L738:
 	mov	w0, 0
 	ret
-.L694:
+.L728:
 	ldr	w3, [x1, 2588]
 	ldr	w5, [x2, 76]
 	add	w2, w3, 1048576
 	cmp	w5, w2
-	bhi	.L703
+	bhi	.L737
 	ldr	w2, [x1, 2644]
 	lsr	w4, w2, 10
 	mov	w2, 33554432
 	asr	w2, w2, w4
 	add	w2, w2, w5
 	cmp	w3, w2
-	bhi	.L703
+	bhi	.L737
 	ldrb	w1, [x1, 2340]
-	cbnz	w1, .L704
-.L703:
+	cbnz	w1, .L738
+.L737:
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 1
 	str	w3, [x0, 2796]
 	str	w1, [x0, 2800]
 	str	wzr, [x0, 2804]
-	b	.L704
+	b	.L738
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L718
+	cbz	w1, .L752
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR0
 	add	x2, x1, :lo12:.LANCHOR0
@@ -4913,12 +5053,12 @@ FtlMapBlkWriteDump_data:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	str	x21, [sp, 32]
-	add	x0, x2, 3400
+	add	x0, x2, 3408
 	mov	x21, x1
 	ldrh	w20, [x19, 6]
-	ldr	x4, [x2, 3440]
+	ldr	x4, [x2, 3448]
 	sub	w20, w20, #1
-	ldr	x3, [x2, 4040]
+	ldr	x3, [x2, 4048]
 	and	w20, w20, 65535
 	ldr	x5, [x19, 40]
 	stp	x3, x4, [x0, 8]
@@ -4926,27 +5066,27 @@ FtlMapBlkWriteDump_data:
 	str	wzr, [x19, 56]
 	ldr	w4, [x5, x4]
 	str	w4, [x0, 4]
-	cbz	w4, .L712
+	cbz	w4, .L746
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L713:
+.L747:
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	x0, x19
-	ldr	x2, [x1, 3408]
+	ldr	x2, [x1, 3416]
 	mov	w1, w20
 	bl	FtlMapWritePage
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L712:
+.L746:
 	ldrh	w2, [x2, 114]
 	mov	w1, 255
 	mov	x0, x3
 	bl	ftl_memset
-	b	.L713
-.L718:
+	b	.L747
+.L752:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
@@ -4966,20 +5106,20 @@ FtlScanSysBlk:
 	add	x19, x22, :lo12:.LANCHOR0
 	stp	x27, x28, [sp, 80]
 	adrp	x25, .LANCHOR1
-	strh	wzr, [x21, -128]
+	strh	wzr, [x21, -120]
 	add	x25, x25, :lo12:.LANCHOR1
-	ldr	x0, [x21, -216]
+	ldr	x0, [x21, -208]
 	add	x25, x25, 368
 	ldr	w2, [x19, 132]
 	strh	wzr, [x19, 148]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x19, 4088]
+	ldr	x0, [x21, -256]
 	mov	w1, 0
 	ldr	w2, [x19, 132]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x21, -240]
+	ldr	x0, [x21, -232]
 	mov	w1, 0
 	ldrh	w2, [x19, 124]
 	lsl	w2, w2, 2
@@ -4994,30 +5134,30 @@ FtlScanSysBlk:
 	add	x0, x19, 2656
 	bl	ftl_memset
 	ldrh	w24, [x19, 44]
-.L722:
+.L756:
 	ldrh	w0, [x19, 46]
 	cmp	w0, w24
-	bls	.L762
+	bls	.L796
 	ldrh	w9, [x19, 36]
 	mov	x5, 0
 	ldrh	w8, [x19, 116]
 	mov	w21, 0
 	add	x7, x19, 64
 	mov	w6, 4
-	b	.L763
-.L724:
+	b	.L797
+.L758:
 	ldrb	w0, [x7, x5]
 	mov	w1, w24
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L723
-	ldr	x0, [x19, 4016]
+	cbnz	w0, .L757
+	ldr	x0, [x19, 4024]
 	ubfiz	x2, x21, 5, 16
 	lsl	w4, w4, 10
 	add	x0, x0, x2
 	str	w4, [x0, 4]
-	ldr	x1, [x19, 4016]
+	ldr	x1, [x19, 4024]
 	ldr	x0, [x19, 3264]
 	add	x1, x1, x2
 	ldr	x2, [x19, 3272]
@@ -5028,37 +5168,37 @@ FtlScanSysBlk:
 	sdiv	w0, w0, w6
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L723:
+.L757:
 	add	x5, x5, 1
-.L763:
+.L797:
 	cmp	w9, w5, uxth
-	bhi	.L724
-	cbnz	w21, .L725
-.L761:
+	bhi	.L758
+	cbnz	w21, .L759
+.L795:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L722
-.L725:
-	ldr	x0, [x19, 4016]
+	b	.L756
+.L759:
+	ldr	x0, [x19, 4024]
 	mov	w1, w21
 	mov	w2, 1
 	ubfiz	x21, x21, 5, 16
 	mov	x23, 0
 	add	x28, x19, 2656
 	bl	FlashReadPages
-.L760:
-	ldr	x0, [x19, 4016]
+.L794:
+	ldr	x0, [x19, 4024]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
 	ldr	w26, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x26, 10, 16
-	bne	.L728
+	bne	.L762
 	mov	w3, 16
 	mov	w4, 65535
-.L730:
-	ldr	x0, [x19, 4016]
+.L764:
+	ldr	x0, [x19, 4024]
 	mov	w2, 1
 	stp	w4, w3, [x29, 104]
 	add	x0, x0, x23
@@ -5066,220 +5206,220 @@ FtlScanSysBlk:
 	add	w1, w1, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
-	ldr	x0, [x19, 4016]
+	ldr	x0, [x19, 4024]
 	add	x0, x0, x23
 	bl	FlashReadPages
 	ldp	w4, w3, [x29, 104]
 	ldrh	w0, [x27]
 	cmp	w0, w4
-	ldr	x0, [x19, 4016]
-	bne	.L727
+	ldr	x0, [x19, 4024]
+	bne	.L761
 	mov	w1, -1
 	str	w1, [x0, x23]
-	ldr	x0, [x19, 4016]
+	ldr	x0, [x19, 4024]
 	ldr	w0, [x0, x23]
 	cmp	w0, w1
-	bne	.L728
-.L729:
+	bne	.L762
+.L763:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L733
-.L727:
+	b	.L767
+.L761:
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	bne	.L728
+	bne	.L762
 	sub	w3, w3, #1
 	ands	w3, w3, 65535
-	bne	.L730
-	b	.L729
-.L728:
+	bne	.L764
+	b	.L763
+.L762:
 	ldr	w1, [x19, 2620]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L731
+	beq	.L765
 	cmp	w1, w0
-	bhi	.L732
-.L731:
+	bhi	.L766
+.L765:
 	cmn	w0, #1
-	beq	.L732
+	beq	.L766
 	add	w1, w0, 1
 	str	w1, [x19, 2620]
-.L732:
+.L766:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L734
-	bhi	.L735
+	beq	.L768
+	bhi	.L769
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L736
-.L733:
+	beq	.L770
+.L767:
 	add	x23, x23, 32
 	cmp	x21, x23
-	bne	.L760
-	b	.L761
-.L735:
+	bne	.L794
+	b	.L795
+.L769:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L737
+	beq	.L771
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L729
-	b	.L733
-.L737:
+	beq	.L763
+	b	.L767
+.L771:
 	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w1, [x0, -128]
+	ldrh	w1, [x0, -120]
 	ldr	w0, [x19, 132]
 	cmp	w1, w0
-	bls	.L739
+	bls	.L773
 	adrp	x0, .LC1
-	mov	w2, 1211
+	mov	w2, 1256
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L739:
+.L773:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldr	w3, [x19, 132]
 	and	w2, w3, 65535
-	ldrh	w1, [x4, -128]
+	ldrh	w1, [x4, -120]
 	sub	w0, w2, #1
-	ldr	x4, [x4, -216]
+	ldr	x4, [x4, -208]
 	sxth	x0, w0
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	sxth	w2, w2
-.L740:
+.L774:
 	cmp	w0, w2
-	bgt	.L746
-	tbz	w0, #31, .L780
-	b	.L733
-.L746:
+	bgt	.L780
+	tbz	w0, #31, .L814
+	b	.L767
+.L780:
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L741
+	bls	.L775
 	ldr	w2, [x4]
-	cbnz	w2, .L742
+	cbnz	w2, .L776
 	cmp	w3, w1
-	beq	.L742
+	beq	.L776
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
-	strh	w1, [x2, -128]
-.L742:
-	add	x7, x20, :lo12:.LANCHOR3
+	strh	w1, [x2, -120]
+.L776:
+	add	x3, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L743:
+.L777:
 	cmp	w1, w0
-	bne	.L744
+	bne	.L778
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w3, [x27, 4]
-	ldr	x2, [x1, -216]
+	ldr	x2, [x1, -208]
 	str	w3, [x2, x6]
-	ldr	x2, [x19, 4088]
+	ldr	x2, [x1, -256]
 	strh	w26, [x2, x5, lsl 1]
-	tbnz	w0, #31, .L733
-	ldrh	w1, [x1, -128]
+	tbnz	w0, #31, .L767
+	ldrh	w1, [x1, -120]
 	ldr	w2, [x19, 132]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L733
-.L780:
+	bgt	.L767
+.L814:
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
 	ldr	w3, [x27, 4]
-	strh	w1, [x2, -128]
-	ldr	x1, [x2, -216]
+	strh	w1, [x2, -120]
+	ldr	x1, [x2, -208]
 	str	w3, [x1, x0, lsl 2]
-	ldr	x1, [x19, 4088]
-.L798:
+	ldr	x1, [x2, -256]
+.L832:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L733
-.L744:
-	ldr	x4, [x7, -216]
+	b	.L767
+.L778:
+	ldr	x7, [x3, -208]
 	sxtw	x2, w1
-	lsl	x3, x2, 2
+	lsl	x4, x2, 2
 	lsl	x2, x2, 1
-	add	x8, x4, x3
+	add	x8, x7, x4
 	add	w1, w1, 1
 	sxth	w1, w1
 	ldr	w8, [x8, 4]
-	str	w8, [x4, x3]
-	ldr	x3, [x19, 4088]
-	add	x4, x3, x2
-	ldrh	w4, [x4, 2]
-	strh	w4, [x3, x2]
-	b	.L743
-.L741:
+	str	w8, [x7, x4]
+	ldr	x4, [x3, -256]
+	add	x7, x4, x2
+	ldrh	w7, [x7, 2]
+	strh	w7, [x4, x2]
+	b	.L777
+.L775:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L740
-.L736:
+	b	.L774
+.L770:
 	ldrh	w1, [x19, 148]
 	ldrh	w0, [x19, 124]
 	cmp	w1, w0
-	bls	.L749
+	bls	.L783
 	adrp	x0, .LC1
-	mov	w2, 1252
+	mov	w2, 1297
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L749:
+.L783:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldrh	w3, [x19, 124]
 	ldrh	w1, [x19, 148]
 	sub	w2, w3, #1
-	ldr	x4, [x4, -240]
+	ldr	x4, [x4, -232]
 	sxth	x0, w2
 	sub	w2, w2, w1
-.L750:
+.L784:
 	cmp	w0, w2
-	ble	.L755
+	ble	.L789
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L751
+	bls	.L785
 	ldr	w2, [x4]
-	cbnz	w2, .L752
+	cbnz	w2, .L786
 	cmp	w3, w1
-	beq	.L752
+	beq	.L786
 	add	w1, w1, 1
 	strh	w1, [x19, 148]
-.L752:
+.L786:
 	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L753:
+.L787:
 	cmp	w1, w0
-	bne	.L754
+	bne	.L788
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w2, [x27, 4]
-	ldr	x1, [x1, -240]
+	ldr	x1, [x1, -232]
 	str	w2, [x1, x6]
 	ldr	x1, [x19, 152]
 	strh	w26, [x1, x5, lsl 1]
-.L755:
-	tbnz	w0, #31, .L733
+.L789:
+	tbnz	w0, #31, .L767
 	ldrh	w1, [x19, 124]
 	ldrh	w2, [x19, 148]
 	sub	w1, w1, #1
 	sub	w1, w1, w2
 	cmp	w0, w1, sxth
-	bgt	.L733
+	bgt	.L767
 	add	x1, x20, :lo12:.LANCHOR3
 	add	w2, w2, 1
 	strh	w2, [x19, 148]
 	ldr	w2, [x27, 4]
-	ldr	x1, [x1, -240]
+	ldr	x1, [x1, -232]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x19, 152]
-	b	.L798
-.L754:
-	ldr	x4, [x7, -240]
+	b	.L832
+.L788:
+	ldr	x4, [x7, -232]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
 	lsl	x2, x2, 1
@@ -5292,63 +5432,64 @@ FtlScanSysBlk:
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L753
-.L751:
+	b	.L787
+.L785:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L750
-.L734:
+	b	.L784
+.L768:
 	ldrh	w2, [x28]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L757
+	bne	.L791
 	strh	w26, [x28]
-.L799:
+.L833:
 	str	w0, [x28, 8]
-	b	.L733
-.L757:
+	b	.L767
+.L791:
 	ldrh	w0, [x28, 4]
 	cmp	w0, w1
-	beq	.L758
+	beq	.L792
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L758:
+.L792:
 	ldr	w0, [x27, 4]
 	ldr	w1, [x28, 8]
 	cmp	w1, w0
-	bcs	.L759
+	bcs	.L793
 	ldrh	w0, [x28]
 	strh	w0, [x28, 4]
 	strh	w26, [x28]
 	ldr	w0, [x27, 4]
-	b	.L799
-.L759:
+	b	.L833
+.L793:
 	strh	w26, [x28, 4]
-	b	.L733
-.L762:
-	ldr	x1, [x19, 4088]
-	ldrh	w0, [x1]
-	cbz	w0, .L764
-.L767:
+	b	.L767
+.L796:
+	add	x0, x20, :lo12:.LANCHOR3
+	ldr	x1, [x0, -256]
+	ldrh	w2, [x1]
+	cbz	w2, .L798
+.L801:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x1, [x0, 152]
 	ldrh	w2, [x1]
-	cbz	w2, .L765
-.L766:
+	cbz	w2, .L799
+.L800:
 	add	x20, x20, :lo12:.LANCHOR3
 	add	x22, x22, :lo12:.LANCHOR0
-	ldrh	w1, [x20, -128]
+	ldrh	w1, [x20, -120]
 	ldr	w0, [x22, 132]
 	cmp	w1, w0
-	bls	.L796
+	bls	.L830
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1377
+	mov	w2, 1422
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L796:
+.L830:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5357,25 +5498,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L764:
-	add	x0, x20, :lo12:.LANCHOR3
-	ldrh	w0, [x0, -128]
-	cbz	w0, .L767
+.L798:
+	ldrh	w0, [x0, -120]
+	cbz	w0, .L801
 	ldr	w2, [x19, 132]
 	mov	w0, 0
-.L768:
+.L802:
 	cmp	w0, w2
-	bcs	.L767
+	bcs	.L801
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L769
+	cbz	w3, .L803
 	mov	w1, w0
-	add	x3, x22, :lo12:.LANCHOR0
-	add	x7, x20, :lo12:.LANCHOR3
-.L770:
-	ldr	w2, [x3, 132]
+	add	x7, x22, :lo12:.LANCHOR0
+	add	x3, x20, :lo12:.LANCHOR3
+.L804:
+	ldr	w2, [x7, 132]
 	cmp	w1, w2
-	bcs	.L767
-	ldr	x5, [x3, 4088]
+	bcs	.L801
+	ldr	x5, [x3, -256]
 	sxtw	x6, w1
 	lsl	x4, x6, 1
 	sub	w2, w1, w0
@@ -5384,33 +5524,33 @@ FtlScanSysBlk:
 	sxth	w1, w1
 	ldrh	w8, [x5, x4]
 	strh	w8, [x5, x2, lsl 1]
-	ldr	x5, [x7, -216]
+	ldr	x5, [x3, -208]
 	ldr	w6, [x5, x6, lsl 2]
 	str	w6, [x5, x2, lsl 2]
-	ldr	x2, [x3, 4088]
+	ldr	x2, [x3, -256]
 	strh	wzr, [x2, x4]
-	b	.L770
-.L769:
+	b	.L804
+.L803:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L768
-.L765:
+	b	.L802
+.L799:
 	ldrh	w2, [x0, 148]
-	cbz	w2, .L766
+	cbz	w2, .L800
 	ldrh	w2, [x0, 124]
 	mov	w0, 0
-.L775:
+.L809:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L766
+	bge	.L800
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L776
+	cbz	w3, .L810
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x7, x20, :lo12:.LANCHOR3
-.L777:
+.L811:
 	ldrh	w1, [x2, 124]
 	cmp	w0, w1
-	bge	.L766
+	bge	.L800
 	ldr	x4, [x2, 152]
 	sxtw	x5, w0
 	lsl	x3, x5, 1
@@ -5420,16 +5560,16 @@ FtlScanSysBlk:
 	sxth	w0, w0
 	ldrh	w8, [x4, x3]
 	strh	w8, [x4, x1, lsl 1]
-	ldr	x4, [x7, -240]
+	ldr	x4, [x7, -232]
 	ldr	w5, [x4, x5, lsl 2]
 	str	w5, [x4, x1, lsl 2]
 	ldr	x1, [x2, 152]
 	strh	wzr, [x1, x3]
-	b	.L777
-.L776:
+	b	.L811
+.L810:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L775
+	b	.L809
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	2
 	.global	FtlMapTblRecovery
@@ -5457,10 +5597,10 @@ FtlMapTblRecovery:
 	bl	ftl_memset
 	stp	wzr, wzr, [x19, 48]
 	add	x3, x21, :lo12:.LANCHOR0
-	add	x20, x3, 3400
+	add	x20, x3, 3408
 	mov	x25, x3
-	ldr	x0, [x3, 3432]
-	ldr	x22, [x3, 3440]
+	ldr	x0, [x3, 3440]
+	ldr	x22, [x3, 3448]
 	stp	x0, x22, [x20, 8]
 	mov	w0, -1
 	strh	w0, [x19]
@@ -5470,19 +5610,19 @@ FtlMapTblRecovery:
 	ldr	w0, [x29, 116]
 	sub	w0, w0, #1
 	str	w0, [x29, 112]
-.L801:
+.L835:
 	ldr	w0, [x29, 116]
 	cmp	w27, w0
-	bge	.L818
+	bge	.L853
 	ldr	w0, [x29, 112]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L802
+	bne	.L836
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x20, x23, x0
 	add	x25, x21, :lo12:.LANCHOR0
-	add	x25, x25, 3400
+	add	x25, x25, 3408
 	ldrh	w0, [x23, x0]
 	mov	w23, 0
 	bl	FtlGetLastWrittenPage
@@ -5493,20 +5633,20 @@ FtlMapTblRecovery:
 	ldr	w0, [x26, x28, lsl 2]
 	add	w26, w1, 1
 	str	w0, [x19, 48]
-.L803:
+.L837:
 	cmp	w23, w26
-	blt	.L805
-.L818:
+	blt	.L840
+.L853:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bne	.L807
+	bne	.L842
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L807:
+.L842:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -5519,7 +5659,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L805:
+.L840:
 	ldrh	w0, [x20]
 	mov	w2, 1
 	mov	w1, w2
@@ -5529,24 +5669,28 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L804
+	beq	.L838
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L804
+	bls	.L839
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L804
+	bne	.L839
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x25, 4]
 	str	w1, [x2, x0]
-.L804:
+.L839:
 	add	w23, w23, 1
 	sxth	w23, w23
-	b	.L803
-.L802:
-	ldr	x0, [x25, 3432]
+	b	.L837
+.L838:
+	ldrh	w0, [x20]
+	strh	w0, [x19, 60]
+	b	.L839
+.L836:
+	ldr	x0, [x25, 3440]
 	mov	w2, 1
 	str	x0, [x20, 8]
 	lsl	x0, x28, 1
@@ -5561,21 +5705,21 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L820
+	beq	.L855
 	ldrh	w1, [x22]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L820
+	bne	.L855
 	ldrh	w1, [x22, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L809
-.L820:
+	beq	.L844
+.L855:
 	mov	w5, 0
-.L810:
+.L845:
 	ldrh	w0, [x25, 108]
 	cmp	w5, w0
-	bge	.L816
+	bge	.L851
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -5587,48 +5731,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L814
+	beq	.L849
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L814
+	bls	.L849
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L814
+	bne	.L849
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x2, x0]
-.L814:
+.L849:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L810
-.L809:
+	b	.L845
+.L844:
 	mov	w0, 0
-.L811:
+.L846:
 	ldrh	w1, [x25, 108]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L813
-.L816:
+	blt	.L848
+.L851:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L801
-.L813:
-	ldr	x2, [x25, 3432]
+	b	.L835
+.L848:
+	ldr	x2, [x25, 3440]
 	sbfiz	x5, x0, 3, 32
 	ldrh	w1, [x2, x5]
 	cmp	w24, w1
-	bls	.L812
+	bls	.L847
 	add	x2, x2, x5
 	ldr	x3, [x29, 120]
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x2, 4]
 	str	w2, [x3, x1]
-.L812:
+.L847:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L811
+	b	.L846
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
@@ -5641,7 +5785,7 @@ FtlLoadVonderInfo:
 	add	x0, x0, :lo12:.LANCHOR3
 	add	x29, sp, 0
 	ldrh	w2, [x1, 124]
-	sub	x0, x0, #120
+	sub	x0, x0, #112
 	strh	w2, [x0, 10]
 	mov	w2, -3962
 	strh	w2, [x0, 4]
@@ -5655,8 +5799,10 @@ FtlLoadVonderInfo:
 	ldr	x1, [x0, -128]
 	str	x1, [x0, 32]
 	ldr	x1, [x0, -112]
-	strh	w2, [x0, 6]
 	str	x1, [x0, 40]
+	mov	w1, -1
+	strh	w2, [x0, 6]
+	strh	w1, [x0, 60]
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -5675,7 +5821,7 @@ FtlL2PDataInit:
 	add	x21, x19, :lo12:.LANCHOR3
 	add	x20, x1, :lo12:.LANCHOR0
 	mov	w1, 0
-	ldr	x0, [x21, -256]
+	ldr	x0, [x21, -248]
 	ldr	w2, [x20, 132]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -5683,40 +5829,41 @@ FtlL2PDataInit:
 	mov	w1, 255
 	ldrh	w2, [x20, 114]
 	mul	w2, w2, w0
-	ldr	x0, [x21, -208]
+	ldr	x0, [x21, -200]
 	bl	ftl_memset
 	mov	x1, x20
 	mov	w0, 0
 	mov	w5, -1
-.L831:
+.L863:
 	ldrh	w2, [x1, 142]
 	cmp	w2, w0
-	bhi	.L832
+	bhi	.L864
 	add	x0, x19, :lo12:.LANCHOR3
+	ldr	w3, [x1, 132]
+	ldrh	w1, [x1, 140]
 	mov	w2, -1
-	strh	w2, [x0, -190]
-	strh	w2, [x0, -192]
-	ldr	w2, [x1, 132]
-	strh	w2, [x0, -182]
-	mov	w2, -3902
-	strh	w2, [x0, -188]
-	ldrh	w2, [x0, -128]
-	strh	w2, [x0, -184]
-	ldrh	w2, [x1, 140]
-	ldr	x1, [x1, 4088]
-	str	x1, [x0, -176]
-	ldr	x1, [x0, -216]
-	str	x1, [x0, -168]
+	strh	w1, [x0, -178]
 	ldr	x1, [x0, -256]
+	str	x1, [x0, -168]
+	ldr	x1, [x0, -208]
+	strh	w3, [x0, -174]
+	mov	w3, -3902
 	str	x1, [x0, -160]
-	ldr	x1, [x0, -224]
-	strh	w2, [x0, -186]
+	ldr	x1, [x0, -248]
+	strh	w3, [x0, -180]
 	str	x1, [x0, -152]
+	ldrh	w3, [x0, -120]
+	ldr	x1, [x0, -216]
+	strh	w2, [x0, -182]
+	strh	w2, [x0, -184]
+	strh	w2, [x0, -124]
+	strh	w3, [x0, -176]
+	str	x1, [x0, -144]
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L832:
+.L864:
 	ldr	x3, [x1, 2568]
 	ubfiz	x2, x0, 4, 16
 	add	x3, x3, x2
@@ -5724,7 +5871,7 @@ FtlL2PDataInit:
 	ldr	x3, [x1, 2568]
 	strh	w5, [x3, x2]
 	ldr	x3, [x1, 2568]
-	ldr	x4, [x21, -208]
+	ldr	x4, [x21, -200]
 	add	x3, x3, x2
 	ldrh	w2, [x1, 114]
 	mul	w2, w2, w0
@@ -5734,7 +5881,7 @@ FtlL2PDataInit:
 	and	x2, x2, -4
 	add	x2, x4, x2
 	str	x2, [x3, 8]
-	b	.L831
+	b	.L863
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
 	.global	FtlLoadMapInfo
@@ -5745,7 +5892,7 @@ FtlLoadMapInfo:
 	bl	FtlL2PDataInit
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	sub	x0, x0, #192
+	sub	x0, x0, #184
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -5764,9 +5911,8 @@ FtlVariablesInit:
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
 	strh	w1, [x0, -48]
-	str	xzr, [x0, -56]
-	mov	w1, -1
 	stp	wzr, wzr, [x0, -44]
+	mov	w1, -1
 	str	w1, [x0, -36]
 	mov	w1, 0
 	ldr	x0, [x19, 152]
@@ -5779,7 +5925,7 @@ FtlVariablesInit:
 	ldrh	w2, [x19, 46]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x19, 4064]
+	ldr	x0, [x19, 4072]
 	mov	w1, 0
 	ldrh	w2, [x19, 46]
 	lsl	w2, w2, 1
@@ -5825,80 +5971,83 @@ SupperBlkListInit:
 	str	xzr, [x19, 2368]
 	str	xzr, [x19, 2392]
 	str	xzr, [x19, 2408]
-.L839:
+.L871:
 	ldrh	w0, [x19, 44]
 	cmp	w20, w0
-	bcs	.L845
+	bcs	.L878
 	ldrh	w8, [x19, 36]
 	mov	x6, 0
 	ldrh	w7, [x19, 106]
 	mov	w5, 0
-	b	.L846
-.L841:
+	b	.L879
+.L873:
 	ldrb	w0, [x23, x6]
 	mov	w1, w20
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L840
+	cbnz	w0, .L872
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L840:
+.L872:
 	add	x6, x6, 1
-.L846:
+.L879:
 	cmp	w8, w6, uxth
-	bhi	.L841
-	cbz	w5, .L848
+	bhi	.L873
+	cbz	w5, .L874
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L842:
+.L875:
 	ldr	x1, [x19, 2360]
 	mov	w0, 6
 	umaddl	x0, w20, w0, x1
 	strh	w5, [x0, 4]
 	ldrh	w0, [x19, 2424]
 	cmp	w0, w20
-	beq	.L843
+	beq	.L876
 	ldrh	w0, [x19, 2472]
 	cmp	w0, w20
-	beq	.L843
+	beq	.L876
 	ldrh	w0, [x19, 2520]
 	cmp	w0, w20
-	beq	.L843
+	beq	.L876
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L844
+	cbnz	w0, .L877
 	add	w22, w22, 1
 	mov	w0, w20
 	and	w22, w22, 65535
 	bl	INSERT_FREE_LIST
-.L843:
+.L876:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L839
-.L848:
-	mov	w5, 0
-	b	.L842
-.L844:
+	b	.L871
+.L874:
+	ldr	x1, [x19, 2376]
+	ubfiz	x0, x20, 1, 16
+	mov	w2, -1
+	strh	w2, [x1, x0]
+	b	.L875
+.L877:
 	add	w21, w21, 1
 	mov	w0, w20
 	and	w21, w21, 65535
 	bl	INSERT_DATA_LIST
-	b	.L843
-.L845:
+	b	.L876
+.L878:
 	strh	w21, [x19, 2400]
 	add	w21, w21, w22
 	strh	w22, [x19, 2416]
 	cmp	w21, w0
-	ble	.L847
+	ble	.L880
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2154
+	mov	w2, 2206
 	add	x1, x1, 384
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L847:
+.L880:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -5911,8 +6060,8 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR0
@@ -5932,49 +6081,49 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L851:
+.L883:
 	ldr	w0, [x24, 2584]
 	cmp	w23, w0
-	bcc	.L853
-	adrp	x25, .LC96
+	bcc	.L885
+	adrp	x25, .LC98
 	add	x23, x20, :lo12:.LANCHOR0
 	add	x26, x22, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC96
+	add	x25, x25, :lo12:.LC98
 	mov	w24, 0
 	mov	w19, 0
 	mov	w4, 65535
-.L854:
+.L886:
 	ldrh	w0, [x23, 44]
 	cmp	w0, w19
-	bhi	.L856
+	bhi	.L888
 	ldr	x19, [x23, 2408]
-	cbz	x19, .L857
+	cbz	x19, .L889
 	ldr	x0, [x23, 2360]
-	adrp	x25, .LC97
+	adrp	x25, .LC99
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:check_vpc_table
 	sub	x19, x19, x0
 	mov	x0, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x0, 0xaaab, lsl 0
-	add	x25, x25, :lo12:.LC97
+	add	x25, x25, :lo12:.LC99
 	ldrh	w26, [x23, 2416]
 	mov	w27, 6
 	mov	w23, 0
 	mul	x19, x19, x0
 	and	w19, w19, 65535
-.L858:
+.L890:
 	cmp	w23, w26
-	bne	.L860
-.L857:
-	cbz	w24, .L850
+	bne	.L892
+.L889:
+	cbz	w24, .L882
 	add	x1, x21, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2321
+	mov	w2, 2373
 	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L850:
+.L882:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -5982,31 +6131,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L853:
+.L885:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w23
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L852
+	beq	.L884
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L852:
+.L884:
 	add	w23, w23, 1
-	b	.L851
-.L856:
+	b	.L883
+.L888:
 	ldr	x0, [x23, 2376]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L855
+	beq	.L887
 	mov	x0, x25
 	str	w4, [x29, 108]
 	mov	w1, w19
@@ -6015,34 +6164,34 @@ ftl_check_vpc:
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L855
+	beq	.L887
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w24, w24, wzr, ls
-.L855:
+.L887:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L854
-.L860:
+	b	.L886
+.L892:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L859
+	cbz	w2, .L891
 	ldrh	w3, [x22, w19, sxtw 1]
 	mov	w24, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	sftl_printk
-.L859:
+.L891:
 	ldr	x0, [x20, 2360]
 	umull	x19, w19, w27
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L857
+	beq	.L889
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L858
+	b	.L890
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
 	.global	FtlGcPageVarInit
@@ -6088,29 +6237,29 @@ FtlGcScanTempBlk:
 	ldrh	w19, [x0, 4]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L894
-	cbnz	w19, .L878
-.L879:
+	beq	.L926
+	cbnz	w19, .L910
+.L911:
 	bl	FtlGcPageVarInit
-	b	.L880
-.L894:
+	b	.L912
+.L926:
 	mov	w19, 0
-.L878:
+.L910:
 	adrp	x0, .LANCHOR0+106
 	ldrh	w0, [x0, #:lo12:.LANCHOR0+106]
 	cmp	w0, w25
-	beq	.L879
-.L880:
+	beq	.L911
+.L912:
 	adrp	x26, .LANCHOR0
 	add	x22, x26, :lo12:.LANCHOR0
 	mov	w24, 0
-.L888:
+.L920:
 	ldrh	w1, [x21]
 	mov	w0, 65535
 	strb	wzr, [x21, 8]
 	cmp	w1, w0
-	beq	.L895
-.L891:
+	beq	.L927
+.L923:
 	add	x0, x26, :lo12:.LANCHOR0
 	add	x2, x21, 16
 	mov	w20, 0
@@ -6121,42 +6270,42 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x0, 36]
 	add	x0, x0, 8
 	add	x0, x21, x0, lsl 1
-.L882:
+.L914:
 	cmp	x0, x2
-	bne	.L884
-	ldr	x0, [x22, 4016]
+	bne	.L916
+	ldr	x0, [x22, 4024]
 	mov	w1, w20
 	mov	w2, 0
 	ubfiz	x20, x20, 5, 16
 	bl	FlashReadPages
 	mov	x10, 0
 	mov	w11, 65535
-.L885:
+.L917:
 	cmp	x10, x20
-	bne	.L889
+	bne	.L921
 	add	w19, w19, 1
 	add	w24, w24, 1
 	and	w19, w19, 65535
 	cmp	w25, w24
-	bls	.L890
-.L892:
+	bls	.L922
+.L924:
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bhi	.L891
-.L895:
+	bhi	.L923
+.L927:
 	mov	w2, 0
-	b	.L881
-.L884:
+	b	.L913
+.L916:
 	ldrh	w1, [x2]
 	cmp	w1, w9
-	beq	.L883
-	ldr	x4, [x22, 4016]
+	beq	.L915
+	ldr	x4, [x22, 4024]
 	ubfiz	x6, x20, 5, 16
 	orr	w1, w19, w1, lsl 10
 	add	x4, x4, x6
 	str	w1, [x4, 4]
 	mul	w1, w20, w7
-	ldr	x3, [x22, 4016]
+	ldr	x3, [x22, 4024]
 	ldr	x4, [x22, 3264]
 	sdiv	w1, w1, w5
 	add	x3, x3, x6
@@ -6169,27 +6318,27 @@ FtlGcScanTempBlk:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 16]
-.L883:
+.L915:
 	add	x2, x2, 2
-	b	.L882
-.L889:
-	ldr	x6, [x22, 4016]
+	b	.L914
+.L921:
+	ldr	x6, [x22, 4024]
 	add	x5, x6, x10
 	ldr	w4, [x5, 4]
 	lsr	w0, w4, 10
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x10]
-	cbnz	w0, .L886
+	cbnz	w0, .L918
 	ldr	x0, [x5, 16]
 	add	x10, x10, 32
 	ldrh	w1, [x0]
 	cmp	w1, w11
-	bne	.L887
+	bne	.L919
 	adrp	x0, .LANCHOR3-40
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR3-40]
-.L881:
+.L913:
 	add	x23, x23, :lo12:.LANCHOR2
 	strh	w19, [x21, 2]
 	strb	w2, [x21, 6]
@@ -6198,13 +6347,13 @@ FtlGcScanTempBlk:
 	strh	w0, [x23, 4]
 	mov	x0, x21
 	bl	ftl_sb_update_avl_pages
-	b	.L893
-.L887:
+	b	.L925
+.L919:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L885
-.L886:
+	b	.L917
+.L918:
 	ldr	x0, [x22, 2376]
 	mov	w19, 0
 	ldrh	w1, [x21]
@@ -6214,19 +6363,19 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x21]
 	bl	FtlGcPageVarInit
-	b	.L888
-.L890:
+	b	.L920
+.L922:
 	add	x1, x23, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x1, 4]
 	cmp	w0, w2
-	beq	.L892
+	beq	.L924
 	add	w0, w0, w24
 	strh	w0, [x1, 4]
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bls	.L892
-.L893:
+	bls	.L924
+.L925:
 	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6244,7 +6393,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L903
+	bls	.L935
 	add	x0, x29, 64
 	mov	w2, 32
 	mov	w1, 165
@@ -6274,14 +6423,14 @@ FlashTestBlk:
 	add	x0, x29, 32
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L901:
+.L933:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L903:
+.L935:
 	mov	w19, 0
-	b	.L901
+	b	.L933
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	2
 	.global	FlashGetBadBlockList
@@ -6299,37 +6448,37 @@ FlashGetBadBlockList:
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, w21
-	ldr	x2, [x0, 3368]
+	ldr	x2, [x0, 3376]
 	mov	x0, x20
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L906
+	bls	.L938
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x20
 	bl	ftl_memset
 	mov	w0, 0
-.L906:
+.L938:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 14]
 	cmp	w1, 4
-	bne	.L910
+	bne	.L942
 	mov	x1, 0
-.L908:
+.L940:
 	cmp	w0, w1, uxth
-	bhi	.L909
-.L910:
+	bhi	.L941
+.L942:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L909:
+.L941:
 	ldrh	w2, [x20, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x20, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L908
+	b	.L940
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
 	.global	ftl_memcpy
@@ -6358,29 +6507,29 @@ FtlBbmTblFlush:
 	adrp	x22, .LANCHOR3
 	mov	w21, 0
 	add	x22, x22, :lo12:.LANCHOR3
-	ldr	x2, [x19, 3440]
+	ldr	x2, [x19, 3448]
 	add	x23, x19, 192
-	ldr	x0, [x19, 3432]
-	str	x2, [x19, 3416]
+	ldr	x0, [x19, 3440]
+	str	x2, [x19, 3424]
 	ldrh	w2, [x19, 114]
-	str	x0, [x19, 3408]
+	str	x0, [x19, 3416]
 	bl	ftl_memset
-.L915:
+.L947:
 	ldrh	w0, [x19, 58]
-	add	x20, x19, 3400
+	add	x20, x19, 3408
 	cmp	w21, w0
-	blt	.L916
+	blt	.L948
 	ldr	x24, [x20, 16]
 	mov	w1, 255
 	mov	w2, 16
-	adrp	x22, .LC98
+	adrp	x22, .LC100
 	mov	x0, x24
 	bl	ftl_memset
 	mov	w0, -3887
 	add	x1, x19, 160
 	strh	w0, [x24]
 	add	x25, x25, :lo12:.LANCHOR0
-	add	x22, x22, :lo12:.LC98
+	add	x22, x22, :lo12:.LC100
 	mov	w21, 0
 	ldr	w0, [x19, 168]
 	mov	w23, 0
@@ -6394,10 +6543,10 @@ FtlBbmTblFlush:
 	ldr	w0, [x19, 32]
 	mov	x19, x1
 	strh	w0, [x24, 12]
-.L917:
-	ldr	x0, [x25, 3432]
-	str	x0, [x20, 8]
+.L949:
 	ldr	x0, [x25, 3440]
+	str	x0, [x20, 8]
+	ldr	x0, [x25, 3448]
 	str	x0, [x20, 16]
 	ldrh	w1, [x19]
 	ldrh	w2, [x19, 2]
@@ -6417,7 +6566,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L918
+	blt	.L950
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19]
@@ -6427,44 +6576,44 @@ FtlBbmTblFlush:
 	strh	w1, [x24, 8]
 	ldrh	w0, [x19, 4]
 	strh	w1, [x19, 4]
-	ldr	x1, [x25, 3960]
+	ldr	x1, [x25, 3968]
 	strh	w0, [x19]
 	lsl	w0, w0, 10
 	str	w0, [x20, 4]
 	strh	wzr, [x19, 2]
 	str	w0, [x1, 4]
 	mov	w1, w2
-	ldr	x0, [x25, 3960]
+	ldr	x0, [x25, 3968]
 	bl	FlashEraseBlocks
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L918:
+.L950:
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L919
+	bne	.L951
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC99
+	adrp	x0, .LC101
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC101
 	bl	sftl_printk
 	cmp	w21, 3
-	bls	.L917
+	bls	.L949
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC100
+	adrp	x0, .LC102
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC102
 	bl	sftl_printk
-.L921:
-	b	.L921
-.L916:
-	ldrh	w2, [x22, -200]
+.L953:
+	b	.L953
+.L948:
+	ldrh	w2, [x22, -192]
 	ldr	x1, [x23], 8
 	ldr	x0, [x20, 8]
 	mul	w3, w21, w2
@@ -6472,12 +6621,12 @@ FtlBbmTblFlush:
 	add	w21, w21, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L915
-.L922:
+	b	.L947
+.L954:
 	mov	w23, 1
-	b	.L917
-.L919:
-	cbz	w23, .L922
+	b	.L949
+.L951:
+	cbz	w23, .L954
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6502,23 +6651,23 @@ allocate_data_superblock:
 	add	x23, x22, 2520
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L925:
+.L957:
 	ldrh	w1, [x22, 2400]
 	ldrh	w0, [x22, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x22, 44]
 	cmp	w0, w1
-	ble	.L926
+	ble	.L958
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2585
+	mov	w2, 2654
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L926:
+.L958:
 	cmp	x20, x23
-	bne	.L951
+	bne	.L983
 	ldrh	w0, [x19, 2416]
 	ldr	w1, [x19, 3244]
 	mul	w1, w0, w1
@@ -6526,23 +6675,23 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L927
+	beq	.L959
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L927:
+.L959:
 	add	x0, x19, 2408
 	bl	List_pop_index_node
 	and	w24, w0, 65535
 	ldrh	w0, [x19, 2416]
-	cbnz	w0, .L928
+	cbnz	w0, .L960
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2594
+	mov	w2, 2663
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L928:
+.L960:
 	ldrh	w0, [x19, 2416]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2416]
@@ -6550,7 +6699,7 @@ allocate_data_superblock:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L929
+	cbnz	w0, .L961
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x24, 1, 16
 	mov	w2, -1
@@ -6562,72 +6711,72 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L925
+	ble	.L957
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2605
+	mov	w2, 2674
 	add	x1, x1, 424
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L925
-.L951:
+	b	.L957
+.L983:
 	mov	w1, 0
-	b	.L927
-.L929:
+	b	.L959
+.L961:
 	ldrh	w1, [x19, 2400]
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L931
+	ble	.L963
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2608
+	mov	w2, 2677
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L931:
+.L963:
 	add	x27, x20, 16
 	ldrh	w4, [x19, 36]
 	mov	x3, x27
 	mov	x0, 0
 	mov	w25, 0
 	mov	w5, 65535
-.L932:
+.L964:
 	cmp	w4, w0, uxth
-	bhi	.L934
-	cbnz	w25, .L935
+	bhi	.L966
+	cbnz	w25, .L967
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2619
+	mov	w2, 2688
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L935:
+.L967:
 	ldrh	w0, [x19, 2672]
 	cmp	w0, w24
-	bne	.L936
+	bne	.L968
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2621
+	mov	w2, 2690
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L936:
+.L968:
 	ldrb	w0, [x20, 8]
 	uxtw	x26, w24
-	cbnz	w0, .L937
+	cbnz	w0, .L969
 	ldr	x2, [x19, 2384]
 	lsl	x1, x26, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L938
+	cbz	w0, .L970
 	ldrh	w3, [x19, 96]
 	add	w0, w0, w3
-.L959:
+.L991:
 	strh	w0, [x2, x1]
 	mov	w1, 0
 	ldr	w0, [x19, 2628]
@@ -6635,15 +6784,15 @@ allocate_data_superblock:
 	str	w0, [x19, 2628]
 	mov	w0, w24
 	bl	ftl_set_blk_mode
-.L940:
+.L972:
 	ldr	x0, [x19, 2384]
 	lsl	x26, x26, 1
 	ldr	w1, [x19, 2644]
 	ldrh	w0, [x0, x26]
 	cmp	w0, w1
-	bls	.L941
+	bls	.L973
 	str	w0, [x19, 2644]
-.L941:
+.L973:
 	ldr	w1, [x19, 2632]
 	ubfiz	x3, x25, 5, 16
 	ldrh	w0, [x19, 96]
@@ -6651,59 +6800,57 @@ allocate_data_superblock:
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x19, 44]
 	udiv	w0, w0, w1
-	ldr	x1, [x19, 4072]
+	ldr	x1, [x19, 4080]
 	str	w0, [x19, 2636]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	x0, 0
-.L942:
+.L974:
 	cmp	x3, x0
-	bne	.L943
+	bne	.L975
 	ldrb	w1, [x20, 8]
 	mov	w2, w25
-	ldr	x0, [x19, 3960]
+	ldr	x0, [x19, 3968]
 	mov	x28, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L944:
+.L976:
 	cmp	w25, w28, uxth
-	bhi	.L946
+	bhi	.L978
 	cmp	w1, 0
-	ble	.L947
+	ble	.L979
 	mov	w0, w24
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L947:
+.L979:
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L948
+	cbnz	w0, .L980
 	ldr	x0, [x19, 2376]
 	mov	w1, -1
 	strh	w1, [x0, x26]
-	mov	w0, w24
-	bl	INSERT_DATA_LIST
-	b	.L925
-.L934:
-	ldr	x1, [x19, 3960]
+	b	.L957
+.L966:
+	ldr	x1, [x19, 3968]
 	add	x2, x1, x0, lsl 5
 	stp	xzr, xzr, [x2, 8]
 	ldrh	w2, [x3]
 	cmp	w2, w5
-	beq	.L933
+	beq	.L965
 	ubfiz	x6, x25, 5, 16
 	add	w25, w25, 1
 	add	x1, x1, x6
 	and	w25, w25, 65535
 	lsl	w2, w2, 10
 	str	w2, [x1, 4]
-.L933:
+.L965:
 	add	x0, x0, 1
 	add	x3, x3, 2
-	b	.L932
-.L938:
+	b	.L964
+.L970:
 	mov	w0, 2
-	b	.L959
-.L937:
+	b	.L991
+.L969:
 	ldr	x2, [x19, 2384]
 	lsl	x0, x26, 1
 	ldrh	w1, [x2, x0]
@@ -6714,22 +6861,22 @@ allocate_data_superblock:
 	str	w0, [x19, 2632]
 	mov	w0, w24
 	bl	ftl_set_blk_mode.part.7
-	b	.L940
-.L943:
-	ldr	x1, [x19, 3960]
+	b	.L972
+.L975:
+	ldr	x1, [x19, 3968]
 	add	x1, x1, x0
 	add	x0, x0, 32
 	ldr	w2, [x1, 4]
 	and	w2, w2, -1024
 	str	w2, [x1, 4]
-	b	.L942
-.L946:
-	ldr	x2, [x19, 3960]
+	b	.L974
+.L978:
+	ldr	x2, [x19, 3968]
 	lsl	x0, x28, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L945
+	bne	.L977
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 104]
@@ -6740,11 +6887,11 @@ allocate_data_superblock:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-.L945:
+.L977:
 	add	x28, x28, 1
 	add	x27, x27, 2
-	b	.L944
-.L948:
+	b	.L976
+.L980:
 	add	x21, x21, :lo12:.LANCHOR0
 	strh	wzr, [x20, 2]
 	strb	wzr, [x20, 6]
@@ -6761,18 +6908,18 @@ allocate_data_superblock:
 	ldrh	w2, [x20]
 	strh	w0, [x1, x2, lsl 1]
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L949
+	cbz	w0, .L981
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L950
-.L949:
+	cbnz	w0, .L982
+.L981:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2674
+	mov	w2, 2743
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L950:
+.L982:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6795,18 +6942,18 @@ FtlGcFreeBadSuperBlk:
 	and	w22, w0, 65535
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x19, 3324]
+	ldrh	w0, [x19, 3328]
 	str	x27, [sp, 80]
-	cbz	w0, .L961
+	cbz	w0, .L993
 	add	x23, x19, 64
-	add	x24, x19, 3328
+	add	x24, x19, 3336
 	mov	w21, 0
-.L962:
+.L994:
 	ldrh	w0, [x19, 36]
 	cmp	w0, w21
-	bhi	.L968
+	bhi	.L1000
 	bl	FtlGcReFreshBadBlk
-.L961:
+.L993:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6815,50 +6962,50 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L968:
+.L1000:
 	ldrb	w0, [x23, w21, sxtw]
 	mov	w1, w22
-	adrp	x26, .LC101
-	add	x26, x26, :lo12:.LC101
+	adrp	x26, .LC103
+	add	x26, x26, :lo12:.LC103
 	mov	w20, 0
 	bl	V2P_block
 	and	w25, w0, 65535
-.L963:
-	ldrh	w0, [x19, 3324]
+.L995:
+	ldrh	w0, [x19, 3328]
 	cmp	w0, w20
-	bhi	.L967
+	bhi	.L999
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L962
-.L967:
+	b	.L994
+.L999:
 	ldrh	w0, [x24, w20, sxtw 1]
 	add	w27, w20, 1
 	cmp	w0, w25
-	bne	.L964
+	bne	.L996
 	mov	w1, w25
 	mov	x0, x26
 	bl	sftl_printk
 	mov	w0, w25
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-	ldrh	w0, [x19, 3324]
+	ldrh	w0, [x19, 3328]
 	mov	w1, w27
-.L965:
+.L997:
 	cmp	w20, w0
-	bcc	.L966
+	bcc	.L998
 	sub	w0, w0, #1
-	strh	w0, [x19, 3324]
-.L964:
+	strh	w0, [x19, 3328]
+.L996:
 	and	w20, w27, 65535
-	b	.L963
-.L966:
+	b	.L995
+.L998:
 	sub	w2, w1, #1
 	ldrh	w3, [x24, w1, sxtw 1]
 	add	w20, w20, 1
 	add	w1, w1, 1
 	and	w20, w20, 65535
 	strh	w3, [x24, w2, sxtw 1]
-	b	.L965
+	b	.L997
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -6874,27 +7021,27 @@ update_vpc_list:
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, 2376]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L974
+	cbnz	w1, .L1006
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w19
-	bne	.L975
+	bne	.L1007
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L976:
+.L1008:
 	add	x21, x20, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x21, 2368
 	bl	List_remove_node
 	ldrh	w0, [x21, 2400]
-	cbnz	w0, .L978
+	cbnz	w0, .L1010
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2744
+	mov	w2, 2813
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L978:
+.L1010:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20, 2400]
 	sub	w0, w0, #1
@@ -6908,38 +7055,38 @@ update_vpc_list:
 	add	w0, w0, w1
 	ldrh	w1, [x20, 44]
 	cmp	w0, w1
-	ble	.L982
+	ble	.L1014
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2747
+	mov	w2, 2816
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L982:
+.L1014:
 	mov	w0, 1
-	b	.L973
-.L975:
+	b	.L1005
+.L1007:
 	ldrh	w1, [x0, 2424]
 	cmp	w1, w19
-	beq	.L981
+	beq	.L1013
 	ldrh	w1, [x0, 2472]
 	cmp	w1, w19
-	beq	.L981
+	beq	.L1013
 	ldrh	w0, [x0, 2520]
 	cmp	w0, w19
-	bne	.L976
-.L981:
+	bne	.L1008
+.L1013:
 	mov	w0, 0
-.L973:
+.L1005:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L974:
+.L1006:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L981
+	b	.L1013
 	.size	update_vpc_list, .-update_vpc_list
 	.align	2
 	.global	decrement_vpc_count
@@ -6949,56 +7096,87 @@ decrement_vpc_count:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	str	x21, [sp, 32]
+	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L985
+	beq	.L1017
 	adrp	x20, .LANCHOR0
-	add	x20, x20, :lo12:.LANCHOR0
+	add	x22, x20, :lo12:.LANCHOR0
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, 2376]
+	ldr	x1, [x22, 2376]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L986
+	cbnz	w0, .L1018
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	bl	sftl_printk
-	ldr	x0, [x20, 2376]
+	ldr	x0, [x22, 2376]
 	ldrh	w0, [x0, x21]
-	cbz	w0, .L987
-.L992:
-	mov	w21, 0
-.L984:
-	mov	w0, w21
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L987:
+	cbnz	w0, .L1019
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2762
-	add	x1, x1, 472
 	adrp	x0, .LC1
+	mov	w2, 2831
+	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L992
-.L986:
-	sub	w0, w0, #1
+.L1019:
+	add	x22, x20, :lo12:.LANCHOR0
+	mov	w1, 16
+	add	x6, x22, 2408
+	ldr	x0, [x22, 2376]
+	strh	w1, [x0, x21]
+	mov	w1, w19
+	mov	x0, x6
+	bl	test_node_in_list
+	cbz	w0, .L1020
+	mov	w1, w19
+	mov	x0, x6
+	bl	List_remove_node
+	ldrh	w0, [x22, 2416]
+	cbnz	w0, .L1021
+	adrp	x1, .LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR1
+	adrp	x0, .LC1
+	mov	w2, 2835
+	add	x1, x1, 472
+	add	x0, x0, :lo12:.LC1
+	bl	sftl_printk
+.L1021:
+	add	x20, x20, :lo12:.LANCHOR0
+	ldrh	w0, [x20, 2416]
+	sub	w0, w0, #1
+	strh	w0, [x20, 2416]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x0, [x20, 2376]
+	mov	w1, w19
+	ldrh	w2, [x0, x21]
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	bl	sftl_printk
+.L1020:
+	mov	w0, w19
+	bl	FtlGcRefreshBlock
+.L1024:
+	mov	w21, 0
+	b	.L1016
+.L1018:
+	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L985:
+.L1017:
 	adrp	x20, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w1, 65535
 	ldrh	w0, [x20, -48]
 	cmp	w0, w1
-	bne	.L989
+	bne	.L1023
 	strh	w19, [x20, -48]
-	b	.L992
-.L989:
+	b	.L1024
+.L1023:
 	cmp	w19, w0
-	beq	.L992
+	beq	.L1024
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR0
@@ -7015,17 +7193,22 @@ decrement_vpc_count:
 	mul	x0, x0, x2
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L984
+	cbnz	w1, .L1016
 	cmp	w19, w0, uxth
-	beq	.L984
+	beq	.L1016
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	mov	w2, 2778
-	add	x1, x1, 472
 	adrp	x0, .LC1
+	mov	w2, 2856
+	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L984
+.L1016:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.align	2
 	.global	FtlWriteDump_data
@@ -7040,16 +7223,16 @@ FtlWriteDump_data:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrh	w2, [x20, 2428]
-	cbz	w2, .L994
+	cbz	w2, .L1030
 	ldrb	w1, [x20, 2432]
-	cbnz	w1, .L994
+	cbnz	w1, .L1030
 	ldrb	w1, [x20, 2431]
 	ldrh	w3, [x20, 106]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L994
+	beq	.L1030
 	ldrb	w0, [x20, 2434]
-	cbnz	w0, .L993
+	cbnz	w0, .L1029
 	ldr	w22, [x20, 2584]
 	add	x1, x29, 92
 	ldrh	w24, [x20, 36]
@@ -7057,49 +7240,49 @@ FtlWriteDump_data:
 	sub	w22, w22, #1
 	mov	w0, w22
 	bl	log2phys
-	ldr	x21, [x20, 3440]
+	ldr	x21, [x20, 3448]
 	ldr	w0, [x29, 92]
-	ldr	x1, [x20, 3432]
+	ldr	x1, [x20, 3440]
 	str	w0, [x29, 100]
 	cmn	w0, #1
 	stp	x1, x21, [x29, 104]
 	str	w22, [x29, 120]
 	str	wzr, [x21, 4]
-	beq	.L996
+	beq	.L1032
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.L997:
+.L1033:
 	add	x25, x19, :lo12:.LANCHOR0
 	lsl	w24, w24, 2
 	add	x20, x25, 2424
 	mov	w0, -3947
 	mov	w23, 0
 	strh	w0, [x21]
-.L998:
+.L1034:
 	cmp	w24, w23
-	bne	.L1002
-.L999:
+	bne	.L1038
+.L1035:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	strb	w0, [x19, 2434]
-.L993:
+.L1029:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L996:
+.L1032:
 	ldrh	w2, [x20, 114]
 	mov	w1, 255
-	ldr	x0, [x20, 3432]
+	ldr	x0, [x20, 3440]
 	bl	ftl_memset
-	b	.L997
-.L1002:
+	b	.L1033
+.L1038:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L999
+	cbz	w0, .L1035
 	ldr	w0, [x29, 100]
 	add	w23, w23, 1
 	stp	w22, w0, [x21, 8]
@@ -7121,11 +7304,11 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-	b	.L998
-.L994:
+	b	.L1034
+.L1030:
 	add	x19, x19, :lo12:.LANCHOR0
 	strb	wzr, [x19, 2434]
-	b	.L993
+	b	.L1029
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	2
 	.global	l2p_flush
@@ -7138,26 +7321,26 @@ l2p_flush:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w19, 0
 	bl	FtlWriteDump_data
-.L1012:
+.L1048:
 	ldrh	w0, [x20, 142]
 	cmp	w0, w19
-	bhi	.L1014
+	bhi	.L1050
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1014:
+.L1050:
 	ldr	x1, [x20, 2568]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1013
+	tbz	w0, #31, .L1049
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1013:
+.L1049:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1012
+	b	.L1048
 	.size	l2p_flush, .-l2p_flush
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -7174,7 +7357,7 @@ FtlRecoverySuperblock:
 	stp	x27, x28, [sp, 80]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	beq	.L1134
+	beq	.L1170
 	ldrb	w0, [x19, 6]
 	adrp	x20, .LANCHOR0
 	str	w0, [x29, 156]
@@ -7182,11 +7365,11 @@ FtlRecoverySuperblock:
 	ldrh	w27, [x19, 2]
 	ldrh	w0, [x0, 106]
 	cmp	w0, w27
-	bne	.L1019
+	bne	.L1055
 	strh	wzr, [x19, 4]
-.L1140:
+.L1176:
 	strb	wzr, [x19, 6]
-.L1134:
+.L1170:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7195,17 +7378,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1019:
+.L1055:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L1020:
+.L1056:
 	cmp	w0, w1
-	beq	.L1021
+	beq	.L1057
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w24, w0
 	cmn	w0, #1
-	beq	.L1022
+	beq	.L1058
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x19, 16
 	str	x1, [x29, 144]
@@ -7218,90 +7401,90 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	ldrh	w9, [x0, 116]
 	add	x1, x19, x1, lsl 1
-.L1023:
+.L1059:
 	cmp	x5, x1
-	bne	.L1027
+	bne	.L1063
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w1, w21
-	ldr	x0, [x23, 4016]
+	ldr	x0, [x23, 4024]
 	bl	FlashReadPages
 	ldr	w22, [x23, 2624]
-	ldr	x4, [x23, 4016]
+	ldr	x4, [x23, 4024]
 	and	w9, w24, 65535
 	sub	w22, w22, #1
 	mov	w7, 65535
 	mov	x6, x4
 	mov	w3, 0
-.L1028:
+.L1064:
 	cmp	w21, w3
-	bne	.L1033
+	bne	.L1069
 	add	w23, w24, 1
 	ldr	w0, [x4, 4]
 	and	w23, w23, 65535
-.L1136:
+.L1172:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w28, w0, 65535
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 106]
 	cmp	w0, w23
-	bne	.L1035
+	bne	.L1071
 	strh	w23, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1035:
+.L1071:
 	ldr	w0, [x29, 156]
 	cmp	w23, w27
 	ccmp	w28, w0, 0, eq
-	bne	.L1036
-.L1141:
+	bne	.L1072
+.L1177:
 	mov	w2, w28
 	mov	w1, w23
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1134
-.L1021:
+	b	.L1170
+.L1057:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1020
-.L1022:
-	cbz	w27, .L1024
+	b	.L1056
+.L1058:
+	cbz	w27, .L1060
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1755
+	mov	w2, 1804
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1024:
+.L1060:
 	ldr	w0, [x29, 156]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L1025
+	beq	.L1061
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1756
+	mov	w2, 1805
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1025:
+.L1061:
 	strh	wzr, [x19, 2]
-	b	.L1140
-.L1027:
+	b	.L1176
+.L1063:
 	ldrh	w2, [x5]
 	cmp	w2, w10
-	beq	.L1026
-	ldr	x4, [x0, 4016]
+	beq	.L1062
+	ldr	x4, [x0, 4024]
 	ubfiz	x7, x21, 5, 16
 	orr	w2, w24, w2, lsl 10
 	add	x4, x4, x7
 	str	w2, [x4, 4]
 	mul	w2, w21, w8
-	ldr	x3, [x0, 4016]
+	ldr	x3, [x0, 4024]
 	ldr	x4, [x0, 3264]
 	sdiv	w2, w2, w6
 	add	x3, x3, x7
@@ -7314,90 +7497,90 @@ FtlRecoverySuperblock:
 	sdiv	w2, w2, w6
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 16]
-.L1026:
+.L1062:
 	add	x5, x5, 2
-	b	.L1023
-.L1033:
+	b	.L1059
+.L1069:
 	ldr	w0, [x6]
-	cbnz	w0, .L1029
+	cbnz	w0, .L1065
 	ldr	x8, [x6, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1030
+	beq	.L1066
 	ldr	w1, [x23, 2624]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1030
+	cbz	w0, .L1066
 	add	w5, w5, 1
 	str	w5, [x23, 2624]
-.L1030:
+.L1066:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1032
+	bne	.L1068
 	ubfiz	x3, x3, 5, 16
 	and	w23, w24, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1136
-.L1029:
+	b	.L1172
+.L1065:
 	mov	w7, w9
-.L1032:
+.L1068:
 	add	w3, w3, 1
 	add	x6, x6, 32
 	and	w3, w3, 65535
-	b	.L1028
-.L1036:
+	b	.L1064
+.L1072:
 	mov	w0, 65535
 	adrp	x21, .LANCHOR3
 	cmp	w7, w0
-	bne	.L1037
+	bne	.L1073
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1038
-.L1037:
+	cbnz	w0, .L1074
+.L1073:
 	add	x0, x21, :lo12:.LANCHOR3
 	and	w3, w24, 65535
 	ldr	w1, [x0, -36]
 	cmn	w1, #1
-	bne	.L1039
+	bne	.L1075
 	str	w22, [x0, -36]
-.L1039:
+.L1075:
 	add	w0, w27, 7
 	cmp	w0, w24, uxth
-	bge	.L1087
+	bge	.L1123
 	sub	w25, w3, #7
 	and	w25, w25, 65535
-.L1040:
+.L1076:
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	w4, 65535
-.L1041:
+.L1077:
 	cmp	w25, w3
-	bhi	.L1048
+	bhi	.L1084
 	ldrh	w0, [x26, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-	b	.L1049
-.L1087:
+	b	.L1085
+.L1123:
 	mov	w25, w27
-	b	.L1040
-.L1043:
+	b	.L1076
+.L1079:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1042
-	ldr	x5, [x26, 4016]
+	beq	.L1078
+	ldr	x5, [x26, 4024]
 	ubfiz	x6, x24, 5, 16
 	add	w24, w24, 1
 	orr	w2, w25, w2, lsl 10
 	add	x5, x5, x6
 	and	w24, w24, 65535
 	str	w2, [x5, 4]
-.L1042:
+.L1078:
 	add	x1, x1, 2
-.L1049:
+.L1085:
 	cmp	x0, x1
-	bne	.L1043
-	ldr	x0, [x26, 4016]
+	bne	.L1079
+	ldr	x0, [x26, 4024]
 	mov	w1, w24
 	mov	w2, 0
 	str	w4, [x29, 128]
@@ -7405,57 +7588,57 @@ FtlRecoverySuperblock:
 	ubfiz	x24, x24, 5, 16
 	add	x24, x24, 16
 	bl	FlashReadPages
-	ldr	x1, [x26, 4016]
+	ldr	x1, [x26, 4024]
 	add	x2, x21, :lo12:.LANCHOR3
 	ldr	w4, [x29, 128]
 	ldr	w3, [x29, 136]
 	add	x0, x1, 16
 	add	x24, x1, x24
-.L1044:
+.L1080:
 	cmp	x24, x0
-	bne	.L1047
+	bne	.L1083
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1041
-.L1047:
+	b	.L1077
+.L1083:
 	ldr	w1, [x0, -16]
-	cbnz	w1, .L1038
+	cbnz	w1, .L1074
 	ldr	x1, [x0]
 	ldrh	w5, [x1]
 	cmp	w5, w4
-	beq	.L1046
+	beq	.L1082
 	ldr	w1, [x1, 4]
 	cmn	w1, #1
-	beq	.L1046
+	beq	.L1082
 	str	w1, [x2, -36]
-.L1046:
+.L1082:
 	add	x0, x0, 32
-	b	.L1044
-.L1048:
+	b	.L1080
+.L1084:
 	add	x0, x21, :lo12:.LANCHOR3
 	mov	w1, -1
 	str	w1, [x0, -36]
-.L1038:
+.L1074:
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, 1
 	mov	w25, w27
 	add	x20, x20, :lo12:.LANCHOR0
 	strh	w0, [x21, -32]
-	sub	x0, x21, #192
+	sub	x0, x21, #184
 	bl	FtlMapBlkWriteDump_data
 	sub	x0, x21, #24
 	str	x0, [x29, 112]
-.L1050:
+.L1086:
 	ldrh	w0, [x20, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	mov	w4, 65535
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-.L1051:
+.L1087:
 	cmp	x0, x1
-	bne	.L1053
-	ldr	x0, [x20, 4016]
+	bne	.L1089
+	ldr	x0, [x20, 4024]
 	mov	w1, w24
 	mov	w2, 0
 	bl	FlashReadPages
@@ -7466,46 +7649,46 @@ FtlRecoverySuperblock:
 	add	x0, x0, 496
 	mov	x24, 0
 	str	x0, [x29, 128]
-.L1054:
+.L1090:
 	ldr	x0, [x29, 120]
 	cmp	x0, x24
-	bne	.L1081
+	bne	.L1117
 	add	w25, w25, 1
 	ldrh	w0, [x20, 106]
 	and	w25, w25, 65535
 	cmp	w0, w25
-	bne	.L1050
+	bne	.L1086
 	ldrh	w1, [x20, 36]
 	mov	w0, 0
 	strh	w25, [x19, 2]
 	mov	w2, 65535
 	strh	wzr, [x19, 4]
-.L1082:
+.L1118:
 	cmp	w0, w1
-	beq	.L1134
+	beq	.L1170
 	ldr	x4, [x29, 144]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 144]
 	cmp	w3, w2
-	beq	.L1083
+	beq	.L1119
 	strb	w0, [x19, 6]
-	b	.L1134
-.L1053:
+	b	.L1170
+.L1089:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1052
-	ldr	x3, [x20, 4016]
+	beq	.L1088
+	ldr	x3, [x20, 4024]
 	ubfiz	x5, x24, 5, 16
 	add	w24, w24, 1
 	orr	w2, w25, w2, lsl 10
 	add	x3, x3, x5
 	and	w24, w24, 65535
 	str	w2, [x3, 4]
-.L1052:
+.L1088:
 	add	x1, x1, 2
-	b	.L1051
-.L1081:
-	ldr	x4, [x20, 4016]
+	b	.L1087
+.L1117:
+	ldr	x4, [x20, 4024]
 	add	x4, x4, x24
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 172]
@@ -7513,53 +7696,53 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w25, w27
-	bcc	.L1055
+	bcc	.L1091
 	ldr	w1, [x29, 156]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1055
+	bhi	.L1091
 	cmp	w25, w23
 	ccmp	w28, w0, 0, eq
-	beq	.L1056
+	beq	.L1092
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1057
+	beq	.L1093
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1058
-.L1065:
+	beq	.L1094
+.L1101:
 	ldrh	w0, [x19]
-.L1139:
+.L1175:
 	bl	decrement_vpc_count
-.L1055:
+.L1091:
 	add	x24, x24, 32
-	b	.L1054
-.L1058:
+	b	.L1090
+.L1094:
 	ldr	w22, [x3, 4]
 	cmn	w22, #1
-	beq	.L1059
+	beq	.L1095
 	ldr	w1, [x20, 2624]
 	mov	w0, w22
 	str	x3, [x29, 136]
 	bl	ftl_cmp_data_ver
 	ldr	x3, [x29, 136]
-	cbz	w0, .L1059
+	cbz	w0, .L1095
 	add	w0, w22, 1
 	str	w0, [x20, 2624]
-.L1059:
+.L1095:
 	ldrh	w1, [x3]
 	mov	w0, 61589
 	cmp	w1, w0
-	beq	.L1060
+	beq	.L1096
 	ldr	x1, [x29, 128]
-	mov	w2, 1905
+	mov	w2, 1954
 	str	x3, [x29, 136]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
 	ldr	x3, [x29, 136]
-.L1060:
+.L1096:
 	ldp	w26, w0, [x3, 8]
 	add	x1, x29, 168
 	str	w0, [x29, 164]
@@ -7568,208 +7751,208 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x21, -36]
 	cmn	w1, #1
-	beq	.L1061
+	beq	.L1097
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1061
+	cbz	w0, .L1097
 	ldr	w1, [x29, 164]
 	cmn	w1, #1
-	beq	.L1062
-	ldr	x0, [x20, 4016]
+	beq	.L1098
+	ldr	x0, [x20, 4024]
 	mov	w2, 0
 	add	x0, x0, x24
 	ldr	x4, [x0, 16]
 	str	w1, [x0, 4]
 	mov	w1, 1
 	str	x4, [x29, 136]
-	ldr	x0, [x20, 4016]
+	ldr	x0, [x20, 4024]
 	add	x0, x0, x24
 	bl	FlashReadPages
-	ldr	x0, [x20, 4016]
+	ldr	x0, [x20, 4024]
 	ldr	x4, [x29, 136]
 	add	x3, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L1063
-.L1064:
+	bne	.L1099
+.L1100:
 	mov	w0, -1
 	str	w0, [x29, 164]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L1072:
+.L1108:
 	ldr	w4, [x29, 164]
 	cmn	w4, #1
-	beq	.L1055
-.L1086:
+	beq	.L1091
+.L1122:
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	and	w26, w0, 65535
 	ldrh	w0, [x20, 44]
 	mov	w3, w26
 	cmp	w0, w26
-	bhi	.L1077
+	bhi	.L1113
 	ldr	x1, [x29, 128]
-	mov	w2, 2006
+	mov	w2, 2055
 	adrp	x0, .LC1
 	str	w26, [x29, 136]
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
 	ldr	w3, [x29, 136]
-.L1077:
+.L1113:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x26, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1078
+	cbz	w0, .L1114
 	mov	w0, w3
-	b	.L1139
-.L1062:
+	b	.L1175
+.L1098:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	bne	.L1065
+	bne	.L1101
 	mov	w2, 1
 	add	x1, x29, 164
 	mov	w0, w26
 	bl	log2phys
-	b	.L1065
-.L1063:
+	b	.L1101
+.L1099:
 	ldr	w0, [x4, 8]
 	cmp	w26, w0
-	bne	.L1064
+	bne	.L1100
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x21, -36]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1064
+	cbz	w0, .L1100
 	ldp	w0, w1, [x29, 168]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 164]
-	bne	.L1067
-.L1137:
+	bne	.L1103
+.L1173:
 	mov	w0, w26
 	bl	FtlReUsePrevPpa
-	b	.L1064
-.L1067:
+	b	.L1100
+.L1103:
 	cmp	w0, w1
-	beq	.L1064
+	beq	.L1100
 	cmn	w0, #1
-	beq	.L1068
+	beq	.L1104
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
 	mov	w1, 1
 	str	x4, [x29, 104]
-	ldr	x0, [x20, 4016]
+	ldr	x0, [x20, 4024]
 	add	x0, x0, x24
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L1069:
-	adrp	x0, .LANCHOR0+4016
-	ldr	x0, [x0, #:lo12:.LANCHOR0+4016]
+.L1105:
+	adrp	x0, .LANCHOR0+4024
+	ldr	x0, [x0, #:lo12:.LANCHOR0+4024]
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	beq	.L1070
+	beq	.L1106
 	ldr	w3, [x4, 4]
 	ldr	w0, [x21, -36]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1070
+	cbz	w0, .L1106
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1064
-.L1070:
+	cbz	w0, .L1100
+.L1106:
 	ldr	w1, [x29, 164]
-	b	.L1137
-.L1068:
+	b	.L1173
+.L1104:
 	str	w0, [x3]
-	b	.L1069
-.L1061:
+	b	.L1105
+.L1097:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	beq	.L1072
+	beq	.L1108
 	mov	w2, 1
 	add	x1, x29, 172
 	mov	w0, w26
 	bl	log2phys
 	ldr	w4, [x29, 168]
 	cmn	w4, #1
-	beq	.L1072
+	beq	.L1108
 	ldr	w0, [x29, 164]
 	cmp	w4, w0
-	beq	.L1086
+	beq	.L1122
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20, 2424]
 	and	w0, w0, 65535
 	cmp	w1, w0
-	beq	.L1076
+	beq	.L1112
 	ldrh	w1, [x20, 2472]
 	cmp	w1, w0
-	beq	.L1076
+	beq	.L1112
 	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1072
-.L1076:
-	ldr	x0, [x20, 4016]
+	bne	.L1108
+.L1112:
+	ldr	x0, [x20, 4024]
 	mov	w2, 0
 	mov	w1, 1
 	str	w4, [x0, 4]
 	ldr	x3, [x0, 16]
-	ldr	x0, [x20, 4016]
+	ldr	x0, [x20, 4024]
 	str	x3, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, 4016]
+	ldr	x0, [x20, 4024]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1072
+	beq	.L1108
 	ldr	x3, [x29, 136]
 	mov	w0, w22
 	ldr	w1, [x3, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1072
+	cbnz	w0, .L1108
 	mov	w2, 1
 	add	x1, x29, 168
 	mov	w0, w26
 	bl	log2phys
-	b	.L1072
-.L1078:
+	b	.L1108
+.L1114:
 	mov	w1, w26
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	sftl_printk
-	b	.L1055
-.L1057:
+	b	.L1091
+.L1093:
 	ldr	w0, [x21, -28]
 	cmp	w0, 31
-	bhi	.L1079
+	bhi	.L1115
 	ldr	x1, [x29, 112]
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x21, -28]
-.L1079:
+.L1115:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x21, -36]
 	cmn	w0, #1
-	bne	.L1080
-.L1138:
+	bne	.L1116
+.L1174:
 	str	w22, [x21, -36]
-	b	.L1055
-.L1080:
+	b	.L1091
+.L1116:
 	cmp	w22, w0
-	bcs	.L1055
-	b	.L1138
-.L1083:
+	bcs	.L1091
+	b	.L1174
+.L1119:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1082
-.L1056:
+	b	.L1118
+.L1092:
 	strb	w28, [x19, 6]
 	strh	w23, [x19, 2]
-	b	.L1141
+	b	.L1177
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -7789,8 +7972,8 @@ FtlSuperblockPowerLostFix:
 	mov	x20, x0
 	mov	x23, x2
 	mov	w22, 7
-	ldr	x21, [x0, 3440]
-	ldr	x1, [x0, 3432]
+	ldr	x21, [x0, 3448]
+	ldr	x1, [x0, 3440]
 	stp	x1, x21, [x29, 72]
 	mov	w1, -3
 	str	w1, [x21, 8]
@@ -7799,18 +7982,18 @@ FtlSuperblockPowerLostFix:
 	ldrh	w1, [x19]
 	strh	w1, [x21, 2]
 	strh	wzr, [x21]
-	ldr	x1, [x0, 3432]
+	ldr	x1, [x0, 3440]
 	str	w3, [x1]
 	mov	w3, 22136
 	movk	w3, 0x1234, lsl 16
-	ldr	x1, [x0, 3432]
+	ldr	x1, [x0, 3440]
 	str	w3, [x1, 4]
-.L1143:
+.L1179:
 	subs	w22, w22, #1
-	beq	.L1145
+	beq	.L1181
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1144
-.L1145:
+	cbnz	w0, .L1180
+.L1181:
 	add	x2, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x19]
 	ldrh	w4, [x19, 4]
@@ -7828,12 +8011,12 @@ FtlSuperblockPowerLostFix:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1144:
+.L1180:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 68]
 	cmn	w0, #1
-	beq	.L1145
+	beq	.L1181
 	ldr	w0, [x20, 2624]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -7847,7 +8030,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1143
+	b	.L1179
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLoadBbt
@@ -7860,20 +8043,20 @@ FtlLoadBbt:
 	stp	x23, x24, [sp, 48]
 	add	x23, x19, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
-	add	x21, x23, 3400
+	add	x21, x23, 3408
 	mov	w24, 61649
-	ldr	x0, [x23, 3432]
-	ldr	x22, [x23, 3440]
+	ldr	x0, [x23, 3440]
+	ldr	x22, [x23, 3448]
 	stp	x0, x22, [x21, 8]
 	bl	FtlBbtMemInit
 	ldrh	w20, [x23, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-.L1155:
+.L1191:
 	ldrh	w0, [x23, 102]
 	sub	w0, w0, #16
 	cmp	w20, w0
-	ble	.L1158
+	ble	.L1194
 	lsl	w0, w20, 10
 	mov	w2, 1
 	str	w0, [x21, 4]
@@ -7882,7 +8065,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1156
+	bne	.L1192
 	ldr	w0, [x21, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -7890,61 +8073,61 @@ FtlLoadBbt:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-.L1156:
+.L1192:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1157
+	beq	.L1193
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1157
+	bne	.L1193
 	ldr	w1, [x22, 4]
 	str	w1, [x23, 168]
 	strh	w20, [x23, 160]
 	ldrh	w1, [x22, 8]
 	strh	w1, [x23, 164]
-.L1158:
+.L1194:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x21, 160]
 	cmp	w1, w0
-	beq	.L1172
+	beq	.L1208
 	ldrh	w1, [x21, 164]
 	cmp	w1, w0
-	beq	.L1162
-	add	x0, x21, 3400
+	beq	.L1198
+	add	x0, x21, 3408
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x21, 3400]
+	ldr	w0, [x21, 3408]
 	cmn	w0, #1
-	beq	.L1162
+	beq	.L1198
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1162
+	bne	.L1198
 	ldr	w1, [x21, 168]
 	ldr	w0, [x22, 4]
 	cmp	w0, w1
-	bls	.L1162
+	bls	.L1198
 	str	w0, [x21, 168]
 	ldrh	w1, [x21, 164]
 	ldrh	w0, [x22, 8]
 	strh	w1, [x21, 160]
 	strh	w0, [x21, 164]
-.L1162:
+.L1198:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w1, 1
-	add	x23, x20, 3400
+	add	x23, x20, 3408
 	mov	w24, 61649
 	ldrh	w0, [x20, 160]
 	bl	FtlGetLastWrittenPage
 	sxth	w21, w0
 	add	w0, w0, 1
 	strh	w0, [x20, 162]
-.L1164:
-	tbz	w21, #31, .L1167
+.L1200:
+	tbz	w21, #31, .L1203
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7952,78 +8135,78 @@ FtlLoadBbt:
 	add	x1, x1, 520
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1166:
+.L1202:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 10]
 	mov	w2, 65535
 	strh	w0, [x1, 166]
 	ldrh	w0, [x22, 12]
 	cmp	w0, w2
-	beq	.L1169
+	beq	.L1205
 	ldr	w2, [x1, 32]
 	cmp	w0, w2
-	beq	.L1169
+	beq	.L1205
 	ldrh	w1, [x1, 46]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1169
+	bcs	.L1205
 	cmp	w0, w1
-	bcs	.L1169
+	bcs	.L1205
 	bl	FtlSysBlkNumInit
-.L1169:
+.L1205:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x21, .LANCHOR3
 	add	x22, x19, 192
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w20, 0
-.L1170:
+.L1206:
 	ldrh	w0, [x19, 58]
 	cmp	w20, w0
-	bcc	.L1171
+	bcc	.L1207
 	mov	w0, 0
-.L1154:
+.L1190:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1157:
+.L1193:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L1155
-.L1167:
+	b	.L1191
+.L1203:
 	ldrh	w0, [x20, 160]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w21, w0, lsl 10
 	str	w0, [x23, 4]
-	ldr	x0, [x20, 3432]
+	ldr	x0, [x20, 3440]
 	str	x0, [x23, 8]
 	mov	x0, x23
 	bl	FlashReadPages
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1165
+	beq	.L1201
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	beq	.L1166
-.L1165:
+	beq	.L1202
+.L1201:
 	sub	w21, w21, #1
 	sxth	w21, w21
-	b	.L1164
-.L1171:
-	ldrh	w2, [x21, -200]
-	ldr	x0, [x19, 3408]
+	b	.L1200
+.L1207:
+	ldrh	w2, [x21, -192]
+	ldr	x0, [x19, 3416]
 	mul	w1, w2, w20
 	lsl	w2, w2, 2
 	add	w20, w20, 1
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x22], 8
 	bl	ftl_memcpy
-	b	.L1170
-.L1172:
+	b	.L1206
+.L1208:
 	mov	w0, -1
-	b	.L1154
+	b	.L1190
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
@@ -8047,48 +8230,48 @@ FtlMakeBbt:
 	add	x26, x0, 192
 	add	x25, x0, 172
 	mov	x19, x0
-	add	x20, x0, 3400
-.L1185:
+	add	x20, x0, 3408
+.L1221:
 	ldrh	w0, [x19, 58]
 	cmp	w24, w0
-	bcc	.L1191
+	bcc	.L1227
 	add	x20, x21, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1192:
+.L1228:
 	ldrh	w0, [x20, 118]
 	cmp	w0, w19
-	bhi	.L1193
+	bhi	.L1229
 	add	x20, x20, 160
 	ldrh	w19, [x20, 12]
 	mov	w22, 65535
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1194:
+.L1230:
 	ldrh	w0, [x20, 12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1198
+	ble	.L1234
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1195
+	beq	.L1231
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1196
+	cbz	w0, .L1232
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1195:
+.L1231:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1194
-.L1191:
-	ldr	x0, [x19, 3432]
+	b	.L1230
+.L1227:
+	ldr	x0, [x19, 3440]
 	mov	w2, 65535
-	ldr	x27, [x19, 3440]
+	ldr	x27, [x19, 3448]
 	ldrh	w1, [x25]
 	stp	x0, x27, [x20, 8]
 	cmp	w1, w2
-	beq	.L1186
+	beq	.L1222
 	ldrh	w23, [x19, 102]
 	mov	w2, 1
 	madd	w23, w23, w24, w1
@@ -8103,35 +8286,35 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1187:
+.L1223:
 	mov	w0, w23
 	add	w24, w24, 1
 	bl	FtlBbmMapBadBlock
 	add	x26, x26, 8
 	add	x25, x25, 2
-	b	.L1185
-.L1186:
+	b	.L1221
+.L1222:
 	mov	w1, w24
 	bl	FlashGetBadBlockList
 	ldr	x0, [x20, 8]
 	ldr	x1, [x26]
 	bl	FtlBbt2Bitmap
 	ldrh	w22, [x19, 102]
-.L1189:
+.L1225:
 	sub	w22, w22, #1
 	and	w22, w22, 65535
-.L1188:
+.L1224:
 	ldrh	w0, [x19, 102]
 	madd	w0, w24, w0, w22
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1189
-	ldr	x0, [x19, 3440]
+	beq	.L1225
+	ldr	x0, [x19, 3448]
 	mov	w2, 16
 	strh	w22, [x25]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, 3432]
+	ldr	x0, [x19, 3440]
 	mov	w2, 4096
 	mov	w1, 0
 	bl	ftl_memset
@@ -8143,7 +8326,7 @@ FtlMakeBbt:
 	ldrh	w23, [x19, 102]
 	ldrh	w0, [x25]
 	ldr	x1, [x26]
-	ldrh	w2, [x28, -200]
+	ldrh	w2, [x28, -192]
 	madd	w23, w23, w24, w0
 	lsl	w2, w2, 2
 	lsl	w0, w23, 10
@@ -8161,34 +8344,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1187
+	bne	.L1223
 	mov	w0, w23
 	bl	FtlBbmMapBadBlock
-	b	.L1188
-.L1193:
+	b	.L1224
+.L1229:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1192
-.L1196:
+	b	.L1228
+.L1232:
 	ldrh	w0, [x20]
 	cmp	w0, w22
-	bne	.L1197
+	bne	.L1233
 	strh	w19, [x20]
-	b	.L1195
-.L1197:
+	b	.L1231
+.L1233:
 	strh	w19, [x20, 4]
-.L1198:
+.L1234:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w2, 2
-	ldr	x1, [x21, 3960]
+	ldr	x1, [x21, 3968]
 	ldrh	w0, [x21, 160]
 	str	wzr, [x21, 168]
 	strh	wzr, [x21, 162]
 	lsl	w0, w0, 10
 	str	w0, [x1, 4]
-	ldr	x0, [x21, 3960]
+	ldr	x0, [x21, 3968]
 	ldrh	w1, [x21, 164]
 	lsl	w1, w1, 10
 	str	w1, [x0, 36]
@@ -8236,16 +8419,16 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x0, 100]
 	cmp	w2, w1
-	bhi	.L1212
+	bhi	.L1248
 	ldrh	w21, [x0, 112]
 	adrp	x26, .LANCHOR3
 	add	x25, x26, :lo12:.LANCHOR3
 	mov	w23, 0
-	sub	x25, x25, #120
+	sub	x25, x25, #112
 	lsr	w21, w27, w21
-.L1206:
-	cbnz	w28, .L1211
-.L1204:
+.L1242:
+	cbnz	w28, .L1247
+.L1240:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8254,11 +8437,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1211:
+.L1247:
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x0, x26, :lo12:.LANCHOR3
 	ldrh	w1, [x2, 62]
-	ldr	x0, [x0, -232]
+	ldr	x0, [x0, -224]
 	udiv	w20, w27, w1
 	ldr	w4, [x0, w21, uxtw 2]
 	and	w0, w28, 65535
@@ -8267,10 +8450,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w28, w19
 	csel	w19, w0, w19, cc
-	cbz	w4, .L1208
+	cbz	w4, .L1244
 	cmp	w19, w1
-	beq	.L1208
-	ldr	x0, [x2, 4048]
+	beq	.L1244
+	ldr	x0, [x2, 4056]
 	mov	w2, 1
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -8279,14 +8462,14 @@ FtlVendorPartWrite:
 	str	w4, [x29, 116]
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1209:
+.L1245:
 	add	x5, x22, :lo12:.LANCHOR0
 	lsl	w4, w19, 9
 	lsl	w20, w20, 9
 	mov	w2, w4
 	asr	w20, w20, 2
 	mov	x1, x24
-	ldr	x0, [x5, 4048]
+	ldr	x0, [x5, 4056]
 	sub	w28, w28, w19
 	str	w4, [x29, 108]
 	add	w27, w27, w19
@@ -8297,23 +8480,23 @@ FtlVendorPartWrite:
 	mov	w1, w21
 	mov	x0, x25
 	add	w21, w21, 1
-	ldr	x2, [x5, 4048]
+	ldr	x2, [x5, 4056]
 	bl	FtlMapWritePage
 	cmn	w0, #1
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1206
-.L1208:
+	b	.L1242
+.L1244:
 	add	x0, x22, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrh	w2, [x0, 114]
-	ldr	x0, [x0, 4048]
+	ldr	x0, [x0, 4056]
 	bl	ftl_memset
-	b	.L1209
-.L1212:
+	b	.L1245
+.L1248:
 	mov	w23, -1
-	b	.L1204
+	b	.L1240
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
@@ -8325,10 +8508,10 @@ Ftl_save_ext_data:
 	movk	w1, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w1
-	bne	.L1220
+	bne	.L1256
 	stp	x29, x30, [sp, -16]!
 	add	x2, x0, 2720
-	mov	w1, 68
+	mov	w1, 69
 	add	x29, sp, 0
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x2, 4]
@@ -8360,7 +8543,7 @@ Ftl_save_ext_data:
 	bl	FtlVendorPartWrite
 	ldp	x29, x30, [sp], 16
 	ret
-.L1220:
+.L1256:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
@@ -8371,49 +8554,49 @@ FtlEctTblFlush:
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w2, [x1, 104]
 	cmp	w2, 31
-	bhi	.L1227
+	bhi	.L1263
 	add	w2, w2, 1
 	strh	w2, [x1, 104]
 	mov	w2, 1
-.L1224:
+.L1260:
 	adrp	x1, .LANCHOR0
-	cbnz	w0, .L1225
+	cbnz	w0, .L1261
 	add	x0, x1, :lo12:.LANCHOR0
-	ldr	x0, [x0, 4072]
+	ldr	x0, [x0, 4080]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w2, w2, w3
 	cmp	w0, w2
-	bcc	.L1229
-.L1225:
+	bcc	.L1265
+.L1261:
 	add	x0, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x1, [x0, 4072]
+	ldr	x1, [x0, 4080]
 	ldr	w2, [x1, 16]
 	str	w2, [x1, 20]
 	mov	w2, 17221
 	movk	w2, 0x4254, lsl 16
 	str	w2, [x1]
-	ldr	x2, [x0, 4072]
-	ldrh	w1, [x0, 4056]
+	ldr	x2, [x0, 4080]
+	ldrh	w1, [x0, 4064]
 	lsl	w3, w1, 9
 	str	wzr, [x2, 4]
 	str	w3, [x2, 12]
 	ldr	w3, [x2, 8]
 	add	w3, w3, 1
 	str	w3, [x2, 8]
-	ldr	x2, [x0, 4072]
+	ldr	x2, [x0, 4080]
 	mov	w0, 64
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1227:
+.L1263:
 	mov	w2, 32
-	b	.L1224
-.L1229:
+	b	.L1260
+.L1265:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -8432,85 +8615,106 @@ sftl_vendor_write:
 	.global	FtlVendorPartRead
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-	stp	x29, x30, [sp, -192]!
+	stp	x29, x30, [sp, -208]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR0
-	add	x20, x20, :lo12:.LANCHOR0
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	mov	w28, w0
-	mov	w27, w1
 	stp	x23, x24, [sp, 48]
-	add	w1, w0, w1
+	mov	w23, w0
 	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x20, 100]
-	cmp	w1, w0
-	bhi	.L1241
-	ldrh	w3, [x20, 112]
-	adrp	x24, .LANCHOR3
-	mov	x23, x2
-	add	x24, x24, :lo12:.LANCHOR3
-	mov	w22, 0
-	lsr	w25, w28, w3
-.L1235:
-	cbnz	w27, .L1240
-.L1233:
-	mov	w0, w22
+	adrp	x24, .LANCHOR0
+	mov	x26, x2
+	add	w2, w0, w1
+	add	x0, x24, :lo12:.LANCHOR0
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	mov	w22, w1
+	stp	x27, x28, [sp, 80]
+	ldrh	w1, [x0, 100]
+	cmp	w2, w1
+	bhi	.L1278
+	ldrh	w21, [x0, 112]
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	mov	w25, 0
+	sub	x0, x0, #112
+	str	x0, [x29, 104]
+	lsr	w21, w23, w21
+.L1271:
+	cbnz	w22, .L1277
+.L1269:
+	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 208
 	ret
-.L1240:
-	ldrh	w19, [x20, 62]
-	ldr	x0, [x24, -232]
-	udiv	w21, w28, w19
-	ldr	w1, [x0, w25, uxtw 2]
-	and	w0, w27, 65535
-	msub	w21, w21, w19, w28
-	sub	w19, w19, w21
+.L1277:
+	add	x28, x24, :lo12:.LANCHOR0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrh	w19, [x28, 62]
+	ldr	x0, [x0, -224]
+	udiv	w20, w23, w19
+	ldr	w4, [x0, w21, uxtw 2]
+	and	w0, w22, 65535
+	msub	w20, w20, w19, w23
+	sub	w19, w19, w20
 	and	w19, w19, 65535
-	cmp	w27, w19
+	cmp	w22, w19
 	csel	w19, w0, w19, cc
-	lsl	w26, w19, 9
-	cbz	w1, .L1237
-	ldr	x0, [x20, 4048]
+	lsl	w27, w19, 9
+	cbz	w4, .L1273
+	ldr	x0, [x28, 4056]
 	mov	w2, 1
-	str	x0, [x29, 104]
-	add	x0, x29, 128
-	str	w1, [x29, 100]
+	str	x0, [x29, 120]
+	add	x0, x29, 144
+	str	w4, [x29, 100]
 	mov	w1, w2
-	str	x0, [x29, 112]
-	add	x0, x29, 96
+	str	w4, [x29, 116]
+	str	x0, [x29, 128]
+	add	x0, x29, 112
 	bl	FlashReadPages
-	lsl	w21, w21, 9
-	ldr	w0, [x29, 96]
-	asr	w21, w21, 2
-	ldr	x1, [x20, 4048]
-	mov	w2, w26
+	ldr	w0, [x29, 112]
+	ldr	w4, [x29, 100]
 	cmn	w0, #1
-	mov	x0, x23
-	csinv	w22, w22, wzr, ne
-	add	x1, x1, x21, sxtw 2
+	ldr	w0, [x28, 3408]
+	csinv	w25, w25, wzr, ne
+	cmp	w0, 256
+	bne	.L1275
+	mov	w2, w4
+	mov	w1, w21
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
+	bl	sftl_printk
+	ldr	x2, [x28, 4056]
+	mov	w1, w21
+	ldr	x0, [x29, 104]
+	bl	FtlMapWritePage
+.L1275:
+	add	x0, x24, :lo12:.LANCHOR0
+	lsl	w20, w20, 9
+	asr	w20, w20, 2
+	mov	w2, w27
+	ldr	x1, [x0, 4056]
+	mov	x0, x26
+	add	x1, x1, x20, sxtw 2
 	bl	ftl_memcpy
-.L1239:
-	add	w25, w25, 1
-	sub	w27, w27, w19
-	add	w28, w28, w19
-	add	x23, x23, x26, sxtw
-	b	.L1235
-.L1237:
-	mov	w2, w26
+.L1276:
+	add	w21, w21, 1
+	sub	w22, w22, w19
+	add	w23, w23, w19
+	add	x26, x26, x27, sxtw
+	b	.L1271
+.L1273:
+	mov	w2, w27
 	mov	w1, 0
-	mov	x0, x23
+	mov	x0, x26
 	bl	ftl_memset
-	b	.L1239
-.L1241:
-	mov	w22, -1
-	b	.L1233
+	b	.L1276
+.L1278:
+	mov	w25, -1
+	b	.L1269
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
@@ -8522,26 +8726,26 @@ FtlLoadEctTbl:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR0
 	add	x19, x19, :lo12:.LANCHOR0
-	ldrh	w1, [x19, 4056]
-	ldr	x2, [x19, 4072]
+	ldrh	w1, [x19, 4064]
+	ldr	x2, [x19, 4080]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, 4072]
+	ldr	x0, [x19, 4080]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1244
-	adrp	x1, .LC104
+	beq	.L1281
+	adrp	x1, .LC108
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC104
+	add	x1, x1, :lo12:.LC108
 	add	x0, x0, :lo12:.LC71
 	bl	sftl_printk
-	ldr	x0, [x19, 4072]
+	ldr	x0, [x19, 4080]
 	mov	w1, 0
-	ldrh	w2, [x19, 4056]
+	ldrh	w2, [x19, 4064]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1244:
+.L1281:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8566,19 +8770,19 @@ Ftl_load_ext_data:
 	ldr	w0, [x20, 2720]
 	movk	w21, 0x4654, lsl 16
 	cmp	w0, w21
-	beq	.L1247
+	beq	.L1284
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x22
 	bl	ftl_memset
 	str	w21, [x20, 2720]
-.L1247:
+.L1284:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w2
-	bne	.L1248
+	bne	.L1285
 	ldr	w2, [x0, 2808]
 	str	w2, [x0, 2612]
 	ldr	w2, [x0, 2812]
@@ -8603,7 +8807,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 2764]
 	str	w1, [x0, 2648]
 	str	w2, [x0, 2644]
-.L1248:
+.L1285:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x0, 2632]
 	ldrh	w1, [x0, 96]
@@ -8641,14 +8845,14 @@ FtlVpcTblFlush:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	add	x20, x19, 2312
-	add	x25, x19, 3400
+	add	x25, x19, 3408
 	mov	w22, 0
-	ldr	x21, [x19, 3440]
+	ldr	x21, [x19, 3448]
 	mov	w24, 65535
-	ldr	x0, [x19, 3432]
+	ldr	x0, [x19, 3440]
 	ldrh	w1, [x19, 2656]
-	str	x0, [x19, 3408]
-	str	x21, [x19, 3416]
+	str	x0, [x19, 3416]
+	str	x21, [x19, 3424]
 	strh	w1, [x21, 2]
 	mov	w1, -3932
 	strh	w1, [x21]
@@ -8658,48 +8862,52 @@ FtlVpcTblFlush:
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	str	w1, [x19, 2312]
-	mov	w1, 68
+	mov	w1, 69
 	ldrb	w2, [x19, 2430]
 	movk	w1, 0x5000, lsl 16
-	str	w1, [x19, 2316]
+	str	w1, [x20, 4]
 	ldrh	w1, [x19, 2424]
-	strh	w1, [x19, 2326]
+	strh	w1, [x20, 14]
 	ldrh	w1, [x19, 2426]
 	ldrh	w0, [x19, 2662]
-	strh	w0, [x19, 2320]
+	strh	w0, [x20, 8]
 	ldrh	w0, [x19, 58]
 	orr	w1, w2, w1, lsl 6
-	strb	w0, [x19, 2322]
-	strh	w1, [x19, 2328]
+	strb	w0, [x20, 10]
+	strh	w1, [x20, 16]
 	ldrh	w1, [x19, 2472]
+	ldrb	w0, [x19, 2432]
+	strh	w1, [x20, 18]
 	ldrb	w2, [x19, 2478]
-	strh	w1, [x19, 2330]
 	ldrh	w1, [x19, 2474]
-	ldrb	w0, [x19, 2432]
-	strb	w0, [x19, 2323]
-	orr	w1, w2, w1, lsl 6
+	strb	w0, [x20, 11]
 	ldrb	w0, [x19, 2480]
-	strh	w1, [x19, 2332]
-	strb	w0, [x19, 2324]
-	ldrh	w1, [x19, 2520]
+	strb	w0, [x20, 12]
+	orr	w1, w2, w1, lsl 6
 	ldrb	w0, [x19, 2528]
-	ldrb	w2, [x19, 2526]
-	strh	w1, [x19, 2334]
-	strb	w0, [x19, 2325]
-	ldrh	w1, [x19, 2522]
+	strb	w0, [x20, 13]
 	ldr	w0, [x19, 2628]
-	str	w0, [x19, 2344]
+	strh	w1, [x20, 20]
+	str	w0, [x20, 32]
+	ldrh	w1, [x19, 2520]
 	ldr	w0, [x19, 2620]
-	orr	w1, w2, w1, lsl 6
-	str	w0, [x19, 2352]
+	strh	w1, [x20, 22]
+	ldrb	w2, [x19, 2526]
+	str	w0, [x20, 40]
+	ldrh	w1, [x19, 2522]
 	ldr	w0, [x19, 2624]
+	str	w0, [x20, 36]
+	ldrh	w0, [x19, 3320]
+	orr	w1, w2, w1, lsl 6
+	strh	w0, [x20, 44]
+	ldrh	w0, [x19, 3322]
+	strh	w0, [x20, 46]
 	ldrh	w2, [x19, 114]
-	str	w0, [x19, 2348]
-	ldr	x0, [x19, 3408]
-	strh	w1, [x19, 2336]
+	ldr	x0, [x19, 3416]
+	strh	w1, [x20, 24]
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x0, [x19, 3408]
+	ldr	x0, [x19, 3416]
 	mov	x1, x20
 	mov	w2, 48
 	mov	x20, x25
@@ -8709,12 +8917,12 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldr	x1, [x19, 2376]
 	ldrh	w2, [x19, 44]
-	ldr	x0, [x19, 3408]
+	ldr	x0, [x19, 3416]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
 	ldrh	w0, [x19, 44]
-	ldr	x3, [x19, 3408]
+	ldr	x3, [x19, 3416]
 	ldr	x1, [x19, 24]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -8725,12 +8933,12 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.L1253:
-	ldr	x0, [x19, 3432]
+.L1290:
+	ldr	x0, [x19, 3440]
 	mov	w3, 1
 	str	x0, [x20, 8]
 	mov	w2, w3
-	ldr	x0, [x19, 3440]
+	ldr	x0, [x19, 3448]
 	ldrh	w1, [x19, 2658]
 	str	x0, [x20, 16]
 	ldrh	w0, [x19, 2656]
@@ -8743,7 +8951,7 @@ FtlVpcTblFlush:
 	ldrh	w1, [x19, 2658]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1254
+	blt	.L1291
 	ldrh	w0, [x19, 2656]
 	ldrh	w24, [x19, 2660]
 	strh	wzr, [x19, 2658]
@@ -8763,51 +8971,53 @@ FtlVpcTblFlush:
 	mov	x0, x20
 	mov	w1, w3
 	bl	FlashProgPages
-.L1254:
+.L1291:
 	ldrh	w0, [x19, 2658]
 	ldr	w1, [x20]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2658]
 	cmn	w1, #1
-	bne	.L1255
+	bne	.L1292
 	cmp	w0, 1
-	bne	.L1256
+	bne	.L1293
 	adrp	x0, .LC1
-	mov	w2, 1124
+	mov	w2, 1169
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1256:
+.L1293:
 	ldrh	w0, [x19, 2658]
 	cmp	w0, 1
-	bne	.L1257
+	bne	.L1294
 	ldrh	w0, [x19, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2658]
-.L1257:
+.L1294:
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	cmp	w22, 3
-	bls	.L1253
+	bls	.L1290
 	add	x23, x23, :lo12:.LANCHOR0
-	adrp	x0, .LC105
+	adrp	x0, .LC109
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC105
-	ldr	w1, [x23, 3404]
+	add	x0, x0, :lo12:.LC109
+	ldr	w1, [x23, 3412]
 	bl	sftl_printk
-.L1259:
-	b	.L1259
-.L1255:
+.L1296:
+	b	.L1296
+.L1292:
 	cmp	w0, 1
-	beq	.L1253
+	beq	.L1290
+	cmp	w1, 256
+	beq	.L1290
 	mov	w0, 65535
 	cmp	w24, w0
-	beq	.L1260
+	beq	.L1297
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.L1260:
+.L1297:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8817,87 +9027,204 @@ FtlVpcTblFlush:
 	ret
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	l2p_flush
+	mov	w0, 1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.align	2
+	.global	sftl_deinit
+	.type	sftl_deinit, %function
+sftl_deinit:
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w0, 1
+	bne	.L1310
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1310:
+	mov	w0, 0
+	ret
+	.size	sftl_deinit, .-sftl_deinit
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+	stp	x29, x30, [sp, -64]!
+	add	w3, w0, w1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	adrp	x20, .LANCHOR0
+	add	x1, x20, :lo12:.LANCHOR0
+	stp	x21, x22, [sp, 32]
+	ldr	w2, [x1, 144]
+	cmp	w3, w2
+	bhi	.L1321
+	cmp	w19, 31
+	bhi	.L1315
+.L1329:
+	mov	w0, 0
+.L1313:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1315:
+	ldrh	w1, [x1, 62]
+	udiv	w21, w0, w1
+	msub	w0, w1, w21, w0
+	ands	w0, w0, 65535
+	beq	.L1316
+	sub	w1, w1, w0
+	add	w21, w21, 1
+	cmp	w1, w19
+	csel	w1, w1, w19, ls
+	sub	w19, w19, w1, uxth
+.L1316:
+	adrp	x22, .LANCHOR3
+	add	x20, x20, :lo12:.LANCHOR0
+	add	x22, x22, :lo12:.LANCHOR3
+	mov	w0, -1
+	str	w0, [x29, 60]
+.L1317:
+	ldrh	w0, [x20, 62]
+	cmp	w19, w0
+	bcs	.L1319
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldr	w1, [x0, 108]
+	cmp	w1, 32
+	bls	.L1329
+	str	wzr, [x0, 108]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1329
+.L1319:
+	mov	w2, 0
+	add	x1, x29, 56
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 56]
+	cmn	w0, #1
+	beq	.L1318
+	ldr	w0, [x22, 108]
+	mov	w2, 1
+	add	x1, x29, 60
+	add	w0, w0, 1
+	str	w0, [x22, 108]
+	ldr	w0, [x20, 2592]
+	add	w0, w0, 1
+	str	w0, [x20, 2592]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 56]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1318:
+	ldrh	w0, [x20, 62]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L1317
+.L1321:
+	mov	w0, -1
+	b	.L1313
+	.size	FtlDiscard, .-FtlDiscard
+	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
-	adrp	x0, .LC95
+	adrp	x0, .LC97
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
 	add	x1, x1, 552
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC97
 	str	x23, [sp, 48]
 	bl	sftl_printk
-	ldr	x0, [x19, 4080]
+	ldr	x0, [x19, 4088]
 	mov	w21, 0
 	ldrh	w2, [x19, 46]
 	mov	w1, 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1266:
+.L1331:
 	ldr	w0, [x19, 2584]
 	cmp	w21, w0
-	bcc	.L1268
-	adrp	x22, .LC106
+	bcc	.L1333
+	adrp	x22, .LC110
 	add	x20, x20, :lo12:.LANCHOR0
-	add	x22, x22, :lo12:.LC106
+	add	x22, x22, :lo12:.LC110
 	mov	w19, 0
 	mov	w23, 65535
-.L1269:
+.L1334:
 	ldrh	w0, [x20, 44]
 	cmp	w0, w19
-	bhi	.L1273
+	bhi	.L1338
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1268:
+.L1333:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1267
+	beq	.L1332
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldr	x2, [x19, 4080]
+	ldr	x2, [x19, 4088]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1267:
+.L1332:
 	add	w21, w21, 1
-	b	.L1266
-.L1273:
+	b	.L1331
+.L1338:
 	ldr	x0, [x20, 2376]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
-	ldr	x0, [x20, 4080]
+	ldr	x0, [x20, 4088]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1271
+	beq	.L1336
 	cmp	w2, w23
-	beq	.L1271
+	beq	.L1336
 	mov	x0, x22
 	mov	w1, w19
 	bl	sftl_printk
 	ldrh	w0, [x20, 2424]
 	cmp	w0, w19
-	beq	.L1271
+	beq	.L1336
 	ldrh	w0, [x20, 2520]
 	cmp	w0, w19
-	beq	.L1271
+	beq	.L1336
 	ldrh	w0, [x20, 2472]
 	cmp	w0, w19
-	beq	.L1271
-	ldr	x0, [x20, 4080]
+	beq	.L1336
+	ldr	x0, [x20, 4088]
 	ldrh	w1, [x0, x21]
 	ldr	x0, [x20, 2376]
 	strh	w1, [x0, x21]
@@ -8905,10 +9232,10 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1271:
+.L1336:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1269
+	b	.L1334
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	allocate_new_data_superblock
@@ -8924,26 +9251,26 @@ allocate_new_data_superblock:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 44]
 	cmp	w0, w21
-	bcs	.L1279
+	bcs	.L1344
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 2681
+	mov	w2, 2750
 	add	x1, x1, 576
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1279:
+.L1344:
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L1280
+	beq	.L1345
 	add	x1, x19, :lo12:.LANCHOR0
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, 2376]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1281
+	cbz	w0, .L1346
 	mov	w0, w21
 	bl	INSERT_DATA_LIST
-.L1280:
+.L1345:
 	mov	w0, 1
 	adrp	x1, .LANCHOR3
 	strb	w0, [x22, 8]
@@ -8952,21 +9279,21 @@ allocate_new_data_superblock:
 	mov	x20, x1
 	ldrh	w0, [x0, -48]
 	cmp	w0, w2
-	beq	.L1282
+	beq	.L1347
 	cmp	w21, w0
-	bne	.L1283
+	bne	.L1348
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x19, 2376]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1284
-.L1283:
+	cbz	w1, .L1349
+.L1348:
 	bl	update_vpc_list
-.L1284:
+.L1349:
 	add	x1, x20, :lo12:.LANCHOR3
 	mov	w0, -1
 	strh	w0, [x1, -48]
-.L1282:
+.L1347:
 	mov	x0, x22
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8978,10 +9305,10 @@ allocate_new_data_superblock:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1281:
+.L1346:
 	mov	w0, w21
 	bl	INSERT_FREE_LIST
-	b	.L1280
+	b	.L1345
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
@@ -9006,18 +9333,18 @@ FtlProgPages:
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x20, x0, 4
 	bl	FlashProgPages
-.L1290:
+.L1355:
 	cmp	x20, x24
-	beq	.L1297
+	beq	.L1362
 	sub	x23, x20, #4
-	b	.L1298
-.L1293:
+	b	.L1363
+.L1358:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1291
+	bne	.L1356
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9028,12 +9355,12 @@ FtlProgPages:
 	ldrh	w0, [x21, 106]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1291:
+.L1356:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1292
+	cbnz	w0, .L1357
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1292:
+.L1357:
 	ldr	w0, [x21, 2816]
 	add	w0, w0, 1
 	str	w0, [x21, 2816]
@@ -9049,20 +9376,20 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x23
 	bl	FlashProgPages
-.L1298:
+.L1363:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1293
+	beq	.L1358
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x21, 36]
 	cmp	w1, w0
-	bcc	.L1294
+	bcc	.L1359
 	adrp	x0, .LC1
-	mov	w2, 933
+	mov	w2, 936
 	add	x1, x25, 608
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1294:
+.L1359:
 	add	x1, x29, 96
 	ldr	w0, [x23, 4]
 	mov	w2, 1
@@ -9076,35 +9403,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w23, w1
 	cmn	w4, #1
-	beq	.L1295
+	beq	.L1360
 	ldr	x2, [x21, 2376]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1296
-	adrp	x0, .LC107
+	cbnz	w0, .L1361
+	adrp	x0, .LC111
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC111
 	bl	sftl_printk
-.L1296:
+.L1361:
 	mov	w0, w23
 	bl	decrement_vpc_count
-.L1295:
+.L1360:
 	add	x20, x20, 32
-	b	.L1290
-.L1297:
+	b	.L1355
+.L1362:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x22, 36]
 	cmp	w1, w0
-	bcc	.L1289
+	bcc	.L1354
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 948
+	mov	w2, 951
 	add	x1, x1, 608
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1289:
+.L1354:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9113,213 +9440,71 @@ FtlProgPages:
 	ret
 	.size	FtlProgPages, .-FtlProgPages
 	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR3
-	add	x19, x19, :lo12:.LANCHOR3
-	ldr	x0, [x19, -56]
-	cbz	x0, .L1305
-	ldr	x3, [x19, 112]
-	mov	w2, 0
-	mov	w1, 1
-	bl	FtlProgPages
-	str	xzr, [x19, -56]
-.L1305:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	w0, 1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlSysFlush, .-FtlSysFlush
-	.align	2
-	.global	sftl_deinit
-	.type	sftl_deinit, %function
-sftl_deinit:
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
-	cmp	w0, 1
-	bne	.L1315
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlSysFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L1315:
-	mov	w0, 0
-	ret
-	.size	sftl_deinit, .-sftl_deinit
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-	stp	x29, x30, [sp, -64]!
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	stp	x29, x30, [sp, -96]!
+	mov	w3, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR0
+	adrp	x19, .LANCHOR0
+	add	x2, x19, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
-	add	x22, x20, :lo12:.LANCHOR0
-	mov	w21, w0
-	mov	w19, w1
-	add	w1, w0, w1
-	ldr	w0, [x22, 144]
-	cmp	w1, w0
-	bhi	.L1326
-	cmp	w19, 31
-	bhi	.L1320
-.L1334:
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldrh	w20, [x2, 2520]
+	ldrh	w1, [x2, 106]
+	cmp	w20, w3
+	bne	.L1370
+.L1380:
+	adrp	x0, .LANCHOR3-40
+	mov	w2, 65535
+	str	wzr, [x0, #:lo12:.LANCHOR3-40]
+	add	x0, x19, :lo12:.LANCHOR0
+	add	x1, x0, 2520
+	ldrh	w3, [x0, 2520]
+	cmp	w3, w2
+	bne	.L1393
+.L1396:
 	mov	w0, 0
-.L1318:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1320:
-	bl	FtlCacheWriteBack
-	ldrh	w1, [x22, 62]
-	udiv	w22, w21, w1
-	msub	w21, w1, w22, w21
-	ands	w21, w21, 65535
-	beq	.L1321
-	sub	w1, w1, w21
-	add	w22, w22, 1
-	cmp	w1, w19
-	csel	w1, w1, w19, ls
-	sub	w19, w19, w1, uxth
-.L1321:
-	adrp	x21, .LANCHOR3
-	add	x20, x20, :lo12:.LANCHOR0
-	add	x21, x21, :lo12:.LANCHOR3
-	mov	w0, -1
-	str	w0, [x29, 60]
-.L1322:
-	ldrh	w0, [x20, 62]
-	cmp	w19, w0
-	bcs	.L1324
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	ldr	w1, [x0, 120]
-	cmp	w1, 32
-	bls	.L1334
-	str	wzr, [x0, 120]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1334
-.L1324:
-	mov	w2, 0
-	add	x1, x29, 56
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 56]
-	cmn	w0, #1
-	beq	.L1323
-	ldr	w0, [x21, 120]
-	mov	w2, 1
-	add	x1, x29, 60
-	add	w0, w0, 1
-	str	w0, [x21, 120]
-	ldr	w0, [x20, 2592]
-	add	w0, w0, 1
-	str	w0, [x20, 2592]
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 56]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1323:
-	ldrh	w0, [x20, 62]
-	add	w22, w22, 1
-	sub	w19, w19, w0
-	b	.L1322
-.L1326:
-	mov	w0, -1
-	b	.L1318
-	.size	FtlDiscard, .-FtlDiscard
-	.align	2
-	.global	FtlGcFreeTempBlock
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	stp	x29, x30, [sp, -96]!
-	mov	w3, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR0
-	add	x2, x19, :lo12:.LANCHOR0
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	ldrh	w20, [x2, 2520]
-	ldrh	w1, [x2, 106]
-	cmp	w20, w3
-	bne	.L1336
-.L1346:
-	add	x20, x19, :lo12:.LANCHOR0
-	adrp	x0, .LANCHOR3-40
-	add	x21, x20, 2520
-	str	wzr, [x0, #:lo12:.LANCHOR3-40]
-	mov	w0, 65535
-	ldrh	w1, [x20, 2520]
-	cmp	w1, w0
-	bne	.L1359
-.L1362:
-	mov	w0, 0
-.L1335:
+.L1369:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1336:
-	cbz	w0, .L1339
+.L1370:
+	cbz	w0, .L1373
 	adrp	x0, .LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w4, [x0, 4]
 	cmp	w4, w3
-	beq	.L1340
-.L1341:
+	beq	.L1374
+.L1375:
 	mov	w1, 2
-.L1339:
+.L1373:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x0, x21, 2520
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1342
+	beq	.L1376
 	ldr	x1, [x21, 2384]
 	ubfiz	x20, x20, 1, 16
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1343
+	bls	.L1377
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1343:
+.L1377:
 	adrp	x0, .LANCHOR3
 	add	x1, x0, :lo12:.LANCHOR3
 	mov	x20, x0
 	ldr	w1, [x1, -40]
-	cbnz	w1, .L1344
+	cbnz	w1, .L1378
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
@@ -9328,33 +9513,32 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1344:
+.L1378:
 	add	x0, x20, :lo12:.LANCHOR3
 	str	wzr, [x0, -40]
-.L1355:
+.L1389:
 	mov	w0, 1
-	b	.L1335
-.L1340:
+	b	.L1369
+.L1374:
 	strh	wzr, [x0, 4]
 	ldrh	w0, [x2, 2416]
 	cmp	w0, 17
-	bhi	.L1341
-	b	.L1339
-.L1342:
+	bhi	.L1375
+	b	.L1373
+.L1376:
 	adrp	x0, .LANCHOR2+4
 	ldrh	w1, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1355
-	b	.L1346
-.L1359:
-	bl	FtlCacheWriteBack
-	ldrb	w0, [x21, 7]
-	ldrh	w2, [x20, 106]
-	ldrh	w1, [x20, 3304]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L1347
+	bne	.L1389
+	b	.L1380
+.L1393:
+	ldrh	w2, [x0, 3304]
+	ldrb	w1, [x1, 7]
+	ldrh	w0, [x0, 106]
+	mul	w0, w1, w0
+	cmp	w2, w0
+	beq	.L1381
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -9362,7 +9546,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, 624
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1347:
+.L1381:
 	add	x0, x19, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR1
 	add	x22, x22, :lo12:.LANCHOR1
@@ -9380,20 +9564,20 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x0, 3304]
 	add	w1, w1, w2
 	str	w1, [x0, 2608]
-.L1348:
+.L1382:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x21, 3304]
 	cmp	w0, w20
-	bhi	.L1352
+	bhi	.L1386
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x21, 2520]
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1353
+	cbz	w1, .L1387
 	bl	INSERT_DATA_LIST
-.L1354:
+.L1388:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w20, -1
 	strh	wzr, [x19, 3304]
@@ -9405,12 +9589,12 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x19, 2416]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1362
+	ble	.L1396
 	mov	w0, 20
 	strh	w20, [x19, 2672]
 	strh	w0, [x19, 3232]
-	b	.L1362
-.L1352:
+	b	.L1396
+.L1386:
 	mov	w24, 12
 	ldr	x26, [x21, 3312]
 	ldr	w0, [x21, 2584]
@@ -9418,12 +9602,12 @@ FtlGcFreeTempBlock:
 	add	x23, x26, x24
 	ldr	w1, [x23, 8]
 	cmp	w1, w0
-	bcc	.L1349
+	bcc	.L1383
 	mov	w2, 168
 	mov	x1, x22
 	mov	x0, x25
 	bl	sftl_printk
-.L1349:
+.L1383:
 	ldr	w0, [x23, 8]
 	add	x1, x29, 92
 	mov	w2, 0
@@ -9431,7 +9615,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x26, x24]
 	ldr	w1, [x29, 92]
 	cmp	w0, w1
-	bne	.L1350
+	bne	.L1384
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w21, w0
@@ -9440,22 +9624,22 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w21
-.L1361:
+.L1395:
 	bl	decrement_vpc_count
-.L1351:
+.L1385:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1348
-.L1350:
+	b	.L1382
+.L1384:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	beq	.L1351
+	beq	.L1385
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 2520]
-	b	.L1361
-.L1353:
+	b	.L1395
+.L1387:
 	bl	INSERT_FREE_LIST
-	b	.L1354
+	b	.L1388
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
 	.global	FtlGcPageRecovery
@@ -9473,15 +9657,15 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2522]
 	ldrh	w0, [x19, 106]
 	cmp	w1, w0
-	bcc	.L1363
+	bcc	.L1397
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
-	sub	x0, x19, #192
+	sub	x0, x19, #184
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	str	wzr, [x19, -40]
-.L1363:
+.L1397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9527,28 +9711,28 @@ Ftl_gc_temp_data_write_back:
 	str	x19, [sp, 16]
 	add	x19, x11, :lo12:.LANCHOR0
 	ldr	w1, [x19, 3248]
-	ldr	x0, [x19, 4024]
+	ldr	x0, [x19, 4032]
 	bl	FlashProgPages
 	mov	w10, 0
-.L1369:
+.L1403:
 	ldr	w1, [x19, 3248]
 	cmp	w10, w1
-	bcc	.L1372
-	ldr	x0, [x19, 4024]
+	bcc	.L1406
+	ldr	x0, [x19, 4032]
 	bl	FtlGcBufFree
 	str	wzr, [x19, 3248]
 	ldrh	w0, [x19, 2524]
-	cbnz	w0, .L1373
+	cbnz	w0, .L1407
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1375
-.L1372:
-	ldr	x0, [x19, 4024]
+	b	.L1409
+.L1406:
+	ldr	x0, [x19, 4032]
 	ubfiz	x1, x10, 5, 16
 	add	x3, x0, x1
 	ldr	w0, [x0, x1]
 	cmn	w0, #1
-	bne	.L1370
+	bne	.L1404
 	ldrh	w3, [x19, 2520]
 	ldr	x2, [x19, 2376]
 	strh	wzr, [x2, x3, lsl 1]
@@ -9556,30 +9740,30 @@ Ftl_gc_temp_data_write_back:
 	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
 	str	w0, [x19, 2816]
-	ldr	x0, [x19, 4024]
+	ldr	x0, [x19, 4032]
 	add	x0, x0, x1
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1375:
+.L1409:
 	mov	w0, 1
-.L1368:
+.L1402:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1370:
+.L1404:
 	ldr	x0, [x3, 16]
 	ldr	w1, [x3, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L1369
-.L1373:
+	b	.L1403
+.L1407:
 	mov	w0, 0
-	b	.L1368
+	b	.L1402
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
 	.global	Ftl_get_new_temp_ppa
@@ -9594,11 +9778,10 @@ Ftl_get_new_temp_ppa:
 	ldrh	w2, [x0, 2520]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L1377
+	beq	.L1411
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1378
-.L1377:
-	bl	FtlCacheWriteBack
+	cbnz	w0, .L1412
+.L1411:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -9611,7 +9794,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1378:
+.L1412:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 2520
 	bl	get_new_active_ppa
@@ -9632,24 +9815,24 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldr	w2, [x1, 4000]
-	cbnz	w2, .L1452
+	ldr	w2, [x1, 4008]
+	cbnz	w2, .L1485
 	ldrh	w2, [x1, 2400]
 	cmp	w2, 47
-	bls	.L1452
+	bls	.L1485
 	mov	w23, w0
 	adrp	x0, .LANCHOR2+4
 	ldrh	w2, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1382
-.L1385:
-	add	x0, x19, :lo12:.LANCHOR0
+	bne	.L1416
+.L1419:
+	add	x1, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
-	ldrh	w1, [x0, 3322]
-	cmp	w1, w2
-	bne	.L1383
-.L1384:
+	ldrh	w4, [x1, 3322]
+	cmp	w4, w2
+	bne	.L1417
+.L1418:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w20, 65535
 	ldr	w1, [x21, 3236]
@@ -9658,93 +9841,93 @@ rk_ftl_garbage_collect:
 	add	w1, w1, w23, lsl 7
 	str	w1, [x21, 3236]
 	cmp	w0, w20
-	bne	.L1386
+	bne	.L1420
 	ldrh	w20, [x21, 2520]
 	cmp	w20, w0
-	bne	.L1455
+	bne	.L1488
 	ldrh	w22, [x21, 3320]
 	cmp	w22, w20
-	bne	.L1386
+	bne	.L1420
 	ldrh	w0, [x21, 2416]
 	mov	w2, 1024
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L1458
-	adrp	x0, .LANCHOR3+124
+	bls	.L1491
+	adrp	x0, .LANCHOR3+112
 	str	wzr, [x21, 3236]
-	strh	wzr, [x0, #:lo12:.LANCHOR3+124]
+	strh	wzr, [x0, #:lo12:.LANCHOR3+112]
 	bl	GetSwlReplaceBlock
 	and	w20, w0, 65535
 	cmp	w20, w22
-	bne	.L1459
+	bne	.L1492
 	ldrh	w1, [x21, 2416]
 	ldrh	w0, [x21, 3234]
 	cmp	w1, w0
-	bcs	.L1389
+	bcs	.L1423
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
 	cmp	w0, w20
-	beq	.L1391
+	beq	.L1425
 	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1392
+	bhi	.L1426
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	and	w22, w0, 65535
 	mov	w0, 128
 	strh	w0, [x21, 3234]
 	cmp	w22, w20
-	bne	.L1388
-.L1391:
+	bne	.L1422
+.L1425:
 	bl	FtlGcReFreshBadBlk
-.L1386:
+.L1420:
 	cmp	w23, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1394
+	bne	.L1428
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 24
-	bhi	.L1460
+	bhi	.L1493
 	cmp	w0, 16
 	ldrh	w21, [x1, 106]
-	bls	.L1396
+	bls	.L1430
 	lsr	w21, w21, 5
-.L1395:
+.L1429:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1, 3232]
 	cmp	w2, w0
-	bcs	.L1399
+	bcs	.L1433
 	ldrh	w0, [x1, 2520]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1400
+	bne	.L1434
 	ldrh	w2, [x1, 3320]
 	cmp	w2, w0
-	bne	.L1400
-	adrp	x0, .LANCHOR3+124
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
-	cbnz	w0, .L1401
+	bne	.L1434
+	adrp	x0, .LANCHOR3+112
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+112]
+	cbnz	w0, .L1435
 	ldr	w2, [x1, 2584]
 	ldr	w3, [x1, 2580]
 	add	w2, w2, w2, lsl 1
 	cmp	w3, w2, lsr 2
-	bcs	.L1402
-.L1401:
+	bcs	.L1436
+.L1435:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x2, 2652]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x2, 3232]
-.L1403:
+.L1437:
 	add	x19, x19, :lo12:.LANCHOR0
 	str	wzr, [x19, 3244]
-.L1380:
+.L1414:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9752,34 +9935,42 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1382:
+.L1416:
 	ldrh	w1, [x1, 2520]
 	cmp	w1, w0
-	beq	.L1385
+	beq	.L1419
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1385
+	cbz	w0, .L1419
 	mov	w0, 1
-	b	.L1380
-.L1383:
-	ldrh	w3, [x0, 3320]
-	cmp	w3, w2
-	bne	.L1384
-	strh	w1, [x0, 3320]
-	mov	w1, -1
-	strh	w1, [x0, 3322]
-	b	.L1384
-.L1392:
+	b	.L1414
+.L1417:
+	ldrh	w0, [x1, 3320]
+	cmp	w0, w2
+	bne	.L1418
+	ldrh	w3, [x1, 3324]
+	cmp	w3, w0
+	beq	.L1418
+	ldrh	w2, [x1, 3326]
+	cmp	w2, w0
+	beq	.L1418
+	mov	w0, -1
+	strh	w4, [x1, 3320]
+	strh	w3, [x1, 3322]
+	strh	w2, [x1, 3324]
+	strh	w0, [x1, 3326]
+	b	.L1418
+.L1426:
 	mov	w0, 64
-.L1484:
+.L1517:
 	strh	w0, [x21, 3234]
-	b	.L1391
-.L1389:
+	b	.L1425
+.L1423:
 	mov	w0, 80
-	b	.L1484
-.L1459:
+	b	.L1517
+.L1492:
 	mov	w22, w20
-.L1388:
+.L1422:
 	add	x0, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x22, 1, 32
 	mov	w20, w22
@@ -9790,75 +9981,75 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mov	w1, w22
 	ldrh	w2, [x0, 2416]
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	sftl_printk
-	b	.L1391
-.L1455:
+	b	.L1425
+.L1488:
 	mov	w20, w0
-	b	.L1386
-.L1458:
+	b	.L1420
+.L1491:
 	mov	w20, w22
-	b	.L1386
-.L1396:
+	b	.L1420
+.L1430:
 	cmp	w0, 12
-	bls	.L1397
+	bls	.L1431
 	lsr	w21, w21, 4
-	b	.L1395
-.L1397:
+	b	.L1429
+.L1431:
 	mov	w1, w21
 	cmp	w0, 9
 	lsr	w21, w21, 2
 	csel	w21, w21, w1, cs
-	b	.L1395
-.L1460:
+	b	.L1429
+.L1493:
 	mov	w21, 1
-	b	.L1395
-.L1402:
+	b	.L1429
+.L1436:
 	mov	w2, 18
 	strh	w2, [x1, 3232]
-	b	.L1403
-.L1400:
+	b	.L1437
+.L1434:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x1, 3232]
-.L1399:
+.L1433:
 	add	x0, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 3324]
-	cbz	w0, .L1461
+	ldrh	w0, [x0, 3328]
+	cbz	w0, .L1494
 	add	w21, w21, 32
 	and	w21, w21, 65535
-.L1461:
+.L1494:
 	mov	w20, 65535
-.L1405:
+.L1439:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w2
-	bne	.L1414
+	bne	.L1448
 	cmp	w20, w1
-	beq	.L1415
+	beq	.L1449
 	strh	w20, [x0, 2672]
-.L1416:
+.L1450:
 	add	x5, x19, :lo12:.LANCHOR0
 	mov	w1, 65535
 	ldrh	w0, [x5, 2672]
 	strb	wzr, [x5, 2680]
 	cmp	w0, w1
-	beq	.L1414
+	beq	.L1448
 	bl	IsBlkInGcList
-	cbz	w0, .L1419
+	cbz	w0, .L1453
 	mov	w0, -1
 	strh	w0, [x5, 2672]
-.L1419:
+.L1453:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	add	x23, x22, 2672
 	ldrh	w1, [x22, 2672]
 	cmp	w1, w0
-	beq	.L1414
+	beq	.L1448
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR3
@@ -9867,90 +10058,90 @@ rk_ftl_garbage_collect:
 	ldr	x1, [x22, 2376]
 	strh	wzr, [x22, 2674]
 	strb	wzr, [x22, 2678]
-	strh	wzr, [x0, 126]
+	strh	wzr, [x0, 114]
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 128]
-.L1414:
+	strh	w1, [x0, 116]
+.L1448:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w2, [x0, 2424]
 	cmp	w2, w1
-	beq	.L1420
+	beq	.L1454
 	ldrh	w0, [x0, 2472]
 	cmp	w0, w1
-	beq	.L1420
+	beq	.L1454
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x24, x24, 648
-.L1421:
+.L1455:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w23, [x22, 2672]
 	cmp	w23, w0
-	bne	.L1422
+	bne	.L1456
 	mov	w25, 2
 	str	wzr, [x22, 3244]
-.L1423:
+.L1457:
 	ldrh	w5, [x22, 3240]
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x22, 2672]
 	cmp	w6, w23
-	bne	.L1424
+	bne	.L1458
 	strh	wzr, [x22, 3240]
 	mov	w0, 8
-	b	.L1380
-.L1394:
+	b	.L1414
+.L1428:
 	add	x5, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x5, 2520]
 	cmp	w1, w0
-	bne	.L1464
+	bne	.L1497
 	ldrh	w0, [x5, 3320]
 	cmp	w0, w1
-	bne	.L1464
+	bne	.L1497
 	cmp	w20, w0
-	bne	.L1464
+	bne	.L1497
 	ldrh	w0, [x5, 2672]
 	cmp	w0, w20
-	beq	.L1406
-.L1464:
+	beq	.L1440
+.L1497:
 	mov	w21, 1
-	b	.L1405
-.L1406:
+	b	.L1439
+.L1440:
 	ldrh	w7, [x5, 2416]
 	adrp	x21, .LANCHOR3
 	ldrh	w0, [x5, 3232]
 	str	wzr, [x5, 3244]
 	cmp	w0, w7
-	bcs	.L1407
+	bcs	.L1441
 	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 124]
-	cbnz	w0, .L1408
+	ldrh	w0, [x0, 112]
+	cbnz	w0, .L1442
 	ldr	w0, [x5, 2584]
 	ldr	w1, [x5, 2580]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1409
-.L1408:
+	bcs	.L1443
+.L1442:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x19, 3232]
-.L1410:
+.L1444:
 	bl	FtlReadRefresh
-.L1485:
+.L1518:
 	add	x21, x21, :lo12:.LANCHOR3
-	b	.L1486
-.L1409:
+	b	.L1519
+.L1443:
 	mov	w0, 18
 	strh	w0, [x5, 3232]
-	b	.L1410
-.L1407:
+	b	.L1444
+.L1441:
 	add	x21, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x21, 124]
-	cbnz	w0, .L1464
+	ldrh	w0, [x21, 112]
+	cbnz	w0, .L1497
 	ldrh	w6, [x5, 2652]
 	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
@@ -9966,55 +10157,55 @@ rk_ftl_garbage_collect:
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L1412
+	ble	.L1446
 	sub	w6, w6, #1
 	cmp	w7, w6
-	blt	.L1412
+	blt	.L1446
 	bl	FtlReadRefresh
-.L1486:
-	ldrh	w0, [x21, 124]
-	b	.L1380
-.L1412:
-	cbnz	w1, .L1464
+.L1519:
+	ldrh	w0, [x21, 112]
+	b	.L1414
+.L1446:
+	cbnz	w1, .L1497
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, 1
-	b	.L1380
-.L1415:
+	b	.L1414
+.L1449:
 	ldrh	w1, [x0, 3320]
 	cmp	w1, w20
-	beq	.L1416
+	beq	.L1450
 	ldr	x2, [x0, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1417
+	cbnz	w1, .L1451
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-.L1417:
+.L1451:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3320]
 	strh	w1, [x0, 2672]
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-	b	.L1416
-.L1420:
+	b	.L1450
+.L1454:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	w0, [x19, 2672]
-.L1487:
-	adrp	x0, .LANCHOR3+124
-	ldrh	w0, [x0, #:lo12:.LANCHOR3+124]
-	b	.L1380
-.L1424:
+.L1520:
+	adrp	x0, .LANCHOR3+112
+	ldrh	w0, [x0, #:lo12:.LANCHOR3+112]
+	b	.L1414
+.L1458:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1425
+	cbz	w0, .L1459
 	strh	w5, [x22, 3240]
-	b	.L1423
-.L1425:
+	b	.L1457
+.L1459:
 	ldrh	w4, [x22, 36]
 	ubfiz	x1, x6, 1, 16
 	ldrh	w0, [x22, 106]
@@ -10025,69 +10216,69 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	sdiv	w4, w0, w25
 	cmp	w3, w4
-	bgt	.L1427
+	bgt	.L1461
 	cmp	w5, 48
-	bls	.L1428
+	bls	.L1462
 	cmp	w3, 8
-	bls	.L1428
+	bls	.L1462
 	ldrh	w3, [x22, 3292]
 	cmp	w3, 35
-	bhi	.L1428
-.L1427:
+	bhi	.L1462
+.L1461:
 	strh	wzr, [x22, 3240]
-.L1428:
+.L1462:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1429
+	bgt	.L1463
 	cmp	w20, w23
-	bne	.L1429
+	bne	.L1463
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	wzr, [x19, 3240]
 	strh	w0, [x19, 2672]
-	b	.L1487
-.L1429:
-	cbnz	w1, .L1430
+	b	.L1520
+.L1463:
+	cbnz	w1, .L1464
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x22, 3240]
 	add	w0, w0, 1
 	strh	w0, [x22, 3240]
-	b	.L1423
-.L1430:
+	b	.L1457
+.L1464:
 	add	x0, x19, :lo12:.LANCHOR0
 	strb	wzr, [x0, 2680]
 	ldrh	w0, [x0, 2424]
 	cmp	w0, w6
-	bne	.L1431
+	bne	.L1465
 	adrp	x0, .LC1
-	mov	w2, 658
+	mov	w2, 665
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1431:
+.L1465:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2472]
 	cmp	w1, w0
-	bne	.L1432
+	bne	.L1466
 	adrp	x0, .LC1
-	mov	w2, 659
+	mov	w2, 666
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1432:
+.L1466:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2520]
 	cmp	w1, w0
-	bne	.L1433
+	bne	.L1467
 	adrp	x0, .LC1
-	mov	w2, 660
+	mov	w2, 667
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1433:
+.L1467:
 	add	x23, x19, :lo12:.LANCHOR0
 	add	x22, x23, 2672
 	mov	x0, x22
@@ -10096,28 +10287,28 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w2, [x23, 2672]
 	ldr	x1, [x23, 2376]
-	strh	wzr, [x0, 126]
+	strh	wzr, [x0, 114]
 	ldrh	w1, [x1, x2, lsl 1]
-	strh	w1, [x0, 128]
+	strh	w1, [x0, 116]
 	strh	wzr, [x23, 2674]
 	strb	wzr, [x23, 2678]
-.L1422:
+.L1456:
 	bl	FtlReadRefresh
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 1
 	ldrh	w26, [x0, 106]
-	str	w1, [x0, 4000]
+	str	w1, [x0, 4008]
 	ldrh	w0, [x0, 2674]
 	add	w1, w0, w21
 	cmp	w1, w26
-	ble	.L1434
+	ble	.L1468
 	sub	w21, w26, w0
 	and	w21, w21, 65535
-.L1434:
+.L1468:
 	mov	w25, 0
-.L1435:
+.L1469:
 	cmp	w21, w25, uxth
-	bls	.L1443
+	bls	.L1477
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w23, 0
 	add	x3, x0, 2688
@@ -10126,11 +10317,11 @@ rk_ftl_garbage_collect:
 	ldrh	w4, [x0, 2674]
 	ldrh	w7, [x0, 36]
 	add	w4, w4, w25
-	b	.L1444
-.L1437:
+	b	.L1478
+.L1471:
 	ldrh	w2, [x3]
 	cmp	w2, w6
-	beq	.L1436
+	beq	.L1470
 	ldr	x5, [x0, 3280]
 	ubfiz	x8, x23, 5, 16
 	add	w23, w23, 1
@@ -10138,13 +10329,13 @@ rk_ftl_garbage_collect:
 	add	x5, x5, x8
 	and	w23, w23, 65535
 	str	w2, [x5, 4]
-.L1436:
+.L1470:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-.L1444:
+.L1478:
 	cmp	w1, w7
-	bne	.L1437
+	bne	.L1471
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w1, w23
 	mov	x27, 0
@@ -10153,32 +10344,32 @@ rk_ftl_garbage_collect:
 	bl	FlashReadPages
 	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 104]
-.L1438:
+.L1472:
 	ldr	x0, [x29, 104]
 	cmp	x27, x0
-	bne	.L1442
+	bne	.L1476
 	add	w25, w25, 1
-	b	.L1435
-.L1442:
+	b	.L1469
+.L1476:
 	ldr	x0, [x22, 3280]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	beq	.L1439
+	beq	.L1473
 	ldr	x23, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1439
+	bne	.L1473
 	ldr	w28, [x23, 8]
 	cmn	w28, #1
-	bne	.L1440
+	bne	.L1474
 	adrp	x0, .LC1
-	mov	w2, 696
+	mov	w2, 703
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1440:
+.L1474:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w28
@@ -10188,14 +10379,14 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x27
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1439
+	bne	.L1473
 	adrp	x28, .LANCHOR3
 	add	x2, x28, :lo12:.LANCHOR3
 	ldr	w0, [x0, 24]
-	ldrh	w1, [x2, 126]
+	ldrh	w1, [x2, 114]
 	add	w1, w1, 1
-	strh	w1, [x2, 126]
-	ldr	x2, [x22, 4024]
+	strh	w1, [x2, 114]
+	ldr	x2, [x22, 4032]
 	ldr	w1, [x22, 3248]
 	add	x1, x2, x1, lsl 5
 	str	x1, [x29, 96]
@@ -10204,7 +10395,7 @@ rk_ftl_garbage_collect:
 	ldr	x1, [x29, 96]
 	str	w0, [x1, 4]
 	ldr	w0, [x22, 3248]
-	ldr	x1, [x22, 4024]
+	ldr	x1, [x22, 4032]
 	add	x0, x1, x0, lsl 5
 	ldr	x1, [x22, 3280]
 	add	x1, x1, x27
@@ -10228,79 +10419,79 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x22, 2527]
 	ldr	w0, [x22, 3248]
 	cmp	w1, w0
-	beq	.L1441
+	beq	.L1475
 	ldrh	w0, [x22, 2524]
-	cbnz	w0, .L1439
-.L1441:
+	cbnz	w0, .L1473
+.L1475:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1439
+	cbz	w0, .L1473
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x28, x28, :lo12:.LANCHOR3
-	str	wzr, [x19, 4000]
-	ldrh	w0, [x28, 124]
-	b	.L1380
-.L1439:
+	str	wzr, [x19, 4008]
+	ldrh	w0, [x28, 112]
+	b	.L1414
+.L1473:
 	add	x27, x27, 32
-	b	.L1438
-.L1443:
-	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2674]
+	b	.L1472
+.L1477:
+	add	x22, x19, :lo12:.LANCHOR0
+	ldrh	w0, [x22, 2674]
 	add	w21, w21, w0
 	and	w21, w21, 65535
-	strh	w21, [x1, 2674]
+	strh	w21, [x22, 2674]
 	cmp	w26, w21
-	adrp	x21, .LANCHOR3
-	bls	.L1445
-	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w1, [x0, 126]
-	ldrh	w0, [x0, 128]
-	cmp	w1, w0
-	bne	.L1446
-.L1445:
-	add	x22, x19, :lo12:.LANCHOR0
+	bhi	.L1479
 	ldr	w0, [x22, 3248]
-	cbz	w0, .L1447
+	adrp	x21, .LANCHOR3
+	cbz	w0, .L1480
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1447
-	str	wzr, [x22, 4000]
-	b	.L1485
-.L1447:
-	add	x0, x21, :lo12:.LANCHOR3
-	ldrh	w0, [x0, 126]
-	cbnz	w0, .L1448
-	add	x1, x19, :lo12:.LANCHOR0
-	ldrh	w0, [x1, 2672]
-	ldr	x2, [x1, 2376]
-	lsl	x0, x0, 1
-	ldrh	w3, [x2, x0]
-	cbz	w3, .L1448
-	strh	wzr, [x2, x0]
-	ldrh	w0, [x1, 2672]
+	cbz	w0, .L1480
+	str	wzr, [x22, 4008]
+	b	.L1518
+.L1480:
+	add	x21, x21, :lo12:.LANCHOR3
+	ldrh	w0, [x21, 114]
+	cbnz	w0, .L1481
+	add	x22, x19, :lo12:.LANCHOR0
+	ldrh	w1, [x22, 2672]
+	ldr	x3, [x22, 2376]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w4, [x3, x2]
+	cbz	w4, .L1481
+	ldrh	w5, [x21, 116]
+	mov	w3, 0
+	ldrh	w2, [x22, 2674]
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
+	bl	sftl_printk
+	ldrh	w1, [x22, 2672]
+	ldr	x0, [x22, 2376]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x22, 2672]
 	bl	update_vpc_list
-	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1448:
+.L1481:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L1446:
+.L1479:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 2
-	bhi	.L1449
+	bhi	.L1482
 	ldrh	w21, [x1, 106]
-	b	.L1421
-.L1449:
-	add	x21, x21, :lo12:.LANCHOR3
-	str	wzr, [x1, 4000]
-	ldrh	w1, [x21, 124]
+	b	.L1455
+.L1482:
+	str	wzr, [x1, 4008]
+	adrp	x1, .LANCHOR3+112
+	ldrh	w1, [x1, #:lo12:.LANCHOR3+112]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1380
-.L1452:
+	b	.L1414
+.L1485:
 	mov	w0, 0
-	b	.L1380
+	b	.L1414
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
 	.global	sftl_gc
@@ -10318,199 +10509,224 @@ sftl_gc:
 	.global	FtlRead
 	.type	FtlRead, %function
 FtlRead:
-	stp	x29, x30, [sp, -160]!
+	sub	sp, sp, #192
 	and	w0, w0, 255
 	cmp	w0, 16
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
 	mov	w19, w1
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 64]
 	mov	x23, x3
-	stp	x27, x28, [sp, 80]
+	stp	x27, x28, [sp, 96]
 	mov	w27, w2
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	bne	.L1491
+	stp	x21, x22, [sp, 48]
+	stp	x25, x26, [sp, 80]
+	bne	.L1524
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1490:
+.L1523:
 	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 192
 	ret
-.L1491:
+.L1524:
 	add	w0, w1, w2
-	str	w0, [x29, 128]
+	str	w0, [x29, 144]
 	adrp	x0, .LANCHOR0
-	add	x25, x0, :lo12:.LANCHOR0
+	add	x8, x0, :lo12:.LANCHOR0
 	add	w2, w1, w2
-	str	x0, [x29, 96]
-	ldr	w1, [x25, 144]
+	str	x0, [x29, 112]
+	ldr	w1, [x8, 144]
 	cmp	w2, w1
-	bhi	.L1511
+	bhi	.L1545
 	adrp	x0, .LANCHOR2
 	ldr	w21, [x0, #:lo12:.LANCHOR2]
 	cmn	w21, #1
-	beq	.L1490
-	bl	FtlCacheWriteBack
+	beq	.L1523
+	ldrh	w0, [x8, 62]
+	sub	w24, w2, #1
+	mov	x25, x8
 	mov	w28, 0
-	ldrh	w0, [x25, 62]
-	add	w1, w19, w27
-	sub	w24, w1, #1
 	mov	w21, 0
-	stp	wzr, wzr, [x29, 132]
-	str	wzr, [x29, 140]
+	stp	wzr, wzr, [x29, 148]
+	str	wzr, [x29, 156]
 	udiv	w26, w19, w0
 	udiv	w24, w24, w0
-	ldr	w0, [x25, 2588]
+	ldr	w0, [x8, 2588]
 	mov	w20, w26
 	sub	w22, w24, w26
 	add	w22, w22, 1
 	add	w0, w0, w22
-	str	w0, [x25, 2588]
-.L1493:
-	cbnz	w22, .L1509
-	ldr	x0, [x29, 96]
+	str	w0, [x8, 2588]
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	str	x0, [x29, 104]
+.L1526:
+	cbnz	w22, .L1543
+	ldr	x0, [x29, 112]
 	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w1, [x0, 3324]
-	cbnz	w1, .L1510
+	ldrh	w1, [x0, 3328]
+	cbnz	w1, .L1544
 	ldrh	w0, [x0, 2416]
 	cmp	w0, 31
-	bhi	.L1490
-.L1510:
+	bhi	.L1523
+.L1544:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1490
-.L1509:
-	add	x1, x29, 156
+	b	.L1523
+.L1543:
+	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-	ldr	w1, [x29, 156]
+	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1494
-	mov	w5, 0
-.L1495:
+	bne	.L1527
+	mov	w4, 0
+.L1528:
 	ldrh	w0, [x25, 62]
-	cmp	w5, w0
-	bcc	.L1497
-.L1498:
+	cmp	w4, w0
+	bcc	.L1530
+.L1531:
 	add	w20, w20, 1
 	subs	w22, w22, #1
-	beq	.L1502
+	beq	.L1535
 	ldrh	w0, [x25, 36]
 	cmp	w28, w0, lsl 2
-	bne	.L1493
-.L1502:
-	cbz	w28, .L1493
-	ldr	x0, [x25, 4016]
+	bne	.L1526
+.L1535:
+	cbz	w28, .L1526
+	ldr	x0, [x25, 4024]
 	mov	w1, w28
 	mov	w2, 0
 	bl	FlashReadPages
-	ldr	w0, [x29, 132]
+	ldr	w0, [x29, 148]
 	lsl	w0, w0, 9
-	str	w0, [x29, 112]
-	ldr	w0, [x29, 140]
+	str	w0, [x29, 128]
+	ldr	w0, [x29, 156]
 	lsl	w0, w0, 9
-	str	x0, [x29, 120]
-	ldr	w0, [x29, 136]
+	str	x0, [x29, 136]
+	ldr	w0, [x29, 152]
 	lsl	w0, w0, 9
-	str	w0, [x29, 116]
+	str	w0, [x29, 132]
 	ubfiz	x0, x28, 5, 32
 	mov	x28, 0
-	str	x0, [x29, 104]
-.L1508:
-	ldr	x0, [x25, 4016]
+	str	x0, [x29, 120]
+.L1542:
+	ldr	x0, [x25, 4024]
 	add	x0, x0, x28
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1504
+	bne	.L1537
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3992]
+	ldr	x0, [x25, 4000]
 	cmp	x1, x0
-	bne	.L1505
-	ldr	x0, [x29, 120]
-	ldr	w2, [x29, 116]
+	bne	.L1538
+	ldr	x0, [x29, 136]
+	ldr	w2, [x29, 132]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1521:
+.L1555:
 	bl	ftl_memcpy
-.L1505:
-	ldr	x0, [x25, 4016]
+.L1538:
+	ldr	x0, [x25, 4024]
+	add	x0, x0, x28
+	ldr	x1, [x0, 16]
+	ldr	w2, [x0, 24]
+	ldr	w1, [x1, 8]
+	cmp	w2, w1
+	beq	.L1539
+	ldr	w1, [x25, 2792]
+	add	w1, w1, 1
+	str	w1, [x25, 2792]
+	ldp	x2, x1, [x0, 8]
+	ldr	w3, [x2, 4]
+	str	w3, [sp]
+	ldp	w3, w4, [x1]
+	ldp	w5, w6, [x1, 8]
+	ldr	w7, [x2]
+	ldr	w1, [x0, 24]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 104]
+	bl	sftl_printk
+.L1539:
+	ldr	x0, [x25, 4024]
 	add	x1, x0, x28
 	ldr	w2, [x0, x28]
 	cmn	w2, #1
-	bne	.L1506
+	bne	.L1540
 	ldr	w0, [x25, 2792]
 	mov	w21, w2
 	add	w0, w0, 1
 	str	w0, [x25, 2792]
-.L1506:
+.L1540:
 	ldr	w0, [x1]
 	cmp	w0, 256
-	bne	.L1507
+	bne	.L1541
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1507:
-	ldr	x0, [x29, 104]
+.L1541:
+	ldr	x0, [x29, 120]
 	add	x28, x28, 32
 	cmp	x0, x28
-	bne	.L1508
+	bne	.L1542
 	mov	w28, 0
-	b	.L1493
-.L1497:
-	madd	w0, w20, w0, w5
+	b	.L1526
+.L1530:
+	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1496
-	ldr	w1, [x29, 128]
+	bhi	.L1529
+	ldr	w1, [x29, 144]
 	cmp	w1, w0
-	bls	.L1496
+	bls	.L1529
 	sub	w0, w0, w19
-	str	w5, [x29, 120]
+	str	w4, [x29, 136]
 	lsl	w0, w0, 9
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-	ldr	w5, [x29, 120]
-.L1496:
-	add	w5, w5, 1
-	b	.L1495
-.L1494:
-	ldr	x0, [x25, 4016]
+	ldr	w4, [x29, 136]
+.L1529:
+	add	w4, w4, 1
+	b	.L1528
+.L1527:
+	ldr	x0, [x25, 4024]
 	ubfiz	x2, x28, 5, 32
 	cmp	w20, w26
 	add	x0, x0, x2
 	str	w1, [x0, 4]
 	ldrh	w0, [x25, 62]
-	bne	.L1499
-	ldr	x1, [x25, 4016]
-	ldr	x5, [x25, 3992]
+	bne	.L1532
+	ldr	x1, [x25, 4024]
+	ldr	x4, [x25, 4000]
 	add	x1, x1, x2
-	str	x5, [x1, 8]
-	udiv	w5, w19, w0
-	msub	w3, w5, w0, w19
-	str	w3, [x29, 140]
-	sub	w5, w0, w3
-	cmp	w27, w5
-	csel	w3, w27, w5, ls
-	str	w3, [x29, 136]
+	str	x4, [x1, 8]
+	udiv	w4, w19, w0
+	msub	w3, w4, w0, w19
+	str	w3, [x29, 156]
+	sub	w4, w0, w3
+	cmp	w27, w4
+	csel	w3, w27, w4, ls
+	str	w3, [x29, 152]
 	cmp	w3, w0
-	bne	.L1500
+	bne	.L1533
 	str	x23, [x1, 8]
-.L1500:
-	ldr	x0, [x25, 4016]
-	ldr	x1, [x25, 3984]
+.L1533:
+	ldr	x0, [x25, 4024]
+	ldr	x1, [x25, 3992]
 	add	x2, x0, x2
 	ldrh	w0, [x25, 116]
 	str	w20, [x2, 24]
@@ -10519,51 +10735,51 @@ FtlRead:
 	and	x0, x0, 4294967292
 	add	x0, x1, x0
 	str	x0, [x2, 16]
-	b	.L1498
-.L1499:
+	b	.L1531
+.L1532:
 	cmp	w20, w24
-	bne	.L1501
-	ldr	x5, [x25, 4016]
-	ldr	x1, [x25, 3976]
-	add	x5, x5, x2
-	ldr	w3, [x29, 128]
-	str	x1, [x5, 8]
+	bne	.L1534
+	ldr	x4, [x25, 4024]
+	ldr	x1, [x25, 3984]
+	add	x4, x4, x2
+	ldr	w3, [x29, 144]
+	str	x1, [x4, 8]
 	mul	w1, w20, w0
 	sub	w3, w3, w1
-	str	w3, [x29, 132]
+	str	w3, [x29, 148]
 	cmp	w0, w3
-	bne	.L1500
+	bne	.L1533
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
-	str	x1, [x5, 8]
-	b	.L1500
-.L1501:
-	ldr	x1, [x25, 4016]
+	str	x1, [x4, 8]
+	b	.L1533
+.L1534:
+	ldr	x1, [x25, 4024]
 	mul	w0, w0, w20
 	add	x1, x1, x2
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
 	str	x0, [x1, 8]
-	b	.L1500
-.L1504:
+	b	.L1533
+.L1537:
 	cmp	w24, w1
-	bne	.L1505
+	bne	.L1538
 	ldr	x1, [x0, 8]
-	ldr	x0, [x25, 3976]
+	ldr	x0, [x25, 3984]
 	cmp	x1, x0
-	bne	.L1505
+	bne	.L1538
 	ldrh	w0, [x25, 62]
-	ldr	w2, [x29, 112]
+	ldr	w2, [x29, 128]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1521
-.L1511:
+	b	.L1555
+.L1545:
 	mov	w21, -1
-	b	.L1490
+	b	.L1523
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
@@ -10588,19 +10804,19 @@ FtlWrite:
 	cmp	w0, 16
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
+	mov	w24, w1
 	stp	x27, x28, [sp, 80]
 	mov	x27, x3
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1525
+	stp	x25, x26, [sp, 64]
+	str	w2, [x29, 156]
+	bne	.L1559
+	add	w0, w1, 256
+	ldr	w1, [x29, 156]
 	mov	x2, x3
-	mov	w1, w26
-	add	w0, w23, 256
 	bl	FtlVendorPartWrite
-.L1524:
+.L1558:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10608,457 +10824,668 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1525:
-	add	w3, w1, w2
-	adrp	x20, .LANCHOR0
-	add	x2, x20, :lo12:.LANCHOR0
-	ldr	w0, [x2, 144]
-	cmp	w3, w0
-	bhi	.L1567
-	adrp	x1, .LANCHOR2
-	str	x1, [x29, 136]
-	ldr	w0, [x1, #:lo12:.LANCHOR2]
-	cmn	w0, #1
-	beq	.L1524
-	ldrh	w1, [x2, 62]
-	adrp	x4, .LANCHOR3
-	sub	w3, w3, #1
-	add	x5, x4, :lo12:.LANCHOR3
-	mov	w0, 2048
-	str	x4, [x29, 104]
-	udiv	w22, w23, w1
-	str	w0, [x5, 132]
-	udiv	w0, w3, w1
-	ldr	x3, [x5, -56]
-	sub	w24, w0, w22
+.L1559:
+	ldr	w0, [x29, 156]
+	adrp	x19, .LANCHOR0
+	add	x1, x19, :lo12:.LANCHOR0
+	add	w0, w24, w0
 	str	w0, [x29, 148]
-	ldr	w0, [x2, 2596]
-	add	w25, w24, 1
+	ldr	w0, [x1, 144]
+	ldr	w2, [x29, 148]
+	cmp	w2, w0
+	bhi	.L1594
+	adrp	x2, .LANCHOR2
+	str	x2, [x29, 136]
+	add	x3, x2, :lo12:.LANCHOR2
+	ldr	w0, [x2, #:lo12:.LANCHOR2]
+	cmn	w0, #1
+	beq	.L1558
+	adrp	x0, .LANCHOR3+120
+	mov	w2, 2048
+	add	x20, x1, 2424
+	str	w2, [x0, #:lo12:.LANCHOR3+120]
+	ldr	w2, [x29, 148]
+	ldrh	w0, [x1, 62]
+	sub	w2, w2, #1
+	udiv	w26, w24, w0
+	udiv	w0, w2, w0
+	str	w0, [x29, 144]
+	sub	w0, w0, w26
+	add	w25, w0, 1
+	str	w0, [x29, 132]
+	ldr	w0, [x1, 2596]
 	add	w0, w0, w25
-	str	w0, [x2, 2596]
-	cbz	x3, .L1527
-	ldr	w0, [x3, 24]
-	cmp	w22, w0
-	beq	.L1528
-	bl	FtlCacheWriteBack
-.L1527:
-	ldr	x0, [x29, 136]
-	add	x19, x20, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR2
-	ldr	w0, [x0, 8]
-	cbz	w0, .L1569
-	ldrh	w1, [x19, 2428]
-	add	x0, x19, 2424
-	add	x19, x19, 2472
-	cmp	w1, 0
-	csel	x19, x19, x0, eq
-.L1530:
-	adrp	x0, .LANCHOR1
-	mov	w21, w22
-	add	x0, x0, :lo12:.LANCHOR1
-	add	x0, x0, 672
-	str	x0, [x29, 160]
-.L1531:
-	cbz	w25, .L1565
-	add	x0, x20, :lo12:.LANCHOR0
-	ldrb	w1, [x19, 6]
+	str	w0, [x1, 2596]
+	ldr	w0, [x3, 8]
+	cbz	w0, .L1561
+	ldrh	w0, [x20, 4]
+	add	x1, x1, 2472
+	cmp	w0, 0
+	csel	x20, x1, x20, eq
+.L1561:
+	adrp	x22, .LANCHOR1
+	add	x22, x22, :lo12:.LANCHOR1
+	mov	w21, w26
+	add	x22, x22, 672
+.L1562:
+	cbnz	w25, .L1590
+	ldr	w1, [x29, 132]
+	add	x19, x19, :lo12:.LANCHOR0
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	ldrh	w0, [x19, 2416]
+	cmp	w0, 15
+	bls	.L1591
+.L1593:
+	mov	w0, 0
+	b	.L1558
+.L1590:
+	add	x0, x19, :lo12:.LANCHOR0
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1532
-	ldr	x1, [x29, 160]
+	bcc	.L1563
 	adrp	x0, .LC1
-	mov	w2, 1012
+	mov	w2, 991
+	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1532:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1533
-	bl	FtlCacheWriteBack
-	add	x0, x20, :lo12:.LANCHOR0
+.L1563:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1564
+	add	x0, x19, :lo12:.LANCHOR0
 	add	x1, x0, 2424
-	cmp	x19, x1
-	bne	.L1534
+	cmp	x20, x1
+	bne	.L1565
 	add	x0, x0, 2472
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1535
+	cbnz	w1, .L1566
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-.L1535:
-	add	x19, x20, :lo12:.LANCHOR0
-	add	x24, x19, 2424
-	add	x19, x19, 2472
-	mov	x0, x24
+.L1566:
+	add	x20, x19, :lo12:.LANCHOR0
+	add	x23, x20, 2424
+	add	x20, x20, 2472
+	mov	x0, x23
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	ldr	w0, [x0, 8]
 	cmp	w0, 0
-	csel	x19, x19, x24, ne
-.L1536:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1533
-	mov	x0, x19
+	csel	x20, x20, x23, ne
+.L1567:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1564
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1533:
-	ldrh	w0, [x19, 4]
-	ldrb	w1, [x19, 7]
+.L1564:
+	ldrh	w0, [x20, 4]
+	ldrb	w1, [x20, 7]
 	cmp	w0, w25
 	csel	w0, w0, w25, ls
 	lsl	w1, w1, 2
-	cmp	w0, w1
-	csel	w0, w0, w1, ls
-	str	w0, [x29, 132]
-	add	x0, x20, :lo12:.LANCHOR0
-	ldrb	w1, [x19, 6]
+	cmp	w1, w0
+	csel	w0, w1, w0, ls
+	str	w0, [x29, 128]
+	add	x0, x19, :lo12:.LANCHOR0
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1537
-	ldr	x1, [x29, 160]
+	bcc	.L1568
 	adrp	x0, .LC1
-	mov	w2, 1045
+	mov	w2, 1024
+	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1537:
+.L1568:
 	str	xzr, [x29, 168]
-.L1538:
-	ldr	w1, [x29, 132]
-	ldr	w28, [x29, 168]
-	cmp	w28, w1
-	bcc	.L1559
-	mov	x28, x1
-.L1539:
-	ldr	x0, [x29, 104]
-	add	x0, x0, :lo12:.LANCHOR3
-	ldr	x0, [x0, -56]
-	cbz	x0, .L1560
-	sub	w25, w25, #1
-	subs	w28, w28, #1
-	bne	.L1560
-.L1565:
-	ldr	w0, [x29, 148]
-	add	x20, x20, :lo12:.LANCHOR0
-	sub	w1, w0, w22
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	ldrh	w0, [x20, 2416]
-	cmp	w0, 15
-	bhi	.L1562
-	mov	w21, 65535
-	mov	w19, 128
-.L1585:
-	ldrh	w0, [x20, 2672]
-	cmp	w0, w21
-	bne	.L1566
-	ldrh	w0, [x20, 3320]
-	cmp	w0, w21
-	bne	.L1566
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	bl	FtlGcRefreshBlock
-.L1566:
-	mov	w1, 1
-	strh	w19, [x20, 3234]
-	mov	w0, w1
-	strh	w19, [x20, 3232]
-	bl	rk_ftl_garbage_collect
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	ldrh	w0, [x20, 2416]
-	cmp	w0, 8
-	bls	.L1585
-	b	.L1562
-.L1528:
-	ldr	w0, [x2, 2600]
-	ldr	x3, [x3, 8]
-	add	w0, w0, 1
-	str	w0, [x2, 2600]
-	msub	w0, w22, w1, w23
-	sub	w1, w1, w0
-	cmp	w26, w1
-	lsl	w0, w0, 9
-	csel	w19, w26, w1, ls
-	add	x0, x3, x0
-	lsl	w21, w19, 9
-	mov	x1, x27
-	mov	w2, w21
-	bl	ftl_memcpy
-	cbnz	w24, .L1529
-.L1562:
-	mov	w0, 0
-	b	.L1524
-.L1529:
-	sub	w26, w26, w19
-	add	w23, w23, w19
-	add	x27, x27, x21
-	add	w22, w22, 1
-	bl	FtlCacheWriteBack
-	mov	w25, w24
-	b	.L1527
 .L1569:
-	add	x19, x19, 2424
-	b	.L1530
-.L1534:
+	ldr	w1, [x29, 128]
+	ldr	w23, [x29, 168]
+	cmp	w23, w1
+	bcc	.L1588
+	mov	x23, x1
+.L1570:
+	add	x0, x19, :lo12:.LANCHOR0
+	mov	x3, x20
+	mov	w2, 0
+	mov	w1, w23
+	ldr	x0, [x0, 4040]
+	bl	FtlProgPages
+	cmp	w25, w23
+	bcs	.L1589
+	adrp	x0, .LC1
+	mov	w2, 1101
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC1
+	bl	sftl_printk
+.L1589:
+	sub	w25, w25, w23
+	b	.L1562
+.L1565:
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1572
-	mov	x0, x19
+	cbnz	w0, .L1599
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-	b	.L1536
-.L1572:
-	mov	x19, x1
-	b	.L1533
-.L1559:
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1539
+	b	.L1567
+.L1599:
+	mov	x20, x1
+	b	.L1564
+.L1588:
+	ldrh	w0, [x20, 4]
+	cbz	w0, .L1570
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w21
 	bl	log2phys
-	mov	x0, x19
+	mov	x0, x20
 	bl	get_new_active_ppa
-	add	x3, x20, :lo12:.LANCHOR0
+	add	x4, x19, :lo12:.LANCHOR0
 	ldr	x1, [x29, 168]
-	str	x3, [x29, 152]
-	lsl	x24, x1, 5
-	ldr	x1, [x3, 4032]
-	ldrh	w2, [x3, 116]
-	add	x1, x1, x24
+	str	x4, [x29, 160]
+	lsl	x28, x1, 5
+	ldr	x1, [x4, 4040]
+	ldrh	w2, [x4, 116]
+	add	x1, x1, x28
 	str	w0, [x1, 4]
-	mul	w28, w28, w2
-	ldr	x0, [x3, 4032]
-	and	x1, x28, 4294967292
+	mul	w23, w23, w2
+	ldr	x0, [x4, 4040]
+	and	x1, x23, 4294967292
 	str	x1, [x29, 120]
-	add	x0, x0, x24
-	ldr	x1, [x3, 3984]
+	add	x0, x0, x28
+	ldr	x1, [x4, 3992]
 	ldr	x3, [x29, 120]
 	str	x1, [x29, 112]
-	add	x28, x1, x3
+	add	x23, x1, x3
 	str	w21, [x0, 24]
-	str	x28, [x0, 16]
+	str	x23, [x0, 16]
 	mov	w1, 0
-	mov	x0, x28
+	mov	x0, x23
 	bl	ftl_memset
-	ldr	w0, [x29, 148]
-	cmp	w21, w22
-	ldr	x3, [x29, 152]
+	ldr	w0, [x29, 144]
+	cmp	w21, w26
+	ldr	x4, [x29, 160]
 	ccmp	w21, w0, 4, ne
-	bne	.L1540
-	cmp	w21, w22
-	bne	.L1541
-	ldrh	w2, [x3, 62]
-	udiv	w0, w23, w2
-	msub	w0, w0, w2, w23
-	str	w0, [x29, 144]
-	sub	w2, w2, w0
-	cmp	w2, w26
-	csel	w0, w2, w26, ls
+	bne	.L1571
+	cmp	w21, w26
+	bne	.L1572
+	ldrh	w2, [x4, 62]
+	udiv	w0, w24, w2
+	msub	w0, w0, w2, w24
 	str	w0, [x29, 152]
-.L1542:
-	add	x0, x20, :lo12:.LANCHOR0
-	ldr	w2, [x29, 152]
+	sub	w2, w2, w0
+	ldr	w0, [x29, 156]
+	cmp	w2, w0
+	csel	w0, w2, w0, ls
+	str	w0, [x29, 160]
+.L1573:
+	add	x0, x19, :lo12:.LANCHOR0
+	ldr	w2, [x29, 160]
 	ldrh	w1, [x0, 62]
 	cmp	w2, w1
-	bne	.L1543
-	ldr	x0, [x0, 4032]
-	cmp	w21, w22
-	add	x24, x0, x24
-	bne	.L1544
-	str	x27, [x24, 8]
-.L1545:
-	add	x0, x20, :lo12:.LANCHOR0
-	ldrb	w1, [x19, 6]
+	bne	.L1574
+	ldr	x0, [x0, 4040]
+	cmp	w21, w26
+	add	x3, x0, x28
+	bne	.L1575
+	str	x27, [x3, 8]
+.L1576:
+	add	x0, x19, :lo12:.LANCHOR0
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1556
-	ldr	x1, [x29, 160]
+	bcc	.L1585
 	adrp	x0, .LC1
-	mov	w2, 1119
+	mov	w2, 1092
+	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1556:
+.L1585:
 	ldp	x1, x2, [x29, 112]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	add	x1, x20, :lo12:.LANCHOR0
+	add	x1, x19, :lo12:.LANCHOR0
 	ldr	w0, [x1, 2624]
-	stp	w0, w21, [x28, 4]
+	stp	w0, w21, [x23, 4]
 	add	w21, w21, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x1, 2624]
 	ldr	w0, [x29, 188]
-	str	w0, [x28, 12]
-	ldrh	w0, [x19]
-	strh	w0, [x28, 2]
+	str	w0, [x23, 12]
+	ldrh	w0, [x20]
+	strh	w0, [x23, 2]
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1538
-.L1541:
-	ldrh	w0, [x3, 62]
-	add	w2, w23, w26
-	str	wzr, [x29, 144]
-	msub	w2, w21, w0, w2
+	b	.L1569
+.L1572:
+	ldr	w0, [x29, 148]
+	ldrh	w2, [x4, 62]
+	str	wzr, [x29, 152]
+	msub	w2, w21, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 152]
-	b	.L1542
-.L1544:
-	ldr	w0, [x29, 152]
-.L1588:
+	str	w0, [x29, 160]
+	b	.L1573
+.L1575:
+	ldr	w0, [x29, 160]
+.L1606:
 	mul	w0, w0, w21
-	sub	w0, w0, w23
+	sub	w0, w0, w24
 	lsl	w0, w0, 9
 	add	x0, x27, x0
-	str	x0, [x24, 8]
-	b	.L1545
-.L1543:
-	ldr	x1, [x0, 4032]
-	cmp	w21, w22
-	add	x1, x1, x24
-	bne	.L1546
-	ldr	x0, [x0, 3992]
-.L1587:
+	str	x0, [x3, 8]
+	b	.L1576
+.L1574:
+	ldr	x1, [x0, 4040]
+	cmp	w21, w26
+	add	x1, x1, x28
+	bne	.L1577
+	ldr	x0, [x0, 4000]
+.L1605:
 	str	x0, [x1, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1548
-	add	x3, x20, :lo12:.LANCHOR0
+	beq	.L1579
+	add	x4, x19, :lo12:.LANCHOR0
 	str	w0, [x29, 196]
 	str	w21, [x29, 216]
 	mov	w2, 0
-	str	x3, [x29, 96]
-	ldr	x0, [x3, 4032]
-	add	x0, x0, x24
+	str	x4, [x29, 104]
+	ldr	x0, [x4, 4040]
+	add	x0, x0, x28
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 200]
 	mov	w1, 1
 	add	x0, x29, 192
 	bl	FlashReadPages
 	ldr	w0, [x29, 192]
-	ldr	x3, [x29, 96]
+	ldr	x4, [x29, 104]
 	cmn	w0, #1
-	bne	.L1549
-	ldr	w0, [x3, 2792]
+	bne	.L1580
+	ldr	w0, [x4, 2792]
 	add	w0, w0, 1
-	str	w0, [x3, 2792]
-.L1552:
-	ldr	w0, [x29, 152]
-	cmp	w21, w22
+	str	w0, [x4, 2792]
+.L1583:
+	ldr	w0, [x29, 160]
+	cmp	w21, w26
 	lsl	w2, w0, 9
-	add	x0, x20, :lo12:.LANCHOR0
-	bne	.L1553
-	ldr	x1, [x0, 4032]
-	ldr	w0, [x29, 144]
-	add	x1, x1, x24
-	lsl	w0, w0, 9
-	ldr	x3, [x1, 8]
+	add	x0, x19, :lo12:.LANCHOR0
+	bne	.L1584
+	ldr	x0, [x0, 4040]
 	mov	x1, x27
+	add	x3, x0, x28
+	ldr	w0, [x29, 152]
+	ldr	x3, [x3, 8]
+	lsl	w0, w0, 9
 	add	x0, x3, x0
+.L1607:
 	bl	ftl_memcpy
-	ldr	w0, [x29, 148]
-	cmp	w21, w0
-	bne	.L1545
-.L1554:
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1545
-	ldr	x0, [x29, 104]
-	add	x1, x0, :lo12:.LANCHOR3
-	add	x0, x20, :lo12:.LANCHOR0
-	ldr	x0, [x0, 4032]
-	str	x19, [x1, 112]
-	add	x24, x0, x24
-	str	x24, [x1, -56]
-	b	.L1545
-.L1546:
-	ldr	x0, [x0, 3976]
-	b	.L1587
-.L1549:
-	ldr	w0, [x28, 8]
+	b	.L1576
+.L1577:
+	ldr	x0, [x0, 3984]
+	b	.L1605
+.L1580:
+	ldr	w0, [x23, 8]
 	cmp	w21, w0
-	beq	.L1551
-	ldr	w0, [x3, 2792]
+	beq	.L1582
+	ldr	w0, [x4, 2792]
 	mov	w2, w21
 	add	w0, w0, 1
-	str	w0, [x3, 2792]
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
-	ldr	w1, [x28, 8]
+	str	w0, [x4, 2792]
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	ldr	w1, [x23, 8]
 	bl	sftl_printk
-.L1551:
-	ldr	w0, [x28, 8]
+.L1582:
+	ldr	w0, [x23, 8]
 	cmp	w21, w0
-	beq	.L1552
-	ldr	x1, [x29, 160]
-	mov	w2, 1098
+	beq	.L1583
+	mov	w2, 1077
+	mov	x1, x22
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L1552
-.L1548:
-	add	x1, x20, :lo12:.LANCHOR0
-	ldr	x0, [x1, 4032]
+	b	.L1583
+.L1579:
+	add	x1, x19, :lo12:.LANCHOR0
+	ldr	x0, [x1, 4040]
 	ldrh	w2, [x1, 114]
 	mov	w1, 0
-	add	x0, x0, x24
+	add	x0, x0, x28
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1552
-.L1553:
+	b	.L1583
+.L1584:
 	ldrh	w1, [x0, 62]
-	ldr	x0, [x0, 4032]
-	add	x0, x0, x24
+	ldr	x0, [x0, 4040]
+	add	x3, x0, x28
 	mul	w1, w1, w21
-	ldr	x0, [x0, 8]
-	sub	w1, w1, w23
+	sub	w1, w1, w24
+	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x27, x1
-	bl	ftl_memcpy
-	b	.L1554
-.L1540:
-	ldr	x0, [x3, 4032]
-	add	x24, x0, x24
-	ldrh	w0, [x3, 62]
-	b	.L1588
-.L1560:
-	add	x0, x20, :lo12:.LANCHOR0
-	mov	x3, x19
-	mov	w2, 0
-	mov	w1, w28
-	ldr	x0, [x0, 4032]
-	bl	FtlProgPages
-	cmp	w25, w28
-	bcs	.L1563
-	ldr	x1, [x29, 160]
-	adrp	x0, .LC1
-	mov	w2, 1134
-	add	x0, x0, :lo12:.LC1
-	bl	sftl_printk
-.L1563:
-	sub	w25, w25, w28
-	b	.L1531
-.L1567:
+	b	.L1607
+.L1571:
+	ldr	x0, [x4, 4040]
+	add	x3, x0, x28
+	ldrh	w0, [x4, 62]
+	b	.L1606
+.L1591:
+	mov	w21, 65535
+	mov	w20, 128
+.L1603:
+	ldrh	w0, [x19, 2672]
+	cmp	w0, w21
+	bne	.L1592
+	ldrh	w0, [x19, 3320]
+	cmp	w0, w21
+	bne	.L1592
+	mov	w0, 0
+	bl	List_get_gc_head_node
+	bl	FtlGcRefreshBlock
+.L1592:
+	mov	w1, 1
+	strh	w20, [x19, 3234]
+	mov	w0, w1
+	strh	w20, [x19, 3232]
+	bl	rk_ftl_garbage_collect
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	ldrh	w0, [x19, 2416]
+	cmp	w0, 8
+	bls	.L1603
+	b	.L1593
+.L1594:
 	mov	w0, -1
-	b	.L1524
+	b	.L1558
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	stp	x29, x30, [sp, -16]!
-	mov	x3, x2
-	mov	w2, w1
-	mov	w1, w0
+	stp	x29, x30, [sp, -224]!
+	add	w4, w0, w1
+	sub	w5, w4, #1
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	cmp	w5, 63
+	stp	x23, x24, [sp, 48]
+	mov	w22, w0
+	stp	x25, x26, [sp, 64]
+	mov	w24, w1
+	stp	x19, x20, [sp, 16]
+	mov	x25, x2
+	stp	x27, x28, [sp, 80]
+	bls	.L1609
+	cmp	w0, 576
+	bls	.L1610
+.L1609:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldr	w0, [x0, 124]
+	cbz	w0, .L1611
+	adrp	x20, .LANCHOR0
+	add	x0, x20, :lo12:.LANCHOR0
+	mov	w23, 512
+	adrp	x1, idb_buf
+	mov	x5, -49148
+	add	x3, x1, :lo12:idb_buf
+	ldrh	w26, [x0, 14]
+	mov	x2, 0
+	ldrh	w0, [x0, 10]
+	mov	x8, 262140
+	and	w21, w26, 255
+	mov	w6, 4097
+	movk	x5, 0xfffc, lsl 16
+	mul	w21, w21, w0
+	mov	w0, 0
+	and	w21, w21, 65535
+	udiv	w23, w23, w21
+.L1615:
+	add	x4, x2, x8
+	ldr	w7, [x4, x3]
+	cbz	w7, .L1612
+.L1616:
+	mul	w0, w21, w23
+	add	x20, x20, :lo12:.LANCHOR0
+	stp	w0, wzr, [x29, 152]
+	mov	w19, 0
+	add	x0, x1, :lo12:idb_buf
+	mov	w27, 0
+	str	x0, [x29, 136]
+.L1613:
+	adrp	x5, gp_flash_check_buf
+	mov	x2, 512
+	add	x0, x5, :lo12:gp_flash_check_buf
+	str	x5, [x29, 104]
+	mov	w1, 0
+	bl	memset
+	ldrh	w3, [x20, 14]
+	add	x4, x20, 3376
+	ldrh	w2, [x20, 10]
+	mov	w0, 0
+	and	w28, w3, 255
+	ldr	x6, [x20, 3384]
+	str	x4, [x29, 112]
+	udiv	w1, w19, w3
+	stp	w3, w28, [x29, 124]
+	mul	w2, w28, w2
+	and	w2, w2, 65535
+	str	w2, [x29, 144]
+	blr	x6
+	ldp	x5, x4, [x29, 104]
+	ldr	w2, [x29, 144]
+	str	x5, [x29, 144]
+	ldr	w3, [x29, 124]
+	cmp	w2, 511
+	bhi	.L1617
+	add	w1, w2, w19
+	ldr	x4, [x4, 8]
+	str	w2, [x29, 124]
+	mov	w0, 0
+	udiv	w1, w1, w3
+	blr	x4
+	ldr	w2, [x29, 124]
+.L1617:
+	udiv	w5, w19, w2
+	mov	w4, 0
+	mov	w7, 61424
+	msub	w5, w5, w2, w19
+	sub	w6, w19, w5
+.L1618:
+	cmp	w4, 511
+	bls	.L1619
+	ldrh	w4, [x20, 14]
+	mov	w5, 0
+	ldrh	w0, [x20, 10]
+	and	w28, w4, 255
+	mov	w4, w28
+	mul	w0, w28, w0
+	and	w0, w0, 65535
+	udiv	w6, w19, w0
+	msub	w6, w6, w0, w19
+	and	w1, w6, 65535
+	sub	w7, w19, w6
+	sdiv	w0, w1, w28
+	msub	w0, w0, w28, w1
+	ldr	x1, [x29, 144]
+	and	w0, w0, 65535
+	add	x9, x1, :lo12:gp_flash_check_buf
+.L1620:
+	cmp	w5, 511
+	bhi	.L1624
+	add	w1, w6, w5
+	sub	w8, w4, w0
+	add	w0, w0, w7
+	ldr	x10, [x20, 3400]
+	and	w8, w8, 65535
+	ubfiz	x2, x5, 9, 16
+	udiv	w1, w1, w28
+	add	x2, x9, x2
+	stp	w4, w5, [x29, 100]
+	add	x3, x29, 160
+	str	w6, [x29, 112]
+	stp	w8, w7, [x29, 120]
+	and	w1, w1, 65535
+	str	x9, [x29, 128]
+	madd	w1, w1, w28, w0
+	mov	w0, 0
+	udiv	w1, w1, w28
+	blr	x10
+	cmn	w0, #1
+	ldp	w4, w5, [x29, 100]
+	ldr	w6, [x29, 112]
+	ldp	w8, w7, [x29, 120]
+	ldr	x9, [x29, 128]
+	bne	.L1621
+.L1624:
+	ldr	x0, [x29, 144]
+	mov	x28, 0
+	add	x5, x0, :lo12:gp_flash_check_buf
+.L1622:
+	ldr	x1, [x29, 136]
+	lsl	x0, x28, 2
+	ldr	w3, [x0, x1]
+	ldr	w0, [x0, x5]
+	cmp	w0, w3
+	beq	.L1625
+	mov	x2, 512
+	mov	w1, 0
+	mov	x0, x5
+	stp	w28, w3, [x29, 124]
+	str	x5, [x29, 144]
+	bl	memset
+	ldp	w6, w3, [x29, 124]
+	mov	w4, w28
+	ldr	x5, [x29, 144]
+	mov	w1, w19
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	ldr	w2, [x5, w6, uxtw 2]
+	bl	sftl_printk
+	udiv	w1, w19, w26
+	ldr	x2, [x20, 3384]
+	mov	w0, 0
+	blr	x2
+	cmp	w23, 1
+	bls	.L1626
+	add	w1, w21, w19
+	ldr	x2, [x20, 3384]
+	mov	w0, 0
+	udiv	w1, w1, w26
+	blr	x2
+.L1626:
+	ldr	w0, [x29, 152]
+	add	w27, w27, w23
+	cmp	w27, 15
+	add	w19, w19, w0
+	bls	.L1613
+.L1631:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	wzr, [x0, 124]
+.L1611:
+	mov	x3, x25
+	mov	w2, w24
+	mov	w1, w22
 	mov	w0, 0
 	bl	FtlWrite
-	ldp	x29, x30, [sp], 16
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
 	ret
+.L1612:
+	ldr	w7, [x3, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w7, [x4, x3]
+	cmp	w0, w6
+	sub	x2, x2, #4
+	csel	w0, w0, wzr, cc
+	cmp	x2, x5
+	bne	.L1615
+	b	.L1616
+.L1619:
+	add	w0, w5, w4
+	ubfiz	x2, x4, 9, 16
+	str	w4, [x29, 112]
+	add	x3, x29, 160
+	ldr	x4, [x29, 136]
+	udiv	w0, w0, w28
+	ldr	x8, [x20, 3392]
+	str	w7, [x29, 104]
+	add	x2, x4, x2
+	stp	w5, w6, [x29, 120]
+	and	w0, w0, 65535
+	mul	w1, w0, w28
+	stp	w1, w7, [x29, 160]
+	udiv	w1, w6, w28
+	add	w1, w1, w0
+	mov	w0, 0
+	blr	x8
+	ldr	w4, [x29, 112]
+	ldr	w0, [x29, 128]
+	ldr	w7, [x29, 104]
+	add	w4, w0, w4
+	ldp	w5, w6, [x29, 120]
+	and	w4, w4, 65535
+	b	.L1618
+.L1621:
+	add	w5, w8, w5
+	mov	w0, 0
+	and	w5, w5, 65535
+	b	.L1620
+.L1625:
+	add	x28, x28, 1
+	cmp	x28, 65536
+	bne	.L1622
+	ldr	w0, [x29, 156]
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	cmp	w0, 5
+	bls	.L1626
+	b	.L1631
+.L1610:
+	cmp	w0, 63
+	adrp	x3, idb_buf
+	bhi	.L1628
+	mov	w1, 64
+	sub	w1, w1, w0
+	sub	w2, w24, w1
+	ubfiz	x1, x1, 9, 25
+	add	x1, x25, x1
+	add	x0, x3, :lo12:idb_buf
+.L1629:
+	adrp	x3, .LANCHOR3
+	add	x3, x3, :lo12:.LANCHOR3
+	mov	w6, 1
+	cmp	w5, 576
+	str	w6, [x3, 124]
+	bls	.L1630
+	sub	w2, w2, w4
+	sub	w2, w2, #447
+.L1630:
+	lsl	w2, w2, 9
+	bl	memcpy
+	b	.L1611
+.L1628:
+	lsl	w0, w0, 7
+	add	x3, x3, :lo12:idb_buf
+	sub	w0, w0, #8192
+	mov	x1, x2
+	add	x0, x3, x0, lsl 2
+	mov	w2, w24
+	b	.L1629
 	.size	sftl_write, .-sftl_write
 	.align	2
 	.global	FtlLoadSysInfo
@@ -11071,11 +11498,11 @@ FtlLoadSysInfo:
 	adrp	x20, .LANCHOR0
 	add	x19, x20, :lo12:.LANCHOR0
 	stp	x21, x22, [sp, 32]
-	add	x21, x19, 3400
+	add	x21, x19, 3408
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x19, 3432]
-	str	x0, [x21, 8]
 	ldr	x0, [x19, 3440]
+	str	x0, [x21, 8]
+	ldr	x0, [x19, 3448]
 	str	x0, [x21, 16]
 	ldr	x0, [x19, 2376]
 	ldrh	w2, [x19, 44]
@@ -11084,16 +11511,16 @@ FtlLoadSysInfo:
 	ldrh	w0, [x19, 2656]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1592
-.L1600:
+	bne	.L1642
+.L1650:
 	mov	w0, -1
-.L1591:
+.L1641:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1592:
+.L1642:
 	add	x23, x19, 2656
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -11103,44 +11530,44 @@ FtlLoadSysInfo:
 	strh	w0, [x23, 2]
 	mov	w23, 19539
 	movk	w23, 0x4654, lsl 16
-.L1594:
-	tbz	w22, #31, .L1597
+.L1644:
+	tbz	w22, #31, .L1647
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1437
+	mov	w2, 1482
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1596:
+.L1646:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 44]
 	ldrh	w1, [x1, 114]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1599
+	bcs	.L1649
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1439
+	mov	w2, 1484
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1599:
+.L1649:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w2, 48
 	add	x21, x19, 2312
 	mov	x0, x21
-	ldr	x1, [x19, 3408]
+	ldr	x1, [x19, 3416]
 	bl	ftl_memcpy
 	ldr	x0, [x19, 2376]
 	ldrh	w2, [x19, 44]
-	ldr	x1, [x19, 3408]
+	ldr	x1, [x19, 3416]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
 	ldrh	w1, [x19, 44]
-	ldr	x0, [x19, 3408]
+	ldr	x0, [x19, 3416]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
 	add	x1, x1, 48
@@ -11153,17 +11580,17 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1600
+	bne	.L1650
 	ldrh	w1, [x19, 2320]
 	ldrb	w2, [x19, 2322]
 	ldrh	w0, [x19, 58]
 	strh	w1, [x19, 2662]
 	cmp	w2, w0
-	bne	.L1600
-	adrp	x0, .LANCHOR3+136
+	bne	.L1650
+	adrp	x0, .LANCHOR3+128
 	ldrh	w2, [x19, 62]
 	ldrh	w3, [x19, 36]
-	str	w1, [x0, #:lo12:.LANCHOR3+136]
+	str	w1, [x0, #:lo12:.LANCHOR3+128]
 	ldrh	w0, [x19, 106]
 	mul	w0, w0, w1
 	str	w0, [x19, 2584]
@@ -11176,15 +11603,15 @@ FtlLoadSysInfo:
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	strh	w0, [x19, 2652]
-	bls	.L1601
+	bls	.L1651
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 1461
+	mov	w2, 1506
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1601:
+.L1651:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w3, -1
 	ldrh	w2, [x0, 2328]
@@ -11230,74 +11657,74 @@ FtlLoadSysInfo:
 	ldr	w2, [x0, 2620]
 	str	wzr, [x0, 2600]
 	cmp	w1, w2
-	bls	.L1602
+	bls	.L1652
 	str	w1, [x0, 2620]
-.L1602:
+.L1652:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2348]
 	ldr	w2, [x0, 2624]
 	cmp	w1, w2
-	bls	.L1603
+	bls	.L1653
 	str	w1, [x0, 2624]
-.L1603:
+.L1653:
 	mov	w0, 65535
 	cmp	w4, w0
-	beq	.L1604
+	beq	.L1654
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x0, x0, 2424
 	bl	make_superblock
-.L1604:
+.L1654:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2472
 	ldrh	w2, [x1, 2472]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1605
+	beq	.L1655
 	bl	make_superblock
-.L1605:
+.L1655:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2520
 	ldrh	w2, [x1, 2520]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1606
+	beq	.L1656
 	bl	make_superblock
-.L1606:
+.L1656:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
 	add	x0, x20, 2672
 	ldrh	w2, [x20, 2672]
 	cmp	w2, w1
-	beq	.L1607
+	beq	.L1657
 	bl	make_superblock
-.L1607:
+.L1657:
 	mov	w0, 0
-	b	.L1591
-.L1597:
+	b	.L1641
+.L1647:
 	ldrh	w0, [x19, 2656]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	ldr	x0, [x19, 3432]
+	ldr	x0, [x19, 3440]
 	str	x0, [x21, 8]
 	mov	x0, x21
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1595
-	ldr	x0, [x19, 3432]
+	beq	.L1645
+	ldr	x0, [x19, 3440]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1595
-	ldr	x0, [x19, 3440]
+	bne	.L1645
+	ldr	x0, [x19, 3448]
 	ldrh	w0, [x0]
 	cmp	w0, w24
-	beq	.L1596
-.L1595:
+	beq	.L1646
+.L1645:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1594
+	b	.L1644
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	2
 	.global	FtlSysBlkInit
@@ -11306,33 +11733,33 @@ FtlSysBlkInit:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR0
+	adrp	x19, .LANCHOR0
 	stp	x21, x22, [sp, 32]
-	add	x19, x20, :lo12:.LANCHOR0
+	add	x20, x19, :lo12:.LANCHOR0
 	adrp	x21, .LANCHOR3
 	add	x0, x21, :lo12:.LANCHOR3
-	stp	x23, x24, [sp, 48]
+	str	x23, [sp, 48]
 	strh	wzr, [x0, -32]
-	ldrh	w0, [x19, 40]
+	ldrh	w0, [x20, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldrh	w1, [x19, 2656]
+	ldrh	w1, [x20, 2656]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1614
-.L1616:
-	mov	w24, -1
-.L1613:
-	mov	w0, w24
+	bne	.L1664
+.L1666:
+	mov	w22, -1
+.L1663:
+	mov	w0, w22
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1614:
+.L1664:
 	bl	FtlLoadSysInfo
-	mov	w24, w0
-	cbnz	w0, .L1616
+	mov	w22, w0
+	cbnz	w0, .L1666
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11342,97 +11769,138 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	ldr	x1, [x19, 2568]
+	ldr	x1, [x20, 2568]
 	mov	w0, 0
-	ldrh	w3, [x19, 142]
+	ldrh	w3, [x20, 142]
 	add	x1, x1, 4
-.L1617:
+.L1667:
 	cmp	w0, w3
-	bge	.L1622
+	bge	.L1672
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L1618
-.L1622:
-	add	x1, x20, :lo12:.LANCHOR0
+	tbz	w2, #31, .L1668
+.L1672:
+	add	x1, x19, :lo12:.LANCHOR0
 	cmp	w0, w3
 	ldrh	w2, [x1, 2340]
 	add	w2, w2, 1
 	strh	w2, [x1, 2340]
-	bge	.L1628
-.L1619:
-	add	x19, x20, :lo12:.LANCHOR0
+	bge	.L1686
+.L1669:
+	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR3
-	add	x23, x19, 2424
-	add	x22, x19, 2472
-	mov	x0, x23
-	bl	FtlSuperblockPowerLostFix
-	mov	x0, x22
-	bl	FtlSuperblockPowerLostFix
-	ldrh	w0, [x19, 2424]
-	ldr	x2, [x19, 2376]
-	ldrh	w3, [x19, 2428]
-	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
-	strb	wzr, [x19, 2430]
-	ldrh	w0, [x19, 106]
-	strh	w0, [x19, 2426]
-	ldrh	w0, [x19, 2472]
-	ldr	x2, [x19, 2376]
-	strh	wzr, [x19, 2428]
-	lsl	x0, x0, 1
-	ldrh	w3, [x19, 2476]
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
-	strb	wzr, [x19, 2478]
-	ldrh	w0, [x19, 106]
-	strh	w0, [x19, 2474]
-	sub	x0, x21, #192
-	strh	wzr, [x19, 2476]
+	sub	x0, x21, #184
+	ldrh	w1, [x20, 2424]
+	ldr	x3, [x20, 2376]
+	ldrh	w4, [x20, 2428]
+	lsl	x1, x1, 1
+	ldrh	w2, [x3, x1]
+	sub	w2, w2, w4
+	strh	w2, [x3, x1]
+	strb	wzr, [x20, 2430]
+	ldrh	w1, [x20, 106]
+	strh	w1, [x20, 2426]
+	ldrh	w1, [x20, 2472]
+	ldr	x3, [x20, 2376]
+	strh	wzr, [x20, 2428]
+	lsl	x1, x1, 1
+	ldrh	w4, [x20, 2476]
+	ldrh	w2, [x3, x1]
+	sub	w2, w2, w4
+	strh	w2, [x3, x1]
+	strb	wzr, [x20, 2478]
+	ldrh	w1, [x20, 106]
+	strh	w1, [x20, 2474]
+	strh	wzr, [x20, 2476]
 	bl	FtlMapBlkWriteDump_data
-	sub	x0, x21, #120
+	sub	x0, x21, #112
 	bl	FtlMapBlkWriteDump_data
-	ldrh	w0, [x19, 2342]
+	ldrh	w0, [x20, 2342]
 	add	w0, w0, 1
-	strh	w0, [x19, 2342]
+	strh	w0, [x20, 2342]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1623
-.L1618:
+	b	.L1673
+.L1668:
 	add	w0, w0, 1
-	b	.L1617
-.L1628:
+	b	.L1667
+.L1686:
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, -32]
-	cbnz	w0, .L1619
-.L1623:
-	add	x19, x20, :lo12:.LANCHOR0
+	cbnz	w0, .L1669
+.L1673:
+	add	x7, x19, :lo12:.LANCHOR0
+	mov	w0, 65533
+	ldrh	w6, [x7, 2356]
+	sub	w1, w6, #1
+	cmp	w0, w1, uxth
+	bcc	.L1675
+	strh	w6, [x7, 3320]
+	mov	w1, w6
+	add	x0, x7, 2408
+	bl	test_node_in_list
+	cbnz	w0, .L1676
+	ldrh	w0, [x7, 44]
+	cmp	w0, w6
+	bls	.L1676
+	ldr	x0, [x7, 2376]
+	ubfiz	x6, x6, 1, 16
+	ldrh	w0, [x0, x6]
+	cbnz	w0, .L1675
+.L1676:
+	add	x0, x19, :lo12:.LANCHOR0
+	mov	w1, -1
+	strh	w1, [x0, 3320]
+.L1675:
+	add	x7, x19, :lo12:.LANCHOR0
+	mov	w0, 65533
+	ldrh	w6, [x7, 2358]
+	sub	w1, w6, #1
+	cmp	w0, w1, uxth
+	bcc	.L1679
+	strh	w6, [x7, 3322]
+	mov	w1, w6
+	add	x0, x7, 2408
+	bl	test_node_in_list
+	cbnz	w0, .L1680
+	ldrh	w0, [x7, 44]
+	cmp	w0, w6
+	bls	.L1680
+	ldr	x0, [x7, 2376]
+	ubfiz	x6, x6, 1, 16
+	ldrh	w0, [x0, x6]
+	cbnz	w0, .L1679
+.L1680:
+	add	x0, x19, :lo12:.LANCHOR0
+	mov	w1, -1
+	strh	w1, [x0, 3322]
+.L1679:
+	add	x20, x19, :lo12:.LANCHOR0
 	mov	w1, 65535
-	add	x22, x19, 2424
-	ldrh	w0, [x19, 2424]
+	add	x23, x20, 2424
+	ldrh	w0, [x20, 2424]
 	cmp	w0, w1
-	beq	.L1624
-	ldrh	w1, [x19, 2428]
-	cbnz	w1, .L1624
-	ldrh	w1, [x19, 2476]
-	add	x21, x19, 2472
-	cbnz	w1, .L1624
+	beq	.L1682
+	ldrh	w1, [x20, 2428]
+	cbnz	w1, .L1682
+	ldrh	w1, [x20, 2476]
+	add	x21, x20, 2472
+	cbnz	w1, .L1682
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, 2472]
+	ldrh	w0, [x20, 2472]
 	bl	FtlGcRefreshBlock
-	mov	x0, x22
+	bl	FtlVpcTblFlush
+	mov	x0, x23
 	bl	allocate_new_data_superblock
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.L1624:
-	add	x20, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x20, 2340]
+.L1682:
+	add	x19, x19, :lo12:.LANCHOR0
+	ldrh	w0, [x19, 2340]
 	tst	x0, 31
-	bne	.L1613
+	bne	.L1663
 	bl	FtlVpcCheckAndModify
-	b	.L1613
+	b	.L1663
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
@@ -11450,40 +11918,40 @@ ftl_low_format:
 	ldrh	w0, [x0, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1631
+	cbz	w0, .L1689
 	bl	FtlMakeBbt
-.L1631:
+.L1689:
 	mov	w4, 23752
 	add	x1, x20, :lo12:.LANCHOR0
 	mov	w0, 0
 	movk	w4, 0xa0f, lsl 16
-.L1632:
+.L1690:
 	ldrh	w2, [x1, 62]
 	cmp	w0, w2, lsl 7
-	blt	.L1633
+	blt	.L1691
 	ldrh	w21, [x1, 44]
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1634:
+.L1692:
 	ldrh	w0, [x22, 46]
 	cmp	w0, w21
-	bhi	.L1635
+	bhi	.L1693
 	ldrh	w0, [x22, 36]
 	sub	w1, w19, #3
 	cmp	w1, w0, lsl 1
-	bge	.L1636
-.L1640:
+	bge	.L1694
+.L1698:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w21, 0
 	mov	w22, 0
-.L1637:
+.L1695:
 	ldrh	w0, [x19, 44]
 	cmp	w0, w22
-	bhi	.L1641
+	bhi	.L1699
 	ldrh	w2, [x19, 36]
 	ldr	w1, [x19, 48]
 	ldrh	w0, [x19, 46]
-	str	w0, [x19, 3968]
+	str	w0, [x19, 3976]
 	udiv	w4, w1, w2
 	ubfx	x3, x4, 5, 16
 	str	w4, [x19, 2584]
@@ -11492,28 +11960,28 @@ ftl_low_format:
 	mov	w0, 24
 	mul	w0, w2, w0
 	cmp	w21, w0
-	ble	.L1642
+	ble	.L1700
 	sub	w1, w1, w21
 	udiv	w1, w1, w2
 	str	w1, [x19, 2584]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x19, 2652]
-.L1642:
+.L1700:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 98]
-	cbz	w1, .L1644
+	cbz	w1, .L1702
 	ldrh	w5, [x0, 2652]
 	add	w5, w5, w1, lsr 1
 	strh	w5, [x0, 2652]
 	mul	w5, w1, w2
 	cmp	w21, w5
-	bge	.L1644
+	bge	.L1702
 	add	w1, w1, 32
 	str	w4, [x0, 2584]
 	add	w1, w3, w1
 	strh	w1, [x0, 2652]
-.L1644:
+.L1702:
 	add	x19, x20, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR3
 	add	x21, x19, 2424
@@ -11523,7 +11991,7 @@ ftl_low_format:
 	sub	w0, w0, w1
 	add	x1, x22, :lo12:.LANCHOR3
 	mul	w0, w0, w2
-	str	w0, [x1, 136]
+	str	w0, [x1, 128]
 	ldrh	w1, [x19, 106]
 	mul	w0, w1, w0
 	ldrh	w1, [x19, 62]
@@ -11551,31 +12019,31 @@ ftl_low_format:
 	strh	wzr, [x19, 2424]
 	str	wzr, [x19, 2580]
 	bl	ftl_memset
-.L1646:
+.L1704:
 	mov	x0, x21
 	bl	make_superblock
 	ldrb	w1, [x21, 7]
 	ldrh	w0, [x21]
-	cbnz	w1, .L1647
+	cbnz	w1, .L1705
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x21]
 	add	w0, w0, 1
 	strh	w0, [x21]
-	b	.L1646
-.L1633:
-	ldr	x5, [x1, 3992]
+	b	.L1704
+.L1691:
+	ldr	x5, [x1, 4000]
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w2, [x5, x3]
-	ldr	x2, [x1, 3976]
+	ldr	x2, [x1, 3984]
 	str	w4, [x2, x3]
-	b	.L1632
-.L1635:
+	b	.L1690
+.L1693:
 	mov	w0, w21
 	mov	w1, 1
 	add	w21, w21, 1
@@ -11583,8 +12051,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w21, w21, 65535
 	and	w19, w19, 65535
-	b	.L1634
-.L1636:
+	b	.L1692
+.L1694:
 	udiv	w0, w19, w0
 	ldr	w19, [x22, 136]
 	add	x21, x20, :lo12:.LANCHOR0
@@ -11593,17 +12061,17 @@ ftl_low_format:
 	ldrh	w0, [x22, 40]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x22, 44]
-.L1638:
+.L1696:
 	ldrh	w0, [x21, 46]
 	cmp	w0, w19
-	bls	.L1640
+	bls	.L1698
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1638
-.L1641:
+	b	.L1696
+.L1699:
 	mov	w0, w22
 	mov	w1, 0
 	add	w22, w22, 1
@@ -11611,8 +12079,8 @@ ftl_low_format:
 	add	w21, w21, w0
 	and	w22, w22, 65535
 	and	w21, w21, 65535
-	b	.L1637
-.L1647:
+	b	.L1695
+.L1705:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x21, 12]
@@ -11632,20 +12100,20 @@ ftl_low_format:
 	strb	w1, [x19, 2480]
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	x20, x0
-.L1648:
+.L1706:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w1, [x20, 7]
 	ldrh	w0, [x20]
-	cbnz	w1, .L1649
+	cbnz	w1, .L1707
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w21, [x1, x0]
 	ldrh	w0, [x20]
 	add	w0, w0, 1
 	strh	w0, [x20]
-	b	.L1648
-.L1649:
+	b	.L1706
+.L1707:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x20, 12]
@@ -11659,7 +12127,7 @@ ftl_low_format:
 	strh	w20, [x19, 2520]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x19, 2656]
-	ldr	w0, [x22, 136]
+	ldr	w0, [x22, 128]
 	strh	w0, [x19, 2662]
 	ldr	w0, [x19, 2620]
 	str	w0, [x19, 2664]
@@ -11669,11 +12137,11 @@ ftl_low_format:
 	str	w0, [x19, 2620]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1650
+	cbnz	w0, .L1708
 	adrp	x0, .LANCHOR2
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR2]
-.L1650:
+.L1708:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -11705,22 +12173,22 @@ sftl_init:
 	ldrh	w0, [x19, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1659
+	cbnz	w0, .L1717
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1659
+	cbnz	w0, .L1717
 	mov	w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 2416]
 	cmp	w0, 15
-	bhi	.L1659
+	bhi	.L1717
 	mov	w19, 8129
-.L1658:
+.L1716:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1658
-.L1659:
+	bne	.L1716
+.L1717:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11743,12 +12211,12 @@ ftl_memcmp:
 rk_sftl_vendor_dev_ops_register:
 	adrp	x2, .LANCHOR3
 	add	x2, x2, :lo12:.LANCHOR3
-	ldr	x3, [x2, 144]
-	cbnz	x3, .L1666
-	stp	x0, x1, [x2, 144]
+	ldr	x3, [x2, 136]
+	cbnz	x3, .L1724
+	stp	x0, x1, [x2, 136]
 	mov	w0, 0
 	ret
-.L1666:
+.L1724:
 	mov	w0, -1
 	ret
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -11766,55 +12234,55 @@ rk_sftl_vendor_storage_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	bl	ftl_malloc
-	str	x0, [x22, 160]
-	cbz	x0, .L1673
+	str	x0, [x22, 152]
+	cbz	x0, .L1731
 	mov	w26, 22084
 	mov	w25, 0
 	mov	w24, 0
 	mov	w23, 0
 	movk	w26, 0x524b, lsl 16
-.L1671:
-	ldr	x3, [x22, 144]
+.L1729:
+	ldr	x3, [x22, 136]
 	mov	w1, 128
-	ldr	x2, [x22, 160]
+	ldr	x2, [x22, 152]
 	lsl	w0, w23, 7
 	blr	x3
 	mov	w21, w0
-	cbnz	w0, .L1669
-	ldr	x19, [x22, 160]
+	cbnz	w0, .L1727
+	ldr	x19, [x22, 152]
 	ldr	w0, [x19]
 	cmp	w0, w26
-	bne	.L1670
+	bne	.L1728
 	add	x0, x19, 61440
 	ldr	w1, [x19, 4]
 	ldr	w0, [x0, 4092]
 	cmp	w0, w1
-	bne	.L1670
+	bne	.L1728
 	cmp	w0, w24
-	bls	.L1670
+	bls	.L1728
 	mov	w25, w23
 	mov	w24, w0
-.L1670:
+.L1728:
 	add	w23, w23, 1
 	cmp	w23, 2
-	bne	.L1671
-	cbz	w24, .L1672
+	bne	.L1729
+	cbz	w24, .L1730
 	add	x0, x20, :lo12:.LANCHOR3
 	mov	x2, x19
 	mov	w1, 128
-	ldr	x3, [x0, 144]
+	ldr	x3, [x0, 136]
 	lsl	w0, w25, 7
 	blr	x3
 	mov	w21, w0
-	cbz	w0, .L1667
-.L1669:
+	cbz	w0, .L1725
+.L1727:
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w21, -1
-	ldr	x0, [x20, 160]
+	ldr	x0, [x20, 152]
 	bl	kfree
-	str	xzr, [x20, 160]
-	b	.L1667
-.L1672:
+	str	xzr, [x20, 152]
+	b	.L1725
+.L1730:
 	mov	w1, 0
 	mov	x2, 65536
 	mov	x0, x19
@@ -11827,7 +12295,7 @@ rk_sftl_vendor_storage_init:
 	str	w0, [x1, 4092]
 	mov	w0, -1032
 	strh	w0, [x19, 14]
-.L1667:
+.L1725:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11835,30 +12303,30 @@ rk_sftl_vendor_storage_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1673:
+.L1731:
 	mov	w21, -12
-	b	.L1667
+	b	.L1725
 	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
 	.align	2
 	.global	rk_sftl_vendor_read
 	.type	rk_sftl_vendor_read, %function
 rk_sftl_vendor_read:
-	adrp	x3, .LANCHOR3+160
-	ldr	x4, [x3, #:lo12:.LANCHOR3+160]
-	cbz	x4, .L1681
+	adrp	x3, .LANCHOR3+152
+	ldr	x4, [x3, #:lo12:.LANCHOR3+152]
+	cbz	x4, .L1739
 	ldrh	w6, [x4, 10]
 	add	x5, x4, 16
 	mov	w3, 0
-.L1678:
+.L1736:
 	cmp	w3, w6
-	bcc	.L1680
-.L1681:
+	bcc	.L1738
+.L1739:
 	mov	w0, -1
 	ret
-.L1680:
+.L1738:
 	ldrh	w7, [x5], 8
 	cmp	w7, w0
-	bne	.L1679
+	bne	.L1737
 	stp	x29, x30, [sp, -32]!
 	add	x3, x4, x3, uxtw 3
 	mov	x0, x1
@@ -11876,9 +12344,9 @@ rk_sftl_vendor_read:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1679:
+.L1737:
 	add	w3, w3, 1
-	b	.L1678
+	b	.L1736
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
 	.global	rk_sftl_vendor_write
@@ -11893,8 +12361,8 @@ rk_sftl_vendor_write:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldr	x19, [x3, 160]
-	cbz	x19, .L1701
+	ldr	x19, [x3, 152]
+	cbz	x19, .L1759
 	add	w21, w2, 63
 	ldrh	w3, [x19, 10]
 	ldrh	w24, [x19, 8]
@@ -11903,12 +12371,12 @@ rk_sftl_vendor_write:
 	and	w21, w21, -64
 	add	x1, x19, 16
 	mov	w20, 0
-.L1688:
+.L1746:
 	cmp	w20, w3
-	bcc	.L1696
+	bcc	.L1754
 	ldrh	w1, [x19, 14]
 	cmp	w21, w1
-	bhi	.L1701
+	bhi	.L1759
 	add	x3, x19, x3, uxth 3
 	and	w21, w21, 65535
 	uxtw	x2, w28
@@ -11928,11 +12396,11 @@ rk_sftl_vendor_write:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-	b	.L1703
-.L1696:
+	b	.L1761
+.L1754:
 	ldrh	w6, [x1], 8
 	cmp	w6, w0
-	bne	.L1689
+	bne	.L1747
 	uxtw	x27, w20
 	add	x5, x19, 1024
 	add	x22, x19, x27, lsl 3
@@ -11940,17 +12408,17 @@ rk_sftl_vendor_write:
 	add	w25, w25, 63
 	and	w25, w25, -64
 	cmp	w28, w25
-	bls	.L1690
+	bls	.L1748
 	ldrh	w0, [x19, 14]
 	cmp	w21, w0
-	bhi	.L1701
+	bhi	.L1759
 	add	x27, x27, 2
 	ldrh	w22, [x22, 18]
 	add	x27, x19, x27, lsl 3
 	sub	w26, w3, #1
-.L1691:
+.L1749:
 	cmp	w20, w26
-	bcc	.L1692
+	bcc	.L1750
 	add	x20, x19, x20, uxtw 3
 	and	w22, w22, 65535
 	add	x0, x5, x22, uxth
@@ -11967,7 +12435,7 @@ rk_sftl_vendor_write:
 	sub	w21, w0, w21
 	add	w25, w21, w25
 	strh	w25, [x19, 14]
-.L1703:
+.L1761:
 	ldr	w0, [x19, 4]
 	add	x1, x19, 61440
 	add	x23, x23, :lo12:.LANCHOR3
@@ -11976,7 +12444,7 @@ rk_sftl_vendor_write:
 	str	w0, [x19, 4]
 	str	w0, [x1, 4092]
 	mov	w1, 128
-	ldr	x3, [x23, 152]
+	ldr	x3, [x23, 144]
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	and	w0, w0, 65535
@@ -11986,7 +12454,7 @@ rk_sftl_vendor_write:
 	lsl	w0, w24, 7
 	blr	x3
 	mov	w0, 0
-.L1686:
+.L1744:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11994,7 +12462,7 @@ rk_sftl_vendor_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1692:
+.L1750:
 	add	w20, w20, 1
 	str	x4, [x29, 104]
 	add	x0, x19, x20, uxtw 3
@@ -12018,21 +12486,21 @@ rk_sftl_vendor_write:
 	ldr	x4, [x29, 104]
 	add	w22, w22, w3
 	ldr	x5, [x29, 120]
-	b	.L1691
-.L1690:
+	b	.L1749
+.L1748:
 	ldrh	w0, [x22, 18]
 	uxtw	x2, w28
 	mov	x1, x4
 	add	x0, x5, x0
 	bl	memcpy
 	strh	w28, [x22, 20]
-	b	.L1703
-.L1689:
+	b	.L1761
+.L1747:
 	add	w20, w20, 1
-	b	.L1688
-.L1701:
+	b	.L1746
+.L1759:
 	mov	w0, -1
-	b	.L1686
+	b	.L1744
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
 	.global	rk_sftl_vendor_storage_ioctl
@@ -12046,19 +12514,19 @@ rk_sftl_vendor_storage_ioctl:
 	str	x21, [sp, 32]
 	mov	w21, w1
 	bl	ftl_malloc
-	cbz	x0, .L1718
+	cbz	x0, .L1776
 	mov	w1, 30209
 	mov	x19, x0
 	movk	w1, 0x4004, lsl 16
 	cmp	w21, w1
-	beq	.L1707
+	beq	.L1765
 	add	w1, w1, 1
 	cmp	w21, w1
-	beq	.L1708
-.L1728:
+	beq	.L1766
+.L1786:
 	mov	x20, -14
-	b	.L1706
-.L1707:
+	b	.L1764
+.L1765:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12071,34 +12539,34 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1714
+	cbz	x3, .L1772
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1728
+	cbnz	x0, .L1786
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	beq	.L1712
-.L1713:
+	beq	.L1770
+.L1771:
 	mov	x20, -1
-.L1706:
+.L1764:
 	mov	x0, x19
 	bl	kfree
-.L1704:
+.L1762:
 	mov	x0, x20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1712:
+.L1770:
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_read
 	cmn	w0, #1
-	beq	.L1713
+	beq	.L1771
 	strh	w0, [x19, 6]
 	and	x2, x0, 65535
 	add	x2, x2, 8
@@ -12109,14 +12577,14 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1728
+	cbz	x3, .L1786
 	mov	x0, x20
 	mov	x1, x19
 	mov	x20, 0
 	bl	__arch_copy_to_user
-	cbz	x0, .L1706
-	b	.L1728
-.L1708:
+	cbz	x0, .L1764
+	b	.L1786
+.L1766:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12129,19 +12597,19 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1714
+	cbz	x3, .L1772
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1728
+	cbnz	x0, .L1786
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	bne	.L1713
+	bne	.L1771
 	ldrh	w2, [x19, 6]
 	cmp	w2, 4087
-	bhi	.L1713
+	bhi	.L1771
 	add	w2, w2, 8
 	mov	x0, x20
 	sxtw	x2, w2
@@ -12151,28 +12619,28 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1716
+	cbz	x3, .L1774
 	mov	x1, x20
 	mov	x0, x19
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1728
+	cbnz	x0, .L1786
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_write
 	sxtw	x20, w0
-	b	.L1706
-.L1714:
+	b	.L1764
+.L1772:
 	str	xzr, [x19]
-	b	.L1728
-.L1716:
+	b	.L1786
+.L1774:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-	b	.L1728
-.L1718:
+	b	.L1786
+.L1776:
 	mov	x20, -1
-	b	.L1704
+	b	.L1762
 	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
 	.align	2
 	.global	rk_sftl_vendor_register
@@ -12230,6 +12698,8 @@ rk_sftl_vendor_register:
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
 	.global	g_gc_next_blk_1
 	.global	g_gc_next_blk
 	.global	g_gc_cur_blk_max_valid_pages
@@ -12285,7 +12755,6 @@ rk_sftl_vendor_register:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -12338,169 +12807,169 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3769, %object
-	.size	__func__.3769, 17
-__func__.3769:
+	.type	__func__.3843, %object
+	.size	__func__.3843, 17
+__func__.3843:
 	.string	"INSERT_DATA_LIST"
 	.zero	7
-	.type	__func__.3764, %object
-	.size	__func__.3764, 17
-__func__.3764:
+	.type	__func__.3838, %object
+	.size	__func__.3838, 17
+__func__.3838:
 	.string	"INSERT_FREE_LIST"
 	.zero	7
-	.type	__func__.3800, %object
-	.size	__func__.3800, 17
-__func__.3800:
+	.type	__func__.3881, %object
+	.size	__func__.3881, 17
+__func__.3881:
 	.string	"List_remove_node"
 	.zero	7
-	.type	__func__.3832, %object
-	.size	__func__.3832, 22
-__func__.3832:
+	.type	__func__.3913, %object
+	.size	__func__.3913, 22
+__func__.3913:
 	.string	"List_update_data_list"
 	.zero	2
-	.type	__func__.3938, %object
-	.size	__func__.3938, 22
-__func__.3938:
+	.type	__func__.4024, %object
+	.size	__func__.4024, 22
+__func__.4024:
 	.string	"select_l2p_ram_region"
 	.zero	2
-	.type	__func__.4261, %object
-	.size	__func__.4261, 16
-__func__.4261:
+	.type	__func__.4347, %object
+	.size	__func__.4347, 16
+__func__.4347:
 	.string	"make_superblock"
-	.type	__func__.4436, %object
-	.size	__func__.4436, 19
-__func__.4436:
+	.type	__func__.4522, %object
+	.size	__func__.4522, 19
+__func__.4522:
 	.string	"get_new_active_ppa"
 	.zero	5
-	.type	__func__.16018, %object
-	.size	__func__.16018, 15
-__func__.16018:
+	.type	__func__.16105, %object
+	.size	__func__.16105, 15
+__func__.16105:
 	.string	"FlashReadPages"
 	.zero	1
-	.type	__func__.16035, %object
-	.size	__func__.16035, 15
-__func__.16035:
+	.type	__func__.16122, %object
+	.size	__func__.16122, 15
+__func__.16122:
 	.string	"FlashProgPages"
 	.zero	1
-	.type	__func__.3874, %object
-	.size	__func__.3874, 26
-__func__.3874:
+	.type	__func__.3955, %object
+	.size	__func__.3955, 26
+__func__.3955:
 	.string	"ftl_map_blk_alloc_new_blk"
 	.zero	6
-	.type	__func__.3378, %object
-	.size	__func__.3378, 11
-__func__.3378:
+	.type	__func__.3380, %object
+	.size	__func__.3380, 11
+__func__.3380:
 	.string	"FtlMemInit"
 	.zero	5
-	.type	__func__.3604, %object
-	.size	__func__.3604, 14
-__func__.3604:
+	.type	__func__.3678, %object
+	.size	__func__.3678, 14
+__func__.3678:
 	.string	"FtlBbt2Bitmap"
 	.zero	2
-	.type	__func__.3841, %object
-	.size	__func__.3841, 16
-__func__.3841:
-	.string	"load_l2p_region"
-	.type	__func__.3899, %object
-	.size	__func__.3899, 31
-__func__.3899:
+	.type	__func__.3985, %object
+	.size	__func__.3985, 31
+__func__.3985:
 	.string	"Ftl_write_map_blk_to_last_page"
 	.zero	1
-	.type	__func__.3913, %object
-	.size	__func__.3913, 16
-__func__.3913:
+	.type	__func__.3999, %object
+	.size	__func__.3999, 16
+__func__.3999:
 	.string	"FtlMapWritePage"
-	.type	__func__.3885, %object
-	.size	__func__.3885, 15
-__func__.3885:
+	.type	__func__.3922, %object
+	.size	__func__.3922, 16
+__func__.3922:
+	.string	"load_l2p_region"
+	.type	__func__.3970, %object
+	.size	__func__.3970, 15
+__func__.3970:
 	.string	"ftl_map_blk_gc"
 	.zero	1
-	.type	__func__.3955, %object
-	.size	__func__.3955, 9
-__func__.3955:
+	.type	__func__.4041, %object
+	.size	__func__.4041, 9
+__func__.4041:
 	.string	"log2phys"
 	.zero	7
-	.type	__func__.4170, %object
-	.size	__func__.4170, 16
-__func__.4170:
+	.type	__func__.4256, %object
+	.size	__func__.4256, 16
+__func__.4256:
 	.string	"FtlReUsePrevPpa"
-	.type	__func__.4050, %object
-	.size	__func__.4050, 14
-__func__.4050:
+	.type	__func__.4136, %object
+	.size	__func__.4136, 14
+__func__.4136:
 	.string	"FtlScanSysBlk"
 	.zero	2
-	.type	__func__.4282, %object
-	.size	__func__.4282, 18
-__func__.4282:
+	.type	__func__.4368, %object
+	.size	__func__.4368, 18
+__func__.4368:
 	.string	"SupperBlkListInit"
 	.zero	6
-	.type	__func__.4323, %object
-	.size	__func__.4323, 14
-__func__.4323:
+	.type	__func__.4409, %object
+	.size	__func__.4409, 14
+__func__.4409:
 	.string	"ftl_check_vpc"
 	.zero	2
-	.type	__func__.4408, %object
-	.size	__func__.4408, 25
-__func__.4408:
+	.type	__func__.4494, %object
+	.size	__func__.4494, 25
+__func__.4494:
 	.string	"allocate_data_superblock"
 	.zero	7
-	.type	__func__.4449, %object
-	.size	__func__.4449, 16
-__func__.4449:
+	.type	__func__.4535, %object
+	.size	__func__.4535, 16
+__func__.4535:
 	.string	"update_vpc_list"
-	.type	__func__.4456, %object
-	.size	__func__.4456, 20
-__func__.4456:
+	.type	__func__.4542, %object
+	.size	__func__.4542, 20
+__func__.4542:
 	.string	"decrement_vpc_count"
 	.zero	4
-	.type	__func__.4204, %object
-	.size	__func__.4204, 22
-__func__.4204:
+	.type	__func__.4290, %object
+	.size	__func__.4290, 22
+__func__.4290:
 	.string	"FtlRecoverySuperblock"
 	.zero	2
-	.type	__func__.3647, %object
-	.size	__func__.3647, 11
-__func__.3647:
+	.type	__func__.3721, %object
+	.size	__func__.3721, 11
+__func__.3721:
 	.string	"FtlLoadBbt"
 	.zero	5
-	.type	__func__.4028, %object
-	.size	__func__.4028, 15
-__func__.4028:
+	.type	__func__.4114, %object
+	.size	__func__.4114, 15
+__func__.4114:
 	.string	"FtlVpcTblFlush"
 	.zero	1
-	.type	__func__.4307, %object
-	.size	__func__.4307, 21
-__func__.4307:
+	.type	__func__.4393, %object
+	.size	__func__.4393, 21
+__func__.4393:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.4429, %object
-	.size	__func__.4429, 29
-__func__.4429:
+	.type	__func__.4515, %object
+	.size	__func__.4515, 29
+__func__.4515:
 	.string	"allocate_new_data_superblock"
 	.zero	3
-	.type	__func__.3502, %object
-	.size	__func__.3502, 13
-__func__.3502:
+	.type	__func__.3504, %object
+	.size	__func__.3504, 13
+__func__.3504:
 	.string	"FtlProgPages"
 	.zero	3
-	.type	__func__.4526, %object
-	.size	__func__.4526, 19
-__func__.4526:
+	.type	__func__.4613, %object
+	.size	__func__.4613, 19
+__func__.4613:
 	.string	"FtlGcFreeTempBlock"
 	.zero	5
-	.type	__func__.4632, %object
-	.size	__func__.4632, 23
-__func__.4632:
+	.type	__func__.4719, %object
+	.size	__func__.4719, 23
+__func__.4719:
 	.string	"rk_ftl_garbage_collect"
 	.zero	1
-	.type	__func__.3530, %object
-	.size	__func__.3530, 9
-__func__.3530:
+	.type	__func__.3532, %object
+	.size	__func__.3532, 9
+__func__.3532:
 	.string	"FtlWrite"
 	.zero	7
-	.type	__func__.4107, %object
-	.size	__func__.4107, 15
-__func__.4107:
+	.type	__func__.4193, %object
+	.size	__func__.4193, 15
+__func__.4193:
 	.string	"FtlLoadSysInfo"
 	.zero	1
 	.type	rk_sftl_vendor_storage_fops, %object
@@ -12532,7 +13001,7 @@ power_up_flag:
 rkflash_vender_storage_dev:
 	.word	255
 	.zero	4
-	.xword	.LC110
+	.xword	.LC116
 	.xword	rk_sftl_vendor_storage_fops
 	.zero	56
 	.bss
@@ -12921,12 +13390,20 @@ g_gc_next_blk:
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
+	.zero	2
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.zero	2
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
 	.zero	2
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
-	.zero	2
+	.zero	6
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -13077,10 +13554,6 @@ g_totle_map_block:
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
 	.zero	64
-	.type	g_req_cache, %object
-	.size	g_req_cache, 8
-g_req_cache:
-	.zero	8
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -13115,11 +13588,7 @@ g_recovery_ppa_tbl:
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
-	.zero	6
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 8
-gp_last_act_superblock:
-	.zero	8
+	.zero	2
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -13140,6 +13609,10 @@ g_gc_cur_blk_max_valid_pages:
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
+	.zero	4
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
 	.zero	4
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
@@ -13170,6 +13643,18 @@ check_buf:
 	.size	check_vpc_table, 16384
 check_vpc_table:
 	.zero	16384
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 8
+gp_last_act_superblock:
+	.zero	8
 	.section	.rodata.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
@@ -13312,7 +13797,7 @@ check_vpc_table:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 .LC70:
-	.string	"SFTL version: 5.0.44 20180713"
+	.string	"SFTL version: 5.0.45 20180810"
 .LC71:
 	.string	"%s\n"
 .LC72:
@@ -13346,52 +13831,62 @@ check_vpc_table:
 .LC86:
 	.string	"%s error allocating memory. return -1\n"
 .LC87:
-	.string	"region_id = %x phyAddr = %x\n"
+	.string	"FtlMapWritePage error = %x \n"
 .LC88:
-	.string	"spare:"
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 .LC89:
-	.string	"map_ppn:"
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 .LC90:
-	.string	"FtlMapWritePage error = %x \n"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC91:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.string	"spare:"
 .LC92:
-	.string	"ftl_scan_all_data = %x\n"
+	.string	"map_ppn:"
 .LC93:
-	.string	"scan lpa = %x ppa= %x\n"
+	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
 .LC94:
-	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"ftl_scan_all_data = %x\n"
 .LC95:
-	.string	"...%s enter...\n"
+	.string	"scan lpa = %x ppa= %x\n"
 .LC96:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC97:
-	.string	"free blk vpc error %x = %x  %x\n"
+	.string	"...%s enter...\n"
 .LC98:
-	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC99:
-	.string	"FtlBbmTblFlush error:%x\n"
+	.string	"free blk vpc error %x = %x  %x\n"
 .LC100:
-	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
 .LC101:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.string	"FtlBbmTblFlush error:%x\n"
 .LC102:
-	.string	"decrement_vpc_count %x = %d\n"
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 .LC103:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 .LC104:
-	.string	"no ect"
+	.string	"decrement_vpc_count %x = %d\n"
 .LC105:
-	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.string	"decrement_vpc_count %x = %d in free list\n"
 .LC106:
-	.string	"FtlCheckVpc %x = %x  %x\n"
+	.string	"spuer block %x vpn is 0\n "
 .LC107:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 .LC108:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.string	"no ect"
 .LC109:
-	.string	"FtlWrite: lpa error:%x %x\n"
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 .LC110:
+	.string	"FtlCheckVpc %x = %x  %x\n"
+.LC111:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+.LC112:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+.LC113:
+	.string	"g_gc_superblock_free %x %x %x %x %x\n"
+.LC114:
+	.string	"FtlWrite: lpa error:%x %x\n"
+.LC115:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC116:
 	.string	"vendor_storage"
-	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
-	.section	.note.GNU-stack,"",@progbits

From 6b3dadbc641d720238e5477c3e1828ae97ab4aa1 Mon Sep 17 00:00:00 2001
From: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date: Mon, 13 Aug 2018 10:30:28 +0800
Subject: [PATCH 1049/1852] video/rockchip: rga2: Increase timeouts number and
 add error interrupt soft reset

Change-Id: I6436e73901a1b5d885be3d55ef51461564f94f29
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
---
 drivers/video/rockchip/rga2/rga2_drv.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/video/rockchip/rga2/rga2_drv.c b/drivers/video/rockchip/rga2/rga2_drv.c
index cb3ec1950cf07..c45a2bf8c6eb1 100644
--- a/drivers/video/rockchip/rga2/rga2_drv.c
+++ b/drivers/video/rockchip/rga2/rga2_drv.c
@@ -59,7 +59,7 @@
 #define RGA2_TEST_FLUSH_TIME 0
 #define RGA2_INFO_BUS_ERROR 1
 #define RGA2_POWER_OFF_DELAY	4*HZ /* 4s */
-#define RGA2_TIMEOUT_DELAY	(HZ / 10) /* 100ms */
+#define RGA2_TIMEOUT_DELAY	(HZ / 5) /* 200ms */
 #define RGA2_MAJOR		255
 #define RGA2_RESET_TIMEOUT	1000
 
@@ -908,13 +908,18 @@ static int rga2_blit_sync(rga2_session *session, struct rga2_req *req)
 		return ret;
 
 	if (rk3368)
-		ret_timeout = wait_event_timeout(session->wait, atomic_read(&session->done), RGA2_TIMEOUT_DELAY/2);
+		ret_timeout = wait_event_timeout(session->wait,
+						 atomic_read(&session->done),
+						 RGA2_TIMEOUT_DELAY / 4);
 	else
-		ret_timeout = wait_event_timeout(session->wait, atomic_read(&session->done), RGA2_TIMEOUT_DELAY);
+		ret_timeout = wait_event_timeout(session->wait,
+						 atomic_read(&session->done),
+						 RGA2_TIMEOUT_DELAY);
 
 	if (unlikely(ret_timeout< 0))
 	{
-		//pr_err("sync pid %d wait task ret %d\n", session->pid, ret_timeout);
+		pr_err("Rga sync pid %d wait task ret %d\n", session->pid,
+			ret_timeout);
 		mutex_lock(&rga2_service.lock);
 		rga2_del_running_list();
 		mutex_unlock(&rga2_service.lock);
@@ -922,7 +927,8 @@ static int rga2_blit_sync(rga2_session *session, struct rga2_req *req)
 	}
 	else if (0 == ret_timeout)
 	{
-		//pr_err("sync pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));
+		pr_err("Rga sync pid %d wait %d task done timeout\n",
+			session->pid, atomic_read(&session->task_running));
 		mutex_lock(&rga2_service.lock);
 		rga2_del_running_list_timeout();
 		rga2_try_set_reg();
@@ -1343,6 +1349,12 @@ static irqreturn_t rga2_irq_thread(int irq, void *dev_id)
 
 static irqreturn_t rga2_irq(int irq,  void *dev_id)
 {
+	/*if error interrupt then soft reset hardware*/
+	if (rga2_read(RGA2_INT) & 0x01) {
+		pr_err("Rga err irq! INT[%x],STATS[%x]\n",
+		       rga2_read(RGA2_INT), rga2_read(RGA2_STATUS));
+		rga2_soft_reset();
+	}
 	/*clear INT */
 	rga2_write(rga2_read(RGA2_INT) | (0x1<<4) | (0x1<<5) | (0x1<<6) | (0x1<<7), RGA2_INT);
 

From 7aa7928ce7112310406bdd8559f03c5c91bb6586 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Sun, 5 Feb 2017 15:55:00 +0800
Subject: [PATCH 1050/1852] UPSTREAM: drm/rockchip: cdn-dp: Move mutex_init to
 probe

We're trying to lock mutex when cdn-dp shutdown, so we need to make
sure the mutex is inited in cdn-dp's probe.

Change-Id: Id414cb9441dbaa245ef9899c7972b080fba44d6b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
(cherry picked from commit be0270e4d14656d36e76c098ebe822ca2fc34044)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index ee154a74d5cef..b4cc34c477ce0 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -1091,7 +1091,6 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->connected = false;
 	dp->active = false;
 
-	mutex_init(&dp->lock);
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
 
 	encoder = &dp->encoder;
@@ -1263,6 +1262,7 @@ static int cdn_dp_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
+	mutex_init(&dp->lock);
 	dev_set_drvdata(dev, dp);
 
 	return component_add(dev, &cdn_dp_component_ops);

From 05f80c5f8e07b443e6632aa36b9a5f4debee755e Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Sun, 5 Feb 2017 15:55:01 +0800
Subject: [PATCH 1051/1852] UPSTREAM: drm/rockchip: cdn-dp: retry to check sink
 count

Sometimes the Dock is disconnected, but cdn_dp_encoder_disable is not
triggered by DRM. For example, unplug the Dock in console mode, and
re-plug it again, the cdn_dp_event_work will try to get the sink count
of Dock, since the DP is still active. But the Dock has been powered
down, it need re-power on, and wait for a while until it is ready to
DPCD communication.

Change-Id: I59c17a7ce41d5697b33195894eaf4bb49ac85171
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
(cherry picked from commit 13e0e2069401f2692cf25eb3c7f61137b5f9902d)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 91 +++++++++++++++-----------
 drivers/gpu/drm/rockchip/cdn-dp-core.h |  1 +
 2 files changed, 52 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index b4cc34c477ce0..77b1f49c4dfba 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -197,6 +197,39 @@ static struct cdn_dp_port *cdn_dp_connected_port(struct cdn_dp_device *dp)
 	return NULL;
 }
 
+static bool cdn_dp_check_sink_connection(struct cdn_dp_device *dp)
+{
+	unsigned long timeout = jiffies + msecs_to_jiffies(CDN_DPCD_TIMEOUT_MS);
+	struct cdn_dp_port *port;
+	u8 sink_count = 0;
+
+	if (dp->active_port < 0 || dp->active_port >= dp->ports) {
+		DRM_DEV_ERROR(dp->dev, "active_port is wrong!\n");
+		return false;
+	}
+
+	port = dp->port[dp->active_port];
+
+	/*
+	 * Attempt to read sink count, retry in case the sink may not be ready.
+	 *
+	 * Sinks are *supposed* to come up within 1ms from an off state, but
+	 * some docks need more time to power up.
+	 */
+	while (time_before(jiffies, timeout)) {
+		if (!extcon_get_state(port->extcon, EXTCON_DISP_DP))
+			return false;
+
+		if (!cdn_dp_get_sink_count(dp, &sink_count))
+			return sink_count ? true : false;
+
+		usleep_range(5000, 10000);
+	}
+
+	DRM_DEV_ERROR(dp->dev, "Get sink capability timed out\n");
+	return false;
+}
+
 static enum drm_connector_status
 cdn_dp_connector_detect(struct drm_connector *connector, bool force)
 {
@@ -384,47 +417,24 @@ static int cdn_dp_firmware_init(struct cdn_dp_device *dp)
 	return cdn_dp_event_config(dp);
 }
 
-static int cdn_dp_get_sink_capability(struct cdn_dp_device *dp,
-				      struct cdn_dp_port *port,
-				      u8 *sink_count)
+static int cdn_dp_get_sink_capability(struct cdn_dp_device *dp)
 {
 	int ret;
-	unsigned long timeout = jiffies + msecs_to_jiffies(CDN_DPCD_TIMEOUT_MS);
 
-	/*
-	 * Attempt to read sink count & sink capability, retry in case the sink
-	 * may not be ready.
-	 *
-	 * Sinks are *supposed* to come up within 1ms from an off state, but
-	 * some docks need more time to power up.
-	 */
-	while (time_before(jiffies, timeout)) {
-		if (!extcon_get_state(port->extcon, EXTCON_DISP_DP))
-			return -ENODEV;
-
-		if (cdn_dp_get_sink_count(dp, sink_count)) {
-			usleep_range(5000, 10000);
-			continue;
-		}
-
-		if (!*sink_count)
-			return -ENODEV;
-
-		ret = cdn_dp_dpcd_read(dp, DP_DPCD_REV, dp->dpcd,
-				       DP_RECEIVER_CAP_SIZE);
-		if (ret) {
-			DRM_DEV_ERROR(dp->dev, "Failed to get caps %d\n", ret);
-			return ret;
-		}
+	if (!cdn_dp_check_sink_connection(dp))
+		return -ENODEV;
 
-		kfree(dp->edid);
-		dp->edid = drm_do_get_edid(&dp->connector,
-					   cdn_dp_get_edid_block, dp);
-		return 0;
+	ret = cdn_dp_dpcd_read(dp, DP_DPCD_REV, dp->dpcd,
+			       DP_RECEIVER_CAP_SIZE);
+	if (ret) {
+		DRM_DEV_ERROR(dp->dev, "Failed to get caps %d\n", ret);
+		return ret;
 	}
 
-	DRM_DEV_ERROR(dp->dev, "Get sink capability timed out\n");
-	return -ETIMEDOUT;
+	kfree(dp->edid);
+	dp->edid = drm_do_get_edid(&dp->connector,
+				   cdn_dp_get_edid_block, dp);
+	return 0;
 }
 
 static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port)
@@ -471,6 +481,7 @@ static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port)
 		goto err_power_on;
 	}
 
+	dp->active_port = port->id;
 	return 0;
 
 err_power_on:
@@ -500,6 +511,7 @@ static int cdn_dp_disable_phy(struct cdn_dp_device *dp,
 
 	port->phy_enabled = false;
 	port->lanes = 0;
+	dp->active_port = -1;
 	return 0;
 }
 
@@ -538,7 +550,6 @@ static int cdn_dp_enable(struct cdn_dp_device *dp)
 {
 	int ret, i, lanes;
 	struct cdn_dp_port *port;
-	u8 sink_count;
 
 	port = cdn_dp_connected_port(dp);
 	if (!port) {
@@ -569,8 +580,8 @@ static int cdn_dp_enable(struct cdn_dp_device *dp)
 			if (ret)
 				continue;
 
-			ret = cdn_dp_get_sink_capability(dp, port, &sink_count);
-			if (ret || (!ret && !sink_count)) {
+			ret = cdn_dp_get_sink_capability(dp);
+			if (ret) {
 				cdn_dp_disable_phy(dp, port);
 			} else {
 				dp->active = true;
@@ -989,7 +1000,6 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
 	enum drm_connector_status old_status;
 
 	int ret;
-	u8 sink_count;
 
 	mutex_lock(&dp->lock);
 
@@ -1017,7 +1027,7 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
 		}
 
 	/* Enabled and connected to a dongle without a sink, notify userspace */
-	} else if (cdn_dp_get_sink_count(dp, &sink_count) || !sink_count) {
+	} else if (!cdn_dp_check_sink_connection(dp)) {
 		DRM_DEV_INFO(dp->dev, "Connected without sink. Assert hpd\n");
 		dp->connected = false;
 
@@ -1090,6 +1100,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->drm_dev = drm_dev;
 	dp->connected = false;
 	dp->active = false;
+	dp->active_port = -1;
 
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 33bc49cc7bc8a..5c4f3c93d7ebe 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -107,6 +107,7 @@ struct cdn_dp_device {
 	struct cdn_dp_port *port[MAX_PHY];
 	u8 ports;
 	u8 lanes;
+	int active_port;
 
 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
 	bool sink_has_audio;

From e7bae5cfc680d69930e84390b25a1f3a911f5b37 Mon Sep 17 00:00:00 2001
From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Date: Mon, 20 Feb 2017 08:08:15 +0100
Subject: [PATCH 1052/1852] UPSTREAM: drm/rockchip: cdn-dp: Fix error handling

It is likely that both 'clk_disable_unprepare()' should be called if
'pm_runtime_get_sync()' fails.

Add a new label for that, because 'err_set_rate' is not meaningful in this
case.

Add a missing call to 'pm_runtime_put()'.

Fixes: 1a0f7ed3abe2 ("drm/rockchip: cdn-dp: add cdn DP support for rk3399")

Change-Id: I30bae900a98fe7159728043aa9321d7d5f9573ec
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170220070815.23096-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit efe0220fc2d2cc1cbd6c663dd3d652ac2b9afd1a)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 77b1f49c4dfba..7e311776dbf8b 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -111,7 +111,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
 	ret = pm_runtime_get_sync(dp->dev);
 	if (ret < 0) {
 		DRM_DEV_ERROR(dp->dev, "cannot get pm runtime %d\n", ret);
-		goto err_pclk;
+		goto err_pm_runtime_get;
 	}
 
 	reset_control_assert(dp->core_rst);
@@ -133,6 +133,8 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
 	return 0;
 
 err_set_rate:
+	pm_runtime_put(dp->dev);
+err_pm_runtime_get:
 	clk_disable_unprepare(dp->core_clk);
 err_core_clk:
 	clk_disable_unprepare(dp->pclk);

From 6baeead38c6571276bdcf07f2ace2c52383f2e65 Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Wed, 8 Mar 2017 10:27:55 +0800
Subject: [PATCH 1053/1852] UPSTREAM: drm/rockchip: cdn-dp: return error code
 when clk_get_rate failed

The clk_get_rate return 0 if something goes wrong, so it can never be
less then zero, the ret should be set a error code, otherwise the
cdn_dp_clk_enable will return 0 when it failed at clk_get_rate.
In addition, clk_get_rate() returns an "unsigned long", so use
"unsigned long" instead of "u32" is better.

Change-Id: I0da9a07b5b9fda5f1586e8179013739d47d7ea35
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-2-git-send-email-zyw@rock-chips.com
(cherry picked from commit a68b5bb6708e73d58b30680421df8166898e5cfc)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++--
 drivers/gpu/drm/rockchip/cdn-dp-reg.c  | 2 +-
 drivers/gpu/drm/rockchip/cdn-dp-reg.h  | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 7e311776dbf8b..67b79b7f85235 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -94,7 +94,7 @@ static int cdn_dp_grf_write(struct cdn_dp_device *dp,
 static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
 {
 	int ret;
-	u32 rate;
+	unsigned long rate;
 
 	ret = clk_prepare_enable(dp->pclk);
 	if (ret < 0) {
@@ -123,7 +123,8 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
 
 	rate = clk_get_rate(dp->core_clk);
 	if (!rate) {
-		DRM_DEV_ERROR(dp->dev, "get clk rate failed: %d\n", rate);
+		DRM_DEV_ERROR(dp->dev, "get clk rate failed\n");
+		ret = -EINVAL;
 		goto err_set_rate;
 	}
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index 3a5b8a4aa1e7a..b8e1a0f9754d1 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -29,7 +29,7 @@
 #define LINK_TRAINING_RETRY_MS		20
 #define LINK_TRAINING_TIMEOUT_MS	500
 
-void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, u32 clk)
+void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk)
 {
 	writel(clk / 1000000, dp->regs + SW_CLK_H);
 }
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 4d5ba9f1d18a3..415f6f87e9f88 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -462,7 +462,7 @@ enum vic_bt_type {
 
 void cdn_dp_clock_reset(struct cdn_dp_device *dp);
 
-void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, u32 clk);
+void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk);
 int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem,
 			 u32 i_size, const u32 *d_mem, u32 d_size);
 int cdn_dp_set_firmware_active(struct cdn_dp_device *dp, bool enable);

From e54ce9355e187c80256b3ee012cdc543ac93ed3e Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Wed, 8 Mar 2017 10:27:56 +0800
Subject: [PATCH 1054/1852] UPSTREAM: drm/rockchip: cdn-dp: Correct PHY
 register address

Correct some DP register address for PHY Configuration according to
latest datasheet.

Change-Id: If0f0014930d70a1badadea732148effb5145fbdb
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-3-git-send-email-zyw@rock-chips.com
(cherry picked from commit 05c00c2f196757cd59d5738ec4d02e365cf9e7a0)
---
 drivers/gpu/drm/rockchip/cdn-dp-reg.h | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 415f6f87e9f88..9abdc7416e4c5 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -121,12 +121,11 @@
 
 /* dptx phy addr */
 #define DP_TX_PHY_CONFIG_REG		0x2000
-#define DP_TX_PHY_STATUS_REG		0x2004
-#define DP_TX_PHY_SW_RESET		0x2008
-#define DP_TX_PHY_SCRAMBLER_SEED	0x200c
-#define DP_TX_PHY_TRAINING_01_04	0x2010
-#define DP_TX_PHY_TRAINING_05_08	0x2014
-#define DP_TX_PHY_TRAINING_09_10	0x2018
+#define DP_TX_PHY_SW_RESET		0x2004
+#define DP_TX_PHY_SCRAMBLER_SEED	0x2008
+#define DP_TX_PHY_TRAINING_01_04	0x200c
+#define DP_TX_PHY_TRAINING_05_08	0x2010
+#define DP_TX_PHY_TRAINING_09_10	0x2014
 #define TEST_COR			0x23fc
 
 /* dptx hpd addr */

From 6183aa86a76c6c5c4c21025177b8dae05fb5581d Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Wed, 8 Mar 2017 10:27:57 +0800
Subject: [PATCH 1055/1852] UPSTREAM: drm/rockchip: cdn-dp: add more log for
 video config

In order to analyze some video config failed, add some useful
printouts.

Change-Id: Icd16bb1d065b33163b6f0ce0d99c2a63d77cc915
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-4-git-send-email-zyw@rock-chips.com
(cherry picked from commit 9346ab7d72c0e0526bd9cea70fa4ad768fe27c20)
---
 drivers/gpu/drm/rockchip/cdn-dp-reg.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index b8e1a0f9754d1..32c725ca9976f 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -671,6 +671,10 @@ int cdn_dp_config_video(struct cdn_dp_device *dp)
 		rem = do_div(symbol, 1000);
 		if (tu_size_reg > 64) {
 			ret = -EINVAL;
+			DRM_DEV_ERROR(dp->dev,
+				      "tu error, clk:%d, lanes:%d, rate:%d\n",
+				      mode->clock, dp->link.num_lanes,
+				      link_rate);
 			goto err_config_video;
 		}
 	} while ((symbol <= 1) || (tu_size_reg - symbol < 4) ||

From 550a36238ec353970f3231f75c325260743e6d17 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 14 Aug 2018 16:44:55 +0800
Subject: [PATCH 1056/1852] dt-bindings: rkflash: add assigned-clock-frequency
 property for sfc

Change-Id: I5a9f1e0c850b57459b8f3c03668fb97f1ed8a18f
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 Documentation/devicetree/bindings/rkflash/sfc.txt | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/rkflash/sfc.txt b/Documentation/devicetree/bindings/rkflash/sfc.txt
index d8e69d76d77be..e5c2ab1534702 100644
--- a/Documentation/devicetree/bindings/rkflash/sfc.txt
+++ b/Documentation/devicetree/bindings/rkflash/sfc.txt
@@ -5,9 +5,11 @@ Required properties:
 - reg : shall contain registers location and length for data and reg.
 - interrupts : shall define the nand controller interrupt.
 - clocks : shall reference sfc controller clocks.
-- clock-names : nand controller internal clock names. Shall contain :
+- clock-names : sfc controller internal clock names. Shall contain :
     * "clk_sfc" : sfc controller clock
     * "hclk_sfc" : sfc ahb clock gate
+- assigned-clocks : sclk preset by dts
+- assigned-clock-frequency : sclk frequency, io clk = sclk/2;
 
 Examples:
 sfc: sfc@301c0000 {
@@ -16,5 +18,7 @@ sfc: sfc@301c0000 {
 	interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 	clocks = <&clk_sfc>, <&clk_gates15 10>;
 	clock-names = "clk_sfc", "hclk_sfc";
+	assigned-clocks = <&cru SCLK_SFC>;
+	assigned-clock-frequency = <100000000>;
 	status = "okay";
 };

From e2b7b7920bf8b7c611f96a69978a64de5351ab91 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 14 Aug 2018 16:49:45 +0800
Subject: [PATCH 1057/1852] arm64: dts: rockchip: rk3308: set sfc clock
 frequency by assigned-clocks

Change-Id: I2165b06002ca837db19ccb60b5b9d704c6f1f996
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 61628a3013e95..6a301a19ec52f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -1039,6 +1039,8 @@
 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
 		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;
+		assigned-clock-rates = <100000000>;
 		status = "disabled";
 	};
 

From 0cb6f470dca83e995683aef59cc391c55c96425f Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Tue, 14 Aug 2018 16:51:35 +0800
Subject: [PATCH 1058/1852] drivers: rkflash: support setting sfc clk by dts

1.Max sfc sclk frequency 150MHz, io clk 75MHz;
2,Set sclk depends on dts setting.

Change-Id: I52ac3bd1359cef2198806f88887fc8eb0a383eba
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rksfc_base.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 68394638e2ad2..fba90981a1aa0 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -21,8 +21,8 @@
 #include "rkflash_api.h"
 #include "rkflash_blk.h"
 
-#define RKSFC_VERSION_AND_DATE  "rksfc_base v1.1 2016-01-08"
-#define	RKSFC_CLK_SET_RATE	(100 * 1000 * 1000)
+#define RKSFC_VERSION_AND_DATE	"rksfc_base v1.1 2016-01-08"
+#define RKSFC_CLK_MAX_RATE	(150 * 1000 * 1000)
 
 struct rksfc_info {
 	void __iomem	*reg_base;
@@ -138,8 +138,11 @@ static int rksfc_probe(struct platform_device *pdev)
 		return -1;
 	}
 	clk_prepare_enable(g_sfc_info.ahb_clk);
-	clk_set_rate(g_sfc_info.clk, RKSFC_CLK_SET_RATE);
 	g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
+	if (g_sfc_info.clk_rate > RKSFC_CLK_MAX_RATE) {
+		clk_set_rate(g_sfc_info.clk, RKSFC_CLK_MAX_RATE);
+		g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
+	}
 	clk_prepare_enable(g_sfc_info.clk);
 	dev_info(&pdev->dev,
 		 "%s clk rate = %d\n",

From 2d4bfd7f2cbe9bda6aa74113860bb9fa58f46b9a Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Mon, 23 Jan 2017 14:18:11 +0800
Subject: [PATCH 1059/1852] BACKPORT: drm/rockchip: cdn-dp: don't configure
 hardware in mode_set

With atomic modesetting the hardware will be powered off when the
mode_set function is called.  We should configure the hardware in the
enable function.

backport: merge output_mode change from Mark yao efd11cc8fa1a
("drm/rockchip: Correct vop out_mode configure")

Change-Id: Ic68911e7faa24b2e482448346585e3f7c19da1a6
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit ef1844b7ed847430955a95d20242f0d1b9f5fa64)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 44 +++++++++++---------------
 1 file changed, 19 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 67b79b7f85235..6f1f948a078c3 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -605,9 +605,7 @@ static void cdn_dp_encoder_mode_set(struct drm_encoder *encoder,
 {
 	struct cdn_dp_device *dp = encoder_to_dp(encoder);
 	struct drm_display_info *display_info = &dp->connector.display_info;
-	struct rockchip_crtc_state *state;
 	struct video_info *video = &dp->video_info;
-	int ret, val;
 
 	switch (display_info->bpc) {
 	case 10:
@@ -622,31 +620,9 @@ static void cdn_dp_encoder_mode_set(struct drm_encoder *encoder,
 	}
 
 	video->color_fmt = PXL_RGB;
-
 	video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
 	video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
 
-	ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
-	if (ret < 0) {
-		DRM_DEV_ERROR(dp->dev, "Could not get vop id, %d", ret);
-		return;
-	}
-
-	DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n",
-			  (ret) ? "LIT" : "BIG");
-	state = to_rockchip_crtc_state(encoder->crtc->state);
-	if (ret) {
-		val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16);
-		state->output_mode = ROCKCHIP_OUT_MODE_P888;
-	} else {
-		val = DP_SEL_VOP_LIT << 16;
-		state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
-	}
-
-	ret = cdn_dp_grf_write(dp, GRF_SOC_CON9, val);
-	if (ret)
-		return;
-
 	memcpy(&dp->mode, adjusted, sizeof(*mode));
 }
 
@@ -672,9 +648,27 @@ static bool cdn_dp_check_link_status(struct cdn_dp_device *dp)
 static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
 {
 	struct cdn_dp_device *dp = encoder_to_dp(encoder);
-	int ret;
+	int ret, val;
+
+	ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dp->dev, "Could not get vop id, %d", ret);
+		return;
+	}
+
+	DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n",
+			  (ret) ? "LIT" : "BIG");
+	if (ret)
+		val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16);
+	else
+		val = DP_SEL_VOP_LIT << 16;
+
+	ret = cdn_dp_grf_write(dp, GRF_SOC_CON9, val);
+	if (ret)
+		return;
 
 	mutex_lock(&dp->lock);
+
 	ret = cdn_dp_enable(dp);
 	if (ret) {
 		DRM_DEV_ERROR(dp->dev, "Failed to enable encoder %d\n",

From de39016b61ca551a7647bfd70816779d73f69b40 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Thu, 6 Apr 2017 20:31:18 +0800
Subject: [PATCH 1060/1852] UPSTREAM: drm/rockchip: cdn-dp: Don't try to
 release firmware when not loaded

Change-Id: I4b4c857f31c7dfa5e1c2ba5c9d4d345bb3e6331c
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-6-git-send-email-jeffy.chen@rock-chips.com
(cherry picked from commit 54bd16780e2b7bcbe7096baab94e2454686f0941)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 6f1f948a078c3..a537782389fa8 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -1098,6 +1098,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->connected = false;
 	dp->active = false;
 	dp->active_port = -1;
+	dp->fw_loaded = false;
 
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
 
@@ -1187,7 +1188,8 @@ static void cdn_dp_unbind(struct device *dev, struct device *master, void *data)
 	connector->funcs->destroy(connector);
 
 	pm_runtime_disable(dev);
-	release_firmware(dp->fw);
+	if (dp->fw_loaded)
+		release_firmware(dp->fw);
 	kfree(dp->edid);
 	dp->edid = NULL;
 }

From 9d0cc007b0fa4c537f960d4630c923ef94297ce0 Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <garsilva@embeddedor.com>
Date: Thu, 6 Jul 2017 16:58:33 -0500
Subject: [PATCH 1061/1852] UPSTREAM: drm/rockchip: fix NULL check on
 devm_kzalloc() return value

The right variable to check here is port, not dp.

This issue was detected using Coccinelle and the following semantic patch:

@@
expression x;
identifier fld;
@@

* x = devm_kzalloc(...);
  ... when != x == NULL
  x->fld

Change-Id: Iba535170f6ba6e8b6e3f53e898a79957e753229c
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170706215833.GA25411@embeddedgus
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 6f6e0b217a93011f8e11b9a2d5521a08fcf36990)
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index a537782389fa8..5eb7a23d547f5 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -1257,7 +1257,7 @@ static int cdn_dp_probe(struct platform_device *pdev)
 			continue;
 
 		port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
-		if (!dp)
+		if (!port)
 			return -ENOMEM;
 
 		port->extcon = extcon;

From 910c09c1e1eedc8736bf1b3203c727ea09adf56e Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed, 30 Mar 2016 11:45:14 +0200
Subject: [PATCH 1062/1852] UPSTREAM: drm/sysfs: Nuke TV/DVI property files

This goes all the way back to the original KMS commit aeons ago

commit f453ba0460742ad027ae0c4c7d61e62817b3e7ef
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Nov 7 14:05:41 2008 -0800

    DRM: add mode setting support

But it seems to be completely unused. Only i915 and nouveau even
register these properties, and the corresponding DDX don't even look
at them. Also the sysfs files are read-only, so not useful to
configure anything.

I suspect that this was added with the goal to have read-only access
to all properties in sysfs, but we never followed through on that.
Also, that should be done in a more generic fashion.

Since it would be real work to fix up the locking (with atomic we're
now chasing pointers when reading properties) and it seems unused lets
just nuke this all. It's easier. Of course we'll keep the properties
themselves, those are still exposed through the KMS ioctls.

Change-Id: I35a54c6850127287de0c3f82cafb084900d76b97
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459331120-27864-5-git-send-email-daniel.vetter@ffwll.ch
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit aa2e2996b1518b3e4b72dab5c2cb6cd082e3002e)
---
 drivers/gpu/drm/drm_sysfs.c | 156 ------------------------------------
 1 file changed, 156 deletions(-)

diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 3567aaf899951..bcd15272b458b 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -390,102 +390,6 @@ static ssize_t mode_show(struct device *device,
 	return written;
 }
 
-static ssize_t tv_subconnector_show(struct device *device,
-				    struct device_attribute *attr,
-				    char *buf)
-{
-	struct drm_connector *connector = to_drm_connector(device);
-	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
-	uint64_t subconnector;
-	int ret;
-
-	prop = dev->mode_config.tv_subconnector_property;
-	if (!prop) {
-		DRM_ERROR("Unable to find subconnector property\n");
-		return 0;
-	}
-
-	ret = drm_object_property_get_value(&connector->base, prop, &subconnector);
-	if (ret)
-		return 0;
-
-	return snprintf(buf, PAGE_SIZE, "%s",
-			drm_get_tv_subconnector_name((int)subconnector));
-}
-
-static ssize_t tv_select_subconnector_show(struct device *device,
-					   struct device_attribute *attr,
-					   char *buf)
-{
-	struct drm_connector *connector = to_drm_connector(device);
-	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
-	uint64_t subconnector;
-	int ret;
-
-	prop = dev->mode_config.tv_select_subconnector_property;
-	if (!prop) {
-		DRM_ERROR("Unable to find select subconnector property\n");
-		return 0;
-	}
-
-	ret = drm_object_property_get_value(&connector->base, prop, &subconnector);
-	if (ret)
-		return 0;
-
-	return snprintf(buf, PAGE_SIZE, "%s",
-			drm_get_tv_select_name((int)subconnector));
-}
-
-static ssize_t dvii_subconnector_show(struct device *device,
-				      struct device_attribute *attr,
-				      char *buf)
-{
-	struct drm_connector *connector = to_drm_connector(device);
-	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
-	uint64_t subconnector;
-	int ret;
-
-	prop = dev->mode_config.dvi_i_subconnector_property;
-	if (!prop) {
-		DRM_ERROR("Unable to find subconnector property\n");
-		return 0;
-	}
-
-	ret = drm_object_property_get_value(&connector->base, prop, &subconnector);
-	if (ret)
-		return 0;
-
-	return snprintf(buf, PAGE_SIZE, "%s",
-			drm_get_dvi_i_subconnector_name((int)subconnector));
-}
-
-static ssize_t dvii_select_subconnector_show(struct device *device,
-					     struct device_attribute *attr,
-					     char *buf)
-{
-	struct drm_connector *connector = to_drm_connector(device);
-	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
-	uint64_t subconnector;
-	int ret;
-
-	prop = dev->mode_config.dvi_i_select_subconnector_property;
-	if (!prop) {
-		DRM_ERROR("Unable to find select subconnector property\n");
-		return 0;
-	}
-
-	ret = drm_object_property_get_value(&connector->base, prop, &subconnector);
-	if (ret)
-		return 0;
-
-	return snprintf(buf, PAGE_SIZE, "%s",
-			drm_get_dvi_i_select_name((int)subconnector));
-}
-
 static DEVICE_ATTR_RW(status);
 static DEVICE_ATTR_RO(enabled);
 static DEVICE_ATTR_RO(dpms);
@@ -503,54 +407,6 @@ static struct attribute *connector_dev_attrs[] = {
 	NULL
 };
 
-static DEVICE_ATTR_RO(tv_subconnector);
-static DEVICE_ATTR_RO(tv_select_subconnector);
-
-static struct attribute *connector_tv_dev_attrs[] = {
-	&dev_attr_tv_subconnector.attr,
-	&dev_attr_tv_select_subconnector.attr,
-	NULL
-};
-
-static DEVICE_ATTR_RO(dvii_subconnector);
-static DEVICE_ATTR_RO(dvii_select_subconnector);
-
-static struct attribute *connector_dvii_dev_attrs[] = {
-	&dev_attr_dvii_subconnector.attr,
-	&dev_attr_dvii_select_subconnector.attr,
-	NULL
-};
-
-/* Connector type related helpers */
-static int kobj_connector_type(struct kobject *kobj)
-{
-	struct device *dev = kobj_to_dev(kobj);
-	struct drm_connector *connector = to_drm_connector(dev);
-
-	return connector->connector_type;
-}
-
-static umode_t connector_is_dvii(struct kobject *kobj,
-				 struct attribute *attr, int idx)
-{
-	return kobj_connector_type(kobj) == DRM_MODE_CONNECTOR_DVII ?
-		attr->mode : 0;
-}
-
-static umode_t connector_is_tv(struct kobject *kobj,
-			       struct attribute *attr, int idx)
-{
-	switch (kobj_connector_type(kobj)) {
-	case DRM_MODE_CONNECTOR_Composite:
-	case DRM_MODE_CONNECTOR_SVIDEO:
-	case DRM_MODE_CONNECTOR_Component:
-	case DRM_MODE_CONNECTOR_TV:
-		return attr->mode;
-	}
-
-	return 0;
-}
-
 static struct bin_attribute edid_attr = {
 	.attr.name = "edid",
 	.attr.mode = 0444,
@@ -568,20 +424,8 @@ static const struct attribute_group connector_dev_group = {
 	.bin_attrs = connector_bin_attrs,
 };
 
-static const struct attribute_group connector_tv_dev_group = {
-	.attrs = connector_tv_dev_attrs,
-	.is_visible = connector_is_tv,
-};
-
-static const struct attribute_group connector_dvii_dev_group = {
-	.attrs = connector_dvii_dev_attrs,
-	.is_visible = connector_is_dvii,
-};
-
 static const struct attribute_group *connector_dev_groups[] = {
 	&connector_dev_group,
-	&connector_tv_dev_group,
-	&connector_dvii_dev_group,
 	NULL
 };
 

From 90c6c26e860d98bc6f2a8f3d1c2a71c042c0cd96 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 15 Aug 2018 09:22:00 +0800
Subject: [PATCH 1063/1852] video: rockchip: vpu: Implement get_dev_status()

This patch fixes NULL pointer when show load.

Fixes: 5bc582df48e4 ("video: rockchip: vpu: Add devfreq feature")
Change-Id: Ib0471cc3cd3b402c4207245c7b01283740bb2392
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/video/rockchip/vcodec/vcodec_service.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index 0f177d9ab4c24..9c5fac22011e3 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -3187,9 +3187,16 @@ static int devfreq_vcodec_get_cur_freq(struct device *dev,
 	return 0;
 }
 
+static int devfreq_vcodec_get_dev_status(struct device *dev,
+					 struct devfreq_dev_status *stat)
+{
+	return 0;
+}
+
 static struct devfreq_dev_profile devfreq_vcodec_profile = {
 	.target		= devfreq_vcodec_target,
 	.get_cur_freq	= devfreq_vcodec_get_cur_freq,
+	.get_dev_status	= devfreq_vcodec_get_dev_status,
 };
 
 static unsigned long model_static_power(struct devfreq *devfreq,

From 46fe16334858cd718a85aa176a56206b38b9d166 Mon Sep 17 00:00:00 2001
From: Xiaotan Luo <lxt@rock-chips.com>
Date: Tue, 14 Aug 2018 19:16:53 -0700
Subject: [PATCH 1064/1852] ASoC: codecs: add tas5731 amplifiers

Change-Id: I3afb278de50bd3087ef230bb72f5ed46bdfd0ec4
Signed-off-by: Xiaotan Luo <lxt@rock-chips.com>
---
 sound/soc/codecs/Kconfig   |  2 +-
 sound/soc/codecs/tas571x.c | 64 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index b0bc586c41187..9a95b8b5ad8f4 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -740,7 +740,7 @@ config SND_SOC_TAS5086
 	depends on I2C
 
 config SND_SOC_TAS571X
-	tristate "Texas Instruments TAS5711/TAS5717/TAS5719 power amplifiers"
+	tristate "Texas Instruments TAS5711/TAS5717/TAS5719/TAS5731 power amplifiers"
 	depends on I2C
 
 config SND_SOC_TC358749X
diff --git a/sound/soc/codecs/tas571x.c b/sound/soc/codecs/tas571x.c
index 39307ad41a34f..ffae7747b224a 100644
--- a/sound/soc/codecs/tas571x.c
+++ b/sound/soc/codecs/tas571x.c
@@ -326,6 +326,68 @@ static const struct tas571x_chip tas5717_chip = {
 	.vol_reg_size			= 2,
 };
 
+static const char *const tas5731_supply_names[] = {
+	"AVDD",
+	"DVDD",
+	"PVDD_A",
+	"PVDD_B",
+	"PVDD_C",
+	"PVDD_D",
+};
+
+static const DECLARE_TLV_DB_SCALE(tas5731_volume_tlv, -10350, 50, 1);
+
+static const struct snd_kcontrol_new tas5731_controls[] = {
+	SOC_SINGLE_TLV("Master Volume",
+		       TAS571X_MVOL_REG,
+		       0, 0xff, 1, tas5731_volume_tlv),
+	SOC_DOUBLE_R_TLV("Speaker Volume",
+			 TAS571X_CH1_VOL_REG,
+			 TAS571X_CH2_VOL_REG,
+			 0, 0xff, 1, tas5731_volume_tlv),
+	SOC_DOUBLE("Speaker Switch",
+		   TAS571X_SOFT_MUTE_REG,
+		   TAS571X_SOFT_MUTE_CH1_SHIFT, TAS571X_SOFT_MUTE_CH2_SHIFT,
+		   1, 1),
+};
+
+static const struct reg_default tas5731_reg_defaults[] = {
+	{ 0x1B, 0x00 },
+	{ 0x04, 0x03 },
+	{ 0x05, 0x00 },
+	{ 0x06, 0x00 },
+	{ 0x07, 0x46 },
+	{ 0x08, 0x20 },
+	{ 0x09, 0x20 },
+	{ 0x0A, 0x20 },
+	{ 0x10, 0x07 },
+	{ 0x11, 0xB8 },
+	{ 0x12, 0x60 },
+	{ 0x13, 0xA0 },
+	{ 0x14, 0x48 },
+	{ 0x1A, 0x8f },
+};
+
+static const struct regmap_config tas5731_regmap_config = {
+	.reg_bits			= 8,
+	.val_bits			= 32,
+	.max_register			= 0xff,
+	.reg_read			= tas571x_reg_read,
+	.reg_write			= tas571x_reg_write,
+	.reg_defaults			= tas5731_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tas5731_reg_defaults),
+	.cache_type			= REGCACHE_RBTREE,
+};
+
+static const struct tas571x_chip tas5731_chip = {
+	.supply_names			= tas5731_supply_names,
+	.num_supply_names		= ARRAY_SIZE(tas5731_supply_names),
+	.controls			= tas5731_controls,
+	.num_controls			= ARRAY_SIZE(tas5731_controls),
+	.regmap_config			= &tas5731_regmap_config,
+	.vol_reg_size			= 1,
+};
+
 static const struct snd_soc_dapm_widget tas571x_dapm_widgets[] = {
 	SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0),
 	SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0),
@@ -486,6 +548,7 @@ static const struct of_device_id tas571x_of_match[] = {
 	{ .compatible = "ti,tas5711", .data = &tas5711_chip, },
 	{ .compatible = "ti,tas5717", .data = &tas5717_chip, },
 	{ .compatible = "ti,tas5719", .data = &tas5717_chip, },
+	{ .compatible = "ti,tas5731", .data = &tas5731_chip, },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, tas571x_of_match);
@@ -494,6 +557,7 @@ static const struct i2c_device_id tas571x_i2c_id[] = {
 	{ "tas5711", 0 },
 	{ "tas5717", 0 },
 	{ "tas5719", 0 },
+	{ "tas5731", 0 },
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, tas571x_i2c_id);

From f7e175483f3b0de30aa1a04188fe2ab3fdb9a63d Mon Sep 17 00:00:00 2001
From: Xiaotan Luo <lxt@rock-chips.com>
Date: Tue, 14 Aug 2018 19:18:19 -0700
Subject: [PATCH 1065/1852] dt-bindings: add for tas5731 amplifiers

Change-Id: I777d3fd99602f4733d343b1b8a582dc44c5eaf77
Signed-off-by: Xiaotan Luo <lxt@rock-chips.com>
---
 Documentation/devicetree/bindings/sound/tas571x.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/tas571x.txt b/Documentation/devicetree/bindings/sound/tas571x.txt
index 0ac31d8d5ac46..b820370bce627 100644
--- a/Documentation/devicetree/bindings/sound/tas571x.txt
+++ b/Documentation/devicetree/bindings/sound/tas571x.txt
@@ -1,4 +1,4 @@
-Texas Instruments TAS5711/TAS5717/TAS5719 stereo power amplifiers
+Texas Instruments TAS5711/TAS5717/TAS5719/TAS5731 stereo power amplifiers
 
 The codec is controlled through an I2C interface.  It also has two other
 signals that can be wired up to GPIOs: reset (strongly recommended), and
@@ -6,7 +6,7 @@ powerdown (optional).
 
 Required properties:
 
-- compatible: "ti,tas5711", "ti,tas5717", or "ti,tas5719"
+- compatible: "ti,tas5711", "ti,tas5717", "ti,tas5719", or "ti,tas5731"
 - reg: The I2C address of the device
 - #sound-dai-cells: must be equal to 0
 

From bc3e1003745792f28f3c9c3c86ae76b9f97e2ee9 Mon Sep 17 00:00:00 2001
From: Xiaotan Luo <lxt@rock-chips.com>
Date: Tue, 14 Aug 2018 19:19:49 -0700
Subject: [PATCH 1066/1852] arm64: rk3308_linux_defconfig: add tas5731

Change-Id: I260673444024ad3d7f250bcb4be0e88106594ba5
Signed-off-by: Xiaotan Luo <lxt@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index 949b52132c74e..e5eac3b5654e9 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -168,6 +168,7 @@ CONFIG_SND_SOC_ROCKCHIP_VAD=y
 CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y
 CONFIG_SND_SOC_DUMMY_CODEC=y
 CONFIG_SND_SOC_RK3308=y
+CONFIG_SND_SOC_TAS571X=y
 CONFIG_SND_SIMPLE_CARD=y
 # CONFIG_HID_GENERIC is not set
 CONFIG_USB_DWC2=y

From db6844b02c7f0958309a93ae0eb98cd566be5e76 Mon Sep 17 00:00:00 2001
From: Xiaotan Luo <lxt@rock-chips.com>
Date: Tue, 14 Aug 2018 19:22:02 -0700
Subject: [PATCH 1067/1852] arm64: dts: rk3308-evb-v11: add tas5731 sound

Change-Id: Iaae192f89119875885e2bf649365ad8bac0972e8
Signed-off-by: Xiaotan Luo <lxt@rock-chips.com>
---
 .../boot/dts/rockchip/rk3308-evb-v11.dtsi     | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 68483830fb532..8028d5f094ce8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -132,6 +132,20 @@
 		};
 	};
 
+	tas5731_sound: tas5731-sound {
+		status = "disabled";
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,tas5731";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_8ch_1>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&tas5731>;
+		};
+	};
+
 	vdd_core: vdd-core {
 		compatible = "pwm-regulator";
 		pwms = <&pwm0 0 5000 1>;
@@ -335,6 +349,18 @@
 	clock-frequency = <400000>;
 	status = "okay";
 
+	tas5731: tas5731@1a {
+		#sound-dai-cells = <0>;
+		compatible = "ti,tas5731";
+		reg = <0x1a>;
+		clocks = <&cru SCLK_I2S1_8CH_TX_OUT>;
+		clock-names = "mclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s_8ch_1_m0_mclk>;
+		pdn-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>;
+	};
+
 	is31fl3236: led-controller@3c {
 		compatible = "issi,is31fl3236";
 		reg = <0x3c>;
@@ -669,6 +695,16 @@
 	};
 };
 
+&i2s_8ch_1 {
+	status = "disabled";
+	#sound-dai-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2s_8ch_1_m0_sclktx
+		     &i2s_8ch_1_m0_lrcktx
+		     &i2s_8ch_1_m0_sdo0
+		     &i2s_8ch_1_m0_mclk>;
+};
+
 &i2s_8ch_2 {
 	status = "okay";
 };

From 56deb1fc9410f608c1f8d237cbecbcda22669f3b Mon Sep 17 00:00:00 2001
From: Ziyuan Xu <xzy.xu@rock-chips.com>
Date: Wed, 26 Oct 2016 16:10:56 +0800
Subject: [PATCH 1068/1852] CHROMIUM: drm/rockchip: cdn-dp: add hdcp_key node

Provide the "hdcp_key" debug node in sysfs, so that userspace can pass
the legitimate HDCP key to driver.

For ATF security, we should transmit HDCP key data via smc argument one
by one.

Moreover, driver request one page SRAM space as share memory for HDCP
key transmission.

BUG=chrome-os-partner:56883
TEST=WITH HDCP KEY SITUATION:
	1.flash encrypt key to vpd area, and reboot chromebook.
	$ vpd -O; vpd -s hdcp_key_v1_4=something...; dump_vpd_log
	--force
	2.write key to DP driver.
	$ grep hdcp_key /var/cache/vpd/full-v2.txt | cut -s -d \" -f 4 |
	tr -d "\n" > /sys/devices/platform/fec00000.dp/hdcp_key

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/403972
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I0b97dcf938623685b6938d8a40285fac3b1d5045
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 71 ++++++++++++++++++++++++++
 drivers/gpu/drm/rockchip/cdn-dp-core.h | 18 +++++++
 2 files changed, 89 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 5eb7a23d547f5..8295722fc1e34 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -19,14 +19,17 @@
 #include <drm/drm_edid.h>
 #include <drm/drm_of.h>
 
+#include <linux/arm-smccc.h>
 #include <linux/clk.h>
 #include <linux/component.h>
+#include <linux/crc16.h>
 #include <linux/extcon.h>
 #include <linux/firmware.h>
 #include <linux/hdmi-notifier.h>
 #include <linux/regmap.h>
 #include <linux/reset.h>
 #include <linux/mfd/syscon.h>
+#include <linux/nvmem-consumer.h>
 #include <linux/phy/phy.h>
 #include <uapi/linux/videodev2.h>
 
@@ -36,6 +39,11 @@
 #include "cdn-dp-reg.h"
 #include "rockchip_drm_vop.h"
 
+#define HDCP_KEY_DATA_START_TRANSFER	0
+#define HDCP_KEY_DATA_START_DECRYPT	1
+
+#define RK_SIP_HDCP_CONTROL		0x82000009
+
 #define connector_to_dp(c) \
 		container_of(c, struct cdn_dp_device, connector)
 
@@ -1199,6 +1207,67 @@ static const struct component_ops cdn_dp_component_ops = {
 	.unbind = cdn_dp_unbind,
 };
 
+static ssize_t hdcp_key_store(struct device *dev,
+				      struct device_attribute *attr,
+				      const char *buf, size_t count)
+{
+	struct nvmem_cell *cell;
+	struct cdn_dp_device *dp = dev_get_drvdata(dev);
+	u8 *cpu_id;
+	int ret;
+	size_t len;
+
+	/*
+	 * The HDCP Key format should look like this: "12345678...",
+	 * every two characters stand for a byte, so the total key size
+	 * would be (308 * 2) byte.
+	 */
+	if (count != (CDN_DP_HDCP_KEY_LEN * 2)) {
+		dev_err(dev, "mis-match hdcp cipher length\n");
+		return -EINVAL;
+	}
+
+	cell = nvmem_cell_get(dev, "cpu-id");
+	if (IS_ERR(cell)) {
+		dev_err(dev, "missing cpu-id nvmen cell property\n");
+		return -ENODEV;
+	}
+
+	cpu_id = (u8 *)nvmem_cell_read(cell, &len);
+	nvmem_cell_put(cell);
+
+	if (IS_ERR(cpu_id))
+		return PTR_ERR(cpu_id);
+
+	if (len != CDN_DP_HDCP_UID_LEN) {
+		dev_err(dev, "mismatch cpu-id size\n");
+		ret = -EINVAL;
+		goto err;
+	}
+
+	/*
+	 * The format of input HDCP Key should be "12345678...".
+	 * there is no standard format for HDCP keys, so it is
+	 * just made up for this driver.
+	 *
+	 * The "ksv & device_key & sha" should parsed from input data
+	 * buffer, and the "seed" would take the crc16 of cpu uid.
+	 */
+	ret = hex2bin((u8 *)&dp->key, buf, CDN_DP_HDCP_KEY_LEN);
+	if (ret) {
+		dev_err(dev, "failed to decode the input HDCP key format\n");
+		goto err;
+	}
+
+	memcpy(dp->key.uid, cpu_id, CDN_DP_HDCP_UID_LEN);
+	dp->key.seed = crc16(0xffff, cpu_id, 16);
+	ret = count;
+err:
+	kfree(cpu_id);
+	return ret;
+}
+static DEVICE_ATTR(hdcp_key, S_IWUSR, NULL, hdcp_key_store);
+
 static int cdn_dp_suspend(struct device *dev)
 {
 	struct cdn_dp_device *dp = dev_get_drvdata(dev);
@@ -1275,6 +1344,8 @@ static int cdn_dp_probe(struct platform_device *pdev)
 	mutex_init(&dp->lock);
 	dev_set_drvdata(dev, dp);
 
+	device_create_file(dev, &dev_attr_hdcp_key);
+
 	return component_add(dev, &cdn_dp_component_ops);
 }
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 5c4f3c93d7ebe..c5efdea174df2 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -72,6 +72,23 @@ struct cdn_dp_port {
 	u8 id;
 };
 
+enum {
+	CDN_DP_HDCP_KSV_LEN = 8,
+	CDN_DP_HDCP_UID_LEN = 16,
+	CDN_DP_HDCP_SHA_LEN = 20,
+	CDN_DP_HDCP_DPK_LEN = 280,
+	CDN_DP_HDCP_KEY_LEN = 308,
+};
+
+struct cdn_dp_hdcp_key_1x {
+	u8 ksv[CDN_DP_HDCP_KSV_LEN];
+	u8 device_key[CDN_DP_HDCP_DPK_LEN];
+	u8 sha1[CDN_DP_HDCP_SHA_LEN];
+	u8 uid[CDN_DP_HDCP_UID_LEN];
+	u16 seed;
+	u8 reserved[10];
+};
+
 struct cdn_dp_device {
 	struct device *dev;
 	struct drm_device *drm_dev;
@@ -114,5 +131,6 @@ struct cdn_dp_device {
 #ifdef CONFIG_SWITCH
 	struct switch_dev switchdev;
 #endif
+	struct cdn_dp_hdcp_key_1x key;
 };
 #endif  /* _CDN_DP_CORE_H */

From 3d802c4c80683fb97b1876206be50b3b7cb65ed5 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 28 Apr 2015 20:56:52 -0400
Subject: [PATCH 1069/1852] FROMLIST: drm: Add Content Protection properties to
 drm

Add new standard connector properties to track whether content protection
(ex: hdcp) is desired by userspace. There are two properties involved,
"Content Protection" and "Content Protection KSV".

The "Content Protection" property allows userspace to request protection
on a connector. Set "Desired" to enable, "Undesired" to disable.

The "Content Protection KSV" property reflects the current state of
protection. If the KSV is 0, the connection is not protected. Once the
driver has enabled protection, it will update the the value with the KSV
(or similarly unique identifier, if not using HDCP) of the first-hop
device (sink or repeater).

(am from https://patchwork.kernel.org/patch/5439871/)

BUG=chrome-os-partner:56883
TEST=Tested on kevin, ensured the sysfs file showed up, and
     reflected the correct

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/403973
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I6bef13729f77de6e37d2da5e12fc69f810a2e286
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_crtc.c  | 17 ++++++++++++++
 drivers/gpu/drm/drm_sysfs.c | 46 +++++++++++++++++++++++++++++++++++++
 include/drm/drm_crtc.h      |  3 +++
 include/uapi/drm/drm_mode.h |  4 ++++
 4 files changed, 70 insertions(+)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 7cd13faf83cac..b710f06822dff 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -78,6 +78,13 @@ static const struct drm_prop_enum_list drm_plane_type_enum_list[] = {
 	{ DRM_PLANE_TYPE_CURSOR, "Cursor" },
 };
 
+static struct drm_prop_enum_list drm_cp_enum_list[] = {
+	{ DRM_MODE_CONTENT_PROTECTION_UNDESIRED, "Undesired" },
+	{ DRM_MODE_CONTENT_PROTECTION_DESIRED, "Desired" },
+};
+
+DRM_ENUM_NAME_FN(drm_get_content_protection_name, drm_cp_enum_list)
+
 /*
  * Optional properties
  */
@@ -1804,6 +1811,16 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.gamma_lut_size_property = prop;
 
+	prop = drm_property_create_enum(dev, 0,
+					"Content Protection", drm_cp_enum_list,
+					ARRAY_SIZE(drm_cp_enum_list));
+	dev->mode_config.content_protection_property = prop;
+
+	prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
+					 "Content Protection KSV", 0,
+					 0xFFFFFFFFFF);
+	dev->mode_config.content_protection_ksv_property = prop;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index bcd15272b458b..c8e5bcc954bb8 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -267,6 +267,48 @@ static ssize_t enabled_show(struct device *device,
 			"disabled");
 }
 
+static ssize_t content_protection_show(struct device *device,
+				       struct device_attribute *attr, char *buf)
+{
+	struct drm_connector *connector = to_drm_connector(device);
+	struct drm_device *dev = connector->dev;
+	struct drm_property *prop;
+	uint64_t cp;
+	int ret;
+
+	prop = dev->mode_config.content_protection_property;
+	if (!prop)
+		return 0;
+
+	ret = drm_object_property_get_value(&connector->base, prop, &cp);
+	if (ret)
+		return 0;
+
+	return snprintf(buf, PAGE_SIZE, "%s\n",
+			drm_get_content_protection_name((int)cp));
+}
+
+static ssize_t content_protection_ksv_show(struct device *device,
+					   struct device_attribute *attr,
+					   char *buf)
+{
+	struct drm_connector *connector = to_drm_connector(device);
+	struct drm_device *dev = connector->dev;
+	struct drm_property *prop;
+	uint64_t ksv;
+	int ret;
+
+	prop = dev->mode_config.content_protection_ksv_property;
+	if (!prop)
+		return 0;
+
+	ret = drm_object_property_get_value(&connector->base, prop, &ksv);
+	if (ret)
+		return 0;
+
+	return snprintf(buf, PAGE_SIZE, "%llx\n", ksv);
+}
+
 static int drm_get_audio_format(struct edid *edid,
 			       char *audioformat, int len)
 {
@@ -395,6 +437,8 @@ static DEVICE_ATTR_RO(enabled);
 static DEVICE_ATTR_RO(dpms);
 static DEVICE_ATTR_RO(modes);
 static DEVICE_ATTR_RO(mode);
+static DEVICE_ATTR_RO(content_protection);
+static DEVICE_ATTR_RO(content_protection_ksv);
 static DEVICE_ATTR_RO(audioformat);
 
 static struct attribute *connector_dev_attrs[] = {
@@ -403,6 +447,8 @@ static struct attribute *connector_dev_attrs[] = {
 	&dev_attr_dpms.attr,
 	&dev_attr_modes.attr,
 	&dev_attr_mode.attr,
+	&dev_attr_content_protection.attr,
+	&dev_attr_content_protection_ksv.attr,
 	&dev_attr_audioformat.attr,
 	NULL
 };
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 4b06e1aa28851..82b866608b813 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1639,6 +1639,8 @@ struct drm_mode_config {
 	struct drm_property *prop_crtc_id;
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
+	struct drm_property *content_protection_property;
+	struct drm_property *content_protection_ksv_property;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
@@ -1834,6 +1836,7 @@ extern void drm_encoder_cleanup(struct drm_encoder *encoder);
 extern const char *drm_get_connector_status_name(enum drm_connector_status status);
 extern const char *drm_get_subpixel_order_name(enum subpixel_order order);
 extern const char *drm_get_dpms_name(int val);
+extern const char *drm_get_content_protection_name(int val);
 extern const char *drm_get_dvi_i_subconnector_name(int val);
 extern const char *drm_get_dvi_i_select_name(int val);
 extern const char *drm_get_tv_subconnector_name(int val);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 68ca0e734ea16..d3366250a60a2 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -95,6 +95,10 @@
 #define DRM_MODE_DPMS_SUSPEND	2
 #define DRM_MODE_DPMS_OFF	3
 
+/* Content Protection Flags */
+#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED   0
+#define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
+
 /* Scaling mode options */
 #define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
 					     software can still scale) */

From d85d1331fcf1787630086b0312d32c0bf9251b3f Mon Sep 17 00:00:00 2001
From: Yakir Yang <ykk@rock-chips.com>
Date: Fri, 25 Sep 2015 09:33:53 +0800
Subject: [PATCH 1070/1852] CHROMIUM: drm: Add "Enabled" value back to "Content
 Protection" property

Although this property value have been deleted from the latest
FROMLIST version (CL:266854), but the chromeos would want driver
to report the property to "Enabled" when hardware HDCP have been
enabled successfully, so let's add this back.

BUG=chrome-os-partner:56883
TEST=None

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/403974
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: Icc52d4a83ac434e898be1190cf934ed8333e78bf
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_crtc.c  | 1 +
 include/uapi/drm/drm_mode.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index b710f06822dff..4802d5458a139 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -81,6 +81,7 @@ static const struct drm_prop_enum_list drm_plane_type_enum_list[] = {
 static struct drm_prop_enum_list drm_cp_enum_list[] = {
 	{ DRM_MODE_CONTENT_PROTECTION_UNDESIRED, "Undesired" },
 	{ DRM_MODE_CONTENT_PROTECTION_DESIRED, "Desired" },
+	{ DRM_MODE_CONTENT_PROTECTION_ENABLED, "Enabled" },
 };
 
 DRM_ENUM_NAME_FN(drm_get_content_protection_name, drm_cp_enum_list)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index d3366250a60a2..e2f7b7ced60fc 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -98,6 +98,7 @@
 /* Content Protection Flags */
 #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED   0
 #define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
+#define DRM_MODE_CONTENT_PROTECTION_ENABLED     2
 
 /* Scaling mode options */
 #define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or

From 2f8c3a98e4cd135ca026cda0c09c140755abbbf6 Mon Sep 17 00:00:00 2001
From: Ziyuan Xu <xzy.xu@rock-chips.com>
Date: Thu, 27 Oct 2016 20:23:35 +0800
Subject: [PATCH 1071/1852] CHROMIUM: drm/rockchip: cdn-dp: add HDCP 1.4
 support

Implement HDCP 1.4 authentication function for DP driver.

First, userspace write HDCP cipher to driver via "hdcp_key" sysfs node,
it contains ksv and device private key. DP connector object has a
"Content Proection" property which it's 'Undesired' default. Userspace
set it to 'Desired' as a HDCP authentication request, and it will be set
to 'Enabled' once HDCP authenticated.

BUG=chrome-os-partner:56883
TEST=WITH HDCP KEY SITUATION:
	1.flash encrypt key to vpd area, and reboot chromebook.
	$ vpd -O; vpd -s hdcp_key_v1_4=something...;dump_vpd_log
	--force;
	2.write key to DP driver.
	$ grep hdcp_key /var/cache/vpd/full-v2.txt | cut -s -d \" -f 4 |
	tr -d "\n" > /sys/devices/platform/fec00000.dp/hdcp_key
	3.set "Content Protection" property to 'Desired'
	$ proptest 36 connector 23 1
	4.if the HDCP 1.4 authenticated, the 'Content Proection' will be
	changed to 'Enabled'

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/403975
Reviewed-by: Sean Paul <seanpaul@chromium.org>

Change-Id: I58f11535dd68d9517a3c7b0b9a61ed9fa6d9a1c0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 198 +++++++++++++++++++++++++
 drivers/gpu/drm/rockchip/cdn-dp-core.h |   1 +
 drivers/gpu/drm/rockchip/cdn-dp-reg.c  | 112 ++++++++++++++
 drivers/gpu/drm/rockchip/cdn-dp-reg.h  |  35 +++++
 4 files changed, 346 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 8295722fc1e34..a15d311fadda4 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -26,6 +26,7 @@
 #include <linux/extcon.h>
 #include <linux/firmware.h>
 #include <linux/hdmi-notifier.h>
+#include <linux/iopoll.h>
 #include <linux/regmap.h>
 #include <linux/reset.h>
 #include <linux/mfd/syscon.h>
@@ -39,10 +40,15 @@
 #include "cdn-dp-reg.h"
 #include "rockchip_drm_vop.h"
 
+#define HDCP_RETRY_INTERVAL_MS		100
+#define HDCP_EVENT_TIMEOUT_MS		500
+#define HDCP_AUTHENTICATE_DELAY_MS	100
+
 #define HDCP_KEY_DATA_START_TRANSFER	0
 #define HDCP_KEY_DATA_START_DECRYPT	1
 
 #define RK_SIP_HDCP_CONTROL		0x82000009
+#define RK_SIP_HDCP_KEY_DATA64		0xC200000A
 
 #define connector_to_dp(c) \
 		container_of(c, struct cdn_dp_device, connector)
@@ -194,6 +200,50 @@ static int cdn_dp_get_sink_count(struct cdn_dp_device *dp, u8 *sink_count)
 	return 0;
 }
 
+static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
+{
+	int ret;
+	struct arm_smccc_res res;
+	uint64_t *buf;
+
+	mutex_lock(&dp->lock);
+	if (!dp->active) {
+		dev_err(dp->dev, "firmware is not active\n");
+		goto out;
+	}
+
+	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_TRANSFER,
+		      0, 0, 0, 0, 0, 0, &res);
+
+	buf = (uint64_t *)&dp->key;
+
+	for (; !res.a0 && (u8 *)buf - (u8 *)&dp->key < sizeof(dp->key);
+	     buf += 6)
+		arm_smccc_smc(RK_SIP_HDCP_KEY_DATA64, buf[0], buf[1],
+			      buf[2], buf[3], buf[4], buf[5], 0, &res);
+
+	if (res.a0) {
+		dev_err(dp->dev, "send hdcp keys failed: %ld\n", res.a0);
+		ret = -EIO;
+		goto out;
+	}
+	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_DECRYPT,
+		      0, 0, 0, 0, 0, 0, &res);
+
+	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, true);
+	if (ret) {
+		dev_err(dp->dev, "start hdcp authentication failed: %d\n", ret);
+		goto out;
+	}
+
+	schedule_delayed_work(&dp->hdcp_event_work,
+			      msecs_to_jiffies(HDCP_AUTHENTICATE_DELAY_MS));
+
+out:
+	mutex_unlock(&dp->lock);
+	return ret;
+}
+
 static struct cdn_dp_port *cdn_dp_connected_port(struct cdn_dp_device *dp)
 {
 	struct cdn_dp_port *port;
@@ -261,12 +311,71 @@ static void cdn_dp_connector_destroy(struct drm_connector *connector)
 	drm_connector_cleanup(connector);
 }
 
+static int cdn_dp_set_content_protection(struct cdn_dp_device *dp,
+					 struct drm_mode_object *obj,
+					 struct drm_property *property,
+					 uint64_t val)
+{
+	int ret;
+
+	switch (val) {
+	case DRM_MODE_CONTENT_PROTECTION_UNDESIRED:
+		ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
+		break;
+
+	case DRM_MODE_CONTENT_PROTECTION_DESIRED:
+		ret = cdn_dp_start_hdcp1x_auth(dp);
+		break;
+
+	case DRM_MODE_CONTENT_PROTECTION_ENABLED:
+		ret = -EINVAL;
+	}
+	return ret;
+}
+
+static int cdn_dp_connector_set_property(struct drm_connector *connector,
+						struct drm_property *property,
+						uint64_t val)
+{
+	struct cdn_dp_device *dp = connector_to_dp(connector);
+	int ret = 0;
+
+	if (strcmp(property->name, "Content Protection") == 0)
+		ret = cdn_dp_set_content_protection(dp, &connector->base,
+						    property, val);
+
+	return ret;
+}
+
+static int cdn_dp_connector_atomic_get_property(
+					struct drm_connector *connector,
+					const struct drm_connector_state *state,
+					struct drm_property *property,
+					uint64_t *val)
+{
+	struct drm_mode_config *mc = &connector->dev->mode_config;
+	int i;
+
+	if (property == mc->content_protection_property) {
+		for (i = 0; i < connector->properties.count; i++) {
+			if (connector->properties.properties[i] == property) {
+				*val = connector->properties.values[i];
+				return 0;
+			}
+		}
+	}
+
+	return -EINVAL;
+}
+
 static const struct drm_connector_funcs cdn_dp_atomic_connector_funcs = {
 	.dpms = drm_atomic_helper_connector_dpms,
 	.detect = cdn_dp_connector_detect,
 	.destroy = cdn_dp_connector_destroy,
 	.fill_modes = drm_helper_probe_single_connector_modes,
 	.reset = drm_atomic_helper_connector_reset,
+	.set_property = cdn_dp_connector_set_property,
+	.atomic_get_property = cdn_dp_connector_atomic_get_property,
 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };
@@ -1089,6 +1198,88 @@ static int cdn_dp_pd_event(struct notifier_block *nb,
 	return NOTIFY_DONE;
 }
 
+static int cdn_dp_set_hdcp_drm_property(struct cdn_dp_device *dp, uint64_t val)
+{
+	struct drm_connector *connector = &dp->connector;
+	struct drm_mode_config *mc = &connector->dev->mode_config;
+
+	return drm_object_property_set_value(&connector->base,
+					     mc->content_protection_property,
+					     val);
+}
+
+static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
+{
+	bool auth_done = false;
+	u16 tx_status;
+	u32 sw_event;
+	int ret;
+
+	mutex_lock(&dp->lock);
+
+	/*
+	 * HDCP authentication might cause the disconnect hpd event, just
+	 * stop the hdcp event SM.
+	 */
+	if (!dp->connected) {
+		auth_done = true;
+		goto out;
+	}
+
+	sw_event = cdn_dp_get_event(dp);
+
+	if (sw_event & HDCP_TX_STATUS_EVENT) {
+		auth_done = true;
+
+		ret = cdn_dp_hdcp_tx_status_req(dp, &tx_status);
+		if (ret)
+			goto out;
+		if (HDCP_TX_STATUS_ERROR(tx_status)) {
+			dev_err(dp->dev, "hdcp status error: %x\n",
+				HDCP_TX_STATUS_ERROR(tx_status));
+			goto out;
+		} else if (tx_status & HDCP_TX_STATUS_AUTHENTICATED) {
+			cdn_dp_set_hdcp_drm_property(dp,
+				DRM_MODE_CONTENT_PROTECTION_ENABLED);
+			goto out;
+		} else {
+			auth_done = false;
+		}
+	}
+
+	if (sw_event & HDCP_TX_IS_RECEIVER_ID_VALID_EVENT) {
+		ret = cdn_dp_hdcp_tx_is_receiver_id_valid_req(dp);
+		if (ret) {
+			auth_done = true;
+			goto out;
+		}
+		ret = cdn_dp_hdcp_tx_respond_id_valid(dp, true);
+		if (ret)
+			auth_done = true;
+	}
+
+out:
+	mutex_unlock(&dp->lock);
+
+	return auth_done;
+}
+
+static void cdn_dp_hdcp_event_work(struct work_struct *work)
+{
+	struct cdn_dp_device *dp = container_of(work, struct cdn_dp_device,
+						hdcp_event_work.work);
+	unsigned long timeout = jiffies +
+				msecs_to_jiffies(HDCP_EVENT_TIMEOUT_MS);
+
+	while (time_before(jiffies, timeout)) {
+		if (cdn_dp_hdcp_authorize(dp))
+			return;
+		msleep(HDCP_RETRY_INTERVAL_MS);
+	}
+
+	dev_err(dp->dev, "Failed to authorize hdcp\n");
+}
+
 static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 {
 	struct cdn_dp_device *dp = dev_get_drvdata(dev);
@@ -1096,6 +1287,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	struct drm_connector *connector;
 	struct cdn_dp_port *port;
 	struct drm_device *drm_dev = data;
+	struct drm_mode_config *mode_config;
 	int ret, i;
 
 	ret = cdn_dp_parse_dt(dp);
@@ -1109,6 +1301,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->fw_loaded = false;
 
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
+	INIT_DELAYED_WORK(&dp->hdcp_event_work, cdn_dp_hdcp_event_work);
 
 	encoder = &dp->encoder;
 
@@ -1170,6 +1363,11 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 
 	schedule_work(&dp->event_work);
 
+	mode_config = &connector->dev->mode_config;
+	drm_object_attach_property(&connector->base,
+				   mode_config->content_protection_property,
+				   DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
+
 	return 0;
 
 err_free_connector:
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index c5efdea174df2..8b5d283c66c6d 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -132,5 +132,6 @@ struct cdn_dp_device {
 	struct switch_dev switchdev;
 #endif
 	struct cdn_dp_hdcp_key_1x key;
+	struct delayed_work hdcp_event_work;
 };
 #endif  /* _CDN_DP_CORE_H */
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index 32c725ca9976f..3fcfbfe71e783 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -12,6 +12,7 @@
  * GNU General Public License for more details.
  */
 
+#include <linux/arm-smccc.h>
 #include <linux/clk.h>
 #include <linux/device.h>
 #include <linux/delay.h>
@@ -981,3 +982,114 @@ int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio)
 		DRM_DEV_ERROR(dp->dev, "audio config failed: %d\n", ret);
 	return ret;
 }
+
+int cdn_dp_hdcp_tx_configuration(struct cdn_dp_device *dp, int tx_mode,
+						 bool active)
+{
+	u8 msg;
+
+	msg = tx_mode;
+	if (active)
+		msg |= HDCP_TX_ACTIVATE;
+
+	return cdn_dp_mailbox_send(dp, MB_MODULE_ID_HDCP_TX,
+				   HDCP_TX_CONFIGURATION, sizeof(msg), &msg);
+}
+
+int cdn_dp_hdcp_tx_status_req(struct cdn_dp_device *dp, uint16_t *tx_status)
+{
+	u8 status[5];
+	int ret;
+
+	ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_HDCP_TX,
+				  HDCP_TX_STATUS_CHANGE, 0, NULL);
+	if (ret)
+		goto err_hdcp_tx_status_rq;
+
+	ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_HDCP_TX,
+					      HDCP_TX_STATUS_CHANGE,
+					      sizeof(status));
+	if (ret)
+		goto err_hdcp_tx_status_rq;
+
+	ret = cdn_dp_mailbox_read_receive(dp, status, sizeof(status));
+	if (ret)
+		goto err_hdcp_tx_status_rq;
+
+	*tx_status = status[0] << 8 | status[1];
+
+err_hdcp_tx_status_rq:
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "hdcp tx status failed: %d\n", ret);
+	return ret;
+}
+
+int cdn_dp_hdcp_tx_is_receiver_id_valid_req(struct cdn_dp_device *dp)
+{
+	int ret;
+	u32 mbox_size, i;
+	u8 header[4], *resp;
+
+	ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_HDCP_TX,
+				  HDCP_TX_IS_RECEIVER_ID_VALID,
+				  0, NULL);
+	if (ret)
+		goto err_hdcp_tx_is_receiver_id_valid_req;
+
+	/*
+	 * The size of HDCP_TX_IS_RECEIVER_ID_VALID_RESP is variable, which
+	 * is dependent on HDCP device type. It will response receiver ID
+	 * list if the device is a repeater.
+	 * So we need to distinguish the size.
+	 */
+	for (i = 0; i < 4; i++) {
+		ret = cdn_dp_mailbox_read(dp);
+		if (ret < 0)
+			goto err_hdcp_tx_is_receiver_id_valid_req;
+
+		header[i] = ret;
+	}
+
+	mbox_size = (header[2] << 8) | header[3];
+
+	if (header[0] != HDCP_TX_IS_RECEIVER_ID_VALID ||
+	    header[1] != MB_MODULE_ID_HDCP_TX ||
+	    !IS_HDCP_TX_RECEIVER_ID_VALID_RESP_SIZE_VALID(mbox_size)) {
+		ret = -EINVAL;
+		for (i = 0; i < mbox_size; i++)
+			if (cdn_dp_mailbox_read(dp) < 0)
+				break;
+
+		goto err_hdcp_tx_is_receiver_id_valid_req;
+	}
+
+	resp = kzalloc(mbox_size, GFP_KERNEL);
+	if (IS_ERR(resp) || IS_ERR_OR_NULL(resp)) {
+		ret = -ENOMEM;
+		goto err_hdcp_tx_is_receiver_id_valid_req;
+	}
+
+	ret = cdn_dp_mailbox_read_receive(dp, resp, mbox_size);
+
+	/* TODO judge the all receivers are in revocation list. */
+	kfree(resp);
+
+err_hdcp_tx_is_receiver_id_valid_req:
+	if (ret)
+		DRM_DEV_ERROR(dp->dev,
+			      "hdcp receivers id verification failed: %d\n",
+			      ret);
+	return ret;
+}
+
+int cdn_dp_hdcp_tx_respond_id_valid(struct cdn_dp_device *dp, bool valid)
+{
+	u8 msg = 0;
+
+	if (valid)
+		msg = 0x01;
+	return cdn_dp_mailbox_send(dp, MB_MODULE_ID_HDCP_TX,
+				   HDCP_TX_RESPOND_RECEIVER_ID_VALID,
+				   sizeof(msg), &msg);
+}
+
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 9abdc7416e4c5..53fd597641536 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -328,6 +328,22 @@
 #define GENERAL_BUS_SETTINGS            0x03
 #define GENERAL_TEST_ACCESS             0x04
 
+/* hdcp opcode */
+#define HDCP_TX_CONFIGURATION			0x00
+#define HDCP2_TX_SET_PUBLIC_KEY_PARAMS		0x01
+#define HDCP2_TX_SET_DEBUG_RANDOM_NUMBERS	0x02
+#define HDCP2_TX_RESPOND_KM			0x03
+#define HDCP1_TX_SEND_KEYS			0x04
+#define HDCP1_TX_SEND_RANDOM_AN			0x05
+#define HDCP_TX_STATUS_CHANGE			0x06
+#define HDCP2_TX_IS_KM_STORED			0x07
+#define HDCP2_TX_STORE_KM			0x08
+#define HDCP_TX_IS_RECEIVER_ID_VALID		0x09
+#define HDCP_TX_RESPOND_RECEIVER_ID_VALID	0x0a
+
+#define IS_HDCP_TX_RECEIVER_ID_VALID_RESP_SIZE_VALID(x)	\
+			(((((x) - 2) % 5) == 0) || ((((x) - 4) % 5) == 0))
+
 #define DPTX_SET_POWER_MNG			0x00
 #define DPTX_SET_HOST_CAPABILITIES		0x01
 #define DPTX_GET_EDID				0x02
@@ -394,6 +410,14 @@
 #define HDCP2_TX_STORE_KM_EVENT			BIT(6)
 #define HDCP_TX_IS_RECEIVER_ID_VALID_EVENT	BIT(7)
 
+#define HDCP_TX_ACTIVATE			BIT(2)
+
+#define HDCP_TX_STATUS_AUTHENTICATED		BIT(0)
+#define HDCP_TX_STATUS_RECEIVER_IS_REPEATER	BIT(1)
+#define HDCP_TX_STATUS_RX_HDCP1			(0x01 << 2)
+#define HDCP_TX_STATUS_RX_HDCP2			(0x02 << 2)
+#define HDCP_TX_STATUS_ERROR(x)			(((x) >> 5) & 0xf)
+
 #define TU_SIZE					30
 #define CDN_DP_MAX_LINK_RATE			DP_LINK_BW_5_4
 
@@ -459,6 +483,12 @@ enum vic_bt_type {
 	BT_709 = 0x1,
 };
 
+enum HDCP_TX_SUPPORT {
+	HDCP_TX_2,
+	HDCP_TX_1,
+	HDCP_TX_BOTH,
+};
+
 void cdn_dp_clock_reset(struct cdn_dp_device *dp);
 
 void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk);
@@ -479,4 +509,9 @@ int cdn_dp_config_video(struct cdn_dp_device *dp);
 int cdn_dp_audio_stop(struct cdn_dp_device *dp, struct audio_info *audio);
 int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable);
 int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio);
+int cdn_dp_hdcp_tx_configuration(struct cdn_dp_device *dp, int tx_mode,
+						 bool active);
+int cdn_dp_hdcp_tx_status_req(struct cdn_dp_device *dp, uint16_t *tx_status);
+int cdn_dp_hdcp_tx_is_receiver_id_valid_req(struct cdn_dp_device *dp);
+int cdn_dp_hdcp_tx_respond_id_valid(struct cdn_dp_device *dp, bool valid);
 #endif /* _CDN_DP_REG_H */

From cd289280f9198e4e2b9e41df40e12cda4b4e5f99 Mon Sep 17 00:00:00 2001
From: Brian Norris <briannorris@chromium.org>
Date: Thu, 23 Mar 2017 14:17:23 -0700
Subject: [PATCH 1072/1852] CHROMIUM: drm/rockchip: cdn-dp: resolve sysfs
 warning

I've seen this:

  sysfs: cannot create duplicate filename '/devices/platform/fec00000.dp/hdcp_key'

Presumably because component_add() can -EPROBE_DEFER.

At any rate, we shouldn't leave the sysfs file hanging around. Clean it
up on probe failure, and on removal.

BUG=b:36566733
TEST=boot

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/458836
Reviewed-by: Guenter Roeck <groeck@chromium.org>

Change-Id: Ic10f45c0d67cfcc41ab89af108a78f641f424872
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index a15d311fadda4..fd8476d672405 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -1502,7 +1502,7 @@ static int cdn_dp_probe(struct platform_device *pdev)
 	struct cdn_dp_device *dp;
 	struct extcon_dev *extcon;
 	struct phy *phy;
-	int i;
+	int ret, i;
 
 	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
 	if (!dp)
@@ -1542,9 +1542,19 @@ static int cdn_dp_probe(struct platform_device *pdev)
 	mutex_init(&dp->lock);
 	dev_set_drvdata(dev, dp);
 
-	device_create_file(dev, &dev_attr_hdcp_key);
+	ret = device_create_file(dev, &dev_attr_hdcp_key);
+	if (ret)
+		return ret;
 
-	return component_add(dev, &cdn_dp_component_ops);
+	ret = component_add(dev, &cdn_dp_component_ops);
+	if (ret)
+		goto err;
+
+	return 0;
+
+err:
+	device_remove_file(dev, &dev_attr_hdcp_key);
+	return ret;
 }
 
 static int cdn_dp_remove(struct platform_device *pdev)
@@ -1553,6 +1563,7 @@ static int cdn_dp_remove(struct platform_device *pdev)
 
 	cdn_dp_suspend(dp->dev);
 	component_del(&pdev->dev, &cdn_dp_component_ops);
+	device_remove_file(&pdev->dev, &dev_attr_hdcp_key);
 
 	return 0;
 }

From 2055dc2dbb362b743242d7544aabc871a1c280d5 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 26 Sep 2017 16:19:21 -0400
Subject: [PATCH 1073/1852] CHROMIUM: drm: Update Content Protection ABI

The Content Protection properties in 4.4 used v2 of the upstream
patches, but chrome (and upstream) prefer v1. This patch removes the ksv
property and reinstates the ENABLED enum value to the content protection
property.

BUG=b:63816472
TEST=Watch protected content on external display, ensure CP is
	enabled/disabled properly by chrome

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/687800
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I38cecce2d15b4d4b1ce95ef0e572a08f1bc97131
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_crtc.c  |  5 -----
 drivers/gpu/drm/drm_sysfs.c | 23 -----------------------
 include/drm/drm_crtc.h      |  1 -
 3 files changed, 29 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 4802d5458a139..3e3af957f3361 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1817,11 +1817,6 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 					ARRAY_SIZE(drm_cp_enum_list));
 	dev->mode_config.content_protection_property = prop;
 
-	prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
-					 "Content Protection KSV", 0,
-					 0xFFFFFFFFFF);
-	dev->mode_config.content_protection_ksv_property = prop;
-
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index c8e5bcc954bb8..740e668dd397e 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -288,27 +288,6 @@ static ssize_t content_protection_show(struct device *device,
 			drm_get_content_protection_name((int)cp));
 }
 
-static ssize_t content_protection_ksv_show(struct device *device,
-					   struct device_attribute *attr,
-					   char *buf)
-{
-	struct drm_connector *connector = to_drm_connector(device);
-	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
-	uint64_t ksv;
-	int ret;
-
-	prop = dev->mode_config.content_protection_ksv_property;
-	if (!prop)
-		return 0;
-
-	ret = drm_object_property_get_value(&connector->base, prop, &ksv);
-	if (ret)
-		return 0;
-
-	return snprintf(buf, PAGE_SIZE, "%llx\n", ksv);
-}
-
 static int drm_get_audio_format(struct edid *edid,
 			       char *audioformat, int len)
 {
@@ -438,7 +417,6 @@ static DEVICE_ATTR_RO(dpms);
 static DEVICE_ATTR_RO(modes);
 static DEVICE_ATTR_RO(mode);
 static DEVICE_ATTR_RO(content_protection);
-static DEVICE_ATTR_RO(content_protection_ksv);
 static DEVICE_ATTR_RO(audioformat);
 
 static struct attribute *connector_dev_attrs[] = {
@@ -448,7 +426,6 @@ static struct attribute *connector_dev_attrs[] = {
 	&dev_attr_modes.attr,
 	&dev_attr_mode.attr,
 	&dev_attr_content_protection.attr,
-	&dev_attr_content_protection_ksv.attr,
 	&dev_attr_audioformat.attr,
 	NULL
 };
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 82b866608b813..e7fb665befea4 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -1640,7 +1640,6 @@ struct drm_mode_config {
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
 	struct drm_property *content_protection_property;
-	struct drm_property *content_protection_ksv_property;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;

From 1a275d1dc77b1a73648663d9cfd5ff6d4137d95b Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 8 Sep 2017 09:42:15 -0400
Subject: [PATCH 1074/1852] CHROMIUM: drm/sysfs: Properly acquire modeset lock
 when showing content_protection

The modeset locks were not acquired, resulting in a kernel WARNING when
the attribute's show hook was called.

BUG=b:63816472
TEST=`cat /sys/class/drm/card1-DP-1/content_protection` and check logs

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657573
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: Ie401acf9f2780e01fd5735da8c922e4bd473eb6f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_sysfs.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 740e668dd397e..821b1ee55ea44 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -276,11 +276,16 @@ static ssize_t content_protection_show(struct device *device,
 	uint64_t cp;
 	int ret;
 
+	drm_modeset_lock_all(dev);
+
 	prop = dev->mode_config.content_protection_property;
-	if (!prop)
+	if (!prop) {
+		drm_modeset_unlock_all(dev);
 		return 0;
+	}
 
 	ret = drm_object_property_get_value(&connector->base, prop, &cp);
+	drm_modeset_unlock_all(dev);
 	if (ret)
 		return 0;
 

From f05bda2ca9c4756499674896e721e975eb6c326b Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 3 Aug 2018 09:44:38 +0800
Subject: [PATCH 1075/1852] drm/crtc: Export drm_mode_connector_set_obj_prop

Change-Id: Ie09b8798d7d2951c5e794c7054e85a5c40bc85d7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_crtc.c          | 7 ++++---
 drivers/gpu/drm/drm_crtc_internal.h | 3 +++
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 3e3af957f3361..fd84556e2bf34 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -5205,9 +5205,9 @@ int drm_mode_connector_property_set_ioctl(struct drm_device *dev,
 	return drm_mode_obj_set_property_ioctl(dev, &obj_set_prop, file_priv);
 }
 
-static int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,
-					   struct drm_property *property,
-					   uint64_t value)
+int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,
+				    struct drm_property *property,
+				    uint64_t value)
 {
 	int ret = -EINVAL;
 	struct drm_connector *connector = obj_to_connector(obj);
@@ -5225,6 +5225,7 @@ static int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,
 		drm_object_property_set_value(&connector->base, property, value);
 	return ret;
 }
+EXPORT_SYMBOL(drm_mode_connector_set_obj_prop);
 
 static int drm_mode_crtc_set_obj_prop(struct drm_mode_object *obj,
 				      struct drm_property *property,
diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h
index e27fdb4711ed0..8c73baf9a3d6b 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -35,6 +35,9 @@ int drm_mode_object_get(struct drm_device *dev,
 			struct drm_mode_object *obj, uint32_t obj_type);
 void drm_mode_object_put(struct drm_device *dev,
 			 struct drm_mode_object *object);
+int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,
+				    struct drm_property *property,
+				    uint64_t value);
 
 /* drm_atomic.c */
 int drm_atomic_get_property(struct drm_mode_object *obj,

From 8790953475524c7a0b08018e028cf242ba9698fb Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 8 Sep 2017 09:43:32 -0400
Subject: [PATCH 1076/1852] CHROMIUM: drm/sysfs: Make content_protection R/W

This makes debugging and stress testing much easier.

BUG=b:63816472
TEST=echo "{Un|D}esired" > /sys/class/drm/card1-DP-1/content_protection

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657574
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I5dc2d836ded2c7f95f9ee4c16d9ac7242707e9f2
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_sysfs.c | 37 ++++++++++++++++++++++++++++++++++++-
 1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 821b1ee55ea44..ae20397fba09d 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -24,6 +24,7 @@
 #include <drm/drmP.h>
 #include "drm_internal.h"
 
+#include "drm_crtc_internal.h"
 #define to_drm_minor(d) dev_get_drvdata(d)
 #define to_drm_connector(d) dev_get_drvdata(d)
 
@@ -267,6 +268,40 @@ static ssize_t enabled_show(struct device *device,
 			"disabled");
 }
 
+static ssize_t content_protection_store(struct device *device,
+			   struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	const int nms[] = {
+		DRM_MODE_CONTENT_PROTECTION_DESIRED,
+		DRM_MODE_CONTENT_PROTECTION_UNDESIRED
+	};
+	struct drm_connector *connector = to_drm_connector(device);
+	struct drm_device *dev = connector->dev;
+	struct drm_property *prop;
+	int ret, i, val = -1;
+
+	for (i = 0; i < ARRAY_SIZE(nms); i++) {
+		if (sysfs_streq(buf, drm_get_content_protection_name(nms[i])))
+			val = nms[i];
+	}
+	if (val < 0)
+		return -EINVAL;
+
+	drm_modeset_lock_all(dev);
+
+	prop = dev->mode_config.content_protection_property;
+	if (!prop) {
+		drm_modeset_unlock_all(dev);
+		return count;
+	}
+
+	ret = drm_mode_connector_set_obj_prop(&connector->base, prop, val);
+
+	drm_modeset_unlock_all(dev);
+	return ret ? ret : count;
+}
+
 static ssize_t content_protection_show(struct device *device,
 				       struct device_attribute *attr, char *buf)
 {
@@ -421,7 +456,7 @@ static DEVICE_ATTR_RO(enabled);
 static DEVICE_ATTR_RO(dpms);
 static DEVICE_ATTR_RO(modes);
 static DEVICE_ATTR_RO(mode);
-static DEVICE_ATTR_RO(content_protection);
+static DEVICE_ATTR_RW(content_protection);
 static DEVICE_ATTR_RO(audioformat);
 
 static struct attribute *connector_dev_attrs[] = {

From 881ba7447d8ca8d192c92cea2d49f102c76e6ea3 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 8 Sep 2017 09:45:22 -0400
Subject: [PATCH 1077/1852] CHROMIUM: drm/rockchip: Bump HDCP authorization
 timeout to 3s

500ms is insufficient for my test monitor, bump it up to 3s.

BUG=b:64437717
TEST=HDCP works on ASUS VE258Q

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657575
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: Ia2d30046532fb80d224b5dc07494b3c69b7ffe5f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index fd8476d672405..dcca05f4c2b9a 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -40,9 +40,9 @@
 #include "cdn-dp-reg.h"
 #include "rockchip_drm_vop.h"
 
-#define HDCP_RETRY_INTERVAL_MS		100
-#define HDCP_EVENT_TIMEOUT_MS		500
-#define HDCP_AUTHENTICATE_DELAY_MS	100
+#define HDCP_RETRY_INTERVAL_US		20000
+#define HDCP_EVENT_TIMEOUT_US		3000000
+#define HDCP_AUTHENTICATE_DELAY_MS	400
 
 #define HDCP_KEY_DATA_START_TRANSFER	0
 #define HDCP_KEY_DATA_START_DECRYPT	1
@@ -1268,16 +1268,14 @@ static void cdn_dp_hdcp_event_work(struct work_struct *work)
 {
 	struct cdn_dp_device *dp = container_of(work, struct cdn_dp_device,
 						hdcp_event_work.work);
-	unsigned long timeout = jiffies +
-				msecs_to_jiffies(HDCP_EVENT_TIMEOUT_MS);
-
-	while (time_before(jiffies, timeout)) {
-		if (cdn_dp_hdcp_authorize(dp))
-			return;
-		msleep(HDCP_RETRY_INTERVAL_MS);
-	}
+	bool auth_done;
+	int ret;
 
-	dev_err(dp->dev, "Failed to authorize hdcp\n");
+	ret = readx_poll_timeout(cdn_dp_hdcp_authorize, dp, auth_done,
+				 auth_done, HDCP_RETRY_INTERVAL_US,
+				 HDCP_EVENT_TIMEOUT_US);
+	if (ret)
+		dev_err(dp->dev, "Failed to authorize hdcp %d\n", ret);
 }
 
 static int cdn_dp_bind(struct device *dev, struct device *master, void *data)

From 8b118db6d8a4e1386255d8c40356b7e580a5eaa5 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Thu, 7 Sep 2017 14:49:03 -0400
Subject: [PATCH 1078/1852] CHROMIUM: drm/rockchip: Enforce cdn_dp_hdcp_key_1x
 size assumption

struct cdn_dp_hdcp_key_1x is assumed to be evenly divisible by 6, given
its usage and reserved member. Unfortunately, this is neither
documented, nor enforced anywhere. This patch fixes that.

BUG=b:63816472
TEST=Builds

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657576
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I3f683cb9dd48d6e6d104d2e9a1a94c03e34d25dd
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 6 +++---
 drivers/gpu/drm/rockchip/cdn-dp-core.h | 3 +++
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index dcca05f4c2b9a..367281ff343a3 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -215,9 +215,9 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_TRANSFER,
 		      0, 0, 0, 0, 0, 0, &res);
 
-	buf = (uint64_t *)&dp->key;
-
-	for (; !res.a0 && (u8 *)buf - (u8 *)&dp->key < sizeof(dp->key);
+	BUILD_BUG_ON(sizeof(dp->key) % 6);
+	for (buf = (uint64_t *)&dp->key;
+	     !res.a0 && (u8 *)buf - (u8 *)&dp->key < sizeof(dp->key);
 	     buf += 6)
 		arm_smccc_smc(RK_SIP_HDCP_KEY_DATA64, buf[0], buf[1],
 			      buf[2], buf[3], buf[4], buf[5], 0, &res);
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 8b5d283c66c6d..22f059268afe5 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -80,6 +80,9 @@ enum {
 	CDN_DP_HDCP_KEY_LEN = 308,
 };
 
+/*
+ * Size must be divisible by 6
+ */
 struct cdn_dp_hdcp_key_1x {
 	u8 ksv[CDN_DP_HDCP_KSV_LEN];
 	u8 device_key[CDN_DP_HDCP_DPK_LEN];

From 10209a8f192c9aeaa1fb875a6c4b6237a4c0c860 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Thu, 7 Sep 2017 14:27:21 -0400
Subject: [PATCH 1079/1852] CHROMIUM: drm/rockchip: Improve cdn hdcp error
 messages

Add a message for start hdcp transfer failure (instead of using the same
one below the loop), and print the errors in hex as opposed to decimal.

BUG=b:63816472
TEST=Try enabling HDCP on kevin with busted firmware, get the correct msg

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657937
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I746574e26b200d746a7a228c868dd22e1b82cae8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 367281ff343a3..df78d0ea7c68c 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -214,6 +214,11 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_TRANSFER,
 		      0, 0, 0, 0, 0, 0, &res);
+	if (res.a0) {
+		dev_err(dp->dev, "start hdcp transfer failed: %#lx\n", res.a0);
+		ret = -EIO;
+		goto out;
+	}
 
 	BUILD_BUG_ON(sizeof(dp->key) % 6);
 	for (buf = (uint64_t *)&dp->key;
@@ -223,7 +228,7 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 			      buf[2], buf[3], buf[4], buf[5], 0, &res);
 
 	if (res.a0) {
-		dev_err(dp->dev, "send hdcp keys failed: %ld\n", res.a0);
+		dev_err(dp->dev, "send hdcp keys failed: %#lx\n", res.a0);
 		ret = -EIO;
 		goto out;
 	}
@@ -1235,7 +1240,7 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 		if (ret)
 			goto out;
 		if (HDCP_TX_STATUS_ERROR(tx_status)) {
-			dev_err(dp->dev, "hdcp status error: %x\n",
+			dev_err(dp->dev, "hdcp status error: %#x\n",
 				HDCP_TX_STATUS_ERROR(tx_status));
 			goto out;
 		} else if (tx_status & HDCP_TX_STATUS_AUTHENTICATED) {

From 9d8e7ffe639d07f9edf6e24502fc3ed5a4cbb61b Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Thu, 7 Sep 2017 15:56:27 -0400
Subject: [PATCH 1080/1852] CHROMIUM: drm/rockchip: Make hdcp enable/disable
 less racy

A couple of things to reduce the races during hdcp enable/disable:
- Cancel any active workers currently transition
- Hold lock while disabling hdcp

BUG=b:64438996
TEST=Run the following script, ensure sequencing is correct:

attr=/sys/class/drm/card1-DP-1/content_protection
printf "Testing HDCP...\n"
while [ 1 ]; do
	printf "\rSetting state to desired...  "
	echo "Desired" > $attr
	sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
	printf "\rSetting state to undesired..."
	echo "Undesired" > $attr
	sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
done

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657938
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I535b23ffb22eba251a595dcdc4c204de80765414
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 35 +++++++++++++-------------
 1 file changed, 17 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index df78d0ea7c68c..7a0a10af45ef4 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -206,18 +206,16 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	struct arm_smccc_res res;
 	uint64_t *buf;
 
-	mutex_lock(&dp->lock);
 	if (!dp->active) {
 		dev_err(dp->dev, "firmware is not active\n");
-		goto out;
+		return 0;
 	}
 
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_TRANSFER,
 		      0, 0, 0, 0, 0, 0, &res);
 	if (res.a0) {
 		dev_err(dp->dev, "start hdcp transfer failed: %#lx\n", res.a0);
-		ret = -EIO;
-		goto out;
+		return -EIO;
 	}
 
 	BUILD_BUG_ON(sizeof(dp->key) % 6);
@@ -229,8 +227,7 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 
 	if (res.a0) {
 		dev_err(dp->dev, "send hdcp keys failed: %#lx\n", res.a0);
-		ret = -EIO;
-		goto out;
+		return -EIO;
 	}
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_DECRYPT,
 		      0, 0, 0, 0, 0, 0, &res);
@@ -238,14 +235,12 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, true);
 	if (ret) {
 		dev_err(dp->dev, "start hdcp authentication failed: %d\n", ret);
-		goto out;
+		return ret;
 	}
 
 	schedule_delayed_work(&dp->hdcp_event_work,
 			      msecs_to_jiffies(HDCP_AUTHENTICATE_DELAY_MS));
 
-out:
-	mutex_unlock(&dp->lock);
 	return ret;
 }
 
@@ -323,18 +318,22 @@ static int cdn_dp_set_content_protection(struct cdn_dp_device *dp,
 {
 	int ret;
 
-	switch (val) {
-	case DRM_MODE_CONTENT_PROTECTION_UNDESIRED:
-		ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
-		break;
+	/* Only the driver can set to enabled */
+	if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+		return -EINVAL;
+
+	/* If we're in a state transition already, wait for it to finish */
+	cancel_delayed_work_sync(&dp->hdcp_event_work);
+
+	mutex_lock(&dp->lock);
 
-	case DRM_MODE_CONTENT_PROTECTION_DESIRED:
+	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED)
 		ret = cdn_dp_start_hdcp1x_auth(dp);
-		break;
+	else
+		ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
+
+	mutex_unlock(&dp->lock);
 
-	case DRM_MODE_CONTENT_PROTECTION_ENABLED:
-		ret = -EINVAL;
-	}
 	return ret;
 }
 

From 2a1ea6f703dc6047ff588cb9f284831959ed1347 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 8 Sep 2017 09:47:43 -0400
Subject: [PATCH 1081/1852] FROMLIST: drm/rockchip: Add forward declarations to
 cdn_dp_device and audio_info

Add forward declarations in cdn-dp-reg.h to cdn_dp_device and audio_info

BUG=None
TEST=None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
(from https://lists.freedesktop.org/archives/dri-devel/2017-September/152108.html)
Reviewed-on: https://chromium-review.googlesource.com/657939
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I8b12f76a5fb441ad5353259b4c74d161b1d4693e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-reg.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 53fd597641536..78d9706ef1544 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -489,6 +489,9 @@ enum HDCP_TX_SUPPORT {
 	HDCP_TX_BOTH,
 };
 
+struct cdn_dp_device;
+struct audio_info;
+
 void cdn_dp_clock_reset(struct cdn_dp_device *dp);
 
 void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk);

From d4c8e30f9fa6693f536a833c81a743761517803a Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 8 Sep 2017 10:11:05 -0400
Subject: [PATCH 1082/1852] CHROMIUM: drm/rockchip: Fix hdcp logging to use
 DRM_DEV_*

The rest of the driver uses DRM_DEV_*, so too should the hdcp functions.
This patch also prints error messages when enable/disable fails, as well
as info messages when hdcp is successfully enabled/disabled.

BUG=b:63816472
TEST=Enable hdcp, log messages are prefixed with drm goo

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657940
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I2503ba4ce6839bb8d9db77ae88446da4888732d5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 34 +++++++++++++++++---------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 7a0a10af45ef4..078397a92ffdc 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -207,14 +207,15 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	uint64_t *buf;
 
 	if (!dp->active) {
-		dev_err(dp->dev, "firmware is not active\n");
+		DRM_DEV_ERROR(dp->dev, "firmware is not active\n");
 		return 0;
 	}
 
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_TRANSFER,
 		      0, 0, 0, 0, 0, 0, &res);
 	if (res.a0) {
-		dev_err(dp->dev, "start hdcp transfer failed: %#lx\n", res.a0);
+		DRM_DEV_ERROR(dp->dev, "start hdcp transfer failed: %#lx\n",
+			      res.a0);
 		return -EIO;
 	}
 
@@ -226,7 +227,7 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 			      buf[2], buf[3], buf[4], buf[5], 0, &res);
 
 	if (res.a0) {
-		dev_err(dp->dev, "send hdcp keys failed: %#lx\n", res.a0);
+		DRM_DEV_ERROR(dp->dev, "send hdcp keys failed: %#lx\n", res.a0);
 		return -EIO;
 	}
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_DECRYPT,
@@ -234,7 +235,8 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 
 	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, true);
 	if (ret) {
-		dev_err(dp->dev, "start hdcp authentication failed: %d\n", ret);
+		DRM_DEV_ERROR(dp->dev, "start hdcp authentication failed: %d\n",
+			      ret);
 		return ret;
 	}
 
@@ -327,10 +329,17 @@ static int cdn_dp_set_content_protection(struct cdn_dp_device *dp,
 
 	mutex_lock(&dp->lock);
 
-	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED)
+	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED) {
 		ret = cdn_dp_start_hdcp1x_auth(dp);
-	else
+		if (ret)
+			DRM_DEV_ERROR(dp->dev, "Enable HDCP failed %d\n", ret);
+	} else {
 		ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
+		if (!ret)
+			DRM_DEV_INFO(dp->dev, "HDCP has been disabled\n");
+		else
+			DRM_DEV_ERROR(dp->dev, "Disable HDCP failed %d\n", ret);
+	}
 
 	mutex_unlock(&dp->lock);
 
@@ -1239,7 +1248,7 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 		if (ret)
 			goto out;
 		if (HDCP_TX_STATUS_ERROR(tx_status)) {
-			dev_err(dp->dev, "hdcp status error: %#x\n",
+			DRM_DEV_ERROR(dp->dev, "hdcp status error: %#x\n",
 				HDCP_TX_STATUS_ERROR(tx_status));
 			goto out;
 		} else if (tx_status & HDCP_TX_STATUS_AUTHENTICATED) {
@@ -1279,7 +1288,7 @@ static void cdn_dp_hdcp_event_work(struct work_struct *work)
 				 auth_done, HDCP_RETRY_INTERVAL_US,
 				 HDCP_EVENT_TIMEOUT_US);
 	if (ret)
-		dev_err(dp->dev, "Failed to authorize hdcp %d\n", ret);
+		DRM_DEV_ERROR(dp->dev, "Failed to authorize hdcp\n");
 }
 
 static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
@@ -1423,13 +1432,13 @@ static ssize_t hdcp_key_store(struct device *dev,
 	 * would be (308 * 2) byte.
 	 */
 	if (count != (CDN_DP_HDCP_KEY_LEN * 2)) {
-		dev_err(dev, "mis-match hdcp cipher length\n");
+		DRM_DEV_ERROR(dev, "mis-match hdcp cipher length\n");
 		return -EINVAL;
 	}
 
 	cell = nvmem_cell_get(dev, "cpu-id");
 	if (IS_ERR(cell)) {
-		dev_err(dev, "missing cpu-id nvmen cell property\n");
+		DRM_DEV_ERROR(dev, "missing cpu-id nvmen cell property\n");
 		return -ENODEV;
 	}
 
@@ -1440,7 +1449,7 @@ static ssize_t hdcp_key_store(struct device *dev,
 		return PTR_ERR(cpu_id);
 
 	if (len != CDN_DP_HDCP_UID_LEN) {
-		dev_err(dev, "mismatch cpu-id size\n");
+		DRM_DEV_ERROR(dev, "mismatch cpu-id size\n");
 		ret = -EINVAL;
 		goto err;
 	}
@@ -1455,7 +1464,8 @@ static ssize_t hdcp_key_store(struct device *dev,
 	 */
 	ret = hex2bin((u8 *)&dp->key, buf, CDN_DP_HDCP_KEY_LEN);
 	if (ret) {
-		dev_err(dev, "failed to decode the input HDCP key format\n");
+		DRM_DEV_ERROR(dev, "decode input HDCP key format failed %d\n",
+			      ret);
 		goto err;
 	}
 

From 166a087fd66e6c5bf596d4243f038cab16aafd2d Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 26 Sep 2017 13:48:56 -0400
Subject: [PATCH 1083/1852] CHROMIUM: drm/rockchip: Enable/disable HDCP at the
 correct times

This patch adds new calls for HDCP disable/enable such that HDCP is
properly disabled/restored across hotplugs (both dongle and cable) and
power on/off.

BUG=b:63816472
TEST=Use hdcp test script below:
	attr=/sys/class/drm/card1-DP-1/content_protection
	printf "Testing HDCP...\n"
	while [ 1 ]; do
            printf "\rSetting state to desired...  "
            echo "Desired" > $attr
            sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
            printf "\rSetting state to undesired..."
            echo "Undesired" > $attr
            sleep $(perl -e 'printf("%.1f\n", rand() * 3)')
	done

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/657941
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I4bcc7decc43f7b648054d841efbade7315e785fe
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 141 ++++++++++++++++++-------
 drivers/gpu/drm/rockchip/cdn-dp-core.h |   1 +
 2 files changed, 103 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 078397a92ffdc..4b2e44f689b44 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -246,6 +246,49 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	return ret;
 }
 
+static int cdn_dp_set_hdcp_drm_property(struct cdn_dp_device *dp, uint64_t val)
+{
+	struct drm_connector *connector = &dp->connector;
+	struct drm_mode_config *mc = &connector->dev->mode_config;
+	int ret;
+
+	ret = drm_object_property_set_value(&connector->base,
+					    mc->content_protection_property,
+					    val);
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "Failed to set CP prop to %lld/%d\n",
+			      val, ret);
+	return ret;
+}
+
+static int cdn_dp_stop_hdcp1x_auth(struct cdn_dp_device *dp)
+{
+	int ret;
+
+	if (!dp->active)
+		return 0;
+
+	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
+	if (!ret)
+		DRM_DEV_INFO(dp->dev, "HDCP has been disabled\n");
+	else
+		DRM_DEV_ERROR(dp->dev, "Disable HDCP failed %d\n", ret);
+
+	if (!dp->hdcp_desired)
+		return ret;
+	/*
+	 * In the case where we're disabling hdcp while it's still desired,
+	 * set the property value back to DESIRED to reflect that hdcp is
+	 * no longer enabled
+	 */
+	ret = cdn_dp_set_hdcp_drm_property(dp,
+			DRM_MODE_CONTENT_PROTECTION_DESIRED);
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "Failed set CP property to DESIRED %d\n",
+				ret);
+	return ret;
+}
+
 static struct cdn_dp_port *cdn_dp_connected_port(struct cdn_dp_device *dp)
 {
 	struct cdn_dp_port *port;
@@ -313,34 +356,36 @@ static void cdn_dp_connector_destroy(struct drm_connector *connector)
 	drm_connector_cleanup(connector);
 }
 
-static int cdn_dp_set_content_protection(struct cdn_dp_device *dp,
-					 struct drm_mode_object *obj,
-					 struct drm_property *property,
+static int cdn_dp_set_content_protection(struct drm_connector *connector,
 					 uint64_t val)
 {
+	struct cdn_dp_device *dp = connector_to_dp(connector);
+	struct drm_property *property;
+	struct drm_mode_config *mode_config = &connector->dev->mode_config;
 	int ret;
 
-	/* Only the driver can set to enabled */
-	if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED)
-		return -EINVAL;
+	property = mode_config->content_protection_property;
 
 	/* If we're in a state transition already, wait for it to finish */
 	cancel_delayed_work_sync(&dp->hdcp_event_work);
 
 	mutex_lock(&dp->lock);
 
-	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED) {
+	ret = cdn_dp_set_hdcp_drm_property(dp, val);
+	if (ret)
+		goto out;
+
+	dp->hdcp_desired = val == DRM_MODE_CONTENT_PROTECTION_DESIRED;
+	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED)
 		ret = cdn_dp_start_hdcp1x_auth(dp);
-		if (ret)
-			DRM_DEV_ERROR(dp->dev, "Enable HDCP failed %d\n", ret);
-	} else {
-		ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
-		if (!ret)
-			DRM_DEV_INFO(dp->dev, "HDCP has been disabled\n");
-		else
-			DRM_DEV_ERROR(dp->dev, "Disable HDCP failed %d\n", ret);
-	}
+	else
+		ret = cdn_dp_stop_hdcp1x_auth(dp);
+
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "%s HDCP failed %d\n",
+				dp->hdcp_desired ? "Enable" : "Disable", ret);
 
+out:
 	mutex_unlock(&dp->lock);
 
 	return ret;
@@ -350,14 +395,14 @@ static int cdn_dp_connector_set_property(struct drm_connector *connector,
 						struct drm_property *property,
 						uint64_t val)
 {
-	struct cdn_dp_device *dp = connector_to_dp(connector);
-	int ret = 0;
-
-	if (strcmp(property->name, "Content Protection") == 0)
-		ret = cdn_dp_set_content_protection(dp, &connector->base,
-						    property, val);
+	if (strcmp(property->name, "Content Protection") == 0) {
+		/* Only the driver can set to enabled */
+		if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+			return -EINVAL;
 
-	return ret;
+		return cdn_dp_set_content_protection(connector, val);
+	}
+	return 0;
 }
 
 static int cdn_dp_connector_atomic_get_property(
@@ -652,9 +697,17 @@ static int cdn_dp_disable(struct cdn_dp_device *dp)
 {
 	int ret, i;
 
+	WARN_ON(!mutex_is_locked(&dp->lock));
+
 	if (!dp->active)
 		return 0;
 
+	if (dp->hdcp_desired) {
+		ret = cdn_dp_stop_hdcp1x_auth(dp);
+		if (ret)
+			DRM_DEV_ERROR(dp->dev, "Failed to stop hdcp%d\n", ret);
+	}
+
 	for (i = 0; i < dp->ports; i++)
 		cdn_dp_disable_phy(dp, dp->port[i]);
 
@@ -830,6 +883,12 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
 		DRM_DEV_ERROR(dp->dev, "Failed to valid video %d\n", ret);
 		goto out;
 	}
+
+	if (dp->hdcp_desired) {
+		ret = cdn_dp_start_hdcp1x_auth(dp);
+		if (ret)
+			DRM_DEV_ERROR(dp->dev, "hdcp start failed %d\n", ret);
+	}
 out:
 	mutex_unlock(&dp->lock);
 	if (!ret) {
@@ -1143,6 +1202,8 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
 	if (!cdn_dp_connected_port(dp)) {
 		DRM_DEV_INFO(dp->dev, "Not connected. Disabling cdn\n");
 		dp->connected = false;
+		if (dp->hdcp_desired)
+			cdn_dp_stop_hdcp1x_auth(dp);
 
 	/* Connected but not enabled, enable the block */
 	} else if (!dp->active) {
@@ -1151,12 +1212,16 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
 		if (ret) {
 			DRM_DEV_ERROR(dp->dev, "Enable dp failed %d\n", ret);
 			dp->connected = false;
+			if (dp->hdcp_desired)
+				cdn_dp_stop_hdcp1x_auth(dp);
 		}
 
 	/* Enabled and connected to a dongle without a sink, notify userspace */
 	} else if (!cdn_dp_check_sink_connection(dp)) {
 		DRM_DEV_INFO(dp->dev, "Connected without sink. Assert hpd\n");
 		dp->connected = false;
+		if (dp->hdcp_desired)
+			cdn_dp_stop_hdcp1x_auth(dp);
 
 	/* Enabled and connected with a sink, re-train if requested */
 	} else if (!cdn_dp_check_link_status(dp)) {
@@ -1183,6 +1248,14 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
 					      ret);
 			}
 		}
+
+		if (dp->hdcp_desired) {
+			ret = cdn_dp_start_hdcp1x_auth(dp);
+			if (ret)
+				DRM_DEV_ERROR(dp->dev,
+					      "Failed to re-enable hdcp %d\n",
+					      ret);
+		}
 	}
 
 out:
@@ -1211,22 +1284,12 @@ static int cdn_dp_pd_event(struct notifier_block *nb,
 	return NOTIFY_DONE;
 }
 
-static int cdn_dp_set_hdcp_drm_property(struct cdn_dp_device *dp, uint64_t val)
-{
-	struct drm_connector *connector = &dp->connector;
-	struct drm_mode_config *mc = &connector->dev->mode_config;
-
-	return drm_object_property_set_value(&connector->base,
-					     mc->content_protection_property,
-					     val);
-}
-
 static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 {
 	bool auth_done = false;
 	u16 tx_status;
 	u32 sw_event;
-	int ret;
+	int ret = 0;
 
 	mutex_lock(&dp->lock);
 
@@ -1242,8 +1305,6 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 	sw_event = cdn_dp_get_event(dp);
 
 	if (sw_event & HDCP_TX_STATUS_EVENT) {
-		auth_done = true;
-
 		ret = cdn_dp_hdcp_tx_status_req(dp, &tx_status);
 		if (ret)
 			goto out;
@@ -1252,11 +1313,13 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 				HDCP_TX_STATUS_ERROR(tx_status));
 			goto out;
 		} else if (tx_status & HDCP_TX_STATUS_AUTHENTICATED) {
-			cdn_dp_set_hdcp_drm_property(dp,
+			ret = cdn_dp_set_hdcp_drm_property(dp,
 				DRM_MODE_CONTENT_PROTECTION_ENABLED);
+			if (!ret) {
+				auth_done = true;
+				DRM_DEV_INFO(dp->dev, "HDCP is enabled\n");
+			}
 			goto out;
-		} else {
-			auth_done = false;
 		}
 	}
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 22f059268afe5..7e9e126e47d67 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -134,6 +134,7 @@ struct cdn_dp_device {
 #ifdef CONFIG_SWITCH
 	struct switch_dev switchdev;
 #endif
+	bool hdcp_desired;
 	struct cdn_dp_hdcp_key_1x key;
 	struct delayed_work hdcp_event_work;
 };

From 61c28bf64cc6fa3be75a4c41274a82acc09928a7 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 26 Sep 2017 13:50:44 -0400
Subject: [PATCH 1084/1852] CHROMIUM: drm/rockchip: Move HDCP_TX_CONFIGURATION
 bits to #defines

Instead of using an enum to define the values of the HDCP_TX_CONFIGURATION
register, use #defines with descriptive names and explicit values.

BUG=None
TEST=Compiles

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/687801
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: Id78cb0b1655fb8c1629f5e1c2ef2cc075475bff8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c |  6 ++++--
 drivers/gpu/drm/rockchip/cdn-dp-reg.h  | 11 +++++------
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 4b2e44f689b44..469b4a19f9b6f 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -233,7 +233,8 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_DECRYPT,
 		      0, 0, 0, 0, 0, 0, &res);
 
-	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, true);
+	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_CONFIGURATION_HDCP_V1,
+					   true);
 	if (ret) {
 		DRM_DEV_ERROR(dp->dev, "start hdcp authentication failed: %d\n",
 			      ret);
@@ -268,7 +269,8 @@ static int cdn_dp_stop_hdcp1x_auth(struct cdn_dp_device *dp)
 	if (!dp->active)
 		return 0;
 
-	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_1, false);
+	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_CONFIGURATION_HDCP_V1,
+					   false);
 	if (!ret)
 		DRM_DEV_INFO(dp->dev, "HDCP has been disabled\n");
 	else
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 78d9706ef1544..51648a96a6bfc 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -344,6 +344,11 @@
 #define IS_HDCP_TX_RECEIVER_ID_VALID_RESP_SIZE_VALID(x)	\
 			(((((x) - 2) % 5) == 0) || ((((x) - 4) % 5) == 0))
 
+/* For configuring which version of HDCP to use */
+#define HDCP_TX_CONFIGURATION_HDCP_V2		0x0
+#define HDCP_TX_CONFIGURATION_HDCP_V1		0x1
+#define HDCP_TX_CONFIGURATION_HDCP_VBEST	0x2
+
 #define DPTX_SET_POWER_MNG			0x00
 #define DPTX_SET_HOST_CAPABILITIES		0x01
 #define DPTX_GET_EDID				0x02
@@ -483,12 +488,6 @@ enum vic_bt_type {
 	BT_709 = 0x1,
 };
 
-enum HDCP_TX_SUPPORT {
-	HDCP_TX_2,
-	HDCP_TX_1,
-	HDCP_TX_BOTH,
-};
-
 struct cdn_dp_device;
 struct audio_info;
 

From e4ef640e4df13b1b4492fa9124a5eb7ca64278e7 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 26 Sep 2017 16:56:42 -0400
Subject: [PATCH 1085/1852] CHROMIUM: drm/rockchip: Disable HDCP before
 enabling it

Enabling HDCP on plug/re-plug when already desired was flakey. However,
toggling the property always worked when already plugged in. It seems
like the hardware wants to be explicitly disabled before being enabled.
This patch adds the disable with a short wait before kicking off HDCP.

BUG=b:63816472
TEST=Two cases:
	1)
		- Boot device with dongle unplugged
		- Mark HDCP as desired
		- Plug HDMI + dongle
		- Ensure HDCP is enabled
	2)
		- Plug HDMI + dongle
		- Mark HDCP as desired, wait for it to enable
		- Unplug HDMI from dongle
		- Replug HDMI to dongle
		- Ensure HDCP is enabled

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/687802
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I7c1dfd93bad60483d04525b79c6f75b728096ed4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 469b4a19f9b6f..425f1e22b4fe8 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -40,6 +40,7 @@
 #include "cdn-dp-reg.h"
 #include "rockchip_drm_vop.h"
 
+#define HDCP_TOGGLE_INTERVAL_US		10000
 #define HDCP_RETRY_INTERVAL_US		20000
 #define HDCP_EVENT_TIMEOUT_US		3000000
 #define HDCP_AUTHENTICATE_DELAY_MS	400
@@ -233,6 +234,19 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	arm_smccc_smc(RK_SIP_HDCP_CONTROL, HDCP_KEY_DATA_START_DECRYPT,
 		      0, 0, 0, 0, 0, 0, &res);
 
+	/*
+	 * First thing's first, disable HDCP. The hardware likes to start with
+	 * a fresh slate, so this ensures that re-enabling on unplug/replug
+	 * works.
+	 */
+	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_CONFIGURATION_HDCP_V1,
+					   false);
+	if (ret) {
+		DRM_DEV_ERROR(dp->dev, "HDCP pre-disable failed %d\n", ret);
+		return ret;
+	}
+	usleep_range(HDCP_TOGGLE_INTERVAL_US, HDCP_TOGGLE_INTERVAL_US * 2);
+
 	ret = cdn_dp_hdcp_tx_configuration(dp, HDCP_TX_CONFIGURATION_HDCP_V1,
 					   true);
 	if (ret) {

From 646b0ea73f96dd0665df318f9edd6f51f66c7330 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Fri, 12 Jan 2018 10:12:43 -0500
Subject: [PATCH 1086/1852] BACKPORT: drm: Add Content Protection property

This patch adds a new optional connector property to allow userspace to enable
protection over the content it is displaying. This will typically be implemented
by the driver using HDCP.

The property is a tri-state with the following values:
- OFF: Self explanatory, no content protection
- DESIRED: Userspace requests that the driver enable protection
- ENABLED: Once the driver has authenticated the link, it sets this value

The driver is responsible for downgrading ENABLED to DESIRED if the link becomes
unprotected. The driver should also maintain the desiredness of protection
across hotplug/dpms/suspend.

If this looks familiar, I posted [1] this 3 years ago. We have been using this
in ChromeOS across exynos, mediatek, and rockchip over that time.

Changes in v2:
 - Pimp kerneldoc for content_protection_property (Daniel)
 - Drop sysfs attribute
Changes in v3:
 - None
Changes in v4:
- Changed kerneldoc to recommend userspace polling (Daniel)
- Changed kerneldoc to briefly describe how to attach the property (Daniel)
Changes in v5:
- checkpatch whitespace noise
- Change DRM_MODE_CONTENT_PROTECTION_OFF to DRM_MODE_CONTENT_PROTECTION_UNDESIRED
Changes in v6:
- None

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Sean Paul <seanpaul@chromium.org>

[1] https://lists.freedesktop.org/archives/dri-devel/2014-December/073336.html
Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-4-seanpaul@chromium.org

(cherry picked from commit 24557865c8b1a6d0eaccaac47aabd9b23badf8fd)
Signed-off-by: Sean Paul <seanpaul@chromium.org>

[downstream changes]
 - Fixed some conflicts in comments
- Remove duplicate definition for drm_get_content_protection_name

Change-Id: I825b4863bea715434cb8f76f99fdf6e3fca74a60
Reviewed-on: https://chromium-review.googlesource.com/849079
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Sean Paul <seanpaul@google.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/drm_atomic.c |  8 ++++++++
 drivers/gpu/drm/drm_crtc.c   | 36 ++++++++++++++++++++++++++++++++++++
 include/drm/drm_crtc.h       | 16 ++++++++++++++++
 include/uapi/drm/drm_mode.h  |  5 +++++
 4 files changed, 65 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 9f80708e3a776..c424c1948b4ee 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -979,6 +979,12 @@ int drm_atomic_connector_set_property(struct drm_connector *connector,
 		 * now?) atomic writes to DPMS property:
 		 */
 		return -EINVAL;
+	} else if (property == connector->content_protection_property) {
+		if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
+			DRM_DEBUG_KMS("only drivers can set CP Enabled\n");
+			return -EINVAL;
+		}
+		state->content_protection = val;
 	} else if (property == config->tv_select_subconnector_property) {
 		state->tv.subconnector = val;
 	} else if (property == config->tv_left_margin_property) {
@@ -1042,6 +1048,8 @@ drm_atomic_connector_get_property(struct drm_connector *connector,
 		*val = (state->crtc) ? state->crtc->base.id : 0;
 	} else if (property == config->dpms_property) {
 		*val = connector->dpms;
+	} else if (property == connector->content_protection_property) {
+		*val = state->content_protection;
 	} else if (property == config->tv_select_subconnector_property) {
 		*val = state->tv.subconnector;
 	} else if (property == config->tv_left_margin_property) {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index fd84556e2bf34..173a52afd21dd 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1988,6 +1988,42 @@ int drm_mode_create_scaling_mode_property(struct drm_device *dev)
 }
 EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
 
+/**
+ * drm_connector_attach_content_protection_property - attach content protection
+ * property
+ *
+ * @connector: connector to attach CP property on.
+ *
+ * This is used to add support for content protection on select connectors.
+ * Content Protection is intentionally vague to allow for different underlying
+ * technologies, however it is most implemented by HDCP.
+ *
+ * The content protection will be set to &drm_connector_state.content_protection
+ *
+ * Returns:
+ * Zero on success, negative errno on failure.
+ */
+int drm_connector_attach_content_protection_property(
+		struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+	struct drm_property *prop;
+
+	prop = drm_property_create_enum(dev, 0, "Content Protection",
+					drm_cp_enum_list,
+					ARRAY_SIZE(drm_cp_enum_list));
+	if (!prop)
+		return -ENOMEM;
+
+	drm_object_attach_property(&connector->base, prop,
+				   DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
+
+	connector->content_protection_property = prop;
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_connector_attach_content_protection_property);
+
 /**
  * drm_mode_create_aspect_ratio_property - create aspect ratio property
  * @dev: DRM device
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index e7fb665befea4..9b2d4b6766a9d 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -716,6 +716,12 @@ struct drm_connector_state {
 
 	struct drm_atomic_state *state;
 
+	/**
+	 * @content_protection: Connector property to request content
+	 * protection. This is most commonly used for HDCP.
+	 */
+	unsigned int content_protection;
+
 	struct drm_tv_connector_state tv;
 
 	/**
@@ -946,6 +952,7 @@ struct drm_encoder {
  * @tile_v_loc: vertical location of this tile
  * @tile_h_size: horizontal size of this tile.
  * @tile_v_size: vertical size of this tile.
+ * @content_protection_property: Optional property to control content protection
  *
  * Each connector may be connected to one or more CRTCs, or may be clonable by
  * another connector if they can share a CRTC.  Each connector also has a specific
@@ -989,6 +996,12 @@ struct drm_connector {
 	struct drm_property_blob *edid_blob_ptr;
 	struct drm_object_properties properties;
 
+	/**
+	 * @content_protection_property: DRM ENUM property for content
+	 * protection
+	 */
+	struct drm_property *content_protection_property;
+
 	struct drm_property_blob *path_blob_ptr;
 
 	struct drm_property_blob *tile_blob_ptr;
@@ -1840,6 +1853,7 @@ extern const char *drm_get_dvi_i_subconnector_name(int val);
 extern const char *drm_get_dvi_i_select_name(int val);
 extern const char *drm_get_tv_subconnector_name(int val);
 extern const char *drm_get_tv_select_name(int val);
+extern const char *drm_get_content_protection_name(int val);
 extern const char *drm_get_connector_name(int val);
 extern void drm_fb_release(struct drm_file *file_priv);
 extern void drm_property_destroy_user_blobs(struct drm_device *dev,
@@ -1937,6 +1951,8 @@ extern int drm_mode_create_tv_properties(struct drm_device *dev,
 					 unsigned int num_modes,
 					 const char * const modes[]);
 extern int drm_mode_create_scaling_mode_property(struct drm_device *dev);
+extern int drm_connector_attach_content_protection_property(
+			struct drm_connector *connector);
 extern int drm_mode_create_aspect_ratio_property(struct drm_device *dev);
 extern int drm_mode_create_dirty_info_property(struct drm_device *dev);
 extern int drm_mode_create_suggested_offset_properties(struct drm_device *dev);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index e2f7b7ced60fc..ddb2bcf97760e 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -117,6 +117,11 @@
 #define DRM_MODE_DIRTY_ON       1
 #define DRM_MODE_DIRTY_ANNOTATE 2
 
+/* Content Protection Flags */
+#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED	0
+#define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
+#define DRM_MODE_CONTENT_PROTECTION_ENABLED     2
+
 struct drm_mode_modeinfo {
 	__u32 clock;
 	__u16 hdisplay;

From f502f7b43e67dec8743b2cb4005c4640b38550f6 Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Thu, 11 Jan 2018 16:30:26 -0500
Subject: [PATCH 1087/1852] CHROMIUM: drm/rockchip: Refactor cdn-dp hdcp code

This patch transitions our rockchip driver to using the upstream
content_protection_property (located in drm_connector) as opposed to the
downstream version that's in mode_config.

In addition to the new location of the property, this patch also makes
HDCP enablement work via atomic commits in addition to the legacy
setproperty ioctl.

The trickiest part of making this work is ensuring we keep the
connector->state->content_protection value in sync with what the
hardware is doing. We're only allowed to change this value in
atomic_check (which we do for certain transitions), however we have to
be careful when updating it outside of atomic_check, this requires
locks. In order to update the property without races, we need a new property
worker whose job is to acquire the connection and dp locks and update the state.
It's not possible to do this without the dedicated worker since the hdcp event
worker doesn't hold the connection mutex, and can't acquire it since we
synchronously cancel it while holding the connection mutex elsewhere. Sigh.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/864343
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I22d2592096866d2346bc9b48f48e66e845a173f8
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 241 +++++++++++++++----------
 drivers/gpu/drm/rockchip/cdn-dp-core.h |   2 +
 2 files changed, 144 insertions(+), 99 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 425f1e22b4fe8..c456221bba973 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -13,6 +13,7 @@
  */
 
 #include <drm/drmP.h>
+#include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_dp_helper.h>
@@ -261,21 +262,6 @@ static int cdn_dp_start_hdcp1x_auth(struct cdn_dp_device *dp)
 	return ret;
 }
 
-static int cdn_dp_set_hdcp_drm_property(struct cdn_dp_device *dp, uint64_t val)
-{
-	struct drm_connector *connector = &dp->connector;
-	struct drm_mode_config *mc = &connector->dev->mode_config;
-	int ret;
-
-	ret = drm_object_property_set_value(&connector->base,
-					    mc->content_protection_property,
-					    val);
-	if (ret)
-		DRM_DEV_ERROR(dp->dev, "Failed to set CP prop to %lld/%d\n",
-			      val, ret);
-	return ret;
-}
-
 static int cdn_dp_stop_hdcp1x_auth(struct cdn_dp_device *dp)
 {
 	int ret;
@@ -290,18 +276,16 @@ static int cdn_dp_stop_hdcp1x_auth(struct cdn_dp_device *dp)
 	else
 		DRM_DEV_ERROR(dp->dev, "Disable HDCP failed %d\n", ret);
 
-	if (!dp->hdcp_desired)
-		return ret;
-	/*
-	 * In the case where we're disabling hdcp while it's still desired,
-	 * set the property value back to DESIRED to reflect that hdcp is
-	 * no longer enabled
+	dp->hdcp_enabled = false;
+
+	/* If hdcp is still desired, we're disabling because of error or
+	 * hotplug. In both of these cases, we'll want to change the content
+	 * protection property from ENABLED to DESIRED. Schedule the property
+	 * worker for this.
 	 */
-	ret = cdn_dp_set_hdcp_drm_property(dp,
-			DRM_MODE_CONTENT_PROTECTION_DESIRED);
-	if (ret)
-		DRM_DEV_ERROR(dp->dev, "Failed set CP property to DESIRED %d\n",
-				ret);
+	if (dp->hdcp_desired)
+		schedule_work(&dp->hdcp_prop_work);
+
 	return ret;
 }
 
@@ -372,65 +356,15 @@ static void cdn_dp_connector_destroy(struct drm_connector *connector)
 	drm_connector_cleanup(connector);
 }
 
-static int cdn_dp_set_content_protection(struct drm_connector *connector,
-					 uint64_t val)
-{
-	struct cdn_dp_device *dp = connector_to_dp(connector);
-	struct drm_property *property;
-	struct drm_mode_config *mode_config = &connector->dev->mode_config;
-	int ret;
-
-	property = mode_config->content_protection_property;
-
-	/* If we're in a state transition already, wait for it to finish */
-	cancel_delayed_work_sync(&dp->hdcp_event_work);
-
-	mutex_lock(&dp->lock);
-
-	ret = cdn_dp_set_hdcp_drm_property(dp, val);
-	if (ret)
-		goto out;
-
-	dp->hdcp_desired = val == DRM_MODE_CONTENT_PROTECTION_DESIRED;
-	if (val == DRM_MODE_CONTENT_PROTECTION_DESIRED)
-		ret = cdn_dp_start_hdcp1x_auth(dp);
-	else
-		ret = cdn_dp_stop_hdcp1x_auth(dp);
-
-	if (ret)
-		DRM_DEV_ERROR(dp->dev, "%s HDCP failed %d\n",
-				dp->hdcp_desired ? "Enable" : "Disable", ret);
-
-out:
-	mutex_unlock(&dp->lock);
-
-	return ret;
-}
-
-static int cdn_dp_connector_set_property(struct drm_connector *connector,
-						struct drm_property *property,
-						uint64_t val)
-{
-	if (strcmp(property->name, "Content Protection") == 0) {
-		/* Only the driver can set to enabled */
-		if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED)
-			return -EINVAL;
-
-		return cdn_dp_set_content_protection(connector, val);
-	}
-	return 0;
-}
-
 static int cdn_dp_connector_atomic_get_property(
 					struct drm_connector *connector,
 					const struct drm_connector_state *state,
 					struct drm_property *property,
 					uint64_t *val)
 {
-	struct drm_mode_config *mc = &connector->dev->mode_config;
 	int i;
 
-	if (property == mc->content_protection_property) {
+	if (property == connector->content_protection_property) {
 		for (i = 0; i < connector->properties.count; i++) {
 			if (connector->properties.properties[i] == property) {
 				*val = connector->properties.values[i];
@@ -448,12 +382,16 @@ static const struct drm_connector_funcs cdn_dp_atomic_connector_funcs = {
 	.destroy = cdn_dp_connector_destroy,
 	.fill_modes = drm_helper_probe_single_connector_modes,
 	.reset = drm_atomic_helper_connector_reset,
-	.set_property = cdn_dp_connector_set_property,
+	.set_property = drm_atomic_helper_connector_set_property,
 	.atomic_get_property = cdn_dp_connector_atomic_get_property,
 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };
 
+bool is_connector_cdn_dp(struct drm_connector *connector) {
+	return connector->funcs == &cdn_dp_atomic_connector_funcs;
+}
+
 static int cdn_dp_connector_get_modes(struct drm_connector *connector)
 {
 	struct cdn_dp_device *dp = connector_to_dp(connector);
@@ -718,12 +656,6 @@ static int cdn_dp_disable(struct cdn_dp_device *dp)
 	if (!dp->active)
 		return 0;
 
-	if (dp->hdcp_desired) {
-		ret = cdn_dp_stop_hdcp1x_auth(dp);
-		if (ret)
-			DRM_DEV_ERROR(dp->dev, "Failed to stop hdcp%d\n", ret);
-	}
-
 	for (i = 0; i < dp->ports; i++)
 		cdn_dp_disable_phy(dp, dp->port[i]);
 
@@ -793,6 +725,13 @@ static int cdn_dp_enable(struct cdn_dp_device *dp)
 		}
 	}
 
+	/* Enable hdcp if it's desired */
+	if (dp->connector.state->content_protection ==
+	    DRM_MODE_CONTENT_PROTECTION_DESIRED)
+		ret = cdn_dp_start_hdcp1x_auth(dp);
+
+	return ret;
+
 err_clk_disable:
 	cdn_dp_clk_disable(dp);
 	return ret;
@@ -899,12 +838,6 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
 		DRM_DEV_ERROR(dp->dev, "Failed to valid video %d\n", ret);
 		goto out;
 	}
-
-	if (dp->hdcp_desired) {
-		ret = cdn_dp_start_hdcp1x_auth(dp);
-		if (ret)
-			DRM_DEV_ERROR(dp->dev, "hdcp start failed %d\n", ret);
-	}
 out:
 	mutex_unlock(&dp->lock);
 	if (!ret) {
@@ -922,6 +855,7 @@ static void cdn_dp_encoder_disable(struct drm_encoder *encoder)
 	int ret;
 
 	mutex_lock(&dp->lock);
+
 	if (dp->active) {
 		ret = cdn_dp_disable(dp);
 		if (ret) {
@@ -949,11 +883,72 @@ static void cdn_dp_encoder_disable(struct drm_encoder *encoder)
 		schedule_work(&dp->event_work);
 }
 
+void cdn_dp_hdcp_atomic_enable(struct drm_connector *connector)
+{
+	struct cdn_dp_device *dp = connector_to_dp(connector);
+	int ret;
+
+	cancel_delayed_work_sync(&dp->hdcp_event_work);
+
+	mutex_lock(&dp->lock);
+
+	dp->hdcp_desired = true;
+
+	ret = cdn_dp_start_hdcp1x_auth(dp);
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "hdcp start failed %d\n", ret);
+
+	mutex_unlock(&dp->lock);
+}
+
+void cdn_dp_hdcp_atomic_disable(struct drm_connector *connector)
+{
+	struct cdn_dp_device *dp = connector_to_dp(connector);
+	uint64_t val;
+	int ret;
+
+	cancel_delayed_work_sync(&dp->hdcp_event_work);
+
+	mutex_lock(&dp->lock);
+
+	val = dp->connector.state->content_protection;
+	dp->hdcp_desired = val == DRM_MODE_CONTENT_PROTECTION_DESIRED;
+
+	ret = cdn_dp_stop_hdcp1x_auth(dp);
+	if (ret)
+		DRM_DEV_ERROR(dp->dev, "Failed to stop hdcp%d\n", ret);
+
+	mutex_unlock(&dp->lock);
+}
+
+static int cdn_dp_hdcp_atomic_check(struct cdn_dp_device *dp,
+				    uint64_t old_val,
+				    struct drm_crtc_state *crtc_state,
+				    struct drm_connector_state *conn_state)
+{
+	mutex_lock(&dp->lock);
+
+	if (!conn_state->crtc) {
+		/*
+		 * If the connector is being disabled with CP enabled, mark it
+		 * desired so it's re-enabled when the connector is brought back
+		 */
+		if (old_val == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+			conn_state->content_protection =
+				DRM_MODE_CONTENT_PROTECTION_DESIRED;
+	}
+
+	mutex_unlock(&dp->lock);
+	return 0;
+}
+
 static int cdn_dp_encoder_atomic_check(struct drm_encoder *encoder,
 				       struct drm_crtc_state *crtc_state,
 				       struct drm_connector_state *conn_state)
 {
+	struct cdn_dp_device *dp = encoder_to_dp(encoder);
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	uint64_t old_cp = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_DisplayPort;
@@ -962,7 +957,10 @@ static int cdn_dp_encoder_atomic_check(struct drm_encoder *encoder,
 	s->eotf = TRADITIONAL_GAMMA_SDR;
 	s->color_space = V4L2_COLORSPACE_DEFAULT;
 
-	return 0;
+	if (dp->connector.state)
+		old_cp = dp->connector.state->content_protection;
+
+	return cdn_dp_hdcp_atomic_check(dp, old_cp, crtc_state, conn_state);
 }
 
 static const struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = {
@@ -1325,13 +1323,13 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 		if (ret)
 			goto out;
 		if (HDCP_TX_STATUS_ERROR(tx_status)) {
+			dp->hdcp_enabled = false;
 			DRM_DEV_ERROR(dp->dev, "hdcp status error: %#x\n",
 				HDCP_TX_STATUS_ERROR(tx_status));
 			goto out;
 		} else if (tx_status & HDCP_TX_STATUS_AUTHENTICATED) {
-			ret = cdn_dp_set_hdcp_drm_property(dp,
-				DRM_MODE_CONTENT_PROTECTION_ENABLED);
 			if (!ret) {
+				dp->hdcp_enabled = true;
 				auth_done = true;
 				DRM_DEV_INFO(dp->dev, "HDCP is enabled\n");
 			}
@@ -1342,12 +1340,15 @@ static bool cdn_dp_hdcp_authorize(struct cdn_dp_device *dp)
 	if (sw_event & HDCP_TX_IS_RECEIVER_ID_VALID_EVENT) {
 		ret = cdn_dp_hdcp_tx_is_receiver_id_valid_req(dp);
 		if (ret) {
+			dp->hdcp_enabled = false;
 			auth_done = true;
 			goto out;
 		}
 		ret = cdn_dp_hdcp_tx_respond_id_valid(dp, true);
-		if (ret)
+		if (ret) {
+			dp->hdcp_enabled = false;
 			auth_done = true;
+		}
 	}
 
 out:
@@ -1368,6 +1369,47 @@ static void cdn_dp_hdcp_event_work(struct work_struct *work)
 				 HDCP_EVENT_TIMEOUT_US);
 	if (ret)
 		DRM_DEV_ERROR(dp->dev, "Failed to authorize hdcp\n");
+
+	/*
+	 * Ensure the content_protection property value is consistent with the
+	 * current authentication state of the hardware. This might mean a
+	 * transition from DESIRED->ENABLED, or in the case of error,
+	 * ENABLED->DESIRED. We never transition to ->UNDESIRED, that's up to
+	 * atomic_check().
+	 */
+	schedule_work(&dp->hdcp_prop_work);
+}
+
+static void cdn_dp_hdcp_prop_work(struct work_struct *work)
+{
+	struct cdn_dp_device *dp = container_of(work, struct cdn_dp_device,
+						hdcp_prop_work);
+	struct drm_device *dev = dp->drm_dev;
+	struct drm_connector *connector = &dp->connector;
+	struct drm_connector_state *state;
+	uint64_t val;
+
+	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
+	mutex_lock(&dp->lock);
+
+	/*
+	 * This worker is only used to flip between ENABLED/DESIRED. Either of
+	 * those to UNDESIRED is handled by core. If !hdcp_desired, we're
+	 * running just after hdcp has been disabled, so just exit
+	 */
+	if (dp->hdcp_desired) {
+		if (dp->hdcp_enabled)
+			val = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+		else
+			val = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+
+		state = connector->state;
+		state->content_protection = val;
+	}
+
+	mutex_unlock(&dp->lock);
+	drm_modeset_unlock(&dev->mode_config.connection_mutex);
+
 }
 
 static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
@@ -1377,7 +1419,6 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	struct drm_connector *connector;
 	struct cdn_dp_port *port;
 	struct drm_device *drm_dev = data;
-	struct drm_mode_config *mode_config;
 	int ret, i;
 
 	ret = cdn_dp_parse_dt(dp);
@@ -1392,6 +1433,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
 	INIT_DELAYED_WORK(&dp->hdcp_event_work, cdn_dp_hdcp_event_work);
+	INIT_WORK(&dp->hdcp_prop_work, cdn_dp_hdcp_prop_work);
 
 	encoder = &dp->encoder;
 
@@ -1453,10 +1495,11 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 
 	schedule_work(&dp->event_work);
 
-	mode_config = &connector->dev->mode_config;
-	drm_object_attach_property(&connector->base,
-				   mode_config->content_protection_property,
-				   DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
+	ret = drm_connector_attach_content_protection_property(connector);
+	if (ret) {
+		DRM_DEV_ERROR(dev, "Failed to attach protection (%d)\n", ret);
+		goto err_free_connector;
+	}
 
 	return 0;
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 7e9e126e47d67..b2861e474a37a 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -134,8 +134,10 @@ struct cdn_dp_device {
 #ifdef CONFIG_SWITCH
 	struct switch_dev switchdev;
 #endif
+	bool hdcp_enabled;
 	bool hdcp_desired;
 	struct cdn_dp_hdcp_key_1x key;
 	struct delayed_work hdcp_event_work;
+	struct work_struct hdcp_prop_work;
 };
 #endif  /* _CDN_DP_CORE_H */

From 2d471a65c346e4288c8d708abded1959a2857d6a Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 28 Nov 2017 16:13:12 -0500
Subject: [PATCH 1088/1852] BACKPORT: drm: Add some HDCP related #defines

In preparation for implementing HDCP in i915, add some HDCP related
register offsets and defines. The dpcd register offsets will go in
drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff
will get stuffed in drm_hdcp.h, which is new.

Changes in v2:
- drm_hdcp.h gets MIT license (Daniel)
Changes in v3:
- None
Changes in v4:
- None
Changes in v5:
- None
Changes in v6:
- SPDX license

Cc: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Ramalingam C <ramalingm.c@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-5-seanpaul@chromium.org

(cherry picked from commit 495eb7f877ab3789355c6ab5a0dbbd5277a88d69)
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[downstream changes]
- Resolved some CEC define conflicts in dp_helper.h

Reviewed-on: https://chromium-review.googlesource.com/849080
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>

Change-Id: I7e9dfb6f2c20c15bdc5f6ee6c89fdaf0a85ed1ea
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 include/drm/drm_dp_helper.h | 17 ++++++++++++++++
 include/drm/drm_hdcp.h      | 39 +++++++++++++++++++++++++++++++++++++
 2 files changed, 56 insertions(+)
 create mode 100644 include/drm/drm_hdcp.h

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index bb9d0deca07cc..36a0873e19f9c 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -526,6 +526,23 @@
 #define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
 # define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
 
+#define DP_AUX_HDCP_BKSV		0x68000
+#define DP_AUX_HDCP_RI_PRIME		0x68005
+#define DP_AUX_HDCP_AKSV		0x68007
+#define DP_AUX_HDCP_AN			0x6800C
+#define DP_AUX_HDCP_V_PRIME(h)		(0x68014 + h * 4)
+#define DP_AUX_HDCP_BCAPS		0x68028
+# define DP_BCAPS_REPEATER_PRESENT	BIT(1)
+# define DP_BCAPS_HDCP_CAPABLE		BIT(0)
+#define DP_AUX_HDCP_BSTATUS		0x68029
+# define DP_BSTATUS_REAUTH_REQ		BIT(3)
+# define DP_BSTATUS_LINK_FAILURE	BIT(2)
+# define DP_BSTATUS_R0_PRIME_READY	BIT(1)
+# define DP_BSTATUS_READY		BIT(0)
+#define DP_AUX_HDCP_BINFO		0x6802A
+#define DP_AUX_HDCP_KSV_FIFO		0x6802C
+#define DP_AUX_HDCP_AINFO		0x6803B
+
 /* DP 1.2 Sideband message defines */
 /* peer device type - DP 1.2a Table 2-92 */
 #define DP_PEER_DEVICE_NONE		0x0
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
new file mode 100644
index 0000000000000..43f7bd902b41c
--- /dev/null
+++ b/include/drm/drm_hdcp.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (C) 2017 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#ifndef _DRM_HDCP_H_INCLUDED_
+#define _DRM_HDCP_H_INCLUDED_
+
+/* Period of hdcp checks (to ensure we're still authenticated) */
+#define DRM_HDCP_CHECK_PERIOD_MS		(128 * 16)
+
+/* Shared lengths/masks between HDMI/DVI/DisplayPort */
+#define DRM_HDCP_AN_LEN				8
+#define DRM_HDCP_BSTATUS_LEN			2
+#define DRM_HDCP_KSV_LEN			5
+#define DRM_HDCP_RI_LEN				2
+#define DRM_HDCP_V_PRIME_PART_LEN		4
+#define DRM_HDCP_V_PRIME_NUM_PARTS		5
+#define DRM_HDCP_NUM_DOWNSTREAM(x)		(x & 0x3f)
+
+/* Slave address for the HDCP registers in the receiver */
+#define DRM_HDCP_DDC_ADDR			0x3A
+
+/* HDCP register offsets for HDMI/DVI devices */
+#define DRM_HDCP_DDC_BKSV			0x00
+#define DRM_HDCP_DDC_RI_PRIME			0x08
+#define DRM_HDCP_DDC_AKSV			0x10
+#define DRM_HDCP_DDC_AN				0x18
+#define DRM_HDCP_DDC_V_PRIME(h)			(0x20 + h * 4)
+#define DRM_HDCP_DDC_BCAPS			0x40
+#define  DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT	BIT(6)
+#define  DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY	BIT(5)
+#define DRM_HDCP_DDC_BSTATUS			0x41
+#define DRM_HDCP_DDC_KSV_FIFO			0x43
+
+#endif

From 9f78d3ef9ffea5224d59173682defb9f2fb21086 Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Tue, 15 May 2018 11:22:37 +0800
Subject: [PATCH 1089/1852] BACKPORT: FROMLIST: drm/rockchip: add transfer
 function for cdn-dp

We may support training outside firmware, so we need support
dpcd read/write to get the message or do some setting with
display.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Enric Balletbo <enric.balletbo@collabora.com>
(am from https://patchwork.kernel.org/patch/10420461/)

Conflicts:
   drivers/gpu/drm/rockchip/cdn-dp-core.c
   drivers/gpu/drm/rockchip/cdn-dp-reg.h
[context - HDCP stuff that's not upstream]

BUG=b:72006974
TEST=DP on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/985572
Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: If89911e6205546df1a5ae8997ea214d5d2a60af6
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 55 +++++++++++++++++---
 drivers/gpu/drm/rockchip/cdn-dp-core.h |  1 +
 drivers/gpu/drm/rockchip/cdn-dp-reg.c  | 69 +++++++++++++++++++++++---
 drivers/gpu/drm/rockchip/cdn-dp-reg.h  | 14 +++++-
 4 files changed, 122 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index c456221bba973..efb7b03595e9a 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -194,8 +194,8 @@ static int cdn_dp_get_sink_count(struct cdn_dp_device *dp, u8 *sink_count)
 	u8 value;
 
 	*sink_count = 0;
-	ret = cdn_dp_dpcd_read(dp, DP_SINK_COUNT, &value, 1);
-	if (ret)
+	ret = drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, &value, 1);
+	if (ret < 0)
 		return ret;
 
 	*sink_count = DP_GET_SINK_COUNT(value);
@@ -556,9 +556,9 @@ static int cdn_dp_get_sink_capability(struct cdn_dp_device *dp)
 	if (!cdn_dp_check_sink_connection(dp))
 		return -ENODEV;
 
-	ret = cdn_dp_dpcd_read(dp, DP_DPCD_REV, dp->dpcd,
-			       DP_RECEIVER_CAP_SIZE);
-	if (ret) {
+	ret = drm_dp_dpcd_read(&dp->aux, DP_DPCD_REV, dp->dpcd,
+			       sizeof(dp->dpcd));
+	if (ret < 0) {
 		DRM_DEV_ERROR(dp->dev, "Failed to get caps %d\n", ret);
 		return ret;
 	}
@@ -773,8 +773,8 @@ static bool cdn_dp_check_link_status(struct cdn_dp_device *dp)
 	if (!port || !dp->link.rate || !dp->link.num_lanes)
 		return false;
 
-	if (cdn_dp_dpcd_read(dp, DP_LANE0_1_STATUS, link_status,
-			     DP_LINK_STATUS_SIZE)) {
+	if (drm_dp_dpcd_read_link_status(&dp->aux, link_status) !=
+	    DP_LINK_STATUS_SIZE) {
 		DRM_ERROR("Failed to get link status\n");
 		return false;
 	}
@@ -1412,6 +1412,40 @@ static void cdn_dp_hdcp_prop_work(struct work_struct *work)
 
 }
 
+static ssize_t cdn_dp_aux_transfer(struct drm_dp_aux *aux,
+				   struct drm_dp_aux_msg *msg)
+{
+	struct cdn_dp_device *dp = container_of(aux, struct cdn_dp_device, aux);
+	int ret;
+	u8 status;
+
+	switch (msg->request & ~DP_AUX_I2C_MOT) {
+	case DP_AUX_NATIVE_WRITE:
+	case DP_AUX_I2C_WRITE:
+	case DP_AUX_I2C_WRITE_STATUS_UPDATE:
+		ret = cdn_dp_dpcd_write(dp, msg->address, msg->buffer,
+					msg->size);
+		break;
+	case DP_AUX_NATIVE_READ:
+	case DP_AUX_I2C_READ:
+		ret = cdn_dp_dpcd_read(dp, msg->address, msg->buffer,
+				       msg->size);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	status = cdn_dp_get_aux_status(dp);
+	if (status == AUX_STATUS_ACK)
+		msg->reply = DP_AUX_NATIVE_REPLY_ACK;
+	else if (status == AUX_STATUS_NACK)
+		msg->reply = DP_AUX_NATIVE_REPLY_NACK;
+	else if (status == AUX_STATUS_DEFER)
+		msg->reply = DP_AUX_NATIVE_REPLY_DEFER;
+
+	return ret;
+}
+
 static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 {
 	struct cdn_dp_device *dp = dev_get_drvdata(dev);
@@ -1430,6 +1464,13 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->active = false;
 	dp->active_port = -1;
 	dp->fw_loaded = false;
+	dp->aux.name = "DP-AUX";
+	dp->aux.transfer = cdn_dp_aux_transfer;
+	dp->aux.dev = dev;
+
+	ret = drm_dp_aux_register(&dp->aux);
+	if (ret)
+		return ret;
 
 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
 	INIT_DELAYED_WORK(&dp->hdcp_event_work, cdn_dp_hdcp_event_work);
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index b2861e474a37a..15cfb1cd93d50 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -101,6 +101,7 @@ struct cdn_dp_device {
 	struct platform_device *audio_pdev;
 	struct work_struct event_work;
 	struct edid *edid;
+	struct drm_dp_aux aux;
 
 	struct mutex lock;
 	bool connected;
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index 3fcfbfe71e783..a76121b4757c3 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -222,7 +222,12 @@ static int cdn_dp_reg_write_bit(struct cdn_dp_device *dp, u16 addr,
 				   sizeof(field), field);
 }
 
-int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len)
+/*
+ * Returns the number of bytes transferred on success, or a negative
+ * error code on failure. -ETIMEDOUT is returned if mailbox message was
+ * not send successfully;
+ */
+ssize_t cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len)
 {
 	u8 msg[5], reg[5];
 	int ret;
@@ -248,24 +253,41 @@ int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len)
 		goto err_dpcd_read;
 
 	ret = cdn_dp_mailbox_read_receive(dp, data, len);
+	if (!ret)
+		return len;
 
 err_dpcd_read:
+	DRM_DEV_ERROR(dp->dev, "dpcd read failed: %d\n", ret);
 	return ret;
 }
 
-int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value)
+#define CDN_AUX_HEADER_SIZE	5
+#define CDN_AUX_MSG_SIZE	20
+/*
+ * Returns the number of bytes transferred on success, or a negative error
+ * code on failure. -ETIMEDOUT is returned if mailbox message was not send
+ * success; -EINVAL is returned if get the wrong data size after message
+ * is sent
+ */
+ssize_t cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len)
 {
-	u8 msg[6], reg[5];
+	u8 msg[CDN_AUX_MSG_SIZE + CDN_AUX_HEADER_SIZE];
+	u8 reg[CDN_AUX_HEADER_SIZE];
 	int ret;
 
-	msg[0] = 0;
-	msg[1] = 1;
+	if (WARN_ON(len > CDN_AUX_MSG_SIZE) || WARN_ON(len <= 0))
+		return -EINVAL;
+
+	msg[0] = (len >> 8) & 0xff;
+	msg[1] = len & 0xff;
 	msg[2] = (addr >> 16) & 0xff;
 	msg[3] = (addr >> 8) & 0xff;
 	msg[4] = addr & 0xff;
-	msg[5] = value;
+
+	memcpy(msg + CDN_AUX_HEADER_SIZE, data, len);
+
 	ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_DPCD,
-				  sizeof(msg), msg);
+				  CDN_AUX_HEADER_SIZE + len, msg);
 	if (ret)
 		goto err_dpcd_write;
 
@@ -278,8 +300,12 @@ int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value)
 	if (ret)
 		goto err_dpcd_write;
 
-	if (addr != (reg[2] << 16 | reg[3] << 8 | reg[4]))
+	if ((len != (reg[0] << 8 | reg[1])) ||
+	    (addr != (reg[2] << 16 | reg[3] << 8 | reg[4]))) {
 		ret = -EINVAL;
+	} else {
+		return len;
+	}
 
 err_dpcd_write:
 	if (ret)
@@ -287,6 +313,33 @@ int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value)
 	return ret;
 }
 
+int cdn_dp_get_aux_status(struct cdn_dp_device *dp)
+{
+	u8 status;
+	int ret;
+
+	ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX,
+				  DPTX_GET_LAST_AUX_STAUS, 0, NULL);
+	if (ret)
+		goto err_get_hpd;
+
+	ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX,
+					      DPTX_GET_LAST_AUX_STAUS,
+					      sizeof(status));
+	if (ret)
+		goto err_get_hpd;
+
+	ret = cdn_dp_mailbox_read_receive(dp, &status, sizeof(status));
+	if (ret)
+		goto err_get_hpd;
+
+	return status;
+
+err_get_hpd:
+	DRM_DEV_ERROR(dp->dev, "get aux status failed: %d\n", ret);
+	return ret;
+}
+
 int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem,
 			 u32 i_size, const u32 *d_mem, u32 d_size)
 {
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 51648a96a6bfc..777a3badcf215 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -328,6 +328,13 @@
 #define GENERAL_BUS_SETTINGS            0x03
 #define GENERAL_TEST_ACCESS             0x04
 
+/* AUX status*/
+#define AUX_STATUS_ACK			0
+#define AUX_STATUS_NACK			1
+#define AUX_STATUS_DEFER			2
+#define AUX_STATUS_SINK_ERROR		3
+#define AUX_STATUS_BUS_ERROR		4
+
 /* hdcp opcode */
 #define HDCP_TX_CONFIGURATION			0x00
 #define HDCP2_TX_SET_PUBLIC_KEY_PARAMS		0x01
@@ -501,8 +508,11 @@ int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip);
 int cdn_dp_event_config(struct cdn_dp_device *dp);
 u32 cdn_dp_get_event(struct cdn_dp_device *dp);
 int cdn_dp_get_hpd_status(struct cdn_dp_device *dp);
-int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value);
-int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len);
+ssize_t cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr,
+			  u8 *data, u16 len);
+ssize_t cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr,
+			 u8 *data, u16 len);
+int cdn_dp_get_aux_status(struct cdn_dp_device *dp);
 int cdn_dp_get_edid_block(void *dp, u8 *edid,
 			  unsigned int block, size_t length);
 int cdn_dp_train_link(struct cdn_dp_device *dp);

From 8cd877d36cd7dbaede0fc1728e39bca32c9f1ead Mon Sep 17 00:00:00 2001
From: Lin Huang <hl@rock-chips.com>
Date: Wed, 2 May 2018 16:02:44 +0800
Subject: [PATCH 1090/1852] FROMLIST: Documentation: dt-bindings: phy: add
 phy_config for Rockchip USB Type-C PHY

If want to do training outside DP Firmware, need phy voltage swing
and pre_emphasis value.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
(am from https://patchwork.kernel.org/patch/10420463/)

BUG=b:72006974
TEST=DP display on Dru

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/1069957
Commit-Ready: Brian Norris <briannorris@chromium.org>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: Ib6fd1622c18e8f3371c2e859f448591f3ada7c6a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../bindings/phy/phy-rockchip-typec.txt       | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
index 6289506dfe001..12f8f0871933e 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
@@ -20,6 +20,13 @@ Required properties:
 		<&tcphy0 1> and <&tcphy1 1> for USB3 PHY.
    See ./phy-bindings.txt for details.
 
+Optional properties:
+ - rockchip,phy-config : A list of voltage swing(mV) and pre-emphasis
+			(dB) pairs. They are 3 blocks of 4 entries and
+			correspond to s0p0 ~ s0p3, s1p0 ~ s1p3,
+			s2p0 ~ s2p3, s3p0 ~ s2p3 swing and pre-emphasis
+			values.
+
 Note, there are 2 type-c phys for RK3399, and they are almost identical, except
 these registers(description below), every register node contains 3 sections:
 offset, enable bit, write mask bit.
@@ -62,6 +69,21 @@ Example:
 		rockchip,external-psm = <0xe588 14 30>;
 		rockchip,pipe-status = <0xe5c0 0 0>;
 		rockchip,uphy-dp-sel = <0x6268 19 19>;
+
+		rockchip,phy-config = <0x2a 0x00>,
+			<0x1f 0x15>,
+			<0x14 0x22>,
+			<0x02 0x2b>,
+
+			<0x21 0x00>,
+			<0x12 0x15>,
+			<0x02 0x22>,
+			<0 0>,
+
+			<0x15 0x00>,
+			<0x00 0x15>,
+			<0 0>,
+			<0 0>;
 	};
 
 	tcphy1: phy@ff800000 {
@@ -84,4 +106,19 @@ Example:
 		rockchip,external-psm = <0xe594 14 30>;
 		rockchip,pipe-status = <0xe5c0 16 16>;
 		rockchip,uphy-dp-sel = <0x6268 3 19>;
+
+		rockchip,phy-config = <0x2a 0x00>,
+			<0x1f 0x15>,
+			<0x14 0x22>,
+			<0x02 0x2b>,
+
+			<0x21 0x00>,
+			<0x12 0x15>,
+			<0x02 0x22>,
+			<0 0>,
+
+			<0x15 0x00>,
+			<0x00 0x15>,
+			<0 0>,
+			<0 0>;
 	};

From bf8d8467ff8d134dd263b37fdef950668aca84fb Mon Sep 17 00:00:00 2001
From: Lin Huang <hl@rock-chips.com>
Date: Mon, 21 May 2018 16:13:54 +0800
Subject: [PATCH 1091/1852] BACKPORT: FROMLIST: soc: rockchip: split
 rockchip_typec_phy struct to separate header

we may use rockchip_phy_typec struct in other driver, so split
it to separate header.

Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420467/)

Conflicts:
	drivers/phy/phy-rockchip-typec.c
[phy-rockchip-typec.c is different path in upstream code]

BUG=b:72006974
TEST=DP display on Dru

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1069958

Change-Id: I709331d1577923be662660eb606f92b743903ba7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-typec.c | 35 +-----------------
 include/soc/rockchip/rockchip_phy_typec.h | 44 +++++++++++++++++++++++
 2 files changed, 45 insertions(+), 34 deletions(-)
 create mode 100644 include/soc/rockchip/rockchip_phy_typec.h

diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index 133a790163c1d..bcc635a6b3a44 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -63,6 +63,7 @@
 
 #include <linux/mfd/syscon.h>
 #include <linux/phy/phy.h>
+#include <soc/rockchip/rockchip_phy_typec.h>
 
 #define CMN_SSM_BANDGAP			(0x21 << 2)
 #define CMN_SSM_BIAS			(0x22 << 2)
@@ -351,40 +352,6 @@
 
 #define POWER_ON_TRIES			5
 
-struct usb3phy_reg {
-	u32 offset;
-	u32 enable_bit;
-	u32 write_enable;
-};
-
-struct rockchip_usb3phy_port_cfg {
-	struct usb3phy_reg typec_conn_dir;
-	struct usb3phy_reg usb3tousb2_en;
-	struct usb3phy_reg usb3host_disable;
-	struct usb3phy_reg usb3host_port;
-	struct usb3phy_reg external_psm;
-	struct usb3phy_reg pipe_status;
-	struct usb3phy_reg uphy_dp_sel;
-};
-
-struct rockchip_typec_phy {
-	struct device *dev;
-	void __iomem *base;
-	struct extcon_dev *extcon;
-	struct regmap *grf_regs;
-	struct clk *clk_core;
-	struct clk *clk_ref;
-	struct reset_control *uphy_rst;
-	struct reset_control *pipe_rst;
-	struct reset_control *tcphy_rst;
-	struct rockchip_usb3phy_port_cfg port_cfgs;
-	/* mutex to protect access to individual PHYs */
-	struct mutex lock;
-
-	bool flip;
-	u8 mode;
-};
-
 struct phy_reg {
 	u16 value;
 	u32 addr;
diff --git a/include/soc/rockchip/rockchip_phy_typec.h b/include/soc/rockchip/rockchip_phy_typec.h
new file mode 100644
index 0000000000000..b13d01368b764
--- /dev/null
+++ b/include/soc/rockchip/rockchip_phy_typec.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
+ * Author: Lin Huang <hl@rock-chips.com>
+ */
+
+#ifndef __SOC_ROCKCHIP_PHY_TYPEC_H
+#define __SOC_ROCKCHIP_PHY_TYPEC_H
+
+struct usb3phy_reg {
+	u32 offset;
+	u32 enable_bit;
+	u32 write_enable;
+};
+
+struct rockchip_usb3phy_port_cfg {
+	struct usb3phy_reg typec_conn_dir;
+	struct usb3phy_reg usb3tousb2_en;
+	struct usb3phy_reg usb3host_disable;
+	struct usb3phy_reg usb3host_port;
+	struct usb3phy_reg external_psm;
+	struct usb3phy_reg pipe_status;
+	struct usb3phy_reg uphy_dp_sel;
+};
+
+struct rockchip_typec_phy {
+	struct device *dev;
+	void __iomem *base;
+	struct extcon_dev *extcon;
+	struct regmap *grf_regs;
+	struct clk *clk_core;
+	struct clk *clk_ref;
+	struct reset_control *uphy_rst;
+	struct reset_control *pipe_rst;
+	struct reset_control *tcphy_rst;
+	struct rockchip_usb3phy_port_cfg port_cfgs;
+	/* mutex to protect access to individual PHYs */
+	struct mutex lock;
+
+	bool flip;
+	u8 mode;
+};
+
+#endif

From a9b9f67f1bad6a1da22fc480d964fd1f76591139 Mon Sep 17 00:00:00 2001
From: huang lin <hl@rock-chips.com>
Date: Tue, 15 May 2018 11:22:39 +0800
Subject: [PATCH 1092/1852] BACKPORT: FROMLIST: phy: rockchip-typec: support
 variable phy config value

the phy config values used to fix in dp firmware, but some boards
need change these values to do training and get the better eye diagram
result. So support that in phy driver.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420473/)

Conflicts:
	drivers/phy/phy-rockchip-typec.c
[phy-rockchip-typec.c is different path in upstream code]

BUG=b:72006974
TEST=DP can display on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1032713

Change-Id: I8a63307ad5cb690d819779662d70ae1c232842a5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-typec.c | 261 +++++++++++++++++-----
 include/soc/rockchip/rockchip_phy_typec.h |   8 +
 2 files changed, 216 insertions(+), 53 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index bcc635a6b3a44..82085f2266eb9 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -324,21 +324,29 @@
  * clock 0: PLL 0 div 1
  * clock 1: PLL 1 div 2
  */
-#define CLK_PLL_CONFIG			0X30
+#define CLK_PLL1_DIV1			0x20
+#define CLK_PLL1_DIV2			0x30
 #define CLK_PLL_MASK			0x33
 
 #define CMN_READY			BIT(0)
 
+#define DP_PLL_CLOCK_ENABLE_ACK		BIT(3)
 #define DP_PLL_CLOCK_ENABLE		BIT(2)
+#define DP_PLL_ENABLE_ACK		BIT(1)
 #define DP_PLL_ENABLE			BIT(0)
 #define DP_PLL_DATA_RATE_RBR		((2 << 12) | (4 << 8))
 #define DP_PLL_DATA_RATE_HBR		((2 << 12) | (4 << 8))
 #define DP_PLL_DATA_RATE_HBR2		((1 << 12) | (2 << 8))
+#define DP_PLL_DATA_RATE_MASK		0xff00
 
-#define DP_MODE_A0			BIT(4)
-#define DP_MODE_A2			BIT(6)
-#define DP_MODE_ENTER_A0		0xc101
-#define DP_MODE_ENTER_A2		0xc104
+#define DP_MODE_MASK			0xf
+#define DP_MODE_ENTER_A0		BIT(0)
+#define DP_MODE_ENTER_A2		BIT(2)
+#define DP_MODE_ENTER_A3		BIT(3)
+#define DP_MODE_A0_ACK			BIT(4)
+#define DP_MODE_A2_ACK			BIT(6)
+#define DP_MODE_A3_ACK			BIT(7)
+#define DP_LINK_RESET_DEASSERTED	BIT(8)
 
 #define PHY_MODE_SET_TIMEOUT		100000
 
@@ -352,6 +360,8 @@
 
 #define POWER_ON_TRIES			5
 
+#define DP_DEFAULT_RATE			162000
+
 struct phy_reg {
 	u16 value;
 	u32 addr;
@@ -374,15 +384,15 @@ struct phy_reg usb3_pll_cfg[] = {
 	{ 0x8,		CMN_DIAG_PLL0_LF_PROG },
 };
 
-struct phy_reg dp_pll_cfg[] = {
+struct phy_reg dp_pll_rbr_cfg[] = {
 	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
 	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
 	{ 0x30b9,	CMN_PLL1_VCOCAL_START },
-	{ 0x21c,	CMN_PLL1_INTDIV },
+	{ 0x87,		CMN_PLL1_INTDIV },
 	{ 0,		CMN_PLL1_FRACDIV },
-	{ 0x5,		CMN_PLL1_HIGH_THR },
-	{ 0x35,		CMN_PLL1_SS_CTRL1 },
-	{ 0x7f1e,	CMN_PLL1_SS_CTRL2 },
+	{ 0x22,		CMN_PLL1_HIGH_THR },
+	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
+	{ 0,		CMN_PLL1_SS_CTRL2 },
 	{ 0x20,		CMN_PLL1_DSM_DIAG },
 	{ 0,		CMN_PLLSM1_USER_DEF_CTRL },
 	{ 0,		CMN_DIAG_PLL1_OVRD },
@@ -393,7 +403,69 @@ struct phy_reg dp_pll_cfg[] = {
 	{ 0x8,		CMN_DIAG_PLL1_LF_PROG },
 	{ 0x100,	CMN_DIAG_PLL1_PTATIS_TUNE1 },
 	{ 0x7,		CMN_DIAG_PLL1_PTATIS_TUNE2 },
-	{ 0x4,		CMN_DIAG_PLL1_INCLK_CTRL },
+	{ 0x1,		CMN_DIAG_PLL1_INCLK_CTRL },
+};
+
+struct phy_reg dp_pll_hbr_cfg[] = {
+	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
+	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
+	{ 0x30b4,	CMN_PLL1_VCOCAL_START },
+	{ 0xe1,		CMN_PLL1_INTDIV },
+	{ 0,		CMN_PLL1_FRACDIV },
+	{ 0x5,		CMN_PLL1_HIGH_THR },
+	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
+	{ 0,		CMN_PLL1_SS_CTRL2 },
+	{ 0x20,		CMN_PLL1_DSM_DIAG },
+	{ 0x1000,	CMN_PLLSM1_USER_DEF_CTRL },
+	{ 0,		CMN_DIAG_PLL1_OVRD },
+	{ 0,		CMN_DIAG_PLL1_FBH_OVRD },
+	{ 0,		CMN_DIAG_PLL1_FBL_OVRD },
+	{ 0x7,		CMN_DIAG_PLL1_V2I_TUNE },
+	{ 0x45,		CMN_DIAG_PLL1_CP_TUNE },
+	{ 0x8,		CMN_DIAG_PLL1_LF_PROG },
+	{ 0x1,		CMN_DIAG_PLL1_PTATIS_TUNE1 },
+	{ 0x1,		CMN_DIAG_PLL1_PTATIS_TUNE2 },
+	{ 0x1,		CMN_DIAG_PLL1_INCLK_CTRL },
+};
+
+struct phy_reg dp_pll_hbr2_cfg[] = {
+	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
+	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
+	{ 0x30b4,	CMN_PLL1_VCOCAL_START },
+	{ 0xe1,		CMN_PLL1_INTDIV },
+	{ 0,		CMN_PLL1_FRACDIV },
+	{ 0x5,		CMN_PLL1_HIGH_THR },
+	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
+	{ 0,		CMN_PLL1_SS_CTRL2 },
+	{ 0x20,		CMN_PLL1_DSM_DIAG },
+	{ 0x1000,	CMN_PLLSM1_USER_DEF_CTRL },
+	{ 0,		CMN_DIAG_PLL1_OVRD },
+	{ 0,		CMN_DIAG_PLL1_FBH_OVRD },
+	{ 0,		CMN_DIAG_PLL1_FBL_OVRD },
+	{ 0x7,		CMN_DIAG_PLL1_V2I_TUNE },
+	{ 0x45,		CMN_DIAG_PLL1_CP_TUNE },
+	{ 0x8,		CMN_DIAG_PLL1_LF_PROG },
+	{ 0x1,		CMN_DIAG_PLL1_PTATIS_TUNE1 },
+	{ 0x1,		CMN_DIAG_PLL1_PTATIS_TUNE2 },
+	{ 0x1,		CMN_DIAG_PLL1_INCLK_CTRL },
+};
+
+/* default phy config */
+static const struct phy_config tcphy_default_config[3][4] = {
+	{{ .swing = 0x2a, .pe = 0x00 },
+	 { .swing = 0x1f, .pe = 0x15 },
+	 { .swing = 0x14, .pe = 0x22 },
+	 { .swing = 0x02, .pe = 0x2b } },
+
+	{{ .swing = 0x21, .pe = 0x00 },
+	 { .swing = 0x12, .pe = 0x15 },
+	 { .swing = 0x02, .pe = 0x22 },
+	 { .swing = 0,    .pe = 0 } },
+
+	{{ .swing = 0x15, .pe = 0x00 },
+	 { .swing = 0x00, .pe = 0x15 },
+	 { .swing = 0,    .pe = 0 },
+	 { .swing = 0,    .pe = 0 } },
 };
 
 static void tcphy_cfg_24m(struct rockchip_typec_phy *tcphy)
@@ -417,7 +489,7 @@ static void tcphy_cfg_24m(struct rockchip_typec_phy *tcphy)
 
 	rdata = readl(tcphy->base + CMN_DIAG_HSCLK_SEL);
 	rdata &= ~CLK_PLL_MASK;
-	rdata |= CLK_PLL_CONFIG;
+	rdata |= CLK_PLL1_DIV2;
 	writel(rdata, tcphy->base + CMN_DIAG_HSCLK_SEL);
 }
 
@@ -431,17 +503,44 @@ static void tcphy_cfg_usb3_pll(struct rockchip_typec_phy *tcphy)
 		       tcphy->base + usb3_pll_cfg[i].addr);
 }
 
-static void tcphy_cfg_dp_pll(struct rockchip_typec_phy *tcphy)
+static void tcphy_cfg_dp_pll(struct rockchip_typec_phy *tcphy, int link_rate)
 {
-	u32 i;
+	struct phy_reg *phy_cfg;
+	u32 clk_ctrl;
+	u32 i, cfg_size, hsclk_sel;
+
+	hsclk_sel = readl(tcphy->base + CMN_DIAG_HSCLK_SEL);
+	hsclk_sel &= ~CLK_PLL_MASK;
+
+	switch (link_rate) {
+	case 540000:
+		clk_ctrl = DP_PLL_DATA_RATE_HBR2;
+		hsclk_sel |= CLK_PLL1_DIV1;
+		phy_cfg = dp_pll_hbr2_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_hbr2_cfg);
+		break;
+	case 270000:
+		clk_ctrl = DP_PLL_DATA_RATE_HBR;
+		hsclk_sel |= CLK_PLL1_DIV2;
+		phy_cfg = dp_pll_hbr_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_hbr_cfg);
+		break;
+	case 162000:
+	default:
+		clk_ctrl = DP_PLL_DATA_RATE_RBR;
+		hsclk_sel |= CLK_PLL1_DIV2;
+		phy_cfg = dp_pll_rbr_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_rbr_cfg);
+		break;
+	}
 
-	/* set the default mode to RBR */
-	writel(DP_PLL_CLOCK_ENABLE | DP_PLL_ENABLE | DP_PLL_DATA_RATE_RBR,
-	       tcphy->base + DP_CLK_CTL);
+	clk_ctrl |= DP_PLL_CLOCK_ENABLE | DP_PLL_ENABLE;
+	writel(clk_ctrl, tcphy->base + DP_CLK_CTL);
+	writel(hsclk_sel, tcphy->base + CMN_DIAG_HSCLK_SEL);
 
 	/* load the configuration of PLL1 */
-	for (i = 0; i < ARRAY_SIZE(dp_pll_cfg); i++)
-		writel(dp_pll_cfg[i].value, tcphy->base + dp_pll_cfg[i].addr);
+	for (i = 0; i < cfg_size; i++)
+		writel(phy_cfg[i].value, tcphy->base + phy_cfg[i].addr);
 }
 
 static void tcphy_tx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
@@ -468,9 +567,10 @@ static void tcphy_rx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
 	writel(0xfb, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
 }
 
-static void tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
+static void tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, int link_rate,
+			      u8 swing, u8 pre_emp, u32 lane)
 {
-	u16 rdata;
+	u16 val;
 
 	writel(0xbefc, tcphy->base + XCVR_PSM_RCTRL(lane));
 	writel(0x6799, tcphy->base + TX_PSC_A0(lane));
@@ -478,25 +578,32 @@ static void tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
 	writel(0x98, tcphy->base + TX_PSC_A2(lane));
 	writel(0x98, tcphy->base + TX_PSC_A3(lane));
 
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_001(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_010(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_011(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_100(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_101(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_110(lane));
-	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_111(lane));
-	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_10(lane));
-	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_01(lane));
-	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_00(lane));
-	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_11(lane));
-
-	writel(0x128, tcphy->base + TX_TXCC_CAL_SCLR_MULT(lane));
-	writel(0x400, tcphy->base + TX_DIAG_TX_DRV(lane));
-
-	rdata = readl(tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
-	rdata = (rdata & 0x8fff) | 0x6000;
-	writel(rdata, tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
+	writel(tcphy->config[swing][pre_emp].swing,
+	       tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
+	writel(tcphy->config[swing][pre_emp].pe,
+	       tcphy->base + TX_TXCC_CPOST_MULT_00(lane));
+
+	if (swing == 2 && pre_emp == 0 && link_rate != 540000) {
+		writel(0x700, tcphy->base + TX_DIAG_TX_DRV(lane));
+		writel(0x13c, tcphy->base + TX_TXCC_CAL_SCLR_MULT(lane));
+	} else {
+		writel(0x128, tcphy->base + TX_TXCC_CAL_SCLR_MULT(lane));
+		writel(0x0400, tcphy->base + TX_DIAG_TX_DRV(lane));
+	}
+
+	val = readl(tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
+	val = val & 0x8fff;
+	switch (link_rate) {
+	case 540000:
+		val |= (4 << 12);
+		break;
+	case 162000:
+	case 270000:
+	default:
+		val |= (6 << 12);
+		break;
+	}
+	writel(val, tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
 }
 
 static inline int property_enable(struct rockchip_typec_phy *tcphy,
@@ -687,30 +794,33 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
 	tcphy_cfg_24m(tcphy);
 
 	if (mode == MODE_DFP_DP) {
-		tcphy_cfg_dp_pll(tcphy);
+		tcphy_cfg_dp_pll(tcphy, DP_DEFAULT_RATE);
 		for (i = 0; i < 4; i++)
-			tcphy_dp_cfg_lane(tcphy, i);
+			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, i);
 
 		writel(PIN_ASSIGN_C_E, tcphy->base + PMA_LANE_CFG);
 	} else {
 		tcphy_cfg_usb3_pll(tcphy);
-		tcphy_cfg_dp_pll(tcphy);
+		tcphy_cfg_dp_pll(tcphy, DP_DEFAULT_RATE);
 		if (tcphy->flip) {
 			tcphy_tx_usb3_cfg_lane(tcphy, 3);
 			tcphy_rx_usb3_cfg_lane(tcphy, 2);
-			tcphy_dp_cfg_lane(tcphy, 0);
-			tcphy_dp_cfg_lane(tcphy, 1);
+			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 0);
+			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 1);
 		} else {
 			tcphy_tx_usb3_cfg_lane(tcphy, 0);
 			tcphy_rx_usb3_cfg_lane(tcphy, 1);
-			tcphy_dp_cfg_lane(tcphy, 2);
-			tcphy_dp_cfg_lane(tcphy, 3);
+			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 2);
+			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 3);
 		}
 
 		writel(PIN_ASSIGN_D_F, tcphy->base + PMA_LANE_CFG);
 	}
 
-	writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
+	val = readl(tcphy->base + DP_MODE_CTL);
+	val &= ~DP_MODE_MASK;
+	val |= DP_MODE_ENTER_A2 | DP_LINK_RESET_DEASSERTED;
+	writel(val, tcphy->base + DP_MODE_CTL);
 
 	reset_control_deassert(tcphy->uphy_rst);
 
@@ -946,7 +1056,7 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 	property_enable(tcphy, &cfg->uphy_dp_sel, 1);
 
 	ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
-				 val, val & DP_MODE_A2, 1000,
+				 val, val & DP_MODE_A2_ACK, 1000,
 				 PHY_MODE_SET_TIMEOUT);
 	if (ret < 0) {
 		dev_err(tcphy->dev, "failed to wait TCPHY enter A2\n");
@@ -955,13 +1065,19 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 
 	tcphy_dp_aux_calibration(tcphy);
 
-	writel(DP_MODE_ENTER_A0, tcphy->base + DP_MODE_CTL);
+	/* enter A0 mode */
+	val = readl(tcphy->base + DP_MODE_CTL);
+	val &= ~DP_MODE_MASK;
+	val |= DP_MODE_ENTER_A0;
+	writel(val, tcphy->base + DP_MODE_CTL);
 
 	ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
-				 val, val & DP_MODE_A0, 1000,
+				 val, val & DP_MODE_A0_ACK, 1000,
 				 PHY_MODE_SET_TIMEOUT);
 	if (ret < 0) {
-		writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
+		val &= ~DP_MODE_MASK;
+		val |= DP_MODE_ENTER_A2;
+		writel(val, tcphy->base + DP_MODE_CTL);
 		dev_err(tcphy->dev, "failed to wait TCPHY enter A0\n");
 		goto power_on_finish;
 	}
@@ -979,6 +1095,7 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 static int rockchip_dp_phy_power_off(struct phy *phy)
 {
 	struct rockchip_typec_phy *tcphy = phy_get_drvdata(phy);
+	u32 val;
 
 	mutex_lock(&tcphy->lock);
 
@@ -987,7 +1104,10 @@ static int rockchip_dp_phy_power_off(struct phy *phy)
 
 	tcphy->mode &= ~MODE_DFP_DP;
 
-	writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
+	val = readl(tcphy->base + DP_MODE_CTL);
+	val &= ~DP_MODE_MASK;
+	val |= DP_MODE_ENTER_A2;
+	writel(val, tcphy->base + DP_MODE_CTL);
 
 	if (tcphy->mode == MODE_DISCONNECT)
 		tcphy_phy_deinit(tcphy);
@@ -1003,6 +1123,30 @@ static const struct phy_ops rockchip_dp_phy_ops = {
 	.owner		= THIS_MODULE,
 };
 
+static int typec_dp_phy_config(struct phy *phy, int link_rate,
+			 int lanes, u8 swing, u8 pre_emp)
+{
+	struct rockchip_typec_phy *tcphy = phy_get_drvdata(phy);
+	u8 i;
+
+	tcphy_cfg_dp_pll(tcphy, link_rate);
+
+	if (tcphy->mode == MODE_DFP_DP) {
+		for (i = 0; i < 4; i++)
+			tcphy_dp_cfg_lane(tcphy, link_rate, swing, pre_emp, i);
+	} else {
+		if (tcphy->flip) {
+			tcphy_dp_cfg_lane(tcphy, link_rate, swing, pre_emp, 0);
+			tcphy_dp_cfg_lane(tcphy, link_rate, swing, pre_emp, 1);
+		} else {
+			tcphy_dp_cfg_lane(tcphy, link_rate, swing, pre_emp, 2);
+			tcphy_dp_cfg_lane(tcphy, link_rate, swing, pre_emp, 3);
+		}
+	}
+
+	return 0;
+}
+
 static int tcphy_get_param(struct device *dev,
 			   struct usb3phy_reg *reg,
 			   const char *name)
@@ -1100,6 +1244,16 @@ static int tcphy_parse_dt(struct rockchip_typec_phy *tcphy,
 		return PTR_ERR(tcphy->tcphy_rst);
 	}
 
+	/*
+	 * check if phy_config pass from dts, if no,
+	 * use default phy config value.
+	 */
+	ret = of_property_read_u32_array(dev->of_node, "rockchip,phy-config",
+		(u32 *)tcphy->config, sizeof(tcphy->config) / sizeof(u32));
+	if (ret)
+		memcpy(tcphy->config, tcphy_default_config,
+		       sizeof(tcphy->config));
+
 	return 0;
 }
 
@@ -1156,6 +1310,7 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev)
 		}
 	}
 
+	tcphy->typec_phy_config = typec_dp_phy_config;
 	pm_runtime_enable(dev);
 
 	for_each_available_child_of_node(np, child_np) {
diff --git a/include/soc/rockchip/rockchip_phy_typec.h b/include/soc/rockchip/rockchip_phy_typec.h
index b13d01368b764..51270e4f85d75 100644
--- a/include/soc/rockchip/rockchip_phy_typec.h
+++ b/include/soc/rockchip/rockchip_phy_typec.h
@@ -23,6 +23,11 @@ struct rockchip_usb3phy_port_cfg {
 	struct usb3phy_reg uphy_dp_sel;
 };
 
+struct phy_config {
+	int swing;
+	int pe;
+};
+
 struct rockchip_typec_phy {
 	struct device *dev;
 	void __iomem *base;
@@ -39,6 +44,9 @@ struct rockchip_typec_phy {
 
 	bool flip;
 	u8 mode;
+	struct phy_config config[3][4];
+	int (*typec_phy_config)(struct phy *phy, int link_rate,
+				int lanes, u8 swing, u8 pre_emp);
 };
 
 #endif

From f6ebeb4f9799fbaee547a23569557ea09508191f Mon Sep 17 00:00:00 2001
From: huang lin <hl@rock-chips.com>
Date: Tue, 15 May 2018 11:22:40 +0800
Subject: [PATCH 1093/1852] BACKPORT: FROMLIST: drm/rockchip: support dp
 training outside dp firmware

DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from dts and use software link training
instead of relying on firmware, if software training fail, keep firmware
training as a fallback if sw training fails.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10420469/)

Conflicts:
   drivers/gpu/drm/rockchip/cdn-dp-reg.h
[Context - non-upstream HDCP stuff]

BUG=b:72006974
TEST=DP can display on Dru

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/985573
Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

Change-Id: I402c5fd2c83979cee67856e66311d2b1b9c6f774
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/Makefile             |   2 +-
 drivers/gpu/drm/rockchip/cdn-dp-core.c        |  24 +-
 drivers/gpu/drm/rockchip/cdn-dp-core.h        |   2 +
 .../gpu/drm/rockchip/cdn-dp-link-training.c   | 420 ++++++++++++++++++
 drivers/gpu/drm/rockchip/cdn-dp-reg.c         |  31 +-
 drivers/gpu/drm/rockchip/cdn-dp-reg.h         |  38 +-
 6 files changed, 504 insertions(+), 13 deletions(-)
 create mode 100644 drivers/gpu/drm/rockchip/cdn-dp-link-training.c

diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
index 1aef3c0e22da9..1276a03651953 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -8,7 +8,7 @@ rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) += rockchip_drm_fbdev.o
 
 obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
 obj-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp.o
-cdn-dp-objs := cdn-dp-core.o cdn-dp-reg.o
+cdn-dp-objs := cdn-dp-core.o cdn-dp-reg.o cdn-dp-link-training.o
 obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi.o
 obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index efb7b03595e9a..f33841a3c1db7 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -820,11 +820,13 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
 			goto out;
 		}
 	}
-
-	ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_IDLE);
-	if (ret) {
-		DRM_DEV_ERROR(dp->dev, "Failed to idle video %d\n", ret);
-		goto out;
+	if (dp->use_fw_training) {
+		ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_IDLE);
+		if (ret) {
+			DRM_DEV_ERROR(dp->dev,
+				      "Failed to idle video %d\n", ret);
+			goto out;
+		}
 	}
 
 	ret = cdn_dp_config_video(dp);
@@ -833,11 +835,15 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
 		goto out;
 	}
 
-	ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_VALID);
-	if (ret) {
-		DRM_DEV_ERROR(dp->dev, "Failed to valid video %d\n", ret);
-		goto out;
+	if (dp->use_fw_training) {
+		ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_VALID);
+		if (ret) {
+			DRM_DEV_ERROR(dp->dev,
+				"Failed to valid video %d\n", ret);
+			goto out;
+		}
 	}
+
 out:
 	mutex_unlock(&dp->lock);
 	if (!ret) {
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
index 15cfb1cd93d50..cd089c9bc07b5 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -107,6 +107,7 @@ struct cdn_dp_device {
 	bool connected;
 	bool active;
 	bool suspended;
+	bool use_fw_training;
 
 	const struct firmware *fw;	/* cdn dp firmware */
 	unsigned int fw_version;	/* cdn fw version */
@@ -129,6 +130,7 @@ struct cdn_dp_device {
 	u8 ports;
 	u8 lanes;
 	int active_port;
+	u8 train_set[4];
 
 	u8 dpcd[DP_RECEIVER_CAP_SIZE];
 	bool sink_has_audio;
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-link-training.c b/drivers/gpu/drm/rockchip/cdn-dp-link-training.c
new file mode 100644
index 0000000000000..73c329008c27e
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/cdn-dp-link-training.c
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
+ * Author: Chris Zhong <zyw@rock-chips.com>
+ */
+
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/phy/phy.h>
+#include <soc/rockchip/rockchip_phy_typec.h>
+
+#include "cdn-dp-core.h"
+#include "cdn-dp-reg.h"
+
+static void cdn_dp_set_signal_levels(struct cdn_dp_device *dp)
+{
+	struct cdn_dp_port *port = dp->port[dp->active_port];
+	struct rockchip_typec_phy *tcphy = phy_get_drvdata(port->phy);
+
+	int rate = drm_dp_bw_code_to_link_rate(dp->link.rate);
+	u8 swing = (dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) >>
+		   DP_TRAIN_VOLTAGE_SWING_SHIFT;
+	u8 pre_emphasis = (dp->train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK)
+			  >> DP_TRAIN_PRE_EMPHASIS_SHIFT;
+
+	tcphy->typec_phy_config(port->phy, rate, dp->link.num_lanes,
+				swing, pre_emphasis);
+}
+
+static int cdn_dp_set_pattern(struct cdn_dp_device *dp, uint8_t dp_train_pat)
+{
+	u32 phy_config, global_config;
+	int ret;
+	uint8_t pattern = dp_train_pat & DP_TRAINING_PATTERN_MASK;
+
+	global_config = NUM_LANES(dp->link.num_lanes - 1) | SST_MODE |
+			GLOBAL_EN | RG_EN | ENC_RST_DIS | WR_VHSYNC_FALL;
+
+	phy_config = DP_TX_PHY_ENCODER_BYPASS(0) |
+		     DP_TX_PHY_SKEW_BYPASS(0) |
+		     DP_TX_PHY_DISPARITY_RST(0) |
+		     DP_TX_PHY_LANE0_SKEW(0) |
+		     DP_TX_PHY_LANE1_SKEW(1) |
+		     DP_TX_PHY_LANE2_SKEW(2) |
+		     DP_TX_PHY_LANE3_SKEW(3) |
+		     DP_TX_PHY_10BIT_ENABLE(0);
+
+	if (pattern != DP_TRAINING_PATTERN_DISABLE) {
+		global_config |= NO_VIDEO;
+		phy_config |= DP_TX_PHY_TRAINING_ENABLE(1) |
+			      DP_TX_PHY_SCRAMBLER_BYPASS(1) |
+			      DP_TX_PHY_TRAINING_PATTERN(pattern);
+	}
+
+	ret = cdn_dp_reg_write(dp, DP_FRAMER_GLOBAL_CONFIG, global_config);
+	if (ret) {
+		DRM_ERROR("fail to set DP_FRAMER_GLOBAL_CONFIG, error: %d\n",
+			  ret);
+		return ret;
+	}
+
+	ret = cdn_dp_reg_write(dp, DP_TX_PHY_CONFIG_REG, phy_config);
+	if (ret) {
+		DRM_ERROR("fail to set DP_TX_PHY_CONFIG_REG, error: %d\n",
+			  ret);
+		return ret;
+	}
+
+	ret = cdn_dp_reg_write(dp, DPTX_LANE_EN, BIT(dp->link.num_lanes) - 1);
+	if (ret) {
+		DRM_ERROR("fail to set DPTX_LANE_EN, error: %d\n", ret);
+		return ret;
+	}
+
+	if (drm_dp_enhanced_frame_cap(dp->dpcd))
+		ret = cdn_dp_reg_write(dp, DPTX_ENHNCD, 1);
+	else
+		ret = cdn_dp_reg_write(dp, DPTX_ENHNCD, 0);
+	if (ret)
+		DRM_ERROR("failed to set DPTX_ENHNCD, error: %x\n", ret);
+
+	return ret;
+}
+
+static u8 cdn_dp_pre_emphasis_max(u8 voltage_swing)
+{
+	switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
+	case DP_TRAIN_VOLTAGE_SWING_LEVEL_0:
+		return DP_TRAIN_PRE_EMPH_LEVEL_3;
+	case DP_TRAIN_VOLTAGE_SWING_LEVEL_1:
+		return DP_TRAIN_PRE_EMPH_LEVEL_2;
+	case DP_TRAIN_VOLTAGE_SWING_LEVEL_2:
+		return DP_TRAIN_PRE_EMPH_LEVEL_1;
+	default:
+		return DP_TRAIN_PRE_EMPH_LEVEL_0;
+	}
+}
+
+static void cdn_dp_get_adjust_train(struct cdn_dp_device *dp,
+				    uint8_t link_status[DP_LINK_STATUS_SIZE])
+{
+	int i;
+	uint8_t v = 0, p = 0;
+	uint8_t preemph_max;
+
+	for (i = 0; i < dp->link.num_lanes; i++) {
+		v = max(v, drm_dp_get_adjust_request_voltage(link_status, i));
+		p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status,
+								  i));
+	}
+
+	if (v >= VOLTAGE_LEVEL_2)
+		v = VOLTAGE_LEVEL_2 | DP_TRAIN_MAX_SWING_REACHED;
+
+	preemph_max = cdn_dp_pre_emphasis_max(v);
+	if (p >= preemph_max)
+		p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+	for (i = 0; i < dp->link.num_lanes; i++)
+		dp->train_set[i] = v | p;
+}
+
+/*
+ * Pick training pattern for channel equalization. Training Pattern 3 for HBR2
+ * or 1.2 devices that support it, Training Pattern 2 otherwise.
+ */
+static u32 cdn_dp_select_chaneq_pattern(struct cdn_dp_device *dp)
+{
+	u32 training_pattern = DP_TRAINING_PATTERN_2;
+
+	/*
+	 * cdn dp support HBR2 also support TPS3. TPS3 support is also mandatory
+	 * for downstream devices that support HBR2. However, not all sinks
+	 * follow the spec.
+	 */
+	if (drm_dp_tps3_supported(dp->dpcd))
+		training_pattern = DP_TRAINING_PATTERN_3;
+	else
+		DRM_DEBUG_KMS("5.4 Gbps link rate without sink TPS3 support\n");
+
+	return training_pattern;
+}
+
+
+static bool cdn_dp_link_max_vswing_reached(struct cdn_dp_device *dp)
+{
+	int lane;
+
+	for (lane = 0; lane < dp->link.num_lanes; lane++)
+		if ((dp->train_set[lane] & DP_TRAIN_MAX_SWING_REACHED) == 0)
+			return false;
+
+	return true;
+}
+
+static int cdn_dp_update_link_train(struct cdn_dp_device *dp)
+{
+	int ret;
+
+	cdn_dp_set_signal_levels(dp);
+
+	ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,
+				dp->train_set, dp->link.num_lanes);
+	if (ret != dp->link.num_lanes)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int cdn_dp_set_link_train(struct cdn_dp_device *dp,
+				  uint8_t dp_train_pat)
+{
+	uint8_t buf[sizeof(dp->train_set) + 1];
+	int ret, len;
+
+	buf[0] = dp_train_pat;
+	if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
+	    DP_TRAINING_PATTERN_DISABLE) {
+		/* don't write DP_TRAINING_LANEx_SET on disable */
+		len = 1;
+	} else {
+		/* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
+		memcpy(buf + 1, dp->train_set, dp->link.num_lanes);
+		len = dp->link.num_lanes + 1;
+	}
+
+	ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_PATTERN_SET,
+				buf, len);
+	if (ret != len)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int cdn_dp_reset_link_train(struct cdn_dp_device *dp,
+				    uint8_t dp_train_pat)
+{
+	int ret;
+
+	memset(dp->train_set, 0, sizeof(dp->train_set));
+
+	cdn_dp_set_signal_levels(dp);
+
+	ret = cdn_dp_set_pattern(dp, dp_train_pat);
+	if (ret)
+		return ret;
+
+	return cdn_dp_set_link_train(dp, dp_train_pat);
+}
+
+/* Enable corresponding port and start training pattern 1 */
+static int cdn_dp_link_training_clock_recovery(struct cdn_dp_device *dp)
+{
+	u8 voltage;
+	u8 link_status[DP_LINK_STATUS_SIZE];
+	u32 voltage_tries, max_vswing_tries;
+	int ret;
+
+	/* clock recovery */
+	ret = cdn_dp_reset_link_train(dp, DP_TRAINING_PATTERN_1 |
+					  DP_LINK_SCRAMBLING_DISABLE);
+	if (ret) {
+		DRM_ERROR("failed to start link train\n");
+		return ret;
+	}
+
+	voltage_tries = 1;
+	max_vswing_tries = 0;
+	for (;;) {
+		drm_dp_link_train_clock_recovery_delay(dp->dpcd);
+		if (drm_dp_dpcd_read_link_status(&dp->aux, link_status) !=
+		    DP_LINK_STATUS_SIZE) {
+			DRM_ERROR("failed to get link status\n");
+			return -EINVAL;
+		}
+
+		if (drm_dp_clock_recovery_ok(link_status, dp->link.num_lanes)) {
+			DRM_DEBUG_KMS("clock recovery OK\n");
+			return 0;
+		}
+
+		if (voltage_tries >= 5) {
+			DRM_DEBUG_KMS("Same voltage tried 5 times\n");
+			return -EINVAL;
+		}
+
+		if (max_vswing_tries >= 1) {
+			DRM_DEBUG_KMS("Max Voltage Swing reached\n");
+			return -EINVAL;
+		}
+
+		voltage = dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+
+		/* Update training set as requested by target */
+		cdn_dp_get_adjust_train(dp, link_status);
+		if (cdn_dp_update_link_train(dp)) {
+			DRM_ERROR("failed to update link training\n");
+			return -EINVAL;
+		}
+
+		if ((dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) ==
+		    voltage)
+			++voltage_tries;
+		else
+			voltage_tries = 1;
+
+		if (cdn_dp_link_max_vswing_reached(dp))
+			++max_vswing_tries;
+	}
+}
+
+static int cdn_dp_link_training_channel_equalization(struct cdn_dp_device *dp)
+{
+	int tries, ret;
+	u32 training_pattern;
+	uint8_t link_status[DP_LINK_STATUS_SIZE];
+
+	training_pattern = cdn_dp_select_chaneq_pattern(dp);
+	training_pattern |= DP_LINK_SCRAMBLING_DISABLE;
+
+	ret = cdn_dp_set_pattern(dp, training_pattern);
+	if (ret)
+		return ret;
+
+	ret = cdn_dp_set_link_train(dp, training_pattern);
+	if (ret) {
+		DRM_ERROR("failed to start channel equalization\n");
+		return ret;
+	}
+
+	for (tries = 0; tries < 5; tries++) {
+		drm_dp_link_train_channel_eq_delay(dp->dpcd);
+		if (drm_dp_dpcd_read_link_status(&dp->aux, link_status) !=
+		    DP_LINK_STATUS_SIZE) {
+			DRM_ERROR("failed to get link status\n");
+			break;
+		}
+
+		/* Make sure clock is still ok */
+		if (!drm_dp_clock_recovery_ok(link_status,
+					      dp->link.num_lanes)) {
+			DRM_DEBUG_KMS("Clock recovery check failed\n");
+			break;
+		}
+
+		if (drm_dp_channel_eq_ok(link_status,  dp->link.num_lanes)) {
+			DRM_DEBUG_KMS("Channel EQ done\n");
+			return 0;
+		}
+
+		/* Update training set as requested by target */
+		cdn_dp_get_adjust_train(dp, link_status);
+		if (cdn_dp_update_link_train(dp)) {
+			DRM_ERROR("failed to update link training\n");
+			break;
+		}
+	}
+
+	/* Try 5 times, else fail and try at lower BW */
+	if (tries == 5)
+		DRM_DEBUG_KMS("Channel equalization failed 5 times\n");
+
+	return -EINVAL;
+}
+
+static int cdn_dp_stop_link_train(struct cdn_dp_device *dp)
+{
+	int ret = cdn_dp_set_pattern(dp, DP_TRAINING_PATTERN_DISABLE);
+
+	if (ret)
+		return ret;
+
+	return cdn_dp_set_link_train(dp, DP_TRAINING_PATTERN_DISABLE);
+}
+
+static int cdn_dp_get_lower_link_rate(struct cdn_dp_device *dp)
+{
+	switch (dp->link.rate) {
+	case DP_LINK_BW_1_62:
+		return -EINVAL;
+	case DP_LINK_BW_2_7:
+		dp->link.rate = DP_LINK_BW_1_62;
+		break;
+	case DP_LINK_BW_5_4:
+		dp->link.rate = DP_LINK_BW_2_7;
+		break;
+	default:
+		dp->link.rate = DP_LINK_BW_5_4;
+		break;
+	}
+
+	return 0;
+}
+
+int cdn_dp_software_train_link(struct cdn_dp_device *dp)
+{
+	int ret, stop_err;
+	u8 link_config[2];
+	u32 rate, sink_max, source_max;
+
+	ret = drm_dp_dpcd_read(&dp->aux, DP_DPCD_REV, dp->dpcd,
+			       sizeof(dp->dpcd));
+	if (ret < 0) {
+		DRM_DEV_ERROR(dp->dev, "Failed to get caps %d\n", ret);
+		return ret;
+	}
+
+	source_max = dp->lanes;
+	sink_max = drm_dp_max_lane_count(dp->dpcd);
+	dp->link.num_lanes = min(source_max, sink_max);
+
+	source_max = drm_dp_bw_code_to_link_rate(CDN_DP_MAX_LINK_RATE);
+	sink_max = drm_dp_max_link_rate(dp->dpcd);
+	rate = min(source_max, sink_max);
+	dp->link.rate = drm_dp_link_rate_to_bw_code(rate);
+
+	link_config[0] = 0;
+	link_config[1] = 0;
+	if (dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & 0x01)
+		link_config[1] = DP_SET_ANSI_8B10B;
+	drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
+
+	while (true) {
+
+		/* Write the link configuration data */
+		link_config[0] = dp->link.rate;
+		link_config[1] = dp->link.num_lanes;
+		if (drm_dp_enhanced_frame_cap(dp->dpcd))
+			link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
+		drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, link_config, 2);
+
+		ret = cdn_dp_link_training_clock_recovery(dp);
+		if (ret) {
+			if (!cdn_dp_get_lower_link_rate(dp))
+				continue;
+
+			DRM_ERROR("training clock recovery failed: %d\n", ret);
+			break;
+		}
+
+		ret = cdn_dp_link_training_channel_equalization(dp);
+		if (ret) {
+			if (!cdn_dp_get_lower_link_rate(dp))
+				continue;
+
+			DRM_ERROR("training channel eq failed: %d\n", ret);
+			break;
+		}
+
+		break;
+	}
+
+	stop_err = cdn_dp_stop_link_train(dp);
+	if (stop_err) {
+		DRM_ERROR("stop training fail, error: %d\n", stop_err);
+		return stop_err;
+	}
+
+	return ret;
+}
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index a76121b4757c3..d70bd3d8872b5 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -18,7 +18,9 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
+#include <linux/phy/phy.h>
 #include <linux/reset.h>
+#include <soc/rockchip/rockchip_phy_typec.h>
 
 #include "cdn-dp-core.h"
 #include "cdn-dp-reg.h"
@@ -190,7 +192,7 @@ static int cdn_dp_mailbox_send(struct cdn_dp_device *dp, u8 module_id,
 	return 0;
 }
 
-static int cdn_dp_reg_write(struct cdn_dp_device *dp, u16 addr, u32 val)
+int cdn_dp_reg_write(struct cdn_dp_device *dp, u16 addr, u32 val)
 {
 	u8 msg[6];
 
@@ -610,6 +612,31 @@ int cdn_dp_train_link(struct cdn_dp_device *dp)
 {
 	int ret;
 
+	/*
+	 * DP firmware uses fixed phy config values to do training, but some
+	 * boards need to adjust these values to fit for their unique hardware
+	 * design. So if the phy is using custom config values, do software
+	 * link training instead of relying on firmware, if software training
+	 * fail, keep firmware training as a fallback if sw training fails.
+	 */
+	ret = cdn_dp_software_train_link(dp);
+	if (ret) {
+		DRM_DEV_ERROR(dp->dev,
+			"Failed to do software training %d\n", ret);
+		goto do_fw_training;
+	}
+	ret = cdn_dp_reg_write(dp, SOURCE_HDTX_CAR, 0xf);
+	if (ret) {
+		DRM_DEV_ERROR(dp->dev,
+		"Failed to write SOURCE_HDTX_CAR register %d\n", ret);
+		goto do_fw_training;
+	}
+	dp->use_fw_training = false;
+	return 0;
+
+do_fw_training:
+	dp->use_fw_training = true;
+	DRM_DEV_DEBUG_KMS(dp->dev, "use fw training\n");
 	ret = cdn_dp_training_start(dp);
 	if (ret) {
 		DRM_DEV_ERROR(dp->dev, "Failed to start training %d\n", ret);
@@ -624,7 +651,7 @@ int cdn_dp_train_link(struct cdn_dp_device *dp)
 
 	DRM_DEV_DEBUG_KMS(dp->dev, "rate:0x%x, lanes:%d\n", dp->link.rate,
 			  dp->link.num_lanes);
-	return ret;
+	return 0;
 }
 
 int cdn_dp_set_video_status(struct cdn_dp_device *dp, int active)
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index 777a3badcf215..a558624e4a4da 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -137,7 +137,7 @@
 #define HPD_EVENT_MASK			0x211c
 #define HPD_EVENT_DET			0x2120
 
-/* dpyx framer addr */
+/* dptx framer addr */
 #define DP_FRAMER_GLOBAL_CONFIG		0x2200
 #define DP_SW_RESET			0x2204
 #define DP_FRAMER_TU			0x2208
@@ -460,6 +460,40 @@
 /* Reference cycles when using lane clock as reference */
 #define LANE_REF_CYC				0xf000
 
+/* register CM_VID_CTRL */
+#define LANE_VID_REF_CYC(x)                    (((x) & (BIT(24) - 1)) << 0)
+#define NMVID_MEAS_TOLERANCE(x)                        (((x) & 0xf) << 24)
+
+/* register DP_TX_PHY_CONFIG_REG */
+#define DP_TX_PHY_TRAINING_ENABLE(x)           ((x) & 1)
+#define DP_TX_PHY_TRAINING_TYPE_PRBS7          (0 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_TPS1           (1 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_TPS2           (2 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_TPS3           (3 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_TPS4           (4 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_PLTPAT         (5 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_D10_2          (6 << 1)
+#define DP_TX_PHY_TRAINING_TYPE_HBR2CPAT       (8 << 1)
+#define DP_TX_PHY_TRAINING_PATTERN(x)          ((x) << 1)
+#define DP_TX_PHY_SCRAMBLER_BYPASS(x)          (((x) & 1) << 5)
+#define DP_TX_PHY_ENCODER_BYPASS(x)            (((x) & 1) << 6)
+#define DP_TX_PHY_SKEW_BYPASS(x)               (((x) & 1) << 7)
+#define DP_TX_PHY_DISPARITY_RST(x)             (((x) & 1) << 8)
+#define DP_TX_PHY_LANE0_SKEW(x)                (((x) & 7) << 9)
+#define DP_TX_PHY_LANE1_SKEW(x)                (((x) & 7) << 12)
+#define DP_TX_PHY_LANE2_SKEW(x)                (((x) & 7) << 15)
+#define DP_TX_PHY_LANE3_SKEW(x)                (((x) & 7) << 18)
+#define DP_TX_PHY_10BIT_ENABLE(x)              (((x) & 1) << 21)
+
+/* register DP_FRAMER_GLOBAL_CONFIG */
+#define NUM_LANES(x)           ((x) & 3)
+#define SST_MODE               (0 << 2)
+#define RG_EN                  (0 << 4)
+#define GLOBAL_EN              BIT(3)
+#define NO_VIDEO               BIT(5)
+#define ENC_RST_DIS            BIT(6)
+#define WR_VHSYNC_FALL         BIT(7)
+
 enum voltage_swing_level {
 	VOLTAGE_LEVEL_0,
 	VOLTAGE_LEVEL_1,
@@ -508,6 +542,7 @@ int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip);
 int cdn_dp_event_config(struct cdn_dp_device *dp);
 u32 cdn_dp_get_event(struct cdn_dp_device *dp);
 int cdn_dp_get_hpd_status(struct cdn_dp_device *dp);
+int cdn_dp_reg_write(struct cdn_dp_device *dp, u16 addr, u32 val);
 ssize_t cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr,
 			  u8 *data, u16 len);
 ssize_t cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr,
@@ -526,4 +561,5 @@ int cdn_dp_hdcp_tx_configuration(struct cdn_dp_device *dp, int tx_mode,
 int cdn_dp_hdcp_tx_status_req(struct cdn_dp_device *dp, uint16_t *tx_status);
 int cdn_dp_hdcp_tx_is_receiver_id_valid_req(struct cdn_dp_device *dp);
 int cdn_dp_hdcp_tx_respond_id_valid(struct cdn_dp_device *dp, bool valid);
+int cdn_dp_software_train_link(struct cdn_dp_device *dp);
 #endif /* _CDN_DP_REG_H */

From ae925b66fbe0eb74767e4107095a8b34772d8875 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 19 Jul 2018 14:15:27 +0800
Subject: [PATCH 1094/1852] mfd: fusb302: fix pin assignment selection
 algorithm

This algorithm defaults to choosing higher pin config over
lower ones in order to prefer multi-function if desired.

NAME | SIGNALING | OUTPUT TYPE | MULTI-FUNCTION | PIN CONFIG
-------------------------------------------------------------
A    |  USB G2   |  ?          | no             | 00_0001
B    |  USB G2   |  ?          | yes            | 00_0010
C    |  DP       |  CONVERTED  | no             | 00_0100
D    |  PD       |  CONVERTED  | yes            | 00_1000
E    |  DP       |  DP         | no             | 01_0000
F    |  PD       |  DP         | yes            | 10_0000

if UFP has NOT asserted multi-function preferred code masks away
B/D/F leaving only A/C/E. For single-output dongles that should
leave only one possible pin config depending on whether its a
converter DP->(VGA|HDMI) or DP output. If UFP is a USB-C receptacle
it may assert C/D/E/F. The DFP USB-C receptacle must always choose
C/D in those cases.

Change-Id: I5594d39a302f27e2d72259f6a18308488d4fa47c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/mfd/fusb302.c | 140 +++++++++++++++++++++++++++++++++---------
 drivers/mfd/fusb302.h |   1 +
 2 files changed, 111 insertions(+), 30 deletions(-)

diff --git a/drivers/mfd/fusb302.c b/drivers/mfd/fusb302.c
index f60375e159a40..240cecac65b58 100644
--- a/drivers/mfd/fusb302.c
+++ b/drivers/mfd/fusb302.c
@@ -39,15 +39,6 @@
 #define FLAG_EVENT		(EVENT_RX | EVENT_TIMER_MUX | \
 				 EVENT_TIMER_STATE)
 
-#define PIN_MAP_A		BIT(0)
-#define PIN_MAP_B		BIT(1)
-#define PIN_MAP_C		BIT(2)
-#define PIN_MAP_D		BIT(3)
-#define PIN_MAP_E		BIT(4)
-#define PIN_MAP_F		BIT(5)
-
-#define PIN_MAP_MF_MASK		0x2a
-
 #define PACKET_IS_CONTROL_MSG(header, type) \
 		(PD_HEADER_CNT(header) == 0 && \
 		 PD_HEADER_TYPE(header) == type)
@@ -56,8 +47,54 @@
 		(PD_HEADER_CNT(header) != 0 && \
 		 PD_HEADER_TYPE(header) == type)
 
-#define VDM_DP_GET_RECEPTACLE(mode)	((mode >> 6) & 0x1)
-#define VDM_DP_MULTIFUCTION(status)	((status >> 4) & 0x1)
+/*
+ * DisplayPort modes capabilities
+ * -------------------------------
+ * <31:24> : Reserved (always 0).
+ * <23:16> : UFP_D pin assignment supported
+ * <15:8>  : DFP_D pin assignment supported
+ * <7>     : USB 2.0 signaling (0b=yes, 1b=no)
+ * <6>     : Plug | Receptacle (0b == plug, 1b == receptacle)
+ * <5:2>   : xxx1: Supports DPv1.3, xx1x Supports USB Gen 2 signaling
+ *	     Other bits are reserved.
+ * <1:0>   : signal direction ( 00b=rsv, 01b=sink, 10b=src 11b=both )
+ */
+#define PD_DP_PIN_CAPS(x)	((((x) >> 6) & 0x1) ? (((x) >> 16) & 0x3f) \
+				 : (((x) >> 8) & 0x3f))
+#define PD_DP_SIGNAL_GEN2(x)	(((x) >> 3) & 0x1)
+
+#define MODE_DP_PIN_A		BIT(0)
+#define MODE_DP_PIN_B		BIT(1)
+#define MODE_DP_PIN_C		BIT(2)
+#define MODE_DP_PIN_D		BIT(3)
+#define MODE_DP_PIN_E		BIT(4)
+#define MODE_DP_PIN_F		BIT(5)
+
+/* Pin configs B/D/F support multi-function */
+#define MODE_DP_PIN_MF_MASK	(MODE_DP_PIN_B | MODE_DP_PIN_D | MODE_DP_PIN_F)
+/* Pin configs A/B support BR2 signaling levels */
+#define MODE_DP_PIN_BR2_MASK	(MODE_DP_PIN_A | MODE_DP_PIN_B)
+/* Pin configs C/D/E/F support DP signaling levels */
+#define MODE_DP_PIN_DP_MASK	(MODE_DP_PIN_C | MODE_DP_PIN_D | \
+				 MODE_DP_PIN_E | MODE_DP_PIN_F)
+
+/*
+ * DisplayPort Status VDO
+ * ----------------------
+ * <31:9> : Reserved (always 0).
+ * <8>    : IRQ_HPD : 1 == irq arrived since last message otherwise 0.
+ * <7>    : HPD state : 0 = HPD_LOW, 1 == HPD_HIGH
+ * <6>    : Exit DP Alt mode: 0 == maintain, 1 == exit
+ * <5>    : USB config : 0 == maintain current, 1 == switch to USB from DP
+ * <4>    : Multi-function preference : 0 == no pref, 1 == MF preferred.
+ * <3>    : enabled : is DPout on/off.
+ * <2>    : power low : 0 == normal or LPM disabled, 1 == DP disabled for LPM
+ * <1:0>  : connect status : 00b ==  no (DFP|UFP)_D is connected or disabled.
+ *	    01b == DFP_D connected, 10b == UFP_D connected, 11b == both.
+ */
+#define PD_VDO_DPSTS_HPD_IRQ(x)	(((x) >> 8) & 0x1)
+#define PD_VDO_DPSTS_HPD_LVL(x)	(((x) >> 7) & 0x1)
+#define PD_VDO_DPSTS_MF_PREF(x)	(((x) >> 4) & 0x1)
 
 static u8 fusb30x_port_used;
 static struct fusb30x_chip *fusb30x_port_info[256];
@@ -251,8 +288,7 @@ static void platform_fusb_notify(struct fusb30x_chip *chip)
 		if (dp) {
 			dfp = true;
 			usb_ss = (chip->notify.pin_assignment_def &
-				 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ?
-				 true : false;
+				  MODE_DP_PIN_MF_MASK) ? true : false;
 			hpd = GET_DP_STATUS_HPD(chip->notify.dp_status);
 		} else if (chip->notify.data_role) {
 			dfp = true;
@@ -918,10 +954,57 @@ static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 	}
 }
 
-static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
+/*
+ * This algorithm defaults to choosing higher pin config over lower ones in
+ * order to prefer multi-function if desired.
+ *
+ *  NAME | SIGNALING | OUTPUT TYPE | MULTI-FUNCTION | PIN CONFIG
+ * -------------------------------------------------------------
+ *  A    |  USB G2   |  ?          | no             | 00_0001
+ *  B    |  USB G2   |  ?          | yes            | 00_0010
+ *  C    |  DP       |  CONVERTED  | no             | 00_0100
+ *  D    |  PD       |  CONVERTED  | yes            | 00_1000
+ *  E    |  DP       |  DP         | no             | 01_0000
+ *  F    |  PD       |  DP         | yes            | 10_0000
+ *
+ * if UFP has NOT asserted multi-function preferred code masks away B/D/F
+ * leaving only A/C/E.  For single-output dongles that should leave only one
+ * possible pin config depending on whether its a converter DP->(VGA|HDMI) or DP
+ * output.  If UFP is a USB-C receptacle it may assert C/D/E/F.  The DFP USB-C
+ * receptacle must always choose C/D in those cases.
+ */
+static int pd_dfp_dp_get_pin_assignment(struct fusb30x_chip *chip,
+					uint32_t caps, uint32_t status)
 {
-	u32 tmp, i;
+	uint32_t pin_caps;
 
+	/* revisit with DFP that can be a sink */
+	pin_caps = PD_DP_PIN_CAPS(caps);
+
+	/* if don't want multi-function then ignore those pin configs */
+	if (!PD_VDO_DPSTS_MF_PREF(status))
+		pin_caps &= ~MODE_DP_PIN_MF_MASK;
+
+	/* revisit if DFP drives USB Gen 2 signals */
+	if (PD_DP_SIGNAL_GEN2(caps))
+		pin_caps &= ~MODE_DP_PIN_DP_MASK;
+	else
+		pin_caps &= ~MODE_DP_PIN_BR2_MASK;
+
+	/* if C/D present they have precedence over E/F for USB-C->USB-C */
+	if (pin_caps & (MODE_DP_PIN_C | MODE_DP_PIN_D))
+		pin_caps &= ~(MODE_DP_PIN_E | MODE_DP_PIN_F);
+
+	/* returns undefined for zero */
+	if (!pin_caps)
+		return 0;
+
+	/* choosing higher pin config over lower ones */
+	return 1 << (31 - __builtin_clz(pin_caps));
+}
+
+static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
+{
 	chip->send_head = (chip->msg_id & 0x7) << 9;
 	chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 
@@ -965,20 +1048,14 @@ static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 		chip->send_head |= (2 << 12);
 		chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 
-		tmp = chip->notify.pin_assignment_support;
-		if (!VDM_DP_MULTIFUCTION(chip->notify.dp_status))
-			tmp &= ~PIN_MAP_MF_MASK;
-
-		for (i = 0; i < 6; i++) {
-			if (!(tmp & 0x20))
-				tmp = tmp << 1;
-			else
-				break;
-		}
-		chip->notify.pin_assignment_def = 0x20 >> i;
+		chip->notify.pin_assignment_def =
+			pd_dfp_dp_get_pin_assignment(chip, chip->notify.dp_caps,
+						     chip->notify.dp_status);
 
 		chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 				    (1 << 2) | 2;
+		dev_dbg(chip->dev, "DisplayPort Configurations: 0x%08x\n",
+			chip->send_load[1]);
 		break;
 	default:
 		break;
@@ -1104,17 +1181,20 @@ static void process_vdm_msg(struct fusb30x_chip *chip)
 				 * enter first mode default
 				 */
 				tmp = chip->rec_load[1];
+
 				if ((!((tmp >> 8) & 0x3f)) &&
 				    (!((tmp >> 16) & 0x3f))) {
 					chip->val_tmp |= 1;
 					break;
 				}
+				chip->notify.dp_caps = chip->rec_load[1];
 				chip->notify.pin_assignment_def = 0;
 				chip->notify.pin_assignment_support =
-					VDM_DP_GET_RECEPTACLE(tmp) ?
-					((chip->rec_load[1] >> 16) & 0x3f) :
-					((chip->rec_load[1] >> 8) & 0x3f);
+							PD_DP_PIN_CAPS(tmp);
 				chip->val_tmp |= 1;
+				dev_dbg(chip->dev,
+					"DisplayPort Capabilities: 0x%08x\n",
+					chip->rec_load[1]);
 			}
 			break;
 		case VDM_ENTER_MODE:
@@ -1122,7 +1202,7 @@ static void process_vdm_msg(struct fusb30x_chip *chip)
 			break;
 		case VDM_DP_STATUS_UPDATE:
 			chip->notify.dp_status = GET_DP_STATUS(chip->rec_load[1]);
-			dev_dbg(chip->dev, "dp_status 0x%x\n",
+			dev_dbg(chip->dev, "DisplayPort Status: 0x%08x\n",
 				chip->rec_load[1]);
 			chip->val_tmp = 1;
 			break;
diff --git a/drivers/mfd/fusb302.h b/drivers/mfd/fusb302.h
index 1ae63788d0b8a..4f5ca64f72266 100644
--- a/drivers/mfd/fusb302.h
+++ b/drivers/mfd/fusb302.h
@@ -448,6 +448,7 @@ struct notify_info {
 	int pin_assignment_def;
 	bool attention;
 	u32 dp_status;
+	u32 dp_caps;
 };
 
 enum tx_state {

From eb2ac310a670caad355093f243e44781793455a4 Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Wed, 15 Aug 2018 17:05:06 +0800
Subject: [PATCH 1095/1852] arm64: dts: rockchip: add rock960 board support

rock960 board is the first rockchip SoC based 96board, so we should
support this board in our SDK. grab this dts from below url.

the initial author is Jack Ma <jack@vamrs.com>
https://raw.githubusercontent.com/96rocks/kernel/rock960-4.4-dev/
arch/arm64/boot/dts/rockchip/rock960-model-ab-linux.dts

Change-Id: I823d7a4b129716c1df4d0a6795118abfaf7120f0
Signed-offf-by: Jack Ma <jack@vamrs.com>
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
---
 .../devicetree/bindings/arm/rockchip.txt      |    4 +
 arch/arm64/boot/dts/rockchip/Makefile         |    1 +
 .../boot/dts/rockchip/rk3399-rock960-ab.dts   | 1083 +++++++++++++++++
 3 files changed, 1088 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960-ab.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 890ddac318dd3..c85f1912f7bd5 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -115,6 +115,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
 
+- Rockchip RK3399 Rock960 version ab board:
+    Required root node properties:
+      - compatible = "rockchip,rock960", "rockchip,rk3399";
+
 - Rockchip RK3326 f863 board:
     Required root node properties:
       - compatible = "rockchip,rk3326-863-lp3-v10", "rockchip,rk3326";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index cb3e9c3d71794..c21da94de8587 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -64,6 +64,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android-6.0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960-ab.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rv1-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator-box-android-6.0.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960-ab.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960-ab.dts
new file mode 100644
index 0000000000000..601cd0c2351e3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960-ab.dts
@@ -0,0 +1,1083 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/input/input.h>
+#include "rk3399.dtsi"
+#include "rk3399-linux.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+
+	model = "ROCK960 - 96boards based on Rockchip RK3399";
+	compatible = "rockchip,rock960","rockchip,rk3399";
+
+	fiq_debugger: fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		rockchip,serial-id = <2>;
+		rockchip,signal-irq = <182>;
+		rockchip,wake-irq = <0>;
+		rockchip,irq-mode-enable = <1>;
+		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2c_xfer>;
+	};
+
+	vcc1v8_s0: vcc1v8-s0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v8_s0";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
+	vcc_sys: vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc3v3_pcie: vcc3v3-pcie-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_drv>;
+		regulator-boot-on;
+		regulator-always-on;
+		regulator-name = "vcc3v3_pcie";
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	vcc5v0_host: vcc5v0-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc5v0_host";
+		regulator-always-on;
+	};
+
+	vdd_log: vdd-log {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 25000 1>;
+		regulator-name = "vdd_log";
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1400000>;
+		regulator-always-on;
+		regulator-boot-on;
+
+		/* for rockchip boot on */
+		rockchip,pwm_id= <2>;
+		rockchip,pwm_voltage = <900000>;
+
+		vin-supply = <&vcc_sys>;
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+
+	hdmi_codec: hdmi-codec {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "HDMI-CODEC";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s2>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
+	spdif-sound {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "ROCKCHIP,SPDIF";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	spdif_out: spdif-out {
+		status = "okay";
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		wifi_chip_type = "ap6354";
+		sdio_vref = <1800>;
+		WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		/* wifi-bt-power-toggle; */
+		uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		pinctrl-0 = <&uart0_rts>;
+		pinctrl-1 = <&uart0_gpios>;
+		/* BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
+		BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio     = <&gpio2 27 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	test-power {
+		status = "okay";
+	};
+};
+
+&hdmi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&sdmmc {
+	clock-frequency = <100000000>;
+	clock-freq-min-max = <100000 100000000>;
+	supports-sd;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	num-slots = <1>;
+	//sd-uhs-sdr104;
+	vqmmc-supply = <&vcc_sd>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+	card-detect-delay = <800>;
+	status = "okay";
+};
+
+&sdio0 {
+	clock-frequency = <100000000>;
+	clock-freq-min-max = <200000 100000000>;
+	supports-sdio;
+	bus-width = <4>;
+	disable-wp;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&emmc_phy {
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	supports-emmc;
+	non-removable;
+	mmc-hs400-enhanced-strobe;
+	status = "okay";
+};
+
+&i2s0 {
+	status = "okay";
+	rockchip,i2s-broken-burst-len;
+	rockchip,playback-channels = <8>;
+	rockchip,capture-channels = <8>;
+	#sound-dai-cells = <0>;
+};
+
+&i2s2 {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&spdif {
+	pinctrl-0 = <&spdif_bus_1>;
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&i2c0 {
+	status = "okay";
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	clock-frequency = <400000>;
+
+	vdd_cpu_b: syr827@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		regulator-compatible = "fan53555-reg";
+		pinctrl-0 = <&vsel1_gpio>;
+		vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vdd_cpu_b";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_gpu: syr828@41 {
+		compatible = "silergy,syr828";
+		reg = <0x41>;
+		regulator-compatible = "fan53555-reg";
+		pinctrl-0 = <&vsel2_gpio>;
+		vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+		regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc_sys>;
+		vcc10-supply = <&vcc_sys>;
+		vcc11-supply = <&vcc_sys>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcc_1v8>;
+
+		regulators {
+			vdd_center: DCDC_REG1 {
+				regulator-name = "vdd_center";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-name = "vdd_cpu_l";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG1 {
+				regulator-name = "vcc1v8_dvp";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcca1v8_hdmi: LDO_REG2 {
+				regulator-name = "vcca1v8_hdmi";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcca_1v8: LDO_REG3 {
+				regulator-name = "vcca_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sd: LDO_REG4 {
+				regulator-name = "vcc_sd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v0_sd: LDO_REG5 {
+				regulator-name = "vcc3v0_sd";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v5: LDO_REG6 {
+				regulator-name = "vcc_1v5";
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcca0v9_hdmi: LDO_REG7 {
+				regulator-name = "vcca0v9_hdmi";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vcc_3v0: LDO_REG8 {
+				regulator-name = "vcc_3v0";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v3_s3: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c6 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+	fusb0: fusb30x@22 {
+		compatible = "fairchild,fusb302";
+		reg = <0x22>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fusb0_int>;
+		vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+		int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&i2c2 {
+	status = "okay";
+	camera0: camera-module@10 {
+		status = "disabled";
+		compatible = "omnivision,ov13850-v4l2-i2c-subdev";
+		reg = < 0x10 >;
+		device_type = "v4l2-i2c-subdev";
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "clk_cif_out";
+		pinctrl-names = "rockchip,camera_default",
+				"rockchip,camera_sleep";
+		pinctrl-0 = <&cam0_default_pins>;
+		pinctrl-1 = <&cam0_sleep_pins>;
+		//rockchip,pd-gpio = <&gpio4 4 GPIO_ACTIVE_LOW>;
+		rockchip,pwr-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
+		rockchip,rst-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+		rockchip,camera-module-mclk-name = "clk_cif_out";
+		rockchip,camera-module-facing = "back";
+		rockchip,camera-module-name = "cmk-cb0695-fv1";
+		rockchip,camera-module-len-name = "lg9569a2";
+		rockchip,camera-module-fov-h = "66.0";
+		rockchip,camera-module-fov-v = "50.1";
+		rockchip,camera-module-orientation = <0>;
+		rockchip,camera-module-iq-flip = <0>;
+		rockchip,camera-module-iq-mirror = <0>;
+		rockchip,camera-module-flip = <1>;
+		rockchip,camera-module-mirror = <0>;
+
+		rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
+		rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
+		rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
+		rockchip,camera-module-flash-support = <1>;
+		rockchip,camera-module-mipi-dphy-index = <0>;
+	};
+
+	camera1: camera-module@36 {
+		status = "disabled";
+		compatible = "omnivision,ov4690-v4l2-i2c-subdev";
+		reg = <0x36>;
+		device_type = "v4l2-i2c-subdev";
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "clk_cif_out";
+		pinctrl-names = "rockchip,camera_default",
+				"rockchip,camera_sleep";
+		pinctrl-0 = <&cam0_default_pins>;
+		pinctrl-1 = <&cam0_sleep_pins>;
+		rockchip,pd-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
+		//rockchip,pwr-gpio = <&gpio3 13 0>;
+		rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
+		rockchip,camera-module-mclk-name = "clk_cif_out";
+		rockchip,camera-module-facing = "back";
+		rockchip,camera-module-name = "LA6111PA";
+		rockchip,camera-module-len-name = "YM6011P";
+		rockchip,camera-module-fov-h = "116";
+		rockchip,camera-module-fov-v = "61";
+		rockchip,camera-module-orientation = <0>;
+		rockchip,camera-module-iq-flip = <0>;
+		rockchip,camera-module-iq-mirror = <0>;
+		rockchip,camera-module-flip = <0>;
+		rockchip,camera-module-mirror = <1>;
+
+		rockchip,camera-module-defrect0 = <2688 1520 0 0 2688 1520>;
+		rockchip,camera-module-flash-support = <0>;
+		rockchip,camera-module-mipi-dphy-index = <0>;
+	};
+
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&gpu {
+	status = "okay";
+	mali-supply = <&vdd_gpu>;
+};
+
+&threshold {
+	temperature = <85000>;
+};
+
+&target {
+	temperature = <100000>;
+};
+
+&soc_crit {
+	temperature = <105000>;
+};
+
+&tcphy0 {
+	extcon = <&fusb0>;
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&tsadc {
+	/* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-mode = <1>;
+	/* tshut polarity 0:LOW 1:HIGH */
+	rockchip,hw-tshut-polarity = <1>;
+	rockchip,hw-tshut-temp = <110000>;
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+	extcon = <&fusb0>;
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts>;
+	dmas = <&dmac_peri 0>, <&dmac_peri 1>;
+	dma-names = "tx", "rx";
+	status = "okay";
+};
+
+&uart3 {
+	compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
+	reg = <0x0 0xff1b0000 0x0 0x100>;
+	clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+	clock-names = "baudclk", "apb_pclk";
+	interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
+	dmas = <&dmac_peri 6>, <&dmac_peri 7>;
+	dma-names = "tx", "rx";
+	reg-shift = <2>;
+	reg-io-width = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>;
+	status = "okay";
+};
+
+&uart4 {
+	status = "okay";
+	dmas = <&dmac_peri 8>, <&dmac_peri 9>;
+	dma-names = "tx", "rx";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usbdrd3_0 {
+	extcon = <&fusb0>;
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&pwm3 {
+	status = "okay";
+
+	interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
+	compatible = "rockchip,remotectl-pwm";
+	remote_pwm_id = <3>;
+	handle_cpu_id = <1>;
+	remote_support_psci = <1>;
+
+	ir_key1 {
+		rockchip,usercode = <0x4040>;
+		rockchip,key_table =
+			<0xf2	KEY_REPLY>,
+			<0xba	KEY_BACK>,
+			<0xf4	KEY_UP>,
+			<0xf1	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xee	KEY_RIGHT>,
+			<0xbd	KEY_HOME>,
+			<0xea	KEY_VOLUMEUP>,
+			<0xe3	KEY_VOLUMEDOWN>,
+			<0xe2	KEY_SEARCH>,
+			<0xb2	KEY_POWER>,
+			<0xbc	KEY_MUTE>,
+			<0xec	KEY_MENU>,
+			<0xbf	0x190>,
+			<0xe0	0x191>,
+			<0xe1	0x192>,
+			<0xe9	183>,
+			<0xe6	248>,
+			<0xe8	185>,
+			<0xe7	186>,
+			<0xf0	388>,
+			<0xbe	0x175>;
+	};
+
+	ir_key2 {
+		rockchip,usercode = <0xff00>;
+		rockchip,key_table =
+			<0xf9	KEY_HOME>,
+			<0xbf	KEY_BACK>,
+			<0xfb	KEY_MENU>,
+			<0xaa	KEY_REPLY>,
+			<0xb9	KEY_UP>,
+			<0xe9	KEY_DOWN>,
+			<0xb8	KEY_LEFT>,
+			<0xea	KEY_RIGHT>,
+			<0xeb	KEY_VOLUMEDOWN>,
+			<0xef	KEY_VOLUMEUP>,
+			<0xf7	KEY_MUTE>,
+			<0xe7	KEY_POWER>,
+			<0xfc	KEY_POWER>,
+			<0xa9	KEY_VOLUMEDOWN>,
+			<0xa8	KEY_VOLUMEDOWN>,
+			<0xe0	KEY_VOLUMEDOWN>,
+			<0xa5	KEY_VOLUMEDOWN>,
+			<0xab	183>,
+			<0xb7	388>,
+			<0xe8	388>,
+			<0xf8	184>,
+			<0xaf	185>,
+			<0xed	KEY_VOLUMEDOWN>,
+			<0xee	186>,
+			<0xb3	KEY_VOLUMEDOWN>,
+			<0xf1	KEY_VOLUMEDOWN>,
+			<0xf2	KEY_VOLUMEDOWN>,
+			<0xf3	KEY_SEARCH>,
+			<0xb4	KEY_VOLUMEDOWN>,
+			<0xbe	KEY_SEARCH>;
+	};
+
+	ir_key3 {
+		rockchip,usercode = <0x1dcc>;
+		rockchip,key_table =
+			<0xee	KEY_REPLY>,
+			<0xf0	KEY_BACK>,
+			<0xf8	KEY_UP>,
+			<0xbb	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xed	KEY_RIGHT>,
+			<0xfc	KEY_HOME>,
+			<0xf1	KEY_VOLUMEUP>,
+			<0xfd	KEY_VOLUMEDOWN>,
+			<0xb7	KEY_SEARCH>,
+			<0xff	KEY_POWER>,
+			<0xf3	KEY_MUTE>,
+			<0xbf	KEY_MENU>,
+			<0xf9	0x191>,
+			<0xf5	0x192>,
+			<0xb3	388>,
+			<0xbe	KEY_1>,
+			<0xba	KEY_2>,
+			<0xb2	KEY_3>,
+			<0xbd	KEY_4>,
+			<0xf9	KEY_5>,
+			<0xb1	KEY_6>,
+			<0xfc	KEY_7>,
+			<0xf8	KEY_8>,
+			<0xb0	KEY_9>,
+			<0xb6	KEY_0>,
+			<0xb5	KEY_BACKSPACE>;
+	};
+};
+
+&gmac {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&rgmii_pins>;
+	pinctrl-1 = <&rgmii_sleep_pins>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
+	status = "disabled";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
+	audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
+	sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
+	gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pcie0 {
+	ep-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn_cpm>;
+	status = "okay";
+};
+
+&pinctrl {
+
+	sdio0 {
+		sdio0_bus1: sdio0-bus1 {
+			rockchip,pins =
+				<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>;
+		};
+
+		sdio0_bus4: sdio0-bus4 {
+			rockchip,pins =
+				<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
+				<2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
+				<2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
+				<2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
+		};
+
+		sdio0_cmd: sdio0-cmd {
+			rockchip,pins =
+				<2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
+		};
+
+		sdio0_clk: sdio0-clk {
+			rockchip,pins =
+				<2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_bus1: sdmmc-bus1 {
+			rockchip,pins =
+				<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
+		};
+
+		sdmmc_bus4: sdmmc-bus4 {
+			rockchip,pins =
+				<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
+				<4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
+				<4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
+				<4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
+		};
+
+		sdmmc_clk: sdmmc-clk {
+			rockchip,pins =
+				<4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
+		};
+
+		sdmmc_cmd: sdmmc-cmd {
+			rockchip,pins =
+				<4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins =
+				<0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wireless-bluetooth {
+		uart0_gpios: uart0-gpios {
+			rockchip,pins =
+				<2 19 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb2 {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins =
+				<4 25 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		pcie_drv: pcie-drv {
+			rockchip,pins =
+				<3 11 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		vsel1_gpio: vsel1-gpio {
+			rockchip,pins =
+				<1 17 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		vsel2_gpio: vsel2-gpio {
+			rockchip,pins =
+				<1 14 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	gmac {
+		rgmii_sleep_pins: rgmii-sleep-pins {
+			rockchip,pins =
+				<3 15 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+	};
+
+	fusb30x {
+		fusb0_int: fusb0-int {
+			rockchip,pins =
+				<1 2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&pvtm {
+	status = "okay";
+};
+
+&pmu_pvtm {
+	status = "okay";
+};
+
+&pmu_io_domains {
+	status = "okay";
+	pmu1830-supply = <&vcc_1v8>;
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <0>;
+	rockchip,sleep-mode-config = <
+		(0
+		| RKPM_SLP_ARMPD
+		| RKPM_SLP_PERILPPD
+		| RKPM_SLP_DDR_RET
+		| RKPM_SLP_PLLPD
+		| RKPM_SLP_CENTER_PD
+		| RKPM_SLP_AP_PWROFF
+		)
+	>;
+	rockchip,wakeup-config = <
+		(0
+		| RKPM_GPIO_WKUP_EN
+		| RKPM_PWM_WKUP_EN
+		)
+	>;
+	rockchip,pwm-regulator-config = <
+		(0
+		| PWM2_REGULATOR_EN
+		)
+	>;
+	rockchip,power-ctrl =
+		<&gpio1 17 GPIO_ACTIVE_HIGH>,
+		<&gpio1 14 GPIO_ACTIVE_HIGH>;
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&cif_isp0 {
+	rockchip,camera-modules-attached = <&camera0>;
+	status = "okay";
+};
+
+&isp0_mmu {
+	status = "okay";
+};
+
+&cif_isp1 {
+	rockchip,camera-modules-attached = <&camera1>;
+	status = "disabled";
+};
+
+&isp1_mmu {
+	status = "okay";
+};
+
+&vpu {
+	status = "okay";
+	/* 0 means ion, 1 means drm */
+	//allocator = <0>;
+};
+
+&rkvdec {
+	status = "okay";
+	/* 0 means ion, 1 means drm */
+	//allocator = <0>;
+};
+
+&display_subsystem {
+	status = "okay";
+};

From 8285b7fa920bb77d85c83bc62478556638f7832e Mon Sep 17 00:00:00 2001
From: Zorro Liu <lyx@rock-chips.com>
Date: Wed, 15 Aug 2018 10:15:58 +0800
Subject: [PATCH 1096/1852] drivers: input: sensors: make compass ak8963 &&
 ak09911 can pass google vts/cts test

Change-Id: I565cfff357e0c7b3fb6311b5bb6465d0a0b030e9
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
---
 drivers/input/sensors/compass/ak09911.c | 586 +++++++++---------------
 drivers/input/sensors/compass/ak8963.c  | 568 +++++++++--------------
 2 files changed, 452 insertions(+), 702 deletions(-)

diff --git a/drivers/input/sensors/compass/ak09911.c b/drivers/input/sensors/compass/ak09911.c
index 5a8b916a51ce3..a497d72be0e45 100644
--- a/drivers/input/sensors/compass/ak09911.c
+++ b/drivers/input/sensors/compass/ak09911.c
@@ -19,8 +19,8 @@
 #include <linux/irq.h>
 #include <linux/miscdevice.h>
 #include <linux/gpio.h>
-#include <asm/uaccess.h>
-#include <asm/atomic.h>
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
 #include <linux/delay.h>
 #include <linux/input.h>
 #include <linux/workqueue.h>
@@ -31,50 +31,46 @@
 #endif
 #include <linux/sensor-dev.h>
 
-
-
 #define SENSOR_DATA_SIZE	9
 #define YPR_DATA_SIZE		16
-#define RWBUF_SIZE		16
+#define RWBUF_SIZE			16
 
 #define ACC_DATA_FLAG		0
 #define MAG_DATA_FLAG		1
 #define ORI_DATA_FLAG		2
-#define AKM_NUM_SENSORS		3
+#define AKM_NUM_SENSORS	3
 
-#define ACC_DATA_READY		(1<<(ACC_DATA_FLAG))
-#define MAG_DATA_READY		(1<<(MAG_DATA_FLAG))
-#define ORI_DATA_READY		(1<<(ORI_DATA_FLAG))
+#define ACC_DATA_READY		(1 << (ACC_DATA_FLAG))
+#define MAG_DATA_READY	(1 << (MAG_DATA_FLAG))
+#define ORI_DATA_READY		(1 << (ORI_DATA_FLAG))
 
 /*Constant definitions of the AK09911.*/
 #define AK09911_MEASUREMENT_TIME_US	10000
 
-#define AK09911_MODE_SNG_MEASURE	0x01
+#define AK09911_MODE_SNG_MEASURE		0x01
 #define AK09911_MODE_SELF_TEST		0x10
-#define AK09911_MODE_FUSE_ACCESS	0x1F
+#define AK09911_MODE_FUSE_ACCESS		0x1F
 #define AK09911_MODE_POWERDOWN		0x00
-#define AK09911_RESET_DATA		0x01
-
+#define AK09911_RESET_DATA				0x01
 
 /* Device specific constant values */
 #define AK09911_REG_WIA1			0x00
 #define AK09911_REG_WIA2			0x01
 #define AK09911_REG_INFO1			0x02
 #define AK09911_REG_INFO2			0x03
-#define AK09911_REG_ST1				0x10
-#define AK09911_REG_HXL				0x11
-#define AK09911_REG_HXH				0x12
-#define AK09911_REG_HYL				0x13
-#define AK09911_REG_HYH				0x14
-#define AK09911_REG_HZL				0x15
-#define AK09911_REG_HZH				0x16
+#define AK09911_REG_ST1			0x10
+#define AK09911_REG_HXL			0x11
+#define AK09911_REG_HXH			0x12
+#define AK09911_REG_HYL			0x13
+#define AK09911_REG_HYH			0x14
+#define AK09911_REG_HZL			0x15
+#define AK09911_REG_HZH			0x16
 #define AK09911_REG_TMPS			0x17
-#define AK09911_REG_ST2				0x18
+#define AK09911_REG_ST2			0x18
 #define AK09911_REG_CNTL1			0x30
 #define AK09911_REG_CNTL2			0x31
 #define AK09911_REG_CNTL3			0x32
 
-
 #define AK09911_FUSE_ASAX			0x60
 #define AK09911_FUSE_ASAY			0x61
 #define AK09911_FUSE_ASAZ			0x62
@@ -82,79 +78,64 @@
 #define AK09911_INFO_SIZE			2
 #define AK09911_CONF_SIZE			3
 
-
-
-#define COMPASS_IOCTL_MAGIC                   'c'
+#define COMPASS_IOCTL_MAGIC		'c'
 
 /* IOCTLs for AKM library */
-#define ECS_IOCTL_WRITE                 _IOW(COMPASS_IOCTL_MAGIC, 0x01, char*)
-#define ECS_IOCTL_READ                  _IOWR(COMPASS_IOCTL_MAGIC, 0x02, char*)
-#define ECS_IOCTL_RESET      	        _IO(COMPASS_IOCTL_MAGIC, 0x03) /* NOT used in AK8975 */
-#define ECS_IOCTL_SET_MODE              _IOW(COMPASS_IOCTL_MAGIC, 0x04, short)
-#define ECS_IOCTL_GETDATA               _IOR(COMPASS_IOCTL_MAGIC, 0x05, char[8])
-#define ECS_IOCTL_SET_YPR               _IOW(COMPASS_IOCTL_MAGIC, 0x06, short[12])
-#define ECS_IOCTL_GET_OPEN_STATUS       _IOR(COMPASS_IOCTL_MAGIC, 0x07, int)
-#define ECS_IOCTL_GET_CLOSE_STATUS      _IOR(COMPASS_IOCTL_MAGIC, 0x08, int)
-#define ECS_IOCTL_GET_LAYOUT        	_IOR(COMPASS_IOCTL_MAGIC, 0x09, char)
-#define ECS_IOCTL_GET_ACCEL         	_IOR(COMPASS_IOCTL_MAGIC, 0x0A, short[3])
-#define ECS_IOCTL_GET_OUTBIT        	_IOR(COMPASS_IOCTL_MAGIC, 0x0B, char)
-#define ECS_IOCTL_GET_INFO		_IOR(COMPASS_IOCTL_MAGIC, 0x27, unsigned char[AK09911_INFO_SIZE])
-#define ECS_IOCTL_GET_CONF		_IOR(COMPASS_IOCTL_MAGIC, 0x28, unsigned char[AK09911_CONF_SIZE])
-#define ECS_IOCTL_GET_PLATFORM_DATA     _IOR(COMPASS_IOCTL_MAGIC, 0x0E, struct akm_platform_data)
-#define ECS_IOCTL_GET_DELAY             _IOR(COMPASS_IOCTL_MAGIC, 0x30, short)
-
-
-
-#define AK09911_DEVICE_ID		0x05
+#define ECS_IOCTL_WRITE				_IOW(COMPASS_IOCTL_MAGIC, 0x01, char*)
+#define ECS_IOCTL_READ					_IOWR(COMPASS_IOCTL_MAGIC, 0x02, char*)
+#define ECS_IOCTL_RESET				_IO(COMPASS_IOCTL_MAGIC, 0x03) /* NOT used in AK8975 */
+#define ECS_IOCTL_SET_MODE			_IOW(COMPASS_IOCTL_MAGIC, 0x04, short)
+#define ECS_IOCTL_GETDATA				_IOR(COMPASS_IOCTL_MAGIC, 0x05, char[8])
+#define ECS_IOCTL_SET_YPR				_IOW(COMPASS_IOCTL_MAGIC, 0x06, short[12])
+#define ECS_IOCTL_GET_OPEN_STATUS	_IOR(COMPASS_IOCTL_MAGIC, 0x07, int)
+#define ECS_IOCTL_GET_CLOSE_STATUS	_IOR(COMPASS_IOCTL_MAGIC, 0x08, int)
+#define ECS_IOCTL_GET_LAYOUT			_IOR(COMPASS_IOCTL_MAGIC, 0x09, char)
+#define ECS_IOCTL_GET_ACCEL			_IOR(COMPASS_IOCTL_MAGIC, 0x0A, short[3])
+#define ECS_IOCTL_GET_OUTBIT			_IOR(COMPASS_IOCTL_MAGIC, 0x0B, char)
+#define ECS_IOCTL_GET_INFO				_IOR(COMPASS_IOCTL_MAGIC, 0x27, unsigned char[AK09911_INFO_SIZE])
+#define ECS_IOCTL_GET_CONF				_IOR(COMPASS_IOCTL_MAGIC, 0x28, unsigned char[AK09911_CONF_SIZE])
+#define ECS_IOCTL_GET_PLATFORM_DATA	_IOR(COMPASS_IOCTL_MAGIC, 0x0E, struct akm_platform_data)
+#define ECS_IOCTL_GET_DELAY			_IOR(COMPASS_IOCTL_MAGIC, 0x30, short)
+
+#define AK09911_DEVICE_ID				0x05
 static struct i2c_client *this_client;
 static struct miscdevice compass_dev_device;
 
-static short g_akm_rbuf[12];
+static int g_akm_rbuf_ready;
+static int g_akm_rbuf[12];
 static char g_sensor_info[AK09911_INFO_SIZE];
 static char g_sensor_conf[AK09911_CONF_SIZE];
 
-
 /****************operate according to sensor chip:start************/
-
 static int sensor_active(struct i2c_client *client, int enable, int rate)
 {
 	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(client);
 	int result = 0;
 
-	//sensor->ops->ctrl_data = sensor_read_reg(client, sensor->ops->ctrl_reg);
-
-	//register setting according to chip datasheet
-	if(enable)
-	{
+	if (enable)
 		sensor->ops->ctrl_data = AK09911_MODE_SNG_MEASURE;
-	}
 	else
-	{
 		sensor->ops->ctrl_data = AK09911_MODE_POWERDOWN;
-	}
 
-	DBG("%s:reg=0x%x,reg_ctrl=0x%x,enable=%d\n",__func__,sensor->ops->ctrl_reg, sensor->ops->ctrl_data, enable);
 	result = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
-	if(result)
-		printk("%s:fail to active sensor\n",__func__);
+	if (result)
+		pr_err("%s:fail to active sensor\n", __func__);
 
 	return result;
-
 }
 
 static int sensor_init(struct i2c_client *client)
 {
 	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(client);
 	int result = 0;
 
 	this_client = client;
 
-	result = sensor->ops->active(client,0,0);
-	if(result)
-	{
-		printk("%s:line=%d,error\n",__func__,__LINE__);
+	result = sensor->ops->active(client, 0, 0);
+	if (result) {
+		pr_err("%s:line=%d,error\n", __func__, __LINE__);
 		return result;
 	}
 
@@ -162,45 +143,85 @@ static int sensor_init(struct i2c_client *client)
 
 	result = misc_register(&compass_dev_device);
 	if (result < 0) {
-		printk("%s:fail to register misc device %s\n", __func__, compass_dev_device.name);
+		pr_err("%s:fail to register misc device %s\n", __func__, compass_dev_device.name);
 		result = -1;
 	}
 
 	g_sensor_info[0] = AK09911_REG_WIA1;
 	result = sensor_rx_data(client, g_sensor_info, AK09911_INFO_SIZE);
-	if(result)
-	{
-		printk("%s:line=%d,error\n",__func__,__LINE__);
+	if (result) {
+		pr_err("%s:line=%d,error\n", __func__, __LINE__);
 		return result;
 	}
 
-
 	g_sensor_conf[0] = AK09911_FUSE_ASAX;
 	result = sensor_rx_data(client, g_sensor_conf, AK09911_CONF_SIZE);
-	if(result)
-	{
-		printk("%s:line=%d,error\n",__func__,__LINE__);
+	if (result) {
+		pr_err("%s:line=%d,error\n", __func__, __LINE__);
 		return result;
 	}
 
-	DBG("%s:status_cur=%d\n",__func__, sensor->status_cur);
 	return result;
 }
 
-static int sensor_report_value(struct i2c_client *client)
+static void compass_report_value(void)
 {
 	struct sensor_private_data *sensor =
-	    	(struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	static int flag;
+
+	if (!g_akm_rbuf_ready) {
+		pr_info("g_akm_rbuf not ready..............\n");
+		return;
+	}
+
+	/* Report magnetic vector information */
+	if (atomic_read(&sensor->flags.mv_flag) && (g_akm_rbuf[0] & MAG_DATA_READY)) {
+		/*
+		 *input dev will ignore report data if data value is the same with last_value,
+		 *sample rate will not enough by this way, so just avoid this case
+		 */
+		if ((sensor->axis.x == g_akm_rbuf[5]) &&
+			(sensor->axis.y == g_akm_rbuf[6]) && (sensor->axis.z == g_akm_rbuf[7])) {
+			if (flag) {
+				flag = 0;
+				sensor->axis.x += 1;
+				sensor->axis.y += 1;
+				sensor->axis.z += 1;
+			} else {
+				flag = 1;
+				sensor->axis.x -= 1;
+				sensor->axis.y -= 1;
+				sensor->axis.z -= 1;
+			}
+		} else {
+			sensor->axis.x = g_akm_rbuf[5];
+			sensor->axis.y = g_akm_rbuf[6];
+			sensor->axis.z = g_akm_rbuf[7];
+		}
+		input_report_abs(sensor->input_dev, ABS_HAT0X, sensor->axis.x);
+		input_report_abs(sensor->input_dev, ABS_HAT0Y, sensor->axis.y);
+		input_report_abs(sensor->input_dev, ABS_BRAKE, sensor->axis.z);
+		input_report_abs(sensor->input_dev, ABS_HAT1X, g_akm_rbuf[8]);
+	}
+	input_sync(sensor->input_dev);
+}
+
+static int sensor_report_value(struct i2c_client *client)
+{
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(client);
 	char buffer[SENSOR_DATA_SIZE] = {0};
 	unsigned char *stat;
 	unsigned char *stat2;
 	int ret = 0;
 	char value = 0;
-	int i;
 
-	if(sensor->ops->read_len < SENSOR_DATA_SIZE)	//sensor->ops->read_len = 8
-	{
-		printk("%s:lenth is error,len=%d\n",__func__,sensor->ops->read_len);
+	mutex_lock(&sensor->data_mutex);
+	compass_report_value();
+	mutex_unlock(&sensor->data_mutex);
+
+	if (sensor->ops->read_len < SENSOR_DATA_SIZE) {
+		pr_err("%s:length is error,len=%d\n", __func__, sensor->ops->read_len);
 		return -1;
 	}
 
@@ -211,7 +232,7 @@ static int sensor_report_value(struct i2c_client *client)
 		*buffer = sensor->ops->read_reg;
 		ret = sensor_rx_data(client, buffer, sensor->ops->read_len);
 		if (ret < 0)
-		return ret;
+			return ret;
 	} while (0);
 
 	stat = &buffer[0];
@@ -222,63 +243,21 @@ static int sensor_report_value(struct i2c_client *client)
 	 * Measurement has been completed and data is ready to be read.
 	 */
 	if ((*stat & 0x01) != 0x01) {
-		DBG(KERN_ERR "%s:ST is not set\n",__func__);
+		pr_err("%s:ST is not set\n", __func__);
 		return -1;
 	}
-#if 0
-	/*
-	 * ST2 : data error -
-	 * occurs when data read is started outside of a readable period;
-	 * data read would not be correct.
-	 * Valid in continuous measurement mode only.
-	 * In single measurement mode this error should not occour but we
-	 * stil account for it and return an error, since the data would be
-	 * corrupted.
-	 * DERR bit is self-clearing when ST2 register is read.
-	 */
-	if (*stat2 & 0x04)
-	{
-		DBG(KERN_ERR "%s:compass data error\n",__func__);
-		return -2;
-	}
 
-	/*
-	 * ST2 : overflow -
-	 * the sum of the absolute values of all axis |X|+|Y|+|Z| < 2400uT.
-	 * This is likely to happen in presence of an external magnetic
-	 * disturbance; it indicates, the sensor data is incorrect and should
-	 * be ignored.
-	 * An error is returned.
-	 * HOFL bit clears when a new measurement starts.
-	 */
-	if (*stat2 & 0x08)
-	{
-		DBG(KERN_ERR "%s:compass data overflow\n",__func__);
-		return -3;
-	}
-#endif
-	/* »¥³âµØ»º´æÊý¾Ý. */
 	mutex_lock(&sensor->data_mutex);
 	memcpy(sensor->sensor_data, buffer, sensor->ops->read_len);
 	mutex_unlock(&sensor->data_mutex);
-	DBG("%s:",__func__);
-	for(i=0; i<sensor->ops->read_len; i++)
-		DBG("0x%x,",buffer[i]);
-	DBG("\n");
-
-	if((sensor->pdata->irq_enable)&& (sensor->ops->int_status_reg >= 0))	//read sensor intterupt status register
-	{
 
+	if ((sensor->pdata->irq_enable) && (sensor->ops->int_status_reg >= 0))
 		value = sensor_read_reg(client, sensor->ops->int_status_reg);
-		DBG("%s:sensor int status :0x%x\n",__func__,value);
-	}
 
-
-	//trigger next measurement
+	/* trigger next measurement */
 	ret = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
-	if(ret)
-	{
-		printk(KERN_ERR "%s:fail to set ctrl_data:0x%x\n",__func__,sensor->ops->ctrl_data);
+	if (ret) {
+		pr_err("%s:fail to set ctrl_data:0x%x\n", __func__, sensor->ops->ctrl_data);
 		return ret;
 	}
 
@@ -287,202 +266,128 @@ static int sensor_report_value(struct i2c_client *client)
 
 static void compass_set_YPR(int *rbuf)
 {
-	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(this_client);
-
 	/* No events are reported */
 	if (!rbuf[0]) {
-		printk("%s:Don't waste a time.",__func__);
+		pr_info("%s:Don't waste a time.", __func__);
 		return;
 	}
 
-	DBG("%s:buf[0]=0x%x\n",__func__, rbuf[0]);
-
-	/* Report magnetic sensor information */
-	if (atomic_read(&sensor->flags.m_flag) && (rbuf[0] & ORI_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_RX, rbuf[9]);
-		input_report_abs(sensor->input_dev, ABS_RY, rbuf[10]);
-		input_report_abs(sensor->input_dev, ABS_RZ, rbuf[11]);
-		input_report_abs(sensor->input_dev, ABS_RUDDER, rbuf[4]);
-		DBG("%s:m_flag:x=%d,y=%d,z=%d,RUDDER=%d\n",__func__,rbuf[9], rbuf[10], rbuf[11], rbuf[4]);
-	}
-
-	/* Report acceleration sensor information */
-	if (atomic_read(&sensor->flags.a_flag) && (rbuf[0] & ACC_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_X, rbuf[1]);
-		input_report_abs(sensor->input_dev, ABS_Y, rbuf[2]);
-		input_report_abs(sensor->input_dev, ABS_Z, rbuf[3]);
-		input_report_abs(sensor->input_dev, ABS_WHEEL, rbuf[4]);
-
-		DBG("%s:a_flag:x=%d,y=%d,z=%d,WHEEL=%d\n",__func__,rbuf[1], rbuf[2], rbuf[3], rbuf[4]);
-	}
-
-	/* Report magnetic vector information */
-	if (atomic_read(&sensor->flags.mv_flag) && (rbuf[0] & MAG_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_HAT0X, rbuf[5]);
-		input_report_abs(sensor->input_dev, ABS_HAT0Y, rbuf[6]);
-		input_report_abs(sensor->input_dev, ABS_BRAKE, rbuf[7]);
-		input_report_abs(sensor->input_dev, ABS_HAT1X, rbuf[8]);
-
-		DBG("%s:mv_flag:x=%d,y=%d,z=%d,status=%d\n",__func__,rbuf[5], rbuf[6], rbuf[7], rbuf[8]);
-	}
-
-	input_sync(sensor->input_dev);
-
-	memcpy(g_akm_rbuf, rbuf, 12);	//used for ECS_IOCTL_GET_ACCEL
+	g_akm_rbuf_ready = 1;
+	memcpy(g_akm_rbuf, rbuf, 12 * sizeof(int));
 }
 
-
-
 static int compass_dev_open(struct inode *inode, struct file *file)
 {
-	struct sensor_private_data* sensor =
-		(struct sensor_private_data *)i2c_get_clientdata(this_client);
-	int result = 0;
-	DBG("%s\n",__func__);
-
-	return result;
+	return 0;
 }
 
-
 static int compass_dev_release(struct inode *inode, struct file *file)
 {
-	struct sensor_private_data* sensor =
-		(struct sensor_private_data *)i2c_get_clientdata(this_client);
-	int result = 0;
-	DBG("%s\n",__func__);
-
-	return result;
+	return 0;
 }
 
 static int compass_akm_set_mode(struct i2c_client *client, char mode)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	int result = 0;
 
-	switch(mode & 0x1f)
-	{
-		case AK09911_MODE_SNG_MEASURE:
-		case AK09911_MODE_SELF_TEST:
-		case AK09911_MODE_FUSE_ACCESS:
-			if(sensor->status_cur == SENSOR_OFF)
-			{
-				sensor->stop_work = 0;
-				sensor->status_cur = SENSOR_ON;
-
-				if(sensor->pdata->irq_enable)
-				{
-					//DBG("%s:enable irq=%d\n",__func__,client->irq);
-					//enable_irq(client->irq);
-				}
-				else
-				{
-					schedule_delayed_work(&sensor->delaywork, msecs_to_jiffies(sensor->pdata->poll_delay_ms));
-				}
-
-			}
-
-			break;
-
-		case AK09911_MODE_POWERDOWN:
-			if(sensor->status_cur == SENSOR_ON)
-			{
-				sensor->stop_work = 1;
-				if(sensor->pdata->irq_enable)
-				{
-					//DBG("%s:disable irq=%d\n",__func__,client->irq);
-					//disable_irq_nosync(client->irq);//disable irq
-				}
-				else
-				cancel_delayed_work_sync(&sensor->delaywork);
-
-				sensor->status_cur = SENSOR_OFF;
-			}
-			break;
+	switch (mode & 0x1f) {
+	case AK09911_MODE_SNG_MEASURE:
+	case AK09911_MODE_SELF_TEST:
+	case AK09911_MODE_FUSE_ACCESS:
+		if (sensor->status_cur == SENSOR_OFF) {
+			sensor->stop_work = 0;
+			sensor->status_cur = SENSOR_ON;
+			pr_info("compass ak09911 start measure");
+			schedule_delayed_work(&sensor->delaywork, 0);
+		}
+		break;
 
+	case AK09911_MODE_POWERDOWN:
+		if (sensor->status_cur == SENSOR_ON) {
+			sensor->stop_work = 1;
+			cancel_delayed_work_sync(&sensor->delaywork);
+			pr_info("compass ak09911 stop measure");
+			g_akm_rbuf_ready = 0;
+			sensor->status_cur = SENSOR_OFF;
+		}
+		break;
 	}
 
-	switch(mode & 0x1f)
-	{
-		case AK09911_MODE_SNG_MEASURE:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_SNG_MEASURE);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK09911_MODE_SELF_TEST:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_SELF_TEST);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK09911_MODE_FUSE_ACCESS:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_FUSE_ACCESS);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK09911_MODE_POWERDOWN:
-			/* Set powerdown mode */
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_POWERDOWN);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			udelay(100);
-			break;
-		default:
-			printk("%s: Unknown mode(%d)", __func__, mode);
-			result = -EINVAL;
-			break;
+	switch (mode & 0x1f) {
+	case AK09911_MODE_SNG_MEASURE:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_SNG_MEASURE);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK09911_MODE_SELF_TEST:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_SELF_TEST);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK09911_MODE_FUSE_ACCESS:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_FUSE_ACCESS);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK09911_MODE_POWERDOWN:
+		/* Set powerdown mode */
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_POWERDOWN);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		udelay(100);
+		break;
+	default:
+		pr_info("%s: Unknown mode(%d)", __func__, mode);
+		result = -EINVAL;
+		break;
 	}
-	DBG("%s:mode=0x%x\n",__func__,mode);
 	return result;
-
 }
 
 static int compass_akm_reset(struct i2c_client *client)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	int result = 0;
 
-	if(sensor->pdata->reset_pin > 0)
-	{
+	if (sensor->pdata->reset_pin > 0) {
 		gpio_direction_output(sensor->pdata->reset_pin, GPIO_LOW);
 		udelay(10);
 		gpio_direction_output(sensor->pdata->reset_pin, GPIO_HIGH);
-	}
-	else
-	{
+	} else {
 		/* Set measure mode */
 		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK09911_MODE_SNG_MEASURE);
-		if(result)
-		printk("%s:fail to Set measure mode\n",__func__);
+		if (result)
+			pr_err("%s:fail to Set measure mode\n", __func__);
 	}
 
 	udelay(100);
 
 	return result;
-
 }
 
-
-
 static int compass_akm_get_openstatus(void)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+
 	wait_event_interruptible(sensor->flags.open_wq, (atomic_read(&sensor->flags.open_flag) != 0));
+
 	return atomic_read(&sensor->flags.open_flag);
 }
 
 static int compass_akm_get_closestatus(void)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+
 	wait_event_interruptible(sensor->flags.open_wq, (atomic_read(&sensor->flags.open_flag) <= 0));
+
 	return atomic_read(&sensor->flags.open_flag);
 }
 
-
 /* ioctl - I/O control */
-static long compass_dev_ioctl(struct file *file,
-			  unsigned int cmd, unsigned long arg)
+static long compass_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
-    struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	struct i2c_client *client = this_client;
 	void __user *argp = (void __user *)arg;
 	int result = 0;
@@ -490,44 +395,36 @@ static long compass_dev_ioctl(struct file *file,
 
 	/* NOTE: In this function the size of "char" should be 1-byte. */
 	char compass_data[SENSOR_DATA_SIZE];	/* for GETDATA */
-	char rwbuf[RWBUF_SIZE]; 		/* for READ/WRITE */
+	char rwbuf[RWBUF_SIZE];	/* for READ/WRITE */
 	char mode;				/* for SET_MODE*/
 	int value[YPR_DATA_SIZE];		/* for SET_YPR */
 	int status;				/* for OPEN/CLOSE_STATUS */
 	int ret = -1;				/* Return value. */
 
-	//int8_t sensor_buf[SENSOR_DATA_SIZE];	/* for GETDATA */
-	//int32_t ypr_buf[YPR_DATA_SIZE]; 	/* for SET_YPR */
 	int16_t acc_buf[3];			/* for GET_ACCEL */
-	int64_t delay[AKM_NUM_SENSORS]; 	/* for GET_DELAY */
+	int64_t delay[AKM_NUM_SENSORS];	/* for GET_DELAY */
 	char layout;		/* for GET_LAYOUT */
 	char outbit;		/* for GET_OUTBIT */
 
 	switch (cmd) {
 	case ECS_IOCTL_WRITE:
 	case ECS_IOCTL_READ:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&rwbuf, argp, sizeof(rwbuf))) {
+		if (copy_from_user(&rwbuf, argp, sizeof(rwbuf)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_SET_MODE:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&mode, argp, sizeof(mode))) {
+		if (copy_from_user(&mode, argp, sizeof(mode)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_SET_YPR:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&value, argp, sizeof(value))) {
+		if (copy_from_user(&value, argp, sizeof(value)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GETDATA:
 	case ECS_IOCTL_GET_OPEN_STATUS:
@@ -539,8 +436,8 @@ static long compass_dev_ioctl(struct file *file,
 	case ECS_IOCTL_GET_INFO:
 	case ECS_IOCTL_GET_CONF:
 		/* Just check buffer pointer */
-		if (argp == NULL) {
-			printk("%s:invalid argument\n",__func__);
+		if (!argp) {
+			pr_err("%s:invalid argument\n", __func__);
 			return -EINVAL;
 		}
 		break;
@@ -550,44 +447,40 @@ static long compass_dev_ioctl(struct file *file,
 
 	switch (cmd) {
 	case ECS_IOCTL_WRITE:
-		DBG("%s:ECS_IOCTL_WRITE start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if ((rwbuf[0] < 2) || (rwbuf[0] > (RWBUF_SIZE-1))) {
+		if ((rwbuf[0] < 2) || (rwbuf[0] > (RWBUF_SIZE - 1))) {
 			mutex_unlock(&sensor->operation_mutex);
 			return -EINVAL;
 		}
 		ret = sensor_tx_data(client, &rwbuf[1], rwbuf[0]);
 		if (ret < 0) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:fait to tx data\n",__func__);
+			pr_err("%s:fait to tx data\n", __func__);
 			return ret;
 		}
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_READ:
-		DBG("%s:ECS_IOCTL_READ start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if ((rwbuf[0] < 1) || (rwbuf[0] > (RWBUF_SIZE-1))) {
+		if ((rwbuf[0] < 1) || (rwbuf[0] > (RWBUF_SIZE - 1))) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:data is error\n",__func__);
+			pr_err("%s:data is error\n", __func__);
 			return -EINVAL;
 		}
 		ret = sensor_rx_data(client, &rwbuf[1], rwbuf[0]);
 		if (ret < 0) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:fait to rx data\n",__func__);
+			pr_err("%s:fait to rx data\n", __func__);
 			return ret;
 		}
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_SET_MODE:
-		DBG("%s:ECS_IOCTL_SET_MODE start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if(sensor->ops->ctrl_data != mode)
-		{
+		if (sensor->ops->ctrl_data != mode) {
 			ret = compass_akm_set_mode(client, mode);
 			if (ret < 0) {
-				printk("%s:fait to set mode\n",__func__);
+				pr_err("%s:fait to set mode\n", __func__);
 				mutex_unlock(&sensor->operation_mutex);
 				return ret;
 			}
@@ -597,27 +490,22 @@ static long compass_dev_ioctl(struct file *file,
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_GETDATA:
-			DBG("%s:ECS_IOCTL_GETDATA start\n",__func__);
 			mutex_lock(&sensor->data_mutex);
-			memcpy(compass_data, sensor->sensor_data, SENSOR_DATA_SIZE);	//get data from buffer
+			memcpy(compass_data, sensor->sensor_data, SENSOR_DATA_SIZE);
 			mutex_unlock(&sensor->data_mutex);
 			break;
 	case ECS_IOCTL_SET_YPR:
-			DBG("%s:ECS_IOCTL_SET_YPR start\n",__func__);
 			mutex_lock(&sensor->data_mutex);
 			compass_set_YPR(value);
 			mutex_unlock(&sensor->data_mutex);
 		break;
 	case ECS_IOCTL_GET_OPEN_STATUS:
 		status = compass_akm_get_openstatus();
-		DBG("%s:openstatus=%d\n",__func__,status);
 		break;
 	case ECS_IOCTL_GET_CLOSE_STATUS:
 		status = compass_akm_get_closestatus();
-		DBG("%s:closestatus=%d\n",__func__,status);
 		break;
 	case ECS_IOCTL_GET_DELAY:
-		DBG("%s:ECS_IOCTL_GET_DELAY start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
 		delay[0] = sensor->flags.delay;
 		delay[1] = sensor->flags.delay;
@@ -626,54 +514,39 @@ static long compass_dev_ioctl(struct file *file,
 		break;
 
 	case ECS_IOCTL_GET_PLATFORM_DATA:
-		DBG("%s:ECS_IOCTL_GET_PLATFORM_DATA start\n",__func__);
-	//	memcpy(compass.m_layout, sensor->pdata->m_layout, sizeof(sensor->pdata->m_layout));
-	//	memcpy(compass.project_name, sensor->pdata->project_name, sizeof(sensor->pdata->project_name));
 		ret = copy_to_user(argp, &compass, sizeof(compass));
-		if(ret < 0)
-		{
-			printk("%s:error,ret=%d\n",__FUNCTION__, ret);
+		if (ret < 0) {
+			pr_err("%s:error,ret=%d\n", __func__, ret);
 			return ret;
 		}
 		break;
 	case ECS_IOCTL_GET_LAYOUT:
-		DBG("%s:ECS_IOCTL_GET_LAYOUT start\n",__func__);
-		if((sensor->pdata->layout >= 1) && (sensor->pdata->layout <=8 ))
-		layout = sensor->pdata->layout;
+		if ((sensor->pdata->layout >= 1) && (sensor->pdata->layout <= 8))
+			layout = sensor->pdata->layout;
 		else
-		layout = 1;
+			layout = 1;
 		break;
 	case ECS_IOCTL_GET_OUTBIT:
-		DBG("%s:ECS_IOCTL_GET_OUTBIT start\n",__func__);
-		outbit = 1;	//sensor->pdata->outbit;
+		outbit = 1;
 		break;
 	case ECS_IOCTL_RESET:
-		DBG("%s:ECS_IOCTL_RESET start\n",__func__);
 		ret = compass_akm_reset(client);
 		if (ret < 0)
 			return ret;
 		break;
 	case ECS_IOCTL_GET_ACCEL:
-		DBG("%s:ECS_IOCTL_GET_ACCEL start,no accel data\n",__func__);
-		mutex_lock(&sensor->operation_mutex);
-		acc_buf[0] = g_akm_rbuf[6];
-		acc_buf[1] = g_akm_rbuf[7];
-		acc_buf[2] = g_akm_rbuf[8];
-		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_GET_INFO:
 		ret = copy_to_user(argp, g_sensor_info, sizeof(g_sensor_info));
-		if(ret < 0)
-		{
-			printk("%s:error,ret=%d\n",__FUNCTION__, ret);
+		if (ret < 0) {
+			pr_err("%s:error,ret=%d\n", __func__, ret);
 			return ret;
 		}
 		break;
 	case ECS_IOCTL_GET_CONF:
 		ret = copy_to_user(argp, g_sensor_conf, sizeof(g_sensor_conf));
-		if(ret < 0)
-		{
-			printk("%s:error,ret=%d\n",__FUNCTION__, ret);
+		if (ret < 0) {
+			pr_err("%s:error,ret=%d\n", __func__, ret);
 			return ret;
 		}
 		break;
@@ -684,41 +557,37 @@ static long compass_dev_ioctl(struct file *file,
 
 	switch (cmd) {
 	case ECS_IOCTL_READ:
-		if (copy_to_user(argp, &rwbuf, rwbuf[0]+1)) {
+		if (copy_to_user(argp, &rwbuf, rwbuf[0] + 1))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GETDATA:
-		if (copy_to_user(argp, &compass_data, sizeof(compass_data))) {
+		if (copy_to_user(argp, &compass_data, sizeof(compass_data)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_OPEN_STATUS:
 	case ECS_IOCTL_GET_CLOSE_STATUS:
-		if (copy_to_user(argp, &status, sizeof(status))) {
+		if (copy_to_user(argp, &status, sizeof(status)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_DELAY:
-		if (copy_to_user(argp, &delay, sizeof(delay))) {
+		if (copy_to_user(argp, &delay, sizeof(delay)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_LAYOUT:
 		if (copy_to_user(argp, &layout, sizeof(layout))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_OUTBIT:
 		if (copy_to_user(argp, &outbit, sizeof(outbit))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_ACCEL:
 		if (copy_to_user(argp, &acc_buf, sizeof(acc_buf))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
@@ -729,17 +598,14 @@ static long compass_dev_ioctl(struct file *file,
 	return result;
 }
 
-static struct file_operations compass_dev_fops =
-{
+static const struct file_operations compass_dev_fops = {
 	.owner = THIS_MODULE,
 	.open = compass_dev_open,
 	.release = compass_dev_release,
 	.unlocked_ioctl = compass_dev_ioctl,
 };
 
-
-static struct miscdevice compass_dev_device =
-{
+static struct miscdevice compass_dev_device = {
 	.minor = MISC_DYNAMIC_MINOR,
 	.name = "akm_dev",
 	.fops = &compass_dev_fops,
@@ -747,37 +613,35 @@ static struct miscdevice compass_dev_device =
 
 struct sensor_operate compass_akm09911_ops = {
 	.name				= "akm09911",
-	.type				= SENSOR_TYPE_COMPASS,	//it is important
+	.type				= SENSOR_TYPE_COMPASS,
 	.id_i2c				= COMPASS_ID_AK09911,
-	.read_reg			= AK09911_REG_ST1,	//read data
-	.read_len			= SENSOR_DATA_SIZE,	//data length
-	.id_reg				= AK09911_REG_WIA2,	//read id
-	.id_data 			= AK09911_DEVICE_ID,
-	.precision			= 8,			//12 bits
-	.ctrl_reg 			= AK09911_REG_CNTL2,	//enable or disable
-	.int_status_reg			= SENSOR_UNKNOW_DATA,	//not exist
-	.range				= {-0xffff,0xffff},
-	.trig				= IRQF_TRIGGER_RISING,	//if LEVEL interrupt then IRQF_ONESHOT
+	.read_reg				= AK09911_REG_ST1,
+	.read_len				= SENSOR_DATA_SIZE,
+	.id_reg				= AK09911_REG_WIA2,
+	.id_data				= AK09911_DEVICE_ID,
+	.precision				= 8,
+	.ctrl_reg				= AK09911_REG_CNTL2,
+	.int_status_reg		= SENSOR_UNKNOW_DATA,
+	.range				= {-0xffff, 0xffff},
+	.trig					= IRQF_TRIGGER_RISING,
 	.active				= sensor_active,
-	.init				= sensor_init,
+	.init					= sensor_init,
 	.report				= sensor_report_value,
-	.misc_dev 			= NULL,			//private misc support
+	.misc_dev			= NULL,
 };
 
 /****************operate according to sensor chip:end************/
-
-//function name should not be changed
 static struct sensor_operate *compass_get_ops(void)
 {
 	return &compass_akm09911_ops;
 }
 
-
 static int __init compass_akm09911_init(void)
 {
 	struct sensor_operate *ops = compass_get_ops();
 	int result = 0;
 	int type = ops->type;
+
 	result = sensor_register_slave(type, NULL, NULL, compass_get_ops);
 
 	return result;
@@ -787,11 +651,9 @@ static void __exit compass_akm09911_exit(void)
 {
 	struct sensor_operate *ops = compass_get_ops();
 	int type = ops->type;
+
 	sensor_unregister_slave(type, NULL, NULL, compass_get_ops);
 }
 
-
 module_init(compass_akm09911_init);
 module_exit(compass_akm09911_exit);
-
-
diff --git a/drivers/input/sensors/compass/ak8963.c b/drivers/input/sensors/compass/ak8963.c
index ea0588e07c19b..98bafc4672799 100644
--- a/drivers/input/sensors/compass/ak8963.c
+++ b/drivers/input/sensors/compass/ak8963.c
@@ -19,8 +19,8 @@
 #include <linux/irq.h>
 #include <linux/miscdevice.h>
 #include <linux/gpio.h>
-#include <asm/uaccess.h>
-#include <asm/atomic.h>
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
 #include <linux/delay.h>
 #include <linux/input.h>
 #include <linux/workqueue.h>
@@ -31,43 +31,30 @@
 #endif
 #include <linux/sensor-dev.h>
 
-#define AKM_SENSOR_INFO_SIZE 2
-#define AKM_SENSOR_CONF_SIZE 3
-#define SENSOR_DATA_SIZE	8
-#define YPR_DATA_SIZE		12
-#define RWBUF_SIZE		16
+#define AKM_SENSOR_INFO_SIZE	2
+#define AKM_SENSOR_CONF_SIZE	3
+#define SENSOR_DATA_SIZE		8
+#define YPR_DATA_SIZE			12
+#define RWBUF_SIZE				16
 
-#define ACC_DATA_FLAG		0
-#define MAG_DATA_FLAG		1
-#define ORI_DATA_FLAG		2
+#define ACC_DATA_FLAG			0
+#define MAG_DATA_FLAG			1
+#define ORI_DATA_FLAG			2
 #define AKM_NUM_SENSORS		3
 
-#define ACC_DATA_READY		(1<<(ACC_DATA_FLAG))
-#define MAG_DATA_READY		(1<<(MAG_DATA_FLAG))
-#define ORI_DATA_READY		(1<<(ORI_DATA_FLAG))
+#define ACC_DATA_READY			(1 << (ACC_DATA_FLAG))
+#define MAG_DATA_READY		(1 << (MAG_DATA_FLAG))
+#define ORI_DATA_READY			(1 << (ORI_DATA_FLAG))
 
-/*! \name AK8963 constant definition
- \anchor AK8963_Def
- Constant definitions of the AK8963.*/
 #define AK8963_MEASUREMENT_TIME_US	10000
 
-/*! \name AK8963 operation mode
- \anchor AK8963_Mode
- Defines an operation mode of the AK8963.*/
-/*! @{*/
 #define AK8963_MODE_SNG_MEASURE	0x01
 #define	AK8963_MODE_SELF_TEST	0x08
 #define	AK8963_MODE_FUSE_ACCESS	0x0F
 #define	AK8963_MODE_POWERDOWN	0x00
 
-/*! @}*/
-
-/*! \name AK8963 register address
-\anchor AK8963_REG
-Defines a register address of the AK8963.*/
-/*! @{*/
 #define AK8963_REG_WIA		0x00
-#define AK8963_REG_INFO		0x01
+#define AK8963_REG_INFO	0x01
 #define AK8963_REG_ST1		0x02
 #define AK8963_REG_HXL		0x03
 #define AK8963_REG_HXH		0x04
@@ -78,133 +65,157 @@ Defines a register address of the AK8963.*/
 #define AK8963_REG_ST2		0x09
 #define AK8963_REG_CNTL1	0x0A
 #define AK8963_REG_CNTL2	0x0B
-#define AK8963_REG_ASTC		0x0C
+#define AK8963_REG_ASTC	0x0C
 #define AK8963_REG_TS1		0x0D
 #define AK8963_REG_TS2		0x0E
 #define AK8963_REG_I2CDIS	0x0F
 
-#define AK8963_WIA_VALUE		0x48
-
-/*! @}*/
+#define AK8963_WIA_VALUE	0x48
 
-/*! \name AK8963 fuse-rom address
-\anchor AK8963_FUSE
-Defines a read-only address of the fuse ROM of the AK8963.*/
-/*! @{*/
 #define AK8963_FUSE_ASAX	0x10
 #define AK8963_FUSE_ASAY	0x11
 #define AK8963_FUSE_ASAZ	0x12
-/*! @}*/
-
-#define AK8963_INFO_DATA	(0x03<<3)
 
+#define AK8963_INFO_DATA	(0x03 << 3)
 
 #define COMPASS_IOCTL_MAGIC                   'c'
 
 /* IOCTLs for AKM library */
-#define ECS_IOCTL_WRITE                 _IOW(COMPASS_IOCTL_MAGIC, 0x01, char*)
-#define ECS_IOCTL_READ                  _IOWR(COMPASS_IOCTL_MAGIC, 0x02, char*)
-#define ECS_IOCTL_RESET      	        _IO(COMPASS_IOCTL_MAGIC, 0x03) /* NOT used in AK8975 */
-#define ECS_IOCTL_SET_MODE              _IOW(COMPASS_IOCTL_MAGIC, 0x04, short)
-#define ECS_IOCTL_GETDATA               _IOR(COMPASS_IOCTL_MAGIC, 0x05, char[SENSOR_DATA_SIZE])
-#define ECS_IOCTL_SET_YPR               _IOW(COMPASS_IOCTL_MAGIC, 0x06, short[12])
-#define ECS_IOCTL_GET_OPEN_STATUS       _IOR(COMPASS_IOCTL_MAGIC, 0x07, int)
-#define ECS_IOCTL_GET_CLOSE_STATUS      _IOR(COMPASS_IOCTL_MAGIC, 0x08, int)
-#define ECS_IOCTL_GET_LAYOUT        	_IOR(COMPASS_IOCTL_MAGIC, 0x09, char)
-#define ECS_IOCTL_GET_ACCEL         	_IOR(COMPASS_IOCTL_MAGIC, 0x0A, short[3])
-#define ECS_IOCTL_GET_OUTBIT        	_IOR(COMPASS_IOCTL_MAGIC, 0x0B, char)
-#define ECS_IOCTL_GET_DELAY             _IOR(COMPASS_IOCTL_MAGIC, 0x30, short)
-#define ECS_IOCTL_GET_PROJECT_NAME      _IOR(COMPASS_IOCTL_MAGIC, 0x0D, char[64])
-#define ECS_IOCTL_GET_MATRIX            _IOR(COMPASS_IOCTL_MAGIC, 0x0E, short [4][3][3])
-#define ECS_IOCTL_GET_PLATFORM_DATA     _IOR(COMPASS_IOCTL_MAGIC, 0x0E, struct akm_platform_data)
-#define ECS_IOCTL_GET_INFO			_IOR(COMPASS_IOCTL_MAGIC, 0x27, unsigned char[AKM_SENSOR_INFO_SIZE])
-#define ECS_IOCTL_GET_CONF			_IOR(COMPASS_IOCTL_MAGIC, 0x28, unsigned char[AKM_SENSOR_CONF_SIZE])
-
-#define AK8963_DEVICE_ID		0x48
+#define ECS_IOCTL_WRITE				_IOW(COMPASS_IOCTL_MAGIC, 0x01, char*)
+#define ECS_IOCTL_READ					_IOWR(COMPASS_IOCTL_MAGIC, 0x02, char*)
+#define ECS_IOCTL_RESET				_IO(COMPASS_IOCTL_MAGIC, 0x03)
+#define ECS_IOCTL_SET_MODE			_IOW(COMPASS_IOCTL_MAGIC, 0x04, short)
+#define ECS_IOCTL_GETDATA				_IOR(COMPASS_IOCTL_MAGIC, 0x05, char[SENSOR_DATA_SIZE])
+#define ECS_IOCTL_SET_YPR				_IOW(COMPASS_IOCTL_MAGIC, 0x06, short[12])
+#define ECS_IOCTL_GET_OPEN_STATUS	_IOR(COMPASS_IOCTL_MAGIC, 0x07, int)
+#define ECS_IOCTL_GET_CLOSE_STATUS	_IOR(COMPASS_IOCTL_MAGIC, 0x08, int)
+#define ECS_IOCTL_GET_LAYOUT			_IOR(COMPASS_IOCTL_MAGIC, 0x09, char)
+#define ECS_IOCTL_GET_ACCEL			_IOR(COMPASS_IOCTL_MAGIC, 0x0A, short[3])
+#define ECS_IOCTL_GET_OUTBIT			_IOR(COMPASS_IOCTL_MAGIC, 0x0B, char)
+#define ECS_IOCTL_GET_DELAY			_IOR(COMPASS_IOCTL_MAGIC, 0x30, short)
+#define ECS_IOCTL_GET_PROJECT_NAME	_IOR(COMPASS_IOCTL_MAGIC, 0x0D, char[64])
+#define ECS_IOCTL_GET_MATRIX			_IOR(COMPASS_IOCTL_MAGIC, 0x0E, short [4][3][3])
+#define ECS_IOCTL_GET_PLATFORM_DATA	_IOR(COMPASS_IOCTL_MAGIC, 0x0E, struct akm_platform_data)
+#define ECS_IOCTL_GET_INFO				_IOR(COMPASS_IOCTL_MAGIC, 0x27, unsigned char[AKM_SENSOR_INFO_SIZE])
+#define ECS_IOCTL_GET_CONF				_IOR(COMPASS_IOCTL_MAGIC, 0x28, unsigned char[AKM_SENSOR_CONF_SIZE])
+
+#define AK8963_DEVICE_ID				0x48
 static struct i2c_client *this_client;
 static struct miscdevice compass_dev_device;
 
-static short g_akm_rbuf[12];
-
+static int g_akm_rbuf_ready;
+static int g_akm_rbuf[12];
 
 /****************operate according to sensor chip:start************/
 
 static int sensor_active(struct i2c_client *client, int enable, int rate)
 {
 	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(client);
 	int result = 0;
 
-	//sensor->ops->ctrl_data = sensor_read_reg(client, sensor->ops->ctrl_reg);
-
-	//register setting according to chip datasheet
-	if(enable)
-	{
+	if (enable)
 		sensor->ops->ctrl_data = AK8963_MODE_SNG_MEASURE;
-	}
 	else
-	{
 		sensor->ops->ctrl_data = AK8963_MODE_POWERDOWN;
-	}
 
-	DBG("%s:reg=0x%x,reg_ctrl=0x%x,enable=%d\n",__func__,sensor->ops->ctrl_reg, sensor->ops->ctrl_data, enable);
 	result = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
-	if(result)
-		printk("%s:fail to active sensor\n",__func__);
+	if (result)
+		pr_err("%s:fail to active sensor\n", __func__);
 
 	return result;
-
 }
 
 static int sensor_init(struct i2c_client *client)
 {
 	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(client);
 	int result = 0;
 	char info = 0;
 
 	this_client = client;
 
-	result = sensor->ops->active(client,0,0);
-	if(result)
-	{
-		printk("%s:line=%d,error\n",__func__,__LINE__);
+	result = sensor->ops->active(client, 0, 0);
+	if (result) {
+		pr_err("%s:line=%d,error\n", __func__, __LINE__);
 		return result;
 	}
 
 	sensor->status_cur = SENSOR_OFF;
 
 	info = sensor_read_reg(client, AK8963_REG_INFO);
-	if((info & (0x0f<<3)) != AK8963_INFO_DATA)
-	{
-		printk("%s:info=0x%x,it is not %s\n",__func__, info, sensor->ops->name);
+	if ((info & (0x0f << 3)) != AK8963_INFO_DATA) {
+		pr_err("%s:info=0x%x,it is not %s\n", __func__, info, sensor->ops->name);
 		return -1;
 	}
 
 	result = misc_register(&compass_dev_device);
 	if (result < 0) {
-		printk("%s:fail to register misc device %s\n", __func__, compass_dev_device.name);
+		pr_err("%s:fail to register misc device %s\n", __func__, compass_dev_device.name);
 		result = -1;
 	}
 
-	DBG("%s:status_cur=%d\n",__func__, sensor->status_cur);
 	return result;
 }
 
-static int sensor_report_value(struct i2c_client *client)
+static void compass_report_value(void)
 {
 	struct sensor_private_data *sensor =
-	    	(struct sensor_private_data *) i2c_get_clientdata(client);
+	    (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	static int flag;
+
+	if (!g_akm_rbuf_ready) {
+		pr_info("g_akm_rbuf not ready..............\n");
+		return;
+	}
+
+	/* Report magnetic vector information */
+	if (atomic_read(&sensor->flags.mv_flag) && (g_akm_rbuf[0] & MAG_DATA_READY)) {
+		/*
+		 *input dev will ignore report data if data value is the same with last_value,
+		 *sample rate will not enough by this way, so just avoid this case
+		 */
+		if ((sensor->axis.x == g_akm_rbuf[5]) &&
+			(sensor->axis.y == g_akm_rbuf[6]) && (sensor->axis.z == g_akm_rbuf[7])) {
+			if (flag) {
+				flag = 0;
+				sensor->axis.x += 1;
+				sensor->axis.y += 1;
+				sensor->axis.z += 1;
+			} else {
+				flag = 1;
+				sensor->axis.x -= 1;
+				sensor->axis.y -= 1;
+				sensor->axis.z -= 1;
+			}
+		} else {
+			sensor->axis.x = g_akm_rbuf[5];
+			sensor->axis.y = g_akm_rbuf[6];
+			sensor->axis.z = g_akm_rbuf[7];
+		}
+		input_report_abs(sensor->input_dev, ABS_HAT0X, sensor->axis.x);
+		input_report_abs(sensor->input_dev, ABS_HAT0Y, sensor->axis.y);
+		input_report_abs(sensor->input_dev, ABS_BRAKE, sensor->axis.z);
+		input_report_abs(sensor->input_dev, ABS_HAT1X, g_akm_rbuf[8]);
+	}
+	input_sync(sensor->input_dev);
+}
+
+static int sensor_report_value(struct i2c_client *client)
+{
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(client);
 	char buffer[8] = {0};
 	unsigned char *stat;
 	unsigned char *stat2;
 	int ret = 0;
 	char value = 0;
-	int i;
 
-	if(sensor->ops->read_len < 8)	//sensor->ops->read_len = 8
-	{
-		printk("%s:lenth is error,len=%d\n",__func__,sensor->ops->read_len);
+	mutex_lock(&sensor->data_mutex);
+	compass_report_value();
+	mutex_unlock(&sensor->data_mutex);
+
+	if (sensor->ops->read_len < 8) {
+		pr_err("%s:length is error,len=%d\n", __func__, sensor->ops->read_len);
 		return -1;
 	}
 
@@ -215,7 +226,7 @@ static int sensor_report_value(struct i2c_client *client)
 		*buffer = sensor->ops->read_reg;
 		ret = sensor_rx_data(client, buffer, sensor->ops->read_len);
 		if (ret < 0)
-		return ret;
+			return ret;
 	} while (0);
 
 	stat = &buffer[0];
@@ -226,7 +237,7 @@ static int sensor_report_value(struct i2c_client *client)
 	 * Measurement has been completed and data is ready to be read.
 	 */
 	if ((*stat & 0x01) != 0x01) {
-		DBG(KERN_ERR "%s:ST is not set\n",__func__);
+		pr_err("%s:ST is not set\n", __func__);
 		return -1;
 	}
 
@@ -240,9 +251,8 @@ static int sensor_report_value(struct i2c_client *client)
 	 * corrupted.
 	 * DERR bit is self-clearing when ST2 register is read.
 	 */
-	if (*stat2 & 0x04)
-	{
-		DBG(KERN_ERR "%s:compass data error\n",__func__);
+	if (*stat2 & 0x04) {
+		pr_err("%s:compass data error\n", __func__);
 		return -2;
 	}
 
@@ -255,34 +265,21 @@ static int sensor_report_value(struct i2c_client *client)
 	 * An error is returned.
 	 * HOFL bit clears when a new measurement starts.
 	 */
-	if (*stat2 & 0x08)
-	{
-		DBG(KERN_ERR "%s:compass data overflow\n",__func__);
+	if (*stat2 & 0x08) {
+		pr_err("%s:compass data overflow\n", __func__);
 		return -3;
 	}
 
-	/* »¥³âµØ»º´æÊý¾Ý. */
 	mutex_lock(&sensor->data_mutex);
 	memcpy(sensor->sensor_data, buffer, sensor->ops->read_len);
 	mutex_unlock(&sensor->data_mutex);
-	DBG("%s:",__func__);
-	for(i=0; i<sensor->ops->read_len; i++)
-		DBG("0x%x,",buffer[i]);
-	DBG("\n");
-
-	if((sensor->pdata->irq_enable)&& (sensor->ops->int_status_reg >= 0))	//read sensor intterupt status register
-	{
 
+	if ((sensor->pdata->irq_enable) && (sensor->ops->int_status_reg >= 0))
 		value = sensor_read_reg(client, sensor->ops->int_status_reg);
-		DBG("%s:sensor int status :0x%x\n",__func__,value);
-	}
-
 
-	//trigger next measurement
 	ret = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
-	if(ret)
-	{
-		printk(KERN_ERR "%s:fail to set ctrl_data:0x%x\n",__func__,sensor->ops->ctrl_data);
+	if (ret) {
+		pr_err("%s:fail to set ctrl_data:0x%x\n", __func__, sensor->ops->ctrl_data);
 		return ret;
 	}
 
@@ -291,198 +288,129 @@ static int sensor_report_value(struct i2c_client *client)
 
 static void compass_set_YPR(int *rbuf)
 {
-	struct sensor_private_data *sensor =
-	    (struct sensor_private_data *) i2c_get_clientdata(this_client);
-
 	/* No events are reported */
 	if (!rbuf[0]) {
-		printk("%s:Don't waste a time.",__func__);
+		pr_err("%s:Don't waste a time.", __func__);
 		return;
 	}
 
-	DBG("%s:buf[0]=0x%x\n",__func__, rbuf[0]);
-
-	/* Report magnetic sensor information */
-	if (atomic_read(&sensor->flags.m_flag) && (rbuf[0] & ORI_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_RX, rbuf[9]);
-		input_report_abs(sensor->input_dev, ABS_RY, rbuf[10]);
-		input_report_abs(sensor->input_dev, ABS_RZ, rbuf[11]);
-		input_report_abs(sensor->input_dev, ABS_RUDDER, rbuf[4]);
-		DBG("%s:m_flag:x=%d,y=%d,z=%d,RUDDER=%d\n", __func__, rbuf[9], rbuf[10], rbuf[11], rbuf[4]);
-	}
-
-	/* Report acceleration sensor information */
-	if (atomic_read(&sensor->flags.a_flag) && (rbuf[0] & ACC_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_X, rbuf[1]);
-		input_report_abs(sensor->input_dev, ABS_Y, rbuf[2]);
-		input_report_abs(sensor->input_dev, ABS_Z, rbuf[3]);
-		input_report_abs(sensor->input_dev, ABS_WHEEL, rbuf[4]);
-
-		DBG("%s:a_flag:x=%d,y=%d,z=%d,WHEEL=%d\n",__func__,rbuf[1], rbuf[2], rbuf[3], rbuf[4]);
-	}
-
-	/* Report magnetic vector information */
-	if (atomic_read(&sensor->flags.mv_flag) && (rbuf[0] & MAG_DATA_READY)) {
-		input_report_abs(sensor->input_dev, ABS_HAT0X, rbuf[5]);
-		input_report_abs(sensor->input_dev, ABS_HAT0Y, rbuf[6]);
-		input_report_abs(sensor->input_dev, ABS_BRAKE, rbuf[7]);
-		input_report_abs(sensor->input_dev, ABS_HAT1X, rbuf[8]);
-
-		DBG("%s:mv_flag:x=%d,y=%d,z=%d,status=%d\n", __func__, rbuf[5], rbuf[6], rbuf[7], rbuf[8]);
-	}
-
-	input_sync(sensor->input_dev);
-
-	memcpy(g_akm_rbuf, rbuf, 12);	//used for ECS_IOCTL_GET_ACCEL
+	g_akm_rbuf_ready = 1;
+	memcpy(g_akm_rbuf, rbuf, 12 * sizeof(int));
 }
 
-
-
 static int compass_dev_open(struct inode *inode, struct file *file)
 {
-	int result = 0;
-	DBG("%s\n",__func__);
-
-	return result;
+	return 0;
 }
 
-
 static int compass_dev_release(struct inode *inode, struct file *file)
 {
-	int result = 0;
-	DBG("%s\n",__func__);
-
-	return result;
+	return 0;
 }
 
 static int compass_akm_set_mode(struct i2c_client *client, char mode)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	int result = 0;
 
-	switch(mode & 0x0f)
-	{
-		case AK8963_MODE_SNG_MEASURE:
-		case AK8963_MODE_SELF_TEST:
-		case AK8963_MODE_FUSE_ACCESS:
-			if(sensor->status_cur == SENSOR_OFF)
-			{
-				sensor->stop_work = 0;
-				sensor->status_cur = SENSOR_ON;
-
-				if(sensor->pdata->irq_enable)
-				{
-					//DBG("%s:enable irq=%d\n",__func__,client->irq);
-					//enable_irq(client->irq);
-				}
-				else
-				{
-					schedule_delayed_work(&sensor->delaywork, msecs_to_jiffies(sensor->pdata->poll_delay_ms));
-				}
-
-			}
-
-			break;
-
-		case AK8963_MODE_POWERDOWN:
-			if(sensor->status_cur == SENSOR_ON)
-			{
-				sensor->stop_work = 1;
-				if(sensor->pdata->irq_enable)
-				{
-					//DBG("%s:disable irq=%d\n",__func__,client->irq);
-					//disable_irq_nosync(client->irq);//disable irq
-				}
-				else
-				cancel_delayed_work_sync(&sensor->delaywork);
-
-				sensor->status_cur = SENSOR_OFF;
-			}
-			break;
+	switch (mode & 0x0f) {
+	case AK8963_MODE_SNG_MEASURE:
+	case AK8963_MODE_SELF_TEST:
+	case AK8963_MODE_FUSE_ACCESS:
+		if (sensor->status_cur == SENSOR_OFF) {
+			sensor->stop_work = 0;
+			sensor->status_cur = SENSOR_ON;
+			pr_info("compass ak09911 start measure");
+			schedule_delayed_work(&sensor->delaywork, msecs_to_jiffies(sensor->pdata->poll_delay_ms));
+		}
+		break;
 
+	case AK8963_MODE_POWERDOWN:
+		if (sensor->status_cur == SENSOR_ON) {
+			sensor->stop_work = 1;
+			cancel_delayed_work_sync(&sensor->delaywork);
+			pr_info("compass ak09911 stop measure");
+			g_akm_rbuf_ready = 0;
+			sensor->status_cur = SENSOR_OFF;
+		}
+		break;
 	}
 
-	switch(mode & 0x0f)
-	{
-		case AK8963_MODE_SNG_MEASURE:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK8963_MODE_SELF_TEST:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK8963_MODE_FUSE_ACCESS:
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			break;
-		case AK8963_MODE_POWERDOWN:
-			/* Set powerdown mode */
-			result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK8963_MODE_POWERDOWN);
-			if(result)
-			printk("%s:i2c error,mode=%d\n",__func__,mode);
-			udelay(100);
-			break;
-		default:
-			printk("%s: Unknown mode(%d)", __func__, mode);
-			result = -EINVAL;
-			break;
+	switch (mode & 0x0f) {
+	case AK8963_MODE_SNG_MEASURE:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK8963_MODE_SELF_TEST:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK8963_MODE_FUSE_ACCESS:
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, mode);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		break;
+	case AK8963_MODE_POWERDOWN:
+		/* Set powerdown mode */
+		result = sensor_write_reg(client, sensor->ops->ctrl_reg, AK8963_MODE_POWERDOWN);
+		if (result)
+			pr_err("%s:i2c error,mode=%d\n", __func__, mode);
+		udelay(100);
+		break;
+	default:
+		pr_err("%s: Unknown mode(%d)", __func__, mode);
+		result = -EINVAL;
+		break;
 	}
-	DBG("%s:mode=0x%x\n",__func__,mode);
-	return result;
 
+	return result;
 }
 
 static int compass_akm_reset(struct i2c_client *client)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	int result = 0;
 
-	if(sensor->pdata->reset_pin > 0)
-	{
+	if (sensor->pdata->reset_pin > 0) {
 		gpio_direction_output(sensor->pdata->reset_pin, GPIO_LOW);
 		udelay(10);
 		gpio_direction_output(sensor->pdata->reset_pin, GPIO_HIGH);
-	}
-	else
-	{
+	} else {
 		/* Set measure mode */
 		result = sensor_write_reg(client, AK8963_REG_CNTL2, AK8963_MODE_SNG_MEASURE);
-		if(result)
-		printk("%s:fail to Set measure mode\n",__func__);
+		if (result)
+			pr_err("%s:fail to Set measure mode\n", __func__);
 	}
 
 	udelay(100);
 
 	return result;
-
 }
 
-
-
 static int compass_akm_get_openstatus(void)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+
 	wait_event_interruptible(sensor->flags.open_wq, (atomic_read(&sensor->flags.open_flag) != 0));
+
 	return atomic_read(&sensor->flags.open_flag);
 }
 
 static int compass_akm_get_closestatus(void)
 {
-	struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+
 	wait_event_interruptible(sensor->flags.open_wq, (atomic_read(&sensor->flags.open_flag) <= 0));
+
 	return atomic_read(&sensor->flags.open_flag);
 }
 
-
 /* ioctl - I/O control */
-static long compass_dev_ioctl(struct file *file,
-			  unsigned int cmd, unsigned long arg)
+static long compass_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
-    struct sensor_private_data* sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
+	struct sensor_private_data *sensor = (struct sensor_private_data *)i2c_get_clientdata(this_client);
 	struct i2c_client *client = this_client;
 	void __user *argp = (void __user *)arg;
 	int result = 0;
@@ -492,16 +420,14 @@ static long compass_dev_ioctl(struct file *file,
 
 	/* NOTE: In this function the size of "char" should be 1-byte. */
 	char compass_data[SENSOR_DATA_SIZE];	/* for GETDATA */
-	char rwbuf[RWBUF_SIZE]; 		/* for READ/WRITE */
-	char mode;				/* for SET_MODE*/
-	int value[12];			/* for SET_YPR */
-	int status;				/* for OPEN/CLOSE_STATUS */
-	int ret = -1;				/* Return value. */
+	char rwbuf[RWBUF_SIZE];		/* for READ/WRITE */
+	char mode;		/* for SET_MODE*/
+	int value[12];		/* for SET_YPR */
+	int status;		/* for OPEN/CLOSE_STATUS */
+	int ret = -1;		/* Return value. */
 
-	//int8_t sensor_buf[SENSOR_DATA_SIZE];	/* for GETDATA */
-	//int32_t ypr_buf[YPR_DATA_SIZE]; 	/* for SET_YPR */
-	int16_t acc_buf[3];			/* for GET_ACCEL */
-	int64_t delay[AKM_NUM_SENSORS]; 	/* for GET_DELAY */
+	int16_t acc_buf[3];		/* for GET_ACCEL */
+	int64_t delay[AKM_NUM_SENSORS];	/* for GET_DELAY */
 
 	char layout;		/* for GET_LAYOUT */
 	char outbit;		/* for GET_OUTBIT */
@@ -509,28 +435,22 @@ static long compass_dev_ioctl(struct file *file,
 	switch (cmd) {
 	case ECS_IOCTL_WRITE:
 	case ECS_IOCTL_READ:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&rwbuf, argp, sizeof(rwbuf))) {
+		if (copy_from_user(&rwbuf, argp, sizeof(rwbuf)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_SET_MODE:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&mode, argp, sizeof(mode))) {
+		if (copy_from_user(&mode, argp, sizeof(mode)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_SET_YPR:
-		if (argp == NULL) {
+		if (!argp)
 			return -EINVAL;
-		}
-		if (copy_from_user(&value, argp, sizeof(value))) {
+		if (copy_from_user(&value, argp, sizeof(value)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_INFO:
 	case ECS_IOCTL_GET_CONF:
@@ -542,8 +462,8 @@ static long compass_dev_ioctl(struct file *file,
 	case ECS_IOCTL_GET_OUTBIT:
 	case ECS_IOCTL_GET_ACCEL:
 		/* Just check buffer pointer */
-		if (argp == NULL) {
-			printk("%s:invalid argument\n",__func__);
+		if (!argp) {
+			pr_err("%s:invalid argument\n", __func__);
 			return -EINVAL;
 		}
 		break;
@@ -558,7 +478,7 @@ static long compass_dev_ioctl(struct file *file,
 		ret = sensor_rx_data(client, &sense_info[0], AKM_SENSOR_INFO_SIZE);
 		mutex_unlock(&sensor->operation_mutex);
 		if (ret < 0) {
-			printk("%s:fait to get sense_info\n", __func__);
+			pr_err("%s:fait to get sense_info\n", __func__);
 			return ret;
 		}
 		/* Check read data */
@@ -574,49 +494,45 @@ static long compass_dev_ioctl(struct file *file,
 		ret = sensor_rx_data(client, &sense_conf[0], AKM_SENSOR_CONF_SIZE);
 		mutex_unlock(&sensor->operation_mutex);
 		if (ret < 0) {
-			printk("%s:fait to get sense_conf\n", __func__);
+			pr_err("%s:fait to get sense_conf\n", __func__);
 			return ret;
 		}
 		break;
 	case ECS_IOCTL_WRITE:
-		DBG("%s:ECS_IOCTL_WRITE start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if ((rwbuf[0] < 2) || (rwbuf[0] > (RWBUF_SIZE-1))) {
+		if ((rwbuf[0] < 2) || (rwbuf[0] > (RWBUF_SIZE - 1))) {
 			mutex_unlock(&sensor->operation_mutex);
 			return -EINVAL;
 		}
 		ret = sensor_tx_data(client, &rwbuf[1], rwbuf[0]);
 		if (ret < 0) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:fait to tx data\n",__func__);
+			pr_err("%s:fait to tx data\n", __func__);
 			return ret;
 		}
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_READ:
-		DBG("%s:ECS_IOCTL_READ start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if ((rwbuf[0] < 1) || (rwbuf[0] > (RWBUF_SIZE-1))) {
+		if ((rwbuf[0] < 1) || (rwbuf[0] > (RWBUF_SIZE - 1))) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:data is error\n",__func__);
+			pr_err("%s:data is error\n", __func__);
 			return -EINVAL;
 		}
 		ret = sensor_rx_data(client, &rwbuf[1], rwbuf[0]);
 		if (ret < 0) {
 			mutex_unlock(&sensor->operation_mutex);
-			printk("%s:fait to rx data\n",__func__);
+			pr_err("%s:fait to rx data\n", __func__);
 			return ret;
 		}
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_SET_MODE:
-		DBG("%s:ECS_IOCTL_SET_MODE start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
-		if(sensor->ops->ctrl_data != mode)
-		{
+		if (sensor->ops->ctrl_data != mode) {
 			ret = compass_akm_set_mode(client, mode);
 			if (ret < 0) {
-				printk("%s:fait to set mode\n",__func__);
+				pr_err("%s:fait to set mode\n", __func__);
 				mutex_unlock(&sensor->operation_mutex);
 				return ret;
 			}
@@ -626,27 +542,22 @@ static long compass_dev_ioctl(struct file *file,
 		mutex_unlock(&sensor->operation_mutex);
 		break;
 	case ECS_IOCTL_GETDATA:
-			DBG("%s:ECS_IOCTL_GETDATA start\n",__func__);
 			mutex_lock(&sensor->data_mutex);
-			memcpy(compass_data, sensor->sensor_data, SENSOR_DATA_SIZE);	//get data from buffer
+			memcpy(compass_data, sensor->sensor_data, SENSOR_DATA_SIZE);
 			mutex_unlock(&sensor->data_mutex);
 			break;
 	case ECS_IOCTL_SET_YPR:
-			DBG("%s:ECS_IOCTL_SET_YPR start\n",__func__);
 			mutex_lock(&sensor->data_mutex);
 			compass_set_YPR(value);
 			mutex_unlock(&sensor->data_mutex);
 		break;
 	case ECS_IOCTL_GET_OPEN_STATUS:
 		status = compass_akm_get_openstatus();
-		DBG("%s:openstatus=%d\n",__func__,status);
 		break;
 	case ECS_IOCTL_GET_CLOSE_STATUS:
 		status = compass_akm_get_closestatus();
-		DBG("%s:closestatus=%d\n",__func__,status);
 		break;
 	case ECS_IOCTL_GET_DELAY:
-		DBG("%s:ECS_IOCTL_GET_DELAY start\n",__func__);
 		mutex_lock(&sensor->operation_mutex);
 		delay[0] = sensor->flags.delay;
 		delay[1] = sensor->flags.delay;
@@ -655,37 +566,24 @@ static long compass_dev_ioctl(struct file *file,
 		break;
 
 	case ECS_IOCTL_GET_PLATFORM_DATA:
-		DBG("%s:ECS_IOCTL_GET_PLATFORM_DATA start\n",__func__);
-		//memcpy(compass.m_layout, sensor->pdata->m_layout, sizeof(sensor->pdata->m_layout));
-		//memcpy(compass.project_name, sensor->pdata->project_name, sizeof(sensor->pdata->project_name));
 		ret = copy_to_user(argp, &compass, sizeof(compass));
-		if(ret < 0)
-		{
-			printk("%s:error,ret=%d\n",__FUNCTION__, ret);
+		if (ret < 0) {
+			pr_err("%s:error,ret=%d\n", __func__, ret);
 			return ret;
 		}
 		break;
 	case ECS_IOCTL_GET_LAYOUT:
-		DBG("%s:ECS_IOCTL_GET_LAYOUT start\n",__func__);
 		layout = sensor->pdata->layout;
 		break;
 	case ECS_IOCTL_GET_OUTBIT:
-		DBG("%s:ECS_IOCTL_GET_OUTBIT start\n",__func__);
-		outbit = 1; //sensor->pdata->outbit;
+		outbit = 1;
 		break;
 	case ECS_IOCTL_RESET:
-		DBG("%s:ECS_IOCTL_RESET start\n",__func__);
 		ret = compass_akm_reset(client);
 		if (ret < 0)
 			return ret;
 		break;
 	case ECS_IOCTL_GET_ACCEL:
-		DBG("%s:ECS_IOCTL_GET_ACCEL start,no accel data\n",__func__);
-		mutex_lock(&sensor->operation_mutex);
-		acc_buf[0] = g_akm_rbuf[6];
-		acc_buf[1] = g_akm_rbuf[7];
-		acc_buf[2] = g_akm_rbuf[8];
-		mutex_unlock(&sensor->operation_mutex);
 		break;
 
 	default:
@@ -694,53 +592,49 @@ static long compass_dev_ioctl(struct file *file,
 
 	switch (cmd) {
 	case ECS_IOCTL_READ:
-		if (copy_to_user(argp, &rwbuf, rwbuf[0]+1)) {
+		if (copy_to_user(argp, &rwbuf, rwbuf[0] + 1))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GETDATA:
-		if (copy_to_user(argp, &compass_data, sizeof(compass_data))) {
+		if (copy_to_user(argp, &compass_data, sizeof(compass_data)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_OPEN_STATUS:
 	case ECS_IOCTL_GET_CLOSE_STATUS:
-		if (copy_to_user(argp, &status, sizeof(status))) {
+		if (copy_to_user(argp, &status, sizeof(status)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_DELAY:
-		if (copy_to_user(argp, &delay, sizeof(delay))) {
+		if (copy_to_user(argp, &delay, sizeof(delay)))
 			return -EFAULT;
-		}
 		break;
 	case ECS_IOCTL_GET_LAYOUT:
 		if (copy_to_user(argp, &layout, sizeof(layout))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_OUTBIT:
 		if (copy_to_user(argp, &outbit, sizeof(outbit))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_ACCEL:
 		if (copy_to_user(argp, &acc_buf, sizeof(acc_buf))) {
-			printk("%s:error:%d\n",__FUNCTION__,__LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_INFO:
 		if (copy_to_user(argp, &sense_info,	sizeof(sense_info))) {
-			printk("%s:error:%d\n", __FUNCTION__, __LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
 	case ECS_IOCTL_GET_CONF:
 		if (copy_to_user(argp, &sense_conf,	sizeof(sense_conf))) {
-			printk("%s:error:%d\n", __FUNCTION__, __LINE__);
+			pr_err("%s:error:%d\n", __func__, __LINE__);
 			return -EFAULT;
 		}
 		break;
@@ -751,17 +645,14 @@ static long compass_dev_ioctl(struct file *file,
 	return result;
 }
 
-static struct file_operations compass_dev_fops =
-{
+static const struct file_operations compass_dev_fops = {
 	.owner = THIS_MODULE,
 	.open = compass_dev_open,
 	.release = compass_dev_release,
 	.unlocked_ioctl = compass_dev_ioctl,
 };
 
-
-static struct miscdevice compass_dev_device =
-{
+static struct miscdevice compass_dev_device = {
 	.minor = MISC_DYNAMIC_MINOR,
 	.name = "akm8963_dev",
 	.fops = &compass_dev_fops,
@@ -769,37 +660,36 @@ static struct miscdevice compass_dev_device =
 
 struct sensor_operate compass_akm8963_ops = {
 	.name				= "akm8963",
-	.type				= SENSOR_TYPE_COMPASS,	//it is important
+	.type				= SENSOR_TYPE_COMPASS,
 	.id_i2c				= COMPASS_ID_AK8963,
-	.read_reg			= AK8963_REG_ST1,	//read data
-	.read_len			= SENSOR_DATA_SIZE,	//data length
-	.id_reg				= AK8963_REG_WIA,	//read id
-	.id_data 			= AK8963_DEVICE_ID,
-	.precision			= 8,			//12 bits
-	.ctrl_reg 			= AK8963_REG_CNTL1,	//enable or disable
-	.int_status_reg			= SENSOR_UNKNOW_DATA,	//not exist
-	.range				= {-0xffff,0xffff},
-	.trig				= IRQF_TRIGGER_RISING,	//if LEVEL interrupt then IRQF_ONESHOT
+	.read_reg				= AK8963_REG_ST1,
+	.read_len				= SENSOR_DATA_SIZE,
+	.id_reg				= AK8963_REG_WIA,
+	.id_data				= AK8963_DEVICE_ID,
+	.precision				= 8,
+	.ctrl_reg				= AK8963_REG_CNTL1,
+	.int_status_reg		= SENSOR_UNKNOW_DATA,
+	.range				= {-0xffff, 0xffff},
+	.trig					= IRQF_TRIGGER_RISING,
 	.active				= sensor_active,
-	.init				= sensor_init,
+	.init					= sensor_init,
 	.report				= sensor_report_value,
-	.misc_dev 			= NULL,			//private misc support
+	.misc_dev			= NULL,
 };
 
 /****************operate according to sensor chip:end************/
 
-//function name should not be changed
 static struct sensor_operate *compass_get_ops(void)
 {
 	return &compass_akm8963_ops;
 }
 
-
 static int __init compass_akm8963_init(void)
 {
 	struct sensor_operate *ops = compass_get_ops();
 	int result = 0;
 	int type = ops->type;
+
 	result = sensor_register_slave(type, NULL, NULL, compass_get_ops);
 
 	return result;
@@ -809,11 +699,9 @@ static void __exit compass_akm8963_exit(void)
 {
 	struct sensor_operate *ops = compass_get_ops();
 	int type = ops->type;
+
 	sensor_unregister_slave(type, NULL, NULL, compass_get_ops);
 }
 
-
 module_init(compass_akm8963_init);
 module_exit(compass_akm8963_exit);
-
-

From 15b49712b252857c9416331898a8436638b02c79 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 9 Aug 2018 11:29:48 +0800
Subject: [PATCH 1097/1852] phy/rockchip: mipi_dphy: registers clean up and fix
 some typos

Change-Id: Ibdb8c3a4c83df7be8c4f83cb556a0769efc01139
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../rockchip/phy-rockchip-inno-mipi-dphy.c    | 634 +++++++++---------
 1 file changed, 333 insertions(+), 301 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-mipi-dphy.c b/drivers/phy/rockchip/phy-rockchip-inno-mipi-dphy.c
index 91b7890550187..58629ee4fd374 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-mipi-dphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-mipi-dphy.c
@@ -37,91 +37,145 @@
 #define VIDEO_PHY_TTL_MODE_ENBALE	HIWORD_UPDATE(1, 15, 15)
 #define VIDEO_PHY_TTL_MODE_DISABLE	HIWORD_UPDATE(0, 15, 15)
 
-/* Innosilicon MIPI D-PHY registers */
-#define INNO_PHY_LANE_CTRL	0x00000
-#define MIPI_BGPD		BIT(7)
-#define PWROK_BP		BIT(1)
-#define PWROK			BIT(0)
-#define INNO_PHY_POWER_CTRL	0x00004
-#define ANALOG_RESET_MASK	BIT(2)
-#define ANALOG_RESET		BIT(2)
-#define ANALOG_NORMAL		0
-#define LDO_POWER_MASK		BIT(1)
-#define LDO_POWER_DOWN		BIT(1)
-#define LDO_POWER_ON		0
-#define PLL_POWER_MASK		BIT(0)
-#define PLL_POWER_DOWN		BIT(0)
-#define PLL_POWER_ON		0
-#define INNO_PHY_PLL_CTRL_0	0x0000c
-#define FBDIV_HI_MASK		BIT(5)
-#define FBDIV_HI(x)		UPDATE(x, 5, 5)
-#define PREDIV_MASK		GENMASK(4, 0)
-#define PREDIV(x)		UPDATE(x, 4, 0)
-#define INNO_PHY_PLL_CTRL_1	0x00010
-#define FBDIV_LO_MASK		GENMASK(7, 0)
-#define FBDIV_LO(x)		UPDATE(x, 7, 0)
-#define INNO_PHY_DIG_CTRL	0x00080
-#define DIGITAL_RESET_MASK	BIT(0)
-#define DIGITAL_NORMAL		BIT(0)
-#define DIGITAL_RESET		0
-#define INNO_PHY_MODE		0x0038c
-#define TTL_MODE_ENABLE		BIT(2)
-#define LVDS_MODE_ENABLE	BIT(1)
-#define MIPI_MODE_ENABLE	BIT(0)
-#define INNO_PHY_LVDS_CTRL	0x003ac
-#define LVDS_BGPD		BIT(0)
-
-#define INNO_CLOCK_LANE_REG_BASE	0x00100
-#define INNO_DATA_LANE_0_REG_BASE	0x00180
-#define INNO_DATA_LANE_1_REG_BASE	0x00200
-#define INNO_DATA_LANE_2_REG_BASE	0x00280
-#define INNO_DATA_LANE_3_REG_BASE	0x00300
-
-#define T_LPX_OFFSET		0x00014
-#define T_HS_PREPARE_OFFSET	0x00018
-#define T_HS_ZERO_OFFSET	0x0001c
-#define T_HS_TRAIL_OFFSET	0x00020
-#define T_HS_EXIT_OFFSET	0x00024
-#define T_CLK_POST_OFFSET	0x00028
-#define T_WAKUP_H_OFFSET	0x00030
-#define T_WAKUP_L_OFFSET	0x00034
-#define T_CLK_PRE_OFFSET	0x00038
-#define T_TA_GO_OFFSET		0x00040
-#define T_TA_SURE_OFFSET	0x00044
-#define T_TA_WAIT_OFFSET	0x00048
-
-#define T_LPX_MASK		GENMASK(5, 0)
-#define T_LPX(x)		UPDATE(x, 5, 0)
-#define T_HS_PREPARE_MASK	GENMASK(6, 0)
-#define T_HS_PREPARE(x)		UPDATE(x, 6, 0)
-#define T_HS_ZERO_MASK		GENMASK(5, 0)
-#define T_HS_ZERO(x)		UPDATE(x, 5, 0)
-#define T_HS_TRAIL_MASK		GENMASK(6, 0)
-#define T_HS_TRAIL(x)		UPDATE(x, 6, 0)
-#define T_HS_EXIT_MASK		GENMASK(4, 0)
-#define T_HS_EXIT(x)		UPDATE(x, 4, 0)
-#define T_CLK_POST_MASK		GENMASK(3, 0)
-#define T_CLK_POST(x)		UPDATE(x, 3, 0)
-#define T_WAKUP_H_MASK		GENMASK(1, 0)
-#define T_WAKUP_H(x)		UPDATE(x, 1, 0)
-#define T_WAKUP_L_MASK		GENMASK(7, 0)
-#define T_WAKUP_L(x)		UPDATE(x, 7, 0)
-#define T_CLK_PRE_MASK		GENMASK(3, 0)
-#define T_CLK_PRE(x)		UPDATE(x, 3, 0)
-#define T_TA_GO_MASK		GENMASK(5, 0)
-#define T_TA_GO(x)		UPDATE(x, 5, 0)
-#define T_TA_SURE_MASK		GENMASK(5, 0)
-#define T_TA_SURE(x)		UPDATE(x, 5, 0)
-#define T_TA_WAIT_MASK		GENMASK(5, 0)
-#define T_TA_WAIT(x)		UPDATE(x, 5, 0)
-
-enum lane_type {
-	CLOCK_LANE,
-	DATA_LANE_0,
-	DATA_LANE_1,
-	DATA_LANE_2,
-	DATA_LANE_3,
-};
+/*
+ * The offset address[7:0] is distributed two parts, one from the bit7 to bit5
+ * is the first address, the other from the bit4 to bit0 is the second address.
+ * when you configure the registers, you must set both of them. The Clock Lane
+ * and Data Lane use the same registers with the same second address, but the
+ * first address is different.
+ */
+#define FIRST_ADDRESS(x)		(((x) & 0x7) << 5)
+#define SECOND_ADDRESS(x)		(((x) & 0x1f) << 0)
+#define INNO_PHY_REG(first, second)	(FIRST_ADDRESS(first) | \
+					 SECOND_ADDRESS(second))
+
+/* Analog Register Part: reg00 */
+#define BANDGAP_POWER_MASK		BIT(7)
+#define BANDGAP_POWER_DOWN		BIT(7)
+#define BANDGAP_POWER_ON		0
+#define LANE_EN_MASK			GENMASK(6, 2)
+#define LANE_EN_CK			BIT(6)
+#define LANE_EN_3			BIT(5)
+#define LANE_EN_2			BIT(4)
+#define LANE_EN_1			BIT(3)
+#define LANE_EN_0			BIT(2)
+#define POWER_WORK_MASK			GENMASK(1, 0)
+#define POWER_WORK_ENABLE		UPDATE(1, 1, 0)
+#define POWER_WORK_DISABLE		UPDATE(2, 1, 0)
+/* Analog Register Part: reg01 */
+#define REG_SYNCRST_MASK		BIT(2)
+#define REG_SYNCRST_RESET		BIT(2)
+#define REG_SYNCRST_NORMAL		0
+#define REG_LDOPD_MASK			BIT(1)
+#define REG_LDOPD_POWER_DOWN		BIT(1)
+#define REG_LDOPD_POWER_ON		0
+#define REG_PLLPD_MASK			BIT(0)
+#define REG_PLLPD_POWER_DOWN		BIT(0)
+#define REG_PLLPD_POWER_ON		0
+/* Analog Register Part: reg03 */
+#define REG_FBDIV_HI_MASK		BIT(5)
+#define REG_FBDIV_HI(x)			UPDATE(x, 5, 5)
+#define REG_PREDIV_MASK			GENMASK(4, 0)
+#define REG_PREDIV(x)			UPDATE(x, 4, 0)
+/* Analog Register Part: reg04 */
+#define REG_FBDIV_LO_MASK		GENMASK(7, 0)
+#define REG_FBDIV_LO(x)			UPDATE(x, 7, 0)
+/* Analog Register Part: reg05 */
+#define CLK_LANE_SKEW_PHASE_SET_MASK	GENMASK(2, 0)
+#define CLK_LANE_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
+/* Analog Register Part: reg06 */
+#define LDO_OUTPUT_SET_HI_MASK		BIT(7)
+#define LDO_OUTPUT_SET_HI(x)		UPDATE(x, 7, 7)
+#define LANE_3_SKEW_PHASE_SET_MASK	GENMASK(6, 4)
+#define LANE_3_SKEW_PHASE_SET(x)	UPDATE(x, 6, 4)
+#define LDO_OUTPUT_SET_LO_MASK		BIT(3)
+#define LDO_OUTPUT_SET_LO(x)		UPDATE(x, 3, 3)
+#define LANE_2_SKEW_PHASE_SET_MASK	GENMASK(2, 0)
+#define LANE_2_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
+/* Analog Register Part: reg07 */
+#define PRE_EMPHASIS_RANGE_SET_HI_MASK	BIT(7)
+#define PRE_EMPHASIS_RANGE_SET_HI(x)	UPDATE(x, 7, 7)
+#define LANE_1_SKEW_PHASE_SET_MASK	GENMASK(6, 4)
+#define LANE_1_SKEW_PHASE_SET(x)	UPDATE(x, 6, 4)
+#define PRE_EMPHASIS_RANGE_SET_LO_MASK	BIT(3)
+#define PRE_EMPHASIS_RANGE_SET_LO(x)	UPDATE(x, 3, 3)
+#define LANE_0_SKEW_PHASE_SET_MASK	GENMASK(2, 0)
+#define LANE_0_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
+/* Analog Register Part: reg08 */
+#define PRE_EMPHASIS_ENABLE_MASK	BIT(7)
+#define PRE_EMPHASIS_ENABLE		BIT(7)
+#define PRE_EMPHASIS_DISABLE		0
+#define PLL_POST_DIV_ENABLE_MASK	BIT(5)
+#define PLL_POST_DIV_ENABLE		BIT(5)
+#define PLL_POST_DIV_DISABLE		0
+#define DATA_LANE_VOD_RANGE_SET_MASK	GENMASK(3, 0)
+#define DATA_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
+/* Analog Register Part: reg0b */
+#define CLOCK_LANE_VOD_RANGE_SET_MASK	GENMASK(3, 0)
+#define CLOCK_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
+/* Analog Register Part: reg11 */
+#define DATA_SAMPLE_PHASE_SET_MASK	GENMASK(7, 6)
+#define DATA_SAMPLE_PHASE_SET(x)	UPDATE(x, 7, 6)
+/* Digital Register Part: reg00 */
+#define REG_DIG_RSTN_MASK		BIT(0)
+#define REG_DIG_RSTN_NORMAL		BIT(0)
+#define REG_DIG_RSTN_RESET		0
+/* Digital Register Part: reg01 */
+#define INV_PIN_TXCLKESC_0_ENABLE_MASK	BIT(1)
+#define INV_PIN_TXCLKESC_0_ENABLE	BIT(1)
+#define INV_PIN_TXCLKESC_0_DISABLE	0
+#define INV_PIN_TXBYTECLKHS_ENABLE_MASK	BIT(0)
+#define INV_PIN_TXBYTECLKHS_ENABLE	BIT(0)
+#define INV_PIN_TXBYTECLKHS_DISABLE	0
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg00 */
+#define DIFF_SIGNAL_SWAP_ENABLE_MASK	BIT(4)
+#define DIFF_SIGNAL_SWAP_ENABLE		BIT(4)
+#define DIFF_SIGNAL_SWAP_DISABLE	0
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */
+#define T_LPX_CNT_MASK			GENMASK(5, 0)
+#define T_LPX_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */
+#define T_HS_ZERO_CNT_HI_MASK		BIT(7)
+#define T_HS_ZERO_CNT_HI(x)		UPDATE(x, 7, 7)
+#define T_HS_PREPARE_CNT_MASK		GENMASK(6, 0)
+#define T_HS_PREPARE_CNT(x)		UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */
+#define T_HS_ZERO_CNT_LO_MASK		GENMASK(5, 0)
+#define T_HS_ZERO_CNT_LO(x)		UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */
+#define T_HS_TRAIL_CNT_MASK		GENMASK(6, 0)
+#define T_HS_TRAIL_CNT(x)		UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */
+#define T_HS_EXIT_CNT_LO_MASK		GENMASK(4, 0)
+#define T_HS_EXIT_CNT_LO(x)		UPDATE(x, 4, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */
+#define T_CLK_POST_CNT_LO_MASK		GENMASK(3, 0)
+#define T_CLK_POST_CNT_LO(x)		UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */
+#define LPDT_TX_PPI_SYNC_ENABLE_MASK	BIT(2)
+#define LPDT_TX_PPI_SYNC_ENABLE		BIT(2)
+#define LPDT_TX_PPI_SYNC_DISABLE	0
+#define T_WAKEUP_CNT_HI_MASK		GENMASK(1, 0)
+#define T_WAKEUP_CNT_HI(x)		UPDATE(x, 1, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */
+#define T_WAKEUP_CNT_LO_MASK		GENMASK(7, 0)
+#define T_WAKEUP_CNT_LO(x)		UPDATE(x, 7, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */
+#define T_CLK_PRE_CNT_MASK		GENMASK(3, 0)
+#define T_CLK_PRE_CNT(x)		UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */
+#define T_CLK_POST_HI_MASK		GENMASK(7, 6)
+#define T_CLK_POST_HI(x)		UPDATE(x, 7, 6)
+#define T_TA_GO_CNT_MASK		GENMASK(5, 0)
+#define T_TA_GO_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg11 */
+#define T_HS_EXIT_CNT_HI_MASK		BIT(6)
+#define T_HS_EXIT_CNT_HI(x)		UPDATE(x, 6, 6)
+#define T_TA_SURE_CNT_MASK		GENMASK(5, 0)
+#define T_TA_SURE_CNT(x)		UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg12 */
+#define T_TA_WAIT_CNT_MASK		GENMASK(5, 0)
+#define T_TA_WAIT_CNT(x)		UPDATE(x, 5, 0)
 
 enum inno_video_phy_functions {
 	INNO_PHY_PADCTL_FUNC_MIPI,
@@ -155,21 +209,6 @@ struct mipi_dphy_timing {
 	unsigned int wakeup;
 };
 
-struct inno_mipi_dphy_timing {
-	u8 lpx;
-	u8 hs_prepare;
-	u8 hs_zero;
-	u8 hs_trail;
-	u8 hs_exit;
-	u8 clk_post;
-	u8 wakup_h;
-	u8 wakup_l;
-	u8 clk_pre;
-	u8 ta_go;
-	u8 ta_sure;
-	u8 ta_wait;
-};
-
 struct inno_video_phy_socdata {
 	bool pinmux;
 	bool has_h2p_clk;
@@ -198,49 +237,36 @@ struct inno_mipi_dphy {
 	const struct inno_video_phy_socdata *socdata;
 };
 
-static const u32 lane_reg_offset[] = {
-	[CLOCK_LANE]  = INNO_CLOCK_LANE_REG_BASE,
-	[DATA_LANE_0] = INNO_DATA_LANE_0_REG_BASE,
-	[DATA_LANE_1] = INNO_DATA_LANE_1_REG_BASE,
-	[DATA_LANE_2] = INNO_DATA_LANE_2_REG_BASE,
-	[DATA_LANE_3] = INNO_DATA_LANE_3_REG_BASE,
+enum {
+	REGISTER_PART_ANALOG,
+	REGISTER_PART_DIGITAL,
+	REGISTER_PART_CLOCK_LANE,
+	REGISTER_PART_DATA0_LANE,
+	REGISTER_PART_DATA1_LANE,
+	REGISTER_PART_DATA2_LANE,
+	REGISTER_PART_DATA3_LANE,
 };
 
-#define FIXED_PARAM(_freq, _prepare, _clk_zero, _data_zero, _trail)	\
-{	\
-	.max_freq = _freq,	\
-	.hs_prepare = _prepare,	\
-	.clk_lane = {	\
-		.hs_zero = _clk_zero,	\
-	},	\
-	.data_lane = {	\
-		.hs_zero = _data_zero,	\
-	},	\
-	.hs_trail = _trail,	\
-}
-
-static const struct {
-	unsigned long max_freq;
+struct inno_mipi_dphy_timing {
+	unsigned int max_lane_mbps;
 	u8 hs_prepare;
-	struct {
-		u8 hs_zero;
-	} clk_lane;
-	struct {
-		u8 hs_zero;
-	} data_lane;
+	u8 clk_lane_hs_zero;
+	u8 data_lane_hs_zero;
 	u8 hs_trail;
-} fixed_param_table[] = {
-	FIXED_PARAM(110,  0x20, 0x16, 0x02, 0x22),
-	FIXED_PARAM(150,  0x06, 0x16, 0x03, 0x45),
-	FIXED_PARAM(200,  0x18, 0x17, 0x04, 0x0b),
-	FIXED_PARAM(250,  0x05, 0x17, 0x05, 0x16),
-	FIXED_PARAM(300,  0x51, 0x18, 0x06, 0x2c),
-	FIXED_PARAM(400,  0x64, 0x19, 0x07, 0x33),
-	FIXED_PARAM(500,  0x20, 0x1b, 0x07, 0x4e),
-	FIXED_PARAM(600,  0x6a, 0x1d, 0x08, 0x3a),
-	FIXED_PARAM(700,  0x3e, 0x1e, 0x08, 0x6a),
-	FIXED_PARAM(800,  0x21, 0x1f, 0x09, 0x29),
-	FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27),
+};
+
+static const struct inno_mipi_dphy_timing inno_mipi_dphy_timing_table[] = {
+	{ 110, 0x20, 0x16, 0x02, 0x22},
+	{ 150, 0x06, 0x16, 0x03, 0x45},
+	{ 200, 0x18, 0x17, 0x04, 0x0b},
+	{ 250, 0x05, 0x17, 0x05, 0x16},
+	{ 300, 0x51, 0x18, 0x06, 0x2c},
+	{ 400, 0x64, 0x19, 0x07, 0x33},
+	{ 500, 0x20, 0x1b, 0x07, 0x4e},
+	{ 600, 0x6a, 0x1d, 0x08, 0x3a},
+	{ 700, 0x3e, 0x1e, 0x08, 0x6a},
+	{ 800, 0x21, 0x1f, 0x09, 0x29},
+	{1000, 0x09, 0x20, 0x09, 0x27},
 };
 
 static const struct pinctrl_pin_desc inno_video_phy_pins[] = {
@@ -279,7 +305,7 @@ inno_video_phy_pad_config(struct inno_mipi_dphy *inno, unsigned int function)
 		pm_runtime_get_sync(inno->dev);
 		regmap_write(inno->grf, RK3368_GRF_SOC_CON7,
 			     VIDEO_PHY_TTL_MODE_ENBALE);
-		regmap_write(inno->regmap, INNO_PHY_MODE, TTL_MODE_ENABLE);
+		regmap_write(inno->regmap, 0x38c, 0x04);
 		/* Enable analog driver */
 		regmap_write(inno->regmap, 0x3ac, 0xfd);
 		break;
@@ -287,20 +313,20 @@ inno_video_phy_pad_config(struct inno_mipi_dphy *inno, unsigned int function)
 		pm_runtime_get_sync(inno->dev);
 		regmap_write(inno->grf, RK3368_GRF_SOC_CON7,
 			     VIDEO_PHY_TTL_MODE_DISABLE);
-		regmap_write(inno->regmap, INNO_PHY_MODE, MIPI_MODE_ENABLE);
+		regmap_write(inno->regmap, 0x38c, 0x01);
 		break;
 	case INNO_PHY_PADCTL_FUNC_LVDS:
 		pm_runtime_get_sync(inno->dev);
 		regmap_write(inno->grf, RK3368_GRF_SOC_CON7,
 			     VIDEO_PHY_TTL_MODE_DISABLE);
-		regmap_write(inno->regmap, INNO_PHY_MODE, LVDS_MODE_ENABLE);
+		regmap_write(inno->regmap, 0x38c, 0x02);
 		/* Enable LVDS analog driver */
 		regmap_write(inno->regmap, 0x3ac, 0xf8);
 		break;
 	case INNO_PHY_PADCTL_FUNC_IDLE:
 		/* Disable analog driver */
 		regmap_write(inno->regmap, 0x3ac, 0x04);
-		regmap_write(inno->regmap, INNO_PHY_MODE, 0x00);
+		regmap_write(inno->regmap, 0x38c, 0x00);
 		pm_runtime_put(inno->dev);
 		break;
 	default:
@@ -384,77 +410,100 @@ static inline struct inno_mipi_dphy *hw_to_inno(struct clk_hw *hw)
 	return container_of(hw, struct inno_mipi_dphy, pll.hw);
 }
 
-static inline void inno_mipi_dphy_reset(struct inno_mipi_dphy *inno)
+static void inno_update_bits(struct inno_mipi_dphy *inno, u8 first, u8 second,
+			     u8 mask, u8 val)
+{
+	u32 reg = INNO_PHY_REG(first, second) << 2;
+
+	regmap_update_bits(inno->regmap, reg, mask, val);
+}
+
+static void inno_mipi_dphy_reset(struct inno_mipi_dphy *inno)
 {
 	/* Reset analog */
-	regmap_update_bits(inno->regmap, INNO_PHY_POWER_CTRL,
-			   ANALOG_RESET_MASK, ANALOG_RESET);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			 REG_SYNCRST_MASK, REG_SYNCRST_RESET);
 	udelay(1);
-	regmap_update_bits(inno->regmap, INNO_PHY_POWER_CTRL,
-			   ANALOG_RESET_MASK, ANALOG_NORMAL);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			 REG_SYNCRST_MASK, REG_SYNCRST_NORMAL);
 	/* Reset digital */
-	regmap_update_bits(inno->regmap, INNO_PHY_DIG_CTRL,
-			   DIGITAL_RESET_MASK, DIGITAL_RESET);
+	inno_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			 REG_DIG_RSTN_MASK, REG_DIG_RSTN_RESET);
 	udelay(1);
-	regmap_update_bits(inno->regmap, INNO_PHY_DIG_CTRL,
-			   DIGITAL_RESET_MASK, DIGITAL_NORMAL);
+	inno_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			 REG_DIG_RSTN_MASK, REG_DIG_RSTN_NORMAL);
 }
 
-static inline void inno_mipi_dphy_da_pwrok_enable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_power_work_enable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL,
-			   PWROK_BP | PWROK, PWROK);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			 POWER_WORK_MASK, POWER_WORK_ENABLE);
 }
 
-static inline void inno_mipi_dphy_da_pwrok_disable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_power_work_disable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL,
-			   PWROK_BP | PWROK, PWROK_BP);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			 POWER_WORK_MASK, POWER_WORK_DISABLE);
 }
 
-static inline void inno_mipi_dphy_bgpd_enable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_bandgap_power_enable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL, MIPI_BGPD, 0);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			 BANDGAP_POWER_MASK, BANDGAP_POWER_ON);
 }
 
-static inline void inno_mipi_dphy_bgpd_disable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_bandgap_power_disable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL,
-			   MIPI_BGPD, MIPI_BGPD);
-	regmap_update_bits(inno->regmap, INNO_PHY_LVDS_CTRL,
-			   LVDS_BGPD, LVDS_BGPD);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			 BANDGAP_POWER_MASK, BANDGAP_POWER_DOWN);
 }
 
-static inline void inno_mipi_dphy_lane_enable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_lane_enable(struct inno_mipi_dphy *inno)
 {
-	u8 map[] = {0x44, 0x4c, 0x5c, 0x7c};
+	u8 val = LANE_EN_CK;
 
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL,
-			   0x7c, map[inno->lanes - 1]);
+	switch (inno->lanes) {
+	case 1:
+		val |= LANE_EN_0;
+		break;
+	case 2:
+		val |= LANE_EN_1 | LANE_EN_0;
+		break;
+	case 3:
+		val |= LANE_EN_2 | LANE_EN_1 | LANE_EN_0;
+		break;
+	case 4:
+	default:
+		val |= LANE_EN_3 | LANE_EN_2 | LANE_EN_1 | LANE_EN_0;
+		break;
+	}
+
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, val);
 }
 
-static inline void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
+static void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_LANE_CTRL, 0x7c, 0x00);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, 0);
 }
 
 static void inno_mipi_dphy_pll_enable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_PLL_CTRL_0, FBDIV_HI_MASK |
-			   PREDIV_MASK, FBDIV_HI(inno->pll.fbdiv >> 8) |
-			   PREDIV(inno->pll.prediv));
-	regmap_update_bits(inno->regmap, INNO_PHY_PLL_CTRL_1,
-			   FBDIV_LO_MASK, FBDIV_LO(inno->pll.fbdiv));
-	regmap_update_bits(inno->regmap, INNO_PHY_POWER_CTRL,
-			   PLL_POWER_MASK | LDO_POWER_MASK,
-			   PLL_POWER_ON | LDO_POWER_ON);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			 REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			 REG_FBDIV_HI_MASK, REG_FBDIV_HI(inno->pll.fbdiv >> 8));
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			 REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv));
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			 REG_LDOPD_MASK | REG_PLLPD_MASK,
+			 REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
 }
 
 static void inno_mipi_dphy_pll_disable(struct inno_mipi_dphy *inno)
 {
-	regmap_update_bits(inno->regmap, INNO_PHY_POWER_CTRL,
-			   PLL_POWER_MASK | LDO_POWER_MASK,
-			   PLL_POWER_DOWN | LDO_POWER_DOWN);
+	inno_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			 REG_LDOPD_MASK | REG_PLLPD_MASK,
+			 REG_LDOPD_POWER_DOWN | REG_PLLPD_POWER_DOWN);
 }
 
 static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
@@ -485,108 +534,110 @@ static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
 	timing->wakeup = 1000000;
 }
 
-static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
-					 enum lane_type lane_type,
-					 struct inno_mipi_dphy_timing *t)
+static const struct inno_mipi_dphy_timing *
+inno_mipi_dphy_get_timing(unsigned int lane_mbps)
 {
-	u32 base = lane_reg_offset[lane_type];
-
-	regmap_update_bits(inno->regmap, base + T_HS_PREPARE_OFFSET,
-			   T_HS_PREPARE_MASK, T_HS_PREPARE(t->hs_prepare));
-	regmap_update_bits(inno->regmap, base + T_HS_ZERO_OFFSET,
-			   T_HS_ZERO_MASK, T_HS_ZERO(t->hs_zero));
-	regmap_update_bits(inno->regmap, base + T_HS_TRAIL_OFFSET,
-			   T_HS_TRAIL_MASK, T_HS_TRAIL(t->hs_trail));
-	regmap_update_bits(inno->regmap, base + T_HS_EXIT_OFFSET,
-			   T_HS_EXIT_MASK, T_HS_EXIT(t->hs_exit));
-
-	if (lane_type == CLOCK_LANE) {
-		regmap_update_bits(inno->regmap, base + T_CLK_POST_OFFSET,
-				   T_CLK_POST_MASK, T_CLK_POST(t->clk_post));
-		regmap_update_bits(inno->regmap, base + T_CLK_PRE_OFFSET,
-				   T_CLK_PRE_MASK, T_CLK_PRE(t->clk_pre));
-	}
-
-	regmap_update_bits(inno->regmap, base + T_WAKUP_H_OFFSET,
-			   T_WAKUP_H_MASK, T_WAKUP_H(t->wakup_h));
-	regmap_update_bits(inno->regmap, base + T_WAKUP_L_OFFSET,
-			   T_WAKUP_L_MASK, T_WAKUP_L(t->wakup_l));
-	regmap_update_bits(inno->regmap, base + T_LPX_OFFSET,
-			   T_LPX_MASK, T_LPX(t->lpx));
-	regmap_update_bits(inno->regmap, base + T_TA_GO_OFFSET,
-			   T_TA_GO_MASK, T_TA_GO(t->ta_go));
-	regmap_update_bits(inno->regmap, base + T_TA_SURE_OFFSET,
-			   T_TA_SURE_MASK, T_TA_SURE(t->ta_sure));
-	regmap_update_bits(inno->regmap, base + T_TA_WAIT_OFFSET,
-			   T_TA_WAIT_MASK, T_TA_WAIT(t->ta_wait));
-}
+	unsigned int i;
 
-static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
-					   unsigned long freq,
-					   enum lane_type lane_type)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(fixed_param_table); i++)
-		if (freq <= fixed_param_table[i].max_freq)
+	for (i = 0; i < ARRAY_SIZE(inno_mipi_dphy_timing_table); i++)
+		if (lane_mbps <= inno_mipi_dphy_timing_table[i].max_lane_mbps)
 			break;
 
-	if (i == ARRAY_SIZE(fixed_param_table))
+	if (i == ARRAY_SIZE(inno_mipi_dphy_timing_table))
 		--i;
 
-	if (lane_type == CLOCK_LANE)
-		t->hs_zero = fixed_param_table[i].clk_lane.hs_zero;
-	else
-		t->hs_zero = fixed_param_table[i].data_lane.hs_zero;
-
-	t->hs_prepare = fixed_param_table[i].hs_prepare;
-	t->hs_trail = fixed_param_table[i].hs_trail;
+	return &inno_mipi_dphy_timing_table[i];
 }
 
-static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
-					    enum lane_type lane_type)
+static void inno_mipi_dphy_timing_init(struct inno_mipi_dphy *inno)
 {
-	struct mipi_dphy_timing timing;
-	struct inno_mipi_dphy_timing data;
-	unsigned long txbyteclk, txclkesc, UI;
+	struct mipi_dphy_timing gotp;
+	const struct inno_mipi_dphy_timing *timing;
+	unsigned long txbyteclk, txclkesc, ui, sys_clk;
 	unsigned int esc_clk_div;
+	u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait;
+	u32 hs_prepare, hs_trail, hs_zero;
+	unsigned int i;
 
-	memset(&timing, 0, sizeof(timing));
-	memset(&data, 0, sizeof(data));
+	memset(&gotp, 0, sizeof(gotp));
 
 	txbyteclk = inno->lane_rate / 8;
+	sys_clk = clk_get_rate(inno->pclk);
 	esc_clk_div = DIV_ROUND_UP(txbyteclk, 20000000);
 	txclkesc = txbyteclk / esc_clk_div;
-	UI = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, inno->lane_rate);
-
-	mipi_dphy_timing_get_default(&timing, UI);
-	inno_mipi_dphy_get_fixed_param(&data, inno->lane_rate / USEC_PER_SEC,
-				       lane_type);
-
-	data.hs_exit = DIV_ROUND_UP(timing.hsexit * txbyteclk, NSEC_PER_SEC);
-	data.clk_post = DIV_ROUND_UP(timing.clkpost * txbyteclk, NSEC_PER_SEC);
-	data.clk_pre = DIV_ROUND_UP(timing.clkpre * txbyteclk, NSEC_PER_SEC);
-	data.wakup_h = 0x3;
-	data.wakup_l = 0xff;
-	data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC);
-	if (data.lpx >= 2)
-		data.lpx -= 2;
-	data.ta_go = DIV_ROUND_UP(timing.tago * txclkesc, NSEC_PER_SEC);
-	data.ta_sure = DIV_ROUND_UP(timing.tasure * txclkesc, NSEC_PER_SEC);
-	data.ta_wait = DIV_ROUND_UP(timing.taget * txclkesc, NSEC_PER_SEC);
-
-	inno_mipi_dphy_timing_update(inno, lane_type, &data);
-
-#define TIMING_NS(x, freq) (((x) * (DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq))))
-	dev_dbg(inno->dev, "hs-exit=%lu, clk-post=%lu, clk-pre=%lu, lpx=%lu\n",
-		TIMING_NS(data.hs_exit, txbyteclk),
-		TIMING_NS(data.clk_post, txbyteclk),
-		TIMING_NS(data.clk_pre, txbyteclk),
-		TIMING_NS(data.lpx + 2, txbyteclk));
-	dev_dbg(inno->dev, "ta-go=%lu, ta-sure=%lu, ta-wait=%lu\n",
-		TIMING_NS(data.ta_go, txclkesc),
-		TIMING_NS(data.ta_sure, txclkesc),
-		TIMING_NS(data.ta_wait, txclkesc));
+	ui = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, inno->lane_rate);
+
+	dev_dbg(inno->dev, "txbyteclk=%ld, ui=%ld, sys_clk=%ld\n",
+		txbyteclk, ui, sys_clk);
+
+	mipi_dphy_timing_get_default(&gotp, ui);
+	timing = inno_mipi_dphy_get_timing(inno->lane_rate / USEC_PER_SEC);
+
+	hs_exit = DIV_ROUND_UP(gotp.hsexit * txbyteclk, NSEC_PER_SEC);
+	clk_post = DIV_ROUND_UP(gotp.clkpost * txbyteclk, NSEC_PER_SEC);
+	clk_pre = DIV_ROUND_UP(gotp.clkpre * txbyteclk, NSEC_PER_SEC);
+
+	wakeup = DIV_ROUND_UP(gotp.wakeup * sys_clk, NSEC_PER_SEC);
+	if (wakeup > 0x3ff)
+		wakeup = 0x3ff;
+
+	lpx = DIV_ROUND_UP(txbyteclk * gotp.lpx, NSEC_PER_SEC);
+	if (lpx >= 2)
+		lpx -= 2;
+
+	ta_go = DIV_ROUND_UP(gotp.tago * txclkesc, NSEC_PER_SEC);
+	ta_sure = DIV_ROUND_UP(gotp.tasure * txclkesc, NSEC_PER_SEC);
+	ta_wait = DIV_ROUND_UP(gotp.taget * txclkesc, NSEC_PER_SEC);
+
+	hs_prepare = timing->hs_prepare;
+	hs_trail = timing->hs_trail;
+
+	for (i = REGISTER_PART_CLOCK_LANE; i <= REGISTER_PART_DATA3_LANE; i++) {
+		if (i == REGISTER_PART_CLOCK_LANE)
+			hs_zero = timing->clk_lane_hs_zero;
+		else
+			hs_zero = timing->data_lane_hs_zero;
+
+		dev_dbg(inno->dev, "lpx=%x\n", lpx);
+		dev_dbg(inno->dev,
+			"hs_trail=%x, hs_exit=%x, hs_prepare=%x, hs_zero=%x\n",
+			hs_trail, hs_exit, hs_prepare, hs_zero);
+		dev_dbg(inno->dev, "clk_pre=%x, clk_post=%x\n",
+			clk_pre, clk_post);
+		dev_dbg(inno->dev, "ta_go=%x, ta_sure=%x, ta_wait=%x\n",
+			ta_go, ta_sure, ta_wait);
+
+		inno_update_bits(inno, i, 0x05, T_LPX_CNT_MASK,
+				 T_LPX_CNT(lpx));
+		inno_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,
+				 T_HS_PREPARE_CNT(hs_prepare));
+		inno_update_bits(inno, i, 0x06, T_HS_ZERO_CNT_HI_MASK,
+				 T_HS_ZERO_CNT_HI(hs_zero >> 6));
+		inno_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_LO_MASK,
+				 T_HS_ZERO_CNT_LO(hs_zero));
+		inno_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,
+				 T_HS_TRAIL_CNT(hs_trail));
+		inno_update_bits(inno, i, 0x11, T_HS_EXIT_CNT_HI_MASK,
+				 T_HS_EXIT_CNT_HI(hs_exit >> 5));
+		inno_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_LO_MASK,
+				 T_HS_EXIT_CNT_LO(hs_exit));
+		inno_update_bits(inno, i, 0x10, T_CLK_POST_HI_MASK,
+				 T_CLK_POST_HI(clk_post >> 4));
+		inno_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_LO_MASK,
+				 T_CLK_POST_CNT_LO(clk_post));
+		inno_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK,
+				 T_CLK_PRE_CNT(clk_pre));
+		inno_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK,
+				 T_WAKEUP_CNT_HI(wakeup >> 8));
+		inno_update_bits(inno, i, 0x0d, T_WAKEUP_CNT_LO_MASK,
+				 T_WAKEUP_CNT_LO(wakeup));
+		inno_update_bits(inno, i, 0x10, T_TA_GO_CNT_MASK,
+				 T_TA_GO_CNT(ta_go));
+		inno_update_bits(inno, i, 0x11, T_TA_SURE_CNT_MASK,
+				 T_TA_SURE_CNT(ta_sure));
+		inno_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK,
+				 T_TA_WAIT_CNT(ta_wait));
+	}
 }
 
 static unsigned long inno_mipi_dphy_pll_rate_fixup(unsigned long fin,
@@ -596,8 +647,8 @@ static unsigned long inno_mipi_dphy_pll_rate_fixup(unsigned long fin,
 	unsigned long best_freq = 0;
 	unsigned long fout;
 	u8 min_prediv, max_prediv;
-	u8 _prediv, uninitialized_var(best_prediv);
-	u16 _fbdiv, uninitialized_var(best_fbdiv);
+	u8 _prediv, best_prediv = 1;
+	u16 _fbdiv, best_fbdiv = 1;
 	u32 min_delta = UINT_MAX;
 
 	/*
@@ -644,26 +695,6 @@ static unsigned long inno_mipi_dphy_pll_rate_fixup(unsigned long fin,
 	return best_freq / 2;
 }
 
-static void inno_mipi_dphy_timing_init(struct inno_mipi_dphy *inno)
-{
-	switch (inno->lanes) {
-	case 4:
-		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_3);
-		/* Fall through */
-	case 3:
-		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_2);
-		/* Fall through */
-	case 2:
-		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_1);
-		/* Fall through */
-	case 1:
-	default:
-		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_0);
-		inno_mipi_dphy_lane_timing_init(inno, CLOCK_LANE);
-		break;
-	}
-}
-
 static int inno_mipi_dphy_power_on(struct phy *phy)
 {
 	struct inno_mipi_dphy *inno = phy_get_drvdata(phy);
@@ -671,8 +702,8 @@ static int inno_mipi_dphy_power_on(struct phy *phy)
 	clk_prepare_enable(inno->h2p_clk);
 	clk_prepare_enable(inno->pclk);
 	pm_runtime_get_sync(inno->dev);
-	inno_mipi_dphy_bgpd_enable(inno);
-	inno_mipi_dphy_da_pwrok_enable(inno);
+	inno_mipi_dphy_bandgap_power_enable(inno);
+	inno_mipi_dphy_power_work_enable(inno);
 	inno_mipi_dphy_pll_enable(inno);
 	inno_mipi_dphy_lane_enable(inno);
 	inno_mipi_dphy_reset(inno);
@@ -688,8 +719,8 @@ static int inno_mipi_dphy_power_off(struct phy *phy)
 
 	inno_mipi_dphy_lane_disable(inno);
 	inno_mipi_dphy_pll_disable(inno);
-	inno_mipi_dphy_da_pwrok_disable(inno);
-	inno_mipi_dphy_bgpd_disable(inno);
+	inno_mipi_dphy_power_work_disable(inno);
+	inno_mipi_dphy_bandgap_power_disable(inno);
 	pm_runtime_put(inno->dev);
 	clk_disable_unprepare(inno->pclk);
 	clk_disable_unprepare(inno->h2p_clk);
@@ -710,8 +741,8 @@ static long inno_mipi_dphy_pll_clk_round_rate(struct clk_hw *hw,
 	struct inno_mipi_dphy *inno = hw_to_inno(hw);
 	unsigned long fin = *prate;
 	unsigned long fout;
-	u16 fbdiv;
-	u8 prediv;
+	u16 fbdiv = 1;
+	u8 prediv = 1;
 
 	fout = inno_mipi_dphy_pll_rate_fixup(fin, rate, &prediv, &fbdiv);
 
@@ -793,10 +824,11 @@ static void inno_mipi_dphy_pll_unregister(struct inno_mipi_dphy *inno)
 	of_clk_del_provider(inno->dev->of_node);
 }
 
-static int inno_mipi_dphy_parse_dt(struct device_node *np,
-				   struct inno_mipi_dphy *inno)
+static int inno_mipi_dphy_parse_dt(struct inno_mipi_dphy *inno)
 {
-	if (of_property_read_u32(np, "inno,lanes", &inno->lanes))
+	struct device *dev = inno->dev;
+
+	if (of_property_read_u32(dev->of_node, "inno,lanes", &inno->lanes))
 		inno->lanes = 4;
 
 	return 0;
@@ -827,7 +859,7 @@ static int inno_mipi_dphy_probe(struct platform_device *pdev)
 	inno->socdata = of_device_get_match_data(dev);
 	platform_set_drvdata(pdev, inno);
 
-	ret = inno_mipi_dphy_parse_dt(dev->of_node, inno);
+	ret = inno_mipi_dphy_parse_dt(inno);
 	if (ret) {
 		dev_err(dev, "failed to parse DT\n");
 		return ret;

From db742632694acbda392c59aba692e63b2dfdf7b9 Mon Sep 17 00:00:00 2001
From: Bian Jin chen <kenjc.bian@rock-chips.com>
Date: Sat, 11 Aug 2018 17:36:39 +0800
Subject: [PATCH 1098/1852] arm64: dts: rockchip: rk3326/px30: Separate android
 fireware

- Split DT source files to separate out android fireware specific DT
bindings.
- Add an alias for firmware_android && chosen in px30-android.dtsi.

Change-Id: I63da786d8f70c72497b3def47309efcd8399c171
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
---
 .../arm64/boot/dts/rockchip/px30-android.dtsi |  23 +-
 .../dts/rockchip/px30-evb-ddr3-lvds-v10.dts   |  21 +
 .../boot/dts/rockchip/px30-evb-ddr3-v10.dts   |  21 +
 .../boot/dts/rockchip/px30-evb-ddr4-v10.dts   |  21 +
 .../boot/dts/rockchip/rk3326-863-lp3-v10.dts  | 797 +-----------------
 .../boot/dts/rockchip/rk3326-863-lp3-v10.dtsi | 793 +++++++++++++++++
 .../boot/dts/rockchip/rk3326-86v-v10.dts      |  21 +
 .../dts/rockchip/rk3326-evb-ai-va-v10.dts     |  21 +
 .../dts/rockchip/rk3326-evb-ai-va-v11.dts     |  21 +
 .../boot/dts/rockchip/rk3326-evb-lp3-v10.dts  |  21 +
 10 files changed, 959 insertions(+), 801 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/px30-android.dtsi b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
index 5c1b66bdf5a72..2fc90ef99cd55 100644
--- a/arch/arm64/boot/dts/rockchip/px30-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-android.dtsi
@@ -5,7 +5,7 @@
  */
 
 / {
-	chosen {
+	chosen: chosen {
 		bootargs = "earlyprintk=uart8250,mmio32,0xff160000 swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
 	};
 
@@ -23,26 +23,7 @@
 	};
 
 	firmware {
-		android {
-			compatible = "android,firmware";
-			fstab {
-				compatible = "android,fstab";
-				system {
-					compatible = "android,system";
-					dev = "/dev/block/by-name/system";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait";
-				};
-				vendor {
-					compatible = "android,vendor";
-					dev = "/dev/block/by-name/vendor";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait";
-				};
-			};
-		};
+		firmware_android: android {};
 	};
 
 	reserved-memory {
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts
index 88ff87354b19d..b8dad00dd9f4e 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts
@@ -641,3 +641,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
index 17b6a0cd9dba4..e9fc5c96950ab 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
@@ -882,3 +882,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
index d0c29b68d842e..b779c8c5cefb4 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
@@ -790,3 +790,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
index 9d1646e84422a..37ef6af0b5ac5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
@@ -5,793 +5,30 @@
  */
 
 /dts-v1/;
-#include <dt-bindings/display/drm_mipi_dsi.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/sensor-dev.h>
-#include "rk3326.dtsi"
-#include "rk3326-863-cif-sensor.dtsi"
-#include "px30-android.dtsi"
+#include "rk3326-863-lp3-v10.dtsi"
 
 / {
 	model = "Rockchip rk3326 863 board";
 	compatible = "rockchip,rk3326-863-lp3-v10", "rockchip,rk3326";
-
-	adc-keys {
-		compatible = "adc-keys";
-		io-channels = <&saradc 2>;
-		io-channel-names = "buttons";
-		poll-interval = <100>;
-		keyup-threshold-microvolt = <1800000>;
-
-		vol-down-key {
-			linux,code = <KEY_VOLUMEDOWN>;
-			label = "volume down";
-			press-threshold-microvolt = <300000>;
-		};
-
-		vol-up-key {
-			linux,code = <KEY_VOLUMEUP>;
-			label = "volume up";
-			press-threshold-microvolt = <17000>;
-		};
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		pwms = <&pwm1 0 25000 0>;
-		brightness-levels = <
-			 0   10  10  11  11  12  12  13
-			 13  14  14  15  15  16  16  17
-			 17  18  18  19  20  21  22  23
-			 24  25  26  27  28  29  30  31
-			 32  33  34  35  36  37  38  39
-			 40  41  42  43  44  45  46  47
-			 48  49  50  51  52  53  54  55
-			 56  57  58  59  60  61  62  63
-			 64  65  66  67  68  69  70  71
-			 72  73  74  75  76  77  78  79
-			 80  81  82  83  84  85  86  87
-			 88  89  90  91  92  93  94  95
-			 96  97  98  99 100 101 102 103
-			104 105 106 107 108 109 110 111
-			112 113 114 115 116 117 118 119
-			120 121 122 123 124 125 126 127
-			128 129 130 131 132 133 134 135
-			136 137 138 139 140 141 142 143
-			144 145 146 147 148 149 150 151
-			152 153 154 155 156 157 158 159
-			160 161 162 163 164 165 166 167
-			168 169 170 171 172 173 174 175
-			176 177 178 179 180 181 182 183
-			184 185 186 187 188 189 190 191
-			192 193 194 195 196 197 198 199
-			200 201 202 203 204 205 206 207
-			208 209 210 211 212 213 214 215
-			216 217 218 219 220 221 222 223
-			224 225 226 227 228 229 230 231
-			232 233 234 235 236 237 238 239
-			240 241 242 243 244 245 246 247
-			248 249 250 251 252 253 254 255>;
-		default-brightness-level = <200>;
-	};
-
-	charge-animation {
-		compatible = "rockchip,uboot-charge";
-		rockchip,uboot-charge-on = <1>;
-		rockchip,android-charge-on = <0>;
-		rockchip,uboot-low-power-voltage = <3500>;
-		rockchip,screen-on-voltage = <3600>;
-		status = "okay";
-	};
-
-	rk817-sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "rockchip,rk817-codec";
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,widgets =
-			"Microphone", "Mic Jack",
-			"Headphone", "Headphone Jack";
-		simple-audio-card,routing =
-			"Mic Jack", "MICBIAS1",
-			"IN1P", "Mic Jack",
-			"Headphone Jack", "HPOL",
-			"Headphone Jack", "HPOR";
-		simple-audio-card,cpu {
-			sound-dai = <&i2s1_2ch>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&rk817_codec>;
-		};
-	};
-
-	rk_headset {
-		compatible = "rockchip_headset";
-		headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&hp_det>;
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&cru SCLK_WIFI_PMU>;
-		clock-names = "clk_wifi_pmu";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-
-		/*
-		 * On the module itself this is one of these (depending
-		 * on the actual card populated):
-		 * - SDIO_RESET_L_WL_REG_ON
-		 * - PDN (power down when low)
-		 */
-		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
-	};
-
-	vccsys: vccsys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v8_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3800000>;
-		regulator-max-microvolt = <3800000>;
-	};
-
-	wireless-wlan {
-		compatible = "wlan-platdata";
-		wifi_chip_type = "rtl8723cs";
-		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
-		WIFI,vbat_gpio = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
-		status = "okay";
-	};
-
-	wireless-bluetooth {
-		compatible = "bluetooth-platdata";
-		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default","rts_gpio";
-		pinctrl-0 = <&uart1_rts>;
-		pinctrl-1 = <&uart1_rts_gpio>;
-		BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
-		BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
-		BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
-		status = "okay";
-	};
-};
-
-&cif {
-	status = "okay";
-};
-
-&cif_sensor {
-	status = "okay";
-};
-
-&display_subsystem {
-	status = "okay";
-};
-
-&dsi {
-	status = "okay";
-
-	panel@0 {
-		compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi";
-		reg = <0>;
-		backlight = <&backlight>;
-		enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
-		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-		prepare-delay-ms = <20>;
-		reset-delay-ms = <20>;
-		init-delay-ms = <20>;
-		enable-delay-ms = <120>;
-		disable-delay-ms = <20>;
-		unprepare-delay-ms = <20>;
-
-		width-mm = <108>;
-		height-mm = <172>;
-
-		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
-		dsi,format = <MIPI_DSI_FMT_RGB888>;
-		dsi,lanes = <4>;
-
-		panel-init-sequence = [
-			05 78 01 11
-			05 14 01 29
-		];
-
-		panel-exit-sequence = [
-			05 00 01 28
-			05 00 01 10
-		];
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing0 {
-				clock-frequency = <66000000>;
-				hactive = <800>;
-				vactive = <1280>;
-				hfront-porch = <2>;
-				hsync-len = <18>;
-				hback-porch = <18>;
-				vfront-porch = <4>;
-				vsync-len = <4>;
-				vback-porch = <16>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-	};
-};
-
-&bus_apll {
-	bus-supply = <&vdd_logic>;
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&cpu0_opp_table {
-	/*
-	 * max IR-drop values on different freq condition for this board!
-	 */
-	rockchip,board-irdrop = <
-		/*MHz	MHz	uV */
-		0	815	37500
-		816	1119	50000
-		1200	1512	75000
-	>;
-};
-
-&dmc_opp_table {
-	/*
-	 * max IR-drop values on different freq condition for this board!
-	 */
-	rockchip,board-irdrop = <
-		/*MHz	MHz	uV */
-		451	800	75000
-	>;
-};
-
-&dsi_in_vopl {
-	status = "disabled";
-};
-
-&dfi {
-	status = "okay";
-};
-
-&dmc {
-	center-supply = <&vdd_logic>;
-	status = "okay";
-};
-
-&emmc {
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
-	supports-emmc;
-	disable-wp;
-	non-removable;
-	num-slots = <1>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_logic>;
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-
-	rk817: pmic@20 {
-		compatible = "rockchip,rk817";
-		reg = <0x20>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default", "pmic-sleep",
-				"pmic-power-off", "pmic-reset";
-		pinctrl-0 = <&pmic_int>;
-		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
-		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
-		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		#clock-cells = <1>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
-		//fb-inner-reg-idxs = <2>;
-		/* 1: rst regs (default in codes), 0: rst the pmic */
-		pmic-reset-func = <1>;
-
-		vcc1-supply = <&vccsys>;
-		vcc2-supply = <&vccsys>;
-		vcc3-supply = <&vccsys>;
-		vcc4-supply = <&vccsys>;
-		vcc5-supply = <&vccsys>;
-		vcc6-supply = <&vccsys>;
-		vcc7-supply = <&vcc_3v0>;
-		vcc8-supply = <&vccsys>;
-		vcc9-supply = <&dcdc_boost>;
-
-		pwrkey {
-			status = "okay";
-		};
-
-		pinctrl_rk8xx: pinctrl_rk8xx {
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			rk817_ts_gpio1: rk817_ts_gpio1 {
-				pins = "gpio_ts";
-				function = "pin_fun1";
-				/* output-low; */
-				/* input-enable; */
-			};
-
-			rk817_gt_gpio2: rk817_gt_gpio2 {
-				pins = "gpio_gt";
-				function = "pin_fun1";
-			};
-
-			rk817_pin_ts: rk817_pin_ts {
-				pins = "gpio_ts";
-				function = "pin_fun0";
-			};
-
-			rk817_pin_gt: rk817_pin_gt {
-				pins = "gpio_gt";
-				function = "pin_fun0";
-			};
-
-			rk817_slppin_null: rk817_slppin_null {
-				pins = "gpio_slp";
-				function = "pin_fun0";
-			};
-
-			rk817_slppin_slp: rk817_slppin_slp {
-				pins = "gpio_slp";
-				function = "pin_fun1";
-			};
-
-			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
-				pins = "gpio_slp";
-				function = "pin_fun2";
-			};
-
-			rk817_slppin_rst: rk817_slppin_rst {
-				pins = "gpio_slp";
-				function = "pin_fun3";
-			};
-		};
-
-		regulators {
-			vdd_logic: DCDC_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <950000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_logic";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <950000>;
-				};
-			};
-
-			vdd_arm: DCDC_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <950000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vdd_arm";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <950000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_ddr";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc_3v0: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-initial-mode = <0x2>;
-				regulator-name = "vcc_3v0";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc_1v0: LDO_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-name = "vcc_1v0";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc1v8_soc: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-name = "vcc1v8_soc";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdd1v0_soc: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-
-				regulator-name = "vcc1v0_soc";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc3v0_pmu: LDO_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-
-				regulator-name = "vcc3v0_pmu";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-
-				};
-			};
-
-			vccio_sd: LDO_REG5 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-name = "vccio_sd";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-
-			vcc_sd: LDO_REG6 {
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-
-				regulator-name = "vcc_sd";
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-
-				};
-			};
-
-			vcc2v8_dvp: LDO_REG7 {
-				regulator-boot-on;
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-
-				regulator-name = "vcc2v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <2800000>;
-				};
-			};
-
-			vcc1v8_dvp: LDO_REG8 {
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-
-				regulator-name = "vcc1v8_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vdd1v5_dvp: LDO_REG9 {
-				regulator-boot-on;
-				regulator-min-microvolt = <1500000>;
-				regulator-max-microvolt = <1500000>;
-
-				regulator-name = "vdd1v5_dvp";
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <1500000>;
-				};
-			};
-
-			dcdc_boost: BOOST {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <4700000>;
-				regulator-max-microvolt = <5400000>;
-				regulator-name = "boost";
-			};
-
-			otg_switch: OTG_SWITCH {
-				regulator-boot-on;
-				regulator-name = "otg_switch";
-			};
-		};
-
-		battery {
-			compatible = "rk817,battery";
-			ocv_table = <3500 3548 3592 3636 3687 3740 3780
-				3806 3827 3846 3864 3889 3929 3964
-				3993 4015 4030 4041 4056 4076 4148>;
-			design_capacity = <4000>;
-			design_qmax = <4200>;
-			bat_res = <100>;
-			sleep_enter_current = <150>;
-			sleep_exit_current = <180>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3850>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			sample_res = <10>;
-			virtual_power = <0>;
-		};
-
-		charger {
-			compatible = "rk817,charger";
-			min_input_voltage = <4500>;
-			max_input_current = <1500>;
-			max_chrg_current = <2000>;
-			max_chrg_voltage = <4200>;
-			chrg_term_mode = <0>;
-			chrg_finish_cur = <300>;
-			virtual_power = <0>;
-			dc_det_adc = <0>;
-			extcon = <&u2phy>;
-		};
-
-		rk817_codec: codec {
-			#sound-dai-cells = <0>;
-			compatible = "rockchip,rk817-codec";
-			clocks = <&cru SCLK_I2S1_OUT>;
-			clock-names = "mclk";
-			pinctrl-names = "default";
-			pinctrl-0 = <&i2s1_2ch_mclk>;
-			hp-volume = <20>;
-			spk-volume = <3>;
-			mic-in-differential;
-			status = "okay";
-		};
-	};
 };
 
-&i2c1 {
-	status = "okay";
-
-	ts@40 {
-		status = "okay";
-		compatible = "GSL,GSL3673_800X1280";
-		reg = <0x40>;
-		irq_gpio_number = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>;
-		rst_gpio_number = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
-	};
-
-	sensor@19 {
-		status = "okay";
-		compatible = "gs_lis3dh";
-		reg = <0x19>;
-		type = <SENSOR_TYPE_ACCEL>;
-		irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
-		irq_enable = <0>;
-		poll_delay_ms = <30>;
-		layout = <7>;
-		reprobe_en = <1>;
-	};
-};
-
-&i2c2 {
-	status = "okay";
-};
-
-&i2s1_2ch {
-	status = "okay";
-	#sound-dai-cells = <0>;
-};
-
-&io_domains {
-	status = "okay";
-
-	vccio1-supply = <&vcc_3v0>;
-	vccio2-supply = <&vccio_sd>;
-	vccio3-supply = <&vcc2v8_dvp>;
-	vccio4-supply = <&vcc_3v0>;
-	vccio5-supply = <&vcc_3v0>;
-};
-
-&mipi_dphy {
-	status = "okay";
-};
-
-&nandc0 {
-	status = "okay";
-};
-
-&pinctrl {
-	headphone {
-		hp_det: hp-det {
-			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	pmic {
-		pmic_int: pmic_int {
-			rockchip,pins =
-				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
 		};
-
-		soc_slppin_gpio: soc_slppin_gpio {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
-		};
-
-		soc_slppin_slp: soc_slppin_slp {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
-		};
-
-		soc_slppin_rst: soc_slppin_rst {
-			rockchip,pins =
-				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
 		};
 	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pmu_io_domains {
-	status = "okay";
-
-	pmuio1-supply = <&vcc3v0_pmu>;
-	pmuio2-supply = <&vcc3v0_pmu>;
-};
-
-&pwm1 {
-	status = "okay";
-};
-
-&rk_rga {
-	status = "okay";
-};
-
-&rockchip_suspend {
-	status = "okay";
-	rockchip,sleep-debug-en = <1>;
-};
-
-&route_dsi {
-	status = "okay";
-};
-
-&saradc {
-	status = "okay";
-	vref-supply = <&vcc1v8_soc>;
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	supports-sd;
-	card-detect-delay = <800>;
-	ignore-pm-notify;
-	sd-uhs-sdr12;
-	sd-uhs-sdr25;
-	sd-uhs-sdr50;
-	sd-uhs-sdr104;
-	vqmmc-supply = <&vccio_sd>;
-	vmmc-supply = <&vcc_sd>;
-	status = "disabled";
-};
-
-&sdio {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	supports-sdio;
-	ignore-pm-notify;
-	keep-power-in-suspend;
-	non-removable;
-	mmc-pwrseq = <&sdio_pwrseq>;
-	sd-uhs-sdr104;
-	status = "okay";
-};
-
-&tsadc {
-	pinctrl-names = "init", "default";
-	pinctrl-0 = <&tsadc_otp_gpio>;
-	pinctrl-1 = <&tsadc_otp_out>;
-	status = "okay";
-};
-
-&u2phy {
-	status = "okay";
-
-	u2phy_host: host-port {
-		rockchip,low-power-mode;
-		status = "okay";
-	};
-
-	u2phy_otg: otg-port {
-		rockchip,low-power-mode;
-		status = "okay";
-	};
-};
-
-&usb20_otg {
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_xfer &uart1_cts>;
-	status = "okay";
-};
-
-&vip_mmu {
-	status = "okay";
-};
-
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
-&vopl {
-	status = "okay";
-};
-
-&vopl_mmu {
-	status = "okay";
-};
-
-&vpu_combo {
-	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
new file mode 100644
index 0000000000000..2a4d3ae45f171
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
@@ -0,0 +1,793 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/display/drm_mipi_dsi.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/sensor-dev.h>
+#include "rk3326.dtsi"
+#include "rk3326-863-cif-sensor.dtsi"
+#include "px30-android.dtsi"
+
+/ {
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <17000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			 0   10  10  11  11  12  12  13
+			 13  14  14  15  15  16  16  17
+			 17  18  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	charge-animation {
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <1>;
+		rockchip,android-charge-on = <0>;
+		rockchip,uboot-low-power-voltage = <3500>;
+		rockchip,screen-on-voltage = <3600>;
+		status = "okay";
+	};
+
+	rk817-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,rk817-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"Mic Jack", "MICBIAS1",
+			"IN1P", "Mic Jack",
+			"Headphone Jack", "HPOL",
+			"Headphone Jack", "HPOR";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&rk817_codec>;
+		};
+	};
+
+	rk_headset {
+		compatible = "rockchip_headset";
+		headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&cru SCLK_WIFI_PMU>;
+		clock-names = "clk_wifi_pmu";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+	};
+
+	vccsys: vccsys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v8_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3800000>;
+		regulator-max-microvolt = <3800000>;
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		wifi_chip_type = "rtl8723cs";
+		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
+		WIFI,vbat_gpio = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
+		status = "okay";
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default","rts_gpio";
+		pinctrl-0 = <&uart1_rts>;
+		pinctrl-1 = <&uart1_rts_gpio>;
+		BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&cif {
+	status = "okay";
+};
+
+&cif_sensor {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <108>;
+		height-mm = <172>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			05 78 01 11
+			05 14 01 29
+		];
+
+		panel-exit-sequence = [
+			05 00 01 28
+			05 00 01 10
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <66000000>;
+				hactive = <800>;
+				vactive = <1280>;
+				hfront-porch = <2>;
+				hsync-len = <18>;
+				hback-porch = <18>;
+				vfront-porch = <4>;
+				vsync-len = <4>;
+				vback-porch = <16>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
+&bus_apll {
+	bus-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu0_opp_table {
+	/*
+	 * max IR-drop values on different freq condition for this board!
+	 */
+	rockchip,board-irdrop = <
+		/*MHz	MHz	uV */
+		0	815	37500
+		816	1119	50000
+		1200	1512	75000
+	>;
+};
+
+&dmc_opp_table {
+	/*
+	 * max IR-drop values on different freq condition for this board!
+	 */
+	rockchip,board-irdrop = <
+		/*MHz	MHz	uV */
+		451	800	75000
+	>;
+};
+
+&dsi_in_vopl {
+	status = "disabled";
+};
+
+&dfi {
+	status = "okay";
+};
+
+&dmc {
+	center-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default", "pmic-sleep",
+				"pmic-power-off", "pmic-reset";
+		pinctrl-0 = <&pmic_int>;
+		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
+		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
+		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		//fb-inner-reg-idxs = <2>;
+		/* 1: rst regs (default in codes), 0: rst the pmic */
+		pmic-reset-func = <1>;
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		pwrkey {
+			status = "okay";
+		};
+
+		pinctrl_rk8xx: pinctrl_rk8xx {
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			rk817_ts_gpio1: rk817_ts_gpio1 {
+				pins = "gpio_ts";
+				function = "pin_fun1";
+				/* output-low; */
+				/* input-enable; */
+			};
+
+			rk817_gt_gpio2: rk817_gt_gpio2 {
+				pins = "gpio_gt";
+				function = "pin_fun1";
+			};
+
+			rk817_pin_ts: rk817_pin_ts {
+				pins = "gpio_ts";
+				function = "pin_fun0";
+			};
+
+			rk817_pin_gt: rk817_pin_gt {
+				pins = "gpio_gt";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_null: rk817_slppin_null {
+				pins = "gpio_slp";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_slp: rk817_slppin_slp {
+				pins = "gpio_slp";
+				function = "pin_fun1";
+			};
+
+			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
+				pins = "gpio_slp";
+				function = "pin_fun2";
+			};
+
+			rk817_slppin_rst: rk817_slppin_rst {
+				pins = "gpio_slp";
+				function = "pin_fun3";
+			};
+		};
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v0: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc_1v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3548 3592 3636 3687 3740 3780
+				3806 3827 3846 3864 3889 3929 3964
+				3993 4015 4030 4041 4056 4076 4148>;
+			design_capacity = <4000>;
+			design_qmax = <4200>;
+			bat_res = <100>;
+			sleep_enter_current = <150>;
+			sleep_exit_current = <180>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <0>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <2000>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <0>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+			extcon = <&u2phy>;
+		};
+
+		rk817_codec: codec {
+			#sound-dai-cells = <0>;
+			compatible = "rockchip,rk817-codec";
+			clocks = <&cru SCLK_I2S1_OUT>;
+			clock-names = "mclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2s1_2ch_mclk>;
+			hp-volume = <20>;
+			spk-volume = <3>;
+			mic-in-differential;
+			status = "okay";
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	ts@40 {
+		status = "okay";
+		compatible = "GSL,GSL3673_800X1280";
+		reg = <0x40>;
+		irq_gpio_number = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+		rst_gpio_number = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+	};
+
+	sensor@19 {
+		status = "okay";
+		compatible = "gs_lis3dh";
+		reg = <0x19>;
+		type = <SENSOR_TYPE_ACCEL>;
+		irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		layout = <7>;
+		reprobe_en = <1>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2s1_2ch {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vcc_3v0>;
+	vccio2-supply = <&vccio_sd>;
+	vccio3-supply = <&vcc2v8_dvp>;
+	vccio4-supply = <&vcc_3v0>;
+	vccio5-supply = <&vcc_3v0>;
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&nandc0 {
+	status = "okay";
+};
+
+&pinctrl {
+	headphone {
+		hp_det: hp-det {
+			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic_int {
+			rockchip,pins =
+				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		soc_slppin_gpio: soc_slppin_gpio {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		soc_slppin_slp: soc_slppin_slp {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+		};
+
+		soc_slppin_rst: soc_slppin_rst {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pmu_io_domains {
+	status = "okay";
+
+	pmuio1-supply = <&vcc3v0_pmu>;
+	pmuio2-supply = <&vcc3v0_pmu>;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&rk_rga {
+	status = "okay";
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <1>;
+};
+
+&route_dsi {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc1v8_soc>;
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "disabled";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&tsadc {
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&tsadc_otp_gpio>;
+	pinctrl-1 = <&tsadc_otp_out>;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		rockchip,low-power-mode;
+		status = "okay";
+	};
+
+	u2phy_otg: otg-port {
+		rockchip,low-power-mode;
+		status = "okay";
+	};
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts>;
+	status = "okay";
+};
+
+&vip_mmu {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&vpu_combo {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts
index 5eda0e23aec8d..14b99d3654ea5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts
@@ -770,3 +770,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
index 9afd0f5b6d0da..060602aa4ec83 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
@@ -1248,3 +1248,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
index d2d395aaf52db..6f22fdda9a1ff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
@@ -1269,3 +1269,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
index 9164cbf9a9ba1..d86687c788177 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
@@ -910,3 +910,24 @@
 &vpu_combo {
 	status = "okay";
 };
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};

From acae388d322b4e0a31adf32af19e4e67120ef559 Mon Sep 17 00:00:00 2001
From: Bian Jin chen <kenjc.bian@rock-chips.com>
Date: Tue, 14 Aug 2018 15:34:33 +0800
Subject: [PATCH 1099/1852] arm64: dts: rockchip: Add new dts file for
 rk3326-863-lp3-v10 avb.

Change-Id: I94d292a11bb1f309fb6bf864b47f968df8333f1f
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
---
 .../devicetree/bindings/arm/rockchip.txt      |  4 +++
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../dts/rockchip/rk3326-863-lp3-v10-avb.dts   | 30 +++++++++++++++++++
 3 files changed, 35 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index c85f1912f7bd5..6833a9f7e5c32 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -123,6 +123,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "rockchip,rk3326-863-lp3-v10", "rockchip,rk3326";
 
+- Rockchip RK3326 f863 avb board:
+    Required root node properties:
+      - compatible = "rockchip,rk3326-863-lp3-v10-avb", "rockchip,rk3326";
+
 - Rockchip RK3326 86v board:
     Required root node properties:
       - compatible = "rockchip,rk3326-86v-v10", "rockchip,rk3326";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index c21da94de8587..9c36a13b6ebd0 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10-avb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-86v-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-box-liantong.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts
new file mode 100644
index 0000000000000..2b69d08f63af3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3326-863-lp3-v10.dtsi"
+
+/ {
+	model = "Rockchip rk3326 863 avb board";
+	compatible = "rockchip,rk3326-863-lp3-v10-avb", "rockchip,rk3326";
+};
+
+&firmware_android {
+	compatible = "android,firmware";
+	vbmeta {
+		compatible = "android,vbmeta";
+		parts = "vbmeta,boot,system,vendor,dtbo";
+	};
+	fstab {
+		compatible = "android,fstab";
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/platform/ff390000.dwmmc/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait,avb";
+		};
+	};
+};

From 0dd0b35dfa7a421827feb352826dfa27eb56c318 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 15 Aug 2018 20:44:15 +0800
Subject: [PATCH 1100/1852] ASoC: rk3308_codec: fix the incorrect grp with
 'rockchip,en-always-grps'

There is some broken mapped grps when we use the property
'rockchip,en-always-grps', let's fix it.

Change-Id: I1f668138be4133ee06988756917220621758d2de
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 177 ++++++++++++++++++--------------
 1 file changed, 98 insertions(+), 79 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 56b2d9e0e95e0..c3bc491bf947d 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -54,7 +54,6 @@
 #define CODEC_DRV_NAME			"rk3308-acodec"
 
 #define ADC_GRP_SKIP_MAGIC		0x1001
-#define ADC_GRP_SKIP_MAGIC2		0x1002
 #define ADC_LR_GROUP_MAX		4
 #define ADC_STABLE_MS			20
 #define DEBUG_POP_ALWAYS		0
@@ -145,7 +144,7 @@ struct rk3308_codec_priv {
 	u32 loopback_grp;
 	u32 en_always_grps[ADC_LR_GROUP_MAX];
 	u32 en_always_grps_num;
-	u32 enabled_grps[ADC_LR_GROUP_MAX];
+	u32 skip_grps[ADC_LR_GROUP_MAX];
 	u32 i2s_sdis[ADC_LR_GROUP_MAX];
 	u32 to_i2s_grps;
 	u32 delay_loopback_handle_ms;
@@ -595,16 +594,17 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 			 * loopback ADCs.
 			 */
 			*grp = ADC_GRP_SKIP_MAGIC;
-		} else if (rk3308->enabled_grps[mapped_grp]) {
+		} else if (rk3308->en_always_grps_num &&
+			   rk3308->skip_grps[mapped_grp]) {
 			/* To set the skip flag if the ADC GRP is enabled. */
-			*grp = ADC_GRP_SKIP_MAGIC2;
+			*grp = ADC_GRP_SKIP_MAGIC;
 		} else {
 			*grp = mapped_grp;
 		}
 
 		dev_dbg(rk3308->plat_dev,
-			"ADC_TYPE_NORMAL, idx: %d, get grp: %d\n",
-			idx, *grp);
+			"ADC_TYPE_NORMAL, idx: %d, mapped_grp: %d, get grp: %d,\n",
+			idx, mapped_grp, *grp);
 	} else if (type == ADC_TYPE_ALL) {
 		if (idx >= ADC_LR_GROUP_MAX)
 			return false;
@@ -809,6 +809,9 @@ static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
 				   RK3308_ADC_DIG_RESET);
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
 				   RK3308_ADC_I2S_LRC_POL_MSK |
 				   RK3308_ADC_I2S_MODE_MSK,
@@ -828,6 +831,9 @@ static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
 
 	/* Enable high pass filter and cut-off 20Hz for ADCs */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(grp),
 				   RK3308_ADC_HPF_PATH_MSK,
 				   RK3308_ADC_HPF_PATH_EN);
@@ -934,6 +940,9 @@ static int rk3308_codec_adc_dig_config(struct rk3308_codec_priv *rk3308,
 	adc_aif2 |= RK3308_ADC_I2S_WORK;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+			continue;
+
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
 				   RK3308_ADC_I2S_VALID_LEN_MSK |
 				   RK3308_ADC_I2S_LR_MSK |
@@ -2036,7 +2045,7 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * These values are estimated
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON05(grp),
@@ -2074,7 +2083,7 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * By default is 44.1KHz for sample.
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON04(grp),
@@ -2089,7 +2098,7 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 #if ENABLE_AGC
 	/* 3. Set ACODEC_ALC_DIG_CON9[6] to 0x1, to enable the ALC module */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
@@ -2107,7 +2116,7 @@ static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
 	 * to 0x3, to enable the ALC module to control the gain of PGA.
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
@@ -2133,7 +2142,7 @@ static int rk3308_codec_alc_disable(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/*
@@ -2149,7 +2158,7 @@ static int rk3308_codec_alc_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/*
@@ -2174,7 +2183,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 1 */
@@ -2186,7 +2195,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 2 */
@@ -2198,7 +2207,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 3 */
@@ -2212,7 +2221,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	usleep_range(200, 250);	/* estimated value */
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 1 */
@@ -2224,7 +2233,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 2 */
@@ -2236,7 +2245,7 @@ static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 3 */
@@ -2273,7 +2282,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 		/* Keep other ADCs as MIC-IN */
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
 			/* The groups without line-in are >= 1 */
-			if (grp < 1 || grp == ADC_GRP_SKIP_MAGIC)
+			if (grp < 1 || grp > ADC_LR_GROUP_MAX - 1)
 				continue;
 
 			regmap_update_bits(rk3308->regmap,
@@ -2285,7 +2294,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 		}
 	} else {
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-			if (grp == ADC_GRP_SKIP_MAGIC)
+			if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 				continue;
 
 			regmap_update_bits(rk3308->regmap,
@@ -2303,7 +2312,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 	 * buffer, and to end the initialization of MIC
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
@@ -2318,7 +2327,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 	 * of audio
 	 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON06(grp),
@@ -2328,7 +2337,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 4*/
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
@@ -2340,7 +2349,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 5 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
@@ -2352,7 +2361,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 6 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
@@ -2364,7 +2373,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 7 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
@@ -2376,7 +2385,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 8 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
@@ -2388,7 +2397,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 9 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON05(grp),
@@ -2400,7 +2409,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 10 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON02(grp),
@@ -2412,7 +2421,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 11 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON00(grp),
@@ -2428,7 +2437,7 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 
 	/* vendor step 14 */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		regmap_read(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
@@ -2460,7 +2469,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	int idx, grp;
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 1 */
@@ -2472,7 +2481,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 2 */
@@ -2484,7 +2493,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 3 */
@@ -2496,7 +2505,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 4 */
@@ -2508,7 +2517,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 5 */
@@ -2520,7 +2529,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 6 */
@@ -2532,7 +2541,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 7 */
@@ -2542,7 +2551,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 8 */
@@ -2554,7 +2563,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 9 */
@@ -2566,7 +2575,7 @@ static int rk3308_codec_adc_ana_disable(struct rk3308_codec_priv *rk3308,
 	}
 
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp == ADC_GRP_SKIP_MAGIC2)
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
 			continue;
 
 		/* vendor step 10 */
@@ -2618,6 +2627,9 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308)
 						   RK3308_ADC_R_CH_BIST_MSK,
 						   RK3308_ADC_R_CH_BIST_SINE);
 			} else {
+				if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+					continue;
+
 				regmap_update_bits(rk3308->regmap,
 						   RK3308_ADC_DIG_CON03(grp),
 						   RK3308_ADC_L_CH_BIST_MSK,
@@ -2787,23 +2799,16 @@ static void rk3308_codec_update_adcs_status(struct rk3308_codec_priv *rk3308,
 {
 	int idx;
 
+	/* Update skip_grps flags if the ADCs need to be enabled always. */
 	if (state == PATH_BUSY) {
-		/*
-		 * The used_adc_grps points out the current max ADC grps
-		 * dynamically during enable ADCs.
-		 */
-		for (idx = 0; idx < rk3308->en_always_grps_num; idx++) {
-			u32 mapped_grp = to_mapped_grp(rk3308, idx);
+		/* Clear all of skip_grps flags. */
+		for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++)
+			rk3308->skip_grps[idx] = 0;
 
-			rk3308->enabled_grps[mapped_grp] = 1;
-		}
-	} else {
-		/* Clear all of enabled_grps flags if en_always_grps is 0 */
-		for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
-			if (rk3308->en_always_grps[idx])
-				continue;
+		for (idx = 0; idx < rk3308->en_always_grps_num; idx++) {
+			u32 en_always_grp = rk3308->en_always_grps[idx];
 
-			rk3308->enabled_grps[idx] = 0;
+			rk3308->skip_grps[en_always_grp] = 1;
 		}
 	}
 }
@@ -2832,30 +2837,38 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
 		if (ret < 0)
 			return ret;
 
-		/* Check the DACs are opened */
-		if (playback_str->substream_opened) {
-			rk3308->loopback_dacs_enabled = true;
-			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-				regmap_update_bits(rk3308->regmap,
-						   RK3308_ADC_DIG_CON03(grp),
-						   RK3308_ADC_L_CH_BIST_MSK,
-						   RK3308_ADC_L_CH_NORMAL_LEFT);
-				regmap_update_bits(rk3308->regmap,
-						   RK3308_ADC_DIG_CON03(grp),
-						   RK3308_ADC_R_CH_BIST_MSK,
-						   RK3308_ADC_R_CH_NORMAL_RIGHT);
-			}
-		} else {
-			rk3308->loopback_dacs_enabled = false;
-			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-				regmap_update_bits(rk3308->regmap,
-						   RK3308_ADC_DIG_CON03(grp),
-						   RK3308_ADC_L_CH_BIST_MSK,
-						   RK3308_ADC_L_CH_BIST_SINE);
-				regmap_update_bits(rk3308->regmap,
-						   RK3308_ADC_DIG_CON03(grp),
-						   RK3308_ADC_R_CH_BIST_MSK,
-						   RK3308_ADC_R_CH_BIST_SINE);
+		if (has_loopback(rk3308->loopback_grp)) {
+			/* Check the DACs are opened */
+			if (playback_str->substream_opened) {
+				rk3308->loopback_dacs_enabled = true;
+				for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+					if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+						continue;
+
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_L_CH_BIST_MSK,
+							   RK3308_ADC_L_CH_NORMAL_LEFT);
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_R_CH_BIST_MSK,
+							   RK3308_ADC_R_CH_NORMAL_RIGHT);
+				}
+			} else {
+				rk3308->loopback_dacs_enabled = false;
+				for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+					if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+						continue;
+
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_L_CH_BIST_MSK,
+							   RK3308_ADC_L_CH_BIST_SINE);
+					regmap_update_bits(rk3308->regmap,
+							   RK3308_ADC_DIG_CON03(grp),
+							   RK3308_ADC_R_CH_BIST_MSK,
+							   RK3308_ADC_R_CH_BIST_SINE);
+				}
 			}
 		}
 
@@ -2892,6 +2905,9 @@ static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
 			 * ADCs and keep zero input data
 			 */
 			for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+				if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+					continue;
+
 				regmap_update_bits(rk3308->regmap,
 						   RK3308_ADC_DIG_CON03(grp),
 						   RK3308_ADC_L_CH_BIST_MSK,
@@ -3250,6 +3266,9 @@ static void rk3308_codec_loopback_work(struct work_struct *work)
 
 	/* Recover normal mode after enable ADCs */
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
+		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
+			continue;
+
 		regmap_update_bits(rk3308->regmap,
 				   RK3308_ADC_DIG_CON03(grp),
 				   RK3308_ADC_L_CH_BIST_MSK,

From d443a269be82dcb287f527d26598234d0414023c Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 16 Aug 2018 17:14:59 +0800
Subject: [PATCH 1101/1852] ASoC: rk3308_codec: increase ADC_STABLE_MS to 200ms

It looks that switching BIST mode to normal mode, we need
to increase the ADC_STABLE_MS delay (> ~150ms) to avoid
glitches.

Change-Id: Ied7b283cd4a2fa8c2702a655dab464a7f90f63c4
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index c3bc491bf947d..1a78d20feceac 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -55,7 +55,7 @@
 
 #define ADC_GRP_SKIP_MAGIC		0x1001
 #define ADC_LR_GROUP_MAX		4
-#define ADC_STABLE_MS			20
+#define ADC_STABLE_MS			200
 #define DEBUG_POP_ALWAYS		0
 #define ENABLE_AGC			0
 #define HPDET_POLL_MS			2000

From bce128141dcf764fd49ed889f49c050a57088582 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Thu, 16 Aug 2018 10:11:06 +0800
Subject: [PATCH 1102/1852] drivers: rkflash: adjusting the vendor interface
 provided to the kernel

Change-Id: I9c939c774601f866b8c29270740aaab41c08a194
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl.h     | 4 ++--
 drivers/rkflash/rkflash_blk.c | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index 0f0e0d5085f6d..84586d4725678 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -14,8 +14,8 @@ u32 sftl_get_density(void);
 s32 sftl_gc(void);
 int sftl_vendor_read(u32 index, u32 count, u8 *buf);
 int sftl_vendor_write(u32 index, u32 count, u8 *buf);
-int rk_sftl_vendor_read(u32 index, u32 count, u8 *buf);
-int rk_sftl_vendor_write(u32 index, u32 count, u8 *buf);
+int rk_sftl_vendor_read(u32 id, u8 *buf, u32 size);
+int rk_sftl_vendor_write(u32 id, u8 *buf, u32 size);
 int rk_sftl_vendor_register(void);
 int rk_sftl_vendor_storage_init(void);
 int rk_sftl_vendor_dev_ops_register(int (*read)(u32 sec,
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 862269c9227ae..dc4167fba624d 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -699,7 +699,8 @@ int rkflash_dev_init(void __iomem *reg_addr, enum flash_con_type con_type)
 						rkflash_vendor_write);
 		ret = rk_sftl_vendor_storage_init();
 		if (!ret) {
-			rk_vendor_register(sftl_vendor_read, sftl_vendor_write);
+			rk_vendor_register(rk_sftl_vendor_read,
+					   rk_sftl_vendor_write);
 			rk_sftl_vendor_register();
 			pr_info("rkflashd vendor storage init ok !\n");
 		} else {

From 941208131c3233957def13d7f331c152537c5a76 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 3 Aug 2018 17:25:06 +0800
Subject: [PATCH 1103/1852] phy/rockchip: typec: PLL1 settings improvements

When I tested DP function on excavator, I found that commit 1bf7191033de
("BACKPORT: FROMLIST: phy: rockchip-typec: support variable phy config value"),
which change pll settings, but it does not work as expected on excavator board.
With this patch series, DP works well on excavator and roc.

Change-Id: I48fe0c51e322369d1aff352f4ebaf1096f264834
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-typec.c | 42 +++++++++++------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index 82085f2266eb9..36f2aa52a324f 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -367,7 +367,7 @@ struct phy_reg {
 	u32 addr;
 };
 
-struct phy_reg usb3_pll_cfg[] = {
+static const struct phy_reg usb3_pll_cfg[] = {
 	{ 0xf0,		CMN_PLL0_VCOCAL_INIT },
 	{ 0x18,		CMN_PLL0_VCOCAL_ITER },
 	{ 0xd0,		CMN_PLL0_INTDIV },
@@ -384,15 +384,15 @@ struct phy_reg usb3_pll_cfg[] = {
 	{ 0x8,		CMN_DIAG_PLL0_LF_PROG },
 };
 
-struct phy_reg dp_pll_rbr_cfg[] = {
+static const struct phy_reg dp_pll_rbr_cfg[] = {
 	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
 	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
 	{ 0x30b9,	CMN_PLL1_VCOCAL_START },
-	{ 0x87,		CMN_PLL1_INTDIV },
-	{ 0,		CMN_PLL1_FRACDIV },
-	{ 0x22,		CMN_PLL1_HIGH_THR },
-	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
-	{ 0,		CMN_PLL1_SS_CTRL2 },
+	{ 0x0086,	CMN_PLL1_INTDIV },
+	{ 0xf915,	CMN_PLL1_FRACDIV },
+	{ 0x0022,	CMN_PLL1_HIGH_THR },
+	{ 0x0140,	CMN_PLL1_SS_CTRL1 },
+	{ 0x7f03,	CMN_PLL1_SS_CTRL2 },
 	{ 0x20,		CMN_PLL1_DSM_DIAG },
 	{ 0,		CMN_PLLSM1_USER_DEF_CTRL },
 	{ 0,		CMN_DIAG_PLL1_OVRD },
@@ -406,15 +406,15 @@ struct phy_reg dp_pll_rbr_cfg[] = {
 	{ 0x1,		CMN_DIAG_PLL1_INCLK_CTRL },
 };
 
-struct phy_reg dp_pll_hbr_cfg[] = {
+static const struct phy_reg dp_pll_hbr_cfg[] = {
 	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
 	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
 	{ 0x30b4,	CMN_PLL1_VCOCAL_START },
-	{ 0xe1,		CMN_PLL1_INTDIV },
-	{ 0,		CMN_PLL1_FRACDIV },
-	{ 0x5,		CMN_PLL1_HIGH_THR },
-	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
-	{ 0,		CMN_PLL1_SS_CTRL2 },
+	{ 0x00e0,	CMN_PLL1_INTDIV },
+	{ 0xf479,	CMN_PLL1_FRACDIV },
+	{ 0x0038,	CMN_PLL1_HIGH_THR },
+	{ 0x0204,	CMN_PLL1_SS_CTRL1 },
+	{ 0x7f03,	CMN_PLL1_SS_CTRL2 },
 	{ 0x20,		CMN_PLL1_DSM_DIAG },
 	{ 0x1000,	CMN_PLLSM1_USER_DEF_CTRL },
 	{ 0,		CMN_DIAG_PLL1_OVRD },
@@ -428,15 +428,15 @@ struct phy_reg dp_pll_hbr_cfg[] = {
 	{ 0x1,		CMN_DIAG_PLL1_INCLK_CTRL },
 };
 
-struct phy_reg dp_pll_hbr2_cfg[] = {
+static const struct phy_reg dp_pll_hbr2_cfg[] = {
 	{ 0xf0,		CMN_PLL1_VCOCAL_INIT },
 	{ 0x18,		CMN_PLL1_VCOCAL_ITER },
 	{ 0x30b4,	CMN_PLL1_VCOCAL_START },
-	{ 0xe1,		CMN_PLL1_INTDIV },
-	{ 0,		CMN_PLL1_FRACDIV },
-	{ 0x5,		CMN_PLL1_HIGH_THR },
-	{ 0x8000,	CMN_PLL1_SS_CTRL1 },
-	{ 0,		CMN_PLL1_SS_CTRL2 },
+	{ 0x00e0,	CMN_PLL1_INTDIV },
+	{ 0xf479,	CMN_PLL1_FRACDIV },
+	{ 0x0038,	CMN_PLL1_HIGH_THR },
+	{ 0x0204,	CMN_PLL1_SS_CTRL1 },
+	{ 0x7f03,	CMN_PLL1_SS_CTRL2 },
 	{ 0x20,		CMN_PLL1_DSM_DIAG },
 	{ 0x1000,	CMN_PLLSM1_USER_DEF_CTRL },
 	{ 0,		CMN_DIAG_PLL1_OVRD },
@@ -505,7 +505,7 @@ static void tcphy_cfg_usb3_pll(struct rockchip_typec_phy *tcphy)
 
 static void tcphy_cfg_dp_pll(struct rockchip_typec_phy *tcphy, int link_rate)
 {
-	struct phy_reg *phy_cfg;
+	const struct phy_reg *phy_cfg;
 	u32 clk_ctrl;
 	u32 i, cfg_size, hsclk_sel;
 
@@ -595,7 +595,7 @@ static void tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, int link_rate,
 	val = val & 0x8fff;
 	switch (link_rate) {
 	case 540000:
-		val |= (4 << 12);
+		val |= (5 << 12);
 		break;
 	case 162000:
 	case 270000:

From 1768abb0e5a3bf51236d115bfa1791a797ab52ee Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 6 Aug 2018 11:48:25 +0800
Subject: [PATCH 1104/1852] phy/rockchip: typec: improved handling of
 typec_dp_phy_config()

Change-Id: I61ca43ffe7fe85e041fb3ed66ba1d59f515770d9
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-typec.c | 371 ++++++++++++++++++++--
 include/soc/rockchip/rockchip_phy_typec.h |   4 +
 2 files changed, 345 insertions(+), 30 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index 36f2aa52a324f..dc2549ef8f5f5 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -295,13 +295,37 @@
 #define RX_DIAG_SIGDET_TUNE(n)		((0x81dc | ((n) << 9)) << 2)
 #define RX_DIAG_SC2C_DELAY		(0x81e1 << 2)
 
-#define PMA_LANE_CFG			(0xc000 << 2)
+#define PHY_PMA_LANE_CFG		(0xc000 << 2)
+#define PMA_LANE3_DP_LANE_SEL(x)	(((x) & 0x3) << 14)
+#define PMA_LANE3_INTERFACE_SEL(x)	(((x) & 0x1) << 12)
+#define PMA_LANE2_DP_LANE_SEL(x)	(((x) & 0x3) << 10)
+#define PMA_LANE2_INTERFACE_SEL(x)	(((x) & 0x1) << 8)
+#define PMA_LANE1_DP_LANE_SEL(x)	(((x) & 0x3) << 6)
+#define PMA_LANE1_INTERFACE_SEL(x)	(((x) & 0x1) << 4)
+#define PMA_LANE0_DP_LANE_SEL(x)	(((x) & 0x3) << 2)
+#define PMA_LANE0_INTERFACE_SEL(x)	(((x) & 0x1) << 0)
 #define PIPE_CMN_CTRL1			(0xc001 << 2)
 #define PIPE_CMN_CTRL2			(0xc002 << 2)
 #define PIPE_COM_LOCK_CFG1		(0xc003 << 2)
 #define PIPE_COM_LOCK_CFG2		(0xc004 << 2)
 #define PIPE_RCV_DET_INH		(0xc005 << 2)
-#define DP_MODE_CTL			(0xc008 << 2)
+#define PHY_DP_MODE_CTL			(0xc008 << 2)
+#define PHY_DP_LANE_DISABLE		GENMASK(15, 12)
+#define PHY_DP_LANE_3_DISABLE		BIT(15)
+#define PHY_DP_LANE_2_DISABLE		BIT(14)
+#define PHY_DP_LANE_1_DISABLE		BIT(13)
+#define PHY_DP_LANE_0_DISABLE		BIT(12)
+#define PHY_DP_POWER_STATE_ACK_MASK	GENMASK(7, 4)
+#define PHY_DP_POWER_STATE_ACK_SHIFT	4
+#define PHY_DP_POWER_STATE_MASK		GENMASK(3, 0)
+#define PHY_DP_CLK_CTL			(0xc009 << 2)
+#define DP_PLL_CLOCK_ENABLE_ACK		BIT(3)
+#define DP_PLL_CLOCK_ENABLE_MASK	BIT(2)
+#define DP_PLL_CLOCK_DISABLE		0
+#define DP_PLL_READY			BIT(1)
+#define DP_PLL_ENABLE_MASK		BIT(0)
+#define DP_PLL_ENABLE			BIT(0)
+#define DP_PLL_DISABLE			0
 #define DP_CLK_CTL			(0xc009 << 2)
 #define STS				(0xc00F << 2)
 #define PHY_ISO_CMN_CTRL		(0xc010 << 2)
@@ -468,6 +492,283 @@ static const struct phy_config tcphy_default_config[3][4] = {
 	 { .swing = 0,    .pe = 0 } },
 };
 
+enum phy_dp_power_state {
+	PHY_DP_POWER_STATE_DISABLED = -1,
+	PHY_DP_POWER_STATE_A0,
+	PHY_DP_POWER_STATE_A1,
+	PHY_DP_POWER_STATE_A2,
+	PHY_DP_POWER_STATE_A3,
+};
+
+static int tcphy_dp_set_power_state(struct rockchip_typec_phy *tcphy,
+				    enum phy_dp_power_state state)
+{
+	u32 ack, reg, sts = BIT(state);
+	int ret;
+
+	/*
+	 * Power state changes must not be requested until after the cmn_ready
+	 * signal has gone active.
+	 */
+	reg = readl(tcphy->base + PMA_CMN_CTRL1);
+	if (!(reg & CMN_READY)) {
+		dev_err(tcphy->dev, "cmn_ready in the inactive state\n");
+		return -EINVAL;
+	}
+
+	reg = readl(tcphy->base + PHY_DP_MODE_CTL);
+	reg &= ~PHY_DP_POWER_STATE_MASK;
+	reg |= sts;
+	writel(reg, tcphy->base + PHY_DP_MODE_CTL);
+
+	ret = readl_poll_timeout(tcphy->base + PHY_DP_MODE_CTL,
+				 ack, (((ack & PHY_DP_POWER_STATE_ACK_MASK) >>
+				 PHY_DP_POWER_STATE_ACK_SHIFT) == sts), 10,
+				 PHY_MODE_SET_TIMEOUT);
+	if (ret < 0) {
+		dev_err(tcphy->dev, "failed to enter power state %d\n", state);
+		return ret;
+	}
+
+	return 0;
+}
+
+enum {
+	PHY_DP_LANE_0,
+	PHY_DP_LANE_1,
+	PHY_DP_LANE_2,
+	PHY_DP_LANE_3,
+};
+
+enum {
+	PMA_IF_PIPE_PCS,
+	PMA_IF_PHY_DP,
+};
+
+/*
+ * For the TypeC PHY, the 4 lanes are mapping to the USB TypeC receptacle pins
+ * as follows:
+ *   -------------------------------------------------------------------
+ *	PHY Lanes/Module Pins			TypeC Receptacle Pins
+ *   -------------------------------------------------------------------
+ *	Lane0 (tx_p/m_ln_0)			TX1+/TX1- (pins A2/A3)
+ *	Lane1 (tx_rx_p/m_ln_1)			RX1+/RX1- (pins B11/B10)
+ *	Lane2 (tx_rx_p/m_ln_2)			RX2+/RX2- (pins A11/A10)
+ *	Lane3 (tx_p/m_ln_3)			TX2+/TX2- (pins B2/B3)
+ *   -------------------------------------------------------------------
+ *
+ * USB and DP lanes mapping to TypeC PHY lanes for each of pin assignment
+ * options (normal connector orientation) described in the VESA DisplayPort
+ * Alt Mode on USB TypeC Standard as follows:
+ *
+ * ----------------------------------------------------------------------
+ *	PHY Lanes	A	B	C	D	E	F
+ * ----------------------------------------------------------------------
+ *	  0	       ML1     SSTX    ML2     SSTX    ML2     SSTX
+ *	  1	       ML3     SSRX    ML3     SSRX    ML3     SSRX
+ *	  2	       ML2     ML1     ML0     ML0     ML0     ML0
+ *	  3	       ML0     ML0     ML1     ML1     ML1     ML1
+ * ----------------------------------------------------------------------
+ */
+static void tcphy_set_lane_mapping(struct rockchip_typec_phy *tcphy, u8 mode)
+{
+	/*
+	 * The PHY_PMA_LANE_CFG register is used to select whether a PMA lane
+	 * is mapped for USB or PHY DP. The PHY_PMA_LANE_CFG register is
+	 * configured based on a normal connector orientation. Logic in the
+	 * PHY automatically handles the flipped connector case based on the
+	 * setting of orientation of TypeC PHY.
+	 */
+	if (mode == MODE_DFP_DP) {
+		/* This maps to VESA DP Alt Mode pin assignments C and E. */
+		writel(PMA_LANE3_DP_LANE_SEL(PHY_DP_LANE_1) |
+		       PMA_LANE3_INTERFACE_SEL(PMA_IF_PHY_DP) |
+		       PMA_LANE2_DP_LANE_SEL(PHY_DP_LANE_0) |
+		       PMA_LANE2_INTERFACE_SEL(PMA_IF_PHY_DP) |
+		       PMA_LANE1_DP_LANE_SEL(PHY_DP_LANE_3) |
+		       PMA_LANE1_INTERFACE_SEL(PMA_IF_PHY_DP) |
+		       PMA_LANE0_DP_LANE_SEL(PHY_DP_LANE_2) |
+		       PMA_LANE0_INTERFACE_SEL(PMA_IF_PHY_DP),
+		       tcphy->base + PHY_PMA_LANE_CFG);
+	} else {
+		/* This maps to VESA DP Alt Mode pin assignments D and F. */
+		writel(PMA_LANE3_DP_LANE_SEL(PHY_DP_LANE_1) |
+		       PMA_LANE3_INTERFACE_SEL(PMA_IF_PHY_DP) |
+		       PMA_LANE2_DP_LANE_SEL(PHY_DP_LANE_0) |
+		       PMA_LANE2_INTERFACE_SEL(PMA_IF_PHY_DP) |
+		       PMA_LANE1_INTERFACE_SEL(PMA_IF_PIPE_PCS) |
+		       PMA_LANE0_INTERFACE_SEL(PMA_IF_PIPE_PCS),
+		       tcphy->base + PHY_PMA_LANE_CFG);
+	}
+}
+
+static int tcphy_dp_set_lane_count(struct rockchip_typec_phy *tcphy,
+				   u8 lane_count)
+{
+	u32 reg;
+
+	/*
+	 * In cases where fewer than the configured number of DP lanes are
+	 * being used. PHY_DP_MODE_CTL[15:12] must be set to disable and
+	 * power-down the unused PHY DP lanes (and their mapped PMA lanes).
+	 * Set the bit ([15:12]) associated with each DP PHY lane(s) to be
+	 * disabled.
+	 */
+	reg = readl(tcphy->base + PHY_DP_MODE_CTL);
+	reg |= PHY_DP_LANE_DISABLE;
+
+	switch (lane_count) {
+	case 4:
+		reg &= ~(PHY_DP_LANE_3_DISABLE | PHY_DP_LANE_2_DISABLE |
+			 PHY_DP_LANE_1_DISABLE | PHY_DP_LANE_0_DISABLE);
+		break;
+	case 2:
+		reg &= ~(PHY_DP_LANE_1_DISABLE | PHY_DP_LANE_0_DISABLE);
+		break;
+	case 1:
+		reg &= ~PHY_DP_LANE_0_DISABLE;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	writel(reg, tcphy->base + PHY_DP_MODE_CTL);
+
+	tcphy->dp.lane_count = lane_count;
+
+	return 0;
+}
+
+static int tcphy_dp_set_link_rate(struct rockchip_typec_phy *tcphy,
+				  int link_rate)
+{
+	const struct phy_reg *phy_cfg;
+	u32 cmn_diag_hsclk_sel, phy_dp_clk_ctl, reg;
+	u32 i, cfg_size;
+	int ret;
+
+	/* Place the PHY lanes in the A3 power state. */
+	ret = tcphy_dp_set_power_state(tcphy, PHY_DP_POWER_STATE_A3);
+	if (ret) {
+		dev_err(tcphy->dev, "failed to enter A3 state: %d\n", ret);
+		return ret;
+	}
+
+	/* Gate the PLL clocks from PMA */
+	reg = readl(tcphy->base + PHY_DP_CLK_CTL);
+	reg &= ~DP_PLL_CLOCK_ENABLE_MASK;
+	reg |= DP_PLL_CLOCK_DISABLE;
+	writel(reg, tcphy->base + PHY_DP_CLK_CTL);
+
+	ret = readl_poll_timeout(tcphy->base + PHY_DP_CLK_CTL, reg,
+				 !(reg & DP_PLL_CLOCK_ENABLE_ACK),
+				 10, PHY_MODE_SET_TIMEOUT);
+	if (ret) {
+		dev_err(tcphy->dev, "wait DP PLL clock disabled timeout\n");
+		return ret;
+	}
+
+	/* Disable the PLL */
+	reg = readl(tcphy->base + PHY_DP_CLK_CTL);
+	reg &= ~DP_PLL_ENABLE_MASK;
+	reg |= DP_PLL_DISABLE;
+	writel(reg, tcphy->base + PHY_DP_CLK_CTL);
+
+	ret = readl_poll_timeout(tcphy->base + PHY_DP_CLK_CTL, reg,
+				 !(reg & DP_PLL_READY),
+				 10, PHY_MODE_SET_TIMEOUT);
+	if (ret) {
+		dev_err(tcphy->dev, "wait DP PLL not ready timeout\n");
+		return ret;
+	}
+
+	/* Re-configure PHY registers for the new data rate */
+	cmn_diag_hsclk_sel = readl(tcphy->base + CMN_DIAG_HSCLK_SEL);
+	cmn_diag_hsclk_sel &= ~(GENMASK(5, 4) | GENMASK(1, 0));
+
+	phy_dp_clk_ctl = readl(tcphy->base + PHY_DP_CLK_CTL);
+	phy_dp_clk_ctl &= ~(GENMASK(15, 12) | GENMASK(11, 8));
+
+	switch (link_rate) {
+	case 162000:
+		cmn_diag_hsclk_sel |= (3 << 4) | (0 << 0);
+		phy_dp_clk_ctl |= (2 << 12) | (4 << 8);
+
+		phy_cfg = dp_pll_rbr_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_rbr_cfg);
+		break;
+	case 270000:
+		cmn_diag_hsclk_sel |= (3 << 4) | (0 << 0);
+		phy_dp_clk_ctl |= (2 << 12) | (4 << 8);
+
+		phy_cfg = dp_pll_hbr_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_hbr_cfg);
+		break;
+	case 540000:
+		cmn_diag_hsclk_sel |= (2 << 4) | (0 << 0);
+		phy_dp_clk_ctl |= (1 << 12) | (2 << 8);
+
+		phy_cfg = dp_pll_hbr2_cfg;
+		cfg_size = ARRAY_SIZE(dp_pll_hbr2_cfg);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	writel(cmn_diag_hsclk_sel, tcphy->base + CMN_DIAG_HSCLK_SEL);
+	writel(phy_dp_clk_ctl, tcphy->base + PHY_DP_CLK_CTL);
+
+	/* load the configuration of PLL1 */
+	for (i = 0; i < cfg_size; i++)
+		writel(phy_cfg[i].value, tcphy->base + phy_cfg[i].addr);
+
+	/* Enable the PLL */
+	reg = readl(tcphy->base + PHY_DP_CLK_CTL);
+	reg &= ~DP_PLL_ENABLE_MASK;
+	reg |= DP_PLL_ENABLE;
+	writel(reg, tcphy->base + PHY_DP_CLK_CTL);
+
+	ret = readl_poll_timeout(tcphy->base + PHY_DP_CLK_CTL, reg,
+				 reg & DP_PLL_READY,
+				 10, PHY_MODE_SET_TIMEOUT);
+	if (ret < 0) {
+		dev_err(tcphy->dev, "wait DP PLL ready timeout\n");
+		return ret;
+	}
+
+	/* Enable PMA PLL clocks */
+	reg = readl(tcphy->base + PHY_DP_CLK_CTL);
+	reg &= ~DP_PLL_CLOCK_ENABLE_MASK;
+	reg |= DP_PLL_CLOCK_ENABLE;
+	writel(reg, tcphy->base + PHY_DP_CLK_CTL);
+
+	ret = readl_poll_timeout(tcphy->base + PHY_DP_CLK_CTL, reg,
+				 reg & DP_PLL_CLOCK_ENABLE_ACK,
+				 10, PHY_MODE_SET_TIMEOUT);
+	if (ret) {
+		dev_err(tcphy->dev, "wait DP PLL clock enabled timeout\n");
+		return ret;
+	}
+
+	/* The PMA must go through the A2 power state upon a data rate change */
+	ret = tcphy_dp_set_power_state(tcphy, PHY_DP_POWER_STATE_A2);
+	if (ret) {
+		dev_err(tcphy->dev, "failed to enter A2 state: %d\n", ret);
+		return ret;
+	}
+
+	/* change the PHY power state to A0 */
+	ret = tcphy_dp_set_power_state(tcphy, PHY_DP_POWER_STATE_A0);
+	if (ret) {
+		dev_err(tcphy->dev, "failed to enter A0 state: %d\n", ret);
+		return ret;
+	}
+
+	tcphy->dp.link_rate = link_rate;
+
+	return 0;
+}
+
 static void tcphy_cfg_24m(struct rockchip_typec_phy *tcphy)
 {
 	u32 i, rdata;
@@ -535,12 +836,14 @@ static void tcphy_cfg_dp_pll(struct rockchip_typec_phy *tcphy, int link_rate)
 	}
 
 	clk_ctrl |= DP_PLL_CLOCK_ENABLE | DP_PLL_ENABLE;
-	writel(clk_ctrl, tcphy->base + DP_CLK_CTL);
+	writel(clk_ctrl, tcphy->base + PHY_DP_CLK_CTL);
 	writel(hsclk_sel, tcphy->base + CMN_DIAG_HSCLK_SEL);
 
 	/* load the configuration of PLL1 */
 	for (i = 0; i < cfg_size; i++)
 		writel(phy_cfg[i].value, tcphy->base + phy_cfg[i].addr);
+
+	tcphy->dp.link_rate = link_rate;
 }
 
 static void tcphy_tx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
@@ -792,13 +1095,12 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
 	tcphy_dp_aux_set_flip(tcphy);
 
 	tcphy_cfg_24m(tcphy);
+	tcphy_set_lane_mapping(tcphy, mode);
 
 	if (mode == MODE_DFP_DP) {
 		tcphy_cfg_dp_pll(tcphy, DP_DEFAULT_RATE);
 		for (i = 0; i < 4; i++)
 			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, i);
-
-		writel(PIN_ASSIGN_C_E, tcphy->base + PMA_LANE_CFG);
 	} else {
 		tcphy_cfg_usb3_pll(tcphy);
 		tcphy_cfg_dp_pll(tcphy, DP_DEFAULT_RATE);
@@ -813,14 +1115,12 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
 			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 2);
 			tcphy_dp_cfg_lane(tcphy, DP_DEFAULT_RATE, 0, 0, 3);
 		}
-
-		writel(PIN_ASSIGN_D_F, tcphy->base + PMA_LANE_CFG);
 	}
 
-	val = readl(tcphy->base + DP_MODE_CTL);
+	val = readl(tcphy->base + PHY_DP_MODE_CTL);
 	val &= ~DP_MODE_MASK;
 	val |= DP_MODE_ENTER_A2 | DP_LINK_RESET_DEASSERTED;
-	writel(val, tcphy->base + DP_MODE_CTL);
+	writel(val, tcphy->base + PHY_DP_MODE_CTL);
 
 	reset_control_deassert(tcphy->uphy_rst);
 
@@ -1055,7 +1355,7 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 
 	property_enable(tcphy, &cfg->uphy_dp_sel, 1);
 
-	ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
+	ret = readx_poll_timeout(readl, tcphy->base + PHY_DP_MODE_CTL,
 				 val, val & DP_MODE_A2_ACK, 1000,
 				 PHY_MODE_SET_TIMEOUT);
 	if (ret < 0) {
@@ -1066,19 +1366,9 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 	tcphy_dp_aux_calibration(tcphy);
 
 	/* enter A0 mode */
-	val = readl(tcphy->base + DP_MODE_CTL);
-	val &= ~DP_MODE_MASK;
-	val |= DP_MODE_ENTER_A0;
-	writel(val, tcphy->base + DP_MODE_CTL);
-
-	ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
-				 val, val & DP_MODE_A0_ACK, 1000,
-				 PHY_MODE_SET_TIMEOUT);
-	if (ret < 0) {
-		val &= ~DP_MODE_MASK;
-		val |= DP_MODE_ENTER_A2;
-		writel(val, tcphy->base + DP_MODE_CTL);
-		dev_err(tcphy->dev, "failed to wait TCPHY enter A0\n");
+	ret = tcphy_dp_set_power_state(tcphy, PHY_DP_POWER_STATE_A0);
+	if (ret) {
+		dev_err(tcphy->dev, "failed to enter A0 power state\n");
 		goto power_on_finish;
 	}
 
@@ -1095,7 +1385,7 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
 static int rockchip_dp_phy_power_off(struct phy *phy)
 {
 	struct rockchip_typec_phy *tcphy = phy_get_drvdata(phy);
-	u32 val;
+	int ret;
 
 	mutex_lock(&tcphy->lock);
 
@@ -1104,10 +1394,11 @@ static int rockchip_dp_phy_power_off(struct phy *phy)
 
 	tcphy->mode &= ~MODE_DFP_DP;
 
-	val = readl(tcphy->base + DP_MODE_CTL);
-	val &= ~DP_MODE_MASK;
-	val |= DP_MODE_ENTER_A2;
-	writel(val, tcphy->base + DP_MODE_CTL);
+	ret = tcphy_dp_set_power_state(tcphy, PHY_DP_POWER_STATE_A2);
+	if (ret) {
+		dev_err(tcphy->dev, "failed to enter A2 power state\n");
+		goto unlock;
+	}
 
 	if (tcphy->mode == MODE_DISCONNECT)
 		tcphy_phy_deinit(tcphy);
@@ -1124,12 +1415,32 @@ static const struct phy_ops rockchip_dp_phy_ops = {
 };
 
 static int typec_dp_phy_config(struct phy *phy, int link_rate,
-			 int lanes, u8 swing, u8 pre_emp)
+			 int lane_count, u8 swing, u8 pre_emp)
 {
 	struct rockchip_typec_phy *tcphy = phy_get_drvdata(phy);
 	u8 i;
+	int ret;
 
-	tcphy_cfg_dp_pll(tcphy, link_rate);
+	dev_dbg(tcphy->dev, "link_rate=%d, lane_count=%d\n",
+		link_rate, lane_count);
+	dev_dbg(tcphy->dev, "voltage_swing=%d, pre_emphasis=%d\n",
+		swing, pre_emp);
+
+	if (lane_count != tcphy->dp.lane_count) {
+		ret = tcphy_dp_set_lane_count(tcphy, lane_count);
+		if (ret) {
+			dev_err(tcphy->dev, "failed to set lane count\n");
+			return ret;
+		}
+	}
+
+	if (link_rate != tcphy->dp.link_rate) {
+		ret = tcphy_dp_set_link_rate(tcphy, link_rate);
+		if (ret) {
+			dev_err(tcphy->dev, "failed to set lane rate\n");
+			return ret;
+		}
+	}
 
 	if (tcphy->mode == MODE_DFP_DP) {
 		for (i = 0; i < 4; i++)
diff --git a/include/soc/rockchip/rockchip_phy_typec.h b/include/soc/rockchip/rockchip_phy_typec.h
index 51270e4f85d75..7f0d022d2d34a 100644
--- a/include/soc/rockchip/rockchip_phy_typec.h
+++ b/include/soc/rockchip/rockchip_phy_typec.h
@@ -45,6 +45,10 @@ struct rockchip_typec_phy {
 	bool flip;
 	u8 mode;
 	struct phy_config config[3][4];
+	struct {
+		int link_rate;
+		u8 lane_count;
+	} dp;
 	int (*typec_phy_config)(struct phy *phy, int link_rate,
 				int lanes, u8 swing, u8 pre_emp);
 };

From 6c7e20f60b36cde524d8ea04b1731c2ddfe1116d Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Wed, 15 Aug 2018 16:43:01 +0800
Subject: [PATCH 1105/1852] ASoC: rk3308_codec: add
 'pa-drv-gpios'&'rockchip,delay-pa-drv-ms' properties

Change-Id: I02873c309453213e1357ffa9375a3bd2a161d7ed
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 .../devicetree/bindings/sound/rockchip,rk3308-codec.txt       | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
index ad3bdf71ad49c..484564d912d9d 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.txt
@@ -50,6 +50,9 @@ Optional properties:
 - rockchip,no-hp-det: If there is no headphone on boards, we don't need to
   enable headphone detection.
 - hp-ctl-gpios: The gpio of head phone controller.
+- pa-drv-gpios: The gpio of poweramplifier controller
+- rockchip,delay-pa-drv-ms: This property points out that the delay for
+  power on amplifier
 - spk-ctl-gpios: The gpio of speak controller.
 
 Example for rk3308 internal codec:
@@ -64,6 +67,7 @@ acodec: acodec@ff560000 {
 	reset-names = "acodec-reset";
 	rockchip,loopback-grp = <0>;
 	hp-ctl-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+	pa-drv-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
 	spk-ctl-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };

From ad1396fae7970c4fff8e432f29380b6802882a05 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Tue, 14 Aug 2018 09:47:44 +0800
Subject: [PATCH 1106/1852] ASoC: rk3308_codec: add support
 'pa-drv-gpios'&'rockchip,delay-pa-drv-ms' properties

Change-Id: Id9a65d40c3985dd780ea0458c2169c6088c76084
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 39 +++++++++++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 1a78d20feceac..0913d548888cc 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -61,6 +61,7 @@
 #define HPDET_POLL_MS			2000
 #define NOT_USED			255
 #define LOOPBACK_HANDLE_MS		100
+#define PA_DRV_MS		        5
 
 #define GRF_SOC_CON1			0x304
 #define GRF_I2S2_8CH_SDI_SFT		0
@@ -129,6 +130,7 @@ struct rk3308_codec_priv {
 	struct clk *mclk_tx;
 	struct gpio_desc *hp_ctl_gpio;
 	struct gpio_desc *spk_ctl_gpio;
+	struct gpio_desc *pa_drv_gpio;
 	struct snd_soc_codec *codec;
 	struct snd_soc_jack *hpdet_jack;
 	/*
@@ -149,6 +151,7 @@ struct rk3308_codec_priv {
 	u32 to_i2s_grps;
 	u32 delay_loopback_handle_ms;
 	u32 delay_start_play_ms;
+	u32 delay_pa_drv_ms;
 	int which_i2s;
 	int irq;
 	int adc_grp0_using_linein;
@@ -649,8 +652,23 @@ static void rk3308_headphone_ctl(struct rk3308_codec_priv *rk3308, int on)
 
 static void rk3308_speaker_ctl(struct rk3308_codec_priv *rk3308, int on)
 {
-	if (rk3308->spk_ctl_gpio)
-		gpiod_direction_output(rk3308->spk_ctl_gpio, on);
+	if (on) {
+		if (rk3308->pa_drv_gpio) {
+			gpiod_direction_output(rk3308->pa_drv_gpio, on);
+			msleep(rk3308->delay_pa_drv_ms);
+		}
+
+		if (rk3308->spk_ctl_gpio)
+			gpiod_direction_output(rk3308->spk_ctl_gpio, on);
+	} else {
+		if (rk3308->spk_ctl_gpio)
+			gpiod_direction_output(rk3308->spk_ctl_gpio, on);
+
+		if (rk3308->pa_drv_gpio) {
+			msleep(rk3308->delay_pa_drv_ms);
+			gpiod_direction_output(rk3308->pa_drv_gpio, on);
+		}
+	}
 }
 
 static int rk3308_codec_reset(struct snd_soc_codec *codec)
@@ -3806,6 +3824,23 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	rk3308->pa_drv_gpio = devm_gpiod_get_optional(&pdev->dev, "pa-drv",
+						       GPIOD_OUT_LOW);
+
+	if (!rk3308->pa_drv_gpio) {
+		dev_info(&pdev->dev, "Don't need pa-drv gpio\n");
+	} else if (IS_ERR(rk3308->pa_drv_gpio)) {
+		ret = PTR_ERR(rk3308->pa_drv_gpio);
+		dev_err(&pdev->dev, "Unable to claim gpio pa-drv\n");
+		return ret;
+	}
+
+	if (rk3308->pa_drv_gpio) {
+		rk3308->delay_pa_drv_ms = PA_DRV_MS;
+		ret = of_property_read_u32(np, "rockchip,delay-pa-drv-ms",
+					   &rk3308->delay_pa_drv_ms);
+	}
+
 #if DEBUG_POP_ALWAYS
 	dev_info(&pdev->dev, "Enable all ctl gpios always for debugging pop\n");
 	rk3308_headphone_ctl(rk3308, 1);

From 56848dedf0ab15a2b92e044ef2e1f1808083d7a4 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Tue, 14 Aug 2018 18:21:55 +0800
Subject: [PATCH 1107/1852] ARM: rockchip_defconfig: Enable
 CONFIG_DEBUG_SET_MODULE_RONX

Android P CDD document chapter "9.7. Security Features"

Kernel integrity and self-protection features are integral to Android
security. Device implementations:
[C-0-8] MUST implement strict kernel memory protections where executable
code is readonly, read-only data is non-executable and non-writable, and
writable data is nonexecutable (e.g. CONFIG_DEBUG_RODATA or CONFIG_STRICT_KERNEL_RWX ).

Change-Id: Id4deb57242b55c8b5de2ad7de8a48f49ffa3c3e3
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index fd1ef2e1466be..c2e531300fc5f 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -696,6 +696,7 @@ CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
 CONFIG_KEYS=y
 CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y

From a7f60a80298fde9ce0318060379854ed4c4e7899 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Thu, 16 Aug 2018 20:10:33 +0800
Subject: [PATCH 1108/1852] fiq_debugger: Sanity check state in
 fiq_tty_proc_show

The fiq_tty_proc_show can be called even when fiq is not enabled in dts,
which would cause crash.

Add sanity check to avoid that.

Change-Id: I69d34718f91813aed14c542901060e4fd68b818b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/staging/android/fiq_debugger/fiq_debugger.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/staging/android/fiq_debugger/fiq_debugger.c b/drivers/staging/android/fiq_debugger/fiq_debugger.c
index 997e4c2f8a60f..aa26bcb99efe7 100644
--- a/drivers/staging/android/fiq_debugger/fiq_debugger.c
+++ b/drivers/staging/android/fiq_debugger/fiq_debugger.c
@@ -1217,6 +1217,8 @@ static int fiq_tty_proc_show(struct seq_file *m, void *v)
 	seq_puts(m, "fiq-debugger driver\n");
 	for (i = 0; i < MAX_FIQ_DEBUGGER_PORTS; i++) {
 		state = states[i];
+		if (!state)
+			continue;
 
 		seq_printf(m, "%d:", i);
 		seq_printf(m, " state:%d", state->console_enable);

From 718634ba719facb247bdd5ebc992991a7ff59536 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 15 Aug 2018 14:09:05 +0800
Subject: [PATCH 1109/1852] media: rockchip: isp1: fix two dvp sensor can't
 connect to rkisp1 sink pad

when two dvp sensor connect to rkisp1, only one sensor can connect to sink
pad, another sensor connect to sink params pad.

Change-Id: I6cc9e6db3ad074c82c15a9cc642330ece6997d09
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index aa50ea9699710..97d49322de178 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -299,7 +299,7 @@ static int rkisp1_create_links(struct rkisp1_device *dev)
 		ret = media_entity_create_link(
 				&sensor->sd->entity, pad,
 				&dev->isp_sdev.sd.entity,
-				RKISP1_ISP_PAD_SINK + s,
+				RKISP1_ISP_PAD_SINK,
 				s ? 0 : MEDIA_LNK_FL_ENABLED);
 		if (ret) {
 			dev_err(dev->dev,

From 16bcccb6255870236373e1f2411f0b48d39f11ac Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sat, 28 Jul 2018 08:12:04 -0400
Subject: [PATCH 1110/1852] UPSTREAM: ext4: fix check to prevent initializing
 reserved inodes

commit 5012284700775a4e6e3fbe7eac4c543c4874b559 upstream.

Commit 8844618d8aa7: "ext4: only look at the bg_flags field if it is
valid" will complain if block group zero does not have the
EXT4_BG_INODE_ZEROED flag set.  Unfortunately, this is not correct,
since a freshly created file system has this flag cleared.  It gets
almost immediately after the file system is mounted read-write --- but
the following somewhat unlikely sequence will end up triggering a
false positive report of a corrupted file system:

   mkfs.ext4 /dev/vdc
   mount -o ro /dev/vdc /vdc
   mount -o remount,rw /dev/vdc

Instead, when initializing the inode table for block group zero, test
to make sure that itable_unused count is not too large, since that is
the case that will result in some or all of the reserved inodes
getting cleared.

This fixes the failures reported by Eric Whiteney when running
generic/230 and generic/231 in the the nojournal test case.

Change-Id: I799bfafa4712e2dd29268c7481b539b23e2cf475
Fixes: 8844618d8aa7 ("ext4: only look at the bg_flags field if it is valid")
Reported-by: Eric Whitney <enwlinux@gmail.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 7736fcede789b412ae1c5c2f12f9bef58903319c)
---
 fs/ext4/ialloc.c | 5 ++++-
 fs/ext4/super.c  | 8 +-------
 2 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c
index 48d818eba9c33..8e1c3b3d16188 100644
--- a/fs/ext4/ialloc.c
+++ b/fs/ext4/ialloc.c
@@ -1305,7 +1305,10 @@ int ext4_init_inode_table(struct super_block *sb, ext4_group_t group,
 			    ext4_itable_unused_count(sb, gdp)),
 			    sbi->s_inodes_per_block);
 
-	if ((used_blks < 0) || (used_blks > sbi->s_itb_per_group)) {
+	if ((used_blks < 0) || (used_blks > sbi->s_itb_per_group) ||
+	    ((group == 0) && ((EXT4_INODES_PER_GROUP(sb) -
+			       ext4_itable_unused_count(sb, gdp)) <
+			      EXT4_FIRST_INO(sb)))) {
 		ext4_error(sb, "Something is wrong with group %u: "
 			   "used itable blocks: %d; "
 			   "itable unused count: %u",
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index c5ba22bdeaa93..53d28a0ca6eb6 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -2874,14 +2874,8 @@ static ext4_group_t ext4_has_uninit_itable(struct super_block *sb)
 		if (!gdp)
 			continue;
 
-		if (gdp->bg_flags & cpu_to_le16(EXT4_BG_INODE_ZEROED))
-			continue;
-		if (group != 0)
+		if (!(gdp->bg_flags & cpu_to_le16(EXT4_BG_INODE_ZEROED)))
 			break;
-		ext4_error(sb, "Inode table for bg 0 marked as "
-			   "needing zeroing");
-		if (sb->s_flags & MS_RDONLY)
-			return ngroups;
 	}
 
 	return group;

From 0d47ef0245c1cca2f73a154aaee5c0dcd7e76892 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 15 Aug 2018 14:14:13 +0800
Subject: [PATCH 1111/1852] media: i2c: add gc2145/gc0312 driver for rkisp1

Change-Id: I3d4bae2e45a6fd40cf7bf6b53900abcbfacba2d7
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/Kconfig  |   18 +
 drivers/media/i2c/Makefile |    2 +
 drivers/media/i2c/gc0312.c | 1113 +++++++++++++++++++++++++
 drivers/media/i2c/gc2145.c | 1583 ++++++++++++++++++++++++++++++++++++
 4 files changed, 2716 insertions(+)
 create mode 100644 drivers/media/i2c/gc0312.c
 create mode 100644 drivers/media/i2c/gc2145.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 08d350bc73985..7303b6e74b10c 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -722,6 +722,24 @@ config VIDEO_GC2155
 	  To compile this driver as a module, choose M here: the
 	  module will be called gc2155.
 
+config VIDEO_GC0312
+	tristate "GalaxyCore GC0312 sensor support"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	help
+	  Support for the GalaxyCore GC0312 sensor.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gc0312.
+
+config VIDEO_GC2145
+	tristate "GalaxyCore GC2145 sensor support"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	help
+	  Support for the GalaxyCore GC2145 sensor.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gc2145.
+
 comment "Flash devices"
 
 config VIDEO_ADP1653
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 2fba2f69de33a..f04d9168ac1c3 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -88,3 +88,5 @@ obj-$(CONFIG_VIDEO_TC35874X)	+= tc35874x.o
 obj-$(CONFIG_VIDEO_OV5647)	+= ov5647.o
 obj-$(CONFIG_VIDEO_IMX219)	+= imx219.o
 obj-$(CONFIG_VIDEO_GC2155)	+= gc2155.o
+obj-$(CONFIG_VIDEO_GC0312)	+= gc0312.o
+obj-$(CONFIG_VIDEO_GC2145)	+= gc2145.o
diff --git a/drivers/media/i2c/gc0312.c b/drivers/media/i2c/gc0312.c
new file mode 100644
index 0000000000000..cf4c74416d599
--- /dev/null
+++ b/drivers/media/i2c/gc0312.c
@@ -0,0 +1,1113 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * GC0312 CMOS Image Sensor driver
+ *
+ * Copyright (C) 2015 Texas Instruments, Inc.
+ *
+ * Benoit Parrot <bparrot@ti.com>
+ * Lad, Prabhakar <prabhakar.csengg@gmail.com>
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/media.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/videodev2.h>
+
+#include <media/media-entity.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+#define DRIVER_NAME "gc0312"
+#define GC0312_PIXEL_RATE		(96 * 1000 * 1000)
+
+/*
+ * GC0312 register definitions
+ */
+#define REG_SOFTWARE_STANDBY		0xf3
+
+#define REG_SC_CHIP_ID_H		0xf0
+#define REG_SC_CHIP_ID_L		0xf1
+
+#define REG_NULL			0xFFFF	/* Array end token */
+
+#define SENSOR_ID(_msb, _lsb)		((_msb) << 8 | (_lsb))
+#define GC0312_ID			0xb310
+
+struct sensor_register {
+	u16 addr;
+	u8 value;
+};
+
+struct gc0312_framesize {
+	u16 width;
+	u16 height;
+	u16 max_exp_lines;
+	const struct sensor_register *regs;
+};
+
+struct gc0312_pll_ctrl {
+	u8 ctrl1;
+	u8 ctrl2;
+	u8 ctrl3;
+};
+
+struct gc0312_pixfmt {
+	u32 code;
+	/* Output format Register Value (REG_FORMAT_CTRL00) */
+	struct sensor_register *format_ctrl_regs;
+};
+
+struct pll_ctrl_reg {
+	unsigned int div;
+	unsigned char reg;
+};
+
+static const char * const gc0312_supply_names[] = {
+	"dovdd",	/* Digital I/O power */
+	"avdd",		/* Analog power */
+	"dvdd",		/* Digital core power */
+};
+
+#define GC0312_NUM_SUPPLIES ARRAY_SIZE(gc0312_supply_names)
+
+struct gc0312 {
+	struct v4l2_subdev sd;
+	struct media_pad pad;
+	struct v4l2_mbus_framefmt format;
+	unsigned int xvclk_frequency;
+	struct clk *xvclk;
+	struct gpio_desc *pwdn_gpio;
+	struct regulator_bulk_data supplies[GC0312_NUM_SUPPLIES];
+	struct mutex lock;
+	struct i2c_client *client;
+	struct v4l2_ctrl_handler ctrls;
+	struct v4l2_ctrl *link_frequency;
+	const struct gc0312_framesize *frame_size;
+	int streaming;
+};
+
+static const struct sensor_register gc0312_vga_regs[] = {
+	{0xfe, 0xf0},
+	{0xfe, 0xf0},
+	{0xfe, 0x00},
+	{0xfc, 0x0e},
+	{0xfc, 0x0e},
+	{0xf2, 0x07},
+	/*output_disable*/
+	{0xf3, 0x00},
+	{0xf7, 0x1b},
+	{0xf8, 0x04},
+	{0xf9, 0x0e},
+	{0xfa, 0x11},
+
+	/*CISCTL reg*/
+	{0x00, 0x2f},
+	{0x01, 0x0f},
+	{0x02, 0x04},
+	{0x03, 0x03},
+	{0x04, 0x50},
+	{0x09, 0x00},
+	{0x0a, 0x00},
+	{0x0b, 0x00},
+	{0x0c, 0x04},
+	{0x0d, 0x01},
+	{0x0e, 0xe8},
+	{0x0f, 0x02},
+	{0x10, 0x88},
+	{0x16, 0x00},
+	{0x17, 0x17},
+	{0x18, 0x1a},
+	{0x19, 0x14},
+	{0x1b, 0x48},
+	/*1c travis 20140929  update for lag*/
+	{0x1c, 0x6c},
+	{0x1e, 0x6b},
+	{0x1f, 0x28},
+	/*0x89 travis20140801*/
+	{0x20, 0x8b},
+	{0x21, 0x49},
+	/*b0 travis 20140929 update for lag*/
+	{0x22, 0xd0},
+	{0x23, 0x04},
+	{0x24, 0x16},
+	{0x34, 0x20},
+
+	/*BLK*/
+	{0x26, 0x23},
+	{0x28, 0xff},
+	{0x29, 0x00},
+	/*{0x32, 0x04},*/
+	{0x33, 0x10},
+	{0x37, 0x20},
+	{0x38, 0x10},
+	{0x47, 0x80},
+	{0x4e, 0x66},
+	{0xa8, 0x02},
+	{0xa9, 0x80},
+
+	/*ISP reg*/
+	{0x40, 0xff},
+	{0x41, 0x21},
+	{0x42, 0xcf},
+	{0x44, 0x02},
+	{0x45, 0xa8},
+	/*sync 02*/
+	{0x46, 0x03},
+	{0x4a, 0x11},
+	{0x4b, 0x01},
+	{0x4c, 0x20},
+	{0x4d, 0x05},
+	{0x4f, 0x01},
+	{0x50, 0x01},
+	{0x55, 0x01},
+	{0x56, 0xe0},
+	{0x57, 0x02},
+	{0x58, 0x80},
+
+	/*GAIN*/
+	{0x70, 0x70},
+	{0x5a, 0x84},
+	{0x5b, 0xc9},
+	{0x5c, 0xed},
+	{0x77, 0x74},
+	{0x78, 0x40},
+	{0x79, 0x5f},
+
+	/*DNDD*/
+	{0x82, 0x14},
+	{0x83, 0x0b},
+	{0x89, 0xf0},
+
+	/*EEINTP*/
+	{0x8f, 0xaa},
+	{0x90, 0x8c},
+	{0x91, 0x90},
+	{0x92, 0x03},
+	{0x93, 0x03},
+	{0x94, 0x05},
+	{0x95, 0x66},
+	{0x96, 0xf0},
+
+	/*ASDE*/
+	{0xfe, 0x00},
+
+	{0x9a, 0x20},
+	{0x9b, 0x80},
+	{0x9c, 0x40},
+	{0x9d, 0x80},
+
+	{0xa1, 0x30},
+	{0xa2, 0x32},
+	{0xa4, 0x30},
+	{0xa5, 0x30},
+	{0xaa, 0x10},
+	{0xac, 0x22},
+
+	/*GAMMA*/
+	{0xfe, 0x00},
+	{0xbf, 0x08},
+	{0xc0, 0x16},
+	{0xc1, 0x28},
+	{0xc2, 0x41},
+	{0xc3, 0x5a},
+	{0xc4, 0x6c},
+	{0xc5, 0x7a},
+	{0xc6, 0x96},
+	{0xc7, 0xac},
+	{0xc8, 0xbc},
+	{0xc9, 0xc9},
+	{0xca, 0xd3},
+	{0xcb, 0xdd},
+	{0xcc, 0xe5},
+	{0xcd, 0xf1},
+	{0xce, 0xfa},
+	{0xcf, 0xff},
+
+	/*YCP*/
+	{0xd0, 0x40},
+	{0xd1, 0x34},
+	{0xd2, 0x34},
+	{0xd3, 0x45},
+	{0xd6, 0xf2},
+	{0xd7, 0x1b},
+	{0xd8, 0x18},
+	{0xdd, 0x03},
+
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x05, 0x30},
+	{0x06, 0x75},
+	{0x07, 0x40},
+	{0x08, 0xb0},
+	{0x0a, 0xc5},
+	{0x0b, 0x11},
+	{0x0c, 0x00},
+	{0x12, 0x52},
+	{0x13, 0x40},
+	{0x18, 0x95},
+	{0x19, 0x96},
+	{0x1f, 0x20},
+	{0x20, 0xc0},
+	{0x3e, 0x40},
+	{0x3f, 0x57},
+	{0x40, 0x7d},
+	{0x03, 0x60},
+	{0x44, 0x02},
+
+	/*AWB*/
+	{0x1c, 0x91},
+	{0x21, 0x15},
+	{0x50, 0x80},
+	{0x56, 0x04},
+	{0x59, 0x08},
+	{0x5b, 0x02},
+	{0x61, 0x8d},
+	{0x62, 0xa7},
+	{0x63, 0xd0},
+	{0x65, 0x06},
+	{0x66, 0x06},
+	{0x67, 0x84},
+	{0x69, 0x08},
+	{0x6a, 0x25},
+	{0x6b, 0x01},
+	{0x6c, 0x00},
+	{0x6d, 0x02},
+	{0x6e, 0xf0},
+	{0x6f, 0x80},
+	{0x76, 0x80},
+	{0x78, 0xaf},
+	{0x79, 0x75},
+	{0x7a, 0x40},
+	{0x7b, 0x50},
+	{0x7c, 0x0c},
+
+	{0xa4, 0xb9},
+	{0xa5, 0xa0},
+	{0x90, 0xc9},
+	{0x91, 0xbe},
+
+	{0xa6, 0xb8},
+	{0xa7, 0x95},
+	{0x92, 0xe6},
+	{0x93, 0xca},
+
+	{0xa9, 0xbc},
+	{0xaa, 0x95},
+	{0x95, 0x23},
+	{0x96, 0xe7},
+
+	{0xab, 0x9d},
+	{0xac, 0x80},
+	{0x97, 0x43},
+	{0x98, 0x24},
+
+	{0xae, 0xb7},
+	{0xaf, 0x9e},
+	{0x9a, 0x43},
+	{0x9b, 0x24},
+
+	{0xb0, 0xc8},
+	{0xb1, 0x97},
+	{0x9c, 0xc4},
+	{0x9d, 0x44},
+
+	{0xb3, 0xb7},
+	{0xb4, 0x7f},
+	{0x9f, 0xc7},
+	{0xa0, 0xc8},
+
+	{0xb5, 0x00},
+	{0xb6, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+
+	{0x86, 0x60},
+	{0x87, 0x08},
+	{0x88, 0x00},
+	{0x89, 0x00},
+	{0x8b, 0xde},
+	{0x8c, 0x80},
+	{0x8d, 0x00},
+	{0x8e, 0x00},
+
+	{0x94, 0x55},
+	{0x99, 0xa6},
+	{0x9e, 0xaa},
+	{0xa3, 0x0a},
+	{0x8a, 0x0a},
+	{0xa8, 0x55},
+	{0xad, 0x55},
+	{0xb2, 0x55},
+	{0xb7, 0x05},
+	{0x8f, 0x05},
+
+	{0xb8, 0xcc},
+	{0xb9, 0x9a},
+	/*CC*/
+	{0xfe, 0x01},
+	/*skin white*/
+	{0xd0, 0x38},
+	{0xd1, 0xfd},
+	{0xd2, 0x06},
+	{0xd3, 0xf0},
+	{0xd4, 0x40},
+	{0xd5, 0x08},
+
+	{0xd6, 0x30},
+	{0xd7, 0x00},
+	{0xd8, 0x0a},
+	{0xd9, 0x16},
+	{0xda, 0x39},
+	{0xdb, 0xf8},
+
+	/*LSC*/
+	{0xfe, 0x01},
+	{0xc1, 0x3c},
+	{0xc2, 0x50},
+	{0xc3, 0x00},
+	{0xc4, 0x40},
+	{0xc5, 0x30},
+	{0xc6, 0x30},
+	{0xc7, 0x10},
+	{0xc8, 0x00},
+	{0xc9, 0x00},
+	{0xdc, 0x20},
+	{0xdd, 0x10},
+	{0xdf, 0x00},
+	{0xde, 0x00},
+
+	/*Histogram*/
+	{0x01, 0x10},
+	{0x0b, 0x31},
+	{0x0e, 0x50},
+	{0x0f, 0x0f},
+	{0x10, 0x6e},
+	{0x12, 0xa0},
+	{0x15, 0x60},
+	{0x16, 0x60},
+	{0x17, 0xe0},
+
+	/*Measure Window*/
+	{0xcc, 0x0c},
+	{0xcd, 0x10},
+	{0xce, 0xa0},
+	{0xcf, 0xe6},
+
+	/*dark sun*/
+	{0x45, 0xf7},
+	{0x46, 0xff},
+	{0x47, 0x15},
+	{0x48, 0x03},
+	{0x4f, 0x60},
+
+	/*banding*/
+	{0xfe, 0x00},
+	{0x05, 0x02},
+	/*HB*/
+	{0x06, 0xd1},
+	{0x07, 0x00},
+	/*VB*/
+	{0x08, 0x22},
+
+	{0xfe, 0x01},
+	/*anti-flicker step [11:8]*/
+	{0x25, 0x00},
+	/*anti-flicker step [7:0]*/
+	{0x26, 0x6a},
+
+	/*exp level 0  20fps*/
+	{0x27, 0x02},
+	{0x28, 0x12},
+	/*exp level 1  12.50fps*/
+	{0x29, 0x02},
+	{0x2a, 0x12},
+	/*7.14fps*/
+	{0x2b, 0x02},
+	{0x2c, 0x12},
+	/*exp level 3  5.55fps*/
+	{0x2d, 0x02},
+	{0x2e, 0x12},
+	{0x3c, 0x20},
+	{0xfe, 0x00},
+
+	/*DVP*/
+	{0xfe, 0x03},
+	{0x01, 0x00},
+	{0x02, 0x00},
+	{0x10, 0x00},
+	{0x15, 0x00},
+	{0xfe, 0x00},
+	{REG_NULL, 0x00},
+};
+
+static const struct gc0312_framesize gc0312_framesizes[] = {
+	{ /* VGA */
+		.width		= 640,
+		.height		= 480,
+		.regs		= gc0312_vga_regs,
+		.max_exp_lines	= 488,
+	}
+};
+
+static const struct gc0312_pixfmt gc0312_formats[] = {
+	{
+		.code = MEDIA_BUS_FMT_YUYV8_2X8,
+	}
+};
+
+static inline struct gc0312 *to_gc0312(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc0312, sd);
+}
+
+/* sensor register write */
+static int gc0312_write(struct i2c_client *client, u8 reg, u8 val)
+{
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+	buf[1] = val;
+
+	msg.addr = client->addr;
+	msg.flags = client->flags;
+	msg.buf = buf;
+	msg.len = sizeof(buf);
+
+	ret = i2c_transfer(client->adapter, &msg, 1);
+	if (ret >= 0)
+		return 0;
+
+	dev_err(&client->dev,
+		"gc0312 write reg(0x%x val:0x%x) failed !\n", reg, val);
+
+	return ret;
+}
+
+/* sensor register read */
+static int gc0312_read(struct i2c_client *client, u8 reg, u8 *val)
+{
+	struct i2c_msg msg[2];
+	u8 buf[1];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+
+	msg[0].addr = client->addr;
+	msg[0].flags = client->flags;
+	msg[0].buf = buf;
+	msg[0].len = sizeof(buf);
+
+	msg[1].addr = client->addr;
+	msg[1].flags = client->flags | I2C_M_RD;
+	msg[1].buf = buf;
+	msg[1].len = 1;
+
+	ret = i2c_transfer(client->adapter, msg, 2);
+	if (ret >= 0) {
+		*val = buf[0];
+		return 0;
+	}
+
+	dev_err(&client->dev,
+		"gc0312 read reg(0x%x val:0x%x) failed !\n", reg, *val);
+
+	return ret;
+}
+
+static int gc0312_write_array(struct i2c_client *client,
+			      const struct sensor_register *regs)
+{
+	int i, ret = 0;
+
+	i = 0;
+	while (regs[i].addr != REG_NULL) {
+		ret = gc0312_write(client, regs[i].addr, regs[i].value);
+		if (ret) {
+			dev_err(&client->dev, "%s failed !\n", __func__);
+			break;
+		}
+
+		i++;
+	}
+
+	return ret;
+}
+
+static void gc0312_get_default_format(struct v4l2_mbus_framefmt *format)
+{
+	format->width = gc0312_framesizes[0].width;
+	format->height = gc0312_framesizes[0].height;
+	format->colorspace = V4L2_COLORSPACE_SRGB;
+	format->code = gc0312_formats[0].code;
+	format->field = V4L2_FIELD_NONE;
+}
+
+static void gc0312_set_streaming(struct gc0312 *gc0312, int on)
+{
+	struct i2c_client *client = gc0312->client;
+	int ret;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	ret = gc0312_write(client, REG_SOFTWARE_STANDBY, on);
+	if (ret)
+		dev_err(&client->dev, "gc0312 soft standby failed\n");
+}
+
+/*
+ * V4L2 subdev video and pad level operations
+ */
+
+static int gc0312_enum_mbus_code(struct v4l2_subdev *sd,
+				 struct v4l2_subdev_pad_config *cfg,
+				 struct v4l2_subdev_mbus_code_enum *code)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (code->index >= ARRAY_SIZE(gc0312_formats))
+		return -EINVAL;
+
+	code->code = gc0312_formats[code->index].code;
+
+	return 0;
+}
+
+static int gc0312_enum_frame_sizes(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i = ARRAY_SIZE(gc0312_formats);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (fse->index >= ARRAY_SIZE(gc0312_framesizes))
+		return -EINVAL;
+
+	while (--i)
+		if (fse->code == gc0312_formats[i].code)
+			break;
+
+	fse->code = gc0312_formats[i].code;
+
+	fse->min_width  = gc0312_framesizes[fse->index].width;
+	fse->max_width  = fse->min_width;
+	fse->max_height = gc0312_framesizes[fse->index].height;
+	fse->min_height = fse->max_height;
+
+	return 0;
+}
+
+static int gc0312_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0312 *gc0312 = to_gc0312(sd);
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		struct v4l2_mbus_framefmt *mf;
+
+		mf = v4l2_subdev_get_try_format(sd, cfg, 0);
+		mutex_lock(&gc0312->lock);
+		fmt->format = *mf;
+		mutex_unlock(&gc0312->lock);
+		return 0;
+#else
+	return -ENOTTY;
+#endif
+	}
+
+	mutex_lock(&gc0312->lock);
+	fmt->format = gc0312->format;
+	mutex_unlock(&gc0312->lock);
+
+	dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
+		gc0312->format.code, gc0312->format.width,
+		gc0312->format.height);
+
+	return 0;
+}
+
+static void __gc0312_try_frame_size(struct v4l2_mbus_framefmt *mf,
+				    const struct gc0312_framesize **size)
+{
+	const struct gc0312_framesize *fsize = &gc0312_framesizes[0];
+	const struct gc0312_framesize *match = NULL;
+	int i = ARRAY_SIZE(gc0312_framesizes);
+	unsigned int min_err = UINT_MAX;
+
+	while (i--) {
+		int err = abs(fsize->width - mf->width)
+				+ abs(fsize->height - mf->height);
+		if (err < min_err && fsize->regs[0].addr) {
+			min_err = err;
+			match = fsize;
+		}
+		fsize++;
+	}
+
+	if (!match)
+		match = &gc0312_framesizes[0];
+
+	mf->width  = match->width;
+	mf->height = match->height;
+
+	if (size)
+		*size = match;
+}
+
+static int gc0312_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int index = ARRAY_SIZE(gc0312_formats);
+	struct v4l2_mbus_framefmt *mf = &fmt->format;
+	const struct gc0312_framesize *size = NULL;
+	struct gc0312 *gc0312 = to_gc0312(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	__gc0312_try_frame_size(mf, &size);
+
+	while (--index >= 0)
+		if (gc0312_formats[index].code == mf->code)
+			break;
+
+	if (index < 0)
+		return -EINVAL;
+
+	mf->colorspace = V4L2_COLORSPACE_SRGB;
+	mf->code = gc0312_formats[index].code;
+	mf->field = V4L2_FIELD_NONE;
+
+	mutex_lock(&gc0312->lock);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+		*mf = fmt->format;
+#else
+		return -ENOTTY;
+#endif
+	} else {
+		if (gc0312->streaming) {
+			mutex_unlock(&gc0312->lock);
+			return -EBUSY;
+		}
+
+		gc0312->frame_size = size;
+		gc0312->format = fmt->format;
+	}
+
+	mutex_unlock(&gc0312->lock);
+	return ret;
+}
+
+static int gc0312_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0312 *gc0312 = to_gc0312(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	mutex_lock(&gc0312->lock);
+
+	on = !!on;
+
+	if (gc0312->streaming == on)
+		goto unlock;
+
+	if (!on) {
+		/* Stop Streaming Sequence */
+		gc0312_set_streaming(gc0312, 0x00);
+		gc0312->streaming = on;
+		goto unlock;
+	}
+
+	ret = gc0312_write_array(client, gc0312->frame_size->regs);
+	if (ret)
+		goto unlock;
+
+	gc0312_set_streaming(gc0312, 0xFF);
+	gc0312->streaming = on;
+
+unlock:
+	mutex_unlock(&gc0312->lock);
+	return ret;
+}
+
+static int gc0312_set_test_pattern(struct gc0312 *gc0312, int value)
+{
+	return 0;
+}
+
+static int gc0312_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct gc0312 *gc0312 =
+			container_of(ctrl->handler, struct gc0312, ctrls);
+
+	switch (ctrl->id) {
+	case V4L2_CID_TEST_PATTERN:
+		return gc0312_set_test_pattern(gc0312, ctrl->val);
+	}
+
+	return 0;
+}
+
+static const struct v4l2_ctrl_ops gc0312_ctrl_ops = {
+	.s_ctrl = gc0312_s_ctrl,
+};
+
+static const char * const gc0312_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bars",
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev internal operations
+ */
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int gc0312_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct v4l2_mbus_framefmt *format =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	gc0312_get_default_format(format);
+
+	return 0;
+}
+#endif
+
+static int gc0312_g_mbus_config(struct v4l2_subdev *sd,
+				struct v4l2_mbus_config *config)
+{
+	config->type = V4L2_MBUS_PARALLEL;
+	config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_VSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_PCLK_SAMPLE_RISING;
+
+	return 0;
+}
+
+static const struct v4l2_subdev_core_ops gc0312_subdev_core_ops = {
+	.log_status = v4l2_ctrl_subdev_log_status,
+	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static const struct v4l2_subdev_video_ops gc0312_subdev_video_ops = {
+	.s_stream = gc0312_s_stream,
+	.g_mbus_config = gc0312_g_mbus_config,
+};
+
+static const struct v4l2_subdev_pad_ops gc0312_subdev_pad_ops = {
+	.enum_mbus_code = gc0312_enum_mbus_code,
+	.enum_frame_size = gc0312_enum_frame_sizes,
+	.get_fmt = gc0312_get_fmt,
+	.set_fmt = gc0312_set_fmt,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_ops gc0312_subdev_ops = {
+	.core  = &gc0312_subdev_core_ops,
+	.video = &gc0312_subdev_video_ops,
+	.pad   = &gc0312_subdev_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops gc0312_subdev_internal_ops = {
+	.open = gc0312_open,
+};
+#endif
+
+static int gc0312_detect(struct v4l2_subdev *sd)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	u8 pid, ver;
+	int ret;
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	/* Check sensor revision */
+	ret = gc0312_read(client, REG_SC_CHIP_ID_H, &pid);
+	if (!ret)
+		ret = gc0312_read(client, REG_SC_CHIP_ID_L, &ver);
+
+	if (!ret) {
+		unsigned short id;
+
+		id = SENSOR_ID(pid, ver);
+		if (id != GC0312_ID) {
+			ret = -1;
+			dev_err(&client->dev,
+				"Sensor detection failed (%04X, %d)\n",
+				id, ret);
+		} else {
+			dev_info(&client->dev, "Found GC%04X sensor\n", id);
+		}
+	}
+
+	return ret;
+}
+
+static int __gc0312_power_on(struct gc0312 *gc0312)
+{
+	int ret;
+	struct device *dev = &gc0312->client->dev;
+
+	ret = clk_set_rate(gc0312->xvclk, 24000000);
+	if (ret < 0)
+		dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+
+	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
+	usleep_range(2000, 5000);
+
+	ret = regulator_bulk_enable(GC0312_NUM_SUPPLIES, gc0312->supplies);
+	if (ret < 0)
+		dev_info(dev, "Failed to enable regulators\n");
+
+	usleep_range(20000, 50000);
+
+	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
+	usleep_range(2000, 5000);
+
+	ret = clk_prepare_enable(gc0312->xvclk);
+	if (ret < 0)
+		dev_info(dev, "Failed to enable xvclk\n");
+
+	usleep_range(70000, 100000);
+
+	return 0;
+}
+
+static void __gc0312_power_off(struct gc0312 *gc0312)
+{
+	clk_disable_unprepare(gc0312->xvclk);
+	regulator_bulk_disable(GC0312_NUM_SUPPLIES, gc0312->supplies);
+	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
+}
+
+static int gc0312_configure_regulators(struct gc0312 *gc0312)
+{
+	unsigned int i;
+
+	for (i = 0; i < GC0312_NUM_SUPPLIES; i++)
+		gc0312->supplies[i].supply = gc0312_supply_names[i];
+
+	return devm_regulator_bulk_get(&gc0312->client->dev,
+				       GC0312_NUM_SUPPLIES,
+				       gc0312->supplies);
+}
+
+static int gc0312_parse_of(struct gc0312 *gc0312)
+{
+	struct device *dev = &gc0312->client->dev;
+	int ret;
+
+	gc0312->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(gc0312->pwdn_gpio)) {
+		dev_info(dev, "Failed to get pwdn-gpios\n");
+		return 0;
+	}
+
+	ret = gc0312_configure_regulators(gc0312);
+	if (ret)
+		dev_info(dev, "Failed to get power regulators\n");
+
+	return __gc0312_power_on(gc0312);
+}
+
+static int gc0312_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct v4l2_subdev *sd;
+	struct gc0312 *gc0312;
+	int ret;
+
+	gc0312 = devm_kzalloc(&client->dev, sizeof(*gc0312), GFP_KERNEL);
+	if (!gc0312)
+		return -ENOMEM;
+
+	gc0312->client = client;
+	gc0312->xvclk = devm_clk_get(&client->dev, "xvclk");
+	if (IS_ERR(gc0312->xvclk)) {
+		dev_err(&client->dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+
+	gc0312_parse_of(gc0312);
+
+	gc0312->xvclk_frequency = clk_get_rate(gc0312->xvclk);
+	if (gc0312->xvclk_frequency < 6000000 ||
+	    gc0312->xvclk_frequency > 27000000)
+		return -EINVAL;
+
+	v4l2_ctrl_handler_init(&gc0312->ctrls, 2);
+	gc0312->link_frequency =
+			v4l2_ctrl_new_std(&gc0312->ctrls, &gc0312_ctrl_ops,
+					  V4L2_CID_PIXEL_RATE, 0,
+					  GC0312_PIXEL_RATE, 1,
+					  GC0312_PIXEL_RATE);
+
+	v4l2_ctrl_new_std_menu_items(&gc0312->ctrls, &gc0312_ctrl_ops,
+				     V4L2_CID_TEST_PATTERN,
+				     ARRAY_SIZE(gc0312_test_pattern_menu) - 1,
+				     0, 0, gc0312_test_pattern_menu);
+	gc0312->sd.ctrl_handler = &gc0312->ctrls;
+
+	if (gc0312->ctrls.error) {
+		dev_err(&client->dev, "%s: control initialization error %d\n",
+			__func__, gc0312->ctrls.error);
+		return  gc0312->ctrls.error;
+	}
+
+	sd = &gc0312->sd;
+	client->flags |= I2C_CLIENT_SCCB;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	v4l2_i2c_subdev_init(sd, client, &gc0312_subdev_ops);
+
+	sd->internal_ops = &gc0312_subdev_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+		     V4L2_SUBDEV_FL_HAS_EVENTS;
+#endif
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	gc0312->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &gc0312->pad, 0);
+	if (ret < 0) {
+		v4l2_ctrl_handler_free(&gc0312->ctrls);
+		return ret;
+	}
+#endif
+
+	mutex_init(&gc0312->lock);
+
+	gc0312_get_default_format(&gc0312->format);
+	gc0312->frame_size = &gc0312_framesizes[0];
+
+	ret = gc0312_detect(sd);
+	if (ret < 0)
+		goto error;
+
+	ret = v4l2_async_register_subdev(&gc0312->sd);
+	if (ret)
+		goto error;
+
+	dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
+
+	return 0;
+
+error:
+	v4l2_ctrl_handler_free(&gc0312->ctrls);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc0312->lock);
+	__gc0312_power_off(gc0312);
+	return ret;
+}
+
+static int gc0312_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc0312 *gc0312 = to_gc0312(sd);
+
+	v4l2_ctrl_handler_free(&gc0312->ctrls);
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc0312->lock);
+
+	__gc0312_power_off(gc0312);
+
+	return 0;
+}
+
+static const struct i2c_device_id gc0312_id[] = {
+	{ "gc0312", 0 },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(i2c, gc0312_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id gc0312_of_match[] = {
+	{ .compatible = "galaxycore,gc0312", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, gc0312_of_match);
+#endif
+
+static struct i2c_driver gc0312_i2c_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.of_match_table = of_match_ptr(gc0312_of_match),
+	},
+	.probe		= gc0312_probe,
+	.remove		= gc0312_remove,
+	.id_table	= gc0312_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&gc0312_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&gc0312_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_AUTHOR("Benoit Parrot <bparrot@ti.com>");
+MODULE_DESCRIPTION("GC0312 CMOS Image Sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c
new file mode 100644
index 0000000000000..6d8f2dd3b90db
--- /dev/null
+++ b/drivers/media/i2c/gc2145.c
@@ -0,0 +1,1583 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * GC2145 CMOS Image Sensor driver
+ *
+ * Copyright (C) 2015 Texas Instruments, Inc.
+ *
+ * Benoit Parrot <bparrot@ti.com>
+ * Lad, Prabhakar <prabhakar.csengg@gmail.com>
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/media.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/videodev2.h>
+
+#include <media/media-entity.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+#define DRIVER_NAME "gc2145"
+#define GC2145_PIXEL_RATE		(120 * 1000 * 1000)
+
+/*
+ * GC2145 register definitions
+ */
+#define REG_SOFTWARE_STANDBY		0xf2
+
+#define REG_SC_CHIP_ID_H		0xf0
+#define REG_SC_CHIP_ID_L		0xf1
+
+#define REG_NULL			0xFFFF	/* Array end token */
+
+#define SENSOR_ID(_msb, _lsb)		((_msb) << 8 | (_lsb))
+#define GC2145_ID			0x2145
+
+struct sensor_register {
+	u16 addr;
+	u8 value;
+};
+
+struct gc2145_framesize {
+	u16 width;
+	u16 height;
+	u16 max_exp_lines;
+	const struct sensor_register *regs;
+};
+
+struct gc2145_pll_ctrl {
+	u8 ctrl1;
+	u8 ctrl2;
+	u8 ctrl3;
+};
+
+struct gc2145_pixfmt {
+	u32 code;
+	/* Output format Register Value (REG_FORMAT_CTRL00) */
+	struct sensor_register *format_ctrl_regs;
+};
+
+struct pll_ctrl_reg {
+	unsigned int div;
+	unsigned char reg;
+};
+
+static const char * const gc2145_supply_names[] = {
+	"dovdd",	/* Digital I/O power */
+	"avdd",		/* Analog power */
+	"dvdd",		/* Digital core power */
+};
+
+#define GC2145_NUM_SUPPLIES ARRAY_SIZE(gc2145_supply_names)
+
+struct gc2145 {
+	struct v4l2_subdev sd;
+	struct media_pad pad;
+	struct v4l2_mbus_framefmt format;
+	unsigned int xvclk_frequency;
+	struct clk *xvclk;
+	struct gpio_desc *pwdn_gpio;
+	struct regulator_bulk_data supplies[GC2145_NUM_SUPPLIES];
+	struct mutex lock;
+	struct i2c_client *client;
+	struct v4l2_ctrl_handler ctrls;
+	struct v4l2_ctrl *link_frequency;
+	const struct gc2145_framesize *frame_size;
+	int streaming;
+};
+
+static const struct sensor_register gc2145_init_regs[] = {
+	{0xfe, 0xf0},
+	{0xfe, 0xf0},
+	{0xfe, 0xf0},
+	{0xfc, 0x06},
+	{0xf6, 0x00},
+	{0xf7, 0x1d},
+	{0xf8, 0x84},
+	{0xfa, 0x00},
+	{0xf9, 0xfe},
+	{0xf2, 0x00},
+	/*ISP reg*/
+	{0xfe, 0x00},
+	{0x03, 0x04},
+	{0x04, 0xe2},
+	{0x09, 0x00},
+	{0x0a, 0x00},
+	{0x0b, 0x00},
+	{0x0c, 0x00},
+	{0x0d, 0x04},
+	{0x0e, 0xc0},
+	{0x0f, 0x06},
+	{0x10, 0x52},
+	{0x12, 0x2e},
+	{0x17, 0x14},
+	{0x18, 0x22},
+	{0x19, 0x0e},
+	{0x1a, 0x01},
+	{0x1b, 0x4b},
+	{0x1c, 0x07},
+	{0x1d, 0x10},
+	{0x1e, 0x88},
+	{0x1f, 0x78},
+	{0x20, 0x03},
+	{0x21, 0x40},
+	{0x22, 0xa0},
+	{0x24, 0x16},
+	{0x25, 0x01},
+	{0x26, 0x10},
+	{0x2d, 0x60},
+	{0x30, 0x01},
+	{0x31, 0x90},
+	{0x33, 0x06},
+	{0x34, 0x01},
+	{0xfe, 0x00},
+	{0x80, 0x7f},
+	{0x81, 0x26},
+	{0x82, 0xfa},
+	{0x83, 0x00},
+	{0x84, 0x00},
+	{0x86, 0x02},
+	{0x88, 0x03},
+	{0x89, 0x03},
+	{0x85, 0x08},
+	{0x8a, 0x00},
+	{0x8b, 0x00},
+	{0xb0, 0x55},
+	{0xc3, 0x00},
+	{0xc4, 0x80},
+	{0xc5, 0x90},
+	{0xc6, 0x3b},
+	{0xc7, 0x46},
+	{0xec, 0x06},
+	{0xed, 0x04},
+	{0xee, 0x60},
+	{0xef, 0x90},
+	{0xb6, 0x01},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	/*BLK*/
+	{0xfe, 0x00},
+	{0x40, 0x42},
+	{0x41, 0x00},
+	{0x43, 0x5b},
+	{0x5e, 0x00},
+	{0x5f, 0x00},
+	{0x60, 0x00},
+	{0x61, 0x00},
+	{0x62, 0x00},
+	{0x63, 0x00},
+	{0x64, 0x00},
+	{0x65, 0x00},
+	{0x66, 0x20},
+	{0x67, 0x20},
+	{0x68, 0x20},
+	{0x69, 0x20},
+	{0x76, 0x00},
+	{0x6a, 0x08},
+	{0x6b, 0x08},
+	{0x6c, 0x08},
+	{0x6d, 0x08},
+	{0x6e, 0x08},
+	{0x6f, 0x08},
+	{0x70, 0x08},
+	{0x71, 0x08},
+	{0x76, 0x00},
+	{0x72, 0xf0},
+	{0x7e, 0x3c},
+	{0x7f, 0x00},
+	{0xfe, 0x02},
+	{0x48, 0x15},
+	{0x49, 0x00},
+	{0x4b, 0x0b},
+	{0xfe, 0x00},
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0xc0},
+	{0x03, 0x04},
+	{0x04, 0x90},
+	{0x05, 0x30},
+	{0x06, 0x90},
+	{0x07, 0x30},
+	{0x08, 0x80},
+	{0x09, 0x00},
+	{0x0a, 0x82},
+	{0x0b, 0x11},
+	{0x0c, 0x10},
+	{0x11, 0x10},
+	{0x13, 0x7b},
+	{0x17, 0x00},
+	{0x1c, 0x11},
+	{0x1e, 0x61},
+	{0x1f, 0x35},
+	{0x20, 0x40},
+	{0x22, 0x40},
+	{0x23, 0x20},
+	{0xfe, 0x02},
+	{0x0f, 0x04},
+	{0xfe, 0x01},
+	{0x12, 0x35},
+	{0x15, 0xb0},
+	{0x10, 0x31},
+	{0x3e, 0x28},
+	{0x3f, 0xb0},
+	{0x40, 0x90},
+	{0x41, 0x0f},
+
+	/*INTPEE*/
+	{0xfe, 0x02},
+	{0x90, 0x6c},
+	{0x91, 0x03},
+	{0x92, 0xcb},
+	{0x94, 0x33},
+	{0x95, 0x84},
+	{0x97, 0x45},
+	{0xa2, 0x11},
+	{0xfe, 0x00},
+	/*DNDD*/
+	{0xfe, 0x02},
+	{0x80, 0xc1},
+	{0x81, 0x08},
+	{0x82, 0x1f},
+	{0x83, 0x10},
+	{0x84, 0x0a},
+	{0x86, 0xf0},
+	{0x87, 0x50},
+	{0x88, 0x15},
+	{0x89, 0xb0},
+	{0x8a, 0x30},
+	{0x8b, 0x10},
+	/*ASDE*/
+	{0xfe, 0x01},
+	{0x21, 0x04},
+	{0xfe, 0x02},
+	{0xa3, 0x50},
+	{0xa4, 0x20},
+	{0xa5, 0x40},
+	{0xa6, 0x80},
+	{0xab, 0x40},
+	{0xae, 0x0c},
+	{0xb3, 0x46},
+	{0xb4, 0x64},
+	{0xb6, 0x38},
+	{0xb7, 0x01},
+	{0xb9, 0x2b},
+	{0x3c, 0x04},
+	{0x3d, 0x15},
+	{0x4b, 0x06},
+	{0x4c, 0x20},
+	{0xfe, 0x00},
+	/*GAMMA*/
+	/*gamma1*/
+#if 1
+	{0xfe, 0x02},
+	{0x10, 0x09},
+	{0x11, 0x0d},
+	{0x12, 0x13},
+	{0x13, 0x19},
+	{0x14, 0x27},
+	{0x15, 0x37},
+	{0x16, 0x45},
+	{0x17, 0x53},
+	{0x18, 0x69},
+	{0x19, 0x7d},
+	{0x1a, 0x8f},
+	{0x1b, 0x9d},
+	{0x1c, 0xa9},
+	{0x1d, 0xbd},
+	{0x1e, 0xcd},
+	{0x1f, 0xd9},
+	{0x20, 0xe3},
+	{0x21, 0xea},
+	{0x22, 0xef},
+	{0x23, 0xf5},
+	{0x24, 0xf9},
+	{0x25, 0xff},
+#else
+	{0xfe, 0x02},
+	{0x10, 0x0a},
+	{0x11, 0x12},
+	{0x12, 0x19},
+	{0x13, 0x1f},
+	{0x14, 0x2c},
+	{0x15, 0x38},
+	{0x16, 0x42},
+	{0x17, 0x4e},
+	{0x18, 0x63},
+	{0x19, 0x76},
+	{0x1a, 0x87},
+	{0x1b, 0x96},
+	{0x1c, 0xa2},
+	{0x1d, 0xb8},
+	{0x1e, 0xcb},
+	{0x1f, 0xd8},
+	{0x20, 0xe2},
+	{0x21, 0xe9},
+	{0x22, 0xf0},
+	{0x23, 0xf8},
+	{0x24, 0xfd},
+	{0x25, 0xff},
+	{0xfe, 0x00},
+#endif
+	{0xfe, 0x00},
+	{0xc6, 0x20},
+	{0xc7, 0x2b},
+	/*gamma2*/
+#if 1
+	{0xfe, 0x02},
+	{0x26, 0x0f},
+	{0x27, 0x14},
+	{0x28, 0x19},
+	{0x29, 0x1e},
+	{0x2a, 0x27},
+	{0x2b, 0x33},
+	{0x2c, 0x3b},
+	{0x2d, 0x45},
+	{0x2e, 0x59},
+	{0x2f, 0x69},
+	{0x30, 0x7c},
+	{0x31, 0x89},
+	{0x32, 0x98},
+	{0x33, 0xae},
+	{0x34, 0xc0},
+	{0x35, 0xcf},
+	{0x36, 0xda},
+	{0x37, 0xe2},
+	{0x38, 0xe9},
+	{0x39, 0xf3},
+	{0x3a, 0xf9},
+	{0x3b, 0xff},
+#else
+	/*Gamma outdoor*/
+	{0xfe, 0x02},
+	{0x26, 0x17},
+	{0x27, 0x18},
+	{0x28, 0x1c},
+	{0x29, 0x20},
+	{0x2a, 0x28},
+	{0x2b, 0x34},
+	{0x2c, 0x40},
+	{0x2d, 0x49},
+	{0x2e, 0x5b},
+	{0x2f, 0x6d},
+	{0x30, 0x7d},
+	{0x31, 0x89},
+	{0x32, 0x97},
+	{0x33, 0xac},
+	{0x34, 0xc0},
+	{0x35, 0xcf},
+	{0x36, 0xda},
+	{0x37, 0xe5},
+	{0x38, 0xec},
+	{0x39, 0xf8},
+	{0x3a, 0xfd},
+	{0x3b, 0xff},
+#endif
+	/*YCP*/
+	{0xfe, 0x02},
+	{0xd1, 0x40},
+	{0xd2, 0x40},
+	{0xd3, 0x48},
+	{0xd6, 0xf0},
+	{0xd7, 0x10},
+	{0xd8, 0xda},
+	{0xdd, 0x14},
+	{0xde, 0x86},
+	{0xed, 0x80},
+	{0xee, 0x00},
+	{0xef, 0x3f},
+	{0xd8, 0xd8},
+	/*abs*/
+	{0xfe, 0x01},
+	{0x9f, 0x40},
+	/*LSC*/
+	{0xfe, 0x01},
+	{0xc2, 0x14},
+	{0xc3, 0x0d},
+	{0xc4, 0x0c},
+	{0xc8, 0x15},
+	{0xc9, 0x0d},
+	{0xca, 0x0a},
+	{0xbc, 0x24},
+	{0xbd, 0x10},
+	{0xbe, 0x0b},
+	{0xb6, 0x25},
+	{0xb7, 0x16},
+	{0xb8, 0x15},
+	{0xc5, 0x00},
+	{0xc6, 0x00},
+	{0xc7, 0x00},
+	{0xcb, 0x00},
+	{0xcc, 0x00},
+	{0xcd, 0x00},
+	{0xbf, 0x07},
+	{0xc0, 0x00},
+	{0xc1, 0x00},
+	{0xb9, 0x00},
+	{0xba, 0x00},
+	{0xbb, 0x00},
+	{0xaa, 0x01},
+	{0xab, 0x01},
+	{0xac, 0x00},
+	{0xad, 0x05},
+	{0xae, 0x06},
+	{0xaf, 0x0e},
+	{0xb0, 0x0b},
+	{0xb1, 0x07},
+	{0xb2, 0x06},
+	{0xb3, 0x17},
+	{0xb4, 0x0e},
+	{0xb5, 0x0e},
+	{0xd0, 0x09},
+	{0xd1, 0x00},
+	{0xd2, 0x00},
+	{0xd6, 0x08},
+	{0xd7, 0x00},
+	{0xd8, 0x00},
+	{0xd9, 0x00},
+	{0xda, 0x00},
+	{0xdb, 0x00},
+	{0xd3, 0x0a},
+	{0xd4, 0x00},
+	{0xd5, 0x00},
+	{0xa4, 0x00},
+	{0xa5, 0x00},
+	{0xa6, 0x77},
+	{0xa7, 0x77},
+	{0xa8, 0x77},
+	{0xa9, 0x77},
+	{0xa1, 0x80},
+	{0xa2, 0x80},
+
+	{0xfe, 0x01},
+	{0xdf, 0x0d},
+	{0xdc, 0x25},
+	{0xdd, 0x30},
+	{0xe0, 0x77},
+	{0xe1, 0x80},
+	{0xe2, 0x77},
+	{0xe3, 0x90},
+	{0xe6, 0x90},
+	{0xe7, 0xa0},
+	{0xe8, 0x90},
+	{0xe9, 0xa0},
+	{0xfe, 0x00},
+	/*AWB*/
+	{0xfe, 0x01},
+	{0x4f, 0x00},
+	{0x4f, 0x00},
+	{0x4b, 0x01},
+	{0x4f, 0x00},
+
+	{0x4c, 0x01},
+	{0x4d, 0x71},
+	{0x4e, 0x01},
+	{0x4c, 0x01},
+	{0x4d, 0x91},
+	{0x4e, 0x01},
+	{0x4c, 0x01},
+	{0x4d, 0x70},
+	{0x4e, 0x01},
+	{0x4c, 0x01},
+	{0x4d, 0x90},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xb0},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x8f},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x6f},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xaf},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xd0},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xf0},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xcf},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0xef},
+	{0x4e, 0x02},
+	{0x4c, 0x01},
+	{0x4d, 0x6e},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8e},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xae},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xce},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8d},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xad},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xcd},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8c},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xac},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xcc},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xcb},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x4b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x6b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8b},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0xab},
+	{0x4e, 0x03},
+	{0x4c, 0x01},
+	{0x4d, 0x8a},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xaa},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xca},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xca},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xc9},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0x8a},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0x89},
+	{0x4e, 0x04},
+	{0x4c, 0x01},
+	{0x4d, 0xa9},
+	{0x4e, 0x04},
+	{0x4c, 0x02},
+	{0x4d, 0x0b},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x0a},
+	{0x4e, 0x05},
+	{0x4c, 0x01},
+	{0x4d, 0xeb},
+	{0x4e, 0x05},
+	{0x4c, 0x01},
+	{0x4d, 0xea},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x09},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x29},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x2a},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x4a},
+	{0x4e, 0x05},
+	{0x4c, 0x02},
+	{0x4d, 0x8a},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x49},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x69},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x89},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0xa9},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x48},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x68},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0x69},
+	{0x4e, 0x06},
+	{0x4c, 0x02},
+	{0x4d, 0xca},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xc9},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xe9},
+	{0x4e, 0x07},
+	{0x4c, 0x03},
+	{0x4d, 0x09},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xc8},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xe8},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xa7},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xc7},
+	{0x4e, 0x07},
+	{0x4c, 0x02},
+	{0x4d, 0xe7},
+	{0x4e, 0x07},
+	{0x4c, 0x03},
+	{0x4d, 0x07},
+	{0x4e, 0x07},
+
+	{0x4f, 0x01},
+	{0x50, 0x80},
+	{0x51, 0xa8},
+	{0x52, 0x47},
+	{0x53, 0x38},
+	{0x54, 0xc7},
+	{0x56, 0x0e},
+	{0x58, 0x08},
+	{0x5b, 0x00},
+	{0x5c, 0x74},
+	{0x5d, 0x8b},
+	{0x61, 0xdb},
+	{0x62, 0xb8},
+	{0x63, 0x86},
+	{0x64, 0xc0},
+	{0x65, 0x04},
+	{0x67, 0xa8},
+	{0x68, 0xb0},
+	{0x69, 0x00},
+	{0x6a, 0xa8},
+	{0x6b, 0xb0},
+	{0x6c, 0xaf},
+	{0x6d, 0x8b},
+	{0x6e, 0x50},
+	{0x6f, 0x18},
+	{0x73, 0xf0},
+	{0x70, 0x0d},
+	{0x71, 0x60},
+	{0x72, 0x80},
+	{0x74, 0x01},
+	{0x75, 0x01},
+	{0x7f, 0x0c},
+	{0x76, 0x70},
+	{0x77, 0x58},
+	{0x78, 0xa0},
+	{0x79, 0x5e},
+	{0x7a, 0x54},
+	{0x7b, 0x58},
+	{0xfe, 0x00},
+	/*CC*/
+	{0xfe, 0x02},
+	{0xc0, 0x01},
+	{0xc1, 0x44},
+	{0xc2, 0xfd},
+	{0xc3, 0x04},
+	{0xc4, 0xF0},
+	{0xc5, 0x48},
+	{0xc6, 0xfd},
+	{0xc7, 0x46},
+	{0xc8, 0xfd},
+	{0xc9, 0x02},
+	{0xca, 0xe0},
+	{0xcb, 0x45},
+	{0xcc, 0xec},
+	{0xcd, 0x48},
+	{0xce, 0xf0},
+	{0xcf, 0xf0},
+	{0xe3, 0x0c},
+	{0xe4, 0x4b},
+	{0xe5, 0xe0},
+	/*ABS*/
+	{0xfe, 0x01},
+	{0x9f, 0x40},
+	{0xfe, 0x00},
+	/*OUTPUT*/
+	{0xfe, 0x00},
+	{0xf2, 0x0f},
+	/*dark sun*/
+	{0xfe, 0x02},
+	{0x40, 0xbf},
+	{0x46, 0xcf},
+	{0xfe, 0x00},
+
+	/*frame rate 50Hz*/
+	{0xfe, 0x00},
+	{0x05, 0x01},
+	{0x06, 0x56},
+	{0x07, 0x00},
+	{0x08, 0x32},
+	{0xfe, 0x01},
+	{0x25, 0x00},
+	{0x26, 0xfa},
+
+	{0x27, 0x04},
+	{0x28, 0xe2},
+	{0x29, 0x04},
+	{0x2a, 0xe2},
+	{0x2b, 0x04},
+	{0x2c, 0xe2},
+	{0x2d, 0x04},
+	{0x2e, 0xe2},
+	{0xfe, 0x00},
+
+	{0xfe, 0x00},
+	{0xfd, 0x01},
+	{0xfa, 0x00},
+	/*crop window*/
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	/*AWB*/
+	{0xfe, 0x00},
+	{0xec, 0x02},
+	{0xed, 0x02},
+	{0xee, 0x30},
+	{0xef, 0x48},
+	{0xfe, 0x02},
+	{0x9d, 0x08},
+	{0xfe, 0x01},
+	{0x74, 0x00},
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0x60},
+	{0x03, 0x02},
+	{0x04, 0x48},
+	{0x05, 0x18},
+	{0x06, 0x50},
+	{0x07, 0x10},
+	{0x08, 0x38},
+	{0x0a, 0x80},
+	{0x21, 0x04},
+	{0xfe, 0x00},
+	{0x20, 0x03},
+	{0xfe, 0x00},
+	{REG_NULL, 0x00},
+};
+
+/* Senor full resolution setting */
+static const struct sensor_register gc2145_full_regs[] = {
+	{0xfe, 0x00},
+	{0xfd, 0x00},
+	{0xfa, 0x00},
+	/*crop window*/
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	/*AWB*/
+	{0xfe, 0x00},
+	{0xec, 0x06},
+	{0xed, 0x04},
+	{0xee, 0x60},
+	{0xef, 0x90},
+	{0xfe, 0x01},
+	{0x74, 0x01},
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0xc0},
+	{0x03, 0x04},
+	{0x04, 0x90},
+	{0x05, 0x30},
+	{0x06, 0x90},
+	{0x07, 0x30},
+	{0x08, 0x80},
+	{0x0a, 0x82},
+	{0xfe, 0x01},
+	{0x21, 0x04},
+	{0xfe, 0x00},
+	{0x20, 0x15},
+	{0xfe, 0x00},
+	{REG_NULL, 0x00},
+};
+
+/* Preview resolution setting*/
+static const struct sensor_register gc2145_svga_regs[] = {
+	{0xfe, 0x00},
+	{0xb6, 0x01},
+	{0xfd, 0x01},
+	{0xfa, 0x00},
+	/*crop window*/
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	/*AWB*/
+	{0xfe, 0x00},
+	{0xec, 0x02},
+	{0xed, 0x02},
+	{0xee, 0x30},
+	{0xef, 0x48},
+	{0xfe, 0x02},
+	{0x9d, 0x08},
+	{0xfe, 0x01},
+	{0x74, 0x00},
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0x60},
+	{0x03, 0x02},
+	{0x04, 0x48},
+	{0x05, 0x18},
+	{0x06, 0x50},
+	{0x07, 0x10},
+	{0x08, 0x38},
+	{0x0a, 0x80},
+	{0x21, 0x04},
+	{0xfe, 0x00},
+	{0x20, 0x03},
+	{0xfe, 0x00},
+	{REG_NULL, 0x00},
+};
+
+static const struct gc2145_framesize gc2145_framesizes[] = {
+	{ /* SVGA */
+		.width		= 800,
+		.height		= 600,
+		.regs		= gc2145_svga_regs,
+		.max_exp_lines	= 608,
+	}, { /* FULL */
+		.width		= 1600,
+		.height		= 1200,
+		.regs		= gc2145_full_regs,
+		.max_exp_lines	= 1208,
+	}
+};
+
+static const struct gc2145_pixfmt gc2145_formats[] = {
+	{
+		.code = MEDIA_BUS_FMT_UYVY8_2X8,
+	}
+};
+
+static inline struct gc2145 *to_gc2145(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc2145, sd);
+}
+
+/* sensor register write */
+static int gc2145_write(struct i2c_client *client, u8 reg, u8 val)
+{
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+	buf[1] = val;
+
+	msg.addr = client->addr;
+	msg.flags = client->flags;
+	msg.buf = buf;
+	msg.len = sizeof(buf);
+
+	ret = i2c_transfer(client->adapter, &msg, 1);
+	if (ret >= 0)
+		return 0;
+
+	dev_err(&client->dev,
+		"gc2145 write reg(0x%x val:0x%x) failed !\n", reg, val);
+
+	return ret;
+}
+
+/* sensor register read */
+static int gc2145_read(struct i2c_client *client, u8 reg, u8 *val)
+{
+	struct i2c_msg msg[2];
+	u8 buf[1];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+
+	msg[0].addr = client->addr;
+	msg[0].flags = client->flags;
+	msg[0].buf = buf;
+	msg[0].len = sizeof(buf);
+
+	msg[1].addr = client->addr;
+	msg[1].flags = client->flags | I2C_M_RD;
+	msg[1].buf = buf;
+	msg[1].len = 1;
+
+	ret = i2c_transfer(client->adapter, msg, 2);
+	if (ret >= 0) {
+		*val = buf[0];
+		return 0;
+	}
+
+	dev_err(&client->dev,
+		"gc2145 read reg(0x%x val:0x%x) failed !\n", reg, *val);
+
+	return ret;
+}
+
+static int gc2145_write_array(struct i2c_client *client,
+			      const struct sensor_register *regs)
+{
+	int i, ret = 0;
+
+	i = 0;
+	while (regs[i].addr != REG_NULL) {
+		ret = gc2145_write(client, regs[i].addr, regs[i].value);
+		if (ret) {
+			dev_err(&client->dev, "%s failed !\n", __func__);
+			break;
+		}
+
+		i++;
+	}
+
+	return ret;
+}
+
+static void gc2145_get_default_format(struct v4l2_mbus_framefmt *format)
+{
+	format->width = gc2145_framesizes[0].width;
+	format->height = gc2145_framesizes[0].height;
+	format->colorspace = V4L2_COLORSPACE_SRGB;
+	format->code = gc2145_formats[0].code;
+	format->field = V4L2_FIELD_NONE;
+}
+
+static void gc2145_set_streaming(struct gc2145 *gc2145, int on)
+{
+	struct i2c_client *client = gc2145->client;
+	int ret;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	ret = gc2145_write(client, REG_SOFTWARE_STANDBY, on);
+	if (ret)
+		dev_err(&client->dev, "gc2145 soft standby failed\n");
+}
+
+/*
+ * V4L2 subdev video and pad level operations
+ */
+
+static int gc2145_enum_mbus_code(struct v4l2_subdev *sd,
+				 struct v4l2_subdev_pad_config *cfg,
+				 struct v4l2_subdev_mbus_code_enum *code)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (code->index >= ARRAY_SIZE(gc2145_formats))
+		return -EINVAL;
+
+	code->code = gc2145_formats[code->index].code;
+
+	return 0;
+}
+
+static int gc2145_enum_frame_sizes(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i = ARRAY_SIZE(gc2145_formats);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (fse->index >= ARRAY_SIZE(gc2145_framesizes))
+		return -EINVAL;
+
+	while (--i)
+		if (fse->code == gc2145_formats[i].code)
+			break;
+
+	fse->code = gc2145_formats[i].code;
+
+	fse->min_width  = gc2145_framesizes[fse->index].width;
+	fse->max_width  = fse->min_width;
+	fse->max_height = gc2145_framesizes[fse->index].height;
+	fse->min_height = fse->max_height;
+
+	return 0;
+}
+
+static int gc2145_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2145 *gc2145 = to_gc2145(sd);
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		struct v4l2_mbus_framefmt *mf;
+
+		mf = v4l2_subdev_get_try_format(sd, cfg, 0);
+		mutex_lock(&gc2145->lock);
+		fmt->format = *mf;
+		mutex_unlock(&gc2145->lock);
+		return 0;
+#else
+	return -ENOTTY;
+#endif
+	}
+
+	mutex_lock(&gc2145->lock);
+	fmt->format = gc2145->format;
+	mutex_unlock(&gc2145->lock);
+
+	dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
+		gc2145->format.code, gc2145->format.width,
+		gc2145->format.height);
+
+	return 0;
+}
+
+static void __gc2145_try_frame_size(struct v4l2_mbus_framefmt *mf,
+				    const struct gc2145_framesize **size)
+{
+	const struct gc2145_framesize *fsize = &gc2145_framesizes[0];
+	const struct gc2145_framesize *match = NULL;
+	int i = ARRAY_SIZE(gc2145_framesizes);
+	unsigned int min_err = UINT_MAX;
+
+	while (i--) {
+		int err = abs(fsize->width - mf->width)
+				+ abs(fsize->height - mf->height);
+		if (err < min_err && fsize->regs[0].addr) {
+			min_err = err;
+			match = fsize;
+		}
+		fsize++;
+	}
+
+	if (!match)
+		match = &gc2145_framesizes[0];
+
+	mf->width  = match->width;
+	mf->height = match->height;
+
+	if (size)
+		*size = match;
+}
+
+static int gc2145_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int index = ARRAY_SIZE(gc2145_formats);
+	struct v4l2_mbus_framefmt *mf = &fmt->format;
+	const struct gc2145_framesize *size = NULL;
+	struct gc2145 *gc2145 = to_gc2145(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	__gc2145_try_frame_size(mf, &size);
+
+	while (--index >= 0)
+		if (gc2145_formats[index].code == mf->code)
+			break;
+
+	if (index < 0)
+		return -EINVAL;
+
+	mf->colorspace = V4L2_COLORSPACE_SRGB;
+	mf->code = gc2145_formats[index].code;
+	mf->field = V4L2_FIELD_NONE;
+
+	mutex_lock(&gc2145->lock);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+		*mf = fmt->format;
+#else
+		return -ENOTTY;
+#endif
+	} else {
+		if (gc2145->streaming) {
+			mutex_unlock(&gc2145->lock);
+			return -EBUSY;
+		}
+
+		gc2145->frame_size = size;
+		gc2145->format = fmt->format;
+	}
+
+	mutex_unlock(&gc2145->lock);
+	return ret;
+}
+
+static int gc2145_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2145 *gc2145 = to_gc2145(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	mutex_lock(&gc2145->lock);
+
+	on = !!on;
+
+	if (gc2145->streaming == on)
+		goto unlock;
+
+	if (!on) {
+		/* Stop Streaming Sequence */
+		gc2145_set_streaming(gc2145, 0x00);
+		gc2145->streaming = on;
+		goto unlock;
+	}
+
+	ret = gc2145_write_array(client, gc2145_init_regs);
+	if (ret)
+		goto unlock;
+
+	ret = gc2145_write_array(client, gc2145->frame_size->regs);
+	if (ret)
+		goto unlock;
+
+	gc2145_set_streaming(gc2145, 0x0f);
+	gc2145->streaming = on;
+
+unlock:
+	mutex_unlock(&gc2145->lock);
+	return ret;
+}
+
+static int gc2145_set_test_pattern(struct gc2145 *gc2145, int value)
+{
+	return 0;
+}
+
+static int gc2145_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct gc2145 *gc2145 =
+			container_of(ctrl->handler, struct gc2145, ctrls);
+
+	switch (ctrl->id) {
+	case V4L2_CID_TEST_PATTERN:
+		return gc2145_set_test_pattern(gc2145, ctrl->val);
+	}
+
+	return 0;
+}
+
+static const struct v4l2_ctrl_ops gc2145_ctrl_ops = {
+	.s_ctrl = gc2145_s_ctrl,
+};
+
+static const char * const gc2145_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bars",
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev internal operations
+ */
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int gc2145_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct v4l2_mbus_framefmt *format =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	gc2145_get_default_format(format);
+
+	return 0;
+}
+#endif
+
+static int gc2145_g_mbus_config(struct v4l2_subdev *sd,
+				struct v4l2_mbus_config *config)
+{
+	config->type = V4L2_MBUS_PARALLEL;
+	config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_VSYNC_ACTIVE_LOW |
+			V4L2_MBUS_PCLK_SAMPLE_RISING;
+
+	return 0;
+}
+
+static const struct v4l2_subdev_core_ops gc2145_subdev_core_ops = {
+	.log_status = v4l2_ctrl_subdev_log_status,
+	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static const struct v4l2_subdev_video_ops gc2145_subdev_video_ops = {
+	.s_stream = gc2145_s_stream,
+	.g_mbus_config = gc2145_g_mbus_config,
+};
+
+static const struct v4l2_subdev_pad_ops gc2145_subdev_pad_ops = {
+	.enum_mbus_code = gc2145_enum_mbus_code,
+	.enum_frame_size = gc2145_enum_frame_sizes,
+	.get_fmt = gc2145_get_fmt,
+	.set_fmt = gc2145_set_fmt,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_ops gc2145_subdev_ops = {
+	.core  = &gc2145_subdev_core_ops,
+	.video = &gc2145_subdev_video_ops,
+	.pad   = &gc2145_subdev_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops gc2145_subdev_internal_ops = {
+	.open = gc2145_open,
+};
+#endif
+
+static int gc2145_detect(struct v4l2_subdev *sd)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	u8 pid, ver;
+	int ret;
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	/* Check sensor revision */
+	ret = gc2145_read(client, REG_SC_CHIP_ID_H, &pid);
+	if (!ret)
+		ret = gc2145_read(client, REG_SC_CHIP_ID_L, &ver);
+
+	if (!ret) {
+		unsigned short id;
+
+		id = SENSOR_ID(pid, ver);
+		if (id != GC2145_ID) {
+			ret = -1;
+			dev_err(&client->dev,
+				"Sensor detection failed (%04X, %d)\n",
+				id, ret);
+		} else {
+			dev_info(&client->dev, "Found GC%04X sensor\n", id);
+		}
+	}
+
+	return ret;
+}
+
+static int __gc2145_power_on(struct gc2145 *gc2145)
+{
+	int ret;
+	struct device *dev = &gc2145->client->dev;
+
+	ret = clk_set_rate(gc2145->xvclk, 24000000);
+	if (ret < 0)
+		dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+
+	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
+	usleep_range(2000, 5000);
+
+	ret = regulator_bulk_enable(GC2145_NUM_SUPPLIES, gc2145->supplies);
+	if (ret < 0)
+		dev_info(dev, "Failed to enable regulators\n");
+
+	usleep_range(20000, 50000);
+
+	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0);
+	usleep_range(2000, 5000);
+
+	ret = clk_prepare_enable(gc2145->xvclk);
+	if (ret < 0)
+		dev_info(dev, "Failed to enable xvclk\n");
+
+	usleep_range(70000, 100000);
+
+	return 0;
+}
+
+static void __gc2145_power_off(struct gc2145 *gc2145)
+{
+	clk_disable_unprepare(gc2145->xvclk);
+	regulator_bulk_disable(GC2145_NUM_SUPPLIES, gc2145->supplies);
+	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
+}
+
+static int gc2145_configure_regulators(struct gc2145 *gc2145)
+{
+	unsigned int i;
+
+	for (i = 0; i < GC2145_NUM_SUPPLIES; i++)
+		gc2145->supplies[i].supply = gc2145_supply_names[i];
+
+	return devm_regulator_bulk_get(&gc2145->client->dev,
+				       GC2145_NUM_SUPPLIES,
+				       gc2145->supplies);
+}
+
+static int gc2145_parse_of(struct gc2145 *gc2145)
+{
+	struct device *dev = &gc2145->client->dev;
+	int ret;
+
+	gc2145->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(gc2145->pwdn_gpio)) {
+		dev_info(dev, "Failed to get pwdn-gpios\n");
+		return 0;
+	}
+
+	ret = gc2145_configure_regulators(gc2145);
+	if (ret)
+		dev_info(dev, "Failed to get power regulators\n");
+
+	return __gc2145_power_on(gc2145);
+}
+
+static int gc2145_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct v4l2_subdev *sd;
+	struct gc2145 *gc2145;
+	int ret;
+
+	gc2145 = devm_kzalloc(&client->dev, sizeof(*gc2145), GFP_KERNEL);
+	if (!gc2145)
+		return -ENOMEM;
+
+	gc2145->client = client;
+	gc2145->xvclk = devm_clk_get(&client->dev, "xvclk");
+	if (IS_ERR(gc2145->xvclk)) {
+		dev_err(&client->dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+
+	gc2145_parse_of(gc2145);
+
+	gc2145->xvclk_frequency = clk_get_rate(gc2145->xvclk);
+	if (gc2145->xvclk_frequency < 6000000 ||
+	    gc2145->xvclk_frequency > 27000000)
+		return -EINVAL;
+
+	v4l2_ctrl_handler_init(&gc2145->ctrls, 2);
+	gc2145->link_frequency =
+			v4l2_ctrl_new_std(&gc2145->ctrls, &gc2145_ctrl_ops,
+					  V4L2_CID_PIXEL_RATE, 0,
+					  GC2145_PIXEL_RATE, 1,
+					  GC2145_PIXEL_RATE);
+
+	v4l2_ctrl_new_std_menu_items(&gc2145->ctrls, &gc2145_ctrl_ops,
+				     V4L2_CID_TEST_PATTERN,
+				     ARRAY_SIZE(gc2145_test_pattern_menu) - 1,
+				     0, 0, gc2145_test_pattern_menu);
+	gc2145->sd.ctrl_handler = &gc2145->ctrls;
+
+	if (gc2145->ctrls.error) {
+		dev_err(&client->dev, "%s: control initialization error %d\n",
+			__func__, gc2145->ctrls.error);
+		return  gc2145->ctrls.error;
+	}
+
+	sd = &gc2145->sd;
+	client->flags |= I2C_CLIENT_SCCB;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	v4l2_i2c_subdev_init(sd, client, &gc2145_subdev_ops);
+
+	sd->internal_ops = &gc2145_subdev_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+		     V4L2_SUBDEV_FL_HAS_EVENTS;
+#endif
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	gc2145->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &gc2145->pad, 0);
+	if (ret < 0) {
+		v4l2_ctrl_handler_free(&gc2145->ctrls);
+		return ret;
+	}
+#endif
+
+	mutex_init(&gc2145->lock);
+
+	gc2145_get_default_format(&gc2145->format);
+	gc2145->frame_size = &gc2145_framesizes[0];
+
+	ret = gc2145_detect(sd);
+	if (ret < 0)
+		goto error;
+
+	ret = v4l2_async_register_subdev(&gc2145->sd);
+	if (ret)
+		goto error;
+
+	dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
+
+	return 0;
+
+error:
+	v4l2_ctrl_handler_free(&gc2145->ctrls);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc2145->lock);
+	__gc2145_power_off(gc2145);
+	return ret;
+}
+
+static int gc2145_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc2145 *gc2145 = to_gc2145(sd);
+
+	v4l2_ctrl_handler_free(&gc2145->ctrls);
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc2145->lock);
+
+	__gc2145_power_off(gc2145);
+
+	return 0;
+}
+
+static const struct i2c_device_id gc2145_id[] = {
+	{ "gc2145", 0 },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(i2c, gc2145_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id gc2145_of_match[] = {
+	{ .compatible = "galaxycore,gc2145", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, gc2145_of_match);
+#endif
+
+static struct i2c_driver gc2145_i2c_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.of_match_table = of_match_ptr(gc2145_of_match),
+	},
+	.probe		= gc2145_probe,
+	.remove		= gc2145_remove,
+	.id_table	= gc2145_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&gc2145_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&gc2145_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_AUTHOR("Benoit Parrot <bparrot@ti.com>");
+MODULE_DESCRIPTION("GC2145 CMOS Image Sensor driver");
+MODULE_LICENSE("GPL v2");

From 9472e33df8ab12c550350a4869d3d66660e43f05 Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Wed, 15 Aug 2018 19:50:34 +0800
Subject: [PATCH 1112/1852] net: wireless: rockchip_wlan: ssv6051 remove cp fw

Change-Id: Ice43fadd3e91a233cd19093422fadd697ef520dc
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
index f73359799f603..f86faef51b854 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/Makefile
@@ -67,8 +67,8 @@ $(KMODULE_NAME)-y += $(KERN_SRCS:.c=.o)
 
 obj-$(CONFIG_SSV6200_CORE) += $(KMODULE_NAME).o
 
-$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-wifi.cfg $(FIRMWARE_PATH)/)
-$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-sw.bin $(FIRMWARE_PATH)/)
+#$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-wifi.cfg $(FIRMWARE_PATH)/)
+#$(shell cp  $(KBUILD_TOP)/firmware/ssv6051-sw.bin $(FIRMWARE_PATH)/)
 #$(shell cp  $(KBUILD_TOP)/ssv6051.ko $(KO_PATH)/ssv6051.ko)
 
 

From 07637810ce1cd1688ab2d81c083506fd2f1731d0 Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 11 Feb 2016 16:28:13 -0600
Subject: [PATCH 1113/1852] UPSTREAM: kbuild: Allow using host dtc instead of
 kernel's copy

Development of dtc happens in its own upstream repository, but testing
dtc changes against the kernel tree is useful. Change dtc to a variable
that users can override.

Change-Id: I8f1dccc79effccc9e8406c22efa3ca471f4d3504
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Michal Marek <mmarek@suse.com>
Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 6b22b3d1614af1a775f2ef006009f15077592c9c)
---
 scripts/Makefile.lib | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 3ec5f2cf52e02..e2026a3096929 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -268,6 +268,7 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
 
 # DTC
 # ---------------------------------------------------------------------------
+DTC ?= $(objtree)/scripts/dtc/dtc
 
 # Disable noisy checks by default
 ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
@@ -305,7 +306,7 @@ $(obj)/%.dtb.S: $(obj)/%.dtb
 quiet_cmd_dtc = DTC     $@
 cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
 	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
-	$(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 \
+	$(DTC) -O dtb -o $@ -b 0 \
 		-i $(dir $<) $(DTC_FLAGS) \
 		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
 	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)

From c1a430f1b71a42016557d8905318fe8b370809da Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Fri, 17 Aug 2018 19:17:42 +0800
Subject: [PATCH 1114/1852] ANDROID: rk: kbuild: dtc generation of symbols

For support device tree overlay.

Change-Id: I05e3ca42ae987f3e269c9c891a7b3e276b813231
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/Makefile.lib | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index e2026a3096929..d697b0e16d021 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -270,6 +270,11 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
 # ---------------------------------------------------------------------------
 DTC ?= $(objtree)/scripts/dtc/dtc
 
+# Generation of symbols for Android
+ifeq ($(CONFIG_ANDROID),y)
+DTC_FLAGS += -@
+endif
+
 # Disable noisy checks by default
 ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
 DTC_FLAGS += -Wno-unit_address_vs_reg \

From 6c24cae346f4e52c5bd4feb3af86d6cefbdad4d2 Mon Sep 17 00:00:00 2001
From: Xinhuang Li <buluess.li@rock-chips.com>
Date: Fri, 17 Aug 2018 17:09:22 +0800
Subject: [PATCH 1115/1852] arm: dts: rockchip: rk3128h-box.dtsi: rename codec
 for vts

fix the vts error like this:
Failed to parse! Parsing error at token LexToken(COMMA,',',1,48) in line 1;
explain:
the vts will parsing the codec'name after android P, the comma is not allow
in the codec'name

Change-Id: I6fc9953dfaa7b056cd96f3b82c7cc3cd49eced21
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3128h-box.dtsi b/arch/arm/boot/dts/rk3128h-box.dtsi
index 4d437656a736f..cac444ca027af 100644
--- a/arch/arm/boot/dts/rk3128h-box.dtsi
+++ b/arch/arm/boot/dts/rk3128h-box.dtsi
@@ -88,7 +88,7 @@
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
 		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,name = "rockchip,rk3229";
+		simple-audio-card,name = "rockchip-rk3229";
 		simple-audio-card,cpu {
 			sound-dai = <&i2s1>;
 		};
@@ -102,7 +102,7 @@
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
 		simple-audio-card,mclk-fs = <128>;
-		simple-audio-card,name = "rockchip,hdmi";
+		simple-audio-card,name = "rockchip-hdmi";
 		simple-audio-card,cpu {
 			sound-dai = <&i2s0>;
 		};
@@ -163,7 +163,7 @@
 	spdif_sound: spdif-sound {
 		status = "okay";
 		compatible = "simple-audio-card";
-		simple-audio-card,name = "ROCKCHIP,SPDIF";
+		simple-audio-card,name = "ROCKCHIP-SPDIF";
 		simple-audio-card,cpu {
 			sound-dai = <&spdif>;
 		};

From 69240979c8f413aef4616365ba15758fcff60ac7 Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Fri, 17 Aug 2018 13:41:39 +0800
Subject: [PATCH 1116/1852] drivers: rkflash: add rkflash proc info

Change-Id: I7316c628d79cdee8fb513e144b6c365a142d4ecb
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 drivers/rkflash/rk_sftl.h              |    9 +
 drivers/rkflash/rk_sftl_arm_v7.S       | 5627 ++++++++++++-----------
 drivers/rkflash/rk_sftl_arm_v7_thumb.S | 5789 ++++++++++++------------
 drivers/rkflash/rk_sftl_arm_v8.S       | 4613 +++++++++----------
 drivers/rkflash/rkflash_blk.c          |    7 +
 5 files changed, 8089 insertions(+), 7956 deletions(-)

diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index 84586d4725678..f474236a7cfcf 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -14,6 +14,15 @@ u32 sftl_get_density(void);
 s32 sftl_gc(void);
 int sftl_vendor_read(u32 index, u32 count, u8 *buf);
 int sftl_vendor_write(u32 index, u32 count, u8 *buf);
+
+/*
+ * rknand_proc_ftlread() Read FTL info which's about 2KB size
+ *
+ * @size: buf size(>= 2KB)
+ * @buf: buf for caching ftl info
+ * @return real size of caching ftl info
+ */
+int rknand_proc_ftlread(int size, char *buf);
 int rk_sftl_vendor_read(u32 id, u8 *buf, u32 size);
 int rk_sftl_vendor_write(u32 id, u8 *buf, u32 size);
 int rk_sftl_vendor_register(void);
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index eb59ee471ec02..59d145aae38d5 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-14
+ * date: 2018-08-17
  */
 	.file	"rk_sftl.c"
 	.global	__udivsi3
@@ -1866,414 +1866,479 @@ FtlPrintInfo2buf:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	sub	sp, sp, #12
-	mov	r7, r0
-	ldr	r6, .L269
-	add	r5, r7, #12
+	sub	sp, sp, #16
+	mov	r6, r0
+	ldr	r5, .L269
+	add	r4, r6, #12
 	ldr	r1, .L269+4
-	movw	r9, #2344
+	movw	r8, #2344
 	bl	strcpy
-	ldr	r2, [r6, #116]
-	mov	r0, r5
-	ldr	r1, .L269+8
-	bl	sprintf
-	add	r5, r5, r0
+	ldr	r3, [r5, #116]
+	mov	r1, #64
+	ldr	r2, .L269+8
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
 	ldr	r1, .L269+12
-	mov	r0, r5
-	add	r5, r5, #10
+	mov	r0, r4
+	add	r4, r4, #10
 	bl	strcpy
-	ldr	r2, [r6, #2504]
-	mov	r0, r5
-	ldr	r1, .L269+16
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2500]
-	ldr	r1, .L269+20
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2508]
-	ldr	r1, .L269+24
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2512]
-	ldr	r1, .L269+28
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2516]
-	ldr	r1, .L269+32
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2520]
-	ldr	r1, .L269+36
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2524]
-	ldr	r1, .L269+40
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2528]
-	ldr	r1, .L269+44
-	mov	r0, r5
-	bl	sprintf
-	ldr	r2, [r6, #2532]
-	add	r5, r5, r0
-	ldr	r1, .L269+48
-	mov	r0, r5
-	ldr	r4, .L269+52
-	ldr	r8, .L269+56
-	lsr	r2, r2, #11
-	bl	sprintf
-	ldr	r2, [r6, #2536]
-	add	r5, r5, r0
-	ldr	r1, .L269+60
-	mov	r0, r5
-	lsr	r2, r2, #11
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2540]
-	ldr	r1, .L269+64
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2544]
-	ldr	r1, .L269+68
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #158]
-	ldr	r1, .L269+72
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, r9]
-	ldr	r1, .L269+76
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2548]
-	ldr	r1, .L269+80
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2552]
-	ldr	r1, .L269+84
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2556]
-	ldr	r1, .L269+88
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2560]
-	ldr	r1, .L269+92
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2564]
-	ldr	r1, .L269+96
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2568]
-	ldr	r1, .L269+100
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #30]
-	ldr	r1, .L269+104
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #28]
-	ldr	r1, .L269+108
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #140]
-	ldr	r1, .L269+112
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #132]
-	ldr	r1, .L269+116
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #28]
-	ldr	r1, .L269+120
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #218]
-	ldr	r1, .L269+124
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #40]
-	ldr	r1, .L269+128
-	mov	r0, r5
-	bl	sprintf
+	ldr	r3, [r5, #2504]
+	mov	r1, #64
+	ldr	r2, .L269+16
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2500]
+	ldr	r2, .L269+20
+	mov	r1, #64
+	mov	r0, r4
+	ldr	r7, .L269+24
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2508]
+	ldr	r2, .L269+28
+	mov	r1, #64
+	mov	r0, r4
+	ldr	r9, .L269+32
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2512]
+	ldr	r2, .L269+36
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2516]
+	ldr	r2, .L269+40
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2520]
+	ldr	r2, .L269+44
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2524]
+	ldr	r2, .L269+48
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2528]
+	ldr	r2, .L269+52
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldr	r3, [r5, #2532]
+	add	r4, r4, r0
+	ldr	r2, .L269+56
+	mov	r1, #64
+	mov	r0, r4
+	lsr	r3, r3, #11
+	bl	snprintf
+	ldr	r3, [r5, #2536]
+	add	r4, r4, r0
+	ldr	r2, .L269+60
+	mov	r1, #64
+	mov	r0, r4
+	lsr	r3, r3, #11
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2540]
+	ldr	r2, .L269+64
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2544]
+	ldr	r2, .L269+68
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #158]
+	ldr	r2, .L269+72
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, r8]
+	ldr	r2, .L269+76
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2548]
+	ldr	r2, .L269+80
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2552]
+	ldr	r2, .L269+84
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2556]
+	ldr	r2, .L269+88
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2560]
+	ldr	r2, .L269+92
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2564]
+	ldr	r2, .L269+96
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2568]
+	ldr	r2, .L269+100
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r7, #30]
+	ldr	r2, .L269+104
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r7, #28]
+	ldr	r2, .L269+108
+	mov	r1, #64
+	mov	r0, r4
+	movw	r7, #2348
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #140]
+	ldr	r2, .L269+112
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #132]
+	ldr	r2, .L269+116
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #28]
+	ldr	r2, .L269+120
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #218]
+	ldr	r2, .L269+124
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #40]
+	ldr	r2, .L269+128
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
 	movw	r3, #2572
-	add	r5, r5, r0
-	ldrh	r2, [r6, r3]
-	mov	r0, r5
-	ldr	r1, .L269+132
-	movw	r4, #2348
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #44]
-	ldr	r1, .L269+136
-	mov	r0, r5
-	bl	sprintf
-	add	r3, r6, #2576
-	add	r5, r5, r0
-	ldrh	r2, [r3]
-	mov	r0, r5
-	ldr	r1, .L269+140
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #152]
-	ldr	r1, .L269+144
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #2]
-	ldr	r1, .L269+148
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
-	ldr	r1, .L269+152
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, r4]
-	ldr	r1, .L269+156
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
-	ldr	r1, .L269+160
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #4]
-	ldr	r1, .L269+164
-	mov	r0, r5
-	bl	sprintf
-	ldrh	r3, [r6, r4]
-	add	r5, r5, r0
-	ldr	r2, [r6, #2324]
-	mov	r0, r5
-	ldr	r1, .L269+168
-	movw	r4, #2396
+	add	r4, r4, r0
+	ldrh	r3, [r5, r3]
+	mov	r1, #64
+	ldr	r2, .L269+132
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #44]
+	ldr	r2, .L269+136
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r3, r5, #2576
+	add	r4, r4, r0
+	ldrh	r3, [r3]
+	mov	r1, #64
+	ldr	r2, .L269+140
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #152]
+	ldr	r2, .L269+144
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #2]
+	ldr	r2, .L269+148
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2354]	@ zero_extendqisi2
+	ldr	r2, .L269+152
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, r7]
+	ldr	r2, .L269+156
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2356]	@ zero_extendqisi2
+	ldr	r2, .L269+160
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #4]
+	ldr	r2, .L269+164
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldrh	r3, [r5, r7]
+	add	r4, r4, r0
+	ldr	r2, [r5, #2324]
+	mov	r1, #64
+	mov	r0, r4
+	movw	r7, #2396
 	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #50]
-	ldr	r1, .L269+172
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
-	ldr	r1, .L269+176
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, r4]
-	ldr	r1, .L269+180
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
-	ldr	r1, .L269+184
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #52]
-	ldr	r1, .L269+188
-	mov	r0, r5
-	bl	sprintf
-	ldrh	r3, [r6, r4]
-	add	r5, r5, r0
-	ldr	r2, [r6, #2324]
-	mov	r0, r5
-	ldr	r1, .L269+192
-	add	r4, r8, #96
+	ldrh	r3, [r2, r3]
+	ldr	r2, .L269+168
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #50]
+	ldr	r2, .L269+172
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2402]	@ zero_extendqisi2
+	ldr	r2, .L269+176
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, r7]
+	ldr	r2, .L269+180
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2404]	@ zero_extendqisi2
+	ldr	r2, .L269+184
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #52]
+	ldr	r2, .L269+188
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldrh	r3, [r5, r7]
+	add	r4, r4, r0
+	ldr	r2, [r5, #2324]
+	mov	r1, #64
+	mov	r0, r4
+	movw	r7, #2588
 	lsl	r3, r3, #1
-	ldrh	r2, [r2, r3]
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #98]
-	ldr	r1, .L269+196
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
-	ldr	r1, .L269+200
-	mov	r0, r5
-	bl	sprintf
+	ldrh	r3, [r2, r3]
+	ldr	r2, .L269+192
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #98]
+	ldr	r2, .L269+196
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2450]	@ zero_extendqisi2
+	ldr	r2, .L269+200
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
 	movw	r3, #2444
-	add	r5, r5, r0
-	ldrh	r2, [r6, r3]
-	mov	r0, r5
-	ldr	r1, .L269+204
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
-	ldr	r1, .L269+208
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r8, #100]
-	ldr	r1, .L269+212
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #146]
-	ldr	r1, .L269+216
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
-	ldr	r1, .L269+220
-	mov	r0, r5
-	bl	sprintf
-	movw	r8, #2588
-	add	r5, r5, r0
-	ldrh	r2, [r6, r8]
-	mov	r0, r5
-	ldr	r1, .L269+224
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
-	ldr	r1, .L269+228
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #148]
-	ldr	r1, .L269+232
-	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6, #2712]
-	add	r5, r5, r0
-	ldr	r2, [r6, #2716]
-	mov	r0, r5
-	ldr	r1, .L269+236
+	add	r4, r4, r0
+	ldrh	r3, [r5, r3]
+	mov	r1, #64
+	ldr	r2, .L269+204
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2452]	@ zero_extendqisi2
+	ldr	r2, .L269+208
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #100]
+	ldr	r2, .L269+212
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #242]
+	ldr	r2, .L269+216
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2594]	@ zero_extendqisi2
+	ldr	r2, .L269+220
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, r7]
+	ldr	r2, .L269+224
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2596]	@ zero_extendqisi2
+	ldr	r2, .L269+228
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r9, #244]
+	ldr	r2, .L269+232
+	mov	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldr	r3, [r5, #2712]
+	add	r4, r4, r0
+	ldr	r2, .L269+236
+	mov	r1, #64
+	mov	r0, r4
+	str	r3, [sp, #4]
+	ldr	r3, [r5, #2720]
 	str	r3, [sp]
-	ldr	r3, [r6, #2720]
-	bl	sprintf
-	add	r4, r5, r0
-	ldr	r2, [r6, #2708]
-	ldr	r1, .L269+240
+	ldr	r3, [r5, #2716]
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2708]
+	ldr	r2, .L269+240
+	mov	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldr	r2, [r6, #2732]
-	ldr	r1, .L269+244
+	ldr	r3, [r5, #2732]
+	ldr	r2, .L269+244
+	mov	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	movw	r3, #3148
 	add	r4, r4, r0
-	ldrh	r2, [r6, r3]
+	ldrh	r3, [r5, r3]
+	mov	r1, #64
+	ldr	r2, .L269+248
 	mov	r0, r4
-	ldr	r1, .L269+248
-	bl	sprintf
+	bl	snprintf
 	movw	r3, #3150
 	add	r4, r4, r0
-	ldrh	r2, [r6, r3]
+	ldrh	r3, [r5, r3]
+	mov	r1, #64
+	ldr	r2, .L269+252
 	mov	r0, r4
-	ldr	r1, .L269+252
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldr	r2, [r6, #3152]
-	ldr	r1, .L269+256
+	ldr	r3, [r5, #3152]
+	ldr	r2, .L269+256
+	mov	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	movw	r3, #3156
 	add	r4, r4, r0
-	ldrh	r2, [r6, r3]
+	ldrh	r3, [r5, r3]
+	mov	r1, #64
+	ldr	r2, .L269+260
 	mov	r0, r4
-	ldr	r1, .L269+260
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L269+264
-	mov	r2, r0
+	ldr	r2, .L269+264
+	mov	r3, r0
+	mov	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldrh	r0, [r6, r9]
+	ldrh	r0, [r5, r8]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L269+268
-	mov	r2, r0
+	ldr	r2, .L269+268
+	mov	r3, r0
+	mov	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L269+272
 	add	r4, r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L258
 .L263:
-	sub	r0, r4, r7
+	sub	r0, r4, r6
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 .L258:
-	ldrh	r3, [r6, r8]
+	ldrh	r3, [r5, r7]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L260
-	ldr	r2, [r6, #2324]
+	ldr	r2, [r5, #2324]
 	lsl	r3, r3, #1
 	mov	r0, r4
-	ldr	r1, .L269+276
-	ldrh	r2, [r2, r3]
-	bl	sprintf
+	mov	r1, #64
+	ldrh	r3, [r2, r3]
+	ldr	r2, .L269+276
+	bl	snprintf
 	add	r4, r4, r0
 .L260:
 	mov	r0, #0
 	ldr	r9, .L269+280
 	bl	List_get_gc_head_node
-	uxth	r3, r0
-	mov	r5, #0
+	uxth	r0, r0
+	mov	r7, #0
 	movw	r10, #65535
 .L262:
-	cmp	r3, r10
+	cmp	r0, r10
 	beq	.L261
-	ldr	r2, [r6, #2328]
-	lsl	r1, r3, #1
-	lsl	r8, r3, #3
-	mov	r0, r4
-	ldrh	r2, [r2, r1]
-	str	r2, [sp, #8]
-	ldr	r2, [r6, #2316]
-	add	r2, r2, r8
-	ldrh	r2, [r2, #4]
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2324]
-	ldrh	r2, [r2, r1]
-	mov	r1, r9
-	str	r2, [sp]
-	mov	r2, r5
-	bl	sprintf
-	add	r5, r5, #1
-	ldr	r3, [r6, #2316]
-	cmp	r5, #16
+	ldr	r3, [r5, #2328]
+	lsl	r2, r0, #1
+	lsl	r8, r0, #3
+	mov	r1, #64
+	ldrh	r3, [r3, r2]
+	str	r3, [sp, #12]
+	ldr	r3, [r5, #2316]
+	add	r3, r3, r8
+	ldrh	r3, [r3, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #2324]
+	ldrh	r3, [r3, r2]
+	mov	r2, r9
+	stm	sp, {r0, r3}
+	mov	r3, r7
+	mov	r0, r4
+	add	r7, r7, #1
+	bl	snprintf
+	ldr	r3, [r5, #2316]
+	cmp	r7, #16
 	add	r4, r4, r0
-	ldrh	r3, [r3, r8]
+	ldrh	r0, [r3, r8]
 	bne	.L262
 .L261:
-	ldr	r3, [r6, #2340]
-	mov	r5, #0
-	ldr	r2, [r6, #2316]
+	ldr	r3, [r5, #2340]
+	mov	r7, #0
+	ldr	r2, [r5, #2316]
 	movw	r9, #65535
 	ldr	r10, .L269+284
 	sub	r3, r3, r2
@@ -2281,24 +2346,26 @@ FtlPrintInfo2buf:
 .L264:
 	cmp	r3, r9
 	beq	.L263
-	ldr	r1, [r6, #2328]
+	ldr	r1, [r5, #2328]
 	lsl	r2, r3, #1
 	lsl	r8, r3, #3
 	mov	r0, r4
 	ldrh	r2, [r1, r2]
-	mov	r1, r10
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2316]
+	mov	r1, #64
+	str	r2, [sp, #8]
+	ldr	r2, [r5, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
-	str	r2, [sp]
-	mov	r2, r5
-	add	r5, r5, #1
-	bl	sprintf
-	cmp	r5, #4
+	str	r3, [sp]
+	mov	r3, r7
+	add	r7, r7, #1
+	str	r2, [sp, #4]
+	mov	r2, r10
+	bl	snprintf
+	cmp	r7, #4
 	add	r4, r4, r0
 	beq	.L263
-	ldr	r3, [r6, #2316]
+	ldr	r3, [r5, #2316]
 	ldrh	r3, [r3, r8]
 	b	.L264
 .L270:
@@ -2310,15 +2377,15 @@ FtlPrintInfo2buf:
 	.word	.LC4
 	.word	.LC5
 	.word	.LC6
+	.word	.LANCHOR0+2268
 	.word	.LC7
+	.word	.LANCHOR0+2348
 	.word	.LC8
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LC12
 	.word	.LC13
-	.word	.LANCHOR0+2268
-	.word	.LANCHOR0+2348
 	.word	.LC14
 	.word	.LC15
 	.word	.LC16
@@ -2389,10 +2456,14 @@ rknand_proc_ftlread:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L272
-	mov	r5, r0
-	ldr	r1, .L272+4
-	bl	sprintf
+	cmp	r0, #2048
+	mov	r5, r1
+	blt	.L273
+	ldr	r3, .L274
+	mov	r1, #64
+	ldr	r2, .L274+4
+	mov	r0, r5
+	bl	snprintf
 	add	r4, r5, r0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
@@ -2400,8 +2471,11 @@ rknand_proc_ftlread:
 	sub	r0, r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
 .L273:
+	mov	r0, #0
+	ldmfd	sp, {r4, r5, fp, sp, pc}
+.L275:
 	.align	2
-.L272:
+.L274:
 	.word	.LC70
 	.word	.LC71
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
@@ -2418,19 +2492,19 @@ GetSwlReplaceBlock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #16
-	ldr	r4, .L298
+	ldr	r4, .L300
 	ldr	r2, [r4, #2556]
 	ldr	r3, [r4, #2568]
 	cmp	r2, r3
-	bcs	.L275
+	bcs	.L277
 	ldr	r2, [r4, #2328]
 	mov	r3, #0
 	ldrh	r1, [r4, #40]
 	str	r3, [r4, #2548]
 	sub	r2, r2, #2
-.L276:
+.L278:
 	cmp	r3, r1
-	bcc	.L277
+	bcc	.L279
 	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__udivsi3
@@ -2440,48 +2514,48 @@ GetSwlReplaceBlock:
 	sub	r0, r5, r0
 	bl	__udivsi3
 	str	r0, [r4, #2548]
-.L278:
+.L280:
 	ldr	r6, [r4, #2568]
 	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L283
+	bls	.L285
 	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L283
-.L285:
+	bls	.L285
+.L287:
 	movw	r5, #65535
-.L284:
+.L286:
 	mov	r0, r5
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L277:
+.L279:
 	ldrh	r0, [r2, #2]!
 	add	r3, r3, #1
 	ldr	ip, [r4, #2548]
 	add	r0, r0, ip
 	str	r0, [r4, #2548]
-	b	.L276
-.L275:
+	b	.L278
+.L277:
 	ldr	r3, [r4, #2564]
 	cmp	r2, r3
 	addhi	r3, r3, #1
 	strhi	r3, [r4, #2564]
 	movhi	r3, #0
-	bls	.L278
-.L280:
+	bls	.L280
+.L282:
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	bcs	.L278
+	bcs	.L280
 	ldr	r0, [r4, #2328]
 	lsl	r1, r3, #1
 	add	r3, r3, #1
 	ldrh	r2, [r0, r1]
 	add	r2, r2, #1
 	strh	r2, [r0, r1]	@ movhi
-	b	.L280
-.L283:
+	b	.L282
+.L285:
 	movw	r3, #2344
 	ldrh	r0, [r4, r3]
 	add	r0, r0, r0, lsl #1
@@ -2490,53 +2564,53 @@ GetSwlReplaceBlock:
 	add	r3, r6, #64
 	mov	r9, r0
 	cmp	r0, r3
-	bcc	.L285
+	bcc	.L287
 	ldr	r3, [r4, #2320]
 	cmp	r3, #0
-	beq	.L285
+	beq	.L287
 	ldrh	r10, [r4, #40]
 	movw	r1, #65535
 	ldr	lr, [r4, #2316]
 	mov	r0, #0
 	ldr	r8, [r4, #2328]
 	mov	r2, r1
-.L286:
+.L288:
 	ldrh	ip, [r3]
 	movw	r5, #65535
 	cmp	ip, r5
-	bne	.L289
+	bne	.L291
 	mov	r5, r2
-.L288:
+.L290:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L285
+	beq	.L287
 	lsl	r3, r5, #1
 	ldrh	r10, [r8, r3]
 	cmp	r6, r10
-	bcs	.L290
+	bcs	.L292
 	str	r3, [fp, #-44]
 	bl	GetFreeBlockMinEraseCount
 	ldr	r3, [fp, #-44]
 	cmp	r6, r0
 	strcc	r1, [r4, #2568]
-.L290:
+.L292:
 	cmp	r7, r10
-	bls	.L285
+	bls	.L287
 	add	r2, r10, #128
 	cmp	r9, r2
-	ble	.L285
+	ble	.L287
 	add	r2, r10, #256
 	cmp	r7, r2
-	bhi	.L291
+	bhi	.L293
 	ldr	r2, [r4, #2564]
 	add	r10, r10, #768
 	cmp	r10, r2
-	bcs	.L285
-.L291:
+	bcs	.L287
+.L293:
 	str	r9, [sp, #8]
 	mov	r1, r5
 	ldrh	r2, [r8, r3]
-	ldr	r0, .L298+4
+	ldr	r0, .L300+4
 	str	r2, [sp, #4]
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3]
@@ -2546,31 +2620,31 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	mov	r3, #1
 	str	r3, [r4, #3160]
-	b	.L284
-.L289:
+	b	.L286
+.L291:
 	add	r0, r0, #1
 	uxth	r0, r0
 	cmp	r0, r10
-	bhi	.L285
+	bhi	.L287
 	ldrh	r5, [r3, #4]
 	cmp	r5, #0
-	beq	.L287
+	beq	.L289
 	sub	r3, r3, lr
 	asr	r3, r3, #3
 	uxth	r5, r3
 	lsl	r3, r5, #1
 	ldrh	r3, [r8, r3]
 	cmp	r6, r3
-	bcs	.L288
+	bcs	.L290
 	cmp	r1, r3
 	movhi	r1, r3
 	movhi	r2, r5
-.L287:
+.L289:
 	add	r3, lr, ip, lsl #3
-	b	.L286
-.L299:
+	b	.L288
+.L301:
 	.align	2
-.L298:
+.L300:
 	.word	.LANCHOR0
 	.word	.LC72
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
@@ -2589,19 +2663,19 @@ free_data_superblock:
 	uxth	r0, r0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L301
-	ldr	r3, .L302
+	beq	.L303
+	ldr	r3, .L304
 	mov	r1, #0
 	ldr	r2, [r3, #2324]
 	lsl	r3, r0, #1
 	strh	r1, [r2, r3]	@ movhi
 	bl	INSERT_FREE_LIST
-.L301:
+.L303:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L303:
+.L305:
 	.align	2
-.L302:
+.L304:
 	.word	.LANCHOR0
 	.size	free_data_superblock, .-free_data_superblock
 	.align	2
@@ -2620,30 +2694,30 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L305
+	bne	.L307
 	movw	r2, #2776
-	ldr	r1, .L318
-	ldr	r0, .L318+4
+	ldr	r1, .L320
+	ldr	r0, .L320+4
 	bl	sftl_printk
-.L305:
-	ldr	r5, .L318+8
+.L307:
+	ldr	r5, .L320+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r2, r3
-	bne	.L306
+	bne	.L308
 	movw	r2, #2777
-	ldr	r1, .L318
-	ldr	r0, .L318+4
+	ldr	r1, .L320
+	ldr	r0, .L320+4
 	bl	sftl_printk
-.L306:
+.L308:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L307
+	bne	.L309
 	movw	r2, #2778
-	ldr	r1, .L318
-	ldr	r0, .L318+4
+	ldr	r1, .L320
+	ldr	r0, .L320+4
 	bl	sftl_printk
-.L307:
+.L309:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	mov	r3, #0
 	ldrh	r1, [r5, #32]
@@ -2652,10 +2726,10 @@ get_new_active_ppa:
 	add	r2, r4, r2, lsl #1
 	ldrh	r0, [r2, #16]
 	mov	r2, r3
-.L308:
+.L310:
 	cmp	r0, ip
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L310
+	beq	.L312
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	sub	r2, r2, #1
@@ -2663,7 +2737,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L312:
+.L314:
 	add	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2674,7 +2748,7 @@ get_new_active_ppa:
 	add	ip, r4, r3, lsl #1
 	ldrh	ip, [ip, #16]
 	cmp	ip, r0
-	beq	.L312
+	beq	.L314
 	strb	r3, [r4, #6]
 	cmp	r2, #0
 	ldrh	r3, [r4, #2]
@@ -2684,15 +2758,15 @@ get_new_active_ppa:
 	lsr	r3, r3, #5
 	moveq	r3, #0
 	cmp	r3, #0
-	beq	.L304
+	beq	.L306
 	movw	r2, #2799
-	ldr	r1, .L318
-	ldr	r0, .L318+4
+	ldr	r1, .L320
+	ldr	r0, .L320+4
 	bl	sftl_printk
-.L304:
+.L306:
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L310:
+.L312:
 	add	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2704,10 +2778,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	add	r3, r4, r3, lsl #1
 	ldrh	r0, [r3, #16]
-	b	.L308
-.L319:
+	b	.L310
+.L321:
 	.align	2
-.L318:
+.L320:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
@@ -2724,26 +2798,26 @@ FtlGcBufInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L325
+	ldr	r3, .L327
 	mov	lr, #12
 	mov	r4, #1
 	mov	r5, #20
 	mov	r2, #0
 	str	r2, [r3, #3164]
-.L321:
+.L323:
 	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bcc	.L322
+	bcc	.L324
 	mov	ip, #12
 	mov	lr, #0
-.L323:
+.L325:
 	ldr	r2, [r3, #3184]
 	cmp	r1, r2
-	bcc	.L324
+	bcc	.L326
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L322:
+.L324:
 	uxth	r2, r2
 	ldr	r6, [r3, #3168]
 	mul	r0, lr, r2
@@ -2776,8 +2850,8 @@ FtlGcBufInit:
 	ldr	r1, [r6, #4]
 	str	r1, [r2, #12]
 	mov	r2, ip
-	b	.L321
-.L324:
+	b	.L323
+.L326:
 	mul	r4, ip, r1
 	ldr	r5, [r3, #3168]
 	add	r2, r5, r4
@@ -2804,10 +2878,10 @@ FtlGcBufInit:
 	bic	r2, r2, #3
 	add	r2, r4, r2
 	str	r2, [r0, #4]
-	b	.L323
-.L326:
+	b	.L325
+.L328:
 	.align	2
-.L325:
+.L327:
 	.word	.LANCHOR0
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
@@ -2822,37 +2896,37 @@ FtlGcBufFree:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L334
+	ldr	r3, .L336
 	mov	lr, #0
 	mov	r5, #20
 	mov	r7, #12
 	mov	r8, lr
 	ldr	r6, [r3, #3184]
 	ldr	r4, [r3, #3168]
-.L328:
+.L330:
 	uxth	r3, lr
 	cmp	r1, r3
 	ldmfdls	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	mla	ip, r5, r3, r0
 	mov	r2, #0
-.L329:
+.L331:
 	uxth	r3, r2
 	cmp	r6, r3
-	bls	.L330
+	bls	.L332
 	mul	r3, r7, r3
 	add	r2, r2, #1
 	ldr	r10, [r4, r3]
 	add	r9, r4, r3
 	ldr	r3, [ip, #8]
 	cmp	r10, r3
-	bne	.L329
+	bne	.L331
 	str	r8, [r9, #8]
-.L330:
+.L332:
 	add	lr, lr, #1
-	b	.L328
-.L335:
+	b	.L330
+.L337:
 	.align	2
-.L334:
+.L336:
 	.word	.LANCHOR0
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
@@ -2867,41 +2941,41 @@ FtlGcBufAlloc:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L343
+	ldr	r3, .L345
 	mov	ip, #0
 	mov	r6, #12
 	mov	r7, #1
 	mov	r8, #20
 	ldr	r4, [r3, #3184]
 	ldr	r5, [r3, #3168]
-.L337:
+.L339:
 	uxth	r2, ip
 	cmp	r1, r2
-	bhi	.L341
+	bhi	.L343
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L341:
+.L343:
 	mov	lr, #0
-.L338:
+.L340:
 	uxth	r3, lr
 	cmp	r4, r3
-	bls	.L339
+	bls	.L341
 	mla	r3, r6, r3, r5
 	add	lr, lr, #1
 	ldr	r9, [r3, #8]
 	cmp	r9, #0
-	bne	.L338
+	bne	.L340
 	mla	r2, r8, r2, r0
 	ldr	lr, [r3]
 	str	r7, [r3, #8]
 	str	lr, [r2, #8]
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L339:
+.L341:
 	add	ip, ip, #1
-	b	.L337
-.L344:
+	b	.L339
+.L346:
 	.align	2
-.L343:
+.L345:
 	.word	.LANCHOR0
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
@@ -2916,26 +2990,26 @@ IsBlkInGcList:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L350
+	ldr	r2, .L352
 	movw	r1, #3192
 	uxth	r0, r0
 	ldr	r3, [r2, #3188]
 	ldrh	r2, [r2, r1]
 	add	r2, r3, r2, lsl #1
-.L346:
+.L348:
 	cmp	r3, r2
-	bne	.L348
+	bne	.L350
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L348:
+.L350:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L346
+	bne	.L348
 	mov	r0, #1
 	ldmfd	sp, {fp, sp, pc}
-.L351:
+.L353:
 	.align	2
-.L350:
+.L352:
 	.word	.LANCHOR0
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.align	2
@@ -2955,31 +3029,31 @@ FtlGcUpdatePage:
 	mov	r5, r1
 	mov	r6, r2
 	bl	P2V_block_in_plane
-	ldr	ip, .L356
+	ldr	ip, .L358
 	movw	r3, #3192
 	ldr	r2, [ip, #3188]
 	ldrh	lr, [ip, r3]
 	mov	r3, #0
 	sub	r1, r2, #2
-.L353:
+.L355:
 	uxth	r7, r3
 	cmp	r7, lr
-	bcc	.L355
-	bne	.L354
+	bcc	.L357
+	bne	.L356
 	lsl	r3, r7, #1
 	strh	r0, [r2, r3]	@ movhi
 	movw	r2, #3192
 	ldrh	r3, [ip, r2]
 	add	r3, r3, #1
 	strh	r3, [ip, r2]	@ movhi
-	b	.L354
-.L355:
+	b	.L356
+.L357:
 	ldrh	r7, [r1, #2]!
 	add	r3, r3, #1
 	cmp	r7, r0
-	bne	.L353
-.L354:
-	ldr	r0, .L356+4
+	bne	.L355
+.L356:
+	ldr	r0, .L358+4
 	mov	r3, #12
 	ldrh	r2, [r0]
 	mul	r3, r3, r2
@@ -2991,9 +3065,9 @@ FtlGcUpdatePage:
 	add	r3, r3, #1
 	strh	r3, [r0]	@ movhi
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L357:
+.L359:
 	.align	2
-.L356:
+.L358:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3200
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -3012,42 +3086,42 @@ FtlGcRefreshBlock:
 	uxth	r4, r0
 	movw	r7, #3202
 	mov	r1, r4
-	ldr	r0, .L363
+	ldr	r0, .L365
 	bl	sftl_printk
-	ldr	r3, .L363+4
+	ldr	r3, .L365+4
 	ldrh	r8, [r3, r7]
 	cmp	r4, r8
-	beq	.L359
+	beq	.L361
 	movw	r5, #3204
 	ldrh	r6, [r3, r5]
 	cmp	r4, r6
-	beq	.L359
+	beq	.L361
 	movw	ip, #3206
 	ldrh	lr, [r3, ip]
 	cmp	r4, lr
-	beq	.L359
+	beq	.L361
 	movw	r1, #3208
 	ldrh	r0, [r3, r1]
 	cmp	r4, r0
-	beq	.L359
+	beq	.L361
 	movw	r2, #65535
 	cmp	r8, r2
 	strheq	r4, [r3, r7]	@ movhi
-	beq	.L359
+	beq	.L361
 	cmp	r6, r2
 	strheq	r4, [r3, r5]	@ movhi
-	beq	.L359
+	beq	.L361
 	cmp	lr, r2
 	strheq	r4, [r3, ip]	@ movhi
-	beq	.L359
+	beq	.L361
 	cmp	r0, r2
 	strheq	r4, [r3, r1]	@ movhi
-.L359:
+.L361:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L364:
+.L366:
 	.align	2
-.L363:
+.L365:
 	.word	.LC73
 	.word	.LANCHOR0
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -3063,7 +3137,7 @@ FtlGcMarkBadPhyBlk:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L369
+	ldr	r4, .L371
 	uxth	r5, r0
 	movw	r6, #3210
 	mov	r0, r5
@@ -3071,37 +3145,37 @@ FtlGcMarkBadPhyBlk:
 	mov	r2, r5
 	mov	r7, r0
 	ldrh	r1, [r4, r6]
-	ldr	r0, .L369+4
+	ldr	r0, .L371+4
 	bl	sftl_printk
 	mov	r0, r7
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4, r6]
 	mov	r2, #0
-	ldr	r0, .L369+8
-.L366:
+	ldr	r0, .L371+8
+.L368:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L368
+	bhi	.L370
 	cmp	r3, #15
 	movwls	r2, #3210
 	addls	r1, r3, #1
 	strhls	r1, [r4, r2]	@ movhi
 	lslls	r3, r3, #1
-	ldrls	r2, .L369+8
+	ldrls	r2, .L371+8
 	strhls	r5, [r2, r3]	@ movhi
-	b	.L367
-.L368:
+	b	.L369
+.L370:
 	add	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L366
-.L367:
+	bne	.L368
+.L369:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L370:
+.L372:
 	.align	2
-.L369:
+.L371:
 	.word	.LANCHOR0
 	.word	.LC74
 	.word	.LANCHOR0+3212
@@ -3118,16 +3192,16 @@ FtlGcReFreshBadBlk:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L377
+	ldr	r4, .L379
 	movw	r3, #3210
 	ldrh	r2, [r4, r3]
 	cmp	r2, #0
-	beq	.L372
+	beq	.L374
 	movw	r3, #3202
 	ldrh	r1, [r4, r3]
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L372
+	bne	.L374
 	movw	r3, #3246
 	movw	r5, #3246
 	ldrh	r1, [r4, r3]
@@ -3135,7 +3209,7 @@ FtlGcReFreshBadBlk:
 	movcs	r2, #0
 	strhcs	r2, [r4, r3]	@ movhi
 	ldrh	r3, [r4, r5]
-	ldr	r2, .L377+4
+	ldr	r2, .L379+4
 	lsl	r3, r3, #1
 	ldrh	r0, [r2, r3]
 	bl	P2V_block_in_plane
@@ -3143,12 +3217,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4, r5]
 	add	r3, r3, #1
 	strh	r3, [r4, r5]	@ movhi
-.L372:
+.L374:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L378:
+.L380:
 	.align	2
-.L377:
+.L379:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3212
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -3164,12 +3238,12 @@ ftl_malloc:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r1, .L380
+	ldr	r1, .L382
 	bl	__kmalloc
 	ldmfd	sp, {fp, sp, pc}
-.L381:
+.L383:
 	.align	2
-.L380:
+.L382:
 	.word	37748929
 	.size	ftl_malloc, .-ftl_malloc
 	.align	2
@@ -3206,46 +3280,46 @@ rknand_print_hex:
 	mov	r9, r3
 	mov	r5, r6
 	mov	r4, r6
-.L384:
+.L386:
 	cmp	r4, r9
-	bcc	.L390
-	ldr	r0, .L392
+	bcc	.L392
+	ldr	r0, .L394
 	bl	sftl_printk
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L390:
+.L392:
 	cmp	r5, #0
-	bne	.L385
+	bne	.L387
 	mov	r3, r6
 	mov	r2, r7
 	mov	r1, r10
-	ldr	r0, .L392+4
+	ldr	r0, .L394+4
 	bl	sftl_printk
-.L385:
+.L387:
 	cmp	r8, #4
 	ldreq	r1, [r7, r4, lsl #2]
-	ldreq	r0, .L392+8
-	beq	.L391
+	ldreq	r0, .L394+8
+	beq	.L393
 	cmp	r8, #2
 	lsleq	r3, r4, #1
-	ldreq	r0, .L392+12
+	ldreq	r0, .L394+12
 	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
 	ldrheq	r1, [r7, r3]
-	ldrne	r0, .L392+16
-.L391:
+	ldrne	r0, .L394+16
+.L393:
 	add	r5, r5, #1
 	bl	sftl_printk
 	cmp	r5, #15
-	bls	.L389
+	bls	.L391
 	mov	r5, #0
-	ldr	r0, .L392
+	ldr	r0, .L394
 	bl	sftl_printk
-.L389:
+.L391:
 	add	r4, r4, #1
 	add	r6, r6, r8
-	b	.L384
-.L393:
+	b	.L386
+.L395:
 	.align	2
-.L392:
+.L394:
 	.word	.LC79
 	.word	.LC75
 	.word	.LC76
@@ -3266,31 +3340,31 @@ FlashReadPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L412
+	ldr	r5, .L414
 	mov	r7, r1
-	ldr	r9, .L412+4
+	ldr	r9, .L414+4
 	mov	r4, r0
-	ldr	r10, .L412+8
+	ldr	r10, .L414+8
 	ldrh	r8, [r5, #12]
-.L395:
+.L397:
 	cmp	r6, r7
-	bne	.L402
+	bne	.L404
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L402:
+.L404:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L396
+	beq	.L398
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	bne	.L397
-.L396:
+	bne	.L399
+.L398:
 	mov	r2, #101
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L397:
+.L399:
 	sub	r2, fp, #48
 	sub	r1, fp, #44
 	mov	r0, r4
@@ -3304,7 +3378,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L399
+	bne	.L401
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [fp, #-44]
@@ -3315,27 +3389,27 @@ FlashReadPages:
 	add	r1, r8, r1
 	blx	ip
 	cmn	r0, #1
-	beq	.L400
+	beq	.L402
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	cmn	r2, #1
-	bne	.L399
+	bne	.L401
 	ldr	r2, [r3, #8]
 	cmn	r2, #1
-	bne	.L399
+	bne	.L401
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L399
-.L400:
+	beq	.L401
+.L402:
 	mvn	r3, #0
 	str	r3, [r4]
-.L399:
+.L401:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L395
-.L413:
+	b	.L397
+.L415:
 	.align	2
-.L412:
+.L414:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3352,7 +3426,7 @@ FtlLoadFactoryBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L424
+	ldr	r4, .L426
 	mov	r6, #0
 	mvn	r9, #0
 	ldr	r3, [r4, #3284]
@@ -3361,22 +3435,22 @@ FtlLoadFactoryBbt:
 	add	r10, r4, #3264
 	str	r3, [r4, #3272]
 	str	r8, [r4, #3276]
-.L415:
+.L417:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L420
+	bcc	.L422
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L420:
+.L422:
 	ldrh	r5, [r4, #98]
 	strh	r9, [r7, #2]!	@ movhi
-.L417:
+.L419:
 	ldrh	r3, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L418
+	ble	.L420
 	mla	r3, r6, r3, r5
 	mov	r2, #1
 	mov	r1, r2
@@ -3386,18 +3460,18 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L417
+	beq	.L419
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L417
+	bne	.L419
 	strh	r5, [r7]	@ movhi
-.L418:
+.L420:
 	add	r6, r6, #1
-	b	.L415
-.L425:
+	b	.L417
+.L427:
 	.align	2
-.L424:
+.L426:
 	.word	.LANCHOR0
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
@@ -3414,7 +3488,7 @@ FtlGetLastWrittenPage:
 	sub	fp, ip, #4
 	sub	sp, sp, #84
 	cmp	r1, #1
-	ldr	r3, .L437
+	ldr	r3, .L439
 	lsl	r6, r0, #10
 	mov	r2, r1
 	mov	r7, r1
@@ -3422,7 +3496,7 @@ FtlGetLastWrittenPage:
 	ldrheq	r5, [r3, #104]
 	mov	r1, #1
 	ldrhne	r5, [r3, #102]
-	ldr	r3, .L437+4
+	ldr	r3, .L439+4
 	sub	r5, r5, #1
 	sxth	r5, r5
 	str	r3, [fp, #-108]
@@ -3434,12 +3508,12 @@ FtlGetLastWrittenPage:
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
 	moveq	r8, #0
-	beq	.L430
-.L429:
+	beq	.L432
+.L431:
 	mov	r0, r5
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L433:
+.L435:
 	add	r3, r8, r5
 	mov	r2, r7
 	add	r3, r3, r3, lsr #31
@@ -3452,25 +3526,25 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-96]
 	cmn	r3, #1
-	bne	.L431
+	bne	.L433
 	ldr	r3, [fp, #-92]
 	cmn	r3, #1
-	bne	.L431
+	bne	.L433
 	ldr	r3, [fp, #-116]
 	cmn	r3, #1
 	subne	r4, r4, #1
 	sxthne	r5, r4
-	bne	.L430
-.L431:
+	bne	.L432
+.L433:
 	add	r4, r4, #1
 	sxth	r8, r4
-.L430:
+.L432:
 	cmp	r8, r5
-	ble	.L433
-	b	.L429
-.L438:
+	ble	.L435
+	b	.L431
+.L440:
 	.align	2
-.L437:
+.L439:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -3488,7 +3562,7 @@ FlashProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #32
 	mov	r9, r3
-	ldr	r6, .L469
+	ldr	r6, .L471
 	mov	r10, r1
 	mov	r8, r2
 	mov	r4, r0
@@ -3496,28 +3570,28 @@ FlashProgPages:
 	mov	r7, #0
 	ldrh	r3, [r6, #12]
 	str	r3, [fp, #-72]
-.L440:
+.L442:
 	cmp	r7, r10
-	bne	.L448
+	bne	.L450
 	cmp	r9, #0
-	bne	.L455
-.L468:
+	bne	.L457
+.L470:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L448:
+.L450:
 	ldr	r3, [r5, #8]
 	cmp	r3, #0
-	beq	.L441
+	beq	.L443
 	ldr	r3, [r5, #12]
 	cmp	r3, #0
-	bne	.L442
-.L441:
+	bne	.L444
+.L443:
 	mov	r2, #131
-	ldr	r1, .L469+4
-	ldr	r0, .L469+8
+	ldr	r1, .L471+4
+	ldr	r0, .L471+8
 	bl	sftl_printk
-.L442:
+.L444:
 	sub	r2, fp, #68
 	sub	r1, fp, #64
 	mov	r0, r5
@@ -3534,7 +3608,7 @@ FlashProgPages:
 	strne	r3, [r5]
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L446
+	bne	.L448
 	ldr	r0, [fp, #-72]
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -3548,11 +3622,11 @@ FlashProgPages:
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r5]
-.L446:
+.L448:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L440
-.L453:
+	b	.L442
+.L455:
 	mov	r3, #0
 	mov	r2, r8
 	str	r3, [r9]
@@ -3566,54 +3640,54 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-60]
 	cmn	r3, #1
-	bne	.L450
+	bne	.L452
 	ldr	r1, [r4, #4]
-	ldr	r0, .L469+12
+	ldr	r0, .L471+12
 	str	r3, [fp, #-72]
 	bl	sftl_printk
 	ldr	r3, [fp, #-72]
 	str	r3, [r4]
-.L450:
+.L452:
 	ldr	r3, [r4, #12]
 	cmp	r3, #0
-	beq	.L451
+	beq	.L453
 	ldr	r2, [r3]
 	ldr	r3, [r6, #3292]
 	cmp	r2, r3
-	beq	.L451
+	beq	.L453
 	ldr	r1, [r4, #4]
-	ldr	r0, .L469+16
+	ldr	r0, .L471+16
 	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L451:
+.L453:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L452
+	beq	.L454
 	ldr	r2, [r3]
 	ldr	r3, [r9]
 	cmp	r2, r3
-	beq	.L452
+	beq	.L454
 	ldr	r1, [r4, #4]
-	ldr	r0, .L469+20
+	ldr	r0, .L471+20
 	bl	sftl_printk
 	mvn	r3, #0
 	str	r3, [r4]
-.L452:
+.L454:
 	add	r5, r5, #1
 	add	r4, r4, #20
-.L449:
+.L451:
 	cmp	r7, r5
-	bne	.L453
-	b	.L468
-.L455:
+	bne	.L455
+	b	.L470
+.L457:
 	mov	r5, #0
-	ldr	r9, .L469+24
-	ldr	r10, .L469+28
-	b	.L449
-.L470:
+	ldr	r9, .L471+24
+	ldr	r10, .L471+28
+	b	.L451
+.L472:
 	.align	2
-.L469:
+.L471:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
@@ -3637,17 +3711,17 @@ FlashEraseBlocks:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r6, #0
-	ldr	r5, .L482
+	ldr	r5, .L484
 	mov	r7, r2
 	mov	r4, r0
 	ldrh	r8, [r5, #12]
-.L472:
+.L474:
 	cmp	r6, r7
-	bne	.L478
+	bne	.L480
 	mov	r0, #0
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L478:
+.L480:
 	sub	r2, fp, #40
 	sub	r1, fp, #36
 	mov	r0, r4
@@ -3662,7 +3736,7 @@ FlashEraseBlocks:
 	strne	r3, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L476
+	bne	.L478
 	ldr	r1, [fp, #-36]
 	ldr	r3, [r5, #3252]
 	ldrb	r0, [fp, #-40]	@ zero_extendqisi2
@@ -3671,13 +3745,13 @@ FlashEraseBlocks:
 	cmp	r0, #0
 	mvnne	r3, #0
 	strne	r3, [r4]
-.L476:
+.L478:
 	add	r6, r6, #1
 	add	r4, r4, #20
-	b	.L472
-.L483:
+	b	.L474
+.L485:
 	.align	2
-.L482:
+.L484:
 	.word	.LANCHOR0
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
@@ -3699,12 +3773,12 @@ FtlFreeSysBlkQueueIn:
 	uxth	r3, r3
 	cmp	r3, r2
 	ldmfdhi	sp, {r4, r5, r6, fp, sp, pc}
-	ldr	r4, .L493
+	ldr	r4, .L495
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
 	cmp	r1, #0
-	beq	.L486
+	beq	.L488
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r6, r0
@@ -3722,7 +3796,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	add	r3, r3, #1
 	str	r3, [r4, #2560]
-.L486:
+.L488:
 	ldrh	r3, [r4, #218]
 	add	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3733,9 +3807,9 @@ FtlFreeSysBlkQueueIn:
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L494:
+.L496:
 	.align	2
-.L493:
+.L495:
 	.word	.LANCHOR0
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.align	2
@@ -3756,34 +3830,34 @@ FtlLowFormatEraseBlock:
 	uxtb	r6, r1
 	str	r3, [fp, #-48]
 	mov	r5, r10
-	ldr	r3, .L537
+	ldr	r3, .L539
 	mov	r4, r10
 	ldr	r2, [fp, #-48]
 	mov	r9, #20
 	mov	r8, r3
 	str	r2, [r3, #3808]
-.L496:
+.L498:
 	ldrh	r1, [r8, #32]
 	uxth	r2, r10
 	cmp	r1, r2
-	bhi	.L500
+	bhi	.L502
 	cmp	r5, #0
-	beq	.L495
+	beq	.L497
 	mov	r7, #0
 	mov	r9, #20
 	mov	r2, r5
 	mov	r1, #0
 	ldr	r0, [r8, #3804]
 	bl	FlashEraseBlocks
-.L503:
+.L505:
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L505
-.L506:
+	bhi	.L507
+.L508:
 	cmp	r6, #0
 	ldrhne	r3, [r8, #104]
 	moveq	r3, #6
-	ldr	r8, .L537
+	ldr	r8, .L539
 	streq	r3, [fp, #-60]
 	moveq	r3, #1
 	strne	r3, [fp, #-52]
@@ -3796,16 +3870,16 @@ FtlLowFormatEraseBlock:
 	mov	r3, #0
 	streq	r6, [fp, #-56]
 	str	r3, [fp, #-44]
-.L515:
+.L517:
 	mov	r7, #0
 	mov	r5, r7
-.L507:
+.L509:
 	ldrh	r1, [r8, #32]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L510
+	bhi	.L512
 	cmp	r5, #0
-	beq	.L495
+	beq	.L497
 	ldr	r2, [fp, #-56]
 	mov	r3, #1
 	mov	r1, r5
@@ -3813,10 +3887,10 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	r9, #0
 	mov	r2, #20
-.L512:
+.L514:
 	uxth	r3, r9
 	cmp	r5, r3
-	bhi	.L514
+	bhi	.L516
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-60]
 	add	r7, r3, r2
@@ -3825,13 +3899,13 @@ FtlLowFormatEraseBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r3, [fp, #-52]
 	cmp	r3, r2
-	bhi	.L515
+	bhi	.L517
 	mov	r7, #0
 	mov	r9, #20
-.L516:
+.L518:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L518
+	bhi	.L520
 	ldr	r3, [fp, #-48]
 	adds	r6, r6, #0
 	movne	r6, #1
@@ -3839,16 +3913,16 @@ FtlLowFormatEraseBlock:
 	movhi	r8, r6
 	orrls	r8, r6, #1
 	cmp	r8, #0
-	beq	.L495
+	beq	.L497
 	mov	r2, r5
 	ldr	r1, [fp, #-56]
 	ldr	r0, [r10, #3804]
 	bl	FlashEraseBlocks
-.L495:
+.L497:
 	mov	r0, r4
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L500:
+.L502:
 	uxth	r2, r10
 	ldr	r0, [r8, #3804]
 	mov	r3, #0
@@ -3860,17 +3934,17 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r7, r0
-	beq	.L497
+	beq	.L499
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L498
-.L497:
+	bne	.L500
+.L499:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
 	addne	r4, r4, #1
 	uxthne	r4, r4
-	bne	.L498
+	bne	.L500
 	ldr	r1, [r8, #3804]
 	lsl	r7, r7, #10
 	ldr	r2, [r8, #3812]
@@ -3888,25 +3962,25 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r0, r2
 	str	r2, [r1, #12]
-.L498:
+.L500:
 	add	r10, r10, #1
-	b	.L496
-.L505:
+	b	.L498
+.L507:
 	mul	r2, r9, r7
 	ldr	r1, [r8, #3804]
 	add	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cmn	r2, #1
-	bne	.L504
+	bne	.L506
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L504:
+.L506:
 	add	r7, r7, #1
-	b	.L503
-.L510:
+	b	.L505
+.L512:
 	uxth	r3, r7
 	mov	r2, #20
 	ldr	r0, [r8, #3804]
@@ -3919,15 +3993,15 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	cmp	r6, #0
 	mov	r9, r0
-	beq	.L508
+	beq	.L510
 	bl	IsBlkInVendorPart
 	cmp	r0, #0
-	bne	.L509
-.L508:
+	bne	.L511
+.L510:
 	mov	r0, r9
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #0
-	bne	.L509
+	bne	.L511
 	ldr	r1, [r8, #3804]
 	mov	r3, #20
 	mla	r1, r3, r5, r1
@@ -3947,16 +4021,16 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r0, r3
 	str	r3, [r1, #12]
-.L509:
+.L511:
 	add	r7, r7, #1
-	b	.L507
-.L514:
+	b	.L509
+.L516:
 	mul	r3, r2, r9
 	ldr	r1, [r10, #3804]
 	add	r0, r1, r3
 	ldr	r3, [r1, r3]
 	cmp	r3, #0
-	beq	.L513
+	beq	.L515
 	ldr	r0, [r0, #4]
 	add	r4, r4, #1
 	str	r2, [fp, #-64]
@@ -3964,28 +4038,28 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r2, [fp, #-64]
-.L513:
+.L515:
 	add	r9, r9, #1
-	b	.L512
-.L518:
+	b	.L514
+.L520:
 	cmp	r6, #0
-	beq	.L517
+	beq	.L519
 	mul	r3, r9, r7
 	ldr	r2, [r10, #3804]
 	add	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L517
+	bne	.L519
 	ldr	r0, [r1, #4]
 	mov	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L517:
+.L519:
 	add	r7, r7, #1
-	b	.L516
-.L538:
+	b	.L518
+.L540:
 	.align	2
-.L537:
+.L539:
 	.word	.LANCHOR0
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
@@ -4000,12 +4074,12 @@ FtlFreeSysBlkQueueOut:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L546
-	ldr	r6, .L546+4
-.L540:
+	ldr	r4, .L548
+	ldr	r6, .L548+4
+.L542:
 	ldrh	r1, [r4, #218]
 	cmp	r1, #0
-	beq	.L541
+	beq	.L543
 	ldrh	r3, [r4, #214]
 	sub	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -4035,23 +4109,23 @@ FtlFreeSysBlkQueueOut:
 	sub	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L542
+	bhi	.L544
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L541:
-	ldr	r0, .L546+8
+.L543:
+	ldr	r0, .L548+8
 	bl	sftl_printk
+.L546:
+	b	.L546
 .L544:
-	b	.L544
-.L542:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	sftl_printk
-	b	.L540
-.L547:
+	b	.L542
+.L549:
 	.align	2
-.L546:
+.L548:
 	.word	.LANCHOR0
 	.word	.LC84
 	.word	.LC83
@@ -4072,16 +4146,16 @@ ftl_map_blk_alloc_new_blk:
 	mov	r4, r0
 	mov	r3, #0
 	ldr	r2, [r0, #12]
-.L549:
+.L551:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L552
+	bcs	.L554
 	mov	r7, r2
 	add	r3, r3, #1
 	ldrh	r6, [r7]
 	add	r2, r2, #2
 	cmp	r6, #0
-	bne	.L549
+	bne	.L551
 	bl	FtlFreeSysBlkQueueOut
 	sub	r3, r0, #1
 	movw	r2, #65533
@@ -4089,14 +4163,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L550
-	ldr	r3, .L556
-	ldr	r0, .L556+4
+	bls	.L552
+	ldr	r3, .L558
+	ldr	r0, .L558+4
 	ldrh	r2, [r3, #218]
 	bl	sftl_printk
-.L551:
-	b	.L551
-.L550:
+.L553:
+	b	.L553
+.L552:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4105,20 +4179,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L552:
+.L554:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L554
+	bhi	.L556
 	movw	r2, #603
-	ldr	r1, .L556+8
-	ldr	r0, .L556+12
+	ldr	r1, .L558+8
+	ldr	r0, .L558+12
 	bl	sftl_printk
-.L554:
+.L556:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L557:
+.L559:
 	.align	2
-.L556:
+.L558:
 	.word	.LANCHOR0
 	.word	.LC85
 	.word	.LANCHOR1+160
@@ -4140,8 +4214,8 @@ FlashTestBlk:
 	uxth	r4, r0
 	cmp	r4, #11
 	movls	r4, #0
-	bls	.L558
-	ldr	r5, .L561
+	bls	.L560
+	ldr	r5, .L563
 	sub	r0, fp, #84
 	mov	r2, #32
 	mov	r1, #165
@@ -4149,7 +4223,7 @@ FlashTestBlk:
 	lsl	r4, r4, #10
 	str	r5, [fp, #-96]
 	bl	memset
-	ldr	r3, .L561+4
+	ldr	r3, .L563+4
 	mov	r2, #1
 	mov	r1, r2
 	sub	r0, fp, #104
@@ -4170,13 +4244,13 @@ FlashTestBlk:
 	movne	r4, #1
 	rsb	r4, r4, #0
 	bl	FlashEraseBlocks
-.L558:
+.L560:
 	mov	r0, r4
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L562:
+.L564:
 	.align	2
-.L561:
+.L563:
 	.word	ftl_temp_buf
 	.word	1515870810
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4192,7 +4266,7 @@ FlashGetBadBlockList:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L570
+	ldr	r5, .L572
 	mov	r4, r0
 	mov	r6, r1
 	mov	r2, #256
@@ -4204,30 +4278,30 @@ FlashGetBadBlockList:
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L564
+	bls	.L566
 	mov	r2, #256
 	mov	r1, #255
 	mov	r0, r4
 	bl	memset
 	mov	r0, #0
-.L564:
+.L566:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	moveq	r3, r4
 	addeq	r1, r3, r0, lsl #1
-	beq	.L566
+	beq	.L568
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L567:
+.L569:
 	ldrh	r2, [r3]
 	lsr	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-.L566:
+.L568:
 	cmp	r3, r1
-	bne	.L567
+	bne	.L569
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L571:
+.L573:
 	.align	2
-.L570:
+.L572:
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
@@ -4244,9 +4318,9 @@ ftl_memset:
 	sub	fp, ip, #4
 	cmp	r2, #0
 	mov	r4, r0
-	beq	.L573
+	beq	.L575
 	bl	memset
-.L573:
+.L575:
 	mov	r0, r4
 	ldmfd	sp, {r4, fp, sp, pc}
 	.size	ftl_memset, .-ftl_memset
@@ -4262,7 +4336,7 @@ FtlMemInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L678
+	ldr	r4, .L680
 	movw	r3, #65535
 	movw	r2, #3202
 	mov	r5, #0
@@ -4379,7 +4453,7 @@ FtlMemInit:
 	bl	ftl_malloc
 	str	r0, [r4, #3860]
 	ldrh	r0, [r7]
-	ldr	r3, .L678+4
+	ldr	r3, .L680+4
 	add	r0, r0, #544
 	add	r0, r0, #3
 	lsr	r0, r0, #9
@@ -4467,136 +4541,136 @@ FtlMemInit:
 	str	r0, [r4, #180]
 	lsl	r2, r2, #2
 	mov	r1, r2
-.L578:
+.L580:
 	cmp	r3, lr
-	bcc	.L579
-	ldr	r2, .L678+8
+	bcc	.L581
+	ldr	r2, .L680+8
 	mov	r1, #0
 	add	r3, r2, r3, lsl #2
 	add	r2, r2, #56
 	add	r3, r3, #24
-.L580:
+.L582:
 	cmp	r2, r3
-	bne	.L581
+	bne	.L583
 	ldr	r3, [r4, #3872]
 	cmp	r3, #0
-	bne	.L582
-.L584:
-	ldr	r1, .L678+12
-	ldr	r0, .L678+16
+	bne	.L584
+.L586:
+	ldr	r1, .L680+12
+	ldr	r0, .L680+16
 	bl	sftl_printk
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L579:
+.L581:
 	ldr	r0, [r4, #180]
 	add	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [ip, #4]!
-	b	.L578
-.L581:
-	str	r1, [r3, #4]!
 	b	.L580
-.L582:
+.L583:
+	str	r1, [r3, #4]!
+	b	.L582
+.L584:
 	ldr	r3, [r4, #3876]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3900]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3852]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3820]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3288]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #3860]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L584
-	ldr	r3, .L678
+	beq	.L586
+	ldr	r3, .L680
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L584
+	beq	.L586
 	ldr	r2, [r3, #3884]
 	cmp	r2, #0
-	beq	.L584
+	beq	.L586
 	ldr	r3, [r3, #3888]
 	cmp	r3, #0
-	beq	.L584
+	beq	.L586
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L679:
+.L681:
 	.align	2
-.L678:
+.L680:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
@@ -4615,10 +4689,10 @@ FtlBbt2Bitmap:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r6, .L686
+	ldr	r6, .L688
 	mov	r4, r0
 	mov	r7, r1
-	ldr	r8, .L686+4
+	ldr	r8, .L688+4
 	sub	r5, r4, #2
 	ldrh	r2, [r6]
 	add	r4, r4, #1020
@@ -4628,19 +4702,19 @@ FtlBbt2Bitmap:
 	mov	r0, r7
 	lsl	r2, r2, #2
 	bl	ftl_memset
-.L683:
+.L685:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
 	ldmfdeq	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L682
+	bhi	.L684
 	mov	r2, #74
 	mov	r1, r8
-	ldr	r0, .L686+8
+	ldr	r0, .L688+8
 	bl	sftl_printk
-.L682:
+.L684:
 	ldrh	r3, [r5, #2]!
 	mov	r0, #1
 	cmp	r4, r5
@@ -4649,11 +4723,11 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r3, r2, r0, lsl r3
 	str	r3, [r7, r1, lsl #2]
-	bne	.L683
+	bne	.L685
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L687:
+.L689:
 	.align	2
-.L686:
+.L688:
 	.word	.LANCHOR0+3904
 	.word	.LANCHOR1+197
 	.word	.LC1
@@ -4681,35 +4755,35 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	mov	r2, #0
-.L689:
+.L691:
 	ldrh	r1, [r4, #6]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L693
+	bhi	.L695
 	ldrh	r2, [r5]
 	mov	r7, #0
-	ldr	ip, .L702
+	ldr	ip, .L704
 	mov	r10, r7
-.L694:
+.L696:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r7
 	cmp	r1, r3
-	bhi	.L698
+	bhi	.L700
 	mov	r0, r10
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L693:
+.L695:
 	uxth	r3, r2
 	mov	r1, #0
 	ldr	r0, [r6, r3, lsl #2]
 	ubfx	r0, r0, #10, #16
-.L690:
+.L692:
 	ldrh	ip, [r4, #10]
 	uxth	r3, r1
 	cmp	ip, r3
 	addls	r2, r2, #1
-	bls	.L689
-.L692:
+	bls	.L691
+.L694:
 	uxth	r3, r1
 	add	r1, r1, #1
 	lsl	r3, r3, #1
@@ -4718,28 +4792,28 @@ ftl_free_no_use_map_blk:
 	ldrheq	ip, [r5, r3]
 	addeq	ip, ip, #1
 	strheq	ip, [r5, r3]	@ movhi
-	b	.L690
-.L698:
+	b	.L692
+.L700:
 	ldrh	r1, [r4]
 	uxth	r6, r7
 	cmp	r1, r3
-	bne	.L695
+	bne	.L697
 	ldrh	r0, [r4, #2]
 	ldrh	r1, [ip, #104]
 	cmp	r0, r1
 	lslcc	r0, r6, #1
 	strhcc	r1, [r5, r0]	@ movhi
-.L695:
+.L697:
 	lsl	r6, r6, #1
 	ldrh	r8, [r5, r6]
 	cmp	r2, r8
 	movhi	r10, r3
 	movhi	r2, r8
 	cmp	r8, #0
-	bne	.L697
+	bne	.L699
 	ldrh	r0, [r9, r6]
 	cmp	r0, #0
-	beq	.L697
+	beq	.L699
 	mov	r1, #1
 	str	ip, [fp, #-48]
 	str	r2, [fp, #-44]
@@ -4750,12 +4824,12 @@ ftl_free_no_use_map_blk:
 	ldr	r2, [fp, #-44]
 	sub	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L697:
+.L699:
 	add	r7, r7, #1
-	b	.L694
-.L703:
+	b	.L696
+.L705:
 	.align	2
-.L702:
+.L704:
 	.word	.LANCHOR0
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
@@ -4775,15 +4849,15 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L705
+	bne	.L707
 	ldrh	r3, [r0, #8]
 	cmp	r3, #0
-	beq	.L706
+	beq	.L708
 	movw	r2, #677
-	ldr	r1, .L714
-	ldr	r0, .L714+4
+	ldr	r1, .L716
+	ldr	r0, .L716+4
 	bl	sftl_printk
-.L706:
+.L708:
 	ldrh	r3, [r4, #8]
 	add	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4795,17 +4869,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	add	r3, r3, #1
 	str	r3, [r4, #28]
-.L707:
+.L709:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L705:
+.L707:
 	lsl	r3, r3, #1
 	ldr	r2, [r0, #28]
 	ldr	r6, [r0, #24]
 	mov	r1, #255
 	ldrh	r7, [r5, r3]
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L714+8
+	ldr	r5, .L716+8
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #3268]
 	ldr	r3, [r5, #3284]
@@ -4813,7 +4887,7 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r5, #3288]
 	str	r3, [r5, #3276]
 	str	r2, [r3, #4]
-	ldr	r2, .L714+12
+	ldr	r2, .L716+12
 	strh	r2, [r3, #8]	@ movhi
 	ldrh	r2, [r0, #4]
 	strh	r7, [r3, #2]	@ movhi
@@ -4824,27 +4898,27 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	mov	r2, #0
 	mov	r3, r2
-.L708:
+.L710:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L710
+	bhi	.L712
 	mov	r2, #1
 	mov	r3, #0
 	mov	r1, r2
-	ldr	r0, .L714+16
+	ldr	r0, .L716+16
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L707
-.L710:
+	b	.L709
+.L712:
 	uxth	r1, r2
 	ldr	r0, [r6, r1, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L709
+	bne	.L711
 	ldr	r0, [r5, #3284]
 	add	r3, r3, #1
 	uxth	r3, r3
@@ -4853,12 +4927,12 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r5, #3284]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L709:
+.L711:
 	add	r2, r2, #1
-	b	.L708
-.L715:
+	b	.L710
+.L717:
 	.align	2
-.L714:
+.L716:
 	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0
@@ -4877,13 +4951,13 @@ FtlMapWritePage:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r7, .L736
+	ldr	r7, .L738
 	mov	r4, r0
 	mov	r8, r1
 	mov	r9, r2
 	mov	r6, #0
 	mov	r5, r7
-.L717:
+.L719:
 	ldr	r3, [r7, #2524]
 	add	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -4891,35 +4965,35 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	bge	.L718
+	bge	.L720
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L719
-.L718:
+	bne	.L721
+.L720:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L719:
+.L721:
 	ldrh	r3, [r4]
 	ldr	r2, [r4, #12]
 	lsl	r3, r3, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L720
+	bne	.L722
 	movw	r2, #735
-	ldr	r1, .L736+4
-	ldr	r0, .L736+8
+	ldr	r1, .L738+4
+	ldr	r0, .L738+8
 	bl	sftl_printk
-.L720:
+.L722:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L721
+	bcc	.L723
 	mov	r2, #736
-	ldr	r1, .L736+4
-	ldr	r0, .L736+8
+	ldr	r1, .L738+4
+	ldr	r0, .L738+8
 	bl	sftl_printk
-.L721:
+.L723:
 	ldrh	r3, [r4]
 	mov	r1, #16
 	ldr	r2, [r4, #12]
@@ -4934,7 +5008,7 @@ FtlMapWritePage:
 	bl	__memzero
 	ldr	r3, [r5, #3276]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L736+12
+	ldr	r0, .L738+12
 	strh	r8, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -4950,10 +5024,10 @@ FtlMapWritePage:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r5, #3264]
 	cmn	r3, #1
-	bne	.L722
+	bne	.L724
 	ldr	r1, [r5, #3268]
 	add	r6, r6, #1
-	ldr	r0, .L736+16
+	ldr	r0, .L738+16
 	uxth	r6, r6
 	bl	sftl_printk
 	ldrh	r3, [r4, #2]
@@ -4962,34 +5036,34 @@ FtlMapWritePage:
 	subls	r3, r3, #1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L724
+	bls	.L726
 	mov	r2, r6
 	ldr	r1, [r5, #3268]
-	ldr	r0, .L736+20
+	ldr	r0, .L738+20
 	bl	sftl_printk
-.L725:
-	b	.L725
-.L724:
+.L727:
+	b	.L727
+.L726:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L717
-.L735:
-	b	.L735
-.L722:
+	beq	.L719
+.L737:
+	b	.L737
+.L724:
 	cmp	r3, #0
 	strhne	r10, [r4, #40]	@ movhi
 	cmp	r0, #1
 	cmpne	r3, #256
 	moveq	r0, #1
 	movne	r0, #0
-	beq	.L717
+	beq	.L719
 	ldr	r2, [r5, #3268]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L737:
+.L739:
 	.align	2
-.L736:
+.L738:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+242
 	.word	.LC1
@@ -5009,22 +5083,22 @@ load_l2p_region:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L745
+	ldr	r4, .L747
 	uxth	r6, r0
 	uxth	r8, r1
 	ldrh	r3, [r4, #136]
 	cmp	r3, r6
-	bcs	.L739
+	bcs	.L741
 	movw	r2, #510
-	ldr	r1, .L745+4
-	ldr	r0, .L745+8
+	ldr	r1, .L747+4
+	ldr	r0, .L747+8
 	bl	sftl_printk
-.L739:
+.L741:
 	ldr	r3, [r4, #3892]
 	mov	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
 	cmp	r7, #0
-	bne	.L740
+	bne	.L742
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	ldrh	r2, [r4, #110]
@@ -5037,14 +5111,14 @@ load_l2p_region:
 	ldr	r3, [r4, #2492]
 	add	r5, r3, r5
 	str	r7, [r5, #4]
-.L741:
+.L743:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L740:
+.L742:
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	mov	r2, #1
-	ldr	r0, .L745+12
+	ldr	r0, .L747+12
 	mov	r1, r2
 	str	r7, [r4, #3268]
 	add	r3, r3, r5
@@ -5056,12 +5130,12 @@ load_l2p_region:
 	ldr	r3, [r4, #3264]
 	ldr	r8, [r4, #3276]
 	cmp	r3, #256
-	bne	.L742
+	bne	.L744
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L745+16
+	ldr	r0, .L747+16
 	bl	sftl_printk
-	ldr	r0, .L745+20
+	ldr	r0, .L747+20
 	lsr	r3, r7, #10
 	mov	r1, r6
 	strh	r3, [r0, #40]	@ movhi
@@ -5069,42 +5143,42 @@ load_l2p_region:
 	add	r3, r3, r5
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-.L742:
+.L744:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L743
+	beq	.L745
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L745+24
+	ldr	r0, .L747+24
 	bl	sftl_printk
 	mov	r3, #4
 	ldr	r1, [r4, #3276]
 	mov	r2, r3
-	ldr	r0, .L745+28
+	ldr	r0, .L747+28
 	bl	rknand_print_hex
 	ldrh	r3, [r4, #136]
 	mov	r2, #4
 	ldr	r1, [r4, #3892]
-	ldr	r0, .L745+32
+	ldr	r0, .L747+32
 	bl	rknand_print_hex
-.L743:
+.L745:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L744
+	beq	.L746
 	movw	r2, #535
-	ldr	r1, .L745+4
-	ldr	r0, .L745+8
+	ldr	r1, .L747+4
+	ldr	r0, .L747+8
 	bl	sftl_printk
-.L744:
+.L746:
 	ldr	r3, [r4, #2492]
 	mov	r1, #0
 	add	r2, r3, r5
 	str	r1, [r2, #4]
 	strh	r6, [r3, r5]	@ movhi
-	b	.L741
-.L746:
+	b	.L743
+.L748:
 	.align	2
-.L745:
+.L747:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+258
 	.word	.LC1
@@ -5136,35 +5210,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	ldrh	r1, [r4, #40]
 	sub	r3, ip, #4
-	ldr	r5, .L770
+	ldr	r5, .L772
 	cmp	r2, r3
-	bge	.L748
+	bge	.L750
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L750
+	beq	.L752
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L751
-.L748:
+	bcc	.L753
+.L750:
 	movw	r3, #65535
 	uxth	r0, r0
 	cmp	r1, r3
-	beq	.L752
+	beq	.L754
 	ldrh	r2, [r5, #104]
 	ldrh	r3, [r4, #2]
 	cmp	r2, r3
 	subls	lr, r6, #2
 	movls	r2, #0
-	bls	.L753
-.L752:
+	bls	.L755
+.L754:
 	lsl	r0, r0, #1
 	ldrh	r8, [r6, r0]
 	cmp	r8, #0
-	beq	.L750
+	beq	.L752
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L750
+	bne	.L752
 	mov	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r6, r0]	@ movhi
@@ -5174,62 +5248,62 @@ ftl_map_blk_gc:
 	strh	r3, [r4, #8]	@ movhi
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L757
+	bcc	.L759
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L757:
+.L759:
 	mov	r6, #0
-.L758:
+.L760:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L765
+	bhi	.L767
 	mov	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	mov	r3, #0
 	str	r3, [r4, #32]
-.L750:
+.L752:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L751
+	bcc	.L753
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L751:
+.L753:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L755:
+.L757:
 	ldrh	r10, [lr, #2]!
 	add	r8, r2, #1
 	cmp	r10, r1
-	beq	.L754
+	beq	.L756
 	mov	r2, r8
-.L753:
+.L755:
 	uxth	r7, r2
 	cmp	r7, ip
-	bcc	.L755
+	bcc	.L757
 	mov	r7, r0
-.L754:
+.L756:
 	uxth	r2, r2
-	ldr	r0, .L770+4
+	ldr	r0, .L772+4
 	lsl	r2, r2, #1
 	ldrh	r2, [r6, r2]
 	bl	sftl_printk
 	mvn	r3, #0
 	mov	r0, r7
 	strh	r3, [r4, #40]	@ movhi
-	b	.L752
-.L765:
+	b	.L754
+.L767:
 	uxth	r7, r6
 	add	r3, r9, r7, lsl #2
 	str	r3, [fp, #-44]
 	ldr	r3, [r9, r7, lsl #2]
 	cmp	r8, r3, lsr #10
-	bne	.L759
+	bne	.L761
 	ldr	r3, [r5, #3848]
-	ldr	r0, .L770+8
+	ldr	r0, .L772+8
 	str	r3, [r5, #3272]
 	ldr	r3, [r5, #3288]
 	str	r3, [r5, #3276]
@@ -5242,40 +5316,40 @@ ftl_map_blk_gc:
 	ldr	r3, [fp, #-48]
 	ldrh	r2, [r3, #8]
 	cmp	r2, r10
-	beq	.L760
+	beq	.L762
 	movw	r2, #647
-	ldr	r1, .L770+12
-	ldr	r0, .L770+16
+	ldr	r1, .L772+12
+	ldr	r0, .L772+16
 	bl	sftl_printk
 	ldr	r3, [fp, #-48]
-.L760:
+.L762:
 	ldr	r2, [r5, #3264]
 	cmn	r2, #1
-	bne	.L761
-.L763:
+	bne	.L763
+.L765:
 	ldr	r2, [fp, #-44]
 	mov	r3, #0
 	str	r3, [r2]
-.L762:
-	b	.L762
-.L761:
+.L764:
+	b	.L764
+.L763:
 	ldrh	r2, [r3, #8]
 	cmp	r2, r10
-	bne	.L763
+	bne	.L765
 	ldrh	r2, [r3]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L763
+	bne	.L765
 	ldr	r2, [r5, #3272]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L759:
+.L761:
 	add	r6, r6, #1
-	b	.L758
-.L771:
+	b	.L760
+.L773:
 	.align	2
-.L770:
+.L772:
 	.word	.LANCHOR0
 	.word	.LC93
 	.word	.LANCHOR0+3264
@@ -5294,7 +5368,7 @@ flush_l2p_region:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L773
+	ldr	r5, .L775
 	uxth	r0, r0
 	mov	r4, #12
 	mul	r4, r4, r0
@@ -5312,9 +5386,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L774:
+.L776:
 	.align	2
-.L773:
+.L775:
 	.word	.LANCHOR0
 	.size	flush_l2p_region, .-flush_l2p_region
 	.align	2
@@ -5331,7 +5405,7 @@ log2phys:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mvn	r6, #0
-	ldr	r4, .L789
+	ldr	r4, .L791
 	mov	r7, r1
 	mov	r10, r2
 	ldrh	r3, [r4, #108]
@@ -5342,20 +5416,20 @@ log2phys:
 	uxth	r8, r9
 	uxth	r6, r6
 	cmp	r0, r3
-	bcc	.L776
+	bcc	.L778
 	movw	r2, #847
-	ldr	r1, .L789+4
-	ldr	r0, .L789+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	sftl_printk
-.L776:
+.L778:
 	ldrh	r1, [r4, #138]
 	mov	r2, #0
 	ldr	r0, [r4, #2492]
 	mov	r3, #12
-.L777:
+.L779:
 	uxth	r5, r2
 	cmp	r5, r1
-	bcc	.L782
+	bcc	.L784
 	str	r3, [fp, #-44]
 	bl	select_l2p_ram_region
 	ldr	r3, [fp, #-44]
@@ -5366,32 +5440,32 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L783
+	beq	.L785
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L783
+	bge	.L785
 	bl	flush_l2p_region
-.L783:
+.L785:
 	mov	r1, r5
 	uxth	r0, r9
 	bl	load_l2p_region
-	b	.L778
-.L782:
+	b	.L780
+.L784:
 	add	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r8
-	bne	.L777
-.L778:
+	bne	.L779
+.L780:
 	cmp	r10, #0
 	mov	r3, #12
-	bne	.L779
+	bne	.L781
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r5, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r6, lsl #2]
 	str	r3, [r7]
-.L780:
+.L782:
 	ldr	r2, [r4, #2492]
 	mov	r3, #12
 	mov	r0, #0
@@ -5401,7 +5475,7 @@ log2phys:
 	addne	r3, r3, #1
 	strne	r3, [r5, #4]
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L779:
+.L781:
 	mul	r3, r3, r5
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5413,12 +5487,12 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L789+12
+	ldr	r3, .L791+12
 	strh	r8, [r3]	@ movhi
-	b	.L780
-.L790:
+	b	.L782
+.L792:
 	.align	2
-.L789:
+.L791:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5438,7 +5512,7 @@ FtlReUsePrevPpa:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r6, r0
-	ldr	r7, .L801
+	ldr	r7, .L803
 	ubfx	r0, r1, #10, #16
 	str	r1, [fp, #-32]
 	bl	P2V_block_in_plane
@@ -5446,34 +5520,34 @@ FtlReUsePrevPpa:
 	lsl	r5, r0, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #0
-	bne	.L792
+	bne	.L794
 	ldr	r4, [r7, #2340]
 	cmp	r4, #0
-	beq	.L793
+	beq	.L795
 	movw	r2, #2344
 	movw	lr, #65535
 	ldrh	ip, [r7, r2]
 	ldr	r2, [r7, #2316]
 	sub	r4, r4, r2
 	ubfx	r4, r4, #3, #16
-.L794:
+.L796:
 	uxth	r1, r3
 	cmp	ip, r1
-	bls	.L793
+	bls	.L795
 	cmp	r4, r0
-	bne	.L795
+	bne	.L797
 	mov	r1, r4
-	ldr	r0, .L801+4
+	ldr	r0, .L803+4
 	bl	List_remove_node
 	movw	r3, #2344
 	ldrh	r3, [r7, r3]
 	cmp	r3, #0
-	bne	.L796
+	bne	.L798
 	movw	r2, #1737
-	ldr	r1, .L801+8
-	ldr	r0, .L801+12
+	ldr	r1, .L803+8
+	ldr	r0, .L803+12
 	bl	sftl_printk
-.L796:
+.L798:
 	movw	r2, #2344
 	mov	r0, r4
 	ldrh	r3, [r7, r2]
@@ -5482,25 +5556,25 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r7, #2324]
 	ldrh	r3, [r2, r5]
-.L792:
+.L794:
 	add	r3, r3, #1
 	strh	r3, [r2, r5]	@ movhi
-	b	.L793
-.L795:
+	b	.L795
+.L797:
 	lsl	r4, r4, #3
 	add	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L794
-.L793:
+	bne	.L796
+.L795:
 	mov	r2, #1
 	sub	r1, fp, #32
 	mov	r0, r6
 	bl	log2phys
 	ldmib	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L802:
+.L804:
 	.align	2
-.L801:
+.L803:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2340
 	.word	.LANCHOR1+298
@@ -5520,39 +5594,39 @@ ftl_scan_all_data:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r6, .L811
+	ldr	r6, .L813
 	mov	r1, #0
-	ldr	r0, .L811+4
+	ldr	r0, .L813+4
 	bl	sftl_printk
 	mov	r4, r6
-.L804:
+.L806:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L810
+	bcc	.L812
 	sub	sp, fp, #28
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L810:
+.L812:
 	mov	r2, #0
 	sub	r1, fp, #32
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
 	cmp	r3, #0
-	bne	.L805
+	bne	.L807
 	ldr	r2, [fp, #-32]
 	mov	r1, r5
-	ldr	r0, .L811+8
+	ldr	r0, .L813+8
 	bl	sftl_printk
-.L805:
+.L807:
 	ldr	r3, [fp, #-32]
 	cmn	r3, #1
-	beq	.L807
+	beq	.L809
 	str	r3, [r4, #3268]
 	mov	r2, #0
 	ldr	r3, [r4, #3284]
 	mov	r1, #1
 	ldr	r7, [r4, #3288]
-	ldr	r0, .L811+12
+	ldr	r0, .L813+12
 	str	r3, [r4, #3272]
 	str	r5, [r4, #3280]
 	str	r7, [r4, #3276]
@@ -5561,14 +5635,14 @@ ftl_scan_all_data:
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
 	cmpne	r3, #256
-	beq	.L808
+	beq	.L810
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L807
-.L808:
+	beq	.L809
+.L810:
 	ldr	r2, [r4, #3272]
 	ldr	r3, [r4, #3276]
-	ldr	r0, .L811+16
+	ldr	r0, .L813+16
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5583,12 +5657,12 @@ ftl_scan_all_data:
 	ldr	r3, [r3]
 	ldr	r2, [r4, #3268]
 	bl	sftl_printk
-.L807:
+.L809:
 	add	r5, r5, #1
-	b	.L804
-.L812:
+	b	.L806
+.L814:
 	.align	2
-.L811:
+.L813:
 	.word	.LANCHOR0
 	.word	.LC94
 	.word	.LC95
@@ -5608,21 +5682,21 @@ FtlReadRefresh:
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #88
-	ldr	r3, .L826
+	ldr	r3, .L828
 	ldr	r0, [r3, #2716]
 	mov	r4, r3
 	cmp	r0, #0
-	beq	.L814
+	beq	.L816
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L815
+	bcs	.L817
 	mov	r5, #2048
-.L820:
+.L822:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L817
+	bcs	.L819
 	mov	r2, #0
 	sub	r1, fp, #108
 	bl	log2phys
@@ -5631,10 +5705,10 @@ FtlReadRefresh:
 	cmn	r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L818
+	beq	.L820
 	str	r3, [fp, #-88]
 	sub	r0, fp, #20
-	ldr	r3, .L826+4
+	ldr	r3, .L828+4
 	mov	r1, #1
 	str	r2, [fp, #-100]
 	mov	r2, #0
@@ -5645,53 +5719,53 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [fp, #-104]
 	cmp	r3, #256
-	bne	.L817
+	bne	.L819
 	ldr	r0, [fp, #-108]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L817:
+.L819:
 	mvn	r0, #0
-.L813:
+.L815:
 	sub	sp, fp, #20
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L818:
+.L820:
 	subs	r5, r5, #1
-	bne	.L820
-	b	.L817
-.L815:
+	bne	.L822
+	b	.L819
+.L817:
 	ldr	r2, [r3, #2508]
 	mov	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L813
-.L814:
+	b	.L815
+.L816:
 	ldr	r1, [r3, #2508]
 	ldr	r2, [r3, #2712]
 	add	ip, r1, #1048576
 	cmp	r2, ip
-	bhi	.L823
+	bhi	.L825
 	ldr	r3, [r3, #2564]
 	mov	ip, #33554432
 	lsr	r3, r3, #10
 	add	r2, r2, ip, asr r3
 	cmp	r1, r2
-	bhi	.L823
-	ldr	r3, .L826+8
+	bhi	.L825
+	ldr	r3, .L828+8
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L813
-.L823:
+	bne	.L815
+.L825:
 	mov	r3, #1
 	mov	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L813
-.L827:
+	b	.L815
+.L829:
 	.align	2
-.L826:
+.L828:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.word	.LANCHOR0+2268
@@ -5710,110 +5784,110 @@ ftl_check_vpc:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r4, #0
-	ldr	r6, .L852
-	ldr	r1, .L852+4
-	ldr	r0, .L852+8
+	ldr	r6, .L854
+	ldr	r1, .L854+4
+	ldr	r0, .L854+8
 	mov	r5, r6
 	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L852+12
+	ldr	r0, .L854+12
 	bl	__memzero
-.L829:
+.L831:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L831
-	ldr	r8, .L852+12
+	bcc	.L833
+	ldr	r8, .L854+12
 	mov	r4, #0
-	ldr	r9, .L852+16
+	ldr	r9, .L854+16
 	mov	r6, r4
-.L832:
+.L834:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L834
+	bhi	.L836
 	ldr	r4, [r5, #2340]
 	cmp	r4, #0
-	beq	.L835
+	beq	.L837
 	movw	r3, #2344
-	ldr	r9, .L852+12
+	ldr	r9, .L854+12
 	ldrh	r8, [r5, r3]
 	mov	r7, #0
 	ldr	r3, [r5, #2316]
-	ldr	r10, .L852+20
+	ldr	r10, .L854+20
 	sub	r4, r4, r3
 	ubfx	r4, r4, #3, #16
-.L836:
+.L838:
 	uxth	r3, r7
 	cmp	r8, r3
-	bls	.L835
+	bls	.L837
 	ldr	r2, [r5, #2324]
 	lsl	r3, r4, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	beq	.L837
+	beq	.L839
 	mov	r6, #1
 	ldrh	r3, [r9, r3]
 	mov	r1, r4
 	mov	r0, r10
 	bl	sftl_printk
-.L837:
+.L839:
 	ldr	r3, [r5, #2316]
 	lsl	r4, r4, #3
 	add	r7, r7, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L836
-.L835:
+	bne	.L838
+.L837:
 	cmp	r6, #0
 	ldmibeq	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
 	movw	r2, #2373
-	ldr	r1, .L852+4
-	ldr	r0, .L852+24
+	ldr	r1, .L854+4
+	ldr	r0, .L854+24
 	bl	sftl_printk
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L831:
+.L833:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L830
+	beq	.L832
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, .L852+12
+	ldr	r2, .L854+12
 	lsl	r0, r0, #1
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L830:
+.L832:
 	add	r4, r4, #1
-	b	.L829
-.L834:
+	b	.L831
+.L836:
 	uxth	r1, r4
 	ldr	r3, [r5, #2324]
 	lsl	r7, r1, #1
 	ldrh	r2, [r3, r7]
 	ldrh	r3, [r8, r7]
 	cmp	r2, r3
-	beq	.L833
+	beq	.L835
 	mov	r0, r9
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	movw	r2, #65535
 	ldrh	r3, [r3, r7]
 	cmp	r3, r2
-	beq	.L833
+	beq	.L835
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
 	movhi	r6, #1
-.L833:
+.L835:
 	add	r4, r4, #1
-	b	.L832
-.L853:
+	b	.L834
+.L855:
 	.align	2
-.L852:
+.L854:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+314
 	.word	.LC97
@@ -5841,7 +5915,7 @@ FtlMapBlkWriteDump_data:
 	mov	r3, #0
 	ldrh	r5, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L861
+	ldr	r3, .L863
 	ldr	r2, [r0, #24]
 	sub	r5, r5, #1
 	uxth	r5, r5
@@ -5853,25 +5927,25 @@ FtlMapBlkWriteDump_data:
 	ldr	r2, [r2, r5, lsl #2]
 	cmp	r2, #0
 	str	r2, [r3, #3268]
-	beq	.L856
+	beq	.L858
 	mov	r2, #1
 	add	r0, r3, #3264
 	mov	r1, r2
 	bl	FlashReadPages
-.L857:
+.L859:
 	ldr	r2, [r4, #3272]
 	mov	r1, r5
 	mov	r0, r6
 	bl	FtlMapWritePage
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L856:
+.L858:
 	ldrh	r2, [r3, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L857
-.L862:
+	b	.L859
+.L864:
 	.align	2
-.L861:
+.L863:
 	.word	.LANCHOR0
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
@@ -5888,7 +5962,7 @@ FtlScanSysBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	r5, #0
-	ldr	r4, .L944
+	ldr	r4, .L946
 	mov	r1, r5
 	ldr	r2, [r4, #128]
 	add	r3, r4, #3952
@@ -5920,11 +5994,11 @@ FtlScanSysBlk:
 	str	r3, [r4, #2584]
 	ldrh	r3, [r4, #40]
 	str	r3, [fp, #-44]
-.L864:
+.L866:
 	ldrh	r3, [r6, #42]
 	ldr	r2, [fp, #-44]
 	cmp	r3, r2
-	bls	.L905
+	bls	.L907
 	ldr	r1, [r6, #3176]
 	mov	r7, #0
 	ldrh	r2, [r6, #32]
@@ -5933,9 +6007,9 @@ FtlScanSysBlk:
 	ldr	r3, [r6, #3172]
 	str	r1, [fp, #-48]
 	ldrh	r9, [r6, #112]
-	ldr	ip, .L944+4
-	b	.L906
-.L866:
+	ldr	ip, .L946+4
+	b	.L908
+.L868:
 	ldrb	r0, [ip, r7]	@ zero_extendqisi2
 	ldr	r1, [fp, #-44]
 	str	r3, [fp, #-64]
@@ -5948,7 +6022,7 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	ldr	r2, [fp, #-60]
 	ldr	r3, [fp, #-64]
-	bne	.L865
+	bne	.L867
 	mov	r1, #20
 	mla	r0, r1, r10, r8
 	ldr	r1, [fp, #-52]
@@ -5964,31 +6038,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, r10, #1
 	uxth	r10, r1
-.L865:
+.L867:
 	add	r7, r7, #1
-.L906:
+.L908:
 	uxth	r1, r7
 	cmp	r2, r1
-	bhi	.L866
+	bhi	.L868
 	cmp	r10, #0
-	bne	.L867
-.L904:
+	bne	.L869
+.L906:
 	ldr	r3, [fp, #-44]
 	add	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [fp, #-44]
-	b	.L864
-.L867:
+	b	.L866
+.L869:
 	mov	r2, #1
 	mov	r1, r10
 	mov	r0, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L943:
+.L945:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r10, r3
-	bls	.L904
+	bls	.L906
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
@@ -6000,9 +6074,9 @@ FtlScanSysBlk:
 	cmn	r3, #1
 	lsr	ip, r1, #10
 	uxth	r8, ip
-	bne	.L871
+	bne	.L873
 	mov	r3, #16
-.L873:
+.L875:
 	ldr	r0, [r4, #3836]
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
@@ -6018,72 +6092,72 @@ FtlScanSysBlk:
 	ldr	ip, [fp, #-56]
 	cmp	r2, r3
 	ldr	r3, [fp, #-52]
-	bne	.L870
+	bne	.L872
 	ldr	r3, [r4, #3836]
 	mvn	r2, #0
 	str	r2, [r3, r9]
 	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r9]
 	cmp	r3, r2
-	bne	.L871
-.L872:
+	bne	.L873
+.L874:
 	mov	r1, #0
 	uxth	r0, ip
 	bl	FtlFreeSysBlkQueueIn
-	b	.L876
-.L870:
+	b	.L878
+.L872:
 	ldr	r2, [r4, #3836]
 	ldr	r2, [r2, r9]
 	cmn	r2, #1
-	bne	.L871
+	bne	.L873
 	sub	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #0
-	bne	.L873
-	b	.L872
-.L871:
+	bne	.L875
+	b	.L874
+.L873:
 	ldr	r2, [r6, #2540]
 	ldr	r3, [r7, #4]
 	cmn	r2, #1
-	beq	.L874
+	beq	.L876
 	cmp	r2, r3
-	bhi	.L875
-.L874:
+	bhi	.L877
+.L876:
 	cmn	r3, #1
 	addne	r2, r3, #1
 	strne	r2, [r5, #2540]
-.L875:
+.L877:
 	ldrh	r2, [r7]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L877
-	bhi	.L878
+	beq	.L879
+	bhi	.L880
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L879
-.L876:
+	beq	.L881
+.L878:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L943
-.L878:
+	b	.L945
+.L880:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L880
+	beq	.L882
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L872
-	b	.L876
-.L880:
-	ldr	r9, .L944+8
+	beq	.L874
+	b	.L878
+.L882:
+	ldr	r9, .L946+8
 	ldr	r3, [r4, #128]
 	ldrh	r2, [r9]
 	cmp	r2, r3
-	bls	.L882
+	bls	.L884
 	movw	r2, #1256
-	ldr	r1, .L944+12
-	ldr	r0, .L944+16
+	ldr	r1, .L946+12
+	ldr	r0, .L946+16
 	bl	sftl_printk
-.L882:
+.L884:
 	ldr	r0, [r4, #128]
 	ldrh	r2, [r9]
 	ldr	ip, [r4, #3896]
@@ -6094,34 +6168,34 @@ FtlScanSysBlk:
 	sxth	r3, r3
 	sxth	r1, r1
 	str	r1, [fp, #-52]
-.L883:
+.L885:
 	ldr	r1, [fp, #-52]
 	cmp	r3, r1
-	bgt	.L889
+	bgt	.L891
 	cmp	r3, #0
-	bge	.L921
-	b	.L876
-.L889:
+	bge	.L923
+	b	.L878
+.L891:
 	lsl	lr, r3, #2
 	ldr	r1, [r7, #4]
 	str	lr, [fp, #-56]
 	ldr	lr, [ip, r3, lsl #2]
 	cmp	r1, lr
-	bls	.L884
+	bls	.L886
 	ldr	r1, [ip]
 	cmp	r1, #0
-	bne	.L885
+	bne	.L887
 	cmp	r0, r2
 	addne	r2, r2, #1
 	strhne	r2, [r9]	@ movhi
-.L885:
+.L887:
 	uxth	ip, r3
 	mov	r1, #0
-.L886:
+.L888:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L887
+	bhi	.L889
 	ldr	r1, [r7, #4]
 	cmp	r3, #0
 	ldr	r2, [r5, #3896]
@@ -6130,16 +6204,16 @@ FtlScanSysBlk:
 	lsl	r2, r3, #1
 	ldr	r1, [r5, #3872]
 	strh	r8, [r1, r2]	@ movhi
-	blt	.L876
-	ldr	r2, .L944+8
+	blt	.L878
+	ldr	r2, .L946+8
 	ldr	r1, [r5, #128]
 	ldrh	r2, [r2]
 	sub	r1, r1, r2
 	sub	r1, r1, #1
 	sxth	r1, r1
 	cmp	r3, r1
-	bgt	.L876
-.L921:
+	bgt	.L878
+.L923:
 	add	r2, r2, #1
 	ldr	r1, [r7, #4]
 	strh	r2, [r9]	@ movhi
@@ -6147,10 +6221,10 @@ FtlScanSysBlk:
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
 	ldr	r2, [r4, #3872]
-.L941:
+.L943:
 	strh	r8, [r2, r3]	@ movhi
-	b	.L876
-.L887:
+	b	.L878
+.L889:
 	ldr	r0, [r6, #3896]
 	add	r1, r1, #1
 	add	lr, r0, r2, lsl #2
@@ -6161,21 +6235,21 @@ FtlScanSysBlk:
 	add	lr, r0, r2
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r2]	@ movhi
-	b	.L886
-.L884:
+	b	.L888
+.L886:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L883
-.L879:
+	b	.L885
+.L881:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L892
+	bls	.L894
 	movw	r2, #1297
-	ldr	r1, .L944+12
-	ldr	r0, .L944+16
+	ldr	r1, .L946+12
+	ldr	r0, .L946+16
 	bl	sftl_printk
-.L892:
+.L894:
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
 	ldr	ip, [r4, #3884]
@@ -6183,15 +6257,15 @@ FtlScanSysBlk:
 	sxth	r3, r0
 	sub	r0, r0, r1
 	str	r0, [fp, #-52]
-.L893:
+.L895:
 	ldr	r0, [fp, #-52]
 	cmp	r3, r0
-	ble	.L898
+	ble	.L900
 	ldr	r9, [ip, r3, lsl #2]
 	lsl	lr, r3, #2
 	ldr	r0, [r7, #4]
 	cmp	r0, r9
-	bls	.L894
+	bls	.L896
 	sub	r2, r2, r1
 	ldr	r0, [ip]
 	clz	r2, r2
@@ -6203,27 +6277,27 @@ FtlScanSysBlk:
 	addeq	r1, r1, #1
 	strheq	r1, [r5, #144]	@ movhi
 	mov	r1, #0
-.L896:
+.L898:
 	uxth	r0, r1
 	sxth	r2, r1
 	cmp	ip, r0
-	bhi	.L897
+	bhi	.L899
 	ldr	r1, [r7, #4]
 	ldr	r2, [r5, #3884]
 	str	r1, [r2, lr]
 	lsl	r2, r3, #1
 	ldr	r1, [r5, #148]
 	strh	r8, [r1, r2]	@ movhi
-.L898:
+.L900:
 	cmp	r3, #0
-	blt	.L876
+	blt	.L878
 	ldrh	r2, [r5, #120]
 	ldrh	r1, [r5, #144]
 	sub	r2, r2, #1
 	sub	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L876
+	bgt	.L878
 	add	r1, r1, #1
 	ldr	r2, [r5, #3884]
 	strh	r1, [r5, #144]	@ movhi
@@ -6231,8 +6305,8 @@ FtlScanSysBlk:
 	str	r1, [r2, r3, lsl #2]
 	lsl	r3, r3, #1
 	ldr	r2, [r5, #148]
-	b	.L941
-.L897:
+	b	.L943
+.L899:
 	ldr	r0, [r6, #3884]
 	add	r1, r1, #1
 	add	r9, r0, r2, lsl #2
@@ -6243,81 +6317,81 @@ FtlScanSysBlk:
 	add	r9, r0, r2
 	ldrh	r9, [r9, #2]
 	strh	r9, [r0, r2]	@ movhi
-	b	.L896
-.L894:
+	b	.L898
+.L896:
 	sub	r3, r3, #1
 	sxth	r3, r3
-	b	.L893
-.L877:
-	ldr	r9, .L944+20
+	b	.L895
+.L879:
+	ldr	r9, .L946+20
 	movw	r2, #65535
 	ldrh	r1, [r9]
 	cmp	r1, r2
 	strheq	r8, [r9]	@ movhi
-	beq	.L942
+	beq	.L944
 	ldrh	r0, [r9, #4]
 	cmp	r0, r2
-	beq	.L901
+	beq	.L903
 	mov	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L901:
+.L903:
 	ldr	r3, [r7, #4]
 	ldr	r2, [r4, #2584]
 	cmp	r2, r3
 	strhcs	r8, [r9, #4]	@ movhi
-	bcs	.L876
+	bcs	.L878
 	ldrh	r3, [r9]
 	strh	r8, [r9]	@ movhi
 	strh	r3, [r9, #4]	@ movhi
 	ldr	r3, [r7, #4]
-.L942:
+.L944:
 	str	r3, [r4, #2584]
-	b	.L876
-.L905:
+	b	.L878
+.L907:
 	ldr	r2, [r6, #3872]
 	ldrh	r3, [r2]
 	cmp	r3, #0
-	beq	.L907
-.L910:
+	beq	.L909
+.L912:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L908
-.L909:
-	ldr	r3, .L944+8
+	beq	.L910
+.L911:
+	ldr	r3, .L946+8
 	ldrh	r2, [r3]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L940
+	bls	.L942
 	movw	r2, #1422
-	ldr	r1, .L944+12
-	ldr	r0, .L944+16
+	ldr	r1, .L946+12
+	ldr	r0, .L946+16
 	bl	sftl_printk
-.L940:
+.L942:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L907:
-	ldr	r1, .L944+8
+.L909:
+	ldr	r1, .L946+8
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	ldrne	r1, [r6, #128]
-	beq	.L910
-.L911:
+	ldrne	r1, [r6, #128]
+	beq	.L912
+.L913:
 	sxth	ip, r3
 	cmp	ip, r1
-	bcs	.L910
+	bcs	.L912
 	lsl	r0, ip, #1
 	add	r3, r3, #1
 	ldrh	r0, [r2, r0]
 	cmp	r0, #0
-	beq	.L911
+	beq	.L913
 	mov	r3, ip
 	mov	lr, #0
-.L912:
+.L914:
 	ldr	r2, [r5, #128]
 	cmp	r3, r2
-	bcs	.L910
+	bcs	.L912
 	ldr	r1, [r5, #3872]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
@@ -6331,27 +6405,27 @@ FtlScanSysBlk:
 	str	r6, [r1, r0, lsl #2]
 	ldr	r1, [r5, #3872]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L912
-.L908:
+	b	.L914
+.L910:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
 	ldrhne	r0, [r4, #120]
-	beq	.L909
-.L917:
+	beq	.L911
+.L919:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	ip, r3
-	bge	.L909
+	bge	.L911
 	lsl	lr, r3, #1
 	add	r2, r2, #1
 	ldrh	lr, [r1, lr]
 	cmp	lr, #0
-	beq	.L917
+	beq	.L919
 	mov	lr, #0
-.L918:
+.L920:
 	ldrh	r2, [r5, #120]
 	cmp	r3, r2
-	bge	.L909
+	bge	.L911
 	ldr	r1, [r5, #148]
 	lsl	r2, r3, #1
 	sub	r0, r3, ip
@@ -6365,10 +6439,10 @@ FtlScanSysBlk:
 	str	r6, [r1, r0, lsl #2]
 	ldr	r1, [r5, #148]
 	strh	lr, [r1, r2]	@ movhi
-	b	.L918
-.L945:
+	b	.L920
+.L947:
 	.align	2
-.L944:
+.L946:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR0+3952
@@ -6392,7 +6466,7 @@ FtlMapTblRecovery:
 	mov	r1, #0
 	ldr	r3, [r0, #24]
 	mov	r4, r0
-	ldr	r6, .L971
+	ldr	r6, .L973
 	mov	r7, #0
 	ldr	r8, [r0, #12]
 	str	r3, [fp, #-44]
@@ -6418,16 +6492,16 @@ FtlMapTblRecovery:
 	mov	r2, #1
 	str	r7, [r4, #28]
 	str	r2, [r4, #36]
-.L947:
+.L949:
 	ldr	r3, [fp, #-52]
 	sxth	r2, r7
 	cmp	r2, r3
-	bge	.L965
+	bge	.L967
 	ldr	r3, [fp, #-52]
 	lsl	r0, r2, #1
 	sub	r1, r3, #1
 	cmp	r2, r1
-	bne	.L948
+	bne	.L950
 	add	r10, r8, r0
 	mov	r1, #1
 	ldrh	r0, [r8, r0]
@@ -6438,26 +6512,26 @@ FtlMapTblRecovery:
 	sxth	r1, r0
 	ldr	r2, [fp, #-52]
 	add	r0, r0, #1
-	ldr	ip, .L971+4
+	ldr	ip, .L973+4
 	strh	r7, [r4]	@ movhi
 	add	r7, r1, #1
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r2, [r3, r2, lsl #2]
 	str	r2, [r4, #28]
-.L949:
+.L951:
 	sxth	r2, r8
 	cmp	r2, r7
-	blt	.L952
-.L965:
+	blt	.L954
+.L967:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L954
+	bne	.L956
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L954:
+.L956:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6465,7 +6539,7 @@ FtlMapTblRecovery:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L952:
+.L954:
 	ldrh	r1, [r10]
 	mov	r0, ip
 	str	ip, [fp, #-52]
@@ -6479,28 +6553,28 @@ FtlMapTblRecovery:
 	cmn	r2, #1
 	ldrheq	r2, [r10]
 	strheq	r2, [r4, #40]	@ movhi
-	beq	.L951
+	beq	.L953
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L951
+	bls	.L953
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
 	ldreq	r1, [r6, #3268]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L951:
+.L953:
 	add	r8, r8, #1
-	b	.L949
-.L948:
+	b	.L951
+.L950:
 	ldr	r2, [r5, #3284]
 	add	r3, r8, r0
 	str	r3, [fp, #-60]
 	str	r2, [r5, #3272]
 	ldrh	r2, [r5, #104]
 	ldrh	r1, [r8, r0]
-	ldr	r0, .L971+4
+	ldr	r0, .L973+4
 	sub	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #3268]
@@ -6509,24 +6583,24 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3264]
 	cmn	r2, #1
-	beq	.L967
+	beq	.L969
 	ldrh	r1, [r9]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L967
+	bne	.L969
 	ldrh	r1, [r9, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L956
-.L967:
+	beq	.L958
+.L969:
 	mov	r10, #0
-.L957:
+.L959:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r10
 	cmp	r2, r1
-	bge	.L963
+	bge	.L965
 	ldr	r3, [fp, #-60]
-	ldr	r0, .L971+4
+	ldr	r0, .L973+4
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #3268]
@@ -6535,33 +6609,33 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3264]
 	cmn	r2, #1
-	beq	.L961
+	beq	.L963
 	ldrh	r2, [r9, #8]
 	ldr	r3, [fp, #-48]
 	cmp	r3, r2
-	bls	.L961
+	bls	.L963
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r9]
 	cmp	r0, r1
 	ldreq	r1, [r5, #3268]
 	ldreq	r3, [fp, #-44]
 	streq	r1, [r3, r2, lsl #2]
-.L961:
+.L963:
 	add	r10, r10, #1
-	b	.L957
-.L956:
+	b	.L959
+.L958:
 	mov	r0, #0
 	mov	lr, #4
-.L958:
+.L960:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	sub	r1, r1, #1
 	cmp	r2, r1
-	blt	.L960
-.L963:
+	blt	.L962
+.L965:
 	add	r7, r7, #1
-	b	.L947
-.L960:
+	b	.L949
+.L962:
 	ldr	ip, [r5, #3284]
 	add	r0, r0, #1
 	ldr	r3, [fp, #-48]
@@ -6573,10 +6647,10 @@ FtlMapTblRecovery:
 	movhi	r1, r10
 	ldrhi	r2, [ip, r2]
 	strhi	r2, [r3, r1, lsl #2]
-	b	.L958
-.L972:
+	b	.L960
+.L974:
 	.align	2
-.L971:
+.L973:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3264
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -6592,12 +6666,12 @@ FtlLoadVonderInfo:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L974
+	ldr	r3, .L976
 	ldrh	r2, [r3, #120]
 	add	r0, r3, #3952
 	add	r0, r0, #4
 	strh	r2, [r0, #10]	@ movhi
-	ldr	r2, .L974+4
+	ldr	r2, .L976+4
 	strh	r2, [r0, #4]	@ movhi
 	ldrh	r2, [r3, #144]
 	strh	r2, [r0, #8]	@ movhi
@@ -6616,9 +6690,9 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L975:
+.L977:
 	.align	2
-.L974:
+.L976:
 	.word	.LANCHOR0
 	.word	-3962
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6634,7 +6708,7 @@ FtlL2PDataInit:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L979
+	ldr	r4, .L981
 	mov	r1, #0
 	mvn	r5, #0
 	ldr	r2, [r4, #128]
@@ -6651,21 +6725,21 @@ FtlL2PDataInit:
 	mov	r3, r4
 	mov	lr, #12
 	mov	r4, r2
-.L977:
+.L979:
 	ldrh	r0, [r3, #138]
 	uxth	r1, r2
 	add	ip, r2, #1
 	cmp	r0, r1
-	bhi	.L978
+	bhi	.L980
 	mvn	r1, #0
 	movw	r0, #3908
-	ldr	r2, .L979+4
+	ldr	r2, .L981+4
 	strh	r1, [r3, r0]	@ movhi
 	ldr	r0, [r3, #128]
 	strh	r1, [r2, #2]	@ movhi
 	strh	r1, [r2, #40]	@ movhi
 	strh	r0, [r2, #10]	@ movhi
-	ldr	r0, .L979+8
+	ldr	r0, .L981+8
 	strh	r0, [r2, #4]	@ movhi
 	ldrh	r0, [r2, #44]
 	strh	r0, [r2, #8]	@ movhi
@@ -6680,7 +6754,7 @@ FtlL2PDataInit:
 	ldr	r0, [r3, #3892]
 	str	r0, [r3, #3932]
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L978:
+.L980:
 	uxth	r2, r2
 	ldr	r1, [r3, #2492]
 	mul	r0, lr, r2
@@ -6696,10 +6770,10 @@ FtlL2PDataInit:
 	add	r2, r0, r2
 	str	r2, [r1, #8]
 	mov	r2, ip
-	b	.L977
-.L980:
+	b	.L979
+.L982:
 	.align	2
-.L979:
+.L981:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3908
 	.word	-3902
@@ -6717,13 +6791,13 @@ FtlLoadMapInfo:
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
 	bl	FtlL2PDataInit
-	ldr	r0, .L982
+	ldr	r0, .L984
 	bl	FtlMapTblRecovery
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L983:
+.L985:
 	.align	2
-.L982:
+.L984:
 	.word	.LANCHOR0+3908
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.align	2
@@ -6738,7 +6812,7 @@ FtlVariablesInit:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L985
+	ldr	r4, .L987
 	mvn	r3, #0
 	mov	r5, #0
 	mov	r1, r5
@@ -6774,9 +6848,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L986:
+.L988:
 	.align	2
-.L985:
+.L987:
 	.word	.LANCHOR0
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.align	2
@@ -6793,7 +6867,7 @@ SupperBlkListInit:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, #0
-	ldr	r4, .L998
+	ldr	r4, .L1000
 	mov	r1, #0
 	mov	r8, r5
 	mov	r6, r5
@@ -6809,20 +6883,20 @@ SupperBlkListInit:
 	strh	r5, [r3]	@ movhi
 	strh	r5, [r4, r2]	@ movhi
 	str	r3, [fp, #-48]
-.L988:
+.L990:
 	ldrh	r3, [r4, #40]
 	uxth	r10, r5
 	cmp	r10, r3
-	bcs	.L995
+	bcs	.L997
 	ldrh	r3, [r4, #102]
 	mov	r9, r10
 	ldrh	ip, [r4, #32]
 	str	r3, [fp, #-44]
 	mov	r3, #0
 	mov	r7, r3
-	b	.L996
-.L990:
-	ldr	r2, .L998+4
+	b	.L998
+.L992:
+	ldr	r2, .L1000+4
 	mov	r1, r9
 	str	ip, [fp, #-56]
 	str	r3, [fp, #-52]
@@ -6836,73 +6910,73 @@ SupperBlkListInit:
 	add	r3, r3, #1
 	addeq	r7, r7, r2
 	uxtheq	r7, r7
-.L996:
+.L998:
 	uxth	r1, r3
 	cmp	ip, r1
-	bhi	.L990
+	bhi	.L992
 	cmp	r7, #0
-	beq	.L991
+	beq	.L993
 	mov	r1, r7
 	mov	r0, #32768
 	bl	__divsi3
 	uxth	r7, r0
-.L992:
+.L994:
 	ldr	r3, [r4, #2316]
 	add	r3, r3, r9, lsl #3
 	strh	r7, [r3, #4]	@ movhi
-	ldr	r3, .L998+8
+	ldr	r3, .L1000+8
 	ldrh	r1, [r3]
 	cmp	r1, r10
-	beq	.L993
+	beq	.L995
 	ldrh	r1, [r3, #48]
 	cmp	r1, r10
-	beq	.L993
+	beq	.L995
 	ldrh	r3, [r3, #96]
 	cmp	r3, r10
-	beq	.L993
+	beq	.L995
 	ldr	r2, [r4, #2324]
 	lsl	r3, r9, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L994
+	bne	.L996
 	add	r8, r8, #1
 	mov	r0, r9
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L993:
+.L995:
 	add	r5, r5, #1
-	b	.L988
-.L991:
+	b	.L990
+.L993:
 	ldr	r1, [r4, #2324]
 	lsl	r3, r9, #1
 	mvn	r0, #0
 	strh	r0, [r1, r3]	@ movhi
-	b	.L992
-.L994:
+	b	.L994
+.L996:
 	add	r6, r6, #1
 	mov	r0, r9
 	uxth	r6, r6
 	bl	INSERT_DATA_LIST
-	b	.L993
-.L995:
+	b	.L995
+.L997:
 	ldr	r2, [fp, #-48]
 	strh	r6, [r2]	@ movhi
 	add	r6, r6, r8
 	cmp	r6, r3
 	movw	r2, #2344
 	strh	r8, [r4, r2]	@ movhi
-	ble	.L997
+	ble	.L999
 	movw	r2, #2206
-	ldr	r1, .L998+12
-	ldr	r0, .L998+16
+	ldr	r1, .L1000+12
+	ldr	r0, .L1000+16
 	bl	sftl_printk
-.L997:
+.L999:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L999:
+.L1001:
 	.align	2
-.L998:
+.L1000:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR0+2348
@@ -6921,7 +6995,7 @@ FtlGcPageVarInit:
 	mov	ip, sp
 	push	{r4, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1001
+	ldr	r4, .L1003
 	mov	r3, #0
 	movw	r2, #3192
 	mov	r1, #255
@@ -6940,9 +7014,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	ldmfd	sp, {r4, fp, sp, pc}
-.L1002:
+.L1004:
 	.align	2
-.L1001:
+.L1003:
 	.word	.LANCHOR0
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.align	2
@@ -6959,35 +7033,35 @@ FtlGcScanTempBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #20
 	mov	r6, r0
-	ldr	r3, .L1026
+	ldr	r3, .L1028
 	mov	r10, r1
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1020
+	beq	.L1022
 	cmp	r4, #0
-	bne	.L1004
-.L1005:
+	bne	.L1006
+.L1007:
 	bl	FtlGcPageVarInit
-	b	.L1006
-.L1020:
+	b	.L1008
+.L1022:
 	mov	r4, #0
-.L1004:
-	ldr	r3, .L1026+4
+.L1006:
+	ldr	r3, .L1028+4
 	ldrh	r3, [r3, #102]
 	cmp	r3, r10
-	beq	.L1005
-.L1006:
-	ldr	r5, .L1026+4
+	beq	.L1007
+.L1008:
+	ldr	r5, .L1028+4
 	mov	r8, #0
-.L1014:
+.L1016:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	mov	r0, #0
 	strb	r0, [r6, #8]
 	cmp	r2, r3
-	beq	.L1007
-.L1017:
+	beq	.L1009
+.L1019:
 	ldrh	r3, [r5, #32]
 	mov	r2, #0
 	ldr	r0, [r5, #3836]
@@ -7003,34 +7077,34 @@ FtlGcScanTempBlk:
 	str	r3, [fp, #-56]
 	ldrh	r3, [r5, #112]
 	str	r3, [fp, #-60]
-.L1008:
+.L1010:
 	ldr	r1, [fp, #-44]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1010
+	bhi	.L1012
 	mov	r9, #0
 	mov	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.L1011:
+.L1013:
 	uxth	r3, r9
 	cmp	r7, r3
-	bhi	.L1015
+	bhi	.L1017
 	add	r8, r8, #1
 	add	r4, r4, #1
 	cmp	r10, r8
 	uxth	r4, r4
-	bls	.L1016
-.L1018:
+	bls	.L1018
+.L1020:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L1017
+	bhi	.L1019
 	mov	r0, #0
-	b	.L1007
-.L1010:
+	b	.L1009
+.L1012:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L1009
+	beq	.L1011
 	mov	r1, #20
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r1, r7, r0
@@ -7055,10 +7129,10 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1009:
+.L1011:
 	add	r2, r2, #1
-	b	.L1008
-.L1015:
+	b	.L1010
+.L1017:
 	mov	r3, #20
 	ldr	r2, [r5, #3836]
 	mul	r3, r3, r9
@@ -7074,7 +7148,7 @@ FtlGcScanTempBlk:
 	ldr	r3, [fp, #-56]
 	ldr	r3, [r2, r3]
 	cmp	r3, #0
-	bne	.L1012
+	bne	.L1014
 	ldr	ip, [fp, #-48]
 	movw	r2, #65535
 	add	r9, r9, #1
@@ -7082,11 +7156,11 @@ FtlGcScanTempBlk:
 	ldr	r3, [ip, #12]
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L1013
+	bne	.L1015
 	mov	r3, #1
 	str	r3, [r5, #4008]
-.L1007:
-	ldr	r3, .L1026
+.L1009:
+	ldr	r3, .L1028
 	mvn	r2, #0
 	strb	r0, [r6, #6]
 	mov	r1, r4
@@ -7095,13 +7169,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r6
 	bl	ftl_sb_update_avl_pages
-	b	.L1019
-.L1013:
+	b	.L1021
+.L1015:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1011
-.L1012:
+	b	.L1013
+.L1014:
 	ldrh	r3, [r6]
 	mov	r4, #0
 	ldr	r2, [r5, #2324]
@@ -7112,25 +7186,25 @@ FtlGcScanTempBlk:
 	mvn	r3, #0
 	strh	r3, [r6]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1014
-.L1016:
-	ldr	r2, .L1026
+	b	.L1016
+.L1018:
+	ldr	r2, .L1028
 	movw	r1, #65535
 	ldrh	r3, [r2, #4]
 	cmp	r3, r1
-	beq	.L1018
+	beq	.L1020
 	add	r3, r3, r8
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L1018
-.L1019:
+	bls	.L1020
+.L1021:
 	mvn	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1027:
+.L1029:
 	.align	2
-.L1026:
+.L1028:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
@@ -7163,7 +7237,7 @@ FtlBbmTblFlush:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r5, #0
-	ldr	r4, .L1038
+	ldr	r4, .L1040
 	mov	r1, #0
 	ldr	r0, [r4, #3284]
 	add	r6, r4, #176
@@ -7173,20 +7247,20 @@ FtlBbmTblFlush:
 	str	r0, [r4, #3272]
 	str	r3, [r4, #3276]
 	bl	ftl_memset
-.L1030:
+.L1032:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1031
+	blt	.L1033
 	ldr	r6, [r4, #3276]
 	mov	r2, #16
 	mov	r1, #255
-	ldr	r9, .L1038+4
-	ldr	r8, .L1038+8
+	ldr	r9, .L1040+4
+	ldr	r8, .L1040+8
 	mov	r5, #0
 	mov	r0, r6
 	mov	r7, r5
 	bl	memset
-	ldr	r3, .L1038+12
+	ldr	r3, .L1040+12
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #160]
 	str	r3, [r6, #4]
@@ -7198,7 +7272,7 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1032:
+.L1034:
 	ldr	r3, [r4, #3284]
 	mov	r10, #0
 	ldrh	r1, [r4, #152]
@@ -7215,7 +7289,7 @@ FtlBbmTblFlush:
 	mov	r0, r9
 	bl	sftl_printk
 	mov	r3, #1
-	ldr	r0, .L1038+8
+	ldr	r0, .L1040+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -7223,7 +7297,7 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1033
+	blt	.L1035
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
 	ldr	r0, [r4, #3804]
@@ -7246,27 +7320,27 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1033:
+.L1035:
 	ldrh	r3, [r4, #154]
 	add	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	bne	.L1034
+	bne	.L1036
 	add	r5, r5, #1
 	ldr	r1, [r4, #3268]
 	uxth	r5, r5
-	ldr	r0, .L1038+16
+	ldr	r0, .L1040+16
 	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1032
+	bls	.L1034
 	mov	r2, r5
 	ldr	r1, [r4, #3268]
-	ldr	r0, .L1038+20
+	ldr	r0, .L1040+20
 	bl	sftl_printk
-.L1036:
-	b	.L1036
-.L1031:
+.L1038:
+	b	.L1038
+.L1033:
 	ldrh	r2, [r7]
 	ldr	r3, [r4, #3272]
 	ldr	r1, [r6, #4]!
@@ -7275,18 +7349,18 @@ FtlBbmTblFlush:
 	add	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1030
-.L1037:
-	mov	r7, #1
 	b	.L1032
-.L1034:
+.L1039:
+	mov	r7, #1
+	b	.L1034
+.L1036:
 	cmp	r7, #0
-	beq	.L1037
+	beq	.L1039
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1039:
+.L1041:
 	.align	2
-.L1038:
+.L1040:
 	.word	.LANCHOR0
 	.word	.LC100
 	.word	.LANCHOR0+3264
@@ -7308,25 +7382,25 @@ allocate_data_superblock:
 	sub	fp, ip, #4
 	sub	sp, sp, #16
 	mov	r5, r0
-	ldr	r4, .L1075
+	ldr	r4, .L1077
 	add	r9, r4, #2336
-.L1041:
-	ldr	r7, .L1075+4
+.L1043:
+	ldr	r7, .L1077+4
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1042
+	ble	.L1044
 	movw	r2, #2654
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1042:
-	ldr	r3, .L1075+16
+.L1044:
+	ldr	r3, .L1077+16
 	cmp	r5, r3
 	movne	r1, #0
-	bne	.L1043
+	bne	.L1045
 	ldrh	r3, [r7]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7337,19 +7411,19 @@ allocate_data_superblock:
 	cmp	r1, #0
 	subne	r1, r1, #1
 	uxthne	r1, r1
-.L1043:
-	ldr	r0, .L1075+20
+.L1045:
+	ldr	r0, .L1077+20
 	bl	List_pop_index_node
 	ldrh	r3, [r7]
 	mov	r6, r0
 	uxth	r8, r0
 	cmp	r3, #0
-	bne	.L1044
+	bne	.L1046
 	movw	r2, #2663
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1044:
+.L1046:
 	ldrh	r3, [r7]
 	mov	r0, r5
 	sub	r3, r3, #1
@@ -7358,7 +7432,7 @@ allocate_data_superblock:
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1045
+	bne	.L1047
 	uxth	r0, r6
 	ldr	r2, [r4, #2324]
 	mvn	r1, #0
@@ -7370,24 +7444,24 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1041
+	ble	.L1043
 	movw	r2, #2674
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-	b	.L1041
-.L1045:
+	b	.L1043
+.L1047:
 	ldrh	r2, [r9]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1047
+	ble	.L1049
 	movw	r2, #2677
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1047:
+.L1049:
 	ldr	r0, [r4, #3804]
 	mov	r2, #20
 	ldrh	r1, [r4, #32]
@@ -7397,30 +7471,30 @@ allocate_data_superblock:
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [fp, #-44]
-.L1048:
+.L1050:
 	ldr	r1, [fp, #-44]
 	cmp	r1, r3
-	bne	.L1050
+	bne	.L1052
 	cmp	r7, #0
-	bne	.L1051
+	bne	.L1053
 	mov	r2, #2688
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1051:
-	ldr	r3, .L1075+24
+.L1053:
+	ldr	r3, .L1077+24
 	ldrh	r3, [r3]
 	cmp	r3, r8
-	bne	.L1052
+	bne	.L1054
 	movw	r2, #2690
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1052:
+.L1054:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	cmp	r3, #0
-	bne	.L1053
+	bne	.L1055
 	ldr	r1, [r4, #2328]
 	lsl	r2, r6, #1
 	ldrh	r3, [r1, r2]
@@ -7435,7 +7509,7 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1056:
+.L1058:
 	ldr	r3, [r4, #2328]
 	lsl	r10, r6, #1
 	ldr	r2, [r4, #2564]
@@ -7452,17 +7526,17 @@ allocate_data_superblock:
 	ldr	r1, [r4, #3804]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1075+28
+	ldr	r0, .L1077+28
 	add	r3, r3, #1
 	str	r3, [r2, #16]
 	mov	r2, #20
 	mla	r2, r2, r7, r1
 	add	r3, r1, #4
 	add	r2, r2, #24
-.L1058:
+.L1060:
 	add	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1059
+	bne	.L1061
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3804]
@@ -7470,24 +7544,24 @@ allocate_data_superblock:
 	mov	r3, #0
 	mov	ip, #20
 	mov	r1, r3
-.L1060:
+.L1062:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L1062
+	bhi	.L1064
 	cmp	r1, #0
-	ble	.L1063
+	ble	.L1065
 	mov	r0, r6
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1063:
+.L1065:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1064
+	bne	.L1066
 	ldr	r3, [r4, #2324]
 	mvn	r2, #0
 	strh	r2, [r3, r10]	@ movhi
-	b	.L1041
-.L1050:
+	b	.L1043
+.L1052:
 	str	lr, [r3, #8]
 	movw	r10, #65535
 	str	lr, [r3, #12]
@@ -7499,8 +7573,8 @@ allocate_data_superblock:
 	addne	r7, r7, #1
 	uxthne	r7, r7
 	strne	r1, [r10, #4]
-	b	.L1048
-.L1053:
+	b	.L1050
+.L1055:
 	ldr	r1, [r4, #2328]
 	lsl	r3, r6, #1
 	mov	r0, r6
@@ -7511,19 +7585,19 @@ allocate_data_superblock:
 	add	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1056
-.L1059:
+	b	.L1058
+.L1061:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1058
-.L1062:
+	b	.L1060
+.L1064:
 	mul	r2, ip, r3
 	ldr	lr, [r4, #3804]
 	add	r0, lr, r2
 	ldr	r2, [lr, r2]
 	cmn	r2, #1
-	bne	.L1061
+	bne	.L1063
 	ldr	r0, [r0, #4]
 	add	r1, r1, #1
 	str	ip, [fp, #-56]
@@ -7541,10 +7615,10 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	sub	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1061:
+.L1063:
 	add	r3, r3, #1
-	b	.L1060
-.L1064:
+	b	.L1062
+.L1066:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7563,22 +7637,22 @@ allocate_data_superblock:
 	strh	r3, [r1, r2]	@ movhi
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1065
+	beq	.L1067
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1066
-.L1065:
+	bne	.L1068
+.L1067:
 	movw	r2, #2743
-	ldr	r1, .L1075+8
-	ldr	r0, .L1075+12
+	ldr	r1, .L1077+8
+	ldr	r0, .L1077+12
 	bl	sftl_printk
-.L1066:
+.L1068:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1076:
+.L1078:
 	.align	2
-.L1075:
+.L1077:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2344
 	.word	.LANCHOR1+360
@@ -7602,47 +7676,47 @@ FtlGcFreeBadSuperBlk:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	uxth	r3, r0
-	ldr	r6, .L1089
+	ldr	r6, .L1091
 	str	r3, [fp, #-44]
 	movw	r3, #3210
 	ldrh	r3, [r6, r3]
 	cmp	r3, #0
 	movne	r7, #0
-	ldrne	r10, .L1089+4
-	bne	.L1079
-.L1078:
+	ldrne	r10, .L1091+4
+	bne	.L1081
+.L1080:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1085:
+.L1087:
 	uxtah	r3, r6, r7
 	ldr	r1, [fp, #-44]
 	mov	r8, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1080:
+.L1082:
 	ldrh	r3, [r10]
 	uxth	r4, r8
 	cmp	r3, r4
-	bhi	.L1084
+	bhi	.L1086
 	add	r7, r7, #1
-.L1079:
+.L1081:
 	ldrh	r2, [r6, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1085
+	bhi	.L1087
 	bl	FtlGcReFreshBadBlk
-	b	.L1078
-.L1084:
+	b	.L1080
+.L1086:
 	uxth	r3, r8
-	ldr	r5, .L1089+8
+	ldr	r5, .L1091+8
 	lsl	r2, r3, #1
 	ldrh	r2, [r5, r2]
 	cmp	r2, r9
-	bne	.L1081
+	bne	.L1083
 	mov	r1, r9
-	ldr	r0, .L1089+12
+	ldr	r0, .L1091+12
 	str	r3, [fp, #-48]
 	bl	sftl_printk
 	mov	r0, r9
@@ -7651,23 +7725,23 @@ FtlGcFreeBadSuperBlk:
 	ldr	r3, [fp, #-48]
 	ldrh	r2, [r10]
 	add	r3, r5, r3, lsl #1
-.L1082:
+.L1084:
 	cmp	r4, r2
-	bcc	.L1083
+	bcc	.L1085
 	sub	r2, r2, #1
 	strh	r2, [r10]	@ movhi
-.L1081:
-	add	r8, r8, #1
-	b	.L1080
 .L1083:
+	add	r8, r8, #1
+	b	.L1082
+.L1085:
 	ldrh	r1, [r3, #2]!
 	add	r4, r4, #1
 	uxth	r4, r4
 	strh	r1, [r3, #-2]	@ movhi
-	b	.L1082
-.L1090:
+	b	.L1084
+.L1092:
 	.align	2
-.L1089:
+.L1091:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3210
 	.word	.LANCHOR0+3212
@@ -7685,20 +7759,20 @@ update_vpc_list:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1101
+	ldr	r3, .L1103
 	uxth	r4, r0
 	ldr	r1, [r3, #2324]
 	lsl	r2, r4, #1
 	mov	r6, r3
 	ldrh	r0, [r1, r2]
 	cmp	r0, #0
-	bne	.L1092
+	bne	.L1094
 	movw	r2, #2588
 	ldrh	r1, [r3, r2]
 	cmp	r1, r4
 	mvneq	r3, #0
 	strheq	r3, [r6, r2]	@ movhi
-	beq	.L1094
+	beq	.L1096
 	movw	r2, #2348
 	ldrh	r2, [r3, r2]
 	cmp	r2, r4
@@ -7711,19 +7785,19 @@ update_vpc_list:
 	ldrh	r3, [r3, r2]
 	cmp	r3, r4
 	ldmfdeq	sp, {r4, r5, r6, fp, sp, pc}
-.L1094:
-	ldr	r5, .L1101+4
+.L1096:
+	ldr	r5, .L1103+4
 	mov	r1, r4
-	ldr	r0, .L1101+8
+	ldr	r0, .L1103+8
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L1096
+	bne	.L1098
 	movw	r2, #2813
-	ldr	r1, .L1101+12
-	ldr	r0, .L1101+16
+	ldr	r1, .L1103+12
+	ldr	r0, .L1103+16
 	bl	sftl_printk
-.L1096:
+.L1098:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	sub	r3, r3, #1
@@ -7737,22 +7811,22 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r6, #40]
 	cmp	r3, r2
-	ble	.L1100
+	ble	.L1102
 	mov	r2, #2816
-	ldr	r1, .L1101+12
-	ldr	r0, .L1101+16
+	ldr	r1, .L1103+12
+	ldr	r0, .L1103+16
 	bl	sftl_printk
-.L1100:
+.L1102:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1092:
+.L1094:
 	mov	r0, r4
 	bl	List_update_data_list
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1102:
+.L1104:
 	.align	2
-.L1101:
+.L1103:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2336
 	.word	.LANCHOR0+2320
@@ -7774,47 +7848,47 @@ decrement_vpc_count:
 	uxth	r4, r0
 	movw	r3, #65535
 	cmp	r4, r3
-	ldr	r5, .L1118
-	beq	.L1104
+	ldr	r5, .L1120
+	beq	.L1106
 	ldr	r3, [r5, #2324]
 	lsl	r6, r4, #1
 	ldrh	r2, [r3, r6]
 	cmp	r2, #0
 	subne	r2, r2, #1
 	strhne	r2, [r3, r6]	@ movhi
-	bne	.L1104
+	bne	.L1106
 	mov	r1, r4
-	ldr	r0, .L1118+4
+	ldr	r0, .L1120+4
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r6]
 	cmp	r3, #0
-	bne	.L1106
+	bne	.L1108
 	movw	r2, #2831
-	ldr	r1, .L1118+8
-	ldr	r0, .L1118+12
+	ldr	r1, .L1120+8
+	ldr	r0, .L1120+12
 	bl	sftl_printk
-.L1106:
+.L1108:
 	ldr	r3, [r5, #2324]
 	mov	r2, #16
 	mov	r1, r4
-	ldr	r0, .L1118+16
+	ldr	r0, .L1120+16
 	strh	r2, [r3, r6]	@ movhi
 	bl	test_node_in_list
 	cmp	r0, #0
-	beq	.L1107
+	beq	.L1109
 	mov	r1, r4
-	ldr	r0, .L1118+16
+	ldr	r0, .L1120+16
 	bl	List_remove_node
 	movw	r3, #2344
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
-	bne	.L1108
+	bne	.L1110
 	movw	r2, #2835
-	ldr	r1, .L1118+8
-	ldr	r0, .L1118+12
+	ldr	r1, .L1120+8
+	ldr	r0, .L1120+12
 	bl	sftl_printk
-.L1108:
+.L1110:
 	movw	r2, #2344
 	mov	r0, r4
 	ldrh	r3, [r5, r2]
@@ -7823,24 +7897,24 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5, #2324]
 	mov	r1, r4
-	ldr	r0, .L1118+20
+	ldr	r0, .L1120+20
 	ldrh	r2, [r3, r6]
 	bl	sftl_printk
-.L1107:
+.L1109:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1111:
+.L1113:
 	mov	r6, #0
-	b	.L1103
-.L1104:
-	ldr	r7, .L1118+24
+	b	.L1105
+.L1106:
+	ldr	r7, .L1120+24
 	movw	r3, #65535
 	ldrh	r0, [r7]
 	cmp	r0, r3
 	strheq	r4, [r7]	@ movhi
-	beq	.L1111
+	beq	.L1113
 	cmp	r4, r0
-	beq	.L1111
+	beq	.L1113
 	bl	update_vpc_list
 	ldr	r2, [r5, #2316]
 	adds	r6, r0, #0
@@ -7859,17 +7933,17 @@ decrement_vpc_count:
 	lsr	r2, r2, #5
 	moveq	r2, #0
 	cmp	r2, #0
-	beq	.L1103
+	beq	.L1105
 	movw	r2, #2856
-	ldr	r1, .L1118+8
-	ldr	r0, .L1118+12
+	ldr	r1, .L1120+8
+	ldr	r0, .L1120+12
 	bl	sftl_printk
-.L1103:
+.L1105:
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1119:
+.L1121:
 	.align	2
-.L1118:
+.L1120:
 	.word	.LANCHOR0
 	.word	.LC104
 	.word	.LANCHOR1+401
@@ -7891,22 +7965,22 @@ FtlWriteDump_data:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	sub	sp, sp, #28
-	ldr	r6, .L1138
-	ldr	r4, .L1138+4
+	ldr	r6, .L1140
+	ldr	r4, .L1140+4
 	ldrh	r2, [r6, #4]
 	cmp	r2, #0
-	beq	.L1121
+	beq	.L1123
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1121
+	bne	.L1123
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	mul	r3, r3, r1
 	cmp	r2, r3
-	beq	.L1121
+	beq	.L1123
 	ldrb	r8, [r4, #2358]	@ zero_extendqisi2
 	cmp	r8, #0
-	bne	.L1120
+	bne	.L1122
 	ldr	r7, [r4, #2504]
 	mov	r2, r8
 	sub	r1, fp, #64
@@ -7923,37 +7997,37 @@ FtlWriteDump_data:
 	str	r0, [fp, #-52]
 	str	r5, [fp, #-48]
 	str	r8, [r5, #4]
-	beq	.L1123
+	beq	.L1125
 	mov	r2, r8
 	mov	r1, #1
 	sub	r0, fp, #60
 	bl	FlashReadPages
-.L1124:
-	ldr	ip, .L1138
+.L1126:
+	ldr	ip, .L1140
 	mov	r8, #0
-	ldr	r3, .L1138+8
+	ldr	r3, .L1140+8
 	lsl	r9, r9, #2
 	mov	r10, r8
 	strh	r3, [r5]	@ movhi
-.L1125:
+.L1127:
 	cmp	r9, r8
-	bne	.L1129
-.L1126:
+	bne	.L1131
+.L1128:
 	mov	r3, #1
-.L1137:
+.L1139:
 	strb	r3, [r4, #2358]
-.L1120:
+.L1122:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1123:
+.L1125:
 	ldrh	r2, [r4, #110]
 	mov	r1, #255
 	bl	ftl_memset
-	b	.L1124
-.L1129:
+	b	.L1126
+.L1131:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1126
+	beq	.L1128
 	ldr	r3, [fp, #-56]
 	mov	r0, ip
 	str	r7, [r5, #8]
@@ -7978,13 +8052,13 @@ FtlWriteDump_data:
 	ldrh	r0, [r6]
 	bl	decrement_vpc_count
 	ldr	ip, [fp, #-68]
-	b	.L1125
-.L1121:
+	b	.L1127
+.L1123:
 	mov	r3, #0
-	b	.L1137
-.L1139:
+	b	.L1139
+.L1141:
 	.align	2
-.L1138:
+.L1140:
 	.word	.LANCHOR0+2348
 	.word	.LANCHOR0
 	.word	-3947
@@ -8001,31 +8075,31 @@ l2p_flush:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L1144
+	ldr	r5, .L1146
 	mov	r4, #0
 	mov	r6, #12
 	bl	FtlWriteDump_data
-.L1141:
+.L1143:
 	ldrh	r2, [r5, #138]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1143
+	bhi	.L1145
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1143:
+.L1145:
 	ldr	r3, [r5, #2492]
 	uxth	r0, r4
 	mla	r3, r6, r0, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1142
+	bge	.L1144
 	bl	flush_l2p_region
-.L1142:
+.L1144:
 	add	r4, r4, #1
-	b	.L1141
-.L1145:
+	b	.L1143
+.L1147:
 	.align	2
-.L1144:
+.L1146:
 	.word	.LANCHOR0
 	.size	l2p_flush, .-l2p_flush
 	.align	2
@@ -8045,9 +8119,9 @@ FtlRecoverySuperblock:
 	ldrh	r3, [r0]
 	mov	r4, r0
 	cmp	r3, r2
-	beq	.L1267
+	beq	.L1269
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L1274
+	ldr	r6, .L1276
 	str	r3, [fp, #-64]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [fp, #-64]
@@ -8057,27 +8131,27 @@ FtlRecoverySuperblock:
 	mov	r3, #0
 	strheq	r3, [r0, #4]	@ movhi
 	ldrhne	r0, [r0, #16]
-	bne	.L1150
-.L1272:
+	bne	.L1152
+.L1274:
 	strb	r3, [r4, #6]
-.L1267:
+.L1269:
 	mov	r0, #0
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1151:
+.L1153:
 	uxth	r1, r3
 	add	r1, r4, r1, lsl #1
 	ldrh	r0, [r1, #16]
-.L1150:
+.L1152:
 	cmp	r0, r2
 	uxth	r7, r3
 	add	r3, r3, #1
-	beq	.L1151
+	beq	.L1153
 	mov	r1, #1
 	bl	FtlGetLastWrittenPage
 	cmn	r0, #1
 	mov	r5, r0
-	beq	.L1152
+	beq	.L1154
 	ldrh	r3, [r6, #32]
 	mov	r2, #0
 	ldr	r0, [r6, #3836]
@@ -8094,12 +8168,12 @@ FtlRecoverySuperblock:
 	add	r3, r4, #16
 	mov	ip, r3
 	str	r3, [fp, #-76]
-.L1153:
+.L1155:
 	ldr	r1, [fp, #-56]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1157
-	ldr	r7, .L1274
+	bhi	.L1159
+	ldr	r7, .L1276
 	mov	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
@@ -8114,15 +8188,15 @@ FtlRecoverySuperblock:
 	mov	r8, r9
 	mov	r3, #0
 	str	r2, [fp, #-60]
-.L1158:
+.L1160:
 	uxth	r2, r3
 	cmp	r6, r2
-	bhi	.L1163
+	bhi	.L1165
 	addeq	r3, r5, #1
 	uxtheq	r3, r3
 	streq	r3, [fp, #-60]
-	bne	.L1161
-.L1268:
+	bne	.L1163
+.L1270:
 	ldr	r0, [r9, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
@@ -8142,15 +8216,15 @@ FtlRecoverySuperblock:
 	cmpeq	r1, r0
 	moveq	r2, r1
 	moveq	r1, r3
-	beq	.L1273
+	beq	.L1275
 	ldr	r2, [fp, #-72]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1167
+	bne	.L1169
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1168
-.L1167:
+	bne	.L1170
+.L1169:
 	ldr	r3, [r7, #4012]
 	uxth	r8, r5
 	uxth	r5, r5
@@ -8158,15 +8232,15 @@ FtlRecoverySuperblock:
 	ldreq	r3, [fp, #-56]
 	streq	r3, [r7, #4012]
 	ldr	r3, [fp, #-64]
-	ldr	r7, .L1274
+	ldr	r7, .L1276
 	add	r3, r3, #7
 	cmp	r5, r3
 	subgt	r5, r8, #7
 	ldrle	r5, [fp, #-64]
 	uxthgt	r5, r5
-.L1171:
+.L1173:
 	cmp	r5, r8
-	bhi	.L1178
+	bhi	.L1180
 	mov	r3, #0
 	ldrh	r9, [r7, #32]
 	ldr	r0, [r7, #3836]
@@ -8174,32 +8248,32 @@ FtlRecoverySuperblock:
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
 	mov	ip, #20
-	b	.L1179
-.L1152:
+	b	.L1181
+.L1154:
 	ldr	r3, [fp, #-64]
 	cmp	r3, #0
-	beq	.L1154
+	beq	.L1156
 	movw	r2, #1804
-	ldr	r1, .L1274+4
-	ldr	r0, .L1274+8
+	ldr	r1, .L1276+4
+	ldr	r0, .L1276+8
 	bl	sftl_printk
-.L1154:
+.L1156:
 	ldr	r3, [fp, #-80]
 	cmp	r3, #0
 	cmpne	r7, r3
-	beq	.L1155
+	beq	.L1157
 	movw	r2, #1805
-	ldr	r1, .L1274+4
-	ldr	r0, .L1274+8
+	ldr	r1, .L1276+4
+	ldr	r0, .L1276+8
 	bl	sftl_printk
-.L1155:
+.L1157:
 	mov	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	b	.L1272
-.L1157:
+	b	.L1274
+.L1159:
 	ldrh	r3, [ip], #2
 	cmp	r3, r8
-	beq	.L1156
+	beq	.L1158
 	mla	r1, r9, r6, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8221,17 +8295,17 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, lr, r3
 	str	r3, [r1, #12]
-.L1156:
+.L1158:
 	add	r2, r2, #1
-	b	.L1153
-.L1163:
+	b	.L1155
+.L1165:
 	ldr	r2, [r8]
 	cmp	r2, #0
-	bne	.L1159
+	bne	.L1161
 	ldr	ip, [r8, #12]
 	ldr	r2, [ip, #4]
 	cmn	r2, #1
-	beq	.L1160
+	beq	.L1162
 	ldr	r1, [r10, #2544]
 	mov	r0, r2
 	str	ip, [fp, #-68]
@@ -8240,25 +8314,25 @@ FtlRecoverySuperblock:
 	cmp	r0, #0
 	addne	r2, r2, #1
 	strne	r2, [r10, #2544]
-.L1160:
+.L1162:
 	ldr	r2, [ip]
 	cmn	r2, #1
-	bne	.L1162
-.L1161:
+	bne	.L1164
+.L1163:
 	uxth	r2, r5
 	uxth	r3, r3
 	str	r2, [fp, #-60]
 	mov	r2, #20
 	mla	r9, r2, r3, r9
-	b	.L1268
-.L1159:
+	b	.L1270
+.L1161:
 	ldr	r2, [fp, #-60]
 	str	r2, [fp, #-72]
-.L1162:
+.L1164:
 	add	r3, r3, #1
 	add	r8, r8, #20
-	b	.L1158
-.L1173:
+	b	.L1160
+.L1175:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
@@ -8267,10 +8341,10 @@ FtlRecoverySuperblock:
 	orrne	r2, r5, r2, lsl #10
 	uxthne	r6, r6
 	strne	r2, [r10, #4]
-.L1179:
+.L1181:
 	uxth	r2, r3
 	cmp	r9, r2
-	bhi	.L1173
+	bhi	.L1175
 	mov	r1, r6
 	mov	r2, #0
 	bl	FlashReadPages
@@ -8278,37 +8352,37 @@ FtlRecoverySuperblock:
 	mov	r2, #20
 	movw	r1, #65535
 	mla	r6, r2, r6, r3
-.L1174:
+.L1176:
 	cmp	r6, r3
 	addeq	r5, r5, #1
 	uxtheq	r5, r5
-	beq	.L1171
-.L1177:
+	beq	.L1173
+.L1179:
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L1168
+	bne	.L1170
 	ldr	r2, [r3, #12]
 	ldrh	r0, [r2]
 	cmp	r0, r1
-	beq	.L1176
+	beq	.L1178
 	ldr	r2, [r2, #4]
 	cmn	r2, #1
 	strne	r2, [r7, #4012]
-.L1176:
-	add	r3, r3, #20
-	b	.L1174
 .L1178:
+	add	r3, r3, #20
+	b	.L1176
+.L1180:
 	mvn	r3, #0
 	str	r3, [r7, #4012]
-.L1168:
-	ldr	r5, .L1274+12
+.L1170:
+	ldr	r5, .L1276+12
 	mov	r3, #1
 	mov	r0, r5
 	sub	r5, r5, #4016
 	strh	r3, [r0], #-108	@ movhi
 	bl	FtlMapBlkWriteDump_data
 	ldr	r9, [fp, #-64]
-.L1180:
+.L1182:
 	ldrh	ip, [r5, #32]
 	mov	r3, #0
 	ldr	r0, [r5, #3836]
@@ -8316,42 +8390,42 @@ FtlRecoverySuperblock:
 	ldr	r1, [fp, #-76]
 	movw	lr, #65535
 	mov	r6, #20
-.L1181:
+.L1183:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1183
+	bhi	.L1185
 	mov	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
 	mov	r3, #0
-.L1271:
+.L1273:
 	str	r3, [fp, #-72]
 	ldrh	r3, [fp, #-72]
 	cmp	r10, r3
-	bhi	.L1211
+	bhi	.L1213
 	add	r9, r9, #1
 	ldrh	r3, [r5, #102]
 	uxth	r9, r9
 	cmp	r3, r9
-	bne	.L1180
+	bne	.L1182
 	ldrh	r2, [r5, #32]
 	movw	r0, #65535
 	mov	r3, #0
 	strh	r9, [r4, #2]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L1212:
+.L1214:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1267
+	bcs	.L1269
 	ldr	r1, [fp, #-76]
 	ldrh	ip, [r1], #2
 	cmp	ip, r0
 	str	r1, [fp, #-76]
 	add	r1, r3, #1
-	bne	.L1272
+	bne	.L1274
 	mov	r3, r1
-	b	.L1212
-.L1183:
+	b	.L1214
+.L1185:
 	ldrh	r2, [r1], #2
 	add	r3, r3, #1
 	cmp	r2, lr
@@ -8360,8 +8434,8 @@ FtlRecoverySuperblock:
 	addne	r10, r10, #1
 	uxthne	r10, r10
 	strne	r2, [r7, #4]
-	b	.L1181
-.L1211:
+	b	.L1183
+.L1213:
 	ldr	r3, [fp, #-72]
 	mov	r7, #20
 	ldr	r2, [r5, #3836]
@@ -8374,7 +8448,7 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [fp, #-64]
 	cmp	r9, r3
-	bcc	.L1185
+	bcc	.L1187
 	ldr	r2, [fp, #-80]
 	moveq	r3, #1
 	movne	r3, #0
@@ -8382,34 +8456,34 @@ FtlRecoverySuperblock:
 	movls	r3, #0
 	andhi	r3, r3, #1
 	cmp	r3, #0
-	bne	.L1185
+	bne	.L1187
 	ldr	r3, [fp, #-60]
 	ldr	r2, [fp, #-68]
 	cmp	r9, r3
 	cmpeq	r2, r0
-	beq	.L1186
+	beq	.L1188
 	ldr	r2, [fp, #-84]
 	ldr	r3, [r2, r7]
 	cmn	r3, #1
-	beq	.L1187
+	beq	.L1189
 	ldr	r8, [r8, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1188
-.L1195:
+	beq	.L1190
+.L1197:
 	ldrh	r0, [r4]
-.L1270:
+.L1272:
 	bl	decrement_vpc_count
-.L1185:
+.L1187:
 	ldr	r3, [fp, #-72]
 	add	r3, r3, #1
-	b	.L1271
-.L1188:
+	b	.L1273
+.L1190:
 	ldr	r3, [r8, #4]
 	cmn	r3, #1
 	str	r3, [fp, #-56]
-	beq	.L1189
+	beq	.L1191
 	mov	r0, r3
 	ldr	r1, [r5, #2544]
 	bl	ftl_cmp_data_ver
@@ -8417,16 +8491,16 @@ FtlRecoverySuperblock:
 	ldrne	r3, [fp, #-56]
 	addne	r3, r3, #1
 	strne	r3, [r5, #2544]
-.L1189:
+.L1191:
 	ldrh	r2, [r8]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1190
+	beq	.L1192
 	movw	r2, #1954
-	ldr	r1, .L1274+4
-	ldr	r0, .L1274+8
+	ldr	r1, .L1276+4
+	ldr	r0, .L1276+8
 	bl	sftl_printk
-.L1190:
+.L1192:
 	ldr	r6, [r8, #8]
 	sub	r1, fp, #48
 	ldr	r3, [r8, #12]
@@ -8436,14 +8510,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	r1, [r5, #4012]
 	cmn	r1, #1
-	beq	.L1191
+	beq	.L1193
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1191
+	beq	.L1193
 	ldr	r2, [fp, #-52]
 	cmn	r2, #1
-	beq	.L1192
+	beq	.L1194
 	ldr	r0, [r5, #3836]
 	mov	r1, #1
 	add	r0, r0, r7
@@ -8455,122 +8529,122 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r7]
 	add	r3, r2, r7
 	cmn	r1, #1
-	bne	.L1193
-.L1194:
+	bne	.L1195
+.L1196:
 	mvn	r3, #0
 	ldrh	r0, [r4]
 	str	r3, [fp, #-52]
 	bl	decrement_vpc_count
-.L1202:
+.L1204:
 	ldr	r7, [fp, #-52]
 	cmn	r7, #1
-	beq	.L1185
-.L1215:
+	beq	.L1187
+.L1217:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, #40]
 	mov	r6, r0
 	cmp	r3, r0
-	bhi	.L1207
+	bhi	.L1209
 	movw	r2, #2055
-	ldr	r1, .L1274+4
-	ldr	r0, .L1274+8
+	ldr	r1, .L1276+4
+	ldr	r0, .L1276+8
 	bl	sftl_printk
-.L1207:
+.L1209:
 	ldr	r2, [r5, #2324]
 	lsl	r3, r6, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1208
+	beq	.L1210
 	mov	r0, r6
-	b	.L1270
-.L1192:
+	b	.L1272
+.L1194:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	bne	.L1195
+	bne	.L1197
 	mov	r2, #1
 	sub	r1, fp, #52
 	mov	r0, r6
 	bl	log2phys
-	b	.L1195
-.L1193:
+	b	.L1197
+.L1195:
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1194
+	bne	.L1196
 	ldr	r1, [r8, #4]
 	ldr	r0, [r5, #4012]
 	str	r1, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1194
+	beq	.L1196
 	ldr	r1, [fp, #-48]
 	ldr	r0, [fp, #-44]
 	cmp	r1, r0
-	bne	.L1197
-.L1200:
+	bne	.L1199
+.L1202:
 	ldr	r1, [fp, #-52]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-	b	.L1194
-.L1197:
+	b	.L1196
+.L1199:
 	ldr	r0, [fp, #-52]
 	cmp	r1, r0
-	beq	.L1194
+	beq	.L1196
 	cmn	r1, #1
 	streq	r1, [r2, r7]
-	beq	.L1199
+	beq	.L1201
 	str	r1, [r3, #4]
 	mov	r2, #0
 	mov	r1, #1
 	mov	r0, r3
 	ldr	r8, [r3, #12]
 	bl	FlashReadPages
-.L1199:
+.L1201:
 	ldr	r2, [r5, #3836]
 	ldr	r2, [r2, r7]
 	cmn	r2, #1
-	beq	.L1200
+	beq	.L1202
 	ldr	r3, [r8, #4]
 	ldr	r0, [r5, #4012]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1200
+	beq	.L1202
 	mov	r1, r3
 	ldr	r0, [fp, #-84]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1194
-	b	.L1200
-.L1191:
+	beq	.L1196
+	b	.L1202
+.L1193:
 	ldr	r3, [fp, #-44]
 	ldr	r2, [fp, #-48]
 	cmp	r2, r3
-	beq	.L1202
+	beq	.L1204
 	mov	r2, #1
 	sub	r1, fp, #44
 	mov	r0, r6
 	bl	log2phys
 	ldr	r7, [fp, #-48]
 	cmn	r7, #1
-	beq	.L1202
+	beq	.L1204
 	ldr	r3, [fp, #-52]
 	cmp	r7, r3
-	beq	.L1215
+	beq	.L1217
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1274+16
+	ldr	r3, .L1276+16
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	beq	.L1206
+	beq	.L1208
 	ldrh	r2, [r3, #48]
 	cmp	r2, r0
-	beq	.L1206
+	beq	.L1208
 	ldrh	r3, [r3, #96]
 	cmp	r3, r0
-	bne	.L1202
-.L1206:
+	bne	.L1204
+.L1208:
 	ldr	r0, [r5, #3836]
 	mov	r2, #0
 	mov	r1, #1
@@ -8580,23 +8654,23 @@ FtlRecoverySuperblock:
 	ldr	r3, [r5, #3836]
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L1202
+	beq	.L1204
 	ldr	r1, [r8, #4]
 	ldr	r0, [fp, #-56]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1202
+	bne	.L1204
 	mov	r2, #1
 	sub	r1, fp, #48
 	mov	r0, r6
 	bl	log2phys
-	b	.L1202
-.L1208:
+	b	.L1204
+.L1210:
 	mov	r1, r6
-	ldr	r0, .L1274+20
+	ldr	r0, .L1276+20
 	bl	sftl_printk
-	b	.L1185
-.L1187:
+	b	.L1187
+.L1189:
 	ldr	r3, [r5, #4020]
 	cmp	r3, #31
 	addls	r2, r5, r3, lsl #2
@@ -8608,28 +8682,28 @@ FtlRecoverySuperblock:
 	ldr	r3, [r5, #4012]
 	cmn	r3, #1
 	ldreq	r3, [fp, #-56]
-	beq	.L1269
+	beq	.L1271
 	ldr	r2, [fp, #-56]
 	cmp	r2, r3
-	bcs	.L1185
+	bcs	.L1187
 	mov	r3, r2
-.L1269:
+.L1271:
 	str	r3, [r5, #4012]
-	b	.L1185
-.L1186:
+	b	.L1187
+.L1188:
 	ldrb	r3, [fp, #-68]	@ zero_extendqisi2
 	ldr	r2, [fp, #-68]
 	ldr	r1, [fp, #-60]
 	strb	r3, [r4, #6]
 	ldrh	r3, [fp, #-60]
 	strh	r3, [r4, #2]	@ movhi
-.L1273:
+.L1275:
 	mov	r0, r4
 	bl	ftl_sb_update_avl_pages
-	b	.L1267
-.L1275:
+	b	.L1269
+.L1277:
 	.align	2
-.L1274:
+.L1276:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
@@ -8653,7 +8727,7 @@ FtlSuperblockPowerLostFix:
 	mvn	r3, #0
 	str	r3, [fp, #-36]
 	mov	r7, #0
-	ldr	r3, .L1287
+	ldr	r3, .L1289
 	movw	r1, #61589
 	mov	r4, r0
 	mov	r6, #7
@@ -8671,16 +8745,16 @@ FtlSuperblockPowerLostFix:
 	strh	r2, [r5, #2]	@ movhi
 	ldr	r2, [r3, #3284]
 	str	r1, [r2]
-	ldr	r1, .L1287+4
+	ldr	r1, .L1289+4
 	ldr	r2, [r3, #3284]
 	str	r1, [r2, #4]
-.L1277:
+.L1279:
 	subs	r6, r6, #1
-	beq	.L1279
+	beq	.L1281
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1278
-.L1279:
+	bne	.L1280
+.L1281:
 	ldrh	r3, [r4]
 	ldr	r1, [r8, #2324]
 	ldrh	r0, [r4, #4]
@@ -8695,12 +8769,12 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1278:
+.L1280:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	cmn	r0, #1
 	str	r0, [fp, #-48]
-	beq	.L1279
+	beq	.L1281
 	ldr	r3, [r8, #2544]
 	mov	r1, #1
 	sub	r0, fp, #52
@@ -8714,10 +8788,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1277
-.L1288:
+	b	.L1279
+.L1290:
 	.align	2
-.L1287:
+.L1289:
 	.word	.LANCHOR0
 	.word	305419896
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8733,7 +8807,7 @@ FtlLoadBbt:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1321
+	ldr	r4, .L1323
 	ldr	r3, [r4, #3284]
 	add	r7, r4, #3264
 	ldr	r6, [r4, #3288]
@@ -8743,11 +8817,11 @@ FtlLoadBbt:
 	ldrh	r5, [r4, #98]
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1290:
+.L1292:
 	ldrh	r3, [r4, #98]
 	sub	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1293
+	ble	.L1295
 	lsl	r3, r5, #10
 	mov	r2, #1
 	mov	r1, r2
@@ -8756,7 +8830,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	bne	.L1291
+	bne	.L1293
 	ldr	r3, [r4, #3268]
 	mov	r2, #1
 	mov	r1, r2
@@ -8764,40 +8838,40 @@ FtlLoadBbt:
 	add	r3, r3, #1
 	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.L1291:
+.L1293:
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1292
+	beq	.L1294
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1292
+	bne	.L1294
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1293:
+.L1295:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1307
+	beq	.L1309
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1297
+	beq	.L1299
 	lsl	r3, r3, #10
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1321+4
+	ldr	r0, .L1323+4
 	str	r3, [r4, #3268]
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1297
+	beq	.L1299
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1297
+	bne	.L1299
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
@@ -8806,52 +8880,52 @@ FtlLoadBbt:
 	ldrhhi	r3, [r6, #8]
 	strhhi	r2, [r4, #152]	@ movhi
 	strhhi	r3, [r4, #156]	@ movhi
-.L1297:
-	ldr	r7, .L1321+4
+.L1299:
+	ldr	r7, .L1323+4
 	mov	r1, #1
 	ldrh	r0, [r4, #152]
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1299:
+.L1301:
 	cmp	r5, #0
-	bge	.L1302
+	bge	.L1304
 	mov	r2, #254
-	ldr	r1, .L1321+8
-	ldr	r0, .L1321+12
+	ldr	r1, .L1323+8
+	ldr	r0, .L1323+12
 	bl	sftl_printk
-.L1301:
+.L1303:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1304
+	beq	.L1306
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1304
+	beq	.L1306
 	ldrh	r3, [r4, #42]
 	lsr	r3, r3, #2
 	cmp	r0, r3
 	cmpcc	r2, r3
-	bcs	.L1304
+	bcs	.L1306
 	bl	FtlSysBlkNumInit
-.L1304:
-	ldr	r6, .L1321+16
+.L1306:
+	ldr	r6, .L1323+16
 	mov	r5, #0
 	add	r7, r6, #3728
-.L1305:
+.L1307:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1306
+	bcc	.L1308
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1292:
+.L1294:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1290
-.L1302:
+	b	.L1292
+.L1304:
 	ldrh	r3, [r4, #152]
 	mov	r2, #1
 	mov	r1, r2
@@ -8863,16 +8937,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1300
+	beq	.L1302
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1301
-.L1300:
+	beq	.L1303
+.L1302:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1299
-.L1306:
+	b	.L1301
+.L1308:
 	ldrh	r2, [r7]
 	ldr	r1, [r4, #3272]
 	ldr	r0, [r6, #4]!
@@ -8880,13 +8954,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	add	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1305
-.L1307:
+	b	.L1307
+.L1309:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1322:
+.L1324:
 	.align	2
-.L1321:
+.L1323:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+443
@@ -8907,47 +8981,47 @@ FtlMakeBbt:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r7, #0
-	ldr	r8, .L1342
+	ldr	r8, .L1344
 	bl	FtlBbtMemInit
 	bl	FtlLoadFactoryBbt
 	sub	r5, r8, #180
 	sub	r9, r8, #18
 	mov	r4, r5
-.L1324:
+.L1326:
 	ldrh	r3, [r5, #54]
 	cmp	r7, r3
-	bcc	.L1330
+	bcc	.L1332
 	mov	r0, #0
-.L1331:
+.L1333:
 	ldrh	r2, [r4, #114]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1332
+	bhi	.L1334
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	sub	r5, r5, #1
 	uxth	r5, r5
-.L1333:
+.L1335:
 	ldrh	r3, [r4, #164]
 	sub	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1337
+	ble	.L1339
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1334
+	beq	.L1336
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1335
+	beq	.L1337
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1334:
+.L1336:
 	sub	r5, r5, #1
 	uxth	r5, r5
-	b	.L1333
-.L1330:
+	b	.L1335
+.L1332:
 	ldrh	r3, [r9, #2]!
 	movw	r2, #65535
 	ldr	r0, [r5, #3284]
@@ -8955,11 +9029,11 @@ FtlMakeBbt:
 	cmp	r3, r2
 	str	r0, [r5, #3272]
 	str	r10, [r5, #3276]
-	beq	.L1325
+	beq	.L1327
 	ldrh	ip, [r5, #98]
 	mov	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1342+4
+	ldr	r0, .L1344+4
 	mla	ip, r7, ip, r3
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
@@ -8972,29 +9046,29 @@ FtlMakeBbt:
 	asr	r2, r2, #3
 	bl	ftl_memcpy
 	ldr	ip, [fp, #-44]
-.L1326:
+.L1328:
 	uxth	r0, ip
 	add	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1324
-.L1325:
+	b	.L1326
+.L1327:
 	mov	r1, r7
 	bl	FlashGetBadBlockList
 	ldr	r1, [r8]
 	ldr	r0, [r5, #3272]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1328:
+.L1330:
 	sub	r6, r6, #1
 	uxth	r6, r6
-.L1327:
+.L1329:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r7, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1328
+	beq	.L1330
 	mov	r1, #16
 	ldr	r0, [r4, #3288]
 	strh	r6, [r9]	@ movhi
@@ -9002,7 +9076,7 @@ FtlMakeBbt:
 	mov	r1, #4096
 	ldr	r0, [r4, #3284]
 	bl	__memzero
-	ldr	r3, .L1342+8
+	ldr	r3, .L1344+8
 	strh	r3, [r10]	@ movhi
 	mov	r3, #0
 	str	r3, [r10, #4]
@@ -9016,39 +9090,39 @@ FtlMakeBbt:
 	lsl	r3, ip, #10
 	str	ip, [fp, #-44]
 	str	r3, [r4, #3268]
-	ldr	r3, .L1342+12
+	ldr	r3, .L1344+12
 	ldrh	r2, [r3]
 	lsl	r2, r2, #2
 	bl	ftl_memcpy
 	mov	r2, #1
-	ldr	r0, .L1342+4
+	ldr	r0, .L1344+4
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	mov	r3, #1
-	ldr	r0, .L1342+4
+	ldr	r0, .L1344+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [r4, #3264]
 	ldr	ip, [fp, #-44]
 	cmn	r3, #1
-	bne	.L1326
+	bne	.L1328
 	uxth	r0, ip
 	bl	FtlBbmMapBadBlock
-	b	.L1327
-.L1332:
+	b	.L1329
+.L1334:
 	uxth	r0, r0
 	bl	FtlBbmMapBadBlock
 	mov	r0, r5
-	b	.L1331
-.L1335:
+	b	.L1333
+.L1337:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
 	strheq	r5, [r4, #152]	@ movhi
-	beq	.L1334
-.L1336:
+	beq	.L1336
+.L1338:
 	strh	r5, [r4, #156]	@ movhi
-.L1337:
+.L1339:
 	ldrh	r3, [r4, #152]
 	mov	r5, #0
 	ldr	r0, [r4, #3804]
@@ -9078,9 +9152,9 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1343:
+.L1345:
 	.align	2
-.L1342:
+.L1344:
 	.word	.LANCHOR0+180
 	.word	.LANCHOR0+3264
 	.word	-3872
@@ -9100,26 +9174,26 @@ FtlVendorPartWrite:
 	sub	fp, ip, #4
 	sub	sp, sp, #100
 	mov	r7, r0
-	ldr	r4, .L1353
+	ldr	r4, .L1355
 	mov	r5, r1
 	str	r2, [fp, #-128]
 	add	r2, r0, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
 	mvnhi	r8, #0
-	bhi	.L1344
+	bhi	.L1346
 	ldrh	r6, [r4, #108]
 	mov	r8, #0
 	lsr	r6, r0, r6
 	lsl	r10, r6, #2
-.L1346:
+.L1348:
 	cmp	r5, #0
-	bne	.L1351
-.L1344:
+	bne	.L1353
+.L1346:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1351:
+.L1353:
 	ldr	r3, [r4, #3888]
 	mov	r0, r7
 	ldrh	r2, [r4, #58]
@@ -9139,7 +9213,7 @@ FtlVendorPartWrite:
 	cmpne	r9, r2
 	movne	r1, #1
 	moveq	r1, #0
-	beq	.L1348
+	beq	.L1350
 	ldr	r2, [r4, #3852]
 	sub	r0, fp, #124
 	str	ip, [fp, #-120]
@@ -9149,7 +9223,7 @@ FtlVendorPartWrite:
 	mov	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.L1349:
+.L1351:
 	ldr	r3, [fp, #-132]
 	lsl	ip, r9, #9
 	ldr	r0, [r4, #3852]
@@ -9163,7 +9237,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	mov	r1, r6
 	ldr	r2, [r4, #3852]
-	ldr	r0, .L1353+4
+	ldr	r0, .L1355+4
 	add	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [fp, #-128]
@@ -9172,15 +9246,15 @@ FtlVendorPartWrite:
 	mvneq	r8, #0
 	add	r3, r3, ip
 	str	r3, [fp, #-128]
-	b	.L1346
-.L1348:
+	b	.L1348
+.L1350:
 	ldrh	r2, [r4, #110]
 	ldr	r0, [r4, #3852]
 	bl	ftl_memset
-	b	.L1349
-.L1354:
+	b	.L1351
+.L1356:
 	.align	2
-.L1353:
+.L1355:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3956
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -9196,12 +9270,12 @@ Ftl_save_ext_data:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1357
-	ldr	r2, .L1357+4
+	ldr	r3, .L1359
+	ldr	r2, .L1359+4
 	ldr	r1, [r3, #2636]
 	cmp	r1, r2
 	ldmfdne	sp, {fp, sp, pc}
-	ldr	r2, .L1357+8
+	ldr	r2, .L1359+8
 	mov	r1, #1
 	mov	r0, #0
 	str	r2, [r3, #2640]
@@ -9229,12 +9303,12 @@ Ftl_save_ext_data:
 	str	r2, [r3, #2680]
 	ldr	r2, [r3, #2568]
 	str	r2, [r3, #2684]
-	ldr	r2, .L1357+12
+	ldr	r2, .L1359+12
 	bl	FtlVendorPartWrite
 	ldmfd	sp, {fp, sp, pc}
-.L1358:
+.L1360:
 	.align	2
-.L1357:
+.L1359:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177349
@@ -9252,7 +9326,7 @@ FtlEctTblFlush:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1364
+	ldr	r2, .L1366
 	ldrh	r3, [r2]
 	cmp	r3, #31
 	addls	r3, r3, #1
@@ -9260,22 +9334,22 @@ FtlEctTblFlush:
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
 	cmp	r0, #0
-	ldr	r2, .L1364+4
-	bne	.L1361
+	ldr	r2, .L1366+4
+	bne	.L1363
 	ldr	r1, [r2, #3864]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1362
-.L1361:
+	bcc	.L1364
+.L1363:
 	ldr	r3, [r2, #3864]
 	mov	r0, #64
 	ldr	r1, [r3, #16]
 	str	r1, [r3, #20]
-	ldr	r1, .L1364+8
+	ldr	r1, .L1366+8
 	str	r1, [r3]
-	ldr	r3, .L1364+12
+	ldr	r3, .L1366+12
 	ldr	r2, [r2, #3864]
 	ldrh	r1, [r3]
 	lsl	r3, r1, #9
@@ -9287,12 +9361,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1362:
+.L1364:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1365:
+.L1367:
 	.align	2
-.L1364:
+.L1366:
 	.word	.LANCHOR3-4032
 	.word	.LANCHOR0
 	.word	1112818501
@@ -9312,7 +9386,7 @@ FtlVendorPartRead:
 	sub	fp, ip, #4
 	sub	sp, sp, #96
 	mov	r9, r2
-	ldr	r3, .L1376
+	ldr	r3, .L1378
 	mov	r6, r1
 	add	r1, r0, r1
 	mov	r7, r0
@@ -9320,20 +9394,20 @@ FtlVendorPartRead:
 	mov	r10, r3
 	cmp	r1, r2
 	mvnhi	r8, #0
-	bhi	.L1366
+	bhi	.L1368
 	ldrh	r5, [r3, #108]
 	mov	r8, #0
 	lsr	r5, r0, r5
 	lsl	r3, r5, #2
 	str	r3, [fp, #-128]
-.L1368:
+.L1370:
 	cmp	r6, #0
-	bne	.L1374
-.L1366:
+	bne	.L1376
+.L1368:
 	mov	r0, r8
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1374:
+.L1376:
 	ldr	r3, [fp, #-128]
 	mov	r0, r7
 	ldr	r2, [r10, #3888]
@@ -9351,7 +9425,7 @@ FtlVendorPartRead:
 	cmp	ip, #0
 	lsl	r3, r4, #9
 	str	r3, [fp, #-136]
-	beq	.L1370
+	beq	.L1372
 	ldr	r2, [r10, #3852]
 	sub	r0, fp, #124
 	str	ip, [fp, #-120]
@@ -9368,23 +9442,23 @@ FtlVendorPartRead:
 	ldr	r2, [r10, #3264]
 	mvneq	r8, #0
 	cmp	r2, #256
-	bne	.L1372
+	bne	.L1374
 	mov	r2, ip
 	mov	r1, r5
-	ldr	r0, .L1376+4
+	ldr	r0, .L1378+4
 	bl	sftl_printk
 	ldr	r2, [r10, #3852]
 	mov	r1, r5
-	ldr	r0, .L1376+8
+	ldr	r0, .L1378+8
 	bl	FtlMapWritePage
-.L1372:
+.L1374:
 	ldr	r1, [r10, #3852]
 	lsl	r2, r4, #9
 	ldr	r3, [fp, #-132]
 	mov	r0, r9
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1373:
+.L1375:
 	ldr	r3, [fp, #-128]
 	add	r5, r5, #1
 	sub	r6, r6, r4
@@ -9392,16 +9466,16 @@ FtlVendorPartRead:
 	add	r9, r9, r4, lsl #9
 	add	r3, r3, #4
 	str	r3, [fp, #-128]
-	b	.L1368
-.L1370:
+	b	.L1370
+.L1372:
 	lsl	r2, r4, #9
 	mov	r1, ip
 	mov	r0, r9
 	bl	ftl_memset
-	b	.L1373
-.L1377:
+	b	.L1375
+.L1379:
 	.align	2
-.L1376:
+.L1378:
 	.word	.LANCHOR0
 	.word	.LC107
 	.word	.LANCHOR0+3956
@@ -9418,7 +9492,7 @@ FtlLoadEctTbl:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1380
+	ldr	r4, .L1382
 	mov	r0, #64
 	add	r5, r4, #3856
 	ldr	r2, [r4, #3864]
@@ -9426,23 +9500,23 @@ FtlLoadEctTbl:
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #3864]
 	ldr	r2, [r3]
-	ldr	r3, .L1380+4
+	ldr	r3, .L1382+4
 	cmp	r2, r3
-	beq	.L1379
-	ldr	r1, .L1380+8
-	ldr	r0, .L1380+12
+	beq	.L1381
+	ldr	r1, .L1382+8
+	ldr	r0, .L1382+12
 	bl	sftl_printk
 	ldrh	r2, [r5]
 	mov	r1, #0
 	ldr	r0, [r4, #3864]
 	lsl	r2, r2, #9
 	bl	ftl_memset
-.L1379:
+.L1381:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1381:
+.L1383:
 	.align	2
-.L1380:
+.L1382:
 	.word	.LANCHOR0
 	.word	1112818501
 	.word	.LC108
@@ -9460,23 +9534,23 @@ Ftl_load_ext_data:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1385
+	ldr	r4, .L1387
 	mov	r1, #1
 	mov	r0, #0
-	ldr	r2, .L1385+4
+	ldr	r2, .L1387+4
 	bl	FtlVendorPartRead
-	ldr	r5, .L1385+8
+	ldr	r5, .L1387+8
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1383
+	beq	.L1385
 	mov	r1, #512
-	ldr	r0, .L1385+4
+	ldr	r0, .L1387+4
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1383:
+.L1385:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1384
+	bne	.L1386
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9501,7 +9575,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1384:
+.L1386:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9510,9 +9584,9 @@ Ftl_load_ext_data:
 	bl	__udivsi3
 	str	r0, [r4, #2556]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1386:
+.L1388:
 	.align	2
-.L1385:
+.L1387:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2636
 	.word	1179929683
@@ -9529,10 +9603,10 @@ FtlVpcTblFlush:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1396
+	ldr	r4, .L1398
 	mov	r6, #0
 	mov	r1, #255
-	ldr	r10, .L1396+4
+	ldr	r10, .L1398+4
 	ldr	r3, [r4, #3284]
 	add	r5, r4, #2576
 	ldr	r8, [r4, #3288]
@@ -9543,15 +9617,15 @@ FtlVpcTblFlush:
 	str	r8, [r4, #3276]
 	str	r6, [r8, #12]
 	strh	r3, [r8, #2]	@ movhi
-	ldr	r3, .L1396+8
+	ldr	r3, .L1398+8
 	strh	r3, [r8]	@ movhi
 	ldr	r3, [r4, #2584]
 	str	r6, [r8, #8]
 	ldrh	r2, [r5, #-226]
 	str	r3, [r8, #4]
-	ldr	r3, .L1396+12
+	ldr	r3, .L1398+12
 	str	r3, [r4, #2268]
-	ldr	r3, .L1396+16
+	ldr	r3, .L1398+16
 	str	r3, [r4, #2272]
 	ldrh	r3, [r5, #6]
 	strh	r3, [r7, #8]	@ movhi
@@ -9621,7 +9695,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.L1388:
+.L1390:
 	ldr	r3, [r4, #3284]
 	mov	r0, r9
 	ldrh	r2, [r5]
@@ -9639,7 +9713,7 @@ FtlVpcTblFlush:
 	ldrh	r2, [r5, #2]
 	sub	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1389
+	blt	.L1391
 	ldrh	r3, [r5]
 	ldrh	r7, [r5, #4]
 	strh	r3, [r5, #4]	@ movhi
@@ -9660,21 +9734,21 @@ FtlVpcTblFlush:
 	mov	r1, r3
 	mov	r0, r9
 	bl	FlashProgPages
-.L1389:
+.L1391:
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r4, #3264]
 	add	r3, r3, #1
 	uxth	r3, r3
 	cmn	r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1390
+	bne	.L1392
 	cmp	r3, #1
-	bne	.L1391
+	bne	.L1393
 	movw	r2, #1169
 	mov	r1, r10
-	ldr	r0, .L1396+20
+	ldr	r0, .L1398+20
 	bl	sftl_printk
-.L1391:
+.L1393:
 	ldrh	r3, [r5, #2]
 	add	r6, r6, #1
 	uxth	r6, r6
@@ -9683,29 +9757,29 @@ FtlVpcTblFlush:
 	subeq	r3, r3, #1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1388
+	bls	.L1390
 	mov	r2, r6
 	ldr	r1, [r4, #3268]
-	ldr	r0, .L1396+24
+	ldr	r0, .L1398+24
 	bl	sftl_printk
-.L1394:
-	b	.L1394
-.L1390:
+.L1396:
+	b	.L1396
+.L1392:
 	cmp	r2, #256
 	cmpne	r3, #1
-	beq	.L1388
+	beq	.L1390
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1395
+	beq	.L1397
 	mov	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.L1395:
+.L1397:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1397:
+.L1399:
 	.align	2
-.L1396:
+.L1398:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+454
 	.word	-3932
@@ -9745,17 +9819,17 @@ sftl_deinit:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1401
+	ldr	r3, .L1403
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1400
+	bne	.L1402
 	bl	FtlSysFlush
-.L1400:
+.L1402:
 	mov	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1402:
+.L1404:
 	.align	2
-.L1401:
+.L1403:
 	.word	.LANCHOR2
 	.size	sftl_deinit, .-sftl_deinit
 	.align	2
@@ -9772,21 +9846,21 @@ FtlDiscard:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	add	r2, r0, r1
-	ldr	r6, .L1418
+	ldr	r6, .L1420
 	mov	r8, r0
 	mov	r5, r1
 	ldr	r3, [r6, #140]
 	cmp	r2, r3
 	mvnhi	r0, #0
-	bhi	.L1403
-	cmp	r1, #31
 	bhi	.L1405
-.L1410:
+	cmp	r1, #31
+	bhi	.L1407
+.L1412:
 	mov	r0, #0
-.L1403:
+.L1405:
 	sub	sp, fp, #32
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1405:
+.L1407:
 	ldrh	r4, [r6, #58]
 	mov	r1, r4
 	bl	__udivsi3
@@ -9795,38 +9869,38 @@ FtlDiscard:
 	sub	r8, r8, r3
 	uxth	r8, r8
 	cmp	r8, #0
-	beq	.L1406
+	beq	.L1408
 	sub	r4, r4, r8
 	add	r7, r0, #1
 	cmp	r4, r5
 	movcs	r4, r5
 	uxth	r4, r4
 	sub	r5, r5, r4
-.L1406:
-	ldr	r4, .L1418+4
+.L1408:
+	ldr	r4, .L1420+4
 	mvn	r3, #0
 	str	r3, [fp, #-36]
-.L1407:
+.L1409:
 	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1409
-	ldr	r3, .L1418+4
+	bcs	.L1411
+	ldr	r3, .L1420+4
 	ldr	r2, [r3, #-4028]
 	cmp	r2, #32
-	bls	.L1410
+	bls	.L1412
 	mov	r4, #0
 	str	r4, [r3, #-4028]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1410
-.L1409:
+	b	.L1412
+.L1411:
 	mov	r2, #0
 	sub	r1, fp, #40
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [fp, #-40]
 	cmn	r3, #1
-	beq	.L1408
+	beq	.L1410
 	ldr	r3, [r4, #-4028]
 	mov	r2, #1
 	sub	r1, fp, #36
@@ -9841,14 +9915,14 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1408:
+.L1410:
 	ldrh	r3, [r6, #58]
 	add	r7, r7, #1
 	sub	r5, r5, r3
-	b	.L1407
-.L1419:
+	b	.L1409
+.L1421:
 	.align	2
-.L1418:
+.L1420:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.size	FtlDiscard, .-FtlDiscard
@@ -9866,36 +9940,36 @@ FtlVpcCheckAndModify:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	mov	r5, #0
-	ldr	r4, .L1432
-	ldr	r1, .L1432+4
-	ldr	r0, .L1432+8
+	ldr	r4, .L1434
+	ldr	r1, .L1434+4
+	ldr	r0, .L1434+8
 	bl	sftl_printk
 	ldrh	r2, [r4, #42]
 	mov	r1, #0
 	ldr	r0, [r4, #3868]
 	lsl	r2, r2, #1
 	bl	ftl_memset
-.L1421:
+.L1423:
 	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1423
-	ldr	r9, .L1432+12
+	bcc	.L1425
+	ldr	r9, .L1434+12
 	mov	r6, #0
-	ldr	r10, .L1432+16
-.L1424:
+	ldr	r10, .L1434+16
+.L1426:
 	ldrh	r3, [r4, #40]
 	uxth	r5, r6
 	cmp	r3, r5
-	bhi	.L1428
+	bhi	.L1430
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1423:
+.L1425:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r5
 	bl	log2phys
 	ldr	r0, [fp, #-44]
 	cmn	r0, #1
-	beq	.L1422
+	beq	.L1424
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r4, #3868]
@@ -9903,10 +9977,10 @@ FtlVpcCheckAndModify:
 	ldrh	r3, [r2, r0]
 	add	r3, r3, #1
 	strh	r3, [r2, r0]	@ movhi
-.L1422:
+.L1424:
 	add	r5, r5, #1
-	b	.L1421
-.L1428:
+	b	.L1423
+.L1430:
 	uxth	r8, r6
 	ldr	r3, [r4, #2324]
 	movw	r1, #65535
@@ -9916,20 +9990,20 @@ FtlVpcCheckAndModify:
 	ldrh	r3, [r3, r7]
 	cmp	r2, r1
 	cmpne	r2, r3
-	beq	.L1426
+	beq	.L1428
 	mov	r1, r8
 	mov	r0, r9
 	bl	sftl_printk
 	ldrh	r3, [r10]
 	cmp	r3, r5
-	beq	.L1426
-	ldr	r3, .L1432+20
+	beq	.L1428
+	ldr	r3, .L1434+20
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1426
+	beq	.L1428
 	ldrh	r3, [r3, #-48]
 	cmp	r3, r5
-	beq	.L1426
+	beq	.L1428
 	ldr	r3, [r4, #3868]
 	mov	r0, r8
 	ldrh	r2, [r3, r7]
@@ -9938,12 +10012,12 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1426:
+.L1428:
 	add	r6, r6, #1
-	b	.L1424
-.L1433:
+	b	.L1426
+.L1435:
 	.align	2
-.L1432:
+.L1434:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
 	.word	.LC97
@@ -9963,49 +10037,49 @@ allocate_new_data_superblock:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r5, .L1444
+	ldr	r5, .L1446
 	mov	r7, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r5, #40]
 	cmp	r3, r4
-	bcs	.L1435
+	bcs	.L1437
 	movw	r2, #2750
-	ldr	r1, .L1444+4
-	ldr	r0, .L1444+8
+	ldr	r1, .L1446+4
+	ldr	r0, .L1446+8
 	bl	sftl_printk
-.L1435:
+.L1437:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1436
+	beq	.L1438
 	ldr	r2, [r5, #2324]
 	lsl	r3, r4, #1
 	mov	r0, r4
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1437
+	beq	.L1439
 	bl	INSERT_DATA_LIST
-.L1436:
+.L1438:
 	mov	r3, #1
 	movw	r2, #65535
 	strb	r3, [r7, #8]
-	ldr	r3, .L1444+12
+	ldr	r3, .L1446+12
 	ldrh	r0, [r3]
 	mov	r6, r3
 	cmp	r0, r2
-	beq	.L1438
+	beq	.L1440
 	cmp	r4, r0
-	bne	.L1439
+	bne	.L1441
 	ldr	r2, [r5, #2324]
 	lsl	r3, r0, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1440
-.L1439:
+	beq	.L1442
+.L1441:
 	bl	update_vpc_list
-.L1440:
+.L1442:
 	mvn	r3, #0
 	strh	r3, [r6]	@ movhi
-.L1438:
+.L1440:
 	mov	r0, r7
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -10014,12 +10088,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1437:
+.L1439:
 	bl	INSERT_FREE_LIST
-	b	.L1436
-.L1445:
+	b	.L1438
+.L1447:
 	.align	2
-.L1444:
+.L1446:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -10039,26 +10113,26 @@ FtlProgPages:
 	sub	fp, ip, #4
 	sub	sp, sp, #8
 	mov	r7, #0
-	ldr	r6, .L1460
+	ldr	r6, .L1462
 	mov	r4, r3
-	ldr	r10, .L1460+4
+	ldr	r10, .L1462+4
 	mov	r2, #0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r5, r0
 	mov	r9, r1
 	bl	FlashProgPages
-.L1447:
+.L1449:
 	cmp	r7, r9
-	beq	.L1454
+	beq	.L1456
 	mov	r8, #0
-	b	.L1455
-.L1450:
+	b	.L1457
+.L1452:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1448
+	bne	.L1450
 	ldr	r1, [r6, #2324]
 	lsl	r3, r3, #1
 	ldrh	r0, [r4, #4]
@@ -10069,13 +10143,13 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1448:
+.L1450:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1449
+	bne	.L1451
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1449:
+.L1451:
 	ldr	r3, [r6, #2732]
 	add	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -10091,19 +10165,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1455:
+.L1457:
 	ldr	r3, [r5]
 	cmn	r3, #1
-	beq	.L1450
+	beq	.L1452
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1451
-	mov	r2, #936
+	bcc	.L1453
+	movw	r2, #941
 	mov	r1, r10
-	ldr	r0, .L1460+8
+	ldr	r0, .L1462+8
 	bl	sftl_printk
-.L1451:
+.L1453:
 	ldr	r3, [r5, #4]
 	sub	r1, fp, #40
 	mov	r2, #1
@@ -10118,37 +10192,37 @@ FtlProgPages:
 	ldr	r3, [fp, #-48]
 	mov	r8, r0
 	cmn	r3, #1
-	beq	.L1452
+	beq	.L1454
 	ldr	r2, [r6, #2324]
 	lsl	r3, r0, #1
 	ldrh	r2, [r2, r3]
 	cmp	r2, #0
-	bne	.L1453
+	bne	.L1455
 	mov	r1, r0
-	ldr	r0, .L1460+12
+	ldr	r0, .L1462+12
 	bl	sftl_printk
-.L1453:
+.L1455:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1452:
+.L1454:
 	add	r7, r7, #1
 	add	r5, r5, #20
-	b	.L1447
-.L1454:
+	b	.L1449
+.L1456:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1446
-	movw	r2, #951
-	ldr	r1, .L1460+4
-	ldr	r0, .L1460+8
+	bcc	.L1448
+	mov	r2, #956
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	sftl_printk
-.L1446:
+.L1448:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1461:
+.L1463:
 	.align	2
-.L1460:
+.L1462:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+519
 	.word	.LC1
@@ -10168,51 +10242,51 @@ FtlGcFreeTempBlock:
 	sub	fp, ip, #4
 	sub	sp, sp, #4
 	movw	r3, #2444
-	ldr	r4, .L1488
+	ldr	r4, .L1490
 	movw	r2, #65535
 	ldrh	r5, [r4, r3]
 	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1463
-.L1473:
+	bne	.L1465
+.L1475:
 	mov	r3, #0
 	str	r3, [r4, #4008]
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1486
-.L1464:
+	bne	.L1488
+.L1466:
 	mov	r0, #0
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1463:
+.L1465:
 	cmp	r0, #0
-	beq	.L1466
-	ldr	r3, .L1488+4
+	beq	.L1468
+	ldr	r3, .L1490+4
 	ldrh	r0, [r3, #4]
 	cmp	r0, r2
-	beq	.L1467
-.L1468:
+	beq	.L1469
+.L1470:
 	mov	r1, #2
-.L1466:
-	ldr	r0, .L1488+8
+.L1468:
+	ldr	r0, .L1490+8
 	bl	FtlGcScanTempBlk
 	cmn	r0, #1
 	str	r0, [fp, #-44]
-	beq	.L1469
+	beq	.L1471
 	ldr	r2, [r4, #2328]
 	lsl	r5, r5, #1
 	ldrh	r3, [r2, r5]
 	cmp	r3, #4
-	bls	.L1470
+	bls	.L1472
 	sub	r3, r3, #5
 	mov	r0, #1
 	strh	r3, [r2, r5]	@ movhi
 	bl	FtlEctTblFlush
-.L1470:
+.L1472:
 	ldr	r3, [r4, #4008]
 	cmp	r3, #0
-	bne	.L1471
+	bne	.L1473
 	ldr	r3, [r4, #2732]
 	ldr	r0, [fp, #-44]
 	add	r3, r3, #1
@@ -10220,47 +10294,47 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1471:
+.L1473:
 	mov	r3, #0
 	str	r3, [r4, #4008]
-.L1482:
+.L1484:
 	mov	r0, #1
 	ldmib	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1467:
+.L1469:
 	mov	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #17
-	bhi	.L1468
-	b	.L1466
-.L1469:
-	ldr	r3, .L1488+4
+	bhi	.L1470
+	b	.L1468
+.L1471:
+	ldr	r3, .L1490+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1482
-	b	.L1473
-.L1486:
+	bne	.L1484
+	b	.L1475
+.L1488:
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
-	ldr	r6, .L1488+12
+	ldr	r6, .L1490+12
 	mul	r3, r3, r1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	beq	.L1474
+	beq	.L1476
 	mov	r2, #162
-	ldr	r1, .L1488+16
-	ldr	r0, .L1488+20
+	ldr	r1, .L1490+16
+	ldr	r0, .L1490+20
 	bl	sftl_printk
-.L1474:
+.L1476:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	movw	r3, #2444
 	ldrh	r0, [r4, #102]
 	mov	r5, #0
 	ldrh	r3, [r4, r3]
 	ldr	r1, [r4, #2324]
-	ldr	r10, .L1488+20
+	ldr	r10, .L1490+20
 	smulbb	r2, r2, r0
 	lsl	r3, r3, #1
 	strh	r2, [r1, r3]	@ movhi
@@ -10268,11 +10342,11 @@ FtlGcFreeTempBlock:
 	ldrh	r3, [r6]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1475:
+.L1477:
 	ldrh	r2, [r6]
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L1479
+	bhi	.L1481
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2444
@@ -10282,9 +10356,9 @@ FtlGcFreeTempBlock:
 	lsl	r2, r0, #1
 	ldrh	r2, [r1, r2]
 	cmp	r2, #0
-	beq	.L1480
+	beq	.L1482
 	bl	INSERT_DATA_LIST
-.L1481:
+.L1483:
 	mvn	r7, #0
 	movw	r3, #3192
 	strh	r7, [r4, r5]	@ movhi
@@ -10304,8 +10378,8 @@ FtlGcFreeTempBlock:
 	strhgt	r7, [r4, r3]	@ movhi
 	movwgt	r3, #3148
 	strhgt	r2, [r4, r3]	@ movhi
-	b	.L1464
-.L1479:
+	b	.L1466
+.L1481:
 	uxth	r3, r5
 	mov	r7, #12
 	ldr	r8, [r4, #3196]
@@ -10314,12 +10388,12 @@ FtlGcFreeTempBlock:
 	add	r9, r8, r7
 	ldr	r1, [r9, #8]
 	cmp	r1, r2
-	bcc	.L1476
+	bcc	.L1478
 	mov	r2, #168
-	ldr	r1, .L1488+16
+	ldr	r1, .L1490+16
 	mov	r0, r10
 	bl	sftl_printk
-.L1476:
+.L1478:
 	mov	r2, #0
 	sub	r1, fp, #44
 	ldr	r0, [r9, #8]
@@ -10327,7 +10401,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp, #-44]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1477
+	bne	.L1479
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r2, #1
@@ -10336,24 +10410,24 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r9, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1487:
+.L1489:
 	bl	decrement_vpc_count
-.L1478:
+.L1480:
 	add	r5, r5, #1
-	b	.L1475
-.L1477:
+	b	.L1477
+.L1479:
 	ldr	r3, [r9, #4]
 	cmp	r2, r3
-	beq	.L1478
-	ldr	r3, .L1488+8
+	beq	.L1480
+	ldr	r3, .L1490+8
 	ldrh	r0, [r3]
-	b	.L1487
-.L1480:
+	b	.L1489
+.L1482:
 	bl	INSERT_FREE_LIST
-	b	.L1481
-.L1489:
+	b	.L1483
+.L1491:
 	.align	2
-.L1488:
+.L1490:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10373,8 +10447,8 @@ FtlGcPageRecovery:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1492
-	ldr	r5, .L1492+4
+	ldr	r4, .L1494
+	ldr	r5, .L1494+4
 	ldrh	r1, [r4, #102]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
@@ -10382,16 +10456,16 @@ FtlGcPageRecovery:
 	ldrh	r3, [r4, #102]
 	cmp	r2, r3
 	ldmfdcc	sp, {r4, r5, fp, sp, pc}
-	ldr	r0, .L1492+8
+	ldr	r0, .L1494+8
 	bl	FtlMapBlkWriteDump_data
 	mov	r0, #0
 	bl	FtlGcFreeTempBlock
 	mov	r3, #0
 	str	r3, [r4, #4008]
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1493:
+.L1495:
 	.align	2
-.L1492:
+.L1494:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.word	.LANCHOR0+3908
@@ -10408,7 +10482,7 @@ FtlPowerLostRecovery:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1495
+	ldr	r4, .L1497
 	mov	r6, #0
 	add	r5, r4, #2336
 	str	r6, [r4, #4020]
@@ -10428,9 +10502,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r6
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1496:
+.L1498:
 	.align	2
-.L1495:
+.L1497:
 	.word	.LANCHOR0
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.align	2
@@ -10445,7 +10519,7 @@ Ftl_gc_temp_data_write_back:
 	mov	ip, sp
 	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1504
+	ldr	r4, .L1506
 	mov	r3, #0
 	mov	r5, #0
 	mov	r6, #20
@@ -10453,14 +10527,14 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r4, #3164]
 	ldr	r0, [r4, #3840]
 	bl	FlashProgPages
-.L1498:
+.L1500:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1501
+	bhi	.L1503
 	ldr	r0, [r4, #3840]
 	bl	FtlGcBufFree
-	ldr	r3, .L1504+4
+	ldr	r3, .L1506+4
 	mov	r0, #0
 	str	r0, [r4, #3164]
 	ldrh	r3, [r3, #4]
@@ -10468,15 +10542,15 @@ Ftl_gc_temp_data_write_back:
 	ldmfdne	sp, {r4, r5, r6, fp, sp, pc}
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1503
-.L1501:
+	b	.L1505
+.L1503:
 	mul	r3, r6, r3
 	ldr	r2, [r4, #3840]
 	add	r5, r5, #1
 	ldr	r0, [r2, r3]
 	add	r1, r2, r3
 	cmn	r0, #1
-	bne	.L1499
+	bne	.L1501
 	movw	r1, #2444
 	ldr	ip, [r4, #2324]
 	ldrh	r2, [r4, r1]
@@ -10494,19 +10568,19 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1503:
+.L1505:
 	mov	r0, #1
 	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
-.L1499:
+.L1501:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1498
-.L1505:
+	b	.L1500
+.L1507:
 	.align	2
-.L1504:
+.L1506:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10522,38 +10596,38 @@ Ftl_get_new_temp_ppa:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1509
+	ldr	r4, .L1511
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1507
-	ldr	r3, .L1509+4
+	beq	.L1509
+	ldr	r3, .L1511+4
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L1508
-.L1507:
+	bne	.L1510
+.L1509:
 	mov	r0, #0
 	mov	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1509+4
+	ldr	r0, .L1511+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	movw	r3, #3192
 	strh	r5, [r4, r3]	@ movhi
-	ldr	r3, .L1509+8
+	ldr	r3, .L1511+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1508:
-	ldr	r0, .L1509+4
+.L1510:
+	ldr	r0, .L1511+4
 	bl	get_new_active_ppa
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1510:
+.L1512:
 	.align	2
-.L1509:
+.L1511:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.word	.LANCHOR0+3200
@@ -10572,28 +10646,28 @@ rk_ftl_garbage_collect:
 	sub	fp, ip, #4
 	sub	sp, sp, #36
 	mov	r6, r0
-	ldr	r3, .L1623
+	ldr	r3, .L1625
 	ldr	r0, [r3, #3824]
 	mov	r5, r3
 	cmp	r0, #0
 	movne	r0, #0
-	bne	.L1511
+	bne	.L1513
 	add	r2, r3, #2336
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L1511
-	ldr	r2, .L1623+4
+	bls	.L1513
+	ldr	r2, .L1625+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1513
-.L1516:
+	bne	.L1515
+.L1518:
 	movw	ip, #3204
 	movw	r2, #65535
 	ldrh	r7, [r5, ip]
 	cmp	r7, r2
-	bne	.L1514
-.L1515:
+	bne	.L1516
+.L1517:
 	ldr	r3, [r5, #3152]
 	movw	r2, #2588
 	ldrh	r2, [r5, r2]
@@ -10602,16 +10676,16 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r6, lsl #7
 	cmp	r2, r4
 	str	r3, [r5, #3152]
-	bne	.L1517
+	bne	.L1519
 	movw	r1, #2444
 	ldrh	r4, [r5, r1]
 	cmp	r4, r2
 	movne	r4, r2
-	bne	.L1517
+	bne	.L1519
 	movw	r2, #3202
 	ldrh	r7, [r5, r2]
 	cmp	r7, r4
-	bne	.L1517
+	bne	.L1519
 	movw	r10, #2344
 	ldrh	r2, [r5, r10]
 	cmp	r2, #24
@@ -10619,8 +10693,8 @@ rk_ftl_garbage_collect:
 	movcs	r2, #1024
 	cmp	r3, r2
 	movls	r4, r7
-	bls	.L1517
-	ldr	r3, .L1623+8
+	bls	.L1519
+	ldr	r3, .L1625+8
 	mov	r9, #0
 	str	r9, [r5, #3152]
 	strh	r9, [r3, #-8]	@ movhi
@@ -10628,33 +10702,33 @@ rk_ftl_garbage_collect:
 	cmp	r0, r7
 	mov	r4, r0
 	movne	r7, r0
-	bne	.L1519
+	bne	.L1521
 	movw	r8, #3150
 	ldrh	r2, [r5, r10]
 	ldrh	r3, [r5, r8]
 	cmp	r2, r3
-	bcs	.L1520
+	bcs	.L1522
 	mov	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r4
-	beq	.L1522
+	beq	.L1524
 	mov	r0, r3
 	ldr	r3, [r5, #2324]
 	lsl	r0, r0, #1
 	ldrh	r3, [r3, r0]
 	cmp	r3, #7
-	bhi	.L1523
+	bhi	.L1525
 	mov	r0, r9
 	bl	List_get_gc_head_node
 	uxth	r7, r0
 	mov	r3, #128
 	strh	r3, [r5, r8]	@ movhi
 	cmp	r7, r4
-	bne	.L1519
-.L1522:
+	bne	.L1521
+.L1524:
 	bl	FtlGcReFreshBadBlk
-.L1517:
+.L1519:
 	movw	r2, #65535
 	sub	r3, r4, r2
 	clz	r3, r3
@@ -10663,78 +10737,78 @@ rk_ftl_garbage_collect:
 	movne	r6, #0
 	andeq	r6, r3, #1
 	cmp	r6, #0
-	beq	.L1525
+	beq	.L1527
 	movw	r3, #2344
 	ldrh	r3, [r5, r3]
 	cmp	r3, #24
 	movhi	r6, #1
-	bhi	.L1526
+	bhi	.L1528
 	ldrh	r6, [r5, #102]
 	cmp	r3, #16
 	lsrhi	r6, r6, #5
-	bhi	.L1526
+	bhi	.L1528
 	cmp	r3, #12
 	lsrhi	r6, r6, #4
-	bhi	.L1526
+	bhi	.L1528
 	cmp	r3, #8
 	lsrhi	r6, r6, #2
-.L1526:
+.L1528:
 	movw	r2, #3148
 	ldrh	r1, [r5, r2]
 	cmp	r1, r3
-	bcs	.L1530
+	bcs	.L1532
 	movw	r3, #2444
 	movw	r1, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, r1
-	bne	.L1531
+	bne	.L1533
 	movw	r1, #3202
 	ldrh	r1, [r5, r1]
 	cmp	r1, r3
-	bne	.L1531
-	ldr	r3, .L1623+8
+	bne	.L1533
+	ldr	r3, .L1625+8
 	ldrh	r0, [r3, #-8]
 	cmp	r0, #0
-	bne	.L1532
+	bne	.L1534
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1616
-.L1532:
+	bcs	.L1618
+.L1534:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1616:
+.L1618:
 	strh	r3, [r5, r2]	@ movhi
 	mov	r3, #0
 	str	r3, [r5, #3160]
-.L1511:
+.L1513:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1513:
+.L1515:
 	movw	r1, #2444
 	ldrh	r3, [r3, r1]
 	cmp	r3, r2
-	beq	.L1516
+	beq	.L1518
 	mov	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1516
+	beq	.L1518
 	mov	r0, #1
-	b	.L1511
-.L1514:
+	b	.L1513
+.L1516:
 	movw	r4, #3202
 	ldrh	r3, [r5, r4]
 	cmp	r3, r2
-	bne	.L1515
+	bne	.L1517
 	movw	r1, #3206
 	ldrh	lr, [r5, r1]
 	cmp	lr, r3
-	beq	.L1515
+	beq	.L1517
 	movw	r2, #3208
 	ldrh	r0, [r5, r2]
 	cmp	r0, r3
@@ -10743,16 +10817,16 @@ rk_ftl_garbage_collect:
 	strhne	lr, [r5, ip]	@ movhi
 	strhne	r0, [r5, r1]	@ movhi
 	strhne	r3, [r5, r2]	@ movhi
-	b	.L1515
-.L1523:
+	b	.L1517
+.L1525:
 	mov	r3, #64
-.L1615:
+.L1617:
 	strh	r3, [r5, r8]	@ movhi
-	b	.L1522
-.L1520:
+	b	.L1524
+.L1522:
 	mov	r3, #80
-	b	.L1615
-.L1519:
+	b	.L1617
+.L1521:
 	movw	r0, #3148
 	ldr	r3, [r5, #2324]
 	ldrh	r0, [r5, r0]
@@ -10764,38 +10838,38 @@ rk_ftl_garbage_collect:
 	str	r0, [sp, #4]
 	ldr	r0, [r5, #2328]
 	ldrh	r1, [r0, r1]
-	ldr	r0, .L1623+12
+	ldr	r0, .L1625+12
 	str	r1, [sp]
 	mov	r1, r7
 	bl	sftl_printk
-	b	.L1522
-.L1531:
+	b	.L1524
+.L1533:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
 	strh	r3, [r5, r2]	@ movhi
-.L1530:
+.L1532:
 	movw	r3, #3210
 	movw	r4, #65535
 	ldrh	r3, [r5, r3]
 	cmp	r3, #0
 	addne	r6, r6, #32
 	uxthne	r6, r6
-.L1536:
+.L1538:
 	movw	r3, #2588
 	ldrh	r2, [r5, r3]
 	movw	r1, #65535
 	cmp	r2, r1
-	bne	.L1545
+	bne	.L1547
 	cmp	r4, r2
 	strhne	r4, [r5, r3]	@ movhi
-	bne	.L1547
+	bne	.L1549
 	movw	r2, #3202
 	ldrh	r3, [r5, r2]
 	cmp	r3, r4
-	beq	.L1547
+	beq	.L1549
 	ldr	r1, [r5, #2324]
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
@@ -10808,27 +10882,27 @@ rk_ftl_garbage_collect:
 	strh	r1, [r5, r2]	@ movhi
 	mvn	r2, #0
 	strh	r2, [r5, r3]	@ movhi
-.L1547:
+.L1549:
 	movw	r7, #2588
 	mov	r3, #0
 	ldrh	r0, [r5, r7]
 	strb	r3, [r5, #2596]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1545
+	beq	.L1547
 	bl	IsBlkInGcList
 	cmp	r0, #0
-	ldr	r8, .L1623+16
+	ldr	r8, .L1625+16
 	mvnne	r3, #0
 	strhne	r3, [r5, r7]	@ movhi
 	movw	r7, #2588
 	ldrh	r2, [r5, r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1545
+	beq	.L1547
 	mov	r0, r8
 	bl	make_superblock
-	ldr	r2, .L1623+8
+	ldr	r2, .L1625+8
 	mov	r3, #0
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
@@ -10838,83 +10912,83 @@ rk_ftl_garbage_collect:
 	lsl	r3, r3, #1
 	ldrh	r3, [r1, r3]
 	strh	r3, [r2, #-4]	@ movhi
-.L1545:
+.L1547:
 	movw	r3, #2588
 	movw	r2, #2348
 	ldrh	r3, [r5, r3]
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	beq	.L1551
+	beq	.L1553
 	movw	r2, #2396
 	ldrh	r2, [r5, r2]
 	cmp	r2, r3
-	ldrne	r7, .L1623
+	ldrne	r7, .L1625
 	movne	r5, r7
-	bne	.L1552
-.L1551:
+	bne	.L1554
+.L1553:
 	mvn	r2, #0
 	movw	r3, #2588
-.L1621:
+.L1623:
 	strh	r2, [r5, r3]	@ movhi
-	ldr	r3, .L1623+8
-.L1622:
+	ldr	r3, .L1625+8
+.L1624:
 	ldrh	r0, [r3, #-8]
-	b	.L1511
-.L1525:
+	b	.L1513
+.L1527:
 	movw	r1, #2444
 	ldrh	r7, [r5, r1]
 	cmp	r7, r2
-	bne	.L1593
+	bne	.L1595
 	movw	r2, #3202
 	ldrh	r2, [r5, r2]
 	cmp	r2, r7
 	movne	r3, #0
 	andeq	r3, r3, #1
 	cmp	r3, #0
-	beq	.L1593
+	beq	.L1595
 	movw	r3, #2588
 	ldrh	r3, [r5, r3]
 	cmp	r3, r7
-	beq	.L1537
-.L1542:
+	beq	.L1539
+.L1544:
 	mov	r4, r7
-.L1593:
+.L1595:
 	mov	r6, #1
-	b	.L1536
-.L1537:
+	b	.L1538
+.L1539:
 	movw	r3, #2344
 	movw	r2, #3148
 	ldrh	r8, [r5, r3]
 	ldrh	r3, [r5, r2]
 	str	r6, [r5, #3160]
-	ldr	r4, .L1623+8
+	ldr	r4, .L1625+8
 	cmp	r3, r8
-	bcs	.L1538
+	bcs	.L1540
 	ldrh	r3, [r4, #-8]
 	cmp	r3, #0
-	bne	.L1539
+	bne	.L1541
 	ldr	r3, [r5, #2504]
 	ldr	r1, [r5, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r1, r3, lsr #2
 	movcs	r3, #18
-	bcs	.L1617
-.L1539:
+	bcs	.L1619
+.L1541:
 	movw	r3, #2572
 	movw	r2, #3148
 	ldrh	r3, [r5, r3]
 	add	r3, r3, r3, lsl #1
 	asr	r3, r3, #2
-.L1617:
+.L1619:
 	strh	r3, [r5, r2]	@ movhi
-.L1620:
+.L1622:
 	bl	FtlReadRefresh
 	ldrh	r0, [r4, #-8]
-	b	.L1511
-.L1538:
+	b	.L1513
+.L1540:
 	ldrh	r0, [r4, #-8]
 	cmp	r0, #0
-	bne	.L1542
+	bne	.L1544
 	movw	r3, #2572
 	ldrh	r6, [r5, r3]
 	add	r3, r6, r6, lsl #1
@@ -10930,20 +11004,20 @@ rk_ftl_garbage_collect:
 	mul	r3, r3, r1
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1543
+	ble	.L1545
 	sub	r6, r6, #1
 	cmp	r8, r6
-	bge	.L1620
-.L1543:
+	bge	.L1622
+.L1545:
 	cmp	r2, #0
-	bne	.L1542
+	bne	.L1544
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	movw	r3, #2344
 	ldrh	r0, [r5, r3]
 	add	r0, r0, #1
-	b	.L1511
-.L1555:
+	b	.L1513
+.L1557:
 	uxth	r2, r0
 	str	r1, [fp, #-52]
 	add	r10, r10, #1
@@ -10954,7 +11028,7 @@ rk_ftl_garbage_collect:
 	ldr	r2, [fp, #-48]
 	ldr	r1, [fp, #-52]
 	strhne	r10, [r9]	@ movhi
-	bne	.L1554
+	bne	.L1556
 	ldrh	lr, [r5, #32]
 	uxth	r10, r10
 	ldrh	r3, [r5, #102]
@@ -10965,78 +11039,78 @@ rk_ftl_garbage_collect:
 	ldrh	ip, [r0, r2]
 	add	lr, r3, r3, lsr #31
 	cmp	ip, lr, asr #1
-	bgt	.L1558
+	bgt	.L1560
 	cmp	ip, #8
 	cmphi	r10, #48
-	bls	.L1559
-	ldr	ip, .L1623+20
+	bls	.L1561
+	ldr	ip, .L1625+20
 	ldrh	ip, [ip]
 	cmp	ip, #35
-	bhi	.L1559
-.L1558:
-	ldr	lr, .L1623+24
+	bhi	.L1561
+.L1560:
+	ldr	lr, .L1625+24
 	mov	ip, #0
 	strh	ip, [lr]	@ movhi
-.L1559:
+.L1561:
 	ldrh	ip, [r0, r2]
 	movw	r0, #65535
 	cmp	r3, ip
 	cmple	r4, r0
 	moveq	r3, #1
 	movne	r3, #0
-	bne	.L1560
+	bne	.L1562
 	mvn	r2, #0
 	movw	r3, #2588
 	strh	r2, [r5, r3]	@ movhi
 	mov	r2, #0
 	movw	r3, #3156
-	b	.L1621
-.L1560:
+	b	.L1623
+.L1562:
 	cmp	ip, #0
-	bne	.L1561
+	bne	.L1563
 	bl	decrement_vpc_count
-	ldr	r3, .L1623+24
-	ldr	r2, .L1623+24
+	ldr	r3, .L1625+24
+	ldr	r2, .L1625+24
 	ldrh	r3, [r3]
 	add	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1554
-.L1561:
+	b	.L1556
+.L1563:
 	strb	r3, [r5, #2596]
-	ldr	r3, .L1623+28
+	ldr	r3, .L1625+28
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bne	.L1562
+	bne	.L1564
 	movw	r2, #665
-	ldr	r1, .L1623+32
-	ldr	r0, .L1623+36
+	ldr	r1, .L1625+32
+	ldr	r0, .L1625+36
 	bl	sftl_printk
-.L1562:
-	ldr	r3, .L1623+40
+.L1564:
+	ldr	r3, .L1625+40
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1563
+	bne	.L1565
 	movw	r2, #666
-	ldr	r1, .L1623+32
-	ldr	r0, .L1623+36
+	ldr	r1, .L1625+32
+	ldr	r0, .L1625+36
 	bl	sftl_printk
-.L1563:
-	ldr	r3, .L1623+44
+.L1565:
+	ldr	r3, .L1625+44
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1564
+	bne	.L1566
 	movw	r2, #667
-	ldr	r1, .L1623+32
-	ldr	r0, .L1623+36
+	ldr	r1, .L1625+32
+	ldr	r0, .L1625+36
 	bl	sftl_printk
-.L1564:
-	ldr	r0, .L1623+16
+.L1566:
+	ldr	r0, .L1625+16
 	bl	make_superblock
 	ldrh	r2, [r8]
 	mov	r3, #0
-	ldr	r1, .L1623+48
+	ldr	r1, .L1625+48
 	ldr	r0, [r5, #2324]
 	lsl	r2, r2, #1
 	strh	r3, [r1]	@ movhi
@@ -11044,7 +11118,7 @@ rk_ftl_garbage_collect:
 	strh	r3, [r8, #2]	@ movhi
 	strb	r3, [r5, #2594]
 	strh	r2, [r1, #2]	@ movhi
-.L1553:
+.L1555:
 	bl	FtlReadRefresh
 	mov	r3, #1
 	str	r3, [r5, #3824]
@@ -11058,12 +11132,12 @@ rk_ftl_garbage_collect:
 	subgt	r6, r2, r3
 	mov	r3, #0
 	uxthgt	r6, r6
-.L1619:
+.L1621:
 	str	r3, [fp, #-52]
 	ldrh	r3, [fp, #-52]
-	ldr	r8, .L1623+16
+	ldr	r8, .L1625+16
 	cmp	r6, r3
-	bls	.L1574
+	bls	.L1576
 	ldrh	r9, [r8, #2]
 	add	r1, r8, #14
 	ldr	r3, [fp, #-52]
@@ -11073,8 +11147,8 @@ rk_ftl_garbage_collect:
 	add	r9, r9, r3
 	mov	r3, #0
 	mov	r8, r3
-	b	.L1575
-.L1568:
+	b	.L1577
+.L1570:
 	ldrh	r2, [r1, #2]!
 	add	r3, r3, #1
 	cmp	r2, r10
@@ -11084,22 +11158,22 @@ rk_ftl_garbage_collect:
 	addne	r8, r8, #1
 	uxthne	r8, r8
 	strne	r2, [lr, #4]
-.L1575:
+.L1577:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1568
+	bhi	.L1570
 	ldrb	r2, [r7, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
 	mov	r3, #0
-.L1618:
+.L1620:
 	str	r3, [fp, #-48]
 	ldrh	r3, [fp, #-48]
 	cmp	r3, r8
 	ldrcs	r3, [fp, #-52]
 	addcs	r3, r3, #1
-	bcs	.L1619
-.L1573:
+	bcs	.L1621
+.L1575:
 	ldr	r3, [fp, #-48]
 	mov	r9, #20
 	mul	r9, r9, r3
@@ -11107,22 +11181,22 @@ rk_ftl_garbage_collect:
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	cmn	r3, #1
-	beq	.L1570
+	beq	.L1572
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1570
+	bne	.L1572
 	ldr	r3, [r10, #8]
 	cmn	r3, #1
-	bne	.L1571
+	bne	.L1573
 	movw	r2, #703
-	ldr	r1, .L1623+32
-	ldr	r0, .L1623+36
+	ldr	r1, .L1625+32
+	ldr	r0, .L1625+36
 	str	r3, [fp, #-60]
 	bl	sftl_printk
 	ldr	r3, [fp, #-60]
-.L1571:
+.L1573:
 	mov	r2, #0
 	mov	r0, r3
 	sub	r1, fp, #44
@@ -11132,8 +11206,8 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1570
-	ldr	r3, .L1623+48
+	bne	.L1572
+	ldr	r3, .L1625+48
 	mov	r1, #20
 	ldr	lr, [r5, #3164]
 	ldr	r0, [r0, #16]
@@ -11161,7 +11235,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldr	r2, [fp, #-44]
 	str	r2, [r10, #12]
-	ldr	r2, .L1623+44
+	ldr	r2, .L1625+44
 	ldrh	r1, [r2]
 	str	r2, [fp, #-60]
 	strh	r1, [r10, #2]	@ movhi
@@ -11178,58 +11252,58 @@ rk_ftl_garbage_collect:
 	ldr	r1, [r5, #3164]
 	ldr	r3, [fp, #-68]
 	cmp	r0, r1
-	beq	.L1572
+	beq	.L1574
 	ldr	r2, [fp, #-60]
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1570
-.L1572:
+	bne	.L1572
+.L1574:
 	str	r3, [fp, #-60]
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	ldr	r3, [fp, #-60]
-	ldrne	r2, .L1623
+	ldrne	r2, .L1625
 	movne	r1, #0
 	strne	r1, [r2, #3824]
-	bne	.L1622
-.L1570:
+	bne	.L1624
+.L1572:
 	ldr	r3, [fp, #-48]
 	add	r3, r3, #1
-	b	.L1618
-.L1574:
+	b	.L1620
+.L1576:
 	ldrh	r3, [r8, #2]
 	add	r6, r6, r3
 	ldr	r3, [fp, #-56]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r8, #2]	@ movhi
-	bhi	.L1576
+	bhi	.L1578
 	ldr	r3, [r7, #3164]
-	ldr	r9, .L1623+8
+	ldr	r9, .L1625+8
 	cmp	r3, #0
-	beq	.L1577
+	beq	.L1579
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
 	movne	r3, #0
 	ldrhne	r0, [r9, #-8]
 	strne	r3, [r7, #3824]
-	bne	.L1511
-.L1577:
+	bne	.L1513
+.L1579:
 	ldrh	r6, [r9, #-6]
 	cmp	r6, #0
-	bne	.L1578
+	bne	.L1580
 	ldrh	r1, [r8]
 	ldr	r2, [r7, #2324]
 	lsl	r3, r1, #1
 	ldrh	r3, [r2, r3]
 	cmp	r3, #0
-	beq	.L1578
+	beq	.L1580
 	ldrh	r0, [r9, #-4]
 	ldrh	r2, [r8, #2]
 	str	r3, [sp]
 	mov	r3, r6
 	str	r0, [sp, #4]
-	ldr	r0, .L1623+52
+	ldr	r0, .L1625+52
 	bl	sftl_printk
 	ldrh	r3, [r8]
 	ldr	r2, [r7, #2324]
@@ -11239,49 +11313,49 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1578:
+.L1580:
 	mvn	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1576:
-	ldr	r3, .L1623+56
+.L1578:
+	ldr	r3, .L1625+56
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1579
+	bhi	.L1581
 	ldrh	r6, [r7, #102]
-.L1552:
-	ldr	r8, .L1623+16
+.L1554:
+	ldr	r8, .L1625+16
 	movw	r3, #65535
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1553
+	bne	.L1555
 	add	r9, r8, #568
 	mov	r3, #0
 	str	r3, [r7, #3160]
-.L1554:
+.L1556:
 	ldrh	r10, [r9]
 	mov	r0, r10
 	bl	List_get_gc_head_node
-	ldr	r3, .L1623+16
+	ldr	r3, .L1625+16
 	uxth	r1, r0
 	strh	r1, [r3]	@ movhi
 	movw	r3, #65535
 	cmp	r1, r3
-	bne	.L1555
+	bne	.L1557
 	mov	r3, #0
 	mov	r0, #8
 	strh	r3, [r9]	@ movhi
-	b	.L1511
-.L1579:
+	b	.L1513
+.L1581:
 	mov	r2, #0
 	str	r2, [r7, #3824]
-	ldr	r2, .L1623+8
+	ldr	r2, .L1625+8
 	ldrh	r0, [r2, #-8]
 	cmp	r0, #0
 	addeq	r0, r3, #1
-	b	.L1511
-.L1624:
+	b	.L1513
+.L1626:
 	.align	2
-.L1623:
+.L1625:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3-4016
@@ -11333,29 +11407,29 @@ FtlRead:
 	str	r2, [fp, #-72]
 	cmp	r0, #16
 	mov	r9, r3
-	bne	.L1627
+	bne	.L1629
 	mov	r2, r3
 	ldr	r1, [fp, #-72]
 	add	r0, r7, #256
 	bl	FtlVendorPartRead
 	str	r0, [fp, #-48]
-.L1626:
+.L1628:
 	ldr	r0, [fp, #-48]
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1627:
+.L1629:
 	ldr	r3, [fp, #-72]
-	ldr	r4, .L1661
+	ldr	r4, .L1663
 	add	r3, r1, r3
 	str	r3, [fp, #-56]
 	ldr	r2, [fp, #-56]
 	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	bhi	.L1648
-	ldr	r3, .L1661+4
+	bhi	.L1650
+	ldr	r3, .L1663+4
 	ldr	r3, [r3]
 	cmn	r3, #1
-	beq	.L1649
+	beq	.L1651
 	ldrh	r5, [r4, #58]
 	mov	r0, r7
 	mov	r8, #0
@@ -11380,25 +11454,25 @@ FtlRead:
 	str	r8, [fp, #-48]
 	add	r3, r3, r2
 	str	r3, [r4, #2508]
-.L1629:
+.L1631:
 	ldr	r3, [fp, #-52]
 	cmp	r3, #0
-	bne	.L1646
-	ldr	r3, .L1661
+	bne	.L1648
+	ldr	r3, .L1663
 	movw	r2, #3210
 	ldrh	r2, [r3, r2]
 	cmp	r2, #0
-	bne	.L1647
+	bne	.L1649
 	movw	r2, #2344
 	ldrh	r3, [r3, r2]
 	cmp	r3, #31
-	bhi	.L1626
-.L1647:
+	bhi	.L1628
+.L1649:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1626
-.L1646:
+	b	.L1628
+.L1648:
 	mov	r2, #0
 	sub	r1, fp, #44
 	mov	r0, r5
@@ -11406,7 +11480,7 @@ FtlRead:
 	ldr	r2, [fp, #-44]
 	cmn	r2, #1
 	moveq	r10, #0
-	beq	.L1631
+	beq	.L1633
 	ldr	r3, [r4, #3836]
 	mov	r1, #20
 	ldrh	r10, [r4, #58]
@@ -11414,7 +11488,7 @@ FtlRead:
 	str	r2, [r3, #4]
 	ldr	r2, [fp, #-60]
 	cmp	r5, r2
-	bne	.L1635
+	bne	.L1637
 	ldr	r2, [r4, #3820]
 	mov	r1, r10
 	mov	r0, r7
@@ -11430,7 +11504,7 @@ FtlRead:
 	str	r3, [fp, #-80]
 	ldr	r3, [fp, #-68]
 	streq	r9, [r3, #8]
-.L1636:
+.L1638:
 	ldrh	r2, [r4, #112]
 	ldr	r1, [r4, #3816]
 	str	r5, [r3, #16]
@@ -11439,8 +11513,8 @@ FtlRead:
 	bic	r2, r2, #3
 	add	r2, r1, r2
 	str	r2, [r3, #12]
-	b	.L1634
-.L1633:
+	b	.L1636
+.L1635:
 	mla	r0, r0, r5, r10
 	ldr	r3, [fp, #-56]
 	cmp	r3, r0
@@ -11449,29 +11523,29 @@ FtlRead:
 	cmp	r7, r0
 	movhi	r3, #0
 	cmp	r3, #0
-	beq	.L1632
+	beq	.L1634
 	sub	r0, r0, r7
 	mov	r1, #512
 	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.L1632:
+.L1634:
 	add	r10, r10, #1
-.L1631:
+.L1633:
 	ldrh	r0, [r4, #58]
 	cmp	r10, r0
-	bcc	.L1633
-.L1634:
+	bcc	.L1635
+.L1636:
 	ldr	r3, [fp, #-52]
 	add	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [fp, #-52]
-	beq	.L1638
+	beq	.L1640
 	ldrh	r3, [r4, #32]
 	cmp	r6, r3, lsl #2
-	bne	.L1629
-.L1638:
+	bne	.L1631
+.L1640:
 	cmp	r6, #0
-	beq	.L1629
+	beq	.L1631
 	mov	r2, #0
 	mov	r1, r6
 	ldr	r0, [r4, #3836]
@@ -11486,7 +11560,7 @@ FtlRead:
 	str	r3, [fp, #-88]
 	mov	r3, #0
 	str	r3, [fp, #-68]
-.L1645:
+.L1647:
 	ldr	r3, [fp, #-68]
 	mov	ip, #20
 	ldr	r1, [fp, #-60]
@@ -11495,25 +11569,25 @@ FtlRead:
 	add	r3, r3, r10
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L1640
+	bne	.L1642
 	ldr	r1, [r3, #8]
 	ldr	r3, [r4, #3820]
 	cmp	r1, r3
-	bne	.L1641
+	bne	.L1643
 	ldr	r3, [fp, #-84]
 	mov	r0, r9
 	ldr	r2, [fp, #-88]
 	add	r1, r1, r3
-.L1660:
+.L1662:
 	bl	ftl_memcpy
-.L1641:
+.L1643:
 	ldr	r1, [r4, #3836]
 	add	r1, r1, r10
 	ldr	r3, [r1, #12]
 	ldr	r2, [r1, #16]
 	ldr	r3, [r3, #8]
 	cmp	r2, r3
-	beq	.L1642
+	beq	.L1644
 	ldr	r3, [r4, #2708]
 	add	r3, r3, #1
 	str	r3, [r4, #2708]
@@ -11522,7 +11596,7 @@ FtlRead:
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #16]
 	ldr	r2, [r2]
-	ldr	r0, .L1661+8
+	ldr	r0, .L1663+8
 	str	r2, [sp, #12]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
@@ -11534,7 +11608,7 @@ FtlRead:
 	ldr	r3, [r3]
 	ldr	r1, [r1, #16]
 	bl	sftl_printk
-.L1642:
+.L1644:
 	ldr	r3, [r4, #3836]
 	ldr	r1, [r3, r10]
 	add	r0, r3, r10
@@ -11545,23 +11619,23 @@ FtlRead:
 	streq	r2, [r4, #2708]
 	ldr	r3, [r3, r10]
 	cmp	r3, #256
-	bne	.L1644
+	bne	.L1646
 	ldr	r0, [r0, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1644:
+.L1646:
 	ldr	r3, [fp, #-68]
 	add	r3, r3, #1
 	cmp	r6, r3
 	str	r3, [fp, #-68]
-	bne	.L1645
+	bne	.L1647
 	mov	r6, #0
-	b	.L1629
-.L1635:
+	b	.L1631
+.L1637:
 	ldr	r2, [fp, #-64]
 	cmp	r5, r2
-	bne	.L1637
+	bne	.L1639
 	ldr	r2, [r4, #3812]
 	ldr	r1, [fp, #-56]
 	str	r2, [r3, #8]
@@ -11571,36 +11645,36 @@ FtlRead:
 	subeq	r2, r2, r7
 	addeq	r2, r9, r2, lsl #9
 	streq	r2, [r3, #8]
-	b	.L1636
-.L1637:
+	b	.L1638
+.L1639:
 	mul	r10, r5, r10
 	sub	r10, r10, r7
 	add	r10, r9, r10, lsl #9
 	str	r10, [r3, #8]
-	b	.L1636
-.L1640:
+	b	.L1638
+.L1642:
 	ldr	r1, [fp, #-64]
 	cmp	r1, r2
-	bne	.L1641
+	bne	.L1643
 	ldr	r1, [r3, #8]
 	ldr	r3, [r4, #3812]
 	cmp	r1, r3
-	bne	.L1641
+	bne	.L1643
 	ldrh	r0, [r4, #58]
 	ldr	r3, [fp, #-64]
 	ldr	r2, [fp, #-92]
 	mul	r0, r3, r0
 	sub	r0, r0, r7
 	add	r0, r9, r0, lsl #9
-	b	.L1660
-.L1648:
+	b	.L1662
+.L1650:
 	mvn	r3, #0
-.L1649:
+.L1651:
 	str	r3, [fp, #-48]
-	b	.L1626
-.L1662:
+	b	.L1628
+.L1664:
 	.align	2
-.L1661:
+.L1663:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC96
@@ -11661,27 +11735,27 @@ FtlWrite:
 	str	r2, [fp, #-84]
 	cmp	r0, #16
 	str	r3, [fp, #-80]
-	bne	.L1666
+	bne	.L1668
 	mov	r2, r3
 	ldr	r1, [fp, #-84]
 	add	r0, r9, #256
 	bl	FtlVendorPartWrite
-.L1665:
+.L1667:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1666:
+.L1668:
 	ldr	r3, [fp, #-84]
-	ldr	r4, .L1716
+	ldr	r4, .L1718
 	add	r6, r1, r3
 	ldr	r3, [r4, #140]
 	cmp	r6, r3
 	mvnhi	r0, #0
-	bhi	.L1665
-	ldr	r5, .L1716+4
+	bhi	.L1667
+	ldr	r5, .L1718+4
 	ldr	r0, [r5]
 	cmn	r0, #1
-	beq	.L1665
-	ldr	r3, .L1716+8
+	beq	.L1667
+	ldr	r3, .L1718+8
 	mov	r2, #2048
 	ldrh	r7, [r4, #58]
 	mov	r0, r9
@@ -11703,68 +11777,68 @@ FtlWrite:
 	add	r3, r3, r2
 	str	r3, [r4, #2516]
 	ldr	r3, [r5, #8]
-	ldr	r4, .L1716+12
+	ldr	r4, .L1718+12
 	cmp	r3, #0
-	beq	.L1668
+	beq	.L1670
 	ldrh	r3, [r4, #4]
 	add	r0, r4, #48
 	cmp	r3, #0
 	moveq	r4, r0
-.L1668:
+.L1670:
 	ldr	r5, [fp, #-76]
-	ldr	r10, .L1716
-.L1669:
+	ldr	r10, .L1718
+.L1671:
 	ldr	r3, [fp, #-72]
 	cmp	r3, #0
-	bne	.L1697
+	bne	.L1699
 	mov	r0, r3
 	ldr	r1, [fp, #-96]
 	bl	rk_ftl_garbage_collect
 	movw	r3, #2344
 	ldrh	r3, [r10, r3]
 	cmp	r3, #15
-	bls	.L1698
-.L1700:
+	bls	.L1700
+.L1702:
 	mov	r0, #0
-	b	.L1665
-.L1697:
+	b	.L1667
+.L1699:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r10, #32]
 	cmp	r2, r3
-	bcc	.L1670
-	movw	r2, #991
-	ldr	r1, .L1716+16
-	ldr	r0, .L1716+20
+	bcc	.L1672
+	mov	r2, #996
+	ldr	r1, .L1718+16
+	ldr	r0, .L1718+20
 	bl	sftl_printk
-.L1670:
+.L1672:
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	bne	.L1671
-	ldr	r3, .L1716+12
-	ldr	r6, .L1716+4
+	bne	.L1673
+	ldr	r3, .L1718+12
+	ldr	r6, .L1718+4
 	cmp	r4, r3
-	bne	.L1672
+	bne	.L1674
 	add	r0, r4, #48
 	ldrh	r7, [r0, #4]
 	cmp	r7, #0
-	bne	.L1673
+	bne	.L1675
 	bl	allocate_new_data_superblock
 	str	r7, [r6, #8]
-.L1673:
-	ldr	r0, .L1716+12
+.L1675:
+	ldr	r0, .L1718+12
 	bl	allocate_new_data_superblock
-	ldr	r4, .L1716+12
+	ldr	r4, .L1718+12
 	ldr	r3, [r6, #8]
 	add	r0, r4, #48
 	cmp	r3, #0
 	movne	r4, r0
-.L1674:
+.L1676:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1671
+	bne	.L1673
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1671:
+.L1673:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r4, #4]
 	ldr	r1, [fp, #-72]
@@ -11777,20 +11851,20 @@ FtlWrite:
 	str	r3, [fp, #-108]
 	ldrh	r3, [r10, #32]
 	cmp	r2, r3
-	bcc	.L1675
-	mov	r2, #1024
-	ldr	r1, .L1716+16
-	ldr	r0, .L1716+20
+	bcc	.L1677
+	movw	r2, #1029
+	ldr	r1, .L1718+16
+	ldr	r0, .L1718+20
 	bl	sftl_printk
-.L1675:
+.L1677:
 	mov	r3, #0
-.L1715:
+.L1717:
 	str	r3, [fp, #-68]
 	ldr	r3, [fp, #-68]
 	ldr	r2, [fp, #-108]
 	cmp	r3, r2
-	bne	.L1695
-.L1677:
+	bne	.L1697
+.L1679:
 	mov	r3, r4
 	mov	r2, #0
 	ldr	r1, [fp, #-68]
@@ -11799,30 +11873,30 @@ FtlWrite:
 	ldr	r3, [fp, #-68]
 	ldr	r2, [fp, #-72]
 	cmp	r3, r2
-	bls	.L1696
-	movw	r2, #1101
-	ldr	r1, .L1716+16
-	ldr	r0, .L1716+20
+	bls	.L1698
+	movw	r2, #1106
+	ldr	r1, .L1718+16
+	ldr	r0, .L1718+20
 	bl	sftl_printk
-.L1696:
+.L1698:
 	ldr	r3, [fp, #-72]
 	ldr	r2, [fp, #-68]
 	sub	r3, r3, r2
 	str	r3, [fp, #-72]
-	b	.L1669
-.L1672:
+	b	.L1671
+.L1674:
 	str	r2, [r6, #8]
 	ldrh	r2, [r3, #4]
 	cmp	r2, #0
 	movne	r4, r3
-	bne	.L1671
+	bne	.L1673
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-	b	.L1674
-.L1695:
+	b	.L1676
+.L1697:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1677
+	beq	.L1679
 	mov	r2, #0
 	sub	r1, fp, #64
 	mov	r0, r5
@@ -11854,9 +11928,9 @@ FtlWrite:
 	ldrh	r6, [r10, #58]
 	cmp	r5, r2
 	cmpne	r5, r3
-	bne	.L1678
+	bne	.L1680
 	cmp	r5, r3
-	bne	.L1679
+	bne	.L1681
 	mov	r1, r6
 	mov	r0, r9
 	bl	__umodsi3
@@ -11865,25 +11939,25 @@ FtlWrite:
 	str	r0, [fp, #-88]
 	cmp	r6, r3
 	movcs	r6, r3
-.L1680:
+.L1682:
 	ldrh	r3, [r10, #58]
 	cmp	r6, r3
 	ldr	r3, [fp, #-76]
-	bne	.L1681
+	bne	.L1683
 	cmp	r5, r3
 	ldr	r3, [r10, #3844]
 	add	r7, r3, r7
 	ldreq	r3, [fp, #-80]
 	streq	r3, [r7, #8]
-	beq	.L1683
-.L1712:
+	beq	.L1685
+.L1714:
 	mul	r6, r5, r6
 	ldr	r3, [fp, #-80]
 	sub	r6, r6, r9
 	add	r6, r3, r6, lsl #9
 	str	r6, [r7, #8]
-	b	.L1683
-.L1679:
+	b	.L1685
+.L1681:
 	ldr	r3, [fp, #-84]
 	add	r2, r9, r3
 	smulbb	r3, r6, r5
@@ -11891,8 +11965,8 @@ FtlWrite:
 	mov	r3, #0
 	uxth	r6, r6
 	str	r3, [fp, #-88]
-	b	.L1680
-.L1681:
+	b	.L1682
+.L1683:
 	cmp	r5, r3
 	ldr	r3, [r10, #3844]
 	ldreq	r2, [r10, #3820]
@@ -11901,7 +11975,7 @@ FtlWrite:
 	str	r2, [r3, #8]
 	ldr	r3, [fp, #-64]
 	cmn	r3, #1
-	beq	.L1686
+	beq	.L1688
 	str	r3, [fp, #-56]
 	mov	r1, #1
 	ldr	r3, [r10, #3844]
@@ -11919,49 +11993,49 @@ FtlWrite:
 	ldreq	r3, [r10, #2708]
 	addeq	r3, r3, #1
 	streq	r3, [r10, #2708]
-	beq	.L1690
+	beq	.L1692
 	ldr	r3, [r8, #8]
 	cmp	r5, r3
-	beq	.L1689
+	beq	.L1691
 	ldr	r3, [r10, #2708]
 	mov	r2, r5
-	ldr	r0, .L1716+24
+	ldr	r0, .L1718+24
 	add	r3, r3, #1
 	str	r3, [r10, #2708]
 	ldr	r1, [r8, #8]
 	bl	sftl_printk
-.L1689:
+.L1691:
 	ldr	r3, [r8, #8]
 	cmp	r5, r3
-	beq	.L1690
-	movw	r2, #1077
-	ldr	r1, .L1716+16
-	ldr	r0, .L1716+20
+	beq	.L1692
+	movw	r2, #1082
+	ldr	r1, .L1718+16
+	ldr	r0, .L1718+20
 	bl	sftl_printk
-.L1690:
+.L1692:
 	ldr	r3, [fp, #-76]
 	lsl	r2, r6, #9
 	cmp	r5, r3
-	bne	.L1691
+	bne	.L1693
 	ldr	r3, [r10, #3844]
 	ldr	r1, [fp, #-80]
 	add	r7, r3, r7
 	ldr	r3, [fp, #-88]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1713:
+.L1715:
 	bl	ftl_memcpy
-.L1683:
+.L1685:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r10, #32]
 	cmp	r2, r3
-	bcc	.L1692
-	movw	r2, #1092
-	ldr	r1, .L1716+16
-	ldr	r0, .L1716+20
+	bcc	.L1694
+	movw	r2, #1097
+	ldr	r1, .L1718+16
+	ldr	r0, .L1718+20
 	bl	sftl_printk
-.L1692:
-	ldr	r3, .L1716+28
+.L1694:
+	ldr	r3, .L1718+28
 	ldr	r2, [fp, #-104]
 	ldr	r1, [fp, #-100]
 	strh	r3, [r2, r1]	@ movhi
@@ -11979,16 +12053,16 @@ FtlWrite:
 	strh	r3, [r8, #2]	@ movhi
 	ldr	r3, [fp, #-68]
 	add	r3, r3, #1
-	b	.L1715
-.L1686:
+	b	.L1717
+.L1688:
 	ldr	r3, [r10, #3844]
 	mov	r1, #0
 	ldrh	r2, [r10, #110]
 	add	r3, r3, r7
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1690
-.L1691:
+	b	.L1692
+.L1693:
 	ldrh	r1, [r10, #58]
 	ldr	r3, [r10, #3844]
 	mul	r1, r5, r1
@@ -11997,28 +12071,28 @@ FtlWrite:
 	ldr	r0, [r7, #8]
 	sub	r1, r1, r9
 	add	r1, r3, r1, lsl #9
-	b	.L1713
-.L1678:
+	b	.L1715
+.L1680:
 	ldr	r3, [r10, #3844]
 	add	r7, r3, r7
-	b	.L1712
-.L1698:
-	ldr	r4, .L1716+32
-	ldr	r5, .L1716+36
-.L1710:
+	b	.L1714
+.L1700:
+	ldr	r4, .L1718+32
+	ldr	r5, .L1718+36
+.L1712:
 	ldrh	r3, [r4]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1699
+	bne	.L1701
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1699
+	bne	.L1701
 	mov	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1699:
-	ldr	r3, .L1716+40
+.L1701:
+	ldr	r3, .L1718+40
 	mov	r1, #1
 	mov	r2, #128
 	mov	r0, r1
@@ -12028,14 +12102,14 @@ FtlWrite:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1716+44
+	ldr	r3, .L1718+44
 	ldrh	r3, [r3]
 	cmp	r3, #8
-	bls	.L1710
-	b	.L1700
-.L1717:
+	bls	.L1712
+	b	.L1702
+.L1719:
 	.align	2
-.L1716:
+.L1718:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -12075,12 +12149,12 @@ sftl_write:
 	str	r1, [fp, #-112]
 	cmp	r3, #0
 	str	r2, [fp, #-132]
-	ldr	r4, .L1749
-	beq	.L1719
+	ldr	r4, .L1751
+	beq	.L1721
 	ldr	r3, [r4, #-4012]
 	cmp	r3, #0
-	beq	.L1720
-	ldr	r2, .L1749+4
+	beq	.L1722
+	ldr	r2, .L1751+4
 	mov	r0, #512
 	ldrh	r3, [r2, #14]
 	str	r3, [fp, #-116]
@@ -12091,27 +12165,27 @@ sftl_write:
 	mov	r1, r3
 	str	r3, [fp, #-120]
 	bl	__udivsi3
-	ldr	r2, .L1749+8
+	ldr	r2, .L1751+8
 	mov	r3, #0
-	ldr	r1, .L1749+12
+	ldr	r1, .L1751+12
 	str	r0, [fp, #-108]
 	sub	ip, r2, #262144
-.L1724:
+.L1726:
 	ldr	r0, [r2, #-4]
 	cmp	r0, #0
-	beq	.L1721
-.L1725:
+	beq	.L1723
+.L1727:
 	ldr	r3, [fp, #-108]
 	mov	r4, #0
 	ldr	r2, [fp, #-120]
-	ldr	r9, .L1749+16
-	ldr	r5, .L1749+4
+	ldr	r9, .L1751+16
+	ldr	r5, .L1751+4
 	str	r4, [fp, #-124]
 	mul	r3, r3, r2
 	str	r3, [fp, #-144]
 	ldr	r3, [fp, #-108]
 	str	r3, [fp, #-128]
-.L1722:
+.L1724:
 	mov	r1, #512
 	mov	r0, r9
 	bl	__memzero
@@ -12131,7 +12205,7 @@ sftl_write:
 	mov	r0, #0
 	blx	r3
 	cmp	r6, #512
-	bcs	.L1726
+	bcs	.L1728
 	mov	r1, r8
 	add	r0, r6, r4
 	bl	__udivsi3
@@ -12139,7 +12213,7 @@ sftl_write:
 	mov	r1, r0
 	mov	r0, #0
 	blx	r3
-.L1726:
+.L1728:
 	mov	r1, r6
 	mov	r0, r4
 	bl	__umodsi3
@@ -12147,9 +12221,9 @@ sftl_write:
 	mov	r8, r0
 	sub	r3, r4, r0
 	str	r3, [fp, #-140]
-.L1727:
+.L1729:
 	cmp	r6, #512
-	bcc	.L1728
+	bcc	.L1730
 	ldrb	r7, [r5, #14]	@ zero_extendqisi2
 	mov	r0, r4
 	ldrh	r1, [r5, #10]
@@ -12169,9 +12243,9 @@ sftl_write:
 	bl	__modsi3
 	ldr	ip, [fp, #-148]
 	uxth	r3, r0
-.L1729:
+.L1731:
 	cmp	r6, #512
-	bcs	.L1733
+	bcs	.L1735
 	ldr	r2, [fp, #-136]
 	add	r0, ip, r6
 	mov	r1, r7
@@ -12197,24 +12271,24 @@ sftl_write:
 	blx	ip
 	cmn	r0, #1
 	ldr	ip, [fp, #-148]
-	bne	.L1730
-.L1733:
-	ldr	r3, .L1749+20
+	bne	.L1732
+.L1735:
+	ldr	r3, .L1751+20
 	mov	r6, #0
-.L1731:
+.L1733:
 	mov	r7, r3
 	ldr	r1, [r9, r6, lsl #2]
 	ldr	r2, [r7]
 	add	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1734
+	beq	.L1736
 	mov	r1, #512
 	mov	r0, r9
 	bl	__memzero
 	ldr	r2, [r9, r6, lsl #2]
 	mov	r1, r4
 	str	r6, [sp]
-	ldr	r0, .L1749+24
+	ldr	r0, .L1751+24
 	ldr	r3, [r7]
 	bl	sftl_printk
 	ldr	r1, [fp, #-116]
@@ -12226,7 +12300,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [fp, #-108]
 	cmp	r3, #1
-	bls	.L1735
+	bls	.L1737
 	ldr	r3, [fp, #-120]
 	ldr	r1, [fp, #-116]
 	add	r0, r3, r4
@@ -12235,7 +12309,7 @@ sftl_write:
 	mov	r1, r0
 	mov	r0, #0
 	blx	r3
-.L1735:
+.L1737:
 	ldr	r2, [fp, #-128]
 	ldr	r3, [fp, #-108]
 	add	r3, r3, r2
@@ -12243,12 +12317,12 @@ sftl_write:
 	add	r4, r4, r2
 	ldr	r2, [fp, #-128]
 	cmp	r2, #15
-	bls	.L1741
-.L1740:
-	ldr	r3, .L1749
+	bls	.L1743
+.L1742:
+	ldr	r3, .L1751
 	mov	r2, #0
 	str	r2, [r3, #-4012]
-.L1720:
+.L1722:
 	ldr	r3, [fp, #-132]
 	mov	r1, r10
 	ldr	r2, [fp, #-112]
@@ -12256,19 +12330,19 @@ sftl_write:
 	bl	FtlWrite
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1721:
+.L1723:
 	ldr	r0, [ip, r3, lsl #2]
 	add	r3, r3, #1
 	cmp	r3, #4096
 	movhi	r3, #0
 	str	r0, [r2, #-4]!
 	cmp	r1, r2
-	bne	.L1724
-	b	.L1725
-.L1741:
+	bne	.L1726
+	b	.L1727
+.L1743:
 	str	r3, [fp, #-128]
-	b	.L1722
-.L1728:
+	b	.L1724
+.L1730:
 	mov	r1, r7
 	add	r0, r8, r6
 	bl	__udivsi3
@@ -12280,7 +12354,7 @@ sftl_write:
 	str	r3, [fp, #-104]
 	movw	r3, #61424
 	str	r3, [fp, #-100]
-	ldr	r3, .L1749+20
+	ldr	r3, .L1751+20
 	add	r2, r3, r6, lsl #9
 	str	r2, [fp, #-148]
 	bl	__udivsi3
@@ -12294,28 +12368,28 @@ sftl_write:
 	ldr	r3, [fp, #-136]
 	add	r6, r3, r6
 	uxth	r6, r6
-	b	.L1727
-.L1730:
+	b	.L1729
+.L1732:
 	add	r6, r8, r6
 	mov	r3, #0
 	uxth	r6, r6
-	b	.L1729
-.L1734:
+	b	.L1731
+.L1736:
 	add	r6, r6, #1
 	cmp	r6, #65536
-	bne	.L1731
+	bne	.L1733
 	ldr	r3, [fp, #-124]
 	add	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [fp, #-124]
-	bls	.L1735
-	b	.L1740
-.L1719:
+	bls	.L1737
+	b	.L1742
+.L1721:
 	cmp	r0, #63
-	ldr	r0, .L1749+20
+	ldr	r0, .L1751+20
 	ldrls	r3, [fp, #-112]
 	rsbls	r1, r10, #64
-	ldrhi	r3, .L1749+28
+	ldrhi	r3, .L1751+28
 	ldrhi	r2, [fp, #-112]
 	subls	r2, r3, r1
 	ldrls	r3, [fp, #-132]
@@ -12331,10 +12405,10 @@ sftl_write:
 	str	r3, [r4, #-4012]
 	lsl	r2, r2, #9
 	bl	memcpy
-	b	.L1720
-.L1750:
+	b	.L1722
+.L1752:
 	.align	2
-.L1749:
+.L1751:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	idb_buf+262144
@@ -12375,7 +12449,7 @@ FtlLoadSysInfo:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1773
+	ldr	r4, .L1775
 	mov	r1, #0
 	ldr	r3, [r4, #3284]
 	add	r6, r4, #2576
@@ -12389,37 +12463,37 @@ FtlLoadSysInfo:
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1753
-.L1761:
+	bne	.L1755
+.L1763:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1753:
-	ldr	r8, .L1773+4
+.L1755:
+	ldr	r8, .L1775+4
 	mov	r1, #1
 	add	r7, r4, #3264
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	add	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1755:
+.L1757:
 	cmp	r5, #0
-	bge	.L1758
+	bge	.L1760
 	movw	r2, #1482
-	ldr	r1, .L1773+8
-	ldr	r0, .L1773+12
+	ldr	r1, .L1775+8
+	ldr	r0, .L1775+12
 	bl	sftl_printk
-.L1757:
+.L1759:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	add	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1760
+	bcs	.L1762
 	movw	r2, #1484
-	ldr	r1, .L1773+8
-	ldr	r0, .L1773+12
+	ldr	r1, .L1775+8
+	ldr	r0, .L1775+12
 	bl	sftl_printk
-.L1760:
-	ldr	r5, .L1773+16
+.L1762:
+	ldr	r5, .L1775+16
 	mov	r2, #48
 	ldr	r1, [r4, #3272]
 	mov	r0, r5
@@ -12441,16 +12515,16 @@ FtlLoadSysInfo:
 	add	r1, r3, r1
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1773+4
+	ldr	r3, .L1775+4
 	cmp	r2, r3
-	bne	.L1761
+	bne	.L1763
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r7, [r5, #8]
 	cmp	r2, r3
 	strh	r7, [r6, #6]	@ movhi
-	bne	.L1761
-	ldr	r3, .L1773+20
+	bne	.L1763
+	ldr	r3, .L1775+20
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
 	str	r7, [r3, #-4008]
@@ -12467,15 +12541,15 @@ FtlLoadSysInfo:
 	cmp	r7, r6
 	movw	r3, #2572
 	strh	r0, [r4, r3]	@ movhi
-	bls	.L1762
+	bls	.L1764
 	movw	r2, #1506
-	ldr	r1, .L1773+8
-	ldr	r0, .L1773+12
+	ldr	r1, .L1775+8
+	ldr	r0, .L1775+12
 	bl	sftl_printk
-.L1762:
+.L1764:
 	ldrh	r0, [r5, #14]
 	movw	r3, #2348
-	ldr	r1, .L1773+24
+	ldr	r1, .L1775+24
 	mvn	ip, #0
 	strh	r0, [r4, r3]	@ movhi
 	ldrh	r3, [r5, #16]
@@ -12530,37 +12604,37 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1765
-	ldr	r0, .L1773+24
+	beq	.L1767
+	ldr	r0, .L1775+24
 	bl	make_superblock
-.L1765:
+.L1767:
 	movw	r3, #2396
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1766
-	ldr	r0, .L1773+28
+	beq	.L1768
+	ldr	r0, .L1775+28
 	bl	make_superblock
-.L1766:
+.L1768:
 	movw	r3, #2444
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1767
-	ldr	r0, .L1773+32
+	beq	.L1769
+	ldr	r0, .L1775+32
 	bl	make_superblock
-.L1767:
+.L1769:
 	movw	r3, #2588
 	ldrh	r2, [r4, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1768
-	ldr	r0, .L1773+36
+	beq	.L1770
+	ldr	r0, .L1775+36
 	bl	make_superblock
-.L1768:
+.L1770:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1758:
+.L1760:
 	ldrh	r3, [r6]
 	mov	r2, #1
 	mov	r1, r2
@@ -12572,23 +12646,23 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmn	r3, #1
-	beq	.L1756
+	beq	.L1758
 	ldr	r3, [r4, #3284]
 	ldr	r3, [r3]
 	cmp	r3, r8
-	bne	.L1756
+	bne	.L1758
 	ldr	r3, [r4, #3288]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1757
-.L1756:
+	beq	.L1759
+.L1758:
 	sub	r5, r5, #1
 	sxth	r5, r5
-	b	.L1755
-.L1774:
+	b	.L1757
+.L1776:
 	.align	2
-.L1773:
+.L1775:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
@@ -12612,7 +12686,7 @@ FtlSysBlkInit:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1799
+	ldr	r4, .L1801
 	mov	r3, #0
 	add	r6, r4, #4016
 	ldrh	r0, [r4, #36]
@@ -12623,16 +12697,16 @@ FtlSysBlkInit:
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1776
-.L1778:
+	bne	.L1778
+.L1780:
 	mvn	r8, #0
-.L1775:
+.L1777:
 	mov	r0, r8
 	ldmfd	sp, {r4, r5, r6, r7, r8, fp, sp, pc}
-.L1776:
+.L1778:
 	bl	FtlLoadSysInfo
 	subs	r8, r0, #0
-	bne	.L1778
+	bne	.L1780
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12646,22 +12720,22 @@ FtlSysBlkInit:
 	mov	r3, r8
 	ldr	r2, [r4, #2492]
 	mov	r0, #12
-.L1779:
+.L1781:
 	cmp	r3, r1
-	bge	.L1784
+	bge	.L1786
 	mla	ip, r0, r3, r2
 	ldr	ip, [ip, #4]
 	cmp	ip, #0
-	bge	.L1780
-.L1784:
-	ldr	r5, .L1799+4
+	bge	.L1782
+.L1786:
+	ldr	r5, .L1801+4
 	cmp	r3, r1
 	ldrh	r2, [r5, #28]
 	add	r7, r5, #80
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	bge	.L1798
-.L1781:
+	bge	.L1800
+.L1783:
 	movw	r3, #2348
 	ldr	r1, [r4, #2324]
 	ldrh	r3, [r4, r3]
@@ -12673,7 +12747,7 @@ FtlSysBlkInit:
 	movw	r2, #2396
 	ldrh	r2, [r4, r2]
 	ldrh	r3, [r4, #102]
-	ldr	r1, .L1799+8
+	ldr	r1, .L1801+8
 	ldr	ip, [r4, #2324]
 	lsl	r2, r2, #1
 	strh	r3, [r7, #2]	@ movhi
@@ -12685,12 +12759,12 @@ FtlSysBlkInit:
 	sub	r0, r0, lr
 	strh	r0, [ip, r2]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1799+12
+	ldr	r0, .L1801+12
 	strh	r3, [r1, #4]	@ movhi
 	strh	r2, [r1, #2]	@ movhi
 	strb	r3, [r4, #2402]
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1799+16
+	ldr	r0, .L1801+16
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r5, #30]
 	add	r3, r3, #1
@@ -12698,79 +12772,79 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1785
-.L1780:
+	b	.L1787
+.L1782:
 	add	r3, r3, #1
-	b	.L1779
-.L1798:
+	b	.L1781
+.L1800:
 	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1781
-.L1785:
+	bne	.L1783
+.L1787:
 	ldrh	r6, [r5, #44]
 	movw	r2, #65533
 	sub	r3, r6, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L1787
+	bhi	.L1789
 	movw	r3, #3202
 	mov	r1, r6
-	ldr	r0, .L1799+20
+	ldr	r0, .L1801+20
 	strh	r6, [r4, r3]	@ movhi
 	bl	test_node_in_list
 	cmp	r0, #0
-	bne	.L1788
+	bne	.L1790
 	ldrh	r3, [r4, #40]
 	cmp	r3, r6
-	bls	.L1788
+	bls	.L1790
 	ldr	r3, [r4, #2324]
 	lsl	r6, r6, #1
 	ldrh	r3, [r3, r6]
 	cmp	r3, #0
-	bne	.L1787
-.L1788:
+	bne	.L1789
+.L1790:
 	mvn	r2, #0
 	movw	r3, #3202
 	strh	r2, [r4, r3]	@ movhi
-.L1787:
+.L1789:
 	ldrh	r6, [r5, #46]
 	movw	r2, #65533
 	sub	r3, r6, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L1791
+	bhi	.L1793
 	movw	r3, #3204
 	mov	r1, r6
-	ldr	r0, .L1799+20
+	ldr	r0, .L1801+20
 	strh	r6, [r4, r3]	@ movhi
 	bl	test_node_in_list
 	cmp	r0, #0
-	bne	.L1792
+	bne	.L1794
 	ldrh	r3, [r4, #40]
 	cmp	r3, r6
-	bls	.L1792
+	bls	.L1794
 	ldr	r3, [r4, #2324]
 	lsl	r6, r6, #1
 	ldrh	r3, [r3, r6]
 	cmp	r3, #0
-	bne	.L1791
-.L1792:
+	bne	.L1793
+.L1794:
 	mvn	r2, #0
 	movw	r3, #3204
 	strh	r2, [r4, r3]	@ movhi
-.L1791:
+.L1793:
 	movw	r3, #2348
 	ldrh	r0, [r4, r3]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1794
+	beq	.L1796
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	bne	.L1794
-	ldr	r6, .L1799+8
+	bne	.L1796
+	ldr	r6, .L1801+8
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	bne	.L1794
+	bne	.L1796
 	bl	FtlGcRefreshBlock
 	movw	r3, #2396
 	ldrh	r0, [r4, r3]
@@ -12780,15 +12854,15 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	r0, r6
 	bl	allocate_new_data_superblock
-.L1794:
+.L1796:
 	ldrh	r3, [r5, #28]
 	tst	r3, #31
-	bne	.L1775
+	bne	.L1777
 	bl	FtlVpcCheckAndModify
-	b	.L1775
-.L1800:
+	b	.L1777
+.L1802:
 	.align	2
-.L1799:
+.L1801:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2268
 	.word	.LANCHOR0+2396
@@ -12808,7 +12882,7 @@ ftl_low_format:
 	mov	ip, sp
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1825
+	ldr	r4, .L1827
 	mov	r3, #0
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
@@ -12816,36 +12890,36 @@ ftl_low_format:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	beq	.L1802
+	beq	.L1804
 	bl	FtlMakeBbt
-.L1802:
-	ldr	r0, .L1825+4
+.L1804:
+	ldr	r0, .L1827+4
 	mov	r2, #0
-.L1803:
+.L1805:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	add	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1804
+	blt	.L1806
 	ldrh	r6, [r4, #40]
 	mov	r5, #0
-.L1805:
+.L1807:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1806
+	bhi	.L1808
 	ldrh	r1, [r4, #32]
 	sub	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1807
-.L1811:
+	bge	.L1809
+.L1813:
 	mov	r0, #0
 	mov	r6, r0
-.L1808:
+.L1810:
 	ldrh	r2, [r4, #40]
 	uxth	r3, r0
 	add	r5, r0, #1
 	cmp	r2, r3
-	bhi	.L1812
+	bhi	.L1814
 	ldrh	r3, [r4, #42]
 	movw	r9, #2572
 	ldrh	r5, [r4, #32]
@@ -12862,7 +12936,7 @@ ftl_low_format:
 	mov	r3, #24
 	mul	r3, r3, r5
 	cmp	r6, r3
-	ble	.L1813
+	ble	.L1815
 	mov	r1, r5
 	sub	r0, r10, r6
 	bl	__udivsi3
@@ -12870,10 +12944,10 @@ ftl_low_format:
 	lsr	r0, r0, #5
 	add	r0, r0, #24
 	strh	r0, [r4, r9]	@ movhi
-.L1813:
+.L1815:
 	ldrh	r3, [r4, #94]
 	cmp	r3, #0
-	beq	.L1815
+	beq	.L1817
 	movw	r2, #2572
 	ldrh	r1, [r4, r2]
 	add	r1, r1, r3, lsr #1
@@ -12884,9 +12958,9 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r7, r3
 	strhlt	r3, [r4, r2]	@ movhi
-.L1815:
+.L1817:
 	movw	r3, #2572
-	ldr	r6, .L1825+8
+	ldr	r6, .L1827+8
 	ldrh	r2, [r4, r3]
 	mvn	r7, #0
 	ldr	r3, [r4, #2504]
@@ -12903,7 +12977,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	mov	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r5, .L1825+12
+	ldr	r5, .L1827+12
 	lsl	r2, r2, #1
 	sub	r5, r5, #240
 	bl	ftl_memset
@@ -12926,29 +13000,29 @@ ftl_low_format:
 	ldr	r0, [r4, #24]
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1817:
+.L1819:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1818
+	bne	.L1820
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1817
-.L1804:
+	b	.L1819
+.L1806:
 	ldr	ip, [r4, #3820]
 	mvn	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [ip, r3, lsl #2]
 	ldr	r1, [r4, #3812]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1803
-.L1806:
+	b	.L1805
+.L1808:
 	mov	r0, r6
 	mov	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12956,8 +13030,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1805
-.L1807:
+	b	.L1807
+.L1809:
 	mov	r0, r5
 	bl	__udivsi3
 	ldr	r3, [r4, #132]
@@ -12967,25 +13041,25 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1809:
+.L1811:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1811
+	bls	.L1813
 	mov	r0, r5
 	mov	r1, #1
 	add	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1809
-.L1812:
+	b	.L1811
+.L1814:
 	mov	r1, #0
 	uxth	r0, r0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	mov	r0, r5
 	uxth	r6, r6
-	b	.L1808
-.L1818:
+	b	.L1810
+.L1820:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -12996,7 +13070,7 @@ ftl_low_format:
 	ldr	r2, [r4, #2324]
 	strh	r1, [r2, r3]	@ movhi
 	mov	r3, #0
-	ldr	r2, .L1825+16
+	ldr	r2, .L1827+16
 	movw	r1, #2396
 	strb	r3, [r4, #2402]
 	strh	r3, [r2, #2]	@ movhi
@@ -13007,21 +13081,21 @@ ftl_low_format:
 	strh	r3, [r4, r1]	@ movhi
 	mov	r3, #1
 	strb	r3, [r4, #2404]
-.L1819:
+.L1821:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	cmp	r3, #0
 	ldrh	r3, [r5]
-	bne	.L1820
+	bne	.L1822
 	ldr	r2, [r4, #2324]
 	lsl	r3, r3, #1
 	strh	r7, [r2, r3]	@ movhi
 	ldrh	r3, [r5]
 	add	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	b	.L1819
-.L1820:
+	b	.L1821
+.L1822:
 	ldr	r2, [r4, #2540]
 	lsl	r3, r3, #1
 	ldrh	r1, [r5, #4]
@@ -13034,7 +13108,7 @@ ftl_low_format:
 	movw	r3, #2444
 	strh	r5, [r4, r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1825+20
+	ldr	r3, .L1827+20
 	mov	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6, #-4008]
@@ -13049,13 +13123,13 @@ ftl_low_format:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
 	mov	r0, #0
-	ldreq	r3, .L1825+24
+	ldreq	r3, .L1827+24
 	moveq	r2, #1
 	streq	r2, [r3]
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1826:
+.L1828:
 	.align	2
-.L1825:
+.L1827:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -13076,11 +13150,11 @@ sftl_init:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r4, .L1833
+	ldr	r4, .L1835
 	mvn	r3, #0
-	ldr	r5, .L1833+4
-	ldr	r1, .L1833+8
-	ldr	r0, .L1833+12
+	ldr	r5, .L1835+4
+	ldr	r1, .L1835+8
+	ldr	r0, .L1835+12
 	str	r3, [r5]
 	bl	sftl_printk
 	mov	r0, r4
@@ -13091,29 +13165,29 @@ sftl_init:
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
 	cmp	r0, #0
-	bne	.L1831
+	bne	.L1833
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1831
+	bne	.L1833
 	mov	r3, #1
 	str	r3, [r5]
 	movw	r3, #2344
 	ldrh	r3, [r4, r3]
 	cmp	r3, #15
-	bhi	.L1831
+	bhi	.L1833
 	movw	r4, #8129
-.L1830:
+.L1832:
 	mov	r1, #1
 	mov	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1830
-.L1831:
+	bne	.L1832
+.L1833:
 	mov	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1834:
+.L1836:
 	.align	2
-.L1833:
+.L1835:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -13146,7 +13220,7 @@ rk_sftl_vendor_dev_ops_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r2, .L1839
+	ldr	r2, .L1841
 	ldr	r3, [r2, #-4004]
 	cmp	r3, #0
 	streq	r0, [r2, #-4004]
@@ -13154,9 +13228,9 @@ rk_sftl_vendor_dev_ops_register:
 	streq	r1, [r2, #-4000]
 	mvnne	r0, #0
 	ldmfd	sp, {fp, sp, pc}
-.L1840:
+.L1842:
 	.align	2
-.L1839:
+.L1841:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
 	.align	2
@@ -13172,28 +13246,28 @@ rk_sftl_vendor_storage_init:
 	push	{r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	mov	r0, #65536
-	ldr	r4, .L1850
+	ldr	r4, .L1852
 	bl	ftl_malloc
 	cmp	r0, #0
 	str	r0, [r4, #-3996]
 	mvneq	r9, #11
-	beq	.L1841
-	ldr	r8, .L1850+4
+	beq	.L1843
+	ldr	r8, .L1852+4
 	mov	r6, #0
 	mov	r5, r6
 	mov	r7, r6
-.L1845:
+.L1847:
 	ldr	r3, [r4, #-4004]
 	mov	r1, #128
 	ldr	r2, [r4, #-3996]
 	lsl	r0, r7, #7
 	blx	r3
 	subs	r9, r0, #0
-	bne	.L1843
+	bne	.L1845
 	ldr	r2, [r4, #-3996]
 	ldr	r3, [r2]
 	cmp	r3, r8
-	bne	.L1844
+	bne	.L1846
 	add	r1, r2, #61440
 	ldr	r3, [r2, #4]
 	ldr	r1, [r1, #4092]
@@ -13205,26 +13279,26 @@ rk_sftl_vendor_storage_init:
 	cmp	r1, #0
 	movne	r6, r7
 	movne	r5, r3
-.L1844:
+.L1846:
 	add	r7, r7, #1
 	cmp	r7, #2
-	bne	.L1845
+	bne	.L1847
 	cmp	r5, #0
-	beq	.L1846
+	beq	.L1848
 	ldr	r3, [r4, #-4004]
 	mov	r1, #128
 	lsl	r0, r6, #7
 	blx	r3
 	subs	r9, r0, #0
-	beq	.L1841
-.L1843:
+	beq	.L1843
+.L1845:
 	ldr	r0, [r4, #-3996]
 	mvn	r9, #0
 	bl	kfree
 	mov	r3, #0
 	str	r3, [r4, #-3996]
-	b	.L1841
-.L1846:
+	b	.L1843
+.L1848:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
@@ -13234,15 +13308,15 @@ rk_sftl_vendor_storage_init:
 	str	r2, [r3, #4]
 	str	r8, [r3]
 	str	r2, [r1, #4092]
-	ldr	r2, .L1850+8
+	ldr	r2, .L1852+8
 	strh	r5, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1841:
+.L1843:
 	mov	r0, r9
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, fp, sp, pc}
-.L1851:
+.L1853:
 	.align	2
-.L1850:
+.L1852:
 	.word	.LANCHOR3
 	.word	1380668996
 	.word	-1032
@@ -13259,26 +13333,26 @@ rk_sftl_vendor_read:
 	mov	ip, sp
 	push	{r4, r5, fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r3, .L1858
+	ldr	r3, .L1860
 	mov	r4, r0
 	mov	r0, r1
 	ldr	ip, [r3, #-3996]
 	cmp	ip, #0
 	ldrhne	lr, [ip, #10]
 	movne	r3, #0
-	bne	.L1854
-.L1857:
+	bne	.L1856
+.L1859:
 	mvn	r0, #0
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1855:
+.L1857:
 	add	r3, r3, #1
-.L1854:
+.L1856:
 	cmp	r3, lr
-	bcs	.L1857
+	bcs	.L1859
 	add	r1, ip, r3, lsl #3
 	ldrh	r5, [r1, #16]
 	cmp	r5, r4
-	bne	.L1855
+	bne	.L1857
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -13289,9 +13363,9 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	ldmfd	sp, {r4, r5, fp, sp, pc}
-.L1859:
+.L1861:
 	.align	2
-.L1858:
+.L1860:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
@@ -13308,23 +13382,23 @@ rk_sftl_vendor_write:
 	sub	fp, ip, #4
 	sub	sp, sp, #24
 	mov	ip, r1
-	ldr	r8, .L1879
+	ldr	r8, .L1881
 	mov	r9, r2
 	ldr	r4, [r8, #-3996]
 	cmp	r4, #0
-	beq	.L1875
+	beq	.L1877
 	ldrh	r2, [r4, #10]
 	add	r7, r9, #63
 	ldrh	r3, [r4, #8]
 	bic	r7, r7, #63
 	mov	r5, #0
 	str	r3, [fp, #-44]
-.L1862:
+.L1864:
 	cmp	r5, r2
-	bcc	.L1870
+	bcc	.L1872
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1875
+	bhi	.L1877
 	add	r3, r4, r2, lsl #3
 	uxth	r7, r7
 	strh	r0, [r3, #16]	@ movhi
@@ -13356,31 +13430,31 @@ rk_sftl_vendor_write:
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
 	ldr	r3, [r8, #-4000]
-	b	.L1878
-.L1870:
+	b	.L1880
+.L1872:
 	add	r6, r4, r5, lsl #3
 	ldrh	r3, [r6, #16]
 	cmp	r3, r0
 	str	r3, [fp, #-48]
-	bne	.L1863
+	bne	.L1865
 	ldrh	r1, [r6, #20]
 	add	r3, r4, #1024
 	add	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r9, r1
 	str	r1, [fp, #-52]
-	bls	.L1864
+	bls	.L1866
 	ldrh	r1, [r4, #14]
 	cmp	r7, r1
-	bhi	.L1875
+	bhi	.L1877
 	ldrh	r8, [r6, #18]
 	sub	r2, r2, #1
 	str	r2, [fp, #-56]
-.L1865:
+.L1867:
 	ldr	r2, [fp, #-56]
 	add	r6, r6, #8
 	cmp	r5, r2
-	bcc	.L1866
+	bcc	.L1868
 	ldrh	r2, [fp, #-48]
 	add	r5, r4, r5, lsl #3
 	uxth	r8, r8
@@ -13399,7 +13473,7 @@ rk_sftl_vendor_write:
 	strh	r8, [r4, #12]	@ movhi
 	add	r7, r7, r3
 	strh	r7, [r4, #14]	@ movhi
-.L1867:
+.L1869:
 	ldr	r3, [r4, #4]
 	add	r2, r4, #61440
 	add	r3, r3, #1
@@ -13411,19 +13485,19 @@ rk_sftl_vendor_write:
 	cmp	r3, #1
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1879
+	ldr	r3, .L1881
 	ldr	r3, [r3, #-4000]
-.L1878:
+.L1880:
 	ldr	r0, [fp, #-44]
 	mov	r2, r4
 	mov	r1, #128
 	lsl	r0, r0, #7
 	blx	r3
 	mov	r0, #0
-.L1860:
+.L1862:
 	sub	sp, fp, #40
 	ldmfd	sp, {r4, r5, r6, r7, r8, r9, r10, fp, sp, pc}
-.L1866:
+.L1868:
 	ldrh	r10, [r6, #20]
 	add	r0, r3, r8
 	ldrh	r2, [r6, #16]
@@ -13442,8 +13516,8 @@ rk_sftl_vendor_write:
 	bl	memcpy
 	ldr	ip, [fp, #-64]
 	ldr	r3, [fp, #-60]
-	b	.L1865
-.L1864:
+	b	.L1867
+.L1866:
 	add	r5, r4, r5, lsl #3
 	mov	r2, r9
 	mov	r1, ip
@@ -13451,16 +13525,16 @@ rk_sftl_vendor_write:
 	add	r0, r3, r0
 	bl	memcpy
 	strh	r9, [r6, #20]	@ movhi
-	b	.L1867
-.L1863:
+	b	.L1869
+.L1865:
 	add	r5, r5, #1
-	b	.L1862
-.L1875:
+	b	.L1864
+.L1877:
 	mvn	r0, #0
-	b	.L1860
-.L1880:
+	b	.L1862
+.L1882:
 	.align	2
-.L1879:
+.L1881:
 	.word	.LANCHOR3
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
@@ -13473,7 +13547,7 @@ rk_sftl_vendor_storage_ioctl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 1, uses_anonymous_args = 0
 	mov	ip, sp
-	push	{r4, r5, r6, r7, fp, ip, lr, pc}
+	push	{r4, r5, r6, fp, ip, lr, pc}
 	sub	fp, ip, #4
 	mov	r0, #4096
 	mov	r5, r2
@@ -13481,79 +13555,53 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	subs	r4, r0, #0
 	mvneq	r5, #0
-	beq	.L1881
-	ldr	r3, .L1907
+	beq	.L1883
+	ldr	r3, .L1908
 	cmp	r6, r3
-	beq	.L1884
+	beq	.L1886
 	add	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1885
-.L1906:
+	beq	.L1887
+.L1903:
 	mvn	r5, #13
-	b	.L1883
-.L1884:
-	ldr	r6, .L1907+4
+	b	.L1885
+.L1886:
+	ldr	r6, .L1908+4
 	mov	r3, sp
-	and	r2, r3, r6
-	ldr	r3, [r2, #72]
+	and	r3, r3, r6
+	ldr	r3, [r3, #72]
 	.syntax divided
 @ 552 "./arch/arm/include/asm/uaccess.h" 1
-	adds r1, r5, #8; sbcccs r1, r1, r3; movcc r3, #0
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
 @ 0 "" 2
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1891
-	.syntax divided
-@ 91 "./arch/arm/include/asm/domain.h" 1
-	mrc	p15, 0, r7, c3, c0	@ get domain
-@ 0 "" 2
-	.arm
-	.syntax unified
-	bic	r3, r7, #12
-	orr	r3, r3, #4
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r3, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
+	bne	.L1893
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r7, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
 	cmp	r0, #0
-	bne	.L1906
+	bne	.L1903
 	ldr	r2, [r4]
-	ldr	r3, .L1907+8
+	ldr	r3, .L1908+8
 	cmp	r2, r3
-	beq	.L1889
-.L1890:
+	beq	.L1891
+.L1892:
 	mvn	r5, #0
-.L1883:
+.L1885:
 	mov	r0, r4
 	bl	kfree
-.L1881:
+.L1883:
 	mov	r0, r5
-	ldmfd	sp, {r4, r5, r6, r7, fp, sp, pc}
-.L1889:
+	ldmfd	sp, {r4, r5, r6, fp, sp, pc}
+.L1891:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	cmn	r0, #1
-	beq	.L1890
+	beq	.L1892
 	mov	r3, sp
 	uxth	r2, r0
 	and	r6, r6, r3
@@ -13567,93 +13615,39 @@ rk_sftl_vendor_storage_ioctl:
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1906
-	.syntax divided
-@ 91 "./arch/arm/include/asm/domain.h" 1
-	mrc	p15, 0, r6, c3, c0	@ get domain
-@ 0 "" 2
-	.arm
-	.syntax unified
-	bic	r3, r6, #12
-	orr	r3, r3, #4
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r3, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
-	mov	r1, r4
+	bne	.L1903
 	mov	r0, r5
+	mov	r1, r4
 	bl	arm_copy_to_user
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r6, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
-	cmp	r0, #0
-	bne	.L1906
-.L1897:
-	mov	r5, r0
-	b	.L1883
-.L1885:
-	ldr	r6, .L1907+4
+	subs	r5, r0, #0
+	beq	.L1885
+	b	.L1903
+.L1887:
+	ldr	r6, .L1908+4
 	mov	r3, sp
-	and	r2, r3, r6
-	ldr	r3, [r2, #72]
+	and	r3, r3, r6
+	ldr	r3, [r3, #72]
 	.syntax divided
 @ 552 "./arch/arm/include/asm/uaccess.h" 1
-	adds r1, r5, #8; sbcccs r1, r1, r3; movcc r3, #0
+	adds r2, r5, #8; sbcccs r2, r2, r3; movcc r3, #0
 @ 0 "" 2
 	.arm
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1891
-	.syntax divided
-@ 91 "./arch/arm/include/asm/domain.h" 1
-	mrc	p15, 0, r7, c3, c0	@ get domain
-@ 0 "" 2
-	.arm
-	.syntax unified
-	bic	r3, r7, #12
-	orr	r3, r3, #4
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r3, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
+	bne	.L1893
 	mov	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r7, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
 	cmp	r0, #0
-	bne	.L1906
+	bne	.L1903
 	ldr	r2, [r4]
-	ldr	r3, .L1907+8
+	ldr	r3, .L1908+8
 	cmp	r2, r3
-	bne	.L1890
+	bne	.L1892
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1890
+	bhi	.L1892
 	mov	r3, sp
 	add	r2, r2, #8
 	and	r6, r6, r3
@@ -13667,51 +13661,26 @@ rk_sftl_vendor_storage_ioctl:
 	cmp	r3, #0
 	movne	r1, r2
 	movne	r0, r4
-	bne	.L1905
-	.syntax divided
-@ 91 "./arch/arm/include/asm/domain.h" 1
-	mrc	p15, 0, r6, c3, c0	@ get domain
-@ 0 "" 2
-	.arm
-	.syntax unified
-	bic	r3, r6, #12
-	orr	r3, r3, #4
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r3, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
+	bne	.L1907
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
-	.syntax divided
-@ 101 "./arch/arm/include/asm/domain.h" 1
-	mcr	p15, 0, r6, c3, c0	@ set domain
-@ 0 "" 2
-@ 104 "./arch/arm/include/asm/domain.h" 1
-	isb 
-@ 0 "" 2
-	.arm
-	.syntax unified
 	cmp	r0, #0
-	bne	.L1906
+	bne	.L1903
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
-	b	.L1897
-.L1891:
+	mov	r5, r0
+	b	.L1885
+.L1893:
 	mov	r1, #8
-.L1905:
+.L1907:
 	bl	__memzero
-	b	.L1906
-.L1908:
+	b	.L1903
+.L1909:
 	.align	2
-.L1907:
+.L1908:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13728,12 +13697,12 @@ rk_sftl_vendor_register:
 	mov	ip, sp
 	push	{fp, ip, lr, pc}
 	sub	fp, ip, #4
-	ldr	r0, .L1910
+	ldr	r0, .L1911
 	bl	misc_register
 	ldmfd	sp, {fp, sp, pc}
-.L1911:
+.L1912:
 	.align	2
-.L1910:
+.L1911:
 	.word	.LANCHOR2+12
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
 	.global	ftl_temp_buf
@@ -13888,141 +13857,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3953, %object
-	.size	__func__.3953, 17
-__func__.3953:
+	.type	__func__.4010, %object
+	.size	__func__.4010, 17
+__func__.4010:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.3948, %object
-	.size	__func__.3948, 17
-__func__.3948:
+	.type	__func__.4005, %object
+	.size	__func__.4005, 17
+__func__.4005:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.3991, %object
-	.size	__func__.3991, 17
-__func__.3991:
+	.type	__func__.4048, %object
+	.size	__func__.4048, 17
+__func__.4048:
 	.ascii	"List_remove_node\000"
-	.type	__func__.4023, %object
-	.size	__func__.4023, 22
-__func__.4023:
+	.type	__func__.4080, %object
+	.size	__func__.4080, 22
+__func__.4080:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.4134, %object
-	.size	__func__.4134, 22
-__func__.4134:
+	.type	__func__.4191, %object
+	.size	__func__.4191, 22
+__func__.4191:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.4457, %object
-	.size	__func__.4457, 16
-__func__.4457:
+	.type	__func__.4514, %object
+	.size	__func__.4514, 16
+__func__.4514:
 	.ascii	"make_superblock\000"
-	.type	__func__.4632, %object
-	.size	__func__.4632, 19
-__func__.4632:
+	.type	__func__.4689, %object
+	.size	__func__.4689, 19
+__func__.4689:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.14402, %object
-	.size	__func__.14402, 15
-__func__.14402:
+	.type	__func__.15027, %object
+	.size	__func__.15027, 15
+__func__.15027:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.14419, %object
-	.size	__func__.14419, 15
-__func__.14419:
+	.type	__func__.15044, %object
+	.size	__func__.15044, 15
+__func__.15044:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.4065, %object
-	.size	__func__.4065, 26
-__func__.4065:
+	.type	__func__.4122, %object
+	.size	__func__.4122, 26
+__func__.4122:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.3484, %object
-	.size	__func__.3484, 11
-__func__.3484:
+	.type	__func__.3541, %object
+	.size	__func__.3541, 11
+__func__.3541:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.3788, %object
-	.size	__func__.3788, 14
-__func__.3788:
+	.type	__func__.3845, %object
+	.size	__func__.3845, 14
+__func__.3845:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.4095, %object
-	.size	__func__.4095, 31
-__func__.4095:
+	.type	__func__.4152, %object
+	.size	__func__.4152, 31
+__func__.4152:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.4109, %object
-	.size	__func__.4109, 16
-__func__.4109:
+	.type	__func__.4166, %object
+	.size	__func__.4166, 16
+__func__.4166:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.4032, %object
-	.size	__func__.4032, 16
-__func__.4032:
+	.type	__func__.4089, %object
+	.size	__func__.4089, 16
+__func__.4089:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.4080, %object
-	.size	__func__.4080, 15
-__func__.4080:
+	.type	__func__.4137, %object
+	.size	__func__.4137, 15
+__func__.4137:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.4151, %object
-	.size	__func__.4151, 9
-__func__.4151:
+	.type	__func__.4208, %object
+	.size	__func__.4208, 9
+__func__.4208:
 	.ascii	"log2phys\000"
-	.type	__func__.4366, %object
-	.size	__func__.4366, 16
-__func__.4366:
+	.type	__func__.4423, %object
+	.size	__func__.4423, 16
+__func__.4423:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.4519, %object
-	.size	__func__.4519, 14
-__func__.4519:
+	.type	__func__.4576, %object
+	.size	__func__.4576, 14
+__func__.4576:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.4246, %object
-	.size	__func__.4246, 14
-__func__.4246:
+	.type	__func__.4303, %object
+	.size	__func__.4303, 14
+__func__.4303:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.4478, %object
-	.size	__func__.4478, 18
-__func__.4478:
+	.type	__func__.4535, %object
+	.size	__func__.4535, 18
+__func__.4535:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.4604, %object
-	.size	__func__.4604, 25
-__func__.4604:
+	.type	__func__.4661, %object
+	.size	__func__.4661, 25
+__func__.4661:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.4645, %object
-	.size	__func__.4645, 16
-__func__.4645:
+	.type	__func__.4702, %object
+	.size	__func__.4702, 16
+__func__.4702:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.4652, %object
-	.size	__func__.4652, 20
-__func__.4652:
+	.type	__func__.4709, %object
+	.size	__func__.4709, 20
+__func__.4709:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.4400, %object
-	.size	__func__.4400, 22
-__func__.4400:
+	.type	__func__.4457, %object
+	.size	__func__.4457, 22
+__func__.4457:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.3831, %object
-	.size	__func__.3831, 11
-__func__.3831:
+	.type	__func__.3888, %object
+	.size	__func__.3888, 11
+__func__.3888:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.4224, %object
-	.size	__func__.4224, 15
-__func__.4224:
+	.type	__func__.4281, %object
+	.size	__func__.4281, 15
+__func__.4281:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.4503, %object
-	.size	__func__.4503, 21
-__func__.4503:
+	.type	__func__.4560, %object
+	.size	__func__.4560, 21
+__func__.4560:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.4625, %object
-	.size	__func__.4625, 29
-__func__.4625:
+	.type	__func__.4682, %object
+	.size	__func__.4682, 29
+__func__.4682:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.3608, %object
-	.size	__func__.3608, 13
-__func__.3608:
+	.type	__func__.3665, %object
+	.size	__func__.3665, 13
+__func__.3665:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.4723, %object
-	.size	__func__.4723, 19
-__func__.4723:
+	.type	__func__.4780, %object
+	.size	__func__.4780, 19
+__func__.4780:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.4829, %object
-	.size	__func__.4829, 23
-__func__.4829:
+	.type	__func__.4886, %object
+	.size	__func__.4886, 23
+__func__.4886:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.3636, %object
-	.size	__func__.3636, 9
-__func__.3636:
+	.type	__func__.3693, %object
+	.size	__func__.3693, 9
+__func__.3693:
 	.ascii	"FtlWrite\000"
-	.type	__func__.4303, %object
-	.size	__func__.4303, 15
-__func__.4303:
+	.type	__func__.4360, %object
+	.size	__func__.4360, 15
+__func__.4360:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
diff --git a/drivers/rkflash/rk_sftl_arm_v7_thumb.S b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
index f11da2ac7145f..568c8c2a3d484 100644
--- a/drivers/rkflash/rk_sftl_arm_v7_thumb.S
+++ b/drivers/rkflash/rk_sftl_arm_v7_thumb.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-14
+ * date: 2018-08-17
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -1989,322 +1989,342 @@ FtlPrintInfo2buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
-	mov	r7, r0
-	ldr	r6, .L265
-	add	r5, r7, #12
+	mov	r6, r0
+	ldr	r5, .L265
+	add	r4, r6, #12
 	.pad #20
 	sub	sp, sp, #20
 	ldr	r1, .L265+4
 	bl	strcpy
-	ldr	r2, [r6, #116]
-	mov	r0, r5
-	ldr	r1, .L265+8
-	bl	sprintf
-	add	r5, r5, r0
+	ldr	r3, [r5, #116]
+	movs	r1, #64
+	ldr	r2, .L265+8
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
 	ldr	r1, .L265+12
-	mov	r0, r5
-	adds	r5, r5, #10
+	mov	r0, r4
+	adds	r4, r4, #10
 	bl	strcpy
-	ldr	r2, [r6, #2504]
-	mov	r0, r5
-	ldr	r1, .L265+16
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2500]
-	ldr	r1, .L265+20
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2508]
-	ldr	r1, .L265+24
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2512]
-	ldr	r1, .L265+28
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2516]
-	ldr	r1, .L265+32
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2520]
-	ldr	r1, .L265+36
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2524]
-	ldr	r1, .L265+40
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2528]
-	ldr	r1, .L265+44
-	mov	r0, r5
-	bl	sprintf
-	ldr	r2, [r6, #2532]
-	add	r5, r5, r0
-	ldr	r1, .L265+48
-	mov	r0, r5
-	lsrs	r2, r2, #11
-	bl	sprintf
-	ldr	r2, [r6, #2536]
-	add	r5, r5, r0
-	ldr	r1, .L265+52
-	mov	r0, r5
-	lsrs	r2, r2, #11
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2540]
-	ldr	r1, .L265+56
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2544]
-	ldr	r1, .L265+60
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #158]
-	ldr	r1, .L265+64
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2344]
-	ldr	r1, .L265+68
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2548]
-	ldr	r1, .L265+72
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2552]
-	ldr	r1, .L265+76
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2556]
-	ldr	r1, .L265+80
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2560]
-	ldr	r1, .L265+84
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2564]
-	ldr	r1, .L265+88
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #2568]
-	ldr	r1, .L265+92
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2298]
-	ldr	r1, .L265+96
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2296]
-	ldr	r1, .L265+100
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #140]
-	ldr	r1, .L265+104
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #132]
-	ldr	r1, .L265+108
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #28]
-	ldr	r1, .L265+112
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #218]
-	ldr	r1, .L265+116
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #40]
-	ldr	r1, .L265+120
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2572]
-	ldr	r1, .L265+124
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldr	r2, [r6, #44]
-	ldr	r1, .L265+128
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2576]
-	ldr	r1, .L265+132
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #152]
-	ldr	r1, .L265+136
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2350]
-	ldr	r1, .L265+140
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2354]	@ zero_extendqisi2
-	ldr	r1, .L265+144
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2348]
-	ldr	r1, .L265+148
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2356]	@ zero_extendqisi2
-	ldr	r1, .L265+152
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2352]
-	ldr	r1, .L265+156
-	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6, #2324]
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2348]
-	mov	r0, r5
-	ldr	r1, .L265+160
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2398]
-	ldr	r1, .L265+164
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2402]	@ zero_extendqisi2
-	ldr	r1, .L265+168
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2396]
-	ldr	r1, .L265+172
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2404]	@ zero_extendqisi2
-	ldr	r1, .L265+176
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2400]
-	ldr	r1, .L265+180
-	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6, #2324]
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2396]
-	mov	r0, r5
-	ldr	r1, .L265+184
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2446]
-	ldr	r1, .L265+188
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2450]	@ zero_extendqisi2
-	ldr	r1, .L265+192
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2444]
-	ldr	r1, .L265+196
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2452]	@ zero_extendqisi2
-	ldr	r1, .L265+200
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2448]
-	ldr	r1, .L265+204
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2590]
-	ldr	r1, .L265+208
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2594]	@ zero_extendqisi2
-	ldr	r1, .L265+212
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2588]
-	ldr	r1, .L265+216
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r6, #2596]	@ zero_extendqisi2
-	ldr	r1, .L265+220
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r6, #2592]
-	ldr	r1, .L265+224
-	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6, #2712]
-	add	r5, r5, r0
-	ldr	r2, [r6, #2716]
-	mov	r0, r5
-	ldr	r1, .L265+228
-	str	r3, [sp]
-	ldr	r3, [r6, #2720]
-	bl	sprintf
-	adds	r4, r5, r0
-	ldr	r2, [r6, #2708]
-	ldr	r1, .L265+232
+	ldr	r3, [r5, #2504]
+	movs	r1, #64
+	ldr	r2, .L265+16
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2500]
+	ldr	r2, .L265+20
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2508]
+	ldr	r2, .L265+24
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2512]
+	ldr	r2, .L265+28
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2516]
+	ldr	r2, .L265+32
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2520]
+	ldr	r2, .L265+36
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2524]
+	ldr	r2, .L265+40
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2528]
+	ldr	r2, .L265+44
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldr	r3, [r5, #2532]
+	add	r4, r4, r0
+	ldr	r2, .L265+48
+	movs	r1, #64
+	mov	r0, r4
+	lsrs	r3, r3, #11
+	bl	snprintf
+	ldr	r3, [r5, #2536]
+	add	r4, r4, r0
+	ldr	r2, .L265+52
+	movs	r1, #64
+	mov	r0, r4
+	lsrs	r3, r3, #11
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2540]
+	ldr	r2, .L265+56
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2544]
+	ldr	r2, .L265+60
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #158]
+	ldr	r2, .L265+64
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2344]
+	ldr	r2, .L265+68
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2548]
+	ldr	r2, .L265+72
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2552]
+	ldr	r2, .L265+76
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2556]
+	ldr	r2, .L265+80
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2560]
+	ldr	r2, .L265+84
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2564]
+	ldr	r2, .L265+88
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2568]
+	ldr	r2, .L265+92
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2298]
+	ldr	r2, .L265+96
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2296]
+	ldr	r2, .L265+100
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #140]
+	ldr	r2, .L265+104
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #132]
+	ldr	r2, .L265+108
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #28]
+	ldr	r2, .L265+112
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #218]
+	ldr	r2, .L265+116
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #40]
+	ldr	r2, .L265+120
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2572]
+	ldr	r2, .L265+124
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #44]
+	ldr	r2, .L265+128
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2576]
+	ldr	r2, .L265+132
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #152]
+	ldr	r2, .L265+136
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2350]
+	ldr	r2, .L265+140
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldr	r2, [r6, #2732]
-	ldr	r1, .L265+236
+	ldrb	r3, [r5, #2354]	@ zero_extendqisi2
+	ldr	r2, .L265+144
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldrh	r2, [r6, #3148]
-	ldr	r1, .L265+240
+	ldrh	r3, [r5, #2348]
+	ldr	r2, .L265+148
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldrh	r2, [r6, #3150]
-	ldr	r1, .L265+244
+	ldrb	r3, [r5, #2356]	@ zero_extendqisi2
+	ldr	r2, .L265+152
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldr	r2, [r6, #3152]
+	ldrh	r3, [r5, #2352]
+	ldr	r2, .L265+156
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldrh	r2, [r5, #2348]
+	add	r4, r4, r0
+	ldr	r3, [r5, #2324]
+	movs	r1, #64
+	mov	r0, r4
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L265+160
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2398]
+	ldr	r2, .L265+164
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2402]	@ zero_extendqisi2
+	ldr	r2, .L265+168
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2396]
+	ldr	r2, .L265+172
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2404]	@ zero_extendqisi2
+	ldr	r2, .L265+176
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2400]
+	ldr	r2, .L265+180
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	ldrh	r2, [r5, #2396]
+	add	r4, r4, r0
+	ldr	r3, [r5, #2324]
+	movs	r1, #64
+	mov	r0, r4
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L265+184
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2446]
+	ldr	r2, .L265+188
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2450]	@ zero_extendqisi2
+	ldr	r2, .L265+192
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2444]
+	ldr	r2, .L265+196
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2452]	@ zero_extendqisi2
+	ldr	r2, .L265+200
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2448]
+	ldr	r2, .L265+204
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2590]
+	ldr	r2, .L265+208
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2594]	@ zero_extendqisi2
+	ldr	r2, .L265+212
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2588]
+	ldr	r2, .L265+216
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrb	r3, [r5, #2596]	@ zero_extendqisi2
+	ldr	r2, .L265+220
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #2592]
 	b	.L266
 .L267:
 	.align	2
@@ -2365,124 +2385,172 @@ FtlPrintInfo2buf:
 	.word	.LC54
 	.word	.LC55
 	.word	.LC56
-	.word	.LC57
-	.word	.LC58
-	.word	.LC59
-	.word	.LC60
-	.word	.LC61
-	.word	.LC62
 .L266:
-	ldr	r1, .L268
+	ldr	r2, .L268
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
+	ldr	r3, [r5, #2712]
 	add	r4, r4, r0
-	ldrh	r2, [r6, #3156]
-	ldr	r1, .L268+4
+	ldr	r2, .L268+4
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	str	r3, [sp, #4]
+	ldr	r3, [r5, #2720]
+	str	r3, [sp]
+	ldr	r3, [r5, #2716]
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2708]
+	ldr	r2, .L268+8
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #2732]
+	ldr	r2, .L268+12
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #3148]
+	ldr	r2, .L268+16
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #3150]
+	ldr	r2, .L268+20
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldr	r3, [r5, #3152]
+	ldr	r2, .L268+24
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
+	add	r4, r4, r0
+	ldrh	r3, [r5, #3156]
+	ldr	r2, .L268+28
+	movs	r1, #64
+	mov	r0, r4
+	bl	snprintf
 	add	r4, r4, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L268+8
-	mov	r2, r0
+	ldr	r2, .L268+32
+	mov	r3, r0
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
+	bl	snprintf
 	add	r4, r4, r0
-	ldrh	r0, [r6, #2344]
+	ldrh	r0, [r5, #2344]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L268+12
-	mov	r2, r0
+	ldr	r2, .L268+36
+	mov	r3, r0
+	movs	r1, #64
 	mov	r0, r4
-	bl	sprintf
-	ldr	r3, .L268+16
+	bl	snprintf
+	ldr	r3, .L268+40
 	add	r4, r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L254
 .L259:
-	subs	r0, r4, r7
+	subs	r0, r4, r6
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 .L254:
-	ldrh	r3, [r6, #2588]
+	ldrh	r3, [r5, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L256
-	ldr	r2, [r6, #2324]
+	ldr	r2, [r5, #2324]
 	mov	r0, r4
-	ldr	r1, .L268+20
-	ldrh	r2, [r2, r3, lsl #1]
-	bl	sprintf
+	movs	r1, #64
+	ldrh	r3, [r2, r3, lsl #1]
+	ldr	r2, .L268+44
+	bl	snprintf
 	add	r4, r4, r0
 .L256:
 	movs	r0, #0
-	ldr	r9, .L268+28
+	ldr	r9, .L268+52
 	bl	List_get_gc_head_node
-	uxth	r3, r0
-	movs	r5, #0
+	uxth	r0, r0
+	movs	r7, #0
 	movw	fp, #65535
 	mov	r10, #6
 .L258:
-	cmp	r3, fp
+	cmp	r0, fp
 	beq	.L257
-	ldr	r2, [r6, #2328]
-	mul	r8, r10, r3
+	ldr	r3, [r5, #2328]
+	mul	r8, r10, r0
+	mov	r2, r9
+	movs	r1, #64
+	ldrh	r3, [r3, r0, lsl #1]
+	str	r3, [sp, #12]
+	ldr	r3, [r5, #2316]
+	add	r3, r3, r8
+	ldrh	r3, [r3, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #2324]
+	ldrh	r3, [r3, r0, lsl #1]
+	stm	sp, {r0, r3}
+	mov	r3, r7
 	mov	r0, r4
-	mov	r1, r9
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #8]
-	ldr	r2, [r6, #2316]
-	add	r2, r2, r8
-	ldrh	r2, [r2, #4]
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2324]
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp]
-	mov	r2, r5
-	bl	sprintf
-	adds	r5, r5, #1
-	ldr	r3, [r6, #2316]
-	cmp	r5, #16
+	adds	r7, r7, #1
+	bl	snprintf
+	ldr	r3, [r5, #2316]
+	cmp	r7, #16
 	add	r4, r4, r0
-	ldrh	r3, [r3, r8]
+	ldrh	r0, [r3, r8]
 	bne	.L258
 .L257:
-	ldr	r2, [r6, #2316]
-	movs	r5, #0
-	ldr	r3, [r6, #2340]
+	ldr	r2, [r5, #2316]
+	movs	r7, #0
+	ldr	r3, [r5, #2340]
 	movw	r9, #65535
-	ldr	fp, .L268+32
+	ldr	fp, .L268+56
 	mov	r10, #6
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L268+24
+	ldr	r3, .L268+48
 	muls	r3, r2, r3
 	uxth	r3, r3
 .L260:
 	cmp	r3, r9
 	beq	.L259
-	ldr	r2, [r6, #2328]
+	ldr	r2, [r5, #2328]
 	mul	r8, r10, r3
 	mov	r0, r4
-	mov	r1, fp
+	movs	r1, #64
 	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #4]
-	ldr	r2, [r6, #2316]
+	str	r2, [sp, #8]
+	ldr	r2, [r5, #2316]
 	add	r2, r2, r8
 	ldrh	r2, [r2, #4]
-	str	r2, [sp]
-	mov	r2, r5
-	adds	r5, r5, #1
-	bl	sprintf
-	cmp	r5, #4
+	str	r3, [sp]
+	mov	r3, r7
+	adds	r7, r7, #1
+	str	r2, [sp, #4]
+	mov	r2, fp
+	bl	snprintf
+	cmp	r7, #4
 	add	r4, r4, r0
 	beq	.L259
-	ldr	r3, [r6, #2316]
+	ldr	r3, [r5, #2316]
 	ldrh	r3, [r3, r8]
 	b	.L260
 .L269:
 	.align	2
 .L268:
+	.word	.LC57
+	.word	.LC58
+	.word	.LC59
+	.word	.LC60
+	.word	.LC61
+	.word	.LC62
 	.word	.LC63
 	.word	.LC64
 	.word	.LC65
@@ -2505,12 +2573,16 @@ rknand_proc_ftlread:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #2048
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
-	mov	r5, r0
-	ldr	r2, .L271
-	ldr	r1, .L271+4
-	bl	sprintf
+	mov	r5, r1
+	blt	.L272
+	ldr	r3, .L273
+	movs	r1, #64
+	ldr	r2, .L273+4
+	mov	r0, r5
+	bl	snprintf
 	adds	r4, r5, r0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
@@ -2518,8 +2590,11 @@ rknand_proc_ftlread:
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
 .L272:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L274:
 	.align	2
-.L271:
+.L273:
 	.word	.LC70
 	.word	.LC71
 	.fnend
@@ -2539,18 +2614,18 @@ GetSwlReplaceBlock:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #28
 	sub	sp, sp, #28
-	ldr	r4, .L297
+	ldr	r4, .L299
 	ldr	r2, [r4, #2556]
 	ldr	r3, [r4, #2568]
 	cmp	r2, r3
-	bcs	.L274
+	bcs	.L276
 	ldrh	r1, [r4, #40]
 	movs	r3, #0
 	ldr	r0, [r4, #2328]
 	str	r3, [r4, #2548]
-.L275:
+.L277:
 	cmp	r3, r1
-	bcc	.L276
+	bcc	.L278
 	ldr	r5, [r4, #2548]
 	mov	r0, r5
 	bl	__aeabi_uidiv
@@ -2560,48 +2635,48 @@ GetSwlReplaceBlock:
 	subs	r0, r5, r0
 	bl	__aeabi_uidiv
 	str	r0, [r4, #2548]
-.L277:
+.L279:
 	ldr	r6, [r4, #2568]
 	ldr	r7, [r4, #2556]
 	add	r3, r6, #256
 	cmp	r3, r7
-	bls	.L282
+	bls	.L284
 	ldr	r2, [r4, #2564]
 	add	r3, r6, #768
 	cmp	r3, r2
-	bls	.L282
-.L284:
+	bls	.L284
+.L286:
 	movw	r5, #65535
-.L283:
+.L285:
 	mov	r0, r5
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L276:
+.L278:
 	ldrh	r2, [r0, r3, lsl #1]
 	adds	r3, r3, #1
 	ldr	r5, [r4, #2548]
 	add	r2, r2, r5
 	str	r2, [r4, #2548]
-	b	.L275
-.L274:
+	b	.L277
+.L276:
 	ldr	r3, [r4, #2564]
 	cmp	r2, r3
-	bls	.L277
+	bls	.L279
 	adds	r3, r3, #1
 	str	r3, [r4, #2564]
 	movs	r3, #0
-.L279:
+.L281:
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	bcs	.L277
+	bcs	.L279
 	ldr	r1, [r4, #2328]
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	b	.L279
-.L282:
+	b	.L281
+.L284:
 	ldrh	r0, [r4, #2344]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
@@ -2609,10 +2684,10 @@ GetSwlReplaceBlock:
 	add	r3, r6, #64
 	mov	r9, r0
 	cmp	r0, r3
-	bcc	.L284
+	bcc	.L286
 	ldr	r3, [r4, #2320]
 	cmp	r3, #0
-	beq	.L284
+	beq	.L286
 	ldrh	r2, [r4, #40]
 	movw	r1, #65535
 	ldr	lr, [r4, #2316]
@@ -2622,42 +2697,42 @@ GetSwlReplaceBlock:
 	str	r2, [sp, #20]
 	mov	fp, #6
 	mov	r2, r1
-.L285:
+.L287:
 	ldrh	ip, [r3]
 	cmp	ip, r10
-	bne	.L288
+	bne	.L290
 	mov	r5, r2
-.L287:
+.L289:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L284
+	beq	.L286
 	ldrh	r10, [r8, r5, lsl #1]
 	lsl	fp, r5, #1
 	cmp	r6, r10
-	bcs	.L289
+	bcs	.L291
 	bl	GetFreeBlockMinEraseCount
 	cmp	r6, r0
 	it	cc
 	strcc	r1, [r4, #2568]
-.L289:
+.L291:
 	cmp	r7, r10
-	bls	.L284
+	bls	.L286
 	add	r3, r10, #128
 	cmp	r9, r3
-	ble	.L284
+	ble	.L286
 	add	r3, r10, #256
 	cmp	r7, r3
-	bhi	.L290
+	bhi	.L292
 	ldr	r3, [r4, #2564]
 	add	r10, r10, #768
 	cmp	r10, r3
-	bcs	.L284
-.L290:
+	bcs	.L286
+.L292:
 	str	r9, [sp, #8]
 	mov	r2, r7
 	ldrh	r3, [r8, fp]
 	mov	r1, r5
-	ldr	r0, .L297+4
+	ldr	r0, .L299+4
 	str	r3, [sp, #4]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, fp]
@@ -2666,33 +2741,33 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	movs	r3, #1
 	str	r3, [r4, #3160]
-	b	.L283
-.L288:
+	b	.L285
+.L290:
 	adds	r0, r0, #1
 	ldr	r5, [sp, #20]
 	uxth	r0, r0
 	cmp	r0, r5
-	bhi	.L284
+	bhi	.L286
 	ldrh	r5, [r3, #4]
-	cbz	r5, .L286
-	ldr	r5, .L297+8
+	cbz	r5, .L288
+	ldr	r5, .L299+8
 	sub	r3, r3, lr
 	asrs	r3, r3, #1
 	muls	r3, r5, r3
 	uxth	r5, r3
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r6, r3
-	bcs	.L287
+	bcs	.L289
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
 	movhi	r2, r5
-.L286:
+.L288:
 	mla	r3, fp, ip, lr
-	b	.L285
-.L298:
+	b	.L287
+.L300:
 	.align	2
-.L297:
+.L299:
 	.word	.LANCHOR0
 	.word	.LC72
 	.word	-1431655765
@@ -2713,18 +2788,18 @@ free_data_superblock:
 	push	{r3, lr}
 	.save {r3, lr}
 	cmp	r0, r2
-	beq	.L300
-	ldr	r2, .L301
+	beq	.L302
+	ldr	r2, .L303
 	movs	r1, #0
 	ldr	r2, [r2, #2324]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L300:
+.L302:
 	movs	r0, #0
 	pop	{r3, pc}
-.L302:
+.L304:
 	.align	2
-.L301:
+.L303:
 	.word	.LANCHOR0
 	.fnend
 	.size	free_data_superblock, .-free_data_superblock
@@ -2745,29 +2820,29 @@ get_new_active_ppa:
 	ldrh	r2, [r0]
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L304
+	bne	.L306
 	movw	r2, #2776
-	ldr	r1, .L317
-	ldr	r0, .L317+4
+	ldr	r1, .L319
+	ldr	r0, .L319+4
 	bl	sftl_printk
-.L304:
-	ldr	r5, .L317+8
+.L306:
+	ldr	r5, .L319+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r2, r3
-	bne	.L305
+	bne	.L307
 	movw	r2, #2777
-	ldr	r1, .L317
-	ldr	r0, .L317+4
+	ldr	r1, .L319
+	ldr	r0, .L319+4
 	bl	sftl_printk
-.L305:
+.L307:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L306
+	cbnz	r3, .L308
 	movw	r2, #2778
-	ldr	r1, .L317
-	ldr	r0, .L317+4
+	ldr	r1, .L319
+	ldr	r0, .L319+4
 	bl	sftl_printk
-.L306:
+.L308:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	ldrh	r1, [r5, #32]
@@ -2776,10 +2851,10 @@ get_new_active_ppa:
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
 	mov	r2, r3
-.L307:
+.L309:
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L309
+	beq	.L311
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	subs	r2, r2, #1
@@ -2787,7 +2862,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L311:
+.L313:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2799,21 +2874,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L311
+	beq	.L313
 	strb	r3, [r4, #6]
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5, #102]
 	cmp	r1, r3
-	bne	.L303
-	cbz	r2, .L303
+	bne	.L305
+	cbz	r2, .L305
 	movw	r2, #2799
-	ldr	r1, .L317
-	ldr	r0, .L317+4
+	ldr	r1, .L319
+	ldr	r0, .L319+4
 	bl	sftl_printk
-.L303:
+.L305:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L309:
+.L311:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2826,10 +2901,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L307
-.L318:
+	b	.L309
+.L320:
 	.align	2
-.L317:
+.L319:
 	.word	.LANCHOR1+111
 	.word	.LC1
 	.word	.LANCHOR0
@@ -2846,7 +2921,7 @@ FtlGcBufInit:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L328
+	ldr	r3, .L330
 	mov	ip, #20
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
@@ -2855,21 +2930,21 @@ FtlGcBufInit:
 	movs	r2, #0
 	mov	r7, r3
 	str	r2, [r3, #3164]
-.L320:
+.L322:
 	ldrh	r1, [r3, #32]
 	uxth	r0, r2
 	adds	r4, r2, #1
 	cmp	r0, r1
-	bcc	.L323
-	ldr	r7, .L328
+	bcc	.L325
+	ldr	r7, .L330
 	mov	ip, #12
 	movs	r6, #0
-.L324:
+.L326:
 	ldr	r2, [r3, #3184]
 	cmp	r1, r2
-	bcc	.L327
+	bcc	.L329
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L323:
+.L325:
 	uxth	r2, r2
 	ldr	r8, [r3, #3168]
 	mul	lr, r9, r2
@@ -2900,8 +2975,8 @@ FtlGcBufInit:
 	ldr	r1, [r8, #4]
 	str	r1, [r2, #12]
 	mov	r2, r4
-	b	.L320
-.L327:
+	b	.L322
+.L329:
 	mul	r0, ip, r1
 	ldr	r4, [r3, #3168]
 	ldr	r5, [r3, #3172]
@@ -2926,10 +3001,10 @@ FtlGcBufInit:
 	add	r2, r2, r4
 	uxth	r1, r1
 	str	r2, [r0, #4]
-	b	.L324
-.L329:
+	b	.L326
+.L331:
 	.align	2
-.L328:
+.L330:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -2944,7 +3019,7 @@ FtlGcBufFree:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L337
+	ldr	r3, .L339
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
@@ -2953,32 +3028,32 @@ FtlGcBufFree:
 	mov	r8, r5
 	ldr	ip, [r3, #3184]
 	ldr	r6, [r3, #3168]
-.L331:
+.L333:
 	uxth	r3, r5
 	cmp	r1, r3
-	bls	.L330
+	bls	.L332
 	mla	r4, r10, r3, r0
 	movs	r2, #0
-.L332:
+.L334:
 	uxth	r3, r2
 	cmp	ip, r3
-	bls	.L333
+	bls	.L335
 	mul	r3, lr, r3
 	ldr	r7, [r4, #8]
 	adds	r2, r2, #1
 	add	r9, r6, r3
 	ldr	r3, [r6, r3]
 	cmp	r3, r7
-	bne	.L332
+	bne	.L334
 	str	r8, [r9, #8]
-.L333:
+.L335:
 	adds	r5, r5, #1
-	b	.L331
-.L330:
+	b	.L333
+.L332:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L338:
+.L340:
 	.align	2
-.L337:
+.L339:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2993,7 +3068,7 @@ FtlGcBufAlloc:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L346
+	ldr	r3, .L348
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r9, lr}
 	.save {r4, r5, r6, r7, r8, r9, lr}
@@ -3002,34 +3077,34 @@ FtlGcBufAlloc:
 	mov	r8, #20
 	ldr	r5, [r3, #3184]
 	ldr	r6, [r3, #3168]
-.L340:
+.L342:
 	uxth	r2, r4
 	cmp	r1, r2
-	bhi	.L344
+	bhi	.L346
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L344:
+.L346:
 	mov	r9, #0
-.L341:
+.L343:
 	uxth	r3, r9
 	cmp	r5, r3
-	bls	.L342
+	bls	.L344
 	mla	r3, ip, r3, r6
 	add	r9, r9, #1
 	ldr	r7, [r3, #8]
 	cmp	r7, #0
-	bne	.L341
+	bne	.L343
 	mla	r2, r8, r2, r0
 	ldr	r7, [r3]
 	str	lr, [r3, #8]
 	str	r7, [r2, #8]
 	ldr	r3, [r3, #4]
 	str	r3, [r2, #12]
-.L342:
+.L344:
 	adds	r4, r4, #1
-	b	.L340
-.L347:
+	b	.L342
+.L349:
 	.align	2
-.L346:
+.L348:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -3045,24 +3120,24 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L353
+	ldr	r2, .L355
 	ldr	r3, [r2, #3188]
 	ldrh	r2, [r2, #3192]
 	add	r2, r3, r2, lsl #1
-.L349:
+.L351:
 	cmp	r3, r2
-	bne	.L351
+	bne	.L353
 	movs	r0, #0
 	bx	lr
-.L351:
+.L353:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L349
+	bne	.L351
 	movs	r0, #1
 	bx	lr
-.L354:
+.L356:
 	.align	2
-.L353:
+.L355:
 	.word	.LANCHOR0
 	.fnend
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3085,26 +3160,26 @@ FtlGcUpdatePage:
 	mov	r7, r2
 	movs	r4, #0
 	bl	P2V_block_in_plane
-	ldr	r3, .L359
+	ldr	r3, .L361
 	ldrh	r1, [r3, #3192]
 	ldr	r2, [r3, #3188]
-.L356:
+.L358:
 	uxth	ip, r4
 	cmp	ip, r1
-	bcc	.L358
-	bne	.L357
+	bcc	.L360
+	bne	.L359
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r0, [r3, #3192]
 	adds	r0, r0, #1
 	strh	r0, [r3, #3192]	@ movhi
-	b	.L357
-.L358:
+	b	.L359
+.L360:
 	adds	r4, r4, #1
 	add	ip, r2, r4, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L356
-.L357:
+	bne	.L358
+.L359:
 	ldrh	r2, [r3, #3200]
 	movs	r0, #12
 	muls	r0, r2, r0
@@ -3117,9 +3192,9 @@ FtlGcUpdatePage:
 	adds	r2, r2, #1
 	strh	r2, [r3, #3200]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L360:
+.L362:
 	.align	2
-.L359:
+.L361:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -3138,46 +3213,46 @@ FtlGcRefreshBlock:
 	.save {r4, r5, r6, lr}
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L366
+	ldr	r0, .L368
 	bl	sftl_printk
-	ldr	r3, .L366+4
+	ldr	r3, .L368+4
 	ldrh	r6, [r3, #3202]
 	cmp	r4, r6
-	beq	.L362
+	beq	.L364
 	ldrh	r5, [r3, #3204]
 	cmp	r4, r5
-	beq	.L362
+	beq	.L364
 	ldrh	r0, [r3, #3206]
 	cmp	r4, r0
-	beq	.L362
+	beq	.L364
 	ldrh	r1, [r3, #3208]
 	cmp	r4, r1
-	beq	.L362
+	beq	.L364
 	movw	r2, #65535
 	cmp	r6, r2
-	bne	.L363
+	bne	.L365
 	strh	r4, [r3, #3202]	@ movhi
-.L362:
+.L364:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L363:
+.L365:
 	cmp	r5, r2
-	bne	.L364
+	bne	.L366
 	strh	r4, [r3, #3204]	@ movhi
-	b	.L362
-.L364:
+	b	.L364
+.L366:
 	cmp	r0, r2
-	bne	.L365
+	bne	.L367
 	strh	r4, [r3, #3206]	@ movhi
-	b	.L362
-.L365:
+	b	.L364
+.L367:
 	cmp	r1, r2
 	it	eq
 	strheq	r4, [r3, #3208]	@ movhi
-	b	.L362
-.L367:
+	b	.L364
+.L369:
 	.align	2
-.L366:
+.L368:
 	.word	.LC73
 	.word	.LANCHOR0
 	.fnend
@@ -3196,41 +3271,41 @@ FtlGcMarkBadPhyBlk:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L372
+	ldr	r4, .L374
 	bl	P2V_block_in_plane
 	mov	r2, r5
 	mov	r6, r0
 	ldrh	r1, [r4, #3210]
-	ldr	r0, .L372+4
+	ldr	r0, .L374+4
 	bl	sftl_printk
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4, #3210]
 	movs	r2, #0
 	addw	r0, r4, #3212
-.L369:
+.L371:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L371
+	bhi	.L373
 	cmp	r3, #15
 	itttt	ls
 	addls	r2, r3, #1
 	strhls	r2, [r4, #3210]	@ movhi
 	addls	r4, r4, r3, lsl #1
 	strhls	r5, [r4, #3212]	@ movhi
-	b	.L370
-.L371:
+	b	.L372
+.L373:
 	adds	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L369
-.L370:
+	bne	.L371
+.L372:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L373:
+.L375:
 	.align	2
-.L372:
+.L374:
 	.word	.LANCHOR0
 	.word	.LC74
 	.fnend
@@ -3248,13 +3323,13 @@ FtlGcReFreshBadBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L380
+	ldr	r4, .L382
 	ldrh	r3, [r4, #3210]
-	cbz	r3, .L375
+	cbz	r3, .L377
 	ldrh	r1, [r4, #3202]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L375
+	bne	.L377
 	ldrh	r2, [r4, #3246]
 	cmp	r2, r3
 	itt	cs
@@ -3268,12 +3343,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4, #3246]
 	adds	r3, r3, #1
 	strh	r3, [r4, #3246]	@ movhi
-.L375:
+.L377:
 	movs	r0, #0
 	pop	{r4, pc}
-.L381:
+.L383:
 	.align	2
-.L380:
+.L382:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -3289,11 +3364,11 @@ ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r1, .L383
+	ldr	r1, .L385
 	b	__kmalloc
-.L384:
+.L386:
 	.align	2
-.L383:
+.L385:
 	.word	37748929
 	.fnend
 	.size	ftl_malloc, .-ftl_malloc
@@ -3326,54 +3401,54 @@ rknand_print_hex:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r6, #0
-	ldr	fp, .L395+16
+	ldr	fp, .L397+16
 	mov	r10, r0
 	mov	r7, r1
 	mov	r8, r2
 	mov	r9, r3
 	mov	r5, r6
 	mov	r4, r6
-.L387:
+.L389:
 	cmp	r4, r9
-	bcc	.L393
-	ldr	r0, .L395
+	bcc	.L395
+	ldr	r0, .L397
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	b	sftl_printk
-.L393:
-	cbnz	r5, .L388
+.L395:
+	cbnz	r5, .L390
 	mov	r3, r6
 	mov	r2, r7
 	mov	r1, r10
-	ldr	r0, .L395+4
+	ldr	r0, .L397+4
 	bl	sftl_printk
-.L388:
+.L390:
 	cmp	r8, #4
-	bne	.L389
+	bne	.L391
 	ldr	r1, [r7, r4, lsl #2]
-	ldr	r0, .L395+8
-.L394:
+	ldr	r0, .L397+8
+.L396:
 	adds	r5, r5, #1
 	bl	sftl_printk
 	cmp	r5, #15
-	bls	.L392
+	bls	.L394
 	movs	r5, #0
-	ldr	r0, .L395
+	ldr	r0, .L397
 	bl	sftl_printk
-.L392:
+.L394:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L387
-.L389:
+	b	.L389
+.L391:
 	cmp	r8, #2
 	ittee	eq
 	ldrheq	r1, [r7, r4, lsl #1]
 	moveq	r0, fp
 	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
-	ldrne	r0, .L395+12
-	b	.L394
-.L396:
+	ldrne	r0, .L397+12
+	b	.L396
+.L398:
 	.align	2
-.L395:
+.L397:
 	.word	.LC79
 	.word	.LC75
 	.word	.LC76
@@ -3396,30 +3471,30 @@ FlashReadPages:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	mov	r8, r1
-	ldr	r5, .L415
+	ldr	r5, .L417
 	mov	r4, r0
 	movs	r6, #0
-	ldr	r10, .L415+4
+	ldr	r10, .L417+4
 	ldrh	r9, [r5, #12]
-	ldr	fp, .L415+8
-.L398:
+	ldr	fp, .L417+8
+.L400:
 	cmp	r6, r8
-	bne	.L405
+	bne	.L407
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L405:
+.L407:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L399
+	cbz	r3, .L401
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L400
-.L399:
+	cbnz	r3, .L402
+.L401:
 	movs	r2, #101
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L400:
+.L402:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r4
@@ -3433,7 +3508,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L402
+	bne	.L404
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #4]
@@ -3444,27 +3519,27 @@ FlashReadPages:
 	add	r1, r1, r9
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L403
+	beq	.L405
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L402
+	bne	.L404
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L402
+	bne	.L404
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L402
-.L403:
+	beq	.L404
+.L405:
 	mov	r3, #-1
 	str	r3, [r4]
-.L402:
+.L404:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L398
-.L416:
+	b	.L400
+.L418:
 	.align	2
-.L415:
+.L417:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+130
 	.word	.LC1
@@ -3484,7 +3559,7 @@ FtlLoadFactoryBbt:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r6, #0
-	ldr	r4, .L427
+	ldr	r4, .L429
 	movw	r10, #61664
 	ldr	r3, [r4, #3284]
 	add	r7, r4, #162
@@ -3492,23 +3567,23 @@ FtlLoadFactoryBbt:
 	add	r9, r4, #3264
 	str	r3, [r4, #3272]
 	str	r8, [r4, #3276]
-.L418:
+.L420:
 	ldrh	r3, [r4, #54]
 	cmp	r6, r3
-	bcc	.L423
+	bcc	.L425
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L423:
+.L425:
 	ldrh	r5, [r4, #98]
 	movw	r3, #65535
 	strh	r3, [r7, #2]!	@ movhi
-.L420:
+.L422:
 	ldrh	r3, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
 	sub	r2, r3, #16
 	cmp	r5, r2
-	ble	.L421
+	ble	.L423
 	mla	r3, r6, r3, r5
 	movs	r2, #1
 	mov	r1, r2
@@ -3518,17 +3593,17 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L420
+	beq	.L422
 	ldrh	r3, [r8]
 	cmp	r3, r10
-	bne	.L420
+	bne	.L422
 	strh	r5, [r7]	@ movhi
-.L421:
+.L423:
 	adds	r6, r6, #1
-	b	.L418
-.L428:
+	b	.L420
+.L430:
 	.align	2
-.L427:
+.L429:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -3543,7 +3618,7 @@ FtlGetLastWrittenPage:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L440
+	ldr	r3, .L442
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
@@ -3558,7 +3633,7 @@ FtlGetLastWrittenPage:
 	it	ne
 	ldrhne	r5, [r3, #102]
 	add	r0, sp, #4
-	ldr	r3, .L440+4
+	ldr	r3, .L442+4
 	subs	r5, r5, #1
 	sxth	r5, r5
 	str	r3, [sp, #12]
@@ -3569,17 +3644,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L432
+	bne	.L434
 	mov	r8, #0
-.L433:
+.L435:
 	cmp	r8, r5
-	ble	.L436
-.L432:
+	ble	.L438
+.L434:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L436:
+.L438:
 	add	r3, r8, r5
 	mov	r2, r7
 	add	r3, r3, r3, lsr #31
@@ -3592,23 +3667,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L434
+	bne	.L436
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L434
+	bne	.L436
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L434
+	beq	.L436
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L433
-.L434:
+	b	.L435
+.L436:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L433
-.L441:
+	b	.L435
+.L443:
 	.align	2
-.L440:
+.L442:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -3627,7 +3702,7 @@ FlashProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	fp, r1
-	ldr	r6, .L472
+	ldr	r6, .L474
 	mov	r9, r2
 	mov	r4, r0
 	mov	r5, r0
@@ -3636,28 +3711,28 @@ FlashProgPages:
 	sub	sp, sp, #44
 	ldrh	r10, [r6, #12]
 	str	r3, [sp, #4]
-.L443:
+.L445:
 	cmp	r8, fp
-	bne	.L451
+	bne	.L453
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L458
-.L471:
+	bne	.L460
+.L473:
 	movs	r0, #0
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L451:
+.L453:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L444
+	cbz	r3, .L446
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L445
-.L444:
+	cbnz	r3, .L447
+.L446:
 	movs	r2, #131
-	ldr	r1, .L472+4
-	ldr	r0, .L472+8
+	ldr	r1, .L474+4
+	ldr	r0, .L474+8
 	bl	sftl_printk
-.L445:
+.L447:
 	add	r2, sp, #12
 	add	r1, sp, #16
 	mov	r0, r5
@@ -3668,12 +3743,12 @@ FlashProgPages:
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r7, [r6, #3256]
 	blx	r7
-	cbnz	r0, .L446
+	cbnz	r0, .L448
 	str	r0, [r5]
-.L447:
+.L449:
 	ldrh	r3, [r6, #14]
 	cmp	r3, #4
-	bne	.L449
+	bne	.L451
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
@@ -3683,18 +3758,18 @@ FlashProgPages:
 	ldr	r7, [r6, #3256]
 	add	r1, r1, r10
 	blx	r7
-	cbz	r0, .L449
+	cbz	r0, .L451
 	mov	r3, #-1
 	str	r3, [r5]
-.L449:
+.L451:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L443
-.L446:
+	b	.L445
+.L448:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L447
-.L456:
+	b	.L449
+.L458:
 	movs	r3, #0
 	mov	r2, r9
 	str	r3, [r7]
@@ -3708,53 +3783,53 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r3, [sp, #20]
 	adds	r2, r3, #1
-	bne	.L453
+	bne	.L455
 	ldr	r1, [r4, #4]
 	mov	r0, fp
 	str	r3, [sp, #4]
 	bl	sftl_printk
 	ldr	r3, [sp, #4]
 	str	r3, [r4]
-.L453:
+.L455:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L454
+	cbz	r3, .L456
 	ldr	r2, [r3]
 	ldr	r3, [r6, #3292]
 	cmp	r2, r3
-	beq	.L454
+	beq	.L456
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+12
+	ldr	r0, .L474+12
 	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L454:
+.L456:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L455
+	cbz	r3, .L457
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L455
+	beq	.L457
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+16
+	ldr	r0, .L474+16
 	bl	sftl_printk
 	mov	r3, #-1
 	str	r3, [r4]
-.L455:
+.L457:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-.L452:
+.L454:
 	cmp	r8, r5
-	bne	.L456
-	b	.L471
-.L458:
+	bne	.L458
+	b	.L473
+.L460:
 	movs	r5, #0
-	ldr	r7, .L472+20
-	ldr	r10, .L472+24
-	ldr	fp, .L472+28
-	b	.L452
-.L473:
+	ldr	r7, .L474+20
+	ldr	r10, .L474+24
+	ldr	fp, .L474+28
+	b	.L454
+.L475:
 	.align	2
-.L472:
+.L474:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+145
 	.word	.LC1
@@ -3780,19 +3855,19 @@ FlashEraseBlocks:
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
 	mov	r7, r2
-	ldr	r4, .L485
+	ldr	r4, .L487
 	mov	r5, r0
 	movs	r6, #0
 	mov	r9, #-1
 	ldrh	r8, [r4, #12]
-.L475:
+.L477:
 	cmp	r6, r7
-	bne	.L481
+	bne	.L483
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L481:
+.L483:
 	mov	r2, sp
 	add	r1, sp, #4
 	mov	r0, r5
@@ -3808,21 +3883,21 @@ FlashEraseBlocks:
 	str	r3, [r5]
 	ldrh	r3, [r4, #14]
 	cmp	r3, #4
-	bne	.L479
+	bne	.L481
 	ldr	r1, [sp, #4]
 	ldr	r3, [r4, #3252]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	add	r1, r1, r8
 	blx	r3
-	cbz	r0, .L479
+	cbz	r0, .L481
 	str	r9, [r5]
-.L479:
+.L481:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L475
-.L486:
+	b	.L477
+.L488:
 	.align	2
-.L485:
+.L487:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -3844,12 +3919,12 @@ FtlFreeSysBlkQueueIn:
 	.save {r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L487
-	ldr	r4, .L496
+	bhi	.L489
+	ldr	r4, .L498
 	ldrh	r3, [r4, #218]
 	cmp	r3, #1024
-	beq	.L487
-	cbz	r1, .L489
+	beq	.L489
+	cbz	r1, .L491
 	bl	P2V_block_in_plane
 	mov	r6, r0
 	ldr	r0, [r4, #3804]
@@ -3865,7 +3940,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	r3, [r4, #2560]
 	adds	r3, r3, #1
 	str	r3, [r4, #2560]
-.L489:
+.L491:
 	ldrh	r3, [r4, #218]
 	adds	r3, r3, #1
 	strh	r3, [r4, #218]	@ movhi
@@ -3875,11 +3950,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r2, #220]	@ movhi
 	strh	r3, [r4, #216]	@ movhi
-.L487:
+.L489:
 	pop	{r4, r5, r6, pc}
-.L497:
+.L499:
 	.align	2
-.L496:
+.L498:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -3897,7 +3972,7 @@ FtlLowFormatEraseBlock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, #0
-	ldr	r4, .L543
+	ldr	r4, .L545
 	mov	r7, r1
 	mov	r6, r10
 	mov	r5, r10
@@ -3907,79 +3982,79 @@ FtlLowFormatEraseBlock:
 	mov	fp, r4
 	str	r0, [sp]
 	str	r0, [r4, #3808]
-.L499:
+.L501:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r10
 	cmp	r1, r3
-	bhi	.L504
+	bhi	.L506
 	cmp	r6, #0
-	beq	.L498
+	beq	.L500
 	mov	r8, #0
 	mov	r9, #20
 	mov	r2, r6
 	movs	r1, #0
 	ldr	r0, [r4, #3804]
 	bl	FlashEraseBlocks
-.L507:
+.L509:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L509
+	bhi	.L511
 	cmp	r7, #0
-	beq	.L526
+	beq	.L528
 	ldrh	r3, [r4, #104]
 	mov	r10, #1
 	str	r3, [sp, #4]
 	lsrs	r3, r3, #2
 	str	r3, [sp, #8]
-.L510:
+.L512:
 	mov	r8, #0
 	mov	fp, #20
-.L520:
+.L522:
 	mov	r9, #0
 	mov	r6, r9
-.L511:
+.L513:
 	ldrh	r1, [r4, #32]
 	uxth	r3, r9
 	cmp	r1, r3
-	bhi	.L515
-	cbz	r6, .L498
+	bhi	.L517
+	cbz	r6, .L500
 	mov	r9, #0
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r6
 	ldr	r0, [r4, #3804]
 	bl	FlashProgPages
-.L517:
+.L519:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L519
+	bhi	.L521
 	ldr	r3, [sp, #8]
 	add	r8, r8, r3
 	ldr	r3, [sp, #4]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L520
+	bhi	.L522
 	mov	r8, #0
 	mov	r9, #20
-.L521:
+.L523:
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L523
+	bhi	.L525
 	ldr	r3, [sp]
 	cmp	r3, #63
-	bls	.L524
-	cbz	r7, .L498
-.L524:
+	bls	.L526
+	cbz	r7, .L500
+.L526:
 	mov	r2, r6
 	mov	r1, r10
 	ldr	r0, [r4, #3804]
 	bl	FlashEraseBlocks
-.L498:
+.L500:
 	mov	r0, r5
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L504:
+.L506:
 	uxth	r3, r10
 	ldr	r0, [r4, #3804]
 	movs	r2, #0
@@ -3990,13 +4065,13 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r8, r0
-	cbz	r7, .L500
+	cbz	r7, .L502
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L501
-.L500:
+	cbnz	r0, .L503
+.L502:
 	mov	r0, r8
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L502
+	cbnz	r0, .L504
 	ldr	r1, [r4, #3804]
 	lsl	r3, r8, #10
 	ldr	r0, [fp, #3816]
@@ -4013,36 +4088,36 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L501:
+.L503:
 	add	r10, r10, #1
-	b	.L499
-.L502:
+	b	.L501
+.L504:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L501
-.L509:
+	b	.L503
+.L511:
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L508
+	bne	.L510
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L508:
+.L510:
 	add	r8, r8, #1
-	b	.L507
-.L526:
+	b	.L509
+.L528:
 	movs	r3, #6
 	mov	r10, r7
 	str	r3, [sp, #8]
 	movs	r3, #1
 	str	r3, [sp, #4]
-	b	.L510
-.L515:
+	b	.L512
+.L517:
 	uxth	r3, r9
 	ldr	r0, [r4, #3804]
 	movs	r2, #0
@@ -4053,16 +4128,16 @@ FtlLowFormatEraseBlock:
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r7, .L512
+	cbz	r7, .L514
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L513
-.L512:
+	cbnz	r0, .L515
+.L514:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L513
+	cbnz	r0, .L515
 	ldr	r1, [r4, #3804]
 	ldr	r3, [sp, #12]
-	ldr	r2, .L543
+	ldr	r2, .L545
 	mla	r1, fp, r6, r1
 	ldr	r0, [r2, #3812]
 	add	r3, r8, r3, lsl #10
@@ -4078,40 +4153,40 @@ FtlLowFormatEraseBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L513:
+.L515:
 	add	r9, r9, #1
-	b	.L511
-.L519:
+	b	.L513
+.L521:
 	mul	r3, fp, r9
 	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L518
+	cbz	r3, .L520
 	ldr	r0, [r1, #4]
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L518:
+.L520:
 	add	r9, r9, #1
-	b	.L517
-.L523:
-	cbz	r7, .L522
+	b	.L519
+.L525:
+	cbz	r7, .L524
 	mul	r3, r9, r8
 	ldr	r2, [r4, #3804]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L522
+	cbnz	r3, .L524
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L522:
+.L524:
 	add	r8, r8, #1
-	b	.L521
-.L544:
+	b	.L523
+.L546:
 	.align	2
-.L543:
+.L545:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -4128,11 +4203,11 @@ FtlFreeSysBlkQueueOut:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
-	ldr	r4, .L552
-	ldr	r6, .L552+4
-.L546:
+	ldr	r4, .L554
+	ldr	r6, .L554+4
+.L548:
 	ldrh	r1, [r4, #218]
-	cbz	r1, .L547
+	cbz	r1, .L549
 	ldrh	r3, [r4, #214]
 	subs	r1, r1, #1
 	strh	r1, [r4, #218]	@ movhi
@@ -4161,23 +4236,23 @@ FtlFreeSysBlkQueueOut:
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L548
+	bhi	.L550
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L547:
-	ldr	r0, .L552+8
+.L549:
+	ldr	r0, .L554+8
 	bl	sftl_printk
+.L552:
+	b	.L552
 .L550:
-	b	.L550
-.L548:
 	ldrh	r2, [r4, #218]
 	mov	r1, r5
 	mov	r0, r6
 	bl	sftl_printk
-	b	.L546
-.L553:
+	b	.L548
+.L555:
 	.align	2
-.L552:
+.L554:
 	.word	.LANCHOR0
 	.word	.LC84
 	.word	.LC83
@@ -4200,16 +4275,16 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r1, [r0, #10]
 	movs	r3, #0
 	ldr	r2, [r0, #12]
-.L555:
+.L557:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L558
+	bcs	.L560
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L555
+	bne	.L557
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4217,14 +4292,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L556
-	ldr	r3, .L562
-	ldr	r0, .L562+4
+	bls	.L558
+	ldr	r3, .L564
+	ldr	r0, .L564+4
 	ldrh	r2, [r3, #218]
 	bl	sftl_printk
-.L557:
-	b	.L557
-.L556:
+.L559:
+	b	.L559
+.L558:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4233,20 +4308,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L558:
+.L560:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L560
+	bhi	.L562
 	movw	r2, #603
-	ldr	r1, .L562+8
-	ldr	r0, .L562+12
+	ldr	r1, .L564+8
+	ldr	r0, .L564+12
 	bl	sftl_printk
-.L560:
+.L562:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L563:
+.L565:
 	.align	2
-.L562:
+.L564:
 	.word	.LANCHOR0
 	.word	.LC85
 	.word	.LANCHOR1+160
@@ -4270,8 +4345,8 @@ FlashTestBlk:
 	mov	r4, r0
 	.pad #92
 	sub	sp, sp, #92
-	bls	.L566
-	ldr	r5, .L567
+	bls	.L568
+	ldr	r5, .L569
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -4301,17 +4376,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L564:
+.L566:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L566:
-	movs	r4, #0
-	b	.L564
 .L568:
+	movs	r4, #0
+	b	.L566
+.L570:
 	.align	2
-.L567:
+.L569:
 	.word	ftl_temp_buf
 	.fnend
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -4329,7 +4404,7 @@ FlashGetBadBlockList:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r2, #256
-	ldr	r5, .L576
+	ldr	r5, .L578
 	mov	r4, r0
 	mov	r6, r1
 	movs	r1, #255
@@ -4340,31 +4415,31 @@ FlashGetBadBlockList:
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L570
+	bls	.L572
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	memset
 	movs	r0, #0
-.L570:
+.L572:
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L575
+	bne	.L577
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L572:
+.L574:
 	cmp	r3, r1
-	bne	.L573
-.L575:
+	bne	.L575
+.L577:
 	pop	{r4, r5, r6, pc}
-.L573:
+.L575:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L572
-.L577:
+	b	.L574
+.L579:
 	.align	2
-.L576:
+.L578:
 	.word	.LANCHOR0
 	.fnend
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -4382,9 +4457,9 @@ ftl_memset:
 	push	{r4, lr}
 	.save {r4, lr}
 	mov	r4, r0
-	cbz	r2, .L579
+	cbz	r2, .L581
 	bl	memset
-.L579:
+.L581:
 	mov	r0, r4
 	pop	{r4, pc}
 	.fnend
@@ -4403,7 +4478,7 @@ FtlMemInit:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r3, #65535
-	ldr	r4, .L684
+	ldr	r4, .L686
 	movs	r5, #0
 	movs	r6, #12
 	movs	r7, #20
@@ -4510,7 +4585,7 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r3, [r4, #3856]
 	str	r0, [r4, #3860]
-	ldr	r0, .L684+4
+	ldr	r0, .L686+4
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
@@ -4597,143 +4672,143 @@ FtlMemInit:
 	str	r0, [r4, #180]
 	lsls	r2, r2, #2
 	mov	r1, r2
-.L584:
+.L586:
 	cmp	r3, r6
-	bcc	.L585
-	ldr	r2, .L684+8
+	bcc	.L587
+	ldr	r2, .L686+8
 	movs	r1, #0
 	add	r3, r2, r3, lsl #2
 	adds	r2, r2, #56
 	adds	r3, r3, #24
-.L586:
+.L588:
 	cmp	r2, r3
-	bne	.L587
+	bne	.L589
 	ldr	r3, [r4, #3872]
-	cbnz	r3, .L588
-.L590:
-	ldr	r1, .L684+12
-	ldr	r0, .L684+16
+	cbnz	r3, .L590
+.L592:
+	ldr	r1, .L686+12
+	ldr	r0, .L686+16
 	bl	sftl_printk
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L585:
+.L587:
 	ldr	r0, [r4, #180]
 	adds	r3, r3, #1
 	add	r0, r0, r1
 	add	r1, r1, r2
 	str	r0, [r5, #4]!
-	b	.L584
-.L587:
-	str	r1, [r3, #4]!
 	b	.L586
-.L685:
+.L589:
+	str	r1, [r3, #4]!
+	b	.L588
+.L687:
 	.align	2
-.L684:
+.L686:
 	.word	.LANCHOR0
 	.word	33553920
 	.word	.LANCHOR0+152
 	.word	.LANCHOR1+186
 	.word	.LC86
-.L588:
+.L590:
 	ldr	r3, [r4, #3876]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3892]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3896]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #2492]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3900]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #2316]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #180]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #2324]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3188]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3196]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3836]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3844]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3804]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3180]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3840]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3284]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3848]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3852]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3172]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3820]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3812]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3168]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3288]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3816]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3176]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #2328]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #3860]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r4, #148]
 	cmp	r3, #0
-	beq	.L590
-	ldr	r3, .L686
+	beq	.L592
+	ldr	r3, .L688
 	ldr	r2, [r3, #3880]
 	cmp	r2, #0
-	beq	.L590
+	beq	.L592
 	ldr	r2, [r3, #3884]
 	cmp	r2, #0
-	beq	.L590
+	beq	.L592
 	ldr	r3, [r3, #3888]
 	cmp	r3, #0
-	beq	.L590
+	beq	.L592
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L687:
+.L689:
 	.align	2
-.L686:
+.L688:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMemInit, .-FtlMemInit
@@ -4751,30 +4826,30 @@ FtlBbt2Bitmap:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r5, r0
-	ldr	r6, .L694
+	ldr	r6, .L696
 	mov	r7, r1
 	subs	r4, r5, #2
 	movw	r8, #65535
-	ldr	r9, .L694+4
+	ldr	r9, .L696+4
 	addw	r5, r5, #1022
 	ldrh	r2, [r6, #3904]
 	movs	r1, #0
-	ldr	r10, .L694+8
+	ldr	r10, .L696+8
 	mov	r0, r7
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L691:
+.L693:
 	ldrh	r3, [r4, #2]
 	cmp	r3, r8
-	beq	.L688
+	beq	.L690
 	ldrh	r2, [r6, #98]
 	cmp	r2, r3
-	bhi	.L690
+	bhi	.L692
 	movs	r2, #74
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L690:
+.L692:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -4784,12 +4859,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r7, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r7, r1, lsl #2]
-	bne	.L691
-.L688:
+	bne	.L693
+.L690:
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L695:
+.L697:
 	.align	2
-.L694:
+.L696:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+197
 	.word	.LC1
@@ -4819,37 +4894,37 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L697:
+.L699:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L701
+	bhi	.L703
 	ldrh	fp, [r5]
 	movs	r6, #0
-	ldr	r2, .L710
+	ldr	r2, .L712
 	mov	r10, r6
-.L702:
+.L704:
 	ldrh	r1, [r4, #10]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L706
+	bhi	.L708
 	mov	r0, r10
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L701:
+.L703:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L698:
+.L700:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L700
+	bhi	.L702
 	adds	r3, r3, #1
-	b	.L697
-.L700:
+	b	.L699
+.L702:
 	uxth	r0, r2
 	adds	r2, r2, #1
 	ldrh	r7, [r9, r0, lsl #1]
@@ -4858,27 +4933,27 @@ ftl_free_no_use_map_blk:
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L698
-.L706:
+	b	.L700
+.L708:
 	ldrh	r1, [r4]
 	uxth	r7, r6
 	cmp	r1, r3
-	bne	.L703
+	bne	.L705
 	ldrh	r1, [r2, #104]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L703:
+.L705:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	fp, r8
 	itt	hi
 	movhi	r10, r3
 	movhi	fp, r8
 	cmp	r8, #0
-	bne	.L705
+	bne	.L707
 	ldrh	r0, [r9, r7, lsl #1]
-	cbz	r0, .L705
+	cbz	r0, .L707
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -4887,12 +4962,12 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L705:
+.L707:
 	adds	r6, r6, #1
-	b	.L702
-.L711:
+	b	.L704
+.L713:
 	.align	2
-.L710:
+.L712:
 	.word	.LANCHOR0
 	.fnend
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -4914,14 +4989,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L713
+	bne	.L715
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L714
+	cbz	r3, .L716
 	movw	r2, #677
-	ldr	r1, .L722
-	ldr	r0, .L722+4
+	ldr	r1, .L724
+	ldr	r0, .L724+4
 	bl	sftl_printk
-.L714:
+.L716:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -4933,14 +5008,14 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L715:
+.L717:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L713:
+.L715:
 	ldrh	r6, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r5, .L722+8
+	ldr	r5, .L724+8
 	ldr	r2, [r0, #28]
 	ldr	r7, [r0, #24]
 	orr	r3, r3, r6, lsl #10
@@ -4961,27 +5036,27 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	movs	r2, #0
 	mov	r3, r2
-.L716:
+.L718:
 	ldrh	r0, [r4, #6]
 	uxth	r1, r2
 	cmp	r0, r1
-	bhi	.L718
+	bhi	.L720
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L722+12
+	ldr	r0, .L724+12
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L715
-.L718:
+	b	.L717
+.L720:
 	uxth	r1, r2
 	ldr	r0, [r7, r1, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L717
+	bne	.L719
 	ldr	r0, [r5, #3284]
 	adds	r3, r3, #1
 	uxth	r3, r3
@@ -4990,12 +5065,12 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r5, #3284]
 	add	r1, r1, r3, lsl #3
 	str	r0, [r1, #4]
-.L717:
+.L719:
 	adds	r2, r2, #1
-	b	.L716
-.L723:
+	b	.L718
+.L725:
 	.align	2
-.L722:
+.L724:
 	.word	.LANCHOR1+211
 	.word	.LC1
 	.word	.LANCHOR0
@@ -5016,13 +5091,13 @@ FtlMapWritePage:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L753
+	ldr	r7, .L755
 	mov	r9, r1
 	mov	fp, r2
 	movs	r6, #0
-	ldr	r10, .L753+20
+	ldr	r10, .L755+20
 	mov	r5, r7
-.L725:
+.L727:
 	ldr	r3, [r7, #2524]
 	adds	r3, r3, #1
 	str	r3, [r7, #2524]
@@ -5030,33 +5105,33 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L726
+	bge	.L728
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L727
-.L726:
+	bne	.L729
+.L728:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L727:
+.L729:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L728
+	cbnz	r3, .L730
 	movw	r2, #735
 	mov	r1, r10
-	ldr	r0, .L753+4
+	ldr	r0, .L755+4
 	bl	sftl_printk
-.L728:
+.L730:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L729
+	bcc	.L731
 	mov	r2, #736
 	mov	r1, r10
-	ldr	r0, .L753+4
+	ldr	r0, .L755+4
 	bl	sftl_printk
-.L729:
+.L731:
 	ldrh	r2, [r4]
 	movs	r1, #16
 	ldr	r3, [r4, #12]
@@ -5070,7 +5145,7 @@ FtlMapWritePage:
 	bl	__memzero
 	ldr	r3, [r5, #3276]
 	ldr	r2, [r4, #28]
-	ldr	r0, .L753+8
+	ldr	r0, .L755+8
 	strh	r9, [r3, #8]	@ movhi
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
@@ -5086,10 +5161,10 @@ FtlMapWritePage:
 	strh	r3, [r4, #2]	@ movhi
 	ldr	r2, [r5, #3264]
 	adds	r1, r2, #1
-	bne	.L730
+	bne	.L732
 	ldr	r1, [r5, #3268]
 	adds	r6, r6, #1
-	ldr	r0, .L753+12
+	ldr	r0, .L755+12
 	uxth	r6, r6
 	bl	sftl_printk
 	ldrh	r3, [r4, #2]
@@ -5099,38 +5174,38 @@ FtlMapWritePage:
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L732
+	bls	.L734
 	mov	r2, r6
 	ldr	r1, [r5, #3268]
-	ldr	r0, .L753+16
+	ldr	r0, .L755+16
 	bl	sftl_printk
-.L733:
-	b	.L733
-.L732:
+.L735:
+	b	.L735
+.L734:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L725
-.L750:
-	b	.L750
-.L730:
-	cbz	r2, .L736
+	beq	.L727
+.L752:
+	b	.L752
+.L732:
+	cbz	r2, .L738
 	cmp	r3, #1
 	strh	r8, [r4, #40]	@ movhi
-	beq	.L725
+	beq	.L727
 	cmp	r2, #256
-.L752:
-	beq	.L725
+.L754:
+	beq	.L727
 	ldr	r2, [r5, #3268]
 	movs	r0, #0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r9, lsl #2]
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L736:
+.L738:
 	cmp	r3, #1
-	b	.L752
-.L754:
+	b	.L754
+.L756:
 	.align	2
-.L753:
+.L755:
 	.word	.LANCHOR0
 	.word	.LC1
 	.word	.LANCHOR0+3264
@@ -5153,20 +5228,20 @@ load_l2p_region:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L762
+	ldr	r4, .L764
 	mov	r8, r1
 	ldrh	r3, [r4, #136]
 	cmp	r3, r0
-	bcs	.L756
+	bcs	.L758
 	mov	r2, #510
-	ldr	r1, .L762+4
-	ldr	r0, .L762+8
+	ldr	r1, .L764+4
+	ldr	r0, .L764+8
 	bl	sftl_printk
-.L756:
+.L758:
 	ldr	r3, [r4, #3892]
 	movs	r5, #12
 	ldr	r7, [r3, r6, lsl #2]
-	cbnz	r7, .L757
+	cbnz	r7, .L759
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	ldrh	r2, [r4, #110]
@@ -5179,14 +5254,14 @@ load_l2p_region:
 	ldr	r3, [r4, #2492]
 	add	r5, r5, r3
 	str	r7, [r5, #4]
-.L758:
+.L760:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L757:
+.L759:
 	mul	r5, r5, r8
 	ldr	r3, [r4, #2492]
 	movs	r2, #1
-	ldr	r0, .L762+12
+	ldr	r0, .L764+12
 	mov	r1, r2
 	str	r7, [r4, #3268]
 	add	r3, r3, r5
@@ -5198,55 +5273,55 @@ load_l2p_region:
 	ldr	r3, [r4, #3264]
 	ldr	r8, [r4, #3276]
 	cmp	r3, #256
-	bne	.L759
+	bne	.L761
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L762+16
+	ldr	r0, .L764+16
 	bl	sftl_printk
 	lsrs	r3, r7, #10
 	mov	r1, r6
-	ldr	r0, .L762+20
+	ldr	r0, .L764+20
 	strh	r3, [r4, #3948]	@ movhi
 	ldr	r3, [r4, #2492]
 	add	r3, r3, r5
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-.L759:
+.L761:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L760
+	beq	.L762
 	mov	r2, r7
 	mov	r1, r6
-	ldr	r0, .L762+24
+	ldr	r0, .L764+24
 	bl	sftl_printk
 	movs	r3, #4
 	ldr	r1, [r4, #3276]
 	mov	r2, r3
-	ldr	r0, .L762+28
+	ldr	r0, .L764+28
 	bl	rknand_print_hex
 	ldrh	r3, [r4, #136]
 	movs	r2, #4
 	ldr	r1, [r4, #3892]
-	ldr	r0, .L762+32
+	ldr	r0, .L764+32
 	bl	rknand_print_hex
-.L760:
+.L762:
 	ldrh	r3, [r8, #8]
 	cmp	r3, r6
-	beq	.L761
+	beq	.L763
 	movw	r2, #535
-	ldr	r1, .L762+4
-	ldr	r0, .L762+8
+	ldr	r1, .L764+4
+	ldr	r0, .L764+8
 	bl	sftl_printk
-.L761:
+.L763:
 	ldr	r3, [r4, #2492]
 	movs	r1, #0
 	adds	r2, r3, r5
 	str	r1, [r2, #4]
 	strh	r6, [r3, r5]	@ movhi
-	b	.L758
-.L763:
+	b	.L760
+.L765:
 	.align	2
-.L762:
+.L764:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+258
 	.word	.LC1
@@ -5280,32 +5355,32 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	ldrh	r1, [r4, #40]
 	sub	r3, ip, #4
-	ldr	r5, .L788
+	ldr	r5, .L790
 	cmp	r2, r3
-	bge	.L765
+	bge	.L767
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L767
+	beq	.L769
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L768
-.L765:
+	bcc	.L770
+.L767:
 	movw	r3, #65535
 	uxth	r0, r0
 	cmp	r1, r3
-	beq	.L769
+	beq	.L771
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r5, #104]
 	cmp	r2, r3
-	bls	.L770
-.L769:
+	bls	.L772
+.L771:
 	ldrh	r9, [r6, r0, lsl #1]
 	lsls	r2, r0, #1
 	cmp	r9, #0
-	beq	.L767
+	beq	.L769
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L767
+	cbnz	r3, .L769
 	movs	r1, #1
 	str	r1, [r4, #32]
 	strh	r3, [r6, r2]	@ movhi
@@ -5315,66 +5390,66 @@ ftl_map_blk_gc:
 	strh	r3, [r4, #8]	@ movhi
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L775
+	bcc	.L777
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L775:
+.L777:
 	movs	r6, #0
-.L776:
+.L778:
 	ldrh	r2, [r4, #6]
 	uxth	fp, r6
 	cmp	r2, fp
-	bhi	.L783
+	bhi	.L785
 	movs	r1, #1
 	mov	r0, r9
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L767:
+.L769:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bcc	.L768
+	bcc	.L770
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L768:
+.L770:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L773:
+.L775:
 	ldrh	r8, [r6, r2, lsl #1]
 	add	lr, r2, #1
 	cmp	r8, r1
-	beq	.L771
+	beq	.L773
 	mov	r2, lr
-.L772:
+.L774:
 	uxth	r7, r2
 	cmp	r7, ip
-	bcc	.L773
+	bcc	.L775
 	mov	r7, r0
-.L771:
+.L773:
 	uxth	r2, r2
-	ldr	r0, .L788+4
+	ldr	r0, .L790+4
 	ldrh	r2, [r6, r2, lsl #1]
 	bl	sftl_printk
 	movw	r3, #65535
 	mov	r0, r7
 	strh	r3, [r4, #40]	@ movhi
-	b	.L769
-.L770:
+	b	.L771
+.L772:
 	movs	r2, #0
-	b	.L772
-.L783:
+	b	.L774
+.L785:
 	uxth	r7, r6
 	ldr	r2, [r10, r7, lsl #2]
 	add	r3, r10, r7, lsl #2
 	str	r3, [sp, #4]
 	cmp	r9, r2, lsr #10
-	bne	.L777
+	bne	.L779
 	ldr	r2, [r5, #3848]
 	ldr	r8, [r5, #3288]
-	ldr	r0, .L788+8
+	ldr	r0, .L790+8
 	str	r2, [r5, #3272]
 	str	r8, [r5, #3276]
 	ldr	r2, [r10, r7, lsl #2]
@@ -5384,39 +5459,39 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	r2, [r8, #8]
 	cmp	r2, fp
-	beq	.L778
+	beq	.L780
 	movw	r2, #647
-	ldr	r1, .L788+12
-	ldr	r0, .L788+16
+	ldr	r1, .L790+12
+	ldr	r0, .L790+16
 	bl	sftl_printk
-.L778:
+.L780:
 	ldr	r2, [r5, #3264]
 	adds	r2, r2, #1
-	bne	.L779
-.L781:
+	bne	.L781
+.L783:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L780:
-	b	.L780
-.L779:
+.L782:
+	b	.L782
+.L781:
 	ldrh	r2, [r8, #8]
 	cmp	r2, fp
-	bne	.L781
+	bne	.L783
 	ldrh	r2, [r8]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L781
+	bne	.L783
 	ldr	r2, [r5, #3272]
 	mov	r1, r7
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L777:
+.L779:
 	adds	r6, r6, #1
-	b	.L776
-.L789:
+	b	.L778
+.L791:
 	.align	2
-.L788:
+.L790:
 	.word	.LANCHOR0
 	.word	.LC93
 	.word	.LANCHOR0+3264
@@ -5438,7 +5513,7 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L791
+	ldr	r5, .L793
 	muls	r4, r0, r4
 	ldr	r3, [r5, #2492]
 	addw	r0, r5, #3908
@@ -5453,9 +5528,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L792:
+.L794:
 	.align	2
-.L791:
+.L793:
 	.word	.LANCHOR0
 	.fnend
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -5473,7 +5548,7 @@ log2phys:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	mov	r7, r1
-	ldr	r4, .L807
+	ldr	r4, .L809
 	mov	r9, r2
 	ldrh	r5, [r4, #108]
 	adds	r3, r5, #7
@@ -5486,20 +5561,20 @@ log2phys:
 	ands	r5, r5, r0
 	cmp	r0, r3
 	uxth	r5, r5
-	bcc	.L794
+	bcc	.L796
 	movw	r2, #847
-	ldr	r1, .L807+4
-	ldr	r0, .L807+8
+	ldr	r1, .L809+4
+	ldr	r0, .L809+8
 	bl	sftl_printk
-.L794:
+.L796:
 	ldrh	r2, [r4, #138]
 	movs	r3, #0
 	ldr	r1, [r4, #2492]
 	mov	r10, #12
-.L795:
+.L797:
 	uxth	r6, r3
 	cmp	r6, r2
-	bcc	.L800
+	bcc	.L802
 	bl	select_l2p_ram_region
 	mul	r10, r10, r0
 	ldr	r3, [r4, #2492]
@@ -5508,44 +5583,44 @@ log2phys:
 	add	r2, r3, r10
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L801
+	beq	.L803
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L801
+	bge	.L803
 	bl	flush_l2p_region
-.L801:
+.L803:
 	mov	r1, r6
 	mov	r0, r8
 	bl	load_l2p_region
-	b	.L796
-.L800:
+	b	.L798
+.L802:
 	adds	r3, r3, #1
 	mla	r0, r10, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L795
-.L796:
+	bne	.L797
+.L798:
 	movs	r3, #12
 	cmp	r9, #0
-	bne	.L797
+	bne	.L799
 	ldr	r2, [r4, #2492]
 	mla	r3, r3, r6, r2
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r7]
-.L798:
+.L800:
 	ldr	r2, [r4, #2492]
 	movs	r3, #12
 	mla	r6, r3, r6, r2
 	ldr	r3, [r6, #4]
 	adds	r2, r3, #1
-	beq	.L804
+	beq	.L806
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
-.L804:
+.L806:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L797:
+.L799:
 	muls	r3, r6, r3
 	ldr	r2, [r4, #2492]
 	ldr	r1, [r7]
@@ -5558,10 +5633,10 @@ log2phys:
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	b	.L798
-.L808:
+	b	.L800
+.L810:
 	.align	2
-.L807:
+.L809:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+289
 	.word	.LC1
@@ -5582,41 +5657,41 @@ FtlReUsePrevPpa:
 	.save {r4, r5, r6, r7, lr}
 	.pad #12
 	mov	r6, r0
-	ldr	r5, .L819
+	ldr	r5, .L821
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5, #2324]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L810
+	cbnz	r3, .L812
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L811
+	cbz	r4, .L813
 	ldr	r1, [r5, #2316]
 	mov	ip, #6
-	ldr	r2, .L819+4
+	ldr	r2, .L821+4
 	movw	lr, #65535
 	ldrh	r0, [r5, #2344]
 	subs	r4, r4, r1
 	asrs	r4, r4, #1
 	muls	r4, r2, r4
 	uxth	r4, r4
-.L812:
+.L814:
 	uxth	r2, r3
 	cmp	r0, r2
-	bls	.L811
+	bls	.L813
 	cmp	r4, r7
-	bne	.L813
+	bne	.L815
 	mov	r1, r4
-	ldr	r0, .L819+8
+	ldr	r0, .L821+8
 	bl	List_remove_node
 	ldrh	r3, [r5, #2344]
-	cbnz	r3, .L814
+	cbnz	r3, .L816
 	movw	r2, #1737
-	ldr	r1, .L819+12
-	ldr	r0, .L819+16
+	ldr	r1, .L821+12
+	ldr	r0, .L821+16
 	bl	sftl_printk
-.L814:
+.L816:
 	ldrh	r3, [r5, #2344]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -5624,17 +5699,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5, #2324]
 	ldrh	r3, [r2, r7, lsl #1]
-.L810:
+.L812:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L811
-.L813:
+	b	.L813
+.L815:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, lr
-	bne	.L812
-.L811:
+	bne	.L814
+.L813:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -5642,9 +5717,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L820:
+.L822:
 	.align	2
-.L819:
+.L821:
 	.word	.LANCHOR0
 	.word	-1431655765
 	.word	.LANCHOR0+2340
@@ -5666,42 +5741,42 @@ ftl_scan_all_data:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r6, .L835
+	ldr	r6, .L837
 	.pad #32
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L835+16
+	ldr	r8, .L837+16
 	mov	r4, r6
-	ldr	r0, .L835+4
+	ldr	r0, .L837+4
 	bl	sftl_printk
-.L822:
+.L824:
 	ldr	r3, [r6, #2504]
 	cmp	r5, r3
-	bcc	.L828
+	bcc	.L830
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L828:
+.L830:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L823
+	cbnz	r3, .L825
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	sftl_printk
-.L823:
+.L825:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L825
+	beq	.L827
 	str	r3, [r4, #3268]
 	movs	r2, #0
 	ldr	r3, [r4, #3284]
 	movs	r1, #1
 	ldr	r7, [r4, #3288]
-	ldr	r0, .L835+8
+	ldr	r0, .L837+8
 	str	r3, [r4, #3272]
 	str	r5, [r4, #3280]
 	str	r7, [r4, #3276]
@@ -5709,16 +5784,16 @@ ftl_scan_all_data:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	cmp	r3, #256
-	beq	.L826
+	beq	.L828
 	adds	r3, r3, #1
-	beq	.L826
+	beq	.L828
 	ldr	r3, [r7, #8]
 	cmp	r5, r3
-	beq	.L825
-.L826:
+	beq	.L827
+.L828:
 	ldr	r2, [r4, #3272]
 	ldr	r3, [r4, #3276]
-	ldr	r0, .L835+12
+	ldr	r0, .L837+12
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -5733,12 +5808,12 @@ ftl_scan_all_data:
 	ldr	r3, [r3]
 	ldr	r2, [r4, #3268]
 	bl	sftl_printk
-.L825:
+.L827:
 	adds	r5, r5, #1
-	b	.L822
-.L836:
+	b	.L824
+.L838:
 	.align	2
-.L835:
+.L837:
 	.word	.LANCHOR0
 	.word	.LC94
 	.word	.LANCHOR0+3264
@@ -5757,7 +5832,7 @@ FtlReadRefresh:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L850
+	ldr	r3, .L852
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	.pad #88
@@ -5765,17 +5840,17 @@ FtlReadRefresh:
 	mov	r4, r3
 	ldr	r0, [r3, #2716]
 	cmp	r0, #0
-	beq	.L838
+	beq	.L840
 	ldr	r1, [r3, #2720]
 	ldr	r2, [r3, #2504]
 	cmp	r1, r2
-	bcs	.L839
+	bcs	.L841
 	mov	r5, #2048
-.L844:
+.L846:
 	ldr	r0, [r4, #2720]
 	ldr	r3, [r4, #2504]
 	cmp	r0, r3
-	bcs	.L841
+	bcs	.L843
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
@@ -5784,10 +5859,10 @@ FtlReadRefresh:
 	adds	r1, r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #2720]
-	beq	.L842
+	beq	.L844
 	str	r3, [sp, #20]
 	add	r0, sp, #88
-	ldr	r3, .L850+4
+	ldr	r3, .L852+4
 	movs	r1, #1
 	str	r2, [sp, #8]
 	movs	r2, #0
@@ -5798,54 +5873,54 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L841
+	bne	.L843
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L841:
+.L843:
 	mov	r0, #-1
-.L837:
+.L839:
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L842:
+.L844:
 	subs	r5, r5, #1
-	bne	.L844
-	b	.L841
-.L839:
+	bne	.L846
+	b	.L843
+.L841:
 	ldr	r2, [r3, #2508]
 	movs	r0, #0
 	str	r0, [r3, #2716]
 	str	r0, [r3, #2720]
 	str	r2, [r3, #2712]
-	b	.L837
-.L838:
+	b	.L839
+.L840:
 	ldr	r1, [r3, #2508]
 	ldr	r6, [r3, #2712]
 	add	r2, r1, #1048576
 	cmp	r6, r2
-	bhi	.L847
+	bhi	.L849
 	ldr	r2, [r3, #2564]
 	lsrs	r5, r2, #10
 	mov	r2, #33554432
 	asrs	r2, r2, r5
 	add	r2, r2, r6
 	cmp	r1, r2
-	bhi	.L847
+	bhi	.L849
 	ldrb	r3, [r3, #2296]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L837
-.L847:
+	bne	.L839
+.L849:
 	movs	r3, #1
 	movs	r0, #0
 	str	r3, [r4, #2716]
 	str	r0, [r4, #2720]
 	str	r1, [r4, #2712]
-	b	.L837
-.L851:
+	b	.L839
+.L853:
 	.align	2
-.L850:
+.L852:
 	.word	.LANCHOR0
 	.word	ftl_temp_buf
 	.fnend
@@ -5865,112 +5940,112 @@ ftl_check_vpc:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r4, #0
-	ldr	r6, .L876
-	ldr	r7, .L876+4
-	ldr	r1, .L876+8
+	ldr	r6, .L878
+	ldr	r7, .L878+4
+	ldr	r1, .L878+8
 	mov	r5, r6
-	ldr	r0, .L876+12
+	ldr	r0, .L878+12
 	bl	sftl_printk
 	mov	r1, #8192
-	ldr	r0, .L876+4
+	ldr	r0, .L878+4
 	bl	__memzero
-.L853:
+.L855:
 	ldr	r3, [r6, #2504]
 	cmp	r4, r3
-	bcc	.L855
-	ldr	r8, .L876+4
+	bcc	.L857
+	ldr	r8, .L878+4
 	movs	r4, #0
-	ldr	r10, .L876+24
+	ldr	r10, .L878+24
 	mov	r7, r4
 	movw	r9, #65535
-.L856:
+.L858:
 	ldrh	r2, [r5, #40]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L858
+	bhi	.L860
 	ldr	r4, [r5, #2340]
-	cbz	r4, .L859
+	cbz	r4, .L861
 	ldr	r3, [r5, #2316]
 	movs	r6, #0
 	ldrh	r8, [r5, #2344]
 	mov	fp, #6
-	ldr	r9, .L876+4
+	ldr	r9, .L878+4
 	subs	r4, r4, r3
-	ldr	r3, .L876+16
+	ldr	r3, .L878+16
 	asrs	r4, r4, #1
-	ldr	r10, .L876+28
+	ldr	r10, .L878+28
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L860:
+.L862:
 	uxth	r3, r6
 	cmp	r8, r3
-	bls	.L859
+	bls	.L861
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L861
+	cbz	r2, .L863
 	movs	r7, #1
 	ldrh	r3, [r9, r4, lsl #1]
 	mov	r1, r4
 	mov	r0, r10
 	bl	sftl_printk
-.L861:
+.L863:
 	mul	r4, fp, r4
 	ldr	r3, [r5, #2316]
 	adds	r6, r6, #1
 	ldrh	r4, [r3, r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L860
-.L859:
-	cbz	r7, .L852
+	bne	.L862
+.L861:
+	cbz	r7, .L854
 	movw	r2, #2373
-	ldr	r1, .L876+8
-	ldr	r0, .L876+20
+	ldr	r1, .L878+8
+	ldr	r0, .L878+20
 	bl	sftl_printk
-.L852:
+.L854:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L855:
+.L857:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L854
+	beq	.L856
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r7, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r7, r0, lsl #1]	@ movhi
-.L854:
+.L856:
 	adds	r4, r4, #1
-	b	.L853
-.L858:
+	b	.L855
+.L860:
 	ldr	r3, [r5, #2324]
 	uxth	r6, r4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L857
+	beq	.L859
 	mov	r1, r6
 	mov	r0, r10
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r9
-	beq	.L857
+	beq	.L859
 	ldrh	r2, [r8, r6, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r7, #1
-.L857:
+.L859:
 	adds	r4, r4, #1
-	b	.L856
-.L877:
+	b	.L858
+.L879:
 	.align	2
-.L876:
+.L878:
 	.word	.LANCHOR0
 	.word	check_vpc_table
 	.word	.LANCHOR1+314
@@ -5996,10 +6071,10 @@ FtlMapBlkWriteDump_data:
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
 	ldr	r3, [r0, #36]
-	cbz	r3, .L878
+	cbz	r3, .L880
 	ldrh	r5, [r0, #6]
 	movs	r3, #0
-	ldr	r4, .L882
+	ldr	r4, .L884
 	ldr	r2, [r0, #24]
 	str	r3, [r0, #36]
 	subs	r5, r5, #1
@@ -6010,27 +6085,27 @@ FtlMapBlkWriteDump_data:
 	str	r1, [r4, #3276]
 	ldr	r2, [r2, r5, lsl #2]
 	str	r2, [r4, #3268]
-	cbz	r2, .L880
+	cbz	r2, .L882
 	movs	r2, #1
 	add	r0, r4, #3264
 	mov	r1, r2
 	bl	FlashReadPages
-.L881:
+.L883:
 	ldr	r2, [r4, #3272]
 	mov	r1, r5
 	mov	r0, r6
 	pop	{r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L880:
+.L882:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L881
-.L878:
+	b	.L883
+.L880:
 	pop	{r4, r5, r6, pc}
-.L883:
+.L885:
 	.align	2
-.L882:
+.L884:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
@@ -6048,7 +6123,7 @@ FtlScanSysBlk:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r5, #0
-	ldr	r4, .L965
+	ldr	r4, .L967
 	mov	r1, r5
 	.pad #20
 	sub	sp, sp, #20
@@ -6078,10 +6153,10 @@ FtlScanSysBlk:
 	str	r3, [r4, #2576]
 	str	r3, [r4, #2580]
 	str	r3, [r4, #2584]
-.L885:
+.L887:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r8
-	bls	.L927
+	bls	.L929
 	movs	r5, #0
 	ldrh	fp, [r4, #32]
 	ldr	r9, [r4, #3836]
@@ -6090,11 +6165,11 @@ FtlScanSysBlk:
 	mov	r10, #20
 	ldr	r2, [r4, #3176]
 	ldrh	r6, [r4, #112]
-	b	.L928
-.L888:
+	b	.L930
+.L890:
 	str	r3, [sp, #8]
 	mov	r1, r8
-	ldr	r3, .L965+4
+	ldr	r3, .L967+4
 	str	r2, [sp, #12]
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	V2P_block
@@ -6102,7 +6177,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L886
+	cbnz	r0, .L888
 	ldr	r1, [sp, #4]
 	mla	r0, r10, r7, r9
 	lsls	r1, r1, #10
@@ -6117,27 +6192,27 @@ FtlScanSysBlk:
 	bic	r1, r1, #3
 	add	r1, r1, r2
 	str	r1, [r0, #12]
-.L886:
+.L888:
 	adds	r5, r5, #1
-.L928:
+.L930:
 	uxth	r1, r5
 	cmp	fp, r1
-	bhi	.L888
-	cbnz	r7, .L889
-.L926:
+	bhi	.L890
+	cbnz	r7, .L891
+.L928:
 	add	r8, r8, #1
 	uxth	r8, r8
-	b	.L885
-.L889:
+	b	.L887
+.L891:
 	mov	r0, r9
 	mov	r9, #0
 	movs	r2, #1
 	mov	r1, r7
 	bl	FlashReadPages
-.L890:
+.L892:
 	uxth	r3, r9
 	cmp	r7, r3
-	bls	.L926
+	bls	.L928
 	movs	r3, #20
 	mul	r10, r3, r9
 	ldr	r3, [r4, #3836]
@@ -6147,10 +6222,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L893
+	bne	.L895
 	mov	fp, #16
 	movw	r3, #65535
-.L895:
+.L897:
 	ldr	r0, [r4, #3836]
 	str	r3, [sp, #4]
 	add	r0, r0, r10
@@ -6163,71 +6238,71 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
-	bne	.L892
+	bne	.L894
 	ldr	r3, [r4, #3836]
 	mov	r2, #-1
 	str	r2, [r3, r10]
 	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r10]
 	cmp	r3, r2
-	bne	.L893
-.L894:
+	bne	.L895
+.L896:
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L898
-.L892:
+	b	.L900
+.L894:
 	ldr	r2, [r4, #3836]
 	ldr	r2, [r2, r10]
 	adds	r2, r2, #1
-	bne	.L893
+	bne	.L895
 	add	fp, fp, #-1
 	uxth	fp, fp
 	cmp	fp, #0
-	bne	.L895
-	b	.L894
-.L893:
+	bne	.L897
+	b	.L896
+.L895:
 	ldr	r2, [r4, #2540]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L896
+	beq	.L898
 	cmp	r2, r3
-	bhi	.L897
-.L896:
+	bhi	.L899
+.L898:
 	adds	r2, r3, #1
 	itt	ne
 	addne	r2, r3, #1
 	strne	r2, [r4, #2540]
-.L897:
+.L899:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L899
-	bhi	.L900
+	beq	.L901
+	bhi	.L902
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L901
-.L898:
-	add	r9, r9, #1
-	b	.L890
+	beq	.L903
 .L900:
+	add	r9, r9, #1
+	b	.L892
+.L902:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L902
+	beq	.L904
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L894
-	b	.L898
-.L902:
+	beq	.L896
+	b	.L900
+.L904:
 	ldrh	r2, [r4, #3952]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L904
+	bls	.L906
 	mov	r2, #1256
-	ldr	r1, .L965+8
-	ldr	r0, .L965+12
+	ldr	r1, .L967+8
+	ldr	r0, .L967+12
 	bl	sftl_printk
-.L904:
+.L906:
 	ldr	r1, [r4, #128]
 	ldrh	r0, [r4, #3952]
 	ldr	r10, [r4, #3896]
@@ -6237,58 +6312,58 @@ FtlScanSysBlk:
 	add	ip, ip, #-1
 	sxth	r3, r3
 	sxth	ip, ip
-.L905:
+.L907:
 	cmp	r3, ip
-	bgt	.L911
+	bgt	.L913
 	cmp	r3, #0
-	bge	.L943
-	b	.L898
-.L911:
+	bge	.L945
+	b	.L900
+.L913:
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	mov	lr, r2
 	ldr	r2, [r10, r3, lsl #2]
 	cmp	lr, r2
-	bls	.L906
+	bls	.L908
 	ldr	r2, [r10]
-	cbnz	r2, .L907
+	cbnz	r2, .L909
 	cmp	r1, r0
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #3952]	@ movhi
-.L907:
+.L909:
 	uxth	ip, r3
 	movs	r2, #0
-.L908:
+.L910:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L909
+	bhi	.L911
 	ldr	r2, [r4, #3896]
 	cmp	r3, #0
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
 	ldr	r2, [r4, #3872]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	blt	.L898
+	blt	.L900
 	ldrh	r0, [r4, #3952]
 	ldr	r2, [r4, #128]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L898
-.L943:
+	bgt	.L900
+.L945:
 	ldr	r2, [r4, #3896]
 	adds	r0, r0, #1
 	ldr	r1, [r6, #4]
 	strh	r0, [r4, #3952]	@ movhi
 	str	r1, [r2, r3, lsl #2]
 	ldr	r2, [r4, #3872]
-.L963:
+.L965:
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L898
-.L909:
+	b	.L900
+.L911:
 	ldr	r0, [r4, #3896]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
@@ -6298,79 +6373,79 @@ FtlScanSysBlk:
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L908
-.L906:
+	b	.L910
+.L908:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L905
-.L966:
+	b	.L907
+.L968:
 	.align	2
-.L965:
+.L967:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+60
 	.word	.LANCHOR1+328
 	.word	.LC1
-.L901:
+.L903:
 	ldrh	r2, [r4, #144]
 	ldrh	r3, [r4, #120]
 	cmp	r2, r3
-	bls	.L914
+	bls	.L916
 	movw	r2, #1297
-	ldr	r1, .L967
-	ldr	r0, .L967+4
+	ldr	r1, .L969
+	ldr	r0, .L969+4
 	bl	sftl_printk
-.L914:
+.L916:
 	ldrh	lr, [r4, #120]
 	ldrh	r0, [r4, #144]
 	ldr	r10, [r4, #3884]
 	add	ip, lr, #-1
 	sxth	r3, ip
 	sub	ip, ip, r0
-.L915:
+.L917:
 	cmp	r3, ip
-	ble	.L920
+	ble	.L922
 	ldr	r2, [r6, #4]
 	lsl	fp, r3, #2
 	ldr	r1, [r10, r3, lsl #2]
 	cmp	r2, r1
-	bls	.L916
+	bls	.L918
 	ldr	r2, [r10]
-	cbnz	r2, .L917
+	cbnz	r2, .L919
 	cmp	lr, r0
 	itt	ne
 	addne	r0, r0, #1
 	strhne	r0, [r4, #144]	@ movhi
-.L917:
+.L919:
 	uxth	ip, r3
 	movs	r2, #0
-.L918:
+.L920:
 	uxth	r0, r2
 	sxth	r1, r2
 	cmp	ip, r0
-	bhi	.L919
+	bhi	.L921
 	ldr	r2, [r4, #3884]
 	ldr	r1, [r6, #4]
 	str	r1, [r2, fp]
 	ldr	r2, [r4, #148]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-.L920:
+.L922:
 	cmp	r3, #0
-	blt	.L898
+	blt	.L900
 	ldrh	r2, [r4, #120]
 	ldrh	r1, [r4, #144]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L898
+	bgt	.L900
 	adds	r1, r1, #1
 	ldr	r2, [r4, #3884]
 	strh	r1, [r4, #144]	@ movhi
 	ldr	r1, [r6, #4]
 	str	r1, [r2, r3, lsl #2]
 	ldr	r2, [r4, #148]
-	b	.L963
-.L919:
+	b	.L965
+.L921:
 	ldr	r0, [r4, #3884]
 	adds	r2, r2, #1
 	add	lr, r0, r1, lsl #2
@@ -6380,81 +6455,81 @@ FtlScanSysBlk:
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L918
-.L916:
+	b	.L920
+.L918:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L915
-.L899:
+	b	.L917
+.L901:
 	ldrh	r1, [r4, #2576]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L922
+	bne	.L924
 	strh	r5, [r4, #2576]	@ movhi
-.L964:
+.L966:
 	str	r3, [r4, #2584]
-	b	.L898
-.L922:
+	b	.L900
+.L924:
 	ldrh	r0, [r4, #2580]
 	cmp	r0, r2
-	beq	.L923
+	beq	.L925
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L923:
+.L925:
 	ldr	r2, [r4, #2584]
 	ldr	r3, [r6, #4]
 	cmp	r2, r3
-	bcs	.L924
+	bcs	.L926
 	ldrh	r3, [r4, #2576]
 	strh	r5, [r4, #2576]	@ movhi
 	strh	r3, [r4, #2580]	@ movhi
 	ldr	r3, [r6, #4]
-	b	.L964
-.L924:
+	b	.L966
+.L926:
 	strh	r5, [r4, #2580]	@ movhi
-	b	.L898
-.L927:
+	b	.L900
+.L929:
 	ldr	r1, [r4, #3872]
 	ldrh	r3, [r1]
-	cbz	r3, .L929
-.L932:
+	cbz	r3, .L931
+.L934:
 	ldr	r1, [r4, #148]
 	ldrh	r2, [r1]
 	cmp	r2, #0
-	beq	.L930
-.L931:
+	beq	.L932
+.L933:
 	ldrh	r2, [r4, #3952]
 	ldr	r3, [r4, #128]
 	cmp	r2, r3
-	bls	.L962
+	bls	.L964
 	movw	r2, #1422
-	ldr	r1, .L967
-	ldr	r0, .L967+4
+	ldr	r1, .L969
+	ldr	r0, .L969+4
 	bl	sftl_printk
-.L962:
+.L964:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L929:
+.L931:
 	ldrh	r2, [r4, #3952]
 	cmp	r2, #0
-	beq	.L932
+	beq	.L934
 	ldr	r0, [r4, #128]
-.L933:
+.L935:
 	sxth	r2, r3
 	cmp	r2, r0
-	bcs	.L932
+	bcs	.L934
 	ldrh	r5, [r1, r2, lsl #1]
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L933
+	beq	.L935
 	mov	r3, r2
 	movs	r5, #0
-.L934:
+.L936:
 	ldr	r1, [r4, #128]
 	cmp	r3, r1
-	bcs	.L932
+	bcs	.L934
 	ldr	r1, [r4, #3872]
 	subs	r0, r3, r2
 	ldrh	r6, [r1, r3, lsl #1]
@@ -6466,26 +6541,26 @@ FtlScanSysBlk:
 	strh	r5, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L934
-.L930:
+	b	.L936
+.L932:
 	ldrh	r3, [r4, #144]
 	cmp	r3, #0
-	beq	.L931
+	beq	.L933
 	ldrh	r0, [r4, #120]
-.L939:
+.L941:
 	sxth	r3, r2
 	cmp	r3, r0
 	mov	r5, r3
-	bge	.L931
+	bge	.L933
 	ldrh	r6, [r1, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r6, #0
-	beq	.L939
+	beq	.L941
 	movs	r0, #0
-.L940:
+.L942:
 	ldrh	r2, [r4, #120]
 	cmp	r3, r2
-	bge	.L931
+	bge	.L933
 	ldr	r2, [r4, #148]
 	subs	r1, r3, r5
 	ldrh	r6, [r2, r3, lsl #1]
@@ -6497,10 +6572,10 @@ FtlScanSysBlk:
 	strh	r0, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L940
-.L968:
+	b	.L942
+.L970:
 	.align	2
-.L967:
+.L969:
 	.word	.LANCHOR1+328
 	.word	.LC1
 	.fnend
@@ -6526,7 +6601,7 @@ FtlMapTblRecovery:
 	ldrh	r10, [r0, #6]
 	str	r3, [sp, #4]
 	ldr	r3, [r0, #16]
-	ldr	r5, .L994
+	ldr	r5, .L996
 	ldr	r9, [r0, #12]
 	lsl	r2, r10, #2
 	str	r3, [sp, #12]
@@ -6550,14 +6625,14 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #8]
 	add	fp, r3, #-1
 	mov	r3, r5
-.L970:
+.L972:
 	ldr	r1, [sp, #8]
 	sxth	r2, r8
 	cmp	r2, r1
-	bge	.L988
+	bge	.L990
 	cmp	r2, fp
 	lsl	r7, r2, #1
-	bne	.L971
+	bne	.L973
 	ldrh	r0, [r9, fp, lsl #1]
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
@@ -6565,27 +6640,27 @@ FtlMapTblRecovery:
 	add	r7, r7, r9
 	strh	r8, [r4]	@ movhi
 	sxth	r9, r0
-	ldr	r8, .L994+4
+	ldr	r8, .L996+4
 	adds	r0, r0, #1
 	strh	r0, [r4, #2]	@ movhi
 	add	r9, r9, #1
 	ldr	r3, [r3, fp, lsl #2]
 	mov	fp, #0
 	str	r3, [r4, #28]
-.L972:
+.L974:
 	sxth	r2, fp
 	cmp	r2, r9
-	blt	.L975
-.L988:
+	blt	.L977
+.L990:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5, #104]
 	cmp	r2, r3
-	bne	.L977
+	bne	.L979
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L977:
+.L979:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6594,7 +6669,7 @@ FtlMapTblRecovery:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L975:
+.L977:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	orr	r2, r2, r1, lsl #10
@@ -6604,29 +6679,29 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5, #3264]
 	adds	r2, r2, #1
-	beq	.L973
+	beq	.L975
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L974
+	bls	.L976
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L974
+	bne	.L976
 	ldr	r1, [r5, #3268]
 	ldr	r3, [sp, #4]
 	str	r1, [r3, r2, lsl #2]
-.L974:
+.L976:
 	add	fp, fp, #1
-	b	.L972
-.L973:
+	b	.L974
+.L975:
 	ldrh	r2, [r7]
 	strh	r2, [r4, #40]	@ movhi
-	b	.L974
-.L971:
+	b	.L976
+.L973:
 	ldr	r1, [r5, #3284]
 	str	r3, [sp, #20]
 	add	r3, r9, r7
-	ldr	r0, .L994+4
+	ldr	r0, .L996+4
 	str	r1, [r5, #3272]
 	ldrh	r1, [r9, r2, lsl #1]
 	ldrh	r2, [r5, #104]
@@ -6640,24 +6715,24 @@ FtlMapTblRecovery:
 	ldr	r2, [r5, #3264]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L990
+	beq	.L992
 	ldrh	r1, [r6]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L990
+	bne	.L992
 	ldrh	r1, [r6, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L979
-.L990:
+	beq	.L981
+.L992:
 	movs	r7, #0
-.L980:
+.L982:
 	ldrh	r1, [r3, #104]
 	sxth	r2, r7
 	cmp	r2, r1
-	bge	.L986
+	bge	.L988
 	ldr	r1, [sp, #16]
-	ldr	r0, .L994+4
+	ldr	r0, .L996+4
 	str	r3, [sp, #20]
 	ldrh	r1, [r1]
 	orr	r2, r2, r1, lsl #10
@@ -6668,10 +6743,10 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #20]
 	ldr	r2, [r3, #3264]
 	adds	r2, r2, #1
-	beq	.L984
+	beq	.L986
 	ldrh	r2, [r6, #8]
 	cmp	r10, r2
-	bls	.L984
+	bls	.L986
 	ldrh	r0, [r6]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
@@ -6679,37 +6754,37 @@ FtlMapTblRecovery:
 	ldreq	r1, [r3, #3268]
 	ldreq	r0, [sp, #4]
 	streq	r1, [r0, r2, lsl #2]
-.L984:
+.L986:
 	adds	r7, r7, #1
-	b	.L980
-.L979:
+	b	.L982
+.L981:
 	movs	r0, #0
 	mov	ip, #4
-.L981:
+.L983:
 	ldrh	r1, [r5, #104]
 	sxth	r2, r0
 	subs	r1, r1, #1
 	cmp	r2, r1
-	blt	.L983
-.L986:
+	blt	.L985
+.L988:
 	add	r8, r8, #1
-	b	.L970
-.L983:
+	b	.L972
+.L985:
 	ldr	r7, [r5, #3284]
 	ldr	r1, [r7, r2, lsl #3]
 	uxth	lr, r1
 	cmp	r10, lr
-	bls	.L982
+	bls	.L984
 	add	r2, ip, r2, lsl #3
 	ldr	r2, [r7, r2]
 	ldr	r7, [sp, #4]
 	str	r2, [r7, lr, lsl #2]
-.L982:
+.L984:
 	adds	r0, r0, #1
-	b	.L981
-.L995:
+	b	.L983
+.L997:
 	.align	2
-.L994:
+.L996:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3264
 	.fnend
@@ -6725,7 +6800,7 @@ FtlLoadVonderInfo:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L997
+	ldr	r0, .L999
 	push	{r3, lr}
 	.save {r3, lr}
 	ldrh	r3, [r0, #120]
@@ -6750,9 +6825,9 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L998:
+.L1000:
 	.align	2
-.L997:
+.L999:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
@@ -6770,7 +6845,7 @@ FtlL2PDataInit:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L1002
+	ldr	r4, .L1004
 	movs	r6, #12
 	ldr	r2, [r4, #128]
 	ldr	r0, [r4, #3876]
@@ -6786,12 +6861,12 @@ FtlL2PDataInit:
 	mov	r3, r4
 	movw	r1, #65535
 	mov	r7, r2
-.L1000:
+.L1002:
 	ldrh	r4, [r3, #138]
 	uxth	r0, r2
 	adds	r5, r2, #1
 	cmp	r4, r0
-	bhi	.L1001
+	bhi	.L1003
 	ldr	r2, [r3, #128]
 	strh	r1, [r3, #3910]	@ movhi
 	strh	r1, [r3, #3908]	@ movhi
@@ -6812,7 +6887,7 @@ FtlL2PDataInit:
 	ldr	r2, [r3, #3892]
 	str	r2, [r3, #3932]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1001:
+.L1003:
 	uxth	r2, r2
 	ldr	r0, [r3, #2492]
 	mul	r4, r6, r2
@@ -6828,10 +6903,10 @@ FtlL2PDataInit:
 	add	r2, r2, r4
 	str	r2, [r0, #8]
 	mov	r2, r5
-	b	.L1000
-.L1003:
+	b	.L1002
+.L1005:
 	.align	2
-.L1002:
+.L1004:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -6849,13 +6924,13 @@ FtlLoadMapInfo:
 	push	{r3, lr}
 	.save {r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1005
+	ldr	r0, .L1007
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1006:
+.L1008:
 	.align	2
-.L1005:
+.L1007:
 	.word	.LANCHOR0+3908
 	.fnend
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
@@ -6873,7 +6948,7 @@ FtlVariablesInit:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r5, #0
-	ldr	r4, .L1008
+	ldr	r4, .L1010
 	movw	r3, #65535
 	mov	r1, r5
 	ldrh	r2, [r4, #120]
@@ -6906,9 +6981,9 @@ FtlVariablesInit:
 	bl	FtlL2PDataInit
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L1009:
+.L1011:
 	.align	2
-.L1008:
+.L1010:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -6926,7 +7001,7 @@ SupperBlkListInit:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r5, #0
-	ldr	r4, .L1021
+	ldr	r4, .L1023
 	movs	r2, #6
 	mov	r9, r5
 	mov	r6, r5
@@ -6944,18 +7019,18 @@ SupperBlkListInit:
 	str	r5, [r4, #2332]
 	strh	r5, [r4, #2336]	@ movhi
 	strh	r5, [r4, #2344]	@ movhi
-.L1011:
+.L1013:
 	ldrh	r3, [r4, #40]
 	uxth	r8, r5
 	cmp	r8, r3
-	bcs	.L1018
+	bcs	.L1020
 	ldrh	r3, [r4, #102]
 	ldrh	r2, [r4, #32]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r7, r3
-	b	.L1019
-.L1013:
+	b	.L1021
+.L1015:
 	ldrb	r0, [r10, r3]	@ zero_extendqisi2
 	mov	r1, r8
 	str	r2, [sp, #12]
@@ -6964,76 +7039,76 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L1012
+	cbnz	r0, .L1014
 	ldr	r1, [sp, #4]
 	add	r7, r7, r1
 	uxth	r7, r7
-.L1012:
+.L1014:
 	adds	r3, r3, #1
-.L1019:
+.L1021:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L1013
+	bhi	.L1015
 	uxth	r3, r5
-	cbz	r7, .L1014
+	cbz	r7, .L1016
 	mov	r1, r7
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	uxth	r7, r0
-.L1015:
+.L1017:
 	ldr	r1, [r4, #2316]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r7, [r2, #4]	@ movhi
 	ldrh	r2, [r4, #2348]
 	cmp	r2, r8
-	beq	.L1016
+	beq	.L1018
 	ldrh	r2, [r4, #2396]
 	cmp	r2, r8
-	beq	.L1016
+	beq	.L1018
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r8
-	beq	.L1016
+	beq	.L1018
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1017
+	cbnz	r3, .L1019
 	add	r9, r9, #1
 	mov	r0, r8
 	uxth	r9, r9
 	bl	INSERT_FREE_LIST
-.L1016:
+.L1018:
 	adds	r5, r5, #1
-	b	.L1011
-.L1014:
+	b	.L1013
+.L1016:
 	ldr	r2, [r4, #2324]
 	strh	fp, [r2, r3, lsl #1]	@ movhi
-	b	.L1015
-.L1017:
+	b	.L1017
+.L1019:
 	adds	r6, r6, #1
 	mov	r0, r8
 	uxth	r6, r6
 	bl	INSERT_DATA_LIST
-	b	.L1016
-.L1018:
+	b	.L1018
+.L1020:
 	strh	r6, [r4, #2336]	@ movhi
 	add	r6, r6, r9
 	cmp	r6, r3
 	strh	r9, [r4, #2344]	@ movhi
-	ble	.L1020
+	ble	.L1022
 	movw	r2, #2206
-	ldr	r1, .L1021+4
-	ldr	r0, .L1021+8
+	ldr	r1, .L1023+4
+	ldr	r0, .L1023+8
 	bl	sftl_printk
-.L1020:
+.L1022:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1022:
+.L1024:
 	.align	2
-.L1021:
+.L1023:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+342
 	.word	.LC1
@@ -7053,7 +7128,7 @@ FtlGcPageVarInit:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r3, #0
-	ldr	r4, .L1024
+	ldr	r4, .L1026
 	movs	r1, #255
 	ldrh	r2, [r4, #106]
 	ldr	r0, [r4, #3188]
@@ -7069,9 +7144,9 @@ FtlGcPageVarInit:
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L1025:
+.L1027:
 	.align	2
-.L1024:
+.L1026:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -7086,7 +7161,7 @@ FtlGcScanTempBlk:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1051
+	ldr	r3, .L1053
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #28
@@ -7096,30 +7171,30 @@ FtlGcScanTempBlk:
 	ldrh	r4, [r3, #4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1045
-	cbnz	r4, .L1027
-.L1028:
+	beq	.L1047
+	cbnz	r4, .L1029
+.L1030:
 	bl	FtlGcPageVarInit
-	b	.L1029
-.L1045:
+	b	.L1031
+.L1047:
 	movs	r4, #0
-.L1027:
-	ldr	r3, .L1051+4
+.L1029:
+	ldr	r3, .L1053+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3, #102]
 	cmp	r3, r2
-	beq	.L1028
-.L1029:
+	beq	.L1030
+.L1031:
 	mov	fp, #0
 	movw	r8, #65535
-.L1039:
+.L1041:
 	ldrh	r3, [r7]
 	movs	r0, #0
 	strb	r0, [r7, #8]
 	cmp	r3, r8
-	beq	.L1030
-	ldr	r5, .L1051+4
-.L1042:
+	beq	.L1032
+	ldr	r5, .L1053+4
+.L1044:
 	ldr	r3, [r5, #3836]
 	movs	r2, #0
 	ldrh	ip, [r5, #32]
@@ -7134,35 +7209,35 @@ FtlGcScanTempBlk:
 	str	r3, [sp, #16]
 	ldrh	r3, [r5, #112]
 	str	r3, [sp, #20]
-.L1031:
+.L1033:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1035
+	bhi	.L1037
 	mov	r9, #0
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.L1036:
+.L1038:
 	uxth	r3, r9
 	cmp	r6, r3
-	bhi	.L1040
+	bhi	.L1042
 	ldr	r3, [sp, #8]
 	add	fp, fp, #1
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, fp
-	bls	.L1041
-.L1043:
+	bls	.L1043
+.L1045:
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bhi	.L1042
+	bhi	.L1044
 	movs	r0, #0
-	b	.L1030
-.L1035:
+	b	.L1032
+.L1037:
 	ldrh	r3, [lr], #2
 	cmp	r3, r8
-	beq	.L1032
+	beq	.L1034
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
 	mla	r1, r9, r6, r1
@@ -7185,10 +7260,10 @@ FtlGcScanTempBlk:
 	str	r0, [r1, #8]
 	add	r3, r3, r10
 	str	r3, [r1, #12]
-.L1032:
+.L1034:
 	adds	r2, r2, #1
-	b	.L1031
-.L1040:
+	b	.L1033
+.L1042:
 	movs	r3, #20
 	ldr	r2, [r5, #3836]
 	mul	r10, r3, r9
@@ -7201,18 +7276,18 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L1037
+	cbnz	r2, .L1039
 	ldr	r3, [sp, #12]
 	add	r9, r9, #1
 	ldr	r1, [sp, #4]
 	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
 	cmp	r2, r8
-	bne	.L1038
+	bne	.L1040
 	movs	r3, #1
 	str	r3, [r5, #4008]
-.L1030:
-	ldr	r3, .L1051
+.L1032:
+	ldr	r3, .L1053
 	movw	r2, #65535
 	strb	r0, [r7, #6]
 	mov	r1, r4
@@ -7221,13 +7296,13 @@ FtlGcScanTempBlk:
 	mov	r2, r0
 	mov	r0, r7
 	bl	ftl_sb_update_avl_pages
-	b	.L1044
-.L1038:
+	b	.L1046
+.L1040:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1036
-.L1037:
+	b	.L1038
+.L1039:
 	ldrh	r2, [r7]
 	movs	r4, #0
 	ldr	r3, [r5, #2324]
@@ -7236,25 +7311,25 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	strh	r8, [r7]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1039
-.L1041:
-	ldr	r2, .L1051
+	b	.L1041
+.L1043:
+	ldr	r2, .L1053
 	ldrh	r3, [r2, #4]
 	cmp	r3, r8
-	beq	.L1043
+	beq	.L1045
 	add	r3, r3, fp
 	strh	r3, [r2, #4]	@ movhi
 	ldrh	r3, [r5, #102]
 	cmp	r3, r4
-	bls	.L1043
-.L1044:
+	bls	.L1045
+.L1046:
 	mov	r0, #-1
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1052:
+.L1054:
 	.align	2
-.L1051:
+.L1053:
 	.word	.LANCHOR2
 	.word	.LANCHOR0
 	.fnend
@@ -7289,7 +7364,7 @@ FtlBbmTblFlush:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movs	r5, #0
-	ldr	r4, .L1063
+	ldr	r4, .L1065
 	movs	r1, #0
 	ldr	r0, [r4, #3284]
 	add	r6, r4, #176
@@ -7298,18 +7373,18 @@ FtlBbmTblFlush:
 	str	r0, [r4, #3272]
 	str	r3, [r4, #3276]
 	bl	ftl_memset
-.L1055:
+.L1057:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	blt	.L1056
+	blt	.L1058
 	ldr	r6, [r4, #3276]
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r9, .L1063+12
-	ldr	r8, .L1063+4
+	ldr	r9, .L1065+12
+	ldr	r8, .L1065+4
 	movs	r5, #0
 	mov	r0, r6
-	ldr	r10, .L1063+16
+	ldr	r10, .L1065+16
 	bl	memset
 	movw	r3, #61649
 	mov	r7, r5
@@ -7324,7 +7399,7 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #10]	@ movhi
 	ldr	r3, [r4, #28]
 	strh	r3, [r6, #12]	@ movhi
-.L1057:
+.L1059:
 	ldr	r3, [r4, #3284]
 	mov	fp, #0
 	ldrh	r1, [r4, #152]
@@ -7341,7 +7416,7 @@ FtlBbmTblFlush:
 	mov	r0, r9
 	bl	sftl_printk
 	movs	r3, #1
-	ldr	r0, .L1063+4
+	ldr	r0, .L1065+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -7349,7 +7424,7 @@ FtlBbmTblFlush:
 	ldrh	r2, [r4, #154]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1058
+	blt	.L1060
 	ldr	r3, [r4, #160]
 	ldrh	r2, [r4, #152]
 	ldr	r0, [r4, #3804]
@@ -7372,27 +7447,27 @@ FtlBbmTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1058:
+.L1060:
 	ldrh	r3, [r4, #154]
 	adds	r3, r3, #1
 	strh	r3, [r4, #154]	@ movhi
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	bne	.L1059
+	bne	.L1061
 	adds	r5, r5, #1
 	ldr	r1, [r4, #3268]
 	uxth	r5, r5
 	mov	r0, r10
 	bl	sftl_printk
 	cmp	r5, #3
-	bls	.L1057
+	bls	.L1059
 	mov	r2, r5
 	ldr	r1, [r4, #3268]
-	ldr	r0, .L1063+8
+	ldr	r0, .L1065+8
 	bl	sftl_printk
-.L1061:
-	b	.L1061
-.L1056:
+.L1063:
+	b	.L1063
+.L1058:
 	ldrh	r2, [r4, #3904]
 	ldr	r3, [r4, #3272]
 	ldr	r1, [r6, #4]!
@@ -7401,20 +7476,20 @@ FtlBbmTblFlush:
 	adds	r5, r5, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1055
-.L1062:
-	movs	r7, #1
 	b	.L1057
-.L1059:
+.L1064:
+	movs	r7, #1
+	b	.L1059
+.L1061:
 	cmp	r7, #0
-	beq	.L1062
+	beq	.L1064
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1064:
+.L1066:
 	.align	2
-.L1063:
+.L1065:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3264
 	.word	.LC102
@@ -7436,28 +7511,28 @@ allocate_data_superblock:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r5, r0
-	ldr	r4, .L1100
+	ldr	r4, .L1102
 	.pad #20
 	sub	sp, sp, #20
-	ldr	r9, .L1100+20
-.L1066:
-	ldr	r3, .L1100
-	ldr	r2, .L1100
+	ldr	r9, .L1102+20
+.L1068:
+	ldr	r3, .L1102
+	ldr	r2, .L1102
 	ldrh	r3, [r3, #2344]
 	ldrh	r2, [r2, #2336]
 	add	r3, r3, r2
-	ldr	r2, .L1100
+	ldr	r2, .L1102
 	ldrh	r2, [r2, #40]
 	cmp	r3, r2
-	ble	.L1067
+	ble	.L1069
 	movw	r2, #2654
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1067:
-	ldr	r3, .L1100+8
+.L1069:
+	ldr	r3, .L1102+8
 	cmp	r5, r3
-	bne	.L1092
+	bne	.L1094
 	ldrh	r3, [r4, #2344]
 	ldr	r1, [r4, #3160]
 	mul	r2, r1, r3
@@ -7465,21 +7540,21 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L1068
+	cbz	r1, .L1070
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1068:
-	ldr	r0, .L1100+12
+.L1070:
+	ldr	r0, .L1102+12
 	bl	List_pop_index_node
 	ldrh	r3, [r4, #2344]
 	mov	r6, r0
 	uxth	r8, r0
-	cbnz	r3, .L1069
+	cbnz	r3, .L1071
 	movw	r2, #2663
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1069:
+.L1071:
 	ldrh	r3, [r4, #2344]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7487,7 +7562,7 @@ allocate_data_superblock:
 	strh	r8, [r5]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1070
+	cbnz	r3, .L1072
 	ldr	r3, [r4, #2324]
 	uxth	r6, r6
 	movw	r2, #65535
@@ -7499,27 +7574,27 @@ allocate_data_superblock:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1066
+	ble	.L1068
 	movw	r2, #2674
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-	b	.L1066
-.L1092:
-	movs	r1, #0
 	b	.L1068
-.L1070:
+.L1094:
+	movs	r1, #0
+	b	.L1070
+.L1072:
 	ldrh	r2, [r4, #2336]
 	ldrh	r3, [r4, #2344]
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1072
+	ble	.L1074
 	movw	r2, #2677
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1072:
+.L1074:
 	ldr	r1, [r4, #3804]
 	mov	r10, #20
 	ldrh	r2, [r4, #32]
@@ -7530,35 +7605,35 @@ allocate_data_superblock:
 	mov	ip, r7
 	mla	r2, r10, r2, r1
 	str	r2, [sp, #4]
-.L1073:
+.L1075:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bne	.L1075
-	cbnz	r7, .L1076
+	bne	.L1077
+	cbnz	r7, .L1078
 	mov	r2, #2688
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1076:
+.L1078:
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r8
-	bne	.L1077
+	bne	.L1079
 	movw	r2, #2690
 	mov	r1, r9
-	ldr	r0, .L1100+4
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1077:
+.L1079:
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	uxth	r6, r6
 	ldr	r2, [r4, #2328]
 	cmp	r3, #0
-	bne	.L1078
+	bne	.L1080
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1079
+	beq	.L1081
 	ldrh	r1, [r4, #92]
 	add	r3, r3, r1
-.L1099:
+.L1101:
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	movs	r1, #0
 	ldr	r3, [r4, #2548]
@@ -7566,7 +7641,7 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2548]
 	bl	ftl_set_blk_mode
-.L1081:
+.L1083:
 	ldr	r3, [r4, #2328]
 	ldr	r2, [r4, #2564]
 	ldrh	r0, [r4, #92]
@@ -7583,17 +7658,17 @@ allocate_data_superblock:
 	ldr	r1, [r4, #3804]
 	str	r0, [r4, #2556]
 	ldr	r3, [r2, #16]
-	ldr	r0, .L1100+16
+	ldr	r0, .L1102+16
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
 	mla	r2, r2, r7, r1
 	adds	r3, r1, #4
 	adds	r2, r2, #24
-.L1083:
+.L1085:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1084
+	bne	.L1086
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
 	mov	r2, r7
 	ldr	r0, [r4, #3804]
@@ -7601,42 +7676,42 @@ allocate_data_superblock:
 	bl	FlashEraseBlocks
 	mov	r3, r10
 	movs	r1, #20
-.L1085:
+.L1087:
 	uxth	r2, r10
 	cmp	r7, r2
-	bhi	.L1087
+	bhi	.L1089
 	cmp	r3, #0
-	ble	.L1088
+	ble	.L1090
 	mov	r0, r8
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1088:
+.L1090:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1089
+	bne	.L1091
 	ldr	r3, [r4, #2324]
 	movw	r2, #65535
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	b	.L1066
-.L1075:
+	b	.L1068
+.L1077:
 	str	ip, [r3, #8]
 	movw	lr, #65535
 	str	ip, [r3, #12]
 	ldrh	r2, [r0], #2
 	cmp	r2, lr
-	beq	.L1074
+	beq	.L1076
 	mla	lr, r10, r7, r1
 	adds	r7, r7, #1
 	lsls	r2, r2, #10
 	uxth	r7, r7
 	str	r2, [lr, #4]
-.L1074:
+.L1076:
 	adds	r3, r3, #20
-	b	.L1073
-.L1079:
+	b	.L1075
+.L1081:
 	movs	r3, #2
-	b	.L1099
-.L1078:
+	b	.L1101
+.L1080:
 	ldrh	r3, [r2, r6, lsl #1]
 	mov	r0, r8
 	adds	r3, r3, #1
@@ -7645,19 +7720,19 @@ allocate_data_superblock:
 	adds	r3, r3, #1
 	str	r3, [r4, #2552]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1081
-.L1084:
+	b	.L1083
+.L1086:
 	ldr	r1, [r3, #-20]
 	ands	r1, r1, r0
 	str	r1, [r3, #-20]
-	b	.L1083
-.L1087:
+	b	.L1085
+.L1089:
 	mul	r2, r1, r10
 	ldr	r0, [r4, #3804]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1086
+	bne	.L1088
 	ldr	r0, [ip, #4]
 	adds	r3, r3, #1
 	str	r1, [sp, #12]
@@ -7672,11 +7747,11 @@ allocate_data_superblock:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r5, #7]
-.L1086:
+.L1088:
 	add	r10, r10, #1
 	add	fp, fp, #2
-	b	.L1085
-.L1089:
+	b	.L1087
+.L1091:
 	ldrh	r3, [r4, #102]
 	strh	r8, [r5]	@ movhi
 	smulbb	r3, r3, r2
@@ -7693,22 +7768,22 @@ allocate_data_superblock:
 	ldrh	r1, [r5]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r3, [r5, #4]
-	cbz	r3, .L1090
+	cbz	r3, .L1092
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1091
-.L1090:
+	cbnz	r3, .L1093
+.L1092:
 	movw	r2, #2743
-	ldr	r1, .L1100+20
-	ldr	r0, .L1100+4
+	ldr	r1, .L1102+20
+	ldr	r0, .L1102+4
 	bl	sftl_printk
-.L1091:
+.L1093:
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1101:
+.L1103:
 	.align	2
-.L1100:
+.L1102:
 	.word	.LANCHOR0
 	.word	.LC1
 	.word	.LANCHOR0+2444
@@ -7731,65 +7806,65 @@ FtlGcFreeBadSuperBlk:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1114
+	ldr	r4, .L1116
 	ldrh	r3, [r4, #3210]
-	cbz	r3, .L1103
+	cbz	r3, .L1105
 	movs	r7, #0
 	addw	r10, r4, #3212
-.L1104:
+.L1106:
 	ldrh	r2, [r4, #32]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1110
+	bhi	.L1112
 	bl	FtlGcReFreshBadBlk
-.L1103:
+.L1105:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1110:
+.L1112:
 	uxtah	r3, r4, r7
 	mov	r1, r8
 	mov	fp, #0
 	ldrb	r0, [r3, #60]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r9, r0
-.L1105:
+.L1107:
 	ldrh	r3, [r4, #3210]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1109
+	bhi	.L1111
 	adds	r7, r7, #1
-	b	.L1104
-.L1109:
+	b	.L1106
+.L1111:
 	uxth	r6, fp
 	add	r3, r4, r6, lsl #1
 	ldrh	r3, [r3, #3212]
 	cmp	r3, r9
-	bne	.L1106
+	bne	.L1108
 	mov	r1, r9
-	ldr	r0, .L1114+4
+	ldr	r0, .L1116+4
 	bl	sftl_printk
 	mov	r0, r9
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	ldrh	r1, [r4, #3210]
 	add	r3, r10, r6, lsl #1
-.L1107:
+.L1109:
 	cmp	r5, r1
-	bcc	.L1108
+	bcc	.L1110
 	subs	r1, r1, #1
 	strh	r1, [r4, #3210]	@ movhi
-.L1106:
-	add	fp, fp, #1
-	b	.L1105
 .L1108:
+	add	fp, fp, #1
+	b	.L1107
+.L1110:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1107
-.L1115:
+	b	.L1109
+.L1117:
 	.align	2
-.L1114:
+.L1116:
 	.word	.LANCHOR0
 	.word	.LC103
 	.fnend
@@ -7805,7 +7880,7 @@ update_vpc_list:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1126
+	ldr	r2, .L1128
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r5, r0
@@ -7813,23 +7888,23 @@ update_vpc_list:
 	ldr	r3, [r2, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1117
+	bne	.L1119
 	ldrh	r1, [r2, #2588]
 	cmp	r1, r0
-	bne	.L1118
+	bne	.L1120
 	movw	r3, #65535
 	strh	r3, [r2, #2588]	@ movhi
-.L1119:
+.L1121:
 	mov	r1, r5
-	ldr	r0, .L1126+4
+	ldr	r0, .L1128+4
 	bl	List_remove_node
 	ldrh	r3, [r4, #2336]
-	cbnz	r3, .L1121
+	cbnz	r3, .L1123
 	movw	r2, #2813
-	ldr	r1, .L1126+8
-	ldr	r0, .L1126+12
+	ldr	r1, .L1128+8
+	ldr	r0, .L1128+12
 	bl	sftl_printk
-.L1121:
+.L1123:
 	ldrh	r3, [r4, #2336]
 	mov	r0, r5
 	subs	r3, r3, #1
@@ -7842,34 +7917,34 @@ update_vpc_list:
 	add	r3, r3, r2
 	ldrh	r2, [r4, #40]
 	cmp	r3, r2
-	ble	.L1125
+	ble	.L1127
 	mov	r2, #2816
-	ldr	r1, .L1126+8
-	ldr	r0, .L1126+12
+	ldr	r1, .L1128+8
+	ldr	r0, .L1128+12
 	bl	sftl_printk
-.L1125:
+.L1127:
 	movs	r3, #1
-	b	.L1116
-.L1118:
+	b	.L1118
+.L1120:
 	ldrh	r1, [r2, #2348]
 	cmp	r1, r0
-	beq	.L1116
+	beq	.L1118
 	ldrh	r1, [r2, #2396]
 	cmp	r1, r0
-	beq	.L1116
+	beq	.L1118
 	ldrh	r2, [r2, #2444]
 	cmp	r2, r0
-	bne	.L1119
-.L1116:
+	bne	.L1121
+.L1118:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1117:
+.L1119:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1116
-.L1127:
+	b	.L1118
+.L1129:
 	.align	2
-.L1126:
+.L1128:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2320
 	.word	.LANCHOR1+385
@@ -7892,40 +7967,40 @@ decrement_vpc_count:
 	.save {r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	ldr	r5, .L1140
-	beq	.L1129
+	ldr	r5, .L1142
+	beq	.L1131
 	ldr	r3, [r5, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1130
+	bne	.L1132
 	mov	r1, r0
-	ldr	r0, .L1140+4
+	ldr	r0, .L1142+4
 	bl	sftl_printk
 	ldr	r3, [r5, #2324]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1131
+	cbnz	r3, .L1133
 	movw	r2, #2831
-	ldr	r1, .L1140+8
-	ldr	r0, .L1140+12
+	ldr	r1, .L1142+8
+	ldr	r0, .L1142+12
 	bl	sftl_printk
-.L1131:
+.L1133:
 	ldr	r3, [r5, #2324]
 	movs	r2, #16
 	mov	r1, r4
-	ldr	r0, .L1140+16
+	ldr	r0, .L1142+16
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1132
+	cbz	r0, .L1134
 	mov	r1, r4
-	ldr	r0, .L1140+16
+	ldr	r0, .L1142+16
 	bl	List_remove_node
 	ldrh	r3, [r5, #2344]
-	cbnz	r3, .L1133
+	cbnz	r3, .L1135
 	movw	r2, #2835
-	ldr	r1, .L1140+8
-	ldr	r0, .L1140+12
+	ldr	r1, .L1142+8
+	ldr	r0, .L1142+12
 	bl	sftl_printk
-.L1133:
+.L1135:
 	ldrh	r3, [r5, #2344]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7933,28 +8008,28 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5, #2324]
 	mov	r1, r4
-	ldr	r0, .L1140+20
+	ldr	r0, .L1142+20
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	sftl_printk
-.L1132:
+.L1134:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1136:
+.L1138:
 	movs	r6, #0
-	b	.L1128
-.L1130:
+	b	.L1130
+.L1132:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1129:
+.L1131:
 	ldrh	r0, [r5, #4000]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1135
+	bne	.L1137
 	strh	r4, [r5, #4000]	@ movhi
-	b	.L1136
-.L1135:
+	b	.L1138
+.L1137:
 	cmp	r4, r0
-	beq	.L1136
+	beq	.L1138
 	bl	update_vpc_list
 	ldr	r2, [r5, #2316]
 	adds	r6, r0, #0
@@ -7964,24 +8039,24 @@ decrement_vpc_count:
 	strh	r4, [r5, #4000]	@ movhi
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1140+24
+	ldr	r3, .L1142+24
 	muls	r3, r2, r3
 	ldr	r2, [r5, #2324]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1128
+	cbnz	r2, .L1130
 	cmp	r4, r1
-	beq	.L1128
+	beq	.L1130
 	movw	r2, #2856
-	ldr	r1, .L1140+8
-	ldr	r0, .L1140+12
+	ldr	r1, .L1142+8
+	ldr	r0, .L1142+12
 	bl	sftl_printk
-.L1128:
+.L1130:
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1141:
+.L1143:
 	.align	2
-.L1140:
+.L1142:
 	.word	.LANCHOR0
 	.word	.LC104
 	.word	.LANCHOR1+401
@@ -8006,20 +8081,20 @@ FtlWriteDump_data:
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1160
+	ldr	r4, .L1162
 	ldrh	r2, [r4, #2352]
 	cmp	r2, #0
-	beq	.L1143
+	beq	.L1145
 	ldrb	r3, [r4, #2356]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1143
+	bne	.L1145
 	ldrb	r1, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1143
+	beq	.L1145
 	ldrb	r7, [r4, #2358]	@ zero_extendqisi2
-	cbnz	r7, .L1142
+	cbnz	r7, .L1144
 	ldr	r6, [r4, #2504]
 	mov	r2, r7
 	mov	r1, sp
@@ -8036,38 +8111,38 @@ FtlWriteDump_data:
 	str	r0, [sp, #12]
 	str	r5, [sp, #16]
 	str	r7, [r5, #4]
-	beq	.L1145
+	beq	.L1147
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.L1146:
-	ldr	r9, .L1160+4
+.L1148:
+	ldr	r9, .L1162+4
 	movs	r7, #0
 	lsl	r8, r8, #2
 	mov	r10, r7
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1147:
+.L1149:
 	cmp	r8, r7
-	bne	.L1151
-.L1148:
+	bne	.L1153
+.L1150:
 	movs	r3, #1
-.L1159:
+.L1161:
 	strb	r3, [r4, #2358]
-.L1142:
+.L1144:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1145:
+.L1147:
 	ldrh	r2, [r4, #110]
 	movs	r1, #255
 	bl	ftl_memset
-	b	.L1146
-.L1151:
+	b	.L1148
+.L1153:
 	ldrh	r3, [r4, #2352]
 	cmp	r3, #0
-	beq	.L1148
+	beq	.L1150
 	ldr	r3, [sp, #8]
 	mov	r0, r9
 	str	r6, [r5, #8]
@@ -8091,13 +8166,13 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #2348]
 	bl	decrement_vpc_count
-	b	.L1147
-.L1143:
+	b	.L1149
+.L1145:
 	movs	r3, #0
-	b	.L1159
-.L1161:
+	b	.L1161
+.L1163:
 	.align	2
-.L1160:
+.L1162:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2348
 	.fnend
@@ -8116,30 +8191,30 @@ l2p_flush:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1166
+	ldr	r5, .L1168
 	movs	r6, #12
 	bl	FtlWriteDump_data
-.L1163:
+.L1165:
 	ldrh	r3, [r5, #138]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1165
+	bhi	.L1167
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1165:
+.L1167:
 	ldr	r2, [r5, #2492]
 	uxth	r3, r4
 	mla	r3, r6, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1164
+	bge	.L1166
 	bl	flush_l2p_region
-.L1164:
+.L1166:
 	adds	r4, r4, #1
-	b	.L1163
-.L1167:
+	b	.L1165
+.L1169:
 	.align	2
-.L1166:
+.L1168:
 	.word	.LANCHOR0
 	.fnend
 	.size	l2p_flush, .-l2p_flush
@@ -8162,9 +8237,9 @@ FtlRecoverySuperblock:
 	sub	sp, sp, #52
 	mov	fp, r0
 	cmp	r3, r2
-	beq	.L1293
+	beq	.L1295
 	ldrh	r3, [r0, #2]
-	ldr	r4, .L1300
+	ldr	r4, .L1302
 	str	r3, [sp, #8]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
@@ -8172,27 +8247,27 @@ FtlRecoverySuperblock:
 	ldrh	r3, [r4, #102]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1171
+	bne	.L1173
 	strh	r3, [r0, #4]	@ movhi
-.L1298:
+.L1300:
 	strb	r3, [fp, #6]
-.L1293:
+.L1295:
 	movs	r0, #0
 	add	sp, sp, #52
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1171:
+.L1173:
 	ldrh	r0, [r0, #16]
-.L1172:
+.L1174:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1173
+	beq	.L1175
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	adds	r7, r0, #1
 	mov	r6, r0
-	beq	.L1174
+	beq	.L1176
 	ldr	r3, [r4, #3172]
 	movs	r2, #0
 	ldrh	lr, [r4, #32]
@@ -8208,11 +8283,11 @@ FtlRecoverySuperblock:
 	add	r3, fp, #16
 	mov	ip, r3
 	str	r3, [sp, #20]
-.L1175:
+.L1177:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L1181
-	ldr	r5, .L1300
+	bhi	.L1183
+	ldr	r5, .L1302
 	movs	r2, #0
 	mov	r1, r4
 	movw	r9, #65535
@@ -8225,15 +8300,15 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #4]
 	mov	r7, r8
 	movs	r3, #0
-.L1182:
+.L1184:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1187
-	bne	.L1185
+	bhi	.L1189
+	bne	.L1187
 	adds	r3, r6, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1294:
+.L1296:
 	ldr	r0, [r8, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
@@ -8241,56 +8316,56 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #16]
 	str	r0, [sp, #12]
 	cmp	r3, r2
-	bne	.L1189
+	bne	.L1191
 	ldrh	r3, [sp, #16]
 	strh	r3, [fp, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [fp, #6]
 	strh	r3, [fp, #4]	@ movhi
-.L1189:
+.L1191:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bne	.L1190
+	bne	.L1192
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bne	.L1190
+	bne	.L1192
 	ldr	r1, [sp, #16]
 	mov	r2, r3
-.L1299:
+.L1301:
 	mov	r0, fp
 	bl	ftl_sb_update_avl_pages
-	b	.L1293
-.L1173:
+	b	.L1295
+.L1175:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [fp, r1, lsl #1]
-	b	.L1172
-.L1174:
+	b	.L1174
+.L1176:
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1176
+	cbz	r3, .L1178
 	movw	r2, #1804
-	ldr	r1, .L1300+4
-	ldr	r0, .L1300+8
+	ldr	r1, .L1302+4
+	ldr	r0, .L1302+8
 	bl	sftl_printk
-.L1176:
+.L1178:
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1177
+	cbz	r3, .L1179
 	cmp	r5, r3
-	beq	.L1177
+	beq	.L1179
 	movw	r2, #1805
-	ldr	r1, .L1300+4
-	ldr	r0, .L1300+8
+	ldr	r1, .L1302+4
+	ldr	r0, .L1302+8
 	bl	sftl_printk
-.L1177:
+.L1179:
 	movs	r3, #0
 	strh	r3, [fp, #2]	@ movhi
-	b	.L1298
-.L1181:
+	b	.L1300
+.L1183:
 	ldrh	r3, [ip], #2
 	cmp	r3, r9
-	beq	.L1178
+	beq	.L1180
 	mla	r1, r10, r4, r0
 	orr	r3, r6, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8312,51 +8387,51 @@ FtlRecoverySuperblock:
 	str	r5, [r1, #8]
 	add	r3, r3, r8
 	str	r3, [r1, #12]
-.L1178:
+.L1180:
 	adds	r2, r2, #1
-	b	.L1175
-.L1187:
+	b	.L1177
+.L1189:
 	ldr	r2, [r7]
-	cbnz	r2, .L1183
+	cbnz	r2, .L1185
 	ldr	r10, [r7, #12]
 	ldr	r2, [r10, #4]
 	adds	r0, r2, #1
-	beq	.L1184
+	beq	.L1186
 	ldr	r1, [r5, #2544]
 	mov	r0, r2
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1184
+	cbz	r0, .L1186
 	adds	r2, r2, #1
 	str	r2, [r5, #2544]
-.L1184:
+.L1186:
 	ldr	r2, [r10]
 	adds	r2, r2, #1
-	bne	.L1186
-.L1185:
+	bne	.L1188
+.L1187:
 	uxth	r2, r6
 	uxth	r3, r3
 	str	r2, [sp, #16]
 	movs	r2, #20
 	mla	r8, r2, r3, r8
-	b	.L1294
-.L1183:
+	b	.L1296
+.L1185:
 	ldr	r9, [sp, #12]
-.L1186:
+.L1188:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1182
-.L1190:
+	b	.L1184
+.L1192:
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1191
+	bne	.L1193
 	ldrb	r3, [fp, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1192
-.L1191:
+	bne	.L1194
+.L1193:
 	ldr	r3, [r5, #4012]
 	uxth	r8, r6
 	uxth	r6, r6
-	ldr	r7, .L1300
+	ldr	r7, .L1302
 	movw	r9, #65535
 	adds	r3, r3, #1
 	itt	eq
@@ -8369,68 +8444,68 @@ FtlRecoverySuperblock:
 	subgt	r4, r8, #7
 	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L1195:
+.L1197:
 	cmp	r4, r8
-	bhi	.L1202
+	bhi	.L1204
 	movs	r3, #0
 	ldrh	lr, [r7, #32]
 	ldr	r0, [r7, #3836]
 	mov	r6, r3
 	ldr	r1, [sp, #20]
 	mov	ip, #20
-	b	.L1203
-.L1197:
+	b	.L1205
+.L1199:
 	ldrh	r2, [r1], #2
 	cmp	r2, r9
-	beq	.L1196
+	beq	.L1198
 	mla	r10, ip, r6, r0
 	adds	r6, r6, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r6, r6
 	str	r2, [r10, #4]
-.L1196:
+.L1198:
 	adds	r3, r3, #1
-.L1203:
+.L1205:
 	uxth	r2, r3
 	cmp	r2, lr
-	bcc	.L1197
+	bcc	.L1199
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
 	ldr	r3, [r7, #3836]
 	movs	r2, #20
 	mla	r6, r2, r6, r3
-.L1198:
+.L1200:
 	cmp	r6, r3
-	bne	.L1201
+	bne	.L1203
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1195
-.L1201:
+	b	.L1197
+.L1203:
 	ldr	r2, [r3]
-	cbnz	r2, .L1192
+	cbnz	r2, .L1194
 	ldr	r2, [r3, #12]
 	ldrh	r1, [r2]
 	cmp	r1, r9
-	beq	.L1200
+	beq	.L1202
 	ldr	r2, [r2, #4]
 	adds	r1, r2, #1
 	it	ne
 	strne	r2, [r7, #4012]
-.L1200:
-	adds	r3, r3, #20
-	b	.L1198
 .L1202:
+	adds	r3, r3, #20
+	b	.L1200
+.L1204:
 	mov	r3, #-1
 	str	r3, [r7, #4012]
-.L1192:
+.L1194:
 	movs	r3, #1
-	ldr	r0, .L1300+12
+	ldr	r0, .L1302+12
 	strh	r3, [r5, #4016]	@ movhi
-	ldr	r4, .L1300
+	ldr	r4, .L1302
 	bl	FtlMapBlkWriteDump_data
 	ldr	r5, [sp, #8]
-.L1204:
+.L1206:
 	ldrh	r6, [r4, #32]
 	movs	r3, #0
 	ldr	r0, [r4, #3836]
@@ -8438,61 +8513,61 @@ FtlRecoverySuperblock:
 	ldr	r1, [sp, #20]
 	movw	r7, #65535
 	mov	ip, #20
-.L1205:
+.L1207:
 	uxth	r2, r3
 	cmp	r6, r2
-	bhi	.L1207
+	bhi	.L1209
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
 	movs	r3, #0
-.L1297:
+.L1299:
 	str	r3, [sp, #28]
 	ldrh	r3, [sp, #28]
 	cmp	r10, r3
-	bhi	.L1237
+	bhi	.L1239
 	adds	r5, r5, #1
 	ldrh	r3, [r4, #102]
 	uxth	r5, r5
 	cmp	r3, r5
-	bne	.L1204
+	bne	.L1206
 	ldrh	r2, [r4, #32]
 	movw	r0, #65535
 	movs	r3, #0
 	strh	r5, [fp, #2]	@ movhi
 	strh	r3, [fp, #4]	@ movhi
-.L1238:
+.L1240:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1293
+	bcs	.L1295
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L1298
+	bne	.L1300
 	mov	r3, r1
-	b	.L1238
-.L1207:
+	b	.L1240
+.L1209:
 	ldrh	r2, [r1], #2
 	cmp	r2, r7
-	beq	.L1206
+	beq	.L1208
 	mla	lr, ip, r10, r0
 	add	r10, r10, #1
 	orr	r2, r5, r2, lsl #10
 	uxth	r10, r10
 	str	r2, [lr, #4]
-.L1206:
+.L1208:
 	adds	r3, r3, #1
-	b	.L1205
-.L1301:
+	b	.L1207
+.L1303:
 	.align	2
-.L1300:
+.L1302:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+421
 	.word	.LC1
 	.word	.LANCHOR0+3908
-.L1237:
+.L1239:
 	ldr	r3, [sp, #28]
 	movs	r7, #20
 	ldr	r9, [r4, #3836]
@@ -8504,57 +8579,57 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #8]
 	cmp	r5, r3
-	bcc	.L1209
-	bne	.L1210
+	bcc	.L1211
+	bne	.L1212
 	ldr	r3, [sp, #24]
 	cmp	r3, r0
-	bhi	.L1209
-.L1210:
+	bhi	.L1211
+.L1212:
 	ldr	r3, [sp, #16]
 	cmp	r5, r3
-	bne	.L1211
+	bne	.L1213
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L1212
-.L1211:
+	beq	.L1214
+.L1213:
 	ldr	r3, [r9, r7]
 	adds	r3, r3, #1
-	beq	.L1213
+	beq	.L1215
 	ldr	r8, [r8, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	beq	.L1214
-.L1221:
+	beq	.L1216
+.L1223:
 	ldrh	r0, [fp]
-.L1296:
+.L1298:
 	bl	decrement_vpc_count
-.L1209:
+.L1211:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1297
-.L1214:
+	b	.L1299
+.L1216:
 	ldr	r3, [r8, #4]
 	adds	r6, r3, #1
 	str	r3, [sp, #4]
-	beq	.L1215
+	beq	.L1217
 	ldr	r1, [r4, #2544]
 	mov	r0, r3
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1215
+	cbz	r0, .L1217
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [r4, #2544]
-.L1215:
+.L1217:
 	ldrh	r2, [r8]
 	movw	r3, #61589
 	cmp	r2, r3
-	beq	.L1216
+	beq	.L1218
 	movw	r2, #1954
-	ldr	r1, .L1302
-	ldr	r0, .L1302+4
+	ldr	r1, .L1304
+	ldr	r0, .L1304+4
 	bl	sftl_printk
-.L1216:
+.L1218:
 	ldr	r6, [r8, #8]
 	add	r1, sp, #40
 	ldr	r3, [r8, #12]
@@ -8564,14 +8639,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	r1, [r4, #4012]
 	adds	r0, r1, #1
-	beq	.L1217
+	beq	.L1219
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1217
+	beq	.L1219
 	ldr	r3, [sp, #36]
 	adds	r2, r3, #1
-	beq	.L1218
+	beq	.L1220
 	ldr	r0, [r4, #3836]
 	movs	r2, #0
 	movs	r1, #1
@@ -8583,122 +8658,122 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r7]
 	adds	r3, r2, r7
 	adds	r1, r1, #1
-	bne	.L1219
-.L1220:
+	bne	.L1221
+.L1222:
 	mov	r3, #-1
 	ldrh	r0, [fp]
 	str	r3, [sp, #36]
 	bl	decrement_vpc_count
-.L1228:
+.L1230:
 	ldr	r0, [sp, #36]
 	adds	r1, r0, #1
-	beq	.L1209
-.L1241:
+	beq	.L1211
+.L1243:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #40]
 	mov	r6, r0
 	cmp	r3, r0
-	bhi	.L1233
+	bhi	.L1235
 	movw	r2, #2055
-	ldr	r1, .L1302
-	ldr	r0, .L1302+4
+	ldr	r1, .L1304
+	ldr	r0, .L1304+4
 	bl	sftl_printk
-.L1233:
+.L1235:
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, #0
-	beq	.L1234
+	beq	.L1236
 	mov	r0, r6
-	b	.L1296
-.L1218:
+	b	.L1298
+.L1220:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1221
+	bne	.L1223
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r6
 	bl	log2phys
-	b	.L1221
-.L1219:
+	b	.L1223
+.L1221:
 	ldr	r1, [r8, #8]
 	cmp	r6, r1
-	bne	.L1220
+	bne	.L1222
 	ldr	r9, [r8, #4]
 	ldr	r0, [r4, #4012]
 	mov	r1, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1220
+	beq	.L1222
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1223
-.L1226:
+	bne	.L1225
+.L1228:
 	ldr	r1, [sp, #36]
 	mov	r0, r6
 	bl	FtlReUsePrevPpa
-	b	.L1220
-.L1223:
+	b	.L1222
+.L1225:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1220
+	beq	.L1222
 	adds	r0, r1, #1
-	beq	.L1224
+	beq	.L1226
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r8, [r3, #12]
 	bl	FlashReadPages
-.L1225:
+.L1227:
 	ldr	r3, [r4, #3836]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1226
+	beq	.L1228
 	ldr	r3, [r8, #4]
 	ldr	r0, [r4, #4012]
 	mov	r1, r3
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1226
+	beq	.L1228
 	mov	r1, r3
 	mov	r0, r9
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1220
-	b	.L1226
-.L1224:
+	beq	.L1222
+	b	.L1228
+.L1226:
 	str	r1, [r2, r7]
-	b	.L1225
-.L1217:
+	b	.L1227
+.L1219:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1228
+	beq	.L1230
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r6
 	bl	log2phys
 	ldr	r8, [sp, #40]
 	cmp	r8, #-1
-	beq	.L1228
+	beq	.L1230
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	beq	.L1231
+	beq	.L1233
 	ubfx	r0, r8, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r0
-	beq	.L1232
+	beq	.L1234
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r0
-	beq	.L1232
+	beq	.L1234
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r0
-	bne	.L1228
-.L1232:
+	bne	.L1230
+.L1234:
 	ldr	r0, [r4, #3836]
 	movs	r2, #0
 	movs	r1, #1
@@ -8708,23 +8783,23 @@ FtlRecoverySuperblock:
 	ldr	r3, [r4, #3836]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1228
+	beq	.L1230
 	ldr	r1, [r7, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1228
+	bne	.L1230
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r6
 	bl	log2phys
-	b	.L1228
-.L1234:
+	b	.L1230
+.L1236:
 	mov	r1, r6
-	ldr	r0, .L1302+8
+	ldr	r0, .L1304+8
 	bl	sftl_printk
-	b	.L1209
-.L1213:
+	b	.L1211
+.L1215:
 	ldr	r3, [r4, #4020]
 	cmp	r3, #31
 	itttt	ls
@@ -8736,30 +8811,30 @@ FtlRecoverySuperblock:
 	bl	decrement_vpc_count
 	ldr	r3, [r4, #4012]
 	adds	r2, r3, #1
-	bne	.L1236
+	bne	.L1238
 	ldr	r3, [sp, #4]
-.L1295:
+.L1297:
 	str	r3, [r4, #4012]
-	b	.L1209
-.L1236:
+	b	.L1211
+.L1238:
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bcs	.L1209
+	bcs	.L1211
 	mov	r3, r2
-	b	.L1295
-.L1212:
+	b	.L1297
+.L1214:
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
 	mov	r1, r5
 	strh	r5, [fp, #2]	@ movhi
 	ldr	r2, [sp, #12]
 	strb	r3, [fp, #6]
-	b	.L1299
-.L1231:
+	b	.L1301
+.L1233:
 	mov	r0, r8
-	b	.L1241
-.L1303:
+	b	.L1243
+.L1305:
 	.align	2
-.L1302:
+.L1304:
 	.word	.LANCHOR1+421
 	.word	.LC1
 	.word	.LC106
@@ -8780,7 +8855,7 @@ FtlSuperblockPowerLostFix:
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #24
 	sub	sp, sp, #24
-	ldr	r4, .L1315
+	ldr	r4, .L1317
 	mov	r3, #-1
 	mov	r8, #0
 	movw	r1, #61589
@@ -8805,12 +8880,12 @@ FtlSuperblockPowerLostFix:
 	add	r1, r1, #1269760
 	addw	r1, r1, #1507
 	str	r1, [r2, #4]
-.L1305:
+.L1307:
 	subs	r7, r7, #1
-	beq	.L1307
+	beq	.L1309
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1306
-.L1307:
+	cbnz	r3, .L1308
+.L1309:
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
@@ -8825,12 +8900,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1306:
+.L1308:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1307
+	beq	.L1309
 	ldr	r3, [r4, #2544]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -8845,10 +8920,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r5]
 	bl	decrement_vpc_count
-	b	.L1305
-.L1316:
+	b	.L1307
+.L1318:
 	.align	2
-.L1315:
+.L1317:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -8866,7 +8941,7 @@ FtlLoadBbt:
 	push	{r4, r5, r6, r7, r8, lr}
 	.save {r4, r5, r6, r7, r8, lr}
 	movw	r8, #61649
-	ldr	r4, .L1346
+	ldr	r4, .L1348
 	ldr	r3, [r4, #3284]
 	add	r7, r4, #3264
 	ldr	r6, [r4, #3288]
@@ -8876,11 +8951,11 @@ FtlLoadBbt:
 	ldrh	r5, [r4, #98]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1318:
+.L1320:
 	ldrh	r3, [r4, #98]
 	subs	r3, r3, #16
 	cmp	r5, r3
-	ble	.L1321
+	ble	.L1323
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -8889,7 +8964,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	bne	.L1319
+	bne	.L1321
 	ldr	r3, [r4, #3268]
 	movs	r2, #1
 	mov	r1, r2
@@ -8897,50 +8972,50 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #3268]
 	bl	FlashReadPages
-.L1319:
+.L1321:
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1320
+	beq	.L1322
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	bne	.L1320
+	bne	.L1322
 	ldr	r3, [r6, #4]
 	strh	r5, [r4, #152]	@ movhi
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r3, [r4, #156]	@ movhi
-.L1321:
+.L1323:
 	ldrh	r3, [r4, #152]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1335
+	beq	.L1337
 	ldrh	r3, [r4, #156]
 	cmp	r3, r2
-	beq	.L1325
+	beq	.L1327
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1346+4
+	ldr	r0, .L1348+4
 	str	r3, [r4, #3268]
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1325
+	beq	.L1327
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1325
+	bne	.L1327
 	ldr	r3, [r6, #4]
 	ldr	r2, [r4, #160]
 	cmp	r3, r2
-	bls	.L1325
+	bls	.L1327
 	ldrh	r2, [r4, #156]
 	str	r3, [r4, #160]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r4, #152]	@ movhi
 	strh	r3, [r4, #156]	@ movhi
-.L1325:
-	ldr	r7, .L1346+4
+.L1327:
+	ldr	r7, .L1348+4
 	movs	r1, #1
 	ldrh	r0, [r4, #152]
 	movw	r8, #61649
@@ -8948,44 +9023,44 @@ FtlLoadBbt:
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #154]	@ movhi
-.L1327:
+.L1329:
 	cmp	r5, #0
-	bge	.L1330
+	bge	.L1332
 	movs	r2, #254
-	ldr	r1, .L1346+8
-	ldr	r0, .L1346+12
+	ldr	r1, .L1348+8
+	ldr	r0, .L1348+12
 	bl	sftl_printk
-.L1329:
+.L1331:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r4, #158]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1332
+	beq	.L1334
 	ldr	r2, [r4, #28]
 	cmp	r0, r2
-	beq	.L1332
+	beq	.L1334
 	ldrh	r3, [r4, #42]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1332
+	bcs	.L1334
 	cmp	r0, r3
-	bcs	.L1332
+	bcs	.L1334
 	bl	FtlSysBlkNumInit
-.L1332:
-	ldr	r6, .L1346+16
+.L1334:
+	ldr	r6, .L1348+16
 	movs	r5, #0
-.L1333:
+.L1335:
 	ldrh	r3, [r4, #54]
 	cmp	r5, r3
-	bcc	.L1334
+	bcc	.L1336
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1320:
+.L1322:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1318
-.L1330:
+	b	.L1320
+.L1332:
 	ldrh	r3, [r4, #152]
 	movs	r2, #1
 	mov	r1, r2
@@ -8997,15 +9072,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1328
+	beq	.L1330
 	ldrh	r3, [r6]
 	cmp	r3, r8
-	beq	.L1329
-.L1328:
+	beq	.L1331
+.L1330:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1327
-.L1334:
+	b	.L1329
+.L1336:
 	ldrh	r2, [r4, #3904]
 	ldr	r1, [r4, #3272]
 	ldr	r0, [r6, #4]!
@@ -9013,13 +9088,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1333
-.L1335:
+	b	.L1335
+.L1337:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1347:
+.L1349:
 	.align	2
-.L1346:
+.L1348:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3264
 	.word	.LANCHOR1+443
@@ -9041,47 +9116,47 @@ FtlMakeBbt:
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, #0
-	ldr	r9, .L1367+4
+	ldr	r9, .L1369+4
 	bl	FtlBbtMemInit
 	sub	r5, r9, #180
 	sub	r10, r9, #18
 	mov	r4, r5
 	bl	FtlLoadFactoryBbt
-.L1349:
+.L1351:
 	ldrh	r3, [r5, #54]
 	cmp	r8, r3
-	bcc	.L1355
+	bcc	.L1357
 	movs	r5, #0
-.L1356:
+.L1358:
 	ldrh	r3, [r4, #114]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1357
+	bhi	.L1359
 	ldrh	r5, [r4, #164]
 	movw	r6, #65535
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1358:
+.L1360:
 	ldrh	r3, [r4, #164]
 	subs	r3, r3, #48
 	cmp	r5, r3
-	ble	.L1362
+	ble	.L1364
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1359
+	beq	.L1361
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1360
+	beq	.L1362
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1359:
+.L1361:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1358
-.L1355:
+	b	.L1360
+.L1357:
 	ldrh	r3, [r10, #2]!
 	movw	r2, #65535
 	ldr	r0, [r5, #3284]
@@ -9089,11 +9164,11 @@ FtlMakeBbt:
 	cmp	r3, r2
 	str	r0, [r5, #3272]
 	str	fp, [r5, #3276]
-	beq	.L1350
+	beq	.L1352
 	ldrh	r7, [r5, #98]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1367
+	ldr	r0, .L1369
 	mla	r7, r8, r7, r3
 	lsls	r3, r7, #10
 	str	r3, [r5, #3268]
@@ -9104,29 +9179,29 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1351:
+.L1353:
 	uxth	r0, r7
 	add	r8, r8, #1
 	add	r9, r9, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1349
-.L1350:
+	b	.L1351
+.L1352:
 	mov	r1, r8
 	bl	FlashGetBadBlockList
 	ldr	r1, [r9]
 	ldr	r0, [r5, #3272]
 	bl	FtlBbt2Bitmap
 	ldrh	r6, [r5, #98]
-.L1353:
+.L1355:
 	subs	r6, r6, #1
 	uxth	r6, r6
-.L1352:
+.L1354:
 	ldrh	r0, [r4, #98]
 	smlabb	r0, r0, r8, r6
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1353
+	beq	.L1355
 	movs	r1, #16
 	ldr	r0, [r4, #3288]
 	strh	r6, [r10]	@ movhi
@@ -9151,32 +9226,32 @@ FtlMakeBbt:
 	str	r3, [r4, #3268]
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1367
+	ldr	r0, .L1369
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1367
+	ldr	r0, .L1369
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	bne	.L1351
+	bne	.L1353
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L1352
-.L1357:
+	b	.L1354
+.L1359:
 	bl	FtlBbmMapBadBlock
-	b	.L1356
-.L1360:
+	b	.L1358
+.L1362:
 	ldrh	r3, [r4, #152]
 	cmp	r3, r6
-	bne	.L1361
+	bne	.L1363
 	strh	r5, [r4, #152]	@ movhi
-	b	.L1359
-.L1361:
+	b	.L1361
+.L1363:
 	strh	r5, [r4, #156]	@ movhi
-.L1362:
+.L1364:
 	ldrh	r3, [r4, #152]
 	movs	r5, #0
 	ldr	r0, [r4, #3804]
@@ -9206,9 +9281,9 @@ FtlMakeBbt:
 	bl	FtlBbmTblFlush
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1368:
+.L1370:
 	.align	2
-.L1367:
+.L1369:
 	.word	.LANCHOR0+3264
 	.word	.LANCHOR0+180
 	.fnend
@@ -9227,7 +9302,7 @@ FtlVendorPartWrite:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r4, .L1381
+	ldr	r4, .L1383
 	adds	r2, r0, r1
 	.pad #108
 	sub	sp, sp, #108
@@ -9235,19 +9310,19 @@ FtlVendorPartWrite:
 	mov	r6, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1377
+	bhi	.L1379
 	ldrh	r7, [r4, #108]
 	mov	r9, #0
 	lsr	r7, r0, r7
 	lsl	fp, r7, #2
+.L1373:
+	cbnz	r6, .L1378
 .L1371:
-	cbnz	r6, .L1376
-.L1369:
 	mov	r0, r9
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1376:
+.L1378:
 	ldr	r3, [r4, #3888]
 	mov	r0, r8
 	ldr	r2, [r3, fp]
@@ -9264,9 +9339,9 @@ FtlVendorPartWrite:
 	cmp	r6, r5
 	it	cc
 	uxthcc	r5, r6
-	cbz	r2, .L1373
+	cbz	r2, .L1375
 	cmp	r5, r3
-	beq	.L1373
+	beq	.L1375
 	ldr	r3, [r4, #3852]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -9276,7 +9351,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1374:
+.L1376:
 	lsls	r3, r5, #9
 	ldr	r0, [r4, #3852]
 	mov	r1, r10
@@ -9290,7 +9365,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	mov	r1, r7
 	ldr	r2, [r4, #3852]
-	ldr	r0, .L1381+4
+	ldr	r0, .L1383+4
 	adds	r7, r7, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp, #8]
@@ -9298,19 +9373,19 @@ FtlVendorPartWrite:
 	it	eq
 	moveq	r9, #-1
 	add	r10, r10, r3
-	b	.L1371
-.L1373:
+	b	.L1373
+.L1375:
 	ldrh	r2, [r4, #110]
 	movs	r1, #0
 	ldr	r0, [r4, #3852]
 	bl	ftl_memset
-	b	.L1374
-.L1377:
+	b	.L1376
+.L1379:
 	mov	r9, #-1
-	b	.L1369
-.L1382:
+	b	.L1371
+.L1384:
 	.align	2
-.L1381:
+.L1383:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3956
 	.fnend
@@ -9327,12 +9402,12 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1385
-	ldr	r3, .L1385+4
+	ldr	r2, .L1387
+	ldr	r3, .L1387+4
 	ldr	r1, [r2, #2636]
 	cmp	r1, r3
-	bne	.L1383
-	ldr	r3, .L1385+8
+	bne	.L1385
+	ldr	r3, .L1387+8
 	addw	r2, r2, #2636
 	movs	r1, #1
 	movs	r0, #0
@@ -9362,11 +9437,11 @@ Ftl_save_ext_data:
 	ldr	r3, [r2, #-68]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1383:
+.L1385:
 	bx	lr
-.L1386:
+.L1388:
 	.align	2
-.L1385:
+.L1387:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177349
@@ -9383,7 +9458,7 @@ FtlEctTblFlush:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1392
+	ldr	r2, .L1394
 	push	{r3, lr}
 	.save {r3, lr}
 	ldrh	r3, [r2, #-192]
@@ -9393,20 +9468,20 @@ FtlEctTblFlush:
 	movhi	r2, #32
 	strhls	r3, [r2, #-192]	@ movhi
 	movls	r2, #1
-	ldr	r3, .L1392+4
-	cbnz	r0, .L1389
+	ldr	r3, .L1394+4
+	cbnz	r0, .L1391
 	ldr	r1, [r3, #3864]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r2, r2, r0
 	cmp	r1, r2
-	bcc	.L1390
-.L1389:
+	bcc	.L1392
+.L1391:
 	ldr	r2, [r3, #3864]
 	movs	r0, #64
 	ldr	r1, [r2, #16]
 	str	r1, [r2, #20]
-	ldr	r1, .L1392+8
+	ldr	r1, .L1394+8
 	str	r1, [r2]
 	ldrh	r1, [r3, #3856]
 	ldr	r2, [r3, #3864]
@@ -9419,12 +9494,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1390:
+.L1392:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1393:
+.L1395:
 	.align	2
-.L1392:
+.L1394:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	1112818501
@@ -9460,7 +9535,7 @@ FtlVendorPartRead:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r10, r2
-	ldr	r4, .L1405
+	ldr	r4, .L1407
 	adds	r2, r0, r1
 	.pad #108
 	sub	sp, sp, #108
@@ -9468,19 +9543,19 @@ FtlVendorPartRead:
 	mov	r7, r1
 	ldrh	r3, [r4, #96]
 	cmp	r2, r3
-	bhi	.L1404
+	bhi	.L1406
 	ldrh	r6, [r4, #108]
 	mov	r9, #0
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
+.L1399:
+	cbnz	r7, .L1405
 .L1397:
-	cbnz	r7, .L1403
-.L1395:
 	mov	r0, r9
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1403:
+.L1405:
 	ldr	r3, [r4, #3888]
 	mov	r0, r8
 	ldrh	r5, [r4, #58]
@@ -9497,7 +9572,7 @@ FtlVendorPartRead:
 	uxthcc	r5, r7
 	lsls	r2, r5, #9
 	str	r2, [sp, #8]
-	cbz	r3, .L1399
+	cbz	r3, .L1401
 	ldr	r2, [r4, #3852]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -9515,42 +9590,42 @@ FtlVendorPartRead:
 	it	eq
 	moveq	r9, #-1
 	cmp	r2, #256
-	bne	.L1401
+	bne	.L1403
 	mov	r2, r3
 	mov	r1, r6
-	ldr	r0, .L1405+4
+	ldr	r0, .L1407+4
 	bl	sftl_printk
 	ldr	r2, [r4, #3852]
 	mov	r1, r6
-	ldr	r0, .L1405+8
+	ldr	r0, .L1407+8
 	bl	FtlMapWritePage
-.L1401:
+.L1403:
 	ldr	r1, [r4, #3852]
 	lsls	r2, r5, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1402:
+.L1404:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r7, r7, r5
 	add	r8, r8, r5
 	add	fp, fp, #4
 	add	r10, r10, r3
-	b	.L1397
-.L1399:
+	b	.L1399
+.L1401:
 	lsls	r2, r5, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1402
-.L1404:
-	mov	r9, #-1
-	b	.L1395
+	b	.L1404
 .L1406:
+	mov	r9, #-1
+	b	.L1397
+.L1408:
 	.align	2
-.L1405:
+.L1407:
 	.word	.LANCHOR0
 	.word	.LC107
 	.word	.LANCHOR0+3956
@@ -9570,29 +9645,29 @@ FtlLoadEctTbl:
 	push	{r4, lr}
 	.save {r4, lr}
 	movs	r0, #64
-	ldr	r4, .L1409
+	ldr	r4, .L1411
 	ldr	r2, [r4, #3864]
 	ldrh	r1, [r4, #3856]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #3864]
 	ldr	r2, [r3]
-	ldr	r3, .L1409+4
+	ldr	r3, .L1411+4
 	cmp	r2, r3
-	beq	.L1408
-	ldr	r1, .L1409+8
-	ldr	r0, .L1409+12
+	beq	.L1410
+	ldr	r1, .L1411+8
+	ldr	r0, .L1411+12
 	bl	sftl_printk
 	ldrh	r2, [r4, #3856]
 	movs	r1, #0
 	ldr	r0, [r4, #3864]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1408:
+.L1410:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1410:
+.L1412:
 	.align	2
-.L1409:
+.L1411:
 	.word	.LANCHOR0
 	.word	1112818501
 	.word	.LC108
@@ -9613,22 +9688,22 @@ Ftl_load_ext_data:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1414
+	ldr	r4, .L1416
 	movs	r0, #0
-	ldr	r5, .L1414+4
+	ldr	r5, .L1416+4
 	addw	r2, r4, #2636
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	beq	.L1412
+	beq	.L1414
 	mov	r1, #512
 	addw	r0, r4, #2636
 	bl	__memzero
 	str	r5, [r4, #2636]
-.L1412:
+.L1414:
 	ldr	r3, [r4, #2636]
 	cmp	r3, r5
-	bne	.L1413
+	bne	.L1415
 	ldr	r3, [r4, #2724]
 	str	r3, [r4, #2532]
 	ldr	r3, [r4, #2728]
@@ -9653,7 +9728,7 @@ Ftl_load_ext_data:
 	str	r3, [r4, #2564]
 	ldr	r3, [r4, #2684]
 	str	r3, [r4, #2568]
-.L1413:
+.L1415:
 	ldrh	r2, [r4, #92]
 	ldr	r3, [r4, #2552]
 	ldr	r0, [r4, #2548]
@@ -9662,9 +9737,9 @@ Ftl_load_ext_data:
 	bl	__aeabi_uidiv
 	str	r0, [r4, #2556]
 	pop	{r3, r4, r5, pc}
-.L1415:
+.L1417:
 	.align	2
-.L1414:
+.L1416:
 	.word	.LANCHOR0
 	.word	1179929683
 	.fnend
@@ -9699,14 +9774,14 @@ FtlVpcTblFlush:
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
 	movs	r5, #0
-	ldr	r4, .L1432
+	ldr	r4, .L1434
 	movs	r1, #255
 	movw	r7, #65535
-	ldr	r9, .L1432+16
+	ldr	r9, .L1434+16
 	ldr	r3, [r4, #3284]
 	add	r8, r4, #3264
 	ldr	r6, [r4, #3288]
-	ldr	r10, .L1432+20
+	ldr	r10, .L1434+20
 	str	r3, [r4, #3272]
 	ldrh	r3, [r4, #2576]
 	str	r6, [r4, #3276]
@@ -9718,9 +9793,9 @@ FtlVpcTblFlush:
 	str	r5, [r6, #8]
 	ldrh	r2, [r4, #2350]
 	str	r3, [r6, #4]
-	ldr	r3, .L1432+4
+	ldr	r3, .L1434+4
 	str	r3, [r4, #2268]
-	ldr	r3, .L1432+8
+	ldr	r3, .L1434+8
 	str	r3, [r4, #2272]
 	ldrh	r3, [r4, #2582]
 	strh	r3, [r4, #2276]	@ movhi
@@ -9784,7 +9859,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r5
 	bl	FtlUpdateVaildLpn
-.L1418:
+.L1420:
 	ldr	r3, [r4, #3284]
 	mov	r0, r8
 	ldrh	r2, [r4, #2576]
@@ -9802,7 +9877,7 @@ FtlVpcTblFlush:
 	ldrh	r2, [r4, #2578]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1419
+	blt	.L1421
 	ldrh	r3, [r4, #2576]
 	ldrh	r7, [r4, #2580]
 	strh	r3, [r4, #2580]	@ movhi
@@ -9823,21 +9898,21 @@ FtlVpcTblFlush:
 	mov	r1, r3
 	mov	r0, r8
 	bl	FlashProgPages
-.L1419:
+.L1421:
 	ldrh	r3, [r4, #2578]
 	ldr	r2, [r4, #3264]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2578]	@ movhi
-	bne	.L1420
+	bne	.L1422
 	cmp	r3, #1
-	bne	.L1421
+	bne	.L1423
 	movw	r2, #1169
 	mov	r1, r9
 	mov	r0, r10
 	bl	sftl_printk
-.L1421:
+.L1423:
 	ldrh	r3, [r4, #2578]
 	adds	r5, r5, #1
 	uxth	r5, r5
@@ -9847,30 +9922,30 @@ FtlVpcTblFlush:
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2578]	@ movhi
 	cmp	r5, #3
-	bls	.L1418
+	bls	.L1420
 	mov	r2, r5
 	ldr	r1, [r4, #3268]
-	ldr	r0, .L1432+12
+	ldr	r0, .L1434+12
 	bl	sftl_printk
-.L1424:
-	b	.L1424
-.L1420:
+.L1426:
+	b	.L1426
+.L1422:
 	cmp	r3, #1
-	beq	.L1418
+	beq	.L1420
 	cmp	r2, #256
-	beq	.L1418
+	beq	.L1420
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L1425
+	beq	.L1427
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.L1425:
+.L1427:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
-.L1433:
+.L1435:
 	.align	2
-.L1432:
+.L1434:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	1342177349
@@ -9913,17 +9988,17 @@ sftl_deinit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	.save {r3, lr}
-	ldr	r3, .L1437
+	ldr	r3, .L1439
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1436
+	bne	.L1438
 	bl	FtlSysFlush
-.L1436:
+.L1438:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1438:
+.L1440:
 	.align	2
-.L1437:
+.L1439:
 	.word	.LANCHOR2
 	.fnend
 	.size	sftl_deinit, .-sftl_deinit
@@ -9942,21 +10017,21 @@ FtlDiscard:
 	.save {r4, r5, r6, r7, r8, lr}
 	.pad #8
 	adds	r2, r0, r1
-	ldr	r6, .L1454
+	ldr	r6, .L1456
 	mov	r8, r0
 	mov	r5, r1
 	ldr	r3, [r6, #140]
 	cmp	r2, r3
-	bhi	.L1447
+	bhi	.L1449
 	cmp	r1, #31
-	bhi	.L1441
-.L1446:
+	bhi	.L1443
+.L1448:
 	movs	r0, #0
-.L1439:
+.L1441:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1441:
+.L1443:
 	ldrh	r4, [r6, #58]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -9964,7 +10039,7 @@ FtlDiscard:
 	mov	r7, r0
 	sub	r8, r8, r3
 	uxth	r3, r8
-	cbz	r3, .L1442
+	cbz	r3, .L1444
 	subs	r4, r4, r3
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -9972,31 +10047,31 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1442:
-	ldr	r4, .L1454+4
+.L1444:
+	ldr	r4, .L1456+4
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1443:
+.L1445:
 	ldrh	r3, [r6, #58]
 	cmp	r5, r3
-	bcs	.L1445
-	ldr	r3, .L1454+4
+	bcs	.L1447
+	ldr	r3, .L1456+4
 	ldr	r2, [r3, #-188]
 	cmp	r2, #32
-	bls	.L1446
+	bls	.L1448
 	movs	r4, #0
 	str	r4, [r3, #-188]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1446
-.L1445:
+	b	.L1448
+.L1447:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1444
+	beq	.L1446
 	ldr	r3, [r4, #-188]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -10011,17 +10086,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1444:
+.L1446:
 	ldrh	r3, [r6, #58]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L1443
-.L1447:
+	b	.L1445
+.L1449:
 	mov	r0, #-1
-	b	.L1439
-.L1455:
+	b	.L1441
+.L1457:
 	.align	2
-.L1454:
+.L1456:
 	.word	.LANCHOR0
 	.word	.LANCHOR3
 	.fnend
@@ -10041,69 +10116,69 @@ FtlVpcCheckAndModify:
 	.save {r4, r5, r6, r7, r8, r9, lr}
 	.pad #12
 	movs	r5, #0
-	ldr	r4, .L1468
-	ldr	r1, .L1468+4
-	ldr	r0, .L1468+8
+	ldr	r4, .L1470
+	ldr	r1, .L1470+4
+	ldr	r0, .L1470+8
 	bl	sftl_printk
 	ldrh	r2, [r4, #42]
 	movs	r1, #0
 	ldr	r0, [r4, #3868]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1457:
+.L1459:
 	ldr	r3, [r4, #2504]
 	cmp	r5, r3
-	bcc	.L1459
-	ldr	r9, .L1468+12
+	bcc	.L1461
+	ldr	r9, .L1470+12
 	movs	r7, #0
 	movw	r8, #65535
-.L1460:
+.L1462:
 	ldrh	r3, [r4, #40]
 	uxth	r5, r7
 	cmp	r3, r5
-	bhi	.L1464
+	bhi	.L1466
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, pc}
-.L1459:
+.L1461:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1458
+	beq	.L1460
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r4, #3868]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1458:
+.L1460:
 	adds	r5, r5, #1
-	b	.L1457
-.L1464:
+	b	.L1459
+.L1466:
 	ldr	r3, [r4, #2324]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4, #3868]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1462
+	beq	.L1464
 	cmp	r2, r8
-	beq	.L1462
+	beq	.L1464
 	mov	r1, r6
 	mov	r0, r9
 	bl	sftl_printk
 	ldrh	r3, [r4, #2348]
 	cmp	r3, r5
-	beq	.L1462
+	beq	.L1464
 	ldrh	r3, [r4, #2444]
 	cmp	r3, r5
-	beq	.L1462
+	beq	.L1464
 	ldrh	r3, [r4, #2396]
 	cmp	r3, r5
-	beq	.L1462
+	beq	.L1464
 	ldr	r3, [r4, #3868]
 	mov	r0, r5
 	ldrh	r2, [r3, r6, lsl #1]
@@ -10112,12 +10187,12 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1462:
+.L1464:
 	adds	r7, r7, #1
-	b	.L1460
-.L1469:
+	b	.L1462
+.L1471:
 	.align	2
-.L1468:
+.L1470:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+469
 	.word	.LC97
@@ -10138,42 +10213,42 @@ allocate_new_data_superblock:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	mov	r6, r0
-	ldr	r4, .L1480
+	ldr	r4, .L1482
 	ldrh	r5, [r0]
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bcs	.L1471
+	bcs	.L1473
 	movw	r2, #2750
-	ldr	r1, .L1480+4
-	ldr	r0, .L1480+8
+	ldr	r1, .L1482+4
+	ldr	r0, .L1482+8
 	bl	sftl_printk
-.L1471:
+.L1473:
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1472
+	beq	.L1474
 	ldr	r3, [r4, #2324]
 	mov	r0, r5
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1473
+	cbz	r3, .L1475
 	bl	INSERT_DATA_LIST
-.L1472:
+.L1474:
 	ldrh	r0, [r4, #4000]
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1474
+	beq	.L1476
 	cmp	r5, r0
-	bne	.L1475
+	bne	.L1477
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1476
-.L1475:
+	cbz	r3, .L1478
+.L1477:
 	bl	update_vpc_list
-.L1476:
+.L1478:
 	movw	r3, #65535
 	strh	r3, [r4, #4000]	@ movhi
-.L1474:
+.L1476:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -10182,12 +10257,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1473:
+.L1475:
 	bl	INSERT_FREE_LIST
-	b	.L1472
-.L1481:
+	b	.L1474
+.L1483:
 	.align	2
-.L1480:
+.L1482:
 	.word	.LANCHOR0
 	.word	.LANCHOR1+490
 	.word	.LC1
@@ -10207,29 +10282,29 @@ FtlProgPages:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	movs	r7, #0
-	ldr	r6, .L1496
+	ldr	r6, .L1498
 	.pad #20
 	sub	sp, sp, #20
 	mov	r4, r3
 	movs	r2, #0
-	ldr	r10, .L1496+8
+	ldr	r10, .L1498+8
 	mov	r5, r0
-	ldr	fp, .L1496+12
+	ldr	fp, .L1498+12
 	mov	r9, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1483:
+.L1485:
 	cmp	r7, r9
-	beq	.L1490
+	beq	.L1492
 	mov	r8, #0
-	b	.L1491
-.L1486:
+	b	.L1493
+.L1488:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1484
+	bne	.L1486
 	ldr	r1, [r6, #2324]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -10239,12 +10314,12 @@ FtlProgPages:
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-.L1484:
+.L1486:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1485
+	cbnz	r3, .L1487
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1485:
+.L1487:
 	ldr	r3, [r6, #2732]
 	adds	r3, r3, #1
 	str	r3, [r6, #2732]
@@ -10260,19 +10335,19 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1491:
+.L1493:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1486
+	beq	.L1488
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1487
-	mov	r2, #936
+	bcc	.L1489
+	movw	r2, #941
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L1487:
+.L1489:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -10287,36 +10362,36 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r8, r0
 	adds	r3, r3, #1
-	beq	.L1488
+	beq	.L1490
 	ldr	r3, [r6, #2324]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1489
+	cbnz	r2, .L1491
 	mov	r1, r0
-	ldr	r0, .L1496+4
+	ldr	r0, .L1498+4
 	bl	sftl_printk
-.L1489:
+.L1491:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1488:
+.L1490:
 	adds	r7, r7, #1
 	adds	r5, r5, #20
-	b	.L1483
-.L1490:
+	b	.L1485
+.L1492:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6, #32]
 	cmp	r2, r3
-	bcc	.L1482
-	movw	r2, #951
-	ldr	r1, .L1496+8
-	ldr	r0, .L1496+12
+	bcc	.L1484
+	mov	r2, #956
+	ldr	r1, .L1498+8
+	ldr	r0, .L1498+12
 	bl	sftl_printk
-.L1482:
+.L1484:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1497:
+.L1499:
 	.align	2
-.L1496:
+.L1498:
 	.word	.LANCHOR0
 	.word	.LC111
 	.word	.LANCHOR1+519
@@ -10338,49 +10413,49 @@ FtlGcFreeTempBlock:
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.pad #12
 	movw	r2, #65535
-	ldr	r4, .L1524
+	ldr	r4, .L1526
 	ldrh	r5, [r4, #2444]
 	ldrh	r1, [r4, #102]
 	cmp	r5, r2
-	bne	.L1499
-.L1509:
+	bne	.L1501
+.L1511:
 	ldrh	r2, [r4, #2444]
 	movs	r3, #0
 	str	r3, [r4, #4008]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1522
-.L1500:
+	bne	.L1524
+.L1502:
 	movs	r0, #0
-.L1498:
+.L1500:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1499:
-	cbz	r0, .L1502
-	ldr	r3, .L1524+4
+.L1501:
+	cbz	r0, .L1504
+	ldr	r3, .L1526+4
 	ldrh	r0, [r3, #4]
 	cmp	r0, r2
-	beq	.L1503
-.L1504:
+	beq	.L1505
+.L1506:
 	movs	r1, #2
-.L1502:
-	ldr	r0, .L1524+8
+.L1504:
+	ldr	r0, .L1526+8
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #4]
 	adds	r0, r0, #1
-	beq	.L1505
+	beq	.L1507
 	ldr	r2, [r4, #2328]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1506
+	bls	.L1508
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1506:
+.L1508:
 	ldr	r3, [r4, #4008]
-	cbnz	r3, .L1507
+	cbnz	r3, .L1509
 	ldr	r3, [r4, #2732]
 	ldr	r0, [sp, #4]
 	adds	r3, r3, #1
@@ -10388,66 +10463,66 @@ FtlGcFreeTempBlock:
 	str	r3, [r4, #2732]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1507:
+.L1509:
 	movs	r3, #0
 	str	r3, [r4, #4008]
-.L1518:
+.L1520:
 	movs	r0, #1
-	b	.L1498
-.L1503:
+	b	.L1500
+.L1505:
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #17
-	bhi	.L1504
-	b	.L1502
-.L1505:
-	ldr	r3, .L1524+4
+	bhi	.L1506
+	b	.L1504
+.L1507:
+	ldr	r3, .L1526+4
 	ldrh	r2, [r3, #4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1518
-	b	.L1509
-.L1522:
+	bne	.L1520
+	b	.L1511
+.L1524:
 	ldrb	r1, [r4, #2451]	@ zero_extendqisi2
 	ldrh	r3, [r4, #102]
 	ldrh	r2, [r4, #3200]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1510
+	beq	.L1512
 	movs	r2, #162
-	ldr	r1, .L1524+12
-	ldr	r0, .L1524+16
+	ldr	r1, .L1526+12
+	ldr	r0, .L1526+16
 	bl	sftl_printk
-.L1510:
+.L1512:
 	ldrb	r3, [r4, #2451]	@ zero_extendqisi2
 	movs	r6, #0
 	ldrh	r0, [r4, #102]
 	mov	r9, #12
 	ldr	r2, [r4, #2324]
 	ldrh	r1, [r4, #2444]
-	ldr	r10, .L1524+12
+	ldr	r10, .L1526+12
 	smulbb	r3, r3, r0
-	ldr	fp, .L1524+16
+	ldr	fp, .L1526+16
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldr	r2, [r4, #2528]
 	ldrh	r3, [r4, #3200]
 	add	r3, r3, r2
 	str	r3, [r4, #2528]
-.L1511:
+.L1513:
 	ldrh	r2, [r4, #3200]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1515
+	bhi	.L1517
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2444]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1516
+	beq	.L1518
 	bl	INSERT_DATA_LIST
-.L1517:
+.L1519:
 	movs	r5, #0
 	movw	r6, #65535
 	strh	r6, [r4, #2444]	@ movhi
@@ -10459,12 +10534,12 @@ FtlGcFreeTempBlock:
 	ldrh	r2, [r4, #2344]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1500
+	ble	.L1502
 	movs	r3, #20
 	strh	r6, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3148]	@ movhi
-	b	.L1500
-.L1515:
+	b	.L1502
+.L1517:
 	uxth	r7, r6
 	ldr	r8, [r4, #3196]
 	ldr	r3, [r4, #2504]
@@ -10472,12 +10547,12 @@ FtlGcFreeTempBlock:
 	add	r5, r8, r7
 	ldr	r2, [r5, #8]
 	cmp	r2, r3
-	bcc	.L1512
+	bcc	.L1514
 	movs	r2, #168
 	mov	r1, r10
 	mov	r0, fp
 	bl	sftl_printk
-.L1512:
+.L1514:
 	movs	r2, #0
 	add	r1, sp, #4
 	ldr	r0, [r5, #8]
@@ -10485,7 +10560,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r8, r7]
 	ldr	r3, [sp, #4]
 	cmp	r0, r3
-	bne	.L1513
+	bne	.L1515
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -10494,23 +10569,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r5, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1523:
+.L1525:
 	bl	decrement_vpc_count
-.L1514:
+.L1516:
 	adds	r6, r6, #1
-	b	.L1511
-.L1513:
+	b	.L1513
+.L1515:
 	ldr	r2, [r5, #4]
 	cmp	r3, r2
-	beq	.L1514
+	beq	.L1516
 	ldrh	r0, [r4, #2444]
-	b	.L1523
-.L1516:
+	b	.L1525
+.L1518:
 	bl	INSERT_FREE_LIST
-	b	.L1517
-.L1525:
+	b	.L1519
+.L1527:
 	.align	2
-.L1524:
+.L1526:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR0+2444
@@ -10531,25 +10606,25 @@ FtlGcPageRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	.save {r4, lr}
-	ldr	r4, .L1528
+	ldr	r4, .L1530
 	ldrh	r1, [r4, #102]
 	addw	r0, r4, #2444
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r4, #2446]
 	ldrh	r3, [r4, #102]
 	cmp	r2, r3
-	bcc	.L1526
+	bcc	.L1528
 	addw	r0, r4, #3908
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
 	movs	r3, #0
 	str	r3, [r4, #4008]
-.L1526:
+.L1528:
 	pop	{r4, pc}
-.L1529:
+.L1531:
 	.align	2
-.L1528:
+.L1530:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -10567,7 +10642,7 @@ FtlPowerLostRecovery:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r5, #0
-	ldr	r4, .L1531
+	ldr	r4, .L1533
 	addw	r6, r4, #2348
 	str	r5, [r4, #4020]
 	mov	r0, r6
@@ -10584,9 +10659,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1532:
+.L1534:
 	.align	2
-.L1531:
+.L1533:
 	.word	.LANCHOR0
 	.fnend
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
@@ -10604,35 +10679,35 @@ Ftl_gc_temp_data_write_back:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1540
+	ldr	r4, .L1542
 	movs	r5, #0
 	movs	r6, #20
 	mov	r2, r3
 	ldr	r1, [r4, #3164]
 	ldr	r0, [r4, #3840]
 	bl	FlashProgPages
-.L1534:
+.L1536:
 	ldr	r1, [r4, #3164]
 	uxth	r3, r5
 	cmp	r1, r3
-	bhi	.L1537
+	bhi	.L1539
 	ldr	r0, [r4, #3840]
 	bl	FtlGcBufFree
 	ldrh	r3, [r4, #2448]
 	movs	r0, #0
 	str	r0, [r4, #3164]
-	cbnz	r3, .L1533
+	cbnz	r3, .L1535
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1539
-.L1537:
+	b	.L1541
+.L1539:
 	muls	r3, r6, r3
 	ldr	r2, [r4, #3840]
 	adds	r5, r5, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r0, r2, #1
-	bne	.L1535
+	bne	.L1537
 	ldrh	r0, [r4, #2444]
 	movs	r5, #0
 	ldr	r1, [r4, #2324]
@@ -10648,20 +10723,20 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1539:
+.L1541:
 	movs	r0, #1
-.L1533:
-	pop	{r4, r5, r6, pc}
 .L1535:
+	pop	{r4, r5, r6, pc}
+.L1537:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1534
-.L1541:
+	b	.L1536
+.L1543:
 	.align	2
-.L1540:
+.L1542:
 	.word	.LANCHOR0
 	.fnend
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -10679,17 +10754,17 @@ Ftl_get_new_temp_ppa:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1545
+	ldr	r4, .L1547
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r3
-	beq	.L1543
+	beq	.L1545
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1544
-.L1543:
+	cbnz	r3, .L1546
+.L1545:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1545+4
+	ldr	r0, .L1547+4
 	strb	r5, [r4, #2452]
 	bl	allocate_data_superblock
 	strh	r5, [r4, #3192]	@ movhi
@@ -10698,13 +10773,13 @@ Ftl_get_new_temp_ppa:
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1544:
-	ldr	r0, .L1545+4
+.L1546:
+	ldr	r0, .L1547+4
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1546:
+.L1548:
 	.align	2
-.L1545:
+.L1547:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+2444
 	.fnend
@@ -10720,7 +10795,7 @@ rk_ftl_garbage_collect:
 	.fnstart
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1665
+	ldr	r3, .L1667
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r7, r0
@@ -10729,21 +10804,21 @@ rk_ftl_garbage_collect:
 	mov	r4, r3
 	ldr	r0, [r3, #3824]
 	cmp	r0, #0
-	bne	.L1621
+	bne	.L1623
 	ldrh	r2, [r3, #2336]
 	cmp	r2, #47
-	bls	.L1547
-	ldr	r2, .L1665+4
+	bls	.L1549
+	ldr	r2, .L1667+4
 	ldrh	r1, [r2, #4]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L1549
-.L1552:
+	bne	.L1551
+.L1554:
 	ldrh	r0, [r4, #3204]
 	movw	r2, #65535
 	cmp	r0, r2
-	bne	.L1550
-.L1551:
+	bne	.L1552
+.L1553:
 	ldr	r3, [r4, #3152]
 	movw	r5, #65535
 	ldrh	r1, [r4, #2588]
@@ -10751,112 +10826,112 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r7, lsl #7
 	cmp	r1, r5
 	str	r3, [r4, #3152]
-	bne	.L1553
+	bne	.L1555
 	ldrh	r2, [r4, #2444]
 	cmp	r2, r1
-	bne	.L1554
+	bne	.L1556
 	ldrh	r8, [r4, #3202]
 	cmp	r8, r2
-	bne	.L1555
+	bne	.L1557
 	ldrh	r2, [r4, #2344]
 	cmp	r2, #24
 	ite	cc
 	movcc	r2, #5120
 	movcs	r2, #1024
 	cmp	r3, r2
-	bls	.L1555
-	ldr	r3, .L1665+8
+	bls	.L1557
+	ldr	r3, .L1667+8
 	movs	r6, #0
 	str	r6, [r4, #3152]
 	strh	r6, [r3, #-184]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1625
+	bne	.L1627
 	ldrh	r2, [r4, #2344]
 	ldrh	r3, [r4, #3150]
 	cmp	r2, r3
-	bcs	.L1558
+	bcs	.L1560
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1560
+	beq	.L1562
 	mov	r0, r3
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1561
+	bhi	.L1563
 	mov	r0, r6
 	bl	List_get_gc_head_node
 	uxth	r6, r0
 	movs	r3, #128
 	strh	r3, [r4, #3150]	@ movhi
 	cmp	r6, r5
-	bne	.L1557
-.L1560:
+	bne	.L1559
+.L1562:
 	bl	FtlGcReFreshBadBlk
 	cmp	r7, #0
-	bne	.L1563
+	bne	.L1565
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1563
-.L1619:
+	bne	.L1565
+.L1621:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #24
-	bhi	.L1626
+	bhi	.L1628
 	cmp	r3, #16
 	ldrh	r6, [r4, #102]
-	bls	.L1565
+	bls	.L1567
 	lsrs	r6, r6, #5
-.L1564:
+.L1566:
 	ldrh	r2, [r4, #3148]
 	cmp	r2, r3
-	bcs	.L1568
+	bcs	.L1570
 	ldrh	r3, [r4, #2444]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1569
+	bne	.L1571
 	ldrh	r2, [r4, #3202]
 	cmp	r2, r3
-	bne	.L1569
-	ldr	r3, .L1665+8
+	bne	.L1571
+	ldr	r3, .L1667+8
 	ldrh	r0, [r3, #-184]
-	cbnz	r0, .L1570
+	cbnz	r0, .L1572
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1571
-.L1570:
+	bcs	.L1573
+.L1572:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1659:
+.L1661:
 	strh	r3, [r4, #3148]	@ movhi
 	movs	r3, #0
 	str	r3, [r4, #3160]
-.L1547:
+.L1549:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1549:
+.L1551:
 	ldrh	r3, [r3, #2444]
 	cmp	r3, r2
-	beq	.L1552
+	beq	.L1554
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1552
+	beq	.L1554
 	movs	r0, #1
-	b	.L1547
-.L1550:
+	b	.L1549
+.L1552:
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r2
-	bne	.L1551
+	bne	.L1553
 	ldrh	r1, [r4, #3206]
 	cmp	r1, r3
-	beq	.L1551
+	beq	.L1553
 	ldrh	r2, [r4, #3208]
 	cmp	r2, r3
 	itttt	ne
@@ -10864,18 +10939,18 @@ rk_ftl_garbage_collect:
 	strhne	r1, [r4, #3204]	@ movhi
 	strhne	r2, [r4, #3206]	@ movhi
 	strhne	r3, [r4, #3208]	@ movhi
-	b	.L1551
-.L1561:
+	b	.L1553
+.L1563:
 	movs	r3, #64
-.L1658:
+.L1660:
 	strh	r3, [r4, #3150]	@ movhi
-	b	.L1560
-.L1558:
+	b	.L1562
+.L1560:
 	movs	r3, #80
-	b	.L1658
-.L1625:
+	b	.L1660
+.L1627:
 	mov	r6, r0
-.L1557:
+.L1559:
 	ldr	r3, [r4, #2324]
 	mov	r5, r6
 	ldrh	r1, [r4, #3148]
@@ -10883,66 +10958,66 @@ rk_ftl_garbage_collect:
 	ldrh	r3, [r3, r6, lsl #1]
 	str	r1, [sp, #4]
 	ldr	r1, [r4, #2328]
-	ldr	r0, .L1665+12
+	ldr	r0, .L1667+12
 	ldrh	r1, [r1, r6, lsl #1]
 	str	r1, [sp]
 	mov	r1, r6
 	bl	sftl_printk
-	b	.L1560
-.L1565:
+	b	.L1562
+.L1567:
 	cmp	r3, #12
-	bls	.L1566
+	bls	.L1568
 	lsrs	r6, r6, #4
-	b	.L1564
-.L1566:
+	b	.L1566
+.L1568:
 	cmp	r3, #8
-	bls	.L1564
+	bls	.L1566
 	lsrs	r6, r6, #2
-	b	.L1564
-.L1626:
+	b	.L1566
+.L1628:
 	movs	r6, #1
-	b	.L1564
-.L1571:
+	b	.L1566
+.L1573:
 	movs	r3, #18
-	b	.L1659
-.L1569:
+	b	.L1661
+.L1571:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r4, #3148]	@ movhi
-.L1568:
+.L1570:
 	ldrh	r3, [r4, #3210]
-	cbz	r3, .L1627
+	cbz	r3, .L1629
 	adds	r6, r6, #32
 	uxth	r6, r6
-.L1627:
+.L1629:
 	movw	r5, #65535
-.L1574:
+.L1576:
 	ldrh	r3, [r4, #2588]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1583
+	bne	.L1585
 	cmp	r5, r3
-	beq	.L1584
+	beq	.L1586
 	strh	r5, [r4, #2588]	@ movhi
-.L1585:
+.L1587:
 	ldrh	r0, [r4, #2588]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	cmp	r0, r7
-	beq	.L1583
+	beq	.L1585
 	bl	IsBlkInGcList
-	cbz	r0, .L1588
+	cbz	r0, .L1590
 	strh	r7, [r4, #2588]	@ movhi
-.L1588:
+.L1590:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1583
-	ldr	r0, .L1665+16
+	beq	.L1585
+	ldr	r0, .L1667+16
 	bl	make_superblock
-	ldr	r2, .L1665+8
+	ldr	r2, .L1667+8
 	movs	r3, #0
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
@@ -10951,67 +11026,67 @@ rk_ftl_garbage_collect:
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
 	strh	r3, [r2, #-180]	@ movhi
-.L1583:
+.L1585:
 	ldrh	r3, [r4, #2588]
 	ldrh	r2, [r4, #2348]
 	cmp	r2, r3
-	beq	.L1589
+	beq	.L1591
 	ldrh	r2, [r4, #2396]
 	cmp	r2, r3
-	beq	.L1589
-	ldr	r7, .L1665+8
-.L1590:
+	beq	.L1591
+	ldr	r7, .L1667+8
+.L1592:
 	ldrh	r9, [r4, #2588]
 	movw	r3, #65535
 	cmp	r9, r3
-	bne	.L1591
+	bne	.L1593
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [r4, #3160]
-.L1592:
+.L1594:
 	ldrh	r8, [r4, #3156]
 	mov	r0, r8
 	bl	List_get_gc_head_node
 	uxth	fp, r0
 	cmp	fp, r9
 	strh	fp, [r4, #2588]	@ movhi
-	bne	.L1593
+	bne	.L1595
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1547
-.L1575:
+	b	.L1549
+.L1577:
 	movs	r3, #0
 	ldrh	r7, [r4, #2344]
 	str	r3, [r4, #3160]
 	ldrh	r3, [r4, #3148]
-	ldr	r5, .L1665+8
+	ldr	r5, .L1667+8
 	cmp	r3, r7
-	bcs	.L1576
+	bcs	.L1578
 	ldrh	r3, [r5, #-184]
-	cbnz	r3, .L1577
+	cbnz	r3, .L1579
 	ldr	r3, [r4, #2504]
 	ldr	r2, [r4, #2500]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1578
-.L1577:
+	bcs	.L1580
+.L1579:
 	ldrh	r3, [r4, #2572]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1660:
-	strh	r3, [r4, #3148]	@ movhi
 .L1662:
+	strh	r3, [r4, #3148]	@ movhi
+.L1664:
 	bl	FtlReadRefresh
 	ldrh	r0, [r5, #-184]
-	b	.L1547
-.L1578:
+	b	.L1549
+.L1580:
 	movs	r3, #18
-	b	.L1660
-.L1576:
+	b	.L1662
+.L1578:
 	ldrh	r0, [r5, #-184]
 	cmp	r0, #0
-	bne	.L1580
+	bne	.L1582
 	ldrh	r6, [r4, #2572]
 	add	r3, r6, r6, lsl #1
 	asrs	r3, r3, #2
@@ -11025,57 +11100,57 @@ rk_ftl_garbage_collect:
 	muls	r3, r1, r3
 	add	r3, r3, r3, lsr #31
 	cmp	r2, r3, asr #1
-	ble	.L1581
+	ble	.L1583
 	subs	r6, r6, #1
 	cmp	r7, r6
-	bge	.L1662
-.L1581:
+	bge	.L1664
+.L1583:
 	cmp	r2, #0
-	bne	.L1580
+	bne	.L1582
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4, #2344]
 	adds	r0, r0, #1
-	b	.L1547
-.L1666:
+	b	.L1549
+.L1668:
 	.align	2
-.L1665:
+.L1667:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LC112
 	.word	.LANCHOR0+2588
-.L1584:
+.L1586:
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	beq	.L1585
+	beq	.L1587
 	ldr	r2, [r4, #2324]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L1586
+	cbnz	r3, .L1588
 	strh	r5, [r4, #3202]	@ movhi
-.L1586:
+.L1588:
 	ldrh	r3, [r4, #3202]
 	strh	r3, [r4, #2588]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r4, #3202]	@ movhi
-	b	.L1585
-.L1589:
+	b	.L1587
+.L1591:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1663:
-	ldr	r3, .L1667
+.L1665:
+	ldr	r3, .L1669
 	ldrh	r0, [r3, #-184]
-	b	.L1547
-.L1593:
+	b	.L1549
+.L1595:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r8, r8, #1
 	ldr	r3, [sp, #8]
-	cbz	r0, .L1594
+	cbz	r0, .L1596
 	strh	r8, [r4, #3156]	@ movhi
-	b	.L1592
-.L1594:
+	b	.L1594
+.L1596:
 	uxth	r0, r3
 	ldrh	ip, [r4, #32]
 	ldrh	r3, [r4, #102]
@@ -11086,64 +11161,64 @@ rk_ftl_garbage_collect:
 	ldrh	r1, [r2, r0, lsl #1]
 	add	ip, r3, r3, lsr #31
 	cmp	r1, ip, asr #1
-	bgt	.L1596
+	bgt	.L1598
 	cmp	r8, #48
-	bls	.L1597
+	bls	.L1599
 	cmp	r1, #8
-	bls	.L1597
+	bls	.L1599
 	ldrh	r1, [r4, #3192]
 	cmp	r1, #35
-	bhi	.L1597
-.L1596:
+	bhi	.L1599
+.L1598:
 	strh	r10, [r4, #3156]	@ movhi
-.L1597:
+.L1599:
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r3, r2
-	bgt	.L1598
+	bgt	.L1600
 	cmp	r5, r9
-	bne	.L1598
+	bne	.L1600
 	movs	r3, #0
 	strh	r5, [r4, #2588]	@ movhi
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1663
-.L1598:
-	cbnz	r2, .L1599
+	b	.L1665
+.L1600:
+	cbnz	r2, .L1601
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #3156]
 	adds	r3, r3, #1
 	strh	r3, [r4, #3156]	@ movhi
-	b	.L1592
-.L1599:
+	b	.L1594
+.L1601:
 	movs	r3, #0
 	strb	r3, [r4, #2596]
 	ldrh	r3, [r4, #2348]
 	cmp	r3, fp
-	bne	.L1600
+	bne	.L1602
 	movw	r2, #665
-	ldr	r1, .L1667+4
-	ldr	r0, .L1667+8
+	ldr	r1, .L1669+4
+	ldr	r0, .L1669+8
 	bl	sftl_printk
-.L1600:
+.L1602:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2396]
 	cmp	r2, r3
-	bne	.L1601
+	bne	.L1603
 	movw	r2, #666
-	ldr	r1, .L1667+4
-	ldr	r0, .L1667+8
+	ldr	r1, .L1669+4
+	ldr	r0, .L1669+8
 	bl	sftl_printk
-.L1601:
+.L1603:
 	ldrh	r2, [r4, #2588]
 	ldrh	r3, [r4, #2444]
 	cmp	r2, r3
-	bne	.L1602
+	bne	.L1604
 	movw	r2, #667
-	ldr	r1, .L1667+4
-	ldr	r0, .L1667+8
+	ldr	r1, .L1669+4
+	ldr	r0, .L1669+8
 	bl	sftl_printk
-.L1602:
-	ldr	r0, .L1667+12
+.L1604:
+	ldr	r0, .L1669+12
 	bl	make_superblock
 	ldrh	r1, [r4, #2588]
 	movs	r3, #0
@@ -11153,7 +11228,7 @@ rk_ftl_garbage_collect:
 	strh	r3, [r4, #2590]	@ movhi
 	strb	r3, [r4, #2594]
 	strh	r2, [r7, #-180]	@ movhi
-.L1591:
+.L1593:
 	bl	FtlReadRefresh
 	movs	r3, #1
 	str	r3, [r4, #3824]
@@ -11169,11 +11244,11 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r6, r6
-.L1661:
+.L1663:
 	str	r3, [sp, #8]
 	ldrh	r3, [sp, #8]
 	cmp	r6, r3
-	bls	.L1612
+	bls	.L1614
 	ldr	r3, [sp, #8]
 	movw	r10, #65535
 	ldrh	r1, [r4, #2590]
@@ -11182,58 +11257,58 @@ rk_ftl_garbage_collect:
 	ldr	r0, [r4, #3180]
 	add	r1, r1, r3
 	movs	r3, #0
-	ldr	ip, .L1667+20
+	ldr	ip, .L1669+20
 	mov	r8, r3
-	b	.L1613
-.L1606:
+	b	.L1615
+.L1608:
 	ldrh	r2, [ip, #2]!
 	cmp	r2, r10
-	beq	.L1605
+	beq	.L1607
 	mla	r9, fp, r8, r0
 	add	r8, r8, #1
 	orr	r2, r1, r2, lsl #10
 	uxth	r8, r8
 	str	r2, [r9, #4]
-.L1605:
+.L1607:
 	adds	r3, r3, #1
-.L1613:
+.L1615:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1606
+	bhi	.L1608
 	mov	fp, #0
 	ldrb	r2, [r4, #2596]	@ zero_extendqisi2
 	mov	r1, r8
 	bl	FlashReadPages
-.L1607:
+.L1609:
 	uxth	r3, fp
 	cmp	r8, r3
-	bhi	.L1611
+	bhi	.L1613
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1661
-.L1611:
+	b	.L1663
+.L1613:
 	mov	r9, #20
 	ldr	r3, [r4, #3180]
 	mul	r9, r9, fp
 	add	r2, r3, r9
 	ldr	r3, [r3, r9]
 	adds	r3, r3, #1
-	beq	.L1608
+	beq	.L1610
 	ldr	r10, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r10]
 	cmp	r2, r3
-	bne	.L1608
+	bne	.L1610
 	ldr	r3, [r10, #8]
 	adds	r2, r3, #1
-	bne	.L1609
+	bne	.L1611
 	movw	r2, #703
-	ldr	r1, .L1667+4
-	ldr	r0, .L1667+8
+	ldr	r1, .L1669+4
+	ldr	r0, .L1669+8
 	str	r3, [sp, #16]
 	bl	sftl_printk
 	ldr	r3, [sp, #16]
-.L1609:
+.L1611:
 	movs	r2, #0
 	mov	r0, r3
 	add	r1, sp, #28
@@ -11243,7 +11318,7 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r9
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1608
+	bne	.L1610
 	ldrh	r3, [r7, #-182]
 	movs	r2, #20
 	ldr	r1, [r4, #3164]
@@ -11284,46 +11359,46 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r4, #2451]	@ zero_extendqisi2
 	ldr	r3, [r4, #3164]
 	cmp	r2, r3
-	beq	.L1610
+	beq	.L1612
 	ldrh	r3, [r4, #2448]
-	cbnz	r3, .L1608
-.L1610:
+	cbnz	r3, .L1610
+.L1612:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1608
-.L1664:
+	cbz	r0, .L1610
+.L1666:
 	movs	r3, #0
 	ldrh	r0, [r7, #-184]
 	str	r3, [r4, #3824]
-	b	.L1547
-.L1608:
+	b	.L1549
+.L1610:
 	add	fp, fp, #1
-	b	.L1607
-.L1612:
+	b	.L1609
+.L1614:
 	ldrh	r3, [r4, #2590]
 	add	r6, r6, r3
 	ldr	r3, [sp, #12]
 	uxth	r6, r6
 	cmp	r3, r6
 	strh	r6, [r4, #2590]	@ movhi
-	bhi	.L1614
+	bhi	.L1616
 	ldr	r3, [r4, #3164]
-	cbz	r3, .L1615
+	cbz	r3, .L1617
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1664
-.L1615:
+	bne	.L1666
+.L1617:
 	ldrh	r6, [r7, #-182]
-	cbnz	r6, .L1616
+	cbnz	r6, .L1618
 	ldrh	r1, [r4, #2588]
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L1616
+	cbz	r3, .L1618
 	ldrh	r0, [r7, #-180]
 	ldrh	r2, [r4, #2590]
 	str	r3, [sp]
 	mov	r3, r6
 	str	r0, [sp, #4]
-	ldr	r0, .L1667+16
+	ldr	r0, .L1669+16
 	bl	sftl_printk
 	ldrh	r2, [r4, #2588]
 	ldr	r3, [r4, #2324]
@@ -11332,68 +11407,68 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1616:
+.L1618:
 	movw	r3, #65535
 	strh	r3, [r4, #2588]	@ movhi
-.L1614:
+.L1616:
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #2
-	bhi	.L1617
+	bhi	.L1619
 	ldrh	r6, [r4, #102]
-	b	.L1590
-.L1617:
+	b	.L1592
+.L1619:
 	movs	r2, #0
 	str	r2, [r4, #3824]
-	ldr	r2, .L1667
+	ldr	r2, .L1669
 	ldrh	r0, [r2, #-184]
 	cmp	r0, #0
-	bne	.L1547
+	bne	.L1549
 	adds	r0, r3, #1
-	b	.L1547
-.L1621:
+	b	.L1549
+.L1623:
 	movs	r0, #0
-	b	.L1547
-.L1668:
+	b	.L1549
+.L1670:
 	.align	2
-.L1667:
+.L1669:
 	.word	.LANCHOR3
 	.word	.LANCHOR1+551
 	.word	.LC1
 	.word	.LANCHOR0+2588
 	.word	.LC113
 	.word	.LANCHOR0+2602
-.L1553:
+.L1555:
 	cmp	r7, #0
-	beq	.L1619
-.L1563:
+	beq	.L1621
+.L1565:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1630
-.L1620:
+	bne	.L1632
+.L1622:
 	ldrh	r3, [r4, #3202]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1630
+	bne	.L1632
 	cmp	r5, r3
-	bne	.L1630
+	bne	.L1632
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	beq	.L1575
-.L1580:
+	beq	.L1577
+.L1582:
 	movw	r5, #65535
-.L1630:
+.L1632:
 	movs	r6, #1
-	b	.L1574
-.L1554:
+	b	.L1576
+.L1556:
 	cmp	r7, #0
-	bne	.L1580
-	b	.L1619
-.L1555:
+	bne	.L1582
+	b	.L1621
+.L1557:
 	cmp	r7, #0
-	beq	.L1619
+	beq	.L1621
 	movw	r5, #65535
-	b	.L1620
+	b	.L1622
 	.fnend
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	1
@@ -11432,30 +11507,30 @@ FtlRead:
 	mov	r7, r1
 	mov	r9, r3
 	str	r2, [sp, #56]
-	bne	.L1671
+	bne	.L1673
 	mov	r2, r3
 	ldr	r1, [sp, #56]
 	add	r0, r7, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #28]
-.L1670:
+.L1672:
 	ldr	r0, [sp, #28]
 	add	sp, sp, #84
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1671:
+.L1673:
 	ldr	r3, [sp, #56]
-	ldr	r4, .L1703
+	ldr	r4, .L1705
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
 	ldr	r2, [sp, #36]
 	ldr	r3, [r4, #140]
 	cmp	r2, r3
-	bhi	.L1692
-	ldr	r3, .L1703+4
+	bhi	.L1694
+	ldr	r3, .L1705+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-	beq	.L1693
+	beq	.L1695
 	ldrh	r5, [r4, #58]
 	mov	r0, r7
 	mov	r8, #0
@@ -11480,45 +11555,45 @@ FtlRead:
 	str	r8, [sp, #28]
 	add	r3, r3, r2
 	str	r3, [r4, #2508]
-.L1673:
+.L1675:
 	ldr	r3, [sp, #32]
-	cbnz	r3, .L1690
-	ldr	r3, .L1703
+	cbnz	r3, .L1692
+	ldr	r3, .L1705
 	ldrh	r2, [r3, #3210]
-	cbnz	r2, .L1691
+	cbnz	r2, .L1693
 	ldrh	r3, [r3, #2344]
 	cmp	r3, #31
-	bhi	.L1670
-.L1691:
+	bhi	.L1672
+.L1693:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1670
-.L1690:
+	b	.L1672
+.L1692:
 	add	r1, sp, #76
 	movs	r2, #0
 	mov	r0, r5
 	bl	log2phys
 	ldr	r3, [sp, #76]
 	adds	r1, r3, #1
-	bne	.L1674
+	bne	.L1676
 	mov	r10, #0
-.L1675:
+.L1677:
 	ldrh	r0, [r4, #58]
 	cmp	r10, r0
-	bcc	.L1677
-.L1678:
+	bcc	.L1679
+.L1680:
 	ldr	r3, [sp, #32]
 	adds	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #32]
-	beq	.L1682
+	beq	.L1684
 	ldrh	r3, [r4, #32]
 	cmp	r6, r3, lsl #2
-	bne	.L1673
-.L1682:
+	bne	.L1675
+.L1684:
 	cmp	r6, #0
-	beq	.L1673
+	beq	.L1675
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [r4, #3836]
@@ -11532,7 +11607,7 @@ FtlRead:
 	ldr	r3, [sp, #52]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L1689:
+.L1691:
 	movs	r3, #20
 	ldr	r1, [sp, #40]
 	mul	r10, r3, fp
@@ -11540,25 +11615,25 @@ FtlRead:
 	add	r3, r3, r10
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L1684
+	bne	.L1686
 	ldr	r1, [r3, #8]
 	ldr	r3, [r4, #3820]
 	cmp	r1, r3
-	bne	.L1685
+	bne	.L1687
 	ldr	r3, [sp, #60]
 	mov	r0, r9
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L1702:
+.L1704:
 	bl	ftl_memcpy
-.L1685:
+.L1687:
 	ldr	r1, [r4, #3836]
 	add	r1, r1, r10
 	ldr	r3, [r1, #12]
 	ldr	r2, [r1, #16]
 	ldr	r3, [r3, #8]
 	cmp	r2, r3
-	beq	.L1686
+	beq	.L1688
 	ldr	r3, [r4, #2708]
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
@@ -11567,7 +11642,7 @@ FtlRead:
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #16]
 	ldr	r2, [r2]
-	ldr	r0, .L1703+8
+	ldr	r0, .L1705+8
 	str	r2, [sp, #12]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
@@ -11579,7 +11654,7 @@ FtlRead:
 	ldr	r3, [r3]
 	ldr	r1, [r1, #16]
 	bl	sftl_printk
-.L1686:
+.L1688:
 	ldr	r3, [r4, #3836]
 	ldr	r1, [r3, r10]
 	add	r0, r3, r10
@@ -11591,32 +11666,32 @@ FtlRead:
 	streq	r2, [r4, #2708]
 	ldr	r3, [r3, r10]
 	cmp	r3, #256
-	bne	.L1688
+	bne	.L1690
 	ldr	r0, [r0, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1688:
+.L1690:
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L1689
+	bne	.L1691
 	movs	r6, #0
-	b	.L1673
-.L1677:
+	b	.L1675
+.L1679:
 	mla	r0, r0, r5, r10
 	cmp	r7, r0
-	bhi	.L1676
+	bhi	.L1678
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L1676
+	bls	.L1678
 	subs	r0, r0, r7
 	mov	r1, #512
 	add	r0, r9, r0, lsl #9
 	bl	__memzero
-.L1676:
+.L1678:
 	add	r10, r10, #1
-	b	.L1675
-.L1674:
+	b	.L1677
+.L1676:
 	ldr	r2, [r4, #3836]
 	mov	fp, #20
 	ldrh	r10, [r4, #58]
@@ -11624,7 +11699,7 @@ FtlRead:
 	str	r3, [fp, #4]
 	ldr	r3, [sp, #40]
 	cmp	r5, r3
-	bne	.L1679
+	bne	.L1681
 	ldr	r3, [r4, #3820]
 	mov	r1, r10
 	mov	r0, r7
@@ -11638,9 +11713,9 @@ FtlRead:
 	movcs	r3, r2
 	cmp	r3, r10
 	str	r3, [sp, #52]
-	bne	.L1680
+	bne	.L1682
 	str	r9, [fp, #8]
-.L1680:
+.L1682:
 	ldrh	r3, [r4, #112]
 	ldr	r2, [r4, #3816]
 	str	r5, [fp, #16]
@@ -11649,49 +11724,49 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [fp, #12]
-	b	.L1678
-.L1679:
+	b	.L1680
+.L1681:
 	ldr	r3, [sp, #44]
 	cmp	r5, r3
-	bne	.L1681
+	bne	.L1683
 	ldr	r3, [r4, #3812]
 	ldr	r2, [sp, #36]
 	str	r3, [fp, #8]
 	mul	r3, r10, r5
 	sub	r8, r2, r3
 	cmp	r10, r8
-	bne	.L1680
-.L1701:
+	bne	.L1682
+.L1703:
 	subs	r3, r3, r7
 	add	r3, r9, r3, lsl #9
 	str	r3, [fp, #8]
-	b	.L1680
-.L1681:
+	b	.L1682
+.L1683:
 	mul	r3, r5, r10
-	b	.L1701
-.L1684:
+	b	.L1703
+.L1686:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L1685
+	bne	.L1687
 	ldr	r1, [r3, #8]
 	ldr	r3, [r4, #3812]
 	cmp	r1, r3
-	bne	.L1685
+	bne	.L1687
 	ldrh	r0, [r4, #58]
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #68]
 	muls	r0, r3, r0
 	subs	r0, r0, r7
 	add	r0, r9, r0, lsl #9
-	b	.L1702
-.L1692:
+	b	.L1704
+.L1694:
 	mov	r3, #-1
-.L1693:
+.L1695:
 	str	r3, [sp, #28]
-	b	.L1670
-.L1704:
+	b	.L1672
+.L1706:
 	.align	2
-.L1703:
+.L1705:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC96
@@ -11735,27 +11810,27 @@ FtlWrite:
 	mov	r10, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #8]
-	bne	.L1707
+	bne	.L1709
 	mov	r2, r3
 	ldr	r1, [sp, #12]
 	add	r0, r10, #256
 	bl	FtlVendorPartWrite
-.L1706:
+.L1708:
 	add	sp, sp, #68
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1707:
+.L1709:
 	ldr	r3, [sp, #12]
-	ldr	r5, .L1757
+	ldr	r5, .L1759
 	adds	r6, r1, r3
 	ldr	r3, [r5, #140]
 	cmp	r6, r3
-	bhi	.L1743
-	ldr	r4, .L1757+4
+	bhi	.L1745
+	ldr	r4, .L1759+4
 	ldr	r0, [r4]
 	adds	r7, r0, #1
-	beq	.L1706
-	ldr	r3, .L1757+8
+	beq	.L1708
+	ldr	r3, .L1759+8
 	mov	r2, #2048
 	ldrh	r7, [r5, #58]
 	mov	r0, r10
@@ -11777,68 +11852,68 @@ FtlWrite:
 	add	r3, r3, r2
 	str	r3, [r5, #2516]
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1745
+	cbz	r3, .L1747
 	ldrh	r2, [r5, #2352]
 	addw	r3, r5, #2348
 	addw	r5, r5, #2396
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1709:
+.L1711:
 	ldr	r7, [sp, #4]
-	ldr	r4, .L1757
-.L1710:
+	ldr	r4, .L1759
+.L1712:
 	ldr	r3, [sp]
-	cbnz	r3, .L1739
+	cbnz	r3, .L1741
 	mov	r0, r3
 	ldr	r1, [sp, #24]
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bls	.L1740
-.L1742:
+	bls	.L1742
+.L1744:
 	movs	r0, #0
-	b	.L1706
-.L1745:
+	b	.L1708
+.L1747:
 	addw	r5, r5, #2348
-	b	.L1709
-.L1739:
+	b	.L1711
+.L1741:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1711
-	movw	r2, #991
-	ldr	r1, .L1757+12
-	ldr	r0, .L1757+16
+	bcc	.L1713
+	mov	r2, #996
+	ldr	r1, .L1759+12
+	ldr	r0, .L1759+16
 	bl	sftl_printk
-.L1711:
+.L1713:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1712
-	ldr	r3, .L1757+20
-	ldr	r6, .L1757+4
+	cbnz	r2, .L1714
+	ldr	r3, .L1759+20
+	ldr	r6, .L1759+4
 	cmp	r5, r3
-	bne	.L1713
+	bne	.L1715
 	ldrh	r8, [r4, #2400]
 	cmp	r8, #0
-	bne	.L1714
+	bne	.L1716
 	add	r0, r5, #48
 	bl	allocate_new_data_superblock
 	str	r8, [r6, #8]
-.L1714:
-	ldr	r5, .L1757+20
-	ldr	r0, .L1757+20
+.L1716:
+	ldr	r5, .L1759+20
+	ldr	r0, .L1759+20
 	bl	allocate_new_data_superblock
 	ldr	r2, [r6, #8]
 	add	r3, r5, #48
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1715:
+.L1717:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1712
+	cbnz	r3, .L1714
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1712:
+.L1714:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp]
@@ -11853,18 +11928,18 @@ FtlWrite:
 	str	r2, [sp, #36]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcc	.L1716
-	mov	r2, #1024
-	ldr	r1, .L1757+12
-	ldr	r0, .L1757+16
+	bcc	.L1718
+	movw	r2, #1029
+	ldr	r1, .L1759+12
+	ldr	r0, .L1759+16
 	bl	sftl_printk
-.L1716:
+.L1718:
 	mov	fp, #0
-.L1717:
+.L1719:
 	ldr	r3, [sp, #36]
 	cmp	fp, r3
-	bne	.L1737
-.L1718:
+	bne	.L1739
+.L1720:
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
@@ -11872,30 +11947,30 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp]
 	cmp	fp, r3
-	bls	.L1738
-	movw	r2, #1101
-	ldr	r1, .L1757+12
-	ldr	r0, .L1757+16
+	bls	.L1740
+	movw	r2, #1106
+	ldr	r1, .L1759+12
+	ldr	r0, .L1759+16
 	bl	sftl_printk
-.L1738:
+.L1740:
 	ldr	r3, [sp]
 	sub	r3, r3, fp
 	str	r3, [sp]
-	b	.L1710
-.L1713:
+	b	.L1712
+.L1715:
 	str	r2, [r6, #8]
 	ldrh	r2, [r4, #2352]
-	cbnz	r2, .L1748
+	cbnz	r2, .L1750
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1715
-.L1748:
+	b	.L1717
+.L1750:
 	mov	r5, r3
-	b	.L1712
-.L1737:
+	b	.L1714
+.L1739:
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L1718
+	beq	.L1720
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r7
@@ -11922,10 +11997,10 @@ FtlWrite:
 	bl	ftl_memset
 	ldr	r3, [sp, #4]
 	cmp	r7, r3
-	beq	.L1719
+	beq	.L1721
 	ldr	r3, [sp, #20]
 	cmp	r7, r3
-	bne	.L1752
+	bne	.L1754
 	ldrh	r2, [r4, #58]
 	ldr	r3, [sp, #12]
 	smulbb	r2, r2, r7
@@ -11934,8 +12009,8 @@ FtlWrite:
 	str	r3, [sp, #16]
 	subs	r6, r6, r2
 	uxth	r6, r6
-	b	.L1722
-.L1719:
+	b	.L1724
+.L1721:
 	ldrh	r6, [r4, #58]
 	mov	r0, r10
 	mov	r1, r6
@@ -11946,11 +12021,11 @@ FtlWrite:
 	cmp	r6, r3
 	it	cs
 	movcs	r6, r3
-.L1722:
+.L1724:
 	ldrh	r3, [r4, #58]
 	cmp	r6, r3
 	ldr	r3, [sp, #4]
-	bne	.L1723
+	bne	.L1725
 	cmp	r7, r3
 	ldr	r3, [r4, #3844]
 	itte	ne
@@ -11963,16 +12038,16 @@ FtlWrite:
 	streq	r2, [r3, #8]
 	addne	r6, r2, r6, lsl #9
 	strne	r6, [r3, #8]
-.L1725:
+.L1727:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4, #32]
 	cmp	r2, r3
-	bcc	.L1734
-	movw	r2, #1092
-	ldr	r1, .L1757+12
-	ldr	r0, .L1757+16
+	bcc	.L1736
+	movw	r2, #1097
+	ldr	r1, .L1759+12
+	ldr	r0, .L1759+16
 	bl	sftl_printk
-.L1734:
+.L1736:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
@@ -11991,8 +12066,8 @@ FtlWrite:
 	str	r3, [r9, #12]
 	ldrh	r3, [r5]
 	strh	r3, [r9, #2]	@ movhi
-	b	.L1717
-.L1723:
+	b	.L1719
+.L1725:
 	cmp	r7, r3
 	ldr	r3, [r4, #3844]
 	ite	eq
@@ -12002,7 +12077,7 @@ FtlWrite:
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #40]
 	adds	r1, r3, #1
-	beq	.L1728
+	beq	.L1730
 	str	r3, [sp, #48]
 	movs	r1, #1
 	ldr	r3, [r4, #3844]
@@ -12017,62 +12092,62 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1729
+	bne	.L1731
 	ldr	r3, [r4, #2708]
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
-.L1732:
+.L1734:
 	ldr	r3, [sp, #4]
 	lsls	r2, r6, #9
 	cmp	r7, r3
-	bne	.L1733
+	bne	.L1735
 	ldr	r3, [r4, #3844]
 	ldr	r1, [sp, #8]
 	add	r3, r3, r8
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #16]
 	add	r0, r0, r3, lsl #9
-.L1755:
+.L1757:
 	bl	ftl_memcpy
-	b	.L1725
-.L1758:
+	b	.L1727
+.L1760:
 	.align	2
-.L1757:
+.L1759:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR1+574
 	.word	.LC1
 	.word	.LANCHOR0+2348
-.L1729:
+.L1731:
 	ldr	r3, [r9, #8]
 	cmp	r7, r3
-	beq	.L1731
+	beq	.L1733
 	ldr	r3, [r4, #2708]
 	mov	r2, r7
-	ldr	r0, .L1759
+	ldr	r0, .L1761
 	adds	r3, r3, #1
 	str	r3, [r4, #2708]
 	ldr	r1, [r9, #8]
 	bl	sftl_printk
-.L1731:
+.L1733:
 	ldr	r3, [r9, #8]
 	cmp	r7, r3
-	beq	.L1732
-	movw	r2, #1077
-	ldr	r1, .L1759+4
-	ldr	r0, .L1759+8
+	beq	.L1734
+	movw	r2, #1082
+	ldr	r1, .L1761+4
+	ldr	r0, .L1761+8
 	bl	sftl_printk
-	b	.L1732
-.L1728:
+	b	.L1734
+.L1730:
 	ldr	r3, [r4, #3844]
 	movs	r1, #0
 	ldrh	r2, [r4, #110]
 	add	r3, r3, r8
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1732
-.L1733:
+	b	.L1734
+.L1735:
 	ldrh	r1, [r4, #58]
 	ldr	r0, [sp, #8]
 	ldr	r3, [r4, #3844]
@@ -12081,8 +12156,8 @@ FtlWrite:
 	sub	r1, r1, r10
 	add	r1, r0, r1, lsl #9
 	ldr	r0, [r3, #8]
-	b	.L1755
-.L1752:
+	b	.L1757
+.L1754:
 	ldr	r3, [r4, #3844]
 	ldr	r2, [sp, #8]
 	add	r8, r8, r3
@@ -12091,21 +12166,21 @@ FtlWrite:
 	sub	r3, r3, r10
 	add	r3, r2, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L1725
-.L1740:
+	b	.L1727
+.L1742:
 	movw	r5, #65535
-.L1753:
+.L1755:
 	ldrh	r3, [r4, #2588]
 	cmp	r3, r5
-	bne	.L1741
+	bne	.L1743
 	ldrh	r3, [r4, #3202]
 	cmp	r3, r5
-	bne	.L1741
+	bne	.L1743
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1741:
+.L1743:
 	movs	r1, #1
 	movs	r3, #128
 	mov	r0, r1
@@ -12117,14 +12192,14 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #8
-	bls	.L1753
-	b	.L1742
-.L1743:
+	bls	.L1755
+	b	.L1744
+.L1745:
 	mov	r0, #-1
-	b	.L1706
-.L1760:
+	b	.L1708
+.L1762:
 	.align	2
-.L1759:
+.L1761:
 	.word	.LC114
 	.word	.LANCHOR1+574
 	.word	.LC1
@@ -12152,15 +12227,15 @@ sftl_write:
 	mov	fp, r0
 	str	r1, [sp, #16]
 	str	r2, [sp, #36]
-	ldr	r6, .L1793
-	bls	.L1762
+	ldr	r6, .L1795
+	bls	.L1764
 	cmp	r0, #576
-	bls	.L1763
-.L1762:
+	bls	.L1765
+.L1764:
 	ldr	r3, [r6, #-172]
 	cmp	r3, #0
-	beq	.L1764
-	ldr	r2, .L1793+4
+	beq	.L1766
+	ldr	r2, .L1795+4
 	mov	r0, #512
 	ldrh	r3, [r2, #14]
 	str	r3, [sp, #20]
@@ -12171,28 +12246,28 @@ sftl_write:
 	mov	r1, r3
 	str	r3, [sp, #24]
 	bl	__aeabi_uidiv
-	ldr	r2, .L1793+8
+	ldr	r2, .L1795+8
 	movs	r3, #0
-	ldr	r1, .L1793+12
+	ldr	r1, .L1795+12
 	str	r0, [sp, #12]
 	sub	r4, r2, #262144
-.L1768:
+.L1770:
 	ldr	r0, [r2, #-4]
 	cmp	r0, #0
-	beq	.L1765
-.L1769:
+	beq	.L1767
+.L1771:
 	ldr	r3, [sp, #12]
 	movs	r4, #0
 	ldr	r2, [sp, #24]
-	ldr	r5, .L1793+4
+	ldr	r5, .L1795+4
 	str	r4, [sp, #28]
 	muls	r3, r2, r3
 	str	r3, [sp, #48]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1766:
+.L1768:
 	mov	r1, #512
-	ldr	r0, .L1793+16
+	ldr	r0, .L1795+16
 	bl	__memzero
 	ldrh	r7, [r5, #14]
 	mov	r0, r4
@@ -12210,7 +12285,7 @@ sftl_write:
 	movs	r0, #0
 	blx	r3
 	cmp	r6, #512
-	bcs	.L1770
+	bcs	.L1772
 	mov	r1, r7
 	adds	r0, r6, r4
 	bl	__aeabi_uidiv
@@ -12218,7 +12293,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1770:
+.L1772:
 	mov	r1, r6
 	mov	r0, r4
 	bl	__aeabi_uidivmod
@@ -12226,9 +12301,9 @@ sftl_write:
 	mov	r9, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #44]
-.L1771:
+.L1773:
 	cmp	r6, #512
-	bcc	.L1772
+	bcc	.L1774
 	ldrb	r8, [r5, #14]	@ zero_extendqisi2
 	mov	r0, r4
 	ldrh	r1, [r5, #10]
@@ -12246,14 +12321,14 @@ sftl_write:
 	str	r3, [sp, #44]
 	bl	__aeabi_idivmod
 	uxth	r7, r1
-.L1773:
+.L1775:
 	cmp	r6, #512
-	bcs	.L1777
+	bcs	.L1779
 	ldr	r3, [sp, #40]
 	mov	r1, r8
 	add	r0, r10, r6
 	sub	r9, r3, r7
-	ldr	r3, .L1793+16
+	ldr	r3, .L1795+16
 	uxth	r9, r9
 	add	r2, r3, r6, lsl #9
 	str	r2, [sp, #52]
@@ -12271,27 +12346,27 @@ sftl_write:
 	movs	r0, #0
 	blx	r7
 	adds	r0, r0, #1
-	bne	.L1774
-.L1777:
-	ldr	r1, .L1793+20
+	bne	.L1776
+.L1779:
+	ldr	r1, .L1795+20
 	movs	r6, #0
-.L1775:
-	ldr	r3, .L1793+16
+.L1777:
+	ldr	r3, .L1795+16
 	mov	r7, r1
 	adds	r1, r1, #4
 	ldr	r2, [r3, r6, lsl #2]
 	ldr	r3, [r7]
 	cmp	r2, r3
-	beq	.L1778
+	beq	.L1780
 	mov	r1, #512
-	ldr	r0, .L1793+16
+	ldr	r0, .L1795+16
 	bl	__memzero
-	ldr	r2, .L1793+16
+	ldr	r2, .L1795+16
 	mov	r1, r4
 	str	r6, [sp]
 	ldr	r3, [r7]
 	ldr	r2, [r2, r6, lsl #2]
-	ldr	r0, .L1793+24
+	ldr	r0, .L1795+24
 	bl	sftl_printk
 	mov	r0, r4
 	ldr	r1, [sp, #20]
@@ -12302,7 +12377,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bls	.L1779
+	bls	.L1781
 	ldr	r3, [sp, #24]
 	ldr	r1, [sp, #20]
 	adds	r0, r3, r4
@@ -12311,7 +12386,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1779:
+.L1781:
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #12]
 	add	r3, r3, r2
@@ -12319,12 +12394,12 @@ sftl_write:
 	add	r4, r4, r2
 	ldr	r2, [sp, #32]
 	cmp	r2, #15
-	bls	.L1785
-.L1784:
-	ldr	r3, .L1793
+	bls	.L1787
+.L1786:
+	ldr	r3, .L1795
 	movs	r2, #0
 	str	r2, [r3, #-172]
-.L1764:
+.L1766:
 	ldr	r3, [sp, #36]
 	mov	r1, fp
 	ldr	r2, [sp, #16]
@@ -12333,7 +12408,7 @@ sftl_write:
 	add	sp, sp, #124
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1765:
+.L1767:
 	ldr	r0, [r4, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -12341,12 +12416,12 @@ sftl_write:
 	movhi	r3, #0
 	str	r0, [r2, #-4]!
 	cmp	r1, r2
-	bne	.L1768
-	b	.L1769
-.L1785:
+	bne	.L1770
+	b	.L1771
+.L1787:
 	str	r3, [sp, #32]
-	b	.L1766
-.L1772:
+	b	.L1768
+.L1774:
 	mov	r1, r8
 	add	r0, r9, r6
 	bl	__aeabi_uidiv
@@ -12357,7 +12432,7 @@ sftl_write:
 	str	r3, [sp, #56]
 	movw	r3, #61424
 	str	r3, [sp, #60]
-	ldr	r3, .L1793+20
+	ldr	r3, .L1795+20
 	add	r2, r3, r6, lsl #9
 	str	r2, [sp, #52]
 	bl	__aeabi_uidiv
@@ -12370,32 +12445,32 @@ sftl_write:
 	ldr	r3, [sp, #40]
 	add	r6, r6, r3
 	uxth	r6, r6
-	b	.L1771
-.L1774:
+	b	.L1773
+.L1776:
 	add	r6, r6, r9
 	movs	r7, #0
 	uxth	r6, r6
-	b	.L1773
-.L1778:
+	b	.L1775
+.L1780:
 	adds	r6, r6, #1
 	cmp	r6, #65536
-	bne	.L1775
+	bne	.L1777
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #28]
-	bls	.L1779
-	b	.L1784
-.L1763:
+	bls	.L1781
+	b	.L1786
+.L1765:
 	cmp	r0, #63
-	ldr	r0, .L1793+20
-	bhi	.L1781
+	ldr	r0, .L1795+20
+	bhi	.L1783
 	ldr	r3, [sp, #16]
 	rsb	r1, fp, #64
 	subs	r2, r3, r1
 	ldr	r3, [sp, #36]
 	add	r1, r3, r1, lsl #9
-.L1782:
+.L1784:
 	movs	r3, #1
 	cmp	r5, #576
 	str	r3, [r6, #-172]
@@ -12405,17 +12480,17 @@ sftl_write:
 	addhi	r2, r2, r3
 	lsls	r2, r2, #9
 	bl	memcpy
-	b	.L1764
-.L1781:
-	ldr	r3, .L1793+28
+	b	.L1766
+.L1783:
+	ldr	r3, .L1795+28
 	ldr	r1, [sp, #36]
 	ldr	r2, [sp, #16]
 	add	r3, r3, fp
 	add	r0, r0, r3, lsl #9
-	b	.L1782
-.L1794:
+	b	.L1784
+.L1796:
 	.align	2
-.L1793:
+.L1795:
 	.word	.LANCHOR3
 	.word	.LANCHOR0
 	.word	idb_buf+262144
@@ -12440,7 +12515,7 @@ FtlLoadSysInfo:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r4, .L1816
+	ldr	r4, .L1818
 	ldr	r3, [r4, #3284]
 	ldrh	r2, [r4, #40]
 	ldr	r0, [r4, #2324]
@@ -12452,39 +12527,39 @@ FtlLoadSysInfo:
 	ldrh	r0, [r4, #2576]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L1796
-.L1804:
+	bne	.L1798
+.L1806:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1796:
-	ldr	r7, .L1816+4
+.L1798:
+	ldr	r7, .L1818+4
 	movs	r1, #1
 	add	r6, r4, #3264
 	bl	FtlGetLastWrittenPage
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r4, #2578]	@ movhi
-.L1798:
+.L1800:
 	cmp	r5, #0
-	bge	.L1801
+	bge	.L1803
 	movw	r2, #1482
-	ldr	r1, .L1816+8
-	ldr	r0, .L1816+12
+	ldr	r1, .L1818+8
+	ldr	r0, .L1818+12
 	bl	sftl_printk
-.L1800:
+.L1802:
 	ldrh	r3, [r4, #40]
 	ldrh	r2, [r4, #110]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1803
+	bcs	.L1805
 	movw	r2, #1484
-	ldr	r1, .L1816+8
-	ldr	r0, .L1816+12
+	ldr	r1, .L1818+8
+	ldr	r0, .L1818+12
 	bl	sftl_printk
-.L1803:
+.L1805:
 	movs	r2, #48
 	ldr	r1, [r4, #3272]
-	ldr	r0, .L1816+16
+	ldr	r0, .L1818+16
 	bl	ftl_memcpy
 	ldrh	r2, [r4, #40]
 	ldr	r1, [r4, #3272]
@@ -12503,16 +12578,16 @@ FtlLoadSysInfo:
 	add	r1, r1, r3
 	bl	ftl_memcpy
 	ldr	r2, [r4, #2268]
-	ldr	r3, .L1816+4
+	ldr	r3, .L1818+4
 	cmp	r2, r3
-	bne	.L1804
+	bne	.L1806
 	ldrb	r2, [r4, #2278]	@ zero_extendqisi2
 	ldrh	r3, [r4, #54]
 	ldrh	r5, [r4, #2276]
 	cmp	r2, r3
 	strh	r5, [r4, #2582]	@ movhi
-	bne	.L1804
-	ldr	r3, .L1816+20
+	bne	.L1806
+	ldr	r3, .L1818+20
 	ldrh	r2, [r4, #58]
 	ldr	r6, [r4, #44]
 	str	r5, [r3, #-168]
@@ -12528,12 +12603,12 @@ FtlLoadSysInfo:
 	bl	__aeabi_uidiv
 	cmp	r5, r6
 	strh	r0, [r4, #2572]	@ movhi
-	bls	.L1805
+	bls	.L1807
 	movw	r2, #1506
-	ldr	r1, .L1816+8
-	ldr	r0, .L1816+12
+	ldr	r1, .L1818+8
+	ldr	r0, .L1818+12
 	bl	sftl_printk
-.L1805:
+.L1807:
 	ldrh	r3, [r4, #2284]
 	ldrh	r1, [r4, #2282]
 	lsrs	r2, r3, #6
@@ -12588,34 +12663,34 @@ FtlLoadSysInfo:
 	strhi	r3, [r4, #2544]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L1808
-	ldr	r0, .L1816+24
+	beq	.L1810
+	ldr	r0, .L1818+24
 	bl	make_superblock
-.L1808:
+.L1810:
 	ldrh	r2, [r4, #2396]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1809
-	ldr	r0, .L1816+28
+	beq	.L1811
+	ldr	r0, .L1818+28
 	bl	make_superblock
-.L1809:
+.L1811:
 	ldrh	r2, [r4, #2444]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1810
-	ldr	r0, .L1816+32
+	beq	.L1812
+	ldr	r0, .L1818+32
 	bl	make_superblock
-.L1810:
+.L1812:
 	ldrh	r2, [r4, #2588]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1811
-	ldr	r0, .L1816+36
+	beq	.L1813
+	ldr	r0, .L1818+36
 	bl	make_superblock
-.L1811:
+.L1813:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1801:
+.L1803:
 	ldrh	r3, [r4, #2576]
 	movs	r2, #1
 	mov	r1, r2
@@ -12627,23 +12702,23 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	r3, [r4, #3264]
 	adds	r3, r3, #1
-	beq	.L1799
+	beq	.L1801
 	ldr	r3, [r4, #3284]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	bne	.L1799
+	bne	.L1801
 	ldr	r3, [r4, #3288]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	beq	.L1800
-.L1799:
+	beq	.L1802
+.L1801:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1798
-.L1817:
+	b	.L1800
+.L1819:
 	.align	2
-.L1816:
+.L1818:
 	.word	.LANCHOR0
 	.word	1179929683
 	.word	.LANCHOR1+583
@@ -12670,7 +12745,7 @@ FtlSysBlkInit:
 	push	{r4, r5, r6, lr}
 	.save {r4, r5, r6, lr}
 	movs	r3, #0
-	ldr	r4, .L1842
+	ldr	r4, .L1844
 	ldrh	r0, [r4, #36]
 	strh	r3, [r4, #4016]	@ movhi
 	bl	FtlFreeSysBlkQueueInit
@@ -12678,17 +12753,17 @@ FtlSysBlkInit:
 	ldrh	r2, [r4, #2576]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1819
-.L1821:
+	bne	.L1821
+.L1823:
 	mov	r6, #-1
-.L1818:
+.L1820:
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1819:
+.L1821:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1821
+	bne	.L1823
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12702,20 +12777,20 @@ FtlSysBlkInit:
 	mov	r3, r6
 	ldr	r2, [r4, #2492]
 	movs	r0, #12
-.L1822:
+.L1824:
 	cmp	r3, r1
-	bge	.L1827
+	bge	.L1829
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1823
-.L1827:
+	bge	.L1825
+.L1829:
 	ldrh	r2, [r4, #2296]
 	cmp	r3, r1
 	add	r2, r2, #1
 	strh	r2, [r4, #2296]	@ movhi
-	bge	.L1841
-.L1824:
+	bge	.L1843
+.L1826:
 	ldrh	r1, [r4, #2348]
 	ldr	r2, [r4, #2324]
 	ldrh	r0, [r4, #2352]
@@ -12734,12 +12809,12 @@ FtlSysBlkInit:
 	subs	r2, r2, r5
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r4, #102]
-	ldr	r0, .L1842+4
+	ldr	r0, .L1844+4
 	strb	r3, [r4, #2402]
 	strh	r2, [r4, #2398]	@ movhi
 	strh	r3, [r4, #2400]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1842+8
+	ldr	r0, .L1844+8
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r4, #2298]
 	adds	r3, r3, #1
@@ -12747,82 +12822,82 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1828
-.L1823:
+	b	.L1830
+.L1825:
 	adds	r3, r3, #1
-	b	.L1822
-.L1841:
+	b	.L1824
+.L1843:
 	ldrh	r3, [r4, #4016]
 	cmp	r3, #0
-	bne	.L1824
-.L1828:
+	bne	.L1826
+.L1830:
 	ldrh	r5, [r4, #2312]
 	movw	r2, #65533
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L1830
+	bhi	.L1832
 	mov	r1, r5
-	ldr	r0, .L1842+12
+	ldr	r0, .L1844+12
 	strh	r5, [r4, #3202]	@ movhi
 	bl	test_node_in_list
-	cbnz	r0, .L1831
+	cbnz	r0, .L1833
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bls	.L1831
+	bls	.L1833
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbnz	r3, .L1830
-.L1831:
+	cbnz	r3, .L1832
+.L1833:
 	movw	r3, #65535
 	strh	r3, [r4, #3202]	@ movhi
-.L1830:
+.L1832:
 	ldrh	r5, [r4, #2314]
 	movw	r2, #65533
 	subs	r3, r5, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bhi	.L1834
+	bhi	.L1836
 	mov	r1, r5
-	ldr	r0, .L1842+12
+	ldr	r0, .L1844+12
 	strh	r5, [r4, #3204]	@ movhi
 	bl	test_node_in_list
-	cbnz	r0, .L1835
+	cbnz	r0, .L1837
 	ldrh	r3, [r4, #40]
 	cmp	r3, r5
-	bls	.L1835
+	bls	.L1837
 	ldr	r3, [r4, #2324]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbnz	r3, .L1834
-.L1835:
+	cbnz	r3, .L1836
+.L1837:
 	movw	r3, #65535
 	strh	r3, [r4, #3204]	@ movhi
-.L1834:
+.L1836:
 	ldrh	r0, [r4, #2348]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1837
+	beq	.L1839
 	ldrh	r3, [r4, #2352]
-	cbnz	r3, .L1837
+	cbnz	r3, .L1839
 	ldrh	r3, [r4, #2400]
-	cbnz	r3, .L1837
+	cbnz	r3, .L1839
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r4, #2396]
 	bl	FtlGcRefreshBlock
 	bl	FtlVpcTblFlush
-	ldr	r0, .L1842+16
+	ldr	r0, .L1844+16
 	bl	allocate_new_data_superblock
-	ldr	r0, .L1842+20
+	ldr	r0, .L1844+20
 	bl	allocate_new_data_superblock
-.L1837:
+.L1839:
 	ldrh	r3, [r4, #2296]
 	lsls	r3, r3, #27
-	bne	.L1818
+	bne	.L1820
 	bl	FtlVpcCheckAndModify
-	b	.L1818
-.L1843:
+	b	.L1820
+.L1845:
 	.align	2
-.L1842:
+.L1844:
 	.word	.LANCHOR0
 	.word	.LANCHOR0+3908
 	.word	.LANCHOR0+3956
@@ -12845,42 +12920,42 @@ ftl_low_format:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	movs	r3, #0
-	ldr	r4, .L1868
+	ldr	r4, .L1870
 	ldrh	r0, [r4, #36]
 	str	r3, [r4, #2540]
 	str	r3, [r4, #2544]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1845
+	cbz	r0, .L1847
 	bl	FtlMakeBbt
-.L1845:
-	ldr	r0, .L1868+4
+.L1847:
+	ldr	r0, .L1870+4
 	movs	r2, #0
-.L1846:
+.L1848:
 	ldrh	r1, [r4, #58]
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1, lsl #7
-	blt	.L1847
+	blt	.L1849
 	ldrh	r6, [r4, #40]
 	movs	r5, #0
-.L1848:
+.L1850:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r6
-	bhi	.L1849
+	bhi	.L1851
 	ldrh	r1, [r4, #32]
 	subs	r3, r5, #3
 	cmp	r3, r1, lsl #1
-	bge	.L1850
-.L1854:
+	bge	.L1852
+.L1856:
 	movs	r5, #0
 	mov	r6, r5
-.L1851:
+.L1853:
 	ldrh	r3, [r4, #40]
 	uxth	r0, r5
 	adds	r5, r5, #1
 	cmp	r3, r0
-	bhi	.L1855
+	bhi	.L1857
 	ldrh	r3, [r4, #42]
 	ldrh	r5, [r4, #32]
 	ldr	r9, [r4, #44]
@@ -12896,7 +12971,7 @@ ftl_low_format:
 	movs	r3, #24
 	muls	r3, r5, r3
 	cmp	r6, r3
-	ble	.L1856
+	ble	.L1858
 	mov	r1, r5
 	sub	r0, r9, r6
 	bl	__aeabi_uidiv
@@ -12904,9 +12979,9 @@ ftl_low_format:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r4, #2572]	@ movhi
-.L1856:
+.L1858:
 	ldrh	r3, [r4, #94]
-	cbz	r3, .L1858
+	cbz	r3, .L1860
 	ldrh	r2, [r4, #2572]
 	add	r2, r2, r3, lsr #1
 	strh	r2, [r4, #2572]	@ movhi
@@ -12917,11 +12992,11 @@ ftl_low_format:
 	strlt	r8, [r4, #2504]
 	addlt	r3, r3, r7
 	strhlt	r3, [r4, #2572]	@ movhi
-.L1858:
+.L1860:
 	ldrh	r2, [r4, #2572]
 	movw	r6, #65535
 	ldr	r3, [r4, #2504]
-	ldr	r7, .L1868+8
+	ldr	r7, .L1870+8
 	subs	r3, r3, r2
 	muls	r5, r3, r5
 	ldrh	r3, [r4, #102]
@@ -12936,7 +13011,7 @@ ftl_low_format:
 	ldrh	r2, [r4, #42]
 	movs	r1, #0
 	ldr	r0, [r4, #2324]
-	ldr	r7, .L1868+12
+	ldr	r7, .L1870+12
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldrh	r2, [r4, #40]
@@ -12955,28 +13030,28 @@ ftl_low_format:
 	strh	r6, [r4, #2588]	@ movhi
 	strb	r3, [r4, #2356]
 	bl	ftl_memset
-.L1860:
+.L1862:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2355]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2348]
 	cmp	r3, #0
-	bne	.L1861
+	bne	.L1863
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2348]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2348]	@ movhi
-	b	.L1860
-.L1847:
+	b	.L1862
+.L1849:
 	ldr	r5, [r4, #3820]
 	mvns	r1, r3
 	orr	r1, r3, r1, lsl #16
 	str	r1, [r5, r3, lsl #2]
 	ldr	r1, [r4, #3812]
 	str	r0, [r1, r3, lsl #2]
-	b	.L1846
-.L1849:
+	b	.L1848
+.L1851:
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12984,8 +13059,8 @@ ftl_low_format:
 	add	r5, r5, r0
 	uxth	r5, r5
 	uxth	r6, r6
-	b	.L1848
-.L1850:
+	b	.L1850
+.L1852:
 	mov	r0, r5
 	bl	__aeabi_uidiv
 	ldr	r3, [r4, #132]
@@ -12995,27 +13070,27 @@ ftl_low_format:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r5, [r4, #40]
-.L1852:
+.L1854:
 	ldrh	r3, [r4, #42]
 	cmp	r3, r5
-	bls	.L1854
+	bls	.L1856
 	mov	r0, r5
 	movs	r1, #1
 	adds	r5, r5, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r5, r5
-	b	.L1852
-.L1855:
+	b	.L1854
+.L1857:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L1851
-.L1861:
+	b	.L1853
+.L1863:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2352]
-	ldr	r7, .L1868+16
+	ldr	r7, .L1870+16
 	str	r3, [r4, #2360]
 	adds	r3, r3, #1
 	str	r3, [r4, #2540]
@@ -13029,19 +13104,19 @@ ftl_low_format:
 	strh	r3, [r4, #2396]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #2404]
-.L1862:
+.L1864:
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r3, [r4, #2403]	@ zero_extendqisi2
 	ldrh	r2, [r4, #2396]
-	cbnz	r3, .L1863
+	cbnz	r3, .L1865
 	ldr	r3, [r4, #2324]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #2396]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2396]	@ movhi
-	b	.L1862
-.L1863:
+	b	.L1864
+.L1865:
 	ldr	r3, [r4, #2540]
 	movw	r6, #65535
 	ldrh	r1, [r4, #2400]
@@ -13064,16 +13139,16 @@ ftl_low_format:
 	str	r3, [r4, #2540]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1864
-	ldr	r3, .L1868+20
+	cbnz	r0, .L1866
+	ldr	r3, .L1870+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1864:
+.L1866:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1869:
+.L1871:
 	.align	2
-.L1868:
+.L1870:
 	.word	.LANCHOR0
 	.word	168778952
 	.word	.LANCHOR3
@@ -13096,10 +13171,10 @@ sftl_init:
 	push	{r3, r4, r5, lr}
 	.save {r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L1876
-	ldr	r5, .L1876+4
-	ldr	r1, .L1876+8
-	ldr	r0, .L1876+12
+	ldr	r4, .L1878
+	ldr	r5, .L1878+4
+	ldr	r1, .L1878+8
+	ldr	r0, .L1878+12
 	str	r3, [r5]
 	bl	sftl_printk
 	mov	r0, r4
@@ -13109,27 +13184,27 @@ sftl_init:
 	ldrh	r0, [r4, #36]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1874
+	cbnz	r0, .L1876
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1874
+	cbnz	r0, .L1876
 	movs	r3, #1
 	str	r3, [r5]
 	ldrh	r3, [r4, #2344]
 	cmp	r3, #15
-	bhi	.L1874
+	bhi	.L1876
 	movw	r4, #8129
-.L1873:
+.L1875:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1873
-.L1874:
+	bne	.L1875
+.L1876:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1877:
+.L1879:
 	.align	2
-.L1876:
+.L1878:
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LC70
@@ -13163,19 +13238,19 @@ rk_sftl_vendor_dev_ops_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1882
+	ldr	r2, .L1884
 	ldr	r3, [r2, #-164]
-	cbnz	r3, .L1881
+	cbnz	r3, .L1883
 	str	r0, [r2, #-164]
 	mov	r0, r3
 	str	r1, [r2, #-160]
 	bx	lr
-.L1881:
+.L1883:
 	mov	r0, #-1
 	bx	lr
-.L1883:
+.L1885:
 	.align	2
-.L1882:
+.L1884:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -13193,55 +13268,55 @@ rk_sftl_vendor_storage_init:
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
 	mov	r0, #65536
-	ldr	r4, .L1892
+	ldr	r4, .L1894
 	bl	ftl_malloc
 	str	r0, [r4, #-156]
 	cmp	r0, #0
-	beq	.L1890
-	ldr	r8, .L1892+4
+	beq	.L1892
+	ldr	r8, .L1894+4
 	mov	r9, #0
 	mov	r7, r9
 	mov	r6, r9
-.L1888:
+.L1890:
 	ldr	r3, [r4, #-164]
 	movs	r1, #128
 	ldr	r2, [r4, #-156]
 	lsls	r0, r6, #7
 	blx	r3
 	mov	r5, r0
-	cbnz	r0, .L1886
+	cbnz	r0, .L1888
 	ldr	r2, [r4, #-156]
 	ldr	r3, [r2]
 	cmp	r3, r8
-	bne	.L1887
+	bne	.L1889
 	movw	r3, #65532
 	ldr	r1, [r2, r3]
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1887
+	bne	.L1889
 	cmp	r1, r7
 	itt	hi
 	movhi	r9, r6
 	movhi	r7, r1
-.L1887:
+.L1889:
 	adds	r6, r6, #1
 	cmp	r6, #2
-	bne	.L1888
-	cbz	r7, .L1889
+	bne	.L1890
+	cbz	r7, .L1891
 	ldr	r3, [r4, #-164]
 	movs	r1, #128
 	lsl	r0, r9, #7
 	blx	r3
 	mov	r5, r0
-	cbz	r0, .L1884
-.L1886:
+	cbz	r0, .L1886
+.L1888:
 	ldr	r0, [r4, #-156]
 	mov	r5, #-1
 	bl	kfree
 	movs	r3, #0
 	str	r3, [r4, #-156]
-	b	.L1884
-.L1889:
+	b	.L1886
+.L1891:
 	mov	r1, #65536
 	mov	r0, r2
 	bl	__memzero
@@ -13254,15 +13329,15 @@ rk_sftl_vendor_storage_init:
 	movw	r2, #64504
 	strh	r7, [r3, #12]	@ movhi
 	strh	r2, [r3, #14]	@ movhi
-.L1884:
+.L1886:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
-.L1890:
+.L1892:
 	mvn	r5, #11
-	b	.L1884
-.L1893:
+	b	.L1886
+.L1895:
 	.align	2
-.L1892:
+.L1894:
 	.word	.LANCHOR3
 	.word	1380668996
 	.fnend
@@ -13281,23 +13356,23 @@ rk_sftl_vendor_read:
 	push	{r3, r4, r5, r6, r7, lr}
 	.save {r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r3, .L1900
+	ldr	r3, .L1902
 	mov	r0, r1
 	ldr	r5, [r3, #-156]
-	cbz	r5, .L1899
+	cbz	r5, .L1901
 	ldrh	r6, [r5, #10]
 	movs	r3, #0
-.L1896:
+.L1898:
 	cmp	r3, r6
-	bcc	.L1898
-.L1899:
+	bcc	.L1900
+.L1901:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1898:
+.L1900:
 	add	r1, r5, r3, lsl #3
 	ldrh	r4, [r1, #16]
 	cmp	r4, r7
-	bne	.L1897
+	bne	.L1899
 	ldrh	r4, [r1, #20]
 	ldrh	r1, [r1, #18]
 	cmp	r4, r2
@@ -13309,12 +13384,12 @@ rk_sftl_vendor_read:
 	bl	memcpy
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1897:
+.L1899:
 	adds	r3, r3, #1
-	b	.L1896
-.L1901:
+	b	.L1898
+.L1903:
 	.align	2
-.L1900:
+.L1902:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
@@ -13332,26 +13407,26 @@ rk_sftl_vendor_write:
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
 	mov	r8, r2
-	ldr	r2, .L1921
+	ldr	r2, .L1923
 	.pad #28
 	sub	sp, sp, #28
 	mov	r3, r1
 	ldr	r4, [r2, #-156]
 	mov	r9, r2
 	cmp	r4, #0
-	beq	.L1917
+	beq	.L1919
 	ldrh	r2, [r4, #10]
 	add	r6, r8, #63
 	ldrh	r1, [r4, #8]
 	bic	r6, r6, #63
 	movs	r7, #0
 	str	r1, [sp, #4]
-.L1904:
+.L1906:
 	cmp	r7, r2
-	bcc	.L1912
+	bcc	.L1914
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1917
+	bhi	.L1919
 	add	r2, r4, r2, lsl #3
 	uxth	r6, r6
 	strh	r0, [r2, #16]	@ movhi
@@ -13384,31 +13459,31 @@ rk_sftl_vendor_write:
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
 	ldr	r3, [r9, #-160]
-	b	.L1920
-.L1912:
+	b	.L1922
+.L1914:
 	add	r5, r4, r7, lsl #3
 	ldrh	r1, [r5, #16]
 	cmp	r1, r0
 	str	r1, [sp, #8]
-	bne	.L1905
+	bne	.L1907
 	ldrh	r1, [r5, #20]
 	add	fp, r4, #1024
 	adds	r1, r1, #63
 	bic	r1, r1, #63
 	cmp	r8, r1
 	str	r1, [sp, #12]
-	bls	.L1906
+	bls	.L1908
 	ldrh	r1, [r4, #14]
 	cmp	r6, r1
-	bhi	.L1917
+	bhi	.L1919
 	ldrh	r10, [r5, #18]
 	subs	r2, r2, #1
 	str	r2, [sp, #16]
-.L1907:
+.L1909:
 	ldr	r2, [sp, #16]
 	adds	r5, r5, #8
 	cmp	r7, r2
-	bcc	.L1908
+	bcc	.L1910
 	ldrh	r2, [sp, #8]
 	add	r7, r4, r7, lsl #3
 	uxth	r5, r10
@@ -13427,7 +13502,7 @@ rk_sftl_vendor_write:
 	strh	r5, [r4, #12]	@ movhi
 	add	r6, r6, r3
 	strh	r6, [r4, #14]	@ movhi
-.L1909:
+.L1911:
 	ldr	r3, [r4, #4]
 	movw	r2, #65532
 	adds	r3, r3, #1
@@ -13440,20 +13515,20 @@ rk_sftl_vendor_write:
 	it	hi
 	movhi	r3, #0
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1921
+	ldr	r3, .L1923
 	ldr	r3, [r3, #-160]
-.L1920:
+.L1922:
 	ldr	r0, [sp, #4]
 	mov	r2, r4
 	movs	r1, #128
 	lsls	r0, r0, #7
 	blx	r3
 	movs	r0, #0
-.L1902:
+.L1904:
 	add	sp, sp, #28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1908:
+.L1910:
 	ldrh	r9, [r5, #20]
 	add	r0, fp, r10
 	ldrh	r2, [r5, #16]
@@ -13470,24 +13545,24 @@ rk_sftl_vendor_write:
 	add	r10, r10, r9
 	bl	memcpy
 	ldr	r3, [sp, #20]
-	b	.L1907
-.L1906:
+	b	.L1909
+.L1908:
 	ldrh	r0, [r5, #18]
 	mov	r2, r8
 	mov	r1, r3
 	add	r0, r0, fp
 	bl	memcpy
 	strh	r8, [r5, #20]	@ movhi
-	b	.L1909
-.L1905:
+	b	.L1911
+.L1907:
 	adds	r7, r7, #1
-	b	.L1904
-.L1917:
+	b	.L1906
+.L1919:
 	mov	r0, #-1
-	b	.L1902
-.L1922:
+	b	.L1904
+.L1924:
 	.align	2
-.L1921:
+.L1923:
 	.word	.LANCHOR3
 	.fnend
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
@@ -13510,18 +13585,18 @@ rk_sftl_vendor_storage_ioctl:
 	bl	ftl_malloc
 	mov	r4, r0
 	cmp	r0, #0
-	beq	.L1937
-	ldr	r3, .L1949
+	beq	.L1939
+	ldr	r3, .L1951
 	cmp	r6, r3
-	beq	.L1926
+	beq	.L1928
 	adds	r3, r3, #1
 	cmp	r6, r3
-	beq	.L1927
-.L1948:
+	beq	.L1929
+.L1950:
 	mvn	r5, #13
-	b	.L1925
-.L1926:
-	ldr	r6, .L1949+4
+	b	.L1927
+.L1928:
+	ldr	r6, .L1951+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13532,31 +13607,31 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1933
+	bne	.L1935
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1948
+	bne	.L1950
 	ldr	r2, [r4]
-	ldr	r3, .L1949+8
+	ldr	r3, .L1951+8
 	cmp	r2, r3
-	beq	.L1931
-.L1932:
+	beq	.L1933
+.L1934:
 	mov	r5, #-1
-.L1925:
+.L1927:
 	mov	r0, r4
 	bl	kfree
-.L1923:
+.L1925:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1931:
+.L1933:
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_read
 	adds	r3, r0, #1
-	beq	.L1932
+	beq	.L1934
 	mov	r3, sp
 	uxth	r2, r0
 	ands	r6, r6, r3
@@ -13570,17 +13645,17 @@ rk_sftl_vendor_storage_ioctl:
 	.thumb
 	.syntax unified
 	cmp	r3, #0
-	bne	.L1948
+	bne	.L1950
 	mov	r1, r4
 	mov	r0, r5
 	bl	arm_copy_to_user
 	cmp	r0, #0
-	bne	.L1948
-.L1939:
+	bne	.L1950
+.L1941:
 	mov	r5, r0
-	b	.L1925
-.L1927:
-	ldr	r6, .L1949+4
+	b	.L1927
+.L1929:
+	ldr	r6, .L1951+4
 	mov	r3, sp
 	ands	r3, r3, r6
 	ldr	r3, [r3, #72]
@@ -13590,20 +13665,20 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1933
+	cbnz	r3, .L1935
 	movs	r2, #8
 	mov	r1, r5
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1948
+	bne	.L1950
 	ldr	r2, [r4]
-	ldr	r3, .L1949+8
+	ldr	r3, .L1951+8
 	cmp	r2, r3
-	bne	.L1932
+	bne	.L1934
 	ldrh	r2, [r4, #6]
 	movw	r3, #4087
 	cmp	r2, r3
-	bhi	.L1932
+	bhi	.L1934
 	mov	r3, sp
 	adds	r2, r2, #8
 	ands	r6, r6, r3
@@ -13614,32 +13689,32 @@ rk_sftl_vendor_storage_ioctl:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	cbnz	r3, .L1935
+	cbnz	r3, .L1937
 	mov	r1, r5
 	mov	r0, r4
 	bl	arm_copy_from_user
 	cmp	r0, #0
-	bne	.L1948
+	bne	.L1950
 	ldrh	r2, [r4, #6]
 	add	r1, r4, #8
 	ldrh	r0, [r4, #4]
 	bl	rk_sftl_vendor_write
-	b	.L1939
-.L1933:
+	b	.L1941
+.L1935:
 	movs	r1, #8
-.L1947:
+.L1949:
 	bl	__memzero
-	b	.L1948
-.L1935:
+	b	.L1950
+.L1937:
 	mov	r1, r2
 	mov	r0, r4
-	b	.L1947
-.L1937:
+	b	.L1949
+.L1939:
 	mov	r5, #-1
-	b	.L1923
-.L1950:
+	b	.L1925
+.L1952:
 	.align	2
-.L1949:
+.L1951:
 	.word	1074034177
 	.word	-8192
 	.word	1448232273
@@ -13657,11 +13732,11 @@ rk_sftl_vendor_register:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1952
+	ldr	r0, .L1954
 	b	misc_register
-.L1953:
+.L1955:
 	.align	2
-.L1952:
+.L1954:
 	.word	.LANCHOR2+12
 	.fnend
 	.size	rk_sftl_vendor_register, .-rk_sftl_vendor_register
@@ -13817,141 +13892,141 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-	.type	__func__.6748, %object
-	.size	__func__.6748, 17
-__func__.6748:
+	.type	__func__.6749, %object
+	.size	__func__.6749, 17
+__func__.6749:
 	.ascii	"INSERT_DATA_LIST\000"
-	.type	__func__.6743, %object
-	.size	__func__.6743, 17
-__func__.6743:
+	.type	__func__.6744, %object
+	.size	__func__.6744, 17
+__func__.6744:
 	.ascii	"INSERT_FREE_LIST\000"
-	.type	__func__.6786, %object
-	.size	__func__.6786, 17
-__func__.6786:
+	.type	__func__.6787, %object
+	.size	__func__.6787, 17
+__func__.6787:
 	.ascii	"List_remove_node\000"
-	.type	__func__.6818, %object
-	.size	__func__.6818, 22
-__func__.6818:
+	.type	__func__.6819, %object
+	.size	__func__.6819, 22
+__func__.6819:
 	.ascii	"List_update_data_list\000"
-	.type	__func__.6929, %object
-	.size	__func__.6929, 22
-__func__.6929:
+	.type	__func__.6930, %object
+	.size	__func__.6930, 22
+__func__.6930:
 	.ascii	"select_l2p_ram_region\000"
-	.type	__func__.7252, %object
-	.size	__func__.7252, 16
-__func__.7252:
+	.type	__func__.7253, %object
+	.size	__func__.7253, 16
+__func__.7253:
 	.ascii	"make_superblock\000"
-	.type	__func__.7427, %object
-	.size	__func__.7427, 19
-__func__.7427:
+	.type	__func__.7428, %object
+	.size	__func__.7428, 19
+__func__.7428:
 	.ascii	"get_new_active_ppa\000"
-	.type	__func__.17765, %object
-	.size	__func__.17765, 15
-__func__.17765:
+	.type	__func__.17766, %object
+	.size	__func__.17766, 15
+__func__.17766:
 	.ascii	"FlashReadPages\000"
-	.type	__func__.17782, %object
-	.size	__func__.17782, 15
-__func__.17782:
+	.type	__func__.17783, %object
+	.size	__func__.17783, 15
+__func__.17783:
 	.ascii	"FlashProgPages\000"
-	.type	__func__.6860, %object
-	.size	__func__.6860, 26
-__func__.6860:
+	.type	__func__.6861, %object
+	.size	__func__.6861, 26
+__func__.6861:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.type	__func__.6279, %object
-	.size	__func__.6279, 11
-__func__.6279:
+	.type	__func__.6280, %object
+	.size	__func__.6280, 11
+__func__.6280:
 	.ascii	"FtlMemInit\000"
-	.type	__func__.6583, %object
-	.size	__func__.6583, 14
-__func__.6583:
+	.type	__func__.6584, %object
+	.size	__func__.6584, 14
+__func__.6584:
 	.ascii	"FtlBbt2Bitmap\000"
-	.type	__func__.6890, %object
-	.size	__func__.6890, 31
-__func__.6890:
+	.type	__func__.6891, %object
+	.size	__func__.6891, 31
+__func__.6891:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.type	__func__.6904, %object
-	.size	__func__.6904, 16
-__func__.6904:
+	.type	__func__.6905, %object
+	.size	__func__.6905, 16
+__func__.6905:
 	.ascii	"FtlMapWritePage\000"
-	.type	__func__.6827, %object
-	.size	__func__.6827, 16
-__func__.6827:
+	.type	__func__.6828, %object
+	.size	__func__.6828, 16
+__func__.6828:
 	.ascii	"load_l2p_region\000"
-	.type	__func__.6875, %object
-	.size	__func__.6875, 15
-__func__.6875:
+	.type	__func__.6876, %object
+	.size	__func__.6876, 15
+__func__.6876:
 	.ascii	"ftl_map_blk_gc\000"
-	.type	__func__.6946, %object
-	.size	__func__.6946, 9
-__func__.6946:
+	.type	__func__.6947, %object
+	.size	__func__.6947, 9
+__func__.6947:
 	.ascii	"log2phys\000"
-	.type	__func__.7161, %object
-	.size	__func__.7161, 16
-__func__.7161:
+	.type	__func__.7162, %object
+	.size	__func__.7162, 16
+__func__.7162:
 	.ascii	"FtlReUsePrevPpa\000"
-	.type	__func__.7314, %object
-	.size	__func__.7314, 14
-__func__.7314:
+	.type	__func__.7315, %object
+	.size	__func__.7315, 14
+__func__.7315:
 	.ascii	"ftl_check_vpc\000"
-	.type	__func__.7041, %object
-	.size	__func__.7041, 14
-__func__.7041:
+	.type	__func__.7042, %object
+	.size	__func__.7042, 14
+__func__.7042:
 	.ascii	"FtlScanSysBlk\000"
-	.type	__func__.7273, %object
-	.size	__func__.7273, 18
-__func__.7273:
+	.type	__func__.7274, %object
+	.size	__func__.7274, 18
+__func__.7274:
 	.ascii	"SupperBlkListInit\000"
-	.type	__func__.7399, %object
-	.size	__func__.7399, 25
-__func__.7399:
+	.type	__func__.7400, %object
+	.size	__func__.7400, 25
+__func__.7400:
 	.ascii	"allocate_data_superblock\000"
-	.type	__func__.7440, %object
-	.size	__func__.7440, 16
-__func__.7440:
+	.type	__func__.7441, %object
+	.size	__func__.7441, 16
+__func__.7441:
 	.ascii	"update_vpc_list\000"
-	.type	__func__.7447, %object
-	.size	__func__.7447, 20
-__func__.7447:
+	.type	__func__.7448, %object
+	.size	__func__.7448, 20
+__func__.7448:
 	.ascii	"decrement_vpc_count\000"
-	.type	__func__.7195, %object
-	.size	__func__.7195, 22
-__func__.7195:
+	.type	__func__.7196, %object
+	.size	__func__.7196, 22
+__func__.7196:
 	.ascii	"FtlRecoverySuperblock\000"
-	.type	__func__.6626, %object
-	.size	__func__.6626, 11
-__func__.6626:
+	.type	__func__.6627, %object
+	.size	__func__.6627, 11
+__func__.6627:
 	.ascii	"FtlLoadBbt\000"
-	.type	__func__.7019, %object
-	.size	__func__.7019, 15
-__func__.7019:
+	.type	__func__.7020, %object
+	.size	__func__.7020, 15
+__func__.7020:
 	.ascii	"FtlVpcTblFlush\000"
-	.type	__func__.7298, %object
-	.size	__func__.7298, 21
-__func__.7298:
+	.type	__func__.7299, %object
+	.size	__func__.7299, 21
+__func__.7299:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.type	__func__.7420, %object
-	.size	__func__.7420, 29
-__func__.7420:
+	.type	__func__.7421, %object
+	.size	__func__.7421, 29
+__func__.7421:
 	.ascii	"allocate_new_data_superblock\000"
-	.type	__func__.6403, %object
-	.size	__func__.6403, 13
-__func__.6403:
+	.type	__func__.6404, %object
+	.size	__func__.6404, 13
+__func__.6404:
 	.ascii	"FtlProgPages\000"
-	.type	__func__.7518, %object
-	.size	__func__.7518, 19
-__func__.7518:
+	.type	__func__.7519, %object
+	.size	__func__.7519, 19
+__func__.7519:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.type	__func__.7624, %object
-	.size	__func__.7624, 23
-__func__.7624:
+	.type	__func__.7625, %object
+	.size	__func__.7625, 23
+__func__.7625:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.type	__func__.6431, %object
-	.size	__func__.6431, 9
-__func__.6431:
+	.type	__func__.6432, %object
+	.size	__func__.6432, 9
+__func__.6432:
 	.ascii	"FtlWrite\000"
-	.type	__func__.7098, %object
-	.size	__func__.7098, 15
-__func__.7098:
+	.type	__func__.7099, %object
+	.size	__func__.7099, 15
+__func__.7099:
 	.ascii	"FtlLoadSysInfo\000"
 	.space	2
 	.type	rk_sftl_vendor_storage_fops, %object
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 2267cc9400a79..b477611bb3f5e 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
 
 /*
  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
- * date: 2018-08-14
+ * date: 2018-08-17
  */
 	.arch armv8-a
 	.file	"rk_sftl.c"
@@ -1514,399 +1514,462 @@ FtlPrintInfo2buf:
 	add	x20, x0, 12
 	str	x27, [sp, 80]
 	bl	strcpy
-	ldr	w2, [x21, 120]
+	ldr	w3, [x21, 120]
+	adrp	x2, .LC3
+	add	x2, x2, :lo12:.LC3
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC3
-	add	x1, x1, :lo12:.LC3
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	strcpy
-	ldr	w2, [x21, 2584]
+	ldr	w3, [x21, 2584]
 	add	x20, x20, 10
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC5
-	add	x1, x1, :lo12:.LC5
-	bl	sprintf
+	adrp	x2, .LC5
+	add	x2, x2, :lo12:.LC5
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2580]
+	ldr	w3, [x21, 2580]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC6
-	add	x1, x1, :lo12:.LC6
-	bl	sprintf
+	adrp	x2, .LC6
+	add	x2, x2, :lo12:.LC6
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2588]
+	ldr	w3, [x21, 2588]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC7
-	add	x1, x1, :lo12:.LC7
-	bl	sprintf
+	adrp	x2, .LC7
+	add	x2, x2, :lo12:.LC7
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2592]
+	ldr	w3, [x21, 2592]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC8
-	add	x1, x1, :lo12:.LC8
-	bl	sprintf
+	adrp	x2, .LC8
+	add	x2, x2, :lo12:.LC8
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2596]
+	ldr	w3, [x21, 2596]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC9
-	add	x1, x1, :lo12:.LC9
-	bl	sprintf
+	adrp	x2, .LC9
+	add	x2, x2, :lo12:.LC9
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2600]
+	ldr	w3, [x21, 2600]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC10
-	add	x1, x1, :lo12:.LC10
-	bl	sprintf
+	adrp	x2, .LC10
+	add	x2, x2, :lo12:.LC10
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2604]
+	ldr	w3, [x21, 2604]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC11
-	add	x1, x1, :lo12:.LC11
-	bl	sprintf
+	adrp	x2, .LC11
+	add	x2, x2, :lo12:.LC11
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2608]
+	ldr	w3, [x21, 2608]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC12
-	add	x1, x1, :lo12:.LC12
-	bl	sprintf
+	adrp	x2, .LC12
+	add	x2, x2, :lo12:.LC12
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2612]
+	ldr	w3, [x21, 2612]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC13
-	add	x1, x1, :lo12:.LC13
-	lsr	w2, w2, 11
-	bl	sprintf
-	ldr	w2, [x21, 2616]
+	adrp	x2, .LC13
+	add	x2, x2, :lo12:.LC13
+	lsr	w3, w3, 11
+	bl	snprintf
+	ldr	w3, [x21, 2616]
 	add	x20, x20, x0, sxtw
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC14
-	add	x1, x1, :lo12:.LC14
-	lsr	w2, w2, 11
-	bl	sprintf
-	ldr	w2, [x21, 2620]
+	adrp	x2, .LC14
+	add	x2, x2, :lo12:.LC14
+	lsr	w3, w3, 11
+	bl	snprintf
+	ldr	w3, [x21, 2620]
 	add	x20, x20, x0, sxtw
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC15
-	add	x1, x1, :lo12:.LC15
-	bl	sprintf
+	adrp	x2, .LC15
+	add	x2, x2, :lo12:.LC15
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2624]
+	ldr	w3, [x21, 2624]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC16
-	add	x1, x1, :lo12:.LC16
-	bl	sprintf
+	adrp	x2, .LC16
+	add	x2, x2, :lo12:.LC16
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 166]
+	ldrh	w3, [x21, 166]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC17
-	add	x1, x1, :lo12:.LC17
-	bl	sprintf
+	adrp	x2, .LC17
+	add	x2, x2, :lo12:.LC17
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2416]
+	ldrh	w3, [x21, 2416]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC18
-	add	x1, x1, :lo12:.LC18
-	bl	sprintf
+	adrp	x2, .LC18
+	add	x2, x2, :lo12:.LC18
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2628]
+	ldr	w3, [x21, 2628]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC19
-	add	x1, x1, :lo12:.LC19
-	bl	sprintf
+	adrp	x2, .LC19
+	add	x2, x2, :lo12:.LC19
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2632]
+	ldr	w3, [x21, 2632]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC20
-	add	x1, x1, :lo12:.LC20
-	bl	sprintf
+	adrp	x2, .LC20
+	add	x2, x2, :lo12:.LC20
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2636]
+	ldr	w3, [x21, 2636]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC21
-	add	x1, x1, :lo12:.LC21
-	bl	sprintf
+	adrp	x2, .LC21
+	add	x2, x2, :lo12:.LC21
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2640]
+	ldr	w3, [x21, 2640]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC22
-	add	x1, x1, :lo12:.LC22
-	bl	sprintf
+	adrp	x2, .LC22
+	add	x2, x2, :lo12:.LC22
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2644]
+	ldr	w3, [x21, 2644]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC23
-	add	x1, x1, :lo12:.LC23
-	bl	sprintf
+	adrp	x2, .LC23
+	add	x2, x2, :lo12:.LC23
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 2648]
+	ldr	w3, [x21, 2648]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC24
-	add	x1, x1, :lo12:.LC24
-	bl	sprintf
+	adrp	x2, .LC24
+	add	x2, x2, :lo12:.LC24
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2342]
+	ldrh	w3, [x21, 2342]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC25
-	add	x1, x1, :lo12:.LC25
-	bl	sprintf
+	adrp	x2, .LC25
+	add	x2, x2, :lo12:.LC25
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2340]
+	ldrh	w3, [x21, 2340]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC26
-	add	x1, x1, :lo12:.LC26
-	bl	sprintf
+	adrp	x2, .LC26
+	add	x2, x2, :lo12:.LC26
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 144]
+	ldr	w3, [x21, 144]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC27
-	add	x1, x1, :lo12:.LC27
-	bl	sprintf
+	adrp	x2, .LC27
+	add	x2, x2, :lo12:.LC27
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 136]
+	ldr	w3, [x21, 136]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC28
-	add	x1, x1, :lo12:.LC28
-	bl	sprintf
+	adrp	x2, .LC28
+	add	x2, x2, :lo12:.LC28
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 32]
+	ldr	w3, [x21, 32]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC29
-	add	x1, x1, :lo12:.LC29
-	bl	sprintf
+	adrp	x2, .LC29
+	add	x2, x2, :lo12:.LC29
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 262]
+	ldrh	w3, [x21, 262]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC30
-	add	x1, x1, :lo12:.LC30
-	bl	sprintf
+	adrp	x2, .LC30
+	add	x2, x2, :lo12:.LC30
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 44]
+	ldrh	w3, [x21, 44]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC31
-	add	x1, x1, :lo12:.LC31
-	bl	sprintf
+	adrp	x2, .LC31
+	add	x2, x2, :lo12:.LC31
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2652]
+	ldrh	w3, [x21, 2652]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC32
-	add	x1, x1, :lo12:.LC32
-	bl	sprintf
+	adrp	x2, .LC32
+	add	x2, x2, :lo12:.LC32
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w2, [x21, 48]
+	ldr	w3, [x21, 48]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC33
-	add	x1, x1, :lo12:.LC33
-	bl	sprintf
+	adrp	x2, .LC33
+	add	x2, x2, :lo12:.LC33
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2656]
+	ldrh	w3, [x21, 2656]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC34
-	add	x1, x1, :lo12:.LC34
-	bl	sprintf
+	adrp	x2, .LC34
+	add	x2, x2, :lo12:.LC34
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 160]
+	ldrh	w3, [x21, 160]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC35
-	add	x1, x1, :lo12:.LC35
-	bl	sprintf
+	adrp	x2, .LC35
+	add	x2, x2, :lo12:.LC35
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2426]
+	ldrh	w3, [x21, 2426]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC36
-	add	x1, x1, :lo12:.LC36
-	bl	sprintf
+	adrp	x2, .LC36
+	add	x2, x2, :lo12:.LC36
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2430]
+	ldrb	w3, [x21, 2430]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC37
-	add	x1, x1, :lo12:.LC37
-	bl	sprintf
+	adrp	x2, .LC37
+	add	x2, x2, :lo12:.LC37
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2424]
+	ldrh	w3, [x21, 2424]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC38
-	add	x1, x1, :lo12:.LC38
-	bl	sprintf
+	adrp	x2, .LC38
+	add	x2, x2, :lo12:.LC38
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2432]
+	ldrb	w3, [x21, 2432]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC39
-	add	x1, x1, :lo12:.LC39
-	bl	sprintf
+	adrp	x2, .LC39
+	add	x2, x2, :lo12:.LC39
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2428]
+	ldrh	w3, [x21, 2428]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC40
-	add	x1, x1, :lo12:.LC40
-	bl	sprintf
+	adrp	x2, .LC40
+	add	x2, x2, :lo12:.LC40
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x21, 2424]
+	adrp	x2, .LC41
 	ldr	x0, [x21, 2376]
-	ldrh	w2, [x0, x1, lsl 1]
+	add	x2, x2, :lo12:.LC41
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC41
-	add	x1, x1, :lo12:.LC41
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2474]
+	ldrh	w3, [x21, 2474]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC42
-	add	x1, x1, :lo12:.LC42
-	bl	sprintf
+	adrp	x2, .LC42
+	add	x2, x2, :lo12:.LC42
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2478]
+	ldrb	w3, [x21, 2478]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC43
-	add	x1, x1, :lo12:.LC43
-	bl	sprintf
+	adrp	x2, .LC43
+	add	x2, x2, :lo12:.LC43
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2472]
+	ldrh	w3, [x21, 2472]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC44
-	add	x1, x1, :lo12:.LC44
-	bl	sprintf
+	adrp	x2, .LC44
+	add	x2, x2, :lo12:.LC44
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2480]
+	ldrb	w3, [x21, 2480]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC45
-	add	x1, x1, :lo12:.LC45
-	bl	sprintf
+	adrp	x2, .LC45
+	add	x2, x2, :lo12:.LC45
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2476]
+	ldrh	w3, [x21, 2476]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC46
-	add	x1, x1, :lo12:.LC46
-	bl	sprintf
+	adrp	x2, .LC46
+	add	x2, x2, :lo12:.LC46
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x21, 2472]
+	adrp	x2, .LC47
 	ldr	x0, [x21, 2376]
-	ldrh	w2, [x0, x1, lsl 1]
+	add	x2, x2, :lo12:.LC47
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC47
-	add	x1, x1, :lo12:.LC47
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2522]
+	ldrh	w3, [x21, 2522]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC48
-	add	x1, x1, :lo12:.LC48
-	bl	sprintf
+	adrp	x2, .LC48
+	add	x2, x2, :lo12:.LC48
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2526]
+	ldrb	w3, [x21, 2526]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC49
-	add	x1, x1, :lo12:.LC49
-	bl	sprintf
+	adrp	x2, .LC49
+	add	x2, x2, :lo12:.LC49
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2520]
+	ldrh	w3, [x21, 2520]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC50
-	add	x1, x1, :lo12:.LC50
-	bl	sprintf
+	adrp	x2, .LC50
+	add	x2, x2, :lo12:.LC50
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2528]
+	ldrb	w3, [x21, 2528]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC51
-	add	x1, x1, :lo12:.LC51
-	bl	sprintf
+	adrp	x2, .LC51
+	add	x2, x2, :lo12:.LC51
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2524]
+	ldrh	w3, [x21, 2524]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC52
-	add	x1, x1, :lo12:.LC52
-	bl	sprintf
+	adrp	x2, .LC52
+	add	x2, x2, :lo12:.LC52
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2674]
+	ldrh	w3, [x21, 2674]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC53
-	add	x1, x1, :lo12:.LC53
-	bl	sprintf
+	adrp	x2, .LC53
+	add	x2, x2, :lo12:.LC53
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2678]
+	ldrb	w3, [x21, 2678]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC54
-	add	x1, x1, :lo12:.LC54
-	bl	sprintf
+	adrp	x2, .LC54
+	add	x2, x2, :lo12:.LC54
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2672]
+	ldrh	w3, [x21, 2672]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC55
-	add	x1, x1, :lo12:.LC55
-	bl	sprintf
+	adrp	x2, .LC55
+	add	x2, x2, :lo12:.LC55
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x21, 2680]
+	ldrb	w3, [x21, 2680]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC56
-	add	x1, x1, :lo12:.LC56
-	bl	sprintf
+	adrp	x2, .LC56
+	add	x2, x2, :lo12:.LC56
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x21, 2676]
+	ldrh	w3, [x21, 2676]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC57
-	add	x1, x1, :lo12:.LC57
-	bl	sprintf
+	adrp	x2, .LC57
+	add	x2, x2, :lo12:.LC57
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldr	w4, [x21, 2796]
-	adrp	x1, .LC58
-	ldr	w3, [x21, 2804]
-	add	x1, x1, :lo12:.LC58
-	ldr	w2, [x21, 2800]
+	ldr	w5, [x21, 2796]
+	mov	x1, 64
+	ldr	w4, [x21, 2804]
+	adrp	x2, .LC58
+	ldr	w3, [x21, 2800]
+	add	x2, x2, :lo12:.LC58
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x19, x20, x0, sxtw
-	ldr	w2, [x21, 2792]
+	ldr	w3, [x21, 2792]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC59
-	add	x1, x1, :lo12:.LC59
-	bl	sprintf
+	adrp	x2, .LC59
+	add	x2, x2, :lo12:.LC59
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldr	w2, [x21, 2816]
+	ldr	w3, [x21, 2816]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC60
-	add	x1, x1, :lo12:.LC60
-	bl	sprintf
+	adrp	x2, .LC60
+	add	x2, x2, :lo12:.LC60
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldrh	w2, [x21, 3232]
+	ldrh	w3, [x21, 3232]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC61
-	add	x1, x1, :lo12:.LC61
-	bl	sprintf
+	adrp	x2, .LC61
+	add	x2, x2, :lo12:.LC61
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldrh	w2, [x21, 3234]
+	ldrh	w3, [x21, 3234]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC62
-	add	x1, x1, :lo12:.LC62
-	bl	sprintf
+	adrp	x2, .LC62
+	add	x2, x2, :lo12:.LC62
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldr	w2, [x21, 3236]
+	ldr	w3, [x21, 3236]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC63
-	add	x1, x1, :lo12:.LC63
-	bl	sprintf
+	adrp	x2, .LC63
+	add	x2, x2, :lo12:.LC63
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldrh	w2, [x21, 3240]
-	adrp	x1, .LC64
-	add	x1, x1, :lo12:.LC64
+	ldrh	w3, [x21, 3240]
+	adrp	x2, .LC64
+	add	x2, x2, :lo12:.LC64
+	mov	x1, 64
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	bl	GetFreeBlockMinEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC65
+	and	w3, w0, 65535
+	mov	x1, 64
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC65
-	bl	sprintf
+	adrp	x2, .LC65
+	add	x2, x2, :lo12:.LC65
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w0, [x21, 2416]
 	bl	GetFreeBlockMaxEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC66
+	and	w3, w0, 65535
+	adrp	x2, .LC66
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC66
-	bl	sprintf
+	add	x2, x2, :lo12:.LC66
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
@@ -1928,43 +1991,45 @@ FtlPrintInfo2buf:
 	beq	.L212
 	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
-	ldrh	w2, [x1, x0]
+	adrp	x2, .LC67
+	add	x2, x2, :lo12:.LC67
+	ldrh	w3, [x1, x0]
 	mov	x0, x19
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
-	bl	sprintf
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 .L212:
 	mov	w0, 0
 	adrp	x24, .LC68
 	bl	List_get_gc_head_node
 	add	x21, x23, :lo12:.LANCHOR0
-	and	w3, w0, 65535
+	and	w4, w0, 65535
 	add	x24, x24, :lo12:.LC68
 	mov	w20, 0
 	mov	w27, 65535
 	mov	w26, 6
 .L214:
-	cmp	w3, w27
+	cmp	w4, w27
 	beq	.L213
-	umull	x25, w3, w26
+	umull	x25, w4, w26
 	ldr	x0, [x21, 2360]
 	ldr	x2, [x21, 2376]
-	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x21, 2384]
+	ubfiz	x1, x4, 1, 16
+	ldr	x3, [x21, 2384]
 	add	x0, x0, x25
-	ldrh	w5, [x0, 4]
+	ldrh	w5, [x2, x1]
+	mov	x2, x24
+	ldrh	w7, [x3, x1]
+	mov	w3, w20
+	ldrh	w6, [x0, 4]
+	mov	x1, 64
 	mov	x0, x19
-	ldrh	w6, [x4, x1]
-	ldrh	w4, [x2, x1]
-	mov	w2, w20
-	mov	x1, x24
 	add	w20, w20, 1
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldr	x0, [x21, 2360]
 	cmp	w20, 16
-	ldrh	w3, [x0, x25]
+	ldrh	w4, [x0, x25]
 	bne	.L214
 .L213:
 	add	x23, x23, :lo12:.LANCHOR0
@@ -1974,48 +2039,53 @@ FtlPrintInfo2buf:
 	mov	w25, 65535
 	mov	w26, 6
 	ldr	x0, [x23, 2360]
-	ldr	x3, [x23, 2408]
-	sub	x3, x3, x0
+	ldr	x4, [x23, 2408]
+	sub	x4, x4, x0
 	mov	x0, -6148914691236517206
-	asr	x3, x3, 1
+	asr	x4, x4, 1
 	movk	x0, 0xaaab, lsl 0
-	mul	x3, x3, x0
-	and	w3, w3, 65535
+	mul	x4, x4, x0
+	and	w4, w4, 65535
 .L216:
-	cmp	w3, w25
+	cmp	w4, w25
 	beq	.L215
-	umull	x24, w3, w26
+	umull	x24, w4, w26
 	ldr	x0, [x23, 2360]
 	ldr	x2, [x23, 2384]
-	ubfiz	x1, x3, 1, 16
+	ubfiz	x1, x4, 1, 16
 	add	x0, x0, x24
-	ldrh	w5, [x2, x1]
-	mov	w2, w20
-	ldrh	w4, [x0, 4]
-	mov	x1, x21
-	mov	x0, x19
+	mov	w3, w20
 	add	w20, w20, 1
-	bl	sprintf
+	ldrh	w6, [x2, x1]
+	mov	x2, x21
+	ldrh	w5, [x0, 4]
+	mov	x1, 64
+	mov	x0, x19
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	cmp	w20, 4
 	beq	.L215
 	ldr	x0, [x23, 2360]
-	ldrh	w3, [x0, x24]
+	ldrh	w4, [x0, x24]
 	b	.L216
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.align	2
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
+	cmp	w0, 2047
+	ble	.L224
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LC70
-	adrp	x1, .LC71
-	add	x2, x2, :lo12:.LC70
+	adrp	x3, .LC70
+	adrp	x2, .LC71
+	add	x3, x3, :lo12:.LC70
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LC71
+	add	x2, x2, :lo12:.LC71
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	bl	sprintf
+	mov	x20, x1
+	mov	x1, 64
+	mov	x0, x20
+	bl	snprintf
 	add	x19, x20, x0, sxtw
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
@@ -2024,6 +2094,9 @@ rknand_proc_ftlread:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
+.L224:
+	mov	w0, 0
+	ret
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.align	2
 	.global	GetSwlReplaceBlock
@@ -2037,14 +2110,14 @@ GetSwlReplaceBlock:
 	ldr	w2, [x0, 2636]
 	ldr	w1, [x0, 2648]
 	cmp	w2, w1
-	bcs	.L225
+	bcs	.L230
 	ldrh	w2, [x0, 44]
 	mov	x1, 0
 	ldr	x4, [x0, 2384]
 	str	wzr, [x0, 2628]
-.L226:
+.L231:
 	cmp	w2, w1
-	bhi	.L227
+	bhi	.L232
 	add	x1, x8, :lo12:.LANCHOR0
 	ldr	w0, [x1, 2628]
 	udiv	w2, w0, w2
@@ -2054,50 +2127,50 @@ GetSwlReplaceBlock:
 	ldrh	w2, [x1, 96]
 	udiv	w0, w0, w2
 	str	w0, [x1, 2628]
-.L228:
+.L233:
 	add	x1, x8, :lo12:.LANCHOR0
 	ldr	w9, [x1, 2648]
 	ldr	w11, [x1, 2636]
 	add	w0, w9, 256
 	cmp	w0, w11
-	bls	.L233
+	bls	.L238
 	ldr	w1, [x1, 2644]
 	add	w0, w9, 768
 	cmp	w0, w1
-	bls	.L233
-.L235:
+	bls	.L238
+.L240:
 	mov	w20, 65535
-.L234:
+.L239:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L227:
+.L232:
 	ldrh	w3, [x4, x1, lsl 1]
 	add	x1, x1, 1
 	ldr	w5, [x0, 2628]
 	add	w3, w3, w5
 	str	w3, [x0, 2628]
-	b	.L226
-.L225:
+	b	.L231
+.L230:
 	ldr	w1, [x0, 2644]
 	cmp	w2, w1
-	bls	.L228
+	bls	.L233
 	add	w1, w1, 1
 	str	w1, [x0, 2644]
 	mov	w1, 0
-.L230:
+.L235:
 	ldrh	w2, [x0, 44]
 	cmp	w1, w2
-	bcs	.L228
+	bcs	.L233
 	ldr	x4, [x0, 2384]
 	ubfiz	x3, x1, 1, 32
 	add	w1, w1, 1
 	ldrh	w2, [x4, x3]
 	add	w2, w2, 1
 	strh	w2, [x4, x3]
-	b	.L230
-.L233:
+	b	.L235
+.L238:
 	add	x10, x8, :lo12:.LANCHOR0
 	ldrh	w0, [x10, 2416]
 	add	w0, w0, w0, lsl 1
@@ -2106,9 +2179,9 @@ GetSwlReplaceBlock:
 	and	w6, w0, 65535
 	add	w0, w9, 64
 	cmp	w6, w0
-	bcc	.L235
+	bcc	.L240
 	ldr	x0, [x10, 2368]
-	cbz	x0, .L235
+	cbz	x0, .L240
 	mov	w4, 65535
 	ldrh	w12, [x10, 44]
 	mov	x13, -6148914691236517206
@@ -2119,39 +2192,39 @@ GetSwlReplaceBlock:
 	mov	w1, 0
 	movk	x13, 0xaaab, lsl 0
 	mov	w14, 6
-.L236:
+.L241:
 	ldrh	w3, [x0]
 	cmp	w3, w10
-	bne	.L239
+	bne	.L244
 	mov	w20, w2
-.L238:
+.L243:
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L235
+	beq	.L240
 	ubfiz	x7, x20, 1, 32
 	ldrh	w3, [x5, x7]
 	cmp	w9, w3
-	bcs	.L240
+	bcs	.L245
 	bl	GetFreeBlockMinEraseCount
 	cmp	w9, w0, uxth
-	bcs	.L240
+	bcs	.L245
 	add	x0, x8, :lo12:.LANCHOR0
 	str	w4, [x0, 2648]
-.L240:
+.L245:
 	cmp	w11, w3
-	bls	.L235
+	bls	.L240
 	add	w0, w3, 128
 	cmp	w6, w0
-	ble	.L235
+	ble	.L240
 	add	w0, w3, 256
 	cmp	w11, w0
-	bhi	.L241
+	bhi	.L246
 	add	x0, x8, :lo12:.LANCHOR0
 	add	w3, w3, 768
 	ldr	w0, [x0, 2644]
 	cmp	w3, w0
-	bcs	.L235
-.L241:
+	bcs	.L240
+.L246:
 	add	x19, x8, :lo12:.LANCHOR0
 	ldrh	w5, [x5, x7]
 	mov	w2, w11
@@ -2164,14 +2237,14 @@ GetSwlReplaceBlock:
 	bl	sftl_printk
 	mov	w0, 1
 	str	w0, [x19, 3244]
-	b	.L234
-.L239:
+	b	.L239
+.L244:
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	cmp	w1, w12
-	bhi	.L235
+	bhi	.L240
 	ldrh	w15, [x0, 4]
-	cbz	w15, .L237
+	cbz	w15, .L242
 	sub	x0, x0, x7
 	asr	x0, x0, 1
 	mul	x0, x0, x13
@@ -2179,14 +2252,14 @@ GetSwlReplaceBlock:
 	and	x0, x0, 65535
 	ldrh	w0, [x5, x0, lsl 1]
 	cmp	w9, w0
-	bcs	.L238
+	bcs	.L243
 	cmp	w4, w0
-	bls	.L237
+	bls	.L242
 	mov	w4, w0
 	mov	w2, w20
-.L237:
+.L242:
 	umaddl	x0, w3, w14, x7
-	b	.L236
+	b	.L241
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.align	2
 	.global	free_data_superblock
@@ -2195,7 +2268,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L252
+	beq	.L257
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR0+2376
 	ubfiz	x1, x0, 1, 16
@@ -2206,7 +2279,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L252:
+.L257:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2222,7 +2295,7 @@ get_new_active_ppa:
 	ldrh	w1, [x0]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L256
+	bne	.L261
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -2230,13 +2303,13 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L256:
+.L261:
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, 106]
 	cmp	w1, w0
-	bne	.L257
+	bne	.L262
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -2244,9 +2317,9 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L257:
+.L262:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L258
+	cbnz	w0, .L263
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -2254,7 +2327,7 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L258:
+.L263:
 	ldrb	w0, [x19, 6]
 	add	x1, x20, :lo12:.LANCHOR0
 	strb	wzr, [x19, 10]
@@ -2262,9 +2335,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, 36]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L259:
+.L264:
 	cmp	w0, w1
-	beq	.L261
+	beq	.L266
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2273,27 +2346,27 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L263:
+.L268:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L262
+	bne	.L267
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L262:
+.L267:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L263
+	beq	.L268
 	add	x20, x20, :lo12:.LANCHOR0
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, 106]
 	cmp	w2, w0
-	bne	.L255
-	cbz	w1, .L255
+	bne	.L260
+	cbz	w1, .L260
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -2301,28 +2374,28 @@ get_new_active_ppa:
 	add	x1, x1, 136
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L255:
+.L260:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L261:
+.L266:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L260
+	bne	.L265
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L260:
+.L265:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L259
+	b	.L264
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.align	2
 	.global	FtlGcBufInit
@@ -2335,19 +2408,19 @@ FtlGcBufInit:
 	mov	w9, 1
 	mov	w5, 4
 	str	wzr, [x1, 3248]
-.L271:
+.L276:
 	ldrh	w2, [x1, 36]
 	cmp	w3, w2
-	bcc	.L272
+	bcc	.L277
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w6, 24
 	mov	w5, 4
-.L273:
+.L278:
 	ldr	w1, [x0, 3288]
 	cmp	w2, w1
-	bcc	.L274
+	bcc	.L279
 	ret
-.L272:
+.L277:
 	umull	x4, w3, w8
 	ldr	x6, [x1, 3256]
 	ldr	x7, [x1, 3264]
@@ -2375,8 +2448,8 @@ FtlGcBufInit:
 	str	x4, [x2, 8]
 	ldr	x4, [x6, 8]
 	str	x4, [x2, 16]
-	b	.L271
-.L274:
+	b	.L276
+.L279:
 	umull	x4, w2, w6
 	ldr	x3, [x0, 3256]
 	ldr	x7, [x0, 3264]
@@ -2397,7 +2470,7 @@ FtlGcBufInit:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 8]
-	b	.L273
+	b	.L278
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.align	2
 	.global	FtlGcBufFree
@@ -2409,31 +2482,31 @@ FtlGcBufFree:
 	mov	w8, 24
 	ldr	w7, [x2, 3288]
 	ldr	x5, [x2, 3256]
-.L276:
+.L281:
 	cmp	w3, w1
-	bcs	.L275
+	bcs	.L280
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L281
-.L277:
+	b	.L286
+.L282:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L281:
+.L286:
 	cmp	w2, w7
-	bcs	.L278
+	bcs	.L283
 	umull	x6, w2, w8
 	add	x9, x5, x6
 	ldr	x10, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x10, x6
-	bne	.L277
+	bne	.L282
 	str	wzr, [x9, 16]
-.L278:
+.L283:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L276
-.L275:
+	b	.L281
+.L280:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.align	2
@@ -2447,20 +2520,20 @@ FtlGcBufAlloc:
 	mov	w8, 1
 	ldr	w5, [x2, 3288]
 	ldr	x6, [x2, 3256]
-.L283:
+.L288:
 	cmp	w3, w1
-	bcs	.L282
+	bcs	.L287
 	mov	w2, 0
-	b	.L288
-.L284:
+	b	.L293
+.L289:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L288:
+.L293:
 	cmp	w2, w5
-	bcs	.L285
+	bcs	.L290
 	umaddl	x4, w2, w7, x6
 	ldr	w9, [x4, 16]
-	cbnz	w9, .L284
+	cbnz	w9, .L289
 	ubfiz	x2, x3, 5, 16
 	ldr	x9, [x4]
 	add	x2, x0, x2
@@ -2468,11 +2541,11 @@ FtlGcBufAlloc:
 	str	x9, [x2, 8]
 	ldr	x4, [x4, 8]
 	str	x4, [x2, 16]
-.L285:
+.L290:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L283
-.L282:
+	b	.L288
+.L287:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.align	2
@@ -2485,17 +2558,17 @@ IsBlkInGcList:
 	ldrh	w2, [x1, 3292]
 	ldr	x3, [x1, 3296]
 	mov	x1, 0
-.L290:
+.L295:
 	cmp	w2, w1, uxth
-	bhi	.L292
+	bhi	.L297
 	mov	w0, 0
 	ret
-.L292:
+.L297:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L290
+	bne	.L295
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2516,25 +2589,25 @@ FtlGcUpdatePage:
 	ldrh	w1, [x4, 3292]
 	ldr	x6, [x4, 3296]
 	mov	x4, 0
-.L295:
+.L300:
 	and	w2, w4, 65535
 	cmp	w2, w1
-	bcc	.L297
-	bne	.L296
+	bcc	.L302
+	bne	.L301
 	and	x4, x4, 65535
 	strh	w0, [x6, x4, lsl 1]
 	add	x4, x3, :lo12:.LANCHOR0
 	ldrh	w0, [x4, 3292]
 	add	w0, w0, 1
 	strh	w0, [x4, 3292]
-	b	.L296
-.L297:
+	b	.L301
+.L302:
 	add	x4, x4, 1
 	add	x2, x6, x4, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w9
-	bne	.L295
-.L296:
+	bne	.L300
+.L301:
 	add	x0, x3, :lo12:.LANCHOR0
 	mov	w1, 12
 	ldrh	w3, [x0, 3304]
@@ -2568,40 +2641,40 @@ FtlGcRefreshBlock:
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w5, [x0, 3320]
 	cmp	w19, w5
-	beq	.L300
+	beq	.L305
 	ldrh	w4, [x0, 3322]
 	cmp	w19, w4
-	beq	.L300
+	beq	.L305
 	ldrh	w3, [x0, 3324]
 	cmp	w19, w3
-	beq	.L300
+	beq	.L305
 	ldrh	w2, [x0, 3326]
 	cmp	w19, w2
-	beq	.L300
+	beq	.L305
 	mov	w1, 65535
 	cmp	w5, w1
-	bne	.L301
+	bne	.L306
 	strh	w19, [x0, 3320]
-.L300:
+.L305:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L301:
+.L306:
 	cmp	w4, w1
-	bne	.L302
+	bne	.L307
 	strh	w19, [x0, 3322]
-	b	.L300
-.L302:
+	b	.L305
+.L307:
 	cmp	w3, w1
-	bne	.L303
+	bne	.L308
 	strh	w19, [x0, 3324]
-	b	.L300
-.L303:
+	b	.L305
+.L308:
 	cmp	w2, w1
-	bne	.L300
+	bne	.L305
 	strh	w19, [x0, 3326]
-	b	.L300
+	b	.L305
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
@@ -2627,24 +2700,24 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x20, -8]
 	mov	x1, 0
-.L306:
+.L311:
 	cmp	w0, w1, uxth
-	bhi	.L308
+	bhi	.L313
 	cmp	w0, 15
-	bhi	.L307
+	bhi	.L312
 	add	x19, x19, :lo12:.LANCHOR0
 	add	w1, w0, 1
 	add	x19, x19, 3336
 	strh	w1, [x19, -8]
 	strh	w21, [x19, w0, sxtw 1]
-	b	.L307
-.L308:
+	b	.L312
+.L313:
 	add	x1, x1, 1
 	add	x2, x20, x1, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w21
-	bne	.L306
-.L307:
+	bne	.L311
+.L312:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2661,16 +2734,16 @@ FtlGcReFreshBadBlk:
 	adrp	x19, .LANCHOR0
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3328]
-	cbz	w1, .L311
+	cbz	w1, .L316
 	ldrh	w3, [x0, 3320]
 	mov	w2, 65535
 	cmp	w3, w2
-	bne	.L311
+	bne	.L316
 	ldrh	w2, [x0, 3370]
 	cmp	w2, w1
-	bcc	.L312
+	bcc	.L317
 	strh	wzr, [x0, 3370]
-.L312:
+.L317:
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x0, x19, 3336
 	ldrh	w1, [x19, 3370]
@@ -2680,7 +2753,7 @@ FtlGcReFreshBadBlk:
 	ldrh	w0, [x19, 3370]
 	add	w0, w0, 1
 	strh	w0, [x19, 3370]
-.L311:
+.L316:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2732,9 +2805,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x28, .LC77
-.L322:
+.L327:
 	cmp	w26, w19
-	bhi	.L328
+	bhi	.L333
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	sftl_printk
@@ -2745,42 +2818,42 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L328:
-	cbnz	w20, .L323
+.L333:
+	cbnz	w20, .L328
 	mov	w3, w22
 	mov	x2, x21
 	mov	x1, x27
 	mov	x0, x24
 	bl	sftl_printk
-.L323:
+.L328:
 	cmp	w23, 4
-	bne	.L324
+	bne	.L329
 	ldr	w1, [x21, x19, lsl 2]
 	adrp	x0, .LC76
 	add	x0, x0, :lo12:.LC76
-.L330:
+.L335:
 	bl	sftl_printk
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L327
+	bls	.L332
 	mov	w20, 0
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	sftl_printk
-.L327:
+.L332:
 	add	x19, x19, 1
 	add	w22, w22, w23
-	b	.L322
-.L324:
+	b	.L327
+.L329:
 	cmp	w23, 2
-	bne	.L326
+	bne	.L331
 	ldrh	w1, [x21, x19, lsl 1]
 	add	x0, x28, :lo12:.LC77
-	b	.L330
-.L326:
+	b	.L335
+.L331:
 	ldrb	w1, [x21, x19]
 	mov	x0, x25
-	b	.L330
+	b	.L335
 	.size	rknand_print_hex, .-rknand_print_hex
 	.align	2
 	.global	FlashReadPages
@@ -2803,9 +2876,9 @@ FlashReadPages:
 	add	x23, x0, x1
 	add	x20, x20, 160
 	add	x21, x21, :lo12:.LC1
-.L332:
+.L337:
 	cmp	x19, x23
-	bne	.L339
+	bne	.L344
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2813,17 +2886,17 @@ FlashReadPages:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L339:
+.L344:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L333
+	cbz	x0, .L338
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L334
-.L333:
+	cbnz	x0, .L339
+.L338:
 	mov	w2, 101
 	mov	x1, x20
 	mov	x0, x21
 	bl	sftl_printk
-.L334:
+.L339:
 	ldr	w0, [x19, 4]
 	add	x26, x22, :lo12:.LANCHOR0
 	add	x2, x29, 88
@@ -2837,7 +2910,7 @@ FlashReadPages:
 	str	w0, [x19]
 	ldrh	w0, [x26, 14]
 	cmp	w0, 4
-	bne	.L336
+	bne	.L341
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x26, 3400]
 	ldp	x2, x3, [x19, 8]
@@ -2847,23 +2920,23 @@ FlashReadPages:
 	add	w1, w25, w1
 	blr	x4
 	cmn	w0, #1
-	beq	.L337
+	beq	.L342
 	ldr	x0, [x19, 16]
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L336
+	bne	.L341
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L336
+	bne	.L341
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L336
-.L337:
+	beq	.L341
+.L342:
 	mov	w0, -1
 	str	w0, [x19]
-.L336:
+.L341:
 	add	x19, x19, 32
-	b	.L332
+	b	.L337
 	.size	FlashReadPages, .-FlashReadPages
 	.align	2
 	.global	FtlLoadFactoryBbt
@@ -2886,10 +2959,10 @@ FtlLoadFactoryBbt:
 	ldr	x1, [x0, 3440]
 	ldr	x24, [x0, 3448]
 	stp	x1, x24, [x23, 8]
-.L351:
+.L356:
 	ldrh	w0, [x19, 58]
 	cmp	w21, w0
-	bcc	.L356
+	bcc	.L361
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2897,17 +2970,17 @@ FtlLoadFactoryBbt:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L356:
+.L361:
 	ldrh	w20, [x19, 102]
 	mov	w0, -1
 	strh	w0, [x22]
-.L353:
+.L358:
 	ldrh	w0, [x19, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	sub	w1, w0, #16
 	cmp	w20, w1
-	ble	.L354
+	ble	.L359
 	madd	w0, w0, w21, w20
 	mov	w2, 1
 	mov	w1, w2
@@ -2917,15 +2990,15 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L353
+	beq	.L358
 	ldrh	w0, [x24]
 	cmp	w0, w26
-	bne	.L353
+	bne	.L358
 	strh	w20, [x22]
-.L354:
+.L359:
 	add	w21, w21, 1
 	add	x22, x22, 2
-	b	.L351
+	b	.L356
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.align	2
 	.global	FtlGetLastWrittenPage
@@ -2940,9 +3013,9 @@ FtlGetLastWrittenPage:
 	adrp	x1, .LANCHOR0
 	stp	x21, x22, [sp, 32]
 	add	x1, x1, :lo12:.LANCHOR0
-	bne	.L362
+	bne	.L367
 	ldrh	w19, [x1, 108]
-.L363:
+.L368:
 	sub	w19, w19, #1
 	adrp	x1, ftl_temp_buf
 	sxth	w19, w19
@@ -2959,23 +3032,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L364
+	bne	.L369
 	mov	w22, 0
 	mov	w24, 2
-.L365:
+.L370:
 	cmp	w22, w19
-	ble	.L368
-.L364:
+	ble	.L373
+.L369:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L362:
+.L367:
 	ldrh	w19, [x1, 106]
-	b	.L363
-.L368:
+	b	.L368
+.L373:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -2987,20 +3060,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L366
+	bne	.L371
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L366
+	bne	.L371
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L366
+	beq	.L371
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L365
-.L366:
+	b	.L370
+.L371:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L365
+	b	.L370
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.align	2
 	.global	FlashProgPages
@@ -3027,11 +3100,11 @@ FlashProgPages:
 	mov	x19, x0
 	add	x22, x22, 176
 	add	x23, x23, :lo12:.LC1
-.L374:
+.L379:
 	cmp	x19, x24
-	bne	.L382
-	cbnz	w26, .L383
-.L401:
+	bne	.L387
+	cbnz	w26, .L388
+.L406:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3040,17 +3113,17 @@ FlashProgPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L382:
+.L387:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L375
+	cbz	x0, .L380
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L376
-.L375:
+	cbnz	x0, .L381
+.L380:
 	mov	w2, 131
 	mov	x1, x22
 	mov	x0, x23
 	bl	sftl_printk
-.L376:
+.L381:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
@@ -3061,13 +3134,13 @@ FlashProgPages:
 	ldr	x4, [x0, 3392]
 	ldrb	w0, [x29, 104]
 	blr	x4
-	cbnz	w0, .L377
+	cbnz	w0, .L382
 	str	wzr, [x19]
-.L378:
+.L383:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 14]
 	cmp	w1, 4
-	bne	.L380
+	bne	.L385
 	ldr	x4, [x0, 3392]
 	ldrb	w0, [x29, 104]
 	ldp	x2, x3, [x19, 8]
@@ -3076,17 +3149,17 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-	cbz	w0, .L380
+	cbz	w0, .L385
 	mov	w0, -1
 	str	w0, [x19]
-.L380:
+.L385:
 	add	x19, x19, 32
-	b	.L374
-.L377:
+	b	.L379
+.L382:
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L378
-.L387:
+	b	.L383
+.L392:
 	str	wzr, [x21]
 	mov	w2, w25
 	str	wzr, [x23]
@@ -3098,50 +3171,50 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w24, [x29, 112]
 	cmn	w24, #1
-	bne	.L384
+	bne	.L389
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	sftl_printk
 	str	w24, [x20]
-.L384:
+.L389:
 	ldr	x0, [x20, 16]
-	cbz	x0, .L385
+	cbz	x0, .L390
 	ldr	w2, [x0]
 	ldr	w3, [x21]
 	cmp	w2, w3
-	beq	.L385
+	beq	.L390
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L385:
+.L390:
 	ldr	x0, [x20, 8]
-	cbz	x0, .L386
+	cbz	x0, .L391
 	ldr	w3, [x22, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L386
+	beq	.L391
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC82
 	add	x0, x0, :lo12:.LC82
 	bl	sftl_printk
 	mov	w0, -1
 	str	w0, [x20]
-.L386:
+.L391:
 	add	x20, x20, 32
-.L402:
+.L407:
 	cmp	x20, x19
-	bne	.L387
-	b	.L401
-.L383:
+	bne	.L392
+	b	.L406
+.L388:
 	add	x21, x21, :lo12:.LANCHOR0
 	adrp	x22, check_buf
 	add	x21, x21, 3456
 	add	x23, x22, :lo12:check_buf
-	b	.L402
+	b	.L407
 	.size	FlashProgPages, .-FlashProgPages
 	.align	2
 	.global	FlashEraseBlocks
@@ -3160,16 +3233,16 @@ FlashEraseBlocks:
 	add	x22, x0, x2
 	mov	w21, -1
 	ldrh	w23, [x19, 12]
-.L405:
+.L410:
 	cmp	x20, x22
-	bne	.L411
+	bne	.L416
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L411:
+.L416:
 	ldr	w0, [x20]
 	add	x2, x29, 72
 	add	x1, x29, 76
@@ -3183,17 +3256,17 @@ FlashEraseBlocks:
 	str	w0, [x20, -4]
 	ldrh	w0, [x19, 14]
 	cmp	w0, 4
-	bne	.L409
+	bne	.L414
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x19, 3384]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-	cbz	w0, .L409
+	cbz	w0, .L414
 	str	w21, [x20, -4]
-.L409:
+.L414:
 	add	x20, x20, 32
-	b	.L405
+	b	.L410
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
@@ -3207,15 +3280,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w21, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L416
+	bcc	.L421
 	adrp	x0, .LANCHOR0
 	add	x20, x0, :lo12:.LANCHOR0
 	mov	x19, x0
 	ldrh	w2, [x20, 262]
 	cmp	w2, 1024
-	beq	.L416
+	beq	.L421
 	and	w1, w1, 65535
-	cbz	w1, .L418
+	cbz	w1, .L423
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w22, w0, 65535
@@ -3234,7 +3307,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x20, 2640]
 	add	w0, w0, 1
 	str	w0, [x20, 2640]
-.L418:
+.L423:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 256
 	ldrh	w1, [x0, 6]
@@ -3246,7 +3319,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w21, [x2, 8]
-.L416:
+.L421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -3273,11 +3346,11 @@ FtlLowFormatEraseBlock:
 	mov	w21, 0
 	mov	w19, 0
 	str	w24, [x5, 3976]
-.L427:
+.L432:
 	ldrh	w0, [x5, 36]
 	cmp	w0, w10
-	bhi	.L431
-	cbz	w21, .L426
+	bhi	.L436
+	cbz	w21, .L431
 	ldr	x0, [x5, 3968]
 	mov	w2, w21
 	mov	w1, 0
@@ -3285,40 +3358,40 @@ FtlLowFormatEraseBlock:
 	mov	x22, 0
 	add	x25, x20, :lo12:.LANCHOR0
 	bl	FlashEraseBlocks
-.L435:
+.L440:
 	ldr	x0, [x25, 3968]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L434
+	bne	.L439
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L434:
+.L439:
 	add	x22, x22, 32
 	cmp	x22, x21
-	bne	.L435
-	cbz	w23, .L448
+	bne	.L440
+	cbz	w23, .L453
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w25, 1
 	ldrh	w26, [x0, 108]
 	lsr	w0, w26, 2
 	str	w0, [x29, 124]
-.L436:
+.L441:
 	add	x27, x20, :lo12:.LANCHOR0
 	mov	w22, 0
 	add	x0, x27, 64
 	str	x0, [x29, 112]
-.L444:
+.L449:
 	mov	w5, 0
 	mov	w21, 0
-.L437:
+.L442:
 	ldrh	w0, [x27, 36]
 	cmp	w0, w5
-	bhi	.L440
-	cbz	w21, .L426
+	bhi	.L445
+	cbz	w21, .L431
 	ldr	x0, [x27, 3968]
 	mov	w1, w21
 	mov	w3, 1
@@ -3326,11 +3399,11 @@ FtlLowFormatEraseBlock:
 	mov	x28, 0
 	bl	FlashProgPages
 	ubfiz	x1, x21, 5, 16
-.L443:
+.L448:
 	ldr	x0, [x27, 3968]
 	add	x3, x0, x28
 	ldr	w0, [x0, x28]
-	cbz	w0, .L442
+	cbz	w0, .L447
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 104]
@@ -3338,40 +3411,40 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 104]
-.L442:
+.L447:
 	add	x28, x28, 32
 	cmp	x1, x28
-	bne	.L443
+	bne	.L448
 	ldr	w0, [x29, 124]
 	add	w22, w22, w0
 	and	w22, w22, 65535
 	cmp	w26, w22
-	bhi	.L444
+	bhi	.L449
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	x22, 0
-.L446:
-	cbz	w23, .L445
+.L451:
+	cbz	w23, .L450
 	ldr	x0, [x26, 3968]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L445
+	cbnz	w0, .L450
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L445:
+.L450:
 	add	x22, x22, 32
 	cmp	x22, x28
-	bne	.L446
+	bne	.L451
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L426
+	beq	.L431
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w2, w21
 	mov	w1, w25
 	ldr	x0, [x20, 3968]
 	bl	FlashEraseBlocks
-.L426:
+.L431:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3380,7 +3453,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L431:
+.L436:
 	ldr	x1, [x5, 3968]
 	ubfiz	x0, x10, 5, 16
 	str	wzr, [x1, x0]
@@ -3389,13 +3462,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L428
+	cbz	w23, .L433
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L429
-.L428:
+	cbnz	w0, .L434
+.L433:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L430
+	cbnz	w0, .L435
 	ldr	x0, [x5, 3968]
 	ubfiz	x2, x21, 5, 16
 	lsl	w6, w6, 10
@@ -3413,21 +3486,21 @@ FtlLowFormatEraseBlock:
 	sdiv	w0, w0, w9
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L429:
+.L434:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L427
-.L430:
+	b	.L432
+.L435:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L429
-.L448:
+	b	.L434
+.L453:
 	mov	w0, 6
 	mov	w25, 0
 	mov	w26, 1
 	str	w0, [x29, 124]
-	b	.L436
-.L440:
+	b	.L441
+.L445:
 	ldr	x1, [x27, 3968]
 	ubfiz	x0, x5, 5, 16
 	str	wzr, [x1, x0]
@@ -3437,13 +3510,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w6, w0, 65535
 	mov	w7, w6
-	cbz	w23, .L438
+	cbz	w23, .L443
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L439
-.L438:
+	cbnz	w0, .L444
+.L443:
 	mov	w0, w7
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L439
+	cbnz	w0, .L444
 	ldr	x0, [x27, 3968]
 	ubfiz	x2, x21, 5, 16
 	add	w6, w22, w6, lsl 10
@@ -3462,10 +3535,10 @@ FtlLowFormatEraseBlock:
 	ldr	x2, [x27, 3984]
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L439:
+.L444:
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L437
+	b	.L442
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
@@ -3481,9 +3554,9 @@ FtlFreeSysBlkQueueOut:
 	adrp	x23, .LC84
 	add	x23, x23, :lo12:.LC84
 	stp	x21, x22, [sp, 32]
-.L470:
+.L475:
 	ldrh	w1, [x20, 6]
-	cbz	w1, .L471
+	cbz	w1, .L476
 	ldrh	w0, [x20, 2]
 	sub	w1, w1, #1
 	strh	w1, [x20, 6]
@@ -3513,26 +3586,26 @@ FtlFreeSysBlkQueueOut:
 	str	w0, [x19, 2640]
 	mov	w0, 65533
 	cmp	w0, w1, uxth
-	bcc	.L472
+	bcc	.L477
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L471:
+.L476:
 	adrp	x0, .LC83
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC83
 	bl	sftl_printk
-.L474:
-	b	.L474
-.L472:
+.L479:
+	b	.L479
+.L477:
 	ldrh	w2, [x20, 6]
 	mov	w1, w21
 	mov	x0, x23
 	bl	sftl_printk
-	b	.L470
+	b	.L475
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
@@ -3546,27 +3619,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldrh	w1, [x0, 10]
 	ldr	x0, [x0, 16]
-.L478:
+.L483:
 	cmp	w20, w1
-	beq	.L482
+	beq	.L487
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L479
+	cbnz	w2, .L484
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L480
+	bcs	.L485
 	adrp	x0, .LANCHOR0+262
 	ldrh	w2, [x0, #:lo12:.LANCHOR0+262]
 	adrp	x0, .LC85
 	add	x0, x0, :lo12:.LC85
 	bl	sftl_printk
-.L481:
-	b	.L481
-.L480:
+.L486:
+	b	.L486
+.L485:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3575,10 +3648,10 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L482:
+.L487:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L484
+	bhi	.L489
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -3586,16 +3659,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, 192
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L484:
+.L489:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L479:
+.L484:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L478
+	b	.L483
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.align	2
 	.global	ftl_memset
@@ -3812,23 +3885,23 @@ FtlMemInit:
 	str	x0, [x19, 192]
 	mov	w2, w4
 	mov	x0, x20
-.L489:
+.L494:
 	cmp	w1, w6
-	bcc	.L490
+	bcc	.L495
 	mov	w2, 8
 	add	x4, x0, :lo12:.LANCHOR0
 	sub	w2, w2, w1
 	add	x4, x4, 160
 	add	x2, x2, 1
 	mov	x3, 0
-.L491:
+.L496:
 	add	x3, x3, 1
 	cmp	x3, x2
-	bne	.L492
+	bne	.L497
 	add	x1, x21, :lo12:.LANCHOR3
 	ldr	x2, [x1, -256]
-	cbnz	x2, .L493
-.L495:
+	cbnz	x2, .L498
+.L500:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x1, x1, 224
@@ -3836,94 +3909,94 @@ FtlMemInit:
 	add	x0, x0, :lo12:.LC86
 	bl	sftl_printk
 	mov	w0, -1
-.L488:
+.L493:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L490:
+.L495:
 	ldr	x3, [x19, 192]
 	add	w1, w1, 1
 	add	x3, x3, x2, uxtw 2
 	add	w2, w2, w4
 	str	x3, [x5], 8
-	b	.L489
-.L492:
+	b	.L494
+.L497:
 	add	x5, x1, x3
 	add	x5, x4, x5, lsl 3
 	str	xzr, [x5, 24]
-	b	.L491
-.L493:
+	b	.L496
+.L498:
 	ldr	x2, [x1, -248]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, -216]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, -208]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	add	x2, x0, :lo12:.LANCHOR0
 	ldr	x3, [x2, 2568]
-	cbz	x3, .L495
+	cbz	x3, .L500
 	ldr	x1, [x1, -200]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x2, 2360]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x2, 192]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x2, 2376]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	mov	x1, x2
 	ldr	x2, [x2, 3296]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 3312]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 4024]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 4040]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 3968]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 3280]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 4032]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 3440]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x2, [x1, 4048]
-	cbz	x2, .L495
+	cbz	x2, .L500
 	ldr	x1, [x1, 4056]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x1, [x0, 3264]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 4000]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 3984]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 3256]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 3448]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 3992]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 3272]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 2384]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, 4072]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x0, [x0, 152]
-	cbz	x0, .L495
+	cbz	x0, .L500
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	x1, [x0, -240]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x1, [x0, -232]
-	cbz	x1, .L495
+	cbz	x1, .L500
 	ldr	x0, [x0, -224]
-	cbz	x0, .L495
+	cbz	x0, .L500
 	mov	w0, 0
-	b	.L488
+	b	.L493
 	.size	FtlMemInit, .-FtlMemInit
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -3948,20 +4021,20 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.L593:
+.L598:
 	ldrh	w0, [x22, x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L590
+	beq	.L595
 	ldrh	w1, [x23, 102]
 	cmp	w1, w0
-	bhi	.L592
+	bhi	.L597
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L592:
+.L597:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -3972,8 +4045,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x21, x0]
 	orr	w1, w1, w2
 	str	w1, [x21, x0]
-	bne	.L593
-.L590:
+	bne	.L598
+.L595:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -4037,19 +4110,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L602:
+.L607:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L606
+	bhi	.L611
 	ldrh	w26, [x21]
 	adrp	x24, .LANCHOR0
 	add	x24, x24, :lo12:.LANCHOR0
 	mov	w25, 0
 	mov	w20, 0
-.L607:
+.L612:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L611
+	bhi	.L616
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4057,61 +4130,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L606:
+.L611:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L603:
+.L608:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L605
+	bhi	.L610
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L602
-.L605:
+	b	.L607
+.L610:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L604
+	bne	.L609
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L604:
+.L609:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L603
-.L611:
+	b	.L608
+.L616:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L608
+	bne	.L613
 	ldrh	w0, [x24, 108]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L608
+	bcs	.L613
 	strh	w0, [x21, x22, lsl 1]
-.L608:
+.L613:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L609
+	bls	.L614
 	mov	w25, w20
 	mov	w26, w0
-.L609:
-	cbnz	w0, .L610
+.L614:
+	cbnz	w0, .L615
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L610
+	cbz	w0, .L615
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L610:
+.L615:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L607
+	b	.L612
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
@@ -4127,9 +4200,9 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x0, 16]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L617
+	bne	.L622
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L618
+	cbz	w0, .L623
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -4137,7 +4210,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, 256
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L618:
+.L623:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -4148,14 +4221,14 @@ Ftl_write_map_blk_to_last_page:
 	strh	wzr, [x19]
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-.L619:
+.L624:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L617:
+.L622:
 	ubfiz	x0, x0, 1, 16
 	adrp	x21, .LANCHOR0
 	ldr	w1, [x19, 48]
@@ -4182,10 +4255,10 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	mov	w0, 0
 	mov	w1, 0
-.L620:
+.L625:
 	ldrh	w2, [x19, 6]
 	cmp	w2, w1
-	bhi	.L622
+	bhi	.L627
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w2, 1
 	mov	w3, 0
@@ -4197,12 +4270,12 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L619
-.L622:
+	b	.L624
+.L627:
 	ubfiz	x2, x1, 2, 16
 	ldr	w3, [x23, x2]
 	cmp	w22, w3, lsr 10
-	bne	.L621
+	bne	.L626
 	add	w0, w0, 1
 	ldr	x4, [x20, 3440]
 	and	w0, w0, 65535
@@ -4212,10 +4285,10 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x2, [x20, 3440]
 	add	x2, x2, x3
 	str	w4, [x2, 4]
-.L621:
+.L626:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L620
+	b	.L625
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.align	2
 	.global	FtlMapWritePage
@@ -4238,7 +4311,7 @@ FtlMapWritePage:
 	add	x23, x23, :lo12:.LANCHOR1
 	add	x20, x25, 3408
 	mov	w22, 0
-.L628:
+.L633:
 	add	x0, x24, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2604]
 	add	w1, w1, 1
@@ -4247,35 +4320,35 @@ FtlMapWritePage:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L629
+	bge	.L634
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L630
-.L629:
+	bne	.L635
+.L634:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L630:
+.L635:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L631
+	cbnz	w0, .L636
 	adrp	x0, .LC1
 	mov	w2, 735
 	add	x1, x23, 288
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L631:
+.L636:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L632
+	bcc	.L637
 	adrp	x0, .LC1
 	mov	w2, 736
 	add	x1, x23, 288
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L632:
+.L637:
 	ldrh	w1, [x19]
 	mov	w2, 16
 	ldr	x0, [x19, 16]
@@ -4306,7 +4379,7 @@ FtlMapWritePage:
 	strh	w0, [x19, 2]
 	ldr	w1, [x20]
 	cmn	w1, #1
-	bne	.L633
+	bne	.L638
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
@@ -4315,34 +4388,34 @@ FtlMapWritePage:
 	bl	sftl_printk
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L634
+	bhi	.L639
 	ldrh	w0, [x25, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L634:
+.L639:
 	cmp	w22, 3
-	bls	.L635
+	bls	.L640
 	add	x21, x21, :lo12:.LANCHOR0
 	adrp	x0, .LC88
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC88
 	ldr	w1, [x21, 3412]
 	bl	sftl_printk
-.L636:
-	b	.L636
-.L635:
+.L641:
+	b	.L641
+.L640:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L628
-.L653:
-	b	.L653
-.L633:
-	cbz	w1, .L639
+	cbz	w0, .L633
+.L658:
+	b	.L658
+.L638:
+	cbz	w1, .L644
 	strh	w28, [x19, 60]
 	cmp	w0, 1
-	beq	.L628
+	beq	.L633
 	cmp	w1, 256
-.L656:
-	beq	.L628
+.L661:
+	beq	.L633
 	ldr	x0, [x19, 40]
 	add	x21, x21, :lo12:.LANCHOR0
 	ldr	w1, [x21, 3412]
@@ -4355,9 +4428,9 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L639:
+.L644:
 	cmp	w0, 1
-	b	.L656
+	b	.L661
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.align	2
 	.global	load_l2p_region
@@ -4375,7 +4448,7 @@ load_l2p_region:
 	and	x20, x1, 65535
 	ldrh	w0, [x0, 140]
 	cmp	w0, w21
-	bcs	.L658
+	bcs	.L663
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -4383,13 +4456,13 @@ load_l2p_region:
 	add	x1, x1, 304
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L658:
+.L663:
 	adrp	x22, .LANCHOR3
 	add	x26, x22, :lo12:.LANCHOR3
 	ubfiz	x0, x21, 2, 16
 	ldr	x1, [x26, -216]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L659
+	cbnz	w23, .L664
 	add	x19, x19, :lo12:.LANCHOR0
 	lsl	x20, x20, 4
 	mov	w1, 255
@@ -4403,7 +4476,7 @@ load_l2p_region:
 	ldr	x0, [x19, 2568]
 	add	x20, x0, x20
 	str	wzr, [x20, 4]
-.L660:
+.L665:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4411,7 +4484,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L659:
+.L664:
 	add	x24, x19, :lo12:.LANCHOR0
 	lsl	x20, x20, 4
 	add	x25, x24, 3408
@@ -4429,7 +4502,7 @@ load_l2p_region:
 	ldr	x25, [x24, 3424]
 	ldr	w0, [x24, 3408]
 	cmp	w0, 256
-	bne	.L661
+	bne	.L666
 	mov	w2, w23
 	mov	w1, w21
 	adrp	x0, .LC89
@@ -4443,10 +4516,10 @@ load_l2p_region:
 	ldr	x2, [x0, 8]
 	sub	x0, x26, #184
 	bl	FtlMapWritePage
-.L661:
+.L666:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L662
+	beq	.L667
 	mov	w2, w23
 	add	x23, x19, :lo12:.LANCHOR0
 	mov	w1, w21
@@ -4466,10 +4539,10 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC92
 	bl	rknand_print_hex
-.L662:
+.L667:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L663
+	beq	.L668
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -4477,14 +4550,14 @@ load_l2p_region:
 	add	x1, x1, 304
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L663:
+.L668:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	x0, [x19, 2568]
 	add	x0, x0, x20
 	str	wzr, [x0, 4]
 	ldr	x0, [x19, 2568]
 	strh	w21, [x0, x20]
-	b	.L660
+	b	.L665
 	.size	load_l2p_region, .-load_l2p_region
 	.align	2
 	.global	ftl_map_blk_gc
@@ -4507,31 +4580,31 @@ ftl_map_blk_gc:
 	sub	w1, w4, #4
 	cmp	w2, w1
 	ldrh	w1, [x19, 60]
-	bge	.L666
+	bge	.L671
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L668
+	beq	.L673
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrh	w3, [x19, 2]
 	ldrh	w2, [x2, 108]
 	cmp	w3, w2
-	bcc	.L669
-.L666:
+	bcc	.L674
+.L671:
 	mov	w2, 65535
 	and	w0, w0, 65535
 	cmp	w1, w2
-	beq	.L670
+	beq	.L675
 	add	x2, x21, :lo12:.LANCHOR0
 	ldrh	w3, [x19, 2]
 	ldrh	w2, [x2, 108]
 	cmp	w2, w3
-	bls	.L671
-.L670:
+	bls	.L676
+.L675:
 	ubfiz	x0, x0, 1, 32
 	ldrh	w26, [x20, x0]
-	cbz	w26, .L668
+	cbz	w26, .L673
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L668
+	cbnz	w1, .L673
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -4542,33 +4615,33 @@ ftl_map_blk_gc:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 108]
 	cmp	w1, w0
-	bcc	.L676
+	bcc	.L681
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L676:
+.L681:
 	add	x27, x21, :lo12:.LANCHOR0
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x23, x27, 3408
 	add	x24, x24, 320
 	mov	w20, 0
-.L677:
+.L682:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L684
+	bhi	.L689
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L668:
+.L673:
 	add	x21, x21, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bcc	.L669
+	bcc	.L674
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L669:
+.L674:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4577,18 +4650,18 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L674:
+.L679:
 	ldrh	w6, [x20, x2, lsl 1]
 	add	x5, x2, 1
 	cmp	w6, w1
-	beq	.L672
+	beq	.L677
 	mov	x2, x5
-.L673:
+.L678:
 	and	w23, w2, 65535
 	cmp	w23, w4
-	bcc	.L674
+	bcc	.L679
 	mov	w23, w0
-.L672:
+.L677:
 	and	x2, x2, 65535
 	adrp	x0, .LC93
 	add	x0, x0, :lo12:.LC93
@@ -4597,16 +4670,16 @@ ftl_map_blk_gc:
 	mov	w0, -1
 	strh	w0, [x19, 60]
 	mov	w0, w23
-	b	.L670
-.L671:
+	b	.L675
+.L676:
 	mov	x2, 0
-	b	.L673
-.L684:
+	b	.L678
+.L689:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x22, x0
 	ldr	w1, [x22, x0]
 	cmp	w26, w1, lsr 10
-	bne	.L678
+	bne	.L683
 	ldr	x25, [x27, 3448]
 	mov	w2, 1
 	ldr	x1, [x27, 4048]
@@ -4618,36 +4691,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L679
+	beq	.L684
 	adrp	x0, .LC1
 	mov	w2, 647
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L679:
+.L684:
 	ldr	w0, [x23]
 	cmn	w0, #1
-	bne	.L680
-.L682:
+	bne	.L685
+.L687:
 	str	wzr, [x28]
-.L681:
-	b	.L681
-.L680:
+.L686:
+	b	.L686
+.L685:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	bne	.L682
+	bne	.L687
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L682
+	bne	.L687
 	ldr	x2, [x23, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L678:
+.L683:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L677
+	b	.L682
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.align	2
 	.global	flush_l2p_region
@@ -4702,7 +4775,7 @@ log2phys:
 	and	w19, w19, w0
 	cmp	w0, w1
 	and	x19, x19, 65535
-	bcc	.L693
+	bcc	.L698
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -4710,15 +4783,15 @@ log2phys:
 	add	x1, x1, 336
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L693:
+.L698:
 	add	x0, x24, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 142]
 	ldr	x2, [x0, 2568]
 	mov	x0, 0
-.L694:
+.L699:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L699
+	bcc	.L704
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	add	x2, x24, :lo12:.LANCHOR0
@@ -4729,39 +4802,39 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L700
+	beq	.L705
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L700
+	tbz	w1, #31, .L705
 	bl	flush_l2p_region
-.L700:
+.L705:
 	mov	w1, w25
 	mov	w0, w21
 	bl	load_l2p_region
-	b	.L695
-.L699:
+	b	.L700
+.L704:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w21
-	bne	.L694
-.L695:
-	cbnz	w23, .L696
+	bne	.L699
+.L700:
+	cbnz	w23, .L701
 	add	x0, x24, :lo12:.LANCHOR0
 	ldr	x0, [x0, 2568]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x22]
-.L697:
+.L702:
 	add	x24, x24, :lo12:.LANCHOR0
 	ldr	x0, [x24, 2568]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L702
+	beq	.L707
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L702:
+.L707:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4769,7 +4842,7 @@ log2phys:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L696:
+.L701:
 	add	x2, x24, :lo12:.LANCHOR0
 	lsl	x0, x20, 4
 	mov	x1, x0
@@ -4784,7 +4857,7 @@ log2phys:
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	b	.L697
+	b	.L702
 	.size	log2phys, .-log2phys
 	.align	2
 	.global	FtlReUsePrevPpa
@@ -4805,9 +4878,9 @@ FtlReUsePrevPpa:
 	ubfiz	x20, x0, 1, 16
 	ldr	x3, [x2, 2376]
 	ldrh	w1, [x3, x20]
-	cbnz	w1, .L708
+	cbnz	w1, .L713
 	ldr	x19, [x2, 2408]
-	cbz	x19, .L709
+	cbz	x19, .L714
 	ldrh	w3, [x2, 2416]
 	mov	x4, -6148914691236517206
 	ldr	x2, [x2, 2360]
@@ -4818,17 +4891,17 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x4
 	mov	w4, 6
 	and	w19, w19, 65535
-.L710:
+.L715:
 	cmp	w1, w3
-	beq	.L709
+	beq	.L714
 	cmp	w19, w0
-	bne	.L711
+	bne	.L716
 	add	x23, x22, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x23, 2408
 	bl	List_remove_node
 	ldrh	w0, [x23, 2416]
-	cbnz	w0, .L712
+	cbnz	w0, .L717
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -4836,7 +4909,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, 352
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L712:
+.L717:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 2416]
 	sub	w0, w0, #1
@@ -4847,7 +4920,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L709:
+.L714:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -4857,18 +4930,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L711:
+.L716:
 	umull	x19, w19, w4
 	ldrh	w19, [x2, x19]
 	cmp	w19, w5
-	beq	.L709
+	beq	.L714
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L710
-.L708:
+	b	.L715
+.L713:
 	add	w1, w1, 1
 	strh	w1, [x3, x20]
-	b	.L709
+	b	.L714
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.align	2
 	.global	ftl_scan_all_data
@@ -4888,33 +4961,33 @@ ftl_scan_all_data:
 	mov	w20, 0
 	add	x19, x21, 3408
 	bl	sftl_printk
-.L719:
+.L724:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	w0, [x0, 2584]
 	cmp	w20, w0
-	bcc	.L725
+	bcc	.L730
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L725:
+.L730:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w20
 	bl	log2phys
 	tst	x20, 2047
-	bne	.L720
+	bne	.L725
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC95
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC95
 	bl	sftl_printk
-.L720:
+.L725:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L722
+	beq	.L727
 	ldr	x23, [x21, 3448]
 	mov	w2, 0
 	stp	wzr, w0, [x19]
@@ -4928,11 +5001,11 @@ ftl_scan_all_data:
 	ldr	w0, [x19]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L723
+	beq	.L728
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L722
-.L723:
+	beq	.L727
+.L728:
 	ldp	x1, x0, [x19, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -4944,9 +5017,9 @@ ftl_scan_all_data:
 	ldr	w2, [x19, 4]
 	mov	w1, w20
 	bl	sftl_printk
-.L722:
+.L727:
 	add	w20, w20, 1
-	b	.L719
+	b	.L724
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.align	2
 	.global	FtlReadRefresh
@@ -4956,22 +5029,22 @@ FtlReadRefresh:
 	add	x1, x0, :lo12:.LANCHOR0
 	add	x2, x1, 2720
 	ldr	w3, [x2, 80]
-	cbz	w3, .L728
+	cbz	w3, .L733
 	ldr	w0, [x1, 2584]
 	ldr	w3, [x2, 84]
 	cmp	w3, w0
-	bcs	.L729
+	bcs	.L734
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x1
 	mov	w20, 2048
 	str	x21, [sp, 32]
-.L734:
+.L739:
 	ldr	w1, [x19, 2584]
 	ldr	w0, [x19, 2804]
 	cmp	w0, w1
-	bcs	.L731
+	bcs	.L736
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
@@ -4980,7 +5053,7 @@ FtlReadRefresh:
 	add	w0, w0, 1
 	str	w0, [x19, 2804]
 	cmn	w1, #1
-	beq	.L732
+	beq	.L737
 	str	w0, [x29, 88]
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
@@ -4995,57 +5068,57 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L731
+	bne	.L736
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L731:
+.L736:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	ret
-.L732:
+.L737:
 	subs	w20, w20, #1
-	bne	.L734
-	b	.L731
-.L729:
+	bne	.L739
+	b	.L736
+.L734:
 	ldr	w0, [x1, 2588]
 	stp	w0, wzr, [x2, 76]
 	str	wzr, [x2, 84]
-.L738:
+.L743:
 	mov	w0, 0
 	ret
-.L728:
+.L733:
 	ldr	w3, [x1, 2588]
 	ldr	w5, [x2, 76]
 	add	w2, w3, 1048576
 	cmp	w5, w2
-	bhi	.L737
+	bhi	.L742
 	ldr	w2, [x1, 2644]
 	lsr	w4, w2, 10
 	mov	w2, 33554432
 	asr	w2, w2, w4
 	add	w2, w2, w5
 	cmp	w3, w2
-	bhi	.L737
+	bhi	.L742
 	ldrb	w1, [x1, 2340]
-	cbnz	w1, .L738
-.L737:
+	cbnz	w1, .L743
+.L742:
 	add	x0, x0, :lo12:.LANCHOR0
 	mov	w1, 1
 	str	w3, [x0, 2796]
 	str	w1, [x0, 2800]
 	str	wzr, [x0, 2804]
-	b	.L738
+	b	.L743
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L752
+	cbz	w1, .L757
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR0
 	add	x2, x1, :lo12:.LANCHOR0
@@ -5066,11 +5139,11 @@ FtlMapBlkWriteDump_data:
 	str	wzr, [x19, 56]
 	ldr	w4, [x5, x4]
 	str	w4, [x0, 4]
-	cbz	w4, .L746
+	cbz	w4, .L751
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L747:
+.L752:
 	add	x1, x21, :lo12:.LANCHOR0
 	mov	x0, x19
 	ldr	x2, [x1, 3416]
@@ -5080,13 +5153,13 @@ FtlMapBlkWriteDump_data:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L746:
+.L751:
 	ldrh	w2, [x2, 114]
 	mov	w1, 255
 	mov	x0, x3
 	bl	ftl_memset
-	b	.L747
-.L752:
+	b	.L752
+.L757:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.align	2
@@ -5134,24 +5207,24 @@ FtlScanSysBlk:
 	add	x0, x19, 2656
 	bl	ftl_memset
 	ldrh	w24, [x19, 44]
-.L756:
+.L761:
 	ldrh	w0, [x19, 46]
 	cmp	w0, w24
-	bls	.L796
+	bls	.L801
 	ldrh	w9, [x19, 36]
 	mov	x5, 0
 	ldrh	w8, [x19, 116]
 	mov	w21, 0
 	add	x7, x19, 64
 	mov	w6, 4
-	b	.L797
-.L758:
+	b	.L802
+.L763:
 	ldrb	w0, [x7, x5]
 	mov	w1, w24
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L757
+	cbnz	w0, .L762
 	ldr	x0, [x19, 4024]
 	ubfiz	x2, x21, 5, 16
 	lsl	w4, w4, 10
@@ -5168,17 +5241,17 @@ FtlScanSysBlk:
 	sdiv	w0, w0, w6
 	add	x0, x2, x0, sxtw 2
 	str	x0, [x1, 16]
-.L757:
+.L762:
 	add	x5, x5, 1
-.L797:
+.L802:
 	cmp	w9, w5, uxth
-	bhi	.L758
-	cbnz	w21, .L759
-.L795:
+	bhi	.L763
+	cbnz	w21, .L764
+.L800:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L756
-.L759:
+	b	.L761
+.L764:
 	ldr	x0, [x19, 4024]
 	mov	w1, w21
 	mov	w2, 1
@@ -5186,7 +5259,7 @@ FtlScanSysBlk:
 	mov	x23, 0
 	add	x28, x19, 2656
 	bl	FlashReadPages
-.L794:
+.L799:
 	ldr	x0, [x19, 4024]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
@@ -5194,10 +5267,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x26, 10, 16
-	bne	.L762
+	bne	.L767
 	mov	w3, 16
 	mov	w4, 65535
-.L764:
+.L769:
 	ldr	x0, [x19, 4024]
 	mov	w2, 1
 	stp	w4, w3, [x29, 104]
@@ -5213,72 +5286,72 @@ FtlScanSysBlk:
 	ldrh	w0, [x27]
 	cmp	w0, w4
 	ldr	x0, [x19, 4024]
-	bne	.L761
+	bne	.L766
 	mov	w1, -1
 	str	w1, [x0, x23]
 	ldr	x0, [x19, 4024]
 	ldr	w0, [x0, x23]
 	cmp	w0, w1
-	bne	.L762
-.L763:
+	bne	.L767
+.L768:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L767
-.L761:
+	b	.L772
+.L766:
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	bne	.L762
+	bne	.L767
 	sub	w3, w3, #1
 	ands	w3, w3, 65535
-	bne	.L764
-	b	.L763
-.L762:
+	bne	.L769
+	b	.L768
+.L767:
 	ldr	w1, [x19, 2620]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L765
+	beq	.L770
 	cmp	w1, w0
-	bhi	.L766
-.L765:
+	bhi	.L771
+.L770:
 	cmn	w0, #1
-	beq	.L766
+	beq	.L771
 	add	w1, w0, 1
 	str	w1, [x19, 2620]
-.L766:
+.L771:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L768
-	bhi	.L769
+	beq	.L773
+	bhi	.L774
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L770
-.L767:
+	beq	.L775
+.L772:
 	add	x23, x23, 32
 	cmp	x21, x23
-	bne	.L794
-	b	.L795
-.L769:
+	bne	.L799
+	b	.L800
+.L774:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L771
+	beq	.L776
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L763
-	b	.L767
-.L771:
+	beq	.L768
+	b	.L772
+.L776:
 	add	x0, x20, :lo12:.LANCHOR3
 	ldrh	w1, [x0, -120]
 	ldr	w0, [x19, 132]
 	cmp	w1, w0
-	bls	.L773
+	bls	.L778
 	adrp	x0, .LC1
 	mov	w2, 1256
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L773:
+.L778:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldr	w3, [x19, 132]
 	and	w2, w3, 65535
@@ -5289,45 +5362,45 @@ FtlScanSysBlk:
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	sxth	w2, w2
-.L774:
+.L779:
 	cmp	w0, w2
-	bgt	.L780
-	tbz	w0, #31, .L814
-	b	.L767
-.L780:
+	bgt	.L785
+	tbz	w0, #31, .L819
+	b	.L772
+.L785:
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L775
+	bls	.L780
 	ldr	w2, [x4]
-	cbnz	w2, .L776
+	cbnz	w2, .L781
 	cmp	w3, w1
-	beq	.L776
+	beq	.L781
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
 	strh	w1, [x2, -120]
-.L776:
+.L781:
 	add	x3, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L777:
+.L782:
 	cmp	w1, w0
-	bne	.L778
+	bne	.L783
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w3, [x27, 4]
 	ldr	x2, [x1, -208]
 	str	w3, [x2, x6]
 	ldr	x2, [x1, -256]
 	strh	w26, [x2, x5, lsl 1]
-	tbnz	w0, #31, .L767
+	tbnz	w0, #31, .L772
 	ldrh	w1, [x1, -120]
 	ldr	w2, [x19, 132]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L767
-.L814:
+	bgt	.L772
+.L819:
 	add	x2, x20, :lo12:.LANCHOR3
 	add	w1, w1, 1
 	ldr	w3, [x27, 4]
@@ -5335,10 +5408,10 @@ FtlScanSysBlk:
 	ldr	x1, [x2, -208]
 	str	w3, [x1, x0, lsl 2]
 	ldr	x1, [x2, -256]
-.L832:
+.L837:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L767
-.L778:
+	b	.L772
+.L783:
 	ldr	x7, [x3, -208]
 	sxtw	x2, w1
 	lsl	x4, x2, 2
@@ -5352,22 +5425,22 @@ FtlScanSysBlk:
 	add	x7, x4, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x4, x2]
-	b	.L777
-.L775:
+	b	.L782
+.L780:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L774
-.L770:
+	b	.L779
+.L775:
 	ldrh	w1, [x19, 148]
 	ldrh	w0, [x19, 124]
 	cmp	w1, w0
-	bls	.L783
+	bls	.L788
 	adrp	x0, .LC1
 	mov	w2, 1297
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L783:
+.L788:
 	add	x4, x20, :lo12:.LANCHOR3
 	ldrh	w3, [x19, 124]
 	ldrh	w1, [x19, 148]
@@ -5375,41 +5448,41 @@ FtlScanSysBlk:
 	ldr	x4, [x4, -232]
 	sxth	x0, w2
 	sub	w2, w2, w1
-.L784:
+.L789:
 	cmp	w0, w2
-	ble	.L789
+	ble	.L794
 	sxtw	x5, w0
 	ldr	w8, [x27, 4]
 	lsl	x6, x5, 2
 	ldr	w7, [x4, x6]
 	cmp	w8, w7
-	bls	.L785
+	bls	.L790
 	ldr	w2, [x4]
-	cbnz	w2, .L786
+	cbnz	w2, .L791
 	cmp	w3, w1
-	beq	.L786
+	beq	.L791
 	add	w1, w1, 1
 	strh	w1, [x19, 148]
-.L786:
+.L791:
 	add	x7, x20, :lo12:.LANCHOR3
 	mov	w1, 0
-.L787:
+.L792:
 	cmp	w1, w0
-	bne	.L788
+	bne	.L793
 	add	x1, x20, :lo12:.LANCHOR3
 	ldr	w2, [x27, 4]
 	ldr	x1, [x1, -232]
 	str	w2, [x1, x6]
 	ldr	x1, [x19, 152]
 	strh	w26, [x1, x5, lsl 1]
-.L789:
-	tbnz	w0, #31, .L767
+.L794:
+	tbnz	w0, #31, .L772
 	ldrh	w1, [x19, 124]
 	ldrh	w2, [x19, 148]
 	sub	w1, w1, #1
 	sub	w1, w1, w2
 	cmp	w0, w1, sxth
-	bgt	.L767
+	bgt	.L772
 	add	x1, x20, :lo12:.LANCHOR3
 	add	w2, w2, 1
 	strh	w2, [x19, 148]
@@ -5417,8 +5490,8 @@ FtlScanSysBlk:
 	ldr	x1, [x1, -232]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x19, 152]
-	b	.L832
-.L788:
+	b	.L837
+.L793:
 	ldr	x4, [x7, -232]
 	sxtw	x2, w1
 	lsl	x3, x2, 2
@@ -5432,56 +5505,56 @@ FtlScanSysBlk:
 	add	x4, x3, x2
 	ldrh	w4, [x4, 2]
 	strh	w4, [x3, x2]
-	b	.L787
-.L785:
+	b	.L792
+.L790:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L784
-.L768:
+	b	.L789
+.L773:
 	ldrh	w2, [x28]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L791
+	bne	.L796
 	strh	w26, [x28]
-.L833:
+.L838:
 	str	w0, [x28, 8]
-	b	.L767
-.L791:
+	b	.L772
+.L796:
 	ldrh	w0, [x28, 4]
 	cmp	w0, w1
-	beq	.L792
+	beq	.L797
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L792:
+.L797:
 	ldr	w0, [x27, 4]
 	ldr	w1, [x28, 8]
 	cmp	w1, w0
-	bcs	.L793
+	bcs	.L798
 	ldrh	w0, [x28]
 	strh	w0, [x28, 4]
 	strh	w26, [x28]
 	ldr	w0, [x27, 4]
-	b	.L833
-.L793:
+	b	.L838
+.L798:
 	strh	w26, [x28, 4]
-	b	.L767
-.L796:
+	b	.L772
+.L801:
 	add	x0, x20, :lo12:.LANCHOR3
 	ldr	x1, [x0, -256]
 	ldrh	w2, [x1]
-	cbz	w2, .L798
-.L801:
+	cbz	w2, .L803
+.L806:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x1, [x0, 152]
 	ldrh	w2, [x1]
-	cbz	w2, .L799
-.L800:
+	cbz	w2, .L804
+.L805:
 	add	x20, x20, :lo12:.LANCHOR3
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrh	w1, [x20, -120]
 	ldr	w0, [x22, 132]
 	cmp	w1, w0
-	bls	.L830
+	bls	.L835
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -5489,7 +5562,7 @@ FtlScanSysBlk:
 	add	x1, x1, 368
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L830:
+.L835:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5498,23 +5571,23 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L798:
+.L803:
 	ldrh	w0, [x0, -120]
-	cbz	w0, .L801
+	cbz	w0, .L806
 	ldr	w2, [x19, 132]
 	mov	w0, 0
-.L802:
+.L807:
 	cmp	w0, w2
-	bcs	.L801
+	bcs	.L806
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L803
+	cbz	w3, .L808
 	mov	w1, w0
 	add	x7, x22, :lo12:.LANCHOR0
 	add	x3, x20, :lo12:.LANCHOR3
-.L804:
+.L809:
 	ldr	w2, [x7, 132]
 	cmp	w1, w2
-	bcs	.L801
+	bcs	.L806
 	ldr	x5, [x3, -256]
 	sxtw	x6, w1
 	lsl	x4, x6, 1
@@ -5529,28 +5602,28 @@ FtlScanSysBlk:
 	str	w6, [x5, x2, lsl 2]
 	ldr	x2, [x3, -256]
 	strh	wzr, [x2, x4]
-	b	.L804
-.L803:
+	b	.L809
+.L808:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L802
-.L799:
+	b	.L807
+.L804:
 	ldrh	w2, [x0, 148]
-	cbz	w2, .L800
+	cbz	w2, .L805
 	ldrh	w2, [x0, 124]
 	mov	w0, 0
-.L809:
+.L814:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L800
+	bge	.L805
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L810
+	cbz	w3, .L815
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x7, x20, :lo12:.LANCHOR3
-.L811:
+.L816:
 	ldrh	w1, [x2, 124]
 	cmp	w0, w1
-	bge	.L800
+	bge	.L805
 	ldr	x4, [x2, 152]
 	sxtw	x5, w0
 	lsl	x3, x5, 1
@@ -5565,11 +5638,11 @@ FtlScanSysBlk:
 	str	w5, [x4, x1, lsl 2]
 	ldr	x1, [x2, 152]
 	strh	wzr, [x1, x3]
-	b	.L811
-.L810:
+	b	.L816
+.L815:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L809
+	b	.L814
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.align	2
 	.global	FtlMapTblRecovery
@@ -5610,14 +5683,14 @@ FtlMapTblRecovery:
 	ldr	w0, [x29, 116]
 	sub	w0, w0, #1
 	str	w0, [x29, 112]
-.L835:
+.L840:
 	ldr	w0, [x29, 116]
 	cmp	w27, w0
-	bge	.L853
+	bge	.L858
 	ldr	w0, [x29, 112]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L836
+	bne	.L841
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x20, x23, x0
@@ -5633,20 +5706,20 @@ FtlMapTblRecovery:
 	ldr	w0, [x26, x28, lsl 2]
 	add	w26, w1, 1
 	str	w0, [x19, 48]
-.L837:
+.L842:
 	cmp	w23, w26
-	blt	.L840
-.L853:
+	blt	.L845
+.L858:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, 108]
 	cmp	w1, w0
-	bne	.L842
+	bne	.L847
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L842:
+.L847:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -5659,7 +5732,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L840:
+.L845:
 	ldrh	w0, [x20]
 	mov	w2, 1
 	mov	w1, w2
@@ -5669,27 +5742,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L838
+	beq	.L843
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L839
+	bls	.L844
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L839
+	bne	.L844
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x25, 4]
 	str	w1, [x2, x0]
-.L839:
+.L844:
 	add	w23, w23, 1
 	sxth	w23, w23
-	b	.L837
-.L838:
+	b	.L842
+.L843:
 	ldrh	w0, [x20]
 	strh	w0, [x19, 60]
-	b	.L839
-.L836:
+	b	.L844
+.L841:
 	ldr	x0, [x25, 3440]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -5705,21 +5778,21 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L855
+	beq	.L860
 	ldrh	w1, [x22]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L855
+	bne	.L860
 	ldrh	w1, [x22, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L844
-.L855:
+	beq	.L849
+.L860:
 	mov	w5, 0
-.L845:
+.L850:
 	ldrh	w0, [x25, 108]
 	cmp	w5, w0
-	bge	.L851
+	bge	.L856
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -5731,48 +5804,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L849
+	beq	.L854
 	ldrh	w0, [x22, 8]
 	cmp	w24, w0
-	bls	.L849
+	bls	.L854
 	ldrh	w2, [x22]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L849
+	bne	.L854
 	ldr	x2, [x29, 120]
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x2, x0]
-.L849:
+.L854:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L845
-.L844:
+	b	.L850
+.L849:
 	mov	w0, 0
-.L846:
+.L851:
 	ldrh	w1, [x25, 108]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	blt	.L848
-.L851:
+	blt	.L853
+.L856:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L835
-.L848:
+	b	.L840
+.L853:
 	ldr	x2, [x25, 3440]
 	sbfiz	x5, x0, 3, 32
 	ldrh	w1, [x2, x5]
 	cmp	w24, w1
-	bls	.L847
+	bls	.L852
 	add	x2, x2, x5
 	ldr	x3, [x29, 120]
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x2, 4]
 	str	w2, [x3, x1]
-.L847:
+.L852:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L846
+	b	.L851
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.align	2
 	.global	FtlLoadVonderInfo
@@ -5834,10 +5907,10 @@ FtlL2PDataInit:
 	mov	x1, x20
 	mov	w0, 0
 	mov	w5, -1
-.L863:
+.L868:
 	ldrh	w2, [x1, 142]
 	cmp	w2, w0
-	bhi	.L864
+	bhi	.L869
 	add	x0, x19, :lo12:.LANCHOR3
 	ldr	w3, [x1, 132]
 	ldrh	w1, [x1, 140]
@@ -5863,7 +5936,7 @@ FtlL2PDataInit:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L864:
+.L869:
 	ldr	x3, [x1, 2568]
 	ubfiz	x2, x0, 4, 16
 	add	x3, x3, x2
@@ -5881,7 +5954,7 @@ FtlL2PDataInit:
 	and	x2, x2, -4
 	add	x2, x4, x2
 	str	x2, [x3, 8]
-	b	.L863
+	b	.L868
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.align	2
 	.global	FtlLoadMapInfo
@@ -5971,75 +6044,75 @@ SupperBlkListInit:
 	str	xzr, [x19, 2368]
 	str	xzr, [x19, 2392]
 	str	xzr, [x19, 2408]
-.L871:
+.L876:
 	ldrh	w0, [x19, 44]
 	cmp	w20, w0
-	bcs	.L878
+	bcs	.L883
 	ldrh	w8, [x19, 36]
 	mov	x6, 0
 	ldrh	w7, [x19, 106]
 	mov	w5, 0
-	b	.L879
-.L873:
+	b	.L884
+.L878:
 	ldrb	w0, [x23, x6]
 	mov	w1, w20
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L872
+	cbnz	w0, .L877
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L872:
+.L877:
 	add	x6, x6, 1
-.L879:
+.L884:
 	cmp	w8, w6, uxth
-	bhi	.L873
-	cbz	w5, .L874
+	bhi	.L878
+	cbz	w5, .L879
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L875:
+.L880:
 	ldr	x1, [x19, 2360]
 	mov	w0, 6
 	umaddl	x0, w20, w0, x1
 	strh	w5, [x0, 4]
 	ldrh	w0, [x19, 2424]
 	cmp	w0, w20
-	beq	.L876
+	beq	.L881
 	ldrh	w0, [x19, 2472]
 	cmp	w0, w20
-	beq	.L876
+	beq	.L881
 	ldrh	w0, [x19, 2520]
 	cmp	w0, w20
-	beq	.L876
+	beq	.L881
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x20, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L877
+	cbnz	w0, .L882
 	add	w22, w22, 1
 	mov	w0, w20
 	and	w22, w22, 65535
 	bl	INSERT_FREE_LIST
-.L876:
+.L881:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L871
-.L874:
+	b	.L876
+.L879:
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x20, 1, 16
 	mov	w2, -1
 	strh	w2, [x1, x0]
-	b	.L875
-.L877:
+	b	.L880
+.L882:
 	add	w21, w21, 1
 	mov	w0, w20
 	and	w21, w21, 65535
 	bl	INSERT_DATA_LIST
-	b	.L876
-.L878:
+	b	.L881
+.L883:
 	strh	w21, [x19, 2400]
 	add	w21, w21, w22
 	strh	w22, [x19, 2416]
 	cmp	w21, w0
-	ble	.L880
+	ble	.L885
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6047,7 +6120,7 @@ SupperBlkListInit:
 	add	x1, x1, 384
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L880:
+.L885:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6081,10 +6154,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L883:
+.L888:
 	ldr	w0, [x24, 2584]
 	cmp	w23, w0
-	bcc	.L885
+	bcc	.L890
 	adrp	x25, .LC98
 	add	x23, x20, :lo12:.LANCHOR0
 	add	x26, x22, :lo12:check_vpc_table
@@ -6092,12 +6165,12 @@ ftl_check_vpc:
 	mov	w24, 0
 	mov	w19, 0
 	mov	w4, 65535
-.L886:
+.L891:
 	ldrh	w0, [x23, 44]
 	cmp	w0, w19
-	bhi	.L888
+	bhi	.L893
 	ldr	x19, [x23, 2408]
-	cbz	x19, .L889
+	cbz	x19, .L894
 	ldr	x0, [x23, 2360]
 	adrp	x25, .LC99
 	add	x20, x20, :lo12:.LANCHOR0
@@ -6112,18 +6185,18 @@ ftl_check_vpc:
 	mov	w23, 0
 	mul	x19, x19, x0
 	and	w19, w19, 65535
-.L890:
+.L895:
 	cmp	w23, w26
-	bne	.L892
-.L889:
-	cbz	w24, .L882
+	bne	.L897
+.L894:
+	cbz	w24, .L887
 	add	x1, x21, :lo12:.LANCHOR1
 	adrp	x0, .LC1
 	mov	w2, 2373
 	add	x1, x1, 408
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L882:
+.L887:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6131,31 +6204,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L885:
+.L890:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w23
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L884
+	beq	.L889
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L884:
+.L889:
 	add	w23, w23, 1
-	b	.L883
-.L888:
+	b	.L888
+.L893:
 	ldr	x0, [x23, 2376]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L887
+	beq	.L892
 	mov	x0, x25
 	str	w4, [x29, 108]
 	mov	w1, w19
@@ -6164,34 +6237,34 @@ ftl_check_vpc:
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L887
+	beq	.L892
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w24, w24, wzr, ls
-.L887:
+.L892:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L886
-.L892:
+	b	.L891
+.L897:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L891
+	cbz	w2, .L896
 	ldrh	w3, [x22, w19, sxtw 1]
 	mov	w24, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	sftl_printk
-.L891:
+.L896:
 	ldr	x0, [x20, 2360]
 	umull	x19, w19, w27
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L889
+	beq	.L894
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L890
+	b	.L895
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.align	2
 	.global	FtlGcPageVarInit
@@ -6237,29 +6310,29 @@ FtlGcScanTempBlk:
 	ldrh	w19, [x0, 4]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L926
-	cbnz	w19, .L910
-.L911:
+	beq	.L931
+	cbnz	w19, .L915
+.L916:
 	bl	FtlGcPageVarInit
-	b	.L912
-.L926:
+	b	.L917
+.L931:
 	mov	w19, 0
-.L910:
+.L915:
 	adrp	x0, .LANCHOR0+106
 	ldrh	w0, [x0, #:lo12:.LANCHOR0+106]
 	cmp	w0, w25
-	beq	.L911
-.L912:
+	beq	.L916
+.L917:
 	adrp	x26, .LANCHOR0
 	add	x22, x26, :lo12:.LANCHOR0
 	mov	w24, 0
-.L920:
+.L925:
 	ldrh	w1, [x21]
 	mov	w0, 65535
 	strb	wzr, [x21, 8]
 	cmp	w1, w0
-	beq	.L927
-.L923:
+	beq	.L932
+.L928:
 	add	x0, x26, :lo12:.LANCHOR0
 	add	x2, x21, 16
 	mov	w20, 0
@@ -6270,9 +6343,9 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x0, 36]
 	add	x0, x0, 8
 	add	x0, x21, x0, lsl 1
-.L914:
+.L919:
 	cmp	x0, x2
-	bne	.L916
+	bne	.L921
 	ldr	x0, [x22, 4024]
 	mov	w1, w20
 	mov	w2, 0
@@ -6280,25 +6353,25 @@ FtlGcScanTempBlk:
 	bl	FlashReadPages
 	mov	x10, 0
 	mov	w11, 65535
-.L917:
+.L922:
 	cmp	x10, x20
-	bne	.L921
+	bne	.L926
 	add	w19, w19, 1
 	add	w24, w24, 1
 	and	w19, w19, 65535
 	cmp	w25, w24
-	bls	.L922
-.L924:
+	bls	.L927
+.L929:
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bhi	.L923
-.L927:
+	bhi	.L928
+.L932:
 	mov	w2, 0
-	b	.L913
-.L916:
+	b	.L918
+.L921:
 	ldrh	w1, [x2]
 	cmp	w1, w9
-	beq	.L915
+	beq	.L920
 	ldr	x4, [x22, 4024]
 	ubfiz	x6, x20, 5, 16
 	orr	w1, w19, w1, lsl 10
@@ -6318,10 +6391,10 @@ FtlGcScanTempBlk:
 	sdiv	w1, w1, w5
 	add	x1, x4, x1, sxtw 2
 	str	x1, [x3, 16]
-.L915:
+.L920:
 	add	x2, x2, 2
-	b	.L914
-.L921:
+	b	.L919
+.L926:
 	ldr	x6, [x22, 4024]
 	add	x5, x6, x10
 	ldr	w4, [x5, 4]
@@ -6329,16 +6402,16 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x10]
-	cbnz	w0, .L918
+	cbnz	w0, .L923
 	ldr	x0, [x5, 16]
 	add	x10, x10, 32
 	ldrh	w1, [x0]
 	cmp	w1, w11
-	bne	.L919
+	bne	.L924
 	adrp	x0, .LANCHOR3-40
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR3-40]
-.L913:
+.L918:
 	add	x23, x23, :lo12:.LANCHOR2
 	strh	w19, [x21, 2]
 	strb	w2, [x21, 6]
@@ -6347,13 +6420,13 @@ FtlGcScanTempBlk:
 	strh	w0, [x23, 4]
 	mov	x0, x21
 	bl	ftl_sb_update_avl_pages
-	b	.L925
-.L919:
+	b	.L930
+.L924:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L917
-.L918:
+	b	.L922
+.L923:
 	ldr	x0, [x22, 2376]
 	mov	w19, 0
 	ldrh	w1, [x21]
@@ -6363,19 +6436,19 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x21]
 	bl	FtlGcPageVarInit
-	b	.L920
-.L922:
+	b	.L925
+.L927:
 	add	x1, x23, :lo12:.LANCHOR2
 	mov	w2, 65535
 	ldrh	w0, [x1, 4]
 	cmp	w0, w2
-	beq	.L924
+	beq	.L929
 	add	w0, w0, w24
 	strh	w0, [x1, 4]
 	ldrh	w0, [x22, 106]
 	cmp	w0, w19
-	bls	.L924
-.L925:
+	bls	.L929
+.L930:
 	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6393,7 +6466,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L935
+	bls	.L940
 	add	x0, x29, 64
 	mov	w2, 32
 	mov	w1, 165
@@ -6423,14 +6496,14 @@ FlashTestBlk:
 	add	x0, x29, 32
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L933:
+.L938:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L935:
+.L940:
 	mov	w19, 0
-	b	.L933
+	b	.L938
 	.size	FlashTestBlk, .-FlashTestBlk
 	.align	2
 	.global	FlashGetBadBlockList
@@ -6453,32 +6526,32 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L938
+	bls	.L943
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x20
 	bl	ftl_memset
 	mov	w0, 0
-.L938:
+.L943:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x19, 14]
 	cmp	w1, 4
-	bne	.L942
+	bne	.L947
 	mov	x1, 0
-.L940:
+.L945:
 	cmp	w0, w1, uxth
-	bhi	.L941
-.L942:
+	bhi	.L946
+.L947:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L941:
+.L946:
 	ldrh	w2, [x20, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x20, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L940
+	b	.L945
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.align	2
 	.global	ftl_memcpy
@@ -6514,11 +6587,11 @@ FtlBbmTblFlush:
 	ldrh	w2, [x19, 114]
 	str	x0, [x19, 3416]
 	bl	ftl_memset
-.L947:
+.L952:
 	ldrh	w0, [x19, 58]
 	add	x20, x19, 3408
 	cmp	w21, w0
-	blt	.L948
+	blt	.L953
 	ldr	x24, [x20, 16]
 	mov	w1, 255
 	mov	w2, 16
@@ -6543,7 +6616,7 @@ FtlBbmTblFlush:
 	ldr	w0, [x19, 32]
 	mov	x19, x1
 	strh	w0, [x24, 12]
-.L949:
+.L954:
 	ldr	x0, [x25, 3440]
 	str	x0, [x20, 8]
 	ldr	x0, [x25, 3448]
@@ -6566,7 +6639,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L950
+	blt	.L955
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19]
@@ -6590,13 +6663,13 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L950:
+.L955:
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L951
+	bne	.L956
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC101
@@ -6604,15 +6677,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC101
 	bl	sftl_printk
 	cmp	w21, 3
-	bls	.L949
+	bls	.L954
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC102
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC102
 	bl	sftl_printk
+.L958:
+	b	.L958
 .L953:
-	b	.L953
-.L948:
 	ldrh	w2, [x22, -192]
 	ldr	x1, [x23], 8
 	ldr	x0, [x20, 8]
@@ -6621,12 +6694,12 @@ FtlBbmTblFlush:
 	add	w21, w21, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L947
-.L954:
+	b	.L952
+.L959:
 	mov	w23, 1
-	b	.L949
-.L951:
-	cbz	w23, .L954
+	b	.L954
+.L956:
+	cbz	w23, .L959
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6651,13 +6724,13 @@ allocate_data_superblock:
 	add	x23, x22, 2520
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L957:
+.L962:
 	ldrh	w1, [x22, 2400]
 	ldrh	w0, [x22, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x22, 44]
 	cmp	w0, w1
-	ble	.L958
+	ble	.L963
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6665,9 +6738,9 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L958:
+.L963:
 	cmp	x20, x23
-	bne	.L983
+	bne	.L988
 	ldrh	w0, [x19, 2416]
 	ldr	w1, [x19, 3244]
 	mul	w1, w0, w1
@@ -6675,15 +6748,15 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L959
+	beq	.L964
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L959:
+.L964:
 	add	x0, x19, 2408
 	bl	List_pop_index_node
 	and	w24, w0, 65535
 	ldrh	w0, [x19, 2416]
-	cbnz	w0, .L960
+	cbnz	w0, .L965
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6691,7 +6764,7 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L960:
+.L965:
 	ldrh	w0, [x19, 2416]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2416]
@@ -6699,7 +6772,7 @@ allocate_data_superblock:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L961
+	cbnz	w0, .L966
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x24, 1, 16
 	mov	w2, -1
@@ -6711,7 +6784,7 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L957
+	ble	.L962
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	mov	w2, 2674
@@ -6719,17 +6792,17 @@ allocate_data_superblock:
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L957
-.L983:
+	b	.L962
+.L988:
 	mov	w1, 0
-	b	.L959
-.L961:
+	b	.L964
+.L966:
 	ldrh	w1, [x19, 2400]
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, w1
 	ldrh	w1, [x19, 44]
 	cmp	w0, w1
-	ble	.L963
+	ble	.L968
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6737,17 +6810,17 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L963:
+.L968:
 	add	x27, x20, 16
 	ldrh	w4, [x19, 36]
 	mov	x3, x27
 	mov	x0, 0
 	mov	w25, 0
 	mov	w5, 65535
-.L964:
+.L969:
 	cmp	w4, w0, uxth
-	bhi	.L966
-	cbnz	w25, .L967
+	bhi	.L971
+	cbnz	w25, .L972
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6755,10 +6828,10 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L967:
+.L972:
 	ldrh	w0, [x19, 2672]
 	cmp	w0, w24
-	bne	.L968
+	bne	.L973
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6766,17 +6839,17 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L968:
+.L973:
 	ldrb	w0, [x20, 8]
 	uxtw	x26, w24
-	cbnz	w0, .L969
+	cbnz	w0, .L974
 	ldr	x2, [x19, 2384]
 	lsl	x1, x26, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L970
+	cbz	w0, .L975
 	ldrh	w3, [x19, 96]
 	add	w0, w0, w3
-.L991:
+.L996:
 	strh	w0, [x2, x1]
 	mov	w1, 0
 	ldr	w0, [x19, 2628]
@@ -6784,15 +6857,15 @@ allocate_data_superblock:
 	str	w0, [x19, 2628]
 	mov	w0, w24
 	bl	ftl_set_blk_mode
-.L972:
+.L977:
 	ldr	x0, [x19, 2384]
 	lsl	x26, x26, 1
 	ldr	w1, [x19, 2644]
 	ldrh	w0, [x0, x26]
 	cmp	w0, w1
-	bls	.L973
+	bls	.L978
 	str	w0, [x19, 2644]
-.L973:
+.L978:
 	ldr	w1, [x19, 2632]
 	ubfiz	x3, x25, 5, 16
 	ldrh	w0, [x19, 96]
@@ -6806,51 +6879,51 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	x0, 0
-.L974:
+.L979:
 	cmp	x3, x0
-	bne	.L975
+	bne	.L980
 	ldrb	w1, [x20, 8]
 	mov	w2, w25
 	ldr	x0, [x19, 3968]
 	mov	x28, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L976:
+.L981:
 	cmp	w25, w28, uxth
-	bhi	.L978
+	bhi	.L983
 	cmp	w1, 0
-	ble	.L979
+	ble	.L984
 	mov	w0, w24
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L979:
+.L984:
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L980
+	cbnz	w0, .L985
 	ldr	x0, [x19, 2376]
 	mov	w1, -1
 	strh	w1, [x0, x26]
-	b	.L957
-.L966:
+	b	.L962
+.L971:
 	ldr	x1, [x19, 3968]
 	add	x2, x1, x0, lsl 5
 	stp	xzr, xzr, [x2, 8]
 	ldrh	w2, [x3]
 	cmp	w2, w5
-	beq	.L965
+	beq	.L970
 	ubfiz	x6, x25, 5, 16
 	add	w25, w25, 1
 	add	x1, x1, x6
 	and	w25, w25, 65535
 	lsl	w2, w2, 10
 	str	w2, [x1, 4]
-.L965:
+.L970:
 	add	x0, x0, 1
 	add	x3, x3, 2
-	b	.L964
-.L970:
+	b	.L969
+.L975:
 	mov	w0, 2
-	b	.L991
-.L969:
+	b	.L996
+.L974:
 	ldr	x2, [x19, 2384]
 	lsl	x0, x26, 1
 	ldrh	w1, [x2, x0]
@@ -6861,22 +6934,22 @@ allocate_data_superblock:
 	str	w0, [x19, 2632]
 	mov	w0, w24
 	bl	ftl_set_blk_mode.part.7
-	b	.L972
-.L975:
+	b	.L977
+.L980:
 	ldr	x1, [x19, 3968]
 	add	x1, x1, x0
 	add	x0, x0, 32
 	ldr	w2, [x1, 4]
 	and	w2, w2, -1024
 	str	w2, [x1, 4]
-	b	.L974
-.L978:
+	b	.L979
+.L983:
 	ldr	x2, [x19, 3968]
 	lsl	x0, x28, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L977
+	bne	.L982
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 104]
@@ -6887,11 +6960,11 @@ allocate_data_superblock:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-.L977:
+.L982:
 	add	x28, x28, 1
 	add	x27, x27, 2
-	b	.L976
-.L980:
+	b	.L981
+.L985:
 	add	x21, x21, :lo12:.LANCHOR0
 	strh	wzr, [x20, 2]
 	strb	wzr, [x20, 6]
@@ -6908,10 +6981,10 @@ allocate_data_superblock:
 	ldrh	w2, [x20]
 	strh	w0, [x1, x2, lsl 1]
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L981
+	cbz	w0, .L986
 	ldrb	w0, [x20, 7]
-	cbnz	w0, .L982
-.L981:
+	cbnz	w0, .L987
+.L986:
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -6919,7 +6992,7 @@ allocate_data_superblock:
 	add	x1, x1, 424
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L982:
+.L987:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6944,16 +7017,16 @@ FtlGcFreeBadSuperBlk:
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x19, 3328]
 	str	x27, [sp, 80]
-	cbz	w0, .L993
+	cbz	w0, .L998
 	add	x23, x19, 64
 	add	x24, x19, 3336
 	mov	w21, 0
-.L994:
+.L999:
 	ldrh	w0, [x19, 36]
 	cmp	w0, w21
-	bhi	.L1000
+	bhi	.L1005
 	bl	FtlGcReFreshBadBlk
-.L993:
+.L998:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6962,7 +7035,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1000:
+.L1005:
 	ldrb	w0, [x23, w21, sxtw]
 	mov	w1, w22
 	adrp	x26, .LC103
@@ -6970,18 +7043,18 @@ FtlGcFreeBadSuperBlk:
 	mov	w20, 0
 	bl	V2P_block
 	and	w25, w0, 65535
-.L995:
+.L1000:
 	ldrh	w0, [x19, 3328]
 	cmp	w0, w20
-	bhi	.L999
+	bhi	.L1004
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L994
-.L999:
+	b	.L999
+.L1004:
 	ldrh	w0, [x24, w20, sxtw 1]
 	add	w27, w20, 1
 	cmp	w0, w25
-	bne	.L996
+	bne	.L1001
 	mov	w1, w25
 	mov	x0, x26
 	bl	sftl_printk
@@ -6990,22 +7063,22 @@ FtlGcFreeBadSuperBlk:
 	bl	FtlBbmTblFlush
 	ldrh	w0, [x19, 3328]
 	mov	w1, w27
-.L997:
+.L1002:
 	cmp	w20, w0
-	bcc	.L998
+	bcc	.L1003
 	sub	w0, w0, #1
 	strh	w0, [x19, 3328]
-.L996:
+.L1001:
 	and	w20, w27, 65535
-	b	.L995
-.L998:
+	b	.L1000
+.L1003:
 	sub	w2, w1, #1
 	ldrh	w3, [x24, w1, sxtw 1]
 	add	w20, w20, 1
 	add	w1, w1, 1
 	and	w20, w20, 65535
 	strh	w3, [x24, w2, sxtw 1]
-	b	.L997
+	b	.L1002
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.align	2
 	.global	update_vpc_list
@@ -7021,19 +7094,19 @@ update_vpc_list:
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, 2376]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1006
+	cbnz	w1, .L1011
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w19
-	bne	.L1007
+	bne	.L1012
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L1008:
+.L1013:
 	add	x21, x20, :lo12:.LANCHOR0
 	mov	w1, w19
 	add	x0, x21, 2368
 	bl	List_remove_node
 	ldrh	w0, [x21, 2400]
-	cbnz	w0, .L1010
+	cbnz	w0, .L1015
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7041,7 +7114,7 @@ update_vpc_list:
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1010:
+.L1015:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20, 2400]
 	sub	w0, w0, #1
@@ -7055,7 +7128,7 @@ update_vpc_list:
 	add	w0, w0, w1
 	ldrh	w1, [x20, 44]
 	cmp	w0, w1
-	ble	.L1014
+	ble	.L1019
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7063,30 +7136,30 @@ update_vpc_list:
 	add	x1, x1, 456
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1014:
+.L1019:
 	mov	w0, 1
-	b	.L1005
-.L1007:
+	b	.L1010
+.L1012:
 	ldrh	w1, [x0, 2424]
 	cmp	w1, w19
-	beq	.L1013
+	beq	.L1018
 	ldrh	w1, [x0, 2472]
 	cmp	w1, w19
-	beq	.L1013
+	beq	.L1018
 	ldrh	w0, [x0, 2520]
 	cmp	w0, w19
-	bne	.L1008
-.L1013:
+	bne	.L1013
+.L1018:
 	mov	w0, 0
-.L1005:
+.L1010:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1006:
+.L1011:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1013
+	b	.L1018
 	.size	update_vpc_list, .-update_vpc_list
 	.align	2
 	.global	decrement_vpc_count
@@ -7099,13 +7172,13 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1017
+	beq	.L1022
 	adrp	x20, .LANCHOR0
 	add	x22, x20, :lo12:.LANCHOR0
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x22, 2376]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1018
+	cbnz	w0, .L1023
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC104
@@ -7113,7 +7186,7 @@ decrement_vpc_count:
 	bl	sftl_printk
 	ldr	x0, [x22, 2376]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1019
+	cbnz	w0, .L1024
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7121,7 +7194,7 @@ decrement_vpc_count:
 	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1019:
+.L1024:
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w1, 16
 	add	x6, x22, 2408
@@ -7130,12 +7203,12 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1020
+	cbz	w0, .L1025
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, 2416]
-	cbnz	w0, .L1021
+	cbnz	w0, .L1026
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7143,7 +7216,7 @@ decrement_vpc_count:
 	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1021:
+.L1026:
 	add	x20, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x20, 2416]
 	sub	w0, w0, #1
@@ -7156,27 +7229,27 @@ decrement_vpc_count:
 	adrp	x0, .LC105
 	add	x0, x0, :lo12:.LC105
 	bl	sftl_printk
-.L1020:
+.L1025:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1024:
+.L1029:
 	mov	w21, 0
-	b	.L1016
-.L1018:
+	b	.L1021
+.L1023:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1017:
+.L1022:
 	adrp	x20, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w1, 65535
 	ldrh	w0, [x20, -48]
 	cmp	w0, w1
-	bne	.L1023
+	bne	.L1028
 	strh	w19, [x20, -48]
-	b	.L1024
-.L1023:
+	b	.L1029
+.L1028:
 	cmp	w19, w0
-	beq	.L1024
+	beq	.L1029
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR0
@@ -7193,9 +7266,9 @@ decrement_vpc_count:
 	mul	x0, x0, x2
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1016
+	cbnz	w1, .L1021
 	cmp	w19, w0, uxth
-	beq	.L1016
+	beq	.L1021
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7203,7 +7276,7 @@ decrement_vpc_count:
 	add	x1, x1, 472
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1016:
+.L1021:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7223,16 +7296,16 @@ FtlWriteDump_data:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrh	w2, [x20, 2428]
-	cbz	w2, .L1030
+	cbz	w2, .L1035
 	ldrb	w1, [x20, 2432]
-	cbnz	w1, .L1030
+	cbnz	w1, .L1035
 	ldrb	w1, [x20, 2431]
 	ldrh	w3, [x20, 106]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1030
+	beq	.L1035
 	ldrb	w0, [x20, 2434]
-	cbnz	w0, .L1029
+	cbnz	w0, .L1034
 	ldr	w22, [x20, 2584]
 	add	x1, x29, 92
 	ldrh	w24, [x20, 36]
@@ -7248,41 +7321,41 @@ FtlWriteDump_data:
 	stp	x1, x21, [x29, 104]
 	str	w22, [x29, 120]
 	str	wzr, [x21, 4]
-	beq	.L1032
+	beq	.L1037
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.L1033:
+.L1038:
 	add	x25, x19, :lo12:.LANCHOR0
 	lsl	w24, w24, 2
 	add	x20, x25, 2424
 	mov	w0, -3947
 	mov	w23, 0
 	strh	w0, [x21]
-.L1034:
+.L1039:
 	cmp	w24, w23
-	bne	.L1038
-.L1035:
+	bne	.L1043
+.L1040:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 1
 	strb	w0, [x19, 2434]
-.L1029:
+.L1034:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1032:
+.L1037:
 	ldrh	w2, [x20, 114]
 	mov	w1, 255
 	ldr	x0, [x20, 3440]
 	bl	ftl_memset
-	b	.L1033
-.L1038:
+	b	.L1038
+.L1043:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1035
+	cbz	w0, .L1040
 	ldr	w0, [x29, 100]
 	add	w23, w23, 1
 	stp	w22, w0, [x21, 8]
@@ -7304,11 +7377,11 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	w0, [x20]
 	bl	decrement_vpc_count
-	b	.L1034
-.L1030:
+	b	.L1039
+.L1035:
 	add	x19, x19, :lo12:.LANCHOR0
 	strb	wzr, [x19, 2434]
-	b	.L1029
+	b	.L1034
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.align	2
 	.global	l2p_flush
@@ -7321,26 +7394,26 @@ l2p_flush:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w19, 0
 	bl	FtlWriteDump_data
-.L1048:
+.L1053:
 	ldrh	w0, [x20, 142]
 	cmp	w0, w19
-	bhi	.L1050
+	bhi	.L1055
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1050:
+.L1055:
 	ldr	x1, [x20, 2568]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1049
+	tbz	w0, #31, .L1054
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1049:
+.L1054:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1048
+	b	.L1053
 	.size	l2p_flush, .-l2p_flush
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -7357,7 +7430,7 @@ FtlRecoverySuperblock:
 	stp	x27, x28, [sp, 80]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	beq	.L1170
+	beq	.L1175
 	ldrb	w0, [x19, 6]
 	adrp	x20, .LANCHOR0
 	str	w0, [x29, 156]
@@ -7365,11 +7438,11 @@ FtlRecoverySuperblock:
 	ldrh	w27, [x19, 2]
 	ldrh	w0, [x0, 106]
 	cmp	w0, w27
-	bne	.L1055
+	bne	.L1060
 	strh	wzr, [x19, 4]
-.L1176:
+.L1181:
 	strb	wzr, [x19, 6]
-.L1170:
+.L1175:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7378,17 +7451,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1055:
+.L1060:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L1056:
+.L1061:
 	cmp	w0, w1
-	beq	.L1057
+	beq	.L1062
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w24, w0
 	cmn	w0, #1
-	beq	.L1058
+	beq	.L1063
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x1, x19, 16
 	str	x1, [x29, 144]
@@ -7401,9 +7474,9 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	ldrh	w9, [x0, 116]
 	add	x1, x19, x1, lsl 1
-.L1059:
+.L1064:
 	cmp	x5, x1
-	bne	.L1063
+	bne	.L1068
 	add	x23, x20, :lo12:.LANCHOR0
 	mov	w2, 0
 	mov	w1, w21
@@ -7416,42 +7489,42 @@ FtlRecoverySuperblock:
 	mov	w7, 65535
 	mov	x6, x4
 	mov	w3, 0
-.L1064:
+.L1069:
 	cmp	w21, w3
-	bne	.L1069
+	bne	.L1074
 	add	w23, w24, 1
 	ldr	w0, [x4, 4]
 	and	w23, w23, 65535
-.L1172:
+.L1177:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w28, w0, 65535
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 106]
 	cmp	w0, w23
-	bne	.L1071
+	bne	.L1076
 	strh	w23, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1071:
+.L1076:
 	ldr	w0, [x29, 156]
 	cmp	w23, w27
 	ccmp	w28, w0, 0, eq
-	bne	.L1072
-.L1177:
+	bne	.L1077
+.L1182:
 	mov	w2, w28
 	mov	w1, w23
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1170
-.L1057:
+	b	.L1175
+.L1062:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1056
-.L1058:
-	cbz	w27, .L1060
+	b	.L1061
+.L1063:
+	cbz	w27, .L1065
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7459,11 +7532,11 @@ FtlRecoverySuperblock:
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1060:
+.L1065:
 	ldr	w0, [x29, 156]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L1061
+	beq	.L1066
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -7471,13 +7544,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, 496
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1061:
+.L1066:
 	strh	wzr, [x19, 2]
-	b	.L1176
-.L1063:
+	b	.L1181
+.L1068:
 	ldrh	w2, [x5]
 	cmp	w2, w10
-	beq	.L1062
+	beq	.L1067
 	ldr	x4, [x0, 4024]
 	ubfiz	x7, x21, 5, 16
 	orr	w2, w24, w2, lsl 10
@@ -7497,77 +7570,77 @@ FtlRecoverySuperblock:
 	sdiv	w2, w2, w6
 	add	x2, x4, x2, sxtw 2
 	str	x2, [x3, 16]
-.L1062:
+.L1067:
 	add	x5, x5, 2
-	b	.L1059
-.L1069:
+	b	.L1064
+.L1074:
 	ldr	w0, [x6]
-	cbnz	w0, .L1065
+	cbnz	w0, .L1070
 	ldr	x8, [x6, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1066
+	beq	.L1071
 	ldr	w1, [x23, 2624]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1066
+	cbz	w0, .L1071
 	add	w5, w5, 1
 	str	w5, [x23, 2624]
-.L1066:
+.L1071:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1068
+	bne	.L1073
 	ubfiz	x3, x3, 5, 16
 	and	w23, w24, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1172
-.L1065:
+	b	.L1177
+.L1070:
 	mov	w7, w9
-.L1068:
+.L1073:
 	add	w3, w3, 1
 	add	x6, x6, 32
 	and	w3, w3, 65535
-	b	.L1064
-.L1072:
+	b	.L1069
+.L1077:
 	mov	w0, 65535
 	adrp	x21, .LANCHOR3
 	cmp	w7, w0
-	bne	.L1073
+	bne	.L1078
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1074
-.L1073:
+	cbnz	w0, .L1079
+.L1078:
 	add	x0, x21, :lo12:.LANCHOR3
 	and	w3, w24, 65535
 	ldr	w1, [x0, -36]
 	cmn	w1, #1
-	bne	.L1075
+	bne	.L1080
 	str	w22, [x0, -36]
-.L1075:
+.L1080:
 	add	w0, w27, 7
 	cmp	w0, w24, uxth
-	bge	.L1123
+	bge	.L1128
 	sub	w25, w3, #7
 	and	w25, w25, 65535
-.L1076:
+.L1081:
 	add	x26, x20, :lo12:.LANCHOR0
 	mov	w4, 65535
-.L1077:
+.L1082:
 	cmp	w25, w3
-	bhi	.L1084
+	bhi	.L1089
 	ldrh	w0, [x26, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-	b	.L1085
-.L1123:
+	b	.L1090
+.L1128:
 	mov	w25, w27
-	b	.L1076
-.L1079:
+	b	.L1081
+.L1084:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1078
+	beq	.L1083
 	ldr	x5, [x26, 4024]
 	ubfiz	x6, x24, 5, 16
 	add	w24, w24, 1
@@ -7575,11 +7648,11 @@ FtlRecoverySuperblock:
 	add	x5, x5, x6
 	and	w24, w24, 65535
 	str	w2, [x5, 4]
-.L1078:
+.L1083:
 	add	x1, x1, 2
-.L1085:
+.L1090:
 	cmp	x0, x1
-	bne	.L1079
+	bne	.L1084
 	ldr	x0, [x26, 4024]
 	mov	w1, w24
 	mov	w2, 0
@@ -7594,31 +7667,31 @@ FtlRecoverySuperblock:
 	ldr	w3, [x29, 136]
 	add	x0, x1, 16
 	add	x24, x1, x24
-.L1080:
+.L1085:
 	cmp	x24, x0
-	bne	.L1083
+	bne	.L1088
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1077
-.L1083:
+	b	.L1082
+.L1088:
 	ldr	w1, [x0, -16]
-	cbnz	w1, .L1074
+	cbnz	w1, .L1079
 	ldr	x1, [x0]
 	ldrh	w5, [x1]
 	cmp	w5, w4
-	beq	.L1082
+	beq	.L1087
 	ldr	w1, [x1, 4]
 	cmn	w1, #1
-	beq	.L1082
+	beq	.L1087
 	str	w1, [x2, -36]
-.L1082:
+.L1087:
 	add	x0, x0, 32
-	b	.L1080
-.L1084:
+	b	.L1085
+.L1089:
 	add	x0, x21, :lo12:.LANCHOR3
 	mov	w1, -1
 	str	w1, [x0, -36]
-.L1074:
+.L1079:
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w0, 1
 	mov	w25, w27
@@ -7628,16 +7701,16 @@ FtlRecoverySuperblock:
 	bl	FtlMapBlkWriteDump_data
 	sub	x0, x21, #24
 	str	x0, [x29, 112]
-.L1086:
+.L1091:
 	ldrh	w0, [x20, 36]
 	mov	w24, 0
 	ldr	x1, [x29, 144]
 	mov	w4, 65535
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 1
-.L1087:
+.L1092:
 	cmp	x0, x1
-	bne	.L1089
+	bne	.L1094
 	ldr	x0, [x20, 4024]
 	mov	w1, w24
 	mov	w2, 0
@@ -7649,34 +7722,34 @@ FtlRecoverySuperblock:
 	add	x0, x0, 496
 	mov	x24, 0
 	str	x0, [x29, 128]
-.L1090:
+.L1095:
 	ldr	x0, [x29, 120]
 	cmp	x0, x24
-	bne	.L1117
+	bne	.L1122
 	add	w25, w25, 1
 	ldrh	w0, [x20, 106]
 	and	w25, w25, 65535
 	cmp	w0, w25
-	bne	.L1086
+	bne	.L1091
 	ldrh	w1, [x20, 36]
 	mov	w0, 0
 	strh	w25, [x19, 2]
 	mov	w2, 65535
 	strh	wzr, [x19, 4]
-.L1118:
+.L1123:
 	cmp	w0, w1
-	beq	.L1170
+	beq	.L1175
 	ldr	x4, [x29, 144]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 144]
 	cmp	w3, w2
-	beq	.L1119
+	beq	.L1124
 	strb	w0, [x19, 6]
-	b	.L1170
-.L1089:
+	b	.L1175
+.L1094:
 	ldrh	w2, [x1]
 	cmp	w2, w4
-	beq	.L1088
+	beq	.L1093
 	ldr	x3, [x20, 4024]
 	ubfiz	x5, x24, 5, 16
 	add	w24, w24, 1
@@ -7684,10 +7757,10 @@ FtlRecoverySuperblock:
 	add	x3, x3, x5
 	and	w24, w24, 65535
 	str	w2, [x3, 4]
-.L1088:
+.L1093:
 	add	x1, x1, 2
-	b	.L1087
-.L1117:
+	b	.L1092
+.L1122:
 	ldr	x4, [x20, 4024]
 	add	x4, x4, x24
 	ldr	w5, [x4, 4]
@@ -7696,45 +7769,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w25, w27
-	bcc	.L1091
+	bcc	.L1096
 	ldr	w1, [x29, 156]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1091
+	bhi	.L1096
 	cmp	w25, w23
 	ccmp	w28, w0, 0, eq
-	beq	.L1092
+	beq	.L1097
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1093
+	beq	.L1098
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1094
-.L1101:
+	beq	.L1099
+.L1106:
 	ldrh	w0, [x19]
-.L1175:
+.L1180:
 	bl	decrement_vpc_count
-.L1091:
+.L1096:
 	add	x24, x24, 32
-	b	.L1090
-.L1094:
+	b	.L1095
+.L1099:
 	ldr	w22, [x3, 4]
 	cmn	w22, #1
-	beq	.L1095
+	beq	.L1100
 	ldr	w1, [x20, 2624]
 	mov	w0, w22
 	str	x3, [x29, 136]
 	bl	ftl_cmp_data_ver
 	ldr	x3, [x29, 136]
-	cbz	w0, .L1095
+	cbz	w0, .L1100
 	add	w0, w22, 1
 	str	w0, [x20, 2624]
-.L1095:
+.L1100:
 	ldrh	w1, [x3]
 	mov	w0, 61589
 	cmp	w1, w0
-	beq	.L1096
+	beq	.L1101
 	ldr	x1, [x29, 128]
 	mov	w2, 1954
 	str	x3, [x29, 136]
@@ -7742,7 +7815,7 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
 	ldr	x3, [x29, 136]
-.L1096:
+.L1101:
 	ldp	w26, w0, [x3, 8]
 	add	x1, x29, 168
 	str	w0, [x29, 164]
@@ -7751,13 +7824,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x21, -36]
 	cmn	w1, #1
-	beq	.L1097
+	beq	.L1102
 	mov	w0, w22
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1097
+	cbz	w0, .L1102
 	ldr	w1, [x29, 164]
 	cmn	w1, #1
-	beq	.L1098
+	beq	.L1103
 	ldr	x0, [x20, 4024]
 	mov	w2, 0
 	add	x0, x0, x24
@@ -7773,24 +7846,24 @@ FtlRecoverySuperblock:
 	add	x3, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L1099
-.L1100:
+	bne	.L1104
+.L1105:
 	mov	w0, -1
 	str	w0, [x29, 164]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L1108:
+.L1113:
 	ldr	w4, [x29, 164]
 	cmn	w4, #1
-	beq	.L1091
-.L1122:
+	beq	.L1096
+.L1127:
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	and	w26, w0, 65535
 	ldrh	w0, [x20, 44]
 	mov	w3, w26
 	cmp	w0, w26
-	bhi	.L1113
+	bhi	.L1118
 	ldr	x1, [x29, 128]
 	mov	w2, 2055
 	adrp	x0, .LC1
@@ -7798,47 +7871,47 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
 	ldr	w3, [x29, 136]
-.L1113:
+.L1118:
 	ldr	x1, [x20, 2376]
 	ubfiz	x0, x26, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1114
+	cbz	w0, .L1119
 	mov	w0, w3
-	b	.L1175
-.L1098:
+	b	.L1180
+.L1103:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	bne	.L1101
+	bne	.L1106
 	mov	w2, 1
 	add	x1, x29, 164
 	mov	w0, w26
 	bl	log2phys
-	b	.L1101
-.L1099:
+	b	.L1106
+.L1104:
 	ldr	w0, [x4, 8]
 	cmp	w26, w0
-	bne	.L1100
+	bne	.L1105
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x21, -36]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1100
+	cbz	w0, .L1105
 	ldp	w0, w1, [x29, 168]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 164]
-	bne	.L1103
-.L1173:
+	bne	.L1108
+.L1178:
 	mov	w0, w26
 	bl	FtlReUsePrevPpa
-	b	.L1100
-.L1103:
+	b	.L1105
+.L1108:
 	cmp	w0, w1
-	beq	.L1100
+	beq	.L1105
 	cmn	w0, #1
-	beq	.L1104
+	beq	.L1109
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -7848,54 +7921,54 @@ FtlRecoverySuperblock:
 	add	x0, x0, x24
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L1105:
+.L1110:
 	adrp	x0, .LANCHOR0+4024
 	ldr	x0, [x0, #:lo12:.LANCHOR0+4024]
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	beq	.L1106
+	beq	.L1111
 	ldr	w3, [x4, 4]
 	ldr	w0, [x21, -36]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1106
+	cbz	w0, .L1111
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1100
-.L1106:
+	cbz	w0, .L1105
+.L1111:
 	ldr	w1, [x29, 164]
-	b	.L1173
-.L1104:
+	b	.L1178
+.L1109:
 	str	w0, [x3]
-	b	.L1105
-.L1097:
+	b	.L1110
+.L1102:
 	ldp	w1, w0, [x29, 168]
 	cmp	w1, w0
-	beq	.L1108
+	beq	.L1113
 	mov	w2, 1
 	add	x1, x29, 172
 	mov	w0, w26
 	bl	log2phys
 	ldr	w4, [x29, 168]
 	cmn	w4, #1
-	beq	.L1108
+	beq	.L1113
 	ldr	w0, [x29, 164]
 	cmp	w4, w0
-	beq	.L1122
+	beq	.L1127
 	lsr	w0, w4, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20, 2424]
 	and	w0, w0, 65535
 	cmp	w1, w0
-	beq	.L1112
+	beq	.L1117
 	ldrh	w1, [x20, 2472]
 	cmp	w1, w0
-	beq	.L1112
+	beq	.L1117
 	ldrh	w1, [x20, 2520]
 	cmp	w1, w0
-	bne	.L1108
-.L1112:
+	bne	.L1113
+.L1117:
 	ldr	x0, [x20, 4024]
 	mov	w2, 0
 	mov	w1, 1
@@ -7907,52 +7980,52 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, 4024]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1108
+	beq	.L1113
 	ldr	x3, [x29, 136]
 	mov	w0, w22
 	ldr	w1, [x3, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1108
+	cbnz	w0, .L1113
 	mov	w2, 1
 	add	x1, x29, 168
 	mov	w0, w26
 	bl	log2phys
-	b	.L1108
-.L1114:
+	b	.L1113
+.L1119:
 	mov	w1, w26
 	adrp	x0, .LC106
 	add	x0, x0, :lo12:.LC106
 	bl	sftl_printk
-	b	.L1091
-.L1093:
+	b	.L1096
+.L1098:
 	ldr	w0, [x21, -28]
 	cmp	w0, 31
-	bhi	.L1115
+	bhi	.L1120
 	ldr	x1, [x29, 112]
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x21, -28]
-.L1115:
+.L1120:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x21, -36]
 	cmn	w0, #1
-	bne	.L1116
-.L1174:
+	bne	.L1121
+.L1179:
 	str	w22, [x21, -36]
-	b	.L1091
-.L1116:
+	b	.L1096
+.L1121:
 	cmp	w22, w0
-	bcs	.L1091
-	b	.L1174
-.L1119:
+	bcs	.L1096
+	b	.L1179
+.L1124:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1118
-.L1092:
+	b	.L1123
+.L1097:
 	strb	w28, [x19, 6]
 	strh	w23, [x19, 2]
-	b	.L1177
+	b	.L1182
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.align	2
 	.global	FtlSuperblockPowerLostFix
@@ -7988,12 +8061,12 @@ FtlSuperblockPowerLostFix:
 	movk	w3, 0x1234, lsl 16
 	ldr	x1, [x0, 3440]
 	str	w3, [x1, 4]
-.L1179:
+.L1184:
 	subs	w22, w22, #1
-	beq	.L1181
+	beq	.L1186
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1180
-.L1181:
+	cbnz	w0, .L1185
+.L1186:
 	add	x2, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x19]
 	ldrh	w4, [x19, 4]
@@ -8011,12 +8084,12 @@ FtlSuperblockPowerLostFix:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1180:
+.L1185:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 68]
 	cmn	w0, #1
-	beq	.L1181
+	beq	.L1186
 	ldr	w0, [x20, 2624]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -8030,7 +8103,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1179
+	b	.L1184
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.align	2
 	.global	FtlLoadBbt
@@ -8052,11 +8125,11 @@ FtlLoadBbt:
 	ldrh	w20, [x23, 102]
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-.L1191:
+.L1196:
 	ldrh	w0, [x23, 102]
 	sub	w0, w0, #16
 	cmp	w20, w0
-	ble	.L1194
+	ble	.L1199
 	lsl	w0, w20, 10
 	mov	w2, 1
 	str	w0, [x21, 4]
@@ -8065,7 +8138,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	bne	.L1192
+	bne	.L1197
 	ldr	w0, [x21, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -8073,27 +8146,27 @@ FtlLoadBbt:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-.L1192:
+.L1197:
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1193
+	beq	.L1198
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	bne	.L1193
+	bne	.L1198
 	ldr	w1, [x22, 4]
 	str	w1, [x23, 168]
 	strh	w20, [x23, 160]
 	ldrh	w1, [x22, 8]
 	strh	w1, [x23, 164]
-.L1194:
+.L1199:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w1, [x21, 160]
 	cmp	w1, w0
-	beq	.L1208
+	beq	.L1213
 	ldrh	w1, [x21, 164]
 	cmp	w1, w0
-	beq	.L1198
+	beq	.L1203
 	add	x0, x21, 3408
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -8102,21 +8175,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x21, 3408]
 	cmn	w0, #1
-	beq	.L1198
+	beq	.L1203
 	ldrh	w1, [x22]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1198
+	bne	.L1203
 	ldr	w1, [x21, 168]
 	ldr	w0, [x22, 4]
 	cmp	w0, w1
-	bls	.L1198
+	bls	.L1203
 	str	w0, [x21, 168]
 	ldrh	w1, [x21, 164]
 	ldrh	w0, [x22, 8]
 	strh	w1, [x21, 160]
 	strh	w0, [x21, 164]
-.L1198:
+.L1203:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w1, 1
 	add	x23, x20, 3408
@@ -8126,8 +8199,8 @@ FtlLoadBbt:
 	sxth	w21, w0
 	add	w0, w0, 1
 	strh	w0, [x20, 162]
-.L1200:
-	tbz	w21, #31, .L1203
+.L1205:
+	tbz	w21, #31, .L1208
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -8135,46 +8208,46 @@ FtlLoadBbt:
 	add	x1, x1, 520
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1202:
+.L1207:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 10]
 	mov	w2, 65535
 	strh	w0, [x1, 166]
 	ldrh	w0, [x22, 12]
 	cmp	w0, w2
-	beq	.L1205
+	beq	.L1210
 	ldr	w2, [x1, 32]
 	cmp	w0, w2
-	beq	.L1205
+	beq	.L1210
 	ldrh	w1, [x1, 46]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1205
+	bcs	.L1210
 	cmp	w0, w1
-	bcs	.L1205
+	bcs	.L1210
 	bl	FtlSysBlkNumInit
-.L1205:
+.L1210:
 	add	x19, x19, :lo12:.LANCHOR0
 	adrp	x21, .LANCHOR3
 	add	x22, x19, 192
 	add	x21, x21, :lo12:.LANCHOR3
 	mov	w20, 0
-.L1206:
+.L1211:
 	ldrh	w0, [x19, 58]
 	cmp	w20, w0
-	bcc	.L1207
+	bcc	.L1212
 	mov	w0, 0
-.L1190:
+.L1195:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1193:
+.L1198:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L1191
-.L1203:
+	b	.L1196
+.L1208:
 	ldrh	w0, [x20, 160]
 	mov	w2, 1
 	mov	w1, w2
@@ -8186,15 +8259,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x23]
 	cmn	w0, #1
-	beq	.L1201
+	beq	.L1206
 	ldrh	w0, [x22]
 	cmp	w0, w24
-	beq	.L1202
-.L1201:
+	beq	.L1207
+.L1206:
 	sub	w21, w21, #1
 	sxth	w21, w21
-	b	.L1200
-.L1207:
+	b	.L1205
+.L1212:
 	ldrh	w2, [x21, -192]
 	ldr	x0, [x19, 3416]
 	mul	w1, w2, w20
@@ -8203,10 +8276,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x22], 8
 	bl	ftl_memcpy
-	b	.L1206
-.L1208:
+	b	.L1211
+.L1213:
 	mov	w0, -1
-	b	.L1190
+	b	.L1195
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.align	2
 	.global	FtlMakeBbt
@@ -8231,47 +8304,47 @@ FtlMakeBbt:
 	add	x25, x0, 172
 	mov	x19, x0
 	add	x20, x0, 3408
-.L1221:
+.L1226:
 	ldrh	w0, [x19, 58]
 	cmp	w24, w0
-	bcc	.L1227
+	bcc	.L1232
 	add	x20, x21, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1228:
+.L1233:
 	ldrh	w0, [x20, 118]
 	cmp	w0, w19
-	bhi	.L1229
+	bhi	.L1234
 	add	x20, x20, 160
 	ldrh	w19, [x20, 12]
 	mov	w22, 65535
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1230:
+.L1235:
 	ldrh	w0, [x20, 12]
 	sub	w0, w0, #48
 	cmp	w19, w0
-	ble	.L1234
+	ble	.L1239
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1231
+	beq	.L1236
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1232
+	cbz	w0, .L1237
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1231:
+.L1236:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1230
-.L1227:
+	b	.L1235
+.L1232:
 	ldr	x0, [x19, 3440]
 	mov	w2, 65535
 	ldr	x27, [x19, 3448]
 	ldrh	w1, [x25]
 	stp	x0, x27, [x20, 8]
 	cmp	w1, w2
-	beq	.L1222
+	beq	.L1227
 	ldrh	w23, [x19, 102]
 	mov	w2, 1
 	madd	w23, w23, w24, w1
@@ -8286,29 +8359,29 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1223:
+.L1228:
 	mov	w0, w23
 	add	w24, w24, 1
 	bl	FtlBbmMapBadBlock
 	add	x26, x26, 8
 	add	x25, x25, 2
-	b	.L1221
-.L1222:
+	b	.L1226
+.L1227:
 	mov	w1, w24
 	bl	FlashGetBadBlockList
 	ldr	x0, [x20, 8]
 	ldr	x1, [x26]
 	bl	FtlBbt2Bitmap
 	ldrh	w22, [x19, 102]
-.L1225:
+.L1230:
 	sub	w22, w22, #1
 	and	w22, w22, 65535
-.L1224:
+.L1229:
 	ldrh	w0, [x19, 102]
 	madd	w0, w24, w0, w22
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1225
+	beq	.L1230
 	ldr	x0, [x19, 3448]
 	mov	w2, 16
 	strh	w22, [x25]
@@ -8344,25 +8417,25 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1223
+	bne	.L1228
 	mov	w0, w23
 	bl	FtlBbmMapBadBlock
-	b	.L1224
-.L1229:
+	b	.L1229
+.L1234:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1228
-.L1232:
+	b	.L1233
+.L1237:
 	ldrh	w0, [x20]
 	cmp	w0, w22
-	bne	.L1233
+	bne	.L1238
 	strh	w19, [x20]
-	b	.L1231
-.L1233:
+	b	.L1236
+.L1238:
 	strh	w19, [x20, 4]
-.L1234:
+.L1239:
 	add	x21, x21, :lo12:.LANCHOR0
 	mov	w2, 2
 	ldr	x1, [x21, 3968]
@@ -8419,16 +8492,16 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x0, 100]
 	cmp	w2, w1
-	bhi	.L1248
+	bhi	.L1253
 	ldrh	w21, [x0, 112]
 	adrp	x26, .LANCHOR3
 	add	x25, x26, :lo12:.LANCHOR3
 	mov	w23, 0
 	sub	x25, x25, #112
 	lsr	w21, w27, w21
-.L1242:
-	cbnz	w28, .L1247
-.L1240:
+.L1247:
+	cbnz	w28, .L1252
+.L1245:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8437,7 +8510,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1247:
+.L1252:
 	add	x2, x22, :lo12:.LANCHOR0
 	add	x0, x26, :lo12:.LANCHOR3
 	ldrh	w1, [x2, 62]
@@ -8450,9 +8523,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w28, w19
 	csel	w19, w0, w19, cc
-	cbz	w4, .L1244
+	cbz	w4, .L1249
 	cmp	w19, w1
-	beq	.L1244
+	beq	.L1249
 	ldr	x0, [x2, 4056]
 	mov	w2, 1
 	str	x0, [x29, 120]
@@ -8462,7 +8535,7 @@ FtlVendorPartWrite:
 	str	w4, [x29, 116]
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1245:
+.L1250:
 	add	x5, x22, :lo12:.LANCHOR0
 	lsl	w4, w19, 9
 	lsl	w20, w20, 9
@@ -8486,17 +8559,17 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1242
-.L1244:
+	b	.L1247
+.L1249:
 	add	x0, x22, :lo12:.LANCHOR0
 	mov	w1, 0
 	ldrh	w2, [x0, 114]
 	ldr	x0, [x0, 4056]
 	bl	ftl_memset
-	b	.L1245
-.L1248:
+	b	.L1250
+.L1253:
 	mov	w23, -1
-	b	.L1240
+	b	.L1245
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.align	2
 	.global	Ftl_save_ext_data
@@ -8508,7 +8581,7 @@ Ftl_save_ext_data:
 	movk	w1, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w1
-	bne	.L1256
+	bne	.L1261
 	stp	x29, x30, [sp, -16]!
 	add	x2, x0, 2720
 	mov	w1, 69
@@ -8543,7 +8616,7 @@ Ftl_save_ext_data:
 	bl	FtlVendorPartWrite
 	ldp	x29, x30, [sp], 16
 	ret
-.L1256:
+.L1261:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.align	2
@@ -8554,21 +8627,21 @@ FtlEctTblFlush:
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w2, [x1, 104]
 	cmp	w2, 31
-	bhi	.L1263
+	bhi	.L1268
 	add	w2, w2, 1
 	strh	w2, [x1, 104]
 	mov	w2, 1
-.L1260:
+.L1265:
 	adrp	x1, .LANCHOR0
-	cbnz	w0, .L1261
+	cbnz	w0, .L1266
 	add	x0, x1, :lo12:.LANCHOR0
 	ldr	x0, [x0, 4080]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w2, w2, w3
 	cmp	w0, w2
-	bcc	.L1265
-.L1261:
+	bcc	.L1270
+.L1266:
 	add	x0, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
@@ -8593,10 +8666,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1263:
+.L1268:
 	mov	w2, 32
-	b	.L1260
-.L1265:
+	b	.L1265
+.L1270:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -8630,7 +8703,7 @@ FtlVendorPartRead:
 	stp	x27, x28, [sp, 80]
 	ldrh	w1, [x0, 100]
 	cmp	w2, w1
-	bhi	.L1278
+	bhi	.L1283
 	ldrh	w21, [x0, 112]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
@@ -8638,9 +8711,9 @@ FtlVendorPartRead:
 	sub	x0, x0, #112
 	str	x0, [x29, 104]
 	lsr	w21, w23, w21
-.L1271:
-	cbnz	w22, .L1277
-.L1269:
+.L1276:
+	cbnz	w22, .L1282
+.L1274:
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8649,7 +8722,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1277:
+.L1282:
 	add	x28, x24, :lo12:.LANCHOR0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
@@ -8664,7 +8737,7 @@ FtlVendorPartRead:
 	cmp	w22, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w4, .L1273
+	cbz	w4, .L1278
 	ldr	x0, [x28, 4056]
 	mov	w2, 1
 	str	x0, [x29, 120]
@@ -8681,7 +8754,7 @@ FtlVendorPartRead:
 	ldr	w0, [x28, 3408]
 	csinv	w25, w25, wzr, ne
 	cmp	w0, 256
-	bne	.L1275
+	bne	.L1280
 	mov	w2, w4
 	mov	w1, w21
 	adrp	x0, .LC107
@@ -8691,7 +8764,7 @@ FtlVendorPartRead:
 	mov	w1, w21
 	ldr	x0, [x29, 104]
 	bl	FtlMapWritePage
-.L1275:
+.L1280:
 	add	x0, x24, :lo12:.LANCHOR0
 	lsl	w20, w20, 9
 	asr	w20, w20, 2
@@ -8700,21 +8773,21 @@ FtlVendorPartRead:
 	mov	x0, x26
 	add	x1, x1, x20, sxtw 2
 	bl	ftl_memcpy
-.L1276:
+.L1281:
 	add	w21, w21, 1
 	sub	w22, w22, w19
 	add	w23, w23, w19
 	add	x26, x26, x27, sxtw
-	b	.L1271
-.L1273:
+	b	.L1276
+.L1278:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L1276
-.L1278:
+	b	.L1281
+.L1283:
 	mov	w25, -1
-	b	.L1269
+	b	.L1274
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.align	2
 	.global	FtlLoadEctTbl
@@ -8734,7 +8807,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1281
+	beq	.L1286
 	adrp	x1, .LC108
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC108
@@ -8745,7 +8818,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x19, 4064]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1281:
+.L1286:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8770,19 +8843,19 @@ Ftl_load_ext_data:
 	ldr	w0, [x20, 2720]
 	movk	w21, 0x4654, lsl 16
 	cmp	w0, w21
-	beq	.L1284
+	beq	.L1289
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x22
 	bl	ftl_memset
 	str	w21, [x20, 2720]
-.L1284:
+.L1289:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 19539
 	movk	w2, 0x4654, lsl 16
 	ldr	w3, [x0, 2720]
 	cmp	w3, w2
-	bne	.L1285
+	bne	.L1290
 	ldr	w2, [x0, 2808]
 	str	w2, [x0, 2612]
 	ldr	w2, [x0, 2812]
@@ -8807,7 +8880,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 2764]
 	str	w1, [x0, 2648]
 	str	w2, [x0, 2644]
-.L1285:
+.L1290:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x0, 2632]
 	ldrh	w1, [x0, 96]
@@ -8933,7 +9006,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.L1290:
+.L1295:
 	ldr	x0, [x19, 3440]
 	mov	w3, 1
 	str	x0, [x20, 8]
@@ -8951,7 +9024,7 @@ FtlVpcTblFlush:
 	ldrh	w1, [x19, 2658]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1291
+	blt	.L1296
 	ldrh	w0, [x19, 2656]
 	ldrh	w24, [x19, 2660]
 	strh	wzr, [x19, 2658]
@@ -8971,53 +9044,53 @@ FtlVpcTblFlush:
 	mov	x0, x20
 	mov	w1, w3
 	bl	FlashProgPages
-.L1291:
+.L1296:
 	ldrh	w0, [x19, 2658]
 	ldr	w1, [x20]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2658]
 	cmn	w1, #1
-	bne	.L1292
+	bne	.L1297
 	cmp	w0, 1
-	bne	.L1293
+	bne	.L1298
 	adrp	x0, .LC1
 	mov	w2, 1169
 	mov	x1, x25
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1293:
+.L1298:
 	ldrh	w0, [x19, 2658]
 	cmp	w0, 1
-	bne	.L1294
+	bne	.L1299
 	ldrh	w0, [x19, 108]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2658]
-.L1294:
+.L1299:
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	cmp	w22, 3
-	bls	.L1290
+	bls	.L1295
 	add	x23, x23, :lo12:.LANCHOR0
 	adrp	x0, .LC109
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x23, 3412]
 	bl	sftl_printk
-.L1296:
-	b	.L1296
-.L1292:
+.L1301:
+	b	.L1301
+.L1297:
 	cmp	w0, 1
-	beq	.L1290
+	beq	.L1295
 	cmp	w1, 256
-	beq	.L1290
+	beq	.L1295
 	mov	w0, 65535
 	cmp	w24, w0
-	beq	.L1297
+	beq	.L1302
 	mov	w1, 1
 	mov	w0, w24
 	bl	FtlFreeSysBlkQueueIn
-.L1297:
+.L1302:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9047,14 +9120,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, 1
-	bne	.L1310
+	bne	.L1315
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1310:
+.L1315:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9072,54 +9145,54 @@ FtlDiscard:
 	stp	x21, x22, [sp, 32]
 	ldr	w2, [x1, 144]
 	cmp	w3, w2
-	bhi	.L1321
+	bhi	.L1326
 	cmp	w19, 31
-	bhi	.L1315
-.L1329:
+	bhi	.L1320
+.L1334:
 	mov	w0, 0
-.L1313:
+.L1318:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1315:
+.L1320:
 	ldrh	w1, [x1, 62]
 	udiv	w21, w0, w1
 	msub	w0, w1, w21, w0
 	ands	w0, w0, 65535
-	beq	.L1316
+	beq	.L1321
 	sub	w1, w1, w0
 	add	w21, w21, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1316:
+.L1321:
 	adrp	x22, .LANCHOR3
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:.LANCHOR3
 	mov	w0, -1
 	str	w0, [x29, 60]
-.L1317:
+.L1322:
 	ldrh	w0, [x20, 62]
 	cmp	w19, w0
-	bcs	.L1319
+	bcs	.L1324
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	w1, [x0, 108]
 	cmp	w1, 32
-	bls	.L1329
+	bls	.L1334
 	str	wzr, [x0, 108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1329
-.L1319:
+	b	.L1334
+.L1324:
 	mov	w2, 0
 	add	x1, x29, 56
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 56]
 	cmn	w0, #1
-	beq	.L1318
+	beq	.L1323
 	ldr	w0, [x22, 108]
 	mov	w2, 1
 	add	x1, x29, 60
@@ -9134,14 +9207,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1318:
+.L1323:
 	ldrh	w0, [x20, 62]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L1317
-.L1321:
+	b	.L1322
+.L1326:
 	mov	w0, -1
-	b	.L1313
+	b	.L1318
 	.size	FtlDiscard, .-FtlDiscard
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -9166,32 +9239,32 @@ FtlVpcCheckAndModify:
 	mov	w1, 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1331:
+.L1336:
 	ldr	w0, [x19, 2584]
 	cmp	w21, w0
-	bcc	.L1333
+	bcc	.L1338
 	adrp	x22, .LC110
 	add	x20, x20, :lo12:.LANCHOR0
 	add	x22, x22, :lo12:.LC110
 	mov	w19, 0
 	mov	w23, 65535
-.L1334:
+.L1339:
 	ldrh	w0, [x20, 44]
 	cmp	w0, w19
-	bhi	.L1338
+	bhi	.L1343
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1333:
+.L1338:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1332
+	beq	.L1337
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldr	x2, [x19, 4088]
@@ -9199,31 +9272,31 @@ FtlVpcCheckAndModify:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1332:
+.L1337:
 	add	w21, w21, 1
-	b	.L1331
-.L1338:
+	b	.L1336
+.L1343:
 	ldr	x0, [x20, 2376]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, 4088]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1336
+	beq	.L1341
 	cmp	w2, w23
-	beq	.L1336
+	beq	.L1341
 	mov	x0, x22
 	mov	w1, w19
 	bl	sftl_printk
 	ldrh	w0, [x20, 2424]
 	cmp	w0, w19
-	beq	.L1336
+	beq	.L1341
 	ldrh	w0, [x20, 2520]
 	cmp	w0, w19
-	beq	.L1336
+	beq	.L1341
 	ldrh	w0, [x20, 2472]
 	cmp	w0, w19
-	beq	.L1336
+	beq	.L1341
 	ldr	x0, [x20, 4088]
 	ldrh	w1, [x0, x21]
 	ldr	x0, [x20, 2376]
@@ -9232,10 +9305,10 @@ FtlVpcCheckAndModify:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1336:
+.L1341:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1334
+	b	.L1339
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.align	2
 	.global	allocate_new_data_superblock
@@ -9251,7 +9324,7 @@ allocate_new_data_superblock:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 44]
 	cmp	w0, w21
-	bcs	.L1344
+	bcs	.L1349
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -9259,18 +9332,18 @@ allocate_new_data_superblock:
 	add	x1, x1, 576
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1344:
+.L1349:
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L1345
+	beq	.L1350
 	add	x1, x19, :lo12:.LANCHOR0
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, 2376]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1346
+	cbz	w0, .L1351
 	mov	w0, w21
 	bl	INSERT_DATA_LIST
-.L1345:
+.L1350:
 	mov	w0, 1
 	adrp	x1, .LANCHOR3
 	strb	w0, [x22, 8]
@@ -9279,21 +9352,21 @@ allocate_new_data_superblock:
 	mov	x20, x1
 	ldrh	w0, [x0, -48]
 	cmp	w0, w2
-	beq	.L1347
+	beq	.L1352
 	cmp	w21, w0
-	bne	.L1348
+	bne	.L1353
 	add	x19, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x19, 2376]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1349
-.L1348:
+	cbz	w1, .L1354
+.L1353:
 	bl	update_vpc_list
-.L1349:
+.L1354:
 	add	x1, x20, :lo12:.LANCHOR3
 	mov	w0, -1
 	strh	w0, [x1, -48]
-.L1347:
+.L1352:
 	mov	x0, x22
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9305,10 +9378,10 @@ allocate_new_data_superblock:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1346:
+.L1351:
 	mov	w0, w21
 	bl	INSERT_FREE_LIST
-	b	.L1345
+	b	.L1350
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.align	2
 	.global	FtlProgPages
@@ -9333,18 +9406,18 @@ FtlProgPages:
 	add	x25, x25, :lo12:.LANCHOR1
 	add	x20, x0, 4
 	bl	FlashProgPages
-.L1355:
+.L1360:
 	cmp	x20, x24
-	beq	.L1362
+	beq	.L1367
 	sub	x23, x20, #4
-	b	.L1363
-.L1358:
+	b	.L1368
+.L1363:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1356
+	bne	.L1361
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9355,12 +9428,12 @@ FtlProgPages:
 	ldrh	w0, [x21, 106]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1356:
+.L1361:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1357
+	cbnz	w0, .L1362
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1357:
+.L1362:
 	ldr	w0, [x21, 2816]
 	add	w0, w0, 1
 	str	w0, [x21, 2816]
@@ -9376,20 +9449,20 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x23
 	bl	FlashProgPages
-.L1363:
+.L1368:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1358
+	beq	.L1363
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x21, 36]
 	cmp	w1, w0
-	bcc	.L1359
+	bcc	.L1364
 	adrp	x0, .LC1
-	mov	w2, 936
+	mov	w2, 941
 	add	x1, x25, 608
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1359:
+.L1364:
 	add	x1, x29, 96
 	ldr	w0, [x23, 4]
 	mov	w2, 1
@@ -9403,35 +9476,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w23, w1
 	cmn	w4, #1
-	beq	.L1360
+	beq	.L1365
 	ldr	x2, [x21, 2376]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1361
+	cbnz	w0, .L1366
 	adrp	x0, .LC111
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC111
 	bl	sftl_printk
-.L1361:
+.L1366:
 	mov	w0, w23
 	bl	decrement_vpc_count
-.L1360:
+.L1365:
 	add	x20, x20, 32
-	b	.L1355
-.L1362:
+	b	.L1360
+.L1367:
 	add	x22, x22, :lo12:.LANCHOR0
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x22, 36]
 	cmp	w1, w0
-	bcc	.L1354
+	bcc	.L1359
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
-	mov	w2, 951
+	mov	w2, 956
 	add	x1, x1, 608
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1354:
+.L1359:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9455,8 +9528,8 @@ FtlGcFreeTempBlock:
 	ldrh	w20, [x2, 2520]
 	ldrh	w1, [x2, 106]
 	cmp	w20, w3
-	bne	.L1370
-.L1380:
+	bne	.L1375
+.L1385:
 	adrp	x0, .LANCHOR3-40
 	mov	w2, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR3-40]
@@ -9464,47 +9537,47 @@ FtlGcFreeTempBlock:
 	add	x1, x0, 2520
 	ldrh	w3, [x0, 2520]
 	cmp	w3, w2
-	bne	.L1393
-.L1396:
+	bne	.L1398
+.L1401:
 	mov	w0, 0
-.L1369:
+.L1374:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1370:
-	cbz	w0, .L1373
+.L1375:
+	cbz	w0, .L1378
 	adrp	x0, .LANCHOR2
 	add	x0, x0, :lo12:.LANCHOR2
 	ldrh	w4, [x0, 4]
 	cmp	w4, w3
-	beq	.L1374
-.L1375:
+	beq	.L1379
+.L1380:
 	mov	w1, 2
-.L1373:
+.L1378:
 	add	x21, x19, :lo12:.LANCHOR0
 	add	x0, x21, 2520
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1376
+	beq	.L1381
 	ldr	x1, [x21, 2384]
 	ubfiz	x20, x20, 1, 16
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1377
+	bls	.L1382
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1377:
+.L1382:
 	adrp	x0, .LANCHOR3
 	add	x1, x0, :lo12:.LANCHOR3
 	mov	x20, x0
 	ldr	w1, [x1, -40]
-	cbnz	w1, .L1378
+	cbnz	w1, .L1383
 	add	x19, x19, :lo12:.LANCHOR0
 	ldr	w0, [x19, 2816]
 	add	w0, w0, 1
@@ -9513,32 +9586,32 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1378:
+.L1383:
 	add	x0, x20, :lo12:.LANCHOR3
 	str	wzr, [x0, -40]
-.L1389:
+.L1394:
 	mov	w0, 1
-	b	.L1369
-.L1374:
+	b	.L1374
+.L1379:
 	strh	wzr, [x0, 4]
 	ldrh	w0, [x2, 2416]
 	cmp	w0, 17
-	bhi	.L1375
-	b	.L1373
-.L1376:
+	bhi	.L1380
+	b	.L1378
+.L1381:
 	adrp	x0, .LANCHOR2+4
 	ldrh	w1, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1389
-	b	.L1380
-.L1393:
+	bne	.L1394
+	b	.L1385
+.L1398:
 	ldrh	w2, [x0, 3304]
 	ldrb	w1, [x1, 7]
 	ldrh	w0, [x0, 106]
 	mul	w0, w1, w0
 	cmp	w2, w0
-	beq	.L1381
+	beq	.L1386
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -9546,7 +9619,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, 624
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1381:
+.L1386:
 	add	x0, x19, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR1
 	add	x22, x22, :lo12:.LANCHOR1
@@ -9564,20 +9637,20 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x0, 3304]
 	add	w1, w1, w2
 	str	w1, [x0, 2608]
-.L1382:
+.L1387:
 	add	x21, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x21, 3304]
 	cmp	w0, w20
-	bhi	.L1386
+	bhi	.L1391
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x21, 2520]
 	ldr	x2, [x21, 2376]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1387
+	cbz	w1, .L1392
 	bl	INSERT_DATA_LIST
-.L1388:
+.L1393:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w20, -1
 	strh	wzr, [x19, 3304]
@@ -9589,12 +9662,12 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x19, 2416]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1396
+	ble	.L1401
 	mov	w0, 20
 	strh	w20, [x19, 2672]
 	strh	w0, [x19, 3232]
-	b	.L1396
-.L1386:
+	b	.L1401
+.L1391:
 	mov	w24, 12
 	ldr	x26, [x21, 3312]
 	ldr	w0, [x21, 2584]
@@ -9602,12 +9675,12 @@ FtlGcFreeTempBlock:
 	add	x23, x26, x24
 	ldr	w1, [x23, 8]
 	cmp	w1, w0
-	bcc	.L1383
+	bcc	.L1388
 	mov	w2, 168
 	mov	x1, x22
 	mov	x0, x25
 	bl	sftl_printk
-.L1383:
+.L1388:
 	ldr	w0, [x23, 8]
 	add	x1, x29, 92
 	mov	w2, 0
@@ -9615,7 +9688,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x26, x24]
 	ldr	w1, [x29, 92]
 	cmp	w0, w1
-	bne	.L1384
+	bne	.L1389
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w21, w0
@@ -9624,22 +9697,22 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w21
-.L1395:
+.L1400:
 	bl	decrement_vpc_count
-.L1385:
+.L1390:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1382
-.L1384:
+	b	.L1387
+.L1389:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	beq	.L1385
+	beq	.L1390
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 2520]
-	b	.L1395
-.L1387:
+	b	.L1400
+.L1392:
 	bl	INSERT_FREE_LIST
-	b	.L1388
+	b	.L1393
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.align	2
 	.global	FtlGcPageRecovery
@@ -9657,7 +9730,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2522]
 	ldrh	w0, [x19, 106]
 	cmp	w1, w0
-	bcc	.L1397
+	bcc	.L1402
 	adrp	x19, .LANCHOR3
 	add	x19, x19, :lo12:.LANCHOR3
 	sub	x0, x19, #184
@@ -9665,7 +9738,7 @@ FtlGcPageRecovery:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	str	wzr, [x19, -40]
-.L1397:
+.L1402:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9714,25 +9787,25 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x19, 4032]
 	bl	FlashProgPages
 	mov	w10, 0
-.L1403:
+.L1408:
 	ldr	w1, [x19, 3248]
 	cmp	w10, w1
-	bcc	.L1406
+	bcc	.L1411
 	ldr	x0, [x19, 4032]
 	bl	FtlGcBufFree
 	str	wzr, [x19, 3248]
 	ldrh	w0, [x19, 2524]
-	cbnz	w0, .L1407
+	cbnz	w0, .L1412
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1409
-.L1406:
+	b	.L1414
+.L1411:
 	ldr	x0, [x19, 4032]
 	ubfiz	x1, x10, 5, 16
 	add	x3, x0, x1
 	ldr	w0, [x0, x1]
 	cmn	w0, #1
-	bne	.L1404
+	bne	.L1409
 	ldrh	w3, [x19, 2520]
 	ldr	x2, [x19, 2376]
 	strh	wzr, [x2, x3, lsl 1]
@@ -9747,23 +9820,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1409:
+.L1414:
 	mov	w0, 1
-.L1402:
+.L1407:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1404:
+.L1409:
 	ldr	x0, [x3, 16]
 	ldr	w1, [x3, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L1403
-.L1407:
+	b	.L1408
+.L1412:
 	mov	w0, 0
-	b	.L1402
+	b	.L1407
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.align	2
 	.global	Ftl_get_new_temp_ppa
@@ -9778,10 +9851,10 @@ Ftl_get_new_temp_ppa:
 	ldrh	w2, [x0, 2520]
 	mov	w0, 65535
 	cmp	w2, w0
-	beq	.L1411
+	beq	.L1416
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1412
-.L1411:
+	cbnz	w0, .L1417
+.L1416:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -9794,7 +9867,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1412:
+.L1417:
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x0, x0, 2520
 	bl	get_new_active_ppa
@@ -9816,23 +9889,23 @@ rk_ftl_garbage_collect:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w2, [x1, 4008]
-	cbnz	w2, .L1485
+	cbnz	w2, .L1490
 	ldrh	w2, [x1, 2400]
 	cmp	w2, 47
-	bls	.L1485
+	bls	.L1490
 	mov	w23, w0
 	adrp	x0, .LANCHOR2+4
 	ldrh	w2, [x0, #:lo12:.LANCHOR2+4]
 	mov	w0, 65535
 	cmp	w2, w0
-	bne	.L1416
-.L1419:
+	bne	.L1421
+.L1424:
 	add	x1, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	ldrh	w4, [x1, 3322]
 	cmp	w4, w2
-	bne	.L1417
-.L1418:
+	bne	.L1422
+.L1423:
 	add	x21, x19, :lo12:.LANCHOR0
 	mov	w20, 65535
 	ldr	w1, [x21, 3236]
@@ -9841,93 +9914,93 @@ rk_ftl_garbage_collect:
 	add	w1, w1, w23, lsl 7
 	str	w1, [x21, 3236]
 	cmp	w0, w20
-	bne	.L1420
+	bne	.L1425
 	ldrh	w20, [x21, 2520]
 	cmp	w20, w0
-	bne	.L1488
+	bne	.L1493
 	ldrh	w22, [x21, 3320]
 	cmp	w22, w20
-	bne	.L1420
+	bne	.L1425
 	ldrh	w0, [x21, 2416]
 	mov	w2, 1024
 	cmp	w0, 24
 	mov	w0, 5120
 	csel	w0, w0, w2, cc
 	cmp	w1, w0
-	bls	.L1491
+	bls	.L1496
 	adrp	x0, .LANCHOR3+112
 	str	wzr, [x21, 3236]
 	strh	wzr, [x0, #:lo12:.LANCHOR3+112]
 	bl	GetSwlReplaceBlock
 	and	w20, w0, 65535
 	cmp	w20, w22
-	bne	.L1492
+	bne	.L1497
 	ldrh	w1, [x21, 2416]
 	ldrh	w0, [x21, 3234]
 	cmp	w1, w0
-	bcs	.L1423
+	bcs	.L1428
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
 	cmp	w0, w20
-	beq	.L1425
+	beq	.L1430
 	ldr	x1, [x21, 2376]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1426
+	bhi	.L1431
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	and	w22, w0, 65535
 	mov	w0, 128
 	strh	w0, [x21, 3234]
 	cmp	w22, w20
-	bne	.L1422
-.L1425:
+	bne	.L1427
+.L1430:
 	bl	FtlGcReFreshBadBlk
-.L1420:
+.L1425:
 	cmp	w23, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1428
+	bne	.L1433
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 24
-	bhi	.L1493
+	bhi	.L1498
 	cmp	w0, 16
 	ldrh	w21, [x1, 106]
-	bls	.L1430
+	bls	.L1435
 	lsr	w21, w21, 5
-.L1429:
+.L1434:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w2, [x1, 3232]
 	cmp	w2, w0
-	bcs	.L1433
+	bcs	.L1438
 	ldrh	w0, [x1, 2520]
 	mov	w2, 65535
 	cmp	w0, w2
-	bne	.L1434
+	bne	.L1439
 	ldrh	w2, [x1, 3320]
 	cmp	w2, w0
-	bne	.L1434
+	bne	.L1439
 	adrp	x0, .LANCHOR3+112
 	ldrh	w0, [x0, #:lo12:.LANCHOR3+112]
-	cbnz	w0, .L1435
+	cbnz	w0, .L1440
 	ldr	w2, [x1, 2584]
 	ldr	w3, [x1, 2580]
 	add	w2, w2, w2, lsl 1
 	cmp	w3, w2, lsr 2
-	bcs	.L1436
-.L1435:
+	bcs	.L1441
+.L1440:
 	add	x2, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x2, 2652]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x2, 3232]
-.L1437:
+.L1442:
 	add	x19, x19, :lo12:.LANCHOR0
 	str	wzr, [x19, 3244]
-.L1414:
+.L1419:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9935,42 +10008,42 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1416:
+.L1421:
 	ldrh	w1, [x1, 2520]
 	cmp	w1, w0
-	beq	.L1419
+	beq	.L1424
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1419
+	cbz	w0, .L1424
 	mov	w0, 1
-	b	.L1414
-.L1417:
+	b	.L1419
+.L1422:
 	ldrh	w0, [x1, 3320]
 	cmp	w0, w2
-	bne	.L1418
+	bne	.L1423
 	ldrh	w3, [x1, 3324]
 	cmp	w3, w0
-	beq	.L1418
+	beq	.L1423
 	ldrh	w2, [x1, 3326]
 	cmp	w2, w0
-	beq	.L1418
+	beq	.L1423
 	mov	w0, -1
 	strh	w4, [x1, 3320]
 	strh	w3, [x1, 3322]
 	strh	w2, [x1, 3324]
 	strh	w0, [x1, 3326]
-	b	.L1418
-.L1426:
+	b	.L1423
+.L1431:
 	mov	w0, 64
-.L1517:
+.L1522:
 	strh	w0, [x21, 3234]
-	b	.L1425
-.L1423:
+	b	.L1430
+.L1428:
 	mov	w0, 80
-	b	.L1517
-.L1492:
+	b	.L1522
+.L1497:
 	mov	w22, w20
-.L1422:
+.L1427:
 	add	x0, x19, :lo12:.LANCHOR0
 	ubfiz	x1, x22, 1, 32
 	mov	w20, w22
@@ -9984,72 +10057,72 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC112
 	add	x0, x0, :lo12:.LC112
 	bl	sftl_printk
-	b	.L1425
-.L1488:
+	b	.L1430
+.L1493:
 	mov	w20, w0
-	b	.L1420
-.L1491:
+	b	.L1425
+.L1496:
 	mov	w20, w22
-	b	.L1420
-.L1430:
+	b	.L1425
+.L1435:
 	cmp	w0, 12
-	bls	.L1431
+	bls	.L1436
 	lsr	w21, w21, 4
-	b	.L1429
-.L1431:
+	b	.L1434
+.L1436:
 	mov	w1, w21
 	cmp	w0, 9
 	lsr	w21, w21, 2
 	csel	w21, w21, w1, cs
-	b	.L1429
-.L1493:
+	b	.L1434
+.L1498:
 	mov	w21, 1
-	b	.L1429
-.L1436:
+	b	.L1434
+.L1441:
 	mov	w2, 18
 	strh	w2, [x1, 3232]
-	b	.L1437
-.L1434:
+	b	.L1442
+.L1439:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x1, 3232]
-.L1433:
+.L1438:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 3328]
-	cbz	w0, .L1494
+	cbz	w0, .L1499
 	add	w21, w21, 32
 	and	w21, w21, 65535
-.L1494:
+.L1499:
 	mov	w20, 65535
-.L1439:
+.L1444:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w2, 65535
 	ldrh	w1, [x0, 2672]
 	cmp	w1, w2
-	bne	.L1448
+	bne	.L1453
 	cmp	w20, w1
-	beq	.L1449
+	beq	.L1454
 	strh	w20, [x0, 2672]
-.L1450:
+.L1455:
 	add	x5, x19, :lo12:.LANCHOR0
 	mov	w1, 65535
 	ldrh	w0, [x5, 2672]
 	strb	wzr, [x5, 2680]
 	cmp	w0, w1
-	beq	.L1448
+	beq	.L1453
 	bl	IsBlkInGcList
-	cbz	w0, .L1453
+	cbz	w0, .L1458
 	mov	w0, -1
 	strh	w0, [x5, 2672]
-.L1453:
+.L1458:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	add	x23, x22, 2672
 	ldrh	w1, [x22, 2672]
 	cmp	w1, w0
-	beq	.L1448
+	beq	.L1453
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR3
@@ -10061,87 +10134,87 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x0, 114]
 	ldrh	w1, [x1, x2, lsl 1]
 	strh	w1, [x0, 116]
-.L1448:
+.L1453:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w2, [x0, 2424]
 	cmp	w2, w1
-	beq	.L1454
+	beq	.L1459
 	ldrh	w0, [x0, 2472]
 	cmp	w0, w1
-	beq	.L1454
+	beq	.L1459
 	adrp	x24, .LANCHOR1
 	add	x24, x24, :lo12:.LANCHOR1
 	add	x24, x24, 648
-.L1455:
+.L1460:
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w0, 65535
 	ldrh	w23, [x22, 2672]
 	cmp	w23, w0
-	bne	.L1456
+	bne	.L1461
 	mov	w25, 2
 	str	wzr, [x22, 3244]
-.L1457:
+.L1462:
 	ldrh	w5, [x22, 3240]
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x22, 2672]
 	cmp	w6, w23
-	bne	.L1458
+	bne	.L1463
 	strh	wzr, [x22, 3240]
 	mov	w0, 8
-	b	.L1414
-.L1428:
+	b	.L1419
+.L1433:
 	add	x5, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x5, 2520]
 	cmp	w1, w0
-	bne	.L1497
+	bne	.L1502
 	ldrh	w0, [x5, 3320]
 	cmp	w0, w1
-	bne	.L1497
+	bne	.L1502
 	cmp	w20, w0
-	bne	.L1497
+	bne	.L1502
 	ldrh	w0, [x5, 2672]
 	cmp	w0, w20
-	beq	.L1440
-.L1497:
+	beq	.L1445
+.L1502:
 	mov	w21, 1
-	b	.L1439
-.L1440:
+	b	.L1444
+.L1445:
 	ldrh	w7, [x5, 2416]
 	adrp	x21, .LANCHOR3
 	ldrh	w0, [x5, 3232]
 	str	wzr, [x5, 3244]
 	cmp	w0, w7
-	bcs	.L1441
+	bcs	.L1446
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, 112]
-	cbnz	w0, .L1442
+	cbnz	w0, .L1447
 	ldr	w0, [x5, 2584]
 	ldr	w1, [x5, 2580]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1443
-.L1442:
+	bcs	.L1448
+.L1447:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2652]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x19, 3232]
-.L1444:
+.L1449:
 	bl	FtlReadRefresh
-.L1518:
+.L1523:
 	add	x21, x21, :lo12:.LANCHOR3
-	b	.L1519
-.L1443:
+	b	.L1524
+.L1448:
 	mov	w0, 18
 	strh	w0, [x5, 3232]
-	b	.L1444
-.L1441:
+	b	.L1449
+.L1446:
 	add	x21, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x21, 112]
-	cbnz	w0, .L1497
+	cbnz	w0, .L1502
 	ldrh	w6, [x5, 2652]
 	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
@@ -10157,55 +10230,55 @@ rk_ftl_garbage_collect:
 	mov	w2, 2
 	sdiv	w0, w0, w2
 	cmp	w1, w0
-	ble	.L1446
+	ble	.L1451
 	sub	w6, w6, #1
 	cmp	w7, w6
-	blt	.L1446
+	blt	.L1451
 	bl	FtlReadRefresh
-.L1519:
+.L1524:
 	ldrh	w0, [x21, 112]
-	b	.L1414
-.L1446:
-	cbnz	w1, .L1497
+	b	.L1419
+.L1451:
+	cbnz	w1, .L1502
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 2416]
 	add	w0, w0, 1
-	b	.L1414
-.L1449:
+	b	.L1419
+.L1454:
 	ldrh	w1, [x0, 3320]
 	cmp	w1, w20
-	beq	.L1450
+	beq	.L1455
 	ldr	x2, [x0, 2376]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1451
+	cbnz	w1, .L1456
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-.L1451:
+.L1456:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3320]
 	strh	w1, [x0, 2672]
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-	b	.L1450
-.L1454:
+	b	.L1455
+.L1459:
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	w0, [x19, 2672]
-.L1520:
+.L1525:
 	adrp	x0, .LANCHOR3+112
 	ldrh	w0, [x0, #:lo12:.LANCHOR3+112]
-	b	.L1414
-.L1458:
+	b	.L1419
+.L1463:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1459
+	cbz	w0, .L1464
 	strh	w5, [x22, 3240]
-	b	.L1457
-.L1459:
+	b	.L1462
+.L1464:
 	ldrh	w4, [x22, 36]
 	ubfiz	x1, x6, 1, 16
 	ldrh	w0, [x22, 106]
@@ -10216,69 +10289,69 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	sdiv	w4, w0, w25
 	cmp	w3, w4
-	bgt	.L1461
+	bgt	.L1466
 	cmp	w5, 48
-	bls	.L1462
+	bls	.L1467
 	cmp	w3, 8
-	bls	.L1462
+	bls	.L1467
 	ldrh	w3, [x22, 3292]
 	cmp	w3, 35
-	bhi	.L1462
-.L1461:
+	bhi	.L1467
+.L1466:
 	strh	wzr, [x22, 3240]
-.L1462:
+.L1467:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1463
+	bgt	.L1468
 	cmp	w20, w23
-	bne	.L1463
+	bne	.L1468
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, -1
 	strh	wzr, [x19, 3240]
 	strh	w0, [x19, 2672]
-	b	.L1520
-.L1463:
-	cbnz	w1, .L1464
+	b	.L1525
+.L1468:
+	cbnz	w1, .L1469
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x22, 3240]
 	add	w0, w0, 1
 	strh	w0, [x22, 3240]
-	b	.L1457
-.L1464:
+	b	.L1462
+.L1469:
 	add	x0, x19, :lo12:.LANCHOR0
 	strb	wzr, [x0, 2680]
 	ldrh	w0, [x0, 2424]
 	cmp	w0, w6
-	bne	.L1465
+	bne	.L1470
 	adrp	x0, .LC1
 	mov	w2, 665
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1465:
+.L1470:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2472]
 	cmp	w1, w0
-	bne	.L1466
+	bne	.L1471
 	adrp	x0, .LC1
 	mov	w2, 666
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1466:
+.L1471:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 2672]
 	ldrh	w0, [x0, 2520]
 	cmp	w1, w0
-	bne	.L1467
+	bne	.L1472
 	adrp	x0, .LC1
 	mov	w2, 667
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1467:
+.L1472:
 	add	x23, x19, :lo12:.LANCHOR0
 	add	x22, x23, 2672
 	mov	x0, x22
@@ -10292,7 +10365,7 @@ rk_ftl_garbage_collect:
 	strh	w1, [x0, 116]
 	strh	wzr, [x23, 2674]
 	strb	wzr, [x23, 2678]
-.L1456:
+.L1461:
 	bl	FtlReadRefresh
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, 1
@@ -10301,14 +10374,14 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, 2674]
 	add	w1, w0, w21
 	cmp	w1, w26
-	ble	.L1468
+	ble	.L1473
 	sub	w21, w26, w0
 	and	w21, w21, 65535
-.L1468:
+.L1473:
 	mov	w25, 0
-.L1469:
+.L1474:
 	cmp	w21, w25, uxth
-	bls	.L1477
+	bls	.L1482
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w23, 0
 	add	x3, x0, 2688
@@ -10317,11 +10390,11 @@ rk_ftl_garbage_collect:
 	ldrh	w4, [x0, 2674]
 	ldrh	w7, [x0, 36]
 	add	w4, w4, w25
-	b	.L1478
-.L1471:
+	b	.L1483
+.L1476:
 	ldrh	w2, [x3]
 	cmp	w2, w6
-	beq	.L1470
+	beq	.L1475
 	ldr	x5, [x0, 3280]
 	ubfiz	x8, x23, 5, 16
 	add	w23, w23, 1
@@ -10329,13 +10402,13 @@ rk_ftl_garbage_collect:
 	add	x5, x5, x8
 	and	w23, w23, 65535
 	str	w2, [x5, 4]
-.L1470:
+.L1475:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-.L1478:
+.L1483:
 	cmp	w1, w7
-	bne	.L1471
+	bne	.L1476
 	add	x22, x19, :lo12:.LANCHOR0
 	mov	w1, w23
 	mov	x27, 0
@@ -10344,32 +10417,32 @@ rk_ftl_garbage_collect:
 	bl	FlashReadPages
 	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 104]
-.L1472:
+.L1477:
 	ldr	x0, [x29, 104]
 	cmp	x27, x0
-	bne	.L1476
+	bne	.L1481
 	add	w25, w25, 1
-	b	.L1469
-.L1476:
+	b	.L1474
+.L1481:
 	ldr	x0, [x22, 3280]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	beq	.L1473
+	beq	.L1478
 	ldr	x23, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1473
+	bne	.L1478
 	ldr	w28, [x23, 8]
 	cmn	w28, #1
-	bne	.L1474
+	bne	.L1479
 	adrp	x0, .LC1
 	mov	w2, 703
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1474:
+.L1479:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w28
@@ -10379,7 +10452,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x27
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1473
+	bne	.L1478
 	adrp	x28, .LANCHOR3
 	add	x2, x28, :lo12:.LANCHOR3
 	ldr	w0, [x0, 24]
@@ -10419,45 +10492,45 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x22, 2527]
 	ldr	w0, [x22, 3248]
 	cmp	w1, w0
-	beq	.L1475
+	beq	.L1480
 	ldrh	w0, [x22, 2524]
-	cbnz	w0, .L1473
-.L1475:
+	cbnz	w0, .L1478
+.L1480:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1473
+	cbz	w0, .L1478
 	add	x19, x19, :lo12:.LANCHOR0
 	add	x28, x28, :lo12:.LANCHOR3
 	str	wzr, [x19, 4008]
 	ldrh	w0, [x28, 112]
-	b	.L1414
-.L1473:
+	b	.L1419
+.L1478:
 	add	x27, x27, 32
-	b	.L1472
-.L1477:
+	b	.L1477
+.L1482:
 	add	x22, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x22, 2674]
 	add	w21, w21, w0
 	and	w21, w21, 65535
 	strh	w21, [x22, 2674]
 	cmp	w26, w21
-	bhi	.L1479
+	bhi	.L1484
 	ldr	w0, [x22, 3248]
 	adrp	x21, .LANCHOR3
-	cbz	w0, .L1480
+	cbz	w0, .L1485
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1480
+	cbz	w0, .L1485
 	str	wzr, [x22, 4008]
-	b	.L1518
-.L1480:
+	b	.L1523
+.L1485:
 	add	x21, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x21, 114]
-	cbnz	w0, .L1481
+	cbnz	w0, .L1486
 	add	x22, x19, :lo12:.LANCHOR0
 	ldrh	w1, [x22, 2672]
 	ldr	x3, [x22, 2376]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L1481
+	cbz	w4, .L1486
 	ldrh	w5, [x21, 116]
 	mov	w3, 0
 	ldrh	w2, [x22, 2674]
@@ -10471,27 +10544,27 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1481:
+.L1486:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	strh	w1, [x0, 2672]
-.L1479:
+.L1484:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 2416]
 	cmp	w0, 2
-	bhi	.L1482
+	bhi	.L1487
 	ldrh	w21, [x1, 106]
-	b	.L1455
-.L1482:
+	b	.L1460
+.L1487:
 	str	wzr, [x1, 4008]
 	adrp	x1, .LANCHOR3+112
 	ldrh	w1, [x1, #:lo12:.LANCHOR3+112]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1414
-.L1485:
+	b	.L1419
+.L1490:
 	mov	w0, 0
-	b	.L1414
+	b	.L1419
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.align	2
 	.global	sftl_gc
@@ -10522,13 +10595,13 @@ FtlRead:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L1524
+	bne	.L1529
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1523:
+.L1528:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -10538,7 +10611,7 @@ FtlRead:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 192
 	ret
-.L1524:
+.L1529:
 	add	w0, w1, w2
 	str	w0, [x29, 144]
 	adrp	x0, .LANCHOR0
@@ -10547,11 +10620,11 @@ FtlRead:
 	str	x0, [x29, 112]
 	ldr	w1, [x8, 144]
 	cmp	w2, w1
-	bhi	.L1545
+	bhi	.L1550
 	adrp	x0, .LANCHOR2
 	ldr	w21, [x0, #:lo12:.LANCHOR2]
 	cmn	w21, #1
-	beq	.L1523
+	beq	.L1528
 	ldrh	w0, [x8, 62]
 	sub	w24, w2, #1
 	mov	x25, x8
@@ -10570,42 +10643,42 @@ FtlRead:
 	adrp	x0, .LC96
 	add	x0, x0, :lo12:.LC96
 	str	x0, [x29, 104]
-.L1526:
-	cbnz	w22, .L1543
+.L1531:
+	cbnz	w22, .L1548
 	ldr	x0, [x29, 112]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 3328]
-	cbnz	w1, .L1544
+	cbnz	w1, .L1549
 	ldrh	w0, [x0, 2416]
 	cmp	w0, 31
-	bhi	.L1523
-.L1544:
+	bhi	.L1528
+.L1549:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1523
-.L1543:
+	b	.L1528
+.L1548:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1527
+	bne	.L1532
 	mov	w4, 0
-.L1528:
+.L1533:
 	ldrh	w0, [x25, 62]
 	cmp	w4, w0
-	bcc	.L1530
-.L1531:
+	bcc	.L1535
+.L1536:
 	add	w20, w20, 1
 	subs	w22, w22, #1
-	beq	.L1535
+	beq	.L1540
 	ldrh	w0, [x25, 36]
 	cmp	w28, w0, lsl 2
-	bne	.L1526
-.L1535:
-	cbz	w28, .L1526
+	bne	.L1531
+.L1540:
+	cbz	w28, .L1531
 	ldr	x0, [x25, 4024]
 	mov	w1, w28
 	mov	w2, 0
@@ -10622,30 +10695,30 @@ FtlRead:
 	ubfiz	x0, x28, 5, 32
 	mov	x28, 0
 	str	x0, [x29, 120]
-.L1542:
+.L1547:
 	ldr	x0, [x25, 4024]
 	add	x0, x0, x28
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1537
+	bne	.L1542
 	ldr	x1, [x0, 8]
 	ldr	x0, [x25, 4000]
 	cmp	x1, x0
-	bne	.L1538
+	bne	.L1543
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 132]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1555:
+.L1560:
 	bl	ftl_memcpy
-.L1538:
+.L1543:
 	ldr	x0, [x25, 4024]
 	add	x0, x0, x28
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1539
+	beq	.L1544
 	ldr	w1, [x25, 2792]
 	add	w1, w1, 1
 	str	w1, [x25, 2792]
@@ -10659,38 +10732,38 @@ FtlRead:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 104]
 	bl	sftl_printk
-.L1539:
+.L1544:
 	ldr	x0, [x25, 4024]
 	add	x1, x0, x28
 	ldr	w2, [x0, x28]
 	cmn	w2, #1
-	bne	.L1540
+	bne	.L1545
 	ldr	w0, [x25, 2792]
 	mov	w21, w2
 	add	w0, w0, 1
 	str	w0, [x25, 2792]
-.L1540:
+.L1545:
 	ldr	w0, [x1]
 	cmp	w0, 256
-	bne	.L1541
+	bne	.L1546
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1541:
+.L1546:
 	ldr	x0, [x29, 120]
 	add	x28, x28, 32
 	cmp	x0, x28
-	bne	.L1542
+	bne	.L1547
 	mov	w28, 0
-	b	.L1526
-.L1530:
+	b	.L1531
+.L1535:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1529
+	bhi	.L1534
 	ldr	w1, [x29, 144]
 	cmp	w1, w0
-	bls	.L1529
+	bls	.L1534
 	sub	w0, w0, w19
 	str	w4, [x29, 136]
 	lsl	w0, w0, 9
@@ -10699,17 +10772,17 @@ FtlRead:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	w4, [x29, 136]
-.L1529:
+.L1534:
 	add	w4, w4, 1
-	b	.L1528
-.L1527:
+	b	.L1533
+.L1532:
 	ldr	x0, [x25, 4024]
 	ubfiz	x2, x28, 5, 32
 	cmp	w20, w26
 	add	x0, x0, x2
 	str	w1, [x0, 4]
 	ldrh	w0, [x25, 62]
-	bne	.L1532
+	bne	.L1537
 	ldr	x1, [x25, 4024]
 	ldr	x4, [x25, 4000]
 	add	x1, x1, x2
@@ -10722,9 +10795,9 @@ FtlRead:
 	csel	w3, w27, w4, ls
 	str	w3, [x29, 152]
 	cmp	w3, w0
-	bne	.L1533
+	bne	.L1538
 	str	x23, [x1, 8]
-.L1533:
+.L1538:
 	ldr	x0, [x25, 4024]
 	ldr	x1, [x25, 3992]
 	add	x2, x0, x2
@@ -10735,10 +10808,10 @@ FtlRead:
 	and	x0, x0, 4294967292
 	add	x0, x1, x0
 	str	x0, [x2, 16]
-	b	.L1531
-.L1532:
+	b	.L1536
+.L1537:
 	cmp	w20, w24
-	bne	.L1534
+	bne	.L1539
 	ldr	x4, [x25, 4024]
 	ldr	x1, [x25, 3984]
 	add	x4, x4, x2
@@ -10748,13 +10821,13 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 148]
 	cmp	w0, w3
-	bne	.L1533
+	bne	.L1538
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x4, 8]
-	b	.L1533
-.L1534:
+	b	.L1538
+.L1539:
 	ldr	x1, [x25, 4024]
 	mul	w0, w0, w20
 	add	x1, x1, x2
@@ -10762,24 +10835,24 @@ FtlRead:
 	lsl	w0, w0, 9
 	add	x0, x23, x0
 	str	x0, [x1, 8]
-	b	.L1533
-.L1537:
+	b	.L1538
+.L1542:
 	cmp	w24, w1
-	bne	.L1538
+	bne	.L1543
 	ldr	x1, [x0, 8]
 	ldr	x0, [x25, 3984]
 	cmp	x1, x0
-	bne	.L1538
+	bne	.L1543
 	ldrh	w0, [x25, 62]
 	ldr	w2, [x29, 128]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1555
-.L1545:
+	b	.L1560
+.L1550:
 	mov	w21, -1
-	b	.L1523
+	b	.L1528
 	.size	FtlRead, .-FtlRead
 	.align	2
 	.global	sftl_read
@@ -10811,12 +10884,12 @@ FtlWrite:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	str	w2, [x29, 156]
-	bne	.L1559
+	bne	.L1564
 	add	w0, w1, 256
 	ldr	w1, [x29, 156]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1558:
+.L1563:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10824,7 +10897,7 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1559:
+.L1564:
 	ldr	w0, [x29, 156]
 	adrp	x19, .LANCHOR0
 	add	x1, x19, :lo12:.LANCHOR0
@@ -10833,13 +10906,13 @@ FtlWrite:
 	ldr	w0, [x1, 144]
 	ldr	w2, [x29, 148]
 	cmp	w2, w0
-	bhi	.L1594
+	bhi	.L1599
 	adrp	x2, .LANCHOR2
 	str	x2, [x29, 136]
 	add	x3, x2, :lo12:.LANCHOR2
 	ldr	w0, [x2, #:lo12:.LANCHOR2]
 	cmn	w0, #1
-	beq	.L1558
+	beq	.L1563
 	adrp	x0, .LANCHOR3+120
 	mov	w2, 2048
 	add	x20, x1, 2424
@@ -10857,54 +10930,54 @@ FtlWrite:
 	add	w0, w0, w25
 	str	w0, [x1, 2596]
 	ldr	w0, [x3, 8]
-	cbz	w0, .L1561
+	cbz	w0, .L1566
 	ldrh	w0, [x20, 4]
 	add	x1, x1, 2472
 	cmp	w0, 0
 	csel	x20, x1, x20, eq
-.L1561:
+.L1566:
 	adrp	x22, .LANCHOR1
 	add	x22, x22, :lo12:.LANCHOR1
 	mov	w21, w26
 	add	x22, x22, 672
-.L1562:
-	cbnz	w25, .L1590
+.L1567:
+	cbnz	w25, .L1595
 	ldr	w1, [x29, 132]
 	add	x19, x19, :lo12:.LANCHOR0
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x19, 2416]
 	cmp	w0, 15
-	bls	.L1591
-.L1593:
+	bls	.L1596
+.L1598:
 	mov	w0, 0
-	b	.L1558
-.L1590:
+	b	.L1563
+.L1595:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1563
+	bcc	.L1568
 	adrp	x0, .LC1
-	mov	w2, 991
+	mov	w2, 996
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1563:
+.L1568:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1564
+	cbnz	w0, .L1569
 	add	x0, x19, :lo12:.LANCHOR0
 	add	x1, x0, 2424
 	cmp	x20, x1
-	bne	.L1565
+	bne	.L1570
 	add	x0, x0, 2472
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1566
+	cbnz	w1, .L1571
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
-.L1566:
+.L1571:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x23, x20, 2424
 	add	x20, x20, 2472
@@ -10915,12 +10988,12 @@ FtlWrite:
 	ldr	w0, [x0, 8]
 	cmp	w0, 0
 	csel	x20, x20, x23, ne
-.L1567:
+.L1572:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1564
+	cbnz	w0, .L1569
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1564:
+.L1569:
 	ldrh	w0, [x20, 4]
 	ldrb	w1, [x20, 7]
 	cmp	w0, w25
@@ -10933,21 +11006,21 @@ FtlWrite:
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1568
+	bcc	.L1573
 	adrp	x0, .LC1
-	mov	w2, 1024
+	mov	w2, 1029
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1568:
+.L1573:
 	str	xzr, [x29, 168]
-.L1569:
+.L1574:
 	ldr	w1, [x29, 128]
 	ldr	w23, [x29, 168]
 	cmp	w23, w1
-	bcc	.L1588
+	bcc	.L1593
 	mov	x23, x1
-.L1570:
+.L1575:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	x3, x20
 	mov	w2, 0
@@ -10955,30 +11028,30 @@ FtlWrite:
 	ldr	x0, [x0, 4040]
 	bl	FtlProgPages
 	cmp	w25, w23
-	bcs	.L1589
+	bcs	.L1594
 	adrp	x0, .LC1
-	mov	w2, 1101
+	mov	w2, 1106
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1589:
+.L1594:
 	sub	w25, w25, w23
-	b	.L1562
-.L1565:
+	b	.L1567
+.L1570:
 	ldr	x0, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR2
 	str	wzr, [x0, 8]
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1599
+	cbnz	w0, .L1604
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-	b	.L1567
-.L1599:
+	b	.L1572
+.L1604:
 	mov	x20, x1
-	b	.L1564
-.L1588:
+	b	.L1569
+.L1593:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1570
+	cbz	w0, .L1575
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w21
@@ -11011,9 +11084,9 @@ FtlWrite:
 	cmp	w21, w26
 	ldr	x4, [x29, 160]
 	ccmp	w21, w0, 4, ne
-	bne	.L1571
+	bne	.L1576
 	cmp	w21, w26
-	bne	.L1572
+	bne	.L1577
 	ldrh	w2, [x4, 62]
 	udiv	w0, w24, w2
 	msub	w0, w0, w2, w24
@@ -11023,29 +11096,29 @@ FtlWrite:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 160]
-.L1573:
+.L1578:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldr	w2, [x29, 160]
 	ldrh	w1, [x0, 62]
 	cmp	w2, w1
-	bne	.L1574
+	bne	.L1579
 	ldr	x0, [x0, 4040]
 	cmp	w21, w26
 	add	x3, x0, x28
-	bne	.L1575
+	bne	.L1580
 	str	x27, [x3, 8]
-.L1576:
+.L1581:
 	add	x0, x19, :lo12:.LANCHOR0
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, 36]
 	cmp	w1, w0
-	bcc	.L1585
+	bcc	.L1590
 	adrp	x0, .LC1
-	mov	w2, 1092
+	mov	w2, 1097
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1585:
+.L1590:
 	ldp	x1, x2, [x29, 112]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -11064,35 +11137,35 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1569
-.L1572:
+	b	.L1574
+.L1577:
 	ldr	w0, [x29, 148]
 	ldrh	w2, [x4, 62]
 	str	wzr, [x29, 152]
 	msub	w2, w21, w2, w0
 	and	w0, w2, 65535
 	str	w0, [x29, 160]
-	b	.L1573
-.L1575:
+	b	.L1578
+.L1580:
 	ldr	w0, [x29, 160]
-.L1606:
+.L1611:
 	mul	w0, w0, w21
 	sub	w0, w0, w24
 	lsl	w0, w0, 9
 	add	x0, x27, x0
 	str	x0, [x3, 8]
-	b	.L1576
-.L1574:
+	b	.L1581
+.L1579:
 	ldr	x1, [x0, 4040]
 	cmp	w21, w26
 	add	x1, x1, x28
-	bne	.L1577
+	bne	.L1582
 	ldr	x0, [x0, 4000]
-.L1605:
+.L1610:
 	str	x0, [x1, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1579
+	beq	.L1584
 	add	x4, x19, :lo12:.LANCHOR0
 	str	w0, [x29, 196]
 	str	w21, [x29, 216]
@@ -11108,16 +11181,16 @@ FtlWrite:
 	ldr	w0, [x29, 192]
 	ldr	x4, [x29, 104]
 	cmn	w0, #1
-	bne	.L1580
+	bne	.L1585
 	ldr	w0, [x4, 2792]
 	add	w0, w0, 1
 	str	w0, [x4, 2792]
-.L1583:
+.L1588:
 	ldr	w0, [x29, 160]
 	cmp	w21, w26
 	lsl	w2, w0, 9
 	add	x0, x19, :lo12:.LANCHOR0
-	bne	.L1584
+	bne	.L1589
 	ldr	x0, [x0, 4040]
 	mov	x1, x27
 	add	x3, x0, x28
@@ -11125,16 +11198,16 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1607:
+.L1612:
 	bl	ftl_memcpy
-	b	.L1576
-.L1577:
+	b	.L1581
+.L1582:
 	ldr	x0, [x0, 3984]
-	b	.L1605
-.L1580:
+	b	.L1610
+.L1585:
 	ldr	w0, [x23, 8]
 	cmp	w21, w0
-	beq	.L1582
+	beq	.L1587
 	ldr	w0, [x4, 2792]
 	mov	w2, w21
 	add	w0, w0, 1
@@ -11143,17 +11216,17 @@ FtlWrite:
 	add	x0, x0, :lo12:.LC114
 	ldr	w1, [x23, 8]
 	bl	sftl_printk
-.L1582:
+.L1587:
 	ldr	w0, [x23, 8]
 	cmp	w21, w0
-	beq	.L1583
-	mov	w2, 1077
+	beq	.L1588
+	mov	w2, 1082
 	mov	x1, x22
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-	b	.L1583
-.L1579:
+	b	.L1588
+.L1584:
 	add	x1, x19, :lo12:.LANCHOR0
 	ldr	x0, [x1, 4040]
 	ldrh	w2, [x1, 114]
@@ -11161,8 +11234,8 @@ FtlWrite:
 	add	x0, x0, x28
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1583
-.L1584:
+	b	.L1588
+.L1589:
 	ldrh	w1, [x0, 62]
 	ldr	x0, [x0, 4040]
 	add	x3, x0, x28
@@ -11171,26 +11244,26 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x27, x1
-	b	.L1607
-.L1571:
+	b	.L1612
+.L1576:
 	ldr	x0, [x4, 4040]
 	add	x3, x0, x28
 	ldrh	w0, [x4, 62]
-	b	.L1606
-.L1591:
+	b	.L1611
+.L1596:
 	mov	w21, 65535
 	mov	w20, 128
-.L1603:
+.L1608:
 	ldrh	w0, [x19, 2672]
 	cmp	w0, w21
-	bne	.L1592
+	bne	.L1597
 	ldrh	w0, [x19, 3320]
 	cmp	w0, w21
-	bne	.L1592
+	bne	.L1597
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1592:
+.L1597:
 	mov	w1, 1
 	strh	w20, [x19, 3234]
 	mov	w0, w1
@@ -11201,11 +11274,11 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x19, 2416]
 	cmp	w0, 8
-	bls	.L1603
-	b	.L1593
-.L1594:
+	bls	.L1608
+	b	.L1598
+.L1599:
 	mov	w0, -1
-	b	.L1558
+	b	.L1563
 	.size	FtlWrite, .-FtlWrite
 	.align	2
 	.global	sftl_write
@@ -11224,14 +11297,14 @@ sftl_write:
 	stp	x19, x20, [sp, 16]
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
-	bls	.L1609
+	bls	.L1614
 	cmp	w0, 576
-	bls	.L1610
-.L1609:
+	bls	.L1615
+.L1614:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldr	w0, [x0, 124]
-	cbz	w0, .L1611
+	cbz	w0, .L1616
 	adrp	x20, .LANCHOR0
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w23, 512
@@ -11249,11 +11322,11 @@ sftl_write:
 	mov	w0, 0
 	and	w21, w21, 65535
 	udiv	w23, w23, w21
-.L1615:
+.L1620:
 	add	x4, x2, x8
 	ldr	w7, [x4, x3]
-	cbz	w7, .L1612
-.L1616:
+	cbz	w7, .L1617
+.L1621:
 	mul	w0, w21, w23
 	add	x20, x20, :lo12:.LANCHOR0
 	stp	w0, wzr, [x29, 152]
@@ -11261,7 +11334,7 @@ sftl_write:
 	add	x0, x1, :lo12:idb_buf
 	mov	w27, 0
 	str	x0, [x29, 136]
-.L1613:
+.L1618:
 	adrp	x5, gp_flash_check_buf
 	mov	x2, 512
 	add	x0, x5, :lo12:gp_flash_check_buf
@@ -11286,7 +11359,7 @@ sftl_write:
 	str	x5, [x29, 144]
 	ldr	w3, [x29, 124]
 	cmp	w2, 511
-	bhi	.L1617
+	bhi	.L1622
 	add	w1, w2, w19
 	ldr	x4, [x4, 8]
 	str	w2, [x29, 124]
@@ -11294,15 +11367,15 @@ sftl_write:
 	udiv	w1, w1, w3
 	blr	x4
 	ldr	w2, [x29, 124]
-.L1617:
+.L1622:
 	udiv	w5, w19, w2
 	mov	w4, 0
 	mov	w7, 61424
 	msub	w5, w5, w2, w19
 	sub	w6, w19, w5
-.L1618:
+.L1623:
 	cmp	w4, 511
-	bls	.L1619
+	bls	.L1624
 	ldrh	w4, [x20, 14]
 	mov	w5, 0
 	ldrh	w0, [x20, 10]
@@ -11319,9 +11392,9 @@ sftl_write:
 	ldr	x1, [x29, 144]
 	and	w0, w0, 65535
 	add	x9, x1, :lo12:gp_flash_check_buf
-.L1620:
+.L1625:
 	cmp	w5, 511
-	bhi	.L1624
+	bhi	.L1629
 	add	w1, w6, w5
 	sub	w8, w4, w0
 	add	w0, w0, w7
@@ -11345,18 +11418,18 @@ sftl_write:
 	ldr	w6, [x29, 112]
 	ldp	w8, w7, [x29, 120]
 	ldr	x9, [x29, 128]
-	bne	.L1621
-.L1624:
+	bne	.L1626
+.L1629:
 	ldr	x0, [x29, 144]
 	mov	x28, 0
 	add	x5, x0, :lo12:gp_flash_check_buf
-.L1622:
+.L1627:
 	ldr	x1, [x29, 136]
 	lsl	x0, x28, 2
 	ldr	w3, [x0, x1]
 	ldr	w0, [x0, x5]
 	cmp	w0, w3
-	beq	.L1625
+	beq	.L1630
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x5
@@ -11376,23 +11449,23 @@ sftl_write:
 	mov	w0, 0
 	blr	x2
 	cmp	w23, 1
-	bls	.L1626
+	bls	.L1631
 	add	w1, w21, w19
 	ldr	x2, [x20, 3384]
 	mov	w0, 0
 	udiv	w1, w1, w26
 	blr	x2
-.L1626:
+.L1631:
 	ldr	w0, [x29, 152]
 	add	w27, w27, w23
 	cmp	w27, 15
 	add	w19, w19, w0
-	bls	.L1613
-.L1631:
+	bls	.L1618
+.L1636:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	wzr, [x0, 124]
-.L1611:
+.L1616:
 	mov	x3, x25
 	mov	w2, w24
 	mov	w1, w22
@@ -11405,7 +11478,7 @@ sftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1612:
+.L1617:
 	ldr	w7, [x3, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w7, [x4, x3]
@@ -11413,9 +11486,9 @@ sftl_write:
 	sub	x2, x2, #4
 	csel	w0, w0, wzr, cc
 	cmp	x2, x5
-	bne	.L1615
-	b	.L1616
-.L1619:
+	bne	.L1620
+	b	.L1621
+.L1624:
 	add	w0, w5, w4
 	ubfiz	x2, x4, 9, 16
 	str	w4, [x29, 112]
@@ -11439,53 +11512,53 @@ sftl_write:
 	add	w4, w0, w4
 	ldp	w5, w6, [x29, 120]
 	and	w4, w4, 65535
-	b	.L1618
-.L1621:
+	b	.L1623
+.L1626:
 	add	w5, w8, w5
 	mov	w0, 0
 	and	w5, w5, 65535
-	b	.L1620
-.L1625:
+	b	.L1625
+.L1630:
 	add	x28, x28, 1
 	cmp	x28, 65536
-	bne	.L1622
+	bne	.L1627
 	ldr	w0, [x29, 156]
 	add	w0, w0, 1
 	str	w0, [x29, 156]
 	cmp	w0, 5
-	bls	.L1626
-	b	.L1631
-.L1610:
+	bls	.L1631
+	b	.L1636
+.L1615:
 	cmp	w0, 63
 	adrp	x3, idb_buf
-	bhi	.L1628
+	bhi	.L1633
 	mov	w1, 64
 	sub	w1, w1, w0
 	sub	w2, w24, w1
 	ubfiz	x1, x1, 9, 25
 	add	x1, x25, x1
 	add	x0, x3, :lo12:idb_buf
-.L1629:
+.L1634:
 	adrp	x3, .LANCHOR3
 	add	x3, x3, :lo12:.LANCHOR3
 	mov	w6, 1
 	cmp	w5, 576
 	str	w6, [x3, 124]
-	bls	.L1630
+	bls	.L1635
 	sub	w2, w2, w4
 	sub	w2, w2, #447
-.L1630:
+.L1635:
 	lsl	w2, w2, 9
 	bl	memcpy
-	b	.L1611
-.L1628:
+	b	.L1616
+.L1633:
 	lsl	w0, w0, 7
 	add	x3, x3, :lo12:idb_buf
 	sub	w0, w0, #8192
 	mov	x1, x2
 	add	x0, x3, x0, lsl 2
 	mov	w2, w24
-	b	.L1629
+	b	.L1634
 	.size	sftl_write, .-sftl_write
 	.align	2
 	.global	FtlLoadSysInfo
@@ -11511,16 +11584,16 @@ FtlLoadSysInfo:
 	ldrh	w0, [x19, 2656]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1642
-.L1650:
+	bne	.L1647
+.L1655:
 	mov	w0, -1
-.L1641:
+.L1646:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1642:
+.L1647:
 	add	x23, x19, 2656
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -11530,8 +11603,8 @@ FtlLoadSysInfo:
 	strh	w0, [x23, 2]
 	mov	w23, 19539
 	movk	w23, 0x4654, lsl 16
-.L1644:
-	tbz	w22, #31, .L1647
+.L1649:
+	tbz	w22, #31, .L1652
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11539,13 +11612,13 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1646:
+.L1651:
 	add	x1, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x1, 44]
 	ldrh	w1, [x1, 114]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1649
+	bcs	.L1654
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11553,7 +11626,7 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1649:
+.L1654:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w2, 48
 	add	x21, x19, 2312
@@ -11580,13 +11653,13 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1650
+	bne	.L1655
 	ldrh	w1, [x19, 2320]
 	ldrb	w2, [x19, 2322]
 	ldrh	w0, [x19, 58]
 	strh	w1, [x19, 2662]
 	cmp	w2, w0
-	bne	.L1650
+	bne	.L1655
 	adrp	x0, .LANCHOR3+128
 	ldrh	w2, [x19, 62]
 	ldrh	w3, [x19, 36]
@@ -11603,7 +11676,7 @@ FtlLoadSysInfo:
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	strh	w0, [x19, 2652]
-	bls	.L1651
+	bls	.L1656
 	adrp	x1, .LANCHOR1
 	add	x1, x1, :lo12:.LANCHOR1
 	adrp	x0, .LC1
@@ -11611,7 +11684,7 @@ FtlLoadSysInfo:
 	add	x1, x1, 688
 	add	x0, x0, :lo12:.LC1
 	bl	sftl_printk
-.L1651:
+.L1656:
 	add	x0, x20, :lo12:.LANCHOR0
 	mov	w3, -1
 	ldrh	w2, [x0, 2328]
@@ -11657,50 +11730,50 @@ FtlLoadSysInfo:
 	ldr	w2, [x0, 2620]
 	str	wzr, [x0, 2600]
 	cmp	w1, w2
-	bls	.L1652
+	bls	.L1657
 	str	w1, [x0, 2620]
-.L1652:
+.L1657:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldr	w1, [x0, 2348]
 	ldr	w2, [x0, 2624]
 	cmp	w1, w2
-	bls	.L1653
+	bls	.L1658
 	str	w1, [x0, 2624]
-.L1653:
+.L1658:
 	mov	w0, 65535
 	cmp	w4, w0
-	beq	.L1654
+	beq	.L1659
 	add	x0, x20, :lo12:.LANCHOR0
 	add	x0, x0, 2424
 	bl	make_superblock
-.L1654:
+.L1659:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2472
 	ldrh	w2, [x1, 2472]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1655
+	beq	.L1660
 	bl	make_superblock
-.L1655:
+.L1660:
 	add	x1, x20, :lo12:.LANCHOR0
 	add	x0, x1, 2520
 	ldrh	w2, [x1, 2520]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1656
+	beq	.L1661
 	bl	make_superblock
-.L1656:
+.L1661:
 	add	x20, x20, :lo12:.LANCHOR0
 	mov	w1, 65535
 	add	x0, x20, 2672
 	ldrh	w2, [x20, 2672]
 	cmp	w2, w1
-	beq	.L1657
+	beq	.L1662
 	bl	make_superblock
-.L1657:
+.L1662:
 	mov	w0, 0
-	b	.L1641
-.L1647:
+	b	.L1646
+.L1652:
 	ldrh	w0, [x19, 2656]
 	mov	w2, 1
 	mov	w1, w2
@@ -11712,19 +11785,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1645
+	beq	.L1650
 	ldr	x0, [x19, 3440]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1645
+	bne	.L1650
 	ldr	x0, [x19, 3448]
 	ldrh	w0, [x0]
 	cmp	w0, w24
-	beq	.L1646
-.L1645:
+	beq	.L1651
+.L1650:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1644
+	b	.L1649
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.align	2
 	.global	FtlSysBlkInit
@@ -11746,20 +11819,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x20, 2656]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1664
-.L1666:
+	bne	.L1669
+.L1671:
 	mov	w22, -1
-.L1663:
+.L1668:
 	mov	w0, w22
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1664:
+.L1669:
 	bl	FtlLoadSysInfo
 	mov	w22, w0
-	cbnz	w0, .L1666
+	cbnz	w0, .L1671
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11773,19 +11846,19 @@ FtlSysBlkInit:
 	mov	w0, 0
 	ldrh	w3, [x20, 142]
 	add	x1, x1, 4
-.L1667:
+.L1672:
 	cmp	w0, w3
-	bge	.L1672
+	bge	.L1677
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L1668
-.L1672:
+	tbz	w2, #31, .L1673
+.L1677:
 	add	x1, x19, :lo12:.LANCHOR0
 	cmp	w0, w3
 	ldrh	w2, [x1, 2340]
 	add	w2, w2, 1
 	strh	w2, [x1, 2340]
-	bge	.L1686
-.L1669:
+	bge	.L1691
+.L1674:
 	add	x20, x19, :lo12:.LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR3
 	sub	x0, x21, #184
@@ -11820,72 +11893,72 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1673
-.L1668:
+	b	.L1678
+.L1673:
 	add	w0, w0, 1
-	b	.L1667
-.L1686:
+	b	.L1672
+.L1691:
 	add	x0, x21, :lo12:.LANCHOR3
 	ldrh	w0, [x0, -32]
-	cbnz	w0, .L1669
-.L1673:
+	cbnz	w0, .L1674
+.L1678:
 	add	x7, x19, :lo12:.LANCHOR0
 	mov	w0, 65533
 	ldrh	w6, [x7, 2356]
 	sub	w1, w6, #1
 	cmp	w0, w1, uxth
-	bcc	.L1675
+	bcc	.L1680
 	strh	w6, [x7, 3320]
 	mov	w1, w6
 	add	x0, x7, 2408
 	bl	test_node_in_list
-	cbnz	w0, .L1676
+	cbnz	w0, .L1681
 	ldrh	w0, [x7, 44]
 	cmp	w0, w6
-	bls	.L1676
+	bls	.L1681
 	ldr	x0, [x7, 2376]
 	ubfiz	x6, x6, 1, 16
 	ldrh	w0, [x0, x6]
-	cbnz	w0, .L1675
-.L1676:
+	cbnz	w0, .L1680
+.L1681:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	strh	w1, [x0, 3320]
-.L1675:
+.L1680:
 	add	x7, x19, :lo12:.LANCHOR0
 	mov	w0, 65533
 	ldrh	w6, [x7, 2358]
 	sub	w1, w6, #1
 	cmp	w0, w1, uxth
-	bcc	.L1679
+	bcc	.L1684
 	strh	w6, [x7, 3322]
 	mov	w1, w6
 	add	x0, x7, 2408
 	bl	test_node_in_list
-	cbnz	w0, .L1680
+	cbnz	w0, .L1685
 	ldrh	w0, [x7, 44]
 	cmp	w0, w6
-	bls	.L1680
+	bls	.L1685
 	ldr	x0, [x7, 2376]
 	ubfiz	x6, x6, 1, 16
 	ldrh	w0, [x0, x6]
-	cbnz	w0, .L1679
-.L1680:
+	cbnz	w0, .L1684
+.L1685:
 	add	x0, x19, :lo12:.LANCHOR0
 	mov	w1, -1
 	strh	w1, [x0, 3322]
-.L1679:
+.L1684:
 	add	x20, x19, :lo12:.LANCHOR0
 	mov	w1, 65535
 	add	x23, x20, 2424
 	ldrh	w0, [x20, 2424]
 	cmp	w0, w1
-	beq	.L1682
+	beq	.L1687
 	ldrh	w1, [x20, 2428]
-	cbnz	w1, .L1682
+	cbnz	w1, .L1687
 	ldrh	w1, [x20, 2476]
 	add	x21, x20, 2472
-	cbnz	w1, .L1682
+	cbnz	w1, .L1687
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x20, 2472]
 	bl	FtlGcRefreshBlock
@@ -11894,13 +11967,13 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.L1682:
+.L1687:
 	add	x19, x19, :lo12:.LANCHOR0
 	ldrh	w0, [x19, 2340]
 	tst	x0, 31
-	bne	.L1663
+	bne	.L1668
 	bl	FtlVpcCheckAndModify
-	b	.L1663
+	b	.L1668
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.align	2
 	.global	ftl_low_format
@@ -11918,36 +11991,36 @@ ftl_low_format:
 	ldrh	w0, [x0, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1689
+	cbz	w0, .L1694
 	bl	FtlMakeBbt
-.L1689:
+.L1694:
 	mov	w4, 23752
 	add	x1, x20, :lo12:.LANCHOR0
 	mov	w0, 0
 	movk	w4, 0xa0f, lsl 16
-.L1690:
+.L1695:
 	ldrh	w2, [x1, 62]
 	cmp	w0, w2, lsl 7
-	blt	.L1691
+	blt	.L1696
 	ldrh	w21, [x1, 44]
 	add	x22, x20, :lo12:.LANCHOR0
 	mov	w19, 0
-.L1692:
+.L1697:
 	ldrh	w0, [x22, 46]
 	cmp	w0, w21
-	bhi	.L1693
+	bhi	.L1698
 	ldrh	w0, [x22, 36]
 	sub	w1, w19, #3
 	cmp	w1, w0, lsl 1
-	bge	.L1694
-.L1698:
+	bge	.L1699
+.L1703:
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	w21, 0
 	mov	w22, 0
-.L1695:
+.L1700:
 	ldrh	w0, [x19, 44]
 	cmp	w0, w22
-	bhi	.L1699
+	bhi	.L1704
 	ldrh	w2, [x19, 36]
 	ldr	w1, [x19, 48]
 	ldrh	w0, [x19, 46]
@@ -11960,28 +12033,28 @@ ftl_low_format:
 	mov	w0, 24
 	mul	w0, w2, w0
 	cmp	w21, w0
-	ble	.L1700
+	ble	.L1705
 	sub	w1, w1, w21
 	udiv	w1, w1, w2
 	str	w1, [x19, 2584]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x19, 2652]
-.L1700:
+.L1705:
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w1, [x0, 98]
-	cbz	w1, .L1702
+	cbz	w1, .L1707
 	ldrh	w5, [x0, 2652]
 	add	w5, w5, w1, lsr 1
 	strh	w5, [x0, 2652]
 	mul	w5, w1, w2
 	cmp	w21, w5
-	bge	.L1702
+	bge	.L1707
 	add	w1, w1, 32
 	str	w4, [x0, 2584]
 	add	w1, w3, w1
 	strh	w1, [x0, 2652]
-.L1702:
+.L1707:
 	add	x19, x20, :lo12:.LANCHOR0
 	adrp	x22, .LANCHOR3
 	add	x21, x19, 2424
@@ -12019,20 +12092,20 @@ ftl_low_format:
 	strh	wzr, [x19, 2424]
 	str	wzr, [x19, 2580]
 	bl	ftl_memset
-.L1704:
+.L1709:
 	mov	x0, x21
 	bl	make_superblock
 	ldrb	w1, [x21, 7]
 	ldrh	w0, [x21]
-	cbnz	w1, .L1705
+	cbnz	w1, .L1710
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x21]
 	add	w0, w0, 1
 	strh	w0, [x21]
-	b	.L1704
-.L1691:
+	b	.L1709
+.L1696:
 	ldr	x5, [x1, 4000]
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
@@ -12042,8 +12115,8 @@ ftl_low_format:
 	str	w2, [x5, x3]
 	ldr	x2, [x1, 3984]
 	str	w4, [x2, x3]
-	b	.L1690
-.L1693:
+	b	.L1695
+.L1698:
 	mov	w0, w21
 	mov	w1, 1
 	add	w21, w21, 1
@@ -12051,8 +12124,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w21, w21, 65535
 	and	w19, w19, 65535
-	b	.L1692
-.L1694:
+	b	.L1697
+.L1699:
 	udiv	w0, w19, w0
 	ldr	w19, [x22, 136]
 	add	x21, x20, :lo12:.LANCHOR0
@@ -12061,17 +12134,17 @@ ftl_low_format:
 	ldrh	w0, [x22, 40]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x22, 44]
-.L1696:
+.L1701:
 	ldrh	w0, [x21, 46]
 	cmp	w0, w19
-	bls	.L1698
+	bls	.L1703
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1696
-.L1699:
+	b	.L1701
+.L1704:
 	mov	w0, w22
 	mov	w1, 0
 	add	w22, w22, 1
@@ -12079,8 +12152,8 @@ ftl_low_format:
 	add	w21, w21, w0
 	and	w22, w22, 65535
 	and	w21, w21, 65535
-	b	.L1695
-.L1705:
+	b	.L1700
+.L1710:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x21, 12]
@@ -12100,20 +12173,20 @@ ftl_low_format:
 	strb	w1, [x19, 2480]
 	add	x19, x20, :lo12:.LANCHOR0
 	mov	x20, x0
-.L1706:
+.L1711:
 	mov	x0, x20
 	bl	make_superblock
 	ldrb	w1, [x20, 7]
 	ldrh	w0, [x20]
-	cbnz	w1, .L1707
+	cbnz	w1, .L1712
 	ldr	x1, [x19, 2376]
 	ubfiz	x0, x0, 1, 16
 	strh	w21, [x1, x0]
 	ldrh	w0, [x20]
 	add	w0, w0, 1
 	strh	w0, [x20]
-	b	.L1706
-.L1707:
+	b	.L1711
+.L1712:
 	ldr	w1, [x19, 2620]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x20, 12]
@@ -12137,11 +12210,11 @@ ftl_low_format:
 	str	w0, [x19, 2620]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1708
+	cbnz	w0, .L1713
 	adrp	x0, .LANCHOR2
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR2]
-.L1708:
+.L1713:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -12173,22 +12246,22 @@ sftl_init:
 	ldrh	w0, [x19, 40]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1717
+	cbnz	w0, .L1722
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1717
+	cbnz	w0, .L1722
 	mov	w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 2416]
 	cmp	w0, 15
-	bhi	.L1717
+	bhi	.L1722
 	mov	w19, 8129
-.L1716:
+.L1721:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1716
-.L1717:
+	bne	.L1721
+.L1722:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -12212,11 +12285,11 @@ rk_sftl_vendor_dev_ops_register:
 	adrp	x2, .LANCHOR3
 	add	x2, x2, :lo12:.LANCHOR3
 	ldr	x3, [x2, 136]
-	cbnz	x3, .L1724
+	cbnz	x3, .L1729
 	stp	x0, x1, [x2, 136]
 	mov	w0, 0
 	ret
-.L1724:
+.L1729:
 	mov	w0, -1
 	ret
 	.size	rk_sftl_vendor_dev_ops_register, .-rk_sftl_vendor_dev_ops_register
@@ -12235,38 +12308,38 @@ rk_sftl_vendor_storage_init:
 	stp	x25, x26, [sp, 64]
 	bl	ftl_malloc
 	str	x0, [x22, 152]
-	cbz	x0, .L1731
+	cbz	x0, .L1736
 	mov	w26, 22084
 	mov	w25, 0
 	mov	w24, 0
 	mov	w23, 0
 	movk	w26, 0x524b, lsl 16
-.L1729:
+.L1734:
 	ldr	x3, [x22, 136]
 	mov	w1, 128
 	ldr	x2, [x22, 152]
 	lsl	w0, w23, 7
 	blr	x3
 	mov	w21, w0
-	cbnz	w0, .L1727
+	cbnz	w0, .L1732
 	ldr	x19, [x22, 152]
 	ldr	w0, [x19]
 	cmp	w0, w26
-	bne	.L1728
+	bne	.L1733
 	add	x0, x19, 61440
 	ldr	w1, [x19, 4]
 	ldr	w0, [x0, 4092]
 	cmp	w0, w1
-	bne	.L1728
+	bne	.L1733
 	cmp	w0, w24
-	bls	.L1728
+	bls	.L1733
 	mov	w25, w23
 	mov	w24, w0
-.L1728:
+.L1733:
 	add	w23, w23, 1
 	cmp	w23, 2
-	bne	.L1729
-	cbz	w24, .L1730
+	bne	.L1734
+	cbz	w24, .L1735
 	add	x0, x20, :lo12:.LANCHOR3
 	mov	x2, x19
 	mov	w1, 128
@@ -12274,15 +12347,15 @@ rk_sftl_vendor_storage_init:
 	lsl	w0, w25, 7
 	blr	x3
 	mov	w21, w0
-	cbz	w0, .L1725
-.L1727:
+	cbz	w0, .L1730
+.L1732:
 	add	x20, x20, :lo12:.LANCHOR3
 	mov	w21, -1
 	ldr	x0, [x20, 152]
 	bl	kfree
 	str	xzr, [x20, 152]
-	b	.L1725
-.L1730:
+	b	.L1730
+.L1735:
 	mov	w1, 0
 	mov	x2, 65536
 	mov	x0, x19
@@ -12295,7 +12368,7 @@ rk_sftl_vendor_storage_init:
 	str	w0, [x1, 4092]
 	mov	w0, -1032
 	strh	w0, [x19, 14]
-.L1725:
+.L1730:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12303,9 +12376,9 @@ rk_sftl_vendor_storage_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1731:
+.L1736:
 	mov	w21, -12
-	b	.L1725
+	b	.L1730
 	.size	rk_sftl_vendor_storage_init, .-rk_sftl_vendor_storage_init
 	.align	2
 	.global	rk_sftl_vendor_read
@@ -12313,20 +12386,20 @@ rk_sftl_vendor_storage_init:
 rk_sftl_vendor_read:
 	adrp	x3, .LANCHOR3+152
 	ldr	x4, [x3, #:lo12:.LANCHOR3+152]
-	cbz	x4, .L1739
+	cbz	x4, .L1744
 	ldrh	w6, [x4, 10]
 	add	x5, x4, 16
 	mov	w3, 0
-.L1736:
+.L1741:
 	cmp	w3, w6
-	bcc	.L1738
-.L1739:
+	bcc	.L1743
+.L1744:
 	mov	w0, -1
 	ret
-.L1738:
+.L1743:
 	ldrh	w7, [x5], 8
 	cmp	w7, w0
-	bne	.L1737
+	bne	.L1742
 	stp	x29, x30, [sp, -32]!
 	add	x3, x4, x3, uxtw 3
 	mov	x0, x1
@@ -12344,9 +12417,9 @@ rk_sftl_vendor_read:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1737:
+.L1742:
 	add	w3, w3, 1
-	b	.L1736
+	b	.L1741
 	.size	rk_sftl_vendor_read, .-rk_sftl_vendor_read
 	.align	2
 	.global	rk_sftl_vendor_write
@@ -12362,7 +12435,7 @@ rk_sftl_vendor_write:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x19, [x3, 152]
-	cbz	x19, .L1759
+	cbz	x19, .L1764
 	add	w21, w2, 63
 	ldrh	w3, [x19, 10]
 	ldrh	w24, [x19, 8]
@@ -12371,12 +12444,12 @@ rk_sftl_vendor_write:
 	and	w21, w21, -64
 	add	x1, x19, 16
 	mov	w20, 0
-.L1746:
+.L1751:
 	cmp	w20, w3
-	bcc	.L1754
+	bcc	.L1759
 	ldrh	w1, [x19, 14]
 	cmp	w21, w1
-	bhi	.L1759
+	bhi	.L1764
 	add	x3, x19, x3, uxth 3
 	and	w21, w21, 65535
 	uxtw	x2, w28
@@ -12396,11 +12469,11 @@ rk_sftl_vendor_write:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-	b	.L1761
-.L1754:
+	b	.L1766
+.L1759:
 	ldrh	w6, [x1], 8
 	cmp	w6, w0
-	bne	.L1747
+	bne	.L1752
 	uxtw	x27, w20
 	add	x5, x19, 1024
 	add	x22, x19, x27, lsl 3
@@ -12408,17 +12481,17 @@ rk_sftl_vendor_write:
 	add	w25, w25, 63
 	and	w25, w25, -64
 	cmp	w28, w25
-	bls	.L1748
+	bls	.L1753
 	ldrh	w0, [x19, 14]
 	cmp	w21, w0
-	bhi	.L1759
+	bhi	.L1764
 	add	x27, x27, 2
 	ldrh	w22, [x22, 18]
 	add	x27, x19, x27, lsl 3
 	sub	w26, w3, #1
-.L1749:
+.L1754:
 	cmp	w20, w26
-	bcc	.L1750
+	bcc	.L1755
 	add	x20, x19, x20, uxtw 3
 	and	w22, w22, 65535
 	add	x0, x5, x22, uxth
@@ -12435,7 +12508,7 @@ rk_sftl_vendor_write:
 	sub	w21, w0, w21
 	add	w25, w21, w25
 	strh	w25, [x19, 14]
-.L1761:
+.L1766:
 	ldr	w0, [x19, 4]
 	add	x1, x19, 61440
 	add	x23, x23, :lo12:.LANCHOR3
@@ -12454,7 +12527,7 @@ rk_sftl_vendor_write:
 	lsl	w0, w24, 7
 	blr	x3
 	mov	w0, 0
-.L1744:
+.L1749:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12462,7 +12535,7 @@ rk_sftl_vendor_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1750:
+.L1755:
 	add	w20, w20, 1
 	str	x4, [x29, 104]
 	add	x0, x19, x20, uxtw 3
@@ -12486,21 +12559,21 @@ rk_sftl_vendor_write:
 	ldr	x4, [x29, 104]
 	add	w22, w22, w3
 	ldr	x5, [x29, 120]
-	b	.L1749
-.L1748:
+	b	.L1754
+.L1753:
 	ldrh	w0, [x22, 18]
 	uxtw	x2, w28
 	mov	x1, x4
 	add	x0, x5, x0
 	bl	memcpy
 	strh	w28, [x22, 20]
-	b	.L1761
-.L1747:
+	b	.L1766
+.L1752:
 	add	w20, w20, 1
-	b	.L1746
-.L1759:
+	b	.L1751
+.L1764:
 	mov	w0, -1
-	b	.L1744
+	b	.L1749
 	.size	rk_sftl_vendor_write, .-rk_sftl_vendor_write
 	.align	2
 	.global	rk_sftl_vendor_storage_ioctl
@@ -12514,19 +12587,19 @@ rk_sftl_vendor_storage_ioctl:
 	str	x21, [sp, 32]
 	mov	w21, w1
 	bl	ftl_malloc
-	cbz	x0, .L1776
+	cbz	x0, .L1781
 	mov	w1, 30209
 	mov	x19, x0
 	movk	w1, 0x4004, lsl 16
 	cmp	w21, w1
-	beq	.L1765
+	beq	.L1770
 	add	w1, w1, 1
 	cmp	w21, w1
-	beq	.L1766
-.L1786:
+	beq	.L1771
+.L1791:
 	mov	x20, -14
-	b	.L1764
-.L1765:
+	b	.L1769
+.L1770:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12539,34 +12612,34 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1772
+	cbz	x3, .L1777
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1786
+	cbnz	x0, .L1791
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	beq	.L1770
-.L1771:
+	beq	.L1775
+.L1776:
 	mov	x20, -1
-.L1764:
+.L1769:
 	mov	x0, x19
 	bl	kfree
-.L1762:
+.L1767:
 	mov	x0, x20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1770:
+.L1775:
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_read
 	cmn	w0, #1
-	beq	.L1771
+	beq	.L1776
 	strh	w0, [x19, 6]
 	and	x2, x0, 65535
 	add	x2, x2, 8
@@ -12577,14 +12650,14 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1786
+	cbz	x3, .L1791
 	mov	x0, x20
 	mov	x1, x19
 	mov	x20, 0
 	bl	__arch_copy_to_user
-	cbz	x0, .L1764
-	b	.L1786
-.L1766:
+	cbz	x0, .L1769
+	b	.L1791
+.L1771:
 #APP
 // 21 "./arch/arm64/include/asm/current.h" 1
 	mrs x21, sp_el0
@@ -12597,19 +12670,19 @@ rk_sftl_vendor_storage_ioctl:
 	adds x1, x1, 8; ccmp x1, x2, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1772
+	cbz	x3, .L1777
 	mov	x2, 8
 	mov	x1, x20
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1786
+	cbnz	x0, .L1791
 	ldr	w1, [x19]
 	mov	w0, 17745
 	movk	w0, 0x5652, lsl 16
 	cmp	w1, w0
-	bne	.L1771
+	bne	.L1776
 	ldrh	w2, [x19, 6]
 	cmp	w2, 4087
-	bhi	.L1771
+	bhi	.L1776
 	add	w2, w2, 8
 	mov	x0, x20
 	sxtw	x2, w2
@@ -12619,28 +12692,28 @@ rk_sftl_vendor_storage_ioctl:
 	adds x0, x0, x2; ccmp x0, x1, #2, cc; cset x3, ls
 // 0 "" 2
 #NO_APP
-	cbz	x3, .L1774
+	cbz	x3, .L1779
 	mov	x1, x20
 	mov	x0, x19
 	bl	__arch_copy_from_user
-	cbnz	x0, .L1786
+	cbnz	x0, .L1791
 	ldrh	w2, [x19, 6]
 	add	x1, x19, 8
 	ldrh	w0, [x19, 4]
 	bl	rk_sftl_vendor_write
 	sxtw	x20, w0
-	b	.L1764
-.L1772:
+	b	.L1769
+.L1777:
 	str	xzr, [x19]
-	b	.L1786
-.L1774:
+	b	.L1791
+.L1779:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-	b	.L1786
-.L1776:
+	b	.L1791
+.L1781:
 	mov	x20, -1
-	b	.L1762
+	b	.L1767
 	.size	rk_sftl_vendor_storage_ioctl, .-rk_sftl_vendor_storage_ioctl
 	.align	2
 	.global	rk_sftl_vendor_register
@@ -12807,169 +12880,169 @@ rk_sftl_vendor_register:
 	.section	.rodata
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.3843, %object
-	.size	__func__.3843, 17
-__func__.3843:
+	.type	__func__.3844, %object
+	.size	__func__.3844, 17
+__func__.3844:
 	.string	"INSERT_DATA_LIST"
 	.zero	7
-	.type	__func__.3838, %object
-	.size	__func__.3838, 17
-__func__.3838:
+	.type	__func__.3839, %object
+	.size	__func__.3839, 17
+__func__.3839:
 	.string	"INSERT_FREE_LIST"
 	.zero	7
-	.type	__func__.3881, %object
-	.size	__func__.3881, 17
-__func__.3881:
+	.type	__func__.3882, %object
+	.size	__func__.3882, 17
+__func__.3882:
 	.string	"List_remove_node"
 	.zero	7
-	.type	__func__.3913, %object
-	.size	__func__.3913, 22
-__func__.3913:
+	.type	__func__.3914, %object
+	.size	__func__.3914, 22
+__func__.3914:
 	.string	"List_update_data_list"
 	.zero	2
-	.type	__func__.4024, %object
-	.size	__func__.4024, 22
-__func__.4024:
+	.type	__func__.4025, %object
+	.size	__func__.4025, 22
+__func__.4025:
 	.string	"select_l2p_ram_region"
 	.zero	2
-	.type	__func__.4347, %object
-	.size	__func__.4347, 16
-__func__.4347:
+	.type	__func__.4348, %object
+	.size	__func__.4348, 16
+__func__.4348:
 	.string	"make_superblock"
-	.type	__func__.4522, %object
-	.size	__func__.4522, 19
-__func__.4522:
+	.type	__func__.4523, %object
+	.size	__func__.4523, 19
+__func__.4523:
 	.string	"get_new_active_ppa"
 	.zero	5
-	.type	__func__.16105, %object
-	.size	__func__.16105, 15
-__func__.16105:
+	.type	__func__.16106, %object
+	.size	__func__.16106, 15
+__func__.16106:
 	.string	"FlashReadPages"
 	.zero	1
-	.type	__func__.16122, %object
-	.size	__func__.16122, 15
-__func__.16122:
+	.type	__func__.16123, %object
+	.size	__func__.16123, 15
+__func__.16123:
 	.string	"FlashProgPages"
 	.zero	1
-	.type	__func__.3955, %object
-	.size	__func__.3955, 26
-__func__.3955:
+	.type	__func__.3956, %object
+	.size	__func__.3956, 26
+__func__.3956:
 	.string	"ftl_map_blk_alloc_new_blk"
 	.zero	6
-	.type	__func__.3380, %object
-	.size	__func__.3380, 11
-__func__.3380:
+	.type	__func__.3381, %object
+	.size	__func__.3381, 11
+__func__.3381:
 	.string	"FtlMemInit"
 	.zero	5
-	.type	__func__.3678, %object
-	.size	__func__.3678, 14
-__func__.3678:
+	.type	__func__.3679, %object
+	.size	__func__.3679, 14
+__func__.3679:
 	.string	"FtlBbt2Bitmap"
 	.zero	2
-	.type	__func__.3985, %object
-	.size	__func__.3985, 31
-__func__.3985:
+	.type	__func__.3986, %object
+	.size	__func__.3986, 31
+__func__.3986:
 	.string	"Ftl_write_map_blk_to_last_page"
 	.zero	1
-	.type	__func__.3999, %object
-	.size	__func__.3999, 16
-__func__.3999:
+	.type	__func__.4000, %object
+	.size	__func__.4000, 16
+__func__.4000:
 	.string	"FtlMapWritePage"
-	.type	__func__.3922, %object
-	.size	__func__.3922, 16
-__func__.3922:
+	.type	__func__.3923, %object
+	.size	__func__.3923, 16
+__func__.3923:
 	.string	"load_l2p_region"
-	.type	__func__.3970, %object
-	.size	__func__.3970, 15
-__func__.3970:
+	.type	__func__.3971, %object
+	.size	__func__.3971, 15
+__func__.3971:
 	.string	"ftl_map_blk_gc"
 	.zero	1
-	.type	__func__.4041, %object
-	.size	__func__.4041, 9
-__func__.4041:
+	.type	__func__.4042, %object
+	.size	__func__.4042, 9
+__func__.4042:
 	.string	"log2phys"
 	.zero	7
-	.type	__func__.4256, %object
-	.size	__func__.4256, 16
-__func__.4256:
+	.type	__func__.4257, %object
+	.size	__func__.4257, 16
+__func__.4257:
 	.string	"FtlReUsePrevPpa"
-	.type	__func__.4136, %object
-	.size	__func__.4136, 14
-__func__.4136:
+	.type	__func__.4137, %object
+	.size	__func__.4137, 14
+__func__.4137:
 	.string	"FtlScanSysBlk"
 	.zero	2
-	.type	__func__.4368, %object
-	.size	__func__.4368, 18
-__func__.4368:
+	.type	__func__.4369, %object
+	.size	__func__.4369, 18
+__func__.4369:
 	.string	"SupperBlkListInit"
 	.zero	6
-	.type	__func__.4409, %object
-	.size	__func__.4409, 14
-__func__.4409:
+	.type	__func__.4410, %object
+	.size	__func__.4410, 14
+__func__.4410:
 	.string	"ftl_check_vpc"
 	.zero	2
-	.type	__func__.4494, %object
-	.size	__func__.4494, 25
-__func__.4494:
+	.type	__func__.4495, %object
+	.size	__func__.4495, 25
+__func__.4495:
 	.string	"allocate_data_superblock"
 	.zero	7
-	.type	__func__.4535, %object
-	.size	__func__.4535, 16
-__func__.4535:
+	.type	__func__.4536, %object
+	.size	__func__.4536, 16
+__func__.4536:
 	.string	"update_vpc_list"
-	.type	__func__.4542, %object
-	.size	__func__.4542, 20
-__func__.4542:
+	.type	__func__.4543, %object
+	.size	__func__.4543, 20
+__func__.4543:
 	.string	"decrement_vpc_count"
 	.zero	4
-	.type	__func__.4290, %object
-	.size	__func__.4290, 22
-__func__.4290:
+	.type	__func__.4291, %object
+	.size	__func__.4291, 22
+__func__.4291:
 	.string	"FtlRecoverySuperblock"
 	.zero	2
-	.type	__func__.3721, %object
-	.size	__func__.3721, 11
-__func__.3721:
+	.type	__func__.3722, %object
+	.size	__func__.3722, 11
+__func__.3722:
 	.string	"FtlLoadBbt"
 	.zero	5
-	.type	__func__.4114, %object
-	.size	__func__.4114, 15
-__func__.4114:
+	.type	__func__.4115, %object
+	.size	__func__.4115, 15
+__func__.4115:
 	.string	"FtlVpcTblFlush"
 	.zero	1
-	.type	__func__.4393, %object
-	.size	__func__.4393, 21
-__func__.4393:
+	.type	__func__.4394, %object
+	.size	__func__.4394, 21
+__func__.4394:
 	.string	"FtlVpcCheckAndModify"
 	.zero	3
-	.type	__func__.4515, %object
-	.size	__func__.4515, 29
-__func__.4515:
+	.type	__func__.4516, %object
+	.size	__func__.4516, 29
+__func__.4516:
 	.string	"allocate_new_data_superblock"
 	.zero	3
-	.type	__func__.3504, %object
-	.size	__func__.3504, 13
-__func__.3504:
+	.type	__func__.3505, %object
+	.size	__func__.3505, 13
+__func__.3505:
 	.string	"FtlProgPages"
 	.zero	3
-	.type	__func__.4613, %object
-	.size	__func__.4613, 19
-__func__.4613:
+	.type	__func__.4614, %object
+	.size	__func__.4614, 19
+__func__.4614:
 	.string	"FtlGcFreeTempBlock"
 	.zero	5
-	.type	__func__.4719, %object
-	.size	__func__.4719, 23
-__func__.4719:
+	.type	__func__.4720, %object
+	.size	__func__.4720, 23
+__func__.4720:
 	.string	"rk_ftl_garbage_collect"
 	.zero	1
-	.type	__func__.3532, %object
-	.size	__func__.3532, 9
-__func__.3532:
+	.type	__func__.3533, %object
+	.size	__func__.3533, 9
+__func__.3533:
 	.string	"FtlWrite"
 	.zero	7
-	.type	__func__.4193, %object
-	.size	__func__.4193, 15
-__func__.4193:
+	.type	__func__.4194, %object
+	.size	__func__.4194, 15
+__func__.4194:
 	.string	"FtlLoadSysInfo"
 	.zero	1
 	.type	rk_sftl_vendor_storage_fops, %object
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index dc4167fba624d..4baae8e78e56b 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -188,10 +188,17 @@ static unsigned int rk_partition_init(struct flash_part *part)
 
 static int rkflash_proc_show(struct seq_file *m, void *v)
 {
+	int real_size = 0;
+	char *ftl_buf = kzalloc(4096, GFP_KERNEL);
+
+	real_size = rknand_proc_ftlread(4096, ftl_buf);
+	if (real_size > 0)
+		seq_printf(m, "%s", ftl_buf);
 	seq_printf(m, "Totle Read %ld KB\n", totle_read_data >> 1);
 	seq_printf(m, "Totle Write %ld KB\n", totle_write_data >> 1);
 	seq_printf(m, "totle_write_count %ld\n", totle_write_count);
 	seq_printf(m, "totle_read_count %ld\n", totle_read_count);
+	kfree(ftl_buf);
 	return 0;
 }
 

From a1bd06501223a026bb72a86c638a16d0ed3f89a6 Mon Sep 17 00:00:00 2001
From: Randy Li <randy.li@rock-chips.com>
Date: Tue, 31 Oct 2017 17:09:00 +0800
Subject: [PATCH 1117/1852] rockchip/mpp_service: use the same ioctl as
 vpu_service

It make all kernel version use the same ioctl defines.
The compat ioctl doesn't support the customer ioctl of the
mpp device.

Change-Id: I018ec2eb48cd2ca4e211da7137781771b33bda15
Signed-off-by: Randy Li <randy.li@rock-chips.com>
---
 drivers/video/rockchip/vpu/mpp_dev_common.c | 235 ++++++++++----------
 drivers/video/rockchip/vpu/mpp_dev_common.h |  16 +-
 drivers/video/rockchip/vpu/mpp_dev_h265e.h  |   6 +-
 drivers/video/rockchip/vpu/mpp_dev_rkvenc.h |   2 +-
 4 files changed, 119 insertions(+), 140 deletions(-)

diff --git a/drivers/video/rockchip/vpu/mpp_dev_common.c b/drivers/video/rockchip/vpu/mpp_dev_common.c
index 2dfdb1a17aecc..1cf78ec1984de 100644
--- a/drivers/video/rockchip/vpu/mpp_dev_common.c
+++ b/drivers/video/rockchip/vpu/mpp_dev_common.c
@@ -171,11 +171,6 @@ int mpp_dev_common_ctx_init(struct rockchip_mpp_dev *mpp, struct mpp_ctx *cfg)
 	return 0;
 }
 
-struct mpp_request {
-	u32 *req;
-	u32 size;
-};
-
 #ifdef CONFIG_COMPAT
 struct compat_mpp_request {
 	compat_uptr_t req;
@@ -482,151 +477,147 @@ static long mpp_dev_ioctl(struct file *filp, unsigned int cmd,
 		return -EINVAL;
 
 	switch (cmd) {
-	case MPP_IOC_SET_CLIENT_TYPE:
+	case VPU_IOC_SET_CLIENT_TYPE:
 		break;
-	case MPP_IOC_SET_REG:
-		{
-			struct mpp_request req;
-			struct mpp_ctx *ctx;
-
-			mpp_debug(DEBUG_IOCTL, "pid %d set reg\n",
-				  session->pid);
-			if (copy_from_user(&req, (void __user *)arg,
-					   sizeof(struct mpp_request))) {
-				mpp_err("error: set reg copy_from_user failed\n");
-				return -EFAULT;
-			}
-			ctx = ctx_init(mpp, session, (void __user *)req.req,
-				       req.size);
-			if (!ctx)
-				return -EFAULT;
-
-			mpp_srv_lock(mpp->srv);
-			rockchip_mpp_try_run(mpp);
-			mpp_srv_unlock(mpp->srv);
+	case VPU_IOC_SET_REG: {
+		struct vpu_request req;
+		struct mpp_ctx *ctx;
+
+		mpp_debug(DEBUG_IOCTL, "pid %d set reg\n",
+			  session->pid);
+		if (copy_from_user(&req, (void __user *)arg,
+				   sizeof(struct vpu_request))) {
+			mpp_err("error: set reg copy_from_user failed\n");
+			return -EFAULT;
 		}
-		break;
-	case MPP_IOC_GET_REG:
-		{
-			struct mpp_request req;
-
-			mpp_debug(DEBUG_IOCTL, "pid %d get reg\n",
-				  session->pid);
-			if (copy_from_user(&req, (void __user *)arg,
-					   sizeof(struct mpp_request))) {
-				mpp_err("error: get reg copy_from_user failed\n");
-				return -EFAULT;
-			}
+		ctx = ctx_init(mpp, session, (void __user *)req.req,
+			       req.size);
+		if (!ctx)
+			return -EFAULT;
 
-			return mpp_dev_wait_result(session, mpp, req.req);
+		mpp_srv_lock(mpp->srv);
+		rockchip_mpp_try_run(mpp);
+		mpp_srv_unlock(mpp->srv);
+	} break;
+	case VPU_IOC_GET_REG: {
+		struct vpu_request req;
+
+		mpp_debug(DEBUG_IOCTL, "pid %d get reg\n",
+			  session->pid);
+		if (copy_from_user(&req, (void __user *)arg,
+				   sizeof(struct vpu_request))) {
+			mpp_err("error: get reg copy_from_user failed\n");
+			return -EFAULT;
 		}
-		break;
-	case MPP_IOC_PROBE_IOMMU_STATUS:
-		{
-			int iommu_enable = 1;
 
-			mpp_debug(DEBUG_IOCTL, "VPU_IOC_PROBE_IOMMU_STATUS\n");
+		return mpp_dev_wait_result(session, mpp, req.req);
+	} break;
+	case VPU_IOC_PROBE_IOMMU_STATUS: {
+		int iommu_enable = 1;
 
-			if (copy_to_user((void __user *)arg,
-					 &iommu_enable, sizeof(int))) {
-				mpp_err("error: iommu status copy_to_user failed\n");
-				return -EFAULT;
-			}
-		}
-		break;
-	default:
-		{
-			if (mpp->ops->ioctl)
-				return mpp->ops->ioctl(session, cmd, arg);
+		mpp_debug(DEBUG_IOCTL, "VPU_IOC_PROBE_IOMMU_STATUS\n");
 
-			mpp_err("unknown mpp ioctl cmd %x\n", cmd);
+		if (copy_to_user((void __user *)arg,
+				 &iommu_enable, sizeof(int))) {
+			mpp_err("error: iommu status copy_to_user failed\n");
+			return -EFAULT;
 		}
 		break;
 	}
+	default: {
+		if (mpp->ops->ioctl)
+			return mpp->ops->ioctl(session, cmd, arg);
+
+		mpp_err("unknown mpp ioctl cmd %x\n", cmd);
+		return -ENOIOCTLCMD;
+	} break;
+	}
 
 	mpp_debug_leave();
 	return 0;
 }
 
 #ifdef CONFIG_COMPAT
-static long compat_mpp_dev_ioctl(struct file *filp, unsigned int cmd,
-				 unsigned long arg)
+#define VPU_IOC_SET_CLIENT_TYPE32          _IOW(VPU_IOC_MAGIC, 1, u32)
+#define VPU_IOC_GET_HW_FUSE_STATUS32       _IOW(VPU_IOC_MAGIC, 2, \
+						compat_ulong_t)
+#define VPU_IOC_SET_REG32                  _IOW(VPU_IOC_MAGIC, 3, \
+						compat_ulong_t)
+#define VPU_IOC_GET_REG32                  _IOW(VPU_IOC_MAGIC, 4, \
+						compat_ulong_t)
+#define VPU_IOC_PROBE_IOMMU_STATUS32       _IOR(VPU_IOC_MAGIC, 5, u32)
+
+static long native_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
-	struct rockchip_mpp_dev *mpp =
-			container_of(filp->f_path.dentry->d_inode->i_cdev,
-				     struct rockchip_mpp_dev, cdev);
-	struct mpp_session *session = (struct mpp_session *)filp->private_data;
+	long ret = -ENOIOCTLCMD;
 
-	mpp_debug_enter();
+	if (file->f_op->unlocked_ioctl)
+		ret = file->f_op->unlocked_ioctl(file, cmd, arg);
 
-	if (!session)
-		return -EINVAL;
+	return ret;
+}
 
+static long compat_mpp_dev_ioctl(struct file *file, unsigned int cmd,
+				     unsigned long arg)
+{
+	struct vpu_request req;
+	void __user *up = compat_ptr(arg);
+	int compatible_arg = 1;
+	long err = 0;
+
+	mpp_debug_enter();
+	mpp_debug(DEBUG_IOCTL, "cmd %x, VPU_IOC_SET_CLIENT_TYPE32 %x\n", cmd,
+		  (u32)VPU_IOC_SET_CLIENT_TYPE32);
+	/* First, convert the command. */
 	switch (cmd) {
-	case MPP_IOC_SET_CLIENT_TYPE:
+	case VPU_IOC_SET_CLIENT_TYPE32:
+		cmd = VPU_IOC_SET_CLIENT_TYPE;
 		break;
-	case MPP_IOC_SET_REG:
-		{
-			struct compat_mpp_request req;
-			struct mpp_ctx *ctx;
-
-			mpp_debug(DEBUG_IOCTL, "compat set reg\n");
-			if (copy_from_user(&req, compat_ptr((compat_uptr_t)arg),
-					   sizeof(struct compat_mpp_request))) {
-				mpp_err("compat set_reg copy_from_user failed\n");
-				return -EFAULT;
-			}
-			ctx = ctx_init(mpp, session,
-				       compat_ptr((compat_uptr_t)req.req),
-				       req.size);
-			if (!ctx)
-				return -EFAULT;
-
-			mpp_srv_lock(mpp->srv);
-			rockchip_mpp_try_run(mpp);
-			mpp_srv_unlock(mpp->srv);
-		}
+	case VPU_IOC_GET_HW_FUSE_STATUS32:
+		cmd = VPU_IOC_GET_HW_FUSE_STATUS;
 		break;
-	case MPP_IOC_GET_REG:
-		{
-			struct compat_mpp_request req;
-
-			mpp_debug(DEBUG_IOCTL, "compat get reg\n");
-			if (copy_from_user(&req, compat_ptr((compat_uptr_t)arg),
-					   sizeof(struct compat_mpp_request))) {
-				mpp_err("compat get reg copy_from_user failed\n");
-				return -EFAULT;
-			}
-
-			return mpp_dev_wait_result(session,
-						   mpp,
-						   compat_ptr((compat_uptr_t)req.req));
-		}
+	case VPU_IOC_SET_REG32:
+		cmd = VPU_IOC_SET_REG;
 		break;
-	case MPP_IOC_PROBE_IOMMU_STATUS:
-		{
-			int iommu_enable = 1;
-
-			mpp_debug(DEBUG_IOCTL, "COMPAT_VPU_IOC_PROBE_IOMMU_STATUS\n");
-
-			if (copy_to_user(compat_ptr((compat_uptr_t)arg),
-					 &iommu_enable, sizeof(int))) {
-				mpp_err("error: VPU_IOC_PROBE_IOMMU_STATUS failed\n");
-				return -EFAULT;
-			}
-		}
+	case VPU_IOC_GET_REG32:
+		cmd = VPU_IOC_GET_REG;
 		break;
-	default:
-		{
-			if (mpp->ops->ioctl)
-				return mpp->ops->ioctl(session, cmd, arg);
-
-			mpp_err("unknown mpp ioctl cmd %x\n", cmd);
-		}
+	case VPU_IOC_PROBE_IOMMU_STATUS32:
+		cmd = VPU_IOC_PROBE_IOMMU_STATUS;
 		break;
 	}
+	switch (cmd) {
+	case VPU_IOC_SET_REG:
+	case VPU_IOC_GET_REG:
+	case VPU_IOC_GET_HW_FUSE_STATUS: {
+		compat_uptr_t req_ptr;
+		struct compat_mpp_request __user *req32 = NULL;
+
+		req32 = (struct compat_mpp_request __user *)up;
+		memset(&req, 0, sizeof(req));
+
+		if (get_user(req_ptr, &req32->req) ||
+		    get_user(req.size, &req32->size)) {
+			mpp_err("error: compat get hw status copy_from_user failed\n");
+			return -EFAULT;
+		}
+		req.req = compat_ptr(req_ptr);
+		compatible_arg = 0;
+	} break;
+	}
+
+	if (compatible_arg) {
+		err = native_ioctl(file, cmd, (unsigned long)up);
+	} else {
+		mm_segment_t old_fs = get_fs();
+
+		set_fs(KERNEL_DS);
+		err = native_ioctl(file, cmd, (unsigned long)&req);
+		set_fs(old_fs);
+	}
+
 	mpp_debug_leave();
-	return 0;
+	return err;
 }
 #endif
 
diff --git a/drivers/video/rockchip/vpu/mpp_dev_common.h b/drivers/video/rockchip/vpu/mpp_dev_common.h
index d4d1897b7ac3d..9142f5e76ea08 100644
--- a/drivers/video/rockchip/vpu/mpp_dev_common.h
+++ b/drivers/video/rockchip/vpu/mpp_dev_common.h
@@ -25,22 +25,10 @@
 #include <linux/workqueue.h>
 #include <linux/wakelock.h>
 
-extern int mpp_dev_debug;
-
-/*
- * Ioctl definitions
- */
+#include <video/rk_vpu_service.h>
 
-/* Use 'l' as magic number */
-#define MPP_IOC_MAGIC			'l'
-
-#define MPP_IOC_SET_CLIENT_TYPE		_IOW(MPP_IOC_MAGIC, 1, u32)
-#define MPP_IOC_GET_HW_FUSE_STATUS	_IOW(MPP_IOC_MAGIC, 2, u32)
-
-#define MPP_IOC_SET_REG			_IOW(MPP_IOC_MAGIC, 3, u32)
-#define MPP_IOC_GET_REG			_IOW(MPP_IOC_MAGIC, 4, u32)
+extern int mpp_dev_debug;
 
-#define MPP_IOC_PROBE_IOMMU_STATUS	_IOR(MPP_IOC_MAGIC, 5, u32)
 #define MPP_IOC_CUSTOM_BASE			0x1000
 
 /*
diff --git a/drivers/video/rockchip/vpu/mpp_dev_h265e.h b/drivers/video/rockchip/vpu/mpp_dev_h265e.h
index a4a40c686b9e7..39c3d73d24113 100644
--- a/drivers/video/rockchip/vpu/mpp_dev_h265e.h
+++ b/drivers/video/rockchip/vpu/mpp_dev_h265e.h
@@ -22,14 +22,14 @@
 #include <linux/wakelock.h>
 
 #define MPP_DEV_H265E_SET_COLOR_PALETTE	\
-		_IOW(MPP_IOC_MAGIC, MPP_IOC_CUSTOM_BASE + 1, u32)
+		_IOW(VPU_IOC_MAGIC, MPP_IOC_CUSTOM_BASE + 1, u32)
 
 #define MPP_DEV_H265E_SET_PARAMETER	\
-		_IOW(MPP_IOC_MAGIC, \
+		_IOW(VPU_IOC_MAGIC, \
 		MPP_IOC_CUSTOM_BASE + 6, struct mpp_h265e_cfg)
 
 #define MPP_DEV_H265E_GET_HEAD_PARAMETER	\
-		_IOW(MPP_IOC_MAGIC, \
+		_IOW(VPU_IOC_MAGIC, \
 		MPP_IOC_CUSTOM_BASE + 7, struct hal_h265e_header)
 
 #define H265E_INSTANCE_NUM 4
diff --git a/drivers/video/rockchip/vpu/mpp_dev_rkvenc.h b/drivers/video/rockchip/vpu/mpp_dev_rkvenc.h
index a9fad2c86600c..78edc6075aa90 100644
--- a/drivers/video/rockchip/vpu/mpp_dev_rkvenc.h
+++ b/drivers/video/rockchip/vpu/mpp_dev_rkvenc.h
@@ -33,7 +33,7 @@ struct rkvenc_osd_palette {
 };
 
 #define MPP_DEV_RKVENC_SET_COLOR_PALETTE	\
-			_IOW(MPP_IOC_MAGIC, MPP_IOC_CUSTOM_BASE + 1,	\
+			_IOW(VPU_IOC_MAGIC, MPP_IOC_CUSTOM_BASE + 1,	\
 			struct rkvenc_osd_palette)
 
 struct rkvenc_config_elem {

From ed76dea842ec2c5acdf36fc7d6ce485c581d978a Mon Sep 17 00:00:00 2001
From: Randy Li <randy.li@rock-chips.com>
Date: Thu, 21 Sep 2017 18:06:28 +0800
Subject: [PATCH 1118/1852] video: rockchip: vpu: adjust the register buffer
 table

make me more easily to check the mapping.
Also fix some compiler warnings.

Change-Id: Ic28f6ce54b4dcd0c4a9d9543939c5f5e013136fc
Signed-off-by: Randy Li <randy.li@rock-chips.com>
---
 drivers/video/rockchip/vcodec/vcodec_hw_info.h |  2 +-
 drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h |  6 +++---
 drivers/video/rockchip/vcodec/vcodec_service.c | 10 +++++-----
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_info.h b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
index 3904f718cf750..cc7d9dbfe434f 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_info.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
@@ -204,7 +204,7 @@ struct vpu_task_info {
 };
 
 struct vpu_trans_info {
-	const int count;
+	const size_t count;
 	const char * const table;
 };
 
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
index 96e2d49909935..a37cbc481704f 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
@@ -219,9 +219,9 @@ DEF_FMT_TRANS_TBL(vpu2_jpegd,
 );
 
 DEF_FMT_TRANS_TBL(vpu2_h264d,
-		  64, 63, 84, 85, 86, 87, 88, 89,
+		  61, 62, 63, 64, 84, 85, 86, 87, 88, 89,
 		  90, 91, 92, 93, 94, 95, 96, 97,
-		  98, 99, 61, 62
+		  98, 99,
 );
 
 DEF_FMT_TRANS_TBL(vpu2_vp6d,
@@ -238,7 +238,7 @@ DEF_FMT_TRANS_TBL(vpu2_vc1d,
 );
 
 DEF_FMT_TRANS_TBL(vpu2_default_dec,
-		  64, 63, 131, 148, 134, 135, 61, 62
+		  61, 62, 64, 63, 131, 148, 134, 135,
 );
 
 DEF_FMT_TRANS_TBL(vpu2_default_pp,
diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index 9c5fac22011e3..f14b353285b7f 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -1010,7 +1010,7 @@ static int fill_scaling_list_pps(struct vpu_subdev_data *data,
 static int vcodec_bufid_to_iova(struct vpu_subdev_data *data,
 				struct vpu_session *session,
 				const u8 *tbl,
-				int size, struct vpu_reg *reg,
+				size_t size, struct vpu_reg *reg,
 				struct extra_info_for_iommu *ext_inf)
 {
 	struct vpu_service_info *pservice = data->pservice;
@@ -1018,7 +1018,7 @@ static int vcodec_bufid_to_iova(struct vpu_subdev_data *data,
 	enum FORMAT_TYPE type;
 	int offset = 0;
 	int ret = 0;
-	int i;
+	u32 i;
 
 	if (!tbl || size <= 0) {
 		dev_err(pservice->dev, "input arguments invalidate\n");
@@ -1156,7 +1156,7 @@ static int vcodec_reg_address_translate(struct vpu_subdev_data *data,
 	if (type < FMT_TYPE_BUTT) {
 		const struct vpu_trans_info *info = &reg->trans[type];
 		const u8 *tbl = info->table;
-		int size = info->count;
+		size_t size = info->count;
 
 		return vcodec_bufid_to_iova(data, session, tbl, size, reg,
 					    ext_inf);
@@ -1944,9 +1944,9 @@ static long compat_vpu_service_ioctl(struct file *file, unsigned int cmd,
 
 static int vpu_service_check_hw(struct vpu_subdev_data *data)
 {
-	int ret = -EINVAL;
-	u32 i = 0;
 	u32 hw_id = readl_relaxed(data->regs);
+	u32 i = 0;
+	int ret = -EINVAL;
 
 	hw_id = (hw_id >> 16) & 0xFFFF;
 	dev_dbg(data->dev, "checking hw id %x\n", hw_id);

From 062ff9ce2ddc05dc7b4d410fa93942f546453b11 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Wed, 15 Aug 2018 11:58:30 +0800
Subject: [PATCH 1119/1852] arm: rk3308_linux_aarch32_debug_defconfig: support
 pmic rk816

Change-Id: Ieaf268347b3a406daaea9514bbb409796261c272
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index d8d4fbeec2db6..820a518ae3996 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -99,6 +99,7 @@ CONFIG_KEYBOARD_ADC=y
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_MISC=y
+CONFIG_INPUT_RK8XX_PWRKEY=y
 CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
@@ -121,6 +122,7 @@ CONFIG_SPI_SPIDEV=y
 CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_POWER_SUPPLY=y
+CONFIG_BATTERY_RK816=y
 CONFIG_POWER_RESET=y
 CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_POWER_AVS=y
@@ -135,9 +137,12 @@ CONFIG_DEVFREQ_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_WATCHDOG=y
 CONFIG_DW_WATCHDOG=y
+CONFIG_MFD_CORE=y
+CONFIG_MFD_RK808=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_GPIO=y
 CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK808=y
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_HRTIMER=y
@@ -180,6 +185,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_LEDS_TRIGGER_MULTI_CTRL=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RK808=y
 CONFIG_DMADEVICES=y
 CONFIG_PL330_DMA=y
 CONFIG_STAGING=y

From 9e4e861bdfdd638fb40c753cc124041abd1ddeb1 Mon Sep 17 00:00:00 2001
From: Lin Jianhua <linjh@rock-chips.com>
Date: Tue, 14 Aug 2018 09:20:43 +0800
Subject: [PATCH 1120/1852] arm: dts: rockchip: add dot rk816 v10 dts for
 rk3308

Change-Id: I976950bc059d23ffc1f581b8821da47afa8079f5
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
---
 arch/arm/boot/dts/Makefile                    |   1 +
 .../boot/dts/rk3308-dot-rk816-v10-aarch32.dts | 488 ++++++++++++++++++
 2 files changed, 489 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 530ecde208457..2d803866a0af9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -567,6 +567,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-speedy.dtb \
 	rk3288-x7811-rk818-dual-dsi.dtb \
 	rk3308-dot-v10-aarch32.dtb \
+	rk3308-dot-rk816-v10-aarch32.dtb \
 	rk3308-evb-dmic-i2s-v10-aarch32.dtb \
 	rk3308-voice-module-board-v10-aarch32.dtb \
 	rk3308-voice-module-amic-mainboard-v10-aarch32.dtb \
diff --git a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
new file mode 100644
index 0000000000000..4aa622f596bbc
--- /dev/null
+++ b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
@@ -0,0 +1,488 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "arm64/rockchip/rk3308.dtsi"
+
+/ {
+	model = "Rockchip RK3308 Dot Rk816-3 V10 (AArch32)";
+	compatible = "rockchip,rk3308-dot-rk816-v10-aarch32", "rockchip,rk3308";
+
+	chosen {
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+	};
+
+	acodec_sound: acodec-sound {
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-acodec";
+		rockchip,codec-hp-det;
+		rockchip,mclk-fs = <256>;
+		rockchip,cpu = <&i2s_8ch_2>;
+		rockchip,codec = <&acodec>;
+		status = "okay";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		esc-key {
+			linux,code = <KEY_MICMUTE>;
+			label = "micmute";
+			press-threshold-microvolt = <1130000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_PLAY>;
+			label = "play";
+			press-threshold-microvolt = <624000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+	dummy_codec: dummy-codec {
+		compatible = "rockchip,dummy-codec";
+		#sound-dai-cells = <0>;
+	};
+
+	leds {
+		status = "okay";
+		compatible = "gpio-leds";
+
+		red-led {
+			gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+			label = "redled";
+			default-state = "off";
+			linux,default-trigger = "default-off";
+		};
+
+		green-led {
+			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+			label = "greenled";
+			default-state = "off";
+			linux,default-trigger = "default-off";
+		};
+
+		blue-led {
+			gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+			label = "blueled";
+			default-state = "on";
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	pcm_codec: pcm-codec {
+		compatible = "delta,dfbmcs320";
+		#sound-dai-cells = <0>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+	};
+
+	sound_pcm {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "dsp_b";
+		simple-audio-card,name = "rockchip,rk3308-pcm";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_2ch_0>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&pcm_codec>;
+		};
+	};
+
+	vad-sound {
+		status = "disabled";
+		compatible = "rockchip,multicodecs-card";
+		rockchip,card-name = "rockchip,rk3308-vad";
+		rockchip,codec-hp-det;
+		rockchip,cpu = <&i2s_8ch_2>;
+		rockchip,codec = <&acodec>, <&vad>;
+	};
+
+	vcc_sys: vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <4000000>;
+		regulator-max-microvolt = <4000000>;
+		regulator-always-on;
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		uart_rts_gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		pinctrl-0 = <&uart4_rts>;
+		pinctrl-1 = <&uart4_rts_gpio>;
+		BT,power_gpio    = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_WIFI>;
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_wake_host>;
+		wifi_chip_type = "rtl8723ds";
+		WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+		status = "okay";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	rk816: pmic@1a {
+		status = "okay";
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "rk816-clkout1", "rk816-clkout2";
+		extcon = <&u2phy>;
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc5-supply = <&vcc_io>;
+		vcc6-supply = <&vcc_sys>;
+
+		pwrkey {
+			status = "okay";
+		};
+
+		gpio {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = <3400 3625 3685 3697 3718 3735 3748
+				     3760 3774 3788 3802 3816 3834 3853
+				     3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <5000>;
+			design_qmax = <5200>;
+			bat_res = <100>;
+			max_input_current = <2000>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3400>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <80>;
+			monitor_sec = <5>;
+			virtual_power = <1>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
+		regulators {
+			vdd_core: DCDC_REG1{
+				regulator-name = "vdd_core";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <1>;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v8_codec: LDO_REG1 {
+				regulator-name = "vcc_1v8_codec";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vccio_sdio: vcc_1v8: LDO_REG2 {
+				regulator-name = "vcc_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vccio_3v3: LDO_REG5 {
+				regulator-name = "vccio_3v3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+};
+
+&acodec {
+	status = "okay";
+	rockchip,no-deep-low-power;
+	rockchip,no-hp-det;
+	rockchip,loopback-grp = <1>;
+	pa-drv-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
+	rockchip,delay-pa-drv-ms = <5>;
+	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+	/* ADC5-8 for 4ch capture, loopback to ADC3-4 */
+	rockchip,adc-grps-route = <2 3 1 0>;
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_core>;
+};
+
+&cpu0_opp_table {
+	opp-1200000000 {
+		status = "okay";
+	};
+};
+
+&dmc {
+	center-supply = <&vdd_log>;
+	status = "okay";
+};
+
+&fiq_debugger {
+	status = "okay";
+};
+
+&i2s_2ch_0 {
+	status = "okay";
+	#sound-dai-cells = <0>;
+};
+
+&i2s_8ch_2 {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio0-supply = <&vcc_io>;
+	vccio1-supply = <&vcc_io>;
+	vccio2-supply = <&vcc_io>;
+	vccio3-supply = <&vcc_io>;
+	vccio4-supply = <&vccio_sdio>;
+	vccio5-supply = <&vcc_io>;
+};
+
+&nandc {
+	status = "okay";
+};
+
+&pinctrl {
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wireless-wlan {
+		wifi_wake_host: wifi-wake-host {
+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&ramoops_mem {
+	reg = <0x0 0x30000 0x0 0x20000>;
+};
+
+&ramoops {
+	record-size = <0x0 0x00000>;
+	console-size = <0x0 0x20000>;
+};
+
+&rockchip_suspend {
+	rockchip,sleep-mode-config = <
+		(0
+		| RKPM_ARMOFF
+		| RKPM_PMU_HW_PLLS_PD
+		| RKPM_DBG_FSM_SOUT
+		)
+	>;
+
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc_1v8>;
+};
+
+&sdio {
+	max-frequency = <110000000>;
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sfc {
+	status = "okay";
+};
+
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+	u2phy_otg: otg-port {
+		status = "okay";
+	};
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_xfer &uart4_cts>;
+	status = "okay";
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&vad {
+	status = "disabled";
+	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,det-channel = <0>;
+	rockchip,mode = <1>;
+	rockchip,buffer-time-ms = <500>;
+	#sound-dai-cells = <0>;
+};

From 93949fe6367974824ad4caf2718e89f34caafd94 Mon Sep 17 00:00:00 2001
From: Sun ChuanHu <aaron.sun@rock-chips.com>
Date: Mon, 20 Aug 2018 19:07:44 +0800
Subject: [PATCH 1121/1852] ARM: dts: rockchip:
 rk3308-voice-module-amic-mainboard-v10-aarch32 change always open mic group
 to 5-8 from 3-6

Change-Id: Iad70296828ddfd271c9bc1879a1269d555f490d9
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
---
 .../dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts    | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
index 770d4e91bd2b2..f7d21cc7e6d0b 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-voice-module-amic-mainboard-v10-aarch32.dts
@@ -14,8 +14,8 @@
 };
 
 &acodec {
-	/* The grp1/2 (ADC3-6) keeps enabled always for VAD */
-	rockchip,en-always-grps = <1 2>;
+	/* The grp2/3 (ADC5-8) keeps enabled always for VAD */
+	rockchip,en-always-grps = <2 3>;
 };
 
 &bluetooth_sound {

From 38dd072c42c01bb2bf1d1597ba8e17ebd5d5212d Mon Sep 17 00:00:00 2001
From: Lei Chen <lei.chen@rock-chips.com>
Date: Thu, 16 Aug 2018 09:57:24 +0800
Subject: [PATCH 1122/1852] arm: dts: rk3128h-box-avb: add sdmmc_det for sdmmc
 pinctrl

This modification is to solve the problem that the SD card
is inserted after starting up, and the hot plug fails because
the det pin is initialized to GPIO

Change-Id: Id0d88259f7b30a75c07d7c2980563fc0d4148449
Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box-avb.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/rk3128h-box-avb.dts b/arch/arm/boot/dts/rk3128h-box-avb.dts
index 97e4cddf0e6d5..a480ba5134179 100644
--- a/arch/arm/boot/dts/rk3128h-box-avb.dts
+++ b/arch/arm/boot/dts/rk3128h-box-avb.dts
@@ -52,6 +52,14 @@
 	};
 };
 
+&pinctrl {
+	sdmmc {
+		sdmmc_det: sdmmc-det {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+		};
+	};
+};
+
 &secure_memory {
 	/*
 	 * enable like this:
@@ -59,3 +67,7 @@
 	 */
 	reg = <0x80000000 0x8000000>;
 };
+
+&sdmmc {
+	pinctrl-0 = <&sdmmc_pwr &sdmmc_clk &sdmmc_cmd &sdmmc_bus4 &sdmmc_det>;
+};

From e69931a81ec642c81f1853ee1ff3127567038c40 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 13 Aug 2018 17:35:18 +0800
Subject: [PATCH 1123/1852] media: rockchip: isp1: support dvp camera

Change-Id: If04dce4118f8b2ec90168c9286e8357619712820
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/rkisp1.c | 66 ++++++++++++++++---
 1 file changed, 57 insertions(+), 9 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 8d64c82aa7118..20e8267112547 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -554,30 +554,78 @@ static const struct ispsd_in_fmt rkisp1_isp_input_formats[] = {
 		.bayer_pat	= RAW_GRBG,
 		.bus_width	= 8,
 	}, {
-		.mbus_code	= MEDIA_BUS_FMT_YUYV8_1X16,
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
 		.fmt_type	= FMT_YUV,
 		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
 		.yuv_seq	= CIF_ISP_ACQ_PROP_YCBYCR,
-		.bus_width	= 16,
+		.bus_width	= 8,
 	}, {
-		.mbus_code	= MEDIA_BUS_FMT_YVYU8_1X16,
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
 		.fmt_type	= FMT_YUV,
 		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
 		.yuv_seq	= CIF_ISP_ACQ_PROP_YCRYCB,
-		.bus_width	= 16,
+		.bus_width	= 8,
 	}, {
-		.mbus_code	= MEDIA_BUS_FMT_UYVY8_1X16,
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
 		.fmt_type	= FMT_YUV,
 		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
 		.yuv_seq	= CIF_ISP_ACQ_PROP_CBYCRY,
-		.bus_width	= 16,
+		.bus_width	= 8,
 	}, {
-		.mbus_code	= MEDIA_BUS_FMT_VYUY8_1X16,
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
 		.fmt_type	= FMT_YUV,
 		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
 		.yuv_seq	= CIF_ISP_ACQ_PROP_CRYCBY,
-		.bus_width	= 16,
-	},
+		.bus_width	= 8,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV10_2X10,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_YCBYCR,
+		.bus_width	= 10,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU10_2X10,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_YCRYCB,
+		.bus_width	= 10,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY10_2X10,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_CBYCRY,
+		.bus_width	= 10,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY10_2X10,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_CRYCBY,
+		.bus_width	= 10,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV12_2X12,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_YCBYCR,
+		.bus_width	= 12,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU12_2X12,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_YCRYCB,
+		.bus_width	= 12,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY12_2X12,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_CBYCRY,
+		.bus_width	= 12,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY12_2X12,
+		.fmt_type	= FMT_YUV,
+		.mipi_dt	= CIF_CSI2_DT_YUV422_8b,
+		.yuv_seq	= CIF_ISP_ACQ_PROP_CRYCBY,
+		.bus_width	= 12,
+	}
 };
 
 static const struct ispsd_out_fmt rkisp1_isp_output_formats[] = {

From f88e0bbf30ab1528a8fe10c482c7baa1b8c1e523 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 20 Aug 2018 12:32:36 +0800
Subject: [PATCH 1124/1852] media: rockchip: isp1: update isp clock adjustment
 table

Change-Id: I5c799d0e1dc62819d2f77f0287904a2c7c1d4c1d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/dev.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 97d49322de178..2670285b9671d 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -509,15 +509,13 @@ static const char * const rk3399_isp_clks[] = {
 };
 
 /* isp clock adjustment table (MHz) */
-/* TODO: test on rk3288 */
 static const unsigned int rk3288_isp_clk_rate[] = {
-	300, 400, 600
+	384, 500, 594
 };
 
 /* isp clock adjustment table (MHz) */
-/* TODO: test on rk3326 */
 static const unsigned int rk3326_isp_clk_rate[] = {
-	300, 400, 600
+	300, 347, 400, 520, 600
 };
 
 /* isp clock adjustment table (MHz) */

From fa4818722bf7ca1f9a475ba340f5e2cb6c5c38ad Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Tue, 21 Aug 2018 11:34:39 +0800
Subject: [PATCH 1125/1852] arm64: dts: rockchip: rk3399-box: Add cec pinctrl

Only box enable cec function by default.

Change-Id: Iec1c67a3570b123feb60ba12fdcee6336e791357
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-box.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
index 8dc6e78eac646..9a8db8feb1c94 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
@@ -188,6 +188,11 @@
 	status = "okay";
 };
 
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>;
+};
+
 &sdmmc {
 	clock-frequency = <100000000>;
 	clock-freq-min-max = <100000 100000000>;

From dfeb51f040aa410f1a32c5cc6cb8233e870fe151 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Wed, 15 Aug 2018 15:26:07 +0800
Subject: [PATCH 1126/1852] arm64: dts: rockchip: rk3399: don't enable hdmi_cec
 pin by default at soc dtsi

Fix pin conflicts when gpio4c7 is used for hdmi_cec and edp_hpd. CEC is an
optional function for HDMI. Thus the hdmi_cec pin should be specified
in the board .dts.

Without this patch we see below pin conflict when both hdmi and edp enabled.

[    0.969331] rockchip-pinctrl pinctrl: pin gpio4-23 already requested by
ff940000.hdmi; cannot claim for ff970000.edp
[    0.969350] rockchip-pinctrl pinctrl: pin-151 (ff970000.edp) status -22
[    0.969361] rockchip-pinctrl pinctrl: could not request pin 151 (gpio4-23)
from group edp-hpd on device rockchip-pinctrl
[    0.969371] rockchip-dp ff970000.edp: Error applying setting,
reverse things back

Change-Id: Id3e9d7fadb6a4cfd65827be9c4b55336406995f7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 36fbafe89e19d..0e3d7c9da3eec 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1980,7 +1980,7 @@
 		compatible = "rockchip,rk3399-dw-hdmi";
 		reg = <0x0 0xff940000 0x0 0x20000>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>;
+		pinctrl-0 = <&hdmi_i2c_xfer>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru PCLK_HDMI_CTRL>,
 			 <&cru SCLK_HDMI_SFR>,

From 6e1ace325343fb89740d4fb2c263a31456d4fede Mon Sep 17 00:00:00 2001
From: Woody Lin <woody_lin@htc.com>
Date: Wed, 31 May 2017 16:19:31 +0800
Subject: [PATCH 1127/1852] ANDROID: arm64: setup: Increase COMMAND_LINE_SIZE
 to 4096 bytes

With features AVB / dm-verity enabled, cmdline content is about to
exceed previous maximum 2048 bytes. Increase the cmdline buffer size
(COMMAND_LINE_SIZE) to 4096 bytes for other features to use.

Bug: 62188243
Bug: 36339395
Change-Id: Ib0ad43b1d4596cfd965a659ffc7953f4ef221aec
Signed-off-by: Woody Lin <woody_lin@htc.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
 commit 532fc475a103cc9968827c1cba851fe2b3100aba)
---
 arch/arm64/include/uapi/asm/setup.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/include/uapi/asm/setup.h b/arch/arm64/include/uapi/asm/setup.h
index 9cf2e46fbbdfe..7474c813d5ab0 100644
--- a/arch/arm64/include/uapi/asm/setup.h
+++ b/arch/arm64/include/uapi/asm/setup.h
@@ -21,6 +21,6 @@
 
 #include <linux/types.h>
 
-#define COMMAND_LINE_SIZE	2048
+#define COMMAND_LINE_SIZE	4096
 
 #endif

From b7c79c2b067002419f008d6acb7f59225c535997 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 20 Aug 2018 14:28:48 +0800
Subject: [PATCH 1128/1852] ANDROID: ARM: setup: Increase COMMAND_LINE_SIZE to
 4096 bytes

With features AVB / dm-verity enabled, cmdline content is about to
exceed previous maximum 2048 bytes. Increase the cmdline buffer size
(COMMAND_LINE_SIZE) to 4096 bytes for other features to use.

Change-Id: I73baf92e5dce1a341d523b1a976d387e794b3998
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/include/uapi/asm/setup.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/uapi/asm/setup.h b/arch/arm/include/uapi/asm/setup.h
index b4d1bea21a2d2..ebe54c5963ae5 100644
--- a/arch/arm/include/uapi/asm/setup.h
+++ b/arch/arm/include/uapi/asm/setup.h
@@ -16,7 +16,7 @@
 
 #include <linux/types.h>
 
-#define COMMAND_LINE_SIZE 2048
+#define COMMAND_LINE_SIZE 4096
 
 /* The list ends with an ATAG_NONE node. */
 #define ATAG_NONE	0x00000000

From e2437335c39d4e442f770e30fd8c612421a4f062 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 20 Aug 2018 19:38:38 +0800
Subject: [PATCH 1129/1852] rk: init/main.c: support print long kernel command
 line

With features AVB / dm-verity enabled, cmdline content is about to
exceed previous maximum 2048 bytes. printk can not support long line
exceed LOG_LINE_MAX which less than 1024. So loop printk until all
content are printed in init/main.c.

Change-Id: I4c40b5302d82122b93161fe30082f5abcfcad069
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 init/main.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/init/main.c b/init/main.c
index db6b6cbb846bf..ad8ed67e7f4d4 100644
--- a/init/main.c
+++ b/init/main.c
@@ -534,7 +534,23 @@ asmlinkage __visible void __init start_kernel(void)
 	build_all_zonelists(NULL, NULL);
 	page_alloc_init();
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	{
+		const char *s = boot_command_line;
+		const char *e = &boot_command_line[strlen(boot_command_line)];
+		int n =
+		    pr_notice("Kernel command line: %s\n", boot_command_line);
+		n -= strlen("Kernel command line: ");
+		s += n;
+		/* command line maybe too long to print one time */
+		while (n > 0 && s < e) {
+			n = pr_cont("%s\n", s);
+			s += n;
+		}
+	}
+#else
 	pr_notice("Kernel command line: %s\n", boot_command_line);
+#endif
 	parse_early_param();
 	after_dashes = parse_args("Booting kernel",
 				  static_command_line, __start___param,

From b7708713716b6678c03ed1f8c3f009eef6b6ed68 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 15 Aug 2018 10:25:27 +0800
Subject: [PATCH 1130/1852] arm64: dts: rockchip: Remove initial rate of npll
 for px30

As npll rate may be changed when enable vopl in uboot, so we can't
change npll rate in kernel on px30.

Change-Id: If62da5bb77cdd411a550b2dc6250d654134474e3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 12b302a2c3604..c67d27b947288 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1008,9 +1008,6 @@
 		rockchip,boost = <&cpu_boost>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
-
-		assigned-clocks = <&cru PLL_NPLL>;
-		assigned-clock-rates = <1188000000>;
 	};
 
 	cpu_boost: cpu-boost@ff2b8000 {

From e13a11123e33b8dfab37e524cdd1c85e69dcb602 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 15 Aug 2018 15:06:35 +0800
Subject: [PATCH 1131/1852] clk: rockchip: px30: Remove npll from gpu parent
 clock on px30

NPLL should provide clock for vopl dclk on px30, and its rate will be
changed according to vopl dclk rate, so GPU can't use npll as parent
on px30.

Change-Id: Ib2c8c57020405bcd14070dcd7bc71cbfe18230e3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 0d72d5495aa7a..5d9118c0a0fda 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -148,7 +148,8 @@ PNAME(mux_usb480m_p)		= { "xin24m", "usb480m_phy", "clk_rtc32k_pmu" };
 PNAME(mux_armclk_p)		= { "apll_core", "gpll_core" };
 PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr" };
 PNAME(mux_ddrstdby_p)		= { "clk_ddrphy1x", "clk_stdby_2wrap" };
-PNAME(mux_4plls_p)		= { "gpll", "dummy_cpll", "usb480m", "npll" };
+PNAME(mux_gpll_dmycpll_usb480m_npll_p)		= { "gpll", "dummy_cpll", "usb480m", "npll" };
+PNAME(mux_gpll_dmycpll_usb480m_dmynpll_p)	= { "gpll", "dummy_cpll", "usb480m", "dummy_npll" };
 PNAME(mux_cpll_npll_p)		= { "cpll", "npll" };
 PNAME(mux_npll_cpll_p)		= { "npll", "cpll" };
 PNAME(mux_gpll_cpll_p)		= { "gpll", "dummy_cpll" };
@@ -311,9 +312,6 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 			PX30_CLKGATE_CON(17), 4, GFLAGS),
 
 	/* PD_GPU */
-	COMPOSITE(0, "clk_gpu_src", mux_4plls_p, 0,
-			PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS,
-			PX30_CLKGATE_CON(0), 8, GFLAGS),
 	GATE(SCLK_GPU, "clk_gpu", "clk_gpu_src", 0,
 			PX30_CLKGATE_CON(0), 10, GFLAGS),
 	COMPOSITE_NOMUX(0, "aclk_gpu", "clk_gpu", CLK_IGNORE_UNUSED,
@@ -911,6 +909,18 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 			PX30_CLKGATE_CON(8), 3, GFLAGS),
 };
 
+static struct rockchip_clk_branch px30_gpu_src_clk[] __initdata = {
+	COMPOSITE(0, "clk_gpu_src", mux_gpll_dmycpll_usb480m_dmynpll_p, 0,
+			PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS,
+			PX30_CLKGATE_CON(0), 8, GFLAGS),
+};
+
+static struct rockchip_clk_branch rk3326_gpu_src_clk[] __initdata = {
+	COMPOSITE(0, "clk_gpu_src", mux_gpll_dmycpll_usb480m_npll_p, 0,
+			PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS,
+			PX30_CLKGATE_CON(0), 8, GFLAGS),
+};
+
 static struct rockchip_clk_branch px30_clk_pmu_branches[] __initdata = {
 	/*
 	 * Clock-Architecture Diagram 2
@@ -1058,6 +1068,12 @@ static void __init px30_clk_init(struct device_node *np)
 				   PX30_GRF_SOC_STATUS0);
 	rockchip_clk_register_branches(ctx, px30_clk_branches,
 				       ARRAY_SIZE(px30_clk_branches));
+	if (of_machine_is_compatible("rockchip,px30"))
+		rockchip_clk_register_branches(ctx, px30_gpu_src_clk,
+				       ARRAY_SIZE(px30_gpu_src_clk));
+	else
+		rockchip_clk_register_branches(ctx, rk3326_gpu_src_clk,
+				       ARRAY_SIZE(rk3326_gpu_src_clk));
 
 	rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
 				     mux_armclk_p, ARRAY_SIZE(mux_armclk_p),

From b75bcfdff76a3e23407d5d2aa1dd7d7559f054dc Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 15 Aug 2018 15:29:07 +0800
Subject: [PATCH 1132/1852] clk: rockchip: px30: Let npll only provide clock
 for vopl and gpu

As npll rate may be changed according to vopl dclk rate on px30.

Change-Id: I4abc042b49ee06436ba5d69dc8adfa9460da37f7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 5d9118c0a0fda..58bc65c72423e 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -153,11 +153,11 @@ PNAME(mux_gpll_dmycpll_usb480m_dmynpll_p)	= { "gpll", "dummy_cpll", "usb480m", "
 PNAME(mux_cpll_npll_p)		= { "cpll", "npll" };
 PNAME(mux_npll_cpll_p)		= { "npll", "cpll" };
 PNAME(mux_gpll_cpll_p)		= { "gpll", "dummy_cpll" };
-PNAME(mux_gpll_npll_p)		= { "gpll", "npll" };
+PNAME(mux_gpll_npll_p)		= { "gpll", "dummy_npll" };
 PNAME(mux_gpll_xin24m_p)		= { "gpll", "xin24m"};
-PNAME(mux_gpll_cpll_npll_p)		= { "gpll", "dummy_cpll", "npll" };
-PNAME(mux_gpll_cpll_npll_xin24m_p)	= { "gpll", "dummy_cpll", "npll", "xin24m" };
-PNAME(mux_gpll_xin24m_npll_p)		= { "gpll", "xin24m", "npll"};
+PNAME(mux_gpll_cpll_npll_p)		= { "gpll", "dummy_cpll", "dummy_npll" };
+PNAME(mux_gpll_cpll_npll_xin24m_p)	= { "gpll", "dummy_cpll", "dummy_npll", "xin24m" };
+PNAME(mux_gpll_xin24m_npll_p)		= { "gpll", "xin24m", "dummy_npll"};
 PNAME(mux_pdm_p)		= { "clk_pdm_src", "clk_pdm_frac" };
 PNAME(mux_i2s0_tx_p)		= { "clk_i2s0_tx_src", "clk_i2s0_tx_frac", "mclk_i2s0_tx_in", "xin12m"};
 PNAME(mux_i2s0_rx_p)		= { "clk_i2s0_rx_src", "clk_i2s0_rx_frac", "mclk_i2s0_rx_in", "xin12m"};
@@ -169,13 +169,13 @@ PNAME(mux_i2s1_out_p)		= { "clk_i2s1", "xin12m"};
 PNAME(mux_i2s2_out_p)		= { "clk_i2s2", "xin12m"};
 PNAME(mux_i2s0_tx_rx_p)		= { "clk_i2s0_tx_mux", "clk_i2s0_rx_mux"};
 PNAME(mux_i2s0_rx_tx_p)		= { "clk_i2s0_rx_mux", "clk_i2s0_tx_mux"};
-PNAME(mux_uart_src_p)		= { "gpll", "xin24m", "usb480m", "npll" };
+PNAME(mux_uart_src_p)		= { "gpll", "xin24m", "usb480m", "dummy_npll" };
 PNAME(mux_uart1_p)		= { "clk_uart1_src", "clk_uart1_np5", "clk_uart1_frac" };
 PNAME(mux_uart2_p)		= { "clk_uart2_src", "clk_uart2_np5", "clk_uart2_frac" };
 PNAME(mux_uart3_p)		= { "clk_uart3_src", "clk_uart3_np5", "clk_uart3_frac" };
 PNAME(mux_uart4_p)		= { "clk_uart4_src", "clk_uart4_np5", "clk_uart4_frac" };
 PNAME(mux_uart5_p)		= { "clk_uart5_src", "clk_uart5_np5", "clk_uart5_frac" };
-PNAME(mux_cif_out_p)		= { "xin24m", "dummy_cpll", "npll", "usb480m" };
+PNAME(mux_cif_out_p)		= { "xin24m", "dummy_cpll", "dummy_npll", "usb480m" };
 PNAME(mux_dclk_vopb_p)		= { "dclk_vopb_src", "dclk_vopb_frac", "xin24m" };
 PNAME(mux_dclk_vopl_p)		= { "dclk_vopl_src", "dclk_vopl_frac", "xin24m" };
 PNAME(mux_nandc_p)		= { "clk_nandc_div", "clk_nandc_div50" };

From 9450563ef427b5ef511ce84493191ba50d80bdfd Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 15 Aug 2018 15:36:16 +0800
Subject: [PATCH 1133/1852] clk: rockchip: px30: Add support to set parent rate
 for vopl dclk

Change-Id: I208471f938b1795273c4f33ac35b82d667a2b312
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 58bc65c72423e..9b340f5926cda 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -429,7 +429,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 			&px30_dclk_vopb_fracmux, 0),
 	GATE(DCLK_VOPB, "dclk_vopb", "dclk_vopb_mux", CLK_SET_RATE_PARENT,
 			PX30_CLKGATE_CON(2), 4, GFLAGS),
-	COMPOSITE(0, "dclk_vopl_src", mux_npll_cpll_p, 0,
+	COMPOSITE(0, "dclk_vopl_src", mux_npll_cpll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
 			PX30_CLKSEL_CON(8), 11, 1, MFLAGS, 0, 8, DFLAGS,
 			PX30_CLKGATE_CON(2), 6, GFLAGS),
 	COMPOSITE_FRACMUX(0, "dclk_vopl_frac", "dclk_vopl_src", CLK_SET_RATE_PARENT,

From db48ed00f844f90994e2a59d67e26ac833184d4b Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 2 Aug 2018 14:21:35 +0800
Subject: [PATCH 1134/1852] arm64: dts: rockchip: rk3308: Add pvtm configure
 for cpu

Change-Id: I5d109f8718756fd2388147e44bf1c7af87212d7e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 47 ++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 6a301a19ec52f..4f90abd091a11 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -101,6 +101,25 @@
 		nvmem-cells = <&cpu_leakage>;
 		nvmem-cell-names = "leakage";
 
+		rockchip,pvtm-voltage-sel = <
+			0        54000   0
+			54001    56000   1
+			56001    58000   2
+			58001    60000   3
+			60001    62000   4
+			62001    64000   5
+			64001    99999   6
+		>;
+		rockchip,pvtm-freq = <408000>;
+		rockchip,pvtm-volt = <1025000>;
+		rockchip,pvtm-ch = <0 0>;
+		rockchip,pvtm-sample-time = <1000>;
+		rockchip,pvtm-number = <10>;
+		rockchip,pvtm-error = <1000>;
+		rockchip,pvtm-ref-temp = <35>;
+		rockchip,pvtm-temp-prop = <15 37>;
+		rockchip,thermal-zone = "soc-thermal";
+
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
 			opp-microvolt = <950000 950000 1340000>;
@@ -115,22 +134,50 @@
 		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
 			opp-microvolt = <1025000 1025000 1340000>;
+			opp-microvolt-L0 = <1025000 1025000 1340000>;
+			opp-microvolt-L1 = <1000000 1000000 1340000>;
+			opp-microvolt-L2 = <975000 975000 1340000>;
+			opp-microvolt-L3 = <975000 975000 1340000>;
+			opp-microvolt-L4 = <950000 950000 1340000>;
+			opp-microvolt-L5 = <950000 950000 1340000>;
+			opp-microvolt-L6 = <950000 950000 1340000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
 			opp-microvolt = <1125000 1125000 1340000>;
+			opp-microvolt-L0 = <1125000 1125000 1340000>;
+			opp-microvolt-L1 = <1100000 1100000 1340000>;
+			opp-microvolt-L2 = <1075000 1075000 1340000>;
+			opp-microvolt-L3 = <1075000 1075000 1340000>;
+			opp-microvolt-L4 = <1050000 1050000 1340000>;
+			opp-microvolt-L5 = <1050000 1050000 1340000>;
+			opp-microvolt-L6 = <1025000 1025000 1340000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-1200000000 {
 			opp-hz = /bits/ 64 <1200000000>;
 			opp-microvolt = <1250000 1250000 1340000>;
+			opp-microvolt-L0 = <1250000 1250000 1340000>;
+			opp-microvolt-L1 = <1225000 1225000 1340000>;
+			opp-microvolt-L2 = <1200000 1200000 1340000>;
+			opp-microvolt-L3 = <1175000 1175000 1340000>;
+			opp-microvolt-L4 = <1150000 1150000 1340000>;
+			opp-microvolt-L5 = <1125000 1125000 1340000>;
+			opp-microvolt-L6 = <1100000 1100000 1340000>;
 			clock-latency-ns = <40000>;
 			status = "disabled";
 		};
 		opp-1296000000 {
 			opp-hz = /bits/ 64 <1296000000>;
 			opp-microvolt = <1300000 1300000 1340000>;
+			opp-microvolt-L0 = <1300000 1300000 1340000>;
+			opp-microvolt-L1 = <1275000 1275000 1340000>;
+			opp-microvolt-L2 = <1250000 1250000 1340000>;
+			opp-microvolt-L3 = <1225000 1225000 1340000>;
+			opp-microvolt-L4 = <1200000 1200000 1340000>;
+			opp-microvolt-L5 = <1175000 1175000 1340000>;
+			opp-microvolt-L6 = <1150000 1150000 1340000>;
 			clock-latency-ns = <40000>;
 			status = "disabled";
 		};

From 52615bbfc1511b0a24a66222bf86b5e3d4a78b93 Mon Sep 17 00:00:00 2001
From: "cherry.chen" <cherry.chen@rock-chips.com>
Date: Mon, 20 Aug 2018 15:14:05 +0800
Subject: [PATCH 1135/1852] arm: configs: enable aloop driver for rk3308
 aarch32

Because of resample, some speaker processing(such as EQ/DRC)
cannot be done after dmix in alsa. Enable aloop driver make them
can be handled between virtual hardware to the real hardware.

Change-Id: I05b92632359fabd5c1dd8b051295ad4d17dddc8c
Signed-off-by: Cherry Chen <cherry.chen@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 3 +--
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 820a518ae3996..186a224d77d61 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -137,7 +137,6 @@ CONFIG_DEVFREQ_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_WATCHDOG=y
 CONFIG_DW_WATCHDOG=y
-CONFIG_MFD_CORE=y
 CONFIG_MFD_RK808=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_GPIO=y
@@ -147,7 +146,7 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_HRTIMER=y
 # CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ALOOP=y
 # CONFIG_SND_SPI is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_ROCKCHIP=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 0ea6147348a8f..b480660d23bea 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -142,7 +142,7 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_HRTIMER=y
 # CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ALOOP=y
 # CONFIG_SND_SPI is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_ROCKCHIP=y

From ef7bd4e21ea5d3544f45b9ca0bd0eb395702df0e Mon Sep 17 00:00:00 2001
From: "cherry.chen" <cherry.chen@rock-chips.com>
Date: Wed, 8 Aug 2018 18:03:58 +0800
Subject: [PATCH 1136/1852] arm64: configs: rk3308_linux_defconfig: enable
 aloop driver

Because of resample, some speaker processing(such as EQ/DRC)
cannot be done after dmix in alsa. Enable aloop driver make them
can be handled between virtual hardware to the real hardware.

Change-Id: I86242f67d89fb38361a7f8d6d8cf4294cdaba685
Signed-off-by: Cherry Chen <cherry.chen@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index e5eac3b5654e9..97026304ba863 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -154,7 +154,7 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_HRTIMER=y
 # CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ALOOP=y
 # CONFIG_SND_SPI is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_ROCKCHIP=y

From b95762d96e2f871da754623b5152c4f2f57823b9 Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Thu, 30 Mar 2017 13:49:21 +0800
Subject: [PATCH 1137/1852] drm/rockchip: cdn_dp: support audio info frame

Change-Id: I867b79dce73aa7c82dd06e6ed6e2963e118f1129
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/cdn-dp-core.c | 51 ++++++++++++++++++++++++++
 drivers/gpu/drm/rockchip/cdn-dp-reg.c  | 18 +++++++++
 drivers/gpu/drm/rockchip/cdn-dp-reg.h  | 14 +++++++
 3 files changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index f33841a3c1db7..e483bd941d892 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -1051,6 +1051,53 @@ static int cdn_dp_parse_dt(struct cdn_dp_device *dp)
 	return 0;
 }
 
+struct dp_sdp {
+	struct edp_sdp_header sdp_header;
+	u8 db[28];
+} __packed;
+
+static int cdn_dp_setup_audio_infoframe(struct cdn_dp_device *dp)
+{
+	struct dp_sdp infoframe_sdp;
+	struct hdmi_audio_infoframe frame;
+	u8 buffer[14];
+	ssize_t err;
+
+	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
+	memset(&infoframe_sdp, 0, sizeof(infoframe_sdp));
+	infoframe_sdp.sdp_header.HB0 = 0;
+	infoframe_sdp.sdp_header.HB1 = HDMI_INFOFRAME_TYPE_AUDIO;
+	infoframe_sdp.sdp_header.HB2 = 0x1b;
+	infoframe_sdp.sdp_header.HB3 = 0x48;
+
+	err = hdmi_audio_infoframe_init(&frame);
+	if (err < 0) {
+		DRM_DEV_ERROR(dp->dev, "Failed to setup audio infoframe: %zd\n",
+			      err);
+		return err;
+	}
+
+	frame.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
+	frame.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
+	frame.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
+	frame.channels = 0;
+
+	err = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
+	if (err < 0) {
+		DRM_DEV_ERROR(dp->dev, "Failed to pack audio infoframe: %zd\n",
+			      err);
+		return err;
+	}
+
+	memcpy(&infoframe_sdp.db[0], &buffer[HDMI_INFOFRAME_HEADER_SIZE],
+	       sizeof(buffer) - HDMI_INFOFRAME_HEADER_SIZE);
+
+	cdn_dp_infoframe_set(dp, 0, (u8 *)&infoframe_sdp,
+			     sizeof(infoframe_sdp), 0x84);
+
+	return 0;
+}
+
 static int cdn_dp_audio_hw_params(struct device *dev,  void *data,
 				  struct hdmi_codec_daifmt *daifmt,
 				  struct hdmi_codec_params *params)
@@ -1082,6 +1129,10 @@ static int cdn_dp_audio_hw_params(struct device *dev,  void *data,
 		goto out;
 	}
 
+	ret = cdn_dp_setup_audio_infoframe(dp);
+	if (ret)
+		goto out;
+
 	ret = cdn_dp_audio_config(dp, &audio);
 	if (!ret)
 		dp->audio_info = audio;
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index d70bd3d8872b5..c0395a871d5e2 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -1032,6 +1032,24 @@ static void cdn_dp_audio_config_spdif(struct cdn_dp_device *dp)
 	clk_set_rate(dp->spdif_clk, CDN_DP_SPDIF_CLK);
 }
 
+void cdn_dp_infoframe_set(struct cdn_dp_device *dp, int entry_id,
+			  u8 *buf, u32 len, int type)
+{
+	unsigned int idx;
+	u32 *packet = (u32 *)buf;
+	u32 length = len / 4;
+
+	for (idx = 0; idx < length; idx++)
+		writel(cpu_to_le32(*packet++), dp->regs + SOURCE_PIF_DATA_WR);
+
+	writel(entry_id, dp->regs + SOURCE_PIF_WR_ADDR);
+	writel(HOST_WR, dp->regs + SOURCE_PIF_WR_REQ);
+	writel(ACTIVE_IDLE_TYPE(1) | TYPE_VALID |
+	       PACKET_TYPE(type) | PKT_ALLOC_ADDRESS(entry_id),
+	       dp->regs + SOURCE_PIF_PKT_ALLOC_REG);
+	writel(PKT_ALLOC_WR_EN, dp->regs + SOURCE_PIF_PKT_ALLOC_WR_EN);
+}
+
 int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio)
 {
 	int ret;
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
index a558624e4a4da..effc2ef34171a 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h
@@ -457,6 +457,18 @@
 #define SPDIF_JITTER_THRSH(x)			(((x) & 0xff) << 3)
 #define SPDIF_JITTER_AVG_WIN(x)			((x) & 0x7)
 
+/* SOURCE_PIF_WR_REQ */
+#define HOST_WR			BIT(0)
+
+/* SOURCE_PIF_PKT_ALLOC_REG */
+#define ACTIVE_IDLE_TYPE(x)	(((x) & 0x1) << 17)
+#define TYPE_VALID		BIT(16)
+#define PACKET_TYPE(x)		(((x) & 0xff) << 8)
+#define PKT_ALLOC_ADDRESS(x)	(((x) & 0xf) << 0)
+
+/* SOURCE_PIF_PKT_ALLOC_WR_EN */
+#define PKT_ALLOC_WR_EN		BIT(0)
+
 /* Reference cycles when using lane clock as reference */
 #define LANE_REF_CYC				0xf000
 
@@ -556,6 +568,8 @@ int cdn_dp_config_video(struct cdn_dp_device *dp);
 int cdn_dp_audio_stop(struct cdn_dp_device *dp, struct audio_info *audio);
 int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable);
 int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio);
+void cdn_dp_infoframe_set(struct cdn_dp_device *dp, int entry_id, u8 *buf,
+			  u32 len, int type);
 int cdn_dp_hdcp_tx_configuration(struct cdn_dp_device *dp, int tx_mode,
 						 bool active);
 int cdn_dp_hdcp_tx_status_req(struct cdn_dp_device *dp, uint16_t *tx_status);

From 127daaa933f237921517d7e617251255af91277d Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Wed, 22 Aug 2018 14:31:05 +0800
Subject: [PATCH 1138/1852] soc: rockchip: cpuinfo: init soc id for
 rk3308/rk3308b

RK3308B is a enhanced variant of RK3308 with more flexible
iomux and peripherals(for example, RK3308B has 12 pwms, but
RK3308 has 4).

The CHIP_ID is stored in GRF_CHIP_ID:

RK3308:  0xcea (3306 in decimal)
RK3308B: 0x3308

Change-Id: I8f675656c012bdedb43043f5dbeea8bd11ea4ded
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
 drivers/soc/rockchip/rockchip-cpuinfo.c | 19 +++++++++++++++++--
 include/linux/rockchip/cpu.h            | 17 +++++++++++++++++
 2 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/rockchip/rockchip-cpuinfo.c b/drivers/soc/rockchip/rockchip-cpuinfo.c
index a9ded8e8a2639..faea58a09eed8 100644
--- a/drivers/soc/rockchip/rockchip-cpuinfo.c
+++ b/drivers/soc/rockchip/rockchip-cpuinfo.c
@@ -88,7 +88,6 @@ static struct platform_driver rockchip_cpuinfo_driver = {
 	},
 };
 
-#ifdef CONFIG_ARM
 static void rk3288_init(void)
 {
 	void __iomem *base;
@@ -124,6 +123,21 @@ static void rk3126_init(void)
 	}
 }
 
+static void rk3308_init(void)
+{
+	void __iomem *base;
+
+	rockchip_soc_id = ROCKCHIP_SOC_RK3308;
+#define RK3308_GRF_PHYS		0xFF000000
+#define RK3308_GRF_CHIP_ID	0x800
+	base = ioremap(RK3308_GRF_PHYS, SZ_4K);
+	if (base) {
+		if (readl_relaxed(base + RK3308_GRF_CHIP_ID) == 0x3308)
+			rockchip_soc_id = ROCKCHIP_SOC_RK3308B;
+		iounmap(base);
+	}
+}
+
 static int __init rockchip_soc_id_init(void)
 {
 	if (cpu_is_rk3288()) {
@@ -133,12 +147,13 @@ static int __init rockchip_soc_id_init(void)
 			rockchip_soc_id = ROCKCHIP_SOC_RK3128;
 		else
 			rk3126_init();
+	} else if (cpu_is_rk3308()) {
+		rk3308_init();
 	}
 
 	return 0;
 }
 pure_initcall(rockchip_soc_id_init);
-#endif
 
 static int __init rockchip_cpuinfo_init(void)
 {
diff --git a/include/linux/rockchip/cpu.h b/include/linux/rockchip/cpu.h
index 7eb0827222279..554299351875e 100644
--- a/include/linux/rockchip/cpu.h
+++ b/include/linux/rockchip/cpu.h
@@ -54,6 +54,7 @@ static inline void rockchip_set_cpu_version(unsigned long ver)
 #define ROCKCHIP_CPU_MASK       0xffff0000
 #define ROCKCHIP_CPU_RK312X     0x31260000
 #define ROCKCHIP_CPU_RK3288     0x32880000
+#define ROCKCHIP_CPU_RK3308	0x33080000
 
 #ifdef CONFIG_CPU_RK312X
 static inline bool cpu_is_rk312x(void)
@@ -81,6 +82,18 @@ static inline bool cpu_is_rk3288(void)
 static inline bool cpu_is_rk3288(void) { return false; }
 #endif
 
+#ifdef CONFIG_CPU_RK3308
+static inline bool cpu_is_rk3308(void)
+{
+	if (rockchip_soc_id)
+		return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RK3308;
+
+	return of_machine_is_compatible("rockchip,rk3308");
+}
+#else
+static inline bool cpu_is_rk3308(void) { return false; }
+#endif
+
 #define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
 #define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
 #define ROCKCHIP_SOC_RK3126B    (ROCKCHIP_CPU_RK312X | 0x10)
@@ -88,6 +101,8 @@ static inline bool cpu_is_rk3288(void) { return false; }
 #define ROCKCHIP_SOC_RK3128     (ROCKCHIP_CPU_RK312X | 0x01)
 #define ROCKCHIP_SOC_RK3288     (ROCKCHIP_CPU_RK3288 | 0x00)
 #define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
+#define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
+#define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
 
 #define ROCKCHIP_SOC(id, ID) \
 static inline bool soc_is_##id(void) \
@@ -103,5 +118,7 @@ ROCKCHIP_SOC(rk3126c, RK3126C)
 ROCKCHIP_SOC(rk3128, RK3128)
 ROCKCHIP_SOC(rk3288, RK3288)
 ROCKCHIP_SOC(rk3288w, RK3288W)
+ROCKCHIP_SOC(rk3308, RK3308)
+ROCKCHIP_SOC(rk3308b, RK3308B)
 
 #endif

From ea70019912e664d3e58aa97243b52c980a68d3aa Mon Sep 17 00:00:00 2001
From: Guochun Huang <hero.huang@rock-chips.com>
Date: Mon, 20 Aug 2018 16:07:09 +0800
Subject: [PATCH 1139/1852] arm64: dts: rockchip: rk3399-tve1030g: prevent some
 lp4 scale frequency

lpddr4 scale frequency when display on, cause the display shake and
vop POST_BUF_EMPTY

Change-Id: Idff6fe039e93a6a938e05524d7dd5ce0d9c72dee
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
index ffb32e289b837..ebf7a8f238778 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g.dts
@@ -220,11 +220,11 @@
 		SYS_STATUS_NORMAL       800000
 		SYS_STATUS_REBOOT       400000
 		SYS_STATUS_SUSPEND      400000
-		SYS_STATUS_VIDEO_1080P  400000
+		SYS_STATUS_VIDEO_1080P  800000
 		SYS_STATUS_VIDEO_4K     800000
 		SYS_STATUS_VIDEO_4K_10B 800000
 		SYS_STATUS_PERFORMANCE  800000
-		SYS_STATUS_BOOST        400000
+		SYS_STATUS_BOOST        800000
 		SYS_STATUS_DUALVIEW     800000
 		SYS_STATUS_ISP          800000
 	>;

From 0ce91486c8f4ff713c61cc0eff300597d301736e Mon Sep 17 00:00:00 2001
From: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date: Thu, 23 Aug 2018 09:19:20 +0800
Subject: [PATCH 1140/1852] arm64: dts: rockchip: rk3326-863-lp3-v10: add
 rkisp1 and gc0312/gc2145

Change-Id: I013f735174a081310c5f6cb771fcb59f74df6f3c
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
---
 .../boot/dts/rockchip/rk3326-863-lp3-v10.dtsi | 69 ++++++++++++++++++-
 1 file changed, 67 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
index 2a4d3ae45f171..87e6b17de53c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
@@ -156,11 +156,76 @@
 	};
 };
 
-&cif {
+&i2c2 {
+	status = "okay";
+
+	gc0312@21 {
+		status = "okay";
+		compatible = "galaxycore,gc0312";
+		reg = <0x21>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc2v8_dvp>;
+		dovdd-supply = <&vcc1v8_dvp>;
+		dvdd-supply = <&vcc1v8_dvp>;
+
+		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc0312_out: endpoint {
+				remote-endpoint = <&dvp_in_fcam>;
+			};
+		};
+	};
+
+	gc2145@3c {
+		status = "okay";
+		compatible = "galaxycore,gc2145";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc2v8_dvp>;
+		dovdd-supply = <&vcc1v8_dvp>;
+		dvdd-supply = <&vcc1v8_dvp>;
+
+		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc2145_out: endpoint {
+				remote-endpoint = <&dvp_in_bcam>;
+			};
+		};
+	};
+};
+
+&rkisp1 {
 	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&cif_clkout_m0 &dvp_d0d1_m0 &dvp_d2d9_m0 &dvp_d10d11_m0>;
+
+	ports {
+		port@0 {
+			dvp_in_fcam: endpoint@0 {
+				remote-endpoint = <&gc0312_out>;
+			};
+
+			dvp_in_bcam: endpoint@1 {
+				remote-endpoint = <&gc2145_out>;
+			};
+		};
+	};
 };
 
-&cif_sensor {
+&isp_mmu {
 	status = "okay";
 };
 

From 30478f9ce87f6e2699a51bfd4e7f9a9675634274 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Thu, 23 Aug 2018 14:03:36 +0800
Subject: [PATCH 1141/1852] ASoC: rk3308_codec: Fix the starting glitches
 during ADCs enabled always

We need to skip resetting the digital part of ADCs during
keepping the ADCs enabled always.

Change-Id: I075d605b48a9216a84c7269ebff32f1f150ec5de
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 0913d548888cc..ee82781d5ba40 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -629,10 +629,17 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 	return true;
 }
 
-/*
- * Maybe there are rk3308_codec_get_adc_path_state() and
- * rk3308_codec_set_adc_path_state() in future.
- */
+static int rk3308_codec_get_adc_path_state(struct rk3308_codec_priv *rk3308)
+{
+	return rk3308->adc_path_state;
+}
+
+static void rk3308_codec_set_adc_path_state(struct rk3308_codec_priv *rk3308,
+					    int state)
+{
+	rk3308->adc_path_state = state;
+}
+
 static int rk3308_codec_get_dac_path_state(struct rk3308_codec_priv *rk3308)
 {
 	return rk3308->dac_path_state;
@@ -691,6 +698,9 @@ static int rk3308_codec_reset(struct snd_soc_codec *codec)
 
 static int rk3308_codec_adc_dig_reset(struct rk3308_codec_priv *rk3308)
 {
+	if (rk3308_codec_get_adc_path_state(rk3308) == PATH_BUSY)
+		goto out;
+
 	regmap_update_bits(rk3308->regmap, RK3308_GLB_CON,
 			   RK3308_ADC_DIG_WORK,
 			   RK3308_ADC_DIG_RESET);
@@ -699,6 +709,7 @@ static int rk3308_codec_adc_dig_reset(struct rk3308_codec_priv *rk3308)
 			   RK3308_ADC_DIG_WORK,
 			   RK3308_ADC_DIG_WORK);
 
+out:
 	return 0;
 }
 
@@ -2829,6 +2840,8 @@ static void rk3308_codec_update_adcs_status(struct rk3308_codec_priv *rk3308,
 			rk3308->skip_grps[en_always_grp] = 1;
 		}
 	}
+
+	rk3308_codec_set_adc_path_state(rk3308, state);
 }
 
 static int rk3308_hw_params(struct snd_pcm_substream *substream,
@@ -2957,12 +2970,13 @@ static void rk3308_pcm_shutdown(struct snd_pcm_substream *substream,
 		rk3308_codec_set_dac_path_state(rk3308, PATH_IDLE);
 	} else {
 		rk3308_codec_close_capture(rk3308);
-		if (!has_en_always_grps(rk3308))
+		if (!has_en_always_grps(rk3308)) {
 			rk3308_codec_adc_mclk_disable(rk3308);
+			rk3308_codec_update_adcs_status(rk3308, PATH_IDLE);
+		}
 
 		regcache_cache_only(rk3308->regmap, false);
 		regcache_sync(rk3308->regmap);
-		rk3308_codec_update_adcs_status(rk3308, PATH_IDLE);
 	}
 }
 

From 31759e0b7847e61a03aab1d61a012ddd24bc61ce Mon Sep 17 00:00:00 2001
From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Tue, 21 Aug 2018 17:11:39 +0800
Subject: [PATCH 1142/1852] spi: rockchip: init rxconf and txconf to 0

Dmac pl330 adds src_interlace_size of dma_slave_config rxconf.
If rxconf is local variable, src_interlace_size may be non zero,
which causes wrong process.

Fixes: ddd2e87ad41e ("dmaengine: pl330: add support for interlace size config")
Change-Id: Ib301c7ca4a1175bafd0631cb4deea4baa60eebc7
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---
 drivers/spi/spi-rockchip.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 215200d5786ce..94ce14e9d3f3a 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -439,6 +439,9 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
 	struct dma_slave_config rxconf, txconf;
 	struct dma_async_tx_descriptor *rxdesc, *txdesc;
 
+	memset(&rxconf, 0, sizeof(struct dma_slave_config));
+	memset(&txconf, 0, sizeof(struct dma_slave_config));
+
 	spin_lock_irqsave(&rs->lock, flags);
 	rs->state &= ~RXBUSY;
 	rs->state &= ~TXBUSY;

From e2ee0b4666f7df69573ee5b1b9ce6129ce2a1eb5 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Wed, 22 Aug 2018 19:53:18 +0800
Subject: [PATCH 1143/1852] ASoC: rockchip: vad: refine buffer time

This patch fix hw_params fail if the buffer time is too large,
anyway, we use the smaller one between vad->buffer_time and
the max buffer time.

Change-Id: I111bb835f281d717d0b5a4be7bc6b321387f31d5
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index dae05c9ddf24d..f28de21aa3257 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -490,7 +490,7 @@ static int rockchip_vad_hw_params(struct snd_pcm_substream *substream,
 {
 	struct snd_soc_codec *codec = dai->codec;
 	struct rockchip_vad *vad = snd_soc_codec_get_drvdata(codec);
-	unsigned int val = 0, mask = 0, frame_bytes;
+	unsigned int val = 0, mask = 0, frame_bytes, buf_time;
 
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 		return 0;
@@ -535,7 +535,15 @@ static int rockchip_vad_hw_params(struct snd_pcm_substream *substream,
 	if (vad->buffer_time) {
 		frame_bytes = snd_pcm_format_size(params_format(params),
 						  params_channels(params));
-		val = params_rate(params) * vad->buffer_time / 1000;
+
+		buf_time = VAD_SRAM_BUFFER_END - vad->memphy + 0x8;
+		buf_time *= 1000;
+		buf_time /= (frame_bytes * params_rate(params));
+		if (buf_time < vad->buffer_time)
+			dev_info(vad->dev, "max buffer time: %u ms.\n", buf_time);
+		buf_time = min(buf_time, vad->buffer_time);
+
+		val = params_rate(params) * buf_time / 1000;
 		val *= frame_bytes;
 		val += vad->memphy;
 		val -= 0x8;

From 1d386f63b482c6e2e40b197af30c664e79a26e7b Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Tue, 14 Aug 2018 09:25:36 +0800
Subject: [PATCH 1144/1852] drm/bridge: analogix_dp: support video BIST
 generation

The video BIST function of the DP_TX generates arbitrary video formats
internally according to the specified format configuration and selection.
These BIST video formats simplify DP_TX debugging.

Change-Id: Ia019c8f40fdd4ebea3e5250be8e2c15540481a6c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../bindings/display/bridge/analogix_dp.txt   |  2 +
 .../drm/bridge/analogix/analogix_dp_core.c    | 11 +++
 .../drm/bridge/analogix/analogix_dp_core.h    |  5 ++
 .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 66 +++++++++++++++++
 .../gpu/drm/bridge/analogix/analogix_dp_reg.h | 74 +++++++++++++++++++
 5 files changed, 158 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
index 4a0f4f7682ad4..797c6ded735d8 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -23,6 +23,8 @@ Required properties for dp-controller:
 		from general PHY binding: Should be "dp".
 
 Optional properties for dp-controller:
+	-analogix,video-bist-enable:
+		Enable video bist pattern for DP_TX debugging.
 	-force-hpd:
 		Indicate driver need force hpd when hpd detect failed, this
 		is used for some eDP screen which don't have hpd signal.
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a76b13151fe25..4ff96f6a06e5f 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -908,6 +908,7 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 
 static void analogix_dp_commit(struct analogix_dp_device *dp)
 {
+	struct video_info *video = &dp->video_info;
 	int ret;
 
 	/* Keep the panel disabled while we configure video */
@@ -928,6 +929,11 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 	analogix_dp_enable_enhanced_mode(dp, 1);
 
 	analogix_dp_init_video(dp);
+	analogix_dp_set_video_format(dp);
+
+	if (video->video_bist_enable)
+		analogix_dp_video_bist_enable(dp);
+
 	ret = analogix_dp_config_video(dp);
 	if (ret)
 		dev_err(dp->dev, "unable to config video\n");
@@ -1131,6 +1137,8 @@ static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
 	struct device_node *dp_node = dp->dev->of_node;
 	int vic;
 
+	drm_mode_copy(&video->mode, mode);
+
 	/* Input video interlaces & hsync pol & vsync pol */
 	video->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
 	video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
@@ -1269,6 +1277,9 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
 		break;
 	}
 
+	video_info->video_bist_enable =
+		of_property_read_bool(dp_node, "analogix,video-bist-enable");
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 82f321455c192..e0f02621ae759 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -136,6 +136,7 @@ enum dp_irq_type {
 
 struct video_info {
 	char *name;
+	struct drm_display_mode mode;
 
 	bool h_sync_polarity;
 	bool v_sync_polarity;
@@ -148,6 +149,8 @@ struct video_info {
 
 	int max_link_rate;
 	enum link_lane_count_type max_lane_count;
+
+	bool video_bist_enable;
 };
 
 struct link_train {
@@ -279,4 +282,6 @@ int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
+void analogix_dp_set_video_format(struct analogix_dp_device *dp);
+void analogix_dp_video_bist_enable(struct analogix_dp_device *dp);
 #endif /* _ANALOGIX_DP_CORE_H */
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index f2cd96ec818c8..81f5ec2bbaee3 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1326,3 +1326,69 @@ void analogix_dp_disable_scrambling(struct analogix_dp_device *dp)
 	reg |= SCRAMBLING_DISABLE;
 	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
 }
+
+void analogix_dp_set_video_format(struct analogix_dp_device *dp)
+{
+	struct video_info *video = &dp->video_info;
+	const struct drm_display_mode *mode = &video->mode;
+	unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
+
+	hsw = mode->hsync_end - mode->hsync_start;
+	hfp = mode->hsync_start - mode->hdisplay;
+	hbp = mode->htotal - mode->hsync_end;
+	vsw = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+
+	/* Set Video Format Parameters */
+	writel(TOTAL_LINE_CFG_L(mode->vtotal),
+	       dp->reg_base + ANALOGIX_DP_TOTAL_LINE_CFG_L);
+	writel(TOTAL_LINE_CFG_H(mode->vtotal >> 8),
+	       dp->reg_base + ANALOGIX_DP_TOTAL_LINE_CFG_H);
+	writel(ACTIVE_LINE_CFG_L(mode->vdisplay),
+	       dp->reg_base + ANALOGIX_DP_ACTIVE_LINE_CFG_L);
+	writel(ACTIVE_LINE_CFG_H(mode->vdisplay >> 8),
+	       dp->reg_base + ANALOGIX_DP_ACTIVE_LINE_CFG_H);
+	writel(V_F_PORCH_CFG(vfp),
+	       dp->reg_base + ANALOGIX_DP_V_F_PORCH_CFG);
+	writel(V_SYNC_WIDTH_CFG(vsw),
+	       dp->reg_base + ANALOGIX_DP_V_SYNC_WIDTH_CFG);
+	writel(V_B_PORCH_CFG(vbp),
+	       dp->reg_base + ANALOGIX_DP_V_B_PORCH_CFG);
+	writel(TOTAL_PIXEL_CFG_L(mode->htotal),
+	       dp->reg_base + ANALOGIX_DP_TOTAL_PIXEL_CFG_L);
+	writel(TOTAL_PIXEL_CFG_H(mode->htotal >> 8),
+	       dp->reg_base + ANALOGIX_DP_TOTAL_PIXEL_CFG_H);
+	writel(ACTIVE_PIXEL_CFG_L(mode->hdisplay),
+	       dp->reg_base + ANALOGIX_DP_ACTIVE_PIXEL_CFG_L);
+	writel(ACTIVE_PIXEL_CFG_H(mode->hdisplay >> 8),
+	       dp->reg_base + ANALOGIX_DP_ACTIVE_PIXEL_CFG_H);
+	writel(H_F_PORCH_CFG_L(hfp),
+	       dp->reg_base + ANALOGIX_DP_H_F_PORCH_CFG_L);
+	writel(H_F_PORCH_CFG_H(hfp >> 8),
+	       dp->reg_base + ANALOGIX_DP_H_F_PORCH_CFG_H);
+	writel(H_SYNC_CFG_L(hsw),
+	       dp->reg_base + ANALOGIX_DP_H_SYNC_CFG_L);
+	writel(H_SYNC_CFG_H(hsw >> 8),
+	       dp->reg_base + ANALOGIX_DP_H_SYNC_CFG_H);
+	writel(H_B_PORCH_CFG_L(hbp),
+	       dp->reg_base + ANALOGIX_DP_H_B_PORCH_CFG_L);
+	writel(H_B_PORCH_CFG_H(hbp >> 8),
+	       dp->reg_base + ANALOGIX_DP_H_B_PORCH_CFG_H);
+}
+
+void analogix_dp_video_bist_enable(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Enable Video BIST */
+	writel(BIST_EN, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_4);
+
+	/*
+	 * Note that if BIST_EN is set to 1, F_SEL must be cleared to 0
+	 * although video format information comes from registers set by user.
+	 */
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~FORMAT_SEL;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+}
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 371c4218c6c9c..bbb312fc8094c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -18,9 +18,27 @@
 #define ANALOGIX_DP_VIDEO_CTL_1			0x20
 #define ANALOGIX_DP_VIDEO_CTL_2			0x24
 #define ANALOGIX_DP_VIDEO_CTL_3			0x28
+#define ANALOGIX_DP_VIDEO_CTL_4			0x2C
 
 #define ANALOGIX_DP_VIDEO_CTL_8			0x3C
 #define ANALOGIX_DP_VIDEO_CTL_10		0x44
+#define ANALOGIX_DP_TOTAL_LINE_CFG_L		0x48
+#define ANALOGIX_DP_TOTAL_LINE_CFG_H		0x4C
+#define ANALOGIX_DP_ACTIVE_LINE_CFG_L		0x50
+#define ANALOGIX_DP_ACTIVE_LINE_CFG_H		0x54
+#define ANALOGIX_DP_V_F_PORCH_CFG		0x58
+#define ANALOGIX_DP_V_SYNC_WIDTH_CFG		0x5C
+#define ANALOGIX_DP_V_B_PORCH_CFG		0x60
+#define ANALOGIX_DP_TOTAL_PIXEL_CFG_L		0x64
+#define ANALOGIX_DP_TOTAL_PIXEL_CFG_H		0x68
+#define ANALOGIX_DP_ACTIVE_PIXEL_CFG_L		0x6C
+#define ANALOGIX_DP_ACTIVE_PIXEL_CFG_H		0x70
+#define ANALOGIX_DP_H_F_PORCH_CFG_L		0x74
+#define ANALOGIX_DP_H_F_PORCH_CFG_H		0x78
+#define ANALOGIX_DP_H_SYNC_CFG_L		0x7C
+#define ANALOGIX_DP_H_SYNC_CFG_H		0x80
+#define ANALOGIX_DP_H_B_PORCH_CFG_L		0x84
+#define ANALOGIX_DP_H_B_PORCH_CFG_H		0x88
 
 #define ANALOGIX_DP_PLL_REG_1			0xfc
 #define ANALOGIX_DP_PLL_REG_2			0x9e4
@@ -152,6 +170,11 @@
 #define VID_CHK_UPDATE_TYPE_1			(0x1 << 4)
 #define VID_CHK_UPDATE_TYPE_0			(0x0 << 4)
 
+/* ANALOGIX_DP_VIDEO_CTL_4 */
+#define BIST_EN					(0x1 << 3)
+#define BIST_WIDTH(x)				(((x) & 0x1) << 2)
+#define BIST_TYPE(x)				(((x) & 0x3) << 0)
+
 /* ANALOGIX_DP_VIDEO_CTL_8 */
 #define VID_HRES_TH(x)				(((x) & 0xf) << 4)
 #define VID_VRES_TH(x)				(((x) & 0xf) << 0)
@@ -162,6 +185,57 @@
 #define VSYNC_POLARITY_CFG			(0x1 << 1)
 #define HSYNC_POLARITY_CFG			(0x1 << 0)
 
+/* ANALOGIX_DP_TOTAL_LINE_CFG_L */
+#define TOTAL_LINE_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_TOTAL_LINE_CFG_H */
+#define TOTAL_LINE_CFG_H(x)			(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_ACTIVE_LINE_CFG_L */
+#define ACTIVE_LINE_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_ACTIVE_LINE_CFG_H */
+#define ACTIVE_LINE_CFG_H(x)			(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_V_F_PORCH_CFG */
+#define V_F_PORCH_CFG(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_V_SYNC_WIDTH_CFG */
+#define V_SYNC_WIDTH_CFG(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_V_B_PORCH_CFG */
+#define V_B_PORCH_CFG(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_TOTAL_PIXEL_CFG_L */
+#define TOTAL_PIXEL_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_TOTAL_PIXEL_CFG_H */
+#define TOTAL_PIXEL_CFG_H(x)			(((x) & 0x3f) << 0)
+
+/* ANALOGIX_DP_ACTIVE_PIXEL_CFG_L */
+#define ACTIVE_PIXEL_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_ACTIVE_PIXEL_CFG_H */
+#define ACTIVE_PIXEL_CFG_H(x)			(((x) & 0x3f) << 0)
+
+/* ANALOGIX_DP_H_F_PORCH_CFG_L */
+#define H_F_PORCH_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_H_F_PORCH_CFG_H */
+#define H_F_PORCH_CFG_H(x)			(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_H_SYNC_CFG_L */
+#define H_SYNC_CFG_L(x)				(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_H_SYNC_CFG_H */
+#define H_SYNC_CFG_H(x)				(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_H_B_PORCH_CFG_L */
+#define H_B_PORCH_CFG_L(x)			(((x) & 0xff) << 0)
+
+/* ANALOGIX_DP_H_B_PORCH_CFG_H */
+#define H_B_PORCH_CFG_H(x)			(((x) & 0xf) << 0)
+
 /* ANALOGIX_DP_PLL_REG_1 */
 #define REF_CLK_24M				(0x1 << 0)
 #define REF_CLK_27M				(0x0 << 0)

From c78e9b5447ab0b5fa01873e5ad473b7263e6de6c Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 21 Aug 2018 20:48:32 +0800
Subject: [PATCH 1145/1852] rk: add scripts/resource_tool.c

From u-boot d1463f4aaddc ("tools: resource_tool: Use not stripped version").
Merge all C files to one resource_tool.c

Change-Id: I25fffb9a817c9e4e5260db3afca644cb8ba06a18
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/resource_tool.c | 1029 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 1029 insertions(+)
 create mode 100644 scripts/resource_tool.c

diff --git a/scripts/resource_tool.c b/scripts/resource_tool.c
new file mode 100644
index 0000000000000..3309b426e5f99
--- /dev/null
+++ b/scripts/resource_tool.c
@@ -0,0 +1,1029 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <errno.h>
+#include <memory.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/stat.h>
+#include <time.h>
+
+//#define DEBUG
+
+static bool g_debug =
+#ifdef DEBUG
+	true;
+#else
+	false;
+#endif //DEBUG
+
+#define LOGE(fmt, args...)                                                     \
+	fprintf(stderr, "E/%s(%d): " fmt "\n", __func__, __LINE__, ##args)
+#define LOGD(fmt, args...)                                                     \
+	do {                                                                   \
+    if (g_debug) \
+			fprintf(stderr, "D/%s(%d): " fmt "\n", __func__,       \
+				__LINE__, ##args);                             \
+} while (0)
+
+//sync with ./board/rockchip/rk30xx/rkloader.c #define FDT_PATH
+#define FDT_PATH                    "rk-kernel.dtb"
+#define DTD_SUBFIX                  ".dtb"
+
+#define DEFAULT_IMAGE_PATH          "resource.img"
+#define DEFAULT_UNPACK_DIR          "out"
+#define BLOCK_SIZE                  512
+
+#define RESOURCE_PTN_HDR_SIZE       1
+#define INDEX_TBL_ENTR_SIZE         1
+
+#define RESOURCE_PTN_VERSION        0
+#define INDEX_TBL_VERSION           0
+
+#define RESOURCE_PTN_HDR_MAGIC      "RSCE"
+typedef struct {
+	char magic[4];		//tag, "RSCE"
+	uint16_t resource_ptn_version;
+	uint16_t index_tbl_version;
+	uint8_t header_size;	//blocks, size of ptn header.
+	uint8_t tbl_offset;	//blocks, offset of index table.
+	uint8_t tbl_entry_size;	//blocks, size of index table's entry.
+	uint32_t tbl_entry_num;	//numbers of index table's entry.
+} resource_ptn_header;
+
+#define INDEX_TBL_ENTR_TAG          "ENTR"
+#define MAX_INDEX_ENTRY_PATH_LEN    256
+typedef struct {
+	char tag[4];		//tag, "ENTR"
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset;	//blocks, offset of resource content.
+	uint32_t content_size;	//bytes, size of resource content.
+} index_tbl_entry;
+
+#define OPT_VERBOSE         "--verbose"
+#define OPT_HELP            "--help"
+#define OPT_VERSION         "--version"
+#define OPT_PRINT           "--print"
+#define OPT_PACK            "--pack"
+#define OPT_UNPACK          "--unpack"
+#define OPT_TEST_LOAD       "--test_load"
+#define OPT_TEST_CHARGE     "--test_charge"
+#define OPT_IMAGE           "--image="
+#define OPT_ROOT            "--root="
+
+#define VERSION             "2014-5-31 14:43:42"
+
+typedef struct {
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset;	//blocks, offset of resource content.
+	uint32_t content_size;		//bytes, size of resource content.
+	void *load_addr;
+} resource_content;
+
+typedef struct {
+	int max_level;
+	int num;
+	int delay;
+	char prefix[MAX_INDEX_ENTRY_PATH_LEN];
+} anim_level_conf;
+
+#define DEF_CHARGE_DESC_PATH        "charge_anim_desc.txt"
+
+#define OPT_CHARGE_ANIM_DELAY       "delay="
+#define OPT_CHARGE_ANIM_LOOP_CUR    "only_current_level="
+#define OPT_CHARGE_ANIM_LEVELS      "levels="
+#define OPT_CHARGE_ANIM_LEVEL_CONF  "max_level="
+#define OPT_CHARGE_ANIM_LEVEL_NUM   "num="
+#define OPT_CHARGE_ANIM_LEVEL_PFX   "prefix="
+
+static char image_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static int fix_blocks(size_t size)
+{
+	return (size + BLOCK_SIZE - 1) / BLOCK_SIZE;
+}
+
+static const char *fix_path(const char *path)
+{
+	if (!memcmp(path, "./", 2)) {
+		return path + 2;
+	}
+	return path;
+}
+
+static uint16_t switch_short(uint16_t x)
+{
+	uint16_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p & 0xff) << 8;
+
+	return val;
+}
+
+static uint32_t switch_int(uint32_t x)
+{
+	uint32_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p++ & 0xff) << 8;
+	val |= (*p++ & 0xff) << 16;
+	val |= (*p & 0xff) << 24;
+
+	return val;
+}
+
+static void fix_header(resource_ptn_header *header)
+{
+	//switch for be.
+	header->resource_ptn_version =
+		switch_short(header->resource_ptn_version);
+	header->index_tbl_version = switch_short(header->index_tbl_version);
+	header->tbl_entry_num = switch_int(header->tbl_entry_num);
+}
+
+static void fix_entry(index_tbl_entry *entry)
+{
+	//switch for be.
+	entry->content_offset = switch_int(entry->content_offset);
+	entry->content_size = switch_int(entry->content_size);
+}
+
+static int inline get_ptn_offset(void)
+{
+	return 0;
+}
+
+static bool StorageWriteLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb+");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to seek %s to %d!", image_path, offset);
+		goto end;
+	}
+	if (!fwrite(data, blocks * BLOCK_SIZE, 1, file)) {
+		LOGE("Failed to write %s!", image_path);
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool StorageReadLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		goto end;
+	}
+	if (!fread(data, blocks * BLOCK_SIZE, 1, file)) {
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool write_data(int offset_block, void *data, size_t len)
+{
+	bool ret = false;
+	if (!data)
+		goto end;
+	int blocks = len / BLOCK_SIZE;
+	if (blocks && !StorageWriteLba(offset_block, data, blocks)) {
+		goto end;
+	}
+	int left = len % BLOCK_SIZE;
+	if (left) {
+		char buf[BLOCK_SIZE] = "\0";
+		memcpy(buf, data + blocks * BLOCK_SIZE, left);
+		if (!StorageWriteLba(offset_block + blocks, buf, 1))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+/**********************load test************************/
+static int load_file(const char *file_path, int offset_block, int blocks);
+
+static int test_load(int argc, char **argv)
+{
+	if (argc < 1) {
+		LOGE("Nothing to load!");
+		return -1;
+	}
+	const char *file_path;
+	int offset_block = 0;
+	int blocks = 0;
+	if (argc > 0) {
+		file_path = (const char *)fix_path(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		offset_block = atoi(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		blocks = atoi(argv[0]);
+	}
+	return load_file(file_path, offset_block, blocks);
+}
+
+static void free_content(resource_content *content)
+{
+	if (content->load_addr) {
+		free(content->load_addr);
+		content->load_addr = 0;
+	}
+}
+
+static void tests_dump_file(const char *path, void *data, int len)
+{
+	FILE *file = fopen(path, "wb");
+	if (!file)
+		return;
+	fwrite(data, len, 1, file);
+	fclose(file);
+}
+
+static bool load_content(resource_content *content)
+{
+	if (content->load_addr)
+		return true;
+	int blocks = fix_blocks(content->content_size);
+	content->load_addr = malloc(blocks * BLOCK_SIZE);
+	if (!content->load_addr)
+		return false;
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset,
+			    content->load_addr, blocks)) {
+		free_content(content);
+		return false;
+	}
+
+	tests_dump_file(content->path, content->load_addr,
+			content->content_size);
+	return true;
+}
+
+static bool load_content_data(resource_content *content, int offset_block,
+			      void *data, int blocks)
+{
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset +
+				    offset_block,
+			    data, blocks)) {
+		return false;
+	}
+	tests_dump_file(content->path, data, blocks * BLOCK_SIZE);
+	return true;
+}
+
+static bool get_entry(const char *file_path, index_tbl_entry *entry)
+{
+	bool ret = false;
+	char buf[BLOCK_SIZE];
+	resource_ptn_header header;
+	if (!StorageReadLba(get_ptn_offset(), buf, 1)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	//test on pc, switch for be.
+	fix_header(&header);
+
+	//TODO: support header_size & tbl_entry_size
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		//TODO: support tbl_entry_size
+		if (!StorageReadLba(get_ptn_offset() + header.header_size +
+					    i * header.tbl_entry_size,
+				    buf, 1)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(entry, buf, sizeof(*entry));
+
+		if (memcmp(entry->tag, INDEX_TBL_ENTR_TAG, sizeof(entry->tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+
+		if (!strncmp(entry->path, file_path, sizeof(entry->path)))
+			break;
+	}
+	if (i == header.tbl_entry_num) {
+		LOGE("Cannot find %s!", file_path);
+		goto end;
+	}
+	//test on pc, switch for be.
+	fix_entry(entry);
+
+	printf("Found entry:\n\tpath:%s\n\toffset:%d\tsize:%d\n",
+	       entry->path, entry->content_offset, entry->content_size);
+
+	ret = true;
+end:
+	return ret;
+}
+
+static bool get_content(resource_content *content)
+{
+	bool ret = false;
+	index_tbl_entry entry;
+	if (!get_entry(content->path, &entry))
+		goto end;
+	content->content_offset = entry.content_offset;
+	content->content_size = entry.content_size;
+	ret = true;
+end:
+	return ret;
+}
+
+static int load_file(const char *file_path, int offset_block, int blocks)
+{
+	printf("Try to load:%s", file_path);
+	if (blocks) {
+		printf(", offset block:%d, blocks:%d\n", offset_block, blocks);
+	} else {
+		printf("\n");
+	}
+	bool ret = false;
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", file_path);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!blocks) {
+		if (!load_content(&content)) {
+			goto end;
+		}
+	} else {
+		void *data = malloc(blocks * BLOCK_SIZE);
+		if (!data)
+			goto end;
+		if (!load_content_data(&content, offset_block, data, blocks)) {
+			goto end;
+		}
+	}
+	ret = true;
+end:
+	free_content(&content);
+	return ret;
+}
+
+/**********************load test end************************/
+/**********************anim test************************/
+
+static bool parse_level_conf(const char *arg, anim_level_conf *level_conf)
+{
+	memset(level_conf, 0, sizeof(anim_level_conf));
+	char *buf = NULL;
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_CONF);
+	if (buf) {
+		level_conf->max_level =
+			atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_CONF));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_CONF);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_NUM);
+	if (buf) {
+		level_conf->num = atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_NUM));
+		if (level_conf->num <= 0) {
+			return false;
+		}
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_NUM);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_DELAY);
+	if (buf) {
+		level_conf->delay = atoi(buf + strlen(OPT_CHARGE_ANIM_DELAY));
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_PFX);
+	if (buf) {
+		snprintf(level_conf->prefix, sizeof(level_conf->prefix),
+			 "%s", buf + strlen(OPT_CHARGE_ANIM_LEVEL_PFX));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_PFX);
+		return false;
+	}
+
+	LOGD("Found conf:\nmax_level:%d, num:%d, delay:%d, prefix:%s",
+	     level_conf->max_level, level_conf->num,
+	     level_conf->delay, level_conf->prefix);
+	return true;
+}
+
+static int test_charge(int argc, char **argv)
+{
+	const char *desc;
+	if (argc > 0) {
+		desc = argv[0];
+	} else {
+		desc = DEF_CHARGE_DESC_PATH;
+	}
+
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", desc);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!load_content(&content)) {
+		goto end;
+	}
+
+	char *buf = (char *)content.load_addr;
+	char *end = buf + content.content_size - 1;
+	*end = '\0';
+	LOGD("desc:\n%s", buf);
+
+	int pos = 0;
+	while (1) {
+		char *line = (char *)memchr(buf + pos, '\n', strlen(buf + pos));
+		if (!line)
+			break;
+		*line = '\0';
+		LOGD("splite:%s", buf + pos);
+		pos += (strlen(buf + pos) + 1);
+	}
+
+	int delay = 900;
+	int only_current_level = false;
+	anim_level_conf *level_confs = NULL;
+	int level_conf_pos = 0;
+	int level_conf_num = 0;
+
+	while (true) {
+		if (buf >= end)
+			break;
+		const char *arg = buf;
+		buf += (strlen(buf) + 1);
+
+		LOGD("parse arg:%s", arg);
+		if (!memcmp(arg, OPT_CHARGE_ANIM_LEVEL_CONF,
+			    strlen(OPT_CHARGE_ANIM_LEVEL_CONF))) {
+			if (!level_confs) {
+				LOGE("Found level conf before levels!");
+				goto end;
+			}
+			if (level_conf_pos >= level_conf_num) {
+				LOGE("Too many level confs!(%d >= %d)",
+				     level_conf_pos, level_conf_num);
+				goto end;
+			}
+			if (!parse_level_conf(arg,
+					      level_confs + level_conf_pos)) {
+				LOGE("Failed to parse level conf:%s", arg);
+				goto end;
+			}
+			level_conf_pos++;
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_DELAY,
+				   strlen(OPT_CHARGE_ANIM_DELAY))) {
+			delay = atoi(arg + strlen(OPT_CHARGE_ANIM_DELAY));
+			LOGD("Found delay:%d", delay);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LOOP_CUR,
+				   strlen(OPT_CHARGE_ANIM_LOOP_CUR))) {
+			only_current_level =
+				!memcmp(arg + strlen(OPT_CHARGE_ANIM_LOOP_CUR),
+					"true", 4);
+			LOGD("Found only_current_level:%d", only_current_level);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LEVELS,
+				   strlen(OPT_CHARGE_ANIM_LEVELS))) {
+			if (level_conf_num) {
+				goto end;
+			}
+			level_conf_num =
+				atoi(arg + strlen(OPT_CHARGE_ANIM_LEVELS));
+			if (!level_conf_num) {
+				goto end;
+			}
+			level_confs =
+			    (anim_level_conf *) malloc(level_conf_num *
+						       sizeof(anim_level_conf));
+			LOGD("Found levels:%d", level_conf_num);
+		} else {
+			LOGE("Unknown arg:%s", arg);
+			goto end;
+		}
+	}
+
+	if (level_conf_pos != level_conf_num || !level_conf_num) {
+		LOGE("Something wrong with level confs!");
+		goto end;
+	}
+
+	int i = 0, j = 0;
+	for (i = 0; i < level_conf_num; i++) {
+		if (!level_confs[i].delay) {
+			level_confs[i].delay = delay;
+		}
+		if (!level_confs[i].delay) {
+			LOGE("Missing delay in level conf:%d", i);
+			goto end;
+		}
+		for (j = 0; j < i; j++) {
+			if (level_confs[j].max_level ==
+			    level_confs[i].max_level) {
+				LOGE("Dup level conf:%d", i);
+				goto end;
+			}
+			if (level_confs[j].max_level > level_confs[i].max_level) {
+				anim_level_conf conf = level_confs[i];
+				memmove(level_confs + j + 1, level_confs + j,
+					(i - j) * sizeof(anim_level_conf));
+				level_confs[j] = conf;
+			}
+		}
+	}
+
+	printf("Parse anim desc(%s):\n", desc);
+	printf("only_current_level=%d\n", only_current_level);
+	printf("level conf:\n");
+	for (i = 0; i < level_conf_num; i++) {
+		printf("\tmax=%d, delay=%d, num=%d, prefix=%s\n",
+		       level_confs[i].max_level, level_confs[i].delay,
+		       level_confs[i].num, level_confs[i].prefix);
+	}
+
+end:
+	free_content(&content);
+	return 0;
+}
+
+/**********************anim test end************************/
+/**********************append file************************/
+
+static const char *PROG = NULL;
+static resource_ptn_header header;
+static bool just_print = false;
+static char root_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static void version(void)
+{
+	printf("%s (cjf@rock-chips.com)\t" VERSION "\n", PROG);
+}
+
+static void usage(void)
+{
+	printf("Usage: %s [options] [FILES]\n", PROG);
+	printf("Tools for Rockchip's resource image.\n");
+	version();
+	printf("Options:\n");
+	printf("\t" OPT_PACK "\t\t\tPack image from given files.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack given image to current dir.\n");
+	printf("\t" OPT_IMAGE "path" "\t\tSpecify input/output image path.\n");
+	printf("\t" OPT_PRINT "\t\t\tJust print informations.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_ROOT "path" "\t\tSpecify resources' root dir.\n");
+}
+
+static int pack_image(int file_num, const char **files);
+static int unpack_image(const char *unpack_dir);
+
+enum ACTION {
+	ACTION_PACK,
+	ACTION_UNPACK,
+	ACTION_TEST_LOAD,
+	ACTION_TEST_CHARGE,
+};
+
+int main(int argc, char **argv)
+{
+	PROG = fix_path(argv[0]);
+
+	enum ACTION action = ACTION_PACK;
+
+	argc--, argv++;
+	while (argc > 0 && argv[0][0] == '-') {
+		//it's a opt arg.
+		const char *arg = argv[0];
+		argc--, argv++;
+		if (!strcmp(OPT_VERBOSE, arg)) {
+			g_debug = true;
+		} else if (!strcmp(OPT_HELP, arg)) {
+			usage();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, arg)) {
+			version();
+			return 0;
+		} else if (!strcmp(OPT_PRINT, arg)) {
+			just_print = true;
+		} else if (!strcmp(OPT_PACK, arg)) {
+			action = ACTION_PACK;
+		} else if (!strcmp(OPT_UNPACK, arg)) {
+			action = ACTION_UNPACK;
+		} else if (!strcmp(OPT_TEST_LOAD, arg)) {
+			action = ACTION_TEST_LOAD;
+		} else if (!strcmp(OPT_TEST_CHARGE, arg)) {
+			action = ACTION_TEST_CHARGE;
+		} else if (!memcmp(OPT_IMAGE, arg, strlen(OPT_IMAGE))) {
+			snprintf(image_path, sizeof(image_path),
+				 "%s", arg + strlen(OPT_IMAGE));
+		} else if (!memcmp(OPT_ROOT, arg, strlen(OPT_ROOT))) {
+			snprintf(root_path, sizeof(root_path),
+				 "%s", arg + strlen(OPT_ROOT));
+		} else {
+			LOGE("Unknown opt:%s", arg);
+			usage();
+			return -1;
+		}
+	}
+
+	if (!image_path[0]) {
+		snprintf(image_path, sizeof(image_path), "%s",
+			 DEFAULT_IMAGE_PATH);
+	}
+
+	switch (action) {
+	case ACTION_PACK:
+		{
+			int file_num = argc;
+			const char **files = (const char **)argv;
+			if (!file_num) {
+				LOGE("No file to pack!");
+				return 0;
+			}
+			LOGD("try to pack %d files.", file_num);
+			return pack_image(file_num, files);
+		}
+	case ACTION_UNPACK:
+		{
+			return unpack_image(argc >
+					    0 ? argv[0] : DEFAULT_UNPACK_DIR);
+		}
+	case ACTION_TEST_LOAD:
+		{
+			return test_load(argc, argv);
+		}
+	case ACTION_TEST_CHARGE:
+		{
+			return test_charge(argc, argv);
+		}
+	}
+	//not reach here.
+	return -1;
+}
+
+/************unpack code****************/
+static bool mkdirs(char *path)
+{
+	char *tmp = path;
+	char *pos = NULL;
+	char buf[MAX_INDEX_ENTRY_PATH_LEN];
+	bool ret = true;
+	while ((pos = memchr(tmp, '/', strlen(tmp)))) {
+		strcpy(buf, path);
+		buf[pos - path] = '\0';
+		tmp = pos + 1;
+		LOGD("mkdir:%s", buf);
+		if (!mkdir(buf, 0755)) {
+			ret = false;
+		}
+	}
+	if (!ret)
+		LOGD("Failed to mkdir(%s)!", path);
+	return ret;
+}
+
+static bool dump_file(FILE *file, const char *unpack_dir, index_tbl_entry entry)
+{
+	LOGD("try to dump entry:%s", entry.path);
+	bool ret = false;
+	FILE *out_file = NULL;
+	long int pos = 0;
+	char path[MAX_INDEX_ENTRY_PATH_LEN * 2 + 1];
+	if (just_print) {
+		ret = true;
+		goto done;
+	}
+
+	pos = ftell(file);
+	snprintf(path, sizeof(path), "%s/%s", unpack_dir, entry.path);
+	mkdirs(path);
+	out_file = fopen(path, "wb");
+	if (!out_file) {
+		LOGE("Failed to create:%s", path);
+		goto end;
+	}
+	long int offset = entry.content_offset * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to read content:%s", entry.path);
+		goto end;
+	}
+	char buf[BLOCK_SIZE];
+	int n;
+	int len = entry.content_size;
+	while (len > 0) {
+		n = len > BLOCK_SIZE ? BLOCK_SIZE : len;
+		if (!fread(buf, n, 1, file)) {
+			LOGE("Failed to read content:%s", entry.path);
+			goto end;
+		}
+		if (!fwrite(buf, n, 1, out_file)) {
+			LOGE("Failed to write:%s", entry.path);
+			goto end;
+		}
+		len -= n;
+	}
+done:
+	ret = true;
+end:
+	if (out_file)
+		fclose(out_file);
+	if (pos)
+		fseek(file, pos, SEEK_SET);
+	return ret;
+}
+
+static int unpack_image(const char *dir)
+{
+	FILE *image_file = NULL;
+	bool ret = false;
+	char unpack_dir[MAX_INDEX_ENTRY_PATH_LEN];
+	if (just_print)
+		dir = ".";
+	snprintf(unpack_dir, sizeof(unpack_dir), "%s", dir);
+	if (!strlen(unpack_dir)) {
+		goto end;
+	} else if (unpack_dir[strlen(unpack_dir) - 1] == '/') {
+		unpack_dir[strlen(unpack_dir) - 1] = '\0';
+	}
+
+	mkdir(unpack_dir, 0755);
+	image_file = fopen(image_path, "rb");
+	char buf[BLOCK_SIZE];
+	if (!image_file) {
+		LOGE("Failed to open:%s", image_path);
+		goto end;
+	}
+	if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	//switch for be.
+	fix_header(&header);
+
+	printf("Dump header:\n");
+	printf("partition version:%d.%d\n",
+	       header.resource_ptn_version, header.index_tbl_version);
+	printf("header size:%d\n", header.header_size);
+	printf("index tbl:\n\toffset:%d\tentry size:%d\tentry num:%d\n",
+	       header.tbl_offset, header.tbl_entry_size, header.tbl_entry_num);
+
+	//TODO: support header_size & tbl_entry_size
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	printf("Dump Index table:\n");
+	index_tbl_entry entry;
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		//TODO: support tbl_entry_size
+		if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(&entry, buf, sizeof(entry));
+
+		if (memcmp(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+		//switch for be.
+		fix_entry(&entry);
+
+		printf("entry(%d):\n\tpath:%s\n\toffset:%d\tsize:%d\n",
+		       i, entry.path, entry.content_offset, entry.content_size);
+		if (!dump_file(image_file, unpack_dir, entry)) {
+			goto end;
+		}
+	}
+	printf("Unack %s to %s successed!\n", image_path, unpack_dir);
+	ret = true;
+end:
+	if (image_file)
+		fclose(image_file);
+	return ret ? 0 : -1;
+}
+
+/************unpack code end****************/
+/************pack code****************/
+
+static inline size_t get_file_size(const char *path)
+{
+	LOGD("try to get size(%s)...", path);
+	struct stat st;
+	if (stat(path, &st) < 0) {
+		LOGE("Failed to get size:%s", path);
+		return -1;
+	}
+	LOGD("path:%s, size:%ld", path, st.st_size);
+	return st.st_size;
+}
+
+static int write_file(int offset_block, const char *src_path)
+{
+	LOGD("try to write file(%s) to offset:%d...", src_path, offset_block);
+	char buf[BLOCK_SIZE];
+	int ret = -1;
+	size_t file_size;
+	int blocks;
+	FILE *src_file = fopen(src_path, "rb");
+	if (!src_file) {
+		LOGE("Failed to open:%s", src_path);
+		goto end;
+	}
+
+	file_size = get_file_size(src_path);
+	if (file_size < 0) {
+		goto end;
+	}
+	blocks = fix_blocks(file_size);
+
+	int i;
+	for (i = 0; i < blocks; i++) {
+		memset(buf, 0, sizeof(buf));
+		if (!fread(buf, 1, BLOCK_SIZE, src_file)) {
+			LOGE("Failed to read:%s", src_path);
+			goto end;
+		}
+		if (!write_data(offset_block + i, buf, BLOCK_SIZE)) {
+			goto end;
+		}
+	}
+	ret = blocks;
+end:
+	if (src_file)
+		fclose(src_file);
+	return ret;
+}
+
+static bool write_header(const int file_num)
+{
+	LOGD("try to write header...");
+	memcpy(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic));
+	header.resource_ptn_version = RESOURCE_PTN_VERSION;
+	header.index_tbl_version = INDEX_TBL_VERSION;
+	header.header_size = RESOURCE_PTN_HDR_SIZE;
+	header.tbl_offset = header.header_size;
+	header.tbl_entry_size = INDEX_TBL_ENTR_SIZE;
+	header.tbl_entry_num = file_num;
+
+	//switch for le.
+	resource_ptn_header hdr = header;
+	fix_header(&hdr);
+	return write_data(0, &hdr, sizeof(hdr));
+}
+
+static bool write_index_tbl(const int file_num, const char **files)
+{
+	LOGD("try to write index table...");
+	bool ret = false;
+	bool foundFdt = false;
+	int offset = header.header_size +
+		     header.tbl_entry_size * header.tbl_entry_num;
+	index_tbl_entry entry;
+	memcpy(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag));
+	int i;
+	for (i = 0; i < file_num; i++) {
+		size_t file_size = get_file_size(files[i]);
+		if (file_size < 0)
+			goto end;
+		entry.content_size = file_size;
+		entry.content_offset = offset;
+
+		if (write_file(offset, files[i]) < 0)
+			goto end;
+
+		LOGD("try to write index entry(%s)...", files[i]);
+
+		//switch for le.
+		fix_entry(&entry);
+		memset(entry.path, 0, sizeof(entry.path));
+		const char *path = files[i];
+		if (root_path[0]) {
+			if (!strncmp(path, root_path, strlen(root_path))) {
+				path += strlen(root_path);
+				if (path[0] == '/')
+					path++;
+			}
+		}
+		path = fix_path(path);
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX),
+			    DTD_SUBFIX)) {
+			if (!foundFdt) {
+				//use default path.
+				LOGD("mod fdt path:%s -> %s...", files[i],
+				     FDT_PATH);
+				path = FDT_PATH;
+				foundFdt = true;
+			}
+		}
+		snprintf(entry.path, sizeof(entry.path), "%s", path);
+		offset += fix_blocks(file_size);
+		if (!write_data(header.header_size + i * header.tbl_entry_size,
+				&entry, sizeof(entry)))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+static int pack_image(int file_num, const char **files)
+{
+	bool ret = false;
+	FILE *image_file = fopen(image_path, "wb");
+	if (!image_file) {
+		LOGE("Failed to create:%s", image_path);
+		goto end;
+	}
+	fclose(image_file);
+
+	//prepare files
+	int i = 0;
+	int pos = 0;
+	const char *tmp;
+	for (i = 0; i < file_num; i++) {
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX),
+			    DTD_SUBFIX)) {
+			//dtb files for kernel.
+			tmp = files[pos];
+			files[pos] = files[i];
+			files[i] = tmp;
+			pos++;
+		} else if (!strcmp(fix_path(image_path), fix_path(files[i]))) {
+			//not to pack image itself!
+			tmp = files[file_num - 1];
+			files[file_num - 1] = files[i];
+			files[i] = tmp;
+			file_num--;
+		}
+	}
+
+	if (!write_header(file_num)) {
+		LOGE("Failed to write header!");
+		goto end;
+	}
+	if (!write_index_tbl(file_num, files)) {
+		LOGE("Failed to write index table!");
+		goto end;
+	}
+	printf("Pack to %s successed!\n", image_path);
+	ret = true;
+end:
+	return ret ? 0 : -1;
+}
+
+/************pack code end****************/

From 8a4186125e59f096b89f4cfde5cdb536532e6023 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 22 Aug 2018 14:54:39 +0800
Subject: [PATCH 1146/1852] rk: add scripts/mkkrnlimg.c

From V20111117. Fixes for 64bit.

Change-Id: I31b0e9a7bd7dae1afec923409e8fc845c21a45c2
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/mkkrnlimg.c | 159 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 159 insertions(+)
 create mode 100644 scripts/mkkrnlimg.c

diff --git a/scripts/mkkrnlimg.c b/scripts/mkkrnlimg.c
new file mode 100644
index 0000000000000..a39d1a15fa1e4
--- /dev/null
+++ b/scripts/mkkrnlimg.c
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+//#define DEBUG
+#ifdef DEBUG
+#define PRINTF(fmt, ...) printf(fmt, ##__VA_ARGS__)
+#else
+static inline __attribute__ ((format(printf, 1, 2)))
+int PRINTF(const char *fmt, ...)
+{
+	return 0;
+}
+#endif
+
+static uint32_t gTable_Crc32[256] = {
+	0x00000000, 0x04c10db7, 0x09821b6e, 0x0d4316d9,
+	0x130436dc, 0x17c53b6b, 0x1a862db2, 0x1e472005,
+	0x26086db8, 0x22c9600f, 0x2f8a76d6, 0x2b4b7b61,
+	0x350c5b64, 0x31cd56d3, 0x3c8e400a, 0x384f4dbd,
+	0x4c10db70, 0x48d1d6c7, 0x4592c01e, 0x4153cda9,
+	0x5f14edac, 0x5bd5e01b, 0x5696f6c2, 0x5257fb75,
+	0x6a18b6c8, 0x6ed9bb7f, 0x639aada6, 0x675ba011,
+	0x791c8014, 0x7ddd8da3, 0x709e9b7a, 0x745f96cd,
+	0x9821b6e0, 0x9ce0bb57, 0x91a3ad8e, 0x9562a039,
+	0x8b25803c, 0x8fe48d8b, 0x82a79b52, 0x866696e5,
+	0xbe29db58, 0xbae8d6ef, 0xb7abc036, 0xb36acd81,
+	0xad2ded84, 0xa9ece033, 0xa4aff6ea, 0xa06efb5d,
+	0xd4316d90, 0xd0f06027, 0xddb376fe, 0xd9727b49,
+	0xc7355b4c, 0xc3f456fb, 0xceb74022, 0xca764d95,
+	0xf2390028, 0xf6f80d9f, 0xfbbb1b46, 0xff7a16f1,
+	0xe13d36f4, 0xe5fc3b43, 0xe8bf2d9a, 0xec7e202d,
+	0x34826077, 0x30436dc0, 0x3d007b19, 0x39c176ae,
+	0x278656ab, 0x23475b1c, 0x2e044dc5, 0x2ac54072,
+	0x128a0dcf, 0x164b0078, 0x1b0816a1, 0x1fc91b16,
+	0x018e3b13, 0x054f36a4, 0x080c207d, 0x0ccd2dca,
+	0x7892bb07, 0x7c53b6b0, 0x7110a069, 0x75d1adde,
+	0x6b968ddb, 0x6f57806c, 0x621496b5, 0x66d59b02,
+	0x5e9ad6bf, 0x5a5bdb08, 0x5718cdd1, 0x53d9c066,
+	0x4d9ee063, 0x495fedd4, 0x441cfb0d, 0x40ddf6ba,
+	0xaca3d697, 0xa862db20, 0xa521cdf9, 0xa1e0c04e,
+	0xbfa7e04b, 0xbb66edfc, 0xb625fb25, 0xb2e4f692,
+	0x8aabbb2f, 0x8e6ab698, 0x8329a041, 0x87e8adf6,
+	0x99af8df3, 0x9d6e8044, 0x902d969d, 0x94ec9b2a,
+	0xe0b30de7, 0xe4720050, 0xe9311689, 0xedf01b3e,
+	0xf3b73b3b, 0xf776368c, 0xfa352055, 0xfef42de2,
+	0xc6bb605f, 0xc27a6de8, 0xcf397b31, 0xcbf87686,
+	0xd5bf5683, 0xd17e5b34, 0xdc3d4ded, 0xd8fc405a,
+	0x6904c0ee, 0x6dc5cd59, 0x6086db80, 0x6447d637,
+	0x7a00f632, 0x7ec1fb85, 0x7382ed5c, 0x7743e0eb,
+	0x4f0cad56, 0x4bcda0e1, 0x468eb638, 0x424fbb8f,
+	0x5c089b8a, 0x58c9963d, 0x558a80e4, 0x514b8d53,
+	0x25141b9e, 0x21d51629, 0x2c9600f0, 0x28570d47,
+	0x36102d42, 0x32d120f5, 0x3f92362c, 0x3b533b9b,
+	0x031c7626, 0x07dd7b91, 0x0a9e6d48, 0x0e5f60ff,
+	0x101840fa, 0x14d94d4d, 0x199a5b94, 0x1d5b5623,
+	0xf125760e, 0xf5e47bb9, 0xf8a76d60, 0xfc6660d7,
+	0xe22140d2, 0xe6e04d65, 0xeba35bbc, 0xef62560b,
+	0xd72d1bb6, 0xd3ec1601, 0xdeaf00d8, 0xda6e0d6f,
+	0xc4292d6a, 0xc0e820dd, 0xcdab3604, 0xc96a3bb3,
+	0xbd35ad7e, 0xb9f4a0c9, 0xb4b7b610, 0xb076bba7,
+	0xae319ba2, 0xaaf09615, 0xa7b380cc, 0xa3728d7b,
+	0x9b3dc0c6, 0x9ffccd71, 0x92bfdba8, 0x967ed61f,
+	0x8839f61a, 0x8cf8fbad, 0x81bbed74, 0x857ae0c3,
+	0x5d86a099, 0x5947ad2e, 0x5404bbf7, 0x50c5b640,
+	0x4e829645, 0x4a439bf2, 0x47008d2b, 0x43c1809c,
+	0x7b8ecd21, 0x7f4fc096, 0x720cd64f, 0x76cddbf8,
+	0x688afbfd, 0x6c4bf64a, 0x6108e093, 0x65c9ed24,
+	0x11967be9, 0x1557765e, 0x18146087, 0x1cd56d30,
+	0x02924d35, 0x06534082, 0x0b10565b, 0x0fd15bec,
+	0x379e1651, 0x335f1be6, 0x3e1c0d3f, 0x3add0088,
+	0x249a208d, 0x205b2d3a, 0x2d183be3, 0x29d93654,
+	0xc5a71679, 0xc1661bce, 0xcc250d17, 0xc8e400a0,
+	0xd6a320a5, 0xd2622d12, 0xdf213bcb, 0xdbe0367c,
+	0xe3af7bc1, 0xe76e7676, 0xea2d60af, 0xeeec6d18,
+	0xf0ab4d1d, 0xf46a40aa, 0xf9295673, 0xfde85bc4,
+	0x89b7cd09, 0x8d76c0be, 0x8035d667, 0x84f4dbd0,
+	0x9ab3fbd5, 0x9e72f662, 0x9331e0bb, 0x97f0ed0c,
+	0xafbfa0b1, 0xab7ead06, 0xa63dbbdf, 0xa2fcb668,
+	0xbcbb966d, 0xb87a9bda, 0xb5398d03, 0xb1f880b4,
+};
+
+static uint32_t CRC_32(uint8_t *aData, long aSize)
+{
+	long i;
+	uint32_t nAccum = 0;
+
+	for (i = 0; i < aSize; i++)
+		nAccum =
+		    (nAccum << 8) ^ gTable_Crc32[(nAccum >> 24) ^ *aData++];
+	return nAccum;
+}
+
+#define TAG_KERNEL 0x4C4E524B
+
+int main(int argc, char *argv[])
+{
+	FILE *fid_in, *fid_out;
+	size_t cnt;
+	uint8_t *ptr1;
+	long fileSize;
+	int exit_code = 0;
+	uint32_t crcData;
+
+	PRINTF("mkkrnlimg V20111117\n");
+	PRINTF("cmd:%s %s [%s]\n", argv[1], argv[2], argv[3]);
+	if (argc < 3) {
+		printf("Usage: %s srcFile desFile [flag]\n", argv[0]);
+		printf("sample:\n");
+		printf("         %s Image kernel.img\n", argv[0]);
+		exit(1);
+	}
+
+	fid_in = fopen(argv[1], "rb");
+	if (fid_in == 0) {
+		printf("input open NG !\n ");
+		exit(2);
+	}
+
+	fid_out = fopen(argv[2], "wb");
+	if (fid_out == 0) {
+		printf("output open NG !\n ");
+		fclose(fid_in);
+		exit(3);
+	}
+	fseek(fid_in, 0, SEEK_END);
+	fileSize = ftell(fid_in);
+	PRINTF("fileSize = %ld\n", fileSize);
+	fseek(fid_in, 0, SEEK_SET);
+	ptr1 = malloc(fileSize + 512 + 20);
+	if (ptr1 == 0) {
+		exit_code = 4;
+		printf("\n malloc error!");
+		goto app_exit;
+	}
+
+	*(uint32_t *)ptr1 = TAG_KERNEL;
+	*(uint32_t *)(ptr1 + 4) = fileSize;
+	fwrite(ptr1, 1, 8, fid_out);
+	cnt = fread(ptr1, 1, fileSize, fid_in);
+	PRINTF("fread = %lu\n", cnt);
+	crcData = CRC_32(ptr1, fileSize);
+	PRINTF("crc = 0x%x\n", crcData);
+	cnt = fwrite(ptr1, 1, fileSize, fid_out);
+	PRINTF("fwrite = %lu\n", cnt);
+	fwrite(&crcData, 1, 4, fid_out);
+
+app_exit:
+	fclose(fid_in);
+	fclose(fid_out);
+	if (ptr1)
+		free(ptr1);
+	exit(exit_code);
+}

From 20a727f64b5fe9bba24d6a7539ed2887bb4a4651 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 22 Aug 2018 20:22:46 +0800
Subject: [PATCH 1147/1852] rk: kbuild: support build mkkrnlimg and
 resource_tool

Change-Id: I7b55a5644d3818efac296a16b4009bf10becec97
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/.gitignore | 2 ++
 scripts/Makefile   | 1 +
 2 files changed, 3 insertions(+)

diff --git a/scripts/.gitignore b/scripts/.gitignore
index 1f78169d42549..8b782eb939da6 100644
--- a/scripts/.gitignore
+++ b/scripts/.gitignore
@@ -7,6 +7,8 @@ pnmtologo
 unifdef
 ihex2fw
 recordmcount
+resource_tool
+mkkrnlimg
 docproc
 check-lc_ctype
 sortextable
diff --git a/scripts/Makefile b/scripts/Makefile
index fd0d53d4a2346..0c358035d7d43 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -15,6 +15,7 @@ hostprogs-$(CONFIG_KALLSYMS)     += kallsyms
 hostprogs-$(CONFIG_LOGO)         += pnmtologo
 hostprogs-$(CONFIG_VT)           += conmakehash
 hostprogs-$(BUILD_C_RECORDMCOUNT) += recordmcount
+hostprogs-$(CONFIG_ARCH_ROCKCHIP) += resource_tool mkkrnlimg
 hostprogs-$(CONFIG_BUILDTIME_EXTABLE_SORT) += sortextable
 hostprogs-$(CONFIG_ASN1)	 += asn1_compiler
 hostprogs-$(CONFIG_MODULE_SIG)	 += sign-file

From c2ec3436f37c93f089638ade02deb46f4d84f010 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 22 Aug 2018 20:26:25 +0800
Subject: [PATCH 1148/1852] rk: rm scripts/mkkrnlimg and scripts/resource_tool

build from source.

Change-Id: I0ece374fa01e6891f63aae89b84bb1e7b94bff21
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/mkkrnlimg     | Bin 6736 -> 0 bytes
 scripts/resource_tool | Bin 680348 -> 0 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)
 delete mode 100755 scripts/mkkrnlimg
 delete mode 100755 scripts/resource_tool

diff --git a/scripts/mkkrnlimg b/scripts/mkkrnlimg
deleted file mode 100755
index 9249dc8dcdd0e63b733c2a4645eff502ebbbf48b..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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From a024129b92fec5e3a8a1fbbc0d55aec4de8296c1 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 23 Aug 2018 16:10:24 +0800
Subject: [PATCH 1149/1852] media: i2c: gc0312: change sensor setting from
 20fps to 30fps in vga size

Change-Id: I5c9f0df26af6597c4fa16199ecb40b9e6bf9bf1c
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/gc0312.c | 131 +++++++++++++++++--------------------
 1 file changed, 61 insertions(+), 70 deletions(-)

diff --git a/drivers/media/i2c/gc0312.c b/drivers/media/i2c/gc0312.c
index cf4c74416d599..6cf3cc8552fb7 100644
--- a/drivers/media/i2c/gc0312.c
+++ b/drivers/media/i2c/gc0312.c
@@ -147,19 +147,19 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x0f, 0x02},
 	{0x10, 0x88},
 	{0x16, 0x00},
-	{0x17, 0x17},
+	{0x17, 0x14},
 	{0x18, 0x1a},
 	{0x19, 0x14},
 	{0x1b, 0x48},
 	/*1c travis 20140929  update for lag*/
-	{0x1c, 0x6c},
+	{0x1c, 0x1c},
 	{0x1e, 0x6b},
 	{0x1f, 0x28},
 	/*0x89 travis20140801*/
 	{0x20, 0x8b},
 	{0x21, 0x49},
 	/*b0 travis 20140929 update for lag*/
-	{0x22, 0xd0},
+	{0x22, 0xb0},
 	{0x23, 0x04},
 	{0x24, 0x16},
 	{0x34, 0x20},
@@ -168,7 +168,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x26, 0x23},
 	{0x28, 0xff},
 	{0x29, 0x00},
-	/*{0x32, 0x04},*/
+	{0x32, 0x00},
 	{0x33, 0x10},
 	{0x37, 0x20},
 	{0x38, 0x10},
@@ -184,7 +184,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x44, 0x02},
 	{0x45, 0xa8},
 	/*sync 02*/
-	{0x46, 0x03},
+	{0x46, 0x02},
 	{0x4a, 0x11},
 	{0x4b, 0x01},
 	{0x4c, 0x20},
@@ -217,7 +217,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x92, 0x03},
 	{0x93, 0x03},
 	{0x94, 0x05},
-	{0x95, 0x66},
+	{0x95, 0x65},
 	{0x96, 0xf0},
 
 	/*ASDE*/
@@ -230,9 +230,9 @@ static const struct sensor_register gc0312_vga_regs[] = {
 
 	{0xa1, 0x30},
 	{0xa2, 0x32},
-	{0xa4, 0x30},
-	{0xa5, 0x30},
-	{0xaa, 0x10},
+	{0xa4, 0x80},
+	{0xa5, 0x28},
+	{0xaa, 0x30},
 	{0xac, 0x22},
 
 	/*GAMMA*/
@@ -259,7 +259,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0xd0, 0x40},
 	{0xd1, 0x34},
 	{0xd2, 0x34},
-	{0xd3, 0x45},
+	{0xd3, 0x40},
 	{0xd6, 0xf2},
 	{0xd7, 0x1b},
 	{0xd8, 0x18},
@@ -275,7 +275,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x0b, 0x11},
 	{0x0c, 0x00},
 	{0x12, 0x52},
-	{0x13, 0x40},
+	{0x13, 0x38},
 	{0x18, 0x95},
 	{0x19, 0x96},
 	{0x1f, 0x20},
@@ -287,6 +287,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x44, 0x02},
 
 	/*AWB*/
+	{0xfe, 0x01},
 	{0x1c, 0x91},
 	{0x21, 0x15},
 	{0x50, 0x80},
@@ -313,77 +314,67 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x7b, 0x50},
 	{0x7c, 0x0c},
 
-	{0xa4, 0xb9},
-	{0xa5, 0xa0},
 	{0x90, 0xc9},
 	{0x91, 0xbe},
-
-	{0xa6, 0xb8},
-	{0xa7, 0x95},
-	{0x92, 0xe6},
-	{0x93, 0xca},
-
-	{0xa9, 0xbc},
-	{0xaa, 0x95},
-	{0x95, 0x23},
-	{0x96, 0xe7},
-
+	{0x92, 0xe2},
+	{0x93, 0xc9},
+	{0x95, 0x1b},
+	{0x96, 0xe2},
+	{0x97, 0x49},
+	{0x98, 0x1b},
+	{0x9a, 0x49},
+	{0x9b, 0x1b},
+	{0x9c, 0xc3},
+	{0x9d, 0x49},
+	{0x9f, 0xc7},
+	{0xa0, 0xc8},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	{0x86, 0x00},
+	{0x87, 0x00},
+	{0x88, 0x00},
+	{0x89, 0x00},
+	{0xa4, 0xb9},
+	{0xa5, 0xa0},
+	{0xa6, 0xba},
+	{0xa7, 0x92},
+	{0xa9, 0xba},
+	{0xaa, 0x80},
 	{0xab, 0x9d},
-	{0xac, 0x80},
-	{0x97, 0x43},
-	{0x98, 0x24},
-
-	{0xae, 0xb7},
-	{0xaf, 0x9e},
-	{0x9a, 0x43},
-	{0x9b, 0x24},
-
+	{0xac, 0x7f},
+	{0xae, 0xbb},
+	{0xaf, 0x9d},
 	{0xb0, 0xc8},
 	{0xb1, 0x97},
-	{0x9c, 0xc4},
-	{0x9d, 0x44},
-
 	{0xb3, 0xb7},
 	{0xb4, 0x7f},
-	{0x9f, 0xc7},
-	{0xa0, 0xc8},
-
 	{0xb5, 0x00},
 	{0xb6, 0x00},
-	{0xa1, 0x00},
-	{0xa2, 0x00},
-
-	{0x86, 0x60},
-	{0x87, 0x08},
-	{0x88, 0x00},
-	{0x89, 0x00},
-	{0x8b, 0xde},
-	{0x8c, 0x80},
+	{0x8b, 0x00},
+	{0x8c, 0x00},
 	{0x8d, 0x00},
 	{0x8e, 0x00},
-
 	{0x94, 0x55},
 	{0x99, 0xa6},
 	{0x9e, 0xaa},
 	{0xa3, 0x0a},
-	{0x8a, 0x0a},
+	{0x8a, 0x00},
 	{0xa8, 0x55},
 	{0xad, 0x55},
 	{0xb2, 0x55},
 	{0xb7, 0x05},
-	{0x8f, 0x05},
-
-	{0xb8, 0xcc},
-	{0xb9, 0x9a},
+	{0x8f, 0x00},
+	{0xb8, 0xcb},
+	{0xb9, 0x9b},
 	/*CC*/
 	{0xfe, 0x01},
 	/*skin white*/
 	{0xd0, 0x38},
-	{0xd1, 0xfd},
-	{0xd2, 0x06},
-	{0xd3, 0xf0},
-	{0xd4, 0x40},
-	{0xd5, 0x08},
+	{0xd1, 0x00},
+	{0xd2, 0x02},
+	{0xd3, 0x04},
+	{0xd4, 0x38},
+	{0xd5, 0x12},
 
 	{0xd6, 0x30},
 	{0xd7, 0x00},
@@ -434,31 +425,31 @@ static const struct sensor_register gc0312_vga_regs[] = {
 
 	/*banding*/
 	{0xfe, 0x00},
-	{0x05, 0x02},
+	{0x05, 0x00},
 	/*HB*/
-	{0x06, 0xd1},
+	{0x06, 0x90},
 	{0x07, 0x00},
 	/*VB*/
-	{0x08, 0x22},
+	{0x08, 0x31},
 
 	{0xfe, 0x01},
 	/*anti-flicker step [11:8]*/
 	{0x25, 0x00},
 	/*anti-flicker step [7:0]*/
-	{0x26, 0x6a},
+	{0x26, 0xb3},
 
-	/*exp level 0  20fps*/
+	/*exp level 0 */
 	{0x27, 0x02},
-	{0x28, 0x12},
-	/*exp level 1  12.50fps*/
+	{0x28, 0x19},
+	/*exp level 1 */
 	{0x29, 0x02},
-	{0x2a, 0x12},
+	{0x2a, 0x19},
 	/*7.14fps*/
 	{0x2b, 0x02},
-	{0x2c, 0x12},
-	/*exp level 3  5.55fps*/
+	{0x2c, 0x19},
+	/*exp level 3 */
 	{0x2d, 0x02},
-	{0x2e, 0x12},
+	{0x2e, 0x19},
 	{0x3c, 0x20},
 	{0xfe, 0x00},
 

From 915d93982bfd3bc58185bbeef4dca6c7aade655a Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 23 Aug 2018 16:10:58 +0800
Subject: [PATCH 1150/1852] media: i2c: gc2145: change sensor setting from
 20fps to 30fps in svga size

Change-Id: I3af9061d2a4d90c0ec3bc9ec193af51edb2aa2cf
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/gc2145.c | 57 ++++++++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 17 deletions(-)

diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c
index 6d8f2dd3b90db..fedc5a5c1b098 100644
--- a/drivers/media/i2c/gc2145.c
+++ b/drivers/media/i2c/gc2145.c
@@ -889,11 +889,40 @@ static const struct sensor_register gc2145_full_regs[] = {
 /* Preview resolution setting*/
 static const struct sensor_register gc2145_svga_regs[] = {
 	{0xfe, 0x00},
-	{0xb6, 0x01},
-	{0xfd, 0x01},
+	{0x05, 0x02},
+	{0x06, 0x20},
+	{0x07, 0x00},
+	{0x08, 0xb8},
+	{0xfe, 0x01},
+	{0x25, 0x01},
+	{0x26, 0xac},
+	{0x27, 0x05},
+	{0x28, 0x04},
+	{0x29, 0x05},
+	{0x2a, 0x04},
+	{0x2b, 0x05},
+	{0x2c, 0x04},
+	{0x2d, 0x05},
+	{0x2e, 0x04},
+	{0x3c, 0x00},
+	{0xfe, 0x00},
+	{0xfe, 0x00},
 	{0xfa, 0x00},
-	/*crop window*/
+	{0x18, 0x42},
+	{0xfd, 0x03},
+	{0xb6, 0x01},
+	/* crop window */
 	{0xfe, 0x00},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
 	{0x90, 0x01},
 	{0x91, 0x00},
 	{0x92, 0x00},
@@ -903,32 +932,26 @@ static const struct sensor_register gc2145_svga_regs[] = {
 	{0x96, 0x58},
 	{0x97, 0x03},
 	{0x98, 0x20},
-	{0x99, 0x11},
-	{0x9a, 0x06},
-	/*AWB*/
+	/* AWB */
 	{0xfe, 0x00},
-	{0xec, 0x02},
+	{0xec, 0x01},
 	{0xed, 0x02},
 	{0xee, 0x30},
 	{0xef, 0x48},
-	{0xfe, 0x02},
-	{0x9d, 0x08},
 	{0xfe, 0x01},
 	{0x74, 0x00},
-	/*AEC*/
+	/* AEC */
 	{0xfe, 0x01},
 	{0x01, 0x04},
 	{0x02, 0x60},
 	{0x03, 0x02},
 	{0x04, 0x48},
 	{0x05, 0x18},
-	{0x06, 0x50},
-	{0x07, 0x10},
-	{0x08, 0x38},
-	{0x0a, 0x80},
-	{0x21, 0x04},
-	{0xfe, 0x00},
-	{0x20, 0x03},
+	{0x06, 0x4c},
+	{0x07, 0x14},
+	{0x08, 0x36},
+	{0x0a, 0xc0},
+	{0x21, 0x14},
 	{0xfe, 0x00},
 	{REG_NULL, 0x00},
 };

From b82b1768199a7fd00bf0ef0a8212d2269d8e9a3d Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 23 Aug 2018 16:18:10 +0800
Subject: [PATCH 1151/1852] media: rockchip: isp1: change needed min buffers of
 stream to 0

change needed min buffers of stream to 0, because we allocate dummy
buffer in advance.

Change-Id: Ib7647983b495c11dc18151b3c1f8856c49496c3a
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/capture.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index 00d9df43ecc68..5cf6bd7f98d26 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -62,8 +62,8 @@
  * available sp source fmts: yuv, rgb
  */
 
-#define CIF_ISP_REQ_BUFS_MIN 1
-#define CIF_ISP_REQ_BUFS_MAX 8
+#define CIF_ISP_REQ_BUFS_MIN			0
+#define CIF_ISP_REQ_BUFS_MAX			8
 
 #define STREAM_PAD_SINK				0
 #define STREAM_PAD_SOURCE			1

From 035cec65760211cf32e74c118b783c5beb2015e8 Mon Sep 17 00:00:00 2001
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Tue, 5 Jun 2018 13:21:26 +1000
Subject: [PATCH 1152/1852] UPSTREAM: devres: Add devm_of_iomap()

There are still quite a few cases where a device might want
to get to a different node of the device-tree, obtain the
resources and map them.

We have of_iomap() and of_io_request_and_map() but they both
have shortcomings, such as not returning the size of the
resource found (which can be useful) and not being "managed".

This adds a devm_of_iomap() that provides all of these and
should probably replace uses of the above in most drivers.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
(cherry picked from commit d5e838275c80aeb96d4c0b81442a851dfef2e948)

Change-Id: I5d68c3e23637c5e83e5f2bed3a1aa2c654d7d6a1
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 include/linux/device.h |  4 ++++
 lib/devres.c           | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+)

diff --git a/include/linux/device.h b/include/linux/device.h
index b304ca6f90d89..5f9fa7fb20885 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -679,6 +679,10 @@ extern void devm_free_pages(struct device *dev, unsigned long addr);
 
 void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res);
 
+void __iomem *devm_of_iomap(struct device *dev,
+			    struct device_node *node, int index,
+			    resource_size_t *size);
+
 /* allows to add/remove a custom action to devres stack */
 int devm_add_action(struct device *dev, void (*action)(void *), void *data);
 void devm_remove_action(struct device *dev, void (*action)(void *), void *data);
diff --git a/lib/devres.c b/lib/devres.c
index 8c85672639d3e..12ab4eb241c53 100644
--- a/lib/devres.c
+++ b/lib/devres.c
@@ -3,6 +3,7 @@
 #include <linux/io.h>
 #include <linux/gfp.h>
 #include <linux/export.h>
+#include <linux/of_address.h>
 
 void devm_ioremap_release(struct device *dev, void *res)
 {
@@ -163,6 +164,41 @@ void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res)
 }
 EXPORT_SYMBOL(devm_ioremap_resource);
 
+/*
+ * devm_of_iomap - Requests a resource and maps the memory mapped IO
+ *		   for a given device_node managed by a given device
+ *
+ * Checks that a resource is a valid memory region, requests the memory
+ * region and ioremaps it. All operations are managed and will be undone
+ * on driver detach of the device.
+ *
+ * This is to be used when a device requests/maps resources described
+ * by other device tree nodes (children or otherwise).
+ *
+ * @dev:	The device "managing" the resource
+ * @node:       The device-tree node where the resource resides
+ * @index:	index of the MMIO range in the "reg" property
+ * @size:	Returns the size of the resource (pass NULL if not needed)
+ * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
+ * error code on failure. Usage example:
+ *
+ *	base = devm_of_iomap(&pdev->dev, node, 0, NULL);
+ *	if (IS_ERR(base))
+ *		return PTR_ERR(base);
+ */
+void __iomem *devm_of_iomap(struct device *dev, struct device_node *node, int index,
+			    resource_size_t *size)
+{
+	struct resource res;
+
+	if (of_address_to_resource(node, index, &res))
+		return IOMEM_ERR_PTR(-EINVAL);
+	if (size)
+		*size = resource_size(&res);
+	return devm_ioremap_resource(dev, &res);
+}
+EXPORT_SYMBOL(devm_of_iomap);
+
 #ifdef CONFIG_HAS_IOPORT_MAP
 /*
  * Generic iomap devres

From fcf56b6fcbc5e6609f46cddec8ba2a86d9011ae7 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 22 Aug 2018 21:35:59 +0800
Subject: [PATCH 1153/1852] arm: dts: rk3308-voice-module-v10-aarch32: Enable
 timer wakeup

Allow waking up by timer irq.

Change-Id: I7ef35d317c8d039421e6484f92a8265b949d505c
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 7fe39a7ee84aa..1b1d97dc8e642 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -250,6 +250,13 @@
 		)
 	>;
 
+	rockchip,wakeup-config = <
+		(0
+		| RKPM_GPIO0_WAKEUP_EN
+		| RKPM_TIMER_WAKEUP_EN
+		)
+	>;
+
 	status = "okay";
 };
 

From 005c66f9e2f8dca64e6d2af8914457cfaf92cedf Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 22 Aug 2018 21:16:31 +0800
Subject: [PATCH 1154/1852] dt-bindings: rtc: Add rk-timer-rtc

Add documentation for DT binding of Rockchip timer RTC driver.

Change-Id: I066312219d9ed9e7a3e943bf8a60d072d8c9fa36
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 .../devicetree/bindings/rtc/rtc-rk-timer.txt  | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/rtc-rk-timer.txt

diff --git a/Documentation/devicetree/bindings/rtc/rtc-rk-timer.txt b/Documentation/devicetree/bindings/rtc/rtc-rk-timer.txt
new file mode 100644
index 0000000000000..115124f68a860
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-rk-timer.txt
@@ -0,0 +1,19 @@
+Rockchip rk timer RTC
+
+Required properties:
+- compatible: should be:
+  "rockchip,rk3308-timer-rtc": for Rockchip RK3308
+- reg: base address of the timer register and length of memory mapped region.
+- interrupts: should contain the interrupts for the timer
+- clocks : must contain an entry for each entry in clock-names
+- clock-names : must include the following entries:
+  "timer", "pclk"
+
+Example:
+	rk_timer_rtc: rk-timer-rtc@ff1a0020 {
+		compatible = "rockchip,rk3308-timer-rtc";
+		reg = <0x0 0xff1a0020 0x0 0x20>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
+		clock-names = "pclk", "timer";
+	};

From 0a6e9eb699d97777d7be2f5eb1882337a052fd23 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 22 Aug 2018 15:48:47 +0800
Subject: [PATCH 1155/1852] rtc: Add an RTC driver for rk-timer

This driver uses Rockchip timer to simulate RTC functions.

Change-Id: I49eed6ecbb4c55527696c63b0d479afe837502d5
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/rtc/Kconfig        |  10 +
 drivers/rtc/Makefile       |   1 +
 drivers/rtc/rtc-rk-timer.c | 494 +++++++++++++++++++++++++++++++++++++
 3 files changed, 505 insertions(+)
 create mode 100644 drivers/rtc/rtc-rk-timer.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a92e5e9b4f7fa..aa0428bd66ada 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -341,6 +341,16 @@ config RTC_DRV_RK808
 	  This driver can also be built as a module. If so, the module
 	  will be called rk808-rtc.
 
+config RTC_DRV_RK_TIMER
+	tristate "Rockchip timer RTC"
+	depends on OF
+	help
+	  If you say yes here you will get support for the
+	  RTC of Rockchip timer.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-rk-timer.
+
 config RTC_DRV_MAX77802
 	tristate "Maxim 77802 RTC"
 	depends on MFD_MAX77686
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 0df55faabb8ec..a0835df7be3f0 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -122,6 +122,7 @@ obj-$(CONFIG_RTC_DRV_PXA)	+= rtc-pxa.o
 obj-$(CONFIG_RTC_DRV_R9701)	+= rtc-r9701.o
 obj-$(CONFIG_RTC_DRV_RC5T583)	+= rtc-rc5t583.o
 obj-$(CONFIG_RTC_DRV_RK808)	+= rtc-rk808.o
+obj-$(CONFIG_RTC_DRV_RK_TIMER)	+= rtc-rk-timer.o
 obj-$(CONFIG_RTC_DRV_RP5C01)	+= rtc-rp5c01.o
 obj-$(CONFIG_RTC_DRV_RS5C313)	+= rtc-rs5c313.o
 obj-$(CONFIG_RTC_DRV_RS5C348)	+= rtc-rs5c348.o
diff --git a/drivers/rtc/rtc-rk-timer.c b/drivers/rtc/rtc-rk-timer.c
new file mode 100644
index 0000000000000..171e9a31bb6fb
--- /dev/null
+++ b/drivers/rtc/rtc-rk-timer.c
@@ -0,0 +1,494 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018, Fuzhou Rockchip Electronics Co., Ltd
+ * Author:  Jeffy Chen <jeffy.chen@rock-chips.com>
+ *
+ * Base on the Rockchip timer driver drivers/clocksource/rockchip_timer.c by
+ * Daniel Lezcano <daniel.lezcano@linaro.org>
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+
+#define DRV_NAME		"rk-timer-rtc"
+
+#define TIMER_LOAD_COUNT0	0x00
+#define TIMER_LOAD_COUNT1	0x04
+#define TIMER_CURRENT_VALUE0	0x08
+#define TIMER_CURRENT_VALUE1	0x0C
+#define TIMER_CONTROL_REG3288	0x10
+#define TIMER_INT_STATUS	0x18
+
+#define TIMER_ENABLE			BIT(0)
+#define TIMER_MODE_USER_DEFINED_COUNT	BIT(1)
+#define TIMER_INT_UNMASK		BIT(2)
+
+/* Forbid any alarms which would trigger inside the threshold */
+#define TIMER_ALARM_THRESHOLD_MS	10
+
+#if !defined(UINT64_MAX)
+	#define UINT64_MAX ((u64)-1)
+#endif
+
+/**
+ * struct rk_timer_rtc_data - Differences between SoC variants
+ *
+ * @ctrl_reg_offset: The offset of timer control register
+ */
+struct rk_timer_rtc_data {
+	int ctrl_reg_offset;
+};
+
+/**
+ * struct rk_timer_rtc - Driver data for Rockchip timer RTC
+ *
+ * @data: Pointer to rk_timer_rtc_data
+ * @regmap: Register map of the timer
+ * @rtc: Pointer to RTC device
+ * @clk: The timer clock
+ * @pclk: The peripheral clock
+ * @freq: The freq of timer clock
+ * @timebase: The base time of the timer RTC
+ * @alarm_irq_enabled: Whether to report alarm irqs
+ * @irq: The timer IRQ number
+ */
+struct rk_timer_rtc {
+	const struct rk_timer_rtc_data *data;
+	struct regmap *regmap;
+	struct rtc_device *rtc;
+	struct clk *clk;
+	struct clk *pclk;
+	u32 freq;
+	u64 timebase;
+	int alarm_irq_enabled;
+	int irq;
+};
+
+static inline u64 tick_to_sec(struct rk_timer_rtc *rk_timer_rtc, u64 tick)
+{
+	do_div(tick, rk_timer_rtc->freq);
+	return tick;
+}
+
+static inline u64 sec_to_tick(struct rk_timer_rtc *rk_timer_rtc, int sec)
+{
+	return sec * rk_timer_rtc->freq;
+}
+
+static inline u64 ms_to_tick(struct rk_timer_rtc *rk_timer_rtc, int ms)
+{
+	return ms * rk_timer_rtc->freq / 1000;
+}
+
+static inline u64 tick_to_time64(struct rk_timer_rtc *rk_timer_rtc, u64 tick)
+{
+	return tick_to_sec(rk_timer_rtc, tick) + rk_timer_rtc->timebase;
+}
+
+static inline u64 time64_to_tick(struct rk_timer_rtc *rk_timer_rtc, u64 time)
+{
+	return sec_to_tick(rk_timer_rtc, time - rk_timer_rtc->timebase);
+}
+
+static inline int rk_timer_rtc_write64(struct rk_timer_rtc *rk_timer_rtc,
+				       u32 reg, u64 val)
+{
+	return regmap_bulk_write(rk_timer_rtc->regmap, reg, &val, 2);
+}
+
+static inline int rk_timer_rtc_read64(struct rk_timer_rtc *rk_timer_rtc,
+				      u32 reg, u64 *val)
+{
+	return regmap_bulk_read(rk_timer_rtc->regmap, reg, val, 2);
+}
+
+static inline int rk_timer_rtc_irq_clear(struct rk_timer_rtc *rk_timer_rtc)
+{
+	return regmap_write(rk_timer_rtc->regmap, TIMER_INT_STATUS, 1);
+}
+
+static inline int rk_timer_rtc_irq_enable(struct rk_timer_rtc *rk_timer_rtc,
+					  unsigned int enabled)
+{
+	/* Clear any pending irq before enable it */
+	if (enabled)
+		rk_timer_rtc_irq_clear(rk_timer_rtc);
+
+	return regmap_update_bits(rk_timer_rtc->regmap,
+				  rk_timer_rtc->data->ctrl_reg_offset,
+				  TIMER_INT_UNMASK,
+				  enabled ? TIMER_INT_UNMASK : 0);
+}
+
+static int rk_timer_rtc_reset(struct rk_timer_rtc *rk_timer_rtc)
+{
+	int ret;
+
+	ret = regmap_write(rk_timer_rtc->regmap,
+			   rk_timer_rtc->data->ctrl_reg_offset, 0);
+	if (ret)
+		return ret;
+
+	/* Init load count to UINT64_MAX to keep timer running */
+	ret = rk_timer_rtc_write64(rk_timer_rtc, TIMER_LOAD_COUNT0, UINT64_MAX);
+	if (ret)
+		return ret;
+
+	/* Clear any pending irq before enable it */
+	rk_timer_rtc_irq_clear(rk_timer_rtc);
+
+	/* Enable timer in user-defined count mode with irq unmasked */
+	return regmap_write(rk_timer_rtc->regmap,
+			    rk_timer_rtc->data->ctrl_reg_offset,
+			    TIMER_ENABLE | TIMER_MODE_USER_DEFINED_COUNT |
+				TIMER_INT_UNMASK);
+}
+
+static int rk_timer_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+	int ret;
+	u64 tick;
+
+	ret = rk_timer_rtc_read64(rk_timer_rtc, TIMER_CURRENT_VALUE0, &tick);
+	if (ret)
+		return ret;
+
+	rtc_time64_to_tm(tick_to_time64(rk_timer_rtc, tick), tm);
+
+	dev_dbg(dev, "Read RTC: %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+		1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
+		tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+	return rtc_valid_tm(tm);
+}
+
+static int rk_timer_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+	int ret;
+
+	dev_dbg(dev, "Set RTC:%4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+		1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
+		tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+	ret = rtc_valid_tm(tm);
+	if (ret)
+		return ret;
+
+	rk_timer_rtc->timebase = rtc_tm_to_time64(tm);
+
+	dev_dbg(dev, "Setting new timebase:%lld\n", rk_timer_rtc->timebase);
+
+	/* Restart timer for new timebase */
+	ret = rk_timer_rtc_reset(rk_timer_rtc);
+	if (ret) {
+		dev_err(dev, "Failed to reset timer:%d\n", ret);
+		return ret;
+	}
+
+	/* Tell framework to check alarms */
+	rtc_update_irq(rk_timer_rtc->rtc, 1, RTC_IRQF | RTC_AF);
+
+	return 0;
+}
+
+static int rk_timer_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+	int ret;
+	u64 tick;
+
+	ret = rk_timer_rtc_read64(rk_timer_rtc, TIMER_LOAD_COUNT0, &tick);
+	if (ret)
+		return ret;
+
+	rtc_time64_to_tm(tick_to_time64(rk_timer_rtc, tick), &alrm->time);
+
+	dev_dbg(dev, "Read alarm: %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+		1900 + alrm->time.tm_year, alrm->time.tm_mon + 1,
+		alrm->time.tm_mday, alrm->time.tm_wday, alrm->time.tm_hour,
+		alrm->time.tm_min, alrm->time.tm_sec);
+
+	return rtc_valid_tm(&alrm->time);
+}
+
+static int rk_timer_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+	int ret;
+	u64 alarm_tick, alarm_threshold_tick, cur_tick;
+
+	dev_dbg(dev, "Set alarm:%4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+		1900 + alrm->time.tm_year, alrm->time.tm_mon + 1,
+		alrm->time.tm_mday, alrm->time.tm_wday, alrm->time.tm_hour,
+		alrm->time.tm_min, alrm->time.tm_sec);
+
+	ret = rtc_valid_tm(&alrm->time);
+	if (ret)
+		return ret;
+
+	rk_timer_rtc->alarm_irq_enabled = false;
+
+	alarm_tick = time64_to_tick(rk_timer_rtc,
+				    rtc_tm_to_time64(&alrm->time));
+
+	ret = rk_timer_rtc_read64(rk_timer_rtc, TIMER_CURRENT_VALUE0,
+				  &cur_tick);
+	if (ret)
+		return ret;
+
+	/* Don't set an alarm in the past or about to pass */
+	alarm_threshold_tick = ms_to_tick(rk_timer_rtc,
+					  TIMER_ALARM_THRESHOLD_MS);
+	if (alarm_tick <= (cur_tick + alarm_threshold_tick))
+		return -ETIME;
+
+	/*
+	 * When the current value counts up to the load count, the timer will
+	 * stop and generate an irq.
+	 */
+	ret = rk_timer_rtc_write64(rk_timer_rtc, TIMER_LOAD_COUNT0, alarm_tick);
+	if (ret)
+		return ret;
+
+	dev_dbg(dev, "New alarm enabled:%d\n", alrm->enabled);
+	rk_timer_rtc->alarm_irq_enabled = alrm->enabled;
+
+	return 0;
+}
+
+static int rk_timer_rtc_alarm_irq_enable(struct device *dev,
+					 unsigned int enabled)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+
+	dev_dbg(dev, "Set alarm irq enabled:%d\n", enabled);
+	rk_timer_rtc->alarm_irq_enabled = enabled;
+
+	return 0;
+}
+
+static irqreturn_t rk_timer_rtc_alarm_irq(int irq, void *data)
+{
+	struct device *dev = data;
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+	int ret;
+
+	dev_dbg(dev, "Received timer irq, alarm_irq_enabled:%d\n",
+		rk_timer_rtc->alarm_irq_enabled);
+
+	/* The timer is stopped now, reset the load count to start it again */
+	ret = rk_timer_rtc_write64(rk_timer_rtc, TIMER_LOAD_COUNT0, UINT64_MAX);
+	if (ret)
+		dev_err(dev, "Failed to set load count:%d\n", ret);
+
+	ret = regmap_write(rk_timer_rtc->regmap, TIMER_INT_STATUS, 1);
+	if (ret)
+		dev_err(dev, "Failed to clear irq:%d\n", ret);
+
+	/* Only report rtc irq when alarm irq is enabled */
+	if (rk_timer_rtc->alarm_irq_enabled)
+		rtc_update_irq(rk_timer_rtc->rtc, 1, RTC_IRQF | RTC_AF);
+
+	return IRQ_HANDLED;
+}
+
+static const struct rtc_class_ops rk_timer_rtc_ops = {
+	.read_time = rk_timer_rtc_read_time,
+	.set_time = rk_timer_rtc_set_time,
+	.read_alarm = rk_timer_rtc_read_alarm,
+	.set_alarm = rk_timer_rtc_set_alarm,
+	.alarm_irq_enable = rk_timer_rtc_alarm_irq_enable,
+};
+
+static struct regmap_config rk_timer_regmap_config = {
+	.name		= DRV_NAME,
+	.reg_bits	= 32,
+	.val_bits	= 32,
+	.reg_stride	= 4,
+};
+
+static const struct of_device_id rk_timer_rtc_dt_match[];
+
+static int rk_timer_rtc_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device *dev = &pdev->dev;
+	struct rk_timer_rtc *rk_timer_rtc;
+	void __iomem *base;
+	resource_size_t size;
+	int ret;
+
+	rk_timer_rtc = devm_kzalloc(dev, sizeof(*rk_timer_rtc), GFP_KERNEL);
+	if (!rk_timer_rtc)
+		return -ENOMEM;
+
+	match = of_match_node(rk_timer_rtc_dt_match, dev->of_node);
+	rk_timer_rtc->data = match->data;
+
+	platform_set_drvdata(pdev, rk_timer_rtc);
+
+	base = devm_of_iomap(dev, dev->of_node, 0, &size);
+	if (!base) {
+		dev_err(dev, "Failed to iomap\n");
+		return -EINVAL;
+	}
+
+	rk_timer_regmap_config.max_register = size - 4;
+	rk_timer_rtc->regmap = devm_regmap_init_mmio(dev, base,
+						     &rk_timer_regmap_config);
+	if (IS_ERR(rk_timer_rtc->regmap)) {
+		ret = PTR_ERR(rk_timer_rtc->regmap);
+		dev_err(dev, "Failed to init regmap:%d\n", ret);
+		return ret;
+	}
+
+	rk_timer_rtc->irq = platform_get_irq(pdev, 0);
+	if (rk_timer_rtc->irq < 0) {
+		ret = rk_timer_rtc->irq;
+		dev_err(dev, "Failed to get irq:%d\n", ret);
+		return ret;
+	}
+
+	ret = devm_request_irq(dev, rk_timer_rtc->irq, rk_timer_rtc_alarm_irq,
+			       0, dev_name(dev), dev);
+	if (ret) {
+		dev_err(dev, "Failed to request irq:%d\n", ret);
+		return ret;
+	}
+
+	rk_timer_rtc->pclk = devm_clk_get(dev, "pclk");
+	if (IS_ERR(rk_timer_rtc->pclk)) {
+		ret = PTR_ERR(rk_timer_rtc->pclk);
+		pr_err("Failed to get timer pclk:%d\n", ret);
+		return ret;
+	}
+
+	ret = clk_prepare_enable(rk_timer_rtc->pclk);
+	if (ret) {
+		dev_err(dev, "Failed to enable pclk:%d\n", ret);
+		return ret;
+	}
+
+	rk_timer_rtc->clk = devm_clk_get(dev, "timer");
+	if (IS_ERR(rk_timer_rtc->clk)) {
+		ret = PTR_ERR(rk_timer_rtc->clk);
+		pr_err("Failed to get timer clk:%d\n", ret);
+		goto err_disable_pclk;
+	}
+
+	ret = clk_prepare_enable(rk_timer_rtc->clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable timer clk:%d\n", ret);
+		goto err_disable_pclk;
+	}
+
+	rk_timer_rtc->freq = clk_get_rate(rk_timer_rtc->clk);
+	dev_dbg(dev, "RTC timer freq:%d\n", rk_timer_rtc->freq);
+
+	ret = rk_timer_rtc_reset(rk_timer_rtc);
+	if (ret) {
+		dev_err(dev, "Failed to reset timer:%d\n", ret);
+		goto err_disable_clk;
+	}
+
+	ret = device_init_wakeup(dev, true);
+	if (ret) {
+		dev_err(dev, "Failed to init wakeup:%d\n", ret);
+		goto err_disable_irq;
+	}
+
+	rk_timer_rtc->rtc = devm_rtc_device_register(dev, DRV_NAME,
+						     &rk_timer_rtc_ops,
+						     THIS_MODULE);
+	if (IS_ERR(rk_timer_rtc->rtc)) {
+		ret = PTR_ERR(rk_timer_rtc->rtc);
+		dev_err(dev, "Failed to register rtc:%d\n", ret);
+		goto err_uninit_wakeup;
+	}
+
+	return 0;
+err_uninit_wakeup:
+	device_init_wakeup(&pdev->dev, false);
+err_disable_irq:
+	rk_timer_rtc_irq_enable(rk_timer_rtc, false);
+err_disable_clk:
+	clk_disable_unprepare(rk_timer_rtc->clk);
+err_disable_pclk:
+	clk_disable_unprepare(rk_timer_rtc->pclk);
+	return ret;
+}
+
+static int rk_timer_rtc_remove(struct platform_device *pdev)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(&pdev->dev);
+
+	device_init_wakeup(&pdev->dev, false);
+	rk_timer_rtc_irq_enable(rk_timer_rtc, false);
+	clk_disable_unprepare(rk_timer_rtc->clk);
+	clk_disable_unprepare(rk_timer_rtc->pclk);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int rk_timer_rtc_suspend(struct device *dev)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		enable_irq_wake(rk_timer_rtc->irq);
+
+	return 0;
+}
+
+static int rk_timer_rtc_resume(struct device *dev)
+{
+	struct rk_timer_rtc *rk_timer_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		disable_irq_wake(rk_timer_rtc->irq);
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(rk_timer_rtc_pm_ops, rk_timer_rtc_suspend,
+			 rk_timer_rtc_resume);
+
+static const struct rk_timer_rtc_data rk3288_timer_rtc_data = {
+	.ctrl_reg_offset = TIMER_CONTROL_REG3288,
+};
+
+static const struct of_device_id rk_timer_rtc_dt_match[] = {
+	{
+		.compatible = "rockchip,rk3308-timer-rtc",
+		.data = &rk3288_timer_rtc_data,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(platform, rk_timer_rtc_dt_match);
+
+static struct platform_driver rk_timer_rtc_driver = {
+	.probe = rk_timer_rtc_probe,
+	.remove = rk_timer_rtc_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.pm = &rk_timer_rtc_pm_ops,
+		.of_match_table = of_match_ptr(rk_timer_rtc_dt_match),
+	},
+};
+
+module_platform_driver(rk_timer_rtc_driver);
+
+MODULE_DESCRIPTION("RTC driver for the rockchip timer");
+MODULE_AUTHOR("Jeffy Chen <jeffy.chen@rock-chips.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRV_NAME);

From 1f253aa103f9046b16e45ab6e6c4f6e2ac1fbbf2 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 22 Aug 2018 20:56:53 +0800
Subject: [PATCH 1156/1852] arm64: dts: rk3308: Add rk-timer-rtc

Change-Id: Icc2b598936b3daa2a2b8138315b0cc8f71c91733
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 4f90abd091a11..c2bef21bb64b7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -649,12 +649,21 @@
 
 	rktimer: rktimer@ff1a0000 {
 		compatible = "rockchip,rk3288-timer";
-		reg = <0x0 0xff1a0000 0x0 0x1000>;
+		reg = <0x0 0xff1a0000 0x0 0x20>;
 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
 		clock-names = "pclk", "timer";
 	};
 
+	rk_timer_rtc: rk-timer-rtc@ff1a0020 {
+		compatible = "rockchip,rk3308-timer-rtc";
+		reg = <0x0 0xff1a0020 0x0 0x20>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
+		clock-names = "pclk", "timer";
+		status = "disabled";
+	};
+
 	saradc: saradc@ff1e0000 {
 		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff1e0000 0x0 0x100>;

From e4dd6236371b4ba9b41fa1d18ff13a42e319d3f7 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 22 Aug 2018 21:43:51 +0800
Subject: [PATCH 1157/1852] arm: dts: rk3308-voice-module-v10-aarch32: Enable
 rk-timer-rtc

Change-Id: I03aa02ef32171d7619f3a1da10bbc952b7d31083
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 1b1d97dc8e642..78312609f2de8 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -243,6 +243,10 @@
 	console-size = <0x0 0x20000>;
 };
 
+&rk_timer_rtc {
+	status = "okay";
+};
+
 &rockchip_suspend {
 	rockchip,pwm-regulator-config = <
 		(0

From 9a50544ca97c0f64a5604a739299b7d1d714e4ad Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Thu, 23 Aug 2018 12:08:59 +0800
Subject: [PATCH 1158/1852] arm: rk3308_linux_aarch32[_debug]_defconfig: enable
 RTC_DRV_RK_TIMER

Change-Id: Ibfe9105c8785a66745d928f60e54fcbedd200f30
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 1 +
 arch/arm/configs/rk3308_linux_aarch32_defconfig       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index 186a224d77d61..eb0eabeef1022 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -185,6 +185,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_LEDS_TRIGGER_MULTI_CTRL=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_RK808=y
+CONFIG_RTC_DRV_RK_TIMER=y
 CONFIG_DMADEVICES=y
 CONFIG_PL330_DMA=y
 CONFIG_STAGING=y
diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index b480660d23bea..87b36e4a77b99 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -180,6 +180,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_LEDS_TRIGGER_MULTI_CTRL=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RK_TIMER=y
 CONFIG_DMADEVICES=y
 CONFIG_PL330_DMA=y
 CONFIG_STAGING=y

From d9be1029f5c01ad17dd3eeef7d1c3c1a0e4e0fa5 Mon Sep 17 00:00:00 2001
From: Cherry Chen <cherry.chen@rock-chips.com>
Date: Thu, 23 Aug 2018 17:35:36 +0800
Subject: [PATCH 1159/1852] ARM: dts: rockchip: Put the order of aloop card
 backwards for rk3308 board

For keep other sounds card order, the aloop card index set 7.

Change-Id: Id54369abdd6c4e48679647fe50d84cfe5bcd061b
Signed-off-by: Cherry Chen <cherry.chen@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts     | 2 +-
 arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts           | 2 +-
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
index 4aa622f596bbc..1640fb90c6784 100644
--- a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
@@ -13,7 +13,7 @@
 	compatible = "rockchip,rk3308-dot-rk816-v10-aarch32", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	acodec_sound: acodec-sound {
diff --git a/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
index 813a2d0fded4e..02d0c48006b88 100644
--- a/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-dot-v10-aarch32.dts
@@ -13,7 +13,7 @@
 	compatible = "rockchip,rk3308-dot-v10-aarch32", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	acodec_sound: acodec-sound {
diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 78312609f2de8..3b075ee653fe7 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -11,7 +11,7 @@
 	compatible = "rockchip,rk3308-vmb-v10", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	adc-keys {

From 8f55efcb2f6f2c11eb0cf8210d96f8bf6d6ef44a Mon Sep 17 00:00:00 2001
From: Cherry Chen <cherry.chen@rock-chips.com>
Date: Thu, 23 Aug 2018 17:40:28 +0800
Subject: [PATCH 1160/1852] arm64: dts: rockchip: Put the order of aloop card
 backwards for rk3308 board

For keep other sounds card order, the aloop card index set 7.

Change-Id: I7336ac17dfeba67fc0c5c52429d9a74e9856e7e9
Signed-off-by: Cherry Chen <cherry.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-ai-va-v10.dts | 2 +-
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi  | 2 +-
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-ai-va-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-ai-va-v10.dts
index f416d59b0ccdc..dd519ce7763dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-ai-va-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-ai-va-v10.dts
@@ -13,7 +13,7 @@
 	compatible = "rockchip,rk3308-ai-va-v10", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	adc-keys0 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index d10f5442550b1..40f44013fe5b0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -12,7 +12,7 @@
 	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	adc-keys0 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 8028d5f094ce8..4e8885d73e334 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -11,7 +11,7 @@
 	compatible = "rockchip,rk3308-evb-v11", "rockchip,rk3308";
 
 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xff0c0000 swiotlb=1 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=squashfs rootwait snd_aloop.index=7";
 	};
 
 	adc-keys {

From 539c06e89d4f747af31321d571e24dcb82ce2420 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 22 Aug 2018 21:28:34 +0800
Subject: [PATCH 1161/1852] video: rockchip: vpu: Fix core and cabac rate error
 when high temperature

Fixes: 5bc582df48e4 ("video: rockchip: vpu: Add devfreq feature")
Change-Id: I0af1c64f778059a5f42e88ad9316f65f4c554fb9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/video/rockchip/vcodec/vcodec_service.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index f14b353285b7f..d151d6b978b50 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -2320,8 +2320,8 @@ static void rkvdec_set_clk(struct vpu_service_info *pservice,
 			clk_set_rate(pservice->clk_cabac, cabac_rate);
 		} else {
 			clk_set_rate(pservice->aclk_vcodec, vcodec_rate / div);
-			clk_set_rate(pservice->clk_core, vcodec_rate / div);
-			clk_set_rate(pservice->clk_cabac, vcodec_rate / div);
+			clk_set_rate(pservice->clk_core, core_rate / div);
+			clk_set_rate(pservice->clk_cabac, cabac_rate / div);
 		}
 		pservice->vcodec_rate = vcodec_rate;
 		pservice->core_rate = core_rate;

From 4171c743bbfb78f745affe426173b77ebb299324 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Thu, 9 Aug 2018 20:04:06 +0800
Subject: [PATCH 1162/1852] media: rockchip: isp1: change isp reset and
 attach/detach iommu

1. change isp reset to "asynchronous system reset"
If some errors is happened, isp can not return to normal state
without "asynchronous system reset".

2. change the way of attach/detach iommu
As the modification of 1), isp will be reset by "asynchronous system reset"
when isp subdev is stop, so iommu is need to detach and reattach.

Now we detach/attach iommu not only when suspend/resume system, but also after isp is reset.
To handle the two cases together, we remove the function of detach/attach iommu
when suspend/resume system, add the function of attach iommu when first stream is opened
and detach iommu when last stream is closed.

Change-Id: If1aa191c9cf6a7f0b7e97da481922ffbae1fd87d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 .../media/platform/rockchip/isp1/capture.c    | 63 ++++++++++++++++++-
 drivers/media/platform/rockchip/isp1/dev.c    | 36 +----------
 drivers/media/platform/rockchip/isp1/dev.h    |  1 +
 drivers/media/platform/rockchip/isp1/rkisp1.c |  4 +-
 4 files changed, 66 insertions(+), 38 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index 5cf6bd7f98d26..6a6e9705e7d52 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -40,6 +40,7 @@
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-subdev.h>
 #include <media/videobuf2-dma-contig.h>
+#include <linux/dma-iommu.h>
 #include "dev.h"
 #include "regs.h"
 
@@ -1379,6 +1380,64 @@ static void rkisp1_set_fmt(struct rkisp1_stream *stream,
 	}
 }
 
+static int rkisp1_dma_attach_device(struct rkisp1_device *rkisp1_dev)
+{
+	struct iommu_domain *domain = rkisp1_dev->domain;
+	struct device *dev = rkisp1_dev->dev;
+	int ret;
+
+	ret = iommu_attach_device(domain, dev);
+	if (ret) {
+		dev_err(dev, "Failed to attach iommu device\n");
+		return ret;
+	}
+
+	if (!common_iommu_setup_dma_ops(dev, 0x10000000, SZ_2G, domain->ops)) {
+		dev_err(dev, "Failed to set dma_ops\n");
+		iommu_detach_device(domain, dev);
+		ret = -ENODEV;
+	}
+
+	return ret;
+}
+
+static void rkisp1_dma_detach_device(struct rkisp1_device *rkisp1_dev)
+{
+	struct iommu_domain *domain = rkisp1_dev->domain;
+	struct device *dev = rkisp1_dev->dev;
+
+	iommu_detach_device(domain, dev);
+}
+
+static int rkisp1_fh_open(struct file *filp)
+{
+	struct rkisp1_stream *stream = video_drvdata(filp);
+	struct rkisp1_device *dev = stream->ispdev;
+	int ret;
+
+	ret = v4l2_fh_open(filp);
+	if (!ret) {
+		if (atomic_inc_return(&dev->open_cnt) == 1)
+			rkisp1_dma_attach_device(dev);
+	}
+
+	return ret;
+}
+
+static int rkisp1_fop_release(struct file *file)
+{
+	struct rkisp1_stream *stream = video_drvdata(file);
+	struct rkisp1_device *dev = stream->ispdev;
+	int ret;
+
+	ret = vb2_fop_release(file);
+
+	if (atomic_dec_return(&dev->open_cnt) == 0)
+		rkisp1_dma_detach_device(dev);
+
+	return ret;
+}
+
 /************************* v4l2_file_operations***************************/
 void rkisp1_stream_init(struct rkisp1_device *dev, u32 id)
 {
@@ -1415,8 +1474,8 @@ void rkisp1_stream_init(struct rkisp1_device *dev, u32 id)
 }
 
 static const struct v4l2_file_operations rkisp1_fops = {
-	.open = v4l2_fh_open,
-	.release = vb2_fop_release,
+	.open = rkisp1_fh_open,
+	.release = rkisp1_fop_release,
 	.unlocked_ioctl = video_ioctl2,
 	.poll = vb2_fop_poll,
 	.mmap = vb2_fop_mmap,
diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 2670285b9671d..86bb038720fda 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -636,16 +636,6 @@ static int rkisp1_iommu_init(struct rkisp1_device *rkisp1_dev)
 			goto err;
 	}
 
-	ret = iommu_attach_device(rkisp1_dev->domain, rkisp1_dev->dev);
-	if (ret)
-		goto err;
-	if (!common_iommu_setup_dma_ops(rkisp1_dev->dev, 0x10000000,
-					SZ_2G, rkisp1_dev->domain->ops)) {
-		iommu_detach_device(rkisp1_dev->domain, rkisp1_dev->dev);
-		ret = -ENODEV;
-		goto err;
-	}
-
 	return 0;
 
 err:
@@ -656,7 +646,6 @@ static int rkisp1_iommu_init(struct rkisp1_device *rkisp1_dev)
 
 static void rkisp1_iommu_cleanup(struct rkisp1_device *rkisp1_dev)
 {
-	iommu_detach_device(rkisp1_dev->domain, rkisp1_dev->dev);
 	iommu_domain_free(rkisp1_dev->domain);
 }
 
@@ -712,6 +701,7 @@ static int rkisp1_plat_probe(struct platform_device *pdev)
 
 	atomic_set(&isp_dev->pipe.power_cnt, 0);
 	atomic_set(&isp_dev->pipe.stream_cnt, 0);
+	atomic_set(&isp_dev->open_cnt, 0);
 	isp_dev->pipe.open = rkisp1_pipeline_open;
 	isp_dev->pipe.close = rkisp1_pipeline_close;
 	isp_dev->pipe.set_stream = rkisp1_pipeline_set_stream;
@@ -774,27 +764,6 @@ static int rkisp1_plat_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static int __maybe_unused rkisp1_suspend(struct device *dev)
-{
-	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
-
-	if (isp_dev->domain)
-		iommu_detach_device(isp_dev->domain, isp_dev->dev);
-
-	return 0;
-}
-
-static int __maybe_unused rkisp1_resume(struct device *dev)
-{
-	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
-	int ret = 0;
-
-	if (isp_dev->domain)
-		ret = iommu_attach_device(isp_dev->domain, isp_dev->dev);
-
-	return ret;
-}
-
 static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
 {
 	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
@@ -817,7 +786,8 @@ static int __maybe_unused rkisp1_runtime_resume(struct device *dev)
 }
 
 static const struct dev_pm_ops rkisp1_plat_pm_ops = {
-	SET_SYSTEM_SLEEP_PM_OPS(rkisp1_suspend, rkisp1_resume)
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
 	SET_RUNTIME_PM_OPS(rkisp1_runtime_suspend, rkisp1_runtime_resume, NULL)
 };
 
diff --git a/drivers/media/platform/rockchip/isp1/dev.h b/drivers/media/platform/rockchip/isp1/dev.h
index 36b2eac5cea91..8d117bfecdd94 100644
--- a/drivers/media/platform/rockchip/isp1/dev.h
+++ b/drivers/media/platform/rockchip/isp1/dev.h
@@ -125,6 +125,7 @@ struct rkisp1_device {
 	enum rkisp1_isp_ver isp_ver;
 	const unsigned int *clk_rate_tbl;
 	int num_clk_rate_tbl;
+	atomic_t open_cnt;
 };
 
 #endif
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 20e8267112547..54f2e04f51cf3 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -421,9 +421,7 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
 		 readl(base + CIF_ISP_CTRL),
 		 readl(base + CIF_MIPI_CTRL));
 
-	writel(CIF_IRCL_MIPI_SW_RST | CIF_IRCL_ISP_SW_RST | CIF_IRCL_MI_SW_RST,
-	       base + CIF_IRCL);
-	writel(0x0, base + CIF_IRCL);
+	writel(CIF_IRCL_CIF_SW_RST, base + CIF_IRCL);
 
 	return 0;
 }

From 2d83ee27d33dbeb4a7ef9bfdd8b60aea0bf44651 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Wed, 22 Aug 2018 18:14:45 +0800
Subject: [PATCH 1163/1852] dt-bindings: suspend: rk3308: add timer test
 control macro

Change-Id: If87cdc53f1fdeedf1b5cdfd5f867408ed8008a49
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 include/dt-bindings/suspend/rockchip-rk3308.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/suspend/rockchip-rk3308.h b/include/dt-bindings/suspend/rockchip-rk3308.h
index 17e6f6eab78ee..5aa2e6b5b9f4e 100644
--- a/include/dt-bindings/suspend/rockchip-rk3308.h
+++ b/include/dt-bindings/suspend/rockchip-rk3308.h
@@ -49,6 +49,7 @@
 /* Reserved to be add... */
 
 /* All for debug */
+#define RKPM_DBG_INT_TIMER_TEST		BIT(22)
 #define RKPM_DBG_WOARKAROUND		BIT(23)
 #define RKPM_DBG_VAD_INT_OFF		BIT(24)
 #define RKPM_DBG_CLK_UNGATE		BIT(25)

From 462b8044eee965008e4a7ff8152d3ef754166ceb Mon Sep 17 00:00:00 2001
From: Yifeng Zhao <zyf@rock-chips.com>
Date: Thu, 23 Aug 2018 16:34:08 +0800
Subject: [PATCH 1164/1852] drivers: rk_nand: fix android 9.0 block device
 count not mount issue

The android 9.0 scan block device type: platform, vbd and pci.
The old nand driver create nand device uevent in "sys/devices/
virtual/", android 9.0 could not support.
update new driver create nand device uevent in "sys/devices/
platform/ff3b0000.nandc/block/rknand0" to fix the issuex.

Change-Id: Idda634cc5584fb4a8b531fbbea481d1a08c63cca
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
---
 drivers/rk_nand/rk_nand_blk.c | 1 +
 drivers/rk_nand/rk_nand_blk.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/rk_nand/rk_nand_blk.c b/drivers/rk_nand/rk_nand_blk.c
index d015b511f0d20..967ec4ed25625 100644
--- a/drivers/rk_nand/rk_nand_blk.c
+++ b/drivers/rk_nand/rk_nand_blk.c
@@ -586,6 +586,7 @@ static int nand_add_dev(struct nand_blk_ops *nandr, struct nand_part *part)
 			 part->name);
 	} else {
 		gd->flags = GENHD_FL_EXT_DEVT;
+		gd->driverfs_dev = g_nand_device;
 		gd->minors = 255;
 		snprintf(gd->disk_name,
 			 sizeof(gd->disk_name),
diff --git a/drivers/rk_nand/rk_nand_blk.h b/drivers/rk_nand/rk_nand_blk.h
index 72b3f505abf89..dc4776fc5d6f4 100644
--- a/drivers/rk_nand/rk_nand_blk.h
+++ b/drivers/rk_nand/rk_nand_blk.h
@@ -48,6 +48,7 @@ struct nand_blk_ops {
 	struct module *owner;
 };
 
+extern struct device *g_nand_device;
 void rknand_dev_suspend(void);
 void rknand_dev_resume(void);
 void rknand_dev_shutdown(void);

From ced27c6ef32fd6f40fdf36c9c9ee83fe06213856 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 23 Aug 2018 17:09:42 +0800
Subject: [PATCH 1165/1852] drm/rockchip: rgb: add support output_mode config

Fixes: c3e45ba34c73 (drm/rockchip: rgb: add support output_mode config)
Change-Id: I97218a8551c24d3fee20ff89193985e7d334b40e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../display/rockchip/rockchip-rgb.txt         |  4 +-
 drivers/gpu/drm/rockchip/rockchip_rgb.c       | 56 ++++---------------
 2 files changed, 13 insertions(+), 47 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
index cb3e490a43f2e..346bfd3e3379a 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt
@@ -23,8 +23,6 @@ Their connections are modeled using the OF graph bindings specified in
 
 the panel described by:
 	Documentation/devicetree/bindings/display/panel/simple-panel.txt
-rgb-mode nodes described by:
-	Documentation/devicetree/bindings/display/panel/panel-rgb.txt
 Panel other required properties:
 - ports for remote rgb output.
 
@@ -33,7 +31,7 @@ Example:
 panel: panel {
 	compatible = "auo,b101ean01";
 	enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
-	rgb-mode = "p888";
+	bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
 
 	ports {
 		panel_in_rgb: endpoint {
diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c
index 0d47fa21234a5..a8211d2ce88c6 100644
--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c
@@ -44,31 +44,9 @@ struct rockchip_rgb {
 	struct drm_bridge *bridge;
 	struct drm_connector connector;
 	struct drm_encoder encoder;
-	int output_mode;
 	struct regmap *grf;
 };
 
-static inline int name_to_output_mode(const char *s)
-{
-	static const struct {
-		const char *name;
-		int format;
-	} formats[] = {
-		{ "p888", ROCKCHIP_OUT_MODE_P888 },
-		{ "p666", ROCKCHIP_OUT_MODE_P666 },
-		{ "p565", ROCKCHIP_OUT_MODE_P565 },
-		{ "s888", ROCKCHIP_OUT_MODE_S888 },
-		{ "s888_dummy", ROCKCHIP_OUT_MODE_S888_DUMMY }
-	};
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(formats); i++)
-		if (!strncmp(s, formats[i].name, strlen(formats[i].name)))
-			return formats[i].format;
-
-	return -EINVAL;
-}
-
 static enum drm_connector_status
 rockchip_rgb_connector_detect(struct drm_connector *connector, bool force)
 {
@@ -142,24 +120,29 @@ rockchip_rgb_encoder_atomic_check(struct drm_encoder *encoder,
 				   struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
-	struct rockchip_rgb *rgb = encoder_to_rgb(encoder);
 	struct drm_connector *connector = conn_state->connector;
 	struct drm_display_info *info = &connector->display_info;
 
-	s->output_mode = rgb->output_mode;
-	s->output_type = DRM_MODE_CONNECTOR_LVDS;
-
 	if (info->num_bus_formats)
 		s->bus_format = info->bus_formats[0];
 	else
 		s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 
-	if (s->bus_format == MEDIA_BUS_FMT_RGB666_1X18)
+	switch (s->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X18:
 		s->output_mode = ROCKCHIP_OUT_MODE_P666;
-	else if (s->bus_format == MEDIA_BUS_FMT_RGB565_1X16)
+		break;
+	case MEDIA_BUS_FMT_RGB565_1X16:
 		s->output_mode = ROCKCHIP_OUT_MODE_P565;
-	else
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	default:
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+		break;
+	}
+
+	s->output_type = DRM_MODE_CONNECTOR_LVDS;
 
 	return 0;
 }
@@ -200,7 +183,6 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 	struct device_node *remote = NULL;
 	struct device_node  *port, *endpoint;
 	u32 endpoint_id;
-	const char *name;
 	int ret = 0, child_count = 0;
 
 	rgb->drm_dev = drm_dev;
@@ -228,20 +210,6 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 		ret = -EPROBE_DEFER;
 		goto err_put_port;
 	}
-	if (rgb->panel)
-		remote = rgb->panel->dev->of_node;
-	else
-		remote = rgb->bridge->of_node;
-	if (of_property_read_string(remote, "rgb-mode", &name))
-		/* default set it as output mode P888 */
-		rgb->output_mode = ROCKCHIP_OUT_MODE_P888;
-	else
-		rgb->output_mode = name_to_output_mode(name);
-	if (rgb->output_mode < 0) {
-		DRM_DEV_ERROR(dev, "invalid rockchip,rgb-mode [%s]\n", name);
-		ret = rgb->output_mode;
-		goto err_put_remote;
-	}
 
 	encoder = &rgb->encoder;
 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,

From 4f341a7cbd0cbe50c15dd880d97dcc92310a602a Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 24 Aug 2018 09:54:27 +0800
Subject: [PATCH 1166/1852] arm64: dts: rockchip: rk3308-evb-ext-v10: remove
 unused properties from panel node

Change-Id: I33b97b8edf9c0a3b8ce7f113cbba172a95374e95
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-ext-v10.dtsi | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-ext-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-ext-v10.dtsi
index 16a1b50762d48..1c0e66384c16b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-ext-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-ext-v10.dtsi
@@ -52,7 +52,6 @@
 		enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
 		enable-delay-ms = <20>;
 		reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
-		reset-value = <0>;
 		reset-delay-ms = <10>;
 		prepare-delay-ms = <20>;
 		unprepare-delay-ms = <20>;
@@ -63,10 +62,6 @@
 		spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
 		width-mm = <217>;
 		height-mm = <136>;
-		rockchip,data-mapping = "vesa";
-		rockchip,data-width = <24>;
-		rockchip,output = "rgb";
-		rgb-mode = "p666";
 		status = "okay";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi_init_cmd>;

From 0fa16975dd986bf1667557242aa00705f835a9a3 Mon Sep 17 00:00:00 2001
From: Daniel Lezcano <daniel.lezcano@linaro.org>
Date: Thu, 2 Jun 2016 22:44:49 +0200
Subject: [PATCH 1167/1852] UPSTREAM: clk: Add missing clk_get_sys() stub

When compiling with the COMPILE_TEST option set, the clps711x does not
compile because of the clk_get_sys() noop stub missing.

Change-Id: I8bf02a5725f294e59164c3674f2e480a61084517
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit b81ea968706bdb5c2f2af62c5700573a32ab310a)
---
 include/linux/clk.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/linux/clk.h b/include/linux/clk.h
index 0df4a51e1a78d..834179f3fa72a 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -461,6 +461,10 @@ static inline struct clk *clk_get_parent(struct clk *clk)
 	return NULL;
 }
 
+static inline struct clk *clk_get_sys(const char *dev_id, const char *con_id)
+{
+	return NULL;
+}
 #endif
 
 /* clk_prepare_enable helps cases using clk_enable in non-atomic context. */

From e17e8c90e4e2f4d9a4466906c9498e3212e26d1a Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Date: Tue, 28 Jun 2016 13:25:04 +0200
Subject: [PATCH 1168/1852] UPSTREAM: clk: Provide notifier stubs when
 !COMMON_CLK

The clk notifier symbols are hidden by COMMON_CLK.  However on some
platforms HAVE_CLK might be set while COMMON_CLK not which leads to
compile test build errors like:

$ make.cross ARCH=sh
   drivers/devfreq/tegra-devfreq.c: In function 'tegra_actmon_rate_notify_cb':
>> drivers/devfreq/tegra-devfreq.c:391:16: error: 'POST_RATE_CHANGE' undeclared (first use in this function)
     if (action != POST_RATE_CHANGE)
                   ^
   drivers/devfreq/tegra-devfreq.c: In function 'tegra_devfreq_probe':
>> drivers/devfreq/tegra-devfreq.c:654:8: error: implicit declaration of function 'clk_notifier_register' [-Werror=implicit-function-declaration]
     err = clk_notifier_register(tegra->emc_clock, &tegra->rate_change_nb);
           ^

Export the macros and data type declarations outside of COMMON_CLK ifdef
and provide stubs to fix the compile testing.

Change-Id: I1172439272d961be2ed38f4857f1c646c9a4e651
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit e81b87d22a8fed6bac24197972c9c394a2b92b5d)
---
 include/linux/clk.h | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/include/linux/clk.h b/include/linux/clk.h
index 834179f3fa72a..123c02788807f 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -20,8 +20,6 @@ struct device;
 
 struct clk;
 
-#ifdef CONFIG_COMMON_CLK
-
 /**
  * DOC: clk notifier callback types
  *
@@ -78,6 +76,8 @@ struct clk_notifier_data {
 	unsigned long		new_rate;
 };
 
+#ifdef CONFIG_COMMON_CLK
+
 /**
  * clk_notifier_register: register a clock rate-change notifier callback
  * @clk: clock whose rate we are interested in
@@ -140,6 +140,18 @@ bool clk_is_match(const struct clk *p, const struct clk *q);
 
 #else
 
+static inline int clk_notifier_register(struct clk *clk,
+					struct notifier_block *nb)
+{
+	return -ENOTSUPP;
+}
+
+static inline int clk_notifier_unregister(struct clk *clk,
+					  struct notifier_block *nb)
+{
+	return -ENOTSUPP;
+}
+
 static inline long clk_get_accuracy(struct clk *clk)
 {
 	return -ENOTSUPP;

From 7e6c448c339b969e743288ae7cba31ce7f5a2062 Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Date: Mon, 5 Dec 2016 05:23:20 +0000
Subject: [PATCH 1169/1852] UPSTREAM: clk: add devm_get_clk_from_child() API

Some driver is using this type of DT bindings for clock (more detail,
see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt).

	sound_soc {
		...
		cpu {
			clocks = <&xxx>;
			...
		};
		codec {
			clocks = <&xxx>;
			...
		};
	};

Current driver in this case uses of_clk_get() for each node, but there
is no devm_of_clk_get() today.
OTOH, the problem of having devm_of_clk_get() is that it encourages the
use of of_clk_get() when clk_get() is more desirable.

Thus, this patch adds new devm_get_clk_from_chile() which explicitly
reads as get a clock from a child node of this device.
By this function, we can also use this type of DT bindings

	sound_soc {
		clocks = <&xxx>, <&xxx>;
		clock-names = "cpu", "codec";
		clock-ranges;
		...
		cpu {
			...
		};
		codec {
			...
		};
	};

Change-Id: Ie5b3bf7bda683a47ff07bea85982e916db12a1cb
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[sboyd@codeurora.org: Rename subject to clk + add API]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 71a2f11511b4d1dc8b8e326e10ec6533b534ddf1)
---
 drivers/clk/clk-devres.c | 21 +++++++++++++++++++++
 include/linux/clk.h      | 29 +++++++++++++++++++++++++----
 2 files changed, 46 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
index 8f571548870f4..3a218c3a06ae8 100644
--- a/drivers/clk/clk-devres.c
+++ b/drivers/clk/clk-devres.c
@@ -53,3 +53,24 @@ void devm_clk_put(struct device *dev, struct clk *clk)
 	WARN_ON(ret);
 }
 EXPORT_SYMBOL(devm_clk_put);
+
+struct clk *devm_get_clk_from_child(struct device *dev,
+				    struct device_node *np, const char *con_id)
+{
+	struct clk **ptr, *clk;
+
+	ptr = devres_alloc(devm_clk_release, sizeof(*ptr), GFP_KERNEL);
+	if (!ptr)
+		return ERR_PTR(-ENOMEM);
+
+	clk = of_clk_get_by_name(np, con_id);
+	if (!IS_ERR(clk)) {
+		*ptr = clk;
+		devres_add(dev, ptr);
+	} else {
+		devres_free(ptr);
+	}
+
+	return clk;
+}
+EXPORT_SYMBOL(devm_get_clk_from_child);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 123c02788807f..e9d36b3e49de5 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -17,8 +17,9 @@
 #include <linux/notifier.h>
 
 struct device;
-
 struct clk;
+struct device_node;
+struct of_phandle_args;
 
 /**
  * DOC: clk notifier callback types
@@ -248,6 +249,23 @@ struct clk *clk_get(struct device *dev, const char *id);
  */
 struct clk *devm_clk_get(struct device *dev, const char *id);
 
+/**
+ * devm_get_clk_from_child - lookup and obtain a managed reference to a
+ *			     clock producer from child node.
+ * @dev: device for clock "consumer"
+ * @np: pointer to clock consumer node
+ * @con_id: clock consumer ID
+ *
+ * This function parses the clocks, and uses them to look up the
+ * struct clk from the registered list of clock providers by using
+ * @np and @con_id
+ *
+ * The clock will automatically be freed when the device is unbound
+ * from the bus.
+ */
+struct clk *devm_get_clk_from_child(struct device *dev,
+				    struct device_node *np, const char *con_id);
+
 /**
  * clk_enable - inform the system when the clock source should be running.
  * @clk: clock source
@@ -432,6 +450,12 @@ static inline struct clk *devm_clk_get(struct device *dev, const char *id)
 	return NULL;
 }
 
+static inline struct clk *devm_get_clk_from_child(struct device *dev,
+				struct device_node *np, const char *con_id)
+{
+	return NULL;
+}
+
 static inline void clk_put(struct clk *clk) {}
 
 static inline void devm_clk_put(struct device *dev, struct clk *clk) {}
@@ -501,9 +525,6 @@ static inline void clk_disable_unprepare(struct clk *clk)
 	clk_unprepare(clk);
 }
 
-struct device_node;
-struct of_phandle_args;
-
 #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
 struct clk *of_clk_get(struct device_node *np, int index);
 struct clk *of_clk_get_by_name(struct device_node *np, const char *name);

From ed48ca586f30791c083c2ad93a7dbe0ec5bc7348 Mon Sep 17 00:00:00 2001
From: Dong Aisheng <aisheng.dong@nxp.com>
Date: Fri, 19 May 2017 21:49:04 +0800
Subject: [PATCH 1170/1852] UPSTREAM: clk: add clk_bulk_get accessories

These helper function allows drivers to get several clk consumers in
one operation. If any of the clk cannot be acquired then any clks
that were got will be put before returning to the caller.

This can relieve the driver owners' life who needs to handle many clocks,
as well as each clock error reporting.

Change-Id: I6dd3e713af340be51b29c7dc852c1d51ee090c32
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: Octavian Purdila <octavian.purdila@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 266e4e9d9150e98141b85c7400f8aa3cd57a7f9b)
---
 drivers/clk/Makefile   |   2 +-
 drivers/clk/clk-bulk.c | 157 +++++++++++++++++++++++++++++++++++++++++
 include/linux/clk.h    | 111 +++++++++++++++++++++++++++++
 3 files changed, 269 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/clk-bulk.c

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index af9e9aff49e55..e126e9b146b4d 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,5 +1,5 @@
 # common clock types
-obj-$(CONFIG_HAVE_CLK)		+= clk-devres.o
+obj-$(CONFIG_HAVE_CLK)		+= clk-devres.o clk-bulk.o
 obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 obj-$(CONFIG_COMMON_CLK)	+= clk.o
 obj-$(CONFIG_COMMON_CLK)	+= clk-divider.o
diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c
new file mode 100644
index 0000000000000..c834f5abfc497
--- /dev/null
+++ b/drivers/clk/clk-bulk.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * Dong Aisheng <aisheng.dong@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/export.h>
+
+void clk_bulk_put(int num_clks, struct clk_bulk_data *clks)
+{
+	while (--num_clks >= 0) {
+		clk_put(clks[num_clks].clk);
+		clks[num_clks].clk = NULL;
+	}
+}
+EXPORT_SYMBOL_GPL(clk_bulk_put);
+
+int __must_check clk_bulk_get(struct device *dev, int num_clks,
+			      struct clk_bulk_data *clks)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < num_clks; i++)
+		clks[i].clk = NULL;
+
+	for (i = 0; i < num_clks; i++) {
+		clks[i].clk = clk_get(dev, clks[i].id);
+		if (IS_ERR(clks[i].clk)) {
+			ret = PTR_ERR(clks[i].clk);
+			dev_err(dev, "Failed to get clk '%s': %d\n",
+				clks[i].id, ret);
+			clks[i].clk = NULL;
+			goto err;
+		}
+	}
+
+	return 0;
+
+err:
+	clk_bulk_put(i, clks);
+
+	return ret;
+}
+EXPORT_SYMBOL(clk_bulk_get);
+
+#ifdef CONFIG_HAVE_CLK_PREPARE
+
+/**
+ * clk_bulk_unprepare - undo preparation of a set of clock sources
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table being unprepared
+ *
+ * clk_bulk_unprepare may sleep, which differentiates it from clk_bulk_disable.
+ * Returns 0 on success, -EERROR otherwise.
+ */
+void clk_bulk_unprepare(int num_clks, const struct clk_bulk_data *clks)
+{
+	while (--num_clks >= 0)
+		clk_unprepare(clks[num_clks].clk);
+}
+EXPORT_SYMBOL_GPL(clk_bulk_unprepare);
+
+/**
+ * clk_bulk_prepare - prepare a set of clocks
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table being prepared
+ *
+ * clk_bulk_prepare may sleep, which differentiates it from clk_bulk_enable.
+ * Returns 0 on success, -EERROR otherwise.
+ */
+int __must_check clk_bulk_prepare(int num_clks,
+				  const struct clk_bulk_data *clks)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < num_clks; i++) {
+		ret = clk_prepare(clks[i].clk);
+		if (ret) {
+			pr_err("Failed to prepare clk '%s': %d\n",
+				clks[i].id, ret);
+			goto err;
+		}
+	}
+
+	return 0;
+
+err:
+	clk_bulk_unprepare(i, clks);
+
+	return  ret;
+}
+
+#endif /* CONFIG_HAVE_CLK_PREPARE */
+
+/**
+ * clk_bulk_disable - gate a set of clocks
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table being gated
+ *
+ * clk_bulk_disable must not sleep, which differentiates it from
+ * clk_bulk_unprepare. clk_bulk_disable must be called before
+ * clk_bulk_unprepare.
+ */
+void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks)
+{
+
+	while (--num_clks >= 0)
+		clk_disable(clks[num_clks].clk);
+}
+EXPORT_SYMBOL_GPL(clk_bulk_disable);
+
+/**
+ * clk_bulk_enable - ungate a set of clocks
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table being ungated
+ *
+ * clk_bulk_enable must not sleep
+ * Returns 0 on success, -EERROR otherwise.
+ */
+int __must_check clk_bulk_enable(int num_clks, const struct clk_bulk_data *clks)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < num_clks; i++) {
+		ret = clk_enable(clks[i].clk);
+		if (ret) {
+			pr_err("Failed to enable clk '%s': %d\n",
+				clks[i].id, ret);
+			goto err;
+		}
+	}
+
+	return 0;
+
+err:
+	clk_bulk_disable(i, clks);
+
+	return  ret;
+}
+EXPORT_SYMBOL_GPL(clk_bulk_enable);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index e9d36b3e49de5..1201944eb26f2 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -77,6 +77,21 @@ struct clk_notifier_data {
 	unsigned long		new_rate;
 };
 
+/**
+ * struct clk_bulk_data - Data used for bulk clk operations.
+ *
+ * @id: clock consumer ID
+ * @clk: struct clk * to store the associated clock
+ *
+ * The CLK APIs provide a series of clk_bulk_() API calls as
+ * a convenience to consumers which require multiple clks.  This
+ * structure is used to manage data for these calls.
+ */
+struct clk_bulk_data {
+	const char		*id;
+	struct clk		*clk;
+};
+
 #ifdef CONFIG_COMMON_CLK
 
 /**
@@ -185,12 +200,20 @@ static inline bool clk_is_match(const struct clk *p, const struct clk *q)
  */
 #ifdef CONFIG_HAVE_CLK_PREPARE
 int clk_prepare(struct clk *clk);
+int __must_check clk_bulk_prepare(int num_clks,
+				  const struct clk_bulk_data *clks);
 #else
 static inline int clk_prepare(struct clk *clk)
 {
 	might_sleep();
 	return 0;
 }
+
+static inline int clk_bulk_prepare(int num_clks, struct clk_bulk_data *clks)
+{
+	might_sleep();
+	return 0;
+}
 #endif
 
 /**
@@ -204,11 +227,16 @@ static inline int clk_prepare(struct clk *clk)
  */
 #ifdef CONFIG_HAVE_CLK_PREPARE
 void clk_unprepare(struct clk *clk);
+void clk_bulk_unprepare(int num_clks, const struct clk_bulk_data *clks);
 #else
 static inline void clk_unprepare(struct clk *clk)
 {
 	might_sleep();
 }
+static inline void clk_bulk_unprepare(int num_clks, struct clk_bulk_data *clks)
+{
+	might_sleep();
+}
 #endif
 
 #ifdef CONFIG_HAVE_CLK
@@ -229,6 +257,29 @@ static inline void clk_unprepare(struct clk *clk)
  */
 struct clk *clk_get(struct device *dev, const char *id);
 
+/**
+ * clk_bulk_get - lookup and obtain a number of references to clock producer.
+ * @dev: device for clock "consumer"
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table of consumer
+ *
+ * This helper function allows drivers to get several clk consumers in one
+ * operation. If any of the clk cannot be acquired then any clks
+ * that were obtained will be freed before returning to the caller.
+ *
+ * Returns 0 if all clocks specified in clk_bulk_data table are obtained
+ * successfully, or valid IS_ERR() condition containing errno.
+ * The implementation uses @dev and @clk_bulk_data.id to determine the
+ * clock consumer, and thereby the clock producer.
+ * The clock returned is stored in each @clk_bulk_data.clk field.
+ *
+ * Drivers must assume that the clock source is not enabled.
+ *
+ * clk_bulk_get should not be called from within interrupt context.
+ */
+int __must_check clk_bulk_get(struct device *dev, int num_clks,
+			      struct clk_bulk_data *clks);
+
 /**
  * devm_clk_get - lookup and obtain a managed reference to a clock producer.
  * @dev: device for clock "consumer"
@@ -278,6 +329,18 @@ struct clk *devm_get_clk_from_child(struct device *dev,
  */
 int clk_enable(struct clk *clk);
 
+/**
+ * clk_bulk_enable - inform the system when the set of clks should be running.
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table of consumer
+ *
+ * May be called from atomic contexts.
+ *
+ * Returns success (0) or negative errno.
+ */
+int __must_check clk_bulk_enable(int num_clks,
+				 const struct clk_bulk_data *clks);
+
 /**
  * clk_disable - inform the system when the clock source is no longer required.
  * @clk: clock source
@@ -294,6 +357,24 @@ int clk_enable(struct clk *clk);
  */
 void clk_disable(struct clk *clk);
 
+/**
+ * clk_bulk_disable - inform the system when the set of clks is no
+ *		      longer required.
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table of consumer
+ *
+ * Inform the system that a set of clks is no longer required by
+ * a driver and may be shut down.
+ *
+ * May be called from atomic contexts.
+ *
+ * Implementation detail: if the set of clks is shared between
+ * multiple drivers, clk_bulk_enable() calls must be balanced by the
+ * same number of clk_bulk_disable() calls for the clock source to be
+ * disabled.
+ */
+void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks);
+
 /**
  * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
  *		  This is only valid once the clock source has been enabled.
@@ -313,6 +394,19 @@ unsigned long clk_get_rate(struct clk *clk);
  */
 void clk_put(struct clk *clk);
 
+/**
+ * clk_bulk_put	- "free" the clock source
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table of consumer
+ *
+ * Note: drivers must ensure that all clk_bulk_enable calls made on this
+ * clock source are balanced by clk_bulk_disable calls prior to calling
+ * this function.
+ *
+ * clk_bulk_put should not be called from within interrupt context.
+ */
+void clk_bulk_put(int num_clks, struct clk_bulk_data *clks);
+
 /**
  * devm_clk_put	- "free" a managed clock source
  * @dev: device used to acquire the clock
@@ -445,6 +539,12 @@ static inline struct clk *clk_get(struct device *dev, const char *id)
 	return NULL;
 }
 
+static inline int clk_bulk_get(struct device *dev, int num_clks,
+			       struct clk_bulk_data *clks)
+{
+	return 0;
+}
+
 static inline struct clk *devm_clk_get(struct device *dev, const char *id)
 {
 	return NULL;
@@ -458,6 +558,8 @@ static inline struct clk *devm_get_clk_from_child(struct device *dev,
 
 static inline void clk_put(struct clk *clk) {}
 
+static inline void clk_bulk_put(int num_clks, struct clk_bulk_data *clks) {}
+
 static inline void devm_clk_put(struct device *dev, struct clk *clk) {}
 
 static inline int clk_enable(struct clk *clk)
@@ -465,8 +567,17 @@ static inline int clk_enable(struct clk *clk)
 	return 0;
 }
 
+static inline int clk_bulk_enable(int num_clks, struct clk_bulk_data *clks)
+{
+	return 0;
+}
+
 static inline void clk_disable(struct clk *clk) {}
 
+
+static inline void clk_bulk_disable(int num_clks,
+				    struct clk_bulk_data *clks) {}
+
 static inline unsigned long clk_get_rate(struct clk *clk)
 {
 	return 0;

From 34992bfab1786ddcc20823e4a0a5551031431fbd Mon Sep 17 00:00:00 2001
From: Dong Aisheng <aisheng.dong@nxp.com>
Date: Fri, 19 May 2017 21:49:05 +0800
Subject: [PATCH 1171/1852] UPSTREAM: clk: add managed version of clk_bulk_get

This patch introduces the managed version of clk_bulk_get.

Change-Id: Idd7ef3cb3825573821c9b7736ad459e8a4e25beb
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: Octavian Purdila <octavian.purdila@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 618aee02e2f57042f4cdeab228caf631e524b281)
---
 drivers/clk/clk-devres.c | 36 ++++++++++++++++++++++++++++++++++++
 include/linux/clk.h      | 21 +++++++++++++++++++++
 2 files changed, 57 insertions(+)

diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
index 3a218c3a06ae8..d854e26a8ddbc 100644
--- a/drivers/clk/clk-devres.c
+++ b/drivers/clk/clk-devres.c
@@ -34,6 +34,42 @@ struct clk *devm_clk_get(struct device *dev, const char *id)
 }
 EXPORT_SYMBOL(devm_clk_get);
 
+struct clk_bulk_devres {
+	struct clk_bulk_data *clks;
+	int num_clks;
+};
+
+static void devm_clk_bulk_release(struct device *dev, void *res)
+{
+	struct clk_bulk_devres *devres = res;
+
+	clk_bulk_put(devres->num_clks, devres->clks);
+}
+
+int __must_check devm_clk_bulk_get(struct device *dev, int num_clks,
+		      struct clk_bulk_data *clks)
+{
+	struct clk_bulk_devres *devres;
+	int ret;
+
+	devres = devres_alloc(devm_clk_bulk_release,
+			      sizeof(*devres), GFP_KERNEL);
+	if (!devres)
+		return -ENOMEM;
+
+	ret = clk_bulk_get(dev, num_clks, clks);
+	if (!ret) {
+		devres->clks = clks;
+		devres->num_clks = num_clks;
+		devres_add(dev, devres);
+	} else {
+		devres_free(devres);
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(devm_clk_bulk_get);
+
 static int devm_clk_match(struct device *dev, void *res, void *data)
 {
 	struct clk **c = res;
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 1201944eb26f2..1ebccf3664855 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -280,6 +280,21 @@ struct clk *clk_get(struct device *dev, const char *id);
 int __must_check clk_bulk_get(struct device *dev, int num_clks,
 			      struct clk_bulk_data *clks);
 
+/**
+ * devm_clk_bulk_get - managed get multiple clk consumers
+ * @dev: device for clock "consumer"
+ * @num_clks: the number of clk_bulk_data
+ * @clks: the clk_bulk_data table of consumer
+ *
+ * Return 0 on success, an errno on failure.
+ *
+ * This helper function allows drivers to get several clk
+ * consumers in one operation with management, the clks will
+ * automatically be freed when the device is unbound.
+ */
+int __must_check devm_clk_bulk_get(struct device *dev, int num_clks,
+				   struct clk_bulk_data *clks);
+
 /**
  * devm_clk_get - lookup and obtain a managed reference to a clock producer.
  * @dev: device for clock "consumer"
@@ -550,6 +565,12 @@ static inline struct clk *devm_clk_get(struct device *dev, const char *id)
 	return NULL;
 }
 
+static inline int devm_clk_bulk_get(struct device *dev, int num_clks,
+				    struct clk_bulk_data *clks)
+{
+	return 0;
+}
+
 static inline struct clk *devm_get_clk_from_child(struct device *dev,
 				struct device_node *np, const char *con_id)
 {

From 09177efc9efbe6b6652b034877e27129cfb67429 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Wed, 12 Jul 2017 15:04:16 -0700
Subject: [PATCH 1172/1852] UPSTREAM: clk: Provide bulk prepare_enable
 disable_unprepare variants

This extends the existing set of bulk helpers with prepare_enable and
disable_unprepare variants.

Change-Id: I38d42d5d028f3d096cbd5b7b8d369ff250f038dc
Cc: Russell King <linux@armlinux.org.uk>,
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 3c48d86cc959309ee168fb87737a8cb3f97c5224)
---
 include/linux/clk.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/include/linux/clk.h b/include/linux/clk.h
index 1ebccf3664855..d288a38e4a04f 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -657,6 +657,28 @@ static inline void clk_disable_unprepare(struct clk *clk)
 	clk_unprepare(clk);
 }
 
+static inline int clk_bulk_prepare_enable(int num_clks,
+					  struct clk_bulk_data *clks)
+{
+	int ret;
+
+	ret = clk_bulk_prepare(num_clks, clks);
+	if (ret)
+		return ret;
+	ret = clk_bulk_enable(num_clks, clks);
+	if (ret)
+		clk_bulk_unprepare(num_clks, clks);
+
+	return ret;
+}
+
+static inline void clk_bulk_disable_unprepare(int num_clks,
+					      struct clk_bulk_data *clks)
+{
+	clk_bulk_disable(num_clks, clks);
+	clk_bulk_unprepare(num_clks, clks);
+}
+
 #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
 struct clk *of_clk_get(struct device_node *np, int index);
 struct clk *of_clk_get_by_name(struct device_node *np, const char *name);

From c792aa2ad4311aa030dddde03d6d3ab07e5045f0 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Fri, 22 Sep 2017 22:00:29 -0700
Subject: [PATCH 1173/1852] UPSTREAM: clk: Export clk_bulk_prepare()

Allow clk_bulk_prepare() to be referenced by kernel modules by adding
the missing EXPORT_SYMBOL_GPL().

Change-Id: If3cc2a965cbecc98dd4b2f859265329d7b131235
Fixes: 266e4e9d9150 ("clk: add clk_bulk_get accessories")
Reported-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 9792bf5ad5e30b207274ccbb459a89eab6033b46)
---
 drivers/clk/clk-bulk.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c
index c834f5abfc497..4c10456f8a329 100644
--- a/drivers/clk/clk-bulk.c
+++ b/drivers/clk/clk-bulk.c
@@ -105,6 +105,7 @@ int __must_check clk_bulk_prepare(int num_clks,
 
 	return  ret;
 }
+EXPORT_SYMBOL_GPL(clk_bulk_prepare);
 
 #endif /* CONFIG_HAVE_CLK_PREPARE */
 

From 2696c007583a2bccaed17ba21135aff7ce73c5de Mon Sep 17 00:00:00 2001
From: Dong Aisheng <aisheng.dong@nxp.com>
Date: Tue, 23 Jan 2018 20:24:45 +0800
Subject: [PATCH 1174/1852] UPSTREAM: clk: add more __must_check for bulk APIs

we need it even when !CONFIG_HAVE_CLK because it allows
us to catch missing checking return values in the non-clk
compile configurations too. More test coverage.

Change-Id: Ibc620a329c849361dba72f41ff8a6f2f83d45abd
Cc: Stephen Boyd <sboyd@codeaurora.org>
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 6e0d4ff4580c1272f4e4860bf22841ef31fd31ba)
---
 include/linux/clk.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/linux/clk.h b/include/linux/clk.h
index d288a38e4a04f..d185d86b75cec 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -209,7 +209,7 @@ static inline int clk_prepare(struct clk *clk)
 	return 0;
 }
 
-static inline int clk_bulk_prepare(int num_clks, struct clk_bulk_data *clks)
+static inline int __must_check clk_bulk_prepare(int num_clks, struct clk_bulk_data *clks)
 {
 	might_sleep();
 	return 0;
@@ -554,8 +554,8 @@ static inline struct clk *clk_get(struct device *dev, const char *id)
 	return NULL;
 }
 
-static inline int clk_bulk_get(struct device *dev, int num_clks,
-			       struct clk_bulk_data *clks)
+static inline int __must_check clk_bulk_get(struct device *dev, int num_clks,
+					    struct clk_bulk_data *clks)
 {
 	return 0;
 }
@@ -565,8 +565,8 @@ static inline struct clk *devm_clk_get(struct device *dev, const char *id)
 	return NULL;
 }
 
-static inline int devm_clk_bulk_get(struct device *dev, int num_clks,
-				    struct clk_bulk_data *clks)
+static inline int __must_check devm_clk_bulk_get(struct device *dev, int num_clks,
+						 struct clk_bulk_data *clks)
 {
 	return 0;
 }
@@ -588,7 +588,7 @@ static inline int clk_enable(struct clk *clk)
 	return 0;
 }
 
-static inline int clk_bulk_enable(int num_clks, struct clk_bulk_data *clks)
+static inline int __must_check clk_bulk_enable(int num_clks, struct clk_bulk_data *clks)
 {
 	return 0;
 }
@@ -657,8 +657,8 @@ static inline void clk_disable_unprepare(struct clk *clk)
 	clk_unprepare(clk);
 }
 
-static inline int clk_bulk_prepare_enable(int num_clks,
-					  struct clk_bulk_data *clks)
+static inline int __must_check clk_bulk_prepare_enable(int num_clks,
+					struct clk_bulk_data *clks)
 {
 	int ret;
 

From d9a28acdc2954e530ed8954f7872ab8e23a10bc9 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 9 Apr 2018 16:13:03 +0200
Subject: [PATCH 1175/1852] UPSTREAM: clk: bulk: silently error out on
 EPROBE_DEFER

In clk_bulk_get(), if we fail to get the clock due to probe deferal, we
shouldn't print an error message. Just be silent in this case.

Change-Id: I48eff4c17c48e336aafc0d4faf21e56d3e2e61be
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 329470f2d5447f76088250d7b7fbc1f9b175ccfc)
---
 drivers/clk/clk-bulk.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c
index 4c10456f8a329..6904ed6da504b 100644
--- a/drivers/clk/clk-bulk.c
+++ b/drivers/clk/clk-bulk.c
@@ -42,8 +42,9 @@ int __must_check clk_bulk_get(struct device *dev, int num_clks,
 		clks[i].clk = clk_get(dev, clks[i].id);
 		if (IS_ERR(clks[i].clk)) {
 			ret = PTR_ERR(clks[i].clk);
-			dev_err(dev, "Failed to get clk '%s': %d\n",
-				clks[i].id, ret);
+			if (ret != -EPROBE_DEFER)
+				dev_err(dev, "Failed to get clk '%s': %d\n",
+					clks[i].id, ret);
 			clks[i].clk = NULL;
 			goto err;
 		}

From e256d18109a7eeb9fb0b523edb541c5e074cf920 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 3 Aug 2018 19:41:20 +0800
Subject: [PATCH 1176/1852] arm64: dts: rockchip: rk3308-evb-amic-*: enable vad
 card default

Change-Id: I71958666fdb860952f33e68ab247b014b0b3a9f1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 .../boot/dts/rockchip/rk3308-evb-amic-v10.dts      | 14 ++++++++++++--
 .../boot/dts/rockchip/rk3308-evb-amic-v11.dts      | 14 ++++++++++++--
 2 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
index a2ee26b73f730..3b95d43c39002 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
@@ -13,7 +13,7 @@
 	compatible = "rockchip,rk3308-evb-amic-v10", "rockchip,rk3308";
 
 	vad_acodec_sound: vad-acodec-sound {
-		status = "disabled";
+		status = "okay";
 		compatible = "rockchip,multicodecs-card";
 		rockchip,card-name = "rockchip,rk3308-vad";
 		rockchip,codec-hp-det;
@@ -23,6 +23,15 @@
 	};
 };
 
+&acodec {
+	rockchip,no-deep-low-power;
+	rockchip,en-always-grps = <0 1 2 3>;
+};
+
+&acodec_sound {
+	status = "disabled";
+};
+
 &bluetooth_sound {
 	status = "okay";
 };
@@ -38,8 +47,9 @@
 };
 
 &vad {
-	status = "disabled";
+	status = "okay";
 	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,buffer-time-ms = <200>;
 	rockchip,mode = <1>;
 	#sound-dai-cells = <0>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
index 387497f15e395..05bda2f389195 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
@@ -12,7 +12,7 @@
 	compatible = "rockchip,rk3308-evb-amic-v11", "rockchip,rk3308";
 
 	vad_acodec_sound: vad-acodec-sound {
-		status = "disabled";
+		status = "okay";
 		compatible = "rockchip,multicodecs-card";
 		rockchip,card-name = "rockchip,rk3308-vad";
 		rockchip,codec-hp-det;
@@ -22,6 +22,15 @@
 	};
 };
 
+&acodec {
+	rockchip,no-deep-low-power;
+	rockchip,en-always-grps = <0 1 2 3>;
+};
+
+&acodec_sound {
+	status = "disabled";
+};
+
 &bluetooth_sound {
 	status = "okay";
 };
@@ -37,8 +46,9 @@
 };
 
 &vad {
-	status = "disabled";
+	status = "okay";
 	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,buffer-time-ms = <200>;
 	rockchip,mode = <1>;
 	#sound-dai-cells = <0>;
 };

From bd1adbfa8da97a1aa3ac7310fcf1fdab404a07e3 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 23 Aug 2018 17:11:58 +0800
Subject: [PATCH 1177/1852] ASoC: rockchip: vad: add snd_pcm_vad_memcpy

Change-Id: I43c7e317f94e08aee0d55da1400493f510ff6e77
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 include/sound/pcm.h               | 10 ++++++
 sound/soc/rockchip/rockchip_vad.c | 60 +++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)

diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 08db8a8640a0b..700811929a2b1 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -1418,6 +1418,16 @@ snd_pcm_uframes_t snd_pcm_vad_avail(struct snd_pcm_substream *substream);
 bool snd_pcm_vad_attached(struct snd_pcm_substream *substream);
 int snd_pcm_vad_preprocess(struct snd_pcm_substream *substream,
 			   void *buf, snd_pcm_uframes_t size);
+/**
+ * snd_pcm_vad_memcpy - Copy vad data to dst
+ * @substream: PCM substream instance
+ * @buf: dst buf
+ * @frames:  size in frame
+ *
+ * Result is copied frames for success or errno for fail
+ */
+snd_pcm_sframes_t snd_pcm_vad_memcpy(struct snd_pcm_substream *substream,
+				     void *buf, snd_pcm_uframes_t frames);
 #endif
 
 /* printk helpers */
diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index f28de21aa3257..3ad5cd1a6477e 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -315,6 +315,66 @@ bool snd_pcm_vad_attached(struct snd_pcm_substream *substream)
 }
 EXPORT_SYMBOL(snd_pcm_vad_attached);
 
+/**
+ * snd_pcm_vad_memcpy - Copy vad data to dst
+ * @substream: PCM substream instance
+ * @buf: dst buf
+ * @frames:  size in frame
+ *
+ * Result is copied frames for success or errno for fail
+ */
+snd_pcm_sframes_t snd_pcm_vad_memcpy(struct snd_pcm_substream *substream,
+				     void *buf, snd_pcm_uframes_t frames)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct rockchip_vad *vad = NULL;
+	struct vad_buf *vbuf;
+	snd_pcm_uframes_t avail;
+	int bytes;
+
+	vad = substream_get_drvdata(substream);
+
+	if (!vad)
+		return -EFAULT;
+
+	vbuf = &vad->vbuf;
+
+	avail = snd_pcm_vad_avail(substream);
+	avail = avail > frames ? frames : avail;
+	bytes = frames_to_bytes(runtime, avail);
+
+	if (bytes <= 0)
+		return -EFAULT;
+
+	dev_dbg(vad->dev,
+		"begin: %p, pos: %p, end: %p, size: %d, bytes: %d\n",
+		vbuf->begin, vbuf->pos, vbuf->end, vbuf->size, bytes);
+	if (!vbuf->loop) {
+		memcpy_fromio(buf, vbuf->pos, bytes);
+		vbuf->pos += bytes;
+	} else {
+		if ((vbuf->pos + bytes) <= vbuf->end) {
+			memcpy_fromio(buf, vbuf->pos, bytes);
+			vbuf->pos += bytes;
+		} else {
+			int part1 = vbuf->end - vbuf->pos;
+			int part2 = bytes - part1;
+
+			memcpy_fromio(buf, vbuf->pos, part1);
+			memcpy_fromio(buf + part1, vbuf->begin, part2);
+			vbuf->pos = vbuf->begin + part2;
+		}
+	}
+
+	vbuf->size -= bytes;
+	dev_dbg(vad->dev,
+		"begin: %p, pos: %p, end: %p, size: %d, bytes: %d\n",
+		vbuf->begin, vbuf->pos, vbuf->end, vbuf->size, bytes);
+
+	return avail;
+}
+EXPORT_SYMBOL(snd_pcm_vad_memcpy);
+
 static bool rockchip_vad_writeable_reg(struct device *dev, unsigned int reg)
 {
 	return true;

From ddf52e175e440d04a8cf9b99d8fe2a2918ab711d Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 23 Aug 2018 17:15:36 +0800
Subject: [PATCH 1178/1852] ALSA: pcm: vad: copy vad buffer to dma buffer

This patch copy vad buffer to dma buffer and recaculate
the hw pointer to support mmap access. in the mmap mode,
the buffer is handled by userspace, leading to prefetch
the vad data is impossible, so vad buffer data should be
copied to dma buffer. the only restriction is the dma buf
size should be larger than vad buf size.

Change-Id: I2ef6156fe8a791563a4bd02962c61d4b57c5329e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/core/pcm_dmaengine.c | 82 ++++++++++++++++++++++++++++++++++++++
 sound/core/pcm_lib.c       | 26 ------------
 sound/core/pcm_native.c    | 22 ++++++++++
 3 files changed, 104 insertions(+), 26 deletions(-)

diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c
index 9648861b12fe0..238ff6f6ca688 100644
--- a/sound/core/pcm_dmaengine.c
+++ b/sound/core/pcm_dmaengine.c
@@ -33,6 +33,9 @@ struct dmaengine_pcm_runtime_data {
 	dma_cookie_t cookie;
 
 	unsigned int pos;
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	unsigned int vpos;
+#endif
 };
 
 static inline struct dmaengine_pcm_runtime_data *substream_to_prtd(
@@ -180,6 +183,73 @@ static int dmaengine_pcm_prepare_and_submit(struct snd_pcm_substream *substream)
 	return 0;
 }
 
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+static void dmaengine_pcm_vad_dma_complete(void *arg)
+{
+	struct snd_pcm_substream *substream = arg;
+	struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
+
+	prtd->vpos += snd_pcm_lib_period_bytes(substream);
+	if (prtd->vpos >= snd_pcm_lib_buffer_bytes(substream))
+		prtd->vpos = 0;
+	snd_pcm_period_elapsed(substream);
+}
+
+static int dmaengine_pcm_prepare_single_and_submit(struct snd_pcm_substream *substream)
+{
+	struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
+	struct dma_chan *chan = prtd->dma_chan;
+	struct dma_async_tx_descriptor *desc;
+	enum dma_transfer_direction direction;
+	unsigned long flags = DMA_CTRL_ACK;
+	snd_pcm_uframes_t avail;
+	dma_addr_t buf_start, buf_end;
+	int offset, i, count, residue_bytes;
+	int period_bytes, buffer_bytes;
+
+	direction = snd_pcm_substream_to_dma_direction(substream);
+
+	if (!substream->runtime->no_period_wakeup)
+		flags |= DMA_PREP_INTERRUPT;
+
+	period_bytes = snd_pcm_lib_period_bytes(substream);
+	buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
+	avail = snd_pcm_vad_avail(substream);
+	offset = frames_to_bytes(substream->runtime, avail);
+	prtd->vpos = offset;
+	buf_start = substream->runtime->dma_addr + offset;
+	buf_end = substream->runtime->dma_addr + snd_pcm_lib_buffer_bytes(substream);
+	count = (buf_end - buf_start) / period_bytes;
+	residue_bytes = (buf_end - buf_start) % period_bytes;
+	pr_debug("%s: offset: %d, buffer_bytes: %d\n", __func__, offset, buffer_bytes);
+	pr_debug("%s: count: %d, residue_bytes: %d\n", __func__, count, residue_bytes);
+	for (i = 0; i < count; i++) {
+		desc = dmaengine_prep_slave_single(chan, buf_start,
+						   period_bytes,
+						   direction, flags);
+		if (!desc)
+			return -ENOMEM;
+		desc->callback = dmaengine_pcm_vad_dma_complete;
+		desc->callback_param = substream;
+		dmaengine_submit(desc);
+		buf_start += period_bytes;
+	}
+
+	if (residue_bytes) {
+		desc = dmaengine_prep_slave_single(chan, buf_start,
+						   residue_bytes,
+						   direction, flags);
+		if (!desc)
+			return -ENOMEM;
+		desc->callback = dmaengine_pcm_vad_dma_complete;
+		desc->callback_param = substream;
+		dmaengine_submit(desc);
+	}
+
+	return 0;
+}
+#endif
+
 /**
  * snd_dmaengine_pcm_trigger - dmaengine based PCM trigger implementation
  * @substream: PCM substream
@@ -198,6 +268,14 @@ int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
 
 	switch (cmd) {
 	case SNDRV_PCM_TRIGGER_START:
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+		if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
+		    snd_pcm_vad_attached(substream) &&
+		    snd_pcm_vad_avail(substream)) {
+			dmaengine_pcm_prepare_single_and_submit(substream);
+			dma_async_issue_pending(prtd->dma_chan);
+		}
+#endif
 		ret = dmaengine_pcm_prepare_and_submit(substream);
 		if (ret)
 			return ret;
@@ -255,6 +333,10 @@ snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream)
 	unsigned int buf_size;
 	unsigned int pos = 0;
 
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	if (prtd->vpos)
+		return bytes_to_frames(substream->runtime, prtd->vpos);
+#endif
 	dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state);
 	buf_size = snd_pcm_lib_buffer_bytes(substream);
 	if (state.residue > 0 && state.residue <= buf_size)
diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
index 25914635bef06..4c145d6bccd4d 100644
--- a/sound/core/pcm_lib.c
+++ b/sound/core/pcm_lib.c
@@ -2349,32 +2349,6 @@ snd_pcm_sframes_t snd_pcm_lib_read(struct snd_pcm_substream *substream, void __u
 	nonblock = !!(substream->f_flags & O_NONBLOCK);
 	if (runtime->access != SNDRV_PCM_ACCESS_RW_INTERLEAVED)
 		return -EINVAL;
-#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
-	if (snd_pcm_vad_attached(substream)) {
-		snd_pcm_stream_lock_irq(substream);
-		switch (runtime->status->state) {
-		case SNDRV_PCM_STATE_PREPARED:
-			if (size >= runtime->start_threshold) {
-				err = snd_pcm_start(substream);
-				if (err < 0) {
-					snd_pcm_stream_unlock_irq(substream);
-					return err;
-				}
-			}
-			break;
-		default:
-			break;
-		}
-		snd_pcm_stream_unlock_irq(substream);
-
-		if (snd_pcm_vad_avail(substream))
-			return snd_pcm_vad_read(substream, buf, size);
-		else
-			return snd_pcm_lib_read1(substream, (unsigned long)buf,
-						 size, nonblock,
-						 snd_pcm_lib_read_transfer);
-	}
-#endif
 	return snd_pcm_lib_read1(substream, (unsigned long)buf, size, nonblock, snd_pcm_lib_read_transfer);
 }
 
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 3de88974eeb64..0864cd298a34b 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -578,6 +578,15 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream,
 	runtime->byte_align = bits / 8;
 	runtime->min_align = frames;
 
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
+	    snd_pcm_vad_attached(substream) &&
+	    frames_to_bytes(runtime, runtime->buffer_size) < 256 * 1024) {
+		pr_info("pcm buffer_size should be larger than 256 KB\n");
+		err = -EINVAL;
+		goto _error;
+	}
+#endif
 	/* Default sw params */
 	runtime->tstamp_mode = SNDRV_PCM_TSTAMP_NONE;
 	runtime->period_step = 1;
@@ -1066,6 +1075,19 @@ static void snd_pcm_post_start(struct snd_pcm_substream *substream, int state)
 	    runtime->silence_size > 0)
 		snd_pcm_playback_silence(substream, ULONG_MAX);
 	snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MSTART);
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
+	    snd_pcm_vad_attached(substream) &&
+	    snd_pcm_vad_avail(substream)) {
+		snd_pcm_uframes_t avail;
+
+		avail = snd_pcm_vad_avail(substream);
+		snd_pcm_vad_memcpy(substream,
+				   runtime->dma_area,
+				   avail);
+		pr_info("%s: vad copy buffer %lu frames\n", __func__, avail);
+	}
+#endif
 }
 
 static struct action_ops snd_pcm_action_start = {

From 078892f048a7f6a14838d70fdce11b1223af2606 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 23 Aug 2018 18:09:37 +0800
Subject: [PATCH 1179/1852] ASoC: rockchip: vad: enable vad when system suspend

This patch move vad start action into suspend process.

Change-Id: Icc1ad0b49b89e3b768bc9270da7fadd12070b758
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 47 ++++++++++++++++---------------
 1 file changed, 24 insertions(+), 23 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 3ad5cd1a6477e..3eb45e8df8a53 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -66,6 +66,8 @@ struct rockchip_vad {
 	struct dentry *debugfs_dir;
 	void *buf;
 	bool acodec_cfg;
+	struct snd_soc_dai *cpu_dai;
+	struct snd_pcm_substream *substream;
 };
 
 struct audio_src_addr_map {
@@ -531,6 +533,8 @@ static void rockchip_vad_params_fixup(struct snd_pcm_substream *substream,
 	int i;
 
 	cpu_dai = rtd->cpu_dai;
+	vad->cpu_dai = cpu_dai;
+	vad->substream = substream;
 	np = cpu_dai->dev->of_node;
 	if (of_device_is_compatible(np, "rockchip,multi-dais")) {
 		audio_src_dai = rockchip_vad_find_dai(vad->audio_node);
@@ -623,18 +627,17 @@ static int rockchip_vad_hw_params(struct snd_pcm_substream *substream,
 	return 0;
 }
 
-static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
+static int rockchip_vad_enable_cpudai(struct rockchip_vad *vad)
 {
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	struct snd_soc_dai *cpu_dai;
+	struct snd_pcm_substream *substream;
 	int ret = 0;
 
-	if (PCM_RUNTIME_CHECK(substream))
-		return -EFAULT;
-	if (!rtd)
-		return -EFAULT;
+	cpu_dai = vad->cpu_dai;
+	substream = vad->substream;
 
-	cpu_dai = rtd->cpu_dai;
+	if (!cpu_dai || !substream)
+		return 0;
 
 	pm_runtime_get_sync(cpu_dai->dev);
 
@@ -657,21 +660,6 @@ static int rockchip_vad_pcm_startup(struct snd_pcm_substream *substream,
 	return 0;
 }
 
-static void rockchip_vad_pcm_shutdown(struct snd_pcm_substream *substream,
-				      struct snd_soc_dai *dai)
-{
-	struct snd_soc_codec *codec = dai->codec;
-	struct rockchip_vad *vad = snd_soc_codec_get_drvdata(codec);
-
-	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
-		return;
-
-	rockchip_vad_enable_cpudai(substream);
-	rockchip_vad_setup(vad);
-
-	vad_substream = NULL;
-}
-
 static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
 				struct snd_soc_dai *dai)
 {
@@ -699,7 +687,6 @@ static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
 
 static struct snd_soc_dai_ops rockchip_vad_dai_ops = {
 	.hw_params = rockchip_vad_hw_params,
-	.shutdown = rockchip_vad_pcm_shutdown,
 	.startup = rockchip_vad_pcm_startup,
 	.trigger = rockchip_vad_trigger,
 };
@@ -800,6 +787,19 @@ static void rockchip_vad_init(struct rockchip_vad *vad)
 	regmap_update_bits(vad->regmap, VAD_CTRL, mask, val);
 }
 
+static int rockchip_vad_suspend(struct device *dev)
+{
+	struct rockchip_vad *vad = dev_get_drvdata(dev);
+
+	rockchip_vad_enable_cpudai(vad);
+	rockchip_vad_setup(vad);
+	return 0;
+}
+
+static const struct dev_pm_ops rockchip_vad_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(rockchip_vad_suspend, NULL)
+};
+
 static int rockchip_vad_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node;
@@ -909,6 +909,7 @@ static struct platform_driver rockchip_vad_driver = {
 	.driver = {
 		.name = DRV_NAME,
 		.of_match_table = of_match_ptr(rockchip_vad_match),
+		.pm = &rockchip_vad_pm_ops,
 	},
 };
 module_platform_driver(rockchip_vad_driver);

From 7fb50531a98c7acd20028bb1b972d702743400df Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 24 Aug 2018 11:42:18 +0800
Subject: [PATCH 1180/1852] ASoC: rockchip: vad: add judgement for vad stop

This patch add the judgement for vad stop, do nothing
if vad was stopped.

Change-Id: Iea9fa635d38644335ba30c821460c11d8526a7a6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 3eb45e8df8a53..11852125957ed 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -81,6 +81,10 @@ static int rockchip_vad_stop(struct rockchip_vad *vad)
 	struct vad_buf *vbuf = &vad->vbuf;
 	struct vad_params *params = &vad->params;
 
+	regmap_read(vad->regmap, VAD_CTRL, &val);
+	if ((val & VAD_EN_MASK) == VAD_DISABLE)
+		return 0;
+
 	regmap_update_bits(vad->regmap, VAD_CTRL, VAD_EN_MASK, VAD_DISABLE);
 	regmap_read(vad->regmap, VAD_RAM_END_ADDR, &val);
 	vbuf->end = vbuf->begin + (val - vad->memphy) + 0x8;

From e3b7b17df7f3307d9dce87100515f1759b67d937 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Fri, 24 Aug 2018 11:00:10 +0800
Subject: [PATCH 1181/1852] arm64: dts: rockchip: rk3328: Add swiotlb=1 to
 kernel bootargs

Change-Id: I18dbb6730dbb9e639b6827c5653afcdcc5b52661
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328-android.dtsi | 2 +-
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts      | 2 +-
 arch/arm64/boot/dts/rockchip/rk3328-rock64.dts   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
index 076200002d36b..8f6c3fa5dbfa3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
@@ -6,7 +6,7 @@
 
 / {
 	chosen {
-		bootargs = "earlyprintk=uart8250-32bit,0xff130000";
+		bootargs = "earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
 	};
 
 	fiq-debugger {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index a71b6cc116bb9..84d9dcb856872 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -49,7 +49,7 @@
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
 	chosen {
-		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000";
+		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
 	};
 
 	fiq-debugger {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index ea8cd77333a85..a5fc5d3b5ea41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -48,7 +48,7 @@
 	compatible = "pine64,rock64", "rockchip,rk3328";
 
 	chosen {
-		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000";
+		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
 		stdout-path = "serial2:1500000n8";
 	};
 

From 5ec23445097778c1f33ab03e9ee3f652e58bb707 Mon Sep 17 00:00:00 2001
From: Bian Jin chen <kenjc.bian@rock-chips.com>
Date: Fri, 17 Aug 2018 15:34:43 +0800
Subject: [PATCH 1182/1852] arm: dts: rk312x: rk3126-bnd-d708: Separate android
 fireware.

Split DT source files to separate out android fireware for Android Pip & Oreo

Change-Id: I6fe9ad626ea05d2f5ae29ff2e8ee314d9833bbca
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
Signed-off-by: Hao Xiaowei <hxw@rock-chips.com>
---
 arch/arm/boot/dts/rk3126-bnd-d708-avb.dts |  31 ++
 arch/arm/boot/dts/rk3126-bnd-d708.dts     | 649 +---------------------
 arch/arm/boot/dts/rk3126-bnd-d708.dtsi    | 583 +++++++++++++++++++
 arch/arm/boot/dts/rk312x-android.dtsi     |  43 +-
 4 files changed, 638 insertions(+), 668 deletions(-)
 create mode 100644 arch/arm/boot/dts/rk3126-bnd-d708-avb.dts
 create mode 100644 arch/arm/boot/dts/rk3126-bnd-d708.dtsi

diff --git a/arch/arm/boot/dts/rk3126-bnd-d708-avb.dts b/arch/arm/boot/dts/rk3126-bnd-d708-avb.dts
new file mode 100644
index 0000000000000..c207c9df28dc0
--- /dev/null
+++ b/arch/arm/boot/dts/rk3126-bnd-d708-avb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3126-bnd-d708.dtsi"
+
+/ {
+	model = "Rockchip RK3126 bnd-d708 board";
+	compatible = "rockchip,rk3126";
+};
+
+&firmware_android {
+	compatible = "android,firmware";
+	boot_devices = "10500000.nandc";
+	vbmeta {
+		compatible = "android,vbmeta";
+		parts = "vbmeta,boot,system,vendor,dtbo";
+	};
+	fstab {
+		compatible = "android,fstab";
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/rk3126-bnd-d708.dts b/arch/arm/boot/dts/rk3126-bnd-d708.dts
index 6428c7d5a9793..94f81e7bd0e49 100644
--- a/arch/arm/boot/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/boot/dts/rk3126-bnd-d708.dts
@@ -1,644 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *  Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 /dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/sensor-dev.h>
-#include "rk3126.dtsi"
-#include "rk312x-android.dtsi"
-#include "rk3126-m708-cif-sensor.dtsi"
+#include "rk3126-bnd-d708.dtsi"
 
 / {
 	model = "Rockchip RK3126 bnd-d708 board";
 	compatible = "rockchip,rk3126";
-
-	adc-keys {
-		compatible = "adc-keys";
-		io-channels = <&saradc 2>;
-		io-channel-names = "buttons";
-		poll-interval = <100>;
-		keyup-threshold-microvolt = <3300000>;
-
-		button-up {
-			label = "Volume Up";
-			linux,code = <KEY_VOLUMEUP>;
-			press-threshold-microvolt = <0>;
-		};
-
-		button-down {
-			label = "Volume Down";
-			linux,code = <KEY_VOLUMEDOWN>;
-			press-threshold-microvolt = <1650000>;
-		};
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		pwms = <&pwm0 0 25000 0>;
-		brightness-levels = <
-				255 169 168 168 167 166 166 165
-				164 164 163 162 162 161 160 160
-				159 158 158 157 156 156 155 154
-				154 153 152 152 151 150 150 149
-				148 148 147 146 146 145 144 144
-				143 142 142 141 140 140 139 138
-				138 137 136 136 135 134 134 133
-				132 132 131 130 130 129 128 128
-				127 126 126 125 124 124 123 122
-				122 121 120 120 119 118 118 117
-				116 116 115 114 114 113 112 112
-				111 110 110 109 108 108 107 106
-				106 105 104 104 103 102 102 101
-				100 100  99  98  98  97  96  96
-				 95  94  94  93  92  92  91  90
-				 90  89  88  88  87  86  86  85
-				 84  84  83  82  82  81  80  80
-				 79  78  78  77  76  76  75  74
-				 74  73  72  72  71  70  70  69
-				 68  68  67  66  66  65  64  64
-				 63  62  62  61  60  60  59  58
-				 58  57  56  56  55  54  54  53
-				 52  52  51  50  50  49  48  48
-				 47  46  46  45  44  44  43  42
-				 42  41  40  40  39  38  38  37
-				 36  36  35  34  34  33  32  32
-				 31  30  30  29  28  28  27  26
-				 26  25  24  24  23  22  22  21
-				 20  20  19  18  18  17  16  16
-				 15  14  14  13  12  12  11  10
-				 10   9   8   8   7   6   6   5
-				  4   4   3   2   1   1   1   0>;
-		default-brightness-level = <128>;
-		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
-	};
-
-	firmware {
-		android {
-			compatible = "android,firmware";
-			fstab {
-				compatible = "android,fstab";
-				system {
-					compatible = "android,system";
-					dev = "/dev/block/by-name/system";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait";
-				};
-				vendor {
-					compatible = "android,vendor";
-					dev = "/dev/block/by-name/vendor";
-					type = "ext4";
-					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
-					fsmgr_flags = "wait";
-				};
-			};
-		};
-	};
-
-	rockchip_headset {
-		compatible = "rockchip_headset";
-		headset_gpio = <&gpio2 18 GPIO_ACTIVE_LOW>;
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,name = "rockchip,rk312x";
-		simple-audio-card,cpu {
-			sound-dai = <&i2s_2ch>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&codec>;
-		};
-	};
-
-	vccadc_ref: vccadc-ref {
-		compatible = "regulator-fixed";
-		regulator-name = "SARADC_AVDD33";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-
-	vcc_sys: vcc-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_sys";
-		regulator-min-microvolt = <4000000>;
-		regulator-max-microvolt = <4000000>;
-		regulator-always-on;
-	};
-
-	xin32k: xin32k {
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-		#clock-cells = <0>;
-	};
-
-	wireless-bluetooth {
-		compatible = "bluetooth-platdata";
-		/* wifi-bt-power-toggle; */
-
-		keep_wifi_power_on = <1>;
-		uart_rts_gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO1_B3 */
-		pinctrl-names = "default","rts_gpio";
-		pinctrl-0 = <&uart1_rts>;
-		pinctrl-1 = <&uart1_rts_gpio>;
-		BT,reset_gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* GPIO2_B1 */
-		BT,wake_gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; /* GPIO0_D3 */
-		BT,wake_host_irq = <&gpio2 21 GPIO_ACTIVE_LOW>; /* GPIO2_C5 */
-		status = "okay";
-	};
-
-	wireless-wlan {
-		compatible = "wlan-platdata";
-
-		wifi_chip_type = "rtl8723cs";
-		WIFI,host_wake_irq = <&gpio2 13 GPIO_ACTIVE_HIGH>;
-		status = "okay";
-	};
-};
-
-&codec {
-	#sound-dai-cells = <0>;
-	hp-ctl-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
-	spk-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-	spk-mute-delay = <200>;
-	hp-mute-delay = <100>;
-	is_rk3128 = <0>;
-	spk_volume = <25>;
-	hp_volume = <25>;
-	capture_volume = <26>;
-	gpio_debug = <1>;
-	codec_hp_det = <0>;
-	status = "okay";
-};
-
-&cif {
-	status = "okay";
-};
-
-&cif_sensor {
-	status = "okay";
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&dsi {
-	status = "okay";
-
-	panel@0 {
-		compatible = "fc,fy07018dh26d372-d", "simple-panel-dsi";
-		reg = <0>;
-		backlight = <&backlight>;
-		power-supply = <&ldo6>;
-		power-invert;
-		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
-		prepare-delay-ms = <20>;
-		reset-delay-ms = <20>;
-		init-delay-ms = <20>;
-		enable-delay-ms = <120>;
-		disable-delay-ms = <20>;
-		unprepare-delay-ms = <20>;
-
-		width-mm = <153>;
-		height-mm = <85>;
-
-		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
-		dsi,format = <MIPI_DSI_FMT_RGB888>;
-		dsi,lanes = <4>;
-
-		panel-init-sequence = [
-			05 1e 01 01
-			15 00 02 80 47
-			15 00 02 81 40
-			15 00 02 82 04
-			15 00 02 83 77
-			15 00 02 84 0f
-			15 00 02 85 70
-			15 78 02 86 70
-		];
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing0 {
-				clock-frequency = <49500000>;
-				hactive = <1024>;
-				hfront-porch = <120>;
-				hsync-len = <40>;
-				hback-porch = <120>;
-				vactive = <600>;
-				vfront-porch = <14>;
-				vsync-len = <4>;
-				vback-porch = <14>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-	};
-};
-
-&dmc {
-	center-supply = <&vdd_log>;
-};
-
-&emmc {
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	supports-emmc;
-	disable-wp;
-	non-removable;
-	num-slots = <1>;
-	status = "okay";
-};
-
-&gpu {
-	status = "okay";
-	mali-supply = <&vdd_log>;
 };
 
-&i2c0 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	ts@40 {
-		compatible = "gslX680-d708";
-		reg = <0x40>;
-		touch-gpio = <&gpio2 20 IRQ_TYPE_LEVEL_LOW>;
-		wake-gpio = <&gpio2 12 IRQ_TYPE_LEVEL_LOW>;
-		screen_max_x = <800>;
-		screen_max_y = <480>;
-		status = "okay";
-	};
-
-	rk816: pmic@1a {
-		compatible = "rockchip,rk816";
-		reg = <0x1a>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "rk816-clkout1", "rk816-clkout2";
-		extcon = <&u2phy>;
-
-		vcc1-supply = <&vcc_sys>;
-		vcc2-supply = <&vcc_sys>;
-		vcc3-supply = <&vcc_sys>;
-		vcc4-supply = <&vcc_sys>;
-		vcc5-supply = <&vcc_io>;
-		vcc6-supply = <&vcc_sys>;
-
-		gpio {
-			status = "okay";
-		};
-
-		pwrkey {
-			status = "okay";
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
 		};
-
-		rtc {
-			status = "okay";
-		};
-
-		battery {
-			compatible = "rk816-battery";
-			ocv_table = < 3500 3625 3685 3697 3718 3735 3748
-					3760 3774 3788 3802 3816 3834 3853
-					3877 3908 3946 3975 4018 4071 4106>;
-			design_capacity = <2500>;
-			design_qmax = <2750>;
-			bat_res = <100>;
-			max_input_current = <1500>;
-			max_chrg_current = <1300>;
-			max_chrg_voltage = <4200>;
-			sleep_enter_current = <300>;
-			sleep_exit_current = <300>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3850>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			virtual_power = <0>;
-			power_dc2otg = <0>;
-			dc_det_adc = <0>;
-		};
-
-		regulators {
-
-			vdd_arm: DCDC_REG1{
-				regulator-name= "vdd_arm";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <1>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_log: DCDC_REG2 {
-				regulator-name= "vdd_logic";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-initial-mode = <1>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-initial-mode = <1>;
-			};
-
-			vcc_io: DCDC_REG4 {
-				regulator-name = "vcc_io";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-initial-mode = <1>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc28_cif: LDO_REG1 {
-				regulator-name = "vcc28_cif";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc18_cif: LDO_REG2 {
-				regulator-name = "vcc18_cif";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_11: LDO_REG3 {
-				regulator-name = "vdd_11";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1100000>;
-				};
-			};
-
-			ldo4: LDO_REG4 {
-				regulator-name= "ldo4";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5: LDO_REG5 {
-				regulator-name= "ldo5";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			ldo6: LDO_REG6 {
-				regulator-name= "ldo6";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-		};
-	};
-
-	sensor@4c {
-		compatible = "gs_mc3230";
-		reg = <0x4c>;
-		type = <SENSOR_TYPE_ACCEL>;
-		irq_enable = <0>;
-		poll_delay_ms = <30>;
-		layout = <3>;
-		reprobe_en = <1>;
-	};
-};
-
-&i2s_2ch {
-	#sound-dai-cells = <0>;
-	status = "okay";
-};
-
-&iep {
-	status = "okay";
-};
-
-&iep_mmu {
-	status = "okay";
-};
-
-&mipi_dphy {
-	status = "okay";
-};
-
-&nandc {
-	status = "okay";
-};
-
-&pinctrl {
-	lcdc {
-		lcdc_lcdc: lcdc-lcdc {
-			rockchip,pins =
-				/* depend on the hardware */
-				<2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */
-				/* <2 RK_PB1 1 &pcfg_pull_none>, /* HSYNC */
-				/* <2 RK_PB2 1 &pcfg_pull_none>, /* VSYNC */
-				<2 RK_PB3 1 &pcfg_pull_none>, /* DEN */
-				<2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */
-				<2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */
-				<2 RK_PB6 1 &pcfg_pull_none>, /* DATA12 */
-				<2 RK_PB7 1 &pcfg_pull_none>, /* DATA13 */
-				<2 RK_PC0 1 &pcfg_pull_none>, /* DATA14 */
-				<2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */
-				<2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */
-				<2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */
-				/* <2 RK_PC4 1 &pcfg_pull_none>, /* DATA18 */
-				/* <2 RK_PC5 1 &pcfg_pull_none>, /* DATA19 */
-				/* <2 RK_PC6 1 &pcfg_pull_none>, /* DATA20 */
-				/* <2 RK_PC7 1 &pcfg_pull_none>, /* DATA21 */
-				/* <2 RK_PD0 1 &pcfg_pull_none>, /* DATA22 */
-				/* <2 RK_PD1 1 &pcfg_pull_none>; /* DATA23 */
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_default>;
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
 		};
 	};
-
-	wireless-bluetooth {
-		uart1_rts_gpio: uart1-rts-gpio {
-			rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
-&pwm0 {
-	status = "okay";
-};
-
-&rga {
-	status = "okay";
-};
-
-&route_dsi {
-	status = "okay";
-};
-
-&saradc {
-	status = "okay";
-	vref-supply = <&vccadc_ref>;
-};
-
-&sdmmc {
-	cap-mmc-highspeed;
-	supports-sd;
-	card-detect-delay = <800>;
-	ignore-pm-notify;
-	keep-power-in-suspend;
-	cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; /* CD GPIO */
-	status = "disabled";
-};
-
-&sdio {
-	max-frequency = <50000000>;
-	cap-sd-highspeed;
-	supports-sdio;
-	ignore-pm-notify;
-	keep-power-in-suspend;
-	non-removable;
-	vmmc-supply = <&ldo5>;
-	status = "okay";
-};
-
-&tsadc {
-	status = "okay";
-};
-
-&u2phy {
-	status = "okay";
-
-	u2phy_otg: otg-port {
-		status = "okay";
-	};
-
-	u2phy_host: host-port {
-		status = "okay";
-	};
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_xfer &uart1_cts>;
-	status = "okay";
-};
-
-&usb_otg {
-	status = "okay";
-};
-
-&vop {
-	status = "okay";
-};
-
-&vop_mmu {
-	status = "okay";
-};
-
-&vpu {
-	status = "okay";
 };
diff --git a/arch/arm/boot/dts/rk3126-bnd-d708.dtsi b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi
new file mode 100644
index 0000000000000..4817fcfbd0088
--- /dev/null
+++ b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi
@@ -0,0 +1,583 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/sensor-dev.h>
+#include "rk3126.dtsi"
+#include "rk312x-android.dtsi"
+#include "rk3126-m708-cif-sensor.dtsi"
+
+/ {
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <3300000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <0>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1650000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm0 0 25000 0>;
+		brightness-levels = <
+				255 169 168 168 167 166 166 165
+				164 164 163 162 162 161 160 160
+				159 158 158 157 156 156 155 154
+				154 153 152 152 151 150 150 149
+				148 148 147 146 146 145 144 144
+				143 142 142 141 140 140 139 138
+				138 137 136 136 135 134 134 133
+				132 132 131 130 130 129 128 128
+				127 126 126 125 124 124 123 122
+				122 121 120 120 119 118 118 117
+				116 116 115 114 114 113 112 112
+				111 110 110 109 108 108 107 106
+				106 105 104 104 103 102 102 101
+				100 100  99  98  98  97  96  96
+				 95  94  94  93  92  92  91  90
+				 90  89  88  88  87  86  86  85
+				 84  84  83  82  82  81  80  80
+				 79  78  78  77  76  76  75  74
+				 74  73  72  72  71  70  70  69
+				 68  68  67  66  66  65  64  64
+				 63  62  62  61  60  60  59  58
+				 58  57  56  56  55  54  54  53
+				 52  52  51  50  50  49  48  48
+				 47  46  46  45  44  44  43  42
+				 42  41  40  40  39  38  38  37
+				 36  36  35  34  34  33  32  32
+				 31  30  30  29  28  28  27  26
+				 26  25  24  24  23  22  22  21
+				 20  20  19  18  18  17  16  16
+				 15  14  14  13  12  12  11  10
+				 10   9   8   8   7   6   6   5
+				  4   4   3   2   1   1   1   0>;
+		default-brightness-level = <128>;
+		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+	};
+
+	rockchip_headset {
+		compatible = "rockchip_headset";
+		headset_gpio = <&gpio2 18 GPIO_ACTIVE_LOW>;
+	};
+
+	sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "rockchip,rk312x";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&codec>;
+		};
+	};
+
+	vccadc_ref: vccadc-ref {
+		compatible = "regulator-fixed";
+		regulator-name = "SARADC_AVDD33";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc_sys: vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <4000000>;
+		regulator-max-microvolt = <4000000>;
+		regulator-always-on;
+	};
+
+	xin32k: xin32k {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		#clock-cells = <0>;
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		/* wifi-bt-power-toggle; */
+
+		keep_wifi_power_on = <1>;
+		uart_rts_gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO1_B3 */
+		pinctrl-names = "default","rts_gpio";
+		pinctrl-0 = <&uart1_rts>;
+		pinctrl-1 = <&uart1_rts_gpio>;
+		BT,reset_gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* GPIO2_B1 */
+		BT,wake_gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; /* GPIO0_D3 */
+		BT,wake_host_irq = <&gpio2 21 GPIO_ACTIVE_LOW>; /* GPIO2_C5 */
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+
+		wifi_chip_type = "rtl8723cs";
+		WIFI,host_wake_irq = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&codec {
+	#sound-dai-cells = <0>;
+	hp-ctl-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
+	spk-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+	spk-mute-delay = <200>;
+	hp-mute-delay = <100>;
+	is_rk3128 = <0>;
+	spk_volume = <25>;
+	hp_volume = <25>;
+	capture_volume = <26>;
+	gpio_debug = <1>;
+	codec_hp_det = <0>;
+	status = "okay";
+};
+
+&cif {
+	status = "okay";
+};
+
+&cif_sensor {
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		compatible = "fc,fy07018dh26d372-d", "simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		power-supply = <&ldo6>;
+		power-invert;
+		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <153>;
+		height-mm = <85>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			05 1e 01 01
+			15 00 02 80 47
+			15 00 02 81 40
+			15 00 02 82 04
+			15 00 02 83 77
+			15 00 02 84 0f
+			15 00 02 85 70
+			15 78 02 86 70
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <49500000>;
+				hactive = <1024>;
+				hfront-porch = <120>;
+				hsync-len = <40>;
+				hback-porch = <120>;
+				vactive = <600>;
+				vfront-porch = <14>;
+				vsync-len = <4>;
+				vback-porch = <14>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
+&dmc {
+	center-supply = <&vdd_log>;
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+	mali-supply = <&vdd_log>;
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	ts@40 {
+		compatible = "gslX680-d708";
+		reg = <0x40>;
+		touch-gpio = <&gpio2 20 IRQ_TYPE_LEVEL_LOW>;
+		wake-gpio = <&gpio2 12 IRQ_TYPE_LEVEL_LOW>;
+		screen_max_x = <800>;
+		screen_max_y = <480>;
+		status = "okay";
+	};
+
+	rk816: pmic@1a {
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "rk816-clkout1", "rk816-clkout2";
+		extcon = <&u2phy>;
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc5-supply = <&vcc_io>;
+		vcc6-supply = <&vcc_sys>;
+
+		gpio {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = < 3500 3625 3685 3697 3718 3735 3748
+					3760 3774 3788 3802 3816 3834 3853
+					3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <2500>;
+			design_qmax = <2750>;
+			bat_res = <100>;
+			max_input_current = <1500>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <0>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
+		regulators {
+
+			vdd_arm: DCDC_REG1{
+				regulator-name= "vdd_arm";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name= "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <1>;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc28_cif: LDO_REG1 {
+				regulator-name = "vcc28_cif";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc18_cif: LDO_REG2 {
+				regulator-name = "vcc18_cif";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_11: LDO_REG3 {
+				regulator-name = "vdd_11";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name= "ldo4";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo5: LDO_REG5 {
+				regulator-name= "ldo5";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name= "ldo6";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+
+	sensor@4c {
+		compatible = "gs_mc3230";
+		reg = <0x4c>;
+		type = <SENSOR_TYPE_ACCEL>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		layout = <3>;
+		reprobe_en = <1>;
+	};
+};
+
+&i2s_2ch {
+	#sound-dai-cells = <0>;
+	status = "okay";
+};
+
+&iep {
+	status = "okay";
+};
+
+&iep_mmu {
+	status = "okay";
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&nandc {
+	status = "okay";
+};
+
+&pinctrl {
+	lcdc {
+		lcdc_lcdc: lcdc-lcdc {
+			rockchip,pins =
+				/* depend on the hardware */
+				<2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */
+				/* <2 RK_PB1 1 &pcfg_pull_none>, /* HSYNC */
+				/* <2 RK_PB2 1 &pcfg_pull_none>, /* VSYNC */
+				<2 RK_PB3 1 &pcfg_pull_none>, /* DEN */
+				<2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */
+				<2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */
+				<2 RK_PB6 1 &pcfg_pull_none>, /* DATA12 */
+				<2 RK_PB7 1 &pcfg_pull_none>, /* DATA13 */
+				<2 RK_PC0 1 &pcfg_pull_none>, /* DATA14 */
+				<2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */
+				<2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */
+				<2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */
+				/* <2 RK_PC4 1 &pcfg_pull_none>, /* DATA18 */
+				/* <2 RK_PC5 1 &pcfg_pull_none>, /* DATA19 */
+				/* <2 RK_PC6 1 &pcfg_pull_none>, /* DATA20 */
+				/* <2 RK_PC7 1 &pcfg_pull_none>, /* DATA21 */
+				/* <2 RK_PD0 1 &pcfg_pull_none>, /* DATA22 */
+				/* <2 RK_PD1 1 &pcfg_pull_none>; /* DATA23 */
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 2 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	wireless-bluetooth {
+		uart1_rts_gpio: uart1-rts-gpio {
+			rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&rga {
+	status = "okay";
+};
+
+&route_dsi {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vccadc_ref>;
+};
+
+&sdmmc {
+	cap-mmc-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; /* CD GPIO */
+	status = "disabled";
+};
+
+&sdio {
+	max-frequency = <50000000>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	vmmc-supply = <&ldo5>;
+	status = "okay";
+};
+
+&tsadc {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts>;
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&vop {
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
+
+&vpu {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk312x-android.dtsi b/arch/arm/boot/dts/rk312x-android.dtsi
index 1cda2dc70a4ad..617a20653e5e0 100644
--- a/arch/arm/boot/dts/rk312x-android.dtsi
+++ b/arch/arm/boot/dts/rk312x-android.dtsi
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include <dt-bindings/display/mipi_dsi.h>
@@ -67,6 +30,10 @@
 		status = "okay";
 	};
 
+	firmware {
+		firmware_android: android {};
+	};
+
 	reserved-memory {
 		#address-cells = <1>;
 		#size-cells = <1>;

From 68a1a97ccd0723802b1befe5138b83af8838acfe Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Fri, 24 Aug 2018 15:13:35 +0800
Subject: [PATCH 1183/1852] arm64: dts: rockchip: rk3328: Add kpti=0 to kernel
 bootargs

Change-Id: I1be893667fec0d9bf8edd7c29150aa2084b72000
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328-android.dtsi | 2 +-
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts      | 2 +-
 arch/arm64/boot/dts/rockchip/rk3328-rock64.dts   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
index 8f6c3fa5dbfa3..1833a7c376906 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328-android.dtsi
@@ -6,7 +6,7 @@
 
 / {
 	chosen {
-		bootargs = "earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
+		bootargs = "earlyprintk=uart8250-32bit,0xff130000 swiotlb=1 kpti=0";
 	};
 
 	fiq-debugger {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 84d9dcb856872..3c8a5cc87322a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -49,7 +49,7 @@
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
 	chosen {
-		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
+		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1 kpti=0";
 	};
 
 	fiq-debugger {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index a5fc5d3b5ea41..4b2eef609601e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -48,7 +48,7 @@
 	compatible = "pine64,rock64", "rockchip,rk3328";
 
 	chosen {
-		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1";
+		bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000 swiotlb=1 kpti=0";
 		stdout-path = "serial2:1500000n8";
 	};
 

From 32e5b831b9d0bf7c1f394722e0b8fd980ece42a2 Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Fri, 24 Aug 2018 15:20:29 +0800
Subject: [PATCH 1184/1852] arm: dts: rockchip: rk3288-evb-rk808-linux: config
 dvp regulator to be 1v8

Change-Id: Ie0e04b957cd5b4bffba2a8a964bed0d76e138079
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-evb-rk808-linux.dts | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
index d40270752a405..4fb810f8b2185 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
@@ -129,6 +129,17 @@
 
 	/delete-node/ sdmmc-regulator;
 
+	vcc18_dvp: vcc18-dvp {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc18_dvp";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+		vin-supply = <&vcc_io>;
+	};
+
 	vdd_log: vdd-logic {
 		compatible = "pwm-regulator";
 		rockchip,pwm_id = <1>;
@@ -428,7 +439,7 @@
 	status = "okay";
 	audio-supply = <&vcc_io>;
 	bb-supply = <&vcc_io>;
-	dvp-supply = <&vcc_io>;
+	dvp-supply = <&vcc18_dvp>;
 	flash0-supply = <&vcc_18>;
 	flash1-supply = <&vcc_io>;
 	gpio30-supply = <&vcc_io>;

From 28237909b170302d019c05a7a34c179055e83842 Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Mon, 27 Aug 2018 14:14:07 +0800
Subject: [PATCH 1185/1852] media: rockchip: isp1: add ISP parameters is
 cleared when stopping stream

Change-Id: Ibd38147ff22d2ef71bfb91978c5b5d7f4734fe02
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/isp_params.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 0bb564513f443..8529413388eee 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -1497,6 +1497,10 @@ static void rkisp1_params_vb2_stop_streaming(struct vb2_queue *vq)
 			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 		buf = NULL;
 	}
+
+	/* clean module params */
+	params_vdev->cur_params.module_cfg_update = 0;
+	params_vdev->cur_params.module_en_update = 0;
 }
 
 static int

From 29cf73bf52006bf4ac43fff40294c42fb5ebc74c Mon Sep 17 00:00:00 2001
From: YueHaibing <yuehaibing@huawei.com>
Date: Wed, 16 May 2018 18:59:19 +0800
Subject: [PATCH 1186/1852] UPSTREAM: net: stmmac: Remove useless test before
 clk_disable_unprepare

clk_disable_unprepare() already checks that the clock pointer is valid.
No need to test it before calling it.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 93120eba4890e0fcf1e42059d495a7d852db31ed)

Change-Id: Ic318108658809fb54a954c688db4f6c9876c422f
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 .../net/ethernet/stmicro/stmmac/dwmac-rk.c    | 24 ++++++-------------
 1 file changed, 7 insertions(+), 17 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 44a3c2d733076..6cbaa18bde142 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1225,30 +1225,20 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
 	} else {
 		if (bsp_priv->clk_enabled) {
 			if (phy_iface == PHY_INTERFACE_MODE_RMII) {
-				if (!IS_ERR(bsp_priv->mac_clk_rx))
-					clk_disable_unprepare(
-						bsp_priv->mac_clk_rx);
+				clk_disable_unprepare(bsp_priv->mac_clk_rx);
 
-				if (!IS_ERR(bsp_priv->clk_mac_ref))
-					clk_disable_unprepare(
-						bsp_priv->clk_mac_ref);
+				clk_disable_unprepare(bsp_priv->clk_mac_ref);
 
-				if (!IS_ERR(bsp_priv->clk_mac_refout))
-					clk_disable_unprepare(
-						bsp_priv->clk_mac_refout);
+				clk_disable_unprepare(bsp_priv->clk_mac_refout);
 			}
 
-			if (!IS_ERR(bsp_priv->clk_phy))
-				clk_disable_unprepare(bsp_priv->clk_phy);
+			clk_disable_unprepare(bsp_priv->clk_phy);
 
-			if (!IS_ERR(bsp_priv->aclk_mac))
-				clk_disable_unprepare(bsp_priv->aclk_mac);
+			clk_disable_unprepare(bsp_priv->aclk_mac);
 
-			if (!IS_ERR(bsp_priv->pclk_mac))
-				clk_disable_unprepare(bsp_priv->pclk_mac);
+			clk_disable_unprepare(bsp_priv->pclk_mac);
 
-			if (!IS_ERR(bsp_priv->mac_clk_tx))
-				clk_disable_unprepare(bsp_priv->mac_clk_tx);
+			clk_disable_unprepare(bsp_priv->mac_clk_tx);
 			/**
 			 * if (!IS_ERR(bsp_priv->clk_mac))
 			 *	clk_disable_unprepare(bsp_priv->clk_mac);

From 85412c172a8c3ce3775d54937081fbcd795c811c Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Mon, 27 Aug 2018 11:27:32 +0800
Subject: [PATCH 1187/1852] net: ethernet: stmmac: dwmac-rk: Sync with upstream
 for dwmac

Change-Id: I845fbf2d51e6617347d28b1e2f9422e0e8c99cf2
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 6cbaa18bde142..d24c9acea2ea7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -84,11 +84,11 @@ struct rk_priv_data {
 	(((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \
 	 ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))
 
-#define PX30_GRF_GMAC_CON1		0X0904
+#define PX30_GRF_GMAC_CON1		0x0904
 
 /* PX30_GRF_GMAC_CON1 */
 #define PX30_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | \
-					GRF_BIT(6))
+					 GRF_BIT(6))
 #define PX30_GMAC_SPEED_10M		GRF_CLR_BIT(2)
 #define PX30_GMAC_SPEED_100M		GRF_BIT(2)
 
@@ -1215,6 +1215,9 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
 			if (!IS_ERR(bsp_priv->mac_clk_tx))
 				clk_prepare_enable(bsp_priv->mac_clk_tx);
 
+			if (!IS_ERR(bsp_priv->clk_mac_speed))
+				clk_prepare_enable(bsp_priv->clk_mac_speed);
+
 			/**
 			 * if (!IS_ERR(bsp_priv->clk_mac))
 			 *	clk_prepare_enable(bsp_priv->clk_mac);
@@ -1239,6 +1242,8 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
 			clk_disable_unprepare(bsp_priv->pclk_mac);
 
 			clk_disable_unprepare(bsp_priv->mac_clk_tx);
+
+			clk_disable_unprepare(bsp_priv->clk_mac_speed);
 			/**
 			 * if (!IS_ERR(bsp_priv->clk_mac))
 			 *	clk_disable_unprepare(bsp_priv->clk_mac);

From 50e34163ae4c9a3067878dfe3c4e4444b6332bd3 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 24 Aug 2018 16:16:10 +0800
Subject: [PATCH 1188/1852] dmaengine: pl330: _loop_cyclic: fixup loopcnt is
 too large

This patch fixup dma transfer data lost if loop cnt is larger
than 256.

Change-Id: Id49302cdcc1ac871d03070ce07eaa7653e54408c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 drivers/dma/pl330.c | 67 +++++++++++++++++++++++++++++++--------------
 1 file changed, 46 insertions(+), 21 deletions(-)

diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 5893c11dd8587..8746c24d3cd78 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1341,19 +1341,14 @@ static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[],
 	return off;
 }
 
-/* Returns bytes consumed */
-static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run,
-		u8 buf[], unsigned long bursts, const struct _xfer_spec *pxs, int ev)
+static int _period(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[],
+		   unsigned long bursts, const struct _xfer_spec *pxs, int ev)
 {
-	int cyc, off;
-	unsigned lcnt0, lcnt1, ljmp0, ljmp1, ljmpfe;
+	unsigned int lcnt1, ljmp1;
+	int cyc, off = 0;
 	struct _arg_LPEND lpend;
 	struct pl330_xfer *x = &pxs->desc->px;
 
-	off = 0;
-	ljmpfe = off;
-	lcnt0 = pxs->desc->num_periods;
-
 	if (bursts > 256) {
 		lcnt1 = 256;
 		cyc = bursts / 256;
@@ -1362,18 +1357,6 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run,
 		cyc = 1;
 	}
 
-	/* forever loop */
-	off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
-	off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
-#ifdef CONFIG_ARCH_ROCKCHIP
-	if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP))
-		off += _emit_FLUSHP(dry_run, &buf[off],
-					pxs->desc->peri);
-#endif
-	/* loop0 */
-	off += _emit_LP(dry_run, &buf[off], 0,  lcnt0);
-	ljmp0 = off;
-
 	/* loop1 */
 	off += _emit_LP(dry_run, &buf[off], 1, lcnt1);
 	ljmp1 = off;
@@ -1424,12 +1407,54 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run,
 
 	off += _emit_SEV(dry_run, &buf[off], ev);
 
+	return off;
+}
+
+/* Returns bytes consumed */
+static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned int dry_run,
+		u8 buf[], unsigned long bursts, const struct _xfer_spec *pxs, int ev)
+{
+	int off, periods, residue, i;
+	unsigned int lcnt0, ljmp0, ljmpfe;
+	struct _arg_LPEND lpend;
+	struct pl330_xfer *x = &pxs->desc->px;
+
+	off = 0;
+	ljmpfe = off;
+	lcnt0 = pxs->desc->num_periods;
+	periods = 1;
+
+	while (lcnt0 > 256) {
+		periods++;
+		lcnt0 = pxs->desc->num_periods / periods;
+	}
+
+	residue = pxs->desc->num_periods % periods;
+
+	/* forever loop */
+	off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
+	off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
+#ifdef CONFIG_ARCH_ROCKCHIP
+	if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP))
+		off += _emit_FLUSHP(dry_run, &buf[off],
+					pxs->desc->peri);
+#endif
+	/* loop0 */
+	off += _emit_LP(dry_run, &buf[off], 0,  lcnt0);
+	ljmp0 = off;
+
+	for (i = 0; i < periods; i++)
+		off += _period(pl330, dry_run, &buf[off], bursts, pxs, ev);
+
 	lpend.cond = ALWAYS;
 	lpend.forever = false;
 	lpend.loop = 0;
 	lpend.bjump = off - ljmp0;
 	off += _emit_LPEND(dry_run, &buf[off], &lpend);
 
+	for (i = 0; i < residue; i++)
+		off += _period(pl330, dry_run, &buf[off], bursts, pxs, ev);
+
 	lpend.cond = ALWAYS;
 	lpend.forever = true;
 	lpend.loop = 1;

From 316e01186f16836aa6b9adda495ba92213c997c7 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Fri, 24 Aug 2018 16:54:38 +0800
Subject: [PATCH 1189/1852] media: i2c: gc0312: fix fps isn't exactly 30fps

Change-Id: I6a50c976341ad6c838230735a66a8b0ee71c61da
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/gc0312.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/media/i2c/gc0312.c b/drivers/media/i2c/gc0312.c
index 6cf3cc8552fb7..0aa9ff402e92a 100644
--- a/drivers/media/i2c/gc0312.c
+++ b/drivers/media/i2c/gc0312.c
@@ -147,7 +147,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x0f, 0x02},
 	{0x10, 0x88},
 	{0x16, 0x00},
-	{0x17, 0x14},
+	{0x17, 0x17},
 	{0x18, 0x1a},
 	{0x19, 0x14},
 	{0x1b, 0x48},
@@ -430,7 +430,7 @@ static const struct sensor_register gc0312_vga_regs[] = {
 	{0x06, 0x90},
 	{0x07, 0x00},
 	/*VB*/
-	{0x08, 0x31},
+	{0x08, 0x64},
 
 	{0xfe, 0x01},
 	/*anti-flicker step [11:8]*/

From 68c6d68205248186639d6e1d331f858a55241062 Mon Sep 17 00:00:00 2001
From: Wu Liangqing <wlq@rock-chips.com>
Date: Fri, 24 Aug 2018 14:44:47 +0800
Subject: [PATCH 1190/1852] arm: dts: rockchip: rk312x: remove PLL_CPLL set in
 cru

cpll just for display no need to init. init will result in dispaly error
in next-dev uboot

Change-Id: Ie63c8d44aa6b54fb81abfb3a32d71995b8426c7d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
---
 arch/arm/boot/dts/rk312x.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 6fa1c69350dc0..d0e7b12fb1066 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -820,11 +820,11 @@
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
-		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+		assigned-clocks = <&cru PLL_GPLL>,
 				  <&cru ACLK_CPU>, <&cru HCLK_CPU>,
 				  <&cru PCLK_CPU>, <&cru ACLK_PERI>,
 				  <&cru HCLK_PERI>, <&cru PCLK_PERI>;
-		assigned-clock-rates = <594000000>, <400000000>,
+		assigned-clock-rates = <594000000>,
 				       <300000000>, <150000000>,
 				       <75000000>, <300000000>,
 				       <150000000>, <75000000>;

From 8bbb87da742d2bc154cc17ca64a7eaf5822e9ae5 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 24 Aug 2018 10:18:22 +0800
Subject: [PATCH 1191/1852] usb: uas: Add JMicron JMS583 and CHIPFANCIER to
 unusual device

These two devices give the following error on detection.
Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
xhci-hcd xhci-hcd.5.auto: ERROR Transfer event for disabled endpoint
or incorrect stream ring

The same error is not seen when it is added to unusual_device
list with US_FL_NO_REPORT_OPCODES and US_FL_BROKEN_FUA passed.

Change-Id: Ia1035ea597c65ad7112f68f5cbdd792875ee2995
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/storage/unusual_uas.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h
index 8ed80f28416fa..308bc3f652838 100644
--- a/drivers/usb/storage/unusual_uas.h
+++ b/drivers/usb/storage/unusual_uas.h
@@ -148,6 +148,18 @@ UNUSUAL_DEV(0x152d, 0x0578, 0x0000, 0x9999,
 		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
 		US_FL_BROKEN_FUA),
 
+UNUSUAL_DEV(0x152d, 0x0583, 0x0000, 0x9999,
+		"JMicron",
+		"JMS583",
+		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+		US_FL_BROKEN_FUA | US_FL_NO_REPORT_OPCODES),
+
+UNUSUAL_DEV(0x174c, 0x55aa, 0x0000, 0x9999,
+		"WINTOGO",
+		"CHIPFANCIER",
+		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+		US_FL_BROKEN_FUA | US_FL_NO_REPORT_OPCODES),
+
 /* Reported-by: Hans de Goede <hdegoede@redhat.com> */
 UNUSUAL_DEV(0x2109, 0x0711, 0x0000, 0x9999,
 		"VIA",

From 5ea3a42f602da43e3c524ac2d39383b815a222f7 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 17:14:51 +0800
Subject: [PATCH 1192/1852] dt-bindings: rng: Document the Rockchip HW RNG
 bindings

This adds documentation of device tree bindings for the Rockchip hardware
random number generator.

Change-Id: I4548f480d5e89499f527a1f37047404b910b6c88
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 .../devicetree/bindings/rng/rockchip,rng.txt  | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/rockchip,rng.txt

diff --git a/Documentation/devicetree/bindings/rng/rockchip,rng.txt b/Documentation/devicetree/bindings/rng/rockchip,rng.txt
new file mode 100644
index 0000000000000..b184cb25113bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/rockchip,rng.txt
@@ -0,0 +1,32 @@
+Rockchip Hardware Random Number Generator
+
+Required properties:
+
+- compatible  : should be one of the following.
+		"rockchip,cryptov2-rng" for crypto v2
+- reg         : Specifies base physical address and size of the registers map.
+- clocks      : Phandle to clock-controller plus clock-specifier pair.
+- clock-names : "clk_crypto", "clk_crypto_apk", "aclk_crypto", "hclk_crypto" as a clock name.
+- assigned-clocks: Main clock, should be <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+		<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>
+- assigned-clock-rates : The rng core clk frequency, shall be: <150000000>, <150000000>,
+		<200000000>, <100000000>
+- resets      : Used for module reset
+- reset-names : Reset names, should be "reset"
+Example:
+
+	rng: rng@ff2f0000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0x0 0xff2f0000 0x0 0x4000>;
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		clock-names = "clk_crypto", "clk_crypto_apk",
+			"aclk_crypto", "hclk_crypto";
+		assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+				<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		assigned-clock-rates = <150000000>, <150000000>,
+					<200000000>, <100000000>;
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "reset";
+	};
+

From 44fda493b6f772bdeaacfc74ab191bafd175855e Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 09:15:03 +0800
Subject: [PATCH 1193/1852] hwrng: rockchip - add support for Rockchip HW RNG

Change-Id: Ia14bd624716eb6531ef8674843ccfbada3197d8e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 drivers/char/hw_random/Kconfig        |  12 ++
 drivers/char/hw_random/Makefile       |   1 +
 drivers/char/hw_random/rockchip-rng.c | 214 ++++++++++++++++++++++++++
 3 files changed, 227 insertions(+)
 create mode 100644 drivers/char/hw_random/rockchip-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index dbf22719462f9..c38fa0e92d914 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -381,6 +381,18 @@ config HW_RANDOM_STM32
 
 	  If unsure, say N.
 
+config HW_RANDOM_ROCKCHIP
+	tristate "Rockchip Random Number Generator support"
+	depends on ARCH_ROCKCHIP
+	help
+	  This driver provides kernel-side support for the Random Number
+	  Generator hardware found on Rockchip cpus.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called rockchip-rng.
+
+	  If unsure, say Y.
+
 endif # HW_RANDOM
 
 config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 5ad3976351283..653bf8dfaa1d8 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_HW_RANDOM_MSM) += msm-rng.o
 obj-$(CONFIG_HW_RANDOM_ST) += st-rng.o
 obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o
 obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o
+obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o
diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c
new file mode 100644
index 0000000000000..bc966a7fcd53a
--- /dev/null
+++ b/drivers/char/hw_random/rockchip-rng.c
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * rockchip-rng.c Random Number Generator driver for the Rockchip
+ *
+ * Copyright (c) 2018, Fuzhou Rockchip Electronics Co., Ltd.
+ * Author: Lin Jinhan <troy.lin@rock-chips.com>
+ *
+ */
+#include <linux/clk.h>
+#include <linux/hw_random.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#define _SBF(s, v)	((v) << (s))
+
+#define CRYPTO_CLK_NUM	(4)
+#define ROCKCHIP_AUTOSUSPEND_DELAY	100
+#define ROCKCHIP_POLL_PERIOD_US		100
+#define ROCKCHIP_POLL_TIMEOUT_US	10000
+
+#define RK_MAX_RNG_BYTE			(32)
+#define CRYPTO_WRITE_MASK_SHIFT		(16)
+#define CRYPTO_WRITE_MASK_ALL		(0xffffu << CRYPTO_WRITE_MASK_SHIFT)
+
+#define CRYPTO_RNG_CTL			0x0400
+#define CRYPTO_RNG_64_BIT_LEN		_SBF(4, 0x00)
+#define CRYPTO_RNG_128_BIT_LEN		_SBF(4, 0x01)
+#define CRYPTO_RNG_192_BIT_LEN		_SBF(4, 0x02)
+#define CRYPTO_RNG_256_BIT_LEN		_SBF(4, 0x03)
+#define CRYPTO_RNG_FATESY_SOC_RING	_SBF(2, 0x00)
+#define CRYPTO_RNG_SLOWER_SOC_RING_0	_SBF(2, 0x01)
+#define CRYPTO_RNG_SLOWER_SOC_RING_1	_SBF(2, 0x02)
+#define CRYPTO_RNG_SLOWEST_SOC_RING	_SBF(2, 0x03)
+#define CRYPTO_RNG_ENABLE		BIT(1)
+#define CRYPTO_RNG_START		BIT(0)
+
+#define CRYPTO_RNG_SAMPLE_CNT		0x0404
+#define CRYPTO_RNG_DOUT_0		0x0410
+
+struct rk_rng {
+	struct device		*dev;
+	struct hwrng		rng;
+	void __iomem		*mem;
+	struct clk_bulk_data	clk_bulk[CRYPTO_CLK_NUM];
+};
+
+static void rk_rng_writel(struct rk_rng *rng, u32 val, u32 offset)
+{
+	__raw_writel(val, rng->mem + offset);
+}
+
+static int rk_rng_init(struct hwrng *rng)
+{
+	int ret;
+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+
+	dev_dbg(rk_rng->dev, "clk_bulk_prepare_enable.\n");
+
+	ret = clk_bulk_prepare_enable(CRYPTO_CLK_NUM, &rk_rng->clk_bulk[0]);
+	if (ret < 0) {
+		dev_err(rk_rng->dev, "failed to enable clks %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void rk_rng_cleanup(struct hwrng *rng)
+{
+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+
+	dev_dbg(rk_rng->dev, "clk_bulk_disable_unprepare.\n");
+	clk_bulk_disable_unprepare(CRYPTO_CLK_NUM, &rk_rng->clk_bulk[0]);
+}
+
+static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+	int ret = 0;
+	u32 reg_ctrl = 0;
+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+
+	pm_runtime_get_sync(rk_rng->dev);
+
+	/* enable osc_ring to get entropy, sample period is set as 100 */
+	rk_rng_writel(rk_rng, 100, CRYPTO_RNG_SAMPLE_CNT);
+
+	reg_ctrl |= CRYPTO_RNG_256_BIT_LEN;
+	reg_ctrl |= CRYPTO_RNG_SLOWER_SOC_RING_0;
+	reg_ctrl |= CRYPTO_RNG_ENABLE;
+	reg_ctrl |= CRYPTO_RNG_START;
+	reg_ctrl |= CRYPTO_WRITE_MASK_ALL;
+
+	rk_rng_writel(rk_rng, reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+
+	ret = readl_poll_timeout(rk_rng->mem + CRYPTO_RNG_CTL, reg_ctrl,
+				!(reg_ctrl & CRYPTO_RNG_START),
+				ROCKCHIP_POLL_PERIOD_US,
+				ROCKCHIP_POLL_TIMEOUT_US);
+	if (ret < 0)
+		goto out;
+
+	ret = min_t(size_t, max, RK_MAX_RNG_BYTE);
+
+	memcpy_fromio(buf, rk_rng->mem + CRYPTO_RNG_DOUT_0, ret);
+
+out:
+	/* close TRNG */
+	rk_rng_writel(rk_rng, 0 | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+
+	pm_runtime_mark_last_busy(rk_rng->dev);
+	pm_runtime_put_sync_autosuspend(rk_rng->dev);
+
+	return ret;
+}
+
+static int rk_rng_probe(struct platform_device *pdev)
+{
+	struct rk_rng *rk_rng;
+	int ret;
+
+	dev_dbg(&pdev->dev, "probing...\n");
+	rk_rng = devm_kzalloc(&pdev->dev, sizeof(struct rk_rng), GFP_KERNEL);
+	if (!rk_rng)
+		return -ENOMEM;
+
+	rk_rng->dev = &pdev->dev;
+	rk_rng->rng.name    = "rockchip";
+#ifndef CONFIG_PM
+	rk_rng->rng.init    = rk_rng_init;
+	rk_rng->rng.cleanup = rk_rng_cleanup,
+#endif
+	rk_rng->rng.read    = rk_rng_read;
+	rk_rng->rng.quality = 999;
+
+	rk_rng->clk_bulk[0].id = "hclk_crypto";
+	rk_rng->clk_bulk[1].id = "aclk_crypto";
+	rk_rng->clk_bulk[2].id = "clk_crypto";
+	rk_rng->clk_bulk[3].id = "clk_crypto_apk";
+
+	rk_rng->mem = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL);
+	if (IS_ERR(rk_rng->mem))
+		return PTR_ERR(rk_rng->mem);
+
+	ret = devm_clk_bulk_get(&pdev->dev, CRYPTO_CLK_NUM,
+				&rk_rng->clk_bulk[0]);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to get clks property\n");
+		return ret;
+	}
+
+	platform_set_drvdata(pdev, rk_rng);
+
+	pm_runtime_set_autosuspend_delay(&pdev->dev,
+					ROCKCHIP_AUTOSUSPEND_DELAY);
+	pm_runtime_use_autosuspend(&pdev->dev);
+	pm_runtime_enable(&pdev->dev);
+
+	ret = devm_hwrng_register(&pdev->dev, &rk_rng->rng);
+	if (ret) {
+		pm_runtime_dont_use_autosuspend(&pdev->dev);
+		pm_runtime_disable(&pdev->dev);
+	}
+
+	return ret;
+}
+
+#ifdef CONFIG_PM
+static int rk_rng_runtime_suspend(struct device *dev)
+{
+	struct rk_rng *rk_rng = dev_get_drvdata(dev);
+
+	rk_rng_cleanup(&rk_rng->rng);
+
+	return 0;
+}
+
+static int rk_rng_runtime_resume(struct device *dev)
+{
+	struct rk_rng *rk_rng = dev_get_drvdata(dev);
+
+	return rk_rng_init(&rk_rng->rng);
+}
+
+static UNIVERSAL_DEV_PM_OPS(rk_rng_pm_ops, rk_rng_runtime_suspend,
+			    rk_rng_runtime_resume, NULL);
+
+#endif
+
+static const struct of_device_id rk_rng_dt_match[] = {
+	{
+		.compatible = "rockchip,cryptov2-rng",
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, rk_rng_dt_match);
+
+static struct platform_driver rk_rng_driver = {
+	.driver	= {
+		.name	= "rockchip-rng",
+#ifdef CONFIG_PM
+		.pm	= &rk_rng_pm_ops,
+#endif
+		.of_match_table = rk_rng_dt_match,
+	},
+	.probe	= rk_rng_probe,
+};
+
+module_platform_driver(rk_rng_driver);
+
+MODULE_DESCRIPTION("ROCKCHIP H/W Random Number Generator driver");
+MODULE_AUTHOR("Lin Jinhan <troy.lin@rock-chips.com>");
+MODULE_LICENSE("GPL v2");

From df6103f745011892a0282304970d3e9026ab05af Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 09:18:03 +0800
Subject: [PATCH 1194/1852] arm64: rk3308_linux_defconfig: enable HW_RANDOM and
 HW_RANDOM_ROCKCHIP

Change-Id: I05623888fb932e8c93f26888019328bebadf4369
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm64/configs/rk3308_linux_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig
index 97026304ba863..c4c717aa4f8dc 100644
--- a/arch/arm64/configs/rk3308_linux_defconfig
+++ b/arch/arm64/configs/rk3308_linux_defconfig
@@ -115,7 +115,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=5
 CONFIG_SERIAL_8250_RUNTIME_UARTS=5
 CONFIG_SERIAL_8250_DW=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_ROCKCHIP=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_RK3X=y

From 4858527293a5f86a70a10758208a9634c1dd35db Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 17:11:21 +0800
Subject: [PATCH 1195/1852] arm32: rk3308_linux_aarch32_debug_defconfig: enable
 HW_RANDOM and HW_RANDOM_ROCKCHIP

Change-Id: Ibc6f559f022ba299d378ec9fc2fb206a095157d6
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_debug_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
index eb0eabeef1022..afa6ac27b3e1a 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_debug_defconfig
@@ -111,7 +111,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=5
 CONFIG_SERIAL_8250_RUNTIME_UARTS=5
 CONFIG_SERIAL_8250_DW=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_ROCKCHIP=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y

From ec4a96470b9658aee172153626e1d7beade8ecca Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 17:13:42 +0800
Subject: [PATCH 1196/1852] arm32: rk3308_linux_aarch32_defconfig: enable
 HW_RANDOM and HW_RANDOM_ROCKCHIP

Change-Id: Ic6545b6a780958659c947bb2c7319af2223e6469
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm/configs/rk3308_linux_aarch32_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/rk3308_linux_aarch32_defconfig b/arch/arm/configs/rk3308_linux_aarch32_defconfig
index 87b36e4a77b99..c149cf09562dc 100644
--- a/arch/arm/configs/rk3308_linux_aarch32_defconfig
+++ b/arch/arm/configs/rk3308_linux_aarch32_defconfig
@@ -110,7 +110,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=5
 CONFIG_SERIAL_8250_RUNTIME_UARTS=5
 CONFIG_SERIAL_8250_DW=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_ROCKCHIP=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y

From 4c685702d31f2f9380462013270334ed2d96cc77 Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Mon, 27 Aug 2018 20:15:27 +0800
Subject: [PATCH 1197/1852] rtc: rtc-rk-timer: Fix 64-bit counter read

Following arch_counter_get_cntvct_mem() in arm_arch_timer.c

Change-Id: I0d44edcb2cfcf2eb70aceccc57e147fa43eba34d
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/rtc/rtc-rk-timer.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/rtc/rtc-rk-timer.c b/drivers/rtc/rtc-rk-timer.c
index 171e9a31bb6fb..4b516e971f115 100644
--- a/drivers/rtc/rtc-rk-timer.c
+++ b/drivers/rtc/rtc-rk-timer.c
@@ -105,7 +105,26 @@ static inline int rk_timer_rtc_write64(struct rk_timer_rtc *rk_timer_rtc,
 static inline int rk_timer_rtc_read64(struct rk_timer_rtc *rk_timer_rtc,
 				      u32 reg, u64 *val)
 {
-	return regmap_bulk_read(rk_timer_rtc->regmap, reg, val, 2);
+	u32 val_lo, val_hi, tmp_hi;
+	int ret;
+
+	do {
+		ret = regmap_read(rk_timer_rtc->regmap, reg + 4, &val_hi);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(rk_timer_rtc->regmap, reg, &val_lo);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(rk_timer_rtc->regmap, reg + 4, &tmp_hi);
+		if (ret)
+			return ret;
+	} while (val_hi != tmp_hi);
+
+	*val = ((u64) val_hi << 32) | val_lo;
+
+	return 0;
 }
 
 static inline int rk_timer_rtc_irq_clear(struct rk_timer_rtc *rk_timer_rtc)

From 7765a97cdfecdfaa595dd2627a1b3b20f54bf602 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 27 Aug 2018 18:52:19 +0800
Subject: [PATCH 1198/1852] MALI: bifrost: Fix build problem with O=

Change-Id: I4f8625523f86b385d72857d06779669261aef6f9
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/gpu/arm/bifrost/ipa/Kbuild | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/arm/bifrost/ipa/Kbuild b/drivers/gpu/arm/bifrost/ipa/Kbuild
index 32008511f3662..1df2e9de9d5a4 100644
--- a/drivers/gpu/arm/bifrost/ipa/Kbuild
+++ b/drivers/gpu/arm/bifrost/ipa/Kbuild
@@ -25,7 +25,7 @@ bifrost_kbase-y += \
 
 bifrost_kbase-$(CONFIG_DEBUG_FS) += ipa/mali_kbase_ipa_debugfs.o
 
-ifneq ($(wildcard $(src)/ipa/mali_kbase_ipa_vinstr_common.c),)
+ifneq ($(wildcard $(srctree)/$(src)/ipa/mali_kbase_ipa_vinstr_common.c),)
   bifrost_kbase-y += \
 	ipa/mali_kbase_ipa_vinstr_g7x.o \
 	ipa/mali_kbase_ipa_vinstr_common.o

From c64dac0cacf991f83b26d05cf1ecd7103618ca1b Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 28 Aug 2018 09:23:13 +0800
Subject: [PATCH 1199/1852] MALI: bifrost_for_linux: Fix build problem with O=

Change-Id: I6fdee0196ed321b23bffc6531f09c6e5885ce0a6
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/gpu/arm/bifrost_for_linux/ipa/Kbuild | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/arm/bifrost_for_linux/ipa/Kbuild b/drivers/gpu/arm/bifrost_for_linux/ipa/Kbuild
index 831fa83c6a8ee..0776428fce4fa 100644
--- a/drivers/gpu/arm/bifrost_for_linux/ipa/Kbuild
+++ b/drivers/gpu/arm/bifrost_for_linux/ipa/Kbuild
@@ -19,7 +19,7 @@ bifrost_kbase-y += \
 
 bifrost_kbase-$(CONFIG_DEBUG_FS) += ipa/mali_kbase_ipa_debugfs.o
 
-ifneq ($(wildcard $(src)/ipa/mali_kbase_ipa_vinstr_g71.c),)
+ifneq ($(wildcard $(srctree)/$(src)/ipa/mali_kbase_ipa_vinstr_g71.c),)
   bifrost_kbase-y += \
 	ipa/mali_kbase_ipa_vinstr_g71.o \
 	ipa/mali_kbase_ipa_vinstr_common.o

From d30395313c3e7747ad897836466d5d85b09b6fd7 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 27 Aug 2018 17:43:05 +0800
Subject: [PATCH 1200/1852] Revert "regulator: of: Use regulator-init-microvolt
 as early minimum"

This reverts commit a4e0323d131b00b4d12cbbda42a7ea32dc5d72b6.

If uboot needs a high cpu rate, the voltage should be set to a high
value, and the minimal voltage of regulator will also be set to this
value during kernel startup, so it will be failed to set voltage which
is less than this value when consumers change voltage, for example pvtm.

This patch add a new 'regulator-early-min-microvolt' property to limit
the minimal voltage of regulator during kernel startup and it will no
longer be restricted by uboot.

Change-Id: Ia50920b7627f886fab5c9f65a3fc19946debdff2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 Documentation/devicetree/bindings/regulator/regulator.txt | 5 ++---
 drivers/regulator/of_regulator.c                          | 2 +-
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/regulator/regulator.txt b/Documentation/devicetree/bindings/regulator/regulator.txt
index 653a1237c721c..53931649e4d53 100644
--- a/Documentation/devicetree/bindings/regulator/regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/regulator.txt
@@ -5,9 +5,8 @@ Optional properties:
 - regulator-min-microvolt: smallest voltage consumers may set
 - regulator-max-microvolt: largest voltage consumers may set
 - regulator-microvolt-offset: Offset applied to voltages to compensate for voltage drops
-- regulator-init-microvolt: Set by bootloader or when initialising, in order to
-  make sure the voltage can suit the needs of all regulator consumers during
-  system startup.
+- regulator-early-min-microvolt: minimum voltage during system startup, make sure we
+  select a voltage that suits the needs of all regulator consumers
 - regulator-min-microamp: smallest current consumers may set
 - regulator-max-microamp: largest current consumers may set
 - regulator-input-current-limit-microamp: maximum input current regulator allows
diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c
index ecb520b74b6c1..9067049fa3360 100644
--- a/drivers/regulator/of_regulator.c
+++ b/drivers/regulator/of_regulator.c
@@ -42,7 +42,7 @@ static void of_get_regulation_constraints(struct device_node *np,
 	if (!of_property_read_u32(np, "regulator-max-microvolt", &pval))
 		constraints->max_uV = pval;
 
-	if (!of_property_read_u32(np, "regulator-init-microvolt", &pval))
+	if (!of_property_read_u32(np, "regulator-early-min-microvolt", &pval))
 		constraints->early_min_uV = pval;
 
 	/* Voltage change possible? */

From be3465fe88795c2fdff7f9e9e3fb9f80cfaaf65a Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 27 Aug 2018 17:51:59 +0800
Subject: [PATCH 1201/1852] Revert "Revert "arm64: dts: rockchip:
 rk3308-evb-v10: Add regulator-early-min-microvolt for core""

This reverts commit 46d3be8026baf79c87e81eae1a7faa42ff76b944.

This patch add a new 'regulator-early-min-microvolt' property to limit
the minimal voltage of regulator during kernel startup.

Change-Id: I580f0cceda280b9168e7f489f39785830cd28a28
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 40f44013fe5b0..339e0330b5f85 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -154,6 +154,7 @@
 		regulator-min-microvolt = <827000>;
 		regulator-max-microvolt = <1340000>;
 		regulator-init-microvolt = <1015000>;
+		regulator-early-min-microvolt = <1015000>;
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-settling-time-up-us = <250>;

From b7d7b83c86c5211f2d1d0cb63b4c842f73dae1b8 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 24 Aug 2018 09:16:13 +0800
Subject: [PATCH 1202/1852] arm64: dts: rockchip: rk3308: add rng node for
 crypto v2 hwrng

Change-Id: I66432ed414a47dc9f7ff1145564cd696cd93805b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index c2bef21bb64b7..d5a74d063de42 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -814,6 +814,22 @@
 		};
 	};
 
+	rng: rng@ff2f0000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0x0 0xff2f0000 0x0 0x4000>;
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		clock-names = "clk_crypto", "clk_crypto_apk",
+				"aclk_crypto", "hclk_crypto";
+		assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+					<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		assigned-clock-rates = <150000000>, <150000000>,
+					<200000000>, <100000000>;
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
 	i2s_8ch_0: i2s@ff300000 {
 		compatible = "rockchip,rk3308-i2s-tdm";
 		reg = <0x0 0xff300000 0x0 0x1000>;

From 58e5c97ea922900cada2086db077e57d928a6f4f Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Tue, 28 Aug 2018 09:05:11 +0800
Subject: [PATCH 1203/1852] arm64: dts: rockchip: rk3308-evb-*: enable rng

Change-Id: I2800fa3b5de0bc1e02172bbcad848cf78d320142
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi | 4 ++++
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 339e0330b5f85..51acfb182beac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -673,6 +673,10 @@
 	status = "okay";
 };
 
+&rng {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 	vref-supply = <&vcc_1v8>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 4e8885d73e334..1d931d311a040 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -723,6 +723,10 @@
 	status = "okay";
 };
 
+&rng {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 	vref-supply = <&vcc_1v8>;

From 69d640c2262c0926369178c9bc553eeea4e411ca Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Tue, 28 Aug 2018 09:06:19 +0800
Subject: [PATCH 1204/1852] arm: dts: rk3308-voice-module-v10-aarch32: Enable
 rng

Change-Id: I7623a0fa6df690cd03e019bd12052e8a7f96599d
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
index 3b075ee653fe7..92c63ec178398 100644
--- a/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
+++ b/arch/arm/boot/dts/rk3308-voice-module-v10-aarch32.dtsi
@@ -264,6 +264,10 @@
 	status = "okay";
 };
 
+&rng {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 	vref-supply = <&vcc_1v8>;

From b2ea99063352f316109d8789049c7e8d6af2d8a6 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Tue, 28 Aug 2018 08:45:50 +0800
Subject: [PATCH 1205/1852] drm/rockchip: dsi: places the phy to shutdown mode
 in mipi_dphy_power_off()

Change-Id: Ia6d88237d3045fab135c6be7a4afdadb8b295236
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 525e2282585e6..595583bac9666 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -580,6 +580,8 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 
 static void mipi_dphy_power_off(struct dw_mipi_dsi *dsi)
 {
+	regmap_write(dsi->regmap, DSI_PHY_RSTZ, 0);
+
 	if (dsi->dphy.phy)
 		phy_power_off(dsi->dphy.phy);
 }

From 26b0c0ec83e295964c407716d6d87c68aac70aa0 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Thu, 16 Aug 2018 19:49:24 +0800
Subject: [PATCH 1206/1852] arm: dts: rk3128x: Change cpu opp-microvolt form
 one entry to three

Single entry is for target voltage and three entries are for
<target min max> voltages. Change cpu opp-microvolt form one entry to
three entries and set maximum acceptable voltage to a high value so that
regulator device can supply multiple consumers at the same time.

Change-Id: Id74c570afe702e879504a597a3d9fb3754125f2f
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/rk3128x.dtsi | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boot/dts/rk3128x.dtsi b/arch/arm/boot/dts/rk3128x.dtsi
index bed1a10079bb5..5b32f875b8e3b 100644
--- a/arch/arm/boot/dts/rk3128x.dtsi
+++ b/arch/arm/boot/dts/rk3128x.dtsi
@@ -90,35 +90,35 @@
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
-			opp-microvolt = <950000>;
+			opp-microvolt = <950000 950000 1175000>;
 			opp-microvolt-L0 = <950000 950000 1175000>;
-			opp-microvolt-L1 = <950000 950000 1125000>;
+			opp-microvolt-L1 = <950000 950000 1175000>;
 			clock-latency-ns = <40000>;
 			opp-suspend;
 		};
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
-			opp-microvolt = <975000>;
+			opp-microvolt = <975000 975000 1175000>;
 			opp-microvolt-L0 = <975000 975000 1175000>;
-			opp-microvolt-L1 = <975000 975000 1125000>;
+			opp-microvolt-L1 = <975000 975000 1175000>;
 		};
 		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
-			opp-microvolt = <1000000>;
+			opp-microvolt = <1000000 1000000 1175000>;
 			opp-microvolt-L0 = <1000000 1000000 1175000>;
-			opp-microvolt-L1 = <1000000 1000000 1125000>;
+			opp-microvolt-L1 = <1000000 1000000 1175000>;
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
-			opp-microvolt = <1175000>;
+			opp-microvolt = <1175000 1175000 1175000>;
 			opp-microvolt-L0 = <1175000 1175000 1175000>;
-			opp-microvolt-L1 = <1125000 1125000 1125000>;
+			opp-microvolt-L1 = <1125000 1125000 1175000>;
 		};
 		opp-1200000000 {
 			opp-hz = /bits/ 64 <1200000000>;
-			opp-microvolt = <1175000>;
+			opp-microvolt = <1175000 1175000 1175000>;
 			opp-microvolt-L0 = <1175000 1175000 1175000>;
-			opp-microvolt-L1 = <1125000 1125000 1125000>;
+			opp-microvolt-L1 = <1125000 1125000 1175000>;
 		};
 	};
 

From ed6e25ae6157b237befab7fe3a9bc5092b7c0c91 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Mon, 27 Aug 2018 17:12:40 +0800
Subject: [PATCH 1207/1852] arm64: dts: rockchip: Improve the aclk_perilp0
 frequency for rk3399

To improve the performance of dual USB transmission.

Change-Id: Ie20d17029e54d299cddadc7a286d9bf6c96b0fbb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi
index 14ff440843cb7..f13985cf8b6dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi
@@ -151,7 +151,7 @@
 			 <600000000>, <200000000>,
 			 <800000000>, <150000000>,
 			 <75000000>, <37500000>,
-			 <100000000>, <100000000>,
+			 <300000000>, <100000000>,
 			 <50000000>, <100000000>,
 			 <50000000>, <100000000>,
 			 <100000000>, <100000000>,

From b27eac3a5c1543fe3ce30cd97236593c43f2d07e Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 28 Aug 2018 09:54:02 +0800
Subject: [PATCH 1208/1852] dt-bindings: usb: dwc3: add grx/gtx-threshold-cfg
 properties

Add snps,grx-threshold-cfg and snps,gtx-threshold-cfg properties
which provide values for global Rx/Tx threshold control.

Change-Id: Id470cdc8a1bcf7fe8048ecaa040f5b5662b8ce05
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 408639c20c8ca..31ddca7b41ebb 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -60,6 +60,8 @@ Optional properties:
 	register for post-silicon frame length adjustment when the
 	fladj_30mhz_sdbnd signal is invalid or incorrect.
  - snps,usb3-warm-reset-on-resume-quirk: when set, need warm reset on resume.
+ - snps,grx-threshold-cfg: global Rx threshold config
+ - snps,gtx-threshold-cfg: global Tx threshold config
 
  - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
 

From ec8da4683ecd9d48e7e4f5ee8289836e81a2130c Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 27 Aug 2018 11:43:54 +0800
Subject: [PATCH 1209/1852] usb: dwc3: support global Tx/Rx threshold control

According to "TX/RX Data FIFO Sizes and TX/RX Threshold Control
Register Settings" section in the DWC SuperSpeed USB 3.0 Controller
User Guide, for large latency systems, it may cause unnecessary
performance reduction, and having large TX/RX FIFOs alone is not
sufficient, to solve this issue, the controller provides a packet
threshold feature in the host mode.

For example, on rk3399 platforms, if we set aclk_perilp to 100 MHz,
the system usb bus latency is larger than 2.2 microseconds to access
a 1024-byte packet, to avoid underrun and overrun during the burst,
threshold and burst size control must be set through GTXTHRCFG and
GRXTHRCFG registers.

On rk3399 platforms, only a 4-packet TX FIFO and 3-packet RX FIFO
is implemented due to area constraints, so we can program the USB
Maximum TX Burst Size to 13 and the USB Transmit Packet Count to
4 to avoid TX FIFO underrun during an OUT burst. Similarly, set the
USB Maximum TX Burst Size to 10 and the USB Transmit Packet Count
to 2 to avoid RX FIFO overrrun. To enable the threshold control,
add "snps,gtx-threshold-cfg = <4>, <13>" in dts dwc3 node for Tx,
add "snps,grx-threshold-cfg = <2>, <10>" in dts dwc3 node for Rx.

Change-Id: I7535fe72e6527544a20c5921440b4888e1bada22
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc3/core.c | 21 +++++++++++++++++++++
 drivers/usb/dwc3/core.h |  9 +++++++++
 2 files changed, 30 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 366738c582bf5..2ef7ffdc61df2 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -729,6 +729,22 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
 
+	if (dwc->grxthrcfg[0] > 0) {
+		reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
+		reg |= DWC3_GRXTHRCFG_PKTCNTSEL |
+		       DWC3_GRXTHRCFG_RXPKTCNT(dwc->grxthrcfg[0]) |
+		       DWC3_GRXTHRCFG_MAXRXBURSTSIZE(dwc->grxthrcfg[1]);
+		dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
+	}
+
+	if (dwc->gtxthrcfg[0] > 0) {
+		reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
+		reg |= DWC3_GTXTHRCFG_PKTCNTSEL |
+		       DWC3_GTXTHRCFG_TXPKTCNT(dwc->gtxthrcfg[0]) |
+		       DWC3_GTXTHRCFG_MAXRXBURSTSIZE(dwc->gtxthrcfg[1]);
+		dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
+	}
+
 	return 0;
 
 err4:
@@ -1023,6 +1039,11 @@ static int dwc3_probe(struct platform_device *pdev)
 				    &dwc->hsphy_interface);
 	device_property_read_u32(dev, "snps,quirk-frame-length-adjustment",
 				 &dwc->fladj);
+	device_property_read_u32_array(dev, "snps,gtx-threshold-cfg",
+				       dwc->gtxthrcfg, 2);
+
+	device_property_read_u32_array(dev, "snps,grx-threshold-cfg",
+				       dwc->grxthrcfg, 2);
 
 	/* default to superspeed if no maximum_speed passed */
 	if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 73176a6e2d8f1..c025c3c007bcd 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -166,6 +166,11 @@
 #define DWC3_DESCFETCHQ		13
 #define DWC3_EVENTQ		15
 
+/* Global TX Threshold Configuration Register */
+#define DWC3_GTXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0xff) << 16)
+#define DWC3_GTXTHRCFG_TXPKTCNT(n) (((n) & 0xf) << 24)
+#define DWC3_GTXTHRCFG_PKTCNTSEL BIT(29)
+
 /* Global RX Threshold Configuration Register */
 #define DWC3_GRXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0x1f) << 19)
 #define DWC3_GRXTHRCFG_RXPKTCNT(n) (((n) & 0xf) << 24)
@@ -785,6 +790,8 @@ struct dwc3_scratchpad_array {
  * @test_mode_nr: test feature selector
  * @lpm_nyet_threshold: LPM NYET response threshold
  * @hird_threshold: HIRD threshold
+ * @grxthrcfg: global Tx threshold config
+ * @gtxthrcfg: global Rx threshold config
  * @hsphy_interface: "utmi" or "ulpi"
  * @connected: true when we're connected to a host, false otherwise
  * @delayed_status: true when gadget driver asks for delayed status
@@ -943,6 +950,8 @@ struct dwc3 {
 	u8			test_mode_nr;
 	u8			lpm_nyet_threshold;
 	u8			hird_threshold;
+	u32			grxthrcfg[2];
+	u32			gtxthrcfg[2];
 
 	const char		*hsphy_interface;
 

From 246861b834694c9ad451e8722f49389c42c76eaf Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 27 Aug 2018 20:14:40 +0800
Subject: [PATCH 1210/1852] net: wireless: rockchip_wlan: rtl8723bs: Fix build
 problem with O=

Change-Id: I9d17dbce96b649fd56298f66ff0da2afbdcf3f7e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
index 0ff707fd37eb7..fe9d5638a1282 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
@@ -153,7 +153,7 @@ CONFIG_PLATFORM_RTL8197D = n
 
 CONFIG_DRVEXT_MODULE = n
 
-export TopDIR ?= $(shell pwd)/drivers/net/wireless/rockchip_wlan/rtl8723bs
+export TopDIR ?= $(src)
 
 ########### COMMON  #################################
 ifeq ($(CONFIG_GSPI_HCI), y)

From 297345dc236ae64acd7a79e0b885d770209495b7 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 28 Aug 2018 14:08:00 +0800
Subject: [PATCH 1211/1852] net: wireless: rockchip_wlan: rtl8723ds: Fix build
 problem with O=

Change-Id: I2f2a83ea635c267a74df48a46ebba9147e56b4a7
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/rtl8723ds/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723ds/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723ds/Makefile
index fcd0c27cfd1df..82d957c5df6d5 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8723ds/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/rtl8723ds/Makefile
@@ -152,7 +152,7 @@ CONFIG_PLATFORM_RTL8197D = n
 
 CONFIG_DRVEXT_MODULE = n
 
-export TopDIR ?= $(shell pwd)/drivers/net/wireless/rockchip_wlan/rtl8723ds
+export TopDIR ?= $(src)
 
 ########### COMMON  #################################
 ifeq ($(CONFIG_GSPI_HCI), y)

From f629be98569593161cb76522f7f38fa1c8f44074 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 28 Aug 2018 16:38:56 +0800
Subject: [PATCH 1212/1852] rk: arm64: Fix build problem with O=

mkkrnlimg/resource_tool is build from source, don't use $(srctree)
on Makefile.
make modules when $(srctree) == $(objtree) otherwise build will
fail.

Change-Id: If8461a30d450aef089ae7db5f5851d4837e7c303
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm64/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 7f9be09fba1d3..6edd48b23f1b0 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -164,10 +164,10 @@ define archhelp
 endef
 
 kernel.img: Image.lz4
-	$(Q)$(srctree)/scripts/mkkrnlimg $(objtree)/arch/arm64/boot/Image $(objtree)/kernel.img >/dev/null
+	$(Q)scripts/mkkrnlimg $(objtree)/arch/arm64/boot/Image $(objtree)/kernel.img >/dev/null
 	@echo '  Image:  kernel.img is ready'
 ifdef CONFIG_MODULES
-	$(Q)$(MAKE) modules
+	$(Q)if [ "$(srctree)" = "$(objtree)" ]; then $(MAKE) modules; fi
 endif
 
 LOGO := $(notdir $(wildcard $(srctree)/logo.bmp))
@@ -175,7 +175,7 @@ LOGO_KERNEL := $(notdir $(wildcard $(srctree)/logo_kernel.bmp))
 %.img: rockchip/%.dtb kernel.img $(LOGO) $(LOGO_KERNEL)
 	$(Q) if [ -f $(srctree)/$(LOGO) -a "$(srctree)" != "$(objtree)" ]; then cp -a $(srctree)/$(LOGO) $(objtree)/; fi
 	$(Q) if [ -f $(srctree)/$(LOGO_KERNEL) -a "$(srctree)" != "$(objtree)" ]; then cp -a $(srctree)/$(LOGO_KERNEL) $(objtree)/; fi
-	$(Q)$(srctree)/scripts/resource_tool $(objtree)/arch/arm64/boot/dts/rockchip/$*.dtb $(LOGO) $(LOGO_KERNEL)
+	$(Q)scripts/resource_tool $(objtree)/arch/arm64/boot/dts/rockchip/$*.dtb $(LOGO) $(LOGO_KERNEL)
 	@echo '  Image:  resource.img (with $*.dtb $(LOGO) $(LOGO_KERNEL)) is ready'
 	$(Q) if [ -x $(srctree)/scripts/mkbootimg ]; then \
 		$(srctree)/scripts/mkbootimg \

From 859660fb6c8f711869aae9f6fba6c9058098c9dd Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 28 Aug 2018 18:25:06 +0800
Subject: [PATCH 1213/1852] rk: ARM: Fix build problem with O=

mkkrnlimg/resource_tool is build from source, don't use $(srctree)
on Makefile.
make modules when $(srctree) == $(objtree) otherwise build will
fail.

Change-Id: I7824d0e9cb60ca40925c4047a203242c6e50505d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 612277d81704a..2c908f4d8190e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -382,10 +382,10 @@ define archhelp
 endef
 
 kernel.img: zImage
-	$(Q)$(srctree)/scripts/mkkrnlimg $(objtree)/arch/arm/boot/zImage $(objtree)/kernel.img >/dev/null
+	$(Q)scripts/mkkrnlimg $(objtree)/arch/arm/boot/zImage $(objtree)/kernel.img >/dev/null
 	@echo '  Image:  kernel.img (with zImage) is ready'
 ifdef CONFIG_MODULES
-	$(Q)$(MAKE) modules
+	$(Q)if [ "$(srctree)" = "$(objtree)" ]; then $(MAKE) modules; fi
 endif
 
 ifdef CONFIG_FB
@@ -395,7 +395,7 @@ endif
 %.img: %.dtb kernel.img $(LOGO) $(LOGO_KERNEL)
 	$(Q) if [ -f $(srctree)/$(LOGO) -a "$(srctree)" != "$(objtree)" ]; then cp -a $(srctree)/$(LOGO) $(objtree)/; fi
 	$(Q) if [ -f $(srctree)/$(LOGO_KERNEL) -a "$(srctree)" != "$(objtree)" ]; then cp -a $(srctree)/$(LOGO_KERNEL) $(objtree)/; fi
-	$(Q)$(srctree)/scripts/resource_tool $(objtree)/arch/arm/boot/dts/$*.dtb $(LOGO) $(LOGO_KERNEL)
+	$(Q)scripts/resource_tool $(objtree)/arch/arm/boot/dts/$*.dtb $(LOGO) $(LOGO_KERNEL)
 	@echo '  Image:  resource.img (with $*.dtb $(LOGO) $(LOGO_KERNEL)) is ready'
 	$(Q) if [ -x $(srctree)/scripts/mkbootimg ]; then \
 		$(srctree)/scripts/mkbootimg \

From e8f2756c6e870429c0b26585b0f050737000851b Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 20 Jun 2018 10:09:34 +0800
Subject: [PATCH 1214/1852] clk: rockchip: Add support to get boost configure
 from devicetree

There are some configuration options for cpu boost, such as low
frequency, higt frequency, boost backup pll, and so on.

Change-Id: I35d65f05bbd5ef2a70e4a2e4637e7b4f9f67dda9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-cpu.c    |   1 +
 drivers/clk/rockchip/clk-pll.c    | 321 ++++++++++++++++++++++--------
 drivers/clk/rockchip/clk-px30.c   |   2 +-
 drivers/clk/rockchip/clk-rk3308.c |   2 +-
 drivers/clk/rockchip/clk.c        |   5 +-
 drivers/clk/rockchip/clk.h        |  35 ++--
 6 files changed, 253 insertions(+), 113 deletions(-)

diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c
index 7b623ddb30867..0e986bb4f28e1 100644
--- a/drivers/clk/rockchip/clk-cpu.c
+++ b/drivers/clk/rockchip/clk-cpu.c
@@ -286,6 +286,7 @@ struct clk *rockchip_clk_register_cpuclk(const char *name,
 			goto free_cpuclk;
 		}
 		cpuclk->pll_hw = __clk_get_hw(pll_clk);
+		rockchip_boost_init(cpuclk->pll_hw);
 	}
 
 	cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]);
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index addcdb07553a3..2426582ad23a8 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -26,6 +26,7 @@
 #include <linux/regmap.h>
 #include <linux/clk.h>
 #include <linux/gcd.h>
+#include <linux/mfd/syscon.h>
 #include "clk.h"
 
 #define PLL_MODE_MASK		0x3
@@ -52,9 +53,13 @@ struct rockchip_clk_pll {
 	int			sel;
 	unsigned long		scaling;
 	spinlock_t		*lock;
-	bool			boost_enabled;
 
 	struct rockchip_clk_provider *ctx;
+
+	bool			boost_enabled;
+	unsigned long		boost_low_rate;
+	unsigned long		boost_high_rate;
+	struct regmap		*boost;
 #ifdef CONFIG_DEBUG_FS
 	struct hlist_node	debug_node;
 #endif
@@ -69,6 +74,7 @@ static void rockchip_rk3366_pll_get_params(struct rockchip_clk_pll *pll,
 					struct rockchip_pll_rate_table *rate);
 static int rockchip_rk3366_pll_set_params(struct rockchip_clk_pll *pll,
 				const struct rockchip_pll_rate_table *rate);
+static void rockchip_boost_disable_low(struct rockchip_clk_pll *pll);
 
 #define MHZ			(1000UL * 1000UL)
 #define KHZ			(1000UL)
@@ -387,65 +393,6 @@ static int rockchip_pll_wait_lock(struct rockchip_clk_pll *pll)
 	return -ETIMEDOUT;
 }
 
-void rockchip_boost_enable_recovery_sw_low(struct clk_hw *hw)
-{
-	struct rockchip_clk_pll *pll;
-	struct regmap *boost;
-	unsigned int val;
-
-	if (!hw)
-		return;
-	pll = to_rockchip_clk_pll(hw);
-	if (!pll->boost_enabled || IS_ERR(pll->ctx->boost))
-		return;
-
-	boost = pll->ctx->boost;
-	regmap_write(boost, BOOST_BOOST_CON,
-		     HIWORD_UPDATE(1, BOOST_RECOVERY_MASK,
-				   BOOST_RECOVERY_SHIFT));
-	do {
-		regmap_read(boost, BOOST_FSM_STATUS, &val);
-	} while (!(val & BOOST_BUSY_STATE));
-
-	regmap_write(boost, BOOST_BOOST_CON,
-		     HIWORD_UPDATE(1, BOOST_SW_CTRL_MASK,
-				   BOOST_SW_CTRL_SHIFT) |
-		     HIWORD_UPDATE(1, BOOST_LOW_FREQ_EN_MASK,
-				   BOOST_LOW_FREQ_EN_SHIFT));
-}
-
-void rockchip_boost_disable_low(struct rockchip_clk_pll *pll)
-{
-	struct regmap *boost = pll->ctx->boost;
-
-	if (!pll->boost_enabled || IS_ERR(boost))
-		return;
-
-	regmap_write(boost, BOOST_BOOST_CON,
-		     HIWORD_UPDATE(0, BOOST_LOW_FREQ_EN_MASK,
-				   BOOST_LOW_FREQ_EN_SHIFT));
-}
-
-void rockchip_boost_disable_recovery_sw(struct clk_hw *hw)
-{
-	struct rockchip_clk_pll *pll;
-	struct regmap *boost;
-
-	if (!hw)
-		return;
-	pll = to_rockchip_clk_pll(hw);
-	if (!pll->boost_enabled || IS_ERR(pll->ctx->boost))
-		return;
-
-	boost = pll->ctx->boost;
-	regmap_write(boost, BOOST_BOOST_CON,
-		     HIWORD_UPDATE(0, BOOST_RECOVERY_MASK,
-				   BOOST_RECOVERY_SHIFT));
-	regmap_write(boost, BOOST_BOOST_CON,
-		     HIWORD_UPDATE(0, BOOST_SW_CTRL_MASK,
-				   BOOST_SW_CTRL_SHIFT));
-}
-
 /**
  * PLL used in RK3036
  */
@@ -466,6 +413,30 @@ void rockchip_boost_disable_recovery_sw(struct clk_hw *hw)
 
 #define RK3036_PLLCON1_PWRDOWN			(1 << 13)
 
+static unsigned long
+rockchip_rk3036_pll_con_to_rate(struct rockchip_clk_pll *pll,
+				u32 con0, u32 con1)
+{
+	unsigned int fbdiv, postdiv1, refdiv, postdiv2;
+	u64 rate64 = 24000000;
+
+	fbdiv = ((con0 >> RK3036_PLLCON0_FBDIV_SHIFT) &
+		  RK3036_PLLCON0_FBDIV_MASK);
+	postdiv1 = ((con0 >> RK3036_PLLCON0_POSTDIV1_SHIFT) &
+		     RK3036_PLLCON0_POSTDIV1_MASK);
+	refdiv = ((con1 >> RK3036_PLLCON1_REFDIV_SHIFT) &
+		   RK3036_PLLCON1_REFDIV_MASK);
+	postdiv2 = ((con1 >> RK3036_PLLCON1_POSTDIV2_SHIFT) &
+		     RK3036_PLLCON1_POSTDIV2_MASK);
+
+	rate64 *= fbdiv;
+	do_div(rate64, refdiv);
+	do_div(rate64, postdiv1);
+	do_div(rate64, postdiv2);
+
+	return (unsigned long)rate64;
+}
+
 static void rockchip_rk3036_pll_get_params(struct rockchip_clk_pll *pll,
 					struct rockchip_pll_rate_table *rate)
 {
@@ -1398,8 +1369,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
 		u8 num_parents, int con_offset, int grf_lock_offset,
 		int lock_shift, int mode_offset, int mode_shift,
 		struct rockchip_pll_rate_table *rate_table,
-		unsigned long flags, u8 clk_pll_flags,
-		bool boost_enabled)
+		unsigned long flags, u8 clk_pll_flags)
 {
 	const char *pll_parents[3];
 	struct clk_init_data init;
@@ -1524,7 +1494,6 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
 	pll->flags = clk_pll_flags;
 	pll->lock = &ctx->lock;
 	pll->ctx = ctx;
-	pll->boost_enabled = boost_enabled;
 
 	pll_clk = clk_register(NULL, &pll->hw);
 	if (IS_ERR(pll_clk)) {
@@ -1533,14 +1502,6 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
 		goto err_pll;
 	}
 
-#ifdef CONFIG_DEBUG_FS
-	if (boost_enabled && !IS_ERR(ctx->boost)) {
-		mutex_lock(&clk_boost_lock);
-		hlist_add_head(&pll->debug_node, &clk_boost_list);
-		mutex_unlock(&clk_boost_lock);
-	}
-#endif
-
 	return mux_clk;
 
 err_pll:
@@ -1551,36 +1512,198 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
 	return mux_clk;
 }
 
+static unsigned long rockchip_pll_con_to_rate(struct rockchip_clk_pll *pll,
+					      u32 con0, u32 con1)
+{
+	switch (pll->type) {
+	case pll_rk3036:
+	case pll_rk3328:
+		return rockchip_rk3036_pll_con_to_rate(pll, con0, con1);
+	case pll_rk3066:
+		break;
+	case pll_rk3366:
+		break;
+	case pll_rk3399:
+		break;
+	default:
+		pr_warn("%s: Unknown pll type\n", __func__);
+	}
+
+	return 0;
+}
+
+void rockchip_boost_init(struct clk_hw *hw)
+{
+	struct rockchip_clk_pll *pll;
+	struct device_node *np;
+	u32 value, con0, con1;
+
+	if (!hw)
+		return;
+	pll = to_rockchip_clk_pll(hw);
+	np = of_parse_phandle(pll->ctx->cru_node, "rockchip,boost", 0);
+	if (!np) {
+		pr_debug("%s: failed to get boost np\n", __func__);
+		return;
+	}
+	pll->boost = syscon_node_to_regmap(np);
+	if (IS_ERR(pll->boost)) {
+		pr_debug("%s: failed to get boost regmap\n", __func__);
+		return;
+	}
+
+	if (!of_property_read_u32(np, "rockchip,boost-low-con0", &con0) &&
+	    !of_property_read_u32(np, "rockchip,boost-low-con1", &con1)) {
+		pr_debug("boost-low-con=0x%x 0x%x\n", con0, con1);
+		regmap_write(pll->boost, BOOST_PLL_L_CON(0),
+			     HIWORD_UPDATE(con0, BOOST_PLL_CON_MASK, 0));
+		regmap_write(pll->boost, BOOST_PLL_L_CON(1),
+			     HIWORD_UPDATE(con1, BOOST_PLL_CON_MASK, 0));
+		pll->boost_low_rate = rockchip_pll_con_to_rate(pll, con0,
+							       con1);
+		pr_debug("boost-low-rate=%lu\n", pll->boost_low_rate);
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-high-con0", &con0) &&
+	    !of_property_read_u32(np, "rockchip,boost-high-con1", &con1)) {
+		pr_debug("boost-high-con=0x%x 0x%x\n", con0, con1);
+		regmap_write(pll->boost, BOOST_PLL_H_CON(0),
+			     HIWORD_UPDATE(con0, BOOST_PLL_CON_MASK, 0));
+		regmap_write(pll->boost, BOOST_PLL_H_CON(1),
+			     HIWORD_UPDATE(con1, BOOST_PLL_CON_MASK, 0));
+		pll->boost_high_rate = rockchip_pll_con_to_rate(pll, con0,
+								con1);
+		pr_debug("boost-high-rate=%lu\n", pll->boost_high_rate);
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-backup-pll", &value)) {
+		pr_debug("boost-backup-pll=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_CLK_CON,
+			     HIWORD_UPDATE(value, BOOST_BACKUP_PLL_MASK,
+					   BOOST_BACKUP_PLL_SHIFT));
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-backup-pll-usage",
+				  &value)) {
+		pr_debug("boost-backup-pll-usage=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_CLK_CON,
+			     HIWORD_UPDATE(value, BOOST_BACKUP_PLL_USAGE_MASK,
+					   BOOST_BACKUP_PLL_USAGE_SHIFT));
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-switch-threshold",
+				  &value)) {
+		pr_debug("boost-switch-threshold=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_SWITCH_THRESHOLD, value);
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-statis-threshold",
+				  &value)) {
+		pr_debug("boost-statis-threshold=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_STATIS_THRESHOLD, value);
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-statis-enable",
+				  &value)) {
+		pr_debug("boost-statis-enable=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_BOOST_CON,
+			     HIWORD_UPDATE(value, BOOST_STATIS_ENABLE_MASK,
+					   BOOST_STATIS_ENABLE_SHIFT));
+	}
+	if (!of_property_read_u32(np, "rockchip,boost-enable", &value)) {
+		pr_debug("boost-enable=0x%x\n", value);
+		regmap_write(pll->boost, BOOST_BOOST_CON,
+			     HIWORD_UPDATE(value, BOOST_ENABLE_MASK,
+					   BOOST_ENABLE_SHIFT));
+		if (value)
+			pll->boost_enabled = true;
+	}
+#ifdef CONFIG_DEBUG_FS
+	if (pll->boost_enabled) {
+		mutex_lock(&clk_boost_lock);
+		hlist_add_head(&pll->debug_node, &clk_boost_list);
+		mutex_unlock(&clk_boost_lock);
+	}
+#endif
+}
+
+void rockchip_boost_enable_recovery_sw_low(struct clk_hw *hw)
+{
+	struct rockchip_clk_pll *pll;
+	unsigned int val;
+
+	if (!hw)
+		return;
+	pll = to_rockchip_clk_pll(hw);
+	if (!pll->boost_enabled)
+		return;
+
+	regmap_write(pll->boost, BOOST_BOOST_CON,
+		     HIWORD_UPDATE(1, BOOST_RECOVERY_MASK,
+				   BOOST_RECOVERY_SHIFT));
+	do {
+		regmap_read(pll->boost, BOOST_FSM_STATUS, &val);
+	} while (!(val & BOOST_BUSY_STATE));
+
+	regmap_write(pll->boost, BOOST_BOOST_CON,
+		     HIWORD_UPDATE(1, BOOST_SW_CTRL_MASK,
+				   BOOST_SW_CTRL_SHIFT) |
+		     HIWORD_UPDATE(1, BOOST_LOW_FREQ_EN_MASK,
+				   BOOST_LOW_FREQ_EN_SHIFT));
+}
+
+static void rockchip_boost_disable_low(struct rockchip_clk_pll *pll)
+{
+	if (!pll->boost_enabled)
+		return;
+
+	regmap_write(pll->boost, BOOST_BOOST_CON,
+		     HIWORD_UPDATE(0, BOOST_LOW_FREQ_EN_MASK,
+				   BOOST_LOW_FREQ_EN_SHIFT));
+}
+
+void rockchip_boost_disable_recovery_sw(struct clk_hw *hw)
+{
+	struct rockchip_clk_pll *pll;
+
+	if (!hw)
+		return;
+	pll = to_rockchip_clk_pll(hw);
+	if (!pll->boost_enabled)
+		return;
+
+	regmap_write(pll->boost, BOOST_BOOST_CON,
+		     HIWORD_UPDATE(0, BOOST_RECOVERY_MASK,
+				   BOOST_RECOVERY_SHIFT));
+	regmap_write(pll->boost, BOOST_BOOST_CON,
+		     HIWORD_UPDATE(0, BOOST_SW_CTRL_MASK,
+				   BOOST_SW_CTRL_SHIFT));
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 
 static int boost_summary_show(struct seq_file *s, void *data)
 {
 	struct rockchip_clk_pll *pll = (struct rockchip_clk_pll *)s->private;
-	struct regmap *boost = pll->ctx->boost;
 	u32 boost_count = 0;
 	u32 freq_cnt0 = 0, freq_cnt1 = 0;
-	u64 high_freq_time = 0;
+	u64 freq_cnt = 0, high_freq_time = 0;
 	u32 short_count = 0, short_threshold = 0;
 	u32 interval_time = 0;
 
-	seq_puts(s, " device   boost_count   high_freq_time(us)   short_count   short_threshold   interval_time\n");
-	seq_puts(s, "------------------------------------------------------------------------------------------\n");
+	seq_puts(s, " device    boost_count   high_freq_count  high_freq_time  short_count  short_threshold  interval_count\n");
+	seq_puts(s, "------------------------------------------------------------------------------------------------------\n");
 	seq_printf(s, " %s\n", clk_hw_get_name(&pll->hw));
 
-	regmap_read(boost, BOOST_SWITCH_CNT, &boost_count);
+	regmap_read(pll->boost, BOOST_SWITCH_CNT, &boost_count);
 
-	regmap_read(boost, BOOST_HIGH_PERF_CNT0, &freq_cnt0);
-	regmap_read(boost, BOOST_HIGH_PERF_CNT1, &freq_cnt1);
-	high_freq_time = ((u64)freq_cnt1 << 32) + (u64)freq_cnt0;
+	regmap_read(pll->boost, BOOST_HIGH_PERF_CNT0, &freq_cnt0);
+	regmap_read(pll->boost, BOOST_HIGH_PERF_CNT1, &freq_cnt1);
+	freq_cnt = ((u64)freq_cnt1 << 32) + (u64)freq_cnt0;
+	high_freq_time = freq_cnt;
 	do_div(high_freq_time, 24);
 
-	regmap_read(boost, BOOST_SHORT_SWITCH_CNT, &short_count);
-	regmap_read(boost, BOOST_STATIS_THRESHOLD, &short_threshold);
-	regmap_read(boost, BOOST_SWITCH_THRESHOLD, &interval_time);
+	regmap_read(pll->boost, BOOST_SHORT_SWITCH_CNT, &short_count);
+	regmap_read(pll->boost, BOOST_STATIS_THRESHOLD, &short_threshold);
+	regmap_read(pll->boost, BOOST_SWITCH_THRESHOLD, &interval_time);
 
-	seq_printf(s, "%21u %20llu %13u %17u %15u\n",
-		   boost_count, high_freq_time, short_count,
+	seq_printf(s, "%22u %17llu %15llu %12u %16u %15u\n",
+		   boost_count, freq_cnt, high_freq_time, short_count,
 		   short_threshold, interval_time);
 
 	return 0;
@@ -1598,6 +1721,29 @@ static const struct file_operations boost_summary_fops = {
 	.release	= single_release,
 };
 
+static int boost_config_show(struct seq_file *s, void *data)
+{
+	struct rockchip_clk_pll *pll = (struct rockchip_clk_pll *)s->private;
+
+	seq_printf(s, "boost_enabled:   %d\n", pll->boost_enabled);
+	seq_printf(s, "boost_low_rate:  %lu\n", pll->boost_low_rate);
+	seq_printf(s, "boost_high_rate: %lu\n", pll->boost_high_rate);
+
+	return 0;
+}
+
+static int boost_config_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, boost_config_show, inode->i_private);
+}
+
+static const struct file_operations boost_config_fops = {
+	.open		= boost_config_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+
 static int boost_debug_create_one(struct rockchip_clk_pll *pll,
 				  struct dentry *rootdir)
 {
@@ -1617,6 +1763,13 @@ static int boost_debug_create_one(struct rockchip_clk_pll *pll,
 		return -ENOMEM;
 	}
 
+	d = debugfs_create_file("boost_config", 0444, pdentry,
+				pll, &boost_config_fops);
+	if (!d) {
+		pr_err("%s: failed to create boost config file\n", __func__);
+		return -ENOMEM;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 9b340f5926cda..52a75e12f433d 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -191,7 +191,7 @@ PNAME(mux_usbphy_ref_p)		= { "xin24m", "clk_ref24m_pmu" };
 PNAME(mux_mipidsiphy_ref_p)	= { "xin24m", "clk_ref24m_pmu" };
 
 static struct rockchip_pll_clock px30_pll_clks[] __initdata = {
-	[apll] = PLL_BOOST(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
+	[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
 		     0, PX30_PLL_CON(0),
 		     PX30_MODE_CON, 0, 0, 0, px30_pll_rates),
 	[dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c
index 79f6f98c49acd..0cd2928ee94f4 100644
--- a/drivers/clk/rockchip/clk-rk3308.c
+++ b/drivers/clk/rockchip/clk-rk3308.c
@@ -190,7 +190,7 @@ PNAME(mux_spdif_rx_src_p)	= { "clk_spdif_rx_div", "clk_spdif_rx_div50" };
 PNAME(mux_spdif_rx_p)		= { "clk_spdif_rx_src", "clk_spdif_rx_frac" };
 
 static struct rockchip_pll_clock rk3308_pll_clks[] __initdata = {
-	[apll] = PLL_BOOST(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
+	[apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
 		     0, RK3308_PLL_CON(0),
 		     RK3308_MODE_CON, 0, 0, 0, rk3308_pll_rates),
 	[dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index b187fae839912..b90f21731d5ee 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -410,8 +410,6 @@ struct rockchip_clk_provider * __init rockchip_clk_init(struct device_node *np,
 	spin_lock_init(&ctx->lock);
 	ctx->grf = syscon_regmap_lookup_by_phandle(ctx->cru_node,
 						   "rockchip,grf");
-	ctx->boost = syscon_regmap_lookup_by_phandle(ctx->cru_node,
-						   "rockchip,boost");
 
 	return ctx;
 
@@ -455,8 +453,7 @@ void __init rockchip_clk_register_plls(struct rockchip_clk_provider *ctx,
 				list->con_offset, grf_lock_offset,
 				list->lock_shift, list->mode_offset,
 				list->mode_shift, list->rate_table,
-				list->flags, list->pll_flags,
-				list->boost_enabled);
+				list->flags, list->pll_flags);
 		if (IS_ERR(clk)) {
 			pr_err("%s: failed to register clock %s\n", __func__,
 				list->name);
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 65708e43cf510..e6817bf0ebcb7 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -45,12 +45,21 @@ struct clk;
 #define BOOST_SWITCH_THRESHOLD		0x0024
 #define BOOST_FSM_STATUS		0x0028
 #define BOOST_PLL_L_CON(x)		((x) * 0x4 + 0x2c)
+#define BOOST_PLL_CON_MASK		0xffff
+#define BOOST_BACKUP_PLL_MASK		0x3
+#define BOOST_BACKUP_PLL_SHIFT		8
+#define BOOST_BACKUP_PLL_USAGE_MASK	0x1
+#define BOOST_BACKUP_PLL_USAGE_SHIFT	12
+#define BOOST_ENABLE_MASK		0x1
+#define BOOST_ENABLE_SHIFT		0
 #define BOOST_RECOVERY_MASK		0x1
 #define BOOST_RECOVERY_SHIFT		1
 #define BOOST_SW_CTRL_MASK		0x1
 #define BOOST_SW_CTRL_SHIFT		2
 #define BOOST_LOW_FREQ_EN_MASK		0x1
 #define BOOST_LOW_FREQ_EN_SHIFT		3
+#define BOOST_STATIS_ENABLE_MASK	0x1
+#define BOOST_STATIS_ENABLE_SHIFT	4
 #define BOOST_BUSY_STATE		BIT(8)
 
 #define PX30_PLL_CON(x)			((x) * 0x4)
@@ -236,7 +245,6 @@ struct rockchip_clk_provider {
 	struct clk_onecell_data clk_data;
 	struct device_node *cru_node;
 	struct regmap *grf;
-	struct regmap *boost;
 	spinlock_t lock;
 };
 
@@ -269,7 +277,6 @@ struct rockchip_pll_rate_table {
  * @type: Type of PLL to be registered.
  * @pll_flags: hardware-specific flags
  * @rate_table: Table of usable pll rates
- * @boost_enabled: whether pll supports boost
  *
  * Flags:
  * ROCKCHIP_PLL_SYNC_RATE - check rate parameters to match against the
@@ -288,7 +295,6 @@ struct rockchip_pll_clock {
 	enum rockchip_pll_type	type;
 	u8			pll_flags;
 	struct rockchip_pll_rate_table *rate_table;
-	bool			boost_enabled;
 };
 
 #define ROCKCHIP_PLL_SYNC_RATE		BIT(0)
@@ -310,32 +316,15 @@ struct rockchip_pll_clock {
 		.rate_table	= _rtable,				\
 	}
 
-#define PLL_BOOST(_type, _id, _name, _pnames, _flags, _con, _mode,	\
-		_mshift, _lshift, _pflags, _rtable)			\
-	{								\
-		.id		= _id,					\
-		.type		= _type,				\
-		.name		= _name,				\
-		.parent_names	= _pnames,				\
-		.num_parents	= ARRAY_SIZE(_pnames),			\
-		.flags		= CLK_GET_RATE_NOCACHE | _flags,	\
-		.con_offset	= _con,					\
-		.mode_offset	= _mode,				\
-		.mode_shift	= _mshift,				\
-		.lock_shift	= _lshift,				\
-		.pll_flags	= _pflags,				\
-		.rate_table	= _rtable,				\
-		.boost_enabled  = true,					\
-	}
-
 struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,
 		enum rockchip_pll_type pll_type,
 		const char *name, const char *const *parent_names,
 		u8 num_parents, int con_offset, int grf_lock_offset,
 		int lock_shift, int mode_offset, int mode_shift,
 		struct rockchip_pll_rate_table *rate_table,
-		unsigned long flags, u8 clk_pll_flags,
-		bool boost_enabled);
+		unsigned long flags, u8 clk_pll_flags);
+
+void rockchip_boost_init(struct clk_hw *hw);
 
 void rockchip_boost_enable_recovery_sw_low(struct clk_hw *hw);
 

From 17fbd1571dc19adca0964cacf6c2af2367c8ec4d Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 12 Jul 2018 16:49:46 +0800
Subject: [PATCH 1215/1852] clk: rockchip: Add divider for backup pll when
 boost

Cpu clock rate should be less than or equal to low rate when
change pll rate in boost module.

Change-Id: I53c4e66f06bba1e6a85920df0aaceb80176ab016
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-cpu.c |  1 +
 drivers/clk/rockchip/clk-pll.c | 37 +++++++++++++++++++++++++++++++---
 drivers/clk/rockchip/clk.h     |  6 ++++++
 3 files changed, 41 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c
index 0e986bb4f28e1..8166cfd45e099 100644
--- a/drivers/clk/rockchip/clk-cpu.c
+++ b/drivers/clk/rockchip/clk-cpu.c
@@ -166,6 +166,7 @@ static int rockchip_cpuclk_pre_rate_change(struct rockchip_cpuclk *cpuclk,
 				     reg_data->div_core_shift),
 		       cpuclk->reg_base + reg_data->core_reg);
 	}
+	rockchip_boost_add_core_div(cpuclk->pll_hw, alt_prate);
 
 	/* select alternate parent */
 	writel(HIWORD_UPDATE(reg_data->mux_core_alt,
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index 2426582ad23a8..0a9f31f2dd279 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -57,6 +57,8 @@ struct rockchip_clk_pll {
 	struct rockchip_clk_provider *ctx;
 
 	bool			boost_enabled;
+	u32			boost_backup_pll_usage;
+	unsigned long		boost_backup_pll_rate;
 	unsigned long		boost_low_rate;
 	unsigned long		boost_high_rate;
 	struct regmap		*boost;
@@ -1581,10 +1583,12 @@ void rockchip_boost_init(struct clk_hw *hw)
 					   BOOST_BACKUP_PLL_SHIFT));
 	}
 	if (!of_property_read_u32(np, "rockchip,boost-backup-pll-usage",
-				  &value)) {
-		pr_debug("boost-backup-pll-usage=0x%x\n", value);
+				  &pll->boost_backup_pll_usage)) {
+		pr_debug("boost-backup-pll-usage=0x%x\n",
+			 pll->boost_backup_pll_usage);
 		regmap_write(pll->boost, BOOST_CLK_CON,
-			     HIWORD_UPDATE(value, BOOST_BACKUP_PLL_USAGE_MASK,
+			     HIWORD_UPDATE(pll->boost_backup_pll_usage,
+					   BOOST_BACKUP_PLL_USAGE_MASK,
 					   BOOST_BACKUP_PLL_USAGE_SHIFT));
 	}
 	if (!of_property_read_u32(np, "rockchip,boost-switch-threshold",
@@ -1674,6 +1678,33 @@ void rockchip_boost_disable_recovery_sw(struct clk_hw *hw)
 				   BOOST_SW_CTRL_SHIFT));
 }
 
+void rockchip_boost_add_core_div(struct clk_hw *hw, unsigned long prate)
+{
+	struct rockchip_clk_pll *pll;
+	unsigned int div;
+
+	if (!hw)
+		return;
+	pll = to_rockchip_clk_pll(hw);
+	if (!pll->boost_enabled || pll->boost_backup_pll_rate == prate)
+		return;
+
+	/* todo */
+	if (pll->boost_backup_pll_usage == BOOST_BACKUP_PLL_USAGE_TARGET)
+		return;
+	/*
+	 * cpu clock rate should be less than or equal to
+	 * low rate when change pll rate in boost module
+	 */
+	if (pll->boost_low_rate && prate > pll->boost_low_rate) {
+		div =  DIV_ROUND_UP(prate, pll->boost_low_rate) - 1;
+		regmap_write(pll->boost, BOOST_CLK_CON,
+			     HIWORD_UPDATE(div, BOOST_CORE_DIV_MASK,
+					   BOOST_CORE_DIV_SHIFT));
+		pll->boost_backup_pll_rate = prate;
+	}
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index e6817bf0ebcb7..7b1a98cc7f9a4 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -46,10 +46,14 @@ struct clk;
 #define BOOST_FSM_STATUS		0x0028
 #define BOOST_PLL_L_CON(x)		((x) * 0x4 + 0x2c)
 #define BOOST_PLL_CON_MASK		0xffff
+#define BOOST_CORE_DIV_MASK		0x1f
+#define BOOST_CORE_DIV_SHIFT		0
 #define BOOST_BACKUP_PLL_MASK		0x3
 #define BOOST_BACKUP_PLL_SHIFT		8
 #define BOOST_BACKUP_PLL_USAGE_MASK	0x1
 #define BOOST_BACKUP_PLL_USAGE_SHIFT	12
+#define BOOST_BACKUP_PLL_USAGE_BORROW	0
+#define BOOST_BACKUP_PLL_USAGE_TARGET	1
 #define BOOST_ENABLE_MASK		0x1
 #define BOOST_ENABLE_SHIFT		0
 #define BOOST_RECOVERY_MASK		0x1
@@ -330,6 +334,8 @@ void rockchip_boost_enable_recovery_sw_low(struct clk_hw *hw);
 
 void rockchip_boost_disable_recovery_sw(struct clk_hw *hw);
 
+void rockchip_boost_add_core_div(struct clk_hw *hw, unsigned long prate);
+
 struct rockchip_cpuclk_clksel {
 	int reg;
 	u32 val;

From c2edaed9eb5be0b89a095fe932d670e87e353a28 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 15 Jun 2018 19:45:19 +0800
Subject: [PATCH 1216/1852] arm64: dts: rockchip: px30: Add boost config

Change-Id: I2f82059b0b67eaa17aa94fbfc1b318d480228138
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index c67d27b947288..4f3e5bf83a3c2 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1013,6 +1013,16 @@
 	cpu_boost: cpu-boost@ff2b8000 {
 		compatible = "syscon";
 		reg = <0x0 0xff2b8000 0x0 0x1000>;
+		rockchip,boost-low-con0 = <0x1032>;
+		rockchip,boost-low-con1 = <0x1441>;
+		rockchip,boost-high-con0 = <0x1036>;
+		rockchip,boost-high-con1 = <0x1441>;
+		rockchip,boost-backup-pll = <1>;
+		rockchip,boost-backup-pll-usage = <0>;
+		rockchip,boost-switch-threshold = <0x249f00>;
+		rockchip,boost-statis-threshold = <0x100>;
+		rockchip,boost-statis-enable = <0>;
+		rockchip,boost-enable = <0>;
 	};
 
 	pmucru: pmu-clock-controller@ff2bc000 {

From f26f67b027063425c71004b4c619a42b939e7064 Mon Sep 17 00:00:00 2001
From: Siyong Chen <sayon.chen@rock-chips.com>
Date: Fri, 24 Aug 2018 14:29:43 +0800
Subject: [PATCH 1217/1852] video: rockchip: vpu: add soft reset for rkvdec

rkvdec dev status may wrong after irq, this may cause
next frame dec fail. so must add soft reset after irq

Change-Id: I8649206f353f5c3004b09f1255b50258afff1974
Signed-off-by: Siyong Chen <sayon.chen@rock-chips.com>
---
 .../video/rockchip/vcodec/vcodec_hw_info.h    | 10 +++++++
 drivers/video/rockchip/vcodec/vcodec_hw_rkv.h | 12 +++++++++
 drivers/video/rockchip/vcodec/vcodec_hw_vpu.h | 12 +++++++++
 .../video/rockchip/vcodec/vcodec_hw_vpu2.h    | 10 +++++++
 .../video/rockchip/vcodec/vcodec_service.c    | 26 ++++++++++++++++---
 5 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_info.h b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
index cc7d9dbfe434f..003ac331050e4 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_info.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_info.h
@@ -174,6 +174,13 @@ struct vpu_task_info {
 	 */
 	int reg_pps;
 
+	/*
+	 * soft reset register
+	 * special register for soft reset
+	 * valid on vpu & vpu2 & rkv
+	 */
+	int reg_reset;
+
 	/*
 	 * decoder pipeline mode register
 	 *
@@ -200,6 +207,9 @@ struct vpu_task_info {
 	/* task error bit mask for irq register */
 	u32 error_mask;
 
+	/* task reset bit mask for reset register */
+	u32 reset_mask;
+
 	enum FORMAT_TYPE (*get_fmt)(u32 *regs);
 };
 
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h b/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
index 7a9acbc24d72d..30e9aea2d8666 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_rkv.h
@@ -58,6 +58,10 @@
 					| RKV_DEC_BUFFER_EMPTY_BIT \
 					| RKV_DEC_COLMV_ERROR_BIT)
 
+/* enable and soft reset register */
+#define RKV_REG_DEC_RESET		1
+#define RKV_REG_DEC_RESET_BIT		BIT(20)
+
 static const enum FORMAT_TYPE rkv_dec_fmt_tbl[] = {
 	[0]  = FMT_H265D,
 	[1]  = FMT_H264D,
@@ -80,6 +84,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.reg_len = 0,
 		.reg_dir_mv = 0,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = 0,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -87,6 +92,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.irq_mask = 0,
 		.ready_mask = 0,
 		.error_mask = 0,
+		.reset_mask = 0,
 		.get_fmt = NULL,
 	},
 	{
@@ -97,6 +103,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.reg_len = 4,
 		.reg_dir_mv = 52,
 		.reg_pps = 42,
+		.reg_reset = RKV_REG_DEC_RESET,
 		.reg_pipe = 0,
 		.enable_mask = 0,
 		.gating_mask = RKV_REG_DEC_GATING_BIT,
@@ -104,6 +111,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.pipe_mask = 0,
 		.ready_mask = HEVC_READY_BIT,
 		.error_mask = HEVC_DEC_ERR_MASK,
+		.reset_mask = RKV_REG_DEC_RESET_BIT,
 		.get_fmt = rkv_dec_get_fmt,
 	},
 	{
@@ -113,6 +121,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.reg_len = 0,
 		.reg_dir_mv = 0,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = 0,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -120,6 +129,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.irq_mask = 0,
 		.ready_mask = 0,
 		.error_mask = 0,
+		.reset_mask = 0,
 		.get_fmt = NULL,
 	},
 	{
@@ -129,6 +139,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.reg_len = 0,
 		.reg_dir_mv = 0,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = 0,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -136,6 +147,7 @@ static struct vpu_task_info task_rkv[TASK_TYPE_BUTT] = {
 		.irq_mask = 0,
 		.ready_mask = 0,
 		.error_mask = 0,
+		.reset_mask = 0,
 		.get_fmt = NULL,
 	},};
 
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h b/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
index a00c97320911f..3b5eeb35c9191 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_vpu.h
@@ -61,6 +61,10 @@
 					| VPU_DEC_STREAM_ERROR_BIT \
 					| VPU_DEC_TIMEOUT_BIT)
 
+/* enable and soft reset register*/
+#define VPU_REG_DEC_RESET		101
+#define VPU_REG_DEC_RESET_BIT		BIT(0)
+
 #define VPU_PP_INTERRUPT_REGISTER	60
 #define VPU_PP_PIPELINE_MODE_BIT	BIT(1)
 #define VPU_PP_INTERRUPT_BIT		BIT(8)
@@ -132,6 +136,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.reg_len = -1,
 		.reg_dir_mv = -1,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = -1,
 		.enable_mask = 0x6,
 		.gating_mask = 0,
@@ -139,6 +144,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU_ENC_INTERRUPT_BIT,
 		.ready_mask = VPU_ENC_READY_BIT,
 		.error_mask = VPU_ENC_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu_enc_get_fmt,
 	},
 	{
@@ -149,6 +155,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.reg_len = 12,
 		.reg_dir_mv = 41,
 		.reg_pps = -1,
+		.reg_reset = VPU_REG_DEC_RESET,
 		.reg_pipe = VPU_PP_INTERRUPT_REGISTER,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -156,6 +163,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU_DEC_INTERRUPT_BIT,
 		.ready_mask = VPU_DEC_READY_BIT,
 		.error_mask = VPU_DEC_ERR_MASK,
+		.reset_mask = VPU_REG_DEC_RESET_BIT,
 		.get_fmt = vpu_dec_get_fmt,
 	},
 	{
@@ -165,6 +173,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.reg_len = -1,
 		.reg_dir_mv = -1,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = VPU_PP_INTERRUPT_REGISTER,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -172,6 +181,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU_PP_INTERRUPT_BIT,
 		.ready_mask = VPU_PP_READY_BIT,
 		.error_mask = VPU_PP_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu_pp_get_fmt,
 	},
 	{
@@ -182,6 +192,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.reg_len = 12,
 		.reg_dir_mv = 41,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = VPU_PP_INTERRUPT_REGISTER,
 		.enable_mask = 0,
 		.gating_mask = 0,
@@ -189,6 +200,7 @@ static struct vpu_task_info task_vpu[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU_DEC_INTERRUPT_BIT,
 		.ready_mask = VPU_DEC_READY_BIT,
 		.error_mask = VPU_DEC_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu_dec_get_fmt,
 	},
 };
diff --git a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
index a37cbc481704f..5bbde3768bce3 100644
--- a/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
+++ b/drivers/video/rockchip/vcodec/vcodec_hw_vpu2.h
@@ -58,6 +58,10 @@
 					| VPU2_DEC_STREAM_ERROR_BIT \
 					| VPU2_DEC_TIMEOUT_BIT)
 
+/*enable and soft reset register*/
+#define VPU2_REG_DEC_RESET		58
+#define VPU2_REG_DEC_RESET_BIT		BIT(0)
+
 #define VPU2_PP_INTERRUPT_REGISTER	40
 #define VPU2_PP_INTERRUPT_BIT		BIT(0)
 #define VPU2_PP_READY_BIT		BIT(2)
@@ -131,6 +135,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.reg_len = -1,
 		.reg_dir_mv = -1,
 		.reg_pps = -1,
+		.reg_reset = -1,
 		.reg_pipe = -1,
 		.enable_mask = 0x30,
 		.gating_mask = VPU2_REG_ENC_GATE_BIT,
@@ -138,6 +143,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU2_ENC_INTERRUPT_BIT,
 		.ready_mask = VPU2_ENC_READY_BIT,
 		.error_mask = VPU2_ENC_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu2_enc_get_fmt,
 	},
 	{
@@ -148,6 +154,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.reg_len = 64,
 		.reg_dir_mv = 62,
 		.reg_pps = -1,
+		.reg_reset = VPU2_REG_DEC_RESET,
 		.reg_pipe = VPU2_PP_PIPELINE_REGISTER,
 		.enable_mask = 0,
 		.gating_mask = VPU2_REG_DEC_GATE_BIT,
@@ -155,6 +162,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU2_DEC_INTERRUPT_BIT,
 		.ready_mask = VPU2_DEC_READY_BIT,
 		.error_mask = VPU2_DEC_ERR_MASK,
+		.reset_mask = VPU2_REG_DEC_RESET_BIT,
 		.get_fmt = vpu2_dec_get_fmt,
 	},
 	{
@@ -171,6 +179,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU2_PP_INTERRUPT_BIT,
 		.ready_mask = VPU2_PP_READY_BIT,
 		.error_mask = VPU2_PP_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu2_pp_get_fmt,
 	},
 	{
@@ -188,6 +197,7 @@ static struct vpu_task_info task_vpu2[TASK_TYPE_BUTT] = {
 		.irq_mask = VPU2_DEC_INTERRUPT_BIT,
 		.ready_mask = VPU2_DEC_READY_BIT,
 		.error_mask = VPU2_DEC_ERR_MASK,
+		.reset_mask = 0,
 		.get_fmt = vpu2_dec_get_fmt,
 	},
 };
diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index d151d6b978b50..c7c3d38f057e0 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -461,14 +461,12 @@ struct compat_vpu_request {
 };
 #endif
 
-#define VDPU_SOFT_RESET_REG	101
 #define VDPU_CLEAN_CACHE_REG	516
 #define VEPU_CLEAN_CACHE_REG	772
 #define HEVC_CLEAN_CACHE_REG	260
 
 #define VPU_REG_ENABLE(base, reg)	writel_relaxed(1, base + reg)
 
-#define VDPU_SOFT_RESET(base)	VPU_REG_ENABLE(base, VDPU_SOFT_RESET_REG)
 #define VDPU_CLEAN_CACHE(base)	VPU_REG_ENABLE(base, VDPU_CLEAN_CACHE_REG)
 #define VEPU_CLEAN_CACHE(base)	VPU_REG_ENABLE(base, VEPU_CLEAN_CACHE_REG)
 #define HEVC_CLEAN_CACHE(base)	VPU_REG_ENABLE(base, HEVC_CLEAN_CACHE_REG)
@@ -755,6 +753,27 @@ static void vpu_reset(struct vpu_subdev_data *data)
 	dev_info(pservice->dev, "reset done\n");
 }
 
+static void vpu_soft_reset(struct vpu_subdev_data *data)
+{
+	struct vpu_device *dev = &data->dec_dev;
+	struct vpu_service_info *pservice = data->pservice;
+	struct vpu_task_info *task = &data->task_info[TASK_DEC];
+
+	if (task->reg_reset < 0)
+		return;
+
+	writel(task->reset_mask, dev->regs + task->reg_reset);
+	if (data->mmu_dev && test_bit(MMU_ACTIVATED, &data->state)) {
+		clear_bit(MMU_ACTIVATED, &data->state);
+		clear_bit(MMU_PAGEFAULT, &data->state);
+		if (atomic_read(&pservice->enabled))
+			/* Need to reset iommu */
+			vcodec_iommu_detach(data->iommu_info);
+		else
+			WARN_ON(!atomic_read(&pservice->enabled));
+	}
+}
+
 static void reg_deinit(struct vpu_subdev_data *data, struct vpu_reg *reg);
 static void vpu_service_session_clear(struct vpu_subdev_data *data,
 				      struct vpu_session *session)
@@ -3798,8 +3817,7 @@ static irqreturn_t vdpu_isr(int irq, void *dev_id)
 			}
 			reg_from_run_to_done(data, pservice->reg_codec);
 			/* avoid vpu timeout and can't recover problem */
-			if (data->mode == VCODEC_RUNNING_MODE_VPU)
-				VDPU_SOFT_RESET(data->regs);
+			vpu_soft_reset(data);
 		}
 	}
 

From 1760974b4264b59c3762f528377a2378833bd7fb Mon Sep 17 00:00:00 2001
From: Jeffy Chen <jeffy.chen@rock-chips.com>
Date: Wed, 29 Aug 2018 09:41:33 +0800
Subject: [PATCH 1218/1852] rtc: rtc-rk-timer: Fix time64 to tick convert

There's an u64 to int convert which may cause overflow.

Change-Id: I7feb46e501828666353506c37a1f35db39ff45f7
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---
 drivers/rtc/rtc-rk-timer.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/rtc/rtc-rk-timer.c b/drivers/rtc/rtc-rk-timer.c
index 4b516e971f115..aa88fd6de2a14 100644
--- a/drivers/rtc/rtc-rk-timer.c
+++ b/drivers/rtc/rtc-rk-timer.c
@@ -76,11 +76,6 @@ static inline u64 tick_to_sec(struct rk_timer_rtc *rk_timer_rtc, u64 tick)
 	return tick;
 }
 
-static inline u64 sec_to_tick(struct rk_timer_rtc *rk_timer_rtc, int sec)
-{
-	return sec * rk_timer_rtc->freq;
-}
-
 static inline u64 ms_to_tick(struct rk_timer_rtc *rk_timer_rtc, int ms)
 {
 	return ms * rk_timer_rtc->freq / 1000;
@@ -93,7 +88,7 @@ static inline u64 tick_to_time64(struct rk_timer_rtc *rk_timer_rtc, u64 tick)
 
 static inline u64 time64_to_tick(struct rk_timer_rtc *rk_timer_rtc, u64 time)
 {
-	return sec_to_tick(rk_timer_rtc, time - rk_timer_rtc->timebase);
+	return (time - rk_timer_rtc->timebase) * rk_timer_rtc->freq;
 }
 
 static inline int rk_timer_rtc_write64(struct rk_timer_rtc *rk_timer_rtc,

From d544b25eeb75c9a417a8c14421b7971dff71ca9b Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Mon, 27 Aug 2018 15:12:09 +0800
Subject: [PATCH 1219/1852] Revert "ASoC: rockchip: vad: enable vad when system
 suspend"

This reverts commit 6e1f2fba648648a6edc43c5b3500ef83beec858e.

Change-Id: I08fb911dd2b4abbc188af350dd8ad7e9ebcee795
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 47 +++++++++++++++----------------
 1 file changed, 23 insertions(+), 24 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 11852125957ed..a1e34a195296a 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -66,8 +66,6 @@ struct rockchip_vad {
 	struct dentry *debugfs_dir;
 	void *buf;
 	bool acodec_cfg;
-	struct snd_soc_dai *cpu_dai;
-	struct snd_pcm_substream *substream;
 };
 
 struct audio_src_addr_map {
@@ -537,8 +535,6 @@ static void rockchip_vad_params_fixup(struct snd_pcm_substream *substream,
 	int i;
 
 	cpu_dai = rtd->cpu_dai;
-	vad->cpu_dai = cpu_dai;
-	vad->substream = substream;
 	np = cpu_dai->dev->of_node;
 	if (of_device_is_compatible(np, "rockchip,multi-dais")) {
 		audio_src_dai = rockchip_vad_find_dai(vad->audio_node);
@@ -631,17 +627,18 @@ static int rockchip_vad_hw_params(struct snd_pcm_substream *substream,
 	return 0;
 }
 
-static int rockchip_vad_enable_cpudai(struct rockchip_vad *vad)
+static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
 {
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	struct snd_soc_dai *cpu_dai;
-	struct snd_pcm_substream *substream;
 	int ret = 0;
 
-	cpu_dai = vad->cpu_dai;
-	substream = vad->substream;
+	if (PCM_RUNTIME_CHECK(substream))
+		return -EFAULT;
+	if (!rtd)
+		return -EFAULT;
 
-	if (!cpu_dai || !substream)
-		return 0;
+	cpu_dai = rtd->cpu_dai;
 
 	pm_runtime_get_sync(cpu_dai->dev);
 
@@ -664,6 +661,21 @@ static int rockchip_vad_pcm_startup(struct snd_pcm_substream *substream,
 	return 0;
 }
 
+static void rockchip_vad_pcm_shutdown(struct snd_pcm_substream *substream,
+				      struct snd_soc_dai *dai)
+{
+	struct snd_soc_codec *codec = dai->codec;
+	struct rockchip_vad *vad = snd_soc_codec_get_drvdata(codec);
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		return;
+
+	rockchip_vad_enable_cpudai(substream);
+	rockchip_vad_setup(vad);
+
+	vad_substream = NULL;
+}
+
 static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
 				struct snd_soc_dai *dai)
 {
@@ -691,6 +703,7 @@ static int rockchip_vad_trigger(struct snd_pcm_substream *substream, int cmd,
 
 static struct snd_soc_dai_ops rockchip_vad_dai_ops = {
 	.hw_params = rockchip_vad_hw_params,
+	.shutdown = rockchip_vad_pcm_shutdown,
 	.startup = rockchip_vad_pcm_startup,
 	.trigger = rockchip_vad_trigger,
 };
@@ -791,19 +804,6 @@ static void rockchip_vad_init(struct rockchip_vad *vad)
 	regmap_update_bits(vad->regmap, VAD_CTRL, mask, val);
 }
 
-static int rockchip_vad_suspend(struct device *dev)
-{
-	struct rockchip_vad *vad = dev_get_drvdata(dev);
-
-	rockchip_vad_enable_cpudai(vad);
-	rockchip_vad_setup(vad);
-	return 0;
-}
-
-static const struct dev_pm_ops rockchip_vad_pm_ops = {
-	SET_SYSTEM_SLEEP_PM_OPS(rockchip_vad_suspend, NULL)
-};
-
 static int rockchip_vad_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node;
@@ -913,7 +913,6 @@ static struct platform_driver rockchip_vad_driver = {
 	.driver = {
 		.name = DRV_NAME,
 		.of_match_table = of_match_ptr(rockchip_vad_match),
-		.pm = &rockchip_vad_pm_ops,
 	},
 };
 module_platform_driver(rockchip_vad_driver);

From d972639ec3b33eb18088e56ba404bb00ed70e19d Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 28 Aug 2018 10:33:44 +0800
Subject: [PATCH 1220/1852] ASoC: rockchip: vad: add vad switch

This patch add the vad switch control for on/off vad function.

/ # amixer contents
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off

/ # amixer cset numid=47 1
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
/ #
/ # amixer cset numid=47 0
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off

Change-Id: Id50c021cc581a8371c680b9d180e56ac6a12cf4e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 115 +++++++++++++++++++++++++++---
 1 file changed, 104 insertions(+), 11 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index a1e34a195296a..1c95688b923b3 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -57,6 +57,8 @@ struct rockchip_vad {
 	struct vad_buf vbuf;
 	struct vad_params params;
 	struct vad_uparams uparams;
+	struct snd_soc_dai *cpu_dai;
+	struct snd_pcm_substream *substream;
 	int mode;
 	u32 audio_src;
 	u32 audio_src_addr;
@@ -66,6 +68,7 @@ struct rockchip_vad {
 	struct dentry *debugfs_dir;
 	void *buf;
 	bool acodec_cfg;
+	bool vswitch;
 };
 
 struct audio_src_addr_map {
@@ -315,7 +318,10 @@ bool snd_pcm_vad_attached(struct snd_pcm_substream *substream)
 	if (vad_substream == substream)
 		vad = substream_get_drvdata(substream);
 
-	return vad ? true : false;
+	if (vad && vad->vswitch)
+		return true;
+	else
+		return false;
 }
 EXPORT_SYMBOL(snd_pcm_vad_attached);
 
@@ -535,6 +541,8 @@ static void rockchip_vad_params_fixup(struct snd_pcm_substream *substream,
 	int i;
 
 	cpu_dai = rtd->cpu_dai;
+	vad->cpu_dai = cpu_dai;
+	vad->substream = substream;
 	np = cpu_dai->dev->of_node;
 	if (of_device_is_compatible(np, "rockchip,multi-dais")) {
 		audio_src_dai = rockchip_vad_find_dai(vad->audio_node);
@@ -627,18 +635,17 @@ static int rockchip_vad_hw_params(struct snd_pcm_substream *substream,
 	return 0;
 }
 
-static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
+static int rockchip_vad_enable_cpudai(struct rockchip_vad *vad)
 {
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 	struct snd_soc_dai *cpu_dai;
+	struct snd_pcm_substream *substream;
 	int ret = 0;
 
-	if (PCM_RUNTIME_CHECK(substream))
-		return -EFAULT;
-	if (!rtd)
-		return -EFAULT;
+	cpu_dai = vad->cpu_dai;
+	substream = vad->substream;
 
-	cpu_dai = rtd->cpu_dai;
+	if (!cpu_dai || !substream)
+		return 0;
 
 	pm_runtime_get_sync(cpu_dai->dev);
 
@@ -650,6 +657,29 @@ static int rockchip_vad_enable_cpudai(struct snd_pcm_substream *substream)
 	return ret;
 }
 
+static int rockchip_vad_disable_cpudai(struct rockchip_vad *vad)
+{
+	struct snd_soc_dai *cpu_dai;
+	struct snd_pcm_substream *substream;
+	int ret = 0;
+
+	cpu_dai = vad->cpu_dai;
+	substream = vad->substream;
+
+	if (!cpu_dai || !substream)
+		return 0;
+
+	pm_runtime_get_sync(cpu_dai->dev);
+
+	if (cpu_dai->driver->ops && cpu_dai->driver->ops->trigger)
+		ret = cpu_dai->driver->ops->trigger(substream,
+						    SNDRV_PCM_TRIGGER_STOP,
+						    cpu_dai);
+
+	pm_runtime_put(cpu_dai->dev);
+	return ret;
+}
+
 static int rockchip_vad_pcm_startup(struct snd_pcm_substream *substream,
 				    struct snd_soc_dai *dai)
 {
@@ -670,8 +700,10 @@ static void rockchip_vad_pcm_shutdown(struct snd_pcm_substream *substream,
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 		return;
 
-	rockchip_vad_enable_cpudai(substream);
-	rockchip_vad_setup(vad);
+	if (vad->vswitch) {
+		rockchip_vad_enable_cpudai(vad);
+		rockchip_vad_setup(vad);
+	}
 
 	vad_substream = NULL;
 }
@@ -727,7 +759,68 @@ static struct snd_soc_dai_driver vad_dai = {
 	.ops = &rockchip_vad_dai_ops,
 };
 
-static struct snd_soc_codec_driver soc_vad_codec;
+static int rockchip_vad_switch_info(struct snd_kcontrol *kcontrol,
+				    struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+	uinfo->count = 1;
+	uinfo->value.integer.min = 0;
+	uinfo->value.integer.max = 1;
+
+	return 0;
+}
+
+static int rockchip_vad_switch_get(struct snd_kcontrol *kcontrol,
+				   struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+	struct rockchip_vad *vad = snd_soc_component_get_drvdata(component);
+
+	ucontrol->value.integer.value[0] = vad->vswitch;
+
+	return 0;
+}
+
+static int rockchip_vad_switch_put(struct snd_kcontrol *kcontrol,
+				   struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+	struct rockchip_vad *vad = snd_soc_component_get_drvdata(component);
+	int val;
+
+	val = ucontrol->value.integer.value[0];
+	if (val && !vad->vswitch) {
+		vad->vswitch = true;
+	} else if (!val && vad->vswitch) {
+		vad->vswitch = false;
+
+		regmap_read(vad->regmap, VAD_CTRL, &val);
+		if ((val & VAD_EN_MASK) == VAD_DISABLE)
+			return 0;
+		rockchip_vad_stop(vad);
+		rockchip_vad_disable_cpudai(vad);
+		/* this case we don't need vad data */
+		vad->vbuf.size = 0;
+	}
+
+	return 0;
+}
+
+#define SOC_ROCKCHIP_VAD_SWITCH_DECL(xname) \
+{	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+	.info = rockchip_vad_switch_info, .get = rockchip_vad_switch_get, \
+	.put = rockchip_vad_switch_put, }
+
+static const struct snd_kcontrol_new rockchip_vad_dapm_controls[] = {
+	SOC_ROCKCHIP_VAD_SWITCH_DECL("vad switch"),
+};
+
+static struct snd_soc_codec_driver soc_vad_codec = {
+	.component_driver = {
+		.controls = rockchip_vad_dapm_controls,
+		.num_controls = ARRAY_SIZE(rockchip_vad_dapm_controls),
+	},
+};
 
 #if defined(CONFIG_DEBUG_FS)
 #include <linux/fs.h>

From 879f83e332d5ca7ccb233bbec534822799dd03d9 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Tue, 28 Aug 2018 17:58:19 +0800
Subject: [PATCH 1221/1852] ASoC: rockchip: multi_dais: fixup wrong format

This patch fixup wrong format if property missing.

Change-Id: I77a86c97b1526fa11a819ad0f2daca803e22ee7f
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_multi_dais.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/rockchip/rockchip_multi_dais.c b/sound/soc/rockchip/rockchip_multi_dais.c
index 3d1eaa8ae4f43..46028176927ee 100644
--- a/sound/soc/rockchip/rockchip_multi_dais.c
+++ b/sound/soc/rockchip/rockchip_multi_dais.c
@@ -284,7 +284,7 @@ static void mdais_parse_daifmt(struct device_node *node, struct rk_dai *dais,
 			break;
 		}
 
-		dais[i].fmt = format;
+		dais[i].fmt = format & format_mask;
 		dais[i].fmt_msk = format_mask;
 	}
 }

From 9feee6f06e3fa85fd9458c4cf3c470036de0b8b9 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 28 Aug 2018 21:56:06 +0800
Subject: [PATCH 1222/1852] ASoC: rk3308_codec: Fix the incorrect ADC state
 during shutdown stream

Dues to the broken ADC state, it may miss reset ADC digital
register and bring long time (~80ms) unstable and invalid
data at next recording.

Change-Id: Ibf516c054cab99536a4fa3b5fd82f52810352420
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index ee82781d5ba40..79b344882d943 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -1973,10 +1973,12 @@ static bool has_en_always_grps(struct rk3308_codec_priv *rk3308)
 {
 	int idx;
 
-	for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
-		if (rk3308->en_always_grps[idx] >= 0 &&
-		    rk3308->en_always_grps[idx] <= ADC_LR_GROUP_MAX - 1)
-			return true;
+	if (rk3308->en_always_grps_num) {
+		for (idx = 0; idx < ADC_LR_GROUP_MAX; idx++) {
+			if (rk3308->en_always_grps[idx] >= 0 &&
+			    rk3308->en_always_grps[idx] <= ADC_LR_GROUP_MAX - 1)
+				return true;
+		}
 	}
 
 	return false;

From f3350ff50816fd28e794a71c5f2d7c10960d631c Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 29 Aug 2018 18:36:46 +0800
Subject: [PATCH 1223/1852] ASoC: rk3308_codec: Fix the incorrect bits for BIST
 SINE and CUBE

Change-Id: I96655cfc6cb58ece7b04051b33520b7c8417a3d6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.h b/sound/soc/codecs/rk3308_codec.h
index 914c073a2add2..6a60a2da43d66 100644
--- a/sound/soc/codecs/rk3308_codec.h
+++ b/sound/soc/codecs/rk3308_codec.h
@@ -271,14 +271,14 @@
 #define RK3308_ADC_L_CH_BIST_SFT		2
 #define RK3308_ADC_L_CH_BIST_MSK		(0x3 << RK3308_ADC_L_CH_BIST_SFT)
 #define RK3308_ADC_L_CH_NORMAL_RIGHT		(0x3 << RK3308_ADC_L_CH_BIST_SFT) /* normal mode */
-#define RK3308_ADC_L_CH_BIST_SINE		(0x2 << RK3308_ADC_L_CH_BIST_SFT)
-#define RK3308_ADC_L_CH_BIST_CUBE		(0x1 << RK3308_ADC_L_CH_BIST_SFT)
+#define RK3308_ADC_L_CH_BIST_CUBE		(0x2 << RK3308_ADC_L_CH_BIST_SFT)
+#define RK3308_ADC_L_CH_BIST_SINE		(0x1 << RK3308_ADC_L_CH_BIST_SFT)
 #define RK3308_ADC_L_CH_NORMAL_LEFT		(0x0 << RK3308_ADC_L_CH_BIST_SFT) /* normal mode */
 #define RK3308_ADC_R_CH_BIST_SFT		0
 #define RK3308_ADC_R_CH_BIST_MSK		(0x3 << RK3308_ADC_R_CH_BIST_SFT)
 #define RK3308_ADC_R_CH_NORMAL_LEFT		(0x3 << RK3308_ADC_R_CH_BIST_SFT) /* normal mode */
-#define RK3308_ADC_R_CH_BIST_SINE		(0x2 << RK3308_ADC_R_CH_BIST_SFT)
-#define RK3308_ADC_R_CH_BIST_CUBE		(0x1 << RK3308_ADC_R_CH_BIST_SFT)
+#define RK3308_ADC_R_CH_BIST_CUBE		(0x2 << RK3308_ADC_R_CH_BIST_SFT)
+#define RK3308_ADC_R_CH_BIST_SINE		(0x1 << RK3308_ADC_R_CH_BIST_SFT)
 #define RK3308_ADC_R_CH_NORMAL_RIGHT		(0x0 << RK3308_ADC_R_CH_BIST_SFT) /* normal mode */
 
 /* RK3308_ADC_DIG_CON04 - REG: 0x0010 */

From 149a72aa9be38fd15f01cd7aab346765820bcfb7 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 29 Aug 2018 08:58:38 +0800
Subject: [PATCH 1224/1852] ASoC: rk3308_codec: limit the loopback grp isn't
 enabled always

Change-Id: I2475b9c2fa3880ee14cf6d7a42d07433cf4fbe32
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 79b344882d943..86bd9caac018d 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -3158,6 +3158,17 @@ static int rk3308_codec_setup_en_always_adcs(struct rk3308_codec_priv *rk3308,
 		return ret;
 	}
 
+	/* The loopback grp should not be enabled always. */
+	for (num = 0; num < rk3308->en_always_grps_num; num++) {
+		if (rk3308->en_always_grps[num] == rk3308->loopback_grp) {
+			dev_err(rk3308->plat_dev,
+				"loopback_grp: %d should not be enabled always!\n",
+				rk3308->loopback_grp);
+			ret = -EINVAL;
+			return ret;
+		}
+	}
+
 	return 0;
 }
 

From 73215ff7a7b0e19a975391507dc3a3aef7c70cf6 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 29 Aug 2018 09:05:26 +0800
Subject: [PATCH 1225/1852] arm64: dts: rockchip: rk3308-evb: remove the
 enabled always loopback

Change-Id: I5dcc509e9c06a402adaefe1d9c4288d04c20b5a0
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts | 2 +-
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
index 3b95d43c39002..5040d9230165e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
@@ -25,7 +25,7 @@
 
 &acodec {
 	rockchip,no-deep-low-power;
-	rockchip,en-always-grps = <0 1 2 3>;
+	rockchip,en-always-grps = <0 1 2>;
 };
 
 &acodec_sound {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
index 05bda2f389195..0e732ce3001a1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
@@ -24,7 +24,7 @@
 
 &acodec {
 	rockchip,no-deep-low-power;
-	rockchip,en-always-grps = <0 1 2 3>;
+	rockchip,en-always-grps = <1 2 3>;
 };
 
 &acodec_sound {

From 0f4072a6be3dcee9c1b03fcd85d5cbfaf6e05c2d Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 29 Aug 2018 11:29:57 +0800
Subject: [PATCH 1226/1852] ASoC: rk3308_codec: Fix the dummy loopback

If we playback before capture, the loopback will be
switch to BIST SINE mode by other ADC grps. Let's
fix it.

Change-Id: Ib18a32d87dfed4343edc439bd5c705295eca06f3
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 86bd9caac018d..15b85d1d5dc11 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -2639,6 +2639,7 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308)
 	} else {
 		for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
 			if (has_loopback(rk3308->loopback_grp) &&
+			    idx == rk3308->loopback_grp &&
 			    grp == ADC_GRP_SKIP_MAGIC) {
 				/*
 				 * Switch to dummy BIST mode (BIST keep reset

From 2009171f035b6844c0e9ed212bd59f1b175bd1fb Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Wed, 29 Aug 2018 20:51:46 +0800
Subject: [PATCH 1227/1852] ASoC: rk3308_codec: Fix the broken loopback
 sometimes

We need to insert some delay after enabling ADC current
and waiting ADCs are stable for BIST mode mainly.

Change-Id: Ib3cdc6aa36f8674ba8d8defadb47baac72f4745e
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 15b85d1d5dc11..ae530d3412426 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -2366,6 +2366,14 @@ static int rk3308_codec_adc_ana_enable(struct rk3308_codec_priv *rk3308,
 				   RK3308_ADC_CURRENT_EN);
 	}
 
+	/*
+	 * This is mainly used for BIST mode that wait ADCs are stable.
+	 *
+	 * By tested results, the type delay is >40us, but we need to leave
+	 * enough delay margin.
+	 */
+	usleep_range(400, 500);
+
 	/* vendor step 4*/
 	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
 		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)

From f3640eb44cc9d23912d92def179128a90305b9f4 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Wed, 29 Aug 2018 14:42:40 +0800
Subject: [PATCH 1228/1852] phy: rockchip-inno-usb2: register 480MHz clk at the
 end of probe

We find an usb phy 480MHz clk prepare fail issue on PX30/RK3326
platforms with RK819 PMIC. On PX30/RK3326 platforms, we set the
usb480m clk to critical because GPU 480M is from usb480m and the
source clocks should be always on. And the usb phy 480MHz clk is
parent of usb480m clk, so the clk framework will prepare the usb
phy 480MHz clk when register it.

This logic works well if the usb phy probe only once. But if the
usb phy needs to probe twice or more because of some reasons (e.g.
fail to get vbus regulator from RK819), the usb phy 480MHz clk will
be unregistered and registered again, however, the clk framework
doesn't prepare the usb phy 480MHz clk except the first time register
operation. So we move the 480MHz clk register to the end of probe,
and make sure only register it once.

Change-Id: If69378b49035746a7c0107c6a363c4d91dfc15e5
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index baf41c0994d5f..0a5ce620e2fac 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1756,12 +1756,6 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		rphy->clk = NULL;
 	}
 
-	ret = rockchip_usb2phy_clk480m_register(rphy);
-	if (ret) {
-		dev_err(dev, "failed to register 480m output clock\n");
-		goto disable_clks;
-	}
-
 	if (rphy->phy_cfg->phy_tuning) {
 		ret = rphy->phy_cfg->phy_tuning(rphy);
 		if (ret)
@@ -1821,6 +1815,12 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 		goto put_child;
 	}
 
+	ret = rockchip_usb2phy_clk480m_register(rphy);
+	if (ret) {
+		dev_err(dev, "failed to register 480m output clock\n");
+		goto put_child;
+	}
+
 	return 0;
 
 put_child:

From d9b395f832a816291ee1e7b0ba5e846e9d2ffe2f Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Tue, 28 Aug 2018 14:02:41 +0800
Subject: [PATCH 1229/1852] ASoC: rk3308_codec: disable high pass filter by
 default

It looks better that handle the hight pass filter (HPF)
on the user space, therefore, disable it by codec.

By the way, add HPF dapm controls if someone need to
enable HPF cut-off.

Change-Id: Id8d5f4f84a8ad9909d6aa35c484e955ab92bffed
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 119 ++++++++++++++++++++++++++++----
 1 file changed, 105 insertions(+), 14 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index ae530d3412426..7a0c96a11eae8 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -163,6 +163,9 @@ struct rk3308_codec_priv {
 
 	int pm_state;
 
+	/* For the high pass filter */
+	unsigned int hpf_cutoff[ADC_LR_GROUP_MAX];
+
 	/* Only hpout do fade-in and fade-out */
 	unsigned int hpout_l_dgain;
 	unsigned int hpout_r_dgain;
@@ -215,6 +218,43 @@ static int rk3308_codec_hpout_r_get_tlv(struct snd_kcontrol *kcontrol,
 					struct snd_ctl_elem_value *ucontrol);
 static int rk3308_codec_hpout_r_put_tlv(struct snd_kcontrol *kcontrol,
 					struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_hpf_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol);
+
+#define HPF_NUM				4
+
+#define HPF_CUTOFF_20HZ			0
+#define HPF_CUTOFF_245HZ		1
+#define HPF_CUTOFF_612HZ		2
+#define HPF_OFF				3
+
+static const char *hpf_text[HPF_NUM] = {
+	[HPF_CUTOFF_20HZ] = "20Hz",
+	[HPF_CUTOFF_245HZ] = "245Hz",
+	[HPF_CUTOFF_612HZ] = "612Hz",
+	[HPF_OFF] = "Off",
+};
+
+static const struct soc_enum rk3308_hpf_enum_array[] = {
+	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(0),
+			0,
+			ARRAY_SIZE(hpf_text),
+			hpf_text),
+	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(1),
+			1,
+			ARRAY_SIZE(hpf_text),
+			hpf_text),
+	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(2),
+			2,
+			ARRAY_SIZE(hpf_text),
+			hpf_text),
+	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(3),
+			3,
+			ARRAY_SIZE(hpf_text),
+			hpf_text),
+};
 
 static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 	/* ALC AGC Group */
@@ -476,6 +516,16 @@ static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 			     RK3308_ADC_CH2_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
 
+	/* ADC High Pass Filter */
+	SOC_ENUM_EXT("ADC Group 0 HPF Cut-off", rk3308_hpf_enum_array[0],
+		     rk3308_codec_hpf_get, rk3308_codec_hpf_put),
+	SOC_ENUM_EXT("ADC Group 1 HPF Cut-off", rk3308_hpf_enum_array[1],
+		     rk3308_codec_hpf_get, rk3308_codec_hpf_put),
+	SOC_ENUM_EXT("ADC Group 2 HPF Cut-off", rk3308_hpf_enum_array[2],
+		     rk3308_codec_hpf_get, rk3308_codec_hpf_put),
+	SOC_ENUM_EXT("ADC Group 3 HPF Cut-off", rk3308_hpf_enum_array[3],
+		     rk3308_codec_hpf_get, rk3308_codec_hpf_put),
+
 	/* DAC LINEOUT */
 	SOC_SINGLE_TLV("DAC LINEOUT Left Volume",
 		       RK3308_DAC_ANA_CON04,
@@ -521,6 +571,57 @@ static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 			     0, rk3308_codec_dac_hpmix_gain_tlv),
 };
 
+static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+
+	ucontrol->value.integer.value[0] = rk3308->hpf_cutoff[e->shift_l];
+
+	return 0;
+}
+
+static int rk3308_codec_hpf_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned int value = ucontrol->value.integer.value[0];
+	unsigned int cutoff[3] = {
+		RK3308_ADC_HPF_CUTOFF_20HZ,
+		RK3308_ADC_HPF_CUTOFF_245HZ,
+		RK3308_ADC_HPF_CUTOFF_612HZ,
+	};
+
+	switch (value) {
+	case HPF_CUTOFF_20HZ:
+	case HPF_CUTOFF_245HZ:
+	case HPF_CUTOFF_612HZ:
+		/* Enable high pass filter for ADCs */
+		regmap_update_bits(rk3308->regmap, e->reg,
+				   RK3308_ADC_HPF_PATH_MSK,
+				   RK3308_ADC_HPF_PATH_EN);
+		udelay(10);
+		regmap_update_bits(rk3308->regmap, e->reg,
+				   RK3308_ADC_HPF_CUTOFF_MSK,
+				   cutoff[value]);
+		break;
+	default:
+		/* Disable high pass filter for ADCs. */
+		regmap_update_bits(rk3308->regmap, e->reg,
+				   RK3308_ADC_HPF_PATH_MSK,
+				   RK3308_ADC_HPF_PATH_DIS);
+		break;
+	}
+
+	rk3308->hpf_cutoff[e->shift_l] = value;
+
+	return 0;
+}
+
 static int rk3308_codec_hpout_l_get_tlv(struct snd_kcontrol *kcontrol,
 					struct snd_ctl_elem_value *ucontrol)
 {
@@ -858,20 +959,6 @@ static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
 				   RK3308_ADC_DIG_WORK,
 				   RK3308_ADC_DIG_WORK);
 
-	/* Enable high pass filter and cut-off 20Hz for ADCs */
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(grp),
-				   RK3308_ADC_HPF_PATH_MSK,
-				   RK3308_ADC_HPF_PATH_EN);
-		udelay(10);
-		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(grp),
-				   RK3308_ADC_HPF_CUTOFF_MSK,
-				   RK3308_ADC_HPF_CUTOFF_20HZ);
-	}
-
 	regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON01,
 			   RK3308_DAC_I2S_LRC_POL_MSK |
 			   RK3308_DAC_I2S_MODE_MSK,
@@ -4009,6 +4096,10 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	rk3308->dac_output = DAC_LINEOUT;
 	rk3308->adc_zerocross = 1;
 	rk3308->pm_state = PM_NORMAL;
+	rk3308->hpf_cutoff[0] = HPF_OFF;
+	rk3308->hpf_cutoff[1] = HPF_OFF;
+	rk3308->hpf_cutoff[2] = HPF_OFF;
+	rk3308->hpf_cutoff[3] = HPF_OFF;
 
 	platform_set_drvdata(pdev, rk3308);
 

From c981a805afa4c8bfe288a3a4ca20521837294b34 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 29 Aug 2018 16:44:03 +0800
Subject: [PATCH 1230/1852] media: i2c: gc2145: support switch between 30fps
 and 20fps preview mode

Change-Id: Iabc8107d814b02e14c665a03df923938208e9465
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/gc2145.c | 139 ++++++++++++++++++++++++++++++++++---
 1 file changed, 131 insertions(+), 8 deletions(-)

diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c
index fedc5a5c1b098..0964bd0c586c1 100644
--- a/drivers/media/i2c/gc2145.c
+++ b/drivers/media/i2c/gc2145.c
@@ -73,6 +73,7 @@ struct sensor_register {
 struct gc2145_framesize {
 	u16 width;
 	u16 height;
+	u16 fps;
 	u16 max_exp_lines;
 	const struct sensor_register *regs;
 };
@@ -106,6 +107,7 @@ struct gc2145 {
 	struct v4l2_subdev sd;
 	struct media_pad pad;
 	struct v4l2_mbus_framefmt format;
+	unsigned int fps;
 	unsigned int xvclk_frequency;
 	struct clk *xvclk;
 	struct gpio_desc *pwdn_gpio;
@@ -887,7 +889,7 @@ static const struct sensor_register gc2145_full_regs[] = {
 };
 
 /* Preview resolution setting*/
-static const struct sensor_register gc2145_svga_regs[] = {
+static const struct sensor_register gc2145_svga_regs_30fps[] = {
 	{0xfe, 0x00},
 	{0x05, 0x02},
 	{0x06, 0x20},
@@ -956,17 +958,74 @@ static const struct sensor_register gc2145_svga_regs[] = {
 	{REG_NULL, 0x00},
 };
 
+/* Preview resolution setting*/
+static const struct sensor_register gc2145_svga_regs_20fps[] = {
+	{0xfe, 0x00},
+	{0x05, 0x02},
+	{0x06, 0x20},
+	{0x07, 0x03},
+	{0x08, 0x80},
+	{0xb6, 0x01},
+	{0xfd, 0x03},
+	{0xfa, 0x00},
+	{0x18, 0x42},
+	/*crop window*/
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x91, 0x00},
+	{0x92, 0x00},
+	{0x93, 0x00},
+	{0x94, 0x00},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	/*AWB*/
+	{0xfe, 0x00},
+	{0xec, 0x02},
+	{0xed, 0x02},
+	{0xee, 0x30},
+	{0xef, 0x48},
+	{0xfe, 0x02},
+	{0x9d, 0x08},
+	{0xfe, 0x01},
+	{0x74, 0x00},
+	/*AEC*/
+	{0xfe, 0x01},
+	{0x01, 0x04},
+	{0x02, 0x60},
+	{0x03, 0x02},
+	{0x04, 0x48},
+	{0x05, 0x18},
+	{0x06, 0x50},
+	{0x07, 0x10},
+	{0x08, 0x38},
+	{0x0a, 0x80},
+	{0x21, 0x04},
+	{0xfe, 0x00},
+	{0x20, 0x03},
+	{0xfe, 0x00},
+	{REG_NULL, 0x00},
+};
+
 static const struct gc2145_framesize gc2145_framesizes[] = {
 	{ /* SVGA */
 		.width		= 800,
 		.height		= 600,
-		.regs		= gc2145_svga_regs,
-		.max_exp_lines	= 608,
+		.fps		= 20,
+		.regs		= gc2145_svga_regs_20fps,
+	}, { /* SVGA */
+		.width		= 800,
+		.height		= 600,
+		.fps		= 30,
+		.regs		= gc2145_svga_regs_30fps,
 	}, { /* FULL */
 		.width		= 1600,
 		.height		= 1200,
+		.fps		= 20,
 		.regs		= gc2145_full_regs,
-		.max_exp_lines	= 1208,
 	}
 };
 
@@ -1157,8 +1216,9 @@ static int gc2145_get_fmt(struct v4l2_subdev *sd,
 	return 0;
 }
 
-static void __gc2145_try_frame_size(struct v4l2_mbus_framefmt *mf,
-				    const struct gc2145_framesize **size)
+static void __gc2145_try_frame_size_fps(struct v4l2_mbus_framefmt *mf,
+					const struct gc2145_framesize **size,
+					unsigned int fps)
 {
 	const struct gc2145_framesize *fsize = &gc2145_framesizes[0];
 	const struct gc2145_framesize *match = NULL;
@@ -1175,8 +1235,19 @@ static void __gc2145_try_frame_size(struct v4l2_mbus_framefmt *mf,
 		fsize++;
 	}
 
-	if (!match)
+	if (!match) {
 		match = &gc2145_framesizes[0];
+	} else {
+		fsize = &gc2145_framesizes[0];
+		for (i = 0; i < ARRAY_SIZE(gc2145_framesizes); i++) {
+			if (fsize->width == match->width &&
+			    fsize->height == match->height &&
+			    fps >= fsize->fps)
+				match = fsize;
+
+			fsize++;
+		}
+	}
 
 	mf->width  = match->width;
 	mf->height = match->height;
@@ -1198,7 +1269,7 @@ static int gc2145_set_fmt(struct v4l2_subdev *sd,
 
 	dev_dbg(&client->dev, "%s enter\n", __func__);
 
-	__gc2145_try_frame_size(mf, &size);
+	__gc2145_try_frame_size_fps(mf, &size, gc2145->fps);
 
 	while (--index >= 0)
 		if (gc2145_formats[index].code == mf->code)
@@ -1228,6 +1299,7 @@ static int gc2145_set_fmt(struct v4l2_subdev *sd,
 
 		gc2145->frame_size = size;
 		gc2145->format = fmt->format;
+
 	}
 
 	mutex_unlock(&gc2145->lock);
@@ -1329,6 +1401,52 @@ static int gc2145_g_mbus_config(struct v4l2_subdev *sd,
 	return 0;
 }
 
+static int gc2145_g_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct gc2145 *gc2145 = to_gc2145(sd);
+
+	mutex_lock(&gc2145->lock);
+	fi->interval.numerator = 10000;
+	fi->interval.denominator = gc2145->fps * 10000;
+	mutex_unlock(&gc2145->lock);
+
+	return 0;
+}
+
+static int gc2145_s_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2145 *gc2145 = to_gc2145(sd);
+	const struct gc2145_framesize *size = NULL;
+	struct v4l2_mbus_framefmt mf;
+	unsigned int fps;
+	int ret = 0;
+
+	dev_dbg(&client->dev, "Setting %d/%d frame interval\n",
+		 fi->interval.numerator, fi->interval.denominator);
+
+	mutex_lock(&gc2145->lock);
+	if (gc2145->format.width == 1600)
+		goto unlock;
+	fps = DIV_ROUND_CLOSEST(fi->interval.denominator,
+				fi->interval.numerator);
+	mf = gc2145->format;
+	__gc2145_try_frame_size_fps(&mf, &size, fps);
+	if (gc2145->frame_size != size) {
+		ret = gc2145_write_array(client, size->regs);
+		if (ret)
+			goto unlock;
+		gc2145->frame_size = size;
+		gc2145->fps = fps;
+	}
+unlock:
+	mutex_unlock(&gc2145->lock);
+
+	return ret;
+}
+
 static const struct v4l2_subdev_core_ops gc2145_subdev_core_ops = {
 	.log_status = v4l2_ctrl_subdev_log_status,
 	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
@@ -1338,6 +1456,8 @@ static const struct v4l2_subdev_core_ops gc2145_subdev_core_ops = {
 static const struct v4l2_subdev_video_ops gc2145_subdev_video_ops = {
 	.s_stream = gc2145_s_stream,
 	.g_mbus_config = gc2145_g_mbus_config,
+	.g_frame_interval = gc2145_g_frame_interval,
+	.s_frame_interval = gc2145_s_frame_interval,
 };
 
 static const struct v4l2_subdev_pad_ops gc2145_subdev_pad_ops = {
@@ -1524,6 +1644,9 @@ static int gc2145_probe(struct i2c_client *client,
 
 	gc2145_get_default_format(&gc2145->format);
 	gc2145->frame_size = &gc2145_framesizes[0];
+	gc2145->format.width = gc2145_framesizes[0].width;
+	gc2145->format.height = gc2145_framesizes[0].height;
+	gc2145->fps = 0;
 
 	ret = gc2145_detect(sd);
 	if (ret < 0)

From 24b8fcc5d585402af7280133c0f99f9c8f0e9273 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Wed, 29 Aug 2018 16:33:33 +0800
Subject: [PATCH 1231/1852] pinctrl: rockchip: Fix some style warnings

Change-Id: Ia4ff30113520030e3a1e611f4a74cec4431848ba
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 904d7f106cc4c..dc241d40f724b 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1105,63 +1105,63 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 		.pin = 12,
 		.func = 2,
 		.route_offset = 0x314,
-		.route_val =  BIT(16 + 4) | BIT(4),
+		.route_val = BIT(16 + 4) | BIT(4),
 	}, {
 		/* i2s-8ch-1-sclktxm0 */
 		.bank_num = 1,
 		.pin = 3,
 		.func = 2,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 3),
+		.route_val = BIT(16 + 3),
 	}, {
 		/* i2s-8ch-1-sclkrxm0 */
 		.bank_num = 1,
 		.pin = 4,
 		.func = 2,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 3),
+		.route_val = BIT(16 + 3),
 	}, {
 		/* i2s-8ch-1-sclktxm1 */
 		.bank_num = 1,
 		.pin = 13,
 		.func = 2,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 3) | BIT(3),
+		.route_val = BIT(16 + 3) | BIT(3),
 	}, {
 		/* i2s-8ch-1-sclkrxm1 */
 		.bank_num = 1,
 		.pin = 14,
 		.func = 2,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 3) | BIT(3),
+		.route_val = BIT(16 + 3) | BIT(3),
 	}, {
 		/* pdm-clkm0 */
 		.bank_num = 1,
 		.pin = 4,
 		.func = 3,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 12) | BIT(16 + 13),
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
 	}, {
 		/* pdm-clkm1 */
 		.bank_num = 1,
 		.pin = 14,
 		.func = 4,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
 	}, {
 		/* pdm-clkm2 */
 		.bank_num = 2,
 		.pin = 6,
 		.func = 2,
 		.route_offset = 0x308,
-		.route_val =  BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
 	}, {
 		/* pdm-clkm-m2 */
 		.bank_num = 2,
 		.pin = 4,
 		.func = 2,
 		.route_offset = 0x600,
-		.route_val =  BIT(16 + 2) | BIT(2),
+		.route_val = BIT(16 + 2) | BIT(2),
 	},
 };
 

From ac143e775b5553a97b20233577aaca3fcf81a096 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Wed, 29 Aug 2018 16:37:04 +0800
Subject: [PATCH 1232/1852] pinctrl: rockchip: Add mux range support while
 setting iomux

When the pin is set as an iomux value that is outside its range,
it should return a failure, otherwise it may be overwritten with
incorrect value.

Change-Id: I381d9f5bf6f4bfa7d0512350e6b051bebf513d3e
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index dc241d40f724b..203af70819b23 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1466,6 +1466,9 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	if (bank->recalced_mask & BIT(pin))
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
+	if (mux > mask)
+		return -EINVAL;
+
 	if (bank->route_mask & BIT(pin)) {
 		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
 					   &route_val)) {

From 5aa30de25bb6aa0202d76aa0d71c3f0ee0f1072f Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 23 Aug 2018 17:42:11 +0800
Subject: [PATCH 1233/1852] drm/rockchip: rgb: Remove duplicated code

(Fixed when rebasing)

Change-Id: I92349f76ca7359c359a1c23adc3b50bedc4d56b0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_rgb.c | 186 +++++++++++-------------
 1 file changed, 85 insertions(+), 101 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c
index a8211d2ce88c6..38fc126fdcd50 100644
--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c
@@ -21,6 +21,7 @@
 #include <drm/drm_of.h>
 
 #include <linux/component.h>
+#include <linux/of_device.h>
 #include <linux/of_graph.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
@@ -29,24 +30,38 @@
 #include "rockchip_drm_vop.h"
 
 #define HIWORD_UPDATE(v, l, h)	(((v) << (l)) | (GENMASK(h, l) << 16))
-#define PX30_GRF_PD_VO_CON1	0x0438
-#define PX30_LCDC_DCLK_INV(v)	HIWORD_UPDATE(v, 4, 4)
-#define PX30_RGB_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
-#define PX30_RGB_VOP_SEL(v)	HIWORD_UPDATE(v, 2, 2)
 
-#define connector_to_rgb(c) container_of(c, struct rockchip_rgb, connector)
-#define encoder_to_rgb(c) container_of(c, struct rockchip_rgb, encoder)
+#define PX30_GRF_PD_VO_CON1		0x0438
+#define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+#define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
+
+struct rockchip_rgb;
+
+struct rockchip_rgb_funcs {
+	void (*enable)(struct rockchip_rgb *rgb);
+	void (*disable)(struct rockchip_rgb *rgb);
+};
 
 struct rockchip_rgb {
 	struct device *dev;
-	struct drm_device *drm_dev;
 	struct drm_panel *panel;
 	struct drm_bridge *bridge;
 	struct drm_connector connector;
 	struct drm_encoder encoder;
 	struct regmap *grf;
+	const struct rockchip_rgb_funcs *funcs;
 };
 
+static inline struct rockchip_rgb *connector_to_rgb(struct drm_connector *c)
+{
+	return container_of(c, struct rockchip_rgb, connector);
+}
+
+static inline struct rockchip_rgb *encoder_to_rgb(struct drm_encoder *e)
+{
+	return container_of(e, struct rockchip_rgb, encoder);
+}
+
 static enum drm_connector_status
 rockchip_rgb_connector_detect(struct drm_connector *connector, bool force)
 {
@@ -91,25 +106,26 @@ static void rockchip_rgb_encoder_enable(struct drm_encoder *encoder)
 
 	pinctrl_pm_select_default_state(rgb->dev);
 
-	if (rgb->grf) {
-		int pipe = drm_of_encoder_active_endpoint_id(rgb->dev->of_node,
-							     encoder);
-		regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_VOP_SEL(pipe));
-		regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_SYNC_BYPASS(1));
-	}
+	if (rgb->funcs && rgb->funcs->enable)
+		rgb->funcs->enable(rgb);
 
-	drm_panel_prepare(rgb->panel);
-	drm_panel_enable(rgb->panel);
+	if (rgb->panel) {
+		drm_panel_prepare(rgb->panel);
+		drm_panel_enable(rgb->panel);
+	}
 }
 
 static void rockchip_rgb_encoder_disable(struct drm_encoder *encoder)
 {
 	struct rockchip_rgb *rgb = encoder_to_rgb(encoder);
 
-	drm_panel_disable(rgb->panel);
-	drm_panel_unprepare(rgb->panel);
+	if (rgb->panel) {
+		drm_panel_disable(rgb->panel);
+		drm_panel_unprepare(rgb->panel);
+	}
+
+	if (rgb->funcs && rgb->funcs->disable)
+		rgb->funcs->disable(rgb);
 
 	pinctrl_pm_select_sleep_state(rgb->dev);
 }
@@ -158,21 +174,6 @@ static const struct drm_encoder_funcs rockchip_rgb_encoder_funcs = {
 	.destroy = drm_encoder_cleanup,
 };
 
-static const struct of_device_id rockchip_rgb_dt_ids[] = {
-	{
-		.compatible = "rockchip,px30-rgb",
-	}, {
-		.compatible = "rockchip,rv1108-rgb",
-	}, {
-		.compatible = "rockchip,rk3066-rgb",
-	}, {
-		.compatible = "rockchip,rk3308-rgb",
-	},
-	{}
-};
-
-MODULE_DEVICE_TABLE(of, rockchip_rgb_dt_ids);
-
 static int rockchip_rgb_bind(struct device *dev, struct device *master,
 			     void *data)
 {
@@ -180,35 +181,13 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 	struct drm_device *drm_dev = data;
 	struct drm_encoder *encoder;
 	struct drm_connector *connector;
-	struct device_node *remote = NULL;
-	struct device_node  *port, *endpoint;
-	u32 endpoint_id;
-	int ret = 0, child_count = 0;
-
-	rgb->drm_dev = drm_dev;
-	port = of_graph_get_port_by_id(dev->of_node, 1);
-	if (!port) {
-		DRM_DEV_ERROR(dev,
-			      "can't found port point, please init rgb panel port!\n");
-		return -EINVAL;
-	}
-	for_each_child_of_node(port, endpoint) {
-		child_count++;
-		if (of_property_read_u32(endpoint, "reg", &endpoint_id))
-			endpoint_id = 0;
-		ret = drm_of_find_panel_or_bridge(dev->of_node, 1, endpoint_id,
-						  &rgb->panel, &rgb->bridge);
-		if (!ret)
-			break;
-	}
-	if (!child_count) {
-		DRM_DEV_ERROR(dev, "rgb port does not have any children\n");
-		ret = -EINVAL;
-		goto err_put_port;
-	} else if (ret) {
-		DRM_DEV_ERROR(dev, "failed to find panel and bridge node\n");
-		ret = -EPROBE_DEFER;
-		goto err_put_port;
+	int ret;
+
+	ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1,
+					  &rgb->panel, &rgb->bridge);
+	if (ret) {
+		DRM_DEV_ERROR(dev, "failed to find panel or bridge: %d\n", ret);
+		return ret;
 	}
 
 	encoder = &rgb->encoder;
@@ -218,21 +197,19 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 	ret = drm_encoder_init(drm_dev, encoder, &rockchip_rgb_encoder_funcs,
 			       DRM_MODE_ENCODER_NONE, NULL);
 	if (ret < 0) {
-		DRM_DEV_ERROR(drm_dev->dev,
-			      "failed to initialize encoder: %d\n", ret);
-		goto err_put_remote;
+		DRM_DEV_ERROR(dev, "failed to initialize encoder: %d\n", ret);
+		return ret;
 	}
 
 	drm_encoder_helper_add(encoder, &rockchip_rgb_encoder_helper_funcs);
 
 	if (rgb->panel) {
 		connector = &rgb->connector;
-		connector->dpms = DRM_MODE_DPMS_OFF;
 		ret = drm_connector_init(drm_dev, connector,
 					 &rockchip_rgb_connector_funcs,
 					 DRM_MODE_CONNECTOR_LVDS);
 		if (ret < 0) {
-			DRM_DEV_ERROR(drm_dev->dev,
+			DRM_DEV_ERROR(dev,
 				      "failed to initialize connector: %d\n",
 				      ret);
 			goto err_free_encoder;
@@ -243,15 +220,14 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 
 		ret = drm_mode_connector_attach_encoder(connector, encoder);
 		if (ret < 0) {
-			DRM_DEV_ERROR(drm_dev->dev,
+			DRM_DEV_ERROR(dev,
 				      "failed to attach encoder: %d\n", ret);
 			goto err_free_connector;
 		}
 
 		ret = drm_panel_attach(rgb->panel, connector);
 		if (ret < 0) {
-			DRM_DEV_ERROR(drm_dev->dev,
-				      "failed to attach panel: %d\n", ret);
+			DRM_DEV_ERROR(dev, "failed to attach panel: %d\n", ret);
 			goto err_free_connector;
 		}
 		connector->port = dev->of_node;
@@ -259,27 +235,19 @@ static int rockchip_rgb_bind(struct device *dev, struct device *master,
 		rgb->bridge->encoder = encoder;
 		ret = drm_bridge_attach(drm_dev, rgb->bridge);
 		if (ret) {
-			DRM_DEV_ERROR(drm_dev->dev,
+			DRM_DEV_ERROR(dev,
 				      "failed to attach bridge: %d\n", ret);
 			goto err_free_encoder;
 		}
 		encoder->bridge = rgb->bridge;
 	}
 
-	of_node_put(remote);
-	of_node_put(port);
-
 	return 0;
 
 err_free_connector:
 	drm_connector_cleanup(connector);
 err_free_encoder:
 	drm_encoder_cleanup(encoder);
-err_put_remote:
-	of_node_put(remote);
-err_put_port:
-	of_node_put(port);
-
 	return ret;
 }
 
@@ -288,11 +256,11 @@ static void rockchip_rgb_unbind(struct device *dev, struct device *master,
 {
 	struct rockchip_rgb *rgb = dev_get_drvdata(dev);
 
-	rockchip_rgb_encoder_disable(&rgb->encoder);
 	if (rgb->panel) {
 		drm_panel_detach(rgb->panel);
 		drm_connector_cleanup(&rgb->connector);
 	}
+
 	drm_encoder_cleanup(&rgb->encoder);
 }
 
@@ -305,24 +273,15 @@ static int rockchip_rgb_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct rockchip_rgb *rgb;
-	const struct of_device_id *match;
 	int ret;
 
-	if (!dev->of_node) {
-		DRM_DEV_ERROR(dev, "dev->of_node is null\n");
-		return -ENODEV;
-	}
-
 	rgb = devm_kzalloc(&pdev->dev, sizeof(*rgb), GFP_KERNEL);
 	if (!rgb)
 		return -ENOMEM;
 
 	rgb->dev = dev;
-	match = of_match_node(rockchip_rgb_dt_ids, dev->of_node);
-	if (!match) {
-		DRM_DEV_ERROR(dev, "match node failed\n");
-		return -ENODEV;
-	}
+	rgb->funcs = of_device_get_match_data(dev);
+	platform_set_drvdata(pdev, rgb);
 
 	if (dev->parent && dev->parent->of_node) {
 		rgb->grf = syscon_node_to_regmap(dev->parent->of_node);
@@ -333,12 +292,7 @@ static int rockchip_rgb_probe(struct platform_device *pdev)
 		}
 	}
 
-	dev_set_drvdata(dev, rgb);
-	ret = component_add(&pdev->dev, &rockchip_rgb_component_ops);
-	if (ret < 0)
-		DRM_DEV_ERROR(dev, "failed to add component\n");
-
-	return ret;
+	return component_add(dev, &rockchip_rgb_component_ops);
 }
 
 static int rockchip_rgb_remove(struct platform_device *pdev)
@@ -348,12 +302,42 @@ static int rockchip_rgb_remove(struct platform_device *pdev)
 	return 0;
 }
 
-struct platform_driver rockchip_rgb_driver = {
+static void px30_rgb_enable(struct rockchip_rgb *rgb)
+{
+	int pipe = drm_of_encoder_active_endpoint_id(rgb->dev->of_node,
+						     &rgb->encoder);
+
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe));
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(1));
+}
+
+static void px30_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs px30_rgb_funcs = {
+	.enable = px30_rgb_enable,
+	.disable = px30_rgb_disable,
+};
+
+static const struct of_device_id rockchip_rgb_dt_ids[] = {
+	{ .compatible = "rockchip,px30-rgb", .data = &px30_rgb_funcs },
+	{ .compatible = "rockchip,rk3066-rgb", },
+	{ .compatible = "rockchip,rk3308-rgb", },
+	{ .compatible = "rockchip,rv1108-rgb", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, rockchip_rgb_dt_ids);
+
+static struct platform_driver rockchip_rgb_driver = {
 	.probe = rockchip_rgb_probe,
 	.remove = rockchip_rgb_remove,
 	.driver = {
-		   .name = "rockchip-rgb",
-		   .of_match_table = of_match_ptr(rockchip_rgb_dt_ids),
+		.name = "rockchip-rgb",
+		.of_match_table = of_match_ptr(rockchip_rgb_dt_ids),
 	},
 };
 

From 82f2830bece2cfdcf319d65391e56f5fe8737df4 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 27 Aug 2018 16:18:04 +0800
Subject: [PATCH 1234/1852] drm/rockchip: vop: Don't create an instances of
 struct vop_win for dummy vop_win_data

Change-Id: I49d9d4f0f4dacb39042d9714f2a50af7462341ea
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index a2c1d85bba95b..430dd96570dba 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -4213,8 +4213,6 @@ static int vop_win_init(struct vop *vop)
 		}
 	}
 
-	vop->num_wins = num_wins;
-
 	prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_ATOMIC,
 					 "ZPOS", 0, vop->data->win_size);
 	if (!prop) {
@@ -4342,6 +4340,9 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	for (i = 0; i < vop_data->win_size; i++) {
 		const struct vop_win_data *win_data = &vop_data->win[i];
 
+		if (!win_data->phy)
+			continue;
+
 		num_wins += win_data->area_size + 1;
 	}
 

From 36ba6af2300792f60b1ee41317cbbb8dfb312efe Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 28 Aug 2018 10:32:25 +0800
Subject: [PATCH 1235/1852] arm: dts: rockchip: rk3288: Assign npll to 1250MHz

In order to support 420MHz for gpu and 125MHz, 50MHz for gmac.

Change-Id: I2b0e3edbf08850555c5bd4bc1d063c8923d54bda
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8e51132ef7e44..8abc4cee3d162 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1051,7 +1051,7 @@
                                   <&cru ACLK_PERI>, <&cru HCLK_PERI>,
                                   <&cru PCLK_PERI>;
 		assigned-clock-rates = <594000000>,
-				       <500000000>, <300000000>,
+				       <1250000000>, <300000000>,
 				       <150000000>, <75000000>,
 				       <300000000>, <150000000>,
 				       <75000000>;

From f834e8cfda3ac9b33ad366a80cdf9ee045fd0871 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 28 Aug 2018 10:40:25 +0800
Subject: [PATCH 1236/1852] arm: dts: rockchip: rk3288: Change 400MHz to 420Mhz
 for gpu

It doesn't support 400MHz, but support 420MHz.

Change-Id: Ife31469307912f83919b02b532acde91cc0f19ce
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8abc4cee3d162..1b7602f25f343 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1728,8 +1728,8 @@
 			opp-hz = /bits/ 64 <300000000>;
 			opp-microvolt = <1000000>;
 		};
-		opp-400000000 {
-			opp-hz = /bits/ 64 <400000000>;
+		opp-420000000 {
+			opp-hz = /bits/ 64 <420000000>;
 			opp-microvolt = <1100000>;
 		};
 		opp-500000000 {

From 2cf368ba075119114076b53c9e5da6291de94b57 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 3 Jul 2018 16:24:59 +0800
Subject: [PATCH 1237/1852] arm64: dts: rockchip: rk3399: Add wide-temperature
 configure

Change-Id: I5e8cca3de8b671f04d9fdf07f6c566ebb8b7988a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
index 82514d1b7b114..7926d95f6e6cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -47,6 +47,10 @@
 		compatible = "operating-points-v2";
 		opp-shared;
 
+		rockchip,temp-hysteresis = <5000>;
+		rockchip,low-temp = <0>;
+		rockchip,low-temp-min-volt = <900000>;
+
 		nvmem-cells = <&cpul_leakage>;
 		nvmem-cell-names = "cpu_leakage";
 
@@ -127,6 +131,10 @@
 		compatible = "operating-points-v2";
 		opp-shared;
 
+		rockchip,temp-hysteresis = <5000>;
+		rockchip,low-temp = <0>;
+		rockchip,low-temp-min-volt = <900000>;
+
 		nvmem-cells = <&cpub_leakage>;
 		nvmem-cell-names = "cpu_leakage";
 
@@ -224,6 +232,11 @@
 	gpu_opp_table: opp-table2 {
 		compatible = "operating-points-v2";
 
+		rockchip,thermal-zone = "soc-thermal";
+		rockchip,temp-hysteresis = <5000>;
+		rockchip,low-temp = <0>;
+		rockchip,low-temp-min-volt = <900000>;
+
 		nvmem-cells = <&gpu_leakage>;
 		nvmem-cell-names = "gpu_leakage";
 
@@ -241,7 +254,7 @@
 		rockchip,pvtm-error = <1000>;
 		rockchip,pvtm-ref-temp = <41>;
 		rockchip,pvtm-temp-prop = <46 12>;
-		rockchip,thermal-zone = "gpu-thermal";
+		rockchip,pvtm-thermal-zone = "gpu-thermal";
 
 		opp-200000000 {
 			opp-hz = /bits/ 64 <200000000>;

From a2df1ab7c02633724a300f3cd4b34d42e0c03378 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Thu, 16 Aug 2018 14:32:48 +0800
Subject: [PATCH 1238/1852] drm/rockchip: Fix coding style

Change-Id: I4ae825c374b518a501f986e3f63877216754f824
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/rockchip/Kconfig | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index ba6a029bf3d3f..f218f4d9029eb 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -47,7 +47,7 @@ config ROCKCHIP_DW_HDMI
         help
 	  This selects support for Rockchip SoC specific extensions
 	  for the Synopsys DesignWare HDMI driver. If you want to
-	  enable HDMI on RK3288 based SoC, you should selet this
+	  enable HDMI on RK3288 based SoC, you should select this
 	  option.
 
 config ROCKCHIP_DW_MIPI_DSI
@@ -55,10 +55,10 @@ config ROCKCHIP_DW_MIPI_DSI
 	depends on DRM_ROCKCHIP
 	select DRM_MIPI_DSI
 	help
-	 This selects support for Rockchip SoC specific extensions
-	 for the Synopsys DesignWare HDMI driver. If you want to
-	 enable MIPI DSI on RK3288 based SoC, you should selet this
-	 option.
+	  This selects support for Rockchip SoC specific extensions
+	  for the Synopsys DesignWare HDMI driver. If you want to
+	  enable MIPI DSI on RK3288 based SoC, you should select this
+	  option.
 
 config ROCKCHIP_ANALOGIX_DP
 	tristate "Rockchip specific extensions for Analogix DP driver"
@@ -67,7 +67,7 @@ config ROCKCHIP_ANALOGIX_DP
 	help
 	  This selects support for Rockchip SoC specific extensions
 	  for the Analogix Core DP driver. If you want to enable DP
-	  on RK3288 based SoC, you should selet this option.
+	  on RK3288 based SoC, you should select this option.
 
 config ROCKCHIP_INNO_HDMI
 	tristate "Rockchip specific extensions for Innosilicon HDMI"

From f2752d91f68f7d89b3ccbc7fa645786d2a96377b Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Mon, 3 Sep 2018 17:19:46 +0800
Subject: [PATCH 1239/1852] arm64: dts: rockchip: enable
 'rockchip,no-deep-low-power' for rk3308-evb

This patch can help us to fix pop after wake up via VAD,
and  enable 'rockchip,no-deep-low-power' on all of
rk3308-evb, not only amic boards.

Change-Id: I07f4674dd8c7fbd400b3c9b265fbaec6bfb5829e
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts | 1 -
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts | 1 -
 arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi     | 1 +
 arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi     | 1 +
 4 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
index 5040d9230165e..871f1785340f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v10.dts
@@ -24,7 +24,6 @@
 };
 
 &acodec {
-	rockchip,no-deep-low-power;
 	rockchip,en-always-grps = <0 1 2>;
 };
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
index 0e732ce3001a1..c36dc855a2566 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
@@ -23,7 +23,6 @@
 };
 
 &acodec {
-	rockchip,no-deep-low-power;
 	rockchip,en-always-grps = <1 2 3>;
 };
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
index 51acfb182beac..c772b8aed2636 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v10.dtsi
@@ -264,6 +264,7 @@
 &acodec {
 	status = "okay";
 
+	rockchip,no-deep-low-power;
 	rockchip,loopback-grp = <3>;
 	hp-ctl-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
 	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
index 1d931d311a040..8b12bfea0835c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-v11.dtsi
@@ -283,6 +283,7 @@
 &acodec {
 	status = "okay";
 
+	rockchip,no-deep-low-power;
 	rockchip,loopback-grp = <0>;
 	hp-ctl-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
 	spk-ctl-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;

From 1672e4a52fe8397179f9e0c43274ffaf136b5541 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 16 Apr 2018 10:28:21 +0800
Subject: [PATCH 1240/1852] drm/panel: simple: fix loader protect

Change-Id: I5b9bb5e35cc74389b6500f85c48dfed911c21181
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 700ffd65c7c1a..8287127a71210 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -547,6 +547,7 @@ static int panel_simple_regulator_disable(struct drm_panel *panel)
 
 static int panel_simple_loader_protect(struct drm_panel *panel, bool on)
 {
+	struct panel_simple *p = to_panel_simple(panel);
 	int err;
 
 	if (on) {
@@ -556,8 +557,11 @@ static int panel_simple_loader_protect(struct drm_panel *panel, bool on)
 				err);
 			return err;
 		}
+
+		p->prepared = true;
+		p->enabled = true;
 	} else {
-		panel_simple_regulator_disable(panel);
+		/* do nothing */
 	}
 
 	return 0;

From 57c3f7851bf0d7988c99232f5bb97bdf874008b4 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 3 Sep 2018 19:51:55 +0800
Subject: [PATCH 1241/1852] usb: quirks: add quirk for Kingston DataTraveler
 3.0 with broken LPM

Kingston DataTraveler 3.0 sometime would be disconnected
or not be enumerated successfully by xHCI controller when
LPM was enabled.

This patch adds an USB_QUIRK_NO_LPM quirk for this device.

Change-Id: I8ffa8d46ee242ab9665ce70565df7718b20ca87c
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/core/quirks.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index 64496a1af12ef..46169cc94b363 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -200,6 +200,9 @@ static const struct usb_device_id usb_quirk_list[] = {
 	{ USB_DEVICE(0x0926, 0x3333), .driver_info =
 			USB_QUIRK_CONFIG_INTF_STRINGS },
 
+	/* Kingston DataTraveler 3.0 */
+	{ USB_DEVICE(0x0951, 0x1666), .driver_info = USB_QUIRK_NO_LPM },
+
 	/* X-Rite/Gretag-Macbeth Eye-One Pro display colorimeter */
 	{ USB_DEVICE(0x0971, 0x2000), .driver_info = USB_QUIRK_NO_SET_INTF },
 

From 9c5002032b295fa29a6ea115041c2b8c02f92a36 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 30 Aug 2018 20:22:29 +0800
Subject: [PATCH 1242/1852] dmaengine: pl330: add support for interlace single
 xfer

Change-Id: I953a3858c2cb3c252788bb65c27c99ee737744c9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 drivers/dma/pl330.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 8746c24d3cd78..b14f5c2254011 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1477,6 +1477,12 @@ static inline int _setup_loops(struct pl330_dmac *pl330,
 		off += _emit_FLUSHP(dry_run, &buf[off],
 					pxs->desc->peri);
 #endif
+	if (pxs->desc->rqtype == DMA_DEV_TO_MEM)
+		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +
+				     pxs->desc->dst_interlace_size);
+	else if (pxs->desc->rqtype == DMA_MEM_TO_DEV)
+		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +
+				     pxs->desc->src_interlace_size);
 	while (bursts) {
 		c = bursts;
 		off += _loop(pl330, dry_run, &buf[off], &c, pxs);
@@ -1501,7 +1507,9 @@ static inline int _setup_xfer(struct pl330_dmac *pl330,
 	/* Setup Loop(s) */
 	off += _setup_loops(pl330, dry_run, &buf[off], pxs);
 
-	if (pl330->peripherals_req_type == BURST) {
+	if (pxs->desc->src_interlace_size == 0 &&
+	    pxs->desc->dst_interlace_size == 0 &&
+	    pl330->peripherals_req_type == BURST) {
 		unsigned int ccr = pxs->ccr;
 		unsigned long c = 0;
 

From c274b951123f264c6aa37543144a0e47b235e7ca Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 30 Aug 2018 20:36:55 +0800
Subject: [PATCH 1243/1852] ASoC: rockchip: vad: memcpy: add support padding
 size

This patch add support for memcpy with padding size.
just like extend vad 6ch to 8ch buffer, so the padding
is needed.

Change-Id: Ie9777b2856d556d4934bce6e850dae9b27b078db
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 68 +++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 17 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 1c95688b923b3..062ba8b6afed7 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -325,6 +325,33 @@ bool snd_pcm_vad_attached(struct snd_pcm_substream *substream)
 }
 EXPORT_SYMBOL(snd_pcm_vad_attached);
 
+static int vad_memcpy_fromio(void *to, void __iomem *from,
+			     int size, int frame_sz, int padding_sz)
+{
+	int i, step_src, step_dst, fcount;
+
+	step_src = frame_sz;
+	step_dst = frame_sz + padding_sz;
+
+	if (size % frame_sz) {
+		pr_err("%s: invalid size: %d\n", __func__, size);
+		return -EINVAL;
+	}
+
+	fcount = size / frame_sz;
+	if (padding_sz) {
+		for (i = 0; i < fcount; i++) {
+			memcpy_fromio(to, from, frame_sz);
+			to += step_dst;
+			from += step_src;
+		}
+	} else {
+		memcpy_fromio(to, from, size);
+	}
+
+	return 0;
+}
+
 /**
  * snd_pcm_vad_memcpy - Copy vad data to dst
  * @substream: PCM substream instance
@@ -340,7 +367,7 @@ snd_pcm_sframes_t snd_pcm_vad_memcpy(struct snd_pcm_substream *substream,
 	struct rockchip_vad *vad = NULL;
 	struct vad_buf *vbuf;
 	snd_pcm_uframes_t avail;
-	int bytes;
+	int bytes, vbytes, frame_sz, vframe_sz, padding_sz;
 
 	vad = substream_get_drvdata(substream);
 
@@ -356,30 +383,37 @@ snd_pcm_sframes_t snd_pcm_vad_memcpy(struct snd_pcm_substream *substream,
 	if (bytes <= 0)
 		return -EFAULT;
 
-	dev_dbg(vad->dev,
-		"begin: %p, pos: %p, end: %p, size: %d, bytes: %d\n",
-		vbuf->begin, vbuf->pos, vbuf->end, vbuf->size, bytes);
+	frame_sz = frames_to_bytes(runtime, 1);
+	vframe_sz = samples_to_bytes(runtime, vad->channels);
+	padding_sz = frame_sz - vframe_sz;
+	vbytes = vframe_sz * avail;
+
+	memset(buf, 0x0, bytes);
 	if (!vbuf->loop) {
-		memcpy_fromio(buf, vbuf->pos, bytes);
-		vbuf->pos += bytes;
+		vad_memcpy_fromio(buf, vbuf->pos, vbytes,
+				  vframe_sz, padding_sz);
+		vbuf->pos += vbytes;
 	} else {
-		if ((vbuf->pos + bytes) <= vbuf->end) {
-			memcpy_fromio(buf, vbuf->pos, bytes);
-			vbuf->pos += bytes;
+		if ((vbuf->pos + vbytes) <= vbuf->end) {
+			vad_memcpy_fromio(buf, vbuf->pos, vbytes,
+					  vframe_sz, padding_sz);
+			vbuf->pos += vbytes;
 		} else {
 			int part1 = vbuf->end - vbuf->pos;
-			int part2 = bytes - part1;
-
-			memcpy_fromio(buf, vbuf->pos, part1);
-			memcpy_fromio(buf + part1, vbuf->begin, part2);
+			int part2 = vbytes - part1;
+			int offset = part1;
+
+			if (padding_sz)
+				offset = part1 / vframe_sz * frame_sz;
+			vad_memcpy_fromio(buf, vbuf->pos, part1,
+					  vframe_sz, padding_sz);
+			vad_memcpy_fromio(buf + offset, vbuf->begin, part2,
+					  vframe_sz, padding_sz);
 			vbuf->pos = vbuf->begin + part2;
 		}
 	}
 
-	vbuf->size -= bytes;
-	dev_dbg(vad->dev,
-		"begin: %p, pos: %p, end: %p, size: %d, bytes: %d\n",
-		vbuf->begin, vbuf->pos, vbuf->end, vbuf->size, bytes);
+	vbuf->size -= vbytes;
 
 	return avail;
 }

From cc36ac3e939675c54ba1d15f64dc13f40a5d39ca Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Thu, 30 Aug 2018 20:45:41 +0800
Subject: [PATCH 1244/1852] ASoC: rockchip: multi_dais_pcm: obtain the vad data

This patch recaculate the hw pointer to make the vad data
available and submit the residue dma buffer requests in
single xfer mode for the first round, and then cyclic xfer
mode for normal.

Change-Id: I27c1d6e32cfcac74ae53bb151da859cd4325517b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_multi_dais_pcm.c | 129 +++++++++++++++++++
 1 file changed, 129 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_multi_dais_pcm.c b/sound/soc/rockchip/rockchip_multi_dais_pcm.c
index f9c9a56f5a85a..38f2220eeec1f 100644
--- a/sound/soc/rockchip/rockchip_multi_dais_pcm.c
+++ b/sound/soc/rockchip/rockchip_multi_dais_pcm.c
@@ -34,6 +34,10 @@ struct dmaengine_mpcm_runtime_data {
 	unsigned int pos;
 	unsigned int master_chan;
 	bool start_flag;
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	unsigned int vpos;
+	unsigned int vresidue_bytes;
+#endif
 };
 
 static inline struct dmaengine_mpcm_runtime_data *substream_to_prtd(
@@ -198,6 +202,119 @@ static void mpcm_dmaengine_terminate_all(struct dmaengine_mpcm_runtime_data *prt
 	}
 }
 
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+static void dmaengine_mpcm_single_dma_complete(void *arg)
+{
+	struct snd_pcm_substream *substream = arg;
+	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
+	unsigned int pos, size;
+	void *buf;
+
+	if (snd_pcm_vad_attached(substream) &&
+	    substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+		buf = substream->runtime->dma_area + prtd->vpos;
+		pos = prtd->vpos + snd_pcm_lib_period_bytes(substream);
+
+		if (pos <= snd_pcm_lib_buffer_bytes(substream))
+			size = substream->runtime->period_size;
+		else
+			size = bytes_to_frames(substream->runtime,
+					       prtd->vresidue_bytes);
+		snd_pcm_vad_preprocess(substream, buf, size);
+	}
+
+	prtd->vpos += snd_pcm_lib_period_bytes(substream);
+	if (prtd->vpos >= snd_pcm_lib_buffer_bytes(substream))
+		prtd->vpos = 0;
+	snd_pcm_period_elapsed(substream);
+}
+
+static int __mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream,
+					    dma_addr_t buf_start, int size)
+{
+	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct dma_async_tx_descriptor *desc;
+	enum dma_transfer_direction direction;
+	unsigned long flags = DMA_CTRL_ACK;
+	unsigned int *maps = prtd->channel_maps;
+	int offset, i;
+	bool callback = false;
+
+	direction = snd_pcm_substream_to_dma_direction(substream);
+
+	if (!substream->runtime->no_period_wakeup)
+		flags |= DMA_PREP_INTERRUPT;
+
+	offset = 0;
+	for (i = 0; i < prtd->num_chans; i++) {
+		if (!prtd->chans[i])
+			continue;
+		desc = dmaengine_prep_slave_single(prtd->chans[i],
+						   buf_start + offset,
+						   size,
+						   direction, flags);
+
+		if (!desc)
+			return -ENOMEM;
+		if (!callback) {
+			desc->callback = dmaengine_mpcm_single_dma_complete;
+			desc->callback_param = substream;
+			callback = true;
+		}
+		dmaengine_submit(desc);
+		offset += samples_to_bytes(runtime, maps[i]);
+	}
+
+	return 0;
+}
+
+static int dmaengine_mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream)
+{
+	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
+	enum dma_transfer_direction direction;
+	unsigned long flags = DMA_CTRL_ACK;
+	snd_pcm_uframes_t avail;
+	dma_addr_t buf_start, buf_end;
+	int offset, i, count, ret;
+	int buffer_bytes, period_bytes, residue_bytes;
+
+	direction = snd_pcm_substream_to_dma_direction(substream);
+
+	if (!substream->runtime->no_period_wakeup)
+		flags |= DMA_PREP_INTERRUPT;
+
+	period_bytes = snd_pcm_lib_period_bytes(substream);
+	buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
+	avail = snd_pcm_vad_avail(substream);
+	offset = frames_to_bytes(substream->runtime, avail);
+	prtd->vpos = offset;
+	buf_start = substream->runtime->dma_addr + offset;
+	buf_end = substream->runtime->dma_addr + snd_pcm_lib_buffer_bytes(substream);
+	count = (buf_end - buf_start) / period_bytes;
+	residue_bytes = (buf_end - buf_start) % period_bytes;
+	prtd->vresidue_bytes = residue_bytes;
+	pr_debug("%s: offset: %d, buffer_bytes: %d\n", __func__, offset, buffer_bytes);
+	pr_debug("%s: count: %d, residue_bytes: %d\n", __func__, count, residue_bytes);
+	for (i = 0; i < count; i++) {
+		ret = __mpcm_prepare_single_and_submit(substream, buf_start,
+						       period_bytes);
+		if (ret)
+			return ret;
+		buf_start += period_bytes;
+	}
+
+	if (residue_bytes) {
+		ret = __mpcm_prepare_single_and_submit(substream, buf_start,
+						       residue_bytes);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
 static int snd_dmaengine_mpcm_trigger(struct snd_pcm_substream *substream, int cmd)
 {
 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
@@ -206,6 +323,14 @@ static int snd_dmaengine_mpcm_trigger(struct snd_pcm_substream *substream, int c
 
 	switch (cmd) {
 	case SNDRV_PCM_TRIGGER_START:
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+		if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
+		    snd_pcm_vad_attached(substream) &&
+		    snd_pcm_vad_avail(substream)) {
+			dmaengine_mpcm_prepare_single_and_submit(substream);
+			mpcm_dma_async_issue_pending(prtd);
+		}
+#endif
 		ret = dmaengine_mpcm_prepare_and_submit(substream);
 		if (ret)
 			return ret;
@@ -452,6 +577,10 @@ static snd_pcm_uframes_t dmaengine_mpcm_pointer(struct snd_pcm_substream *substr
 		pos = buf_size - state.residue;
 
 	frames = bytes_to_frames(substream->runtime, pos);
+#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
+	if (prtd->vpos)
+		frames = bytes_to_frames(substream->runtime, prtd->vpos);
+#endif
 	if (!prtd->start_flag && frames >= MAX_FIFO_SIZE)
 		prtd->start_flag = true;
 

From 41e4a85768e2bfb4381516f7cba546c9eae77458 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 31 Aug 2018 11:29:07 +0800
Subject: [PATCH 1245/1852] ASoC: rockchip: vad: fixup 32bit software abs value

Change-Id: Ic520fcb7e3be18ad7eb36fc1cea208f35a95fd02
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/soc/rockchip/rockchip_vad.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/sound/soc/rockchip/rockchip_vad.c b/sound/soc/rockchip/rockchip_vad.c
index 062ba8b6afed7..7785699c459a6 100644
--- a/sound/soc/rockchip/rockchip_vad.c
+++ b/sound/soc/rockchip/rockchip_vad.c
@@ -69,6 +69,7 @@ struct rockchip_vad {
 	void *buf;
 	bool acodec_cfg;
 	bool vswitch;
+	bool h_16bit;
 };
 
 struct audio_src_addr_map {
@@ -87,6 +88,8 @@ static int rockchip_vad_stop(struct rockchip_vad *vad)
 		return 0;
 
 	regmap_update_bits(vad->regmap, VAD_CTRL, VAD_EN_MASK, VAD_DISABLE);
+	regmap_read(vad->regmap, VAD_CTRL, &val);
+	vad->h_16bit = (val & AUDIO_24BIT_SAT_MASK) == AUDIO_H16B;
 	regmap_read(vad->regmap, VAD_RAM_END_ADDR, &val);
 	vbuf->end = vbuf->begin + (val - vad->memphy) + 0x8;
 	regmap_read(vad->regmap, VAD_INT, &val);
@@ -291,6 +294,9 @@ int snd_pcm_vad_preprocess(struct snd_pcm_substream *substream,
 		return 0;
 
 	buf += samples_to_bytes(runtime, vad->audio_chnl);
+	/* retrieve the high 16bit data */
+	if (runtime->sample_bits == 32 && vad->h_16bit)
+		buf += 2;
 	for (i = 0; i < size; i++) {
 		data = buf;
 		if (vad_preprocess(*data))

From c2c8ee5e0c03c997205987494c2527cb73c94a1e Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 31 Aug 2018 11:58:07 +0800
Subject: [PATCH 1246/1852] ALSA: pcm_dmaengine: preprocess vad data for the
 first round

This patch fixup the lost vad activity frames count in the
first round dma xfer.

Change-Id: I72c1e5a9aeefc4966741b1fbf9c9e4d551cacfab
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
---
 sound/core/pcm_dmaengine.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c
index 238ff6f6ca688..f1c88fc881ef9 100644
--- a/sound/core/pcm_dmaengine.c
+++ b/sound/core/pcm_dmaengine.c
@@ -35,6 +35,7 @@ struct dmaengine_pcm_runtime_data {
 	unsigned int pos;
 #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
 	unsigned int vpos;
+	unsigned int vresidue_bytes;
 #endif
 };
 
@@ -188,7 +189,21 @@ static void dmaengine_pcm_vad_dma_complete(void *arg)
 {
 	struct snd_pcm_substream *substream = arg;
 	struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
+	unsigned int pos, size;
+	void *buf;
 
+	if (snd_pcm_vad_attached(substream) &&
+	    substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+		buf = substream->runtime->dma_area + prtd->vpos;
+		pos = prtd->vpos + snd_pcm_lib_period_bytes(substream);
+
+		if (pos <= snd_pcm_lib_buffer_bytes(substream))
+			size = substream->runtime->period_size;
+		else
+			size = bytes_to_frames(substream->runtime,
+					       prtd->vresidue_bytes);
+		snd_pcm_vad_preprocess(substream, buf, size);
+	}
 	prtd->vpos += snd_pcm_lib_period_bytes(substream);
 	if (prtd->vpos >= snd_pcm_lib_buffer_bytes(substream))
 		prtd->vpos = 0;
@@ -221,6 +236,7 @@ static int dmaengine_pcm_prepare_single_and_submit(struct snd_pcm_substream *sub
 	buf_end = substream->runtime->dma_addr + snd_pcm_lib_buffer_bytes(substream);
 	count = (buf_end - buf_start) / period_bytes;
 	residue_bytes = (buf_end - buf_start) % period_bytes;
+	prtd->vresidue_bytes = residue_bytes;
 	pr_debug("%s: offset: %d, buffer_bytes: %d\n", __func__, offset, buffer_bytes);
 	pr_debug("%s: count: %d, residue_bytes: %d\n", __func__, count, residue_bytes);
 	for (i = 0; i < count; i++) {

From f8befc28beebb3ee43bbc41ce4b791c618be430c Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Wed, 29 Aug 2018 14:35:04 +0800
Subject: [PATCH 1247/1852] pinctrl: rockchip: Add pinctrl support for rk3308b

The main description for rk3308b is as follows:
 - Old iomux multiplexing extension;
 - GRF_SOC_CON5 register add some bits;
 - Newly added GRF_SOC_CON13/15 register.

Change-Id: I94bfcae5387aceae14895f1cafa0bfea51bf8b63
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 236 +++++++++++++++-
 drivers/pinctrl/pinctrl-rockchip.c       | 333 +++++++++++++++++++++++
 2 files changed, 568 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index d5a74d063de42..030ef4932edeb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -1673,7 +1673,7 @@
 		pdm_m2 {
 			pdm_m2_clkm: pdm-m2-clkm {
 				rockchip,pins =
-					<2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+					<2 RK_PA4 RK_FUNC_3 &pcfg_pull_none>;
 			};
 
 			pdm_m2_clk: pdm-m2-clk {
@@ -1788,6 +1788,14 @@
 			};
 		};
 
+		uart3-m1 {
+			uart3m1_xfer: uart3m1-xfer {
+				rockchip,pins =
+					<0 RK_PC2 3 &pcfg_pull_up>,
+					<0 RK_PC1 3 &pcfg_pull_up>;
+			};
+		};
+
 		uart4 {
 
 			uart4_xfer: uart4-xfer {
@@ -1888,6 +1896,48 @@
 			};
 		};
 
+		spi1-m1 {
+			spi1m1_miso: spi1m1-miso {
+				rockchip,pins =
+					<2 RK_PA4 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_mosi: spi1m1-mosi {
+				rockchip,pins =
+					<2 RK_PA5 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_clk: spi1m1-clk {
+				rockchip,pins =
+					<2 RK_PA7 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_csn0: spi1m1-csn0 {
+				rockchip,pins =
+					<2 RK_PB1 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_miso_hs: spi1m1-miso-hs {
+				rockchip,pins =
+					<2 RK_PA4 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1m1_mosi_hs: spi1m1-mosi-hs {
+				rockchip,pins =
+					<2 RK_PA5 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1m1_clk_hs: spi1m1-clk-hs {
+				rockchip,pins =
+					<2 RK_PA7 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1m1_csn0_hs: spi1m1-csn0-hs {
+				rockchip,pins =
+					<2 RK_PB1 2 &pcfg_pull_up_8ma>;
+			};
+		};
+
 		spi2 {
 			spi2_clk: spi2-clk {
 				rockchip,pins =
@@ -2160,6 +2210,102 @@
 			};
 		};
 
+		pwm4 {
+			pwm4_pin: pwm4-pin {
+				rockchip,pins =
+					<0 RK_PA1 2 &pcfg_pull_none>;
+			};
+
+			pwm4_pin_pull_down: pwm4-pin-pull-down {
+				rockchip,pins =
+					<0 RK_PA1 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm5 {
+			pwm5_pin: pwm5-pin {
+				rockchip,pins =
+					<0 RK_PC1 2 &pcfg_pull_none>;
+			};
+
+			pwm5_pin_pull_down: pwm5-pin-pull-down {
+				rockchip,pins =
+					<0 RK_PC1 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm6 {
+			pwm6_pin: pwm6-pin {
+				rockchip,pins =
+					<0 RK_PC2 2 &pcfg_pull_none>;
+			};
+
+			pwm6_pin_pull_down: pwm6-pin-pull-down {
+				rockchip,pins =
+					<0 RK_PC2 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm7 {
+			pwm7_pin: pwm7-pin {
+				rockchip,pins =
+					<2 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			pwm7_pin_pull_down: pwm7-pin-pull-down {
+				rockchip,pins =
+					<2 RK_PB0 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm8 {
+			pwm8_pin: pwm8-pin {
+				rockchip,pins =
+					<2 RK_PB2 2 &pcfg_pull_none>;
+			};
+
+			pwm8_pin_pull_down: pwm8-pin-pull-down {
+				rockchip,pins =
+					<2 RK_PB2 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm9 {
+			pwm9_pin: pwm9-pin {
+				rockchip,pins =
+					<2 RK_PB3 2 &pcfg_pull_none>;
+			};
+
+			pwm9_pin_pull_down: pwm9-pin-pull-down {
+				rockchip,pins =
+					<2 RK_PB3 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm10 {
+			pwm10_pin: pwm10-pin {
+				rockchip,pins =
+					<2 RK_PB4 2 &pcfg_pull_none>;
+			};
+
+			pwm10_pin_pull_down: pwm10-pin-pull-down {
+				rockchip,pins =
+					<2 RK_PB4 2 &pcfg_pull_down>;
+			};
+		};
+
+		pwm11 {
+			pwm11_pin: pwm11-pin {
+				rockchip,pins =
+					<2 RK_PC0 4 &pcfg_pull_none>;
+			};
+
+			pwm11_pin_pull_down: pwm11-pin-pull-down {
+				rockchip,pins =
+					<2 RK_PC0 4 &pcfg_pull_down>;
+			};
+		};
+
 		gmac {
 			rmii_pins: rmii-pins {
 				rockchip,pins =
@@ -2194,11 +2340,99 @@
 			};
 		};
 
+		gmac-m1 {
+			rmiim1_pins: rmiim1-pins {
+				rockchip,pins =
+					/* mac_txen */
+					<4 RK_PB7 2 &pcfg_pull_none_12ma>,
+					/* mac_txd1 */
+					<4 RK_PA5 2 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<4 RK_PA4 2 &pcfg_pull_none_12ma>,
+					/* mac_rxd0 */
+					<4 RK_PA2 2 &pcfg_pull_none>,
+					/* mac_rxd1 */
+					<4 RK_PA3 2 &pcfg_pull_none>,
+					/* mac_rxer */
+					<4 RK_PA0 2 &pcfg_pull_none>,
+					/* mac_rxdv */
+					<4 RK_PA1 2 &pcfg_pull_none>,
+					/* mac_mdio */
+					<4 RK_PB6 2 &pcfg_pull_none>,
+					/* mac_mdc */
+					<4 RK_PB5 2 &pcfg_pull_none>;
+			};
+
+			macm1_refclk_12ma: macm1-refclk-12ma {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_none_12ma>;
+			};
+
+			macm1_refclk: macm1-refclk {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_none>;
+			};
+		};
+
 		rtc {
 			rtc_32k: rtc-32k {
 				rockchip,pins =
 					<0 RK_PC3 1 &pcfg_pull_none>;
 			};
 		};
+
+		can-m0 {
+			canm0_pins: canm0-pins {
+				rockchip,pins =
+					/* can_rxd_m0 */
+					<0 RK_PB3 2 &pcfg_pull_none>,
+					/* can_txd_m0 */
+					<0 RK_PB4 2 &pcfg_pull_none>;
+			};
+		};
+
+		can-m1 {
+			canm1_pins: canm1-pins {
+				rockchip,pins =
+					/* can_rxd_m1 */
+					<1 RK_PC6 5 &pcfg_pull_none>,
+					/* can_txd_m1 */
+					<1 RK_PC7 5 &pcfg_pull_none>;
+			};
+		};
+
+		can-m2 {
+			canm2_pins: canm2-pins {
+				rockchip,pins =
+					/* can_rxd_m2 */
+					<2 RK_PA2 4 &pcfg_pull_none>,
+					/* can_txd_m2 */
+					<2 RK_PA3 4 &pcfg_pull_none>;
+			};
+		};
+
+		owire-m0 {
+			owirem0_pins: owirem0-pins {
+				rockchip,pins =
+					/* owire_m0 */
+					<0 RK_PB3 3 &pcfg_pull_none>;
+			};
+		};
+
+		owire-m1 {
+			owirem1_pins: owirem1-pins {
+				rockchip,pins =
+					/* owire_m1 */
+					<1 RK_PC6 7 &pcfg_pull_none>;
+			};
+		};
+
+		owire-m2 {
+			owirem2_pins: owirem2-pins {
+				rockchip,pins =
+					/* owire_m2 */
+					<2 RK_PA2 5 &pcfg_pull_none>;
+			};
+		};
 	};
 };
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 203af70819b23..98fe6be1fc3e0 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -39,6 +39,7 @@
 #include <linux/clk.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/rockchip/cpu.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 
 #include "core.h"
@@ -396,6 +397,9 @@ struct rockchip_pin_ctrl {
 	struct rockchip_mux_route_data *iomux_routes;
 	u32				niomux_routes;
 
+	int	(*soc_data_init)(struct rockchip_pinctrl *info,
+				 struct rockchip_pin_ctrl *ctrl);
+
 	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
 				 int pin_num, struct regmap **regmap,
 				 int *reg, u8 *bit);
@@ -782,6 +786,94 @@ static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 2,
+		.pin = 2,
+		.reg = 0x608,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 3,
+		.reg = 0x608,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 16,
+		.reg = 0x610,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 10,
+		.reg = 0x610,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 11,
+		.reg = 0x610,
+		.bit = 4,
+		.mask = 0x7
+	},
+};
+
 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -1159,9 +1251,195 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 		/* pdm-clkm-m2 */
 		.bank_num = 2,
 		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	},
+};
+
+static struct rockchip_mux_route_data rk3308b_mux_route_data[] = {
+	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 15,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(8),
+	}, {
+		/* i2c3_sdam2 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 3,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(9),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val =  BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
 		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
 		.route_offset = 0x600,
 		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* spi1_miso */
+		.bank_num = 3,
+		.pin = 10,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* spi1_miso_m1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* owire_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* owire_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 7,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* owire_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* can_rxd_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* can_rxd_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* can_rxd_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* mac_rxd0_m0 */
+		.bank_num = 1,
+		.pin = 20,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* mac_rxd0_m1 */
+		.bank_num = 4,
+		.pin = 2,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14) | BIT(14),
+	}, {
+		/* uart3_rx */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15),
+	}, {
+		/* uart3_rx_m1 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15) | BIT(15),
 	},
 };
 
@@ -3716,6 +3994,54 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
 
 static const struct of_device_id rockchip_pinctrl_dt_match[];
 
+/* SoC data specially handle */
+
+#define RK3308B_GRF_SOC_CON13			0x608
+#define RK3308B_GRF_SOC_CON15			0x610
+
+/* RK3308B_GRF_SOC_CON13 */
+#define RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL	(BIT(16 + 10) | BIT(10))
+#define RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+/* RK3308B_GRF_SOC_CON15 */
+#define RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL	(BIT(16 + 11) | BIT(11))
+#define RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+static int rk3308b_soc_data_init(struct rockchip_pinctrl *info,
+				 struct rockchip_pin_ctrl *ctrl)
+{
+	int ret;
+
+	/*
+	 * Special for rk3308b, where we need to replace the recalced
+	 * and routed arrays, and enable the ctrl of selected sources.
+	 */
+	if (soc_is_rk3308b()) {
+		ctrl->iomux_recalced = rk3308b_mux_recalced_data;
+		ctrl->niomux_recalced = ARRAY_SIZE(rk3308b_mux_recalced_data);
+		ctrl->iomux_routes = rk3308b_mux_route_data;
+		ctrl->niomux_routes = ARRAY_SIZE(rk3308b_mux_route_data);
+
+		ret = regmap_write(info->regmap_base, RK3308B_GRF_SOC_CON13,
+				   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+
+		ret = regmap_write(info->regmap_base, RK3308B_GRF_SOC_CON15,
+				   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 /* retrieve the soc specific data */
 static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
 						struct rockchip_pinctrl *d,
@@ -3748,6 +4074,12 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
 		}
 	}
 
+	/* Special handle for some Socs */
+	if (ctrl->soc_data_init) {
+		if (ctrl->soc_data_init(d, ctrl))
+			return NULL;
+	}
+
 	grf_offs = ctrl->grf_mux_offset;
 	pmu_offs = ctrl->pmu_mux_offset;
 	drv_pmu_offs = ctrl->pmu_drv_offset;
@@ -4238,6 +4570,7 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
 		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
 		.iomux_routes		= rk3308_mux_route_data,
 		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+		.soc_data_init		= rk3308b_soc_data_init,
 		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
 		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,

From 28efd6af87f1af3df1fd3194385034dc958a80b1 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 31 Aug 2018 15:27:31 +0800
Subject: [PATCH 1248/1852] ASoC: rk3308_codec: remove the limit of the ADC
 digital reset

It looks like that we still keep the resetting ADC digital
and avoid the broken noise for loopback at starting.

And, remove adc_path_state which is not used now.

Change-Id: I514692b1bbb4bad1f0ce5413ca5891fd41083549
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 7a0c96a11eae8..d700ebe03c7f1 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -158,7 +158,6 @@ struct rk3308_codec_priv {
 	int adc_zerocross;
 	/* 0: line out, 1: hp out, 11: lineout and hpout */
 	int dac_output;
-	int adc_path_state;
 	int dac_path_state;
 
 	int pm_state;
@@ -730,17 +729,6 @@ static bool adc_for_each_grp(struct rk3308_codec_priv *rk3308,
 	return true;
 }
 
-static int rk3308_codec_get_adc_path_state(struct rk3308_codec_priv *rk3308)
-{
-	return rk3308->adc_path_state;
-}
-
-static void rk3308_codec_set_adc_path_state(struct rk3308_codec_priv *rk3308,
-					    int state)
-{
-	rk3308->adc_path_state = state;
-}
-
 static int rk3308_codec_get_dac_path_state(struct rk3308_codec_priv *rk3308)
 {
 	return rk3308->dac_path_state;
@@ -799,9 +787,6 @@ static int rk3308_codec_reset(struct snd_soc_codec *codec)
 
 static int rk3308_codec_adc_dig_reset(struct rk3308_codec_priv *rk3308)
 {
-	if (rk3308_codec_get_adc_path_state(rk3308) == PATH_BUSY)
-		goto out;
-
 	regmap_update_bits(rk3308->regmap, RK3308_GLB_CON,
 			   RK3308_ADC_DIG_WORK,
 			   RK3308_ADC_DIG_RESET);
@@ -810,7 +795,6 @@ static int rk3308_codec_adc_dig_reset(struct rk3308_codec_priv *rk3308)
 			   RK3308_ADC_DIG_WORK,
 			   RK3308_ADC_DIG_WORK);
 
-out:
 	return 0;
 }
 
@@ -2938,8 +2922,6 @@ static void rk3308_codec_update_adcs_status(struct rk3308_codec_priv *rk3308,
 			rk3308->skip_grps[en_always_grp] = 1;
 		}
 	}
-
-	rk3308_codec_set_adc_path_state(rk3308, state);
 }
 
 static int rk3308_hw_params(struct snd_pcm_substream *substream,

From d44c7005b95adc0011ca7e3bf0c68d70880ddcce Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Mon, 3 Sep 2018 11:12:54 +0800
Subject: [PATCH 1249/1852] media: rockchip/cif: fix get subdev fmt null
 pointer

Change-Id: I19ff295566e374e5557b6c7407de853343e61286
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/cif/capture.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c
index 36bb99ffface1..d3619ad8cc5fd 100644
--- a/drivers/media/platform/rockchip/cif/capture.c
+++ b/drivers/media/platform/rockchip/cif/capture.c
@@ -139,6 +139,7 @@ cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd, struct v4l2_rect *rect)
 	int ret;
 	u32 i;
 
+	fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
 	ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
 	if (ret < 0) {
 		v4l2_warn(sd->v4l2_dev,

From cb0d019296abffd1f0662a09623a18510c17eb49 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 31 Aug 2018 14:54:31 +0800
Subject: [PATCH 1250/1852] ASoC: rk3308_codec: Clean up and using e->reg
 instead of e->shift_l

It may that there is many registers need to be operated,
For more flexibility, we can use e->reg to indicate ADC
grps.

Change-Id: I701a151102e499bd0b5c31014039268ff4e5bfda
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 50 +++++++++++++++++++--------------
 1 file changed, 29 insertions(+), 21 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index d700ebe03c7f1..bc575749fe5ad 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -237,22 +237,10 @@ static const char *hpf_text[HPF_NUM] = {
 };
 
 static const struct soc_enum rk3308_hpf_enum_array[] = {
-	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(0),
-			0,
-			ARRAY_SIZE(hpf_text),
-			hpf_text),
-	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(1),
-			1,
-			ARRAY_SIZE(hpf_text),
-			hpf_text),
-	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(2),
-			2,
-			ARRAY_SIZE(hpf_text),
-			hpf_text),
-	SOC_ENUM_SINGLE(RK3308_ADC_DIG_CON04(3),
-			3,
-			ARRAY_SIZE(hpf_text),
-			hpf_text),
+	SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(hpf_text), hpf_text),
+	SOC_ENUM_SINGLE(1, 0, ARRAY_SIZE(hpf_text), hpf_text),
+	SOC_ENUM_SINGLE(2, 0, ARRAY_SIZE(hpf_text), hpf_text),
+	SOC_ENUM_SINGLE(3, 0, ARRAY_SIZE(hpf_text), hpf_text),
 };
 
 static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
@@ -576,8 +564,22 @@ static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
 	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned int value;
 
-	ucontrol->value.integer.value[0] = rk3308->hpf_cutoff[e->shift_l];
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
+	regmap_read(rk3308->regmap, RK3308_ADC_DIG_CON04(e->reg), &value);
+	if (value & RK3308_ADC_HPF_PATH_MSK)
+		rk3308->hpf_cutoff[e->reg] = HPF_OFF;
+	else
+		rk3308->hpf_cutoff[e->reg] =
+			(value & RK3308_ADC_HPF_CUTOFF_MSK) >> RK3308_ADC_HPF_CUTOFF_SFT;
+
+	ucontrol->value.integer.value[0] = rk3308->hpf_cutoff[e->reg];
 
 	return 0;
 }
@@ -595,28 +597,34 @@ static int rk3308_codec_hpf_put(struct snd_kcontrol *kcontrol,
 		RK3308_ADC_HPF_CUTOFF_612HZ,
 	};
 
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
 	switch (value) {
 	case HPF_CUTOFF_20HZ:
 	case HPF_CUTOFF_245HZ:
 	case HPF_CUTOFF_612HZ:
 		/* Enable high pass filter for ADCs */
-		regmap_update_bits(rk3308->regmap, e->reg,
+		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(e->reg),
 				   RK3308_ADC_HPF_PATH_MSK,
 				   RK3308_ADC_HPF_PATH_EN);
 		udelay(10);
-		regmap_update_bits(rk3308->regmap, e->reg,
+		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(e->reg),
 				   RK3308_ADC_HPF_CUTOFF_MSK,
 				   cutoff[value]);
 		break;
 	default:
 		/* Disable high pass filter for ADCs. */
-		regmap_update_bits(rk3308->regmap, e->reg,
+		regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON04(e->reg),
 				   RK3308_ADC_HPF_PATH_MSK,
 				   RK3308_ADC_HPF_PATH_DIS);
 		break;
 	}
 
-	rk3308->hpf_cutoff[e->shift_l] = value;
+	rk3308->hpf_cutoff[e->reg] = value;
 
 	return 0;
 }

From 8739310a71f3168f3ab470dbd30947dcab0aa022 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Mon, 3 Sep 2018 22:15:07 +0800
Subject: [PATCH 1251/1852] ASoC: rk3308_codec: clean up ALC AGC flows

Remove enable/disable ALC/AGC, and put their into
dapm controls.

Change-Id: I669347caab58470d9a6b6d017c70553fbb629426
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
 sound/soc/codecs/rk3308_codec.c | 420 ++++++++++++++++++++------------
 1 file changed, 268 insertions(+), 152 deletions(-)

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index bc575749fe5ad..857c571466300 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -57,7 +57,6 @@
 #define ADC_LR_GROUP_MAX		4
 #define ADC_STABLE_MS			200
 #define DEBUG_POP_ALWAYS		0
-#define ENABLE_AGC			0
 #define HPDET_POLL_MS			2000
 #define NOT_USED			255
 #define LOOPBACK_HANDLE_MS		100
@@ -162,6 +161,14 @@ struct rk3308_codec_priv {
 
 	int pm_state;
 
+	/* AGC L/R Off/on */
+	unsigned int agc_l[ADC_LR_GROUP_MAX];
+	unsigned int agc_r[ADC_LR_GROUP_MAX];
+
+	/* AGC L/R Approximate Sample Rate */
+	unsigned int agc_asr_l[ADC_LR_GROUP_MAX];
+	unsigned int agc_asr_r[ADC_LR_GROUP_MAX];
+
 	/* For the high pass filter */
 	unsigned int hpf_cutoff[ADC_LR_GROUP_MAX];
 
@@ -221,6 +228,19 @@ static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
 				struct snd_ctl_elem_value *ucontrol);
 static int rk3308_codec_hpf_put(struct snd_kcontrol *kcontrol,
 				struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_agc_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_agc_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_agc_asr_get(struct snd_kcontrol *kcontrol,
+				    struct snd_ctl_elem_value *ucontrol);
+static int rk3308_codec_agc_asr_put(struct snd_kcontrol *kcontrol,
+				    struct snd_ctl_elem_value *ucontrol);
+
+static const char *offon_text[2] = {
+	[0] = "Off",
+	[1] = "On",
+};
 
 #define HPF_NUM				4
 
@@ -243,6 +263,52 @@ static const struct soc_enum rk3308_hpf_enum_array[] = {
 	SOC_ENUM_SINGLE(3, 0, ARRAY_SIZE(hpf_text), hpf_text),
 };
 
+/* ALC AGC Switch */
+static const struct soc_enum rk3308_agc_enum_array[] = {
+	SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(1, 0, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(1, 1, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(2, 0, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(2, 1, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(3, 0, ARRAY_SIZE(offon_text), offon_text),
+	SOC_ENUM_SINGLE(3, 1, ARRAY_SIZE(offon_text), offon_text),
+};
+
+/* ALC AGC Approximate Sample Rate */
+#define AGC_ASR_NUM				8
+
+#define AGC_ASR_96KHZ				0
+#define AGC_ASR_48KHZ				1
+#define AGC_ASR_44_1KHZ				2
+#define AGC_ASR_32KHZ				3
+#define AGC_ASR_24KHZ				4
+#define AGC_ASR_16KHZ				5
+#define AGC_ASR_12KHZ				6
+#define AGC_ASR_8KHZ				7
+
+static const char *agc_asr_text[AGC_ASR_NUM] = {
+	[AGC_ASR_96KHZ] = "96KHz",
+	[AGC_ASR_48KHZ] = "48KHz",
+	[AGC_ASR_44_1KHZ] = "44.1KHz",
+	[AGC_ASR_32KHZ] = "32KHz",
+	[AGC_ASR_24KHZ] = "24KHz",
+	[AGC_ASR_16KHZ] = "16KHz",
+	[AGC_ASR_12KHZ] = "12KHz",
+	[AGC_ASR_8KHZ] = "8KHz",
+};
+
+static const struct soc_enum rk3308_agc_asr_enum_array[] = {
+	SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(1, 0, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(1, 1, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(2, 0, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(2, 1, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(3, 0, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+	SOC_ENUM_SINGLE(3, 1, ARRAY_SIZE(agc_asr_text), agc_asr_text),
+};
+
 static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 	/* ALC AGC Group */
 	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Left Volume",
@@ -403,6 +469,42 @@ static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 			     RK3308_AGC_MIN_GAIN_PGA_MAX,
 			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
 
+	/* ALC AGC Switch */
+	SOC_ENUM_EXT("ALC AGC Group 0 Left Switch", rk3308_agc_enum_array[0],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 0 Right Switch", rk3308_agc_enum_array[1],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 1 Left Switch", rk3308_agc_enum_array[2],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 1 Right Switch", rk3308_agc_enum_array[3],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 2 Left Switch", rk3308_agc_enum_array[4],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 2 Right Switch", rk3308_agc_enum_array[5],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 3 Left Switch", rk3308_agc_enum_array[6],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+	SOC_ENUM_EXT("ALC AGC Group 3 Right Switch", rk3308_agc_enum_array[7],
+		     rk3308_codec_agc_get, rk3308_codec_agc_put),
+
+	/* ALC AGC Approximate Sample Rate */
+	SOC_ENUM_EXT("AGC Group 0 Left Approximate Sample Rate", rk3308_agc_asr_enum_array[0],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 0 Right Approximate Sample Rate", rk3308_agc_asr_enum_array[1],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 1 Left Approximate Sample Rate", rk3308_agc_asr_enum_array[2],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 1 Right Approximate Sample Rate", rk3308_agc_asr_enum_array[3],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 2 Left Approximate Sample Rate", rk3308_agc_asr_enum_array[4],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 2 Right Approximate Sample Rate", rk3308_agc_asr_enum_array[5],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 3 Left Approximate Sample Rate", rk3308_agc_asr_enum_array[6],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+	SOC_ENUM_EXT("AGC Group 3 Right Approximate Sample Rate", rk3308_agc_asr_enum_array[7],
+		     rk3308_codec_agc_asr_get, rk3308_codec_agc_asr_put),
+
 	/* ADC MIC */
 	SOC_SINGLE_RANGE_TLV("ADC MIC Group 0 Left Volume",
 			     RK3308_ADC_ANA_CON01(0),
@@ -558,6 +660,155 @@ static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
 			     0, rk3308_codec_dac_hpmix_gain_tlv),
 };
 
+static int rk3308_codec_agc_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
+	if (e->shift_l)
+		ucontrol->value.integer.value[0] = rk3308->agc_r[e->reg];
+	else
+		ucontrol->value.integer.value[0] = rk3308->agc_l[e->reg];
+
+	return 0;
+}
+
+static int rk3308_codec_agc_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned int value = ucontrol->value.integer.value[0];
+	int grp = e->reg;
+
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
+	if (value) {
+		/* ALC AGC On */
+		if (e->shift_l) {
+			/* ALC AGC Right On */
+			regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON09(grp),
+					   RK3308_AGC_FUNC_SEL_MSK,
+					   RK3308_AGC_FUNC_SEL_EN);
+			regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
+					   RK3308_ADC_ALCR_CON_GAIN_PGAR_MSK,
+					   RK3308_ADC_ALCR_CON_GAIN_PGAR_EN);
+
+			rk3308->agc_r[e->reg] = 1;
+		} else {
+			/* ALC AGC Left On */
+			regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
+					   RK3308_AGC_FUNC_SEL_MSK,
+					   RK3308_AGC_FUNC_SEL_EN);
+			regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
+					   RK3308_ADC_ALCL_CON_GAIN_PGAL_MSK,
+					   RK3308_ADC_ALCL_CON_GAIN_PGAL_EN);
+
+			rk3308->agc_l[e->reg] = 1;
+		}
+	} else {
+		/* ALC AGC Off */
+		if (e->shift_l) {
+			/* ALC AGC Right Off */
+			regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON09(grp),
+					   RK3308_AGC_FUNC_SEL_MSK,
+					   RK3308_AGC_FUNC_SEL_DIS);
+			regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
+					   RK3308_ADC_ALCR_CON_GAIN_PGAR_MSK,
+					   RK3308_ADC_ALCR_CON_GAIN_PGAR_DIS);
+
+			rk3308->agc_r[e->reg] = 0;
+		} else {
+			/* ALC AGC Left Off */
+			regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
+					   RK3308_AGC_FUNC_SEL_MSK,
+					   RK3308_AGC_FUNC_SEL_DIS);
+			regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
+					   RK3308_ADC_ALCL_CON_GAIN_PGAL_MSK,
+					   RK3308_ADC_ALCL_CON_GAIN_PGAL_DIS);
+
+			rk3308->agc_l[e->reg] = 0;
+		}
+	}
+
+	return 0;
+}
+
+static int rk3308_codec_agc_asr_get(struct snd_kcontrol *kcontrol,
+				    struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned int value;
+	int grp = e->reg;
+
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
+	if (e->shift_l) {
+		regmap_read(rk3308->regmap, RK3308_ALC_R_DIG_CON04(grp), &value);
+		rk3308->agc_asr_r[e->reg] = value >> RK3308_AGC_APPROX_RATE_SFT;
+		ucontrol->value.integer.value[0] = rk3308->agc_asr_r[e->reg];
+	} else {
+		regmap_read(rk3308->regmap, RK3308_ALC_L_DIG_CON04(grp), &value);
+		rk3308->agc_asr_l[e->reg] = value >> RK3308_AGC_APPROX_RATE_SFT;
+		ucontrol->value.integer.value[0] = rk3308->agc_asr_l[e->reg];
+	}
+
+	return 0;
+}
+
+static int rk3308_codec_agc_asr_put(struct snd_kcontrol *kcontrol,
+				    struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+	struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned int value;
+	int grp = e->reg;
+
+	if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
+		dev_err(rk3308->plat_dev,
+			"%s: Invalid ADC grp: %d\n", __func__, e->reg);
+		return -EINVAL;
+	}
+
+	value = ucontrol->value.integer.value[0] << RK3308_AGC_APPROX_RATE_SFT;
+
+	if (e->shift_l) {
+		/* ALC AGC Right Approximate Sample Rate */
+		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON04(grp),
+				   RK3308_AGC_APPROX_RATE_MSK,
+				   value);
+		rk3308->agc_asr_r[e->reg] = ucontrol->value.integer.value[0];
+	} else {
+		/* ALC AGC Left Approximate Sample Rate */
+		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON04(grp),
+				   RK3308_AGC_APPROX_RATE_MSK,
+				   value);
+		rk3308->agc_asr_l[e->reg] = ucontrol->value.integer.value[0];
+	}
+
+	return 0;
+}
+
 static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
 				struct snd_ctl_elem_value *ucontrol)
 {
@@ -2145,148 +2396,6 @@ static int rk3308_codec_micbias_disable(struct rk3308_codec_priv *rk3308)
 	return 0;
 }
 
-static int rk3308_codec_alc_enable(struct rk3308_codec_priv *rk3308, int type)
-{
-	int idx, grp;
-
-	/*
-	 * 1. Set he max level and min level of the ALC need to control.
-	 *
-	 * These values are estimated
-	 */
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON05(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MAX_MSK,
-				   0x26);
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON05(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MAX_MSK,
-				   0x26);
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON06(grp),
-				   RK3308_AGC_HI_8BITS_AGC_MAX_MSK,
-				   0x40);
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON06(grp),
-				   RK3308_AGC_HI_8BITS_AGC_MAX_MSK,
-				   0x40);
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON07(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MIN_MSK,
-				   0x36);
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON07(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MIN_MSK,
-				   0x36);
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON08(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MIN_MSK,
-				   0x20);
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON08(grp),
-				   RK3308_AGC_LO_8BITS_AGC_MIN_MSK,
-				   0x20);
-	}
-
-	/*
-	 * 2. Set ACODEC_ALC_DIG_CON4[2:0] according to the sample rate
-	 *
-	 * By default is 44.1KHz for sample.
-	 */
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON04(grp),
-				   RK3308_AGC_APPROX_RATE_MSK,
-				   RK3308_AGC_APPROX_RATE_44_1K);
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON04(grp),
-				   RK3308_AGC_APPROX_RATE_MSK,
-				   RK3308_AGC_APPROX_RATE_44_1K);
-	}
-
-#if ENABLE_AGC
-	/* 3. Set ACODEC_ALC_DIG_CON9[6] to 0x1, to enable the ALC module */
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
-				   RK3308_AGC_FUNC_SEL_MSK,
-				   RK3308_AGC_FUNC_SEL_EN);
-
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON09(grp),
-				   RK3308_AGC_FUNC_SEL_MSK,
-				   RK3308_AGC_FUNC_SEL_EN);
-	}
-
-	/*
-	 * 4. Set ACODEC_ADC_ANA_CON11[1:0], (ACODEC_ADC_ANA_CON11+0x40)[1:0],
-	 * (ACODEC_ADC_ANA_CON11+0x80)[1:0] and (ACODEC_ADC_ANA_CON11+0xc0)[1:0]
-	 * to 0x3, to enable the ALC module to control the gain of PGA.
-	 */
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
-				   RK3308_ADC_ALCL_CON_GAIN_PGAL_MSK |
-				   RK3308_ADC_ALCR_CON_GAIN_PGAR_MSK,
-				   RK3308_ADC_ALCL_CON_GAIN_PGAL_EN |
-				   RK3308_ADC_ALCR_CON_GAIN_PGAR_EN);
-	}
-#endif
-	/*
-	 * 5.Observe the current ALC output gain by reading
-	 * ACODEC_ALC_DIG_CON12[4:0]
-	 */
-
-	/* Do nothing if we don't use AGC */
-
-	return 0;
-}
-
-static int rk3308_codec_alc_disable(struct rk3308_codec_priv *rk3308,
-				    int type)
-{
-	int idx, grp;
-
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		/*
-		 * 1. Set ACODEC_ALC_DIG_CON9[6] to 0x0, to disable the ALC
-		 * module, then the ALC output gain will keep to the last value
-		 */
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_L_DIG_CON09(grp),
-				   RK3308_AGC_FUNC_SEL_MSK,
-				   RK3308_AGC_FUNC_SEL_DIS);
-		regmap_update_bits(rk3308->regmap, RK3308_ALC_R_DIG_CON09(grp),
-				   RK3308_AGC_FUNC_SEL_MSK,
-				   RK3308_AGC_FUNC_SEL_DIS);
-	}
-
-	for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) {
-		if (grp < 0 || grp > ADC_LR_GROUP_MAX - 1)
-			continue;
-
-		/*
-		 * 2. Set ACODEC_ADC_ANA_CON11[1:0], (ACODEC_ADC_ANA_CON11+0x40)
-		 * [1:0], (ACODEC_ADC_ANA_CON11+0x80)[1:0] and
-		 * (ACODEC_ADC_ANA_CON11+0xc0)[1:0] to 0x0, to disable the ALC
-		 * module to control the gain of PGA.
-		 */
-		regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON11(grp),
-				   RK3308_ADC_ALCL_CON_GAIN_PGAL_MSK |
-				   RK3308_ADC_ALCR_CON_GAIN_PGAR_MSK,
-				   RK3308_ADC_ALCL_CON_GAIN_PGAL_DIS |
-				   RK3308_ADC_ALCR_CON_GAIN_PGAR_DIS);
-	}
-
-	return 0;
-}
-
 static int rk3308_codec_adc_reinit_mics(struct rk3308_codec_priv *rk3308,
 					int type)
 {
@@ -2712,7 +2821,6 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308)
 	int idx, grp = 0;
 	int type = ADC_TYPE_NORMAL;
 
-	rk3308_codec_alc_enable(rk3308, type);
 	rk3308_codec_adc_ana_enable(rk3308, type);
 	rk3308_codec_adc_reinit_mics(rk3308, type);
 
@@ -2796,7 +2904,6 @@ static void rk3308_codec_dac_mclk_enable(struct rk3308_codec_priv *rk3308)
 
 static int rk3308_codec_close_all_capture(struct rk3308_codec_priv *rk3308)
 {
-	rk3308_codec_alc_disable(rk3308, ADC_TYPE_ALL);
 	rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_ALL);
 
 	return 0;
@@ -2804,7 +2911,6 @@ static int rk3308_codec_close_all_capture(struct rk3308_codec_priv *rk3308)
 
 static int rk3308_codec_close_capture(struct rk3308_codec_priv *rk3308)
 {
-	rk3308_codec_alc_disable(rk3308, ADC_TYPE_NORMAL);
 	rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_NORMAL);
 
 	return 0;
@@ -3036,7 +3142,6 @@ static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
 						   RK3308_ADC_R_CH_BIST_MSK,
 						   RK3308_ADC_R_CH_BIST_SINE);
 			}
-			rk3308_codec_alc_disable(rk3308, ADC_TYPE_LOOPBACK);
 			rk3308_codec_adc_ana_disable(rk3308, ADC_TYPE_LOOPBACK);
 		}
 	}
@@ -3258,6 +3363,21 @@ static int rk3308_codec_setup_en_always_adcs(struct rk3308_codec_priv *rk3308,
 	return 0;
 }
 
+static int rk3308_codec_dapm_controls_prepare(struct rk3308_codec_priv *rk3308)
+{
+	int grp;
+
+	for (grp = 0; grp < ADC_LR_GROUP_MAX; grp++) {
+		rk3308->hpf_cutoff[grp] = HPF_OFF;
+		rk3308->agc_l[grp] = 0;
+		rk3308->agc_r[grp] = 0;
+		rk3308->agc_asr_l[grp] = AGC_ASR_96KHZ;
+		rk3308->agc_asr_r[grp] = AGC_ASR_96KHZ;
+	}
+
+	return 0;
+}
+
 static int rk3308_codec_prepare(struct rk3308_codec_priv *rk3308)
 {
 	/* Clear registers for ADC and DAC */
@@ -3265,6 +3385,7 @@ static int rk3308_codec_prepare(struct rk3308_codec_priv *rk3308)
 	rk3308_codec_close_all_capture(rk3308);
 	rk3308_codec_default_gains(rk3308);
 	rk3308_codec_llp_down(rk3308);
+	rk3308_codec_dapm_controls_prepare(rk3308);
 
 	return 0;
 }
@@ -3389,7 +3510,6 @@ static void rk3308_codec_loopback_work(struct work_struct *work)
 	int idx, grp;
 
 	/* Prepare loopback ADCs */
-	rk3308_codec_alc_enable(rk3308, type);
 	rk3308_codec_adc_ana_enable(rk3308, type);
 
 	/* Waiting ADCs are stable */
@@ -4086,10 +4206,6 @@ static int rk3308_platform_probe(struct platform_device *pdev)
 	rk3308->dac_output = DAC_LINEOUT;
 	rk3308->adc_zerocross = 1;
 	rk3308->pm_state = PM_NORMAL;
-	rk3308->hpf_cutoff[0] = HPF_OFF;
-	rk3308->hpf_cutoff[1] = HPF_OFF;
-	rk3308->hpf_cutoff[2] = HPF_OFF;
-	rk3308->hpf_cutoff[3] = HPF_OFF;
 
 	platform_set_drvdata(pdev, rk3308);
 

From 13fbb17ca13db4fe1c4cd13105ba04cdb846002b Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Tue, 4 Sep 2018 17:50:33 +0800
Subject: [PATCH 1252/1852] arm: dts: rk3308-dot-rk816-v10-aarch32: add charge
 animation node

Change-Id: If65f87d7157106bd4314c973cbc6a8d550be9876
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
index 1640fb90c6784..e3a3447d7b99a 100644
--- a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
@@ -58,6 +58,11 @@
 		};
 	};
 
+	charge-animation {
+		compatible = "rockchip,uboot-charge";
+		status = "okay";
+	};
+
 	dummy_codec: dummy-codec {
 		compatible = "rockchip,dummy-codec";
 		#sound-dai-cells = <0>;

From 792209db68a782c54a34c6cc50422f476e5741f0 Mon Sep 17 00:00:00 2001
From: Weiwen Chen <cww@rock-chips.com>
Date: Tue, 4 Sep 2018 13:50:43 +0800
Subject: [PATCH 1253/1852] dm: add check target device probe completely

Because some mmc execute tuning should take more time,
so if dm target device is not probe completely before dm verity,
will trigger:

[    0.834803] device-mapper: init: attempting early device configuration.
[    0.836226] device-mapper: init: adding target '0 1031864 verity 1 PARTUUID=cfc90ed7-b23f-459b-896f-8135b56567a1 PARTUUID=cfc90ed7-b23f-459b-896f-8135b56567a1 4096 4096 128983 128983 sha1 d0f6e81bf584217e524e88b023d0c70422fb2f19 e939f8142d39394fb14f0df917de9346cb045b78 10 restart_on_corruption ignore_zero_blocks use_fec_from_device PARTUUID=cfc90ed7-b23f-459b-896f-8135b56567a1 fec_roots 2 fec_blocks 130000 fec_start 130000'
[    0.836341] device-mapper: table: 253:0: verity: Data device lookup failed
[    0.836355] device-mapper: init: starting dm-0 (vroot) failed
[    0.836916] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.843161] pgd = c0004000
[    0.843415] [00000000] *pgd=00000000
[    0.843810] Internal error: Oops: 80000005 [#1] PREEMPT SMP ARM
[    0.844345] CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.4.77 #1
[    0.844870] Hardware name: Generic DT based system
[    0.845299] task: de4b0000 ti: de4b8000 task.ti: de4b8000
[    0.845782] PC is at 0x0
[    0.846018] LR is at generic_make_request+0xc8/0x220
[    0.846458] pc : [<00000000>]    lr : [<c03aae2c>]    psr: 60000013
[    0.846458] sp : de4b9b58  ip : 00000004  fp : de4b9d9c
[    0.847466] r10: 00000000  r9 : de7fb020  r8 : c100390c
[    0.847927] r7 : ffffffff  r6 : de4b9b5c  r5 : 00000000  r4 : dde71540
[    0.848508] r3 : 00000000  r2 : dc8ba64d  r1 : dde71540  r0 : de7fb020
[    0.849080] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    0.849714] Control: 10c5387d  Table: 6000406a  DAC: 00000051

Change-Id: Idf9a33fd15adab8aa5e13f74c92b3270c9877035
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
---
 drivers/md/dm-table.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index b3d78bba3a79a..1c67966af2f28 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -748,6 +748,16 @@ int dm_table_add_target(struct dm_table *t, const char *type,
 		goto bad;
 	}
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	while (argv &&
+	       strncmp(argv[1], "PARTUUID=", 9) == 0 &&
+	       name_to_dev_t(argv[1]) == 0) {
+		DMINFO("%s: %s: Waiting for device %s ...",
+		       dm_device_name(t->md), type, argv[1]);
+		msleep(100);
+	}
+#endif
+
 	r = tgt->type->ctr(tgt, argc, argv);
 	kfree(argv);
 	if (r)

From b4819228de03f56bf7de6b4c6b88cbf4749b3f48 Mon Sep 17 00:00:00 2001
From: Alex Zhao <zzc@rock-chips.com>
Date: Tue, 4 Sep 2018 09:35:43 +0800
Subject: [PATCH 1254/1852] net: wireless: rockchip_wlan: rtl8188eu:fix unable
 to connect iphoneX

Change-Id: I809bf2fe8b8710940f792c5705c7f56debd89030
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/rtl8188eu/core/rtw_xmit.c | 5 ++++-
 .../rtl8188eu/hal/rtl8188e/usb/rtl8188eu_xmit.c              | 2 ++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8188eu/core/rtw_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8188eu/core/rtw_xmit.c
index 3cc261b2b8389..fb3d3f9d7e6ef 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8188eu/core/rtw_xmit.c
+++ b/drivers/net/wireless/rockchip_wlan/rtl8188eu/core/rtw_xmit.c
@@ -4123,7 +4123,10 @@ static void do_queue_select(_adapter	*padapter, struct pkt_attrib *pattrib)
 	/*	if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
 	 *		qsel = 7; */
 #endif
-
+	if (pattrib->ether_type == 0x888e) {
+		qsel = QSLT_MGNT;
+		RTW_INFO("TX EAPOL by QSLT_MGMT\n");
+	}
 #ifdef CONFIG_MCC_MODE
 	if (MCC_EN(padapter)) {
 		/* Under MCC */
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/rtl8188e/usb/rtl8188eu_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/rtl8188e/usb/rtl8188eu_xmit.c
index 7ae95d5fdbeb2..686baa7461577 100644
--- a/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/rtl8188e/usb/rtl8188eu_xmit.c
+++ b/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/rtl8188e/usb/rtl8188eu_xmit.c
@@ -310,6 +310,8 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba
 
 		qsel = (uint)(pattrib->qsel & 0x0000001f);
 		/* RTW_INFO("==> macid(%d) qsel:0x%02x\n",pattrib->mac_id,qsel); */
+		if (pattrib->ether_type == 0x888e)
+			RTW_INFO("==> macid(%d) qsel:0x%02x, pattrib->qsel = %x\n", pattrib->mac_id, qsel, pattrib->qsel);
 		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
 
 		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000);

From 14ce3b4a53c377aa678bb7021175b3251ef65875 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Sun, 2 Sep 2018 14:53:18 +0800
Subject: [PATCH 1255/1852] hwrng: rockchip - fix bug on system suspend and
 resume

This module should do nothing on system suspend and resume,
otherwise clk_bulk_disable is called when clk is not enabled,
and that will cause core dump.

Change-Id: Ib89b0dfd831c225ff852c35b8d25221453c5679d
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 drivers/char/hw_random/rockchip-rng.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c
index bc966a7fcd53a..fd3807121afaf 100644
--- a/drivers/char/hw_random/rockchip-rng.c
+++ b/drivers/char/hw_random/rockchip-rng.c
@@ -90,7 +90,6 @@ static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 	reg_ctrl |= CRYPTO_RNG_SLOWER_SOC_RING_0;
 	reg_ctrl |= CRYPTO_RNG_ENABLE;
 	reg_ctrl |= CRYPTO_RNG_START;
-	reg_ctrl |= CRYPTO_WRITE_MASK_ALL;
 
 	rk_rng_writel(rk_rng, reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
 
@@ -183,8 +182,12 @@ static int rk_rng_runtime_resume(struct device *dev)
 	return rk_rng_init(&rk_rng->rng);
 }
 
-static UNIVERSAL_DEV_PM_OPS(rk_rng_pm_ops, rk_rng_runtime_suspend,
-			    rk_rng_runtime_resume, NULL);
+static const struct dev_pm_ops rk_rng_pm_ops = {
+	SET_RUNTIME_PM_OPS(rk_rng_runtime_suspend,
+				rk_rng_runtime_resume, NULL)
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
+};
 
 #endif
 

From 1d64d5df0426a9e506a253c314b736574d781a09 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Tue, 4 Sep 2018 09:42:54 +0800
Subject: [PATCH 1256/1852] hwrng: rockchip - use HIWORD_UPDATE when write
 register

use HIWORD_UPDATE(val, 0xffff, 0) instead of val | CRYPTO_WRITE_MASK_ALL
to make code more clearly.

Change-Id: I9a27914911e09ae2395577ac51bacfa96a958ec8
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 drivers/char/hw_random/rockchip-rng.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c
index fd3807121afaf..e9520639ce4ee 100644
--- a/drivers/char/hw_random/rockchip-rng.c
+++ b/drivers/char/hw_random/rockchip-rng.c
@@ -14,6 +14,8 @@
 #include <linux/pm_runtime.h>
 
 #define _SBF(s, v)	((v) << (s))
+#define HIWORD_UPDATE(val, mask, shift) \
+			((val) << (shift) | (mask) << ((shift) + 16))
 
 #define CRYPTO_CLK_NUM	(4)
 #define ROCKCHIP_AUTOSUSPEND_DELAY	100
@@ -21,9 +23,6 @@
 #define ROCKCHIP_POLL_TIMEOUT_US	10000
 
 #define RK_MAX_RNG_BYTE			(32)
-#define CRYPTO_WRITE_MASK_SHIFT		(16)
-#define CRYPTO_WRITE_MASK_ALL		(0xffffu << CRYPTO_WRITE_MASK_SHIFT)
-
 #define CRYPTO_RNG_CTL			0x0400
 #define CRYPTO_RNG_64_BIT_LEN		_SBF(4, 0x00)
 #define CRYPTO_RNG_128_BIT_LEN		_SBF(4, 0x01)
@@ -91,7 +90,8 @@ static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 	reg_ctrl |= CRYPTO_RNG_ENABLE;
 	reg_ctrl |= CRYPTO_RNG_START;
 
-	rk_rng_writel(rk_rng, reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+	rk_rng_writel(rk_rng, HIWORD_UPDATE(reg_ctrl, 0xffff, 0),
+			CRYPTO_RNG_CTL);
 
 	ret = readl_poll_timeout(rk_rng->mem + CRYPTO_RNG_CTL, reg_ctrl,
 				!(reg_ctrl & CRYPTO_RNG_START),
@@ -106,7 +106,7 @@ static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 
 out:
 	/* close TRNG */
-	rk_rng_writel(rk_rng, 0 | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+	rk_rng_writel(rk_rng, HIWORD_UPDATE(0, 0xffff, 0), CRYPTO_RNG_CTL);
 
 	pm_runtime_mark_last_busy(rk_rng->dev);
 	pm_runtime_put_sync_autosuspend(rk_rng->dev);

From 18e834a682c17c8937681762f8f997b2e14e4ab5 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Wed, 5 Sep 2018 15:28:40 +0800
Subject: [PATCH 1257/1852] usb: gadget: f_uvc: add extension unit descriptor

Add extension unit descriptor for uvc. Support 3
controls in this extension unit. The rockchip IQ
tool use it to transfer vendor specific control
data.

Change-Id: I219e12616629bc75548b30ce63d46136aeac6561
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/gadget/function/f_uvc.c | 35 +++++++++++++++++++++++++++--
 drivers/usb/gadget/function/u_uvc.h |  6 +++--
 2 files changed, 37 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/gadget/function/f_uvc.c b/drivers/usb/gadget/function/f_uvc.c
index f8a1881609a2c..523fbbc7b6f98 100644
--- a/drivers/usb/gadget/function/f_uvc.c
+++ b/drivers/usb/gadget/function/f_uvc.c
@@ -770,6 +770,7 @@ static struct usb_function_instance *uvc_alloc_inst(void)
 	struct uvc_camera_terminal_descriptor *cd;
 	struct uvc_processing_unit_descriptor *pd;
 	struct uvc_output_terminal_descriptor *od;
+	struct UVC_EXTENSION_UNIT_DESCRIPTOR(1, 1) *ed;
 	struct uvc_color_matching_descriptor *md;
 	struct uvc_descriptor_header **ctl_cls;
 
@@ -817,6 +818,34 @@ static struct usb_function_instance *uvc_alloc_inst(void)
 	od->bSourceID			= 2;
 	od->iTerminal			= 0;
 
+	ed = &opts->uvc_extension;
+	ed->bLength = UVC_DT_EXTENSION_UNIT_SIZE(1, 1);
+	ed->bDescriptorType = USB_DT_CS_INTERFACE;
+	ed->bDescriptorSubType = UVC_VC_EXTENSION_UNIT;
+	ed->bUnitID = 6;
+	ed->guidExtensionCode[0] = 0xa2;
+	ed->guidExtensionCode[1] = 0x9e;
+	ed->guidExtensionCode[2] = 0x76;
+	ed->guidExtensionCode[3] = 0x41;
+	ed->guidExtensionCode[4] = 0xde;
+	ed->guidExtensionCode[5] = 0x04;
+	ed->guidExtensionCode[6] = 0x47;
+	ed->guidExtensionCode[7] = 0xe3;
+	ed->guidExtensionCode[8] = 0x8b;
+	ed->guidExtensionCode[9] = 0x2b;
+	ed->guidExtensionCode[10] = 0xf4;
+	ed->guidExtensionCode[11] = 0x34;
+	ed->guidExtensionCode[12] = 0x1a;
+	ed->guidExtensionCode[13] = 0xff;
+	ed->guidExtensionCode[14] = 0x00;
+	ed->guidExtensionCode[15] = 0x3b;
+	ed->bNumControls = 3;
+	ed->bNrInPins = 1;
+	ed->baSourceID[0] = 2;
+	ed->bControlSize = 1;
+	ed->bmControls[0] = 7;
+	ed->iExtension = 0;
+
 	md = &opts->uvc_color_matching;
 	md->bLength			= UVC_DT_COLOR_MATCHING_SIZE;
 	md->bDescriptorType		= USB_DT_CS_INTERFACE;
@@ -831,7 +860,8 @@ static struct usb_function_instance *uvc_alloc_inst(void)
 	ctl_cls[1] = (struct uvc_descriptor_header *)cd;
 	ctl_cls[2] = (struct uvc_descriptor_header *)pd;
 	ctl_cls[3] = (struct uvc_descriptor_header *)od;
-	ctl_cls[4] = NULL;	/* NULL-terminate */
+	ctl_cls[4] = (struct uvc_descriptor_header *)ed;
+	ctl_cls[5] = NULL;	/* NULL-terminate */
 	opts->fs_control =
 		(const struct uvc_descriptor_header * const *)ctl_cls;
 
@@ -841,7 +871,8 @@ static struct usb_function_instance *uvc_alloc_inst(void)
 	ctl_cls[1] = (struct uvc_descriptor_header *)cd;
 	ctl_cls[2] = (struct uvc_descriptor_header *)pd;
 	ctl_cls[3] = (struct uvc_descriptor_header *)od;
-	ctl_cls[4] = NULL;	/* NULL-terminate */
+	ctl_cls[4] = (struct uvc_descriptor_header *)ed;
+	ctl_cls[5] = NULL;	/* NULL-terminate */
 	opts->ss_control =
 		(const struct uvc_descriptor_header * const *)ctl_cls;
 
diff --git a/drivers/usb/gadget/function/u_uvc.h b/drivers/usb/gadget/function/u_uvc.h
index 4676b60a50636..025c2ae4e1778 100644
--- a/drivers/usb/gadget/function/u_uvc.h
+++ b/drivers/usb/gadget/function/u_uvc.h
@@ -20,6 +20,7 @@
 #include <linux/usb/video.h>
 
 #define fi_to_f_uvc_opts(f)	container_of(f, struct f_uvc_opts, func_inst)
+DECLARE_UVC_EXTENSION_UNIT_DESCRIPTOR(1, 1);
 
 struct f_uvc_opts {
 	struct usb_function_instance			func_inst;
@@ -51,6 +52,7 @@ struct f_uvc_opts {
 	struct uvc_camera_terminal_descriptor		uvc_camera_terminal;
 	struct uvc_processing_unit_descriptor		uvc_processing;
 	struct uvc_output_terminal_descriptor		uvc_output_terminal;
+	struct UVC_EXTENSION_UNIT_DESCRIPTOR(1, 1)	uvc_extension;
 	struct uvc_color_matching_descriptor		uvc_color_matching;
 
 	/*
@@ -60,8 +62,8 @@ struct f_uvc_opts {
 	 * descriptors. Used by configfs only, must not be touched by legacy
 	 * gadgets.
 	 */
-	struct uvc_descriptor_header			*uvc_fs_control_cls[5];
-	struct uvc_descriptor_header			*uvc_ss_control_cls[5];
+	struct uvc_descriptor_header			*uvc_fs_control_cls[6];
+	struct uvc_descriptor_header			*uvc_ss_control_cls[6];
 
 	/*
 	 * Streaming descriptors for full-speed, high-speed and super-speed.

From fefcacc58df19a6d96af7475ac24954b00a94143 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Thu, 6 Sep 2018 10:38:00 +0800
Subject: [PATCH 1258/1852] arm: dts: rk3128h-box: Add
 regulator-early-min-microvolt property to the vdd_arm node

Need to keep the vdd_arm voltage set by the bootloader until all consumer
complete the initialization of the frequency voltage constraint.

The previous kernel was using the property regulator-init-microvolt.
The commit 8726e76f589c ("Revert "regulator: of: Use regulator-init-microvolt as early minimum"")
change it to regulator-early-min-microvolt property.

Change-Id: If86994dd3f6a845efbde6cbadfbd73e3572a544b
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/rk3128h-box.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3128h-box.dtsi b/arch/arm/boot/dts/rk3128h-box.dtsi
index cac444ca027af..44a077469fb2f 100644
--- a/arch/arm/boot/dts/rk3128h-box.dtsi
+++ b/arch/arm/boot/dts/rk3128h-box.dtsi
@@ -208,6 +208,7 @@
 		compatible = "pwm-regulator";
 		rockchip,pwm_id = <1>;
 		regulator-init-microvolt = <1200000>;
+		regulator-early-min-microvolt = <1200000>;
 		pwms = <&pwm1 0 5000 1>;
 		regulator-name = "vdd_arm";
 		regulator-min-microvolt = <950000>;

From 221fe43453f7b3cd4250b3d11770fb7b88cc2c5d Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Thu, 6 Sep 2018 10:15:14 +0800
Subject: [PATCH 1259/1852] arm: dts: rk3128x: Change cpu opp-microvolt max
 voltage to 1.2v

The bootloader voltage is greater than the max voltage set by
opp-microvolt. This resulting in:

[    1.949575] cpu cpu0: scale_rate=1008000000
[    1.949822] vdd_arm: Restricting voltage, 1200000-1175000uV
[    1.949854] vdd_arm: Restricting voltage, 1200000-1175000uV
[    1.949874] cpu cpu0: _set_opp_voltage: failed to set voltage (1000000 1000000 1175000 mV): -22
[    1.949889] cpu cpu0: failed to set volt 1000000

Change-Id: Id9bd6f3c7f4bf8ad2bd8a1a798ea4f8eed6b18b2
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/rk3128x.dtsi | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/rk3128x.dtsi b/arch/arm/boot/dts/rk3128x.dtsi
index 5b32f875b8e3b..c411d69f4fe35 100644
--- a/arch/arm/boot/dts/rk3128x.dtsi
+++ b/arch/arm/boot/dts/rk3128x.dtsi
@@ -90,35 +90,35 @@
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
-			opp-microvolt = <950000 950000 1175000>;
-			opp-microvolt-L0 = <950000 950000 1175000>;
-			opp-microvolt-L1 = <950000 950000 1175000>;
+			opp-microvolt = <950000 950000 1200000>;
+			opp-microvolt-L0 = <950000 950000 1200000>;
+			opp-microvolt-L1 = <950000 950000 1200000>;
 			clock-latency-ns = <40000>;
 			opp-suspend;
 		};
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
-			opp-microvolt = <975000 975000 1175000>;
-			opp-microvolt-L0 = <975000 975000 1175000>;
-			opp-microvolt-L1 = <975000 975000 1175000>;
+			opp-microvolt = <975000 975000 1200000>;
+			opp-microvolt-L0 = <975000 975000 1200000>;
+			opp-microvolt-L1 = <975000 975000 1200000>;
 		};
 		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
-			opp-microvolt = <1000000 1000000 1175000>;
-			opp-microvolt-L0 = <1000000 1000000 1175000>;
-			opp-microvolt-L1 = <1000000 1000000 1175000>;
+			opp-microvolt = <1000000 1000000 1200000>;
+			opp-microvolt-L0 = <1000000 1000000 1200000>;
+			opp-microvolt-L1 = <1000000 1000000 1200000>;
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
-			opp-microvolt = <1175000 1175000 1175000>;
-			opp-microvolt-L0 = <1175000 1175000 1175000>;
-			opp-microvolt-L1 = <1125000 1125000 1175000>;
+			opp-microvolt = <1175000 1175000 1200000>;
+			opp-microvolt-L0 = <1175000 1175000 1200000>;
+			opp-microvolt-L1 = <1125000 1125000 1200000>;
 		};
 		opp-1200000000 {
 			opp-hz = /bits/ 64 <1200000000>;
-			opp-microvolt = <1175000 1175000 1175000>;
-			opp-microvolt-L0 = <1175000 1175000 1175000>;
-			opp-microvolt-L1 = <1125000 1125000 1175000>;
+			opp-microvolt = <1175000 1175000 1200000>;
+			opp-microvolt-L0 = <1175000 1175000 1200000>;
+			opp-microvolt-L1 = <1125000 1125000 1200000>;
 		};
 	};
 

From 563aa6e60a73be7f5c08f39896d4b37fde0d9921 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 6 Sep 2018 11:31:18 +0800
Subject: [PATCH 1260/1852] power: rk816-battery: fix charge current value
 fixed issue

Without this patch, when sample resistor is 20mR, battery charge
current is fixed in 1000mA which is lower than user configure at
the most time.

Change-Id: Idc93f5becfefd55992ea791a65c565feb313b779
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 drivers/power/rk816_battery.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/power/rk816_battery.c b/drivers/power/rk816_battery.c
index 86784def26ed7..7e609dadf9e2b 100644
--- a/drivers/power/rk816_battery.c
+++ b/drivers/power/rk816_battery.c
@@ -2057,12 +2057,12 @@ static void rk816_bat_select_chrg_cv(struct rk816_battery *di)
 	chrg_cur_input = di->pdata->max_input_current;
 	chrg_cur_lp_input = di->pdata->lp_input_current;
 
-	if (!di->over_20mR) {
+	if (di->pdata->sample_res < 20) {
 		if (chrg_cur_sel > 2000)
 			chrg_cur_sel = RES_FAC_DIV(chrg_cur_sel, di->res_fac);
 		else
 			chrg_cur_sel = 1000;
-	} else {
+	} else if (di->pdata->sample_res > 20) {
 		chrg_cur_sel = RES_FAC_MUX(chrg_cur_sel, di->res_fac);
 		if (chrg_cur_sel > 2400)
 			chrg_cur_sel = 2400;
@@ -2611,6 +2611,7 @@ static void rk816_bat_debug_info(struct rk816_battery *di)
 	u8 int_sts1, int_sts2, int_sts3;
 	u8 int_msk1, int_msk2, int_msk3;
 	u8 chrg_ctrl2, chrg_ctrl3, rtc, misc, dcdc_en2;
+	u32 chrg_sel;
 	const char *work_mode[] = {"ZERO", "FINISH", "UN", "UN", "SMOOTH"};
 	const char *bat_mode[] = {"BAT", "VIRTUAL"};
 
@@ -2644,6 +2645,11 @@ static void rk816_bat_debug_info(struct rk816_battery *di)
 	int_msk2 = rk816_bat_read(di, RK816_INT_STS_MSK_REG2);
 	int_msk3 = rk816_bat_read(di, RK816_INT_STS_MSK_REG3);
 	dcdc_en2 = rk816_bat_read(di, RK816_DCDC_EN_REG2);
+	chrg_sel = CHRG_CUR_SEL[chrg_ctrl1 & 0x0f];
+	if (!di->over_20mR)
+		chrg_sel = RES_FAC_MUX(chrg_sel, di->res_fac);
+	else
+		chrg_sel = RES_FAC_DIV(chrg_sel, di->res_fac);
 
 	DBG("\n------- DEBUG REGS, [Ver: %s] -------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, DCDC_EN2=0x%2x\n"
@@ -2674,7 +2680,7 @@ static void rk816_bat_debug_info(struct rk816_battery *di)
 	    di->dsoc, di->rsoc, di->voltage_avg, di->current_avg,
 	    di->remain_cap, di->fcc, di->dsoc - di->rsoc,
 	    di->sm_linek, work_mode[di->work_mode], di->sm_remain_cap,
-	    CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    chrg_sel,
 	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
 	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],
 	    rk816_bat_get_usb_voltage(di),

From 01e78ad89cb3f469b909ae9c80d5cfa50672285f Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 6 Sep 2018 16:16:03 +0800
Subject: [PATCH 1261/1852] mfd: rk808: initial rk816 LDOs write mask bit 1.

RK816 ldo write mask bit is always 1 after setting finished, but
when system start, the write mask bit is 0 even enable bit is 1.

So that rk816 regulator driver '.is_enabled()' returns disabled state
even the ldo is power on when system start, we need to initial write
mask bit as 1.

Change-Id: I8b5b83f33d668e4bdd1f96d77208931d25b8f6d9
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 drivers/mfd/rk808.c       | 3 +++
 include/linux/mfd/rk808.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index 6b8059ca2533f..7bd5997742383 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -433,6 +433,9 @@ static const struct rk808_reg_data rk816_pre_init_reg[] = {
 	{ RK816_INT_STS_REG2, REG_WRITE_MSK, ALL_INT_FLAGS_ST },
 	{ RK816_INT_STS_REG3, REG_WRITE_MSK, ALL_INT_FLAGS_ST },
 	{ RK816_DCDC_EN_REG2, BOOST_EN_MASK, BOOST_DISABLE },
+	/* set write mask bit 1, otherwise 'is_enabled()' get wrong status */
+	{ RK816_LDO_EN_REG1, REGS_WMSK, REGS_WMSK },
+	{ RK816_LDO_EN_REG2, REGS_WMSK, REGS_WMSK },
 };
 
 static struct rk808_reg_data rk816_suspend_reg[] = {
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index f7d9e98a7141e..10f0ce092ea0a 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -776,6 +776,7 @@ enum rk805_reg {
 #define PWM_MODE_MSK			BIT(7)
 #define FPWM_MODE			BIT(7)
 #define AUTO_PWM_MODE			0
+#define REGS_WMSK			0xf0
 
 enum rk817_reg_id {
 	RK817_ID_DCDC1 = 0,

From 70dad48a1f7b047901a76071f675aacda136b397 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 6 Sep 2018 10:44:00 +0800
Subject: [PATCH 1262/1852] arm: dts: rk3308-dot-rk816-v10-aarch32: update
 battery information

The board battery is attached, so update battery hardware info.

Change-Id: Ife9630c61c712d21ff4461cb53175833b3d4c779
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
index e3a3447d7b99a..7f9ea8f041098 100644
--- a/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
+++ b/arch/arm/boot/dts/rk3308-dot-rk816-v10-aarch32.dts
@@ -212,11 +212,11 @@
 			ocv_table = <3400 3625 3685 3697 3718 3735 3748
 				     3760 3774 3788 3802 3816 3834 3853
 				     3877 3908 3946 3975 4018 4071 4106>;
-			design_capacity = <5000>;
-			design_qmax = <5200>;
-			bat_res = <100>;
+			design_capacity = <2750>;
+			design_qmax = <3000>;
+			bat_res = <110>;
 			max_input_current = <2000>;
-			max_chrg_current = <1300>;
+			max_chrg_current = <1800>;
 			max_chrg_voltage = <4200>;
 			sleep_enter_current = <300>;
 			sleep_exit_current = <300>;
@@ -225,7 +225,7 @@
 			zero_algorithm_vol = <3850>;
 			max_soc_offset = <80>;
 			monitor_sec = <5>;
-			virtual_power = <1>;
+			virtual_power = <0>;
 			power_dc2otg = <0>;
 			dc_det_adc = <0>;
 		};

From 10e2e1a34319eb8e781524957e00736ae8a853b3 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Mon, 27 Aug 2018 11:49:42 +0800
Subject: [PATCH 1263/1852] drm/rockchip: 3288 vop: fix lose frame start
 interrupt

rk3288 bcsh and auto gating can't be used at same time.
this will lead to vop lose frame start and lead to fence
time out.

Change-Id: I1957d24fab7295b2c73e092d63d9f323cd1127df
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 430dd96570dba..df4e37f0c1056 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -3309,6 +3309,8 @@ static void vop_tv_config_update(struct drm_crtc *crtc,
 	VOP_CTRL_SET(vop, bcsh_sin_hue, sin_hue);
 	VOP_CTRL_SET(vop, bcsh_cos_hue, cos_hue);
 	VOP_CTRL_SET(vop, bcsh_out_mode, BCSH_OUT_MODE_NORMAL_VIDEO);
+	if (VOP_MAJOR(vop->version) == 3 && VOP_MINOR(vop->version) == 0)
+		VOP_CTRL_SET(vop, auto_gate_en, 0);
 	VOP_CTRL_SET(vop, bcsh_en, s->bcsh_en);
 }
 

From 3cb63be14d9be2bf7100b7760070224b2e465344 Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Thu, 6 Sep 2018 18:33:30 +0800
Subject: [PATCH 1264/1852] net: wireless: rockchip_wlan: ssv6051 add
 change_interface ops

Change-Id: Ifac667de307f2867c2b3a03949484be2d25722c0
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 .../wireless/rockchip_wlan/ssv6xxx/smac/dev.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
index 3341c8bf08730..1b0d5707be34c 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/smac/dev.c
@@ -3412,6 +3412,24 @@ static void ssv6200_remove_interface(struct ieee80211_hw *hw,
     sc->nvif--;
     mutex_unlock(&sc->mutex);
 }
+static int ssv6200_change_interface(struct ieee80211_hw *dev,
+                            struct ieee80211_vif *vif,
+                            enum nl80211_iftype new_type,
+                            bool p2p)
+{
+        int ret = 0;
+        printk("change_interface new: %d (%d), old: %d (%d)\n", new_type,
+                 p2p, vif->type, vif->p2p);
+
+        if (new_type != vif->type || vif->p2p != p2p) {
+                ssv6200_remove_interface(dev, vif);
+                vif->type = new_type;
+                vif->p2p = p2p;
+                ret = ssv6200_add_interface(dev, vif);
+        }
+
+        return ret;
+}
 void ssv6xxx_ps_callback_func(unsigned long data)
 {
     struct ssv_softc *sc = (struct ssv_softc *)data;
@@ -4437,6 +4455,7 @@ struct ieee80211_ops ssv6200_ops =
     .stop = ssv6200_stop,
     .add_interface = ssv6200_add_interface,
     .remove_interface = ssv6200_remove_interface,
+    .change_interface = ssv6200_change_interface,
     .config = ssv6200_config,
     .configure_filter = ssv6200_config_filter,
     .bss_info_changed = ssv6200_bss_info_changed,

From 3332782bf9c43db411af8aac95260d7888a28166 Mon Sep 17 00:00:00 2001
From: Lan Tianyu <tianyu.lan@intel.com>
Date: Thu, 21 Dec 2017 21:10:36 -0500
Subject: [PATCH 1265/1852] KVM/Eventfd: Avoid crash when assign and deassign
 specific eventfd in parallel.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit b5020a8e6b54d2ece80b1e7dedb33c79a40ebd47 upstream.

Syzbot reports crashes in kvm_irqfd_assign(), caused by use-after-free
when kvm_irqfd_assign() and kvm_irqfd_deassign() run in parallel
for one specific eventfd. When the assign path hasn't finished but irqfd
has been added to kvm->irqfds.items list, another thead may deassign the
eventfd and free struct kvm_kernel_irqfd(). The assign path then uses
the struct kvm_kernel_irqfd that has been freed by deassign path. To avoid
such issue, keep irqfd under kvm->irq_srcu protection after the irqfd
has been added to kvm->irqfds.items list, and call synchronize_srcu()
in irq_shutdown() to make sure that irqfd has been fully initialized in
the assign path.

Reported-by: Dmitry Vyukov <dvyukov@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Kr�mář <rkrcmar@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Signed-off-by: Tianyu Lan <tianyu.lan@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 virt/kvm/eventfd.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/virt/kvm/eventfd.c b/virt/kvm/eventfd.c
index 49001fa84ead8..1203829316b25 100644
--- a/virt/kvm/eventfd.c
+++ b/virt/kvm/eventfd.c
@@ -119,8 +119,12 @@ irqfd_shutdown(struct work_struct *work)
 {
 	struct kvm_kernel_irqfd *irqfd =
 		container_of(work, struct kvm_kernel_irqfd, shutdown);
+	struct kvm *kvm = irqfd->kvm;
 	u64 cnt;
 
+	/* Make sure irqfd has been initalized in assign path. */
+	synchronize_srcu(&kvm->irq_srcu);
+
 	/*
 	 * Synchronize with the wait-queue and unhook ourselves to prevent
 	 * further events.
@@ -387,7 +391,6 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
 
 	idx = srcu_read_lock(&kvm->irq_srcu);
 	irqfd_update(kvm, irqfd);
-	srcu_read_unlock(&kvm->irq_srcu, idx);
 
 	list_add_tail(&irqfd->list, &kvm->irqfds.items);
 
@@ -419,6 +422,7 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
 				irqfd->consumer.token, ret);
 #endif
 
+	srcu_read_unlock(&kvm->irq_srcu, idx);
 	return 0;
 
 fail:

From 0ea475fa337a862b787744bb02abf75b54d34eae Mon Sep 17 00:00:00 2001
From: Dewet Thibaut <thibaut.dewet@nokia.com>
Date: Mon, 16 Jul 2018 10:49:27 +0200
Subject: [PATCH 1266/1852] x86/MCE: Remove min interval polling limitation

commit fbdb328c6bae0a7c78d75734a738b66b86dffc96 upstream.

commit b3b7c4795c ("x86/MCE: Serialize sysfs changes") introduced a min
interval limitation when setting the check interval for polled MCEs.
However, the logic is that 0 disables polling for corrected MCEs, see
Documentation/x86/x86_64/machinecheck. The limitation prevents disabling.

Remove this limitation and allow the value 0 to disable polling again.

Fixes: b3b7c4795c ("x86/MCE: Serialize sysfs changes")
Signed-off-by: Dewet Thibaut <thibaut.dewet@nokia.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
[ Massage commit message. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20180716084927.24869-1-alexander.sverdlin@nokia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index ddc9b81259181..7b8c8c8381910 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -2294,9 +2294,6 @@ static ssize_t store_int_with_restart(struct device *s,
 	if (check_interval == old_check_interval)
 		return ret;
 
-	if (check_interval < 1)
-		check_interval = 1;
-
 	mutex_lock(&mce_sysfs_mutex);
 	mce_restart();
 	mutex_unlock(&mce_sysfs_mutex);

From 529bc096387ec1a157b4877028256f6cd3238b9d Mon Sep 17 00:00:00 2001
From: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
Date: Fri, 20 Jul 2018 17:53:42 -0700
Subject: [PATCH 1267/1852] fat: fix memory allocation failure handling of
 match_strdup()

commit 35033ab988c396ad7bce3b6d24060c16a9066db8 upstream.

In parse_options(), if match_strdup() failed, parse_options() leaves
opts->iocharset in unexpected state (i.e.  still pointing the freed
string).  And this can be the cause of double free.

To fix, this initialize opts->iocharset always when freeing.

Link: http://lkml.kernel.org/r/8736wp9dzc.fsf@mail.parknet.co.jp
Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
Reported-by: syzbot+90b8e10515ae88228a92@syzkaller.appspotmail.com
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fat/inode.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/fs/fat/inode.c b/fs/fat/inode.c
index cf644d52c0cf2..c81cfb79a3393 100644
--- a/fs/fat/inode.c
+++ b/fs/fat/inode.c
@@ -613,13 +613,21 @@ static void fat_set_state(struct super_block *sb,
 	brelse(bh);
 }
 
+static void fat_reset_iocharset(struct fat_mount_options *opts)
+{
+	if (opts->iocharset != fat_default_iocharset) {
+		/* Note: opts->iocharset can be NULL here */
+		kfree(opts->iocharset);
+		opts->iocharset = fat_default_iocharset;
+	}
+}
+
 static void delayed_free(struct rcu_head *p)
 {
 	struct msdos_sb_info *sbi = container_of(p, struct msdos_sb_info, rcu);
 	unload_nls(sbi->nls_disk);
 	unload_nls(sbi->nls_io);
-	if (sbi->options.iocharset != fat_default_iocharset)
-		kfree(sbi->options.iocharset);
+	fat_reset_iocharset(&sbi->options);
 	kfree(sbi);
 }
 
@@ -1034,7 +1042,7 @@ static int parse_options(struct super_block *sb, char *options, int is_vfat,
 	opts->fs_fmask = opts->fs_dmask = current_umask();
 	opts->allow_utime = -1;
 	opts->codepage = fat_default_codepage;
-	opts->iocharset = fat_default_iocharset;
+	fat_reset_iocharset(opts);
 	if (is_vfat) {
 		opts->shortname = VFAT_SFN_DISPLAY_WINNT|VFAT_SFN_CREATE_WIN95;
 		opts->rodir = 0;
@@ -1184,8 +1192,7 @@ static int parse_options(struct super_block *sb, char *options, int is_vfat,
 
 		/* vfat specific */
 		case Opt_charset:
-			if (opts->iocharset != fat_default_iocharset)
-				kfree(opts->iocharset);
+			fat_reset_iocharset(opts);
 			iocharset = match_strdup(&args[0]);
 			if (!iocharset)
 				return -ENOMEM;
@@ -1776,8 +1783,7 @@ int fat_fill_super(struct super_block *sb, void *data, int silent, int isvfat,
 		iput(fat_inode);
 	unload_nls(sbi->nls_io);
 	unload_nls(sbi->nls_disk);
-	if (sbi->options.iocharset != fat_default_iocharset)
-		kfree(sbi->options.iocharset);
+	fat_reset_iocharset(&sbi->options);
 	sb->s_fs_info = NULL;
 	kfree(sbi);
 	return error;

From b6198ee0a01b18afd172be6e3d457a89d45eebe7 Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Tue, 17 Jul 2018 17:26:43 +0200
Subject: [PATCH 1268/1852] ALSA: rawmidi: Change resized buffers atomically

commit 39675f7a7c7e7702f7d5341f1e0d01db746543a0 upstream.

The SNDRV_RAWMIDI_IOCTL_PARAMS ioctl may resize the buffers and the
current code is racy.  For example, the sequencer client may write to
buffer while it being resized.

As a simple workaround, let's switch to the resized buffer inside the
stream runtime lock.

Reported-by: syzbot+52f83f0ea8df16932f7f@syzkaller.appspotmail.com
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/rawmidi.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/sound/core/rawmidi.c b/sound/core/rawmidi.c
index 16f8124b11500..59111cadaec2c 100644
--- a/sound/core/rawmidi.c
+++ b/sound/core/rawmidi.c
@@ -635,7 +635,7 @@ static int snd_rawmidi_info_select_user(struct snd_card *card,
 int snd_rawmidi_output_params(struct snd_rawmidi_substream *substream,
 			      struct snd_rawmidi_params * params)
 {
-	char *newbuf;
+	char *newbuf, *oldbuf;
 	struct snd_rawmidi_runtime *runtime = substream->runtime;
 	
 	if (substream->append && substream->use_count > 1)
@@ -648,13 +648,17 @@ int snd_rawmidi_output_params(struct snd_rawmidi_substream *substream,
 		return -EINVAL;
 	}
 	if (params->buffer_size != runtime->buffer_size) {
-		newbuf = krealloc(runtime->buffer, params->buffer_size,
-				  GFP_KERNEL);
+		newbuf = kmalloc(params->buffer_size, GFP_KERNEL);
 		if (!newbuf)
 			return -ENOMEM;
+		spin_lock_irq(&runtime->lock);
+		oldbuf = runtime->buffer;
 		runtime->buffer = newbuf;
 		runtime->buffer_size = params->buffer_size;
 		runtime->avail = runtime->buffer_size;
+		runtime->appl_ptr = runtime->hw_ptr = 0;
+		spin_unlock_irq(&runtime->lock);
+		kfree(oldbuf);
 	}
 	runtime->avail_min = params->avail_min;
 	substream->active_sensing = !params->no_active_sensing;
@@ -665,7 +669,7 @@ EXPORT_SYMBOL(snd_rawmidi_output_params);
 int snd_rawmidi_input_params(struct snd_rawmidi_substream *substream,
 			     struct snd_rawmidi_params * params)
 {
-	char *newbuf;
+	char *newbuf, *oldbuf;
 	struct snd_rawmidi_runtime *runtime = substream->runtime;
 
 	snd_rawmidi_drain_input(substream);
@@ -676,12 +680,16 @@ int snd_rawmidi_input_params(struct snd_rawmidi_substream *substream,
 		return -EINVAL;
 	}
 	if (params->buffer_size != runtime->buffer_size) {
-		newbuf = krealloc(runtime->buffer, params->buffer_size,
-				  GFP_KERNEL);
+		newbuf = kmalloc(params->buffer_size, GFP_KERNEL);
 		if (!newbuf)
 			return -ENOMEM;
+		spin_lock_irq(&runtime->lock);
+		oldbuf = runtime->buffer;
 		runtime->buffer = newbuf;
 		runtime->buffer_size = params->buffer_size;
+		runtime->appl_ptr = runtime->hw_ptr = 0;
+		spin_unlock_irq(&runtime->lock);
+		kfree(oldbuf);
 	}
 	runtime->avail_min = params->avail_min;
 	return 0;

From 822c44983d9d259a747eb04c427979a5e1d87b48 Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <abrodkin@synopsys.com>
Date: Thu, 28 Jun 2018 16:59:14 -0700
Subject: [PATCH 1269/1852] ARC: Fix CONFIG_SWAP

commit 6e3761145a9ba3ce267c330b6bff51cf6a057b06 upstream.

swap was broken on ARC due to silly copy-paste issue.

We encode offset from swapcache page in __swp_entry() as (off << 13) but
were not decoding back in __swp_offset() as (off >> 13) - it was still
(off << 13).

This finally fixes swap usage on ARC.

| # mkswap /dev/sda2
|
| # swapon -a -e /dev/sda2
| Adding 500728k swap on /dev/sda2.  Priority:-2 extents:1 across:500728k
|
| # free
|              total       used       free     shared    buffers     cached
| Mem:        765104      13456     751648       4736          8       4736
| -/+ buffers/cache:       8712     756392
| Swap:       500728          0     500728

Cc: stable@vger.kernel.org
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/include/asm/pgtable.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index e5fec320f158e..c07d7b0a40580 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -372,7 +372,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
 
 /* Decode a PTE containing swap "identifier "into constituents */
 #define __swp_type(pte_lookalike)	(((pte_lookalike).val) & 0x1f)
-#define __swp_offset(pte_lookalike)	((pte_lookalike).val << 13)
+#define __swp_offset(pte_lookalike)	((pte_lookalike).val >> 13)
 
 /* NOPs, to keep generic kernel happy */
 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })

From 4da4fcbc1e71f804748452da4dfc3215f7d89186 Mon Sep 17 00:00:00 2001
From: Vineet Gupta <vgupta@synopsys.com>
Date: Wed, 11 Jul 2018 10:42:20 -0700
Subject: [PATCH 1270/1852] ARC: mm: allow mprotect to make stack mappings
 executable

commit 93312b6da4df31e4102ce5420e6217135a16c7ea upstream.

mprotect(EXEC) was failing for stack mappings as default vm flags was
missing MAYEXEC.

This was triggered by glibc test suite nptl/tst-execstack testcase

What is surprising is that despite running LTP for years on, we didn't
catch this issue as it lacks a directed test case.

gcc dejagnu tests with nested functions also requiring exec stack work
fine though because they rely on the GNU_STACK segment spit out by
compiler and handled in kernel elf loader.

This glibc case is different as the stack is non exec to begin with and
a dlopen of shared lib with GNU_STACK segment triggers the exec stack
proceedings using a mprotect(PROT_EXEC) which was broken.

CC: stable@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/include/asm/page.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
index 429957f1c2365..8f1145ed0046f 100644
--- a/arch/arc/include/asm/page.h
+++ b/arch/arc/include/asm/page.h
@@ -102,7 +102,7 @@ typedef pte_t * pgtable_t;
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
 /* Default Permissions for stack/heaps pages (Non Executable) */
-#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE)
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #define WANT_PAGE_VIRTUAL   1
 

From ca93346eb5ba0e6fd3b4ddf0ed39f31f0d5267a3 Mon Sep 17 00:00:00 2001
From: Jing Xia <jing.xia.mail@gmail.com>
Date: Fri, 20 Jul 2018 17:53:48 -0700
Subject: [PATCH 1271/1852] mm: memcg: fix use after free in mem_cgroup_iter()

commit 9f15bde671355c351cf20d9f879004b234353100 upstream.

It was reported that a kernel crash happened in mem_cgroup_iter(), which
can be triggered if the legacy cgroup-v1 non-hierarchical mode is used.

Unable to handle kernel paging request at virtual address 6b6b6b6b6b6b8f
......
Call trace:
  mem_cgroup_iter+0x2e0/0x6d4
  shrink_zone+0x8c/0x324
  balance_pgdat+0x450/0x640
  kswapd+0x130/0x4b8
  kthread+0xe8/0xfc
  ret_from_fork+0x10/0x20

  mem_cgroup_iter():
      ......
      if (css_tryget(css))    <-- crash here
	    break;
      ......

The crashing reason is that mem_cgroup_iter() uses the memcg object whose
pointer is stored in iter->position, which has been freed before and
filled with POISON_FREE(0x6b).

And the root cause of the use-after-free issue is that
invalidate_reclaim_iterators() fails to reset the value of iter->position
to NULL when the css of the memcg is released in non- hierarchical mode.

Link: http://lkml.kernel.org/r/1531994807-25639-1-git-send-email-jing.xia@unisoc.com
Fixes: 6df38689e0e9 ("mm: memcontrol: fix possible memcg leak due to interrupted reclaim")
Signed-off-by: Jing Xia <jing.xia.mail@gmail.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Vladimir Davydov <vdavydov.dev@gmail.com>
Cc: <chunyan.zhang@unisoc.com>
Cc: Shakeel Butt <shakeelb@google.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/memcontrol.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 55a9facb8e8dd..9a8e688724b19 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -996,7 +996,7 @@ static void invalidate_reclaim_iterators(struct mem_cgroup *dead_memcg)
 	int nid, zid;
 	int i;
 
-	while ((memcg = parent_mem_cgroup(memcg))) {
+	for (; memcg; memcg = parent_mem_cgroup(memcg)) {
 		for_each_node(nid) {
 			for (zid = 0; zid < MAX_NR_ZONES; zid++) {
 				mz = &memcg->nodeinfo[nid]->zoneinfo[zid];

From 9c9b5716616c0b2b1767225de02dd9667f58aaba Mon Sep 17 00:00:00 2001
From: Tyler Hicks <tyhicks@canonical.com>
Date: Thu, 5 Jul 2018 18:49:23 +0000
Subject: [PATCH 1272/1852] ipv4: Return EINVAL when ping_group_range sysctl
 doesn't map to user ns

[ Upstream commit 70ba5b6db96ff7324b8cfc87e0d0383cf59c9677 ]

The low and high values of the net.ipv4.ping_group_range sysctl were
being silently forced to the default disabled state when a write to the
sysctl contained GIDs that didn't map to the associated user namespace.
Confusingly, the sysctl's write operation would return success and then
a subsequent read of the sysctl would indicate that the low and high
values are the overflowgid.

This patch changes the behavior by clearly returning an error when the
sysctl write operation receives a GID range that doesn't map to the
associated user namespace. In such a situation, the previous value of
the sysctl is preserved and that range will be returned in a subsequent
read of the sysctl.

Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/sysctl_net_ipv4.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/sysctl_net_ipv4.c b/net/ipv4/sysctl_net_ipv4.c
index a7fde12784d39..11d61bb3f4bac 100644
--- a/net/ipv4/sysctl_net_ipv4.c
+++ b/net/ipv4/sysctl_net_ipv4.c
@@ -141,8 +141,9 @@ static int ipv4_ping_group_range(struct ctl_table *table, int write,
 	if (write && ret == 0) {
 		low = make_kgid(user_ns, urange[0]);
 		high = make_kgid(user_ns, urange[1]);
-		if (!gid_valid(low) || !gid_valid(high) ||
-		    (urange[1] < urange[0]) || gid_lt(high, low)) {
+		if (!gid_valid(low) || !gid_valid(high))
+			return -EINVAL;
+		if (urange[1] < urange[0] || gid_lt(high, low)) {
 			low = make_kgid(&init_user_ns, 1);
 			high = make_kgid(&init_user_ns, 0);
 		}

From f9cae59104aca86655c7031ed3aa987d016de7fb Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Tue, 17 Jul 2018 17:12:39 +0100
Subject: [PATCH 1273/1852] ipv6: fix useless rol32 call on hash

[ Upstream commit 169dc027fb02492ea37a0575db6a658cf922b854 ]

The rol32 call is currently rotating hash but the rol'd value is
being discarded. I believe the current code is incorrect and hash
should be assigned the rotated value returned from rol32.

Thanks to David Lebrun for spotting this.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/ipv6.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 84f0d06024333..0e01d570fa22c 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -762,7 +762,7 @@ static inline __be32 ip6_make_flowlabel(struct net *net, struct sk_buff *skb,
 	 * to minimize possbility that any useful information to an
 	 * attacker is leaked. Only lower 20 bits are relevant.
 	 */
-	rol32(hash, 16);
+	hash = rol32(hash, 16);
 
 	flowlabel = (__force __be32)hash & IPV6_FLOWLABEL_MASK;
 

From 9f6b8cb80e7ad80b91bd38b698317c2a7f55cfae Mon Sep 17 00:00:00 2001
From: Davidlohr Bueso <dave@stgolabs.net>
Date: Mon, 16 Jul 2018 13:26:13 -0700
Subject: [PATCH 1274/1852] lib/rhashtable: consider param->min_size when
 setting initial table size

[ Upstream commit 107d01f5ba10f4162c38109496607eb197059064 ]

rhashtable_init() currently does not take into account the user-passed
min_size parameter unless param->nelem_hint is set as well. As such,
the default size (number of buckets) will always be HASH_DEFAULT_SIZE
even if the smallest allowed size is larger than that. Remediate this
by unconditionally calling into rounded_hashtable_size() and handling
things accordingly.

Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 lib/rhashtable.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/lib/rhashtable.c b/lib/rhashtable.c
index 51282f5797606..37ea94b636a35 100644
--- a/lib/rhashtable.c
+++ b/lib/rhashtable.c
@@ -670,8 +670,16 @@ EXPORT_SYMBOL_GPL(rhashtable_walk_stop);
 
 static size_t rounded_hashtable_size(const struct rhashtable_params *params)
 {
-	return max(roundup_pow_of_two(params->nelem_hint * 4 / 3),
-		   (unsigned long)params->min_size);
+	size_t retsize;
+
+	if (params->nelem_hint)
+		retsize = max(roundup_pow_of_two(params->nelem_hint * 4 / 3),
+			      (unsigned long)params->min_size);
+	else
+		retsize = max(HASH_DEFAULT_SIZE,
+			      (unsigned long)params->min_size);
+
+	return retsize;
 }
 
 static u32 rhashtable_jhash2(const void *key, u32 length, u32 seed)
@@ -728,8 +736,6 @@ int rhashtable_init(struct rhashtable *ht,
 	struct bucket_table *tbl;
 	size_t size;
 
-	size = HASH_DEFAULT_SIZE;
-
 	if ((!params->key_len && !params->obj_hashfn) ||
 	    (params->obj_hashfn && !params->obj_cmpfn))
 		return -EINVAL;
@@ -756,8 +762,7 @@ int rhashtable_init(struct rhashtable *ht,
 
 	ht->p.min_size = max(ht->p.min_size, HASH_MIN_SIZE);
 
-	if (params->nelem_hint)
-		size = rounded_hashtable_size(&ht->p);
+	size = rounded_hashtable_size(&ht->p);
 
 	/* The maximum (not average) chain length grows with the
 	 * size of the hash table, at a rate of (log N)/(log log N).

From d7b242a3c4fbf5c10fbf64fe96ad35cafb128902 Mon Sep 17 00:00:00 2001
From: David Ahern <dsahern@gmail.com>
Date: Sat, 7 Jul 2018 16:15:26 -0700
Subject: [PATCH 1275/1852] net/ipv4: Set oif in fib_compute_spec_dst

[ Upstream commit e7372197e15856ec4ee66b668020a662994db103 ]

Xin reported that icmp replies may not use the address on the device the
echo request is received if the destination address is broadcast. Instead
a route lookup is done without considering VRF context. Fix by setting
oif in flow struct to the master device if it is enslaved. That directs
the lookup to the VRF table. If the device is not enslaved, oif is still
0 so no affect.

Fixes: cd2fbe1b6b51 ("net: Use VRF device index for lookups on RX")
Reported-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David Ahern <dsahern@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/fib_frontend.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c
index 7dc9f0680bf6c..65a2adfa451f0 100644
--- a/net/ipv4/fib_frontend.c
+++ b/net/ipv4/fib_frontend.c
@@ -297,6 +297,7 @@ __be32 fib_compute_spec_dst(struct sk_buff *skb)
 	if (!ipv4_is_zeronet(ip_hdr(skb)->saddr)) {
 		struct flowi4 fl4 = {
 			.flowi4_iif = LOOPBACK_IFINDEX,
+			.flowi4_oif = l3mdev_master_ifindex_rcu(dev),
 			.daddr = ip_hdr(skb)->saddr,
 			.flowi4_tos = RT_TOS(ip_hdr(skb)->tos),
 			.flowi4_scope = scope,

From 97fd1155ab9c22fc85df5b4116a24098ec2745d9 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Tue, 3 Jul 2018 22:34:54 +0200
Subject: [PATCH 1276/1852] net: phy: fix flag masking in __set_phy_supported

[ Upstream commit df8ed346d4a806a6eef2db5924285e839604b3f9 ]

Currently also the pause flags are removed from phydev->supported because
they're not included in PHY_DEFAULT_FEATURES. I don't think this is
intended, especially when considering that this function can be called
via phy_set_max_speed() anywhere in a driver. Change the masking to mask
out only the values we're going to change. In addition remove the
misleading comment, job of this small function is just to adjust the
supported and advertised speeds.

Fixes: f3a6bd393c2c ("phylib: Add phy_set_max_speed helper")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/phy/phy_device.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 8179727d3423e..1f2f25a71d185 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1265,11 +1265,8 @@ static int gen10g_resume(struct phy_device *phydev)
 
 static int __set_phy_supported(struct phy_device *phydev, u32 max_speed)
 {
-	/* The default values for phydev->supported are provided by the PHY
-	 * driver "features" member, we want to reset to sane defaults first
-	 * before supporting higher speeds.
-	 */
-	phydev->supported &= PHY_DEFAULT_FEATURES;
+	phydev->supported &= ~(PHY_1000BT_FEATURES | PHY_100BT_FEATURES |
+			       PHY_10BT_FEATURES);
 
 	switch (max_speed) {
 	default:

From dc5aaf896b7be53266611b79ead093446577be15 Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Tue, 17 Jul 2018 20:17:33 -0500
Subject: [PATCH 1277/1852] ptp: fix missing break in switch

[ Upstream commit 9ba8376ce1e2cbf4ce44f7e4bee1d0648e10d594 ]

It seems that a *break* is missing in order to avoid falling through
to the default case. Otherwise, checking *chan* makes no sense.

Fixes: 72df7a7244c0 ("ptp: Allow reassigning calibration pin function")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ptp/ptp_chardev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ptp/ptp_chardev.c b/drivers/ptp/ptp_chardev.c
index da7bae9915523..d877ff1243652 100644
--- a/drivers/ptp/ptp_chardev.c
+++ b/drivers/ptp/ptp_chardev.c
@@ -88,6 +88,7 @@ int ptp_set_pinfunc(struct ptp_clock *ptp, unsigned int pin,
 	case PTP_PF_PHYSYNC:
 		if (chan != 0)
 			return -EINVAL;
+		break;
 	default:
 		return -EINVAL;
 	}

From 23052062e25a5f23bd1125f460a1ee5774da359d Mon Sep 17 00:00:00 2001
From: Sanjeev Bansal <sanjeevb.bansal@broadcom.com>
Date: Mon, 16 Jul 2018 11:13:32 +0530
Subject: [PATCH 1278/1852] tg3: Add higher cpu clock for 5762.

[ Upstream commit 3a498606bb04af603a46ebde8296040b2de350d1 ]

This patch has fix for TX timeout while running bi-directional
traffic with 100 Mbps using 5762.

Signed-off-by: Sanjeev Bansal <sanjeevb.bansal@broadcom.com>
Signed-off-by: Siva Reddy Kallam <siva.kallam@broadcom.com>
Reviewed-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/tg3.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 1325825d52252..ce3a56bea6e69 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -9278,6 +9278,15 @@ static int tg3_chip_reset(struct tg3 *tp)
 
 	tg3_restore_clk(tp);
 
+	/* Increase the core clock speed to fix tx timeout issue for 5762
+	 * with 100Mbps link speed.
+	 */
+	if (tg3_asic_rev(tp) == ASIC_REV_5762) {
+		val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE);
+		tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val |
+		     TG3_CPMU_MAC_ORIDE_ENABLE);
+	}
+
 	/* Reprobe ASF enable state.  */
 	tg3_flag_clear(tp, ENABLE_ASF);
 	tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK |

From e0d201589008e199411ac6b88808febe5cf6d503 Mon Sep 17 00:00:00 2001
From: Stefano Brivio <sbrivio@redhat.com>
Date: Wed, 11 Jul 2018 14:39:42 +0200
Subject: [PATCH 1279/1852] net: Don't copy pfmemalloc flag in
 __copy_skb_header()

[ Upstream commit 8b7008620b8452728cadead460a36f64ed78c460 ]

The pfmemalloc flag indicates that the skb was allocated from
the PFMEMALLOC reserves, and the flag is currently copied on skb
copy and clone.

However, an skb copied from an skb flagged with pfmemalloc
wasn't necessarily allocated from PFMEMALLOC reserves, and on
the other hand an skb allocated that way might be copied from an
skb that wasn't.

So we should not copy the flag on skb copy, and rather decide
whether to allow an skb to be associated with sockets unrelated
to page reclaim depending only on how it was allocated.

Move the pfmemalloc flag before headers_start[0] using an
existing 1-bit hole, so that __copy_skb_header() doesn't copy
it.

When cloning, we'll now take care of this flag explicitly,
contravening to the warning comment of __skb_clone().

While at it, restore the newline usage introduced by commit
b19372273164 ("net: reorganize sk_buff for faster
__copy_skb_header()") to visually separate bytes used in
bitfields after headers_start[0], that was gone after commit
a9e419dc7be6 ("netfilter: merge ctinfo into nfct pointer storage
area"), and describe the pfmemalloc flag in the kernel-doc
structure comment.

This doesn't change the size of sk_buff or cacheline boundaries,
but consolidates the 15 bits hole before tc_index into a 2 bytes
hole before csum, that could now be filled more easily.

Reported-by: Patrick Talbert <ptalbert@redhat.com>
Fixes: c93bdd0e03e8 ("netvm: allow skb allocation to use PFMEMALLOC reserves")
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/skbuff.h | 12 ++++++------
 net/core/skbuff.c      |  2 ++
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index a6da214d0584c..c28bd8be290a2 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -514,6 +514,7 @@ static inline bool skb_mstamp_after(const struct skb_mstamp *t1,
  *	@hash: the packet hash
  *	@queue_mapping: Queue mapping for multiqueue devices
  *	@xmit_more: More SKBs are pending for this queue
+ *	@pfmemalloc: skbuff was allocated from PFMEMALLOC reserves
  *	@ndisc_nodetype: router type (from link layer)
  *	@ooo_okay: allow the mapping of a socket to a queue to be changed
  *	@l4_hash: indicate hash is a canonical 4-tuple hash over transport
@@ -594,8 +595,8 @@ struct sk_buff {
 				fclone:2,
 				peeked:1,
 				head_frag:1,
-				xmit_more:1;
-	/* one bit hole */
+				xmit_more:1,
+				pfmemalloc:1;
 	kmemcheck_bitfield_end(flags1);
 
 	/* fields enclosed in headers_start/headers_end are copied
@@ -615,19 +616,18 @@ struct sk_buff {
 
 	__u8			__pkt_type_offset[0];
 	__u8			pkt_type:3;
-	__u8			pfmemalloc:1;
 	__u8			ignore_df:1;
 	__u8			nfctinfo:3;
-
 	__u8			nf_trace:1;
+
 	__u8			ip_summed:2;
 	__u8			ooo_okay:1;
 	__u8			l4_hash:1;
 	__u8			sw_hash:1;
 	__u8			wifi_acked_valid:1;
 	__u8			wifi_acked:1;
-
 	__u8			no_fcs:1;
+
 	/* Indicates the inner headers are valid in the skbuff. */
 	__u8			encapsulation:1;
 	__u8			encap_hdr_csum:1;
@@ -635,11 +635,11 @@ struct sk_buff {
 	__u8			csum_complete_sw:1;
 	__u8			csum_level:2;
 	__u8			csum_bad:1;
-
 #ifdef CONFIG_IPV6_NDISC_NODETYPE
 	__u8			ndisc_nodetype:2;
 #endif
 	__u8			ipvs_property:1;
+
 	__u8			inner_protocol_type:1;
 	__u8			remcsum_offload:1;
 	/* 3 or 5 bit hole */
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index fa02c680eebc0..60ad04039d2a0 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -828,6 +828,8 @@ static struct sk_buff *__skb_clone(struct sk_buff *n, struct sk_buff *skb)
 	n->cloned = 1;
 	n->nohdr = 0;
 	n->peeked = 0;
+	if (skb->pfmemalloc)
+		n->pfmemalloc = 1;
 	n->destructor = NULL;
 	C(tail);
 	C(end);

From 479e8f224b9409dade68125b966d90bbfd811215 Mon Sep 17 00:00:00 2001
From: Stefano Brivio <sbrivio@redhat.com>
Date: Fri, 13 Jul 2018 13:21:07 +0200
Subject: [PATCH 1280/1852] skbuff: Unconditionally copy pfmemalloc in
 __skb_clone()

[ Upstream commit e78bfb0751d4e312699106ba7efbed2bab1a53ca ]

Commit 8b7008620b84 ("net: Don't copy pfmemalloc flag in
__copy_skb_header()") introduced a different handling for the
pfmemalloc flag in copy and clone paths.

In __skb_clone(), now, the flag is set only if it was set in the
original skb, but not cleared if it wasn't. This is wrong and
might lead to socket buffers being flagged with pfmemalloc even
if the skb data wasn't allocated from pfmemalloc reserves. Copy
the flag instead of ORing it.

Reported-by: Sabrina Dubroca <sd@queasysnail.net>
Fixes: 8b7008620b84 ("net: Don't copy pfmemalloc flag in __copy_skb_header()")
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Tested-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/skbuff.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 60ad04039d2a0..55be076706e52 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -828,8 +828,7 @@ static struct sk_buff *__skb_clone(struct sk_buff *n, struct sk_buff *skb)
 	n->cloned = 1;
 	n->nohdr = 0;
 	n->peeked = 0;
-	if (skb->pfmemalloc)
-		n->pfmemalloc = 1;
+	C(pfmemalloc);
 	n->destructor = NULL;
 	C(tail);
 	C(end);

From 4233f62fef0a41a23f49460f4311b4a4b942b47a Mon Sep 17 00:00:00 2001
From: Mathias Nyman <mathias.nyman@linux.intel.com>
Date: Thu, 21 Jun 2018 16:19:41 +0300
Subject: [PATCH 1281/1852] xhci: Fix perceived dead host due to runtime
 suspend race with event handler

commit 229bc19fd7aca4f37964af06e3583c1c8f36b5d6 upstream.

Don't rely on event interrupt (EINT) bit alone to detect pending port
change in resume. If no change event is detected the host may be suspended
again, oterwise roothubs are resumed.

There is a lag in xHC setting EINT. If we don't notice the pending change
in resume, and the controller is runtime suspeded again, it causes the
event handler to assume host is dead as it will fail to read xHC registers
once PCI puts the controller to D3 state.

[  268.520969] xhci_hcd: xhci_resume: starting port polling.
[  268.520985] xhci_hcd: xhci_hub_status_data: stopping port polling.
[  268.521030] xhci_hcd: xhci_suspend: stopping port polling.
[  268.521040] xhci_hcd: // Setting command ring address to 0x349bd001
[  268.521139] xhci_hcd: Port Status Change Event for port 3
[  268.521149] xhci_hcd: resume root hub
[  268.521163] xhci_hcd: port resume event for port 3
[  268.521168] xhci_hcd: xHC is not running.
[  268.521174] xhci_hcd: handle_port_status: starting port polling.
[  268.596322] xhci_hcd: xhci_hc_died: xHCI host controller not responding, assume dead

The EINT lag is described in a additional note in xhci specs 4.19.2:

"Due to internal xHC scheduling and system delays, there will be a lag
between a change bit being set and the Port Status Change Event that it
generated being written to the Event Ring. If SW reads the PORTSC and
sees a change bit set, there is no guarantee that the corresponding Port
Status Change Event has already been written into the Event Ring."

Cc: <stable@vger.kernel.org>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/host/xhci.c | 40 +++++++++++++++++++++++++++++++++++++---
 drivers/usb/host/xhci.h |  4 ++++
 2 files changed, 41 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 6ae47f7927a2d..3ae9779435d1a 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -897,6 +897,41 @@ static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
 	spin_unlock_irqrestore(&xhci->lock, flags);
 }
 
+static bool xhci_pending_portevent(struct xhci_hcd *xhci)
+{
+	__le32 __iomem		**port_array;
+	int			port_index;
+	u32			status;
+	u32			portsc;
+
+	status = readl(&xhci->op_regs->status);
+	if (status & STS_EINT)
+		return true;
+	/*
+	 * Checking STS_EINT is not enough as there is a lag between a change
+	 * bit being set and the Port Status Change Event that it generated
+	 * being written to the Event Ring. See note in xhci 1.1 section 4.19.2.
+	 */
+
+	port_index = xhci->num_usb2_ports;
+	port_array = xhci->usb2_ports;
+	while (port_index--) {
+		portsc = readl(port_array[port_index]);
+		if (portsc & PORT_CHANGE_MASK ||
+		    (portsc & PORT_PLS_MASK) == XDEV_RESUME)
+			return true;
+	}
+	port_index = xhci->num_usb3_ports;
+	port_array = xhci->usb3_ports;
+	while (port_index--) {
+		portsc = readl(port_array[port_index]);
+		if (portsc & PORT_CHANGE_MASK ||
+		    (portsc & PORT_PLS_MASK) == XDEV_RESUME)
+			return true;
+	}
+	return false;
+}
+
 /*
  * Stop HC (not bus-specific)
  *
@@ -993,7 +1028,7 @@ EXPORT_SYMBOL_GPL(xhci_suspend);
  */
 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
 {
-	u32			command, temp = 0, status;
+	u32			command, temp = 0;
 	struct usb_hcd		*hcd = xhci_to_hcd(xhci);
 	struct usb_hcd		*secondary_hcd;
 	int			retval = 0;
@@ -1115,8 +1150,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
  done:
 	if (retval == 0) {
 		/* Resume root hubs only when have pending events. */
-		status = readl(&xhci->op_regs->status);
-		if (status & STS_EINT) {
+		if (xhci_pending_portevent(xhci)) {
 			usb_hcd_resume_root_hub(xhci->shared_hcd);
 			usb_hcd_resume_root_hub(hcd);
 		}
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 4bd6ba03ca6b3..41e22221f445b 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -382,6 +382,10 @@ struct xhci_op_regs {
 #define PORT_PLC	(1 << 22)
 /* port configure error change - port failed to configure its link partner */
 #define PORT_CEC	(1 << 23)
+#define PORT_CHANGE_MASK	(PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
+				 PORT_RC | PORT_PLC | PORT_CEC)
+
+
 /* Cold Attach Status - xHC can set this bit to report device attached during
  * Sx state. Warm port reset should be perfomed to clear this bit and move port
  * to connected state.

From d80fa31561cb2dbadd0c4363a6b0592d2afbc991 Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers@google.com>
Date: Thu, 21 Jun 2018 09:23:24 -0700
Subject: [PATCH 1282/1852] x86/paravirt: Make native_save_fl() extern inline

commit d0a8d9378d16eb3c69bd8e6d23779fbdbee3a8c7 upstream.

native_save_fl() is marked static inline, but by using it as
a function pointer in arch/x86/kernel/paravirt.c, it MUST be outlined.

paravirt's use of native_save_fl() also requires that no GPRs other than
%rax are clobbered.

Compilers have different heuristics which they use to emit stack guard
code, the emittance of which can break paravirt's callee saved assumption
by clobbering %rcx.

Marking a function definition extern inline means that if this version
cannot be inlined, then the out-of-line version will be preferred. By
having the out-of-line version be implemented in assembly, it cannot be
instrumented with a stack protector, which might violate custom calling
conventions that code like paravirt rely on.

The semantics of extern inline has changed since gnu89. This means that
folks using GCC versions >= 5.1 may see symbol redefinition errors at
link time for subdirs that override KBUILD_CFLAGS (making the C standard
used implicit) regardless of this patch. This has been cleaned up
earlier in the patch set, but is left as a note in the commit message
for future travelers.

Reports:
 https://lkml.org/lkml/2018/5/7/534
 https://github.com/ClangBuiltLinux/linux/issues/16

Discussion:
 https://bugs.llvm.org/show_bug.cgi?id=37512
 https://lkml.org/lkml/2018/5/24/1371

Thanks to the many folks that participated in the discussion.

[Backport for 4.4. 4.4 is missing commit 784d5699eddc "x86: move exports to
actual definitions" which doesn't apply cleanly, and not really worth
backporting IMO. It's simpler to change this patch from upstream:
  + #include <asm-generic/export.h>
rather than
  + #include <asm/export.h>]

Debugged-by: Alistair Strachan <astrachan@google.com>
Debugged-by: Matthias Kaehlcke <mka@chromium.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: H. Peter Anvin <hpa@zytor.com>
Suggested-by: Tom Stellar <tstellar@redhat.com>
Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@redhat.com
Cc: akataria@vmware.com
Cc: akpm@linux-foundation.org
Cc: andrea.parri@amarulasolutions.com
Cc: ard.biesheuvel@linaro.org
Cc: aryabinin@virtuozzo.com
Cc: astrachan@google.com
Cc: boris.ostrovsky@oracle.com
Cc: brijesh.singh@amd.com
Cc: caoj.fnst@cn.fujitsu.com
Cc: geert@linux-m68k.org
Cc: ghackmann@google.com
Cc: gregkh@linuxfoundation.org
Cc: jan.kiszka@siemens.com
Cc: jarkko.sakkinen@linux.intel.com
Cc: joe@perches.com
Cc: jpoimboe@redhat.com
Cc: keescook@google.com
Cc: kirill.shutemov@linux.intel.com
Cc: kstewart@linuxfoundation.org
Cc: linux-efi@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Cc: manojgupta@google.com
Cc: mawilcox@microsoft.com
Cc: michal.lkml@markovi.net
Cc: mjg59@google.com
Cc: mka@chromium.org
Cc: pombredanne@nexb.com
Cc: rientjes@google.com
Cc: rostedt@goodmis.org
Cc: thomas.lendacky@amd.com
Cc: tweek@google.com
Cc: virtualization@lists.linux-foundation.org
Cc: will.deacon@arm.com
Cc: yamada.masahiro@socionext.com
Link: http://lkml.kernel.org/r/20180621162324.36656-4-ndesaulniers@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/irqflags.h |  2 +-
 arch/x86/kernel/Makefile        |  1 +
 arch/x86/kernel/irqflags.S      | 26 ++++++++++++++++++++++++++
 3 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/kernel/irqflags.S

diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflags.h
index b77f5edb03b0c..0056bc945cd15 100644
--- a/arch/x86/include/asm/irqflags.h
+++ b/arch/x86/include/asm/irqflags.h
@@ -8,7 +8,7 @@
  * Interrupt control:
  */
 
-static inline unsigned long native_save_fl(void)
+extern inline unsigned long native_save_fl(void)
 {
 	unsigned long flags;
 
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 616ebd22ef9a2..5e59af41d40e9 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -53,6 +53,7 @@ obj-y			+= alternative.o i8253.o pci-nommu.o hw_breakpoint.o
 obj-y			+= tsc.o tsc_msr.o io_delay.o rtc.o
 obj-y			+= pci-iommu_table.o
 obj-y			+= resource.o
+obj-y			+= irqflags.o
 
 obj-y				+= process.o
 obj-y				+= fpu/
diff --git a/arch/x86/kernel/irqflags.S b/arch/x86/kernel/irqflags.S
new file mode 100644
index 0000000000000..3817eb748eb48
--- /dev/null
+++ b/arch/x86/kernel/irqflags.S
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#include <asm/asm.h>
+#include <asm-generic/export.h>
+#include <linux/linkage.h>
+
+/*
+ * unsigned long native_save_fl(void)
+ */
+ENTRY(native_save_fl)
+	pushf
+	pop %_ASM_AX
+	ret
+ENDPROC(native_save_fl)
+EXPORT_SYMBOL(native_save_fl)
+
+/*
+ * void native_restore_fl(unsigned long flags)
+ * %eax/%rdi: flags
+ */
+ENTRY(native_restore_fl)
+	push %_ASM_ARG1
+	popf
+	ret
+ENDPROC(native_restore_fl)
+EXPORT_SYMBOL(native_restore_fl)

From 45fa896006d0ad967422701a9ae11873386e5d99 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:29:15 -0700
Subject: [PATCH 1283/1852] x86/cpufeatures: Add CPUID_7_EDX CPUID leaf

(cherry picked from commit 95ca0ee8636059ea2800dfbac9ecac6212d6b38f)

This is a pure feature bits leaf. There are two AVX512 feature bits in it
already which were handled as scattered bits, and three more from this leaf
are going to be added for speculation control features.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-2-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeature.h        | 7 +++++--
 arch/x86/include/asm/cpufeatures.h       | 6 +++++-
 arch/x86/include/asm/disabled-features.h | 3 ++-
 arch/x86/include/asm/required-features.h | 3 ++-
 arch/x86/kernel/cpu/common.c             | 1 +
 5 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index dd0089841a0fa..d72c1db646791 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -28,6 +28,7 @@ enum cpuid_leafs
 	CPUID_8000_000A_EDX,
 	CPUID_7_ECX,
 	CPUID_8000_0007_EBX,
+	CPUID_7_EDX,
 };
 
 #ifdef CONFIG_X86_FEATURE_NAMES
@@ -78,8 +79,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) ||	\
 	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) ||	\
 	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) ||	\
 	   REQUIRED_MASK_CHECK					  ||	\
-	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
+	   BUILD_BUG_ON_ZERO(NCAPINTS != 19))
 
 #define DISABLED_MASK_BIT_SET(feature_bit)				\
 	 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK,  0, feature_bit) ||	\
@@ -100,8 +102,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) ||	\
 	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) ||	\
 	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) ||	\
+	   CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) ||	\
 	   DISABLED_MASK_CHECK					  ||	\
-	   BUILD_BUG_ON_ZERO(NCAPINTS != 18))
+	   BUILD_BUG_ON_ZERO(NCAPINTS != 19))
 
 #define cpu_has(c, bit)							\
 	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 205ce70c1d6c9..da14ca894a15a 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -12,7 +12,7 @@
 /*
  * Defines x86 CPU feature bits
  */
-#define NCAPINTS	18	/* N 32-bit words worth of info */
+#define NCAPINTS	19	/* N 32-bit words worth of info */
 #define NBUGINTS	1	/* N 32-bit bug flags */
 
 /*
@@ -285,6 +285,10 @@
 #define X86_FEATURE_SUCCOR	(17*32+1) /* Uncorrectable error containment and recovery */
 #define X86_FEATURE_SMCA	(17*32+3) /* Scalable MCA */
 
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
+#define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
+#define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
+
 /*
  * BUG word(s)
  */
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 21c5ac15657b2..1f8cca459c6c8 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -59,6 +59,7 @@
 #define DISABLED_MASK15	0
 #define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE)
 #define DISABLED_MASK17	0
-#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
+#define DISABLED_MASK18	0
+#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)
 
 #endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index fac9a5c0abe94..6847d85400a8b 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -100,6 +100,7 @@
 #define REQUIRED_MASK15	0
 #define REQUIRED_MASK16	0
 #define REQUIRED_MASK17	0
-#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
+#define REQUIRED_MASK18	0
+#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)
 
 #endif /* _ASM_X86_REQUIRED_FEATURES_H */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 736e2843139bf..ac7c52682d335 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -695,6 +695,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
 		c->x86_capability[CPUID_7_0_EBX] = ebx;
 		c->x86_capability[CPUID_7_ECX] = ecx;
+		c->x86_capability[CPUID_7_EDX] = edx;
 	}
 
 	/* Extended state features: level 0x0000000d */

From 946f58485910e272b574aa0192ed682a40e45590 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:29:24 -0700
Subject: [PATCH 1284/1852] x86/cpufeatures: Add Intel feature bits for
 Speculation Control

(cherry picked from commit fc67dd70adb711a45d2ef34e12d1a8be75edde61)

Add three feature bits exposed by new microcode on Intel CPUs for
speculation control.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-3-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index da14ca894a15a..f50e8576eb3b8 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -288,6 +288,9 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
 #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
 #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
+#define X86_FEATURE_SPEC_CTRL		(18*32+26) /* Speculation Control (IBRS + IBPB) */
+#define X86_FEATURE_STIBP		(18*32+27) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
 
 /*
  * BUG word(s)

From 43b87d266a28f2c8adfb5d880c73a23078cf14ce Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:29:33 -0700
Subject: [PATCH 1285/1852] x86/cpufeatures: Add AMD feature bits for
 Speculation Control

(cherry picked from commit 5d10cbc91d9eb5537998b65608441b592eec65e7)

AMD exposes the PRED_CMD/SPEC_CTRL MSRs slightly differently to Intel.
See http://lkml.kernel.org/r/2b3e25cc-286d-8bd0-aeaf-9ac4aae39de8@amd.com

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-4-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f50e8576eb3b8..a5671b849837b 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -251,6 +251,9 @@
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
+#define X86_FEATURE_AMD_PRED_CMD (13*32+12) /* Prediction Command MSR (AMD) */
+#define X86_FEATURE_AMD_SPEC_CTRL (13*32+14) /* Speculation Control MSR only (AMD) */
+#define X86_FEATURE_AMD_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors (AMD) */
 
 /* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
 #define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */

From 3d54b36e5d4f720d9ba6b2b549bb6d9f1c494699 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:29:43 -0700
Subject: [PATCH 1286/1852] x86/msr: Add definitions for new speculation
 control MSRs

(cherry picked from commit 1e340c60d0dd3ae07b5bedc16a0469c14b9f3410)

Add MSR and bit definitions for SPEC_CTRL, PRED_CMD and ARCH_CAPABILITIES.

See Intel's 336996-Speculative-Execution-Side-Channel-Mitigations.pdf

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-5-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/msr-index.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index b8911aecf0352..f4701f0e613a3 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -32,6 +32,13 @@
 #define EFER_FFXSR		(1<<_EFER_FFXSR)
 
 /* Intel MSRs. Some also available on other CPUs */
+#define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */
+#define SPEC_CTRL_IBRS			(1 << 0)   /* Indirect Branch Restricted Speculation */
+#define SPEC_CTRL_STIBP			(1 << 1)   /* Single Thread Indirect Branch Predictors */
+
+#define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
+#define PRED_CMD_IBPB			(1 << 0)   /* Indirect Branch Prediction Barrier */
+
 #define MSR_IA32_PERFCTR0		0x000000c1
 #define MSR_IA32_PERFCTR1		0x000000c2
 #define MSR_FSB_FREQ			0x000000cd
@@ -45,6 +52,11 @@
 #define SNB_C3_AUTO_UNDEMOTE		(1UL << 28)
 
 #define MSR_MTRRcap			0x000000fe
+
+#define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
+#define ARCH_CAP_RDCL_NO		(1 << 0)   /* Not susceptible to Meltdown */
+#define ARCH_CAP_IBRS_ALL		(1 << 1)   /* Enhanced IBRS support */
+
 #define MSR_IA32_BBL_CR_CTL		0x00000119
 #define MSR_IA32_BBL_CR_CTL3		0x0000011e
 

From 562c24889ed6c90f9330e3d23225c46b94e44a86 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:29:52 -0700
Subject: [PATCH 1287/1852] x86/pti: Do not enable PTI on CPUs which are not
 vulnerable to Meltdown

(cherry picked from commit fec9434a12f38d3aeafeb75711b71d8a1fdef621)

Also, for CPUs which don't speculate at all, don't report that they're
vulnerable to the Spectre variants either.

Leave the cpu_no_meltdown[] match table with just X86_VENDOR_AMD in it
for now, even though that could be done with a simple comparison, on the
assumption that we'll have more to add.

Based on suggestions from Dave Hansen and Alan Cox.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-6-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 48 ++++++++++++++++++++++++++++++++----
 1 file changed, 43 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index ac7c52682d335..d6c097cdbefb6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -43,6 +43,8 @@
 #include <asm/pat.h>
 #include <asm/microcode.h>
 #include <asm/microcode_intel.h>
+#include <asm/intel-family.h>
+#include <asm/cpu_device_id.h>
 
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
@@ -794,6 +796,41 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
 #endif
 }
 
+static const __initdata struct x86_cpu_id cpu_no_speculation[] = {
+	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_CEDARVIEW,	X86_FEATURE_ANY },
+	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_CLOVERVIEW,	X86_FEATURE_ANY },
+	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_LINCROFT,	X86_FEATURE_ANY },
+	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_PENWELL,	X86_FEATURE_ANY },
+	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_PINEVIEW,	X86_FEATURE_ANY },
+	{ X86_VENDOR_CENTAUR,	5 },
+	{ X86_VENDOR_INTEL,	5 },
+	{ X86_VENDOR_NSC,	5 },
+	{ X86_VENDOR_ANY,	4 },
+	{}
+};
+
+static const __initdata struct x86_cpu_id cpu_no_meltdown[] = {
+	{ X86_VENDOR_AMD },
+	{}
+};
+
+static bool __init cpu_vulnerable_to_meltdown(struct cpuinfo_x86 *c)
+{
+	u64 ia32_cap = 0;
+
+	if (x86_match_cpu(cpu_no_meltdown))
+		return false;
+
+	if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
+		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
+
+	/* Rogue Data Cache Load? No! */
+	if (ia32_cap & ARCH_CAP_RDCL_NO)
+		return false;
+
+	return true;
+}
+
 /*
  * Do minimum CPU detection early.
  * Fields really needed: vendor, cpuid_level, family, model, mask,
@@ -840,11 +877,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 
 	setup_force_cpu_cap(X86_FEATURE_ALWAYS);
 
-	if (c->x86_vendor != X86_VENDOR_AMD)
-		setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
-
-	setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
-	setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+	if (!x86_match_cpu(cpu_no_speculation)) {
+		if (cpu_vulnerable_to_meltdown(c))
+			setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
+		setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
+		setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+	}
 
 	fpu__init_system(c);
 

From f050a9157ff4656c3e8768fc1768bb50c712fc7a Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:30:01 -0700
Subject: [PATCH 1288/1852] x86/cpufeature: Blacklist SPEC_CTRL/PRED_CMD on
 early Spectre v2 microcodes

(cherry picked from commit a5b2966364538a0e68c9fa29bc0a3a1651799035)

This doesn't refuse to load the affected microcodes; it just refuses to
use the Spectre v2 mitigation features if they're detected, by clearing
the appropriate feature bits.

The AMD CPUID bits are handled here too, because hypervisors *may* have
been exposing those bits even on Intel chips, for fine-grained control
of what's available.

It is non-trivial to use x86_match_cpu() for this table because that
doesn't handle steppings. And the approach taken in commit bd9240a18
almost made me lose my lunch.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-7-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/intel-family.h |  5 ++-
 arch/x86/kernel/cpu/intel.c         | 67 +++++++++++++++++++++++++++++
 2 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 6999f7d01a0d1..12fa187865c26 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -12,6 +12,7 @@
  */
 
 #define INTEL_FAM6_CORE_YONAH		0x0E
+
 #define INTEL_FAM6_CORE2_MEROM		0x0F
 #define INTEL_FAM6_CORE2_MEROM_L	0x16
 #define INTEL_FAM6_CORE2_PENRYN		0x17
@@ -20,6 +21,7 @@
 #define INTEL_FAM6_NEHALEM		0x1E
 #define INTEL_FAM6_NEHALEM_EP		0x1A
 #define INTEL_FAM6_NEHALEM_EX		0x2E
+
 #define INTEL_FAM6_WESTMERE		0x25
 #define INTEL_FAM6_WESTMERE2		0x1F
 #define INTEL_FAM6_WESTMERE_EP		0x2C
@@ -36,9 +38,9 @@
 #define INTEL_FAM6_HASWELL_GT3E		0x46
 
 #define INTEL_FAM6_BROADWELL_CORE	0x3D
-#define INTEL_FAM6_BROADWELL_XEON_D	0x56
 #define INTEL_FAM6_BROADWELL_GT3E	0x47
 #define INTEL_FAM6_BROADWELL_X		0x4F
+#define INTEL_FAM6_BROADWELL_XEON_D	0x56
 
 #define INTEL_FAM6_SKYLAKE_MOBILE	0x4E
 #define INTEL_FAM6_SKYLAKE_DESKTOP	0x5E
@@ -60,6 +62,7 @@
 #define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
+#define INTEL_FAM6_ATOM_GEMINI_LAKE	0x7A
 
 /* Xeon Phi */
 
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9299e3bdfad6b..23ba9cc0cc0d6 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
 #include <asm/msr.h>
 #include <asm/bugs.h>
 #include <asm/cpu.h>
+#include <asm/intel-family.h>
 
 #ifdef CONFIG_X86_64
 #include <linux/topology.h>
@@ -25,6 +26,59 @@
 #include <asm/apic.h>
 #endif
 
+/*
+ * Early microcode releases for the Spectre v2 mitigation were broken.
+ * Information taken from;
+ * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
+ * - https://kb.vmware.com/s/article/52345
+ * - Microcode revisions observed in the wild
+ * - Release note from 20180108 microcode release
+ */
+struct sku_microcode {
+	u8 model;
+	u8 stepping;
+	u32 microcode;
+};
+static const struct sku_microcode spectre_bad_microcodes[] = {
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0B,	0x84 },
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0A,	0x84 },
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x09,	0x84 },
+	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x0A,	0x84 },
+	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x84 },
+	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
+	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
+	{ INTEL_FAM6_SKYLAKE_MOBILE,	0x03,	0xc2 },
+	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
+	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
+	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
+	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },
+	{ INTEL_FAM6_BROADWELL_XEON_D,	0x03,	0x07000011 },
+	{ INTEL_FAM6_BROADWELL_X,	0x01,	0x0b000025 },
+	{ INTEL_FAM6_HASWELL_ULT,	0x01,	0x21 },
+	{ INTEL_FAM6_HASWELL_GT3E,	0x01,	0x18 },
+	{ INTEL_FAM6_HASWELL_CORE,	0x03,	0x23 },
+	{ INTEL_FAM6_HASWELL_X,		0x02,	0x3b },
+	{ INTEL_FAM6_HASWELL_X,		0x04,	0x10 },
+	{ INTEL_FAM6_IVYBRIDGE_X,	0x04,	0x42a },
+	/* Updated in the 20180108 release; blacklist until we know otherwise */
+	{ INTEL_FAM6_ATOM_GEMINI_LAKE,	0x01,	0x22 },
+	/* Observed in the wild */
+	{ INTEL_FAM6_SANDYBRIDGE_X,	0x06,	0x61b },
+	{ INTEL_FAM6_SANDYBRIDGE_X,	0x07,	0x712 },
+};
+
+static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) {
+		if (c->x86_model == spectre_bad_microcodes[i].model &&
+		    c->x86_mask == spectre_bad_microcodes[i].stepping)
+			return (c->microcode <= spectre_bad_microcodes[i].microcode);
+	}
+	return false;
+}
+
 static void early_init_intel(struct cpuinfo_x86 *c)
 {
 	u64 misc_enable;
@@ -51,6 +105,19 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		rdmsr(MSR_IA32_UCODE_REV, lower_word, c->microcode);
 	}
 
+	if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) ||
+	     cpu_has(c, X86_FEATURE_STIBP) ||
+	     cpu_has(c, X86_FEATURE_AMD_SPEC_CTRL) ||
+	     cpu_has(c, X86_FEATURE_AMD_PRED_CMD) ||
+	     cpu_has(c, X86_FEATURE_AMD_STIBP)) && bad_spectre_microcode(c)) {
+		pr_warn("Intel Spectre v2 broken microcode detected; disabling SPEC_CTRL\n");
+		clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL);
+		clear_cpu_cap(c, X86_FEATURE_STIBP);
+		clear_cpu_cap(c, X86_FEATURE_AMD_SPEC_CTRL);
+		clear_cpu_cap(c, X86_FEATURE_AMD_PRED_CMD);
+		clear_cpu_cap(c, X86_FEATURE_AMD_STIBP);
+	}
+
 	/*
 	 * Atom erratum AAE44/AAF40/AAG38/AAH41:
 	 *

From ea7a08cc3b0d0d48f859f534e9f16a7af0535589 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:30:10 -0700
Subject: [PATCH 1289/1852] x86/speculation: Add basic IBPB (Indirect Branch
 Prediction Barrier) support

(cherry picked from commit 20ffa1caecca4db8f79fe665acdeaa5af815a24d)

Expose indirect_branch_prediction_barrier() for use in subsequent patches.

[ tglx: Add IBPB status to spectre_v2 sysfs file ]

Co-developed-by: KarimAllah Ahmed <karahmed@amazon.de>
Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-8-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h   |  2 ++
 arch/x86/include/asm/nospec-branch.h | 13 +++++++++++++
 arch/x86/kernel/cpu/bugs.c           | 10 +++++++++-
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index a5671b849837b..b4e370b5b7615 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -201,6 +201,8 @@
 /* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
 #define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
 
+#define X86_FEATURE_IBPB		( 7*32+21) /* Indirect Branch Prediction Barrier enabled*/
+
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
 #define X86_FEATURE_VNMI        ( 8*32+ 1) /* Intel Virtual NMI */
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 8b910416243ce..41851afd44af1 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -194,6 +194,19 @@ static inline void vmexit_fill_RSB(void)
 #endif
 }
 
+static inline void indirect_branch_prediction_barrier(void)
+{
+	asm volatile(ALTERNATIVE("",
+				 "movl %[msr], %%ecx\n\t"
+				 "movl %[val], %%eax\n\t"
+				 "movl $0, %%edx\n\t"
+				 "wrmsr",
+				 X86_FEATURE_IBPB)
+		     : : [msr] "i" (MSR_IA32_PRED_CMD),
+			 [val] "i" (PRED_CMD_IBPB)
+		     : "eax", "ecx", "edx", "memory");
+}
+
 #endif /* __ASSEMBLY__ */
 
 /*
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 2bbc74f8a4a83..7def33ada7303 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -296,6 +296,13 @@ static void __init spectre_v2_select_mitigation(void)
 		setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
 		pr_info("Filling RSB on context switch\n");
 	}
+
+	/* Initialize Indirect Branch Prediction Barrier if supported */
+	if (boot_cpu_has(X86_FEATURE_SPEC_CTRL) ||
+	    boot_cpu_has(X86_FEATURE_AMD_PRED_CMD)) {
+		setup_force_cpu_cap(X86_FEATURE_IBPB);
+		pr_info("Enabling Indirect Branch Prediction Barrier\n");
+	}
 }
 
 #undef pr_fmt
@@ -325,7 +332,8 @@ ssize_t cpu_show_spectre_v2(struct device *dev,
 	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2))
 		return sprintf(buf, "Not affected\n");
 
-	return sprintf(buf, "%s%s\n", spectre_v2_strings[spectre_v2_enabled],
+	return sprintf(buf, "%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
+		       boot_cpu_has(X86_FEATURE_IBPB) ? ", IBPB" : "",
 		       spectre_v2_module_string());
 }
 #endif

From 4c82b06a3a737878eefbe8a99733e7e140609218 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:30:20 -0700
Subject: [PATCH 1290/1852] x86/cpufeatures: Clean up Spectre v2 related CPUID
 flags

(cherry picked from commit 2961298efe1ea1b6fc0d7ee8b76018fa6c0bcef2)

We want to expose the hardware features simply in /proc/cpuinfo as "ibrs",
"ibpb" and "stibp". Since AMD has separate CPUID bits for those, use them
as the user-visible bits.

When the Intel SPEC_CTRL bit is set which indicates both IBRS and IBPB
capability, set those (AMD) bits accordingly. Likewise if the Intel STIBP
bit is set, set the AMD STIBP that's used for the generic hardware
capability.

Hide the rest from /proc/cpuinfo by putting "" in the comments. Including
RETPOLINE and RETPOLINE_AMD which shouldn't be visible there. There are
patches to make the sysfs vulnerabilities information non-readable by
non-root, and the same should apply to all information about which
mitigations are actually in use. Those *shouldn't* appear in /proc/cpuinfo.

The feature bit for whether IBPB is actually used, which is needed for
ALTERNATIVEs, is renamed to X86_FEATURE_USE_IBPB.

Originally-by: Borislav Petkov <bp@suse.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1517070274-12128-2-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h   | 18 ++++++++--------
 arch/x86/include/asm/nospec-branch.h |  2 +-
 arch/x86/kernel/cpu/bugs.c           |  7 +++----
 arch/x86/kernel/cpu/intel.c          | 31 +++++++++++++++++++---------
 4 files changed, 34 insertions(+), 24 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index b4e370b5b7615..782005d7eb487 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -194,14 +194,14 @@
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
 
 #define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
-#define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* Fill RSB on context switches */
+#define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* "" Fill RSB on context switches */
 
-#define X86_FEATURE_RETPOLINE	( 7*32+29) /* Generic Retpoline mitigation for Spectre variant 2 */
-#define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* AMD Retpoline mitigation for Spectre variant 2 */
+#define X86_FEATURE_RETPOLINE	( 7*32+29) /* "" Generic Retpoline mitigation for Spectre variant 2 */
+#define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* "" AMD Retpoline mitigation for Spectre variant 2 */
 /* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
 #define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
 
-#define X86_FEATURE_IBPB		( 7*32+21) /* Indirect Branch Prediction Barrier enabled*/
+#define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
@@ -253,9 +253,9 @@
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
-#define X86_FEATURE_AMD_PRED_CMD (13*32+12) /* Prediction Command MSR (AMD) */
-#define X86_FEATURE_AMD_SPEC_CTRL (13*32+14) /* Speculation Control MSR only (AMD) */
-#define X86_FEATURE_AMD_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors (AMD) */
+#define X86_FEATURE_IBPB	(13*32+12) /* Indirect Branch Prediction Barrier */
+#define X86_FEATURE_IBRS	(13*32+14) /* Indirect Branch Restricted Speculation */
+#define X86_FEATURE_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors */
 
 /* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
 #define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
@@ -293,8 +293,8 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
 #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
 #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
-#define X86_FEATURE_SPEC_CTRL		(18*32+26) /* Speculation Control (IBRS + IBPB) */
-#define X86_FEATURE_STIBP		(18*32+27) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
+#define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
 
 /*
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 41851afd44af1..8dcecb9123659 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -201,7 +201,7 @@ static inline void indirect_branch_prediction_barrier(void)
 				 "movl %[val], %%eax\n\t"
 				 "movl $0, %%edx\n\t"
 				 "wrmsr",
-				 X86_FEATURE_IBPB)
+				 X86_FEATURE_USE_IBPB)
 		     : : [msr] "i" (MSR_IA32_PRED_CMD),
 			 [val] "i" (PRED_CMD_IBPB)
 		     : "eax", "ecx", "edx", "memory");
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 7def33ada7303..1968baf66c487 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -298,9 +298,8 @@ static void __init spectre_v2_select_mitigation(void)
 	}
 
 	/* Initialize Indirect Branch Prediction Barrier if supported */
-	if (boot_cpu_has(X86_FEATURE_SPEC_CTRL) ||
-	    boot_cpu_has(X86_FEATURE_AMD_PRED_CMD)) {
-		setup_force_cpu_cap(X86_FEATURE_IBPB);
+	if (boot_cpu_has(X86_FEATURE_IBPB)) {
+		setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
 		pr_info("Enabling Indirect Branch Prediction Barrier\n");
 	}
 }
@@ -333,7 +332,7 @@ ssize_t cpu_show_spectre_v2(struct device *dev,
 		return sprintf(buf, "Not affected\n");
 
 	return sprintf(buf, "%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
-		       boot_cpu_has(X86_FEATURE_IBPB) ? ", IBPB" : "",
+		       boot_cpu_has(X86_FEATURE_USE_IBPB) ? ", IBPB" : "",
 		       spectre_v2_module_string());
 }
 #endif
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 23ba9cc0cc0d6..fee94ee8efe71 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -105,17 +105,28 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		rdmsr(MSR_IA32_UCODE_REV, lower_word, c->microcode);
 	}
 
-	if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) ||
-	     cpu_has(c, X86_FEATURE_STIBP) ||
-	     cpu_has(c, X86_FEATURE_AMD_SPEC_CTRL) ||
-	     cpu_has(c, X86_FEATURE_AMD_PRED_CMD) ||
-	     cpu_has(c, X86_FEATURE_AMD_STIBP)) && bad_spectre_microcode(c)) {
-		pr_warn("Intel Spectre v2 broken microcode detected; disabling SPEC_CTRL\n");
-		clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL);
+	/*
+	 * The Intel SPEC_CTRL CPUID bit implies IBRS and IBPB support,
+	 * and they also have a different bit for STIBP support. Also,
+	 * a hypervisor might have set the individual AMD bits even on
+	 * Intel CPUs, for finer-grained selection of what's available.
+	 */
+	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
+		set_cpu_cap(c, X86_FEATURE_IBRS);
+		set_cpu_cap(c, X86_FEATURE_IBPB);
+	}
+	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
+		set_cpu_cap(c, X86_FEATURE_STIBP);
+
+	/* Now if any of them are set, check the blacklist and clear the lot */
+	if ((cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) ||
+	     cpu_has(c, X86_FEATURE_STIBP)) && bad_spectre_microcode(c)) {
+		pr_warn("Intel Spectre v2 broken microcode detected; disabling Speculation Control\n");
+		clear_cpu_cap(c, X86_FEATURE_IBRS);
+		clear_cpu_cap(c, X86_FEATURE_IBPB);
 		clear_cpu_cap(c, X86_FEATURE_STIBP);
-		clear_cpu_cap(c, X86_FEATURE_AMD_SPEC_CTRL);
-		clear_cpu_cap(c, X86_FEATURE_AMD_PRED_CMD);
-		clear_cpu_cap(c, X86_FEATURE_AMD_STIBP);
+		clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL);
+		clear_cpu_cap(c, X86_FEATURE_INTEL_STIBP);
 	}
 
 	/*

From b064d427c2d8e641cff788e5eb590ffde2a6ff2e Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:30:29 -0700
Subject: [PATCH 1291/1852] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature
 bits on Intel

(cherry picked from commit 7fcae1118f5fd44a862aa5c3525248e35ee67c3b)

Despite the fact that all the other code there seems to be doing it, just
using set_cpu_cap() in early_intel_init() doesn't actually work.

For CPUs with PKU support, setup_pku() calls get_cpu_cap() after
c->c_init() has set those feature bits. That resets those bits back to what
was queried from the hardware.

Turning the bits off for bad microcode is easy to fix. That can just use
setup_clear_cpu_cap() to force them off for all CPUs.

I was less keen on forcing the feature bits *on* that way, just in case
of inconsistencies. I appreciate that the kernel is going to get this
utterly wrong if CPU features are not consistent, because it has already
applied alternatives by the time secondary CPUs are brought up.

But at least if setup_force_cpu_cap() isn't being used, we might have a
chance of *detecting* the lack of the corresponding bit and either
panicking or refusing to bring the offending CPU online.

So ensure that the appropriate feature bits are set within get_cpu_cap()
regardless of how many extra times it's called.

Fixes: 2961298e ("x86/cpufeatures: Clean up Spectre v2 related CPUID flags")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: karahmed@amazon.de
Cc: peterz@infradead.org
Cc: bp@alien8.de
Link: https://lkml.kernel.org/r/1517322623-15261-1-git-send-email-dwmw@amazon.co.uk
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 21 +++++++++++++++++++++
 arch/x86/kernel/cpu/intel.c  | 27 ++++++++-------------------
 2 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d6c097cdbefb6..72d7e5a3f5d48 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -676,6 +676,26 @@ static void apply_forced_caps(struct cpuinfo_x86 *c)
 	}
 }
 
+static void init_speculation_control(struct cpuinfo_x86 *c)
+{
+	/*
+	 * The Intel SPEC_CTRL CPUID bit implies IBRS and IBPB support,
+	 * and they also have a different bit for STIBP support. Also,
+	 * a hypervisor might have set the individual AMD bits even on
+	 * Intel CPUs, for finer-grained selection of what's available.
+	 *
+	 * We use the AMD bits in 0x8000_0008 EBX as the generic hardware
+	 * features, which are visible in /proc/cpuinfo and used by the
+	 * kernel. So set those accordingly from the Intel bits.
+	 */
+	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
+		set_cpu_cap(c, X86_FEATURE_IBRS);
+		set_cpu_cap(c, X86_FEATURE_IBPB);
+	}
+	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
+		set_cpu_cap(c, X86_FEATURE_STIBP);
+}
+
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
 	u32 eax, ebx, ecx, edx;
@@ -768,6 +788,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a);
 
 	init_scattered_cpuid_features(c);
+	init_speculation_control(c);
 }
 
 static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index fee94ee8efe71..0f13189017779 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -105,28 +105,17 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		rdmsr(MSR_IA32_UCODE_REV, lower_word, c->microcode);
 	}
 
-	/*
-	 * The Intel SPEC_CTRL CPUID bit implies IBRS and IBPB support,
-	 * and they also have a different bit for STIBP support. Also,
-	 * a hypervisor might have set the individual AMD bits even on
-	 * Intel CPUs, for finer-grained selection of what's available.
-	 */
-	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
-		set_cpu_cap(c, X86_FEATURE_IBRS);
-		set_cpu_cap(c, X86_FEATURE_IBPB);
-	}
-	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
-		set_cpu_cap(c, X86_FEATURE_STIBP);
-
 	/* Now if any of them are set, check the blacklist and clear the lot */
-	if ((cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) ||
+	if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) ||
+	     cpu_has(c, X86_FEATURE_INTEL_STIBP) ||
+	     cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) ||
 	     cpu_has(c, X86_FEATURE_STIBP)) && bad_spectre_microcode(c)) {
 		pr_warn("Intel Spectre v2 broken microcode detected; disabling Speculation Control\n");
-		clear_cpu_cap(c, X86_FEATURE_IBRS);
-		clear_cpu_cap(c, X86_FEATURE_IBPB);
-		clear_cpu_cap(c, X86_FEATURE_STIBP);
-		clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL);
-		clear_cpu_cap(c, X86_FEATURE_INTEL_STIBP);
+		setup_clear_cpu_cap(X86_FEATURE_IBRS);
+		setup_clear_cpu_cap(X86_FEATURE_IBPB);
+		setup_clear_cpu_cap(X86_FEATURE_STIBP);
+		setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL);
+		setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP);
 	}
 
 	/*

From a31b6952894bac4817d222b2840527812aca427d Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Sat, 14 Jul 2018 02:30:37 -0700
Subject: [PATCH 1292/1852] x86/pti: Mark constant arrays as __initconst

(cherry picked from commit 4bf5d56d429cbc96c23d809a08f63cd29e1a702e)

I'm seeing build failures from the two newly introduced arrays that
are marked 'const' and '__initdata', which are mutually exclusive:

arch/x86/kernel/cpu/common.c:882:43: error: 'cpu_no_speculation' causes a section type conflict with 'e820_table_firmware_init'
arch/x86/kernel/cpu/common.c:895:43: error: 'cpu_no_meltdown' causes a section type conflict with 'e820_table_firmware_init'

The correct annotation is __initconst.

Fixes: fec9434a12f3 ("x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Thomas Garnier <thgarnie@google.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Link: https://lkml.kernel.org/r/20180202213959.611210-1-arnd@arndb.de
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 72d7e5a3f5d48..48499b41351cd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -817,7 +817,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
 #endif
 }
 
-static const __initdata struct x86_cpu_id cpu_no_speculation[] = {
+static const __initconst struct x86_cpu_id cpu_no_speculation[] = {
 	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_CEDARVIEW,	X86_FEATURE_ANY },
 	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_CLOVERVIEW,	X86_FEATURE_ANY },
 	{ X86_VENDOR_INTEL,	6, INTEL_FAM6_ATOM_LINCROFT,	X86_FEATURE_ANY },
@@ -830,7 +830,7 @@ static const __initdata struct x86_cpu_id cpu_no_speculation[] = {
 	{}
 };
 
-static const __initdata struct x86_cpu_id cpu_no_meltdown[] = {
+static const __initconst struct x86_cpu_id cpu_no_meltdown[] = {
 	{ X86_VENDOR_AMD },
 	{}
 };

From 216cd98fd0579cca1eec61a9251a6aca6275dd18 Mon Sep 17 00:00:00 2001
From: Denys Vlasenko <dvlasenk@redhat.com>
Date: Sat, 14 Jul 2018 02:30:46 -0700
Subject: [PATCH 1293/1852] x86/asm/entry/32: Simplify pushes of zeroed
 pt_regs->REGs

commit 778843f934e362ed4ed734520f60a44a78a074b4 upstream

Use of a temporary R8 register here seems to be unnecessary.

"push %r8" is a two-byte insn (it needs REX prefix to specify R8),
"push $0" is two-byte too. It seems just using the latter would be
no worse.

Thus, code had an unnecessary "xorq %r8,%r8" insn.
It probably costs nothing in execution time here since we are probably
limited by store bandwidth at this point, but still.

Run-tested under QEMU: 32-bit calls still work:

 / # ./test_syscall_vdso32
 [RUN]	Executing 6-argument 32-bit syscall via VDSO
 [OK]	Arguments are preserved across syscall
 [NOTE]	R11 has changed:0000000000200ed7 - assuming clobbered by SYSRET insn
 [OK]	R8..R15 did not leak kernel data
 [RUN]	Executing 6-argument 32-bit syscall via INT 80
 [OK]	Arguments are preserved across syscall
 [OK]	R8..R15 did not leak kernel data
 [RUN]	Running tests under ptrace
 [RUN]	Executing 6-argument 32-bit syscall via VDSO
 [OK]	Arguments are preserved across syscall
 [NOTE]	R11 has changed:0000000000200ed7 - assuming clobbered by SYSRET insn
 [OK]	R8..R15 did not leak kernel data
 [RUN]	Executing 6-argument 32-bit syscall via INT 80
 [OK]	Arguments are preserved across syscall
 [OK]	R8..R15 did not leak kernel data

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Acked-by: Andy Lutomirski <luto@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Drewry <wad@chromium.org>
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/1462201010-16846-1-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/entry/entry_64_compat.S | 45 +++++++++++++++-----------------
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index d03bf0e28b8b3..e479ff847023a 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -79,24 +79,23 @@ ENTRY(entry_SYSENTER_compat)
 	ASM_CLAC			/* Clear AC after saving FLAGS */
 
 	pushq	$__USER32_CS		/* pt_regs->cs */
-	xorq    %r8,%r8
-	pushq	%r8			/* pt_regs->ip = 0 (placeholder) */
+	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
 	pushq	%rax			/* pt_regs->orig_ax */
 	pushq	%rdi			/* pt_regs->di */
 	pushq	%rsi			/* pt_regs->si */
 	pushq	%rdx			/* pt_regs->dx */
 	pushq	%rcx			/* pt_regs->cx */
 	pushq	$-ENOSYS		/* pt_regs->ax */
-	pushq   %r8                     /* pt_regs->r8  = 0 */
-	pushq   %r8                     /* pt_regs->r9  = 0 */
-	pushq   %r8                     /* pt_regs->r10 = 0 */
-	pushq   %r8                     /* pt_regs->r11 = 0 */
+	pushq   $0			/* pt_regs->r8  = 0 */
+	pushq   $0			/* pt_regs->r9  = 0 */
+	pushq   $0			/* pt_regs->r10 = 0 */
+	pushq   $0			/* pt_regs->r11 = 0 */
 	pushq   %rbx                    /* pt_regs->rbx */
 	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
-	pushq   %r8                     /* pt_regs->r12 = 0 */
-	pushq   %r8                     /* pt_regs->r13 = 0 */
-	pushq   %r8                     /* pt_regs->r14 = 0 */
-	pushq   %r8                     /* pt_regs->r15 = 0 */
+	pushq   $0			/* pt_regs->r12 = 0 */
+	pushq   $0			/* pt_regs->r13 = 0 */
+	pushq   $0			/* pt_regs->r14 = 0 */
+	pushq   $0			/* pt_regs->r15 = 0 */
 	cld
 
 	/*
@@ -185,17 +184,16 @@ ENTRY(entry_SYSCALL_compat)
 	pushq	%rdx			/* pt_regs->dx */
 	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
 	pushq	$-ENOSYS		/* pt_regs->ax */
-	xorq    %r8,%r8
-	pushq   %r8                     /* pt_regs->r8  = 0 */
-	pushq   %r8                     /* pt_regs->r9  = 0 */
-	pushq   %r8                     /* pt_regs->r10 = 0 */
-	pushq   %r8                     /* pt_regs->r11 = 0 */
+	pushq   $0			/* pt_regs->r8  = 0 */
+	pushq   $0			/* pt_regs->r9  = 0 */
+	pushq   $0			/* pt_regs->r10 = 0 */
+	pushq   $0			/* pt_regs->r11 = 0 */
 	pushq   %rbx                    /* pt_regs->rbx */
 	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
-	pushq   %r8                     /* pt_regs->r12 = 0 */
-	pushq   %r8                     /* pt_regs->r13 = 0 */
-	pushq   %r8                     /* pt_regs->r14 = 0 */
-	pushq   %r8                     /* pt_regs->r15 = 0 */
+	pushq   $0			/* pt_regs->r12 = 0 */
+	pushq   $0			/* pt_regs->r13 = 0 */
+	pushq   $0			/* pt_regs->r14 = 0 */
+	pushq   $0			/* pt_regs->r15 = 0 */
 
 	/*
 	 * User mode is traced as though IRQs are on, and SYSENTER
@@ -292,11 +290,10 @@ ENTRY(entry_INT80_compat)
 	pushq	%rdx			/* pt_regs->dx */
 	pushq	%rcx			/* pt_regs->cx */
 	pushq	$-ENOSYS		/* pt_regs->ax */
-	xorq    %r8,%r8
-	pushq   %r8                     /* pt_regs->r8  = 0 */
-	pushq   %r8                     /* pt_regs->r9  = 0 */
-	pushq   %r8                     /* pt_regs->r10 = 0 */
-	pushq   %r8                     /* pt_regs->r11 = 0 */
+	pushq   $0			/* pt_regs->r8  = 0 */
+	pushq   $0			/* pt_regs->r9  = 0 */
+	pushq   $0			/* pt_regs->r10 = 0 */
+	pushq   $0			/* pt_regs->r11 = 0 */
 	pushq   %rbx                    /* pt_regs->rbx */
 	pushq   %rbp                    /* pt_regs->rbp */
 	pushq   %r12                    /* pt_regs->r12 */

From 0fbe48cdafe45ddf5e4e449be03b26755592dd7c Mon Sep 17 00:00:00 2001
From: Dan Williams <dan.j.williams@intel.com>
Date: Sat, 14 Jul 2018 02:30:55 -0700
Subject: [PATCH 1294/1852] x86/entry/64/compat: Clear registers for compat
 syscalls, to reduce speculation attack surface

commit 6b8cf5cc9965673951f1ab3f0e3cf23d06e3e2ee upstream.

At entry userspace may have populated registers with values that could
otherwise be useful in a speculative execution attack. Clear them to
minimize the kernel's attack surface.

Originally-From: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: <stable@vger.kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/151787989697.7847.4083702787288600552.stgit@dwillia2-desk3.amr.corp.intel.com
[ Made small improvements to the changelog. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/entry/entry_64_compat.S | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index e479ff847023a..48c27c3fdfdbd 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -87,15 +87,25 @@ ENTRY(entry_SYSENTER_compat)
 	pushq	%rcx			/* pt_regs->cx */
 	pushq	$-ENOSYS		/* pt_regs->ax */
 	pushq   $0			/* pt_regs->r8  = 0 */
+	xorq	%r8, %r8		/* nospec   r8 */
 	pushq   $0			/* pt_regs->r9  = 0 */
+	xorq	%r9, %r9		/* nospec   r9 */
 	pushq   $0			/* pt_regs->r10 = 0 */
+	xorq	%r10, %r10		/* nospec   r10 */
 	pushq   $0			/* pt_regs->r11 = 0 */
+	xorq	%r11, %r11		/* nospec   r11 */
 	pushq   %rbx                    /* pt_regs->rbx */
+	xorl	%ebx, %ebx		/* nospec   rbx */
 	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
+	xorl	%ebp, %ebp		/* nospec   rbp */
 	pushq   $0			/* pt_regs->r12 = 0 */
+	xorq	%r12, %r12		/* nospec   r12 */
 	pushq   $0			/* pt_regs->r13 = 0 */
+	xorq	%r13, %r13		/* nospec   r13 */
 	pushq   $0			/* pt_regs->r14 = 0 */
+	xorq	%r14, %r14		/* nospec   r14 */
 	pushq   $0			/* pt_regs->r15 = 0 */
+	xorq	%r15, %r15		/* nospec   r15 */
 	cld
 
 	/*
@@ -185,15 +195,25 @@ ENTRY(entry_SYSCALL_compat)
 	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
 	pushq	$-ENOSYS		/* pt_regs->ax */
 	pushq   $0			/* pt_regs->r8  = 0 */
+	xorq	%r8, %r8		/* nospec   r8 */
 	pushq   $0			/* pt_regs->r9  = 0 */
+	xorq	%r9, %r9		/* nospec   r9 */
 	pushq   $0			/* pt_regs->r10 = 0 */
+	xorq	%r10, %r10		/* nospec   r10 */
 	pushq   $0			/* pt_regs->r11 = 0 */
+	xorq	%r11, %r11		/* nospec   r11 */
 	pushq   %rbx                    /* pt_regs->rbx */
+	xorl	%ebx, %ebx		/* nospec   rbx */
 	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
+	xorl	%ebp, %ebp		/* nospec   rbp */
 	pushq   $0			/* pt_regs->r12 = 0 */
+	xorq	%r12, %r12		/* nospec   r12 */
 	pushq   $0			/* pt_regs->r13 = 0 */
+	xorq	%r13, %r13		/* nospec   r13 */
 	pushq   $0			/* pt_regs->r14 = 0 */
+	xorq	%r14, %r14		/* nospec   r14 */
 	pushq   $0			/* pt_regs->r15 = 0 */
+	xorq	%r15, %r15		/* nospec   r15 */
 
 	/*
 	 * User mode is traced as though IRQs are on, and SYSENTER
@@ -291,15 +311,25 @@ ENTRY(entry_INT80_compat)
 	pushq	%rcx			/* pt_regs->cx */
 	pushq	$-ENOSYS		/* pt_regs->ax */
 	pushq   $0			/* pt_regs->r8  = 0 */
+	xorq	%r8, %r8		/* nospec   r8 */
 	pushq   $0			/* pt_regs->r9  = 0 */
+	xorq	%r9, %r9		/* nospec   r9 */
 	pushq   $0			/* pt_regs->r10 = 0 */
+	xorq	%r10, %r10		/* nospec   r10 */
 	pushq   $0			/* pt_regs->r11 = 0 */
+	xorq	%r11, %r11		/* nospec   r11 */
 	pushq   %rbx                    /* pt_regs->rbx */
+	xorl	%ebx, %ebx		/* nospec   rbx */
 	pushq   %rbp                    /* pt_regs->rbp */
+	xorl	%ebp, %ebp		/* nospec   rbp */
 	pushq   %r12                    /* pt_regs->r12 */
+	xorq	%r12, %r12		/* nospec   r12 */
 	pushq   %r13                    /* pt_regs->r13 */
+	xorq	%r13, %r13		/* nospec   r13 */
 	pushq   %r14                    /* pt_regs->r14 */
+	xorq	%r14, %r14		/* nospec   r14 */
 	pushq   %r15                    /* pt_regs->r15 */
+	xorq	%r15, %r15		/* nospec   r15 */
 	cld
 
 	/*

From 6daba5194de224a09e61e5cbc821229e24990148 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:31:04 -0700
Subject: [PATCH 1295/1852] x86/speculation: Update Speculation Control
 microcode blacklist

commit 1751342095f0d2b36fa8114d8e12c5688c455ac4 upstream.

Intel have retroactively blessed the 0xc2 microcode on Skylake mobile
and desktop parts, and the Gemini Lake 0x22 microcode is apparently fine
too. We blacklisted the latter purely because it was present with all
the other problematic ones in the 2018-01-08 release, but now it's
explicitly listed as OK.

We still list 0x84 for the various Kaby Lake / Coffee Lake parts, as
that appeared in one version of the blacklist and then reverted to
0x80 again. We can change it if 0x84 is actually announced to be safe.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: arjan.van.de.ven@intel.com
Cc: jmattson@google.com
Cc: karahmed@amazon.de
Cc: kvm@vger.kernel.org
Cc: pbonzini@redhat.com
Cc: rkrcmar@redhat.com
Cc: sironi@amazon.de
Link: http://lkml.kernel.org/r/1518305967-31356-2-git-send-email-dwmw@amazon.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/intel.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 0f13189017779..71492d29456fc 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -47,8 +47,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
 	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x84 },
 	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
 	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
-	{ INTEL_FAM6_SKYLAKE_MOBILE,	0x03,	0xc2 },
-	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
 	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
 	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
 	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },
@@ -60,8 +58,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
 	{ INTEL_FAM6_HASWELL_X,		0x02,	0x3b },
 	{ INTEL_FAM6_HASWELL_X,		0x04,	0x10 },
 	{ INTEL_FAM6_IVYBRIDGE_X,	0x04,	0x42a },
-	/* Updated in the 20180108 release; blacklist until we know otherwise */
-	{ INTEL_FAM6_ATOM_GEMINI_LAKE,	0x01,	0x22 },
 	/* Observed in the wild */
 	{ INTEL_FAM6_SANDYBRIDGE_X,	0x06,	0x61b },
 	{ INTEL_FAM6_SANDYBRIDGE_X,	0x07,	0x712 },

From 72b815ea5f62bc0e27a82df8fefe4115fe406599 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:31:13 -0700
Subject: [PATCH 1296/1852] x86/speculation: Correct Speculation Control
 microcode blacklist again

commit d37fc6d360a404b208547ba112e7dabb6533c7fc upstream.

Arjan points out that the Intel document only clears the 0xc2 microcode
on *some* parts with CPUID 506E3 (INTEL_FAM6_SKYLAKE_DESKTOP stepping 3).
For the Skylake H/S platform it's OK but for Skylake E3 which has the
same CPUID it isn't (yet) cleared.

So removing it from the blacklist was premature. Put it back for now.

Also, Arjan assures me that the 0x84 microcode for Kaby Lake which was
featured in one of the early revisions of the Intel document was never
released to the public, and won't be until/unless it is also validated
as safe. So those can change to 0x80 which is what all *other* versions
of the doc have identified.

Once the retrospective testing of existing public microcodes is done, we
should be back into a mode where new microcodes are only released in
batches and we shouldn't even need to update the blacklist for those
anyway, so this tweaking of the list isn't expected to be a thing which
keeps happening.

Requested-by: Arjan van de Ven <arjan.van.de.ven@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: arjan.van.de.ven@intel.com
Cc: dave.hansen@intel.com
Cc: kvm@vger.kernel.org
Cc: pbonzini@redhat.com
Link: http://lkml.kernel.org/r/1518449255-2182-1-git-send-email-dwmw@amazon.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/intel.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 71492d29456fc..b69d258f9aae1 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -40,13 +40,14 @@ struct sku_microcode {
 	u32 microcode;
 };
 static const struct sku_microcode spectre_bad_microcodes[] = {
-	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0B,	0x84 },
-	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0A,	0x84 },
-	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x09,	0x84 },
-	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x0A,	0x84 },
-	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x84 },
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0B,	0x80 },
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x0A,	0x80 },
+	{ INTEL_FAM6_KABYLAKE_DESKTOP,	0x09,	0x80 },
+	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x0A,	0x80 },
+	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },
 	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
 	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
+	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
 	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
 	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
 	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },

From c0ed13e5cb540155a817647d00981226b2ea8a80 Mon Sep 17 00:00:00 2001
From: Ingo Molnar <mingo@kernel.org>
Date: Sat, 14 Jul 2018 02:31:23 -0700
Subject: [PATCH 1297/1852] x86/speculation: Clean up various Spectre related
 details

commit 21e433bdb95bdf3aa48226fd3d33af608437f293 upstream.

Harmonize all the Spectre messages so that a:

    dmesg | grep -i spectre

... gives us most Spectre related kernel boot messages.

Also fix a few other details:

 - clarify a comment about firmware speculation control

 - s/KPTI/PTI

 - remove various line-breaks that made the code uglier

Acked-by: David Woodhouse <dwmw@amazon.co.uk>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 25 ++++++++++---------------
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 1968baf66c487..fea368ddcd857 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -162,8 +162,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
 	if (cmdline_find_option_bool(boot_command_line, "nospectre_v2"))
 		return SPECTRE_V2_CMD_NONE;
 	else {
-		ret = cmdline_find_option(boot_command_line, "spectre_v2", arg,
-					  sizeof(arg));
+		ret = cmdline_find_option(boot_command_line, "spectre_v2", arg, sizeof(arg));
 		if (ret < 0)
 			return SPECTRE_V2_CMD_AUTO;
 
@@ -184,8 +183,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
 	     cmd == SPECTRE_V2_CMD_RETPOLINE_AMD ||
 	     cmd == SPECTRE_V2_CMD_RETPOLINE_GENERIC) &&
 	    !IS_ENABLED(CONFIG_RETPOLINE)) {
-		pr_err("%s selected but not compiled in. Switching to AUTO select\n",
-		       mitigation_options[i].option);
+		pr_err("%s selected but not compiled in. Switching to AUTO select\n", mitigation_options[i].option);
 		return SPECTRE_V2_CMD_AUTO;
 	}
 
@@ -255,14 +253,14 @@ static void __init spectre_v2_select_mitigation(void)
 			goto retpoline_auto;
 		break;
 	}
-	pr_err("kernel not compiled with retpoline; no mitigation available!");
+	pr_err("Spectre mitigation: kernel not compiled with retpoline; no mitigation available!");
 	return;
 
 retpoline_auto:
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
 	retpoline_amd:
 		if (!boot_cpu_has(X86_FEATURE_LFENCE_RDTSC)) {
-			pr_err("LFENCE not serializing. Switching to generic retpoline\n");
+			pr_err("Spectre mitigation: LFENCE not serializing, switching to generic retpoline\n");
 			goto retpoline_generic;
 		}
 		mode = retp_compiler() ? SPECTRE_V2_RETPOLINE_AMD :
@@ -280,7 +278,7 @@ static void __init spectre_v2_select_mitigation(void)
 	pr_info("%s\n", spectre_v2_strings[mode]);
 
 	/*
-	 * If neither SMEP or KPTI are available, there is a risk of
+	 * If neither SMEP nor PTI are available, there is a risk of
 	 * hitting userspace addresses in the RSB after a context switch
 	 * from a shallow call stack to a deeper one. To prevent this fill
 	 * the entire RSB, even when using IBRS.
@@ -294,21 +292,20 @@ static void __init spectre_v2_select_mitigation(void)
 	if ((!boot_cpu_has(X86_FEATURE_KAISER) &&
 	     !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
 		setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
-		pr_info("Filling RSB on context switch\n");
+		pr_info("Spectre v2 mitigation: Filling RSB on context switch\n");
 	}
 
 	/* Initialize Indirect Branch Prediction Barrier if supported */
 	if (boot_cpu_has(X86_FEATURE_IBPB)) {
 		setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
-		pr_info("Enabling Indirect Branch Prediction Barrier\n");
+		pr_info("Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier\n");
 	}
 }
 
 #undef pr_fmt
 
 #ifdef CONFIG_SYSFS
-ssize_t cpu_show_meltdown(struct device *dev,
-			  struct device_attribute *attr, char *buf)
+ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
 		return sprintf(buf, "Not affected\n");
@@ -317,16 +314,14 @@ ssize_t cpu_show_meltdown(struct device *dev,
 	return sprintf(buf, "Vulnerable\n");
 }
 
-ssize_t cpu_show_spectre_v1(struct device *dev,
-			    struct device_attribute *attr, char *buf)
+ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1))
 		return sprintf(buf, "Not affected\n");
 	return sprintf(buf, "Mitigation: __user pointer sanitization\n");
 }
 
-ssize_t cpu_show_spectre_v2(struct device *dev,
-			    struct device_attribute *attr, char *buf)
+ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2))
 		return sprintf(buf, "Not affected\n");

From d9330f96b57574753eaebba16ab993e23d180e65 Mon Sep 17 00:00:00 2001
From: Dan Williams <dan.j.williams@intel.com>
Date: Sat, 14 Jul 2018 02:31:32 -0700
Subject: [PATCH 1298/1852] x86/speculation: Fix up array_index_nospec_mask()
 asm constraint

commit be3233fbfcb8f5acb6e3bcd0895c3ef9e100d470 upstream.

Allow the compiler to handle @size as an immediate value or memory
directly rather than allocating a register.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/151797010204.1289.1510000292250184993.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/barrier.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index e3a6f66d288c5..7f5dcb64cedb2 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -40,7 +40,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
 
 	asm volatile ("cmp %1,%2; sbb %0,%0;"
 			:"=r" (mask)
-			:"r"(size),"r" (index)
+			:"g"(size),"r" (index)
 			:"cc");
 	return mask;
 }

From a23311ace4dc93ab1c8c098c6fc014fa368b6798 Mon Sep 17 00:00:00 2001
From: Peter Zijlstra <peterz@infradead.org>
Date: Sat, 14 Jul 2018 02:31:40 -0700
Subject: [PATCH 1299/1852] x86/speculation: Add <asm/msr-index.h> dependency

commit ea00f301285ea2f07393678cd2b6057878320c9d upstream.

Joe Konno reported a compile failure resulting from using an MSR
without inclusion of <asm/msr-index.h>, and while the current code builds
fine (by accident) this needs fixing for future patches.

Reported-by: Joe Konno <joe.konno@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: arjan@linux.intel.com
Cc: bp@alien8.de
Cc: dan.j.williams@intel.com
Cc: dave.hansen@linux.intel.com
Cc: dwmw2@infradead.org
Cc: dwmw@amazon.co.uk
Cc: gregkh@linuxfoundation.org
Cc: hpa@zytor.com
Cc: jpoimboe@redhat.com
Cc: linux-tip-commits@vger.kernel.org
Cc: luto@kernel.org
Fixes: 20ffa1caecca ("x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) support")
Link: http://lkml.kernel.org/r/20180213132819.GJ25201@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 8dcecb9123659..bca286042e4bc 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -6,6 +6,7 @@
 #include <asm/alternative.h>
 #include <asm/alternative-asm.h>
 #include <asm/cpufeatures.h>
+#include <asm/msr-index.h>
 
 /*
  * Fill the CPU return stack buffer.

From 3a8153421a35cf0d317b794a10cd767d05be38e1 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Sat, 14 Jul 2018 02:31:49 -0700
Subject: [PATCH 1300/1852] x86/xen: Zero MSR_IA32_SPEC_CTRL before suspend

commit 71c208dd54ab971036d83ff6d9837bae4976e623 upstream.

Older Xen versions (4.5 and before) might have problems migrating pv
guests with MSR_IA32_SPEC_CTRL having a non-zero value. So before
suspending zero that MSR and restore it after being resumed.

Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Cc: stable@vger.kernel.org
Cc: xen-devel@lists.xenproject.org
Cc: boris.ostrovsky@oracle.com
Link: https://lkml.kernel.org/r/20180226140818.4849-1-jgross@suse.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/xen/suspend.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 7f664c416faf5..4ecd0de08557e 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -1,11 +1,14 @@
 #include <linux/types.h>
 #include <linux/tick.h>
+#include <linux/percpu-defs.h>
 
 #include <xen/xen.h>
 #include <xen/interface/xen.h>
 #include <xen/grant_table.h>
 #include <xen/events.h>
 
+#include <asm/cpufeatures.h>
+#include <asm/msr-index.h>
 #include <asm/xen/hypercall.h>
 #include <asm/xen/page.h>
 #include <asm/fixmap.h>
@@ -68,6 +71,8 @@ static void xen_pv_post_suspend(int suspend_cancelled)
 	xen_mm_unpin_all();
 }
 
+static DEFINE_PER_CPU(u64, spec_ctrl);
+
 void xen_arch_pre_suspend(void)
 {
 	if (xen_pv_domain())
@@ -84,6 +89,9 @@ void xen_arch_post_suspend(int cancelled)
 
 static void xen_vcpu_notify_restore(void *data)
 {
+	if (xen_pv_domain() && boot_cpu_has(X86_FEATURE_SPEC_CTRL))
+		wrmsrl(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl));
+
 	/* Boot processor notified via generic timekeeping_resume() */
 	if (smp_processor_id() == 0)
 		return;
@@ -93,7 +101,15 @@ static void xen_vcpu_notify_restore(void *data)
 
 static void xen_vcpu_notify_suspend(void *data)
 {
+	u64 tmp;
+
 	tick_suspend_local();
+
+	if (xen_pv_domain() && boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
+		rdmsrl(MSR_IA32_SPEC_CTRL, tmp);
+		this_cpu_write(spec_ctrl, tmp);
+		wrmsrl(MSR_IA32_SPEC_CTRL, 0);
+	}
 }
 
 void xen_arch_resume(void)

From 4776b21a27507d8a183217c21c9b60b5d6bd6c91 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:31:57 -0700
Subject: [PATCH 1301/1852] x86/mm: Factor out LDT init from context init

commit 39a0526fb3f7d93433d146304278477eb463f8af upstream

The arch-specific mm_context_t is a great place to put
protection-key allocation state.

But, we need to initialize the allocation state because pkey 0 is
always "allocated".  All of the runtime initialization of
mm_context_t is done in *_ldt() manipulation functions.  This
renames the existing LDT functions like this:

	init_new_context() -> init_new_context_ldt()
	destroy_context() -> destroy_context_ldt()

and makes init_new_context() and destroy_context() available for
generic use.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210234.DB34FCC5@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/mmu_context.h | 21 ++++++++++++++++-----
 arch/x86/kernel/ldt.c              |  4 ++--
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 9bfc5fd770156..1c4794f861d7a 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -52,15 +52,15 @@ struct ldt_struct {
 /*
  * Used for LDT copy/destruction.
  */
-int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
-void destroy_context(struct mm_struct *mm);
+int init_new_context_ldt(struct task_struct *tsk, struct mm_struct *mm);
+void destroy_context_ldt(struct mm_struct *mm);
 #else	/* CONFIG_MODIFY_LDT_SYSCALL */
-static inline int init_new_context(struct task_struct *tsk,
-				   struct mm_struct *mm)
+static inline int init_new_context_ldt(struct task_struct *tsk,
+				       struct mm_struct *mm)
 {
 	return 0;
 }
-static inline void destroy_context(struct mm_struct *mm) {}
+static inline void destroy_context_ldt(struct mm_struct *mm) {}
 #endif
 
 static inline void load_mm_ldt(struct mm_struct *mm)
@@ -102,6 +102,17 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 		this_cpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
 }
 
+static inline int init_new_context(struct task_struct *tsk,
+				   struct mm_struct *mm)
+{
+	init_new_context_ldt(tsk, mm);
+	return 0;
+}
+static inline void destroy_context(struct mm_struct *mm)
+{
+	destroy_context_ldt(mm);
+}
+
 extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 		      struct task_struct *tsk);
 
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index bc429365b72a9..8bc68cfc0d33f 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -119,7 +119,7 @@ static void free_ldt_struct(struct ldt_struct *ldt)
  * we do not have to muck with descriptors here, that is
  * done in switch_mm() as needed.
  */
-int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+int init_new_context_ldt(struct task_struct *tsk, struct mm_struct *mm)
 {
 	struct ldt_struct *new_ldt;
 	struct mm_struct *old_mm;
@@ -160,7 +160,7 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  *
  * 64bit: Don't touch the LDT register - we're already in the next thread.
  */
-void destroy_context(struct mm_struct *mm)
+void destroy_context_ldt(struct mm_struct *mm)
 {
 	free_ldt_struct(mm->context.ldt);
 	mm->context.ldt = NULL;

From 1f1f98494fdf36458d32f34f1d86a621b8002b5e Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Sat, 14 Jul 2018 02:32:07 -0700
Subject: [PATCH 1302/1852] x86/mm: Give each mm TLB flush generation a unique
 ID

commit f39681ed0f48498b80455095376f11535feea332 upstream.

This adds two new variables to mmu_context_t: ctx_id and tlb_gen.
ctx_id uniquely identifies the mm_struct and will never be reused.
For a given mm_struct (and hence ctx_id), tlb_gen is a monotonic
count of the number of times that a TLB flush has been requested.
The pair (ctx_id, tlb_gen) can be used as an identifier for TLB
flush actions and will be used in subsequent patches to reliably
determine whether all needed TLB flushes have occurred on a given
CPU.

This patch is split out for ease of review.  By itself, it has no
real effect other than creating and updating the new variables.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Nadav Amit <nadav.amit@gmail.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/413a91c24dab3ed0caa5f4e4d017d87b0857f920.1498751203.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/mmu.h         | 15 +++++++++++++--
 arch/x86/include/asm/mmu_context.h |  4 ++++
 arch/x86/mm/tlb.c                  |  2 ++
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
index 7680b76adafc0..3359dfedc7ee7 100644
--- a/arch/x86/include/asm/mmu.h
+++ b/arch/x86/include/asm/mmu.h
@@ -3,12 +3,18 @@
 
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
+#include <linux/atomic.h>
 
 /*
- * The x86 doesn't have a mmu context, but
- * we put the segment information here.
+ * x86 has arch-specific MMU state beyond what lives in mm_struct.
  */
 typedef struct {
+	/*
+	 * ctx_id uniquely identifies this mm_struct.  A ctx_id will never
+	 * be reused, and zero is not a valid ctx_id.
+	 */
+	u64 ctx_id;
+
 #ifdef CONFIG_MODIFY_LDT_SYSCALL
 	struct ldt_struct *ldt;
 #endif
@@ -24,6 +30,11 @@ typedef struct {
 	atomic_t perf_rdpmc_allowed;	/* nonzero if rdpmc is allowed */
 } mm_context_t;
 
+#define INIT_MM_CONTEXT(mm)						\
+	.context = {							\
+		.ctx_id = 1,						\
+	}
+
 void leave_mm(int cpu);
 
 #endif /* _ASM_X86_MMU_H */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 1c4794f861d7a..effc12767cbf1 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -11,6 +11,9 @@
 #include <asm/tlbflush.h>
 #include <asm/paravirt.h>
 #include <asm/mpx.h>
+
+extern atomic64_t last_mm_ctx_id;
+
 #ifndef CONFIG_PARAVIRT
 static inline void paravirt_activate_mm(struct mm_struct *prev,
 					struct mm_struct *next)
@@ -105,6 +108,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 static inline int init_new_context(struct task_struct *tsk,
 				   struct mm_struct *mm)
 {
+	mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
 	init_new_context_ldt(tsk, mm);
 	return 0;
 }
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 7cad01af6dcd2..efec198d271a5 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -29,6 +29,8 @@
  *	Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
  */
 
+atomic64_t last_mm_ctx_id = ATOMIC64_INIT(1);
+
 struct flush_tlb_info {
 	struct mm_struct *flush_mm;
 	unsigned long flush_start;

From f9cd89d1523bdcd3a0fd6aa6b6cd2d7d767b70ec Mon Sep 17 00:00:00 2001
From: Tim Chen <tim.c.chen@linux.intel.com>
Date: Sat, 14 Jul 2018 02:32:16 -0700
Subject: [PATCH 1303/1852] x86/speculation: Use Indirect Branch Prediction
 Barrier in context switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 18bf3c3ea8ece8f03b6fc58508f2dfd23c7711c7 upstream.

Flush indirect branches when switching into a process that marked itself
non dumpable. This protects high value processes like gpg better,
without having too high performance overhead.

If done naïvely, we could switch to a kernel idle thread and then back
to the original process, such as:

    process A -> idle -> process A

In such scenario, we do not have to do IBPB here even though the process
is non-dumpable, as we are switching back to the same process after a
hiatus.

To avoid the redundant IBPB, which is expensive, we track the last mm
user context ID. The cost is to have an extra u64 mm context id to track
the last mm we were using before switching to the init_mm used by idle.
Avoiding the extra IBPB is probably worth the extra memory for this
common scenario.

For those cases where tlb_defer_switch_to_init_mm() returns true (non
PCID), lazy tlb will defer switch to init_mm, so we will not be changing
the mm for the process A -> idle -> process A switch. So IBPB will be
skipped for this case.

Thanks to the reviewers and Andy Lutomirski for the suggestion of
using ctx_id which got rid of the problem of mm pointer recycling.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: linux@dominikbrodowski.net
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: luto@kernel.org
Cc: pbonzini@redhat.com
Link: https://lkml.kernel.org/r/1517263487-3708-1-git-send-email-dwmw@amazon.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/tlbflush.h |  2 ++
 arch/x86/mm/tlb.c               | 31 +++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index e2a89d2577fb6..8ce07db77299a 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -68,6 +68,8 @@ static inline void invpcid_flush_all_nonglobals(void)
 struct tlb_state {
 	struct mm_struct *active_mm;
 	int state;
+	/* last user mm's ctx id */
+	u64 last_ctx_id;
 
 	/*
 	 * Access to this CR4 shadow and to H/W CR4 is protected by
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index efec198d271a5..6d683bbb35021 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -10,6 +10,7 @@
 
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
+#include <asm/nospec-branch.h>
 #include <asm/cache.h>
 #include <asm/apic.h>
 #include <asm/uv/uv.h>
@@ -106,6 +107,36 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
 	unsigned cpu = smp_processor_id();
 
 	if (likely(prev != next)) {
+		u64 last_ctx_id = this_cpu_read(cpu_tlbstate.last_ctx_id);
+
+		/*
+		 * Avoid user/user BTB poisoning by flushing the branch
+		 * predictor when switching between processes. This stops
+		 * one process from doing Spectre-v2 attacks on another.
+		 *
+		 * As an optimization, flush indirect branches only when
+		 * switching into processes that disable dumping. This
+		 * protects high value processes like gpg, without having
+		 * too high performance overhead. IBPB is *expensive*!
+		 *
+		 * This will not flush branches when switching into kernel
+		 * threads. It will also not flush if we switch to idle
+		 * thread and back to the same process. It will flush if we
+		 * switch to a different non-dumpable process.
+		 */
+		if (tsk && tsk->mm &&
+		    tsk->mm->context.ctx_id != last_ctx_id &&
+		    get_dumpable(tsk->mm) != SUID_DUMP_USER)
+			indirect_branch_prediction_barrier();
+
+		/*
+		 * Record last user mm's context id, so we can avoid
+		 * flushing branch buffer with IBPB if we switch back
+		 * to the same user.
+		 */
+		if (next != &init_mm)
+			this_cpu_write(cpu_tlbstate.last_ctx_id, next->context.ctx_id);
+
 		this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
 		this_cpu_write(cpu_tlbstate.active_mm, next);
 		cpumask_set_cpu(cpu, mm_cpumask(next));

From d3aaceb83d819dfcac4d87e378dce23b487d5197 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:32:25 -0700
Subject: [PATCH 1304/1852] x86/spectre_v2: Don't check microcode versions when
 running under hypervisors
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 36268223c1e9981d6cfc33aff8520b3bde4b8114 upstream.

As:

 1) It's known that hypervisors lie about the environment anyhow (host
    mismatch)

 2) Even if the hypervisor (Xen, KVM, VMWare, etc) provided a valid
    "correct" value, it all gets to be very murky when migration happens
    (do you provide the "new" microcode of the machine?).

And in reality the cloud vendors are the ones that should make sure that
the microcode that is running is correct and we should just sing lalalala
and trust them.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Cc: Wanpeng Li <kernellwp@gmail.com>
Cc: kvm <kvm@vger.kernel.org>
Cc: Kr�mář <rkrcmar@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180226213019.GE9497@char.us.oracle.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/intel.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b69d258f9aae1..dcc03498cf108 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -68,6 +68,13 @@ static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
 {
 	int i;
 
+	/*
+	 * We know that the hypervisor lie to us on the microcode version so
+	 * we may as well hope that it is running the correct version.
+	 */
+	if (cpu_has(c, X86_FEATURE_HYPERVISOR))
+		return false;
+
 	for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) {
 		if (c->x86_model == spectre_bad_microcodes[i].model &&
 		    c->x86_mask == spectre_bad_microcodes[i].stepping)

From 3d816294deda61c3f94d2a5fa1788450c7ac1d65 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:32:33 -0700
Subject: [PATCH 1305/1852] x86/speculation: Use IBRS if available before
 calling into firmware

commit dd84441a797150dcc49298ec95c459a8891d8bb1 upstream.

Retpoline means the kernel is safe because it has no indirect branches.
But firmware isn't, so use IBRS for firmware calls if it's available.

Block preemption while IBRS is set, although in practice the call sites
already had to be doing that.

Ignore hpwdt.c for now. It's taking spinlocks and calling into firmware
code, from an NMI handler. I don't want to touch that with a bargepole.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: arjan.van.de.ven@intel.com
Cc: bp@alien8.de
Cc: dave.hansen@intel.com
Cc: jmattson@google.com
Cc: karahmed@amazon.de
Cc: kvm@vger.kernel.org
Cc: pbonzini@redhat.com
Cc: rkrcmar@redhat.com
Link: http://lkml.kernel.org/r/1519037457-7643-2-git-send-email-dwmw@amazon.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, patching the efi_call_virt() family of functions,
  which are the 4.4.y-equivalents of arch_efi_call_virt_setup()/teardown() ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/apm.h           |  6 +++++
 arch/x86/include/asm/cpufeatures.h   |  1 +
 arch/x86/include/asm/efi.h           |  7 +++++
 arch/x86/include/asm/nospec-branch.h | 39 +++++++++++++++++++++-------
 arch/x86/kernel/cpu/bugs.c           | 12 ++++++++-
 arch/x86/platform/efi/efi_64.c       |  3 +++
 6 files changed, 58 insertions(+), 10 deletions(-)

diff --git a/arch/x86/include/asm/apm.h b/arch/x86/include/asm/apm.h
index 20370c6db74bb..3d1ec41ae09ab 100644
--- a/arch/x86/include/asm/apm.h
+++ b/arch/x86/include/asm/apm.h
@@ -6,6 +6,8 @@
 #ifndef _ASM_X86_MACH_DEFAULT_APM_H
 #define _ASM_X86_MACH_DEFAULT_APM_H
 
+#include <asm/nospec-branch.h>
+
 #ifdef APM_ZERO_SEGS
 #	define APM_DO_ZERO_SEGS \
 		"pushl %%ds\n\t" \
@@ -31,6 +33,7 @@ static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
 	 * N.B. We do NOT need a cld after the BIOS call
 	 * because we always save and restore the flags.
 	 */
+	firmware_restrict_branch_speculation_start();
 	__asm__ __volatile__(APM_DO_ZERO_SEGS
 		"pushl %%edi\n\t"
 		"pushl %%ebp\n\t"
@@ -43,6 +46,7 @@ static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
 		  "=S" (*esi)
 		: "a" (func), "b" (ebx_in), "c" (ecx_in)
 		: "memory", "cc");
+	firmware_restrict_branch_speculation_end();
 }
 
 static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
@@ -55,6 +59,7 @@ static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
 	 * N.B. We do NOT need a cld after the BIOS call
 	 * because we always save and restore the flags.
 	 */
+	firmware_restrict_branch_speculation_start();
 	__asm__ __volatile__(APM_DO_ZERO_SEGS
 		"pushl %%edi\n\t"
 		"pushl %%ebp\n\t"
@@ -67,6 +72,7 @@ static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
 		  "=S" (si)
 		: "a" (func), "b" (ebx_in), "c" (ecx_in)
 		: "memory", "cc");
+	firmware_restrict_branch_speculation_end();
 	return error;
 }
 
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 782005d7eb487..bc76bf39bb2f1 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -202,6 +202,7 @@
 #define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
 
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
+#define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 08b1f2f6ea50c..cfde088f8e95e 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -3,6 +3,7 @@
 
 #include <asm/fpu/api.h>
 #include <asm/pgtable.h>
+#include <asm/nospec-branch.h>
 
 /*
  * We map the EFI regions needed for runtime services non-contiguously,
@@ -41,8 +42,10 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...);
 ({									\
 	efi_status_t __s;						\
 	kernel_fpu_begin();						\
+	firmware_restrict_branch_speculation_start();			\
 	__s = ((efi_##f##_t __attribute__((regparm(0)))*)		\
 		efi.systab->runtime->f)(args);				\
+	firmware_restrict_branch_speculation_end();			\
 	kernel_fpu_end();						\
 	__s;								\
 })
@@ -51,8 +54,10 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...);
 #define __efi_call_virt(f, args...) \
 ({									\
 	kernel_fpu_begin();						\
+	firmware_restrict_branch_speculation_start();			\
 	((efi_##f##_t __attribute__((regparm(0)))*)			\
 		efi.systab->runtime->f)(args);				\
+	firmware_restrict_branch_speculation_end();			\
 	kernel_fpu_end();						\
 })
 
@@ -73,7 +78,9 @@ extern u64 asmlinkage efi_call(void *fp, ...);
 	efi_sync_low_kernel_mappings();					\
 	preempt_disable();						\
 	__kernel_fpu_begin();						\
+	firmware_restrict_branch_speculation_start();			\
 	__s = efi_call((void *)efi.systab->runtime->f, __VA_ARGS__);	\
+	firmware_restrict_branch_speculation_end();			\
 	__kernel_fpu_end();						\
 	preempt_enable();						\
 	__s;								\
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index bca286042e4bc..36ded24ca3818 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -195,17 +195,38 @@ static inline void vmexit_fill_RSB(void)
 #endif
 }
 
+#define alternative_msr_write(_msr, _val, _feature)		\
+	asm volatile(ALTERNATIVE("",				\
+				 "movl %[msr], %%ecx\n\t"	\
+				 "movl %[val], %%eax\n\t"	\
+				 "movl $0, %%edx\n\t"		\
+				 "wrmsr",			\
+				 _feature)			\
+		     : : [msr] "i" (_msr), [val] "i" (_val)	\
+		     : "eax", "ecx", "edx", "memory")
+
 static inline void indirect_branch_prediction_barrier(void)
 {
-	asm volatile(ALTERNATIVE("",
-				 "movl %[msr], %%ecx\n\t"
-				 "movl %[val], %%eax\n\t"
-				 "movl $0, %%edx\n\t"
-				 "wrmsr",
-				 X86_FEATURE_USE_IBPB)
-		     : : [msr] "i" (MSR_IA32_PRED_CMD),
-			 [val] "i" (PRED_CMD_IBPB)
-		     : "eax", "ecx", "edx", "memory");
+	alternative_msr_write(MSR_IA32_PRED_CMD, PRED_CMD_IBPB,
+			      X86_FEATURE_USE_IBPB);
+}
+
+/*
+ * With retpoline, we must use IBRS to restrict branch prediction
+ * before calling into firmware.
+ */
+static inline void firmware_restrict_branch_speculation_start(void)
+{
+	preempt_disable();
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS,
+			      X86_FEATURE_USE_IBRS_FW);
+}
+
+static inline void firmware_restrict_branch_speculation_end(void)
+{
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,
+			      X86_FEATURE_USE_IBRS_FW);
+	preempt_enable();
 }
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index fea368ddcd857..b294fdc0faf22 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -300,6 +300,15 @@ static void __init spectre_v2_select_mitigation(void)
 		setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
 		pr_info("Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier\n");
 	}
+
+	/*
+	 * Retpoline means the kernel is safe because it has no indirect
+	 * branches. But firmware isn't, so use IBRS to protect that.
+	 */
+	if (boot_cpu_has(X86_FEATURE_IBRS)) {
+		setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW);
+		pr_info("Enabling Restricted Speculation for firmware calls\n");
+	}
 }
 
 #undef pr_fmt
@@ -326,8 +335,9 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
 	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2))
 		return sprintf(buf, "Not affected\n");
 
-	return sprintf(buf, "%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
+	return sprintf(buf, "%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
 		       boot_cpu_has(X86_FEATURE_USE_IBPB) ? ", IBPB" : "",
+		       boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "",
 		       spectre_v2_module_string());
 }
 #endif
diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c
index a0ac0f9c307f6..f5a8cd96bae48 100644
--- a/arch/x86/platform/efi/efi_64.c
+++ b/arch/x86/platform/efi/efi_64.c
@@ -40,6 +40,7 @@
 #include <asm/fixmap.h>
 #include <asm/realmode.h>
 #include <asm/time.h>
+#include <asm/nospec-branch.h>
 
 /*
  * We allocate runtime services regions bottom-up, starting from -4G, i.e.
@@ -347,6 +348,7 @@ extern efi_status_t efi64_thunk(u32, ...);
 									\
 	efi_sync_low_kernel_mappings();					\
 	local_irq_save(flags);						\
+	firmware_restrict_branch_speculation_start();			\
 									\
 	efi_scratch.prev_cr3 = read_cr3();				\
 	write_cr3((unsigned long)efi_scratch.efi_pgt);			\
@@ -357,6 +359,7 @@ extern efi_status_t efi64_thunk(u32, ...);
 									\
 	write_cr3(efi_scratch.prev_cr3);				\
 	__flush_tlb_all();						\
+	firmware_restrict_branch_speculation_end();			\
 	local_irq_restore(flags);					\
 									\
 	__s;								\

From a1129fd9f0541f4af3c5b2814c9da8e01bba6fe4 Mon Sep 17 00:00:00 2001
From: Ingo Molnar <mingo@kernel.org>
Date: Sat, 14 Jul 2018 02:32:43 -0700
Subject: [PATCH 1306/1852] x86/speculation: Move
 firmware_restrict_branch_speculation_*() from C to CPP

commit d72f4e29e6d84b7ec02ae93088aa459ac70e733b upstream.

firmware_restrict_branch_speculation_*() recently started using
preempt_enable()/disable(), but those are relatively high level
primitives and cause build failures on some 32-bit builds.

Since we want to keep <asm/nospec-branch.h> low level, convert
them to macros to avoid header hell...

Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: arjan.van.de.ven@intel.com
Cc: bp@alien8.de
Cc: dave.hansen@intel.com
Cc: jmattson@google.com
Cc: karahmed@amazon.de
Cc: kvm@vger.kernel.org
Cc: pbonzini@redhat.com
Cc: rkrcmar@redhat.com
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 36ded24ca3818..b9dd1d9ef8af6 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -214,20 +214,22 @@ static inline void indirect_branch_prediction_barrier(void)
 /*
  * With retpoline, we must use IBRS to restrict branch prediction
  * before calling into firmware.
+ *
+ * (Implemented as CPP macros due to header hell.)
  */
-static inline void firmware_restrict_branch_speculation_start(void)
-{
-	preempt_disable();
-	alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS,
-			      X86_FEATURE_USE_IBRS_FW);
-}
+#define firmware_restrict_branch_speculation_start()			\
+do {									\
+	preempt_disable();						\
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS,	\
+			      X86_FEATURE_USE_IBRS_FW);			\
+} while (0)
 
-static inline void firmware_restrict_branch_speculation_end(void)
-{
-	alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,
-			      X86_FEATURE_USE_IBRS_FW);
-	preempt_enable();
-}
+#define firmware_restrict_branch_speculation_end()			\
+do {									\
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,			\
+			      X86_FEATURE_USE_IBRS_FW);			\
+	preempt_enable();						\
+} while (0)
 
 #endif /* __ASSEMBLY__ */
 

From 811459331149c2c8ba4798b68dd9c2557b21f2fc Mon Sep 17 00:00:00 2001
From: Alexander Sergeyev <sergeev917@gmail.com>
Date: Sat, 14 Jul 2018 02:32:52 -0700
Subject: [PATCH 1307/1852] x86/speculation: Remove Skylake C2 from Speculation
 Control microcode blacklist

commit e3b3121fa8da94cb20f9e0c64ab7981ae47fd085 upstream.

In accordance with Intel's microcode revision guidance from March 6 MCU
rev 0xc2 is cleared on both Skylake H/S and Skylake Xeon E3 processors
that share CPUID 506E3.

Signed-off-by: Alexander Sergeyev <sergeev917@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jia Zhang <qianyue.zj@alibaba-inc.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kyle Huey <me@kylehuey.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Link: https://lkml.kernel.org/r/20180313193856.GA8580@localhost.localdomain
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/intel.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index dcc03498cf108..77d9f6809b05b 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -29,7 +29,7 @@
 /*
  * Early microcode releases for the Spectre v2 mitigation were broken.
  * Information taken from;
- * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
+ * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
  * - https://kb.vmware.com/s/article/52345
  * - Microcode revisions observed in the wild
  * - Release note from 20180108 microcode release
@@ -47,7 +47,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
 	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },
 	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },
 	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },
-	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },
 	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },
 	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },
 	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },

From 8247de6bb2c1c492ba4f9641de35bbeaa1ed3d36 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micka=C3=ABl=20Sala=C3=BCn?= <mic@digikod.net>
Date: Sat, 14 Jul 2018 02:33:00 -0700
Subject: [PATCH 1308/1852] selftest/seccomp: Fix the flag name
 SECCOMP_FILTER_FLAG_TSYNC
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 6c045d07bb305c527140bdec4cf8ab50f7c980d8 upstream

Rename SECCOMP_FLAG_FILTER_TSYNC to SECCOMP_FILTER_FLAG_TSYNC to match
the UAPI.

Signed-off-by: Mickaël Salaün <mic@digikod.net>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Kees Cook <keescook@chromium.org>
Cc: Shuah Khan <shuahkh@osg.samsung.com>
Cc: Will Drewry <wad@chromium.org>
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/seccomp/seccomp_bpf.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c b/tools/testing/selftests/seccomp/seccomp_bpf.c
index 882fe83a35544..d446346d9146d 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -1476,8 +1476,8 @@ TEST_F(TRACE_syscall, syscall_dropped)
 #define SECCOMP_SET_MODE_FILTER 1
 #endif
 
-#ifndef SECCOMP_FLAG_FILTER_TSYNC
-#define SECCOMP_FLAG_FILTER_TSYNC 1
+#ifndef SECCOMP_FILTER_FLAG_TSYNC
+#define SECCOMP_FILTER_FLAG_TSYNC 1
 #endif
 
 #ifndef seccomp
@@ -1592,7 +1592,7 @@ TEST(TSYNC_first)
 		TH_LOG("Kernel does not support PR_SET_NO_NEW_PRIVS!");
 	}
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &prog);
 	ASSERT_NE(ENOSYS, errno) {
 		TH_LOG("Kernel does not support seccomp syscall!");
@@ -1810,7 +1810,7 @@ TEST_F(TSYNC, two_siblings_with_ancestor)
 		self->sibling_count++;
 	}
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_EQ(0, ret) {
 		TH_LOG("Could install filter on all threads!");
@@ -1871,7 +1871,7 @@ TEST_F(TSYNC, two_siblings_with_no_filter)
 		TH_LOG("Kernel does not support PR_SET_NO_NEW_PRIVS!");
 	}
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_NE(ENOSYS, errno) {
 		TH_LOG("Kernel does not support seccomp syscall!");
@@ -1919,7 +1919,7 @@ TEST_F(TSYNC, two_siblings_with_one_divergence)
 		self->sibling_count++;
 	}
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_EQ(self->sibling[0].system_tid, ret) {
 		TH_LOG("Did not fail on diverged sibling.");
@@ -1971,7 +1971,7 @@ TEST_F(TSYNC, two_siblings_not_under_filter)
 		TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!");
 	}
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_EQ(ret, self->sibling[0].system_tid) {
 		TH_LOG("Did not fail on diverged sibling.");
@@ -2000,7 +2000,7 @@ TEST_F(TSYNC, two_siblings_not_under_filter)
 	/* Switch to the remaining sibling */
 	sib = !sib;
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_EQ(0, ret) {
 		TH_LOG("Expected the remaining sibling to sync");
@@ -2023,7 +2023,7 @@ TEST_F(TSYNC, two_siblings_not_under_filter)
 	while (!kill(self->sibling[sib].system_tid, 0))
 		sleep(0.1);
 
-	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FILTER_FLAG_TSYNC,
 		      &self->apply_prog);
 	ASSERT_EQ(0, ret);  /* just us chickens */
 }

From d34c23e704ad1596c99a5d502adb41f9cdf7e69f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micka=C3=ABl=20Sala=C3=BCn?= <mic@digikod.net>
Date: Sat, 14 Jul 2018 02:33:08 -0700
Subject: [PATCH 1309/1852] selftest/seccomp: Fix the seccomp(2) signature
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 505ce68c6da3432454c62e43c24a22ea5b1d754b upstream

Signed-off-by: Mickaël Salaün <mic@digikod.net>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Kees Cook <keescook@chromium.org>
Cc: Shuah Khan <shuahkh@osg.samsung.com>
Cc: Will Drewry <wad@chromium.org>
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/seccomp/seccomp_bpf.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c b/tools/testing/selftests/seccomp/seccomp_bpf.c
index d446346d9146d..29487e0437ad8 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -1481,10 +1481,10 @@ TEST_F(TRACE_syscall, syscall_dropped)
 #endif
 
 #ifndef seccomp
-int seccomp(unsigned int op, unsigned int flags, struct sock_fprog *filter)
+int seccomp(unsigned int op, unsigned int flags, void *args)
 {
 	errno = 0;
-	return syscall(__NR_seccomp, op, flags, filter);
+	return syscall(__NR_seccomp, op, flags, args);
 }
 #endif
 

From 82bbe5c1189bc1f592854be9f86fbea2515a5182 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Sat, 14 Jul 2018 02:33:16 -0700
Subject: [PATCH 1310/1852] xen: set cpu capabilities from xen_start_kernel()

Upstream commit: 0808e80cb760de2733c0527d2090ed2205a1eef8 ("xen: set
cpu capabilities from xen_start_kernel()")

There is no need to set the same capabilities for each cpu
individually. This can easily be done for all cpus when starting the
kernel.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/xen/enlighten.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index cbef64b508e10..2d7ab4e23e9ee 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -460,6 +460,14 @@ static void __init xen_init_cpuid_mask(void)
 		cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
 }
 
+static void __init xen_init_capabilities(void)
+{
+	if (xen_pv_domain()) {
+		setup_clear_cpu_cap(X86_BUG_SYSRET_SS_ATTRS);
+		setup_force_cpu_cap(X86_FEATURE_XENPV);
+	}
+}
+
 static void xen_set_debugreg(int reg, unsigned long val)
 {
 	HYPERVISOR_set_debugreg(reg, val);
@@ -1587,6 +1595,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
 
 	xen_init_irq_ops();
 	xen_init_cpuid_mask();
+	xen_init_capabilities();
 
 #ifdef CONFIG_X86_LOCAL_APIC
 	/*
@@ -1883,14 +1892,6 @@ bool xen_hvm_need_lapic(void)
 }
 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
 
-static void xen_set_cpu_features(struct cpuinfo_x86 *c)
-{
-	if (xen_pv_domain()) {
-		clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
-		set_cpu_cap(c, X86_FEATURE_XENPV);
-	}
-}
-
 const struct hypervisor_x86 x86_hyper_xen = {
 	.name			= "Xen",
 	.detect			= xen_platform,
@@ -1898,7 +1899,6 @@ const struct hypervisor_x86 x86_hyper_xen = {
 	.init_platform		= xen_hvm_guest_init,
 #endif
 	.x2apic_available	= xen_x2apic_para_available,
-	.set_cpu_features       = xen_set_cpu_features,
 };
 EXPORT_SYMBOL(x86_hyper_xen);
 

From a75a71d106bdc81c0880bf2622850a18fb592532 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:33:24 -0700
Subject: [PATCH 1311/1852] x86/amd: don't set X86_BUG_SYSRET_SS_ATTRS when
 running under Xen

commit def9331a12977770cc6132d79f8e6565871e8e38 upstream

When running as Xen pv guest X86_BUG_SYSRET_SS_ATTRS must not be set
on AMD cpus.

This bug/feature bit is kind of special as it will be used very early
when switching threads. Setting the bit and clearing it a little bit
later leaves a critical window where things can go wrong. This time
window has enlarged a little bit by using setup_clear_cpu_cap() instead
of the hypervisor's set_cpu_features callback. It seems this larger
window now makes it rather easy to hit the problem.

The proper solution is to never set the bit in case of Xen.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/amd.c | 5 +++--
 arch/x86/xen/enlighten.c  | 4 +---
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f4fb8f5b0be4d..9b2941422b68a 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -791,8 +791,9 @@ static void init_amd(struct cpuinfo_x86 *c)
 		if (cpu_has(c, X86_FEATURE_3DNOW) || cpu_has(c, X86_FEATURE_LM))
 			set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
 
-	/* AMD CPUs don't reset SS attributes on SYSRET */
-	set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
+	/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
+	if (!cpu_has(c, X86_FEATURE_XENPV))
+		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 2d7ab4e23e9ee..82fd84d5e1aa7 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -462,10 +462,8 @@ static void __init xen_init_cpuid_mask(void)
 
 static void __init xen_init_capabilities(void)
 {
-	if (xen_pv_domain()) {
-		setup_clear_cpu_cap(X86_BUG_SYSRET_SS_ATTRS);
+	if (xen_pv_domain())
 		setup_force_cpu_cap(X86_FEATURE_XENPV);
-	}
 }
 
 static void xen_set_debugreg(int reg, unsigned long val)

From 7e84e6abd54411ed3da554dcc979dd26d31fc21e Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sat, 14 Jul 2018 02:33:32 -0700
Subject: [PATCH 1312/1852] x86/nospec: Simplify alternative_msr_write()

commit 1aa7a5735a41418d8e01fa7c9565eb2657e2ea3f upstream

The macro is not type safe and I did look for why that "g" constraint for
the asm doesn't work: it's because the asm is more fundamentally wrong.

It does

        movl %[val], %%eax

but "val" isn't a 32-bit value, so then gcc will pass it in a register,
and generate code like

        movl %rsi, %eax

and gas will complain about a nonsensical 'mov' instruction (it's moving a
64-bit register to a 32-bit one).

Passing it through memory will just hide the real bug - gcc still thinks
the memory location is 64-bit, but the "movl" will only load the first 32
bits and it all happens to work because x86 is little-endian.

Convert it to a type safe inline function with a little trick which hands
the feature into the ALTERNATIVE macro.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index b9dd1d9ef8af6..6403016d34459 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -195,15 +195,16 @@ static inline void vmexit_fill_RSB(void)
 #endif
 }
 
-#define alternative_msr_write(_msr, _val, _feature)		\
-	asm volatile(ALTERNATIVE("",				\
-				 "movl %[msr], %%ecx\n\t"	\
-				 "movl %[val], %%eax\n\t"	\
-				 "movl $0, %%edx\n\t"		\
-				 "wrmsr",			\
-				 _feature)			\
-		     : : [msr] "i" (_msr), [val] "i" (_val)	\
-		     : "eax", "ecx", "edx", "memory")
+static __always_inline
+void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
+{
+	asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
+		: : "c" (msr),
+		    "a" (val),
+		    "d" (val >> 32),
+		    [feature] "i" (feature)
+		: "memory");
+}
 
 static inline void indirect_branch_prediction_barrier(void)
 {

From 377d7e44051e81c4bf6ddceb3e20ee34fb3867f1 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:33:40 -0700
Subject: [PATCH 1313/1852] x86/bugs: Concentrate bug detection into a separate
 function

commit 4a28bfe3267b68e22c663ac26185aa16c9b879ef upstream

Combine the various logic which goes through all those
x86_cpu_id matching structures in one function.

Suggested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 48499b41351cd..97558d1f9ef6a 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -835,21 +835,27 @@ static const __initconst struct x86_cpu_id cpu_no_meltdown[] = {
 	{}
 };
 
-static bool __init cpu_vulnerable_to_meltdown(struct cpuinfo_x86 *c)
+static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
 	u64 ia32_cap = 0;
 
+	if (x86_match_cpu(cpu_no_speculation))
+		return;
+
+	setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
+	setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+
 	if (x86_match_cpu(cpu_no_meltdown))
-		return false;
+		return;
 
 	if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
 		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
 	/* Rogue Data Cache Load? No! */
 	if (ia32_cap & ARCH_CAP_RDCL_NO)
-		return false;
+		return;
 
-	return true;
+	setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
 }
 
 /*
@@ -898,12 +904,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 
 	setup_force_cpu_cap(X86_FEATURE_ALWAYS);
 
-	if (!x86_match_cpu(cpu_no_speculation)) {
-		if (cpu_vulnerable_to_meltdown(c))
-			setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
-		setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
-		setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
-	}
+	cpu_set_bug_bits(c);
 
 	fpu__init_system(c);
 

From 3bebd61ad3269740dd5a68f7a6a51bc0758cc159 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:33:49 -0700
Subject: [PATCH 1314/1852] x86/bugs: Concentrate bug reporting into a separate
 function

commit d1059518b4789cabe34bb4b714d07e6089c82ca1 upstream

Those SysFS functions have a similar preamble, as such make common
code to handle them.

Suggested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 46 ++++++++++++++++++++++++++------------
 1 file changed, 32 insertions(+), 14 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index b294fdc0faf22..75f3d4974102b 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -314,30 +314,48 @@ static void __init spectre_v2_select_mitigation(void)
 #undef pr_fmt
 
 #ifdef CONFIG_SYSFS
-ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
+
+ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
+			char *buf, unsigned int bug)
 {
-	if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
+	if (!boot_cpu_has_bug(bug))
 		return sprintf(buf, "Not affected\n");
-	if (boot_cpu_has(X86_FEATURE_KAISER))
-		return sprintf(buf, "Mitigation: PTI\n");
+
+	switch (bug) {
+	case X86_BUG_CPU_MELTDOWN:
+		if (boot_cpu_has(X86_FEATURE_KAISER))
+			return sprintf(buf, "Mitigation: PTI\n");
+
+		break;
+
+	case X86_BUG_SPECTRE_V1:
+		return sprintf(buf, "Mitigation: __user pointer sanitization\n");
+
+	case X86_BUG_SPECTRE_V2:
+		return sprintf(buf, "%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
+			       boot_cpu_has(X86_FEATURE_USE_IBPB) ? ", IBPB" : "",
+			       boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "",
+			       spectre_v2_module_string());
+
+	default:
+		break;
+	}
+
 	return sprintf(buf, "Vulnerable\n");
 }
 
+ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	return cpu_show_common(dev, attr, buf, X86_BUG_CPU_MELTDOWN);
+}
+
 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1))
-		return sprintf(buf, "Not affected\n");
-	return sprintf(buf, "Mitigation: __user pointer sanitization\n");
+	return cpu_show_common(dev, attr, buf, X86_BUG_SPECTRE_V1);
 }
 
 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2))
-		return sprintf(buf, "Not affected\n");
-
-	return sprintf(buf, "%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],
-		       boot_cpu_has(X86_FEATURE_USE_IBPB) ? ", IBPB" : "",
-		       boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "",
-		       spectre_v2_module_string());
+	return cpu_show_common(dev, attr, buf, X86_BUG_SPECTRE_V2);
 }
 #endif

From 02c15d3e368057c669f0c30f7faf9cb04af9a22a Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:33:57 -0700
Subject: [PATCH 1315/1852] x86/bugs: Read SPEC_CTRL MSR during boot and re-use
 reserved bits

commit 1b86883ccb8d5d9506529d42dbe1a5257cb30b18 upstream

The 336996-Speculative-Execution-Side-Channel-Mitigations.pdf refers to all
the other bits as reserved. The Intel SDM glossary defines reserved as
implementation specific - aka unknown.

As such at bootup this must be taken it into account and proper masking for
the bits in use applied.

A copy of this document is available at
https://bugzilla.kernel.org/show_bug.cgi?id=199511

[ tglx: Made x86_spec_ctrl_base __ro_after_init ]
[ Srivatsa: Removed __ro_after_init for 4.4.y ]

Suggested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 24 ++++++++++++++++++++----
 arch/x86/kernel/cpu/bugs.c           | 27 +++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 6403016d34459..daec318298279 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -172,6 +172,17 @@ enum spectre_v2_mitigation {
 	SPECTRE_V2_IBRS,
 };
 
+/*
+ * The Intel specification for the SPEC_CTRL MSR requires that we
+ * preserve any already set reserved bits at boot time (e.g. for
+ * future additions that this kernel is not currently aware of).
+ * We then set any additional mitigation bits that we want
+ * ourselves and always use this as the base for SPEC_CTRL.
+ * We also use this when handling guest entry/exit as below.
+ */
+extern void x86_spec_ctrl_set(u64);
+extern u64 x86_spec_ctrl_get_default(void);
+
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
@@ -208,8 +219,9 @@ void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
 
 static inline void indirect_branch_prediction_barrier(void)
 {
-	alternative_msr_write(MSR_IA32_PRED_CMD, PRED_CMD_IBPB,
-			      X86_FEATURE_USE_IBPB);
+	u64 val = PRED_CMD_IBPB;
+
+	alternative_msr_write(MSR_IA32_PRED_CMD, val, X86_FEATURE_USE_IBPB);
 }
 
 /*
@@ -220,14 +232,18 @@ static inline void indirect_branch_prediction_barrier(void)
  */
 #define firmware_restrict_branch_speculation_start()			\
 do {									\
+	u64 val = x86_spec_ctrl_get_default() | SPEC_CTRL_IBRS;		\
+									\
 	preempt_disable();						\
-	alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS,	\
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, val,			\
 			      X86_FEATURE_USE_IBRS_FW);			\
 } while (0)
 
 #define firmware_restrict_branch_speculation_end()			\
 do {									\
-	alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,			\
+	u64 val = x86_spec_ctrl_get_default();				\
+									\
+	alternative_msr_write(MSR_IA32_SPEC_CTRL, val,			\
 			      X86_FEATURE_USE_IBRS_FW);			\
 	preempt_enable();						\
 } while (0)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 75f3d4974102b..42c22042f863a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -27,6 +27,12 @@
 
 static void __init spectre_v2_select_mitigation(void);
 
+/*
+ * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any
+ * writes to SPEC_CTRL contain whatever reserved bits have been set.
+ */
+static u64 x86_spec_ctrl_base;
+
 void __init check_bugs(void)
 {
 	identify_boot_cpu();
@@ -36,6 +42,13 @@ void __init check_bugs(void)
 		print_cpu_info(&boot_cpu_data);
 	}
 
+	/*
+	 * Read the SPEC_CTRL MSR to account for reserved bits which may
+	 * have unknown values.
+	 */
+	if (boot_cpu_has(X86_FEATURE_IBRS))
+		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
+
 	/* Select the proper spectre mitigation before patching alternatives */
 	spectre_v2_select_mitigation();
 
@@ -94,6 +107,20 @@ static const char *spectre_v2_strings[] = {
 
 static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE;
 
+void x86_spec_ctrl_set(u64 val)
+{
+	if (val & ~SPEC_CTRL_IBRS)
+		WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val);
+	else
+		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val);
+}
+EXPORT_SYMBOL_GPL(x86_spec_ctrl_set);
+
+u64 x86_spec_ctrl_get_default(void)
+{
+	return x86_spec_ctrl_base;
+}
+EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
 
 #ifdef RETPOLINE
 static bool spectre_v2_bad_module;

From 559a59f6f5644a0c75b6dfb895d3391787b681e7 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:34:05 -0700
Subject: [PATCH 1316/1852] x86/bugs, KVM: Support the combination of guest and
 host IBRS

commit 5cf687548705412da47c9cec342fd952d71ed3d5 upstream

A guest may modify the SPEC_CTRL MSR from the value used by the
kernel. Since the kernel doesn't use IBRS, this means a value of zero is
what is needed in the host.

But the 336996-Speculative-Execution-Side-Channel-Mitigations.pdf refers to
the other bits as reserved so the kernel should respect the boot time
SPEC_CTRL value and use that.

This allows to deal with future extensions to the SPEC_CTRL interface if
any at all.

Note: This uses wrmsrl() instead of native_wrmsl(). I does not make any
difference as paravirt will over-write the callq *0xfff.. with the wrmsrl
assembler code.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, skipping the KVM changes in this patch. ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 10 ++++++++++
 arch/x86/kernel/cpu/bugs.c           | 18 ++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index daec318298279..11db69a965dc3 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -183,6 +183,16 @@ enum spectre_v2_mitigation {
 extern void x86_spec_ctrl_set(u64);
 extern u64 x86_spec_ctrl_get_default(void);
 
+/*
+ * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
+ * the guest has, while on VMEXIT we restore the host view. This
+ * would be easier if SPEC_CTRL were architecturally maskable or
+ * shadowable for guests but this is not (currently) the case.
+ * Takes the guest view of SPEC_CTRL MSR as a parameter.
+ */
+extern void x86_spec_ctrl_set_guest(u64);
+extern void x86_spec_ctrl_restore_host(u64);
+
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 42c22042f863a..e71e28154e1ab 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -122,6 +122,24 @@ u64 x86_spec_ctrl_get_default(void)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
 
+void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
+{
+	if (!boot_cpu_has(X86_FEATURE_IBRS))
+		return;
+	if (x86_spec_ctrl_base != guest_spec_ctrl)
+		wrmsrl(MSR_IA32_SPEC_CTRL, guest_spec_ctrl);
+}
+EXPORT_SYMBOL_GPL(x86_spec_ctrl_set_guest);
+
+void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
+{
+	if (!boot_cpu_has(X86_FEATURE_IBRS))
+		return;
+	if (x86_spec_ctrl_base != guest_spec_ctrl)
+		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
+}
+EXPORT_SYMBOL_GPL(x86_spec_ctrl_restore_host);
+
 #ifdef RETPOLINE
 static bool spectre_v2_bad_module;
 

From 4b8d94d0ec8719c617f8198938bd68ed8f98e531 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Sat, 14 Jul 2018 02:34:13 -0700
Subject: [PATCH 1317/1852] x86/cpu: Rename Merrifield2 to Moorefield

commit f5fbf848303c8704d0e1a1e7cabd08fd0a49552f upstream

Merrifield2 is actually Moorefield.

Rename it accordingly and drop tail digit from Merrifield1.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160906184254.94440-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/intel-family.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 12fa187865c26..0b27c1ebd7310 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -58,8 +58,8 @@
 #define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
 #define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
-#define INTEL_FAM6_ATOM_MERRIFIELD1	0x4A /* Tangier */
-#define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */
+#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
+#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Annidale */
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
 #define INTEL_FAM6_ATOM_GEMINI_LAKE	0x7A

From c56f12924227eb4d857bdfaccf884aa9ab8bc73d Mon Sep 17 00:00:00 2001
From: Piotr Luc <piotr.luc@intel.com>
Date: Sat, 14 Jul 2018 02:34:22 -0700
Subject: [PATCH 1318/1852] x86/cpu/intel: Add Knights Mill to Intel family

commit 0047f59834e5947d45f34f5f12eb330d158f700b upstream

Add CPUID of Knights Mill (KNM) processor to Intel family list.

Signed-off-by: Piotr Luc <piotr.luc@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20161012180520.30976-1-piotr.luc@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/intel-family.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0b27c1ebd7310..e13ff5a146331 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -67,5 +67,6 @@
 /* Xeon Phi */
 
 #define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */
+#define INTEL_FAM6_XEON_PHI_KNM		0x85 /* Knights Mill */
 
 #endif /* _ASM_X86_INTEL_FAMILY_H */

From d55de465f224533c42d4487d81d40310d7c0a26e Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:34:31 -0700
Subject: [PATCH 1319/1852] x86/bugs: Expose /sys/../spec_store_bypass

commit c456442cd3a59eeb1d60293c26cbe2ff2c4e42cf upstream

Add the sysfs file for the new vulerability. It does not do much except
show the words 'Vulnerable' for recent x86 cores.

Intel cores prior to family 6 are known not to be vulnerable, and so are
some Atoms and some Xeon Phi.

It assumes that older Cyrix, Centaur, etc. cores are immune.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../ABI/testing/sysfs-devices-system-cpu      |  1 +
 arch/x86/include/asm/cpufeatures.h            |  1 +
 arch/x86/kernel/cpu/bugs.c                    |  5 ++++
 arch/x86/kernel/cpu/common.c                  | 23 +++++++++++++++++++
 drivers/base/cpu.c                            |  8 +++++++
 include/linux/cpu.h                           |  2 ++
 6 files changed, 40 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index ea6a043f5beb8..50f95689ab387 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -276,6 +276,7 @@ What:		/sys/devices/system/cpu/vulnerabilities
 		/sys/devices/system/cpu/vulnerabilities/meltdown
 		/sys/devices/system/cpu/vulnerabilities/spectre_v1
 		/sys/devices/system/cpu/vulnerabilities/spectre_v2
+		/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
 Date:		January 2018
 Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>
 Description:	Information about CPU vulnerabilities
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index bc76bf39bb2f1..08cf4f7a3f7d3 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -315,5 +315,6 @@
 #define X86_BUG_CPU_MELTDOWN	X86_BUG(14) /* CPU is affected by meltdown attack and needs kernel page table isolation */
 #define X86_BUG_SPECTRE_V1	X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditional branches */
 #define X86_BUG_SPECTRE_V2	X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirect branches */
+#define X86_BUG_SPEC_STORE_BYPASS X86_BUG(17) /* CPU is affected by speculative store bypass attack */
 
 #endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index e71e28154e1ab..0ad13b10afcca 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -403,4 +403,9 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
 {
 	return cpu_show_common(dev, attr, buf, X86_BUG_SPECTRE_V2);
 }
+
+ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	return cpu_show_common(dev, attr, buf, X86_BUG_SPEC_STORE_BYPASS);
+}
 #endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 97558d1f9ef6a..eb78ddf13f449 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -835,10 +835,33 @@ static const __initconst struct x86_cpu_id cpu_no_meltdown[] = {
 	{}
 };
 
+static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_PINEVIEW	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_LINCROFT	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_PENWELL		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_CLOVERVIEW	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_CEDARVIEW	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_SILVERMONT1	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_AIRMONT		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_SILVERMONT2	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_MERRIFIELD	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_CORE_YONAH		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_XEON_PHI_KNL		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_XEON_PHI_KNM		},
+	{ X86_VENDOR_CENTAUR,	5,					},
+	{ X86_VENDOR_INTEL,	5,					},
+	{ X86_VENDOR_NSC,	5,					},
+	{ X86_VENDOR_ANY,	4,					},
+	{}
+};
+
 static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
 	u64 ia32_cap = 0;
 
+	if (!x86_match_cpu(cpu_no_spec_store_bypass))
+		setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
+
 	if (x86_match_cpu(cpu_no_speculation))
 		return;
 
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 3db71afbba93c..143edea1076fc 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -518,14 +518,22 @@ ssize_t __weak cpu_show_spectre_v2(struct device *dev,
 	return sprintf(buf, "Not affected\n");
 }
 
+ssize_t __weak cpu_show_spec_store_bypass(struct device *dev,
+					  struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "Not affected\n");
+}
+
 static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
 static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
 static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL);
+static DEVICE_ATTR(spec_store_bypass, 0444, cpu_show_spec_store_bypass, NULL);
 
 static struct attribute *cpu_root_vulnerabilities_attrs[] = {
 	&dev_attr_meltdown.attr,
 	&dev_attr_spectre_v1.attr,
 	&dev_attr_spectre_v2.attr,
+	&dev_attr_spec_store_bypass.attr,
 	NULL
 };
 
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 99f7f5a13d925..855dead0539e6 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -46,6 +46,8 @@ extern ssize_t cpu_show_spectre_v1(struct device *dev,
 				   struct device_attribute *attr, char *buf);
 extern ssize_t cpu_show_spectre_v2(struct device *dev,
 				   struct device_attribute *attr, char *buf);
+extern ssize_t cpu_show_spec_store_bypass(struct device *dev,
+					  struct device_attribute *attr, char *buf);
 
 extern __printf(4, 5)
 struct device *cpu_device_create(struct device *parent, void *drvdata,

From 8b9ea0b01e7d17d75fe153a472ef10f074ad926c Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:34:39 -0700
Subject: [PATCH 1320/1852] x86/cpufeatures: Add X86_FEATURE_RDS

commit 0cc5fa00b0a88dad140b4e5c2cead9951ad36822 upstream

Add the CPU feature bit CPUID.7.0.EDX[31] which indicates whether the CPU
supports Reduced Data Speculation.

[ tglx: Split it out from a later patch ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 08cf4f7a3f7d3..3fce65d4de781 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -297,6 +297,7 @@
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
+#define X86_FEATURE_RDS			(18*32+31) /* Reduced Data Speculation */
 
 /*
  * BUG word(s)

From a281a8003d3216e0e83e8ce561486c09c7ffeac3 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:34:47 -0700
Subject: [PATCH 1321/1852] x86/bugs: Provide boot parameters for the
 spec_store_bypass_disable mitigation

commit 24f7fc83b9204d20f878c57cb77d261ae825e033 upstream

Contemporary high performance processors use a common industry-wide
optimization known as "Speculative Store Bypass" in which loads from
addresses to which a recent store has occurred may (speculatively) see an
older value. Intel refers to this feature as "Memory Disambiguation" which
is part of their "Smart Memory Access" capability.

Memory Disambiguation can expose a cache side-channel attack against such
speculatively read values. An attacker can create exploit code that allows
them to read memory outside of a sandbox environment (for example,
malicious JavaScript in a web page), or to perform more complex attacks
against code running within the same privilege level, e.g. via the stack.

As a first step to mitigate against such attacks, provide two boot command
line control knobs:

 nospec_store_bypass_disable
 spec_store_bypass_disable=[off,auto,on]

By default affected x86 processors will power on with Speculative
Store Bypass enabled. Hence the provided kernel parameters are written
from the point of view of whether to enable a mitigation or not.
The parameters are as follows:

 - auto - Kernel detects whether your CPU model contains an implementation
	  of Speculative Store Bypass and picks the most appropriate
	  mitigation.

 - on   - disable Speculative Store Bypass
 - off  - enable Speculative Store Bypass

[ tglx: Reordered the checks so that the whole evaluation is not done
  	when the CPU does not support RDS ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/kernel-parameters.txt  |  33 +++++++++
 arch/x86/include/asm/cpufeatures.h   |   1 +
 arch/x86/include/asm/nospec-branch.h |   6 ++
 arch/x86/kernel/cpu/bugs.c           | 103 +++++++++++++++++++++++++++
 4 files changed, 143 insertions(+)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index a227ed8b0cdcb..506dc40f34bc4 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2520,6 +2520,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			allow data leaks with this option, which is equivalent
 			to spectre_v2=off.
 
+	nospec_store_bypass_disable
+			[HW] Disable all mitigations for the Speculative Store Bypass vulnerability
+
 	noxsave		[BUGS=X86] Disables x86 extended register state save
 			and restore using xsave. The kernel will fallback to
 			enabling legacy floating-point and sse state.
@@ -3693,6 +3696,36 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			Not specifying this option is equivalent to
 			spectre_v2=auto.
 
+	spec_store_bypass_disable=
+			[HW] Control Speculative Store Bypass (SSB) Disable mitigation
+			(Speculative Store Bypass vulnerability)
+
+			Certain CPUs are vulnerable to an exploit against a
+			a common industry wide performance optimization known
+			as "Speculative Store Bypass" in which recent stores
+			to the same memory location may not be observed by
+			later loads during speculative execution. The idea
+			is that such stores are unlikely and that they can
+			be detected prior to instruction retirement at the
+			end of a particular speculation execution window.
+
+			In vulnerable processors, the speculatively forwarded
+			store can be used in a cache side channel attack, for
+			example to read memory to which the attacker does not
+			directly have access (e.g. inside sandboxed code).
+
+			This parameter controls whether the Speculative Store
+			Bypass optimization is used.
+
+			on     - Unconditionally disable Speculative Store Bypass
+			off    - Unconditionally enable Speculative Store Bypass
+			auto   - Kernel detects whether the CPU model contains an
+				 implementation of Speculative Store Bypass and
+				 picks the most appropriate mitigation
+
+			Not specifying this option is equivalent to
+			spec_store_bypass_disable=auto.
+
 	spia_io_base=	[HW,MTD]
 	spia_fio_base=
 	spia_pedr=
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 3fce65d4de781..9510f5f075c66 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -203,6 +203,7 @@
 
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 #define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
+#define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE	( 7*32+23) /* "" Disable Speculative Store Bypass. */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 11db69a965dc3..c786d01faf516 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -193,6 +193,12 @@ extern u64 x86_spec_ctrl_get_default(void);
 extern void x86_spec_ctrl_set_guest(u64);
 extern void x86_spec_ctrl_restore_host(u64);
 
+/* The Speculative Store Bypass disable variants */
+enum ssb_mitigation {
+	SPEC_STORE_BYPASS_NONE,
+	SPEC_STORE_BYPASS_DISABLE,
+};
+
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 0ad13b10afcca..826aa81a1b37c 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -26,6 +26,7 @@
 #include <asm/intel-family.h>
 
 static void __init spectre_v2_select_mitigation(void);
+static void __init ssb_select_mitigation(void);
 
 /*
  * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any
@@ -52,6 +53,12 @@ void __init check_bugs(void)
 	/* Select the proper spectre mitigation before patching alternatives */
 	spectre_v2_select_mitigation();
 
+	/*
+	 * Select proper mitigation for any exposure to the Speculative Store
+	 * Bypass vulnerability.
+	 */
+	ssb_select_mitigation();
+
 #ifdef CONFIG_X86_32
 	/*
 	 * Check whether we are able to run this kernel safely on SMP.
@@ -356,6 +363,99 @@ static void __init spectre_v2_select_mitigation(void)
 	}
 }
 
+#undef pr_fmt
+#define pr_fmt(fmt)	"Speculative Store Bypass: " fmt
+
+static enum ssb_mitigation ssb_mode = SPEC_STORE_BYPASS_NONE;
+
+/* The kernel command line selection */
+enum ssb_mitigation_cmd {
+	SPEC_STORE_BYPASS_CMD_NONE,
+	SPEC_STORE_BYPASS_CMD_AUTO,
+	SPEC_STORE_BYPASS_CMD_ON,
+};
+
+static const char *ssb_strings[] = {
+	[SPEC_STORE_BYPASS_NONE]	= "Vulnerable",
+	[SPEC_STORE_BYPASS_DISABLE]	= "Mitigation: Speculative Store Bypass disabled"
+};
+
+static const struct {
+	const char *option;
+	enum ssb_mitigation_cmd cmd;
+} ssb_mitigation_options[] = {
+	{ "auto",	SPEC_STORE_BYPASS_CMD_AUTO }, /* Platform decides */
+	{ "on",		SPEC_STORE_BYPASS_CMD_ON },   /* Disable Speculative Store Bypass */
+	{ "off",	SPEC_STORE_BYPASS_CMD_NONE }, /* Don't touch Speculative Store Bypass */
+};
+
+static enum ssb_mitigation_cmd __init ssb_parse_cmdline(void)
+{
+	enum ssb_mitigation_cmd cmd = SPEC_STORE_BYPASS_CMD_AUTO;
+	char arg[20];
+	int ret, i;
+
+	if (cmdline_find_option_bool(boot_command_line, "nospec_store_bypass_disable")) {
+		return SPEC_STORE_BYPASS_CMD_NONE;
+	} else {
+		ret = cmdline_find_option(boot_command_line, "spec_store_bypass_disable",
+					  arg, sizeof(arg));
+		if (ret < 0)
+			return SPEC_STORE_BYPASS_CMD_AUTO;
+
+		for (i = 0; i < ARRAY_SIZE(ssb_mitigation_options); i++) {
+			if (!match_option(arg, ret, ssb_mitigation_options[i].option))
+				continue;
+
+			cmd = ssb_mitigation_options[i].cmd;
+			break;
+		}
+
+		if (i >= ARRAY_SIZE(ssb_mitigation_options)) {
+			pr_err("unknown option (%s). Switching to AUTO select\n", arg);
+			return SPEC_STORE_BYPASS_CMD_AUTO;
+		}
+	}
+
+	return cmd;
+}
+
+static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
+{
+	enum ssb_mitigation mode = SPEC_STORE_BYPASS_NONE;
+	enum ssb_mitigation_cmd cmd;
+
+	if (!boot_cpu_has(X86_FEATURE_RDS))
+		return mode;
+
+	cmd = ssb_parse_cmdline();
+	if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS) &&
+	    (cmd == SPEC_STORE_BYPASS_CMD_NONE ||
+	     cmd == SPEC_STORE_BYPASS_CMD_AUTO))
+		return mode;
+
+	switch (cmd) {
+	case SPEC_STORE_BYPASS_CMD_AUTO:
+	case SPEC_STORE_BYPASS_CMD_ON:
+		mode = SPEC_STORE_BYPASS_DISABLE;
+		break;
+	case SPEC_STORE_BYPASS_CMD_NONE:
+		break;
+	}
+
+	if (mode != SPEC_STORE_BYPASS_NONE)
+		setup_force_cpu_cap(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE);
+	return mode;
+}
+
+static void ssb_select_mitigation()
+{
+	ssb_mode = __ssb_select_mitigation();
+
+	if (boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
+		pr_info("%s\n", ssb_strings[ssb_mode]);
+}
+
 #undef pr_fmt
 
 #ifdef CONFIG_SYSFS
@@ -382,6 +482,9 @@ ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
 			       boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "",
 			       spectre_v2_module_string());
 
+	case X86_BUG_SPEC_STORE_BYPASS:
+		return sprintf(buf, "%s\n", ssb_strings[ssb_mode]);
+
 	default:
 		break;
 	}

From 268544db4ad6c2f3df803dfc7507ea2c03a5c21c Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:34:55 -0700
Subject: [PATCH 1322/1852] x86/bugs/intel: Set proper CPU features and setup
 RDS

commit 772439717dbf703b39990be58d8d4e3e4ad0598a upstream

Intel CPUs expose methods to:

 - Detect whether RDS capability is available via CPUID.7.0.EDX[31],

 - The SPEC_CTRL MSR(0x48), bit 2 set to enable RDS.

 - MSR_IA32_ARCH_CAPABILITIES, Bit(4) no need to enable RRS.

With that in mind if spec_store_bypass_disable=[auto,on] is selected set at
boot-time the SPEC_CTRL MSR to enable RDS if the platform requires it.

Note that this does not fix the KVM case where the SPEC_CTRL is exposed to
guests which can muck with it, see patch titled :
 KVM/SVM/VMX/x86/spectre_v2: Support the combination of guest and host IBRS.

And for the firmware (IBRS to be set), see patch titled:
 x86/spectre_v2: Read SPEC_CTRL MSR during boot and re-use reserved bits

[ tglx: Distangled it from the intel implementation and kept the call order ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/msr-index.h |  6 ++++++
 arch/x86/kernel/cpu/bugs.c       | 30 ++++++++++++++++++++++++++++--
 arch/x86/kernel/cpu/common.c     | 10 ++++++----
 arch/x86/kernel/cpu/cpu.h        |  3 +++
 arch/x86/kernel/cpu/intel.c      |  1 +
 5 files changed, 44 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index f4701f0e613a3..a29edb7234313 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -35,6 +35,7 @@
 #define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */
 #define SPEC_CTRL_IBRS			(1 << 0)   /* Indirect Branch Restricted Speculation */
 #define SPEC_CTRL_STIBP			(1 << 1)   /* Single Thread Indirect Branch Predictors */
+#define SPEC_CTRL_RDS			(1 << 2)   /* Reduced Data Speculation */
 
 #define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
 #define PRED_CMD_IBPB			(1 << 0)   /* Indirect Branch Prediction Barrier */
@@ -56,6 +57,11 @@
 #define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
 #define ARCH_CAP_RDCL_NO		(1 << 0)   /* Not susceptible to Meltdown */
 #define ARCH_CAP_IBRS_ALL		(1 << 1)   /* Enhanced IBRS support */
+#define ARCH_CAP_RDS_NO			(1 << 4)   /*
+						    * Not susceptible to Speculative Store Bypass
+						    * attack, so no Reduced Data Speculation control
+						    * required.
+						    */
 
 #define MSR_IA32_BBL_CR_CTL		0x00000119
 #define MSR_IA32_BBL_CR_CTL3		0x0000011e
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 826aa81a1b37c..56b84a5506d76 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -116,7 +116,7 @@ static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE;
 
 void x86_spec_ctrl_set(u64 val)
 {
-	if (val & ~SPEC_CTRL_IBRS)
+	if (val & ~(SPEC_CTRL_IBRS | SPEC_CTRL_RDS))
 		WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val);
 	else
 		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val);
@@ -443,8 +443,28 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 		break;
 	}
 
-	if (mode != SPEC_STORE_BYPASS_NONE)
+	/*
+	 * We have three CPU feature flags that are in play here:
+	 *  - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
+	 *  - X86_FEATURE_RDS - CPU is able to turn off speculative store bypass
+	 *  - X86_FEATURE_SPEC_STORE_BYPASS_DISABLE - engage the mitigation
+	 */
+	if (mode != SPEC_STORE_BYPASS_NONE) {
 		setup_force_cpu_cap(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE);
+		/*
+		 * Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD uses
+		 * a completely different MSR and bit dependent on family.
+		 */
+		switch (boot_cpu_data.x86_vendor) {
+		case X86_VENDOR_INTEL:
+			x86_spec_ctrl_base |= SPEC_CTRL_RDS;
+			x86_spec_ctrl_set(SPEC_CTRL_RDS);
+			break;
+		case X86_VENDOR_AMD:
+			break;
+		}
+	}
+
 	return mode;
 }
 
@@ -458,6 +478,12 @@ static void ssb_select_mitigation()
 
 #undef pr_fmt
 
+void x86_spec_ctrl_setup_ap(void)
+{
+	if (boot_cpu_has(X86_FEATURE_IBRS))
+		x86_spec_ctrl_set(x86_spec_ctrl_base & (SPEC_CTRL_IBRS | SPEC_CTRL_RDS));
+}
+
 #ifdef CONFIG_SYSFS
 
 ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index eb78ddf13f449..2f1d403cb0ea3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -859,7 +859,11 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
 	u64 ia32_cap = 0;
 
-	if (!x86_match_cpu(cpu_no_spec_store_bypass))
+	if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
+		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
+
+	if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
+	   !(ia32_cap & ARCH_CAP_RDS_NO))
 		setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
 	if (x86_match_cpu(cpu_no_speculation))
@@ -871,9 +875,6 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 	if (x86_match_cpu(cpu_no_meltdown))
 		return;
 
-	if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
-		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
-
 	/* Rogue Data Cache Load? No! */
 	if (ia32_cap & ARCH_CAP_RDCL_NO)
 		return;
@@ -1216,6 +1217,7 @@ void identify_secondary_cpu(struct cpuinfo_x86 *c)
 	enable_sep_cpu();
 #endif
 	mtrr_ap_init();
+	x86_spec_ctrl_setup_ap();
 }
 
 struct msr_range {
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 2584265d47455..3b19d82f7932c 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -46,4 +46,7 @@ extern const struct cpu_dev *const __x86_cpu_dev_start[],
 
 extern void get_cpu_cap(struct cpuinfo_x86 *c);
 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
+
+extern void x86_spec_ctrl_setup_ap(void);
+
 #endif /* ARCH_X86_CPU_H */
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 77d9f6809b05b..ac25d1e5e8e8f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -119,6 +119,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		setup_clear_cpu_cap(X86_FEATURE_STIBP);
 		setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL);
 		setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP);
+		setup_clear_cpu_cap(X86_FEATURE_RDS);
 	}
 
 	/*

From a7f9441d9bd39f4953c27fd63ad9c3d438ab097c Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:35:03 -0700
Subject: [PATCH 1323/1852] x86/bugs: Whitelist allowed SPEC_CTRL MSR values

commit 1115a859f33276fe8afb31c60cf9d8e657872558 upstream

Intel and AMD SPEC_CTRL (0x48) MSR semantics may differ in the
future (or in fact use different MSRs for the same functionality).

As such a run-time mechanism is required to whitelist the appropriate MSR
values.

[ tglx: Made the variable __ro_after_init ]
[ Srivatsa: Removed __ro_after_init for 4.4.y ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 56b84a5506d76..c37e2110d383c 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -34,6 +34,12 @@ static void __init ssb_select_mitigation(void);
  */
 static u64 x86_spec_ctrl_base;
 
+/*
+ * The vendor and possibly platform specific bits which can be modified in
+ * x86_spec_ctrl_base.
+ */
+static u64 x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS;
+
 void __init check_bugs(void)
 {
 	identify_boot_cpu();
@@ -116,7 +122,7 @@ static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE;
 
 void x86_spec_ctrl_set(u64 val)
 {
-	if (val & ~(SPEC_CTRL_IBRS | SPEC_CTRL_RDS))
+	if (val & x86_spec_ctrl_mask)
 		WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val);
 	else
 		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val);
@@ -458,6 +464,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 		switch (boot_cpu_data.x86_vendor) {
 		case X86_VENDOR_INTEL:
 			x86_spec_ctrl_base |= SPEC_CTRL_RDS;
+			x86_spec_ctrl_mask &= ~SPEC_CTRL_RDS;
 			x86_spec_ctrl_set(SPEC_CTRL_RDS);
 			break;
 		case X86_VENDOR_AMD:
@@ -481,7 +488,7 @@ static void ssb_select_mitigation()
 void x86_spec_ctrl_setup_ap(void)
 {
 	if (boot_cpu_has(X86_FEATURE_IBRS))
-		x86_spec_ctrl_set(x86_spec_ctrl_base & (SPEC_CTRL_IBRS | SPEC_CTRL_RDS));
+		x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask);
 }
 
 #ifdef CONFIG_SYSFS

From 7e2e394cef35ce767587f76eb3e9e9d60a7b3659 Mon Sep 17 00:00:00 2001
From: David Woodhouse <dwmw@amazon.co.uk>
Date: Sat, 14 Jul 2018 02:35:12 -0700
Subject: [PATCH 1324/1852] x86/bugs/AMD: Add support to disable RDS on Fam[15,
 16, 17]h if requested

commit 764f3c21588a059cd783c6ba0734d4db2d72822d upstream

AMD does not need the Speculative Store Bypass mitigation to be enabled.

The parameters for this are already available and can be done via MSR
C001_1020. Each family uses a different bit in that MSR for this.

[ tglx: Expose the bit mask via a variable and move the actual MSR fiddling
  	into the bugs code as that's the right thing to do and also required
	to prepare for dynamic enable/disable ]

[ Srivatsa: Removed __ro_after_init for 4.4.y ]

Suggested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h   |  1 +
 arch/x86/include/asm/nospec-branch.h |  4 ++++
 arch/x86/kernel/cpu/amd.c            | 26 ++++++++++++++++++++++++++
 arch/x86/kernel/cpu/bugs.c           | 27 ++++++++++++++++++++++++++-
 arch/x86/kernel/cpu/common.c         |  4 ++++
 5 files changed, 61 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 9510f5f075c66..b7cdd1c051326 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -204,6 +204,7 @@
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 #define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
 #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE	( 7*32+23) /* "" Disable Speculative Store Bypass. */
+#define X86_FEATURE_AMD_RDS	(7*32+24)  /* "" AMD RDS implementation */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index c786d01faf516..ac2fdc9666e4a 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -199,6 +199,10 @@ enum ssb_mitigation {
 	SPEC_STORE_BYPASS_DISABLE,
 };
 
+/* AMD specific Speculative Store Bypass MSR data */
+extern u64 x86_amd_ls_cfg_base;
+extern u64 x86_amd_ls_cfg_rds_mask;
+
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 9b2941422b68a..4452f387ed32e 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -9,6 +9,7 @@
 #include <asm/processor.h>
 #include <asm/apic.h>
 #include <asm/cpu.h>
+#include <asm/nospec-branch.h>
 #include <asm/smp.h>
 #include <asm/pci-direct.h>
 #include <asm/delay.h>
@@ -519,6 +520,26 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
 
 	if (cpu_has(c, X86_FEATURE_MWAITX))
 		use_mwaitx_delay();
+
+	if (c->x86 >= 0x15 && c->x86 <= 0x17) {
+		unsigned int bit;
+
+		switch (c->x86) {
+		case 0x15: bit = 54; break;
+		case 0x16: bit = 33; break;
+		case 0x17: bit = 10; break;
+		default: return;
+		}
+		/*
+		 * Try to cache the base value so further operations can
+		 * avoid RMW. If that faults, do not enable RDS.
+		 */
+		if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) {
+			setup_force_cpu_cap(X86_FEATURE_RDS);
+			setup_force_cpu_cap(X86_FEATURE_AMD_RDS);
+			x86_amd_ls_cfg_rds_mask = 1ULL << bit;
+		}
+	}
 }
 
 static void early_init_amd(struct cpuinfo_x86 *c)
@@ -794,6 +815,11 @@ static void init_amd(struct cpuinfo_x86 *c)
 	/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
 	if (!cpu_has(c, X86_FEATURE_XENPV))
 		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
+
+	if (boot_cpu_has(X86_FEATURE_AMD_RDS)) {
+		set_cpu_cap(c, X86_FEATURE_RDS);
+		set_cpu_cap(c, X86_FEATURE_AMD_RDS);
+	}
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index c37e2110d383c..b8911afbd6b89 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -40,6 +40,13 @@ static u64 x86_spec_ctrl_base;
  */
 static u64 x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS;
 
+/*
+ * AMD specific MSR info for Speculative Store Bypass control.
+ * x86_amd_ls_cfg_rds_mask is initialized in identify_boot_cpu().
+ */
+u64 x86_amd_ls_cfg_base;
+u64 x86_amd_ls_cfg_rds_mask;
+
 void __init check_bugs(void)
 {
 	identify_boot_cpu();
@@ -51,7 +58,8 @@ void __init check_bugs(void)
 
 	/*
 	 * Read the SPEC_CTRL MSR to account for reserved bits which may
-	 * have unknown values.
+	 * have unknown values. AMD64_LS_CFG MSR is cached in the early AMD
+	 * init code as it is not enumerated and depends on the family.
 	 */
 	if (boot_cpu_has(X86_FEATURE_IBRS))
 		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
@@ -153,6 +161,14 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_restore_host);
 
+static void x86_amd_rds_enable(void)
+{
+	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_rds_mask;
+
+	if (boot_cpu_has(X86_FEATURE_AMD_RDS))
+		wrmsrl(MSR_AMD64_LS_CFG, msrval);
+}
+
 #ifdef RETPOLINE
 static bool spectre_v2_bad_module;
 
@@ -442,6 +458,11 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 
 	switch (cmd) {
 	case SPEC_STORE_BYPASS_CMD_AUTO:
+		/*
+		 * AMD platforms by default don't need SSB mitigation.
+		 */
+		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+			break;
 	case SPEC_STORE_BYPASS_CMD_ON:
 		mode = SPEC_STORE_BYPASS_DISABLE;
 		break;
@@ -468,6 +489,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 			x86_spec_ctrl_set(SPEC_CTRL_RDS);
 			break;
 		case X86_VENDOR_AMD:
+			x86_amd_rds_enable();
 			break;
 		}
 	}
@@ -489,6 +511,9 @@ void x86_spec_ctrl_setup_ap(void)
 {
 	if (boot_cpu_has(X86_FEATURE_IBRS))
 		x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask);
+
+	if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
+		x86_amd_rds_enable();
 }
 
 #ifdef CONFIG_SYSFS
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2f1d403cb0ea3..7405c8653f7ae 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -851,6 +851,10 @@ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
 	{ X86_VENDOR_CENTAUR,	5,					},
 	{ X86_VENDOR_INTEL,	5,					},
 	{ X86_VENDOR_NSC,	5,					},
+	{ X86_VENDOR_AMD,	0x12,					},
+	{ X86_VENDOR_AMD,	0x11,					},
+	{ X86_VENDOR_AMD,	0x10,					},
+	{ X86_VENDOR_AMD,	0xf,					},
 	{ X86_VENDOR_ANY,	4,					},
 	{}
 };

From b59cc22177b0c9e8453bcc0fb71f4b414e5512a7 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:35:20 -0700
Subject: [PATCH 1325/1852] x86/speculation: Create spec-ctrl.h to avoid
 include hell

commit 28a2775217b17208811fa43a9e96bd1fdf417b86 upstream

Having everything in nospec-branch.h creates a hell of dependencies when
adding the prctl based switching mechanism. Move everything which is not
required in nospec-branch.h to spec-ctrl.h and fix up the includes in the
relevant files.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 14 --------------
 arch/x86/include/asm/spec-ctrl.h     | 21 +++++++++++++++++++++
 arch/x86/kernel/cpu/amd.c            |  2 +-
 arch/x86/kernel/cpu/bugs.c           |  2 +-
 arch/x86/kvm/svm.c                   |  2 +-
 arch/x86/kvm/vmx.c                   |  2 +-
 6 files changed, 25 insertions(+), 18 deletions(-)
 create mode 100644 arch/x86/include/asm/spec-ctrl.h

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index ac2fdc9666e4a..47c454c295354 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -183,26 +183,12 @@ enum spectre_v2_mitigation {
 extern void x86_spec_ctrl_set(u64);
 extern u64 x86_spec_ctrl_get_default(void);
 
-/*
- * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
- * the guest has, while on VMEXIT we restore the host view. This
- * would be easier if SPEC_CTRL were architecturally maskable or
- * shadowable for guests but this is not (currently) the case.
- * Takes the guest view of SPEC_CTRL MSR as a parameter.
- */
-extern void x86_spec_ctrl_set_guest(u64);
-extern void x86_spec_ctrl_restore_host(u64);
-
 /* The Speculative Store Bypass disable variants */
 enum ssb_mitigation {
 	SPEC_STORE_BYPASS_NONE,
 	SPEC_STORE_BYPASS_DISABLE,
 };
 
-/* AMD specific Speculative Store Bypass MSR data */
-extern u64 x86_amd_ls_cfg_base;
-extern u64 x86_amd_ls_cfg_rds_mask;
-
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
new file mode 100644
index 0000000000000..3ad64420a06e9
--- /dev/null
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_SPECCTRL_H_
+#define _ASM_X86_SPECCTRL_H_
+
+#include <asm/nospec-branch.h>
+
+/*
+ * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
+ * the guest has, while on VMEXIT we restore the host view. This
+ * would be easier if SPEC_CTRL were architecturally maskable or
+ * shadowable for guests but this is not (currently) the case.
+ * Takes the guest view of SPEC_CTRL MSR as a parameter.
+ */
+extern void x86_spec_ctrl_set_guest(u64);
+extern void x86_spec_ctrl_restore_host(u64);
+
+/* AMD specific Speculative Store Bypass MSR data */
+extern u64 x86_amd_ls_cfg_base;
+extern u64 x86_amd_ls_cfg_rds_mask;
+
+#endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 4452f387ed32e..14e984916f2fb 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -9,7 +9,7 @@
 #include <asm/processor.h>
 #include <asm/apic.h>
 #include <asm/cpu.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 #include <asm/smp.h>
 #include <asm/pci-direct.h>
 #include <asm/delay.h>
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index b8911afbd6b89..47a3cc08a8892 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -12,7 +12,7 @@
 #include <linux/cpu.h>
 #include <linux/module.h>
 
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 #include <asm/cmdline.h>
 #include <asm/bugs.h>
 #include <asm/processor.h>
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 42654375b73f0..df7827a981dd1 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -37,7 +37,7 @@
 #include <asm/desc.h>
 #include <asm/debugreg.h>
 #include <asm/kvm_para.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 
 #include <asm/virtext.h>
 #include "trace.h"
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 63c44a9bf6bbb..18143886b1863 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -48,7 +48,7 @@
 #include <asm/kexec.h>
 #include <asm/apic.h>
 #include <asm/irq_remapping.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 
 #include "trace.h"
 #include "pmu.h"

From d190e9e54b85ef732d1bb29f3017b07242b4c024 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:35:28 -0700
Subject: [PATCH 1326/1852] prctl: Add speculation control prctls

commit b617cfc858161140d69cc0b5cc211996b557a1c7 upstream

Add two new prctls to control aspects of speculation related vulnerabilites
and their mitigations to provide finer grained control over performance
impacting mitigations.

PR_GET_SPECULATION_CTRL returns the state of the speculation misfeature
which is selected with arg2 of prctl(2). The return value uses bit 0-2 with
the following meaning:

Bit  Define           Description
0    PR_SPEC_PRCTL    Mitigation can be controlled per task by
                      PR_SET_SPECULATION_CTRL
1    PR_SPEC_ENABLE   The speculation feature is enabled, mitigation is
                      disabled
2    PR_SPEC_DISABLE  The speculation feature is disabled, mitigation is
                      enabled

If all bits are 0 the CPU is not affected by the speculation misfeature.

If PR_SPEC_PRCTL is set, then the per task control of the mitigation is
available. If not set, prctl(PR_SET_SPECULATION_CTRL) for the speculation
misfeature will fail.

PR_SET_SPECULATION_CTRL allows to control the speculation misfeature, which
is selected by arg2 of prctl(2) per task. arg3 is used to hand in the
control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE.

The common return values are:

EINVAL  prctl is not implemented by the architecture or the unused prctl()
        arguments are not 0
ENODEV  arg2 is selecting a not supported speculation misfeature

PR_SET_SPECULATION_CTRL has these additional return values:

ERANGE  arg3 is incorrect, i.e. it's not either PR_SPEC_ENABLE or PR_SPEC_DISABLE
ENXIO   prctl control of the selected speculation misfeature is disabled

The first supported controlable speculation misfeature is
PR_SPEC_STORE_BYPASS. Add the define so this can be shared between
architectures.

Based on an initial patch from Tim Chen and mostly rewritten.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/spec_ctrl.txt | 86 +++++++++++++++++++++++++++++++++++++
 include/linux/nospec.h      |  5 +++
 include/uapi/linux/prctl.h  | 11 +++++
 kernel/sys.c                | 20 +++++++++
 4 files changed, 122 insertions(+)
 create mode 100644 Documentation/spec_ctrl.txt

diff --git a/Documentation/spec_ctrl.txt b/Documentation/spec_ctrl.txt
new file mode 100644
index 0000000000000..ddbebcd012084
--- /dev/null
+++ b/Documentation/spec_ctrl.txt
@@ -0,0 +1,86 @@
+===================
+Speculation Control
+===================
+
+Quite some CPUs have speculation related misfeatures which are in fact
+vulnerabilites causing data leaks in various forms even accross privilege
+domains.
+
+The kernel provides mitigation for such vulnerabilities in various
+forms. Some of these mitigations are compile time configurable and some on
+the kernel command line.
+
+There is also a class of mitigations which are very expensive, but they can
+be restricted to a certain set of processes or tasks in controlled
+environments. The mechanism to control these mitigations is via
+:manpage:`prctl(2)`.
+
+There are two prctl options which are related to this:
+
+ * PR_GET_SPECULATION_CTRL
+
+ * PR_SET_SPECULATION_CTRL
+
+PR_GET_SPECULATION_CTRL
+-----------------------
+
+PR_GET_SPECULATION_CTRL returns the state of the speculation misfeature
+which is selected with arg2 of prctl(2). The return value uses bits 0-2 with
+the following meaning:
+
+==== ================ ===================================================
+Bit  Define           Description
+==== ================ ===================================================
+0    PR_SPEC_PRCTL    Mitigation can be controlled per task by
+                      PR_SET_SPECULATION_CTRL
+1    PR_SPEC_ENABLE   The speculation feature is enabled, mitigation is
+                      disabled
+2    PR_SPEC_DISABLE  The speculation feature is disabled, mitigation is
+                      enabled
+==== ================ ===================================================
+
+If all bits are 0 the CPU is not affected by the speculation misfeature.
+
+If PR_SPEC_PRCTL is set, then the per task control of the mitigation is
+available. If not set, prctl(PR_SET_SPECULATION_CTRL) for the speculation
+misfeature will fail.
+
+PR_SET_SPECULATION_CTRL
+-----------------------
+PR_SET_SPECULATION_CTRL allows to control the speculation misfeature, which
+is selected by arg2 of :manpage:`prctl(2)` per task. arg3 is used to hand
+in the control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE.
+
+Common error codes
+------------------
+======= =================================================================
+Value   Meaning
+======= =================================================================
+EINVAL  The prctl is not implemented by the architecture or unused
+        prctl(2) arguments are not 0
+
+ENODEV  arg2 is selecting a not supported speculation misfeature
+======= =================================================================
+
+PR_SET_SPECULATION_CTRL error codes
+-----------------------------------
+======= =================================================================
+Value   Meaning
+======= =================================================================
+0       Success
+
+ERANGE  arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor
+        PR_SPEC_DISABLE
+
+ENXIO   Control of the selected speculation misfeature is not possible.
+        See PR_GET_SPECULATION_CTRL.
+======= =================================================================
+
+Speculation misfeature controls
+-------------------------------
+- PR_SPEC_STORE_BYPASS: Speculative Store Bypass
+
+  Invocations:
+   * prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, 0, 0, 0);
+   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
+   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index e791ebc65c9c0..700bb8a4e4eac 100644
--- a/include/linux/nospec.h
+++ b/include/linux/nospec.h
@@ -55,4 +55,9 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
 									\
 	(typeof(_i)) (_i & _mask);					\
 })
+
+/* Speculation control prctl */
+int arch_prctl_spec_ctrl_get(unsigned long which);
+int arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl);
+
 #endif /* _LINUX_NOSPEC_H */
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index c1af9b3c27c4f..95e71219ce81d 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -206,4 +206,15 @@ struct prctl_mm_map {
 #define PR_SET_VMA		0x53564d41
 # define PR_SET_VMA_ANON_NAME		0
 
+/* Per task speculation control */
+#define PR_GET_SPECULATION_CTRL		52
+#define PR_SET_SPECULATION_CTRL		53
+/* Speculation control variants */
+# define PR_SPEC_STORE_BYPASS		0
+/* Return and control values for PR_SET/GET_SPECULATION_CTRL */
+# define PR_SPEC_NOT_AFFECTED		0
+# define PR_SPEC_PRCTL			(1UL << 0)
+# define PR_SPEC_ENABLE			(1UL << 1)
+# define PR_SPEC_DISABLE		(1UL << 2)
+
 #endif /* _LINUX_PRCTL_H */
diff --git a/kernel/sys.c b/kernel/sys.c
index cf40663a54c2b..e7da5094eb4d8 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -2224,6 +2224,16 @@ static int prctl_set_vma(unsigned long opt, unsigned long start,
 }
 #endif
 
+int __weak arch_prctl_spec_ctrl_get(unsigned long which)
+{
+	return -EINVAL;
+}
+
+int __weak arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl)
+{
+	return -EINVAL;
+}
+
 SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
 		unsigned long, arg4, unsigned long, arg5)
 {
@@ -2445,6 +2455,16 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
 	case PR_SET_VMA:
 		error = prctl_set_vma(arg2, arg3, arg4, arg5);
 		break;
+	case PR_GET_SPECULATION_CTRL:
+		if (arg3 || arg4 || arg5)
+			return -EINVAL;
+		error = arch_prctl_spec_ctrl_get(arg2);
+		break;
+	case PR_SET_SPECULATION_CTRL:
+		if (arg4 || arg5)
+			return -EINVAL;
+		error = arch_prctl_spec_ctrl_set(arg2, arg3);
+		break;
 	default:
 		error = -EINVAL;
 		break;

From 2a1778d7f17e9e6e7b54eec0037135354c726869 Mon Sep 17 00:00:00 2001
From: Kyle Huey <me@kylehuey.com>
Date: Sat, 14 Jul 2018 02:35:36 -0700
Subject: [PATCH 1327/1852] x86/process: Optimize TIF checks in
 __switch_to_xtra()

commit af8b3cd3934ec60f4c2a420d19a9d416554f140b upstream

Help the compiler to avoid reevaluating the thread flags for each checked
bit by reordering the bit checks and providing an explicit xor for
evaluation.

With default defconfigs for each arch,

x86_64: arch/x86/kernel/process.o
text       data     bss     dec     hex
3056       8577      16   11649    2d81	Before
3024	   8577      16	  11617	   2d61	After

i386: arch/x86/kernel/process.o
text       data     bss     dec     hex
2957	   8673	      8	  11638	   2d76	Before
2925	   8673       8	  11606	   2d56	After

Originally-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Kyle Huey <khuey@kylehuey.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Link: http://lkml.kernel.org/r/20170214081104.9244-2-khuey@kylehuey.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

[dwmw2: backported to make TIF_RDS handling simpler.
        No deferred TR reload.]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/process.c | 54 ++++++++++++++++++++++-----------------
 1 file changed, 31 insertions(+), 23 deletions(-)

diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 2754dad268393..725d8305c0047 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -174,48 +174,56 @@ int set_tsc_mode(unsigned int val)
 	return 0;
 }
 
+static inline void switch_to_bitmap(struct tss_struct *tss,
+				    struct thread_struct *prev,
+				    struct thread_struct *next,
+				    unsigned long tifp, unsigned long tifn)
+{
+	if (tifn & _TIF_IO_BITMAP) {
+		/*
+		 * Copy the relevant range of the IO bitmap.
+		 * Normally this is 128 bytes or less:
+		 */
+		memcpy(tss->io_bitmap, next->io_bitmap_ptr,
+		       max(prev->io_bitmap_max, next->io_bitmap_max));
+	} else if (tifp & _TIF_IO_BITMAP) {
+		/*
+		 * Clear any possible leftover bits:
+		 */
+		memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
+	}
+}
+
 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 		      struct tss_struct *tss)
 {
 	struct thread_struct *prev, *next;
+	unsigned long tifp, tifn;
 
 	prev = &prev_p->thread;
 	next = &next_p->thread;
 
-	if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
-	    test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
+	tifn = READ_ONCE(task_thread_info(next_p)->flags);
+	tifp = READ_ONCE(task_thread_info(prev_p)->flags);
+	switch_to_bitmap(tss, prev, next, tifp, tifn);
+
+	propagate_user_return_notify(prev_p, next_p);
+
+	if ((tifp ^ tifn) & _TIF_BLOCKSTEP) {
 		unsigned long debugctl = get_debugctlmsr();
 
 		debugctl &= ~DEBUGCTLMSR_BTF;
-		if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
+		if (tifn & _TIF_BLOCKSTEP)
 			debugctl |= DEBUGCTLMSR_BTF;
-
 		update_debugctlmsr(debugctl);
 	}
 
-	if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
-	    test_tsk_thread_flag(next_p, TIF_NOTSC)) {
-		/* prev and next are different */
-		if (test_tsk_thread_flag(next_p, TIF_NOTSC))
+	if ((tifp ^ tifn) & _TIF_NOTSC) {
+		if (tifn & _TIF_NOTSC)
 			hard_disable_TSC();
 		else
 			hard_enable_TSC();
 	}
-
-	if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
-		/*
-		 * Copy the relevant range of the IO bitmap.
-		 * Normally this is 128 bytes or less:
-		 */
-		memcpy(tss->io_bitmap, next->io_bitmap_ptr,
-		       max(prev->io_bitmap_max, next->io_bitmap_max));
-	} else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
-		/*
-		 * Clear any possible leftover bits:
-		 */
-		memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
-	}
-	propagate_user_return_notify(prev_p, next_p);
 }
 
 /*

From 0f7cb02d7cf702c875c5596f2b71063844ea7180 Mon Sep 17 00:00:00 2001
From: Kyle Huey <me@kylehuey.com>
Date: Sat, 14 Jul 2018 02:35:44 -0700
Subject: [PATCH 1328/1852] x86/process: Correct and optimize TIF_BLOCKSTEP
 switch

commit b9894a2f5bd18b1691cb6872c9afe32b148d0132 upstream

The debug control MSR is "highly magical" as the blockstep bit can be
cleared by hardware under not well documented circumstances.

So a task switch relying on the bit set by the previous task (according to
the previous tasks thread flags) can trip over this and not update the flag
for the next task.

To fix this its required to handle DEBUGCTLMSR_BTF when either the previous
or the next or both tasks have the TIF_BLOCKSTEP flag set.

While at it avoid branching within the TIF_BLOCKSTEP case and evaluating
boot_cpu_data twice in kernels without CONFIG_X86_DEBUGCTLMSR.

x86_64: arch/x86/kernel/process.o
text	data	bss	dec	 hex
3024    8577    16      11617    2d61	Before
3008	8577	16	11601	 2d51	After

i386: No change

[ tglx: Made the shift value explicit, use a local variable to make the
code readable and massaged changelog]

Originally-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Kyle Huey <khuey@kylehuey.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Link: http://lkml.kernel.org/r/20170214081104.9244-3-khuey@kylehuey.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/kernel/process.c        | 12 +++++++-----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index a29edb7234313..71a2c84013b3f 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -150,6 +150,7 @@
 
 /* DEBUGCTLMSR bits (others vary by model): */
 #define DEBUGCTLMSR_LBR			(1UL <<  0) /* last branch recording */
+#define DEBUGCTLMSR_BTF_SHIFT		1
 #define DEBUGCTLMSR_BTF			(1UL <<  1) /* single-step on branches */
 #define DEBUGCTLMSR_TR			(1UL <<  6)
 #define DEBUGCTLMSR_BTS			(1UL <<  7)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 725d8305c0047..9db1836f2a097 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -209,13 +209,15 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 
 	propagate_user_return_notify(prev_p, next_p);
 
-	if ((tifp ^ tifn) & _TIF_BLOCKSTEP) {
-		unsigned long debugctl = get_debugctlmsr();
+	if ((tifp & _TIF_BLOCKSTEP || tifn & _TIF_BLOCKSTEP) &&
+	    arch_has_block_step()) {
+		unsigned long debugctl, msk;
 
+		rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
 		debugctl &= ~DEBUGCTLMSR_BTF;
-		if (tifn & _TIF_BLOCKSTEP)
-			debugctl |= DEBUGCTLMSR_BTF;
-		update_debugctlmsr(debugctl);
+		msk = tifn & _TIF_BLOCKSTEP;
+		debugctl |= (msk >> TIF_BLOCKSTEP) << DEBUGCTLMSR_BTF_SHIFT;
+		wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
 	}
 
 	if ((tifp ^ tifn) & _TIF_NOTSC) {

From e0a42be0df1fe19077fb66e5ea8a87714720f2bb Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:35:52 -0700
Subject: [PATCH 1329/1852] x86/process: Optimize TIF_NOTSC switch

commit 5a920155e388ec22a22e0532fb695b9215c9b34d upstream

Provide and use a toggle helper instead of doing it with a branch.

x86_64: arch/x86/kernel/process.o
text	   data	    bss	    dec	    hex
3008	   8577	     16	  11601	   2d51 Before
2976       8577      16	  11569	   2d31 After

i386: arch/x86/kernel/process.o
text	   data	    bss	    dec	    hex
2925	   8673	      8	  11606	   2d56 Before
2893	   8673       8	  11574	   2d36 After

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Link: http://lkml.kernel.org/r/20170214081104.9244-4-khuey@kylehuey.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/tlbflush.h | 10 ++++++++++
 arch/x86/kernel/process.c       | 22 ++++------------------
 2 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 8ce07db77299a..72cfe3e53af1a 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -111,6 +111,16 @@ static inline void cr4_clear_bits(unsigned long mask)
 	}
 }
 
+static inline void cr4_toggle_bits(unsigned long mask)
+{
+	unsigned long cr4;
+
+	cr4 = this_cpu_read(cpu_tlbstate.cr4);
+	cr4 ^= mask;
+	this_cpu_write(cpu_tlbstate.cr4, cr4);
+	__write_cr4(cr4);
+}
+
 /* Read the CR4 shadow. */
 static inline unsigned long cr4_read_shadow(void)
 {
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 9db1836f2a097..838717d978e48 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -116,11 +116,6 @@ void flush_thread(void)
 	fpu__clear(&tsk->thread.fpu);
 }
 
-static void hard_disable_TSC(void)
-{
-	cr4_set_bits(X86_CR4_TSD);
-}
-
 void disable_TSC(void)
 {
 	preempt_disable();
@@ -129,15 +124,10 @@ void disable_TSC(void)
 		 * Must flip the CPU state synchronously with
 		 * TIF_NOTSC in the current running context.
 		 */
-		hard_disable_TSC();
+		cr4_set_bits(X86_CR4_TSD);
 	preempt_enable();
 }
 
-static void hard_enable_TSC(void)
-{
-	cr4_clear_bits(X86_CR4_TSD);
-}
-
 static void enable_TSC(void)
 {
 	preempt_disable();
@@ -146,7 +136,7 @@ static void enable_TSC(void)
 		 * Must flip the CPU state synchronously with
 		 * TIF_NOTSC in the current running context.
 		 */
-		hard_enable_TSC();
+		cr4_clear_bits(X86_CR4_TSD);
 	preempt_enable();
 }
 
@@ -220,12 +210,8 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 		wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
 	}
 
-	if ((tifp ^ tifn) & _TIF_NOTSC) {
-		if (tifn & _TIF_NOTSC)
-			hard_disable_TSC();
-		else
-			hard_enable_TSC();
-	}
+	if ((tifp ^ tifn) & _TIF_NOTSC)
+		cr4_toggle_bits(X86_CR4_TSD);
 }
 
 /*

From 1aa6986161819db5c28b5df81f07a5deb5ee3d92 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:36:00 -0700
Subject: [PATCH 1330/1852] x86/process: Allow runtime control of Speculative
 Store Bypass

commit 885f82bfbc6fefb6664ea27965c3ab9ac4194b8c upstream

The Speculative Store Bypass vulnerability can be mitigated with the
Reduced Data Speculation (RDS) feature. To allow finer grained control of
this eventually expensive mitigation a per task mitigation control is
required.

Add a new TIF_RDS flag and put it into the group of TIF flags which are
evaluated for mismatch in switch_to(). If these bits differ in the previous
and the next task, then the slow path function __switch_to_xtra() is
invoked. Implement the TIF_RDS dependent mitigation control in the slow
path.

If the prctl for controlling Speculative Store Bypass is disabled or no
task uses the prctl then there is no overhead in the switch_to() fast
path.

Update the KVM related speculation control functions to take TID_RDS into
account as well.

Based on a patch from Tim Chen. Completely rewritten.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/msr-index.h   |  3 ++-
 arch/x86/include/asm/spec-ctrl.h   | 17 +++++++++++++++++
 arch/x86/include/asm/thread_info.h |  6 ++++--
 arch/x86/kernel/cpu/bugs.c         | 26 +++++++++++++++++++++-----
 arch/x86/kernel/process.c          | 22 ++++++++++++++++++++++
 5 files changed, 66 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 71a2c84013b3f..883cf0d6b1f9e 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -35,7 +35,8 @@
 #define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */
 #define SPEC_CTRL_IBRS			(1 << 0)   /* Indirect Branch Restricted Speculation */
 #define SPEC_CTRL_STIBP			(1 << 1)   /* Single Thread Indirect Branch Predictors */
-#define SPEC_CTRL_RDS			(1 << 2)   /* Reduced Data Speculation */
+#define SPEC_CTRL_RDS_SHIFT		2	   /* Reduced Data Speculation bit */
+#define SPEC_CTRL_RDS			(1 << SPEC_CTRL_RDS_SHIFT)   /* Reduced Data Speculation */
 
 #define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
 #define PRED_CMD_IBPB			(1 << 0)   /* Indirect Branch Prediction Barrier */
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 3ad64420a06e9..45ef00ad51050 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -2,6 +2,7 @@
 #ifndef _ASM_X86_SPECCTRL_H_
 #define _ASM_X86_SPECCTRL_H_
 
+#include <linux/thread_info.h>
 #include <asm/nospec-branch.h>
 
 /*
@@ -18,4 +19,20 @@ extern void x86_spec_ctrl_restore_host(u64);
 extern u64 x86_amd_ls_cfg_base;
 extern u64 x86_amd_ls_cfg_rds_mask;
 
+/* The Intel SPEC CTRL MSR base value cache */
+extern u64 x86_spec_ctrl_base;
+
+static inline u64 rds_tif_to_spec_ctrl(u64 tifn)
+{
+	BUILD_BUG_ON(TIF_RDS < SPEC_CTRL_RDS_SHIFT);
+	return (tifn & _TIF_RDS) >> (TIF_RDS - SPEC_CTRL_RDS_SHIFT);
+}
+
+static inline u64 rds_tif_to_amd_ls_cfg(u64 tifn)
+{
+	return (tifn & _TIF_RDS) ? x86_amd_ls_cfg_rds_mask : 0ULL;
+}
+
+extern void speculative_store_bypass_update(void);
+
 #endif
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 030c53dcb2ed7..6971a72cb0f38 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -92,6 +92,7 @@ struct thread_info {
 #define TIF_SIGPENDING		2	/* signal pending */
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_SINGLESTEP		4	/* reenable singlestep on user return*/
+#define TIF_RDS			5	/* Reduced data speculation */
 #define TIF_SYSCALL_EMU		6	/* syscall emulation active */
 #define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */
 #define TIF_SECCOMP		8	/* secure computing */
@@ -114,8 +115,9 @@ struct thread_info {
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
-#define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
+#define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
+#define _TIF_RDS		(1 << TIF_RDS)
 #define _TIF_SYSCALL_EMU	(1 << TIF_SYSCALL_EMU)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
@@ -147,7 +149,7 @@ struct thread_info {
 
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW							\
-	(_TIF_IO_BITMAP|_TIF_NOTSC|_TIF_BLOCKSTEP)
+	(_TIF_IO_BITMAP|_TIF_NOTSC|_TIF_BLOCKSTEP|_TIF_RDS)
 
 #define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY)
 #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 47a3cc08a8892..0f8303ec05320 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -32,7 +32,7 @@ static void __init ssb_select_mitigation(void);
  * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any
  * writes to SPEC_CTRL contain whatever reserved bits have been set.
  */
-static u64 x86_spec_ctrl_base;
+u64 x86_spec_ctrl_base;
 
 /*
  * The vendor and possibly platform specific bits which can be modified in
@@ -139,25 +139,41 @@ EXPORT_SYMBOL_GPL(x86_spec_ctrl_set);
 
 u64 x86_spec_ctrl_get_default(void)
 {
-	return x86_spec_ctrl_base;
+	u64 msrval = x86_spec_ctrl_base;
+
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+		msrval |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+	return msrval;
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
 
 void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
 {
+	u64 host = x86_spec_ctrl_base;
+
 	if (!boot_cpu_has(X86_FEATURE_IBRS))
 		return;
-	if (x86_spec_ctrl_base != guest_spec_ctrl)
+
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+		host |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+
+	if (host != guest_spec_ctrl)
 		wrmsrl(MSR_IA32_SPEC_CTRL, guest_spec_ctrl);
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_set_guest);
 
 void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
 {
+	u64 host = x86_spec_ctrl_base;
+
 	if (!boot_cpu_has(X86_FEATURE_IBRS))
 		return;
-	if (x86_spec_ctrl_base != guest_spec_ctrl)
-		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
+
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+		host |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+
+	if (host != guest_spec_ctrl)
+		wrmsrl(MSR_IA32_SPEC_CTRL, host);
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_restore_host);
 
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 838717d978e48..b68c269de8ff1 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -31,6 +31,7 @@
 #include <asm/tlbflush.h>
 #include <asm/mce.h>
 #include <asm/vm86.h>
+#include <asm/spec-ctrl.h>
 
 /*
  * per-CPU TSS segments. Threads are completely 'soft' on Linux,
@@ -184,6 +185,24 @@ static inline void switch_to_bitmap(struct tss_struct *tss,
 	}
 }
 
+static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
+{
+	u64 msr;
+
+	if (static_cpu_has(X86_FEATURE_AMD_RDS)) {
+		msr = x86_amd_ls_cfg_base | rds_tif_to_amd_ls_cfg(tifn);
+		wrmsrl(MSR_AMD64_LS_CFG, msr);
+	} else {
+		msr = x86_spec_ctrl_base | rds_tif_to_spec_ctrl(tifn);
+		wrmsrl(MSR_IA32_SPEC_CTRL, msr);
+	}
+}
+
+void speculative_store_bypass_update(void)
+{
+	__speculative_store_bypass_update(current_thread_info()->flags);
+}
+
 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 		      struct tss_struct *tss)
 {
@@ -212,6 +231,9 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 
 	if ((tifp ^ tifn) & _TIF_NOTSC)
 		cr4_toggle_bits(X86_CR4_TSD);
+
+	if ((tifp ^ tifn) & _TIF_RDS)
+		__speculative_store_bypass_update(tifn);
 }
 
 /*

From c5945d5262dca0582af41a213fa78bcbc306ecf1 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:36:09 -0700
Subject: [PATCH 1331/1852] x86/speculation: Add prctl for Speculative Store
 Bypass mitigation

commit a73ec77ee17ec556fe7f165d00314cb7c047b1ac upstream

Add prctl based control for Speculative Store Bypass mitigation and make it
the default mitigation for Intel and AMD.

Andi Kleen provided the following rationale (slightly redacted):

 There are multiple levels of impact of Speculative Store Bypass:

 1) JITed sandbox.
    It cannot invoke system calls, but can do PRIME+PROBE and may have call
    interfaces to other code

 2) Native code process.
    No protection inside the process at this level.

 3) Kernel.

 4) Between processes.

 The prctl tries to protect against case (1) doing attacks.

 If the untrusted code can do random system calls then control is already
 lost in a much worse way. So there needs to be system call protection in
 some way (using a JIT not allowing them or seccomp). Or rather if the
 process can subvert its environment somehow to do the prctl it can already
 execute arbitrary code, which is much worse than SSB.

 To put it differently, the point of the prctl is to not allow JITed code
 to read data it shouldn't read from its JITed sandbox. If it already has
 escaped its sandbox then it can already read everything it wants in its
 address space, and do much worse.

 The ability to control Speculative Store Bypass allows to enable the
 protection selectively without affecting overall system performance.

Based on an initial patch from Tim Chen. Completely rewritten.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/kernel-parameters.txt  |  6 +-
 arch/x86/include/asm/nospec-branch.h |  1 +
 arch/x86/kernel/cpu/bugs.c           | 83 ++++++++++++++++++++++++----
 3 files changed, 79 insertions(+), 11 deletions(-)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 506dc40f34bc4..3d1249c93d9b1 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3721,7 +3721,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			off    - Unconditionally enable Speculative Store Bypass
 			auto   - Kernel detects whether the CPU model contains an
 				 implementation of Speculative Store Bypass and
-				 picks the most appropriate mitigation
+				 picks the most appropriate mitigation.
+			prctl  - Control Speculative Store Bypass per thread
+				 via prctl. Speculative Store Bypass is enabled
+				 for a process by default. The state of the control
+				 is inherited on fork.
 
 			Not specifying this option is equivalent to
 			spec_store_bypass_disable=auto.
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 47c454c295354..155d955ab8010 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -187,6 +187,7 @@ extern u64 x86_spec_ctrl_get_default(void);
 enum ssb_mitigation {
 	SPEC_STORE_BYPASS_NONE,
 	SPEC_STORE_BYPASS_DISABLE,
+	SPEC_STORE_BYPASS_PRCTL,
 };
 
 extern char __indirect_thunk_start[];
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 0f8303ec05320..bcfccd3d65429 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -11,6 +11,8 @@
 #include <linux/utsname.h>
 #include <linux/cpu.h>
 #include <linux/module.h>
+#include <linux/nospec.h>
+#include <linux/prctl.h>
 
 #include <asm/spec-ctrl.h>
 #include <asm/cmdline.h>
@@ -411,20 +413,23 @@ enum ssb_mitigation_cmd {
 	SPEC_STORE_BYPASS_CMD_NONE,
 	SPEC_STORE_BYPASS_CMD_AUTO,
 	SPEC_STORE_BYPASS_CMD_ON,
+	SPEC_STORE_BYPASS_CMD_PRCTL,
 };
 
 static const char *ssb_strings[] = {
 	[SPEC_STORE_BYPASS_NONE]	= "Vulnerable",
-	[SPEC_STORE_BYPASS_DISABLE]	= "Mitigation: Speculative Store Bypass disabled"
+	[SPEC_STORE_BYPASS_DISABLE]	= "Mitigation: Speculative Store Bypass disabled",
+	[SPEC_STORE_BYPASS_PRCTL]	= "Mitigation: Speculative Store Bypass disabled via prctl"
 };
 
 static const struct {
 	const char *option;
 	enum ssb_mitigation_cmd cmd;
 } ssb_mitigation_options[] = {
-	{ "auto",	SPEC_STORE_BYPASS_CMD_AUTO }, /* Platform decides */
-	{ "on",		SPEC_STORE_BYPASS_CMD_ON },   /* Disable Speculative Store Bypass */
-	{ "off",	SPEC_STORE_BYPASS_CMD_NONE }, /* Don't touch Speculative Store Bypass */
+	{ "auto",	SPEC_STORE_BYPASS_CMD_AUTO },  /* Platform decides */
+	{ "on",		SPEC_STORE_BYPASS_CMD_ON },    /* Disable Speculative Store Bypass */
+	{ "off",	SPEC_STORE_BYPASS_CMD_NONE },  /* Don't touch Speculative Store Bypass */
+	{ "prctl",	SPEC_STORE_BYPASS_CMD_PRCTL }, /* Disable Speculative Store Bypass via prctl */
 };
 
 static enum ssb_mitigation_cmd __init ssb_parse_cmdline(void)
@@ -474,14 +479,15 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 
 	switch (cmd) {
 	case SPEC_STORE_BYPASS_CMD_AUTO:
-		/*
-		 * AMD platforms by default don't need SSB mitigation.
-		 */
-		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
-			break;
+		/* Choose prctl as the default mode */
+		mode = SPEC_STORE_BYPASS_PRCTL;
+		break;
 	case SPEC_STORE_BYPASS_CMD_ON:
 		mode = SPEC_STORE_BYPASS_DISABLE;
 		break;
+	case SPEC_STORE_BYPASS_CMD_PRCTL:
+		mode = SPEC_STORE_BYPASS_PRCTL;
+		break;
 	case SPEC_STORE_BYPASS_CMD_NONE:
 		break;
 	}
@@ -492,7 +498,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 	 *  - X86_FEATURE_RDS - CPU is able to turn off speculative store bypass
 	 *  - X86_FEATURE_SPEC_STORE_BYPASS_DISABLE - engage the mitigation
 	 */
-	if (mode != SPEC_STORE_BYPASS_NONE) {
+	if (mode == SPEC_STORE_BYPASS_DISABLE) {
 		setup_force_cpu_cap(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE);
 		/*
 		 * Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD uses
@@ -523,6 +529,63 @@ static void ssb_select_mitigation()
 
 #undef pr_fmt
 
+static int ssb_prctl_set(unsigned long ctrl)
+{
+	bool rds = !!test_tsk_thread_flag(current, TIF_RDS);
+
+	if (ssb_mode != SPEC_STORE_BYPASS_PRCTL)
+		return -ENXIO;
+
+	if (ctrl == PR_SPEC_ENABLE)
+		clear_tsk_thread_flag(current, TIF_RDS);
+	else
+		set_tsk_thread_flag(current, TIF_RDS);
+
+	if (rds != !!test_tsk_thread_flag(current, TIF_RDS))
+		speculative_store_bypass_update();
+
+	return 0;
+}
+
+static int ssb_prctl_get(void)
+{
+	switch (ssb_mode) {
+	case SPEC_STORE_BYPASS_DISABLE:
+		return PR_SPEC_DISABLE;
+	case SPEC_STORE_BYPASS_PRCTL:
+		if (test_tsk_thread_flag(current, TIF_RDS))
+			return PR_SPEC_PRCTL | PR_SPEC_DISABLE;
+		return PR_SPEC_PRCTL | PR_SPEC_ENABLE;
+	default:
+		if (boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
+			return PR_SPEC_ENABLE;
+		return PR_SPEC_NOT_AFFECTED;
+	}
+}
+
+int arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl)
+{
+	if (ctrl != PR_SPEC_ENABLE && ctrl != PR_SPEC_DISABLE)
+		return -ERANGE;
+
+	switch (which) {
+	case PR_SPEC_STORE_BYPASS:
+		return ssb_prctl_set(ctrl);
+	default:
+		return -ENODEV;
+	}
+}
+
+int arch_prctl_spec_ctrl_get(unsigned long which)
+{
+	switch (which) {
+	case PR_SPEC_STORE_BYPASS:
+		return ssb_prctl_get();
+	default:
+		return -ENODEV;
+	}
+}
+
 void x86_spec_ctrl_setup_ap(void)
 {
 	if (boot_cpu_has(X86_FEATURE_IBRS))

From 7f6ae9537578e712e5adc9390db321a659d34ca7 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Sat, 14 Jul 2018 02:36:17 -0700
Subject: [PATCH 1332/1852] nospec: Allow getting/setting on non-current task

commit 7bbf1373e228840bb0295a2ca26d548ef37f448e upstream

Adjust arch_prctl_get/set_spec_ctrl() to operate on tasks other than
current.

This is needed both for /proc/$pid/status queries and for seccomp (since
thread-syncing can trigger seccomp in non-current threads).

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 27 ++++++++++++++++-----------
 include/linux/nospec.h     |  7 +++++--
 kernel/sys.c               |  9 +++++----
 3 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index bcfccd3d65429..64b54a4c30f5a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -529,31 +529,35 @@ static void ssb_select_mitigation()
 
 #undef pr_fmt
 
-static int ssb_prctl_set(unsigned long ctrl)
+static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 {
-	bool rds = !!test_tsk_thread_flag(current, TIF_RDS);
+	bool rds = !!test_tsk_thread_flag(task, TIF_RDS);
 
 	if (ssb_mode != SPEC_STORE_BYPASS_PRCTL)
 		return -ENXIO;
 
 	if (ctrl == PR_SPEC_ENABLE)
-		clear_tsk_thread_flag(current, TIF_RDS);
+		clear_tsk_thread_flag(task, TIF_RDS);
 	else
-		set_tsk_thread_flag(current, TIF_RDS);
+		set_tsk_thread_flag(task, TIF_RDS);
 
-	if (rds != !!test_tsk_thread_flag(current, TIF_RDS))
+	/*
+	 * If being set on non-current task, delay setting the CPU
+	 * mitigation until it is next scheduled.
+	 */
+	if (task == current && rds != !!test_tsk_thread_flag(task, TIF_RDS))
 		speculative_store_bypass_update();
 
 	return 0;
 }
 
-static int ssb_prctl_get(void)
+static int ssb_prctl_get(struct task_struct *task)
 {
 	switch (ssb_mode) {
 	case SPEC_STORE_BYPASS_DISABLE:
 		return PR_SPEC_DISABLE;
 	case SPEC_STORE_BYPASS_PRCTL:
-		if (test_tsk_thread_flag(current, TIF_RDS))
+		if (test_tsk_thread_flag(task, TIF_RDS))
 			return PR_SPEC_PRCTL | PR_SPEC_DISABLE;
 		return PR_SPEC_PRCTL | PR_SPEC_ENABLE;
 	default:
@@ -563,24 +567,25 @@ static int ssb_prctl_get(void)
 	}
 }
 
-int arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl)
+int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
+			     unsigned long ctrl)
 {
 	if (ctrl != PR_SPEC_ENABLE && ctrl != PR_SPEC_DISABLE)
 		return -ERANGE;
 
 	switch (which) {
 	case PR_SPEC_STORE_BYPASS:
-		return ssb_prctl_set(ctrl);
+		return ssb_prctl_set(task, ctrl);
 	default:
 		return -ENODEV;
 	}
 }
 
-int arch_prctl_spec_ctrl_get(unsigned long which)
+int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
 {
 	switch (which) {
 	case PR_SPEC_STORE_BYPASS:
-		return ssb_prctl_get();
+		return ssb_prctl_get(task);
 	default:
 		return -ENODEV;
 	}
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index 700bb8a4e4eac..a908c954484da 100644
--- a/include/linux/nospec.h
+++ b/include/linux/nospec.h
@@ -7,6 +7,8 @@
 #define _LINUX_NOSPEC_H
 #include <asm/barrier.h>
 
+struct task_struct;
+
 /**
  * array_index_mask_nospec() - generate a ~0 mask when index < size, 0 otherwise
  * @index: array element index
@@ -57,7 +59,8 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
 })
 
 /* Speculation control prctl */
-int arch_prctl_spec_ctrl_get(unsigned long which);
-int arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl);
+int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which);
+int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
+			     unsigned long ctrl);
 
 #endif /* _LINUX_NOSPEC_H */
diff --git a/kernel/sys.c b/kernel/sys.c
index e7da5094eb4d8..0df4753d49699 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -2224,12 +2224,13 @@ static int prctl_set_vma(unsigned long opt, unsigned long start,
 }
 #endif
 
-int __weak arch_prctl_spec_ctrl_get(unsigned long which)
+int __weak arch_prctl_spec_ctrl_get(struct task_struct *t, unsigned long which)
 {
 	return -EINVAL;
 }
 
-int __weak arch_prctl_spec_ctrl_set(unsigned long which, unsigned long ctrl)
+int __weak arch_prctl_spec_ctrl_set(struct task_struct *t, unsigned long which,
+				    unsigned long ctrl)
 {
 	return -EINVAL;
 }
@@ -2458,12 +2459,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
 	case PR_GET_SPECULATION_CTRL:
 		if (arg3 || arg4 || arg5)
 			return -EINVAL;
-		error = arch_prctl_spec_ctrl_get(arg2);
+		error = arch_prctl_spec_ctrl_get(me, arg2);
 		break;
 	case PR_SET_SPECULATION_CTRL:
 		if (arg4 || arg5)
 			return -EINVAL;
-		error = arch_prctl_spec_ctrl_set(arg2, arg3);
+		error = arch_prctl_spec_ctrl_set(me, arg2, arg3);
 		break;
 	default:
 		error = -EINVAL;

From 82fe025afdc0efb596f61caef8b66b489430c87d Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Sat, 14 Jul 2018 02:36:25 -0700
Subject: [PATCH 1333/1852] proc: Provide details on speculation flaw
 mitigations

commit fae1fa0fc6cca8beee3ab8ed71d54f9a78fa3f64 upstream

As done with seccomp and no_new_privs, also show speculation flaw
mitigation state in /proc/$pid/status.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/array.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/fs/proc/array.c b/fs/proc/array.c
index b6c00ce0e29e3..bb48358b99a37 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -79,6 +79,7 @@
 #include <linux/delayacct.h>
 #include <linux/seq_file.h>
 #include <linux/pid_namespace.h>
+#include <linux/prctl.h>
 #include <linux/ptrace.h>
 #include <linux/tracehook.h>
 #include <linux/string_helpers.h>
@@ -332,6 +333,28 @@ static inline void task_seccomp(struct seq_file *m, struct task_struct *p)
 #ifdef CONFIG_SECCOMP
 	seq_printf(m, "Seccomp:\t%d\n", p->seccomp.mode);
 #endif
+	seq_printf(m, "\nSpeculation Store Bypass:\t");
+	switch (arch_prctl_spec_ctrl_get(p, PR_SPEC_STORE_BYPASS)) {
+	case -EINVAL:
+		seq_printf(m, "unknown");
+		break;
+	case PR_SPEC_NOT_AFFECTED:
+		seq_printf(m, "not vulnerable");
+		break;
+	case PR_SPEC_PRCTL | PR_SPEC_DISABLE:
+		seq_printf(m, "thread mitigated");
+		break;
+	case PR_SPEC_PRCTL | PR_SPEC_ENABLE:
+		seq_printf(m, "thread vulnerable");
+		break;
+	case PR_SPEC_DISABLE:
+		seq_printf(m, "globally mitigated");
+		break;
+	default:
+		seq_printf(m, "vulnerable");
+		break;
+	}
+	seq_putc(m, '\n');
 }
 
 static inline void task_context_switch_counts(struct seq_file *m,

From cebba7100a915656d361deaabbee9e139aff5c31 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Sat, 14 Jul 2018 02:36:33 -0700
Subject: [PATCH 1334/1852] seccomp: Enable speculation flaw mitigations

commit 5c3070890d06ff82eecb808d02d2ca39169533ef upstream

When speculation flaw mitigations are opt-in (via prctl), using seccomp
will automatically opt-in to these protections, since using seccomp
indicates at least some level of sandboxing is desired.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/seccomp.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index efd384f3f852e..bfb1ee845ba66 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -16,6 +16,8 @@
 #include <linux/atomic.h>
 #include <linux/audit.h>
 #include <linux/compat.h>
+#include <linux/nospec.h>
+#include <linux/prctl.h>
 #include <linux/sched.h>
 #include <linux/seccomp.h>
 #include <linux/slab.h>
@@ -214,6 +216,19 @@ static inline bool seccomp_may_assign_mode(unsigned long seccomp_mode)
 	return true;
 }
 
+/*
+ * If a given speculation mitigation is opt-in (prctl()-controlled),
+ * select it, by disabling speculation (enabling mitigation).
+ */
+static inline void spec_mitigate(struct task_struct *task,
+				 unsigned long which)
+{
+	int state = arch_prctl_spec_ctrl_get(task, which);
+
+	if (state > 0 && (state & PR_SPEC_PRCTL))
+		arch_prctl_spec_ctrl_set(task, which, PR_SPEC_DISABLE);
+}
+
 static inline void seccomp_assign_mode(struct task_struct *task,
 				       unsigned long seccomp_mode)
 {
@@ -225,6 +240,8 @@ static inline void seccomp_assign_mode(struct task_struct *task,
 	 * filter) is set.
 	 */
 	smp_mb__before_atomic();
+	/* Assume seccomp processes want speculation flaw mitigation. */
+	spec_mitigate(task, PR_SPEC_STORE_BYPASS);
 	set_tsk_thread_flag(task, TIF_SECCOMP);
 }
 

From 0afd225dab9027b934522e58e0ac87a5ce9ae289 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:36:41 -0700
Subject: [PATCH 1335/1852] prctl: Add force disable speculation

commit 356e4bfff2c5489e016fdb925adbf12a1e3950ee upstream

For certain use cases it is desired to enforce mitigations so they cannot
be undone afterwards. That's important for loader stubs which want to
prevent a child from disabling the mitigation again. Will also be used for
seccomp(). The extra state preserving of the prctl state for SSB is a
preparatory step for EBPF dymanic speculation control.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/spec_ctrl.txt | 34 +++++++++++++++++++++-------------
 arch/x86/kernel/cpu/bugs.c  | 35 +++++++++++++++++++++++++----------
 fs/proc/array.c             |  3 +++
 include/linux/sched.h       |  9 +++++++++
 include/uapi/linux/prctl.h  |  1 +
 5 files changed, 59 insertions(+), 23 deletions(-)

diff --git a/Documentation/spec_ctrl.txt b/Documentation/spec_ctrl.txt
index ddbebcd012084..1b3690d309438 100644
--- a/Documentation/spec_ctrl.txt
+++ b/Documentation/spec_ctrl.txt
@@ -25,19 +25,21 @@ PR_GET_SPECULATION_CTRL
 -----------------------
 
 PR_GET_SPECULATION_CTRL returns the state of the speculation misfeature
-which is selected with arg2 of prctl(2). The return value uses bits 0-2 with
+which is selected with arg2 of prctl(2). The return value uses bits 0-3 with
 the following meaning:
 
-==== ================ ===================================================
-Bit  Define           Description
-==== ================ ===================================================
-0    PR_SPEC_PRCTL    Mitigation can be controlled per task by
-                      PR_SET_SPECULATION_CTRL
-1    PR_SPEC_ENABLE   The speculation feature is enabled, mitigation is
-                      disabled
-2    PR_SPEC_DISABLE  The speculation feature is disabled, mitigation is
-                      enabled
-==== ================ ===================================================
+==== ===================== ===================================================
+Bit  Define                Description
+==== ===================== ===================================================
+0    PR_SPEC_PRCTL         Mitigation can be controlled per task by
+                           PR_SET_SPECULATION_CTRL
+1    PR_SPEC_ENABLE        The speculation feature is enabled, mitigation is
+                           disabled
+2    PR_SPEC_DISABLE       The speculation feature is disabled, mitigation is
+                           enabled
+3    PR_SPEC_FORCE_DISABLE Same as PR_SPEC_DISABLE, but cannot be undone. A
+                           subsequent prctl(..., PR_SPEC_ENABLE) will fail.
+==== ===================== ===================================================
 
 If all bits are 0 the CPU is not affected by the speculation misfeature.
 
@@ -47,9 +49,11 @@ misfeature will fail.
 
 PR_SET_SPECULATION_CTRL
 -----------------------
+
 PR_SET_SPECULATION_CTRL allows to control the speculation misfeature, which
 is selected by arg2 of :manpage:`prctl(2)` per task. arg3 is used to hand
-in the control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE.
+in the control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE or
+PR_SPEC_FORCE_DISABLE.
 
 Common error codes
 ------------------
@@ -70,10 +74,13 @@ Value   Meaning
 0       Success
 
 ERANGE  arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor
-        PR_SPEC_DISABLE
+        PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE
 
 ENXIO   Control of the selected speculation misfeature is not possible.
         See PR_GET_SPECULATION_CTRL.
+
+EPERM   Speculation was disabled with PR_SPEC_FORCE_DISABLE and caller
+        tried to enable it again.
 ======= =================================================================
 
 Speculation misfeature controls
@@ -84,3 +91,4 @@ Speculation misfeature controls
    * prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, 0, 0, 0);
    * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
    * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
+   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 64b54a4c30f5a..d6897caa8f47e 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -531,21 +531,37 @@ static void ssb_select_mitigation()
 
 static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 {
-	bool rds = !!test_tsk_thread_flag(task, TIF_RDS);
+	bool update;
 
 	if (ssb_mode != SPEC_STORE_BYPASS_PRCTL)
 		return -ENXIO;
 
-	if (ctrl == PR_SPEC_ENABLE)
-		clear_tsk_thread_flag(task, TIF_RDS);
-	else
-		set_tsk_thread_flag(task, TIF_RDS);
+	switch (ctrl) {
+	case PR_SPEC_ENABLE:
+		/* If speculation is force disabled, enable is not allowed */
+		if (task_spec_ssb_force_disable(task))
+			return -EPERM;
+		task_clear_spec_ssb_disable(task);
+		update = test_and_clear_tsk_thread_flag(task, TIF_RDS);
+		break;
+	case PR_SPEC_DISABLE:
+		task_set_spec_ssb_disable(task);
+		update = !test_and_set_tsk_thread_flag(task, TIF_RDS);
+		break;
+	case PR_SPEC_FORCE_DISABLE:
+		task_set_spec_ssb_disable(task);
+		task_set_spec_ssb_force_disable(task);
+		update = !test_and_set_tsk_thread_flag(task, TIF_RDS);
+		break;
+	default:
+		return -ERANGE;
+	}
 
 	/*
 	 * If being set on non-current task, delay setting the CPU
 	 * mitigation until it is next scheduled.
 	 */
-	if (task == current && rds != !!test_tsk_thread_flag(task, TIF_RDS))
+	if (task == current && update)
 		speculative_store_bypass_update();
 
 	return 0;
@@ -557,7 +573,9 @@ static int ssb_prctl_get(struct task_struct *task)
 	case SPEC_STORE_BYPASS_DISABLE:
 		return PR_SPEC_DISABLE;
 	case SPEC_STORE_BYPASS_PRCTL:
-		if (test_tsk_thread_flag(task, TIF_RDS))
+		if (task_spec_ssb_force_disable(task))
+			return PR_SPEC_PRCTL | PR_SPEC_FORCE_DISABLE;
+		if (task_spec_ssb_disable(task))
 			return PR_SPEC_PRCTL | PR_SPEC_DISABLE;
 		return PR_SPEC_PRCTL | PR_SPEC_ENABLE;
 	default:
@@ -570,9 +588,6 @@ static int ssb_prctl_get(struct task_struct *task)
 int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
 			     unsigned long ctrl)
 {
-	if (ctrl != PR_SPEC_ENABLE && ctrl != PR_SPEC_DISABLE)
-		return -ERANGE;
-
 	switch (which) {
 	case PR_SPEC_STORE_BYPASS:
 		return ssb_prctl_set(task, ctrl);
diff --git a/fs/proc/array.c b/fs/proc/array.c
index bb48358b99a37..31414787c971e 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -341,6 +341,9 @@ static inline void task_seccomp(struct seq_file *m, struct task_struct *p)
 	case PR_SPEC_NOT_AFFECTED:
 		seq_printf(m, "not vulnerable");
 		break;
+	case PR_SPEC_PRCTL | PR_SPEC_FORCE_DISABLE:
+		seq_printf(m, "thread force mitigated");
+		break;
 	case PR_SPEC_PRCTL | PR_SPEC_DISABLE:
 		seq_printf(m, "thread mitigated");
 		break;
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 24ea3398ae150..5ad2b620e041e 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -2348,6 +2348,8 @@ static inline void memalloc_noio_restore(unsigned int flags)
 #define PFA_NO_NEW_PRIVS 0	/* May not gain new privileges. */
 #define PFA_SPREAD_PAGE  1      /* Spread page cache over cpuset */
 #define PFA_SPREAD_SLAB  2      /* Spread some slab caches over cpuset */
+#define PFA_SPEC_SSB_DISABLE		4	/* Speculative Store Bypass disabled */
+#define PFA_SPEC_SSB_FORCE_DISABLE	5	/* Speculative Store Bypass force disabled*/
 
 
 #define TASK_PFA_TEST(name, func)					\
@@ -2371,6 +2373,13 @@ TASK_PFA_TEST(SPREAD_SLAB, spread_slab)
 TASK_PFA_SET(SPREAD_SLAB, spread_slab)
 TASK_PFA_CLEAR(SPREAD_SLAB, spread_slab)
 
+TASK_PFA_TEST(SPEC_SSB_DISABLE, spec_ssb_disable)
+TASK_PFA_SET(SPEC_SSB_DISABLE, spec_ssb_disable)
+TASK_PFA_CLEAR(SPEC_SSB_DISABLE, spec_ssb_disable)
+
+TASK_PFA_TEST(SPEC_SSB_FORCE_DISABLE, spec_ssb_force_disable)
+TASK_PFA_SET(SPEC_SSB_FORCE_DISABLE, spec_ssb_force_disable)
+
 /*
  * task->jobctl flags
  */
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index 95e71219ce81d..f0e9f0460ee73 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -216,5 +216,6 @@ struct prctl_mm_map {
 # define PR_SPEC_PRCTL			(1UL << 0)
 # define PR_SPEC_ENABLE			(1UL << 1)
 # define PR_SPEC_DISABLE		(1UL << 2)
+# define PR_SPEC_FORCE_DISABLE		(1UL << 3)
 
 #endif /* _LINUX_PRCTL_H */

From fe5fe61cee5d11fc8772aeb6e99895a462a36d31 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:36:49 -0700
Subject: [PATCH 1336/1852] seccomp: Use PR_SPEC_FORCE_DISABLE

commit b849a812f7eb92e96d1c8239b06581b2cfd8b275 upstream

Use PR_SPEC_FORCE_DISABLE in seccomp() because seccomp does not allow to
widen restrictions.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/seccomp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index bfb1ee845ba66..f33539f31bc02 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -226,7 +226,7 @@ static inline void spec_mitigate(struct task_struct *task,
 	int state = arch_prctl_spec_ctrl_get(task, which);
 
 	if (state > 0 && (state & PR_SPEC_PRCTL))
-		arch_prctl_spec_ctrl_set(task, which, PR_SPEC_DISABLE);
+		arch_prctl_spec_ctrl_set(task, which, PR_SPEC_FORCE_DISABLE);
 }
 
 static inline void seccomp_assign_mode(struct task_struct *task,

From 2e51f765c9bf93df61e0ea0f635babf8f8eb9680 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Sat, 14 Jul 2018 02:36:57 -0700
Subject: [PATCH 1337/1852] seccomp: Add filter flag to opt-out of SSB
 mitigation

commit 00a02d0c502a06d15e07b857f8ff921e3e402675 upstream

If a seccomp user is not interested in Speculative Store Bypass mitigation
by default, it can set the new SECCOMP_FILTER_FLAG_SPEC_ALLOW flag when
adding filters.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/seccomp.h                       |  3 +-
 include/uapi/linux/seccomp.h                  |  4 +-
 kernel/seccomp.c                              | 19 +++--
 tools/testing/selftests/seccomp/seccomp_bpf.c | 78 ++++++++++++++++++-
 4 files changed, 93 insertions(+), 11 deletions(-)

diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 2296e6b2f6907..5a53d34bba26d 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -3,7 +3,8 @@
 
 #include <uapi/linux/seccomp.h>
 
-#define SECCOMP_FILTER_FLAG_MASK	(SECCOMP_FILTER_FLAG_TSYNC)
+#define SECCOMP_FILTER_FLAG_MASK	(SECCOMP_FILTER_FLAG_TSYNC	| \
+					 SECCOMP_FILTER_FLAG_SPEC_ALLOW)
 
 #ifdef CONFIG_SECCOMP
 
diff --git a/include/uapi/linux/seccomp.h b/include/uapi/linux/seccomp.h
index 0f238a43ff1e7..e4acb615792bd 100644
--- a/include/uapi/linux/seccomp.h
+++ b/include/uapi/linux/seccomp.h
@@ -15,7 +15,9 @@
 #define SECCOMP_SET_MODE_FILTER	1
 
 /* Valid flags for SECCOMP_SET_MODE_FILTER */
-#define SECCOMP_FILTER_FLAG_TSYNC	1
+#define SECCOMP_FILTER_FLAG_TSYNC	(1UL << 0)
+/* In v4.14+ SECCOMP_FILTER_FLAG_LOG is (1UL << 1) */
+#define SECCOMP_FILTER_FLAG_SPEC_ALLOW	(1UL << 2)
 
 /*
  * All BPF programs must return a 32-bit value.
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index f33539f31bc02..4bb8a5a5d68a6 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -230,7 +230,8 @@ static inline void spec_mitigate(struct task_struct *task,
 }
 
 static inline void seccomp_assign_mode(struct task_struct *task,
-				       unsigned long seccomp_mode)
+				       unsigned long seccomp_mode,
+				       unsigned long flags)
 {
 	assert_spin_locked(&task->sighand->siglock);
 
@@ -240,8 +241,9 @@ static inline void seccomp_assign_mode(struct task_struct *task,
 	 * filter) is set.
 	 */
 	smp_mb__before_atomic();
-	/* Assume seccomp processes want speculation flaw mitigation. */
-	spec_mitigate(task, PR_SPEC_STORE_BYPASS);
+	/* Assume default seccomp processes want spec flaw mitigation. */
+	if ((flags & SECCOMP_FILTER_FLAG_SPEC_ALLOW) == 0)
+		spec_mitigate(task, PR_SPEC_STORE_BYPASS);
 	set_tsk_thread_flag(task, TIF_SECCOMP);
 }
 
@@ -309,7 +311,7 @@ static inline pid_t seccomp_can_sync_threads(void)
  * without dropping the locks.
  *
  */
-static inline void seccomp_sync_threads(void)
+static inline void seccomp_sync_threads(unsigned long flags)
 {
 	struct task_struct *thread, *caller;
 
@@ -350,7 +352,8 @@ static inline void seccomp_sync_threads(void)
 		 * allow one thread to transition the other.
 		 */
 		if (thread->seccomp.mode == SECCOMP_MODE_DISABLED)
-			seccomp_assign_mode(thread, SECCOMP_MODE_FILTER);
+			seccomp_assign_mode(thread, SECCOMP_MODE_FILTER,
+					    flags);
 	}
 }
 
@@ -469,7 +472,7 @@ static long seccomp_attach_filter(unsigned int flags,
 
 	/* Now that the new filter is in place, synchronize to all threads. */
 	if (flags & SECCOMP_FILTER_FLAG_TSYNC)
-		seccomp_sync_threads();
+		seccomp_sync_threads(flags);
 
 	return 0;
 }
@@ -764,7 +767,7 @@ static long seccomp_set_mode_strict(void)
 #ifdef TIF_NOTSC
 	disable_TSC();
 #endif
-	seccomp_assign_mode(current, seccomp_mode);
+	seccomp_assign_mode(current, seccomp_mode, 0);
 	ret = 0;
 
 out:
@@ -822,7 +825,7 @@ static long seccomp_set_mode_filter(unsigned int flags,
 	/* Do not free the successfully attached filter. */
 	prepared = NULL;
 
-	seccomp_assign_mode(current, seccomp_mode);
+	seccomp_assign_mode(current, seccomp_mode, flags);
 out:
 	spin_unlock_irq(&current->sighand->siglock);
 	if (flags & SECCOMP_FILTER_FLAG_TSYNC)
diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c b/tools/testing/selftests/seccomp/seccomp_bpf.c
index 29487e0437ad8..b3f345433ec72 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -1477,7 +1477,11 @@ TEST_F(TRACE_syscall, syscall_dropped)
 #endif
 
 #ifndef SECCOMP_FILTER_FLAG_TSYNC
-#define SECCOMP_FILTER_FLAG_TSYNC 1
+#define SECCOMP_FILTER_FLAG_TSYNC (1UL << 0)
+#endif
+
+#ifndef SECCOMP_FILTER_FLAG_SPEC_ALLOW
+#define SECCOMP_FILTER_FLAG_SPEC_ALLOW (1UL << 2)
 #endif
 
 #ifndef seccomp
@@ -1576,6 +1580,78 @@ TEST(seccomp_syscall_mode_lock)
 	}
 }
 
+/*
+ * Test detection of known and unknown filter flags. Userspace needs to be able
+ * to check if a filter flag is supported by the current kernel and a good way
+ * of doing that is by attempting to enter filter mode, with the flag bit in
+ * question set, and a NULL pointer for the _args_ parameter. EFAULT indicates
+ * that the flag is valid and EINVAL indicates that the flag is invalid.
+ */
+TEST(detect_seccomp_filter_flags)
+{
+	unsigned int flags[] = { SECCOMP_FILTER_FLAG_TSYNC,
+				 SECCOMP_FILTER_FLAG_SPEC_ALLOW };
+	unsigned int flag, all_flags;
+	int i;
+	long ret;
+
+	/* Test detection of known-good filter flags */
+	for (i = 0, all_flags = 0; i < ARRAY_SIZE(flags); i++) {
+		int bits = 0;
+
+		flag = flags[i];
+		/* Make sure the flag is a single bit! */
+		while (flag) {
+			if (flag & 0x1)
+				bits ++;
+			flag >>= 1;
+		}
+		ASSERT_EQ(1, bits);
+		flag = flags[i];
+
+		ret = seccomp(SECCOMP_SET_MODE_FILTER, flag, NULL);
+		ASSERT_NE(ENOSYS, errno) {
+			TH_LOG("Kernel does not support seccomp syscall!");
+		}
+		EXPECT_EQ(-1, ret);
+		EXPECT_EQ(EFAULT, errno) {
+			TH_LOG("Failed to detect that a known-good filter flag (0x%X) is supported!",
+			       flag);
+		}
+
+		all_flags |= flag;
+	}
+
+	/* Test detection of all known-good filter flags */
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, all_flags, NULL);
+	EXPECT_EQ(-1, ret);
+	EXPECT_EQ(EFAULT, errno) {
+		TH_LOG("Failed to detect that all known-good filter flags (0x%X) are supported!",
+		       all_flags);
+	}
+
+	/* Test detection of an unknown filter flag */
+	flag = -1;
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, flag, NULL);
+	EXPECT_EQ(-1, ret);
+	EXPECT_EQ(EINVAL, errno) {
+		TH_LOG("Failed to detect that an unknown filter flag (0x%X) is unsupported!",
+		       flag);
+	}
+
+	/*
+	 * Test detection of an unknown filter flag that may simply need to be
+	 * added to this test
+	 */
+	flag = flags[ARRAY_SIZE(flags) - 1] << 1;
+	ret = seccomp(SECCOMP_SET_MODE_FILTER, flag, NULL);
+	EXPECT_EQ(-1, ret);
+	EXPECT_EQ(EINVAL, errno) {
+		TH_LOG("Failed to detect that an unknown filter flag (0x%X) is unsupported! Does a new flag need to be added to this test?",
+		       flag);
+	}
+}
+
 TEST(TSYNC_first)
 {
 	struct sock_filter filter[] = {

From e0430da2d9f76a7738cd278cf04990876dd0d942 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:37:05 -0700
Subject: [PATCH 1338/1852] seccomp: Move speculation migitation control to
 arch code

commit 8bf37d8c067bb7eb8e7c381bdadf9bd89182b6bc upstream

The migitation control is simpler to implement in architecture code as it
avoids the extra function call to check the mode. Aside of that having an
explicit seccomp enabled mode in the architecture mitigations would require
even more workarounds.

Move it into architecture code and provide a weak function in the seccomp
code. Remove the 'which' argument as this allows the architecture to decide
which mitigations are relevant for seccomp.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 29 ++++++++++++++++++-----------
 include/linux/nospec.h     |  2 ++
 kernel/seccomp.c           | 15 ++-------------
 3 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d6897caa8f47e..b005ef721dc7f 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -567,6 +567,24 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 	return 0;
 }
 
+int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
+			     unsigned long ctrl)
+{
+	switch (which) {
+	case PR_SPEC_STORE_BYPASS:
+		return ssb_prctl_set(task, ctrl);
+	default:
+		return -ENODEV;
+	}
+}
+
+#ifdef CONFIG_SECCOMP
+void arch_seccomp_spec_mitigate(struct task_struct *task)
+{
+	ssb_prctl_set(task, PR_SPEC_FORCE_DISABLE);
+}
+#endif
+
 static int ssb_prctl_get(struct task_struct *task)
 {
 	switch (ssb_mode) {
@@ -585,17 +603,6 @@ static int ssb_prctl_get(struct task_struct *task)
 	}
 }
 
-int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
-			     unsigned long ctrl)
-{
-	switch (which) {
-	case PR_SPEC_STORE_BYPASS:
-		return ssb_prctl_set(task, ctrl);
-	default:
-		return -ENODEV;
-	}
-}
-
 int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
 {
 	switch (which) {
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index a908c954484da..0c5ef54fd4162 100644
--- a/include/linux/nospec.h
+++ b/include/linux/nospec.h
@@ -62,5 +62,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
 int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which);
 int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
 			     unsigned long ctrl);
+/* Speculation control for seccomp enforced mitigation */
+void arch_seccomp_spec_mitigate(struct task_struct *task);
 
 #endif /* _LINUX_NOSPEC_H */
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 4bb8a5a5d68a6..9a9203b15cdea 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -216,18 +216,7 @@ static inline bool seccomp_may_assign_mode(unsigned long seccomp_mode)
 	return true;
 }
 
-/*
- * If a given speculation mitigation is opt-in (prctl()-controlled),
- * select it, by disabling speculation (enabling mitigation).
- */
-static inline void spec_mitigate(struct task_struct *task,
-				 unsigned long which)
-{
-	int state = arch_prctl_spec_ctrl_get(task, which);
-
-	if (state > 0 && (state & PR_SPEC_PRCTL))
-		arch_prctl_spec_ctrl_set(task, which, PR_SPEC_FORCE_DISABLE);
-}
+void __weak arch_seccomp_spec_mitigate(struct task_struct *task) { }
 
 static inline void seccomp_assign_mode(struct task_struct *task,
 				       unsigned long seccomp_mode,
@@ -243,7 +232,7 @@ static inline void seccomp_assign_mode(struct task_struct *task,
 	smp_mb__before_atomic();
 	/* Assume default seccomp processes want spec flaw mitigation. */
 	if ((flags & SECCOMP_FILTER_FLAG_SPEC_ALLOW) == 0)
-		spec_mitigate(task, PR_SPEC_STORE_BYPASS);
+		arch_seccomp_spec_mitigate(task);
 	set_tsk_thread_flag(task, TIF_SECCOMP);
 }
 

From e84d9f955ac4d0c3b597baa241a149532114a2f5 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Sat, 14 Jul 2018 02:37:13 -0700
Subject: [PATCH 1339/1852] x86/speculation: Make "seccomp" the default mode
 for Speculative Store Bypass

commit f21b53b20c754021935ea43364dbf53778eeba32 upstream

Unless explicitly opted out of, anything running under seccomp will have
SSB mitigations enabled. Choosing the "prctl" mode will disable this.

[ tglx: Adjusted it to the new arch_seccomp_spec_mitigate() mechanism ]

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/kernel-parameters.txt  | 26 ++++++++++++++--------
 arch/x86/include/asm/nospec-branch.h |  1 +
 arch/x86/kernel/cpu/bugs.c           | 32 ++++++++++++++++++++--------
 3 files changed, 41 insertions(+), 18 deletions(-)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 3d1249c93d9b1..f93b9c5d1ac02 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3717,19 +3717,27 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			This parameter controls whether the Speculative Store
 			Bypass optimization is used.
 
-			on     - Unconditionally disable Speculative Store Bypass
-			off    - Unconditionally enable Speculative Store Bypass
-			auto   - Kernel detects whether the CPU model contains an
-				 implementation of Speculative Store Bypass and
-				 picks the most appropriate mitigation.
-			prctl  - Control Speculative Store Bypass per thread
-				 via prctl. Speculative Store Bypass is enabled
-				 for a process by default. The state of the control
-				 is inherited on fork.
+			on      - Unconditionally disable Speculative Store Bypass
+			off     - Unconditionally enable Speculative Store Bypass
+			auto    - Kernel detects whether the CPU model contains an
+				  implementation of Speculative Store Bypass and
+				  picks the most appropriate mitigation. If the
+				  CPU is not vulnerable, "off" is selected. If the
+				  CPU is vulnerable the default mitigation is
+				  architecture and Kconfig dependent. See below.
+			prctl   - Control Speculative Store Bypass per thread
+				  via prctl. Speculative Store Bypass is enabled
+				  for a process by default. The state of the control
+				  is inherited on fork.
+			seccomp - Same as "prctl" above, but all seccomp threads
+				  will disable SSB unless they explicitly opt out.
 
 			Not specifying this option is equivalent to
 			spec_store_bypass_disable=auto.
 
+			Default mitigations:
+			X86:	If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"
+
 	spia_io_base=	[HW,MTD]
 	spia_fio_base=
 	spia_pedr=
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 155d955ab8010..930c159411579 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -188,6 +188,7 @@ enum ssb_mitigation {
 	SPEC_STORE_BYPASS_NONE,
 	SPEC_STORE_BYPASS_DISABLE,
 	SPEC_STORE_BYPASS_PRCTL,
+	SPEC_STORE_BYPASS_SECCOMP,
 };
 
 extern char __indirect_thunk_start[];
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index b005ef721dc7f..6fd3fcf680bf0 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -414,22 +414,25 @@ enum ssb_mitigation_cmd {
 	SPEC_STORE_BYPASS_CMD_AUTO,
 	SPEC_STORE_BYPASS_CMD_ON,
 	SPEC_STORE_BYPASS_CMD_PRCTL,
+	SPEC_STORE_BYPASS_CMD_SECCOMP,
 };
 
 static const char *ssb_strings[] = {
 	[SPEC_STORE_BYPASS_NONE]	= "Vulnerable",
 	[SPEC_STORE_BYPASS_DISABLE]	= "Mitigation: Speculative Store Bypass disabled",
-	[SPEC_STORE_BYPASS_PRCTL]	= "Mitigation: Speculative Store Bypass disabled via prctl"
+	[SPEC_STORE_BYPASS_PRCTL]	= "Mitigation: Speculative Store Bypass disabled via prctl",
+	[SPEC_STORE_BYPASS_SECCOMP]	= "Mitigation: Speculative Store Bypass disabled via prctl and seccomp",
 };
 
 static const struct {
 	const char *option;
 	enum ssb_mitigation_cmd cmd;
 } ssb_mitigation_options[] = {
-	{ "auto",	SPEC_STORE_BYPASS_CMD_AUTO },  /* Platform decides */
-	{ "on",		SPEC_STORE_BYPASS_CMD_ON },    /* Disable Speculative Store Bypass */
-	{ "off",	SPEC_STORE_BYPASS_CMD_NONE },  /* Don't touch Speculative Store Bypass */
-	{ "prctl",	SPEC_STORE_BYPASS_CMD_PRCTL }, /* Disable Speculative Store Bypass via prctl */
+	{ "auto",	SPEC_STORE_BYPASS_CMD_AUTO },    /* Platform decides */
+	{ "on",		SPEC_STORE_BYPASS_CMD_ON },      /* Disable Speculative Store Bypass */
+	{ "off",	SPEC_STORE_BYPASS_CMD_NONE },    /* Don't touch Speculative Store Bypass */
+	{ "prctl",	SPEC_STORE_BYPASS_CMD_PRCTL },   /* Disable Speculative Store Bypass via prctl */
+	{ "seccomp",	SPEC_STORE_BYPASS_CMD_SECCOMP }, /* Disable Speculative Store Bypass via prctl and seccomp */
 };
 
 static enum ssb_mitigation_cmd __init ssb_parse_cmdline(void)
@@ -479,8 +482,15 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 
 	switch (cmd) {
 	case SPEC_STORE_BYPASS_CMD_AUTO:
-		/* Choose prctl as the default mode */
-		mode = SPEC_STORE_BYPASS_PRCTL;
+	case SPEC_STORE_BYPASS_CMD_SECCOMP:
+		/*
+		 * Choose prctl+seccomp as the default mode if seccomp is
+		 * enabled.
+		 */
+		if (IS_ENABLED(CONFIG_SECCOMP))
+			mode = SPEC_STORE_BYPASS_SECCOMP;
+		else
+			mode = SPEC_STORE_BYPASS_PRCTL;
 		break;
 	case SPEC_STORE_BYPASS_CMD_ON:
 		mode = SPEC_STORE_BYPASS_DISABLE;
@@ -528,12 +538,14 @@ static void ssb_select_mitigation()
 }
 
 #undef pr_fmt
+#define pr_fmt(fmt)     "Speculation prctl: " fmt
 
 static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 {
 	bool update;
 
-	if (ssb_mode != SPEC_STORE_BYPASS_PRCTL)
+	if (ssb_mode != SPEC_STORE_BYPASS_PRCTL &&
+	    ssb_mode != SPEC_STORE_BYPASS_SECCOMP)
 		return -ENXIO;
 
 	switch (ctrl) {
@@ -581,7 +593,8 @@ int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which,
 #ifdef CONFIG_SECCOMP
 void arch_seccomp_spec_mitigate(struct task_struct *task)
 {
-	ssb_prctl_set(task, PR_SPEC_FORCE_DISABLE);
+	if (ssb_mode == SPEC_STORE_BYPASS_SECCOMP)
+		ssb_prctl_set(task, PR_SPEC_FORCE_DISABLE);
 }
 #endif
 
@@ -590,6 +603,7 @@ static int ssb_prctl_get(struct task_struct *task)
 	switch (ssb_mode) {
 	case SPEC_STORE_BYPASS_DISABLE:
 		return PR_SPEC_DISABLE;
+	case SPEC_STORE_BYPASS_SECCOMP:
 	case SPEC_STORE_BYPASS_PRCTL:
 		if (task_spec_ssb_force_disable(task))
 			return PR_SPEC_PRCTL | PR_SPEC_FORCE_DISABLE;

From 2698e9e557d240a2fc2d11ab9453c3175dfe4b8f Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:37:21 -0700
Subject: [PATCH 1340/1852] x86/bugs: Rename _RDS to _SSBD

commit 9f65fb29374ee37856dbad847b4e121aab72b510 upstream

Intel collateral will reference the SSB mitigation bit in IA32_SPEC_CTL[2]
as SSBD (Speculative Store Bypass Disable).

Hence changing it.

It is unclear yet what the MSR_IA32_ARCH_CAPABILITIES (0x10a) Bit(4) name
is going to be. Following the rename it would be SSBD_NO but that rolls out
to Speculative Store Bypass Disable No.

Also fixed the missing space in X86_FEATURE_AMD_SSBD.

[ tglx: Fixup x86_amd_rds_enable() and rds_tif_to_amd_ls_cfg() as well ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, skipping the KVM changes in this patch. ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h |  4 ++--
 arch/x86/include/asm/msr-index.h   | 10 ++++-----
 arch/x86/include/asm/spec-ctrl.h   | 12 +++++-----
 arch/x86/include/asm/thread_info.h |  6 ++---
 arch/x86/kernel/cpu/amd.c          | 14 ++++++------
 arch/x86/kernel/cpu/bugs.c         | 36 +++++++++++++++---------------
 arch/x86/kernel/cpu/common.c       |  2 +-
 arch/x86/kernel/cpu/intel.c        |  2 +-
 arch/x86/kernel/process.c          |  8 +++----
 9 files changed, 47 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index b7cdd1c051326..97926be21a7ff 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -204,7 +204,7 @@
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 #define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
 #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE	( 7*32+23) /* "" Disable Speculative Store Bypass. */
-#define X86_FEATURE_AMD_RDS	(7*32+24)  /* "" AMD RDS implementation */
+#define X86_FEATURE_AMD_SSBD	(7*32+24)  /* "" AMD SSBD implementation */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
@@ -299,7 +299,7 @@
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
-#define X86_FEATURE_RDS			(18*32+31) /* Reduced Data Speculation */
+#define X86_FEATURE_SSBD		(18*32+31) /* Speculative Store Bypass Disable */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 883cf0d6b1f9e..2ea2ff1a81e82 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -35,8 +35,8 @@
 #define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */
 #define SPEC_CTRL_IBRS			(1 << 0)   /* Indirect Branch Restricted Speculation */
 #define SPEC_CTRL_STIBP			(1 << 1)   /* Single Thread Indirect Branch Predictors */
-#define SPEC_CTRL_RDS_SHIFT		2	   /* Reduced Data Speculation bit */
-#define SPEC_CTRL_RDS			(1 << SPEC_CTRL_RDS_SHIFT)   /* Reduced Data Speculation */
+#define SPEC_CTRL_SSBD_SHIFT		2	   /* Speculative Store Bypass Disable bit */
+#define SPEC_CTRL_SSBD			(1 << SPEC_CTRL_SSBD_SHIFT)   /* Speculative Store Bypass Disable */
 
 #define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
 #define PRED_CMD_IBPB			(1 << 0)   /* Indirect Branch Prediction Barrier */
@@ -58,10 +58,10 @@
 #define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
 #define ARCH_CAP_RDCL_NO		(1 << 0)   /* Not susceptible to Meltdown */
 #define ARCH_CAP_IBRS_ALL		(1 << 1)   /* Enhanced IBRS support */
-#define ARCH_CAP_RDS_NO			(1 << 4)   /*
+#define ARCH_CAP_SSBD_NO		(1 << 4)   /*
 						    * Not susceptible to Speculative Store Bypass
-						    * attack, so no Reduced Data Speculation control
-						    * required.
+						    * attack, so no Speculative Store Bypass
+						    * control required.
 						    */
 
 #define MSR_IA32_BBL_CR_CTL		0x00000119
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 45ef00ad51050..dc21209790bfb 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -17,20 +17,20 @@ extern void x86_spec_ctrl_restore_host(u64);
 
 /* AMD specific Speculative Store Bypass MSR data */
 extern u64 x86_amd_ls_cfg_base;
-extern u64 x86_amd_ls_cfg_rds_mask;
+extern u64 x86_amd_ls_cfg_ssbd_mask;
 
 /* The Intel SPEC CTRL MSR base value cache */
 extern u64 x86_spec_ctrl_base;
 
-static inline u64 rds_tif_to_spec_ctrl(u64 tifn)
+static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
 {
-	BUILD_BUG_ON(TIF_RDS < SPEC_CTRL_RDS_SHIFT);
-	return (tifn & _TIF_RDS) >> (TIF_RDS - SPEC_CTRL_RDS_SHIFT);
+	BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
+	return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
 }
 
-static inline u64 rds_tif_to_amd_ls_cfg(u64 tifn)
+static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
 {
-	return (tifn & _TIF_RDS) ? x86_amd_ls_cfg_rds_mask : 0ULL;
+	return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
 }
 
 extern void speculative_store_bypass_update(void);
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 6971a72cb0f38..128a7105cbe2c 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -92,7 +92,7 @@ struct thread_info {
 #define TIF_SIGPENDING		2	/* signal pending */
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_SINGLESTEP		4	/* reenable singlestep on user return*/
-#define TIF_RDS			5	/* Reduced data speculation */
+#define TIF_SSBD		5	/* Reduced data speculation */
 #define TIF_SYSCALL_EMU		6	/* syscall emulation active */
 #define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */
 #define TIF_SECCOMP		8	/* secure computing */
@@ -117,7 +117,7 @@ struct thread_info {
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
-#define _TIF_RDS		(1 << TIF_RDS)
+#define _TIF_SSBD		(1 << TIF_SSBD)
 #define _TIF_SYSCALL_EMU	(1 << TIF_SYSCALL_EMU)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
@@ -149,7 +149,7 @@ struct thread_info {
 
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW							\
-	(_TIF_IO_BITMAP|_TIF_NOTSC|_TIF_BLOCKSTEP|_TIF_RDS)
+	(_TIF_IO_BITMAP|_TIF_NOTSC|_TIF_BLOCKSTEP|_TIF_SSBD)
 
 #define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY)
 #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 14e984916f2fb..bd0edb2a21fc5 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -532,12 +532,12 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
 		}
 		/*
 		 * Try to cache the base value so further operations can
-		 * avoid RMW. If that faults, do not enable RDS.
+		 * avoid RMW. If that faults, do not enable SSBD.
 		 */
 		if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) {
-			setup_force_cpu_cap(X86_FEATURE_RDS);
-			setup_force_cpu_cap(X86_FEATURE_AMD_RDS);
-			x86_amd_ls_cfg_rds_mask = 1ULL << bit;
+			setup_force_cpu_cap(X86_FEATURE_SSBD);
+			setup_force_cpu_cap(X86_FEATURE_AMD_SSBD);
+			x86_amd_ls_cfg_ssbd_mask = 1ULL << bit;
 		}
 	}
 }
@@ -816,9 +816,9 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has(c, X86_FEATURE_XENPV))
 		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
 
-	if (boot_cpu_has(X86_FEATURE_AMD_RDS)) {
-		set_cpu_cap(c, X86_FEATURE_RDS);
-		set_cpu_cap(c, X86_FEATURE_AMD_RDS);
+	if (boot_cpu_has(X86_FEATURE_AMD_SSBD)) {
+		set_cpu_cap(c, X86_FEATURE_SSBD);
+		set_cpu_cap(c, X86_FEATURE_AMD_SSBD);
 	}
 }
 
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 6fd3fcf680bf0..812e92a492169 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -44,10 +44,10 @@ static u64 x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS;
 
 /*
  * AMD specific MSR info for Speculative Store Bypass control.
- * x86_amd_ls_cfg_rds_mask is initialized in identify_boot_cpu().
+ * x86_amd_ls_cfg_ssbd_mask is initialized in identify_boot_cpu().
  */
 u64 x86_amd_ls_cfg_base;
-u64 x86_amd_ls_cfg_rds_mask;
+u64 x86_amd_ls_cfg_ssbd_mask;
 
 void __init check_bugs(void)
 {
@@ -144,7 +144,7 @@ u64 x86_spec_ctrl_get_default(void)
 	u64 msrval = x86_spec_ctrl_base;
 
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
-		msrval |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+		msrval |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 	return msrval;
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
@@ -157,7 +157,7 @@ void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
 		return;
 
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
-		host |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
 		wrmsrl(MSR_IA32_SPEC_CTRL, guest_spec_ctrl);
@@ -172,18 +172,18 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
 		return;
 
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
-		host |= rds_tif_to_spec_ctrl(current_thread_info()->flags);
+		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
 		wrmsrl(MSR_IA32_SPEC_CTRL, host);
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_restore_host);
 
-static void x86_amd_rds_enable(void)
+static void x86_amd_ssb_disable(void)
 {
-	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_rds_mask;
+	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_ssbd_mask;
 
-	if (boot_cpu_has(X86_FEATURE_AMD_RDS))
+	if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
 		wrmsrl(MSR_AMD64_LS_CFG, msrval);
 }
 
@@ -471,7 +471,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 	enum ssb_mitigation mode = SPEC_STORE_BYPASS_NONE;
 	enum ssb_mitigation_cmd cmd;
 
-	if (!boot_cpu_has(X86_FEATURE_RDS))
+	if (!boot_cpu_has(X86_FEATURE_SSBD))
 		return mode;
 
 	cmd = ssb_parse_cmdline();
@@ -505,7 +505,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 	/*
 	 * We have three CPU feature flags that are in play here:
 	 *  - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
-	 *  - X86_FEATURE_RDS - CPU is able to turn off speculative store bypass
+	 *  - X86_FEATURE_SSBD - CPU is able to turn off speculative store bypass
 	 *  - X86_FEATURE_SPEC_STORE_BYPASS_DISABLE - engage the mitigation
 	 */
 	if (mode == SPEC_STORE_BYPASS_DISABLE) {
@@ -516,12 +516,12 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
 		 */
 		switch (boot_cpu_data.x86_vendor) {
 		case X86_VENDOR_INTEL:
-			x86_spec_ctrl_base |= SPEC_CTRL_RDS;
-			x86_spec_ctrl_mask &= ~SPEC_CTRL_RDS;
-			x86_spec_ctrl_set(SPEC_CTRL_RDS);
+			x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
+			x86_spec_ctrl_mask &= ~SPEC_CTRL_SSBD;
+			x86_spec_ctrl_set(SPEC_CTRL_SSBD);
 			break;
 		case X86_VENDOR_AMD:
-			x86_amd_rds_enable();
+			x86_amd_ssb_disable();
 			break;
 		}
 	}
@@ -554,16 +554,16 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 		if (task_spec_ssb_force_disable(task))
 			return -EPERM;
 		task_clear_spec_ssb_disable(task);
-		update = test_and_clear_tsk_thread_flag(task, TIF_RDS);
+		update = test_and_clear_tsk_thread_flag(task, TIF_SSBD);
 		break;
 	case PR_SPEC_DISABLE:
 		task_set_spec_ssb_disable(task);
-		update = !test_and_set_tsk_thread_flag(task, TIF_RDS);
+		update = !test_and_set_tsk_thread_flag(task, TIF_SSBD);
 		break;
 	case PR_SPEC_FORCE_DISABLE:
 		task_set_spec_ssb_disable(task);
 		task_set_spec_ssb_force_disable(task);
-		update = !test_and_set_tsk_thread_flag(task, TIF_RDS);
+		update = !test_and_set_tsk_thread_flag(task, TIF_SSBD);
 		break;
 	default:
 		return -ERANGE;
@@ -633,7 +633,7 @@ void x86_spec_ctrl_setup_ap(void)
 		x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask);
 
 	if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
-		x86_amd_rds_enable();
+		x86_amd_ssb_disable();
 }
 
 #ifdef CONFIG_SYSFS
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7405c8653f7ae..6f3a5d74acc86 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -867,7 +867,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
 	if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
-	   !(ia32_cap & ARCH_CAP_RDS_NO))
+	   !(ia32_cap & ARCH_CAP_SSBD_NO))
 		setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
 	if (x86_match_cpu(cpu_no_speculation))
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index ac25d1e5e8e8f..a34e35731be47 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -119,7 +119,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		setup_clear_cpu_cap(X86_FEATURE_STIBP);
 		setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL);
 		setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP);
-		setup_clear_cpu_cap(X86_FEATURE_RDS);
+		setup_clear_cpu_cap(X86_FEATURE_SSBD);
 	}
 
 	/*
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b68c269de8ff1..d716928882e9b 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -189,11 +189,11 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn
 {
 	u64 msr;
 
-	if (static_cpu_has(X86_FEATURE_AMD_RDS)) {
-		msr = x86_amd_ls_cfg_base | rds_tif_to_amd_ls_cfg(tifn);
+	if (static_cpu_has(X86_FEATURE_AMD_SSBD)) {
+		msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);
 		wrmsrl(MSR_AMD64_LS_CFG, msr);
 	} else {
-		msr = x86_spec_ctrl_base | rds_tif_to_spec_ctrl(tifn);
+		msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
 		wrmsrl(MSR_IA32_SPEC_CTRL, msr);
 	}
 }
@@ -232,7 +232,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 	if ((tifp ^ tifn) & _TIF_NOTSC)
 		cr4_toggle_bits(X86_CR4_TSD);
 
-	if ((tifp ^ tifn) & _TIF_RDS)
+	if ((tifp ^ tifn) & _TIF_SSBD)
 		__speculative_store_bypass_update(tifn);
 }
 

From 1a6ea17e7601a084b69a8f72794665a13ccc0406 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:37:29 -0700
Subject: [PATCH 1341/1852] proc: Use underscores for SSBD in 'status'

commit e96f46ee8587607a828f783daa6eb5b44d25004d upstream

The style for the 'status' file is CamelCase or this. _.

Fixes: fae1fa0fc ("proc: Provide details on speculation flaw mitigations")
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/proc/array.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/proc/array.c b/fs/proc/array.c
index 31414787c971e..cb71cbae606de 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -333,7 +333,7 @@ static inline void task_seccomp(struct seq_file *m, struct task_struct *p)
 #ifdef CONFIG_SECCOMP
 	seq_printf(m, "Seccomp:\t%d\n", p->seccomp.mode);
 #endif
-	seq_printf(m, "\nSpeculation Store Bypass:\t");
+	seq_printf(m, "\nSpeculation_Store_Bypass:\t");
 	switch (arch_prctl_spec_ctrl_get(p, PR_SPEC_STORE_BYPASS)) {
 	case -EINVAL:
 		seq_printf(m, "unknown");

From b2ca9c0af60f57749542f9b0d572e9e4861f9f75 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:37:37 -0700
Subject: [PATCH 1342/1852] Documentation/spec_ctrl: Do some minor cleanups

commit dd0792699c4058e63c0715d9a7c2d40226fcdddc upstream

Fix some typos, improve formulations, end sentences with a fullstop.

Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/spec_ctrl.txt | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/Documentation/spec_ctrl.txt b/Documentation/spec_ctrl.txt
index 1b3690d309438..32f3d55c54b75 100644
--- a/Documentation/spec_ctrl.txt
+++ b/Documentation/spec_ctrl.txt
@@ -2,13 +2,13 @@
 Speculation Control
 ===================
 
-Quite some CPUs have speculation related misfeatures which are in fact
-vulnerabilites causing data leaks in various forms even accross privilege
-domains.
+Quite some CPUs have speculation-related misfeatures which are in
+fact vulnerabilities causing data leaks in various forms even across
+privilege domains.
 
 The kernel provides mitigation for such vulnerabilities in various
-forms. Some of these mitigations are compile time configurable and some on
-the kernel command line.
+forms. Some of these mitigations are compile-time configurable and some
+can be supplied on the kernel command line.
 
 There is also a class of mitigations which are very expensive, but they can
 be restricted to a certain set of processes or tasks in controlled
@@ -32,18 +32,18 @@ the following meaning:
 Bit  Define                Description
 ==== ===================== ===================================================
 0    PR_SPEC_PRCTL         Mitigation can be controlled per task by
-                           PR_SET_SPECULATION_CTRL
+                           PR_SET_SPECULATION_CTRL.
 1    PR_SPEC_ENABLE        The speculation feature is enabled, mitigation is
-                           disabled
+                           disabled.
 2    PR_SPEC_DISABLE       The speculation feature is disabled, mitigation is
-                           enabled
+                           enabled.
 3    PR_SPEC_FORCE_DISABLE Same as PR_SPEC_DISABLE, but cannot be undone. A
                            subsequent prctl(..., PR_SPEC_ENABLE) will fail.
 ==== ===================== ===================================================
 
 If all bits are 0 the CPU is not affected by the speculation misfeature.
 
-If PR_SPEC_PRCTL is set, then the per task control of the mitigation is
+If PR_SPEC_PRCTL is set, then the per-task control of the mitigation is
 available. If not set, prctl(PR_SET_SPECULATION_CTRL) for the speculation
 misfeature will fail.
 
@@ -61,9 +61,9 @@ Common error codes
 Value   Meaning
 ======= =================================================================
 EINVAL  The prctl is not implemented by the architecture or unused
-        prctl(2) arguments are not 0
+        prctl(2) arguments are not 0.
 
-ENODEV  arg2 is selecting a not supported speculation misfeature
+ENODEV  arg2 is selecting a not supported speculation misfeature.
 ======= =================================================================
 
 PR_SET_SPECULATION_CTRL error codes
@@ -74,7 +74,7 @@ Value   Meaning
 0       Success
 
 ERANGE  arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor
-        PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE
+        PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE.
 
 ENXIO   Control of the selected speculation misfeature is not possible.
         See PR_GET_SPECULATION_CTRL.

From 612f6608549ca71356b7f13d99f1e74f642cea41 Mon Sep 17 00:00:00 2001
From: Jiri Kosina <jkosina@suse.cz>
Date: Sat, 14 Jul 2018 02:37:45 -0700
Subject: [PATCH 1343/1852] x86/bugs: Fix __ssb_select_mitigation() return type

commit d66d8ff3d21667b41eddbe86b35ab411e40d8c5f upstream

__ssb_select_mitigation() returns one of the members of enum ssb_mitigation,
not ssb_mitigation_cmd; fix the prototype to reflect that.

Fixes: 24f7fc83b9204 ("x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation")
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 812e92a492169..5b58b76254a23 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -466,7 +466,7 @@ static enum ssb_mitigation_cmd __init ssb_parse_cmdline(void)
 	return cmd;
 }
 
-static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void)
+static enum ssb_mitigation __init __ssb_select_mitigation(void)
 {
 	enum ssb_mitigation mode = SPEC_STORE_BYPASS_NONE;
 	enum ssb_mitigation_cmd cmd;

From ac195de26fc5fadd5f155ce10bbc70c9b13732ee Mon Sep 17 00:00:00 2001
From: Jiri Kosina <jkosina@suse.cz>
Date: Sat, 14 Jul 2018 02:37:53 -0700
Subject: [PATCH 1344/1852] x86/bugs: Make cpu_show_common() static

commit 7bb4d366cba992904bffa4820d24e70a3de93e76 upstream

cpu_show_common() is not used outside of arch/x86/kernel/cpu/bugs.c, so
make it static.

Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 5b58b76254a23..512be68523957 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -638,7 +638,7 @@ void x86_spec_ctrl_setup_ap(void)
 
 #ifdef CONFIG_SYSFS
 
-ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
+static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
 			char *buf, unsigned int bug)
 {
 	if (!boot_cpu_has_bug(bug))

From c424b03db0f5dd0cf7b17f1b45686a16d78f6b0a Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:38:01 -0700
Subject: [PATCH 1345/1852] x86/bugs: Fix the parameters alignment and missing
 void

commit ffed645e3be0e32f8e9ab068d257aee8d0fe8eec upstream

Fixes: 7bb4d366c ("x86/bugs: Make cpu_show_common() static")
Fixes: 24f7fc83b ("x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation")
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 512be68523957..84de0fc30ea9a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -529,7 +529,7 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
 	return mode;
 }
 
-static void ssb_select_mitigation()
+static void ssb_select_mitigation(void)
 {
 	ssb_mode = __ssb_select_mitigation();
 
@@ -639,7 +639,7 @@ void x86_spec_ctrl_setup_ap(void)
 #ifdef CONFIG_SYSFS
 
 static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
-			char *buf, unsigned int bug)
+			       char *buf, unsigned int bug)
 {
 	if (!boot_cpu_has_bug(bug))
 		return sprintf(buf, "Not affected\n");

From a361d48f7b98db619ea59900eae632ad3bec72ea Mon Sep 17 00:00:00 2001
From: Jim Mattson <jmattson@google.com>
Date: Sat, 14 Jul 2018 02:38:08 -0700
Subject: [PATCH 1346/1852] x86/cpu: Make alternative_msr_write work for 32-bit
 code

commit 5f2b745f5e1304f438f9b2cd03ebc8120b6e0d3b upstream

Cast val and (val >> 32) to (u32), so that they fit in a
general-purpose register in both 32-bit and 64-bit code.

[ tglx: Made it u32 instead of uintptr_t ]

Fixes: c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload")
Signed-off-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 930c159411579..640c11b25913f 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -219,8 +219,8 @@ void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
 {
 	asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
 		: : "c" (msr),
-		    "a" (val),
-		    "d" (val >> 32),
+		    "a" ((u32)val),
+		    "d" ((u32)(val >> 32)),
 		    [feature] "i" (feature)
 		: "memory");
 }

From 8c3048540ca11c4e1718b785706858e45bfbdb03 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:38:17 -0700
Subject: [PATCH 1347/1852] x86/speculation: Use synthetic bits for
 IBRS/IBPB/STIBP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit e7c587da125291db39ddf1f49b18e5970adbac17 upstream

Intel and AMD have different CPUID bits hence for those use synthetic bits
which get set on the respective vendor's in init_speculation_control(). So
that debacles like what the commit message of

  c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload")

talks about don't happen anymore.

Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-by: Jörg Otte <jrg.otte@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Link: https://lkml.kernel.org/r/20180504161815.GG9257@pd.tnic
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, skipping the KVM changes in this patch. ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 12 ++++++++----
 arch/x86/kernel/cpu/common.c       | 14 ++++++++++----
 2 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 97926be21a7ff..9f64d10adeba1 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -204,7 +204,10 @@
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 #define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
 #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE	( 7*32+23) /* "" Disable Speculative Store Bypass. */
-#define X86_FEATURE_AMD_SSBD	(7*32+24)  /* "" AMD SSBD implementation */
+#define X86_FEATURE_AMD_SSBD	( 7*32+24) /* "" AMD SSBD implementation */
+#define X86_FEATURE_IBRS	( 7*32+25) /* Indirect Branch Restricted Speculation */
+#define X86_FEATURE_IBPB	( 7*32+26) /* Indirect Branch Prediction Barrier */
+#define X86_FEATURE_STIBP	( 7*32+27) /* Single Thread Indirect Branch Predictors */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
@@ -256,9 +259,9 @@
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO	(13*32+0) /* CLZERO instruction */
-#define X86_FEATURE_IBPB	(13*32+12) /* Indirect Branch Prediction Barrier */
-#define X86_FEATURE_IBRS	(13*32+14) /* Indirect Branch Restricted Speculation */
-#define X86_FEATURE_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_AMD_IBPB	(13*32+12) /* Indirect Branch Prediction Barrier */
+#define X86_FEATURE_AMD_IBRS	(13*32+14) /* Indirect Branch Restricted Speculation */
+#define X86_FEATURE_AMD_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors */
 
 /* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
 #define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
@@ -293,6 +296,7 @@
 #define X86_FEATURE_SUCCOR	(17*32+1) /* Uncorrectable error containment and recovery */
 #define X86_FEATURE_SMCA	(17*32+3) /* Scalable MCA */
 
+
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
 #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
 #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6f3a5d74acc86..f2b579ff104c1 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -683,17 +683,23 @@ static void init_speculation_control(struct cpuinfo_x86 *c)
 	 * and they also have a different bit for STIBP support. Also,
 	 * a hypervisor might have set the individual AMD bits even on
 	 * Intel CPUs, for finer-grained selection of what's available.
-	 *
-	 * We use the AMD bits in 0x8000_0008 EBX as the generic hardware
-	 * features, which are visible in /proc/cpuinfo and used by the
-	 * kernel. So set those accordingly from the Intel bits.
 	 */
 	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
 		set_cpu_cap(c, X86_FEATURE_IBRS);
 		set_cpu_cap(c, X86_FEATURE_IBPB);
 	}
+
 	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
 		set_cpu_cap(c, X86_FEATURE_STIBP);
+
+	if (cpu_has(c, X86_FEATURE_AMD_IBRS))
+		set_cpu_cap(c, X86_FEATURE_IBRS);
+
+	if (cpu_has(c, X86_FEATURE_AMD_IBPB))
+		set_cpu_cap(c, X86_FEATURE_IBPB);
+
+	if (cpu_has(c, X86_FEATURE_AMD_STIBP))
+		set_cpu_cap(c, X86_FEATURE_STIBP);
 }
 
 void get_cpu_cap(struct cpuinfo_x86 *c)

From 3a2ee4189e08a902c529ef234ad633a9c3b3fade Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:38:25 -0700
Subject: [PATCH 1348/1852] x86/cpufeatures: Disentangle MSR_SPEC_CTRL
 enumeration from IBRS

commit 7eb8956a7fec3c1f0abc2a5517dada99ccc8a961 upstream

The availability of the SPEC_CTRL MSR is enumerated by a CPUID bit on
Intel and implied by IBRS or STIBP support on AMD. That's just confusing
and in case an AMD CPU has IBRS not supported because the underlying
problem has been fixed but has another bit valid in the SPEC_CTRL MSR,
the thing falls apart.

Add a synthetic feature bit X86_FEATURE_MSR_SPEC_CTRL to denote the
availability on both Intel and AMD.

While at it replace the boot_cpu_has() checks with static_cpu_has() where
possible. This prevents late microcode loading from exposing SPEC_CTRL, but
late loading is already very limited as it does not reevaluate the
mitigation options and other bits and pieces. Having static_cpu_has() is
the simplest and least fragile solution.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h |  3 +++
 arch/x86/kernel/cpu/bugs.c         | 18 +++++++++++-------
 arch/x86/kernel/cpu/common.c       |  9 +++++++--
 arch/x86/kernel/cpu/intel.c        |  1 +
 4 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 9f64d10adeba1..dd04cd7395536 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -198,6 +198,9 @@
 
 #define X86_FEATURE_RETPOLINE	( 7*32+29) /* "" Generic Retpoline mitigation for Spectre variant 2 */
 #define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* "" AMD Retpoline mitigation for Spectre variant 2 */
+
+#define X86_FEATURE_MSR_SPEC_CTRL ( 7*32+16) /* "" MSR SPEC_CTRL is implemented */
+
 /* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
 #define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
 
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 84de0fc30ea9a..e23e2899d7834 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -63,7 +63,7 @@ void __init check_bugs(void)
 	 * have unknown values. AMD64_LS_CFG MSR is cached in the early AMD
 	 * init code as it is not enumerated and depends on the family.
 	 */
-	if (boot_cpu_has(X86_FEATURE_IBRS))
+	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
 
 	/* Select the proper spectre mitigation before patching alternatives */
@@ -143,7 +143,7 @@ u64 x86_spec_ctrl_get_default(void)
 {
 	u64 msrval = x86_spec_ctrl_base;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
 		msrval |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 	return msrval;
 }
@@ -153,10 +153,12 @@ void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
 {
 	u64 host = x86_spec_ctrl_base;
 
-	if (!boot_cpu_has(X86_FEATURE_IBRS))
+	/* Is MSR_SPEC_CTRL implemented ? */
+	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		return;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+	/* Intel controls SSB in MSR_SPEC_CTRL */
+	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
 		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
@@ -168,10 +170,12 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
 {
 	u64 host = x86_spec_ctrl_base;
 
-	if (!boot_cpu_has(X86_FEATURE_IBRS))
+	/* Is MSR_SPEC_CTRL implemented ? */
+	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		return;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+	/* Intel controls SSB in MSR_SPEC_CTRL */
+	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
 		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
@@ -629,7 +633,7 @@ int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
 
 void x86_spec_ctrl_setup_ap(void)
 {
-	if (boot_cpu_has(X86_FEATURE_IBRS))
+	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask);
 
 	if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index f2b579ff104c1..1f70ff15eb62e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -687,19 +687,24 @@ static void init_speculation_control(struct cpuinfo_x86 *c)
 	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
 		set_cpu_cap(c, X86_FEATURE_IBRS);
 		set_cpu_cap(c, X86_FEATURE_IBPB);
+		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
 	}
 
 	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
 		set_cpu_cap(c, X86_FEATURE_STIBP);
 
-	if (cpu_has(c, X86_FEATURE_AMD_IBRS))
+	if (cpu_has(c, X86_FEATURE_AMD_IBRS)) {
 		set_cpu_cap(c, X86_FEATURE_IBRS);
+		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
+	}
 
 	if (cpu_has(c, X86_FEATURE_AMD_IBPB))
 		set_cpu_cap(c, X86_FEATURE_IBPB);
 
-	if (cpu_has(c, X86_FEATURE_AMD_STIBP))
+	if (cpu_has(c, X86_FEATURE_AMD_STIBP)) {
 		set_cpu_cap(c, X86_FEATURE_STIBP);
+		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
+	}
 }
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index a34e35731be47..9a84e75cbec5f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -118,6 +118,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		setup_clear_cpu_cap(X86_FEATURE_IBPB);
 		setup_clear_cpu_cap(X86_FEATURE_STIBP);
 		setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL);
+		setup_clear_cpu_cap(X86_FEATURE_MSR_SPEC_CTRL);
 		setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP);
 		setup_clear_cpu_cap(X86_FEATURE_SSBD);
 	}

From f8997fc08e83dc7245a71da689c2584391f476e0 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:38:33 -0700
Subject: [PATCH 1349/1852] x86/cpufeatures: Disentangle SSBD enumeration

commit 52817587e706686fcdb27f14c1b000c92f266c96 upstream

The SSBD enumeration is similarly to the other bits magically shared
between Intel and AMD though the mechanisms are different.

Make X86_FEATURE_SSBD synthetic and set it depending on the vendor specific
features or family dependent setup.

Change the Intel bit to X86_FEATURE_SPEC_CTRL_SSBD to denote that SSBD is
controlled via MSR_SPEC_CTRL and fix up the usage sites.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h |  6 ++++--
 arch/x86/kernel/cpu/amd.c          |  7 +------
 arch/x86/kernel/cpu/bugs.c         | 10 +++++-----
 arch/x86/kernel/cpu/common.c       |  3 +++
 arch/x86/kernel/cpu/intel.c        |  1 +
 arch/x86/kernel/process.c          |  2 +-
 6 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index dd04cd7395536..7dd1bba491727 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -200,6 +200,7 @@
 #define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* "" AMD Retpoline mitigation for Spectre variant 2 */
 
 #define X86_FEATURE_MSR_SPEC_CTRL ( 7*32+16) /* "" MSR SPEC_CTRL is implemented */
+#define X86_FEATURE_SSBD	( 7*32+17) /* Speculative Store Bypass Disable */
 
 /* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
 #define X86_FEATURE_KAISER	( 7*32+31) /* CONFIG_PAGE_TABLE_ISOLATION w/o nokaiser */
@@ -207,7 +208,8 @@
 #define X86_FEATURE_USE_IBPB	( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled*/
 #define X86_FEATURE_USE_IBRS_FW	( 7*32+22) /* "" Use IBRS during runtime firmware calls */
 #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE	( 7*32+23) /* "" Disable Speculative Store Bypass. */
-#define X86_FEATURE_AMD_SSBD	( 7*32+24) /* "" AMD SSBD implementation */
+#define X86_FEATURE_LS_CFG_SSBD	( 7*32+24) /* "" AMD SSBD implementation */
+
 #define X86_FEATURE_IBRS	( 7*32+25) /* Indirect Branch Restricted Speculation */
 #define X86_FEATURE_IBPB	( 7*32+26) /* Indirect Branch Prediction Barrier */
 #define X86_FEATURE_STIBP	( 7*32+27) /* Single Thread Indirect Branch Predictors */
@@ -306,7 +308,7 @@
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
-#define X86_FEATURE_SSBD		(18*32+31) /* Speculative Store Bypass Disable */
+#define X86_FEATURE_SPEC_CTRL_SSBD	(18*32+31) /* "" Speculative Store Bypass Disable */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index bd0edb2a21fc5..a97fd6730f12e 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -535,8 +535,8 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
 		 * avoid RMW. If that faults, do not enable SSBD.
 		 */
 		if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &x86_amd_ls_cfg_base)) {
+			setup_force_cpu_cap(X86_FEATURE_LS_CFG_SSBD);
 			setup_force_cpu_cap(X86_FEATURE_SSBD);
-			setup_force_cpu_cap(X86_FEATURE_AMD_SSBD);
 			x86_amd_ls_cfg_ssbd_mask = 1ULL << bit;
 		}
 	}
@@ -815,11 +815,6 @@ static void init_amd(struct cpuinfo_x86 *c)
 	/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
 	if (!cpu_has(c, X86_FEATURE_XENPV))
 		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
-
-	if (boot_cpu_has(X86_FEATURE_AMD_SSBD)) {
-		set_cpu_cap(c, X86_FEATURE_SSBD);
-		set_cpu_cap(c, X86_FEATURE_AMD_SSBD);
-	}
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index e23e2899d7834..9be729267794c 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -157,8 +157,8 @@ void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
 	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		return;
 
-	/* Intel controls SSB in MSR_SPEC_CTRL */
-	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
+	/* SSBD controlled in MSR_SPEC_CTRL */
+	if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
 		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
@@ -174,8 +174,8 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
 	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		return;
 
-	/* Intel controls SSB in MSR_SPEC_CTRL */
-	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
+	/* SSBD controlled in MSR_SPEC_CTRL */
+	if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
 		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
 
 	if (host != guest_spec_ctrl)
@@ -187,7 +187,7 @@ static void x86_amd_ssb_disable(void)
 {
 	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_ssbd_mask;
 
-	if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
+	if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD))
 		wrmsrl(MSR_AMD64_LS_CFG, msrval);
 }
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 1f70ff15eb62e..10977236c6eb5 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -693,6 +693,9 @@ static void init_speculation_control(struct cpuinfo_x86 *c)
 	if (cpu_has(c, X86_FEATURE_INTEL_STIBP))
 		set_cpu_cap(c, X86_FEATURE_STIBP);
 
+	if (cpu_has(c, X86_FEATURE_SPEC_CTRL_SSBD))
+		set_cpu_cap(c, X86_FEATURE_SSBD);
+
 	if (cpu_has(c, X86_FEATURE_AMD_IBRS)) {
 		set_cpu_cap(c, X86_FEATURE_IBRS);
 		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9a84e75cbec5f..4dce22d3cb068 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -121,6 +121,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 		setup_clear_cpu_cap(X86_FEATURE_MSR_SPEC_CTRL);
 		setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP);
 		setup_clear_cpu_cap(X86_FEATURE_SSBD);
+		setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL_SSBD);
 	}
 
 	/*
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index d716928882e9b..df27f9536e6b5 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -189,7 +189,7 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn
 {
 	u64 msr;
 
-	if (static_cpu_has(X86_FEATURE_AMD_SSBD)) {
+	if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD)) {
 		msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);
 		wrmsrl(MSR_AMD64_LS_CFG, msr);
 	} else {

From bb321e4c3c829416c90234f0959b74de095cae73 Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:38:41 -0700
Subject: [PATCH 1350/1852] x86/cpu/AMD: Fix erratum 1076 (CPB bit)

commit f7f3dc00f61261cdc9ccd8b886f21bc4dffd6fd9 upstream

CPUID Fn8000_0007_EDX[CPB] is wrongly 0 on models up to B1. But they do
support CPB (AMD's Core Performance Boosting cpufreq CPU feature), so fix that.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sherry Hurwitz <sherry.hurwitz@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170907170821.16021-1-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/amd.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index a97fd6730f12e..87f4a0d73c5ee 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -713,6 +713,16 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
 	}
 }
 
+static void init_amd_zn(struct cpuinfo_x86 *c)
+{
+	/*
+	 * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
+	 * all up to and including B1.
+	 */
+	if (c->x86_model <= 1 && c->x86_mask <= 1)
+		set_cpu_cap(c, X86_FEATURE_CPB);
+}
+
 static void init_amd(struct cpuinfo_x86 *c)
 {
 	u32 dummy;
@@ -743,6 +753,7 @@ static void init_amd(struct cpuinfo_x86 *c)
 	case 0x10: init_amd_gh(c); break;
 	case 0x12: init_amd_ln(c); break;
 	case 0x15: init_amd_bd(c); break;
+	case 0x17: init_amd_zn(c); break;
 	}
 
 	/* Enable workaround for FXSAVE leak */

From 1483ae8c671dba050b6265b6de7e05f1be065c04 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:38:50 -0700
Subject: [PATCH 1351/1852] x86/cpufeatures: Add FEATURE_ZEN

commit d1035d971829dcf80e8686ccde26f94b0a069472 upstream

Add a ZEN feature bit so family-dependent static_cpu_has() optimizations
can be built for ZEN.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 2 ++
 arch/x86/kernel/cpu/amd.c          | 1 +
 2 files changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 7dd1bba491727..8ae91326cc475 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -213,6 +213,8 @@
 #define X86_FEATURE_IBRS	( 7*32+25) /* Indirect Branch Restricted Speculation */
 #define X86_FEATURE_IBPB	( 7*32+26) /* Indirect Branch Prediction Barrier */
 #define X86_FEATURE_STIBP	( 7*32+27) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_ZEN		( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
+
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 87f4a0d73c5ee..9f61518842492 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -715,6 +715,7 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
 
 static void init_amd_zn(struct cpuinfo_x86 *c)
 {
+	set_cpu_cap(c, X86_FEATURE_ZEN);
 	/*
 	 * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
 	 * all up to and including B1.

From e5d2be9cd3d08794333d779755dbf5263532daea Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:38:58 -0700
Subject: [PATCH 1352/1852] x86/speculation: Handle HT correctly on AMD

commit 1f50ddb4f4189243c05926b842dc1a0332195f31 upstream

The AMD64_LS_CFG MSR is a per core MSR on Family 17H CPUs. That means when
hyperthreading is enabled the SSBD bit toggle needs to take both cores into
account. Otherwise the following situation can happen:

CPU0		CPU1

disable SSB
		disable SSB
		enable  SSB <- Enables it for the Core, i.e. for CPU0 as well

So after the SSB enable on CPU1 the task on CPU0 runs with SSB enabled
again.

On Intel the SSBD control is per core as well, but the synchronization
logic is implemented behind the per thread SPEC_CTRL MSR. It works like
this:

  CORE_SPEC_CTRL = THREAD0_SPEC_CTRL | THREAD1_SPEC_CTRL

i.e. if one of the threads enables a mitigation then this affects both and
the mitigation is only disabled in the core when both threads disabled it.

Add the necessary synchronization logic for AMD family 17H. Unfortunately
that requires a spinlock to serialize the access to the MSR, but the locks
are only shared between siblings.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/spec-ctrl.h |   6 ++
 arch/x86/kernel/process.c        | 125 +++++++++++++++++++++++++++++--
 arch/x86/kernel/smpboot.c        |   5 ++
 3 files changed, 130 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index dc21209790bfb..0cb49c4564b01 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -33,6 +33,12 @@ static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
 	return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
 }
 
+#ifdef CONFIG_SMP
+extern void speculative_store_bypass_ht_init(void);
+#else
+static inline void speculative_store_bypass_ht_init(void) { }
+#endif
+
 extern void speculative_store_bypass_update(void);
 
 #endif
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index df27f9536e6b5..1cf1bdb716010 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -185,22 +185,135 @@ static inline void switch_to_bitmap(struct tss_struct *tss,
 	}
 }
 
-static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
+#ifdef CONFIG_SMP
+
+struct ssb_state {
+	struct ssb_state	*shared_state;
+	raw_spinlock_t		lock;
+	unsigned int		disable_state;
+	unsigned long		local_state;
+};
+
+#define LSTATE_SSB	0
+
+static DEFINE_PER_CPU(struct ssb_state, ssb_state);
+
+void speculative_store_bypass_ht_init(void)
 {
-	u64 msr;
+	struct ssb_state *st = this_cpu_ptr(&ssb_state);
+	unsigned int this_cpu = smp_processor_id();
+	unsigned int cpu;
+
+	st->local_state = 0;
+
+	/*
+	 * Shared state setup happens once on the first bringup
+	 * of the CPU. It's not destroyed on CPU hotunplug.
+	 */
+	if (st->shared_state)
+		return;
+
+	raw_spin_lock_init(&st->lock);
 
-	if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD)) {
-		msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);
+	/*
+	 * Go over HT siblings and check whether one of them has set up the
+	 * shared state pointer already.
+	 */
+	for_each_cpu(cpu, topology_sibling_cpumask(this_cpu)) {
+		if (cpu == this_cpu)
+			continue;
+
+		if (!per_cpu(ssb_state, cpu).shared_state)
+			continue;
+
+		/* Link it to the state of the sibling: */
+		st->shared_state = per_cpu(ssb_state, cpu).shared_state;
+		return;
+	}
+
+	/*
+	 * First HT sibling to come up on the core.  Link shared state of
+	 * the first HT sibling to itself. The siblings on the same core
+	 * which come up later will see the shared state pointer and link
+	 * themself to the state of this CPU.
+	 */
+	st->shared_state = st;
+}
+
+/*
+ * Logic is: First HT sibling enables SSBD for both siblings in the core
+ * and last sibling to disable it, disables it for the whole core. This how
+ * MSR_SPEC_CTRL works in "hardware":
+ *
+ *  CORE_SPEC_CTRL = THREAD0_SPEC_CTRL | THREAD1_SPEC_CTRL
+ */
+static __always_inline void amd_set_core_ssb_state(unsigned long tifn)
+{
+	struct ssb_state *st = this_cpu_ptr(&ssb_state);
+	u64 msr = x86_amd_ls_cfg_base;
+
+	if (!static_cpu_has(X86_FEATURE_ZEN)) {
+		msr |= ssbd_tif_to_amd_ls_cfg(tifn);
 		wrmsrl(MSR_AMD64_LS_CFG, msr);
+		return;
+	}
+
+	if (tifn & _TIF_SSBD) {
+		/*
+		 * Since this can race with prctl(), block reentry on the
+		 * same CPU.
+		 */
+		if (__test_and_set_bit(LSTATE_SSB, &st->local_state))
+			return;
+
+		msr |= x86_amd_ls_cfg_ssbd_mask;
+
+		raw_spin_lock(&st->shared_state->lock);
+		/* First sibling enables SSBD: */
+		if (!st->shared_state->disable_state)
+			wrmsrl(MSR_AMD64_LS_CFG, msr);
+		st->shared_state->disable_state++;
+		raw_spin_unlock(&st->shared_state->lock);
 	} else {
-		msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
-		wrmsrl(MSR_IA32_SPEC_CTRL, msr);
+		if (!__test_and_clear_bit(LSTATE_SSB, &st->local_state))
+			return;
+
+		raw_spin_lock(&st->shared_state->lock);
+		st->shared_state->disable_state--;
+		if (!st->shared_state->disable_state)
+			wrmsrl(MSR_AMD64_LS_CFG, msr);
+		raw_spin_unlock(&st->shared_state->lock);
 	}
 }
+#else
+static __always_inline void amd_set_core_ssb_state(unsigned long tifn)
+{
+	u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);
+
+	wrmsrl(MSR_AMD64_LS_CFG, msr);
+}
+#endif
+
+static __always_inline void intel_set_ssb_state(unsigned long tifn)
+{
+	u64 msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
+
+	wrmsrl(MSR_IA32_SPEC_CTRL, msr);
+}
+
+static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
+{
+	if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD))
+		amd_set_core_ssb_state(tifn);
+	else
+		intel_set_ssb_state(tifn);
+}
 
 void speculative_store_bypass_update(void)
 {
+	preempt_disable();
 	__speculative_store_bypass_update(current_thread_info()->flags);
+	preempt_enable();
 }
 
 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 1f7aefc7b0b41..c017f1c71560d 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -75,6 +75,7 @@
 #include <asm/i8259.h>
 #include <asm/realmode.h>
 #include <asm/misc.h>
+#include <asm/spec-ctrl.h>
 
 /* Number of siblings per CPU package */
 int smp_num_siblings = 1;
@@ -217,6 +218,8 @@ static void notrace start_secondary(void *unused)
 	 */
 	check_tsc_sync_target();
 
+	speculative_store_bypass_ht_init();
+
 	/*
 	 * Lock vector_lock and initialize the vectors on this cpu
 	 * before setting the cpu online. We must set it online with
@@ -1209,6 +1212,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 	set_mtrr_aps_delayed_init();
 
 	smp_quirk_init_udelay();
+
+	speculative_store_bypass_ht_init();
 }
 
 void arch_enable_nonboot_cpus_begin(void)

From 43453e9ea141b450b61dc6ef669b3acf3765c3ed Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:39:06 -0700
Subject: [PATCH 1353/1852] x86/bugs, KVM: Extend speculation control for
 VIRT_SPEC_CTRL

commit ccbcd2674472a978b48c91c1fbfb66c0ff959f24 upstream

AMD is proposing a VIRT_SPEC_CTRL MSR to handle the Speculative Store
Bypass Disable via MSR_AMD64_LS_CFG so that guests do not have to care
about the bit position of the SSBD bit and thus facilitate migration.
Also, the sibling coordination on Family 17H CPUs can only be done on
the host.

Extend x86_spec_ctrl_set_guest() and x86_spec_ctrl_restore_host() with an
extra argument for the VIRT_SPEC_CTRL MSR.

Hand in 0 from VMX and in SVM add a new virt_spec_ctrl member to the CPU
data structure which is going to be used in later patches for the actual
implementation.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, skipping the KVM changes in this patch. ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/spec-ctrl.h |  9 ++++++---
 arch/x86/kernel/cpu/bugs.c       | 20 ++++++++++++++++++--
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 0cb49c4564b01..6e2874049afdc 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -10,10 +10,13 @@
  * the guest has, while on VMEXIT we restore the host view. This
  * would be easier if SPEC_CTRL were architecturally maskable or
  * shadowable for guests but this is not (currently) the case.
- * Takes the guest view of SPEC_CTRL MSR as a parameter.
+ * Takes the guest view of SPEC_CTRL MSR as a parameter and also
+ * the guest's version of VIRT_SPEC_CTRL, if emulated.
  */
-extern void x86_spec_ctrl_set_guest(u64);
-extern void x86_spec_ctrl_restore_host(u64);
+extern void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl,
+				    u64 guest_virt_spec_ctrl);
+extern void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl,
+				       u64 guest_virt_spec_ctrl);
 
 /* AMD specific Speculative Store Bypass MSR data */
 extern u64 x86_amd_ls_cfg_base;
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 9be729267794c..a1c98fda08780 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -149,7 +149,15 @@ u64 x86_spec_ctrl_get_default(void)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
 
-void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
+/**
+ * x86_spec_ctrl_set_guest - Set speculation control registers for the guest
+ * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
+ * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
+ *				(may get translated to MSR_AMD64_LS_CFG bits)
+ *
+ * Avoids writing to the MSR if the content/bits are the same
+ */
+void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
 {
 	u64 host = x86_spec_ctrl_base;
 
@@ -166,7 +174,15 @@ void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_set_guest);
 
-void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl)
+/**
+ * x86_spec_ctrl_restore_host - Restore host speculation control registers
+ * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
+ * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
+ *				(may get translated to MSR_AMD64_LS_CFG bits)
+ *
+ * Avoids writing to the MSR if the content/bits are the same
+ */
+void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
 {
 	u64 host = x86_spec_ctrl_base;
 

From 30a7448a8371a6b0da3cae3743328573615db5a0 Mon Sep 17 00:00:00 2001
From: Tom Lendacky <thomas.lendacky@amd.com>
Date: Sat, 14 Jul 2018 02:39:14 -0700
Subject: [PATCH 1354/1852] x86/speculation: Add virtualized speculative store
 bypass disable support

commit 11fb0683493b2da112cd64c9dada221b52463bf7 upstream

Some AMD processors only support a non-architectural means of enabling
speculative store bypass disable (SSBD).  To allow a simplified view of
this to a guest, an architectural definition has been created through a new
CPUID bit, 0x80000008_EBX[25], and a new MSR, 0xc001011f.  With this, a
hypervisor can virtualize the existence of this definition and provide an
architectural method for using SSBD to a guest.

Add the new CPUID feature, the new MSR and update the existing SSBD
support to use this MSR when present.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h |  1 +
 arch/x86/include/asm/msr-index.h   |  2 ++
 arch/x86/kernel/cpu/bugs.c         |  4 +++-
 arch/x86/kernel/process.c          | 13 ++++++++++++-
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 8ae91326cc475..f4b175db70f4d 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -269,6 +269,7 @@
 #define X86_FEATURE_AMD_IBPB	(13*32+12) /* Indirect Branch Prediction Barrier */
 #define X86_FEATURE_AMD_IBRS	(13*32+14) /* Indirect Branch Restricted Speculation */
 #define X86_FEATURE_AMD_STIBP	(13*32+15) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_VIRT_SSBD	(13*32+25) /* Virtualized Speculative Store Bypass Disable */
 
 /* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
 #define X86_FEATURE_DTHERM	(14*32+ 0) /* Digital Thermal Sensor */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2ea2ff1a81e82..22f2dd50d2d91 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -328,6 +328,8 @@
 #define MSR_AMD64_IBSOPDATA4		0xc001103d
 #define MSR_AMD64_IBS_REG_COUNT_MAX	8 /* includes MSR_AMD64_IBSBRTARGET */
 
+#define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f
+
 /* Fam 16h MSRs */
 #define MSR_F16H_L2I_PERF_CTL		0xc0010230
 #define MSR_F16H_L2I_PERF_CTR		0xc0010231
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index a1c98fda08780..50ab206a09b31 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -203,7 +203,9 @@ static void x86_amd_ssb_disable(void)
 {
 	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_ssbd_mask;
 
-	if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD))
+	if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
+		wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, SPEC_CTRL_SSBD);
+	else if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD))
 		wrmsrl(MSR_AMD64_LS_CFG, msrval);
 }
 
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 1cf1bdb716010..b5f52a50c5db3 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -294,6 +294,15 @@ static __always_inline void amd_set_core_ssb_state(unsigned long tifn)
 }
 #endif
 
+static __always_inline void amd_set_ssb_virt_state(unsigned long tifn)
+{
+	/*
+	 * SSBD has the same definition in SPEC_CTRL and VIRT_SPEC_CTRL,
+	 * so ssbd_tif_to_spec_ctrl() just works.
+	 */
+	wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));
+}
+
 static __always_inline void intel_set_ssb_state(unsigned long tifn)
 {
 	u64 msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
@@ -303,7 +312,9 @@ static __always_inline void intel_set_ssb_state(unsigned long tifn)
 
 static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
 {
-	if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD))
+	if (static_cpu_has(X86_FEATURE_VIRT_SSBD))
+		amd_set_ssb_virt_state(tifn);
+	else if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD))
 		amd_set_core_ssb_state(tifn);
 	else
 		intel_set_ssb_state(tifn);

From 04fbed68c29d3f443c1abf7b9505de3ee2180e17 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:39:22 -0700
Subject: [PATCH 1355/1852] x86/speculation: Rework
 speculative_store_bypass_update()

commit 0270be3e34efb05a88bc4c422572ece038ef3608 upstream

The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse
speculative_store_bypass_update() to avoid code duplication. Add an
argument for supplying a thread info (TIF) value and create a wrapper
speculative_store_bypass_update_current() which is used at the existing
call site.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/spec-ctrl.h | 7 ++++++-
 arch/x86/kernel/cpu/bugs.c       | 2 +-
 arch/x86/kernel/process.c        | 4 ++--
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 6e2874049afdc..82b6c5a0d61e0 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -42,6 +42,11 @@ extern void speculative_store_bypass_ht_init(void);
 static inline void speculative_store_bypass_ht_init(void) { }
 #endif
 
-extern void speculative_store_bypass_update(void);
+extern void speculative_store_bypass_update(unsigned long tif);
+
+static inline void speculative_store_bypass_update_current(void)
+{
+	speculative_store_bypass_update(current_thread_info()->flags);
+}
 
 #endif
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 50ab206a09b31..1b29be9211afe 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -596,7 +596,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
 	 * mitigation until it is next scheduled.
 	 */
 	if (task == current && update)
-		speculative_store_bypass_update();
+		speculative_store_bypass_update_current();
 
 	return 0;
 }
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b5f52a50c5db3..911ca11eb4899 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -320,10 +320,10 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn
 		intel_set_ssb_state(tifn);
 }
 
-void speculative_store_bypass_update(void)
+void speculative_store_bypass_update(unsigned long tif)
 {
 	preempt_disable();
-	__speculative_store_bypass_update(current_thread_info()->flags);
+	__speculative_store_bypass_update(tif);
 	preempt_enable();
 }
 

From cd37f7093237ff100a655f243d556017aaafbb7f Mon Sep 17 00:00:00 2001
From: Borislav Petkov <bp@suse.de>
Date: Sat, 14 Jul 2018 02:39:30 -0700
Subject: [PATCH 1356/1852] x86/bugs: Unify x86_spec_ctrl_{set_guest,
 restore_host}

commit cc69b34989210f067b2c51d5539b5f96ebcc3a01 upstream

Function bodies are very similar and are going to grow more almost
identical code. Add a bool arg to determine whether SPEC_CTRL is being set
for the guest or restored to the host.

No functional changes.

Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/spec-ctrl.h | 33 +++++++++++++++---
 arch/x86/kernel/cpu/bugs.c       | 60 ++++++++------------------------
 2 files changed, 44 insertions(+), 49 deletions(-)

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 82b6c5a0d61e0..9cecbe5e57ee0 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -13,10 +13,35 @@
  * Takes the guest view of SPEC_CTRL MSR as a parameter and also
  * the guest's version of VIRT_SPEC_CTRL, if emulated.
  */
-extern void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl,
-				    u64 guest_virt_spec_ctrl);
-extern void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl,
-				       u64 guest_virt_spec_ctrl);
+extern void x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool guest);
+
+/**
+ * x86_spec_ctrl_set_guest - Set speculation control registers for the guest
+ * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
+ * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
+ *				(may get translated to MSR_AMD64_LS_CFG bits)
+ *
+ * Avoids writing to the MSR if the content/bits are the same
+ */
+static inline
+void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
+{
+	x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, true);
+}
+
+/**
+ * x86_spec_ctrl_restore_host - Restore host speculation control registers
+ * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
+ * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
+ *				(may get translated to MSR_AMD64_LS_CFG bits)
+ *
+ * Avoids writing to the MSR if the content/bits are the same
+ */
+static inline
+void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
+{
+	x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, false);
+}
 
 /* AMD specific Speculative Store Bypass MSR data */
 extern u64 x86_amd_ls_cfg_base;
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 1b29be9211afe..208d44c5cc50c 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -149,55 +149,25 @@ u64 x86_spec_ctrl_get_default(void)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
 
-/**
- * x86_spec_ctrl_set_guest - Set speculation control registers for the guest
- * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
- * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
- *				(may get translated to MSR_AMD64_LS_CFG bits)
- *
- * Avoids writing to the MSR if the content/bits are the same
- */
-void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
+void
+x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 {
-	u64 host = x86_spec_ctrl_base;
+	struct thread_info *ti = current_thread_info();
+	u64 msr, host = x86_spec_ctrl_base;
 
 	/* Is MSR_SPEC_CTRL implemented ? */
-	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
-		return;
-
-	/* SSBD controlled in MSR_SPEC_CTRL */
-	if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
-		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
-
-	if (host != guest_spec_ctrl)
-		wrmsrl(MSR_IA32_SPEC_CTRL, guest_spec_ctrl);
-}
-EXPORT_SYMBOL_GPL(x86_spec_ctrl_set_guest);
-
-/**
- * x86_spec_ctrl_restore_host - Restore host speculation control registers
- * @guest_spec_ctrl:		The guest content of MSR_SPEC_CTRL
- * @guest_virt_spec_ctrl:	The guest controlled bits of MSR_VIRT_SPEC_CTRL
- *				(may get translated to MSR_AMD64_LS_CFG bits)
- *
- * Avoids writing to the MSR if the content/bits are the same
- */
-void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
-{
-	u64 host = x86_spec_ctrl_base;
-
-	/* Is MSR_SPEC_CTRL implemented ? */
-	if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
-		return;
-
-	/* SSBD controlled in MSR_SPEC_CTRL */
-	if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
-		host |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
-
-	if (host != guest_spec_ctrl)
-		wrmsrl(MSR_IA32_SPEC_CTRL, host);
+	if (static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) {
+		/* SSBD controlled in MSR_SPEC_CTRL */
+		if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
+			host |= ssbd_tif_to_spec_ctrl(ti->flags);
+
+		if (host != guest_spec_ctrl) {
+			msr = setguest ? guest_spec_ctrl : host;
+			wrmsrl(MSR_IA32_SPEC_CTRL, msr);
+		}
+	}
 }
-EXPORT_SYMBOL_GPL(x86_spec_ctrl_restore_host);
+EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);
 
 static void x86_amd_ssb_disable(void)
 {

From f7e2f79329a87da674ceb8c4aa4af21a63fee99a Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:39:38 -0700
Subject: [PATCH 1357/1852] x86/bugs: Expose x86_spec_ctrl_base directly

commit fa8ac4988249c38476f6ad678a4848a736373403 upstream

x86_spec_ctrl_base is the system wide default value for the SPEC_CTRL MSR.
x86_spec_ctrl_get_default() returns x86_spec_ctrl_base and was intended to
prevent modification to that variable. Though the variable is read only
after init and globaly visible already.

Remove the function and export the variable instead.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h | 16 +++++-----------
 arch/x86/include/asm/spec-ctrl.h     |  3 ---
 arch/x86/kernel/cpu/bugs.c           | 11 +----------
 3 files changed, 6 insertions(+), 24 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 640c11b25913f..2757c79754e19 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -172,16 +172,7 @@ enum spectre_v2_mitigation {
 	SPECTRE_V2_IBRS,
 };
 
-/*
- * The Intel specification for the SPEC_CTRL MSR requires that we
- * preserve any already set reserved bits at boot time (e.g. for
- * future additions that this kernel is not currently aware of).
- * We then set any additional mitigation bits that we want
- * ourselves and always use this as the base for SPEC_CTRL.
- * We also use this when handling guest entry/exit as below.
- */
 extern void x86_spec_ctrl_set(u64);
-extern u64 x86_spec_ctrl_get_default(void);
 
 /* The Speculative Store Bypass disable variants */
 enum ssb_mitigation {
@@ -232,6 +223,9 @@ static inline void indirect_branch_prediction_barrier(void)
 	alternative_msr_write(MSR_IA32_PRED_CMD, val, X86_FEATURE_USE_IBPB);
 }
 
+/* The Intel SPEC CTRL MSR base value cache */
+extern u64 x86_spec_ctrl_base;
+
 /*
  * With retpoline, we must use IBRS to restrict branch prediction
  * before calling into firmware.
@@ -240,7 +234,7 @@ static inline void indirect_branch_prediction_barrier(void)
  */
 #define firmware_restrict_branch_speculation_start()			\
 do {									\
-	u64 val = x86_spec_ctrl_get_default() | SPEC_CTRL_IBRS;		\
+	u64 val = x86_spec_ctrl_base | SPEC_CTRL_IBRS;			\
 									\
 	preempt_disable();						\
 	alternative_msr_write(MSR_IA32_SPEC_CTRL, val,			\
@@ -249,7 +243,7 @@ do {									\
 
 #define firmware_restrict_branch_speculation_end()			\
 do {									\
-	u64 val = x86_spec_ctrl_get_default();				\
+	u64 val = x86_spec_ctrl_base;					\
 									\
 	alternative_msr_write(MSR_IA32_SPEC_CTRL, val,			\
 			      X86_FEATURE_USE_IBRS_FW);			\
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 9cecbe5e57ee0..763d49710329d 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -47,9 +47,6 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
 extern u64 x86_amd_ls_cfg_base;
 extern u64 x86_amd_ls_cfg_ssbd_mask;
 
-/* The Intel SPEC CTRL MSR base value cache */
-extern u64 x86_spec_ctrl_base;
-
 static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
 {
 	BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 208d44c5cc50c..5391df5826c9a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -35,6 +35,7 @@ static void __init ssb_select_mitigation(void);
  * writes to SPEC_CTRL contain whatever reserved bits have been set.
  */
 u64 x86_spec_ctrl_base;
+EXPORT_SYMBOL_GPL(x86_spec_ctrl_base);
 
 /*
  * The vendor and possibly platform specific bits which can be modified in
@@ -139,16 +140,6 @@ void x86_spec_ctrl_set(u64 val)
 }
 EXPORT_SYMBOL_GPL(x86_spec_ctrl_set);
 
-u64 x86_spec_ctrl_get_default(void)
-{
-	u64 msrval = x86_spec_ctrl_base;
-
-	if (static_cpu_has(X86_FEATURE_SPEC_CTRL))
-		msrval |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags);
-	return msrval;
-}
-EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default);
-
 void
 x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 {

From e9c13c11d961256da02351645d8a693b72a2a069 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:39:46 -0700
Subject: [PATCH 1358/1852] x86/bugs: Remove x86_spec_ctrl_set()

commit 4b59bdb569453a60b752b274ca61f009e37f4dae upstream

x86_spec_ctrl_set() is only used in bugs.c and the extra mask checks there
provide no real value as both call sites can just write x86_spec_ctrl_base
to MSR_SPEC_CTRL. x86_spec_ctrl_base is valid and does not need any extra
masking or checking.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/nospec-branch.h |  2 --
 arch/x86/kernel/cpu/bugs.c           | 13 ++-----------
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 2757c79754e19..b4c74c24c8908 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -172,8 +172,6 @@ enum spectre_v2_mitigation {
 	SPECTRE_V2_IBRS,
 };
 
-extern void x86_spec_ctrl_set(u64);
-
 /* The Speculative Store Bypass disable variants */
 enum ssb_mitigation {
 	SPEC_STORE_BYPASS_NONE,
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 5391df5826c9a..05eed68a32f44 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -131,15 +131,6 @@ static const char *spectre_v2_strings[] = {
 
 static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE;
 
-void x86_spec_ctrl_set(u64 val)
-{
-	if (val & x86_spec_ctrl_mask)
-		WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val);
-	else
-		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val);
-}
-EXPORT_SYMBOL_GPL(x86_spec_ctrl_set);
-
 void
 x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 {
@@ -501,7 +492,7 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
 		case X86_VENDOR_INTEL:
 			x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
 			x86_spec_ctrl_mask &= ~SPEC_CTRL_SSBD;
-			x86_spec_ctrl_set(SPEC_CTRL_SSBD);
+			wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
 			break;
 		case X86_VENDOR_AMD:
 			x86_amd_ssb_disable();
@@ -613,7 +604,7 @@ int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
 void x86_spec_ctrl_setup_ap(void)
 {
 	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
-		x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask);
+		wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
 
 	if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
 		x86_amd_ssb_disable();

From 3c3b4d145cb41b4b8a159269e96c3221db3dcfe0 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:39:55 -0700
Subject: [PATCH 1359/1852] x86/bugs: Rework spec_ctrl base and mask logic

commit be6fcb5478e95bb1c91f489121238deb3abca46a upstream

x86_spec_ctrL_mask is intended to mask out bits from a MSR_SPEC_CTRL value
which are not to be modified. However the implementation is not really used
and the bitmask was inverted to make a check easier, which was removed in
"x86/bugs: Remove x86_spec_ctrl_set()"

Aside of that it is missing the STIBP bit if it is supported by the
platform, so if the mask would be used in x86_virt_spec_ctrl() then it
would prevent a guest from setting STIBP.

Add the STIBP bit if supported and use the mask in x86_virt_spec_ctrl() to
sanitize the value which is supplied by the guest.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 05eed68a32f44..af11a02819bc9 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -41,7 +41,7 @@ EXPORT_SYMBOL_GPL(x86_spec_ctrl_base);
  * The vendor and possibly platform specific bits which can be modified in
  * x86_spec_ctrl_base.
  */
-static u64 x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS;
+static u64 x86_spec_ctrl_mask = SPEC_CTRL_IBRS;
 
 /*
  * AMD specific MSR info for Speculative Store Bypass control.
@@ -67,6 +67,10 @@ void __init check_bugs(void)
 	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
 
+	/* Allow STIBP in MSR_SPEC_CTRL if supported */
+	if (boot_cpu_has(X86_FEATURE_STIBP))
+		x86_spec_ctrl_mask |= SPEC_CTRL_STIBP;
+
 	/* Select the proper spectre mitigation before patching alternatives */
 	spectre_v2_select_mitigation();
 
@@ -134,18 +138,26 @@ static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE;
 void
 x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 {
+	u64 msrval, guestval, hostval = x86_spec_ctrl_base;
 	struct thread_info *ti = current_thread_info();
-	u64 msr, host = x86_spec_ctrl_base;
 
 	/* Is MSR_SPEC_CTRL implemented ? */
 	if (static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) {
+		/*
+		 * Restrict guest_spec_ctrl to supported values. Clear the
+		 * modifiable bits in the host base value and or the
+		 * modifiable bits from the guest value.
+		 */
+		guestval = hostval & ~x86_spec_ctrl_mask;
+		guestval |= guest_spec_ctrl & x86_spec_ctrl_mask;
+
 		/* SSBD controlled in MSR_SPEC_CTRL */
 		if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
-			host |= ssbd_tif_to_spec_ctrl(ti->flags);
+			hostval |= ssbd_tif_to_spec_ctrl(ti->flags);
 
-		if (host != guest_spec_ctrl) {
-			msr = setguest ? guest_spec_ctrl : host;
-			wrmsrl(MSR_IA32_SPEC_CTRL, msr);
+		if (hostval != guestval) {
+			msrval = setguest ? guestval : hostval;
+			wrmsrl(MSR_IA32_SPEC_CTRL, msrval);
 		}
 	}
 }
@@ -491,7 +503,7 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
 		switch (boot_cpu_data.x86_vendor) {
 		case X86_VENDOR_INTEL:
 			x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
-			x86_spec_ctrl_mask &= ~SPEC_CTRL_SSBD;
+			x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
 			wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
 			break;
 		case X86_VENDOR_AMD:

From bc38b5bfe157a1299547f22f272a2c729f55c368 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sat, 14 Jul 2018 02:40:03 -0700
Subject: [PATCH 1360/1852] x86/speculation, KVM: Implement support for
 VIRT_SPEC_CTRL/LS_CFG

commit 47c61b3955cf712cadfc25635bf9bc174af030ea upstream

Add the necessary logic for supporting the emulated VIRT_SPEC_CTRL MSR to
x86_virt_spec_ctrl().  If either X86_FEATURE_LS_CFG_SSBD or
X86_FEATURE_VIRT_SPEC_CTRL is set then use the new guest_virt_spec_ctrl
argument to check whether the state must be modified on the host. The
update reuses speculative_store_bypass_update() so the ZEN-specific sibling
coordination can be reused.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/spec-ctrl.h |  6 ++++++
 arch/x86/kernel/cpu/bugs.c       | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 763d49710329d..ae7c2c5cd7f0e 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -53,6 +53,12 @@ static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
 	return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
 }
 
+static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl)
+{
+	BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
+	return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
+}
+
 static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
 {
 	return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index af11a02819bc9..12a8867071f3b 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -160,6 +160,36 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
 			wrmsrl(MSR_IA32_SPEC_CTRL, msrval);
 		}
 	}
+
+	/*
+	 * If SSBD is not handled in MSR_SPEC_CTRL on AMD, update
+	 * MSR_AMD64_L2_CFG or MSR_VIRT_SPEC_CTRL if supported.
+	 */
+	if (!static_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
+	    !static_cpu_has(X86_FEATURE_VIRT_SSBD))
+		return;
+
+	/*
+	 * If the host has SSBD mitigation enabled, force it in the host's
+	 * virtual MSR value. If its not permanently enabled, evaluate
+	 * current's TIF_SSBD thread flag.
+	 */
+	if (static_cpu_has(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE))
+		hostval = SPEC_CTRL_SSBD;
+	else
+		hostval = ssbd_tif_to_spec_ctrl(ti->flags);
+
+	/* Sanitize the guest value */
+	guestval = guest_virt_spec_ctrl & SPEC_CTRL_SSBD;
+
+	if (hostval != guestval) {
+		unsigned long tif;
+
+		tif = setguest ? ssbd_spec_ctrl_to_tif(guestval) :
+				 ssbd_spec_ctrl_to_tif(hostval);
+
+		speculative_store_bypass_update(tif);
+	}
 }
 EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);
 

From 0048cd92020851170182771a6d9e64f88f375593 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Sat, 14 Jul 2018 02:40:10 -0700
Subject: [PATCH 1361/1852] x86/bugs: Rename SSBD_NO to SSB_NO

commit 240da953fcc6a9008c92fae5b1f727ee5ed167ab upstream

The "336996 Speculative Execution Side Channel Mitigations" from
May defines this as SSB_NO, hence lets sync-up.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/msr-index.h | 2 +-
 arch/x86/kernel/cpu/common.c     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 22f2dd50d2d91..caa00191e565f 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -58,7 +58,7 @@
 #define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
 #define ARCH_CAP_RDCL_NO		(1 << 0)   /* Not susceptible to Meltdown */
 #define ARCH_CAP_IBRS_ALL		(1 << 1)   /* Enhanced IBRS support */
-#define ARCH_CAP_SSBD_NO		(1 << 4)   /*
+#define ARCH_CAP_SSB_NO			(1 << 4)   /*
 						    * Not susceptible to Speculative Store Bypass
 						    * attack, so no Speculative Store Bypass
 						    * control required.
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 10977236c6eb5..9ad38ad194acf 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -881,7 +881,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
 	if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
-	   !(ia32_cap & ARCH_CAP_SSBD_NO))
+	   !(ia32_cap & ARCH_CAP_SSB_NO))
 		setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
 	if (x86_match_cpu(cpu_no_speculation))

From 9091d7016ccbf822d08198abf8dcc035eacc3518 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Thu, 21 Jun 2018 10:43:31 +0200
Subject: [PATCH 1362/1852] x86/xen: Add call of
 speculative_store_bypass_ht_init() to PV paths

commit 74899d92e66663dc7671a8017b3146dcd4735f3b upstream.

Commit:

  1f50ddb4f418 ("x86/speculation: Handle HT correctly on AMD")

... added speculative_store_bypass_ht_init() to the per-CPU initialization sequence.

speculative_store_bypass_ht_init() needs to be called on each CPU for
PV guests, too.

Reported-by: Brian Woods <brian.woods@amd.com>
Tested-by: Brian Woods <brian.woods@amd.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Cc: <stable@vger.kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: boris.ostrovsky@oracle.com
Cc: xen-devel@lists.xenproject.org
Fixes: 1f50ddb4f4189243c05926b842dc1a0332195f31 ("x86/speculation: Handle HT correctly on AMD")
Link: https://lore.kernel.org/lkml/20180621084331.21228-1-jgross@suse.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/xen/smp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 3f4ebf0261f28..29e50d1229bc0 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -28,6 +28,7 @@
 #include <xen/interface/vcpu.h>
 #include <xen/interface/xenpmu.h>
 
+#include <asm/spec-ctrl.h>
 #include <asm/xen/interface.h>
 #include <asm/xen/hypercall.h>
 
@@ -87,6 +88,8 @@ static void cpu_bringup(void)
 	cpu_data(cpu).x86_max_cores = 1;
 	set_cpu_sibling_map(cpu);
 
+	speculative_store_bypass_ht_init();
+
 	xen_setup_cpu_clockevents();
 
 	notify_cpu_starting(cpu);
@@ -357,6 +360,8 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)
 	}
 	set_cpu_sibling_map(0);
 
+	speculative_store_bypass_ht_init();
+
 	xen_pmu_init(0);
 
 	if (xen_smp_intr_init(0))

From e7392c192237fa6ed641f28f9582ecd98a727281 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Wed, 18 Jan 2017 11:15:39 -0800
Subject: [PATCH 1363/1852] x86/cpu: Re-apply forced caps every time CPU caps
 are re-read

commit 60d3450167433f2d099ce2869dc52dd9e7dc9b29 upstream.

Calling get_cpu_cap() will reset a bunch of CPU features.  This will
cause the system to lose track of force-set and force-cleared
features in the words that are reset until the end of CPU
initialization.  This can cause X86_FEATURE_FPU, for example, to
change back and forth during boot and potentially confuse CPU setup.

To minimize the chance of confusion, re-apply forced caps every time
get_cpu_cap() is called.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matthew Whitehead <tedheadster@gmail.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/c817eb373d2c67c2c81413a70fc9b845fa34a37e.1484705016.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/common.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 9ad38ad194acf..3d21b28f98267 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -803,6 +803,13 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 
 	init_scattered_cpuid_features(c);
 	init_speculation_control(c);
+
+	/*
+	 * Clear/Set all flags overridden by options, after probe.
+	 * This needs to happen each time we re-probe, which may happen
+	 * several times during CPU initialization.
+	 */
+	apply_forced_caps(c);
 }
 
 static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)

From 4a5bd2079a746cfbd5f6538a56affe944bda6b53 Mon Sep 17 00:00:00 2001
From: Alan Jenkins <alan.christopher.jenkins@gmail.com>
Date: Thu, 12 Apr 2018 19:11:58 +0100
Subject: [PATCH 1364/1852] block: do not use interruptible wait anywhere

commit 1dc3039bc87ae7d19a990c3ee71cfd8a9068f428 upstream.

When blk_queue_enter() waits for a queue to unfreeze, or unset the
PREEMPT_ONLY flag, do not allow it to be interrupted by a signal.

The PREEMPT_ONLY flag was introduced later in commit 3a0a529971ec
("block, scsi: Make SCSI quiesce and resume work reliably").  Note the SCSI
device is resumed asynchronously, i.e. after un-freezing userspace tasks.

So that commit exposed the bug as a regression in v4.15.  A mysterious
SIGBUS (or -EIO) sometimes happened during the time the device was being
resumed.  Most frequently, there was no kernel log message, and we saw Xorg
or Xwayland killed by SIGBUS.[1]

[1] E.g. https://bugzilla.redhat.com/show_bug.cgi?id=1553979

Without this fix, I get an IO error in this test:

# dd if=/dev/sda of=/dev/null iflag=direct & \
  while killall -SIGUSR1 dd; do sleep 0.1; done & \
  echo mem > /sys/power/state ; \
  sleep 5; killall dd  # stop after 5 seconds

The interruptible wait was added to blk_queue_enter in
commit 3ef28e83ab15 ("block: generic request_queue reference counting").
Before then, the interruptible wait was only in blk-mq, but I don't think
it could ever have been correct.

Reviewed-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alan Jenkins <alan.christopher.jenkins@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 block/blk-core.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/block/blk-core.c b/block/blk-core.c
index a2378344b12c4..34e67d2061e13 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -653,21 +653,17 @@ EXPORT_SYMBOL(blk_alloc_queue);
 int blk_queue_enter(struct request_queue *q, gfp_t gfp)
 {
 	while (true) {
-		int ret;
-
 		if (percpu_ref_tryget_live(&q->q_usage_counter))
 			return 0;
 
 		if (!gfpflags_allow_blocking(gfp))
 			return -EBUSY;
 
-		ret = wait_event_interruptible(q->mq_freeze_wq,
-				!atomic_read(&q->mq_freeze_depth) ||
-				blk_queue_dying(q));
+		wait_event(q->mq_freeze_wq,
+			   !atomic_read(&q->mq_freeze_depth) ||
+			   blk_queue_dying(q));
 		if (blk_queue_dying(q))
 			return -ENODEV;
-		if (ret)
-			return ret;
 	}
 }
 

From ffcdfb003b13d626e924b1a7222ec2235355e546 Mon Sep 17 00:00:00 2001
From: Lucas Stach <dev@lynxeye.de>
Date: Mon, 29 Feb 2016 21:46:07 +0100
Subject: [PATCH 1365/1852] clk: tegra: Fix PLL_U post divider and initial rate
 on Tegra30

commit 797097301860c64b63346d068ba4fe4992bd5021 upstream.

The post divider value in the frequency table is wrong as it would lead
to the PLL producing an output rate of 960 MHz instead of the desired
480 MHz. This wasn't a problem as nothing used the table to actually
initialize the PLL rate, but the bootloader configuration was used
unaltered.

If the bootloader does not set up the PLL it will fail to come when used
under Linux. To fix this don't rely on the bootloader, but set the
correct rate in the clock driver.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[jonathanh@nvidia.com: Back-ported to stable v4.4.y]
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/clk/tegra/clk-tegra30.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 8c41c6fcb9ee5..acf83569f86fe 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -333,11 +333,11 @@ static struct pdiv_map pllu_p[] = {
 };
 
 static struct tegra_clk_pll_freq_table pll_u_freq_table[] = {
-	{ 12000000, 480000000, 960, 12, 0, 12},
-	{ 13000000, 480000000, 960, 13, 0, 12},
-	{ 16800000, 480000000, 400, 7,  0, 5},
-	{ 19200000, 480000000, 200, 4,  0, 3},
-	{ 26000000, 480000000, 960, 26, 0, 12},
+	{ 12000000, 480000000, 960, 12, 2, 12 },
+	{ 13000000, 480000000, 960, 13, 2, 12 },
+	{ 16800000, 480000000, 400,  7, 2,  5 },
+	{ 19200000, 480000000, 200,  4, 2,  3 },
+	{ 26000000, 480000000, 960, 26, 2, 12 },
 	{ 0, 0, 0, 0, 0, 0 },
 };
 
@@ -1372,6 +1372,7 @@ static struct tegra_clk_init_table init_table[] __initdata = {
 	{TEGRA30_CLK_GR2D, TEGRA30_CLK_PLL_C, 300000000, 0},
 	{TEGRA30_CLK_GR3D, TEGRA30_CLK_PLL_C, 300000000, 0},
 	{TEGRA30_CLK_GR3D2, TEGRA30_CLK_PLL_C, 300000000, 0},
+	{ TEGRA30_CLK_PLL_U, TEGRA30_CLK_CLK_MAX, 480000000, 0 },
 	{TEGRA30_CLK_CLK_MAX, TEGRA30_CLK_CLK_MAX, 0, 0}, /* This MUST be the last entry. */
 };
 

From 61337e0c725513e307c7f9a6bf8de860ebe72fd6 Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Tue, 14 Jun 2016 10:12:13 +0200
Subject: [PATCH 1366/1852] ubi: Introduce vol_ignored()

commit 243a4f8126fcf7facb04b324dbb7c85d10b11ce9 upstream.

This makes the logic more easy to follow.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/attach.c | 24 ++++++++++++++++++------
 drivers/mtd/ubi/ubi.h    | 15 +++++++++++++++
 2 files changed, 33 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index c1aaf0336cf2e..abd6137a3b4da 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -803,6 +803,20 @@ static int check_corruption(struct ubi_device *ubi, struct ubi_vid_hdr *vid_hdr,
 	return err;
 }
 
+static bool vol_ignored(int vol_id)
+{
+	switch (vol_id) {
+		case UBI_LAYOUT_VOLUME_ID:
+		return true;
+	}
+
+#ifdef CONFIG_MTD_UBI_FASTMAP
+	return ubi_is_fm_vol(vol_id);
+#else
+	return false;
+#endif
+}
+
 /**
  * scan_peb - scan and process UBI headers of a PEB.
  * @ubi: UBI device description object
@@ -995,17 +1009,15 @@ static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,
 		*vid = vol_id;
 	if (sqnum)
 		*sqnum = be64_to_cpu(vidh->sqnum);
-	if (vol_id > UBI_MAX_VOLUMES && vol_id != UBI_LAYOUT_VOLUME_ID) {
+	if (vol_id > UBI_MAX_VOLUMES && !vol_ignored(vol_id)) {
 		int lnum = be32_to_cpu(vidh->lnum);
 
 		/* Unsupported internal volume */
 		switch (vidh->compat) {
 		case UBI_COMPAT_DELETE:
-			if (vol_id != UBI_FM_SB_VOLUME_ID
-			    && vol_id != UBI_FM_DATA_VOLUME_ID) {
-				ubi_msg(ubi, "\"delete\" compatible internal volume %d:%d found, will remove it",
-					vol_id, lnum);
-			}
+			ubi_msg(ubi, "\"delete\" compatible internal volume %d:%d found, will remove it",
+				vol_id, lnum);
+
 			err = add_to_list(ai, pnum, vol_id, lnum,
 					  ec, 1, &ai->erase);
 			if (err)
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index de1ea2e4c37d4..086ff56922b56 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -1101,4 +1101,19 @@ static inline int idx2vol_id(const struct ubi_device *ubi, int idx)
 		return idx;
 }
 
+/**
+ * ubi_is_fm_vol - check whether a volume ID is a Fastmap volume.
+ * @vol_id: volume ID
+ */
+static inline bool ubi_is_fm_vol(int vol_id)
+{
+	switch (vol_id) {
+		case UBI_FM_SB_VOLUME_ID:
+		case UBI_FM_DATA_VOLUME_ID:
+		return true;
+	}
+
+	return false;
+}
+
 #endif /* !__UBI_UBI_H__ */

From 9c2c734b61b8fa7267daf4bcb4d27a65d5f0483d Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Tue, 14 Jun 2016 10:12:15 +0200
Subject: [PATCH 1367/1852] ubi: Rework Fastmap attach base code

commit fdf10ed710c0aa177e8dfcd84e65e4e5e8e0956b upstream.

Introduce a new list to the UBI attach information
object to be able to deal better with old and corrupted
Fastmap eraseblocks.
Also move more Fastmap specific code into fastmap.c.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/attach.c  | 99 +++++++++++++++++++++++++++------------
 drivers/mtd/ubi/fastmap.c | 36 ++++++++++++--
 drivers/mtd/ubi/ubi.h     | 28 ++++++++++-
 drivers/mtd/ubi/wl.c      | 41 ++++++++++++----
 4 files changed, 162 insertions(+), 42 deletions(-)

diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index abd6137a3b4da..68ff57435c89e 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -174,6 +174,40 @@ static int add_corrupted(struct ubi_attach_info *ai, int pnum, int ec)
 	return 0;
 }
 
+/**
+ * add_fastmap - add a Fastmap related physical eraseblock.
+ * @ai: attaching information
+ * @pnum: physical eraseblock number the VID header came from
+ * @vid_hdr: the volume identifier header
+ * @ec: erase counter of the physical eraseblock
+ *
+ * This function allocates a 'struct ubi_ainf_peb' object for a Fastamp
+ * physical eraseblock @pnum and adds it to the 'fastmap' list.
+ * Such blocks can be Fastmap super and data blocks from both the most
+ * recent Fastmap we're attaching from or from old Fastmaps which will
+ * be erased.
+ */
+static int add_fastmap(struct ubi_attach_info *ai, int pnum,
+		       struct ubi_vid_hdr *vid_hdr, int ec)
+{
+	struct ubi_ainf_peb *aeb;
+
+	aeb = kmem_cache_alloc(ai->aeb_slab_cache, GFP_KERNEL);
+	if (!aeb)
+		return -ENOMEM;
+
+	aeb->pnum = pnum;
+	aeb->vol_id = be32_to_cpu(vidh->vol_id);
+	aeb->sqnum = be64_to_cpu(vidh->sqnum);
+	aeb->ec = ec;
+	list_add(&aeb->u.list, &ai->fastmap);
+
+	dbg_bld("add to fastmap list: PEB %d, vol_id %d, sqnum: %llu", pnum,
+		aeb->vol_id, aeb->sqnum);
+
+	return 0;
+}
+
 /**
  * validate_vid_hdr - check volume identifier header.
  * @ubi: UBI device description object
@@ -822,18 +856,15 @@ static bool vol_ignored(int vol_id)
  * @ubi: UBI device description object
  * @ai: attaching information
  * @pnum: the physical eraseblock number
- * @vid: The volume ID of the found volume will be stored in this pointer
- * @sqnum: The sqnum of the found volume will be stored in this pointer
  *
  * This function reads UBI headers of PEB @pnum, checks them, and adds
  * information about this PEB to the corresponding list or RB-tree in the
  * "attaching info" structure. Returns zero if the physical eraseblock was
  * successfully handled and a negative error code in case of failure.
  */
-static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,
-		    int pnum, int *vid, unsigned long long *sqnum)
+static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum)
 {
-	long long uninitialized_var(ec);
+	long long ec;
 	int err, bitflips = 0, vol_id = -1, ec_err = 0;
 
 	dbg_bld("scan PEB %d", pnum);
@@ -1005,10 +1036,6 @@ static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,
 	}
 
 	vol_id = be32_to_cpu(vidh->vol_id);
-	if (vid)
-		*vid = vol_id;
-	if (sqnum)
-		*sqnum = be64_to_cpu(vidh->sqnum);
 	if (vol_id > UBI_MAX_VOLUMES && !vol_ignored(vol_id)) {
 		int lnum = be32_to_cpu(vidh->lnum);
 
@@ -1049,7 +1076,12 @@ static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,
 	if (ec_err)
 		ubi_warn(ubi, "valid VID header but corrupted EC header at PEB %d",
 			 pnum);
-	err = ubi_add_to_av(ubi, ai, pnum, ec, vidh, bitflips);
+
+	if (ubi_is_fm_vol(vol_id))
+		err = add_fastmap(ai, pnum, vidh, ec);
+	else
+		err = ubi_add_to_av(ubi, ai, pnum, ec, vidh, bitflips);
+
 	if (err)
 		return err;
 
@@ -1198,6 +1230,10 @@ static void destroy_ai(struct ubi_attach_info *ai)
 		list_del(&aeb->u.list);
 		kmem_cache_free(ai->aeb_slab_cache, aeb);
 	}
+	list_for_each_entry_safe(aeb, aeb_tmp, &ai->fastmap, u.list) {
+		list_del(&aeb->u.list);
+		kmem_cache_free(ai->aeb_slab_cache, aeb);
+	}
 
 	/* Destroy the volume RB-tree */
 	rb = ai->volumes.rb_node;
@@ -1257,7 +1293,7 @@ static int scan_all(struct ubi_device *ubi, struct ubi_attach_info *ai,
 		cond_resched();
 
 		dbg_gen("process PEB %d", pnum);
-		err = scan_peb(ubi, ai, pnum, NULL, NULL);
+		err = scan_peb(ubi, ai, pnum);
 		if (err < 0)
 			goto out_vidh;
 	}
@@ -1323,6 +1359,7 @@ static struct ubi_attach_info *alloc_ai(void)
 	INIT_LIST_HEAD(&ai->free);
 	INIT_LIST_HEAD(&ai->erase);
 	INIT_LIST_HEAD(&ai->alien);
+	INIT_LIST_HEAD(&ai->fastmap);
 	ai->volumes = RB_ROOT;
 	ai->aeb_slab_cache = kmem_cache_create("ubi_aeb_slab_cache",
 					       sizeof(struct ubi_ainf_peb),
@@ -1349,52 +1386,54 @@ static struct ubi_attach_info *alloc_ai(void)
  */
 static int scan_fast(struct ubi_device *ubi, struct ubi_attach_info **ai)
 {
-	int err, pnum, fm_anchor = -1;
-	unsigned long long max_sqnum = 0;
+	int err, pnum;
+	struct ubi_attach_info *scan_ai;
 
 	err = -ENOMEM;
 
+	scan_ai = alloc_ai();
+	if (!scan_ai)
+		goto out;
+
 	ech = kzalloc(ubi->ec_hdr_alsize, GFP_KERNEL);
 	if (!ech)
-		goto out;
+		goto out_ai;
 
 	vidh = ubi_zalloc_vid_hdr(ubi, GFP_KERNEL);
 	if (!vidh)
 		goto out_ech;
 
 	for (pnum = 0; pnum < UBI_FM_MAX_START; pnum++) {
-		int vol_id = -1;
-		unsigned long long sqnum = -1;
 		cond_resched();
 
 		dbg_gen("process PEB %d", pnum);
-		err = scan_peb(ubi, *ai, pnum, &vol_id, &sqnum);
+		err = scan_peb(ubi, scan_ai, pnum);
 		if (err < 0)
 			goto out_vidh;
-
-		if (vol_id == UBI_FM_SB_VOLUME_ID && sqnum > max_sqnum) {
-			max_sqnum = sqnum;
-			fm_anchor = pnum;
-		}
 	}
 
 	ubi_free_vid_hdr(ubi, vidh);
 	kfree(ech);
 
-	if (fm_anchor < 0)
-		return UBI_NO_FASTMAP;
-
-	destroy_ai(*ai);
-	*ai = alloc_ai();
-	if (!*ai)
-		return -ENOMEM;
+	err = ubi_scan_fastmap(ubi, *ai, scan_ai);
+	if (err) {
+		/*
+		 * Didn't attach via fastmap, do a full scan but reuse what
+		 * we've aready scanned.
+		 */
+		destroy_ai(*ai);
+		*ai = scan_ai;
+	} else
+		destroy_ai(scan_ai);
 
-	return ubi_scan_fastmap(ubi, *ai, fm_anchor);
+	return err;
 
 out_vidh:
 	ubi_free_vid_hdr(ubi, vidh);
 out_ech:
 	kfree(ech);
+out_ai:
+	destroy_ai(scan_ai);
 out:
 	return err;
 }
diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index bba7dd1b5ebf1..e724a363cef38 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
@@ -850,28 +850,58 @@ static int ubi_attach_fastmap(struct ubi_device *ubi,
 	return ret;
 }
 
+/**
+ * find_fm_anchor - find the most recent Fastmap superblock (anchor)
+ * @ai: UBI attach info to be filled
+ */
+static int find_fm_anchor(struct ubi_attach_info *ai)
+{
+	int ret = -1;
+	struct ubi_ainf_peb *aeb;
+	unsigned long long max_sqnum = 0;
+
+	list_for_each_entry(aeb, &ai->fastmap, u.list) {
+		if (aeb->vol_id == UBI_FM_SB_VOLUME_ID && aeb->sqnum > max_sqnum) {
+			max_sqnum = aeb->sqnum;
+			ret = aeb->pnum;
+		}
+	}
+
+	return ret;
+}
+
 /**
  * ubi_scan_fastmap - scan the fastmap.
  * @ubi: UBI device object
  * @ai: UBI attach info to be filled
- * @fm_anchor: The fastmap starts at this PEB
+ * @scan_ai: UBI attach info from the first 64 PEBs,
+ *           used to find the most recent Fastmap data structure
  *
  * Returns 0 on success, UBI_NO_FASTMAP if no fastmap was found,
  * UBI_BAD_FASTMAP if one was found but is not usable.
  * < 0 indicates an internal error.
  */
 int ubi_scan_fastmap(struct ubi_device *ubi, struct ubi_attach_info *ai,
-		     int fm_anchor)
+		     struct ubi_attach_info *scan_ai)
 {
 	struct ubi_fm_sb *fmsb, *fmsb2;
 	struct ubi_vid_hdr *vh;
 	struct ubi_ec_hdr *ech;
 	struct ubi_fastmap_layout *fm;
-	int i, used_blocks, pnum, ret = 0;
+	struct ubi_ainf_peb *tmp_aeb, *aeb;
+	int i, used_blocks, pnum, fm_anchor, ret = 0;
 	size_t fm_size;
 	__be32 crc, tmp_crc;
 	unsigned long long sqnum = 0;
 
+	fm_anchor = find_fm_anchor(scan_ai);
+	if (fm_anchor < 0)
+		return UBI_NO_FASTMAP;
+
+	/* Move all (possible) fastmap blocks into our new attach structure. */
+	list_for_each_entry_safe(aeb, tmp_aeb, &scan_ai->fastmap, u.list)
+		list_move_tail(&aeb->u.list, &ai->fastmap);
+
 	down_write(&ubi->fm_protect);
 	memset(ubi->fm_buf, 0, ubi->fm_size);
 
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 086ff56922b56..051976caf8f0c 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -699,6 +699,8 @@ struct ubi_ainf_volume {
  * @erase: list of physical eraseblocks which have to be erased
  * @alien: list of physical eraseblocks which should not be used by UBI (e.g.,
  *         those belonging to "preserve"-compatible internal volumes)
+ * @fastmap: list of physical eraseblocks which relate to fastmap (e.g.,
+ *           eraseblocks of the current and not yet erased old fastmap blocks)
  * @corr_peb_count: count of PEBs in the @corr list
  * @empty_peb_count: count of PEBs which are presumably empty (contain only
  *                   0xFF bytes)
@@ -727,6 +729,7 @@ struct ubi_attach_info {
 	struct list_head free;
 	struct list_head erase;
 	struct list_head alien;
+	struct list_head fastmap;
 	int corr_peb_count;
 	int empty_peb_count;
 	int alien_peb_count;
@@ -907,7 +910,7 @@ int ubi_compare_lebs(struct ubi_device *ubi, const struct ubi_ainf_peb *aeb,
 size_t ubi_calc_fm_size(struct ubi_device *ubi);
 int ubi_update_fastmap(struct ubi_device *ubi);
 int ubi_scan_fastmap(struct ubi_device *ubi, struct ubi_attach_info *ai,
-		     int fm_anchor);
+		     struct ubi_attach_info *scan_ai);
 #else
 static inline int ubi_update_fastmap(struct ubi_device *ubi) { return 0; }
 #endif
@@ -1116,4 +1119,27 @@ static inline bool ubi_is_fm_vol(int vol_id)
 	return false;
 }
 
+/**
+ * ubi_find_fm_block - check whether a PEB is part of the current Fastmap.
+ * @ubi: UBI device description object
+ * @pnum: physical eraseblock to look for
+ *
+ * This function returns a wear leveling object if @pnum relates to the current
+ * fastmap, @NULL otherwise.
+ */
+static inline struct ubi_wl_entry *ubi_find_fm_block(const struct ubi_device *ubi,
+						     int pnum)
+{
+	int i;
+
+	if (ubi->fm) {
+		for (i = 0; i < ubi->fm->used_blocks; i++) {
+			if (ubi->fm->e[i]->pnum == pnum)
+				return ubi->fm->e[i];
+		}
+	}
+
+	return NULL;
+}
+
 #endif /* !__UBI_UBI_H__ */
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index ca9746f41ff15..7eb1f3fb16e21 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -1598,19 +1598,44 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 		}
 	}
 
-	dbg_wl("found %i PEBs", found_pebs);
+	list_for_each_entry(aeb, &ai->fastmap, u.list) {
+		cond_resched();
+
+		e = ubi_find_fm_block(ubi, aeb->pnum);
 
-	if (ubi->fm) {
-		ubi_assert(ubi->good_peb_count ==
-			   found_pebs + ubi->fm->used_blocks);
+		if (e) {
+			ubi_assert(!ubi->lookuptbl[e->pnum]);
+			ubi->lookuptbl[e->pnum] = e;
+		} else {
+			/*
+			 * Usually old Fastmap PEBs are scheduled for erasure
+			 * and we don't have to care about them but if we face
+			 * an power cut before scheduling them we need to
+			 * take care of them here.
+			 */
+			if (ubi->lookuptbl[aeb->pnum])
+				continue;
+
+			e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);
+			if (!e)
+				goto out_free;
 
-		for (i = 0; i < ubi->fm->used_blocks; i++) {
-			e = ubi->fm->e[i];
+			e->pnum = aeb->pnum;
+			e->ec = aeb->ec;
+			ubi_assert(!ubi->lookuptbl[e->pnum]);
 			ubi->lookuptbl[e->pnum] = e;
+			if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0)) {
+				wl_entry_destroy(ubi, e);
+				goto out_free;
+			}
 		}
+
+		found_pebs++;
 	}
-	else
-		ubi_assert(ubi->good_peb_count == found_pebs);
+
+	dbg_wl("found %i PEBs", found_pebs);
+
+	ubi_assert(ubi->good_peb_count == found_pebs);
 
 	reserved_pebs = WL_RESERVED_PEBS;
 	ubi_fastmap_init(ubi, &reserved_pebs);

From c7f0134fc40f8c876271fbed2963952f499aa985 Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Tue, 14 Jun 2016 10:12:17 +0200
Subject: [PATCH 1368/1852] ubi: Be more paranoid while seaching for the most
 recent Fastmap

commit 74f2c6e9a47cf4e508198c8594626cc82906a13d upstream.

Since PEB erasure is asynchornous it can happen that there is
more than one Fastmap on the MTD. This is fine because the attach logic
will pick the Fastmap data structure with the highest sequence number.

On a not so well configured MTD stack spurious ECC errors are common.
Causes can be different, bad hardware, wrong operating modes, etc...
If the most current Fastmap renders bad due to ECC errors UBI might
pick an older Fastmap to attach from.
While this can only happen on an anyway broken setup it will show
completely different sympthoms and makes finding the root cause much
more difficult.
So, be debug friendly and fall back to scanning mode of we're facing
an ECC error while scanning for Fastmap.

Cc: <stable@vger.kernel.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/attach.c | 28 ++++++++++++++++++++++++----
 drivers/mtd/ubi/ubi.h    |  3 +++
 2 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index 68ff57435c89e..5cde3ad1665e3 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -856,13 +856,15 @@ static bool vol_ignored(int vol_id)
  * @ubi: UBI device description object
  * @ai: attaching information
  * @pnum: the physical eraseblock number
+ * @fast: true if we're scanning for a Fastmap
  *
  * This function reads UBI headers of PEB @pnum, checks them, and adds
  * information about this PEB to the corresponding list or RB-tree in the
  * "attaching info" structure. Returns zero if the physical eraseblock was
  * successfully handled and a negative error code in case of failure.
  */
-static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum)
+static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,
+		    int pnum, bool fast)
 {
 	long long ec;
 	int err, bitflips = 0, vol_id = -1, ec_err = 0;
@@ -980,6 +982,20 @@ static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum
 			 */
 			ai->maybe_bad_peb_count += 1;
 	case UBI_IO_BAD_HDR:
+			/*
+			 * If we're facing a bad VID header we have to drop *all*
+			 * Fastmap data structures we find. The most recent Fastmap
+			 * could be bad and therefore there is a chance that we attach
+			 * from an old one. On a fine MTD stack a PEB must not render
+			 * bad all of a sudden, but the reality is different.
+			 * So, let's be paranoid and help finding the root cause by
+			 * falling back to scanning mode instead of attaching with a
+			 * bad EBA table and cause data corruption which is hard to
+			 * analyze.
+			 */
+			if (fast)
+				ai->force_full_scan = 1;
+
 		if (ec_err)
 			/*
 			 * Both headers are corrupted. There is a possibility
@@ -1293,7 +1309,7 @@ static int scan_all(struct ubi_device *ubi, struct ubi_attach_info *ai,
 		cond_resched();
 
 		dbg_gen("process PEB %d", pnum);
-		err = scan_peb(ubi, ai, pnum);
+		err = scan_peb(ubi, ai, pnum, false);
 		if (err < 0)
 			goto out_vidh;
 	}
@@ -1407,7 +1423,7 @@ static int scan_fast(struct ubi_device *ubi, struct ubi_attach_info **ai)
 		cond_resched();
 
 		dbg_gen("process PEB %d", pnum);
-		err = scan_peb(ubi, scan_ai, pnum);
+		err = scan_peb(ubi, scan_ai, pnum, true);
 		if (err < 0)
 			goto out_vidh;
 	}
@@ -1415,7 +1431,11 @@ static int scan_fast(struct ubi_device *ubi, struct ubi_attach_info **ai)
 	ubi_free_vid_hdr(ubi, vidh);
 	kfree(ech);
 
-	err = ubi_scan_fastmap(ubi, *ai, scan_ai);
+	if (scan_ai->force_full_scan)
+		err = UBI_NO_FASTMAP;
+	else
+		err = ubi_scan_fastmap(ubi, *ai, scan_ai);
+
 	if (err) {
 		/*
 		 * Didn't attach via fastmap, do a full scan but reuse what
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 051976caf8f0c..05d9ec66437c3 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -711,6 +711,8 @@ struct ubi_ainf_volume {
  * @vols_found: number of volumes found
  * @highest_vol_id: highest volume ID
  * @is_empty: flag indicating whether the MTD device is empty or not
+ * @force_full_scan: flag indicating whether we need to do a full scan and drop
+		     all existing Fastmap data structures
  * @min_ec: lowest erase counter value
  * @max_ec: highest erase counter value
  * @max_sqnum: highest sequence number value
@@ -738,6 +740,7 @@ struct ubi_attach_info {
 	int vols_found;
 	int highest_vol_id;
 	int is_empty;
+	int force_full_scan;
 	int min_ec;
 	int max_ec;
 	unsigned long long max_sqnum;

From e8d4740f23aa1bd262d6c0d045d248a09f98bb97 Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Wed, 24 Aug 2016 14:36:14 +0200
Subject: [PATCH 1369/1852] ubi: Fix races around ubi_refill_pools()

commit 2e8f08deabbc7eefe4c5838aaa6aa9a23a8acf2e upstream.

When writing a new Fastmap the first thing that happens
is refilling the pools in memory.
At this stage it is possible that new PEBs from the new pools
get already claimed and written with data.
If this happens before the new Fastmap data structure hits the
flash and we face power cut the freshly written PEB will not
scanned and unnoticed.

Solve the issue by locking the pools until Fastmap is written.

Cc: <stable@vger.kernel.org>
Fixes: dbb7d2a88d ("UBI: Add fastmap core")
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/eba.c        |  4 ++--
 drivers/mtd/ubi/fastmap-wl.c |  6 ++++--
 drivers/mtd/ubi/fastmap.c    | 14 ++++++++++----
 drivers/mtd/ubi/wl.c         | 20 ++++++++++++++------
 4 files changed, 30 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c
index c4a25c858c07d..03cf0553ec1b3 100644
--- a/drivers/mtd/ubi/eba.c
+++ b/drivers/mtd/ubi/eba.c
@@ -1178,6 +1178,8 @@ int ubi_eba_copy_leb(struct ubi_device *ubi, int from, int to,
 	struct ubi_volume *vol;
 	uint32_t crc;
 
+	ubi_assert(rwsem_is_locked(&ubi->fm_eba_sem));
+
 	vol_id = be32_to_cpu(vid_hdr->vol_id);
 	lnum = be32_to_cpu(vid_hdr->lnum);
 
@@ -1346,9 +1348,7 @@ int ubi_eba_copy_leb(struct ubi_device *ubi, int from, int to,
 	}
 
 	ubi_assert(vol->eba_tbl[lnum] == from);
-	down_read(&ubi->fm_eba_sem);
 	vol->eba_tbl[lnum] = to;
-	up_read(&ubi->fm_eba_sem);
 
 out_unlock_buf:
 	mutex_unlock(&ubi->buf_mutex);
diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
index ed62f1efe6ebb..69dd21679a30c 100644
--- a/drivers/mtd/ubi/fastmap-wl.c
+++ b/drivers/mtd/ubi/fastmap-wl.c
@@ -262,6 +262,8 @@ static struct ubi_wl_entry *get_peb_for_wl(struct ubi_device *ubi)
 	struct ubi_fm_pool *pool = &ubi->fm_wl_pool;
 	int pnum;
 
+	ubi_assert(rwsem_is_locked(&ubi->fm_eba_sem));
+
 	if (pool->used == pool->size) {
 		/* We cannot update the fastmap here because this
 		 * function is called in atomic context.
@@ -303,7 +305,7 @@ int ubi_ensure_anchor_pebs(struct ubi_device *ubi)
 
 	wrk->anchor = 1;
 	wrk->func = &wear_leveling_worker;
-	schedule_ubi_work(ubi, wrk);
+	__schedule_ubi_work(ubi, wrk);
 	return 0;
 }
 
@@ -344,7 +346,7 @@ int ubi_wl_put_fm_peb(struct ubi_device *ubi, struct ubi_wl_entry *fm_e,
 	spin_unlock(&ubi->wl_lock);
 
 	vol_id = lnum ? UBI_FM_DATA_VOLUME_ID : UBI_FM_SB_VOLUME_ID;
-	return schedule_erase(ubi, e, vol_id, lnum, torture);
+	return schedule_erase(ubi, e, vol_id, lnum, torture, true);
 }
 
 /**
diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index e724a363cef38..c5477299b66b5 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
@@ -1514,22 +1514,30 @@ int ubi_update_fastmap(struct ubi_device *ubi)
 	struct ubi_wl_entry *tmp_e;
 
 	down_write(&ubi->fm_protect);
+	down_write(&ubi->work_sem);
+	down_write(&ubi->fm_eba_sem);
 
 	ubi_refill_pools(ubi);
 
 	if (ubi->ro_mode || ubi->fm_disabled) {
+		up_write(&ubi->fm_eba_sem);
+		up_write(&ubi->work_sem);
 		up_write(&ubi->fm_protect);
 		return 0;
 	}
 
 	ret = ubi_ensure_anchor_pebs(ubi);
 	if (ret) {
+		up_write(&ubi->fm_eba_sem);
+		up_write(&ubi->work_sem);
 		up_write(&ubi->fm_protect);
 		return ret;
 	}
 
 	new_fm = kzalloc(sizeof(*new_fm), GFP_KERNEL);
 	if (!new_fm) {
+		up_write(&ubi->fm_eba_sem);
+		up_write(&ubi->work_sem);
 		up_write(&ubi->fm_protect);
 		return -ENOMEM;
 	}
@@ -1638,16 +1646,14 @@ int ubi_update_fastmap(struct ubi_device *ubi)
 		new_fm->e[0] = tmp_e;
 	}
 
-	down_write(&ubi->work_sem);
-	down_write(&ubi->fm_eba_sem);
 	ret = ubi_write_fastmap(ubi, new_fm);
-	up_write(&ubi->fm_eba_sem);
-	up_write(&ubi->work_sem);
 
 	if (ret)
 		goto err;
 
 out_unlock:
+	up_write(&ubi->fm_eba_sem);
+	up_write(&ubi->work_sem);
 	up_write(&ubi->fm_protect);
 	kfree(old_fm);
 	return ret;
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index 7eb1f3fb16e21..d49e96f94f469 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -580,7 +580,7 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,
  * failure.
  */
 static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,
-			  int vol_id, int lnum, int torture)
+			  int vol_id, int lnum, int torture, bool nested)
 {
 	struct ubi_work *wl_wrk;
 
@@ -599,7 +599,10 @@ static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,
 	wl_wrk->lnum = lnum;
 	wl_wrk->torture = torture;
 
-	schedule_ubi_work(ubi, wl_wrk);
+	if (nested)
+		__schedule_ubi_work(ubi, wl_wrk);
+	else
+		schedule_ubi_work(ubi, wl_wrk);
 	return 0;
 }
 
@@ -658,6 +661,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
 	if (!vid_hdr)
 		return -ENOMEM;
 
+	down_read(&ubi->fm_eba_sem);
 	mutex_lock(&ubi->move_mutex);
 	spin_lock(&ubi->wl_lock);
 	ubi_assert(!ubi->move_from && !ubi->move_to);
@@ -884,6 +888,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
 
 	dbg_wl("done");
 	mutex_unlock(&ubi->move_mutex);
+	up_read(&ubi->fm_eba_sem);
 	return 0;
 
 	/*
@@ -925,6 +930,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
 	}
 
 	mutex_unlock(&ubi->move_mutex);
+	up_read(&ubi->fm_eba_sem);
 	return 0;
 
 out_error:
@@ -946,6 +952,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
 out_ro:
 	ubi_ro_mode(ubi);
 	mutex_unlock(&ubi->move_mutex);
+	up_read(&ubi->fm_eba_sem);
 	ubi_assert(err != 0);
 	return err < 0 ? err : -EIO;
 
@@ -953,6 +960,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,
 	ubi->wl_scheduled = 0;
 	spin_unlock(&ubi->wl_lock);
 	mutex_unlock(&ubi->move_mutex);
+	up_read(&ubi->fm_eba_sem);
 	ubi_free_vid_hdr(ubi, vid_hdr);
 	return 0;
 }
@@ -1075,7 +1083,7 @@ static int __erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk)
 		int err1;
 
 		/* Re-schedule the LEB for erasure */
-		err1 = schedule_erase(ubi, e, vol_id, lnum, 0);
+		err1 = schedule_erase(ubi, e, vol_id, lnum, 0, false);
 		if (err1) {
 			wl_entry_destroy(ubi, e);
 			err = err1;
@@ -1256,7 +1264,7 @@ int ubi_wl_put_peb(struct ubi_device *ubi, int vol_id, int lnum,
 	}
 	spin_unlock(&ubi->wl_lock);
 
-	err = schedule_erase(ubi, e, vol_id, lnum, torture);
+	err = schedule_erase(ubi, e, vol_id, lnum, torture, false);
 	if (err) {
 		spin_lock(&ubi->wl_lock);
 		wl_tree_add(e, &ubi->used);
@@ -1544,7 +1552,7 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 		e->pnum = aeb->pnum;
 		e->ec = aeb->ec;
 		ubi->lookuptbl[e->pnum] = e;
-		if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0)) {
+		if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0, false)) {
 			wl_entry_destroy(ubi, e);
 			goto out_free;
 		}
@@ -1624,7 +1632,7 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 			e->ec = aeb->ec;
 			ubi_assert(!ubi->lookuptbl[e->pnum]);
 			ubi->lookuptbl[e->pnum] = e;
-			if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0)) {
+			if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0, false)) {
 				wl_entry_destroy(ubi, e);
 				goto out_free;
 			}

From 4eb7ee8c2645f74c6559eb6301e6ef806f4efd3e Mon Sep 17 00:00:00 2001
From: Richard Weinberger <richard@nod.at>
Date: Wed, 24 Aug 2016 14:36:15 +0200
Subject: [PATCH 1370/1852] ubi: Fix Fastmap's update_vol()

commit f7d11b33d4e8cedf19367c09b891bbc705163976 upstream.

Usually Fastmap is free to consider every PEB in one of the pools
as newer than the existing PEB. Since PEBs in a pool are by definition
newer than everything else.
But update_vol() missed the case that a pool can contain more than
one candidate.

Cc: <stable@vger.kernel.org>
Fixes: dbb7d2a88d ("UBI: Add fastmap core")
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/fastmap.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index c5477299b66b5..72e89b352034b 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
@@ -326,6 +326,7 @@ static int update_vol(struct ubi_device *ubi, struct ubi_attach_info *ai,
 			aeb->pnum = new_aeb->pnum;
 			aeb->copy_flag = new_vh->copy_flag;
 			aeb->scrub = new_aeb->scrub;
+			aeb->sqnum = new_aeb->sqnum;
 			kmem_cache_free(ai->aeb_slab_cache, new_aeb);
 
 		/* new_aeb is older */

From 59a3d814ed3ac03845e2de97ba7a2b3ee5bb5314 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue, 5 Dec 2017 16:01:20 +0100
Subject: [PATCH 1371/1852] ubi: fastmap: Erase outdated anchor PEBs during
 attach

commit f78e5623f45bab2b726eec29dc5cefbbab2d0b1c upstream.

The fastmap update code might erase the current fastmap anchor PEB
in case it doesn't find any new free PEB. When a power cut happens
in this situation we must not have any outdated fastmap anchor PEB
on the device, because that would be used to attach during next
boot.
The easiest way to make that sure is to erase all outdated fastmap
anchor PEBs synchronously during attach.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Richard Weinberger <richard@nod.at>
Fixes: dbb7d2a88d2a ("UBI: Add fastmap core")
Cc: <stable@vger.kernel.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/ubi/wl.c | 77 ++++++++++++++++++++++++++++++++------------
 1 file changed, 57 insertions(+), 20 deletions(-)

diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index d49e96f94f469..b3c1b8106a684 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -1508,6 +1508,46 @@ static void shutdown_work(struct ubi_device *ubi)
 	}
 }
 
+/**
+ * erase_aeb - erase a PEB given in UBI attach info PEB
+ * @ubi: UBI device description object
+ * @aeb: UBI attach info PEB
+ * @sync: If true, erase synchronously. Otherwise schedule for erasure
+ */
+static int erase_aeb(struct ubi_device *ubi, struct ubi_ainf_peb *aeb, bool sync)
+{
+	struct ubi_wl_entry *e;
+	int err;
+
+	e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);
+	if (!e)
+		return -ENOMEM;
+
+	e->pnum = aeb->pnum;
+	e->ec = aeb->ec;
+	ubi->lookuptbl[e->pnum] = e;
+
+	if (sync) {
+		err = sync_erase(ubi, e, false);
+		if (err)
+			goto out_free;
+
+		wl_tree_add(e, &ubi->free);
+		ubi->free_count++;
+	} else {
+		err = schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0, false);
+		if (err)
+			goto out_free;
+	}
+
+	return 0;
+
+out_free:
+	wl_entry_destroy(ubi, e);
+
+	return err;
+}
+
 /**
  * ubi_wl_init - initialize the WL sub-system using attaching information.
  * @ubi: UBI device description object
@@ -1545,18 +1585,10 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 	list_for_each_entry_safe(aeb, tmp, &ai->erase, u.list) {
 		cond_resched();
 
-		e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);
-		if (!e)
+		err = erase_aeb(ubi, aeb, false);
+		if (err)
 			goto out_free;
 
-		e->pnum = aeb->pnum;
-		e->ec = aeb->ec;
-		ubi->lookuptbl[e->pnum] = e;
-		if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0, false)) {
-			wl_entry_destroy(ubi, e);
-			goto out_free;
-		}
-
 		found_pebs++;
 	}
 
@@ -1615,6 +1647,8 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 			ubi_assert(!ubi->lookuptbl[e->pnum]);
 			ubi->lookuptbl[e->pnum] = e;
 		} else {
+			bool sync = false;
+
 			/*
 			 * Usually old Fastmap PEBs are scheduled for erasure
 			 * and we don't have to care about them but if we face
@@ -1624,18 +1658,21 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
 			if (ubi->lookuptbl[aeb->pnum])
 				continue;
 
-			e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);
-			if (!e)
-				goto out_free;
+			/*
+			 * The fastmap update code might not find a free PEB for
+			 * writing the fastmap anchor to and then reuses the
+			 * current fastmap anchor PEB. When this PEB gets erased
+			 * and a power cut happens before it is written again we
+			 * must make sure that the fastmap attach code doesn't
+			 * find any outdated fastmap anchors, hence we erase the
+			 * outdated fastmap anchor PEBs synchronously here.
+			 */
+			if (aeb->vol_id == UBI_FM_SB_VOLUME_ID)
+				sync = true;
 
-			e->pnum = aeb->pnum;
-			e->ec = aeb->ec;
-			ubi_assert(!ubi->lookuptbl[e->pnum]);
-			ubi->lookuptbl[e->pnum] = e;
-			if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0, false)) {
-				wl_entry_destroy(ubi, e);
+			err = erase_aeb(ubi, aeb, sync);
+			if (err)
 				goto out_free;
-			}
 		}
 
 		found_pebs++;

From a7cd58c68bc8709f3385ea70b59610f66e52993d Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 25 Jul 2018 10:18:33 +0200
Subject: [PATCH 1372/1852] Linux 4.4.144

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ce42b27ec387e..d0dc1b253856f 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 143
+SUBLEVEL = 144
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 3acbb68a6bfc10b61697a1cdc3caf342178d3cc6 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 20 Jul 2018 13:58:21 +0200
Subject: [PATCH 1373/1852] MIPS: ath79: fix register address in
 ath79_ddr_wb_flush()

commit bc88ad2efd11f29e00a4fd60fcd1887abfe76833 upstream.

ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets
need to be a multiple of 4 in order to access the intended register.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
Patchwork: https://patchwork.linux-mips.org/patch/19912/
Cc: Alban Bedel <albeu@free.fr>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 4.2+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/ath79/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
index 8ae4067a5eda2..40ecb6e700cd8 100644
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init);
 
 void ath79_ddr_wb_flush(u32 reg)
 {
-	void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;
+	void __iomem *flush_reg = ath79_ddr_wb_flush_base + (reg * 4);
 
 	/* Flush the DDR write buffer. */
 	__raw_writel(0x1, flush_reg);

From 77e93d6c779ebf6c04ae6a614c0db2e2af023c51 Mon Sep 17 00:00:00 2001
From: Paolo Abeni <pabeni@redhat.com>
Date: Mon, 23 Jul 2018 16:50:48 +0200
Subject: [PATCH 1374/1852] ip: hash fragments consistently

[ Upstream commit 3dd1c9a1270736029ffca670e9bd0265f4120600 ]

The skb hash for locally generated ip[v6] fragments belonging
to the same datagram can vary in several circumstances:
* for connected UDP[v6] sockets, the first fragment get its hash
  via set_owner_w()/skb_set_hash_from_sk()
* for unconnected IPv6 UDPv6 sockets, the first fragment can get
  its hash via ip6_make_flowlabel()/skb_get_hash_flowi6(), if
  auto_flowlabel is enabled

For the following frags the hash is usually computed via
skb_get_hash().
The above can cause OoO for unconnected IPv6 UDPv6 socket: in that
scenario the egress tx queue can be selected on a per packet basis
via the skb hash.
It may also fool flow-oriented schedulers to place fragments belonging
to the same datagram in different flows.

Fix the issue by copying the skb hash from the head frag into
the others at fragmentation time.

Before this commit:
perf probe -a "dev_queue_xmit skb skb->hash skb->l4_hash:b1@0/8 skb->sw_hash:b1@1/8"
netperf -H $IPV4 -t UDP_STREAM -l 5 -- -m 2000 -n &
perf record -e probe:dev_queue_xmit -e probe:skb_set_owner_w -a sleep 0.1
perf script
probe:dev_queue_xmit: (ffffffff8c6b1b20) hash=3713014309 l4_hash=1 sw_hash=0
probe:dev_queue_xmit: (ffffffff8c6b1b20) hash=0 l4_hash=0 sw_hash=0

After this commit:
probe:dev_queue_xmit: (ffffffff8c6b1b20) hash=2171763177 l4_hash=1 sw_hash=0
probe:dev_queue_xmit: (ffffffff8c6b1b20) hash=2171763177 l4_hash=1 sw_hash=0

Fixes: b73c3d0e4f0e ("net: Save TX flow hash in sock and set in skbuf on xmit")
Fixes: 67800f9b1f4e ("ipv6: Call skb_get_hash_flowi6 to get skb->hash in ip6_make_flowlabel")
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_output.c  | 2 ++
 net/ipv6/ip6_output.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index c1d7dc4339760..ac2966f02d078 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -480,6 +480,8 @@ static void ip_copy_metadata(struct sk_buff *to, struct sk_buff *from)
 	to->dev = from->dev;
 	to->mark = from->mark;
 
+	skb_copy_hash(to, from);
+
 	/* Copy the flags to each fragment. */
 	IPCB(to)->flags = IPCB(from)->flags;
 
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 33ffb29dd620e..efe1098f452fd 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -560,6 +560,8 @@ static void ip6_copy_metadata(struct sk_buff *to, struct sk_buff *from)
 	to->dev = from->dev;
 	to->mark = from->mark;
 
+	skb_copy_hash(to, from);
+
 #ifdef CONFIG_NET_SCHED
 	to->tc_index = from->tc_index;
 #endif

From d215f7e0cdd5c00698ecd7362b08402cd9eb62bc Mon Sep 17 00:00:00 2001
From: Jack Morgenstein <jackm@dev.mellanox.co.il>
Date: Tue, 24 Jul 2018 14:27:55 +0300
Subject: [PATCH 1375/1852] net/mlx4_core: Save the qpn from the input modifier
 in RST2INIT wrapper

[ Upstream commit 958c696f5a7274d9447a458ad7aa70719b29a50a ]

Function mlx4_RST2INIT_QP_wrapper saved the qp number passed in the qp
context, rather than the one passed in the input modifier.

However, the qp number in the qp context is not defined as a
required parameter by the FW. Therefore, drivers may choose to not
specify the qp number in the qp context for the reset-to-init transition.

Thus, we must save the qp number passed in the command input modifier --
which is always present. (This saved qp number is used as the input
modifier for command 2RST_QP when a slave's qp's are destroyed).

Fixes: c82e9aa0a8bc ("mlx4_core: resource tracking for HCA resources used by guests")
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/mellanox/mlx4/resource_tracker.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
index e3080fbd9d005..7911dc3da98ef 100644
--- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
+++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
@@ -2891,7 +2891,7 @@ int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave,
 	u32 srqn = qp_get_srqn(qpc) & 0xffffff;
 	int use_srq = (qp_get_srqn(qpc) >> 24) & 1;
 	struct res_srq *srq;
-	int local_qpn = be32_to_cpu(qpc->local_qpn) & 0xffffff;
+	int local_qpn = vhcr->in_modifier & 0xffffff;
 
 	err = adjust_qp_sched_queue(dev, slave, qpc, inbox);
 	if (err)

From 1b8ed5d5531b4f6b91a46193adf9ef3acac442d0 Mon Sep 17 00:00:00 2001
From: Roopa Prabhu <roopa@cumulusnetworks.com>
Date: Fri, 20 Jul 2018 13:21:01 -0700
Subject: [PATCH 1376/1852] rtnetlink: add rtnl_link_state check in
 rtnl_configure_link

[ Upstream commit 5025f7f7d506fba9b39e7fe8ca10f6f34cb9bc2d ]

rtnl_configure_link sets dev->rtnl_link_state to
RTNL_LINK_INITIALIZED and unconditionally calls
__dev_notify_flags to notify user-space of dev flags.

current call sequence for rtnl_configure_link
rtnetlink_newlink
    rtnl_link_ops->newlink
    rtnl_configure_link (unconditionally notifies userspace of
                         default and new dev flags)

If a newlink handler wants to call rtnl_configure_link
early, we will end up with duplicate notifications to
user-space.

This patch fixes rtnl_configure_link to check rtnl_link_state
and call __dev_notify_flags with gchanges = 0 if already
RTNL_LINK_INITIALIZED.

Later in the series, this patch will help the following sequence
where a driver implementing newlink can call rtnl_configure_link
to initialize the link early.

makes the following call sequence work:
rtnetlink_newlink
    rtnl_link_ops->newlink (vxlan) -> rtnl_configure_link (initializes
                                                link and notifies
                                                user-space of default
                                                dev flags)
    rtnl_configure_link (updates dev flags if requested by user ifm
                         and notifies user-space of new dev flags)

Signed-off-by: Roopa Prabhu <roopa@cumulusnetworks.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/rtnetlink.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 2017ffa5197a9..96c9c0f0905aa 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -2087,9 +2087,12 @@ int rtnl_configure_link(struct net_device *dev, const struct ifinfomsg *ifm)
 			return err;
 	}
 
-	dev->rtnl_link_state = RTNL_LINK_INITIALIZED;
-
-	__dev_notify_flags(dev, old_flags, ~0U);
+	if (dev->rtnl_link_state == RTNL_LINK_INITIALIZED) {
+		__dev_notify_flags(dev, old_flags, 0U);
+	} else {
+		dev->rtnl_link_state = RTNL_LINK_INITIALIZED;
+		__dev_notify_flags(dev, old_flags, ~0U);
+	}
 	return 0;
 }
 EXPORT_SYMBOL(rtnl_configure_link);

From 1b5aad1443bbd940411310c272c370687aa30a4c Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Thu, 12 Jul 2018 06:04:52 -0700
Subject: [PATCH 1377/1852] tcp: fix dctcp delayed ACK schedule

[ Upstream commit b0c05d0e99d98d7f0cd41efc1eeec94efdc3325d ]

Previously, when a data segment was sent an ACK was piggybacked
on the data segment without generating a CA_EVENT_NON_DELAYED_ACK
event to notify congestion control modules. So the DCTCP
ca->delayed_ack_reserved flag could incorrectly stay set when
in fact there were no delayed ACKs being reserved. This could result
in sending a special ECN notification ACK that carries an older
ACK sequence, when in fact there was no need for such an ACK.
DCTCP keeps track of the delayed ACK status with its own separate
state ca->delayed_ack_reserved. Previously it may accidentally cancel
the delayed ACK without updating this field upon sending a special
ACK that carries a older ACK sequence. This inconsistency would
lead to DCTCP receiver never acknowledging the latest data until the
sender times out and retry in some cases.

Packetdrill script (provided by Larry Brakmo)

0.000 socket(..., SOCK_STREAM, IPPROTO_TCP) = 3
0.000 setsockopt(3, SOL_SOCKET, SO_REUSEADDR, [1], 4) = 0
0.000 setsockopt(3, SOL_TCP, TCP_CONGESTION, "dctcp", 5) = 0
0.000 bind(3, ..., ...) = 0
0.000 listen(3, 1) = 0

0.100 < [ect0] SEW 0:0(0) win 32792 <mss 1000,sackOK,nop,nop,nop,wscale 7>
0.100 > SE. 0:0(0) ack 1 <mss 1460,nop,nop,sackOK,nop,wscale 8>
0.110 < [ect0] . 1:1(0) ack 1 win 257
0.200 accept(3, ..., ...) = 4

0.200 < [ect0] . 1:1001(1000) ack 1 win 257
0.200 > [ect01] . 1:1(0) ack 1001

0.200 write(4, ..., 1) = 1
0.200 > [ect01] P. 1:2(1) ack 1001

0.200 < [ect0] . 1001:2001(1000) ack 2 win 257
0.200 write(4, ..., 1) = 1
0.200 > [ect01] P. 2:3(1) ack 2001

0.200 < [ect0] . 2001:3001(1000) ack 3 win 257
0.200 < [ect0] . 3001:4001(1000) ack 3 win 257
0.200 > [ect01] . 3:3(0) ack 4001

0.210 < [ce] P. 4001:4501(500) ack 3 win 257

+0.001 read(4, ..., 4500) = 4500
+0 write(4, ..., 1) = 1
+0 > [ect01] PE. 3:4(1) ack 4501

+0.010 < [ect0] W. 4501:5501(1000) ack 4 win 257
// Previously the ACK sequence below would be 4501, causing a long RTO
+0.040~+0.045 > [ect01] . 4:4(0) ack 5501   // delayed ack

+0.311 < [ect0] . 5501:6501(1000) ack 4 win 257  // More data
+0 > [ect01] . 4:4(0) ack 6501     // now acks everything

+0.500 < F. 9501:9501(0) ack 4 win 257

Reported-by: Larry Brakmo <brakmo@fb.com>
Signed-off-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Acked-by: Lawrence Brakmo <brakmo@fb.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_dctcp.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp_dctcp.c b/net/ipv4/tcp_dctcp.c
index 55d7da1d2ce99..e772679a5dedc 100644
--- a/net/ipv4/tcp_dctcp.c
+++ b/net/ipv4/tcp_dctcp.c
@@ -134,7 +134,8 @@ static void dctcp_ce_state_0_to_1(struct sock *sk)
 	/* State has changed from CE=0 to CE=1 and delayed
 	 * ACK has not sent yet.
 	 */
-	if (!ca->ce_state && ca->delayed_ack_reserved) {
+	if (!ca->ce_state &&
+	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER) {
 		u32 tmp_rcv_nxt;
 
 		/* Save current rcv_nxt. */
@@ -164,7 +165,8 @@ static void dctcp_ce_state_1_to_0(struct sock *sk)
 	/* State has changed from CE=1 to CE=0 and delayed
 	 * ACK has not sent yet.
 	 */
-	if (ca->ce_state && ca->delayed_ack_reserved) {
+	if (ca->ce_state &&
+	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER) {
 		u32 tmp_rcv_nxt;
 
 		/* Save current rcv_nxt. */

From ca3d8460fbf9e2acc4da0cceda4e8a522f642e0f Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Wed, 18 Jul 2018 13:56:34 -0700
Subject: [PATCH 1378/1852] tcp: helpers to send special DCTCP ack

[ Upstream commit 2987babb6982306509380fc11b450227a844493b ]

Refactor and create helpers to send the special ACK in DCTCP.

Signed-off-by: Yuchung Cheng <ycheng@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_output.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index e490c9a290346..88d2f585f733a 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -901,8 +901,8 @@ void tcp_wfree(struct sk_buff *skb)
  * We are working here with either a clone of the original
  * SKB, or a fresh unique copy made by the retransmit engine.
  */
-static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
-			    gfp_t gfp_mask)
+static int __tcp_transmit_skb(struct sock *sk, struct sk_buff *skb,
+			      int clone_it, gfp_t gfp_mask, u32 rcv_nxt)
 {
 	const struct inet_connection_sock *icsk = inet_csk(sk);
 	struct inet_sock *inet;
@@ -962,7 +962,7 @@ static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
 	th->source		= inet->inet_sport;
 	th->dest		= inet->inet_dport;
 	th->seq			= htonl(tcb->seq);
-	th->ack_seq		= htonl(tp->rcv_nxt);
+	th->ack_seq		= htonl(rcv_nxt);
 	*(((__be16 *)th) + 6)	= htons(((tcp_header_size >> 2) << 12) |
 					tcb->tcp_flags);
 
@@ -1036,6 +1036,13 @@ static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
 	return net_xmit_eval(err);
 }
 
+static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
+			    gfp_t gfp_mask)
+{
+	return __tcp_transmit_skb(sk, skb, clone_it, gfp_mask,
+				  tcp_sk(sk)->rcv_nxt);
+}
+
 /* This routine just queues the buffer for sending.
  *
  * NOTE: probe0 timer is not checked, do not forget tcp_push_pending_frames,
@@ -3354,7 +3361,7 @@ void tcp_send_delayed_ack(struct sock *sk)
 }
 
 /* This routine sends an ack and also updates the window. */
-void tcp_send_ack(struct sock *sk)
+void __tcp_send_ack(struct sock *sk, u32 rcv_nxt)
 {
 	struct sk_buff *buff;
 
@@ -3391,7 +3398,12 @@ void tcp_send_ack(struct sock *sk)
 
 	/* Send it off, this clears delayed acks for us. */
 	skb_mstamp_get(&buff->skb_mstamp);
-	tcp_transmit_skb(sk, buff, 0, sk_gfp_atomic(sk, GFP_ATOMIC));
+	__tcp_transmit_skb(sk, buff, 0, sk_gfp_atomic(sk, GFP_ATOMIC), rcv_nxt);
+}
+
+void tcp_send_ack(struct sock *sk)
+{
+	__tcp_send_ack(sk, tcp_sk(sk)->rcv_nxt);
 }
 EXPORT_SYMBOL_GPL(tcp_send_ack);
 

From 9c04a880c4666ff304188aadc206b1ad3c856f3d Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Wed, 18 Jul 2018 13:56:35 -0700
Subject: [PATCH 1379/1852] tcp: do not cancel delay-AcK on DCTCP special ACK

[ Upstream commit 27cde44a259c380a3c09066fc4b42de7dde9b1ad ]

Currently when a DCTCP receiver delays an ACK and receive a
data packet with a different CE mark from the previous one's, it
sends two immediate ACKs acking previous and latest sequences
respectly (for ECN accounting).

Previously sending the first ACK may mark off the delayed ACK timer
(tcp_event_ack_sent). This may subsequently prevent sending the
second ACK to acknowledge the latest sequence (tcp_ack_snd_check).
The culprit is that tcp_send_ack() assumes it always acknowleges
the latest sequence, which is not true for the first special ACK.

The fix is to not make the assumption in tcp_send_ack and check the
actual ack sequence before cancelling the delayed ACK. Further it's
safer to pass the ack sequence number as a local variable into
tcp_send_ack routine, instead of intercepting tp->rcv_nxt to avoid
future bugs like this.

Reported-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Yuchung Cheng <ycheng@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/tcp.h     |  1 +
 net/ipv4/tcp_dctcp.c  | 34 ++++------------------------------
 net/ipv4/tcp_output.c | 11 ++++++++---
 3 files changed, 13 insertions(+), 33 deletions(-)

diff --git a/include/net/tcp.h b/include/net/tcp.h
index a435427ae43a7..19ad86e27b7b0 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -560,6 +560,7 @@ void tcp_send_fin(struct sock *sk);
 void tcp_send_active_reset(struct sock *sk, gfp_t priority);
 int tcp_send_synack(struct sock *);
 void tcp_push_one(struct sock *, unsigned int mss_now);
+void __tcp_send_ack(struct sock *sk, u32 rcv_nxt);
 void tcp_send_ack(struct sock *sk);
 void tcp_send_delayed_ack(struct sock *sk);
 void tcp_send_loss_probe(struct sock *sk);
diff --git a/net/ipv4/tcp_dctcp.c b/net/ipv4/tcp_dctcp.c
index e772679a5dedc..c48badee1cfa6 100644
--- a/net/ipv4/tcp_dctcp.c
+++ b/net/ipv4/tcp_dctcp.c
@@ -135,21 +135,8 @@ static void dctcp_ce_state_0_to_1(struct sock *sk)
 	 * ACK has not sent yet.
 	 */
 	if (!ca->ce_state &&
-	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER) {
-		u32 tmp_rcv_nxt;
-
-		/* Save current rcv_nxt. */
-		tmp_rcv_nxt = tp->rcv_nxt;
-
-		/* Generate previous ack with CE=0. */
-		tp->ecn_flags &= ~TCP_ECN_DEMAND_CWR;
-		tp->rcv_nxt = ca->prior_rcv_nxt;
-
-		tcp_send_ack(sk);
-
-		/* Recover current rcv_nxt. */
-		tp->rcv_nxt = tmp_rcv_nxt;
-	}
+	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
+		__tcp_send_ack(sk, ca->prior_rcv_nxt);
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
 	ca->ce_state = 1;
@@ -166,21 +153,8 @@ static void dctcp_ce_state_1_to_0(struct sock *sk)
 	 * ACK has not sent yet.
 	 */
 	if (ca->ce_state &&
-	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER) {
-		u32 tmp_rcv_nxt;
-
-		/* Save current rcv_nxt. */
-		tmp_rcv_nxt = tp->rcv_nxt;
-
-		/* Generate previous ack with CE=1. */
-		tp->ecn_flags |= TCP_ECN_DEMAND_CWR;
-		tp->rcv_nxt = ca->prior_rcv_nxt;
-
-		tcp_send_ack(sk);
-
-		/* Recover current rcv_nxt. */
-		tp->rcv_nxt = tmp_rcv_nxt;
-	}
+	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
+		__tcp_send_ack(sk, ca->prior_rcv_nxt);
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
 	ca->ce_state = 0;
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 88d2f585f733a..b7c333c7de8bd 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -177,8 +177,13 @@ static void tcp_event_data_sent(struct tcp_sock *tp,
 }
 
 /* Account for an ACK we sent. */
-static inline void tcp_event_ack_sent(struct sock *sk, unsigned int pkts)
+static inline void tcp_event_ack_sent(struct sock *sk, unsigned int pkts,
+				      u32 rcv_nxt)
 {
+	struct tcp_sock *tp = tcp_sk(sk);
+
+	if (unlikely(rcv_nxt != tp->rcv_nxt))
+		return;  /* Special ACK sent by DCTCP to reflect ECN */
 	tcp_dec_quickack_mode(sk, pkts);
 	inet_csk_clear_xmit_timer(sk, ICSK_TIME_DACK);
 }
@@ -1005,7 +1010,7 @@ static int __tcp_transmit_skb(struct sock *sk, struct sk_buff *skb,
 	icsk->icsk_af_ops->send_check(sk, skb);
 
 	if (likely(tcb->tcp_flags & TCPHDR_ACK))
-		tcp_event_ack_sent(sk, tcp_skb_pcount(skb));
+		tcp_event_ack_sent(sk, tcp_skb_pcount(skb), rcv_nxt);
 
 	if (skb->len != tcp_header_size)
 		tcp_event_data_sent(tp, sk);
@@ -3400,12 +3405,12 @@ void __tcp_send_ack(struct sock *sk, u32 rcv_nxt)
 	skb_mstamp_get(&buff->skb_mstamp);
 	__tcp_transmit_skb(sk, buff, 0, sk_gfp_atomic(sk, GFP_ATOMIC), rcv_nxt);
 }
+EXPORT_SYMBOL_GPL(__tcp_send_ack);
 
 void tcp_send_ack(struct sock *sk)
 {
 	__tcp_send_ack(sk, tcp_sk(sk)->rcv_nxt);
 }
-EXPORT_SYMBOL_GPL(tcp_send_ack);
 
 /* This routine sends a packet with an out of date sequence
  * number. It assumes the other end will try to ack it.

From 4c0d718edcf54d88a92cd17521ad8b3af30c7c67 Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Wed, 18 Jul 2018 13:56:36 -0700
Subject: [PATCH 1380/1852] tcp: do not delay ACK in DCTCP upon CE status
 change

[ Upstream commit a0496ef2c23b3b180902dd185d0d63ccbc624cf8 ]

Per DCTCP RFC8257 (Section 3.2) the ACK reflecting the CE status change
has to be sent immediately so the sender can respond quickly:

""" When receiving packets, the CE codepoint MUST be processed as follows:

   1.  If the CE codepoint is set and DCTCP.CE is false, set DCTCP.CE to
       true and send an immediate ACK.

   2.  If the CE codepoint is not set and DCTCP.CE is true, set DCTCP.CE
       to false and send an immediate ACK.
"""

Previously DCTCP implementation may continue to delay the ACK. This
patch fixes that to implement the RFC by forcing an immediate ACK.

Tested with this packetdrill script provided by Larry Brakmo

0.000 socket(..., SOCK_STREAM, IPPROTO_TCP) = 3
0.000 setsockopt(3, SOL_SOCKET, SO_REUSEADDR, [1], 4) = 0
0.000 setsockopt(3, SOL_TCP, TCP_CONGESTION, "dctcp", 5) = 0
0.000 bind(3, ..., ...) = 0
0.000 listen(3, 1) = 0

0.100 < [ect0] SEW 0:0(0) win 32792 <mss 1000,sackOK,nop,nop,nop,wscale 7>
0.100 > SE. 0:0(0) ack 1 <mss 1460,nop,nop,sackOK,nop,wscale 8>
0.110 < [ect0] . 1:1(0) ack 1 win 257
0.200 accept(3, ..., ...) = 4
   +0 setsockopt(4, SOL_SOCKET, SO_DEBUG, [1], 4) = 0

0.200 < [ect0] . 1:1001(1000) ack 1 win 257
0.200 > [ect01] . 1:1(0) ack 1001

0.200 write(4, ..., 1) = 1
0.200 > [ect01] P. 1:2(1) ack 1001

0.200 < [ect0] . 1001:2001(1000) ack 2 win 257
+0.005 < [ce] . 2001:3001(1000) ack 2 win 257

+0.000 > [ect01] . 2:2(0) ack 2001
// Previously the ACK below would be delayed by 40ms
+0.000 > [ect01] E. 2:2(0) ack 3001

+0.500 < F. 9501:9501(0) ack 4 win 257

Signed-off-by: Yuchung Cheng <ycheng@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/tcp.h    |  1 +
 net/ipv4/tcp_dctcp.c | 30 ++++++++++++++++++------------
 net/ipv4/tcp_input.c |  3 ++-
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/include/net/tcp.h b/include/net/tcp.h
index 19ad86e27b7b0..1fe9d266981d4 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -377,6 +377,7 @@ ssize_t tcp_splice_read(struct socket *sk, loff_t *ppos,
 			struct pipe_inode_info *pipe, size_t len,
 			unsigned int flags);
 
+void tcp_enter_quickack_mode(struct sock *sk);
 static inline void tcp_dec_quickack_mode(struct sock *sk,
 					 const unsigned int pkts)
 {
diff --git a/net/ipv4/tcp_dctcp.c b/net/ipv4/tcp_dctcp.c
index c48badee1cfa6..e63b764e55ea5 100644
--- a/net/ipv4/tcp_dctcp.c
+++ b/net/ipv4/tcp_dctcp.c
@@ -131,12 +131,15 @@ static void dctcp_ce_state_0_to_1(struct sock *sk)
 	struct dctcp *ca = inet_csk_ca(sk);
 	struct tcp_sock *tp = tcp_sk(sk);
 
-	/* State has changed from CE=0 to CE=1 and delayed
-	 * ACK has not sent yet.
-	 */
-	if (!ca->ce_state &&
-	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
-		__tcp_send_ack(sk, ca->prior_rcv_nxt);
+	if (!ca->ce_state) {
+		/* State has changed from CE=0 to CE=1, force an immediate
+		 * ACK to reflect the new CE state. If an ACK was delayed,
+		 * send that first to reflect the prior CE state.
+		 */
+		if (inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
+			__tcp_send_ack(sk, ca->prior_rcv_nxt);
+		tcp_enter_quickack_mode(sk);
+	}
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
 	ca->ce_state = 1;
@@ -149,12 +152,15 @@ static void dctcp_ce_state_1_to_0(struct sock *sk)
 	struct dctcp *ca = inet_csk_ca(sk);
 	struct tcp_sock *tp = tcp_sk(sk);
 
-	/* State has changed from CE=1 to CE=0 and delayed
-	 * ACK has not sent yet.
-	 */
-	if (ca->ce_state &&
-	    inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
-		__tcp_send_ack(sk, ca->prior_rcv_nxt);
+	if (ca->ce_state) {
+		/* State has changed from CE=1 to CE=0, force an immediate
+		 * ACK to reflect the new CE state. If an ACK was delayed,
+		 * send that first to reflect the prior CE state.
+		 */
+		if (inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
+			__tcp_send_ack(sk, ca->prior_rcv_nxt);
+		tcp_enter_quickack_mode(sk);
+	}
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
 	ca->ce_state = 0;
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 07d9ab58d7fb0..979886cf5cdf8 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -188,13 +188,14 @@ static void tcp_incr_quickack(struct sock *sk)
 		icsk->icsk_ack.quick = min(quickacks, TCP_MAX_QUICKACKS);
 }
 
-static void tcp_enter_quickack_mode(struct sock *sk)
+void tcp_enter_quickack_mode(struct sock *sk)
 {
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	tcp_incr_quickack(sk);
 	icsk->icsk_ack.pingpong = 0;
 	icsk->icsk_ack.ato = TCP_ATO_MIN;
 }
+EXPORT_SYMBOL(tcp_enter_quickack_mode);
 
 /* Send ACKs quickly, if "quick" count is not exhausted
  * and the session is not interactive.

From d56f74ea07dd8d30efe1e4864bd1f0729397ff3e Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 23 Jul 2018 09:28:18 -0700
Subject: [PATCH 1381/1852] tcp: avoid collapses in tcp_prune_queue() if
 possible

[ Upstream commit f4a3313d8e2ca9fd8d8f45e40a2903ba782607e7 ]

Right after a TCP flow is created, receiving tiny out of order
packets allways hit the condition :

if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf)
	tcp_clamp_window(sk);

tcp_clamp_window() increases sk_rcvbuf to match sk_rmem_alloc
(guarded by tcp_rmem[2])

Calling tcp_collapse_ofo_queue() in this case is not useful,
and offers a O(N^2) surface attack to malicious peers.

Better not attempt anything before full queue capacity is reached,
forcing attacker to spend lots of resource and allow us to more
easily detect the abuse.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 979886cf5cdf8..5712e200abcb5 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4876,6 +4876,9 @@ static int tcp_prune_queue(struct sock *sk)
 	else if (tcp_under_memory_pressure(sk))
 		tp->rcv_ssthresh = min(tp->rcv_ssthresh, 4U * tp->advmss);
 
+	if (atomic_read(&sk->sk_rmem_alloc) <= sk->sk_rcvbuf)
+		return 0;
+
 	tcp_collapse_ofo_queue(sk);
 	if (!skb_queue_empty(&sk->sk_receive_queue))
 		tcp_collapse(sk, &sk->sk_receive_queue,

From 67b26b3f7b1fba42067fcb609f781ac72400df7b Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 23 Jul 2018 09:28:19 -0700
Subject: [PATCH 1382/1852] tcp: detect malicious patterns in
 tcp_collapse_ofo_queue()

[ Upstream commit 3d4bf93ac12003f9b8e1e2de37fe27983deebdcf ]

In case an attacker feeds tiny packets completely out of order,
tcp_collapse_ofo_queue() might scan the whole rb-tree, performing
expensive copies, but not changing socket memory usage at all.

1) Do not attempt to collapse tiny skbs.
2) Add logic to exit early when too many tiny skbs are detected.

We prefer not doing aggressive collapsing (which copies packets)
for pathological flows, and revert to tcp_prune_ofo_queue() which
will be less expensive.

In the future, we might add the possibility of terminating flows
that are proven to be malicious.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 5712e200abcb5..cdc8f941c72c5 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4790,6 +4790,7 @@ tcp_collapse(struct sock *sk, struct sk_buff_head *list,
 static void tcp_collapse_ofo_queue(struct sock *sk)
 {
 	struct tcp_sock *tp = tcp_sk(sk);
+	u32 range_truesize, sum_tiny = 0;
 	struct sk_buff *skb = skb_peek(&tp->out_of_order_queue);
 	struct sk_buff *head;
 	u32 start, end;
@@ -4799,6 +4800,7 @@ static void tcp_collapse_ofo_queue(struct sock *sk)
 
 	start = TCP_SKB_CB(skb)->seq;
 	end = TCP_SKB_CB(skb)->end_seq;
+	range_truesize = skb->truesize;
 	head = skb;
 
 	for (;;) {
@@ -4813,14 +4815,24 @@ static void tcp_collapse_ofo_queue(struct sock *sk)
 		if (!skb ||
 		    after(TCP_SKB_CB(skb)->seq, end) ||
 		    before(TCP_SKB_CB(skb)->end_seq, start)) {
-			tcp_collapse(sk, &tp->out_of_order_queue,
-				     head, skb, start, end);
+			/* Do not attempt collapsing tiny skbs */
+			if (range_truesize != head->truesize ||
+			    end - start >= SKB_WITH_OVERHEAD(SK_MEM_QUANTUM)) {
+				tcp_collapse(sk, &tp->out_of_order_queue,
+					     head, skb, start, end);
+			} else {
+				sum_tiny += range_truesize;
+				if (sum_tiny > sk->sk_rcvbuf >> 3)
+					return;
+			}
+
 			head = skb;
 			if (!skb)
 				break;
 			/* Start new segment */
 			start = TCP_SKB_CB(skb)->seq;
 			end = TCP_SKB_CB(skb)->end_seq;
+			range_truesize = skb->truesize;
 		} else {
 			if (before(TCP_SKB_CB(skb)->seq, start))
 				start = TCP_SKB_CB(skb)->seq;

From 189cd3085d4e4a9373049ca01547fad80062f375 Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Mon, 23 Jul 2018 19:36:48 -0400
Subject: [PATCH 1383/1852] ip: in cmsg IP(V6)_ORIGDSTADDR call pskb_may_pull

[ Upstream commit 2efd4fca703a6707cad16ab486eaab8fc7f0fd49 ]

Syzbot reported a read beyond the end of the skb head when returning
IPV6_ORIGDSTADDR:

  BUG: KMSAN: kernel-infoleak in put_cmsg+0x5ef/0x860 net/core/scm.c:242
  CPU: 0 PID: 4501 Comm: syz-executor128 Not tainted 4.17.0+ #9
  Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS
  Google 01/01/2011
  Call Trace:
    __dump_stack lib/dump_stack.c:77 [inline]
    dump_stack+0x185/0x1d0 lib/dump_stack.c:113
    kmsan_report+0x188/0x2a0 mm/kmsan/kmsan.c:1125
    kmsan_internal_check_memory+0x138/0x1f0 mm/kmsan/kmsan.c:1219
    kmsan_copy_to_user+0x7a/0x160 mm/kmsan/kmsan.c:1261
    copy_to_user include/linux/uaccess.h:184 [inline]
    put_cmsg+0x5ef/0x860 net/core/scm.c:242
    ip6_datagram_recv_specific_ctl+0x1cf3/0x1eb0 net/ipv6/datagram.c:719
    ip6_datagram_recv_ctl+0x41c/0x450 net/ipv6/datagram.c:733
    rawv6_recvmsg+0x10fb/0x1460 net/ipv6/raw.c:521
    [..]

This logic and its ipv4 counterpart read the destination port from
the packet at skb_transport_offset(skb) + 4.

With MSG_MORE and a local SOCK_RAW sender, syzbot was able to cook a
packet that stores headers exactly up to skb_transport_offset(skb) in
the head and the remainder in a frag.

Call pskb_may_pull before accessing the pointer to ensure that it lies
in skb head.

Link: http://lkml.kernel.org/r/CAF=yD-LEJwZj5a1-bAAj2Oy_hKmGygV6rsJ_WOrAYnv-fnayiQ@mail.gmail.com
Reported-by: syzbot+9adb4b567003cac781f0@syzkaller.appspotmail.com
Signed-off-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ip_sockglue.c | 7 +++++--
 net/ipv6/datagram.c    | 7 +++++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index ce9a7fbb7c5fc..88426a6a7a85d 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -135,15 +135,18 @@ static void ip_cmsg_recv_dstaddr(struct msghdr *msg, struct sk_buff *skb)
 {
 	struct sockaddr_in sin;
 	const struct iphdr *iph = ip_hdr(skb);
-	__be16 *ports = (__be16 *)skb_transport_header(skb);
+	__be16 *ports;
+	int end;
 
-	if (skb_transport_offset(skb) + 4 > skb->len)
+	end = skb_transport_offset(skb) + 4;
+	if (end > 0 && !pskb_may_pull(skb, end))
 		return;
 
 	/* All current transport protocols have the port numbers in the
 	 * first four bytes of the transport header and this function is
 	 * written with this assumption in mind.
 	 */
+	ports = (__be16 *)skb_transport_header(skb);
 
 	sin.sin_family = AF_INET;
 	sin.sin_addr.s_addr = iph->daddr;
diff --git a/net/ipv6/datagram.c b/net/ipv6/datagram.c
index 56528e9f3e017..fc69e03451a7b 100644
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -658,13 +658,16 @@ void ip6_datagram_recv_specific_ctl(struct sock *sk, struct msghdr *msg,
 	}
 	if (np->rxopt.bits.rxorigdstaddr) {
 		struct sockaddr_in6 sin6;
-		__be16 *ports = (__be16 *) skb_transport_header(skb);
+		__be16 *ports;
+		int end;
 
-		if (skb_transport_offset(skb) + 4 <= skb->len) {
+		end = skb_transport_offset(skb) + 4;
+		if (end <= 0 || pskb_may_pull(skb, end)) {
 			/* All current transport protocols have the port numbers in the
 			 * first four bytes of the transport header and this function is
 			 * written with this assumption in mind.
 			 */
+			ports = (__be16 *)skb_transport_header(skb);
 
 			sin6.sin6_family = AF_INET6;
 			sin6.sin6_addr = ipv6_hdr(skb)->daddr;

From 31b3023294ed017921b833820bfa2991928d82da Mon Sep 17 00:00:00 2001
From: Lubomir Rintel <lkundrak@v3.sk>
Date: Tue, 10 Jul 2018 08:28:49 +0200
Subject: [PATCH 1384/1852] usb: cdc_acm: Add quirk for Castles VEGA3000

commit 1445cbe476fc3dd09c0b380b206526a49403c071 upstream.

The device (a POS terminal) implements CDC ACM, but has not union
descriptor.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Oliver Neukum <oneukum@suse.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/class/cdc-acm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 7ed30d0b5273f..a501f3ba6a3f4 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -1771,6 +1771,9 @@ static const struct usb_device_id acm_ids[] = {
 	{ USB_DEVICE(0x09d8, 0x0320), /* Elatec GmbH TWN3 */
 	.driver_info = NO_UNION_NORMAL, /* has misplaced union descriptor */
 	},
+	{ USB_DEVICE(0x0ca6, 0xa050), /* Castles VEGA3000 */
+	.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
+	},
 
 	{ USB_DEVICE(0x2912, 0x0001), /* ATOL FPrint */
 	.driver_info = CLEAR_HALT_CONDITIONS,

From 911a7bd44a1b3df2695f78b3c377bf45d21ea440 Mon Sep 17 00:00:00 2001
From: Bin Liu <b-liu@ti.com>
Date: Thu, 19 Jul 2018 14:39:37 -0500
Subject: [PATCH 1385/1852] usb: core: handle hub C_PORT_OVER_CURRENT condition

commit 249a32b7eeb3edb6897dd38f89651a62163ac4ed upstream.

Based on USB2.0 Spec Section 11.12.5,

  "If a hub has per-port power switching and per-port current limiting,
  an over-current on one port may still cause the power on another port
  to fall below specific minimums. In this case, the affected port is
  placed in the Power-Off state and C_PORT_OVER_CURRENT is set for the
  port, but PORT_OVER_CURRENT is not set."

so let's check C_PORT_OVER_CURRENT too for over current condition.

Fixes: 08d1dec6f405 ("usb:hub set hub->change_bits when over-current happens")
Cc: <stable@vger.kernel.org>
Tested-by: Alessandro Antenucci <antenucci@korg.it>
Signed-off-by: Bin Liu <b-liu@ti.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/core/hub.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index f20524695839f..11be8ae93ff41 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1123,10 +1123,14 @@ static void hub_activate(struct usb_hub *hub, enum hub_activation_type type)
 
 		if (!udev || udev->state == USB_STATE_NOTATTACHED) {
 			/* Tell hub_wq to disconnect the device or
-			 * check for a new connection
+			 * check for a new connection or over current condition.
+			 * Based on USB2.0 Spec Section 11.12.5,
+			 * C_PORT_OVER_CURRENT could be set while
+			 * PORT_OVER_CURRENT is not. So check for any of them.
 			 */
 			if (udev || (portstatus & USB_PORT_STAT_CONNECTION) ||
-			    (portstatus & USB_PORT_STAT_OVERCURRENT))
+			    (portstatus & USB_PORT_STAT_OVERCURRENT) ||
+			    (portchange & USB_PORT_STAT_C_OVERCURRENT))
 				set_bit(port1, hub->change_bits);
 
 		} else if (portstatus & USB_PORT_STAT_ENABLE) {

From 3cffeef21c5285b9331877f121d32d7c89dd9b8b Mon Sep 17 00:00:00 2001
From: Jerry Zhang <zhangjerry@google.com>
Date: Mon, 2 Jul 2018 12:48:08 -0700
Subject: [PATCH 1386/1852] usb: gadget: f_fs: Only return delayed status when
 len is 0

commit 4d644abf25698362bd33d17c9ddc8f7122c30f17 upstream.

Commit 1b9ba000 ("Allow function drivers to pause control
transfers") states that USB_GADGET_DELAYED_STATUS is only
supported if data phase is 0 bytes.

It seems that when the length is not 0 bytes, there is no
need to explicitly delay the data stage since the transfer
is not completed until the user responds. However, when the
length is 0, there is no data stage and the transfer is
finished once setup() returns, hence there is a need to
explicitly delay completion.

This manifests as the following bugs:

Prior to 946ef68ad4e4 ('Let setup() return
USB_GADGET_DELAYED_STATUS'), when setup is 0 bytes, ffs
would require user to queue a 0 byte request in order to
clear setup state. However, that 0 byte request was actually
not needed and would hang and cause errors in other setup
requests.

After the above commit, 0 byte setups work since the gadget
now accepts empty queues to ep0 to clear the delay, but all
other setups hang.

Fixes: 946ef68ad4e4 ("Let setup() return USB_GADGET_DELAYED_STATUS")
Signed-off-by: Jerry Zhang <zhangjerry@google.com>
Cc: stable <stable@vger.kernel.org>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/function/f_fs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index 6e16fc66498f9..c04260752f21f 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -3024,7 +3024,7 @@ static int ffs_func_setup(struct usb_function *f,
 	__ffs_event_add(ffs, FUNCTIONFS_SETUP);
 	spin_unlock_irqrestore(&ffs->ev.waitq.lock, flags);
 
-	return USB_GADGET_DELAYED_STATUS;
+	return creq->wLength == 0 ? USB_GADGET_DELAYED_STATUS : 0;
 }
 
 static void ffs_func_suspend(struct usb_function *f)

From 55a96109369f7b2ee06bc9ee198854ec485936b4 Mon Sep 17 00:00:00 2001
From: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Date: Tue, 10 Jul 2018 14:51:33 +0200
Subject: [PATCH 1387/1852] driver core: Partially revert "driver core: correct
 device's shutdown order"

commit 722e5f2b1eec7de61117b7c0a7914761e3da2eda upstream.

Commit 52cdbdd49853 (driver core: correct device's shutdown order)
introduced a regression by breaking device shutdown on some systems.

Namely, the devices_kset_move_last() call in really_probe() added by
that commit is a mistake as it may cause parents to follow children
in the devices_kset list which then causes shutdown to fail.  For
example, if a device has children before really_probe() is called
for it (which is not uncommon), that call will cause it to be
reordered after the children in the devices_kset list and the
ordering of that list will not reflect the correct device shutdown
order any more.

Also it causes the devices_kset list to be constantly reordered
until all drivers have been probed which is totally pointless
overhead in the majority of cases and it only covered an issue
with system shutdown, while system-wide suspend/resume potentially
had the same issue on the affected platforms (which was not covered).

Moreover, the shutdown issue originally addressed by the change in
really_probe() made by commit 52cdbdd49853 is not present in 4.18-rc
any more, since dra7 started to use the sdhci-omap driver which
doesn't disable any regulators during shutdown, so the really_probe()
part of commit 52cdbdd49853 can be safely reverted.  [The original
issue was related to the omap_hsmmc driver used by dra7 previously.]

For the above reasons, revert the really_probe() modifications made
by commit 52cdbdd49853.

The other code changes made by commit 52cdbdd49853 are useful and
they need not be reverted.

Fixes: 52cdbdd49853 (driver core: correct device's shutdown order)
Link: https://lore.kernel.org/lkml/CAFgQCTt7VfqM=UyCnvNFxrSw8Z6cUtAi3HUwR4_xPAc03SgHjQ@mail.gmail.com/
Reported-by: Pingfan Liu <kernelfans@gmail.com>
Tested-by: Pingfan Liu <kernelfans@gmail.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/base/dd.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 9e425fbf83cbe..d8887413dcffa 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -306,14 +306,6 @@ static int really_probe(struct device *dev, struct device_driver *drv)
 			goto probe_failed;
 	}
 
-	/*
-	 * Ensure devices are listed in devices_kset in correct order
-	 * It's important to move Dev to the end of devices_kset before
-	 * calling .probe, because it could be recursive and parent Dev
-	 * should always go first
-	 */
-	devices_kset_move_last(dev);
-
 	if (dev->bus->probe) {
 		ret = dev->bus->probe(dev);
 		if (ret)

From b994ffa2f121fea73708f85c47620f0dba236258 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Tue, 7 Feb 2017 17:01:14 +0200
Subject: [PATCH 1388/1852] can: xilinx_can: fix RX loop if RXNEMP is asserted
 without RXOK

commit 32852c561bffd613d4ed7ec464b1e03e1b7b6c5c upstream.

If the device gets into a state where RXNEMP (RX FIFO not empty)
interrupt is asserted without RXOK (new frame received successfully)
interrupt being asserted, xcan_rx_poll() will continue to try to clear
RXNEMP without actually reading frames from RX FIFO. If the RX FIFO is
not empty, the interrupt will not be cleared and napi_schedule() will
just be called again.

This situation can occur when:

(a) xcan_rx() returns without reading RX FIFO due to an error condition.
The code tries to clear both RXOK and RXNEMP but RXNEMP will not clear
due to a frame still being in the FIFO. The frame will never be read
from the FIFO as RXOK is no longer set.

(b) A frame is received between xcan_rx_poll() reading interrupt status
and clearing RXOK. RXOK will be cleared, but RXNEMP will again remain
set as the new message is still in the FIFO.

I'm able to trigger case (b) by flooding the bus with frames under load.

There does not seem to be any benefit in using both RXNEMP and RXOK in
the way the driver does, and the polling example in the reference manual
(UG585 v1.10 18.3.7 Read Messages from RxFIFO) also says that either
RXOK or RXNEMP can be used for detecting incoming messages.

Fix the issue and simplify the RX processing by only using RXNEMP
without RXOK.

Tested with the integrated CAN on Zynq-7000 SoC.

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 51670b322409b..727add0decdfc 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -100,7 +100,7 @@ enum xcan_reg {
 #define XCAN_INTR_ALL		(XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\
 				 XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \
 				 XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \
-				 XCAN_IXR_ARBLST_MASK | XCAN_IXR_RXOK_MASK)
+				 XCAN_IXR_ARBLST_MASK)
 
 /* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
 #define XCAN_BTR_SJW_SHIFT		7  /* Synchronous jump width */
@@ -708,15 +708,7 @@ static int xcan_rx_poll(struct napi_struct *napi, int quota)
 
 	isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
 	while ((isr & XCAN_IXR_RXNEMP_MASK) && (work_done < quota)) {
-		if (isr & XCAN_IXR_RXOK_MASK) {
-			priv->write_reg(priv, XCAN_ICR_OFFSET,
-				XCAN_IXR_RXOK_MASK);
-			work_done += xcan_rx(ndev);
-		} else {
-			priv->write_reg(priv, XCAN_ICR_OFFSET,
-				XCAN_IXR_RXNEMP_MASK);
-			break;
-		}
+		work_done += xcan_rx(ndev);
 		priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXNEMP_MASK);
 		isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
 	}
@@ -727,7 +719,7 @@ static int xcan_rx_poll(struct napi_struct *napi, int quota)
 	if (work_done < quota) {
 		napi_complete(napi);
 		ier = priv->read_reg(priv, XCAN_IER_OFFSET);
-		ier |= (XCAN_IXR_RXOK_MASK | XCAN_IXR_RXNEMP_MASK);
+		ier |= XCAN_IXR_RXNEMP_MASK;
 		priv->write_reg(priv, XCAN_IER_OFFSET, ier);
 	}
 	return work_done;
@@ -799,9 +791,9 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
 	}
 
 	/* Check for the type of receive interrupt and Processing it */
-	if (isr & (XCAN_IXR_RXNEMP_MASK | XCAN_IXR_RXOK_MASK)) {
+	if (isr & XCAN_IXR_RXNEMP_MASK) {
 		ier = priv->read_reg(priv, XCAN_IER_OFFSET);
-		ier &= ~(XCAN_IXR_RXNEMP_MASK | XCAN_IXR_RXOK_MASK);
+		ier &= ~XCAN_IXR_RXNEMP_MASK;
 		priv->write_reg(priv, XCAN_IER_OFFSET, ier);
 		napi_schedule(&priv->napi);
 	}

From 62cdc05c7ff69c34d0910875e76653c289474499 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Wed, 8 Feb 2017 13:13:40 +0200
Subject: [PATCH 1389/1852] can: xilinx_can: fix recovery from error states not
 being propagated

commit 877e0b75947e2c7acf5624331bb17ceb093c98ae upstream.

The xilinx_can driver contains no mechanism for propagating recovery
from CAN_STATE_ERROR_WARNING and CAN_STATE_ERROR_PASSIVE.

Add such a mechanism by factoring the handling of
XCAN_STATE_ERROR_PASSIVE and XCAN_STATE_ERROR_WARNING out of
xcan_err_interrupt and checking for recovery after RX and TX if the
interface is in one of those states.

Tested with the integrated CAN on Zynq-7000 SoC.

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 155 ++++++++++++++++++++++++++++-------
 1 file changed, 127 insertions(+), 28 deletions(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 727add0decdfc..b0b52bf276b0c 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -2,6 +2,7 @@
  *
  * Copyright (C) 2012 - 2014 Xilinx, Inc.
  * Copyright (C) 2009 PetaLogix. All rights reserved.
+ * Copyright (C) 2017 Sandvik Mining and Construction Oy
  *
  * Description:
  * This driver is developed for Axi CAN IP and for Zynq CANPS Controller.
@@ -528,6 +529,123 @@ static int xcan_rx(struct net_device *ndev)
 	return 1;
 }
 
+/**
+ * xcan_current_error_state - Get current error state from HW
+ * @ndev:	Pointer to net_device structure
+ *
+ * Checks the current CAN error state from the HW. Note that this
+ * only checks for ERROR_PASSIVE and ERROR_WARNING.
+ *
+ * Return:
+ * ERROR_PASSIVE or ERROR_WARNING if either is active, ERROR_ACTIVE
+ * otherwise.
+ */
+static enum can_state xcan_current_error_state(struct net_device *ndev)
+{
+	struct xcan_priv *priv = netdev_priv(ndev);
+	u32 status = priv->read_reg(priv, XCAN_SR_OFFSET);
+
+	if ((status & XCAN_SR_ESTAT_MASK) == XCAN_SR_ESTAT_MASK)
+		return CAN_STATE_ERROR_PASSIVE;
+	else if (status & XCAN_SR_ERRWRN_MASK)
+		return CAN_STATE_ERROR_WARNING;
+	else
+		return CAN_STATE_ERROR_ACTIVE;
+}
+
+/**
+ * xcan_set_error_state - Set new CAN error state
+ * @ndev:	Pointer to net_device structure
+ * @new_state:	The new CAN state to be set
+ * @cf:		Error frame to be populated or NULL
+ *
+ * Set new CAN error state for the device, updating statistics and
+ * populating the error frame if given.
+ */
+static void xcan_set_error_state(struct net_device *ndev,
+				 enum can_state new_state,
+				 struct can_frame *cf)
+{
+	struct xcan_priv *priv = netdev_priv(ndev);
+	u32 ecr = priv->read_reg(priv, XCAN_ECR_OFFSET);
+	u32 txerr = ecr & XCAN_ECR_TEC_MASK;
+	u32 rxerr = (ecr & XCAN_ECR_REC_MASK) >> XCAN_ESR_REC_SHIFT;
+
+	priv->can.state = new_state;
+
+	if (cf) {
+		cf->can_id |= CAN_ERR_CRTL;
+		cf->data[6] = txerr;
+		cf->data[7] = rxerr;
+	}
+
+	switch (new_state) {
+	case CAN_STATE_ERROR_PASSIVE:
+		priv->can.can_stats.error_passive++;
+		if (cf)
+			cf->data[1] = (rxerr > 127) ?
+					CAN_ERR_CRTL_RX_PASSIVE :
+					CAN_ERR_CRTL_TX_PASSIVE;
+		break;
+	case CAN_STATE_ERROR_WARNING:
+		priv->can.can_stats.error_warning++;
+		if (cf)
+			cf->data[1] |= (txerr > rxerr) ?
+					CAN_ERR_CRTL_TX_WARNING :
+					CAN_ERR_CRTL_RX_WARNING;
+		break;
+	case CAN_STATE_ERROR_ACTIVE:
+		if (cf)
+			cf->data[1] |= CAN_ERR_CRTL_ACTIVE;
+		break;
+	default:
+		/* non-ERROR states are handled elsewhere */
+		WARN_ON(1);
+		break;
+	}
+}
+
+/**
+ * xcan_update_error_state_after_rxtx - Update CAN error state after RX/TX
+ * @ndev:	Pointer to net_device structure
+ *
+ * If the device is in a ERROR-WARNING or ERROR-PASSIVE state, check if
+ * the performed RX/TX has caused it to drop to a lesser state and set
+ * the interface state accordingly.
+ */
+static void xcan_update_error_state_after_rxtx(struct net_device *ndev)
+{
+	struct xcan_priv *priv = netdev_priv(ndev);
+	enum can_state old_state = priv->can.state;
+	enum can_state new_state;
+
+	/* changing error state due to successful frame RX/TX can only
+	 * occur from these states
+	 */
+	if (old_state != CAN_STATE_ERROR_WARNING &&
+	    old_state != CAN_STATE_ERROR_PASSIVE)
+		return;
+
+	new_state = xcan_current_error_state(ndev);
+
+	if (new_state != old_state) {
+		struct sk_buff *skb;
+		struct can_frame *cf;
+
+		skb = alloc_can_err_skb(ndev, &cf);
+
+		xcan_set_error_state(ndev, new_state, skb ? cf : NULL);
+
+		if (skb) {
+			struct net_device_stats *stats = &ndev->stats;
+
+			stats->rx_packets++;
+			stats->rx_bytes += cf->can_dlc;
+			netif_rx(skb);
+		}
+	}
+}
+
 /**
  * xcan_err_interrupt - error frame Isr
  * @ndev:	net_device pointer
@@ -543,16 +661,12 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
 	struct net_device_stats *stats = &ndev->stats;
 	struct can_frame *cf;
 	struct sk_buff *skb;
-	u32 err_status, status, txerr = 0, rxerr = 0;
+	u32 err_status;
 
 	skb = alloc_can_err_skb(ndev, &cf);
 
 	err_status = priv->read_reg(priv, XCAN_ESR_OFFSET);
 	priv->write_reg(priv, XCAN_ESR_OFFSET, err_status);
-	txerr = priv->read_reg(priv, XCAN_ECR_OFFSET) & XCAN_ECR_TEC_MASK;
-	rxerr = ((priv->read_reg(priv, XCAN_ECR_OFFSET) &
-			XCAN_ECR_REC_MASK) >> XCAN_ESR_REC_SHIFT);
-	status = priv->read_reg(priv, XCAN_SR_OFFSET);
 
 	if (isr & XCAN_IXR_BSOFF_MASK) {
 		priv->can.state = CAN_STATE_BUS_OFF;
@@ -562,28 +676,10 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
 		can_bus_off(ndev);
 		if (skb)
 			cf->can_id |= CAN_ERR_BUSOFF;
-	} else if ((status & XCAN_SR_ESTAT_MASK) == XCAN_SR_ESTAT_MASK) {
-		priv->can.state = CAN_STATE_ERROR_PASSIVE;
-		priv->can.can_stats.error_passive++;
-		if (skb) {
-			cf->can_id |= CAN_ERR_CRTL;
-			cf->data[1] = (rxerr > 127) ?
-					CAN_ERR_CRTL_RX_PASSIVE :
-					CAN_ERR_CRTL_TX_PASSIVE;
-			cf->data[6] = txerr;
-			cf->data[7] = rxerr;
-		}
-	} else if (status & XCAN_SR_ERRWRN_MASK) {
-		priv->can.state = CAN_STATE_ERROR_WARNING;
-		priv->can.can_stats.error_warning++;
-		if (skb) {
-			cf->can_id |= CAN_ERR_CRTL;
-			cf->data[1] |= (txerr > rxerr) ?
-					CAN_ERR_CRTL_TX_WARNING :
-					CAN_ERR_CRTL_RX_WARNING;
-			cf->data[6] = txerr;
-			cf->data[7] = rxerr;
-		}
+	} else {
+		enum can_state new_state = xcan_current_error_state(ndev);
+
+		xcan_set_error_state(ndev, new_state, skb ? cf : NULL);
 	}
 
 	/* Check for Arbitration lost interrupt */
@@ -713,8 +809,10 @@ static int xcan_rx_poll(struct napi_struct *napi, int quota)
 		isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
 	}
 
-	if (work_done)
+	if (work_done) {
 		can_led_event(ndev, CAN_LED_EVENT_RX);
+		xcan_update_error_state_after_rxtx(ndev);
+	}
 
 	if (work_done < quota) {
 		napi_complete(napi);
@@ -745,6 +843,7 @@ static void xcan_tx_interrupt(struct net_device *ndev, u32 isr)
 		isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
 	}
 	can_led_event(ndev, CAN_LED_EVENT_TX);
+	xcan_update_error_state_after_rxtx(ndev);
 	netif_wake_queue(ndev);
 }
 

From 87e9bb7c069ff3de47fc7fbcab99ca64b50e2e34 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Tue, 7 Feb 2017 13:23:04 +0200
Subject: [PATCH 1390/1852] can: xilinx_can: fix device dropping off bus on RX
 overrun

commit 2574fe54515ed3487405de329e4e9f13d7098c10 upstream.

The xilinx_can driver performs a software reset when an RX overrun is
detected. This causes the device to enter Configuration mode where no
messages are received or transmitted.

The documentation does not mention any need to perform a reset on an RX
overrun, and testing by inducing an RX overflow also indicated that the
device continues to work just fine without a reset.

Remove the software reset.

Tested with the integrated CAN on Zynq-7000 SoC.

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index b0b52bf276b0c..e787116e9e828 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -695,7 +695,6 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
 	if (isr & XCAN_IXR_RXOFLW_MASK) {
 		stats->rx_over_errors++;
 		stats->rx_errors++;
-		priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);
 		if (skb) {
 			cf->can_id |= CAN_ERR_CRTL;
 			cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;

From 2d0921e4604e907f99e0ef4e024d2af9d81cce57 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Thu, 23 Feb 2017 14:50:03 +0200
Subject: [PATCH 1391/1852] can: xilinx_can: keep only 1-2 frames in TX FIFO to
 fix TX accounting

commit 620050d9c2be15c47017ba95efe59e0832e99a56 upstream.

The xilinx_can driver assumes that the TXOK interrupt only clears after
it has been acknowledged as many times as there have been successfully
sent frames.

However, the documentation does not mention such behavior, instead
saying just that the interrupt is cleared when the clear bit is set.

Similarly, testing seems to also suggest that it is immediately cleared
regardless of the amount of frames having been sent. Performing some
heavy TX load and then going back to idle has the tx_head drifting
further away from tx_tail over time, steadily reducing the amount of
frames the driver keeps in the TX FIFO (but not to zero, as the TXOK
interrupt always frees up space for 1 frame from the driver's
perspective, so frames continue to be sent) and delaying the local echo
frames.

The TX FIFO tracking is also otherwise buggy as it does not account for
TX FIFO being cleared after software resets, causing
  BUG!, TX FIFO full when queue awake!
messages to be output.

There does not seem to be any way to accurately track the state of the
TX FIFO for local echo support while using the full TX FIFO.

The Zynq version of the HW (but not the soft-AXI version) has watermark
programming support and with it an additional TX-FIFO-empty interrupt
bit.

Modify the driver to only put 1 frame into TX FIFO at a time on soft-AXI
and 2 frames at a time on Zynq. On Zynq the TXFEMP interrupt bit is used
to detect whether 1 or 2 frames have been sent at interrupt processing
time.

Tested with the integrated CAN on Zynq-7000 SoC. The 1-frame-FIFO mode
was also tested.

An alternative way to solve this would be to drop local echo support but
keep using the full TX FIFO.

v2: Add FIFO space check before TX queue wake with locking to
synchronize with queue stop. This avoids waking the queue when xmit()
had just filled it.

v3: Keep local echo support and reduce the amount of frames in FIFO
instead as suggested by Marc Kleine-Budde.

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 139 +++++++++++++++++++++++++++++++----
 1 file changed, 123 insertions(+), 16 deletions(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index e787116e9e828..09c9950a03a5b 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -26,8 +26,10 @@
 #include <linux/module.h>
 #include <linux/netdevice.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/skbuff.h>
+#include <linux/spinlock.h>
 #include <linux/string.h>
 #include <linux/types.h>
 #include <linux/can/dev.h>
@@ -118,6 +120,7 @@ enum xcan_reg {
 /**
  * struct xcan_priv - This definition define CAN driver instance
  * @can:			CAN private data structure.
+ * @tx_lock:			Lock for synchronizing TX interrupt handling
  * @tx_head:			Tx CAN packets ready to send on the queue
  * @tx_tail:			Tx CAN packets successfully sended on the queue
  * @tx_max:			Maximum number packets the driver can send
@@ -132,6 +135,7 @@ enum xcan_reg {
  */
 struct xcan_priv {
 	struct can_priv can;
+	spinlock_t tx_lock;
 	unsigned int tx_head;
 	unsigned int tx_tail;
 	unsigned int tx_max;
@@ -159,6 +163,11 @@ static const struct can_bittiming_const xcan_bittiming_const = {
 	.brp_inc = 1,
 };
 
+#define XCAN_CAP_WATERMARK	0x0001
+struct xcan_devtype_data {
+	unsigned int caps;
+};
+
 /**
  * xcan_write_reg_le - Write a value to the device register little endian
  * @priv:	Driver private data structure
@@ -238,6 +247,10 @@ static int set_reset_mode(struct net_device *ndev)
 		usleep_range(500, 10000);
 	}
 
+	/* reset clears FIFOs */
+	priv->tx_head = 0;
+	priv->tx_tail = 0;
+
 	return 0;
 }
 
@@ -392,6 +405,7 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 	struct net_device_stats *stats = &ndev->stats;
 	struct can_frame *cf = (struct can_frame *)skb->data;
 	u32 id, dlc, data[2] = {0, 0};
+	unsigned long flags;
 
 	if (can_dropped_invalid_skb(ndev, skb))
 		return NETDEV_TX_OK;
@@ -439,6 +453,9 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 		data[1] = be32_to_cpup((__be32 *)(cf->data + 4));
 
 	can_put_echo_skb(skb, ndev, priv->tx_head % priv->tx_max);
+
+	spin_lock_irqsave(&priv->tx_lock, flags);
+
 	priv->tx_head++;
 
 	/* Write the Frame to Xilinx CAN TX FIFO */
@@ -454,10 +471,16 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 		stats->tx_bytes += cf->can_dlc;
 	}
 
+	/* Clear TX-FIFO-empty interrupt for xcan_tx_interrupt() */
+	if (priv->tx_max > 1)
+		priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXFEMP_MASK);
+
 	/* Check if the TX buffer is full */
 	if ((priv->tx_head - priv->tx_tail) == priv->tx_max)
 		netif_stop_queue(ndev);
 
+	spin_unlock_irqrestore(&priv->tx_lock, flags);
+
 	return NETDEV_TX_OK;
 }
 
@@ -831,19 +854,71 @@ static void xcan_tx_interrupt(struct net_device *ndev, u32 isr)
 {
 	struct xcan_priv *priv = netdev_priv(ndev);
 	struct net_device_stats *stats = &ndev->stats;
+	unsigned int frames_in_fifo;
+	int frames_sent = 1; /* TXOK => at least 1 frame was sent */
+	unsigned long flags;
+	int retries = 0;
+
+	/* Synchronize with xmit as we need to know the exact number
+	 * of frames in the FIFO to stay in sync due to the TXFEMP
+	 * handling.
+	 * This also prevents a race between netif_wake_queue() and
+	 * netif_stop_queue().
+	 */
+	spin_lock_irqsave(&priv->tx_lock, flags);
+
+	frames_in_fifo = priv->tx_head - priv->tx_tail;
 
-	while ((priv->tx_head - priv->tx_tail > 0) &&
-			(isr & XCAN_IXR_TXOK_MASK)) {
+	if (WARN_ON_ONCE(frames_in_fifo == 0)) {
+		/* clear TXOK anyway to avoid getting back here */
 		priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
+		spin_unlock_irqrestore(&priv->tx_lock, flags);
+		return;
+	}
+
+	/* Check if 2 frames were sent (TXOK only means that at least 1
+	 * frame was sent).
+	 */
+	if (frames_in_fifo > 1) {
+		WARN_ON(frames_in_fifo > priv->tx_max);
+
+		/* Synchronize TXOK and isr so that after the loop:
+		 * (1) isr variable is up-to-date at least up to TXOK clear
+		 *     time. This avoids us clearing a TXOK of a second frame
+		 *     but not noticing that the FIFO is now empty and thus
+		 *     marking only a single frame as sent.
+		 * (2) No TXOK is left. Having one could mean leaving a
+		 *     stray TXOK as we might process the associated frame
+		 *     via TXFEMP handling as we read TXFEMP *after* TXOK
+		 *     clear to satisfy (1).
+		 */
+		while ((isr & XCAN_IXR_TXOK_MASK) && !WARN_ON(++retries == 100)) {
+			priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
+			isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
+		}
+
+		if (isr & XCAN_IXR_TXFEMP_MASK) {
+			/* nothing in FIFO anymore */
+			frames_sent = frames_in_fifo;
+		}
+	} else {
+		/* single frame in fifo, just clear TXOK */
+		priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
+	}
+
+	while (frames_sent--) {
 		can_get_echo_skb(ndev, priv->tx_tail %
 					priv->tx_max);
 		priv->tx_tail++;
 		stats->tx_packets++;
-		isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
 	}
+
+	netif_wake_queue(ndev);
+
+	spin_unlock_irqrestore(&priv->tx_lock, flags);
+
 	can_led_event(ndev, CAN_LED_EVENT_TX);
 	xcan_update_error_state_after_rxtx(ndev);
-	netif_wake_queue(ndev);
 }
 
 /**
@@ -1120,6 +1195,18 @@ static int __maybe_unused xcan_resume(struct device *dev)
 
 static SIMPLE_DEV_PM_OPS(xcan_dev_pm_ops, xcan_suspend, xcan_resume);
 
+static const struct xcan_devtype_data xcan_zynq_data = {
+	.caps = XCAN_CAP_WATERMARK,
+};
+
+/* Match table for OF platform binding */
+static const struct of_device_id xcan_of_match[] = {
+	{ .compatible = "xlnx,zynq-can-1.0", .data = &xcan_zynq_data },
+	{ .compatible = "xlnx,axi-can-1.00.a", },
+	{ /* end of list */ },
+};
+MODULE_DEVICE_TABLE(of, xcan_of_match);
+
 /**
  * xcan_probe - Platform registration call
  * @pdev:	Handle to the platform device structure
@@ -1134,8 +1221,10 @@ static int xcan_probe(struct platform_device *pdev)
 	struct resource *res; /* IO mem resources */
 	struct net_device *ndev;
 	struct xcan_priv *priv;
+	const struct of_device_id *of_id;
+	int caps = 0;
 	void __iomem *addr;
-	int ret, rx_max, tx_max;
+	int ret, rx_max, tx_max, tx_fifo_depth;
 
 	/* Get the virtual base address for the device */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1145,7 +1234,8 @@ static int xcan_probe(struct platform_device *pdev)
 		goto err;
 	}
 
-	ret = of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", &tx_max);
+	ret = of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
+				   &tx_fifo_depth);
 	if (ret < 0)
 		goto err;
 
@@ -1153,6 +1243,30 @@ static int xcan_probe(struct platform_device *pdev)
 	if (ret < 0)
 		goto err;
 
+	of_id = of_match_device(xcan_of_match, &pdev->dev);
+	if (of_id) {
+		const struct xcan_devtype_data *devtype_data = of_id->data;
+
+		if (devtype_data)
+			caps = devtype_data->caps;
+	}
+
+	/* There is no way to directly figure out how many frames have been
+	 * sent when the TXOK interrupt is processed. If watermark programming
+	 * is supported, we can have 2 frames in the FIFO and use TXFEMP
+	 * to determine if 1 or 2 frames have been sent.
+	 * Theoretically we should be able to use TXFWMEMP to determine up
+	 * to 3 frames, but it seems that after putting a second frame in the
+	 * FIFO, with watermark at 2 frames, it can happen that TXFWMEMP (less
+	 * than 2 frames in FIFO) is set anyway with no TXOK (a frame was
+	 * sent), which is not a sensible state - possibly TXFWMEMP is not
+	 * completely synchronized with the rest of the bits?
+	 */
+	if (caps & XCAN_CAP_WATERMARK)
+		tx_max = min(tx_fifo_depth, 2);
+	else
+		tx_max = 1;
+
 	/* Create a CAN device instance */
 	ndev = alloc_candev(sizeof(struct xcan_priv), tx_max);
 	if (!ndev)
@@ -1167,6 +1281,7 @@ static int xcan_probe(struct platform_device *pdev)
 					CAN_CTRLMODE_BERR_REPORTING;
 	priv->reg_base = addr;
 	priv->tx_max = tx_max;
+	spin_lock_init(&priv->tx_lock);
 
 	/* Get IRQ for the device */
 	ndev->irq = platform_get_irq(pdev, 0);
@@ -1234,9 +1349,9 @@ static int xcan_probe(struct platform_device *pdev)
 	devm_can_led_init(ndev);
 	clk_disable_unprepare(priv->bus_clk);
 	clk_disable_unprepare(priv->can_clk);
-	netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx fifo depth:%d\n",
+	netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx fifo depth: actual %d, using %d\n",
 			priv->reg_base, ndev->irq, priv->can.clock.freq,
-			priv->tx_max);
+			tx_fifo_depth, priv->tx_max);
 
 	return 0;
 
@@ -1272,14 +1387,6 @@ static int xcan_remove(struct platform_device *pdev)
 	return 0;
 }
 
-/* Match table for OF platform binding */
-static const struct of_device_id xcan_of_match[] = {
-	{ .compatible = "xlnx,zynq-can-1.0", },
-	{ .compatible = "xlnx,axi-can-1.00.a", },
-	{ /* end of list */ },
-};
-MODULE_DEVICE_TABLE(of, xcan_of_match);
-
 static struct platform_driver xcan_driver = {
 	.probe = xcan_probe,
 	.remove	= xcan_remove,

From c563f9f9a7635d1936c9b65002ee7fa489cdc36a Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Mon, 26 Feb 2018 14:39:59 +0200
Subject: [PATCH 1392/1852] can: xilinx_can: fix incorrect clear of
 non-processed interrupts

commit 2f4f0f338cf453bfcdbcf089e177c16f35f023c8 upstream.

xcan_interrupt() clears ERROR|RXOFLV|BSOFF|ARBLST interrupts if any of
them is asserted. This does not take into account that some of them
could have been asserted between interrupt status read and interrupt
clear, therefore clearing them without handling them.

Fix the code to only clear those interrupts that it knows are asserted
and therefore going to be processed in xcan_err_interrupt().

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 09c9950a03a5b..a7286d72ed7b4 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -937,6 +937,7 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
 	struct net_device *ndev = (struct net_device *)dev_id;
 	struct xcan_priv *priv = netdev_priv(ndev);
 	u32 isr, ier;
+	u32 isr_errors;
 
 	/* Get the interrupt status from Xilinx CAN */
 	isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
@@ -955,11 +956,10 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
 		xcan_tx_interrupt(ndev, isr);
 
 	/* Check for the type of error interrupt and Processing it */
-	if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
-			XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {
-		priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK |
-				XCAN_IXR_RXOFLW_MASK | XCAN_IXR_BSOFF_MASK |
-				XCAN_IXR_ARBLST_MASK));
+	isr_errors = isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
+			    XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK);
+	if (isr_errors) {
+		priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors);
 		xcan_err_interrupt(ndev, isr);
 	}
 

From 60d86f50b03f1a4eec98abed090df845e5f029d1 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@bitwise.fi>
Date: Mon, 26 Feb 2018 14:27:13 +0200
Subject: [PATCH 1393/1852] can: xilinx_can: fix RX overflow interrupt not
 being enabled

commit 83997997252f5d3fc7f04abc24a89600c2b504ab upstream.

RX overflow interrupt (RXOFLW) is disabled even though xcan_interrupt()
processes it. This means that an RX overflow interrupt will only be
processed when another interrupt gets asserted (e.g. for RX/TX).

Fix that by enabling the RXOFLW interrupt.

Fixes: b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/xilinx_can.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index a7286d72ed7b4..700b98d9c2500 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -103,7 +103,7 @@ enum xcan_reg {
 #define XCAN_INTR_ALL		(XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\
 				 XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \
 				 XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \
-				 XCAN_IXR_ARBLST_MASK)
+				 XCAN_IXR_RXOFLW_MASK | XCAN_IXR_ARBLST_MASK)
 
 /* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
 #define XCAN_BTR_SJW_SHIFT		7  /* Synchronous jump width */

From 92da4cd8060e9e541a8700bdb27b9c5ca72fa8fa Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 26 Jul 2018 10:13:22 +0200
Subject: [PATCH 1394/1852] turn off -Wattribute-alias

Starting with gcc-8.1, we get a warning about all system call definitions,
which use an alias between functions with incompatible prototypes, e.g.:

In file included from ../mm/process_vm_access.c:19:
../include/linux/syscalls.h:211:18: warning: 'sys_process_vm_readv' alias between functions of incompatible types 'long int(pid_t,  const struct iovec *, long unsigned int,  const struct iovec *, long unsigned int,  long unsigned int)' {aka 'long int(int,  const struct iovec *, long unsigned int,  const struct iovec *, long unsigned int,  long unsigned int)'} and 'long int(long int,  long int,  long int,  long int,  long int,  long int)' [-Wattribute-alias]
  asmlinkage long sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \
                  ^~~
../include/linux/syscalls.h:207:2: note: in expansion of macro '__SYSCALL_DEFINEx'
  __SYSCALL_DEFINEx(x, sname, __VA_ARGS__)
  ^~~~~~~~~~~~~~~~~
../include/linux/syscalls.h:201:36: note: in expansion of macro 'SYSCALL_DEFINEx'
 #define SYSCALL_DEFINE6(name, ...) SYSCALL_DEFINEx(6, _##name, __VA_ARGS__)
                                    ^~~~~~~~~~~~~~~
../mm/process_vm_access.c:300:1: note: in expansion of macro 'SYSCALL_DEFINE6'
 SYSCALL_DEFINE6(process_vm_readv, pid_t, pid, const struct iovec __user *, lvec,
 ^~~~~~~~~~~~~~~
../include/linux/syscalls.h:215:18: note: aliased declaration here
  asmlinkage long SyS##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \
                  ^~~
../include/linux/syscalls.h:207:2: note: in expansion of macro '__SYSCALL_DEFINEx'
  __SYSCALL_DEFINEx(x, sname, __VA_ARGS__)
  ^~~~~~~~~~~~~~~~~
../include/linux/syscalls.h:201:36: note: in expansion of macro 'SYSCALL_DEFINEx'
 #define SYSCALL_DEFINE6(name, ...) SYSCALL_DEFINEx(6, _##name, __VA_ARGS__)
                                    ^~~~~~~~~~~~~~~
../mm/process_vm_access.c:300:1: note: in expansion of macro 'SYSCALL_DEFINE6'
 SYSCALL_DEFINE6(process_vm_readv, pid_t, pid, const struct iovec __user *, lvec,

This is really noisy and does not indicate a real problem. In the latest
mainline kernel, this was addressed by commit bee20031772a ("disable
-Wattribute-alias warning for SYSCALL_DEFINEx()"), which seems too invasive
to backport.

This takes a much simpler approach and just disables the warning across the
kernel.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index d0dc1b253856f..92ccc11fd4c97 100644
--- a/Makefile
+++ b/Makefile
@@ -648,6 +648,7 @@ KBUILD_CFLAGS	+= $(call cc-disable-warning,frame-address,)
 KBUILD_CFLAGS	+= $(call cc-disable-warning, format-truncation)
 KBUILD_CFLAGS	+= $(call cc-disable-warning, format-overflow)
 KBUILD_CFLAGS	+= $(call cc-disable-warning, int-in-bool-context)
+KBUILD_CFLAGS	+= $(call cc-disable-warning, attribute-alias)
 
 ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
 KBUILD_CFLAGS	+= $(call cc-option,-Oz,-Os)

From 1a8e605da841e76e5bd1d66a70a005107a92596d Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 26 Jul 2018 10:13:23 +0200
Subject: [PATCH 1395/1852] ARM: fix put_user() for gcc-8

Building kernels before linux-4.7 with gcc-8 results in many build failures
when gcc triggers a check that was meant to catch broken compilers:

/tmp/ccCGMQmS.s:648: Error: .err encountered

According to the discussion in the gcc bugzilla, a local "register
asm()" variable is still supposed to be the correct way to force an
inline assembly to use a particular register, but marking it 'const'
lets the compiler do optimizations that break that, i.e the compiler is
free to treat the variable as either 'const' or 'register' in that case.

Upstream commit 9f73bd8bb445 ("ARM: uaccess: remove put_user() code
duplication") fixed this problem in linux-4.8 as part of a larger change,
but seems a little too big to be backported to 4.4.

Let's take the simplest fix and change only the one broken line in the
same way as newer kernels.

Suggested-by: Bernd Edlinger <bernd.edlinger@hotmail.de>
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85745
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86673
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/include/asm/uaccess.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 7fb59199c6bbb..7665bd2f48718 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -251,7 +251,7 @@ extern int __put_user_8(void *, unsigned long long);
 	({								\
 		unsigned long __limit = current_thread_info()->addr_limit - 1; \
 		const typeof(*(p)) __user *__tmp_p = (p);		\
-		register const typeof(*(p)) __r2 asm("r2") = (x);	\
+		register typeof(*(p)) __r2 asm("r2") = (x);	\
 		register const typeof(*(p)) __user *__p asm("r0") = __tmp_p; \
 		register unsigned long __l asm("r1") = __limit;		\
 		register int __e asm("r0");				\

From c83d42a586a7a7b094b7b63a1cc4dedb0ab4002e Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sat, 28 Jul 2018 07:45:05 +0200
Subject: [PATCH 1396/1852] Linux 4.4.145

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 92ccc11fd4c97..0cba00dd1b88f 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 144
+SUBLEVEL = 145
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 9c42cd9e4a8fea9168ee86ffab1e6ed142045e9a Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@mips.com>
Date: Thu, 12 Jul 2018 09:33:04 -0700
Subject: [PATCH 1397/1852] MIPS: Fix off-by-one in pci_resource_to_user()

commit 38c0a74fe06da3be133cae3fb7bde6a9438e698b upstream.

The MIPS implementation of pci_resource_to_user() introduced in v3.12 by
commit 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci
memory space properly") incorrectly sets *end to the address of the
byte after the resource, rather than the last byte of the resource.

This results in userland seeing resources as a byte larger than they
actually are, for example a 32 byte BAR will be reported by a tool such
as lspci as being 33 bytes in size:

    Region 2: I/O ports at 1000 [disabled] [size=33]

Correct this by subtracting one from the calculated end address,
reporting the correct address to userland.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Rui Wang <rui.wang@windriver.com>
Fixes: 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci memory space properly")
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v3.12+
Patchwork: https://patchwork.linux-mips.org/patch/19829/
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/include/asm/pci.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 98c31e5d95793..a7bc901819c82 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -89,7 +89,7 @@ static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
 	phys_addr_t size = resource_size(rsrc);
 
 	*start = fixup_bigphys_addr(rsrc->start, size);
-	*end = rsrc->start + size;
+	*end = rsrc->start + size - 1;
 }
 
 /*

From b9a91e6e299aee0a4743597dbe06257eb30dcd09 Mon Sep 17 00:00:00 2001
From: Donald Shanty III <dshanty@protonmail.com>
Date: Wed, 4 Jul 2018 15:50:47 +0000
Subject: [PATCH 1398/1852] Input: elan_i2c - add ACPI ID for lenovo ideapad
 330

commit 938f45008d8bc391593c97508bc798cc95a52b9b upstream.

This allows Elan driver to bind to the touchpad found in Lenovo Ideapad 330
series laptops.

Signed-off-by: Donald Shanty III <dshanty@protonmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c_core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index 97f6e05cffce4..a7515f5dd76c2 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1251,6 +1251,7 @@ static const struct acpi_device_id elan_acpi_id[] = {
 	{ "ELAN0611", 0 },
 	{ "ELAN0612", 0 },
 	{ "ELAN0618", 0 },
+	{ "ELAN061D", 0 },
 	{ "ELAN1000", 0 },
 	{ }
 };

From 4931d335beab4df02d4452995f2321d9d940b7ca Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 18 Jul 2018 17:24:35 +0000
Subject: [PATCH 1399/1852] Input: i8042 - add Lenovo LaVie Z to the i8042
 reset list

commit 384cf4285b34e08917e3e66603382f2b0c4f6e1b upstream.

The Lenovo LaVie Z laptop requires i8042 to be reset in order to
consistently detect its Elantech touchpad. The nomux and kbdreset
quirks are not sufficient.

It's possible the other LaVie Z models from NEC require this as well.

Cc: stable@vger.kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/serio/i8042-x86ia64io.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index e484ea2dc787f..34be09651ee85 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -527,6 +527,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = {
 			DMI_MATCH(DMI_PRODUCT_NAME, "N24_25BU"),
 		},
 	},
+	{
+		/* Lenovo LaVie Z */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo LaVie Z"),
+		},
+	},
 	{ }
 };
 

From f3daf58fbfd62ed17eb09d642266d8d02b19a142 Mon Sep 17 00:00:00 2001
From: KT Liao <kt.liao@emc.com.tw>
Date: Mon, 16 Jul 2018 12:10:03 +0000
Subject: [PATCH 1400/1852] Input: elan_i2c - add another ACPI ID for Lenovo
 Ideapad 330-15AST

commit 6f88a6439da5d94de334a341503bc2c7f4a7ea7f upstream.

Add ELAN0622 to ACPI mapping table to support Elan touchpad found in
Ideapad 330-15AST.

Signed-off-by: KT Liao <kt.liao@emc.com.tw>
Reported-by: Anant Shende <anantshende@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/input/mouse/elan_i2c_core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index a7515f5dd76c2..a716482774db4 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1252,6 +1252,7 @@ static const struct acpi_device_id elan_acpi_id[] = {
 	{ "ELAN0612", 0 },
 	{ "ELAN0618", 0 },
 	{ "ELAN061D", 0 },
+	{ "ELAN0622", 0 },
 	{ "ELAN1000", 0 },
 	{ }
 };

From d6ed11992d32962b45c70f2d84ad06907b18ac41 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Tue, 24 Jul 2018 19:13:31 -0400
Subject: [PATCH 1401/1852] tracing: Fix double free of event_trigger_data

commit 1863c387259b629e4ebfb255495f67cd06aa229b upstream.

Running the following:

 # cd /sys/kernel/debug/tracing
 # echo 500000 > buffer_size_kb
[ Or some other number that takes up most of memory ]
 # echo snapshot > events/sched/sched_switch/trigger

Triggers the following bug:

 ------------[ cut here ]------------
 kernel BUG at mm/slub.c:296!
 invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC PTI
 CPU: 6 PID: 6878 Comm: bash Not tainted 4.18.0-rc6-test+ #1066
 Hardware name: Hewlett-Packard HP Compaq Pro 6300 SFF/339A, BIOS K01 v03.03 07/14/2016
 RIP: 0010:kfree+0x16c/0x180
 Code: 05 41 0f b6 72 51 5b 5d 41 5c 4c 89 d7 e9 ac b3 f8 ff 48 89 d9 48 89 da 41 b8 01 00 00 00 5b 5d 41 5c 4c 89 d6 e9 f4 f3 ff ff <0f> 0b 0f 0b 48 8b 3d d9 d8 f9 00 e9 c1 fe ff ff 0f 1f 40 00 0f 1f
 RSP: 0018:ffffb654436d3d88 EFLAGS: 00010246
 RAX: ffff91a9d50f3d80 RBX: ffff91a9d50f3d80 RCX: ffff91a9d50f3d80
 RDX: 00000000000006a4 RSI: ffff91a9de5a60e0 RDI: ffff91a9d9803500
 RBP: ffffffff8d267c80 R08: 00000000000260e0 R09: ffffffff8c1a56be
 R10: fffff0d404543cc0 R11: 0000000000000389 R12: ffffffff8c1a56be
 R13: ffff91a9d9930e18 R14: ffff91a98c0c2890 R15: ffffffff8d267d00
 FS:  00007f363ea64700(0000) GS:ffff91a9de580000(0000) knlGS:0000000000000000
 CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
 CR2: 000055c1cacc8e10 CR3: 00000000d9b46003 CR4: 00000000001606e0
 Call Trace:
  event_trigger_callback+0xee/0x1d0
  event_trigger_write+0xfc/0x1a0
  __vfs_write+0x33/0x190
  ? handle_mm_fault+0x115/0x230
  ? _cond_resched+0x16/0x40
  vfs_write+0xb0/0x190
  ksys_write+0x52/0xc0
  do_syscall_64+0x5a/0x160
  entry_SYSCALL_64_after_hwframe+0x49/0xbe
 RIP: 0033:0x7f363e16ab50
 Code: 73 01 c3 48 8b 0d 38 83 2c 00 f7 d8 64 89 01 48 83 c8 ff c3 66 0f 1f 44 00 00 83 3d 79 db 2c 00 00 75 10 b8 01 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 31 c3 48 83 ec 08 e8 1e e3 01 00 48 89 04 24
 RSP: 002b:00007fff9a4c6378 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
 RAX: ffffffffffffffda RBX: 0000000000000009 RCX: 00007f363e16ab50
 RDX: 0000000000000009 RSI: 000055c1cacc8e10 RDI: 0000000000000001
 RBP: 000055c1cacc8e10 R08: 00007f363e435740 R09: 00007f363ea64700
 R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000009
 R13: 0000000000000001 R14: 00007f363e4345e0 R15: 00007f363e4303c0
 Modules linked in: ip6table_filter ip6_tables snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_seq snd_seq_device i915 snd_pcm snd_timer i2c_i801 snd soundcore i2c_algo_bit drm_kms_helper
86_pkg_temp_thermal video kvm_intel kvm irqbypass wmi e1000e
 ---[ end trace d301afa879ddfa25 ]---

The cause is because the register_snapshot_trigger() call failed to
allocate the snapshot buffer, and then called unregister_trigger()
which freed the data that was passed to it. Then on return to the
function that called register_snapshot_trigger(), as it sees it
failed to register, it frees the trigger_data again and causes
a double free.

By calling event_trigger_init() on the trigger_data (which only ups
the reference counter for it), and then event_trigger_free() afterward,
the trigger_data would not get freed by the registering trigger function
as it would only up and lower the ref count for it. If the register
trigger function fails, then the event_trigger_free() called after it
will free the trigger data normally.

Link: http://lkml.kernel.org/r/20180724191331.738eb819@gandalf.local.home

Cc: stable@vger.kerne.org
Fixes: 93e31ffbf417 ("tracing: Add 'snapshot' event trigger command")
Reported-by: Masami Hiramatsu <mhiramat@kernel.org>
Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_events_trigger.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/kernel/trace/trace_events_trigger.c b/kernel/trace/trace_events_trigger.c
index 2172dd61577e4..9d9cacf07ed46 100644
--- a/kernel/trace/trace_events_trigger.c
+++ b/kernel/trace/trace_events_trigger.c
@@ -663,6 +663,8 @@ event_trigger_callback(struct event_command *cmd_ops,
 		goto out_free;
 
  out_reg:
+	/* Up the trigger_data count to make sure reg doesn't free it on failure */
+	event_trigger_init(trigger_ops, trigger_data);
 	ret = cmd_ops->reg(glob, trigger_ops, trigger_data, file);
 	/*
 	 * The above returns on success the # of functions enabled,
@@ -670,11 +672,13 @@ event_trigger_callback(struct event_command *cmd_ops,
 	 * Consider no functions a failure too.
 	 */
 	if (!ret) {
+		cmd_ops->unreg(glob, trigger_ops, trigger_data, file);
 		ret = -ENOENT;
-		goto out_free;
-	} else if (ret < 0)
-		goto out_free;
-	ret = 0;
+	} else if (ret > 0)
+		ret = 0;
+
+	/* Down the counter of trigger_data or free it if not used anymore */
+	event_trigger_free(trigger_ops, trigger_data);
  out:
 	return ret;
 

From 9f3d7728ab10f0fb7ef258481ca2860ccb851093 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Wed, 25 Jul 2018 16:02:06 -0400
Subject: [PATCH 1402/1852] tracing: Fix possible double free in
 event_enable_trigger_func()

commit 15cc78644d0075e76d59476a4467e7143860f660 upstream.

There was a case that triggered a double free in event_trigger_callback()
due to the called reg() function freeing the trigger_data and then it
getting freed again by the error return by the caller. The solution there
was to up the trigger_data ref count.

Code inspection found that event_enable_trigger_func() has the same issue,
but is not as easy to trigger (requires harder to trigger failures). It
needs to be solved slightly different as it needs more to clean up when the
reg() function fails.

Link: http://lkml.kernel.org/r/20180725124008.7008e586@gandalf.local.home

Cc: stable@vger.kernel.org
Fixes: 7862ad1846e99 ("tracing: Add 'enable_event' and 'disable_event' event trigger commands")
Reivewed-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_events_trigger.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/kernel/trace/trace_events_trigger.c b/kernel/trace/trace_events_trigger.c
index 9d9cacf07ed46..b8a894adab2ca 100644
--- a/kernel/trace/trace_events_trigger.c
+++ b/kernel/trace/trace_events_trigger.c
@@ -1231,6 +1231,9 @@ event_enable_trigger_func(struct event_command *cmd_ops,
 		goto out;
 	}
 
+	/* Up the trigger_data count to make sure nothing frees it on failure */
+	event_trigger_init(trigger_ops, trigger_data);
+
 	if (trigger) {
 		number = strsep(&trigger, ":");
 
@@ -1281,6 +1284,7 @@ event_enable_trigger_func(struct event_command *cmd_ops,
 		goto out_disable;
 	/* Just return zero, not the number of enabled functions */
 	ret = 0;
+	event_trigger_free(trigger_ops, trigger_data);
  out:
 	return ret;
 
@@ -1291,7 +1295,7 @@ event_enable_trigger_func(struct event_command *cmd_ops,
  out_free:
 	if (cmd_ops->set_filter)
 		cmd_ops->set_filter(NULL, trigger_data, NULL);
-	kfree(trigger_data);
+	event_trigger_free(trigger_ops, trigger_data);
 	kfree(enable_data);
 	goto out;
 }

From 7f7756e2de09c12cf47b300dbc49b519ccfa2e13 Mon Sep 17 00:00:00 2001
From: Artem Savkov <asavkov@redhat.com>
Date: Wed, 25 Jul 2018 16:20:38 +0200
Subject: [PATCH 1403/1852] tracing/kprobes: Fix trace_probe flags on
 enable_trace_kprobe() failure

commit 57ea2a34adf40f3a6e88409aafcf803b8945619a upstream.

If enable_trace_kprobe fails to enable the probe in enable_k(ret)probe
it returns an error, but does not unset the tp flags it set previously.
This results in a probe being considered enabled and failures like being
unable to remove the probe through kprobe_events file since probes_open()
expects every probe to be disabled.

Link: http://lkml.kernel.org/r/20180725102826.8300-1-asavkov@redhat.com
Link: http://lkml.kernel.org/r/20180725142038.4765-1-asavkov@redhat.com

Cc: Ingo Molnar <mingo@redhat.com>
Cc: stable@vger.kernel.org
Fixes: 41a7dd420c57 ("tracing/kprobes: Support ftrace_event_file base multibuffer")
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Artem Savkov <asavkov@redhat.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_kprobe.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
index f2682799c2151..a357d7e939345 100644
--- a/kernel/trace/trace_kprobe.c
+++ b/kernel/trace/trace_kprobe.c
@@ -349,11 +349,10 @@ static struct trace_kprobe *find_trace_kprobe(const char *event,
 static int
 enable_trace_kprobe(struct trace_kprobe *tk, struct trace_event_file *file)
 {
+	struct event_file_link *link;
 	int ret = 0;
 
 	if (file) {
-		struct event_file_link *link;
-
 		link = kmalloc(sizeof(*link), GFP_KERNEL);
 		if (!link) {
 			ret = -ENOMEM;
@@ -373,6 +372,16 @@ enable_trace_kprobe(struct trace_kprobe *tk, struct trace_event_file *file)
 		else
 			ret = enable_kprobe(&tk->rp.kp);
 	}
+
+	if (ret) {
+		if (file) {
+			list_del_rcu(&link->list);
+			kfree(link);
+			tk->tp.flags &= ~TP_FLAG_TRACE;
+		} else {
+			tk->tp.flags &= ~TP_FLAG_PROFILE;
+		}
+	}
  out:
 	return ret;
 }

From 3fdd503f8083271588d55954b05327ec727883e4 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Wed, 25 Jul 2018 22:28:56 -0400
Subject: [PATCH 1404/1852] tracing: Quiet gcc warning about maybe unused link
 variable

commit 2519c1bbe38d7acacc9aacba303ca6f97482ed53 upstream.

Commit 57ea2a34adf4 ("tracing/kprobes: Fix trace_probe flags on
enable_trace_kprobe() failure") added an if statement that depends on another
if statement that gcc doesn't see will initialize the "link" variable and
gives the warning:

 "warning: 'link' may be used uninitialized in this function"

It is really a false positive, but to quiet the warning, and also to make
sure that it never actually is used uninitialized, initialize the "link"
variable to NULL and add an if (!WARN_ON_ONCE(!link)) where the compiler
thinks it could be used uninitialized.

Cc: stable@vger.kernel.org
Fixes: 57ea2a34adf4 ("tracing/kprobes: Fix trace_probe flags on enable_trace_kprobe() failure")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace_kprobe.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
index a357d7e939345..f0ee722be520e 100644
--- a/kernel/trace/trace_kprobe.c
+++ b/kernel/trace/trace_kprobe.c
@@ -349,7 +349,7 @@ static struct trace_kprobe *find_trace_kprobe(const char *event,
 static int
 enable_trace_kprobe(struct trace_kprobe *tk, struct trace_event_file *file)
 {
-	struct event_file_link *link;
+	struct event_file_link *link = NULL;
 	int ret = 0;
 
 	if (file) {
@@ -375,7 +375,9 @@ enable_trace_kprobe(struct trace_kprobe *tk, struct trace_event_file *file)
 
 	if (ret) {
 		if (file) {
-			list_del_rcu(&link->list);
+			/* Notice the if is true on not WARN() */
+			if (!WARN_ON_ONCE(!link))
+				list_del_rcu(&link->list);
 			kfree(link);
 			tk->tp.flags &= ~TP_FLAG_TRACE;
 		} else {

From a81e8833d3edc22c53a96a789c344db6befe8b59 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Tue, 12 Jun 2018 08:57:53 +0200
Subject: [PATCH 1405/1852] xen/netfront: raise max number of slots in
 xennet_get_responses()

[ Upstream commit 57f230ab04d2910a06d17d988f1c4d7586a59113 ]

The max number of slots used in xennet_get_responses() is set to
MAX_SKB_FRAGS + (rx->status <= RX_COPY_THRESHOLD).

In old kernel-xen MAX_SKB_FRAGS was 18, while nowadays it is 17. This
difference is resulting in frequent messages "too many slots" and a
reduced network throughput for some workloads (factor 10 below that of
a kernel-xen based guest).

Replacing MAX_SKB_FRAGS by XEN_NETIF_NR_SLOTS_MIN for calculation of
the max number of slots to use solves that problem (tests showed no
more messages "too many slots" and throughput was as high as with the
kernel-xen based guest system).

Replace MAX_SKB_FRAGS-2 by XEN_NETIF_NR_SLOTS_MIN-1 in
netfront_tx_slot_available() for making it clearer what is really being
tested without actually modifying the tested value.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/xen-netfront.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index a0de2453fa09e..3bb3d6d9117cd 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -238,7 +238,7 @@ static void rx_refill_timeout(unsigned long data)
 static int netfront_tx_slot_available(struct netfront_queue *queue)
 {
 	return (queue->tx.req_prod_pvt - queue->tx.rsp_cons) <
-		(NET_TX_RING_SIZE - MAX_SKB_FRAGS - 2);
+		(NET_TX_RING_SIZE - XEN_NETIF_NR_SLOTS_MIN - 1);
 }
 
 static void xennet_maybe_wake_tx(struct netfront_queue *queue)
@@ -775,7 +775,7 @@ static int xennet_get_responses(struct netfront_queue *queue,
 	RING_IDX cons = queue->rx.rsp_cons;
 	struct sk_buff *skb = xennet_get_rx_skb(queue, cons);
 	grant_ref_t ref = xennet_get_rx_ref(queue, cons);
-	int max = MAX_SKB_FRAGS + (rx->status <= RX_COPY_THRESHOLD);
+	int max = XEN_NETIF_NR_SLOTS_MIN + (rx->status <= RX_COPY_THRESHOLD);
 	int slots = 1;
 	int err = 0;
 	unsigned long ret;

From dca862799ad83bb7e68975373dfa906800584b4f Mon Sep 17 00:00:00 2001
From: Zhouyang Jia <jiazhouyang09@gmail.com>
Date: Mon, 11 Jun 2018 16:18:40 +0800
Subject: [PATCH 1406/1852] ALSA: emu10k1: add error handling for snd_ctl_add

[ Upstream commit 6d531e7b972cb62ded011c2dfcc2d9f72ea6c421 ]

When snd_ctl_add fails, the lack of error-handling code may
cause unexpected results.

This patch adds error-handling code after calling snd_ctl_add.

Signed-off-by: Zhouyang Jia <jiazhouyang09@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/emu10k1/emupcm.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/sound/pci/emu10k1/emupcm.c b/sound/pci/emu10k1/emupcm.c
index 14a305bd8a985..72e442d86bb13 100644
--- a/sound/pci/emu10k1/emupcm.c
+++ b/sound/pci/emu10k1/emupcm.c
@@ -1850,7 +1850,9 @@ int snd_emu10k1_pcm_efx(struct snd_emu10k1 *emu, int device)
 	if (!kctl)
 		return -ENOMEM;
 	kctl->id.device = device;
-	snd_ctl_add(emu->card, kctl);
+	err = snd_ctl_add(emu->card, kctl);
+	if (err < 0)
+		return err;
 
 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci), 64*1024, 64*1024);
 

From 3d5262bd4c7a4e1f221fb215dcd74df929f791ea Mon Sep 17 00:00:00 2001
From: Zhouyang Jia <jiazhouyang09@gmail.com>
Date: Mon, 11 Jun 2018 16:04:06 +0800
Subject: [PATCH 1407/1852] ALSA: fm801: add error handling for snd_ctl_add

[ Upstream commit ef1ffbe7889e99f5b5cccb41c89e5c94f50f3218 ]

When snd_ctl_add fails, the lack of error-handling code may
cause unexpected results.

This patch adds error-handling code after calling snd_ctl_add.

Signed-off-by: Zhouyang Jia <jiazhouyang09@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/fm801.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/sound/pci/fm801.c b/sound/pci/fm801.c
index 1fdd92b6f18f3..d6e89a6d0bb91 100644
--- a/sound/pci/fm801.c
+++ b/sound/pci/fm801.c
@@ -1050,11 +1050,19 @@ static int snd_fm801_mixer(struct fm801 *chip)
 		if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
 			return err;
 	}
-	for (i = 0; i < FM801_CONTROLS; i++)
-		snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
+	for (i = 0; i < FM801_CONTROLS; i++) {
+		err = snd_ctl_add(chip->card,
+			snd_ctl_new1(&snd_fm801_controls[i], chip));
+		if (err < 0)
+			return err;
+	}
 	if (chip->multichannel) {
-		for (i = 0; i < FM801_CONTROLS_MULTI; i++)
-			snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
+		for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
+			err = snd_ctl_add(chip->card,
+				snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
+			if (err < 0)
+				return err;
+		}
 	}
 	return 0;
 }

From 64949f1d6a70ef382fd162afc93807a47158d65c Mon Sep 17 00:00:00 2001
From: Scott Mayhew <smayhew@redhat.com>
Date: Fri, 8 Jun 2018 16:31:46 -0400
Subject: [PATCH 1408/1852] nfsd: fix potential use-after-free in
 nfsd4_decode_getdeviceinfo

[ Upstream commit 3171822fdcdd6e6d536047c425af6dc7a92dc585 ]

When running a fuzz tester against a KASAN-enabled kernel, the following
splat periodically occurs.

The problem occurs when the test sends a GETDEVICEINFO request with a
malformed xdr array (size but no data) for gdia_notify_types and the
array size is > 0x3fffffff, which results in an overflow in the value of
nbytes which is passed to read_buf().

If the array size is 0x40000000, 0x80000000, or 0xc0000000, then after
the overflow occurs, the value of nbytes 0, and when that happens the
pointer returned by read_buf() points to the end of the xdr data (i.e.
argp->end) when really it should be returning NULL.

Fix this by returning NFS4ERR_BAD_XDR if the array size is > 1000 (this
value is arbitrary, but it's the same threshold used by
nfsd4_decode_bitmap()... in could really be any value >= 1 since it's
expected to get at most a single bitmap in gdia_notify_types).

[  119.256854] ==================================================================
[  119.257611] BUG: KASAN: use-after-free in nfsd4_decode_getdeviceinfo+0x5a4/0x5b0 [nfsd]
[  119.258422] Read of size 4 at addr ffff880113ada000 by task nfsd/538

[  119.259146] CPU: 0 PID: 538 Comm: nfsd Not tainted 4.17.0+ #1
[  119.259662] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.9.3-1.fc25 04/01/2014
[  119.261202] Call Trace:
[  119.262265]  dump_stack+0x71/0xab
[  119.263371]  print_address_description+0x6a/0x270
[  119.264609]  kasan_report+0x258/0x380
[  119.265854]  ? nfsd4_decode_getdeviceinfo+0x5a4/0x5b0 [nfsd]
[  119.267291]  nfsd4_decode_getdeviceinfo+0x5a4/0x5b0 [nfsd]
[  119.268549]  ? nfs4svc_decode_compoundargs+0xa5b/0x13c0 [nfsd]
[  119.269873]  ? nfsd4_decode_sequence+0x490/0x490 [nfsd]
[  119.271095]  nfs4svc_decode_compoundargs+0xa5b/0x13c0 [nfsd]
[  119.272393]  ? nfsd4_release_compoundargs+0x1b0/0x1b0 [nfsd]
[  119.273658]  nfsd_dispatch+0x183/0x850 [nfsd]
[  119.274918]  svc_process+0x161c/0x31a0 [sunrpc]
[  119.276172]  ? svc_printk+0x190/0x190 [sunrpc]
[  119.277386]  ? svc_xprt_release+0x451/0x680 [sunrpc]
[  119.278622]  nfsd+0x2b9/0x430 [nfsd]
[  119.279771]  ? nfsd_destroy+0x1c0/0x1c0 [nfsd]
[  119.281157]  kthread+0x2db/0x390
[  119.282347]  ? kthread_create_worker_on_cpu+0xc0/0xc0
[  119.283756]  ret_from_fork+0x35/0x40

[  119.286041] Allocated by task 436:
[  119.287525]  kasan_kmalloc+0xa0/0xd0
[  119.288685]  kmem_cache_alloc+0xe9/0x1f0
[  119.289900]  get_empty_filp+0x7b/0x410
[  119.291037]  path_openat+0xca/0x4220
[  119.292242]  do_filp_open+0x182/0x280
[  119.293411]  do_sys_open+0x216/0x360
[  119.294555]  do_syscall_64+0xa0/0x2f0
[  119.295721]  entry_SYSCALL_64_after_hwframe+0x44/0xa9

[  119.298068] Freed by task 436:
[  119.299271]  __kasan_slab_free+0x130/0x180
[  119.300557]  kmem_cache_free+0x78/0x210
[  119.301823]  rcu_process_callbacks+0x35b/0xbd0
[  119.303162]  __do_softirq+0x192/0x5ea

[  119.305443] The buggy address belongs to the object at ffff880113ada000
                which belongs to the cache filp of size 256
[  119.308556] The buggy address is located 0 bytes inside of
                256-byte region [ffff880113ada000, ffff880113ada100)
[  119.311376] The buggy address belongs to the page:
[  119.312728] page:ffffea00044eb680 count:1 mapcount:0 mapping:0000000000000000 index:0xffff880113ada780
[  119.314428] flags: 0x17ffe000000100(slab)
[  119.315740] raw: 0017ffe000000100 0000000000000000 ffff880113ada780 00000001000c0001
[  119.317379] raw: ffffea0004553c60 ffffea00045c11e0 ffff88011b167e00 0000000000000000
[  119.319050] page dumped because: kasan: bad access detected

[  119.321652] Memory state around the buggy address:
[  119.322993]  ffff880113ad9f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[  119.324515]  ffff880113ad9f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[  119.326087] >ffff880113ada000: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  119.327547]                    ^
[  119.328730]  ffff880113ada080: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  119.330218]  ffff880113ada100: fc fc fc fc fc fc fc fc fb fb fb fb fb fb fb fb
[  119.331740] ==================================================================

Signed-off-by: Scott Mayhew <smayhew@redhat.com>
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/nfsd/nfs4xdr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 57e3262ec57ac..ee0da259a3d3b 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -1538,6 +1538,8 @@ nfsd4_decode_getdeviceinfo(struct nfsd4_compoundargs *argp,
 	gdev->gd_maxcount = be32_to_cpup(p++);
 	num = be32_to_cpup(p++);
 	if (num) {
+		if (num > 1000)
+			goto xdr_error;
 		READ_BUF(4 * num);
 		gdev->gd_notify_types = be32_to_cpup(p++);
 		for (i = 1; i < num; i++) {

From 9feb0b978c5a7e3f0c7d9e7d3aa74eda3f42b283 Mon Sep 17 00:00:00 2001
From: Chintan Pandya <cpandya@codeaurora.org>
Date: Thu, 7 Jun 2018 17:06:50 -0700
Subject: [PATCH 1409/1852] mm: vmalloc: avoid racy handling of debugobjects in
 vunmap

[ Upstream commit f3c01d2f3ade6790db67f80fef60df84424f8964 ]

Currently, __vunmap flow is,
 1) Release the VM area
 2) Free the debug objects corresponding to that vm area.

This leave some race window open.
 1) Release the VM area
 1.5) Some other client gets the same vm area
 1.6) This client allocates new debug objects on the same
      vm area
 2) Free the debug objects corresponding to this vm area.

Here, we actually free 'other' client's debug objects.

Fix this by freeing the debug objects first and then releasing the VM
area.

Link: http://lkml.kernel.org/r/1523961828-9485-2-git-send-email-cpandya@codeaurora.org
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Byungchul Park <byungchul.park@lge.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Laura Abbott <labbott@redhat.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Wei Yang <richard.weiyang@gmail.com>
Cc: Yisheng Xie <xieyisheng1@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/vmalloc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 77f2f0f501d12..6e7d513467c6b 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1460,7 +1460,7 @@ static void __vunmap(const void *addr, int deallocate_pages)
 			addr))
 		return;
 
-	area = remove_vm_area(addr);
+	area = find_vmap_area((unsigned long)addr)->vm;
 	if (unlikely(!area)) {
 		WARN(1, KERN_ERR "Trying to vfree() nonexistent vm area (%p)\n",
 				addr);
@@ -1470,6 +1470,7 @@ static void __vunmap(const void *addr, int deallocate_pages)
 	debug_check_no_locks_freed(addr, get_vm_area_size(area));
 	debug_check_no_obj_freed(addr, get_vm_area_size(area));
 
+	remove_vm_area(addr);
 	if (deallocate_pages) {
 		int i;
 

From 5e014d1c7d7b51e9286491b1be40abd24462fda2 Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Thu, 7 Jun 2018 17:05:17 -0700
Subject: [PATCH 1410/1852] mm/slub.c: add __printf verification to slab_err()

[ Upstream commit a38965bf941b7c2af50de09c96bc5f03e136caef ]

__printf is useful to verify format and arguments.  Remove the following
warning (with W=1):

  mm/slub.c:721:2: warning: function might be possible candidate for `gnu_printf' format attribute [-Wsuggest-attribute=format]

Link: http://lkml.kernel.org/r/20180505200706.19986-1-malat@debian.org
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Christoph Lameter <cl@linux.com>
Cc: Pekka Enberg <penberg@kernel.org>
Cc: David Rientjes <rientjes@google.com>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/slub.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/slub.c b/mm/slub.c
index 06bed117ce90c..4a22f9d4e44d0 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -692,7 +692,7 @@ void object_err(struct kmem_cache *s, struct page *page,
 	print_trailer(s, page, object);
 }
 
-static void slab_err(struct kmem_cache *s, struct page *page,
+static __printf(3, 4) void slab_err(struct kmem_cache *s, struct page *page,
 			const char *fmt, ...)
 {
 	va_list args;

From e9442ee5f77961b497ad30bf9325b6841979a3bf Mon Sep 17 00:00:00 2001
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
Date: Tue, 5 Jun 2018 23:09:14 +0200
Subject: [PATCH 1411/1852] rtc: ensure rtc_set_alarm fails when alarms are not
 supported

[ Upstream commit abfdff44bc38e9e2ef7929f633fb8462632299d4 ]

When using RTC_ALM_SET or RTC_WKALM_SET with rtc_wkalrm.enabled not set,
rtc_timer_enqueue() is not called and rtc_set_alarm() may succeed but the
subsequent RTC_AIE_ON ioctl will fail. RTC_ALM_READ would also fail in that
case.

Ensure rtc_set_alarm() fails when alarms are not supported to avoid letting
programs think the alarms are working for a particular RTC when they are
not.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/rtc/interface.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index c2cf9485fe32e..8c10f3db6336f 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -349,6 +349,11 @@ int rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
 {
 	int err;
 
+	if (!rtc->ops)
+		return -ENODEV;
+	else if (!rtc->ops->set_alarm)
+		return -EINVAL;
+
 	err = rtc_valid_tm(&alarm->time);
 	if (err != 0)
 		return err;

From 5291e550c665aff835768437178fc76ece852f93 Mon Sep 17 00:00:00 2001
From: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
Date: Thu, 31 May 2018 18:45:21 +0200
Subject: [PATCH 1412/1852] netfilter: ipset: List timing out entries with
 "timeout 1" instead of zero

[ Upstream commit bd975e691486ba52790ba23cc9b4fecab7bc0d31 ]

When listing sets with timeout support, there's a probability that
just timing out entries with "0" timeout value is listed/saved.
However when restoring the saved list, the zero timeout value means
permanent elelements.

The new behaviour is that timing out entries are listed with "timeout 1"
instead of zero.

Fixes netfilter bugzilla #1258.

Signed-off-by: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/netfilter/ipset/ip_set_timeout.h | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/linux/netfilter/ipset/ip_set_timeout.h b/include/linux/netfilter/ipset/ip_set_timeout.h
index 1d6a935c1ac5f..8793f5a7b820e 100644
--- a/include/linux/netfilter/ipset/ip_set_timeout.h
+++ b/include/linux/netfilter/ipset/ip_set_timeout.h
@@ -65,8 +65,14 @@ ip_set_timeout_set(unsigned long *timeout, u32 value)
 static inline u32
 ip_set_timeout_get(unsigned long *timeout)
 {
-	return *timeout == IPSET_ELEM_PERMANENT ? 0 :
-		jiffies_to_msecs(*timeout - jiffies)/MSEC_PER_SEC;
+	u32 t;
+
+	if (*timeout == IPSET_ELEM_PERMANENT)
+		return 0;
+
+	t = jiffies_to_msecs(*timeout - jiffies)/MSEC_PER_SEC;
+	/* Zero value in userspace means no timeout */
+	return t == 0 ? 1 : t;
 }
 
 #endif	/* __KERNEL__ */

From 6b0e44d2886ae0b76a97cbd3223bf2da0d7b2c50 Mon Sep 17 00:00:00 2001
From: Cong Wang <xiyou.wangcong@gmail.com>
Date: Fri, 1 Jun 2018 11:31:44 -0700
Subject: [PATCH 1413/1852] infiniband: fix a possible use-after-free bug

[ Upstream commit cb2595c1393b4a5211534e6f0a0fbad369e21ad8 ]

ucma_process_join() will free the new allocated "mc" struct,
if there is any error after that, especially the copy_to_user().

But in parallel, ucma_leave_multicast() could find this "mc"
through idr_find() before ucma_process_join() frees it, since it
is already published.

So "mc" could be used in ucma_leave_multicast() after it is been
allocated and freed in ucma_process_join(), since we don't refcnt
it.

Fix this by separating "publish" from ID allocation, so that we
can get an ID first and publish it later after copy_to_user().

Fixes: c8f6a362bf3e ("RDMA/cma: Add multicast communication support")
Reported-by: Noam Rathaus <noamr@beyondsecurity.com>
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/core/ucma.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index 795938edce3fc..55aa8d3d752f3 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -217,7 +217,7 @@ static struct ucma_multicast* ucma_alloc_multicast(struct ucma_context *ctx)
 		return NULL;
 
 	mutex_lock(&mut);
-	mc->id = idr_alloc(&multicast_idr, mc, 0, 0, GFP_KERNEL);
+	mc->id = idr_alloc(&multicast_idr, NULL, 0, 0, GFP_KERNEL);
 	mutex_unlock(&mut);
 	if (mc->id < 0)
 		goto error;
@@ -1375,6 +1375,10 @@ static ssize_t ucma_process_join(struct ucma_file *file,
 		goto err3;
 	}
 
+	mutex_lock(&mut);
+	idr_replace(&multicast_idr, mc, mc->id);
+	mutex_unlock(&mut);
+
 	mutex_unlock(&file->mut);
 	ucma_put_ctx(ctx);
 	return 0;

From 8fd32af239d84edf179f8dee22ba1b0a7a391c35 Mon Sep 17 00:00:00 2001
From: Stewart Smith <stewart@linux.ibm.com>
Date: Thu, 29 Mar 2018 17:02:46 +1100
Subject: [PATCH 1414/1852] hvc_opal: don't set tb_ticks_per_usec in
 udbg_init_opal_common()

[ Upstream commit 447808bf500a7cc92173266a59f8a494e132b122 ]

time_init() will set up tb_ticks_per_usec based on reality.
time_init() is called *after* udbg_init_opal_common() during boot.

from arch/powerpc/kernel/time.c:
  unsigned long tb_ticks_per_usec = 100; /* sane default */

Currently, all powernv systems have a timebase frequency of 512mhz
(512000000/1000000 == 0x200) - although there's nothing written
down anywhere that I can find saying that we couldn't make that
different based on the requirements in the ISA.

So, we've been (accidentally) thwacking the (currently) correct
(for powernv at least) value for tb_ticks_per_usec earlier than
we otherwise would have.

The "sane default" seems to be adequate for our purposes between
udbg_init_opal_common() and time_init() being called, and if it isn't,
then we should probably be setting it somewhere that isn't hvc_opal.c!

Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/hvc/hvc_opal.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c
index 47b54c6aefd26..9f660e55d1baa 100644
--- a/drivers/tty/hvc/hvc_opal.c
+++ b/drivers/tty/hvc/hvc_opal.c
@@ -323,7 +323,6 @@ static void udbg_init_opal_common(void)
 	udbg_putc = udbg_opal_putc;
 	udbg_getc = udbg_opal_getc;
 	udbg_getc_poll = udbg_opal_getc_poll;
-	tb_ticks_per_usec = 0x200; /* Make udelay not suck */
 }
 
 void __init hvc_opal_init_early(void)

From 3782909374c9aff69e88827e7bdf23a2a98a7622 Mon Sep 17 00:00:00 2001
From: Nicholas Piggin <npiggin@gmail.com>
Date: Wed, 30 May 2018 20:31:22 +1000
Subject: [PATCH 1415/1852] powerpc/64s: Fix compiler store ordering to SLB
 shadow area

[ Upstream commit 926bc2f100c24d4842b3064b5af44ae964c1d81c ]

The stores to update the SLB shadow area must be made as they appear
in the C code, so that the hypervisor does not see an entry with
mismatched vsid and esid. Use WRITE_ONCE for this.

GCC has been observed to elide the first store to esid in the update,
which means that if the hypervisor interrupts the guest after storing
to vsid, it could see an entry with old esid and new vsid, which may
possibly result in memory corruption.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/mm/slb.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 515730e499fe6..309027208f7c0 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -69,14 +69,14 @@ static inline void slb_shadow_update(unsigned long ea, int ssize,
 	 * updating it.  No write barriers are needed here, provided
 	 * we only update the current CPU's SLB shadow buffer.
 	 */
-	p->save_area[index].esid = 0;
-	p->save_area[index].vsid = cpu_to_be64(mk_vsid_data(ea, ssize, flags));
-	p->save_area[index].esid = cpu_to_be64(mk_esid_data(ea, ssize, index));
+	WRITE_ONCE(p->save_area[index].esid, 0);
+	WRITE_ONCE(p->save_area[index].vsid, cpu_to_be64(mk_vsid_data(ea, ssize, flags)));
+	WRITE_ONCE(p->save_area[index].esid, cpu_to_be64(mk_esid_data(ea, ssize, index)));
 }
 
 static inline void slb_shadow_clear(enum slb_index index)
 {
-	get_slb_shadow()->save_area[index].esid = 0;
+	WRITE_ONCE(get_slb_shadow()->save_area[index].esid, 0);
 }
 
 static inline void create_shadowed_slbe(unsigned long ea, int ssize,

From 80b355807924f62a48bbdfc84e88880a5bddb368 Mon Sep 17 00:00:00 2001
From: Leon Romanovsky <leonro@mellanox.com>
Date: Tue, 29 May 2018 14:56:19 +0300
Subject: [PATCH 1416/1852] RDMA/mad: Convert BUG_ONs to error flows

[ Upstream commit 2468b82d69e3a53d024f28d79ba0fdb8bf43dfbf ]

Let's perform checks in-place instead of BUG_ONs.

Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/core/mad.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/infiniband/core/mad.c b/drivers/infiniband/core/mad.c
index 8d84c563ba753..616173b7a5e8a 100644
--- a/drivers/infiniband/core/mad.c
+++ b/drivers/infiniband/core/mad.c
@@ -1548,7 +1548,8 @@ static int add_oui_reg_req(struct ib_mad_reg_req *mad_reg_req,
 			    mad_reg_req->oui, 3)) {
 			method = &(*vendor_table)->vendor_class[
 						vclass]->method_table[i];
-			BUG_ON(!*method);
+			if (!*method)
+				goto error3;
 			goto check_in_use;
 		}
 	}
@@ -1558,10 +1559,12 @@ static int add_oui_reg_req(struct ib_mad_reg_req *mad_reg_req,
 				vclass]->oui[i])) {
 			method = &(*vendor_table)->vendor_class[
 				vclass]->method_table[i];
-			BUG_ON(*method);
 			/* Allocate method table for this OUI */
-			if ((ret = allocate_method_table(method)))
-				goto error3;
+			if (!*method) {
+				ret = allocate_method_table(method);
+				if (ret)
+					goto error3;
+			}
 			memcpy((*vendor_table)->vendor_class[vclass]->oui[i],
 			       mad_reg_req->oui, 3);
 			goto check_in_use;

From cfae831ada9130fa20644a0025be3f83fbce40eb Mon Sep 17 00:00:00 2001
From: Anatoly Pugachev <matorola@gmail.com>
Date: Mon, 28 May 2018 02:06:37 +0300
Subject: [PATCH 1417/1852] disable loading f2fs module on PAGE_SIZE > 4KB

[ Upstream commit 4071e67cffcc5c2a007116a02437471351f550eb ]

The following patch disables loading of f2fs module on architectures
which have PAGE_SIZE > 4096 , since it is impossible to mount f2fs on
such architectures , log messages are:

mount: /mnt: wrong fs type, bad option, bad superblock on
/dev/vdiskb1, missing codepage or helper program, or other error.
/dev/vdiskb1: F2FS filesystem,
UUID=1d8b9ca4-2389-4910-af3b-10998969f09c, volume name ""

May 15 18:03:13 ttip kernel: F2FS-fs (vdiskb1): Invalid
page_cache_size (8192), supports only 4KB
May 15 18:03:13 ttip kernel: F2FS-fs (vdiskb1): Can't find valid F2FS
filesystem in 1th superblock
May 15 18:03:13 ttip kernel: F2FS-fs (vdiskb1): Invalid
page_cache_size (8192), supports only 4KB
May 15 18:03:13 ttip kernel: F2FS-fs (vdiskb1): Can't find valid F2FS
filesystem in 2th superblock
May 15 18:03:13 ttip kernel: F2FS-fs (vdiskb1): Invalid
page_cache_size (8192), supports only 4KB

which was introduced by git commit 5c9b469295fb6b10d98923eab5e79c4edb80ed20

tested on git kernel 4.17.0-rc6-00309-gec30dcf7f425

with patch applied:

modprobe: ERROR: could not insert 'f2fs': Invalid argument
May 28 01:40:28 v215 kernel: F2FS not supported on PAGE_SIZE(8192) != 4096

Signed-off-by: Anatoly Pugachev <matorola@gmail.com>
Reviewed-by: Chao Yu <yuchao0@huawei.com>
Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/f2fs/super.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index d73e46d07ab32..177e773b8fc25 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/super.c
@@ -3077,6 +3077,12 @@ static int __init init_f2fs_fs(void)
 {
 	int err;
 
+	if (PAGE_SIZE != F2FS_BLKSIZE) {
+		printk("F2FS not supported on PAGE_SIZE(%lu) != %d\n",
+				PAGE_SIZE, F2FS_BLKSIZE);
+		return -EINVAL;
+	}
+
 	f2fs_build_trace_ios();
 
 	err = init_inodecache();

From 70d8fde9a7fba8cfffb935a0ffe0920c19239388 Mon Sep 17 00:00:00 2001
From: Chao Yu <yuchao0@huawei.com>
Date: Sat, 26 May 2018 18:03:34 +0800
Subject: [PATCH 1418/1852] f2fs: fix to don't trigger writeback during
 recovery

[ Upstream commit 64c74a7ab505ea40d1b3e5d02735ecab08ae1b14 ]

- f2fs_fill_super
 - recover_fsync_data
  - recover_data
   - del_fsync_inode
    - iput
     - iput_final
      - write_inode_now
       - f2fs_write_inode
        - f2fs_balance_fs
         - f2fs_balance_fs_bg
          - sync_dirty_inodes

With data_flush mount option, during recovery, in order to avoid entering
above writeback flow, let's detect recovery status and do skip in
f2fs_balance_fs_bg.

Signed-off-by: Chao Yu <yuchao0@huawei.com>
Signed-off-by: Yunlei He <heyunlei@huawei.com>
Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/f2fs/segment.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index a02d5c1a7ed2f..1c7b75a760dae 100644
--- a/fs/f2fs/segment.c
+++ b/fs/f2fs/segment.c
@@ -478,6 +478,9 @@ void f2fs_balance_fs(struct f2fs_sb_info *sbi, bool need)
 
 void f2fs_balance_fs_bg(struct f2fs_sb_info *sbi)
 {
+	if (unlikely(is_sbi_flag_set(sbi, SBI_POR_DOING)))
+		return;
+
 	/* try to shrink extent cache when there is no enough memory */
 	if (!available_free_memory(sbi, EXTENT_CACHE))
 		f2fs_shrink_extent_tree(sbi, EXTENT_CACHE_SHRINK_NUMBER);

From d29c54af7a9ae14b69ed5ae21b8084238c8f0782 Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Tue, 29 May 2018 16:13:03 -0600
Subject: [PATCH 1419/1852] usbip: usbip_detach: Fix memory, udev context and
 udev leak

[ Upstream commit d179f99a651685b19333360e6558110da2fe9bd7 ]

detach_port() fails to call usbip_vhci_driver_close() from its error
path after usbip_vhci_detach_device() returns failure, leaking memory
allocated in usbip_vhci_driver_open() and holding udev_context and udev
references. Fix it to call usbip_vhci_driver_close().

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/usb/usbip/src/usbip_detach.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tools/usb/usbip/src/usbip_detach.c b/tools/usb/usbip/src/usbip_detach.c
index 9db9d21bb2ece..6a8db858caa5f 100644
--- a/tools/usb/usbip/src/usbip_detach.c
+++ b/tools/usb/usbip/src/usbip_detach.c
@@ -43,7 +43,7 @@ void usbip_detach_usage(void)
 
 static int detach_port(char *port)
 {
-	int ret;
+	int ret = 0;
 	uint8_t portnum;
 	char path[PATH_MAX+1];
 
@@ -73,9 +73,12 @@ static int detach_port(char *port)
 	}
 
 	ret = usbip_vhci_detach_device(portnum);
-	if (ret < 0)
-		return -1;
+	if (ret < 0) {
+		ret = -1;
+		goto call_driver_close;
+	}
 
+call_driver_close:
 	usbip_vhci_driver_close();
 
 	return ret;

From 84dcf470fb324ddc6f06b84a71c2eb3a4c676f30 Mon Sep 17 00:00:00 2001
From: Kan Liang <kan.liang@intel.com>
Date: Thu, 3 May 2018 11:25:08 -0700
Subject: [PATCH 1420/1852] perf/x86/intel/uncore: Correct fixed counter index
 check in generic code

[ Upstream commit 4749f8196452eeb73cf2086a6a9705bae479d33d ]

There is no index which is bigger than UNCORE_PMC_IDX_FIXED. The only
exception is client IMC uncore, which has been specially handled.
For generic code, it is not correct to use >= to check fixed counter.
The code quality issue will bring problem when a new counter index is
introduced.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1525371913-10597-3-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/perf_event_intel_uncore.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 61215a69b03d9..b22e9c4dd111f 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -229,7 +229,7 @@ void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *e
 	u64 prev_count, new_count, delta;
 	int shift;
 
-	if (event->hw.idx >= UNCORE_PMC_IDX_FIXED)
+	if (event->hw.idx == UNCORE_PMC_IDX_FIXED)
 		shift = 64 - uncore_fixed_ctr_bits(box);
 	else
 		shift = 64 - uncore_perf_ctr_bits(box);

From 2ab59544933fe2a5c49a8abc5cf0ee1aa551576b Mon Sep 17 00:00:00 2001
From: Kan Liang <kan.liang@intel.com>
Date: Thu, 3 May 2018 11:25:07 -0700
Subject: [PATCH 1421/1852] perf/x86/intel/uncore: Correct fixed counter index
 check for NHM

[ Upstream commit d71f11c076c420c4e2fceb4faefa144e055e0935 ]

For Nehalem and Westmere, there is only one fixed counter for W-Box.
There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
It is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1525371913-10597-2-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
index 2749965afed0b..83cadc2605a78 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c
@@ -240,7 +240,7 @@ static void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct p
 {
 	struct hw_perf_event *hwc = &event->hw;
 
-	if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
+	if (hwc->idx == UNCORE_PMC_IDX_FIXED)
 		wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
 	else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
 		wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);

From 7558e714a6b6b8ee48c78f6e34203946e288332e Mon Sep 17 00:00:00 2001
From: Shaul Triebitz <shaul.triebitz@intel.com>
Date: Thu, 22 Mar 2018 14:14:45 +0200
Subject: [PATCH 1422/1852] iwlwifi: pcie: fix race in Rx buffer allocator

[ Upstream commit 0f22e40053bd5378ad1e3250e65c574fd61c0cd6 ]

Make sure the rx_allocator worker is canceled before running the
rx_init routine.  rx_init frees and re-allocates all rxb's pages.  The
rx_allocator worker also allocates pages for the used rxb's.  Running
rx_init and rx_allocator simultaniously causes a kernel panic.  Fix
that by canceling the work in rx_init.

Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/iwlwifi/pcie/rx.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/wireless/iwlwifi/pcie/rx.c b/drivers/net/wireless/iwlwifi/pcie/rx.c
index e06591f625c4a..d6f9858ff2de4 100644
--- a/drivers/net/wireless/iwlwifi/pcie/rx.c
+++ b/drivers/net/wireless/iwlwifi/pcie/rx.c
@@ -713,6 +713,8 @@ int iwl_pcie_rx_init(struct iwl_trans *trans)
 						WQ_HIGHPRI | WQ_UNBOUND, 1);
 	INIT_WORK(&rba->rx_alloc, iwl_pcie_rx_allocator_work);
 
+	cancel_work_sync(&rba->rx_alloc);
+
 	spin_lock(&rba->lock);
 	atomic_set(&rba->req_pending, 0);
 	atomic_set(&rba->req_ready, 0);

From 5bcab17ad9561c9764a30d9f27b056fbb630596e Mon Sep 17 00:00:00 2001
From: Thierry Escande <thierry.escande@linaro.org>
Date: Tue, 29 May 2018 18:37:16 +0200
Subject: [PATCH 1423/1852] Bluetooth: hci_qca: Fix "Sleep inside atomic
 section" warning

[ Upstream commit 9960521c44a5d828f29636ceac0600603ecbddbf ]

This patch fixes the following warning during boot:

 do not call blocking ops when !TASK_RUNNING; state=1 set at
 [<(ptrval)>] qca_setup+0x194/0x750 [hci_uart]
 WARNING: CPU: 2 PID: 1878 at kernel/sched/core.c:6135
 __might_sleep+0x7c/0x88

In qca_set_baudrate(), the current task state is set to
TASK_UNINTERRUPTIBLE before going to sleep for 300ms. It was then
restored to TASK_INTERRUPTIBLE. This patch sets the current task state
back to TASK_RUNNING instead.

Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/bluetooth/hci_qca.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 476d39c7ba208..ecfb9ed2cff64 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -884,7 +884,7 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
 	 */
 	set_current_state(TASK_UNINTERRUPTIBLE);
 	schedule_timeout(msecs_to_jiffies(BAUDRATE_SETTLE_TIMEOUT_MS));
-	set_current_state(TASK_INTERRUPTIBLE);
+	set_current_state(TASK_RUNNING);
 
 	return 0;
 }

From 854caf707ba0113d9bf7a315f31a577e412a5a64 Mon Sep 17 00:00:00 2001
From: Jian-Hong Pan <jian-hong@endlessm.com>
Date: Mon, 21 May 2018 18:09:20 +0800
Subject: [PATCH 1424/1852] Bluetooth: btusb: Add a new Realtek 8723DE ID
 2ff8:b011

[ Upstream commit 66d9975c5a7c40aa7e4bb0ec0b0c37ba1f190923 ]

Without this patch we cannot turn on the Bluethooth adapter on ASUS
E406MA.

T:  Bus=01 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=12   MxCh= 0
D:  Ver= 1.10 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs=  1
P:  Vendor=2ff8 ProdID=b011 Rev= 2.00
S:  Manufacturer=Realtek
S:  Product=802.11n WLAN Adapter
S:  SerialNumber=00e04c000001
C:* #Ifs= 2 Cfg#= 1 Atr=e0 MxPwr=500mA
I:* If#= 0 Alt= 0 #EPs= 3 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=81(I) Atr=03(Int.) MxPS=  16 Ivl=1ms
E:  Ad=02(O) Atr=02(Bulk) MxPS=  64 Ivl=0ms
E:  Ad=82(I) Atr=02(Bulk) MxPS=  64 Ivl=0ms
I:* If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=   0 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=   0 Ivl=1ms
I:  If#= 1 Alt= 1 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=   9 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=   9 Ivl=1ms
I:  If#= 1 Alt= 2 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  17 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  17 Ivl=1ms
I:  If#= 1 Alt= 3 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  25 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  25 Ivl=1ms
I:  If#= 1 Alt= 4 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  33 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  33 Ivl=1ms
I:  If#= 1 Alt= 5 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb
E:  Ad=03(O) Atr=01(Isoc) MxPS=  49 Ivl=1ms
E:  Ad=83(I) Atr=01(Isoc) MxPS=  49 Ivl=1ms

Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/bluetooth/btusb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 91676535a1a3c..4a899b41145e8 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -339,6 +339,9 @@ static const struct usb_device_id blacklist_table[] = {
 	/* Additional Realtek 8723BU Bluetooth devices */
 	{ USB_DEVICE(0x7392, 0xa611), .driver_info = BTUSB_REALTEK },
 
+	/* Additional Realtek 8723DE Bluetooth devices */
+	{ USB_DEVICE(0x2ff8, 0xb011), .driver_info = BTUSB_REALTEK },
+
 	/* Additional Realtek 8821AE Bluetooth devices */
 	{ USB_DEVICE(0x0b05, 0x17dc), .driver_info = BTUSB_REALTEK },
 	{ USB_DEVICE(0x13d3, 0x3414), .driver_info = BTUSB_REALTEK },

From 660cea04dee312bea01af18b15482ff5285dcda7 Mon Sep 17 00:00:00 2001
From: Kai Chieh Chuang <kaichieh.chuang@mediatek.com>
Date: Mon, 28 May 2018 10:18:18 +0800
Subject: [PATCH 1425/1852] ASoC: dpcm: fix BE dai not hw_free and shutdown

[ Upstream commit 9c0ac70ad24d76b873c1551e27790c7f6a815d5c ]

In case, one BE is used by two FE1/FE2
FE1--->BE-->
       |
FE2----]
when FE1/FE2 call dpcm_be_dai_hw_free() together
the BE users will be 2 (> 1), hence cannot be hw_free
the be state will leave at, ex. SND_SOC_DPCM_STATE_STOP

later FE1/FE2 call dpcm_be_dai_shutdown(),
will be skip due to wrong state.
leaving the BE not being hw_free and shutdown.

The BE dai will be hw_free later when calling
dpcm_be_dai_shutdown() if still in invalid state.

Signed-off-by: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/soc-pcm.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index 977066ba17691..43b80db952d17 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -1682,8 +1682,10 @@ int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream)
 			continue;
 
 		if ((be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_FREE) &&
-		    (be->dpcm[stream].state != SND_SOC_DPCM_STATE_OPEN))
-			continue;
+		    (be->dpcm[stream].state != SND_SOC_DPCM_STATE_OPEN)) {
+			soc_pcm_hw_free(be_substream);
+			be->dpcm[stream].state = SND_SOC_DPCM_STATE_HW_FREE;
+		}
 
 		dev_dbg(be->dev, "ASoC: close BE %s\n",
 			dpcm->fe->dai_link->name);

From 338701c0ef2235bb056bac8bffe1ac859cbfce69 Mon Sep 17 00:00:00 2001
From: Vincent Palatin <vpalatin@chromium.org>
Date: Wed, 18 Apr 2018 12:23:58 +0200
Subject: [PATCH 1426/1852] mfd: cros_ec: Fail early if we cannot identify the
 EC

[ Upstream commit 0dbbf25561b29ffab5ba6277429760abdf49ceff ]

If we cannot communicate with the EC chip to detect the protocol version
and its features, it's very likely useless to continue. Else we will
commit all kind of uninformed mistakes (using the wrong protocol, the
wrong buffer size, mixing the EC with other chips).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mfd/cros_ec.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/cros_ec.c b/drivers/mfd/cros_ec.c
index 0eee635420383..115a6f67ab51e 100644
--- a/drivers/mfd/cros_ec.c
+++ b/drivers/mfd/cros_ec.c
@@ -68,7 +68,11 @@ int cros_ec_register(struct cros_ec_device *ec_dev)
 
 	mutex_init(&ec_dev->lock);
 
-	cros_ec_query_all(ec_dev);
+	err = cros_ec_query_all(ec_dev);
+	if (err) {
+		dev_err(dev, "Cannot identify the EC: error %d\n", err);
+		return err;
+	}
 
 	err = mfd_add_devices(ec_dev->dev, PLATFORM_DEVID_AUTO, &ec_cell, 1,
 			      NULL, ec_dev->irq, NULL);

From 6496cbaf3f1a67cfb9832cb9a29d6c090ba39067 Mon Sep 17 00:00:00 2001
From: Ganapathi Bhat <gbhat@marvell.com>
Date: Thu, 24 May 2018 19:18:27 +0530
Subject: [PATCH 1427/1852] mwifiex: handle race during mwifiex_usb_disconnect

[ Upstream commit b817047ae70c0bd67b677b65d0d69d72cd6e9728 ]

Race condition is observed during rmmod of mwifiex_usb:

1. The rmmod thread will call mwifiex_usb_disconnect(), download
   SHUTDOWN command and do wait_event_interruptible_timeout(),
   waiting for response.

2. The main thread will handle the response and will do a
   wake_up_interruptible(), unblocking rmmod thread.

3. On getting unblocked, rmmod thread  will make rx_cmd.urb = NULL in
   mwifiex_usb_free().

4. The main thread will try to resubmit rx_cmd.urb in
   mwifiex_usb_submit_rx_urb(), which is NULL.

To fix, wait for main thread to complete before calling
mwifiex_usb_free().

Signed-off-by: Ganapathi Bhat <gbhat@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/mwifiex/usb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/wireless/mwifiex/usb.c b/drivers/net/wireless/mwifiex/usb.c
index e43aff932360e..1a1b1de875835 100644
--- a/drivers/net/wireless/mwifiex/usb.c
+++ b/drivers/net/wireless/mwifiex/usb.c
@@ -624,6 +624,9 @@ static void mwifiex_usb_disconnect(struct usb_interface *intf)
 					 MWIFIEX_FUNC_SHUTDOWN);
 	}
 
+	if (adapter->workqueue)
+		flush_workqueue(adapter->workqueue);
+
 	mwifiex_usb_free(card);
 
 	mwifiex_dbg(adapter, FATAL,

From b750164615cdf4be2943536a2d9ba9c6582cd4f9 Mon Sep 17 00:00:00 2001
From: Eyal Reizer <eyalreizer@gmail.com>
Date: Mon, 28 May 2018 11:36:42 +0300
Subject: [PATCH 1428/1852] wlcore: sdio: check for valid platform device data
 before suspend

[ Upstream commit 6e91d48371e79862ea2c05867aaebe4afe55a865 ]

the wl pointer can be null In case only wlcore_sdio is probed while
no WiLink module is successfully probed, as in the case of mounting a
wl12xx module while using a device tree file configured with wl18xx
related settings.
In this case the system was crashing in wl1271_suspend() as platform
device data is not set.
Make sure wl the pointer is valid before using it.

Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ti/wlcore/sdio.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/wireless/ti/wlcore/sdio.c b/drivers/net/wireless/ti/wlcore/sdio.c
index c172da56b550b..e4a8280cea832 100644
--- a/drivers/net/wireless/ti/wlcore/sdio.c
+++ b/drivers/net/wireless/ti/wlcore/sdio.c
@@ -388,6 +388,11 @@ static int wl1271_suspend(struct device *dev)
 	mmc_pm_flag_t sdio_flags;
 	int ret = 0;
 
+	if (!wl) {
+		dev_err(dev, "no wilink module was probed\n");
+		goto out;
+	}
+
 	dev_dbg(dev, "wl1271 suspend. wow_enabled: %d\n",
 		wl->wow_enabled);
 

From bf68e13afa062c5694a4a940ebc8beb1d37a3ef3 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 21 May 2018 08:43:02 -0400
Subject: [PATCH 1429/1852] media: videobuf2-core: don't call memop 'finish'
 when queueing

[ Upstream commit 90b2da89a083e1395cb322521a42397c49ae4500 ]

When a buffer is queued or requeued in vb2_buffer_done, then don't
call the finish memop. In this case the buffer is only returned to vb2,
not to userspace.

Calling 'finish' here will cause an unbalance when the queue is
canceled, since the core will call the same memop again.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/v4l2-core/videobuf2-core.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c
index b58b02999ca40..76f67f9ad30cd 100644
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ b/drivers/media/v4l2-core/videobuf2-core.c
@@ -868,9 +868,12 @@ void vb2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state)
 	dprintk(4, "done processing on buffer %d, state: %d\n",
 			vb->index, state);
 
-	/* sync buffers */
-	for (plane = 0; plane < vb->num_planes; ++plane)
-		call_void_memop(vb, finish, vb->planes[plane].mem_priv);
+	if (state != VB2_BUF_STATE_QUEUED &&
+	    state != VB2_BUF_STATE_REQUEUEING) {
+		/* sync buffers */
+		for (plane = 0; plane < vb->num_planes; ++plane)
+			call_void_memop(vb, finish, vb->planes[plane].mem_priv);
+	}
 
 	spin_lock_irqsave(&q->done_lock, flags);
 	if (state == VB2_BUF_STATE_QUEUED ||

From 0644d10379477205a79d2516f73e12a766595571 Mon Sep 17 00:00:00 2001
From: David Sterba <dsterba@suse.com>
Date: Tue, 24 Apr 2018 14:53:56 +0200
Subject: [PATCH 1430/1852] btrfs: add barriers to btrfs_sync_log before
 log_commit_wait wakeups

[ Upstream commit 3d3a2e610ea5e7c6d4f9481ecce5d8e2d8317843 ]

Currently the code assumes that there's an implied barrier by the
sequence of code preceding the wakeup, namely the mutex unlock.

As Nikolay pointed out:

I think this is wrong (not your code) but the original assumption that
the RELEASE semantics provided by mutex_unlock is sufficient.
According to memory-barriers.txt:

Section 'LOCK ACQUISITION FUNCTIONS' states:

 (2) RELEASE operation implication:

     Memory operations issued before the RELEASE will be completed before the
     RELEASE operation has completed.

     Memory operations issued after the RELEASE *may* be completed before the
     RELEASE operation has completed.

(I've bolded the may portion)

The example given there:

As an example, consider the following:

    *A = a;
    *B = b;
    ACQUIRE
    *C = c;
    *D = d;
    RELEASE
    *E = e;
    *F = f;

The following sequence of events is acceptable:

    ACQUIRE, {*F,*A}, *E, {*C,*D}, *B, RELEASE

So if we assume that *C is modifying the flag which the waitqueue is checking,
and *E is the actual wakeup, then those accesses can be re-ordered...

IMHO this code should be considered broken...
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/tree-log.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index 738f5d6beb95e..2c7f9a5f87177 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -2961,8 +2961,11 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans,
 	mutex_unlock(&log_root_tree->log_mutex);
 
 	/*
-	 * The barrier before waitqueue_active is implied by mutex_unlock
+	 * The barrier before waitqueue_active is needed so all the updates
+	 * above are seen by the woken threads. It might not be necessary, but
+	 * proving that seems to be hard.
 	 */
+	smp_mb();
 	if (waitqueue_active(&log_root_tree->log_commit_wait[index2]))
 		wake_up(&log_root_tree->log_commit_wait[index2]);
 out:
@@ -2973,8 +2976,11 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans,
 	mutex_unlock(&root->log_mutex);
 
 	/*
-	 * The barrier before waitqueue_active is implied by mutex_unlock
+	 * The barrier before waitqueue_active is needed so all the updates
+	 * above are seen by the woken threads. It might not be necessary, but
+	 * proving that seems to be hard.
 	 */
+	smp_mb();
 	if (waitqueue_active(&root->log_commit_wait[index1]))
 		wake_up(&root->log_commit_wait[index1]);
 	return ret;

From d9a1cec59d5ea0418e093884f80e8c3bf03fa868 Mon Sep 17 00:00:00 2001
From: Qu Wenruo <wqu@suse.com>
Date: Mon, 14 May 2018 09:38:13 +0800
Subject: [PATCH 1431/1852] btrfs: qgroup: Finish rescan when hit the last leaf
 of extent tree

[ Upstream commit ff3d27a048d926b3920ccdb75d98788c567cae0d ]

Under the following case, qgroup rescan can double account cowed tree
blocks:

In this case, extent tree only has one tree block.

-
| transid=5 last committed=4
| btrfs_qgroup_rescan_worker()
| |- btrfs_start_transaction()
| |  transid = 5
| |- qgroup_rescan_leaf()
|    |- btrfs_search_slot_for_read() on extent tree
|       Get the only extent tree block from commit root (transid = 4).
|       Scan it, set qgroup_rescan_progress to the last
|       EXTENT/META_ITEM + 1
|       now qgroup_rescan_progress = A + 1.
|
| fs tree get CoWed, new tree block is at A + 16K
| transid 5 get committed
-
| transid=6 last committed=5
| btrfs_qgroup_rescan_worker()
| btrfs_qgroup_rescan_worker()
| |- btrfs_start_transaction()
| |  transid = 5
| |- qgroup_rescan_leaf()
|    |- btrfs_search_slot_for_read() on extent tree
|       Get the only extent tree block from commit root (transid = 5).
|       scan it using qgroup_rescan_progress (A + 1).
|       found new tree block beyong A, and it's fs tree block,
|       account it to increase qgroup numbers.
-

In above case, tree block A, and tree block A + 16K get accounted twice,
while qgroup rescan should stop when it already reach the last leaf,
other than continue using its qgroup_rescan_progress.

Such case could happen by just looping btrfs/017 and with some
possibility it can hit such double qgroup accounting problem.

Fix it by checking the path to determine if we should finish qgroup
rescan, other than relying on next loop to exit.

Reported-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/qgroup.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/fs/btrfs/qgroup.c b/fs/btrfs/qgroup.c
index 88d9b66e2207c..a751937dded57 100644
--- a/fs/btrfs/qgroup.c
+++ b/fs/btrfs/qgroup.c
@@ -2185,6 +2185,21 @@ void assert_qgroups_uptodate(struct btrfs_trans_handle *trans)
 	BUG();
 }
 
+/*
+ * Check if the leaf is the last leaf. Which means all node pointers
+ * are at their last position.
+ */
+static bool is_last_leaf(struct btrfs_path *path)
+{
+	int i;
+
+	for (i = 1; i < BTRFS_MAX_LEVEL && path->nodes[i]; i++) {
+		if (path->slots[i] != btrfs_header_nritems(path->nodes[i]) - 1)
+			return false;
+	}
+	return true;
+}
+
 /*
  * returns < 0 on error, 0 when more leafs are to be scanned.
  * returns 1 when done.
@@ -2198,6 +2213,7 @@ qgroup_rescan_leaf(struct btrfs_fs_info *fs_info, struct btrfs_path *path,
 	struct ulist *roots = NULL;
 	struct seq_list tree_mod_seq_elem = SEQ_LIST_INIT(tree_mod_seq_elem);
 	u64 num_bytes;
+	bool done;
 	int slot;
 	int ret;
 
@@ -2225,6 +2241,7 @@ qgroup_rescan_leaf(struct btrfs_fs_info *fs_info, struct btrfs_path *path,
 		mutex_unlock(&fs_info->qgroup_rescan_lock);
 		return ret;
 	}
+	done = is_last_leaf(path);
 
 	btrfs_item_key_to_cpu(path->nodes[0], &found,
 			      btrfs_header_nritems(path->nodes[0]) - 1);
@@ -2271,6 +2288,8 @@ qgroup_rescan_leaf(struct btrfs_fs_info *fs_info, struct btrfs_path *path,
 	}
 	btrfs_put_tree_mod_seq(fs_info, &tree_mod_seq_elem);
 
+	if (done && !ret)
+		ret = 1;
 	return ret;
 }
 

From 5bdd37a57d447e5c3c6cad14af2a595951bb225e Mon Sep 17 00:00:00 2001
From: Christoph Hellwig <hch@lst.de>
Date: Fri, 18 May 2018 18:56:24 +0200
Subject: [PATCH 1432/1852] PCI: Prevent sysfs disable of device while driver
 is attached

[ Upstream commit 6f5cdfa802733dcb561bf664cc89d203f2fd958f ]

Manipulating the enable_cnt behind the back of the driver will wreak
complete havoc with the kernel state, so disallow it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Acked-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/pci-sysfs.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index ec91cd17bf349..5fb4ed6ea3224 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -180,13 +180,16 @@ static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
 
-	if (!val) {
-		if (pci_is_enabled(pdev))
-			pci_disable_device(pdev);
-		else
-			result = -EIO;
-	} else
+	device_lock(dev);
+	if (dev->driver)
+		result = -EBUSY;
+	else if (val)
 		result = pci_enable_device(pdev);
+	else if (pci_is_enabled(pdev))
+		pci_disable_device(pdev);
+	else
+		result = -EIO;
+	device_unlock(dev);
 
 	return result < 0 ? result : count;
 }

From d2b40e03fe2a4583decd16983cf3136bf3126e0d Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:11:30 +0300
Subject: [PATCH 1433/1852] ath: Add regulatory mapping for FCC3_ETSIC

[ Upstream commit 01fb2994a98dc72c8818c274f7b5983d5dd885c7 ]

The regdomain code is used to select the correct the correct conformance
test limits (CTL) for a country. If the regdomain code isn't available and
it is still programmed in the EEPROM then it will cause an error and stop
the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this regdomain code are:

* 2.4GHz: ETSI
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index bdd2b4d61f2f0..7d955fa8c24c8 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -35,6 +35,7 @@ enum EnumRd {
 	FRANCE_RES = 0x31,
 	FCC3_FCCA = 0x3A,
 	FCC3_WORLD = 0x3B,
+	FCC3_ETSIC = 0x3F,
 
 	ETSI1_WORLD = 0x37,
 	ETSI3_ETSIA = 0x32,
@@ -168,6 +169,7 @@ static struct reg_dmn_pair_mapping regDomainPairs[] = {
 	{FCC2_ETSIC, CTL_FCC, CTL_ETSI},
 	{FCC3_FCCA, CTL_FCC, CTL_FCC},
 	{FCC3_WORLD, CTL_FCC, CTL_ETSI},
+	{FCC3_ETSIC, CTL_FCC, CTL_ETSI},
 	{FCC4_FCCA, CTL_FCC, CTL_FCC},
 	{FCC5_FCCA, CTL_FCC, CTL_FCC},
 	{FCC6_FCCA, CTL_FCC, CTL_FCC},

From 2e210a384501076400a1d1d444af6029b59085e7 Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:11:18 +0300
Subject: [PATCH 1434/1852] ath: Add regulatory mapping for ETSI8_WORLD

[ Upstream commit 45faf6e096da8bb80e1ddf8c08a26a9601d9469e ]

The regdomain code is used to select the correct the correct conformance
test limits (CTL) for a country. If the regdomain code isn't available and
it is still programmed in the EEPROM then it will cause an error and stop
the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this regdomain code are:

* 2.4GHz: ETSI
* 5GHz: ETSI

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 7d955fa8c24c8..7c0fcbbf19003 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -45,6 +45,7 @@ enum EnumRd {
 	ETSI4_ETSIC = 0x38,
 	ETSI5_WORLD = 0x39,
 	ETSI6_WORLD = 0x34,
+	ETSI8_WORLD = 0x3D,
 	ETSI_RESERVED = 0x33,
 
 	MKK1_MKKA = 0x40,
@@ -181,6 +182,7 @@ static struct reg_dmn_pair_mapping regDomainPairs[] = {
 	{ETSI4_WORLD, CTL_ETSI, CTL_ETSI},
 	{ETSI5_WORLD, CTL_ETSI, CTL_ETSI},
 	{ETSI6_WORLD, CTL_ETSI, CTL_ETSI},
+	{ETSI8_WORLD, CTL_ETSI, CTL_ETSI},
 
 	/* XXX: For ETSI3_ETSIA, Was NO_CTL meant for the 2 GHz band ? */
 	{ETSI3_ETSIA, CTL_ETSI, CTL_ETSI},

From 3e03558586377d26c358c12086a1c4d1df6d7cac Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:11:14 +0300
Subject: [PATCH 1435/1852] ath: Add regulatory mapping for APL13_WORLD

[ Upstream commit 9ba8df0c52b3e6baa436374b429d3d73bd09a320 ]

The regdomain code is used to select the correct the correct conformance
test limits (CTL) for a country. If the regdomain code isn't available and
it is still programmed in the EEPROM then it will cause an error and stop
the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this regdomain code are:

* 2.4GHz: ETSI
* 5GHz: ETSI

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 7c0fcbbf19003..2c873840a46a5 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -69,6 +69,7 @@ enum EnumRd {
 	APL1_ETSIC = 0x55,
 	APL2_ETSIC = 0x56,
 	APL5_WORLD = 0x58,
+	APL13_WORLD = 0x5A,
 	APL6_WORLD = 0x5B,
 	APL7_FCCA = 0x5C,
 	APL8_WORLD = 0x5D,
@@ -195,6 +196,7 @@ static struct reg_dmn_pair_mapping regDomainPairs[] = {
 	{APL3_WORLD, CTL_FCC, CTL_ETSI},
 	{APL4_WORLD, CTL_FCC, CTL_ETSI},
 	{APL5_WORLD, CTL_FCC, CTL_ETSI},
+	{APL13_WORLD, CTL_ETSI, CTL_ETSI},
 	{APL6_WORLD, CTL_ETSI, CTL_ETSI},
 	{APL8_WORLD, CTL_ETSI, CTL_ETSI},
 	{APL9_WORLD, CTL_ETSI, CTL_ETSI},

From 122d6fbbce9af99b17f405cc692698e2786a928f Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:11:05 +0300
Subject: [PATCH 1436/1852] ath: Add regulatory mapping for APL2_FCCA

[ Upstream commit 4f183687e3fad3ce0e06e38976cad81bc4541990 ]

The regdomain code is used to select the correct the correct conformance
test limits (CTL) for a country. If the regdomain code isn't available and
it is still programmed in the EEPROM then it will cause an error and stop
the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this regdomain code are:

* 2.4GHz: FCC
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd_common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 2c873840a46a5..d8a7db4976f0b 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -61,6 +61,7 @@ enum EnumRd {
 	MKK1_MKKA1 = 0x4A,
 	MKK1_MKKA2 = 0x4B,
 	MKK1_MKKC = 0x4C,
+	APL2_FCCA = 0x4D,
 
 	APL3_FCCA = 0x50,
 	APL1_WORLD = 0x52,
@@ -193,6 +194,7 @@ static struct reg_dmn_pair_mapping regDomainPairs[] = {
 	{FCC1_FCCA, CTL_FCC, CTL_FCC},
 	{APL1_WORLD, CTL_FCC, CTL_ETSI},
 	{APL2_WORLD, CTL_FCC, CTL_ETSI},
+	{APL2_FCCA, CTL_FCC, CTL_FCC},
 	{APL3_WORLD, CTL_FCC, CTL_ETSI},
 	{APL4_WORLD, CTL_FCC, CTL_ETSI},
 	{APL5_WORLD, CTL_FCC, CTL_ETSI},

From 8a0ac8556354a5f199be9d4885bc3f2387c95102 Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:10:54 +0300
Subject: [PATCH 1437/1852] ath: Add regulatory mapping for Uganda

[ Upstream commit 1ea3986ad2bc72081c69f3fbc1e5e0eeb3c44f17 ]

The country code is used by the ath to detect the ISO 3166-1 alpha-2 name
and to select the correct conformance test limits (CTL) for a country. If
the country isn't available and it is still programmed in the EEPROM then
it will cause an error and stop the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this country are:

* 2.4GHz: ETSI
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd.h        | 1 +
 drivers/net/wireless/ath/regd_common.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index 37f53bd8fcb13..18a4d0557f189 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -175,6 +175,7 @@ enum CountryCode {
 	CTRY_TUNISIA = 788,
 	CTRY_TURKEY = 792,
 	CTRY_UAE = 784,
+	CTRY_UGANDA = 800,
 	CTRY_UKRAINE = 804,
 	CTRY_UNITED_KINGDOM = 826,
 	CTRY_UNITED_STATES = 840,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index d8a7db4976f0b..cba1020bc8540 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -467,6 +467,7 @@ static struct country_code_to_enum_rd allCountries[] = {
 	{CTRY_TRINIDAD_Y_TOBAGO, FCC3_WORLD, "TT"},
 	{CTRY_TUNISIA, ETSI3_WORLD, "TN"},
 	{CTRY_TURKEY, ETSI3_WORLD, "TR"},
+	{CTRY_UGANDA, FCC3_WORLD, "UG"},
 	{CTRY_UKRAINE, NULL1_WORLD, "UA"},
 	{CTRY_UAE, NULL1_WORLD, "AE"},
 	{CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB"},

From d44dc5f5dbacd388328cc6d42edf3f4ef6fd3244 Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:10:48 +0300
Subject: [PATCH 1438/1852] ath: Add regulatory mapping for Tanzania

[ Upstream commit 667ddac5745fb9fddfe8f7fd2523070f50bd4442 ]

The country code is used by the ath to detect the ISO 3166-1 alpha-2 name
and to select the correct conformance test limits (CTL) for a country. If
the country isn't available and it is still programmed in the EEPROM then
it will cause an error and stop the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this country are:

* 2.4GHz: ETSI
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd.h        | 1 +
 drivers/net/wireless/ath/regd_common.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index 18a4d0557f189..7439e62f52626 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -170,6 +170,7 @@ enum CountryCode {
 	CTRY_SWITZERLAND = 756,
 	CTRY_SYRIA = 760,
 	CTRY_TAIWAN = 158,
+	CTRY_TANZANIA = 834,
 	CTRY_THAILAND = 764,
 	CTRY_TRINIDAD_Y_TOBAGO = 780,
 	CTRY_TUNISIA = 788,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index cba1020bc8540..b85dc86cc1889 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -463,6 +463,7 @@ static struct country_code_to_enum_rd allCountries[] = {
 	{CTRY_SWITZERLAND, ETSI1_WORLD, "CH"},
 	{CTRY_SYRIA, NULL1_WORLD, "SY"},
 	{CTRY_TAIWAN, APL3_FCCA, "TW"},
+	{CTRY_TANZANIA, APL1_WORLD, "TZ"},
 	{CTRY_THAILAND, FCC3_WORLD, "TH"},
 	{CTRY_TRINIDAD_Y_TOBAGO, FCC3_WORLD, "TT"},
 	{CTRY_TUNISIA, ETSI3_WORLD, "TN"},

From 931645ebddb0577126352dee12b41d6f6ab43d4a Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:10:43 +0300
Subject: [PATCH 1439/1852] ath: Add regulatory mapping for Serbia

[ Upstream commit 2a3169a54bb53717928392a04fb84deb765b51f1 ]

The country code is used by the ath to detect the ISO 3166-1 alpha-2 name
and to select the correct conformance test limits (CTL) for a country. If
the country isn't available and it is still programmed in the EEPROM then
it will cause an error and stop the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this country are:

* 2.4GHz: ETSI
* 5GHz: ETSI

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd.h        | 1 +
 drivers/net/wireless/ath/regd_common.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index 7439e62f52626..a0ed5f8b554e9 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -159,6 +159,7 @@ enum CountryCode {
 	CTRY_ROMANIA = 642,
 	CTRY_RUSSIA = 643,
 	CTRY_SAUDI_ARABIA = 682,
+	CTRY_SERBIA = 688,
 	CTRY_SERBIA_MONTENEGRO = 891,
 	CTRY_SINGAPORE = 702,
 	CTRY_SLOVAKIA = 703,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index b85dc86cc1889..1ced5a323cf8e 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -452,6 +452,7 @@ static struct country_code_to_enum_rd allCountries[] = {
 	{CTRY_ROMANIA, NULL1_WORLD, "RO"},
 	{CTRY_RUSSIA, NULL1_WORLD, "RU"},
 	{CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA"},
+	{CTRY_SERBIA, ETSI1_WORLD, "RS"},
 	{CTRY_SERBIA_MONTENEGRO, ETSI1_WORLD, "CS"},
 	{CTRY_SINGAPORE, APL6_WORLD, "SG"},
 	{CTRY_SLOVAKIA, ETSI1_WORLD, "SK"},

From 3399d001e71f8bd5b063690bc86c3f3ed0147924 Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:09:59 +0300
Subject: [PATCH 1440/1852] ath: Add regulatory mapping for Bermuda

[ Upstream commit 9c790f2d234f65697e3b0948adbfdf36dbe63dd7 ]

The country code is used by the ath to detect the ISO 3166-1 alpha-2 name
and to select the correct conformance test limits (CTL) for a country. If
the country isn't available and it is still programmed in the EEPROM then
it will cause an error and stop the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this country are:

* 2.4GHz: FCC
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd.h        | 1 +
 drivers/net/wireless/ath/regd_common.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index a0ed5f8b554e9..a9334d514154d 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -74,6 +74,7 @@ enum CountryCode {
 	CTRY_BELARUS = 112,
 	CTRY_BELGIUM = 56,
 	CTRY_BELIZE = 84,
+	CTRY_BERMUDA = 60,
 	CTRY_BOLIVIA = 68,
 	CTRY_BOSNIA_HERZ = 70,
 	CTRY_BRAZIL = 76,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 1ced5a323cf8e..e13b96e45d535 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -313,6 +313,7 @@ static struct country_code_to_enum_rd allCountries[] = {
 	{CTRY_BELGIUM, ETSI1_WORLD, "BE"},
 	{CTRY_BELGIUM2, ETSI4_WORLD, "BL"},
 	{CTRY_BELIZE, APL1_ETSIC, "BZ"},
+	{CTRY_BERMUDA, FCC3_FCCA, "BM"},
 	{CTRY_BOLIVIA, APL1_ETSIC, "BO"},
 	{CTRY_BOSNIA_HERZ, ETSI1_WORLD, "BA"},
 	{CTRY_BRAZIL, FCC3_WORLD, "BR"},

From 3e551f9b5a49e7adcddcb547899dffcdcf13fdb0 Mon Sep 17 00:00:00 2001
From: Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Wed, 23 May 2018 11:09:53 +0300
Subject: [PATCH 1441/1852] ath: Add regulatory mapping for Bahamas

[ Upstream commit 699e2302c286a14afe7b7394151ce6c4e1790cc1 ]

The country code is used by the ath to detect the ISO 3166-1 alpha-2 name
and to select the correct conformance test limits (CTL) for a country. If
the country isn't available and it is still programmed in the EEPROM then
it will cause an error and stop the initialization with:

  Invalid EEPROM contents

The current CTL mappings for this country are:

* 2.4GHz: ETSI
* 5GHz: FCC

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/ath/regd.h        | 1 +
 drivers/net/wireless/ath/regd_common.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index a9334d514154d..184b6810cde99 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -68,6 +68,7 @@ enum CountryCode {
 	CTRY_AUSTRALIA = 36,
 	CTRY_AUSTRIA = 40,
 	CTRY_AZERBAIJAN = 31,
+	CTRY_BAHAMAS = 44,
 	CTRY_BAHRAIN = 48,
 	CTRY_BANGLADESH = 50,
 	CTRY_BARBADOS = 52,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index e13b96e45d535..15bbd1e0d912f 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -306,6 +306,7 @@ static struct country_code_to_enum_rd allCountries[] = {
 	{CTRY_AUSTRALIA2, FCC6_WORLD, "AU"},
 	{CTRY_AUSTRIA, ETSI1_WORLD, "AT"},
 	{CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ"},
+	{CTRY_BAHAMAS, FCC3_WORLD, "BS"},
 	{CTRY_BAHRAIN, APL6_WORLD, "BH"},
 	{CTRY_BANGLADESH, NULL1_WORLD, "BD"},
 	{CTRY_BARBADOS, FCC2_WORLD, "BB"},

From 10b68eafbcfd371e59734d63515b8cd84ac51d34 Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Thu, 22 Mar 2018 21:20:03 +0100
Subject: [PATCH 1442/1852] powerpc/32: Add a missing include header
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit c89ca593220931c150cffda24b4d4ccf82f13fc8 ]

The header file <linux/syscalls.h> was missing from the includes. Fix the
following warning, treated as error with W=1:

  arch/powerpc/kernel/pci_32.c:286:6: error: no previous prototype for ‘sys_pciconfig_iobase’ [-Werror=missing-prototypes]

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/pci_32.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 1f7930037cb7d..d9e41b77dd13e 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -11,6 +11,7 @@
 #include <linux/sched.h>
 #include <linux/errno.h>
 #include <linux/bootmem.h>
+#include <linux/syscalls.h>
 #include <linux/irq.h>
 #include <linux/list.h>
 #include <linux/of.h>

From 0b28200aacee2ec33d593f91e0dbff6e023a85e3 Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Thu, 22 Mar 2018 21:19:56 +0100
Subject: [PATCH 1443/1852] powerpc/chrp/time: Make some functions static, add
 missing header include
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit b87a358b4a1421abd544c0b554b1b7159b2b36c0 ]

Add a missing include <platforms/chrp/chrp.h>.

These functions can all be static, make it so. Fix warnings treated as
errors with W=1:

  arch/powerpc/platforms/chrp/time.c:41:13: error: no previous prototype for ‘chrp_time_init’ [-Werror=missing-prototypes]
  arch/powerpc/platforms/chrp/time.c:66:5: error: no previous prototype for ‘chrp_cmos_clock_read’ [-Werror=missing-prototypes]
  arch/powerpc/platforms/chrp/time.c:74:6: error: no previous prototype for ‘chrp_cmos_clock_write’ [-Werror=missing-prototypes]
  arch/powerpc/platforms/chrp/time.c:86:5: error: no previous prototype for ‘chrp_set_rtc_time’ [-Werror=missing-prototypes]
  arch/powerpc/platforms/chrp/time.c:130:6: error: no previous prototype for ‘chrp_get_rtc_time’ [-Werror=missing-prototypes]

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/chrp/time.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/chrp/time.c b/arch/powerpc/platforms/chrp/time.c
index f803f4b8ab6f2..8608e358217f3 100644
--- a/arch/powerpc/platforms/chrp/time.c
+++ b/arch/powerpc/platforms/chrp/time.c
@@ -27,6 +27,8 @@
 #include <asm/sections.h>
 #include <asm/time.h>
 
+#include <platforms/chrp/chrp.h>
+
 extern spinlock_t rtc_lock;
 
 #define NVRAM_AS0  0x74
@@ -62,7 +64,7 @@ long __init chrp_time_init(void)
 	return 0;
 }
 
-int chrp_cmos_clock_read(int addr)
+static int chrp_cmos_clock_read(int addr)
 {
 	if (nvram_as1 != 0)
 		outb(addr>>8, nvram_as1);
@@ -70,7 +72,7 @@ int chrp_cmos_clock_read(int addr)
 	return (inb(nvram_data));
 }
 
-void chrp_cmos_clock_write(unsigned long val, int addr)
+static void chrp_cmos_clock_write(unsigned long val, int addr)
 {
 	if (nvram_as1 != 0)
 		outb(addr>>8, nvram_as1);

From d02b62e2d3186a1ba8346c5985e97a4c04be128b Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Wed, 4 Apr 2018 22:13:05 +0200
Subject: [PATCH 1444/1852] powerpc/powermac: Add missing prototype for
 note_bootable_part()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit f72cf3f1d49f2c35d6cb682af2e8c93550f264e4 ]

Add a missing prototype for function `note_bootable_part` to silence a
warning treated as error with W=1:

  arch/powerpc/platforms/powermac/setup.c:361:12: error: no previous prototype for ‘note_bootable_part’ [-Werror=missing-prototypes]

Suggested-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/powermac/setup.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 8dd78f4e1af4a..32fc56cf62618 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -359,6 +359,7 @@ static int pmac_late_init(void)
 }
 machine_late_initcall(powermac, pmac_late_init);
 
+void note_bootable_part(dev_t dev, int part, int goodness);
 /*
  * This is __init_refok because we check for "initializing" before
  * touching any of the __init sensitive things and "initializing"

From d842b1987c0ed10a1c11c994ae8e5ccc6ec6fdc0 Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Wed, 4 Apr 2018 22:07:46 +0200
Subject: [PATCH 1445/1852] powerpc/powermac: Mark variable x as unused
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 5a4b475cf8511da721f20ba432c244061db7139f ]

Since the value of x is never intended to be read, declare it with gcc
attribute as unused. Fix warning treated as error with W=1:

  arch/powerpc/platforms/powermac/bootx_init.c:471:21: error: variable ‘x’ set but not used [-Werror=unused-but-set-variable]

Suggested-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/powermac/bootx_init.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 76f5013c35e5c..89237b84b0962 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -467,7 +467,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
 	boot_infos_t *bi = (boot_infos_t *) r4;
 	unsigned long hdr;
 	unsigned long space;
-	unsigned long ptr, x;
+	unsigned long ptr;
 	char *model;
 	unsigned long offset = reloc_offset();
 
@@ -561,6 +561,8 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
 	 * MMU switched OFF, so this should not be useful anymore.
 	 */
 	if (bi->version < 4) {
+		unsigned long x __maybe_unused;
+
 		bootx_printf("Touching pages...\n");
 
 		/*

From a242bc023da45a409a8c538435c829e9b821c16e Mon Sep 17 00:00:00 2001
From: Christophe Leroy <christophe.leroy@c-s.fr>
Date: Thu, 24 May 2018 11:02:06 +0000
Subject: [PATCH 1446/1852] powerpc/8xx: fix invalid register expression in
 head_8xx.S

[ Upstream commit e4ccb1dae6bdef228d729c076c38161ef6e7ca34 ]

New binutils generate the following warning

  AS      arch/powerpc/kernel/head_8xx.o
arch/powerpc/kernel/head_8xx.S: Assembler messages:
arch/powerpc/kernel/head_8xx.S:916: Warning: invalid register expression

This patch fixes it.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/kernel/head_8xx.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 78c1eba4c04a4..01e274e6907b1 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -720,7 +720,7 @@ start_here:
 	tovirt(r6,r6)
 	lis	r5, abatron_pteptrs@h
 	ori	r5, r5, abatron_pteptrs@l
-	stw	r5, 0xf0(r0)	/* Must match your Abatron config file */
+	stw	r5, 0xf0(0)	/* Must match your Abatron config file */
 	tophys(r5,r5)
 	stw	r6, 0(r5)
 

From 7be7356990ab7f807c6d248a45afcade7977627d Mon Sep 17 00:00:00 2001
From: Julia Lawall <Julia.Lawall@lip6.fr>
Date: Wed, 23 May 2018 21:07:12 +0200
Subject: [PATCH 1447/1852] pinctrl: at91-pio4: add missing of_node_put

[ Upstream commit 21816364715f508c10da1e087e352bc1e326614f ]

The device node iterators perform an of_node_get on each iteration, so a
jump out of the loop requires an of_node_put.

The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):

// <smpl>
@@
expression root,e;
local idexpression child;
iterator name for_each_child_of_node;
@@

 for_each_child_of_node(root, child) {
   ... when != of_node_put(child)
       when != e = child
+  of_node_put(child);
?  break;
   ...
}
... when != child
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pinctrl/pinctrl-at91-pio4.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index 62d0f1b833b07..8b96736078904 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -568,8 +568,10 @@ static int atmel_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
 		for_each_child_of_node(np_config, np) {
 			ret = atmel_pctl_dt_subnode_to_map(pctldev, np, map,
 						    &reserved_maps, num_maps);
-			if (ret < 0)
+			if (ret < 0) {
+				of_node_put(np);
 				break;
+			}
 		}
 	}
 

From 5cdeeac9f007031e0b6f74dac91a6efdfe168891 Mon Sep 17 00:00:00 2001
From: Mika Westerberg <mika.westerberg@linux.intel.com>
Date: Wed, 23 May 2018 17:19:22 -0500
Subject: [PATCH 1448/1852] PCI: pciehp: Request control of native hotplug only
 if supported

[ Upstream commit 408fec36a1ab3d14273c2116b449ef1e9be3cb8b ]

Currently we request control of native PCIe hotplug unconditionally.
Native PCIe hotplug events are handled by the pciehp driver, and if it is
not enabled those events will be lost.

Request control of native PCIe hotplug only if the pciehp driver is
enabled, so we will actually handle native PCIe hotplug events.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/pci_root.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index ae3fe4e642035..3b0b4bd67b71b 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -472,9 +472,11 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
 	}
 
 	control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
-		| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
 		| OSC_PCI_EXPRESS_PME_CONTROL;
 
+	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
+		control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
+
 	if (pci_aer_available()) {
 		if (aer_acpi_firmware_first())
 			dev_info(&device->dev,

From b9f58c9f160b869ea031ad1eda20502907998fd3 Mon Sep 17 00:00:00 2001
From: Xinming Hu <huxm@marvell.com>
Date: Fri, 18 May 2018 15:38:54 +0800
Subject: [PATCH 1449/1852] mwifiex: correct histogram data with appropriate
 index

[ Upstream commit 30bfce0b63fa68c14ae1613eb9d259fa18644074 ]

Correct snr/nr/rssi data index to avoid possible buffer underflow.

Signed-off-by: Xinming Hu <huxm@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/mwifiex/util.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/mwifiex/util.c b/drivers/net/wireless/mwifiex/util.c
index 0cec8a64473e9..eb5ffa5b1c6cf 100644
--- a/drivers/net/wireless/mwifiex/util.c
+++ b/drivers/net/wireless/mwifiex/util.c
@@ -702,12 +702,14 @@ void mwifiex_hist_data_set(struct mwifiex_private *priv, u8 rx_rate, s8 snr,
 			   s8 nflr)
 {
 	struct mwifiex_histogram_data *phist_data = priv->hist_data;
+	s8 nf   = -nflr;
+	s8 rssi = snr - nflr;
 
 	atomic_inc(&phist_data->num_samples);
 	atomic_inc(&phist_data->rx_rate[rx_rate]);
-	atomic_inc(&phist_data->snr[snr]);
-	atomic_inc(&phist_data->noise_flr[128 + nflr]);
-	atomic_inc(&phist_data->sig_str[nflr - snr]);
+	atomic_inc(&phist_data->snr[snr + 128]);
+	atomic_inc(&phist_data->noise_flr[nf + 128]);
+	atomic_inc(&phist_data->sig_str[rssi + 128]);
 }
 
 /* function to reset histogram data during init/reset */

From 73f04587918308b93f954c032deaf391197a757b Mon Sep 17 00:00:00 2001
From: Maya Erez <merez@codeaurora.org>
Date: Thu, 3 May 2018 16:37:16 +0530
Subject: [PATCH 1450/1852] scsi: ufs: fix exception event handling

[ Upstream commit 2e3611e9546c2ed4def152a51dfd34e8dddae7a5 ]

The device can set the exception event bit in one of the response UPIU,
for example to notify the need for urgent BKOPs operation.  In such a
case, the host driver calls ufshcd_exception_event_handler to handle
this notification.  When trying to check the exception event status (for
finding the cause for the exception event), the device may be busy with
additional SCSI commands handling and may not respond within the 100ms
timeout.

To prevent that, we need to block SCSI commands during handling of
exception events and allow retransmissions of the query requests, in
case of timeout.

Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/ufs/ufshcd.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index b316fddac6029..055ad72a9f866 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -3476,6 +3476,7 @@ static void ufshcd_exception_event_handler(struct work_struct *work)
 	hba = container_of(work, struct ufs_hba, eeh_work);
 
 	pm_runtime_get_sync(hba->dev);
+	scsi_block_requests(hba->host);
 	err = ufshcd_get_ee_status(hba, &status);
 	if (err) {
 		dev_err(hba->dev, "%s: failed to get exception status %d\n",
@@ -3491,6 +3492,7 @@ static void ufshcd_exception_event_handler(struct work_struct *work)
 					__func__, err);
 	}
 out:
+	scsi_unblock_requests(hba->host);
 	pm_runtime_put_sync(hba->dev);
 	return;
 }

From 084660e060dfeb6034750e8024cf0594198f49ea Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Thu, 17 May 2018 20:02:23 +0200
Subject: [PATCH 1451/1852] ALSA: emu10k1: Rate-limit error messages about page
 errors

[ Upstream commit 11d42c81036324697d367600bfc16f6dd37636fd ]

The error messages at sanity checks of memory pages tend to repeat too
many times once when it hits, and without the rate limit, it may flood
and become unreadable.  Replace such messages with the *_ratelimited()
variant.

Bugzilla: http://bugzilla.opensuse.org/show_bug.cgi?id=1093027
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/emu10k1/memory.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/pci/emu10k1/memory.c b/sound/pci/emu10k1/memory.c
index 4f1f69be18651..8c778fa330317 100644
--- a/sound/pci/emu10k1/memory.c
+++ b/sound/pci/emu10k1/memory.c
@@ -237,13 +237,13 @@ search_empty(struct snd_emu10k1 *emu, int size)
 static int is_valid_page(struct snd_emu10k1 *emu, dma_addr_t addr)
 {
 	if (addr & ~emu->dma_mask) {
-		dev_err(emu->card->dev,
+		dev_err_ratelimited(emu->card->dev,
 			"max memory size is 0x%lx (addr = 0x%lx)!!\n",
 			emu->dma_mask, (unsigned long)addr);
 		return 0;
 	}
 	if (addr & (EMUPAGESIZE-1)) {
-		dev_err(emu->card->dev, "page is not aligned\n");
+		dev_err_ratelimited(emu->card->dev, "page is not aligned\n");
 		return 0;
 	}
 	return 1;
@@ -334,7 +334,7 @@ snd_emu10k1_alloc_pages(struct snd_emu10k1 *emu, struct snd_pcm_substream *subst
 		else
 			addr = snd_pcm_sgbuf_get_addr(substream, ofs);
 		if (! is_valid_page(emu, addr)) {
-			dev_err(emu->card->dev,
+			dev_err_ratelimited(emu->card->dev,
 				"emu: failure page = %d\n", idx);
 			mutex_unlock(&hdr->block_mutex);
 			return NULL;

From 6e701af748c601fe2a364e2e017e56d958d96566 Mon Sep 17 00:00:00 2001
From: Anson Huang <Anson.Huang@nxp.com>
Date: Thu, 17 May 2018 15:27:22 +0800
Subject: [PATCH 1452/1852] regulator: pfuze100: add .is_enable() for
 pfuze100_swb_regulator_ops

[ Upstream commit 0b01fd3d40fe6402e5fa3b491ef23109feb1aaa5 ]

If is_enabled() is not defined, regulator core will assume
this regulator is already enabled, then it can NOT be really
enabled after disabled.

Based on Li Jun's patch from the NXP kernel tree.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/regulator/pfuze100-regulator.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
index 2a44e5dd9c2a1..c68556bf6f399 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -152,6 +152,7 @@ static struct regulator_ops pfuze100_sw_regulator_ops = {
 static struct regulator_ops pfuze100_swb_regulator_ops = {
 	.enable = regulator_enable_regmap,
 	.disable = regulator_disable_regmap,
+	.is_enabled = regulator_is_enabled_regmap,
 	.list_voltage = regulator_list_voltage_table,
 	.map_voltage = regulator_map_voltage_ascend,
 	.set_voltage_sel = regulator_set_voltage_sel_regmap,

From d32b2afb8bae27681e2bcf362f83b1a1e1d34e8c Mon Sep 17 00:00:00 2001
From: Yufen Yu <yuyufen@huawei.com>
Date: Fri, 4 May 2018 18:08:10 +0800
Subject: [PATCH 1453/1852] md: fix NULL dereference of mddev->pers in
 remove_and_add_spares()

[ Upstream commit c42a0e2675721e1444f56e6132a07b7b1ec169ac ]

We met NULL pointer BUG as follow:

[  151.760358] BUG: unable to handle kernel NULL pointer dereference at 0000000000000060
[  151.761340] PGD 80000001011eb067 P4D 80000001011eb067 PUD 1011ea067 PMD 0
[  151.762039] Oops: 0000 [#1] SMP PTI
[  151.762406] Modules linked in:
[  151.762723] CPU: 2 PID: 3561 Comm: mdadm-test Kdump: loaded Not tainted 4.17.0-rc1+ #238
[  151.763542] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-1.fc26 04/01/2014
[  151.764432] RIP: 0010:remove_and_add_spares.part.56+0x13c/0x3a0
[  151.765061] RSP: 0018:ffffc90001d7fcd8 EFLAGS: 00010246
[  151.765590] RAX: 0000000000000000 RBX: ffff88013601d600 RCX: 0000000000000000
[  151.766306] RDX: 0000000000000000 RSI: ffff88013601d600 RDI: ffff880136187000
[  151.767014] RBP: ffff880136187018 R08: 0000000000000003 R09: 0000000000000051
[  151.767728] R10: ffffc90001d7fed8 R11: 0000000000000000 R12: ffff88013601d600
[  151.768447] R13: ffff8801298b1300 R14: ffff880136187000 R15: 0000000000000000
[  151.769160] FS:  00007f2624276700(0000) GS:ffff88013ae80000(0000) knlGS:0000000000000000
[  151.769971] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  151.770554] CR2: 0000000000000060 CR3: 0000000111aac000 CR4: 00000000000006e0
[  151.771272] Call Trace:
[  151.771542]  md_ioctl+0x1df2/0x1e10
[  151.771906]  ? __switch_to+0x129/0x440
[  151.772295]  ? __schedule+0x244/0x850
[  151.772672]  blkdev_ioctl+0x4bd/0x970
[  151.773048]  block_ioctl+0x39/0x40
[  151.773402]  do_vfs_ioctl+0xa4/0x610
[  151.773770]  ? dput.part.23+0x87/0x100
[  151.774151]  ksys_ioctl+0x70/0x80
[  151.774493]  __x64_sys_ioctl+0x16/0x20
[  151.774877]  do_syscall_64+0x5b/0x180
[  151.775258]  entry_SYSCALL_64_after_hwframe+0x44/0xa9

For raid6, when two disk of the array are offline, two spare disks can
be added into the array. Before spare disks recovery completing,
system reboot and mdadm thinks it is ok to restart the degraded
array by md_ioctl(). Since disks in raid6 is not only_parity(),
raid5_run() will abort, when there is no PPL feature or not setting
'start_dirty_degraded' parameter. Therefore, mddev->pers is NULL.

But, mddev->raid_disks has been set and it will not be cleared when
raid5_run abort. md_ioctl() can execute cmd 'HOT_REMOVE_DISK' to
remove a disk by mdadm, which will cause NULL pointer dereference
in remove_and_add_spares() finally.

Signed-off-by: Yufen Yu <yuyufen@huawei.com>
Signed-off-by: Shaohua Li <shli@fb.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/md.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/md/md.c b/drivers/md/md.c
index 0663463df2f72..07f307402351b 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -6145,6 +6145,9 @@ static int hot_remove_disk(struct mddev *mddev, dev_t dev)
 	struct md_rdev *rdev;
 	int ret = -1;
 
+	if (!mddev->pers)
+		return -ENODEV;
+
 	rdev = find_rdev(mddev, dev);
 	if (!rdev)
 		return -ENXIO;

From dff951a9da13820252ce08c831e1a743789b34f6 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Wed, 25 Apr 2018 11:04:21 -0400
Subject: [PATCH 1454/1852] media: smiapp: fix timeout checking in
 smiapp_read_nvm

[ Upstream commit 7a2148dfda8001c983f0effd9afd8a7fa58e99c4 ]

The current code decrements the timeout counter i and the end of
each loop i is incremented, so the check for timeout will always
be false and hence the timeout mechanism is just a dead code path.
Potentially, if the RD_READY bit is not set, we could end up in
an infinite loop.

Fix this so the timeout starts from 1000 and decrements to zero,
if at the end of the loop i is zero we have a timeout condition.

Detected by CoverityScan, CID#1324008 ("Logically dead code")

Fixes: ccfc97bdb5ae ("[media] smiapp: Add driver")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/i2c/smiapp/smiapp-core.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 58cebb8fc0679..8481a4ca83951 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -982,7 +982,7 @@ static int smiapp_read_nvm(struct smiapp_sensor *sensor,
 		if (rval)
 			goto out;
 
-		for (i = 0; i < 1000; i++) {
+		for (i = 1000; i > 0; i--) {
 			rval = smiapp_read(
 				sensor,
 				SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS, &s);
@@ -993,11 +993,10 @@ static int smiapp_read_nvm(struct smiapp_sensor *sensor,
 			if (s & SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY)
 				break;
 
-			if (--i == 0) {
-				rval = -ETIMEDOUT;
-				goto out;
-			}
-
+		}
+		if (!i) {
+			rval = -ETIMEDOUT;
+			goto out;
 		}
 
 		for (i = 0; i < SMIAPP_NVM_PAGE_SIZE; i++) {

From 2b573542c6bbec2a90e7bb32379257c1eb2237f4 Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 16 May 2018 20:07:18 +0200
Subject: [PATCH 1455/1852] ALSA: usb-audio: Apply rate limit to warning
 messages in URB complete callback

[ Upstream commit 377a879d9832f4ba69bd6a1fc996bb4181b1e504 ]

retire_capture_urb() may print warning messages when the given URB
doesn't align, and this may flood the system log easily.
Put the rate limit to the message for avoiding it.

Bugzilla: https://bugzilla.suse.com/show_bug.cgi?id=1093485
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/usb/pcm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c
index eecacfa3d9d00..91fb8a8d9cef1 100644
--- a/sound/usb/pcm.c
+++ b/sound/usb/pcm.c
@@ -1301,7 +1301,7 @@ static void retire_capture_urb(struct snd_usb_substream *subs,
 		if (bytes % (runtime->sample_bits >> 3) != 0) {
 			int oldbytes = bytes;
 			bytes = frames * stride;
-			dev_warn(&subs->dev->dev,
+			dev_warn_ratelimited(&subs->dev->dev,
 				 "Corrected urb data len. %d->%d\n",
 							oldbytes, bytes);
 		}

From f36ce95eadaf48513f4c5d0c6f85f8a6ce0d5e67 Mon Sep 17 00:00:00 2001
From: Terry Junge <terry.junge@plantronics.com>
Date: Mon, 30 Apr 2018 13:32:46 -0700
Subject: [PATCH 1456/1852] HID: hid-plantronics: Re-resend Update to map
 button for PTT products

[ Upstream commit 37e376df5f4993677c33968a0c19b0c5acbf1108 ]

Add a mapping for Push-To-Talk joystick trigger button.

Tested on ChromeBox/ChromeBook with various Plantronics devices.

Signed-off-by: Terry Junge <terry.junge@plantronics.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/hid-plantronics.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/hid/hid-plantronics.c b/drivers/hid/hid-plantronics.c
index febb21ee190e9..584b10d3fc3d8 100644
--- a/drivers/hid/hid-plantronics.c
+++ b/drivers/hid/hid-plantronics.c
@@ -2,7 +2,7 @@
  *  Plantronics USB HID Driver
  *
  *  Copyright (c) 2014 JD Cole <jd.cole@plantronics.com>
- *  Copyright (c) 2015 Terry Junge <terry.junge@plantronics.com>
+ *  Copyright (c) 2015-2018 Terry Junge <terry.junge@plantronics.com>
  */
 
 /*
@@ -48,6 +48,10 @@ static int plantronics_input_mapping(struct hid_device *hdev,
 	unsigned short mapped_key;
 	unsigned long plt_type = (unsigned long)hid_get_drvdata(hdev);
 
+	/* special case for PTT products */
+	if (field->application == HID_GD_JOYSTICK)
+		goto defaulted;
+
 	/* handle volume up/down mapping */
 	/* non-standard types or multi-HID interfaces - plt_type is PID */
 	if (!(plt_type & HID_USAGE_PAGE)) {

From 6a7525327d00ef7cec0a380e22702bf64f20dadf Mon Sep 17 00:00:00 2001
From: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Date: Tue, 24 Apr 2018 15:15:13 +0200
Subject: [PATCH 1457/1852] drm/radeon: fix mode_valid's return type

[ Upstream commit 7a47f20eb1fb8fa8d7a8fe3a4fd8c721f04c2174 ]

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/radeon/radeon_connectors.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 2e8278a83ecec..2e489ee041df0 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -844,7 +844,7 @@ static int radeon_lvds_get_modes(struct drm_connector *connector)
 	return ret;
 }
 
-static int radeon_lvds_mode_valid(struct drm_connector *connector,
+static enum drm_mode_status radeon_lvds_mode_valid(struct drm_connector *connector,
 				  struct drm_display_mode *mode)
 {
 	struct drm_encoder *encoder = radeon_best_single_encoder(connector);
@@ -993,7 +993,7 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
 	return ret;
 }
 
-static int radeon_vga_mode_valid(struct drm_connector *connector,
+static enum drm_mode_status radeon_vga_mode_valid(struct drm_connector *connector,
 				  struct drm_display_mode *mode)
 {
 	struct drm_device *dev = connector->dev;
@@ -1136,7 +1136,7 @@ static int radeon_tv_get_modes(struct drm_connector *connector)
 	return 1;
 }
 
-static int radeon_tv_mode_valid(struct drm_connector *connector,
+static enum drm_mode_status radeon_tv_mode_valid(struct drm_connector *connector,
 				struct drm_display_mode *mode)
 {
 	if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
@@ -1477,7 +1477,7 @@ static void radeon_dvi_force(struct drm_connector *connector)
 		radeon_connector->use_digital = true;
 }
 
-static int radeon_dvi_mode_valid(struct drm_connector *connector,
+static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connector,
 				  struct drm_display_mode *mode)
 {
 	struct drm_device *dev = connector->dev;
@@ -1778,7 +1778,7 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
 	return ret;
 }
 
-static int radeon_dp_mode_valid(struct drm_connector *connector,
+static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector,
 				  struct drm_display_mode *mode)
 {
 	struct drm_device *dev = connector->dev;

From 6d1bc3186433666df95718a8dc8f33463b9d33a7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
Date: Thu, 10 May 2018 23:59:19 +0200
Subject: [PATCH 1458/1852] powerpc/embedded6xx/hlwd-pic: Prevent interrupts
 from being handled by Starlet
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 9dcb3df4281876731e4e8bff7940514d72375154 ]

The interrupt controller inside the Wii's Hollywood chip is connected to
two masters, the "Broadway" PowerPC and the "Starlet" ARM926, each with
their own interrupt status and mask registers.

When booting the Wii with mini[1], interrupts from the SD card
controller (IRQ 7) are handled by the ARM, because mini provides SD
access over IPC. Linux however can't currently use or disable this IPC
service, so both sides try to handle IRQ 7 without coordination.

Let's instead make sure that all interrupts that are unmasked on the PPC
side are masked on the ARM side; this will also make sure that Linux can
properly talk to the SD card controller (and potentially other devices).

If access to a device through IPC is desired in the future, interrupts
from that device should not be handled by Linux directly.

[1]: https://github.com/lewurm/mini

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index 9b7975706bfc7..9485f1024d46c 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -35,6 +35,8 @@
  */
 #define HW_BROADWAY_ICR		0x00
 #define HW_BROADWAY_IMR		0x04
+#define HW_STARLET_ICR		0x08
+#define HW_STARLET_IMR		0x0c
 
 
 /*
@@ -74,6 +76,9 @@ static void hlwd_pic_unmask(struct irq_data *d)
 	void __iomem *io_base = irq_data_get_irq_chip_data(d);
 
 	setbits32(io_base + HW_BROADWAY_IMR, 1 << irq);
+
+	/* Make sure the ARM (aka. Starlet) doesn't handle this interrupt. */
+	clrbits32(io_base + HW_STARLET_IMR, 1 << irq);
 }
 
 

From 3f42c110e1c203386508d264633819a4cfdf77d5 Mon Sep 17 00:00:00 2001
From: Dmitry Torokhov <dtor@chromium.org>
Date: Wed, 9 May 2018 12:12:15 -0700
Subject: [PATCH 1459/1852] HID: i2c-hid: check if device is there before
 really probing

[ Upstream commit b3a81b6c4fc6730ac49e20d789a93c0faabafc98 ]

On many Chromebooks touch devices are multi-sourced; the components are
electrically compatible and one can be freely swapped for another without
changing the OS image or firmware.

To avoid bunch of scary messages when device is not actually present in the
system let's try testing basic communication with it and if there is no
response terminate probe early with -ENXIO.

Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/i2c-hid/i2c-hid.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
index 780f82f9d966e..d80cce66b4feb 100644
--- a/drivers/hid/i2c-hid/i2c-hid.c
+++ b/drivers/hid/i2c-hid/i2c-hid.c
@@ -1055,6 +1055,14 @@ static int i2c_hid_probe(struct i2c_client *client,
 	pm_runtime_set_active(&client->dev);
 	pm_runtime_enable(&client->dev);
 
+	/* Make sure there is something at this address */
+	ret = i2c_smbus_read_byte(client);
+	if (ret < 0) {
+		dev_dbg(&client->dev, "nothing at this address: %d\n", ret);
+		ret = -ENXIO;
+		goto err_pm;
+	}
+
 	ret = i2c_hid_fetch_hid_descriptor(ihid);
 	if (ret < 0)
 		goto err_pm;

From 19271bb51caf698b515e09aea519f6880597675c Mon Sep 17 00:00:00 2001
From: DaeRyong Jeong <threeearcat@gmail.com>
Date: Tue, 1 May 2018 00:27:04 +0900
Subject: [PATCH 1460/1852] tty: Fix data race in
 tty_insert_flip_string_fixed_flag

[ Upstream commit b6da31b2c07c46f2dcad1d86caa835227a16d9ff ]

Unlike normal serials, in pty layer, there is no guarantee that multiple
threads don't insert input characters at the same time. If it is happened,
tty_insert_flip_string_fixed_flag can be executed concurrently. This can
lead slab out-of-bounds write in tty_insert_flip_string_fixed_flag.

Call sequences are as follows.
CPU0                                    CPU1
n_tty_ioctl_helper                      n_tty_ioctl_helper
__start_tty                             tty_send_xchar
tty_wakeup                              pty_write
n_hdlc_tty_wakeup                       tty_insert_flip_string
n_hdlc_send_frames                      tty_insert_flip_string_fixed_flag
pty_write
tty_insert_flip_string
tty_insert_flip_string_fixed_flag

To fix the race, acquire port->lock in pty_write() before it inserts input
characters to tty buffer. It prevents multiple threads from inserting
input characters concurrently.

The crash log is as follows:
BUG: KASAN: slab-out-of-bounds in tty_insert_flip_string_fixed_flag+0xb5/
0x130 drivers/tty/tty_buffer.c:316 at addr ffff880114fcc121
Write of size 1792 by task syz-executor0/30017
CPU: 1 PID: 30017 Comm: syz-executor0 Not tainted 4.8.0 #1
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996),
BIOS rel-1.8.2-0-g33fbe13 by qemu-project.org 04/01/2014
 0000000000000000 ffff88011638f888 ffffffff81694cc3 ffff88007d802140
 ffff880114fcb300 ffff880114fcc300 ffff880114fcb300 ffff88011638f8b0
 ffffffff8130075c ffff88011638f940 ffff88007d802140 ffff880194fcc121
Call Trace:
 __dump_stack lib/dump_stack.c:15 [inline]
 dump_stack+0xb3/0x110 lib/dump_stack.c:51
 kasan_object_err+0x1c/0x70 mm/kasan/report.c:156
 print_address_description mm/kasan/report.c:194 [inline]
 kasan_report_error+0x1f7/0x4e0 mm/kasan/report.c:283
 kasan_report+0x36/0x40 mm/kasan/report.c:303
 check_memory_region_inline mm/kasan/kasan.c:292 [inline]
 check_memory_region+0x13e/0x1a0 mm/kasan/kasan.c:299
 memcpy+0x37/0x50 mm/kasan/kasan.c:335
 tty_insert_flip_string_fixed_flag+0xb5/0x130 drivers/tty/tty_buffer.c:316
 tty_insert_flip_string include/linux/tty_flip.h:35 [inline]
 pty_write+0x7f/0xc0 drivers/tty/pty.c:115
 n_hdlc_send_frames+0x1d4/0x3b0 drivers/tty/n_hdlc.c:419
 n_hdlc_tty_wakeup+0x73/0xa0 drivers/tty/n_hdlc.c:496
 tty_wakeup+0x92/0xb0 drivers/tty/tty_io.c:601
 __start_tty.part.26+0x66/0x70 drivers/tty/tty_io.c:1018
 __start_tty+0x34/0x40 drivers/tty/tty_io.c:1013
 n_tty_ioctl_helper+0x146/0x1e0 drivers/tty/tty_ioctl.c:1138
 n_hdlc_tty_ioctl+0xb3/0x2b0 drivers/tty/n_hdlc.c:794
 tty_ioctl+0xa85/0x16d0 drivers/tty/tty_io.c:2992
 vfs_ioctl fs/ioctl.c:43 [inline]
 do_vfs_ioctl+0x13e/0xba0 fs/ioctl.c:679
 SYSC_ioctl fs/ioctl.c:694 [inline]
 SyS_ioctl+0x8f/0xc0 fs/ioctl.c:685
 entry_SYSCALL_64_fastpath+0x1f/0xbd

Signed-off-by: DaeRyong Jeong <threeearcat@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/pty.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c
index 96aa0ad324975..c8a2e5b0eff76 100644
--- a/drivers/tty/pty.c
+++ b/drivers/tty/pty.c
@@ -106,16 +106,19 @@ static void pty_unthrottle(struct tty_struct *tty)
 static int pty_write(struct tty_struct *tty, const unsigned char *buf, int c)
 {
 	struct tty_struct *to = tty->link;
+	unsigned long flags;
 
 	if (tty->stopped)
 		return 0;
 
 	if (c > 0) {
+		spin_lock_irqsave(&to->port->lock, flags);
 		/* Stuff the data into the input queue of the other end */
 		c = tty_insert_flip_string(to->port, buf, c);
 		/* And shovel */
 		if (c)
 			tty_flip_buffer_push(to->port);
+		spin_unlock_irqrestore(&to->port->lock, flags);
 	}
 	return c;
 }

From fb75043b3ec4c7b43cf3ffb6f86f639c2fc06724 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Tue, 8 May 2018 13:14:33 +0100
Subject: [PATCH 1461/1852] dma-iommu: Fix compilation when !CONFIG_IOMMU_DMA
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 8a22a3e1e768c309b718f99bd86f9f25a453e0dc ]

Inclusion of include/dma-iommu.h when CONFIG_IOMMU_DMA is not selected
results in the following splat:

In file included from drivers/irqchip/irq-gic-v3-mbi.c:20:0:
./include/linux/dma-iommu.h:95:69: error: unknown type name ‘dma_addr_t’
 static inline int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base)
                                                                     ^~~~~~~~~~
./include/linux/dma-iommu.h:108:74: warning: ‘struct list_head’ declared inside parameter list will not be visible outside of this definition or declaration
 static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list)
                                                                          ^~~~~~~~~
scripts/Makefile.build:312: recipe for target 'drivers/irqchip/irq-gic-v3-mbi.o' failed

Fix it by including linux/types.h.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20180508121438.11301-5-marc.zyngier@arm.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/dma-iommu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h
index 01a836c43dc38..67503d43e49f7 100644
--- a/include/linux/dma-iommu.h
+++ b/include/linux/dma-iommu.h
@@ -17,6 +17,7 @@
 #define __DMA_IOMMU_H
 
 #ifdef __KERNEL__
+#include <linux/types.h>
 #include <asm/errno.h>
 
 #ifdef CONFIG_IOMMU_DMA

From 26d7ede067192804cbc4c094e356a220a4c708e3 Mon Sep 17 00:00:00 2001
From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Date: Tue, 12 Jul 2016 07:21:46 -0400
Subject: [PATCH 1462/1852] media: rcar_jpu: Add missing
 clk_disable_unprepare() on error in jpu_open()

[ Upstream commit 43d0d3c52787df0221d1c52494daabd824fe84f1 ]

Add the missing clk_disable_unprepare() before return from
jpu_open() in the software reset error handling case.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Hans Verkuil <hansverk@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/platform/rcar_jpu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rcar_jpu.c b/drivers/media/platform/rcar_jpu.c
index f8e3e83c52a26..20de5e9fc2179 100644
--- a/drivers/media/platform/rcar_jpu.c
+++ b/drivers/media/platform/rcar_jpu.c
@@ -1278,7 +1278,7 @@ static int jpu_open(struct file *file)
 		/* ...issue software reset */
 		ret = jpu_reset(jpu);
 		if (ret)
-			goto device_prepare_rollback;
+			goto jpu_reset_rollback;
 	}
 
 	jpu->ref_count++;
@@ -1286,6 +1286,8 @@ static int jpu_open(struct file *file)
 	mutex_unlock(&jpu->mutex);
 	return 0;
 
+jpu_reset_rollback:
+	clk_disable_unprepare(jpu->clk);
 device_prepare_rollback:
 	mutex_unlock(&jpu->mutex);
 v4l_prepare_rollback:

From ae3b6b9b895dcfc9c77e9e091e8272443a6c9cfd Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 9 May 2018 09:28:12 +0900
Subject: [PATCH 1463/1852] libata: Fix command retry decision

[ Upstream commit 804689ad2d9b66d0d3920b48cf05881049d44589 ]

For failed commands with valid sense data (e.g. NCQ commands),
scsi_check_sense() is used in ata_analyze_tf() to determine if the
command can be retried. In such case, rely on this decision and ignore
the command error mask based decision done in ata_worth_retry().

This fixes useless retries of commands such as unaligned writes on zoned
disks (TYPE_ZAC).

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/ata/libata-eh.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 75cced210b2a0..7db76b5c7ada3 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2198,12 +2198,16 @@ static void ata_eh_link_autopsy(struct ata_link *link)
 		if (qc->err_mask & ~AC_ERR_OTHER)
 			qc->err_mask &= ~AC_ERR_OTHER;
 
-		/* SENSE_VALID trumps dev/unknown error and revalidation */
+		/*
+		 * SENSE_VALID trumps dev/unknown error and revalidation. Upper
+		 * layers will determine whether the command is worth retrying
+		 * based on the sense data and device class/type. Otherwise,
+		 * determine directly if the command is worth retrying using its
+		 * error mask and flags.
+		 */
 		if (qc->flags & ATA_QCFLAG_SENSE_VALID)
 			qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER);
-
-		/* determine whether the command is worth retrying */
-		if (ata_eh_worth_retry(qc))
+		else if (ata_eh_worth_retry(qc))
 			qc->flags |= ATA_QCFLAG_RETRY;
 
 		/* accumulate error info */

From 2379114bbacc541ce980af343a640e3a673f9fd8 Mon Sep 17 00:00:00 2001
From: Brad Love <brad@nextdimension.cc>
Date: Fri, 4 May 2018 17:53:35 -0400
Subject: [PATCH 1464/1852] media: saa7164: Fix driver name in debug output

[ Upstream commit 0cc4655cb57af0b7e105d075c4f83f8046efafe7 ]

This issue was reported by a user who downloaded a corrupt saa7164
firmware, then went looking for a valid xc5000 firmware to fix the
error displayed...but the device in question has no xc5000, thus after
much effort, the wild goose chase eventually led to a support call.

The xc5000 has nothing to do with saa7164 (as far as I can tell),
so replace the string with saa7164 as well as give a meaningful
hint on the firmware mismatch.

Signed-off-by: Brad Love <brad@nextdimension.cc>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/pci/saa7164/saa7164-fw.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/media/pci/saa7164/saa7164-fw.c b/drivers/media/pci/saa7164/saa7164-fw.c
index 269e0782c7b64..93d53195e8cab 100644
--- a/drivers/media/pci/saa7164/saa7164-fw.c
+++ b/drivers/media/pci/saa7164/saa7164-fw.c
@@ -430,7 +430,8 @@ int saa7164_downloadfirmware(struct saa7164_dev *dev)
 			__func__, fw->size);
 
 		if (fw->size != fwlength) {
-			printk(KERN_ERR "xc5000: firmware incorrect size\n");
+			printk(KERN_ERR "saa7164: firmware incorrect size %zu != %u\n",
+				fw->size, fwlength);
 			ret = -ENOMEM;
 			goto out;
 		}

From 9e4ae8711da93ab744e5850bff823f45f98b6458 Mon Sep 17 00:00:00 2001
From: Jane Wan <Jane.Wan@nokia.com>
Date: Tue, 8 May 2018 14:19:53 -0700
Subject: [PATCH 1465/1852] mtd: rawnand: fsl_ifc: fix FSL NAND driver to read
 all ONFI parameter pages

[ Upstream commit a75bbe71a27875fdc61cde1af6d799037cef6bed ]

Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page
read is not valid, the host should read redundant parameter page copies.
Fix FSL NAND driver to read the two redundant copies which are mandatory
in the specification.

Signed-off-by: Jane Wan <Jane.Wan@nokia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/mtd/nand/fsl_ifc_nand.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 5e3fa58610391..2c0bbaed36092 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -449,9 +449,16 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
 
 	case NAND_CMD_READID:
 	case NAND_CMD_PARAM: {
+		/*
+		 * For READID, read 8 bytes that are currently used.
+		 * For PARAM, read all 3 copies of 256-bytes pages.
+		 */
+		int len = 8;
 		int timing = IFC_FIR_OP_RB;
-		if (command == NAND_CMD_PARAM)
+		if (command == NAND_CMD_PARAM) {
 			timing = IFC_FIR_OP_RBCD;
+			len = 256 * 3;
+		}
 
 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
 			  (IFC_FIR_OP_UA  << IFC_NAND_FIR0_OP1_SHIFT) |
@@ -461,12 +468,8 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
 			  &ifc->ifc_nand.nand_fcr0);
 		ifc_out32(column, &ifc->ifc_nand.row3);
 
-		/*
-		 * although currently it's 8 bytes for READID, we always read
-		 * the maximum 256 bytes(for PARAM)
-		 */
-		ifc_out32(256, &ifc->ifc_nand.nand_fbcr);
-		ifc_nand_ctrl->read_bytes = 256;
+		ifc_out32(len, &ifc->ifc_nand.nand_fbcr);
+		ifc_nand_ctrl->read_bytes = len;
 
 		set_addr(mtd, 0, 0, 0);
 		fsl_ifc_run_command(mtd);

From 70238a1f6f2d348f40eb32bdad39a833ffebefd6 Mon Sep 17 00:00:00 2001
From: Sean Lanigan <sean@lano.id.au>
Date: Fri, 4 May 2018 16:48:23 +1000
Subject: [PATCH 1466/1852] brcmfmac: Add support for bcm43364 wireless chipset

[ Upstream commit 9c4a121e82634aa000a702c98cd6f05b27d6e186 ]

Add support for the BCM43364 chipset via an SDIO interface, as used in
e.g. the Murata 1FX module.

The BCM43364 uses the same firmware as the BCM43430 (which is already
included), the only difference is the omission of Bluetooth.

However, the SDIO_ID for the BCM43364 is 02D0:A9A4, giving it a MODALIAS
of sdio:c00v02D0dA9A4, which doesn't get recognised and hence doesn't
load the brcmfmac module. Adding the 'A9A4' ID in the appropriate place
triggers the brcmfmac driver to load, and then correctly use the
firmware file 'brcmfmac43430-sdio.bin'.

Signed-off-by: Sean Lanigan <sean@lano.id.au>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c | 1 +
 include/linux/mmc/sdio_ids.h                     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
index 59cef6c69fe86..91da67657f817 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
@@ -1109,6 +1109,7 @@ static const struct sdio_device_id brcmf_sdmmc_ids[] = {
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43340),
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43341),
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43362),
+ 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43364),
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_4335_4339),
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43430),
 	BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_4345),
diff --git a/include/linux/mmc/sdio_ids.h b/include/linux/mmc/sdio_ids.h
index 83430f2ea757d..e0325706b76da 100644
--- a/include/linux/mmc/sdio_ids.h
+++ b/include/linux/mmc/sdio_ids.h
@@ -33,6 +33,7 @@
 #define SDIO_DEVICE_ID_BROADCOM_43341		0xa94d
 #define SDIO_DEVICE_ID_BROADCOM_4335_4339	0x4335
 #define SDIO_DEVICE_ID_BROADCOM_43362		0xa962
+#define SDIO_DEVICE_ID_BROADCOM_43364		0xa9a4
 #define SDIO_DEVICE_ID_BROADCOM_43430		0xa9a6
 #define SDIO_DEVICE_ID_BROADCOM_4345		0x4345
 #define SDIO_DEVICE_ID_BROADCOM_4354		0x4354

From cdd7220b7139c7f88c80f67b9ebe20cd59e271de Mon Sep 17 00:00:00 2001
From: Thomas Richter <tmricht@linux.ibm.com>
Date: Tue, 8 May 2018 10:18:39 +0200
Subject: [PATCH 1467/1852] s390/cpum_sf: Add data entry sizes to sampling
 trailer entry

[ Upstream commit 77715b7ddb446bd39a06f3376e85f4bb95b29bb8 ]

The CPU Measurement sampling facility creates a trailer entry for each
Sample-Data-Block of stored samples. The trailer entry contains the sizes
(in bytes) of the stored sampling types:
 - basic-sampling data entry size
 - diagnostic-sampling data entry size
Both sizes are 2 bytes long.

This patch changes the trailer entry definition to reflect this.

Fixes: fcc77f507333 ("s390/cpum_sf: Atomically reset trailer entry fields of sample-data-blocks")
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/cpu_mf.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/s390/include/asm/cpu_mf.h b/arch/s390/include/asm/cpu_mf.h
index 9dd04b9e97821..80c0b9c9c3b2f 100644
--- a/arch/s390/include/asm/cpu_mf.h
+++ b/arch/s390/include/asm/cpu_mf.h
@@ -129,7 +129,9 @@ struct hws_trailer_entry {
 			unsigned int f:1;	/* 0 - Block Full Indicator   */
 			unsigned int a:1;	/* 1 - Alert request control  */
 			unsigned int t:1;	/* 2 - Timestamp format	      */
-			unsigned long long:61;	/* 3 - 63: Reserved	      */
+			unsigned int :29;	/* 3 - 31: Reserved	      */
+			unsigned int bsdes:16;	/* 32-47: size of basic SDE   */
+			unsigned int dsdes:16;	/* 48-63: size of diagnostic SDE */
 		};
 		unsigned long long flags;	/* 0 - 63: All indicators     */
 	};

From a93f88882f63cc7acd184c9ae560467eb435063d Mon Sep 17 00:00:00 2001
From: Thomas Richter <tmricht@linux.ibm.com>
Date: Tue, 8 May 2018 07:53:39 +0200
Subject: [PATCH 1468/1852] perf: fix invalid bit in diagnostic entry

[ Upstream commit 3c0a83b14ea71fef5ccc93a3bd2de5f892be3194 ]

The s390 CPU measurement facility sampling mode supports basic entries
and diagnostic entries. Each entry has a valid bit to indicate the
status of the entry as valid or invalid.

This bit is bit 31 in the diagnostic entry, but the bit mask definition
refers to bit 30.

Fix this by making the reserved field one bit larger.

Fixes: 7e75fc3ff4cf ("s390/cpum_sf: Add raw data sampling to support the diagnostic-sampling function")
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/cpu_mf.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/s390/include/asm/cpu_mf.h b/arch/s390/include/asm/cpu_mf.h
index 80c0b9c9c3b2f..b2f8c52b38401 100644
--- a/arch/s390/include/asm/cpu_mf.h
+++ b/arch/s390/include/asm/cpu_mf.h
@@ -113,7 +113,7 @@ struct hws_basic_entry {
 
 struct hws_diag_entry {
 	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
-	unsigned int R:14;	    /* 16-19 and 20-30 reserved		 */
+	unsigned int R:15;	    /* 16-19 and 20-30 reserved		 */
 	unsigned int I:1;	    /* 31 entry valid or invalid	 */
 	u8	     data[];	    /* Machine-dependent sample data	 */
 } __packed;

From 184b9de7b59ad85d1eb88c4812c46e073988ca8a Mon Sep 17 00:00:00 2001
From: Wenwen Wang <wang6495@umn.edu>
Date: Mon, 7 May 2018 19:46:43 -0500
Subject: [PATCH 1469/1852] scsi: 3w-9xxx: fix a missing-check bug

[ Upstream commit c9318a3e0218bc9dacc25be46b9eec363259536f ]

In twa_chrdev_ioctl(), the ioctl driver command is firstly copied from
the userspace pointer 'argp' and saved to the kernel object
'driver_command'.  Then a security check is performed on the data buffer
size indicated by 'driver_command', which is
'driver_command.buffer_length'. If the security check is passed, the
entire ioctl command is copied again from the 'argp' pointer and saved
to the kernel object 'tw_ioctl'. Then, various operations are performed
on 'tw_ioctl' according to the 'cmd'. Given that the 'argp' pointer
resides in userspace, a malicious userspace process can race to change
the buffer size between the two copies. This way, the user can bypass
the security check and inject invalid data buffer size. This can cause
potential security issues in the following execution.

This patch checks for capable(CAP_SYS_ADMIN) in twa_chrdev_open()t o
avoid the above issues.

Signed-off-by: Wenwen Wang <wang6495@umn.edu>
Acked-by: Adam Radford <aradford@gmail.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/3w-9xxx.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index a56a7b243e91f..5466246c69b49 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -889,6 +889,11 @@ static int twa_chrdev_open(struct inode *inode, struct file *file)
 	unsigned int minor_number;
 	int retval = TW_IOCTL_ERROR_OS_ENODEV;
 
+	if (!capable(CAP_SYS_ADMIN)) {
+		retval = -EACCES;
+		goto out;
+	}
+
 	minor_number = iminor(inode);
 	if (minor_number >= twa_device_extension_count)
 		goto out;

From 46a1bda7af110969f56ed2de35301dc136920eb0 Mon Sep 17 00:00:00 2001
From: Wenwen Wang <wang6495@umn.edu>
Date: Mon, 7 May 2018 19:54:01 -0500
Subject: [PATCH 1470/1852] scsi: 3w-xxxx: fix a missing-check bug

[ Upstream commit 9899e4d3523faaef17c67141aa80ff2088f17871 ]

In tw_chrdev_ioctl(), the length of the data buffer is firstly copied
from the userspace pointer 'argp' and saved to the kernel object
'data_buffer_length'. Then a security check is performed on it to make
sure that the length is not more than 'TW_MAX_IOCTL_SECTORS *
512'. Otherwise, an error code -EINVAL is returned. If the security
check is passed, the entire ioctl command is copied again from the
'argp' pointer and saved to the kernel object 'tw_ioctl'. Then, various
operations are performed on 'tw_ioctl' according to the 'cmd'. Given
that the 'argp' pointer resides in userspace, a malicious userspace
process can race to change the buffer length between the two
copies. This way, the user can bypass the security check and inject
invalid data buffer length. This can cause potential security issues in
the following execution.

This patch checks for capable(CAP_SYS_ADMIN) in tw_chrdev_open() to
avoid the above issues.

Signed-off-by: Wenwen Wang <wang6495@umn.edu>
Acked-by: Adam Radford <aradford@gmail.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/3w-xxxx.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/scsi/3w-xxxx.c b/drivers/scsi/3w-xxxx.c
index 2940bd769936c..14af380362870 100644
--- a/drivers/scsi/3w-xxxx.c
+++ b/drivers/scsi/3w-xxxx.c
@@ -1034,6 +1034,9 @@ static int tw_chrdev_open(struct inode *inode, struct file *file)
 
 	dprintk(KERN_WARNING "3w-xxxx: tw_ioctl_open()\n");
 
+	if (!capable(CAP_SYS_ADMIN))
+		return -EACCES;
+
 	minor_number = iminor(inode);
 	if (minor_number >= tw_device_extension_count)
 		return -ENODEV;

From b83abdc54abb41aa66a4734984ebbe65bbd91a69 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 3 May 2018 13:54:32 +0300
Subject: [PATCH 1471/1852] scsi: megaraid: silence a static checker bug

[ Upstream commit 27e833dabab74ee665e487e291c9afc6d71effba ]

If we had more than 32 megaraid cards then it would cause memory
corruption.  That's not likely, of course, but it's handy to enforce it
and make the static checker happy.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/megaraid.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/scsi/megaraid.c b/drivers/scsi/megaraid.c
index 9d05302a3bcd5..19bffe0b2cc0a 100644
--- a/drivers/scsi/megaraid.c
+++ b/drivers/scsi/megaraid.c
@@ -4197,6 +4197,9 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
 	int irq, i, j;
 	int error = -ENODEV;
 
+	if (hba_count >= MAX_CONTROLLERS)
+		goto out;
+
 	if (pci_enable_device(pdev))
 		goto out;
 	pci_set_master(pdev);

From 7c9e7c8e72bbe513d788fdc9c8fd181eafd2af15 Mon Sep 17 00:00:00 2001
From: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Date: Thu, 26 Apr 2018 13:51:16 +0200
Subject: [PATCH 1472/1852] thermal: exynos: fix setting rising_threshold for
 Exynos5433

[ Upstream commit 8bfc218d0ebbabcba8ed2b8ec1831e0cf1f71629 ]

Add missing clearing of the previous value when setting rising
temperature threshold.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/thermal/samsung/exynos_tmu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index fa61eff88496e..16d45a25284f1 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -585,6 +585,7 @@ static int exynos5433_tmu_initialize(struct platform_device *pdev)
 		threshold_code = temp_to_code(data, temp);
 
 		rising_threshold = readl(data->base + rising_reg_offset);
+		rising_threshold &= ~(0xff << j * 8);
 		rising_threshold |= (threshold_code << j * 8);
 		writel(rising_threshold, data->base + rising_reg_offset);
 

From fe671a9dade3410e942ef0b24fc762fa423e1815 Mon Sep 17 00:00:00 2001
From: Jakub Kicinski <jakub.kicinski@netronome.com>
Date: Thu, 3 May 2018 18:37:17 -0700
Subject: [PATCH 1473/1852] bpf: fix references to free_bpf_prog_info() in
 comments

[ Upstream commit ab7f5bf0928be2f148d000a6eaa6c0a36e74750e ]

Comments in the verifier refer to free_bpf_prog_info() which
seems to have never existed in tree.  Replace it with
free_used_maps().

Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Quentin Monnet <quentin.monnet@netronome.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/bpf/verifier.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
index 79e3c21a35d07..35dfa9e9d69e1 100644
--- a/kernel/bpf/verifier.c
+++ b/kernel/bpf/verifier.c
@@ -2101,7 +2101,7 @@ static int replace_map_fd_with_map_ptr(struct verifier_env *env)
 			/* hold the map. If the program is rejected by verifier,
 			 * the map will be released by release_maps() or it
 			 * will be used by the valid program until it's unloaded
-			 * and all maps are released in free_bpf_prog_info()
+			 * and all maps are released in free_used_maps()
 			 */
 			map = bpf_map_inc(map, false);
 			if (IS_ERR(map)) {
@@ -2487,7 +2487,7 @@ int bpf_check(struct bpf_prog **prog, union bpf_attr *attr)
 		vfree(log_buf);
 	if (!env->prog->aux->used_maps)
 		/* if we didn't copy map pointers into bpf_prog_info, release
-		 * them now. Otherwise free_bpf_prog_info() will release them.
+		 * them now. Otherwise free_used_maps() will release them.
 		 */
 		release_maps(env);
 	*prog = env->prog;

From ff9447c2b72796f2b8f00fbb946aa1195d353472 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Date: Fri, 20 Apr 2018 08:32:16 -0400
Subject: [PATCH 1474/1852] media: siano: get rid of __le32/__le16 cast
 warnings

[ Upstream commit e1b7f11b37def5f3021c06e8c2b4953e099357aa ]

Those are all false-positives that appear with smatch when building for
arm:

  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:38:36: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:47:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:67:35: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:67:35: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:67:35: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:67:35: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:84:44: warning: cast to restricted __le32
  drivers/media/common/siano/smsendian.c:98:26: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:98:26: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:98:26: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:98:26: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:99:28: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:99:28: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:99:28: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:99:28: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:100:27: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:100:27: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:100:27: warning: cast to restricted __le16
  drivers/media/common/siano/smsendian.c:100:27: warning: cast to restricted __le16

Get rid of them by adding explicit forced casts.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/common/siano/smsendian.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/media/common/siano/smsendian.c b/drivers/media/common/siano/smsendian.c
index bfe831c10b1c4..b95a631f23f9a 100644
--- a/drivers/media/common/siano/smsendian.c
+++ b/drivers/media/common/siano/smsendian.c
@@ -35,7 +35,7 @@ void smsendian_handle_tx_message(void *buffer)
 	switch (msg->x_msg_header.msg_type) {
 	case MSG_SMS_DATA_DOWNLOAD_REQ:
 	{
-		msg->msg_data[0] = le32_to_cpu(msg->msg_data[0]);
+		msg->msg_data[0] = le32_to_cpu((__force __le32)(msg->msg_data[0]));
 		break;
 	}
 
@@ -44,7 +44,7 @@ void smsendian_handle_tx_message(void *buffer)
 				sizeof(struct sms_msg_hdr))/4;
 
 		for (i = 0; i < msg_words; i++)
-			msg->msg_data[i] = le32_to_cpu(msg->msg_data[i]);
+			msg->msg_data[i] = le32_to_cpu((__force __le32)msg->msg_data[i]);
 
 		break;
 	}
@@ -64,7 +64,7 @@ void smsendian_handle_rx_message(void *buffer)
 	{
 		struct sms_version_res *ver =
 			(struct sms_version_res *) msg;
-		ver->chip_model = le16_to_cpu(ver->chip_model);
+		ver->chip_model = le16_to_cpu((__force __le16)ver->chip_model);
 		break;
 	}
 
@@ -81,7 +81,7 @@ void smsendian_handle_rx_message(void *buffer)
 				sizeof(struct sms_msg_hdr))/4;
 
 		for (i = 0; i < msg_words; i++)
-			msg->msg_data[i] = le32_to_cpu(msg->msg_data[i]);
+			msg->msg_data[i] = le32_to_cpu((__force __le32)msg->msg_data[i]);
 
 		break;
 	}
@@ -95,9 +95,9 @@ void smsendian_handle_message_header(void *msg)
 #ifdef __BIG_ENDIAN
 	struct sms_msg_hdr *phdr = (struct sms_msg_hdr *)msg;
 
-	phdr->msg_type = le16_to_cpu(phdr->msg_type);
-	phdr->msg_length = le16_to_cpu(phdr->msg_length);
-	phdr->msg_flags = le16_to_cpu(phdr->msg_flags);
+	phdr->msg_type = le16_to_cpu((__force __le16)phdr->msg_type);
+	phdr->msg_length = le16_to_cpu((__force __le16)phdr->msg_length);
+	phdr->msg_flags = le16_to_cpu((__force __le16)phdr->msg_flags);
 #endif /* __BIG_ENDIAN */
 }
 EXPORT_SYMBOL_GPL(smsendian_handle_message_header);

From 4866feb1935a6b419cd6b0356afb369cdd5f0a58 Mon Sep 17 00:00:00 2001
From: Satendra Singh Thakur <satendra.t@samsung.com>
Date: Thu, 3 May 2018 11:19:32 +0530
Subject: [PATCH 1475/1852] drm/atomic: Handling the case when setting old crtc
 for plane

[ Upstream commit fc2a69f3903dfd97cd47f593e642b47918c949df ]

In the func drm_atomic_set_crtc_for_plane, with the current code,
if crtc of the plane_state and crtc passed as argument to the func
are same, entire func will executed in vein.
It will get state of crtc and clear and set the bits in plane_mask.
All these steps are not required for same old crtc.
Ideally, we should do nothing in this case, this patch handles the same,
and causes the program to return without doing anything in such scenario.

Signed-off-by: Satendra Singh Thakur <satendra.t@samsung.com>
Cc: Madhur Verma <madhur.verma@samsung.com>
Cc: Hemanshu Srivastava <hemanshu.s@samsung.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1525326572-25854-1-git-send-email-satendra.t@samsung.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/drm_atomic.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index c424c1948b4ee..63ba9c1e0f23c 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1140,7 +1140,9 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state,
 {
 	struct drm_plane *plane = plane_state->plane;
 	struct drm_crtc_state *crtc_state;
-
+	/* Nothing to do for same crtc*/
+	if (plane_state->crtc == crtc)
+		return 0;
 	if (plane_state->crtc) {
 		crtc_state = drm_atomic_get_crtc_state(plane_state->state,
 						       plane_state->crtc);

From 3c1e9b7026f811053ea7357890b2d690b6569fd2 Mon Sep 17 00:00:00 2001
From: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Date: Wed, 2 May 2018 22:48:16 +0900
Subject: [PATCH 1476/1852] ALSA: hda/ca0132: fix build failure when a local
 macro is defined

[ Upstream commit 8e142e9e628975b0dddd05cf1b095331dff6e2de ]

DECLARE_TLV_DB_SCALE (alias of SNDRV_CTL_TLVD_DECLARE_DB_SCALE) is used but
tlv.h is not included. This causes build failure when local macro is
defined by comment-out.

This commit fixes the bug. At the same time, the alias macro is replaced
with a destination macro added at a commit 46e860f76804 ("ALSA: rename
TLV-related macros so that they're friendly to user applications")

Reported-by: Connor McAdams <conmanx360@gmail.com>
Fixes: 44f0c9782cc6 ('ALSA: hda/ca0132: Add tuning controls')
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_ca0132.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c
index 29e1ce2263bc2..c55c0131be0a8 100644
--- a/sound/pci/hda/patch_ca0132.c
+++ b/sound/pci/hda/patch_ca0132.c
@@ -38,6 +38,10 @@
 /* Enable this to see controls for tuning purpose. */
 /*#define ENABLE_TUNING_CONTROLS*/
 
+#ifdef ENABLE_TUNING_CONTROLS
+#include <sound/tlv.h>
+#endif
+
 #define FLOAT_ZERO	0x00000000
 #define FLOAT_ONE	0x3f800000
 #define FLOAT_TWO	0x40000000
@@ -3067,8 +3071,8 @@ static int equalizer_ctl_put(struct snd_kcontrol *kcontrol,
 	return 1;
 }
 
-static const DECLARE_TLV_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
-static const DECLARE_TLV_DB_SCALE(eq_db_scale, -2400, 100, 0);
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
 
 static int add_tuning_control(struct hda_codec *codec,
 				hda_nid_t pnid, hda_nid_t nid,

From 2e1903a778efe1027c852a01ed8824f796a44508 Mon Sep 17 00:00:00 2001
From: Dmitry Osipenko <digetx@gmail.com>
Date: Mon, 9 Apr 2018 22:28:27 +0300
Subject: [PATCH 1477/1852] memory: tegra: Do not handle spurious interrupts

[ Upstream commit bf3fbdfbec947cdd04b2f2c4bce11534c8786eee ]

The ISR reads interrupts-enable mask, but doesn't utilize it. Apply the
mask to the interrupt status and don't handle interrupts that MC driver
haven't asked for. Kernel would disable spurious MC IRQ and report the
error. This would happen only in a case of a very severe bug.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/memory/tegra/mc.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index a1ae0cc2b86d5..13dcee4ed0cf7 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -252,8 +252,11 @@ static irqreturn_t tegra_mc_irq(int irq, void *data)
 	unsigned int bit;
 
 	/* mask all interrupts to avoid flooding */
-	status = mc_readl(mc, MC_INTSTATUS);
 	mask = mc_readl(mc, MC_INTMASK);
+	status = mc_readl(mc, MC_INTSTATUS) & mask;
+
+	if (!status)
+		return IRQ_NONE;
 
 	for_each_set_bit(bit, &status, 32) {
 		const char *error = status_names[bit] ?: "unknown";

From 09c1922b128e14d82a4d3014e26430536cceff15 Mon Sep 17 00:00:00 2001
From: Dmitry Osipenko <digetx@gmail.com>
Date: Mon, 9 Apr 2018 22:28:29 +0300
Subject: [PATCH 1478/1852] memory: tegra: Apply interrupts mask per SoC

[ Upstream commit 1c74d5c0de0c2cc29fef97a19251da2ad6f579bd ]

Currently we are enabling handling of interrupts specific to Tegra124+
which happen to overlap with previous generations. Let's specify
interrupts mask per SoC generation for consistency and in a preparation
of squashing of Tegra20 driver into the common one that will enable
handling of GART faults which may be undesirable by newer generations.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/memory/tegra/mc.c       | 21 +++------------------
 drivers/memory/tegra/mc.h       |  9 +++++++++
 drivers/memory/tegra/tegra114.c |  2 ++
 drivers/memory/tegra/tegra124.c |  6 ++++++
 drivers/memory/tegra/tegra210.c |  3 +++
 drivers/memory/tegra/tegra30.c  |  2 ++
 include/soc/tegra/mc.h          |  2 ++
 7 files changed, 27 insertions(+), 18 deletions(-)

diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 13dcee4ed0cf7..6ab481ee8ece3 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -20,14 +20,6 @@
 #include "mc.h"
 
 #define MC_INTSTATUS 0x000
-#define  MC_INT_DECERR_MTS (1 << 16)
-#define  MC_INT_SECERR_SEC (1 << 13)
-#define  MC_INT_DECERR_VPR (1 << 12)
-#define  MC_INT_INVALID_APB_ASID_UPDATE (1 << 11)
-#define  MC_INT_INVALID_SMMU_PAGE (1 << 10)
-#define  MC_INT_ARBITRATION_EMEM (1 << 9)
-#define  MC_INT_SECURITY_VIOLATION (1 << 8)
-#define  MC_INT_DECERR_EMEM (1 << 6)
 
 #define MC_INTMASK 0x004
 
@@ -248,13 +240,11 @@ static const char *const error_names[8] = {
 static irqreturn_t tegra_mc_irq(int irq, void *data)
 {
 	struct tegra_mc *mc = data;
-	unsigned long status, mask;
+	unsigned long status;
 	unsigned int bit;
 
 	/* mask all interrupts to avoid flooding */
-	mask = mc_readl(mc, MC_INTMASK);
-	status = mc_readl(mc, MC_INTSTATUS) & mask;
-
+	status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask;
 	if (!status)
 		return IRQ_NONE;
 
@@ -349,7 +339,6 @@ static int tegra_mc_probe(struct platform_device *pdev)
 	const struct of_device_id *match;
 	struct resource *res;
 	struct tegra_mc *mc;
-	u32 value;
 	int err;
 
 	match = of_match_node(tegra_mc_of_match, pdev->dev.of_node);
@@ -417,11 +406,7 @@ static int tegra_mc_probe(struct platform_device *pdev)
 
 	WARN(!mc->soc->client_id_mask, "Missing client ID mask for this SoC\n");
 
-	value = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
-		MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE |
-		MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM;
-
-	mc_writel(mc, value, MC_INTMASK);
+	mc_writel(mc, mc->soc->intmask, MC_INTMASK);
 
 	return 0;
 }
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index ddb16676c3af4..24e020b4609be 100644
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -14,6 +14,15 @@
 
 #include <soc/tegra/mc.h>
 
+#define MC_INT_DECERR_MTS (1 << 16)
+#define MC_INT_SECERR_SEC (1 << 13)
+#define MC_INT_DECERR_VPR (1 << 12)
+#define MC_INT_INVALID_APB_ASID_UPDATE (1 << 11)
+#define MC_INT_INVALID_SMMU_PAGE (1 << 10)
+#define MC_INT_ARBITRATION_EMEM (1 << 9)
+#define MC_INT_SECURITY_VIOLATION (1 << 8)
+#define MC_INT_DECERR_EMEM (1 << 6)
+
 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
 {
 	return readl(mc->regs + offset);
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c
index ba8fff3d66a65..6d2a5a849d928 100644
--- a/drivers/memory/tegra/tegra114.c
+++ b/drivers/memory/tegra/tegra114.c
@@ -930,4 +930,6 @@ const struct tegra_mc_soc tegra114_mc_soc = {
 	.atom_size = 32,
 	.client_id_mask = 0x7f,
 	.smmu = &tegra114_smmu_soc,
+	.intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION |
+		   MC_INT_DECERR_EMEM,
 };
diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c
index 21e7255e3d96a..234e74f97a4bc 100644
--- a/drivers/memory/tegra/tegra124.c
+++ b/drivers/memory/tegra/tegra124.c
@@ -1019,6 +1019,9 @@ const struct tegra_mc_soc tegra124_mc_soc = {
 	.smmu = &tegra124_smmu_soc,
 	.emem_regs = tegra124_mc_emem_regs,
 	.num_emem_regs = ARRAY_SIZE(tegra124_mc_emem_regs),
+	.intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 };
 #endif /* CONFIG_ARCH_TEGRA_124_SOC */
 
@@ -1041,5 +1044,8 @@ const struct tegra_mc_soc tegra132_mc_soc = {
 	.atom_size = 32,
 	.client_id_mask = 0x7f,
 	.smmu = &tegra132_smmu_soc,
+	.intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 };
 #endif /* CONFIG_ARCH_TEGRA_132_SOC */
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index 5e144abe4c181..47c78a6d8f009 100644
--- a/drivers/memory/tegra/tegra210.c
+++ b/drivers/memory/tegra/tegra210.c
@@ -1077,4 +1077,7 @@ const struct tegra_mc_soc tegra210_mc_soc = {
 	.atom_size = 64,
 	.client_id_mask = 0xff,
 	.smmu = &tegra210_smmu_soc,
+	.intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 };
diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c
index b44737840e70c..d0689428ea1a5 100644
--- a/drivers/memory/tegra/tegra30.c
+++ b/drivers/memory/tegra/tegra30.c
@@ -952,4 +952,6 @@ const struct tegra_mc_soc tegra30_mc_soc = {
 	.atom_size = 16,
 	.client_id_mask = 0x7f,
 	.smmu = &tegra30_smmu_soc,
+	.intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION |
+		   MC_INT_DECERR_EMEM,
 };
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index 44202ff897fd9..f759e0918037b 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -99,6 +99,8 @@ struct tegra_mc_soc {
 	u8 client_id_mask;
 
 	const struct tegra_smmu_soc *smmu;
+
+	u32 intmask;
 };
 
 struct tegra_mc {

From c0ce2cf4b2c128a27b59b4496dc8423f6b48175d Mon Sep 17 00:00:00 2001
From: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Date: Tue, 24 Apr 2018 15:14:57 +0200
Subject: [PATCH 1479/1852] drm/gma500: fix psb_intel_lvds_mode_valid()'s
 return type

[ Upstream commit 2ea009095c6e7396915a1d0dd480c41f02985f79 ]

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method, psb_intel_lvds_mode_valid(), uses an 'int' for it.

Fix this by using 'enum drm_mode_status' for psb_intel_lvds_mode_valid().

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20180424131458.2060-1-luc.vanoostenryck@gmail.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/gma500/psb_intel_drv.h  | 2 +-
 drivers/gpu/drm/gma500/psb_intel_lvds.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h
index 860dd2177ca15..283570080d47c 100644
--- a/drivers/gpu/drm/gma500/psb_intel_drv.h
+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
@@ -252,7 +252,7 @@ extern int intelfb_remove(struct drm_device *dev,
 extern bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
 				      const struct drm_display_mode *mode,
 				      struct drm_display_mode *adjusted_mode);
-extern int psb_intel_lvds_mode_valid(struct drm_connector *connector,
+extern enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
 				     struct drm_display_mode *mode);
 extern int psb_intel_lvds_set_property(struct drm_connector *connector,
 					struct drm_property *property,
diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c
index 33df3b8c2b053..a1397a1fc1e46 100644
--- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
@@ -343,7 +343,7 @@ static void psb_intel_lvds_restore(struct drm_connector *connector)
 	}
 }
 
-int psb_intel_lvds_mode_valid(struct drm_connector *connector,
+enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
 				 struct drm_display_mode *mode)
 {
 	struct drm_psb_private *dev_priv = connector->dev->dev_private;

From 610e4bb5ea813dbd9270ee3ef57c14cf4e00fd3d Mon Sep 17 00:00:00 2001
From: Chris Novakovic <chris@chrisn.me.uk>
Date: Tue, 24 Apr 2018 03:56:37 +0100
Subject: [PATCH 1480/1852] ipconfig: Correctly initialise ic_nameservers

[ Upstream commit 300eec7c0a2495f771709c7642aa15f7cc148b83 ]

ic_nameservers, which stores the list of name servers discovered by
ipconfig, is initialised (i.e. has all of its elements set to NONE, or
0xffffffff) by ic_nameservers_predef() in the following scenarios:

 - before the "ip=" and "nfsaddrs=" kernel command line parameters are
   parsed (in ip_auto_config_setup());
 - before autoconfiguring via DHCP or BOOTP (in ic_bootp_init()), in
   order to clear any values that may have been set after parsing "ip="
   or "nfsaddrs=" and are no longer needed.

This means that ic_nameservers_predef() is not called when neither "ip="
nor "nfsaddrs=" is specified on the kernel command line. In this
scenario, every element in ic_nameservers remains set to 0x00000000,
which is indistinguishable from ANY and causes pnp_seq_show() to write
the following (bogus) information to /proc/net/pnp:

  #MANUAL
  nameserver 0.0.0.0
  nameserver 0.0.0.0
  nameserver 0.0.0.0

This is potentially problematic for systems that blindly link
/etc/resolv.conf to /proc/net/pnp.

Ensure that ic_nameservers is also initialised when neither "ip=" nor
"nfsaddrs=" are specified by calling ic_nameservers_predef() in
ip_auto_config(), but only when ip_auto_config_setup() was not called
earlier. This causes the following to be written to /proc/net/pnp, and
is consistent with what gets written when ipconfig is configured
manually but no name servers are specified on the kernel command line:

  #MANUAL

Signed-off-by: Chris Novakovic <chris@chrisn.me.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/ipconfig.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 9d6b9c4c5f822..60f564db25a3d 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -790,6 +790,11 @@ static void __init ic_bootp_init_ext(u8 *e)
  */
 static inline void __init ic_bootp_init(void)
 {
+	/* Re-initialise all name servers to NONE, in case any were set via the
+	 * "ip=" or "nfsaddrs=" kernel command line parameters: any IP addresses
+	 * specified there will already have been decoded but are no longer
+	 * needed
+	 */
 	ic_nameservers_predef();
 
 	dev_add_pack(&bootp_packet_type);
@@ -1423,6 +1428,13 @@ static int __init ip_auto_config(void)
 	int err;
 	unsigned int i;
 
+	/* Initialise all name servers to NONE (but only if the "ip=" or
+	 * "nfsaddrs=" kernel command line parameters weren't decoded, otherwise
+	 * we'll overwrite the IP addresses specified there)
+	 */
+	if (ic_set_manually == 0)
+		ic_nameservers_predef();
+
 #ifdef CONFIG_PROC_FS
 	proc_create("pnp", S_IRUGO, init_net.proc_net, &pnp_seq_fops);
 #endif /* CONFIG_PROC_FS */
@@ -1640,6 +1652,7 @@ static int __init ip_auto_config_setup(char *addrs)
 		return 1;
 	}
 
+	/* Initialise all name servers to NONE */
 	ic_nameservers_predef();
 
 	/* Parse string for static IP assignment.  */

From da5dc4b8b137e9533c9495308409713bdb791df8 Mon Sep 17 00:00:00 2001
From: Siva Rebbagondla <siva.rebbagondla@redpinesignals.com>
Date: Wed, 11 Apr 2018 12:13:32 +0530
Subject: [PATCH 1481/1852] rsi: Fix 'invalid vdd' warning in mmc

[ Upstream commit 78e450719c702784e42af6da912d3692fd3da0cb ]

While performing cleanup, driver is messing with card->ocr
value by not masking rocr against ocr_avail. Below panic
is observed with some of the SDIO host controllers due to
this. Issue is resolved by reverting incorrect modifications
to vdd.

[  927.423821] mmc1: Invalid vdd 0x1f
[  927.423925] Modules linked in: rsi_sdio(+) cmac bnep arc4 rsi_91x
	       mac80211 cfg80211 btrsi rfcomm bluetooth ecdh_generic
[  927.424073] CPU: 0 PID: 1624 Comm: insmod Tainted: G		W        4.15.0-1000-caracalla #1
[  927.424075] Hardware name: Dell Inc. Edge Gateway	3003/      , BIOS 01.00.06 01/22/2018
[  927.424082] RIP: 0010:sdhci_set_power_noreg+0xdd/0x190[sdhci]
[  927.424085] RSP: 0018:ffffac3fc064b930 EFLAGS:  00010282
[  927.424107] Call Trace:
[  927.424118]  sdhci_set_power+0x5a/0x60 [sdhci]
[  927.424125]  sdhci_set_ios+0x360/0x3b0 [sdhci]
[  927.424133]  mmc_set_initial_state+0x92/0x120
[  927.424137]  mmc_power_up.part.34+0x33/0x1d0
[  927.424141]  mmc_power_up+0x17/0x20
[  927.424147]  mmc_sdio_runtime_resume+0x2d/0x50
[  927.424151]  mmc_runtime_resume+0x17/0x20
[  927.424156]  __rpm_callback+0xc4/0x200
[  927.424161]  ? idr_alloc_cyclic+0x57/0xd0
[  927.424165]  ? mmc_runtime_suspend+0x20/0x20
[  927.424169]  rpm_callback+0x24/0x80
[  927.424172]  ? mmc_runtime_suspend+0x20/0x20
[  927.424176]  rpm_resume+0x4b3/0x6c0
[  927.424181]  __pm_runtime_resume+0x4e/0x80
[  927.424188]  driver_probe_device+0x41/0x490
[  927.424192]  __driver_attach+0xdf/0xf0
[  927.424196]  ? driver_probe_device+0x490/0x490
[  927.424201]  bus_for_each_dev+0x6c/0xc0
[  927.424205]  driver_attach+0x1e/0x20
[  927.424209]  bus_add_driver+0x1f4/0x270
[  927.424217]  ? rsi_sdio_ack_intr+0x50/0x50 [rsi_sdio]
[  927.424221]  driver_register+0x60/0xe0
[  927.424227]  ? rsi_sdio_ack_intr+0x50/0x50 [rsi_sdio]
[  927.424231]  sdio_register_driver+0x20/0x30
[  927.424237]  rsi_module_init+0x16/0x40 [rsi_sdio]

Signed-off-by: Siva Rebbagondla <siva.rebbagondla@redpinesignals.com>
Signed-off-by: Amitkumar Karwar <amit.karwar@redpinesignals.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/rsi/rsi_91x_sdio.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/wireless/rsi/rsi_91x_sdio.c b/drivers/net/wireless/rsi/rsi_91x_sdio.c
index 8428858204a67..fc895b466ebb1 100644
--- a/drivers/net/wireless/rsi/rsi_91x_sdio.c
+++ b/drivers/net/wireless/rsi/rsi_91x_sdio.c
@@ -155,7 +155,6 @@ static void rsi_reset_card(struct sdio_func *pfunction)
 	int err;
 	struct mmc_card *card = pfunction->card;
 	struct mmc_host *host = card->host;
-	s32 bit = (fls(host->ocr_avail) - 1);
 	u8 cmd52_resp;
 	u32 clock, resp, i;
 	u16 rca;
@@ -175,7 +174,6 @@ static void rsi_reset_card(struct sdio_func *pfunction)
 	msleep(20);
 
 	/* Initialize the SDIO card */
-	host->ios.vdd = bit;
 	host->ios.chip_select = MMC_CS_DONTCARE;
 	host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
 	host->ios.power_mode = MMC_POWER_UP;

From f257027f760097b655effe84a2b38b5768abf19e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ondrej=20Mosn=C3=A1=C4=8Dek?= <omosnace@redhat.com>
Date: Mon, 9 Apr 2018 10:00:06 +0200
Subject: [PATCH 1482/1852] audit: allow not equal op for audit by executable

[ Upstream commit 23bcc480dac204c7dbdf49d96b2c918ed98223c2 ]

Current implementation of auditing by executable name only implements
the 'equal' operator. This patch extends it to also support the 'not
equal' operator.

See: https://github.com/linux-audit/audit-kernel/issues/53

Signed-off-by: Ondrej Mosnacek <omosnace@redhat.com>
Reviewed-by: Richard Guy Briggs <rgb@redhat.com>
Signed-off-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/auditfilter.c | 2 +-
 kernel/auditsc.c     | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/kernel/auditfilter.c b/kernel/auditfilter.c
index b8ff9e1937536..b57f929f1b468 100644
--- a/kernel/auditfilter.c
+++ b/kernel/auditfilter.c
@@ -406,7 +406,7 @@ static int audit_field_valid(struct audit_entry *entry, struct audit_field *f)
 			return -EINVAL;
 		break;
 	case AUDIT_EXE:
-		if (f->op != Audit_equal)
+		if (f->op != Audit_not_equal && f->op != Audit_equal)
 			return -EINVAL;
 		if (entry->rule.listnr != AUDIT_FILTER_EXIT)
 			return -EINVAL;
diff --git a/kernel/auditsc.c b/kernel/auditsc.c
index 76f41594ddca0..2b9a4739381d8 100644
--- a/kernel/auditsc.c
+++ b/kernel/auditsc.c
@@ -470,6 +470,8 @@ static int audit_filter_rules(struct task_struct *tsk,
 			break;
 		case AUDIT_EXE:
 			result = audit_exe_compare(tsk, rule->exe);
+			if (f->op == Audit_not_equal)
+				result = !result;
 			break;
 		case AUDIT_UID:
 			result = audit_uid_comparator(cred->uid, f->op, f->uid);

From 8e449739c65817063d33e34aceaf311521e91180 Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Tue, 10 Apr 2018 15:05:42 +0200
Subject: [PATCH 1483/1852] microblaze: Fix simpleImage format generation

[ Upstream commit ece97f3a5fb50cf5f98886fbc63c9665f2bb199d ]

simpleImage generation was broken for some time. This patch is fixing
steps how simpleImage.*.ub file is generated. Steps are objdump of
vmlinux and create .ub.
Also make sure that there is striped elf version with .strip suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/microblaze/boot/Makefile | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index 91d2068da1b9b..0f3fe6a151dce 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -21,17 +21,19 @@ $(obj)/linux.bin.gz: $(obj)/linux.bin FORCE
 quiet_cmd_cp = CP      $< $@$2
 	cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
 
-quiet_cmd_strip = STRIP   $@
+quiet_cmd_strip = STRIP   $< $@$2
 	cmd_strip = $(STRIP) -K microblaze_start -K _end -K __log_buf \
-				-K _fdt_start vmlinux -o $@
+				-K _fdt_start $< -o $@$2
 
 UIMAGE_LOADADDR = $(CONFIG_KERNEL_BASE_ADDR)
+UIMAGE_IN = $@
+UIMAGE_OUT = $@.ub
 
 $(obj)/simpleImage.%: vmlinux FORCE
 	$(call if_changed,cp,.unstrip)
 	$(call if_changed,objcopy)
 	$(call if_changed,uimage)
-	$(call if_changed,strip)
-	@echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
+	$(call if_changed,strip,.strip)
+	@echo 'Kernel: $(UIMAGE_OUT) is ready' ' (#'`cat .version`')'
 
 clean-files += simpleImage.*.unstrip linux.bin.ub dts/*.dtb

From 92cfb0eed8773bdcfff40206d0f06504aeea6cb7 Mon Sep 17 00:00:00 2001
From: Dominik Bozek <dominikx.bozek@intel.com>
Date: Fri, 13 Apr 2018 10:42:31 -0700
Subject: [PATCH 1484/1852] usb: hub: Don't wait for connect state at resume
 for powered-off ports

[ Upstream commit 5d111f5190848d6fb1c414dc57797efea3526a2f ]

wait_for_connected() wait till a port change status to
USB_PORT_STAT_CONNECTION, but this is not possible if
the port is unpowered. The loop will only exit at timeout.

Such case take place if an over-current incident happen
while system is in S3. Then during resume wait_for_connected()
will wait 2s, which may be noticeable by the user.

Signed-off-by: Dominik Bozek <dominikx.bozek@intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/core/hub.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 11be8ae93ff41..ed6667144de47 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -3309,6 +3309,10 @@ static int wait_for_ss_port_enable(struct usb_device *udev,
 	while (delay_ms < 2000) {
 		if (status || *portstatus & USB_PORT_STAT_CONNECTION)
 			break;
+		if (!port_is_power_on(hub, *portstatus)) {
+			status = -ENODEV;
+			break;
+		}
 		msleep(20);
 		delay_ms += 20;
 		status = hub_port_status(hub, *port1, portstatus, portchange);

From a040e482f79b02530411c4ceaab916c1743fb22e Mon Sep 17 00:00:00 2001
From: Tudor-Dan Ambarus <tudor.ambarus@microchip.com>
Date: Tue, 3 Apr 2018 09:39:01 +0300
Subject: [PATCH 1485/1852] crypto: authencesn - don't leak pointers to authenc
 keys

[ Upstream commit 31545df391d58a3bb60e29b1192644a6f2b5a8dd ]

In crypto_authenc_esn_setkey we save pointers to the authenc keys
in a local variable of type struct crypto_authenc_keys and we don't
zeroize it after use. Fix this and don't leak pointers to the
authenc keys.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/authencesn.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crypto/authencesn.c b/crypto/authencesn.c
index 52154ef21b5e8..fa0c4567f697d 100644
--- a/crypto/authencesn.c
+++ b/crypto/authencesn.c
@@ -90,6 +90,7 @@ static int crypto_authenc_esn_setkey(struct crypto_aead *authenc_esn, const u8 *
 					   CRYPTO_TFM_RES_MASK);
 
 out:
+	memzero_explicit(&keys, sizeof(keys));
 	return err;
 
 badkey:

From 8bf917808f596c98d4ccad1677e5ff204a1559dd Mon Sep 17 00:00:00 2001
From: Tudor-Dan Ambarus <tudor.ambarus@microchip.com>
Date: Tue, 3 Apr 2018 09:39:00 +0300
Subject: [PATCH 1486/1852] crypto: authenc - don't leak pointers to authenc
 keys

[ Upstream commit ad2fdcdf75d169e7a5aec6c7cb421c0bec8ec711 ]

In crypto_authenc_setkey we save pointers to the authenc keys in
a local variable of type struct crypto_authenc_keys and we don't
zeroize it after use. Fix this and don't leak pointers to the
authenc keys.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/authenc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crypto/authenc.c b/crypto/authenc.c
index 55a354d572513..b7290c5b1eaa8 100644
--- a/crypto/authenc.c
+++ b/crypto/authenc.c
@@ -108,6 +108,7 @@ static int crypto_authenc_setkey(struct crypto_aead *authenc, const u8 *key,
 				       CRYPTO_TFM_RES_MASK);
 
 out:
+	memzero_explicit(&keys, sizeof(keys));
 	return err;
 
 badkey:

From e27306afaf9dae02373f5d15e9dc24b5a88943dd Mon Sep 17 00:00:00 2001
From: Suman Anna <s-anna@ti.com>
Date: Wed, 14 Mar 2018 11:41:36 -0400
Subject: [PATCH 1487/1852] media: omap3isp: fix unbalanced dma_iommu_mapping

[ Upstream commit b7e1e6859fbf60519fd82d7120cee106a6019512 ]

The OMAP3 ISP driver manages its MMU mappings through the IOMMU-aware
ARM DMA backend. The current code creates a dma_iommu_mapping and
attaches this to the ISP device, but never detaches the mapping in
either the probe failure paths or the driver remove path resulting
in an unbalanced mapping refcount and a memory leak. Fix this properly.

Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Suman Anna <s-anna@ti.com>
Tested-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/platform/omap3isp/isp.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index 9db03b54cfc3f..3b0c5fe4cf201 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -2078,6 +2078,7 @@ static int isp_initialize_modules(struct isp_device *isp)
 
 static void isp_detach_iommu(struct isp_device *isp)
 {
+	arm_iommu_detach_device(isp->dev);
 	arm_iommu_release_mapping(isp->mapping);
 	isp->mapping = NULL;
 	iommu_group_remove_device(isp->dev);
@@ -2111,8 +2112,7 @@ static int isp_attach_iommu(struct isp_device *isp)
 	mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
 	if (IS_ERR(mapping)) {
 		dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
-		ret = PTR_ERR(mapping);
-		goto error;
+		return PTR_ERR(mapping);
 	}
 
 	isp->mapping = mapping;
@@ -2127,7 +2127,8 @@ static int isp_attach_iommu(struct isp_device *isp)
 	return 0;
 
 error:
-	isp_detach_iommu(isp);
+	arm_iommu_release_mapping(isp->mapping);
+	isp->mapping = NULL;
 	return ret;
 }
 

From 10e1e3c2bc6dcc1b5814917488183c0a0bc341db Mon Sep 17 00:00:00 2001
From: Xose Vazquez Perez <xose.vazquez@gmail.com>
Date: Sat, 7 Apr 2018 00:47:23 +0200
Subject: [PATCH 1488/1852] scsi: scsi_dh: replace too broad "TP9" string with
 the exact models

[ Upstream commit 37b37d2609cb0ac267280ef27350b962d16d272e ]

SGI/TP9100 is not an RDAC array:
    ^^^
https://git.opensvc.com/gitweb.cgi?p=multipath-tools/.git;a=blob;f=libmultipath/hwtable.c;h=88b4700beb1d8940008020fbe4c3cd97d62f4a56;hb=HEAD#l235

This partially reverts commit 35204772ea03 ("[SCSI] scsi_dh_rdac :
Consolidate rdac strings together")

[mkp: fixed up the new entries to align with rest of struct]

Cc: NetApp RDAC team <ng-eseries-upstream-maintainers@netapp.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: James E.J. Bottomley <jejb@linux.vnet.ibm.com>
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: SCSI ML <linux-scsi@vger.kernel.org>
Cc: DM ML <dm-devel@redhat.com>
Signed-off-by: Xose Vazquez Perez <xose.vazquez@gmail.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/scsi_dh.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/scsi_dh.c b/drivers/scsi/scsi_dh.c
index 5711d58f9e813..a8ebaeace154a 100644
--- a/drivers/scsi/scsi_dh.c
+++ b/drivers/scsi/scsi_dh.c
@@ -58,7 +58,10 @@ static const struct scsi_dh_blist scsi_dh_blist[] = {
 	{"IBM", "3526",			"rdac", },
 	{"IBM", "3542",			"rdac", },
 	{"IBM", "3552",			"rdac", },
-	{"SGI", "TP9",			"rdac", },
+	{"SGI", "TP9300",		"rdac", },
+	{"SGI", "TP9400",		"rdac", },
+	{"SGI", "TP9500",		"rdac", },
+	{"SGI", "TP9700",		"rdac", },
 	{"SGI", "IS",			"rdac", },
 	{"STK", "OPENstorage",		"rdac", },
 	{"STK", "FLEXLINE 380",		"rdac", },

From c80c70054cb8ef8c1983902b9c9b75a26e219257 Mon Sep 17 00:00:00 2001
From: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
Date: Fri, 6 Apr 2018 02:02:11 -0700
Subject: [PATCH 1489/1852] scsi: megaraid_sas: Increase timeout by 1 sec for
 non-RAID fastpath IOs

[ Upstream commit 3239b8cd28fd849a2023483257d35d68c5876c74 ]

Hardware could time out Fastpath IOs one second earlier than the timeout
provided by the host.

For non-RAID devices, driver provides timeout value based on OS provided
timeout value. Under certain scenarios, if the OS provides a timeout
value of 1 second, due to above behavior hardware will timeout
immediately.

Increase timeout value for non-RAID fastpath IOs by 1 second.

Signed-off-by: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/megaraid/megaraid_sas_fusion.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c
index 96007633ad39b..213944ed64d90 100644
--- a/drivers/scsi/megaraid/megaraid_sas_fusion.c
+++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c
@@ -1886,6 +1886,9 @@ megasas_build_syspd_fusion(struct megasas_instance *instance,
 		pRAID_Context->timeoutValue = cpu_to_le16(os_timeout_value);
 		pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
 	} else {
+		if (os_timeout_value)
+			os_timeout_value++;
+
 		/* system pd Fast Path */
 		io_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
 		timeout_limit = (scmd->device->type == TYPE_DISK) ?

From c1f3de375a1fd748b59b664c7e18402dfcc23fe3 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Date: Fri, 6 Apr 2018 07:54:51 -0400
Subject: [PATCH 1490/1852] media: si470x: fix __be16 annotations

[ Upstream commit 90db5c829692a0a7845e977e45719b4699216bd4 ]

The annotations there are wrong as warned:
   drivers/media/radio/si470x/radio-si470x-i2c.c:107:35: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:107:35: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:107:35: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:107:35: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:129:24: warning: incorrect type in assignment (different base types)
   drivers/media/radio/si470x/radio-si470x-i2c.c:129:24:    expected unsigned short [unsigned] [short] <noident>
   drivers/media/radio/si470x/radio-si470x-i2c.c:129:24:    got restricted __be16 [usertype] <noident>
   drivers/media/radio/si470x/radio-si470x-i2c.c:163:39: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:163:39: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:163:39: warning: cast to restricted __be16
   drivers/media/radio/si470x/radio-si470x-i2c.c:163:39: warning: cast to restricted __be16

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/media/radio/si470x/radio-si470x-i2c.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c
index 471d6a8ae8a44..9326439bc49ca 100644
--- a/drivers/media/radio/si470x/radio-si470x-i2c.c
+++ b/drivers/media/radio/si470x/radio-si470x-i2c.c
@@ -96,7 +96,7 @@ MODULE_PARM_DESC(max_rds_errors, "RDS maximum block errors: *1*");
  */
 int si470x_get_register(struct si470x_device *radio, int regnr)
 {
-	u16 buf[READ_REG_NUM];
+	__be16 buf[READ_REG_NUM];
 	struct i2c_msg msgs[1] = {
 		{
 			.addr = radio->client->addr,
@@ -121,7 +121,7 @@ int si470x_get_register(struct si470x_device *radio, int regnr)
 int si470x_set_register(struct si470x_device *radio, int regnr)
 {
 	int i;
-	u16 buf[WRITE_REG_NUM];
+	__be16 buf[WRITE_REG_NUM];
 	struct i2c_msg msgs[1] = {
 		{
 			.addr = radio->client->addr,
@@ -151,7 +151,7 @@ int si470x_set_register(struct si470x_device *radio, int regnr)
 static int si470x_get_all_registers(struct si470x_device *radio)
 {
 	int i;
-	u16 buf[READ_REG_NUM];
+	__be16 buf[READ_REG_NUM];
 	struct i2c_msg msgs[1] = {
 		{
 			.addr = radio->client->addr,

From 3f178e50552b708a3e492eed554afb9b86a804bb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
Date: Wed, 28 Mar 2018 15:30:37 -0700
Subject: [PATCH 1491/1852] drm: Add DP PSR2 sink enable bit
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 4f212e40468650e220c1770876c7f25b8e0c1ff5 ]

To comply with eDP1.4a this bit should be set when enabling PSR2.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-1-jose.souza@intel.com
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/drm/drm_dp_helper.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 36a0873e19f9c..b00a57ec9410d 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -342,6 +342,7 @@
 # define DP_PSR_FRAME_CAPTURE		    (1 << 3)
 # define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)
 # define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)
+# define DP_PSR_ENABLE_PSR2		    (1 << 6) /* eDP 1.4a */
 
 #define DP_ADAPTER_CTRL			    0x1a0
 # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)

From 6cc95445092f36d98f574eb8c00162614a54fc23 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sat, 14 Jul 2018 23:55:57 -0400
Subject: [PATCH 1492/1852] random: mix rdrand with entropy sent in from
 userspace

commit 81e69df38e2911b642ec121dec319fad2a4782f3 upstream.

Fedora has integrated the jitter entropy daemon to work around slow
boot problems, especially on VM's that don't support virtio-rng:

    https://bugzilla.redhat.com/show_bug.cgi?id=1572944

It's understandable why they did this, but the Jitter entropy daemon
works fundamentally on the principle: "the CPU microarchitecture is
**so** complicated and we can't figure it out, so it *must* be
random".  Yes, it uses statistical tests to "prove" it is secure, but
AES_ENCRYPT(NSA_KEY, COUNTER++) will also pass statistical tests with
flying colors.

So if RDRAND is available, mix it into entropy submitted from
userspace.  It can't hurt, and if you believe the NSA has backdoored
RDRAND, then they probably have enough details about the Intel
microarchitecture that they can reverse engineer how the Jitter
entropy daemon affects the microarchitecture, and attack its output
stream.  And if RDRAND is in fact an honest DRNG, it will immeasurably
improve on what the Jitter entropy daemon might produce.

This also provides some protection against someone who is able to read
or set the entropy seed file.

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/random.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/char/random.c b/drivers/char/random.c
index dffd06a3bb761..2916d08ee30e2 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1503,14 +1503,22 @@ static int
 write_pool(struct entropy_store *r, const char __user *buffer, size_t count)
 {
 	size_t bytes;
-	__u32 buf[16];
+	__u32 t, buf[16];
 	const char __user *p = buffer;
 
 	while (count > 0) {
+		int b, i = 0;
+
 		bytes = min(count, sizeof(buf));
 		if (copy_from_user(&buf, p, bytes))
 			return -EFAULT;
 
+		for (b = bytes ; b > 0 ; b -= sizeof(__u32), i++) {
+			if (!arch_get_random_int(&t))
+				break;
+			buf[i] ^= t;
+		}
+
 		count -= bytes;
 		p += bytes;
 

From 69ef27a0b48b21661f76c2674863b31547dc6cbc Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun, 29 Jul 2018 12:44:46 -0700
Subject: [PATCH 1493/1852] squashfs: be more careful about metadata corruption

commit 01cfb7937a9af2abb1136c7e89fbf3fd92952956 upstream.

Anatoly Trosinenko reports that a corrupted squashfs image can cause a
kernel oops.  It turns out that squashfs can end up being confused about
negative fragment lengths.

The regular squashfs_read_data() does check for negative lengths, but
squashfs_read_metadata() did not, and the fragment size code just
blindly trusted the on-disk value.  Fix both the fragment parsing and
the metadata reading code.

Reported-by: Anatoly Trosinenko <anatoly.trosinenko@gmail.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Phillip Lougher <phillip@squashfs.org.uk>
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/squashfs/cache.c       | 3 +++
 fs/squashfs/file.c        | 8 ++++++--
 fs/squashfs/fragment.c    | 4 +---
 fs/squashfs/squashfs_fs.h | 6 ++++++
 4 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/fs/squashfs/cache.c b/fs/squashfs/cache.c
index 6785d086ab382..7d78c3d28bbd4 100644
--- a/fs/squashfs/cache.c
+++ b/fs/squashfs/cache.c
@@ -340,6 +340,9 @@ int squashfs_read_metadata(struct super_block *sb, void *buffer,
 
 	TRACE("Entered squashfs_read_metadata [%llx:%x]\n", *block, *offset);
 
+	if (unlikely(length < 0))
+		return -EIO;
+
 	while (length) {
 		entry = squashfs_cache_get(sb, msblk->block_cache, *block, 0);
 		if (entry->error) {
diff --git a/fs/squashfs/file.c b/fs/squashfs/file.c
index 6f5ef8d7e55ac..43d946617d2d4 100644
--- a/fs/squashfs/file.c
+++ b/fs/squashfs/file.c
@@ -198,7 +198,11 @@ static long long read_indexes(struct super_block *sb, int n,
 		}
 
 		for (i = 0; i < blocks; i++) {
-			int size = le32_to_cpu(blist[i]);
+			int size = squashfs_block_size(blist[i]);
+			if (size < 0) {
+				err = size;
+				goto failure;
+			}
 			block += SQUASHFS_COMPRESSED_SIZE_BLOCK(size);
 		}
 		n -= blocks;
@@ -371,7 +375,7 @@ static int read_blocklist(struct inode *inode, int index, u64 *block)
 			sizeof(size));
 	if (res < 0)
 		return res;
-	return le32_to_cpu(size);
+	return squashfs_block_size(size);
 }
 
 /* Copy data into page cache  */
diff --git a/fs/squashfs/fragment.c b/fs/squashfs/fragment.c
index 0ed6edbc5c717..86ad9a4b8c364 100644
--- a/fs/squashfs/fragment.c
+++ b/fs/squashfs/fragment.c
@@ -61,9 +61,7 @@ int squashfs_frag_lookup(struct super_block *sb, unsigned int fragment,
 		return size;
 
 	*fragment_block = le64_to_cpu(fragment_entry.start_block);
-	size = le32_to_cpu(fragment_entry.size);
-
-	return size;
+	return squashfs_block_size(fragment_entry.size);
 }
 
 
diff --git a/fs/squashfs/squashfs_fs.h b/fs/squashfs/squashfs_fs.h
index 24d12fd141776..4e6853f084d07 100644
--- a/fs/squashfs/squashfs_fs.h
+++ b/fs/squashfs/squashfs_fs.h
@@ -129,6 +129,12 @@
 
 #define SQUASHFS_COMPRESSED_BLOCK(B)	(!((B) & SQUASHFS_COMPRESSED_BIT_BLOCK))
 
+static inline int squashfs_block_size(__le32 raw)
+{
+	u32 size = le32_to_cpu(raw);
+	return (size >> 25) ? -EIO : size;
+}
+
 /*
  * Inode number ops.  Inodes consist of a compressed block number, and an
  * uncompressed offset within that block

From 75738b7f5bb658fab25132e2259d5bdbf9d4207e Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Tue, 10 Jul 2018 01:07:43 -0400
Subject: [PATCH 1494/1852] ext4: fix inline data updates with checksums
 enabled

commit 362eca70b53389bddf3143fe20f53dcce2cfdf61 upstream.

The inline data code was updating the raw inode directly; this is
problematic since if metadata checksums are enabled,
ext4_mark_inode_dirty() must be called to update the inode's checksum.
In addition, the jbd2 layer requires that get_write_access() be called
before the metadata buffer is modified.  Fix both of these problems.

https://bugzilla.kernel.org/show_bug.cgi?id=200443

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/inline.c | 19 +++++++++++--------
 fs/ext4/inode.c  | 16 +++++++---------
 2 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/fs/ext4/inline.c b/fs/ext4/inline.c
index 18e642911a3d1..72883bc6fc32d 100644
--- a/fs/ext4/inline.c
+++ b/fs/ext4/inline.c
@@ -692,6 +692,10 @@ int ext4_try_to_write_inline_data(struct address_space *mapping,
 		goto convert;
 	}
 
+	ret = ext4_journal_get_write_access(handle, iloc.bh);
+	if (ret)
+		goto out;
+
 	flags |= AOP_FLAG_NOFS;
 
 	page = grab_cache_page_write_begin(mapping, 0, flags);
@@ -720,7 +724,7 @@ int ext4_try_to_write_inline_data(struct address_space *mapping,
 out_up_read:
 	up_read(&EXT4_I(inode)->xattr_sem);
 out:
-	if (handle)
+	if (handle && (ret != 1))
 		ext4_journal_stop(handle);
 	brelse(iloc.bh);
 	return ret;
@@ -762,6 +766,7 @@ int ext4_write_inline_data_end(struct inode *inode, loff_t pos, unsigned len,
 
 	ext4_write_unlock_xattr(inode, &no_expand);
 	brelse(iloc.bh);
+	mark_inode_dirty(inode);
 out:
 	return copied;
 }
@@ -908,7 +913,6 @@ int ext4_da_write_inline_data_begin(struct address_space *mapping,
 		goto out;
 	}
 
-
 	page = grab_cache_page_write_begin(mapping, 0, flags);
 	if (!page) {
 		ret = -ENOMEM;
@@ -926,6 +930,9 @@ int ext4_da_write_inline_data_begin(struct address_space *mapping,
 		if (ret < 0)
 			goto out_release_page;
 	}
+	ret = ext4_journal_get_write_access(handle, iloc.bh);
+	if (ret)
+		goto out_release_page;
 
 	up_read(&EXT4_I(inode)->xattr_sem);
 	*pagep = page;
@@ -946,7 +953,6 @@ int ext4_da_write_inline_data_end(struct inode *inode, loff_t pos,
 				  unsigned len, unsigned copied,
 				  struct page *page)
 {
-	int i_size_changed = 0;
 	int ret;
 
 	ret = ext4_write_inline_data_end(inode, pos, len, copied, page);
@@ -964,10 +970,8 @@ int ext4_da_write_inline_data_end(struct inode *inode, loff_t pos,
 	 * But it's important to update i_size while still holding page lock:
 	 * page writeout could otherwise come in and zero beyond i_size.
 	 */
-	if (pos+copied > inode->i_size) {
+	if (pos+copied > inode->i_size)
 		i_size_write(inode, pos+copied);
-		i_size_changed = 1;
-	}
 	unlock_page(page);
 	page_cache_release(page);
 
@@ -977,8 +981,7 @@ int ext4_da_write_inline_data_end(struct inode *inode, loff_t pos,
 	 * ordering of page lock and transaction start for journaling
 	 * filesystems.
 	 */
-	if (i_size_changed)
-		mark_inode_dirty(inode);
+	mark_inode_dirty(inode);
 
 	return copied;
 }
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index d9eb83e8c3351..b06109979e94f 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -1175,10 +1175,11 @@ static int ext4_write_end(struct file *file,
 	loff_t old_size = inode->i_size;
 	int ret = 0, ret2;
 	int i_size_changed = 0;
+	int inline_data = ext4_has_inline_data(inode);
 
 	trace_android_fs_datawrite_end(inode, pos, len);
 	trace_ext4_write_end(inode, pos, len, copied);
-	if (ext4_has_inline_data(inode)) {
+	if (inline_data) {
 		ret = ext4_write_inline_data_end(inode, pos, len,
 						 copied, page);
 		if (ret < 0) {
@@ -1206,7 +1207,7 @@ static int ext4_write_end(struct file *file,
 	 * ordering of page lock and transaction start for journaling
 	 * filesystems.
 	 */
-	if (i_size_changed)
+	if (i_size_changed || inline_data)
 		ext4_mark_inode_dirty(handle, inode);
 
 	if (pos + len > inode->i_size && ext4_can_truncate(inode))
@@ -1280,6 +1281,7 @@ static int ext4_journalled_write_end(struct file *file,
 	int partial = 0;
 	unsigned from, to;
 	int size_changed = 0;
+	int inline_data = ext4_has_inline_data(inode);
 
 	trace_android_fs_datawrite_end(inode, pos, len);
 	trace_ext4_journalled_write_end(inode, pos, len, copied);
@@ -1288,7 +1290,7 @@ static int ext4_journalled_write_end(struct file *file,
 
 	BUG_ON(!ext4_handle_valid(handle));
 
-	if (ext4_has_inline_data(inode)) {
+	if (inline_data) {
 		ret = ext4_write_inline_data_end(inode, pos, len,
 						 copied, page);
 		if (ret < 0) {
@@ -1319,7 +1321,7 @@ static int ext4_journalled_write_end(struct file *file,
 	if (old_size < pos)
 		pagecache_isize_extended(inode, old_size, pos);
 
-	if (size_changed) {
+	if (size_changed || inline_data) {
 		ret2 = ext4_mark_inode_dirty(handle, inode);
 		if (!ret)
 			ret = ret2;
@@ -1817,11 +1819,7 @@ static int __ext4_journalled_writepage(struct page *page,
 	}
 
 	if (inline_data) {
-		BUFFER_TRACE(inode_bh, "get write access");
-		ret = ext4_journal_get_write_access(handle, inode_bh);
-
-		err = ext4_handle_dirty_metadata(handle, inode, inode_bh);
-
+		ret = ext4_mark_inode_dirty(handle, inode);
 	} else {
 		ret = ext4_walk_page_buffers(handle, page_bufs, 0, len, NULL,
 					     do_journal_get_write_access);

From 0b57c553bbc13aec9aec0052b2fe86e3030ed612 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Thu, 12 Jul 2018 19:08:05 -0400
Subject: [PATCH 1495/1852] ext4: check for allocation block validity with
 block group locked

commit 8d5a803c6a6ce4ec258e31f76059ea5153ba46ef upstream.

With commit 044e6e3d74a3: "ext4: don't update checksum of new
initialized bitmaps" the buffer valid bit will get set without
actually setting up the checksum for the allocation bitmap, since the
checksum will get calculated once we actually allocate an inode or
block.

If we are doing this, then we need to (re-)check the verified bit
after we take the block group lock.  Otherwise, we could race with
another process reading and verifying the bitmap, which would then
complain about the checksum being invalid.

https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1780137

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/balloc.c | 3 +++
 fs/ext4/ialloc.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c
index 092da164bdc0b..e0fb7cdcee897 100644
--- a/fs/ext4/balloc.c
+++ b/fs/ext4/balloc.c
@@ -378,6 +378,8 @@ static int ext4_validate_block_bitmap(struct super_block *sb,
 		return -EFSCORRUPTED;
 
 	ext4_lock_group(sb, block_group);
+	if (buffer_verified(bh))
+		goto verified;
 	if (unlikely(!ext4_block_bitmap_csum_verify(sb, block_group,
 			desc, bh))) {
 		ext4_unlock_group(sb, block_group);
@@ -400,6 +402,7 @@ static int ext4_validate_block_bitmap(struct super_block *sb,
 		return -EFSCORRUPTED;
 	}
 	set_buffer_verified(bh);
+verified:
 	ext4_unlock_group(sb, block_group);
 	return 0;
 }
diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c
index 8e1c3b3d16188..0963213e9cd36 100644
--- a/fs/ext4/ialloc.c
+++ b/fs/ext4/ialloc.c
@@ -88,6 +88,8 @@ static int ext4_validate_inode_bitmap(struct super_block *sb,
 		return -EFSCORRUPTED;
 
 	ext4_lock_group(sb, block_group);
+	if (buffer_verified(bh))
+		goto verified;
 	blk = ext4_inode_bitmap(sb, desc);
 	if (!ext4_inode_bitmap_csum_verify(sb, block_group, desc, bh,
 					   EXT4_INODES_PER_GROUP(sb) / 8)) {
@@ -105,6 +107,7 @@ static int ext4_validate_inode_bitmap(struct super_block *sb,
 		return -EFSBADCRC;
 	}
 	set_buffer_verified(bh);
+verified:
 	ext4_unlock_group(sb, block_group);
 	return 0;
 }

From 6a54334ae67fdcbb7f705775ce60eb962bc89bf1 Mon Sep 17 00:00:00 2001
From: Eric Engestrom <eric.engestrom@imgtec.com>
Date: Mon, 25 Apr 2016 10:47:56 +0100
Subject: [PATCH 1496/1852] dmaengine: pxa_dma: remove duplicate const
 qualifier

commit 4e0def887d717598ae8062b46e55f9e00d3a5783 upstream.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Cc: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/dma/pxa_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 55f5d33f6dc70..4251e9ac0373c 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -1321,7 +1321,7 @@ static int pxad_init_phys(struct platform_device *op,
 	return 0;
 }
 
-static const struct of_device_id const pxad_dt_ids[] = {
+static const struct of_device_id pxad_dt_ids[] = {
 	{ .compatible = "marvell,pdma-1.0", },
 	{}
 };

From 28e2c5895ec1b391c96bf76baf148543db524083 Mon Sep 17 00:00:00 2001
From: Andrea Adami <andrea.adami@gmail.com>
Date: Fri, 6 May 2016 17:27:34 +0200
Subject: [PATCH 1497/1852] ASoC: pxa: Fix module autoload for platform drivers

commit e5b7d71aa5b32180adec49a17c752e577c68f740 upstream.

These platform drivers are lacking MODULE_ALIAS so module autoloading
doesn't work. Tested on corgi and poodle with kernel 4.4.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/pxa/brownstone.c     | 1 +
 sound/soc/pxa/mioa701_wm9713.c | 1 +
 sound/soc/pxa/mmp-pcm.c        | 1 +
 sound/soc/pxa/mmp-sspa.c       | 1 +
 sound/soc/pxa/palm27x.c        | 1 +
 sound/soc/pxa/pxa-ssp.c        | 1 +
 sound/soc/pxa/pxa2xx-ac97.c    | 1 +
 sound/soc/pxa/pxa2xx-pcm.c     | 1 +
 8 files changed, 8 insertions(+)

diff --git a/sound/soc/pxa/brownstone.c b/sound/soc/pxa/brownstone.c
index 6147e86e9b0fc..55ca9c9364b81 100644
--- a/sound/soc/pxa/brownstone.c
+++ b/sound/soc/pxa/brownstone.c
@@ -136,3 +136,4 @@ module_platform_driver(mmp_driver);
 MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
 MODULE_DESCRIPTION("ALSA SoC Brownstone");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:brownstone-audio");
diff --git a/sound/soc/pxa/mioa701_wm9713.c b/sound/soc/pxa/mioa701_wm9713.c
index 29bc60e85e928..6cd28f95d5489 100644
--- a/sound/soc/pxa/mioa701_wm9713.c
+++ b/sound/soc/pxa/mioa701_wm9713.c
@@ -203,3 +203,4 @@ module_platform_driver(mioa701_wm9713_driver);
 MODULE_AUTHOR("Robert Jarzmik (rjarzmik@free.fr)");
 MODULE_DESCRIPTION("ALSA SoC WM9713 MIO A701");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mioa701-wm9713");
diff --git a/sound/soc/pxa/mmp-pcm.c b/sound/soc/pxa/mmp-pcm.c
index 51e790d006f5c..96df9b2d8fc47 100644
--- a/sound/soc/pxa/mmp-pcm.c
+++ b/sound/soc/pxa/mmp-pcm.c
@@ -248,3 +248,4 @@ module_platform_driver(mmp_pcm_driver);
 MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
 MODULE_DESCRIPTION("MMP Soc Audio DMA module");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mmp-pcm-audio");
diff --git a/sound/soc/pxa/mmp-sspa.c b/sound/soc/pxa/mmp-sspa.c
index eca60c29791a3..ca8b23f8c525e 100644
--- a/sound/soc/pxa/mmp-sspa.c
+++ b/sound/soc/pxa/mmp-sspa.c
@@ -482,3 +482,4 @@ module_platform_driver(asoc_mmp_sspa_driver);
 MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
 MODULE_DESCRIPTION("MMP SSPA SoC Interface");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mmp-sspa-dai");
diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c
index 4e74d9573f032..bcc81e920a67c 100644
--- a/sound/soc/pxa/palm27x.c
+++ b/sound/soc/pxa/palm27x.c
@@ -161,3 +161,4 @@ module_platform_driver(palm27x_wm9712_driver);
 MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
 MODULE_DESCRIPTION("ALSA SoC Palm T|X, T5 and LifeDrive");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:palm27x-asoc");
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index da03fad1b9cda..3cad990dad2cd 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -833,3 +833,4 @@ module_platform_driver(asoc_ssp_driver);
 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:pxa-ssp-dai");
diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c
index f3de615aacd77..9615e6de1306b 100644
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -287,3 +287,4 @@ module_platform_driver(pxa2xx_ac97_driver);
 MODULE_AUTHOR("Nicolas Pitre");
 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:pxa2xx-ac97");
diff --git a/sound/soc/pxa/pxa2xx-pcm.c b/sound/soc/pxa/pxa2xx-pcm.c
index 9f390398d5180..410d48b93031c 100644
--- a/sound/soc/pxa/pxa2xx-pcm.c
+++ b/sound/soc/pxa/pxa2xx-pcm.c
@@ -117,3 +117,4 @@ module_platform_driver(pxa_pcm_driver);
 MODULE_AUTHOR("Nicolas Pitre");
 MODULE_DESCRIPTION("Intel PXA2xx PCM DMA module");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:pxa-pcm-audio");

From eb33141311383df39ae9b11bc92b1ab78e658503 Mon Sep 17 00:00:00 2001
From: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Date: Fri, 27 Jul 2018 18:15:46 +0200
Subject: [PATCH 1498/1852] ipv4: remove BUG_ON() from fib_compute_spec_dst

[ Upstream commit 9fc12023d6f51551d6ca9ed7e02ecc19d79caf17 ]

Remove BUG_ON() from fib_compute_spec_dst routine and check
in_dev pointer during flowi4 data structure initialization.
fib_compute_spec_dst routine can be run concurrently with device removal
where ip_ptr net_device pointer is set to NULL. This can happen
if userspace enables pkt info on UDP rx socket and the device
is removed while traffic is flowing

Fixes: 35ebf65e851c ("ipv4: Create and use fib_compute_spec_dst() helper")
Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/fib_frontend.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c
index 65a2adfa451f0..249a894913534 100644
--- a/net/ipv4/fib_frontend.c
+++ b/net/ipv4/fib_frontend.c
@@ -289,19 +289,19 @@ __be32 fib_compute_spec_dst(struct sk_buff *skb)
 		return ip_hdr(skb)->daddr;
 
 	in_dev = __in_dev_get_rcu(dev);
-	BUG_ON(!in_dev);
 
 	net = dev_net(dev);
 
 	scope = RT_SCOPE_UNIVERSE;
 	if (!ipv4_is_zeronet(ip_hdr(skb)->saddr)) {
+		bool vmark = in_dev && IN_DEV_SRC_VMARK(in_dev);
 		struct flowi4 fl4 = {
 			.flowi4_iif = LOOPBACK_IFINDEX,
 			.flowi4_oif = l3mdev_master_ifindex_rcu(dev),
 			.daddr = ip_hdr(skb)->saddr,
 			.flowi4_tos = RT_TOS(ip_hdr(skb)->tos),
 			.flowi4_scope = scope,
-			.flowi4_mark = IN_DEV_SRC_VMARK(in_dev) ? skb->mark : 0,
+			.flowi4_mark = vmark ? skb->mark : 0,
 		};
 		if (!fib_lookup(net, &fl4, &res, 0))
 			return FIB_RES_PREFSRC(net, res);

From 400372e3ad6f4c746d237958a276eb5e9483d24a Mon Sep 17 00:00:00 2001
From: tangpengpeng <tangpengpeng@higon.com>
Date: Thu, 26 Jul 2018 14:45:16 +0800
Subject: [PATCH 1499/1852] net: fix amd-xgbe flow-control issue

[ Upstream commit 7f3fc7ddf719cd6faaf787722c511f6918ac6aab ]

If we enable or disable xgbe flow-control by ethtool ,
it does't work.Because the parameter is not properly
assigned,so we need to adjust the assignment order
of the parameters.

Fixes: c1ce2f77366b ("amd-xgbe: Fix flow control setting logic")
Signed-off-by: tangpengpeng <tangpengpeng@higon.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
index 4460580818665..7a0ab4c44ee40 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
@@ -872,14 +872,14 @@ static void xgbe_phy_adjust_link(struct xgbe_prv_data *pdata)
 
 		if (pdata->tx_pause != pdata->phy.tx_pause) {
 			new_state = 1;
-			pdata->hw_if.config_tx_flow_control(pdata);
 			pdata->tx_pause = pdata->phy.tx_pause;
+			pdata->hw_if.config_tx_flow_control(pdata);
 		}
 
 		if (pdata->rx_pause != pdata->phy.rx_pause) {
 			new_state = 1;
-			pdata->hw_if.config_rx_flow_control(pdata);
 			pdata->rx_pause = pdata->phy.rx_pause;
+			pdata->hw_if.config_rx_flow_control(pdata);
 		}
 
 		/* Speed support */

From 37dcf6145881dcb1cb14c513134103e0d6c8fb58 Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Sat, 28 Jul 2018 09:52:10 +0200
Subject: [PATCH 1500/1852] net: lan78xx: fix rx handling before first packet
 is send

[ Upstream commit 136f55f660192ce04af091642efc75d85e017364 ]

As long the bh tasklet isn't scheduled once, no packet from the rx path
will be handled. Since the tx path also schedule the same tasklet
this situation only persits until the first packet transmission.
So fix this issue by scheduling the tasklet after link reset.

Link: https://github.com/raspberrypi/linux/issues/2617
Fixes: 55d7de9de6c3 ("Microchip's LAN7800 family USB 2/3 to 10/100/1000 Ethernet")
Suggested-by: Floris Bos <bos@je-eigen-domein.nl>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/lan78xx.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
index a6d429950cb05..acec4b5655117 100644
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
@@ -1361,6 +1361,8 @@ static void lan78xx_init_mac_address(struct lan78xx_net *dev)
 			netif_dbg(dev, ifup, dev->net,
 				  "MAC address set to random addr");
 		}
+
+		tasklet_schedule(&dev->bh);
 	}
 
 	ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);

From f60370121018574adc125903b8d61c0ed94c3430 Mon Sep 17 00:00:00 2001
From: Xiao Liang <xiliang@redhat.com>
Date: Fri, 27 Jul 2018 17:56:08 +0800
Subject: [PATCH 1501/1852] xen-netfront: wait xenbus state change when load
 module manually

[ Upstream commit 822fb18a82abaf4ee7058793d95d340f5dab7bfc ]

When loading module manually, after call xenbus_switch_state to initializes
the state of the netfront device, the driver state did not change so fast
that may lead no dev created in latest kernel. This patch adds wait to make
sure xenbus knows the driver is not in closed/unknown state.

Current state:
[vm]# ethtool eth0
Settings for eth0:
	Link detected: yes
[vm]# modprobe -r xen_netfront
[vm]# modprobe  xen_netfront
[vm]# ethtool eth0
Settings for eth0:
Cannot get device settings: No such device
Cannot get wake-on-lan settings: No such device
Cannot get message level: No such device
Cannot get link status: No such device
No data available

With the patch installed.
[vm]# ethtool eth0
Settings for eth0:
	Link detected: yes
[vm]# modprobe -r xen_netfront
[vm]# modprobe xen_netfront
[vm]# ethtool eth0
Settings for eth0:
	Link detected: yes

Signed-off-by: Xiao Liang <xiliang@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/xen-netfront.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 3bb3d6d9117cd..bec9f099573b5 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -86,6 +86,7 @@ struct netfront_cb {
 /* IRQ name is queue name with "-tx" or "-rx" appended */
 #define IRQ_NAME_SIZE (QUEUE_NAME_SIZE + 3)
 
+static DECLARE_WAIT_QUEUE_HEAD(module_load_q);
 static DECLARE_WAIT_QUEUE_HEAD(module_unload_q);
 
 struct netfront_stats {
@@ -1335,6 +1336,11 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev)
 	netif_carrier_off(netdev);
 
 	xenbus_switch_state(dev, XenbusStateInitialising);
+	wait_event(module_load_q,
+			   xenbus_read_driver_state(dev->otherend) !=
+			   XenbusStateClosed &&
+			   xenbus_read_driver_state(dev->otherend) !=
+			   XenbusStateUnknown);
 	return netdev;
 
  exit:

From 3b6040032443ed75f6b60e87017321be17c5240b Mon Sep 17 00:00:00 2001
From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date: Thu, 26 Jul 2018 15:05:37 +0300
Subject: [PATCH 1502/1852] NET: stmmac: align DMA stuff to largest cache line
 length

[ Upstream commit 9939a46d90c6c76f4533d534dbadfa7b39dc6acc ]

As for today STMMAC_ALIGN macro (which is used to align DMA stuff)
relies on L1 line length (L1_CACHE_BYTES).
This isn't correct in case of system with several cache levels
which might have L1 cache line length smaller than L2 line. This
can lead to sharing one cache line between DMA buffer and other
data, so we can lose this data while invalidate DMA buffer before
DMA transaction.

Fix that by using SMP_CACHE_BYTES instead of L1_CACHE_BYTES for
aligning.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index a534672d09550..4f88c2478bfa2 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -54,7 +54,7 @@
 #include <linux/reset.h>
 #include <linux/of_mdio.h>
 
-#define STMMAC_ALIGN(x)	L1_CACHE_ALIGN(x)
+#define	STMMAC_ALIGN(x)		__ALIGN_KERNEL(x, SMP_CACHE_BYTES)
 
 /* Module parameters */
 #define TX_TIMEO	5000

From 2863085e0a25baf530c809897b54db647bde2fe8 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Thu, 17 May 2018 14:47:25 -0700
Subject: [PATCH 1503/1852] tcp: do not force quickack when receiving
 out-of-order packets

[ Upstream commit a3893637e1eb0ef5eb1bbc52b3a8d2dfa317a35d ]

As explained in commit 9f9843a751d0 ("tcp: properly handle stretch
acks in slow start"), TCP stacks have to consider how many packets
are acknowledged in one single ACK, because of GRO, but also
because of ACK compression or losses.

We plan to add SACK compression in the following patch, we
must therefore not call tcp_enter_quickack_mode()

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index cdc8f941c72c5..7835198c45e5e 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4650,8 +4650,6 @@ static void tcp_data_queue(struct sock *sk, struct sk_buff *skb)
 	if (!before(TCP_SKB_CB(skb)->seq, tp->rcv_nxt + tcp_receive_window(tp)))
 		goto out_of_window;
 
-	tcp_enter_quickack_mode(sk);
-
 	if (before(TCP_SKB_CB(skb)->seq, tp->rcv_nxt)) {
 		/* Partial packet, seq < rcv_next < end_seq */
 		SOCK_DEBUG(sk, "partial packet: rcv_next %X seq %X - %X\n",

From 08bcf03c2715bae4e360d582d8e4ce50e5d9481c Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 21 May 2018 15:08:56 -0700
Subject: [PATCH 1504/1852] tcp: add max_quickacks param to tcp_incr_quickack
 and tcp_enter_quickack_mode

[ Upstream commit 9a9c9b51e54618861420093ae6e9b50a961914c5 ]

We want to add finer control of the number of ACK packets sent after
ECN events.

This patch is not changing current behavior, it only enables following
change.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/tcp.h    |  2 +-
 net/ipv4/tcp_dctcp.c |  4 ++--
 net/ipv4/tcp_input.c | 24 +++++++++++++-----------
 3 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/include/net/tcp.h b/include/net/tcp.h
index 1fe9d266981d4..25a6090f18263 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -377,7 +377,7 @@ ssize_t tcp_splice_read(struct socket *sk, loff_t *ppos,
 			struct pipe_inode_info *pipe, size_t len,
 			unsigned int flags);
 
-void tcp_enter_quickack_mode(struct sock *sk);
+void tcp_enter_quickack_mode(struct sock *sk, unsigned int max_quickacks);
 static inline void tcp_dec_quickack_mode(struct sock *sk,
 					 const unsigned int pkts)
 {
diff --git a/net/ipv4/tcp_dctcp.c b/net/ipv4/tcp_dctcp.c
index e63b764e55ea5..6300edf90e604 100644
--- a/net/ipv4/tcp_dctcp.c
+++ b/net/ipv4/tcp_dctcp.c
@@ -138,7 +138,7 @@ static void dctcp_ce_state_0_to_1(struct sock *sk)
 		 */
 		if (inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
 			__tcp_send_ack(sk, ca->prior_rcv_nxt);
-		tcp_enter_quickack_mode(sk);
+		tcp_enter_quickack_mode(sk, 1);
 	}
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
@@ -159,7 +159,7 @@ static void dctcp_ce_state_1_to_0(struct sock *sk)
 		 */
 		if (inet_csk(sk)->icsk_ack.pending & ICSK_ACK_TIMER)
 			__tcp_send_ack(sk, ca->prior_rcv_nxt);
-		tcp_enter_quickack_mode(sk);
+		tcp_enter_quickack_mode(sk, 1);
 	}
 
 	ca->prior_rcv_nxt = tp->rcv_nxt;
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 7835198c45e5e..08fcc1aa30879 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -177,21 +177,23 @@ static void tcp_measure_rcv_mss(struct sock *sk, const struct sk_buff *skb)
 	}
 }
 
-static void tcp_incr_quickack(struct sock *sk)
+static void tcp_incr_quickack(struct sock *sk, unsigned int max_quickacks)
 {
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	unsigned int quickacks = tcp_sk(sk)->rcv_wnd / (2 * icsk->icsk_ack.rcv_mss);
 
 	if (quickacks == 0)
 		quickacks = 2;
+	quickacks = min(quickacks, max_quickacks);
 	if (quickacks > icsk->icsk_ack.quick)
-		icsk->icsk_ack.quick = min(quickacks, TCP_MAX_QUICKACKS);
+		icsk->icsk_ack.quick = quickacks;
 }
 
-void tcp_enter_quickack_mode(struct sock *sk)
+void tcp_enter_quickack_mode(struct sock *sk, unsigned int max_quickacks)
 {
 	struct inet_connection_sock *icsk = inet_csk(sk);
-	tcp_incr_quickack(sk);
+
+	tcp_incr_quickack(sk, max_quickacks);
 	icsk->icsk_ack.pingpong = 0;
 	icsk->icsk_ack.ato = TCP_ATO_MIN;
 }
@@ -236,7 +238,7 @@ static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
 		 * it is probably a retransmit.
 		 */
 		if (tp->ecn_flags & TCP_ECN_SEEN)
-			tcp_enter_quickack_mode((struct sock *)tp);
+			tcp_enter_quickack_mode((struct sock *)tp, TCP_MAX_QUICKACKS);
 		break;
 	case INET_ECN_CE:
 		if (tcp_ca_needs_ecn((struct sock *)tp))
@@ -244,7 +246,7 @@ static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
 
 		if (!(tp->ecn_flags & TCP_ECN_DEMAND_CWR)) {
 			/* Better not delay acks, sender can have a very low cwnd */
-			tcp_enter_quickack_mode((struct sock *)tp);
+			tcp_enter_quickack_mode((struct sock *)tp, TCP_MAX_QUICKACKS);
 			tp->ecn_flags |= TCP_ECN_DEMAND_CWR;
 		}
 		tp->ecn_flags |= TCP_ECN_SEEN;
@@ -652,7 +654,7 @@ static void tcp_event_data_recv(struct sock *sk, struct sk_buff *skb)
 		/* The _first_ data packet received, initialize
 		 * delayed ACK engine.
 		 */
-		tcp_incr_quickack(sk);
+		tcp_incr_quickack(sk, TCP_MAX_QUICKACKS);
 		icsk->icsk_ack.ato = TCP_ATO_MIN;
 	} else {
 		int m = now - icsk->icsk_ack.lrcvtime;
@@ -668,7 +670,7 @@ static void tcp_event_data_recv(struct sock *sk, struct sk_buff *skb)
 			/* Too long gap. Apparently sender failed to
 			 * restart window, so that we send ACKs quickly.
 			 */
-			tcp_incr_quickack(sk);
+			tcp_incr_quickack(sk, TCP_MAX_QUICKACKS);
 			sk_mem_reclaim(sk);
 		}
 	}
@@ -4137,7 +4139,7 @@ static void tcp_send_dupack(struct sock *sk, const struct sk_buff *skb)
 	if (TCP_SKB_CB(skb)->end_seq != TCP_SKB_CB(skb)->seq &&
 	    before(TCP_SKB_CB(skb)->seq, tp->rcv_nxt)) {
 		NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_DELAYEDACKLOST);
-		tcp_enter_quickack_mode(sk);
+		tcp_enter_quickack_mode(sk, TCP_MAX_QUICKACKS);
 
 		if (tcp_is_sack(tp) && sysctl_tcp_dsack) {
 			u32 end_seq = TCP_SKB_CB(skb)->end_seq;
@@ -4639,7 +4641,7 @@ static void tcp_data_queue(struct sock *sk, struct sk_buff *skb)
 		tcp_dsack_set(sk, TCP_SKB_CB(skb)->seq, TCP_SKB_CB(skb)->end_seq);
 
 out_of_window:
-		tcp_enter_quickack_mode(sk);
+		tcp_enter_quickack_mode(sk, TCP_MAX_QUICKACKS);
 		inet_csk_schedule_ack(sk);
 drop:
 		__kfree_skb(skb);
@@ -5675,7 +5677,7 @@ static int tcp_rcv_synsent_state_process(struct sock *sk, struct sk_buff *skb,
 			 * to stand against the temptation 8)     --ANK
 			 */
 			inet_csk_schedule_ack(sk);
-			tcp_enter_quickack_mode(sk);
+			tcp_enter_quickack_mode(sk, TCP_MAX_QUICKACKS);
 			inet_csk_reset_xmit_timer(sk, ICSK_TIME_DACK,
 						  TCP_DELACK_MAX, TCP_RTO_MAX);
 

From 0cc52d642b3777bb6b8793234afa3a983ea76838 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 21 May 2018 15:08:57 -0700
Subject: [PATCH 1505/1852] tcp: do not aggressively quick ack after ECN events

[ Upstream commit 522040ea5fdd1c33bbf75e1d7c7c0422b96a94ef ]

ECN signals currently forces TCP to enter quickack mode for
up to 16 (TCP_MAX_QUICKACKS) following incoming packets.

We believe this is not needed, and only sending one immediate ack
for the current packet should be enough.

This should reduce the extra load noticed in DCTCP environments,
after congestion events.

This is part 2 of our effort to reduce pure ACK packets.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Yuchung Cheng <ycheng@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 08fcc1aa30879..e272da7e3641d 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -238,7 +238,7 @@ static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
 		 * it is probably a retransmit.
 		 */
 		if (tp->ecn_flags & TCP_ECN_SEEN)
-			tcp_enter_quickack_mode((struct sock *)tp, TCP_MAX_QUICKACKS);
+			tcp_enter_quickack_mode((struct sock *)tp, 1);
 		break;
 	case INET_ECN_CE:
 		if (tcp_ca_needs_ecn((struct sock *)tp))
@@ -246,7 +246,7 @@ static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
 
 		if (!(tp->ecn_flags & TCP_ECN_DEMAND_CWR)) {
 			/* Better not delay acks, sender can have a very low cwnd */
-			tcp_enter_quickack_mode((struct sock *)tp, TCP_MAX_QUICKACKS);
+			tcp_enter_quickack_mode((struct sock *)tp, 1);
 			tp->ecn_flags |= TCP_ECN_DEMAND_CWR;
 		}
 		tp->ecn_flags |= TCP_ECN_SEEN;

From 1d3ccff32be0c14d7d4206906477ac1a643b5d9c Mon Sep 17 00:00:00 2001
From: Yousuk Seung <ysseung@google.com>
Date: Mon, 4 Jun 2018 15:29:51 -0700
Subject: [PATCH 1506/1852] tcp: refactor tcp_ecn_check_ce to remove sk type
 cast

[ Upstream commit f4c9f85f3b2cb7669830cd04d0be61192a4d2436 ]

Refactor tcp_ecn_check_ce and __tcp_ecn_check_ce to accept struct sock*
instead of tcp_sock* to clean up type casts. This is a pure refactor
patch.

Signed-off-by: Yousuk Seung <ysseung@google.com>
Signed-off-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index e272da7e3641d..166a5065f685b 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -229,8 +229,10 @@ static void tcp_ecn_withdraw_cwr(struct tcp_sock *tp)
 	tp->ecn_flags &= ~TCP_ECN_DEMAND_CWR;
 }
 
-static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
+static void __tcp_ecn_check_ce(struct sock *sk, const struct sk_buff *skb)
 {
+	struct tcp_sock *tp = tcp_sk(sk);
+
 	switch (TCP_SKB_CB(skb)->ip_dsfield & INET_ECN_MASK) {
 	case INET_ECN_NOT_ECT:
 		/* Funny extension: if ECT is not set on a segment,
@@ -238,31 +240,31 @@ static void __tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
 		 * it is probably a retransmit.
 		 */
 		if (tp->ecn_flags & TCP_ECN_SEEN)
-			tcp_enter_quickack_mode((struct sock *)tp, 1);
+			tcp_enter_quickack_mode(sk, 1);
 		break;
 	case INET_ECN_CE:
-		if (tcp_ca_needs_ecn((struct sock *)tp))
-			tcp_ca_event((struct sock *)tp, CA_EVENT_ECN_IS_CE);
+		if (tcp_ca_needs_ecn(sk))
+			tcp_ca_event(sk, CA_EVENT_ECN_IS_CE);
 
 		if (!(tp->ecn_flags & TCP_ECN_DEMAND_CWR)) {
 			/* Better not delay acks, sender can have a very low cwnd */
-			tcp_enter_quickack_mode((struct sock *)tp, 1);
+			tcp_enter_quickack_mode(sk, 1);
 			tp->ecn_flags |= TCP_ECN_DEMAND_CWR;
 		}
 		tp->ecn_flags |= TCP_ECN_SEEN;
 		break;
 	default:
-		if (tcp_ca_needs_ecn((struct sock *)tp))
-			tcp_ca_event((struct sock *)tp, CA_EVENT_ECN_NO_CE);
+		if (tcp_ca_needs_ecn(sk))
+			tcp_ca_event(sk, CA_EVENT_ECN_NO_CE);
 		tp->ecn_flags |= TCP_ECN_SEEN;
 		break;
 	}
 }
 
-static void tcp_ecn_check_ce(struct tcp_sock *tp, const struct sk_buff *skb)
+static void tcp_ecn_check_ce(struct sock *sk, const struct sk_buff *skb)
 {
-	if (tp->ecn_flags & TCP_ECN_OK)
-		__tcp_ecn_check_ce(tp, skb);
+	if (tcp_sk(sk)->ecn_flags & TCP_ECN_OK)
+		__tcp_ecn_check_ce(sk, skb);
 }
 
 static void tcp_ecn_rcv_synack(struct tcp_sock *tp, const struct tcphdr *th)
@@ -676,7 +678,7 @@ static void tcp_event_data_recv(struct sock *sk, struct sk_buff *skb)
 	}
 	icsk->icsk_ack.lrcvtime = now;
 
-	tcp_ecn_check_ce(tp, skb);
+	tcp_ecn_check_ce(sk, skb);
 
 	if (skb->len >= 128)
 		tcp_grow_window(sk, skb);
@@ -4367,7 +4369,7 @@ static void tcp_data_queue_ofo(struct sock *sk, struct sk_buff *skb)
 	struct sk_buff *skb1;
 	u32 seq, end_seq;
 
-	tcp_ecn_check_ce(tp, skb);
+	tcp_ecn_check_ce(sk, skb);
 
 	if (unlikely(tcp_try_rmem_schedule(sk, skb, skb->truesize))) {
 		NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_TCPOFODROP);

From 8cfa2a2cf6ab6f4b4b67aeaba3bce4d08b2e9f30 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Wed, 27 Jun 2018 08:47:21 -0700
Subject: [PATCH 1507/1852] tcp: add one more quick ack after after ECN events

[ Upstream commit 15ecbe94a45ef88491ca459b26efdd02f91edb6d ]

Larry Brakmo proposal ( https://patchwork.ozlabs.org/patch/935233/
tcp: force cwnd at least 2 in tcp_cwnd_reduction) made us rethink
about our recent patch removing ~16 quick acks after ECN events.

tcp_enter_quickack_mode(sk, 1) makes sure one immediate ack is sent,
but in the case the sender cwnd was lowered to 1, we do not want
to have a delayed ack for the next packet we will receive.

Fixes: 522040ea5fdd ("tcp: do not aggressively quick ack after ECN events")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: Neal Cardwell <ncardwell@google.com>
Cc: Lawrence Brakmo <brakmo@fb.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp_input.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 166a5065f685b..e0a8c751f8b88 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -240,7 +240,7 @@ static void __tcp_ecn_check_ce(struct sock *sk, const struct sk_buff *skb)
 		 * it is probably a retransmit.
 		 */
 		if (tp->ecn_flags & TCP_ECN_SEEN)
-			tcp_enter_quickack_mode(sk, 1);
+			tcp_enter_quickack_mode(sk, 2);
 		break;
 	case INET_ECN_CE:
 		if (tcp_ca_needs_ecn(sk))
@@ -248,7 +248,7 @@ static void __tcp_ecn_check_ce(struct sock *sk, const struct sk_buff *skb)
 
 		if (!(tp->ecn_flags & TCP_ECN_DEMAND_CWR)) {
 			/* Better not delay acks, sender can have a very low cwnd */
-			tcp_enter_quickack_mode(sk, 1);
+			tcp_enter_quickack_mode(sk, 2);
 			tp->ecn_flags |= TCP_ECN_DEMAND_CWR;
 		}
 		tp->ecn_flags |= TCP_ECN_SEEN;

From b540ca4579f791b64416fbc2b2cac853ce780acc Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 30 Jul 2018 20:09:11 -0700
Subject: [PATCH 1508/1852] inet: frag: enforce memory limits earlier

[ Upstream commit 56e2c94f055d328f5f6b0a5c1721cca2f2d4e0a1 ]

We currently check current frags memory usage only when
a new frag queue is created. This allows attackers to first
consume the memory budget (default : 4 MB) creating thousands
of frag queues, then sending tiny skbs to exceed high_thresh
limit by 2 to 3 order of magnitude.

Note that before commit 648700f76b03 ("inet: frags: use rhashtables
for reassembly units"), work queue could be starved under DOS,
getting no cpu cycles.
After commit 648700f76b03, only the per frag queue timer can eventually
remove an incomplete frag queue and its skbs.

Fixes: b13d3cbfb8e8 ("inet: frag: move eviction of queues to work queue")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: Jann Horn <jannh@google.com>
Cc: Florian Westphal <fw@strlen.de>
Cc: Peter Oskolkov <posk@google.com>
Cc: Paolo Abeni <pabeni@redhat.com>
Acked-by: Florian Westphal <fw@strlen.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/inet_fragment.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/net/ipv4/inet_fragment.c b/net/ipv4/inet_fragment.c
index b34fa1bb278f0..b2001b20e0292 100644
--- a/net/ipv4/inet_fragment.c
+++ b/net/ipv4/inet_fragment.c
@@ -364,11 +364,6 @@ static struct inet_frag_queue *inet_frag_alloc(struct netns_frags *nf,
 {
 	struct inet_frag_queue *q;
 
-	if (frag_mem_limit(nf) > nf->high_thresh) {
-		inet_frag_schedule_worker(f);
-		return NULL;
-	}
-
 	q = kmem_cache_zalloc(f->frags_cachep, GFP_ATOMIC);
 	if (!q)
 		return NULL;
@@ -405,6 +400,11 @@ struct inet_frag_queue *inet_frag_find(struct netns_frags *nf,
 	struct inet_frag_queue *q;
 	int depth = 0;
 
+	if (!nf->high_thresh || frag_mem_limit(nf) > nf->high_thresh) {
+		inet_frag_schedule_worker(f);
+		return NULL;
+	}
+
 	if (frag_mem_limit(nf) > nf->low_thresh)
 		inet_frag_schedule_worker(f);
 

From 257f54ca7fe237d8faf1fbc47e82516bfea7b5fa Mon Sep 17 00:00:00 2001
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Tue, 31 Jul 2018 17:12:52 -0700
Subject: [PATCH 1509/1852] net: dsa: Do not suspend/resume closed slave_dev

[ Upstream commit a94c689e6c9e72e722f28339e12dff191ee5a265 ]

If a DSA slave network device was previously disabled, there is no need
to suspend or resume it.

Fixes: 2446254915a7 ("net: dsa: allow switch drivers to implement suspend/resume hooks")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dsa/slave.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index 554c2a961ad56..48b28a7ecc7a9 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
@@ -1099,6 +1099,9 @@ int dsa_slave_suspend(struct net_device *slave_dev)
 {
 	struct dsa_slave_priv *p = netdev_priv(slave_dev);
 
+	if (!netif_running(slave_dev))
+		return 0;
+
 	netif_device_detach(slave_dev);
 
 	if (p->phy) {
@@ -1116,6 +1119,9 @@ int dsa_slave_resume(struct net_device *slave_dev)
 {
 	struct dsa_slave_priv *p = netdev_priv(slave_dev);
 
+	if (!netif_running(slave_dev))
+		return 0;
+
 	netif_device_attach(slave_dev);
 
 	if (p->phy) {

From bb5899c164e31f51cce0dccf07fd4367457ad98d Mon Sep 17 00:00:00 2001
From: Jeremy Cline <jcline@redhat.com>
Date: Tue, 31 Jul 2018 21:13:16 +0000
Subject: [PATCH 1510/1852] netlink: Fix spectre v1 gadget in netlink_create()

[ Upstream commit bc5b6c0b62b932626a135f516a41838c510c6eba ]

'protocol' is a user-controlled value, so sanitize it after the bounds
check to avoid using it for speculative out-of-bounds access to arrays
indexed by it.

This addresses the following accesses detected with the help of smatch:

* net/netlink/af_netlink.c:654 __netlink_create() warn: potential
  spectre issue 'nlk_cb_mutex_keys' [w]

* net/netlink/af_netlink.c:654 __netlink_create() warn: potential
  spectre issue 'nlk_cb_mutex_key_strings' [w]

* net/netlink/af_netlink.c:685 netlink_create() warn: potential spectre
  issue 'nl_table' [w] (local cap)

Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Jeremy Cline <jcline@redhat.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netlink/af_netlink.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 818400fddc9ba..9708fff318d51 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -62,6 +62,7 @@
 #include <asm/cacheflush.h>
 #include <linux/hash.h>
 #include <linux/genetlink.h>
+#include <linux/nospec.h>
 
 #include <net/net_namespace.h>
 #include <net/sock.h>
@@ -654,6 +655,7 @@ static int netlink_create(struct net *net, struct socket *sock, int protocol,
 
 	if (protocol < 0 || protocol >= MAX_LINKS)
 		return -EPROTONOSUPPORT;
+	protocol = array_index_nospec(protocol, MAX_LINKS);
 
 	netlink_lock_table();
 #ifdef CONFIG_MODULES

From 72dc245071665026794bee72bba07ad2015a8cac Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 2 Aug 2018 08:43:35 -0700
Subject: [PATCH 1511/1852] squashfs: more metadata hardenings
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 71755ee5350b63fb1f283de8561cdb61b47f4d1d upstream.

The squashfs fragment reading code doesn't actually verify that the
fragment is inside the fragment table.  The end result _is_ verified to
be inside the image when actually reading the fragment data, but before
that is done, we may end up taking a page fault because the fragment
table itself might not even exist.

Another report from Anatoly and his endless squashfs image fuzzing.

Reported-by: �натолий Тро�иненко <anatoly.trosinenko@gmail.com>
Acked-by:: Phillip Lougher <phillip.lougher@gmail.com>,
Cc: Willy Tarreau <w@1wt.eu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/squashfs/fragment.c       | 13 +++++++++----
 fs/squashfs/squashfs_fs_sb.h |  1 +
 fs/squashfs/super.c          |  5 +++--
 3 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/fs/squashfs/fragment.c b/fs/squashfs/fragment.c
index 86ad9a4b8c364..0681feab4a849 100644
--- a/fs/squashfs/fragment.c
+++ b/fs/squashfs/fragment.c
@@ -49,11 +49,16 @@ int squashfs_frag_lookup(struct super_block *sb, unsigned int fragment,
 				u64 *fragment_block)
 {
 	struct squashfs_sb_info *msblk = sb->s_fs_info;
-	int block = SQUASHFS_FRAGMENT_INDEX(fragment);
-	int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET(fragment);
-	u64 start_block = le64_to_cpu(msblk->fragment_index[block]);
+	int block, offset, size;
 	struct squashfs_fragment_entry fragment_entry;
-	int size;
+	u64 start_block;
+
+	if (fragment >= msblk->fragments)
+		return -EIO;
+	block = SQUASHFS_FRAGMENT_INDEX(fragment);
+	offset = SQUASHFS_FRAGMENT_INDEX_OFFSET(fragment);
+
+	start_block = le64_to_cpu(msblk->fragment_index[block]);
 
 	size = squashfs_read_metadata(sb, &fragment_entry, &start_block,
 					&offset, sizeof(fragment_entry));
diff --git a/fs/squashfs/squashfs_fs_sb.h b/fs/squashfs/squashfs_fs_sb.h
index 8a6995de02773..3b767ce1e46db 100644
--- a/fs/squashfs/squashfs_fs_sb.h
+++ b/fs/squashfs/squashfs_fs_sb.h
@@ -75,6 +75,7 @@ struct squashfs_sb_info {
 	unsigned short				block_log;
 	long long				bytes_used;
 	unsigned int				inodes;
+	unsigned int				fragments;
 	int					xattr_ids;
 };
 #endif
diff --git a/fs/squashfs/super.c b/fs/squashfs/super.c
index 61cd0b39ed0ed..4ffbddb688aa2 100644
--- a/fs/squashfs/super.c
+++ b/fs/squashfs/super.c
@@ -176,6 +176,7 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent)
 	msblk->inode_table = le64_to_cpu(sblk->inode_table_start);
 	msblk->directory_table = le64_to_cpu(sblk->directory_table_start);
 	msblk->inodes = le32_to_cpu(sblk->inodes);
+	msblk->fragments = le32_to_cpu(sblk->fragments);
 	flags = le16_to_cpu(sblk->flags);
 
 	TRACE("Found valid superblock on %s\n", bdevname(sb->s_bdev, b));
@@ -186,7 +187,7 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent)
 	TRACE("Filesystem size %lld bytes\n", msblk->bytes_used);
 	TRACE("Block size %d\n", msblk->block_size);
 	TRACE("Number of inodes %d\n", msblk->inodes);
-	TRACE("Number of fragments %d\n", le32_to_cpu(sblk->fragments));
+	TRACE("Number of fragments %d\n", msblk->fragments);
 	TRACE("Number of ids %d\n", le16_to_cpu(sblk->no_ids));
 	TRACE("sblk->inode_table_start %llx\n", msblk->inode_table);
 	TRACE("sblk->directory_table_start %llx\n", msblk->directory_table);
@@ -273,7 +274,7 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent)
 	sb->s_export_op = &squashfs_export_ops;
 
 handle_fragments:
-	fragments = le32_to_cpu(sblk->fragments);
+	fragments = msblk->fragments;
 	if (fragments == 0)
 		goto check_directory_table;
 

From da7283d88ae0f8b38c6bec8f7d6c0690b927cf80 Mon Sep 17 00:00:00 2001
From: Anton Vasilyev <vasilyev@ispras.ru>
Date: Fri, 27 Jul 2018 18:50:42 +0300
Subject: [PATCH 1512/1852] can: ems_usb: Fix memory leak on
 ems_usb_disconnect()

commit 72c05f32f4a5055c9c8fe889bb6903ec959c0aad upstream.

ems_usb_probe() allocates memory for dev->tx_msg_buffer, but there
is no its deallocation in ems_usb_disconnect().

Found by Linux Driver Verification project (linuxtesting.org).

Signed-off-by: Anton Vasilyev <vasilyev@ispras.ru>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/usb/ems_usb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 357c9e89fdf95..047348033e276 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -1078,6 +1078,7 @@ static void ems_usb_disconnect(struct usb_interface *intf)
 		usb_free_urb(dev->intr_urb);
 
 		kfree(dev->intr_in_buffer);
+		kfree(dev->tx_msg_buffer);
 	}
 }
 

From cdcbf49c6a1c5fd822898224f4e9912af2da7e3b Mon Sep 17 00:00:00 2001
From: Jeremy Cline <jcline@redhat.com>
Date: Fri, 27 Jul 2018 22:43:01 +0000
Subject: [PATCH 1513/1852] net: socket: fix potential spectre v1 gadget in
 socketcall

commit c8e8cd579bb4265651df8223730105341e61a2d1 upstream.

'call' is a user-controlled value, so sanitize the array index after the
bounds check to avoid speculating past the bounds of the 'nargs' array.

Found with the help of Smatch:

net/socket.c:2508 __do_sys_socketcall() warn: potential spectre issue
'nargs' [r] (local cap)

Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jeremy Cline <jcline@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/socket.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/socket.c b/net/socket.c
index 9684fd34b0134..b75a537807b5b 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -89,6 +89,7 @@
 #include <linux/magic.h>
 #include <linux/slab.h>
 #include <linux/xattr.h>
+#include <linux/nospec.h>
 
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
@@ -2338,6 +2339,7 @@ SYSCALL_DEFINE2(socketcall, int, call, unsigned long __user *, args)
 
 	if (call < 1 || call > SYS_SENDMMSG)
 		return -EINVAL;
+	call = array_index_nospec(call, SYS_SENDMMSG + 1);
 
 	len = nargs[call];
 	if (len > sizeof(a))

From cbbfcbd03496c2edf877470a29d2b970dd98151d Mon Sep 17 00:00:00 2001
From: Jiang Biao <jiang.biao2@zte.com.cn>
Date: Wed, 18 Jul 2018 10:29:28 +0800
Subject: [PATCH 1514/1852] virtio_balloon: fix another race between migration
 and ballooning

commit 89da619bc18d79bca5304724c11d4ba3b67ce2c6 upstream.

Kernel panic when with high memory pressure, calltrace looks like,

PID: 21439 TASK: ffff881be3afedd0 CPU: 16 COMMAND: "java"
 #0 [ffff881ec7ed7630] machine_kexec at ffffffff81059beb
 #1 [ffff881ec7ed7690] __crash_kexec at ffffffff81105942
 #2 [ffff881ec7ed7760] crash_kexec at ffffffff81105a30
 #3 [ffff881ec7ed7778] oops_end at ffffffff816902c8
 #4 [ffff881ec7ed77a0] no_context at ffffffff8167ff46
 #5 [ffff881ec7ed77f0] __bad_area_nosemaphore at ffffffff8167ffdc
 #6 [ffff881ec7ed7838] __node_set at ffffffff81680300
 #7 [ffff881ec7ed7860] __do_page_fault at ffffffff8169320f
 #8 [ffff881ec7ed78c0] do_page_fault at ffffffff816932b5
 #9 [ffff881ec7ed78f0] page_fault at ffffffff8168f4c8
    [exception RIP: _raw_spin_lock_irqsave+47]
    RIP: ffffffff8168edef RSP: ffff881ec7ed79a8 RFLAGS: 00010046
    RAX: 0000000000000246 RBX: ffffea0019740d00 RCX: ffff881ec7ed7fd8
    RDX: 0000000000020000 RSI: 0000000000000016 RDI: 0000000000000008
    RBP: ffff881ec7ed79a8 R8: 0000000000000246 R9: 000000000001a098
    R10: ffff88107ffda000 R11: 0000000000000000 R12: 0000000000000000
    R13: 0000000000000008 R14: ffff881ec7ed7a80 R15: ffff881be3afedd0
    ORIG_RAX: ffffffffffffffff CS: 0010 SS: 0018

It happens in the pagefault and results in double pagefault
during compacting pages when memory allocation fails.

Analysed the vmcore, the page leads to second pagefault is corrupted
with _mapcount=-256, but private=0.

It's caused by the race between migration and ballooning, and lock
missing in virtballoon_migratepage() of virtio_balloon driver.
This patch fix the bug.

Fixes: e22504296d4f64f ("virtio_balloon: introduce migration primitives to balloon pages")
Cc: stable@vger.kernel.org
Signed-off-by: Jiang Biao <jiang.biao2@zte.com.cn>
Signed-off-by: Huang Chong <huang.chong@zte.com.cn>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/virtio/virtio_balloon.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index 7cf26768ea0ba..cbe9e22957528 100644
--- a/drivers/virtio/virtio_balloon.c
+++ b/drivers/virtio/virtio_balloon.c
@@ -479,7 +479,9 @@ static int virtballoon_migratepage(struct balloon_dev_info *vb_dev_info,
 	tell_host(vb, vb->inflate_vq);
 
 	/* balloon's page migration 2nd step -- deflate "page" */
+	spin_lock_irqsave(&vb_dev_info->pages_lock, flags);
 	balloon_page_delete(page);
+	spin_unlock_irqrestore(&vb_dev_info->pages_lock, flags);
 	vb->num_pfns = VIRTIO_BALLOON_PAGES_PER_PAGE;
 	set_page_pfns(vb, vb->pfns, page);
 	tell_host(vb, vb->deflate_vq);

From a1a2004fb19b769d8bf4ba7b5ede96642d49240f Mon Sep 17 00:00:00 2001
From: Roman Kagan <rkagan@virtuozzo.com>
Date: Thu, 19 Jul 2018 21:59:07 +0300
Subject: [PATCH 1515/1852] kvm: x86: vmx: fix vpid leak

commit 63aff65573d73eb8dda4732ad4ef222dd35e4862 upstream.

VPID for the nested vcpu is allocated at vmx_create_vcpu whenever nested
vmx is turned on with the module parameter.

However, it's only freed if the L1 guest has executed VMXON which is not
a given.

As a result, on a system with nested==on every creation+deletion of an
L1 vcpu without running an L2 guest results in leaking one vpid.  Since
the total number of vpids is limited to 64k, they can eventually get
exhausted, preventing L2 from starting.

Delay allocation of the L2 vpid until VMXON emulation, thus matching its
freeing.

Fixes: 5c614b3583e7b6dab0c86356fa36c2bcbb8322a0
Cc: stable@vger.kernel.org
Signed-off-by: Roman Kagan <rkagan@virtuozzo.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kvm/vmx.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 18143886b1863..c5a4b1978cbf7 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6843,6 +6843,8 @@ static int handle_vmon(struct kvm_vcpu *vcpu)
 		     HRTIMER_MODE_REL);
 	vmx->nested.preemption_timer.function = vmx_preemption_timer_fn;
 
+	vmx->nested.vpid02 = allocate_vpid();
+
 	vmx->nested.vmxon = true;
 
 	skip_emulated_instruction(vcpu);
@@ -8887,10 +8889,8 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
 			goto free_vmcs;
 	}
 
-	if (nested) {
+	if (nested)
 		nested_vmx_setup_ctls_msrs(vmx);
-		vmx->nested.vpid02 = allocate_vpid();
-	}
 
 	vmx->nested.posted_intr_nv = -1;
 	vmx->nested.current_vmptr = -1ull;
@@ -8899,7 +8899,6 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
 	return &vmx->vcpu;
 
 free_vmcs:
-	free_vpid(vmx->nested.vpid02);
 	free_loaded_vmcs(vmx->loaded_vmcs);
 free_msrs:
 	kfree(vmx->guest_msrs);

From a67888a35a370048c7bd1b628860a4ce3d5b3d6b Mon Sep 17 00:00:00 2001
From: Herbert Xu <herbert@gondor.apana.org.au>
Date: Fri, 13 Jul 2018 16:12:32 +0800
Subject: [PATCH 1516/1852] crypto: padlock-aes - Fix Nano workaround data
 corruption

commit 46d8c4b28652d35dc6cfb5adf7f54e102fc04384 upstream.

This was detected by the self-test thanks to Ard's chunking patch.

I finally got around to testing this out on my ancient Via box.  It
turns out that the workaround got the assembly wrong and we end up
doing count + initial cycles of the loop instead of just count.

This obviously causes corruption, either by overwriting the source
that is yet to be processed, or writing over the end of the buffer.

On CPUs that don't require the workaround only ECB is affected.
On Nano CPUs both ECB and CBC are affected.

This patch fixes it by doing the subtraction prior to the assembly.

Fixes: a76c1c23d0c3 ("crypto: padlock-aes - work around Nano CPU...")
Cc: <stable@vger.kernel.org>
Reported-by: Jamie Heilman <jamie@audible.transient.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/crypto/padlock-aes.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index 97a364694bfce..047ef69b7e653 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -266,6 +266,8 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
 		return;
 	}
 
+	count -= initial;
+
 	if (initial)
 		asm volatile (".byte 0xf3,0x0f,0xa7,0xc8"	/* rep xcryptecb */
 			      : "+S"(input), "+D"(output)
@@ -273,7 +275,7 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
 
 	asm volatile (".byte 0xf3,0x0f,0xa7,0xc8"	/* rep xcryptecb */
 		      : "+S"(input), "+D"(output)
-		      : "d"(control_word), "b"(key), "c"(count - initial));
+		      : "d"(control_word), "b"(key), "c"(count));
 }
 
 static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
@@ -284,6 +286,8 @@ static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
 	if (count < cbc_fetch_blocks)
 		return cbc_crypt(input, output, key, iv, control_word, count);
 
+	count -= initial;
+
 	if (initial)
 		asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"	/* rep xcryptcbc */
 			      : "+S" (input), "+D" (output), "+a" (iv)
@@ -291,7 +295,7 @@ static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
 
 	asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"	/* rep xcryptcbc */
 		      : "+S" (input), "+D" (output), "+a" (iv)
-		      : "d" (control_word), "b" (key), "c" (count-initial));
+		      : "d" (control_word), "b" (key), "c" (count));
 	return iv;
 }
 

From 9311af8095bccd72d9b31b2c05a294d44958ed04 Mon Sep 17 00:00:00 2001
From: Tony Battersby <tonyb@cybernetics.com>
Date: Thu, 12 Jul 2018 16:30:45 -0400
Subject: [PATCH 1517/1852] scsi: sg: fix minor memory leak in error path

commit c170e5a8d222537e98aa8d4fddb667ff7a2ee114 upstream.

Fix a minor memory leak when there is an error opening a /dev/sg device.

Fixes: cc833acbee9d ("sg: O_EXCL and other lock handling")
Cc: <stable@vger.kernel.org>
Reviewed-by: Ewan D. Milne <emilne@redhat.com>
Signed-off-by: Tony Battersby <tonyb@cybernetics.com>
Reviewed-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sg.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 4302880a20b33..e1639e80db536 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -2195,6 +2195,7 @@ sg_add_sfp(Sg_device * sdp)
 	write_lock_irqsave(&sdp->sfd_lock, iflags);
 	if (atomic_read(&sdp->detaching)) {
 		write_unlock_irqrestore(&sdp->sfd_lock, iflags);
+		kfree(sfp);
 		return ERR_PTR(-ENODEV);
 	}
 	list_add_tail(&sfp->sfd_siblings, &sdp->sfds);

From d4d47ce5aeb072695befd9b61fda842b0df81252 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Mon, 6 Aug 2018 16:24:42 +0200
Subject: [PATCH 1518/1852] Linux 4.4.146

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 0cba00dd1b88f..df12ed231331d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 145
+SUBLEVEL = 146
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 0dbbe1faf5f1346f774985da1c254236e250c5bf Mon Sep 17 00:00:00 2001
From: Quinn Tran <quinn.tran@cavium.com>
Date: Wed, 18 Jul 2018 14:29:54 -0700
Subject: [PATCH 1519/1852] scsi: qla2xxx: Fix ISP recovery on unload

commit b08abbd9f5996309f021684f9ca74da30dcca36a upstream.

During unload process, the chip can encounter problem where a FW dump would
be captured. For this case, the full reset sequence will be skip to bring
the chip back to full operational state.

Fixes: e315cd28b9ef ("[SCSI] qla2xxx: Code changes for qla data structure refactoring")
Cc: <stable@vger.kernel.org>
Signed-off-by: Quinn Tran <quinn.tran@cavium.com>
Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/qla2xxx/qla_os.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 5cbf20ab94aaf..18b19744398a6 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -4938,8 +4938,9 @@ qla2x00_do_dpc(void *data)
 			}
 		}
 
-		if (test_and_clear_bit(ISP_ABORT_NEEDED,
-						&base_vha->dpc_flags)) {
+		if (test_and_clear_bit
+		    (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
+		    !test_bit(UNLOADING, &base_vha->dpc_flags)) {
 
 			ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
 			    "ISP abort scheduled.\n");

From 5c7ac14446cc78af1fda6aebede2c88fd3646fa8 Mon Sep 17 00:00:00 2001
From: Anil Gurumurthy <anil.gurumurthy@cavium.com>
Date: Wed, 18 Jul 2018 14:29:55 -0700
Subject: [PATCH 1520/1852] scsi: qla2xxx: Return error when TMF returns

commit b4146c4929ef61d5afca011474d59d0918a0cd82 upstream.

Propagate the task management completion status properly to avoid
unnecessary waits for commands to complete.

Fixes: faef62d13463 ("[SCSI] qla2xxx: Fix Task Management command asynchronous handling")
Cc: <stable@vger.kernel.org>
Signed-off-by: Anil Gurumurthy <anil.gurumurthy@cavium.com>
Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/qla2xxx/qla_init.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index a9eb3cd453be6..41a646696babb 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -325,11 +325,10 @@ qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
 
 	wait_for_completion(&tm_iocb->u.tmf.comp);
 
-	rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
-	    QLA_SUCCESS : QLA_FUNCTION_FAILED;
+	rval = tm_iocb->u.tmf.data;
 
-	if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
-		ql_dbg(ql_dbg_taskm, vha, 0x8030,
+	if (rval != QLA_SUCCESS) {
+		ql_log(ql_log_warn, vha, 0x8030,
 		    "TM IOCB failed (%x).\n", rval);
 	}
 

From fd6add2864366ca213e92868d31b838848949ba0 Mon Sep 17 00:00:00 2001
From: Thomas Gleixner <tglx@linutronix.de>
Date: Fri, 3 Aug 2018 14:44:59 +0200
Subject: [PATCH 1521/1852] genirq: Make force irq threading setup more robust

commit d1f0301b3333eef5efbfa1fe0f0edbea01863d5d upstream.

The support of force threading interrupts which are set up with both a
primary and a threaded handler wreckaged the setup of regular requested
threaded interrupts (primary handler == NULL).

The reason is that it does not check whether the primary handler is set to
the default handler which wakes the handler thread. Instead it replaces the
thread handler with the primary handler as it would do with force threaded
interrupts which have been requested via request_irq(). So both the primary
and the thread handler become the same which then triggers the warnon that
the thread handler tries to wakeup a not configured secondary thread.

Fortunately this only happens when the driver omits the IRQF_ONESHOT flag
when requesting the threaded interrupt, which is normaly caught by the
sanity checks when force irq threading is disabled.

Fix it by skipping the force threading setup when a regular threaded
interrupt is requested. As a consequence the interrupt request which lacks
the IRQ_ONESHOT flag is rejected correctly instead of silently wreckaging
it.

Fixes: 2a1d3ab8986d ("genirq: Handle force threading of irqs with primary and thread handler")
Reported-by: Kurt Kanzenbach <kurt.kanzenbach@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Kurt Kanzenbach <kurt.kanzenbach@linutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/irq/manage.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 853dbb0398c8b..2312c0fd71538 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1018,6 +1018,13 @@ static int irq_setup_forced_threading(struct irqaction *new)
 	if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
 		return 0;
 
+	/*
+	 * No further action required for interrupts which are requested as
+	 * threaded interrupts already
+	 */
+	if (new->handler == irq_default_primary_handler)
+		return 0;
+
 	new->flags |= IRQF_ONESHOT;
 
 	/*
@@ -1025,7 +1032,7 @@ static int irq_setup_forced_threading(struct irqaction *new)
 	 * thread handler. We force thread them as well by creating a
 	 * secondary action.
 	 */
-	if (new->handler != irq_default_primary_handler && new->thread_fn) {
+	if (new->handler && new->thread_fn) {
 		/* Allocate the secondary action */
 		new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
 		if (!new->secondary)

From 55c9caf356c6c8b918cea08ff614c74bcce2c1e2 Mon Sep 17 00:00:00 2001
From: Anna-Maria Gleixner <anna-maria@linutronix.de>
Date: Tue, 31 Jul 2018 18:13:58 +0200
Subject: [PATCH 1522/1852] nohz: Fix local_timer_softirq_pending()

commit 80d20d35af1edd632a5e7a3b9c0ab7ceff92769e upstream.

local_timer_softirq_pending() checks whether the timer softirq is
pending with: local_softirq_pending() & TIMER_SOFTIRQ.

This is wrong because TIMER_SOFTIRQ is the softirq number and not a
bitmask. So the test checks for the wrong bit.

Use BIT(TIMER_SOFTIRQ) instead.

Fixes: 5d62c183f9e9 ("nohz: Prevent a timer interrupt storm in tick_nohz_stop_sched_tick()")
Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Reviewed-by: Daniel Bristot de Oliveira <bristot@redhat.com>
Acked-by: Frederic Weisbecker <frederic@kernel.org>
Cc: bigeasy@linutronix.de
Cc: peterz@infradead.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180731161358.29472-1-anna-maria@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/time/tick-sched.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index a935cbdc55a40..4cd1145ec2601 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -570,7 +570,7 @@ static void tick_nohz_restart(struct tick_sched *ts, ktime_t now)
 
 static inline bool local_timer_softirq_pending(void)
 {
-	return local_softirq_pending() & TIMER_SOFTIRQ;
+	return local_softirq_pending() & BIT(TIMER_SOFTIRQ);
 }
 
 static ktime_t tick_nohz_stop_sched_tick(struct tick_sched *ts,

From a1799164d9f785464ffe5658518f492364c23994 Mon Sep 17 00:00:00 2001
From: Dmitry Safonov <dima@arista.com>
Date: Fri, 27 Jul 2018 16:54:44 +0100
Subject: [PATCH 1523/1852] netlink: Do not subscribe to non-existent groups

[ Upstream commit 7acf9d4237c46894e0fa0492dd96314a41742e84 ]

Make ABI more strict about subscribing to group > ngroups.
Code doesn't check for that and it looks bogus.
(one can subscribe to non-existing group)
Still, it's possible to bind() to all possible groups with (-1)

Cc: "David S. Miller" <davem@davemloft.net>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Cc: netdev@vger.kernel.org
Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netlink/af_netlink.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 9708fff318d51..aed2cfb1a4fe7 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -985,6 +985,7 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
 		if (err)
 			return err;
 	}
+	groups &= (1UL << nlk->ngroups) - 1;
 
 	bound = nlk->bound;
 	if (bound) {

From c9f500ae986e6ed18d5723ebac5799c0a7b72844 Mon Sep 17 00:00:00 2001
From: Dmitry Safonov <dima@arista.com>
Date: Mon, 30 Jul 2018 18:32:36 +0100
Subject: [PATCH 1524/1852] netlink: Don't shift with UB on nlk->ngroups

[ Upstream commit 61f4b23769f0cc72ae62c9a81cf08f0397d40da8 ]

On i386 nlk->ngroups might be 32 or 0. Which leads to UB, resulting in
hang during boot.
Check for 0 ngroups and use (unsigned long long) as a type to shift.

Fixes: 7acf9d4237c4 ("netlink: Do not subscribe to non-existent groups").
Reported-by: kernel test robot <rong.a.chen@intel.com>
Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netlink/af_netlink.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index aed2cfb1a4fe7..87c25918c0733 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -985,7 +985,11 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
 		if (err)
 			return err;
 	}
-	groups &= (1UL << nlk->ngroups) - 1;
+
+	if (nlk->ngroups == 0)
+		groups = 0;
+	else
+		groups &= (1ULL << nlk->ngroups) - 1;
 
 	bound = nlk->bound;
 	if (bound) {

From 3aa8d8819b4eb36bd70ddcb35babb1aade8bb464 Mon Sep 17 00:00:00 2001
From: Dmitry Safonov <dima@arista.com>
Date: Sun, 5 Aug 2018 01:35:53 +0100
Subject: [PATCH 1525/1852] netlink: Don't shift on 64 for ngroups

commit 91874ecf32e41b5d86a4cb9d60e0bee50d828058 upstream.

It's legal to have 64 groups for netlink_sock.

As user-supplied nladdr->nl_groups is __u32, it's possible to subscribe
only to first 32 groups.

The check for correctness of .bind() userspace supplied parameter
is done by applying mask made from ngroups shift. Which broke Android
as they have 64 groups and the shift for mask resulted in an overflow.

Fixes: 61f4b23769f0 ("netlink: Don't shift with UB on nlk->ngroups")
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Cc: netdev@vger.kernel.org
Cc: stable@vger.kernel.org
Reported-and-Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netlink/af_netlink.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 87c25918c0733..bf292010760a6 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -988,8 +988,8 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
 
 	if (nlk->ngroups == 0)
 		groups = 0;
-	else
-		groups &= (1ULL << nlk->ngroups) - 1;
+	else if (nlk->ngroups < 8*sizeof(groups))
+		groups &= (1UL << nlk->ngroups) - 1;
 
 	bound = nlk->bound;
 	if (bound) {

From 8ee6446429cd1537bbbe65645a56efe1adeb0a7a Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Sun, 8 Jul 2018 19:35:02 -0400
Subject: [PATCH 1526/1852] ext4: fix false negatives *and* false positives in
 ext4_check_descriptors()

commit 44de022c4382541cebdd6de4465d1f4f465ff1dd upstream.

Ext4_check_descriptors() was getting called before s_gdb_count was
initialized.  So for file systems w/o the meta_bg feature, allocation
bitmaps could overlap the block group descriptors and ext4 wouldn't
notice.

For file systems with the meta_bg feature enabled, there was a
fencepost error which would cause the ext4_check_descriptors() to
incorrectly believe that the block allocation bitmap overlaps with the
block group descriptor blocks, and it would reject the mount.

Fix both of these problems.

Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Benjamin Gilbert <bgilbert@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/super.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 53d28a0ca6eb6..71c9104a77790 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -2101,7 +2101,7 @@ static int ext4_check_descriptors(struct super_block *sb,
 	struct ext4_sb_info *sbi = EXT4_SB(sb);
 	ext4_fsblk_t first_block = le32_to_cpu(sbi->s_es->s_first_data_block);
 	ext4_fsblk_t last_block;
-	ext4_fsblk_t last_bg_block = sb_block + ext4_bg_num_gdb(sb, 0) + 1;
+	ext4_fsblk_t last_bg_block = sb_block + ext4_bg_num_gdb(sb, 0);
 	ext4_fsblk_t block_bitmap;
 	ext4_fsblk_t inode_bitmap;
 	ext4_fsblk_t inode_table;
@@ -3770,13 +3770,13 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
 			goto failed_mount2;
 		}
 	}
+	sbi->s_gdb_count = db_count;
 	if (!ext4_check_descriptors(sb, logical_sb_block, &first_not_zeroed)) {
 		ext4_msg(sb, KERN_ERR, "group descriptors corrupted!");
 		ret = -EFSCORRUPTED;
 		goto failed_mount2;
 	}
 
-	sbi->s_gdb_count = db_count;
 	get_random_bytes(&sbi->s_next_generation, sizeof(u32));
 	spin_lock_init(&sbi->s_next_gen_lock);
 

From ee0c33fe6a02d8bb8600a32b74a00f8e6e978ed0 Mon Sep 17 00:00:00 2001
From: Vitaly Kuznetsov <vkuznets@redhat.com>
Date: Thu, 14 Sep 2017 16:50:14 +0200
Subject: [PATCH 1527/1852] ACPI / PCI: Bail early in acpi_pci_add_bus() if
 there is no ACPI handle

commit a0040c0145945d3bd203df8fa97f6dfa819f3f7d upstream.

Hyper-V instances support PCI pass-through which is implemented through PV
pci-hyperv driver. When a device is passed through, a new root PCI bus is
created in the guest. The bus sits on top of VMBus and has no associated
information in ACPI. acpi_pci_add_bus() in this case proceeds all the way
to acpi_evaluate_dsm(), which reports

  ACPI: \: failed to evaluate _DSM (0x1001)

While acpi_pci_slot_enumerate() and acpiphp_enumerate_slots() are protected
against ACPI_HANDLE() being NULL and do nothing, acpi_evaluate_dsm() is not
and gives us the error. It seems the correct fix is to not do anything in
acpi_pci_add_bus() in such cases.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Sinan Kaya <okaya@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/pci-acpi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index a32ba753e4135..afaf134747962 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -543,7 +543,7 @@ void acpi_pci_add_bus(struct pci_bus *bus)
 	union acpi_object *obj;
 	struct pci_host_bridge *bridge;
 
-	if (acpi_pci_disabled || !bus->bridge)
+	if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge))
 		return;
 
 	acpi_pci_slot_enumerate(bus);

From 52813dacfdc4a46311c491174233b33dd0ecf953 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 14 Jul 2018 01:28:15 +0900
Subject: [PATCH 1528/1852] ring_buffer: tracing: Inherit the tracing setting
 to next ring buffer

commit 73c8d8945505acdcbae137c2e00a1232e0be709f upstream.

Maintain the tracing on/off setting of the ring_buffer when switching
to the trace buffer snapshot.

Taking a snapshot is done by swapping the backup ring buffer
(max_tr_buffer). But since the tracing on/off setting is defined
by the ring buffer, when swapping it, the tracing on/off setting
can also be changed. This causes a strange result like below:

  /sys/kernel/debug/tracing # cat tracing_on
  1
  /sys/kernel/debug/tracing # echo 0 > tracing_on
  /sys/kernel/debug/tracing # cat tracing_on
  0
  /sys/kernel/debug/tracing # echo 1 > snapshot
  /sys/kernel/debug/tracing # cat tracing_on
  1
  /sys/kernel/debug/tracing # echo 1 > snapshot
  /sys/kernel/debug/tracing # cat tracing_on
  0

We don't touch tracing_on, but snapshot changes tracing_on
setting each time. This is an anomaly, because user doesn't know
that each "ring_buffer" stores its own tracing-enable state and
the snapshot is done by swapping ring buffers.

Link: http://lkml.kernel.org/r/153149929558.11274.11730609978254724394.stgit@devbox

Cc: Ingo Molnar <mingo@redhat.com>
Cc: Shuah Khan <shuah@kernel.org>
Cc: Tom Zanussi <tom.zanussi@linux.intel.com>
Cc: Hiraku Toyooka <hiraku.toyooka@cybertrust.co.jp>
Cc: stable@vger.kernel.org
Fixes: debdd57f5145 ("tracing: Make a snapshot feature available from userspace")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
[ Updated commit log and comment in the code ]
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/ring_buffer.h |  1 +
 kernel/trace/ring_buffer.c  | 16 ++++++++++++++++
 kernel/trace/trace.c        |  6 ++++++
 3 files changed, 23 insertions(+)

diff --git a/include/linux/ring_buffer.h b/include/linux/ring_buffer.h
index 4acc552e92790..19d0778ec3825 100644
--- a/include/linux/ring_buffer.h
+++ b/include/linux/ring_buffer.h
@@ -162,6 +162,7 @@ void ring_buffer_record_enable(struct ring_buffer *buffer);
 void ring_buffer_record_off(struct ring_buffer *buffer);
 void ring_buffer_record_on(struct ring_buffer *buffer);
 int ring_buffer_record_is_on(struct ring_buffer *buffer);
+int ring_buffer_record_is_set_on(struct ring_buffer *buffer);
 void ring_buffer_record_disable_cpu(struct ring_buffer *buffer, int cpu);
 void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu);
 
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index d9cd6191760b1..fdaa88f38aecd 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -3141,6 +3141,22 @@ int ring_buffer_record_is_on(struct ring_buffer *buffer)
 	return !atomic_read(&buffer->record_disabled);
 }
 
+/**
+ * ring_buffer_record_is_set_on - return true if the ring buffer is set writable
+ * @buffer: The ring buffer to see if write is set enabled
+ *
+ * Returns true if the ring buffer is set writable by ring_buffer_record_on().
+ * Note that this does NOT mean it is in a writable state.
+ *
+ * It may return true when the ring buffer has been disabled by
+ * ring_buffer_record_disable(), as that is a temporary disabling of
+ * the ring buffer.
+ */
+int ring_buffer_record_is_set_on(struct ring_buffer *buffer)
+{
+	return !(atomic_read(&buffer->record_disabled) & RB_BUFFER_OFF);
+}
+
 /**
  * ring_buffer_record_disable_cpu - stop all writes into the cpu_buffer
  * @buffer: The ring buffer to stop writes to.
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index 293faa2ff7637..6627647d85087 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -1089,6 +1089,12 @@ update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu)
 
 	arch_spin_lock(&tr->max_lock);
 
+	/* Inherit the recordable setting from trace_buffer */
+	if (ring_buffer_record_is_set_on(tr->trace_buffer.buffer))
+		ring_buffer_record_on(tr->max_buffer.buffer);
+	else
+		ring_buffer_record_off(tr->max_buffer.buffer);
+
 	buf = tr->trace_buffer.buffer;
 	tr->trace_buffer.buffer = tr->max_buffer.buffer;
 	tr->max_buffer.buffer = buf;

From 892ccd3c52ca5b0cfe4bd87787d13a12f6de5ef7 Mon Sep 17 00:00:00 2001
From: Esben Haabendal <eha@deif.com>
Date: Mon, 9 Jul 2018 11:43:01 +0200
Subject: [PATCH 1529/1852] i2c: imx: Fix reinit_completion() use
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 9f9e3e0d4dd3338b3f3dde080789f71901e1e4ff upstream.

Make sure to call reinit_completion() before dma is started to avoid race
condition where reinit_completion() is called after complete() and before
wait_for_completion_timeout().

Signed-off-by: Esben Haabendal <eha@deif.com>
Fixes: ce1a78840ff7 ("i2c: imx: add DMA support for freescale i2c driver")
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-imx.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index d4d853680ae47..a4abf7dc95767 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -382,6 +382,7 @@ static int i2c_imx_dma_xfer(struct imx_i2c_struct *i2c_imx,
 		goto err_desc;
 	}
 
+	reinit_completion(&dma->cmd_complete);
 	txdesc->callback = i2c_imx_dma_callback;
 	txdesc->callback_param = i2c_imx;
 	if (dma_submit_error(dmaengine_submit(txdesc))) {
@@ -631,7 +632,6 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
 	 * The first byte must be transmitted by the CPU.
 	 */
 	imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR);
-	reinit_completion(&i2c_imx->dma->cmd_complete);
 	time_left = wait_for_completion_timeout(
 				&i2c_imx->dma->cmd_complete,
 				msecs_to_jiffies(DMA_TIMEOUT));
@@ -690,7 +690,6 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
 	if (result)
 		return result;
 
-	reinit_completion(&i2c_imx->dma->cmd_complete);
 	time_left = wait_for_completion_timeout(
 				&i2c_imx->dma->cmd_complete,
 				msecs_to_jiffies(DMA_TIMEOUT));

From 239fa37fce36d3bb53826d65ddbb7cde8a8f235d Mon Sep 17 00:00:00 2001
From: Shankara Pailoor <shankarapailoor@gmail.com>
Date: Tue, 5 Jun 2018 08:33:27 -0500
Subject: [PATCH 1530/1852] jfs: Fix inconsistency between memory allocation
 and ea_buf->max_size

commit 92d34134193e5b129dc24f8d79cb9196626e8d7a upstream.

The code is assuming the buffer is max_size length, but we weren't
allocating enough space for it.

Signed-off-by: Shankara Pailoor <shankarapailoor@gmail.com>
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/jfs/xattr.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/fs/jfs/xattr.c b/fs/jfs/xattr.c
index 48b15a6e55586..40a26a542341d 100644
--- a/fs/jfs/xattr.c
+++ b/fs/jfs/xattr.c
@@ -493,15 +493,17 @@ static int ea_get(struct inode *inode, struct ea_buffer *ea_buf, int min_size)
 	if (size > PSIZE) {
 		/*
 		 * To keep the rest of the code simple.  Allocate a
-		 * contiguous buffer to work with
+		 * contiguous buffer to work with. Make the buffer large
+		 * enough to make use of the whole extent.
 		 */
-		ea_buf->xattr = kmalloc(size, GFP_KERNEL);
+		ea_buf->max_size = (size + sb->s_blocksize - 1) &
+		    ~(sb->s_blocksize - 1);
+
+		ea_buf->xattr = kmalloc(ea_buf->max_size, GFP_KERNEL);
 		if (ea_buf->xattr == NULL)
 			return -ENOMEM;
 
 		ea_buf->flag = EA_MALLOC;
-		ea_buf->max_size = (size + sb->s_blocksize - 1) &
-		    ~(sb->s_blocksize - 1);
 
 		if (ea_size == 0)
 			return 0;

From 46bd4cd9812bd55c845fe613258127ef799fa8c9 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Thu, 9 Aug 2018 12:19:28 +0200
Subject: [PATCH 1531/1852] Linux 4.4.147

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index df12ed231331d..17800a851be85 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 146
+SUBLEVEL = 147
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 2b93f44a562cdedbd546e9b2458e4993c8e82a76 Mon Sep 17 00:00:00 2001
From: Tadeusz Struk <tadeusz.struk@intel.com>
Date: Tue, 22 May 2018 14:37:18 -0700
Subject: [PATCH 1532/1852] tpm: fix race condition in tpm_common_write()

commit 3ab2011ea368ec3433ad49e1b9e1c7b70d2e65df upstream.

There is a race condition in tpm_common_write function allowing
two threads on the same /dev/tpm<N>, or two different applications
on the same /dev/tpmrm<N> to overwrite each other commands/responses.
Fixed this by taking the priv->buffer_mutex early in the function.

Also converted the priv->data_pending from atomic to a regular size_t
type. There is no need for it to be atomic since it is only touched
under the protection of the priv->buffer_mutex.

Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Cc: stable@vger.kernel.org
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/char/tpm/tpm-dev.c | 43 ++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 23 deletions(-)

diff --git a/drivers/char/tpm/tpm-dev.c b/drivers/char/tpm/tpm-dev.c
index 912ad30be5852..4719aa781bf2a 100644
--- a/drivers/char/tpm/tpm-dev.c
+++ b/drivers/char/tpm/tpm-dev.c
@@ -25,7 +25,7 @@ struct file_priv {
 	struct tpm_chip *chip;
 
 	/* Data passed to and from the tpm via the read/write calls */
-	atomic_t data_pending;
+	size_t data_pending;
 	struct mutex buffer_mutex;
 
 	struct timer_list user_read_timer;      /* user needs to claim result */
@@ -46,7 +46,7 @@ static void timeout_work(struct work_struct *work)
 	struct file_priv *priv = container_of(work, struct file_priv, work);
 
 	mutex_lock(&priv->buffer_mutex);
-	atomic_set(&priv->data_pending, 0);
+	priv->data_pending = 0;
 	memset(priv->data_buffer, 0, sizeof(priv->data_buffer));
 	mutex_unlock(&priv->buffer_mutex);
 }
@@ -72,7 +72,6 @@ static int tpm_open(struct inode *inode, struct file *file)
 	}
 
 	priv->chip = chip;
-	atomic_set(&priv->data_pending, 0);
 	mutex_init(&priv->buffer_mutex);
 	setup_timer(&priv->user_read_timer, user_reader_timeout,
 			(unsigned long)priv);
@@ -86,28 +85,24 @@ static ssize_t tpm_read(struct file *file, char __user *buf,
 			size_t size, loff_t *off)
 {
 	struct file_priv *priv = file->private_data;
-	ssize_t ret_size;
+	ssize_t ret_size = 0;
 	int rc;
 
 	del_singleshot_timer_sync(&priv->user_read_timer);
 	flush_work(&priv->work);
-	ret_size = atomic_read(&priv->data_pending);
-	if (ret_size > 0) {	/* relay data */
-		ssize_t orig_ret_size = ret_size;
-		if (size < ret_size)
-			ret_size = size;
+	mutex_lock(&priv->buffer_mutex);
 
-		mutex_lock(&priv->buffer_mutex);
+	if (priv->data_pending) {
+		ret_size = min_t(ssize_t, size, priv->data_pending);
 		rc = copy_to_user(buf, priv->data_buffer, ret_size);
-		memset(priv->data_buffer, 0, orig_ret_size);
+		memset(priv->data_buffer, 0, priv->data_pending);
 		if (rc)
 			ret_size = -EFAULT;
 
-		mutex_unlock(&priv->buffer_mutex);
+		priv->data_pending = 0;
 	}
 
-	atomic_set(&priv->data_pending, 0);
-
+	mutex_unlock(&priv->buffer_mutex);
 	return ret_size;
 }
 
@@ -118,18 +113,20 @@ static ssize_t tpm_write(struct file *file, const char __user *buf,
 	size_t in_size = size;
 	ssize_t out_size;
 
-	/* cannot perform a write until the read has cleared
-	   either via tpm_read or a user_read_timer timeout.
-	   This also prevents splitted buffered writes from blocking here.
-	*/
-	if (atomic_read(&priv->data_pending) != 0)
-		return -EBUSY;
-
 	if (in_size > TPM_BUFSIZE)
 		return -E2BIG;
 
 	mutex_lock(&priv->buffer_mutex);
 
+	/* Cannot perform a write until the read has cleared either via
+	 * tpm_read or a user_read_timer timeout. This also prevents split
+	 * buffered writes from blocking here.
+	 */
+	if (priv->data_pending != 0) {
+		mutex_unlock(&priv->buffer_mutex);
+		return -EBUSY;
+	}
+
 	if (copy_from_user
 	    (priv->data_buffer, (void __user *) buf, in_size)) {
 		mutex_unlock(&priv->buffer_mutex);
@@ -153,7 +150,7 @@ static ssize_t tpm_write(struct file *file, const char __user *buf,
 		return out_size;
 	}
 
-	atomic_set(&priv->data_pending, out_size);
+	priv->data_pending = out_size;
 	mutex_unlock(&priv->buffer_mutex);
 
 	/* Set a timeout by which the reader must come claim the result */
@@ -172,7 +169,7 @@ static int tpm_release(struct inode *inode, struct file *file)
 	del_singleshot_timer_sync(&priv->user_read_timer);
 	flush_work(&priv->work);
 	file->private_data = NULL;
-	atomic_set(&priv->data_pending, 0);
+	priv->data_pending = 0;
 	clear_bit(0, &priv->chip->is_open);
 	kfree(priv);
 	return 0;

From 6a805a779ec3184eb238bc48e95c44d2446c9c8d Mon Sep 17 00:00:00 2001
From: Thomas Egerer <hakke_007@gmx.de>
Date: Mon, 25 Jan 2016 12:58:44 +0100
Subject: [PATCH 1533/1852] ipv4+ipv6: Make INET*_ESP select CRYPTO_ECHAINIV

commit 32b6170ca59ccf07d0e394561e54b2cd9726038c upstream.

The ESP algorithms using CBC mode require echainiv. Hence INET*_ESP have
to select CRYPTO_ECHAINIV in order to work properly. This solves the
issues caused by a misconfiguration as described in [1].
The original approach, patching crypto/Kconfig was turned down by
Herbert Xu [2].

[1] https://lists.strongswan.org/pipermail/users/2015-December/009074.html
[2] http://marc.info/?l=linux-crypto-vger&m=145224655809562&w=2

Signed-off-by: Thomas Egerer <hakke_007@gmx.de>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/Kconfig | 1 +
 net/ipv6/Kconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/net/ipv4/Kconfig b/net/ipv4/Kconfig
index 154e7423cdeb9..395d82754626f 100644
--- a/net/ipv4/Kconfig
+++ b/net/ipv4/Kconfig
@@ -354,6 +354,7 @@ config INET_ESP
 	select CRYPTO_CBC
 	select CRYPTO_SHA1
 	select CRYPTO_DES
+	select CRYPTO_ECHAINIV
 	---help---
 	  Support for IPsec ESP.
 
diff --git a/net/ipv6/Kconfig b/net/ipv6/Kconfig
index 851d5c9e3eccf..0f50248bad171 100644
--- a/net/ipv6/Kconfig
+++ b/net/ipv6/Kconfig
@@ -69,6 +69,7 @@ config INET6_ESP
 	select CRYPTO_CBC
 	select CRYPTO_SHA1
 	select CRYPTO_DES
+	select CRYPTO_ECHAINIV
 	---help---
 	  Support for IPsec ESP.
 

From b47ce5b33ce18b8e75185cbf3499ad2a63bd31cc Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Fri, 20 Apr 2018 14:55:31 -0700
Subject: [PATCH 1534/1852] fork: unconditionally clear stack on fork

commit e01e80634ecdde1dd113ac43b3adad21b47f3957 upstream.

One of the classes of kernel stack content leaks[1] is exposing the
contents of prior heap or stack contents when a new process stack is
allocated.  Normally, those stacks are not zeroed, and the old contents
remain in place.  In the face of stack content exposure flaws, those
contents can leak to userspace.

Fixing this will make the kernel no longer vulnerable to these flaws, as
the stack will be wiped each time a stack is assigned to a new process.
There's not a meaningful change in runtime performance; it almost looks
like it provides a benefit.

Performing back-to-back kernel builds before:
	Run times: 157.86 157.09 158.90 160.94 160.80
	Mean: 159.12
	Std Dev: 1.54

and after:
	Run times: 159.31 157.34 156.71 158.15 160.81
	Mean: 158.46
	Std Dev: 1.46

Instead of making this a build or runtime config, Andy Lutomirski
recommended this just be enabled by default.

[1] A noisy search for many kinds of stack content leaks can be seen here:
https://cve.mitre.org/cgi-bin/cvekey.cgi?keyword=linux+kernel+stack+leak

I did some more with perf and cycle counts on running 100,000 execs of
/bin/true.

before:
Cycles: 218858861551 218853036130 214727610969 227656844122 224980542841
Mean:  221015379122.60
Std Dev: 4662486552.47

after:
Cycles: 213868945060 213119275204 211820169456 224426673259 225489986348
Mean:  217745009865.40
Std Dev: 5935559279.99

It continues to look like it's faster, though the deviation is rather
wide, but I'm not sure what I could do that would be less noisy.  I'm
open to ideas!

Link: http://lkml.kernel.org/r/20180221021659.GA37073@beast
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Michal Hocko <mhocko@suse.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Laura Abbott <labbott@redhat.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Mel Gorman <mgorman@techsingularity.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
[ Srivatsa: Backported to 4.4.y ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Srinidhi Rao <srinidhir@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/thread_info.h | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index 8933ecc2bc9f2..25f861ecb1959 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -26,11 +26,7 @@
 
 #ifdef __KERNEL__
 
-#ifdef CONFIG_DEBUG_STACK_USAGE
-# define THREADINFO_GFP		(GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)
-#else
-# define THREADINFO_GFP		(GFP_KERNEL | __GFP_NOTRACK)
-#endif
+#define THREADINFO_GFP		(GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)
 
 /*
  * flag set/clear/test wrappers

From f33d4b6f5b28ef8ddd6b396fd33a185c26b99e5e Mon Sep 17 00:00:00 2001
From: Helge Deller <deller@gmx.de>
Date: Sat, 28 Jul 2018 11:47:17 +0200
Subject: [PATCH 1535/1852] parisc: Enable CONFIG_MLONGCALLS by default

commit 66509a276c8c1d19ee3f661a41b418d101c57d29 upstream.

Enable the -mlong-calls compiler option by default, because otherwise in most
cases linking the vmlinux binary fails due to truncations of R_PARISC_PCREL22F
relocations. This fixes building the 64-bit defconfig.

Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/parisc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index d2256fa97ea0c..f7f89310a7a14 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -178,7 +178,7 @@ config PREFETCH
 
 config MLONGCALLS
 	bool "Enable the -mlong-calls compiler option for big kernels"
-	def_bool y if (!MODULES)
+	default y
 	depends on PA8X00
 	help
 	  If you configure the kernel to include many drivers built-in instead

From 1f6126e6738cb9a1181cd5729441fb428394d080 Mon Sep 17 00:00:00 2001
From: John David Anglin <dave.anglin@bell.net>
Date: Sun, 5 Aug 2018 13:30:31 -0400
Subject: [PATCH 1536/1852] parisc: Define mb() and add memory barriers to
 assembler unlock sequences
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit fedb8da96355f5f64353625bf96dc69423ad1826 upstream.

For years I thought all parisc machines executed loads and stores in
order. However, Jeff Law recently indicated on gcc-patches that this is
not correct. There are various degrees of out-of-order execution all the
way back to the PA7xxx processor series (hit-under-miss). The PA8xxx
series has full out-of-order execution for both integer operations, and
loads and stores.

This is described in the following article:
http://web.archive.org/web/20040214092531/http://www.cpus.hp.com/technical_references/advperf.shtml

For this reason, we need to define mb() and to insert a memory barrier
before the store unlocking spinlocks. This ensures that all memory
accesses are complete prior to unlocking. The ldcw instruction performs
the same function on entry.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/parisc/include/asm/barrier.h | 32 +++++++++++++++++++++++++++++++
 arch/parisc/kernel/entry.S        |  2 ++
 arch/parisc/kernel/pacache.S      |  1 +
 arch/parisc/kernel/syscall.S      |  4 ++++
 4 files changed, 39 insertions(+)
 create mode 100644 arch/parisc/include/asm/barrier.h

diff --git a/arch/parisc/include/asm/barrier.h b/arch/parisc/include/asm/barrier.h
new file mode 100644
index 0000000000000..dbaaca84f27f3
--- /dev/null
+++ b/arch/parisc/include/asm/barrier.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_BARRIER_H
+#define __ASM_BARRIER_H
+
+#ifndef __ASSEMBLY__
+
+/* The synchronize caches instruction executes as a nop on systems in
+   which all memory references are performed in order. */
+#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory")
+
+#if defined(CONFIG_SMP)
+#define mb()		do { synchronize_caches(); } while (0)
+#define rmb()		mb()
+#define wmb()		mb()
+#define dma_rmb()	mb()
+#define dma_wmb()	mb()
+#else
+#define mb()		barrier()
+#define rmb()		barrier()
+#define wmb()		barrier()
+#define dma_rmb()	barrier()
+#define dma_wmb()	barrier()
+#endif
+
+#define __smp_mb()	mb()
+#define __smp_rmb()	mb()
+#define __smp_wmb()	mb()
+
+#include <asm-generic/barrier.h>
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_BARRIER_H */
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 5dc831955de5d..13cb2461fef5e 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -481,6 +481,8 @@
 	/* Release pa_tlb_lock lock without reloading lock address. */
 	.macro		tlb_unlock0	spc,tmp
 #ifdef CONFIG_SMP
+	or,COND(=)	%r0,\spc,%r0
+	sync
 	or,COND(=)	%r0,\spc,%r0
 	stw             \spc,0(\tmp)
 #endif
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 16073f4721184..b3434a7fd3c97 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -354,6 +354,7 @@ ENDPROC(flush_data_cache_local)
 	.macro	tlb_unlock	la,flags,tmp
 #ifdef CONFIG_SMP
 	ldi		1,\tmp
+	sync
 	stw		\tmp,0(\la)
 	mtsm		\flags
 #endif
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 9f22195b90ed0..f68eedc724848 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -631,6 +631,7 @@ cas_action:
 	sub,<>	%r28, %r25, %r0
 2:	stw,ma	%r24, 0(%r26)
 	/* Free lock */
+	sync
 	stw,ma	%r20, 0(%sr2,%r20)
 #if ENABLE_LWS_DEBUG
 	/* Clear thread register indicator */
@@ -645,6 +646,7 @@ cas_action:
 3:		
 	/* Error occurred on load or store */
 	/* Free lock */
+	sync
 	stw	%r20, 0(%sr2,%r20)
 #if ENABLE_LWS_DEBUG
 	stw	%r0, 4(%sr2,%r20)
@@ -846,6 +848,7 @@ cas2_action:
 
 cas2_end:
 	/* Free lock */
+	sync
 	stw,ma	%r20, 0(%sr2,%r20)
 	/* Enable interrupts */
 	ssm	PSW_SM_I, %r0
@@ -856,6 +859,7 @@ cas2_end:
 22:
 	/* Error occurred on load or store */
 	/* Free lock */
+	sync
 	stw	%r20, 0(%sr2,%r20)
 	ssm	PSW_SM_I, %r0
 	ldo	1(%r0),%r28

From a23e8f954a731895e1392d71c5e8b7f774a49c34 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Thu, 9 Aug 2018 16:42:16 +0200
Subject: [PATCH 1537/1852] xen/netfront: don't cache skb_shinfo()

commit d472b3a6cf63cd31cae1ed61930f07e6cd6671b5 upstream.

skb_shinfo() can change when calling __pskb_pull_tail(): Don't cache
its return value.

Cc: stable@vger.kernel.org
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/xen-netfront.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index bec9f099573b5..68d0a5c9d437a 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -879,7 +879,6 @@ static RING_IDX xennet_fill_frags(struct netfront_queue *queue,
 				  struct sk_buff *skb,
 				  struct sk_buff_head *list)
 {
-	struct skb_shared_info *shinfo = skb_shinfo(skb);
 	RING_IDX cons = queue->rx.rsp_cons;
 	struct sk_buff *nskb;
 
@@ -888,15 +887,16 @@ static RING_IDX xennet_fill_frags(struct netfront_queue *queue,
 			RING_GET_RESPONSE(&queue->rx, ++cons);
 		skb_frag_t *nfrag = &skb_shinfo(nskb)->frags[0];
 
-		if (shinfo->nr_frags == MAX_SKB_FRAGS) {
+		if (skb_shinfo(skb)->nr_frags == MAX_SKB_FRAGS) {
 			unsigned int pull_to = NETFRONT_SKB_CB(skb)->pull_to;
 
 			BUG_ON(pull_to <= skb_headlen(skb));
 			__pskb_pull_tail(skb, pull_to - skb_headlen(skb));
 		}
-		BUG_ON(shinfo->nr_frags >= MAX_SKB_FRAGS);
+		BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
 
-		skb_add_rx_frag(skb, shinfo->nr_frags, skb_frag_page(nfrag),
+		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
+				skb_frag_page(nfrag),
 				rx->offset, rx->status, PAGE_SIZE);
 
 		skb_shinfo(nskb)->nr_frags = 0;

From 76772b9c2cd4e760d9c6bcc040c144e7696d4813 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Thu, 26 Apr 2018 14:10:24 +0200
Subject: [PATCH 1538/1852] ACPI / LPSS: Add missing prv_offset setting for
 byt/cht PWM devices

commit fdcb613d49321b5bf5d5a1bd0fba8e7c241dcc70 upstream.

The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set
of private registers at offset 0x800, the current lpss_device_desc for
them already sets the LPSS_SAVE_CTX flag to have these saved/restored
over device-suspend, but the current lpss_device_desc was not setting
the prv_offset field, leading to the regular device registers getting
saved/restored instead.

This is causing the PWM controller to no longer work, resulting in a black
screen,  after a suspend/resume on systems where the firmware clears the
APB clock and reset bits at offset 0x804.

This commit fixes this by properly setting prv_offset to 0x800 for
the PWM devices.

Cc: stable@vger.kernel.org
Fixes: e1c748179754 ("ACPI / LPSS: Add Intel BayTrail ACPI mode PWM")
Fixes: 1bfbd8eb8a7f ("ACPI / LPSS: Add ACPI IDs for Intel Braswell")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rafael J . Wysocki <rjw@rjwysocki.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/acpi_lpss.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index f9e0d09f7c66c..8a0f77fb51819 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -154,10 +154,12 @@ static const struct lpss_device_desc lpt_sdio_dev_desc = {
 
 static const struct lpss_device_desc byt_pwm_dev_desc = {
 	.flags = LPSS_SAVE_CTX,
+	.prv_offset = 0x800,
 };
 
 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 	.flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
+	.prv_offset = 0x800,
 };
 
 static const struct lpss_device_desc byt_uart_dev_desc = {

From d7bdb478650aff5f6719e6cc4396ea74c29ea2dd Mon Sep 17 00:00:00 2001
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Thu, 2 Aug 2018 10:44:42 -0700
Subject: [PATCH 1539/1852] scsi: sr: Avoid that opening a CD-ROM hangs with
 runtime power management enabled

commit 1214fd7b497400d200e3f4e64e2338b303a20949 upstream.

Surround scsi_execute() calls with scsi_autopm_get_device() and
scsi_autopm_put_device(). Note: removing sr_mutex protection from the
scsi_cd_get() and scsi_cd_put() calls is safe because the purpose of
sr_mutex is to serialize cdrom_*() calls.

This patch avoids that complaints similar to the following appear in the
kernel log if runtime power management is enabled:

INFO: task systemd-udevd:650 blocked for more than 120 seconds.
     Not tainted 4.18.0-rc7-dbg+ #1
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
systemd-udevd   D28176   650    513 0x00000104
Call Trace:
__schedule+0x444/0xfe0
schedule+0x4e/0xe0
schedule_preempt_disabled+0x18/0x30
__mutex_lock+0x41c/0xc70
mutex_lock_nested+0x1b/0x20
__blkdev_get+0x106/0x970
blkdev_get+0x22c/0x5a0
blkdev_open+0xe9/0x100
do_dentry_open.isra.19+0x33e/0x570
vfs_open+0x7c/0xd0
path_openat+0x6e3/0x1120
do_filp_open+0x11c/0x1c0
do_sys_open+0x208/0x2d0
__x64_sys_openat+0x59/0x70
do_syscall_64+0x77/0x230
entry_SYSCALL_64_after_hwframe+0x49/0xbe

Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: Maurizio Lombardi <mlombard@redhat.com>
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: <stable@vger.kernel.org>
Tested-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/sr.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)

diff --git a/drivers/scsi/sr.c b/drivers/scsi/sr.c
index de53c9694b68e..5dc288fecace4 100644
--- a/drivers/scsi/sr.c
+++ b/drivers/scsi/sr.c
@@ -520,18 +520,26 @@ static int sr_init_command(struct scsi_cmnd *SCpnt)
 static int sr_block_open(struct block_device *bdev, fmode_t mode)
 {
 	struct scsi_cd *cd;
+	struct scsi_device *sdev;
 	int ret = -ENXIO;
 
+	cd = scsi_cd_get(bdev->bd_disk);
+	if (!cd)
+		goto out;
+
+	sdev = cd->device;
+	scsi_autopm_get_device(sdev);
 	check_disk_change(bdev);
 
 	mutex_lock(&sr_mutex);
-	cd = scsi_cd_get(bdev->bd_disk);
-	if (cd) {
-		ret = cdrom_open(&cd->cdi, bdev, mode);
-		if (ret)
-			scsi_cd_put(cd);
-	}
+	ret = cdrom_open(&cd->cdi, bdev, mode);
 	mutex_unlock(&sr_mutex);
+
+	scsi_autopm_put_device(sdev);
+	if (ret)
+		scsi_cd_put(cd);
+
+out:
 	return ret;
 }
 
@@ -559,6 +567,8 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd,
 	if (ret)
 		goto out;
 
+	scsi_autopm_get_device(sdev);
+
 	/*
 	 * Send SCSI addressing ioctls directly to mid level, send other
 	 * ioctls to cdrom/block level.
@@ -567,15 +577,18 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd,
 	case SCSI_IOCTL_GET_IDLUN:
 	case SCSI_IOCTL_GET_BUS_NUMBER:
 		ret = scsi_ioctl(sdev, cmd, argp);
-		goto out;
+		goto put;
 	}
 
 	ret = cdrom_ioctl(&cd->cdi, bdev, mode, cmd, arg);
 	if (ret != -ENOSYS)
-		goto out;
+		goto put;
 
 	ret = scsi_ioctl(sdev, cmd, argp);
 
+put:
+	scsi_autopm_put_device(sdev);
+
 out:
 	mutex_unlock(&sr_mutex);
 	return ret;

From d7a6a48869605572d8c65a99ea1b590027b62698 Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Mon, 6 Aug 2018 09:03:58 -0400
Subject: [PATCH 1540/1852] root dentries need RCU-delayed freeing

commit 90bad5e05bcdb0308cfa3d3a60f5c0b9c8e2efb3 upstream.

Since mountpoint crossing can happen without leaving lazy mode,
root dentries do need the same protection against having their
memory freed without RCU delay as everything else in the tree.

It's partially hidden by RCU delay between detaching from the
mount tree and dropping the vfsmount reference, but the starting
point of pathwalk can be on an already detached mount, in which
case umount-caused RCU delay has already passed by the time the
lazy pathwalk grabs rcu_read_lock().  If the starting point
happens to be at the root of that vfsmount *and* that vfsmount
covers the entire filesystem, we get trouble.

Fixes: 48a066e72d97 ("RCU'd vsfmounts")
Cc: stable@vger.kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/dcache.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/fs/dcache.c b/fs/dcache.c
index a69e9b42814a3..0f3937dd29f65 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -1954,10 +1954,12 @@ struct dentry *d_make_root(struct inode *root_inode)
 		static const struct qstr name = QSTR_INIT("/", 1);
 
 		res = __d_alloc(root_inode->i_sb, &name);
-		if (res)
+		if (res) {
+			res->d_flags |= DCACHE_RCUACCESS;
 			d_instantiate(res, root_inode);
-		else
+		} else {
 			iput(root_inode);
+		}
 	}
 	return res;
 }

From d8df8915ea1732477f23cd6eae11c49410b66fc8 Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Thu, 9 Aug 2018 17:21:17 -0400
Subject: [PATCH 1541/1852] fix mntput/mntput race

commit 9ea0a46ca2c318fcc449c1e6b62a7230a17888f1 upstream.

mntput_no_expire() does the calculation of total refcount under mount_lock;
unfortunately, the decrement (as well as all increments) are done outside
of it, leading to false positives in the "are we dropping the last reference"
test.  Consider the following situation:
	* mnt is a lazy-umounted mount, kept alive by two opened files.  One
of those files gets closed.  Total refcount of mnt is 2.  On CPU 42
mntput(mnt) (called from __fput()) drops one reference, decrementing component
	* After it has looked at component #0, the process on CPU 0 does
mntget(), incrementing component #0, gets preempted and gets to run again -
on CPU 69.  There it does mntput(), which drops the reference (component #69)
and proceeds to spin on mount_lock.
	* On CPU 42 our first mntput() finishes counting.  It observes the
decrement of component #69, but not the increment of component #0.  As the
result, the total it gets is not 1 as it should've been - it's 0.  At which
point we decide that vfsmount needs to be killed and proceed to free it and
shut the filesystem down.  However, there's still another opened file
on that filesystem, with reference to (now freed) vfsmount, etc. and we are
screwed.

It's not a wide race, but it can be reproduced with artificial slowdown of
the mnt_get_count() loop, and it should be easier to hit on SMP KVM setups.

Fix consists of moving the refcount decrement under mount_lock; the tricky
part is that we want (and can) keep the fast case (i.e. mount that still
has non-NULL ->mnt_ns) entirely out of mount_lock.  All places that zero
mnt->mnt_ns are dropping some reference to mnt and they call synchronize_rcu()
before that mntput().  IOW, if mntput() observes (under rcu_read_lock())
a non-NULL ->mnt_ns, it is guaranteed that there is another reference yet to
be dropped.

Reported-by: Jann Horn <jannh@google.com>
Tested-by: Jann Horn <jannh@google.com>
Fixes: 48a066e72d97 ("RCU'd vsfmounts")
Cc: stable@vger.kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/namespace.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/fs/namespace.c b/fs/namespace.c
index ce282400d13e0..e45763e1b8b51 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -1142,12 +1142,22 @@ static DECLARE_DELAYED_WORK(delayed_mntput_work, delayed_mntput);
 static void mntput_no_expire(struct mount *mnt)
 {
 	rcu_read_lock();
-	mnt_add_count(mnt, -1);
-	if (likely(mnt->mnt_ns)) { /* shouldn't be the last one */
+	if (likely(READ_ONCE(mnt->mnt_ns))) {
+		/*
+		 * Since we don't do lock_mount_hash() here,
+		 * ->mnt_ns can change under us.  However, if it's
+		 * non-NULL, then there's a reference that won't
+		 * be dropped until after an RCU delay done after
+		 * turning ->mnt_ns NULL.  So if we observe it
+		 * non-NULL under rcu_read_lock(), the reference
+		 * we are dropping is not the final one.
+		 */
+		mnt_add_count(mnt, -1);
 		rcu_read_unlock();
 		return;
 	}
 	lock_mount_hash();
+	mnt_add_count(mnt, -1);
 	if (mnt_get_count(mnt)) {
 		rcu_read_unlock();
 		unlock_mount_hash();

From a6d571dcc16c0bdd1343c8274d23e86898535c1e Mon Sep 17 00:00:00 2001
From: Al Viro <viro@zeniv.linux.org.uk>
Date: Thu, 9 Aug 2018 17:51:32 -0400
Subject: [PATCH 1542/1852] fix __legitimize_mnt()/mntput() race

commit 119e1ef80ecfe0d1deb6378d4ab41f5b71519de1 upstream.

__legitimize_mnt() has two problems - one is that in case of success
the check of mount_lock is not ordered wrt preceding increment of
refcount, making it possible to have successful __legitimize_mnt()
on one CPU just before the otherwise final mntpu() on another,
with __legitimize_mnt() not seeing mntput() taking the lock and
mntput() not seeing the increment done by __legitimize_mnt().
Solved by a pair of barriers.

Another is that failure of __legitimize_mnt() on the second
read_seqretry() leaves us with reference that'll need to be
dropped by caller; however, if that races with final mntput()
we can end up with caller dropping rcu_read_lock() and doing
mntput() to release that reference - with the first mntput()
having freed the damn thing just as rcu_read_lock() had been
dropped.  Solution: in "do mntput() yourself" failure case
grab mount_lock, check if MNT_DOOMED has been set by racing
final mntput() that has missed our increment and if it has -
undo the increment and treat that as "failure, caller doesn't
need to drop anything" case.

It's not easy to hit - the final mntput() has to come right
after the first read_seqretry() in __legitimize_mnt() *and*
manage to miss the increment done by __legitimize_mnt() before
the second read_seqretry() in there.  The things that are almost
impossible to hit on bare hardware are not impossible on SMP
KVM, though...

Reported-by: Oleg Nesterov <oleg@redhat.com>
Fixes: 48a066e72d97 ("RCU'd vsfmounts")
Cc: stable@vger.kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/namespace.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/fs/namespace.c b/fs/namespace.c
index e45763e1b8b51..996e1046e1ff3 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -605,12 +605,21 @@ int __legitimize_mnt(struct vfsmount *bastard, unsigned seq)
 		return 0;
 	mnt = real_mount(bastard);
 	mnt_add_count(mnt, 1);
+	smp_mb();			// see mntput_no_expire()
 	if (likely(!read_seqretry(&mount_lock, seq)))
 		return 0;
 	if (bastard->mnt_flags & MNT_SYNC_UMOUNT) {
 		mnt_add_count(mnt, -1);
 		return 1;
 	}
+	lock_mount_hash();
+	if (unlikely(bastard->mnt_flags & MNT_DOOMED)) {
+		mnt_add_count(mnt, -1);
+		unlock_mount_hash();
+		return 1;
+	}
+	unlock_mount_hash();
+	/* caller will mntput() */
 	return -1;
 }
 
@@ -1157,6 +1166,11 @@ static void mntput_no_expire(struct mount *mnt)
 		return;
 	}
 	lock_mount_hash();
+	/*
+	 * make sure that if __legitimize_mnt() has not seen us grab
+	 * mount_lock, we'll see their refcount increment here.
+	 */
+	smp_mb();
 	mnt_add_count(mnt, -1);
 	if (mnt_get_count(mnt)) {
 		rcu_read_unlock();

From c2d9602db94cf8cd4c7300ad2d42746b3749b091 Mon Sep 17 00:00:00 2001
From: Jack Morgenstein <jackm@dev.mellanox.co.il>
Date: Wed, 23 May 2018 15:30:30 +0300
Subject: [PATCH 1543/1852] IB/core: Make testing MR flags for writability a
 static inline function

commit 08bb558ac11ab944e0539e78619d7b4c356278bd upstream.

Make the MR writability flags check, which is performed in umem.c,
a static inline function in file ib_verbs.h

This allows the function to be used by low-level infiniband drivers.

Cc: <stable@vger.kernel.org>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/core/umem.c | 11 +----------
 include/rdma/ib_verbs.h        | 14 ++++++++++++++
 2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c
index 6790ebb366dda..98fd9a5948417 100644
--- a/drivers/infiniband/core/umem.c
+++ b/drivers/infiniband/core/umem.c
@@ -122,16 +122,7 @@ struct ib_umem *ib_umem_get(struct ib_ucontext *context, unsigned long addr,
 	umem->address   = addr;
 	umem->page_size = PAGE_SIZE;
 	umem->pid       = get_task_pid(current, PIDTYPE_PID);
-	/*
-	 * We ask for writable memory if any of the following
-	 * access flags are set.  "Local write" and "remote write"
-	 * obviously require write access.  "Remote atomic" can do
-	 * things like fetch and add, which will modify memory, and
-	 * "MW bind" can change permissions by binding a window.
-	 */
-	umem->writable  = !!(access &
-		(IB_ACCESS_LOCAL_WRITE   | IB_ACCESS_REMOTE_WRITE |
-		 IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_MW_BIND));
+	umem->writable   = ib_access_writable(access);
 
 	if (access & IB_ACCESS_ON_DEMAND) {
 		put_pid(umem->pid);
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 120da1d7f57eb..10fefb0dc6401 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -3007,6 +3007,20 @@ static inline int ib_check_mr_access(int flags)
 	return 0;
 }
 
+static inline bool ib_access_writable(int access_flags)
+{
+	/*
+	 * We have writable memory backing the MR if any of the following
+	 * access flags are set.  "Local write" and "remote write" obviously
+	 * require write access.  "Remote atomic" can do things like fetch and
+	 * add, which will modify memory, and "MW bind" can change permissions
+	 * by binding a window.
+	 */
+	return access_flags &
+		(IB_ACCESS_LOCAL_WRITE   | IB_ACCESS_REMOTE_WRITE |
+		 IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_MW_BIND);
+}
+
 /**
  * ib_check_mr_status: lightweight check of MR status.
  *     This routine may provide status checks on a selected

From 622aea789f87149b3c3a6a12dccc8990f65f9bad Mon Sep 17 00:00:00 2001
From: Jack Morgenstein <jackm@dev.mellanox.co.il>
Date: Wed, 23 May 2018 15:30:31 +0300
Subject: [PATCH 1544/1852] IB/mlx4: Mark user MR as writable if actual virtual
 memory is writable

commit d8f9cc328c8888369880e2527e9186d745f2bbf6 upstream.

To allow rereg_user_mr to modify the MR from read-only to writable without
using get_user_pages again, we needed to define the initial MR as writable.
However, this was originally done unconditionally, without taking into
account the writability of the underlying virtual memory.

As a result, any attempt to register a read-only MR over read-only
virtual memory failed.

To fix this, do not add the writable flag bit when the user virtual memory
is not writable (e.g. const memory).

However, when the underlying memory is NOT writable (and we therefore
do not define the initial MR as writable), the IB core adds a
"force writable" flag to its user-pages request. If this succeeds,
the reg_user_mr caller gets a writable copy of the original pages.

If the user-space caller then does a rereg_user_mr operation to enable
writability, this will succeed. This should not be allowed, since
the original virtual memory was not writable.

Cc: <stable@vger.kernel.org>
Fixes: 9376932d0c26 ("IB/mlx4_ib: Add support for user MR re-registration")
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/mlx4/mr.c | 50 +++++++++++++++++++++++++++------
 1 file changed, 42 insertions(+), 8 deletions(-)

diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/mr.c
index ce87e9cc7effa..bf52e35dd506a 100644
--- a/drivers/infiniband/hw/mlx4/mr.c
+++ b/drivers/infiniband/hw/mlx4/mr.c
@@ -130,6 +130,40 @@ int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
 	return err;
 }
 
+static struct ib_umem *mlx4_get_umem_mr(struct ib_ucontext *context, u64 start,
+					u64 length, u64 virt_addr,
+					int access_flags)
+{
+	/*
+	 * Force registering the memory as writable if the underlying pages
+	 * are writable.  This is so rereg can change the access permissions
+	 * from readable to writable without having to run through ib_umem_get
+	 * again
+	 */
+	if (!ib_access_writable(access_flags)) {
+		struct vm_area_struct *vma;
+
+		down_read(&current->mm->mmap_sem);
+		/*
+		 * FIXME: Ideally this would iterate over all the vmas that
+		 * cover the memory, but for now it requires a single vma to
+		 * entirely cover the MR to support RO mappings.
+		 */
+		vma = find_vma(current->mm, start);
+		if (vma && vma->vm_end >= start + length &&
+		    vma->vm_start <= start) {
+			if (vma->vm_flags & VM_WRITE)
+				access_flags |= IB_ACCESS_LOCAL_WRITE;
+		} else {
+			access_flags |= IB_ACCESS_LOCAL_WRITE;
+		}
+
+		up_read(&current->mm->mmap_sem);
+	}
+
+	return ib_umem_get(context, start, length, access_flags, 0);
+}
+
 struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
 				  u64 virt_addr, int access_flags,
 				  struct ib_udata *udata)
@@ -144,10 +178,8 @@ struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
 	if (!mr)
 		return ERR_PTR(-ENOMEM);
 
-	/* Force registering the memory as writable. */
-	/* Used for memory re-registeration. HCA protects the access */
-	mr->umem = ib_umem_get(pd->uobject->context, start, length,
-			       access_flags | IB_ACCESS_LOCAL_WRITE, 0);
+	mr->umem = mlx4_get_umem_mr(pd->uobject->context, start, length,
+				    virt_addr, access_flags);
 	if (IS_ERR(mr->umem)) {
 		err = PTR_ERR(mr->umem);
 		goto err_free;
@@ -214,6 +246,9 @@ int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
 	}
 
 	if (flags & IB_MR_REREG_ACCESS) {
+		if (ib_access_writable(mr_access_flags) && !mmr->umem->writable)
+			return -EPERM;
+
 		err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
 					       convert_access(mr_access_flags));
 
@@ -227,10 +262,9 @@ int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
 
 		mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
 		ib_umem_release(mmr->umem);
-		mmr->umem = ib_umem_get(mr->uobject->context, start, length,
-					mr_access_flags |
-					IB_ACCESS_LOCAL_WRITE,
-					0);
+		mmr->umem =
+			mlx4_get_umem_mr(mr->uobject->context, start, length,
+					 virt_addr, mr_access_flags);
 		if (IS_ERR(mmr->umem)) {
 			err = PTR_ERR(mmr->umem);
 			/* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */

From 078e2a7b07c0ab6abac4f483fe3cc68a35a92149 Mon Sep 17 00:00:00 2001
From: Michael Mera <dev@michaelmera.com>
Date: Mon, 1 May 2017 15:41:16 +0900
Subject: [PATCH 1545/1852] IB/ocrdma: fix out of bounds access to local buffer

commit 062d0f22a30c39840ea49b72cfcfc1aa4cc538fa upstream.

In write to debugfs file 'resource_stats' the local buffer 'tmp_str' is
written at index 'count-1' where 'count' is the size of the write, so
potentially 0.

This patch filters odd values for the write size/position to avoid this
type of problem.

Signed-off-by: Michael Mera <dev@michaelmera.com>
Reviewed-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/infiniband/hw/ocrdma/ocrdma_stats.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_stats.c b/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
index 748b63b86cbc6..40242ead096f4 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
@@ -643,7 +643,7 @@ static ssize_t ocrdma_dbgfs_ops_write(struct file *filp,
 	struct ocrdma_stats *pstats = filp->private_data;
 	struct ocrdma_dev *dev = pstats->dev;
 
-	if (count > 32)
+	if (*ppos != 0 || count == 0 || count > sizeof(tmp_str))
 		goto err;
 
 	if (copy_from_user(tmp_str, buffer, count))

From 5611fa5ec8734cb4b3f8d753e6ea23e0186160db Mon Sep 17 00:00:00 2001
From: Oleksij Rempel <o.rempel@pengutronix.de>
Date: Fri, 15 Jun 2018 09:41:29 +0200
Subject: [PATCH 1546/1852] ARM: dts: imx6sx: fix irq for pcie bridge

commit 1bcfe0564044be578841744faea1c2f46adc8178 upstream.

Use the correct IRQ line for the MSI controller in the PCIe host
controller. Apparently a different IRQ line is used compared to other
i.MX6 variants. Without this change MSI IRQs aren't properly propagated
to the upstream interrupt controller.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Fixes: b1d17f68e5c5 ("ARM: dts: imx: add initial imx6sx device tree source")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/imx6sx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 167f77b3bd436..6963dff815dc8 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1250,7 +1250,7 @@
 				  /* non-prefetchable memory */
 				  0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
 			num-lanes = <1>;
-			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,
 				 <&clks IMX6SX_CLK_PCIE_AXI>,
 				 <&clks IMX6SX_CLK_LVDS1_OUT>,

From 848f239b6886e8875d3a135055702adb951afe67 Mon Sep 17 00:00:00 2001
From: Peter Zijlstra <peterz@infradead.org>
Date: Fri, 3 Aug 2018 16:41:39 +0200
Subject: [PATCH 1547/1852] x86/paravirt: Fix spectre-v2 mitigations for
 paravirt guests

commit 5800dc5c19f34e6e03b5adab1282535cb102fafd upstream.

Nadav reported that on guests we're failing to rewrite the indirect
calls to CALLEE_SAVE paravirt functions. In particular the
pv_queued_spin_unlock() call is left unpatched and that is all over the
place. This obviously wrecks Spectre-v2 mitigation (for paravirt
guests) which relies on not actually having indirect calls around.

The reason is an incorrect clobber test in paravirt_patch_call(); this
function rewrites an indirect call with a direct call to the _SAME_
function, there is no possible way the clobbers can be different
because of this.

Therefore remove this clobber check. Also put WARNs on the other patch
failure case (not enough room for the instruction) which I've not seen
trigger in my (limited) testing.

Three live kernel image disassemblies for lock_sock_nested (as a small
function that illustrates the problem nicely). PRE is the current
situation for guests, POST is with this patch applied and NATIVE is with
or without the patch for !guests.

PRE:

(gdb) disassemble lock_sock_nested
Dump of assembler code for function lock_sock_nested:
   0xffffffff817be970 <+0>:     push   %rbp
   0xffffffff817be971 <+1>:     mov    %rdi,%rbp
   0xffffffff817be974 <+4>:     push   %rbx
   0xffffffff817be975 <+5>:     lea    0x88(%rbp),%rbx
   0xffffffff817be97c <+12>:    callq  0xffffffff819f7160 <_cond_resched>
   0xffffffff817be981 <+17>:    mov    %rbx,%rdi
   0xffffffff817be984 <+20>:    callq  0xffffffff819fbb00 <_raw_spin_lock_bh>
   0xffffffff817be989 <+25>:    mov    0x8c(%rbp),%eax
   0xffffffff817be98f <+31>:    test   %eax,%eax
   0xffffffff817be991 <+33>:    jne    0xffffffff817be9ba <lock_sock_nested+74>
   0xffffffff817be993 <+35>:    movl   $0x1,0x8c(%rbp)
   0xffffffff817be99d <+45>:    mov    %rbx,%rdi
   0xffffffff817be9a0 <+48>:    callq  *0xffffffff822299e8
   0xffffffff817be9a7 <+55>:    pop    %rbx
   0xffffffff817be9a8 <+56>:    pop    %rbp
   0xffffffff817be9a9 <+57>:    mov    $0x200,%esi
   0xffffffff817be9ae <+62>:    mov    $0xffffffff817be993,%rdi
   0xffffffff817be9b5 <+69>:    jmpq   0xffffffff81063ae0 <__local_bh_enable_ip>
   0xffffffff817be9ba <+74>:    mov    %rbp,%rdi
   0xffffffff817be9bd <+77>:    callq  0xffffffff817be8c0 <__lock_sock>
   0xffffffff817be9c2 <+82>:    jmp    0xffffffff817be993 <lock_sock_nested+35>
End of assembler dump.

POST:

(gdb) disassemble lock_sock_nested
Dump of assembler code for function lock_sock_nested:
   0xffffffff817be970 <+0>:     push   %rbp
   0xffffffff817be971 <+1>:     mov    %rdi,%rbp
   0xffffffff817be974 <+4>:     push   %rbx
   0xffffffff817be975 <+5>:     lea    0x88(%rbp),%rbx
   0xffffffff817be97c <+12>:    callq  0xffffffff819f7160 <_cond_resched>
   0xffffffff817be981 <+17>:    mov    %rbx,%rdi
   0xffffffff817be984 <+20>:    callq  0xffffffff819fbb00 <_raw_spin_lock_bh>
   0xffffffff817be989 <+25>:    mov    0x8c(%rbp),%eax
   0xffffffff817be98f <+31>:    test   %eax,%eax
   0xffffffff817be991 <+33>:    jne    0xffffffff817be9ba <lock_sock_nested+74>
   0xffffffff817be993 <+35>:    movl   $0x1,0x8c(%rbp)
   0xffffffff817be99d <+45>:    mov    %rbx,%rdi
   0xffffffff817be9a0 <+48>:    callq  0xffffffff810a0c20 <__raw_callee_save___pv_queued_spin_unlock>
   0xffffffff817be9a5 <+53>:    xchg   %ax,%ax
   0xffffffff817be9a7 <+55>:    pop    %rbx
   0xffffffff817be9a8 <+56>:    pop    %rbp
   0xffffffff817be9a9 <+57>:    mov    $0x200,%esi
   0xffffffff817be9ae <+62>:    mov    $0xffffffff817be993,%rdi
   0xffffffff817be9b5 <+69>:    jmpq   0xffffffff81063aa0 <__local_bh_enable_ip>
   0xffffffff817be9ba <+74>:    mov    %rbp,%rdi
   0xffffffff817be9bd <+77>:    callq  0xffffffff817be8c0 <__lock_sock>
   0xffffffff817be9c2 <+82>:    jmp    0xffffffff817be993 <lock_sock_nested+35>
End of assembler dump.

NATIVE:

(gdb) disassemble lock_sock_nested
Dump of assembler code for function lock_sock_nested:
   0xffffffff817be970 <+0>:     push   %rbp
   0xffffffff817be971 <+1>:     mov    %rdi,%rbp
   0xffffffff817be974 <+4>:     push   %rbx
   0xffffffff817be975 <+5>:     lea    0x88(%rbp),%rbx
   0xffffffff817be97c <+12>:    callq  0xffffffff819f7160 <_cond_resched>
   0xffffffff817be981 <+17>:    mov    %rbx,%rdi
   0xffffffff817be984 <+20>:    callq  0xffffffff819fbb00 <_raw_spin_lock_bh>
   0xffffffff817be989 <+25>:    mov    0x8c(%rbp),%eax
   0xffffffff817be98f <+31>:    test   %eax,%eax
   0xffffffff817be991 <+33>:    jne    0xffffffff817be9ba <lock_sock_nested+74>
   0xffffffff817be993 <+35>:    movl   $0x1,0x8c(%rbp)
   0xffffffff817be99d <+45>:    mov    %rbx,%rdi
   0xffffffff817be9a0 <+48>:    movb   $0x0,(%rdi)
   0xffffffff817be9a3 <+51>:    nopl   0x0(%rax)
   0xffffffff817be9a7 <+55>:    pop    %rbx
   0xffffffff817be9a8 <+56>:    pop    %rbp
   0xffffffff817be9a9 <+57>:    mov    $0x200,%esi
   0xffffffff817be9ae <+62>:    mov    $0xffffffff817be993,%rdi
   0xffffffff817be9b5 <+69>:    jmpq   0xffffffff81063ae0 <__local_bh_enable_ip>
   0xffffffff817be9ba <+74>:    mov    %rbp,%rdi
   0xffffffff817be9bd <+77>:    callq  0xffffffff817be8c0 <__lock_sock>
   0xffffffff817be9c2 <+82>:    jmp    0xffffffff817be993 <lock_sock_nested+35>
End of assembler dump.


Fixes: 63f70270ccd9 ("[PATCH] i386: PARAVIRT: add common patching machinery")
Fixes: 3010a0663fd9 ("x86/paravirt, objtool: Annotate indirect calls")
Reported-by: Nadav Amit <namit@vmware.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Juergen Gross <jgross@suse.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/paravirt.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index f534a0e3af535..632195b416886 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -97,10 +97,12 @@ unsigned paravirt_patch_call(void *insnbuf,
 	struct branch *b = insnbuf;
 	unsigned long delta = (unsigned long)target - (addr+5);
 
-	if (tgt_clobbers & ~site_clobbers)
-		return len;	/* target would clobber too much for this site */
-	if (len < 5)
+	if (len < 5) {
+#ifdef CONFIG_RETPOLINE
+		WARN_ONCE("Failing to patch indirect CALL in %ps\n", (void *)addr);
+#endif
 		return len;	/* call too long for patch site */
+	}
 
 	b->opcode = 0xe8; /* call */
 	b->delta = delta;
@@ -115,8 +117,12 @@ unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 	struct branch *b = insnbuf;
 	unsigned long delta = (unsigned long)target - (addr+5);
 
-	if (len < 5)
+	if (len < 5) {
+#ifdef CONFIG_RETPOLINE
+		WARN_ONCE("Failing to patch indirect JMP in %ps\n", (void *)addr);
+#endif
 		return len;	/* call too long for patch site */
+	}
 
 	b->opcode = 0xe9;	/* jmp */
 	b->delta = delta;

From 8328c155db3f762dc148576a98705dee90d4babf Mon Sep 17 00:00:00 2001
From: Jiri Kosina <jkosina@suse.cz>
Date: Thu, 26 Jul 2018 13:14:55 +0200
Subject: [PATCH 1548/1852] x86/speculation: Protect against
 userspace-userspace spectreRSB

commit fdf82a7856b32d905c39afc85e34364491e46346 upstream.

The article "Spectre Returns! Speculation Attacks using the Return Stack
Buffer" [1] describes two new (sub-)variants of spectrev2-like attacks,
making use solely of the RSB contents even on CPUs that don't fallback to
BTB on RSB underflow (Skylake+).

Mitigate userspace-userspace attacks by always unconditionally filling RSB on
context switch when the generic spectrev2 mitigation has been enabled.

[1] https://arxiv.org/pdf/1807.07940.pdf

Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1807261308190.997@cbobk.fhfr.pm
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 38 +++++++-------------------------------
 1 file changed, 7 insertions(+), 31 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 12a8867071f3b..7688ce0b26c5f 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -309,23 +309,6 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
 	return cmd;
 }
 
-/* Check for Skylake-like CPUs (for RSB handling) */
-static bool __init is_skylake_era(void)
-{
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
-	    boot_cpu_data.x86 == 6) {
-		switch (boot_cpu_data.x86_model) {
-		case INTEL_FAM6_SKYLAKE_MOBILE:
-		case INTEL_FAM6_SKYLAKE_DESKTOP:
-		case INTEL_FAM6_SKYLAKE_X:
-		case INTEL_FAM6_KABYLAKE_MOBILE:
-		case INTEL_FAM6_KABYLAKE_DESKTOP:
-			return true;
-		}
-	}
-	return false;
-}
-
 static void __init spectre_v2_select_mitigation(void)
 {
 	enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline();
@@ -386,22 +369,15 @@ static void __init spectre_v2_select_mitigation(void)
 	pr_info("%s\n", spectre_v2_strings[mode]);
 
 	/*
-	 * If neither SMEP nor PTI are available, there is a risk of
-	 * hitting userspace addresses in the RSB after a context switch
-	 * from a shallow call stack to a deeper one. To prevent this fill
-	 * the entire RSB, even when using IBRS.
+	 * If spectre v2 protection has been enabled, unconditionally fill
+	 * RSB during a context switch; this protects against two independent
+	 * issues:
 	 *
-	 * Skylake era CPUs have a separate issue with *underflow* of the
-	 * RSB, when they will predict 'ret' targets from the generic BTB.
-	 * The proper mitigation for this is IBRS. If IBRS is not supported
-	 * or deactivated in favour of retpolines the RSB fill on context
-	 * switch is required.
+	 *	- RSB underflow (and switch to BTB) on Skylake+
+	 *	- SpectreRSB variant of spectre v2 on X86_BUG_SPECTRE_V2 CPUs
 	 */
-	if ((!boot_cpu_has(X86_FEATURE_KAISER) &&
-	     !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
-		setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
-		pr_info("Spectre v2 mitigation: Filling RSB on context switch\n");
-	}
+	setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
+	pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
 
 	/* Initialize Indirect Branch Prediction Barrier if supported */
 	if (boot_cpu_has(X86_FEATURE_IBPB)) {

From b5c639c13b854ad90b0ce6f02a95c5cdb64d80d3 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 28 Apr 2018 21:37:03 +0900
Subject: [PATCH 1549/1852] kprobes/x86: Fix %p uses in error messages

commit 0ea063306eecf300fcf06d2f5917474b580f666f upstream.

Remove all %p uses in error messages in kprobes/x86.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Howells <dhowells@redhat.com>
Cc: David S . Miller <davem@davemloft.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jon Medhurst <tixy@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Tobin C . Harding <me@tobin.cc>
Cc: Will Deacon <will.deacon@arm.com>
Cc: acme@kernel.org
Cc: akpm@linux-foundation.org
Cc: brueckner@linux.vnet.ibm.com
Cc: linux-arch@vger.kernel.org
Cc: rostedt@goodmis.org
Cc: schwidefsky@de.ibm.com
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/lkml/152491902310.9916.13355297638917767319.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/kprobes/core.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c
index c8f352e7e062c..581671172e106 100644
--- a/arch/x86/kernel/kprobes/core.c
+++ b/arch/x86/kernel/kprobes/core.c
@@ -394,7 +394,6 @@ int __copy_instruction(u8 *dest, u8 *src)
 		newdisp = (u8 *) src + (s64) insn.displacement.value - (u8 *) dest;
 		if ((s64) (s32) newdisp != newdisp) {
 			pr_err("Kprobes error: new displacement does not fit into s32 (%llx)\n", newdisp);
-			pr_err("\tSrc: %p, Dest: %p, old disp: %x\n", src, dest, insn.displacement.value);
 			return 0;
 		}
 		disp = (u8 *) dest + insn_offset_displacement(&insn);
@@ -610,8 +609,7 @@ static int reenter_kprobe(struct kprobe *p, struct pt_regs *regs,
 		 * Raise a BUG or we'll continue in an endless reentering loop
 		 * and eventually a stack overflow.
 		 */
-		printk(KERN_WARNING "Unrecoverable kprobe detected at %p.\n",
-		       p->addr);
+		pr_err("Unrecoverable kprobe detected.\n");
 		dump_kprobe(p);
 		BUG();
 	default:

From e436ea31266606187c02a31218b824f38bebb3f3 Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers@google.com>
Date: Fri, 3 Aug 2018 10:05:50 -0700
Subject: [PATCH 1550/1852] x86/irqflags: Provide a declaration for
 native_save_fl

commit 208cbb32558907f68b3b2a081ca2337ac3744794 upstream.

It was reported that the commit d0a8d9378d16 is causing users of gcc < 4.9
to observe -Werror=missing-prototypes errors.

Indeed, it seems that:
extern inline unsigned long native_save_fl(void) { return 0; }

compiled with -Werror=missing-prototypes produces this warning in gcc <
4.9, but not gcc >= 4.9.

Fixes: d0a8d9378d16 ("x86/paravirt: Make native_save_fl() extern inline").
Reported-by: David Laight <david.laight@aculab.com>
Reported-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: hpa@zytor.com
Cc: jgross@suse.com
Cc: kstewart@linuxfoundation.org
Cc: gregkh@linuxfoundation.org
Cc: boris.ostrovsky@oracle.com
Cc: astrachan@google.com
Cc: mka@chromium.org
Cc: arnd@arndb.de
Cc: tstellar@redhat.com
Cc: sedat.dilek@gmail.com
Cc: David.Laight@aculab.com
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180803170550.164688-1-ndesaulniers@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/irqflags.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflags.h
index 0056bc945cd15..cb7f04981c6b3 100644
--- a/arch/x86/include/asm/irqflags.h
+++ b/arch/x86/include/asm/irqflags.h
@@ -8,6 +8,8 @@
  * Interrupt control:
  */
 
+/* Declaration required for gcc < 4.9 to prevent -Werror=missing-prototypes */
+extern inline unsigned long native_save_fl(void);
 extern inline unsigned long native_save_fl(void)
 {
 	unsigned long flags;

From 780ad35176584f2ef7053b810f61b51b911dcdb8 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:21 -0700
Subject: [PATCH 1551/1852] x86/speculation/l1tf: Increase 32bit PAE
 __PHYSICAL_PAGE_SHIFT

commit 50896e180c6aa3a9c61a26ced99e15d602666a4c upstream

L1 Terminal Fault (L1TF) is a speculation related vulnerability. The CPU
speculates on PTE entries which do not have the PRESENT bit set, if the
content of the resulting physical address is available in the L1D cache.

The OS side mitigation makes sure that a !PRESENT PTE entry points to a
physical address outside the actually existing and cachable memory
space. This is achieved by inverting the upper bits of the PTE. Due to the
address space limitations this only works for 64bit and 32bit PAE kernels,
but not for 32bit non PAE.

This mitigation applies to both host and guest kernels, but in case of a
64bit host (hypervisor) and a 32bit PAE guest, inverting the upper bits of
the PAE address space (44bit) is not enough if the host has more than 43
bits of populated memory address space, because the speculation treats the
PTE content as a physical host address bypassing EPT.

The host (hypervisor) protects itself against the guest by flushing L1D as
needed, but pages inside the guest are not protected against attacks from
other processes inside the same guest.

For the guest the inverted PTE mask has to match the host to provide the
full protection for all pages the host could possibly map into the
guest. The hosts populated address space is not known to the guest, so the
mask must cover the possible maximal host address space, i.e. 52 bit.

On 32bit PAE the maximum PTE mask is currently set to 44 bit because that
is the limit imposed by 32bit unsigned long PFNs in the VMs. This limits
the mask to be below what the host could possible use for physical pages.

The L1TF PROT_NONE protection code uses the PTE masks to determine which
bits to invert to make sure the higher bits are set for unmapped entries to
prevent L1TF speculation attacks against EPT inside guests.

In order to invert all bits that could be used by the host, increase
__PHYSICAL_PAGE_SHIFT to 52 to match 64bit.

The real limit for a 32bit PAE kernel is still 44 bits because all Linux
PTEs are created from unsigned long PFNs, so they cannot be higher than 44
bits on a 32bit kernel. So these extra PFN bits should be never set. The
only users of this macro are using it to look at PTEs, so it's safe.

[ tglx: Massaged changelog ]

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/page_32_types.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
index 3a52ee0e726d4..bfceb5cc63478 100644
--- a/arch/x86/include/asm/page_32_types.h
+++ b/arch/x86/include/asm/page_32_types.h
@@ -27,8 +27,13 @@
 #define N_EXCEPTION_STACKS 1
 
 #ifdef CONFIG_X86_PAE
-/* 44=32+12, the limit we can fit into an unsigned long pfn */
-#define __PHYSICAL_MASK_SHIFT	44
+/*
+ * This is beyond the 44 bit limit imposed by the 32bit long pfns,
+ * but we need the full mask to make sure inverted PROT_NONE
+ * entries have all the host bits set in a guest.
+ * The real limit is still 44 bits.
+ */
+#define __PHYSICAL_MASK_SHIFT	52
 #define __VIRTUAL_MASK_SHIFT	32
 
 #else  /* !CONFIG_X86_PAE */

From 599c9c9223794ec20a19af98b784001016936cb7 Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Thu, 7 Jul 2016 17:19:11 -0700
Subject: [PATCH 1552/1852] x86/mm: Move swap offset/type up in PTE to work
 around erratum

commit 00839ee3b299303c6a5e26a0a2485427a3afcbbf upstream

This erratum can result in Accessed/Dirty getting set by the hardware
when we do not expect them to be (on !Present PTEs).

Instead of trying to fix them up after this happens, we just
allow the bits to get set and try to ignore them.  We do this by
shifting the layout of the bits we use for swap offset/type in
our 64-bit PTEs.

It looks like this:

 bitnrs: |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0|
 names:  |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P|
 before: |         OFFSET (9-63)          |0|X|X| TYPE(1-5) |0|
  after: | OFFSET (14-63)  |  TYPE (9-13) |0|X|X|X| X| X|X|X|0|

Note that D was already a don't care (X) even before.  We just
move TYPE up and turn its old spot (which could be hit by the
A bit) into all don't cares.

We take 5 bits away from the offset, but that still leaves us
with 50 bits which lets us index into a 62-bit swapfile (4 EiB).
I think that's probably fine for the moment.  We could
theoretically reclaim 5 of the bits (1, 2, 3, 4, 7) but it
doesn't gain us anything.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hp.com>
Cc: dave.hansen@intel.com
Cc: linux-mm@kvack.org
Cc: mhocko@suse.com
Link: http://lkml.kernel.org/r/20160708001911.9A3FD2B6@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable_64.h | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index c810226e741a6..225405b690b88 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -163,18 +163,32 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
 #define pte_unmap(pte) ((void)(pte))/* NOP */
 
-/* Encode and de-code a swap entry */
+/*
+ * Encode and de-code a swap entry
+ *
+ * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0| <- bit number
+ * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit names
+ * | OFFSET (14->63) | TYPE (10-13) |0|X|X|X| X| X|X|X|0| <- swp entry
+ *
+ * G (8) is aliased and used as a PROT_NONE indicator for
+ * !present ptes.  We need to start storing swap entries above
+ * there.  We also need to avoid using A and D because of an
+ * erratum where they can be incorrectly set by hardware on
+ * non-present PTEs.
+ */
+#define SWP_TYPE_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
 #define SWP_TYPE_BITS 5
-#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
+/* Place the offset above the type: */
+#define SWP_OFFSET_FIRST_BIT (SWP_TYPE_FIRST_BIT + SWP_TYPE_BITS + 1)
 
 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
 
-#define __swp_type(x)			(((x).val >> (_PAGE_BIT_PRESENT + 1)) \
+#define __swp_type(x)			(((x).val >> (SWP_TYPE_FIRST_BIT)) \
 					 & ((1U << SWP_TYPE_BITS) - 1))
-#define __swp_offset(x)			((x).val >> SWP_OFFSET_SHIFT)
+#define __swp_offset(x)			((x).val >> SWP_OFFSET_FIRST_BIT)
 #define __swp_entry(type, offset)	((swp_entry_t) { \
-					 ((type) << (_PAGE_BIT_PRESENT + 1)) \
-					 | ((offset) << SWP_OFFSET_SHIFT) })
+					 ((type) << (SWP_TYPE_FIRST_BIT)) \
+					 | ((offset) << SWP_OFFSET_FIRST_BIT) })
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
 #define __swp_entry_to_pte(x)		((pte_t) { .pte = (x).val })
 

From 22bb5a19dc97026b10220f8a81373d0a645f1ccd Mon Sep 17 00:00:00 2001
From: Dave Hansen <dave.hansen@linux.intel.com>
Date: Wed, 10 Aug 2016 10:23:25 -0700
Subject: [PATCH 1553/1852] x86/mm: Fix swap entry comment and macro

commit ace7fab7a6cdd363a615ec537f2aa94dbc761ee2 upstream

A recent patch changed the format of a swap PTE.

The comment explaining the format of the swap PTE is wrong about
the bits used for the swap type field.  Amusingly, the ASCII art
and the patch description are correct, but the comment itself
is wrong.

As I was looking at this, I also noticed that the
SWP_OFFSET_FIRST_BIT has an off-by-one error.  This does not
really hurt anything.  It just wasted a bit of space in the PTE,
giving us 2^59 bytes of addressable space in our swapfiles
instead of 2^60.  But, it doesn't match with the comments, and it
wastes a bit of space, so fix it.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hp.com>
Fixes: 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to work around erratum")
Link: http://lkml.kernel.org/r/20160810172325.E56AD7DA@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable_64.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 225405b690b88..ce97c8c6a310e 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -168,7 +168,7 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
  *
  * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0| <- bit number
  * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit names
- * | OFFSET (14->63) | TYPE (10-13) |0|X|X|X| X| X|X|X|0| <- swp entry
+ * | OFFSET (14->63) | TYPE (9-13)  |0|X|X|X| X| X|X|X|0| <- swp entry
  *
  * G (8) is aliased and used as a PROT_NONE indicator for
  * !present ptes.  We need to start storing swap entries above
@@ -179,7 +179,7 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 #define SWP_TYPE_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
 #define SWP_TYPE_BITS 5
 /* Place the offset above the type: */
-#define SWP_OFFSET_FIRST_BIT (SWP_TYPE_FIRST_BIT + SWP_TYPE_BITS + 1)
+#define SWP_OFFSET_FIRST_BIT (SWP_TYPE_FIRST_BIT + SWP_TYPE_BITS)
 
 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
 

From aeda743320bc39a0c9cfd3e544ee09954da11b6e Mon Sep 17 00:00:00 2001
From: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Date: Fri, 8 Sep 2017 16:10:46 -0700
Subject: [PATCH 1554/1852] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to
 bit 1

commit eee4818baac0f2b37848fdf90e4b16430dc536ac upstream

_PAGE_PSE is used to distinguish between a truly non-present
(_PAGE_PRESENT=0) PMD, and a PMD which is undergoing a THP split and
should be treated as present.

But _PAGE_SWP_SOFT_DIRTY currently uses the _PAGE_PSE bit, which would
cause confusion between one of those PMDs undergoing a THP split, and a
soft-dirty PMD.  Dropping _PAGE_PSE check in pmd_present() does not work
well, because it can hurt optimization of tlb handling in thp split.

Thus, we need to move the bit.

In the current kernel, bits 1-4 are not used in non-present format since
commit 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to work
around erratum").  So let's move _PAGE_SWP_SOFT_DIRTY to bit 1.  Bit 7
is used as reserved (always clear), so please don't use it for other
purpose.

[dwmw2: Pulled in to 4.9 backport to support L1TF changes]

Link: http://lkml.kernel.org/r/20170717193955.20207-3-zi.yan@sent.com
Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Signed-off-by: Zi Yan <zi.yan@cs.rutgers.edu>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: David Nellans <dnellans@nvidia.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Michal Hocko <mhocko@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable_64.h    | 12 +++++++++---
 arch/x86/include/asm/pgtable_types.h | 10 +++++-----
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index ce97c8c6a310e..008e1a58f96cb 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -166,15 +166,21 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 /*
  * Encode and de-code a swap entry
  *
- * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0| <- bit number
- * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit names
- * | OFFSET (14->63) | TYPE (9-13)  |0|X|X|X| X| X|X|X|0| <- swp entry
+ * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2| 1|0| <- bit number
+ * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
+ * | OFFSET (14->63) | TYPE (9-13)  |0|0|X|X| X| X|X|SD|0| <- swp entry
  *
  * G (8) is aliased and used as a PROT_NONE indicator for
  * !present ptes.  We need to start storing swap entries above
  * there.  We also need to avoid using A and D because of an
  * erratum where they can be incorrectly set by hardware on
  * non-present PTEs.
+ *
+ * SD (1) in swp entry is used to store soft dirty bit, which helps us
+ * remember soft dirty over page migration
+ *
+ * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
+ * but also L and G.
  */
 #define SWP_TYPE_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
 #define SWP_TYPE_BITS 5
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 8dba273da25a6..7572ce32055eb 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -70,15 +70,15 @@
 /*
  * Tracking soft dirty bit when a page goes to a swap is tricky.
  * We need a bit which can be stored in pte _and_ not conflict
- * with swap entry format. On x86 bits 6 and 7 are *not* involved
- * into swap entry computation, but bit 6 is used for nonlinear
- * file mapping, so we borrow bit 7 for soft dirty tracking.
+ * with swap entry format. On x86 bits 1-4 are *not* involved
+ * into swap entry computation, but bit 7 is used for thp migration,
+ * so we borrow bit 1 for soft dirty tracking.
  *
  * Please note that this bit must be treated as swap dirty page
- * mark if and only if the PTE has present bit clear!
+ * mark if and only if the PTE/PMD has present bit clear!
  */
 #ifdef CONFIG_MEM_SOFT_DIRTY
-#define _PAGE_SWP_SOFT_DIRTY	_PAGE_PSE
+#define _PAGE_SWP_SOFT_DIRTY	_PAGE_RW
 #else
 #define _PAGE_SWP_SOFT_DIRTY	(_AT(pteval_t, 0))
 #endif

From 08e0c0a48e073d64d1441eafb47fbd126c56dd17 Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 13 Jun 2018 15:48:22 -0700
Subject: [PATCH 1555/1852] x86/speculation/l1tf: Change order of offset/type
 in swap entry

commit bcd11afa7adad8d720e7ba5ef58bdcd9775cf45f upstream

If pages are swapped out, the swap entry is stored in the corresponding
PTE, which has the Present bit cleared. CPUs vulnerable to L1TF speculate
on PTE entries which have the present bit set and would treat the swap
entry as phsyical address (PFN). To mitigate that the upper bits of the PTE
must be set so the PTE points to non existent memory.

The swap entry stores the type and the offset of a swapped out page in the
PTE. type is stored in bit 9-13 and offset in bit 14-63. The hardware
ignores the bits beyond the phsyical address space limit, so to make the
mitigation effective its required to start 'offset' at the lowest possible
bit so that even large swap offsets do not reach into the physical address
space limit bits.

Move offset to bit 9-58 and type to bit 59-63 which are the bits that
hardware generally doesn't care about.

That, in turn, means that if you on desktop chip with only 40 bits of
physical addressing, now that the offset starts at bit 9, there needs to be
30 bits of offset actually *in use* until bit 39 ends up being set, which
means when inverted it will again point into existing memory.

So that's 4 terabyte of swap space (because the offset is counted in pages,
so 30 bits of offset is 42 bits of actual coverage). With bigger physical
addressing, that obviously grows further, until the limit of the offset is
hit (at 50 bits of offset - 62 bits of actual swap file coverage).

This is a preparatory change for the actual swap entry inversion to protect
against L1TF.

[ AK: Updated description and minor tweaks. Split into two parts ]
[ tglx: Massaged changelog ]

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable_64.h | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 008e1a58f96cb..a72c2ab240061 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -168,7 +168,7 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
  *
  * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2| 1|0| <- bit number
  * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
- * | OFFSET (14->63) | TYPE (9-13)  |0|0|X|X| X| X|X|SD|0| <- swp entry
+ * | TYPE (59-63) |  OFFSET (9-58)  |0|0|X|X| X| X|X|SD|0| <- swp entry
  *
  * G (8) is aliased and used as a PROT_NONE indicator for
  * !present ptes.  We need to start storing swap entries above
@@ -182,19 +182,28 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
  * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
  * but also L and G.
  */
-#define SWP_TYPE_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
-#define SWP_TYPE_BITS 5
-/* Place the offset above the type: */
-#define SWP_OFFSET_FIRST_BIT (SWP_TYPE_FIRST_BIT + SWP_TYPE_BITS)
+#define SWP_TYPE_BITS		5
+
+#define SWP_OFFSET_FIRST_BIT	(_PAGE_BIT_PROTNONE + 1)
+
+/* We always extract/encode the offset by shifting it all the way up, and then down again */
+#define SWP_OFFSET_SHIFT	(SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS)
 
 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
 
-#define __swp_type(x)			(((x).val >> (SWP_TYPE_FIRST_BIT)) \
-					 & ((1U << SWP_TYPE_BITS) - 1))
-#define __swp_offset(x)			((x).val >> SWP_OFFSET_FIRST_BIT)
-#define __swp_entry(type, offset)	((swp_entry_t) { \
-					 ((type) << (SWP_TYPE_FIRST_BIT)) \
-					 | ((offset) << SWP_OFFSET_FIRST_BIT) })
+/* Extract the high bits for type */
+#define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS))
+
+/* Shift up (to get rid of type), then down to get value */
+#define __swp_offset(x) ((x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)
+
+/*
+ * Shift the offset up "too far" by TYPE bits, then down again
+ */
+#define __swp_entry(type, offset) ((swp_entry_t) { \
+	((unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
+	| ((unsigned long)(type) << (64-SWP_TYPE_BITS)) })
+
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
 #define __swp_entry_to_pte(x)		((pte_t) { .pte = (x).val })
 

From e9304357efc0c50394b1daa4f29082b0cfb0dd42 Mon Sep 17 00:00:00 2001
From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 13 Jun 2018 15:48:23 -0700
Subject: [PATCH 1556/1852] x86/speculation/l1tf: Protect swap entries against
 L1TF

commit 2f22b4cd45b67b3496f4aa4c7180a1271c6452f6 upstream

With L1 terminal fault the CPU speculates into unmapped PTEs, and resulting
side effects allow to read the memory the PTE is pointing too, if its
values are still in the L1 cache.

For swapped out pages Linux uses unmapped PTEs and stores a swap entry into
them.

To protect against L1TF it must be ensured that the swap entry is not
pointing to valid memory, which requires setting higher bits (between bit
36 and bit 45) that are inside the CPUs physical address space, but outside
any real memory.

To do this invert the offset to make sure the higher bits are always set,
as long as the swap file is not too big.

Note there is no workaround for 32bit !PAE, or on systems which have more
than MAX_PA/2 worth of memory. The later case is very unlikely to happen on
real systems.

[AK: updated description and minor tweaks by. Split out from the original
     patch ]

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable_64.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index a72c2ab240061..67f2fe43a5930 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -168,7 +168,7 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
  *
  * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2| 1|0| <- bit number
  * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
- * | TYPE (59-63) |  OFFSET (9-58)  |0|0|X|X| X| X|X|SD|0| <- swp entry
+ * | TYPE (59-63) | ~OFFSET (9-58)  |0|0|X|X| X| X|X|SD|0| <- swp entry
  *
  * G (8) is aliased and used as a PROT_NONE indicator for
  * !present ptes.  We need to start storing swap entries above
@@ -181,6 +181,9 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
  *
  * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
  * but also L and G.
+ *
+ * The offset is inverted by a binary not operation to make the high
+ * physical bits set.
  */
 #define SWP_TYPE_BITS		5
 
@@ -195,13 +198,15 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS))
 
 /* Shift up (to get rid of type), then down to get value */
-#define __swp_offset(x) ((x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)
+#define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)
 
 /*
  * Shift the offset up "too far" by TYPE bits, then down again
+ * The offset is inverted by a binary not operation to make the high
+ * physical bits set.
  */
 #define __swp_entry(type, offset) ((swp_entry_t) { \
-	((unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
+	(~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
 	| ((unsigned long)(type) << (64-SWP_TYPE_BITS)) })
 
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })

From 1391fc7f3561b8af914cbdc21e44c7272564def8 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:24 -0700
Subject: [PATCH 1557/1852] x86/speculation/l1tf: Protect PROT_NONE PTEs
 against speculation

commit 6b28baca9b1f0d4a42b865da7a05b1c81424bd5c upstream

When PTEs are set to PROT_NONE the kernel just clears the Present bit and
preserves the PFN, which creates attack surface for L1TF speculation
speculation attacks.

This is important inside guests, because L1TF speculation bypasses physical
page remapping. While the host has its own migitations preventing leaking
data from other VMs into the guest, this would still risk leaking the wrong
page inside the current guest.

This uses the same technique as Linus' swap entry patch: while an entry is
is in PROTNONE state invert the complete PFN part part of it. This ensures
that the the highest bit will point to non existing memory.

The invert is done by pte/pmd_modify and pfn/pmd/pud_pte for PROTNONE and
pte/pmd/pud_pfn undo it.

This assume that no code path touches the PFN part of a PTE directly
without using these primitives.

This doesn't handle the case that MMIO is on the top of the CPU physical
memory. If such an MMIO region was exposed by an unpriviledged driver for
mmap it would be possible to attack some real memory.  However this
situation is all rather unlikely.

For 32bit non PAE the inversion is not done because there are really not
enough bits to protect anything.

Q: Why does the guest need to be protected when the HyperVisor already has
   L1TF mitigations?

A: Here's an example:

   Physical pages 1 2 get mapped into a guest as
   GPA 1 -> PA 2
   GPA 2 -> PA 1
   through EPT.

   The L1TF speculation ignores the EPT remapping.

   Now the guest kernel maps GPA 1 to process A and GPA 2 to process B, and
   they belong to different users and should be isolated.

   A sets the GPA 1 PA 2 PTE to PROT_NONE to bypass the EPT remapping and
   gets read access to the underlying physical page. Which in this case
   points to PA 2, so it can read process B's data, if it happened to be in
   L1, so isolation inside the guest is broken.

   There's nothing the hypervisor can do about this. This mitigation has to
   be done in the guest itself.

[ tglx: Massaged changelog ]
[ dwmw2: backported to 4.9 ]

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable-2level.h | 17 ++++++++++++
 arch/x86/include/asm/pgtable-3level.h |  2 ++
 arch/x86/include/asm/pgtable-invert.h | 32 ++++++++++++++++++++++
 arch/x86/include/asm/pgtable.h        | 38 +++++++++++++++++++--------
 arch/x86/include/asm/pgtable_64.h     |  2 ++
 5 files changed, 80 insertions(+), 11 deletions(-)
 create mode 100644 arch/x86/include/asm/pgtable-invert.h

diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index fd74a11959de0..89c50332a71ed 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -77,4 +77,21 @@ static inline unsigned long pte_bitop(unsigned long value, unsigned int rightshi
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_low })
 #define __swp_entry_to_pte(x)		((pte_t) { .pte = (x).val })
 
+/* No inverted PFNs on 2 level page tables */
+
+static inline u64 protnone_mask(u64 val)
+{
+	return 0;
+}
+
+static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask)
+{
+	return val;
+}
+
+static inline bool __pte_needs_invert(u64 val)
+{
+	return false;
+}
+
 #endif /* _ASM_X86_PGTABLE_2LEVEL_H */
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index cdaa58c9b39ed..0c89891c7b448 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -184,4 +184,6 @@ static inline pmd_t native_pmdp_get_and_clear(pmd_t *pmdp)
 #define __pte_to_swp_entry(pte)		((swp_entry_t){ (pte).pte_high })
 #define __swp_entry_to_pte(x)		((pte_t){ { .pte_high = (x).val } })
 
+#include <asm/pgtable-invert.h>
+
 #endif /* _ASM_X86_PGTABLE_3LEVEL_H */
diff --git a/arch/x86/include/asm/pgtable-invert.h b/arch/x86/include/asm/pgtable-invert.h
new file mode 100644
index 0000000000000..177564187fc06
--- /dev/null
+++ b/arch/x86/include/asm/pgtable-invert.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_PGTABLE_INVERT_H
+#define _ASM_PGTABLE_INVERT_H 1
+
+#ifndef __ASSEMBLY__
+
+static inline bool __pte_needs_invert(u64 val)
+{
+	return (val & (_PAGE_PRESENT|_PAGE_PROTNONE)) == _PAGE_PROTNONE;
+}
+
+/* Get a mask to xor with the page table entry to get the correct pfn. */
+static inline u64 protnone_mask(u64 val)
+{
+	return __pte_needs_invert(val) ?  ~0ull : 0;
+}
+
+static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask)
+{
+	/*
+	 * When a PTE transitions from NONE to !NONE or vice-versa
+	 * invert the PFN part to stop speculation.
+	 * pte_pfn undoes this when needed.
+	 */
+	if (__pte_needs_invert(oldval) != __pte_needs_invert(val))
+		val = (val & ~mask) | (~val & mask);
+	return val;
+}
+
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 84c62d9500232..2ed1556d99b11 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -148,19 +148,29 @@ static inline int pte_special(pte_t pte)
 	return pte_flags(pte) & _PAGE_SPECIAL;
 }
 
+/* Entries that were set to PROT_NONE are inverted */
+
+static inline u64 protnone_mask(u64 val);
+
 static inline unsigned long pte_pfn(pte_t pte)
 {
-	return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
+	unsigned long pfn = pte_val(pte);
+	pfn ^= protnone_mask(pfn);
+	return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
 }
 
 static inline unsigned long pmd_pfn(pmd_t pmd)
 {
-	return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
+	unsigned long pfn = pmd_val(pmd);
+	pfn ^= protnone_mask(pfn);
+	return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
 }
 
 static inline unsigned long pud_pfn(pud_t pud)
 {
-	return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
+	unsigned long pfn = pud_val(pud);
+	pfn ^= protnone_mask(pfn);
+	return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 }
 
 #define pte_page(pte)	pfn_to_page(pte_pfn(pte))
@@ -359,19 +369,25 @@ static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
 
 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 {
-	return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
-		     massage_pgprot(pgprot));
+	phys_addr_t pfn = page_nr << PAGE_SHIFT;
+	pfn ^= protnone_mask(pgprot_val(pgprot));
+	pfn &= PTE_PFN_MASK;
+	return __pte(pfn | massage_pgprot(pgprot));
 }
 
 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 {
-	return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
-		     massage_pgprot(pgprot));
+	phys_addr_t pfn = page_nr << PAGE_SHIFT;
+	pfn ^= protnone_mask(pgprot_val(pgprot));
+	pfn &= PHYSICAL_PMD_PAGE_MASK;
+	return __pmd(pfn | massage_pgprot(pgprot));
 }
 
+static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
+
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
-	pteval_t val = pte_val(pte);
+	pteval_t val = pte_val(pte), oldval = val;
 
 	/*
 	 * Chop off the NX bit (if present), and add the NX portion of
@@ -379,17 +395,17 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 	 */
 	val &= _PAGE_CHG_MASK;
 	val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
-
+	val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
 	return __pte(val);
 }
 
 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 {
-	pmdval_t val = pmd_val(pmd);
+	pmdval_t val = pmd_val(pmd), oldval = val;
 
 	val &= _HPAGE_CHG_MASK;
 	val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
-
+	val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
 	return __pmd(val);
 }
 
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 67f2fe43a5930..221a32ed13727 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -235,6 +235,8 @@ extern void cleanup_highmap(void);
 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
 
+#include <asm/pgtable-invert.h>
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_X86_PGTABLE_64_H */

From b1aec49999bb464039512d3dea075d962f23be0a Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:25 -0700
Subject: [PATCH 1558/1852] x86/speculation/l1tf: Make sure the first page is
 always reserved

commit 10a70416e1f067f6c4efda6ffd8ea96002ac4223 upstream

The L1TF workaround doesn't make any attempt to mitigate speculate accesses
to the first physical page for zeroed PTEs. Normally it only contains some
data from the early real mode BIOS.

It's not entirely clear that the first page is reserved in all
configurations, so add an extra reservation call to make sure it is really
reserved. In most configurations (e.g.  with the standard reservations)
it's likely a nop.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/setup.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index bbaae4cf9e8ed..31c4bc0d3372c 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -851,6 +851,12 @@ void __init setup_arch(char **cmdline_p)
 	memblock_reserve(__pa_symbol(_text),
 			 (unsigned long)__bss_stop - (unsigned long)_text);
 
+	/*
+	 * Make sure page 0 is always reserved because on systems with
+	 * L1TF its contents can be leaked to user processes.
+	 */
+	memblock_reserve(0, PAGE_SIZE);
+
 	early_reserve_initrd();
 
 	/*

From b794744d2e8525471a126c516e3b1ee2b6e9e71d Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:26 -0700
Subject: [PATCH 1559/1852] x86/speculation/l1tf: Add sysfs reporting for l1tf

commit 17dbca119312b4e8173d4e25ff64262119fcef38 upstream

L1TF core kernel workarounds are cheap and normally always enabled, However
they still should be reported in sysfs if the system is vulnerable or
mitigated. Add the necessary CPU feature/bug bits.

- Extend the existing checks for Meltdowns to determine if the system is
  vulnerable. All CPUs which are not vulnerable to Meltdown are also not
  vulnerable to L1TF

- Check for 32bit non PAE and emit a warning as there is no practical way
  for mitigation due to the limited physical address bits

- If the system has more than MAX_PA/2 physical memory the invert page
  workarounds don't protect the system against the L1TF attack anymore,
  because an inverted physical address will also point to valid
  memory. Print a warning in this case and report that the system is
  vulnerable.

Add a function which returns the PFN limit for the L1TF mitigation, which
will be used in follow up patches for sanity and range checks.

[ tglx: Renamed the CPU feature bit to L1TF_PTEINV ]
[ dwmw2: Backport to 4.9 (cpufeatures.h, E820) ]

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h |  3 ++-
 arch/x86/include/asm/processor.h   |  5 ++++
 arch/x86/kernel/cpu/bugs.c         | 40 ++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/common.c       | 20 +++++++++++++++
 drivers/base/cpu.c                 |  8 ++++++
 include/linux/cpu.h                |  2 ++
 6 files changed, 77 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f4b175db70f4d..f3a8479c0d87c 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -214,7 +214,7 @@
 #define X86_FEATURE_IBPB	( 7*32+26) /* Indirect Branch Prediction Barrier */
 #define X86_FEATURE_STIBP	( 7*32+27) /* Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_ZEN		( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
-
+#define X86_FEATURE_L1TF_PTEINV	( 7*32+29) /* "" L1TF workaround PTE inversion */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */
@@ -331,5 +331,6 @@
 #define X86_BUG_SPECTRE_V1	X86_BUG(15) /* CPU is affected by Spectre variant 1 attack with conditional branches */
 #define X86_BUG_SPECTRE_V2	X86_BUG(16) /* CPU is affected by Spectre variant 2 attack with indirect branches */
 #define X86_BUG_SPEC_STORE_BYPASS X86_BUG(17) /* CPU is affected by speculative store bypass attack */
+#define X86_BUG_L1TF		X86_BUG(18) /* CPU is affected by L1 Terminal Fault */
 
 #endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 8e415cf654574..a3a53955f01c2 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -172,6 +172,11 @@ extern const struct seq_operations cpuinfo_op;
 
 extern void cpu_detect(struct cpuinfo_x86 *c);
 
+static inline unsigned long l1tf_pfn_limit(void)
+{
+	return BIT(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT) - 1;
+}
+
 extern void early_cpu_init(void);
 extern void identify_boot_cpu(void);
 extern void identify_secondary_cpu(struct cpuinfo_x86 *);
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 7688ce0b26c5f..ce8d0abf3d35c 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -26,9 +26,11 @@
 #include <asm/pgtable.h>
 #include <asm/cacheflush.h>
 #include <asm/intel-family.h>
+#include <asm/e820.h>
 
 static void __init spectre_v2_select_mitigation(void);
 static void __init ssb_select_mitigation(void);
+static void __init l1tf_select_mitigation(void);
 
 /*
  * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any
@@ -80,6 +82,8 @@ void __init check_bugs(void)
 	 */
 	ssb_select_mitigation();
 
+	l1tf_select_mitigation();
+
 #ifdef CONFIG_X86_32
 	/*
 	 * Check whether we are able to run this kernel safely on SMP.
@@ -203,6 +207,32 @@ static void x86_amd_ssb_disable(void)
 		wrmsrl(MSR_AMD64_LS_CFG, msrval);
 }
 
+static void __init l1tf_select_mitigation(void)
+{
+	u64 half_pa;
+
+	if (!boot_cpu_has_bug(X86_BUG_L1TF))
+		return;
+
+#if CONFIG_PGTABLE_LEVELS == 2
+	pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
+	return;
+#endif
+
+	/*
+	 * This is extremely unlikely to happen because almost all
+	 * systems have far more MAX_PA/2 than RAM can be fit into
+	 * DIMM slots.
+	 */
+	half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
+	if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) {
+		pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
+		return;
+	}
+
+	setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
+}
+
 #ifdef RETPOLINE
 static bool spectre_v2_bad_module;
 
@@ -655,6 +685,11 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr
 	case X86_BUG_SPEC_STORE_BYPASS:
 		return sprintf(buf, "%s\n", ssb_strings[ssb_mode]);
 
+	case X86_BUG_L1TF:
+		if (boot_cpu_has(X86_FEATURE_L1TF_PTEINV))
+			return sprintf(buf, "Mitigation: Page Table Inversion\n");
+		break;
+
 	default:
 		break;
 	}
@@ -681,4 +716,9 @@ ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *
 {
 	return cpu_show_common(dev, attr, buf, X86_BUG_SPEC_STORE_BYPASS);
 }
+
+ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	return cpu_show_common(dev, attr, buf, X86_BUG_L1TF);
+}
 #endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 3d21b28f98267..4d3fa79c0f09f 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -880,6 +880,21 @@ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
 	{}
 };
 
+static const __initconst struct x86_cpu_id cpu_no_l1tf[] = {
+	/* in addition to cpu_no_speculation */
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_SILVERMONT1	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_SILVERMONT2	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_AIRMONT		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_MERRIFIELD	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_MOOREFIELD	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_GOLDMONT	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_DENVERTON	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_ATOM_GEMINI_LAKE	},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_XEON_PHI_KNL		},
+	{ X86_VENDOR_INTEL,	6,	INTEL_FAM6_XEON_PHI_KNM		},
+	{}
+};
+
 static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
 	u64 ia32_cap = 0;
@@ -905,6 +920,11 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
 		return;
 
 	setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
+
+	if (x86_match_cpu(cpu_no_l1tf))
+		return;
+
+	setup_force_cpu_bug(X86_BUG_L1TF);
 }
 
 /*
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 143edea1076fc..41090ef5facbe 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -524,16 +524,24 @@ ssize_t __weak cpu_show_spec_store_bypass(struct device *dev,
 	return sprintf(buf, "Not affected\n");
 }
 
+ssize_t __weak cpu_show_l1tf(struct device *dev,
+			     struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "Not affected\n");
+}
+
 static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
 static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
 static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL);
 static DEVICE_ATTR(spec_store_bypass, 0444, cpu_show_spec_store_bypass, NULL);
+static DEVICE_ATTR(l1tf, 0444, cpu_show_l1tf, NULL);
 
 static struct attribute *cpu_root_vulnerabilities_attrs[] = {
 	&dev_attr_meltdown.attr,
 	&dev_attr_spectre_v1.attr,
 	&dev_attr_spectre_v2.attr,
 	&dev_attr_spec_store_bypass.attr,
+	&dev_attr_l1tf.attr,
 	NULL
 };
 
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 855dead0539e6..8019ba091a2a9 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -48,6 +48,8 @@ extern ssize_t cpu_show_spectre_v2(struct device *dev,
 				   struct device_attribute *attr, char *buf);
 extern ssize_t cpu_show_spec_store_bypass(struct device *dev,
 					  struct device_attribute *attr, char *buf);
+extern ssize_t cpu_show_l1tf(struct device *dev,
+			     struct device_attribute *attr, char *buf);
 
 extern __printf(4, 5)
 struct device *cpu_device_create(struct device *parent, void *drvdata,

From 988c0e320a49628b4ed5c1e5a75e33c431def725 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Tue, 29 Dec 2015 20:12:20 -0800
Subject: [PATCH 1560/1852] mm: Add vm_insert_pfn_prot()

commit 1745cbc5d0dee0749a6bc0ea8e872c5db0074061 upstream

The x86 vvar vma contains pages with differing cacheability
flags.  x86 currently implements this by manually inserting all
the ptes using (io_)remap_pfn_range when the vma is set up.

x86 wants to move to using .fault with VM_FAULT_NOPAGE to set up
the mappings as needed.  The correct API to use to insert a pfn
in .fault is vm_insert_pfn(), but vm_insert_pfn() can't override the
vma's cache mode, and the HPET page in particular needs to be
uncached despite the fact that the rest of the VMA is cached.

Add vm_insert_pfn_prot() to support varying cacheability within
the same non-COW VMA in a more sane manner.

x86 could alternatively use multiple VMAs, but that's messy,
would break CRIU, and would create unnecessary VMAs that would
waste memory.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/d2938d1eb37be7a5e4f86182db646551f11e45aa.1451446564.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/mm.h |  2 ++
 mm/memory.c        | 25 +++++++++++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/include/linux/mm.h b/include/linux/mm.h
index 6424748733ebc..2c1f1c78e09f1 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -2099,6 +2099,8 @@ int remap_pfn_range(struct vm_area_struct *, unsigned long addr,
 int vm_insert_page(struct vm_area_struct *, unsigned long addr, struct page *);
 int vm_insert_pfn(struct vm_area_struct *vma, unsigned long addr,
 			unsigned long pfn);
+int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
+			unsigned long pfn, pgprot_t pgprot);
 int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
 			unsigned long pfn);
 int vm_iomap_memory(struct vm_area_struct *vma, phys_addr_t start, unsigned long len);
diff --git a/mm/memory.c b/mm/memory.c
index 177cb7d111a96..edb5b0d8a4a08 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1604,9 +1604,30 @@ static int insert_pfn(struct vm_area_struct *vma, unsigned long addr,
  */
 int vm_insert_pfn(struct vm_area_struct *vma, unsigned long addr,
 			unsigned long pfn)
+{
+	return vm_insert_pfn_prot(vma, addr, pfn, vma->vm_page_prot);
+}
+EXPORT_SYMBOL(vm_insert_pfn);
+
+/**
+ * vm_insert_pfn_prot - insert single pfn into user vma with specified pgprot
+ * @vma: user vma to map to
+ * @addr: target user address of this page
+ * @pfn: source kernel pfn
+ * @pgprot: pgprot flags for the inserted page
+ *
+ * This is exactly like vm_insert_pfn, except that it allows drivers to
+ * to override pgprot on a per-page basis.
+ *
+ * This only makes sense for IO mappings, and it makes no sense for
+ * cow mappings.  In general, using multiple vmas is preferable;
+ * vm_insert_pfn_prot should only be used if using multiple VMAs is
+ * impractical.
+ */
+int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
+			unsigned long pfn, pgprot_t pgprot)
 {
 	int ret;
-	pgprot_t pgprot = vma->vm_page_prot;
 	/*
 	 * Technically, architectures with pte_special can avoid all these
 	 * restrictions (same for remap_pfn_range).  However we would like
@@ -1628,7 +1649,7 @@ int vm_insert_pfn(struct vm_area_struct *vma, unsigned long addr,
 
 	return ret;
 }
-EXPORT_SYMBOL(vm_insert_pfn);
+EXPORT_SYMBOL(vm_insert_pfn_prot);
 
 int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
 			unsigned long pfn)

From aef1371ac2de0b9dc3a3d23e1227b15e448f1345 Mon Sep 17 00:00:00 2001
From: Dan Williams <dan.j.williams@intel.com>
Date: Fri, 7 Oct 2016 17:00:18 -0700
Subject: [PATCH 1561/1852] mm: fix cache mode tracking in vm_insert_mixed()

commit 87744ab3832b83ba71b931f86f9cfdb000d07da5 upstream

vm_insert_mixed() unlike vm_insert_pfn_prot() and vmf_insert_pfn_pmd(),
fails to check the pgprot_t it uses for the mapping against the one
recorded in the memtype tracking tree.  Add the missing call to
track_pfn_insert() to preclude cases where incompatible aliased mappings
are established for a given physical address range.

[groeck: Backport to v4.4.y]

Link: http://lkml.kernel.org/r/147328717909.35069.14256589123570653697.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Matthew Wilcox <mawilcox@microsoft.com>
Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/memory.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/mm/memory.c b/mm/memory.c
index edb5b0d8a4a08..78efb8c7ee203 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1654,10 +1654,14 @@ EXPORT_SYMBOL(vm_insert_pfn_prot);
 int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
 			unsigned long pfn)
 {
+	pgprot_t pgprot = vma->vm_page_prot;
+
 	BUG_ON(!(vma->vm_flags & VM_MIXEDMAP));
 
 	if (addr < vma->vm_start || addr >= vma->vm_end)
 		return -EFAULT;
+	if (track_pfn_insert(vma, &pgprot, pfn))
+		return -EINVAL;
 
 	/*
 	 * If we don't have pte special, then we have to use the pfn_valid()
@@ -1670,9 +1674,9 @@ int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
 		struct page *page;
 
 		page = pfn_to_page(pfn);
-		return insert_page(vma, addr, page, vma->vm_page_prot);
+		return insert_page(vma, addr, page, pgprot);
 	}
-	return insert_pfn(vma, addr, pfn, vma->vm_page_prot);
+	return insert_pfn(vma, addr, pfn, pgprot);
 }
 EXPORT_SYMBOL(vm_insert_mixed);
 

From 184817d723a83f5132de84c90f8989fad4919d48 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:27 -0700
Subject: [PATCH 1562/1852] x86/speculation/l1tf: Disallow non privileged high
 MMIO PROT_NONE mappings

commit 42e4089c7890725fcd329999252dc489b72f2921 upstream

For L1TF PROT_NONE mappings are protected by inverting the PFN in the page
table entry. This sets the high bits in the CPU's address space, thus
making sure to point to not point an unmapped entry to valid cached memory.

Some server system BIOSes put the MMIO mappings high up in the physical
address space. If such an high mapping was mapped to unprivileged users
they could attack low memory by setting such a mapping to PROT_NONE. This
could happen through a special device driver which is not access
protected. Normal /dev/mem is of course access protected.

To avoid this forbid PROT_NONE mappings or mprotect for high MMIO mappings.

Valid page mappings are allowed because the system is then unsafe anyways.

It's not expected that users commonly use PROT_NONE on MMIO. But to
minimize any impact this is only enforced if the mapping actually refers to
a high MMIO address (defined as the MAX_PA-1 bit being set), and also skip
the check for root.

For mmaps this is straight forward and can be handled in vm_insert_pfn and
in remap_pfn_range().

For mprotect it's a bit trickier. At the point where the actual PTEs are
accessed a lot of state has been changed and it would be difficult to undo
on an error. Since this is a uncommon case use a separate early page talk
walk pass for MMIO PROT_NONE mappings that checks for this condition
early. For non MMIO and non PROT_NONE there are no changes.

[dwmw2: Backport to 4.9]
[groeck: Backport to 4.4]

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable.h |  8 ++++++
 arch/x86/mm/mmap.c             | 21 +++++++++++++++
 include/asm-generic/pgtable.h  | 12 +++++++++
 mm/memory.c                    | 29 +++++++++++++++-----
 mm/mprotect.c                  | 49 ++++++++++++++++++++++++++++++++++
 5 files changed, 112 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 2ed1556d99b11..70e2248353cbc 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -942,6 +942,14 @@ static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
 }
 #endif
 
+#define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
+extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
+
+static inline bool arch_has_pfn_modify_check(void)
+{
+	return boot_cpu_has_bug(X86_BUG_L1TF);
+}
+
 #include <asm-generic/pgtable.h>
 #endif	/* __ASSEMBLY__ */
 
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index d2dc0438d654a..5aad869fa2058 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -121,3 +121,24 @@ const char *arch_vma_name(struct vm_area_struct *vma)
 		return "[mpx]";
 	return NULL;
 }
+
+/*
+ * Only allow root to set high MMIO mappings to PROT_NONE.
+ * This prevents an unpriv. user to set them to PROT_NONE and invert
+ * them, then pointing to valid memory for L1TF speculation.
+ *
+ * Note: for locked down kernels may want to disable the root override.
+ */
+bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
+{
+	if (!boot_cpu_has_bug(X86_BUG_L1TF))
+		return true;
+	if (!__pte_needs_invert(pgprot_val(prot)))
+		return true;
+	/* If it's real memory always allow */
+	if (pfn_valid(pfn))
+		return true;
+	if (pfn > l1tf_pfn_limit() && !capable(CAP_SYS_ADMIN))
+		return false;
+	return true;
+}
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 25b793325b09c..976f749099efe 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -805,4 +805,16 @@ static inline int pmd_free_pte_page(pmd_t *pmd)
 #define io_remap_pfn_range remap_pfn_range
 #endif
 
+#ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
+static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
+{
+	return true;
+}
+
+static inline bool arch_has_pfn_modify_check(void)
+{
+	return false;
+}
+#endif
+
 #endif /* _ASM_GENERIC_PGTABLE_H */
diff --git a/mm/memory.c b/mm/memory.c
index 78efb8c7ee203..d5bb1465d30c8 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1645,6 +1645,9 @@ int vm_insert_pfn_prot(struct vm_area_struct *vma, unsigned long addr,
 	if (track_pfn_insert(vma, &pgprot, pfn))
 		return -EINVAL;
 
+	if (!pfn_modify_allowed(pfn, pgprot))
+		return -EACCES;
+
 	ret = insert_pfn(vma, addr, pfn, pgprot);
 
 	return ret;
@@ -1663,6 +1666,9 @@ int vm_insert_mixed(struct vm_area_struct *vma, unsigned long addr,
 	if (track_pfn_insert(vma, &pgprot, pfn))
 		return -EINVAL;
 
+	if (!pfn_modify_allowed(pfn, pgprot))
+		return -EACCES;
+
 	/*
 	 * If we don't have pte special, then we have to use the pfn_valid()
 	 * based VM_MIXEDMAP scheme (see vm_normal_page), and thus we *must*
@@ -1691,6 +1697,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd,
 {
 	pte_t *pte;
 	spinlock_t *ptl;
+	int err = 0;
 
 	pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
 	if (!pte)
@@ -1698,12 +1705,16 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd,
 	arch_enter_lazy_mmu_mode();
 	do {
 		BUG_ON(!pte_none(*pte));
+		if (!pfn_modify_allowed(pfn, prot)) {
+			err = -EACCES;
+			break;
+		}
 		set_pte_at(mm, addr, pte, pte_mkspecial(pfn_pte(pfn, prot)));
 		pfn++;
 	} while (pte++, addr += PAGE_SIZE, addr != end);
 	arch_leave_lazy_mmu_mode();
 	pte_unmap_unlock(pte - 1, ptl);
-	return 0;
+	return err;
 }
 
 static inline int remap_pmd_range(struct mm_struct *mm, pud_t *pud,
@@ -1712,6 +1723,7 @@ static inline int remap_pmd_range(struct mm_struct *mm, pud_t *pud,
 {
 	pmd_t *pmd;
 	unsigned long next;
+	int err;
 
 	pfn -= addr >> PAGE_SHIFT;
 	pmd = pmd_alloc(mm, pud, addr);
@@ -1720,9 +1732,10 @@ static inline int remap_pmd_range(struct mm_struct *mm, pud_t *pud,
 	VM_BUG_ON(pmd_trans_huge(*pmd));
 	do {
 		next = pmd_addr_end(addr, end);
-		if (remap_pte_range(mm, pmd, addr, next,
-				pfn + (addr >> PAGE_SHIFT), prot))
-			return -ENOMEM;
+		err = remap_pte_range(mm, pmd, addr, next,
+				pfn + (addr >> PAGE_SHIFT), prot);
+		if (err)
+			return err;
 	} while (pmd++, addr = next, addr != end);
 	return 0;
 }
@@ -1733,6 +1746,7 @@ static inline int remap_pud_range(struct mm_struct *mm, pgd_t *pgd,
 {
 	pud_t *pud;
 	unsigned long next;
+	int err;
 
 	pfn -= addr >> PAGE_SHIFT;
 	pud = pud_alloc(mm, pgd, addr);
@@ -1740,9 +1754,10 @@ static inline int remap_pud_range(struct mm_struct *mm, pgd_t *pgd,
 		return -ENOMEM;
 	do {
 		next = pud_addr_end(addr, end);
-		if (remap_pmd_range(mm, pud, addr, next,
-				pfn + (addr >> PAGE_SHIFT), prot))
-			return -ENOMEM;
+		err = remap_pmd_range(mm, pud, addr, next,
+				pfn + (addr >> PAGE_SHIFT), prot);
+		if (err)
+			return err;
 	} while (pud++, addr = next, addr != end);
 	return 0;
 }
diff --git a/mm/mprotect.c b/mm/mprotect.c
index b8849a3930a08..fcd678c3bd24e 100644
--- a/mm/mprotect.c
+++ b/mm/mprotect.c
@@ -255,6 +255,42 @@ unsigned long change_protection(struct vm_area_struct *vma, unsigned long start,
 	return pages;
 }
 
+static int prot_none_pte_entry(pte_t *pte, unsigned long addr,
+			       unsigned long next, struct mm_walk *walk)
+{
+	return pfn_modify_allowed(pte_pfn(*pte), *(pgprot_t *)(walk->private)) ?
+		0 : -EACCES;
+}
+
+static int prot_none_hugetlb_entry(pte_t *pte, unsigned long hmask,
+				   unsigned long addr, unsigned long next,
+				   struct mm_walk *walk)
+{
+	return pfn_modify_allowed(pte_pfn(*pte), *(pgprot_t *)(walk->private)) ?
+		0 : -EACCES;
+}
+
+static int prot_none_test(unsigned long addr, unsigned long next,
+			  struct mm_walk *walk)
+{
+	return 0;
+}
+
+static int prot_none_walk(struct vm_area_struct *vma, unsigned long start,
+			   unsigned long end, unsigned long newflags)
+{
+	pgprot_t new_pgprot = vm_get_page_prot(newflags);
+	struct mm_walk prot_none_walk = {
+		.pte_entry = prot_none_pte_entry,
+		.hugetlb_entry = prot_none_hugetlb_entry,
+		.test_walk = prot_none_test,
+		.mm = current->mm,
+		.private = &new_pgprot,
+	};
+
+	return walk_page_range(start, end, &prot_none_walk);
+}
+
 int
 mprotect_fixup(struct vm_area_struct *vma, struct vm_area_struct **pprev,
 	unsigned long start, unsigned long end, unsigned long newflags)
@@ -272,6 +308,19 @@ mprotect_fixup(struct vm_area_struct *vma, struct vm_area_struct **pprev,
 		return 0;
 	}
 
+	/*
+	 * Do PROT_NONE PFN permission checks here when we can still
+	 * bail out without undoing a lot of state. This is a rather
+	 * uncommon case, so doesn't need to be very optimized.
+	 */
+	if (arch_has_pfn_modify_check() &&
+	    (vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP)) &&
+	    (newflags & (VM_READ|VM_WRITE|VM_EXEC)) == 0) {
+		error = prot_none_walk(vma, start, end, newflags);
+		if (error)
+			return error;
+	}
+
 	/*
 	 * If we make a private mapping writable we increase our commit;
 	 * but (without finer accounting) cannot reduce our commit if we

From bdd29266f7ac70d83e58b949a7128aa347f60eb1 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Wed, 13 Jun 2018 15:48:28 -0700
Subject: [PATCH 1563/1852] x86/speculation/l1tf: Limit swap file size to
 MAX_PA/2

commit 377eeaa8e11fe815b1d07c81c4a0e2843a8c15eb upstream

For the L1TF workaround its necessary to limit the swap file size to below
MAX_PA/2, so that the higher bits of the swap offset inverted never point
to valid memory.

Add a mechanism for the architecture to override the swap file size check
in swapfile.c and add a x86 specific max swapfile check function that
enforces that limit.

The check is only enabled if the CPU is vulnerable to L1TF.

In VMs with 42bit MAX_PA the typical limit is 2TB now, on a native system
with 46bit PA it is 32TB. The limit is only per individual swap file, so
it's always possible to exceed these limits with multiple swap files or
partitions.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/init.c       | 15 +++++++++++++
 include/linux/swapfile.h |  2 ++
 mm/swapfile.c            | 46 ++++++++++++++++++++++++++--------------
 3 files changed, 47 insertions(+), 16 deletions(-)

diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 151fd33e90433..afde6da2768f2 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -4,6 +4,8 @@
 #include <linux/swap.h>
 #include <linux/memblock.h>
 #include <linux/bootmem.h>	/* for max_low_pfn */
+#include <linux/swapfile.h>
+#include <linux/swapops.h>
 
 #include <asm/cacheflush.h>
 #include <asm/e820.h>
@@ -767,3 +769,16 @@ void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
 	__cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
 	__pte2cachemode_tbl[entry] = cache;
 }
+
+unsigned long max_swapfile_size(void)
+{
+	unsigned long pages;
+
+	pages = generic_max_swapfile_size();
+
+	if (boot_cpu_has_bug(X86_BUG_L1TF)) {
+		/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
+		pages = min_t(unsigned long, l1tf_pfn_limit() + 1, pages);
+	}
+	return pages;
+}
diff --git a/include/linux/swapfile.h b/include/linux/swapfile.h
index 388293a91e8c9..e4594de79bc4c 100644
--- a/include/linux/swapfile.h
+++ b/include/linux/swapfile.h
@@ -9,5 +9,7 @@ extern spinlock_t swap_lock;
 extern struct plist_head swap_active_head;
 extern struct swap_info_struct *swap_info[];
 extern int try_to_unuse(unsigned int, bool, unsigned long);
+extern unsigned long generic_max_swapfile_size(void);
+extern unsigned long max_swapfile_size(void);
 
 #endif /* _LINUX_SWAPFILE_H */
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 80ba8711cd61e..623c77c1327b3 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -2206,6 +2206,35 @@ static int claim_swapfile(struct swap_info_struct *p, struct inode *inode)
 	return 0;
 }
 
+
+/*
+ * Find out how many pages are allowed for a single swap device. There
+ * are two limiting factors:
+ * 1) the number of bits for the swap offset in the swp_entry_t type, and
+ * 2) the number of bits in the swap pte, as defined by the different
+ * architectures.
+ *
+ * In order to find the largest possible bit mask, a swap entry with
+ * swap type 0 and swap offset ~0UL is created, encoded to a swap pte,
+ * decoded to a swp_entry_t again, and finally the swap offset is
+ * extracted.
+ *
+ * This will mask all the bits from the initial ~0UL mask that can't
+ * be encoded in either the swp_entry_t or the architecture definition
+ * of a swap pte.
+ */
+unsigned long generic_max_swapfile_size(void)
+{
+	return swp_offset(pte_to_swp_entry(
+			swp_entry_to_pte(swp_entry(0, ~0UL)))) + 1;
+}
+
+/* Can be overridden by an architecture for additional checks. */
+__weak unsigned long max_swapfile_size(void)
+{
+	return generic_max_swapfile_size();
+}
+
 static unsigned long read_swap_header(struct swap_info_struct *p,
 					union swap_header *swap_header,
 					struct inode *inode)
@@ -2241,22 +2270,7 @@ static unsigned long read_swap_header(struct swap_info_struct *p,
 	p->cluster_next = 1;
 	p->cluster_nr = 0;
 
-	/*
-	 * Find out how many pages are allowed for a single swap
-	 * device. There are two limiting factors: 1) the number
-	 * of bits for the swap offset in the swp_entry_t type, and
-	 * 2) the number of bits in the swap pte as defined by the
-	 * different architectures. In order to find the
-	 * largest possible bit mask, a swap entry with swap type 0
-	 * and swap offset ~0UL is created, encoded to a swap pte,
-	 * decoded to a swp_entry_t again, and finally the swap
-	 * offset is extracted. This will mask all the bits from
-	 * the initial ~0UL mask that can't be encoded in either
-	 * the swp_entry_t or the architecture definition of a
-	 * swap pte.
-	 */
-	maxpages = swp_offset(pte_to_swp_entry(
-			swp_entry_to_pte(swp_entry(0, ~0UL)))) + 1;
+	maxpages = max_swapfile_size();
 	last_page = swap_header->info.last_page;
 	if (!last_page) {
 		pr_warn("Empty swap-file\n");

From dc7a2d74e1ce1cc797a5469ace7a4dd664f1c1a2 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Wed, 20 Jun 2018 16:42:57 -0400
Subject: [PATCH 1564/1852] x86/bugs: Move the l1tf function and define pr_fmt
 properly

commit 56563f53d3066afa9e63d6c997bf67e76a8b05c0 upstream

The pr_warn in l1tf_select_mitigation would have used the prior pr_fmt
which was defined as "Spectre V2 : ".

Move the function to be past SSBD and also define the pr_fmt.

Fixes: 17dbca119312 ("x86/speculation/l1tf: Add sysfs reporting for l1tf")
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 55 ++++++++++++++++++++------------------
 1 file changed, 29 insertions(+), 26 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index ce8d0abf3d35c..34e4aaaf03d28 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -207,32 +207,6 @@ static void x86_amd_ssb_disable(void)
 		wrmsrl(MSR_AMD64_LS_CFG, msrval);
 }
 
-static void __init l1tf_select_mitigation(void)
-{
-	u64 half_pa;
-
-	if (!boot_cpu_has_bug(X86_BUG_L1TF))
-		return;
-
-#if CONFIG_PGTABLE_LEVELS == 2
-	pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
-	return;
-#endif
-
-	/*
-	 * This is extremely unlikely to happen because almost all
-	 * systems have far more MAX_PA/2 than RAM can be fit into
-	 * DIMM slots.
-	 */
-	half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
-	if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) {
-		pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
-		return;
-	}
-
-	setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
-}
-
 #ifdef RETPOLINE
 static bool spectre_v2_bad_module;
 
@@ -658,6 +632,35 @@ void x86_spec_ctrl_setup_ap(void)
 		x86_amd_ssb_disable();
 }
 
+#undef pr_fmt
+#define pr_fmt(fmt)	"L1TF: " fmt
+static void __init l1tf_select_mitigation(void)
+{
+	u64 half_pa;
+
+	if (!boot_cpu_has_bug(X86_BUG_L1TF))
+		return;
+
+#if CONFIG_PGTABLE_LEVELS == 2
+	pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
+	return;
+#endif
+
+	/*
+	 * This is extremely unlikely to happen because almost all
+	 * systems have far more MAX_PA/2 than RAM can be fit into
+	 * DIMM slots.
+	 */
+	half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
+	if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) {
+		pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
+		return;
+	}
+
+	setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
+}
+#undef pr_fmt
+
 #ifdef CONFIG_SYSFS
 
 static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,

From 8acc6ab10c905471b29e544414fd2922be39a781 Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Thu, 21 Jun 2018 12:36:29 +0200
Subject: [PATCH 1565/1852] x86/speculation/l1tf: Extend 64bit swap file size
 limit

commit 1a7ed1ba4bba6c075d5ad61bb75e3fbc870840d6 upstream

The previous patch has limited swap file size so that large offsets cannot
clear bits above MAX_PA/2 in the pte and interfere with L1TF mitigation.

It assumed that offsets are encoded starting with bit 12, same as pfn. But
on x86_64, offsets are encoded starting with bit 9.

Thus the limit can be raised by 3 bits. That means 16TB with 42bit MAX_PA
and 256TB with 46bit MAX_PA.

Fixes: 377eeaa8e11f ("x86/speculation/l1tf: Limit swap file size to MAX_PA/2")
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/init.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index afde6da2768f2..8de904926d7fd 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -778,7 +778,15 @@ unsigned long max_swapfile_size(void)
 
 	if (boot_cpu_has_bug(X86_BUG_L1TF)) {
 		/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
-		pages = min_t(unsigned long, l1tf_pfn_limit() + 1, pages);
+		unsigned long l1tf_limit = l1tf_pfn_limit() + 1;
+		/*
+		 * We encode swap offsets also with 3 bits below those for pfn
+		 * which makes the usable limit higher.
+		 */
+#ifdef CONFIG_X86_64
+		l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
+#endif
+		pages = min_t(unsigned long, l1tf_limit, pages);
 	}
 	return pages;
 }

From eeb9743882f6d8f8c888ad2343dd926f2a727e42 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Date: Wed, 20 Jun 2018 16:42:58 -0400
Subject: [PATCH 1566/1852] x86/cpufeatures: Add detection of L1D cache flush
 support.

commit 11e34e64e4103955fc4568750914c75d65ea87ee upstream

336996-Speculative-Execution-Side-Channel-Mitigations.pdf defines a new MSR
(IA32_FLUSH_CMD) which is detected by CPUID.7.EDX[28]=1 bit being set.

This new MSR "gives software a way to invalidate structures with finer
granularity than other architectual methods like WBINVD."

A copy of this document is available at
  https://bugzilla.kernel.org/show_bug.cgi?id=199511

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f3a8479c0d87c..123a7105db1bf 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -310,6 +310,7 @@
 #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
 #define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
 #define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_FLUSH_L1D		(18*32+28) /* Flush L1D cache */
 #define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
 #define X86_FEATURE_SPEC_CTRL_SSBD	(18*32+31) /* "" Speculative Store Bypass Disable */
 

From 7947e14a3d5dff9fbd2ea488b7d346af920f3b73 Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Fri, 22 Jun 2018 17:39:33 +0200
Subject: [PATCH 1567/1852] x86/speculation/l1tf: Protect PAE swap entries
 against L1TF

commit 0d0f6249058834ffe1ceaad0bb31464af66f6e7a upstream

The PAE 3-level paging code currently doesn't mitigate L1TF by flipping the
offset bits, and uses the high PTE word, thus bits 32-36 for type, 37-63 for
offset. The lower word is zeroed, thus systems with less than 4GB memory are
safe. With 4GB to 128GB the swap type selects the memory locations vulnerable
to L1TF; with even more memory, also the swap offfset influences the address.
This might be a problem with 32bit PAE guests running on large 64bit hosts.

By continuing to keep the whole swap entry in either high or low 32bit word of
PTE we would limit the swap size too much. Thus this patch uses the whole PAE
PTE with the same layout as the 64bit version does. The macros just become a
bit tricky since they assume the arch-dependent swp_entry_t to be 32bit.

Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable-3level.h | 35 +++++++++++++++++++++++++--
 arch/x86/mm/init.c                    |  2 +-
 2 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 0c89891c7b448..5c686382d84ba 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -177,12 +177,43 @@ static inline pmd_t native_pmdp_get_and_clear(pmd_t *pmdp)
 #endif
 
 /* Encode and de-code a swap entry */
+#define SWP_TYPE_BITS		5
+
+#define SWP_OFFSET_FIRST_BIT	(_PAGE_BIT_PROTNONE + 1)
+
+/* We always extract/encode the offset by shifting it all the way up, and then down again */
+#define SWP_OFFSET_SHIFT	(SWP_OFFSET_FIRST_BIT + SWP_TYPE_BITS)
+
 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > 5)
 #define __swp_type(x)			(((x).val) & 0x1f)
 #define __swp_offset(x)			((x).val >> 5)
 #define __swp_entry(type, offset)	((swp_entry_t){(type) | (offset) << 5})
-#define __pte_to_swp_entry(pte)		((swp_entry_t){ (pte).pte_high })
-#define __swp_entry_to_pte(x)		((pte_t){ { .pte_high = (x).val } })
+
+/*
+ * Normally, __swp_entry() converts from arch-independent swp_entry_t to
+ * arch-dependent swp_entry_t, and __swp_entry_to_pte() just stores the result
+ * to pte. But here we have 32bit swp_entry_t and 64bit pte, and need to use the
+ * whole 64 bits. Thus, we shift the "real" arch-dependent conversion to
+ * __swp_entry_to_pte() through the following helper macro based on 64bit
+ * __swp_entry().
+ */
+#define __swp_pteval_entry(type, offset) ((pteval_t) { \
+	(~(pteval_t)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
+	| ((pteval_t)(type) << (64 - SWP_TYPE_BITS)) })
+
+#define __swp_entry_to_pte(x)	((pte_t){ .pte = \
+		__swp_pteval_entry(__swp_type(x), __swp_offset(x)) })
+/*
+ * Analogically, __pte_to_swp_entry() doesn't just extract the arch-dependent
+ * swp_entry_t, but also has to convert it from 64bit to the 32bit
+ * intermediate representation, using the following macros based on 64bit
+ * __swp_type() and __swp_offset().
+ */
+#define __pteval_swp_type(x) ((unsigned long)((x).pte >> (64 - SWP_TYPE_BITS)))
+#define __pteval_swp_offset(x) ((unsigned long)(~((x).pte) << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT))
+
+#define __pte_to_swp_entry(pte)	(__swp_entry(__pteval_swp_type(pte), \
+					     __pteval_swp_offset(pte)))
 
 #include <asm/pgtable-invert.h>
 
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 8de904926d7fd..3a8e9abe06673 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -783,7 +783,7 @@ unsigned long max_swapfile_size(void)
 		 * We encode swap offsets also with 3 bits below those for pfn
 		 * which makes the usable limit higher.
 		 */
-#ifdef CONFIG_X86_64
+#if CONFIG_PGTABLE_LEVELS > 2
 		l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
 #endif
 		pages = min_t(unsigned long, l1tf_limit, pages);

From 7c6dbc5889eabe9c609fdddb0eaa185266a3b14e Mon Sep 17 00:00:00 2001
From: Michal Hocko <mhocko@suse.cz>
Date: Wed, 27 Jun 2018 17:46:50 +0200
Subject: [PATCH 1568/1852] x86/speculation/l1tf: Fix up pte->pfn conversion
 for PAE

commit e14d7dfb41f5807a0c1c26a13f2b8ef16af24935 upstream

Jan has noticed that pte_pfn and co. resp. pfn_pte are incorrect for
CONFIG_PAE because phys_addr_t is wider than unsigned long and so the
pte_val reps. shift left would get truncated. Fix this up by using proper
types.

[dwmw2: Backport to 4.9]

Fixes: 6b28baca9b1f ("x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation")
Reported-by: Jan Beulich <JBeulich@suse.com>
Signed-off-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 70e2248353cbc..16c6886a1ecea 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -154,21 +154,21 @@ static inline u64 protnone_mask(u64 val);
 
 static inline unsigned long pte_pfn(pte_t pte)
 {
-	unsigned long pfn = pte_val(pte);
+	phys_addr_t pfn = pte_val(pte);
 	pfn ^= protnone_mask(pfn);
 	return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
 }
 
 static inline unsigned long pmd_pfn(pmd_t pmd)
 {
-	unsigned long pfn = pmd_val(pmd);
+	phys_addr_t pfn = pmd_val(pmd);
 	pfn ^= protnone_mask(pfn);
 	return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
 }
 
 static inline unsigned long pud_pfn(pud_t pud)
 {
-	unsigned long pfn = pud_val(pud);
+	phys_addr_t pfn = pud_val(pud);
 	pfn ^= protnone_mask(pfn);
 	return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 }
@@ -369,7 +369,7 @@ static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
 
 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 {
-	phys_addr_t pfn = page_nr << PAGE_SHIFT;
+	phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 	pfn ^= protnone_mask(pgprot_val(pgprot));
 	pfn &= PTE_PFN_MASK;
 	return __pte(pfn | massage_pgprot(pgprot));
@@ -377,7 +377,7 @@ static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 
 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 {
-	phys_addr_t pfn = page_nr << PAGE_SHIFT;
+	phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 	pfn ^= protnone_mask(pgprot_val(pgprot));
 	pfn &= PHYSICAL_PMD_PAGE_MASK;
 	return __pmd(pfn | massage_pgprot(pgprot));

From 1bcab24850c974d0a0ffd7d11d6b47214eaed48b Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Tue, 7 Aug 2018 15:09:36 -0700
Subject: [PATCH 1569/1852] x86/speculation/l1tf: Invert all not present
 mappings

commit f22cc87f6c1f771b57c407555cfefd811cdd9507 upstream

For kernel mappings PAGE_PROTNONE is not necessarily set for a non present
mapping, but the inversion logic explicitely checks for !PRESENT and
PROT_NONE.

Remove the PROT_NONE check and make the inversion unconditional for all not
present mappings.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable-invert.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/pgtable-invert.h b/arch/x86/include/asm/pgtable-invert.h
index 177564187fc06..44b1203ece12a 100644
--- a/arch/x86/include/asm/pgtable-invert.h
+++ b/arch/x86/include/asm/pgtable-invert.h
@@ -6,7 +6,7 @@
 
 static inline bool __pte_needs_invert(u64 val)
 {
-	return (val & (_PAGE_PRESENT|_PAGE_PROTNONE)) == _PAGE_PROTNONE;
+	return !(val & _PAGE_PRESENT);
 }
 
 /* Get a mask to xor with the page table entry to get the correct pfn. */

From 6e0c97ea4de03faeb8fa6198862dd3c583e50f5d Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Tue, 7 Aug 2018 15:09:37 -0700
Subject: [PATCH 1570/1852] x86/speculation/l1tf: Make pmd/pud_mknotpresent()
 invert

commit 0768f91530ff46683e0b372df14fd79fe8d156e5 upstream

Some cases in THP like:
  - MADV_FREE
  - mprotect
  - split

mark the PMD non present for temporarily to prevent races. The window for
an L1TF attack in these contexts is very small, but it wants to be fixed
for correctness sake.

Use the proper low level functions for pmd/pud_mknotpresent() to address
this.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 16c6886a1ecea..b5e157c065ae1 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -315,11 +315,6 @@ static inline pmd_t pmd_mkwrite(pmd_t pmd)
 	return pmd_set_flags(pmd, _PAGE_RW);
 }
 
-static inline pmd_t pmd_mknotpresent(pmd_t pmd)
-{
-	return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
-}
-
 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
 static inline int pte_soft_dirty(pte_t pte)
 {
@@ -383,6 +378,12 @@ static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 	return __pmd(pfn | massage_pgprot(pgprot));
 }
 
+static inline pmd_t pmd_mknotpresent(pmd_t pmd)
+{
+	return pfn_pmd(pmd_pfn(pmd),
+		       __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
+}
+
 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)

From e3b2bf37082da9c5614ae36a9b2fb65889673693 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Tue, 7 Aug 2018 15:09:39 -0700
Subject: [PATCH 1571/1852] x86/mm/pat: Make set_memory_np() L1TF safe

commit 958f79b9ee55dfaf00c8106ed1c22a2919e0028b upstream

set_memory_np() is used to mark kernel mappings not present, but it has
it's own open coded mechanism which does not have the L1TF protection of
inverting the address bits.

Replace the open coded PTE manipulation with the L1TF protecting low level
PTE routines.

Passes the CPA self test.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
[ dwmw2: Pull in pud_mkhuge() from commit a00cc7d9dd, and pfn_pud() ]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
[groeck: port to 4.4]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable.h | 27 +++++++++++++++++++++++++++
 arch/x86/mm/pageattr.c         |  8 ++++----
 2 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index b5e157c065ae1..4de6c282c02ae 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -378,12 +378,39 @@ static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 	return __pmd(pfn | massage_pgprot(pgprot));
 }
 
+static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
+{
+	phys_addr_t pfn = page_nr << PAGE_SHIFT;
+	pfn ^= protnone_mask(pgprot_val(pgprot));
+	pfn &= PHYSICAL_PUD_PAGE_MASK;
+	return __pud(pfn | massage_pgprot(pgprot));
+}
+
 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
 {
 	return pfn_pmd(pmd_pfn(pmd),
 		       __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
 }
 
+static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
+{
+	pudval_t v = native_pud_val(pud);
+
+	return __pud(v | set);
+}
+
+static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
+{
+	pudval_t v = native_pud_val(pud);
+
+	return __pud(v & ~clear);
+}
+
+static inline pud_t pud_mkhuge(pud_t pud)
+{
+	return pud_set_flags(pud, _PAGE_PSE);
+}
+
 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index ac9c7797b6326..53bd895576ccc 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1006,8 +1006,8 @@ static int populate_pmd(struct cpa_data *cpa,
 
 		pmd = pmd_offset(pud, start);
 
-		set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
-				   massage_pgprot(pmd_pgprot)));
+		set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
+					canon_pgprot(pmd_pgprot))));
 
 		start	  += PMD_SIZE;
 		cpa->pfn  += PMD_SIZE;
@@ -1079,8 +1079,8 @@ static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
 	 * Map everything starting from the Gb boundary, possibly with 1G pages
 	 */
 	while (end - start >= PUD_SIZE) {
-		set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
-				   massage_pgprot(pud_pgprot)));
+		set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
+				   canon_pgprot(pud_pgprot))));
 
 		start	  += PUD_SIZE;
 		cpa->pfn  += PUD_SIZE;

From 1e12632c4f482dd7b0d77d65bd94e1f706b25e5a Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Tue, 7 Aug 2018 15:09:38 -0700
Subject: [PATCH 1572/1852] x86/mm/kmmio: Make the tracer robust against L1TF

commit 1063711b57393c1999248cccb57bebfaf16739e7 upstream

The mmio tracer sets io mapping PTEs and PMDs to non present when enabled
without inverting the address bits, which makes the PTE entry vulnerable
for L1TF.

Make it use the right low level macros to actually invert the address bits
to protect against L1TF.

In principle this could be avoided because MMIO tracing is not likely to be
enabled on production machines, but the fix is straigt forward and for
consistency sake it's better to get rid of the open coded PTE manipulation.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/kmmio.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 76604c8a2a487..7bf14e74fc8f1 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -125,24 +125,29 @@ static struct kmmio_fault_page *get_kmmio_fault_page(unsigned long addr)
 
 static void clear_pmd_presence(pmd_t *pmd, bool clear, pmdval_t *old)
 {
+	pmd_t new_pmd;
 	pmdval_t v = pmd_val(*pmd);
 	if (clear) {
-		*old = v & _PAGE_PRESENT;
-		v &= ~_PAGE_PRESENT;
-	} else	/* presume this has been called with clear==true previously */
-		v |= *old;
-	set_pmd(pmd, __pmd(v));
+		*old = v;
+		new_pmd = pmd_mknotpresent(*pmd);
+	} else {
+		/* Presume this has been called with clear==true previously */
+		new_pmd = __pmd(*old);
+	}
+	set_pmd(pmd, new_pmd);
 }
 
 static void clear_pte_presence(pte_t *pte, bool clear, pteval_t *old)
 {
 	pteval_t v = pte_val(*pte);
 	if (clear) {
-		*old = v & _PAGE_PRESENT;
-		v &= ~_PAGE_PRESENT;
-	} else	/* presume this has been called with clear==true previously */
-		v |= *old;
-	set_pte_atomic(pte, __pte(v));
+		*old = v;
+		/* Nothing should care about address */
+		pte_clear(&init_mm, 0, pte);
+	} else {
+		/* Presume this has been called with clear==true previously */
+		set_pte_atomic(pte, __pte(*old));
+	}
 }
 
 static int clear_page_presence(struct kmmio_fault_page *f, bool clear)

From 4b1dedc7641752cdf43e67f4118656973dda455d Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Mon, 13 Aug 2018 10:15:16 -0700
Subject: [PATCH 1573/1852] x86/speculation/l1tf: Fix up CPU feature flags

In linux-4.4.y, the definition of X86_FEATURE_RETPOLINE and
X86_FEATURE_RETPOLINE_AMD is different from the upstream
definition. Result is an overlap with the newly introduced
X86_FEATURE_L1TF_PTEINV. Update RETPOLINE definitions to match
upstream definitions to improve alignment with upstream code.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/cpufeatures.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 123a7105db1bf..dd2269dcbc470 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -193,12 +193,12 @@
 #define X86_FEATURE_HW_PSTATE	( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
 
+#define X86_FEATURE_RETPOLINE	( 7*32+12) /* "" Generic Retpoline mitigation for Spectre variant 2 */
+#define X86_FEATURE_RETPOLINE_AMD ( 7*32+13) /* "" AMD Retpoline mitigation for Spectre variant 2 */
+
 #define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
 #define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* "" Fill RSB on context switches */
 
-#define X86_FEATURE_RETPOLINE	( 7*32+29) /* "" Generic Retpoline mitigation for Spectre variant 2 */
-#define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* "" AMD Retpoline mitigation for Spectre variant 2 */
-
 #define X86_FEATURE_MSR_SPEC_CTRL ( 7*32+16) /* "" MSR SPEC_CTRL is implemented */
 #define X86_FEATURE_SSBD	( 7*32+17) /* Speculative Store Bypass Disable */
 

From ac57958448f435890e03059ff8071bcc96b86c1b Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Tue, 14 Aug 2018 20:50:47 +0200
Subject: [PATCH 1574/1852] x86/init: fix build with CONFIG_SWAP=n

commit 792adb90fa724ce07c0171cbc96b9215af4b1045 upstream.

The introduction of generic_max_swapfile_size and arch-specific versions has
broken linking on x86 with CONFIG_SWAP=n due to undefined reference to
'generic_max_swapfile_size'. Fix it by compiling the x86-specific
max_swapfile_size() only with CONFIG_SWAP=y.

Reported-by: Tomas Pruzina <pruzinat@gmail.com>
Fixes: 377eeaa8e11f ("x86/speculation/l1tf: Limit swap file size to MAX_PA/2")
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/init.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 3a8e9abe06673..4954a6cef50ad 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -770,6 +770,7 @@ void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
 	__pte2cachemode_tbl[entry] = cache;
 }
 
+#ifdef CONFIG_SWAP
 unsigned long max_swapfile_size(void)
 {
 	unsigned long pages;
@@ -790,3 +791,4 @@ unsigned long max_swapfile_size(void)
 	}
 	return pages;
 }
+#endif

From cfcb4f935d1117810a4899368fddc220194c8ed2 Mon Sep 17 00:00:00 2001
From: Jiri Kosina <jkosina@suse.cz>
Date: Sat, 14 Jul 2018 21:56:13 +0200
Subject: [PATCH 1575/1852] x86/speculation/l1tf: Unbreak
 !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures

commit 6c26fcd2abfe0a56bbd95271fce02df2896cfd24 upstream.

pfn_modify_allowed() and arch_has_pfn_modify_check() are outside of the
!__ASSEMBLY__ section in include/asm-generic/pgtable.h, which confuses
assembler on archs that don't have __HAVE_ARCH_PFN_MODIFY_ALLOWED (e.g.
ia64) and breaks build:

    include/asm-generic/pgtable.h: Assembler messages:
    include/asm-generic/pgtable.h:538: Error: Unknown opcode `static inline bool pfn_modify_allowed(unsigned long pfn,pgprot_t prot)'
    include/asm-generic/pgtable.h:540: Error: Unknown opcode `return true'
    include/asm-generic/pgtable.h:543: Error: Unknown opcode `static inline bool arch_has_pfn_modify_check(void)'
    include/asm-generic/pgtable.h:545: Error: Unknown opcode `return false'
    arch/ia64/kernel/entry.S:69: Error: `mov' does not fit into bundle

Move those two static inlines into the !__ASSEMBLY__ section so that they
don't confuse the asm build pass.

Fixes: 42e4089c7890 ("x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings")
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[groeck: Context changes]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 include/asm-generic/pgtable.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 976f749099efe..dabecb661264c 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -799,12 +799,6 @@ static inline int pmd_free_pte_page(pmd_t *pmd)
 }
 #endif	/* CONFIG_HAVE_ARCH_HUGE_VMAP */
 
-#endif /* !__ASSEMBLY__ */
-
-#ifndef io_remap_pfn_range
-#define io_remap_pfn_range remap_pfn_range
-#endif
-
 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
 {
@@ -815,6 +809,12 @@ static inline bool arch_has_pfn_modify_check(void)
 {
 	return false;
 }
+#endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
+
+#endif /* !__ASSEMBLY__ */
+
+#ifndef io_remap_pfn_range
+#define io_remap_pfn_range remap_pfn_range
 #endif
 
 #endif /* _ASM_GENERIC_PGTABLE_H */

From dd1447f76550c6b8a6b79da6b5348b84d646fdb1 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 15 Aug 2018 17:42:11 +0200
Subject: [PATCH 1576/1852] Linux 4.4.148

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 17800a851be85..51b83a8b95e27 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 147
+SUBLEVEL = 148
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From c6657b52cf0cfbcbb459b072871d0ee4fb10ece7 Mon Sep 17 00:00:00 2001
From: Toshi Kani <toshi.kani@hpe.com>
Date: Wed, 27 Jun 2018 08:13:46 -0600
Subject: [PATCH 1577/1852] x86/mm: Disable ioremap free page handling on
 x86-PAE

commit f967db0b9ed44ec3057a28f3b28efc51df51b835 upstream.

ioremap() supports pmd mappings on x86-PAE.  However, kernel's pmd
tables are not shared among processes on x86-PAE.  Therefore, any
update to sync'd pmd entries need re-syncing.  Freeing a pte page
also leads to a vmalloc fault and hits the BUG_ON in vmalloc_sync_one().

Disable free page handling on x86-PAE.  pud_free_pmd_page() and
pmd_free_pte_page() simply return 0 if a given pud/pmd entry is present.
This assures that ioremap() does not update sync'd pmd entries at the
cost of falling back to pte mappings.

Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces")
Reported-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Toshi Kani <toshi.kani@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: mhocko@suse.com
Cc: akpm@linux-foundation.org
Cc: hpa@zytor.com
Cc: cpandya@codeaurora.org
Cc: linux-mm@kvack.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: stable@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20180627141348.21777-2-toshi.kani@hpe.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/pgtable.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 08e94b6139ab6..8e0378a00d50d 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -676,6 +676,7 @@ int pmd_clear_huge(pmd_t *pmd)
 	return 0;
 }
 
+#ifdef CONFIG_X86_64
 /**
  * pud_free_pmd_page - Clear pud entry and free pmd page.
  * @pud: Pointer to a PUD.
@@ -723,4 +724,22 @@ int pmd_free_pte_page(pmd_t *pmd)
 
 	return 1;
 }
+
+#else /* !CONFIG_X86_64 */
+
+int pud_free_pmd_page(pud_t *pud)
+{
+	return pud_none(*pud);
+}
+
+/*
+ * Disable free page handling on x86-PAE. This assures that ioremap()
+ * does not update sync'd pmd entries. See vmalloc_sync_one().
+ */
+int pmd_free_pte_page(pmd_t *pmd)
+{
+	return pmd_none(*pmd);
+}
+
+#endif /* CONFIG_X86_64 */
 #endif	/* CONFIG_HAVE_ARCH_HUGE_VMAP */

From 22ceddd6f5d644807c5c88da1bcc3ddd27781e4b Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 15 Aug 2018 11:58:46 +0200
Subject: [PATCH 1578/1852] tcp: Fix missing range_truesize enlargement in the
 backport

The 4.4.y stable backport dc6ae4dffd65 for the upstream commit
3d4bf93ac120 ("tcp: detect malicious patterns in
tcp_collapse_ofo_queue()") missed a line that enlarges the
range_truesize value, which broke the whole check.

Fixes: dc6ae4dffd65 ("tcp: detect malicious patterns in tcp_collapse_ofo_queue()")
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Cc: Michal Kubecek <mkubecek@suse.cz>
---
 net/ipv4/tcp_input.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index e0a8c751f8b88..569cd35d3ab4f 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4836,6 +4836,7 @@ static void tcp_collapse_ofo_queue(struct sock *sk)
 			end = TCP_SKB_CB(skb)->end_seq;
 			range_truesize = skb->truesize;
 		} else {
+			range_truesize += skb->truesize;
 			if (before(TCP_SKB_CB(skb)->seq, start))
 				start = TCP_SKB_CB(skb)->seq;
 			if (after(TCP_SKB_CB(skb)->end_seq, end))

From 0a827ced7de580e6ac9d6b213b7ef8f1ca03e7e1 Mon Sep 17 00:00:00 2001
From: Andrey Konovalov <andreyknvl@google.com>
Date: Tue, 6 Feb 2018 15:36:00 -0800
Subject: [PATCH 1579/1852] kasan: don't emit builtin calls when sanitization
 is off

commit 0e410e158e5baa1300bdf678cea4f4e0cf9d8b94 upstream.

With KASAN enabled the kernel has two different memset() functions, one
with KASAN checks (memset) and one without (__memset).  KASAN uses some
macro tricks to use the proper version where required.  For example
memset() calls in mm/slub.c are without KASAN checks, since they operate
on poisoned slab object metadata.

The issue is that clang emits memset() calls even when there is no
memset() in the source code.  They get linked with improper memset()
implementation and the kernel fails to boot due to a huge amount of KASAN
reports during early boot stages.

The solution is to add -fno-builtin flag for files with KASAN_SANITIZE :=
n marker.

Link: http://lkml.kernel.org/r/8ffecfffe04088c52c42b92739c2bd8a0bcb3f5e.1516384594.git.andreyknvl@google.com
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
[ Nick : Backported to 4.4 avoiding KUBSAN ]
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Makefile               | 4 +++-
 scripts/Makefile.kasan | 3 +++
 scripts/Makefile.lib   | 2 +-
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 51b83a8b95e27..96a1720f7fe4b 100644
--- a/Makefile
+++ b/Makefile
@@ -442,7 +442,9 @@ export MAKE AWK GENKSYMS INSTALLKERNEL PERL PYTHON UTS_MACHINE
 export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS
 
 export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS LDFLAGS
-export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE CFLAGS_GCOV CFLAGS_KCOV CFLAGS_KASAN
+export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE CFLAGS_GCOV
+export CFLAGS_KASAN CFLAGS_KASAN_NOSANITIZE
+export CFLAGS_KCOV
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
diff --git a/scripts/Makefile.kasan b/scripts/Makefile.kasan
index 37323b0df374b..2624d4bf9a454 100644
--- a/scripts/Makefile.kasan
+++ b/scripts/Makefile.kasan
@@ -28,4 +28,7 @@ else
         CFLAGS_KASAN := $(CFLAGS_KASAN_MINIMAL)
     endif
 endif
+
+CFLAGS_KASAN_NOSANITIZE := -fno-builtin
+
 endif
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index d697b0e16d021..3fb2aaa004110 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -126,7 +126,7 @@ endif
 ifeq ($(CONFIG_KASAN),y)
 _c_flags += $(if $(patsubst n%,, \
 		$(KASAN_SANITIZE_$(basetarget).o)$(KASAN_SANITIZE)y), \
-		$(CFLAGS_KASAN))
+		$(CFLAGS_KASAN), $(CFLAGS_KASAN_NOSANITIZE))
 endif
 
 ifeq ($(CONFIG_KCOV),y)

From 8d64a40cbce2241e50f6374d3e39b2fa00ab79f4 Mon Sep 17 00:00:00 2001
From: Liwei Song <liwei.song@windriver.com>
Date: Tue, 13 Jun 2017 00:59:53 -0400
Subject: [PATCH 1580/1852] i2c: ismt: fix wrong device address when unmap the
 data buffer

commit 17e83549e199d89aace7788a9f11c108671eecf5 upstream.

Fix the following kernel bug:

kernel BUG at drivers/iommu/intel-iommu.c:3260!
invalid opcode: 0000 [#5] PREEMPT SMP
Hardware name: Intel Corp. Harcuvar/Server, BIOS HAVLCRB0.X64.0013.D39.1608311820 08/31/2016
task: ffff880175389950 ti: ffff880176bec000 task.ti: ffff880176bec000
RIP: 0010:[<ffffffff8150a83b>]  [<ffffffff8150a83b>] intel_unmap+0x25b/0x260
RSP: 0018:ffff880176bef5e8  EFLAGS: 00010296
RAX: 0000000000000024 RBX: ffff8800773c7c88 RCX: 000000000000ce04
RDX: 0000000080000000 RSI: 0000000000000000 RDI: 0000000000000009
RBP: ffff880176bef638 R08: 0000000000000010 R09: 0000000000000004
R10: ffff880175389c78 R11: 0000000000000a4f R12: ffff8800773c7868
R13: 00000000ffffac88 R14: ffff8800773c7818 R15: 0000000000000001
FS:  00007fef21258700(0000) GS:ffff88017b5c0000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 000000000066d6d8 CR3: 000000007118c000 CR4: 00000000003406e0
Stack:
 00000000ffffac88 ffffffff8199867f ffff880176bef5f8 ffff880100000030
 ffff880176bef668 ffff8800773c7c88 ffff880178288098 ffff8800772c0010
 ffff8800773c7818 0000000000000001 ffff880176bef648 ffffffff8150a86e
Call Trace:
 [<ffffffff8199867f>] ? printk+0x46/0x48
 [<ffffffff8150a86e>] intel_unmap_page+0xe/0x10
 [<ffffffffa039d99b>] ismt_access+0x27b/0x8fa [i2c_ismt]
 [<ffffffff81554420>] ? __pm_runtime_suspend+0xa0/0xa0
 [<ffffffff815544a0>] ? pm_suspend_timer_fn+0x80/0x80
 [<ffffffff81554420>] ? __pm_runtime_suspend+0xa0/0xa0
 [<ffffffff815544a0>] ? pm_suspend_timer_fn+0x80/0x80
 [<ffffffff8143dfd0>] ? pci_bus_read_dev_vendor_id+0xf0/0xf0
 [<ffffffff8172b36c>] i2c_smbus_xfer+0xec/0x4b0
 [<ffffffff810aa4d5>] ? vprintk_emit+0x345/0x530
 [<ffffffffa038936b>] i2cdev_ioctl_smbus+0x12b/0x240 [i2c_dev]
 [<ffffffff810aa829>] ? vprintk_default+0x29/0x40
 [<ffffffffa0389b33>] i2cdev_ioctl+0x63/0x1ec [i2c_dev]
 [<ffffffff811b04c8>] do_vfs_ioctl+0x328/0x5d0
 [<ffffffff8119d8ec>] ? vfs_write+0x11c/0x190
 [<ffffffff8109d449>] ? rt_up_read+0x19/0x20
 [<ffffffff811b07f1>] SyS_ioctl+0x81/0xa0
 [<ffffffff819a351b>] system_call_fastpath+0x16/0x6e

This happen When run "i2cdetect -y 0" detect SMBus iSMT adapter.

After finished I2C block read/write, when unmap the data buffer,
a wrong device address was pass to dma_unmap_single().

To fix this, give dma_unmap_single() the "dev" parameter, just like
what dma_map_single() does, then unmap can find the right devices.

Fixes: 13f35ac14cd0 ("i2c: Adding support for Intel iSMT SMBus 2.0 host controller")
Signed-off-by: Liwei Song <liwei.song@windriver.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-ismt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c
index 1111cb966a443..fa2b58142cded 100644
--- a/drivers/i2c/busses/i2c-ismt.c
+++ b/drivers/i2c/busses/i2c-ismt.c
@@ -587,7 +587,7 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 
 	/* unmap the data buffer */
 	if (dma_size != 0)
-		dma_unmap_single(&adap->dev, dma_addr, dma_size, dma_direction);
+		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
 
 	if (unlikely(!time_left)) {
 		dev_err(dev, "completion wait timed out\n");

From b3708de2c0938fb01f689ed0b18683458a10b407 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Sun, 1 Jul 2018 19:46:06 -0700
Subject: [PATCH 1581/1852] kbuild: verify that $DEPMOD is installed

commit 934193a654c1f4d0643ddbf4b2529b508cae926e upstream.

Verify that 'depmod' ($DEPMOD) is installed.
This is a partial revert of commit 620c231c7a7f
("kbuild: do not check for ancient modutils tools").

Also update Documentation/process/changes.rst to refer to
kmod instead of module-init-tools.

Fixes kernel bugzilla #198965:
https://bugzilla.kernel.org/show_bug.cgi?id=198965

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Cc: Lucas De Marchi <lucas.de.marchi@gmail.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: Jessica Yu <jeyu@kernel.org>
Cc: Chih-Wei Huang <cwhuang@linux.org.tw>
Cc: stable@vger.kernel.org # any kernel since 2012
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/Changes | 17 ++++++-----------
 scripts/depmod.sh     |  8 +++++++-
 2 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/Documentation/Changes b/Documentation/Changes
index ec97b77c8b007..f25649ffb8929 100644
--- a/Documentation/Changes
+++ b/Documentation/Changes
@@ -25,7 +25,7 @@ o  GNU C                  3.2                     # gcc --version
 o  GNU make               3.80                    # make --version
 o  binutils               2.12                    # ld -v
 o  util-linux             2.10o                   # fdformat --version
-o  module-init-tools      0.9.10                  # depmod -V
+o  kmod                   13                      # depmod -V
 o  e2fsprogs              1.41.4                  # e2fsck -V
 o  jfsutils               1.1.3                   # fsck.jfs -V
 o  reiserfsprogs          3.6.3                   # reiserfsck -V
@@ -132,12 +132,6 @@ is not build with CONFIG_KALLSYMS and you have no way to rebuild and
 reproduce the Oops with that option, then you can still decode that Oops
 with ksymoops.
 
-Module-Init-Tools
------------------
-
-A new module loader is now in the kernel that requires module-init-tools
-to use.  It is backward compatible with the 2.4.x series kernels.
-
 Mkinitrd
 --------
 
@@ -319,14 +313,15 @@ Util-linux
 ----------
 o  <ftp://ftp.kernel.org/pub/linux/utils/util-linux/>
 
+Kmod
+----
+o  <https://www.kernel.org/pub/linux/utils/kernel/kmod/>
+o  <https://git.kernel.org/pub/scm/utils/kernel/kmod/kmod.git>
+
 Ksymoops
 --------
 o  <ftp://ftp.kernel.org/pub/linux/utils/kernel/ksymoops/v2.4/>
 
-Module-Init-Tools
------------------
-o  <ftp://ftp.kernel.org/pub/linux/kernel/people/rusty/modules/>
-
 Mkinitrd
 --------
 o  <https://code.launchpad.net/initrd-tools/main>
diff --git a/scripts/depmod.sh b/scripts/depmod.sh
index 122599b1c13b7..ea1e96921e3be 100755
--- a/scripts/depmod.sh
+++ b/scripts/depmod.sh
@@ -10,10 +10,16 @@ DEPMOD=$1
 KERNELRELEASE=$2
 SYMBOL_PREFIX=$3
 
-if ! test -r System.map -a -x "$DEPMOD"; then
+if ! test -r System.map ; then
 	exit 0
 fi
 
+if [ -z $(command -v $DEPMOD) ]; then
+	echo "'make modules_install' requires $DEPMOD. Please install it." >&2
+	echo "This is probably in the kmod package." >&2
+	exit 1
+fi
+
 # older versions of depmod don't support -P <symbol-prefix>
 # support was added in module-init-tools 3.13
 if test -n "$SYMBOL_PREFIX"; then

From 0b2ab6dfd18ee5b51c1c47ad355c147e064451ab Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 18 Jun 2018 10:22:37 -0700
Subject: [PATCH 1582/1852] crypto: vmac - require a block cipher with 128-bit
 block size

commit 73bf20ef3df262026c3470241ae4ac8196943ffa upstream.

The VMAC template assumes the block cipher has a 128-bit block size, but
it failed to check for that.  Thus it was possible to instantiate it
using a 64-bit block size cipher, e.g. "vmac(cast5)", causing
uninitialized memory to be used.

Add the needed check when instantiating the template.

Fixes: f1939f7c5645 ("crypto: vmac - New hash algorithm for intel_txt support")
Cc: <stable@vger.kernel.org> # v2.6.32+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/vmac.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/crypto/vmac.c b/crypto/vmac.c
index df76a816cfb22..3034454a37133 100644
--- a/crypto/vmac.c
+++ b/crypto/vmac.c
@@ -655,6 +655,10 @@ static int vmac_create(struct crypto_template *tmpl, struct rtattr **tb)
 	if (IS_ERR(alg))
 		return PTR_ERR(alg);
 
+	err = -EINVAL;
+	if (alg->cra_blocksize != 16)
+		goto out_put_alg;
+
 	inst = shash_alloc_instance("vmac", alg);
 	err = PTR_ERR(inst);
 	if (IS_ERR(inst))

From 919ae6004442b55fa6e17d9c81a01eba9f8ab1cd Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 18 Jun 2018 10:22:38 -0700
Subject: [PATCH 1583/1852] crypto: vmac - separate tfm and request context

commit bb29648102335586e9a66289a1d98a0cb392b6e5 upstream.

syzbot reported a crash in vmac_final() when multiple threads
concurrently use the same "vmac(aes)" transform through AF_ALG.  The bug
is pretty fundamental: the VMAC template doesn't separate per-request
state from per-tfm (per-key) state like the other hash algorithms do,
but rather stores it all in the tfm context.  That's wrong.

Also, vmac_final() incorrectly zeroes most of the state including the
derived keys and cached pseudorandom pad.  Therefore, only the first
VMAC invocation with a given key calculates the correct digest.

Fix these bugs by splitting the per-tfm state from the per-request state
and using the proper init/update/final sequencing for requests.

Reproducer for the crash:

    #include <linux/if_alg.h>
    #include <sys/socket.h>
    #include <unistd.h>

    int main()
    {
            int fd;
            struct sockaddr_alg addr = {
                    .salg_type = "hash",
                    .salg_name = "vmac(aes)",
            };
            char buf[256] = { 0 };

            fd = socket(AF_ALG, SOCK_SEQPACKET, 0);
            bind(fd, (void *)&addr, sizeof(addr));
            setsockopt(fd, SOL_ALG, ALG_SET_KEY, buf, 16);
            fork();
            fd = accept(fd, NULL, NULL);
            for (;;)
                    write(fd, buf, 256);
    }

The immediate cause of the crash is that vmac_ctx_t.partial_size exceeds
VMAC_NHBYTES, causing vmac_final() to memset() a negative length.

Reported-by: syzbot+264bca3a6e8d645550d3@syzkaller.appspotmail.com
Fixes: f1939f7c5645 ("crypto: vmac - New hash algorithm for intel_txt support")
Cc: <stable@vger.kernel.org> # v2.6.32+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/vmac.c         | 408 +++++++++++++++++++-----------------------
 include/crypto/vmac.h |  63 -------
 2 files changed, 181 insertions(+), 290 deletions(-)
 delete mode 100644 include/crypto/vmac.h

diff --git a/crypto/vmac.c b/crypto/vmac.c
index 3034454a37133..bb2fc787d6156 100644
--- a/crypto/vmac.c
+++ b/crypto/vmac.c
@@ -1,6 +1,10 @@
 /*
- * Modified to interface to the Linux kernel
+ * VMAC: Message Authentication Code using Universal Hashing
+ *
+ * Reference: https://tools.ietf.org/html/draft-krovetz-vmac-01
+ *
  * Copyright (c) 2009, Intel Corporation.
+ * Copyright (c) 2018, Google Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -16,14 +20,15 @@
  * Place - Suite 330, Boston, MA 02111-1307 USA.
  */
 
-/* --------------------------------------------------------------------------
- * VMAC and VHASH Implementation by Ted Krovetz (tdk@acm.org) and Wei Dai.
- * This implementation is herby placed in the public domain.
- * The authors offers no warranty. Use at your own risk.
- * Please send bug reports to the authors.
- * Last modified: 17 APR 08, 1700 PDT
- * ----------------------------------------------------------------------- */
+/*
+ * Derived from:
+ *	VMAC and VHASH Implementation by Ted Krovetz (tdk@acm.org) and Wei Dai.
+ *	This implementation is herby placed in the public domain.
+ *	The authors offers no warranty. Use at your own risk.
+ *	Last modified: 17 APR 08, 1700 PDT
+ */
 
+#include <asm/unaligned.h>
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/crypto.h>
@@ -31,9 +36,35 @@
 #include <linux/scatterlist.h>
 #include <asm/byteorder.h>
 #include <crypto/scatterwalk.h>
-#include <crypto/vmac.h>
 #include <crypto/internal/hash.h>
 
+/*
+ * User definable settings.
+ */
+#define VMAC_TAG_LEN	64
+#define VMAC_KEY_SIZE	128/* Must be 128, 192 or 256			*/
+#define VMAC_KEY_LEN	(VMAC_KEY_SIZE/8)
+#define VMAC_NHBYTES	128/* Must 2^i for any 3 < i < 13 Standard = 128*/
+
+/* per-transform (per-key) context */
+struct vmac_tfm_ctx {
+	struct crypto_cipher *cipher;
+	u64 nhkey[(VMAC_NHBYTES/8)+2*(VMAC_TAG_LEN/64-1)];
+	u64 polykey[2*VMAC_TAG_LEN/64];
+	u64 l3key[2*VMAC_TAG_LEN/64];
+};
+
+/* per-request context */
+struct vmac_desc_ctx {
+	union {
+		u8 partial[VMAC_NHBYTES];	/* partial block */
+		__le64 partial_words[VMAC_NHBYTES / 8];
+	};
+	unsigned int partial_size;	/* size of the partial block */
+	bool first_block_processed;
+	u64 polytmp[2*VMAC_TAG_LEN/64];	/* running total of L2-hash */
+};
+
 /*
  * Constants and masks
  */
@@ -318,13 +349,6 @@ static void poly_step_func(u64 *ahi, u64 *alo,
 	} while (0)
 #endif
 
-static void vhash_abort(struct vmac_ctx *ctx)
-{
-	ctx->polytmp[0] = ctx->polykey[0] ;
-	ctx->polytmp[1] = ctx->polykey[1] ;
-	ctx->first_block_processed = 0;
-}
-
 static u64 l3hash(u64 p1, u64 p2, u64 k1, u64 k2, u64 len)
 {
 	u64 rh, rl, t, z = 0;
@@ -364,280 +388,209 @@ static u64 l3hash(u64 p1, u64 p2, u64 k1, u64 k2, u64 len)
 	return rl;
 }
 
-static void vhash_update(const unsigned char *m,
-			unsigned int mbytes, /* Pos multiple of VMAC_NHBYTES */
-			struct vmac_ctx *ctx)
+/* L1 and L2-hash one or more VMAC_NHBYTES-byte blocks */
+static void vhash_blocks(const struct vmac_tfm_ctx *tctx,
+			 struct vmac_desc_ctx *dctx,
+			 const __le64 *mptr, unsigned int blocks)
 {
-	u64 rh, rl, *mptr;
-	const u64 *kptr = (u64 *)ctx->nhkey;
-	int i;
-	u64 ch, cl;
-	u64 pkh = ctx->polykey[0];
-	u64 pkl = ctx->polykey[1];
-
-	if (!mbytes)
-		return;
-
-	BUG_ON(mbytes % VMAC_NHBYTES);
-
-	mptr = (u64 *)m;
-	i = mbytes / VMAC_NHBYTES;  /* Must be non-zero */
-
-	ch = ctx->polytmp[0];
-	cl = ctx->polytmp[1];
-
-	if (!ctx->first_block_processed) {
-		ctx->first_block_processed = 1;
+	const u64 *kptr = tctx->nhkey;
+	const u64 pkh = tctx->polykey[0];
+	const u64 pkl = tctx->polykey[1];
+	u64 ch = dctx->polytmp[0];
+	u64 cl = dctx->polytmp[1];
+	u64 rh, rl;
+
+	if (!dctx->first_block_processed) {
+		dctx->first_block_processed = true;
 		nh_vmac_nhbytes(mptr, kptr, VMAC_NHBYTES/8, rh, rl);
 		rh &= m62;
 		ADD128(ch, cl, rh, rl);
 		mptr += (VMAC_NHBYTES/sizeof(u64));
-		i--;
+		blocks--;
 	}
 
-	while (i--) {
+	while (blocks--) {
 		nh_vmac_nhbytes(mptr, kptr, VMAC_NHBYTES/8, rh, rl);
 		rh &= m62;
 		poly_step(ch, cl, pkh, pkl, rh, rl);
 		mptr += (VMAC_NHBYTES/sizeof(u64));
 	}
 
-	ctx->polytmp[0] = ch;
-	ctx->polytmp[1] = cl;
+	dctx->polytmp[0] = ch;
+	dctx->polytmp[1] = cl;
 }
 
-static u64 vhash(unsigned char m[], unsigned int mbytes,
-			u64 *tagl, struct vmac_ctx *ctx)
+static int vmac_setkey(struct crypto_shash *tfm,
+		       const u8 *key, unsigned int keylen)
 {
-	u64 rh, rl, *mptr;
-	const u64 *kptr = (u64 *)ctx->nhkey;
-	int i, remaining;
-	u64 ch, cl;
-	u64 pkh = ctx->polykey[0];
-	u64 pkl = ctx->polykey[1];
-
-	mptr = (u64 *)m;
-	i = mbytes / VMAC_NHBYTES;
-	remaining = mbytes % VMAC_NHBYTES;
-
-	if (ctx->first_block_processed) {
-		ch = ctx->polytmp[0];
-		cl = ctx->polytmp[1];
-	} else if (i) {
-		nh_vmac_nhbytes(mptr, kptr, VMAC_NHBYTES/8, ch, cl);
-		ch &= m62;
-		ADD128(ch, cl, pkh, pkl);
-		mptr += (VMAC_NHBYTES/sizeof(u64));
-		i--;
-	} else if (remaining) {
-		nh_16(mptr, kptr, 2*((remaining+15)/16), ch, cl);
-		ch &= m62;
-		ADD128(ch, cl, pkh, pkl);
-		mptr += (VMAC_NHBYTES/sizeof(u64));
-		goto do_l3;
-	} else {/* Empty String */
-		ch = pkh; cl = pkl;
-		goto do_l3;
-	}
-
-	while (i--) {
-		nh_vmac_nhbytes(mptr, kptr, VMAC_NHBYTES/8, rh, rl);
-		rh &= m62;
-		poly_step(ch, cl, pkh, pkl, rh, rl);
-		mptr += (VMAC_NHBYTES/sizeof(u64));
-	}
-	if (remaining) {
-		nh_16(mptr, kptr, 2*((remaining+15)/16), rh, rl);
-		rh &= m62;
-		poly_step(ch, cl, pkh, pkl, rh, rl);
-	}
-
-do_l3:
-	vhash_abort(ctx);
-	remaining *= 8;
-	return l3hash(ch, cl, ctx->l3key[0], ctx->l3key[1], remaining);
-}
+	struct vmac_tfm_ctx *tctx = crypto_shash_ctx(tfm);
+	__be64 out[2];
+	u8 in[16] = { 0 };
+	unsigned int i;
+	int err;
 
-static u64 vmac(unsigned char m[], unsigned int mbytes,
-			const unsigned char n[16], u64 *tagl,
-			struct vmac_ctx_t *ctx)
-{
-	u64 *in_n, *out_p;
-	u64 p, h;
-	int i;
-
-	in_n = ctx->__vmac_ctx.cached_nonce;
-	out_p = ctx->__vmac_ctx.cached_aes;
-
-	i = n[15] & 1;
-	if ((*(u64 *)(n+8) != in_n[1]) || (*(u64 *)(n) != in_n[0])) {
-		in_n[0] = *(u64 *)(n);
-		in_n[1] = *(u64 *)(n+8);
-		((unsigned char *)in_n)[15] &= 0xFE;
-		crypto_cipher_encrypt_one(ctx->child,
-			(unsigned char *)out_p, (unsigned char *)in_n);
-
-		((unsigned char *)in_n)[15] |= (unsigned char)(1-i);
+	if (keylen != VMAC_KEY_LEN) {
+		crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+		return -EINVAL;
 	}
-	p = be64_to_cpup(out_p + i);
-	h = vhash(m, mbytes, (u64 *)0, &ctx->__vmac_ctx);
-	return le64_to_cpu(p + h);
-}
 
-static int vmac_set_key(unsigned char user_key[], struct vmac_ctx_t *ctx)
-{
-	u64 in[2] = {0}, out[2];
-	unsigned i;
-	int err = 0;
-
-	err = crypto_cipher_setkey(ctx->child, user_key, VMAC_KEY_LEN);
+	err = crypto_cipher_setkey(tctx->cipher, key, keylen);
 	if (err)
 		return err;
 
 	/* Fill nh key */
-	((unsigned char *)in)[0] = 0x80;
-	for (i = 0; i < sizeof(ctx->__vmac_ctx.nhkey)/8; i += 2) {
-		crypto_cipher_encrypt_one(ctx->child,
-			(unsigned char *)out, (unsigned char *)in);
-		ctx->__vmac_ctx.nhkey[i] = be64_to_cpup(out);
-		ctx->__vmac_ctx.nhkey[i+1] = be64_to_cpup(out+1);
-		((unsigned char *)in)[15] += 1;
+	in[0] = 0x80;
+	for (i = 0; i < ARRAY_SIZE(tctx->nhkey); i += 2) {
+		crypto_cipher_encrypt_one(tctx->cipher, (u8 *)out, in);
+		tctx->nhkey[i] = be64_to_cpu(out[0]);
+		tctx->nhkey[i+1] = be64_to_cpu(out[1]);
+		in[15]++;
 	}
 
 	/* Fill poly key */
-	((unsigned char *)in)[0] = 0xC0;
-	in[1] = 0;
-	for (i = 0; i < sizeof(ctx->__vmac_ctx.polykey)/8; i += 2) {
-		crypto_cipher_encrypt_one(ctx->child,
-			(unsigned char *)out, (unsigned char *)in);
-		ctx->__vmac_ctx.polytmp[i] =
-			ctx->__vmac_ctx.polykey[i] =
-				be64_to_cpup(out) & mpoly;
-		ctx->__vmac_ctx.polytmp[i+1] =
-			ctx->__vmac_ctx.polykey[i+1] =
-				be64_to_cpup(out+1) & mpoly;
-		((unsigned char *)in)[15] += 1;
+	in[0] = 0xC0;
+	in[15] = 0;
+	for (i = 0; i < ARRAY_SIZE(tctx->polykey); i += 2) {
+		crypto_cipher_encrypt_one(tctx->cipher, (u8 *)out, in);
+		tctx->polykey[i] = be64_to_cpu(out[0]) & mpoly;
+		tctx->polykey[i+1] = be64_to_cpu(out[1]) & mpoly;
+		in[15]++;
 	}
 
 	/* Fill ip key */
-	((unsigned char *)in)[0] = 0xE0;
-	in[1] = 0;
-	for (i = 0; i < sizeof(ctx->__vmac_ctx.l3key)/8; i += 2) {
+	in[0] = 0xE0;
+	in[15] = 0;
+	for (i = 0; i < ARRAY_SIZE(tctx->l3key); i += 2) {
 		do {
-			crypto_cipher_encrypt_one(ctx->child,
-				(unsigned char *)out, (unsigned char *)in);
-			ctx->__vmac_ctx.l3key[i] = be64_to_cpup(out);
-			ctx->__vmac_ctx.l3key[i+1] = be64_to_cpup(out+1);
-			((unsigned char *)in)[15] += 1;
-		} while (ctx->__vmac_ctx.l3key[i] >= p64
-			|| ctx->__vmac_ctx.l3key[i+1] >= p64);
+			crypto_cipher_encrypt_one(tctx->cipher, (u8 *)out, in);
+			tctx->l3key[i] = be64_to_cpu(out[0]);
+			tctx->l3key[i+1] = be64_to_cpu(out[1]);
+			in[15]++;
+		} while (tctx->l3key[i] >= p64 || tctx->l3key[i+1] >= p64);
 	}
 
-	/* Invalidate nonce/aes cache and reset other elements */
-	ctx->__vmac_ctx.cached_nonce[0] = (u64)-1; /* Ensure illegal nonce */
-	ctx->__vmac_ctx.cached_nonce[1] = (u64)0;  /* Ensure illegal nonce */
-	ctx->__vmac_ctx.first_block_processed = 0;
-
-	return err;
+	return 0;
 }
 
-static int vmac_setkey(struct crypto_shash *parent,
-		const u8 *key, unsigned int keylen)
+static int vmac_init(struct shash_desc *desc)
 {
-	struct vmac_ctx_t *ctx = crypto_shash_ctx(parent);
-
-	if (keylen != VMAC_KEY_LEN) {
-		crypto_shash_set_flags(parent, CRYPTO_TFM_RES_BAD_KEY_LEN);
-		return -EINVAL;
-	}
-
-	return vmac_set_key((u8 *)key, ctx);
-}
+	const struct vmac_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm);
+	struct vmac_desc_ctx *dctx = shash_desc_ctx(desc);
 
-static int vmac_init(struct shash_desc *pdesc)
-{
+	dctx->partial_size = 0;
+	dctx->first_block_processed = false;
+	memcpy(dctx->polytmp, tctx->polykey, sizeof(dctx->polytmp));
 	return 0;
 }
 
-static int vmac_update(struct shash_desc *pdesc, const u8 *p,
-		unsigned int len)
+static int vmac_update(struct shash_desc *desc, const u8 *p, unsigned int len)
 {
-	struct crypto_shash *parent = pdesc->tfm;
-	struct vmac_ctx_t *ctx = crypto_shash_ctx(parent);
-	int expand;
-	int min;
-
-	expand = VMAC_NHBYTES - ctx->partial_size > 0 ?
-			VMAC_NHBYTES - ctx->partial_size : 0;
-
-	min = len < expand ? len : expand;
-
-	memcpy(ctx->partial + ctx->partial_size, p, min);
-	ctx->partial_size += min;
-
-	if (len < expand)
-		return 0;
-
-	vhash_update(ctx->partial, VMAC_NHBYTES, &ctx->__vmac_ctx);
-	ctx->partial_size = 0;
-
-	len -= expand;
-	p += expand;
+	const struct vmac_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm);
+	struct vmac_desc_ctx *dctx = shash_desc_ctx(desc);
+	unsigned int n;
+
+	if (dctx->partial_size) {
+		n = min(len, VMAC_NHBYTES - dctx->partial_size);
+		memcpy(&dctx->partial[dctx->partial_size], p, n);
+		dctx->partial_size += n;
+		p += n;
+		len -= n;
+		if (dctx->partial_size == VMAC_NHBYTES) {
+			vhash_blocks(tctx, dctx, dctx->partial_words, 1);
+			dctx->partial_size = 0;
+		}
+	}
 
-	if (len % VMAC_NHBYTES) {
-		memcpy(ctx->partial, p + len - (len % VMAC_NHBYTES),
-			len % VMAC_NHBYTES);
-		ctx->partial_size = len % VMAC_NHBYTES;
+	if (len >= VMAC_NHBYTES) {
+		n = round_down(len, VMAC_NHBYTES);
+		/* TODO: 'p' may be misaligned here */
+		vhash_blocks(tctx, dctx, (const __le64 *)p, n / VMAC_NHBYTES);
+		p += n;
+		len -= n;
 	}
 
-	vhash_update(p, len - len % VMAC_NHBYTES, &ctx->__vmac_ctx);
+	if (len) {
+		memcpy(dctx->partial, p, len);
+		dctx->partial_size = len;
+	}
 
 	return 0;
 }
 
-static int vmac_final(struct shash_desc *pdesc, u8 *out)
+static u64 vhash_final(const struct vmac_tfm_ctx *tctx,
+		       struct vmac_desc_ctx *dctx)
 {
-	struct crypto_shash *parent = pdesc->tfm;
-	struct vmac_ctx_t *ctx = crypto_shash_ctx(parent);
-	vmac_t mac;
-	u8 nonce[16] = {};
-
-	/* vmac() ends up accessing outside the array bounds that
-	 * we specify.  In appears to access up to the next 2-word
-	 * boundary.  We'll just be uber cautious and zero the
-	 * unwritten bytes in the buffer.
-	 */
-	if (ctx->partial_size) {
-		memset(ctx->partial + ctx->partial_size, 0,
-			VMAC_NHBYTES - ctx->partial_size);
+	unsigned int partial = dctx->partial_size;
+	u64 ch = dctx->polytmp[0];
+	u64 cl = dctx->polytmp[1];
+
+	/* L1 and L2-hash the final block if needed */
+	if (partial) {
+		/* Zero-pad to next 128-bit boundary */
+		unsigned int n = round_up(partial, 16);
+		u64 rh, rl;
+
+		memset(&dctx->partial[partial], 0, n - partial);
+		nh_16(dctx->partial_words, tctx->nhkey, n / 8, rh, rl);
+		rh &= m62;
+		if (dctx->first_block_processed)
+			poly_step(ch, cl, tctx->polykey[0], tctx->polykey[1],
+				  rh, rl);
+		else
+			ADD128(ch, cl, rh, rl);
 	}
-	mac = vmac(ctx->partial, ctx->partial_size, nonce, NULL, ctx);
-	memcpy(out, &mac, sizeof(vmac_t));
-	memzero_explicit(&mac, sizeof(vmac_t));
-	memset(&ctx->__vmac_ctx, 0, sizeof(struct vmac_ctx));
-	ctx->partial_size = 0;
+
+	/* L3-hash the 128-bit output of L2-hash */
+	return l3hash(ch, cl, tctx->l3key[0], tctx->l3key[1], partial * 8);
+}
+
+static int vmac_final(struct shash_desc *desc, u8 *out)
+{
+	const struct vmac_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm);
+	struct vmac_desc_ctx *dctx = shash_desc_ctx(desc);
+	static const u8 nonce[16] = {}; /* TODO: this is insecure */
+	union {
+		u8 bytes[16];
+		__be64 pads[2];
+	} block;
+	int index;
+	u64 hash, pad;
+
+	/* Finish calculating the VHASH of the message */
+	hash = vhash_final(tctx, dctx);
+
+	/* Generate pseudorandom pad by encrypting the nonce */
+	memcpy(&block, nonce, 16);
+	index = block.bytes[15] & 1;
+	block.bytes[15] &= ~1;
+	crypto_cipher_encrypt_one(tctx->cipher, block.bytes, block.bytes);
+	pad = be64_to_cpu(block.pads[index]);
+
+	/* The VMAC is the sum of VHASH and the pseudorandom pad */
+	put_unaligned_le64(hash + pad, out);
 	return 0;
 }
 
 static int vmac_init_tfm(struct crypto_tfm *tfm)
 {
-	struct crypto_cipher *cipher;
-	struct crypto_instance *inst = (void *)tfm->__crt_alg;
+	struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
 	struct crypto_spawn *spawn = crypto_instance_ctx(inst);
-	struct vmac_ctx_t *ctx = crypto_tfm_ctx(tfm);
+	struct vmac_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
+	struct crypto_cipher *cipher;
 
 	cipher = crypto_spawn_cipher(spawn);
 	if (IS_ERR(cipher))
 		return PTR_ERR(cipher);
 
-	ctx->child = cipher;
+	tctx->cipher = cipher;
 	return 0;
 }
 
 static void vmac_exit_tfm(struct crypto_tfm *tfm)
 {
-	struct vmac_ctx_t *ctx = crypto_tfm_ctx(tfm);
-	crypto_free_cipher(ctx->child);
+	struct vmac_tfm_ctx *tctx = crypto_tfm_ctx(tfm);
+
+	crypto_free_cipher(tctx->cipher);
 }
 
 static int vmac_create(struct crypto_template *tmpl, struct rtattr **tb)
@@ -674,11 +627,12 @@ static int vmac_create(struct crypto_template *tmpl, struct rtattr **tb)
 	inst->alg.base.cra_blocksize = alg->cra_blocksize;
 	inst->alg.base.cra_alignmask = alg->cra_alignmask;
 
-	inst->alg.digestsize = sizeof(vmac_t);
-	inst->alg.base.cra_ctxsize = sizeof(struct vmac_ctx_t);
+	inst->alg.base.cra_ctxsize = sizeof(struct vmac_tfm_ctx);
 	inst->alg.base.cra_init = vmac_init_tfm;
 	inst->alg.base.cra_exit = vmac_exit_tfm;
 
+	inst->alg.descsize = sizeof(struct vmac_desc_ctx);
+	inst->alg.digestsize = VMAC_TAG_LEN / 8;
 	inst->alg.init = vmac_init;
 	inst->alg.update = vmac_update;
 	inst->alg.final = vmac_final;
diff --git a/include/crypto/vmac.h b/include/crypto/vmac.h
deleted file mode 100644
index 6b700c7b2fe1c..0000000000000
--- a/include/crypto/vmac.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Modified to interface to the Linux kernel
- * Copyright (c) 2009, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place - Suite 330, Boston, MA 02111-1307 USA.
- */
-
-#ifndef __CRYPTO_VMAC_H
-#define __CRYPTO_VMAC_H
-
-/* --------------------------------------------------------------------------
- * VMAC and VHASH Implementation by Ted Krovetz (tdk@acm.org) and Wei Dai.
- * This implementation is herby placed in the public domain.
- * The authors offers no warranty. Use at your own risk.
- * Please send bug reports to the authors.
- * Last modified: 17 APR 08, 1700 PDT
- * ----------------------------------------------------------------------- */
-
-/*
- * User definable settings.
- */
-#define VMAC_TAG_LEN	64
-#define VMAC_KEY_SIZE	128/* Must be 128, 192 or 256			*/
-#define VMAC_KEY_LEN	(VMAC_KEY_SIZE/8)
-#define VMAC_NHBYTES	128/* Must 2^i for any 3 < i < 13 Standard = 128*/
-
-/*
- * This implementation uses u32 and u64 as names for unsigned 32-
- * and 64-bit integer types. These are defined in C99 stdint.h. The
- * following may need adaptation if you are not running a C99 or
- * Microsoft C environment.
- */
-struct vmac_ctx {
-	u64 nhkey[(VMAC_NHBYTES/8)+2*(VMAC_TAG_LEN/64-1)];
-	u64 polykey[2*VMAC_TAG_LEN/64];
-	u64 l3key[2*VMAC_TAG_LEN/64];
-	u64 polytmp[2*VMAC_TAG_LEN/64];
-	u64 cached_nonce[2];
-	u64 cached_aes[2];
-	int first_block_processed;
-};
-
-typedef u64 vmac_t;
-
-struct vmac_ctx_t {
-	struct crypto_cipher *child;
-	struct vmac_ctx __vmac_ctx;
-	u8 partial[VMAC_NHBYTES];	/* partial block */
-	int partial_size;		/* size of the partial block */
-};
-
-#endif /* __CRYPTO_VMAC_H */

From 574dbef687b6d32f2afe2e2d15ec1ac7821c5b2a Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 23 Jul 2018 10:54:57 -0700
Subject: [PATCH 1584/1852] crypto: blkcipher - fix crash flushing dcache in
 error path

commit 0868def3e4100591e7a1fdbf3eed1439cc8f7ca3 upstream.

Like the skcipher_walk case:

scatterwalk_done() is only meant to be called after a nonzero number of
bytes have been processed, since scatterwalk_pagedone() will flush the
dcache of the *previous* page.  But in the error case of
blkcipher_walk_done(), e.g. if the input wasn't an integer number of
blocks, scatterwalk_done() was actually called after advancing 0 bytes.
This caused a crash ("BUG: unable to handle kernel paging request")
during '!PageSlab(page)' on architectures like arm and arm64 that define
ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE, provided that the input was
page-aligned as in that case walk->offset == 0.

Fix it by reorganizing blkcipher_walk_done() to skip the
scatterwalk_advance() and scatterwalk_done() if an error has occurred.

This bug was found by syzkaller fuzzing.

Reproducer, assuming ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE:

	#include <linux/if_alg.h>
	#include <sys/socket.h>
	#include <unistd.h>

	int main()
	{
		struct sockaddr_alg addr = {
			.salg_type = "skcipher",
			.salg_name = "ecb(aes-generic)",
		};
		char buffer[4096] __attribute__((aligned(4096))) = { 0 };
		int fd;

		fd = socket(AF_ALG, SOCK_SEQPACKET, 0);
		bind(fd, (void *)&addr, sizeof(addr));
		setsockopt(fd, SOL_ALG, ALG_SET_KEY, buffer, 16);
		fd = accept(fd, NULL, NULL);
		write(fd, buffer, 15);
		read(fd, buffer, 15);
	}

Reported-by: Liu Chao <liuchao741@huawei.com>
Fixes: 5cde0af2a982 ("[CRYPTO] cipher: Added block cipher type")
Cc: <stable@vger.kernel.org> # v2.6.19+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/blkcipher.c | 54 ++++++++++++++++++++++------------------------
 1 file changed, 26 insertions(+), 28 deletions(-)

diff --git a/crypto/blkcipher.c b/crypto/blkcipher.c
index 7bbfadc195a64..97ccb3108f4ad 100644
--- a/crypto/blkcipher.c
+++ b/crypto/blkcipher.c
@@ -71,19 +71,18 @@ static inline u8 *blkcipher_get_spot(u8 *start, unsigned int len)
 	return max(start, end_page);
 }
 
-static inline unsigned int blkcipher_done_slow(struct blkcipher_walk *walk,
-					       unsigned int bsize)
+static inline void blkcipher_done_slow(struct blkcipher_walk *walk,
+				       unsigned int bsize)
 {
 	u8 *addr;
 
 	addr = (u8 *)ALIGN((unsigned long)walk->buffer, walk->alignmask + 1);
 	addr = blkcipher_get_spot(addr, bsize);
 	scatterwalk_copychunks(addr, &walk->out, bsize, 1);
-	return bsize;
 }
 
-static inline unsigned int blkcipher_done_fast(struct blkcipher_walk *walk,
-					       unsigned int n)
+static inline void blkcipher_done_fast(struct blkcipher_walk *walk,
+				       unsigned int n)
 {
 	if (walk->flags & BLKCIPHER_WALK_COPY) {
 		blkcipher_map_dst(walk);
@@ -97,49 +96,48 @@ static inline unsigned int blkcipher_done_fast(struct blkcipher_walk *walk,
 
 	scatterwalk_advance(&walk->in, n);
 	scatterwalk_advance(&walk->out, n);
-
-	return n;
 }
 
 int blkcipher_walk_done(struct blkcipher_desc *desc,
 			struct blkcipher_walk *walk, int err)
 {
-	unsigned int nbytes = 0;
+	unsigned int n; /* bytes processed */
+	bool more;
 
-	if (likely(err >= 0)) {
-		unsigned int n = walk->nbytes - err;
+	if (unlikely(err < 0))
+		goto finish;
 
-		if (likely(!(walk->flags & BLKCIPHER_WALK_SLOW)))
-			n = blkcipher_done_fast(walk, n);
-		else if (WARN_ON(err)) {
-			err = -EINVAL;
-			goto err;
-		} else
-			n = blkcipher_done_slow(walk, n);
+	n = walk->nbytes - err;
+	walk->total -= n;
+	more = (walk->total != 0);
 
-		nbytes = walk->total - n;
-		err = 0;
+	if (likely(!(walk->flags & BLKCIPHER_WALK_SLOW))) {
+		blkcipher_done_fast(walk, n);
+	} else {
+		if (WARN_ON(err)) {
+			/* unexpected case; didn't process all bytes */
+			err = -EINVAL;
+			goto finish;
+		}
+		blkcipher_done_slow(walk, n);
 	}
 
-	scatterwalk_done(&walk->in, 0, nbytes);
-	scatterwalk_done(&walk->out, 1, nbytes);
-
-err:
-	walk->total = nbytes;
-	walk->nbytes = nbytes;
+	scatterwalk_done(&walk->in, 0, more);
+	scatterwalk_done(&walk->out, 1, more);
 
-	if (nbytes) {
+	if (more) {
 		crypto_yield(desc->flags);
 		return blkcipher_walk_next(desc, walk);
 	}
-
+	err = 0;
+finish:
+	walk->nbytes = 0;
 	if (walk->iv != desc->info)
 		memcpy(desc->info, walk->iv, walk->ivsize);
 	if (walk->buffer != walk->page)
 		kfree(walk->buffer);
 	if (walk->page)
 		free_page((unsigned long)walk->page);
-
 	return err;
 }
 EXPORT_SYMBOL_GPL(blkcipher_walk_done);

From ca258f833d94b02054f903962bdb288c9a8d9930 Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Mon, 23 Jul 2018 10:54:58 -0700
Subject: [PATCH 1585/1852] crypto: ablkcipher - fix crash flushing dcache in
 error path

commit 318abdfbe708aaaa652c79fb500e9bd60521f9dc upstream.

Like the skcipher_walk and blkcipher_walk cases:

scatterwalk_done() is only meant to be called after a nonzero number of
bytes have been processed, since scatterwalk_pagedone() will flush the
dcache of the *previous* page.  But in the error case of
ablkcipher_walk_done(), e.g. if the input wasn't an integer number of
blocks, scatterwalk_done() was actually called after advancing 0 bytes.
This caused a crash ("BUG: unable to handle kernel paging request")
during '!PageSlab(page)' on architectures like arm and arm64 that define
ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE, provided that the input was
page-aligned as in that case walk->offset == 0.

Fix it by reorganizing ablkcipher_walk_done() to skip the
scatterwalk_advance() and scatterwalk_done() if an error has occurred.

Reported-by: Liu Chao <liuchao741@huawei.com>
Fixes: bf06099db18a ("crypto: skcipher - Add ablkcipher_walk interfaces")
Cc: <stable@vger.kernel.org> # v2.6.35+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 crypto/ablkcipher.c | 57 +++++++++++++++++++++------------------------
 1 file changed, 26 insertions(+), 31 deletions(-)

diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c
index e5b5721809e21..149e7a7f04fe7 100644
--- a/crypto/ablkcipher.c
+++ b/crypto/ablkcipher.c
@@ -73,11 +73,9 @@ static inline u8 *ablkcipher_get_spot(u8 *start, unsigned int len)
 	return max(start, end_page);
 }
 
-static inline unsigned int ablkcipher_done_slow(struct ablkcipher_walk *walk,
-						unsigned int bsize)
+static inline void ablkcipher_done_slow(struct ablkcipher_walk *walk,
+					unsigned int n)
 {
-	unsigned int n = bsize;
-
 	for (;;) {
 		unsigned int len_this_page = scatterwalk_pagelen(&walk->out);
 
@@ -89,17 +87,13 @@ static inline unsigned int ablkcipher_done_slow(struct ablkcipher_walk *walk,
 		n -= len_this_page;
 		scatterwalk_start(&walk->out, sg_next(walk->out.sg));
 	}
-
-	return bsize;
 }
 
-static inline unsigned int ablkcipher_done_fast(struct ablkcipher_walk *walk,
-						unsigned int n)
+static inline void ablkcipher_done_fast(struct ablkcipher_walk *walk,
+					unsigned int n)
 {
 	scatterwalk_advance(&walk->in, n);
 	scatterwalk_advance(&walk->out, n);
-
-	return n;
 }
 
 static int ablkcipher_walk_next(struct ablkcipher_request *req,
@@ -109,39 +103,40 @@ int ablkcipher_walk_done(struct ablkcipher_request *req,
 			 struct ablkcipher_walk *walk, int err)
 {
 	struct crypto_tfm *tfm = req->base.tfm;
-	unsigned int nbytes = 0;
+	unsigned int n; /* bytes processed */
+	bool more;
 
-	if (likely(err >= 0)) {
-		unsigned int n = walk->nbytes - err;
+	if (unlikely(err < 0))
+		goto finish;
 
-		if (likely(!(walk->flags & ABLKCIPHER_WALK_SLOW)))
-			n = ablkcipher_done_fast(walk, n);
-		else if (WARN_ON(err)) {
-			err = -EINVAL;
-			goto err;
-		} else
-			n = ablkcipher_done_slow(walk, n);
+	n = walk->nbytes - err;
+	walk->total -= n;
+	more = (walk->total != 0);
 
-		nbytes = walk->total - n;
-		err = 0;
+	if (likely(!(walk->flags & ABLKCIPHER_WALK_SLOW))) {
+		ablkcipher_done_fast(walk, n);
+	} else {
+		if (WARN_ON(err)) {
+			/* unexpected case; didn't process all bytes */
+			err = -EINVAL;
+			goto finish;
+		}
+		ablkcipher_done_slow(walk, n);
 	}
 
-	scatterwalk_done(&walk->in, 0, nbytes);
-	scatterwalk_done(&walk->out, 1, nbytes);
-
-err:
-	walk->total = nbytes;
-	walk->nbytes = nbytes;
+	scatterwalk_done(&walk->in, 0, more);
+	scatterwalk_done(&walk->out, 1, more);
 
-	if (nbytes) {
+	if (more) {
 		crypto_yield(req->base.flags);
 		return ablkcipher_walk_next(req, walk);
 	}
-
+	err = 0;
+finish:
+	walk->nbytes = 0;
 	if (walk->iv != req->info)
 		memcpy(req->info, walk->iv, tfm->crt_ablkcipher.ivsize);
 	kfree(walk->iv_buffer);
-
 	return err;
 }
 EXPORT_SYMBOL_GPL(ablkcipher_walk_done);

From 5ee61043a8c75713bdb8ab33df044314bf11743a Mon Sep 17 00:00:00 2001
From: Thierry Escande <thierry.escande@collabora.com>
Date: Fri, 8 Sep 2017 00:13:08 -0500
Subject: [PATCH 1586/1852] ASoC: Intel: cht_bsw_max98090_ti: Fix jack
 initialization

commit 3bbda5a38601f7675a214be2044e41d7749e6c7b upstream.

If the ts3a227e audio accessory detection hardware is present and its
driver probed, the jack needs to be created before enabling jack
detection in the ts3a227e driver. With this patch, the jack is
instantiated in the max98090 headset init function if the ts3a227e is
present. This fixes a null pointer dereference as the jack detection
enabling function in the ts3a driver was called before the jack is
created.

[minor correction to keep error handling on jack creation the same
as before by Pierre Bossart]

Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/intel/boards/cht_bsw_max98090_ti.c | 45 ++++++++++++++------
 1 file changed, 31 insertions(+), 14 deletions(-)

diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
index 4e2fcf188dd1e..01a573a063d10 100644
--- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
+++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
@@ -131,23 +131,19 @@ static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
 	struct snd_soc_jack *jack = &ctx->jack;
 
-	/**
-	* TI supports 4 butons headset detection
-	* KEY_MEDIA
-	* KEY_VOICECOMMAND
-	* KEY_VOLUMEUP
-	* KEY_VOLUMEDOWN
-	*/
-	if (ctx->ts3a227e_present)
-		jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
-					SND_JACK_BTN_0 | SND_JACK_BTN_1 |
-					SND_JACK_BTN_2 | SND_JACK_BTN_3;
-	else
-		jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
+	if (ctx->ts3a227e_present) {
+		/*
+		 * The jack has already been created in the
+		 * cht_max98090_headset_init() function.
+		 */
+		snd_soc_jack_notifier_register(jack, &cht_jack_nb);
+		return 0;
+	}
+
+	jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
 
 	ret = snd_soc_card_jack_new(runtime->card, "Headset Jack",
 					jack_type, jack, NULL, 0);
-
 	if (ret) {
 		dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret);
 		return ret;
@@ -203,6 +199,27 @@ static int cht_max98090_headset_init(struct snd_soc_component *component)
 {
 	struct snd_soc_card *card = component->card;
 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
+	struct snd_soc_jack *jack = &ctx->jack;
+	int jack_type;
+	int ret;
+
+	/*
+	 * TI supports 4 butons headset detection
+	 * KEY_MEDIA
+	 * KEY_VOICECOMMAND
+	 * KEY_VOLUMEUP
+	 * KEY_VOLUMEDOWN
+	 */
+	jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
+		    SND_JACK_BTN_0 | SND_JACK_BTN_1 |
+		    SND_JACK_BTN_2 | SND_JACK_BTN_3;
+
+	ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type,
+				    jack, NULL, 0);
+	if (ret) {
+		dev_err(card->dev, "Headset Jack creation failed %d\n", ret);
+		return ret;
+	}
 
 	return ts3a227e_enable_jack_detect(component, &ctx->jack);
 }

From b9a5391977cb5f626257a9fc557d39df6bed0b2a Mon Sep 17 00:00:00 2001
From: Mark Salyzyn <salyzyn@android.com>
Date: Tue, 31 Jul 2018 15:02:13 -0700
Subject: [PATCH 1587/1852] Bluetooth: hidp: buffer overflow in
 hidp_process_report

commit 7992c18810e568b95c869b227137a2215702a805 upstream.

CVE-2018-9363

The buffer length is unsigned at all layers, but gets cast to int and
checked in hidp_process_report and can lead to a buffer overflow.
Switch len parameter to unsigned int to resolve issue.

This affects 3.18 and newer kernels.

Signed-off-by: Mark Salyzyn <salyzyn@android.com>
Fixes: a4b1b5877b514b276f0f31efe02388a9c2836728 ("HID: Bluetooth: hidp: make sure input buffers are big enough")
Cc: Marcel Holtmann <marcel@holtmann.org>
Cc: Johan Hedberg <johan.hedberg@gmail.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Kees Cook <keescook@chromium.org>
Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Cc: linux-bluetooth@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: security@kernel.org
Cc: kernel-team@android.com
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bluetooth/hidp/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/bluetooth/hidp/core.c b/net/bluetooth/hidp/core.c
index 1fc076420d1e9..1811f8e7ddf40 100644
--- a/net/bluetooth/hidp/core.c
+++ b/net/bluetooth/hidp/core.c
@@ -431,8 +431,8 @@ static void hidp_del_timer(struct hidp_session *session)
 		del_timer(&session->timer);
 }
 
-static void hidp_process_report(struct hidp_session *session,
-				int type, const u8 *data, int len, int intr)
+static void hidp_process_report(struct hidp_session *session, int type,
+				const u8 *data, unsigned int len, int intr)
 {
 	if (len > HID_MAX_BUFFER_SIZE)
 		len = HID_MAX_BUFFER_SIZE;

From 1e6740ffe1589fb4cd1f11a9c8b33033d576e85d Mon Sep 17 00:00:00 2001
From: Chintan Pandya <cpandya@codeaurora.org>
Date: Wed, 27 Jun 2018 08:13:47 -0600
Subject: [PATCH 1588/1852] ioremap: Update pgtable free interfaces with addr

commit 785a19f9d1dd8a4ab2d0633be4656653bd3de1fc upstream.

The following kernel panic was observed on ARM64 platform due to a stale
TLB entry.

 1. ioremap with 4K size, a valid pte page table is set.
 2. iounmap it, its pte entry is set to 0.
 3. ioremap the same address with 2M size, update its pmd entry with
    a new value.
 4. CPU may hit an exception because the old pmd entry is still in TLB,
    which leads to a kernel panic.

Commit b6bdb7517c3d ("mm/vmalloc: add interfaces to free unmapped page
table") has addressed this panic by falling to pte mappings in the above
case on ARM64.

To support pmd mappings in all cases, TLB purge needs to be performed
in this case on ARM64.

Add a new arg, 'addr', to pud_free_pmd_page() and pmd_free_pte_page()
so that TLB purge can be added later in seprate patches.

[toshi.kani@hpe.com: merge changes, rewrite patch description]
Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces")
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
Signed-off-by: Toshi Kani <toshi.kani@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: mhocko@suse.com
Cc: akpm@linux-foundation.org
Cc: hpa@zytor.com
Cc: linux-mm@kvack.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Will Deacon <will.deacon@arm.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: stable@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20180627141348.21777-3-toshi.kani@hpe.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/mm/mmu.c           |  4 ++--
 arch/x86/mm/pgtable.c         | 12 +++++++-----
 include/asm-generic/pgtable.h |  8 ++++----
 lib/ioremap.c                 |  4 ++--
 4 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index ce6ff17998b32..41c0846f690ed 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -882,12 +882,12 @@ int pmd_clear_huge(pmd_t *pmd)
 }
 
 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
-int pud_free_pmd_page(pud_t *pud)
+int pud_free_pmd_page(pud_t *pud, unsigned long addr)
 {
 	return pud_none(*pud);
 }
 
-int pmd_free_pte_page(pmd_t *pmd)
+int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
 {
 	return pmd_none(*pmd);
 }
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 8e0378a00d50d..8f5ef9d395559 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -680,11 +680,12 @@ int pmd_clear_huge(pmd_t *pmd)
 /**
  * pud_free_pmd_page - Clear pud entry and free pmd page.
  * @pud: Pointer to a PUD.
+ * @addr: Virtual address associated with pud.
  *
  * Context: The pud range has been unmaped and TLB purged.
  * Return: 1 if clearing the entry succeeded. 0 otherwise.
  */
-int pud_free_pmd_page(pud_t *pud)
+int pud_free_pmd_page(pud_t *pud, unsigned long addr)
 {
 	pmd_t *pmd;
 	int i;
@@ -695,7 +696,7 @@ int pud_free_pmd_page(pud_t *pud)
 	pmd = (pmd_t *)pud_page_vaddr(*pud);
 
 	for (i = 0; i < PTRS_PER_PMD; i++)
-		if (!pmd_free_pte_page(&pmd[i]))
+		if (!pmd_free_pte_page(&pmd[i], addr + (i * PMD_SIZE)))
 			return 0;
 
 	pud_clear(pud);
@@ -707,11 +708,12 @@ int pud_free_pmd_page(pud_t *pud)
 /**
  * pmd_free_pte_page - Clear pmd entry and free pte page.
  * @pmd: Pointer to a PMD.
+ * @addr: Virtual address associated with pmd.
  *
  * Context: The pmd range has been unmaped and TLB purged.
  * Return: 1 if clearing the entry succeeded. 0 otherwise.
  */
-int pmd_free_pte_page(pmd_t *pmd)
+int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
 {
 	pte_t *pte;
 
@@ -727,7 +729,7 @@ int pmd_free_pte_page(pmd_t *pmd)
 
 #else /* !CONFIG_X86_64 */
 
-int pud_free_pmd_page(pud_t *pud)
+int pud_free_pmd_page(pud_t *pud, unsigned long addr)
 {
 	return pud_none(*pud);
 }
@@ -736,7 +738,7 @@ int pud_free_pmd_page(pud_t *pud)
  * Disable free page handling on x86-PAE. This assures that ioremap()
  * does not update sync'd pmd entries. See vmalloc_sync_one().
  */
-int pmd_free_pte_page(pmd_t *pmd)
+int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
 {
 	return pmd_none(*pmd);
 }
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index dabecb661264c..53a47d75cc43b 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -770,8 +770,8 @@ int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
 int pud_clear_huge(pud_t *pud);
 int pmd_clear_huge(pmd_t *pmd);
-int pud_free_pmd_page(pud_t *pud);
-int pmd_free_pte_page(pmd_t *pmd);
+int pud_free_pmd_page(pud_t *pud, unsigned long addr);
+int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
 #else	/* !CONFIG_HAVE_ARCH_HUGE_VMAP */
 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
 {
@@ -789,11 +789,11 @@ static inline int pmd_clear_huge(pmd_t *pmd)
 {
 	return 0;
 }
-static inline int pud_free_pmd_page(pud_t *pud)
+static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
 {
 	return 0;
 }
-static inline int pmd_free_pte_page(pmd_t *pmd)
+static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
 {
 	return 0;
 }
diff --git a/lib/ioremap.c b/lib/ioremap.c
index 5323b59ca3936..b9462037868d0 100644
--- a/lib/ioremap.c
+++ b/lib/ioremap.c
@@ -84,7 +84,7 @@ static inline int ioremap_pmd_range(pud_t *pud, unsigned long addr,
 		if (ioremap_pmd_enabled() &&
 		    ((next - addr) == PMD_SIZE) &&
 		    IS_ALIGNED(phys_addr + addr, PMD_SIZE) &&
-		    pmd_free_pte_page(pmd)) {
+		    pmd_free_pte_page(pmd, addr)) {
 			if (pmd_set_huge(pmd, phys_addr + addr, prot))
 				continue;
 		}
@@ -111,7 +111,7 @@ static inline int ioremap_pud_range(pgd_t *pgd, unsigned long addr,
 		if (ioremap_pud_enabled() &&
 		    ((next - addr) == PUD_SIZE) &&
 		    IS_ALIGNED(phys_addr + addr, PUD_SIZE) &&
-		    pud_free_pmd_page(pud)) {
+		    pud_free_pmd_page(pud, addr)) {
 			if (pud_set_huge(pud, phys_addr + addr, prot))
 				continue;
 		}

From a1d377d98f0118d73267c1f154ad4e2190cfdf53 Mon Sep 17 00:00:00 2001
From: Toshi Kani <toshi.kani@hpe.com>
Date: Wed, 27 Jun 2018 08:13:48 -0600
Subject: [PATCH 1589/1852] x86/mm: Add TLB purge to free pmd/pte page
 interfaces

commit 5e0fb5df2ee871b841f96f9cb6a7f2784e96aa4e upstream.

ioremap() calls pud_free_pmd_page() / pmd_free_pte_page() when it creates
a pud / pmd map.  The following preconditions are met at their entry.
 - All pte entries for a target pud/pmd address range have been cleared.
 - System-wide TLB purges have been peformed for a target pud/pmd address
   range.

The preconditions assure that there is no stale TLB entry for the range.
Speculation may not cache TLB entries since it requires all levels of page
entries, including ptes, to have P & A-bits set for an associated address.
However, speculation may cache pud/pmd entries (paging-structure caches)
when they have P-bit set.

Add a system-wide TLB purge (INVLPG) to a single page after clearing
pud/pmd entry's P-bit.

SDM 4.10.4.1, Operation that Invalidate TLBs and Paging-Structure Caches,
states that:
  INVLPG invalidates all paging-structure caches associated with the
  current PCID regardless of the liner addresses to which they correspond.

Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces")
Signed-off-by: Toshi Kani <toshi.kani@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: mhocko@suse.com
Cc: akpm@linux-foundation.org
Cc: hpa@zytor.com
Cc: cpandya@codeaurora.org
Cc: linux-mm@kvack.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Joerg Roedel <joro@8bytes.org>
Cc: stable@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20180627141348.21777-4-toshi.kani@hpe.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/pgtable.c | 36 ++++++++++++++++++++++++++++++------
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 8f5ef9d395559..55c7446311a7b 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -682,24 +682,44 @@ int pmd_clear_huge(pmd_t *pmd)
  * @pud: Pointer to a PUD.
  * @addr: Virtual address associated with pud.
  *
- * Context: The pud range has been unmaped and TLB purged.
+ * Context: The pud range has been unmapped and TLB purged.
  * Return: 1 if clearing the entry succeeded. 0 otherwise.
+ *
+ * NOTE: Callers must allow a single page allocation.
  */
 int pud_free_pmd_page(pud_t *pud, unsigned long addr)
 {
-	pmd_t *pmd;
+	pmd_t *pmd, *pmd_sv;
+	pte_t *pte;
 	int i;
 
 	if (pud_none(*pud))
 		return 1;
 
 	pmd = (pmd_t *)pud_page_vaddr(*pud);
+	pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
+	if (!pmd_sv)
+		return 0;
 
-	for (i = 0; i < PTRS_PER_PMD; i++)
-		if (!pmd_free_pte_page(&pmd[i], addr + (i * PMD_SIZE)))
-			return 0;
+	for (i = 0; i < PTRS_PER_PMD; i++) {
+		pmd_sv[i] = pmd[i];
+		if (!pmd_none(pmd[i]))
+			pmd_clear(&pmd[i]);
+	}
 
 	pud_clear(pud);
+
+	/* INVLPG to clear all paging-structure caches */
+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
+
+	for (i = 0; i < PTRS_PER_PMD; i++) {
+		if (!pmd_none(pmd_sv[i])) {
+			pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);
+			free_page((unsigned long)pte);
+		}
+	}
+
+	free_page((unsigned long)pmd_sv);
 	free_page((unsigned long)pmd);
 
 	return 1;
@@ -710,7 +730,7 @@ int pud_free_pmd_page(pud_t *pud, unsigned long addr)
  * @pmd: Pointer to a PMD.
  * @addr: Virtual address associated with pmd.
  *
- * Context: The pmd range has been unmaped and TLB purged.
+ * Context: The pmd range has been unmapped and TLB purged.
  * Return: 1 if clearing the entry succeeded. 0 otherwise.
  */
 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
@@ -722,6 +742,10 @@ int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
 
 	pte = (pte_t *)pmd_page_vaddr(*pmd);
 	pmd_clear(pmd);
+
+	/* INVLPG to clear all paging-structure caches */
+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
+
 	free_page((unsigned long)pte);
 
 	return 1;

From 4c466ee50a2c0c5c7925a8cbad7c04a40e4762fb Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Fri, 17 Aug 2018 20:56:45 +0200
Subject: [PATCH 1590/1852] Linux 4.4.149

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 96a1720f7fe4b..5cc9802a064fc 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 148
+SUBLEVEL = 149
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 8ab87ab16ab7da2e6244ad17c7940421392a2f33 Mon Sep 17 00:00:00 2001
From: Sean Christopherson <sean.j.christopherson@intel.com>
Date: Fri, 17 Aug 2018 10:27:36 -0700
Subject: [PATCH 1591/1852] x86/speculation/l1tf: Exempt zeroed PTEs from
 inversion

commit f19f5c49bbc3ffcc9126cc245fc1b24cc29f4a37 upstream.

It turns out that we should *not* invert all not-present mappings,
because the all zeroes case is obviously special.

clear_page() does not undergo the XOR logic to invert the address bits,
i.e. PTE, PMD and PUD entries that have not been individually written
will have val=0 and so will trigger __pte_needs_invert(). As a result,
{pte,pmd,pud}_pfn() will return the wrong PFN value, i.e. all ones
(adjusted by the max PFN mask) instead of zero. A zeroed entry is ok
because the page at physical address 0 is reserved early in boot
specifically to mitigate L1TF, so explicitly exempt them from the
inversion when reading the PFN.

Manifested as an unexpected mprotect(..., PROT_NONE) failure when called
on a VMA that has VM_PFNMAP and was mmap'd to as something other than
PROT_NONE but never used. mprotect() sends the PROT_NONE request down
prot_none_walk(), which walks the PTEs to check the PFNs.
prot_none_pte_entry() gets the bogus PFN from pte_pfn() and returns
-EACCES because it thinks mprotect() is trying to adjust a high MMIO
address.

[ This is a very modified version of Sean's original patch, but all
  credit goes to Sean for doing this and also pointing out that
  sometimes the __pte_needs_invert() function only gets the protection
  bits, not the full eventual pte.  But zero remains special even in
  just protection bits, so that's ok.   - Linus ]

Fixes: f22cc87f6c1f ("x86/speculation/l1tf: Invert all not present mappings")
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Acked-by: Andi Kleen <ak@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable-invert.h | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/pgtable-invert.h b/arch/x86/include/asm/pgtable-invert.h
index 44b1203ece12a..a0c1525f1b6f4 100644
--- a/arch/x86/include/asm/pgtable-invert.h
+++ b/arch/x86/include/asm/pgtable-invert.h
@@ -4,9 +4,18 @@
 
 #ifndef __ASSEMBLY__
 
+/*
+ * A clear pte value is special, and doesn't get inverted.
+ *
+ * Note that even users that only pass a pgprot_t (rather
+ * than a full pte) won't trigger the special zero case,
+ * because even PAGE_NONE has _PAGE_PROTNONE | _PAGE_ACCESSED
+ * set. So the all zero case really is limited to just the
+ * cleared page table entry case.
+ */
 static inline bool __pte_needs_invert(u64 val)
 {
-	return !(val & _PAGE_PRESENT);
+	return val && !(val & _PAGE_PRESENT);
 }
 
 /* Get a mask to xor with the page table entry to get the correct pfn. */

From 183cc2aa1d5944e2dc753fd01c379c0a44d9b97b Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sat, 18 Aug 2018 10:45:38 +0200
Subject: [PATCH 1592/1852] Linux 4.4.150

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 5cc9802a064fc..c362f10a272c4 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 149
+SUBLEVEL = 150
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 3a0cb776f93ec534c716aef2371a39a2bbeaaf30 Mon Sep 17 00:00:00 2001
From: Alexey Kodanev <alexey.kodanev@oracle.com>
Date: Tue, 7 Aug 2018 20:03:57 +0300
Subject: [PATCH 1593/1852] dccp: fix undefined behavior with 'cwnd' shift in
 ccid2_cwnd_restart()

[ Upstream commit 61ef4b07fcdc30535889990cf4229766502561cf ]

The shift of 'cwnd' with '(now - hc->tx_lsndtime) / hc->tx_rto' value
can lead to undefined behavior [1].

In order to fix this use a gradual shift of the window with a 'while'
loop, similar to what tcp_cwnd_restart() is doing.

When comparing delta and RTO there is a minor difference between TCP
and DCCP, the last one also invokes dccp_cwnd_restart() and reduces
'cwnd' if delta equals RTO. That case is preserved in this change.

[1]:
[40850.963623] UBSAN: Undefined behaviour in net/dccp/ccids/ccid2.c:237:7
[40851.043858] shift exponent 67 is too large for 32-bit type 'unsigned int'
[40851.127163] CPU: 3 PID: 15940 Comm: netstress Tainted: G        W   E     4.18.0-rc7.x86_64 #1
...
[40851.377176] Call Trace:
[40851.408503]  dump_stack+0xf1/0x17b
[40851.451331]  ? show_regs_print_info+0x5/0x5
[40851.503555]  ubsan_epilogue+0x9/0x7c
[40851.548363]  __ubsan_handle_shift_out_of_bounds+0x25b/0x2b4
[40851.617109]  ? __ubsan_handle_load_invalid_value+0x18f/0x18f
[40851.686796]  ? xfrm4_output_finish+0x80/0x80
[40851.739827]  ? lock_downgrade+0x6d0/0x6d0
[40851.789744]  ? xfrm4_prepare_output+0x160/0x160
[40851.845912]  ? ip_queue_xmit+0x810/0x1db0
[40851.895845]  ? ccid2_hc_tx_packet_sent+0xd36/0x10a0 [dccp]
[40851.963530]  ccid2_hc_tx_packet_sent+0xd36/0x10a0 [dccp]
[40852.029063]  dccp_xmit_packet+0x1d3/0x720 [dccp]
[40852.086254]  dccp_write_xmit+0x116/0x1d0 [dccp]
[40852.142412]  dccp_sendmsg+0x428/0xb20 [dccp]
[40852.195454]  ? inet_dccp_listen+0x200/0x200 [dccp]
[40852.254833]  ? sched_clock+0x5/0x10
[40852.298508]  ? sched_clock+0x5/0x10
[40852.342194]  ? inet_create+0xdf0/0xdf0
[40852.388988]  sock_sendmsg+0xd9/0x160
...

Fixes: 113ced1f52e5 ("dccp ccid-2: Perform congestion-window validation")
Signed-off-by: Alexey Kodanev <alexey.kodanev@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/dccp/ccids/ccid2.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/dccp/ccids/ccid2.c b/net/dccp/ccids/ccid2.c
index 86a2ed0fb219c..161dfcf861268 100644
--- a/net/dccp/ccids/ccid2.c
+++ b/net/dccp/ccids/ccid2.c
@@ -228,14 +228,16 @@ static void ccid2_cwnd_restart(struct sock *sk, const u32 now)
 	struct ccid2_hc_tx_sock *hc = ccid2_hc_tx_sk(sk);
 	u32 cwnd = hc->tx_cwnd, restart_cwnd,
 	    iwnd = rfc3390_bytes_to_packets(dccp_sk(sk)->dccps_mss_cache);
+	s32 delta = now - hc->tx_lsndtime;
 
 	hc->tx_ssthresh = max(hc->tx_ssthresh, (cwnd >> 1) + (cwnd >> 2));
 
 	/* don't reduce cwnd below the initial window (IW) */
 	restart_cwnd = min(cwnd, iwnd);
-	cwnd >>= (now - hc->tx_lsndtime) / hc->tx_rto;
-	hc->tx_cwnd = max(cwnd, restart_cwnd);
 
+	while ((delta -= hc->tx_rto) >= 0 && cwnd > restart_cwnd)
+		cwnd >>= 1;
+	hc->tx_cwnd = max(cwnd, restart_cwnd);
 	hc->tx_cwnd_stamp = now;
 	hc->tx_cwnd_used  = 0;
 

From 9b514b23f3f9de8265a3a563ba9aa9d5ec6d1ad0 Mon Sep 17 00:00:00 2001
From: Wei Wang <weiwan@google.com>
Date: Fri, 10 Aug 2018 11:14:56 -0700
Subject: [PATCH 1594/1852] l2tp: use sk_dst_check() to avoid race on
 sk->sk_dst_cache

[ Upstream commit 6d37fa49da1e8db8fb1995be22ac837ca41ac8a8 ]

In l2tp code, if it is a L2TP_UDP_ENCAP tunnel, tunnel->sk points to a
UDP socket. User could call sendmsg() on both this tunnel and the UDP
socket itself concurrently. As l2tp_xmit_skb() holds socket lock and call
__sk_dst_check() to refresh sk->sk_dst_cache, while udpv6_sendmsg() is
lockless and call sk_dst_check() to refresh sk->sk_dst_cache, there
could be a race and cause the dst cache to be freed multiple times.
So we fix l2tp side code to always call sk_dst_check() to garantee
xchg() is called when refreshing sk->sk_dst_cache to avoid race
conditions.

Syzkaller reported stack trace:
BUG: KASAN: use-after-free in atomic_read include/asm-generic/atomic-instrumented.h:21 [inline]
BUG: KASAN: use-after-free in atomic_fetch_add_unless include/linux/atomic.h:575 [inline]
BUG: KASAN: use-after-free in atomic_add_unless include/linux/atomic.h:597 [inline]
BUG: KASAN: use-after-free in dst_hold_safe include/net/dst.h:308 [inline]
BUG: KASAN: use-after-free in ip6_hold_safe+0xe6/0x670 net/ipv6/route.c:1029
Read of size 4 at addr ffff8801aea9a880 by task syz-executor129/4829

CPU: 0 PID: 4829 Comm: syz-executor129 Not tainted 4.18.0-rc7-next-20180802+ #30
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x1c9/0x2b4 lib/dump_stack.c:113
 print_address_description+0x6c/0x20b mm/kasan/report.c:256
 kasan_report_error mm/kasan/report.c:354 [inline]
 kasan_report.cold.7+0x242/0x30d mm/kasan/report.c:412
 check_memory_region_inline mm/kasan/kasan.c:260 [inline]
 check_memory_region+0x13e/0x1b0 mm/kasan/kasan.c:267
 kasan_check_read+0x11/0x20 mm/kasan/kasan.c:272
 atomic_read include/asm-generic/atomic-instrumented.h:21 [inline]
 atomic_fetch_add_unless include/linux/atomic.h:575 [inline]
 atomic_add_unless include/linux/atomic.h:597 [inline]
 dst_hold_safe include/net/dst.h:308 [inline]
 ip6_hold_safe+0xe6/0x670 net/ipv6/route.c:1029
 rt6_get_pcpu_route net/ipv6/route.c:1249 [inline]
 ip6_pol_route+0x354/0xd20 net/ipv6/route.c:1922
 ip6_pol_route_output+0x54/0x70 net/ipv6/route.c:2098
 fib6_rule_lookup+0x283/0x890 net/ipv6/fib6_rules.c:122
 ip6_route_output_flags+0x2c5/0x350 net/ipv6/route.c:2126
 ip6_dst_lookup_tail+0x1278/0x1da0 net/ipv6/ip6_output.c:978
 ip6_dst_lookup_flow+0xc8/0x270 net/ipv6/ip6_output.c:1079
 ip6_sk_dst_lookup_flow+0x5ed/0xc50 net/ipv6/ip6_output.c:1117
 udpv6_sendmsg+0x2163/0x36b0 net/ipv6/udp.c:1354
 inet_sendmsg+0x1a1/0x690 net/ipv4/af_inet.c:798
 sock_sendmsg_nosec net/socket.c:622 [inline]
 sock_sendmsg+0xd5/0x120 net/socket.c:632
 ___sys_sendmsg+0x51d/0x930 net/socket.c:2115
 __sys_sendmmsg+0x240/0x6f0 net/socket.c:2210
 __do_sys_sendmmsg net/socket.c:2239 [inline]
 __se_sys_sendmmsg net/socket.c:2236 [inline]
 __x64_sys_sendmmsg+0x9d/0x100 net/socket.c:2236
 do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
 entry_SYSCALL_64_after_hwframe+0x49/0xbe
RIP: 0033:0x446a29
Code: e8 ac b8 02 00 48 83 c4 18 c3 0f 1f 80 00 00 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 0f 83 eb 08 fc ff c3 66 2e 0f 1f 84 00 00 00 00
RSP: 002b:00007f4de5532db8 EFLAGS: 00000246 ORIG_RAX: 0000000000000133
RAX: ffffffffffffffda RBX: 00000000006dcc38 RCX: 0000000000446a29
RDX: 00000000000000b8 RSI: 0000000020001b00 RDI: 0000000000000003
RBP: 00000000006dcc30 R08: 00007f4de5533700 R09: 0000000000000000
R10: 0000000000000000 R11: 0000000000000246 R12: 00000000006dcc3c
R13: 00007ffe2b830fdf R14: 00007f4de55339c0 R15: 0000000000000001

Fixes: 71b1391a4128 ("l2tp: ensure sk->dst is still valid")
Reported-by: syzbot+05f840f3b04f211bad55@syzkaller.appspotmail.com
Signed-off-by: Wei Wang <weiwan@google.com>
Signed-off-by: Martin KaFai Lau <kafai@fb.com>
Cc: Guillaume Nault <g.nault@alphalink.fr>
Cc: David Ahern <dsahern@gmail.com>
Cc: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/l2tp/l2tp_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/l2tp/l2tp_core.c b/net/l2tp/l2tp_core.c
index 92df832a18965..591d18785285f 100644
--- a/net/l2tp/l2tp_core.c
+++ b/net/l2tp/l2tp_core.c
@@ -1145,7 +1145,7 @@ int l2tp_xmit_skb(struct l2tp_session *session, struct sk_buff *skb, int hdr_len
 
 	/* Get routing info from the tunnel socket */
 	skb_dst_drop(skb);
-	skb_dst_set(skb, dst_clone(__sk_dst_check(sk, 0)));
+	skb_dst_set(skb, sk_dst_check(sk, 0));
 
 	inet = inet_sk(sk);
 	fl = &inet->cork.fl;

From 3da339b556a33584bd71165f30cefa83fc1edf6e Mon Sep 17 00:00:00 2001
From: Cong Wang <xiyou.wangcong@gmail.com>
Date: Tue, 7 Aug 2018 12:41:38 -0700
Subject: [PATCH 1595/1852] llc: use refcount_inc_not_zero() for llc_sap_find()

[ Upstream commit 0dcb82254d65f72333aa50ad626d1e9665ad093b ]

llc_sap_put() decreases the refcnt before deleting sap
from the global list. Therefore, there is a chance
llc_sap_find() could find a sap with zero refcnt
in this global list.

Close this race condition by checking if refcnt is zero
or not in llc_sap_find(), if it is zero then it is being
removed so we can just treat it as gone.

Reported-by: <syzbot+278893f3f7803871f7ce@syzkaller.appspotmail.com>
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/llc.h  | 5 +++++
 net/llc/llc_core.c | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/net/llc.h b/include/net/llc.h
index e8e61d4fb4583..82d989995d18a 100644
--- a/include/net/llc.h
+++ b/include/net/llc.h
@@ -116,6 +116,11 @@ static inline void llc_sap_hold(struct llc_sap *sap)
 	atomic_inc(&sap->refcnt);
 }
 
+static inline bool llc_sap_hold_safe(struct llc_sap *sap)
+{
+	return atomic_inc_not_zero(&sap->refcnt);
+}
+
 void llc_sap_close(struct llc_sap *sap);
 
 static inline void llc_sap_put(struct llc_sap *sap)
diff --git a/net/llc/llc_core.c b/net/llc/llc_core.c
index 842851cef6987..e896a2c53b120 100644
--- a/net/llc/llc_core.c
+++ b/net/llc/llc_core.c
@@ -73,8 +73,8 @@ struct llc_sap *llc_sap_find(unsigned char sap_value)
 
 	rcu_read_lock_bh();
 	sap = __llc_sap_find(sap_value);
-	if (sap)
-		llc_sap_hold(sap);
+	if (!sap || !llc_sap_hold_safe(sap))
+		sap = NULL;
 	rcu_read_unlock_bh();
 	return sap;
 }

From e956d37034c5d166510db41a68ed589c507e6433 Mon Sep 17 00:00:00 2001
From: Hangbin Liu <liuhangbin@gmail.com>
Date: Mon, 13 Aug 2018 18:44:04 +0800
Subject: [PATCH 1596/1852] net_sched: Fix missing res info when create new
 tc_index filter

[ Upstream commit 008369dcc5f7bfba526c98054f8525322acf0ea3 ]

Li Shuang reported the following warn:

[  733.484610] WARNING: CPU: 6 PID: 21123 at net/sched/sch_cbq.c:1418 cbq_destroy_class+0x5d/0x70 [sch_cbq]
[  733.495190] Modules linked in: sch_cbq cls_tcindex sch_dsmark rpcsec_gss_krb5 auth_rpcgss nfsv4 dns_resolver nfs lockd grace fscache xt_CHECKSUM iptable_mangle ipt_MASQUERADE iptable_nat l
[  733.574155]  syscopyarea sysfillrect sysimgblt fb_sys_fops ttm drm igb ixgbe ahci libahci i2c_algo_bit libata i40e i2c_core dca mdio megaraid_sas dm_mirror dm_region_hash dm_log dm_mod
[  733.592500] CPU: 6 PID: 21123 Comm: tc Not tainted 4.18.0-rc8.latest+ #131
[  733.600169] Hardware name: Dell Inc. PowerEdge R730/0WCJNT, BIOS 2.1.5 04/11/2016
[  733.608518] RIP: 0010:cbq_destroy_class+0x5d/0x70 [sch_cbq]
[  733.614734] Code: e7 d9 d2 48 8b 7b 48 e8 61 05 da d2 48 8d bb f8 00 00 00 e8 75 ae d5 d2 48 39 eb 74 0a 48 89 df 5b 5d e9 16 6c 94 d2 5b 5d c3 <0f> 0b eb b6 0f 1f 44 00 00 66 2e 0f 1f 84
[  733.635798] RSP: 0018:ffffbfbb066bb9d8 EFLAGS: 00010202
[  733.641627] RAX: 0000000000000001 RBX: ffff9cdd17392800 RCX: 000000008010000f
[  733.649588] RDX: ffff9cdd1df547e0 RSI: ffff9cdd17392800 RDI: ffff9cdd0f84c800
[  733.657547] RBP: ffff9cdd0f84c800 R08: 0000000000000001 R09: 0000000000000000
[  733.665508] R10: ffff9cdd0f84d000 R11: 0000000000000001 R12: 0000000000000001
[  733.673469] R13: 0000000000000000 R14: 0000000000000001 R15: ffff9cdd17392200
[  733.681430] FS:  00007f911890a740(0000) GS:ffff9cdd1f8c0000(0000) knlGS:0000000000000000
[  733.690456] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  733.696864] CR2: 0000000000b5544c CR3: 0000000859374002 CR4: 00000000001606e0
[  733.704826] Call Trace:
[  733.707554]  cbq_destroy+0xa1/0xd0 [sch_cbq]
[  733.712318]  qdisc_destroy+0x62/0x130
[  733.716401]  dsmark_destroy+0x2a/0x70 [sch_dsmark]
[  733.721745]  qdisc_destroy+0x62/0x130
[  733.725829]  qdisc_graft+0x3ba/0x470
[  733.729817]  tc_get_qdisc+0x2a6/0x2c0
[  733.733901]  ? cred_has_capability+0x7d/0x130
[  733.738761]  rtnetlink_rcv_msg+0x263/0x2d0
[  733.743330]  ? rtnl_calcit.isra.30+0x110/0x110
[  733.748287]  netlink_rcv_skb+0x4d/0x130
[  733.752576]  netlink_unicast+0x1a3/0x250
[  733.756949]  netlink_sendmsg+0x2ae/0x3a0
[  733.761324]  sock_sendmsg+0x36/0x40
[  733.765213]  ___sys_sendmsg+0x26f/0x2d0
[  733.769493]  ? handle_pte_fault+0x586/0xdf0
[  733.774158]  ? __handle_mm_fault+0x389/0x500
[  733.778919]  ? __sys_sendmsg+0x5e/0xa0
[  733.783099]  __sys_sendmsg+0x5e/0xa0
[  733.787087]  do_syscall_64+0x5b/0x180
[  733.791171]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
[  733.796805] RIP: 0033:0x7f9117f23f10
[  733.800791] Code: c3 48 8b 05 82 6f 2c 00 f7 db 64 89 18 48 83 cb ff eb dd 0f 1f 80 00 00 00 00 83 3d 8d d0 2c 00 00 75 10 b8 2e 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 31 c3 48 83 ec 08 e8
[  733.821873] RSP: 002b:00007ffe96818398 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
[  733.830319] RAX: ffffffffffffffda RBX: 000000005b71244c RCX: 00007f9117f23f10
[  733.838280] RDX: 0000000000000000 RSI: 00007ffe968183e0 RDI: 0000000000000003
[  733.846241] RBP: 00007ffe968183e0 R08: 000000000000ffff R09: 0000000000000003
[  733.854202] R10: 00007ffe96817e20 R11: 0000000000000246 R12: 0000000000000000
[  733.862161] R13: 0000000000662ee0 R14: 0000000000000000 R15: 0000000000000000
[  733.870121] ---[ end trace 28edd4aad712ddca ]---

This is because we didn't update f->result.res when create new filter. Then in
tcindex_delete() -> tcf_unbind_filter(), we will failed to find out the res
and unbind filter, which will trigger the WARN_ON() in cbq_destroy_class().

Fix it by updating f->result.res when create new filter.

Fixes: 6e0565697a106 ("net_sched: fix another crash in cls_tcindex")
Reported-by: Li Shuang <shuali@redhat.com>
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
Acked-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sched/cls_tcindex.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/sched/cls_tcindex.c b/net/sched/cls_tcindex.c
index 403746b202637..e3b48ddadb45b 100644
--- a/net/sched/cls_tcindex.c
+++ b/net/sched/cls_tcindex.c
@@ -398,6 +398,7 @@ tcindex_set_parms(struct net *net, struct tcf_proto *tp, unsigned long base,
 		struct tcindex_filter *nfp;
 		struct tcindex_filter __rcu **fp;
 
+		f->result.res = r->res;
 		tcf_exts_change(tp, &f->result.exts, &r->exts);
 
 		fp = cp->h + (handle % cp->hash);

From 0b6b039c6be2ce20004c347f8e66fa49a202e3e9 Mon Sep 17 00:00:00 2001
From: Cong Wang <xiyou.wangcong@gmail.com>
Date: Mon, 6 Aug 2018 11:06:02 -0700
Subject: [PATCH 1597/1852] vsock: split dwork to avoid reinitializations

[ Upstream commit 455f05ecd2b219e9a216050796d30c830d9bc393 ]

syzbot reported that we reinitialize an active delayed
work in vsock_stream_connect():

	ODEBUG: init active (active state 0) object type: timer_list hint:
	delayed_work_timer_fn+0x0/0x90 kernel/workqueue.c:1414
	WARNING: CPU: 1 PID: 11518 at lib/debugobjects.c:329
	debug_print_object+0x16a/0x210 lib/debugobjects.c:326

The pattern is apparently wrong, we should only initialize
the dealyed work once and could repeatly schedule it. So we
have to move out the initializations to allocation side.
And to avoid confusion, we can split the shared dwork
into two, instead of re-using the same one.

Fixes: d021c344051a ("VSOCK: Introduce VM Sockets")
Reported-by: <syzbot+8a9b1bd330476a4f3db6@syzkaller.appspotmail.com>
Cc: Andy king <acking@vmware.com>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Cc: Jorgen Hansen <jhansen@vmware.com>
Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/af_vsock.h         |  4 ++--
 net/vmw_vsock/af_vsock.c       | 15 ++++++++-------
 net/vmw_vsock/vmci_transport.c |  3 +--
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/include/net/af_vsock.h b/include/net/af_vsock.h
index e9eb2d6791b3b..f7a35fcaaaf66 100644
--- a/include/net/af_vsock.h
+++ b/include/net/af_vsock.h
@@ -62,7 +62,8 @@ struct vsock_sock {
 	struct list_head pending_links;
 	struct list_head accept_queue;
 	bool rejected;
-	struct delayed_work dwork;
+	struct delayed_work connect_work;
+	struct delayed_work pending_work;
 	u32 peer_shutdown;
 	bool sent_request;
 	bool ignore_connecting_rst;
@@ -73,7 +74,6 @@ struct vsock_sock {
 
 s64 vsock_stream_has_data(struct vsock_sock *vsk);
 s64 vsock_stream_has_space(struct vsock_sock *vsk);
-void vsock_pending_work(struct work_struct *work);
 struct sock *__vsock_create(struct net *net,
 			    struct socket *sock,
 			    struct sock *parent,
diff --git a/net/vmw_vsock/af_vsock.c b/net/vmw_vsock/af_vsock.c
index 60324f7c72bd9..7f1d166ce6128 100644
--- a/net/vmw_vsock/af_vsock.c
+++ b/net/vmw_vsock/af_vsock.c
@@ -430,14 +430,14 @@ static int vsock_send_shutdown(struct sock *sk, int mode)
 	return transport->shutdown(vsock_sk(sk), mode);
 }
 
-void vsock_pending_work(struct work_struct *work)
+static void vsock_pending_work(struct work_struct *work)
 {
 	struct sock *sk;
 	struct sock *listener;
 	struct vsock_sock *vsk;
 	bool cleanup;
 
-	vsk = container_of(work, struct vsock_sock, dwork.work);
+	vsk = container_of(work, struct vsock_sock, pending_work.work);
 	sk = sk_vsock(vsk);
 	listener = vsk->listener;
 	cleanup = true;
@@ -477,7 +477,6 @@ void vsock_pending_work(struct work_struct *work)
 	sock_put(sk);
 	sock_put(listener);
 }
-EXPORT_SYMBOL_GPL(vsock_pending_work);
 
 /**** SOCKET OPERATIONS ****/
 
@@ -576,6 +575,8 @@ static int __vsock_bind(struct sock *sk, struct sockaddr_vm *addr)
 	return retval;
 }
 
+static void vsock_connect_timeout(struct work_struct *work);
+
 struct sock *__vsock_create(struct net *net,
 			    struct socket *sock,
 			    struct sock *parent,
@@ -618,6 +619,8 @@ struct sock *__vsock_create(struct net *net,
 	vsk->sent_request = false;
 	vsk->ignore_connecting_rst = false;
 	vsk->peer_shutdown = 0;
+	INIT_DELAYED_WORK(&vsk->connect_work, vsock_connect_timeout);
+	INIT_DELAYED_WORK(&vsk->pending_work, vsock_pending_work);
 
 	psk = parent ? vsock_sk(parent) : NULL;
 	if (parent) {
@@ -1094,7 +1097,7 @@ static void vsock_connect_timeout(struct work_struct *work)
 	struct sock *sk;
 	struct vsock_sock *vsk;
 
-	vsk = container_of(work, struct vsock_sock, dwork.work);
+	vsk = container_of(work, struct vsock_sock, connect_work.work);
 	sk = sk_vsock(vsk);
 
 	lock_sock(sk);
@@ -1195,9 +1198,7 @@ static int vsock_stream_connect(struct socket *sock, struct sockaddr *addr,
 			 * timeout fires.
 			 */
 			sock_hold(sk);
-			INIT_DELAYED_WORK(&vsk->dwork,
-					  vsock_connect_timeout);
-			schedule_delayed_work(&vsk->dwork, timeout);
+			schedule_delayed_work(&vsk->connect_work, timeout);
 
 			/* Skip ahead to preserve error code set above. */
 			goto out_wait;
diff --git a/net/vmw_vsock/vmci_transport.c b/net/vmw_vsock/vmci_transport.c
index 662bdd20a7489..589c8b9908a5f 100644
--- a/net/vmw_vsock/vmci_transport.c
+++ b/net/vmw_vsock/vmci_transport.c
@@ -1099,8 +1099,7 @@ static int vmci_transport_recv_listen(struct sock *sk,
 	vpending->listener = sk;
 	sock_hold(sk);
 	sock_hold(pending);
-	INIT_DELAYED_WORK(&vpending->dwork, vsock_pending_work);
-	schedule_delayed_work(&vpending->dwork, HZ);
+	schedule_delayed_work(&vpending->pending_work, HZ);
 
 out:
 	return err;

From 2c11987f28f8b0ba20c959288e64f45be2b165fd Mon Sep 17 00:00:00 2001
From: Hangbin Liu <liuhangbin@gmail.com>
Date: Mon, 13 Aug 2018 18:44:03 +0800
Subject: [PATCH 1598/1852] net_sched: fix NULL pointer dereference when delete
 tcindex filter

[ Upstream commit 2df8bee5654bb2b7312662ca6810d4dc16b0b67f ]

Li Shuang reported the following crash:

[   71.267724] BUG: unable to handle kernel NULL pointer dereference at 0000000000000004
[   71.276456] PGD 800000085d9bd067 P4D 800000085d9bd067 PUD 859a0b067 PMD 0
[   71.284127] Oops: 0000 [#1] SMP PTI
[   71.288015] CPU: 12 PID: 2386 Comm: tc Not tainted 4.18.0-rc8.latest+ #131
[   71.295686] Hardware name: Dell Inc. PowerEdge R730/0WCJNT, BIOS 2.1.5 04/11/2016
[   71.304037] RIP: 0010:tcindex_delete+0x72/0x280 [cls_tcindex]
[   71.310446] Code: 00 31 f6 48 87 75 20 48 85 f6 74 11 48 8b 47 18 48 8b 40 08 48 8b 40 50 e8 fb a6 f8 fc 48 85 db 0f 84 dc 00 00 00 48 8b 73 18 <8b> 56 04 48 8d 7e 04 85 d2 0f 84 7b 01 00
[   71.331517] RSP: 0018:ffffb45207b3f898 EFLAGS: 00010282
[   71.337345] RAX: ffff8ad3d72d6360 RBX: ffff8acc84393680 RCX: 000000000000002e
[   71.345306] RDX: ffff8ad3d72c8570 RSI: 0000000000000000 RDI: ffff8ad847a45800
[   71.353277] RBP: ffff8acc84393688 R08: ffff8ad3d72c8400 R09: 0000000000000000
[   71.361238] R10: ffff8ad3de786e00 R11: 0000000000000000 R12: ffffb45207b3f8c7
[   71.369199] R13: ffff8ad3d93bd2a0 R14: 000000000000002e R15: ffff8ad3d72c9600
[   71.377161] FS:  00007f9d3ec3e740(0000) GS:ffff8ad3df980000(0000) knlGS:0000000000000000
[   71.386188] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   71.392597] CR2: 0000000000000004 CR3: 0000000852f06003 CR4: 00000000001606e0
[   71.400558] Call Trace:
[   71.403299]  tcindex_destroy_element+0x25/0x40 [cls_tcindex]
[   71.409611]  tcindex_walk+0xbb/0x110 [cls_tcindex]
[   71.414953]  tcindex_destroy+0x44/0x90 [cls_tcindex]
[   71.420492]  ? tcindex_delete+0x280/0x280 [cls_tcindex]
[   71.426323]  tcf_proto_destroy+0x16/0x40
[   71.430696]  tcf_chain_flush+0x51/0x70
[   71.434876]  tcf_block_put_ext.part.30+0x8f/0x1b0
[   71.440122]  tcf_block_put+0x4d/0x70
[   71.444108]  cbq_destroy+0x4d/0xd0 [sch_cbq]
[   71.448869]  qdisc_destroy+0x62/0x130
[   71.452951]  dsmark_destroy+0x2a/0x70 [sch_dsmark]
[   71.458300]  qdisc_destroy+0x62/0x130
[   71.462373]  qdisc_graft+0x3ba/0x470
[   71.466359]  tc_get_qdisc+0x2a6/0x2c0
[   71.470443]  ? cred_has_capability+0x7d/0x130
[   71.475307]  rtnetlink_rcv_msg+0x263/0x2d0
[   71.479875]  ? rtnl_calcit.isra.30+0x110/0x110
[   71.484832]  netlink_rcv_skb+0x4d/0x130
[   71.489109]  netlink_unicast+0x1a3/0x250
[   71.493482]  netlink_sendmsg+0x2ae/0x3a0
[   71.497859]  sock_sendmsg+0x36/0x40
[   71.501748]  ___sys_sendmsg+0x26f/0x2d0
[   71.506029]  ? handle_pte_fault+0x586/0xdf0
[   71.510694]  ? __handle_mm_fault+0x389/0x500
[   71.515457]  ? __sys_sendmsg+0x5e/0xa0
[   71.519636]  __sys_sendmsg+0x5e/0xa0
[   71.523626]  do_syscall_64+0x5b/0x180
[   71.527711]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
[   71.533345] RIP: 0033:0x7f9d3e257f10
[   71.537331] Code: c3 48 8b 05 82 6f 2c 00 f7 db 64 89 18 48 83 cb ff eb dd 0f 1f 80 00 00 00 00 83 3d 8d d0 2c 00 00 75 10 b8 2e 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 31 c3 48 83 ec 08 e8
[   71.558401] RSP: 002b:00007fff6f893398 EFLAGS: 00000246 ORIG_RAX: 000000000000002e
[   71.566848] RAX: ffffffffffffffda RBX: 000000005b71274d RCX: 00007f9d3e257f10
[   71.574810] RDX: 0000000000000000 RSI: 00007fff6f8933e0 RDI: 0000000000000003
[   71.582770] RBP: 00007fff6f8933e0 R08: 000000000000ffff R09: 0000000000000003
[   71.590729] R10: 00007fff6f892e20 R11: 0000000000000246 R12: 0000000000000000
[   71.598689] R13: 0000000000662ee0 R14: 0000000000000000 R15: 0000000000000000
[   71.606651] Modules linked in: sch_cbq cls_tcindex sch_dsmark xt_CHECKSUM iptable_mangle ipt_MASQUERADE iptable_nat nf_nat_ipv4 nf_nat nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_coni
[   71.685425]  libahci i2c_algo_bit i2c_core i40e libata dca mdio megaraid_sas dm_mirror dm_region_hash dm_log dm_mod
[   71.697075] CR2: 0000000000000004
[   71.700792] ---[ end trace f604eb1acacd978b ]---

Reproducer:
tc qdisc add dev lo handle 1:0 root dsmark indices 64 set_tc_index
tc filter add dev lo parent 1:0 protocol ip prio 1 tcindex mask 0xfc shift 2
tc qdisc add dev lo parent 1:0 handle 2:0 cbq bandwidth 10Mbit cell 8 avpkt 1000 mpu 64
tc class add dev lo parent 2:0 classid 2:1 cbq bandwidth 10Mbit rate 1500Kbit avpkt 1000 prio 1 bounded isolated allot 1514 weight 1 maxburst 10
tc filter add dev lo parent 2:0 protocol ip prio 1 handle 0x2e tcindex classid 2:1 pass_on
tc qdisc add dev lo parent 2:1 pfifo limit 5
tc qdisc del dev lo root

This is because in tcindex_set_parms, when there is no old_r, we set new
exts to cr.exts. And we didn't set it to filter when r == &new_filter_result.

Then in tcindex_delete() -> tcf_exts_get_net(), we will get NULL pointer
dereference as we didn't init exts.

Fix it by moving tcf_exts_change() after "if (old_r && old_r != r)" check.
Then we don't need "cr" as there is no errout after that.

Fixes: bf63ac73b3e13 ("net_sched: fix an oops in tcindex filter")
Reported-by: Li Shuang <shuali@redhat.com>
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
Acked-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/sched/cls_tcindex.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/net/sched/cls_tcindex.c b/net/sched/cls_tcindex.c
index e3b48ddadb45b..040d853f48b98 100644
--- a/net/sched/cls_tcindex.c
+++ b/net/sched/cls_tcindex.c
@@ -382,16 +382,13 @@ tcindex_set_parms(struct net *net, struct tcf_proto *tp, unsigned long base,
 		tcf_bind_filter(tp, &cr.res, base);
 	}
 
-	if (old_r)
-		tcf_exts_change(tp, &r->exts, &e);
-	else
-		tcf_exts_change(tp, &cr.exts, &e);
-
 	if (old_r && old_r != r)
 		tcindex_filter_result_init(old_r);
 
 	oldp = p;
 	r->res = cr.res;
+	tcf_exts_change(tp, &r->exts, &e);
+
 	rcu_assign_pointer(tp->root, cp);
 
 	if (r == &new_filter_result) {

From 4d0ae2c157d7429d5b5d65843e876594cab3ecaa Mon Sep 17 00:00:00 2001
From: Park Ju Hyung <qkrwngud825@gmail.com>
Date: Sat, 28 Jul 2018 03:16:42 +0900
Subject: [PATCH 1599/1852] ALSA: hda - Sleep for 10ms after entering D3 on
 Conexant codecs

commit f59cf9a0551dd954ad8b752461cf19d9789f4b1d upstream.

On rare occasions, we are still noticing that the internal speaker
spitting out spurious noises even after adding the problematic codec
to the list.

Adding a 10ms artificial delay before rebooting fixes the issue entirely.

Patch for Realtek codecs also adds the same amount of delay after
entering D3.

Signed-off-by: Park Ju Hyung <qkrwngud825@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_conexant.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index cb19af145f46e..fa9f85c1c6fb1 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -219,6 +219,7 @@ static void cx_auto_reboot_notify(struct hda_codec *codec)
 	snd_hda_codec_set_power_to_all(codec, codec->core.afg, AC_PWRST_D3);
 	snd_hda_codec_write(codec, codec->core.afg, 0,
 			    AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
+	msleep(10);
 }
 
 static void cx_auto_free(struct hda_codec *codec)

From 0f4bff703af95164486a7b2c9aebba538405f131 Mon Sep 17 00:00:00 2001
From: Park Ju Hyung <qkrwngud825@gmail.com>
Date: Sat, 28 Jul 2018 03:16:21 +0900
Subject: [PATCH 1600/1852] ALSA: hda - Turn CX8200 into D3 as well upon reboot

commit d77a4b4a5b0b2ebcbc9840995d91311ef28302ab upstream.

As an equivalent codec with CX20724,
CX8200 is also subject to the reboot bug.

Late 2017 and 2018 LG Gram and some HP Spectre laptops are known victims
to this issue, causing extremely loud noises upon reboot.

Now that we know that this bug is subject to multiple codecs,
fix the comment as well.

Signed-off-by: Park Ju Hyung <qkrwngud825@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/patch_conexant.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index fa9f85c1c6fb1..a1a3ce8c3f568 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -205,6 +205,7 @@ static void cx_auto_reboot_notify(struct hda_codec *codec)
 	struct conexant_spec *spec = codec->spec;
 
 	switch (codec->core.vendor_id) {
+	case 0x14f12008: /* CX8200 */
 	case 0x14f150f2: /* CX20722 */
 	case 0x14f150f4: /* CX20724 */
 		break;
@@ -212,7 +213,7 @@ static void cx_auto_reboot_notify(struct hda_codec *codec)
 		return;
 	}
 
-	/* Turn the CX20722 codec into D3 to avoid spurious noises
+	/* Turn the problematic codec into D3 to avoid spurious noises
 	   from the internal speaker during (and after) reboot */
 	cx_auto_turn_eapd(codec, spec->num_eapds, spec->eapds, false);
 

From 0d135a452798733bc533eee659a57dbb70dc0f3e Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 25 Jul 2018 17:10:11 +0200
Subject: [PATCH 1601/1852] ALSA: vx222: Fix invalid endian conversions

commit fff71a4c050ba46e305d910c837b99ba1728135e upstream.

The endian conversions used in vx2_dma_read() and vx2_dma_write() are
superfluous and even wrong on big-endian machines, as inl() and outl()
already do conversions.  Kill them.

Spotted by sparse, a warning like:
  sound/pci/vx222/vx222_ops.c:278:30: warning: incorrect type in argument 1 (different base types)

Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/vx222/vx222_ops.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sound/pci/vx222/vx222_ops.c b/sound/pci/vx222/vx222_ops.c
index 8e457ea27f891..1997bb048d8b9 100644
--- a/sound/pci/vx222/vx222_ops.c
+++ b/sound/pci/vx222/vx222_ops.c
@@ -275,7 +275,7 @@ static void vx2_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 		length >>= 2; /* in 32bit words */
 		/* Transfer using pseudo-dma. */
 		for (; length > 0; length--) {
-			outl(cpu_to_le32(*addr), port);
+			outl(*addr, port);
 			addr++;
 		}
 		addr = (u32 *)runtime->dma_area;
@@ -285,7 +285,7 @@ static void vx2_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 	count >>= 2; /* in 32bit words */
 	/* Transfer using pseudo-dma. */
 	for (; count > 0; count--) {
-		outl(cpu_to_le32(*addr), port);
+		outl(*addr, port);
 		addr++;
 	}
 
@@ -313,7 +313,7 @@ static void vx2_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 		length >>= 2; /* in 32bit words */
 		/* Transfer using pseudo-dma. */
 		for (; length > 0; length--)
-			*addr++ = le32_to_cpu(inl(port));
+			*addr++ = inl(port);
 		addr = (u32 *)runtime->dma_area;
 		pipe->hw_ptr = 0;
 	}
@@ -321,7 +321,7 @@ static void vx2_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 	count >>= 2; /* in 32bit words */
 	/* Transfer using pseudo-dma. */
 	for (; count > 0; count--)
-		*addr++ = le32_to_cpu(inl(port));
+		*addr++ = inl(port);
 
 	vx2_release_pseudo_dma(chip);
 }

From cb9cc4024766702c603338a63722a7a49cebac9a Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Thu, 26 Jul 2018 14:27:59 +0200
Subject: [PATCH 1602/1852] ALSA: virmidi: Fix too long output trigger loop

commit 50e9ffb1996a5d11ff5040a266585bad4ceeca0a upstream.

The virmidi output trigger tries to parse the all available bytes and
process sequencer events as much as possible.  In a normal situation,
this is supposed to be relatively short, but a program may give a huge
buffer and it'll take a long time in a single spin lock, which may
eventually lead to a soft lockup.

This patch simply adds a workaround, a cond_resched() call in the loop
if applicable.  A better solution would be to move the event processor
into a work, but let's put a duct-tape quickly at first.

Reported-and-tested-by: Dae R. Jeong <threeearcat@gmail.com>
Reported-by: syzbot+619d9f40141d826b097e@syzkaller.appspotmail.com
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/seq/seq_virmidi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/sound/core/seq/seq_virmidi.c b/sound/core/seq/seq_virmidi.c
index ef494ffc13697..975a7c939d2fc 100644
--- a/sound/core/seq/seq_virmidi.c
+++ b/sound/core/seq/seq_virmidi.c
@@ -163,6 +163,7 @@ static void snd_virmidi_output_trigger(struct snd_rawmidi_substream *substream,
 	int count, res;
 	unsigned char buf[32], *pbuf;
 	unsigned long flags;
+	bool check_resched = !in_atomic();
 
 	if (up) {
 		vmidi->trigger = 1;
@@ -200,6 +201,15 @@ static void snd_virmidi_output_trigger(struct snd_rawmidi_substream *substream,
 					vmidi->event.type = SNDRV_SEQ_EVENT_NONE;
 				}
 			}
+			if (!check_resched)
+				continue;
+			/* do temporary unlock & cond_resched() for avoiding
+			 * CPU soft lockup, which may happen via a write from
+			 * a huge rawmidi buffer
+			 */
+			spin_unlock_irqrestore(&substream->runtime->lock, flags);
+			cond_resched();
+			spin_lock_irqsave(&substream->runtime->lock, flags);
 		}
 	out:
 		spin_unlock_irqrestore(&substream->runtime->lock, flags);

From 0c04871e5273c9150cba5a0d74801890399bcade Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 25 Jul 2018 17:59:26 +0200
Subject: [PATCH 1603/1852] ALSA: cs5535audio: Fix invalid endian conversion

commit 69756930f2de0457d51db7d505a1e4f40e9fd116 upstream.

One place in cs5535audio_build_dma_packets() does an extra conversion
via cpu_to_le32(); namely jmpprd_addr is passed to setup_prd() ops,
which writes the value via cs_writel().  That is, the callback does
the conversion by itself, and we don't need to convert beforehand.

This patch fixes that bogus conversion.

Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/cs5535audio/cs5535audio.h     | 6 +++---
 sound/pci/cs5535audio/cs5535audio_pcm.c | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/sound/pci/cs5535audio/cs5535audio.h b/sound/pci/cs5535audio/cs5535audio.h
index 0579daa622157..425d1b6640293 100644
--- a/sound/pci/cs5535audio/cs5535audio.h
+++ b/sound/pci/cs5535audio/cs5535audio.h
@@ -66,9 +66,9 @@ struct cs5535audio_dma_ops {
 };
 
 struct cs5535audio_dma_desc {
-	u32 addr;
-	u16 size;
-	u16 ctlreserved;
+	__le32 addr;
+	__le16 size;
+	__le16 ctlreserved;
 };
 
 struct cs5535audio_dma {
diff --git a/sound/pci/cs5535audio/cs5535audio_pcm.c b/sound/pci/cs5535audio/cs5535audio_pcm.c
index 9c2dc911d8d7f..709f1c584d3ee 100644
--- a/sound/pci/cs5535audio/cs5535audio_pcm.c
+++ b/sound/pci/cs5535audio/cs5535audio_pcm.c
@@ -158,8 +158,8 @@ static int cs5535audio_build_dma_packets(struct cs5535audio *cs5535au,
 	lastdesc->addr = cpu_to_le32((u32) dma->desc_buf.addr);
 	lastdesc->size = 0;
 	lastdesc->ctlreserved = cpu_to_le16(PRD_JMP);
-	jmpprd_addr = cpu_to_le32(lastdesc->addr +
-				  (sizeof(struct cs5535audio_dma_desc)*periods));
+	jmpprd_addr = (u32)dma->desc_buf.addr +
+		sizeof(struct cs5535audio_dma_desc) * periods;
 
 	dma->substream = substream;
 	dma->period_bytes = period_bytes;

From 2c1ac9738c840dfa431f63811ea595e20062a4aa Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Thu, 2 Aug 2018 14:04:45 +0200
Subject: [PATCH 1604/1852] ALSA: hda: Correct Asrock B85M-ITX power_save
 blacklist entry

commit 8e82a728792bf66b9f0a29c9d4c4b0630f7b9c79 upstream.

I added the subsys product-id for the HDMI HDA device rather then for
the PCH one, this commit fixes this.

BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1525104
Cc: stable@vger.kernel.org
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pci/hda/hda_intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index d0b55c866370b..cabccb10210ef 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2069,7 +2069,7 @@ static int azx_probe(struct pci_dev *pci,
  */
 static struct snd_pci_quirk power_save_blacklist[] = {
 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
-	SND_PCI_QUIRK(0x1849, 0x0c0c, "Asrock B85M-ITX", 0),
+	SND_PCI_QUIRK(0x1849, 0xc892, "Asrock B85M-ITX", 0),
 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
 	SND_PCI_QUIRK(0x1043, 0x8733, "Asus Prime X370-Pro", 0),
 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1572975 */

From 1f83afccd712fa49b0dee7ba2aad89d0c6904191 Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Thu, 19 Jul 2018 11:01:04 +0200
Subject: [PATCH 1605/1852] ALSA: memalloc: Don't exceed over the requested
 size

commit dfef01e150824b0e6da750cacda8958188d29aea upstream.

snd_dma_alloc_pages_fallback() tries to allocate pages again when the
allocation fails with reduced size.  But the first try actually
*increases* the size to power-of-two, which may give back a larger
chunk than the requested size.  This confuses the callers, e.g. sgbuf
assumes that the size is equal or less, and it may result in a bad
loop due to the underflow and eventually lead to Oops.

The code of this function seems incorrectly assuming the usage of
get_order().  We need to decrease at first, then align to
power-of-two.

Reported-and-tested-by: he, bo <bo.he@intel.com>
Reported-by: zhang jun <jun.zhang@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/core/memalloc.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/sound/core/memalloc.c b/sound/core/memalloc.c
index 46ff830b6f532..201cecc828a83 100644
--- a/sound/core/memalloc.c
+++ b/sound/core/memalloc.c
@@ -249,16 +249,12 @@ int snd_dma_alloc_pages_fallback(int type, struct device *device, size_t size,
 	int err;
 
 	while ((err = snd_dma_alloc_pages(type, device, size, dmab)) < 0) {
-		size_t aligned_size;
 		if (err != -ENOMEM)
 			return err;
 		if (size <= PAGE_SIZE)
 			return -ENOMEM;
-		aligned_size = PAGE_SIZE << get_order(size);
-		if (size != aligned_size)
-			size = aligned_size;
-		else
-			size >>= 1;
+		size >>= 1;
+		size = PAGE_SIZE << get_order(size);
 	}
 	if (! dmab->area)
 		return -ENOMEM;

From a9858fb72e91440656214c5437097f2a81e9176f Mon Sep 17 00:00:00 2001
From: Takashi Iwai <tiwai@suse.de>
Date: Wed, 25 Jul 2018 17:11:38 +0200
Subject: [PATCH 1606/1852] ALSA: vxpocket: Fix invalid endian conversions

commit 3acd3e3bab95ec3622ff98da313290ee823a0f68 upstream.

The endian conversions used in vxp_dma_read() and vxp_dma_write() are
superfluous and even wrong on big-endian machines, as inw() and outw()
already do conversions.  Kill them.

Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/pcmcia/vx/vxp_ops.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/sound/pcmcia/vx/vxp_ops.c b/sound/pcmcia/vx/vxp_ops.c
index 56aa1ba73ccc1..49a883341efff 100644
--- a/sound/pcmcia/vx/vxp_ops.c
+++ b/sound/pcmcia/vx/vxp_ops.c
@@ -375,7 +375,7 @@ static void vxp_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 		length >>= 1; /* in 16bit words */
 		/* Transfer using pseudo-dma. */
 		for (; length > 0; length--) {
-			outw(cpu_to_le16(*addr), port);
+			outw(*addr, port);
 			addr++;
 		}
 		addr = (unsigned short *)runtime->dma_area;
@@ -385,7 +385,7 @@ static void vxp_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 	count >>= 1; /* in 16bit words */
 	/* Transfer using pseudo-dma. */
 	for (; count > 0; count--) {
-		outw(cpu_to_le16(*addr), port);
+		outw(*addr, port);
 		addr++;
 	}
 	vx_release_pseudo_dma(chip);
@@ -417,7 +417,7 @@ static void vxp_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 		length >>= 1; /* in 16bit words */
 		/* Transfer using pseudo-dma. */
 		for (; length > 0; length--)
-			*addr++ = le16_to_cpu(inw(port));
+			*addr++ = inw(port);
 		addr = (unsigned short *)runtime->dma_area;
 		pipe->hw_ptr = 0;
 	}
@@ -425,12 +425,12 @@ static void vxp_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
 	count >>= 1; /* in 16bit words */
 	/* Transfer using pseudo-dma. */
 	for (; count > 1; count--)
-		*addr++ = le16_to_cpu(inw(port));
+		*addr++ = inw(port);
 	/* Disable DMA */
 	pchip->regDIALOG &= ~VXP_DLG_DMAREAD_SEL_MASK;
 	vx_outb(chip, DIALOG, pchip->regDIALOG);
 	/* Read the last word (16 bits) */
-	*addr = le16_to_cpu(inw(port));
+	*addr = inw(port);
 	/* Disable 16-bit accesses */
 	pchip->regDIALOG &= ~VXP_DLG_DMA16_SEL_MASK;
 	vx_outb(chip, DIALOG, pchip->regDIALOG);

From bbf7e17f29c4c34fffeb71be8b00afa13bd4751d Mon Sep 17 00:00:00 2001
From: John Ogness <john.ogness@linutronix.de>
Date: Sun, 24 Jun 2018 00:32:11 +0200
Subject: [PATCH 1607/1852] USB: serial: sierra: fix potential deadlock at
 close

commit e60870012e5a35b1506d7b376fddfb30e9da0b27 upstream.

The portdata spinlock can be taken in interrupt context (via
sierra_outdat_callback()).
Disable interrupts when taking the portdata spinlock when discarding
deferred URBs during close to prevent a possible deadlock.

Fixes: 014333f77c0b ("USB: sierra: fix urb and memory leak on disconnect")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: John Ogness <john.ogness@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
[ johan: amend commit message and add fixes and stable tags ]
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/sierra.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index 07d1ecd564f79..8960a46c83bb5 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -790,9 +790,9 @@ static void sierra_close(struct usb_serial_port *port)
 		kfree(urb->transfer_buffer);
 		usb_free_urb(urb);
 		usb_autopm_put_interface_async(serial->interface);
-		spin_lock(&portdata->lock);
+		spin_lock_irq(&portdata->lock);
 		portdata->outstanding_urbs--;
-		spin_unlock(&portdata->lock);
+		spin_unlock_irq(&portdata->lock);
 	}
 
 	sierra_stop_rx_urbs(port);

From 26497326dd1f34a813075e19e25c85ea4fa5021b Mon Sep 17 00:00:00 2001
From: Aleksander Morgado <aleksander@aleksander.es>
Date: Tue, 24 Jul 2018 01:34:01 +0200
Subject: [PATCH 1608/1852] USB: option: add support for DW5821e

commit 7bab01ecc6c43da882333c6db39741cb43677004 upstream.

The device exposes AT, NMEA and DIAG ports in both USB configurations.

The patch explicitly ignores interfaces 0 and 1, as they're bound to
other drivers already; and also interface 6, which is a GNSS interface
for which we don't have a driver yet.

T:  Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#= 18 Spd=480 MxCh= 0
D:  Ver= 2.10 Cls=ef(misc ) Sub=02 Prot=01 MxPS=64 #Cfgs=  2
P:  Vendor=413c ProdID=81d7 Rev=03.18
S:  Manufacturer=DELL
S:  Product=DW5821e Snapdragon X20 LTE
S:  SerialNumber=0123456789ABCDEF
C:  #Ifs= 7 Cfg#= 2 Atr=a0 MxPwr=500mA
I:  If#= 0 Alt= 0 #EPs= 1 Cls=02(commc) Sub=0e Prot=00 Driver=cdc_mbim
I:  If#= 1 Alt= 1 #EPs= 2 Cls=0a(data ) Sub=00 Prot=02 Driver=cdc_mbim
I:  If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 4 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 5 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=option
I:  If#= 6 Alt= 0 #EPs= 1 Cls=ff(vend.) Sub=ff Prot=ff Driver=(none)

T:  Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#= 16 Spd=480 MxCh= 0
D:  Ver= 2.10 Cls=ef(misc ) Sub=02 Prot=01 MxPS=64 #Cfgs=  2
P:  Vendor=413c ProdID=81d7 Rev=03.18
S:  Manufacturer=DELL
S:  Product=DW5821e Snapdragon X20 LTE
S:  SerialNumber=0123456789ABCDEF
C:  #Ifs= 6 Cfg#= 1 Atr=a0 MxPwr=500mA
I:  If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan
I:  If#= 1 Alt= 0 #EPs= 1 Cls=03(HID  ) Sub=00 Prot=00 Driver=usbhid
I:  If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 4 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option
I:  If#= 5 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=option

Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/serial/option.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index d982c455e18e5..2b81939fecd7d 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -199,6 +199,8 @@ static void option_instat_callback(struct urb *urb);
 #define DELL_PRODUCT_5800_V2_MINICARD_VZW	0x8196  /* Novatel E362 */
 #define DELL_PRODUCT_5804_MINICARD_ATT		0x819b  /* Novatel E371 */
 
+#define DELL_PRODUCT_5821E			0x81d7
+
 #define KYOCERA_VENDOR_ID			0x0c88
 #define KYOCERA_PRODUCT_KPC650			0x17da
 #define KYOCERA_PRODUCT_KPC680			0x180a
@@ -1033,6 +1035,8 @@ static const struct usb_device_id option_ids[] = {
 	{ USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_MINICARD_VZW, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_V2_MINICARD_VZW, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5804_MINICARD_ATT, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5821E),
+	  .driver_info = RSVD(0) | RSVD(1) | RSVD(6) },
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_E100A) },	/* ADU-E100, ADU-310 */
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) },
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) },

From b3da1f965802de7a8ffff6e63f0b714092749c5d Mon Sep 17 00:00:00 2001
From: Zhang Rui <rui.zhang@intel.com>
Date: Mon, 16 Jan 2017 10:55:45 +0800
Subject: [PATCH 1609/1852] ACPI: save NVS memory for Lenovo G50-45

commit cbc00c1310d34139a63946482b40a6b261a03fb9 upstream.

In commit 821d6f0359b0 (ACPI / sleep: Do not save NVS for new machines to
accelerate S3), to optimize S3 suspend/resume speed, code is introduced
to ignore NVS memory saving during S3 for all the platforms later than
2012.

But, Lenovo G50-45, a platform released in 2015, still needs NVS memory
saving during S3. A quirk is introduced for this platform.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=189431
Tested-by: Przemek <soprwa@gmail.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[ rjw: Drop unnecessary code ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/sleep.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index e3322adaaae00..84ddae30fc340 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -124,6 +124,12 @@ void __init acpi_nvs_nosave_s3(void)
 	nvs_nosave_s3 = true;
 }
 
+static int __init init_nvs_save_s3(const struct dmi_system_id *d)
+{
+	nvs_nosave_s3 = false;
+	return 0;
+}
+
 /*
  * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
  * user to request that behavior by using the 'acpi_old_suspend_ordering'
@@ -318,6 +324,19 @@ static struct dmi_system_id acpisleep_dmi_table[] __initdata = {
 		DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"),
 		},
 	},
+	/*
+	 * https://bugzilla.kernel.org/show_bug.cgi?id=189431
+	 * Lenovo G50-45 is a platform later than 2012, but needs nvs memory
+	 * saving during S3.
+	 */
+	{
+	.callback = init_nvs_save_s3,
+	.ident = "Lenovo G50-45",
+	.matches = {
+		DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+		DMI_MATCH(DMI_PRODUCT_NAME, "80E3"),
+		},
+	},
 	{},
 };
 

From f3a4a0938a3f18ea0549bb8531be5af539a81ef2 Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Mon, 9 Jul 2018 14:03:55 +0200
Subject: [PATCH 1610/1852] ACPI / PM: save NVS memory for ASUS 1025C laptop

commit 231f9415001138a000cd0f881c46654b7ea3f8c5 upstream.

Every time I tried to upgrade my laptop from 3.10.x to 4.x I faced an
issue by which the fan would run at full speed upon resume. Bisecting
it showed me the issue was introduced in 3.17 by commit 821d6f0359b0
(ACPI / sleep: Do not save NVS for new machines to accelerate S3). This
code only affects machines built starting as of 2012, but this Asus
1025C laptop was made in 2012 and apparently needs the NVS data to be
saved, otherwise the CPU's thermal state is not properly reported on
resume and the fan runs at full speed upon resume.

Here's a very simple way to check if such a machine is affected :

  # cat /sys/class/thermal/thermal_zone0/temp
  55000

  ( now suspend, wait one second and resume )

  # cat /sys/class/thermal/thermal_zone0/temp
  0

  (and after ~15 seconds the fan starts to spin)

Let's apply the same quirk as commit cbc00c13 (ACPI: save NVS memory
for Lenovo G50-45) and reuse the function it provides. Note that this
commit was already backported to 4.9.x but not 4.4.x.

Cc: 3.17+ <stable@vger.kernel.org> # 3.17+: requires cbc00c13
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/acpi/sleep.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 84ddae30fc340..4f07029de2096 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -324,6 +324,14 @@ static struct dmi_system_id acpisleep_dmi_table[] __initdata = {
 		DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"),
 		},
 	},
+	{
+	.callback = init_nvs_save_s3,
+	.ident = "Asus 1025C",
+	.matches = {
+		DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
+		DMI_MATCH(DMI_PRODUCT_NAME, "1025C"),
+		},
+	},
 	/*
 	 * https://bugzilla.kernel.org/show_bug.cgi?id=189431
 	 * Lenovo G50-45 is a platform later than 2012, but needs nvs memory

From 8d8bd8803bd8648b2594a0d12158ff6b75f0bd33 Mon Sep 17 00:00:00 2001
From: Chen Hu <hu1.chen@intel.com>
Date: Fri, 27 Jul 2018 18:32:41 +0800
Subject: [PATCH 1611/1852] serial: 8250_dw: always set baud rate in
 dw8250_set_termios

commit dfcab6ba573445c703235ab6c83758eec12d7f28 upstream.

dw8250_set_termios() doesn't set baud rate if the arg "old ktermios" is
NULL. This happens during resume.
Call Trace:
...
[   54.928108] dw8250_set_termios+0x162/0x170
[   54.928114] serial8250_set_termios+0x17/0x20
[   54.928117] uart_change_speed+0x64/0x160
[   54.928119] uart_resume_port
...

So the baud rate is not restored after S3 and breaks the apps who use
UART, for example, console and bluetooth etc.

We address this issue by setting the baud rate irrespective of arg
"old", just like the drivers for other 8250 IPs. This is tested with
Intel Broxton platform.

Signed-off-by: Chen Hu <hu1.chen@intel.com>
Fixes: 4e26b134bd17 ("serial: 8250_dw: clock rate handling for all ACPI platforms")
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: stable <stable@vger.kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/tty/serial/8250/8250_dw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 1ebbe7c140c24..90027770e463b 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -248,7 +248,7 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
 #endif
 	int ret;
 
-	if (IS_ERR(d->clk) || !old)
+	if (IS_ERR(d->clk))
 		goto out;
 
 	clk_disable_unprepare(d->clk);

From 1d362ee2005f829fa86a083e44d799657a0a1f66 Mon Sep 17 00:00:00 2001
From: Tom Lendacky <thomas.lendacky@amd.com>
Date: Mon, 17 Jul 2017 16:10:06 -0500
Subject: [PATCH 1612/1852] x86/mm: Simplify p[g4um]d_page() macros
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit fd7e315988b784509ba3f1b42f539bd0b1fca9bb upstream.

Create a pgd_pfn() macro similar to the p[4um]d_pfn() macros and then
use the p[g4um]d_pfn() macros in the p[g4um]d_page() macros instead of
duplicating the code.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Alexander Potapenko <glider@google.com>
Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Larry Woodman <lwoodman@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Radim Kr�mář <rkrcmar@redhat.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Toshimitsu Kani <toshi.kani@hpe.com>
Cc: kasan-dev@googlegroups.com
Cc: kvm@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-efi@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/e61eb533a6d0aac941db2723d8aa63ef6b882dee.1500319216.git.thomas.lendacky@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
[Backported to 4.9 stable by AK, suggested by Michael Hocko]
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/pgtable.h | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 4de6c282c02ae..68a55273ce0f4 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -173,6 +173,11 @@ static inline unsigned long pud_pfn(pud_t pud)
 	return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 }
 
+static inline unsigned long pgd_pfn(pgd_t pgd)
+{
+	return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
+}
+
 #define pte_page(pte)	pfn_to_page(pte_pfn(pte))
 
 static inline int pmd_large(pmd_t pte)
@@ -578,8 +583,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
  * Currently stuck as a macro due to indirect forward reference to
  * linux/mmzone.h's __section_mem_map_addr() definition:
  */
-#define pmd_page(pmd)		\
-	pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
+#define pmd_page(pmd)	pfn_to_page(pmd_pfn(pmd))
 
 /*
  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
@@ -647,8 +651,7 @@ static inline unsigned long pud_page_vaddr(pud_t pud)
  * Currently stuck as a macro due to indirect forward reference to
  * linux/mmzone.h's __section_mem_map_addr() definition:
  */
-#define pud_page(pud)		\
-	pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
+#define pud_page(pud)	pfn_to_page(pud_pfn(pud))
 
 /* Find an entry in the second-level page table.. */
 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
@@ -688,7 +691,7 @@ static inline unsigned long pgd_page_vaddr(pgd_t pgd)
  * Currently stuck as a macro due to indirect forward reference to
  * linux/mmzone.h's __section_mem_map_addr() definition:
  */
-#define pgd_page(pgd)		pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
+#define pgd_page(pgd)		pfn_to_page(pgd_pfn(pgd))
 
 /* to find an entry in a page-table-directory. */
 static inline unsigned long pud_index(unsigned long address)

From 17e8a88df6d45e074cf565a721a0eda1f72b6e8a Mon Sep 17 00:00:00 2001
From: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Date: Sun, 15 Jul 2018 20:36:50 +0100
Subject: [PATCH 1613/1852] Bluetooth: avoid killing an already killed socket

commit 4e1a720d0312fd510699032c7694a362a010170f upstream.

slub debug reported:

[  440.648642] =============================================================================
[  440.648649] BUG kmalloc-1024 (Tainted: G    BU     O   ): Poison overwritten
[  440.648651] -----------------------------------------------------------------------------

[  440.648655] INFO: 0xe70f4bec-0xe70f4bec. First byte 0x6a instead of 0x6b
[  440.648665] INFO: Allocated in sk_prot_alloc+0x6b/0xc6 age=33155 cpu=1 pid=1047
[  440.648671] 	___slab_alloc.constprop.24+0x1fc/0x292
[  440.648675] 	__slab_alloc.isra.18.constprop.23+0x1c/0x25
[  440.648677] 	__kmalloc+0xb6/0x17f
[  440.648680] 	sk_prot_alloc+0x6b/0xc6
[  440.648683] 	sk_alloc+0x1e/0xa1
[  440.648700] 	sco_sock_alloc.constprop.6+0x26/0xaf [bluetooth]
[  440.648716] 	sco_connect_cfm+0x166/0x281 [bluetooth]
[  440.648731] 	hci_conn_request_evt.isra.53+0x258/0x281 [bluetooth]
[  440.648746] 	hci_event_packet+0x28b/0x2326 [bluetooth]
[  440.648759] 	hci_rx_work+0x161/0x291 [bluetooth]
[  440.648764] 	process_one_work+0x163/0x2b2
[  440.648767] 	worker_thread+0x1a9/0x25c
[  440.648770] 	kthread+0xf8/0xfd
[  440.648774] 	ret_from_fork+0x2e/0x38
[  440.648779] INFO: Freed in __sk_destruct+0xd3/0xdf age=3815 cpu=1 pid=1047
[  440.648782] 	__slab_free+0x4b/0x27a
[  440.648784] 	kfree+0x12e/0x155
[  440.648787] 	__sk_destruct+0xd3/0xdf
[  440.648790] 	sk_destruct+0x27/0x29
[  440.648793] 	__sk_free+0x75/0x91
[  440.648795] 	sk_free+0x1c/0x1e
[  440.648810] 	sco_sock_kill+0x5a/0x5f [bluetooth]
[  440.648825] 	sco_conn_del+0x8e/0xba [bluetooth]
[  440.648840] 	sco_disconn_cfm+0x3a/0x41 [bluetooth]
[  440.648855] 	hci_event_packet+0x45e/0x2326 [bluetooth]
[  440.648868] 	hci_rx_work+0x161/0x291 [bluetooth]
[  440.648872] 	process_one_work+0x163/0x2b2
[  440.648875] 	worker_thread+0x1a9/0x25c
[  440.648877] 	kthread+0xf8/0xfd
[  440.648880] 	ret_from_fork+0x2e/0x38
[  440.648884] INFO: Slab 0xf4718580 objects=27 used=27 fp=0x  (null) flags=0x40008100
[  440.648886] INFO: Object 0xe70f4b88 @offset=19336 fp=0xe70f54f8

When KASAN was enabled, it reported:

[  210.096613] ==================================================================
[  210.096634] BUG: KASAN: use-after-free in ex_handler_refcount+0x5b/0x127
[  210.096641] Write of size 4 at addr ffff880107e17160 by task kworker/u9:1/2040

[  210.096651] CPU: 1 PID: 2040 Comm: kworker/u9:1 Tainted: G     U     O    4.14.47-20180606+ #2
[  210.096654] Hardware name: , BIOS 2017.01-00087-g43e04de 08/30/2017
[  210.096693] Workqueue: hci0 hci_rx_work [bluetooth]
[  210.096698] Call Trace:
[  210.096711]  dump_stack+0x46/0x59
[  210.096722]  print_address_description+0x6b/0x23b
[  210.096729]  ? ex_handler_refcount+0x5b/0x127
[  210.096736]  kasan_report+0x220/0x246
[  210.096744]  ex_handler_refcount+0x5b/0x127
[  210.096751]  ? ex_handler_clear_fs+0x85/0x85
[  210.096757]  fixup_exception+0x8c/0x96
[  210.096766]  do_trap+0x66/0x2c1
[  210.096773]  do_error_trap+0x152/0x180
[  210.096781]  ? fixup_bug+0x78/0x78
[  210.096817]  ? hci_debugfs_create_conn+0x244/0x26a [bluetooth]
[  210.096824]  ? __schedule+0x113b/0x1453
[  210.096830]  ? sysctl_net_exit+0xe/0xe
[  210.096837]  ? __wake_up_common+0x343/0x343
[  210.096843]  ? insert_work+0x107/0x163
[  210.096850]  invalid_op+0x1b/0x40
[  210.096888] RIP: 0010:hci_debugfs_create_conn+0x244/0x26a [bluetooth]
[  210.096892] RSP: 0018:ffff880094a0f970 EFLAGS: 00010296
[  210.096898] RAX: 0000000000000000 RBX: ffff880107e170e8 RCX: ffff880107e17160
[  210.096902] RDX: 000000000000002f RSI: ffff88013b80ed40 RDI: ffffffffa058b940
[  210.096906] RBP: ffff88011b2b0578 R08: 00000000852f0ec9 R09: ffffffff81cfcf9b
[  210.096909] R10: 00000000d21bdad7 R11: 0000000000000001 R12: ffff8800967b0488
[  210.096913] R13: ffff880107e17168 R14: 0000000000000068 R15: ffff8800949c0008
[  210.096920]  ? __sk_destruct+0x2c6/0x2d4
[  210.096959]  hci_event_packet+0xff5/0x7de2 [bluetooth]
[  210.096969]  ? __local_bh_enable_ip+0x43/0x5b
[  210.097004]  ? l2cap_sock_recv_cb+0x158/0x166 [bluetooth]
[  210.097039]  ? hci_le_meta_evt+0x2bb3/0x2bb3 [bluetooth]
[  210.097075]  ? l2cap_ertm_init+0x94e/0x94e [bluetooth]
[  210.097093]  ? xhci_urb_enqueue+0xbd8/0xcf5 [xhci_hcd]
[  210.097102]  ? __accumulate_pelt_segments+0x24/0x33
[  210.097109]  ? __accumulate_pelt_segments+0x24/0x33
[  210.097115]  ? __update_load_avg_se.isra.2+0x217/0x3a4
[  210.097122]  ? set_next_entity+0x7c3/0x12cd
[  210.097128]  ? pick_next_entity+0x25e/0x26c
[  210.097135]  ? pick_next_task_fair+0x2ca/0xc1a
[  210.097141]  ? switch_mm_irqs_off+0x346/0xb4f
[  210.097147]  ? __switch_to+0x769/0xbc4
[  210.097153]  ? compat_start_thread+0x66/0x66
[  210.097188]  ? hci_conn_check_link_mode+0x1cd/0x1cd [bluetooth]
[  210.097195]  ? finish_task_switch+0x392/0x431
[  210.097228]  ? hci_rx_work+0x154/0x487 [bluetooth]
[  210.097260]  hci_rx_work+0x154/0x487 [bluetooth]
[  210.097269]  process_one_work+0x579/0x9e9
[  210.097277]  worker_thread+0x68f/0x804
[  210.097285]  kthread+0x31c/0x32b
[  210.097292]  ? rescuer_thread+0x70c/0x70c
[  210.097299]  ? kthread_create_on_node+0xa3/0xa3
[  210.097306]  ret_from_fork+0x35/0x40

[  210.097314] Allocated by task 2040:
[  210.097323]  kasan_kmalloc.part.1+0x51/0xc7
[  210.097328]  __kmalloc+0x17f/0x1b6
[  210.097335]  sk_prot_alloc+0xf2/0x1a3
[  210.097340]  sk_alloc+0x22/0x297
[  210.097375]  sco_sock_alloc.constprop.7+0x23/0x202 [bluetooth]
[  210.097410]  sco_connect_cfm+0x2d0/0x566 [bluetooth]
[  210.097443]  hci_conn_request_evt.isra.53+0x6d3/0x762 [bluetooth]
[  210.097476]  hci_event_packet+0x85e/0x7de2 [bluetooth]
[  210.097507]  hci_rx_work+0x154/0x487 [bluetooth]
[  210.097512]  process_one_work+0x579/0x9e9
[  210.097517]  worker_thread+0x68f/0x804
[  210.097523]  kthread+0x31c/0x32b
[  210.097529]  ret_from_fork+0x35/0x40

[  210.097533] Freed by task 2040:
[  210.097539]  kasan_slab_free+0xb3/0x15e
[  210.097544]  kfree+0x103/0x1a9
[  210.097549]  __sk_destruct+0x2c6/0x2d4
[  210.097584]  sco_conn_del.isra.1+0xba/0x10e [bluetooth]
[  210.097617]  hci_event_packet+0xff5/0x7de2 [bluetooth]
[  210.097648]  hci_rx_work+0x154/0x487 [bluetooth]
[  210.097653]  process_one_work+0x579/0x9e9
[  210.097658]  worker_thread+0x68f/0x804
[  210.097663]  kthread+0x31c/0x32b
[  210.097670]  ret_from_fork+0x35/0x40

[  210.097676] The buggy address belongs to the object at ffff880107e170e8
 which belongs to the cache kmalloc-1024 of size 1024
[  210.097681] The buggy address is located 120 bytes inside of
 1024-byte region [ffff880107e170e8, ffff880107e174e8)
[  210.097683] The buggy address belongs to the page:
[  210.097689] page:ffffea00041f8400 count:1 mapcount:0 mapping:          (null) index:0xffff880107e15b68 compound_mapcount: 0
[  210.110194] flags: 0x8000000000008100(slab|head)
[  210.115441] raw: 8000000000008100 0000000000000000 ffff880107e15b68 0000000100170016
[  210.115448] raw: ffffea0004a47620 ffffea0004b48e20 ffff88013b80ed40 0000000000000000
[  210.115451] page dumped because: kasan: bad access detected

[  210.115454] Memory state around the buggy address:
[  210.115460]  ffff880107e17000: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[  210.115465]  ffff880107e17080: fc fc fc fc fc fc fc fc fc fc fc fc fc fb fb fb
[  210.115469] >ffff880107e17100: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  210.115472]                                                        ^
[  210.115477]  ffff880107e17180: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  210.115481]  ffff880107e17200: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  210.115483] ==================================================================

And finally when BT_DBG() and ftrace was enabled it showed:

       <...>-14979 [001] ....   186.104191: sco_sock_kill <-sco_sock_close
       <...>-14979 [001] ....   186.104191: sco_sock_kill <-sco_sock_release
       <...>-14979 [001] ....   186.104192: sco_sock_kill: sk ef0497a0 state 9
       <...>-14979 [001] ....   186.104193: bt_sock_unlink <-sco_sock_kill
kworker/u9:2-792   [001] ....   186.104246: sco_sock_kill <-sco_conn_del
kworker/u9:2-792   [001] ....   186.104248: sco_sock_kill: sk ef0497a0 state 9
kworker/u9:2-792   [001] ....   186.104249: bt_sock_unlink <-sco_sock_kill
kworker/u9:2-792   [001] ....   186.104250: sco_sock_destruct <-__sk_destruct
kworker/u9:2-792   [001] ....   186.104250: sco_sock_destruct: sk ef0497a0
kworker/u9:2-792   [001] ....   186.104860: hci_conn_del <-hci_event_packet
kworker/u9:2-792   [001] ....   186.104864: hci_conn_del: hci0 hcon ef0484c0 handle 266

Only in the failed case, sco_sock_kill() gets called with the same sock
pointer two times. Add a check for SOCK_DEAD to avoid continue killing
a socket which has already been killed.

Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bluetooth/sco.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index f52bcbf2e58cd..2209fd2ff2e32 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -392,7 +392,8 @@ static void sco_sock_cleanup_listen(struct sock *parent)
  */
 static void sco_sock_kill(struct sock *sk)
 {
-	if (!sock_flag(sk, SOCK_ZAPPED) || sk->sk_socket)
+	if (!sock_flag(sk, SOCK_ZAPPED) || sk->sk_socket ||
+	    sock_flag(sk, SOCK_DEAD))
 		return;
 
 	BT_DBG("sk %p state %d", sk, sk->sk_state);

From ebb7e6357e348331e9b34304d4036c2aa3a5edd2 Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Wed, 15 Aug 2018 12:14:05 -0700
Subject: [PATCH 1614/1852] isdn: Disable IIOCDBGVAR

[ Upstream commit 5e22002aa8809e2efab2da95855f73f63e14a36c ]

It was possible to directly leak the kernel address where the isdn_dev
structure pointer was stored. This is a kernel ASLR bypass for anyone
with access to the ioctl. The code had been present since the beginning
of git history, though this shouldn't ever be needed for normal operation,
therefore remove it.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: Karsten Keil <isdn@linux-pingi.de>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/isdn/i4l/isdn_common.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c
index e4c43a17b333f..8088c34336aa8 100644
--- a/drivers/isdn/i4l/isdn_common.c
+++ b/drivers/isdn/i4l/isdn_common.c
@@ -1655,13 +1655,7 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg)
 			} else
 				return -EINVAL;
 		case IIOCDBGVAR:
-			if (arg) {
-				if (copy_to_user(argp, &dev, sizeof(ulong)))
-					return -EFAULT;
-				return 0;
-			} else
-				return -EINVAL;
-			break;
+			return -EINVAL;
 		default:
 			if ((cmd & IIOCDRVCTL) == IIOCDRVCTL)
 				cmd = ((cmd >> _IOC_NRSHIFT) & _IOC_NRMASK) & ISDN_DRVIOCTL_MASK;

From 06ac850dd2899388c40c699e61d7d0a1571fc569 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 22 Aug 2018 07:48:38 +0200
Subject: [PATCH 1615/1852] Linux 4.4.151

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c362f10a272c4..6a13dba526760 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 150
+SUBLEVEL = 151
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 701e5ba7bf6802fb1e9c8289ba6bd066f4820188 Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <abrodkin@synopsys.com>
Date: Fri, 1 Jun 2018 14:34:33 +0300
Subject: [PATCH 1616/1852] ARC: Explicitly add -mmedium-calls to CFLAGS

[ Upstream commit 74c11e300c103af47db5b658fdcf28002421e250 ]

GCC built for arc*-*-linux has "-mmedium-calls" implicitly enabled by default
thus we don't see any problems during Linux kernel compilation.
----------------------------->8------------------------
arc-linux-gcc -mcpu=arc700 -Q --help=target | grep calls
  -mlong-calls                          [disabled]
  -mmedium-calls                        [enabled]
----------------------------->8------------------------

But if we try to use so-called Elf32 toolchain with GCC configured for
arc*-*-elf* then we'd see the following failure:
----------------------------->8------------------------
init/do_mounts.o: In function 'init_rootfs':
do_mounts.c:(.init.text+0x108): relocation truncated to fit: R_ARC_S21W_PCREL
against symbol 'unregister_filesystem' defined in .text section in fs/filesystems.o

arc-elf32-ld: final link failed: Symbol needs debug section which does not exist
make: *** [vmlinux] Error 1
----------------------------->8------------------------

That happens because neither "-mmedium-calls" nor "-mlong-calls" are enabled in
Elf32 GCC:
----------------------------->8------------------------
arc-elf32-gcc -mcpu=arc700 -Q --help=target | grep calls
  -mlong-calls                          [disabled]
  -mmedium-calls                        [disabled]
----------------------------->8------------------------

Now to make it possible to use Elf32 toolchain for building Linux kernel
we're explicitly add "-mmedium-calls" to CFLAGS.

And since we add "-mmedium-calls" to the global CFLAGS there's no point in
having per-file copies thus removing them.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/Makefile | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index c05ea2b542762..b9f7306412e58 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -14,7 +14,7 @@ endif
 
 KBUILD_DEFCONFIG := nsim_700_defconfig
 
-cflags-y	+= -fno-common -pipe -fno-builtin -D__linux__
+cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
 cflags-$(CONFIG_ISA_ARCOMPACT)	+= -mA7
 cflags-$(CONFIG_ISA_ARCV2)	+= -mcpu=archs
 
@@ -137,16 +137,3 @@ dtbs: scripts
 
 archclean:
 	$(Q)$(MAKE) $(clean)=$(boot)
-
-# Hacks to enable final link due to absence of link-time branch relexation
-# and gcc choosing optimal(shorter) branches at -O3
-#
-# vineetg Feb 2010: -mlong-calls switched off for overall kernel build
-# However lib/decompress_inflate.o (.init.text) calls
-# zlib_inflate_workspacesize (.text) causing relocation errors.
-# Thus forcing all exten calls in this file to be long calls
-export CFLAGS_decompress_inflate.o = -mmedium-calls
-export CFLAGS_initramfs.o = -mmedium-calls
-ifdef CONFIG_SMP
-export CFLAGS_core.o = -mmedium-calls
-endif

From 676caada56d911bcfea45712d84348ec2d77cbd6 Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Wed, 13 Jun 2018 10:11:56 -0700
Subject: [PATCH 1617/1852] netfilter: ipv6: nf_defrag: reduce struct net
 memory waste

[ Upstream commit 9ce7bc036ae4cfe3393232c86e9e1fea2153c237 ]

It is a waste of memory to use a full "struct netns_sysctl_ipv6"
while only one pointer is really used, considering netns_sysctl_ipv6
keeps growing.

Also, since "struct netns_frags" has cache line alignment,
it is better to move the frags_hdr pointer outside, otherwise
we spend a full cache line for this pointer.

This saves 192 bytes of memory per netns.

Fixes: c038a767cd69 ("ipv6: add a new namespace for nf_conntrack_reasm")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/net_namespace.h             | 1 +
 include/net/netns/ipv6.h                | 1 -
 net/ipv6/netfilter/nf_conntrack_reasm.c | 6 +++---
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index 93328c61934aa..6965dfe7e88b8 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -115,6 +115,7 @@ struct net {
 #endif
 #if IS_ENABLED(CONFIG_NF_DEFRAG_IPV6)
 	struct netns_nf_frag	nf_frag;
+	struct ctl_table_header *nf_frag_frags_hdr;
 #endif
 	struct sock		*nfnl;
 	struct sock		*nfnl_stash;
diff --git a/include/net/netns/ipv6.h b/include/net/netns/ipv6.h
index c0368db6df54d..d235722c0d925 100644
--- a/include/net/netns/ipv6.h
+++ b/include/net/netns/ipv6.h
@@ -86,7 +86,6 @@ struct netns_ipv6 {
 
 #if IS_ENABLED(CONFIG_NF_DEFRAG_IPV6)
 struct netns_nf_frag {
-	struct netns_sysctl_ipv6 sysctl;
 	struct netns_frags	frags;
 };
 #endif
diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c
index eb2dc39f7066f..838b65a59a737 100644
--- a/net/ipv6/netfilter/nf_conntrack_reasm.c
+++ b/net/ipv6/netfilter/nf_conntrack_reasm.c
@@ -118,7 +118,7 @@ static int nf_ct_frag6_sysctl_register(struct net *net)
 	if (hdr == NULL)
 		goto err_reg;
 
-	net->nf_frag.sysctl.frags_hdr = hdr;
+	net->nf_frag_frags_hdr = hdr;
 	return 0;
 
 err_reg:
@@ -132,8 +132,8 @@ static void __net_exit nf_ct_frags6_sysctl_unregister(struct net *net)
 {
 	struct ctl_table *table;
 
-	table = net->nf_frag.sysctl.frags_hdr->ctl_table_arg;
-	unregister_net_sysctl_table(net->nf_frag.sysctl.frags_hdr);
+	table = net->nf_frag_frags_hdr->ctl_table_arg;
+	unregister_net_sysctl_table(net->nf_frag_frags_hdr);
 	if (!net_eq(net, &init_net))
 		kfree(table);
 }

From 1f881e0938d496bbf675f9c485d6733112a37438 Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Tue, 12 Jun 2018 16:46:03 -0600
Subject: [PATCH 1618/1852] selftests: pstore: return Kselftest Skip code for
 skipped tests

[ Upstream commit 856e7c4b619af622d56b3b454f7bec32a170ac99 ]

When pstore_post_reboot test gets skipped because of unmet dependencies
and/or unsupported configuration, it returns 0 which is treated as a pass
by the Kselftest framework. This leads to false positive result even when
the test could not be run.

Change it to return kselftest skip code when a test gets skipped to clearly
report that the test could not be run.

Kselftest framework SKIP code is 4 and the framework prints appropriate
messages to indicate that the test is skipped.

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/pstore/pstore_post_reboot_tests | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/pstore/pstore_post_reboot_tests b/tools/testing/selftests/pstore/pstore_post_reboot_tests
index 6ccb154cb4aa4..22f8df1ad7d48 100755
--- a/tools/testing/selftests/pstore/pstore_post_reboot_tests
+++ b/tools/testing/selftests/pstore/pstore_post_reboot_tests
@@ -7,13 +7,16 @@
 #
 # Released under the terms of the GPL v2.
 
+# Kselftest framework requirement - SKIP code is 4.
+ksft_skip=4
+
 . ./common_tests
 
 if [ -e $REBOOT_FLAG  ]; then
     rm $REBOOT_FLAG
 else
     prlog "pstore_crash_test has not been executed yet. we skip further tests."
-    exit 0
+    exit $ksft_skip
 fi
 
 prlog -n "Mounting pstore filesystem ... "

From bafbb0e0a9f50f9d87acb53ba4f62e53417b8efd Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Tue, 12 Jun 2018 17:40:31 -0600
Subject: [PATCH 1619/1852] selftests: static_keys: return Kselftest Skip code
 for skipped tests

[ Upstream commit 8781578087b8fb8829558bac96c3c24e5ba26f82 ]

When static_keys test is skipped because of unmet dependencies and/or
unsupported configuration, it exits with error which is treated as a fail
by the Kselftest framework. This leads to false negative result even when
the test could not be run.

Change it to return kselftest skip code when a test gets skipped to clearly
report that the test could not be run.

Added an explicit searches for test_static_key_base and test_static_keys
modules and return skip code if they aren't found to differentiate between
the failure to load the module condition and module not found condition.

Kselftest framework SKIP code is 4 and the framework prints appropriate
messages to indicate that the test is skipped.

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../selftests/static_keys/test_static_keys.sh       | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/tools/testing/selftests/static_keys/test_static_keys.sh b/tools/testing/selftests/static_keys/test_static_keys.sh
index 1261e3fa1e3a8..5bba7796fb34c 100755
--- a/tools/testing/selftests/static_keys/test_static_keys.sh
+++ b/tools/testing/selftests/static_keys/test_static_keys.sh
@@ -1,6 +1,19 @@
 #!/bin/sh
 # Runs static keys kernel module tests
 
+# Kselftest framework requirement - SKIP code is 4.
+ksft_skip=4
+
+if ! /sbin/modprobe -q -n test_static_key_base; then
+	echo "static_key: module test_static_key_base is not found [SKIP]"
+	exit $ksft_skip
+fi
+
+if ! /sbin/modprobe -q -n test_static_keys; then
+	echo "static_key: module test_static_keys is not found [SKIP]"
+	exit $ksft_skip
+fi
+
 if /sbin/modprobe -q test_static_key_base; then
 	if /sbin/modprobe -q test_static_keys; then
 		echo "static_key: ok"

From 04916b52ff4bae35d91e5e935186358681bda6f9 Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Wed, 13 Jun 2018 21:10:48 -0600
Subject: [PATCH 1620/1852] selftests: user: return Kselftest Skip code for
 skipped tests

[ Upstream commit d7d5311d4aa9611fe1a5a851e6f75733237a668a ]

When user test is skipped because of unmet dependencies and/or
unsupported configuration, it exits with error which is treated as
a fail by the Kselftest framework. This leads to false negative result
even when the test could not be run.

Change it to return kselftest skip code when a test gets skipped to
clearly report that the test could not be run. Add an explicit check
for module presence and return skip code if module isn't present.

Kselftest framework SKIP code is 4 and the framework prints appropriate
messages to indicate that the test is skipped.

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/user/test_user_copy.sh | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/tools/testing/selftests/user/test_user_copy.sh b/tools/testing/selftests/user/test_user_copy.sh
index 350107f40c1d5..0409270f998c1 100755
--- a/tools/testing/selftests/user/test_user_copy.sh
+++ b/tools/testing/selftests/user/test_user_copy.sh
@@ -1,6 +1,13 @@
 #!/bin/sh
 # Runs copy_to/from_user infrastructure using test_user_copy kernel module
 
+# Kselftest framework requirement - SKIP code is 4.
+ksft_skip=4
+
+if ! /sbin/modprobe -q -n test_user_copy; then
+	echo "user: module test_user_copy is not found [SKIP]"
+	exit $ksft_skip
+fi
 if /sbin/modprobe -q test_user_copy; then
 	/sbin/modprobe -q -r test_user_copy
 	echo "user_copy: ok"

From 4c03a64902b9e195643c707fe66cf0518457971a Mon Sep 17 00:00:00 2001
From: "Shuah Khan (Samsung OSG)" <shuah@kernel.org>
Date: Thu, 14 Jun 2018 16:56:13 -0600
Subject: [PATCH 1621/1852] selftests: zram: return Kselftest Skip code for
 skipped tests

[ Upstream commit 685814466bf8398192cf855415a0bb2cefc1930e ]

When zram test is skipped because of unmet dependencies and/or
unsupported configuration, it exits with error which is treated as
a fail by the Kselftest framework. This leads to false negative result
even when the test could not be run.

Change it to return kselftest skip code when a test gets skipped to
clearly report that the test could not be run.

Kselftest framework SKIP code is 4 and the framework prints appropriate
messages to indicate that the test is skipped.

Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/zram/zram.sh     | 5 ++++-
 tools/testing/selftests/zram/zram_lib.sh | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/zram/zram.sh b/tools/testing/selftests/zram/zram.sh
index 683a292e32901..9399c4aeaa265 100755
--- a/tools/testing/selftests/zram/zram.sh
+++ b/tools/testing/selftests/zram/zram.sh
@@ -1,6 +1,9 @@
 #!/bin/bash
 TCID="zram.sh"
 
+# Kselftest framework requirement - SKIP code is 4.
+ksft_skip=4
+
 . ./zram_lib.sh
 
 run_zram () {
@@ -23,5 +26,5 @@ elif [ -b /dev/zram0 ]; then
 else
 	echo "$TCID : No zram.ko module or /dev/zram0 device file not found"
 	echo "$TCID : CONFIG_ZRAM is not set"
-	exit 1
+	exit $ksft_skip
 fi
diff --git a/tools/testing/selftests/zram/zram_lib.sh b/tools/testing/selftests/zram/zram_lib.sh
index f6a9c73e7a442..9e73a4fb9b0aa 100755
--- a/tools/testing/selftests/zram/zram_lib.sh
+++ b/tools/testing/selftests/zram/zram_lib.sh
@@ -18,6 +18,9 @@ MODULE=0
 dev_makeswap=-1
 dev_mounted=-1
 
+# Kselftest framework requirement - SKIP code is 4.
+ksft_skip=4
+
 trap INT
 
 check_prereqs()
@@ -27,7 +30,7 @@ check_prereqs()
 
 	if [ $uid -ne 0 ]; then
 		echo $msg must be run as root >&2
-		exit 0
+		exit $ksft_skip
 	fi
 }
 

From 0a7518b4b2aa8559fde0685a08ce25ffe8c57428 Mon Sep 17 00:00:00 2001
From: Fathi Boudra <fathi.boudra@linaro.org>
Date: Thu, 14 Jun 2018 11:57:08 +0200
Subject: [PATCH 1622/1852] selftests: sync: add config fragment for testing
 sync framework

[ Upstream commit d6a3e55131fcb1e5ca1753f4b6f297a177b2fc91 ]

Unless the software synchronization objects (CONFIG_SW_SYNC) is enabled,
the sync test will be skipped:

TAP version 13
1..0 # Skipped: Sync framework not supported by kernel

Add a config fragment file to be able to run "make kselftest-merge" to
enable relevant configuration required in order to run the sync test.

Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
Link: https://lkml.org/lkml/2017/5/5/14
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Shuah Khan (Samsung OSG) <shuah@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/sync/config | 4 ++++
 1 file changed, 4 insertions(+)
 create mode 100644 tools/testing/selftests/sync/config

diff --git a/tools/testing/selftests/sync/config b/tools/testing/selftests/sync/config
new file mode 100644
index 0000000000000..1ab7e8130db24
--- /dev/null
+++ b/tools/testing/selftests/sync/config
@@ -0,0 +1,4 @@
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_SYNC=y
+CONFIG_SW_SYNC=y

From 749fb0f48e856a0cea1267241313704dc9e25eac Mon Sep 17 00:00:00 2001
From: Ray Jui <ray.jui@broadcom.com>
Date: Tue, 12 Jun 2018 13:21:27 -0700
Subject: [PATCH 1623/1852] ARM: dts: Cygnus: Fix I2C controller interrupt type

[ Upstream commit 71ca3409703b62b6a092d0d9d13f366c121bc5d3 ]

Fix I2C controller interrupt to use IRQ_TYPE_LEVEL_HIGH for Broadcom
Cygnus SoC.

Fixes: b51c05a331ff ("ARM: dts: add I2C device nodes for Broadcom Cygnus")
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 2778533502d9b..5ce200860c893 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -110,7 +110,7 @@
 			reg = <0x18008000 0x100>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
+			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 			clock-frequency = <100000>;
 			status = "disabled";
 		};
@@ -138,7 +138,7 @@
 			reg = <0x1800b000 0x100>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
+			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 			clock-frequency = <100000>;
 			status = "disabled";
 		};

From def27779bbdf3dfd50fa9799973bab8b57142999 Mon Sep 17 00:00:00 2001
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
Date: Fri, 25 May 2018 17:24:57 +0800
Subject: [PATCH 1624/1852] usb: gadget: composite: fix delayed_status race
 condition when set_interface

[ Upstream commit 980900d6318066b9f8314bfb87329a20fd0d1ca4 ]

It happens when enable debug log, if set_alt() returns
USB_GADGET_DELAYED_STATUS and usb_composite_setup_continue()
is called before increasing count of @delayed_status,
so fix it by using spinlock of @cdev->lock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tested-by: Jay Hsu <shih-chieh.hsu@mediatek.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/composite.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index fe79894638c9c..49b8adbf7ace1 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1619,6 +1619,8 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 		 */
 		if (w_value && !f->get_alt)
 			break;
+
+		spin_lock(&cdev->lock);
 		value = f->set_alt(f, w_index, w_value);
 		if (value == USB_GADGET_DELAYED_STATUS) {
 			DBG(cdev,
@@ -1628,6 +1630,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 			DBG(cdev, "delayed_status count %d\n",
 					cdev->delayed_status);
 		}
+		spin_unlock(&cdev->lock);
 		break;
 	case USB_REQ_GET_INTERFACE:
 		if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE))

From 08ef6c28a45ec99fa68f2369b1c890ec9bcbe5d8 Mon Sep 17 00:00:00 2001
From: Grigor Tovmasyan <Grigor.Tovmasyan@synopsys.com>
Date: Thu, 24 May 2018 18:22:30 +0400
Subject: [PATCH 1625/1852] usb: gadget: dwc2: fix memory leak in gadget_init()

[ Upstream commit 9bb073a053f0464ea74a4d4c331fdb7da58568d6 ]

Freed allocated request for ep0 to prevent memory leak in case when
dwc2_driver_probe() failed.

Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/dwc2/gadget.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index af21f44c25634..4bb73a06d8e5f 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3987,9 +3987,11 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
 	}
 
 	ret = usb_add_gadget_udc(dev, &hsotg->gadget);
-	if (ret)
+	if (ret) {
+		dwc2_hsotg_ep_free_request(&hsotg->eps_out[0]->ep,
+					   hsotg->ctrl_req);
 		return ret;
-
+	}
 	dwc2_hsotg_dump(hsotg);
 
 	return 0;
@@ -4002,6 +4004,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
 int dwc2_hsotg_remove(struct dwc2_hsotg *hsotg)
 {
 	usb_del_gadget_udc(&hsotg->gadget);
+	dwc2_hsotg_ep_free_request(&hsotg->eps_out[0]->ep, hsotg->ctrl_req);
 
 	return 0;
 }

From 6ad5ccd8320262c8cab75045477883ba6a63b02b Mon Sep 17 00:00:00 2001
From: Zhouyang Jia <jiazhouyang09@gmail.com>
Date: Sat, 16 Jun 2018 01:05:01 +0800
Subject: [PATCH 1626/1852] scsi: xen-scsifront: add error handling for
 xenbus_printf

[ Upstream commit 93efbd39870474cc536b9caf4a6efeb03b0bc56f ]

When xenbus_printf fails, the lack of error-handling code may
cause unexpected results.

This patch adds error-handling code after calling xenbus_printf.

Signed-off-by: Zhouyang Jia <jiazhouyang09@gmail.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/xen-scsifront.c | 33 ++++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/scsi/xen-scsifront.c b/drivers/scsi/xen-scsifront.c
index 9dc8687bf0480..e1b32ed0aa205 100644
--- a/drivers/scsi/xen-scsifront.c
+++ b/drivers/scsi/xen-scsifront.c
@@ -676,10 +676,17 @@ static int scsifront_dev_reset_handler(struct scsi_cmnd *sc)
 static int scsifront_sdev_configure(struct scsi_device *sdev)
 {
 	struct vscsifrnt_info *info = shost_priv(sdev->host);
+	int err;
 
-	if (info && current == info->curr)
-		xenbus_printf(XBT_NIL, info->dev->nodename,
+	if (info && current == info->curr) {
+		err = xenbus_printf(XBT_NIL, info->dev->nodename,
 			      info->dev_state_path, "%d", XenbusStateConnected);
+		if (err) {
+			xenbus_dev_error(info->dev, err,
+				"%s: writing dev_state_path", __func__);
+			return err;
+		}
+	}
 
 	return 0;
 }
@@ -687,10 +694,15 @@ static int scsifront_sdev_configure(struct scsi_device *sdev)
 static void scsifront_sdev_destroy(struct scsi_device *sdev)
 {
 	struct vscsifrnt_info *info = shost_priv(sdev->host);
+	int err;
 
-	if (info && current == info->curr)
-		xenbus_printf(XBT_NIL, info->dev->nodename,
+	if (info && current == info->curr) {
+		err = xenbus_printf(XBT_NIL, info->dev->nodename,
 			      info->dev_state_path, "%d", XenbusStateClosed);
+		if (err)
+			xenbus_dev_error(info->dev, err,
+				"%s: writing dev_state_path", __func__);
+	}
 }
 
 static struct scsi_host_template scsifront_sht = {
@@ -1025,9 +1037,12 @@ static void scsifront_do_lun_hotplug(struct vscsifrnt_info *info, int op)
 
 			if (scsi_add_device(info->host, chn, tgt, lun)) {
 				dev_err(&dev->dev, "scsi_add_device\n");
-				xenbus_printf(XBT_NIL, dev->nodename,
+				err = xenbus_printf(XBT_NIL, dev->nodename,
 					      info->dev_state_path,
 					      "%d", XenbusStateClosed);
+				if (err)
+					xenbus_dev_error(dev, err,
+						"%s: writing dev_state_path", __func__);
 			}
 			break;
 		case VSCSIFRONT_OP_DEL_LUN:
@@ -1041,10 +1056,14 @@ static void scsifront_do_lun_hotplug(struct vscsifrnt_info *info, int op)
 			}
 			break;
 		case VSCSIFRONT_OP_READD_LUN:
-			if (device_state == XenbusStateConnected)
-				xenbus_printf(XBT_NIL, dev->nodename,
+			if (device_state == XenbusStateConnected) {
+				err = xenbus_printf(XBT_NIL, dev->nodename,
 					      info->dev_state_path,
 					      "%d", XenbusStateConnected);
+				if (err)
+					xenbus_dev_error(dev, err,
+						"%s: writing dev_state_path", __func__);
+			}
 			break;
 		default:
 			break;

From fa2a08bbd8c3a61a16352469df392524cb24cef1 Mon Sep 17 00:00:00 2001
From: Zhizhou Zhang <zhizhouzhang@asrmicro.com>
Date: Tue, 12 Jun 2018 17:07:37 +0800
Subject: [PATCH 1627/1852] arm64: make secondary_start_kernel() notrace

[ Upstream commit b154886f7892499d0d3054026e19dfb9a731df61 ]

We can't call function trace hook before setup percpu offset.
When entering secondary_start_kernel(), percpu offset has not
been initialized.  So this lead hotplug malfunction.
Here is the flow to reproduce this bug:

echo 0 > /sys/devices/system/cpu/cpu1/online
echo function > /sys/kernel/debug/tracing/current_tracer
echo 1 > /sys/kernel/debug/tracing/tracing_on
echo 1 > /sys/devices/system/cpu/cpu1/online

Acked-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/kernel/smp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index fb3a21e17bff7..e2d4d5bc2b7e6 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -183,7 +183,7 @@ static void smp_store_cpu_info(unsigned int cpuid)
  * This is the secondary CPU boot entry.  We're using this CPUs
  * idle thread stack, but a set of temporary page tables.
  */
-asmlinkage void secondary_start_kernel(void)
+asmlinkage notrace void secondary_start_kernel(void)
 {
 	struct mm_struct *mm = &init_mm;
 	unsigned int cpu;

From d343a0b6b7153ebc6e646d00622068c26e2e0b61 Mon Sep 17 00:00:00 2001
From: Sudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>
Date: Mon, 18 Jun 2018 21:58:01 -0700
Subject: [PATCH 1628/1852] qed: Add sanity check for SIMD fastpath handler.

[ Upstream commit 3935a70968820c3994db4de7e6e1c7e814bff875 ]

Avoid calling a SIMD fastpath handler if it is NULL. The check is needed
to handle an unlikely scenario where unsolicited interrupt is destined to
a PF in INTa mode.

Fixes: fe56b9e6a ("qed: Add module with basic common support")
Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Ariel Elior <ariel.elior@cavium.com>
Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qlogic/qed/qed_main.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c
index 688b6da5a9bb7..35e1468d8196e 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_main.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_main.c
@@ -461,8 +461,16 @@ static irqreturn_t qed_single_int(int irq, void *dev_instance)
 		/* Fastpath interrupts */
 		for (j = 0; j < 64; j++) {
 			if ((0x2ULL << j) & status) {
-				hwfn->simd_proto_handler[j].func(
-					hwfn->simd_proto_handler[j].token);
+				struct qed_simd_fp_handler *p_handler =
+					&hwfn->simd_proto_handler[j];
+
+				if (p_handler->func)
+					p_handler->func(p_handler->token);
+				else
+					DP_NOTICE(hwfn,
+						  "Not calling fastpath handler as it is NULL [handler #%d, status 0x%llx]\n",
+						  j, status);
+
 				status &= ~(0x2ULL << j);
 				rc = IRQ_HANDLED;
 			}

From 44e6ba49c0deea3c73ed711220b432742aad91ce Mon Sep 17 00:00:00 2001
From: Govindarajulu Varadarajan <gvaradar@cisco.com>
Date: Tue, 19 Jun 2018 08:15:24 -0700
Subject: [PATCH 1629/1852] enic: initialize enic->rfs_h.lock in enic_probe

[ Upstream commit 3256d29fc7aecdf99feb1cb9475ed2252769a8a7 ]

lockdep spotted that we are using rfs_h.lock in enic_get_rxnfc() without
initializing. rfs_h.lock is initialized in enic_open(). But ethtool_ops
can be called when interface is down.

Move enic_rfs_flw_tbl_init to enic_probe.

INFO: trying to register non-static key.
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
CPU: 18 PID: 1189 Comm: ethtool Not tainted 4.17.0-rc7-devel+ #27
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.11.0-20171110_100015-anatol 04/01/2014
Call Trace:
dump_stack+0x85/0xc0
register_lock_class+0x550/0x560
? __handle_mm_fault+0xa8b/0x1100
__lock_acquire+0x81/0x670
lock_acquire+0xb9/0x1e0
?  enic_get_rxnfc+0x139/0x2b0 [enic]
_raw_spin_lock_bh+0x38/0x80
? enic_get_rxnfc+0x139/0x2b0 [enic]
enic_get_rxnfc+0x139/0x2b0 [enic]
ethtool_get_rxnfc+0x8d/0x1c0
dev_ethtool+0x16c8/0x2400
? __mutex_lock+0x64d/0xa00
? dev_load+0x6a/0x150
dev_ioctl+0x253/0x4b0
sock_do_ioctl+0x9a/0x130
sock_ioctl+0x1af/0x350
do_vfs_ioctl+0x8e/0x670
? syscall_trace_enter+0x1e2/0x380
ksys_ioctl+0x60/0x90
__x64_sys_ioctl+0x16/0x20
do_syscall_64+0x5a/0x170
entry_SYSCALL_64_after_hwframe+0x49/0xbe

Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/cisco/enic/enic_clsf.c | 3 +--
 drivers/net/ethernet/cisco/enic/enic_main.c | 3 ++-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/cisco/enic/enic_clsf.c b/drivers/net/ethernet/cisco/enic/enic_clsf.c
index 3c677ed3c29e7..4d9014d5b36d9 100644
--- a/drivers/net/ethernet/cisco/enic/enic_clsf.c
+++ b/drivers/net/ethernet/cisco/enic/enic_clsf.c
@@ -78,7 +78,6 @@ void enic_rfs_flw_tbl_init(struct enic *enic)
 	enic->rfs_h.max = enic->config.num_arfs;
 	enic->rfs_h.free = enic->rfs_h.max;
 	enic->rfs_h.toclean = 0;
-	enic_rfs_timer_start(enic);
 }
 
 void enic_rfs_flw_tbl_free(struct enic *enic)
@@ -87,7 +86,6 @@ void enic_rfs_flw_tbl_free(struct enic *enic)
 
 	enic_rfs_timer_stop(enic);
 	spin_lock_bh(&enic->rfs_h.lock);
-	enic->rfs_h.free = 0;
 	for (i = 0; i < (1 << ENIC_RFS_FLW_BITSHIFT); i++) {
 		struct hlist_head *hhead;
 		struct hlist_node *tmp;
@@ -98,6 +96,7 @@ void enic_rfs_flw_tbl_free(struct enic *enic)
 			enic_delfltr(enic, n->fltr_id);
 			hlist_del(&n->node);
 			kfree(n);
+			enic->rfs_h.free++;
 		}
 	}
 	spin_unlock_bh(&enic->rfs_h.lock);
diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index 029fa5bee520e..8390597aecb84 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -1760,7 +1760,7 @@ static int enic_open(struct net_device *netdev)
 		vnic_intr_unmask(&enic->intr[i]);
 
 	enic_notify_timer_start(enic);
-	enic_rfs_flw_tbl_init(enic);
+	enic_rfs_timer_start(enic);
 
 	return 0;
 
@@ -2694,6 +2694,7 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	enic->notify_timer.function = enic_notify_timer;
 	enic->notify_timer.data = (unsigned long)enic;
 
+	enic_rfs_flw_tbl_init(enic);
 	enic_set_rx_coal_setting(enic);
 	INIT_WORK(&enic->reset, enic_reset);
 	INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset);

From e97942db81f28e13d12dc34bdb5cbbf792794833 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Sun, 17 Jun 2018 23:40:53 +0200
Subject: [PATCH 1630/1852] net: hamradio: use eth_broadcast_addr

[ Upstream commit 4e8439aa34802deab11cee68b0ecb18f887fb153 ]

The array bpq_eth_addr is only used to get the size of an
address, whereas the bcast_addr is used to set the broadcast
address. This leads to a warning when using clang:
drivers/net/hamradio/bpqether.c:94:13: warning: variable 'bpq_eth_addr' is not
      needed and will not be emitted [-Wunneeded-internal-declaration]
static char bpq_eth_addr[6];
            ^

Remove both variables and use the common eth_broadcast_addr
to set the broadcast address.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/hamradio/bpqether.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index d95a50ae996dd..8748e8c9ce96b 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -89,10 +89,6 @@
 static const char banner[] __initconst = KERN_INFO \
 	"AX.25: bpqether driver version 004\n";
 
-static char bcast_addr[6]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF};
-
-static char bpq_eth_addr[6];
-
 static int bpq_rcv(struct sk_buff *, struct net_device *, struct packet_type *, struct net_device *);
 static int bpq_device_event(struct notifier_block *, unsigned long, void *);
 
@@ -515,8 +511,8 @@ static int bpq_new_device(struct net_device *edev)
 	bpq->ethdev = edev;
 	bpq->axdev = ndev;
 
-	memcpy(bpq->dest_addr, bcast_addr, sizeof(bpq_eth_addr));
-	memcpy(bpq->acpt_addr, bcast_addr, sizeof(bpq_eth_addr));
+	eth_broadcast_addr(bpq->dest_addr);
+	eth_broadcast_addr(bpq->acpt_addr);
 
 	err = register_netdevice(ndev);
 	if (err)

From 9f41a313b65c6ffdbe0395e23d07c0fba9fdb70a Mon Sep 17 00:00:00 2001
From: Li RongQing <lirongqing@baidu.com>
Date: Tue, 19 Jun 2018 17:23:17 +0800
Subject: [PATCH 1631/1852] net: propagate dev_get_valid_name return code

[ Upstream commit 7892bd081045222b9e4027fec279a28d6fe7aa66 ]

if dev_get_valid_name failed, propagate its return code

and remove the setting err to ENODEV, it will be set to
0 again before dev_change_net_namespace exits.

Signed-off-by: Li RongQing <lirongqing@baidu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/core/dev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/core/dev.c b/net/core/dev.c
index 3bcbf931a9105..191cf880d8052 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -7420,7 +7420,8 @@ int dev_change_net_namespace(struct net_device *dev, struct net *net, const char
 		/* We get here if we can't use the current device name */
 		if (!pat)
 			goto out;
-		if (dev_get_valid_name(net, dev, pat) < 0)
+		err = dev_get_valid_name(net, dev, pat);
+		if (err < 0)
 			goto out;
 	}
 
@@ -7432,7 +7433,6 @@ int dev_change_net_namespace(struct net_device *dev, struct net *net, const char
 	dev_close(dev);
 
 	/* And unlink it from device chain */
-	err = -ENODEV;
 	unlist_netdevice(dev);
 
 	synchronize_net();

From 64ee0182e9113df16675e372021025f026c3897d Mon Sep 17 00:00:00 2001
From: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date: Wed, 29 Nov 2017 11:21:45 +0300
Subject: [PATCH 1632/1852] ARC: Enable machine_desc->init_per_cpu for
 !CONFIG_SMP

[ Upstream commit 2f24ef7413a4d91657ef04e77c27ce0b313e6c95 ]

machine_desc->init_per_cpu() hook is supposed to be per cpu
initialization and would seem to apply  equally to UP and/or SMP.
Infact the comment in header file seems to suggest it works for
UP too, which was not the case and this patch.

This enables !CONFIG_SMP build for platforms such as hsdk.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
[vgupta: trimmeed changelog]
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/include/asm/mach_desc.h | 2 --
 arch/arc/kernel/irq.c            | 2 +-
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arc/include/asm/mach_desc.h b/arch/arc/include/asm/mach_desc.h
index c28e6c347b490..871f3cb16af9f 100644
--- a/arch/arc/include/asm/mach_desc.h
+++ b/arch/arc/include/asm/mach_desc.h
@@ -34,9 +34,7 @@ struct machine_desc {
 	const char		*name;
 	const char		**dt_compat;
 	void			(*init_early)(void);
-#ifdef CONFIG_SMP
 	void			(*init_per_cpu)(unsigned int);
-#endif
 	void			(*init_machine)(void);
 	void			(*init_late)(void);
 
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c
index ba17f85285cfe..dd42c6feaba5e 100644
--- a/arch/arc/kernel/irq.c
+++ b/arch/arc/kernel/irq.c
@@ -31,10 +31,10 @@ void __init init_IRQ(void)
 	/* a SMP H/w block could do IPI IRQ request here */
 	if (plat_smp_ops.init_per_cpu)
 		plat_smp_ops.init_per_cpu(smp_processor_id());
+#endif
 
 	if (machine_desc->init_per_cpu)
 		machine_desc->init_per_cpu(smp_processor_id());
-#endif
 }
 
 /*

From 5c13e86f7281ab5b046640c206db701ace0e5e3a Mon Sep 17 00:00:00 2001
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Date: Wed, 20 Jun 2018 10:03:56 +0200
Subject: [PATCH 1633/1852] net: davinci_emac: match the mdio device against
 its compatible if possible

[ Upstream commit ea0820bb771175c7d4192fc6f5b5c56b3c6d5239 ]

Device tree based systems without of_dev_auxdata will have the mdio
device named differently than "davinci_mdio(.0)". In this case use the
device's parent's compatible string for matching

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/ti/davinci_emac.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
index 33bd3b902304f..6be315303d616 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -1517,6 +1517,10 @@ static int emac_devioctl(struct net_device *ndev, struct ifreq *ifrq, int cmd)
 
 static int match_first_device(struct device *dev, void *data)
 {
+	if (dev->parent && dev->parent->of_node)
+		return of_device_is_compatible(dev->parent->of_node,
+					       "ti,davinci_mdio");
+
 	return !strncmp(dev_name(dev), "davinci_mdio", 12);
 }
 

From 5ee52b64b96b7132c09ca5bd708e432413b82dc2 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Wed, 4 Apr 2018 14:06:30 -0400
Subject: [PATCH 1634/1852] locking/lockdep: Do not record IRQ state within
 lockdep code

[ Upstream commit fcc784be837714a9173b372ff9fb9b514590dad9 ]

While debugging where things were going wrong with mapping
enabling/disabling interrupts with the lockdep state and actual real
enabling and disabling interrupts, I had to silent the IRQ
disabling/enabling in debug_check_no_locks_freed() because it was
always showing up as it was called before the splat was.

Use raw_local_irq_save/restore() for not only debug_check_no_locks_freed()
but for all internal lockdep functions, as they hide useful information
about where interrupts were used incorrectly last.

Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Link: https://lkml.kernel.org/lkml/20180404140630.3f4f4c7a@gandalf.local.home
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/locking/lockdep.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index 0e2c4911ba612..6e171b547a802 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -1264,11 +1264,11 @@ unsigned long lockdep_count_forward_deps(struct lock_class *class)
 	this.parent = NULL;
 	this.class = class;
 
-	local_irq_save(flags);
+	raw_local_irq_save(flags);
 	arch_spin_lock(&lockdep_lock);
 	ret = __lockdep_count_forward_deps(&this);
 	arch_spin_unlock(&lockdep_lock);
-	local_irq_restore(flags);
+	raw_local_irq_restore(flags);
 
 	return ret;
 }
@@ -1291,11 +1291,11 @@ unsigned long lockdep_count_backward_deps(struct lock_class *class)
 	this.parent = NULL;
 	this.class = class;
 
-	local_irq_save(flags);
+	raw_local_irq_save(flags);
 	arch_spin_lock(&lockdep_lock);
 	ret = __lockdep_count_backward_deps(&this);
 	arch_spin_unlock(&lockdep_lock);
-	local_irq_restore(flags);
+	raw_local_irq_restore(flags);
 
 	return ret;
 }
@@ -4123,7 +4123,7 @@ void debug_check_no_locks_freed(const void *mem_from, unsigned long mem_len)
 	if (unlikely(!debug_locks))
 		return;
 
-	local_irq_save(flags);
+	raw_local_irq_save(flags);
 	for (i = 0; i < curr->lockdep_depth; i++) {
 		hlock = curr->held_locks + i;
 
@@ -4134,7 +4134,7 @@ void debug_check_no_locks_freed(const void *mem_from, unsigned long mem_len)
 		print_freed_lock_bug(curr, mem_from, mem_from + mem_len, hlock);
 		break;
 	}
-	local_irq_restore(flags);
+	raw_local_irq_restore(flags);
 }
 EXPORT_SYMBOL_GPL(debug_check_no_locks_freed);
 

From ee3413d190f6e597538e507a0758010912d91926 Mon Sep 17 00:00:00 2001
From: Hangbin Liu <liuhangbin@gmail.com>
Date: Thu, 21 Jun 2018 19:49:36 +0800
Subject: [PATCH 1635/1852] ipv6: mcast: fix unsolicited report interval after
 receiving querys

[ Upstream commit 6c6da92808442908287fae8ebb0ca041a52469f4 ]

After recieving MLD querys, we update idev->mc_maxdelay with max_delay
from query header. This make the later unsolicited reports have the same
interval with mc_maxdelay, which means we may send unsolicited reports with
long interval time instead of default configured interval time.

Also as we will not call ipv6_mc_reset() after device up. This issue will
be there even after leave the group and join other groups.

Fixes: fc4eba58b4c14 ("ipv6: make unsolicited report intervals configurable for mld")
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/mcast.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/net/ipv6/mcast.c b/net/ipv6/mcast.c
index 06640685ff433..091cee551cd99 100644
--- a/net/ipv6/mcast.c
+++ b/net/ipv6/mcast.c
@@ -2061,7 +2061,8 @@ void ipv6_mc_dad_complete(struct inet6_dev *idev)
 		mld_send_initial_cr(idev);
 		idev->mc_dad_count--;
 		if (idev->mc_dad_count)
-			mld_dad_start_timer(idev, idev->mc_maxdelay);
+			mld_dad_start_timer(idev,
+					    unsolicited_report_interval(idev));
 	}
 }
 
@@ -2073,7 +2074,8 @@ static void mld_dad_timer_expire(unsigned long data)
 	if (idev->mc_dad_count) {
 		idev->mc_dad_count--;
 		if (idev->mc_dad_count)
-			mld_dad_start_timer(idev, idev->mc_maxdelay);
+			mld_dad_start_timer(idev,
+					    unsolicited_report_interval(idev));
 	}
 	in6_dev_put(idev);
 }
@@ -2431,7 +2433,8 @@ static void mld_ifc_timer_expire(unsigned long data)
 	if (idev->mc_ifc_count) {
 		idev->mc_ifc_count--;
 		if (idev->mc_ifc_count)
-			mld_ifc_start_timer(idev, idev->mc_maxdelay);
+			mld_ifc_start_timer(idev,
+					    unsolicited_report_interval(idev));
 	}
 	in6_dev_put(idev);
 }

From 98526038fef13078129b61e6f10a0b32ffe33390 Mon Sep 17 00:00:00 2001
From: Casey Schaufler <casey@schaufler-ca.com>
Date: Fri, 22 Jun 2018 10:54:45 -0700
Subject: [PATCH 1636/1852] Smack: Mark inode instant in smack_task_to_inode

[ Upstream commit 7b4e88434c4e7982fb053c49657e1c8bbb8692d9 ]

Smack: Mark inode instant in smack_task_to_inode

/proc clean-up in commit 1bbc55131e59bd099fdc568d3aa0b42634dbd188
resulted in smack_task_to_inode() being called before smack_d_instantiate.
This resulted in the smk_inode value being ignored, even while present
for files in /proc/self. Marking the inode as instant here fixes that.

Signed-off-by: Casey Schaufler <casey@schaufler-ca.com>
Signed-off-by: James Morris <james.morris@microsoft.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 security/smack/smack_lsm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c
index 735a1a9386d64..c73361859d112 100644
--- a/security/smack/smack_lsm.c
+++ b/security/smack/smack_lsm.c
@@ -2260,6 +2260,7 @@ static void smack_task_to_inode(struct task_struct *p, struct inode *inode)
 	struct smack_known *skp = smk_of_task_struct(p);
 
 	isp->smk_inode = skp;
+	isp->smk_flags |= SMK_INODE_INSTANT;
 }
 
 /*

From 88cc90a1ab356a022f00087c6014a1afc3708cc2 Mon Sep 17 00:00:00 2001
From: Ganesh Goudar <ganeshgr@chelsio.com>
Date: Sat, 23 Jun 2018 20:28:26 +0530
Subject: [PATCH 1637/1852] cxgb4: when disabling dcb set txq dcb priority to 0

[ Upstream commit 5ce36338a30f9814fc4824f9fe6c20cd83d872c7 ]

When we are disabling DCB, store "0" in txq->dcb_prio
since that's used for future TX Work Request "OVLAN_IDX"
values. Setting non zero priority upon disabling DCB
would halt the traffic.

Reported-by: AMG Zollner Robert <robert@cloudmedia.eu>
CC: David Ahern <dsa@cumulusnetworks.com>
Signed-off-by: Casey Leedom <leedom@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 090e006506019..a3e1498ca67ce 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -338,7 +338,7 @@ static void dcb_tx_queue_prio_enable(struct net_device *dev, int enable)
 				"Can't %s DCB Priority on port %d, TX Queue %d: err=%d\n",
 				enable ? "set" : "unset", pi->port_id, i, -err);
 		else
-			txq->dcb_prio = value;
+			txq->dcb_prio = enable ? value : 0;
 	}
 }
 #endif /* CONFIG_CHELSIO_T4_DCB */

From 17362ce17bb7c6345b2607bb139970add595aa47 Mon Sep 17 00:00:00 2001
From: Michael Trimarchi <michael@amarulasolutions.com>
Date: Wed, 30 May 2018 11:06:34 +0200
Subject: [PATCH 1638/1852] brcmfmac: stop watchdog before detach and free
 everything

[ Upstream commit 373c83a801f15b1e3d02d855fad89112bd4ccbe0 ]

Using built-in in kernel image without a firmware in filesystem
or in the kernel image can lead to a kernel NULL pointer deference.
Watchdog need to be stopped in brcmf_sdio_remove

The system is going down NOW!
[ 1348.110759] Unable to handle kernel NULL pointer dereference at virtual address 000002f8
Sent SIGTERM to all processes
[ 1348.121412] Mem abort info:
[ 1348.126962]   ESR = 0x96000004
[ 1348.130023]   Exception class = DABT (current EL), IL = 32 bits
[ 1348.135948]   SET = 0, FnV = 0
[ 1348.138997]   EA = 0, S1PTW = 0
[ 1348.142154] Data abort info:
[ 1348.145045]   ISV = 0, ISS = 0x00000004
[ 1348.148884]   CM = 0, WnR = 0
[ 1348.151861] user pgtable: 4k pages, 48-bit VAs, pgdp = (____ptrval____)
[ 1348.158475] [00000000000002f8] pgd=0000000000000000
[ 1348.163364] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[ 1348.168927] Modules linked in: ipv6
[ 1348.172421] CPU: 3 PID: 1421 Comm: brcmf_wdog/mmc0 Not tainted 4.17.0-rc5-next-20180517 #18
[ 1348.180757] Hardware name: Amarula A64-Relic (DT)
[ 1348.185455] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 1348.190251] pc : brcmf_sdiod_freezer_count+0x0/0x20
[ 1348.195124] lr : brcmf_sdio_watchdog_thread+0x64/0x290
[ 1348.200253] sp : ffff00000b85be30
[ 1348.203561] x29: ffff00000b85be30 x28: 0000000000000000
[ 1348.208868] x27: ffff00000b6cb918 x26: ffff80003b990638
[ 1348.214176] x25: ffff0000087b1a20 x24: ffff80003b94f800
[ 1348.219483] x23: ffff000008e620c8 x22: ffff000008f0b660
[ 1348.224790] x21: ffff000008c6a858 x20: 00000000fffffe00
[ 1348.230097] x19: ffff80003b94f800 x18: 0000000000000001
[ 1348.235404] x17: 0000ffffab2e8a74 x16: ffff0000080d7de8
[ 1348.240711] x15: 0000000000000000 x14: 0000000000000400
[ 1348.246018] x13: 0000000000000400 x12: 0000000000000001
[ 1348.251324] x11: 00000000000002c4 x10: 0000000000000a10
[ 1348.256631] x9 : ffff00000b85bc40 x8 : ffff80003be11870
[ 1348.261937] x7 : ffff80003dfc7308 x6 : 000000078ff08b55
[ 1348.267243] x5 : 00000139e1058400 x4 : 0000000000000000
[ 1348.272550] x3 : dead000000000100 x2 : 958f2788d6618100
[ 1348.277856] x1 : 00000000fffffe00 x0 : 0000000000000000

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wireless/brcm80211/brcmfmac/sdio.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/sdio.c
index bcf29bf6f727b..b4d9b47584d60 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/sdio.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio.c
@@ -4290,6 +4290,13 @@ void brcmf_sdio_remove(struct brcmf_sdio *bus)
 	brcmf_dbg(TRACE, "Enter\n");
 
 	if (bus) {
+		/* Stop watchdog task */
+		if (bus->watchdog_tsk) {
+			send_sig(SIGTERM, bus->watchdog_tsk, 1);
+			kthread_stop(bus->watchdog_tsk);
+			bus->watchdog_tsk = NULL;
+		}
+
 		/* De-register interrupt handler */
 		brcmf_sdiod_intr_unregister(bus->sdiodev);
 

From 7afa94606e90153ba6909c0b1c3c240fda889d36 Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Sun, 17 Jun 2018 13:53:09 +0200
Subject: [PATCH 1639/1852] ARM: dts: am437x: make edt-ft5x06 a wakeup source

[ Upstream commit 49a6ec5b807ea4ad7ebe1f58080ebb8497cb2d2c ]

The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/am437x-sk-evm.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 63de2a1b4315e..648236c5281b9 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -508,6 +508,8 @@
 
 		touchscreen-size-x = <480>;
 		touchscreen-size-y = <272>;
+
+		wakeup-source;
 	};
 
 	tlv320aic3106: tlv320aic3106@1b {

From e146573f3e493e257c34d39869bdd1d23e5c9177 Mon Sep 17 00:00:00 2001
From: Ajay Gupta <ajaykuee@gmail.com>
Date: Thu, 21 Jun 2018 16:19:45 +0300
Subject: [PATCH 1640/1852] usb: xhci: increase CRS timeout value

[ Upstream commit 305886ca87be480ae159908c2affd135c04215cf ]

Some controllers take almost 55ms to complete controller
restore state (CRS).
There is no timeout limit mentioned in xhci specification so
fixing the issue by increasing the timeout limit to 100ms

[reformat code comment -Mathias]
Signed-off-by: Ajay Gupta <ajaykuee@gmail.com>
Signed-off-by: Nagaraj Annaiah <naga.annaiah@gmail.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/host/xhci.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 3ae9779435d1a..1ec0c5d89c433 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1062,8 +1062,13 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
 		command = readl(&xhci->op_regs->command);
 		command |= CMD_CRS;
 		writel(command, &xhci->op_regs->command);
+		/*
+		 * Some controllers take up to 55+ ms to complete the controller
+		 * restore so setting the timeout to 100ms. Xhci specification
+		 * doesn't mention any timeout value.
+		 */
 		if (xhci_handshake(&xhci->op_regs->status,
-			      STS_RESTORE, 0, 10 * 1000)) {
+			      STS_RESTORE, 0, 100 * 1000)) {
 			xhci_warn(xhci, "WARN: xHC restore state timeout\n");
 			spin_unlock_irq(&xhci->lock);
 			return -ETIMEDOUT;

From 6457910f51e3f76cb1a35aea46af3e2bdaa29a4c Mon Sep 17 00:00:00 2001
From: Thomas Richter <tmricht@linux.ibm.com>
Date: Mon, 11 Jun 2018 09:31:53 +0200
Subject: [PATCH 1641/1852] perf test session topology: Fix test on s390

[ Upstream commit b930e62ecd362843002bdf84c2940439822af321 ]

On s390 this test case fails because the socket identifiction numbers
assigned to the CPU are higher than the CPU identification numbers.

F/ix this by adding the platform architecture into the perf data header
flag information. This helps identifiing the test platform and handles
s390 specifics in process_cpu_topology().

Before:

  [root@p23lp27 perf]# perf test -vvvvv -F 39
  39: Session topology                                      :
  --- start ---
  templ file: /tmp/perf-test-iUv755
  socket_id number is too big.You may need to upgrade the perf tool.
  ---- end ----
  Session topology: Skip
  [root@p23lp27 perf]#

After:

  [root@p23lp27 perf]# perf test -vvvvv -F 39
  39: Session topology                                      :
  --- start ---
  templ file: /tmp/perf-test-8X8VTs
  CPU 0, core 0, socket 6
  CPU 1, core 1, socket 3
  ---- end ----
  Session topology: Ok
  [root@p23lp27 perf]#

Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Fixes: c84974ed9fb6 ("perf test: Add entry to test cpu topology")
Link: http://lkml.kernel.org/r/20180611073153.15592-2-tmricht@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/tests/topology.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/perf/tests/topology.c b/tools/perf/tests/topology.c
index f5bb096c3bd97..bf67343c77957 100644
--- a/tools/perf/tests/topology.c
+++ b/tools/perf/tests/topology.c
@@ -42,6 +42,7 @@ static int session_write_header(char *path)
 
 	perf_header__set_feat(&session->header, HEADER_CPU_TOPOLOGY);
 	perf_header__set_feat(&session->header, HEADER_NRCPUS);
+	perf_header__set_feat(&session->header, HEADER_ARCH);
 
 	session->header.data_size += DATA_SIZE;
 

From 5ee0257c552853fbf171e1a8fc11ed7e6e46ecbf Mon Sep 17 00:00:00 2001
From: Sandipan Das <sandipan@linux.ibm.com>
Date: Mon, 11 Jun 2018 16:10:49 +0530
Subject: [PATCH 1642/1852] perf report powerpc: Fix crash if callchain is
 empty

[ Upstream commit 143c99f6ac6812d23254e80844d6e34be897d3e1 ]

For some cases, the callchain provided by the kernel may be empty. So,
the callchain ip filtering code will cause a crash if we do not check
whether the struct ip_callchain pointer is NULL before accessing any
members.

This can be observed on a powerpc64le system running Fedora 27 as shown
below.

  # perf record -b -e cycles:u ls

Before:

  # perf report --branch-history

  perf: Segmentation fault
  -------- backtrace --------
  perf[0x1027615c]
  linux-vdso64.so.1(__kernel_sigtramp_rt64+0x0)[0x7fff856304d8]
  perf(arch_skip_callchain_idx+0x44)[0x10257c58]
  perf[0x1017f2e4]
  perf(thread__resolve_callchain+0x124)[0x1017ff5c]
  perf(sample__resolve_callchain+0xf0)[0x10172788]
  ...

After:

  # perf report --branch-history

  Samples: 25  of event 'cycles:u', Event count (approx.): 2306870
    Overhead  Source:Line            Symbol                   Shared Object
  +   11.60%  _init+35736            [.] _init                ls
  +    9.84%  strcoll_l.c:137        [.] __strcoll_l          libc-2.26.so
  +    9.16%  memcpy.S:175           [.] __memcpy_power7      libc-2.26.so
  +    9.01%  gconv_charset.h:54     [.] _nl_find_locale      libc-2.26.so
  +    8.87%  dl-addr.c:52           [.] _dl_addr             libc-2.26.so
  +    8.83%  _init+236              [.] _init                ls
  ...

Reported-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Acked-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/20180611104049.11048-1-sandipan@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/arch/powerpc/util/skip-callchain-idx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/arch/powerpc/util/skip-callchain-idx.c b/tools/perf/arch/powerpc/util/skip-callchain-idx.c
index 0c370f81e0028..bd630c222e658 100644
--- a/tools/perf/arch/powerpc/util/skip-callchain-idx.c
+++ b/tools/perf/arch/powerpc/util/skip-callchain-idx.c
@@ -243,7 +243,7 @@ int arch_skip_callchain_idx(struct thread *thread, struct ip_callchain *chain)
 	u64 ip;
 	u64 skip_slot = -1;
 
-	if (chain->nr < 3)
+	if (!chain || chain->nr < 3)
 		return skip_slot;
 
 	ip = chain->ips[2];

From c41ea3ad78a6c1437266846984869df8f8aa5883 Mon Sep 17 00:00:00 2001
From: Andy Lutomirski <luto@kernel.org>
Date: Tue, 26 Jun 2018 22:17:17 -0700
Subject: [PATCH 1643/1852] selftests/x86/sigreturn/64: Fix spurious failures
 on AMD CPUs

[ Upstream commit ec348020566009d3da9b99f07c05814d13969c78 ]

When I wrote the sigreturn test, I didn't realize that AMD's busted
IRET behavior was different from Intel's busted IRET behavior:

On AMD CPUs, the CPU leaks the high 32 bits of the kernel stack pointer
to certain userspace contexts.  Gee, thanks.  There's very little
the kernel can do about it.  Modify the test so it passes.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/86e7fd3564497f657de30a36da4505799eebef01.1530076529.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/testing/selftests/x86/sigreturn.c | 46 ++++++++++++++++---------
 1 file changed, 29 insertions(+), 17 deletions(-)

diff --git a/tools/testing/selftests/x86/sigreturn.c b/tools/testing/selftests/x86/sigreturn.c
index b5aa1bab74163..97ad2d40324a3 100644
--- a/tools/testing/selftests/x86/sigreturn.c
+++ b/tools/testing/selftests/x86/sigreturn.c
@@ -456,19 +456,38 @@ static int test_valid_sigreturn(int cs_bits, bool use_16bit_ss, int force_ss)
 		greg_t req = requested_regs[i], res = resulting_regs[i];
 		if (i == REG_TRAPNO || i == REG_IP)
 			continue;	/* don't care */
-		if (i == REG_SP) {
-			printf("\tSP: %llx -> %llx\n", (unsigned long long)req,
-			       (unsigned long long)res);
 
+		if (i == REG_SP) {
 			/*
-			 * In many circumstances, the high 32 bits of rsp
-			 * are zeroed.  For example, we could be a real
-			 * 32-bit program, or we could hit any of a number
-			 * of poorly-documented IRET or segmented ESP
-			 * oddities.  If this happens, it's okay.
+			 * If we were using a 16-bit stack segment, then
+			 * the kernel is a bit stuck: IRET only restores
+			 * the low 16 bits of ESP/RSP if SS is 16-bit.
+			 * The kernel uses a hack to restore bits 31:16,
+			 * but that hack doesn't help with bits 63:32.
+			 * On Intel CPUs, bits 63:32 end up zeroed, and, on
+			 * AMD CPUs, they leak the high bits of the kernel
+			 * espfix64 stack pointer.  There's very little that
+			 * the kernel can do about it.
+			 *
+			 * Similarly, if we are returning to a 32-bit context,
+			 * the CPU will often lose the high 32 bits of RSP.
 			 */
-			if (res == (req & 0xFFFFFFFF))
-				continue;  /* OK; not expected to work */
+
+			if (res == req)
+				continue;
+
+			if (cs_bits != 64 && ((res ^ req) & 0xFFFFFFFF) == 0) {
+				printf("[NOTE]\tSP: %llx -> %llx\n",
+				       (unsigned long long)req,
+				       (unsigned long long)res);
+				continue;
+			}
+
+			printf("[FAIL]\tSP mismatch: requested 0x%llx; got 0x%llx\n",
+			       (unsigned long long)requested_regs[i],
+			       (unsigned long long)resulting_regs[i]);
+			nerrs++;
+			continue;
 		}
 
 		bool ignore_reg = false;
@@ -507,13 +526,6 @@ static int test_valid_sigreturn(int cs_bits, bool use_16bit_ss, int force_ss)
 		}
 
 		if (requested_regs[i] != resulting_regs[i] && !ignore_reg) {
-			/*
-			 * SP is particularly interesting here.  The
-			 * usual cause of failures is that we hit the
-			 * nasty IRET case of returning to a 16-bit SS,
-			 * in which case bits 16:31 of the *kernel*
-			 * stack pointer persist in ESP.
-			 */
 			printf("[FAIL]\tReg %d mismatch: requested 0x%llx; got 0x%llx\n",
 			       i, (unsigned long long)requested_regs[i],
 			       (unsigned long long)resulting_regs[i]);

From ac3fe18a10d209a07bcdb69bcd303d96ce73c0e4 Mon Sep 17 00:00:00 2001
From: Keerthy <j-keerthy@ti.com>
Date: Tue, 5 Jun 2018 15:37:51 +0530
Subject: [PATCH 1644/1852] ARM: dts: da850: Fix interrups property for gpio

[ Upstream commit 3eb1b955cd7ed1e621ace856710006c2a8a7f231 ]

The intc #interrupt-cells is equal to 1. Currently gpio
node has 2 cells per IRQ which is wrong. Remove the additional
cell for each of the interrupts.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixes: 2e38b946dc54 ("ARM: davinci: da850: add GPIO DT node")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/da850.dtsi | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 0bd98cd00816c..4ef5c3410fcce 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -267,11 +267,7 @@
 			compatible = "ti,dm6441-gpio";
 			gpio-controller;
 			reg = <0x226000 0x1000>;
-			interrupts = <42 IRQ_TYPE_EDGE_BOTH
-				43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
-				45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
-				47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
-				49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
+			interrupts = <42 43 44 45 46 47 48 49 50>;
 			ti,ngpio = <144>;
 			ti,davinci-gpio-unbanked = <0>;
 			status = "disabled";

From 830d6deebd42dde06ae2bb4d37a620eae7555353 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Fri, 22 Jun 2018 14:15:47 +0300
Subject: [PATCH 1645/1852] dmaengine: k3dma: Off by one in
 k3_of_dma_simple_xlate()

[ Upstream commit c4c2b7644cc9a41f17a8cc8904efe3f66ae4c7ed ]

The d->chans[] array has d->dma_requests elements so the > should be
>= here.

Fixes: 8e6152bc660e ("dmaengine: Add hisilicon k3 DMA engine driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/dma/k3dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 1ba2fd73852d2..0f0c06ab414b2 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -660,7 +660,7 @@ static struct dma_chan *k3_of_dma_simple_xlate(struct of_phandle_args *dma_spec,
 	struct k3_dma_dev *d = ofdma->of_dma_data;
 	unsigned int request = dma_spec->args[0];
 
-	if (request > d->dma_requests)
+	if (request >= d->dma_requests)
 		return NULL;
 
 	return dma_get_slave_channel(&(d->chans[request].vc.chan));

From cae5b9bf029b66ad67475d3a2b02cd8b558bcdd5 Mon Sep 17 00:00:00 2001
From: BingJing Chang <bingjingc@synology.com>
Date: Thu, 28 Jun 2018 18:40:11 +0800
Subject: [PATCH 1646/1852] md/raid10: fix that replacement cannot complete
 recovery after reassemble

[ Upstream commit bda3153998f3eb2cafa4a6311971143628eacdbc ]

During assemble, the spare marked for replacement is not checked.
conf->fullsync cannot be updated to be 1. As a result, recovery will
treat it as a clean array. All recovering sectors are skipped. Original
device is replaced with the not-recovered spare.

mdadm -C /dev/md0 -l10 -n4 -pn2 /dev/loop[0123]
mdadm /dev/md0 -a /dev/loop4
mdadm /dev/md0 --replace /dev/loop0
mdadm -S /dev/md0 # stop array during recovery

mdadm -A /dev/md0 /dev/loop[01234]

After reassemble, you can see recovery go on, but it completes
immediately. In fact, recovery is not actually processed.

To solve this problem, we just add the missing logics for replacment
spares. (In raid1.c or raid5.c, they have already been checked.)

Reported-by: Alex Chen <alexchen@synology.com>
Reviewed-by: Alex Wu <alexwu@synology.com>
Reviewed-by: Chung-Chiang Cheng <cccheng@synology.com>
Signed-off-by: BingJing Chang <bingjingc@synology.com>
Signed-off-by: Shaohua Li <shli@fb.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/md/raid10.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 7b6acedc89c17..8a731bdd268eb 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -3691,6 +3691,13 @@ static int run(struct mddev *mddev)
 			    disk->rdev->saved_raid_disk < 0)
 				conf->fullsync = 1;
 		}
+
+		if (disk->replacement &&
+		    !test_bit(In_sync, &disk->replacement->flags) &&
+		    disk->replacement->saved_raid_disk < 0) {
+			conf->fullsync = 1;
+		}
+
 		disk->recovery_disabled = mddev->recovery_disabled - 1;
 	}
 

From 5cea980dbd680c53bd7beba7e85c076a40a3d26c Mon Sep 17 00:00:00 2001
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Thu, 7 Jun 2018 13:06:13 +0200
Subject: [PATCH 1647/1852] drm/exynos: gsc: Fix support for NV16/61,
 YUV420/YVU420 and YUV422 modes

[ Upstream commit dd209ef809080ced903e7747ee3ef640c923a1d2 ]

Fix following issues related to planar YUV pixel format configuration:
- NV16/61 modes were incorrectly programmed as NV12/21,
- YVU420 was programmed as YUV420 on source,
- YVU420 and YUV422 were programmed as YUV420 on output.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/exynos/exynos_drm_gsc.c | 29 +++++++++++++++++--------
 drivers/gpu/drm/exynos/regs-gsc.h       |  1 +
 2 files changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 11b87d2a7913b..ba69d1c72221a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -526,21 +526,25 @@ static int gsc_src_set_fmt(struct device *dev, u32 fmt)
 			GSC_IN_CHROMA_ORDER_CRCB);
 		break;
 	case DRM_FORMAT_NV21:
+		cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_2P);
+		break;
 	case DRM_FORMAT_NV61:
-		cfg |= (GSC_IN_CHROMA_ORDER_CRCB |
-			GSC_IN_YUV420_2P);
+		cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV422_2P);
 		break;
 	case DRM_FORMAT_YUV422:
 		cfg |= GSC_IN_YUV422_3P;
 		break;
 	case DRM_FORMAT_YUV420:
+		cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_3P);
+		break;
 	case DRM_FORMAT_YVU420:
-		cfg |= GSC_IN_YUV420_3P;
+		cfg |= (GSC_IN_CHROMA_ORDER_CRCB | GSC_IN_YUV420_3P);
 		break;
 	case DRM_FORMAT_NV12:
+		cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV420_2P);
+		break;
 	case DRM_FORMAT_NV16:
-		cfg |= (GSC_IN_CHROMA_ORDER_CBCR |
-			GSC_IN_YUV420_2P);
+		cfg |= (GSC_IN_CHROMA_ORDER_CBCR | GSC_IN_YUV422_2P);
 		break;
 	default:
 		dev_err(ippdrv->dev, "invalid target yuv order 0x%x.\n", fmt);
@@ -800,18 +804,25 @@ static int gsc_dst_set_fmt(struct device *dev, u32 fmt)
 			GSC_OUT_CHROMA_ORDER_CRCB);
 		break;
 	case DRM_FORMAT_NV21:
-	case DRM_FORMAT_NV61:
 		cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_2P);
 		break;
+	case DRM_FORMAT_NV61:
+		cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV422_2P);
+		break;
 	case DRM_FORMAT_YUV422:
+		cfg |= GSC_OUT_YUV422_3P;
+		break;
 	case DRM_FORMAT_YUV420:
+		cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_3P);
+		break;
 	case DRM_FORMAT_YVU420:
-		cfg |= GSC_OUT_YUV420_3P;
+		cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_3P);
 		break;
 	case DRM_FORMAT_NV12:
+		cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV420_2P);
+		break;
 	case DRM_FORMAT_NV16:
-		cfg |= (GSC_OUT_CHROMA_ORDER_CBCR |
-			GSC_OUT_YUV420_2P);
+		cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | GSC_OUT_YUV422_2P);
 		break;
 	default:
 		dev_err(ippdrv->dev, "invalid target yuv order 0x%x.\n", fmt);
diff --git a/drivers/gpu/drm/exynos/regs-gsc.h b/drivers/gpu/drm/exynos/regs-gsc.h
index 9ad592707aafd..ade10966d6af7 100644
--- a/drivers/gpu/drm/exynos/regs-gsc.h
+++ b/drivers/gpu/drm/exynos/regs-gsc.h
@@ -138,6 +138,7 @@
 #define GSC_OUT_YUV420_3P		(3 << 4)
 #define GSC_OUT_YUV422_1P		(4 << 4)
 #define GSC_OUT_YUV422_2P		(5 << 4)
+#define GSC_OUT_YUV422_3P		(6 << 4)
 #define GSC_OUT_YUV444			(7 << 4)
 #define GSC_OUT_TILE_TYPE_MASK		(1 << 2)
 #define GSC_OUT_TILE_C_16x8		(0 << 2)

From 6416d3f96c3fd9496bcaff1daf4c9d931d9a5c02 Mon Sep 17 00:00:00 2001
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Thu, 7 Jun 2018 13:07:40 +0200
Subject: [PATCH 1648/1852] drm/exynos: decon5433: Fix per-plane global alpha
 for XRGB modes

[ Upstream commit ab337fc274a1957ff0771f19e826c736253f7c39 ]

Set per-plane global alpha to maximum value to get proper blending of
XRGB and ARGB planes. This fixes the strange order of overlapping planes.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 34cebcdc2fc4d..784ef54f5a1bb 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -278,8 +278,8 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
 		COORDINATE_Y(plane->crtc_y + plane->crtc_h - 1);
 	writel(val, ctx->addr + DECON_VIDOSDxB(win));
 
-	val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |
-		VIDOSD_Wx_ALPHA_B_F(0x0);
+	val = VIDOSD_Wx_ALPHA_R_F(0xff) | VIDOSD_Wx_ALPHA_G_F(0xff) |
+		VIDOSD_Wx_ALPHA_B_F(0xff);
 	writel(val, ctx->addr + DECON_VIDOSDxC(win));
 
 	val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |

From 071bd6abd4fb6e614b76e6115ad62de931df11cb Mon Sep 17 00:00:00 2001
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Thu, 7 Jun 2018 13:07:49 +0200
Subject: [PATCH 1649/1852] drm/exynos: decon5433: Fix WINCONx reset value

[ Upstream commit 7b7aa62c05eac9789c208b946f515983a9255d8d ]

The only bits that should be preserved in decon_win_set_fmt() is
WINCONx_ENWIN_F. All other bits depends on the selected pixel formats and
are set by the mentioned function.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 784ef54f5a1bb..9cae5f69b07cb 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -190,7 +190,7 @@ static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
 	unsigned long val;
 
 	val = readl(ctx->addr + DECON_WINCONx(win));
-	val &= ~WINCONx_BPPMODE_MASK;
+	val &= WINCONx_ENWIN_F;
 
 	switch (fb->pixel_format) {
 	case DRM_FORMAT_XRGB1555:

From 97d967edf916679d874428b4101c2c26c58f65c5 Mon Sep 17 00:00:00 2001
From: Sudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>
Date: Thu, 28 Jun 2018 04:52:15 -0700
Subject: [PATCH 1650/1852] bnx2x: Fix receiving tx-timeout in error or
 recovery state.

[ Upstream commit 484c016d9392786ce5c74017c206c706f29f823d ]

Driver performs the internal reload when it receives tx-timeout event from
the OS. Internal reload might fail in some scenarios e.g., fatal HW issues.
In such cases OS still see the link, which would result in undesirable
functionalities such as re-generation of tx-timeouts.
The patch addresses this issue by indicating the link-down to OS when
tx-timeout is detected, and keeping the link in down state till the
internal reload is successful.

Please consider applying it to 'net' branch.

Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Ariel Elior <ariel.elior@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h      | 1 +
 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c  | 6 ++++++
 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 6 ++++++
 3 files changed, 13 insertions(+)

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index b5e64b02200cd..1ea0688154197 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1634,6 +1634,7 @@ struct bnx2x {
 	struct link_vars	link_vars;
 	u32			link_cnt;
 	struct bnx2x_link_report_data last_reported_link;
+	bool			force_link_down;
 
 	struct mdio_if_info	mdio;
 
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 949a82458a290..ebc4518d598ad 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -1277,6 +1277,11 @@ void __bnx2x_link_report(struct bnx2x *bp)
 {
 	struct bnx2x_link_report_data cur_data;
 
+	if (bp->force_link_down) {
+		bp->link_vars.link_up = 0;
+		return;
+	}
+
 	/* reread mf_cfg */
 	if (IS_PF(bp) && !CHIP_IS_E1(bp))
 		bnx2x_read_mf_cfg(bp);
@@ -2840,6 +2845,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
 		bp->pending_max = 0;
 	}
 
+	bp->force_link_down = false;
 	if (bp->port.pmf) {
 		rc = bnx2x_initial_phy_init(bp, load_mode);
 		if (rc)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 8ddb68a3fdb6d..403fa8d98aa3a 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -10222,6 +10222,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work)
 		bp->sp_rtnl_state = 0;
 		smp_mb();
 
+		/* Immediately indicate link as down */
+		bp->link_vars.link_up = 0;
+		bp->force_link_down = true;
+		netif_carrier_off(bp->dev);
+		BNX2X_ERR("Indicating link is down due to Tx-timeout\n");
+
 		bnx2x_nic_unload(bp, UNLOAD_NORMAL, true);
 		bnx2x_nic_load(bp, LOAD_NORMAL);
 

From 15cb74fd94b386039278943e7df1a69662680d78 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@linux-m68k.org>
Date: Mon, 18 Jun 2018 15:34:14 +1000
Subject: [PATCH 1651/1852] m68k: fix "bad page state" oops on ColdFire boot
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit ecd60532e060e45c63c57ecf1c8549b1d656d34d ]

Booting a ColdFire m68k core with MMU enabled causes a "bad page state"
oops since commit 1d40a5ea01d5 ("mm: mark pages in use for page tables"):

 BUG: Bad page state in process sh  pfn:01ce2
 page:004fefc8 count:0 mapcount:-1024 mapping:00000000 index:0x0
 flags: 0x0()
 raw: 00000000 00000000 00000000 fffffbff 00000000 00000100 00000200 00000000
 raw: 039c4000
 page dumped because: nonzero mapcount
 Modules linked in:
 CPU: 0 PID: 22 Comm: sh Not tainted 4.17.0-07461-g1d40a5ea01d5 #13

Fix by calling pgtable_page_dtor() in our __pte_free_tlb() code path,
so that the PG_table flag is cleared before we free the pte page.

Note that I had to change the type of pte_free() to be static from
extern. Otherwise you get a lot of warnings like this:

./arch/m68k/include/asm/mcf_pgalloc.h:80:2: warning: ‘pgtable_page_dtor’ is static but used in inline function ‘pte_free’ which is not static
  pgtable_page_dtor(page);
  ^

And making it static is consistent with our use of this in the other
m68k pgalloc definitions of pte_free().

Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
CC: Matthew Wilcox <willy@infradead.org>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/m68k/include/asm/mcf_pgalloc.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/m68k/include/asm/mcf_pgalloc.h b/arch/m68k/include/asm/mcf_pgalloc.h
index f9924fbcfe42b..456e3f75ef3b7 100644
--- a/arch/m68k/include/asm/mcf_pgalloc.h
+++ b/arch/m68k/include/asm/mcf_pgalloc.h
@@ -43,6 +43,7 @@ extern inline pmd_t *pmd_alloc_kernel(pgd_t *pgd, unsigned long address)
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page,
 				  unsigned long address)
 {
+	pgtable_page_dtor(page);
 	__free_page(page);
 }
 
@@ -73,8 +74,9 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
 	return page;
 }
 
-extern inline void pte_free(struct mm_struct *mm, struct page *page)
+static inline void pte_free(struct mm_struct *mm, struct page *page)
 {
+	pgtable_page_dtor(page);
 	__free_page(page);
 }
 

From a37191283f22e0bd1d0a29722f3a07605aee4c7b Mon Sep 17 00:00:00 2001
From: Jason Gerecke <killertofu@gmail.com>
Date: Tue, 26 Jun 2018 09:58:02 -0700
Subject: [PATCH 1652/1852] HID: wacom: Correct touch maximum XY of 2nd-gen
 Intuos

[ Upstream commit 3b8d573586d1b9dee33edf6cb6f2ca05f4bca568 ]

The touch sensors on the 2nd-gen Intuos tablets don't use a 4096x4096
sensor like other similar tablets (3rd-gen Bamboo, Intuos5, etc.).
The incorrect maximum XY values don't normally affect userspace since
touch input from these devices is typically relative rather than
absolute. It does, however, cause problems when absolute distances
need to be measured, e.g. for gesture recognition. Since the resolution
of the touch sensor on these devices is 10 units / mm (versus 100 for
the pen sensor), the proper maximum values can be calculated by simply
dividing by 10.

Fixes: b5fd2a3e92 ("Input: wacom - add support for three new Intuos devices")
Signed-off-by: Jason Gerecke <jason.gerecke@wacom.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/hid/wacom_wac.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
index b62c50d1b1e4b..b184956bd4306 100644
--- a/drivers/hid/wacom_wac.c
+++ b/drivers/hid/wacom_wac.c
@@ -2487,8 +2487,14 @@ void wacom_setup_device_quirks(struct wacom *wacom)
 			if (features->type >= INTUOSHT && features->type <= BAMBOO_PT)
 				features->device_type |= WACOM_DEVICETYPE_PAD;
 
-			features->x_max = 4096;
-			features->y_max = 4096;
+			if (features->type == INTUOSHT2) {
+				features->x_max = features->x_max / 10;
+				features->y_max = features->y_max / 10;
+			}
+			else {
+				features->x_max = 4096;
+				features->y_max = 4096;
+			}
 		}
 		else if (features->pktlen == WACOM_PKGLEN_BBTOUCH) {
 			features->device_type |= WACOM_DEVICETYPE_PAD;

From fe001fdf1b9cce73a9301b58c952db1af803a24b Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@nxp.com>
Date: Mon, 25 Jun 2018 09:34:03 -0300
Subject: [PATCH 1653/1852] ARM: imx_v6_v7_defconfig: Select ULPI support

[ Upstream commit 157bcc06094c3c5800d3f4676527047b79b618e7 ]

Select CONFIG_USB_CHIPIDEA_ULPI and CONFIG_USB_ULPI_BUS so that
USB ULPI can be functional on some boards like imx51-babbge.

This fixes a kernel hang in 4.18-rc1 on i.mx51-babbage, caused by commit
03e6275ae381 ("usb: chipidea: Fix ULPI on imx51").

Suggested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 4187f69f66304..b3490c1c49d1b 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -261,6 +261,7 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_ULPI=y
 CONFIG_USB_SERIAL=m
 CONFIG_USB_SERIAL_GENERIC=y
 CONFIG_USB_SERIAL_FTDI_SIO=m
@@ -287,6 +288,7 @@ CONFIG_USB_G_NCM=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_MASS_STORAGE=m
 CONFIG_USB_G_SERIAL=m
+CONFIG_USB_ULPI_BUS=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y

From 9511107017342e13ebe240620e10fcba4622fe6d Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@nxp.com>
Date: Tue, 26 Jun 2018 08:37:09 -0300
Subject: [PATCH 1654/1852] ARM: imx_v4_v5_defconfig: Select ULPI support

[ Upstream commit 2ceb2780b790b74bc408a949f6aedbad8afa693e ]

Select CONFIG_USB_CHIPIDEA_ULPI and CONFIG_USB_ULPI_BUS so that
USB ULPI can be functional on some boards like that use ULPI
interface.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/configs/imx_v4_v5_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index d3a8018639de2..f4a2d28936e1e 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -145,9 +145,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_ULPI=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
+CONFIG_USB_ULPI_BUS=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y

From f3703dcce96828cccd01f940d3a7120f9d0ff183 Mon Sep 17 00:00:00 2001
From: Mathieu Malaterre <malat@debian.org>
Date: Thu, 8 Mar 2018 21:58:43 +0100
Subject: [PATCH 1655/1852] tracing: Use __printf markup to silence compiler
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit 26b68dd2f48fe7699a89f0cfbb9f4a650dc1c837 ]

Silence warnings (triggered at W=1) by adding relevant __printf attributes.

  CC      kernel/trace/trace.o
kernel/trace/trace.c: In function ‘__trace_array_vprintk’:
kernel/trace/trace.c:2979:2: warning: function might be possible candidate for ‘gnu_printf’ format attribute [-Wsuggest-attribute=format]
  len = vscnprintf(tbuffer, TRACE_BUF_SIZE, fmt, args);
  ^~~
  AR      kernel/trace/built-in.o

Link: http://lkml.kernel.org/r/20180308205843.27447-1-malat@debian.org

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/trace/trace.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index 6627647d85087..efdddec2af6e3 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -2207,6 +2207,7 @@ int trace_vbprintk(unsigned long ip, const char *fmt, va_list args)
 }
 EXPORT_SYMBOL_GPL(trace_vbprintk);
 
+__printf(3, 0)
 static int
 __trace_array_vprintk(struct ring_buffer *buffer,
 		      unsigned long ip, const char *fmt, va_list args)
@@ -2257,12 +2258,14 @@ __trace_array_vprintk(struct ring_buffer *buffer,
 	return len;
 }
 
+__printf(3, 0)
 int trace_array_vprintk(struct trace_array *tr,
 			unsigned long ip, const char *fmt, va_list args)
 {
 	return __trace_array_vprintk(tr->trace_buffer.buffer, ip, fmt, args);
 }
 
+__printf(3, 0)
 int trace_array_printk(struct trace_array *tr,
 		       unsigned long ip, const char *fmt, ...)
 {
@@ -2278,6 +2281,7 @@ int trace_array_printk(struct trace_array *tr,
 	return ret;
 }
 
+__printf(3, 4)
 int trace_array_printk_buf(struct ring_buffer *buffer,
 			   unsigned long ip, const char *fmt, ...)
 {
@@ -2293,6 +2297,7 @@ int trace_array_printk_buf(struct ring_buffer *buffer,
 	return ret;
 }
 
+__printf(2, 0)
 int trace_vprintk(unsigned long ip, const char *fmt, va_list args)
 {
 	return trace_array_vprintk(&global_trace, ip, fmt, args);

From f410981fc43b77f098f63d88fa262fcec7f52cf6 Mon Sep 17 00:00:00 2001
From: Zhen Lei <thunder.leizhen@huawei.com>
Date: Tue, 3 Jul 2018 17:02:46 -0700
Subject: [PATCH 1656/1852] kasan: fix shadow_size calculation error in
 kasan_module_alloc

[ Upstream commit 1e8e18f694a52d703665012ca486826f64bac29d ]

There is a special case that the size is "(N << KASAN_SHADOW_SCALE_SHIFT)
Pages plus X", the value of X is [1, KASAN_SHADOW_SCALE_SIZE-1].  The
operation "size >> KASAN_SHADOW_SCALE_SHIFT" will drop X, and the
roundup operation can not retrieve the missed one page.  For example:
size=0x28006, PAGE_SIZE=0x1000, KASAN_SHADOW_SCALE_SHIFT=3, we will get
shadow_size=0x5000, but actually we need 6 pages.

  shadow_size = round_up(size >> KASAN_SHADOW_SCALE_SHIFT, PAGE_SIZE);

This can lead to a kernel crash when kasan is enabled and the value of
mod->core_layout.size or mod->init_layout.size is like above.  Because
the shadow memory of X has not been allocated and mapped.

move_module:
  ptr = module_alloc(mod->core_layout.size);
  ...
  memset(ptr, 0, mod->core_layout.size);		//crashed

  Unable to handle kernel paging request at virtual address ffff0fffff97b000
  ......
  Call trace:
    __asan_storeN+0x174/0x1a8
    memset+0x24/0x48
    layout_and_allocate+0xcd8/0x1800
    load_module+0x190/0x23e8
    SyS_finit_module+0x148/0x180

Link: http://lkml.kernel.org/r/1529659626-12660-1-git-send-email-thunder.leizhen@huawei.com
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Reviewed-by: Dmitriy Vyukov <dvyukov@google.com>
Acked-by: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Hanjun Guo <guohanjun@huawei.com>
Cc: Libin <huawei.libin@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/kasan/kasan.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
index eeaaac0fb24a1..2bfdb3c23e729 100644
--- a/mm/kasan/kasan.c
+++ b/mm/kasan/kasan.c
@@ -678,12 +678,13 @@ void kasan_kfree_large(const void *ptr)
 int kasan_module_alloc(void *addr, size_t size)
 {
 	void *ret;
+	size_t scaled_size;
 	size_t shadow_size;
 	unsigned long shadow_start;
 
 	shadow_start = (unsigned long)kasan_mem_to_shadow(addr);
-	shadow_size = round_up(size >> KASAN_SHADOW_SCALE_SHIFT,
-			PAGE_SIZE);
+	scaled_size = (size + KASAN_SHADOW_MASK) >> KASAN_SHADOW_SCALE_SHIFT;
+	shadow_size = round_up(scaled_size, PAGE_SIZE);
 
 	if (WARN_ON(!PAGE_ALIGNED(shadow_start)))
 		return -EINVAL;

From 9e2779f971c9036eba83c03ac3f219f35e100fa9 Mon Sep 17 00:00:00 2001
From: Yuiko Oshino <yuiko.oshino@microchip.com>
Date: Tue, 3 Jul 2018 11:21:46 -0400
Subject: [PATCH 1657/1852] smsc75xx: Add workaround for gigabit link up
 hardware errata.

[ Upstream commit d461e3da905332189aad546b2ad9adbe6071c7cc ]

In certain conditions, the device may not be able to link in gigabit mode. This software workaround ensures that the device will not enter the failure state.

Fixes: d0cad871703b898a442e4049c532ec39168e5b57 ("SMSC75XX USB 2.0 Gigabit Ethernet Devices")
Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/smsc75xx.c | 62 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/drivers/net/usb/smsc75xx.c b/drivers/net/usb/smsc75xx.c
index 7337e6c0e1263..478937418a331 100644
--- a/drivers/net/usb/smsc75xx.c
+++ b/drivers/net/usb/smsc75xx.c
@@ -81,6 +81,9 @@ static bool turbo_mode = true;
 module_param(turbo_mode, bool, 0644);
 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
 
+static int smsc75xx_link_ok_nopm(struct usbnet *dev);
+static int smsc75xx_phy_gig_workaround(struct usbnet *dev);
+
 static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
 					    u32 *data, int in_pm)
 {
@@ -840,6 +843,9 @@ static int smsc75xx_phy_initialize(struct usbnet *dev)
 		return -EIO;
 	}
 
+	/* phy workaround for gig link */
+	smsc75xx_phy_gig_workaround(dev);
+
 	smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 		ADVERTISE_PAUSE_ASYM);
@@ -978,6 +984,62 @@ static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
 	return -EIO;
 }
 
+static int smsc75xx_phy_gig_workaround(struct usbnet *dev)
+{
+	struct mii_if_info *mii = &dev->mii;
+	int ret = 0, timeout = 0;
+	u32 buf, link_up = 0;
+
+	/* Set the phy in Gig loopback */
+	smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040);
+
+	/* Wait for the link up */
+	do {
+		link_up = smsc75xx_link_ok_nopm(dev);
+		usleep_range(10000, 20000);
+		timeout++;
+	} while ((!link_up) && (timeout < 1000));
+
+	if (timeout >= 1000) {
+		netdev_warn(dev->net, "Timeout waiting for PHY link up\n");
+		return -EIO;
+	}
+
+	/* phy reset */
+	ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
+	if (ret < 0) {
+		netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
+		return ret;
+	}
+
+	buf |= PMT_CTL_PHY_RST;
+
+	ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
+	if (ret < 0) {
+		netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
+		return ret;
+	}
+
+	timeout = 0;
+	do {
+		usleep_range(10000, 20000);
+		ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
+		if (ret < 0) {
+			netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n",
+				    ret);
+			return ret;
+		}
+		timeout++;
+	} while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
+
+	if (timeout >= 100) {
+		netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+
 static int smsc75xx_reset(struct usbnet *dev)
 {
 	struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);

From f016e4fe856f1ac99f8ded2ade8793ab8da4c918 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Wed, 4 Jul 2018 20:25:32 +0200
Subject: [PATCH 1658/1852] netfilter: x_tables: set module owner for icmp(6)
 matches

[ Upstream commit d376bef9c29b3c65aeee4e785fffcd97ef0a9a81 ]

nft_compat relies on xt_request_find_match to increment
refcount of the module that provides the match/target.

The (builtin) icmp matches did't set the module owner so it
was possible to rmmod ip(6)tables while icmp extensions were still in use.

Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/netfilter/ip_tables.c  | 1 +
 net/ipv6/netfilter/ip6_tables.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c
index 9363c1a70f161..8adb6e9ba8f5a 100644
--- a/net/ipv4/netfilter/ip_tables.c
+++ b/net/ipv4/netfilter/ip_tables.c
@@ -2072,6 +2072,7 @@ static struct xt_match ipt_builtin_mt[] __read_mostly = {
 		.checkentry = icmp_checkentry,
 		.proto      = IPPROTO_ICMP,
 		.family     = NFPROTO_IPV4,
+		.me	    = THIS_MODULE,
 	},
 };
 
diff --git a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c
index 6cb9e35d23ac8..96de322fe5e2c 100644
--- a/net/ipv6/netfilter/ip6_tables.c
+++ b/net/ipv6/netfilter/ip6_tables.c
@@ -2073,6 +2073,7 @@ static struct xt_match ip6t_builtin_mt[] __read_mostly = {
 		.checkentry = icmp6_checkentry,
 		.proto      = IPPROTO_ICMPV6,
 		.family     = NFPROTO_IPV6,
+		.me	    = THIS_MODULE,
 	},
 };
 

From 071df9349941335dcb006b07ed355d90d046859f Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Fri, 6 Jul 2018 22:15:00 +0200
Subject: [PATCH 1659/1852] ARM: pxa: irq: fix handling of ICMR registers in
 suspend/resume

[ Upstream commit 0c1049dcb4ceec640d8bd797335bcbebdcab44d2 ]

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/mach-pxa/irq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 9c10248fadccc..4e8c2116808ec 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -185,7 +185,7 @@ static int pxa_irq_suspend(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
 		void __iomem *base = irq_base(i);
 
 		saved_icmr[i] = __raw_readl(base + ICMR);
@@ -204,7 +204,7 @@ static void pxa_irq_resume(void)
 {
 	int i;
 
-	for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+	for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
 		void __iomem *base = irq_base(i);
 
 		__raw_writel(saved_icmr[i], base + ICMR);

From e67ae7f3d1e8af117fce988855ebb6dba555a79e Mon Sep 17 00:00:00 2001
From: Stefan Schmidt <stefan@datenfreihafen.org>
Date: Fri, 22 Sep 2017 14:13:53 +0200
Subject: [PATCH 1660/1852] ieee802154: at86rf230: switch from BUG_ON() to
 WARN_ON() on problem

[ Upstream commit 20f330452ad8814f2289a589baf65e21270879a7 ]

The check is valid but it does not warrant to crash the kernel. A
WARN_ON() is good enough here.
Found by checkpatch.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ieee802154/at86rf230.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c
index 0fbbba7a0cae3..184185da2f8b1 100644
--- a/drivers/net/ieee802154/at86rf230.c
+++ b/drivers/net/ieee802154/at86rf230.c
@@ -932,7 +932,7 @@ at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
 static int
 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
 {
-	BUG_ON(!level);
+	WARN_ON(!level);
 	*level = 0xbe;
 	return 0;
 }

From 31fa577e116b819e05126314b56d4922cfec1cfc Mon Sep 17 00:00:00 2001
From: Stefan Schmidt <stefan@datenfreihafen.org>
Date: Fri, 22 Sep 2017 14:13:54 +0200
Subject: [PATCH 1661/1852] ieee802154: at86rf230: use __func__ macro for debug
 messages

[ Upstream commit 8a81388ec27c4c0adbdecd20e67bb5f411ab46b2 ]

Instead of having the function name hard-coded (it might change and we
forgot to update them in the debug output) we can use __func__ instead
and also shorter the line so we do not need to break it. Also fix an
extra blank line while being here.
Found by checkpatch.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ieee802154/at86rf230.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c
index 184185da2f8b1..f72c2967ae824 100644
--- a/drivers/net/ieee802154/at86rf230.c
+++ b/drivers/net/ieee802154/at86rf230.c
@@ -1108,8 +1108,7 @@ at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
 	if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
 		u16 addr = le16_to_cpu(filt->short_addr);
 
-		dev_vdbg(&lp->spi->dev,
-			 "at86rf230_set_hw_addr_filt called for saddr\n");
+		dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
 		__at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
 		__at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
 	}
@@ -1117,8 +1116,7 @@ at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
 	if (changed & IEEE802154_AFILT_PANID_CHANGED) {
 		u16 pan = le16_to_cpu(filt->pan_id);
 
-		dev_vdbg(&lp->spi->dev,
-			 "at86rf230_set_hw_addr_filt called for pan id\n");
+		dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
 		__at86rf230_write(lp, RG_PAN_ID_0, pan);
 		__at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
 	}
@@ -1127,15 +1125,13 @@ at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
 		u8 i, addr[8];
 
 		memcpy(addr, &filt->ieee_addr, 8);
-		dev_vdbg(&lp->spi->dev,
-			 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
+		dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
 		for (i = 0; i < 8; i++)
 			__at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
 	}
 
 	if (changed & IEEE802154_AFILT_PANC_CHANGED) {
-		dev_vdbg(&lp->spi->dev,
-			 "at86rf230_set_hw_addr_filt called for panc change\n");
+		dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
 		if (filt->pan_coord)
 			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
 		else
@@ -1239,7 +1235,6 @@ at86rf230_set_cca_mode(struct ieee802154_hw *hw,
 	return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
 }
 
-
 static int
 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
 {

From 916d90104232d775de966ee97abbb8765714ef79 Mon Sep 17 00:00:00 2001
From: Stefan Schmidt <stefan@datenfreihafen.org>
Date: Fri, 22 Sep 2017 14:14:05 +0200
Subject: [PATCH 1662/1852] ieee802154: fakelb: switch from BUG_ON() to
 WARN_ON() on problem

[ Upstream commit 8f2fbc6c60ff213369e06a73610fc882a42fdf20 ]

The check is valid but it does not warrant to crash the kernel. A
WARN_ON() is good enough here.
Found by checkpatch.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ieee802154/fakelb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ieee802154/fakelb.c b/drivers/net/ieee802154/fakelb.c
index 43617ded37738..91de25c532746 100644
--- a/drivers/net/ieee802154/fakelb.c
+++ b/drivers/net/ieee802154/fakelb.c
@@ -49,7 +49,7 @@ struct fakelb_phy {
 
 static int fakelb_hw_ed(struct ieee802154_hw *hw, u8 *level)
 {
-	BUG_ON(!level);
+	WARN_ON(!level);
 	*level = 0xbe;
 
 	return 0;

From 1d30bd1f8752fac79af01666250b3aad5df81fad Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Sun, 24 Jun 2018 14:35:10 +0100
Subject: [PATCH 1663/1852] drm/armada: fix colorkey mode property

[ Upstream commit d378859a667edc99e3473704847698cae97ca2b1 ]

The colorkey mode property was not correctly disabling the colorkeying
when "disabled" mode was selected.  Arrange for this to work as one
would expect.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/armada/armada_hw.h      |  1 +
 drivers/gpu/drm/armada/armada_overlay.c | 30 ++++++++++++++++++-------
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/armada/armada_hw.h b/drivers/gpu/drm/armada/armada_hw.h
index 27319a8335e25..345dc4d0851ef 100644
--- a/drivers/gpu/drm/armada/armada_hw.h
+++ b/drivers/gpu/drm/armada/armada_hw.h
@@ -160,6 +160,7 @@ enum {
 	CFG_ALPHAM_GRA		= 0x1 << 16,
 	CFG_ALPHAM_CFG		= 0x2 << 16,
 	CFG_ALPHA_MASK		= 0xff << 8,
+#define CFG_ALPHA(x)		((x) << 8)
 	CFG_PIXCMD_MASK		= 0xff,
 };
 
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index 148e8a42b2c69..9ffd91fb623d2 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -27,6 +27,7 @@ struct armada_ovl_plane_properties {
 	uint16_t contrast;
 	uint16_t saturation;
 	uint32_t colorkey_mode;
+	uint32_t colorkey_enable;
 };
 
 struct armada_ovl_plane {
@@ -62,11 +63,13 @@ armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
 	writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
 
 	spin_lock_irq(&dcrtc->irq_lock);
-	armada_updatel(prop->colorkey_mode | CFG_ALPHAM_GRA,
-		     CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
-		     dcrtc->base + LCD_SPU_DMA_CTRL1);
-
-	armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG);
+	armada_updatel(prop->colorkey_mode,
+		       CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
+		       dcrtc->base + LCD_SPU_DMA_CTRL1);
+	if (dcrtc->variant->has_spu_adv_reg)
+		armada_updatel(prop->colorkey_enable,
+			       ADV_GRACOLORKEY | ADV_VIDCOLORKEY,
+			       dcrtc->base + LCD_SPU_ADV_REG);
 	spin_unlock_irq(&dcrtc->irq_lock);
 }
 
@@ -339,8 +342,17 @@ static int armada_ovl_plane_set_property(struct drm_plane *plane,
 		dplane->prop.colorkey_vb |= K2B(val);
 		update_attr = true;
 	} else if (property == priv->colorkey_mode_prop) {
-		dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK;
-		dplane->prop.colorkey_mode |= CFG_CKMODE(val);
+		if (val == CKMODE_DISABLE) {
+			dplane->prop.colorkey_mode =
+				CFG_CKMODE(CKMODE_DISABLE) |
+				CFG_ALPHAM_CFG | CFG_ALPHA(255);
+			dplane->prop.colorkey_enable = 0;
+		} else {
+			dplane->prop.colorkey_mode =
+				CFG_CKMODE(val) |
+				CFG_ALPHAM_GRA | CFG_ALPHA(0);
+			dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
+		}
 		update_attr = true;
 	} else if (property == priv->brightness_prop) {
 		dplane->prop.brightness = val - 256;
@@ -469,7 +481,9 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
 	dplane->prop.colorkey_yr = 0xfefefe00;
 	dplane->prop.colorkey_ug = 0x01010100;
 	dplane->prop.colorkey_vb = 0x01010100;
-	dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB);
+	dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB) |
+				     CFG_ALPHAM_GRA | CFG_ALPHA(0);
+	dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
 	dplane->prop.brightness = 0;
 	dplane->prop.contrast = 0x4000;
 	dplane->prop.saturation = 0x4000;

From e254596f70085ca73051a72243b2bbc82b5298cc Mon Sep 17 00:00:00 2001
From: Vikas Gupta <vikas.gupta@broadcom.com>
Date: Mon, 9 Jul 2018 02:24:52 -0400
Subject: [PATCH 1664/1852] bnxt_en: Fix for system hang if request_irq fails

[ Upstream commit c58387ab1614f6d7fb9e244f214b61e7631421fc ]

Fix bug in the error code path when bnxt_request_irq() returns failure.
bnxt_disable_napi() should not be called in this error path because
NAPI has not been enabled yet.

Fixes: c0c050c58d84 ("bnxt_en: New Broadcom ethernet driver.")
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bnxt/bnxt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
index 9904d768a20a7..4ffacafddacb9 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -4591,7 +4591,7 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)
 		rc = bnxt_request_irq(bp);
 		if (rc) {
 			netdev_err(bp->dev, "bnxt_request_irq err: %x\n", rc);
-			goto open_err;
+			goto open_err_irq;
 		}
 	}
 
@@ -4629,6 +4629,8 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)
 
 open_err:
 	bnxt_disable_napi(bp);
+
+open_err_irq:
 	bnxt_del_napi(bp);
 
 open_err_free_mem:

From d854bb9318a9aefeba39364a10a94f6347593739 Mon Sep 17 00:00:00 2001
From: Kim Phillips <kim.phillips@arm.com>
Date: Fri, 29 Jun 2018 12:46:52 -0500
Subject: [PATCH 1665/1852] perf llvm-utils: Remove bashism from kernel include
 fetch script

[ Upstream commit f6432b9f65001651412dbc3589d251534822d4ab ]

Like system(), popen() calls /bin/sh, which may/may not be bash.

Script when run on dash and encounters the line, yields:

 exit: Illegal number: -1

checkbashisms report on script content:

 possible bashism (exit|return with negative status code):
 exit -1

Remove the bashism and use the more portable non-zero failure
status code 1.

Signed-off-by: Kim Phillips <kim.phillips@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sandipan Das <sandipan@linux.vnet.ibm.com>
Cc: Thomas Richter <tmricht@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/20180629124652.8d0af7e2281fd3fd8262cacc@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/perf/util/llvm-utils.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/perf/util/llvm-utils.c b/tools/perf/util/llvm-utils.c
index 00724d496d38c..62f6d7dc2ddae 100644
--- a/tools/perf/util/llvm-utils.c
+++ b/tools/perf/util/llvm-utils.c
@@ -254,16 +254,16 @@ static const char *kinc_fetch_script =
 "#!/usr/bin/env sh\n"
 "if ! test -d \"$KBUILD_DIR\"\n"
 "then\n"
-"	exit -1\n"
+"	exit 1\n"
 "fi\n"
 "if ! test -f \"$KBUILD_DIR/include/generated/autoconf.h\"\n"
 "then\n"
-"	exit -1\n"
+"	exit 1\n"
 "fi\n"
 "TMPDIR=`mktemp -d`\n"
 "if test -z \"$TMPDIR\"\n"
 "then\n"
-"    exit -1\n"
+"    exit 1\n"
 "fi\n"
 "cat << EOF > $TMPDIR/Makefile\n"
 "obj-y := dummy.o\n"

From 19182000a48f58e828f355a6334c11ac72a91413 Mon Sep 17 00:00:00 2001
From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Date: Tue, 10 Jul 2018 08:22:40 +0100
Subject: [PATCH 1666/1852] ARM: 8780/1: ftrace: Only set kernel memory back to
 read-only after boot

[ Upstream commit b4c7e2bd2eb4764afe3af9409ff3b1b87116fa30 ]

Dynamic ftrace requires modifying the code segments that are usually
set to read-only. To do this, a per arch function is called both before
and after the ftrace modifications are performed. The "before" function
will set kernel code text to read-write to allow for ftrace to make the
modifications, and the "after" function will set the kernel code text
back to "read-only" to keep the kernel code text protected.

The issue happens when dynamic ftrace is tested at boot up. The test is
done before the kernel code text has been set to read-only. But the
"before" and "after" calls are still performed. The "after" call will
change the kernel code text to read-only prematurely, and other boot
code that expects this code to be read-write will fail.

The solution is to add a variable that is set when the kernel code text
is expected to be converted to read-only, and make the ftrace "before"
and "after" calls do nothing if that variable is not yet set. This is
similar to the x86 solution from commit 162396309745 ("ftrace, x86:
make kernel text writable only for conversions").

Link: http://lkml.kernel.org/r/20180620212906.24b7b66e@vmware.local.home

Reported-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/mm/init.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index c29ad610311b4..a9f6705aea238 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -716,19 +716,28 @@ int __mark_rodata_ro(void *unused)
 	return 0;
 }
 
+static int kernel_set_to_readonly __read_mostly;
+
 void mark_rodata_ro(void)
 {
+	kernel_set_to_readonly = 1;
 	stop_machine(__mark_rodata_ro, NULL, NULL);
 }
 
 void set_kernel_text_rw(void)
 {
+	if (!kernel_set_to_readonly)
+		return;
+
 	set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), false,
 				current->active_mm);
 }
 
 void set_kernel_text_ro(void)
 {
+	if (!kernel_set_to_readonly)
+		return;
+
 	set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), true,
 				current->active_mm);
 }

From 30d074e746783990ab3ce65ec175f175b52d20c8 Mon Sep 17 00:00:00 2001
From: Adam Ford <aford173@gmail.com>
Date: Wed, 11 Jul 2018 12:54:54 -0500
Subject: [PATCH 1667/1852] ARM: dts: am3517.dtsi: Disable reference to OMAP3
 OTG controller

[ Upstream commit 923847413f7316b5ced3491769b3fefa6c56a79a ]

The AM3517 has a different OTG controller location than the OMAP3,
which is included from omap3.dtsi.  This results in a hwmod error.
Since the AM3517 has a different OTG controller address, this patch
disabes one that is isn't available.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/dts/am3517.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 5e3f5e86ffcfe..cfcbf5baba4f3 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -74,6 +74,11 @@
 	};
 };
 
+/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
+&usb_otg_hs {
+	status = "disabled";
+};
+
 &iva {
 	status = "disabled";
 };

From dbcb419a1c5e0d376134b2da49ebba06c22dc274 Mon Sep 17 00:00:00 2001
From: Alexander Duyck <alexander.h.duyck@intel.com>
Date: Mon, 18 Jun 2018 12:02:00 -0400
Subject: [PATCH 1668/1852] ixgbe: Be more careful when modifying MAC filters

[ Upstream commit d14c780c11fbc10f66c43e7b64eefe87ca442bd3 ]

This change makes it so that we are much more explicit about the ordering
of updates to the receive address register (RAR) table. Prior to this patch
I believe we may have been updating the table while entries were still
active, or possibly allowing for reordering of things since we weren't
explicitly flushing writes to either the lower or upper portion of the
register prior to accessing the other half.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_common.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 105dd00ddc1a3..cd2afe92f1daf 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -1814,7 +1814,12 @@ s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
 	if (enable_addr != 0)
 		rar_high |= IXGBE_RAH_AV;
 
+	/* Record lower 32 bits of MAC address and then make
+	 * sure that write is flushed to hardware before writing
+	 * the upper 16 bits and setting the valid bit.
+	 */
 	IXGBE_WRITE_REG(hw, IXGBE_RAL(index), rar_low);
+	IXGBE_WRITE_FLUSH(hw);
 	IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high);
 
 	return 0;
@@ -1846,8 +1851,13 @@ s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)
 	rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(index));
 	rar_high &= ~(0x0000FFFF | IXGBE_RAH_AV);
 
-	IXGBE_WRITE_REG(hw, IXGBE_RAL(index), 0);
+	/* Clear the address valid bit and upper 16 bits of the address
+	 * before clearing the lower bits. This way we aren't updating
+	 * a live filter.
+	 */
 	IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high);
+	IXGBE_WRITE_FLUSH(hw);
+	IXGBE_WRITE_REG(hw, IXGBE_RAL(index), 0);
 
 	/* clear VMDq pool/queue selection for this RAR */
 	hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL);

From 9e0e48daa449e3ad9be892b699f44a9259f5791e Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Wed, 11 Jul 2018 12:00:45 -0400
Subject: [PATCH 1669/1852] packet: reset network header if packet shorter than
 ll reserved space

[ Upstream commit 993675a3100b16a4c80dfd70cbcde8ea7127b31d ]

If variable length link layer headers result in a packet shorter
than dev->hard_header_len, reset the network header offset. Else
skb->mac_len may exceed skb->len after skb_mac_reset_len.

packet_sendmsg_spkt already has similar logic.

Fixes: b84bbaf7a6c8 ("packet: in packet_snd start writing at link layer allocation")
Signed-off-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/packet/af_packet.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 3a63f33698d3d..8de4e6620c1cc 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -2780,6 +2780,8 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
 			goto out_free;
 	} else if (reserve) {
 		skb_reserve(skb, -reserve);
+		if (len < reserve)
+			skb_reset_network_header(skb);
 	}
 
 	/* Returns -EFAULT on error */

From 6e32c2959f73d1fdf6de2e1cf759b71bca6c4b62 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 12 Jul 2018 15:23:45 +0300
Subject: [PATCH 1670/1852] qlogic: check kstrtoul() for errors

[ Upstream commit 5fc853cc01c68f84984ecc2d5fd777ecad78240f ]

We accidentally left out the error handling for kstrtoul().

Fixes: a520030e326a ("qlcnic: Implement flash sysfs callback for 83xx adapter")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
index ccbb04503b276..b53a18e365c24 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
@@ -1128,6 +1128,8 @@ static ssize_t qlcnic_83xx_sysfs_flash_write_handler(struct file *filp,
 	struct qlcnic_adapter *adapter = dev_get_drvdata(dev);
 
 	ret = kstrtoul(buf, 16, &data);
+	if (ret)
+		return ret;
 
 	switch (data) {
 	case QLC_83XX_FLASH_SECTOR_ERASE_CMD:

From faa0474d4b5added9f669cf82939cf79534869d5 Mon Sep 17 00:00:00 2001
From: Yuchung Cheng <ycheng@google.com>
Date: Thu, 12 Jul 2018 06:04:53 -0700
Subject: [PATCH 1671/1852] tcp: remove DELAYED ACK events in DCTCP

[ Upstream commit a69258f7aa2623e0930212f09c586fd06674ad79 ]

After fixing the way DCTCP tracking delayed ACKs, the delayed-ACK
related callbacks are no longer needed

Signed-off-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Acked-by: Lawrence Brakmo <brakmo@fb.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/net/tcp.h     |  2 --
 net/ipv4/tcp_dctcp.c  | 25 -------------------------
 net/ipv4/tcp_output.c |  4 ----
 3 files changed, 31 deletions(-)

diff --git a/include/net/tcp.h b/include/net/tcp.h
index 25a6090f18263..ef2f863275cf0 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -822,8 +822,6 @@ enum tcp_ca_event {
 	CA_EVENT_LOSS,		/* loss timeout */
 	CA_EVENT_ECN_NO_CE,	/* ECT set, but not CE marked */
 	CA_EVENT_ECN_IS_CE,	/* received CE marked IP packet */
-	CA_EVENT_DELAYED_ACK,	/* Delayed ack is sent */
-	CA_EVENT_NON_DELAYED_ACK,
 };
 
 /* Information about inbound ACK, passed to cong_ops->in_ack_event() */
diff --git a/net/ipv4/tcp_dctcp.c b/net/ipv4/tcp_dctcp.c
index 6300edf90e604..62f90f6b7a9d7 100644
--- a/net/ipv4/tcp_dctcp.c
+++ b/net/ipv4/tcp_dctcp.c
@@ -55,7 +55,6 @@ struct dctcp {
 	u32 dctcp_alpha;
 	u32 next_seq;
 	u32 ce_state;
-	u32 delayed_ack_reserved;
 	u32 loss_cwnd;
 };
 
@@ -96,7 +95,6 @@ static void dctcp_init(struct sock *sk)
 
 		ca->dctcp_alpha = min(dctcp_alpha_on_init, DCTCP_MAX_ALPHA);
 
-		ca->delayed_ack_reserved = 0;
 		ca->loss_cwnd = 0;
 		ca->ce_state = 0;
 
@@ -230,25 +228,6 @@ static void dctcp_state(struct sock *sk, u8 new_state)
 	}
 }
 
-static void dctcp_update_ack_reserved(struct sock *sk, enum tcp_ca_event ev)
-{
-	struct dctcp *ca = inet_csk_ca(sk);
-
-	switch (ev) {
-	case CA_EVENT_DELAYED_ACK:
-		if (!ca->delayed_ack_reserved)
-			ca->delayed_ack_reserved = 1;
-		break;
-	case CA_EVENT_NON_DELAYED_ACK:
-		if (ca->delayed_ack_reserved)
-			ca->delayed_ack_reserved = 0;
-		break;
-	default:
-		/* Don't care for the rest. */
-		break;
-	}
-}
-
 static void dctcp_cwnd_event(struct sock *sk, enum tcp_ca_event ev)
 {
 	switch (ev) {
@@ -258,10 +237,6 @@ static void dctcp_cwnd_event(struct sock *sk, enum tcp_ca_event ev)
 	case CA_EVENT_ECN_NO_CE:
 		dctcp_ce_state_1_to_0(sk);
 		break;
-	case CA_EVENT_DELAYED_ACK:
-	case CA_EVENT_NON_DELAYED_ACK:
-		dctcp_update_ack_reserved(sk, ev);
-		break;
 	default:
 		/* Don't care for the rest. */
 		break;
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index b7c333c7de8bd..f3952c75c47a7 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -3316,8 +3316,6 @@ void tcp_send_delayed_ack(struct sock *sk)
 	int ato = icsk->icsk_ack.ato;
 	unsigned long timeout;
 
-	tcp_ca_event(sk, CA_EVENT_DELAYED_ACK);
-
 	if (ato > TCP_DELACK_MIN) {
 		const struct tcp_sock *tp = tcp_sk(sk);
 		int max_ato = HZ / 2;
@@ -3374,8 +3372,6 @@ void __tcp_send_ack(struct sock *sk, u32 rcv_nxt)
 	if (sk->sk_state == TCP_CLOSE)
 		return;
 
-	tcp_ca_event(sk, CA_EVENT_NON_DELAYED_ACK);
-
 	/* We are not putting this on the write queue, so
 	 * tcp_transmit_skb() will set the ownership to this
 	 * sock.

From 22c4ecadb11e257e7c7201571956f39d442369e4 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 3 Jul 2018 15:30:56 +0300
Subject: [PATCH 1672/1852] drm/nouveau/gem: off by one bugs in
 nouveau_gem_pushbuf_reloc_apply()

[ Upstream commit 7f073d011f93e92d4d225526b9ab6b8b0bbd6613 ]

The bo array has req->nr_buffers elements so the > should be >= so we
don't read beyond the end of the array.

Fixes: a1606a9596e5 ("drm/nouveau: new gem pushbuf interface, bump to 0.0.16")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/nouveau/nouveau_gem.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 495c279da2009..ae560f5977fca 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -602,7 +602,7 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli,
 		struct nouveau_bo *nvbo;
 		uint32_t data;
 
-		if (unlikely(r->bo_index > req->nr_buffers)) {
+		if (unlikely(r->bo_index >= req->nr_buffers)) {
 			NV_PRINTK(err, cli, "reloc bo index invalid\n");
 			ret = -EINVAL;
 			break;
@@ -612,7 +612,7 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli,
 		if (b->presumed.valid)
 			continue;
 
-		if (unlikely(r->reloc_bo_index > req->nr_buffers)) {
+		if (unlikely(r->reloc_bo_index >= req->nr_buffers)) {
 			NV_PRINTK(err, cli, "reloc container bo index invalid\n");
 			ret = -EINVAL;
 			break;

From dbb9da7005064d96c67065b336c4048fac881f7c Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Fri, 13 Jul 2018 21:25:19 -0700
Subject: [PATCH 1673/1852] net/ethernet/freescale/fman: fix cross-build error

[ Upstream commit c133459765fae249ba482f62e12f987aec4376f0 ]

  CC [M]  drivers/net/ethernet/freescale/fman/fman.o
In file included from ../drivers/net/ethernet/freescale/fman/fman.c:35:
../include/linux/fsl/guts.h: In function 'guts_set_dmacr':
../include/linux/fsl/guts.h:165:2: error: implicit declaration of function 'clrsetbits_be32' [-Werror=implicit-function-declaration]
  clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift);
  ^~~~~~~~~~~~~~~

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Madalin Bucur <madalin.bucur@nxp.com>
Cc: netdev@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 include/linux/fsl/guts.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/fsl/guts.h b/include/linux/fsl/guts.h
index 84d971ff3fba5..5d06e838e650f 100644
--- a/include/linux/fsl/guts.h
+++ b/include/linux/fsl/guts.h
@@ -16,6 +16,7 @@
 #define __FSL_GUTS_H__
 
 #include <linux/types.h>
+#include <linux/io.h>
 
 /**
  * Global Utility Registers.

From 6ecd85647d5e9d1cf84b42719aea6cd63c322dce Mon Sep 17 00:00:00 2001
From: David Lechner <david@lechnology.com>
Date: Mon, 16 Jul 2018 17:58:10 -0500
Subject: [PATCH 1674/1852] net: usb: rtl8150: demote allmulti message to
 dev_dbg()

[ Upstream commit 3a9b0455062ffb9d2f6cd4473a76e3456f318c9f ]

This driver can spam the kernel log with multiple messages of:

    net eth0: eth0: allmulti set

Usually 4 or 8 at a time (probably because of using ConnMan).

This message doesn't seem useful, so let's demote it from dev_info()
to dev_dbg().

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/usb/rtl8150.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index 39672984dde1d..58b1e18fdd64d 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -681,7 +681,7 @@ static void rtl8150_set_multicast(struct net_device *netdev)
 		   (netdev->flags & IFF_ALLMULTI)) {
 		rx_creg &= 0xfffe;
 		rx_creg |= 0x0002;
-		dev_info(&netdev->dev, "%s: allmulti set\n", netdev->name);
+		dev_dbg(&netdev->dev, "%s: allmulti set\n", netdev->name);
 	} else {
 		/* ~RX_MULTICAST, ~RX_PROMISCUOUS */
 		rx_creg &= 0x00fc;

From d2c81e0c7cd7e9ec0d0f892ee9ea064a94ae938c Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Wed, 18 Jul 2018 08:31:43 +0200
Subject: [PATCH 1675/1852] net: qca_spi: Avoid packet drop during initial sync

[ Upstream commit b2bab426dc715de147f8039a3fccff27d795f4eb ]

As long as the synchronization with the QCA7000 isn't finished, we
cannot accept packets from the upper layers. So let the SPI thread
enable the TX queue after sync and avoid unwanted packet drop.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: 291ab06ecf67 ("net: qualcomm: new Ethernet over SPI driver for QCA7000")
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qualcomm/qca_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c
index c90ae4d4be7d9..7b903af19e573 100644
--- a/drivers/net/ethernet/qualcomm/qca_spi.c
+++ b/drivers/net/ethernet/qualcomm/qca_spi.c
@@ -635,7 +635,7 @@ qcaspi_netdev_open(struct net_device *dev)
 		return ret;
 	}
 
-	netif_start_queue(qca->net_dev);
+	/* SPI thread takes care of TX queue */
 
 	return 0;
 }

From 03db448a70f546d7fff658c5596beb841ec0b383 Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Wed, 18 Jul 2018 08:31:44 +0200
Subject: [PATCH 1676/1852] net: qca_spi: Make sure the QCA7000 reset is
 triggered

[ Upstream commit 711c62dfa6bdb4326ca6c587f295ea5c4f7269de ]

In case the SPI thread is not running, a simple reset of sync
state won't fix the transmit timeout. We also need to wake up the kernel
thread.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: ed7d42e24eff ("net: qca_spi: fix transmit queue timeout handling")
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qualcomm/qca_spi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c
index 7b903af19e573..25f673059c655 100644
--- a/drivers/net/ethernet/qualcomm/qca_spi.c
+++ b/drivers/net/ethernet/qualcomm/qca_spi.c
@@ -739,6 +739,9 @@ qcaspi_netdev_tx_timeout(struct net_device *dev)
 	qca->net_dev->stats.tx_errors++;
 	/* Trigger tx queue flush and QCA7000 reset */
 	qca->sync = QCASPI_SYNC_UNKNOWN;
+
+	if (qca->spi_thread)
+		wake_up_process(qca->spi_thread);
 }
 
 static int

From 9a7c15d277f035f576941f7a2fe8d4e389b22806 Mon Sep 17 00:00:00 2001
From: Stefan Wahren <stefan.wahren@i2se.com>
Date: Wed, 18 Jul 2018 08:31:45 +0200
Subject: [PATCH 1677/1852] net: qca_spi: Fix log level if probe fails

[ Upstream commit 50973993260a6934f0a00da53d9b746cfbea89ab ]

In cases the probing fails the log level of the messages should
be an error.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qualcomm/qca_spi.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c
index 25f673059c655..7886a8a5b55b3 100644
--- a/drivers/net/ethernet/qualcomm/qca_spi.c
+++ b/drivers/net/ethernet/qualcomm/qca_spi.c
@@ -868,22 +868,22 @@ qca_spi_probe(struct spi_device *spi)
 
 	if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
 	    (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
-		dev_info(&spi->dev, "Invalid clkspeed: %d\n",
-			 qcaspi_clkspeed);
+		dev_err(&spi->dev, "Invalid clkspeed: %d\n",
+			qcaspi_clkspeed);
 		return -EINVAL;
 	}
 
 	if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
 	    (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
-		dev_info(&spi->dev, "Invalid burst len: %d\n",
-			 qcaspi_burst_len);
+		dev_err(&spi->dev, "Invalid burst len: %d\n",
+			qcaspi_burst_len);
 		return -EINVAL;
 	}
 
 	if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
 	    (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
-		dev_info(&spi->dev, "Invalid pluggable: %d\n",
-			 qcaspi_pluggable);
+		dev_err(&spi->dev, "Invalid pluggable: %d\n",
+			qcaspi_pluggable);
 		return -EINVAL;
 	}
 
@@ -944,8 +944,8 @@ qca_spi_probe(struct spi_device *spi)
 	}
 
 	if (register_netdev(qcaspi_devs)) {
-		dev_info(&spi->dev, "Unable to register net device %s\n",
-			 qcaspi_devs->name);
+		dev_err(&spi->dev, "Unable to register net device %s\n",
+			qcaspi_devs->name);
 		free_netdev(qcaspi_devs);
 		return -EFAULT;
 	}

From a4e390f74bae6690252dcf56dff4a38ce1be2547 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Tue, 17 Jul 2018 18:27:45 -0700
Subject: [PATCH 1678/1852] tcp: identify cryptic messages as TCP seq # bugs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit e56b8ce363a36fb7b74b80aaa5cc9084f2c908b4 ]

Attempt to make cryptic TCP seq number error messages clearer by
(1) identifying the source of the message as "TCP", (2) identifying the
errors as "seq # bug", and (3) grouping the field identifiers and values
by separating them with commas.

E.g., the following message is changed from:

recvmsg bug 2: copied 73BCB6CD seq 70F17CBE rcvnxt 73BCB9AA fl 0
WARNING: CPU: 2 PID: 1501 at /linux/net/ipv4/tcp.c:1881 tcp_recvmsg+0x649/0xb90

to:

TCP recvmsg seq # bug 2: copied 73BCB6CD, seq 70F17CBE, rcvnxt 73BCB9AA, fl 0
WARNING: CPU: 2 PID: 1501 at /linux/net/ipv4/tcp.c:2011 tcp_recvmsg+0x694/0xba0

Suggested-by: �丹尼 Dan Jacobson <jidanni@jidanni.org>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/tcp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 49073965f18f5..e7be8e49a360d 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -1659,7 +1659,7 @@ int tcp_recvmsg(struct sock *sk, struct msghdr *msg, size_t len, int nonblock,
 			 * shouldn't happen.
 			 */
 			if (WARN(before(*seq, TCP_SKB_CB(skb)->seq),
-				 "recvmsg bug: copied %X seq %X rcvnxt %X fl %X\n",
+				 "TCP recvmsg seq # bug: copied %X, seq %X, rcvnxt %X, fl %X\n",
 				 *seq, TCP_SKB_CB(skb)->seq, tp->rcv_nxt,
 				 flags))
 				break;
@@ -1672,7 +1672,7 @@ int tcp_recvmsg(struct sock *sk, struct msghdr *msg, size_t len, int nonblock,
 			if (TCP_SKB_CB(skb)->tcp_flags & TCPHDR_FIN)
 				goto found_fin_ok;
 			WARN(!(flags & MSG_PEEK),
-			     "recvmsg bug 2: copied %X seq %X rcvnxt %X fl %X\n",
+			     "TCP recvmsg seq # bug 2: copied %X, seq %X, rcvnxt %X, fl %X\n",
 			     *seq, TCP_SKB_CB(skb)->seq, tp->rcv_nxt, flags);
 		}
 

From 19c12ea1639bd326bf902e95b5ac6924a9ad9e6a Mon Sep 17 00:00:00 2001
From: Daniel Rosenberg <drosen@google.com>
Date: Tue, 21 Aug 2018 13:31:50 -0700
Subject: [PATCH 1679/1852] staging: android: ion: check for kref overflow

This patch is against 4.4. It does not apply to master due to a large
rework of ion in 4.12 which removed the affected functions altogther.
4c23cbff073f3b9b ("staging: android: ion: Remove import interface")

Userspace can cause the kref to handles to increment
arbitrarily high. Ensure it does not overflow.

Signed-off-by: Daniel Rosenberg <drosen@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/staging/android/ion/ion.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c
index 40b4d2d8d39fd..956fda17c2ae5 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -15,6 +15,7 @@
  *
  */
 
+#include <linux/atomic.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/file.h>
@@ -396,6 +397,16 @@ void ion_handle_get(struct ion_handle *handle)
 	kref_get(&handle->ref);
 }
 
+/* Must hold the client lock */
+static struct ion_handle *ion_handle_get_check_overflow(
+					struct ion_handle *handle)
+{
+	if (atomic_read(&handle->ref.refcount) + 1 == 0)
+		return ERR_PTR(-EOVERFLOW);
+	ion_handle_get(handle);
+	return handle;
+}
+
 static int ion_handle_put_nolock(struct ion_handle *handle)
 {
 	int ret;
@@ -442,9 +453,9 @@ static struct ion_handle *ion_handle_get_by_id_nolock(struct ion_client *client,
 
 	handle = idr_find(&client->idr, id);
 	if (handle)
-		ion_handle_get(handle);
+		return ion_handle_get_check_overflow(handle);
 
-	return handle ? handle : ERR_PTR(-EINVAL);
+	return ERR_PTR(-EINVAL);
 }
 
 struct ion_handle *ion_handle_get_by_id(struct ion_client *client,
@@ -1530,7 +1541,7 @@ struct ion_handle *ion_import_dma_buf(struct ion_client *client, int fd)
 	/* if a handle exists for this buffer just take a reference to it */
 	handle = ion_handle_lookup(client, buffer);
 	if (!IS_ERR(handle)) {
-		ion_handle_get(handle);
+		handle = ion_handle_get_check_overflow(handle);
 		mutex_unlock(&client->lock);
 		goto end;
 	}

From a7a548517c927989f93af7b6267c03ebb464e152 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Mon, 28 May 2018 13:31:13 +0200
Subject: [PATCH 1680/1852] KVM: irqfd: fix race between EPOLLHUP and
 irq_bypass_register_consumer

commit 9432a3175770e06cb83eada2d91fac90c977cb99 upstream.

A comment warning against this bug is there, but the code is not doing what
the comment says.  Therefore it is possible that an EPOLLHUP races against
irq_bypass_register_consumer.  The EPOLLHUP handler schedules irqfd_shutdown,
and if that runs soon enough, you get a use-after-free.

Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 virt/kvm/eventfd.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/virt/kvm/eventfd.c b/virt/kvm/eventfd.c
index 1203829316b25..f509cfd37db55 100644
--- a/virt/kvm/eventfd.c
+++ b/virt/kvm/eventfd.c
@@ -405,11 +405,6 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
 	if (events & POLLIN)
 		schedule_work(&irqfd->inject);
 
-	/*
-	 * do not drop the file until the irqfd is fully initialized, otherwise
-	 * we might race against the POLLHUP
-	 */
-	fdput(f);
 #ifdef CONFIG_HAVE_KVM_IRQ_BYPASS
 	irqfd->consumer.token = (void *)irqfd->eventfd;
 	irqfd->consumer.add_producer = kvm_arch_irq_bypass_add_producer;
@@ -423,6 +418,12 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
 #endif
 
 	srcu_read_unlock(&kvm->irq_srcu, idx);
+
+	/*
+	 * do not drop the file until the irqfd is fully initialized, otherwise
+	 * we might race against the POLLHUP
+	 */
+	fdput(f);
 	return 0;
 
 fail:

From ee3f65a03c7fd169776775a48f53c345562efbaf Mon Sep 17 00:00:00 2001
From: Jeremy Cline <jcline@redhat.com>
Date: Thu, 2 Aug 2018 00:03:40 -0400
Subject: [PATCH 1681/1852] ext4: fix spectre gadget in
 ext4_mb_regular_allocator()

commit 1a5d5e5d51e75a5bca67dadbcea8c841934b7b85 upstream.

'ac->ac_g_ex.fe_len' is a user-controlled value which is used in the
derivation of 'ac->ac_2order'. 'ac->ac_2order', in turn, is used to
index arrays which makes it a potential spectre gadget. Fix this by
sanitizing the value assigned to 'ac->ac2_order'.  This covers the
following accesses found with the help of smatch:

* fs/ext4/mballoc.c:1896 ext4_mb_simple_scan_group() warn: potential
  spectre issue 'grp->bb_counters' [w] (local cap)

* fs/ext4/mballoc.c:445 mb_find_buddy() warn: potential spectre issue
  'EXT4_SB(e4b->bd_sb)->s_mb_offsets' [r] (local cap)

* fs/ext4/mballoc.c:446 mb_find_buddy() warn: potential spectre issue
  'EXT4_SB(e4b->bd_sb)->s_mb_maxs' [r] (local cap)

Suggested-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Jeremy Cline <jcline@redhat.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/mballoc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
index 671552273b077..d38cfed0394f2 100644
--- a/fs/ext4/mballoc.c
+++ b/fs/ext4/mballoc.c
@@ -26,6 +26,7 @@
 #include <linux/log2.h>
 #include <linux/module.h>
 #include <linux/slab.h>
+#include <linux/nospec.h>
 #include <linux/backing-dev.h>
 #include <trace/events/ext4.h>
 
@@ -2144,7 +2145,8 @@ ext4_mb_regular_allocator(struct ext4_allocation_context *ac)
 		 * This should tell if fe_len is exactly power of 2
 		 */
 		if ((ac->ac_g_ex.fe_len & (~(1 << (i - 1)))) == 0)
-			ac->ac_2order = i - 1;
+			ac->ac_2order = array_index_nospec(i - 1,
+							   sb->s_blocksize_bits + 2);
 	}
 
 	/* if stream allocation is enabled, use global goal */

From 71b0264f1fb08cb4e1ed34831cf001a9a0fd7687 Mon Sep 17 00:00:00 2001
From: John David Anglin <dave.anglin@bell.net>
Date: Sun, 12 Aug 2018 16:38:03 -0400
Subject: [PATCH 1682/1852] parisc: Remove ordered stores from syscall.S
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 7797167ffde1f00446301cb22b37b7c03194cfaf upstream.

Now that we use a sync prior to releasing the locks in syscall.S, we don't need
the PA 2.0 ordered stores used to release some locks.  Using an ordered store,
potentially slows the release and subsequent code.

There are a number of other ordered stores and loads that serve no purpose.  I
have converted these to normal stores.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/parisc/kernel/syscall.S | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index f68eedc724848..dd44022c3ae30 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -627,12 +627,12 @@ cas_action:
 	stw	%r1, 4(%sr2,%r20)
 #endif
 	/* The load and store could fail */
-1:	ldw,ma	0(%r26), %r28
+1:	ldw	0(%r26), %r28
 	sub,<>	%r28, %r25, %r0
-2:	stw,ma	%r24, 0(%r26)
+2:	stw	%r24, 0(%r26)
 	/* Free lock */
 	sync
-	stw,ma	%r20, 0(%sr2,%r20)
+	stw	%r20, 0(%sr2,%r20)
 #if ENABLE_LWS_DEBUG
 	/* Clear thread register indicator */
 	stw	%r0, 4(%sr2,%r20)
@@ -796,30 +796,30 @@ cas2_action:
 	ldo	1(%r0),%r28
 
 	/* 8bit CAS */
-13:	ldb,ma	0(%r26), %r29
+13:	ldb	0(%r26), %r29
 	sub,=	%r29, %r25, %r0
 	b,n	cas2_end
-14:	stb,ma	%r24, 0(%r26)
+14:	stb	%r24, 0(%r26)
 	b	cas2_end
 	copy	%r0, %r28
 	nop
 	nop
 
 	/* 16bit CAS */
-15:	ldh,ma	0(%r26), %r29
+15:	ldh	0(%r26), %r29
 	sub,=	%r29, %r25, %r0
 	b,n	cas2_end
-16:	sth,ma	%r24, 0(%r26)
+16:	sth	%r24, 0(%r26)
 	b	cas2_end
 	copy	%r0, %r28
 	nop
 	nop
 
 	/* 32bit CAS */
-17:	ldw,ma	0(%r26), %r29
+17:	ldw	0(%r26), %r29
 	sub,=	%r29, %r25, %r0
 	b,n	cas2_end
-18:	stw,ma	%r24, 0(%r26)
+18:	stw	%r24, 0(%r26)
 	b	cas2_end
 	copy	%r0, %r28
 	nop
@@ -827,10 +827,10 @@ cas2_action:
 
 	/* 64bit CAS */
 #ifdef CONFIG_64BIT
-19:	ldd,ma	0(%r26), %r29
+19:	ldd	0(%r26), %r29
 	sub,*=	%r29, %r25, %r0
 	b,n	cas2_end
-20:	std,ma	%r24, 0(%r26)
+20:	std	%r24, 0(%r26)
 	copy	%r0, %r28
 #else
 	/* Compare first word */
@@ -849,7 +849,7 @@ cas2_action:
 cas2_end:
 	/* Free lock */
 	sync
-	stw,ma	%r20, 0(%sr2,%r20)
+	stw	%r20, 0(%sr2,%r20)
 	/* Enable interrupts */
 	ssm	PSW_SM_I, %r0
 	/* Return to userspace, set no error */

From d67baae4805840aac175af2bdc19dfc833e101ac Mon Sep 17 00:00:00 2001
From: Eric Dumazet <edumazet@google.com>
Date: Mon, 18 Jun 2018 21:35:07 -0700
Subject: [PATCH 1683/1852] xfrm_user: prevent leaking 2 bytes of kernel memory

commit 45c180bc29babbedd6b8c01b975780ef44d9d09c upstream.

struct xfrm_userpolicy_type has two holes, so we should not
use C99 style initializer.

KMSAN report:

BUG: KMSAN: kernel-infoleak in copyout lib/iov_iter.c:140 [inline]
BUG: KMSAN: kernel-infoleak in _copy_to_iter+0x1b14/0x2800 lib/iov_iter.c:571
CPU: 1 PID: 4520 Comm: syz-executor841 Not tainted 4.17.0+ #5
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:77 [inline]
 dump_stack+0x185/0x1d0 lib/dump_stack.c:113
 kmsan_report+0x188/0x2a0 mm/kmsan/kmsan.c:1117
 kmsan_internal_check_memory+0x138/0x1f0 mm/kmsan/kmsan.c:1211
 kmsan_copy_to_user+0x7a/0x160 mm/kmsan/kmsan.c:1253
 copyout lib/iov_iter.c:140 [inline]
 _copy_to_iter+0x1b14/0x2800 lib/iov_iter.c:571
 copy_to_iter include/linux/uio.h:106 [inline]
 skb_copy_datagram_iter+0x422/0xfa0 net/core/datagram.c:431
 skb_copy_datagram_msg include/linux/skbuff.h:3268 [inline]
 netlink_recvmsg+0x6f1/0x1900 net/netlink/af_netlink.c:1959
 sock_recvmsg_nosec net/socket.c:802 [inline]
 sock_recvmsg+0x1d6/0x230 net/socket.c:809
 ___sys_recvmsg+0x3fe/0x810 net/socket.c:2279
 __sys_recvmmsg+0x58e/0xe30 net/socket.c:2391
 do_sys_recvmmsg+0x2a6/0x3e0 net/socket.c:2472
 __do_sys_recvmmsg net/socket.c:2485 [inline]
 __se_sys_recvmmsg net/socket.c:2481 [inline]
 __x64_sys_recvmmsg+0x15d/0x1c0 net/socket.c:2481
 do_syscall_64+0x15b/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x446ce9
RSP: 002b:00007fc307918db8 EFLAGS: 00000293 ORIG_RAX: 000000000000012b
RAX: ffffffffffffffda RBX: 00000000006dbc24 RCX: 0000000000446ce9
RDX: 000000000000000a RSI: 0000000020005040 RDI: 0000000000000003
RBP: 00000000006dbc20 R08: 0000000020004e40 R09: 0000000000000000
R10: 0000000040000000 R11: 0000000000000293 R12: 0000000000000000
R13: 00007ffc8d2df32f R14: 00007fc3079199c0 R15: 0000000000000001

Uninit was stored to memory at:
 kmsan_save_stack_with_flags mm/kmsan/kmsan.c:279 [inline]
 kmsan_save_stack mm/kmsan/kmsan.c:294 [inline]
 kmsan_internal_chain_origin+0x12b/0x210 mm/kmsan/kmsan.c:685
 kmsan_memcpy_origins+0x11d/0x170 mm/kmsan/kmsan.c:527
 __msan_memcpy+0x109/0x160 mm/kmsan/kmsan_instr.c:413
 __nla_put lib/nlattr.c:569 [inline]
 nla_put+0x276/0x340 lib/nlattr.c:627
 copy_to_user_policy_type net/xfrm/xfrm_user.c:1678 [inline]
 dump_one_policy+0xbe1/0x1090 net/xfrm/xfrm_user.c:1708
 xfrm_policy_walk+0x45a/0xd00 net/xfrm/xfrm_policy.c:1013
 xfrm_dump_policy+0x1c0/0x2a0 net/xfrm/xfrm_user.c:1749
 netlink_dump+0x9b5/0x1550 net/netlink/af_netlink.c:2226
 __netlink_dump_start+0x1131/0x1270 net/netlink/af_netlink.c:2323
 netlink_dump_start include/linux/netlink.h:214 [inline]
 xfrm_user_rcv_msg+0x8a3/0x9b0 net/xfrm/xfrm_user.c:2577
 netlink_rcv_skb+0x37e/0x600 net/netlink/af_netlink.c:2448
 xfrm_netlink_rcv+0xb2/0xf0 net/xfrm/xfrm_user.c:2598
 netlink_unicast_kernel net/netlink/af_netlink.c:1310 [inline]
 netlink_unicast+0x1680/0x1750 net/netlink/af_netlink.c:1336
 netlink_sendmsg+0x104f/0x1350 net/netlink/af_netlink.c:1901
 sock_sendmsg_nosec net/socket.c:629 [inline]
 sock_sendmsg net/socket.c:639 [inline]
 ___sys_sendmsg+0xec8/0x1320 net/socket.c:2117
 __sys_sendmsg net/socket.c:2155 [inline]
 __do_sys_sendmsg net/socket.c:2164 [inline]
 __se_sys_sendmsg net/socket.c:2162 [inline]
 __x64_sys_sendmsg+0x331/0x460 net/socket.c:2162
 do_syscall_64+0x15b/0x230 arch/x86/entry/common.c:287
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
Local variable description: ----upt.i@dump_one_policy
Variable was created at:
 dump_one_policy+0x78/0x1090 net/xfrm/xfrm_user.c:1689
 xfrm_policy_walk+0x45a/0xd00 net/xfrm/xfrm_policy.c:1013

Byte 130 of 137 is uninitialized
Memory access starts at ffff88019550407f

Fixes: c0144beaeca42 ("[XFRM] netlink: Use nla_put()/NLA_PUT() variantes")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Reported-by: syzbot <syzkaller@googlegroups.com>
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_user.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 45f368b1eadfd..8efc7c39275d4 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -1632,9 +1632,11 @@ static inline size_t userpolicy_type_attrsize(void)
 #ifdef CONFIG_XFRM_SUB_POLICY
 static int copy_to_user_policy_type(u8 type, struct sk_buff *skb)
 {
-	struct xfrm_userpolicy_type upt = {
-		.type = type,
-	};
+	struct xfrm_userpolicy_type upt;
+
+	/* Sadly there are two holes in struct xfrm_userpolicy_type */
+	memset(&upt, 0, sizeof(upt));
+	upt.type = type;
 
 	return nla_put(skb, XFRMA_POLICY_TYPE, sizeof(upt), &upt);
 }

From 100aad7146fe1249e13b126e1e2e3f0d7641ad51 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Tue, 17 Jul 2018 21:03:15 +0200
Subject: [PATCH 1684/1852] netfilter: conntrack: dccp: treat SYNC/SYNCACK as
 invalid if no prior state

commit 6613b6173dee098997229caf1f3b961c49da75e6 upstream.

When first DCCP packet is SYNC or SYNCACK, we insert a new conntrack
that has an un-initialized timeout value, i.e. such entry could be
reaped at any time.

Mark them as INVALID and only ignore SYNC/SYNCACK when connection had
an old state.

Reported-by: syzbot+6f18401420df260e37ed@syzkaller.appspotmail.com
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/netfilter/nf_conntrack_proto_dccp.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/net/netfilter/nf_conntrack_proto_dccp.c b/net/netfilter/nf_conntrack_proto_dccp.c
index fce1b1cca32d6..99d0e9261a642 100644
--- a/net/netfilter/nf_conntrack_proto_dccp.c
+++ b/net/netfilter/nf_conntrack_proto_dccp.c
@@ -244,14 +244,14 @@ dccp_state_table[CT_DCCP_ROLE_MAX + 1][DCCP_PKT_SYNCACK + 1][CT_DCCP_MAX + 1] =
 		 * We currently ignore Sync packets
 		 *
 		 *	sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
-			sIG, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
+			sIV, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
 		},
 		[DCCP_PKT_SYNCACK] = {
 		/*
 		 * We currently ignore SyncAck packets
 		 *
 		 *	sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
-			sIG, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
+			sIV, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
 		},
 	},
 	[CT_DCCP_ROLE_SERVER] = {
@@ -372,14 +372,14 @@ dccp_state_table[CT_DCCP_ROLE_MAX + 1][DCCP_PKT_SYNCACK + 1][CT_DCCP_MAX + 1] =
 		 * We currently ignore Sync packets
 		 *
 		 *	sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
-			sIG, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
+			sIV, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
 		},
 		[DCCP_PKT_SYNCACK] = {
 		/*
 		 * We currently ignore SyncAck packets
 		 *
 		 *	sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
-			sIG, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
+			sIV, sIG, sIG, sIG, sIG, sIG, sIG, sIG,
 		},
 	},
 };

From 63156800a78769ec03741900b885eeb490a9c98f Mon Sep 17 00:00:00 2001
From: Willem de Bruijn <willemb@google.com>
Date: Mon, 6 Aug 2018 10:38:34 -0400
Subject: [PATCH 1685/1852] packet: refine ring v3 block size test to hold one
 frame

commit 4576cd469d980317c4edd9173f8b694aa71ea3a3 upstream.

TPACKET_V3 stores variable length frames in fixed length blocks.
Blocks must be able to store a block header, optional private space
and at least one minimum sized frame.

Frames, even for a zero snaplen packet, store metadata headers and
optional reserved space.

In the block size bounds check, ensure that the frame of the
chosen configuration fits. This includes sockaddr_ll and optional
tp_reserve.

Syzbot was able to construct a ring with insuffient room for the
sockaddr_ll in the header of a zero-length frame, triggering an
out-of-bounds write in dev_parse_header.

Convert the comparison to less than, as zero is a valid snap len.
This matches the test for minimum tp_frame_size immediately below.

Fixes: f6fb8f100b80 ("af-packet: TPACKET_V3 flexible buffer implementation.")
Fixes: eb73190f4fbe ("net/packet: refine check for priv area size")
Reported-by: syzbot <syzkaller@googlegroups.com>
Signed-off-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/packet/af_packet.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 8de4e6620c1cc..07668f152a3aa 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -4176,6 +4176,8 @@ static int packet_set_ring(struct sock *sk, union tpacket_req_u *req_u,
 	}
 
 	if (req->tp_block_nr) {
+		unsigned int min_frame_size;
+
 		/* Sanity tests and some calculations */
 		err = -EBUSY;
 		if (unlikely(rb->pg_vec))
@@ -4198,12 +4200,12 @@ static int packet_set_ring(struct sock *sk, union tpacket_req_u *req_u,
 			goto out;
 		if (unlikely(!PAGE_ALIGNED(req->tp_block_size)))
 			goto out;
+		min_frame_size = po->tp_hdrlen + po->tp_reserve;
 		if (po->tp_version >= TPACKET_V3 &&
-		    req->tp_block_size <=
-		    BLK_PLUS_PRIV((u64)req_u->req3.tp_sizeof_priv) + sizeof(struct tpacket3_hdr))
+		    req->tp_block_size <
+		    BLK_PLUS_PRIV((u64)req_u->req3.tp_sizeof_priv) + min_frame_size)
 			goto out;
-		if (unlikely(req->tp_frame_size < po->tp_hdrlen +
-					po->tp_reserve))
+		if (unlikely(req->tp_frame_size < min_frame_size))
 			goto out;
 		if (unlikely(req->tp_frame_size & (TPACKET_ALIGNMENT - 1)))
 			goto out;

From 775f72703a6e33a96fef1c6b032820e9842babd3 Mon Sep 17 00:00:00 2001
From: Elad Raz <eladr@mellanox.com>
Date: Wed, 6 Jan 2016 13:01:04 +0100
Subject: [PATCH 1686/1852] bridge: Propagate vlan add failure to user
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 08474cc1e6ea71237cab7e4a651a623c9dea1084 upstream.

Disallow adding interfaces to a bridge when vlan filtering operation
failed. Send the failure code to the user.

Signed-off-by: Elad Raz <eladr@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/bridge/br_if.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c
index 3400b1e476688..50e84e634dfe5 100644
--- a/net/bridge/br_if.c
+++ b/net/bridge/br_if.c
@@ -511,8 +511,11 @@ int br_add_if(struct net_bridge *br, struct net_device *dev)
 	if (br_fdb_insert(br, p, dev->dev_addr, 0))
 		netdev_err(dev, "failed insert local address bridge forwarding table\n");
 
-	if (nbp_vlan_init(p))
+	err = nbp_vlan_init(p);
+	if (err) {
 		netdev_err(dev, "failed to initialize vlan filtering on this port\n");
+		goto err6;
+	}
 
 	spin_lock_bh(&br->lock);
 	changed_addr = br_stp_recalculate_bridge_id(br);
@@ -533,6 +536,12 @@ int br_add_if(struct net_bridge *br, struct net_device *dev)
 
 	return 0;
 
+err6:
+	list_del_rcu(&p->list);
+	br_fdb_delete_by_port(br, p, 0, 1);
+	nbp_update_port_count(br);
+	netdev_upper_dev_unlink(dev, br->dev);
+
 err5:
 	dev->priv_flags &= ~IFF_BRIDGE_PORT;
 	netdev_rx_handler_unregister(dev);

From 3e0bba0e33c4b2bcab1d373087a3bcf84b0c8060 Mon Sep 17 00:00:00 2001
From: John David Anglin <dave.anglin@bell.net>
Date: Sun, 12 Aug 2018 16:31:17 -0400
Subject: [PATCH 1687/1852] parisc: Remove unnecessary barriers from spinlock.h
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 3b885ac1dc35b87a39ee176a6c7e2af9c789d8b8 upstream.

Now that mb() is an instruction barrier, it will slow performance if we issue
unnecessary barriers.

The spinlock defines have a number of unnecessary barriers.  The __ldcw()
define is both a hardware and compiler barrier.  The mb() barriers in the
routines using __ldcw() serve no purpose.

The only barrier needed is the one in arch_spin_unlock().  We need to ensure
all accesses are complete prior to releasing the lock.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/parisc/include/asm/spinlock.h | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h
index 64f2992e439fc..617efa845054e 100644
--- a/arch/parisc/include/asm/spinlock.h
+++ b/arch/parisc/include/asm/spinlock.h
@@ -21,7 +21,6 @@ static inline void arch_spin_lock_flags(arch_spinlock_t *x,
 {
 	volatile unsigned int *a;
 
-	mb();
 	a = __ldcw_align(x);
 	while (__ldcw(a) == 0)
 		while (*a == 0)
@@ -31,16 +30,15 @@ static inline void arch_spin_lock_flags(arch_spinlock_t *x,
 				local_irq_disable();
 			} else
 				cpu_relax();
-	mb();
 }
 
 static inline void arch_spin_unlock(arch_spinlock_t *x)
 {
 	volatile unsigned int *a;
-	mb();
+
 	a = __ldcw_align(x);
-	*a = 1;
 	mb();
+	*a = 1;
 }
 
 static inline int arch_spin_trylock(arch_spinlock_t *x)
@@ -48,10 +46,8 @@ static inline int arch_spin_trylock(arch_spinlock_t *x)
 	volatile unsigned int *a;
 	int ret;
 
-	mb();
 	a = __ldcw_align(x);
         ret = __ldcw(a) != 0;
-	mb();
 
 	return ret;
 }

From 76cbe5c5a933b64ca757863290febe51fa05ac64 Mon Sep 17 00:00:00 2001
From: Lukas Wunner <lukas@wunner.de>
Date: Thu, 19 Jul 2018 17:27:31 -0500
Subject: [PATCH 1688/1852] PCI: hotplug: Don't leak pci_slot on registration
 failure

commit 4ce6435820d1f1cc2c2788e232735eb244bcc8a3 upstream.

If addition of sysfs files fails on registration of a hotplug slot, the
struct pci_slot as well as the entry in the slot_list is leaked.  The
issue has been present since the hotplug core was introduced in 2002:
https://git.kernel.org/tglx/history/c/a8a2069f432c

Perhaps the idea was that even though sysfs addition fails, the slot
should still be usable.  But that's not how drivers use the interface,
they abort probe if a non-zero value is returned.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # v2.4.15+
Cc: Greg Kroah-Hartman <greg@kroah.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/hotplug/pci_hotplug_core.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
index d1fab97d6b01f..6ce2a73fe0e41 100644
--- a/drivers/pci/hotplug/pci_hotplug_core.c
+++ b/drivers/pci/hotplug/pci_hotplug_core.c
@@ -457,8 +457,17 @@ int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *bus,
 	list_add(&slot->slot_list, &pci_hotplug_slot_list);
 
 	result = fs_add_slot(pci_slot);
+	if (result)
+		goto err_list_del;
+
 	kobject_uevent(&pci_slot->kobj, KOBJ_ADD);
 	dbg("Added slot %s to the list\n", name);
+	goto out;
+
+err_list_del:
+	list_del(&slot->slot_list);
+	pci_slot->hotplug = NULL;
+	pci_destroy_slot(pci_slot);
 out:
 	mutex_unlock(&pci_hp_mutex);
 	return result;

From 7d71b1f8e07fd4f45ad49f580f92aebafec684ed Mon Sep 17 00:00:00 2001
From: Myron Stowe <myron.stowe@redhat.com>
Date: Mon, 13 Aug 2018 12:19:39 -0600
Subject: [PATCH 1689/1852] PCI: Skip MPS logic for Virtual Functions (VFs)

commit 3dbe97efe8bf450b183d6dee2305cbc032e6b8a4 upstream.

PCIe r4.0, sec 9.3.5.4, "Device Control Register", shows both
Max_Payload_Size (MPS) and Max_Read_request_Size (MRRS) to be 'RsvdP' for
VFs.  Just prior to the table it states:

  "PF and VF functionality is defined in Section 7.5.3.4 except where
   noted in Table 9-16.  For VF fields marked 'RsvdP', the PF setting
   applies to the VF."

All of which implies that with respect to Max_Payload_Size Supported
(MPSS), MPS, and MRRS values, we should not be paying any attention to the
VF's fields, but rather only to the PF's.  Only looking at the PF's fields
also logically makes sense as it's the sole physical interface to the PCIe
bus.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=200527
Fixes: 27d868b5e6cf ("PCI: Set MPS to match upstream bridge")
Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # 4.3+
Cc: Keith Busch <keith.busch@intel.com>
Cc: Sinan Kaya <okaya@kernel.org>
Cc: Dongdong Liu <liudongdong3@huawei.com>
Cc: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/probe.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 566897f24dee2..5f040619393fe 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1338,6 +1338,10 @@ static void pci_configure_mps(struct pci_dev *dev)
 	if (!pci_is_pcie(dev) || !bridge || !pci_is_pcie(bridge))
 		return;
 
+	/* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */
+	if (dev->is_virtfn)
+		return;
+
 	mps = pcie_get_mps(dev);
 	p_mps = pcie_get_mps(bridge);
 

From b50f47410c5e49b3fd38b46a4c2ce497aefea61d Mon Sep 17 00:00:00 2001
From: Lukas Wunner <lukas@wunner.de>
Date: Thu, 19 Jul 2018 17:27:32 -0500
Subject: [PATCH 1690/1852] PCI: pciehp: Fix use-after-free on unplug

commit 281e878eab191cce4259abbbf1a0322e3adae02c upstream.

When pciehp is unbound (e.g. on unplug of a Thunderbolt device), the
hotplug_slot struct is deregistered and thus freed before freeing the
IRQ.  The IRQ handler and the work items it schedules print the slot
name referenced from the freed structure in various informational and
debug log messages, each time resulting in a quadruple dereference of
freed pointers (hotplug_slot -> pci_slot -> kobject -> name).

At best the slot name is logged as "(null)", at worst kernel memory is
exposed in logs or the driver crashes:

  pciehp 0000:10:00.0:pcie204: Slot((null)): Card not present

An attacker may provoke the bug by unplugging multiple devices on a
Thunderbolt daisy chain at once.  Unplugging can also be simulated by
powering down slots via sysfs.  The bug is particularly easy to trigger
in poll mode.

It has been present since the driver's introduction in 2004:
https://git.kernel.org/tglx/history/c/c16b4b14d980

Fix by rearranging teardown such that the IRQ is freed first.  Run the
work items queued by the IRQ handler to completion before freeing the
hotplug_slot struct by draining the work queue from the ->release_slot
callback which is invoked by pci_hp_deregister().

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # v2.6.4
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pci/hotplug/pciehp.h      | 1 +
 drivers/pci/hotplug/pciehp_core.c | 7 +++++++
 drivers/pci/hotplug/pciehp_hpc.c  | 5 ++---
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index cbe58480b4745..6b0f7e0d7dbd7 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -132,6 +132,7 @@ int pciehp_unconfigure_device(struct slot *p_slot);
 void pciehp_queue_pushbutton_work(struct work_struct *work);
 struct controller *pcie_init(struct pcie_device *dev);
 int pcie_init_notification(struct controller *ctrl);
+void pcie_shutdown_notification(struct controller *ctrl);
 int pciehp_enable_slot(struct slot *p_slot);
 int pciehp_disable_slot(struct slot *p_slot);
 void pcie_reenable_notification(struct controller *ctrl);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 8f6ded43760a7..47cc3568514e0 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -77,6 +77,12 @@ static int reset_slot		(struct hotplug_slot *slot, int probe);
  */
 static void release_slot(struct hotplug_slot *hotplug_slot)
 {
+	struct slot *slot = hotplug_slot->private;
+
+	/* queued work needs hotplug_slot name */
+	cancel_delayed_work(&slot->work);
+	drain_workqueue(slot->wq);
+
 	kfree(hotplug_slot->ops);
 	kfree(hotplug_slot->info);
 	kfree(hotplug_slot);
@@ -276,6 +282,7 @@ static void pciehp_remove(struct pcie_device *dev)
 {
 	struct controller *ctrl = get_service_data(dev);
 
+	pcie_shutdown_notification(ctrl);
 	cleanup_slot(ctrl);
 	pciehp_release_ctrl(ctrl);
 }
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 63c6c7fce3ebb..cd982778a6b82 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -741,7 +741,7 @@ int pcie_init_notification(struct controller *ctrl)
 	return 0;
 }
 
-static void pcie_shutdown_notification(struct controller *ctrl)
+void pcie_shutdown_notification(struct controller *ctrl)
 {
 	if (ctrl->notification_enabled) {
 		pcie_disable_notification(ctrl);
@@ -776,7 +776,7 @@ static int pcie_init_slot(struct controller *ctrl)
 static void pcie_cleanup_slot(struct controller *ctrl)
 {
 	struct slot *slot = ctrl->slot;
-	cancel_delayed_work(&slot->work);
+
 	destroy_workqueue(slot->wq);
 	kfree(slot);
 }
@@ -853,7 +853,6 @@ struct controller *pcie_init(struct pcie_device *dev)
 
 void pciehp_release_ctrl(struct controller *ctrl)
 {
-	pcie_shutdown_notification(ctrl);
 	pcie_cleanup_slot(ctrl);
 	kfree(ctrl);
 }

From 8efec9d3a3e2f177fea5379c2ea222a79bdcd95d Mon Sep 17 00:00:00 2001
From: Esben Haabendal <eha@deif.com>
Date: Thu, 16 Aug 2018 10:43:12 +0200
Subject: [PATCH 1691/1852] i2c: imx: Fix race condition in dma read
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit bed4ff1ed4d8f2ef5007c5c6ae1b29c5677a3632 upstream.

This fixes a race condition, where the DMAEN bit ends up being set after
I2C slave has transmitted a byte following the dummy read.  When that
happens, an interrupt is generated instead, and no DMA request is generated
to kickstart the DMA read, and a timeout happens after DMA_TIMEOUT (1 sec).

Fixed by setting the DMAEN bit before the dummy read.

Signed-off-by: Esben Haabendal <eha@deif.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-imx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index a4abf7dc95767..cf1b57a054d09 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -677,9 +677,6 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
 	struct imx_i2c_dma *dma = i2c_imx->dma;
 	struct device *dev = &i2c_imx->adapter.dev;
 
-	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
-	temp |= I2CR_DMAEN;
-	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 
 	dma->chan_using = dma->chan_rx;
 	dma->dma_transfer_dir = DMA_DEV_TO_MEM;
@@ -792,6 +789,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
 	int i, result;
 	unsigned int temp;
 	int block_data = msgs->flags & I2C_M_RECV_LEN;
+	int use_dma = i2c_imx->dma && msgs->len >= DMA_THRESHOLD && !block_data;
 
 	dev_dbg(&i2c_imx->adapter.dev,
 		"<%s> write slave address: addr=0x%x\n",
@@ -818,12 +816,14 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
 	 */
 	if ((msgs->len - 1) || block_data)
 		temp &= ~I2CR_TXAK;
+	if (use_dma)
+		temp |= I2CR_DMAEN;
 	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 	imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
 
 	dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
 
-	if (i2c_imx->dma && msgs->len >= DMA_THRESHOLD && !block_data)
+	if (use_dma)
 		return i2c_imx_dma_read(i2c_imx, msgs, is_lastmsg);
 
 	/* read data */

From 47396433f11470b4a3492ac6c4149f9790822f34 Mon Sep 17 00:00:00 2001
From: Jann Horn <jannh@google.com>
Date: Tue, 21 Aug 2018 21:59:37 -0700
Subject: [PATCH 1692/1852] reiserfs: fix broken xattr handling (heap
 corruption, bad retval)

commit a13f085d111e90469faf2d9965eb39b11c114d7e upstream.

This fixes the following issues:

- When a buffer size is supplied to reiserfs_listxattr() such that each
  individual name fits, but the concatenation of all names doesn't fit,
  reiserfs_listxattr() overflows the supplied buffer.  This leads to a
  kernel heap overflow (verified using KASAN) followed by an out-of-bounds
  usercopy and is therefore a security bug.

- When a buffer size is supplied to reiserfs_listxattr() such that a
  name doesn't fit, -ERANGE should be returned.  But reiserfs instead just
  truncates the list of names; I have verified that if the only xattr on a
  file has a longer name than the supplied buffer length, listxattr()
  incorrectly returns zero.

With my patch applied, -ERANGE is returned in both cases and the memory
corruption doesn't happen anymore.

Credit for making me clean this code up a bit goes to Al Viro, who pointed
out that the ->actor calling convention is suboptimal and should be
changed.

Link: http://lkml.kernel.org/r/20180802151539.5373-1-jannh@google.com
Fixes: 48b32a3553a5 ("reiserfs: use generic xattr handlers")
Signed-off-by: Jann Horn <jannh@google.com>
Acked-by: Jeff Mahoney <jeffm@suse.com>
Cc: Eric Biggers <ebiggers@google.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/reiserfs/xattr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/fs/reiserfs/xattr.c b/fs/reiserfs/xattr.c
index a8dbc93e45eb3..8b32fdaad4682 100644
--- a/fs/reiserfs/xattr.c
+++ b/fs/reiserfs/xattr.c
@@ -791,8 +791,10 @@ static int listxattr_filler(struct dir_context *ctx, const char *name,
 			size = handler->list(handler, b->dentry,
 					     b->buf + b->pos, b->size, name,
 					     namelen);
-			if (size > b->size)
+			if (b->pos + size > b->size) {
+				b->pos = -ERANGE;
 				return -ERANGE;
+			}
 		} else {
 			size = handler->list(handler, b->dentry,
 					     NULL, 0, name, namelen);

From c4c271ea3a6b9471e26b03f7aa74d05d7c104734 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Fri, 24 Aug 2018 13:27:02 +0200
Subject: [PATCH 1693/1852] Linux 4.4.152

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 6a13dba526760..b4336867c9f8b 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 151
+SUBLEVEL = 152
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 635d9c4c6f17019ff98641338f9e800d73ff86f5 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Sat, 25 Aug 2018 06:50:15 -0700
Subject: [PATCH 1694/1852] x86/mm/pat: Fix L1TF stable backport for CPA

Patch for stable only to fix boot resets caused by the L1TF patches.

Stable trees reverted the following patch

Revert "x86/mm/pat: Ensure cpa->pfn only contains page frame numbers"

    This reverts commit 87e2bd898d3a79a8c609f183180adac47879a2a4 which is
    commit edc3b9129cecd0f0857112136f5b8b1bc1d45918 upstream.

but the L1TF patch backported here

   x86/mm/pat: Make set_memory_np() L1TF safe

    commit 958f79b9ee55dfaf00c8106ed1c22a2919e0028b upstream

    set_memory_np() is used to mark kernel mappings not present, but it has
    it's own open coded mechanism which does not have the L1TF protection of
    inverting the address bits.

assumed that cpa->pfn contains a PFN. With the above patch reverted
it does not, which causes the PMD to be set to an incorrect address
shifted by 12 bits, which can cause early boot reset on some
systems, like an Apollo Lake embedded system.

Convert the address to a PFN before passing it to pmd_pfn()

Thanks to Bernhard for bisecting and testing.

Cc: stable@vger.kernel.org # 4.4 and 4.9
Reported-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com>
Tested-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/mm/pageattr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 53bd895576ccc..7bd28d45e3270 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1006,7 +1006,7 @@ static int populate_pmd(struct cpa_data *cpa,
 
 		pmd = pmd_offset(pud, start);
 
-		set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
+		set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn >> PAGE_SHIFT,
 					canon_pgprot(pmd_pgprot))));
 
 		start	  += PMD_SIZE;

From 690ebf02529c4b77528440c476b15cc6bf84e347 Mon Sep 17 00:00:00 2001
From: Eric Biggers <ebiggers@google.com>
Date: Thu, 24 Aug 2017 10:50:29 -0700
Subject: [PATCH 1695/1852] x86/mm: Fix use-after-free of ldt_struct

commit ccd5b3235180eef3cfec337df1c8554ab151b5cc upstream.

The following commit:

  39a0526fb3f7 ("x86/mm: Factor out LDT init from context init")

renamed init_new_context() to init_new_context_ldt() and added a new
init_new_context() which calls init_new_context_ldt().  However, the
error code of init_new_context_ldt() was ignored.  Consequently, if a
memory allocation in alloc_ldt_struct() failed during a fork(), the
->context.ldt of the new task remained the same as that of the old task
(due to the memcpy() in dup_mm()).  ldt_struct's are not intended to be
shared, so a use-after-free occurred after one task exited.

Fix the bug by making init_new_context() pass through the error code of
init_new_context_ldt().

This bug was found by syzkaller, which encountered the following splat:

    BUG: KASAN: use-after-free in free_ldt_struct.part.2+0x10a/0x150 arch/x86/kernel/ldt.c:116
    Read of size 4 at addr ffff88006d2cb7c8 by task kworker/u9:0/3710

    CPU: 1 PID: 3710 Comm: kworker/u9:0 Not tainted 4.13.0-rc4-next-20170811 #2
    Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011
    Call Trace:
     __dump_stack lib/dump_stack.c:16 [inline]
     dump_stack+0x194/0x257 lib/dump_stack.c:52
     print_address_description+0x73/0x250 mm/kasan/report.c:252
     kasan_report_error mm/kasan/report.c:351 [inline]
     kasan_report+0x24e/0x340 mm/kasan/report.c:409
     __asan_report_load4_noabort+0x14/0x20 mm/kasan/report.c:429
     free_ldt_struct.part.2+0x10a/0x150 arch/x86/kernel/ldt.c:116
     free_ldt_struct arch/x86/kernel/ldt.c:173 [inline]
     destroy_context_ldt+0x60/0x80 arch/x86/kernel/ldt.c:171
     destroy_context arch/x86/include/asm/mmu_context.h:157 [inline]
     __mmdrop+0xe9/0x530 kernel/fork.c:889
     mmdrop include/linux/sched/mm.h:42 [inline]
     exec_mmap fs/exec.c:1061 [inline]
     flush_old_exec+0x173c/0x1ff0 fs/exec.c:1291
     load_elf_binary+0x81f/0x4ba0 fs/binfmt_elf.c:855
     search_binary_handler+0x142/0x6b0 fs/exec.c:1652
     exec_binprm fs/exec.c:1694 [inline]
     do_execveat_common.isra.33+0x1746/0x22e0 fs/exec.c:1816
     do_execve+0x31/0x40 fs/exec.c:1860
     call_usermodehelper_exec_async+0x457/0x8f0 kernel/umh.c:100
     ret_from_fork+0x2a/0x40 arch/x86/entry/entry_64.S:431

    Allocated by task 3700:
     save_stack_trace+0x16/0x20 arch/x86/kernel/stacktrace.c:59
     save_stack+0x43/0xd0 mm/kasan/kasan.c:447
     set_track mm/kasan/kasan.c:459 [inline]
     kasan_kmalloc+0xad/0xe0 mm/kasan/kasan.c:551
     kmem_cache_alloc_trace+0x136/0x750 mm/slab.c:3627
     kmalloc include/linux/slab.h:493 [inline]
     alloc_ldt_struct+0x52/0x140 arch/x86/kernel/ldt.c:67
     write_ldt+0x7b7/0xab0 arch/x86/kernel/ldt.c:277
     sys_modify_ldt+0x1ef/0x240 arch/x86/kernel/ldt.c:307
     entry_SYSCALL_64_fastpath+0x1f/0xbe

    Freed by task 3700:
     save_stack_trace+0x16/0x20 arch/x86/kernel/stacktrace.c:59
     save_stack+0x43/0xd0 mm/kasan/kasan.c:447
     set_track mm/kasan/kasan.c:459 [inline]
     kasan_slab_free+0x71/0xc0 mm/kasan/kasan.c:524
     __cache_free mm/slab.c:3503 [inline]
     kfree+0xca/0x250 mm/slab.c:3820
     free_ldt_struct.part.2+0xdd/0x150 arch/x86/kernel/ldt.c:121
     free_ldt_struct arch/x86/kernel/ldt.c:173 [inline]
     destroy_context_ldt+0x60/0x80 arch/x86/kernel/ldt.c:171
     destroy_context arch/x86/include/asm/mmu_context.h:157 [inline]
     __mmdrop+0xe9/0x530 kernel/fork.c:889
     mmdrop include/linux/sched/mm.h:42 [inline]
     __mmput kernel/fork.c:916 [inline]
     mmput+0x541/0x6e0 kernel/fork.c:927
     copy_process.part.36+0x22e1/0x4af0 kernel/fork.c:1931
     copy_process kernel/fork.c:1546 [inline]
     _do_fork+0x1ef/0xfb0 kernel/fork.c:2025
     SYSC_clone kernel/fork.c:2135 [inline]
     SyS_clone+0x37/0x50 kernel/fork.c:2129
     do_syscall_64+0x26c/0x8c0 arch/x86/entry/common.c:287
     return_from_SYSCALL_64+0x0/0x7a

Here is a C reproducer:

    #include <asm/ldt.h>
    #include <pthread.h>
    #include <signal.h>
    #include <stdlib.h>
    #include <sys/syscall.h>
    #include <sys/wait.h>
    #include <unistd.h>

    static void *fork_thread(void *_arg)
    {
        fork();
    }

    int main(void)
    {
        struct user_desc desc = { .entry_number = 8191 };

        syscall(__NR_modify_ldt, 1, &desc, sizeof(desc));

        for (;;) {
            if (fork() == 0) {
                pthread_t t;

                srand(getpid());
                pthread_create(&t, NULL, fork_thread, NULL);
                usleep(rand() % 10000);
                syscall(__NR_exit_group, 0);
            }
            wait(NULL);
        }
    }

Note: the reproducer takes advantage of the fact that alloc_ldt_struct()
may use vmalloc() to allocate a large ->entries array, and after
commit:

  5d17a73a2ebe ("vmalloc: back off when the current task is killed")

it is possible for userspace to fail a task's vmalloc() by
sending a fatal signal, e.g. via exit_group().  It would be more
difficult to reproduce this bug on kernels without that commit.

This bug only affected kernels with CONFIG_MODIFY_LDT_SYSCALL=y.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: <stable@vger.kernel.org> [v4.6+]
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Fixes: 39a0526fb3f7 ("x86/mm: Factor out LDT init from context init")
Link: http://lkml.kernel.org/r/20170824175029.76040-1-ebiggers3@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/mmu_context.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index effc12767cbf1..d8d19fe99e45f 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -109,8 +109,7 @@ static inline int init_new_context(struct task_struct *tsk,
 				   struct mm_struct *mm)
 {
 	mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
-	init_new_context_ldt(tsk, mm);
-	return 0;
+	return init_new_context_ldt(tsk, mm);
 }
 static inline void destroy_context(struct mm_struct *mm)
 {

From 620209be148ffac81c5e895e7b48091c13f0cf65 Mon Sep 17 00:00:00 2001
From: Vivek Goyal <vgoyal@redhat.com>
Date: Mon, 22 Feb 2016 09:28:34 -0500
Subject: [PATCH 1696/1852] ovl: Ensure upper filesystem supports d_type
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 45aebeaf4f67468f76bedf62923a576a519a9b68 upstream.

In some instances xfs has been created with ftype=0 and there if a file
on lower fs is removed, overlay leaves a whiteout in upper fs but that
whiteout does not get filtered out and is visible to overlayfs users.

And reason it does not get filtered out because upper filesystem does
not report file type of whiteout as DT_CHR during iterate_dir().

So it seems to be a requirement that upper filesystem support d_type for
overlayfs to work properly. Do this check during mount and fail if d_type
is not supported.

Suggested-by: Dave Chinner <dchinner@redhat.com>
Signed-off-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/overlayfs/overlayfs.h |  1 +
 fs/overlayfs/readdir.c   | 37 +++++++++++++++++++++++++++++++++++++
 fs/overlayfs/super.c     | 15 +++++++++++++++
 3 files changed, 53 insertions(+)

diff --git a/fs/overlayfs/overlayfs.h b/fs/overlayfs/overlayfs.h
index c319d5eaabcfa..28316b292b8ae 100644
--- a/fs/overlayfs/overlayfs.h
+++ b/fs/overlayfs/overlayfs.h
@@ -163,6 +163,7 @@ extern const struct file_operations ovl_dir_operations;
 int ovl_check_empty_dir(struct dentry *dentry, struct list_head *list);
 void ovl_cleanup_whiteouts(struct dentry *upper, struct list_head *list);
 void ovl_cache_free(struct list_head *list);
+int ovl_check_d_type_supported(struct path *realpath);
 
 /* inode.c */
 int ovl_setattr(struct dentry *dentry, struct iattr *attr);
diff --git a/fs/overlayfs/readdir.c b/fs/overlayfs/readdir.c
index 299a6e1d6b779..0c59955c46533 100644
--- a/fs/overlayfs/readdir.c
+++ b/fs/overlayfs/readdir.c
@@ -43,6 +43,7 @@ struct ovl_readdir_data {
 	struct ovl_cache_entry *first_maybe_whiteout;
 	int count;
 	int err;
+	bool d_type_supported;
 };
 
 struct ovl_dir_file {
@@ -581,3 +582,39 @@ void ovl_cleanup_whiteouts(struct dentry *upper, struct list_head *list)
 	}
 	mutex_unlock(&upper->d_inode->i_mutex);
 }
+
+static int ovl_check_d_type(struct dir_context *ctx, const char *name,
+			  int namelen, loff_t offset, u64 ino,
+			  unsigned int d_type)
+{
+	struct ovl_readdir_data *rdd =
+		container_of(ctx, struct ovl_readdir_data, ctx);
+
+	/* Even if d_type is not supported, DT_DIR is returned for . and .. */
+	if (!strncmp(name, ".", namelen) || !strncmp(name, "..", namelen))
+		return 0;
+
+	if (d_type != DT_UNKNOWN)
+		rdd->d_type_supported = true;
+
+	return 0;
+}
+
+/*
+ * Returns 1 if d_type is supported, 0 not supported/unknown. Negative values
+ * if error is encountered.
+ */
+int ovl_check_d_type_supported(struct path *realpath)
+{
+	int err;
+	struct ovl_readdir_data rdd = {
+		.ctx.actor = ovl_check_d_type,
+		.d_type_supported = false,
+	};
+
+	err = ovl_dir_read(realpath, &rdd);
+	if (err)
+		return err;
+
+	return rdd.d_type_supported;
+}
diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c
index d70208c0de84b..2de4e3a7d6e7a 100644
--- a/fs/overlayfs/super.c
+++ b/fs/overlayfs/super.c
@@ -1054,6 +1054,21 @@ static int ovl_fill_super(struct super_block *sb, void *data, int silent)
 			sb->s_flags |= MS_RDONLY;
 			ufs->workdir = NULL;
 		}
+
+		/*
+		 * Upper should support d_type, else whiteouts are visible.
+		 * Given workdir and upper are on same fs, we can do
+		 * iterate_dir() on workdir.
+		 */
+		err = ovl_check_d_type_supported(&workpath);
+		if (err < 0)
+			goto out_put_workdir;
+
+		if (!err) {
+			pr_err("overlayfs: upper fs needs to support d_type.\n");
+			err = -EINVAL;
+			goto out_put_workdir;
+		}
 	}
 
 	err = -ENOMEM;

From be3648b93c8754eaa8027180ce2b15e2d269b366 Mon Sep 17 00:00:00 2001
From: Vivek Goyal <vgoyal@redhat.com>
Date: Fri, 20 May 2016 09:04:26 -0400
Subject: [PATCH 1697/1852] ovl: Do d_type check only if work dir creation was
 successful
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 21765194cecf2e4514ad75244df459f188140a0f upstream.

d_type check requires successful creation of workdir as iterates
through work dir and expects work dir to be present in it. If that's
not the case, this check will always return d_type not supported even
if underlying filesystem might be supporting it.

So don't do this check if work dir creation failed in previous step.

Signed-off-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/overlayfs/super.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c
index 2de4e3a7d6e7a..fd21c5f74fba7 100644
--- a/fs/overlayfs/super.c
+++ b/fs/overlayfs/super.c
@@ -1058,16 +1058,19 @@ static int ovl_fill_super(struct super_block *sb, void *data, int silent)
 		/*
 		 * Upper should support d_type, else whiteouts are visible.
 		 * Given workdir and upper are on same fs, we can do
-		 * iterate_dir() on workdir.
+		 * iterate_dir() on workdir. This check requires successful
+		 * creation of workdir in previous step.
 		 */
-		err = ovl_check_d_type_supported(&workpath);
-		if (err < 0)
-			goto out_put_workdir;
+		if (ufs->workdir) {
+			err = ovl_check_d_type_supported(&workpath);
+			if (err < 0)
+				goto out_put_workdir;
 
-		if (!err) {
-			pr_err("overlayfs: upper fs needs to support d_type.\n");
-			err = -EINVAL;
-			goto out_put_workdir;
+			if (!err) {
+				pr_err("overlayfs: upper fs needs to support d_type.\n");
+				err = -EINVAL;
+				goto out_put_workdir;
+			}
 		}
 	}
 

From 3281b89523620e2db30a06f8b1392f5ae3c0758e Mon Sep 17 00:00:00 2001
From: Vivek Goyal <vgoyal@redhat.com>
Date: Fri, 1 Jul 2016 10:02:44 -0400
Subject: [PATCH 1698/1852] ovl: warn instead of error if d_type is not
 supported
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit e7c0b5991dd1be7b6f6dc2b54a15a0f47b64b007 upstream.

overlay needs underlying fs to support d_type. Recently I put in a
patch in to detect this condition and started failing mount if
underlying fs did not support d_type.

But this breaks existing configurations over kernel upgrade. Those who
are running docker (partially broken configuration) with xfs not
supporting d_type, are surprised that after kernel upgrade docker does
not run anymore.

https://github.com/docker/docker/issues/22937#issuecomment-229881315

So instead of erroring out, detect broken configuration and warn
about it. This should allow existing docker setups to continue
working after kernel upgrade.

Signed-off-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Fixes: 45aebeaf4f67 ("ovl: Ensure upper filesystem supports d_type")
Cc: <stable@vger.kernel.org> 4.6
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/overlayfs/super.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c
index fd21c5f74fba7..0035cb80ecd18 100644
--- a/fs/overlayfs/super.c
+++ b/fs/overlayfs/super.c
@@ -1066,11 +1066,13 @@ static int ovl_fill_super(struct super_block *sb, void *data, int silent)
 			if (err < 0)
 				goto out_put_workdir;
 
-			if (!err) {
-				pr_err("overlayfs: upper fs needs to support d_type.\n");
-				err = -EINVAL;
-				goto out_put_workdir;
-			}
+			/*
+			 * We allowed this configuration and don't want to
+			 * break users over kernel upgrade. So warn instead
+			 * of erroring out.
+			 */
+			if (!err)
+				pr_warn("overlayfs: upper fs needs to support d_type.\n");
 		}
 	}
 

From 8834395e6ce26aefc6612820b7270fff32cc7c6a Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Tue, 28 Aug 2018 07:23:44 +0200
Subject: [PATCH 1699/1852] Linux 4.4.153

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index b4336867c9f8b..419f256127d18 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 152
+SUBLEVEL = 153
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 2979c4ee0eac514e6df8368766da4add195ca09d Mon Sep 17 00:00:00 2001
From: Ethan Zhao <ethan.zhao@oracle.com>
Date: Mon, 4 Sep 2017 13:59:34 +0800
Subject: [PATCH 1700/1852] sched/sysctl: Check user input value of
 sysctl_sched_time_avg

commit 5ccba44ba118a5000cccc50076b0344632459779 upstream.

System will hang if user set sysctl_sched_time_avg to 0:

  [root@XXX ~]# sysctl kernel.sched_time_avg_ms=0

  Stack traceback for pid 0
  0xffff883f6406c600 0 0 1 3 R 0xffff883f6406cf50 *swapper/3
  ffff883f7ccc3ae8 0000000000000018 ffffffff810c4dd0 0000000000000000
  0000000000017800 ffff883f7ccc3d78 0000000000000003 ffff883f7ccc3bf8
  ffffffff810c4fc9 ffff883f7ccc3c08 00000000810c5043 ffff883f7ccc3c08
  Call Trace:
  <IRQ> [<ffffffff810c4dd0>] ? update_group_capacity+0x110/0x200
  [<ffffffff810c4fc9>] ? update_sd_lb_stats+0x109/0x600
  [<ffffffff810c5507>] ? find_busiest_group+0x47/0x530
  [<ffffffff810c5b84>] ? load_balance+0x194/0x900
  [<ffffffff810ad5ca>] ? update_rq_clock.part.83+0x1a/0xe0
  [<ffffffff810c6d42>] ? rebalance_domains+0x152/0x290
  [<ffffffff810c6f5c>] ? run_rebalance_domains+0xdc/0x1d0
  [<ffffffff8108a75b>] ? __do_softirq+0xfb/0x320
  [<ffffffff8108ac85>] ? irq_exit+0x125/0x130
  [<ffffffff810b3a17>] ? scheduler_ipi+0x97/0x160
  [<ffffffff81052709>] ? smp_reschedule_interrupt+0x29/0x30
  [<ffffffff8173a1be>] ? reschedule_interrupt+0x6e/0x80
   <EOI> [<ffffffff815bc83c>] ? cpuidle_enter_state+0xcc/0x230
  [<ffffffff815bc80c>] ? cpuidle_enter_state+0x9c/0x230
  [<ffffffff815bc9d7>] ? cpuidle_enter+0x17/0x20
  [<ffffffff810cd6dc>] ? cpu_startup_entry+0x38c/0x420
  [<ffffffff81053373>] ? start_secondary+0x173/0x1e0

Because divide-by-zero error happens in function:

update_group_capacity()
  update_cpu_capacity()
    scale_rt_capacity()
     {
          ...
          total = sched_avg_period() + delta;
          used = div_u64(avg, total);
          ...
     }

To fix this issue, check user input value of sysctl_sched_time_avg, keep
it unchanged when hitting invalid input, and set the minimum limit of
sysctl_sched_time_avg to 1 ms.

Reported-by: James Puthukattukaran <james.puthukattukaran@oracle.com>
Signed-off-by: Ethan Zhao <ethan.zhao@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: efault@gmx.de
Cc: ethan.kernel@gmail.com
Cc: keescook@chromium.org
Cc: mcgrof@kernel.org
Cc: <stable@vger.kernel.org>
Link: http://lkml.kernel.org/r/1504504774-18253-1-git-send-email-ethan.zhao@oracle.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Steve Muckle <smuckle@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/sysctl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 4e2f98dd20528..1464cab7cabe0 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -387,7 +387,8 @@ static struct ctl_table kern_table[] = {
 		.data		= &sysctl_sched_time_avg,
 		.maxlen		= sizeof(unsigned int),
 		.mode		= 0644,
-		.proc_handler	= proc_dointvec,
+		.proc_handler	= proc_dointvec_minmax,
+		.extra1		= &one,
 	},
 	{
 		.procname	= "sched_shares_window_ns",

From e73cd3a55e47269bdd85697f725f7a156e588020 Mon Sep 17 00:00:00 2001
From: "yujuan.qi" <yujuan.qi@mediatek.com>
Date: Mon, 31 Jul 2017 11:23:01 +0800
Subject: [PATCH 1701/1852] Cipso: cipso_v4_optptr enter infinite loop

commit 40413955ee265a5e42f710940ec78f5450d49149 upstream.

in for(),if((optlen > 0) && (optptr[1] == 0)), enter infinite loop.

Test: receive a packet which the ip length > 20 and the first byte of ip option is 0, produce this issue

Signed-off-by: yujuan.qi <yujuan.qi@mediatek.com>
Acked-by: Paul Moore <paul@paul-moore.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv4/cipso_ipv4.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/net/ipv4/cipso_ipv4.c b/net/ipv4/cipso_ipv4.c
index 5f3b81941a6f8..5169b9b36b6a2 100644
--- a/net/ipv4/cipso_ipv4.c
+++ b/net/ipv4/cipso_ipv4.c
@@ -1593,9 +1593,17 @@ unsigned char *cipso_v4_optptr(const struct sk_buff *skb)
 	int taglen;
 
 	for (optlen = iph->ihl*4 - sizeof(struct iphdr); optlen > 0; ) {
-		if (optptr[0] == IPOPT_CIPSO)
+		switch (optptr[0]) {
+		case IPOPT_CIPSO:
 			return optptr;
-		taglen = optptr[1];
+		case IPOPT_END:
+			return NULL;
+		case IPOPT_NOOP:
+			taglen = 1;
+			break;
+		default:
+			taglen = optptr[1];
+		}
 		optlen -= taglen;
 		optptr += taglen;
 	}

From b8c3ec83fc26bd14099845ce4d86519439a993e9 Mon Sep 17 00:00:00 2001
From: Eyal Birger <eyal.birger@gmail.com>
Date: Thu, 7 Jun 2018 10:11:02 +0300
Subject: [PATCH 1702/1852] vti6: fix PMTU caching and reporting on xmit

[ Upstream commit d6990976af7c5d8f55903bfb4289b6fb030bf754 ]

When setting the skb->dst before doing the MTU check, the route PMTU
caching and reporting is done on the new dst which is about to be
released.

Instead, PMTU handling should be done using the original dst.

This is aligned with IPv4 VTI.

Fixes: ccd740cbc6 ("vti6: Add pmtu handling to vti6_xmit.")
Signed-off-by: Eyal Birger <eyal.birger@gmail.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/ipv6/ip6_vti.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/net/ipv6/ip6_vti.c b/net/ipv6/ip6_vti.c
index b8bf123f7f79b..060862a6f2f2a 100644
--- a/net/ipv6/ip6_vti.c
+++ b/net/ipv6/ip6_vti.c
@@ -469,10 +469,6 @@ vti6_xmit(struct sk_buff *skb, struct net_device *dev, struct flowi *fl)
 		goto tx_err_dst_release;
 	}
 
-	skb_scrub_packet(skb, !net_eq(t->net, dev_net(dev)));
-	skb_dst_set(skb, dst);
-	skb->dev = skb_dst(skb)->dev;
-
 	mtu = dst_mtu(dst);
 	if (!skb->ignore_df && skb->len > mtu) {
 		skb_dst(skb)->ops->update_pmtu(dst, NULL, skb, mtu);
@@ -487,9 +483,14 @@ vti6_xmit(struct sk_buff *skb, struct net_device *dev, struct flowi *fl)
 				  htonl(mtu));
 		}
 
-		return -EMSGSIZE;
+		err = -EMSGSIZE;
+		goto tx_err_dst_release;
 	}
 
+	skb_scrub_packet(skb, !net_eq(t->net, dev_net(dev)));
+	skb_dst_set(skb, dst);
+	skb->dev = skb_dst(skb)->dev;
+
 	err = dst_output(t->net, skb->sk, skb);
 	if (net_xmit_eval(err) == 0) {
 		struct pcpu_sw_netstats *tstats = this_cpu_ptr(dev->tstats);

From 8ee8933eea5ccaf5c86b0f7adf9689515ece422f Mon Sep 17 00:00:00 2001
From: Tommi Rantala <tommi.t.rantala@nokia.com>
Date: Thu, 21 Jun 2018 09:30:47 +0300
Subject: [PATCH 1703/1852] xfrm: fix missing dst_release() after policy
 blocking lbcast and multicast

[ Upstream commit 8cc88773855f988d6a3bbf102bbd9dd9c828eb81 ]

Fix missing dst_release() when local broadcast or multicast traffic is
xfrm policy blocked.

For IPv4 this results to dst leak: ip_route_output_flow() allocates
dst_entry via __ip_route_output_key() and passes it to
xfrm_lookup_route(). xfrm_lookup returns ERR_PTR(-EPERM) that is
propagated. The dst that was allocated is never released.

IPv4 local broadcast testcase:
 ping -b 192.168.1.255 &
 sleep 1
 ip xfrm policy add src 0.0.0.0/0 dst 192.168.1.255/32 dir out action block

IPv4 multicast testcase:
 ping 224.0.0.1 &
 sleep 1
 ip xfrm policy add src 0.0.0.0/0 dst 224.0.0.1/32 dir out action block

For IPv6 the missing dst_release() causes trouble e.g. when used in netns:
 ip netns add TEST
 ip netns exec TEST ip link set lo up
 ip link add dummy0 type dummy
 ip link set dev dummy0 netns TEST
 ip netns exec TEST ip addr add fd00::1111 dev dummy0
 ip netns exec TEST ip link set dummy0 up
 ip netns exec TEST ping -6 -c 5 ff02::1%dummy0 &
 sleep 1
 ip netns exec TEST ip xfrm policy add src ::/0 dst ff02::1 dir out action block
 wait
 ip netns del TEST

After netns deletion we see:
[  258.239097] unregister_netdevice: waiting for lo to become free. Usage count = 2
[  268.279061] unregister_netdevice: waiting for lo to become free. Usage count = 2
[  278.367018] unregister_netdevice: waiting for lo to become free. Usage count = 2
[  288.375259] unregister_netdevice: waiting for lo to become free. Usage count = 2

Fixes: ac37e2515c1a ("xfrm: release dst_orig in case of error in xfrm_lookup()")
Signed-off-by: Tommi Rantala <tommi.t.rantala@nokia.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_policy.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 6173a55af2145..4615138b104fc 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -2327,6 +2327,9 @@ struct dst_entry *xfrm_lookup_route(struct net *net, struct dst_entry *dst_orig,
 	if (IS_ERR(dst) && PTR_ERR(dst) == -EREMOTE)
 		return make_blackhole(net, dst_orig->ops->family, dst_orig);
 
+	if (IS_ERR(dst))
+		dst_release(dst_orig);
+
 	return dst;
 }
 EXPORT_SYMBOL(xfrm_lookup_route);

From 2fb6c4ae504dfba239677d7e02b1f5e3bdb4fb93 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Mon, 25 Jun 2018 14:00:07 +0200
Subject: [PATCH 1704/1852] xfrm: free skb if nlsk pointer is NULL

[ Upstream commit 86126b77dcd551ce223e7293bb55854e3df05646 ]

nlmsg_multicast() always frees the skb, so in case we cannot call
it we must do that ourselves.

Fixes: 21ee543edc0dea ("xfrm: fix race between netns cleanup and state expire notification")
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/xfrm/xfrm_user.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 8efc7c39275d4..ee6037dd0a1c7 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -988,10 +988,12 @@ static inline int xfrm_nlmsg_multicast(struct net *net, struct sk_buff *skb,
 {
 	struct sock *nlsk = rcu_dereference(net->xfrm.nlsk);
 
-	if (nlsk)
-		return nlmsg_multicast(nlsk, skb, pid, group, GFP_ATOMIC);
-	else
-		return -1;
+	if (!nlsk) {
+		kfree_skb(skb);
+		return -EPIPE;
+	}
+
+	return nlmsg_multicast(nlsk, skb, pid, group, GFP_ATOMIC);
 }
 
 static inline size_t xfrm_spdinfo_msgsize(void)

From 15c35e45d83e14c5f321673219f39e992c9f2ad8 Mon Sep 17 00:00:00 2001
From: "mpubbise@codeaurora.org" <mpubbise@codeaurora.org>
Date: Mon, 2 Jul 2018 15:40:14 +0530
Subject: [PATCH 1705/1852] mac80211: add stations tied to AP_VLANs during hw
 reconfig

[ Upstream commit 19103a4bfb42f320395daa5616ece3e89e759d63 ]

As part of hw reconfig, only stations linked to AP interfaces are added
back to the driver ignoring those which are tied to AP_VLAN interfaces.

It is true that there could be stations tied to the AP_VLAN interface while
serving 4addr clients or when using AP_VLAN for VLAN operations; we should
be adding these stations back to the driver as part of hw reconfig, failing
to do so can cause functional issues.

In the case of ath10k driver, the following errors were observed.

ath10k_pci : failed to install key for non-existent peer XX:XX:XX:XX:XX:XX
Workqueue: events_freezable ieee80211_restart_work [mac80211]
(unwind_backtrace) from (show_stack+0x10/0x14)
(show_stack) (dump_stack+0x80/0xa0)
(dump_stack) (warn_slowpath_common+0x68/0x8c)
(warn_slowpath_common) (warn_slowpath_null+0x18/0x20)
(warn_slowpath_null) (ieee80211_enable_keys+0x88/0x154 [mac80211])
(ieee80211_enable_keys) (ieee80211_reconfig+0xc90/0x19c8 [mac80211])
(ieee80211_reconfig]) (ieee80211_restart_work+0x8c/0xa0 [mac80211])
(ieee80211_restart_work) (process_one_work+0x284/0x488)
(process_one_work) (worker_thread+0x228/0x360)
(worker_thread) (kthread+0xd8/0xec)
(kthread) (ret_from_fork+0x14/0x24)

Also while bringing down the AP VAP, WARN_ONs and errors related to peer
removal were observed.

ath10k_pci : failed to clear all peer wep keys for vdev 0: -2
ath10k_pci : failed to disassociate station: 8c:fd:f0:0a:8c:f5 vdev 0: -2
(unwind_backtrace) (show_stack+0x10/0x14)
(show_stack) (dump_stack+0x80/0xa0)
(dump_stack) (warn_slowpath_common+0x68/0x8c)
(warn_slowpath_common) (warn_slowpath_null+0x18/0x20)
(warn_slowpath_null) (sta_set_sinfo+0xb98/0xc9c [mac80211])
(sta_set_sinfo [mac80211]) (__sta_info_flush+0xf0/0x134 [mac80211])
(__sta_info_flush [mac80211]) (ieee80211_stop_ap+0xe8/0x390 [mac80211])
(ieee80211_stop_ap [mac80211]) (__cfg80211_stop_ap+0xe0/0x3dc [cfg80211])
(__cfg80211_stop_ap [cfg80211]) (cfg80211_stop_ap+0x30/0x44 [cfg80211])
(cfg80211_stop_ap [cfg80211]) (genl_rcv_msg+0x274/0x30c)
(genl_rcv_msg) (netlink_rcv_skb+0x58/0xac)
(netlink_rcv_skb) (genl_rcv+0x20/0x34)
(genl_rcv) (netlink_unicast+0x11c/0x204)
(netlink_unicast) (netlink_sendmsg+0x30c/0x370)
(netlink_sendmsg) (sock_sendmsg+0x70/0x84)
(sock_sendmsg) (___sys_sendmsg.part.3+0x188/0x228)
(___sys_sendmsg.part.3) (__sys_sendmsg+0x4c/0x70)
(__sys_sendmsg) (ret_fast_syscall+0x0/0x44)

These issues got fixed by adding the stations which are
tied to AP_VLANs back to the driver.

Signed-off-by: Manikanta Pubbisetty <mpubbise@codeaurora.org>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/mac80211/util.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/net/mac80211/util.c b/net/mac80211/util.c
index ec26a84b00e21..2214c77d41721 100644
--- a/net/mac80211/util.c
+++ b/net/mac80211/util.c
@@ -2006,7 +2006,8 @@ int ieee80211_reconfig(struct ieee80211_local *local)
 		if (!sta->uploaded)
 			continue;
 
-		if (sta->sdata->vif.type != NL80211_IFTYPE_AP)
+		if (sta->sdata->vif.type != NL80211_IFTYPE_AP &&
+		    sta->sdata->vif.type != NL80211_IFTYPE_AP_VLAN)
 			continue;
 
 		for (state = IEEE80211_STA_NOTEXIST;

From 3f859df340216d3e5ef3a6a0f304e5fb54612c38 Mon Sep 17 00:00:00 2001
From: Bernd Edlinger <bernd.edlinger@hotmail.de>
Date: Sun, 8 Jul 2018 09:57:22 +0000
Subject: [PATCH 1706/1852] nl80211: Add a missing break in parse_station_flags

[ Upstream commit 5cf3006cc81d9aa09a10aa781fc065546b12919d ]

I was looking at usually suppressed gcc warnings,
[-Wimplicit-fallthrough=] in this case:

The code definitely looks like a break is missing here.
However I am not able to test the NL80211_IFTYPE_MESH_POINT,
nor do I actually know what might be :)
So please use this patch with caution and only if you are
able to do some testing.

Signed-off-by: Bernd Edlinger <bernd.edlinger@hotmail.de>
[johannes: looks obvious enough to apply as is, interesting
 though that it never seems to have been a problem]
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/wireless/nl80211.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index f20aa7c2c9c2b..fc92c8e477434 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -3578,6 +3578,7 @@ static int parse_station_flags(struct genl_info *info,
 		params->sta_flags_mask = BIT(NL80211_STA_FLAG_AUTHENTICATED) |
 					 BIT(NL80211_STA_FLAG_MFP) |
 					 BIT(NL80211_STA_FLAG_AUTHORIZED);
+		break;
 	default:
 		return -EINVAL;
 	}

From db57531eba6adf3f0e7eda2bafbac78e9326e5dd Mon Sep 17 00:00:00 2001
From: Sean Paul <seanpaul@chromium.org>
Date: Tue, 3 Jul 2018 12:56:03 -0400
Subject: [PATCH 1707/1852] drm/bridge: adv7511: Reset registers on hotplug

[ Upstream commit 5f3417569165a8ee57654217f73e0160312f409c ]

The bridge loses its hw state when the cable is unplugged. If we detect
this case in the hpd handler, reset its state.

Reported-by: Rob Clark <robdclark@gmail.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180703165648.120401-1-seanpaul@chromium.org
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/i2c/adv7511.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i2c/adv7511.c b/drivers/gpu/drm/i2c/adv7511.c
index dba5c0ea0827d..c7c243e9b8083 100644
--- a/drivers/gpu/drm/i2c/adv7511.c
+++ b/drivers/gpu/drm/i2c/adv7511.c
@@ -450,6 +450,18 @@ static void adv7511_hpd_work(struct work_struct *work)
 	else
 		status = connector_status_disconnected;
 
+	/*
+	 * The bridge resets its registers on unplug. So when we get a plug
+	 * event and we're already supposed to be powered, cycle the bridge to
+	 * restore its state.
+	 */
+	if (status == connector_status_connected &&
+	    adv7511->connector.status == connector_status_disconnected &&
+	    adv7511->powered) {
+		regcache_mark_dirty(adv7511->regmap);
+		adv7511_power_on(adv7511);
+	}
+
 	if (adv7511->connector.status != status) {
 		adv7511->connector.status = status;
 		drm_kms_helper_hotplug_event(adv7511->connector.dev);

From 1c2d7688ff7c1f52166fec2daef3057a6871c8c1 Mon Sep 17 00:00:00 2001
From: Varun Prakash <varun@chelsio.com>
Date: Wed, 11 Jul 2018 22:09:52 +0530
Subject: [PATCH 1708/1852] scsi: libiscsi: fix possible NULL pointer
 dereference in case of TMF

[ Upstream commit a17037e7d59075053b522048742a08ac9500bde8 ]

In iscsi_check_tmf_restrictions() task->hdr is dereferenced to print the
opcode, it is possible that task->hdr is NULL.

There are two cases based on opcode argument:

1. ISCSI_OP_SCSI_CMD - In this case alloc_pdu() is called
after iscsi_check_tmf_restrictions()

iscsi_prep_scsi_cmd_pdu() -> iscsi_check_tmf_restrictions() -> alloc_pdu().

Transport drivers allocate memory for iSCSI hdr in alloc_pdu() and assign
it to task->hdr. In case of TMF task->hdr will be NULL resulting in NULL
pointer dereference.

2. ISCSI_OP_SCSI_DATA_OUT - In this case transport driver can free the
memory for iSCSI hdr after transmitting the pdu so task->hdr can be NULL or
invalid.

This patch fixes this issue by removing task->hdr->opcode from the printk
statement.

Signed-off-by: Varun Prakash <varun@chelsio.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/libiscsi.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index 9f0b00c38658e..a74f8fbefd337 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -283,11 +283,11 @@ static int iscsi_check_tmf_restrictions(struct iscsi_task *task, int opcode)
 		 */
 		if (opcode != ISCSI_OP_SCSI_DATA_OUT) {
 			iscsi_conn_printk(KERN_INFO, conn,
-					  "task [op %x/%x itt "
+					  "task [op %x itt "
 					  "0x%x/0x%x] "
 					  "rejected.\n",
-					  task->hdr->opcode, opcode,
-					  task->itt, task->hdr_itt);
+					  opcode, task->itt,
+					  task->hdr_itt);
 			return -EACCES;
 		}
 		/*
@@ -296,10 +296,10 @@ static int iscsi_check_tmf_restrictions(struct iscsi_task *task, int opcode)
 		 */
 		if (conn->session->fast_abort) {
 			iscsi_conn_printk(KERN_INFO, conn,
-					  "task [op %x/%x itt "
+					  "task [op %x itt "
 					  "0x%x/0x%x] fast abort.\n",
-					  task->hdr->opcode, opcode,
-					  task->itt, task->hdr_itt);
+					  opcode, task->itt,
+					  task->hdr_itt);
 			return -EACCES;
 		}
 		break;

From 9f2d14f160299f6aca18453f9714220be99f2fc7 Mon Sep 17 00:00:00 2001
From: Lucas Stach <l.stach@pengutronix.de>
Date: Wed, 11 Apr 2018 17:31:35 +0200
Subject: [PATCH 1709/1852] drm/imx: imx-ldb: disable LDB on driver bind

[ Upstream commit b58262396fabd43dc869b576e3defdd23b32fe94 ]

The LVDS signal integrity is only guaranteed when the correct enable
sequence (first IPU DI, then LDB) is used. If the LDB display output was
active before the imx-drm driver is loaded (like when a bootsplash was
active) the DI will be disabled by the full IPU reset we do when loading
the driver. The LDB control registers are not part of the IPU range and
thus will remain unchanged.

This leads to the LDB still being active when the DI is getting enabled,
effectively reversing the required enable sequence. Fix this by also
disabling the LDB on driver bind.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/imx/imx-ldb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index c79a61b67ded0..305c9ae69224c 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -526,6 +526,9 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 		return PTR_ERR(imx_ldb->regmap);
 	}
 
+	/* disable LDB by resetting the control register to POR default */
+	regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
+
 	imx_ldb->dev = dev;
 
 	if (of_id)

From f146f3d0bb45707c8db4f3f6de8c6feb3fc56dc9 Mon Sep 17 00:00:00 2001
From: Lucas Stach <l.stach@pengutronix.de>
Date: Wed, 11 Apr 2018 17:31:36 +0200
Subject: [PATCH 1710/1852] drm/imx: imx-ldb: check if channel is enabled
 before printing warning

[ Upstream commit c80d673b91a6c81d765864e10f2b15110ee900ad ]

If the second LVDS channel has been disabled in the DT when using dual-channel
mode we should not print a warning.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/imx/imx-ldb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 305c9ae69224c..7f1bb858276e1 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -569,14 +569,14 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 		if (ret || i < 0 || i > 1)
 			return -EINVAL;
 
+		if (!of_device_is_available(child))
+			continue;
+
 		if (dual && i > 0) {
 			dev_warn(dev, "dual-channel mode, ignoring second output\n");
 			continue;
 		}
 
-		if (!of_device_is_available(child))
-			continue;
-
 		channel = &imx_ldb->channel[i];
 		channel->ldb = imx_ldb;
 		channel->chno = i;

From 9d6679b03ed4278edc05cee82d8408e4307876e8 Mon Sep 17 00:00:00 2001
From: Jia-Ju Bai <baijiaju1990@gmail.com>
Date: Wed, 20 Jun 2018 11:54:53 +0800
Subject: [PATCH 1711/1852] usb: gadget: r8a66597: Fix two possible
 sleep-in-atomic-context bugs in init_controller()

[ Upstream commit 0602088b10a7c0b4e044a810678ef93d7cc5bf48 ]

The driver may sleep with holding a spinlock.
The function call paths (from bottom to top) in Linux-4.16.7 are:

[FUNC] msleep
drivers/usb/gadget/udc/r8a66597-udc.c, 839:
		msleep in init_controller
drivers/usb/gadget/udc/r8a66597-udc.c, 96:
		init_controller in r8a66597_usb_disconnect
drivers/usb/gadget/udc/r8a66597-udc.c, 93:
		spin_lock in r8a66597_usb_disconnect

[FUNC] msleep
drivers/usb/gadget/udc/r8a66597-udc.c, 835:
		msleep in init_controller
drivers/usb/gadget/udc/r8a66597-udc.c, 96:
		init_controller in r8a66597_usb_disconnect
drivers/usb/gadget/udc/r8a66597-udc.c, 93:
		spin_lock in r8a66597_usb_disconnect

To fix these bugs, msleep() is replaced with mdelay().

This bug is found by my static analysis tool (DSAC-2) and checked by
my code review.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/udc/r8a66597-udc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c
index baa0609a429d9..c7206a3b13c7b 100644
--- a/drivers/usb/gadget/udc/r8a66597-udc.c
+++ b/drivers/usb/gadget/udc/r8a66597-udc.c
@@ -835,11 +835,11 @@ static void init_controller(struct r8a66597 *r8a66597)
 
 		r8a66597_bset(r8a66597, XCKE, SYSCFG0);
 
-		msleep(3);
+		mdelay(3);
 
 		r8a66597_bset(r8a66597, PLLC, SYSCFG0);
 
-		msleep(1);
+		mdelay(1);
 
 		r8a66597_bset(r8a66597, SCKE, SYSCFG0);
 

From 6833c2d791dcd7569ba4711c0436a1ad194d5959 Mon Sep 17 00:00:00 2001
From: Jia-Ju Bai <baijiaju1990@gmail.com>
Date: Wed, 20 Jun 2018 11:55:08 +0800
Subject: [PATCH 1712/1852] usb: gadget: r8a66597: Fix a possible
 sleep-in-atomic-context bugs in r8a66597_queue()

[ Upstream commit f36b507c14c4b6e634463a610294e9cb0065c8ea ]

The driver may sleep in an interrupt handler.
The function call path (from bottom to top) in Linux-4.16.7 is:

[FUNC] r8a66597_queue(GFP_KERNEL)
drivers/usb/gadget/udc/r8a66597-udc.c, 1193:
		r8a66597_queue in get_status
drivers/usb/gadget/udc/r8a66597-udc.c, 1301:
		get_status in setup_packet
drivers/usb/gadget/udc/r8a66597-udc.c, 1381:
		setup_packet in irq_control_stage
drivers/usb/gadget/udc/r8a66597-udc.c, 1508:
		irq_control_stage in r8a66597_irq (interrupt handler)

To fix this bug, GFP_KERNEL is replaced with GFP_ATOMIC.

This bug is found by my static analysis tool (DSAC-2) and checked by
my code review.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/udc/r8a66597-udc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c
index c7206a3b13c7b..e340946476037 100644
--- a/drivers/usb/gadget/udc/r8a66597-udc.c
+++ b/drivers/usb/gadget/udc/r8a66597-udc.c
@@ -1193,7 +1193,7 @@ __acquires(r8a66597->lock)
 	r8a66597->ep0_req->length = 2;
 	/* AV: what happens if we get called again before that gets through? */
 	spin_unlock(&r8a66597->lock);
-	r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL);
+	r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_ATOMIC);
 	spin_lock(&r8a66597->lock);
 }
 

From afa6aebb189c1bc61f2fc64d5b5fc8970c0abe95 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Sun, 15 Jul 2018 10:37:37 -0700
Subject: [PATCH 1713/1852] usb/phy: fix PPC64 build errors in phy-fsl-usb.c

[ Upstream commit a39ba90a1cc7010edb0a7132e1b67f3d80b994e9 ]

Fix build errors when built for PPC64:
These variables are only used on PPC32 so they don't need to be
initialized for PPC64.

../drivers/usb/phy/phy-fsl-usb.c: In function 'usb_otg_start':
../drivers/usb/phy/phy-fsl-usb.c:865:3: error: '_fsl_readl' undeclared (first use in this function); did you mean 'fsl_readl'?
   _fsl_readl = _fsl_readl_be;
../drivers/usb/phy/phy-fsl-usb.c:865:16: error: '_fsl_readl_be' undeclared (first use in this function); did you mean 'fsl_readl'?
   _fsl_readl = _fsl_readl_be;
../drivers/usb/phy/phy-fsl-usb.c:866:3: error: '_fsl_writel' undeclared (first use in this function); did you mean 'fsl_writel'?
   _fsl_writel = _fsl_writel_be;
../drivers/usb/phy/phy-fsl-usb.c:866:17: error: '_fsl_writel_be' undeclared (first use in this function); did you mean 'fsl_writel'?
   _fsl_writel = _fsl_writel_be;
../drivers/usb/phy/phy-fsl-usb.c:868:16: error: '_fsl_readl_le' undeclared (first use in this function); did you mean 'fsl_readl'?
   _fsl_readl = _fsl_readl_le;
../drivers/usb/phy/phy-fsl-usb.c:869:17: error: '_fsl_writel_le' undeclared (first use in this function); did you mean 'fsl_writel'?
   _fsl_writel = _fsl_writel_le;

and the sysfs "show" function return type should be ssize_t, not int:

../drivers/usb/phy/phy-fsl-usb.c:1042:49: error: initialization of 'ssize_t (*)(struct device *, struct device_attribute *, char *)' {aka 'long int (*)(struct device *, struct device_attribute *, char *)'} from incompatible pointer type 'int (*)(struct device *, struct device_attribute *, char *)' [-Werror=incompatible-pointer-types]
 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Felipe Balbi <balbi@kernel.org>
Cc: linux-usb@vger.kernel.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/phy/phy-fsl-usb.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/phy/phy-fsl-usb.c b/drivers/usb/phy/phy-fsl-usb.c
index 94eb2923afed0..85d031ce85c1f 100644
--- a/drivers/usb/phy/phy-fsl-usb.c
+++ b/drivers/usb/phy/phy-fsl-usb.c
@@ -879,6 +879,7 @@ int usb_otg_start(struct platform_device *pdev)
 	if (pdata->init && pdata->init(pdev) != 0)
 		return -EINVAL;
 
+#ifdef CONFIG_PPC32
 	if (pdata->big_endian_mmio) {
 		_fsl_readl = _fsl_readl_be;
 		_fsl_writel = _fsl_writel_be;
@@ -886,6 +887,7 @@ int usb_otg_start(struct platform_device *pdev)
 		_fsl_readl = _fsl_readl_le;
 		_fsl_writel = _fsl_writel_le;
 	}
+#endif
 
 	/* request irq */
 	p_otg->irq = platform_get_irq(pdev, 0);
@@ -976,7 +978,7 @@ int usb_otg_start(struct platform_device *pdev)
 /*
  * state file in sysfs
  */
-static int show_fsl_usb2_otg_state(struct device *dev,
+static ssize_t show_fsl_usb2_otg_state(struct device *dev,
 				   struct device_attribute *attr, char *buf)
 {
 	struct otg_fsm *fsm = &fsl_otg_dev->fsm;

From 26ead38f81488abde6172a566ce04561b264cc48 Mon Sep 17 00:00:00 2001
From: Peter Senna Tschudin <peter.senna@gmail.com>
Date: Tue, 10 Jul 2018 16:01:45 +0200
Subject: [PATCH 1714/1852] tools: usb: ffs-test: Fix build on big endian
 systems
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit a2b22dddc7bb6110ac3b5ed1a60aa9279836fadb ]

The tools/usb/ffs-test.c file defines cpu_to_le16/32 by using the C
library htole16/32 function calls. However, cpu_to_le16/32 are used when
initializing structures, i.e in a context where a function call is not
allowed.

It works fine on little endian systems because htole16/32 are defined by
the C library as no-ops. But on big-endian systems, they are actually
doing something, which might involve calling a function, causing build
failures, such as:

   ffs-test.c:48:25: error: initializer element is not constant
    #define cpu_to_le32(x)  htole32(x)
                            ^~~~~~~
   ffs-test.c:128:12: note: in expansion of macro ‘cpu_to_le32’
      .magic = cpu_to_le32(FUNCTIONFS_DESCRIPTORS_MAGIC_V2),
               ^~~~~~~~~~~

To solve this, we code cpu_to_le16/32 in a way that allows them to be
used when initializing structures. This fix was imported from
meta-openembedded/android-tools/fix-big-endian-build.patch written by
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>.

CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/usb/ffs-test.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/tools/usb/ffs-test.c b/tools/usb/ffs-test.c
index 88d5e71be0449..47dfa0b0fcd71 100644
--- a/tools/usb/ffs-test.c
+++ b/tools/usb/ffs-test.c
@@ -44,12 +44,25 @@
 
 /******************** Little Endian Handling ********************************/
 
-#define cpu_to_le16(x)  htole16(x)
-#define cpu_to_le32(x)  htole32(x)
+/*
+ * cpu_to_le16/32 are used when initializing structures, a context where a
+ * function call is not allowed. To solve this, we code cpu_to_le16/32 in a way
+ * that allows them to be used when initializing structures.
+ */
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define cpu_to_le16(x)  (x)
+#define cpu_to_le32(x)  (x)
+#else
+#define cpu_to_le16(x)  ((((x) >> 8) & 0xffu) | (((x) & 0xffu) << 8))
+#define cpu_to_le32(x)  \
+	((((x) & 0xff000000u) >> 24) | (((x) & 0x00ff0000u) >>  8) | \
+	(((x) & 0x0000ff00u) <<  8) | (((x) & 0x000000ffu) << 24))
+#endif
+
 #define le32_to_cpu(x)  le32toh(x)
 #define le16_to_cpu(x)  le16toh(x)
 
-
 /******************** Messages and Errors ***********************************/
 
 static const char argv0[] = "ffs-test";

From c8bfb3bfca089b1567ee9b3f2302c02df24d775d Mon Sep 17 00:00:00 2001
From: Eugeniu Rosca <roscaeugeniu@gmail.com>
Date: Mon, 2 Jul 2018 23:46:47 +0200
Subject: [PATCH 1715/1852] usb: gadget: f_uac2: fix endianness of 'struct
 cntrl_*_lay3'

[ Upstream commit eec24f2a0d4dc3b1d95a3ccd2feb523ede3ba775 ]

The list [1] of commits doing endianness fixes in USB subsystem is long
due to below quote from USB spec Revision 2.0 from April 27, 2000:

------------
8.1 Byte/Bit Ordering

Multiple byte fields in standard descriptors, requests, and responses
are interpreted as and moved over the bus in little-endian order, i.e.
LSB to MSB.
------------

This commit belongs to the same family.

[1] Example of endianness fixes in USB subsystem:
commit 14e1d56cbea6 ("usb: gadget: f_uac2: endianness fixes.")
commit 42370b821168 ("usb: gadget: f_uac1: endianness fixes.")
commit 63afd5cc7877 ("USB: chaoskey: fix Alea quirk on big-endian hosts")
commit 74098c4ac782 ("usb: gadget: acm: fix endianness in notifications")
commit cdd7928df0d2 ("ACM gadget: fix endianness in notifications")
commit 323ece54e076 ("cdc-wdm: fix endianness bug in debug statements")
commit e102609f1072 ("usb: gadget: uvc: Fix endianness mismatches")
       list goes on

Fixes: 132fcb460839 ("usb: gadget: Add Audio Class 2.0 Driver")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Ruslan Bilovol <ruslan.bilovol@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/usb/gadget/function/f_uac2.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index b5dab103be382..e931c3cb08409 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -941,14 +941,14 @@ static struct usb_descriptor_header *hs_audio_desc[] = {
 };
 
 struct cntrl_cur_lay3 {
-	__u32	dCUR;
+	__le32	dCUR;
 };
 
 struct cntrl_range_lay3 {
-	__u16	wNumSubRanges;
-	__u32	dMIN;
-	__u32	dMAX;
-	__u32	dRES;
+	__le16	wNumSubRanges;
+	__le32	dMIN;
+	__le32	dMAX;
+	__le32	dRES;
 } __packed;
 
 static inline void
@@ -1296,9 +1296,9 @@ in_rq_cur(struct usb_function *fn, const struct usb_ctrlrequest *cr)
 		memset(&c, 0, sizeof(struct cntrl_cur_lay3));
 
 		if (entity_id == USB_IN_CLK_ID)
-			c.dCUR = p_srate;
+			c.dCUR = cpu_to_le32(p_srate);
 		else if (entity_id == USB_OUT_CLK_ID)
-			c.dCUR = c_srate;
+			c.dCUR = cpu_to_le32(c_srate);
 
 		value = min_t(unsigned, w_length, sizeof c);
 		memcpy(req->buf, &c, value);
@@ -1336,15 +1336,15 @@ in_rq_range(struct usb_function *fn, const struct usb_ctrlrequest *cr)
 
 	if (control_selector == UAC2_CS_CONTROL_SAM_FREQ) {
 		if (entity_id == USB_IN_CLK_ID)
-			r.dMIN = p_srate;
+			r.dMIN = cpu_to_le32(p_srate);
 		else if (entity_id == USB_OUT_CLK_ID)
-			r.dMIN = c_srate;
+			r.dMIN = cpu_to_le32(c_srate);
 		else
 			return -EOPNOTSUPP;
 
 		r.dMAX = r.dMIN;
 		r.dRES = 0;
-		r.wNumSubRanges = 1;
+		r.wNumSubRanges = cpu_to_le16(1);
 
 		value = min_t(unsigned, w_length, sizeof r);
 		memcpy(req->buf, &r, value);

From 0496bdd15db6b0f39dcfb0de425e8c5fc8c6e71f Mon Sep 17 00:00:00 2001
From: Len Brown <len.brown@intel.com>
Date: Fri, 20 Jul 2018 14:47:03 -0400
Subject: [PATCH 1716/1852] tools/power turbostat: fix -S on UP systems

[ Upstream commit 9d83601a9cc1884d1b5706ee2acc661d558c6838 ]

The -S (system summary) option failed to print any data on a 1-processor system.

Reported-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/power/x86/turbostat/turbostat.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 0dac7e05a6ac9..36e0d255d1b6e 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -663,9 +663,7 @@ void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_
 	if (!printed || !summary_only)
 		print_header();
 
-	if (topo.num_cpus > 1)
-		format_counters(&average.threads, &average.cores,
-			&average.packages);
+	format_counters(&average.threads, &average.cores, &average.packages);
 
 	printed = 1;
 

From 52d7d67dad89339e63f0cb410fd73cbcc0a9fb0f Mon Sep 17 00:00:00 2001
From: YueHaibing <yuehaibing@huawei.com>
Date: Thu, 19 Jul 2018 10:27:13 +0800
Subject: [PATCH 1717/1852] net: caif: Add a missing rcu_read_unlock() in
 caif_flow_cb

[ Upstream commit 64119e05f7b31e83e2555f6782e6cdc8f81c63f4 ]

Add a missing rcu_read_unlock in the error path

Fixes: c95567c80352 ("caif: added check for potential null return")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 net/caif/caif_dev.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/net/caif/caif_dev.c b/net/caif/caif_dev.c
index d730a0f68f46b..a0443d40d677c 100644
--- a/net/caif/caif_dev.c
+++ b/net/caif/caif_dev.c
@@ -131,8 +131,10 @@ static void caif_flow_cb(struct sk_buff *skb)
 	caifd = caif_get(skb->dev);
 
 	WARN_ON(caifd == NULL);
-	if (caifd == NULL)
+	if (!caifd) {
+		rcu_read_unlock();
 		return;
+	}
 
 	caifd_hold(caifd);
 	rcu_read_unlock();

From 4fadea22c4e3d1c8e60d94a1b501b204972483fd Mon Sep 17 00:00:00 2001
From: Sudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>
Date: Wed, 18 Jul 2018 22:50:03 -0700
Subject: [PATCH 1718/1852] qed: Fix possible race for the link state value.

[ Upstream commit 58874c7b246109d8efb2b0099d1aa296d6bfc3fa ]

There's a possible race where driver can read link status in mid-transition
and see that virtual-link is up yet speed is 0. Since in this
mid-transition we're guaranteed to see a mailbox from MFW soon, we can
afford to treat this as link down.

Fixes: cc875c2e ("qed: Add link support")
Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Ariel Elior <ariel.elior@cavium.com>
Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/qlogic/qed/qed_mcp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c
index 20d048cdcb882..c898006abb320 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_mcp.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.c
@@ -420,6 +420,7 @@ static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn,
 		break;
 	default:
 		p_link->speed = 0;
+		p_link->link_up = 0;
 	}
 
 	/* Correct speed according to bandwidth allocation */

From 5b3b9ebe74a5a9febf27bc80e9ac49b7bf80f0a9 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw@strlen.de>
Date: Fri, 20 Jul 2018 19:30:57 +0200
Subject: [PATCH 1719/1852] atl1c: reserve min skb headroom

[ Upstream commit 6e56830776828d8ca9897fc4429eeab47c3bb432 ]

Got crash report with following backtrace:
BUG: unable to handle kernel paging request at ffff8801869daffe
RIP: 0010:[<ffffffff816429c4>]  [<ffffffff816429c4>] ip6_finish_output2+0x394/0x4c0
RSP: 0018:ffff880186c83a98  EFLAGS: 00010283
RAX: ffff8801869db00e ...
  [<ffffffff81644cdc>] ip6_finish_output+0x8c/0xf0
  [<ffffffff81644d97>] ip6_output+0x57/0x100
  [<ffffffff81643dc9>] ip6_forward+0x4b9/0x840
  [<ffffffff81645566>] ip6_rcv_finish+0x66/0xc0
  [<ffffffff81645db9>] ipv6_rcv+0x319/0x530
  [<ffffffff815892ac>] netif_receive_skb+0x1c/0x70
  [<ffffffffc0060bec>] atl1c_clean+0x1ec/0x310 [atl1c]
  ...

The bad access is in neigh_hh_output(), at skb->data - 16 (HH_DATA_MOD).
atl1c driver provided skb with no headroom, so 14 bytes (ethernet
header) got pulled, but then 16 are copied.

Reserve NET_SKB_PAD bytes headroom, like netdev_alloc_skb().

Compile tested only; I lack hardware.

Fixes: 7b7017642199 ("atl1c: Fix misuse of netdev_alloc_skb in refilling rx ring")
Signed-off-by: Florian Westphal <fw@strlen.de>
Reviewed-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 8b5988e210d55..c08d34f618b97 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1683,6 +1683,7 @@ static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter)
 	skb = build_skb(page_address(page) + adapter->rx_page_offset,
 			adapter->rx_frag_size);
 	if (likely(skb)) {
+		skb_reserve(skb, NET_SKB_PAD);
 		adapter->rx_page_offset += adapter->rx_frag_size;
 		if (adapter->rx_page_offset >= PAGE_SIZE)
 			adapter->rx_page = NULL;

From 6b72301650d6e7795dbfb8fe885365a3ffcd31bb Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Sat, 21 Jul 2018 12:59:25 -0700
Subject: [PATCH 1720/1852] net: prevent ISA drivers from building on PPC32

[ Upstream commit c9ce1fa1c24b08e13c2a3b5b1f94a19c9eaa982c ]

Prevent drivers from building on PPC32 if they use isa_bus_to_virt(),
isa_virt_to_bus(), or isa_page_to_bus(), which are not available and
thus cause build errors.

../drivers/net/ethernet/3com/3c515.c: In function 'corkscrew_open':
../drivers/net/ethernet/3com/3c515.c:824:9: error: implicit declaration of function 'isa_virt_to_bus'; did you mean 'virt_to_bus'? [-Werror=implicit-function-declaration]

../drivers/net/ethernet/amd/lance.c: In function 'lance_rx':
../drivers/net/ethernet/amd/lance.c:1203:23: error: implicit declaration of function 'isa_bus_to_virt'; did you mean 'bus_to_virt'? [-Werror=implicit-function-declaration]

../drivers/net/ethernet/amd/ni65.c: In function 'ni65_init_lance':
../drivers/net/ethernet/amd/ni65.c:585:20: error: implicit declaration of function 'isa_virt_to_bus'; did you mean 'virt_to_bus'? [-Werror=implicit-function-declaration]

../drivers/net/ethernet/cirrus/cs89x0.c: In function 'net_open':
../drivers/net/ethernet/cirrus/cs89x0.c:897:20: error: implicit declaration of function 'isa_virt_to_bus'; did you mean 'virt_to_bus'? [-Werror=implicit-function-declaration]

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Suggested-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/3com/Kconfig   | 2 +-
 drivers/net/ethernet/amd/Kconfig    | 4 ++--
 drivers/net/ethernet/cirrus/Kconfig | 1 +
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/3com/Kconfig b/drivers/net/ethernet/3com/Kconfig
index 5b7658bcf0209..5c3ef9fc8207e 100644
--- a/drivers/net/ethernet/3com/Kconfig
+++ b/drivers/net/ethernet/3com/Kconfig
@@ -32,7 +32,7 @@ config EL3
 
 config 3C515
 	tristate "3c515 ISA \"Fast EtherLink\""
-	depends on ISA && ISA_DMA_API
+	depends on ISA && ISA_DMA_API && !PPC32
 	---help---
 	  If you have a 3Com ISA EtherLink XL "Corkscrew" 3c515 Fast Ethernet
 	  network card, say Y here.
diff --git a/drivers/net/ethernet/amd/Kconfig b/drivers/net/ethernet/amd/Kconfig
index 0038709fd317d..ec59425fdbff2 100644
--- a/drivers/net/ethernet/amd/Kconfig
+++ b/drivers/net/ethernet/amd/Kconfig
@@ -44,7 +44,7 @@ config AMD8111_ETH
 
 config LANCE
 	tristate "AMD LANCE and PCnet (AT1500 and NE2100) support"
-	depends on ISA && ISA_DMA_API && !ARM
+	depends on ISA && ISA_DMA_API && !ARM && !PPC32
 	---help---
 	  If you have a network (Ethernet) card of this type, say Y here.
 	  Some LinkSys cards are of this type.
@@ -138,7 +138,7 @@ config PCMCIA_NMCLAN
 
 config NI65
 	tristate "NI6510 support"
-	depends on ISA && ISA_DMA_API && !ARM
+	depends on ISA && ISA_DMA_API && !ARM && !PPC32
 	---help---
 	  If you have a network (Ethernet) card of this type, say Y here.
 
diff --git a/drivers/net/ethernet/cirrus/Kconfig b/drivers/net/ethernet/cirrus/Kconfig
index 5ab912937aff2..ec0b545197e2d 100644
--- a/drivers/net/ethernet/cirrus/Kconfig
+++ b/drivers/net/ethernet/cirrus/Kconfig
@@ -19,6 +19,7 @@ if NET_VENDOR_CIRRUS
 config CS89x0
 	tristate "CS89x0 support"
 	depends on ISA || EISA || ARM
+	depends on !PPC32
 	---help---
 	  Support for CS89x0 chipset based Ethernet cards. If you have a
 	  network (Ethernet) card of this type, say Y and read the file

From 1314b416057b63b37e60798b54b1713eb21be42c Mon Sep 17 00:00:00 2001
From: Nicholas Mc Guire <hofrat@osadl.org>
Date: Mon, 9 Jul 2018 21:16:40 +0200
Subject: [PATCH 1721/1852] can: mpc5xxx_can: check of_iomap return before use

[ Upstream commit b5c1a23b17e563b656cc9bb76ce5323b997d90e8 ]

of_iomap() can return NULL so that return needs to be checked and NULL
treated as failure. While at it also take care of the missing
of_node_put() in the error path.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: commit afa17a500a36 ("net/can: add driver for mscan family & mpc52xx_mscan")
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/can/mscan/mpc5xxx_can.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c
index c7427bdd3a4bf..2949a381a94dc 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -86,6 +86,11 @@ static u32 mpc52xx_can_get_clock(struct platform_device *ofdev,
 		return 0;
 	}
 	cdm = of_iomap(np_cdm, 0);
+	if (!cdm) {
+		of_node_put(np_cdm);
+		dev_err(&ofdev->dev, "can't map clock node!\n");
+		return 0;
+	}
 
 	if (in_8(&cdm->ipb_clk_sel) & 0x1)
 		freq *= 2;

From f9feb5b45fca04a3f9c7a4bbffb2700ab79e9ab8 Mon Sep 17 00:00:00 2001
From: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Date: Fri, 13 Jul 2018 17:20:17 +0200
Subject: [PATCH 1722/1852] i2c: davinci: Avoid zero value of CLKH

[ Upstream commit cc8de9a68599b261244ea453b38678229f06ada7 ]

If CLKH is set to 0 I2C clock is not generated at all, so avoid this value
and stretch the clock in this case.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/i2c/busses/i2c-davinci.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index a8bdcb5292f5b..57f6eb1427b4e 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -234,12 +234,16 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)
 	/*
 	 * It's not always possible to have 1 to 2 ratio when d=7, so fall back
 	 * to minimal possible clkh in this case.
+	 *
+	 * Note:
+	 * CLKH is not allowed to be 0, in this case I2C clock is not generated
+	 * at all
 	 */
-	if (clk >= clkl + d) {
+	if (clk > clkl + d) {
 		clkh = clk - clkl - d;
 		clkl -= d;
 	} else {
-		clkh = 0;
+		clkh = 1;
 		clkl = clk - (d << 1);
 	}
 

From 61d07169ffdf90348117fd162d1ee4a9c6fa1380 Mon Sep 17 00:00:00 2001
From: Guenter Roeck <linux@roeck-us.net>
Date: Mon, 23 Jul 2018 14:39:33 -0700
Subject: [PATCH 1723/1852] media: staging: omap4iss: Include asm/cacheflush.h
 after generic includes

[ Upstream commit 0894da849f145af51bde88a6b84f95b9c9e0bc66 ]

Including asm/cacheflush.h first results in the following build error
when trying to build sparc32:allmodconfig, because 'struct page' has not
been declared, and the function declaration ends up creating a separate
(private) declaration of struct page (as a result of function arguments
being in the scope of the function declaration and definition, not in
global scope).

The C scoping rules do not just affect variable visibility, they also
affect type declaration visibility.

The end result is that when the actual call site is seen in
<linux/highmem.h>, the 'struct page' type in the caller is not the same
'struct page' that the function was declared with, resulting in:

  In file included from arch/sparc/include/asm/page.h:10:0,
                   ...
                   from drivers/staging/media/omap4iss/iss_video.c:15:
  include/linux/highmem.h: In function 'clear_user_highpage':
  include/linux/highmem.h:137:31: error:
	passing argument 1 of 'sparc_flush_page_to_ram' from incompatible
	pointer type

Include generic includes files first to fix the problem.

Fixes: fc96d58c10162 ("[media] v4l: omap4iss: Add support for OMAP4 camera interface - Video devices")
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
[ Added explanation of C scope rules - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/staging/media/omap4iss/iss_video.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/media/omap4iss/iss_video.c b/drivers/staging/media/omap4iss/iss_video.c
index 2a0158bb49742..5a78ef057635e 100644
--- a/drivers/staging/media/omap4iss/iss_video.c
+++ b/drivers/staging/media/omap4iss/iss_video.c
@@ -11,7 +11,6 @@
  * (at your option) any later version.
  */
 
-#include <asm/cacheflush.h>
 #include <linux/clk.h>
 #include <linux/mm.h>
 #include <linux/pagemap.h>
@@ -22,6 +21,8 @@
 #include <media/v4l2-dev.h>
 #include <media/v4l2-ioctl.h>
 
+#include <asm/cacheflush.h>
+
 #include "iss_video.h"
 #include "iss.h"
 

From f8c1cd77af6aa1c58be879864379bdec05c08a43 Mon Sep 17 00:00:00 2001
From: Sudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>
Date: Tue, 24 Jul 2018 02:43:52 -0700
Subject: [PATCH 1724/1852] bnx2x: Fix invalid memory access in rss hash config
 path.

[ Upstream commit ae2dcb28c24794a87e424a726a1cf1a61980f52d ]

Rx hash/filter table configuration uses rss_conf_obj to configure filters
in the hardware. This object is initialized only when the interface is
brought up.
This patch adds driver changes to configure rss params only when the device
is in opened state. In port disabled case, the config will be cached in the
driver structure which will be applied in the successive load path.

Please consider applying it to 'net' branch.

Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index d84efcd34fac3..c56b61dce2d15 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -3360,14 +3360,18 @@ static int bnx2x_set_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)
 			DP(BNX2X_MSG_ETHTOOL,
 			   "rss re-configured, UDP 4-tupple %s\n",
 			   udp_rss_requested ? "enabled" : "disabled");
-			return bnx2x_rss(bp, &bp->rss_conf_obj, false, true);
+			if (bp->state == BNX2X_STATE_OPEN)
+				return bnx2x_rss(bp, &bp->rss_conf_obj, false,
+						 true);
 		} else if ((info->flow_type == UDP_V6_FLOW) &&
 			   (bp->rss_conf_obj.udp_rss_v6 != udp_rss_requested)) {
 			bp->rss_conf_obj.udp_rss_v6 = udp_rss_requested;
 			DP(BNX2X_MSG_ETHTOOL,
 			   "rss re-configured, UDP 4-tupple %s\n",
 			   udp_rss_requested ? "enabled" : "disabled");
-			return bnx2x_rss(bp, &bp->rss_conf_obj, false, true);
+			if (bp->state == BNX2X_STATE_OPEN)
+				return bnx2x_rss(bp, &bp->rss_conf_obj, false,
+						 true);
 		}
 		return 0;
 
@@ -3481,7 +3485,10 @@ static int bnx2x_set_rxfh(struct net_device *dev, const u32 *indir,
 		bp->rss_conf_obj.ind_table[i] = indir[i] + bp->fp->cl_id;
 	}
 
-	return bnx2x_config_rss_eth(bp, false);
+	if (bp->state == BNX2X_STATE_OPEN)
+		return bnx2x_config_rss_eth(bp, false);
+
+	return 0;
 }
 
 /**

From 0de4f79b352d1dc7519da951a9d017cc0b01ba35 Mon Sep 17 00:00:00 2001
From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Date: Tue, 24 Jul 2018 10:09:53 +0530
Subject: [PATCH 1725/1852] net: axienet: Fix double deregister of mdio

[ Upstream commit 03bc7cab7d7218088412a75e141696a89059ab00 ]

If the registration fails then mdio_unregister is called.
However at unbind the unregister ia attempted again resulting
in the below crash

[   73.544038] kernel BUG at drivers/net/phy/mdio_bus.c:415!
[   73.549362] Internal error: Oops - BUG: 0 [#1] SMP
[   73.554127] Modules linked in:
[   73.557168] CPU: 0 PID: 2249 Comm: sh Not tainted 4.14.0 #183
[   73.562895] Hardware name: xlnx,zynqmp (DT)
[   73.567062] task: ffffffc879e41180 task.stack: ffffff800cbe0000
[   73.572973] PC is at mdiobus_unregister+0x84/0x88
[   73.577656] LR is at axienet_mdio_teardown+0x18/0x30
[   73.582601] pc : [<ffffff80085fa4cc>] lr : [<ffffff8008616858>]
pstate: 20000145
[   73.589981] sp : ffffff800cbe3c30
[   73.593277] x29: ffffff800cbe3c30 x28: ffffffc879e41180
[   73.598573] x27: ffffff8008a21000 x26: 0000000000000040
[   73.603868] x25: 0000000000000124 x24: ffffffc879efe920
[   73.609164] x23: 0000000000000060 x22: ffffffc879e02000
[   73.614459] x21: ffffffc879e02800 x20: ffffffc87b0b8870
[   73.619754] x19: ffffffc879e02800 x18: 000000000000025d
[   73.625050] x17: 0000007f9a719ad0 x16: ffffff8008195bd8
[   73.630345] x15: 0000007f9a6b3d00 x14: 0000000000000010
[   73.635640] x13: 74656e7265687465 x12: 0000000000000030
[   73.640935] x11: 0000000000000030 x10: 0101010101010101
[   73.646231] x9 : 241f394f42533300 x8 : ffffffc8799f6e98
[   73.651526] x7 : ffffffc8799f6f18 x6 : ffffffc87b0ba318
[   73.656822] x5 : ffffffc87b0ba498 x4 : 0000000000000000
[   73.662117] x3 : 0000000000000000 x2 : 0000000000000008
[   73.667412] x1 : 0000000000000004 x0 : ffffffc8799f4000
[   73.672708] Process sh (pid: 2249, stack limit = 0xffffff800cbe0000)

Fix the same by making the bus NULL on unregister.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
index 507bbb0355c23..f6108413adbab 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
@@ -218,6 +218,7 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
 	ret = of_mdiobus_register(bus, np1);
 	if (ret) {
 		mdiobus_free(bus);
+		lp->mii_bus = NULL;
 		return ret;
 	}
 	return 0;

From 2c24517e111a0e6141e255ecbcb1be6e07400cbc Mon Sep 17 00:00:00 2001
From: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Date: Wed, 25 Jul 2018 14:31:20 +0100
Subject: [PATCH 1726/1852] fscache: Allow cancelled operations to be enqueued

[ Upstream commit d0eb06afe712b7b103b6361f40a9a0c638524669 ]

Alter the state-check assertion in fscache_enqueue_operation() to allow
cancelled operations to be given processing time so they can be cleaned up.

Also fix a debugging statement that was requiring such operations to have
an object assigned.

Fixes: 9ae326a69004 ("CacheFiles: A cache that backs onto a mounted filesystem")
Reported-by: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fscache/operation.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/fs/fscache/operation.c b/fs/fscache/operation.c
index de67745e1cd7d..77946d6f617d0 100644
--- a/fs/fscache/operation.c
+++ b/fs/fscache/operation.c
@@ -66,7 +66,8 @@ void fscache_enqueue_operation(struct fscache_operation *op)
 	ASSERT(op->processor != NULL);
 	ASSERT(fscache_object_is_available(op->object));
 	ASSERTCMP(atomic_read(&op->usage), >, 0);
-	ASSERTCMP(op->state, ==, FSCACHE_OP_ST_IN_PROGRESS);
+	ASSERTIFCMP(op->state != FSCACHE_OP_ST_IN_PROGRESS,
+		    op->state, ==,  FSCACHE_OP_ST_CANCELLED);
 
 	fscache_stat(&fscache_n_op_enqueue);
 	switch (op->flags & FSCACHE_OP_TYPE) {
@@ -481,7 +482,8 @@ void fscache_put_operation(struct fscache_operation *op)
 	struct fscache_cache *cache;
 
 	_enter("{OBJ%x OP%x,%d}",
-	       op->object->debug_id, op->debug_id, atomic_read(&op->usage));
+	       op->object ? op->object->debug_id : 0,
+	       op->debug_id, atomic_read(&op->usage));
 
 	ASSERTCMP(atomic_read(&op->usage), >, 0);
 

From dd390e853a201f76098db213081bbd95a5a52895 Mon Sep 17 00:00:00 2001
From: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Date: Tue, 18 Jul 2017 16:25:49 -0700
Subject: [PATCH 1727/1852] cachefiles: Fix refcounting bug in backing-file
 read monitoring

[ Upstream commit 934140ab028713a61de8bca58c05332416d037d1 ]

cachefiles_read_waiter() has the right to access a 'monitor' object by
virtue of being called under the waitqueue lock for one of the pages in its
purview.  However, it has no ref on that monitor object or on the
associated operation.

What it is allowed to do is to move the monitor object to the operation's
to_do list, but once it drops the work_lock, it's actually no longer
permitted to access that object.  However, it is trying to enqueue the
retrieval operation for processing - but it can only do this via a pointer
in the monitor object, something it shouldn't be doing.

If it doesn't enqueue the operation, the operation may not get processed.
If the order is flipped so that the enqueue is first, then it's possible
for the work processor to look at the to_do list before the monitor is
enqueued upon it.

Fix this by getting a ref on the operation so that we can trust that it
will still be there once we've added the monitor to the to_do list and
dropped the work_lock.  The op can then be enqueued after the lock is
dropped.

The bug can manifest in one of a couple of ways.  The first manifestation
looks like:

 FS-Cache:
 FS-Cache: Assertion failed
 FS-Cache: 6 == 5 is false
 ------------[ cut here ]------------
 kernel BUG at fs/fscache/operation.c:494!
 RIP: 0010:fscache_put_operation+0x1e3/0x1f0
 ...
 fscache_op_work_func+0x26/0x50
 process_one_work+0x131/0x290
 worker_thread+0x45/0x360
 kthread+0xf8/0x130
 ? create_worker+0x190/0x190
 ? kthread_cancel_work_sync+0x10/0x10
 ret_from_fork+0x1f/0x30

This is due to the operation being in the DEAD state (6) rather than
INITIALISED, COMPLETE or CANCELLED (5) because it's already passed through
fscache_put_operation().

The bug can also manifest like the following:

 kernel BUG at fs/fscache/operation.c:69!
 ...
    [exception RIP: fscache_enqueue_operation+246]
 ...
 #7 [ffff883fff083c10] fscache_enqueue_operation at ffffffffa0b793c6
 #8 [ffff883fff083c28] cachefiles_read_waiter at ffffffffa0b15a48
 #9 [ffff883fff083c48] __wake_up_common at ffffffff810af028

I'm not entirely certain as to which is line 69 in Lei's kernel, so I'm not
entirely clear which assertion failed.

Fixes: 9ae326a69004 ("CacheFiles: A cache that backs onto a mounted filesystem")
Reported-by: Lei Xue <carmark.dlut@gmail.com>
Reported-by: Vegard Nossum <vegard.nossum@gmail.com>
Reported-by: Anthony DeRobertis <aderobertis@metrics.net>
Reported-by: NeilBrown <neilb@suse.com>
Reported-by: Daniel Axtens <dja@axtens.net>
Reported-by: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Reviewed-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cachefiles/rdwr.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/fs/cachefiles/rdwr.c b/fs/cachefiles/rdwr.c
index c0f3da3926a0c..5b68cf5268872 100644
--- a/fs/cachefiles/rdwr.c
+++ b/fs/cachefiles/rdwr.c
@@ -27,6 +27,7 @@ static int cachefiles_read_waiter(wait_queue_t *wait, unsigned mode,
 	struct cachefiles_one_read *monitor =
 		container_of(wait, struct cachefiles_one_read, monitor);
 	struct cachefiles_object *object;
+	struct fscache_retrieval *op = monitor->op;
 	struct wait_bit_key *key = _key;
 	struct page *page = wait->private;
 
@@ -51,16 +52,22 @@ static int cachefiles_read_waiter(wait_queue_t *wait, unsigned mode,
 	list_del(&wait->task_list);
 
 	/* move onto the action list and queue for FS-Cache thread pool */
-	ASSERT(monitor->op);
+	ASSERT(op);
 
-	object = container_of(monitor->op->op.object,
-			      struct cachefiles_object, fscache);
+	/* We need to temporarily bump the usage count as we don't own a ref
+	 * here otherwise cachefiles_read_copier() may free the op between the
+	 * monitor being enqueued on the op->to_do list and the op getting
+	 * enqueued on the work queue.
+	 */
+	fscache_get_retrieval(op);
 
+	object = container_of(op->op.object, struct cachefiles_object, fscache);
 	spin_lock(&object->work_lock);
-	list_add_tail(&monitor->op_link, &monitor->op->to_do);
+	list_add_tail(&monitor->op_link, &op->to_do);
 	spin_unlock(&object->work_lock);
 
-	fscache_enqueue_retrieval(monitor->op);
+	fscache_enqueue_retrieval(op);
+	fscache_put_retrieval(op);
 	return 0;
 }
 

From c392c525b5e2b588550ff2b45acaacc4f9854bc8 Mon Sep 17 00:00:00 2001
From: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Date: Thu, 21 Jun 2018 13:25:53 -0700
Subject: [PATCH 1728/1852] cachefiles: Wait rather than BUG'ing on "Unexpected
 object collision"

[ Upstream commit c2412ac45a8f8f1cd582723c1a139608694d410d ]

If we meet a conflicting object that is marked FSCACHE_OBJECT_IS_LIVE in
the active object tree, we have been emitting a BUG after logging
information about it and the new object.

Instead, we should wait for the CACHEFILES_OBJECT_ACTIVE flag to be cleared
on the old object (or return an error).  The ACTIVE flag should be cleared
after it has been removed from the active object tree.  A timeout of 60s is
used in the wait, so we shouldn't be able to get stuck there.

Fixes: 9ae326a69004 ("CacheFiles: A cache that backs onto a mounted filesystem")
Signed-off-by: Kiran Kumar Modukuri <kiran.modukuri@gmail.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cachefiles/namei.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/fs/cachefiles/namei.c b/fs/cachefiles/namei.c
index c4b893453e0ee..c43b4b08546b4 100644
--- a/fs/cachefiles/namei.c
+++ b/fs/cachefiles/namei.c
@@ -194,7 +194,6 @@ static int cachefiles_mark_object_active(struct cachefiles_cache *cache,
 		pr_err("\n");
 		pr_err("Error: Unexpected object collision\n");
 		cachefiles_printk_object(object, xobject);
-		BUG();
 	}
 	atomic_inc(&xobject->usage);
 	write_unlock(&cache->active_lock);

From 01c9b6ffce5055bb03bb2316cafa1ebc368d4c56 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 14 Jul 2018 01:28:44 +0900
Subject: [PATCH 1729/1852] selftests/ftrace: Add snapshot and tracing_on test
 case

[ Upstream commit 82f4f3e69c5c29bce940dd87a2c0f16c51d48d17 ]

Add a testcase for checking snapshot and tracing_on
relationship. This ensures that the snapshotting doesn't
affect current tracing on/off settings.

Link: http://lkml.kernel.org/r/153149932412.11274.15289227592627901488.stgit@devbox

Cc: Tom Zanussi <tom.zanussi@linux.intel.com>
Cc: Hiraku Toyooka <hiraku.toyooka@cybertrust.co.jp>
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Shuah Khan <shuah@kernel.org>
Cc: linux-kselftest@vger.kernel.org
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 .../ftrace/test.d/00basic/snapshot.tc         | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 tools/testing/selftests/ftrace/test.d/00basic/snapshot.tc

diff --git a/tools/testing/selftests/ftrace/test.d/00basic/snapshot.tc b/tools/testing/selftests/ftrace/test.d/00basic/snapshot.tc
new file mode 100644
index 0000000000000..3b1f45e13a2e7
--- /dev/null
+++ b/tools/testing/selftests/ftrace/test.d/00basic/snapshot.tc
@@ -0,0 +1,28 @@
+#!/bin/sh
+# description: Snapshot and tracing setting
+# flags: instance
+
+[ ! -f snapshot ] && exit_unsupported
+
+echo "Set tracing off"
+echo 0 > tracing_on
+
+echo "Allocate and take a snapshot"
+echo 1 > snapshot
+
+# Since trace buffer is empty, snapshot is also empty, but allocated
+grep -q "Snapshot is allocated" snapshot
+
+echo "Ensure keep tracing off"
+test `cat tracing_on` -eq 0
+
+echo "Set tracing on"
+echo 1 > tracing_on
+
+echo "Take a snapshot again"
+echo 1 > snapshot
+
+echo "Ensure keep tracing on"
+test `cat tracing_on` -eq 1
+
+exit 0

From ce8c71b56ec76fedbac73714e91b4525cc8485ad Mon Sep 17 00:00:00 2001
From: Li Wang <liwang@redhat.com>
Date: Thu, 26 Jul 2018 16:37:42 -0700
Subject: [PATCH 1730/1852] zswap: re-check zswap_is_full() after do
 zswap_shrink()

[ Upstream commit 16e536ef47f567289a5699abee9ff7bb304bc12d ]

/sys/../zswap/stored_pages keeps rising in a zswap test with
"zswap.max_pool_percent=0" parameter.  But it should not compress or
store pages any more since there is no space in the compressed pool.

Reproduce steps:
  1. Boot kernel with "zswap.enabled=1"
  2. Set the max_pool_percent to 0
      # echo 0 > /sys/module/zswap/parameters/max_pool_percent
  3. Do memory stress test to see if some pages have been compressed
      # stress --vm 1 --vm-bytes $mem_available"M" --timeout 60s
  4. Watching the 'stored_pages' number increasing or not

The root cause is:

  When zswap_max_pool_percent is set to 0 via kernel parameter,
  zswap_is_full() will always return true due to zswap_shrink().  But if
  the shinking is able to reclain a page successfully the code then
  proceeds to compressing/storing another page, so the value of
  stored_pages will keep changing.

To solve the issue, this patch adds a zswap_is_full() check again after
  zswap_shrink() to make sure it's now under the max_pool_percent, and to
  not compress/store if we reached the limit.

Link: http://lkml.kernel.org/r/20180530103936.17812-1-liwang@redhat.com
Signed-off-by: Li Wang <liwang@redhat.com>
Acked-by: Dan Streetman <ddstreet@ieee.org>
Cc: Seth Jennings <sjenning@redhat.com>
Cc: Huang Ying <huang.ying.caritas@gmail.com>
Cc: Yu Zhao <yuzhao@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/zswap.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/mm/zswap.c b/mm/zswap.c
index 568015e2fe7a1..87a8491909ee0 100644
--- a/mm/zswap.c
+++ b/mm/zswap.c
@@ -1018,6 +1018,15 @@ static int zswap_frontswap_store(unsigned type, pgoff_t offset,
 			ret = -ENOMEM;
 			goto reject;
 		}
+
+		/* A second zswap_is_full() check after
+		 * zswap_shrink() to make sure it's now
+		 * under the max_pool_percent
+		 */
+		if (zswap_is_full()) {
+			ret = -ENOMEM;
+			goto reject;
+		}
 	}
 
 	/* allocate entry */

From cc5994f6453a4c4184848cd2ef11ea832d5a3b1c Mon Sep 17 00:00:00 2001
From: Calvin Walton <calvin.walton@kepstin.ca>
Date: Fri, 27 Jul 2018 07:50:53 -0400
Subject: [PATCH 1731/1852] tools/power turbostat: Read extended processor
 family from CPUID

[ Upstream commit 5aa3d1a20a233d4a5f1ec3d62da3f19d9afea682 ]

This fixes the reported family on modern AMD processors (e.g. Ryzen,
which is family 0x17). Previously these processors all showed up as
family 0xf.

See the document
https://support.amd.com/TechDocs/56255_OSRR.pdf
section CPUID_Fn00000001_EAX for how to calculate the family
from the BaseFamily and ExtFamily values.

This matches the code in arch/x86/lib/cpu.c

Signed-off-by: Calvin Walton <calvin.walton@kepstin.ca>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 tools/power/x86/turbostat/turbostat.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 36e0d255d1b6e..33c79e415075b 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -2691,7 +2691,9 @@ void process_cpuid()
 	family = (fms >> 8) & 0xf;
 	model = (fms >> 4) & 0xf;
 	stepping = fms & 0xf;
-	if (family == 6 || family == 0xf)
+	if (family == 0xf)
+		family += (fms >> 20) & 0xff;
+	if (family >= 6)
 		model += ((fms >> 16) & 0xf) << 4;
 
 	if (debug)

From 1fe17e0531199f0abe2393f1647b2e1ca76394a1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 27 Jul 2018 13:13:39 +0200
Subject: [PATCH 1732/1852] Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync
 for PCIe erratum"
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

[ Upstream commit d5ea019f8a381f88545bb26993b62ec24a2796b7 ]

This reverts commit 2a027b47dba6 ("MIPS: BCM47XX: Enable 74K Core
ExternalSync for PCIe erratum").

Enabling ExternalSync caused a regression for BCM4718A1 (used e.g. in
Netgear E3000 and ASUS RT-N16): it simply hangs during PCIe
initialization. It's likely that BCM4717A1 is also affected.

I didn't notice that earlier as the only BCM47XX devices with PCIe I
own are:
1) BCM4706 with 2 x 14e4:4331
2) BCM4706 with 14e4:4360 and 14e4:4331
it appears that BCM4706 is unaffected.

While BCM5300X-ES300-RDS.pdf seems to document that erratum and its
workarounds (according to quotes provided by Tokunori) it seems not even
Broadcom follows them.

According to the provided info Broadcom should define CONF7_ES in their
SDK's mipsinc.h and implement workaround in the si_mips_init(). Checking
both didn't reveal such code. It *could* mean Broadcom also had some
problems with the given workaround.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Michael Marley <michael@michaelmarley.com>
Patchwork: https://patchwork.linux-mips.org/patch/20032/
URL: https://bugs.openwrt.org/index.php?do=details&task_id=1688
Cc: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/bcm47xx/setup.c        | 6 ------
 arch/mips/include/asm/mipsregs.h | 3 ---
 2 files changed, 9 deletions(-)

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 4ca33175ec059..6d38948f0f1ed 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -249,12 +249,6 @@ static int __init bcm47xx_cpu_fixes(void)
 		 */
 		if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
 			cpu_wait = NULL;
-
-		/*
-		 * BCM47XX Erratum "R10: PCIe Transactions Periodically Fail"
-		 * Enable ExternalSync for sync instruction to take effect
-		 */
-		set_c0_config7(MIPS_CONF7_ES);
 		break;
 #endif
 	}
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 202159557e4b4..c785da1d86607 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -606,8 +606,6 @@
 #define MIPS_CONF7_WII		(_ULCAST_(1) << 31)
 
 #define MIPS_CONF7_RPS		(_ULCAST_(1) << 2)
-/* ExternalSync */
-#define MIPS_CONF7_ES		(_ULCAST_(1) << 8)
 
 #define MIPS_CONF7_IAR		(_ULCAST_(1) << 10)
 #define MIPS_CONF7_AR		(_ULCAST_(1) << 16)
@@ -2015,7 +2013,6 @@ __BUILD_SET_C0(status)
 __BUILD_SET_C0(cause)
 __BUILD_SET_C0(config)
 __BUILD_SET_C0(config5)
-__BUILD_SET_C0(config7)
 __BUILD_SET_C0(intcontrol)
 __BUILD_SET_C0(intctl)
 __BUILD_SET_C0(srsmap)

From a2009170ae1a2940b2dc45e53286ae0e16496871 Mon Sep 17 00:00:00 2001
From: Govindarajulu Varadarajan <gvaradar@cisco.com>
Date: Fri, 27 Jul 2018 11:19:29 -0700
Subject: [PATCH 1733/1852] enic: handle mtu change for vf properly

[ Upstream commit ab123fe071c9aa9680ecd62eb080eb26cff4892c ]

When driver gets notification for mtu change, driver does not handle it for
all RQs. It handles only RQ[0].

Fix is to use enic_change_mtu() interface to change mtu for vf.

Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/ethernet/cisco/enic/enic_main.c | 78 +++++++--------------
 1 file changed, 27 insertions(+), 51 deletions(-)

diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index 8390597aecb84..b20bce2c7da11 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -1842,10 +1842,32 @@ static int enic_stop(struct net_device *netdev)
 	return 0;
 }
 
+static int _enic_change_mtu(struct net_device *netdev, int new_mtu)
+{
+	bool running = netif_running(netdev);
+	int err = 0;
+
+	ASSERT_RTNL();
+	if (running) {
+		err = enic_stop(netdev);
+		if (err)
+			return err;
+	}
+
+	netdev->mtu = new_mtu;
+
+	if (running) {
+		err = enic_open(netdev);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 static int enic_change_mtu(struct net_device *netdev, int new_mtu)
 {
 	struct enic *enic = netdev_priv(netdev);
-	int running = netif_running(netdev);
 
 	if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
 		return -EINVAL;
@@ -1853,20 +1875,12 @@ static int enic_change_mtu(struct net_device *netdev, int new_mtu)
 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
 		return -EOPNOTSUPP;
 
-	if (running)
-		enic_stop(netdev);
-
-	netdev->mtu = new_mtu;
-
 	if (netdev->mtu > enic->port_mtu)
 		netdev_warn(netdev,
-			"interface MTU (%d) set higher than port MTU (%d)\n",
-			netdev->mtu, enic->port_mtu);
+			    "interface MTU (%d) set higher than port MTU (%d)\n",
+			    netdev->mtu, enic->port_mtu);
 
-	if (running)
-		enic_open(netdev);
-
-	return 0;
+	return _enic_change_mtu(netdev, new_mtu);
 }
 
 static void enic_change_mtu_work(struct work_struct *work)
@@ -1874,47 +1888,9 @@ static void enic_change_mtu_work(struct work_struct *work)
 	struct enic *enic = container_of(work, struct enic, change_mtu_work);
 	struct net_device *netdev = enic->netdev;
 	int new_mtu = vnic_dev_mtu(enic->vdev);
-	int err;
-	unsigned int i;
-
-	new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
 
 	rtnl_lock();
-
-	/* Stop RQ */
-	del_timer_sync(&enic->notify_timer);
-
-	for (i = 0; i < enic->rq_count; i++)
-		napi_disable(&enic->napi[i]);
-
-	vnic_intr_mask(&enic->intr[0]);
-	enic_synchronize_irqs(enic);
-	err = vnic_rq_disable(&enic->rq[0]);
-	if (err) {
-		rtnl_unlock();
-		netdev_err(netdev, "Unable to disable RQ.\n");
-		return;
-	}
-	vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
-	vnic_cq_clean(&enic->cq[0]);
-	vnic_intr_clean(&enic->intr[0]);
-
-	/* Fill RQ with new_mtu-sized buffers */
-	netdev->mtu = new_mtu;
-	vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
-	/* Need at least one buffer on ring to get going */
-	if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
-		rtnl_unlock();
-		netdev_err(netdev, "Unable to alloc receive buffers.\n");
-		return;
-	}
-
-	/* Start RQ */
-	vnic_rq_enable(&enic->rq[0]);
-	napi_enable(&enic->napi[0]);
-	vnic_intr_unmask(&enic->intr[0]);
-	enic_notify_timer_start(enic);
-
+	(void)_enic_change_mtu(netdev, new_mtu);
 	rtnl_unlock();
 
 	netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);

From bf8bfb2ad668294b92eef0cffad78e4ed7b4b01e Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Thu, 26 Jul 2018 20:16:35 -0700
Subject: [PATCH 1734/1852] arc: fix build errors in arc/include/asm/delay.h

[ Upstream commit 2423665ec53f2a29191b35382075e9834288a975 ]

Fix build errors in arch/arc/'s delay.h:
- add "extern unsigned long loops_per_jiffy;"
- add <asm-generic/types.h> for "u64"

In file included from ../drivers/infiniband/hw/cxgb3/cxio_hal.c:32:
../arch/arc/include/asm/delay.h: In function '__udelay':
../arch/arc/include/asm/delay.h:61:12: error: 'u64' undeclared (first use in this function)
  loops = ((u64) usecs * 4295 * HZ * loops_per_jiffy) >> 32;
            ^~~

In file included from ../drivers/infiniband/hw/cxgb3/cxio_hal.c:32:
../arch/arc/include/asm/delay.h: In function '__udelay':
../arch/arc/include/asm/delay.h:63:37: error: 'loops_per_jiffy' undeclared (first use in this function)
  loops = ((u64) usecs * 4295 * HZ * loops_per_jiffy) >> 32;
                                     ^~~~~~~~~~~~~~~

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: linux-snps-arc@lists.infradead.org
Cc: Elad Kanfi <eladkan@mellanox.com>
Cc: Leon Romanovsky <leonro@mellanox.com>
Cc: Ofer Levi <oferle@mellanox.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/include/asm/delay.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arc/include/asm/delay.h b/arch/arc/include/asm/delay.h
index d5da2115d78a6..03d6bb0f4e13a 100644
--- a/arch/arc/include/asm/delay.h
+++ b/arch/arc/include/asm/delay.h
@@ -17,8 +17,11 @@
 #ifndef __ASM_ARC_UDELAY_H
 #define __ASM_ARC_UDELAY_H
 
+#include <asm-generic/types.h>
 #include <asm/param.h>		/* HZ */
 
+extern unsigned long loops_per_jiffy;
+
 static inline void __delay(unsigned long loops)
 {
 	__asm__ __volatile__(

From bb8f0401800aea3ece6cb4e2c4b86ff573302949 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Thu, 26 Jul 2018 20:16:35 -0700
Subject: [PATCH 1735/1852] arc: fix type warnings in arc/mm/cache.c

[ Upstream commit ec837d620c750c0d4996a907c8c4f7febe1bbeee ]

Fix type warnings in arch/arc/mm/cache.c.

../arch/arc/mm/cache.c: In function 'flush_anon_page':
../arch/arc/mm/cache.c:1062:55: warning: passing argument 2 of '__flush_dcache_page' makes integer from pointer without a cast [-Wint-conversion]
  __flush_dcache_page((phys_addr_t)page_address(page), page_address(page));
                                                       ^~~~~~~~~~~~~~~~~~
../arch/arc/mm/cache.c:1013:59: note: expected 'long unsigned int' but argument is of type 'void *'
 void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr)
                                             ~~~~~~~~~~~~~~^~~~~

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: linux-snps-arc@lists.infradead.org
Cc: Elad Kanfi <eladkan@mellanox.com>
Cc: Leon Romanovsky <leonro@mellanox.com>
Cc: Ofer Levi <oferle@mellanox.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arc/mm/cache.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index 9a84cbdd44b01..017fb440bba4b 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -821,7 +821,7 @@ void flush_cache_mm(struct mm_struct *mm)
 void flush_cache_page(struct vm_area_struct *vma, unsigned long u_vaddr,
 		      unsigned long pfn)
 {
-	unsigned int paddr = pfn << PAGE_SHIFT;
+	phys_addr_t paddr = pfn << PAGE_SHIFT;
 
 	u_vaddr &= PAGE_MASK;
 
@@ -841,8 +841,9 @@ void flush_anon_page(struct vm_area_struct *vma, struct page *page,
 		     unsigned long u_vaddr)
 {
 	/* TBD: do we really need to clear the kernel mapping */
-	__flush_dcache_page(page_address(page), u_vaddr);
-	__flush_dcache_page(page_address(page), page_address(page));
+	__flush_dcache_page((phys_addr_t)page_address(page), u_vaddr);
+	__flush_dcache_page((phys_addr_t)page_address(page),
+			    (phys_addr_t)page_address(page));
 
 }
 

From b3114fb19c24d9872ffff8ba1f33832f8c837f50 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.king@canonical.com>
Date: Wed, 1 Aug 2018 18:22:41 +0100
Subject: [PATCH 1736/1852] drivers: net: lmc: fix case value for target abort
 error

[ Upstream commit afb41bb039656f0cecb54eeb8b2e2088201295f5 ]

Current value for a target abort error is 0x010, however, this value
should in fact be 0x002.  As it stands, the range of error is 0..7 so
it is currently never being detected.  This bug has been in the driver
since the early 2.6.12 days (or before).

Detected by CoverityScan, CID#744290 ("Logically dead code")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/net/wan/lmc/lmc_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c
index 317bc79cc8b9b..c178e12183474 100644
--- a/drivers/net/wan/lmc/lmc_main.c
+++ b/drivers/net/wan/lmc/lmc_main.c
@@ -1385,7 +1385,7 @@ static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
             case 0x001:
                 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
                 break;
-            case 0x010:
+            case 0x002:
                 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
                 break;
             default:

From 861535bc9e838fa4daea2156e93008a859273eca Mon Sep 17 00:00:00 2001
From: Johannes Thumshirn <jthumshirn@suse.de>
Date: Tue, 31 Jul 2018 15:46:02 +0200
Subject: [PATCH 1737/1852] scsi: fcoe: drop frames in ELS LOGO error path

[ Upstream commit 63d0e3dffda311e77b9a8c500d59084e960a824a ]

Drop the frames in the ELS LOGO error path instead of just returning an
error.

This fixes the following kmemleak report:
unreferenced object 0xffff880064cb1000 (size 424):
  comm "kworker/0:2", pid 24, jiffies 4294904293 (age 68.504s)
  hex dump (first 32 bytes):
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [<(____ptrval____)>] _fc_frame_alloc+0x2c/0x180 [libfc]
    [<(____ptrval____)>] fc_lport_enter_logo+0x106/0x360 [libfc]
    [<(____ptrval____)>] fc_fabric_logoff+0x8c/0xc0 [libfc]
    [<(____ptrval____)>] fcoe_if_destroy+0x79/0x3b0 [fcoe]
    [<(____ptrval____)>] fcoe_destroy_work+0xd2/0x170 [fcoe]
    [<(____ptrval____)>] process_one_work+0x7ff/0x1420
    [<(____ptrval____)>] worker_thread+0x87/0xef0
    [<(____ptrval____)>] kthread+0x2db/0x390
    [<(____ptrval____)>] ret_from_fork+0x35/0x40
    [<(____ptrval____)>] 0xffffffffffffffff

which can be triggered by issuing
echo eth0 > /sys/bus/fcoe/ctlr_destroy

Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/fcoe/fcoe_ctlr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c
index 34a1b1f333b4c..d5184aa1ace4e 100644
--- a/drivers/scsi/fcoe/fcoe_ctlr.c
+++ b/drivers/scsi/fcoe/fcoe_ctlr.c
@@ -752,9 +752,9 @@ int fcoe_ctlr_els_send(struct fcoe_ctlr *fip, struct fc_lport *lport,
 	case ELS_LOGO:
 		if (fip->mode == FIP_MODE_VN2VN) {
 			if (fip->state != FIP_ST_VNMP_UP)
-				return -EINVAL;
+				goto drop;
 			if (ntoh24(fh->fh_d_id) == FC_FID_FLOGI)
-				return -EINVAL;
+				goto drop;
 		} else {
 			if (fip->state != FIP_ST_ENABLED)
 				return 0;

From d409f0d61e745b969f1cd0610f17f862a4d1c7eb Mon Sep 17 00:00:00 2001
From: Jim Gill <jgill@vmware.com>
Date: Thu, 2 Aug 2018 14:13:30 -0700
Subject: [PATCH 1738/1852] scsi: vmw_pvscsi: Return DID_RESET for status
 SAM_STAT_COMMAND_TERMINATED

[ Upstream commit e95153b64d03c2b6e8d62e51bdcc33fcad6e0856 ]

Commands that are reset are returned with status
SAM_STAT_COMMAND_TERMINATED. PVSCSI currently returns DID_OK |
SAM_STAT_COMMAND_TERMINATED which fails the command. Instead, set hostbyte
to DID_RESET to allow upper layers to retry.

Tested by copying a large file between two pvscsi disks on same adapter
while performing a bus reset at 1-second intervals. Before fix, commands
sometimes fail with DID_OK. After fix, commands observed to fail with
DID_RESET.

Signed-off-by: Jim Gill <jgill@vmware.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/scsi/vmw_pvscsi.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/vmw_pvscsi.c b/drivers/scsi/vmw_pvscsi.c
index 0f133c1817de3..0de2f9069e237 100644
--- a/drivers/scsi/vmw_pvscsi.c
+++ b/drivers/scsi/vmw_pvscsi.c
@@ -545,9 +545,14 @@ static void pvscsi_complete_request(struct pvscsi_adapter *adapter,
 	    (btstat == BTSTAT_SUCCESS ||
 	     btstat == BTSTAT_LINKED_COMMAND_COMPLETED ||
 	     btstat == BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG)) {
-		cmd->result = (DID_OK << 16) | sdstat;
-		if (sdstat == SAM_STAT_CHECK_CONDITION && cmd->sense_buffer)
-			cmd->result |= (DRIVER_SENSE << 24);
+		if (sdstat == SAM_STAT_COMMAND_TERMINATED) {
+			cmd->result = (DID_RESET << 16);
+		} else {
+			cmd->result = (DID_OK << 16) | sdstat;
+			if (sdstat == SAM_STAT_CHECK_CONDITION &&
+			    cmd->sense_buffer)
+				cmd->result |= (DRIVER_SENSE << 24);
+		}
 	} else
 		switch (btstat) {
 		case BTSTAT_SUCCESS:

From e07c55ffe4243b956d724b2e08b5601043433266 Mon Sep 17 00:00:00 2001
From: "jie@chenjie6@huwei.com" <jie@chenjie6@huwei.com>
Date: Fri, 10 Aug 2018 17:23:06 -0700
Subject: [PATCH 1739/1852] mm/memory.c: check return value of ioremap_prot

[ Upstream commit 24eee1e4c47977bdfb71d6f15f6011e7b6188d04 ]

ioremap_prot() can return NULL which could lead to an oops.

Link: http://lkml.kernel.org/r/1533195441-58594-1-git-send-email-chenjie6@huawei.com
Signed-off-by: chen jie <chenjie6@huawei.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Li Zefan <lizefan@huawei.com>
Cc: chenjie <chenjie6@huawei.com>
Cc: Yang Shi <shy828301@gmail.com>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 mm/memory.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/mm/memory.c b/mm/memory.c
index d5bb1465d30c8..42db644f5ec4d 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -3701,6 +3701,9 @@ int generic_access_phys(struct vm_area_struct *vma, unsigned long addr,
 		return -EINVAL;
 
 	maddr = ioremap_prot(phys_addr, PAGE_ALIGN(len + offset), prot);
+	if (!maddr)
+		return -ENOMEM;
+
 	if (write)
 		memcpy_toio(maddr + offset, buf, len);
 	else

From 95128b692c1a042c00484a0ebdbf3884bc0b5249 Mon Sep 17 00:00:00 2001
From: Steve French <stfrench@microsoft.com>
Date: Thu, 28 Jun 2018 18:46:40 -0500
Subject: [PATCH 1740/1852] cifs: add missing debug entries for kconfig options

commit 950132afd59385caf6e2b84e5235d069fa10681d upstream.

/proc/fs/cifs/DebugData displays the features (Kconfig options)
used to build cifs.ko but it was missing some, and needed comma
separator.  These can be useful in debugging certain problems
so we know which optional features were enabled in the user's build.
Also clarify them, by making them more closely match the
corresponding CONFIG_CIFS_* parm.

Old format:
Features: dfs fscache posix spnego xattr acl

New format:
Features: DFS,FSCACHE,SMB_DIRECT,STATS,DEBUG2,ALLOW_INSECURE_LEGACY,CIFS_POSIX,UPCALL(SPNEGO),XATTR,ACL

Signed-off-by: Steve French <stfrench@microsoft.com>
Reviewed-by: Ronnie Sahlberg <lsahlber@redhat.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
Reviewed-by: Paulo Alcantara <palcantara@suse.de>
CC: Stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/cifs_debug.c | 30 +++++++++++++++++++++++-------
 1 file changed, 23 insertions(+), 7 deletions(-)

diff --git a/fs/cifs/cifs_debug.c b/fs/cifs/cifs_debug.c
index 0a3544fb50f92..bcbe42fb7e927 100644
--- a/fs/cifs/cifs_debug.c
+++ b/fs/cifs/cifs_debug.c
@@ -123,25 +123,41 @@ static int cifs_debug_data_proc_show(struct seq_file *m, void *v)
 	seq_printf(m, "CIFS Version %s\n", CIFS_VERSION);
 	seq_printf(m, "Features:");
 #ifdef CONFIG_CIFS_DFS_UPCALL
-	seq_printf(m, " dfs");
+	seq_printf(m, " DFS");
 #endif
 #ifdef CONFIG_CIFS_FSCACHE
-	seq_printf(m, " fscache");
+	seq_printf(m, ",FSCACHE");
+#endif
+#ifdef CONFIG_CIFS_SMB_DIRECT
+	seq_printf(m, ",SMB_DIRECT");
+#endif
+#ifdef CONFIG_CIFS_STATS2
+	seq_printf(m, ",STATS2");
+#elif defined(CONFIG_CIFS_STATS)
+	seq_printf(m, ",STATS");
+#endif
+#ifdef CONFIG_CIFS_DEBUG2
+	seq_printf(m, ",DEBUG2");
+#elif defined(CONFIG_CIFS_DEBUG)
+	seq_printf(m, ",DEBUG");
+#endif
+#ifdef CONFIG_CIFS_ALLOW_INSECURE_LEGACY
+	seq_printf(m, ",ALLOW_INSECURE_LEGACY");
 #endif
 #ifdef CONFIG_CIFS_WEAK_PW_HASH
-	seq_printf(m, " lanman");
+	seq_printf(m, ",WEAK_PW_HASH");
 #endif
 #ifdef CONFIG_CIFS_POSIX
-	seq_printf(m, " posix");
+	seq_printf(m, ",CIFS_POSIX");
 #endif
 #ifdef CONFIG_CIFS_UPCALL
-	seq_printf(m, " spnego");
+	seq_printf(m, ",UPCALL(SPNEGO)");
 #endif
 #ifdef CONFIG_CIFS_XATTR
-	seq_printf(m, " xattr");
+	seq_printf(m, ",XATTR");
 #endif
 #ifdef CONFIG_CIFS_ACL
-	seq_printf(m, " acl");
+	seq_printf(m, ",ACL");
 #endif
 	seq_putc(m, '\n');
 	seq_printf(m, "Active VFS Requests: %d\n", GlobalTotalActiveXid);

From 29ff92dac49f4e415b104d3d013680792f381835 Mon Sep 17 00:00:00 2001
From: Nicholas Mc Guire <hofrat@osadl.org>
Date: Thu, 23 Aug 2018 12:24:02 +0200
Subject: [PATCH 1741/1852] cifs: check kmalloc before use

commit 126c97f4d0d1b5b956e8b0740c81a2b2a2ae548c upstream.

The kmalloc was not being checked - if it fails issue a warning
and return -ENOMEM to the caller.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: b8da344b74c8 ("cifs: dynamic allocation of ntlmssp blob")
Signed-off-by: Steve French <stfrench@microsoft.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
cc: Stable <stable@vger.kernel.org>`
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/sess.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c
index a035d1a958824..9bc7a29f88d65 100644
--- a/fs/cifs/sess.c
+++ b/fs/cifs/sess.c
@@ -398,6 +398,12 @@ int build_ntlmssp_auth_blob(unsigned char **pbuffer,
 		goto setup_ntlmv2_ret;
 	}
 	*pbuffer = kmalloc(size_of_ntlmssp_blob(ses), GFP_KERNEL);
+	if (!*pbuffer) {
+		rc = -ENOMEM;
+		cifs_dbg(VFS, "Error %d during NTLMSSP allocation\n", rc);
+		*buflen = 0;
+		goto setup_ntlmv2_ret;
+	}
 	sec_blob = (AUTHENTICATE_MESSAGE *)*pbuffer;
 
 	memcpy(sec_blob->Signature, NTLMSSP_SIGNATURE, 8);

From f1a4fcb29b295b0bb59f0b8a0de19282126f0130 Mon Sep 17 00:00:00 2001
From: Steve French <stfrench@microsoft.com>
Date: Thu, 2 Aug 2018 20:28:18 -0500
Subject: [PATCH 1742/1852] smb3: Do not send SMB3 SET_INFO if nothing changed

commit fd09b7d3b352105f08b8e02f7afecf7e816380ef upstream.

An earlier commit had a typo which prevented the
optimization from working:

commit 18dd8e1a65dd ("Do not send SMB3 SET_INFO request if nothing is changing")

Thank you to Metze for noticing this.  Also clear a
reserved field in the FILE_BASIC_INFO struct we send
that should be zero (all the other fields in that
struct were set or cleared explicitly already in
cifs_set_file_info).

Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
CC: Stable <stable@vger.kernel.org> # 4.9.x+
Reported-by: Stefan Metzmacher <metze@samba.org>
Signed-off-by: Steve French <stfrench@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/inode.c     | 2 ++
 fs/cifs/smb2inode.c | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index 9cdeb02932675..36c8594bb147d 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -1063,6 +1063,8 @@ cifs_set_file_info(struct inode *inode, struct iattr *attrs, unsigned int xid,
 	if (!server->ops->set_file_info)
 		return -ENOSYS;
 
+	info_buf.Pad = 0;
+
 	if (attrs->ia_valid & ATTR_ATIME) {
 		set_time = true;
 		info_buf.LastAccessTime =
diff --git a/fs/cifs/smb2inode.c b/fs/cifs/smb2inode.c
index 1238cd3552f9c..0267d8cbc9966 100644
--- a/fs/cifs/smb2inode.c
+++ b/fs/cifs/smb2inode.c
@@ -267,7 +267,7 @@ smb2_set_file_info(struct inode *inode, const char *full_path,
 	int rc;
 
 	if ((buf->CreationTime == 0) && (buf->LastAccessTime == 0) &&
-	    (buf->LastWriteTime == 0) && (buf->ChangeTime) &&
+	    (buf->LastWriteTime == 0) && (buf->ChangeTime == 0) &&
 	    (buf->Attributes == 0))
 		return 0; /* would be a no op, no sense sending this */
 

From 1a7bd23f7a61dc030ca0c49b4845c983f6204077 Mon Sep 17 00:00:00 2001
From: Steve French <stfrench@microsoft.com>
Date: Fri, 27 Jul 2018 22:01:49 -0500
Subject: [PATCH 1743/1852] smb3: don't request leases in symlink creation and
 query

commit 22783155f4bf956c346a81624ec9258930a6fe06 upstream.

Fixes problem pointed out by Pavel in discussions about commit
729c0c9dd55204f0c9a823ac8a7bfa83d36c7e78

Signed-off-by: Pavel Shilovsky <pshilov@microsoft.com>
Signed-off-by: Steve French <stfrench@microsoft.com>
Reviewed-by: Ronnie Sahlberg <lsahlber@redhat.com>
CC: Stable <stable@vger.kernel.org> # 3.18.x+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/cifs/link.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index e3548f73bdeaa..728289c32b32f 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -419,7 +419,7 @@ smb3_query_mf_symlink(unsigned int xid, struct cifs_tcon *tcon,
 	struct cifs_io_parms io_parms;
 	int buf_type = CIFS_NO_BUFFER;
 	__le16 *utf16_path;
-	__u8 oplock = SMB2_OPLOCK_LEVEL_II;
+	__u8 oplock = SMB2_OPLOCK_LEVEL_NONE;
 	struct smb2_file_all_info *pfile_info = NULL;
 
 	oparms.tcon = tcon;
@@ -481,7 +481,7 @@ smb3_create_mf_symlink(unsigned int xid, struct cifs_tcon *tcon,
 	struct cifs_io_parms io_parms;
 	int create_options = CREATE_NOT_DIR;
 	__le16 *utf16_path;
-	__u8 oplock = SMB2_OPLOCK_LEVEL_EXCLUSIVE;
+	__u8 oplock = SMB2_OPLOCK_LEVEL_NONE;
 	struct kvec iov[2];
 
 	if (backup_cred(cifs_sb))

From 66bd190206cf324b205cef58c5fc3986e0a88f3c Mon Sep 17 00:00:00 2001
From: Josef Bacik <josef@toxicpanda.com>
Date: Thu, 19 Jul 2018 10:49:51 -0400
Subject: [PATCH 1744/1852] btrfs: don't leak ret from do_chunk_alloc

commit 4559b0a71749c442d34f7cfb9e72c9e58db83948 upstream.

If we're trying to make a data reservation and we have to allocate a
data chunk we could leak ret == 1, as do_chunk_alloc() will return 1 if
it allocated a chunk.  Since the end of the function is the success path
just return 0.

CC: stable@vger.kernel.org # 4.4+
Signed-off-by: Josef Bacik <josef@toxicpanda.com>
Reviewed-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: David Sterba <dsterba@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/btrfs/extent-tree.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 982a9d509817d..493c7354ec0b8 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -4128,7 +4128,7 @@ int btrfs_alloc_data_chunk_ondemand(struct inode *inode, u64 bytes)
 				      data_sinfo->flags, bytes, 1);
 	spin_unlock(&data_sinfo->lock);
 
-	return ret;
+	return 0;
 }
 
 /*

From f5ac8723452b2cea367abc23a4b099d87ec05be4 Mon Sep 17 00:00:00 2001
From: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com>
Date: Mon, 16 Jul 2018 10:38:57 +0200
Subject: [PATCH 1745/1852] s390/kvm: fix deadlock when killed by oom

commit 306d6c49ac9ded11114cb53b0925da52f2c2ada1 upstream.

When the oom killer kills a userspace process in the page fault handler
while in guest context, the fault handler fails to release the mm_sem
if the FAULT_FLAG_RETRY_NOWAIT option is set. This leads to a deadlock
when tearing down the mm when the process terminates. This bug can only
happen when pfault is enabled, so only KVM clients are affected.

The problem arises in the rare cases in which handle_mm_fault does not
release the mm_sem. This patch fixes the issue by manually releasing
the mm_sem when needed.

Fixes: 24eb3a824c4f3 ("KVM: s390: Add FAULT_FLAG_RETRY_NOWAIT for guest fault")
Cc: <stable@vger.kernel.org> # 3.15+
Signed-off-by: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/mm/fault.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index ec1a30d0d11ab..7218689bd6ee8 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -459,6 +459,8 @@ static inline int do_exception(struct pt_regs *regs, int access)
 	/* No reason to continue if interrupted by SIGKILL. */
 	if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) {
 		fault = VM_FAULT_SIGNAL;
+		if (flags & FAULT_FLAG_RETRY_NOWAIT)
+			goto out_up;
 		goto out;
 	}
 	if (unlikely(fault & VM_FAULT_ERROR))

From 9e43312472c7b5bea77c5f6ff0ce29434f8a2318 Mon Sep 17 00:00:00 2001
From: Theodore Ts'o <tytso@mit.edu>
Date: Wed, 1 Aug 2018 12:36:52 -0400
Subject: [PATCH 1746/1852] ext4: check for NUL characters in extended
 attribute's name

commit 7d95178c77014dbd8dce36ee40bbbc5e6c121ff5 upstream.

Extended attribute names are defined to be NUL-terminated, so the name
must not contain a NUL character.  This is important because there are
places when remove extended attribute, the code uses strlen to
determine the length of the entry.  That should probably be fixed at
some point, but code is currently really messy, so the simplest fix
for now is to simply validate that the extended attributes are sane.

https://bugzilla.kernel.org/show_bug.cgi?id=200401

Reported-by: Wen Xu <wen.xu@gatech.edu>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/xattr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c
index b16bfb52edb2f..a9b96d73d7d28 100644
--- a/fs/ext4/xattr.c
+++ b/fs/ext4/xattr.c
@@ -197,6 +197,8 @@ ext4_xattr_check_names(struct ext4_xattr_entry *entry, void *end,
 		struct ext4_xattr_entry *next = EXT4_XATTR_NEXT(e);
 		if ((void *)next >= end)
 			return -EFSCORRUPTED;
+		if (strnlen(e->e_name, e->e_name_len) != e->e_name_len)
+			return -EFSCORRUPTED;
 		e = next;
 	}
 

From 48dc268884ecd4de7764c16418938e1fb48a538f Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Sun, 29 Jul 2018 15:48:00 -0400
Subject: [PATCH 1747/1852] ext4: sysfs: print ext4_super_block fields as
 little-endian

commit a4d2aadca184ece182418950d45ba4ffc7b652d2 upstream.

While working on extended rand for last_error/first_error timestamps,
I noticed that the endianess is wrong; we access the little-endian
fields in struct ext4_super_block as native-endian when we print them.

This adds a special case in ext4_attr_show() and ext4_attr_store()
to byteswap the superblock fields if needed.

In older kernels, this code was part of super.c, it got moved to
sysfs.c in linux-4.4.

Cc: stable@vger.kernel.org
Fixes: 52c198c6820f ("ext4: add sysfs entry showing whether the fs contains errors")
Reviewed-by: Andreas Dilger <adilger@dilger.ca>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/sysfs.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/fs/ext4/sysfs.c b/fs/ext4/sysfs.c
index c2ee23acf3594..ae9929d678d6f 100644
--- a/fs/ext4/sysfs.c
+++ b/fs/ext4/sysfs.c
@@ -277,8 +277,12 @@ static ssize_t ext4_attr_show(struct kobject *kobj,
 	case attr_pointer_ui:
 		if (!ptr)
 			return 0;
-		return snprintf(buf, PAGE_SIZE, "%u\n",
-				*((unsigned int *) ptr));
+		if (a->attr_ptr == ptr_ext4_super_block_offset)
+			return snprintf(buf, PAGE_SIZE, "%u\n",
+					le32_to_cpup(ptr));
+		else
+			return snprintf(buf, PAGE_SIZE, "%u\n",
+					*((unsigned int *) ptr));
 	case attr_pointer_atomic:
 		if (!ptr)
 			return 0;
@@ -311,7 +315,10 @@ static ssize_t ext4_attr_store(struct kobject *kobj,
 		ret = kstrtoul(skip_spaces(buf), 0, &t);
 		if (ret)
 			return ret;
-		*((unsigned int *) ptr) = t;
+		if (a->attr_ptr == ptr_ext4_super_block_offset)
+			*((__le32 *) ptr) = cpu_to_le32(t);
+		else
+			*((unsigned int *) ptr) = t;
 		return len;
 	case attr_inode_readahead:
 		return inode_readahead_blks_store(a, sbi, buf, len);

From 7396409110336f65086a08f76ee67d47297aa18d Mon Sep 17 00:00:00 2001
From: Eric Sandeen <sandeen@redhat.com>
Date: Sun, 29 Jul 2018 17:13:42 -0400
Subject: [PATCH 1748/1852] ext4: reset error code in ext4_find_entry in
 fallback

commit f39b3f45dbcb0343822cce31ea7636ad66e60bc2 upstream.

When ext4_find_entry() falls back to "searching the old fashioned
way" due to a corrupt dx dir, it needs to reset the error code
to NULL so that the nonstandard ERR_BAD_DX_DIR code isn't returned
to userspace.

https://bugzilla.kernel.org/show_bug.cgi?id=199947

Reported-by: Anatoly Trosinenko <anatoly.trosinenko@yandex.com>
Reviewed-by: Andreas Dilger <adilger@dilger.ca>
Signed-off-by: Eric Sandeen <sandeen@redhat.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/ext4/namei.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c
index 97472088d65a7..a1f1e53d0e25c 100644
--- a/fs/ext4/namei.c
+++ b/fs/ext4/namei.c
@@ -1401,6 +1401,7 @@ static struct buffer_head * ext4_find_entry (struct inode *dir,
 			goto cleanup_and_exit;
 		dxtrace(printk(KERN_DEBUG "ext4_find_entry: dx failed, "
 			       "falling back\n"));
+		ret = NULL;
 	}
 	nblocks = dir->i_size >> EXT4_BLOCK_SIZE_BITS(sb);
 	if (!nblocks) {

From 9ce50564cdeb384e8c46b200739c473e64455640 Mon Sep 17 00:00:00 2001
From: Greg Hackmann <ghackmann@android.com>
Date: Wed, 15 Aug 2018 12:51:21 -0700
Subject: [PATCH 1749/1852] arm64: mm: check for upper PAGE_SHIFT bits in
 pfn_valid()

commit 5ad356eabc47d26a92140a0c4b20eba471c10de3 upstream.

ARM64's pfn_valid() shifts away the upper PAGE_SHIFT bits of the input
before seeing if the PFN is valid.  This leads to false positives when
some of the upper bits are set, but the lower bits match a valid PFN.

For example, the following userspace code looks up a bogus entry in
/proc/kpageflags:

    int pagemap = open("/proc/self/pagemap", O_RDONLY);
    int pageflags = open("/proc/kpageflags", O_RDONLY);
    uint64_t pfn, val;

    lseek64(pagemap, [...], SEEK_SET);
    read(pagemap, &pfn, sizeof(pfn));
    if (pfn & (1UL << 63)) {        /* valid PFN */
        pfn &= ((1UL << 55) - 1);   /* clear flag bits */
        pfn |= (1UL << 55);
        lseek64(pageflags, pfn * sizeof(uint64_t), SEEK_SET);
        read(pageflags, &val, sizeof(val));
    }

On ARM64 this causes the userspace process to crash with SIGSEGV rather
than reading (1 << KPF_NOPAGE).  kpageflags_read() treats the offset as
valid, and stable_page_flags() will try to access an address between the
user and kernel address ranges.

Fixes: c1cc1552616d ("arm64: MMU initialisation")
Cc: stable@vger.kernel.org
Signed-off-by: Greg Hackmann <ghackmann@google.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/mm/init.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 5ab1553e434be..0dce70b869000 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -267,11 +267,13 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
 }
 
 #ifdef CONFIG_HAVE_ARCH_PFN_VALID
-#define PFN_MASK ((1UL << (64 - PAGE_SHIFT)) - 1)
-
 int pfn_valid(unsigned long pfn)
 {
-	return (pfn & PFN_MASK) == pfn && memblock_is_map_memory(pfn << PAGE_SHIFT);
+	phys_addr_t addr = pfn << PAGE_SHIFT;
+
+	if ((addr >> PAGE_SHIFT) != pfn)
+		return 0;
+	return memblock_is_map_memory(addr);
 }
 EXPORT_SYMBOL(pfn_valid);
 #endif

From 0524dbfd5ee90e342beb8112c9a5cd6cd1d32f92 Mon Sep 17 00:00:00 2001
From: Punit Agrawal <punit.agrawal@arm.com>
Date: Mon, 13 Aug 2018 11:43:51 +0100
Subject: [PATCH 1750/1852] KVM: arm/arm64: Skip updating PTE entry if no
 change

commit 976d34e2dab10ece5ea8fe7090b7692913f89084 upstream.

When there is contention on faulting in a particular page table entry
at stage 2, the break-before-make requirement of the architecture can
lead to additional refaulting due to TLB invalidation.

Avoid this by skipping a page table update if the new value of the PTE
matches the previous value.

Cc: stable@vger.kernel.org
Fixes: d5d8184d35c9 ("KVM: ARM: Memory virtualization setup")
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/kvm/mmu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 4c055a63c9c65..eefd0556a99c7 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -968,6 +968,10 @@ static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
 	/* Create 2nd stage page table mapping - Level 3 */
 	old_pte = *pte;
 	if (pte_present(old_pte)) {
+		/* Skip page table update if there is no change */
+		if (pte_val(old_pte) == pte_val(*new_pte))
+			return 0;
+
 		kvm_set_pte(pte, __pte(0));
 		kvm_tlb_flush_vmid_ipa(kvm, addr);
 	} else {

From df28810ab6fcef062c7578f8be65703c48a7e043 Mon Sep 17 00:00:00 2001
From: Punit Agrawal <punit.agrawal@arm.com>
Date: Mon, 13 Aug 2018 11:43:50 +0100
Subject: [PATCH 1751/1852] KVM: arm/arm64: Skip updating PMD entry if no
 change

commit 86658b819cd0a9aa584cd84453ed268a6f013770 upstream.

Contention on updating a PMD entry by a large number of vcpus can lead
to duplicate work when handling stage 2 page faults. As the page table
update follows the break-before-make requirement of the architecture,
it can lead to repeated refaults due to clearing the entry and
flushing the tlbs.

This problem is more likely when -

* there are large number of vcpus
* the mapping is large block mapping

such as when using PMD hugepages (512MB) with 64k pages.

Fix this by skipping the page table update if there is no change in
the entry being updated.

Cc: stable@vger.kernel.org
Fixes: ad361f093c1e ("KVM: ARM: Support hugetlbfs backed huge pages")
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/kvm/mmu.c | 38 +++++++++++++++++++++++++++-----------
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index eefd0556a99c7..f2c4207ac70a5 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -899,19 +899,35 @@ static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
 	pmd = stage2_get_pmd(kvm, cache, addr);
 	VM_BUG_ON(!pmd);
 
-	/*
-	 * Mapping in huge pages should only happen through a fault.  If a
-	 * page is merged into a transparent huge page, the individual
-	 * subpages of that huge page should be unmapped through MMU
-	 * notifiers before we get here.
-	 *
-	 * Merging of CompoundPages is not supported; they should become
-	 * splitting first, unmapped, merged, and mapped back in on-demand.
-	 */
-	VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
-
 	old_pmd = *pmd;
 	if (pmd_present(old_pmd)) {
+		/*
+		 * Multiple vcpus faulting on the same PMD entry, can
+		 * lead to them sequentially updating the PMD with the
+		 * same value. Following the break-before-make
+		 * (pmd_clear() followed by tlb_flush()) process can
+		 * hinder forward progress due to refaults generated
+		 * on missing translations.
+		 *
+		 * Skip updating the page table if the entry is
+		 * unchanged.
+		 */
+		if (pmd_val(old_pmd) == pmd_val(*new_pmd))
+			return 0;
+
+		/*
+		 * Mapping in huge pages should only happen through a
+		 * fault.  If a page is merged into a transparent huge
+		 * page, the individual subpages of that huge page
+		 * should be unmapped through MMU notifiers before we
+		 * get here.
+		 *
+		 * Merging of CompoundPages is not supported; they
+		 * should become splitting first, unmapped, merged,
+		 * and mapped back in on-demand.
+		 */
+		VM_BUG_ON(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
+
 		pmd_clear(pmd);
 		kvm_tlb_flush_vmid_ipa(kvm, addr);
 	} else {

From 10be708c36fa6bcd6b54339bc0ab04d33fba0f54 Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Mon, 20 Aug 2018 11:58:35 +0200
Subject: [PATCH 1752/1852] x86/speculation/l1tf: Fix overflow in
 l1tf_pfn_limit() on 32bit

commit 9df9516940a61d29aedf4d91b483ca6597e7d480 upstream.

On 32bit PAE kernels on 64bit hardware with enough physical bits,
l1tf_pfn_limit() will overflow unsigned long. This in turn affects
max_swapfile_size() and can lead to swapon returning -EINVAL. This has been
observed in a 32bit guest with 42 bits physical address size, where
max_swapfile_size() overflows exactly to 1 << 32, thus zero, and produces
the following warning to dmesg:

[    6.396845] Truncating oversized swap area, only using 0k out of 2047996k

Fix this by using unsigned long long instead.

Fixes: 17dbca119312 ("x86/speculation/l1tf: Add sysfs reporting for l1tf")
Fixes: 377eeaa8e11f ("x86/speculation/l1tf: Limit swap file size to MAX_PA/2")
Reported-by: Dominique Leuenberger <dimstar@suse.de>
Reported-by: Adrian Schroeter <adrian@suse.de>
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Andi Kleen <ak@linux.intel.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: "H . Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180820095835.5298-1-vbabka@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/processor.h | 4 ++--
 arch/x86/mm/init.c               | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index a3a53955f01c2..b023f127eee35 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -172,9 +172,9 @@ extern const struct seq_operations cpuinfo_op;
 
 extern void cpu_detect(struct cpuinfo_x86 *c);
 
-static inline unsigned long l1tf_pfn_limit(void)
+static inline unsigned long long l1tf_pfn_limit(void)
 {
-	return BIT(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT) - 1;
+	return BIT_ULL(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT) - 1;
 }
 
 extern void early_cpu_init(void);
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 4954a6cef50ad..3bf0ff0d784a0 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -779,7 +779,7 @@ unsigned long max_swapfile_size(void)
 
 	if (boot_cpu_has_bug(X86_BUG_L1TF)) {
 		/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
-		unsigned long l1tf_limit = l1tf_pfn_limit() + 1;
+		unsigned long long l1tf_limit = l1tf_pfn_limit() + 1;
 		/*
 		 * We encode swap offsets also with 3 bits below those for pfn
 		 * which makes the usable limit higher.
@@ -787,7 +787,7 @@ unsigned long max_swapfile_size(void)
 #if CONFIG_PGTABLE_LEVELS > 2
 		l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
 #endif
-		pages = min_t(unsigned long, l1tf_limit, pages);
+		pages = min_t(unsigned long long, l1tf_limit, pages);
 	}
 	return pages;
 }

From 202b95920a166cdae25a14f2815cbfa80e47b013 Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Thu, 23 Aug 2018 15:44:18 +0200
Subject: [PATCH 1753/1852] x86/speculation/l1tf: Fix off-by-one error when
 warning that system has too much RAM

commit b0a182f875689647b014bc01d36b340217792852 upstream.

Two users have reported [1] that they have an "extremely unlikely" system
with more than MAX_PA/2 memory and L1TF mitigation is not effective. In
fact it's a CPU with 36bits phys limit (64GB) and 32GB memory, but due to
holes in the e820 map, the main region is almost 500MB over the 32GB limit:

[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000081effffff] usable

Suggestions to use 'mem=32G' to enable the L1TF mitigation while losing the
500MB revealed, that there's an off-by-one error in the check in
l1tf_select_mitigation().

l1tf_pfn_limit() returns the last usable pfn (inclusive) and the range
check in the mitigation path does not take this into account.

Instead of amending the range check, make l1tf_pfn_limit() return the first
PFN which is over the limit which is less error prone. Adjust the other
users accordingly.

[1] https://bugzilla.suse.com/show_bug.cgi?id=1105536

Fixes: 17dbca119312 ("x86/speculation/l1tf: Add sysfs reporting for l1tf")
Reported-by: George Anchev <studio@anchev.net>
Reported-by: Christopher Snowhill <kode54@gmail.com>
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "H . Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180823134418.17008-1-vbabka@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/processor.h | 2 +-
 arch/x86/mm/init.c               | 2 +-
 arch/x86/mm/mmap.c               | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b023f127eee35..337c521922783 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -174,7 +174,7 @@ extern void cpu_detect(struct cpuinfo_x86 *c);
 
 static inline unsigned long long l1tf_pfn_limit(void)
 {
-	return BIT_ULL(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT) - 1;
+	return BIT_ULL(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT);
 }
 
 extern void early_cpu_init(void);
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 3bf0ff0d784a0..f00eb52c16a6a 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -779,7 +779,7 @@ unsigned long max_swapfile_size(void)
 
 	if (boot_cpu_has_bug(X86_BUG_L1TF)) {
 		/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
-		unsigned long long l1tf_limit = l1tf_pfn_limit() + 1;
+		unsigned long long l1tf_limit = l1tf_pfn_limit();
 		/*
 		 * We encode swap offsets also with 3 bits below those for pfn
 		 * which makes the usable limit higher.
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 5aad869fa2058..74609a957c491 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -138,7 +138,7 @@ bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
 	/* If it's real memory always allow */
 	if (pfn_valid(pfn))
 		return true;
-	if (pfn > l1tf_pfn_limit() && !capable(CAP_SYS_ADMIN))
+	if (pfn >= l1tf_pfn_limit() && !capable(CAP_SYS_ADMIN))
 		return false;
 	return true;
 }

From 9cfa7f8486b2cc13f61f5309435dfb2dd5055d0e Mon Sep 17 00:00:00 2001
From: Vlastimil Babka <vbabka@suse.cz>
Date: Thu, 23 Aug 2018 16:21:29 +0200
Subject: [PATCH 1754/1852] x86/speculation/l1tf: Suggest what to do on systems
 with too much RAM

commit 6a012288d6906fee1dbc244050ade1dafe4a9c8d upstream.

Two users have reported [1] that they have an "extremely unlikely" system
with more than MAX_PA/2 memory and L1TF mitigation is not effective.

Make the warning more helpful by suggesting the proper mem=X kernel boot
parameter to make it effective and a link to the L1TF document to help
decide if the mitigation is worth the unusable RAM.

[1] https://bugzilla.suse.com/show_bug.cgi?id=1105536

Suggested-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: "H . Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/966571f0-9d7f-43dc-92c6-a10eec7a1254@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/bugs.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 34e4aaaf03d28..b9e6b60df148f 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -654,6 +654,10 @@ static void __init l1tf_select_mitigation(void)
 	half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
 	if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) {
 		pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
+		pr_info("You may make it effective by booting the kernel with mem=%llu parameter.\n",
+				half_pa);
+		pr_info("However, doing so will make a part of your RAM unusable.\n");
+		pr_info("Reading https://www.kernel.org/doc/html/latest/admin-guide/l1tf.html might help you decide.\n");
 		return;
 	}
 

From f9f408ba2a2aeaeed429f80230c473a97af94222 Mon Sep 17 00:00:00 2001
From: Rian Hunter <rian@alum.mit.edu>
Date: Sun, 19 Aug 2018 16:08:53 -0700
Subject: [PATCH 1755/1852] x86/process: Re-export start_thread()

commit dc76803e57cc86589c4efcb5362918f9b0c0436f upstream.

The consolidation of the start_thread() functions removed the export
unintentionally. This breaks binfmt handlers built as a module.

Add it back.

Fixes: e634d8fc792c ("x86-64: merge the standard and compat start_thread() functions")
Signed-off-by: Rian Hunter <rian@alum.mit.edu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bpetkov@suse.de>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Dmitry Safonov <dima@arista.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180819230854.7275-1-rian@alum.mit.edu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/process_64.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 4cbb60fbff3e3..c7cc81e9bb84a 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -250,6 +250,7 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 	start_thread_common(regs, new_ip, new_sp,
 			    __USER_CS, __USER_DS, 0);
 }
+EXPORT_SYMBOL_GPL(start_thread);
 
 #ifdef CONFIG_COMPAT
 void compat_start_thread(struct pt_regs *regs, u32 new_ip, u32 new_sp)

From 729d7f04d1c98307f692ec098d02e9d75202d859 Mon Sep 17 00:00:00 2001
From: Andrey Ryabinin <aryabinin@virtuozzo.com>
Date: Tue, 17 Jul 2018 19:00:33 +0300
Subject: [PATCH 1756/1852] fuse: Don't access pipe->buffers without
 pipe_lock()

commit a2477b0e67c52f4364a47c3ad70902bc2a61bd4c upstream.

fuse_dev_splice_write() reads pipe->buffers to determine the size of
'bufs' array before taking the pipe_lock(). This is not safe as
another thread might change the 'pipe->buffers' between the allocation
and taking the pipe_lock(). So we end up with too small 'bufs' array.

Move the bufs allocations inside pipe_lock()/pipe_unlock() to fix this.

Fixes: dd3bb14f44a6 ("fuse: support splice() writing to fuse device")
Signed-off-by: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: <stable@vger.kernel.org> # v2.6.35
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/dev.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index d0ab1a34a6d2c..9ee8b0ad40fa2 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -2001,11 +2001,14 @@ static ssize_t fuse_dev_splice_write(struct pipe_inode_info *pipe,
 	if (!fud)
 		return -EPERM;
 
+	pipe_lock(pipe);
+
 	bufs = kmalloc(pipe->buffers * sizeof(struct pipe_buffer), GFP_KERNEL);
-	if (!bufs)
+	if (!bufs) {
+		pipe_unlock(pipe);
 		return -ENOMEM;
+	}
 
-	pipe_lock(pipe);
 	nbuf = 0;
 	rem = 0;
 	for (idx = 0; idx < pipe->nrbufs && rem < len; idx++)

From 1c5b69baa4d7c233d98a449f94f58a03e4318336 Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 26 Jul 2018 16:13:11 +0200
Subject: [PATCH 1757/1852] fuse: fix double request_end()

commit 87114373ea507895a62afb10d2910bd9adac35a8 upstream.

Refcounting of request is broken when fuse_abort_conn() is called and
request is on the fpq->io list:

 - ref is taken too late
 - then it is not dropped

Fixes: 0d8e84b0432b ("fuse: simplify request abort")
Cc: <stable@vger.kernel.org> # v4.2
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/dev.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index 9ee8b0ad40fa2..dae60ecb98d14 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -384,7 +384,7 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req)
 	struct fuse_iqueue *fiq = &fc->iq;
 
 	if (test_and_set_bit(FR_FINISHED, &req->flags))
-		return;
+		goto out_put_req;
 
 	spin_lock(&fiq->waitq.lock);
 	list_del_init(&req->intr_entry);
@@ -414,6 +414,7 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req)
 	wake_up(&req->waitq);
 	if (req->end)
 		req->end(fc, req);
+out_put_req:
 	fuse_put_request(fc, req);
 }
 
@@ -2164,6 +2165,7 @@ void fuse_abort_conn(struct fuse_conn *fc)
 				set_bit(FR_ABORTED, &req->flags);
 				if (!test_bit(FR_LOCKED, &req->flags)) {
 					set_bit(FR_PRIVATE, &req->flags);
+					__fuse_get_request(req);
 					list_move(&req->list, &to_end1);
 				}
 				spin_unlock(&req->waitq.lock);
@@ -2190,7 +2192,6 @@ void fuse_abort_conn(struct fuse_conn *fc)
 
 		while (!list_empty(&to_end1)) {
 			req = list_first_entry(&to_end1, struct fuse_req, list);
-			__fuse_get_request(req);
 			list_del_init(&req->list);
 			request_end(fc, req);
 		}

From bd8c8b60c2d6fde53e7642a1f6b618debd05e2ab Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 26 Jul 2018 16:13:11 +0200
Subject: [PATCH 1758/1852] fuse: fix unlocked access to processing queue

commit 45ff350bbd9d0f0977ff270a0d427c71520c0c37 upstream.

fuse_dev_release() assumes that it's the only one referencing the
fpq->processing list, but that's not true, since fuse_abort_conn() can be
doing the same without any serialization between the two.

Fixes: c3696046beb3 ("fuse: separate pqueue for clones")
Cc: <stable@vger.kernel.org> # v4.2
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/dev.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index dae60ecb98d14..264946bd211e5 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -2209,9 +2209,15 @@ int fuse_dev_release(struct inode *inode, struct file *file)
 	if (fud) {
 		struct fuse_conn *fc = fud->fc;
 		struct fuse_pqueue *fpq = &fud->pq;
+		LIST_HEAD(to_end);
 
+		spin_lock(&fpq->lock);
 		WARN_ON(!list_empty(&fpq->io));
-		end_requests(fc, &fpq->processing);
+		list_splice_init(&fpq->processing, &to_end);
+		spin_unlock(&fpq->lock);
+
+		end_requests(fc, &to_end);
+
 		/* Are we the last open device? */
 		if (atomic_dec_and_test(&fc->dev_count)) {
 			WARN_ON(fc->iq.fasync != NULL);

From 8adb4a3f6ef515f57bf475585b96fe5d593803a4 Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 26 Jul 2018 16:13:11 +0200
Subject: [PATCH 1759/1852] fuse: umount should wait for all requests

commit b8f95e5d13f5f0191dcb4b9113113d241636e7cb upstream.

fuse_abort_conn() does not guarantee that all async requests have actually
finished aborting (i.e. their ->end() function is called).  This could
actually result in still used inodes after umount.

Add a helper to wait until all requests are fully done.  This is done by
looking at the "num_waiting" counter.  When this counter drops to zero, we
can be sure that no more requests are outstanding.

Fixes: 0d8e84b0432b ("fuse: simplify request abort")
Cc: <stable@vger.kernel.org> # v4.2
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/dev.c    | 23 +++++++++++++++++++----
 fs/fuse/fuse_i.h |  1 +
 fs/fuse/inode.c  |  2 ++
 3 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index 264946bd211e5..d584bcbca80a2 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -145,6 +145,16 @@ static bool fuse_block_alloc(struct fuse_conn *fc, bool for_background)
 	return !fc->initialized || (for_background && fc->blocked);
 }
 
+static void fuse_drop_waiting(struct fuse_conn *fc)
+{
+	if (fc->connected) {
+		atomic_dec(&fc->num_waiting);
+	} else if (atomic_dec_and_test(&fc->num_waiting)) {
+		/* wake up aborters */
+		wake_up_all(&fc->blocked_waitq);
+	}
+}
+
 static struct fuse_req *__fuse_get_req(struct fuse_conn *fc, unsigned npages,
 				       bool for_background)
 {
@@ -191,7 +201,7 @@ static struct fuse_req *__fuse_get_req(struct fuse_conn *fc, unsigned npages,
 	return req;
 
  out:
-	atomic_dec(&fc->num_waiting);
+	fuse_drop_waiting(fc);
 	return ERR_PTR(err);
 }
 
@@ -298,7 +308,7 @@ void fuse_put_request(struct fuse_conn *fc, struct fuse_req *req)
 
 		if (test_bit(FR_WAITING, &req->flags)) {
 			__clear_bit(FR_WAITING, &req->flags);
-			atomic_dec(&fc->num_waiting);
+			fuse_drop_waiting(fc);
 		}
 
 		if (req->stolen_file)
@@ -384,7 +394,7 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req)
 	struct fuse_iqueue *fiq = &fc->iq;
 
 	if (test_and_set_bit(FR_FINISHED, &req->flags))
-		goto out_put_req;
+		goto put_request;
 
 	spin_lock(&fiq->waitq.lock);
 	list_del_init(&req->intr_entry);
@@ -414,7 +424,7 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req)
 	wake_up(&req->waitq);
 	if (req->end)
 		req->end(fc, req);
-out_put_req:
+put_request:
 	fuse_put_request(fc, req);
 }
 
@@ -2202,6 +2212,11 @@ void fuse_abort_conn(struct fuse_conn *fc)
 }
 EXPORT_SYMBOL_GPL(fuse_abort_conn);
 
+void fuse_wait_aborted(struct fuse_conn *fc)
+{
+	wait_event(fc->blocked_waitq, atomic_read(&fc->num_waiting) == 0);
+}
+
 int fuse_dev_release(struct inode *inode, struct file *file)
 {
 	struct fuse_dev *fud = fuse_get_dev(file);
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h
index 644687ae04bd9..d88340e84b5f9 100644
--- a/fs/fuse/fuse_i.h
+++ b/fs/fuse/fuse_i.h
@@ -845,6 +845,7 @@ void fuse_request_send_background_locked(struct fuse_conn *fc,
 
 /* Abort all requests */
 void fuse_abort_conn(struct fuse_conn *fc);
+void fuse_wait_aborted(struct fuse_conn *fc);
 
 /**
  * Invalidate inode attributes
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index f0b73e0c6d481..9517154ddd293 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -382,6 +382,8 @@ static void fuse_put_super(struct super_block *sb)
 	fuse_send_destroy(fc);
 
 	fuse_abort_conn(fc);
+	fuse_wait_aborted(fc);
+
 	mutex_lock(&fuse_mutex);
 	list_del(&fc->entry);
 	fuse_ctl_remove_conn(fc);

From 25fee342bba4c6b8bae11b9592441dd994b56c09 Mon Sep 17 00:00:00 2001
From: Miklos Szeredi <mszeredi@redhat.com>
Date: Thu, 26 Jul 2018 16:13:11 +0200
Subject: [PATCH 1760/1852] fuse: Fix oops at process_init_reply()

commit e8f3bd773d22f488724dffb886a1618da85c2966 upstream.

syzbot is hitting NULL pointer dereference at process_init_reply().
This is because deactivate_locked_super() is called before response for
initial request is processed.

Fix this by aborting and waiting for all requests (including FUSE_INIT)
before resetting fc->sb.

Original patch by Tetsuo Handa <penguin-kernel@I-love.SKAURA.ne.jp>.

Reported-by: syzbot <syzbot+b62f08f4d5857755e3bc@syzkaller.appspotmail.com>
Fixes: e27c9d3877a0 ("fuse: fuse: add time_gran to INIT_OUT")
Cc: <stable@vger.kernel.org> # v3.19
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/inode.c | 25 +++++++++++--------------
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 9517154ddd293..4b2eb65be0d40 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -379,11 +379,6 @@ static void fuse_put_super(struct super_block *sb)
 {
 	struct fuse_conn *fc = get_fuse_conn_super(sb);
 
-	fuse_send_destroy(fc);
-
-	fuse_abort_conn(fc);
-	fuse_wait_aborted(fc);
-
 	mutex_lock(&fuse_mutex);
 	list_del(&fc->entry);
 	fuse_ctl_remove_conn(fc);
@@ -1174,16 +1169,25 @@ static struct dentry *fuse_mount(struct file_system_type *fs_type,
 	return mount_nodev(fs_type, flags, raw_data, fuse_fill_super);
 }
 
-static void fuse_kill_sb_anon(struct super_block *sb)
+static void fuse_sb_destroy(struct super_block *sb)
 {
 	struct fuse_conn *fc = get_fuse_conn_super(sb);
 
 	if (fc) {
+		fuse_send_destroy(fc);
+
+		fuse_abort_conn(fc);
+		fuse_wait_aborted(fc);
+
 		down_write(&fc->killsb);
 		fc->sb = NULL;
 		up_write(&fc->killsb);
 	}
+}
 
+static void fuse_kill_sb_anon(struct super_block *sb)
+{
+	fuse_sb_destroy(sb);
 	kill_anon_super(sb);
 }
 
@@ -1206,14 +1210,7 @@ static struct dentry *fuse_mount_blk(struct file_system_type *fs_type,
 
 static void fuse_kill_sb_blk(struct super_block *sb)
 {
-	struct fuse_conn *fc = get_fuse_conn_super(sb);
-
-	if (fc) {
-		down_write(&fc->killsb);
-		fc->sb = NULL;
-		up_write(&fc->killsb);
-	}
-
+	fuse_sb_destroy(sb);
 	kill_block_super(sb);
 }
 

From 366478a34ec03bb2d8e5bf36b0b6a9967509081f Mon Sep 17 00:00:00 2001
From: Kirill Tkhai <ktkhai@virtuozzo.com>
Date: Thu, 19 Jul 2018 15:49:39 +0300
Subject: [PATCH 1761/1852] fuse: Add missed unlock_page() to
 fuse_readpages_fill()

commit 109728ccc5933151c68d1106e4065478a487a323 upstream.

The above error path returns with page unlocked, so this place seems also
to behave the same.

Fixes: f8dbdf81821b ("fuse: rework fuse_readpages()")
Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/fuse/file.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/fuse/file.c b/fs/fuse/file.c
index 1a063cbfe5034..8577f3ba6dc6f 100644
--- a/fs/fuse/file.c
+++ b/fs/fuse/file.c
@@ -879,6 +879,7 @@ static int fuse_readpages_fill(void *_data, struct page *page)
 	}
 
 	if (WARN_ON(req->num_pages >= req->max_pages)) {
+		unlock_page(page);
 		fuse_put_request(fc, req);
 		return -EIO;
 	}

From a1c9d2f957cc34708e9ce97f7a4fc5ee211f5371 Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Sun, 3 Jun 2018 16:40:55 +0200
Subject: [PATCH 1762/1852] udl-kms: change down_interruptible to down

commit 8456b99c16d193c4c3b7df305cf431e027f0189c upstream.

If we leave urbs around, it causes not only leak, but also memory
corruption. This patch fixes the function udl_free_urb_list, so that it
always waits for all urbs that are in progress.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/udl/udl_main.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/udl/udl_main.c b/drivers/gpu/drm/udl/udl_main.c
index 33dbfb2c47486..2d7d7e0b2a236 100644
--- a/drivers/gpu/drm/udl/udl_main.c
+++ b/drivers/gpu/drm/udl/udl_main.c
@@ -141,18 +141,13 @@ static void udl_free_urb_list(struct drm_device *dev)
 	struct list_head *node;
 	struct urb_node *unode;
 	struct urb *urb;
-	int ret;
 	unsigned long flags;
 
 	DRM_DEBUG("Waiting for completes and freeing all render urbs\n");
 
 	/* keep waiting and freeing, until we've got 'em all */
 	while (count--) {
-
-		/* Getting interrupted means a leak, but ok at shutdown*/
-		ret = down_interruptible(&udl->urbs.limit_sem);
-		if (ret)
-			break;
+		down(&udl->urbs.limit_sem);
 
 		spin_lock_irqsave(&udl->urbs.lock, flags);
 

From a0055374a9515d60be4bffe78f075daa6c99725e Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Sun, 3 Jun 2018 16:40:56 +0200
Subject: [PATCH 1763/1852] udl-kms: handle allocation failure

commit 542bb9788a1f485eb1a2229178f665d8ea166156 upstream.

Allocations larger than PAGE_ALLOC_COSTLY_ORDER are unreliable and they
may fail anytime. This patch fixes the udl kms driver so that when a large
alloactions fails, it tries to do multiple smaller allocations.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/udl/udl_main.c | 28 ++++++++++++++++++----------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/udl/udl_main.c b/drivers/gpu/drm/udl/udl_main.c
index 2d7d7e0b2a236..30bfeb1b25124 100644
--- a/drivers/gpu/drm/udl/udl_main.c
+++ b/drivers/gpu/drm/udl/udl_main.c
@@ -171,17 +171,22 @@ static void udl_free_urb_list(struct drm_device *dev)
 static int udl_alloc_urb_list(struct drm_device *dev, int count, size_t size)
 {
 	struct udl_device *udl = dev->dev_private;
-	int i = 0;
 	struct urb *urb;
 	struct urb_node *unode;
 	char *buf;
+	size_t wanted_size = count * size;
 
 	spin_lock_init(&udl->urbs.lock);
 
+retry:
 	udl->urbs.size = size;
 	INIT_LIST_HEAD(&udl->urbs.list);
 
-	while (i < count) {
+	sema_init(&udl->urbs.limit_sem, 0);
+	udl->urbs.count = 0;
+	udl->urbs.available = 0;
+
+	while (udl->urbs.count * size < wanted_size) {
 		unode = kzalloc(sizeof(struct urb_node), GFP_KERNEL);
 		if (!unode)
 			break;
@@ -197,11 +202,16 @@ static int udl_alloc_urb_list(struct drm_device *dev, int count, size_t size)
 		}
 		unode->urb = urb;
 
-		buf = usb_alloc_coherent(udl->udev, MAX_TRANSFER, GFP_KERNEL,
+		buf = usb_alloc_coherent(udl->udev, size, GFP_KERNEL,
 					 &urb->transfer_dma);
 		if (!buf) {
 			kfree(unode);
 			usb_free_urb(urb);
+			if (size > PAGE_SIZE) {
+				size /= 2;
+				udl_free_urb_list(dev);
+				goto retry;
+			}
 			break;
 		}
 
@@ -212,16 +222,14 @@ static int udl_alloc_urb_list(struct drm_device *dev, int count, size_t size)
 
 		list_add_tail(&unode->entry, &udl->urbs.list);
 
-		i++;
+		up(&udl->urbs.limit_sem);
+		udl->urbs.count++;
+		udl->urbs.available++;
 	}
 
-	sema_init(&udl->urbs.limit_sem, i);
-	udl->urbs.count = i;
-	udl->urbs.available = i;
-
-	DRM_DEBUG("allocated %d %d byte urbs\n", i, (int) size);
+	DRM_DEBUG("allocated %d %d byte urbs\n", udl->urbs.count, (int) size);
 
-	return i;
+	return udl->urbs.count;
 }
 
 struct urb *udl_get_urb(struct drm_device *dev)

From bf407fbc2ee073bac4e3b1fb0b5ab83d58ce40ce Mon Sep 17 00:00:00 2001
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Sun, 3 Jun 2018 16:40:57 +0200
Subject: [PATCH 1764/1852] udl-kms: fix crash due to uninitialized memory

commit 09a00abe3a9941c2715ca83eb88172cd2f54d8fd upstream.

We must use kzalloc when allocating the fb_deferred_io structure.
Otherwise, the field first_io is undefined and it causes a crash.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/gpu/drm/udl/udl_fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/udl/udl_fb.c b/drivers/gpu/drm/udl/udl_fb.c
index 29bd801f5dadc..0c648efd9a584 100644
--- a/drivers/gpu/drm/udl/udl_fb.c
+++ b/drivers/gpu/drm/udl/udl_fb.c
@@ -341,7 +341,7 @@ static int udl_fb_open(struct fb_info *info, int user)
 
 		struct fb_deferred_io *fbdefio;
 
-		fbdefio = kmalloc(sizeof(struct fb_deferred_io), GFP_KERNEL);
+		fbdefio = kzalloc(sizeof(struct fb_deferred_io), GFP_KERNEL);
 
 		if (fbdefio) {
 			fbdefio->delay = DL_DEFIO_WRITE_DELAY;

From d04576c21862fbac98d601131b6f547dbc204bac Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Wed, 27 Jun 2018 17:36:38 +0200
Subject: [PATCH 1765/1852] ASoC: dpcm: don't merge format from invalid codec
 dai

commit 4febced15ac8ddb9cf3e603edb111842e4863d9a upstream.

When merging codec formats, dpcm_runtime_base_format() should skip
the codecs which are not supporting the current stream direction.

At the moment, if a BE link has more than one codec, and only one
of these codecs has no capture DAI, it becomes impossible to start
a capture stream because the merged format would be 0.

Skipping invalid codec DAI solves the problem.

Fixes: b073ed4e2126 ("ASoC: soc-pcm: DPCM cares BE format")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/soc-pcm.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index 43b80db952d17..f99eb8f442829 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -1570,6 +1570,14 @@ static u64 dpcm_runtime_base_format(struct snd_pcm_substream *substream)
 		int i;
 
 		for (i = 0; i < be->num_codecs; i++) {
+			/*
+			 * Skip CODECs which don't support the current stream
+			 * type. See soc_pcm_init_runtime_hw() for more details
+			 */
+			if (!snd_soc_dai_stream_valid(be->codec_dais[i],
+						      stream))
+				continue;
+
 			codec_dai_drv = be->codec_dais[i]->driver;
 			if (stream == SNDRV_PCM_STREAM_PLAYBACK)
 				codec_stream = &codec_dai_drv->playback;

From 279613fe7180510e8d172f4190cc2884a88bcefe Mon Sep 17 00:00:00 2001
From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Date: Thu, 26 Jul 2018 15:49:10 -0500
Subject: [PATCH 1766/1852] ASoC: sirf: Fix potential NULL pointer dereference

commit ae1c696a480c67c45fb23b35162183f72c6be0e1 upstream.

There is a potential execution path in which function
platform_get_resource() returns NULL. If this happens,
we will end up having a NULL pointer dereference.

Fix this by replacing devm_ioremap with devm_ioremap_resource,
which has the NULL check and the memory region request.

This code was detected with the help of Coccinelle.

Cc: stable@vger.kernel.org
Fixes: 2bd8d1d5cf89 ("ASoC: sirf: Add audio usp interface driver")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 sound/soc/sirf/sirf-usp.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 45fc06c0e0e55..6b504f407079b 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -367,10 +367,9 @@ static int sirf_usp_pcm_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, usp);
 
 	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	base = devm_ioremap(&pdev->dev, mem_res->start,
-		resource_size(mem_res));
-	if (base == NULL)
-		return -ENOMEM;
+	base = devm_ioremap_resource(&pdev->dev, mem_res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
 	usp->regmap = devm_regmap_init_mmio(&pdev->dev, base,
 					    &sirf_usp_regmap_config);
 	if (IS_ERR(usp->regmap))

From f3dbe1ea92f1c1d2941cbf8529da4e161d919613 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Fri, 13 Jul 2018 17:55:15 +0300
Subject: [PATCH 1767/1852] pinctrl: freescale: off by one in
 imx1_pinconf_group_dbg_show()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit 19da44cd33a3a6ff7c97fff0189999ff15b241e4 upstream.

The info->groups[] array is allocated in imx1_pinctrl_parse_dt().  It
has info->ngroups elements.  Thus the > here should be >= to prevent
reading one element beyond the end of the array.

Cc: stable@vger.kernel.org
Fixes: 30612cd90005 ("pinctrl: imx1 core driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Uwe Kleine-König <u.kleine-könig@pengutronix.de>
Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/pinctrl/freescale/pinctrl-imx1-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx1-core.c b/drivers/pinctrl/freescale/pinctrl-imx1-core.c
index 14905ea9b1d58..199513b1c457b 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx1-core.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx1-core.c
@@ -434,7 +434,7 @@ static void imx1_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 	const char *name;
 	int i, ret;
 
-	if (group > info->ngroups)
+	if (group >= info->ngroups)
 		return;
 
 	seq_puts(s, "\n");

From 588c469f4d4f8c484212032179cab5e04fdf636f Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers@google.com>
Date: Mon, 27 Aug 2018 14:40:09 -0700
Subject: [PATCH 1768/1852] x86/irqflags: Mark native_restore_fl extern inline

commit 1f59a4581b5ecfe9b4f049a7a2cf904d8352842d upstream.

This should have been marked extern inline in order to pick up the out
of line definition in arch/x86/kernel/irqflags.S.

Fixes: 208cbb325589 ("x86/irqflags: Provide a declaration for native_save_fl")
Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Juergen Gross <jgross@suse.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180827214011.55428-1-ndesaulniers@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/include/asm/irqflags.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflags.h
index cb7f04981c6b3..8afbdcd3032bf 100644
--- a/arch/x86/include/asm/irqflags.h
+++ b/arch/x86/include/asm/irqflags.h
@@ -28,7 +28,8 @@ extern inline unsigned long native_save_fl(void)
 	return flags;
 }
 
-static inline void native_restore_fl(unsigned long flags)
+extern inline void native_restore_fl(unsigned long flags);
+extern inline void native_restore_fl(unsigned long flags)
 {
 	asm volatile("push %0 ; popf"
 		     : /* no output */

From 9f3f6d6fa8c5e382eecbc5376bb03f4b40784849 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@linux.intel.com>
Date: Fri, 24 Aug 2018 10:03:51 -0700
Subject: [PATCH 1769/1852] x86/spectre: Add missing family 6 check to
 microcode check

commit 1ab534e85c93945f7862378d8c8adcf408205b19 upstream.

The check for Spectre microcodes does not check for family 6, only the
model numbers.

Add a family 6 check to avoid ambiguity with other families.

Fixes: a5b296636453 ("x86/cpufeature: Blacklist SPEC_CTRL/PRED_CMD on early Spectre v2 microcodes")
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180824170351.34874-2-andi@firstfloor.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/x86/kernel/cpu/intel.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 4dce22d3cb068..b18fe3d245fed 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -74,6 +74,9 @@ static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
 	if (cpu_has(c, X86_FEATURE_HYPERVISOR))
 		return false;
 
+	if (c->x86 != 6)
+		return false;
+
 	for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) {
 		if (c->x86_model == spectre_bad_microcodes[i].model &&
 		    c->x86_mask == spectre_bad_microcodes[i].stepping)

From aa0cf537ab0bd6af6a389132ecbc4f0da1a95b51 Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Date: Mon, 6 Aug 2018 14:26:39 +0200
Subject: [PATCH 1770/1852] s390: fix br_r1_trampoline for machines without
 exrl

commit 26f843848bae973817b3587780ce6b7b0200d3e4 upstream.

For machines without the exrl instruction the BFP jit generates
code that uses an "br %r1" instruction located in the lowcore page.
Unfortunately there is a cut & paste error that puts an additional
"larl %r1,.+14" instruction in the code that clobbers the branch
target address in %r1. Remove the larl instruction.

Cc: <stable@vger.kernel.org> # v4.17+
Fixes: de5cb6eb51 ("s390: use expoline thunks in the BPF JIT")
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/net/bpf_jit_comp.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index a26528afceb26..727693e283da2 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -522,8 +522,6 @@ static void bpf_jit_epilogue(struct bpf_jit *jit)
 			/* br %r1 */
 			_EMIT2(0x07f1);
 		} else {
-			/* larl %r1,.+14 */
-			EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
 			/* ex 0,S390_lowcore.br_r1_tampoline */
 			EMIT4_DISP(0x44000000, REG_0, REG_0,
 				   offsetof(struct _lowcore, br_r1_trampoline));

From 6e90af1e514efdc8fd16004c075d86660bd3d955 Mon Sep 17 00:00:00 2001
From: Julian Wiedmann <jwi@linux.ibm.com>
Date: Wed, 16 May 2018 09:37:25 +0200
Subject: [PATCH 1771/1852] s390/qdio: reset old sbal_state flags

commit 64e03ff72623b8c2ea89ca3cb660094e019ed4ae upstream.

When allocating a new AOB fails, handle_outbound() is still capable of
transmitting the selected buffer (just without async completion).

But if a previous transfer on this queue slot used async completion, its
sbal_state flags field is still set to QDIO_OUTBUF_STATE_FLAG_PENDING.
So when the upper layer driver sees this stale flag, it expects an async
completion that never happens.

Fix this by unconditionally clearing the flags field.

Fixes: 104ea556ee7f ("qdio: support asynchronous delivery of storage blocks")
Cc: <stable@vger.kernel.org> #v3.2+
Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/include/asm/qdio.h | 1 -
 drivers/s390/cio/qdio_main.c | 5 ++---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 998b61cd0e569..4b39ba700d32f 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -261,7 +261,6 @@ struct qdio_outbuf_state {
 	void *user;
 };
 
-#define QDIO_OUTBUF_STATE_FLAG_NONE	0x00
 #define QDIO_OUTBUF_STATE_FLAG_PENDING	0x01
 
 #define CHSC_AC1_INITIATE_INPUTQ	0x80
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
index 742ca57ece8c8..d64b401f3d058 100644
--- a/drivers/s390/cio/qdio_main.c
+++ b/drivers/s390/cio/qdio_main.c
@@ -640,21 +640,20 @@ static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
 	unsigned long phys_aob = 0;
 
 	if (!q->use_cq)
-		goto out;
+		return 0;
 
 	if (!q->aobs[bufnr]) {
 		struct qaob *aob = qdio_allocate_aob();
 		q->aobs[bufnr] = aob;
 	}
 	if (q->aobs[bufnr]) {
-		q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
 		q->sbal_state[bufnr].aob = q->aobs[bufnr];
 		q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
 		phys_aob = virt_to_phys(q->aobs[bufnr]);
 		WARN_ON_ONCE(phys_aob & 0xFF);
 	}
 
-out:
+	q->sbal_state[bufnr].flags = 0;
 	return phys_aob;
 }
 

From b7d5dbebbb87ab70c7f8378a9c2e818a4757af5f Mon Sep 17 00:00:00 2001
From: Sebastian Ott <sebott@linux.ibm.com>
Date: Mon, 13 Aug 2018 11:26:46 +0200
Subject: [PATCH 1772/1852] s390/pci: fix out of bounds access during irq setup

commit 866f3576a72b2233a76dffb80290f8086dc49e17 upstream.

During interrupt setup we allocate interrupt vectors, walk the list of msi
descriptors, and fill in the message data. Requesting more interrupts than
supported on s390 can lead to an out of bounds access.

When we restrict the number of interrupts we should also stop walking the
msi list after all supported interrupts are handled.

Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Ott <sebott@linux.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/s390/pci/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index ef0499b76c505..9a5754d4ee87c 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -412,6 +412,8 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 	hwirq = 0;
 	for_each_pci_msi_entry(msi, pdev) {
 		rc = -EIO;
+		if (hwirq >= msi_vecs)
+			break;
 		irq = irq_alloc_desc(0);	/* Alloc irq on node 0 */
 		if (irq < 0)
 			goto out_msi;

From de33ddeb2f74154c51abee864167dab0171a6f70 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Sat, 28 Apr 2018 21:35:01 +0900
Subject: [PATCH 1773/1852] kprobes: Make list and blacklist root user read
 only

commit f2a3ab36077222437b4826fc76111caa14562b7c upstream.

Since the blacklist and list files on debugfs indicates
a sensitive address information to reader, it should be
restricted to the root user.

Suggested-by: Thomas Richter <tmricht@linux.ibm.com>
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Howells <dhowells@redhat.com>
Cc: David S . Miller <davem@davemloft.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jon Medhurst <tixy@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tobin C . Harding <me@tobin.cc>
Cc: Will Deacon <will.deacon@arm.com>
Cc: acme@kernel.org
Cc: akpm@linux-foundation.org
Cc: brueckner@linux.vnet.ibm.com
Cc: linux-arch@vger.kernel.org
Cc: rostedt@goodmis.org
Cc: schwidefsky@de.ibm.com
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/lkml/152491890171.9916.5183693615601334087.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 kernel/kprobes.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/kernel/kprobes.c b/kernel/kprobes.c
index bbe9dd0886bdf..388bcace62f87 100644
--- a/kernel/kprobes.c
+++ b/kernel/kprobes.c
@@ -2441,7 +2441,7 @@ static int __init debugfs_kprobe_init(void)
 	if (!dir)
 		return -ENOMEM;
 
-	file = debugfs_create_file("list", 0444, dir, NULL,
+	file = debugfs_create_file("list", 0400, dir, NULL,
 				&debugfs_kprobes_operations);
 	if (!file)
 		goto error;
@@ -2451,7 +2451,7 @@ static int __init debugfs_kprobe_init(void)
 	if (!file)
 		goto error;
 
-	file = debugfs_create_file("blacklist", 0444, dir, NULL,
+	file = debugfs_create_file("blacklist", 0400, dir, NULL,
 				&debugfs_kprobe_blacklist_ops);
 	if (!file)
 		goto error;

From 5a08bf7cbb59a54bb398fd5c790067265bbcc667 Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@mips.com>
Date: Tue, 15 May 2018 23:33:26 +0100
Subject: [PATCH 1774/1852] MIPS: Correct the 64-bit DSP accumulator register
 size

commit f5958b4cf4fc38ed4583ab83fb7c4cd1ab05f47b upstream.

Use the `unsigned long' rather than `__u32' type for DSP accumulator
registers, like with the regular MIPS multiply/divide accumulator and
general-purpose registers, as all are 64-bit in 64-bit implementations
and using a 32-bit data type leads to contents truncation on context
saving.

Update `arch_ptrace' and `compat_arch_ptrace' accordingly, removing
casts that are similarly not used with multiply/divide accumulator or
general-purpose register accesses.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Fixes: e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.")
Patchwork: https://patchwork.linux-mips.org/patch/19329/
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org # 2.6.15+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/include/asm/processor.h | 2 +-
 arch/mips/kernel/ptrace.c         | 2 +-
 arch/mips/kernel/ptrace32.c       | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 25eef1d60f275..0f07ac3bc7447 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -137,7 +137,7 @@ struct mips_fpu_struct {
 
 #define NUM_DSP_REGS   6
 
-typedef __u32 dspreg_t;
+typedef unsigned long dspreg_t;
 
 struct mips_dsp_state {
 	dspreg_t	dspr[NUM_DSP_REGS];
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 0b70d62e22317..9d04392f7ef09 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -878,7 +878,7 @@ long arch_ptrace(struct task_struct *child, long request,
 				goto out;
 			}
 			dregs = __get_dsp_regs(child);
-			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
+			tmp = dregs[addr - DSP_BASE];
 			break;
 		}
 		case DSP_CONTROL:
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index d95117e71f690..286ec2d24d47b 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -140,7 +140,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
 				goto out;
 			}
 			dregs = __get_dsp_regs(child);
-			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
+			tmp = dregs[addr - DSP_BASE];
 			break;
 		}
 		case DSP_CONTROL:

From db76d207e598f9bad19ae904dd5041d37c98aa34 Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@mips.com>
Date: Tue, 21 Aug 2018 12:12:59 -0700
Subject: [PATCH 1775/1852] MIPS: lib: Provide MIPS64r6 __multi3() for GCC < 7

commit 690d9163bf4b8563a2682e619f938e6a0443947f upstream.

Some versions of GCC suboptimally generate calls to the __multi3()
intrinsic for MIPS64r6 builds, resulting in link failures due to the
missing function:

    LD      vmlinux.o
    MODPOST vmlinux.o
  kernel/bpf/verifier.o: In function `kmalloc_array':
  include/linux/slab.h:631: undefined reference to `__multi3'
  fs/select.o: In function `kmalloc_array':
  include/linux/slab.h:631: undefined reference to `__multi3'
  ...

We already have a workaround for this in which we provide the
instrinsic, but we do so selectively for GCC 7 only. Unfortunately the
issue occurs with older GCC versions too - it has been observed with
both GCC 5.4.0 & GCC 6.4.0.

MIPSr6 support was introduced in GCC 5, so all major GCC versions prior
to GCC 8 are affected and we extend our workaround accordingly to all
MIPS64r6 builds using GCC versions older than GCC 8.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Vladimir Kondratiev <vladimir.kondratiev@intel.com>
Fixes: ebabcf17bcd7 ("MIPS: Implement __multi3 for GCC7 MIPS64r6 builds")
Patchwork: https://patchwork.linux-mips.org/patch/20297/
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 4.15+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/mips/lib/multi3.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/lib/multi3.c b/arch/mips/lib/multi3.c
index 111ad475aa0cd..4c2483f410c26 100644
--- a/arch/mips/lib/multi3.c
+++ b/arch/mips/lib/multi3.c
@@ -4,12 +4,12 @@
 #include "libgcc.h"
 
 /*
- * GCC 7 suboptimally generates __multi3 calls for mips64r6, so for that
- * specific case only we'll implement it here.
+ * GCC 7 & older can suboptimally generate __multi3 calls for mips64r6, so for
+ * that specific case only we implement that intrinsic here.
  *
  * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82981
  */
-#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6) && (__GNUC__ == 7)
+#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6) && (__GNUC__ < 8)
 
 /* multiply 64-bit values, low 64-bits returned */
 static inline long long notrace dmulu(long long a, long long b)

From 8f024a0003e54d2b597f781f5f28f3fef047cda7 Mon Sep 17 00:00:00 2001
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Thu, 2 Aug 2018 10:51:40 -0700
Subject: [PATCH 1776/1852] scsi: sysfs: Introduce
 sysfs_{un,}break_active_protection()

commit 2afc9166f79b8f6da5f347f48515215ceee4ae37 upstream.

Introduce these two functions and export them such that the next patch
can add calls to these functions from the SCSI core.

Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Acked-by: Tejun Heo <tj@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 fs/sysfs/file.c       | 44 +++++++++++++++++++++++++++++++++++++++++++
 include/linux/sysfs.h | 14 ++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c
index 39c75a86c67f1..666986b95c5d1 100644
--- a/fs/sysfs/file.c
+++ b/fs/sysfs/file.c
@@ -407,6 +407,50 @@ int sysfs_chmod_file(struct kobject *kobj, const struct attribute *attr,
 }
 EXPORT_SYMBOL_GPL(sysfs_chmod_file);
 
+/**
+ * sysfs_break_active_protection - break "active" protection
+ * @kobj: The kernel object @attr is associated with.
+ * @attr: The attribute to break the "active" protection for.
+ *
+ * With sysfs, just like kernfs, deletion of an attribute is postponed until
+ * all active .show() and .store() callbacks have finished unless this function
+ * is called. Hence this function is useful in methods that implement self
+ * deletion.
+ */
+struct kernfs_node *sysfs_break_active_protection(struct kobject *kobj,
+						  const struct attribute *attr)
+{
+	struct kernfs_node *kn;
+
+	kobject_get(kobj);
+	kn = kernfs_find_and_get(kobj->sd, attr->name);
+	if (kn)
+		kernfs_break_active_protection(kn);
+	return kn;
+}
+EXPORT_SYMBOL_GPL(sysfs_break_active_protection);
+
+/**
+ * sysfs_unbreak_active_protection - restore "active" protection
+ * @kn: Pointer returned by sysfs_break_active_protection().
+ *
+ * Undo the effects of sysfs_break_active_protection(). Since this function
+ * calls kernfs_put() on the kernfs node that corresponds to the 'attr'
+ * argument passed to sysfs_break_active_protection() that attribute may have
+ * been removed between the sysfs_break_active_protection() and
+ * sysfs_unbreak_active_protection() calls, it is not safe to access @kn after
+ * this function has returned.
+ */
+void sysfs_unbreak_active_protection(struct kernfs_node *kn)
+{
+	struct kobject *kobj = kn->parent->priv;
+
+	kernfs_unbreak_active_protection(kn);
+	kernfs_put(kn);
+	kobject_put(kobj);
+}
+EXPORT_SYMBOL_GPL(sysfs_unbreak_active_protection);
+
 /**
  * sysfs_remove_file_ns - remove an object attribute with a custom ns tag
  * @kobj: object we're acting for
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index 9c452f6db4383..2839d624d5ee0 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -238,6 +238,9 @@ int __must_check sysfs_create_files(struct kobject *kobj,
 				   const struct attribute **attr);
 int __must_check sysfs_chmod_file(struct kobject *kobj,
 				  const struct attribute *attr, umode_t mode);
+struct kernfs_node *sysfs_break_active_protection(struct kobject *kobj,
+						  const struct attribute *attr);
+void sysfs_unbreak_active_protection(struct kernfs_node *kn);
 void sysfs_remove_file_ns(struct kobject *kobj, const struct attribute *attr,
 			  const void *ns);
 bool sysfs_remove_file_self(struct kobject *kobj, const struct attribute *attr);
@@ -351,6 +354,17 @@ static inline int sysfs_chmod_file(struct kobject *kobj,
 	return 0;
 }
 
+static inline struct kernfs_node *
+sysfs_break_active_protection(struct kobject *kobj,
+			      const struct attribute *attr)
+{
+	return NULL;
+}
+
+static inline void sysfs_unbreak_active_protection(struct kernfs_node *kn)
+{
+}
+
 static inline void sysfs_remove_file_ns(struct kobject *kobj,
 					const struct attribute *attr,
 					const void *ns)

From 6ea52517115d227755cfa719f179fb429b231547 Mon Sep 17 00:00:00 2001
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Thu, 2 Aug 2018 10:51:41 -0700
Subject: [PATCH 1777/1852] scsi: core: Avoid that SCSI device removal through
 sysfs triggers a deadlock

commit 0ee223b2e1f67cb2de9c0e3247c510d846e74d63 upstream.

A long time ago the unfortunate decision was taken to add a self-deletion
attribute to the sysfs SCSI device directory. That decision was unfortunate
because self-deletion is really tricky. We can't drop that attribute
because widely used user space software depends on it, namely the
rescan-scsi-bus.sh script. Hence this patch that avoids that writing into
that attribute triggers a deadlock. See also commit 7973cbd9fbd9 ("[PATCH]
add sysfs attributes to scan and delete scsi_devices").

This patch avoids that self-removal triggers the following deadlock:

======================================================
WARNING: possible circular locking dependency detected
4.18.0-rc2-dbg+ #5 Not tainted
------------------------------------------------------
modprobe/6539 is trying to acquire lock:
000000008323c4cd (kn->count#202){++++}, at: kernfs_remove_by_name_ns+0x45/0x90

but task is already holding lock:
00000000a6ec2c69 (&shost->scan_mutex){+.+.}, at: scsi_remove_host+0x21/0x150 [scsi_mod]

which lock already depends on the new lock.

the existing dependency chain (in reverse order) is:

-> #1 (&shost->scan_mutex){+.+.}:
       __mutex_lock+0xfe/0xc70
       mutex_lock_nested+0x1b/0x20
       scsi_remove_device+0x26/0x40 [scsi_mod]
       sdev_store_delete+0x27/0x30 [scsi_mod]
       dev_attr_store+0x3e/0x50
       sysfs_kf_write+0x87/0xa0
       kernfs_fop_write+0x190/0x230
       __vfs_write+0xd2/0x3b0
       vfs_write+0x101/0x270
       ksys_write+0xab/0x120
       __x64_sys_write+0x43/0x50
       do_syscall_64+0x77/0x230
       entry_SYSCALL_64_after_hwframe+0x49/0xbe

-> #0 (kn->count#202){++++}:
       lock_acquire+0xd2/0x260
       __kernfs_remove+0x424/0x4a0
       kernfs_remove_by_name_ns+0x45/0x90
       remove_files.isra.1+0x3a/0x90
       sysfs_remove_group+0x5c/0xc0
       sysfs_remove_groups+0x39/0x60
       device_remove_attrs+0x82/0xb0
       device_del+0x251/0x580
       __scsi_remove_device+0x19f/0x1d0 [scsi_mod]
       scsi_forget_host+0x37/0xb0 [scsi_mod]
       scsi_remove_host+0x9b/0x150 [scsi_mod]
       sdebug_driver_remove+0x4b/0x150 [scsi_debug]
       device_release_driver_internal+0x241/0x360
       device_release_driver+0x12/0x20
       bus_remove_device+0x1bc/0x290
       device_del+0x259/0x580
       device_unregister+0x1a/0x70
       sdebug_remove_adapter+0x8b/0xf0 [scsi_debug]
       scsi_debug_exit+0x76/0xe8 [scsi_debug]
       __x64_sys_delete_module+0x1c1/0x280
       do_syscall_64+0x77/0x230
       entry_SYSCALL_64_after_hwframe+0x49/0xbe

other info that might help us debug this:

 Possible unsafe locking scenario:

       CPU0                    CPU1
       ----                    ----
  lock(&shost->scan_mutex);
                               lock(kn->count#202);
                               lock(&shost->scan_mutex);
  lock(kn->count#202);

 *** DEADLOCK ***

2 locks held by modprobe/6539:
 #0: 00000000efaf9298 (&dev->mutex){....}, at: device_release_driver_internal+0x68/0x360
 #1: 00000000a6ec2c69 (&shost->scan_mutex){+.+.}, at: scsi_remove_host+0x21/0x150 [scsi_mod]

stack backtrace:
CPU: 10 PID: 6539 Comm: modprobe Not tainted 4.18.0-rc2-dbg+ #5
Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.0.0-prebuilt.qemu-project.org 04/01/2014
Call Trace:
 dump_stack+0xa4/0xf5
 print_circular_bug.isra.34+0x213/0x221
 __lock_acquire+0x1a7e/0x1b50
 lock_acquire+0xd2/0x260
 __kernfs_remove+0x424/0x4a0
 kernfs_remove_by_name_ns+0x45/0x90
 remove_files.isra.1+0x3a/0x90
 sysfs_remove_group+0x5c/0xc0
 sysfs_remove_groups+0x39/0x60
 device_remove_attrs+0x82/0xb0
 device_del+0x251/0x580
 __scsi_remove_device+0x19f/0x1d0 [scsi_mod]
 scsi_forget_host+0x37/0xb0 [scsi_mod]
 scsi_remove_host+0x9b/0x150 [scsi_mod]
 sdebug_driver_remove+0x4b/0x150 [scsi_debug]
 device_release_driver_internal+0x241/0x360
 device_release_driver+0x12/0x20
 bus_remove_device+0x1bc/0x290
 device_del+0x259/0x580
 device_unregister+0x1a/0x70
 sdebug_remove_adapter+0x8b/0xf0 [scsi_debug]
 scsi_debug_exit+0x76/0xe8 [scsi_debug]
 __x64_sys_delete_module+0x1c1/0x280
 do_syscall_64+0x77/0x230
 entry_SYSCALL_64_after_hwframe+0x49/0xbe

See also https://www.mail-archive.com/linux-scsi@vger.kernel.org/msg54525.html.

Fixes: ac0ece9174ac ("scsi: use device_remove_file_self() instead of device_schedule_callback()")
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Tejun Heo <tj@kernel.org>
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
---
 drivers/scsi/scsi_sysfs.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index 4477e999ec707..8db0c48943d62 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -678,8 +678,24 @@ static ssize_t
 sdev_store_delete(struct device *dev, struct device_attribute *attr,
 		  const char *buf, size_t count)
 {
-	if (device_remove_file_self(dev, attr))
-		scsi_remove_device(to_scsi_device(dev));
+	struct kernfs_node *kn;
+
+	kn = sysfs_break_active_protection(&dev->kobj, &attr->attr);
+	WARN_ON_ONCE(!kn);
+	/*
+	 * Concurrent writes into the "delete" sysfs attribute may trigger
+	 * concurrent calls to device_remove_file() and scsi_remove_device().
+	 * device_remove_file() handles concurrent removal calls by
+	 * serializing these and by ignoring the second and later removal
+	 * attempts.  Concurrent calls of scsi_remove_device() are
+	 * serialized. The second and later calls of scsi_remove_device() are
+	 * ignored because the first call of that function changes the device
+	 * state into SDEV_DEL.
+	 */
+	device_remove_file(dev, attr);
+	scsi_remove_device(to_scsi_device(dev));
+	if (kn)
+		sysfs_unbreak_active_protection(kn);
 	return count;
 };
 static DEVICE_ATTR(delete, S_IWUSR, NULL, sdev_store_delete);

From c4299cda7666dc1450ba4fa042924b6819880353 Mon Sep 17 00:00:00 2001
From: Mike Christie <mchristi@redhat.com>
Date: Thu, 26 Jul 2018 12:13:49 -0500
Subject: [PATCH 1778/1852] iscsi target: fix session creation failure handling

commit 26abc916a898d34c5ad159315a2f683def3c5555 upstream.

The problem is that iscsi_login_zero_tsih_s1 sets conn->sess early in
iscsi_login_set_conn_values. If the function fails later like when we
alloc the idr it does kfree(sess) and leaves the conn->sess pointer set.
iscsi_login_zero_tsih_s1 then returns -Exyz and we then call
iscsi_target_login_sess_out and access the freed memory.

This patch has iscsi_login_zero_tsih_s1 either completely setup the
session or completely tear it down, so later in
iscsi_target_login_sess_out we can just check for it being set to the
connection.

Cc: stable@vger.kernel.org
Fixes: 0957627a9960 ("iscsi-target: Fix sess allocation leak in...")
Signed-off-by: Mike Christie <mchristi@redhat.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Matthew Wilcox <willy@infradead.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/target/iscsi/iscsi_target_login.c | 35 ++++++++++++++---------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c
index bc2cbffec27ec..63e54beed196b 100644
--- a/drivers/target/iscsi/iscsi_target_login.c
+++ b/drivers/target/iscsi/iscsi_target_login.c
@@ -323,8 +323,7 @@ static int iscsi_login_zero_tsih_s1(
 		pr_err("idr_alloc() for sess_idr failed\n");
 		iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR,
 				ISCSI_LOGIN_STATUS_NO_RESOURCES);
-		kfree(sess);
-		return -ENOMEM;
+		goto free_sess;
 	}
 
 	sess->creation_time = get_jiffies_64();
@@ -340,20 +339,28 @@ static int iscsi_login_zero_tsih_s1(
 				ISCSI_LOGIN_STATUS_NO_RESOURCES);
 		pr_err("Unable to allocate memory for"
 				" struct iscsi_sess_ops.\n");
-		kfree(sess);
-		return -ENOMEM;
+		goto remove_idr;
 	}
 
 	sess->se_sess = transport_init_session(TARGET_PROT_NORMAL);
 	if (IS_ERR(sess->se_sess)) {
 		iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR,
 				ISCSI_LOGIN_STATUS_NO_RESOURCES);
-		kfree(sess->sess_ops);
-		kfree(sess);
-		return -ENOMEM;
+		goto free_ops;
 	}
 
 	return 0;
+
+free_ops:
+	kfree(sess->sess_ops);
+remove_idr:
+	spin_lock_bh(&sess_idr_lock);
+	idr_remove(&sess_idr, sess->session_index);
+	spin_unlock_bh(&sess_idr_lock);
+free_sess:
+	kfree(sess);
+	conn->sess = NULL;
+	return -ENOMEM;
 }
 
 static int iscsi_login_zero_tsih_s2(
@@ -1142,13 +1149,13 @@ void iscsi_target_login_sess_out(struct iscsi_conn *conn,
 				   ISCSI_LOGIN_STATUS_INIT_ERR);
 	if (!zero_tsih || !conn->sess)
 		goto old_sess_out;
-	if (conn->sess->se_sess)
-		transport_free_session(conn->sess->se_sess);
-	if (conn->sess->session_index != 0) {
-		spin_lock_bh(&sess_idr_lock);
-		idr_remove(&sess_idr, conn->sess->session_index);
-		spin_unlock_bh(&sess_idr_lock);
-	}
+
+	transport_free_session(conn->sess->se_sess);
+
+	spin_lock_bh(&sess_idr_lock);
+	idr_remove(&sess_idr, conn->sess->session_index);
+	spin_unlock_bh(&sess_idr_lock);
+
 	kfree(conn->sess->sess_ops);
 	kfree(conn->sess);
 	conn->sess = NULL;

From 19fd7fc5c059368df18b5504aae6d724e0c28ff0 Mon Sep 17 00:00:00 2001
From: Scott Bauer <scott.bauer@intel.com>
Date: Thu, 26 Apr 2018 11:51:08 -0600
Subject: [PATCH 1779/1852] cdrom: Fix info leak/OOB read in
 cdrom_ioctl_drive_status

commit 8f3fafc9c2f0ece10832c25f7ffcb07c97a32ad4 upstream.

Like d88b6d04: "cdrom: information leak in cdrom_ioctl_media_changed()"

There is another cast from unsigned long to int which causes
a bounds check to fail with specially crafted input. The value is
then used as an index in the slot array in cdrom_slot_status().

Signed-off-by: Scott Bauer <scott.bauer@intel.com>
Signed-off-by: Scott Bauer <sbauer@plzdonthack.me>
Cc: stable@vger.kernel.org
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/cdrom/cdrom.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index 0151039bff052..1012b2cb6a165 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c
@@ -2526,7 +2526,7 @@ static int cdrom_ioctl_drive_status(struct cdrom_device_info *cdi,
 	if (!CDROM_CAN(CDC_SELECT_DISC) ||
 	    (arg == CDSL_CURRENT || arg == CDSL_NONE))
 		return cdi->ops->drive_status(cdi, CDSL_CURRENT);
-	if (((int)arg >= cdi->capacity))
+	if (arg >= cdi->capacity)
 		return -EINVAL;
 	return cdrom_slot_status(cdi, arg);
 }

From 28d9e2afe0cac880a8b44b32a70258c6f67d72d7 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 5 Sep 2018 09:18:41 +0200
Subject: [PATCH 1780/1852] Linux 4.4.154

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 419f256127d18..c033e03a5a33a 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 VERSION = 4
 PATCHLEVEL = 4
-SUBLEVEL = 153
+SUBLEVEL = 154
 EXTRAVERSION =
 NAME = Blurry Fish Butt
 

From 24167f61a346115c1b7ad550403ad699f2875f07 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 22 Aug 2018 21:51:24 +0800
Subject: [PATCH 1781/1852] video: rockchip: vpu: Fix div error in
 rkvdec_set_clk()

Only use rkvdec_set_clk() when devfreq is enabled and move static div to
vpu_service_info.

Fixes: b2849bcc8dfa ("video: rockchip: vpu: Add devfreq feature for rk322x")
Change-Id: I34fcdbe913a17511cc18388bf82b4df416ccd14d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 .../video/rockchip/vcodec/vcodec_service.c    | 82 ++++++++++++-------
 1 file changed, 52 insertions(+), 30 deletions(-)

diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index c7c3d38f057e0..c4ee73be92d33 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -379,6 +379,7 @@ struct vpu_service_info {
 	unsigned long vcodec_rate;
 	unsigned long core_rate;
 	unsigned long cabac_rate;
+	unsigned int thermal_div;
 
 	struct thermal_cooling_device *devfreq_cooling;
 	u32 static_coefficient;
@@ -799,6 +800,14 @@ static unsigned long get_div_rate(struct clk *clock, int divide)
 
 	return (rate / divide) + 1;
 }
+
+static void set_div_clk(struct clk *clock, int divide)
+{
+	struct clk *parent = clk_get_parent(clock);
+	unsigned long rate = clk_get_rate(parent);
+
+	clk_set_rate(clock, (rate / divide) + 1);
+}
 #endif
 
 static void vpu_service_power_off(struct vpu_service_info *pservice)
@@ -2315,8 +2324,6 @@ static void rkvdec_set_clk(struct vpu_service_info *pservice,
 			   unsigned long cabac_rate,
 			   unsigned int event)
 {
-	static unsigned int div;
-
 	mutex_lock(&pservice->set_clk_lock);
 
 	switch (event) {
@@ -2324,39 +2331,45 @@ static void rkvdec_set_clk(struct vpu_service_info *pservice,
 		clk_set_rate(pservice->aclk_vcodec, pservice->vcodec_rate);
 		clk_set_rate(pservice->clk_core, pservice->core_rate);
 		clk_set_rate(pservice->clk_cabac, pservice->cabac_rate);
-		div = 0;
+		pservice->thermal_div = 0;
 		break;
 	case EVENT_POWER_OFF:
 		clk_set_rate(pservice->aclk_vcodec, vcodec_rate);
 		clk_set_rate(pservice->clk_core, core_rate);
 		clk_set_rate(pservice->clk_cabac, cabac_rate);
-		div = 0;
+		pservice->thermal_div = 0;
 		break;
 	case EVENT_ADJUST:
-		if (!div) {
+		if (!pservice->thermal_div) {
 			clk_set_rate(pservice->aclk_vcodec, vcodec_rate);
 			clk_set_rate(pservice->clk_core, core_rate);
 			clk_set_rate(pservice->clk_cabac, cabac_rate);
 		} else {
-			clk_set_rate(pservice->aclk_vcodec, vcodec_rate / div);
-			clk_set_rate(pservice->clk_core, core_rate / div);
-			clk_set_rate(pservice->clk_cabac, cabac_rate / div);
+			clk_set_rate(pservice->aclk_vcodec,
+				     vcodec_rate / pservice->thermal_div);
+			clk_set_rate(pservice->clk_core,
+				     core_rate / pservice->thermal_div);
+			clk_set_rate(pservice->clk_cabac,
+				     cabac_rate / pservice->thermal_div);
 		}
 		pservice->vcodec_rate = vcodec_rate;
 		pservice->core_rate = core_rate;
 		pservice->cabac_rate = cabac_rate;
 		break;
 	case EVENT_THERMAL:
-		div = pservice->vcodec_rate / vcodec_rate;
-		if (div > 4)
-			div = 4;
-		if (div) {
+		pservice->thermal_div = pservice->vcodec_rate / vcodec_rate;
+		if (pservice->thermal_div > 4)
+			pservice->thermal_div = 4;
+		if (pservice->thermal_div) {
 			clk_set_rate(pservice->aclk_vcodec,
-				     pservice->vcodec_rate / div);
+				     pservice->vcodec_rate /
+				     pservice->thermal_div);
 			clk_set_rate(pservice->clk_core,
-				     pservice->core_rate / div);
+				     pservice->core_rate /
+				     pservice->thermal_div);
 			clk_set_rate(pservice->clk_cabac,
-				     pservice->cabac_rate / div);
+				     pservice->cabac_rate /
+				     pservice->thermal_div);
 		}
 		break;
 	}
@@ -2405,17 +2418,16 @@ static void vcodec_set_freq_rk322x(struct vpu_service_info *pservice,
 	 * vpu/vpu2 still only need to set aclk
 	 */
 	if (pservice->dev_id == VCODEC_DEVICE_ID_RKVDEC) {
-		rkvdec_set_clk(pservice,
-			       500 * MHZ,
-			       300 * MHZ,
-			       300 * MHZ,
-			       EVENT_ADJUST);
+		if (pservice->devfreq) {
+			rkvdec_set_clk(pservice,  500 * MHZ, 300 * MHZ,
+				       300 * MHZ, EVENT_ADJUST);
+		} else {
+			clk_set_rate(pservice->clk_core,  300 * MHZ);
+			clk_set_rate(pservice->clk_cabac, 300 * MHZ);
+			clk_set_rate(pservice->aclk_vcodec, 500 * MHZ);
+		}
 	} else {
-		rkvdec_set_clk(pservice,
-			       300 * MHZ,
-			       300 * MHZ,
-			       300 * MHZ,
-			       EVENT_ADJUST);
+		clk_set_rate(pservice->aclk_vcodec, 300 * MHZ);
 	}
 }
 
@@ -2561,11 +2573,21 @@ static void vcodec_reduce_freq_rk322x(struct vpu_service_info *pservice)
 	if (list_empty(&pservice->running)) {
 		unsigned long rate = clk_get_rate(pservice->aclk_vcodec);
 
-		rkvdec_set_clk(pservice,
-			       get_div_rate(pservice->aclk_vcodec, 32),
-			       get_div_rate(pservice->clk_core, 32),
-			       get_div_rate(pservice->clk_cabac, 32),
-			       EVENT_ADJUST);
+		if (pservice->devfreq) {
+			rkvdec_set_clk(pservice,
+				get_div_rate(pservice->aclk_vcodec, 32),
+				get_div_rate(pservice->clk_core, 32),
+				get_div_rate(pservice->clk_cabac, 32),
+				EVENT_ADJUST);
+		} else {
+			if (pservice->aclk_vcodec)
+				set_div_clk(pservice->aclk_vcodec, 32);
+			if (pservice->clk_core)
+				set_div_clk(pservice->clk_core, 32);
+			if (pservice->clk_cabac)
+				set_div_clk(pservice->clk_cabac, 32);
+		}
+
 		atomic_set(&pservice->freq_status, rate / 32);
 	}
 }

From 1b698ae7138347d8464315cbe52a9a6ab2471ff0 Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Fri, 7 Sep 2018 15:52:59 +0800
Subject: [PATCH 1782/1852] drm/bridge: synopsys: dw-hdmi: Fix crush when
 system suspend

If HDMI HPD detect delayed work won't be cancel, system will
crush because clk and PD has been disabled. So HDMI HPD detect
workqueue should be flushed when system suspend.

Change-Id: Idb8018c2efcffc3aee5fd80872f1270360809235
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index d57d999c50a5b..8cb2cb4e61a6a 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3844,6 +3844,8 @@ void dw_hdmi_suspend(struct device *dev)
 	if (hdmi->irq)
 		disable_irq(hdmi->irq);
 	mutex_unlock(&hdmi->mutex);
+	cancel_delayed_work(&hdmi->work);
+	flush_workqueue(hdmi->workqueue);
 	pinctrl_pm_select_sleep_state(dev);
 }
 EXPORT_SYMBOL_GPL(dw_hdmi_suspend);

From 500a8612725e753e10ac9f93ab290a03932f9558 Mon Sep 17 00:00:00 2001
From: Thierry Reding <treding@nvidia.com>
Date: Thu, 24 May 2018 16:09:07 +0200
Subject: [PATCH 1783/1852] UPSTREAM: net: stmmac: Use mutex instead of
 spinlock

Some drivers, such as DWC EQOS on Tegra, need to perform operations that
can sleep under this lock (clk_set_rate() in tegra_eqos_fix_speed()) for
proper operation. Since there is no need for this lock to be a spinlock,
convert it to a mutex instead.

Fixes: e6ea2d16fc61 ("net: stmmac: dwc-qos: Add Tegra186 support")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 29555fa3de865630570b5f53c847b953413daf1a)

Change-Id: I84200908368916c588f9154278486fcb1d22f8a0
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac.h  |  2 +-
 .../ethernet/stmicro/stmmac/stmmac_ethtool.c  | 16 +++++-----
 .../net/ethernet/stmicro/stmmac/stmmac_main.c | 32 ++++++++-----------
 3 files changed, 23 insertions(+), 27 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 68e6826e85d6c..02f7b2c5bcfec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -84,7 +84,7 @@ struct stmmac_priv {
 	struct net_device *dev;
 	struct device *device;
 	struct mac_device_info *hw;
-	spinlock_t lock;
+	struct mutex lock;
 
 	struct phy_device *phydev ____cacheline_aligned_in_smp;
 	int oldlink;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 2e51b816a7e81..0db15420902ed 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -347,17 +347,17 @@ static int stmmac_ethtool_setsettings(struct net_device *dev,
 			ADVERTISED_10baseT_Half |
 			ADVERTISED_10baseT_Full);
 
-		spin_lock(&priv->lock);
+		mutex_lock(&priv->lock);
 		if (priv->hw->mac->ctrl_ane)
 			priv->hw->mac->ctrl_ane(priv->hw, 1);
-		spin_unlock(&priv->lock);
+		mutex_unlock(&priv->lock);
 
 		return 0;
 	}
 
-	spin_lock(&priv->lock);
+	mutex_lock(&priv->lock);
 	rc = phy_ethtool_sset(phy, cmd);
-	spin_unlock(&priv->lock);
+	mutex_unlock(&priv->lock);
 
 	return rc;
 }
@@ -554,12 +554,12 @@ static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 {
 	struct stmmac_priv *priv = netdev_priv(dev);
 
-	spin_lock_irq(&priv->lock);
+	mutex_lock(&priv->lock);
 	if (device_can_wakeup(priv->device)) {
 		wol->supported = WAKE_MAGIC | WAKE_UCAST;
 		wol->wolopts = priv->wolopts;
 	}
-	spin_unlock_irq(&priv->lock);
+	mutex_unlock(&priv->lock);
 }
 
 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
@@ -588,9 +588,9 @@ static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 		disable_irq_wake(priv->wol_irq);
 	}
 
-	spin_lock_irq(&priv->lock);
+	mutex_lock(&priv->lock);
 	priv->wolopts = wol->wolopts;
-	spin_unlock_irq(&priv->lock);
+	mutex_unlock(&priv->lock);
 
 	return 0;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 4f88c2478bfa2..da97e20c0e18a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -271,7 +271,6 @@ static void stmmac_eee_ctrl_timer(unsigned long arg)
 bool stmmac_eee_init(struct stmmac_priv *priv)
 {
 	char *phy_bus_name = priv->plat->phy_bus_name;
-	unsigned long flags;
 	int interface = priv->plat->interface;
 	bool ret = false;
 
@@ -302,7 +301,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
 			 * changed).
 			 * In that case the driver disable own timers.
 			 */
-			spin_lock_irqsave(&priv->lock, flags);
+			mutex_lock(&priv->lock);
 			if (priv->eee_active) {
 				pr_debug("stmmac: disable EEE\n");
 				del_timer_sync(&priv->eee_ctrl_timer);
@@ -310,11 +309,11 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
 							     tx_lpi_timer);
 			}
 			priv->eee_active = 0;
-			spin_unlock_irqrestore(&priv->lock, flags);
+			mutex_unlock(&priv->lock);
 			goto out;
 		}
 		/* Activate the EEE and start timers */
-		spin_lock_irqsave(&priv->lock, flags);
+		mutex_lock(&priv->lock);
 		if (!priv->eee_active) {
 			priv->eee_active = 1;
 			setup_timer(&priv->eee_ctrl_timer,
@@ -331,7 +330,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
 		priv->hw->mac->set_eee_pls(priv->hw, priv->phydev->link);
 
 		ret = true;
-		spin_unlock_irqrestore(&priv->lock, flags);
+		mutex_unlock(&priv->lock);
 
 		pr_debug("stmmac: Energy-Efficient Ethernet initialized\n");
 	}
@@ -697,14 +696,13 @@ static void stmmac_adjust_link(struct net_device *dev)
 {
 	struct stmmac_priv *priv = netdev_priv(dev);
 	struct phy_device *phydev = priv->phydev;
-	unsigned long flags;
 	int new_state = 0;
 	unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 
 	if (phydev == NULL)
 		return;
 
-	spin_lock_irqsave(&priv->lock, flags);
+	mutex_lock(&priv->lock);
 
 	if (phydev->link) {
 		u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
@@ -772,7 +770,7 @@ static void stmmac_adjust_link(struct net_device *dev)
 	if (new_state && netif_msg_link(priv))
 		phy_print_status(phydev);
 
-	spin_unlock_irqrestore(&priv->lock, flags);
+	mutex_unlock(&priv->lock);
 
 	/* At this stage, it could be needed to setup the EEE or adjust some
 	 * MAC related HW registers.
@@ -2947,7 +2945,7 @@ int stmmac_dvr_probe(struct device *device,
 
 	netif_napi_add(ndev, &priv->napi, stmmac_poll, 64);
 
-	spin_lock_init(&priv->lock);
+	mutex_init(&priv->lock);
 	spin_lock_init(&priv->tx_lock);
 
 	/* If a specific clk_csr value is passed from the platform
@@ -3027,6 +3025,7 @@ int stmmac_dvr_remove(struct device *dev)
 	if (priv->pcs != STMMAC_PCS_RGMII && priv->pcs != STMMAC_PCS_TBI &&
 	    priv->pcs != STMMAC_PCS_RTBI)
 		stmmac_mdio_unregister(ndev);
+	mutex_destroy(&priv->lock);
 	free_netdev(ndev);
 
 	return 0;
@@ -3044,7 +3043,6 @@ int stmmac_suspend(struct device *dev)
 {
 	struct net_device *ndev = dev_get_drvdata(dev);
 	struct stmmac_priv *priv = netdev_priv(ndev);
-	unsigned long flags;
 
 	if (!ndev || !netif_running(ndev))
 		return 0;
@@ -3052,13 +3050,12 @@ int stmmac_suspend(struct device *dev)
 	if (priv->phydev)
 		phy_stop(priv->phydev);
 
+	mutex_lock(&priv->lock);
 	netif_device_detach(ndev);
 	netif_stop_queue(ndev);
 
 	napi_disable(&priv->napi);
 
-	spin_lock_irqsave(&priv->lock, flags);
-
 	/* Stop TX/RX DMA */
 	priv->hw->dma->stop_tx(priv->ioaddr);
 	priv->hw->dma->stop_rx(priv->ioaddr);
@@ -3074,7 +3071,7 @@ int stmmac_suspend(struct device *dev)
 		clk_disable(priv->pclk);
 		clk_disable(priv->stmmac_clk);
 	}
-	spin_unlock_irqrestore(&priv->lock, flags);
+	mutex_unlock(&priv->lock);
 
 	priv->oldlink = 0;
 	priv->speed = 0;
@@ -3093,7 +3090,6 @@ int stmmac_resume(struct device *dev)
 {
 	struct net_device *ndev = dev_get_drvdata(dev);
 	struct stmmac_priv *priv = netdev_priv(ndev);
-	unsigned long flags;
 
 	if (!netif_running(ndev))
 		return 0;
@@ -3105,9 +3101,9 @@ int stmmac_resume(struct device *dev)
 	 * from another devices (e.g. serial console).
 	 */
 	if (device_may_wakeup(priv->device)) {
-		spin_lock_irqsave(&priv->lock, flags);
+		mutex_lock(&priv->lock);
 		priv->hw->mac->pmt(priv->hw, 0);
-		spin_unlock_irqrestore(&priv->lock, flags);
+		mutex_unlock(&priv->lock);
 		priv->irq_wake = 0;
 	} else {
 		pinctrl_pm_select_default_state(priv->device);
@@ -3119,7 +3115,7 @@ int stmmac_resume(struct device *dev)
 			stmmac_mdio_reset(priv->mii);
 	}
 
-	spin_lock_irqsave(&priv->lock, flags);
+	mutex_lock(&priv->lock);
 
 	priv->cur_rx = 0;
 	priv->dirty_rx = 0;
@@ -3137,7 +3133,7 @@ int stmmac_resume(struct device *dev)
 
 	netif_device_attach(ndev);
 
-	spin_unlock_irqrestore(&priv->lock, flags);
+	mutex_unlock(&priv->lock);
 
 	if (priv->phydev)
 		phy_start(priv->phydev);

From 118019b24105cec21dcd02b23afd04373ee6c6a3 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Thu, 6 Sep 2018 15:10:50 +0800
Subject: [PATCH 1784/1852] arm: dts: rk3128x: Add rockchip,avs = <1> to the
 cpu0_opp_table node

Change-Id: I88206e2f6895b7e9e17cde417c39cb00a604886e
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/boot/dts/rk3128x.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3128x.dtsi b/arch/arm/boot/dts/rk3128x.dtsi
index c411d69f4fe35..25ebcb0f296a9 100644
--- a/arch/arm/boot/dts/rk3128x.dtsi
+++ b/arch/arm/boot/dts/rk3128x.dtsi
@@ -76,6 +76,7 @@
 		compatible = "operating-points-v2";
 		opp-shared;
 
+		rockchip,avs = <1>;
 		rockchip,leakage-scaling-sel = <
 			0   254   20
 		>;

From 9dfe3a0565fad630a8a86945937c913b567e525b Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Mon, 10 Sep 2018 10:49:37 +0800
Subject: [PATCH 1785/1852] ARM: dts: rockchip: correct pwm2 pin mux of rk312x

rk312x pwm2 pin mux should be gpio0_d4.

Change-Id: I499d771c498de39ad9502642865c91e73aa0d904
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/rk312x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index d0e7b12fb1066..af220394411b7 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -1411,7 +1411,7 @@
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
 			};
 		};
 

From e9f87923f9c8e88ccb729af2f43d935e73fcc3fb Mon Sep 17 00:00:00 2001
From: shengfei Xu <xsf@rock-chips.com>
Date: Tue, 24 Jul 2018 11:41:32 +0800
Subject: [PATCH 1786/1852] mfd: rk809: the sw1 interconvert with sw2

The patch is in line with the latest SPEC.

Change-Id: I874ba2bea37c72745c34ca926a06881f605746ac
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts    | 10 ++++------
 arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts    | 10 ++++------
 arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts | 11 +++++------
 arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts | 10 ++++------
 drivers/regulator/rk808-regulator.c                   |  8 ++++----
 5 files changed, 21 insertions(+), 28 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
index e9fc5c96950ab..2e474a950c627 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
@@ -571,15 +571,13 @@
 				};
 			};
 
-			vcc3v3_lcd: SWITCH_REG1 {
-				regulator-boot-on;
-				regulator-name = "vcc3v3_lcd";
+			vcc5v0_host: SWITCH_REG1 {
+				regulator-name = "vcc5v0_host";
 			};
 
-			vcc5v0_host: SWITCH_REG2 {
-				regulator-always-on;
+			vcc3v3_lcd: SWITCH_REG2 {
 				regulator-boot-on;
-				regulator-name = "vcc5v0_host";
+				regulator-name = "vcc3v3_lcd";
 			};
 		};
 
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
index b779c8c5cefb4..f7cea779f39ce 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
@@ -558,15 +558,13 @@
 				};
 			};
 
-			vcc3v3_lcd: SWITCH_REG1 {
-				regulator-boot-on;
-				regulator-name = "vcc3v3_lcd";
+			vcc5v0_host: SWITCH_REG1 {
+				regulator-name = "vcc5v0_host";
 			};
 
-			vcc5v0_host: SWITCH_REG2 {
-				regulator-always-on;
+			vcc3v3_lcd: SWITCH_REG2 {
 				regulator-boot-on;
-				regulator-name = "vcc5v0_host";
+				regulator-name = "vcc3v3_lcd";
 			};
 		};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
index 060602aa4ec83..4078487f87f4d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts
@@ -623,15 +623,14 @@
 				};
 			};
 
-			vcc3v3_lcd: SWITCH_REG1 {
-				regulator-boot-on;
-				regulator-name = "vcc3v3_lcd";
+
+			vcc5v0_host: SWITCH_REG1 {
+				regulator-name = "vcc5v0_host";
 			};
 
-			vcc5v0_host: SWITCH_REG2 {
-				regulator-always-on;
+			vcc3v3_lcd: SWITCH_REG2 {
 				regulator-boot-on;
-				regulator-name = "vcc5v0_host";
+				regulator-name = "vcc3v3_lcd";
 			};
 		};
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
index 6f22fdda9a1ff..18f812713c65e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
@@ -635,15 +635,13 @@
 				};
 			};
 
-			vcc3v3_lcd: SWITCH_REG1 {
-				regulator-boot-on;
-				regulator-name = "vcc3v3_lcd";
+			vcc5v0_host: SWITCH_REG1 {
+				regulator-name = "vcc5v0_host";
 			};
 
-			vcc5v0_host: SWITCH_REG2 {
-				regulator-always-on;
+			vcc3v3_lcd: SWITCH_REG2 {
 				regulator-boot-on;
-				regulator-name = "vcc5v0_host";
+				regulator-name = "vcc3v3_lcd";
 			};
 		};
 
diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c
index df992c516ac8d..04845af6e52a0 100644
--- a/drivers/regulator/rk808-regulator.c
+++ b/drivers/regulator/rk808-regulator.c
@@ -1473,12 +1473,12 @@ static const struct regulator_desc rk809_reg[] = {
 		   RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK,
 		   RK817_POWER_EN_REG(3), ENABLE_MASK(0), ENABLE_MASK(0),
 		   DISABLE_VAL(0), 400),
-	RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc8",
-			  RK817_POWER_EN_REG(3), ENABLE_MASK(3),
-			  ENABLE_MASK(3), DISABLE_VAL(3)),
-	RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc9",
+	RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc9",
 			  RK817_POWER_EN_REG(3), ENABLE_MASK(2),
 			  ENABLE_MASK(2), DISABLE_VAL(2)),
+	RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc8",
+			  RK817_POWER_EN_REG(3), ENABLE_MASK(3),
+			  ENABLE_MASK(3), DISABLE_VAL(3)),
 };
 
 static int rk808_regulator_dt_parse_pdata(struct device *dev,

From 589b3e4af3ba825fe80f48c6cf19fccbf9ca515f Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 10 Sep 2018 16:42:56 +0800
Subject: [PATCH 1787/1852] soc: rockchip: opp_select: do not use
 _of_get_opp_desc_node

Which is come from Linaro. Use of_parse_phandle directly.

Change-Id: I7ca9de46e4ec88011165862936c00cb1b354907f
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/soc/rockchip/rockchip_opp_select.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/rockchip/rockchip_opp_select.c b/drivers/soc/rockchip/rockchip_opp_select.c
index 5480a1d521a5c..07818b6bd758d 100644
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -1127,7 +1127,7 @@ int rockchip_init_opp_table(struct device *dev,
 	int ret = 0;
 
 	/* Get OPP descriptor node */
-	np = _of_get_opp_desc_node(dev);
+	np = of_parse_phandle(dev->of_node, "operating-points-v2", 0);
 	if (!np) {
 		dev_dbg(dev, "Failed to find operating-points-v2\n");
 		return -ENOENT;

From b82e27039577836377e9877199d603d65f4e7774 Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Thu, 6 Sep 2018 18:06:52 +0800
Subject: [PATCH 1788/1852] soc: rockchip: add CONFIG_ROCKCHIP_OPP for
 rockchip_opp_select.c

Change-Id: I0cde56d1ad7482c8d4e8b518fc49cc028da6501b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/soc/rockchip/Kconfig               |  7 ++
 drivers/soc/rockchip/Makefile              |  2 +-
 include/soc/rockchip/rockchip_opp_select.h | 95 ++++++++++++++++++++++
 3 files changed, 103 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/rockchip/Kconfig b/drivers/soc/rockchip/Kconfig
index 9de53e9228556..91ace34731563 100644
--- a/drivers/soc/rockchip/Kconfig
+++ b/drivers/soc/rockchip/Kconfig
@@ -30,6 +30,13 @@ config ROCKCHIP_DEVICEINFO
 	help
 	  Say y here if you have a deviceinfo partition.
 
+config ROCKCHIP_OPP
+	bool "Rockchip OPP select support"
+	depends on PM_DEVFREQ
+	default y
+	help
+	  Say y here to enable rockchip OPP support.
+
 config ROCKCHIP_PM_TEST
 	bool "Rockchip pm_test support"
 	default n
diff --git a/drivers/soc/rockchip/Makefile b/drivers/soc/rockchip/Makefile
index d44bc88fdcd81..6e1dec25a0286 100644
--- a/drivers/soc/rockchip/Makefile
+++ b/drivers/soc/rockchip/Makefile
@@ -9,10 +9,10 @@ obj-$(CONFIG_ROCKCHIP_PM_DOMAINS) += pm_domains.o
 obj-$(CONFIG_FIQ_DEBUGGER) += rk_fiq_debugger.o
 obj-$(CONFIG_MMC_DW_ROCKCHIP)	+= sdmmc_vendor_storage.o
 obj-$(CONFIG_RK_FLASH)	+= flash_vendor_storage.o
+obj-$(CONFIG_ROCKCHIP_OPP)	+= rockchip_opp_select.o
 obj-$(CONFIG_ROCKCHIP_PVTM)	+= rockchip_pvtm.o
 obj-$(CONFIG_ROCKCHIP_SUSPEND_MODE) += rockchip_pm_config.o
 obj-$(CONFIG_ROCK_CHIP_SOC_CAMERA) += rk_camera.o
 
 obj-y += rk_vendor_storage.o
 obj-y += rockchip-system-status.o
-obj-y += rockchip_opp_select.o
diff --git a/include/soc/rockchip/rockchip_opp_select.h b/include/soc/rockchip/rockchip_opp_select.h
index 65383555920c2..1324feebbf39c 100644
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -46,6 +46,7 @@ struct thermal_opp_info {
 	bool is_high_temp;
 };
 
+#ifdef CONFIG_ROCKCHIP_OPP
 void rockchip_of_get_lkg_sel(struct device *dev, struct device_node *np,
 			     char *lkg_name, int process,
 			     int *volt_sel, int *scale_sel);
@@ -79,5 +80,99 @@ int rockchip_dev_low_temp_adjust(struct thermal_opp_info *info,
 				 bool is_low);
 int rockchip_dev_high_temp_adjust(struct thermal_opp_info *info,
 				  bool is_high);
+#else
+static inline void rockchip_of_get_lkg_sel(struct device *dev,
+					   struct device_node *np,
+					   char *lkg_name, int process,
+					   int *volt_sel, int *scale_sel)
+{
+}
+
+static inline void rockchip_of_get_pvtm_sel(struct device *dev,
+					    struct device_node *np,
+					    char *reg_name, int process,
+					    int *volt_sel, int *scale_sel)
+{
+}
+
+static inline void rockchip_of_get_bin_sel(struct device *dev,
+					   struct device_node *np, int bin,
+					   int *scale_sel)
+{
+}
+
+static inline int rockchip_get_efuse_value(struct device_node *np,
+					   char *porp_name, int *value)
+{
+	return -ENOTSUPP;
+}
+
+static inline void rockchip_get_soc_info(struct device *dev,
+					 const struct of_device_id *matches,
+					 int *bin, int *process)
+{
+}
+
+static inline void rockchip_get_scale_volt_sel(struct device *dev,
+					       char *lkg_name, char *reg_name,
+					       int bin, int process, int *scale,
+					       int *volt_sel)
+{
+}
+
+static inline int rockchip_set_opp_info(struct device *dev, int process,
+					int volt_sel)
+{
+	return -ENOTSUPP;
+}
+
+static inline int rockchip_adjust_power_scale(struct device *dev, int scale)
+{
+	return -ENOTSUPP;
+}
+
+static inline int rockchip_init_opp_table(struct device *dev,
+					  const struct of_device_id *matches,
+					  char *lkg_name, char *reg_name)
+{
+	return -ENOTSUPP;
+}
+
+static inline struct thermal_opp_info *
+rockchip_register_thermal_notifier(struct device *dev,
+				   struct thermal_opp_device_data *data)
+{
+	return ERR_PTR(-ENOTSUPP);
+}
+
+static inline void
+rockchip_unregister_thermal_notifier(struct thermal_opp_info *info)
+{
+}
+
+static inline int rockchip_cpu_low_temp_adjust(struct thermal_opp_info *info,
+					       bool is_low)
+{
+	return -ENOTSUPP;
+}
+
+static inline int rockchip_cpu_high_temp_adjust(struct thermal_opp_info *info,
+						bool is_high)
+{
+	return -ENOTSUPP;
+}
+
+static inline int rockchip_dev_low_temp_adjust(struct thermal_opp_info *info,
+					       bool is_low)
+{
+	return -ENOTSUPP;
+}
+
+static inline int rockchip_dev_high_temp_adjust(struct thermal_opp_info *info,
+						bool is_high)
+{
+	return -ENOTSUPP;
+}
+#endif /* CONFIG_ROCKCHIP_OPP */
 
 #endif

From 85f6045add85a2f8f143e24cbbd5b61c2f6f6cc7 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Sat, 14 Jul 2018 11:58:54 +0800
Subject: [PATCH 1789/1852] media: rockchip: isp1: support for isp new version
 in rk3326

Change-Id: I226cc2d87053d1951252122c44b570030470ba42
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/Kconfig  |   2 +-
 drivers/media/platform/rockchip/isp1/Makefile |  12 +-
 .../media/platform/rockchip/isp1/isp_params.c | 714 ++++++++++++++----
 .../media/platform/rockchip/isp1/isp_params.h |  59 ++
 .../media/platform/rockchip/isp1/isp_stats.c  | 122 ++-
 .../media/platform/rockchip/isp1/isp_stats.h  |  21 +
 drivers/media/platform/rockchip/isp1/regs.h   | 386 ++++++----
 include/uapi/linux/rkisp1-config.h            |  10 +-
 8 files changed, 1007 insertions(+), 319 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/Kconfig b/drivers/media/platform/rockchip/isp1/Kconfig
index 014ec160ada7c..a2f654bc2fa8e 100644
--- a/drivers/media/platform/rockchip/isp1/Kconfig
+++ b/drivers/media/platform/rockchip/isp1/Kconfig
@@ -12,7 +12,7 @@ config VIDEO_ROCKCHIP_ISP1
 	  Support for ISP1 on the rockchip SoC.
 
 config VIDEO_ROCKCHIP_ISP_DPHY_SY
-	tristate "Rockchip Image Signal Processing v1 Unit driver"
+	tristate "Rockchip Image Signal Processing v1 Dphy driver"
 	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
 	depends on ARCH_ROCKCHIP || COMPILE_TEST
 	default n
diff --git a/drivers/media/platform/rockchip/isp1/Makefile b/drivers/media/platform/rockchip/isp1/Makefile
index 5cd1b48c0de12..d698660ac5009 100644
--- a/drivers/media/platform/rockchip/isp1/Makefile
+++ b/drivers/media/platform/rockchip/isp1/Makefile
@@ -2,9 +2,9 @@
 obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += video_rkisp1.o
 obj-$(CONFIG_VIDEO_ROCKCHIP_ISP_DPHY_SY) += mipi_dphy_sy.o
 
-video_rkisp1-objs 	   += 	rkisp1.o \
-				dev.o \
-				regs.o \
-				isp_stats.o \
-				isp_params.o \
-				capture.o
+video_rkisp1-objs += rkisp1.o \
+			dev.o \
+			regs.o \
+			isp_stats.o \
+			isp_params.o \
+			capture.o
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c b/drivers/media/platform/rockchip/isp1/isp_params.c
index 8529413388eee..8fa617a8192d1 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.c
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -93,8 +93,8 @@ static inline void isp_param_clear_bits(struct rkisp1_isp_params_vdev
 }
 
 /* ISP BP interface function */
-static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
-			const struct cifisp_dpcc_config *arg)
+static void isp_dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
+			    const struct cifisp_dpcc_config *arg)
 {
 	unsigned int i;
 	u32 mode;
@@ -132,8 +132,8 @@ static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
 }
 
 /* ISP black level subtraction interface function */
-static void bls_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_bls_config *arg)
+static void isp_bls_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_bls_config *arg)
 {
 	/* avoid to override the old enable value */
 	u32 new_control;
@@ -224,8 +224,8 @@ static void bls_config(struct rkisp1_isp_params_vdev *params_vdev,
 
 /* ISP LS correction interface function */
 static void
-__lsc_correct_matrix_config(struct rkisp1_isp_params_vdev *params_vdev,
-			    const struct cifisp_lsc_config *pconfig)
+isp_lsc_matrix_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			  const struct cifisp_lsc_config *pconfig)
 {
 	int i, j;
 	unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
@@ -250,50 +250,50 @@ __lsc_correct_matrix_config(struct rkisp1_isp_params_vdev *params_vdev,
 		 * DWORDs (2nd value of last DWORD unused)
 		 */
 		for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
-			data = CIF_ISP_LSC_TABLE_DATA(
+			data = CIF_ISP_LSC_TABLE_DATA_V10(
 					pconfig->r_data_tbl[i + j],
 					pconfig->r_data_tbl[i + j + 1]);
 			rkisp1_iowrite32(params_vdev, data,
 					 CIF_ISP_LSC_R_TABLE_DATA);
 
-			data = CIF_ISP_LSC_TABLE_DATA(
+			data = CIF_ISP_LSC_TABLE_DATA_V10(
 					pconfig->gr_data_tbl[i + j],
 					pconfig->gr_data_tbl[i + j + 1]);
 			rkisp1_iowrite32(params_vdev, data,
 					 CIF_ISP_LSC_GR_TABLE_DATA);
 
-			data = CIF_ISP_LSC_TABLE_DATA(
+			data = CIF_ISP_LSC_TABLE_DATA_V10(
 					pconfig->gb_data_tbl[i + j],
 					pconfig->gb_data_tbl[i + j + 1]);
 			rkisp1_iowrite32(params_vdev, data,
 					 CIF_ISP_LSC_GB_TABLE_DATA);
 
-			data = CIF_ISP_LSC_TABLE_DATA(
+			data = CIF_ISP_LSC_TABLE_DATA_V10(
 					pconfig->b_data_tbl[i + j],
 					pconfig->b_data_tbl[i + j + 1]);
 			rkisp1_iowrite32(params_vdev, data,
 					 CIF_ISP_LSC_B_TABLE_DATA);
 		}
 
-		data = CIF_ISP_LSC_TABLE_DATA(
+		data = CIF_ISP_LSC_TABLE_DATA_V10(
 				pconfig->r_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
 				CIF_ISP_LSC_R_TABLE_DATA);
 
-		data = CIF_ISP_LSC_TABLE_DATA(
+		data = CIF_ISP_LSC_TABLE_DATA_V10(
 				pconfig->gr_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
 				CIF_ISP_LSC_GR_TABLE_DATA);
 
-		data = CIF_ISP_LSC_TABLE_DATA(
+		data = CIF_ISP_LSC_TABLE_DATA_V10(
 				pconfig->gb_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
 				CIF_ISP_LSC_GB_TABLE_DATA);
 
-		data = CIF_ISP_LSC_TABLE_DATA(
+		data = CIF_ISP_LSC_TABLE_DATA_V10(
 				pconfig->b_data_tbl[i + j],
 				0);
 		rkisp1_iowrite32(params_vdev, data,
@@ -304,8 +304,89 @@ __lsc_correct_matrix_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
 }
 
-static void lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_lsc_config *arg)
+static void
+isp_lsc_matrix_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			  const struct cifisp_lsc_config *pconfig)
+{
+	int i, j;
+	unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
+	unsigned int data;
+
+	isp_lsc_status = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_STATUS);
+
+	/* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
+	sram_addr = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
+		     CIF_ISP_LSC_TABLE_ADDRESS_0 :
+		     CIF_ISP_LSC_TABLE_ADDRESS_153;
+	rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_R_TABLE_ADDR);
+	rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GR_TABLE_ADDR);
+	rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GB_TABLE_ADDR);
+	rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
+
+	/* program data tables (table size is 9 * 17 = 153) */
+	for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
+	     i += CIF_ISP_LSC_SECTORS_MAX) {
+		/*
+		 * 17 sectors with 2 values in one DWORD = 9
+		 * DWORDs (2nd value of last DWORD unused)
+		 */
+		for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
+			data = CIF_ISP_LSC_TABLE_DATA_V12(
+					pconfig->r_data_tbl[i + j],
+					pconfig->r_data_tbl[i + j + 1]);
+			rkisp1_iowrite32(params_vdev, data,
+					 CIF_ISP_LSC_R_TABLE_DATA);
+
+			data = CIF_ISP_LSC_TABLE_DATA_V12(
+					pconfig->gr_data_tbl[i + j],
+					pconfig->gr_data_tbl[i + j + 1]);
+			rkisp1_iowrite32(params_vdev, data,
+					 CIF_ISP_LSC_GR_TABLE_DATA);
+
+			data = CIF_ISP_LSC_TABLE_DATA_V12(
+					pconfig->gb_data_tbl[i + j],
+					pconfig->gb_data_tbl[i + j + 1]);
+			rkisp1_iowrite32(params_vdev, data,
+					 CIF_ISP_LSC_GB_TABLE_DATA);
+
+			data = CIF_ISP_LSC_TABLE_DATA_V12(
+					pconfig->b_data_tbl[i + j],
+					pconfig->b_data_tbl[i + j + 1]);
+			rkisp1_iowrite32(params_vdev, data,
+					 CIF_ISP_LSC_B_TABLE_DATA);
+		}
+
+		data = CIF_ISP_LSC_TABLE_DATA_V12(
+				pconfig->r_data_tbl[i + j],
+				0);
+		rkisp1_iowrite32(params_vdev, data,
+				CIF_ISP_LSC_R_TABLE_DATA);
+
+		data = CIF_ISP_LSC_TABLE_DATA_V12(
+				pconfig->gr_data_tbl[i + j],
+				0);
+		rkisp1_iowrite32(params_vdev, data,
+				CIF_ISP_LSC_GR_TABLE_DATA);
+
+		data = CIF_ISP_LSC_TABLE_DATA_V12(
+				pconfig->gb_data_tbl[i + j],
+				0);
+		rkisp1_iowrite32(params_vdev, data,
+				CIF_ISP_LSC_GB_TABLE_DATA);
+
+		data = CIF_ISP_LSC_TABLE_DATA_V12(
+				pconfig->b_data_tbl[i + j],
+				0);
+		rkisp1_iowrite32(params_vdev, data,
+				CIF_ISP_LSC_B_TABLE_DATA);
+	}
+	isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
+				CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
+	rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
+}
+
+static void isp_lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_lsc_config *arg)
 {
 	int i;
 	u32 lsc_ctrl;
@@ -315,7 +396,7 @@ static void lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
 	lsc_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_CTRL);
 	isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
 			     CIF_ISP_LSC_CTRL_ENA);
-	__lsc_correct_matrix_config(params_vdev, arg);
+	params_vdev->ops->lsc_matrix_config(params_vdev, arg);
 
 	for (i = 0; i < 4; i++) {
 		/* program x size tables */
@@ -356,8 +437,8 @@ static void lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
 }
 
 /* ISP Filtering function */
-static void flt_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_flt_config *arg)
+static void isp_flt_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_flt_config *arg)
 {
 	u32 filt_mode;
 
@@ -372,12 +453,6 @@ static void flt_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, arg->fac_sh1, CIF_ISP_FILT_FAC_SH1);
 	rkisp1_iowrite32(params_vdev, arg->lum_weight, CIF_ISP_FILT_LUM_WEIGHT);
 
-	rkisp1_iowrite32(params_vdev, (arg->mode ? CIF_ISP_FLT_MODE_DNR : 0) |
-			 CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
-			 CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
-			 CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1),
-			 CIF_ISP_FILT_MODE);
-
 	/* avoid to override the old enable value */
 	filt_mode = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_MODE);
 	filt_mode &= CIF_ISP_FLT_ENA;
@@ -390,8 +465,8 @@ static void flt_config(struct rkisp1_isp_params_vdev *params_vdev,
 }
 
 /* ISP demosaic interface function */
-static int bdm_config(struct rkisp1_isp_params_vdev *params_vdev,
-		      const struct cifisp_bdm_config *arg)
+static void isp_bdm_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_bdm_config *arg)
 {
 	u32 bdm_th;
 
@@ -401,12 +476,11 @@ static int bdm_config(struct rkisp1_isp_params_vdev *params_vdev,
 	bdm_th |= arg->demosaic_th & ~CIF_ISP_DEMOSAIC_BYPASS;
 	/* set demosaic threshold */
 	rkisp1_iowrite32(params_vdev, bdm_th, CIF_ISP_DEMOSAIC);
-	return 0;
 }
 
 /* ISP GAMMA correction interface function */
-static void sdg_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_sdg_config *arg)
+static void isp_sdg_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_sdg_config *arg)
 {
 	int i;
 
@@ -426,23 +500,42 @@ static void sdg_config(struct rkisp1_isp_params_vdev *params_vdev,
 }
 
 /* ISP GAMMA correction interface function */
-static void goc_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_goc_config *arg)
+static void isp_goc_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_goc_config *arg)
 {
 	int i;
 
 	isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
 			     CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
-	rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE);
+	rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V10);
 
-	for (i = 0; i < CIFISP_GAMMA_OUT_MAX_SAMPLES; i++)
+	for (i = 0; i < params_vdev->config->gamma_out_max_samples; i++)
 		rkisp1_iowrite32(params_vdev, arg->gamma_y[i],
-				 CIF_ISP_GAMMA_OUT_Y_0 + i * 4);
+				 CIF_ISP_GAMMA_OUT_Y_0_V10 + i * 4);
+}
+
+static void isp_goc_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_goc_config *arg)
+{
+	int i;
+	u32 value;
+
+	isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
+			     CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
+	rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V12);
+
+	for (i = 0; i < params_vdev->config->gamma_out_max_samples / 2; i++) {
+		value = CIF_ISP_GAMMA_REG_VALUE_V12(
+			arg->gamma_y[2 * i + 1],
+			arg->gamma_y[2 * i]);
+		rkisp1_iowrite32(params_vdev, value,
+				 CIF_ISP_GAMMA_OUT_Y_0_V12 + i * 4);
+	}
 }
 
 /* ISP Cross Talk */
-static void ctk_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_ctk_config *arg)
+static void isp_ctk_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_ctk_config *arg)
 {
 	rkisp1_iowrite32(params_vdev, arg->coeff0, CIF_ISP_CT_COEFF_0);
 	rkisp1_iowrite32(params_vdev, arg->coeff1, CIF_ISP_CT_COEFF_1);
@@ -458,7 +551,7 @@ static void ctk_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, arg->ct_offset_b, CIF_ISP_CT_OFFSET_B);
 }
 
-static void ctk_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
+static void isp_ctk_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
 {
 	if (en)
 		return;
@@ -480,8 +573,8 @@ static void ctk_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
 }
 
 /* ISP White Balance Mode */
-static void awb_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
-			    const struct cifisp_awb_meas_config *arg)
+static void isp_awb_meas_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_meas_config *arg)
 {
 	u32 reg_val = 0;
 	/* based on the mode,configure the awb module */
@@ -489,41 +582,108 @@ static void awb_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
 		/* Reference Cb and Cr */
 		rkisp1_iowrite32(params_vdev,
 				 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
-				 arg->awb_ref_cb, CIF_ISP_AWB_REF);
+				 arg->awb_ref_cb, CIF_ISP_AWB_REF_V10);
 		/* Yc Threshold */
 		rkisp1_iowrite32(params_vdev,
 				 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
 				 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
 				 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
-				 arg->min_c, CIF_ISP_AWB_THRESH);
+				 arg->min_c, CIF_ISP_AWB_THRESH_V10);
 	}
 
-	reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP);
+	reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
 	if (arg->enable_ymax_cmp)
 		reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
 	else
 		reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
-	rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP);
+	rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
 
 	/* window offset */
 	rkisp1_iowrite32(params_vdev,
-			 arg->awb_wnd.v_offs, CIF_ISP_AWB_WND_V_OFFS);
+			 arg->awb_wnd.v_offs, CIF_ISP_AWB_WND_V_OFFS_V10);
 	rkisp1_iowrite32(params_vdev,
-			 arg->awb_wnd.h_offs, CIF_ISP_AWB_WND_H_OFFS);
+			 arg->awb_wnd.h_offs, CIF_ISP_AWB_WND_H_OFFS_V10);
 	/* AWB window size */
 	rkisp1_iowrite32(params_vdev,
-			 arg->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE);
+			 arg->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE_V10);
 	rkisp1_iowrite32(params_vdev,
-			 arg->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE);
+			 arg->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE_V10);
 	/* Number of frames */
 	rkisp1_iowrite32(params_vdev,
-			 arg->frames, CIF_ISP_AWB_FRAMES);
+			 arg->frames, CIF_ISP_AWB_FRAMES_V10);
+}
+
+static void isp_awb_meas_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_meas_config *arg)
+{
+	u32 reg_val = 0;
+	/* based on the mode,configure the awb module */
+	if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
+		/* Reference Cb and Cr */
+		rkisp1_iowrite32(params_vdev,
+				 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
+				 arg->awb_ref_cb, CIF_ISP_AWB_REF_V12);
+		/* Yc Threshold */
+		rkisp1_iowrite32(params_vdev,
+				 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
+				 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
+				 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
+				 arg->min_c, CIF_ISP_AWB_THRESH_V12);
+	}
+
+	reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
+	if (arg->enable_ymax_cmp)
+		reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
+	else
+		reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
+	reg_val &= ~CIF_ISP_AWB_SET_FRAMES_MASK_V12;
+	reg_val |= CIF_ISP_AWB_SET_FRAMES_V12(arg->frames);
+	rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
+
+	/* window offset */
+	rkisp1_iowrite32(params_vdev,
+			 arg->awb_wnd.v_offs << 16 |
+			 arg->awb_wnd.h_offs,
+			 CIF_ISP_AWB_OFFS_V12);
+	/* AWB window size */
+	rkisp1_iowrite32(params_vdev,
+			 arg->awb_wnd.v_size << 16 |
+			 arg->awb_wnd.h_size,
+			 CIF_ISP_AWB_SIZE_V12);
+}
+
+static void isp_awb_meas_enable_v10(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_meas_config *arg, bool en)
+{
+	u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
+
+	/* switch off */
+	reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
+
+	if (en) {
+		if (arg->awb_mode == CIFISP_AWB_MODE_RGB)
+			reg_val |= CIF_ISP_AWB_MODE_RGB_EN;
+		else
+			reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
+
+		rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
+
+		/* Measurements require AWB block be active. */
+		/* TODO: need to enable here ? awb_gain_enable has done this */
+		isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
+				   CIF_ISP_CTRL_ISP_AWB_ENA);
+	} else {
+		rkisp1_iowrite32(params_vdev,
+				 reg_val, CIF_ISP_AWB_PROP_V10);
+		isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
+				     CIF_ISP_CTRL_ISP_AWB_ENA);
+	}
 }
 
-static void awb_meas_enable(struct rkisp1_isp_params_vdev *params_vdev,
-			    const struct cifisp_awb_meas_config *arg, bool en)
+static void isp_awb_meas_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_meas_config *arg, bool en)
 {
-	u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP);
+	u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
 
 	/* switch off */
 	reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
@@ -534,7 +694,7 @@ static void awb_meas_enable(struct rkisp1_isp_params_vdev *params_vdev,
 		else
 			reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
 
-		rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP);
+		rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
 
 		/* Measurements require AWB block be active. */
 		/* TODO: need to enable here ? awb_gain_enable has done this */
@@ -542,25 +702,36 @@ static void awb_meas_enable(struct rkisp1_isp_params_vdev *params_vdev,
 				   CIF_ISP_CTRL_ISP_AWB_ENA);
 	} else {
 		rkisp1_iowrite32(params_vdev,
-				 reg_val, CIF_ISP_AWB_PROP);
+				 reg_val, CIF_ISP_AWB_PROP_V12);
 		isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
 				     CIF_ISP_CTRL_ISP_AWB_ENA);
 	}
 }
 
-static void awb_gain_config(struct rkisp1_isp_params_vdev *params_vdev,
-			    const struct cifisp_awb_gain_config *arg)
+static void isp_awb_gain_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_gain_config *arg)
+{
+	rkisp1_iowrite32(params_vdev,
+			 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
+			 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V10);
+
+	rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
+			 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V10);
+}
+
+static void isp_awb_gain_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_awb_gain_config *arg)
 {
 	rkisp1_iowrite32(params_vdev,
 			 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
-			 arg->gain_green_b, CIF_ISP_AWB_GAIN_G);
+			 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V12);
 
 	rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
-			 arg->gain_blue, CIF_ISP_AWB_GAIN_RB);
+			 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V12);
 }
 
-static void aec_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_aec_config *arg)
+static void isp_aec_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_aec_config *arg)
 {
 	unsigned int block_hsize, block_vsize;
 	u32 exp_ctrl;
@@ -575,21 +746,55 @@ static void aec_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
 
 	rkisp1_iowrite32(params_vdev,
-			 arg->meas_window.h_offs, CIF_ISP_EXP_H_OFFSET);
+			 arg->meas_window.h_offs, CIF_ISP_EXP_H_OFFSET_V10);
+	rkisp1_iowrite32(params_vdev,
+			 arg->meas_window.v_offs, CIF_ISP_EXP_V_OFFSET_V10);
+
+	block_hsize = arg->meas_window.h_size / CIF_ISP_EXP_COLUMN_NUM_V10 - 1;
+	block_vsize = arg->meas_window.v_size / CIF_ISP_EXP_ROW_NUM_V10 - 1;
+
+	rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_H_SIZE_SET_V10(block_hsize),
+			 CIF_ISP_EXP_H_SIZE_V10);
+	rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_V_SIZE_SET_V10(block_vsize),
+			 CIF_ISP_EXP_V_SIZE_V10);
+}
+
+static void isp_aec_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_aec_config *arg)
+{
+	u32 exp_ctrl;
+	u32 block_hsize, block_vsize;
+	u32 wnd_num_idx = 1;
+	const u32 ae_wnd_num[] = {
+		5, 9, 15, 15
+	};
+
+	/* avoid to override the old enable value */
+	exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
+	exp_ctrl &= CIF_ISP_EXP_ENA;
+	if (arg->autostop)
+		exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
+	if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
+		exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
+	exp_ctrl |= CIF_ISP_EXP_CTRL_WNDNUM_SET_V12(wnd_num_idx);
+	rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
+
 	rkisp1_iowrite32(params_vdev,
-			 arg->meas_window.v_offs, CIF_ISP_EXP_V_OFFSET);
+			 CIF_ISP_EXP_V_OFFSET_SET_V12(arg->meas_window.v_offs) |
+			 CIF_ISP_EXP_H_OFFSET_SET_V12(arg->meas_window.h_offs),
+			 CIF_ISP_EXP_OFFS_V12);
 
-	block_hsize = arg->meas_window.h_size / CIF_ISP_EXP_COLUMN_NUM - 1;
-	block_vsize = arg->meas_window.v_size / CIF_ISP_EXP_ROW_NUM - 1;
+	block_hsize = arg->meas_window.h_size / ae_wnd_num[wnd_num_idx] - 1;
+	block_vsize = arg->meas_window.v_size / ae_wnd_num[wnd_num_idx] - 1;
 
-	rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_H_SIZE_SET(block_hsize),
-			 CIF_ISP_EXP_H_SIZE);
-	rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_V_SIZE_SET(block_vsize),
-			 CIF_ISP_EXP_V_SIZE);
+	rkisp1_iowrite32(params_vdev,
+			 CIF_ISP_EXP_V_SIZE_SET_V12(block_vsize) |
+			 CIF_ISP_EXP_H_SIZE_SET_V12(block_hsize),
+			 CIF_ISP_EXP_SIZE_V12);
 }
 
-static void cproc_config(struct rkisp1_isp_params_vdev *params_vdev,
-			 const struct cifisp_cproc_config *arg)
+static void isp_cproc_config(struct rkisp1_isp_params_vdev *params_vdev,
+			     const struct cifisp_cproc_config *arg)
 {
 	struct cifisp_isp_other_cfg *cur_other_cfg = &params_vdev->cur_params.others;
 	struct cifisp_ie_config *cur_ie_config = &cur_other_cfg->ie_config;
@@ -615,62 +820,142 @@ static void cproc_config(struct rkisp1_isp_params_vdev *params_vdev,
 	}
 }
 
-static void hst_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_hst_config *arg)
+static void isp_hst_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_hst_config *arg)
 {
 	unsigned int block_hsize, block_vsize;
-	static const u32 hist_weight_regs[] = {
-		CIF_ISP_HIST_WEIGHT_00TO30, CIF_ISP_HIST_WEIGHT_40TO21,
-		CIF_ISP_HIST_WEIGHT_31TO12, CIF_ISP_HIST_WEIGHT_22TO03,
-		CIF_ISP_HIST_WEIGHT_13TO43, CIF_ISP_HIST_WEIGHT_04TO34,
-		CIF_ISP_HIST_WEIGHT_44,
+	const u32 hist_weight_regs[] = {
+		CIF_ISP_HIST_WEIGHT_00TO30_V10, CIF_ISP_HIST_WEIGHT_40TO21_V10,
+		CIF_ISP_HIST_WEIGHT_31TO12_V10, CIF_ISP_HIST_WEIGHT_22TO03_V10,
+		CIF_ISP_HIST_WEIGHT_13TO43_V10, CIF_ISP_HIST_WEIGHT_04TO34_V10,
+		CIF_ISP_HIST_WEIGHT_44_V10,
 	};
 	int i;
 	const u8 *weight;
 	u32 hist_prop;
 
 	/* avoid to override the old enable value */
-	hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP);
-	hist_prop &= CIF_ISP_HIST_PROP_MODE_MASK;
-	hist_prop |= CIF_ISP_HIST_PREDIV_SET(arg->histogram_predivider);
-	rkisp1_iowrite32(params_vdev, hist_prop, CIF_ISP_HIST_PROP);
+	hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
+	hist_prop &= CIF_ISP_HIST_PROP_MODE_MASK_V10;
+	hist_prop |= CIF_ISP_HIST_PREDIV_SET_V10(arg->histogram_predivider);
+	rkisp1_iowrite32(params_vdev, hist_prop, CIF_ISP_HIST_PROP_V10);
 	rkisp1_iowrite32(params_vdev,
 			arg->meas_window.h_offs,
-			CIF_ISP_HIST_H_OFFS);
+			CIF_ISP_HIST_H_OFFS_V10);
 	rkisp1_iowrite32(params_vdev,
 			arg->meas_window.v_offs,
-			CIF_ISP_HIST_V_OFFS);
+			CIF_ISP_HIST_V_OFFS_V10);
 
-	block_hsize = arg->meas_window.h_size / CIF_ISP_HIST_COLUMN_NUM - 1;
-	block_vsize = arg->meas_window.v_size / CIF_ISP_HIST_ROW_NUM - 1;
+	block_hsize = arg->meas_window.h_size / CIF_ISP_HIST_COLUMN_NUM_V10 - 1;
+	block_vsize = arg->meas_window.v_size / CIF_ISP_HIST_ROW_NUM_V10 - 1;
 
-	rkisp1_iowrite32(params_vdev, block_hsize, CIF_ISP_HIST_H_SIZE);
-	rkisp1_iowrite32(params_vdev, block_vsize, CIF_ISP_HIST_V_SIZE);
+	rkisp1_iowrite32(params_vdev, block_hsize, CIF_ISP_HIST_H_SIZE_V10);
+	rkisp1_iowrite32(params_vdev, block_vsize, CIF_ISP_HIST_V_SIZE_V10);
 
 	weight = arg->hist_weight;
 	for (i = 0; i < ARRAY_SIZE(hist_weight_regs); ++i, weight += 4)
-		rkisp1_iowrite32(params_vdev, CIF_ISP_HIST_WEIGHT_SET(
+		rkisp1_iowrite32(params_vdev, CIF_ISP_HIST_WEIGHT_SET_V10(
 				 weight[0], weight[1], weight[2], weight[3]),
 				 hist_weight_regs[i]);
 }
 
-static void hst_enable(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_hst_config *arg, bool en)
+static void isp_hst_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_hst_config *arg)
+{
+	u32 i, j;
+	u32 value;
+	u32 hist_ctrl;
+	u32 block_hsize, block_vsize;
+	u32 wnd_num_idx, hist_weight_num;
+	u8 weight15x15[CIF_ISP_HIST_WEIGHT_REG_SIZE_V12];
+	const u32 hist_wnd_num[] = {
+		5, 9, 15, 15
+	};
+
+	/* now we just support 9x9 window */
+	wnd_num_idx = 1;
+	memset(weight15x15, 0x00, sizeof(weight15x15));
+	/* avoid to override the old enable value */
+	hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
+	hist_ctrl &= CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
+		     CIF_ISP_HIST_CTRL_EN_MASK_V12;
+	hist_ctrl = hist_ctrl |
+		    CIF_ISP_HIST_CTRL_INTRSEL_SET_V12(1) |
+		    CIF_ISP_HIST_CTRL_DATASEL_SET_V12(0) |
+		    CIF_ISP_HIST_CTRL_WATERLINE_SET_V12(0) |
+		    CIF_ISP_HIST_CTRL_AUTOSTOP_SET_V12(0) |
+		    CIF_ISP_HIST_CTRL_WNDNUM_SET_V12(1) |
+		    CIF_ISP_HIST_CTRL_STEPSIZE_SET_V12(arg->histogram_predivider);
+	rkisp1_iowrite32(params_vdev, hist_ctrl, CIF_ISP_HIST_CTRL_V12);
+
+	rkisp1_iowrite32(params_vdev,
+			 CIF_ISP_HIST_OFFS_SET_V12(arg->meas_window.h_offs,
+						   arg->meas_window.v_offs),
+			 CIF_ISP_HIST_OFFS_V12);
+
+	block_hsize = arg->meas_window.h_size / hist_wnd_num[wnd_num_idx] - 1;
+	block_vsize = arg->meas_window.v_size / hist_wnd_num[wnd_num_idx] - 1;
+	rkisp1_iowrite32(params_vdev,
+			 CIF_ISP_HIST_SIZE_SET_V12(block_hsize, block_vsize),
+			 CIF_ISP_HIST_SIZE_V12);
+
+	for (i = 0; i < hist_wnd_num[wnd_num_idx]; i++) {
+		for (j = 0; j < hist_wnd_num[wnd_num_idx]; j++) {
+			weight15x15[i * CIF_ISP_HIST_ROW_NUM_V12 + j] =
+				arg->hist_weight[i * hist_wnd_num[wnd_num_idx] + j];
+		}
+	}
+
+	hist_weight_num = CIF_ISP_HIST_WEIGHT_REG_SIZE_V12;
+	for (i = 0; i < (hist_weight_num / 4); i++) {
+		value = CIF_ISP_HIST_WEIGHT_SET_V12(
+				 weight15x15[4 * i + 0],
+				 weight15x15[4 * i + 1],
+				 weight15x15[4 * i + 2],
+				 weight15x15[4 * i + 3]);
+		rkisp1_iowrite32(params_vdev, value,
+				 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
+	}
+	value = CIF_ISP_HIST_WEIGHT_SET_V12(
+				 weight15x15[4 * i + 0], 0, 0, 0);
+	rkisp1_iowrite32(params_vdev, value,
+				 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
+}
+
+static void isp_hst_enable_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_hst_config *arg, bool en)
 {
-	if (en)	{
-		u32 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP);
+	if (en) {
+		u32 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
 
-		hist_prop &= ~CIF_ISP_HIST_PROP_MODE_MASK;
+		hist_prop &= ~CIF_ISP_HIST_PROP_MODE_MASK_V10;
 		hist_prop |= arg->mode;
-		isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP, hist_prop);
+		isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10, hist_prop);
+	} else {
+		isp_param_clear_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
+				CIF_ISP_HIST_PROP_MODE_MASK_V10);
+	}
+}
+
+static void isp_hst_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_hst_config *arg, bool en)
+{
+	if (en) {
+		u32 hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
+
+		hist_ctrl &= ~CIF_ISP_HIST_CTRL_MODE_MASK_V12;
+		hist_ctrl |= CIF_ISP_HIST_CTRL_MODE_SET_V12(arg->mode);
+		hist_ctrl |= CIF_ISP_HIST_CTRL_EN_SET_V12(1);
+		isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12, hist_ctrl);
 	} else {
-		isp_param_clear_bits(params_vdev, CIF_ISP_HIST_PROP,
-				CIF_ISP_HIST_PROP_MODE_MASK);
+		isp_param_clear_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
+				CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
+				CIF_ISP_HIST_CTRL_EN_MASK_V12);
 	}
 }
 
-static void afm_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_afc_config *arg)
+static void isp_afm_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_afc_config *arg)
 {
 	int i;
 	size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
@@ -698,8 +983,46 @@ static void afm_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
 }
 
-static void ie_config(struct rkisp1_isp_params_vdev *params_vdev,
-		      const struct cifisp_ie_config *arg)
+static void isp_afm_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
+			       const struct cifisp_afc_config *arg)
+{
+	unsigned int i;
+	u32 lum_var_shift, afm_var_shift;
+	size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
+				  arg->num_afm_win);
+	u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
+
+	/* Switch off to configure. */
+	isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
+
+	for (i = 0; i < num_of_win; i++) {
+		rkisp1_iowrite32(params_vdev,
+				 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_offs) |
+				 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_offs),
+				 CIF_ISP_AFM_LT_A + i * 8);
+		rkisp1_iowrite32(params_vdev,
+				 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_size +
+						      arg->afm_win[i].h_offs) |
+				 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_size +
+						      arg->afm_win[i].v_offs),
+				 CIF_ISP_AFM_RB_A + i * 8);
+	}
+	rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
+
+	lum_var_shift = CIF_ISP_AFM_GET_LUM_SHIFT_a_V12(arg->var_shift);
+	afm_var_shift = CIF_ISP_AFM_GET_AFM_SHIFT_a_V12(arg->var_shift);
+	rkisp1_iowrite32(params_vdev,
+		CIF_ISP_AFM_SET_SHIFT_a_V12(lum_var_shift, afm_var_shift) |
+		CIF_ISP_AFM_SET_SHIFT_b_V12(lum_var_shift, afm_var_shift) |
+		CIF_ISP_AFM_SET_SHIFT_c_V12(lum_var_shift, afm_var_shift),
+		CIF_ISP_AFM_VAR_SHIFT);
+
+	/* restore afm status */
+	rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
+}
+
+static void isp_ie_config(struct rkisp1_isp_params_vdev *params_vdev,
+			  const struct cifisp_ie_config *arg)
 {
 	u32 eff_ctrl;
 
@@ -757,7 +1080,7 @@ static void ie_config(struct rkisp1_isp_params_vdev *params_vdev,
 	rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
 }
 
-static void ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
+static void isp_ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
 {
 	if (en) {
 		isp_param_set_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
@@ -772,20 +1095,20 @@ static void ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
 	}
 }
 
-static void csm_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       bool full_range)
+static void isp_csm_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   bool full_range)
 {
-	static const u16 full_range_coeff[] = {
+	const u16 full_range_coeff[] = {
 		0x0026, 0x004b, 0x000f,
 		0x01ea, 0x01d6, 0x0040,
 		0x0040, 0x01ca, 0x01f6
 	};
-	static const u16 limited_range_coeff[] = {
+	const u16 limited_range_coeff[] = {
 		0x0021, 0x0040, 0x000d,
 		0x01ed, 0x01db, 0x0038,
 		0x0038, 0x01d1, 0x01f7,
 	};
-	int i;
+	unsigned int i;
 
 	if (full_range) {
 		for (i = 0; i < ARRAY_SIZE(full_range_coeff); i++)
@@ -807,8 +1130,8 @@ static void csm_config(struct rkisp1_isp_params_vdev *params_vdev,
 }
 
 /* ISP De-noise Pre-Filter(DPF) function */
-static void dpf_config(struct rkisp1_isp_params_vdev *params_vdev,
-		       const struct cifisp_dpf_config *arg)
+static void isp_dpf_config(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_dpf_config *arg)
 {
 	unsigned int isp_dpf_mode;
 	unsigned int spatial_coeff;
@@ -893,19 +1216,82 @@ static void dpf_config(struct rkisp1_isp_params_vdev *params_vdev,
 			CIF_ISP_DPF_S_WEIGHT_RB_5_6);
 }
 
-static void dpf_strength_config(struct rkisp1_isp_params_vdev *params_vdev,
-				const struct cifisp_dpf_strength_config *arg)
+static void isp_dpf_strength_config(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_dpf_strength_config *arg)
 {
 	rkisp1_iowrite32(params_vdev, arg->b, CIF_ISP_DPF_STRENGTH_B);
 	rkisp1_iowrite32(params_vdev, arg->g, CIF_ISP_DPF_STRENGTH_G);
 	rkisp1_iowrite32(params_vdev, arg->r, CIF_ISP_DPF_STRENGTH_R);
 }
 
+static struct rkisp1_isp_params_ops rkisp1_v10_isp_params_ops = {
+	.dpcc_config = isp_dpcc_config,
+	.bls_config = isp_bls_config,
+	.lsc_config = isp_lsc_config,
+	.lsc_matrix_config = isp_lsc_matrix_config_v10,
+	.flt_config = isp_flt_config,
+	.bdm_config = isp_bdm_config,
+	.sdg_config = isp_sdg_config,
+	.goc_config = isp_goc_config_v10,
+	.ctk_config = isp_ctk_config,
+	.ctk_enable = isp_ctk_enable,
+	.awb_meas_config = isp_awb_meas_config_v10,
+	.awb_meas_enable = isp_awb_meas_enable_v10,
+	.awb_gain_config = isp_awb_gain_config_v10,
+	.aec_config = isp_aec_config_v10,
+	.cproc_config = isp_cproc_config,
+	.hst_config = isp_hst_config_v10,
+	.hst_enable = isp_hst_enable_v10,
+	.afm_config = isp_afm_config_v10,
+	.ie_config = isp_ie_config,
+	.ie_enable = isp_ie_enable,
+	.csm_config = isp_csm_config,
+	.dpf_config = isp_dpf_config,
+	.dpf_strength_config = isp_dpf_strength_config,
+};
+
+static struct rkisp1_isp_params_ops rkisp1_v12_isp_params_ops = {
+	.dpcc_config = isp_dpcc_config,
+	.bls_config = isp_bls_config,
+	.lsc_config = isp_lsc_config,
+	.lsc_matrix_config = isp_lsc_matrix_config_v12,
+	.flt_config = isp_flt_config,
+	.bdm_config = isp_bdm_config,
+	.sdg_config = isp_sdg_config,
+	.goc_config = isp_goc_config_v12,
+	.ctk_config = isp_ctk_config,
+	.ctk_enable = isp_ctk_enable,
+	.awb_meas_config = isp_awb_meas_config_v12,
+	.awb_meas_enable = isp_awb_meas_enable_v12,
+	.awb_gain_config = isp_awb_gain_config_v12,
+	.aec_config = isp_aec_config_v12,
+	.cproc_config = isp_cproc_config,
+	.hst_config = isp_hst_config_v12,
+	.hst_enable = isp_hst_enable_v12,
+	.afm_config = isp_afm_config_v12,
+	.ie_config = isp_ie_config,
+	.ie_enable = isp_ie_enable,
+	.csm_config = isp_csm_config,
+	.dpf_config = isp_dpf_config,
+	.dpf_strength_config = isp_dpf_strength_config,
+};
+
+static struct rkisp1_isp_params_config rkisp1_v10_isp_params_config = {
+	.gamma_out_max_samples = 17,
+	.hst_weight_grids_size = 28,
+};
+
+static struct rkisp1_isp_params_config rkisp1_v12_isp_params_config = {
+	.gamma_out_max_samples = 34,
+	.hst_weight_grids_size = 81,
+};
+
 static __maybe_unused
 void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 			    const struct rkisp1_isp_params_cfg *new_params)
 {
 	unsigned int module_en_update, module_cfg_update, module_ens;
+	struct rkisp1_isp_params_ops *ops = params_vdev->ops;
 
 	module_en_update = new_params->module_en_update;
 	module_cfg_update = new_params->module_cfg_update;
@@ -915,8 +1301,8 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_DPCC)) {
 		/*update dpc config */
 		if ((module_cfg_update & CIFISP_MODULE_DPCC))
-			dpcc_config(params_vdev,
-					&new_params->others.dpcc_config);
+			ops->dpcc_config(params_vdev,
+					 &new_params->others.dpcc_config);
 
 		if (module_en_update & CIFISP_MODULE_DPCC) {
 			if (!!(module_ens & CIFISP_MODULE_DPCC))
@@ -934,7 +1320,7 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_BLS)) {
 		/* update bls config */
 		if ((module_cfg_update & CIFISP_MODULE_BLS))
-			bls_config(params_vdev, &new_params->others.bls_config);
+			ops->bls_config(params_vdev, &new_params->others.bls_config);
 
 		if (module_en_update & CIFISP_MODULE_BLS) {
 			if (!!(module_ens & CIFISP_MODULE_BLS))
@@ -952,7 +1338,7 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_SDG)) {
 		/* update sdg config */
 		if ((module_cfg_update & CIFISP_MODULE_SDG))
-			sdg_config(params_vdev, &new_params->others.sdg_config);
+			ops->sdg_config(params_vdev, &new_params->others.sdg_config);
 
 		if (module_en_update & CIFISP_MODULE_SDG) {
 			if (!!(module_ens & CIFISP_MODULE_SDG))
@@ -970,7 +1356,7 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_LSC)) {
 		/* update lsc config */
 		if ((module_cfg_update & CIFISP_MODULE_LSC))
-			lsc_config(params_vdev, &new_params->others.lsc_config);
+			ops->lsc_config(params_vdev, &new_params->others.lsc_config);
 
 		if (module_en_update & CIFISP_MODULE_LSC) {
 			if (!!(module_ens & CIFISP_MODULE_LSC))
@@ -988,8 +1374,8 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
 		/* update awb gains */
 		if ((module_cfg_update & CIFISP_MODULE_AWB_GAIN))
-			awb_gain_config(params_vdev,
-					&new_params->others.awb_gain_config);
+			ops->awb_gain_config(params_vdev,
+					     &new_params->others.awb_gain_config);
 
 		if (module_en_update & CIFISP_MODULE_AWB_GAIN) {
 			if (!!(module_ens & CIFISP_MODULE_AWB_GAIN))
@@ -1007,7 +1393,7 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_BDM)) {
 		/* update bdm config */
 		if ((module_cfg_update & CIFISP_MODULE_BDM))
-			bdm_config(params_vdev, &new_params->others.bdm_config);
+			ops->bdm_config(params_vdev, &new_params->others.bdm_config);
 
 		if (module_en_update & CIFISP_MODULE_BDM) {
 			if (!!(module_ens & CIFISP_MODULE_BDM))
@@ -1025,7 +1411,7 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_FLT)) {
 		/* update filter config */
 		if ((module_cfg_update & CIFISP_MODULE_FLT))
-			flt_config(params_vdev, &new_params->others.flt_config);
+			ops->flt_config(params_vdev, &new_params->others.flt_config);
 
 		if (module_en_update & CIFISP_MODULE_FLT) {
 			if (!!(module_ens & CIFISP_MODULE_FLT))
@@ -1043,18 +1429,18 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_CTK)) {
 		/* update ctk config */
 		if ((module_cfg_update & CIFISP_MODULE_CTK))
-			ctk_config(params_vdev, &new_params->others.ctk_config);
+			ops->ctk_config(params_vdev, &new_params->others.ctk_config);
 
 		if (module_en_update & CIFISP_MODULE_CTK)
-			ctk_enable(params_vdev,
-				   !!(module_ens & CIFISP_MODULE_CTK));
+			ops->ctk_enable(params_vdev,
+					!!(module_ens & CIFISP_MODULE_CTK));
 	}
 
 	if ((module_en_update & CIFISP_MODULE_GOC) ||
 	    (module_cfg_update & CIFISP_MODULE_GOC)) {
 		/* update goc config */
 		if ((module_cfg_update & CIFISP_MODULE_GOC))
-			goc_config(params_vdev, &new_params->others.goc_config);
+			ops->goc_config(params_vdev, &new_params->others.goc_config);
 
 		if (module_en_update & CIFISP_MODULE_GOC) {
 			if (!!(module_ens & CIFISP_MODULE_GOC))
@@ -1072,8 +1458,8 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_CPROC)) {
 		/* update cproc config */
 		if ((module_cfg_update & CIFISP_MODULE_CPROC)) {
-			cproc_config(params_vdev,
-				     &new_params->others.cproc_config);
+			ops->cproc_config(params_vdev,
+					  &new_params->others.cproc_config);
 
 		}
 
@@ -1094,18 +1480,18 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_IE)) {
 		/* update ie config */
 		if ((module_cfg_update & CIFISP_MODULE_IE))
-			ie_config(params_vdev, &new_params->others.ie_config);
+			ops->ie_config(params_vdev, &new_params->others.ie_config);
 
 		if (module_en_update & CIFISP_MODULE_IE)
-			ie_enable(params_vdev,
-				   !!(module_ens & CIFISP_MODULE_IE));
+			ops->ie_enable(params_vdev,
+				       !!(module_ens & CIFISP_MODULE_IE));
 	}
 
 	if ((module_en_update & CIFISP_MODULE_DPF) ||
 	    (module_cfg_update & CIFISP_MODULE_DPF)) {
 		/* update dpf  config */
 		if ((module_cfg_update & CIFISP_MODULE_DPF))
-			dpf_config(params_vdev, &new_params->others.dpf_config);
+			ops->dpf_config(params_vdev, &new_params->others.dpf_config);
 
 		if (module_en_update & CIFISP_MODULE_DPF) {
 			if (!!(module_ens & CIFISP_MODULE_DPF))
@@ -1122,8 +1508,8 @@ void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
 	if ((module_en_update & CIFISP_MODULE_DPF_STRENGTH) ||
 	    (module_cfg_update & CIFISP_MODULE_DPF_STRENGTH)) {
 		/* update dpf strength config */
-		dpf_strength_config(params_vdev,
-				    &new_params->others.dpf_strength_config);
+		ops->dpf_strength_config(params_vdev,
+					 &new_params->others.dpf_strength_config);
 	}
 }
 
@@ -1132,6 +1518,7 @@ void __isp_isr_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
 			   struct  rkisp1_isp_params_cfg *new_params)
 {
 	unsigned int module_en_update, module_cfg_update, module_ens;
+	struct rkisp1_isp_params_ops *ops = params_vdev->ops;
 
 	module_en_update = new_params->module_en_update;
 	module_cfg_update = new_params->module_cfg_update;
@@ -1141,20 +1528,20 @@ void __isp_isr_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_AWB)) {
 		/* update awb config */
 		if ((module_cfg_update & CIFISP_MODULE_AWB))
-			awb_meas_config(params_vdev,
-					&new_params->meas.awb_meas_config);
+			ops->awb_meas_config(params_vdev,
+					     &new_params->meas.awb_meas_config);
 
 		if (module_en_update & CIFISP_MODULE_AWB)
-			awb_meas_enable(params_vdev,
-					&new_params->meas.awb_meas_config,
-					!!(module_ens & CIFISP_MODULE_AWB));
+			ops->awb_meas_enable(params_vdev,
+					     &new_params->meas.awb_meas_config,
+					     !!(module_ens & CIFISP_MODULE_AWB));
 	}
 
 	if ((module_en_update & CIFISP_MODULE_AFC) ||
 	    (module_cfg_update & CIFISP_MODULE_AFC)) {
 		/* update afc config */
 		if ((module_cfg_update & CIFISP_MODULE_AFC))
-			afm_config(params_vdev, &new_params->meas.afc_config);
+			ops->afm_config(params_vdev, &new_params->meas.afc_config);
 
 		if (module_en_update & CIFISP_MODULE_AFC) {
 			if (!!(module_ens & CIFISP_MODULE_AFC))
@@ -1172,19 +1559,19 @@ void __isp_isr_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
 	    (module_cfg_update & CIFISP_MODULE_HST)) {
 		/* update hst config */
 		if ((module_cfg_update & CIFISP_MODULE_HST))
-			hst_config(params_vdev, &new_params->meas.hst_config);
+			ops->hst_config(params_vdev, &new_params->meas.hst_config);
 
 		if (module_en_update & CIFISP_MODULE_HST)
-			hst_enable(params_vdev,
-				   &new_params->meas.hst_config,
-				   !!(module_ens & CIFISP_MODULE_HST));
+			ops->hst_enable(params_vdev,
+					&new_params->meas.hst_config,
+					!!(module_ens & CIFISP_MODULE_HST));
 	}
 
 	if ((module_en_update & CIFISP_MODULE_AEC) ||
 	    (module_cfg_update & CIFISP_MODULE_AEC)) {
 		/* update aec config */
 		if ((module_cfg_update & CIFISP_MODULE_AEC))
-			aec_config(params_vdev, &new_params->meas.aec_config);
+			ops->aec_config(params_vdev, &new_params->meas.aec_config);
 
 		if (module_en_update & CIFISP_MODULE_AEC) {
 			if (!!(module_ens & CIFISP_MODULE_AEC))
@@ -1285,30 +1672,37 @@ static const struct cifisp_afc_config afc_params_default_config = {
 static
 void rkisp1_params_config_parameter(struct rkisp1_isp_params_vdev *params_vdev)
 {
+	struct rkisp1_isp_params_ops *ops = params_vdev->ops;
 	struct cifisp_hst_config hst = hst_params_default_config;
 
 	spin_lock(&params_vdev->config_lock);
 
-	awb_meas_config(params_vdev, &awb_params_default_config);
-	awb_meas_enable(params_vdev, &awb_params_default_config, true);
+	ops->awb_meas_config(params_vdev, &awb_params_default_config);
+	ops->awb_meas_enable(params_vdev, &awb_params_default_config, true);
 
-	aec_config(params_vdev, &aec_params_default_config);
+	ops->aec_config(params_vdev, &aec_params_default_config);
 	isp_param_set_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
 
-	afm_config(params_vdev, &afc_params_default_config);
+	ops->afm_config(params_vdev, &afc_params_default_config);
 	isp_param_set_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
 
 	memset(hst.hist_weight, 0x01, sizeof(hst.hist_weight));
-	hst_config(params_vdev, &hst);
-	isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP,
-			   ~CIF_ISP_HIST_PROP_MODE_MASK |
+	ops->hst_config(params_vdev, &hst);
+	if (params_vdev->dev->isp_ver == ISP_V12) {
+		isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
+			   ~CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
 			   hst_params_default_config.mode);
+	} else {
+		isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
+			   ~CIF_ISP_HIST_PROP_MODE_MASK_V10 |
+			   hst_params_default_config.mode);
+	}
 
 	/* set the  range */
 	if (params_vdev->quantization == V4L2_QUANTIZATION_FULL_RANGE)
-		csm_config(params_vdev, true);
+		ops->csm_config(params_vdev, true);
 	else
-		csm_config(params_vdev, false);
+		ops->csm_config(params_vdev, false);
 
 	/* override the default things */
 	__isp_isr_other_config(params_vdev, &params_vdev->cur_params);
@@ -1330,6 +1724,8 @@ void rkisp1_params_configure_isp(struct rkisp1_isp_params_vdev *params_vdev,
 /* Not called when the camera active, thus not isr protection. */
 void rkisp1_params_disable_isp(struct rkisp1_isp_params_vdev *params_vdev)
 {
+	struct rkisp1_isp_params_ops *ops = params_vdev->ops;
+
 	isp_param_clear_bits(params_vdev, CIF_ISP_DPCC_MODE, CIF_ISP_DPCC_ENA);
 	isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
 			     CIF_ISP_LSC_CTRL_ENA);
@@ -1341,16 +1737,16 @@ void rkisp1_params_disable_isp(struct rkisp1_isp_params_vdev *params_vdev)
 	isp_param_clear_bits(params_vdev, CIF_ISP_DEMOSAIC,
 			     CIF_ISP_DEMOSAIC_BYPASS);
 	isp_param_clear_bits(params_vdev, CIF_ISP_FILT_MODE, CIF_ISP_FLT_ENA);
-	awb_meas_enable(params_vdev, NULL, false);
+	ops->awb_meas_enable(params_vdev, NULL, false);
 	isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
 			     CIF_ISP_CTRL_ISP_AWB_ENA);
 	isp_param_clear_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
-	ctk_enable(params_vdev, false);
+	ops->ctk_enable(params_vdev, false);
 	isp_param_clear_bits(params_vdev, CIF_C_PROC_CTRL,
 			     CIF_C_PROC_CTR_ENABLE);
-	hst_enable(params_vdev, NULL, false);
+	ops->hst_enable(params_vdev, NULL, false);
 	isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
-	ie_enable(params_vdev, false);
+	ops->ie_enable(params_vdev, false);
 	isp_param_clear_bits(params_vdev, CIF_ISP_DPF_MODE,
 			     CIF_ISP_DPF_MODE_EN);
 }
@@ -1560,6 +1956,14 @@ static void rkisp1_init_params_vdev(struct rkisp1_isp_params_vdev *params_vdev)
 		V4L2_META_FMT_RK_ISP1_PARAMS;
 	params_vdev->vdev_fmt.fmt.meta.buffersize =
 		sizeof(struct rkisp1_isp_params_cfg);
+
+	if (params_vdev->dev->isp_ver == ISP_V12) {
+		params_vdev->ops = &rkisp1_v12_isp_params_ops;
+		params_vdev->config = &rkisp1_v12_isp_params_config;
+	} else {
+		params_vdev->ops = &rkisp1_v10_isp_params_ops;
+		params_vdev->config = &rkisp1_v10_isp_params_config;
+	}
 }
 
 int rkisp1_register_params_vdev(struct rkisp1_isp_params_vdev *params_vdev,
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.h b/drivers/media/platform/rockchip/isp1/isp_params.h
index 9ecdcd21525a4..efea6567bded7 100644
--- a/drivers/media/platform/rockchip/isp1/isp_params.h
+++ b/drivers/media/platform/rockchip/isp1/isp_params.h
@@ -38,6 +38,62 @@
 #include <linux/rkisp1-config.h>
 #include "common.h"
 
+struct rkisp1_isp_params_vdev;
+struct rkisp1_isp_params_ops {
+	void (*dpcc_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			    const struct cifisp_dpcc_config *arg);
+	void (*bls_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_bls_config *arg);
+	void (*lsc_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_lsc_config *arg);
+	void (*lsc_matrix_config)(struct rkisp1_isp_params_vdev *params_vdev,
+				  const struct cifisp_lsc_config *pconfig);
+	void (*flt_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_flt_config *arg);
+	void (*bdm_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_bdm_config *arg);
+	void (*sdg_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_sdg_config *arg);
+	void (*goc_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_goc_config *arg);
+	void (*ctk_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_ctk_config *arg);
+	void (*ctk_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+			   bool en);
+	void (*awb_meas_config)(struct rkisp1_isp_params_vdev *params_vdev,
+				const struct cifisp_awb_meas_config *arg);
+	void (*awb_meas_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+				const struct cifisp_awb_meas_config *arg,
+				bool en);
+	void (*awb_gain_config)(struct rkisp1_isp_params_vdev *params_vdev,
+				const struct cifisp_awb_gain_config *arg);
+	void (*aec_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_aec_config *arg);
+	void (*cproc_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			     const struct cifisp_cproc_config *arg);
+	void (*hst_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_hst_config *arg);
+	void (*hst_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_hst_config *arg, bool en);
+	void (*afm_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_afc_config *arg);
+	void (*ie_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			  const struct cifisp_ie_config *arg);
+	void (*ie_enable)(struct rkisp1_isp_params_vdev *params_vdev,
+			  bool en);
+	void (*csm_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   bool full_range);
+	void (*dpf_config)(struct rkisp1_isp_params_vdev *params_vdev,
+			   const struct cifisp_dpf_config *arg);
+	void (*dpf_strength_config)(struct rkisp1_isp_params_vdev *params_vdev,
+				    const struct cifisp_dpf_strength_config *arg);
+};
+
+struct rkisp1_isp_params_config {
+	const int gamma_out_max_samples;
+	const int hst_weight_grids_size;
+};
+
 /*
  * struct rkisp1_isp_subdev - ISP input parameters device
  *
@@ -57,6 +113,9 @@ struct rkisp1_isp_params_vdev {
 
 	enum v4l2_quantization quantization;
 	enum rkisp1_fmt_raw_pat_type raw_type;
+
+	struct rkisp1_isp_params_ops *ops;
+	struct rkisp1_isp_params_config *config;
 };
 
 /* config params before ISP streaming */
diff --git a/drivers/media/platform/rockchip/isp1/isp_stats.c b/drivers/media/platform/rockchip/isp1/isp_stats.c
index 23cdcb5e570b6..5f8f46b98e3a1 100644
--- a/drivers/media/platform/rockchip/isp1/isp_stats.c
+++ b/drivers/media/platform/rockchip/isp1/isp_stats.c
@@ -213,16 +213,16 @@ static int rkisp1_stats_init_vb2_queue(struct vb2_queue *q,
 	return vb2_queue_init(q);
 }
 
-static void rkisp1_stats_get_awb_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_awb_meas_v10(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	/* Protect against concurrent access from ISR? */
 	u32 reg_val;
 
 	pbuf->meas_type |= CIFISP_STAT_AWB;
-	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_WHITE_CNT);
+	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_WHITE_CNT_V10);
 	pbuf->params.awb.awb_mean[0].cnt = CIF_ISP_AWB_GET_PIXEL_CNT(reg_val);
-	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_MEAN);
+	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_MEAN_V10);
 
 	pbuf->params.awb.awb_mean[0].mean_cr_or_r =
 		CIF_ISP_AWB_GET_MEAN_CR_R(reg_val);
@@ -232,17 +232,55 @@ static void rkisp1_stats_get_awb_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
 		CIF_ISP_AWB_GET_MEAN_Y_G(reg_val);
 }
 
-static void rkisp1_stats_get_aec_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_awb_meas_v12(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
+{
+	/* Protect against concurrent access from ISR? */
+	u32 reg_val;
+
+	pbuf->meas_type |= CIFISP_STAT_AWB;
+	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_WHITE_CNT_V12);
+	pbuf->params.awb.awb_mean[0].cnt = CIF_ISP_AWB_GET_PIXEL_CNT(reg_val);
+	reg_val = readl(stats_vdev->dev->base_addr + CIF_ISP_AWB_MEAN_V12);
+
+	pbuf->params.awb.awb_mean[0].mean_cr_or_r =
+		CIF_ISP_AWB_GET_MEAN_CR_R(reg_val);
+	pbuf->params.awb.awb_mean[0].mean_cb_or_b =
+		CIF_ISP_AWB_GET_MEAN_CB_B(reg_val);
+	pbuf->params.awb.awb_mean[0].mean_y_or_g =
+		CIF_ISP_AWB_GET_MEAN_Y_G(reg_val);
+}
+
+static void rkisp1_stats_get_aec_meas_v10(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	unsigned int i;
-	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_EXP_MEAN_00;
+	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_EXP_MEAN_00_V10;
 
 	pbuf->meas_type |= CIFISP_STAT_AUTOEXP;
-	for (i = 0; i < CIFISP_AE_MEAN_MAX; i++)
+	for (i = 0; i < stats_vdev->config->ae_mean_max; i++)
 		pbuf->params.ae.exp_mean[i] = (u8)readl(addr + i * 4);
 }
 
+static void rkisp1_stats_get_aec_meas_v12(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
+{
+	int i;
+	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_EXP_MEAN_V12;
+	u32 value;
+
+	pbuf->meas_type |= CIFISP_STAT_AUTOEXP;
+	for (i = 0; i < stats_vdev->config->ae_mean_max / 4; i++) {
+		value = readl(addr + i * 4);
+		pbuf->params.ae.exp_mean[4 * i + 0] = CIF_ISP_EXP_GET_MEAN_xy0_V12(value);
+		pbuf->params.ae.exp_mean[4 * i + 1] = CIF_ISP_EXP_GET_MEAN_xy1_V12(value);
+		pbuf->params.ae.exp_mean[4 * i + 2] = CIF_ISP_EXP_GET_MEAN_xy2_V12(value);
+		pbuf->params.ae.exp_mean[4 * i + 3] = CIF_ISP_EXP_GET_MEAN_xy3_V12(value);
+	}
+	value = readl(addr + i * 4);
+	pbuf->params.ae.exp_mean[4 * i + 0] = CIF_ISP_EXP_GET_MEAN_xy0_V12(value);
+}
+
 static void rkisp1_stats_get_afc_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
 				      struct rkisp1_stat_buffer *pbuf)
 {
@@ -261,17 +299,32 @@ static void rkisp1_stats_get_afc_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
 	af->window[2].lum = readl(base_addr + CIF_ISP_AFM_LUM_C);
 }
 
-static void rkisp1_stats_get_hst_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_hst_meas_v10(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	int i;
-	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_HIST_BIN_0;
+	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_HIST_BIN_0_V10;
 
 	pbuf->meas_type |= CIFISP_STAT_HIST;
-	for (i = 0; i < CIFISP_HIST_BIN_N_MAX; i++)
+	for (i = 0; i < stats_vdev->config->hist_bin_n_max; i++)
 		pbuf->params.hist.hist_bins[i] = readl(addr + (i * 4));
 }
 
+static void rkisp1_stats_get_hst_meas_v12(struct rkisp1_isp_stats_vdev *stats_vdev,
+					  struct rkisp1_stat_buffer *pbuf)
+{
+	int i;
+	void __iomem *addr = stats_vdev->dev->base_addr + CIF_ISP_HIST_BIN_V12;
+	u32 value;
+
+	pbuf->meas_type |= CIFISP_STAT_HIST;
+	for (i = 0; i < stats_vdev->config->hist_bin_n_max / 2; i++) {
+		value = readl(addr + (i * 4));
+		pbuf->params.hist.hist_bins[2 * i] = CIF_ISP_HIST_GET_BIN0_V12(value);
+		pbuf->params.hist.hist_bins[2 * i + 1] = CIF_ISP_HIST_GET_BIN1_V12(value);
+	}
+}
+
 static void rkisp1_stats_get_bls_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
 				      struct rkisp1_stat_buffer *pbuf)
 {
@@ -305,6 +358,32 @@ static void rkisp1_stats_get_bls_meas(struct rkisp1_isp_stats_vdev *stats_vdev,
 	}
 }
 
+static struct rkisp1_stats_ops rkisp1_v10_stats_ops = {
+	.get_awb_meas = rkisp1_stats_get_awb_meas_v10,
+	.get_aec_meas = rkisp1_stats_get_aec_meas_v10,
+	.get_afc_meas = rkisp1_stats_get_afc_meas,
+	.get_hst_meas = rkisp1_stats_get_hst_meas_v10,
+	.get_bls_meas = rkisp1_stats_get_bls_meas,
+};
+
+static struct rkisp1_stats_ops rkisp1_v12_stats_ops = {
+	.get_awb_meas = rkisp1_stats_get_awb_meas_v12,
+	.get_aec_meas = rkisp1_stats_get_aec_meas_v12,
+	.get_afc_meas = rkisp1_stats_get_afc_meas,
+	.get_hst_meas = rkisp1_stats_get_hst_meas_v12,
+	.get_bls_meas = rkisp1_stats_get_bls_meas,
+};
+
+static struct rkisp1_stats_config rkisp1_v10_stats_config = {
+	.ae_mean_max = 25,
+	.hist_bin_n_max = 16,
+};
+
+static struct rkisp1_stats_config rkisp1_v12_stats_config = {
+	.ae_mean_max = 81,
+	.hist_bin_n_max = 32,
+};
+
 static void
 rkisp1_stats_send_measurement(struct rkisp1_isp_stats_vdev *stats_vdev,
 			      struct rkisp1_isp_readout_work *meas_work)
@@ -312,6 +391,7 @@ rkisp1_stats_send_measurement(struct rkisp1_isp_stats_vdev *stats_vdev,
 	unsigned int cur_frame_id = -1;
 	struct rkisp1_stat_buffer *cur_stat_buf;
 	struct rkisp1_buffer *cur_buf = NULL;
+	struct rkisp1_stats_ops *ops = stats_vdev->ops;
 
 	cur_frame_id = atomic_read(&stats_vdev->dev->isp_sdev.frm_sync_seq) - 1;
 	if (cur_frame_id != meas_work->frame_id) {
@@ -337,23 +417,23 @@ rkisp1_stats_send_measurement(struct rkisp1_isp_stats_vdev *stats_vdev,
 		(struct rkisp1_stat_buffer *)(cur_buf->vaddr[0]);
 
 	if (meas_work->isp_ris & CIF_ISP_AWB_DONE) {
-		rkisp1_stats_get_awb_meas(stats_vdev, cur_stat_buf);
+		ops->get_awb_meas(stats_vdev, cur_stat_buf);
 		cur_stat_buf->meas_type |= CIFISP_STAT_AWB;
 	}
 
 	if (meas_work->isp_ris & CIF_ISP_AFM_FIN) {
-		rkisp1_stats_get_afc_meas(stats_vdev, cur_stat_buf);
+		ops->get_afc_meas(stats_vdev, cur_stat_buf);
 		cur_stat_buf->meas_type |= CIFISP_STAT_AFM_FIN;
 	}
 
 	if (meas_work->isp_ris & CIF_ISP_EXP_END) {
-		rkisp1_stats_get_aec_meas(stats_vdev, cur_stat_buf);
-		rkisp1_stats_get_bls_meas(stats_vdev, cur_stat_buf);
+		ops->get_aec_meas(stats_vdev, cur_stat_buf);
+		ops->get_bls_meas(stats_vdev, cur_stat_buf);
 		cur_stat_buf->meas_type |= CIFISP_STAT_AUTOEXP;
 	}
 
 	if (meas_work->isp_ris & CIF_ISP_HIST_MEASURE_RDY) {
-		rkisp1_stats_get_hst_meas(stats_vdev, cur_stat_buf);
+		ops->get_hst_meas(stats_vdev, cur_stat_buf);
 		cur_stat_buf->meas_type |= CIFISP_STAT_HIST;
 	}
 
@@ -449,6 +529,14 @@ static void rkisp1_init_stats_vdev(struct rkisp1_isp_stats_vdev *stats_vdev)
 		V4L2_META_FMT_RK_ISP1_STAT_3A;
 	stats_vdev->vdev_fmt.fmt.meta.buffersize =
 		sizeof(struct rkisp1_stat_buffer);
+
+	if (stats_vdev->dev->isp_ver == ISP_V12) {
+		stats_vdev->ops = &rkisp1_v12_stats_ops;
+		stats_vdev->config = &rkisp1_v12_stats_config;
+	} else {
+		stats_vdev->ops = &rkisp1_v10_stats_ops;
+		stats_vdev->config = &rkisp1_v10_stats_config;
+	}
 }
 
 int rkisp1_register_stats_vdev(struct rkisp1_isp_stats_vdev *stats_vdev,
diff --git a/drivers/media/platform/rockchip/isp1/isp_stats.h b/drivers/media/platform/rockchip/isp1/isp_stats.h
index c78d66fc4f45c..54fec490a53e7 100644
--- a/drivers/media/platform/rockchip/isp1/isp_stats.h
+++ b/drivers/media/platform/rockchip/isp1/isp_stats.h
@@ -55,6 +55,24 @@ struct rkisp1_isp_readout_work {
 	struct vb2_buffer *vb;
 };
 
+struct rkisp1_stats_ops {
+	void (*get_awb_meas)(struct rkisp1_isp_stats_vdev *stats_vdev,
+			     struct rkisp1_stat_buffer *pbuf);
+	void (*get_aec_meas)(struct rkisp1_isp_stats_vdev *stats_vdev,
+			     struct rkisp1_stat_buffer *pbuf);
+	void (*get_afc_meas)(struct rkisp1_isp_stats_vdev *stats_vdev,
+			     struct rkisp1_stat_buffer *pbuf);
+	void (*get_hst_meas)(struct rkisp1_isp_stats_vdev *stats_vdev,
+			     struct rkisp1_stat_buffer *pbuf);
+	void (*get_bls_meas)(struct rkisp1_isp_stats_vdev *stats_vdev,
+			     struct rkisp1_stat_buffer *pbuf);
+};
+
+struct rkisp1_stats_config {
+	const int ae_mean_max;
+	const int hist_bin_n_max;
+};
+
 /*
  * struct rkisp1_isp_stats_vdev - ISP Statistics device
  *
@@ -73,6 +91,9 @@ struct rkisp1_isp_stats_vdev {
 
 	struct workqueue_struct *readout_wq;
 	struct mutex wq_lock;
+
+	struct rkisp1_stats_ops *ops;
+	struct rkisp1_stats_config *config;
 };
 
 int rkisp1_stats_isr(struct rkisp1_isp_stats_vdev *stats_vdev, u32 isp_ris);
diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index 53977bc7e8795..a18a7b52e1bb4 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -374,25 +374,57 @@
 #define CIF_SUPER_IMP_CTRL_TRANSP_DIS		BIT(2)
 
 /* ISP HISTOGRAM CALCULATION : ISP_HIST_PROP */
-#define CIF_ISP_HIST_PROP_MODE_DIS		(0 << 0)
-#define CIF_ISP_HIST_PROP_MODE_RGB		(1 << 0)
-#define CIF_ISP_HIST_PROP_MODE_RED		(2 << 0)
-#define CIF_ISP_HIST_PROP_MODE_GREEN		(3 << 0)
-#define CIF_ISP_HIST_PROP_MODE_BLUE		(4 << 0)
-#define CIF_ISP_HIST_PROP_MODE_LUM		(5 << 0)
-#define CIF_ISP_HIST_PROP_MODE_MASK		0x7
-#define CIF_ISP_HIST_PREDIV_SET(x)		(((x) & 0x7F) << 3)
-#define CIF_ISP_HIST_WEIGHT_SET(v0, v1, v2, v3)	\
+#define CIF_ISP_HIST_PROP_MODE_DIS_V10		(0 << 0)
+#define CIF_ISP_HIST_PROP_MODE_RGB_V10		(1 << 0)
+#define CIF_ISP_HIST_PROP_MODE_RED_V10		(2 << 0)
+#define CIF_ISP_HIST_PROP_MODE_GREEN_V10	(3 << 0)
+#define CIF_ISP_HIST_PROP_MODE_BLUE_V10		(4 << 0)
+#define CIF_ISP_HIST_PROP_MODE_LUM_V10		(5 << 0)
+#define CIF_ISP_HIST_PROP_MODE_MASK_V10		0x7
+#define CIF_ISP_HIST_PREDIV_SET_V10(x)		(((x) & 0x7F) << 3)
+#define CIF_ISP_HIST_WEIGHT_SET_V10(v0, v1, v2, v3)	\
 				     (((v0) & 0x1F) | (((v1) & 0x1F) << 8)  |\
 				     (((v2) & 0x1F) << 16) | \
 				     (((v3) & 0x1F) << 24))
 
-#define CIF_ISP_HIST_WINDOW_OFFSET_RESERVED	0xFFFFF000
-#define CIF_ISP_HIST_WINDOW_SIZE_RESERVED	0xFFFFF800
-#define CIF_ISP_HIST_WEIGHT_RESERVED		0xE0E0E0E0
-#define CIF_ISP_MAX_HIST_PREDIVIDER		0x0000007F
-#define CIF_ISP_HIST_ROW_NUM			5
-#define CIF_ISP_HIST_COLUMN_NUM			5
+#define CIF_ISP_HIST_WINDOW_OFFSET_RESERVED_V10	0xFFFFF000
+#define CIF_ISP_HIST_WINDOW_SIZE_RESERVED_V10	0xFFFFF800
+#define CIF_ISP_HIST_WEIGHT_RESERVED_V10	0xE0E0E0E0
+#define CIF_ISP_MAX_HIST_PREDIVIDER_V10		0x0000007F
+#define CIF_ISP_HIST_ROW_NUM_V10		5
+#define CIF_ISP_HIST_COLUMN_NUM_V10		5
+
+/* ISP HISTOGRAM CALCULATION : CIF_ISP_HIST */
+#define CIF_ISP_HIST_CTRL_EN_SET_V12(x)		(((x) & 0x01) << 0)
+#define CIF_ISP_HIST_CTRL_EN_MASK_V12		CIF_ISP_HIST_CTRL_EN_SET_V12(0x01)
+#define CIF_ISP_HIST_CTRL_STEPSIZE_SET_V12(x)	(((x) & 0x7F) << 1)
+#define CIF_ISP_HIST_CTRL_MODE_SET_V12(x)	(((x) & 0x07) << 8)
+#define CIF_ISP_HIST_CTRL_MODE_MASK_V12		CIF_ISP_HIST_CTRL_MODE_SET_V12(0x07)
+#define CIF_ISP_HIST_CTRL_AUTOSTOP_SET_V12(x)	(((x) & 0x01) << 11)
+#define CIF_ISP_HIST_CTRL_WATERLINE_SET_V12(x)	(((x) & 0xFFF) << 12)
+#define CIF_ISP_HIST_CTRL_DATASEL_SET_V12(x)	(((x) & 0x07) << 24)
+#define CIF_ISP_HIST_CTRL_INTRSEL_SET_V12(x)	(((x) & 0x01) << 27)
+#define CIF_ISP_HIST_CTRL_WNDNUM_SET_V12(x)	(((x) & 0x03) << 28)
+#define CIF_ISP_HIST_CTRL_DBGEN_SET_V12(x)	(((x) & 0x01) << 30)
+#define CIF_ISP_HIST_ROW_NUM_V12		15
+#define CIF_ISP_HIST_COLUMN_NUM_V12		15
+#define CIF_ISP_HIST_WEIGHT_REG_SIZE_V12	\
+				(CIF_ISP_HIST_ROW_NUM_V12 * CIF_ISP_HIST_COLUMN_NUM_V12)
+
+#define CIF_ISP_HIST_WEIGHT_SET_V12(v0, v1, v2, v3)	\
+				(((v0) & 0x3F) | (((v1) & 0x3F) << 8) |\
+				(((v2) & 0x3F) << 16) |\
+				(((v3) & 0x3F) << 24))
+
+#define CIF_ISP_HIST_OFFS_SET_V12(v0, v1)	\
+				(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
+#define CIF_ISP_HIST_SIZE_SET_V12(v0, v1)	\
+				(((v0) & 0x7FF) | (((v1) & 0x7FF) << 16))
+
+#define CIF_ISP_HIST_GET_BIN0_V12(x)	\
+				((x) & 0xFFFF)
+#define CIF_ISP_HIST_GET_BIN1_V12(x)	\
+				(((x) >> 16) & 0xFFFF)
 
 /* AUTO FOCUS MEASUREMENT:  ISP_AFM_CTRL */
 #define ISP_AFM_CTRL_ENABLE			BIT(0)
@@ -423,17 +455,18 @@
 /* AWB */
 /* ISP_AWB_PROP */
 #define CIF_ISP_AWB_YMAX_CMP_EN			BIT(2)
-#define CIFISP_AWB_YMAX_READ(x)			(((x) >> 2) & 1)
+#define CIF_ISP_AWB_YMAX_READ(x)		(((x) >> 2) & 1)
 #define CIF_ISP_AWB_MODE_RGB_EN			((1 << 31) | (0x2 << 0))
 #define CIF_ISP_AWB_MODE_YCBCR_EN		((0 << 31) | (0x2 << 0))
-#define CIF_ISP_AWB_MODE_YCBCR_EN		((0 << 31) | (0x2 << 0))
 #define CIF_ISP_AWB_MODE_MASK_NONE		0xFFFFFFFC
 #define CIF_ISP_AWB_MODE_READ(x)		((x) & 3)
+#define CIF_ISP_AWB_SET_FRAMES_V12(x)		(((x) & 0x07) << 28)
+#define CIF_ISP_AWB_SET_FRAMES_MASK_V12		CIF_ISP_AWB_SET_FRAMES_V12(0x07)
 /* ISP_AWB_GAIN_RB, ISP_AWB_GAIN_G  */
 #define CIF_ISP_AWB_GAIN_R_SET(x)		(((x) & 0x3FF) << 16)
 #define CIF_ISP_AWB_GAIN_R_READ(x)		(((x) >> 16) & 0x3FF)
-#define CIF_ISP_AWB_GAIN_B_SET(x)		((x) & 0x3FFF)
-#define CIF_ISP_AWB_GAIN_B_READ(x)		((x) & 0x3FFF)
+#define CIF_ISP_AWB_GAIN_B_SET(x)		((x) & 0x3FF)
+#define CIF_ISP_AWB_GAIN_B_READ(x)		((x) & 0x3FF)
 /* ISP_AWB_REF */
 #define CIF_ISP_AWB_REF_CR_SET(x)		(((x) & 0xFF) << 8)
 #define CIF_ISP_AWB_REF_CR_READ(x)		(((x) >> 8) & 0xFF)
@@ -463,6 +496,7 @@
 /* ISP_EXP_CTRL */
 #define CIF_ISP_EXP_ENA				BIT(0)
 #define CIF_ISP_EXP_CTRL_AUTOSTOP		BIT(1)
+#define CIF_ISP_EXP_CTRL_WNDNUM_SET_V12(x)	(((x) & 0x03) << 2)
 /*
  *'1' luminance calculation according to  Y=(R+G+B) x 0.332 (85/256)
  *'0' luminance calculation according to Y=16+0.25R+0.5G+0.1094B
@@ -470,43 +504,82 @@
 #define CIF_ISP_EXP_CTRL_MEASMODE_1		BIT(31)
 
 /* ISP_EXP_H_SIZE */
-#define CIF_ISP_EXP_H_SIZE_SET(x)		((x) & 0x7FF)
-#define CIF_ISP_EXP_HEIGHT_MASK			0x000007FF
+#define CIF_ISP_EXP_H_SIZE_SET_V10(x)		((x) & 0x7FF)
+#define CIF_ISP_EXP_HEIGHT_MASK_V10		0x000007FF
 /* ISP_EXP_V_SIZE : vertical size must be a multiple of 2). */
-#define CIF_ISP_EXP_V_SIZE_SET(x)		((x) & 0x7FE)
+#define CIF_ISP_EXP_V_SIZE_SET_V10(x)		((x) & 0x7FE)
 
 /* ISP_EXP_H_OFFSET */
-#define CIF_ISP_EXP_H_OFFSET_SET(x)		((x) & 0x1FFF)
-#define CIF_ISP_EXP_MAX_HOFFS			2424
+#define CIF_ISP_EXP_H_OFFSET_SET_V10(x)		((x) & 0x1FFF)
+#define CIF_ISP_EXP_MAX_HOFFS_V10		2424
 /* ISP_EXP_V_OFFSET */
-#define CIF_ISP_EXP_V_OFFSET_SET(x)		((x) & 0x1FFF)
-#define CIF_ISP_EXP_MAX_VOFFS			1806
-
-#define CIF_ISP_EXP_ROW_NUM			5
-#define CIF_ISP_EXP_COLUMN_NUM			5
-#define CIF_ISP_EXP_NUM_LUMA_REGS \
-	(CIF_ISP_EXP_ROW_NUM * CIF_ISP_EXP_COLUMN_NUM)
-#define CIF_ISP_EXP_BLOCK_MAX_HSIZE		516
-#define CIF_ISP_EXP_BLOCK_MIN_HSIZE		35
-#define CIF_ISP_EXP_BLOCK_MAX_VSIZE		390
-#define CIF_ISP_EXP_BLOCK_MIN_VSIZE		28
-#define CIF_ISP_EXP_MAX_HSIZE	\
-	(CIF_ISP_EXP_BLOCK_MAX_HSIZE * CIF_ISP_EXP_COLUMN_NUM + 1)
-#define CIF_ISP_EXP_MIN_HSIZE	\
-	(CIF_ISP_EXP_BLOCK_MIN_HSIZE * CIF_ISP_EXP_COLUMN_NUM + 1)
-#define CIF_ISP_EXP_MAX_VSIZE	\
-	(CIF_ISP_EXP_BLOCK_MAX_VSIZE * CIF_ISP_EXP_ROW_NUM + 1)
-#define CIF_ISP_EXP_MIN_VSIZE	\
-	(CIF_ISP_EXP_BLOCK_MIN_VSIZE * CIF_ISP_EXP_ROW_NUM + 1)
+#define CIF_ISP_EXP_V_OFFSET_SET_V10(x)		((x) & 0x1FFF)
+#define CIF_ISP_EXP_MAX_VOFFS_V10		1806
+
+#define CIF_ISP_EXP_ROW_NUM_V10			5
+#define CIF_ISP_EXP_COLUMN_NUM_V10		5
+#define CIF_ISP_EXP_NUM_LUMA_REGS_V10 \
+	(CIF_ISP_EXP_ROW_NUM_V10 * CIF_ISP_EXP_COLUMN_NUM_V10)
+#define CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10		516
+#define CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10		35
+#define CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10		390
+#define CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10		28
+#define CIF_ISP_EXP_MAX_HSIZE_V10	\
+	(CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10 * CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
+#define CIF_ISP_EXP_MIN_HSIZE_V10	\
+	(CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10 * CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
+#define CIF_ISP_EXP_MAX_VSIZE_V10	\
+	(CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10 * CIF_ISP_EXP_ROW_NUM_V10 + 1)
+#define CIF_ISP_EXP_MIN_VSIZE_V10	\
+	(CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10 * CIF_ISP_EXP_ROW_NUM_V10 + 1)
+
+/* ISP_EXP_H_SIZE */
+#define CIF_ISP_EXP_H_SIZE_SET_V12(x)		((x) & 0x7FF)
+#define CIF_ISP_EXP_HEIGHT_MASK_V12		0x000007FF
+/* ISP_EXP_V_SIZE : vertical size must be a multiple of 2). */
+#define CIF_ISP_EXP_V_SIZE_SET_V12(x)		(((x) & 0x7FE) << 16)
+
+/* ISP_EXP_H_OFFSET */
+#define CIF_ISP_EXP_H_OFFSET_SET_V12(x)		((x) & 0x1FFF)
+#define CIF_ISP_EXP_MAX_HOFFS_V12		0x1FFF
+/* ISP_EXP_V_OFFSET */
+#define CIF_ISP_EXP_V_OFFSET_SET_V12(x)		(((x) & 0x1FFF) << 16)
+#define CIF_ISP_EXP_MAX_VOFFS_V12		0x1FFF
+
+#define CIF_ISP_EXP_ROW_NUM_V12			15
+#define CIF_ISP_EXP_COLUMN_NUM_V12		15
+#define CIF_ISP_EXP_NUM_LUMA_REGS_V12 \
+	(CIF_ISP_EXP_ROW_NUM_V12 * CIF_ISP_EXP_COLUMN_NUM_V12)
+#define CIF_ISP_EXP_BLOCK_MAX_HSIZE_V12		0x7FF
+#define CIF_ISP_EXP_BLOCK_MIN_HSIZE_V12		0xE
+#define CIF_ISP_EXP_BLOCK_MAX_VSIZE_V12		0x7FE
+#define CIF_ISP_EXP_BLOCK_MIN_VSIZE_V12		0xE
+#define CIF_ISP_EXP_MAX_HSIZE_V12	\
+	(CIF_ISP_EXP_BLOCK_MAX_HSIZE_V12 * CIF_ISP_EXP_COLUMN_NUM_V12 + 1)
+#define CIF_ISP_EXP_MIN_HSIZE_V12	\
+	(CIF_ISP_EXP_BLOCK_MIN_HSIZE_V12 * CIF_ISP_EXP_COLUMN_NUM_V12 + 1)
+#define CIF_ISP_EXP_MAX_VSIZE_V12	\
+	(CIF_ISP_EXP_BLOCK_MAX_VSIZE_V12 * CIF_ISP_EXP_ROW_NUM_V12 + 1)
+#define CIF_ISP_EXP_MIN_VSIZE_V12	\
+	(CIF_ISP_EXP_BLOCK_MIN_VSIZE_V12 * CIF_ISP_EXP_ROW_NUM_V12 + 1)
+
+#define CIF_ISP_EXP_GET_MEAN_xy0_V12(x)		((x) & 0xFF)
+#define CIF_ISP_EXP_GET_MEAN_xy1_V12(x)		(((x) >> 8) & 0xFF)
+#define CIF_ISP_EXP_GET_MEAN_xy2_V12(x)		(((x) >> 16) & 0xFF)
+#define CIF_ISP_EXP_GET_MEAN_xy3_V12(x)		(((x) >> 24) & 0xFF)
 
 /* LSC: ISP_LSC_CTRL */
 #define CIF_ISP_LSC_CTRL_ENA			BIT(0)
 #define CIF_ISP_LSC_SECT_SIZE_RESERVED		0xFC00FC00
-#define CIF_ISP_LSC_GRAD_RESERVED		0xF000F000
-#define CIF_ISP_LSC_SAMPLE_RESERVED		0xF000F000
+#define CIF_ISP_LSC_GRAD_RESERVED_V10		0xF000F000
+#define CIF_ISP_LSC_SAMPLE_RESERVED_V10		0xF000F000
+#define CIF_ISP_LSC_GRAD_RESERVED_V12		0xE000E000
+#define CIF_ISP_LSC_SAMPLE_RESERVED_V12		0xE000E000
 #define CIF_ISP_LSC_SECTORS_MAX			17
-#define CIF_ISP_LSC_TABLE_DATA(v0, v1)     \
+#define CIF_ISP_LSC_TABLE_DATA_V10(v0, v1)     \
 	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 12))
+#define CIF_ISP_LSC_TABLE_DATA_V12(v0, v1)     \
+	(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 13))
 #define CIF_ISP_LSC_SECT_SIZE(v0, v1)      \
 	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 16))
 #define CIF_ISP_LSC_GRAD_SIZE(v0, v1)      \
@@ -579,6 +652,10 @@
 	(1 << 15) | (1 << 11) | (1 << 7) | (1 << 3))
 #define CIFISP_DEGAMMA_Y_RESERVED               0xFFFFF000
 
+/* GAMMA-OUT */
+#define CIF_ISP_GAMMA_REG_VALUE_V12(x, y)	\
+	(((x) & 0xFFF) << 16 | ((y) & 0xFFF) << 0)
+
 /* AFM */
 #define CIF_ISP_AFM_ENA				BIT(0)
 #define CIF_ISP_AFM_THRES_RESERVED		0xFFFF0000
@@ -589,6 +666,11 @@
 #define CIF_ISP_AFM_WINDOW_Y_MIN		0x2
 #define CIF_ISP_AFM_WINDOW_X(x)			(((x) & 0x1FFF) << 16)
 #define CIF_ISP_AFM_WINDOW_Y(x)			((x) & 0x1FFF)
+#define CIF_ISP_AFM_SET_SHIFT_a_V12(x, y)	(((x) & 0x7) << 16 | ((y) & 0x7) << 0)
+#define CIF_ISP_AFM_SET_SHIFT_b_V12(x, y)	(((x) & 0x7) << 20 | ((y) & 0x7) << 4)
+#define CIF_ISP_AFM_SET_SHIFT_c_V12(x, y)	(((x) & 0x7) << 24 | ((y) & 0x7) << 8)
+#define CIF_ISP_AFM_GET_LUM_SHIFT_a_V12(x)	(((x) & 0x70000) >> 16)
+#define CIF_ISP_AFM_GET_AFM_SHIFT_a_V12(x)	((x) & 0x7)
 
 /* DPF */
 #define CIF_ISP_DPF_MODE_EN			BIT(0)
@@ -696,18 +778,38 @@
 #define CIF_ISP_GAMMA_B_Y14		(CIF_ISP_BASE + 0x000000E4)
 #define CIF_ISP_GAMMA_B_Y15		(CIF_ISP_BASE + 0x000000E8)
 #define CIF_ISP_GAMMA_B_Y16		(CIF_ISP_BASE + 0x000000EC)
-#define CIF_ISP_AWB_PROP		(CIF_ISP_BASE + 0x00000110)
-#define CIF_ISP_AWB_WND_H_OFFS		(CIF_ISP_BASE + 0x00000114)
-#define CIF_ISP_AWB_WND_V_OFFS		(CIF_ISP_BASE + 0x00000118)
-#define CIF_ISP_AWB_WND_H_SIZE		(CIF_ISP_BASE + 0x0000011C)
-#define CIF_ISP_AWB_WND_V_SIZE		(CIF_ISP_BASE + 0x00000120)
-#define CIF_ISP_AWB_FRAMES		(CIF_ISP_BASE + 0x00000124)
-#define CIF_ISP_AWB_REF			(CIF_ISP_BASE + 0x00000128)
-#define CIF_ISP_AWB_THRESH		(CIF_ISP_BASE + 0x0000012C)
-#define CIF_ISP_AWB_GAIN_G		(CIF_ISP_BASE + 0x00000138)
-#define CIF_ISP_AWB_GAIN_RB		(CIF_ISP_BASE + 0x0000013C)
-#define CIF_ISP_AWB_WHITE_CNT		(CIF_ISP_BASE + 0x00000140)
-#define CIF_ISP_AWB_MEAN		(CIF_ISP_BASE + 0x00000144)
+
+#define CIF_ISP_AWB_PROP_V10		(CIF_ISP_BASE + 0x00000110)
+#define CIF_ISP_AWB_WND_H_OFFS_V10	(CIF_ISP_BASE + 0x00000114)
+#define CIF_ISP_AWB_WND_V_OFFS_V10	(CIF_ISP_BASE + 0x00000118)
+#define CIF_ISP_AWB_WND_H_SIZE_V10	(CIF_ISP_BASE + 0x0000011C)
+#define CIF_ISP_AWB_WND_V_SIZE_V10	(CIF_ISP_BASE + 0x00000120)
+#define CIF_ISP_AWB_FRAMES_V10		(CIF_ISP_BASE + 0x00000124)
+#define CIF_ISP_AWB_REF_V10		(CIF_ISP_BASE + 0x00000128)
+#define CIF_ISP_AWB_THRESH_V10		(CIF_ISP_BASE + 0x0000012C)
+#define CIF_ISP_AWB_GAIN_G_V10		(CIF_ISP_BASE + 0x00000138)
+#define CIF_ISP_AWB_GAIN_RB_V10		(CIF_ISP_BASE + 0x0000013C)
+#define CIF_ISP_AWB_WHITE_CNT_V10	(CIF_ISP_BASE + 0x00000140)
+#define CIF_ISP_AWB_MEAN_V10		(CIF_ISP_BASE + 0x00000144)
+
+#define CIF_ISP_AWB_PROP_V12		(CIF_ISP_BASE + 0x00000110)
+#define CIF_ISP_AWB_SIZE_V12		(CIF_ISP_BASE + 0x00000114)
+#define CIF_ISP_AWB_OFFS_V12		(CIF_ISP_BASE + 0x00000118)
+#define CIF_ISP_AWB_REF_V12		(CIF_ISP_BASE + 0x0000011C)
+#define CIF_ISP_AWB_THRESH_V12		(CIF_ISP_BASE + 0x00000120)
+#define CIF_ISP_X_COOR12_V12		(CIF_ISP_BASE + 0x00000124)
+#define CIF_ISP_X_COOR34_V12		(CIF_ISP_BASE + 0x00000128)
+#define CIF_ISP_AWB_WHITE_CNT_V12	(CIF_ISP_BASE + 0x0000012C)
+#define CIF_ISP_AWB_MEAN_V12		(CIF_ISP_BASE + 0x00000130)
+#define CIF_ISP_DEGAIN_V12		(CIF_ISP_BASE + 0x00000134)
+#define CIF_ISP_AWB_GAIN_G_V12		(CIF_ISP_BASE + 0x00000138)
+#define CIF_ISP_AWB_GAIN_RB_V12		(CIF_ISP_BASE + 0x0000013C)
+#define CIF_ISP_REGION_LINE_V12		(CIF_ISP_BASE + 0x00000140)
+#define CIF_ISP_WP_CNT_REGION0_V12	(CIF_ISP_BASE + 0x00000160)
+#define CIF_ISP_WP_CNT_REGION1_V12	(CIF_ISP_BASE + 0x00000164)
+#define CIF_ISP_WP_CNT_REGION2_V12	(CIF_ISP_BASE + 0x00000168)
+#define CIF_ISP_WP_CNT_REGION3_V12	(CIF_ISP_BASE + 0x0000016C)
+
 #define CIF_ISP_CC_COEFF_0		(CIF_ISP_BASE + 0x00000170)
 #define CIF_ISP_CC_COEFF_1		(CIF_ISP_BASE + 0x00000174)
 #define CIF_ISP_CC_COEFF_2		(CIF_ISP_BASE + 0x00000178)
@@ -741,30 +843,32 @@
 #define CIF_ISP_CT_COEFF_6		(CIF_ISP_BASE + 0x000001E8)
 #define CIF_ISP_CT_COEFF_7		(CIF_ISP_BASE + 0x000001EC)
 #define CIF_ISP_CT_COEFF_8		(CIF_ISP_BASE + 0x000001F0)
-#define CIF_ISP_GAMMA_OUT_MODE		(CIF_ISP_BASE + 0x000001F4)
-#define CIF_ISP_GAMMA_OUT_Y_0		(CIF_ISP_BASE + 0x000001F8)
-#define CIF_ISP_GAMMA_OUT_Y_1		(CIF_ISP_BASE + 0x000001FC)
-#define CIF_ISP_GAMMA_OUT_Y_2		(CIF_ISP_BASE + 0x00000200)
-#define CIF_ISP_GAMMA_OUT_Y_3		(CIF_ISP_BASE + 0x00000204)
-#define CIF_ISP_GAMMA_OUT_Y_4		(CIF_ISP_BASE + 0x00000208)
-#define CIF_ISP_GAMMA_OUT_Y_5		(CIF_ISP_BASE + 0x0000020C)
-#define CIF_ISP_GAMMA_OUT_Y_6		(CIF_ISP_BASE + 0x00000210)
-#define CIF_ISP_GAMMA_OUT_Y_7		(CIF_ISP_BASE + 0x00000214)
-#define CIF_ISP_GAMMA_OUT_Y_8		(CIF_ISP_BASE + 0x00000218)
-#define CIF_ISP_GAMMA_OUT_Y_9		(CIF_ISP_BASE + 0x0000021C)
-#define CIF_ISP_GAMMA_OUT_Y_10		(CIF_ISP_BASE + 0x00000220)
-#define CIF_ISP_GAMMA_OUT_Y_11		(CIF_ISP_BASE + 0x00000224)
-#define CIF_ISP_GAMMA_OUT_Y_12		(CIF_ISP_BASE + 0x00000228)
-#define CIF_ISP_GAMMA_OUT_Y_13		(CIF_ISP_BASE + 0x0000022C)
-#define CIF_ISP_GAMMA_OUT_Y_14		(CIF_ISP_BASE + 0x00000230)
-#define CIF_ISP_GAMMA_OUT_Y_15		(CIF_ISP_BASE + 0x00000234)
-#define CIF_ISP_GAMMA_OUT_Y_16		(CIF_ISP_BASE + 0x00000238)
+#define CIF_ISP_GAMMA_OUT_MODE_V10	(CIF_ISP_BASE + 0x000001F4)
+#define CIF_ISP_GAMMA_OUT_Y_0_V10	(CIF_ISP_BASE + 0x000001F8)
+#define CIF_ISP_GAMMA_OUT_Y_1_V10	(CIF_ISP_BASE + 0x000001FC)
+#define CIF_ISP_GAMMA_OUT_Y_2_V10	(CIF_ISP_BASE + 0x00000200)
+#define CIF_ISP_GAMMA_OUT_Y_3_V10	(CIF_ISP_BASE + 0x00000204)
+#define CIF_ISP_GAMMA_OUT_Y_4_V10	(CIF_ISP_BASE + 0x00000208)
+#define CIF_ISP_GAMMA_OUT_Y_5_V10	(CIF_ISP_BASE + 0x0000020C)
+#define CIF_ISP_GAMMA_OUT_Y_6_V10	(CIF_ISP_BASE + 0x00000210)
+#define CIF_ISP_GAMMA_OUT_Y_7_V10	(CIF_ISP_BASE + 0x00000214)
+#define CIF_ISP_GAMMA_OUT_Y_8_V10	(CIF_ISP_BASE + 0x00000218)
+#define CIF_ISP_GAMMA_OUT_Y_9_V10	(CIF_ISP_BASE + 0x0000021C)
+#define CIF_ISP_GAMMA_OUT_Y_10_V10	(CIF_ISP_BASE + 0x00000220)
+#define CIF_ISP_GAMMA_OUT_Y_11_V10	(CIF_ISP_BASE + 0x00000224)
+#define CIF_ISP_GAMMA_OUT_Y_12_V10	(CIF_ISP_BASE + 0x00000228)
+#define CIF_ISP_GAMMA_OUT_Y_13_V10	(CIF_ISP_BASE + 0x0000022C)
+#define CIF_ISP_GAMMA_OUT_Y_14_V10	(CIF_ISP_BASE + 0x00000230)
+#define CIF_ISP_GAMMA_OUT_Y_15_V10	(CIF_ISP_BASE + 0x00000234)
+#define CIF_ISP_GAMMA_OUT_Y_16_V10	(CIF_ISP_BASE + 0x00000238)
 #define CIF_ISP_ERR			(CIF_ISP_BASE + 0x0000023C)
 #define CIF_ISP_ERR_CLR			(CIF_ISP_BASE + 0x00000240)
 #define CIF_ISP_FRAME_COUNT		(CIF_ISP_BASE + 0x00000244)
 #define CIF_ISP_CT_OFFSET_R		(CIF_ISP_BASE + 0x00000248)
 #define CIF_ISP_CT_OFFSET_G		(CIF_ISP_BASE + 0x0000024C)
 #define CIF_ISP_CT_OFFSET_B		(CIF_ISP_BASE + 0x00000250)
+#define CIF_ISP_GAMMA_OUT_MODE_V12	(CIF_ISP_BASE + 0x00000300)
+#define CIF_ISP_GAMMA_OUT_Y_0_V12	(CIF_ISP_BASE + 0x00000304)
 
 #define CIF_ISP_FLASH_BASE		0x00000660
 #define CIF_ISP_FLASH_CMD		(CIF_ISP_FLASH_BASE + 0x00000000)
@@ -1034,36 +1138,35 @@
 #define CIF_ISP_IS_H_SIZE_SHD		(CIF_ISP_IS_BASE + 0x0000002C)
 #define CIF_ISP_IS_V_SIZE_SHD		(CIF_ISP_IS_BASE + 0x00000030)
 
-#define CIF_ISP_HIST_BASE		0x00002400
-
-#define CIF_ISP_HIST_PROP		(CIF_ISP_HIST_BASE + 0x00000000)
-#define CIF_ISP_HIST_H_OFFS		(CIF_ISP_HIST_BASE + 0x00000004)
-#define CIF_ISP_HIST_V_OFFS		(CIF_ISP_HIST_BASE + 0x00000008)
-#define CIF_ISP_HIST_H_SIZE		(CIF_ISP_HIST_BASE + 0x0000000C)
-#define CIF_ISP_HIST_V_SIZE		(CIF_ISP_HIST_BASE + 0x00000010)
-#define CIF_ISP_HIST_BIN_0		(CIF_ISP_HIST_BASE + 0x00000014)
-#define CIF_ISP_HIST_BIN_1		(CIF_ISP_HIST_BASE + 0x00000018)
-#define CIF_ISP_HIST_BIN_2		(CIF_ISP_HIST_BASE + 0x0000001C)
-#define CIF_ISP_HIST_BIN_3		(CIF_ISP_HIST_BASE + 0x00000020)
-#define CIF_ISP_HIST_BIN_4		(CIF_ISP_HIST_BASE + 0x00000024)
-#define CIF_ISP_HIST_BIN_5		(CIF_ISP_HIST_BASE + 0x00000028)
-#define CIF_ISP_HIST_BIN_6		(CIF_ISP_HIST_BASE + 0x0000002C)
-#define CIF_ISP_HIST_BIN_7		(CIF_ISP_HIST_BASE + 0x00000030)
-#define CIF_ISP_HIST_BIN_8		(CIF_ISP_HIST_BASE + 0x00000034)
-#define CIF_ISP_HIST_BIN_9		(CIF_ISP_HIST_BASE + 0x00000038)
-#define CIF_ISP_HIST_BIN_10		(CIF_ISP_HIST_BASE + 0x0000003C)
-#define CIF_ISP_HIST_BIN_11		(CIF_ISP_HIST_BASE + 0x00000040)
-#define CIF_ISP_HIST_BIN_12		(CIF_ISP_HIST_BASE + 0x00000044)
-#define CIF_ISP_HIST_BIN_13		(CIF_ISP_HIST_BASE + 0x00000048)
-#define CIF_ISP_HIST_BIN_14		(CIF_ISP_HIST_BASE + 0x0000004C)
-#define CIF_ISP_HIST_BIN_15		(CIF_ISP_HIST_BASE + 0x00000050)
-#define CIF_ISP_HIST_WEIGHT_00TO30	(CIF_ISP_HIST_BASE + 0x00000054)
-#define CIF_ISP_HIST_WEIGHT_40TO21	(CIF_ISP_HIST_BASE + 0x00000058)
-#define CIF_ISP_HIST_WEIGHT_31TO12	(CIF_ISP_HIST_BASE + 0x0000005C)
-#define CIF_ISP_HIST_WEIGHT_22TO03	(CIF_ISP_HIST_BASE + 0x00000060)
-#define CIF_ISP_HIST_WEIGHT_13TO43	(CIF_ISP_HIST_BASE + 0x00000064)
-#define CIF_ISP_HIST_WEIGHT_04TO34	(CIF_ISP_HIST_BASE + 0x00000068)
-#define CIF_ISP_HIST_WEIGHT_44		(CIF_ISP_HIST_BASE + 0x0000006C)
+#define CIF_ISP_HIST_BASE_V10		0x00002400
+#define CIF_ISP_HIST_PROP_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000000)
+#define CIF_ISP_HIST_H_OFFS_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000004)
+#define CIF_ISP_HIST_V_OFFS_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000008)
+#define CIF_ISP_HIST_H_SIZE_V10		(CIF_ISP_HIST_BASE_V10 + 0x0000000C)
+#define CIF_ISP_HIST_V_SIZE_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000010)
+#define CIF_ISP_HIST_BIN_0_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000014)
+#define CIF_ISP_HIST_BIN_1_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000018)
+#define CIF_ISP_HIST_BIN_2_V10		(CIF_ISP_HIST_BASE_V10 + 0x0000001C)
+#define CIF_ISP_HIST_BIN_3_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000020)
+#define CIF_ISP_HIST_BIN_4_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000024)
+#define CIF_ISP_HIST_BIN_5_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000028)
+#define CIF_ISP_HIST_BIN_6_V10		(CIF_ISP_HIST_BASE_V10 + 0x0000002C)
+#define CIF_ISP_HIST_BIN_7_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000030)
+#define CIF_ISP_HIST_BIN_8_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000034)
+#define CIF_ISP_HIST_BIN_9_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000038)
+#define CIF_ISP_HIST_BIN_10_V10		(CIF_ISP_HIST_BASE_V10 + 0x0000003C)
+#define CIF_ISP_HIST_BIN_11_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000040)
+#define CIF_ISP_HIST_BIN_12_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000044)
+#define CIF_ISP_HIST_BIN_13_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000048)
+#define CIF_ISP_HIST_BIN_14_V10		(CIF_ISP_HIST_BASE_V10 + 0x0000004C)
+#define CIF_ISP_HIST_BIN_15_V10		(CIF_ISP_HIST_BASE_V10 + 0x00000050)
+#define CIF_ISP_HIST_WEIGHT_00TO30_V10	(CIF_ISP_HIST_BASE_V10 + 0x00000054)
+#define CIF_ISP_HIST_WEIGHT_40TO21_V10	(CIF_ISP_HIST_BASE_V10 + 0x00000058)
+#define CIF_ISP_HIST_WEIGHT_31TO12_V10	(CIF_ISP_HIST_BASE_V10 + 0x0000005C)
+#define CIF_ISP_HIST_WEIGHT_22TO03_V10	(CIF_ISP_HIST_BASE_V10 + 0x00000060)
+#define CIF_ISP_HIST_WEIGHT_13TO43_V10	(CIF_ISP_HIST_BASE_V10 + 0x00000064)
+#define CIF_ISP_HIST_WEIGHT_04TO34_V10	(CIF_ISP_HIST_BASE_V10 + 0x00000068)
+#define CIF_ISP_HIST_WEIGHT_44_V10	(CIF_ISP_HIST_BASE_V10 + 0x0000006C)
 
 #define CIF_ISP_FILT_BASE		0x00002500
 #define CIF_ISP_FILT_MODE		(CIF_ISP_FILT_BASE + 0x00000000)
@@ -1089,35 +1192,38 @@
 
 #define CIF_ISP_EXP_BASE		0x00002600
 #define CIF_ISP_EXP_CTRL		(CIF_ISP_EXP_BASE + 0x00000000)
-#define CIF_ISP_EXP_H_OFFSET		(CIF_ISP_EXP_BASE + 0x00000004)
-#define CIF_ISP_EXP_V_OFFSET		(CIF_ISP_EXP_BASE + 0x00000008)
-#define CIF_ISP_EXP_H_SIZE		(CIF_ISP_EXP_BASE + 0x0000000C)
-#define CIF_ISP_EXP_V_SIZE		(CIF_ISP_EXP_BASE + 0x00000010)
-#define CIF_ISP_EXP_MEAN_00		(CIF_ISP_EXP_BASE + 0x00000014)
-#define CIF_ISP_EXP_MEAN_10		(CIF_ISP_EXP_BASE + 0x00000018)
-#define CIF_ISP_EXP_MEAN_20		(CIF_ISP_EXP_BASE + 0x0000001c)
-#define CIF_ISP_EXP_MEAN_30		(CIF_ISP_EXP_BASE + 0x00000020)
-#define CIF_ISP_EXP_MEAN_40		(CIF_ISP_EXP_BASE + 0x00000024)
-#define CIF_ISP_EXP_MEAN_01		(CIF_ISP_EXP_BASE + 0x00000028)
-#define CIF_ISP_EXP_MEAN_11		(CIF_ISP_EXP_BASE + 0x0000002c)
-#define CIF_ISP_EXP_MEAN_21		(CIF_ISP_EXP_BASE + 0x00000030)
-#define CIF_ISP_EXP_MEAN_31		(CIF_ISP_EXP_BASE + 0x00000034)
-#define CIF_ISP_EXP_MEAN_41		(CIF_ISP_EXP_BASE + 0x00000038)
-#define CIF_ISP_EXP_MEAN_02		(CIF_ISP_EXP_BASE + 0x0000003c)
-#define CIF_ISP_EXP_MEAN_12		(CIF_ISP_EXP_BASE + 0x00000040)
-#define CIF_ISP_EXP_MEAN_22		(CIF_ISP_EXP_BASE + 0x00000044)
-#define CIF_ISP_EXP_MEAN_32		(CIF_ISP_EXP_BASE + 0x00000048)
-#define CIF_ISP_EXP_MEAN_42		(CIF_ISP_EXP_BASE + 0x0000004c)
-#define CIF_ISP_EXP_MEAN_03		(CIF_ISP_EXP_BASE + 0x00000050)
-#define CIF_ISP_EXP_MEAN_13		(CIF_ISP_EXP_BASE + 0x00000054)
-#define CIF_ISP_EXP_MEAN_23		(CIF_ISP_EXP_BASE + 0x00000058)
-#define CIF_ISP_EXP_MEAN_33		(CIF_ISP_EXP_BASE + 0x0000005c)
-#define CIF_ISP_EXP_MEAN_43		(CIF_ISP_EXP_BASE + 0x00000060)
-#define CIF_ISP_EXP_MEAN_04		(CIF_ISP_EXP_BASE + 0x00000064)
-#define CIF_ISP_EXP_MEAN_14		(CIF_ISP_EXP_BASE + 0x00000068)
-#define CIF_ISP_EXP_MEAN_24		(CIF_ISP_EXP_BASE + 0x0000006c)
-#define CIF_ISP_EXP_MEAN_34		(CIF_ISP_EXP_BASE + 0x00000070)
-#define CIF_ISP_EXP_MEAN_44		(CIF_ISP_EXP_BASE + 0x00000074)
+#define CIF_ISP_EXP_H_OFFSET_V10	(CIF_ISP_EXP_BASE + 0x00000004)
+#define CIF_ISP_EXP_V_OFFSET_V10	(CIF_ISP_EXP_BASE + 0x00000008)
+#define CIF_ISP_EXP_H_SIZE_V10		(CIF_ISP_EXP_BASE + 0x0000000C)
+#define CIF_ISP_EXP_V_SIZE_V10		(CIF_ISP_EXP_BASE + 0x00000010)
+#define CIF_ISP_EXP_SIZE_V12		(CIF_ISP_EXP_BASE + 0x00000004)
+#define CIF_ISP_EXP_OFFS_V12		(CIF_ISP_EXP_BASE + 0x00000008)
+#define CIF_ISP_EXP_MEAN_V12		(CIF_ISP_EXP_BASE + 0x0000000c)
+#define CIF_ISP_EXP_MEAN_00_V10		(CIF_ISP_EXP_BASE + 0x00000014)
+#define CIF_ISP_EXP_MEAN_10_V10		(CIF_ISP_EXP_BASE + 0x00000018)
+#define CIF_ISP_EXP_MEAN_20_V10		(CIF_ISP_EXP_BASE + 0x0000001c)
+#define CIF_ISP_EXP_MEAN_30_V10		(CIF_ISP_EXP_BASE + 0x00000020)
+#define CIF_ISP_EXP_MEAN_40_V10		(CIF_ISP_EXP_BASE + 0x00000024)
+#define CIF_ISP_EXP_MEAN_01_V10		(CIF_ISP_EXP_BASE + 0x00000028)
+#define CIF_ISP_EXP_MEAN_11_V10		(CIF_ISP_EXP_BASE + 0x0000002c)
+#define CIF_ISP_EXP_MEAN_21_V10		(CIF_ISP_EXP_BASE + 0x00000030)
+#define CIF_ISP_EXP_MEAN_31_V10		(CIF_ISP_EXP_BASE + 0x00000034)
+#define CIF_ISP_EXP_MEAN_41_V10		(CIF_ISP_EXP_BASE + 0x00000038)
+#define CIF_ISP_EXP_MEAN_02_V10		(CIF_ISP_EXP_BASE + 0x0000003c)
+#define CIF_ISP_EXP_MEAN_12_V10		(CIF_ISP_EXP_BASE + 0x00000040)
+#define CIF_ISP_EXP_MEAN_22_V10		(CIF_ISP_EXP_BASE + 0x00000044)
+#define CIF_ISP_EXP_MEAN_32_V10		(CIF_ISP_EXP_BASE + 0x00000048)
+#define CIF_ISP_EXP_MEAN_42_V10		(CIF_ISP_EXP_BASE + 0x0000004c)
+#define CIF_ISP_EXP_MEAN_03_V10		(CIF_ISP_EXP_BASE + 0x00000050)
+#define CIF_ISP_EXP_MEAN_13_V10		(CIF_ISP_EXP_BASE + 0x00000054)
+#define CIF_ISP_EXP_MEAN_23_V10		(CIF_ISP_EXP_BASE + 0x00000058)
+#define CIF_ISP_EXP_MEAN_33_V10		(CIF_ISP_EXP_BASE + 0x0000005c)
+#define CIF_ISP_EXP_MEAN_43_V10		(CIF_ISP_EXP_BASE + 0x00000060)
+#define CIF_ISP_EXP_MEAN_04_V10		(CIF_ISP_EXP_BASE + 0x00000064)
+#define CIF_ISP_EXP_MEAN_14_V10		(CIF_ISP_EXP_BASE + 0x00000068)
+#define CIF_ISP_EXP_MEAN_24_V10		(CIF_ISP_EXP_BASE + 0x0000006c)
+#define CIF_ISP_EXP_MEAN_34_V10		(CIF_ISP_EXP_BASE + 0x00000070)
+#define CIF_ISP_EXP_MEAN_44_V10		(CIF_ISP_EXP_BASE + 0x00000074)
 
 #define CIF_ISP_BLS_BASE		0x00002700
 #define CIF_ISP_BLS_CTRL		(CIF_ISP_BLS_BASE + 0x00000000)
@@ -1278,6 +1384,16 @@
 #define CIF_ISP_WDR_TONECURVE_YM_31_SHD	(CIF_ISP_WDR_BASE + 0x0000012C)
 #define CIF_ISP_WDR_TONECURVE_YM_32_SHD	(CIF_ISP_WDR_BASE + 0x00000130)
 
+#define CIF_ISP_HIST_BASE_V12		0x00002C00
+#define CIF_ISP_HIST_CTRL_V12		(CIF_ISP_HIST_BASE_V12 + 0x00000000)
+#define CIF_ISP_HIST_SIZE_V12		(CIF_ISP_HIST_BASE_V12 + 0x00000004)
+#define CIF_ISP_HIST_OFFS_V12		(CIF_ISP_HIST_BASE_V12 + 0x00000008)
+#define CIF_ISP_HIST_DBG1_V12		(CIF_ISP_HIST_BASE_V12 + 0x0000000C)
+#define CIF_ISP_HIST_DBG2_V12		(CIF_ISP_HIST_BASE_V12 + 0x0000001C)
+#define CIF_ISP_HIST_DBG3_V12		(CIF_ISP_HIST_BASE_V12 + 0x0000002C)
+#define CIF_ISP_HIST_WEIGHT_V12		(CIF_ISP_HIST_BASE_V12 + 0x0000003C)
+#define CIF_ISP_HIST_BIN_V12		(CIF_ISP_HIST_BASE_V12 + 0x00000120)
+
 #define CIF_ISP_VSM_BASE		0x00002F00
 #define CIF_ISP_VSM_MODE		(CIF_ISP_VSM_BASE + 0x00000000)
 #define CIF_ISP_VSM_H_OFFS		(CIF_ISP_VSM_BASE + 0x00000004)
diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h
index b471f01a84598..fbeb6b5dba031 100644
--- a/include/uapi/linux/rkisp1-config.h
+++ b/include/uapi/linux/rkisp1-config.h
@@ -32,8 +32,8 @@
 #define CIFISP_CTK_COEFF_MAX            0x100
 #define CIFISP_CTK_OFFSET_MAX           0x800
 
-#define CIFISP_AE_MEAN_MAX              25
-#define CIFISP_HIST_BIN_N_MAX           16
+#define CIFISP_AE_MEAN_MAX              81
+#define CIFISP_HIST_BIN_N_MAX           32
 #define CIFISP_AFM_MAX_WINDOWS          3
 #define CIFISP_DEGAMMA_CURVE_SIZE       17
 
@@ -69,7 +69,7 @@
  * Gamma out
  */
 /* Maximum number of color samples supported */
-#define CIFISP_GAMMA_OUT_MAX_SAMPLES       17
+#define CIFISP_GAMMA_OUT_MAX_SAMPLES       34
 
 /*
  * Lens shade correction
@@ -87,7 +87,7 @@
  * Histogram calculation
  */
 /* Last 3 values unused. */
-#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28
+#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 81
 
 /*
  * Defect Pixel Cluster Correction
@@ -723,7 +723,7 @@ struct cifisp_af_stat {
  * with ISP_HIST_XXX
  */
 struct cifisp_hist_stat {
-	unsigned short hist_bins[CIFISP_HIST_BIN_N_MAX];
+	unsigned int hist_bins[CIFISP_HIST_BIN_N_MAX];
 } __attribute__ ((packed));
 
 /**

From d8f0298973e0afaaf1364385c83952a380914acd Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 20 Aug 2018 18:17:08 +0800
Subject: [PATCH 1790/1852] media: rockchip: isp1: fix sp will stop to output
 after mp start in isp12

fix when sp and mp are configured to output the same size, sp will stop
to output after mp start in isp12.

Change-Id: Iec07aa8116ead608999f02dcb357f2dd2997d4a9
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/regs.h   | 30 +++++++++++++++++++
 drivers/media/platform/rockchip/isp1/rkisp1.c |  8 +++++
 2 files changed, 38 insertions(+)

diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index a18a7b52e1bb4..1b658c615f0f9 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -240,6 +240,35 @@
 
 /* CCL */
 #define CIF_CCL_CIF_CLK_DIS			BIT(2)
+/* VI_ISP_CLK_CTRL */
+#define CIF_CLK_CTRL_ISP_RAW			BIT(0)
+#define CIF_CLK_CTRL_ISP_RGB			BIT(1)
+#define CIF_CLK_CTRL_ISP_YUV			BIT(2)
+#define CIF_CLK_CTRL_ISP_3A			BIT(3)
+#define CIF_CLK_CTRL_MIPI_RAW			BIT(4)
+#define CIF_CLK_CTRL_ISP_IE			BIT(5)
+#define CIF_CLK_CTRL_RSZ_RAM			BIT(6)
+#define CIF_CLK_CTRL_JPEG_RAM			BIT(7)
+#define CIF_CLK_CTRL_ACLK_ISP			BIT(8)
+#define CIF_CLK_CTRL_MI_IDC			BIT(9)
+#define CIF_CLK_CTRL_MI_MP			BIT(10)
+#define CIF_CLK_CTRL_MI_JPEG			BIT(11)
+#define CIF_CLK_CTRL_MI_DP			BIT(12)
+#define CIF_CLK_CTRL_MI_Y12			BIT(13)
+#define CIF_CLK_CTRL_MI_SP			BIT(14)
+#define CIF_CLK_CTRL_MI_RAW0			BIT(15)
+#define CIF_CLK_CTRL_MI_RAW1			BIT(16)
+#define CIF_CLK_CTRL_MI_READ			BIT(17)
+#define CIF_CLK_CTRL_MI_RAWRD			BIT(18)
+#define CIF_CLK_CTRL_CP				BIT(19)
+#define CIF_CLK_CTRL_IE				BIT(20)
+#define CIF_CLK_CTRL_SI				BIT(21)
+#define CIF_CLK_CTRL_RSZM			BIT(22)
+#define CIF_CLK_CTRL_DPMUX			BIT(23)
+#define CIF_CLK_CTRL_JPEG			BIT(24)
+#define CIF_CLK_CTRL_RSZS			BIT(25)
+#define CIF_CLK_CTRL_MIPI			BIT(26)
+#define CIF_CLK_CTRL_MARVINMI			BIT(27)
 /* ICCL */
 #define CIF_ICCL_ISP_CLK			BIT(0)
 #define CIF_ICCL_CP_CLK				BIT(1)
@@ -693,6 +722,7 @@
 #define CIF_CTRL_BASE			0x00000000
 #define CIF_CCL				(CIF_CTRL_BASE + 0x00000000)
 #define CIF_VI_ID			(CIF_CTRL_BASE + 0x00000008)
+#define CIF_VI_ISP_CLK_CTRL_V12		(CIF_CTRL_BASE + 0x0000000C)
 #define CIF_ICCL			(CIF_CTRL_BASE + 0x00000010)
 #define CIF_IRCL			(CIF_CTRL_BASE + 0x00000014)
 #define CIF_VI_DPCL			(CIF_CTRL_BASE + 0x00000018)
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 54f2e04f51cf3..ea467b92c07db 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -474,6 +474,14 @@ static void rkisp1_config_clk(struct rkisp1_device *dev)
 		CIF_ICCL_IE_CLK | CIF_ICCL_MIPI_CLK | CIF_ICCL_DCROP_CLK;
 
 	writel(val, dev->base_addr + CIF_ICCL);
+
+	if (dev->isp_ver == ISP_V12) {
+		val = CIF_CLK_CTRL_MI_Y12 | CIF_CLK_CTRL_MI_SP |
+		      CIF_CLK_CTRL_MI_RAW0 | CIF_CLK_CTRL_MI_RAW1 |
+		      CIF_CLK_CTRL_MI_READ | CIF_CLK_CTRL_MI_RAWRD |
+		      CIF_CLK_CTRL_CP | CIF_CLK_CTRL_IE;
+		writel(val, dev->base_addr + CIF_VI_ISP_CLK_CTRL_V12);
+	}
 }
 
 /***************************** isp sub-devs *******************************/

From 37ac001da4bfd962dd4ed384d58bcc1175e7e7d9 Mon Sep 17 00:00:00 2001
From: Nickey Yang <nickey.yang@rock-chips.com>
Date: Fri, 7 Sep 2018 14:58:05 +0800
Subject: [PATCH 1791/1852] arm: dts: rk3288-linux: add adc-keys

Change-Id: I76de54ab7ab4d5a45ea803bddae45a20431c1e3a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-evb-act8846.dts     |  2 +-
 arch/arm/boot/dts/rk3288-evb-rk808-linux.dts | 38 ++++++++++++++++++++
 2 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 280f3c385d13a..9059dbed4e9cd 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -96,7 +96,7 @@
 		button-up {
 			label = "Volume Up";
 			linux,code = <KEY_VOLUMEUP>;
-			press-threshold-microvolt = <100000>;
+			press-threshold-microvolt = <18000>;
 		};
 
 		button-down {
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
index 4fb810f8b2185..86c532ea161cb 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
@@ -87,6 +87,44 @@
 		pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <18000>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <300000>;
+		};
+
+		menu {
+			label = "Menu";
+			linux,code = <KEY_MENU>;
+			press-threshold-microvolt = <640000>;
+		};
+
+		esc {
+			label = "Esc";
+			linux,code = <KEY_ESC>;
+			press-threshold-microvolt = <1000000>;
+		};
+
+		home  {
+			label = "Home";
+			linux,code = <KEY_HOME>;
+			press-threshold-microvolt = <1300000>;
+		};
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		#address-cells = <1>;

From 6470d110155c7acced0f1fcbe90d3e69060e2e19 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 10 Sep 2018 20:21:16 +0800
Subject: [PATCH 1792/1852] MALI: utgard: RK: do not get GIT_REV on mali Kbuild

Disable build mali driver when just git commit change.

Change-Id: Ie659e2da02260079ccd5d2873f28afbe7f2b2761
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/gpu/arm/mali400/mali/Kbuild | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/arm/mali400/mali/Kbuild b/drivers/gpu/arm/mali400/mali/Kbuild
index 6ac149a10136c..f5e8288df4428 100755
--- a/drivers/gpu/arm/mali400/mali/Kbuild
+++ b/drivers/gpu/arm/mali400/mali/Kbuild
@@ -200,7 +200,7 @@ CHANGED_REVISION := $(shell $(SVN_INFO) | grep '^Last Changed Rev: ' | cut -d: -
 REPO_URL := $(shell $(SVN_INFO) | grep '^URL: ' | cut -d: -f2- | cut -b2-)
 
 else # SVN
-GIT_REV := $(shell cd $(src); git describe --always 2>/dev/null)
+# GIT_REV := $(shell cd $(src); git describe --always 2>/dev/null)
 ifneq ($(GIT_REV),)
 # Git detected
 DRIVER_REV := $(MALI_RELEASE_NAME)-$(GIT_REV)

From dae6f3ff2953dc824dcd6c05098d03c54ffa7789 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Mon, 10 Sep 2018 21:02:53 +0800
Subject: [PATCH 1793/1852] MALI: utgard: RK: do not build ump on Kbuild

Save a lot of build time.

Change-Id: I0e63cfae3c3c2625b3100f016134120e5551a5b5
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/gpu/arm/mali400/Kbuild | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/arm/mali400/Kbuild b/drivers/gpu/arm/mali400/Kbuild
index addbd0031ca49..dbb7ad3e5d85e 100644
--- a/drivers/gpu/arm/mali400/Kbuild
+++ b/drivers/gpu/arm/mali400/Kbuild
@@ -1,2 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
-obj-y += mali/ ump/
+obj-y += mali/

From cb3d2ad5abe63f452dcff4ac4c85b44db33f1427 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 11 Sep 2018 11:00:24 +0800
Subject: [PATCH 1794/1852] ARM: config: enable INPUT_RK8XX_PWRKEY for
 rockchip_linux_defconfig

CONFIG_INPUT_RK8XX_PWRKEY is required for pmic power key.

Change-Id: I7ca3e364f6b3beaebabbd7a79e4914e866414663
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/configs/rockchip_linux_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rockchip_linux_defconfig b/arch/arm/configs/rockchip_linux_defconfig
index 2e3d730734a76..f34123535b820 100644
--- a/arch/arm/configs/rockchip_linux_defconfig
+++ b/arch/arm/configs/rockchip_linux_defconfig
@@ -232,6 +232,7 @@ CONFIG_TOUCHSCREEN_GT9XX=y
 CONFIG_TOUCHSCREEN_ELAN=y
 CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
 CONFIG_INPUT_MISC=y
+CONFIG_INPUT_RK8XX_PWRKEY=y
 CONFIG_INPUT_UINPUT=y
 CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
 CONFIG_SERIO_RAW=y

From bbf9f0614a186e9c7ae544886d8385340eba00cb Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 30 Aug 2018 16:32:42 +0800
Subject: [PATCH 1795/1852] media: i2c: add gc0329 driver

Change-Id: I21b1d6a8a4cb06368ff1e4c64c174382b8c94880
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/Kconfig  |    9 +
 drivers/media/i2c/Makefile |    1 +
 drivers/media/i2c/gc0329.c | 1091 ++++++++++++++++++++++++++++++++++++
 3 files changed, 1101 insertions(+)
 create mode 100644 drivers/media/i2c/gc0329.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 7303b6e74b10c..e618ea6c23fab 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -740,6 +740,15 @@ config VIDEO_GC2145
 	  To compile this driver as a module, choose M here: the
 	  module will be called gc2145.
 
+config VIDEO_GC0329
+	tristate "GalaxyCore GC0329 sensor support"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	help
+	  Support for the GalaxyCore GC0329 sensor.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gc0329.
+
 comment "Flash devices"
 
 config VIDEO_ADP1653
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index f04d9168ac1c3..f74b75717a6d7 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -90,3 +90,4 @@ obj-$(CONFIG_VIDEO_IMX219)	+= imx219.o
 obj-$(CONFIG_VIDEO_GC2155)	+= gc2155.o
 obj-$(CONFIG_VIDEO_GC0312)	+= gc0312.o
 obj-$(CONFIG_VIDEO_GC2145)	+= gc2145.o
+obj-$(CONFIG_VIDEO_GC0329)	+= gc0329.o
diff --git a/drivers/media/i2c/gc0329.c b/drivers/media/i2c/gc0329.c
new file mode 100644
index 0000000000000..a4a8ed737b81a
--- /dev/null
+++ b/drivers/media/i2c/gc0329.c
@@ -0,0 +1,1091 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * gc0329 sensor driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/media.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/videodev2.h>
+
+#include <media/media-entity.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+#define DRIVER_NAME "gc0329"
+#define GC0329_PIXEL_RATE		(24 * 1000 * 1000)
+
+/*
+ * GC0329 register definitions
+ */
+
+#define REG_SC_CHIP_ID			0x00
+#define GC0329_ID			0xc0
+#define REG_NULL			0xFFFF	/* Array end token */
+
+struct sensor_register {
+	u16 addr;
+	u8 value;
+};
+
+struct gc0329_framesize {
+	u16 width;
+	u16 height;
+	u16 fps;
+	const struct sensor_register *regs;
+};
+
+struct gc0329_pll_ctrl {
+	u8 ctrl1;
+	u8 ctrl2;
+	u8 ctrl3;
+};
+
+struct gc0329_pixfmt {
+	u32 code;
+	/* Output format Register Value (REG_FORMAT_CTRL00) */
+	struct sensor_register *format_ctrl_regs;
+};
+
+struct pll_ctrl_reg {
+	unsigned int div;
+	unsigned char reg;
+};
+
+static const char * const gc0329_supply_names[] = {
+	"dovdd",	/* Digital I/O power */
+	"avdd",		/* Analog power */
+	"dvdd",		/* Digital core power */
+};
+
+#define GC0329_NUM_SUPPLIES ARRAY_SIZE(gc0329_supply_names)
+
+struct gc0329 {
+	struct v4l2_subdev sd;
+	struct media_pad pad;
+	struct v4l2_mbus_framefmt format;
+	unsigned int fps;
+	unsigned int xvclk_frequency;
+	struct clk *xvclk;
+	struct gpio_desc *pwdn_gpio;
+	struct regulator_bulk_data supplies[GC0329_NUM_SUPPLIES];
+	struct mutex lock; /* Protects streaming, format, interval */
+	struct i2c_client *client;
+	struct v4l2_ctrl_handler ctrls;
+	struct v4l2_ctrl *link_frequency;
+	const struct gc0329_framesize *frame_size;
+	int streaming;
+};
+
+static const struct sensor_register gc0329_vga_regs[] = {
+	{0xfe, 0x80},
+	{0xfc, 0x16},
+	{0xfc, 0x16},
+	{0xfe, 0x00},
+
+	{0x73, 0x90},
+	{0x74, 0x80},
+	{0x75, 0x80},
+	{0x76, 0x94},
+	/* analog */
+	{0xfc, 0x16},
+	{0x0a, 0x00},
+	{0x0c, 0x00},
+	{0x17, 0x14},
+	{0x19, 0x05},
+	{0x1b, 0x24},
+	{0x1c, 0x04},
+	{0x1e, 0x00},
+	{0x1f, 0xc0},
+	{0x20, 0x00},
+	{0x21, 0x48},
+	{0x23, 0x22},
+	{0x24, 0x16},
+	/*   blk  */
+	{0x26, 0xf7},
+	{0x32, 0x04},
+	{0x33, 0x20},
+	{0x34, 0x20},
+	{0x35, 0x20},
+	{0x36, 0x20},
+	/*   ISP  */
+	{0x40, 0xff},
+	{0x41, 0x00},
+	{0x42, 0xfe},
+	{0x46, 0x03},
+	{0x4b, 0xcb},
+	{0x4d, 0x01},
+	{0x4f, 0x01},
+	{0x70, 0x48},
+	/*  DNDD  */
+	{0x80, 0xe7},
+	{0x82, 0x55},
+	{0x87, 0x4a},
+	/*  ASDE  */
+	{0xfe, 0x01},
+	{0x18, 0x22},
+	{0xfe, 0x00},
+	{0x9c, 0x0a},
+	{0xa4, 0x50},
+	{0xa5, 0x21},
+	{0xa7, 0x35},
+	{0xdd, 0x54},
+	{0x95, 0x35},
+	/*  gamma */
+	{0xfe, 0x00},
+	{0xbf, 0x06},
+	{0xc0, 0x14},
+	{0xc1, 0x27},
+	{0xc2, 0x3b},
+	{0xc3, 0x4f},
+	{0xc4, 0x62},
+	{0xc5, 0x72},
+	{0xc6, 0x8d},
+	{0xc7, 0xa4},
+	{0xc8, 0xb8},
+	{0xc9, 0xc9},
+	{0xca, 0xd6},
+	{0xcb, 0xe0},
+	{0xcc, 0xe8},
+	{0xcd, 0xf4},
+	{0xce, 0xfc},
+	{0xcf, 0xff},
+	/*   CC   */
+	{0xfe, 0x00},
+	{0xb3, 0x44},
+	{0xb4, 0xfd},
+	{0xb5, 0x02},
+	{0xb6, 0xfa},
+	{0xb7, 0x48},
+	{0xb8, 0xf0},
+	/*  crop  */
+	{0x50, 0x01},
+	{0x19, 0x05},
+	{0x20, 0x01},
+	{0x22, 0xba},
+	{0x21, 0x48},
+	/*   YCP  */
+	{0xfe, 0x00},
+	{0xd1, 0x34},
+	{0xd2, 0x34},
+	/*   AEC  */
+	{0xfe, 0x01},
+	{0x10, 0x40},
+	{0x11, 0x21},
+	{0x12, 0x07},
+	{0x13, 0x50},
+	{0x17, 0x88},
+	{0x21, 0xb0},
+	{0x22, 0x48},
+	{0x3c, 0x95},
+	{0x3d, 0x50},
+	{0x3e, 0x48},
+	/*   AWB  */
+	{0xfe, 0x01},
+	{0x06, 0x08},
+	{0x07, 0x06},
+	{0x08, 0xa6},
+	{0x09, 0xee},
+	{0x50, 0xfc},
+	{0x51, 0x28},
+	{0x52, 0x10},
+	{0x53, 0x08},
+	{0x54, 0x12},
+	{0x55, 0x10},
+	{0x56, 0x10},
+	{0x58, 0x80},
+	{0x59, 0x08},
+	{0x5a, 0x02},
+	{0x5b, 0x63},
+	{0x5c, 0x34},
+	{0x5d, 0x73},
+	{0x5e, 0x29},
+	{0x5f, 0x40},
+	{0x60, 0x40},
+	{0x61, 0xc8},
+	{0x62, 0xa0},
+	{0x63, 0x40},
+	{0x64, 0x38},
+	{0x65, 0x98},
+	{0x66, 0xfa},
+	{0x67, 0x80},
+	{0x68, 0x60},
+	{0x69, 0x90},
+	{0x6a, 0x40},
+	{0x6b, 0x39},
+	{0x6c, 0x28},
+	{0x6d, 0x28},
+	{0x6e, 0x41},
+	{0x70, 0x10},
+	{0x71, 0x00},
+	{0x72, 0x08},
+	{0x73, 0x40},
+	{0x80, 0x70},
+	{0x81, 0x58},
+	{0x82, 0x42},
+	{0x83, 0x40},
+	{0x84, 0x40},
+	{0x85, 0x40},
+	/* CC-AWB */
+	{0xd0, 0x00},
+	{0xd2, 0x2c},
+	{0xd3, 0x80},
+	/*   ABS  */
+	{0x9c, 0x02},
+	{0x9d, 0x10},
+	/*   LSC  */
+	{0xfe, 0x01},
+	{0xa0, 0x00},
+	{0xa1, 0x3c},
+	{0xa2, 0x50},
+	{0xa3, 0x00},
+	{0xa8, 0x0f},
+	{0xa9, 0x08},
+	{0xaa, 0x00},
+	{0xab, 0x04},
+	{0xac, 0x00},
+	{0xad, 0x07},
+	{0xae, 0x0e},
+	{0xaf, 0x00},
+	{0xb0, 0x00},
+	{0xb1, 0x09},
+	{0xb2, 0x00},
+	{0xb3, 0x00},
+	{0xb4, 0x31},
+	{0xb5, 0x19},
+	{0xb6, 0x24},
+	{0xba, 0x3a},
+	{0xbb, 0x24},
+	{0xbc, 0x2a},
+	{0xc0, 0x17},
+	{0xc1, 0x13},
+	{0xc2, 0x17},
+	{0xc6, 0x21},
+	{0xc7, 0x1c},
+	{0xc8, 0x1c},
+	{0xb7, 0x00},
+	{0xb8, 0x00},
+	{0xb9, 0x00},
+	{0xbd, 0x00},
+	{0xbe, 0x00},
+	{0xbf, 0x00},
+	{0xc3, 0x00},
+	{0xc4, 0x00},
+	{0xc5, 0x00},
+	{0xc9, 0x00},
+	{0xca, 0x00},
+	{0xcb, 0x00},
+	{0xa4, 0x00},
+	{0xa5, 0x00},
+	{0xa6, 0x00},
+	{0xa7, 0x00},
+	/*  asde  */
+	{0xfe, 0x00},
+	{0xa0, 0xaf},
+	{0xa2, 0xff},
+	{0x44, 0xa2},
+	{REG_NULL, 0x00},
+};
+
+static const struct sensor_register gc0329_vga_regs_14fps[] = {
+	/* flicker 14.2fps */
+	{0xfe, 0x00},
+	{0x05, 0x02},
+	{0x06, 0x2c},
+	{0x07, 0x00},
+	{0x08, 0xb8},
+	{0xfe, 0x01},
+	{0x29, 0x00},
+	{0x2a, 0x60},
+	{0x2b, 0x02},
+	{0x2c, 0xa0},
+	{0x2d, 0x02},
+	{0x2e, 0xa0},
+	{0x2f, 0x02},
+	{0x30, 0xa0},
+	{0x31, 0x02},
+	{0x32, 0xa0},
+	{0x33, 0x20},
+	{REG_NULL, 0x00},
+};
+
+static const struct sensor_register gc0329_vga_regs_28fps[] = {
+	/* flicker 28.5fps */
+	{0xfe, 0x00},
+	{0x05, 0x00},
+	{0x06, 0x6a},
+	{0x07, 0x00},
+	{0x08, 0x20},
+	{0xfe, 0x01},
+	{0x29, 0x00},
+	{0x2a, 0x96},
+	{0x2b, 0x01},
+	{0x2c, 0xc2},
+	{0x2d, 0x01},
+	{0x2e, 0xc2},
+	{0x2f, 0x01},
+	{0x30, 0xc2},
+	{0x31, 0x01},
+	{0x32, 0xc2},
+	{0x33, 0x20},
+	{REG_NULL, 0x00},
+};
+
+static const struct gc0329_framesize gc0329_framesizes[] = {
+	{
+		.width		= 640,
+		.height		= 480,
+		.fps		= 14,
+		.regs		= gc0329_vga_regs_14fps,
+	},
+	{
+		.width		= 640,
+		.height		= 480,
+		.fps		= 28,
+		.regs		= gc0329_vga_regs_28fps,
+	}
+};
+
+static const struct gc0329_pixfmt gc0329_formats[] = {
+	{
+		.code = MEDIA_BUS_FMT_YUYV8_2X8,
+	}
+};
+
+static inline struct gc0329 *to_gc0329(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc0329, sd);
+}
+
+/* sensor register write */
+static int gc0329_write(struct i2c_client *client, u8 reg, u8 val)
+{
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+	buf[1] = val;
+
+	msg.addr = client->addr;
+	msg.flags = client->flags;
+	msg.buf = buf;
+	msg.len = sizeof(buf);
+
+	ret = i2c_transfer(client->adapter, &msg, 1);
+	if (ret >= 0)
+		return 0;
+
+	dev_err(&client->dev,
+		"gc0329 write reg(0x%x val:0x%x) failed !\n", reg, val);
+
+	return ret;
+}
+
+/* sensor register read */
+static int gc0329_read(struct i2c_client *client, u8 reg, u8 *val)
+{
+	struct i2c_msg msg[2];
+	u8 buf[1];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+
+	msg[0].addr = client->addr;
+	msg[0].flags = client->flags;
+	msg[0].buf = buf;
+	msg[0].len = sizeof(buf);
+
+	msg[1].addr = client->addr;
+	msg[1].flags = client->flags | I2C_M_RD;
+	msg[1].buf = buf;
+	msg[1].len = 1;
+
+	ret = i2c_transfer(client->adapter, msg, 2);
+	if (ret >= 0) {
+		*val = buf[0];
+		return 0;
+	}
+
+	dev_err(&client->dev,
+		"gc0329 read reg:0x%x failed!\n", reg);
+
+	return ret;
+}
+
+static int gc0329_write_array(struct i2c_client *client,
+			      const struct sensor_register *regs)
+{
+	int i, ret = 0;
+
+	i = 0;
+	while (regs[i].addr != REG_NULL) {
+		ret = gc0329_write(client, regs[i].addr, regs[i].value);
+		if (ret) {
+			dev_err(&client->dev, "%s failed !\n", __func__);
+			break;
+		}
+
+		i++;
+	}
+
+	return ret;
+}
+
+static void gc0329_get_default_format(struct v4l2_mbus_framefmt *format)
+{
+	format->width = gc0329_framesizes[0].width;
+	format->height = gc0329_framesizes[0].height;
+	format->colorspace = V4L2_COLORSPACE_SRGB;
+	format->code = gc0329_formats[0].code;
+	format->field = V4L2_FIELD_NONE;
+}
+
+static void gc0329_set_streaming(struct gc0329 *gc0329, int on)
+{
+	struct i2c_client *client = gc0329->client;
+	int ret;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	ret = gc0329_write(client, 0xfe, 0x00);
+	if (!on) {
+		ret |= gc0329_write(client, 0xfc, 0x17);
+		ret |= gc0329_write(client, 0xf0, 0x00);
+		ret |= gc0329_write(client, 0xf1, 0x00);
+	} else {
+		ret |= gc0329_write(client, 0xfc, 0x16);
+		ret |= gc0329_write(client, 0xf0, 0x07);
+		ret |= gc0329_write(client, 0xf1, 0x01);
+	}
+	if (ret)
+		dev_err(&client->dev, "gc0329 soft standby failed\n");
+}
+
+/*
+ * V4L2 subdev video and pad level operations
+ */
+
+static int gc0329_enum_mbus_code(struct v4l2_subdev *sd,
+				 struct v4l2_subdev_pad_config *cfg,
+				 struct v4l2_subdev_mbus_code_enum *code)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (code->index >= ARRAY_SIZE(gc0329_formats))
+		return -EINVAL;
+
+	code->code = gc0329_formats[code->index].code;
+
+	return 0;
+}
+
+static int gc0329_enum_frame_sizes(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i = ARRAY_SIZE(gc0329_formats);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (fse->index >= ARRAY_SIZE(gc0329_framesizes))
+		return -EINVAL;
+
+	while (--i)
+		if (fse->code == gc0329_formats[i].code)
+			break;
+
+	fse->code = gc0329_formats[i].code;
+
+	fse->min_width  = gc0329_framesizes[fse->index].width;
+	fse->max_width  = fse->min_width;
+	fse->max_height = gc0329_framesizes[fse->index].height;
+	fse->min_height = fse->max_height;
+
+	return 0;
+}
+
+static int gc0329_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0329 *gc0329 = to_gc0329(sd);
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		struct v4l2_mbus_framefmt *mf;
+
+		mf = v4l2_subdev_get_try_format(sd, cfg, 0);
+		mutex_lock(&gc0329->lock);
+		fmt->format = *mf;
+		mutex_unlock(&gc0329->lock);
+		return 0;
+#else
+	return -ENOTTY;
+#endif
+	}
+
+	mutex_lock(&gc0329->lock);
+	fmt->format = gc0329->format;
+	mutex_unlock(&gc0329->lock);
+
+	dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
+		gc0329->format.code, gc0329->format.width,
+		gc0329->format.height);
+
+	return 0;
+}
+
+static void __gc0329_try_frame_size_fps(struct v4l2_mbus_framefmt *mf,
+				    const struct gc0329_framesize **size,
+				    unsigned int fps)
+{
+	const struct gc0329_framesize *fsize = &gc0329_framesizes[0];
+	const struct gc0329_framesize *match = NULL;
+	unsigned int i = ARRAY_SIZE(gc0329_framesizes);
+	unsigned int min_err = UINT_MAX;
+
+	while (i--) {
+		unsigned int err = abs(fsize->width - mf->width)
+				+ abs(fsize->height - mf->height);
+		if (err < min_err && fsize->regs[0].addr) {
+			min_err = err;
+			match = fsize;
+		}
+		fsize++;
+	}
+
+	if (!match) {
+		match = &gc0329_framesizes[0];
+	} else {
+		fsize = &gc0329_framesizes[0];
+		for (i = 0; i < ARRAY_SIZE(gc0329_framesizes); i++) {
+			if (fsize->width == match->width &&
+				fsize->height == match->height &&
+				fps >= fsize->fps)
+				match = fsize;
+
+			fsize++;
+		}
+	}
+
+	mf->width  = match->width;
+	mf->height = match->height;
+
+	if (size)
+		*size = match;
+}
+
+static int gc0329_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int index = ARRAY_SIZE(gc0329_formats);
+	struct v4l2_mbus_framefmt *mf = &fmt->format;
+	const struct gc0329_framesize *size = NULL;
+	struct gc0329 *gc0329 = to_gc0329(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	__gc0329_try_frame_size_fps(mf, &size, gc0329->fps);
+
+	while (--index >= 0)
+		if (gc0329_formats[index].code == mf->code)
+			break;
+
+	if (index < 0)
+		return -EINVAL;
+
+	mf->colorspace = V4L2_COLORSPACE_SRGB;
+	mf->code = gc0329_formats[index].code;
+	mf->field = V4L2_FIELD_NONE;
+
+	mutex_lock(&gc0329->lock);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+		*mf = fmt->format;
+#else
+		return -ENOTTY;
+#endif
+	} else {
+		if (gc0329->streaming) {
+			mutex_unlock(&gc0329->lock);
+			return -EBUSY;
+		}
+
+		gc0329->frame_size = size;
+		gc0329->format = fmt->format;
+	}
+
+	mutex_unlock(&gc0329->lock);
+	return ret;
+}
+
+static int gc0329_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0329 *gc0329 = to_gc0329(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	mutex_lock(&gc0329->lock);
+
+	on = !!on;
+
+	if (gc0329->streaming == on)
+		goto unlock;
+
+	if (!on) {
+		/* Stop Streaming Sequence */
+		gc0329_set_streaming(gc0329, on);
+		gc0329->streaming = on;
+		if (!IS_ERR(gc0329->pwdn_gpio)) {
+			gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
+			usleep_range(2000, 5000);
+		}
+		goto unlock;
+	}
+	if (!IS_ERR(gc0329->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
+
+	ret = gc0329_write_array(client, gc0329_vga_regs);
+	if (ret)
+		goto unlock;
+
+	ret = gc0329_write_array(client, gc0329->frame_size->regs);
+	if (ret)
+		goto unlock;
+
+	gc0329_set_streaming(gc0329, on);
+	gc0329->streaming = on;
+
+unlock:
+	mutex_unlock(&gc0329->lock);
+	return ret;
+}
+
+static int gc0329_set_test_pattern(struct gc0329 *gc0329, int value)
+{
+	return 0;
+}
+
+static int gc0329_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct gc0329 *gc0329 =
+			container_of(ctrl->handler, struct gc0329, ctrls);
+
+	switch (ctrl->id) {
+	case V4L2_CID_TEST_PATTERN:
+		return gc0329_set_test_pattern(gc0329, ctrl->val);
+	}
+
+	return 0;
+}
+
+static const struct v4l2_ctrl_ops gc0329_ctrl_ops = {
+	.s_ctrl = gc0329_s_ctrl,
+};
+
+static const char * const gc0329_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bars",
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev internal operations
+ */
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int gc0329_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct v4l2_mbus_framefmt *format =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	gc0329_get_default_format(format);
+
+	return 0;
+}
+#endif
+
+static int gc0329_g_mbus_config(struct v4l2_subdev *sd,
+				struct v4l2_mbus_config *config)
+{
+	config->type = V4L2_MBUS_PARALLEL;
+	config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_VSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_PCLK_SAMPLE_RISING;
+
+	return 0;
+}
+
+static int gc0329_g_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct gc0329 *gc0329 = to_gc0329(sd);
+
+	mutex_lock(&gc0329->lock);
+	fi->interval.numerator = 10000;
+	fi->interval.denominator = gc0329->fps * 10000;
+	mutex_unlock(&gc0329->lock);
+
+	return 0;
+}
+
+static int gc0329_s_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0329 *gc0329 = to_gc0329(sd);
+	const struct gc0329_framesize *size = NULL;
+	struct v4l2_mbus_framefmt mf;
+	unsigned int fps;
+	int ret = 0;
+
+	dev_dbg(&client->dev, "Setting %d/%d frame interval\n",
+		fi->interval.numerator, fi->interval.denominator);
+
+	mutex_lock(&gc0329->lock);
+	fps = DIV_ROUND_CLOSEST(fi->interval.denominator,
+		fi->interval.numerator);
+	mf = gc0329->format;
+	__gc0329_try_frame_size_fps(&mf, &size, fps);
+	if (gc0329->frame_size != size) {
+		ret = gc0329_write_array(client, size->regs);
+		if (ret)
+			goto unlock;
+		gc0329->frame_size = size;
+		gc0329->fps = fps;
+	}
+unlock:
+	mutex_unlock(&gc0329->lock);
+
+	return ret;
+}
+
+static const struct v4l2_subdev_core_ops gc0329_subdev_core_ops = {
+	.log_status = v4l2_ctrl_subdev_log_status,
+	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static const struct v4l2_subdev_video_ops gc0329_subdev_video_ops = {
+	.s_stream = gc0329_s_stream,
+	.g_mbus_config = gc0329_g_mbus_config,
+	.g_frame_interval = gc0329_g_frame_interval,
+	.s_frame_interval = gc0329_s_frame_interval,
+};
+
+static const struct v4l2_subdev_pad_ops gc0329_subdev_pad_ops = {
+	.enum_mbus_code = gc0329_enum_mbus_code,
+	.enum_frame_size = gc0329_enum_frame_sizes,
+	.get_fmt = gc0329_get_fmt,
+	.set_fmt = gc0329_set_fmt,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_ops gc0329_subdev_ops = {
+	.core  = &gc0329_subdev_core_ops,
+	.video = &gc0329_subdev_video_ops,
+	.pad   = &gc0329_subdev_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops gc0329_subdev_internal_ops = {
+	.open = gc0329_open,
+};
+#endif
+
+static int gc0329_detect(struct gc0329 *gc0329)
+{
+	struct i2c_client *client = gc0329->client;
+	u8 pid = 0;
+	int ret;
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	/* Check sensor revision */
+	ret = gc0329_write(client, 0xfc, 0x16);
+	msleep(20);
+	ret |= gc0329_read(client, REG_SC_CHIP_ID, &pid);
+	if (!ret) {
+		if (pid != GC0329_ID) {
+			ret = -1;
+			dev_err(&client->dev,
+				"Sensor detection failed (%X, %d)\n",
+				pid, ret);
+		} else {
+			dev_info(&client->dev,
+				"Found GC0329 id:%X sensor\n", pid);
+			if (!IS_ERR(gc0329->pwdn_gpio))
+				gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
+		}
+	}
+
+	return ret;
+}
+
+static int __gc0329_power_on(struct gc0329 *gc0329)
+{
+	int ret;
+	struct device *dev = &gc0329->client->dev;
+
+	if (!IS_ERR(gc0329->xvclk)) {
+		ret = clk_set_rate(gc0329->xvclk, 24000000);
+		if (ret < 0)
+			dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+	}
+
+	if (!IS_ERR(gc0329->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc0329->supplies)) {
+		ret = regulator_bulk_enable(GC0329_NUM_SUPPLIES,
+			gc0329->supplies);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable regulators\n");
+
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc0329->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc0329->xvclk)) {
+		ret = clk_prepare_enable(gc0329->xvclk);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable xvclk\n");
+	}
+
+	usleep_range(7000, 10000);
+
+	return 0;
+}
+
+static void __gc0329_power_off(struct gc0329 *gc0329)
+{
+	if (!IS_ERR(gc0329->xvclk))
+		clk_disable_unprepare(gc0329->xvclk);
+	if (!IS_ERR(gc0329->supplies))
+		regulator_bulk_disable(GC0329_NUM_SUPPLIES, gc0329->supplies);
+	if (!IS_ERR(gc0329->pwdn_gpio))
+		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
+}
+
+static int gc0329_configure_regulators(struct gc0329 *gc0329)
+{
+	unsigned int i;
+
+	for (i = 0; i < GC0329_NUM_SUPPLIES; i++)
+		gc0329->supplies[i].supply = gc0329_supply_names[i];
+
+	return devm_regulator_bulk_get(&gc0329->client->dev,
+				       GC0329_NUM_SUPPLIES,
+				       gc0329->supplies);
+}
+
+static int gc0329_parse_of(struct gc0329 *gc0329)
+{
+	struct device *dev = &gc0329->client->dev;
+	int ret;
+
+	gc0329->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(gc0329->pwdn_gpio))
+		dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
+
+	ret = gc0329_configure_regulators(gc0329);
+	if (ret)
+		dev_info(dev, "Failed to get power regulators\n");
+
+	return __gc0329_power_on(gc0329);
+}
+
+static int gc0329_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct v4l2_subdev *sd;
+	struct gc0329 *gc0329;
+	int ret;
+
+	gc0329 = devm_kzalloc(&client->dev, sizeof(*gc0329), GFP_KERNEL);
+	if (!gc0329)
+		return -ENOMEM;
+
+	gc0329->client = client;
+	gc0329->xvclk = devm_clk_get(&client->dev, "xvclk");
+	if (IS_ERR(gc0329->xvclk)) {
+		dev_err(&client->dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+
+	gc0329_parse_of(gc0329);
+
+	gc0329->xvclk_frequency = clk_get_rate(gc0329->xvclk);
+	if (gc0329->xvclk_frequency < 6000000 ||
+	    gc0329->xvclk_frequency > 27000000)
+		return -EINVAL;
+
+	v4l2_ctrl_handler_init(&gc0329->ctrls, 2);
+	gc0329->link_frequency =
+			v4l2_ctrl_new_std(&gc0329->ctrls, &gc0329_ctrl_ops,
+					  V4L2_CID_PIXEL_RATE, 0,
+					  GC0329_PIXEL_RATE, 1,
+					  GC0329_PIXEL_RATE);
+
+	v4l2_ctrl_new_std_menu_items(&gc0329->ctrls, &gc0329_ctrl_ops,
+				     V4L2_CID_TEST_PATTERN,
+				     ARRAY_SIZE(gc0329_test_pattern_menu) - 1,
+				     0, 0, gc0329_test_pattern_menu);
+	gc0329->sd.ctrl_handler = &gc0329->ctrls;
+
+	if (gc0329->ctrls.error) {
+		dev_err(&client->dev, "%s: control initialization error %d\n",
+			__func__, gc0329->ctrls.error);
+		return  gc0329->ctrls.error;
+	}
+
+	sd = &gc0329->sd;
+	client->flags |= I2C_CLIENT_SCCB;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	v4l2_i2c_subdev_init(sd, client, &gc0329_subdev_ops);
+
+	sd->internal_ops = &gc0329_subdev_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+		     V4L2_SUBDEV_FL_HAS_EVENTS;
+#endif
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	gc0329->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &gc0329->pad, 0);
+	if (ret < 0) {
+		v4l2_ctrl_handler_free(&gc0329->ctrls);
+		return ret;
+	}
+#endif
+
+	mutex_init(&gc0329->lock);
+
+	gc0329_get_default_format(&gc0329->format);
+	gc0329->frame_size = &gc0329_framesizes[0];
+	gc0329->format.width = gc0329_framesizes[0].width;
+	gc0329->format.height = gc0329_framesizes[0].height;
+	gc0329->fps = gc0329_framesizes[0].fps;
+
+	ret = gc0329_detect(gc0329);
+	if (ret < 0)
+		goto error;
+
+	ret = v4l2_async_register_subdev(&gc0329->sd);
+	if (ret)
+		goto error;
+
+	dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
+
+	return 0;
+
+error:
+	v4l2_ctrl_handler_free(&gc0329->ctrls);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc0329->lock);
+	__gc0329_power_off(gc0329);
+	return ret;
+}
+
+static int gc0329_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc0329 *gc0329 = to_gc0329(sd);
+
+	v4l2_ctrl_handler_free(&gc0329->ctrls);
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc0329->lock);
+
+	__gc0329_power_off(gc0329);
+
+	return 0;
+}
+
+static const struct i2c_device_id gc0329_id[] = {
+	{ "gc0329", 0 },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(i2c, gc0329_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id gc0329_of_match[] = {
+	{ .compatible = "galaxycore,gc0329", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, gc0329_of_match);
+#endif
+
+static struct i2c_driver gc0329_i2c_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.of_match_table = of_match_ptr(gc0329_of_match),
+	},
+	.probe		= gc0329_probe,
+	.remove		= gc0329_remove,
+	.id_table	= gc0329_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&gc0329_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&gc0329_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("GC0329 CMOS Image Sensor driver");
+MODULE_LICENSE("GPL v2");

From feb50ec443bae18d3bdb4105eac1392ce032f275 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 30 Aug 2018 16:39:20 +0800
Subject: [PATCH 1796/1852] ARM: rockchip_defconfig: enable gc2145 gc0329 and
 cif

Change-Id: I71f95ea09ff043067c5e6b85597e38cfc3102401
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index c2e531300fc5f..4576e8568bc8e 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -416,6 +416,10 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=y
 CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ROCKCHIP_CIF=y
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_GC2145=y
+CONFIG_VIDEO_GC0329=y
 CONFIG_CAMSYS_DRV=y
 CONFIG_FLASHLIGHT=y
 CONFIG_LEDS_RT8547=y

From 18d688a1a00ee6815d95e65199c97e8d46f6822c Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 30 Aug 2018 16:40:59 +0800
Subject: [PATCH 1797/1852] arm: dts: rk3126-bnd-d708: config gc0329 gc2145 and
 cif

Change-Id: Ib3bad1186527d79ee7831ec5f41fe2f10316e1cf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 arch/arm/boot/dts/rk3126-bnd-d708.dtsi | 75 ++++++++++++++++++++++++--
 1 file changed, 70 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/rk3126-bnd-d708.dtsi b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi
index 4817fcfbd0088..11eb72f07e94d 100644
--- a/arch/arm/boot/dts/rk3126-bnd-d708.dtsi
+++ b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi
@@ -11,7 +11,6 @@
 #include <dt-bindings/sensor-dev.h>
 #include "rk3126.dtsi"
 #include "rk312x-android.dtsi"
-#include "rk3126-m708-cif-sensor.dtsi"
 
 / {
 	adc-keys {
@@ -155,12 +154,24 @@
 	status = "okay";
 };
 
-&cif {
+&cif_new {
 	status = "okay";
-};
 
-&cif_sensor {
-	status = "okay";
+	ports {
+		port@0 {
+			cif_in_fcam: endpoint@0 {
+				remote-endpoint =  <&gc0329_out>;
+				vsync-active = <1>;
+				hsync-active = <1>;
+			};
+
+			cif_in_bcam: endpoint@1 {
+				remote-endpoint = <&gc2145_out>;
+				vsync-active = <0>;
+				hsync-active = <1>;
+			};
+		};
+	};
 };
 
 &cpu0 {
@@ -249,6 +260,50 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
+	gc0329@31 {
+		compatible = "galaxycore,gc0329";
+		reg = <0x31>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fcam_pd>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc28_cif>;
+		dovdd-supply = <&vcc18_cif>;
+		dvdd-supply = <&vcc18_cif>;
+
+		pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc0329_out: endpoint {
+				remote-endpoint = <&cif_in_fcam>;
+			};
+		};
+	};
+
+	gc2145@3c {
+		compatible = "galaxycore,gc2145";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bcam_pd>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc28_cif>;
+		dovdd-supply = <&vcc18_cif>;
+		dvdd-supply = <&vcc18_cif>;
+
+		pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc2145_out: endpoint {
+				remote-endpoint = <&cif_in_bcam>;
+			};
+		};
+	};
+
 	ts@40 {
 		compatible = "gslX680-d708";
 		reg = <0x40>;
@@ -467,6 +522,16 @@
 };
 
 &pinctrl {
+	camera {
+		fcam_pd: fcam-pd {
+			rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bcam_pd: bcam-pd {
+			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	lcdc {
 		lcdc_lcdc: lcdc-lcdc {
 			rockchip,pins =

From 8842c3f464a3d0e7d0b062c08851ad3af1229a3d Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Fri, 7 Sep 2018 14:55:04 +0800
Subject: [PATCH 1798/1852] media: rockchip/cif: fix cif restart not work

if stop cif timeout, stopping flag still true,
restart cif can't work.

Change-Id: If4c0805aa5d1231b1dab6046a826fe41d9796872
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/cif/capture.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c
index d3619ad8cc5fd..c3ebec506f025 100644
--- a/drivers/media/platform/rockchip/cif/capture.c
+++ b/drivers/media/platform/rockchip/cif/capture.c
@@ -362,8 +362,10 @@ static void rkcif_stop_streaming(struct vb2_queue *queue)
 	ret = wait_event_timeout(stream->wq_stopped,
 				 stream->state != RKCIF_STATE_STREAMING,
 				 msecs_to_jiffies(1000));
-	if (!ret)
+	if (!ret) {
 		rkcif_stream_stop(stream);
+		stream->stopping = false;
+	}
 	pm_runtime_put(dev->dev);
 
 	/* stop the sub device*/

From f1e5496dcf99c5960a32ad8f60ba8172cdc7b5b6 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Fri, 7 Sep 2018 15:19:04 +0800
Subject: [PATCH 1799/1852] media: i2c: gc2145/gc0312 pwdn inactive during out
 of work

when multiple camera using same dvp data, pwdn shuld
be off during out of work.

Change-Id: I9a12c3e9f5d7b82922b0b5a797288da7ac486448
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/gc0312.c | 77 +++++++++++++++++++++++-------------
 drivers/media/i2c/gc2145.c | 81 ++++++++++++++++++++++++--------------
 2 files changed, 101 insertions(+), 57 deletions(-)

diff --git a/drivers/media/i2c/gc0312.c b/drivers/media/i2c/gc0312.c
index 0aa9ff402e92a..652603293c9c8 100644
--- a/drivers/media/i2c/gc0312.c
+++ b/drivers/media/i2c/gc0312.c
@@ -534,7 +534,7 @@ static int gc0312_read(struct i2c_client *client, u8 reg, u8 *val)
 	}
 
 	dev_err(&client->dev,
-		"gc0312 read reg(0x%x val:0x%x) failed !\n", reg, *val);
+		"gc0312 read reg:0x%x failed !\n", reg);
 
 	return ret;
 }
@@ -668,7 +668,7 @@ static void __gc0312_try_frame_size(struct v4l2_mbus_framefmt *mf,
 	unsigned int min_err = UINT_MAX;
 
 	while (i--) {
-		int err = abs(fsize->width - mf->width)
+		unsigned int err = abs(fsize->width - mf->width)
 				+ abs(fsize->height - mf->height);
 		if (err < min_err && fsize->regs[0].addr) {
 			min_err = err;
@@ -755,9 +755,18 @@ static int gc0312_s_stream(struct v4l2_subdev *sd, int on)
 		/* Stop Streaming Sequence */
 		gc0312_set_streaming(gc0312, 0x00);
 		gc0312->streaming = on;
+		if (!IS_ERR(gc0312->pwdn_gpio)) {
+			gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
+			usleep_range(2000, 5000);
+		}
 		goto unlock;
 	}
 
+	if (!IS_ERR(gc0312->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
+
 	ret = gc0312_write_array(client, gc0312->frame_size->regs);
 	if (ret)
 		goto unlock;
@@ -857,9 +866,9 @@ static const struct v4l2_subdev_internal_ops gc0312_subdev_internal_ops = {
 };
 #endif
 
-static int gc0312_detect(struct v4l2_subdev *sd)
+static int gc0312_detect(struct gc0312 *gc0312)
 {
-	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_client *client = gc0312->client;
 	u8 pid, ver;
 	int ret;
 
@@ -881,6 +890,8 @@ static int gc0312_detect(struct v4l2_subdev *sd)
 				id, ret);
 		} else {
 			dev_info(&client->dev, "Found GC%04X sensor\n", id);
+			if (!IS_ERR(gc0312->pwdn_gpio))
+				gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
 		}
 	}
 
@@ -892,36 +903,50 @@ static int __gc0312_power_on(struct gc0312 *gc0312)
 	int ret;
 	struct device *dev = &gc0312->client->dev;
 
-	ret = clk_set_rate(gc0312->xvclk, 24000000);
-	if (ret < 0)
-		dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+	if (!IS_ERR(gc0312->xvclk)) {
+		ret = clk_set_rate(gc0312->xvclk, 24000000);
+		if (ret < 0)
+			dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+	}
 
-	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
-	usleep_range(2000, 5000);
+	if (!IS_ERR(gc0312->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
+		usleep_range(2000, 5000);
+	}
 
-	ret = regulator_bulk_enable(GC0312_NUM_SUPPLIES, gc0312->supplies);
-	if (ret < 0)
-		dev_info(dev, "Failed to enable regulators\n");
+	if (!IS_ERR(gc0312->supplies)) {
+		ret = regulator_bulk_enable(GC0312_NUM_SUPPLIES,
+			gc0312->supplies);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable regulators\n");
 
-	usleep_range(20000, 50000);
+		usleep_range(2000, 5000);
+	}
 
-	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
-	usleep_range(2000, 5000);
+	if (!IS_ERR(gc0312->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
 
-	ret = clk_prepare_enable(gc0312->xvclk);
-	if (ret < 0)
-		dev_info(dev, "Failed to enable xvclk\n");
+	if (!IS_ERR(gc0312->xvclk)) {
+		ret = clk_prepare_enable(gc0312->xvclk);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable xvclk\n");
+	}
 
-	usleep_range(70000, 100000);
+	usleep_range(7000, 10000);
 
 	return 0;
 }
 
 static void __gc0312_power_off(struct gc0312 *gc0312)
 {
-	clk_disable_unprepare(gc0312->xvclk);
-	regulator_bulk_disable(GC0312_NUM_SUPPLIES, gc0312->supplies);
-	gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
+	if (!IS_ERR(gc0312->xvclk))
+		clk_disable_unprepare(gc0312->xvclk);
+	if (!IS_ERR(gc0312->supplies))
+		regulator_bulk_disable(GC0312_NUM_SUPPLIES, gc0312->supplies);
+	if (!IS_ERR(gc0312->pwdn_gpio))
+		gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
 }
 
 static int gc0312_configure_regulators(struct gc0312 *gc0312)
@@ -942,10 +967,8 @@ static int gc0312_parse_of(struct gc0312 *gc0312)
 	int ret;
 
 	gc0312->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
-	if (IS_ERR(gc0312->pwdn_gpio)) {
-		dev_info(dev, "Failed to get pwdn-gpios\n");
-		return 0;
-	}
+	if (IS_ERR(gc0312->pwdn_gpio))
+		dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
 
 	ret = gc0312_configure_regulators(gc0312);
 	if (ret)
@@ -1023,7 +1046,7 @@ static int gc0312_probe(struct i2c_client *client,
 	gc0312_get_default_format(&gc0312->format);
 	gc0312->frame_size = &gc0312_framesizes[0];
 
-	ret = gc0312_detect(sd);
+	ret = gc0312_detect(gc0312);
 	if (ret < 0)
 		goto error;
 
diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c
index 0964bd0c586c1..612eaf603a9e6 100644
--- a/drivers/media/i2c/gc2145.c
+++ b/drivers/media/i2c/gc2145.c
@@ -1091,7 +1091,7 @@ static int gc2145_read(struct i2c_client *client, u8 reg, u8 *val)
 	}
 
 	dev_err(&client->dev,
-		"gc2145 read reg(0x%x val:0x%x) failed !\n", reg, *val);
+		"gc2145 read reg:0x%x failed !\n", reg);
 
 	return ret;
 }
@@ -1222,11 +1222,11 @@ static void __gc2145_try_frame_size_fps(struct v4l2_mbus_framefmt *mf,
 {
 	const struct gc2145_framesize *fsize = &gc2145_framesizes[0];
 	const struct gc2145_framesize *match = NULL;
-	int i = ARRAY_SIZE(gc2145_framesizes);
+	unsigned int i = ARRAY_SIZE(gc2145_framesizes);
 	unsigned int min_err = UINT_MAX;
 
 	while (i--) {
-		int err = abs(fsize->width - mf->width)
+		unsigned int err = abs(fsize->width - mf->width)
 				+ abs(fsize->height - mf->height);
 		if (err < min_err && fsize->regs[0].addr) {
 			min_err = err;
@@ -1325,8 +1325,16 @@ static int gc2145_s_stream(struct v4l2_subdev *sd, int on)
 		/* Stop Streaming Sequence */
 		gc2145_set_streaming(gc2145, 0x00);
 		gc2145->streaming = on;
+		if (!IS_ERR(gc2145->pwdn_gpio)) {
+			gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
+			usleep_range(2000, 5000);
+		}
 		goto unlock;
 	}
+	if (!IS_ERR(gc2145->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
 
 	ret = gc2145_write_array(client, gc2145_init_regs);
 	if (ret)
@@ -1479,9 +1487,9 @@ static const struct v4l2_subdev_internal_ops gc2145_subdev_internal_ops = {
 };
 #endif
 
-static int gc2145_detect(struct v4l2_subdev *sd)
+static int gc2145_detect(struct gc2145 *gc2145)
 {
-	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_client *client = gc2145->client;
 	u8 pid, ver;
 	int ret;
 
@@ -1503,6 +1511,8 @@ static int gc2145_detect(struct v4l2_subdev *sd)
 				id, ret);
 		} else {
 			dev_info(&client->dev, "Found GC%04X sensor\n", id);
+			if (!IS_ERR(gc2145->pwdn_gpio))
+				gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
 		}
 	}
 
@@ -1514,36 +1524,49 @@ static int __gc2145_power_on(struct gc2145 *gc2145)
 	int ret;
 	struct device *dev = &gc2145->client->dev;
 
-	ret = clk_set_rate(gc2145->xvclk, 24000000);
-	if (ret < 0)
-		dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
-
-	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
-	usleep_range(2000, 5000);
+	if (!IS_ERR(gc2145->xvclk)) {
+		ret = clk_set_rate(gc2145->xvclk, 24000000);
+		if (ret < 0)
+			dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
+	}
 
-	ret = regulator_bulk_enable(GC2145_NUM_SUPPLIES, gc2145->supplies);
-	if (ret < 0)
-		dev_info(dev, "Failed to enable regulators\n");
+	if (!IS_ERR(gc2145->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
+		usleep_range(2000, 5000);
+	}
 
-	usleep_range(20000, 50000);
+	if (!IS_ERR(gc2145->supplies)) {
+		ret = regulator_bulk_enable(GC2145_NUM_SUPPLIES,
+			gc2145->supplies);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable regulators\n");
 
-	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0);
-	usleep_range(2000, 5000);
+		usleep_range(20000, 50000);
+	}
 
-	ret = clk_prepare_enable(gc2145->xvclk);
-	if (ret < 0)
-		dev_info(dev, "Failed to enable xvclk\n");
+	if (!IS_ERR(gc2145->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
 
-	usleep_range(70000, 100000);
+	if (!IS_ERR(gc2145->xvclk)) {
+		ret = clk_prepare_enable(gc2145->xvclk);
+		if (ret < 0)
+			dev_info(dev, "Failed to enable xvclk\n");
+	}
+	usleep_range(7000, 10000);
 
 	return 0;
 }
 
 static void __gc2145_power_off(struct gc2145 *gc2145)
 {
-	clk_disable_unprepare(gc2145->xvclk);
-	regulator_bulk_disable(GC2145_NUM_SUPPLIES, gc2145->supplies);
-	gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
+	if (!IS_ERR(gc2145->xvclk))
+		clk_disable_unprepare(gc2145->xvclk);
+	if (!IS_ERR(gc2145->supplies))
+		regulator_bulk_disable(GC2145_NUM_SUPPLIES, gc2145->supplies);
+	if (!IS_ERR(gc2145->pwdn_gpio))
+		gpiod_set_value_cansleep(gc2145->pwdn_gpio, 1);
 }
 
 static int gc2145_configure_regulators(struct gc2145 *gc2145)
@@ -1564,10 +1587,8 @@ static int gc2145_parse_of(struct gc2145 *gc2145)
 	int ret;
 
 	gc2145->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
-	if (IS_ERR(gc2145->pwdn_gpio)) {
-		dev_info(dev, "Failed to get pwdn-gpios\n");
-		return 0;
-	}
+	if (IS_ERR(gc2145->pwdn_gpio))
+		dev_info(dev, "Failed to get pwdn-gpios, maybe no use\n");
 
 	ret = gc2145_configure_regulators(gc2145);
 	if (ret)
@@ -1646,9 +1667,9 @@ static int gc2145_probe(struct i2c_client *client,
 	gc2145->frame_size = &gc2145_framesizes[0];
 	gc2145->format.width = gc2145_framesizes[0].width;
 	gc2145->format.height = gc2145_framesizes[0].height;
-	gc2145->fps = 0;
+	gc2145->fps = gc2145_framesizes[0].fps;
 
-	ret = gc2145_detect(sd);
+	ret = gc2145_detect(gc2145);
 	if (ret < 0)
 		goto error;
 

From 2d4ff3f2e03dcb5b38fa664b2ec33460ef8bc501 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Fri, 7 Sep 2018 09:52:10 +0800
Subject: [PATCH 1800/1852] usb: storage: add Genesys Logic 05e3:0749 to
 unusual_devs.h

When test more than three Genesys Logic usb3 storages
(VID : PID = 0x05e3 : 0x0749) on rockchip platforms with
usb3 host port (e.g. rk3328/rk3399) at the same time,

test commands like this:
for dev in `ls /dev/sd?1 | sed -e 's,1$,,'`; do
	echo dd if=$dev of=/dev/null
	dd if=$dev of=/dev/null &
	sleep 1
done

The test fail with the following error log:
xhci-hcd xhci-hcd.9.auto: xHCI host not responding to stop endpoint command.
xhci-hcd xhci-hcd.9.auto: Assuming host is dying, halting host.
xhci-hcd xhci-hcd.9.auto: Host not halted after 16000 microseconds.
xhci-hcd xhci-hcd.9.auto: Non-responsive xHCI host is not halting.
xhci-hcd xhci-hcd.9.auto: Completing active URBs anyway.
xhci-hcd xhci-hcd.9.auto: HC died; cleaning up

This patch sets the max_sectors to 128 (64K) to workaround
this issue, and it doesn't affect the transmission rate.

Change-Id: Idd9cc81659d27c12b142f6c4375558c2262e800d
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/storage/scsiglue.c     | 4 ++++
 drivers/usb/storage/unusual_devs.h | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/usb/storage/scsiglue.c b/drivers/usb/storage/scsiglue.c
index dba51362d2e26..1159bb81e63d8 100644
--- a/drivers/usb/storage/scsiglue.c
+++ b/drivers/usb/storage/scsiglue.c
@@ -122,6 +122,10 @@ static int slave_configure(struct scsi_device *sdev)
 	if (us->fflags & (US_FL_MAX_SECTORS_64 | US_FL_MAX_SECTORS_MIN)) {
 		unsigned int max_sectors = 64;
 
+		if (le16_to_cpu(us->pusb_dev->descriptor.idVendor) == 0x05e3 &&
+		    le16_to_cpu(us->pusb_dev->descriptor.idProduct) == 0x0749)
+			max_sectors = 128;
+
 		if (us->fflags & US_FL_MAX_SECTORS_MIN)
 			max_sectors = PAGE_CACHE_SIZE >> 9;
 		if (queue_max_hw_sectors(sdev->request_queue) > max_sectors)
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 1a34d2a89de66..f5aa5ca66da22 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -873,6 +873,12 @@ UNUSUAL_DEV(  0x05e3, 0x0723, 0x9451, 0x9451,
 		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
 		US_FL_SANE_SENSE ),
 
+UNUSUAL_DEV(  0x05e3, 0x0749, 0x0000, 0xffff,
+		"Genesys Logic",
+		"USB Storage",
+		USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+		US_FL_GO_SLOW | US_FL_MAX_SECTORS_64 | US_FL_IGNORE_RESIDUE ),
+
 /* Reported by Hanno Boeck <hanno@gmx.de>
  * Taken from the Lycoris Kernel */
 UNUSUAL_DEV(  0x0636, 0x0003, 0x0000, 0x9999,

From 55a203a61f2522ac6571979f18a59310f26113e9 Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Tue, 11 Sep 2018 15:34:33 +0800
Subject: [PATCH 1801/1852] net: wireless: rockchip_wlan: add config
 WIFI_GENERATE_RANDOM_MAC_ADDR

Change-Id: Ic0ceb1a839e691d5c2c25c96c34e9a234bc3654e
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/Kconfig | 6 ++++++
 net/rfkill/rfkill-wlan.c                   | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/Kconfig b/drivers/net/wireless/rockchip_wlan/Kconfig
index bc1b20354dde8..6bfc72b9fde02 100644
--- a/drivers/net/wireless/rockchip_wlan/Kconfig
+++ b/drivers/net/wireless/rockchip_wlan/Kconfig
@@ -22,6 +22,12 @@ config WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP
 	---help---
 	  Wifi driver will be load (use late_initcall) when kernel bootup
 
+config WIFI_GENERATE_RANDOM_MAC_ADDR
+	bool "Wifi generate random mac address and save to vendor storage for cob chip"
+	default n
+	help
+	  Wifi generate random mac address and save to vendor storage for cob chip
+
 source "drivers/net/wireless/rockchip_wlan/rkwifi/Kconfig"
 source "drivers/net/wireless/rockchip_wlan/cywdhd/Kconfig"
 
diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c
index 7c1e3da3383a3..fcb220017dda7 100644
--- a/net/rfkill/rfkill-wlan.c
+++ b/net/rfkill/rfkill-wlan.c
@@ -488,7 +488,7 @@ static int get_wifi_addr_vendor(unsigned char *addr)
 	if (ret != 6 || is_zero_ether_addr(addr)) {
 		LOG("%s: rk_vendor_read wifi mac address failed (%d)\n",
 		    __func__, ret);
-#ifdef RANDOM_ADDRESS_SAVE
+#ifdef CONFIG_WIFI_GENERATE_RANDOM_MAC_ADDR
 		random_ether_addr(addr);
 		LOG("%s: generate random wifi mac address: "
 		    "%02x:%02x:%02x:%02x:%02x:%02x\n",

From 7f72886f908de5e2bc53a4f8dcc6140ef833d8c9 Mon Sep 17 00:00:00 2001
From: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date: Wed, 29 Aug 2018 11:53:08 +0800
Subject: [PATCH 1802/1852] ARM64: rockchip_defconfig: enable gc2145 gc0312 and
 rockchip_isp1

Change-Id: I057376ea93281e3dc84f65f9507f2b94a49b3c7e
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 63f0e2718b0c8..25765399c7966 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -473,6 +473,10 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=y
 CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ROCKCHIP_ISP1=y
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_GC0312=y
+CONFIG_VIDEO_GC2145=y
 CONFIG_CAMSYS_DRV=y
 CONFIG_FLASHLIGHT=y
 CONFIG_LEDS_RT8547=y

From 363599cb54201bf391030783093d3a55a3ec08b6 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Fri, 7 Sep 2018 15:58:15 +0800
Subject: [PATCH 1803/1852] media: i2c: add gc2035 sensor

Change-Id: I228045130c9050e0e0b39001690763ab851e0539
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/Kconfig  |    9 +
 drivers/media/i2c/Makefile |    1 +
 drivers/media/i2c/gc2035.c | 1483 ++++++++++++++++++++++++++++++++++++
 3 files changed, 1493 insertions(+)
 create mode 100644 drivers/media/i2c/gc2035.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index e618ea6c23fab..351b6ed162793 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -749,6 +749,15 @@ config VIDEO_GC0329
 	  To compile this driver as a module, choose M here: the
 	  module will be called gc0329.
 
+config VIDEO_GC2035
+	tristate "GalaxyCore GC2035 sensor support"
+	depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+	help
+	  Support for the GalaxyCore GC2035 sensor.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gc2035.
+
 comment "Flash devices"
 
 config VIDEO_ADP1653
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index f74b75717a6d7..bb56f89e91e55 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -91,3 +91,4 @@ obj-$(CONFIG_VIDEO_GC2155)	+= gc2155.o
 obj-$(CONFIG_VIDEO_GC0312)	+= gc0312.o
 obj-$(CONFIG_VIDEO_GC2145)	+= gc2145.o
 obj-$(CONFIG_VIDEO_GC0329)	+= gc0329.o
+obj-$(CONFIG_VIDEO_GC2035)	+= gc2035.o
diff --git a/drivers/media/i2c/gc2035.c b/drivers/media/i2c/gc2035.c
new file mode 100644
index 0000000000000..ebd343f45fff3
--- /dev/null
+++ b/drivers/media/i2c/gc2035.c
@@ -0,0 +1,1483 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * gc2035 sensor driver
+ *
+ * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/media.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/videodev2.h>
+
+#include <media/media-entity.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+#define DRIVER_NAME "gc2035"
+#define GC2035_PIXEL_RATE		(70 * 1000 * 1000)
+
+/*
+ * GC2035 register definitions
+ */
+
+#define REG_SC_CHIP_ID_H		0xf0
+#define REG_SC_CHIP_ID_L		0xf1
+#define GC2035_ID_H			0x20
+#define GC2035_ID_L			0x35
+#define REG_NULL			0xFFFF	/* Array end token */
+
+struct sensor_register {
+	u16 addr;
+	u8 value;
+};
+
+struct gc2035_framesize {
+	u16 width;
+	u16 height;
+	u16 fps;
+	const struct sensor_register *regs;
+};
+
+struct gc2035_pll_ctrl {
+	u8 ctrl1;
+	u8 ctrl2;
+	u8 ctrl3;
+};
+
+struct gc2035_pixfmt {
+	u32 code;
+	/* Output format Register Value (REG_FORMAT_CTRL00) */
+	struct sensor_register *format_ctrl_regs;
+};
+
+struct pll_ctrl_reg {
+	unsigned int div;
+	unsigned char reg;
+};
+
+static const char * const gc2035_supply_names[] = {
+	"dovdd",	/* Digital I/O power */
+	"avdd",		/* Analog power */
+	"dvdd",		/* Digital core power */
+};
+
+#define GC2035_NUM_SUPPLIES ARRAY_SIZE(gc2035_supply_names)
+
+struct gc2035 {
+	struct v4l2_subdev sd;
+	struct media_pad pad;
+	struct v4l2_mbus_framefmt format;
+	unsigned int fps;
+	unsigned int xvclk_frequency;
+	struct clk *xvclk;
+	struct gpio_desc *pwdn_gpio;
+	struct regulator_bulk_data supplies[GC2035_NUM_SUPPLIES];
+	struct mutex lock; /* Protects streaming, format, interval */
+	struct i2c_client *client;
+	struct v4l2_ctrl_handler ctrls;
+	struct v4l2_ctrl *link_frequency;
+	const struct gc2035_framesize *frame_size;
+	int streaming;
+};
+
+static const struct sensor_register gc2035_init_regs[] = {
+	{0xfe, 0x80},
+	{0xfe, 0x80},
+	{0xfe, 0x80},
+	{0xfc, 0x06},
+	{0xf2, 0x00},
+	{0xf3, 0x00},
+	{0xf4, 0x00},
+	{0xf5, 0x00},
+	{0xf9, 0xfe},
+	{0xfa, 0x00},
+	{0xf6, 0x00},
+	{0xf7, 0x15},
+
+	{0xf8, 0x85},
+	{0xfe, 0x00},
+	{0x82, 0x00},
+	{0xb3, 0x60},
+	{0xb4, 0x40},
+	{0xb5, 0x60},
+
+	{0x03, 0x02},
+	{0x04, 0x80},
+	/* measure window */
+	{0xfe, 0x00},
+	{0xec, 0x06},
+	{0xed, 0x06},
+	{0xee, 0x62},
+	{0xef, 0x92},
+	/*  analog */
+	{0x0a, 0x00},
+	{0x0c, 0x00},
+	{0x0d, 0x04},
+	{0x0e, 0xc0},
+	{0x0f, 0x06},
+	{0x10, 0x58},
+	{0x17, 0x14},
+
+	{0x18, 0x0e},
+	{0x19, 0x0c},
+
+	{0x18, 0x0a},
+	{0x19, 0x0a},
+
+	{0x1a, 0x01},
+	{0x1b, 0x8b},
+	{0x1e, 0x88},
+	{0x1f, 0x08},
+	{0x20, 0x05},
+	{0x21, 0x0f},
+	{0x22, 0xf0},
+	{0x23, 0xc3},
+	{0x24, 0x17},
+	/*   AEC   */
+	{0xfe, 0x01},
+	{0x11, 0x20},
+	{0x1f, 0xc0},
+	{0x20, 0x60},
+	{0x47, 0x30},
+	{0x0b, 0x10},
+	{0x13, 0x75},
+	{0xfe, 0x00},
+
+	{0x05, 0x01},
+	{0x06, 0x11},
+	{0x07, 0x00},
+	{0x08, 0x50},
+	{0xfe, 0x01},
+	{0x27, 0x00},
+	{0x28, 0xa0},
+	{0x29, 0x05},
+	{0x2a, 0x00},
+	{0x2b, 0x05},
+	{0x2c, 0x00},
+	{0x2d, 0x06},
+	{0x2e, 0xe0},
+	{0x2f, 0x0a},
+	{0x30, 0x00},
+	{0x3e, 0x40},
+	{0xfe, 0x00},
+	{0xfe, 0x00},
+	{0xb6, 0x03},
+	{0xfe, 0x00},
+	/*   BLK   */
+	{0x3f, 0x00},
+	{0x40, 0x77},
+	{0x42, 0x7f},
+	{0x43, 0x30},
+	{0x5c, 0x08},
+	{0x5e, 0x20},
+	{0x5f, 0x20},
+	{0x60, 0x20},
+	{0x61, 0x20},
+	{0x62, 0x20},
+	{0x63, 0x20},
+	{0x64, 0x20},
+	{0x65, 0x20},
+	/*  block  */
+	{0x80, 0xff},
+	{0x81, 0x26},
+	{0x87, 0x90},
+	{0x84, 0x00},
+	{0x86, 0x07},
+	{0x8b, 0xbc},
+	{0xb0, 0x80},
+	{0xc0, 0x40},
+	/*   lsc   */
+	{0xfe, 0x01},
+	{0xc2, 0x38},
+	{0xc3, 0x25},
+	{0xc4, 0x21},
+	{0xc8, 0x19},
+	{0xc9, 0x12},
+	{0xca, 0x0e},
+	{0xbc, 0x43},
+	{0xbd, 0x18},
+	{0xbe, 0x1b},
+	{0xb6, 0x40},
+	{0xb7, 0x2e},
+	{0xb8, 0x26},
+	{0xc5, 0x05},
+	{0xc6, 0x03},
+	{0xc7, 0x04},
+	{0xcb, 0x00},
+	{0xcc, 0x00},
+	{0xcd, 0x00},
+	{0xbf, 0x14},
+	{0xc0, 0x22},
+	{0xc1, 0x1b},
+	{0xb9, 0x00},
+	{0xba, 0x05},
+	{0xbb, 0x05},
+	{0xaa, 0x35},
+	{0xab, 0x33},
+	{0xac, 0x33},
+	{0xad, 0x25},
+	{0xae, 0x22},
+	{0xaf, 0x27},
+	{0xb0, 0x1d},
+	{0xb1, 0x20},
+	{0xb2, 0x22},
+	{0xb3, 0x14},
+	{0xb4, 0x15},
+	{0xb5, 0x16},
+	{0xd0, 0x00},
+	{0xd2, 0x07},
+	{0xd3, 0x08},
+	{0xd8, 0x00},
+	{0xda, 0x13},
+	{0xdb, 0x17},
+	{0xdc, 0x00},
+	{0xde, 0x0a},
+	{0xdf, 0x08},
+	{0xd4, 0x00},
+	{0xd6, 0x00},
+	{0xd7, 0x0c},
+	{0xa4, 0x00},
+	{0xa5, 0x00},
+	{0xa6, 0x00},
+	{0xa7, 0x00},
+	{0xa8, 0x00},
+	{0xa9, 0x00},
+	{0xa1, 0x80},
+	{0xa2, 0x80},
+	/*   cc    */
+	{0xfe, 0x02},
+	{0xc0, 0x01},
+	{0xc1, 0x40},
+	{0xc2, 0xfc},
+	{0xc3, 0x05},
+	{0xc4, 0xec},
+	{0xc5, 0x42},
+	{0xc6, 0xf8},
+	{0xc7, 0x40},
+	{0xc8, 0xf8},
+	{0xc9, 0x06},
+	{0xca, 0xfd},
+	{0xcb, 0x3e},
+	{0xcc, 0xf3},
+	{0xcd, 0x36},
+	{0xce, 0xf6},
+	{0xcf, 0x04},
+	{0xe3, 0x0c},
+	{0xe4, 0x44},
+	{0xe5, 0xe5},
+	{0xfe, 0x00},
+
+	{0xfe, 0x01},
+	{0x4f, 0x00},
+	{0x4d, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x10},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x20},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x30},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x40},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x50},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x60},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x70},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x80},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0x90},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0xa0},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0xb0},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0xc0},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4d, 0xd0},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4e, 0x00},
+	{0x4f, 0x01},
+	{0xfe, 0x01},
+	{0x4f, 0x00},
+	{0x4d, 0x30},
+	{0x4e, 0x00},
+	{0x4e, 0x80},
+	{0x4e, 0x80},
+	{0x4e, 0x02},
+	{0x4e, 0x02},
+	{0x4d, 0x40},
+	{0x4e, 0x00},
+	{0x4e, 0x80},
+	{0x4e, 0x80},
+	{0x4e, 0x02},
+	{0x4e, 0x02},
+	{0x4e, 0x02},
+	{0x4d, 0x53},
+	{0x4e, 0x08},
+	{0x4e, 0x04},
+	{0x4d, 0x62},
+	{0x4e, 0x10},
+	{0x4d, 0x72},
+	{0x4e, 0x20},
+	{0x4f, 0x01},
+	/*   awb   */
+	{0xfe, 0x01},
+	{0x50, 0x88},
+	{0x52, 0x40},
+	{0x54, 0x60},
+	{0x56, 0x06},
+	{0x57, 0x20},
+	{0x58, 0x01},
+	{0x5b, 0x02},
+	{0x61, 0xaa},
+	{0x62, 0xaa},
+	{0x71, 0x00},
+	{0x74, 0x10},
+	{0x77, 0x08},
+	{0x78, 0xfd},
+	{0x86, 0x30},
+	{0x87, 0x00},
+	{0x88, 0x04},
+	{0x8a, 0xc0},
+	{0x89, 0x75},
+	{0x84, 0x08},
+	{0x8b, 0x00},
+	{0x8d, 0x70},
+	{0x8e, 0x70},
+	{0x8f, 0xf4},
+	{0xfe, 0x00},
+	{0x82, 0x02},
+	/*   asde  */
+	{0xfe, 0x01},
+	{0x21, 0xbf},
+	{0xfe, 0x02},
+	{0xa4, 0x00},
+	{0xa5, 0x40},
+	{0xa2, 0xa0},
+	{0xa6, 0x80},
+	{0xa7, 0x80},
+	{0xab, 0x31},
+	{0xa9, 0x6f},
+	{0xb0, 0x99},
+	{0xb1, 0x34},
+	{0xb3, 0x80},
+	{0xde, 0xb6},
+	{0x38, 0x0f},
+	{0x39, 0x60},
+	{0xfe, 0x00},
+	{0x81, 0x26},
+	{0xfe, 0x02},
+	{0x83, 0x00},
+	{0x84, 0x45},
+	/*   YCP   */
+	{0xd1, 0x38},
+	{0xd2, 0x38},
+	{0xd3,	0x40},
+	{0xd4, 0x80},
+	{0xd5, 0x00},
+	{0xdc, 0x30},
+	{0xdd, 0xb8},
+	{0xfe, 0x00},
+	/*   dndd  */
+	{0xfe, 0x02},
+	{0x88, 0x15},
+	{0x8c, 0xf6},
+	{0x89, 0x03},
+	/*    EE   */
+	{0xfe, 0x02},
+	{0x90, 0x6c},
+	{0x97, 0x45},
+	/* RGB Gamma */
+	{0xfe, 0x02},
+	{0x15, 0x0a},
+	{0x16, 0x12},
+	{0x17, 0x19},
+	{0x18, 0x1f},
+	{0x19, 0x2c},
+	{0x1a, 0x38},
+	{0x1b, 0x42},
+	{0x1c, 0x4e},
+	{0x1d, 0x63},
+	{0x1e, 0x76},
+	{0x1f, 0x87},
+	{0x20, 0x96},
+	{0x21, 0xa2},
+	{0x22, 0xb8},
+	{0x23, 0xca},
+	{0x24, 0xd8},
+	{0x25, 0xe3},
+	{0x26, 0xf0},
+	{0x27, 0xf8},
+	{0x28, 0xfd},
+	{0x29, 0xff},
+	/* y gamma */
+	{0xfe, 0x02},
+	{0x2b, 0x00},
+	{0x2c, 0x04},
+	{0x2d, 0x09},
+	{0x2e, 0x18},
+	{0x2f, 0x27},
+	{0x30, 0x37},
+	{0x31, 0x49},
+	{0x32, 0x5c},
+	{0x33, 0x7e},
+	{0x34, 0xa0},
+	{0x35, 0xc0},
+	{0x36, 0xe0},
+	{0x37, 0xff},
+	{0xfe, 0x00},
+	{0x90, 0x01},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	{0xfe, 0x03},
+	{0x42, 0x40},
+	{0x43, 0x06},
+	{0x41, 0x02},
+	{0x40, 0x40},
+	{0x17, 0x00},
+	{0xfe, 0x00},
+	/*   DVP   */
+	{0xfe, 0x00},
+	{0xb6, 0x03},
+	{0xf7, 0x15},
+	{0xc8, 0x00},
+	{0x99, 0x22},
+	{0x9a, 0x06},
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	{0x90, 0x01},
+	{0x94, 0x02},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{0xfe, 0x00},
+	{0x82, 0xfe},
+	{REG_NULL, 0x00},
+};
+
+static const struct sensor_register gc2035_svga_regs[] = {
+	{0xfe, 0x00},
+	{0xb6, 0x03},
+	{0xf7, 0x15},
+	{0xc8, 0x00},
+	{0x99, 0x22},
+	{0x9a, 0x06},
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	{0x90, 0x01},
+	{0x94, 0x02},
+	{0x95, 0x02},
+	{0x96, 0x58},
+	{0x97, 0x03},
+	{0x98, 0x20},
+	{REG_NULL, 0x00},
+};
+
+static const struct sensor_register gc2035_full_regs[] = {
+	{0xfe, 0x00},
+	{0xc8, 0x00},
+	{0xf7, 0x17},
+	{0x99, 0x11},
+	{0x9a, 0x06},
+	{0x9b, 0x00},
+	{0x9c, 0x00},
+	{0x9d, 0x00},
+	{0x9e, 0x00},
+	{0x9f, 0x00},
+	{0xa0, 0x00},
+	{0xa1, 0x00},
+	{0xa2, 0x00},
+	{0x90, 0x01},
+	{0x95, 0x04},
+	{0x96, 0xb0},
+	{0x97, 0x06},
+	{0x98, 0x40},
+	{REG_NULL, 0x00},
+};
+
+static const struct gc2035_framesize gc2035_framesizes[] = {
+	{
+		.width		= 800,
+		.height		= 600,
+		.fps		= 12,
+		.regs		= gc2035_svga_regs,
+	},
+	{
+		.width		= 1600,
+		.height		= 1200,
+		.fps		= 6,
+		.regs		= gc2035_full_regs,
+	}
+};
+
+static const struct gc2035_pixfmt gc2035_formats[] = {
+	{
+		.code = MEDIA_BUS_FMT_UYVY8_2X8,
+	}
+};
+
+static inline struct gc2035 *to_gc2035(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc2035, sd);
+}
+
+/* sensor register write */
+static int gc2035_write(struct i2c_client *client, u8 reg, u8 val)
+{
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+	buf[1] = val;
+
+	msg.addr = client->addr;
+	msg.flags = client->flags;
+	msg.buf = buf;
+	msg.len = sizeof(buf);
+
+	ret = i2c_transfer(client->adapter, &msg, 1);
+	if (ret >= 0)
+		return 0;
+
+	dev_err(&client->dev,
+		"gc2035 write reg(0x%x val:0x%x) failed !\n", reg, val);
+
+	return ret;
+}
+
+/* sensor register read */
+static int gc2035_read(struct i2c_client *client, u8 reg, u8 *val)
+{
+	struct i2c_msg msg[2];
+	u8 buf[1];
+	int ret;
+
+	buf[0] = reg & 0xFF;
+
+	msg[0].addr = client->addr;
+	msg[0].flags = client->flags;
+	msg[0].buf = buf;
+	msg[0].len = sizeof(buf);
+
+	msg[1].addr = client->addr;
+	msg[1].flags = client->flags | I2C_M_RD;
+	msg[1].buf = buf;
+	msg[1].len = 1;
+
+	ret = i2c_transfer(client->adapter, msg, 2);
+	if (ret >= 0) {
+		*val = buf[0];
+		return 0;
+	}
+
+	dev_err(&client->dev,
+		"gc2035 read reg:0x%x failed!\n", reg);
+
+	return ret;
+}
+
+static int gc2035_write_array(struct i2c_client *client,
+			      const struct sensor_register *regs)
+{
+	int i, ret = 0;
+
+	i = 0;
+	while (regs[i].addr != REG_NULL) {
+		ret = gc2035_write(client, regs[i].addr, regs[i].value);
+		if (ret) {
+			dev_err(&client->dev, "%s failed !\n", __func__);
+			break;
+		}
+
+		i++;
+	}
+
+	return ret;
+}
+
+static void gc2035_get_default_format(struct v4l2_mbus_framefmt *format)
+{
+	format->width = gc2035_framesizes[0].width;
+	format->height = gc2035_framesizes[0].height;
+	format->colorspace = V4L2_COLORSPACE_SRGB;
+	format->code = gc2035_formats[0].code;
+	format->field = V4L2_FIELD_NONE;
+}
+
+static void gc2035_set_streaming(struct gc2035 *gc2035, int on)
+{
+	struct i2c_client *client = gc2035->client;
+	int ret;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	ret = gc2035_write(client, 0xfe, 0x00);
+	if (!on) {
+		ret |= gc2035_write(client, 0xf2, 0x00);
+		ret |= gc2035_write(client, 0xf3, 0x00);
+		ret |= gc2035_write(client, 0xf5, 0x00);
+	} else {
+		ret |= gc2035_write(client, 0xf2, 0x70);
+		ret |= gc2035_write(client, 0xf3, 0xff);
+		ret |= gc2035_write(client, 0xf4, 0x00);
+		ret |= gc2035_write(client, 0xf5, 0x30);
+	}
+	if (ret)
+		dev_err(&client->dev, "gc2035 soft standby failed\n");
+}
+
+/*
+ * V4L2 subdev video and pad level operations
+ */
+
+static int gc2035_enum_mbus_code(struct v4l2_subdev *sd,
+				 struct v4l2_subdev_pad_config *cfg,
+				 struct v4l2_subdev_mbus_code_enum *code)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (code->index >= ARRAY_SIZE(gc2035_formats))
+		return -EINVAL;
+
+	code->code = gc2035_formats[code->index].code;
+
+	return 0;
+}
+
+static int gc2035_enum_frame_sizes(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_pad_config *cfg,
+				   struct v4l2_subdev_frame_size_enum *fse)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i = ARRAY_SIZE(gc2035_formats);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	if (fse->index >= ARRAY_SIZE(gc2035_framesizes))
+		return -EINVAL;
+
+	while (--i)
+		if (fse->code == gc2035_formats[i].code)
+			break;
+
+	fse->code = gc2035_formats[i].code;
+
+	fse->min_width  = gc2035_framesizes[fse->index].width;
+	fse->max_width  = fse->min_width;
+	fse->max_height = gc2035_framesizes[fse->index].height;
+	fse->min_height = fse->max_height;
+
+	return 0;
+}
+
+static int gc2035_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2035 *gc2035 = to_gc2035(sd);
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		struct v4l2_mbus_framefmt *mf;
+
+		mf = v4l2_subdev_get_try_format(sd, cfg, 0);
+		mutex_lock(&gc2035->lock);
+		fmt->format = *mf;
+		mutex_unlock(&gc2035->lock);
+		return 0;
+#else
+	return -ENOTTY;
+#endif
+	}
+
+	mutex_lock(&gc2035->lock);
+	fmt->format = gc2035->format;
+	mutex_unlock(&gc2035->lock);
+
+	dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
+		gc2035->format.code, gc2035->format.width,
+		gc2035->format.height);
+
+	return 0;
+}
+
+static void __gc2035_try_frame_size_fps(struct v4l2_mbus_framefmt *mf,
+				    const struct gc2035_framesize **size,
+				    unsigned int fps)
+{
+	const struct gc2035_framesize *fsize = &gc2035_framesizes[0];
+	const struct gc2035_framesize *match = NULL;
+	unsigned int i = ARRAY_SIZE(gc2035_framesizes);
+	unsigned int min_err = UINT_MAX;
+
+	while (i--) {
+		unsigned int err = abs(fsize->width - mf->width)
+				+ abs(fsize->height - mf->height);
+		if (err < min_err && fsize->regs[0].addr) {
+			min_err = err;
+			match = fsize;
+		}
+		fsize++;
+	}
+
+	if (!match) {
+		match = &gc2035_framesizes[0];
+	} else {
+		fsize = &gc2035_framesizes[0];
+		for (i = 0; i < ARRAY_SIZE(gc2035_framesizes); i++) {
+			if (fsize->width == match->width &&
+				fsize->height == match->height &&
+				fps >= fsize->fps)
+				match = fsize;
+
+			fsize++;
+		}
+	}
+
+	mf->width  = match->width;
+	mf->height = match->height;
+
+	if (size)
+		*size = match;
+}
+
+static int gc2035_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_pad_config *cfg,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int index = ARRAY_SIZE(gc2035_formats);
+	struct v4l2_mbus_framefmt *mf = &fmt->format;
+	const struct gc2035_framesize *size = NULL;
+	struct gc2035 *gc2035 = to_gc2035(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s enter\n", __func__);
+
+	__gc2035_try_frame_size_fps(mf, &size, gc2035->fps);
+
+	while (--index >= 0)
+		if (gc2035_formats[index].code == mf->code)
+			break;
+
+	if (index < 0)
+		return -EINVAL;
+
+	mf->colorspace = V4L2_COLORSPACE_SRGB;
+	mf->code = gc2035_formats[index].code;
+	mf->field = V4L2_FIELD_NONE;
+
+	mutex_lock(&gc2035->lock);
+
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+		*mf = fmt->format;
+#else
+		return -ENOTTY;
+#endif
+	} else {
+		if (gc2035->streaming) {
+			mutex_unlock(&gc2035->lock);
+			return -EBUSY;
+		}
+
+		gc2035->frame_size = size;
+		gc2035->format = fmt->format;
+	}
+
+	mutex_unlock(&gc2035->lock);
+	return ret;
+}
+
+static int gc2035_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2035 *gc2035 = to_gc2035(sd);
+	int ret = 0;
+
+	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
+
+	mutex_lock(&gc2035->lock);
+
+	on = !!on;
+
+	if (gc2035->streaming == on)
+		goto unlock;
+
+	if (!on) {
+		/* Stop Streaming Sequence */
+		gc2035_set_streaming(gc2035, on);
+		gc2035->streaming = on;
+		if (!IS_ERR(gc2035->pwdn_gpio)) {
+			gpiod_set_value_cansleep(gc2035->pwdn_gpio, 1);
+			usleep_range(2000, 5000);
+		}
+		goto unlock;
+	}
+
+	if (!IS_ERR(gc2035->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2035->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
+
+	ret = gc2035_write_array(client, gc2035_init_regs);
+	if (ret)
+		goto unlock;
+
+	ret = gc2035_write_array(client, gc2035->frame_size->regs);
+	if (ret)
+		goto unlock;
+
+	gc2035_set_streaming(gc2035, on);
+	gc2035->streaming = on;
+
+unlock:
+	mutex_unlock(&gc2035->lock);
+	return ret;
+}
+
+static int gc2035_set_test_pattern(struct gc2035 *gc2035, int value)
+{
+	return 0;
+}
+
+static int gc2035_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct gc2035 *gc2035 =
+			container_of(ctrl->handler, struct gc2035, ctrls);
+
+	switch (ctrl->id) {
+	case V4L2_CID_TEST_PATTERN:
+		return gc2035_set_test_pattern(gc2035, ctrl->val);
+	}
+
+	return 0;
+}
+
+static const struct v4l2_ctrl_ops gc2035_ctrl_ops = {
+	.s_ctrl = gc2035_s_ctrl,
+};
+
+static const char * const gc2035_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bars",
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev internal operations
+ */
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int gc2035_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct v4l2_mbus_framefmt *format =
+				v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	gc2035_get_default_format(format);
+
+	return 0;
+}
+#endif
+
+static int gc2035_g_mbus_config(struct v4l2_subdev *sd,
+				struct v4l2_mbus_config *config)
+{
+	config->type = V4L2_MBUS_PARALLEL;
+	config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_VSYNC_ACTIVE_HIGH |
+			V4L2_MBUS_PCLK_SAMPLE_RISING;
+
+	return 0;
+}
+
+static int gc2035_g_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct gc2035 *gc2035 = to_gc2035(sd);
+
+	mutex_lock(&gc2035->lock);
+	fi->interval.numerator = 10000;
+	fi->interval.denominator = gc2035->fps * 10000;
+	mutex_unlock(&gc2035->lock);
+
+	return 0;
+}
+
+static int gc2035_s_frame_interval(struct v4l2_subdev *sd,
+				   struct v4l2_subdev_frame_interval *fi)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc2035 *gc2035 = to_gc2035(sd);
+	const struct gc2035_framesize *size = NULL;
+	struct v4l2_mbus_framefmt mf;
+	unsigned int fps;
+	int ret = 0;
+
+	dev_dbg(&client->dev, "Setting %d/%d frame interval\n",
+		fi->interval.numerator, fi->interval.denominator);
+
+	mutex_lock(&gc2035->lock);
+	fps = DIV_ROUND_CLOSEST(fi->interval.denominator,
+		fi->interval.numerator);
+	mf = gc2035->format;
+	__gc2035_try_frame_size_fps(&mf, &size, fps);
+	if (gc2035->frame_size != size) {
+		ret = gc2035_write_array(client, size->regs);
+		if (ret)
+			goto unlock;
+		gc2035->frame_size = size;
+		gc2035->fps = fps;
+	}
+unlock:
+	mutex_unlock(&gc2035->lock);
+
+	return ret;
+}
+
+static const struct v4l2_subdev_core_ops gc2035_subdev_core_ops = {
+	.log_status = v4l2_ctrl_subdev_log_status,
+	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
+	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
+};
+
+static const struct v4l2_subdev_video_ops gc2035_subdev_video_ops = {
+	.s_stream = gc2035_s_stream,
+	.g_mbus_config = gc2035_g_mbus_config,
+	.g_frame_interval = gc2035_g_frame_interval,
+	.s_frame_interval = gc2035_s_frame_interval,
+};
+
+static const struct v4l2_subdev_pad_ops gc2035_subdev_pad_ops = {
+	.enum_mbus_code = gc2035_enum_mbus_code,
+	.enum_frame_size = gc2035_enum_frame_sizes,
+	.get_fmt = gc2035_get_fmt,
+	.set_fmt = gc2035_set_fmt,
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_ops gc2035_subdev_ops = {
+	.core  = &gc2035_subdev_core_ops,
+	.video = &gc2035_subdev_video_ops,
+	.pad   = &gc2035_subdev_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops gc2035_subdev_internal_ops = {
+	.open = gc2035_open,
+};
+#endif
+
+static int gc2035_detect(struct gc2035 *gc2035)
+{
+	struct i2c_client *client = gc2035->client;
+	u8 pidh = 0, pidl = 0;
+	int ret;
+
+	dev_dbg(&client->dev, "%s:\n", __func__);
+
+	/* Check sensor revision */
+	ret = gc2035_read(client, REG_SC_CHIP_ID_H, &pidh);
+	ret |= gc2035_read(client, REG_SC_CHIP_ID_L, &pidl);
+	if (!ret) {
+		if (pidh == GC2035_ID_H &&
+			pidl == GC2035_ID_L) {
+			dev_info(&client->dev,
+				"Found GC%02X%02X sensor\n",
+				pidh, pidl);
+			if (!IS_ERR(gc2035->pwdn_gpio))
+				gpiod_set_value_cansleep(gc2035->pwdn_gpio, 1);
+		} else {
+			ret = -1;
+			dev_err(&client->dev,
+				"Sensor detection failed (%02x%02x, %d)\n",
+				pidh, pidl, ret);
+		}
+	}
+
+	return ret;
+}
+
+static int __gc2035_power_on(struct gc2035 *gc2035)
+{
+	int ret;
+	struct device *dev = &gc2035->client->dev;
+
+	if (!IS_ERR(gc2035->xvclk)) {
+		ret = clk_set_rate(gc2035->xvclk, 24000000);
+		if (ret < 0)
+			dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+	}
+
+	if (!IS_ERR(gc2035->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2035->pwdn_gpio, 1);
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc2035->supplies)) {
+		ret = regulator_bulk_enable(GC2035_NUM_SUPPLIES,
+			gc2035->supplies);
+		if (ret < 0)
+			dev_err(dev, "Failed to enable regulators\n");
+
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc2035->pwdn_gpio)) {
+		gpiod_set_value_cansleep(gc2035->pwdn_gpio, 0);
+		usleep_range(2000, 5000);
+	}
+
+	if (!IS_ERR(gc2035->xvclk)) {
+		ret = clk_prepare_enable(gc2035->xvclk);
+		if (ret < 0)
+			dev_err(dev, "Failed to enable xvclk\n");
+	}
+
+	usleep_range(7000, 10000);
+
+	return 0;
+}
+
+static void __gc2035_power_off(struct gc2035 *gc2035)
+{
+	if (!IS_ERR(gc2035->xvclk))
+		clk_disable_unprepare(gc2035->xvclk);
+	if (!IS_ERR(gc2035->supplies))
+		regulator_bulk_disable(GC2035_NUM_SUPPLIES, gc2035->supplies);
+	if (!IS_ERR(gc2035->pwdn_gpio))
+		gpiod_set_value_cansleep(gc2035->pwdn_gpio, 1);
+}
+
+static int gc2035_configure_regulators(struct gc2035 *gc2035)
+{
+	unsigned int i;
+
+	for (i = 0; i < GC2035_NUM_SUPPLIES; i++)
+		gc2035->supplies[i].supply = gc2035_supply_names[i];
+
+	return devm_regulator_bulk_get(&gc2035->client->dev,
+				       GC2035_NUM_SUPPLIES,
+				       gc2035->supplies);
+}
+
+static int gc2035_parse_of(struct gc2035 *gc2035)
+{
+	struct device *dev = &gc2035->client->dev;
+	int ret;
+
+	gc2035->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+	if (IS_ERR(gc2035->pwdn_gpio))
+		dev_warn(dev, "Failed to get pwdn-gpios, maybe no used\n");
+
+	ret = gc2035_configure_regulators(gc2035);
+	if (ret)
+		dev_warn(dev, "Failed to get power regulators\n");
+
+	return __gc2035_power_on(gc2035);
+}
+
+static int gc2035_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct v4l2_subdev *sd;
+	struct gc2035 *gc2035;
+	int ret;
+
+	gc2035 = devm_kzalloc(&client->dev, sizeof(*gc2035), GFP_KERNEL);
+	if (!gc2035)
+		return -ENOMEM;
+
+	gc2035->client = client;
+	gc2035->xvclk = devm_clk_get(&client->dev, "xvclk");
+	if (IS_ERR(gc2035->xvclk)) {
+		dev_err(&client->dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+
+	gc2035_parse_of(gc2035);
+
+	gc2035->xvclk_frequency = clk_get_rate(gc2035->xvclk);
+	if (gc2035->xvclk_frequency < 6000000 ||
+	    gc2035->xvclk_frequency > 27000000)
+		return -EINVAL;
+
+	v4l2_ctrl_handler_init(&gc2035->ctrls, 2);
+	gc2035->link_frequency =
+			v4l2_ctrl_new_std(&gc2035->ctrls, &gc2035_ctrl_ops,
+					  V4L2_CID_PIXEL_RATE, 0,
+					  GC2035_PIXEL_RATE, 1,
+					  GC2035_PIXEL_RATE);
+
+	v4l2_ctrl_new_std_menu_items(&gc2035->ctrls, &gc2035_ctrl_ops,
+				     V4L2_CID_TEST_PATTERN,
+				     ARRAY_SIZE(gc2035_test_pattern_menu) - 1,
+				     0, 0, gc2035_test_pattern_menu);
+	gc2035->sd.ctrl_handler = &gc2035->ctrls;
+
+	if (gc2035->ctrls.error) {
+		dev_err(&client->dev, "%s: control initialization error %d\n",
+			__func__, gc2035->ctrls.error);
+		return  gc2035->ctrls.error;
+	}
+
+	sd = &gc2035->sd;
+	client->flags |= I2C_CLIENT_SCCB;
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	v4l2_i2c_subdev_init(sd, client, &gc2035_subdev_ops);
+
+	sd->internal_ops = &gc2035_subdev_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+		     V4L2_SUBDEV_FL_HAS_EVENTS;
+#endif
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	gc2035->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+	ret = media_entity_init(&sd->entity, 1, &gc2035->pad, 0);
+	if (ret < 0) {
+		v4l2_ctrl_handler_free(&gc2035->ctrls);
+		return ret;
+	}
+#endif
+
+	mutex_init(&gc2035->lock);
+
+	gc2035_get_default_format(&gc2035->format);
+	gc2035->frame_size = &gc2035_framesizes[0];
+	gc2035->format.width = gc2035_framesizes[0].width;
+	gc2035->format.height = gc2035_framesizes[0].height;
+	gc2035->fps = gc2035_framesizes[0].fps;
+
+	ret = gc2035_detect(gc2035);
+	if (ret < 0)
+		goto error;
+
+	ret = v4l2_async_register_subdev(&gc2035->sd);
+	if (ret)
+		goto error;
+
+	dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
+
+	return 0;
+
+error:
+	v4l2_ctrl_handler_free(&gc2035->ctrls);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc2035->lock);
+	__gc2035_power_off(gc2035);
+	return ret;
+}
+
+static int gc2035_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct gc2035 *gc2035 = to_gc2035(sd);
+
+	v4l2_ctrl_handler_free(&gc2035->ctrls);
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	mutex_destroy(&gc2035->lock);
+
+	__gc2035_power_off(gc2035);
+
+	return 0;
+}
+
+static const struct i2c_device_id gc2035_id[] = {
+	{ "gc2035", 0 },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(i2c, gc2035_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id gc2035_of_match[] = {
+	{ .compatible = "galaxycore,gc2035", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, gc2035_of_match);
+#endif
+
+static struct i2c_driver gc2035_i2c_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.of_match_table = of_match_ptr(gc2035_of_match),
+	},
+	.probe		= gc2035_probe,
+	.remove		= gc2035_remove,
+	.id_table	= gc2035_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&gc2035_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&gc2035_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("GC2035 CMOS Image Sensor driver");
+MODULE_LICENSE("GPL v2");

From debed4ffaa09a6dcb1987c2c662b107aabd4845d Mon Sep 17 00:00:00 2001
From: Weixin Zhou <zwx@rock-chips.com>
Date: Wed, 12 Sep 2018 14:24:58 +0800
Subject: [PATCH 1804/1852] arm64: dts: rockchip: rk3326-863-lp3-v10: modify
 audio card name for vts test

test cmd: run vts -m VtsKernelProcFileApi -t testProcAsoundCardsTest

test result:
shell_command: "cat /proc/asound/cards"
ERROR Failed to parse! Parsing error at token LexToken(COMMA,',',1,48) in line 1
I/ProcessHelper: [VtsKernelProcFileApi]
INFO [Test Case] testProcAsoundCardsTest FAIL

Change-Id: Ib70bf8bb0757a1773253931bb3e6f105eb518126
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
index 87e6b17de53c1..270acbad5e73e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
@@ -85,7 +85,7 @@
 	rk817-sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,format = "i2s";
-		simple-audio-card,name = "rockchip,rk817-codec";
+		simple-audio-card,name = "rockchip-rk817-codec";
 		simple-audio-card,mclk-fs = <256>;
 		simple-audio-card,widgets =
 			"Microphone", "Mic Jack",

From 00ae2cf32d720ed445d9cea9b6e57fed8e40d792 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 12 Sep 2018 20:55:41 +0800
Subject: [PATCH 1805/1852] net: wireless: rockchip_wlan: ssv6xxx: Fix gcc
 warning

drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c: In function 'ssv_cmd_dump':
drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c:387:3: error: argument 1 null where non-null expected [-Werror=nonnull]
   strcpy(ssv6xxx_result_buf, "ssv6xxx_result_buf = NULL!!\n");
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Change-Id: I883d9f17814c25c0d8f7611dc99944f6b072b002
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
index 033e7a09b40e4..4687afe70b76b 100644
--- a/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
+++ b/drivers/net/wireless/rockchip_wlan/ssv6xxx/ssvdevice/ssv_cmd.c
@@ -384,7 +384,7 @@ static int ssv_cmd_dump(int argc, char *argv[])
     int s;
  if(!ssv6xxx_result_buf)
  {
-  strcpy(ssv6xxx_result_buf, "ssv6xxx_result_buf = NULL!!\n");
+  printk("ssv6xxx_result_buf = NULL!!\n");
   return -1;
  }
     if (argc != 2)

From eca4441a22faef9dfe53bce47fa52d4db6153060 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Wed, 12 Sep 2018 19:24:33 +0800
Subject: [PATCH 1806/1852] media: i2c: gc0329: update to 30fps

Change-Id: Ib156183ebba412b0f3b0003dea4de7afdf8cfbd9
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/i2c/gc0329.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/media/i2c/gc0329.c b/drivers/media/i2c/gc0329.c
index a4a8ed737b81a..a89607e144391 100644
--- a/drivers/media/i2c/gc0329.c
+++ b/drivers/media/i2c/gc0329.c
@@ -330,24 +330,24 @@ static const struct sensor_register gc0329_vga_regs_14fps[] = {
 	{REG_NULL, 0x00},
 };
 
-static const struct sensor_register gc0329_vga_regs_28fps[] = {
-	/* flicker 28.5fps */
+static const struct sensor_register gc0329_vga_regs_30fps[] = {
+	/* flicker 30fps */
 	{0xfe, 0x00},
 	{0x05, 0x00},
-	{0x06, 0x6a},
+	{0x06, 0x56},
 	{0x07, 0x00},
-	{0x08, 0x20},
+	{0x08, 0x10},
 	{0xfe, 0x01},
 	{0x29, 0x00},
-	{0x2a, 0x96},
+	{0x2a, 0xa0},
 	{0x2b, 0x01},
-	{0x2c, 0xc2},
+	{0x2c, 0xe0},
 	{0x2d, 0x01},
-	{0x2e, 0xc2},
+	{0x2e, 0xe0},
 	{0x2f, 0x01},
-	{0x30, 0xc2},
+	{0x30, 0xe0},
 	{0x31, 0x01},
-	{0x32, 0xc2},
+	{0x32, 0xe0},
 	{0x33, 0x20},
 	{REG_NULL, 0x00},
 };
@@ -362,8 +362,8 @@ static const struct gc0329_framesize gc0329_framesizes[] = {
 	{
 		.width		= 640,
 		.height		= 480,
-		.fps		= 28,
-		.regs		= gc0329_vga_regs_28fps,
+		.fps		= 30,
+		.regs		= gc0329_vga_regs_30fps,
 	}
 };
 

From 81cf4b8b1b6da658b607bd71af83fc35d532d73e Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Thu, 13 Sep 2018 15:17:27 +0800
Subject: [PATCH 1807/1852] rk: gcc-wrapper.py ignore halphyrf_8188e_ce.c:2208
 and halphyrf_8723b_ce.c:2879

trigger by ARM_LPAE

Change-Id: I941ec62d2b9e1fe78af6807f63e2aa1d73cc0e41
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 scripts/gcc-wrapper.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/scripts/gcc-wrapper.py b/scripts/gcc-wrapper.py
index 3a4b766924c47..8b60b8370a5f6 100755
--- a/scripts/gcc-wrapper.py
+++ b/scripts/gcc-wrapper.py
@@ -54,6 +54,8 @@
     "bounds.c:15", # kernel/bounds.c:15:6: warning: no previous prototype for ‘foo’
     "cpufeature.h:157", # arch/arm64/include/asm/cpufeature.h:157:68: warning: signed and unsigned type in conditional expression
     "sched.h:1211", # include/linux/sched.h:1211:1: warning: type qualifiers ignored on function return type
+    "halphyrf_8188e_ce.c:2208", # drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/rtl8188e/halphyrf_8188e_ce.c:2208:1: warning: the frame size of 1056 bytes is larger than 1024 bytes
+    "halphyrf_8723b_ce.c:2879", # drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/rtl8723b/halphyrf_8723b_ce.c:2879:1: warning: the frame size of 1056 bytes is larger than 1024 bytes
  ])
 
 # Capture the name of the object file, can find it.

From bf35067344c5f009f241479ef9da39f188f6e73d Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Tue, 11 Sep 2018 16:21:55 +0800
Subject: [PATCH 1808/1852] rockchip: isp1: Modify v4l2_capability card as
 video device name.

Change-Id: I85e58fe3be5c4c266eb0132f6263a00f2ec9e091
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 drivers/media/platform/rockchip/isp1/capture.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index 6a6e9705e7d52..f191d41533014 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -1640,9 +1640,10 @@ static int rkisp1_querycap(struct file *file, void *priv,
 {
 	struct rkisp1_stream *stream = video_drvdata(file);
 	struct device *dev = stream->ispdev->dev;
+	struct video_device *vdev = video_devdata(file);
 
 	strlcpy(cap->driver, dev->driver->name, sizeof(cap->driver));
-	strlcpy(cap->card, dev->driver->name, sizeof(cap->card));
+	strlcpy(cap->card, vdev->name, sizeof(cap->card));
 	snprintf(cap->bus_info, sizeof(cap->bus_info),
 		 "platform:%s", dev_name(dev));
 

From 00694d8d302715b1c4692b3ab31835497d63516d Mon Sep 17 00:00:00 2001
From: Sun ChuanHu <aaron.sun@rock-chips.com>
Date: Fri, 14 Sep 2018 10:25:00 +0800
Subject: [PATCH 1809/1852] arm64: dts: rockchip: rk3308-evb-amic-v11: enable
 adc group and vad channel

Change-Id: I3259bd83a7cb5b9af530808c9e23d145dbca02e3
Signed-off-by: Sun ChuanHu <aaron.sun@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
index c36dc855a2566..c82a7f4d5ee8f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-amic-v11.dts
@@ -24,6 +24,7 @@
 
 &acodec {
 	rockchip,en-always-grps = <1 2 3>;
+	rockchip,adc-grps-route = <1 2 3 0>;
 };
 
 &acodec_sound {
@@ -47,6 +48,7 @@
 &vad {
 	status = "okay";
 	rockchip,audio-src = <&i2s_8ch_2>;
+	rockchip,det-channel = <0>;
 	rockchip,buffer-time-ms = <200>;
 	rockchip,mode = <1>;
 	#sound-dai-cells = <0>;

From 41935bc78538f045e863fe44f5a39294734a505b Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Tue, 11 Sep 2018 14:58:15 +0800
Subject: [PATCH 1810/1852] media: rockchip: isp1: MP/SP burst config with
 resolution

1.CIF_MI_CTRL_BURST_LEN same to isp specification define
2.memory base addresses are burst aligned with respect
to the configured burst length. configure different burst
length with different resolution.

Change-Id: I982cbef418cc55704049b2d113df923bee7cf9ef
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../media/platform/rockchip/isp1/capture.c    | 62 ++++++++++++++++++-
 .../media/platform/rockchip/isp1/capture.h    |  1 +
 drivers/media/platform/rockchip/isp1/regs.c   |  8 +--
 drivers/media/platform/rockchip/isp1/regs.h   | 14 ++---
 4 files changed, 70 insertions(+), 15 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index f191d41533014..74a7c9155bf4e 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -743,6 +743,56 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
 
 /***************************** stream operations*******************************/
 
+/*
+ * memory base addresses should be with respect
+ * to the burst alignment restriction for AXI.
+ */
+static u32 calc_burst_len(struct rkisp1_stream *stream)
+{
+	struct rkisp1_device *dev = stream->ispdev;
+	u32 y_size = stream->out_fmt.plane_fmt[0].bytesperline *
+		stream->out_fmt.height;
+	u32 cb_size = stream->out_fmt.plane_fmt[1].sizeimage;
+	u32 cr_size = stream->out_fmt.plane_fmt[2].sizeimage;
+	u32 cb_offs, cr_offs;
+	u32 bus, burst;
+	int i;
+
+	/* MI128bit and MI64bit */
+	bus = (dev->isp_ver == ISP_V12) ? 16 : 8;
+
+	/* y/c base addr: burstN * bus alignment */
+	cb_offs = y_size;
+	cr_offs = cr_size ? (cb_size + cb_offs) : 0;
+
+	if (!(cb_offs % (bus * 16)) &&
+		!(cr_offs % (bus * 16)))
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
+	else if (!(cb_offs % (bus * 8)) &&
+		!(cr_offs % (bus * 8)))
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_8 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_8;
+	else
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_4 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_4;
+
+	if (cb_offs % (bus * 4) ||
+		cr_offs % (bus * 4))
+		v4l2_warn(&dev->v4l2_dev,
+			"%dx%d fmt:0x%x not support, should be %d aligned\n",
+			stream->out_fmt.width,
+			stream->out_fmt.height,
+			stream->out_fmt.pixelformat,
+			(cr_offs == 0) ? bus * 4 : bus * 16);
+
+	stream->burst = burst;
+	for (i = 0; i < RKISP1_MAX_STREAM; i++)
+		if (burst > dev->stream[i].burst)
+			burst = dev->stream[i].burst;
+	return burst;
+}
+
 /*
  * configure memory interface for mainpath
  * This should only be called when stream-on
@@ -759,12 +809,11 @@ static int mp_config_mi(struct rkisp1_stream *stream)
 			 stream->out_fmt.height);
 	mi_set_cb_size(stream, stream->out_fmt.plane_fmt[1].sizeimage);
 	mi_set_cr_size(stream, stream->out_fmt.plane_fmt[2].sizeimage);
-
 	mi_frame_end_int_enable(stream);
 	if (stream->out_isp_fmt.uv_swap)
 		mp_set_uv_swap(base);
 
-	config_mi_ctrl(stream);
+	config_mi_ctrl(stream, calc_burst_len(stream));
 	mp_mi_ctrl_set_format(base, stream->out_isp_fmt.write_format);
 	mp_mi_ctrl_autoupdate_en(base);
 
@@ -805,7 +854,7 @@ static int sp_config_mi(struct rkisp1_stream *stream)
 	if (output_isp_fmt->uv_swap)
 		sp_set_uv_swap(base);
 
-	config_mi_ctrl(stream);
+	config_mi_ctrl(stream, calc_burst_len(stream));
 	sp_mi_ctrl_set_format(base, stream->out_isp_fmt.write_format |
 			      sp_in_fmt | output_isp_fmt->output_format);
 
@@ -983,6 +1032,9 @@ static void rkisp1_stream_stop(struct rkisp1_stream *stream)
 	}
 	disable_dcrop(stream, true);
 	disable_rsz(stream, true);
+	stream->burst =
+		CIF_MI_CTRL_BURST_LEN_LUM_16 |
+		CIF_MI_CTRL_BURST_LEN_CHROM_16;
 }
 
 /*
@@ -1471,6 +1523,10 @@ void rkisp1_stream_init(struct rkisp1_device *dev, u32 id)
 	stream->dcrop.top = 0;
 	stream->dcrop.width = RKISP1_DEFAULT_WIDTH;
 	stream->dcrop.height = RKISP1_DEFAULT_HEIGHT;
+
+	stream->burst =
+		CIF_MI_CTRL_BURST_LEN_LUM_16 |
+		CIF_MI_CTRL_BURST_LEN_CHROM_16;
 }
 
 static const struct v4l2_file_operations rkisp1_fops = {
diff --git a/drivers/media/platform/rockchip/isp1/capture.h b/drivers/media/platform/rockchip/isp1/capture.h
index 6fadc3e306153..8387e3f1173a4 100644
--- a/drivers/media/platform/rockchip/isp1/capture.h
+++ b/drivers/media/platform/rockchip/isp1/capture.h
@@ -177,6 +177,7 @@ struct rkisp1_stream {
 	bool streaming;
 	bool stopping;
 	wait_queue_head_t done;
+	unsigned int burst;
 	union {
 		struct rkisp1_stream_sp sp;
 		struct rkisp1_stream_mp mp;
diff --git a/drivers/media/platform/rockchip/isp1/regs.c b/drivers/media/platform/rockchip/isp1/regs.c
index 675c2d75c9b70..82f6cd92475e5 100644
--- a/drivers/media/platform/rockchip/isp1/regs.c
+++ b/drivers/media/platform/rockchip/isp1/regs.c
@@ -216,16 +216,14 @@ void disable_rsz(struct rkisp1_stream *stream, bool async)
 		update_rsz_shadow(stream, async);
 }
 
-void config_mi_ctrl(struct rkisp1_stream *stream)
+void config_mi_ctrl(struct rkisp1_stream *stream, u32 burst)
 {
 	void __iomem *base = stream->ispdev->base_addr;
 	void __iomem *addr = base + CIF_MI_CTRL;
 	u32 reg;
 
-	reg = readl(addr) & ~GENMASK(17, 16);
-	writel(reg | CIF_MI_CTRL_BURST_LEN_LUM_64, addr);
-	reg = readl(addr) & ~GENMASK(19, 18);
-	writel(reg | CIF_MI_CTRL_BURST_LEN_CHROM_64, addr);
+	reg = readl(addr) & ~GENMASK(19, 16);
+	writel(reg | burst, addr);
 	reg = readl(addr);
 	writel(reg | CIF_MI_CTRL_INIT_BASE_EN, addr);
 	reg = readl(addr);
diff --git a/drivers/media/platform/rockchip/isp1/regs.h b/drivers/media/platform/rockchip/isp1/regs.h
index 1b658c615f0f9..bacc967742e68 100644
--- a/drivers/media/platform/rockchip/isp1/regs.h
+++ b/drivers/media/platform/rockchip/isp1/regs.h
@@ -139,12 +139,12 @@
 #define CIF_MI_MP_AUTOUPDATE_ENABLE		BIT(13)
 #define CIF_MI_SP_AUTOUPDATE_ENABLE		BIT(14)
 #define CIF_MI_LAST_PIXEL_SIG_ENABLE		BIT(15)
-#define CIF_MI_CTRL_BURST_LEN_LUM_16		(0 << 16)
-#define CIF_MI_CTRL_BURST_LEN_LUM_32		(1 << 16)
-#define CIF_MI_CTRL_BURST_LEN_LUM_64		(2 << 16)
-#define CIF_MI_CTRL_BURST_LEN_CHROM_16		(0 << 18)
-#define CIF_MI_CTRL_BURST_LEN_CHROM_32		(1 << 18)
-#define CIF_MI_CTRL_BURST_LEN_CHROM_64		(2 << 18)
+#define CIF_MI_CTRL_BURST_LEN_LUM_4		(0 << 16)
+#define CIF_MI_CTRL_BURST_LEN_LUM_8		(1 << 16)
+#define CIF_MI_CTRL_BURST_LEN_LUM_16		(2 << 16)
+#define CIF_MI_CTRL_BURST_LEN_CHROM_4		(0 << 18)
+#define CIF_MI_CTRL_BURST_LEN_CHROM_8		(1 << 18)
+#define CIF_MI_CTRL_BURST_LEN_CHROM_16		(2 << 18)
 #define CIF_MI_CTRL_INIT_BASE_EN		BIT(20)
 #define CIF_MI_CTRL_INIT_OFFSET_EN		BIT(21)
 #define MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8	(0 << 22)
@@ -1448,7 +1448,7 @@ void config_rsz(struct rkisp1_stream *stream, struct v4l2_rect *in_y,
 		struct v4l2_rect *in_c, struct v4l2_rect *out_y,
 		struct v4l2_rect *out_c, bool async);
 
-void config_mi_ctrl(struct rkisp1_stream *stream);
+void config_mi_ctrl(struct rkisp1_stream *stream, u32 burst);
 
 void mp_clr_frame_end_int(void __iomem *base);
 void sp_clr_frame_end_int(void __iomem *base);

From 385d1501e604fc343b2fa7ce41b08ea2a45ea13f Mon Sep 17 00:00:00 2001
From: Shunqing Chen <csq@rock-chips.com>
Date: Mon, 3 Sep 2018 17:48:34 +0800
Subject: [PATCH 1811/1852] drm/rockchip: add RGB support for rk618

Change-Id: Ieddeeb842ee9db11b8c56cb4171bd630b6b63acb
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
---
 .../display/rockchip/rockchip,rk618.txt       |  72 +++++++++
 drivers/gpu/drm/rockchip/rk618/Makefile       |   1 +
 drivers/gpu/drm/rockchip/rk618/rk618_lvds.c   |  31 ----
 drivers/gpu/drm/rockchip/rk618/rk618_output.c |  94 ++++++++---
 drivers/gpu/drm/rockchip/rk618/rk618_output.h |  31 ++++
 drivers/gpu/drm/rockchip/rk618/rk618_rgb.c    | 153 ++++++++++++++++++
 6 files changed, 327 insertions(+), 55 deletions(-)
 create mode 100644 drivers/gpu/drm/rockchip/rk618/rk618_rgb.c

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt
index 112d5f57aa30a..e94ca4b90ff28 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt
@@ -114,3 +114,75 @@ Example:
 		};
 	};
 };
+
+RGB Encoder
+------------
+
+Required properties:
+- compatible: value should be one of the following:
+   "rockchip,rk618-rgb"
+- clocks: must include clock specifiers corresponding to entries in the
+	  clock-names property.
+	  See ../clocks/clock-bindings.txt for details.
+- clock-names: list of clock names sorted in the same order as the clocks
+	       property. Must contain "rgb", "dither", "vif", "scaler".
+
+Required nodes:
+
+The connections to the video ports are modeled using the OF graph
+bindings specified in Documentation/devicetree/bindings/graph.txt.
+
+Example:
+
+&rk618 {
+	status = "okay";
+
+	rgb {
+		compatible = "rockchip,rk618-rgb";
+		clocks = <&CRU RGB_CLK>, <&CRU DITHER_CLK>,
+			 <&CRU VIF0_CLK>, <&CRU SCALER_CLK>;
+		clock-names = "rgb", "dither", "vif", "scaler";
+		status = "okay";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				rgb_input_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_output_rgb>;
+				};
+
+				rgb_input_vif: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vif_output_rgb>;
+				};
+
+				rgb_input_hdmi: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&hdmi_output_rgb>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				rgb_lcdc1_out_tve: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&tve_in_rgb_lcdc1>;
+				};
+				rgb_out_tve: endpoint@1 {
+					status = "disabled";
+					reg = <1>;
+					remote-endpoint = <&tve_in_rgb>;
+				};
+			};
+		};
+	};
+};
\ No newline at end of file
diff --git a/drivers/gpu/drm/rockchip/rk618/Makefile b/drivers/gpu/drm/rockchip/rk618/Makefile
index 4175493288239..ad508944f29a2 100644
--- a/drivers/gpu/drm/rockchip/rk618/Makefile
+++ b/drivers/gpu/drm/rockchip/rk618/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618_output.o \
 				    rk618_vif.o \
 				    rk618_dither.o \
 				    rk618_lvds.o \
+				    rk618_rgb.o \
diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c b/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c
index 08e12c784cc34..df45e7ec50ec6 100644
--- a/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c
+++ b/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c
@@ -14,37 +14,6 @@
 
 #include "rk618_output.h"
 
-#define RK618_LVDS_CON			0x0084
-#define LVDS_CON_START_PHASE(x)		HIWORD_UPDATE(x, 14, 14)
-#define LVDS_DCLK_INV			HIWORD_UPDATE(1, 13, 13)
-#define LVDS_CON_CHADS_10PF		HIWORD_UPDATE(3, 12, 11)
-#define LVDS_CON_CHADS_5PF		HIWORD_UPDATE(2, 12, 11)
-#define LVDS_CON_CHADS_7PF		HIWORD_UPDATE(1, 12, 11)
-#define LVDS_CON_CHADS_3PF		HIWORD_UPDATE(0, 12, 11)
-#define LVDS_CON_CHA1TTL_ENABLE		HIWORD_UPDATE(1, 10, 10)
-#define LVDS_CON_CHA1TTL_DISABLE	HIWORD_UPDATE(0, 10, 10)
-#define LVDS_CON_CHA0TTL_ENABLE		HIWORD_UPDATE(1, 9, 9)
-#define LVDS_CON_CHA0TTL_DISABLE	HIWORD_UPDATE(0, 9, 9)
-#define LVDS_CON_CHA1_POWER_UP		HIWORD_UPDATE(1, 8, 8)
-#define LVDS_CON_CHA1_POWER_DOWN	HIWORD_UPDATE(0, 8, 8)
-#define LVDS_CON_CHA0_POWER_UP		HIWORD_UPDATE(1, 7, 7)
-#define LVDS_CON_CHA0_POWER_DOWN	HIWORD_UPDATE(0, 7, 7)
-#define LVDS_CON_CBG_POWER_UP		HIWORD_UPDATE(1, 6, 6)
-#define LVDS_CON_CBG_POWER_DOWN		HIWORD_UPDATE(0, 6, 6)
-#define LVDS_CON_PLL_POWER_DOWN		HIWORD_UPDATE(1, 5, 5)
-#define LVDS_CON_PLL_POWER_UP		HIWORD_UPDATE(0, 5, 5)
-#define LVDS_CON_START_SEL_EVEN_PIXEL	HIWORD_UPDATE(1, 4, 4)
-#define LVDS_CON_START_SEL_ODD_PIXEL	HIWORD_UPDATE(0, 4, 4)
-#define LVDS_CON_CHASEL_DOUBLE_CHANNEL	HIWORD_UPDATE(1, 3, 3)
-#define LVDS_CON_CHASEL_SINGLE_CHANNEL	HIWORD_UPDATE(0, 3, 3)
-#define LVDS_CON_MSBSEL_D7		HIWORD_UPDATE(1, 2, 2)
-#define LVDS_CON_MSBSEL_D0		HIWORD_UPDATE(0, 2, 2)
-#define LVDS_CON_SELECT(x)		HIWORD_UPDATE(x, 1, 0)
-#define LVDS_CON_SELECT_6BIT_MODE	HIWORD_UPDATE(3, 1, 0)
-#define LVDS_CON_SELECT_8BIT_MODE_3	HIWORD_UPDATE(2, 1, 0)
-#define LVDS_CON_SELECT_8BIT_MODE_2	HIWORD_UPDATE(1, 1, 0)
-#define LVDS_CON_SELECT_8BIT_MODE_1	HIWORD_UPDATE(0, 1, 0)
-
 #define IS_DOUBLE_CHANNEL(lvds)	((lvds)->channels == 2)
 
 enum {
diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_output.c b/drivers/gpu/drm/rockchip/rk618/rk618_output.c
index 503425b894f3a..37abf55aa5bc0 100644
--- a/drivers/gpu/drm/rockchip/rk618/rk618_output.c
+++ b/drivers/gpu/drm/rockchip/rk618/rk618_output.c
@@ -99,24 +99,28 @@ static void rk618_output_encoder_enable(struct drm_encoder *encoder)
 	if (output->funcs->pre_enable)
 		output->funcs->pre_enable(output);
 
-	drm_panel_prepare(output->panel);
+	if (output->panel)
+		drm_panel_prepare(output->panel);
 
 	if (output->funcs->enable)
 		output->funcs->enable(output);
 
-	drm_panel_enable(output->panel);
+	if (output->panel)
+		drm_panel_enable(output->panel);
 }
 
 static void rk618_output_encoder_disable(struct drm_encoder *encoder)
 {
 	struct rk618_output *output = encoder_to_output(encoder);
 
-	drm_panel_disable(output->panel);
+	if (output->panel)
+		drm_panel_disable(output->panel);
 
 	if (output->funcs->disable)
 		output->funcs->disable(output);
 
-	drm_panel_unprepare(output->panel);
+	if (output->panel)
+		drm_panel_unprepare(output->panel);
 
 	if (output->funcs->post_disable)
 		output->funcs->post_disable(output);
@@ -187,7 +191,8 @@ static void rk618_output_bridge_pre_enable(struct drm_bridge *bridge)
 	if (output->funcs->pre_enable)
 		output->funcs->pre_enable(output);
 
-	drm_panel_prepare(output->panel);
+	if (output->panel)
+		drm_panel_prepare(output->panel);
 }
 
 static void rk618_output_bridge_enable(struct drm_bridge *bridge)
@@ -197,14 +202,16 @@ static void rk618_output_bridge_enable(struct drm_bridge *bridge)
 	if (output->funcs->enable)
 		output->funcs->enable(output);
 
-	drm_panel_enable(output->panel);
+	if (output->panel)
+		drm_panel_enable(output->panel);
 }
 
 static void rk618_output_bridge_disable(struct drm_bridge *bridge)
 {
 	struct rk618_output *output = bridge_to_output(bridge);
 
-	drm_panel_disable(output->panel);
+	if (output->panel)
+		drm_panel_disable(output->panel);
 
 	if (output->funcs->disable)
 		output->funcs->disable(output);
@@ -214,7 +221,8 @@ static void rk618_output_bridge_post_disable(struct drm_bridge *bridge)
 {
 	struct rk618_output *output = bridge_to_output(bridge);
 
-	drm_panel_unprepare(output->panel);
+	if (output->panel)
+		drm_panel_unprepare(output->panel);
 
 	if (output->funcs->post_disable)
 		output->funcs->post_disable(output);
@@ -246,7 +254,7 @@ static const struct drm_bridge_funcs rk618_output_bridge_funcs = {
 int rk618_output_register(struct rk618_output *output)
 {
 	struct device *dev = output->dev;
-	struct device_node *endpoint, *remote;
+	struct device_node *endpoint, *remote = NULL, *port;
 	int ret;
 
 	output->dither_clk = devm_clk_get(dev, "dither");
@@ -270,14 +278,26 @@ int rk618_output_register(struct rk618_output *output)
 		return ret;
 	}
 
-	endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
-	if (!endpoint) {
-		dev_err(dev, "no valid endpoint\n");
-		return -ENODEV;
+	port = of_graph_get_port_by_id(dev->of_node, 1);
+	if (!port) {
+		dev_err(dev, "can't found port point.\n");
+		return -EINVAL;
+	}
+
+	for_each_child_of_node(port, endpoint) {
+		remote = of_graph_get_remote_port_parent(endpoint);
+		if (!remote) {
+			dev_err(dev, "can't found panel node, please init!\n");
+			return -EINVAL;
+		}
+		if (!of_device_is_available(remote)) {
+			of_node_put(remote);
+			remote = NULL;
+			continue;
+		}
+		break;
 	}
 
-	remote = of_graph_get_remote_port_parent(endpoint);
-	of_node_put(endpoint);
 	if (!remote) {
 		dev_err(dev, "no valid remote node\n");
 		return -ENODEV;
@@ -300,7 +320,12 @@ int rk618_output_bind(struct rk618_output *output, struct drm_device *drm,
 
 	output->panel = of_drm_find_panel(output->panel_node);
 	if (!output->panel)
+		output->ext_bridge = of_drm_find_bridge(output->panel_node);
+
+	if (!output->panel && !output->ext_bridge) {
+		dev_info(dev, "Waiting for panel or bridge driver\n");
 		return -EPROBE_DEFER;
+	}
 
 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm,
 							     dev->of_node);
@@ -308,15 +333,36 @@ int rk618_output_bind(struct rk618_output *output, struct drm_device *drm,
 			 encoder_type, NULL);
 	drm_encoder_helper_add(encoder, &rk618_output_encoder_helper_funcs);
 
-	connector->port = dev->of_node;
-	drm_connector_init(drm, connector, &rk618_output_connector_funcs,
-			   connector_type);
-	drm_connector_helper_add(connector,
-				 &rk618_output_connector_helper_funcs);
-
-	drm_mode_connector_attach_encoder(connector, encoder);
-
-	drm_panel_attach(output->panel, connector);
+	if (output->ext_bridge) {
+		output->ext_bridge->encoder = encoder;
+		ret = drm_bridge_attach(drm, output->ext_bridge);
+		if (ret) {
+			dev_err(dev, "failed to attach bridge\n");
+			return ret;
+		}
+		encoder->bridge = output->ext_bridge;
+	} else {
+		connector->port = dev->of_node;
+		ret = drm_connector_init(drm, connector,
+					 &rk618_output_connector_funcs,
+					 connector_type);
+		if (ret) {
+			dev_err(dev, "Failed to init connector with drm\n");
+			return ret;
+		}
+
+		drm_connector_helper_add(connector,
+					 &rk618_output_connector_helper_funcs);
+
+		drm_mode_connector_attach_encoder(connector,
+						  output->bridge.encoder);
+
+		ret = drm_panel_attach(output->panel, connector);
+		if (ret) {
+			dev_err(dev, "Failed to attach panel\n");
+			return ret;
+		}
+	}
 
 	bridge->funcs = &rk618_output_bridge_funcs;
 	bridge->of_node = dev->of_node;
diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_output.h b/drivers/gpu/drm/rockchip/rk618/rk618_output.h
index 0e2b0430ba908..e70b6d080bd6f 100644
--- a/drivers/gpu/drm/rockchip/rk618/rk618_output.h
+++ b/drivers/gpu/drm/rockchip/rk618/rk618_output.h
@@ -40,6 +40,36 @@
 #define UPDATE(x, h, l)		(((x) << (l)) & GENMASK((h), (l)))
 #define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK((h), (l)) << 16))
 
+#define RK618_LVDS_CON			0x0084
+#define LVDS_CON_START_PHASE(x)		HIWORD_UPDATE(x, 14, 14)
+#define LVDS_DCLK_INV			HIWORD_UPDATE(1, 13, 13)
+#define LVDS_CON_CHADS_10PF		HIWORD_UPDATE(3, 12, 11)
+#define LVDS_CON_CHADS_5PF		HIWORD_UPDATE(2, 12, 11)
+#define LVDS_CON_CHADS_7PF		HIWORD_UPDATE(1, 12, 11)
+#define LVDS_CON_CHADS_3PF		HIWORD_UPDATE(0, 12, 11)
+#define LVDS_CON_CHA1TTL_ENABLE		HIWORD_UPDATE(1, 10, 10)
+#define LVDS_CON_CHA1TTL_DISABLE	HIWORD_UPDATE(0, 10, 10)
+#define LVDS_CON_CHA0TTL_ENABLE		HIWORD_UPDATE(1, 9, 9)
+#define LVDS_CON_CHA0TTL_DISABLE	HIWORD_UPDATE(0, 9, 9)
+#define LVDS_CON_CHA1_POWER_UP		HIWORD_UPDATE(1, 8, 8)
+#define LVDS_CON_CHA1_POWER_DOWN	HIWORD_UPDATE(0, 8, 8)
+#define LVDS_CON_CHA0_POWER_UP		HIWORD_UPDATE(1, 7, 7)
+#define LVDS_CON_CHA0_POWER_DOWN	HIWORD_UPDATE(0, 7, 7)
+#define LVDS_CON_CBG_POWER_UP		HIWORD_UPDATE(1, 6, 6)
+#define LVDS_CON_CBG_POWER_DOWN		HIWORD_UPDATE(0, 6, 6)
+#define LVDS_CON_PLL_POWER_DOWN		HIWORD_UPDATE(1, 5, 5)
+#define LVDS_CON_PLL_POWER_UP		HIWORD_UPDATE(0, 5, 5)
+#define LVDS_CON_START_SEL_EVEN_PIXEL	HIWORD_UPDATE(1, 4, 4)
+#define LVDS_CON_START_SEL_ODD_PIXEL	HIWORD_UPDATE(0, 4, 4)
+#define LVDS_CON_CHASEL_DOUBLE_CHANNEL	HIWORD_UPDATE(1, 3, 3)
+#define LVDS_CON_CHASEL_SINGLE_CHANNEL	HIWORD_UPDATE(0, 3, 3)
+#define LVDS_CON_MSBSEL_D7		HIWORD_UPDATE(1, 2, 2)
+#define LVDS_CON_MSBSEL_D0		HIWORD_UPDATE(0, 2, 2)
+#define LVDS_CON_SELECT(x)		HIWORD_UPDATE(x, 1, 0)
+#define LVDS_CON_SELECT_6BIT_MODE	HIWORD_UPDATE(3, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_3	HIWORD_UPDATE(2, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_2	HIWORD_UPDATE(1, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_1	HIWORD_UPDATE(0, 1, 0)
 #define RK618_IO_CON0			0x0088
 #define VIF1_SYNC_MODE_ENABLE		HIWORD_UPDATE(1, 15, 15)
 #define VIF1_SYNC_MODE_DISABLE		HIWORD_UPDATE(0, 15, 15)
@@ -118,6 +148,7 @@ struct rk618_output {
 	struct drm_display_mode panel_mode;
 	struct drm_display_mode scale_mode;
 	u32 bus_format;
+	struct drm_bridge *ext_bridge;
 
 	struct device *dev;
 	struct device_node *panel_node;
diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_rgb.c b/drivers/gpu/drm/rockchip/rk618/rk618_rgb.c
new file mode 100644
index 0000000000000..7bbe2481255f5
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/rk618/rk618_rgb.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
+ */
+
+#include "rk618_output.h"
+
+struct rk618_rgb {
+	struct rk618_output base;
+	struct device *dev;
+	struct regmap *regmap;
+	struct clk *clock;
+};
+
+static inline struct rk618_rgb *to_rgb(struct rk618_output *output)
+{
+	return container_of(output, struct rk618_rgb, base);
+}
+
+static void rk618_rgb_enable(struct rk618_output *output)
+{
+	struct rk618_rgb *rgb = to_rgb(output);
+	u32 value;
+	struct device_node *endpoint;
+	int lcdc1_output_rgb = 0;
+
+	endpoint = of_graph_get_endpoint_by_regs(output->dev->of_node, 1, 0);
+	if (endpoint && of_device_is_available(endpoint))
+		lcdc1_output_rgb = 1;
+
+	clk_prepare_enable(rgb->clock);
+
+	if (lcdc1_output_rgb) {
+		value = LVDS_CON_CHA1TTL_DISABLE | LVDS_CON_CHA0TTL_DISABLE |
+			LVDS_CON_CHA1_POWER_DOWN | LVDS_CON_CHA0_POWER_DOWN |
+			LVDS_CON_CBG_POWER_DOWN | LVDS_CON_PLL_POWER_DOWN;
+		regmap_write(rgb->regmap, RK618_LVDS_CON, value);
+
+		regmap_write(rgb->regmap, RK618_IO_CON0,
+			     PORT1_OUTPUT_TTL_ENABLE);
+	} else {
+		value = LVDS_CON_CBG_POWER_DOWN | LVDS_CON_CHA1_POWER_DOWN |
+			LVDS_CON_CHA0_POWER_DOWN;
+		value |= LVDS_CON_CHA0TTL_ENABLE | LVDS_CON_CHA1TTL_ENABLE |
+			LVDS_CON_PLL_POWER_DOWN;
+		regmap_write(rgb->regmap, RK618_LVDS_CON, value);
+
+		regmap_write(rgb->regmap, RK618_IO_CON0, PORT2_OUTPUT_TTL);
+	}
+}
+
+static void rk618_rgb_disable(struct rk618_output *output)
+{
+	struct rk618_rgb *rgb = to_rgb(output);
+
+	regmap_write(rgb->regmap, RK618_LVDS_CON,
+		     LVDS_CON_CHA0_POWER_DOWN | LVDS_CON_CHA1_POWER_DOWN |
+		     LVDS_CON_CBG_POWER_DOWN | LVDS_CON_PLL_POWER_DOWN);
+
+	clk_disable_unprepare(rgb->clock);
+}
+
+static const struct rk618_output_funcs rk618_rgb_funcs = {
+	.enable = rk618_rgb_enable,
+	.disable = rk618_rgb_disable,
+};
+
+static int rk618_rgb_bind(struct device *dev, struct device *master,
+			  void *data)
+{
+	struct drm_device *drm = data;
+	struct rk618_rgb *rgb = dev_get_drvdata(dev);
+
+	return rk618_output_bind(&rgb->base, drm, DRM_MODE_ENCODER_LVDS,
+				 DRM_MODE_CONNECTOR_LVDS);
+}
+
+static void rk618_rgb_unbind(struct device *dev, struct device *master,
+			     void *data)
+{
+	struct rk618_rgb *rgb = dev_get_drvdata(dev);
+
+	rk618_output_unbind(&rgb->base);
+}
+
+static const struct component_ops rk618_rgb_component_ops = {
+	.bind = rk618_rgb_bind,
+	.unbind = rk618_rgb_unbind,
+};
+
+static const struct of_device_id rk618_rgb_of_match[] = {
+	{ .compatible = "rockchip,rk618-rgb", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, rk618_rgb_of_match);
+
+static int rk618_rgb_probe(struct platform_device *pdev)
+{
+	struct rk618 *rk618 = dev_get_drvdata(pdev->dev.parent);
+	struct device *dev = &pdev->dev;
+	struct rk618_rgb *rgb;
+	int ret;
+
+	if (!of_device_is_available(dev->of_node))
+		return -ENODEV;
+
+	rgb = devm_kzalloc(dev, sizeof(*rgb), GFP_KERNEL);
+	if (!rgb)
+		return -ENOMEM;
+
+	rgb->dev = dev;
+	rgb->regmap = rk618->regmap;
+	platform_set_drvdata(pdev, rgb);
+
+	rgb->clock = devm_clk_get(dev, "rgb");
+	if (IS_ERR(rgb->clock)) {
+		ret = PTR_ERR(rgb->clock);
+		dev_err(dev, "failed to get rgb clock: %d\n", ret);
+		return ret;
+	}
+
+	rgb->base.parent = rk618;
+	rgb->base.dev = dev;
+	rgb->base.funcs = &rk618_rgb_funcs;
+	ret = rk618_output_register(&rgb->base);
+	if (ret)
+		return ret;
+
+	return component_add(dev, &rk618_rgb_component_ops);
+}
+
+static int rk618_rgb_remove(struct platform_device *pdev)
+{
+	struct rk618_rgb *rgb = platform_get_drvdata(pdev);
+
+	component_del(rgb->dev, &rk618_rgb_component_ops);
+
+	return 0;
+}
+
+static struct platform_driver rk618_rgb_driver = {
+	.driver = {
+		.name = "rk618-rgb",
+		.of_match_table = of_match_ptr(rk618_rgb_of_match),
+	},
+	.probe = rk618_rgb_probe,
+	.remove = rk618_rgb_remove,
+};
+module_platform_driver(rk618_rgb_driver);
+
+MODULE_AUTHOR("Chen Shunqing <csq@rock-chips.com>");
+MODULE_DESCRIPTION("Rockchip RK618 RGB driver");
+MODULE_LICENSE("GPL v2");

From eabf63a9badc5297f990371340adbcd774bd621f Mon Sep 17 00:00:00 2001
From: Binyuan Lan <lby@rock-chips.com>
Date: Mon, 10 Sep 2018 17:42:29 +0800
Subject: [PATCH 1812/1852] arm64: dts: rockchip: rk3326-ai-va board set
 vbus-supply = <&vcc5v0_host>

Change-Id: Ie2bd6d468547e2bc324be37ff9b7f5383b0db6b3
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
---
 .../boot/dts/rockchip/rk3326-evb-ai-va-v11.dts      | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
index 18f812713c65e..55a229ac4d41d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts
@@ -261,18 +261,6 @@
 	status = "okay";
 };
 
-&cpu0_opp_table {
-	/*
-	 * max IR-drop values on different freq condition for this board!
-	 */
-	rockchip,board-irdrop = <
-		/*MHz   MHz     uV */
-		0       815     37500
-		816     1119    50000
-		1200    1512    75000
-	>;
-};
-
 &dmc {
 	center-supply = <&vdd_logic>;
 	status = "okay";
@@ -1234,6 +1222,7 @@
 	};
 
 	u2phy_otg: otg-port {
+		vbus-supply = <&vcc5v0_host>;
 		status = "okay";
 	};
 };

From 0fce6d62d4cfbc60ee00660b23dc92c2d92e7e57 Mon Sep 17 00:00:00 2001
From: Binyuan Lan <lby@rock-chips.com>
Date: Mon, 11 Jun 2018 15:16:30 +0800
Subject: [PATCH 1813/1852] arm64: dts: rockchip: add rk3326 ai-va v11 use
 i2s-dmic evaluation board

Change-Id: I005d9bac8ab0be82f7fd87b774fc4dc4269dad08
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/Makefile         |    1 +
 .../rk3326-evb-ai-va-v11-i2s-dmic.dts         | 1293 +++++++++++++++++
 2 files changed, 1294 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 9c36a13b6ebd0..0ab5d7138f376 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-fpga.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-voice-module-board-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-ai-va-v11-i2s-dmic.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts
new file mode 100644
index 0000000000000..be7d1157cb434
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts
@@ -0,0 +1,1293 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+#include <dt-bindings/display/drm_mipi_dsi.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/sensor-dev.h>
+#include "rk3326.dtsi"
+#include "rk3326-863-cif-sensor.dtsi"
+#include "px30-android.dtsi"
+
+/ {
+	model = "Rockchip rk3326 ai voice assistant evb v11 i2s-dmic board";
+	compatible = "rockchip,rk3326-evb-ai-va-v11-i2s-dmic", "rockchip,rk3326";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		mute-key {
+			linux,code = <KEY_MUTE>;
+			label = "mute";
+			press-threshold-microvolt = <1119000>;
+		};
+
+		mode-key {
+			linux,code = <KEY_MODE>;
+			label = "mode";
+			press-threshold-microvolt = <892000>;
+		};
+
+		media-key {
+			linux,code = <KEY_MEDIA>;
+			label = "media";
+			press-threshold-microvolt = <616000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <15000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	panel {
+		compatible = "samsung,lsl070nl01", "simple-panel";
+		backlight = <&backlight>;
+		enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+		enable-delay-ms = <20>;
+		prepare-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+		disable-delay-ms = <20>;
+		width-mm = <217>;
+		height-mm = <136>;
+		rockchip,data-mapping = "vesa";
+		rockchip,data-width = <24>;
+		rockchip,output = "lvds";
+		status = "disabled";
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <49500000>;
+				hactive = <1024>;
+				vactive = <600>;
+				hback-porch = <90>;
+				hfront-porch = <90>;
+				vback-porch = <10>;
+				vfront-porch = <10>;
+				hsync-len = <90>;
+				vsync-len = <10>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		port {
+			panel_in_lvds: endpoint {
+				remote-endpoint = <&lvds_out_panel>;
+			};
+		};
+	};
+
+	multi_dais: multi-dais {
+			status = "okay";
+			compatible = "rockchip,multi-dais";
+			dais = <&pdm>, <&i2s0_8ch>;
+			capture,channel-mapping = <2 6>;
+			playback,channel-mapping = <0 0>;
+			#sound-dai-cells = <0>;
+	};
+
+	rk809-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "rockchip,rk809-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"Mic Jack", "MICBIAS1",
+			"IN1P", "Mic Jack",
+			"Headphone Jack", "HPOL",
+			"Headphone Jack", "HPOR";
+		simple-audio-card,dai-link@0 {
+			format = "i2s";
+			cpu {
+				sound-dai = <&i2s1_2ch>;
+			};
+			codec {
+				sound-dai = <&rk809_codec 0>;
+			};
+		};
+		simple-audio-card,dai-link@1 {
+			format = "i2s";
+			cpu {
+				sound-dai = <&multi_dais>;
+			};
+			codec {
+				sound-dai = <&rk809_codec 1>;
+			};
+		};
+	};
+
+	bt-sound {
+		compatible = "simple-audio-card";
+		status = "disabled";
+		simple-audio-card,format = "dsp_b";
+		simple-audio-card,bitclock-inversion = <1>;
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "rockchip,bt";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s2_2ch>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&bt_sco>;
+		};
+	};
+
+	bt_sco: bt-sco {
+		compatible = "delta,dfbmcs320";
+		#sound-dai-cells = <0>;
+		status = "okay";
+	};
+
+	rk_headset {
+		compatible = "rockchip_headset";
+		headset_gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det>;
+		io-channels = <&saradc 1>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk809 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
+	};
+
+	vcc5v0_sys: vccsys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		wifi_chip_type = "AP6255";
+		WIFI,host_wake_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&rk809 1>;
+		clock-names = "ext_clock";
+		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default","rts_gpio";
+		pinctrl-0 = <&uart1_rts>;
+		pinctrl-1 = <&uart1_rts_gpio>;
+		BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+};
+
+&bus_apll {
+	bus-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&dfi {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dmc {
+	center-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		compatible = "sitronix,st7703", "simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <2>;
+		reset-delay-ms = <1>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <50>;
+		unprepare-delay-ms = <40>;
+
+		width-mm = <68>;
+		height-mm = <121>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			05 fa 01 11
+			39 00 04 b9 f1 12 83
+			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
+				 00 00 00 00 00 44 25 00 91 0a
+				 00 00 02 4f 01 00 00 37
+			15 00 02 b8 25
+			39 00 04 bf 02 11 00
+			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
+				 00
+			39 00 0a c0 73 73 50 50 00 00 08 70 00
+			15 00 02 bc 46
+			15 00 02 cc 0b
+			15 00 02 b4 80
+			39 00 04 b2 c8 12 30
+			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
+				 00 ff 00 c0 10
+			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
+				 77 33 33
+			39 00 07 c6 00 00 ff ff 01 ff
+			39 00 03 b5 09 09
+			39 00 03 b6 87 95
+			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
+				 23 3f 81 0a a0 37 18 00 80 01
+				 00 00 00 00 80 01 00 00 00 48
+				 f8 86 42 08 88 88 80 88 88 88
+				 58 f8 87 53 18 88 88 81 88 88
+				 88 00 00 00 01 00 00 00 00 00
+				 00 00 00 00
+			39 00 3e ea 00 1a 00 00 00 00 02 00 00
+				 00 00 00 1f 88 81 35 78 88 88
+				 85 88 88 88 0f 88 80 24 68 88
+				 88 84 88 88 88 23 10 00 00 1c
+				 00 00 00 00 00 00 00 00 00 00
+				 00 00 00 00 00 30 05 a0 00 00
+				 00 00
+			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
+				 0c 0d 11 13 12 13 11 18 00 06
+				 08 2a 31 3f 38 36 07 0c 0d 11
+				 13 12 13 11 18
+			05 32 01 29
+		];
+
+		panel-exit-sequence = [
+			05 00 01 28
+			05 00 01 10
+		];
+
+		display-timings {
+			native-mode = <&st7703_timing>;
+
+			st7703_timing: timing0 {
+				clock-frequency = <66000000>;
+				hactive = <720>;
+				vactive = <1280>;
+				hfront-porch = <40>;
+				hsync-len = <10>;
+				hback-porch = <40>;
+				vfront-porch = <22>;
+				vsync-len = <4>;
+				vback-porch = <11>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
+&dsi_in_vopl {
+	status = "disabled";
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <280>;
+	i2c-scl-falling-time-ns = <16>;
+
+	rk809: pmic@20 {
+		compatible = "rockchip,rk809";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default", "pmic-sleep",
+				"pmic-power-off", "pmic-reset";
+		pinctrl-0 = <&pmic_int>;
+		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
+		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
+		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		//fb-inner-reg-idxs = <2>;
+		/* 1: rst regs (default in codes), 0: rst the pmic */
+		pmic-reset-func = <1>;
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc5-supply = <&vcc3v3_sys>;
+		vcc6-supply = <&vcc3v3_sys>;
+		vcc7-supply = <&vcc3v3_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+
+		pwrkey {
+			status = "okay";
+		};
+
+		pinctrl_rk8xx: pinctrl_rk8xx {
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			rk817_slppin_null: rk817_slppin_null {
+				pins = "gpio_slp";
+				function = "pin_fun0";
+			};
+
+			rk817_slppin_slp: rk817_slppin_slp {
+				pins = "gpio_slp";
+				function = "pin_fun1";
+			};
+
+			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
+				pins = "gpio_slp";
+				function = "pin_fun2";
+			};
+
+			rk817_slppin_rst: rk817_slppin_rst {
+				pins = "gpio_slp";
+				function = "pin_fun3";
+			};
+		};
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x2>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc_1v0: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc_1v0";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcc3v3_sys: DCDC_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc3v3_sys";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc5v0_host: SWITCH_REG1 {
+				regulator-name = "vcc5v0_host";
+			};
+
+			vcc3v3_lcd: SWITCH_REG2 {
+				regulator-boot-on;
+				regulator-name = "vcc3v3_lcd";
+			};
+		};
+
+		rk809_codec: codec {
+			#sound-dai-cells = <1>;
+			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
+			clocks = <&cru SCLK_I2S1_OUT>;
+			clock-names = "mclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2s1_2ch_mclk>;
+			pdmdata-out-enable;
+			use-ext-amplifier;
+			adc-for-loopback;
+			spk-ctl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
+			hp-volume = <20>;
+			spk-volume = <20>;
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <275>;
+	i2c-scl-falling-time-ns = <16>;
+
+	gt1x: gt1x@14 {
+	      compatible = "goodix,gt1x";
+	      reg = <0x14>;
+	      goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+	      goodix,irq-gpio = <&gpio0 RK_PB3 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	is31fl3236: led-controller@3c {
+		compatible = "issi,is31fl3236";
+		reg = <0x3c>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+
+		led1: led@1 {
+			label = "led1";
+			reg = <1>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <0>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led2: led@2 {
+			label = "led2";
+			reg = <2>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <0>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led3: led@3 {
+			label = "led3";
+			reg = <3>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led4: led@4 {
+			label = "led4";
+			reg = <4>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <100>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led5: led@5 {
+			label = "led5";
+			reg = <5>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <100>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led6: led@6 {
+			label = "led6";
+			reg = <6>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led7: led@7 {
+			label = "led7";
+			reg = <7>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <200>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led8: led@8 {
+			label = "led8";
+			reg = <8>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <200>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led9: led@9 {
+			label = "led9";
+			reg = <9>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led10: led@10 {
+			label = "led10";
+			reg = <10>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <300>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led11: led@11 {
+			label = "led11";
+			reg = <11>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <300>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led12: led@12 {
+			label = "led12";
+			reg = <12>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led13: led@13 {
+			label = "led13";
+			reg = <13>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <400>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led14: led@14 {
+			label = "led14";
+			reg = <14>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <400>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led15: led@15 {
+			label = "led15";
+			reg = <15>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led16: led@16 {
+			label = "led16";
+			reg = <16>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <500>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led17: led@17 {
+			label = "led17";
+			reg = <17>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <500>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led18: led@18 {
+			label = "led18";
+			reg = <18>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led19: led@19 {
+			label = "led19";
+			reg = <19>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <600>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led20: led@20 {
+			label = "led20";
+			reg = <20>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <600>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led21: led@21 {
+			label = "led21";
+			reg = <21>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led22: led@22 {
+			label = "led22";
+			reg = <22>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <700>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led23: led@23 {
+			label = "led23";
+			reg = <23>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <700>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led124: led@24 {
+			label = "led24";
+			reg = <24>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led25: led@25 {
+			label = "led25";
+			reg = <25>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <800>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led26: led@26 {
+			label = "led26";
+			reg = <26>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <800>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led27: led@27 {
+			label = "led27";
+			reg = <27>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led28: led@28 {
+			label = "led28";
+			reg = <28>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <900>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led29: led@29 {
+			label = "led29";
+			reg = <29>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <900>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led30: led@30 {
+			label = "led30";
+			reg = <30>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led31: led@31 {
+			label = "led31";
+			reg = <31>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <1000>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led32: led@32 {
+			label = "led32";
+			reg = <32>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <1000>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led33: led@33 {
+			label = "led33";
+			reg = <33>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+
+		led34: led@34 {
+			label = "led34";
+			reg = <34>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <1100>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led35: led@35 {
+			label = "led35";
+			reg = <35>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "timer";
+			linux,default-trigger-delay-ms = <1100>;
+			linux,blink-delay-on-ms = <100>;
+			linux,blink-delay-off-ms = <1200>;
+		};
+
+		led36: led@36 {
+			label = "led36";
+			reg = <36>;
+			led-max-microamp = <10000>;
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	ls_stk3410: light@48 {
+		compatible = "ls_stk3410";
+		status = "okay";
+		reg = <0x48>;
+		type = <SENSOR_TYPE_LIGHT>;
+		irq_enable = <0>;
+		als_threshold_high = <100>;
+		als_threshold_low = <10>;
+		als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
+		poll_delay_ms = <100>;
+	};
+
+	ps_stk3410: proximity@48 {
+		compatible = "ps_stk3410";
+		status = "okay";
+		reg = <0x48>;
+		type = <SENSOR_TYPE_PROXIMITY>;
+		//pinctrl-names = "default";
+		//pinctrl-0 = <&gpio2_c3>;
+		//irq-gpio = <&gpio0 RK_PB7 IRQ_TYPE_LEVEL_LOW>;
+		//irq_enable = <1>;
+		ps_threshold_high = <0x200>;
+		ps_threshold_low = <0x100>;
+		ps_ctrl_gain = <3>; /* 0:x1 1:x4 2:x16 3:x64 */
+		ps_led_current = <3>; /* 0:12.5mA 1:25mA 2:50mA 3:100mA */
+		poll_delay_ms = <100>;
+	};
+
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2s0_8ch {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	rockchip,clk-trcm = <2>;
+	rockchip,no-dmaengine;
+};
+
+&i2s1_2ch {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	pinctrl-0 = <&i2s1_2ch_sclk
+		     &i2s1_2ch_lrck
+		     &i2s1_2ch_sdo>;
+};
+
+&i2s2_2ch {
+	status = "okay";
+	rockchip,bclk-fs = <64>;
+	#sound-dai-cells = <0>;
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vcc1v8_soc>;
+	vccio2-supply = <&vccio_sd>;
+	vccio3-supply = <&vcc1v8_dvp>;
+	vccio4-supply = <&vcc1v8_soc>;
+	vccio5-supply = <&vcc_3v0>;
+};
+
+&isp_mmu {
+	status = "okay";
+};
+
+&lvds {
+	status = "disabled";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			lvds_out_panel: endpoint {
+				remote-endpoint = <&panel_in_lvds>;
+			};
+		};
+	};
+};
+
+&lvds_in_vopl {
+	status = "disabled";
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&nandc0 {
+	status = "okay";
+};
+
+&pdm {
+	status = "okay";
+	#sound-dai-cells = <0>;
+	rockchip,no-dmaengine;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pdm_clk0m1
+		&pdm_sdi0m1>;
+};
+
+&pinctrl {
+	pinctrl-names = "default";
+	pinctrl-0 = <&tp_int>;
+
+	headphone {
+		hp_det: hp-det {
+			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic_int {
+			rockchip,pins =
+				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		soc_slppin_gpio: soc_slppin_gpio {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		soc_slppin_slp: soc_slppin_slp {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+		};
+
+		soc_slppin_rst: soc_slppin_rst {
+			rockchip,pins =
+				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	touchscreen-int {
+		tp_int: tp-int {
+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&pmu_io_domains {
+	status = "okay";
+
+	pmuio1-supply = <&vcc3v0_pmu>;
+	pmuio2-supply = <&vcc3v0_pmu>;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&rk_isp {
+	status = "okay";
+};
+
+&rk_rga {
+	status = "okay";
+};
+
+&rockchip_suspend {
+	status = "okay";
+	rockchip,sleep-debug-en = <1>;
+};
+
+&route_dsi {
+	status = "okay";
+};
+
+&route_lvds {
+	status = "disabled";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vcc1v8_soc>;
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	supports-sdio;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&tsadc {
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&tsadc_otp_gpio>;
+	pinctrl-1 = <&tsadc_otp_out>;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+
+	u2phy_otg: otg-port {
+		vbus-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts>;
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&vpu_combo {
+	status = "okay";
+};
+
+&firmware_android {
+	compatible = "android,firmware";
+	fstab {
+		compatible = "android,fstab";
+		system {
+			compatible = "android,system";
+			dev = "/dev/block/by-name/system";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+		vendor {
+			compatible = "android,vendor";
+			dev = "/dev/block/by-name/vendor";
+			type = "ext4";
+			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+			fsmgr_flags = "wait";
+		};
+	};
+};

From 74e98a417232147ac15163e702dafd1d81920b32 Mon Sep 17 00:00:00 2001
From: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date: Thu, 6 Sep 2018 17:56:57 +0800
Subject: [PATCH 1814/1852] video/rockchip: rga: fix unsupported to scaling
 less than 1/2

Change-Id: Ic89ef40dd7c2a2a5f885009af72f9a5f6dadab83
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
---
 drivers/video/rockchip/rga/rga_drv.c | 181 +++++++++++++++++++++------
 1 file changed, 143 insertions(+), 38 deletions(-)
 mode change 100755 => 100644 drivers/video/rockchip/rga/rga_drv.c

diff --git a/drivers/video/rockchip/rga/rga_drv.c b/drivers/video/rockchip/rga/rga_drv.c
old mode 100755
new mode 100644
index 31a8da79984ab..12c3845b8d89f
--- a/drivers/video/rockchip/rga/rga_drv.c
+++ b/drivers/video/rockchip/rga/rga_drv.c
@@ -932,11 +932,84 @@ static int rga_get_dma_buf(struct rga_req *req)
 	return ret;
 }
 
+static struct rga_reg *rga_reg_init_2(rga_session *session, struct rga_req *req0,
+				      struct rga_req *req1)
+{
+	int32_t ret;
+	struct rga_reg *reg0, *reg1;
+
+	reg0 = NULL;
+	reg1 = NULL;
+
+	do {
+		reg0 = kzalloc(sizeof(*reg0), GFP_KERNEL);
+		if (!reg0) {
+			pr_err("%s [%d] kmalloc fail in rga_reg_init\n",
+			       __func__, __LINE__);
+			break;
+		}
+
+		reg1 = kzalloc(sizeof(*reg1), GFP_KERNEL);
+		if (!reg1) {
+			pr_err("%s [%d] kmalloc fail in rga_reg_init\n",
+			       __func__, __LINE__);
+			break;
+		}
+
+		reg0->session = session;
+		INIT_LIST_HEAD(&reg0->session_link);
+		INIT_LIST_HEAD(&reg0->status_link);
+
+		reg1->session = session;
+		INIT_LIST_HEAD(&reg1->session_link);
+		INIT_LIST_HEAD(&reg1->status_link);
+
+		req0->mmu_info.mmu_flag &= (~(1 << 10));
+		if (req0->mmu_info.mmu_en) {
+			ret = rga_set_mmu_info(reg0, req0);
+			if (ret < 0) {
+				pr_err("%s, [%d] set mmu info error\n",
+				       __func__, __LINE__);
+				break;
+			}
+		}
+
+		RGA_gen_reg_info(req0, (uint8_t *)reg0->cmd_reg);
+		req1->mmu_info.mmu_flag &= (~(1 << 8));
+		if (req1->mmu_info.mmu_en) {
+			ret = rga_set_mmu_info(reg1, req1);
+			if (ret < 0) {
+				pr_err("%s, [%d] set mmu info error\n",
+				       __func__, __LINE__);
+				break;
+			}
+		}
+
+		RGA_gen_reg_info(req1, (uint8_t *)reg1->cmd_reg);
+		mutex_lock(&rga_service.lock);
+		list_add_tail(&reg0->status_link, &rga_service.waiting);
+		list_add_tail(&reg0->session_link, &session->waiting);
+		list_add_tail(&reg1->status_link, &rga_service.waiting);
+		list_add_tail(&reg1->session_link, &session->waiting);
+		mutex_unlock(&rga_service.lock);
+
+		return reg1;
+
+	} while (0);
+
+	if (reg0)
+		kfree(reg0);
+	if (reg1)
+		kfree(reg1);
+	return NULL;
+}
+
 static int rga_blit(rga_session *session, struct rga_req *req)
 {
-    int ret = -1;
-    int num = 0;
-    struct rga_reg *reg;
+	int ret = -1;
+	int num = 0;
+	struct rga_reg *reg;
+	struct rga_req req2;
 
 	uint32_t saw, sah, daw, dah;
 
@@ -945,54 +1018,86 @@ static int rga_blit(rga_session *session, struct rga_req *req)
 	daw = req->dst.act_w;
 	dah = req->dst.act_h;
 
-    #if RGA_TEST
-    print_info(req);
-    #endif
+#if RGA_TEST
+	print_info(req);
+#endif
 	if (rga_get_dma_buf(req)) {
-        printk("RGA : DMA buf copy error\n");
-        return -EFAULT;
-    }
+		pr_err("RGA : DMA buf copy error\n");
+		return -EFAULT;
+	}
 	req->render_mode &= (~RGA_BUF_GEM_TYPE_MASK);
-    do {
-			if (((saw >> 1) >= daw) || ((sah >> 1) >= dah)) {
-				pr_err("unsupported to scaling less than 1/2 \n");
-				goto err_put_dma_buf;
-			}
-
-			if (((daw >> 3) >= saw) || ((dah >> 3) >= sah)) {
-				pr_err("unsupported to scaling more than 8 \n");
-				goto err_put_dma_buf;
-			}
+	do {
+	if ((req->render_mode == bitblt_mode) && (((saw >> 1) >= daw) || ((sah >> 1) >= dah))) {
+			/* generate 2 cmd for pre scale */
+		if (((saw >> 3) > daw) || ((sah >> 3) > dah)) {
+			pr_err("unsupported to scaling less than 1/8\n");
+			goto err_put_dma_buf;
+		}
+		if (((daw >> 3) > saw) || ((dah >> 3) > daw)) {
+			pr_err("unsupported to scaling more than 8\n");
+			goto err_put_dma_buf;
+		}
+		ret = rga_check_param(req);
+		if (ret == -EINVAL) {
+			pr_err("req 0 argument is inval\n");
+			goto err_put_dma_buf;
+		}
 
+		ret = RGA_gen_two_pro(req, &req2);
+		if (ret == -EINVAL) {
+			pr_err("RGA_gen_two_pro err\n");
+			goto err_put_dma_buf;
+		}
 
-            /* check value if legal */
-            ret = rga_check_param(req);
-        	if(ret == -EINVAL) {
-                printk("req argument is inval\n");
-				goto err_put_dma_buf;
-        	}
+		ret = rga_check_param(req);
+		if (ret == -EINVAL) {
+			pr_err("req 1 argument is inval\n");
+			goto err_put_dma_buf;
+		}
 
-            reg = rga_reg_init(session, req);
-            if(reg == NULL) {
-				pr_err("init reg fail\n");
-				goto err_put_dma_buf;
-            }
+		ret = rga_check_param(&req2);
+		if (ret == -EINVAL) {
+			pr_err("req 2 argument is inval\n");
+			goto err_put_dma_buf;
+		}
 
-            num = 1;
+		reg = rga_reg_init_2(session, req, &req2);
+		if (!reg) {
+			pr_err("init2 reg fail\n");
+			rga_put_dma_buf(&req2, NULL);
+			goto err_put_dma_buf;
+		}
+		rga_put_dma_buf(&req2, NULL);
+		num = 2;
+	} else {
+		/* check value if legal */
+		ret = rga_check_param(req);
+		if (ret == -EINVAL) {
+			pr_err("req argument is inval\n");
+			goto err_put_dma_buf;
+		}
 
-			mutex_lock(&rga_service.lock);
-			atomic_add(num, &rga_service.total_running);
-			rga_try_set_reg();
-			mutex_unlock(&rga_service.lock);
+		reg = rga_reg_init(session, req);
+		if (!reg) {
+			pr_err("init reg fail\n");
+			goto err_put_dma_buf;
+		}
 
-			return 0;
+		num = 1;
 	}
-    while(0);
+
+	mutex_lock(&rga_service.lock);
+	atomic_add(num, &rga_service.total_running);
+	rga_try_set_reg();
+	mutex_unlock(&rga_service.lock);
+	return 0;
+
+	} while (0);
 
 err_put_dma_buf:
 	rga_put_dma_buf(req, NULL);
 
-    return -EFAULT;
+	return -EFAULT;
 }
 
 static int rga_blit_async(rga_session *session, struct rga_req *req)

From be9d0907edabb914add5a31e4d64245c86793f93 Mon Sep 17 00:00:00 2001
From: ZhongYiChong <zyc@rock-chips.com>
Date: Fri, 14 Sep 2018 11:07:00 +0800
Subject: [PATCH 1815/1852] arm: dts: rockchip: rk312x: add cma_region
 reference for CIF

Because rk312x CIF has no IOMMU and it should use CMA memory,
adding the cma_region reference for CIF, so that it could get
the CMA memory from our reserved CMA region other than from
system default CMA region.

Change-Id: I7a52abce75a2a82d3068721ddbb10ed89796ac2a
Signed-off-by: Zhong Yichong <zyc@rock-chips.com>
---
 arch/arm/boot/dts/rk312x-android.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk312x-android.dtsi b/arch/arm/boot/dts/rk312x-android.dtsi
index 617a20653e5e0..745025573b65a 100644
--- a/arch/arm/boot/dts/rk312x-android.dtsi
+++ b/arch/arm/boot/dts/rk312x-android.dtsi
@@ -65,6 +65,10 @@
 	};
 };
 
+&cif_new {
+	memory-region = <&cma_region>;
+};
+
 &dfi {
 	status = "okay";
 };

From c6a26a03252e1fd42419feaeff1161a55b39ae46 Mon Sep 17 00:00:00 2001
From: ZhongYiChong <zyc@rock-chips.com>
Date: Fri, 14 Sep 2018 11:12:00 +0800
Subject: [PATCH 1816/1852] media: rockchip: rkcif: support get continuous
 memory from specific CMA region

If no IOMMU support for CIF, we prefer to alloc continuous
physical memory from our reserved CMA region than from system
reserved.

Change-Id: Icbe1f206593ffc10eba96e12f77f499455dbcd55
Signed-off-by: Zhong Yichong <zyc@rock-chips.com>
---
 drivers/media/platform/rockchip/cif/dev.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/cif/dev.c b/drivers/media/platform/rockchip/cif/dev.c
index c57a82cbf80aa..9d6dd2b7ecfc4 100644
--- a/drivers/media/platform/rockchip/cif/dev.c
+++ b/drivers/media/platform/rockchip/cif/dev.c
@@ -12,6 +12,7 @@
 #include <linux/of.h>
 #include <linux/of_graph.h>
 #include <linux/of_platform.h>
+#include <linux/of_reserved_mem.h>
 #include <linux/reset.h>
 #include <linux/pm_runtime.h>
 #include <linux/pinctrl/consumer.h>
@@ -486,8 +487,15 @@ static int rkcif_plat_probe(struct platform_device *pdev)
 		goto err_unreg_media_dev;
 
 	cif_dev->iommu_en = is_iommu_enable(dev);
-	if (cif_dev->iommu_en)
+	if (cif_dev->iommu_en) {
 		rkcif_iommu_init(cif_dev);
+	} else {
+		ret = of_reserved_mem_device_init(dev);
+		if (ret)
+			v4l2_warn(v4l2_dev,
+				  "No reserved memory region assign to CIF\n");
+	}
+
 	pm_runtime_enable(&pdev->dev);
 
 	return 0;

From b5243af5e880393de5740195684fa0a75da61e1e Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 14 Sep 2018 11:53:25 +0800
Subject: [PATCH 1817/1852] drm/rockchip: dsi: support EoTp feature

In order to enhance the overall robustness of the system, DSI defines
a dedicated EoT packet (EoTp) at the protocol layer for signaling
the end of HS transmission. For backwards compatibility with earlier
DSI systems, the capability of generating and interpreting this EoTp
can be enabled or disabled.

Change-Id: Iddc7e82a7e3e47dea94846fbb771da8fddc0fda3
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 595583bac9666..7d1487a731e0b 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -74,11 +74,11 @@
 #define DSI_DBI_CMDSIZE			0x28
 
 #define DSI_PCKHDL_CFG			0x2c
-#define EN_CRC_RX			BIT(4)
-#define EN_ECC_RX			BIT(3)
-#define EN_BTA				BIT(2)
-#define EN_EOTP_RX			BIT(1)
-#define EN_EOTP_TX			BIT(0)
+#define CRC_RX_EN			BIT(4)
+#define ECC_RX_EN			BIT(3)
+#define BTA_EN				BIT(2)
+#define EOTP_RX_EN			BIT(1)
+#define EOTP_TX_EN			BIT(0)
 
 #define DSI_MODE_CFG			0x34
 #define ENABLE_VIDEO_MODE		0
@@ -1082,8 +1082,12 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 
 static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 {
-	regmap_write(dsi->regmap, DSI_PCKHDL_CFG,
-		     EN_CRC_RX | EN_ECC_RX | EN_BTA);
+	u32 val = CRC_RX_EN | ECC_RX_EN | BTA_EN | EOTP_TX_EN;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+		val &= ~EOTP_TX_EN;
+
+	regmap_write(dsi->regmap, DSI_PCKHDL_CFG, val);
 }
 
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,

From ca3ce617f638c1eca80a1631bea5d0a40e63fbd4 Mon Sep 17 00:00:00 2001
From: Weiguo Hu <hwg@rock-chips.com>
Date: Fri, 14 Sep 2018 15:47:32 +0800
Subject: [PATCH 1818/1852] Bluetooth: rtk_btusb: update rtk_btusb to version
 4.1.5

Change-Id: I62bbc6e6b26823ef24418961dab2d7b93768de4e
Signed-off-by: Weiguo Hu <hwg@rock-chips.com>
---
 drivers/bluetooth/rtk_btusb.c | 761 +++++++++++++++++++++++++++++++---
 drivers/bluetooth/rtk_btusb.h |  89 ++--
 2 files changed, 777 insertions(+), 73 deletions(-)
 mode change 100755 => 100644 drivers/bluetooth/rtk_btusb.c
 mode change 100755 => 100644 drivers/bluetooth/rtk_btusb.h

diff --git a/drivers/bluetooth/rtk_btusb.c b/drivers/bluetooth/rtk_btusb.c
old mode 100755
new mode 100644
index 239ebfdc2b593..5db188416009f
--- a/drivers/bluetooth/rtk_btusb.c
+++ b/drivers/bluetooth/rtk_btusb.c
@@ -39,8 +39,8 @@
 
 #include "rtk_btusb.h"
 
-#define RTKBT_RELEASE_NAME "20170109_TV_ANDROID_6.x"
-#define VERSION "4.1.2"
+#define RTKBT_RELEASE_NAME "20180702_BT_ANDROID_8.1"
+#define VERSION "4.1.5"
 
 #define SUSPNED_DW_FW 0
 #define SET_WAKEUP_DEVICE 0
@@ -54,6 +54,8 @@ static volatile uint16_t    dlfw_dis_state = 0;
 static firmware_info *fw_info_4_suspend = NULL;
 #endif
 
+static uint32_t usb_info;
+
 static patch_info fw_patch_table[] = {
 /* { vid, pid, lmp_sub_default, lmp_sub, everion, mp_fw_name, fw_name, config_name, fw_cache, fw_len, mac_offset } */
 { 0x0BDA, 0x1724, 0x1200, 0, 0, "mp_rtl8723a_fw", "rtl8723a_fw", "rtl8723a_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_1_2, MAX_PATCH_SIZE_24K}, /* RTL8723A */
@@ -101,15 +103,17 @@ static patch_info fw_patch_table[] = {
 { 0x13D3, 0x3461, 0x8821, 0, 0, "mp_rtl8821a_fw", "rtl8821a_fw", "rtl8821a_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_1_2, MAX_PATCH_SIZE_24K}, /* RTL8821AE */
 { 0x13D3, 0x3462, 0x8821, 0, 0, "mp_rtl8821a_fw", "rtl8821a_fw", "rtl8821a_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_1_2, MAX_PATCH_SIZE_24K}, /* RTL8821AE */
 
-{ 0x0BDA, 0xB822, 0x8822, 0, 0, "mp_rtl8822b_fw", "rtl8822b_fw", "rtl8822b_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8822BU */
+{ 0x0BDA, 0xB822, 0x8822, 0, 0, "mp_rtl8822b_fw", "rtl8822b_fw", "rtl8822b_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8822BE */
 { 0x0BDA, 0xB82C, 0x8822, 0, 0, "mp_rtl8822b_fw", "rtl8822b_fw", "rtl8822b_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8822BU */
-{ 0x0BDA, 0xb023, 0x8822, 0, 0, "mp_rtl8822b_fw", "rtl8822b_fw", "rtl8822b_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8822BE */
+{ 0x0BDA, 0xB023, 0x8822, 0, 0, "mp_rtl8822b_fw", "rtl8822b_fw", "rtl8822b_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8822BE */
 { 0x0BDA, 0xB703, 0x8703, 0, 0, "mp_rtl8723c_fw", "rtl8723c_fw", "rtl8723c_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_24K}, /* RTL8723CU */
 /* todo: RTL8703BU */
 
 { 0x0BDA, 0xD723, 0x8723, 0, 0, "mp_rtl8723d_fw", "rtl8723d_fw", "rtl8723d_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_40K}, /* RTL8723DU */
+{ 0x0BDA, 0xD720, 0x8723, 0, 0, "mp_rtl8723d_fw", "rtl8723d_fw", "rtl8723d_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_40K}, /* RTL8723DE */
 { 0x0BDA, 0xB820, 0x8821, 0, 0, "mp_rtl8821c_fw", "rtl8821c_fw", "rtl8821c_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_40K}, /* RTL8821CU */
 { 0x0BDA, 0xC820, 0x8821, 0, 0, "mp_rtl8821c_fw", "rtl8821c_fw", "rtl8821c_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_40K}, /* RTL8821CU */
+{ 0x0BDA, 0xC821, 0x8821, 0, 0, "mp_rtl8821c_fw", "rtl8821c_fw", "rtl8821c_config", NULL, 0 ,CONFIG_MAC_OFFSET_GEN_3PLUS, MAX_PATCH_SIZE_40K}, /* RTL8821CE */
 /* todo: RTL8703CU */
 
 /* NOTE: must append patch entries above the null entry */
@@ -148,6 +152,7 @@ struct btusb_data {
     unsigned int sco_num;
     int isoc_altsetting;
     int suspend_count;
+    uint16_t sco_handle;
 //#ifdef CONFIG_HAS_EARLYSUSPEND
 #if 0
     struct early_suspend early_suspend;
@@ -156,21 +161,28 @@ struct btusb_data {
     struct notifier_block reboot_notifier;
 #endif
     firmware_info *fw_info;
+
+#ifdef CONFIG_SCO_OVER_HCI
+    RTK_sco_card_t  *pSCOSnd;
+#endif
 };
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 1)
 static bool reset_on_close = 0;
 #endif
 
 int download_patch(firmware_info *fw_info, int cached);
+int reset_controller(firmware_info* fw_info);
 
 static inline int check_set_dlfw_state_value(uint16_t change_value)
 {
+    int state;
     spin_lock(&dlfw_lock);
     if(!dlfw_dis_state) {
         dlfw_dis_state = change_value;
     }
+    state = dlfw_dis_state;
     spin_unlock(&dlfw_lock);
-    return dlfw_dis_state;
+    return state;
 }
 
 static inline void set_dlfw_state_value(uint16_t change_value)
@@ -316,12 +328,12 @@ static void print_command(struct sk_buff *skb)
 
 #if CONFIG_BLUEDROID
 /* Global parameters for bt usb char driver */
-#define BT_CHAR_DEVICE_NAME "rtk_btusb"
+#define BT_CHAR_DEVICE_NAME "rtkbt_dev"
 struct mutex btchr_mutex;
 static struct sk_buff_head btchr_readq;
 static wait_queue_head_t btchr_read_wait;
 static wait_queue_head_t bt_dlfw_wait;
-static int bt_char_dev_registered;
+static bool bt_char_dev_registered;
 static dev_t bt_devid; /* bt char device number */
 static struct cdev bt_char_dev; /* bt character device structure */
 static struct class *bt_char_class; /* device class for usb char driver */
@@ -493,7 +505,7 @@ static struct sk_buff *rtk_dequeue_try(unsigned int deq_len)
 
     skb = rtk_skb_queue[rtk_skb_queue_front];
     if (deq_len >= skb->len) {
-
+        rtk_skb_queue[rtk_skb_queue_front] = NULL;
         rtk_skb_queue_front++;
         rtk_skb_queue_front %= QUEUE_SIZE;
 
@@ -515,6 +527,22 @@ static inline int is_queue_empty(void)
     return (rtk_skb_queue_front == rtk_skb_queue_rear) ? 1 : 0;
 }
 
+static void rtk_clear_queue(void)
+{
+    struct sk_buff *skb;
+    spin_lock(&queue_lock);
+    while(!is_queue_empty()) {
+        skb = rtk_skb_queue[rtk_skb_queue_front];
+        rtk_skb_queue[rtk_skb_queue_front] = NULL;
+        rtk_skb_queue_front++;
+        rtk_skb_queue_front %= QUEUE_SIZE;
+        if (skb) {
+            kfree_skb(skb);
+        }
+    }
+    spin_unlock(&queue_lock);
+}
+
 /*
  * Realtek - Integrate from hci_core.c
  */
@@ -552,6 +580,14 @@ static int hci_dev_open(__u16 dev)
         ret = -EALREADY;
         goto done;
     }
+/*
+    ret = hdev->open(hdev);
+    if(ret < 0){
+        RTKBT_ERR("%s:Failed in hdev->open(hdev):%d",__func__,ret);
+        goto done;
+    }
+    set_bit(HCI_UP, &hdev->flags);
+*/
 
 done:
     return ret;
@@ -658,6 +694,69 @@ static void hci_unregister_dev(struct hci_dev *hdev)
         kfree_skb(hdev->reassembly[i]);
 }
 
+
+#ifdef CONFIG_SCO_OVER_HCI
+/* copy data from the URB buffer into the ALSA ring buffer */
+static bool rtk_copy_capture_data_to_alsa(struct btusb_data *data, uint8_t* p_data, unsigned int frames)
+{
+  	struct snd_pcm_runtime *runtime;
+  	unsigned int frame_bytes, frames1;
+  	u8 *dest;
+    RTK_sco_card_t  *pSCOSnd = data->pSCOSnd;
+
+  	runtime = pSCOSnd->capture.substream->runtime;
+  	frame_bytes = 2;
+
+  	dest = runtime->dma_area + pSCOSnd->capture.buffer_pos * frame_bytes;
+  	if (pSCOSnd->capture.buffer_pos + frames <= runtime->buffer_size) {
+  		memcpy(dest, p_data, frames * frame_bytes);
+  	} else {
+  		/* wrap around at end of ring buffer */
+  		frames1 = runtime->buffer_size - pSCOSnd->capture.buffer_pos;
+  		memcpy(dest, p_data, frames1 * frame_bytes);
+  		memcpy(runtime->dma_area,
+  		       p_data + frames1 * frame_bytes,
+  		       (frames - frames1) * frame_bytes);
+  	}
+
+  	pSCOSnd->capture.buffer_pos += frames;
+  	if (pSCOSnd->capture.buffer_pos >= runtime->buffer_size) {
+  		pSCOSnd->capture.buffer_pos -= runtime->buffer_size;
+  	}
+
+    if((pSCOSnd->capture.buffer_pos%runtime->period_size) == 0) {
+        snd_pcm_period_elapsed(pSCOSnd->capture.substream);
+    }
+
+  	return false;
+}
+
+
+static void hci_send_to_alsa_ringbuffer(struct hci_dev *hdev, struct sk_buff *skb)
+{
+    struct btusb_data *data = GET_DRV_DATA(hdev);
+    RTK_sco_card_t  *pSCOSnd = data->pSCOSnd;
+    uint8_t* p_data;
+    int sco_length = skb->len - HCI_SCO_HDR_SIZE;
+
+    RTKBT_DBG("%s", __func__);
+
+    if (!hdev) {
+        RTKBT_ERR("%s: Frame for unknown HCI device", __func__);
+        return;
+    }
+
+    if (!test_bit(ALSA_CAPTURE_RUNNING, &pSCOSnd->states)) {
+        //RTKBT_WARN("%s: ALSA is not running", __func__);
+        return;
+    }
+
+    p_data = (uint8_t *)skb->data + HCI_SCO_HDR_SIZE;
+    rtk_copy_capture_data_to_alsa(data, p_data, sco_length/2);
+}
+
+#endif
+
 static void hci_send_to_stack(struct hci_dev *hdev, struct sk_buff *skb)
 {
     struct sk_buff *rtk_skb_copy = NULL;
@@ -711,9 +810,14 @@ static int hci_recv_frame(struct sk_buff *skb)
     __net_timestamp(skb);
 
     if (atomic_read(&hdev->promisc)) {
+#ifdef CONFIG_SCO_OVER_HCI
+        if(bt_cb(skb)->pkt_type == HCI_SCODATA_PKT)
+            hci_send_to_alsa_ringbuffer(hdev, skb);
+#endif
         /* Send copy to the sockets */
         hci_send_to_stack(hdev, skb);
     }
+
     kfree_skb(skb);
     return 0;
 }
@@ -900,6 +1004,7 @@ static int btchr_open(struct inode *inode_p, struct file  *file_p)
     hci_dev_open(0);
     mutex_unlock(&btchr_mutex);
 
+    rtk_clear_queue();
     return nonseekable_open(inode_p, file_p);
 }
 
@@ -1036,6 +1141,11 @@ static unsigned int btchr_poll(struct file *file_p, poll_table *wait)
 
     RTKBT_DBG("%s: BT usb char device is polling", __func__);
 
+    if(!bt_char_dev_registered) {
+        RTKBT_ERR("%s: char device has not registered!", __func__);
+        return POLLERR | POLLHUP;
+    }
+
     poll_wait(file_p, &btchr_read_wait, wait);
 
     hdev = hci_dev_get(0);
@@ -1062,12 +1172,16 @@ static unsigned int btchr_poll(struct file *file_p, poll_table *wait)
 
     return POLLOUT | POLLWRNORM;
 }
-static long btchr_ioctl(struct file *file_p,unsigned int cmd, unsigned long arg){
+static long btchr_ioctl(struct file *file_p, unsigned int cmd, unsigned long arg){
     int ret = 0;
     struct hci_dev *hdev;
     struct btusb_data *data;
     firmware_info *fw_info;
 
+    if(!bt_char_dev_registered) {
+        return -ENODEV;
+    }
+
     if(check_set_dlfw_state_value(1) != 1) {
         RTKBT_ERR("%s bt controller is disconnecting!", __func__);
         return 0;
@@ -1106,6 +1220,24 @@ static long btchr_ioctl(struct file *file_p,unsigned int cmd, unsigned long arg)
             set_dlfw_state_value(0);
             wake_up_interruptible(&bt_dlfw_wait);
             return 1;
+        case GET_USB_INFO:
+            ret = hdev->open(hdev);
+            if(ret < 0){
+                RTKBT_ERR("%s:Failed in hdev->open(hdev):%d",__func__,ret);
+                //goto done;
+            }
+            set_bit(HCI_UP, &hdev->flags);
+            return usb_info;
+        case RESET_CONTROLLER:
+            reset_controller(fw_info);
+            return 1;
+
+#ifdef CONFIG_SCO_OVER_HCI
+        case SET_ISO_CFG:
+            hdev->voice_setting = *(__u16 *)arg;
+            RTKBT_INFO(" voice settings = 0x%04x", hdev->voice_setting);
+            return 1;
+#endif
         default:
             RTKBT_ERR("%s:Failed with wrong Cmd:%d",__func__,cmd);
             goto failed;
@@ -1277,6 +1409,7 @@ static patch_info *get_fw_table_entry(struct usb_device* udev)
     uint32_t i;
 
     RTKBT_INFO("%s: Product id = 0x%04x, fw table entry size %d", __func__, pid, entry_size);
+    usb_info = (uint32_t)(vid<<16) | pid;
 
     for (i = 0; i < entry_size; i++, patch_entry++) {
         if ((vid == patch_entry->vid)&&(pid == patch_entry->pid))
@@ -1373,7 +1506,7 @@ int reset_controller(firmware_info* fw_info)
 
     //sleep 1s for firmware reset.
     msleep(1000);
-    RTKBT_INFO("%s: Wait fw reset for 1ms",__func__);
+    RTKBT_INFO("%s: Wait fw reset for 1000ms",__func__);
 
     return ret_val;
 }
@@ -1618,7 +1751,7 @@ void rtk_update_altsettings(patch_info *patch_entry, const unsigned char* org_co
 
     if (config->data_len != org_config_len - sizeof(struct rtk_bt_vendor_config))
     {
-        RTKBT_ERR("rtk_update_altsettings: config len(%x) is not right(%x)", config->data_len, (unsigned int)(org_config_len-sizeof(struct rtk_bt_vendor_config)));
+        RTKBT_ERR("rtk_update_altsettings: config len(%x) is not right(%x)", config->data_len, org_config_len-(int)sizeof(struct rtk_bt_vendor_config));
         return;
     }
 
@@ -2526,7 +2659,6 @@ void check_sco_event(struct urb *urb)
 {
     u8* opcode = (u8*)(urb->transfer_buffer);
     u8 status;
-    static uint16_t sco_handle = 0;
     uint16_t handle;
     struct hci_dev *hdev = urb->context;
     struct btusb_data *data = GET_DRV_DATA(hdev);
@@ -2535,19 +2667,21 @@ void check_sco_event(struct urb *urb)
     case HCI_EV_SYNC_CONN_COMPLETE:
         RTKBT_INFO("%s: HCI_EV_SYNC_CONN_COMPLETE(0x%02x)", __func__, *opcode);
         status = *(opcode + 2);
-        sco_handle = *(opcode + 3) | *(opcode + 4) << 8;
+        data->sco_handle = *(opcode + 3) | *(opcode + 4) << 8;
+        //hdev->voice_setting = *(uint16_t*)&opcode[15];
         if (status == 0) {
             hdev->conn_hash.sco_num++;
-            schedule_work(&data->work);
+            hdev->notify(hdev, 0);
         }
         break;
     case HCI_EV_DISCONN_COMPLETE:
-        RTKBT_INFO("%s: HCI_EV_DISCONN_COMPLETE(0x%02x)", __func__, *opcode);
         status = *(opcode + 2);
         handle = *(opcode + 3) | *(opcode + 4) << 8;
-        if (status == 0 && sco_handle == handle) {
+        if (status == 0 && data->sco_handle == handle) {
+            RTKBT_INFO("%s: SCO HCI_EV_DISCONN_COMPLETE(0x%02x)", __func__, *opcode);
             hdev->conn_hash.sco_num--;
-            schedule_work(&data->work);
+            hdev->notify(hdev, 0);
+            data->sco_handle = 0;
         }
         break;
     default:
@@ -2565,7 +2699,9 @@ static void btusb_intr_complete(struct urb *urb)
     RTKBT_DBG("%s: urb %p status %d count %d ", __func__,
             urb, urb->status, urb->actual_length);
 
-//    check_sco_event(urb);
+#ifdef CONFIG_SCO_OVER_HCI
+    check_sco_event(urb);
+#endif
 
     if (!test_bit(HCI_RUNNING, &hdev->flags))
         return;
@@ -3031,6 +3167,156 @@ static int btusb_flush(struct hci_dev *hdev)
     return 0;
 }
 
+#ifdef CONFIG_SCO_OVER_HCI
+static void btusb_isoc_snd_tx_complete(struct urb *urb);
+
+static int snd_send_sco_frame(struct sk_buff *skb)
+{
+    struct hci_dev *hdev = (struct hci_dev *) skb->dev;
+
+    struct btusb_data *data = GET_DRV_DATA(hdev);
+    //struct usb_ctrlrequest *dr;
+    struct urb *urb;
+    unsigned int pipe;
+    int err;
+
+    RTKBT_DBG("%s:pkt type %d, packet_len : %d",
+            __func__,bt_cb(skb)->pkt_type, skb->len);
+
+    if (!hdev && !test_bit(HCI_RUNNING, &hdev->flags))
+        return -EBUSY;
+
+    if (!data->isoc_tx_ep || hdev->conn_hash.sco_num < 1) {
+        kfree(skb);
+        return -ENODEV;
+    }
+
+    urb = usb_alloc_urb(BTUSB_MAX_ISOC_FRAMES, GFP_ATOMIC);
+    if (!urb) {
+        RTKBT_ERR("%s: Failed to allocate mem for sco pkts", __func__);
+        kfree(skb);
+        return -ENOMEM;
+    }
+
+    pipe = usb_sndisocpipe(data->udev, data->isoc_tx_ep->bEndpointAddress);
+
+    usb_fill_int_urb(urb, data->udev, pipe,
+            skb->data, skb->len, btusb_isoc_snd_tx_complete,
+            skb, data->isoc_tx_ep->bInterval);
+
+    urb->transfer_flags  = URB_ISO_ASAP;
+
+    fill_isoc_descriptor(urb, skb->len,
+            le16_to_cpu(data->isoc_tx_ep->wMaxPacketSize));
+
+    hdev->stat.sco_tx++;
+
+    usb_anchor_urb(urb, &data->tx_anchor);
+
+    err = usb_submit_urb(urb, GFP_ATOMIC);
+    if (err < 0) {
+        RTKBT_ERR("%s: Failed to submit urb %p, pkt type %d, err %d",
+                __func__, urb, bt_cb(skb)->pkt_type, err);
+        kfree(urb->setup_packet);
+        usb_unanchor_urb(urb);
+    } else
+        usb_mark_last_busy(data->udev);
+    usb_free_urb(urb);
+
+    return err;
+
+}
+
+static bool snd_copy_send_sco_data( RTK_sco_card_t *pSCOSnd)
+{
+    struct snd_pcm_runtime *runtime = pSCOSnd->playback.substream->runtime;
+  	unsigned int frame_bytes = 2, frames1;
+    const u8 *source;
+
+    snd_pcm_uframes_t period_size = runtime->period_size;
+    int i, count;
+    u8 buffer[period_size * 3];
+    int sco_packet_bytes = pSCOSnd->playback.sco_packet_bytes;
+    struct sk_buff *skb;
+
+    count = frames_to_bytes(runtime, period_size)/sco_packet_bytes;
+    skb = bt_skb_alloc(((sco_packet_bytes + HCI_SCO_HDR_SIZE) * count), GFP_ATOMIC);
+    skb->dev = (void *)hci_dev_get(0);
+    bt_cb(skb)->pkt_type = HCI_SCODATA_PKT;
+    skb_put(skb, ((sco_packet_bytes + HCI_SCO_HDR_SIZE) * count));
+    if(!skb)
+        return false;
+
+    RTKBT_DBG("%s, buffer_pos: %d", __FUNCTION__, pSCOSnd->playback.buffer_pos);
+
+    source = runtime->dma_area + pSCOSnd->playback.buffer_pos * frame_bytes;
+
+    if (pSCOSnd->playback.buffer_pos + period_size <= runtime->buffer_size) {
+      memcpy(buffer, source, period_size * frame_bytes);
+    } else {
+      /* wrap around at end of ring buffer */
+      frames1 = runtime->buffer_size - pSCOSnd->playback.buffer_pos;
+      memcpy(buffer, source, frames1 * frame_bytes);
+      memcpy(&buffer[frames1 * frame_bytes],
+             runtime->dma_area, (period_size - frames1) * frame_bytes);
+    }
+
+    pSCOSnd->playback.buffer_pos += period_size;
+    if ( pSCOSnd->playback.buffer_pos >= runtime->buffer_size)
+       pSCOSnd->playback.buffer_pos -= runtime->buffer_size;
+
+    for(i = 0; i < count; i++) {
+        *((__u16 *)(skb->data + i * (sco_packet_bytes + HCI_SCO_HDR_SIZE))) = pSCOSnd->usb_data->sco_handle;
+        *((__u8 *)(skb->data + i*(sco_packet_bytes + HCI_SCO_HDR_SIZE) + 2)) = sco_packet_bytes;
+        memcpy((skb->data + i * (sco_packet_bytes + HCI_SCO_HDR_SIZE) + HCI_SCO_HDR_SIZE),
+          &buffer[sco_packet_bytes * i], sco_packet_bytes);
+    }
+
+    if(test_bit(ALSA_PLAYBACK_RUNNING, &pSCOSnd->states)) {
+        snd_pcm_period_elapsed(pSCOSnd->playback.substream);
+    }
+    snd_send_sco_frame(skb);
+    return true;
+}
+
+static void btusb_isoc_snd_tx_complete(struct urb *urb)
+{
+    struct sk_buff *skb = urb->context;
+    struct hci_dev *hdev = (struct hci_dev *) skb->dev;
+    struct btusb_data *data = GET_DRV_DATA(hdev);
+    RTK_sco_card_t  *pSCOSnd = data->pSCOSnd;
+
+    RTKBT_DBG("%s: status %d count %d",
+            __func__,urb->status, urb->actual_length);
+
+    if (skb && hdev) {
+        if (!test_bit(HCI_RUNNING, &hdev->flags))
+            goto done;
+
+        if (!urb->status)
+            hdev->stat.byte_tx += urb->transfer_buffer_length;
+        else
+            hdev->stat.err_tx++;
+    } else
+        RTKBT_ERR("%s: skb 0x%p hdev 0x%p", __func__, skb, hdev);
+
+done:
+    kfree(urb->setup_packet);
+    kfree_skb(skb);
+    if(test_bit(ALSA_PLAYBACK_RUNNING, &pSCOSnd->states)){
+        snd_copy_send_sco_data(pSCOSnd);
+        //schedule_work(&pSCOSnd->send_sco_work);
+    }
+}
+
+static void playback_work(struct work_struct *work)
+{
+    RTK_sco_card_t *pSCOSnd = container_of(work, RTK_sco_card_t, send_sco_work);
+
+    snd_copy_send_sco_data(pSCOSnd);
+}
+
+#endif
 
 static int btusb_send_frame(struct sk_buff *skb)
 {
@@ -3098,7 +3384,7 @@ static int btusb_send_frame(struct sk_buff *skb)
 
     case HCI_SCODATA_PKT:
         print_sco(skb, 1);
-        if (!data->isoc_tx_ep || SCO_NUM < 1) {
+        if (!data->isoc_tx_ep || hdev->conn_hash.sco_num < 1) {
             kfree(skb);
             return -ENODEV;
         }
@@ -3178,8 +3464,10 @@ static void btusb_notify(struct hci_dev *hdev, unsigned int evt)
 
     RTKBT_DBG("%s: name %s, evt %d", __func__, hdev->name, evt);
 
-    if (SCO_NUM != data->sco_num) {
-        data->sco_num = SCO_NUM;
+    RTKBT_INFO("%s: hdev->conn_hash.sco_num= %d, data->sco_num = %d", __func__, hdev->conn_hash.sco_num,
+      data->sco_num);
+    if (hdev->conn_hash.sco_num != data->sco_num) {
+        data->sco_num = hdev->conn_hash.sco_num;
         schedule_work(&data->work);
     }
 }
@@ -3228,10 +3516,23 @@ static inline int set_isoc_interface(struct hci_dev *hdev, int altsetting)
     return 0;
 }
 
+static int check_controller_support_msbc( struct usb_device *udev)
+{
+    //fix this in the future,when new card support msbc decode and encode
+    RTKBT_INFO("%s:pid = 0x%02x, vid = 0x%02x",__func__,udev->descriptor.idProduct, udev->descriptor.idVendor);
+    switch (udev->descriptor.idProduct) {
+
+        default:
+          return 0;
+    }
+    return 0;
+}
+
 static void btusb_work(struct work_struct *work)
 {
     struct btusb_data *data = container_of(work, struct btusb_data, work);
     struct hci_dev *hdev = data->hdev;
+
     int err;
     int new_alts;
     if (data->sco_num > 0) {
@@ -3246,18 +3547,28 @@ static void btusb_work(struct work_struct *work)
 
             set_bit(BTUSB_DID_ISO_RESUME, &data->flags);
         }
-#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 7, 1)
-        if (hdev->voice_setting & 0x0020) {
-            static const int alts[3] = { 2, 4, 5 };
-            new_alts = alts[data->sco_num - 1];
+
+        RTKBT_INFO("%s voice settings = 0x%04x", __func__, hdev->voice_setting);
+        if (!(hdev->voice_setting & 0x0003)) {
+            if(data->sco_num == 1)
+                new_alts = 2;
+            else {
+              RTKBT_ERR("%s: we don't support mutiple sco link for cvsd", __func__);
+              return;
+            }
         } else{
-            new_alts = data->sco_num;
+            if(check_controller_support_msbc(data->udev)) {
+                if(data->sco_num == 1)
+                    new_alts = 4;
+                else {
+                    RTKBT_ERR("%s: we don't support mutiple sco link for msbc", __func__);
+                    return;
+                }
+            } else {
+                new_alts = 2;
+            }
         }
         if (data->isoc_altsetting != new_alts) {
-#else
-        if (data->isoc_altsetting != 2) {
-            new_alts = 2;
-#endif
 
             clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
             mdelay(URB_CANCELING_DELAY_MS);
@@ -3273,8 +3584,18 @@ static void btusb_work(struct work_struct *work)
             else
                 btusb_submit_isoc_urb(hdev, GFP_KERNEL);
         }
+#ifdef CONFIG_SCO_OVER_HCI
+        if(test_bit(BTUSB_ISOC_RUNNING, &data->flags)) {
+            set_bit(USB_CAPTURE_RUNNING, &data->pSCOSnd->states);
+            set_bit(USB_PLAYBACK_RUNNING, &data->pSCOSnd->states);
+        }
+#endif
     } else {
         clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
+#ifdef CONFIG_SCO_OVER_HCI
+        clear_bit(USB_CAPTURE_RUNNING, &data->pSCOSnd->states);
+        clear_bit(USB_PLAYBACK_RUNNING, &data->pSCOSnd->states);
+#endif
         mdelay(URB_CANCELING_DELAY_MS);
         usb_kill_anchored_urbs(&data->isoc_anchor);
 
@@ -3452,6 +3773,337 @@ int bt_reboot_notify(struct notifier_block *notifier, ulong pm_event, void *unus
 
 #endif
 
+#ifdef CONFIG_SCO_OVER_HCI
+static const struct snd_pcm_hardware snd_card_sco_capture_default =
+{
+    .info               = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_NONINTERLEAVED |
+                            SNDRV_PCM_ACCESS_RW_INTERLEAVED | SNDRV_PCM_INFO_FIFO_IN_FRAMES),
+    .formats            = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
+    .rates              = (SNDRV_PCM_RATE_8000),
+    .rate_min           = 8000,
+    .rate_max           = 8000,
+    .channels_min       = 1,
+    .channels_max       = 1,
+    .buffer_bytes_max   = 8 * 768,
+    .period_bytes_min   = 48,
+    .period_bytes_max   = 768,
+    .periods_min        = 1,
+    .periods_max        = 8,
+    .fifo_size          = 8,
+
+};
+
+static int snd_sco_capture_pcm_open(struct snd_pcm_substream * substream)
+{
+    RTK_sco_card_t  *pSCOSnd = substream->private_data;
+
+    RTKBT_INFO("%s", __FUNCTION__);
+    pSCOSnd->capture.substream = substream;
+
+    memcpy(&substream->runtime->hw, &snd_card_sco_capture_default, sizeof(struct snd_pcm_hardware));
+
+    if(check_controller_support_msbc(pSCOSnd->dev)) {
+        substream->runtime->hw.rates |= SNDRV_PCM_RATE_16000;
+        substream->runtime->hw.rate_max = 16000;
+        substream->runtime->hw.period_bytes_min = 96;
+        substream->runtime->hw.period_bytes_max = 16 * 96;
+        substream->runtime->hw.buffer_bytes_max = 8 * 16 * 96;
+    }
+    set_bit(ALSA_CAPTURE_OPEN, &pSCOSnd->states);
+    return 0;
+}
+
+static int snd_sco_capture_pcm_close(struct snd_pcm_substream *substream)
+{
+	RTK_sco_card_t *pSCOSnd = substream->private_data;
+
+	clear_bit(ALSA_CAPTURE_OPEN, &pSCOSnd->states);
+	return 0;
+}
+
+static int snd_sco_capture_ioctl(struct snd_pcm_substream *substream,  unsigned int cmd, void *arg)
+{
+    RTKBT_DBG("%s, cmd = %d", __FUNCTION__, cmd);
+    switch (cmd)
+    {
+        default:
+            return snd_pcm_lib_ioctl(substream, cmd, arg);
+    }
+    return 0;
+}
+
+static int snd_sco_capture_pcm_hw_params(struct snd_pcm_substream * substream, struct snd_pcm_hw_params * hw_params)
+{
+
+    int err;
+    struct snd_pcm_runtime *runtime = substream->runtime;
+    err = snd_pcm_lib_alloc_vmalloc_buffer(substream, params_buffer_bytes(hw_params));
+    RTKBT_INFO("%s,err : %d,  runtime state : %d", __FUNCTION__, err, runtime->status->state);
+    return err;
+}
+
+static int snd_sco_capture_pcm_hw_free(struct snd_pcm_substream * substream)
+{
+    RTKBT_DBG("%s", __FUNCTION__);
+    return snd_pcm_lib_free_vmalloc_buffer(substream);;
+}
+
+static int snd_sco_capture_pcm_prepare(struct snd_pcm_substream *substream)
+{
+    RTK_sco_card_t *pSCOSnd = substream->private_data;
+    struct snd_pcm_runtime *runtime = substream->runtime;
+
+    RTKBT_INFO("%s", __FUNCTION__);
+    if (test_bit(DISCONNECTED, &pSCOSnd->states))
+		    return -ENODEV;
+	  if (!test_bit(USB_CAPTURE_RUNNING, &pSCOSnd->states))
+		    return -EIO;
+
+    if(runtime->rate == 8000) {
+        if(pSCOSnd->usb_data->isoc_altsetting != 2)
+            return -ENOEXEC;
+        pSCOSnd->capture.sco_packet_bytes = 48;
+    }
+    else if(runtime->rate == 16000 && check_controller_support_msbc(pSCOSnd->dev)) {
+        if(pSCOSnd->usb_data->isoc_altsetting != 4)
+            return -ENOEXEC;
+        pSCOSnd->capture.sco_packet_bytes = 96;
+    }
+    else if(pSCOSnd->usb_data->isoc_altsetting == 2) {
+        pSCOSnd->capture.sco_packet_bytes = 48;
+    }
+    else if(pSCOSnd->usb_data->isoc_altsetting == 1) {
+        pSCOSnd->capture.sco_packet_bytes = 24;
+    }
+    return 0;
+}
+
+static int snd_sco_capture_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+	  RTK_sco_card_t *pSCOSnd = substream->private_data;
+    RTKBT_INFO("%s, cmd : %d", __FUNCTION__, cmd);
+
+	  switch (cmd) {
+	    case SNDRV_PCM_TRIGGER_START:
+		      if (!test_bit(USB_CAPTURE_RUNNING, &pSCOSnd->states))
+			      return -EIO;
+		      set_bit(ALSA_CAPTURE_RUNNING, &pSCOSnd->states);
+		      return 0;
+	    case SNDRV_PCM_TRIGGER_STOP:
+		      clear_bit(ALSA_CAPTURE_RUNNING, &pSCOSnd->states);
+		      return 0;
+	    default:
+		      return -EINVAL;
+	  }
+}
+
+static snd_pcm_uframes_t snd_sco_capture_pcm_pointer(struct snd_pcm_substream *substream)
+{
+	  RTK_sco_card_t *pSCOSnd = substream->private_data;
+
+	  return pSCOSnd->capture.buffer_pos;
+}
+
+
+static struct snd_pcm_ops snd_sco_capture_pcm_ops = {
+	.open =         snd_sco_capture_pcm_open,
+	.close =        snd_sco_capture_pcm_close,
+	.ioctl =        snd_sco_capture_ioctl,
+	.hw_params =    snd_sco_capture_pcm_hw_params,
+	.hw_free =      snd_sco_capture_pcm_hw_free,
+	.prepare =      snd_sco_capture_pcm_prepare,
+	.trigger =      snd_sco_capture_pcm_trigger,
+	.pointer =      snd_sco_capture_pcm_pointer,
+};
+
+
+static const struct snd_pcm_hardware snd_card_sco_playback_default =
+{
+    .info               = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_NONINTERLEAVED |
+                            SNDRV_PCM_ACCESS_RW_INTERLEAVED | SNDRV_PCM_INFO_FIFO_IN_FRAMES),
+    .formats            = SNDRV_PCM_FMTBIT_S16_LE,
+    .rates              = (SNDRV_PCM_RATE_8000),
+    .rate_min           = 8000,
+    .rate_max           = 8000,
+    .channels_min       = 1,
+    .channels_max       = 1,
+    .buffer_bytes_max   = 8 * 768,
+    .period_bytes_min   = 48,
+    .period_bytes_max   = 768,
+    .periods_min        = 1,
+    .periods_max        = 8,
+    .fifo_size          = 8,
+};
+
+static int snd_sco_playback_pcm_open(struct snd_pcm_substream * substream)
+{
+    RTK_sco_card_t *pSCOSnd = substream->private_data;
+    int err = 0;
+
+    RTKBT_INFO("%s, rate : %d", __FUNCTION__, substream->runtime->rate);
+    memcpy(&substream->runtime->hw, &snd_card_sco_playback_default, sizeof(struct snd_pcm_hardware));
+    if(check_controller_support_msbc(pSCOSnd->dev)) {
+        substream->runtime->hw.rates |= SNDRV_PCM_RATE_16000;
+        substream->runtime->hw.rate_max = 16000;
+        substream->runtime->hw.period_bytes_min = 96;
+        substream->runtime->hw.period_bytes_max = 16 * 96;
+        substream->runtime->hw.buffer_bytes_max = 8 * 16 * 96;
+    }
+    pSCOSnd->playback.substream = substream;
+    set_bit(ALSA_PLAYBACK_OPEN, &pSCOSnd->states);
+
+    return err;
+}
+
+static int snd_sco_playback_pcm_close(struct snd_pcm_substream *substream)
+{
+    RTK_sco_card_t *pSCOSnd = substream->private_data;
+
+	  clear_bit(ALSA_PLAYBACK_OPEN, &pSCOSnd->states);
+    cancel_work_sync(&pSCOSnd->send_sco_work);
+	  return 0;
+}
+
+static int snd_sco_playback_ioctl(struct snd_pcm_substream *substream,  unsigned int cmd, void *arg)
+{
+    RTKBT_DBG("%s, cmd : %d", __FUNCTION__, cmd);
+    switch (cmd)
+    {
+        default:
+            return snd_pcm_lib_ioctl(substream, cmd, arg);
+            break;
+    }
+    return 0;
+}
+
+static int snd_sco_playback_pcm_hw_params(struct snd_pcm_substream * substream, struct snd_pcm_hw_params * hw_params)
+{
+    int err;
+    err = snd_pcm_lib_alloc_vmalloc_buffer(substream, params_buffer_bytes(hw_params));
+    return err;
+}
+
+static int snd_sco_palyback_pcm_hw_free(struct snd_pcm_substream * substream)
+{
+    RTKBT_DBG("%s", __FUNCTION__);
+    return snd_pcm_lib_free_vmalloc_buffer(substream);
+}
+
+static int snd_sco_playback_pcm_prepare(struct snd_pcm_substream *substream)
+{
+	  RTK_sco_card_t *pSCOSnd = substream->private_data;
+    struct snd_pcm_runtime *runtime = substream->runtime;
+
+    RTKBT_INFO("%s, bound_rate = %d", __FUNCTION__, runtime->rate);
+
+	  if (test_bit(DISCONNECTED, &pSCOSnd->states))
+		    return -ENODEV;
+	  if (!test_bit(USB_PLAYBACK_RUNNING, &pSCOSnd->states))
+		    return -EIO;
+
+    if(runtime->rate == 8000) {
+        if(pSCOSnd->usb_data->isoc_altsetting != 2)
+            return -ENOEXEC;
+        pSCOSnd->playback.sco_packet_bytes = 48;
+    }
+    else if(runtime->rate == 16000) {
+        if(pSCOSnd->usb_data->isoc_altsetting != 4)
+            return -ENOEXEC;
+        pSCOSnd->playback.sco_packet_bytes = 96;
+    }
+
+  	return 0;
+}
+
+static int snd_sco_playback_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+  	RTK_sco_card_t *pSCOSnd = substream->private_data;
+
+    RTKBT_INFO("%s, cmd = %d", __FUNCTION__, cmd);
+  	switch (cmd) {
+      	case SNDRV_PCM_TRIGGER_START:
+      		if (!test_bit(USB_PLAYBACK_RUNNING, &pSCOSnd->states))
+      			return -EIO;
+      		set_bit(ALSA_PLAYBACK_RUNNING, &pSCOSnd->states);
+          schedule_work(&pSCOSnd->send_sco_work);
+      		return 0;
+      	case SNDRV_PCM_TRIGGER_STOP:
+      		clear_bit(ALSA_PLAYBACK_RUNNING, &pSCOSnd->states);
+      		return 0;
+      	default:
+      		return -EINVAL;
+  	}
+}
+
+static snd_pcm_uframes_t snd_sco_playback_pcm_pointer(struct snd_pcm_substream *substream)
+{
+  	RTK_sco_card_t *pSCOSnd = substream->private_data;
+
+  	return pSCOSnd->playback.buffer_pos;
+}
+
+
+static struct snd_pcm_ops snd_sco_playback_pcm_ops = {
+	.open =         snd_sco_playback_pcm_open,
+	.close =        snd_sco_playback_pcm_close,
+	.ioctl =        snd_sco_playback_ioctl,
+	.hw_params =    snd_sco_playback_pcm_hw_params,
+	.hw_free =      snd_sco_palyback_pcm_hw_free,
+	.prepare =      snd_sco_playback_pcm_prepare,
+	.trigger =      snd_sco_playback_pcm_trigger,
+	.pointer =      snd_sco_playback_pcm_pointer,
+};
+
+
+static RTK_sco_card_t* btusb_snd_init(struct usb_interface *intf, const struct usb_device_id *id, struct btusb_data *data)
+{
+    struct snd_card *card;
+    RTK_sco_card_t  *pSCOSnd;
+    int err=0;
+    RTKBT_INFO("%s", __func__);
+    err = snd_card_new(&intf->dev,
+     -1, RTK_SCO_ID, THIS_MODULE,
+     sizeof(RTK_sco_card_t), &card);
+    if (err < 0) {
+        RTKBT_ERR("%s: sco snd card create fail", __func__);
+        return NULL;
+    }
+    // private data
+    pSCOSnd = (RTK_sco_card_t *)card->private_data;
+    pSCOSnd->card = card;
+    pSCOSnd->dev = interface_to_usbdev(intf);
+    pSCOSnd->usb_data = data;
+
+    strcpy(card->driver, RTK_SCO_ID);
+    strcpy(card->shortname, "Realtek sco snd");
+    sprintf(card->longname, "Realtek sco over hci: VID:0x%04x, PID:0x%04x",
+        id->idVendor, pSCOSnd->dev->descriptor.idProduct);
+
+    err = snd_pcm_new(card, RTK_SCO_ID, 0, 1, 1, &pSCOSnd->pcm);
+    if (err < 0) {
+        RTKBT_ERR("%s: sco snd card new pcm fail", __func__);
+        return NULL;
+    }
+    pSCOSnd->pcm->private_data = pSCOSnd;
+    sprintf(pSCOSnd->pcm->name, "sco_pcm:VID:0x%04x, PID:0x%04x",
+      id->idVendor, pSCOSnd->dev->descriptor.idProduct);
+
+    snd_pcm_set_ops(pSCOSnd->pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sco_playback_pcm_ops);
+    snd_pcm_set_ops(pSCOSnd->pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sco_capture_pcm_ops);
+
+    err = snd_card_register(card);
+    if (err < 0) {
+        RTKBT_ERR("%s: sco snd card register card fail", __func__);
+        return NULL;
+    }
+
+    spin_lock_init(&pSCOSnd->capture_lock);
+    spin_lock_init(&pSCOSnd->playback_lock);
+    INIT_WORK(&pSCOSnd->send_sco_work, playback_work);
+    return pSCOSnd;
+}
+#endif
+
 static int btusb_probe(struct usb_interface *intf, const struct usb_device_id *id)
 {
     struct usb_device *udev = interface_to_usbdev(intf);
@@ -3530,20 +4182,6 @@ static int btusb_probe(struct usb_interface *intf, const struct usb_device_id *i
         goto end;
     }
 
-    RTKBT_INFO("%s: download begining...", __func__);
-
-#if CONFIG_BLUEDROID
-    mutex_lock(&btchr_mutex);
-#endif
-
-
-
-#if CONFIG_BLUEDROID
-    mutex_unlock(&btchr_mutex);
-#endif
-
-    RTKBT_INFO("%s: download ending...", __func__);
-
     hdev = hci_alloc_dev();
     if (!hdev) {
         rtk_free(data);
@@ -3590,6 +4228,9 @@ static int btusb_probe(struct usb_interface *intf, const struct usb_device_id *i
             data = NULL;
             return err;
         }
+#ifdef CONFIG_SCO_OVER_HCI
+        data->pSCOSnd = btusb_snd_init(intf, id, data);
+#endif
     }
 
     err = hci_register_dev(hdev);
@@ -3638,6 +4279,9 @@ static void btusb_disconnect(struct usb_interface *intf)
     struct btusb_data *data;
     struct hci_dev *hdev = NULL;
 
+    if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
+        return;
+
     wait_event_interruptible(bt_dlfw_wait, (check_set_dlfw_state_value(2) == 2));
 
     RTKBT_INFO("%s: usb_interface %p, bInterfaceNumber %d",
@@ -3645,9 +4289,6 @@ static void btusb_disconnect(struct usb_interface *intf)
 
     data = usb_get_intfdata(intf);
 
-    if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
-        return;
-
     if (data)
         hdev = data->hdev;
     else {
@@ -3655,6 +4296,19 @@ static void btusb_disconnect(struct usb_interface *intf)
         return;
     }
 
+#ifdef CONFIG_SCO_OVER_HCI
+    if (intf->cur_altsetting->desc.bInterfaceNumber == 0) {
+        RTK_sco_card_t *pSCOSnd = data->pSCOSnd;
+        if(!pSCOSnd) {
+            RTKBT_ERR("%s: sco private data is null", __func__);
+            return;
+        }
+        set_bit(DISCONNECTED, &pSCOSnd->states);
+        snd_card_disconnect(pSCOSnd->card);
+        snd_card_free_when_closed(pSCOSnd->card);
+    }
+#endif
+
 //#ifdef CONFIG_HAS_EARLYSUSPEND
 #if 0
     unregister_early_suspend(&data->early_suspend);
@@ -3868,7 +4522,7 @@ static int __init btusb_init(void)
         /* usb register will go on, even bt char register failed */
         RTKBT_ERR("Failed to register usb char device interfaces");
     } else
-        bt_char_dev_registered = 1;
+        bt_char_dev_registered = true;
 #endif
     err = usb_register(&btusb_driver);
     if (err < 0)
@@ -3878,10 +4532,19 @@ static int __init btusb_init(void)
 
 static void __exit btusb_exit(void)
 {
+    struct hci_dev *hdev;
     RTKBT_INFO("Realtek Bluetooth USB driver module exit");
 #if CONFIG_BLUEDROID
-    if (bt_char_dev_registered > 0)
+    hdev = hci_dev_get(0);
+    if (bt_char_dev_registered) {
+        bt_char_dev_registered = false;
+        while(hdev && atomic_read(&hdev->promisc)) {
+            RTKBT_ERR("%s: rtkbt driver is being removed, but application is still running!", __func__);
+            RTKBT_ERR("%s: wait bt application to stop, or the driver can't be removed", __func__);
+            mdelay(100);
+        }
         btchr_exit();
+    }
 #endif
     usb_deregister(&btusb_driver);
 }
diff --git a/drivers/bluetooth/rtk_btusb.h b/drivers/bluetooth/rtk_btusb.h
old mode 100755
new mode 100644
index 47fb3d5edbd4f..7f6222ebba594
--- a/drivers/bluetooth/rtk_btusb.h
+++ b/drivers/bluetooth/rtk_btusb.h
@@ -36,8 +36,45 @@
 #include <linux/suspend.h>
 
 #define CONFIG_BLUEDROID        1 /* bleuz 0, bluedroid 1 */
+//#define CONFIG_SCO_OVER_HCI
 
+#ifdef CONFIG_SCO_OVER_HCI
+#include <linux/usb/audio.h>
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
 
+#define RTK_SCO_ID "snd_sco_rtk"
+enum {
+	USB_CAPTURE_RUNNING,
+	USB_PLAYBACK_RUNNING,
+	ALSA_CAPTURE_OPEN,
+	ALSA_PLAYBACK_OPEN,
+	ALSA_CAPTURE_RUNNING,
+	ALSA_PLAYBACK_RUNNING,
+	CAPTURE_URB_COMPLETED,
+	PLAYBACK_URB_COMPLETED,
+	DISCONNECTED,
+};
+
+// RTK sound card
+typedef struct RTK_sco_card {
+    struct snd_card *card;
+    struct snd_pcm *pcm;
+    struct usb_device *dev;
+    struct btusb_data *usb_data;
+    unsigned long states;
+    struct rtk_sco_stream {
+		    struct snd_pcm_substream *substream;
+		    unsigned int sco_packet_bytes;
+		    snd_pcm_uframes_t buffer_pos;
+	  } capture, playback;
+    spinlock_t capture_lock;
+    spinlock_t playback_lock;
+    struct work_struct send_sco_work;
+} RTK_sco_card_t;
+#endif
 /* Some Android system may use standard Linux kernel, while
  * standard Linux may also implement early suspend feature.
  * So exclude earysuspend.h from CONFIG_BLUEDROID.
@@ -96,12 +133,9 @@
 #define GET_DRV_DATA(x)        x->driver_data
 #endif
 
-#define SCO_NUM    hdev->conn_hash.sco_num
-
-
 #define BTUSB_RPM        (0 * USB_RPM) /* 1 SS enable; 0 SS disable */
 #define BTUSB_WAKEUP_HOST        0    /* 1  enable; 0  disable */
-#define BTUSB_MAX_ISOC_FRAMES    10
+#define BTUSB_MAX_ISOC_FRAMES    48
 #define BTUSB_INTR_RUNNING        0
 #define BTUSB_BULK_RUNNING        1
 #define BTUSB_ISOC_RUNNING        2
@@ -445,9 +479,7 @@ struct hci_dev {
 #if LINUX_VERSION_CODE <= KERNEL_VERSION(3, 4, 0)
     void (*destruct)(struct hci_dev *hdev);
 #endif
-#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 7, 1)
     __u16               voice_setting;
-#endif
     void (*notify)(struct hci_dev *hdev, unsigned int evt);
     int (*ioctl)(struct hci_dev *hdev, unsigned int cmd, unsigned long arg);
 };
@@ -630,7 +662,11 @@ typedef struct {
 
 //Define ioctl cmd the same as HCIDEVUP in the kernel
 #define DOWN_FW_CFG  _IOW('H', 201, int)
-
+#ifdef CONFIG_SCO_OVER_HCI
+#define SET_ISO_CFG  _IOW('H', 202, int)
+#endif
+#define GET_USB_INFO            _IOW('H', 203, int)
+#define RESET_CONTROLLER        _IOW('H', 204, int)
 
 /*  for altsettings*/
 #include <linux/fs.h>
@@ -643,6 +679,7 @@ static inline int getmacaddr(uint8_t * vnd_local_bd_addr)
     mm_segment_t oldfs;
     char buf[FACTORY_BT_BDADDR_STORAGE_LEN];
     int32_t i = 0;
+    int ret = -1;
     memset(buf, 0, FACTORY_BT_BDADDR_STORAGE_LEN);
     bdaddr_file = filp_open(BDADDR_FILE, O_RDONLY, 0);
     if (IS_ERR(bdaddr_file)){
@@ -651,25 +688,29 @@ static inline int getmacaddr(uint8_t * vnd_local_bd_addr)
     }
     oldfs = get_fs(); set_fs(KERNEL_DS);
     bdaddr_file->f_op->llseek(bdaddr_file, 0, 0);
-    bdaddr_file->f_op->read(bdaddr_file, buf, FACTORY_BT_BDADDR_STORAGE_LEN, &bdaddr_file->f_pos);
-    for (i = 0; i < 6; i++) {
-     if(buf[3*i]>'9')
-     {
-         if(buf[3*i]>'Z')
-              buf[3*i] -=('a'-'A'); //change  a to A
-         buf[3*i] -= ('A'-'9'-1);
-     }
-     if(buf[3*i+1]>'9')
-     {
-        if(buf[3*i+1]>'Z')
-              buf[3*i+1] -=('a'-'A'); //change  a to A
-         buf[3*i+1] -= ('A'-'9'-1);
-     }
-     vnd_local_bd_addr[5-i] = ((uint8_t)buf[3*i]-'0')*16 + ((uint8_t)buf[3*i+1]-'0');
-    }
+    ret = vfs_read(bdaddr_file, buf, FACTORY_BT_BDADDR_STORAGE_LEN, &bdaddr_file->f_pos);
     set_fs(oldfs);
     filp_close(bdaddr_file, NULL);
-    return 0;
+    if(ret == FACTORY_BT_BDADDR_STORAGE_LEN)
+    {
+        for (i = 0; i < 6; i++) {
+            if(buf[3*i]>'9')
+            {
+                if(buf[3*i]>'Z')
+                    buf[3*i] -=('a'-'A'); //change  a to A
+                buf[3*i] -= ('A'-'9'-1);
+            }
+            if(buf[3*i+1]>'9')
+            {
+                if(buf[3*i+1]>'Z')
+                    buf[3*i+1] -=('a'-'A'); //change  a to A
+                buf[3*i+1] -= ('A'-'9'-1);
+            }
+            vnd_local_bd_addr[5-i] = ((uint8_t)buf[3*i]-'0')*16 + ((uint8_t)buf[3*i+1]-'0');
+        }
+        return 0;
+    }
+    return -1;
 }
 
 static inline int getAltSettings(patch_info *patch_entry, unsigned short *offset, int max_group_cnt)

From fca2fee17471b62e26c7aca927159d40d5a3254e Mon Sep 17 00:00:00 2001
From: Binyuan Lan <lby@rock-chips.com>
Date: Tue, 11 Sep 2018 23:40:43 +0800
Subject: [PATCH 1819/1852] ASoC: rockchip: rk817-codec: optimize the reset
 operation

Solve the problem of small recording amplitude in the first recording.

Change-Id: I268f56b1a2c5a16da958952fe06ce11ada1cf932
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
---
 sound/soc/codecs/rk817_codec.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/codecs/rk817_codec.c b/sound/soc/codecs/rk817_codec.c
index 82e6c56c12282..e3cbe7eeed24e 100644
--- a/sound/soc/codecs/rk817_codec.c
+++ b/sound/soc/codecs/rk817_codec.c
@@ -251,6 +251,14 @@ static int rk817_reset(struct snd_soc_codec *codec)
 {
 	snd_soc_write(codec, RK817_CODEC_DTOP_LPT_SRST, 0x40);
 	snd_soc_write(codec, RK817_CODEC_DDAC_POPD_DACST, 0x02);
+	snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG0, 0x04);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG1, 0x58);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG2, 0x2d);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG3, 0x0c);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG4, 0xa5);
+	snd_soc_write(codec, RK817_CODEC_APLL_CFG5, 0x00);
+	snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00);
 
 	return 0;
 }

From ec7a9efda1fde967ba58ca69c35f68251f8e77e3 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Wed, 1 Aug 2018 09:16:34 +0800
Subject: [PATCH 1820/1852] media: rk-isp10: fix fmt select

if enumerate all the sensor fmt, don't find matching format
then should be forced to using the last one.

Change-Id: I15949ed66f583019a522ee56844e57813c6f6e49
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index 507c954cc81be..de2539e6d78df 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -1215,7 +1215,7 @@ static int cif_isp10_img_src_select_strm_fmt(
 				matching_format_found = true;
 			}
 		// FIXME::GST set fomat(any@32768x32768) failed, force pass
-		} else {
+		} else if (!matching_format_found) {
 			request_strm_fmt.frm_fmt.width =
 				strm_fmt_desc.min_frmsize.width;
 			request_strm_fmt.frm_fmt.height =

From 5efc729a0d5c7761340c8aa42ad8c52393ed7fda Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 6 Sep 2018 15:12:07 +0800
Subject: [PATCH 1821/1852] media: rk-isp10: MP/SP burst config with resolution

memory base addresses are burst aligned with respect
to the configured burst length. configure different
burst length with different resolution.

Change-Id: I611768ab699a7204a26899bb10c0cdcd6beeb820
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rk-isp10/cif_isp10.c | 61 ++++++++++++++++++++-
 drivers/media/platform/rk-isp10/cif_isp10.h |  1 +
 2 files changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rk-isp10/cif_isp10.c b/drivers/media/platform/rk-isp10/cif_isp10.c
index de2539e6d78df..35da325410299 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.c
+++ b/drivers/media/platform/rk-isp10/cif_isp10.c
@@ -2095,6 +2095,33 @@ static int cif_isp10_config_mipi(
 	return ret;
 }
 
+static u32 calc_burst_len(struct cif_isp10_mi_path_config *config)
+{
+	u32 cb_offs = config->cb_offs;
+	u32 cr_offs = config->cr_offs;
+	u32 burst;
+
+	/* MI64bit Y/C base addr should be burstN * 8 aligned */
+	if (!(cb_offs % 128) && !(cr_offs % 128))
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
+	else if (!(cb_offs % 64) && !(cr_offs % 64))
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_8 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_8;
+	else
+		burst = CIF_MI_CTRL_BURST_LEN_LUM_4 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_4;
+
+	if (cb_offs % 32 || cr_offs % 32)
+		cif_isp10_pltfrm_pr_warn(dev->dev,
+			"%s %dx%d not support, should be %d aligned\n",
+			cif_isp10_pix_fmt_string(config->output.pix_fmt),
+			config->output.width,
+			config->output.height,
+			(cb_offs == cr_offs) ? 32 : 128);
+	return burst;
+}
+
 static int cif_isp10_config_mi_mp(
 	struct cif_isp10_device *dev)
 {
@@ -2111,6 +2138,7 @@ static int cif_isp10_config_mi_mp(
 	u32 bpp = CIF_ISP10_PIX_FMT_GET_BPP(out_pix_fmt);
 	u32 size = llength * height * bpp / 8;
 	u32 mi_ctrl;
+	u32 burst_len;
 
 	dev->config.mi_config.mp.input =
 		&dev->config.mp_config.rsz_config.output;
@@ -2125,6 +2153,8 @@ static int cif_isp10_config_mi_mp(
 	dev->config.mi_config.mp.y_size = size;
 	dev->config.mi_config.mp.cb_size = 0;
 	dev->config.mi_config.mp.cr_size = 0;
+	burst_len = CIF_MI_CTRL_BURST_LEN_LUM_16 |
+		CIF_MI_CTRL_BURST_LEN_CHROM_16;
 	if (CIF_ISP10_PIX_FMT_IS_YUV(out_pix_fmt)) {
 		u32 num_cplanes =
 			CIF_ISP10_PIX_FMT_YUV_GET_NUM_CPLANES(out_pix_fmt);
@@ -2174,6 +2204,7 @@ static int cif_isp10_config_mi_mp(
 					dev->config.mi_config.mp.cb_size;
 			}
 		}
+		burst_len = calc_burst_len(&dev->config.mi_config.mp);
 	} else if (CIF_ISP10_PIX_FMT_IS_RAW_BAYER(out_pix_fmt)) {
 		if (CIF_ISP10_PIX_FMT_GET_BPP(out_pix_fmt) > 8) {
 			writeformat = CIF_ISP10_BUFF_FMT_RAW12;
@@ -2209,11 +2240,16 @@ static int cif_isp10_config_mi_mp(
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
+	/* check MP/SP burst config */
+	dev->config.mi_config.mp.burst_len = burst_len;
+	burst_len = (dev->config.mi_config.sp.burst_len >
+		dev->config.mi_config.mp.burst_len) ?
+		dev->config.mi_config.mp.burst_len :
+		dev->config.mi_config.sp.burst_len;
 	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL);
 	mi_ctrl &= ~(CIF_MI_CTRL_MP_WRITE_FMT(3));
 	mi_ctrl |= CIF_MI_CTRL_MP_WRITE_FMT(writeformat) |
-		   CIF_MI_CTRL_BURST_LEN_LUM_16 |
-		   CIF_MI_CTRL_BURST_LEN_CHROM_16 |
+		   burst_len |
 		   CIF_MI_CTRL_INIT_BASE_EN |
 		   CIF_MI_CTRL_INIT_OFFSET_EN |
 		   CIF_MI_MP_AUTOUPDATE_ENABLE;
@@ -2429,6 +2465,10 @@ static int cif_isp10_config_mi_sp(
 		}
 	}
 
+	if (llength == width &&
+		CIF_ISP10_PIX_FMT_IS_YUV(out_pix_fmt))
+		burst_len = calc_burst_len(&dev->config.mi_config.sp);
+
 	cif_iowrite32_verify(dev->config.mi_config.sp.y_size,
 		dev->config.base_addr + CIF_MI_SP_Y_SIZE_INIT,
 		CIF_MI_ADDR_SIZE_ALIGN_MASK);
@@ -2459,6 +2499,11 @@ static int cif_isp10_config_mi_sp(
 			dev->config.base_addr + CIF_MI_XTD_FORMAT_CTRL);
 	}
 
+	dev->config.mi_config.sp.burst_len = burst_len;
+	burst_len = (dev->config.mi_config.sp.burst_len >
+		dev->config.mi_config.mp.burst_len) ?
+		dev->config.mi_config.mp.burst_len :
+		dev->config.mi_config.sp.burst_len;
 	mi_ctrl = cif_ioread32(dev->config.base_addr + CIF_MI_CTRL);
 	mi_ctrl &= ~(CIF_MI_CTRL_SP_WRITE_FMT(3) |/* SP_WRITE_FMT */
 		(0x7 << 28) |	/* SP_OUTPUT_FMT */
@@ -3510,6 +3555,9 @@ static void cif_isp10_init_stream(
 		dev->config.sp_config.rsz_config.ycflt_adjust = false;
 		dev->config.sp_config.rsz_config.ism_adjust = false;
 		dev->config.mi_config.sp.busy = false;
+		dev->config.mi_config.sp.burst_len =
+			CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
 		dev->sp_stream.updt_cfg = true;
 
 		ret = cif_isp10_img_src_select_strm_fmt(dev);
@@ -3545,6 +3593,9 @@ static void cif_isp10_init_stream(
 		dev->config.mp_config.rsz_config.ycflt_adjust = false;
 		dev->config.mp_config.rsz_config.ism_adjust = false;
 		dev->config.mi_config.mp.busy = false;
+		dev->config.mi_config.mp.burst_len =
+			CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
 		dev->mp_stream.updt_cfg = true;
 
 		ret = cif_isp10_img_src_select_strm_fmt(dev);
@@ -4713,6 +4764,9 @@ static void cif_isp10_stop_mi(
 			dev->config.base_addr + CIF_MI_ICR);
 		cif_iowrite32AND_verify(~CIF_MI_CTRL_SP_ENABLE,
 			dev->config.base_addr + CIF_MI_CTRL, ~0);
+		dev->config.mi_config.sp.burst_len =
+			CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
 	} else if (stop_mi_mp) {
 		cif_iowrite32(CIF_MI_MP_FRAME |
 			CIF_JPE_STATUS_ENCODE_DONE,
@@ -4721,6 +4775,9 @@ static void cif_isp10_stop_mi(
 			CIF_MI_CTRL_JPEG_ENABLE |
 			CIF_MI_CTRL_RAW_ENABLE),
 			dev->config.base_addr + CIF_MI_CTRL, ~0);
+		dev->config.mi_config.mp.burst_len =
+			CIF_MI_CTRL_BURST_LEN_LUM_16 |
+			CIF_MI_CTRL_BURST_LEN_CHROM_16;
 	}
 }
 
diff --git a/drivers/media/platform/rk-isp10/cif_isp10.h b/drivers/media/platform/rk-isp10/cif_isp10.h
index e34d1df007b10..f1265817991e2 100644
--- a/drivers/media/platform/rk-isp10/cif_isp10.h
+++ b/drivers/media/platform/rk-isp10/cif_isp10.h
@@ -438,6 +438,7 @@ struct cif_isp10_mi_path_config {
 	u32 y_size;
 	u32 cb_size;
 	u32 cr_size;
+	u32 burst_len;
 	bool busy;
 
 	/* FOR BT655: 0 = ODD, 1 = EVEN */

From 2dd3f06f7a61e43f58b16a9847d0a2c53536b2be Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Mon, 17 Sep 2018 09:22:36 +0800
Subject: [PATCH 1822/1852] ARM: rockchip_defconfig: update by savedefconfig

Change-Id: I82d85bd7252ad362f63b52fafb0826a59e921bc8
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index 4576e8568bc8e..a53624f30cdfd 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -709,7 +709,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=4096
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_TEE_SUPPORT=y
-CONFIG_CRYPTO_ECHAINIV=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_TWOFISH=y
 CONFIG_CRYPTO_ANSI_CPRNG=y

From a68af5cc0c95904c4dd4968a52e573d9bbe222f6 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Mon, 9 Jul 2018 20:52:21 +0800
Subject: [PATCH 1823/1852] media: i2c: add vm149c driver

Change-Id: Ifcb8027907be60807794e659316ad5211f51ff6d
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
---
 drivers/media/i2c/Kconfig       |   9 +
 drivers/media/i2c/Makefile      |   2 +
 drivers/media/i2c/rk_vcm_head.h |  39 +++
 drivers/media/i2c/vm149c.c      | 545 ++++++++++++++++++++++++++++++++
 4 files changed, 595 insertions(+)
 create mode 100644 drivers/media/i2c/rk_vcm_head.h
 create mode 100644 drivers/media/i2c/vm149c.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 351b6ed162793..2a0d9512f44aa 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -819,6 +819,15 @@ config VIDEO_UPD64083
 	  To compile this driver as a module, choose M here: the
 	  module will be called upd64083.
 
+comment "Camera lens devices"
+
+config VIDEO_VM149C
+	tristate "VM149C lens voice coil support"
+	depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
+	depends on VIDEO_V4L2_SUBDEV_API
+	---help---
+	  This is a driver for the VM149C camera lens voice coil.
+
 comment "Audio/Video compression chips"
 
 config VIDEO_SAA6752HS
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index bb56f89e91e55..377e7ab0e5d7b 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -92,3 +92,5 @@ obj-$(CONFIG_VIDEO_GC0312)	+= gc0312.o
 obj-$(CONFIG_VIDEO_GC2145)	+= gc2145.o
 obj-$(CONFIG_VIDEO_GC0329)	+= gc0329.o
 obj-$(CONFIG_VIDEO_GC2035)	+= gc2035.o
+
+obj-$(CONFIG_VIDEO_VM149C)	+= vm149c.o
diff --git a/drivers/media/i2c/rk_vcm_head.h b/drivers/media/i2c/rk_vcm_head.h
new file mode 100644
index 0000000000000..7ddf5d232150e
--- /dev/null
+++ b/drivers/media/i2c/rk_vcm_head.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. */
+
+#ifndef RK_VCM_HEAD_H
+#define RK_VCM_HEAD_H
+
+/*
+ * Focus position values:
+ * 65 logical positions ( 0 - 64 )
+ * where 64 is the setting for infinity and 0 for macro
+ */
+#define VCMDRV_MAX_LOG			64U
+
+#define OF_CAMERA_VCMDRV_START_CURRENT	"rockchip,vcm-start-current"
+#define OF_CAMERA_VCMDRV_RATED_CURRENT	"rockchip,vcm-rated-current"
+#define OF_CAMERA_VCMDRV_STEP_MODE	"rockchip,vcm-step-mode"
+
+#define RK_VIDIOC_VCM_TIMEINFO \
+	_IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rk_cam_vcm_tim)
+
+#ifdef CONFIG_COMPAT
+#define RK_VIDIOC_COMPAT_VCM_TIMEINFO \
+	_IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rk_cam_compat_vcm_tim)
+#endif
+
+struct rk_cam_vcm_tim {
+	struct timeval vcm_start_t;
+	struct timeval vcm_end_t;
+};
+
+#ifdef CONFIG_COMPAT
+struct rk_cam_compat_vcm_tim {
+	struct compat_timeval vcm_start_t;
+	struct compat_timeval vcm_end_t;
+};
+#endif
+
+#endif /* RK_VCM_HEAD_H */
+
diff --git a/drivers/media/i2c/vm149c.c b/drivers/media/i2c/vm149c.c
new file mode 100644
index 0000000000000..e9403de9d06e7
--- /dev/null
+++ b/drivers/media/i2c/vm149c.c
@@ -0,0 +1,545 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include "rk_vcm_head.h"
+
+#define VM149C_NAME			"vm149c"
+
+#define VM149C_MAX_CURRENT		100U
+#define VM149C_MAX_REG			1023U
+
+#define VM149C_DEFAULT_START_CURRENT	0
+#define VM149C_DEFAULT_RATED_CURRENT	100
+#define VM149C_DEFAULT_STEP_MODE	4
+
+/* vm149c device structure */
+struct vm149c_device {
+	struct v4l2_ctrl_handler ctrls_vcm;
+	struct v4l2_subdev sd;
+	struct v4l2_device vdev;
+	u16 current_val;
+
+	unsigned short current_related_pos;
+	unsigned short current_lens_pos;
+	unsigned int start_current;
+	unsigned int rated_current;
+	unsigned int step;
+	unsigned int step_mode;
+	unsigned int vcm_movefull_t;
+
+	struct timeval start_move_tv;
+	struct timeval end_move_tv;
+	unsigned long move_ms;
+};
+
+static inline struct vm149c_device *to_vm149c_vcm(struct v4l2_ctrl *ctrl)
+{
+	return container_of(ctrl->handler, struct vm149c_device, ctrls_vcm);
+}
+
+static inline struct vm149c_device *sd_to_vm149c_vcm(struct v4l2_subdev *subdev)
+{
+	return container_of(subdev, struct vm149c_device, sd);
+}
+
+static int vm149c_read_msg(
+	struct i2c_client *client,
+	unsigned char *msb, unsigned char *lsb)
+{
+	int ret = 0;
+	struct i2c_msg msg[1];
+	unsigned char data[2];
+	int retries;
+
+	if (!client->adapter) {
+		dev_err(&client->dev, "client->adapter NULL\n");
+		return -ENODEV;
+	}
+
+	for (retries = 0; retries < 5; retries++) {
+		msg->addr = client->addr;
+		msg->flags = 1;
+		msg->len = 2;
+		msg->buf = data;
+
+		ret = i2c_transfer(client->adapter, msg, 1);
+		if (ret == 1) {
+			dev_dbg(&client->dev,
+				"%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
+				__func__, msg->addr, data[0], data[1]);
+
+			*msb = data[0];
+			*lsb = data[1];
+			return 0;
+		}
+
+		dev_info(&client->dev,
+			"retrying I2C... %d\n", retries);
+		retries++;
+		set_current_state(TASK_UNINTERRUPTIBLE);
+		schedule_timeout(msecs_to_jiffies(20));
+	}
+	dev_err(&client->dev,
+		"%s: i2c write to failed with error %d\n", __func__, ret);
+	return ret;
+}
+
+static int vm149c_write_msg(
+	struct i2c_client *client,
+	u8 msb, u8 lsb)
+{
+	int ret = 0;
+	struct i2c_msg msg[1];
+	unsigned char data[2];
+	int retries;
+
+	if (!client->adapter) {
+		dev_err(&client->dev, "client->adapter NULL\n");
+		return -ENODEV;
+	}
+
+	for (retries = 0; retries < 5; retries++) {
+		msg->addr = client->addr;
+		msg->flags = 0;
+		msg->len = 2;
+		msg->buf = data;
+
+		data[0] = msb;
+		data[1] = lsb;
+
+		ret = i2c_transfer(client->adapter, msg, 1);
+		usleep_range(50, 100);
+
+		if (ret == 1) {
+			dev_dbg(&client->dev,
+				"%s: vcm i2c ok, addr 0x%x, data 0x%x, 0x%x\n",
+				__func__, msg->addr, data[0], data[1]);
+			return 0;
+		}
+
+		dev_info(&client->dev,
+			"retrying I2C... %d\n", retries);
+		retries++;
+		set_current_state(TASK_UNINTERRUPTIBLE);
+		schedule_timeout(msecs_to_jiffies(20));
+	}
+	dev_err(&client->dev,
+		"i2c write to failed with error %d\n", ret);
+	return ret;
+}
+
+static int vm149c_get_pos(
+	struct vm149c_device *dev_vcm,
+	unsigned int *cur_pos)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
+	int ret;
+	unsigned char lsb;
+	unsigned char msb;
+	unsigned int abs_step;
+
+	ret = vm149c_read_msg(client, &msb, &lsb);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	abs_step = (((unsigned int)(msb & 0x3FU)) << 4U) |
+		   (((unsigned int)lsb) >> 4U);
+	if (abs_step <= dev_vcm->start_current)
+		abs_step = VCMDRV_MAX_LOG;
+	else if ((abs_step > dev_vcm->start_current) &&
+		 (abs_step <= dev_vcm->rated_current))
+		abs_step = (dev_vcm->rated_current - abs_step) / dev_vcm->step;
+	else
+		abs_step = 0;
+
+	*cur_pos = abs_step;
+	dev_dbg(&client->dev, "%s: get position %d\n", __func__, *cur_pos);
+	return 0;
+
+err:
+	dev_err(&client->dev,
+		"%s: failed with error %d\n", __func__, ret);
+	return ret;
+}
+
+static int vm149c_set_pos(
+	struct vm149c_device *dev_vcm,
+	unsigned int dest_pos)
+{
+	int ret;
+	unsigned char lsb;
+	unsigned char msb;
+	unsigned int position;
+	struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
+
+	if (dest_pos >= VCMDRV_MAX_LOG)
+		position = dev_vcm->start_current;
+	else
+		position = dev_vcm->start_current +
+			   (dev_vcm->step * (VCMDRV_MAX_LOG - dest_pos));
+
+	if (position > VM149C_MAX_REG)
+		position = VM149C_MAX_REG;
+
+	dev_vcm->current_lens_pos = position;
+	dev_vcm->current_related_pos = dest_pos;
+	msb = (0x00U | ((dev_vcm->current_lens_pos & 0x3F0U) >> 4U));
+	lsb = (((dev_vcm->current_lens_pos & 0x0FU) << 4U) |
+		dev_vcm->step_mode);
+	ret = vm149c_write_msg(client, msb, lsb);
+	if (IS_ERR_VALUE(ret))
+		goto err;
+
+	return ret;
+err:
+	dev_err(&client->dev,
+		"%s: failed with error %d\n", __func__, ret);
+	return ret;
+}
+
+static int vm149c_get_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct vm149c_device *dev_vcm = to_vm149c_vcm(ctrl);
+
+	if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE)
+		return vm149c_get_pos(dev_vcm, &ctrl->val);
+
+	return -EINVAL;
+}
+
+static int vm149c_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct vm149c_device *dev_vcm = to_vm149c_vcm(ctrl);
+	struct i2c_client *client = v4l2_get_subdevdata(&dev_vcm->sd);
+	unsigned int dest_pos = ctrl->val;
+	int move_pos;
+	long int mv_us;
+	int ret = 0;
+
+	if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE) {
+		if (dest_pos > VCMDRV_MAX_LOG) {
+			dev_info(&client->dev,
+				"%s dest_pos is error. %d > %d\n",
+				__func__, dest_pos, VCMDRV_MAX_LOG);
+			return -EINVAL;
+		} else {
+			/* calculate move time */
+			move_pos = dev_vcm->current_related_pos - dest_pos;
+			if (move_pos < 0)
+				move_pos = -move_pos;
+
+			ret = vm149c_set_pos(dev_vcm, dest_pos);
+
+			dev_vcm->move_ms =
+				((dev_vcm->vcm_movefull_t * (uint32_t)move_pos) / VCMDRV_MAX_LOG);
+			dev_dbg(&client->dev,
+				"dest_pos %d, move_ms %ld\n", dest_pos, dev_vcm->move_ms);
+
+			dev_vcm->start_move_tv = ns_to_timeval(ktime_get_ns());
+			mv_us = dev_vcm->start_move_tv.tv_usec + dev_vcm->move_ms * 1000;
+			if (mv_us >= 1000000) {
+				dev_vcm->end_move_tv.tv_sec = dev_vcm->start_move_tv.tv_sec + 1;
+				dev_vcm->end_move_tv.tv_usec = mv_us - 1000000;
+			} else {
+				dev_vcm->end_move_tv.tv_sec = dev_vcm->start_move_tv.tv_sec;
+				dev_vcm->end_move_tv.tv_usec = mv_us;
+			}
+		}
+	}
+
+	return ret;
+}
+
+static const struct v4l2_ctrl_ops vm149c_vcm_ctrl_ops = {
+	.g_volatile_ctrl = vm149c_get_ctrl,
+	.s_ctrl = vm149c_set_ctrl,
+};
+
+static int vm149c_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	int rval;
+
+	rval = pm_runtime_get_sync(sd->dev);
+	if (rval < 0) {
+		pm_runtime_put_noidle(sd->dev);
+		return rval;
+	}
+
+	return 0;
+}
+
+static int vm149c_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	pm_runtime_put(sd->dev);
+
+	return 0;
+}
+
+static const struct v4l2_subdev_internal_ops vm149c_int_ops = {
+	.open = vm149c_open,
+	.close = vm149c_close,
+};
+
+static long vm149c_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
+{
+	int ret = 0;
+	struct rk_cam_vcm_tim *vcm_tim;
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct vm149c_device *vm149c_dev = sd_to_vm149c_vcm(sd);
+
+	if (cmd == RK_VIDIOC_VCM_TIMEINFO) {
+		vcm_tim = (struct rk_cam_vcm_tim *)arg;
+
+		vcm_tim->vcm_start_t.tv_sec = vm149c_dev->start_move_tv.tv_sec;
+		vcm_tim->vcm_start_t.tv_usec = vm149c_dev->start_move_tv.tv_usec;
+		vcm_tim->vcm_end_t.tv_sec = vm149c_dev->end_move_tv.tv_sec;
+		vcm_tim->vcm_end_t.tv_usec = vm149c_dev->end_move_tv.tv_usec;
+
+		dev_dbg(&client->dev, "vm149c_get_move_res 0x%lx, 0x%lx, 0x%lx, 0x%lx\n",
+			vcm_tim->vcm_start_t.tv_sec, vcm_tim->vcm_start_t.tv_usec,
+			vcm_tim->vcm_end_t.tv_sec, vcm_tim->vcm_end_t.tv_usec);
+	} else {
+		dev_err(&client->dev,
+			"cmd 0x%x not supported\n", cmd);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+#ifdef CONFIG_COMPAT
+static long vm149c_compat_ioctl32(struct v4l2_subdev *sd, unsigned int cmd, unsigned long arg)
+{
+	struct rk_cam_vcm_tim vcm_tim;
+	struct rk_cam_compat_vcm_tim compat_vcm_tim;
+	struct rk_cam_compat_vcm_tim __user *p32 = compat_ptr(arg);
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	long ret;
+
+	if (cmd == RK_VIDIOC_COMPAT_VCM_TIMEINFO) {
+		ret = vm149c_ioctl(sd, RK_VIDIOC_VCM_TIMEINFO, &vcm_tim);
+		compat_vcm_tim.vcm_start_t.tv_sec = vcm_tim.vcm_start_t.tv_sec;
+		compat_vcm_tim.vcm_start_t.tv_usec = vcm_tim.vcm_start_t.tv_usec;
+		compat_vcm_tim.vcm_end_t.tv_sec = vcm_tim.vcm_end_t.tv_sec;
+		compat_vcm_tim.vcm_end_t.tv_usec = vcm_tim.vcm_end_t.tv_usec;
+
+		put_user(compat_vcm_tim.vcm_start_t.tv_sec, &p32->vcm_start_t.tv_sec);
+		put_user(compat_vcm_tim.vcm_start_t.tv_usec, &p32->vcm_start_t.tv_usec);
+		put_user(compat_vcm_tim.vcm_end_t.tv_sec, &p32->vcm_end_t.tv_sec);
+		put_user(compat_vcm_tim.vcm_end_t.tv_usec, &p32->vcm_end_t.tv_usec);
+	} else {
+		dev_err(&client->dev,
+			"cmd 0x%x not supported\n", cmd);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+#endif
+
+static const struct v4l2_subdev_core_ops vm149c_core_ops = {
+	.ioctl = vm149c_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl32 = vm149c_compat_ioctl32
+#endif
+};
+
+static const struct v4l2_subdev_ops vm149c_ops = {
+	.core = &vm149c_core_ops,
+};
+
+static void vm149c_subdev_cleanup(struct vm149c_device *vm149c_dev)
+{
+	v4l2_device_unregister_subdev(&vm149c_dev->sd);
+	v4l2_device_unregister(&vm149c_dev->vdev);
+	v4l2_ctrl_handler_free(&vm149c_dev->ctrls_vcm);
+	media_entity_cleanup(&vm149c_dev->sd.entity);
+}
+
+static int vm149c_init_controls(struct vm149c_device *dev_vcm)
+{
+	struct v4l2_ctrl_handler *hdl = &dev_vcm->ctrls_vcm;
+	const struct v4l2_ctrl_ops *ops = &vm149c_vcm_ctrl_ops;
+
+	v4l2_ctrl_handler_init(hdl, 1);
+
+	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_ABSOLUTE,
+			  0, VCMDRV_MAX_LOG, 1, VCMDRV_MAX_LOG);
+
+	if (hdl->error)
+		dev_err(dev_vcm->sd.dev, "%s fail error: 0x%x\n",
+			__func__, hdl->error);
+	dev_vcm->sd.ctrl_handler = hdl;
+	return hdl->error;
+}
+
+static int vm149c_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct vm149c_device *vm149c_dev;
+	int ret;
+	int current_distance;
+	struct device_node *np = of_node_get(client->dev.of_node);
+	unsigned int start_current;
+	unsigned int rated_current;
+	unsigned int step_mode;
+
+	dev_info(&client->dev, "probing...\n");
+	if (of_property_read_u32(
+		np,
+		OF_CAMERA_VCMDRV_START_CURRENT,
+		(unsigned int *)&start_current)) {
+		start_current = VM149C_DEFAULT_START_CURRENT;
+		dev_info(&client->dev,
+			"could not get module %s from dts!\n",
+			OF_CAMERA_VCMDRV_START_CURRENT);
+	}
+	if (of_property_read_u32(
+		np,
+		OF_CAMERA_VCMDRV_RATED_CURRENT,
+		(unsigned int *)&rated_current)) {
+		rated_current = VM149C_DEFAULT_RATED_CURRENT;
+		dev_info(&client->dev,
+			"could not get module %s from dts!\n",
+			OF_CAMERA_VCMDRV_RATED_CURRENT);
+	}
+	if (of_property_read_u32(
+		np,
+		OF_CAMERA_VCMDRV_STEP_MODE,
+		(unsigned int *)&step_mode)) {
+		step_mode = VM149C_DEFAULT_STEP_MODE;
+		dev_info(&client->dev,
+			"could not get module %s from dts!\n",
+			OF_CAMERA_VCMDRV_STEP_MODE);
+	}
+
+	vm149c_dev = devm_kzalloc(&client->dev, sizeof(*vm149c_dev),
+				  GFP_KERNEL);
+	if (vm149c_dev == NULL)
+		return -ENOMEM;
+
+	v4l2_i2c_subdev_init(&vm149c_dev->sd, client, &vm149c_ops);
+	vm149c_dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+	vm149c_dev->sd.internal_ops = &vm149c_int_ops;
+
+	ret = vm149c_init_controls(vm149c_dev);
+	if (ret)
+		goto err_cleanup;
+
+	ret = media_entity_init(&vm149c_dev->sd.entity, 0, NULL, 0);
+	if (ret < 0)
+		goto err_cleanup;
+
+	vm149c_dev->sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_LENS;
+
+	ret = v4l2_device_register(&client->dev, &vm149c_dev->vdev);
+	if (ret < 0) {
+		dev_err(&client->dev, "vm149 v4l2 device register failed, ret: %d\n", ret);
+		goto err_cleanup;
+	}
+
+	ret = v4l2_device_register_subdev(&vm149c_dev->vdev, &vm149c_dev->sd);
+	if (ret) {
+		dev_err(&client->dev, "vm149 v4l2 register subdev failed, ret: %d\n", ret);
+		goto err_cleanup;
+	} else {
+		dev_info(&client->dev, "vm149 v4l2 register subdev success\n");
+	}
+
+	ret = v4l2_device_register_subdev_nodes(&vm149c_dev->vdev);
+	if (ret < 0) {
+		dev_err(&client->dev, "vm149 v4l2 device nodesregister, ret: %d\n", ret);
+		goto err_cleanup;
+	}
+
+	current_distance = rated_current - start_current;
+	current_distance = current_distance * VM149C_MAX_REG / VM149C_MAX_CURRENT;
+	vm149c_dev->step = (current_distance + (VCMDRV_MAX_LOG - 1)) / VCMDRV_MAX_LOG;
+	vm149c_dev->start_current = start_current * VM149C_MAX_REG / VM149C_MAX_CURRENT;
+	vm149c_dev->rated_current = vm149c_dev->start_current + VCMDRV_MAX_LOG * vm149c_dev->step;
+	vm149c_dev->step_mode     = step_mode;
+	vm149c_dev->move_ms       = 0;
+	vm149c_dev->current_related_pos = VCMDRV_MAX_LOG;
+	vm149c_dev->start_move_tv = ns_to_timeval(ktime_get_ns());
+	vm149c_dev->end_move_tv = ns_to_timeval(ktime_get_ns());
+	if ((vm149c_dev->step_mode & 0x0c) != 0) {
+		vm149c_dev->vcm_movefull_t =
+			64 * (1 << (vm149c_dev->step_mode & 0x03)) * 1024 /
+			((1 << (((vm149c_dev->step_mode & 0x0c) >> 2) - 1)) * 1000);
+	} else {
+		vm149c_dev->vcm_movefull_t = 64 * 1023 / 1000;
+	}
+
+	pm_runtime_set_active(&client->dev);
+	pm_runtime_enable(&client->dev);
+	pm_runtime_idle(&client->dev);
+
+	dev_info(&client->dev, "probing successful\n");
+
+	return 0;
+
+err_cleanup:
+	vm149c_subdev_cleanup(vm149c_dev);
+	dev_err(&client->dev, "Probe failed: %d\n", ret);
+	return ret;
+}
+
+static int vm149c_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct vm149c_device *vm149c_dev = sd_to_vm149c_vcm(sd);
+
+	pm_runtime_disable(&client->dev);
+	vm149c_subdev_cleanup(vm149c_dev);
+
+	return 0;
+}
+
+static int __maybe_unused vm149c_vcm_suspend(struct device *dev)
+{
+	return 0;
+}
+
+static int  __maybe_unused vm149c_vcm_resume(struct device *dev)
+{
+	return 0;
+}
+
+static const struct i2c_device_id vm149c_id_table[] = {
+	{ VM149C_NAME, 0 },
+	{ { 0 } }
+};
+MODULE_DEVICE_TABLE(i2c, vm149c_id_table);
+
+static const struct of_device_id vm149c_of_table[] = {
+	{ .compatible = "silicon touch,vm149c" },
+	{ { 0 } }
+};
+MODULE_DEVICE_TABLE(of, vm149c_of_table);
+
+static const struct dev_pm_ops vm149c_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(vm149c_vcm_suspend, vm149c_vcm_resume)
+	SET_RUNTIME_PM_OPS(vm149c_vcm_suspend, vm149c_vcm_resume, NULL)
+};
+
+static struct i2c_driver vm149c_i2c_driver = {
+	.driver = {
+		.name = VM149C_NAME,
+		.pm = &vm149c_pm_ops,
+		.of_match_table = vm149c_of_table,
+	},
+	.probe = &vm149c_probe,
+	.remove = &vm149c_remove,
+	.id_table = vm149c_id_table,
+};
+
+module_i2c_driver(vm149c_i2c_driver);
+
+MODULE_DESCRIPTION("VM149C VCM driver");
+MODULE_LICENSE("GPL v2");

From d370f9b0f928c1f647917099e6e8b8a2508d5eed Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Wed, 12 Sep 2018 16:17:52 +0800
Subject: [PATCH 1824/1852] drm/rockchip: framebuffer: Add support
 /dev/graphics/fb0 read

For support some application only can support framebuffer display
framework and need to read display buffer from /dev/graphics/fb0.

besides, you need to add the following patch to get kvddr:

rockchip_gem_create_with_handle()@file:
drivers/gpu/drm/rockchip/rockchip_drm_gem.c

-rk_obj = rockchip_gem_create_object(drm, size, false, flags);
+rk_obj = rockchip_gem_create_object(drm, size, true, flags);

Change-Id: Iec83dba8295268ba418e802a1cf5eeccd3880ab5
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c    | 5 +++++
 drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index 5cbe6a0b0172b..eb6ba3763eb5f 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -100,6 +100,8 @@ rockchip_fb_alloc(struct drm_device *dev, struct drm_mode_fb_cmd2 *mode_cmd,
 {
 	struct rockchip_drm_fb *rockchip_fb;
 	struct rockchip_gem_object *rk_obj;
+	struct rockchip_drm_private *private = dev->dev_private;
+	struct drm_fb_helper *fb_helper = private->fbdev_helper;
 	int ret = 0;
 	int i;
 
@@ -125,6 +127,9 @@ rockchip_fb_alloc(struct drm_device *dev, struct drm_mode_fb_cmd2 *mode_cmd,
 			rk_obj = to_rockchip_obj(obj[i]);
 			rockchip_fb->dma_addr[i] = rk_obj->dma_addr;
 			rockchip_fb->kvaddr[i] = rk_obj->kvaddr;
+			private->fbdev_bo = &rk_obj->base;
+			if (fb_helper && fb_helper->fbdev && rk_obj->kvaddr)
+				fb_helper->fbdev->screen_base = rk_obj->kvaddr;
 		}
 #ifndef MODULE
 	} else if (logo) {
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c b/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c
index 5bd8444a8059c..c86ac833a9db0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c
@@ -60,6 +60,8 @@ static struct fb_ops rockchip_drm_fbdev_ops = {
 	.fb_set_par	= drm_fb_helper_set_par,
 	.fb_blank	= drm_fb_helper_blank,
 	.fb_pan_display	= drm_fb_helper_pan_display,
+	.fb_read	= drm_fb_helper_sys_read,
+	.fb_write	= drm_fb_helper_sys_write,
 	.fb_setcmap	= drm_fb_helper_setcmap,
 	.fb_dmabuf_export	= rockchip_fbdev_get_dma_buf,
 };

From 34b8719162965ea633d816b07fb276bf04ef851e Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 28 Aug 2018 14:56:41 +0800
Subject: [PATCH 1825/1852] clk: rockchip: rk3308: Add some new clocks

Add clock for pwm1, pwm2, can, owire.

Change-Id: Id9a9330da359c3d2c53ae0f0f2e41cf4ff495cc4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi |  8 ++++----
 drivers/clk/rockchip/clk-rk3308.c        | 18 +++++++++++++++--
 include/dt-bindings/clock/rk3308-cru.h   | 25 ++++++++++++++++++------
 3 files changed, 39 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 030ef4932edeb..61d6d06f169b2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -609,7 +609,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
-		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -620,7 +620,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
-		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -631,7 +631,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
-		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -642,7 +642,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
-		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c
index 0cd2928ee94f4..bb6cf8e006bc0 100644
--- a/drivers/clk/rockchip/clk-rk3308.c
+++ b/drivers/clk/rockchip/clk-rk3308.c
@@ -403,9 +403,15 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 			RK3308_CLKSEL_CON(28), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(3), 0, GFLAGS),
 
-	COMPOSITE(SCLK_PWM, "clk_pwm", mux_dpll_vpll0_xin24m_p, 0,
+	COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_dpll_vpll0_xin24m_p, 0,
 			RK3308_CLKSEL_CON(29), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(3), 1, GFLAGS),
+	COMPOSITE(SCLK_PWM1, "clk_pwm1", mux_dpll_vpll0_xin24m_p, 0,
+			RK3308_CLKSEL_CON(74), 14, 2, MFLAGS, 0, 7, DFLAGS,
+			RK3308_CLKGATE_CON(15), 0, GFLAGS),
+	COMPOSITE(SCLK_PWM2, "clk_pwm2", mux_dpll_vpll0_xin24m_p, 0,
+			RK3308_CLKSEL_CON(75), 14, 2, MFLAGS, 0, 7, DFLAGS,
+			RK3308_CLKGATE_CON(15), 1, GFLAGS),
 
 	COMPOSITE(SCLK_SPI0, "clk_isp0", mux_dpll_vpll0_xin24m_p, 0,
 			RK3308_CLKSEL_CON(30), 14, 2, MFLAGS, 0, 7, DFLAGS,
@@ -548,6 +554,10 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 	MUX(SCLK_MAC_RMII, "clk_mac_rmii_sel", mux_mac_rmii_sel_p,  CLK_SET_RATE_PARENT,
 			RK3308_CLKSEL_CON(43), 15, 1, MFLAGS),
 
+	COMPOSITE(SCLK_OWIRE, "clk_owire", mux_dpll_vpll0_xin24m_p, 0,
+			RK3308_CLKSEL_CON(44), 14, 2, MFLAGS, 8, 6, DFLAGS,
+			RK3308_CLKGATE_CON(8), 15, GFLAGS),
+
 	/*
 	 * Clock-Architecture Diagram 5
 	 */
@@ -864,7 +874,7 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 	GATE(PCLK_I2C1, "pclk_i2c1", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 0, GFLAGS),
 	GATE(PCLK_I2C2, "pclk_i2c2", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 1, GFLAGS),
 	GATE(PCLK_I2C3, "pclk_i2c3", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 2, GFLAGS),
-	GATE(PCLK_PWM, "pclk_pwm", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 3, GFLAGS),
+	GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 3, GFLAGS),
 	GATE(PCLK_SPI0, "pclk_spi0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 4, GFLAGS),
 	GATE(PCLK_SPI1, "pclk_spi1", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 5, GFLAGS),
 	GATE(PCLK_SPI2, "pclk_spi2", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 6, GFLAGS),
@@ -888,6 +898,10 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 	GATE(PCLK_CRU, "pclk_cru", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 9, GFLAGS),
 	GATE(PCLK_OTP_PHY, "pclk_otp_phy", "pclk_bus", 0, RK3308_CLKGATE_CON(7), 10, GFLAGS),
 	GATE(PCLK_CPU_BOOST, "pclk_cpu_boost", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 11, GFLAGS),
+	GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 12, GFLAGS),
+	GATE(PCLK_PWM2, "pclk_pwm2", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 13, GFLAGS),
+	GATE(PCLK_CAN, "pclk_can", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 14, GFLAGS),
+	GATE(PCLK_OWIRE, "pclk_owire", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 15, GFLAGS),
 };
 
 static const char *const rk3308_critical_clocks[] __initconst = {
diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
index 7ba1b86ccd69e..5088a0f6fb02e 100644
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -36,7 +36,7 @@
 #define SCLK_I2C1		23
 #define SCLK_I2C2		24
 #define SCLK_I2C3		25
-#define SCLK_PWM		26
+#define SCLK_PWM0		26
 #define SCLK_SPI0		27
 #define SCLK_SPI1		28
 #define SCLK_SPI2		29
@@ -130,9 +130,12 @@
 #define SCLK_I2S3_8CH_RX_SRC	117
 #define SCLK_I2S0_2CH_SRC	118
 #define SCLK_I2S1_2CH_SRC	119
+#define SCLK_PWM1		120
+#define SCLK_PWM2		121
+#define SCLK_OWIRE		122
 
 /* dclk */
-#define DCLK_VOP		120
+#define DCLK_VOP		125
 
 /* aclk */
 #define ACLK_BUS_SRC		130
@@ -188,7 +191,7 @@
 #define PCLK_I2C1		203
 #define PCLK_I2C2		204
 #define PCLK_I2C3		205
-#define PCLK_PWM		206
+#define PCLK_PWM0		206
 #define PCLK_SPI0		207
 #define PCLK_SPI1		208
 #define PCLK_SPI2		209
@@ -213,8 +216,12 @@
 #define PCLK_CRU		228
 #define PCLK_OTP_PHY		229
 #define PCLK_CPU_BOOST		230
+#define PCLK_PWM1		231
+#define PCLK_PWM2		232
+#define PCLK_CAN		233
+#define PCLK_OWIRE		234
 
-#define CLK_NR_CLKS		(PCLK_CPU_BOOST + 1)
+#define CLK_NR_CLKS		(PCLK_OWIRE + 1)
 
 /* soft-reset indices */
 
@@ -284,8 +291,8 @@
 #define SRST_I2C2		59
 #define SRST_I2C3_P		60
 #define SRST_I2C3		61
-#define SRST_PWM_P		62
-#define SRST_PWM		63
+#define SRST_PWM0_P		62
+#define SRST_PWM0		63
 
 /* cru_softrst_con4 */
 #define SRST_SPI0_P		64
@@ -325,6 +332,10 @@
 /* cru_softrst_con6 */
 #define SRST_CPU_BOOST		96
 #define SRST_CPU_BOOST_P	97
+#define SRST_PWM1_P		98
+#define SRST_PWM1		99
+#define SRST_PWM2_P		100
+#define SRST_PWM2		101
 #define SRST_PERI_NIU_A		104
 #define SRST_PERI_NIU_H		105
 #define SRST_PERI_NIU_p		106
@@ -349,6 +360,8 @@
 #define SRST_NANDC_H		123
 #define SRST_NANDC_N		124
 #define SRST_MAC_A		125
+#define SRST_CAN_P		126
+#define SRST_OWIRE_P		127
 
 /* cru_softrst_con8 */
 #define SRST_AUDIO_NIU_H	128

From 8820178eddb281c4357d48b1b542b6362869b1fc Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 28 Aug 2018 15:26:06 +0800
Subject: [PATCH 1826/1852] clk: rockchip: rk3308: Modify parent clock of wifi

Change-Id: I30022ac45c7effc2bdd3b54180e0994cf6f41b7a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3308.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c
index bb6cf8e006bc0..76945c491f817 100644
--- a/drivers/clk/rockchip/clk-rk3308.c
+++ b/drivers/clk/rockchip/clk-rk3308.c
@@ -158,7 +158,8 @@ PNAME(mux_mac_rmii_sel_p)	= { "clk_mac_rx_tx_div20", "clk_mac_rx_tx_div2" };
 PNAME(mux_ddrstdby_p)		= { "clk_ddrphy1x_out", "clk_ddr_stdby_div4" };
 PNAME(mux_rtc32k_p)		= { "xin32k", "clk_pvtm_32k", "clk_rtc32k_frac", "clk_rtc32k_div" };
 PNAME(mux_usbphy_ref_p)		= { "xin24m", "clk_usbphy_ref_src" };
-PNAME(mux_wifi_p)		= { "xin24m", "clk_wifi_src" };
+PNAME(mux_wifi_src_p)		= { "clk_wifi_dpll", "clk_wifi_vpll0" };
+PNAME(mux_wifi_p)		= { "clk_wifi_osc", "clk_wifi_src" };
 PNAME(mux_pdm_p)		= { "clk_pdm_src", "clk_pdm_frac" };
 PNAME(mux_i2s0_8ch_tx_p)	= { "clk_i2s0_8ch_tx_src", "clk_i2s0_8ch_tx_frac", "mclk_i2s0_8ch_in" };
 PNAME(mux_i2s0_8ch_tx_rx_p)	= { "clk_i2s0_8ch_tx_mux", "clk_i2s0_8ch_rx_mux"};
@@ -613,7 +614,13 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 			RK3308_CLKSEL_CON(72), 7, 1, MFLAGS,
 			RK3308_CLKGATE_CON(4), 8, GFLAGS),
 
-	COMPOSITE(0, "clk_wifi_src", mux_dpll_vpll0_p, 0,
+	GATE(0, "clk_wifi_dpll", "dpll", 0,
+			RK3308_CLKGATE_CON(15), 2, GFLAGS),
+	GATE(0, "clk_wifi_vpll0", "vpll0", 0,
+			RK3308_CLKGATE_CON(15), 3, GFLAGS),
+	GATE(0, "clk_wifi_osc", "xin24m", 0,
+			RK3308_CLKGATE_CON(15), 4, GFLAGS),
+	COMPOSITE(0, "clk_wifi_src", mux_wifi_src_p, 0,
 			RK3308_CLKSEL_CON(44), 6, 1, MFLAGS, 0, 6, DFLAGS,
 			RK3308_CLKGATE_CON(4), 0, GFLAGS),
 	COMPOSITE_NODIV(SCLK_WIFI, "clk_wifi", mux_wifi_p, CLK_SET_RATE_PARENT,

From e5c2a35ac3f17fe17cbb79d44d73d910debfd930 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Fri, 31 Aug 2018 19:18:33 +0800
Subject: [PATCH 1827/1852] arm64: dts: rockchip: Add pwm nodes for rk3308b

Change-Id: I4dd43c44e35af1ac40754fc47bb4a4d602b45c73
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 88 ++++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 61d6d06f169b2..845e983db139e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -603,6 +603,94 @@
 		status = "disabled";
 	};
 
+	pwm8: pwm@ff160000 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff160000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@ff160010 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff160010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@ff160020 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff160020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@ff160030 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff160030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff170000 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff170000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff170010 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff170010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff170020 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff170020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff170030 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff170030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	pwm0: pwm@ff180000 {
 		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xff180000 0x0 0x10>;

From b0b7468c51a55dcb7ed68bf2a2193cc29adca1fb Mon Sep 17 00:00:00 2001
From: Binyuan Lan <lby@rock-chips.com>
Date: Mon, 11 Jun 2018 15:22:31 +0800
Subject: [PATCH 1828/1852] arm64: configs: rockchip_defconfig: enable
 multi-dais

Change-Id: I16f55d42c36bb29258e9bff74b43cc240593f201
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 25765399c7966..23b2c37073298 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -546,6 +546,7 @@ CONFIG_SND_SOC=y
 CONFIG_SND_SOC_ROCKCHIP=y
 CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM=y
 CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
+CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=y
 CONFIG_SND_SOC_ROCKCHIP_PDM=y
 CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
 CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG=y

From 1e0c71c17172c3a78331ba58a2f4c5cad05dc556 Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Mon, 17 Sep 2018 16:49:35 +0800
Subject: [PATCH 1829/1852] arm64: dts: rockchip:
 rk3399-sapphire-excavator-linux: fixes the incorrect pdn pin for rk3399
 camera

This patch fixes that ethernet is abnormal without connecting the camera,
since the gpio3_a4 is reused by the gmac.

Change-Id: I39cd40f62d706491dac57eda2c43408c4a88e7a0
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 .../arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
index 10a7f4f7a96e1..6b5e3219407f3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
@@ -335,7 +335,7 @@
 				"rockchip,camera_sleep";
 		pinctrl-0 = <&cam0_default_pins>;
 		pinctrl-1 = <&cam0_sleep_pins>;
-		rockchip,pd-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
+		rockchip,pd-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
 		//rockchip,pwr-gpio = <&gpio3 13 0>;
 		/* mipi switch control*/
 		rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;

From 9224e5892309586f49afcaf5b4599cd493a5434c Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Tue, 18 Sep 2018 08:33:54 +0800
Subject: [PATCH 1830/1852] arm64: rockchip_defconfig: update by savedefconfig

Change-Id: Ib1efe54944aa0709b8de732ab631f51ae8fb299e
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 23b2c37073298..a01ad8a7b8f00 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -814,7 +814,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=4096
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_TEE_SUPPORT=y
-CONFIG_CRYPTO_ECHAINIV=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_TWOFISH=y
 CONFIG_CRYPTO_ANSI_CPRNG=y

From 6ccb2922f09d959fda3ad576def3070521c1d8da Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Mon, 17 Sep 2018 09:24:40 +0800
Subject: [PATCH 1831/1852] ARM: rockchip_defconfig: Enable CONFIG_COREDUMP

vts-testcase/kernel/api/proc/KernelProcFileApiTest
had added tests for the core_pattern.

https://android.googlesource.com/kernel/configs
5ed73dc4d482 ("add missing configs")

CONFIG_COREDUMP and CONFIG_ELF_CORE are recommended for diagnostic
purposes.

# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
came from android-recommended.config

Change-Id: Ib16fcc6c126e8415976fea2d7e193565866bcf2d
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/configs/rockchip_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index a53624f30cdfd..a5c7dbbaa3dcb 100644
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -74,7 +74,7 @@ CONFIG_CPU_IDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_KERNEL_MODE_NEON=y
-# CONFIG_COREDUMP is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_PM_AUTOSLEEP=y
 CONFIG_PM_WAKELOCKS=y
 CONFIG_PM_WAKELOCKS_LIMIT=0

From 261dfe999c9c8265252ed377a9392f24383f2741 Mon Sep 17 00:00:00 2001
From: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date: Tue, 18 Sep 2018 08:35:14 +0800
Subject: [PATCH 1832/1852] arm64: rockchip_defconfig: Enable CONFIG_COREDUMP

vts-testcase/kernel/api/proc/KernelProcFileApiTest
had added tests for the core_pattern.

https://android.googlesource.com/kernel/configs
5ed73dc4d482 ("add missing configs")

CONFIG_COREDUMP and CONFIG_ELF_CORE are recommended for diagnostic
purposes.

came from android-recommended.config

Change-Id: I8400ffff1b5e025b4967a39536082fbcc4ec0859
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index a01ad8a7b8f00..93247f04e20ee 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -73,7 +73,7 @@ CONFIG_CP15_BARRIER_EMULATION=y
 CONFIG_SETEND_EMULATION=y
 CONFIG_ARM64_SW_TTBR0_PAN=y
 # CONFIG_EFI is not set
-# CONFIG_COREDUMP is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_COMPAT=y
 CONFIG_PM_AUTOSLEEP=y
 CONFIG_PM_WAKELOCKS=y

From c4fc997e67a29037e2e1411f016f9c241e482e98 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Mon, 17 Sep 2018 19:27:45 +0800
Subject: [PATCH 1833/1852] usb: dwc3: rockchip: fix build error if !CONFIG_USB

This patch fix the following build error if CONFIG_USB
is disabled and only support dwc3 gadget mode:

dwc3-rockchip.c:894: undefined reference to `usb_add_hcd'
dwc3-rockchip.c:622: undefined reference to `usb_remove_hcd'
......
dwc3-rockchip-inno.c:268: undefined reference to `usb_remove_hcd'
dwc3-rockchip-inno.c:286: undefined reference to `usb_add_hcd'

Change-Id: Iaa51ccc642abf5741fcd0d918967954c840240d5
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 drivers/usb/dwc3/Kconfig | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 3fbf82d494f9e..8b444dc0a50fe 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -98,8 +98,8 @@ config USB_DWC3_OF_SIMPLE
 
 config USB_DWC3_ROCKCHIP
 	tristate "Rockchip Platforms"
-	depends on EXTCON && (ARCH_ROCKCHIP || COMPILE_TEST)
-	depends on OF
+	depends on OF && EXTCON && (ARCH_ROCKCHIP || COMPILE_TEST)
+	depends on USB=y || USB=USB_DWC3
 	default USB_DWC3
 	help
 	  Support of USB2/3 functionality in Rockchip platforms.
@@ -108,6 +108,7 @@ config USB_DWC3_ROCKCHIP
 config USB_DWC3_ROCKCHIP_INNO
 	tristate "Rockchip Platforms with INNO PHY"
 	depends on OF && COMMON_CLK && ARCH_ROCKCHIP
+	depends on USB=y || USB=USB_DWC3
 	default USB_DWC3
 	help
 	  Support of USB2/3 functionality in Rockchip platforms

From 0b62f177f43499677b5933dc12f085e51e1720c7 Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Tue, 18 Sep 2018 11:49:19 +0800
Subject: [PATCH 1834/1852] arm64: rockchip_defconfig: enable
 DEBUG_SET_MODULE_RONX

https://android.googlesource.com/kernel/configs
36b7268642c0 ("add memory-permission related configs")

These configs are already required as part of CTS.

Change-Id: If285686e5a917d68e94303f1485e31ff063ecc82
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm64/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 93247f04e20ee..8900d82c372ef 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -806,6 +806,7 @@ CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_DEBUG_SET_MODULE_RONX=y
 CONFIG_KEYS=y
 CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y

From 2e8d9997806da7d70d3dc57531cec3a481cc3572 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Tue, 18 Sep 2018 08:55:27 +0800
Subject: [PATCH 1835/1852] drm/rockchip: vop: Silence debug messages

[    0.543299] rockchip-vop ff460000.vop: invalid resource
[    0.543346] rockchip-vop ff460000.vop: failed to get vop cabc lut registers
[    0.543686] rockchip-vop ff460000.vop: unable to request PWM
[    0.543717] [drm] no mcu-timing node found in /vop@ff460000
[    0.543762] rockchip-drm display-subsystem: bound ff460000.vop (ops vop_component_ops)

This makes all of these messages dev_dbg. They are still useful to debug,
but we do not need them filling up the kernel logs in normal operation.

Change-Id: I134585323b477c23a8085042602f5df592e619cb
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 .../gpu/drm/rockchip/rockchip_drm_backlight.c |  2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c   | 27 +++++++++----------
 2 files changed, 13 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_backlight.c b/drivers/gpu/drm/rockchip/rockchip_drm_backlight.c
index bafe6a3de747c..2f0a987496832 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_backlight.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_backlight.c
@@ -250,7 +250,7 @@ int of_rockchip_drm_sub_backlight_register(struct device *dev,
 
 	pwm = devm_pwm_get(dev, NULL);
 	if (IS_ERR(pwm)) {
-		dev_err(dev, "unable to request PWM\n");
+		dev_dbg(dev, "unable to request PWM\n");
 		return PTR_ERR(pwm);
 	}
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index df4e37f0c1056..bddd70f597a45 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -4380,34 +4380,31 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 		return -ENOMEM;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gamma_lut");
-	vop->lut_regs = devm_ioremap_resource(dev, res);
-	if (IS_ERR(vop->lut_regs)) {
-		dev_warn(vop->dev, "failed to get vop lut registers\n");
-		vop->lut_regs = NULL;
-	}
-	if (vop->lut_regs) {
+	if (res) {
 		vop->lut_len = resource_size(res) / sizeof(*vop->lut);
 		if (vop->lut_len != 256 && vop->lut_len != 1024) {
 			dev_err(vop->dev, "unsupport lut sizes %d\n",
 				vop->lut_len);
 			return -EINVAL;
 		}
-	}
 
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cabc_lut");
-	vop->cabc_lut_regs = devm_ioremap_resource(dev, res);
-	if (IS_ERR(vop->cabc_lut_regs)) {
-		dev_warn(vop->dev, "failed to get vop cabc lut registers\n");
-		vop->cabc_lut_regs = NULL;
+		vop->lut_regs = devm_ioremap_resource(dev, res);
+		if (IS_ERR(vop->lut_regs))
+			return PTR_ERR(vop->lut_regs);
 	}
 
-	if (vop->cabc_lut_regs) {
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cabc_lut");
+	if (res) {
 		vop->cabc_lut_len = resource_size(res) >> 2;
 		if (vop->cabc_lut_len != 128) {
 			dev_err(vop->dev, "unsupport cabc lut sizes %d\n",
 				vop->cabc_lut_len);
 			return -EINVAL;
 		}
+
+		vop->cabc_lut_regs = devm_ioremap_resource(dev, res);
+		if (IS_ERR(vop->cabc_lut_regs))
+			return PTR_ERR(vop->cabc_lut_regs);
 	}
 
 	vop->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
@@ -4473,8 +4470,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	mcu = of_get_child_by_name(dev->of_node, "mcu-timing");
 	if (!mcu) {
-		DRM_INFO("no mcu-timing node found in %s\n",
-			 dev->of_node->full_name);
+		dev_dbg(dev, "no mcu-timing node found in %s\n",
+			dev->of_node->full_name);
 	} else {
 		u32 val;
 

From 3ec57b82ef8c74c927de18a49aa96852b5d96886 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Tue, 18 Sep 2018 14:51:47 +0800
Subject: [PATCH 1836/1852] drm/rockchip: vop: fix kernel panic when calc
 bandwidth

error log:

[   35.638112] Internal error: Accessing user space memory outside uaccess.h routines: 96000005 [#1] PREEMPT SMP
[   35.638996] Modules linked in:
[   35.639287] CPU: 3 PID: 226 Comm: surfaceflinger Not tainted 4.4.126
[   35.639873] Hardware name: Strides RK3399 Development Q7 Board Rev
[   35.640483] task: ffffffc0f100ec00 task.stack:ffffffc0eeaac000
[   35.641011] PC is at vop_crtc_bandwidth+0x22c/0x310
[   35.641448] LR is at vop_crtc_bandwidth+0x118/0x310
[   35.641883] pc : [<ffffff80084af988>] lr :[<ffffff80084af874>] pstate: 60400145
[   35.642526] sp : ffffffc0eeaafad0
[   35.642821] x29: ffffffc0eeaafad0 x28: 0000000000000020
...
[   35.780538] [<ffffff80084af988>] vop_crtc_bandwidth+0x22c/0x310
[   35.781057] [<ffffff80084a87b4>] rockchip_drm_atomic_commit+0xb0/0x1d0
[   35.781634] [<ffffff8008491678>] drm_atomic_commit+0x64/0x70
[   35.782140] [<ffffff8008492b08>] drm_mode_atomic_ioctl+0x5d0/0x6a0
[   35.782683] [<ffffff8008476b30>] drm_ioctl+0x2e4/0x400
[   35.783145] [<ffffff80081d0db0>] do_vfs_ioctl+0xa4/0x7d8
[   35.783616] [<ffffff80081d1540>] SyS_ioctl+0x5c/0x8c
[   35.784055] [<ffffff80080832f0>] el0_svc_naked+0x24/0x28
[   35.784528] Code: 7100113f 54ffff41 f9412ca0 f9400000 (f9400002)
[   35.785256] ---[ end trace b3812e3405f44f95 ]---
...

Change-Id: I695c9628b155294adcf5135f82e4af901ce1b82c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index bddd70f597a45..51d735b85b821 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -2314,7 +2314,8 @@ static size_t vop_plane_line_bandwidth(struct drm_plane_state *pstate)
 	int vskiplines = scl_get_vskiplines(src_height, dest_height);
 	size_t bandwidth;
 
-	if (!src_width || !src_height || !dest_width || !dest_height)
+	if (src_width <= 0 || src_height <= 0 || dest_width <= 0 ||
+	    dest_height <= 0)
 		return 0;
 
 	bandwidth = src_width * bpp / 8;

From af49eadb95d850c3271b2e3625bfc4e07d5fde2a Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 13 Sep 2018 17:28:03 +0800
Subject: [PATCH 1837/1852] media: soc_camera: ov9750 fix flip and exposure bug

Change-Id: I7f90247dd3f2be32c26b68a4f074b20d09e06cb2
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../rockchip/ov9750_v4l2-i2c-subdev.c         | 58 +++++++++++--------
 1 file changed, 35 insertions(+), 23 deletions(-)

diff --git a/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
index 3e7476860fd26..e8b39cf5c3497 100644
--- a/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
+++ b/drivers/media/i2c/soc_camera/rockchip/ov9750_v4l2-i2c-subdev.c
@@ -135,19 +135,20 @@ static struct ov_camera_module_reg ov9750_init_tab_1280_960_30fps[] = {
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3601, 0x60},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3602, 0x22},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3610, 0xe8},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x5c},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3612, 0x18},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3613, 0x3a},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x56},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3612, 0x48},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3613, 0x5a},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3614, 0x91},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3615, 0x79},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3617, 0x57},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3621, 0x90},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3622, 0x00},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3623, 0x00},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3625, 0x07},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3633, 0x10},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3634, 0x10},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3635, 0x14},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x13},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3650, 0x00},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3652, 0xff},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3654, 0x00},
@@ -188,7 +189,7 @@ static struct ov_camera_module_reg ov9750_init_tab_1280_960_30fps[] = {
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37b5, 0x36},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c2, 0x04},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c5, 0x00},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c7, 0x31},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c7, 0x38},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37c8, 0x00},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x37d1, 0x13},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3800, 0x00},
@@ -297,9 +298,9 @@ static struct ov_camera_module_reg ov9750_init_tab_1280_960_30fps[] = {
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x300f, 0x00},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3733, 0x10},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3610, 0xe8},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x5c},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3611, 0x56},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3635, 0x14},
-{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x14},
+{OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3636, 0x13},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3620, 0x84},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x3614, 0x96},
 {OV_CAMERA_MODULE_REG_TYPE_DATA, 0x481f, 0x30},
@@ -333,7 +334,9 @@ static struct ov_camera_module_config ov9750_configs[] = {
 		.reg_table_num_entries =
 			ARRAY_SIZE(ov9750_init_tab_1280_960_30fps),
 		.v_blanking_time_us = 3078,
-		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 400, OV9750_EXT_CLK)
+		.max_exp_gain_h = 16,
+		.max_exp_gain_l = 0,
+		PLTFRM_CAM_ITF_MIPI_CFG(0, 2, 402, OV9750_EXT_CLK)
 	}
 };
 
@@ -378,7 +381,7 @@ static int ov9750_set_flip(struct ov_camera_module *cam_mod,
 	}
 
 	if (mode == OV_FLIP_BIT_MASK) {
-		match_reg[0] = 0xc6;
+		match_reg[0] = 0x86;
 		match_reg[1] = 0x40;
 		match_reg[2] = 0x20;
 	} else if (mode == OV_MIRROR_BIT_MASK) {
@@ -387,7 +390,7 @@ static int ov9750_set_flip(struct ov_camera_module *cam_mod,
 		match_reg[2] = 0x00;
 	} else if (mode == (OV_MIRROR_BIT_MASK |
 		OV_FLIP_BIT_MASK)) {
-		match_reg[0] = 0xc6;
+		match_reg[0] = 0x86;
 		match_reg[1] = 0x46;
 		match_reg[2] = 0x20;
 	} else {
@@ -442,10 +445,9 @@ static int OV9750_auto_adjust_fps(struct ov_camera_module *cam_mod,
 	int ret;
 	u32 vts;
 
-	if ((cam_mod->exp_config.exp_time + OV9750_COARSE_INTG_TIME_MAX_MARGIN)
+	if ((exp_time + OV9750_COARSE_INTG_TIME_MAX_MARGIN)
 		> cam_mod->vts_min)
-		vts = cam_mod->exp_config.exp_time +
-			OV9750_COARSE_INTG_TIME_MAX_MARGIN;
+		vts = exp_time + OV9750_COARSE_INTG_TIME_MAX_MARGIN;
 	else
 		vts = cam_mod->vts_min;
 
@@ -516,6 +518,7 @@ static int ov9750_write_aec(struct ov_camera_module *cam_mod)
 		u32 a_gain = cam_mod->exp_config.gain;
 		u32 exp_time = cam_mod->exp_config.exp_time;
 
+		mutex_lock(&cam_mod->lock);
 		a_gain = a_gain * cam_mod->exp_config.gain_percent / 100;
 		if (a_gain < 0x80)
 			a_gain = 0x80;
@@ -551,13 +554,14 @@ static int ov9750_write_aec(struct ov_camera_module *cam_mod)
 			ret |= ov9750_set_vts(cam_mod, cam_mod->exp_config.vts_value);
 
 		if (cam_mod->state == OV_CAMERA_MODULE_STREAMING) {
-			ret = ov_camera_module_write_reg(cam_mod,
+			ret |= ov_camera_module_write_reg(cam_mod,
 				OV9750_AEC_GROUP_UPDATE_ADDRESS,
 				OV9750_AEC_GROUP_UPDATE_END_DATA);
-			ret = ov_camera_module_write_reg(cam_mod,
+			ret |= ov_camera_module_write_reg(cam_mod,
 				OV9750_AEC_GROUP_UPDATE_ADDRESS,
 				OV9750_AEC_GROUP_UPDATE_END_LAUNCH);
 		}
+		mutex_unlock(&cam_mod->lock);
 	}
 
 	if (IS_ERR_VALUE(ret))
@@ -774,6 +778,8 @@ static int ov9750_g_timings(struct ov_camera_module *cam_mod,
 			cam_mod->active_config->frm_intrvl.interval.denominator
 			* vts
 			* timings->line_length_pck;
+
+	timings->frame_length_lines = vts;
 	return ret;
 err:
 	ov_camera_module_pr_err(cam_mod,
@@ -827,13 +833,8 @@ static int ov9750_s_ext_ctrls(struct ov_camera_module *cam_mod,
 	int ret = 0;
 
 	/* Handles only exposure and gain together special case. */
-	if (ctrls->count == 1)
-		ret = ov9750_s_ctrl(cam_mod, ctrls->ctrls[0].id);
-	else if ((ctrls->count >= 3) &&
-		(ctrls->ctrls[0].id == V4L2_CID_GAIN ||
-		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE ||
-		ctrls->ctrls[1].id == V4L2_CID_GAIN ||
-		ctrls->ctrls[1].id == V4L2_CID_EXPOSURE))
+	if ((ctrls->ctrls[0].id == V4L2_CID_GAIN ||
+		ctrls->ctrls[0].id == V4L2_CID_EXPOSURE))
 		ret = ov9750_write_aec(cam_mod);
 	else
 		ret = -EINVAL;
@@ -860,7 +861,9 @@ static int ov9750_start_streaming(struct ov_camera_module *cam_mod)
 	ret = OV9750_g_VTS(cam_mod, &cam_mod->vts_min);
 	if (IS_ERR_VALUE(ret))
 		goto err;
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0x01);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -879,7 +882,9 @@ static int ov9750_stop_streaming(struct ov_camera_module *cam_mod)
 	int ret = 0;
 
 	ov_camera_module_pr_info(cam_mod, "\n");
+	mutex_lock(&cam_mod->lock);
 	ret = ov_camera_module_write_reg(cam_mod, 0x0100, 0x00);
+	mutex_unlock(&cam_mod->lock);
 	if (IS_ERR_VALUE(ret))
 		goto err;
 
@@ -940,6 +945,7 @@ static struct v4l2_subdev_core_ops ov9750_camera_module_core_ops = {
 
 static struct v4l2_subdev_video_ops ov9750_camera_module_video_ops = {
 	.s_frame_interval = ov_camera_module_s_frame_interval,
+	.g_frame_interval = ov_camera_module_g_frame_interval,
 	.s_stream = ov_camera_module_s_stream
 };
 
@@ -963,10 +969,12 @@ static struct ov_camera_module_custom_config ov9750_custom_config = {
 	.s_ext_ctrls = ov9750_s_ext_ctrls,
 	.g_timings = ov9750_g_timings,
 	.set_flip = ov9750_set_flip,
+	.s_vts = OV9750_auto_adjust_fps,
 	.check_camera_id = ov9750_check_camera_id,
 	.configs = ov9750_configs,
 	.num_configs = ARRAY_SIZE(ov9750_configs),
-	.power_up_delays_ms = {5, 30, 30}
+	.power_up_delays_ms = {5, 30, 30},
+	.exposure_valid_frame = {4, 4}
 };
 
 static int ov9750_probe(struct i2c_client *client,
@@ -983,8 +991,11 @@ static int ov9750_probe(struct i2c_client *client,
 	v4l2_i2c_subdev_init(&ov9750[cam_num].sd, client,
 		&ov9750_camera_module_ops);
 
+	ov9750[cam_num].sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 	ov9750[cam_num].custom = ov9750_custom_config;
 
+	mutex_init(&ov9750[cam_num].lock);
+
 	ret = of_property_read_u32(np, "as-master", &as_master);
 	ov9750[cam_num].as_master = (ret == 0) ? as_master : -1;
 	cam_num++;
@@ -1004,6 +1015,7 @@ static int ov9750_remove(struct i2c_client *client)
 	if (!client->adapter)
 		return -ENODEV;
 
+	mutex_destroy(&cam_mod->lock);
 	ov_camera_module_release(cam_mod);
 
 	dev_info(&client->dev, "removed\n");

From 4e1f7dc54768cc5e8884921584085491696ca875 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Mon, 17 Sep 2018 19:53:25 +0800
Subject: [PATCH 1838/1852] arm64: dts: rockchip: Add support rgb888 output for
 rk3308b

Change-Id: I4b9e50fe28b11602886d57098bfa2573d3a307e4
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 32 ++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 845e983db139e..5578630273229 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -1702,6 +1702,38 @@
 					/* d17 */
 					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
 			};
+
+			lcdc_rgb888_m0: lcdc-rgb888-m0 {
+				rockchip,pins =
+					/* d18 */
+					<1 RK_PC6 RK_FUNC_2 &pcfg_pull_none>,
+					/* d19 */
+					<1 RK_PC7 RK_FUNC_2 &pcfg_pull_none>,
+					/* d20 */
+					<2 RK_PB1 RK_FUNC_4 &pcfg_pull_none>,
+					/* d21 */
+					<2 RK_PB2 RK_FUNC_4 &pcfg_pull_none>,
+					/* d22 */
+					<2 RK_PB7 RK_FUNC_4 &pcfg_pull_none>,
+					/* d23 */
+					<2 RK_PC0 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb888_m1: lcdc-rgb888-m1 {
+				rockchip,pins =
+					/* d18 */
+					<3 RK_PA6 RK_FUNC_2 &pcfg_pull_none>,
+					/* d19 */
+					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
+					/* d20 */
+					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>,
+					/* d21 */
+					<3 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
+					/* d22 */
+					<3 RK_PB2 RK_FUNC_2 &pcfg_pull_none>,
+					/* d23 */
+					<3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
+			};
 		};
 
 		pdm_m0 {

From 32e84415608e281349af8342553094a6ead74c0f Mon Sep 17 00:00:00 2001
From: Felipe Balbi <felipe.balbi@linux.intel.com>
Date: Tue, 6 Jun 2017 14:47:29 +0300
Subject: [PATCH 1839/1852] BACKPORT: usb: gadget: composite: make sure to
 reactivate function on unbind

If a function sets bind_deactivated flag, upon removal we will be left
with an unbalanced deactivation. Let's make sure that we conditionally
call usb_function_activate() from usb_remove_function() and make sure
usb_remove_function() is called from remove_config().

Change-Id: I4d7a70560961da90561a7999ac4e58a294c1a0cf
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 0e3e97526a850f97c9fe8b646937b3a2bef58290)
---
 drivers/usb/gadget/composite.c | 11 +++++------
 drivers/usb/gadget/configfs.c  |  3 +++
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 49b8adbf7ace1..3b2863a697a4a 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -263,6 +263,9 @@ void usb_remove_function(struct usb_configuration *c, struct usb_function *f)
 	list_del(&f->list);
 	if (f->unbind)
 		f->unbind(c, f);
+
+	if (f->bind_deactivated)
+		usb_function_activate(f);
 }
 EXPORT_SYMBOL_GPL(usb_remove_function);
 
@@ -866,12 +869,8 @@ static void remove_config(struct usb_composite_dev *cdev,
 
 		f = list_first_entry(&config->functions,
 				struct usb_function, list);
-		list_del(&f->list);
-		if (f->unbind) {
-			DBG(cdev, "unbind function '%s'/%p\n", f->name, f);
-			f->unbind(config, f);
-			/* may free memory for "f" */
-		}
+
+		usb_remove_function(config, f);
 	}
 	list_del(&config->list);
 	if (config->unbind) {
diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c
index f58afe5b92add..567be635a4580 100644
--- a/drivers/usb/gadget/configfs.c
+++ b/drivers/usb/gadget/configfs.c
@@ -1255,6 +1255,9 @@ static void purge_configs_funcs(struct gadget_info *gi)
 						" '%s'/%p\n", f->name, f);
 				f->unbind(c, f);
 			}
+
+			if (f->bind_deactivated)
+				usb_function_activate(f);
 		}
 		c->next_interface_id = 0;
 		memset(c->interface, 0, sizeof(c->interface));

From 1569af90065581e933f0e875c5987674ec349bd0 Mon Sep 17 00:00:00 2001
From: Lin Huang <hl@rock-chips.com>
Date: Tue, 18 Sep 2018 15:48:17 +0800
Subject: [PATCH 1840/1852] arm64: rockchip_linux_defconfig: enable
 console-ramoops

Change-Id: Iac724f137c29b6814b4947f9c571f76ea5220923
Signed-off-by: Lin Huang <hl@rock-chips.com>
---
 arch/arm64/configs/rockchip_linux_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/configs/rockchip_linux_defconfig b/arch/arm64/configs/rockchip_linux_defconfig
index ff9ab7fba87be..14aa7f028b895 100644
--- a/arch/arm64/configs/rockchip_linux_defconfig
+++ b/arch/arm64/configs/rockchip_linux_defconfig
@@ -487,6 +487,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_SQUASHFS=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_RAM=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y

From f05b319e2e143d0f088d84467b0ca277755befa3 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Wed, 19 Sep 2018 09:10:53 +0800
Subject: [PATCH 1841/1852] drm/rockchip: vop: restore BCSH state when exit
 from suspend state

when vop enter suspend state all the register will be restore to init
value, so when resume we need to config the BCSH register, and the
vop->mode_update parameter can indicate this condition.

Change-Id: Ifd5e7eb406e0ac56c11f74391290348600211e89
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 51d735b85b821..9bfc9261a3010 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -3243,10 +3243,18 @@ static void vop_tv_config_update(struct drm_crtc *crtc,
 
 	if (!s->tv_state)
 		return;
-
+	/*
+	 * The BCSH only need to config once except one of the following
+	 * condition changed:
+	 *   1. tv_state: include brightness,contrast,saturation and hue;
+	 *   2. yuv_overlay: it is related to BCSH r2y module;
+	 *   3. mode_update: it is indicate mode change and resume from suspend;
+	 *   4. bcsh_en: control the BCSH module enable or disable state;
+	 *   5. bus_format: it is related to BCSH y2r module;
+	 */
 	if (!memcmp(s->tv_state,
 		    &vop->active_tv_state, sizeof(*s->tv_state)) &&
-	    s->yuv_overlay == old_s->yuv_overlay &&
+	    s->yuv_overlay == old_s->yuv_overlay && vop->mode_update &&
 	    s->bcsh_en == old_s->bcsh_en && s->bus_format == old_s->bus_format)
 		return;
 

From 1e27211d0c5426449c3b3963871ef289e8dbddfd Mon Sep 17 00:00:00 2001
From: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date: Tue, 18 Sep 2018 08:59:20 +0800
Subject: [PATCH 1842/1852] arm64: dts: rockchip: move camera node config to
 dts for rk3326-863-lp3-v10

Move rkisp1 and gc0312/gc2145, cif and cif_sensor
node config to dts level not in dtsi.

For rkisp1 and gc0312/gc2145 don't need by rk3326-863-lp3-v10.dts,
otherwise it causes 8.0 863 machine camera register failed;
And cif with cif_sensor don't need by rk3326-863-lp3-v10-avb.dts,
otherwise it causes 9.0 863 machine camera register failed;

So need to modify rk3326-863-lp3-v10-avb.dts and
rk3326-863-lp3-v10.dts separately for camera node configs

Change-Id: Ieac54c39cec1f2eae70e0d41829cc0ea1b6a3eb2
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
---
 .../dts/rockchip/rk3326-863-lp3-v10-avb.dts   | 81 +++++++++++++++++++
 .../boot/dts/rockchip/rk3326-863-lp3-v10.dts  |  8 ++
 .../boot/dts/rockchip/rk3326-863-lp3-v10.dtsi | 72 -----------------
 3 files changed, 89 insertions(+), 72 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts
index 2b69d08f63af3..ce9dc36787ddb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10-avb.dts
@@ -28,3 +28,84 @@
 		};
 	};
 };
+
+&i2c2 {
+	status = "okay";
+
+	gc0312@21 {
+		status = "okay";
+		compatible = "galaxycore,gc0312";
+		reg = <0x21>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc2v8_dvp>;
+		dovdd-supply = <&vcc1v8_dvp>;
+		dvdd-supply = <&vcc1v8_dvp>;
+
+		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc0312_out: endpoint {
+				remote-endpoint = <&dvp_in_fcam>;
+			};
+		};
+	};
+
+	gc2145@3c {
+		status = "okay";
+		compatible = "galaxycore,gc2145";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+
+		clocks = <&cru SCLK_CIF_OUT>;
+		clock-names = "xvclk";
+
+		avdd-supply = <&vcc2v8_dvp>;
+		dovdd-supply = <&vcc1v8_dvp>;
+		dvdd-supply = <&vcc1v8_dvp>;
+
+		pwdn-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+
+		port {
+			gc2145_out: endpoint {
+				remote-endpoint = <&dvp_in_bcam>;
+			};
+		};
+	};
+};
+
+&isp_mmu {
+	status = "okay";
+};
+
+&rkisp1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&cif_clkout_m0 &dvp_d0d1_m0 &dvp_d2d9_m0 &dvp_d10d11_m0>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dvp_in_fcam: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&gc0312_out>;
+			};
+
+			dvp_in_bcam: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&gc2145_out>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
index 37ef6af0b5ac5..7a399b3356ac4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts
@@ -12,6 +12,14 @@
 	compatible = "rockchip,rk3326-863-lp3-v10", "rockchip,rk3326";
 };
 
+&cif {
+	status = "okay";
+};
+
+&cif_sensor {
+	status = "okay";
+};
+
 &firmware_android {
 	compatible = "android,firmware";
 	fstab {
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
index 270acbad5e73e..0a2330907d8a8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
@@ -156,78 +156,6 @@
 	};
 };
 
-&i2c2 {
-	status = "okay";
-
-	gc0312@21 {
-		status = "okay";
-		compatible = "galaxycore,gc0312";
-		reg = <0x21>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&cif_clkout_m0>;
-
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "xvclk";
-
-		avdd-supply = <&vcc2v8_dvp>;
-		dovdd-supply = <&vcc1v8_dvp>;
-		dvdd-supply = <&vcc1v8_dvp>;
-
-		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
-
-		port {
-			gc0312_out: endpoint {
-				remote-endpoint = <&dvp_in_fcam>;
-			};
-		};
-	};
-
-	gc2145@3c {
-		status = "okay";
-		compatible = "galaxycore,gc2145";
-		reg = <0x3c>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&cif_clkout_m0>;
-
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "xvclk";
-
-		avdd-supply = <&vcc2v8_dvp>;
-		dovdd-supply = <&vcc1v8_dvp>;
-		dvdd-supply = <&vcc1v8_dvp>;
-
-		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
-
-		port {
-			gc2145_out: endpoint {
-				remote-endpoint = <&dvp_in_bcam>;
-			};
-		};
-	};
-};
-
-&rkisp1 {
-	status = "okay";
-
-	pinctrl-names = "default";
-	pinctrl-0 = <&cif_clkout_m0 &dvp_d0d1_m0 &dvp_d2d9_m0 &dvp_d10d11_m0>;
-
-	ports {
-		port@0 {
-			dvp_in_fcam: endpoint@0 {
-				remote-endpoint = <&gc0312_out>;
-			};
-
-			dvp_in_bcam: endpoint@1 {
-				remote-endpoint = <&gc2145_out>;
-			};
-		};
-	};
-};
-
-&isp_mmu {
-	status = "okay";
-};
 
 &display_subsystem {
 	status = "okay";

From ee603ddce360bb6814bcfbf3aefdb2a9fd642f93 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 21 Sep 2018 15:11:23 +0800
Subject: [PATCH 1843/1852] clk: rockchip: rk3308: Fix spi clock's name

Change-Id: Id15d23786eed3e0105ad4f53858421a222e680d9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3308.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3308.c b/drivers/clk/rockchip/clk-rk3308.c
index 76945c491f817..4d423d3338789 100644
--- a/drivers/clk/rockchip/clk-rk3308.c
+++ b/drivers/clk/rockchip/clk-rk3308.c
@@ -414,13 +414,13 @@ static struct rockchip_clk_branch rk3308_clk_branches[] __initdata = {
 			RK3308_CLKSEL_CON(75), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(15), 1, GFLAGS),
 
-	COMPOSITE(SCLK_SPI0, "clk_isp0", mux_dpll_vpll0_xin24m_p, 0,
+	COMPOSITE(SCLK_SPI0, "clk_spi0", mux_dpll_vpll0_xin24m_p, 0,
 			RK3308_CLKSEL_CON(30), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(3), 2, GFLAGS),
-	COMPOSITE(SCLK_SPI1, "clk_isp1", mux_dpll_vpll0_xin24m_p, 0,
+	COMPOSITE(SCLK_SPI1, "clk_spi1", mux_dpll_vpll0_xin24m_p, 0,
 			RK3308_CLKSEL_CON(31), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(3), 3, GFLAGS),
-	COMPOSITE(SCLK_SPI2, "clk_isp2", mux_dpll_vpll0_xin24m_p, 0,
+	COMPOSITE(SCLK_SPI2, "clk_spi2", mux_dpll_vpll0_xin24m_p, 0,
 			RK3308_CLKSEL_CON(32), 14, 2, MFLAGS, 0, 7, DFLAGS,
 			RK3308_CLKGATE_CON(3), 4, GFLAGS),
 

From 2fbbede0c94b53245f47c6b56ee26dc0d0fa73ae Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Fri, 21 Sep 2018 14:39:22 +0800
Subject: [PATCH 1844/1852] arm64: dts: rockchip: fixes the dmc for
 rk3399-excavator-sapphire

This patches fixes the vop bandwidth control on rk3399 excavator
sapphire board.

Fixes: 739d1ab1c990
("arm64: dts: rockchip: enable the dmc for rk3399 sapphire excavator")

Change-Id: Icad42cfc4e883668dc3987f1a5561a781d0591b8
Reported-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 .../arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
index c406e54b4a870..6cb9bcd6d9844 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
@@ -150,9 +150,10 @@
 	>;
 	vop-bw-dmc-freq = <
 	/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
-		0       577      200000
-		578     1701     300000
-		1702    99999    400000
+		0       762      200000
+		763     1893     400000
+		1894    3012     528000
+		3013    99999    800000
 	>;
 	auto-min-freq = <200000>;
 };

From c7dc52e4ab63afc74f3f5f6a263da15580ceb27b Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 18 Sep 2018 11:02:38 +0800
Subject: [PATCH 1845/1852] ARM: dts: rockchip: Add vpu function for rk312x

Add the vpu_combo and two sub devices, vpu and hevc,
both of which with iommu attached.

Change-Id: I32b931dc3d967e6569a53e8119434bca2c16f381
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/rk312x.dtsi | 56 ++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index af220394411b7..52b2306bfe92e 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -465,14 +465,34 @@
 		};
 	};
 
-	vpu: vpu_service@10104000 {
-		compatible = "rockchip,vpu_service";
+	hevc: hevc_service@10104000 {
+		compatible = "rockchip,sub";
+		reg = <0x10104000 0x400>;
+		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		power-domains = <&power RK3128_PD_VIDEO>;
+		dev_mode = <1>;
+		name = "hevc_service";
+		iommus = <&hevc_mmu>;
+		status = "disabled";
+	};
+
+	hevc_mmu: iommu@10104440 {
+		compatible = "rockchip,iommu";
+		reg = <0x10104440 0x40>, <0x10104480 0x40>;
+		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hevc_mmu";
+		power-domains = <&power RK3128_PD_VIDEO>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vpu: vpu_service@10106000 {
+		compatible = "rockchip,sub";
+		reg = <0x10106000 0x800>;
 		rockchip,grf = <&grf>;
-		iommus = <&vpu_mmu>;
-		iommu_enabled = <1>;
-		reg = <0x10104000 0x800>;
 		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-			<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "irq_enc", "irq_dec";
 		clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>;
 		clock-names = "aclk_vcodec", "hclk_vcodec";
@@ -481,20 +501,40 @@
 		power-domains = <&power RK3128_PD_VIDEO>;
 		name = "vpu_service";
 		dev_mode = <0>;
+		iommus = <&vpu_mmu>;
 		/* 0 means ion, 1 means drm */
 		allocator = <1>;
 		status = "disabled";
 	};
 
-	vpu_mmu: iommu@10104800 {
+	vpu_mmu: iommu@10106800 {
 		compatible = "rockchip,iommu";
-		reg = <0x10104800 0x40>;
+		reg = <0x10106800 0x40>;
 		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vpu_mmu";
 		clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>;
 		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3128_PD_VIDEO>;
 		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vpu_combo: vpu_combo {
+		compatible = "rockchip,vpu_combo";
+		subcnt = <2>;
+		rockchip,sub = <&vpu>, <&hevc>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>,
+			 <&cru SCLK_HEVC_CORE>;
+		clock-names = "aclk_vcodec", "hclk_vcodec",
+			      "clk_core";
+		resets = <&cru SRST_VCODEC_H>, <&cru SRST_VCODEC_A>,
+		         <&cru SRST_HEVC_CORE>;
+		reset-names = "video_h", "video_a", "video";
+		mode_bit = <15>;
+		mode_ctrl = <0x144>;
+		name = "vpu_combo";
+		status = "disabled";
 	};
 
 	iep: iep@10108000 {

From ded6aa05016d35989d0537c7df48d0495b494020 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 18 Sep 2018 11:27:04 +0800
Subject: [PATCH 1846/1852] ARM: dts: rockchip: enable vpu for px3se evb board

Change-Id: Ifb4d782f4765c2266bf1417cc52a2985ee34934c
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/px3se-evb.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts
index 093251b3e30c5..a5eb2b543ca0f 100644
--- a/arch/arm/boot/dts/px3se-evb.dts
+++ b/arch/arm/boot/dts/px3se-evb.dts
@@ -378,6 +378,14 @@
 	mali-supply = <&vdd_log>;
 };
 
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
+	status = "okay";
+};
+
 &hdmi {
 	status = "okay";
 };
@@ -673,6 +681,18 @@
 	status = "okay";
 };
 
+&vpu {
+	status = "okay";
+};
+
+&vpu_combo {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
 &pinctrl {
 	camera {
 		cif_rst: cif-rst {

From 887259797c2abb1455a65af6592d7d6dc026eb57 Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Thu, 20 Sep 2018 15:24:35 +0800
Subject: [PATCH 1847/1852] arm64: dts: rockchip: rk3399 fix node unit name
 coding style

Fix node unit name coding style, such as unit name vs reg, or
unit name vs format.

Change-Id: I8a3e28cc1949acc23622a4a1a20e4ab1479bf512
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0e3d7c9da3eec..815a8c1312393 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -403,7 +403,7 @@
 		status = "disabled";
 	};
 
-	usbdrd3_0: usb@fe800000 {
+	usbdrd3_0: usb0 {
 		compatible = "rockchip,rk3399-dwc3";
 		clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
 			 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
@@ -416,6 +416,7 @@
 		#size-cells = <2>;
 		ranges;
 		status = "disabled";
+
 		usbdrd_dwc3_0: dwc3@fe800000 {
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe800000 0x0 0x100000>;
@@ -435,7 +436,7 @@
 		};
 	};
 
-	usbdrd3_1: usb@fe900000 {
+	usbdrd3_1: usb1 {
 		compatible = "rockchip,rk3399-dwc3";
 		clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
 			 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
@@ -448,6 +449,7 @@
 		#size-cells = <2>;
 		ranges;
 		status = "disabled";
+
 		usbdrd_dwc3_1: dwc3@fe900000 {
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe900000 0x0 0x100000>;
@@ -2075,7 +2077,7 @@
 		};
 	};
 
-	mipi_dphy_tx1rx1: mipi-dphy-tx1rx1@0xff968000 {
+	mipi_dphy_tx1rx1: mipi-dphy-tx1rx1@ff968000 {
 		compatible = "rockchip,rk3399-mipi-dphy";
 		reg = <0x0 0xff968000 0x0 0x8000>;
 		clocks = <&cru SCLK_MIPIDPHY_REF>,

From 24f079c9439781eb77d2538ab95031b2af4cc1a9 Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Fri, 21 Sep 2018 15:53:49 +0800
Subject: [PATCH 1848/1852] ARM: config: rockchip_linux_defconfig: Remove
 CIF_ISP10 config

Change-Id: Id517cd9b504e68d6f9926d43b6fa648b54c0a59d
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 arch/arm/configs/rockchip_linux_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/configs/rockchip_linux_defconfig b/arch/arm/configs/rockchip_linux_defconfig
index f34123535b820..4eb7c9023b32c 100644
--- a/arch/arm/configs/rockchip_linux_defconfig
+++ b/arch/arm/configs/rockchip_linux_defconfig
@@ -295,7 +295,6 @@ CONFIG_USB_VIDEO_CLASS=y
 # CONFIG_USB_GSPCA is not set
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
-CONFIG_VIDEO_RK_CIF_ISP10=y
 CONFIG_VIDEO_ROCKCHIP_CIF=y
 CONFIG_VIDEO_ROCKCHIP_ISP1=y
 CONFIG_V4L_MEM2MEM_DRIVERS=y

From bf6ad04ad07098a344f1e8fdfc95359b8e3550e3 Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Fri, 21 Sep 2018 21:28:21 +0800
Subject: [PATCH 1849/1852] arm: dts: rk3288-evb-rk808-linux: support
 isp1&ov13850 node

Delete cif_isp10 and all cif_isp10_cameras node

Change-Id: Ied1f36e6392eaa7d0cf32a491bb42072a9dd6233
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-evb-rk808-linux.dts | 89 +++++++++++---------
 1 file changed, 47 insertions(+), 42 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
index 86c532ea161cb..d0487f8b794f0 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
@@ -41,6 +41,7 @@
 /dts-v1/;
 #include "rk3288-evb.dtsi"
 #include "rk3288-linux.dtsi"
+#include "rk3288-rkisp1.dtsi"
 
 / {
 	compatible = "rockchip,rk3288-evb-rk808-linux", "rockchip,rk3288";
@@ -490,48 +491,65 @@
 &i2c3 {
 	status = "okay";
 
-	camera0: camera-module@10 {
+	ov13850: ov13850@10 {
+		compatible = "ovti,ov13850";
 		status = "okay";
-		compatible = "omnivision,ov13850-v4l2-i2c-subdev";
 		reg = <0x10>;
-		device_type = "v4l2-i2c-subdev";
 		clocks = <&cru SCLK_VIP_OUT>;
-		clock-names = "clk_cif_out";
-		pinctrl-names = "rockchip,camera_default",
-				"rockchip,camera_sleep";
-		pinctrl-0 = <&cam0_default_pins>;
-		pinctrl-1 = <&cam0_sleep_pins>;
-		rockchip,pd-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
-		rockchip,pwr-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
-		rockchip,rst-gpio = <&gpio7 21 GPIO_ACTIVE_LOW>;
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "cmk-cb0695-fv1";
-		rockchip,camera-module-len-name = "lg9569a2";
-		rockchip,camera-module-fov-h = "66.0";
-		rockchip,camera-module-fov-v = "50.1";
-		rockchip,camera-module-orientation = <0>;
-		rockchip,camera-module-iq-flip = <0>;
-		rockchip,camera-module-iq-mirror = <0>;
-		rockchip,camera-module-flip = <1>;
-		rockchip,camera-module-mirror = <0>;
-		rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
-		rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
-		rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
-		rockchip,camera-module-flash-support = <1>;
-		rockchip,camera-module-mipi-dphy-index = <0>;
+		clock-names = "xvclk";
+
+		reset-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+		pwdn-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
+
+		port {
+			cam_out: endpoint {
+				remote-endpoint = <&mipi_in_cam>;
+				data-lanes = <1 2>;
+			};
+		};
 	};
 };
 
-&cif_isp0 {
-	rockchip,camera-modules-attached = <&camera0>;
+&isp {
 	status = "okay";
+
+	port {
+		isp_mipi_in: endpoint {
+			remote-endpoint = <&dphy_rx0_out>;
+		};
+	};
 };
 
 &isp_mmu {
 	status = "okay";
 };
 
+&mipi_phy_rx0 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			mipi_in_cam: endpoint {
+				remote-endpoint = <&cam_out>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dphy_rx0_out: endpoint {
+				remote-endpoint = <&isp_mipi_in>;
+			};
+		};
+	};
+};
+
 &rga {
 	status = "okay";
 };
@@ -566,17 +584,4 @@
 			rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
-
-	cam_pins {
-		cam0_default_pins: cam0-default-pins {
-			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>,
-					<2 15 RK_FUNC_GPIO &pcfg_pull_none>,
-					<2 11 RK_FUNC_1 &pcfg_pull_none>;
-		};
-		cam0_sleep_pins: cam0-sleep-pins {
-			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>,
-					<2 15 RK_FUNC_GPIO &pcfg_pull_none>,
-					<2 11 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
 };

From 56f0268ff428abf0ee7806c604964c8e89dda89d Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Thu, 13 Sep 2018 21:19:10 +0800
Subject: [PATCH 1850/1852] ARM64: config: rockchip_linux_defconfig: make isp1
 work as default config

Change-Id: I4ff3160790595a4c8e80366c954b4c15fae82b69
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 arch/arm64/configs/rockchip_linux_defconfig | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm64/configs/rockchip_linux_defconfig b/arch/arm64/configs/rockchip_linux_defconfig
index 14aa7f028b895..8095d4486aba1 100644
--- a/arch/arm64/configs/rockchip_linux_defconfig
+++ b/arch/arm64/configs/rockchip_linux_defconfig
@@ -294,14 +294,12 @@ CONFIG_USB_VIDEO_CLASS=y
 # CONFIG_USB_GSPCA is not set
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=y
-CONFIG_VIDEO_RK_CIF_ISP10=y
+CONFIG_VIDEO_ROCKCHIP_ISP1=y
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_ROCKCHIP_RGA=y
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
 # CONFIG_VIDEO_IR_I2C is not set
 CONFIG_VIDEO_OV4689=y
-CONFIG_VIDEO_OV7750=y
-CONFIG_VIDEO_ADV7181=y
 CONFIG_VIDEO_OV13850=y
 # CONFIG_DVB_AU8522_V4L is not set
 # CONFIG_DVB_TUNER_DIB0070 is not set

From 4311650fc8ae85d181313f08ab482e3dacc7bf4d Mon Sep 17 00:00:00 2001
From: Leo Wen <leo.wen@rock-chips.com>
Date: Fri, 21 Sep 2018 16:39:09 +0800
Subject: [PATCH 1851/1852] arm64: dts: rk3399-sapphire-excavator-linux:
 support isp1&ov13850 node

Delete cif_isp10 and all cif_isp10_cameras node

Change-Id: I6f5bf3ae7001fcb456a02abbb3ef327ffedc3b76
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
---
 .../rk3399-sapphire-excavator-linux.dts       | 254 +++++++-----------
 1 file changed, 104 insertions(+), 150 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
index 6b5e3219407f3..6bf488add069e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
@@ -141,19 +141,101 @@
 	};
 };
 
-&cif_isp0 {
-	rockchip,camera-modules-attached =
-		<&camera0 &camera1 &camera2 &camera3>;
+&rkisp1_0 {
 	status = "okay";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		isp0_mipi_in: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&dphy_rx0_out>;
+		};
+	};
+};
+
+&mipi_dphy_rx0 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in_ucam0: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&ucam_out0>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dphy_rx0_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&isp0_mipi_in>;
+			};
+		};
+	};
 };
 
 &isp0_mmu {
 	status = "okay";
 };
 
-&cif_isp1 {
-	rockchip,camera-modules-attached = <&camera4>;
+&rkisp1_1 {
 	status = "okay";
+
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		isp1_mipi_in: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&dphy_tx1rx1_out>;
+		};
+	};
+};
+
+&mipi_dphy_tx1rx1 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in_ucam1: endpoint@1 {
+				reg = <1>;
+				/* Unlinked camera */
+				//remote-endpoint = <&ucam_out1>;
+				data-lanes = <1 2>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dphy_tx1rx1_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&isp1_mipi_in>;
+			};
+		};
+	};
 };
 
 &isp1_mmu {
@@ -227,158 +309,30 @@
 		rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 	};
 
-	camera0: camera-module@60 {
-		status = "okay";
-		compatible = "ovti,ov7750-v4l2-i2c-subdev";
-		reg = < 0x60 >;
-		device_type = "v4l2-i2c-subdev";
-
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "clk_cif_out";
-
-		pinctrl-names = "rockchip,camera_default",
-			"rockchip,camera_sleep";
-		pinctrl-0 = <&cam0_default_pins>;
-		pinctrl-1 = <&cam0_sleep_pins>;
-
-		rockchip,pwr-gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "cmk-cb0695-fv1";
-		rockchip,camera-module-len-name = "lg9569a2";
-		rockchip,camera-module-fov-h = "133.0";
-		rockchip,camera-module-fov-v = "100.1";
-		rockchip,camera-module-orientation = <0>;
-		rockchip,camera-module-iq-flip = <0>;
-		rockchip,camera-module-iq-mirror = <0>;
-		rockchip,camera-module-flip = <0>;
-		rockchip,camera-module-mirror = <0>;
-
-		rockchip,camera-module-defrect0 = <640 480 0 0 640 480>;
-		rockchip,camera-module-defrect1 = <640 480 0 0 640 480>;
-		rockchip,camera-module-defrect2 = <640 480 0 0 640 480>;
-		rockchip,camera-module-defrect3 = <640 480 0 0 640 480>;
-		rockchip,camera-module-flash-support = <0>;
-		rockchip,camera-module-mipi-dphy-index = <0>;
-	};
-
-	camera1: camera-module@1 {
+	ov13850: ov13850@10 {
+		compatible = "ovti,ov13850";
 		status = "okay";
-		compatible = "toshiba,tc358749xbg-v4l2-i2c-subdev";
-		reg = < 0x0f >;
-		device_type = "v4l2-i2c-subdev";
-
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "clk_cif_out";
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&hdmiin_gpios>;
-
-		//rockchip,pwr-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-		//rckchip,pwr-snd-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>;
-		//rockchip,pwr-trd-gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
-		//rockchip,rst-gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
-		power-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
-		power18-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
-		power33-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
-		csi-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-		stanby-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
-		int-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
-
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-mipi-dphy-index = <0>;
-	};
-
-	camera2: camera-module@10 {
-		status = "okay";
-		compatible = "omnivision,ov13850-v4l2-i2c-subdev";
-		reg = < 0x10 >;
-		device_type = "v4l2-i2c-subdev";
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "clk_cif_out";
-		pinctrl-names = "rockchip,camera_default",
-				"rockchip,camera_sleep";
-		pinctrl-0 = <&cam0_default_pins>;
-		pinctrl-1 = <&cam0_sleep_pins>;
-		rockchip,pd-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
-		//rockchip,pwr-gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-		/* mipi switch control */
-		rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "cmk-cb0695-fv1";
-		rockchip,camera-module-len-name = "lg9569a2";
-		rockchip,camera-module-fov-h = "66.0";
-		rockchip,camera-module-fov-v = "50.1";
-		rockchip,camera-module-orientation = <0>;
-		rockchip,camera-module-iq-flip = <0>;
-		rockchip,camera-module-iq-mirror = <0>;
-		rockchip,camera-module-flip = <1>;
-		rockchip,camera-module-mirror = <0>;
-
-		rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
-		rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
-		rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
-		rockchip,camera-module-flash-support = <1>;
-		rockchip,camera-module-mipi-dphy-index = <0>;
-	};
-
-	camera3: camera-module@36 {
-		status = "okay";
-		compatible = "omnivision,ov4689-v4l2-i2c-subdev";
-		reg = <0x36>;
-		device_type = "v4l2-i2c-subdev";
+		reg = <0x10>;
 		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "clk_cif_out";
-		pinctrl-names = "rockchip,camera_default",
-				"rockchip,camera_sleep";
-		pinctrl-0 = <&cam0_default_pins>;
-		pinctrl-1 = <&cam0_sleep_pins>;
-		rockchip,pd-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
-		//rockchip,pwr-gpio = <&gpio3 13 0>;
-		/* mipi switch control*/
-		rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "LA6111PA";
-		rockchip,camera-module-len-name = "YM6011P";
-		rockchip,camera-module-fov-h = "116";
-		rockchip,camera-module-fov-v = "61";
-		rockchip,camera-module-orientation = <0>;
-		rockchip,camera-module-iq-flip = <0>;
-		rockchip,camera-module-iq-mirror = <0>;
-		rockchip,camera-module-flip = <0>;
-		rockchip,camera-module-mirror = <1>;
-
-		rockchip,camera-module-defrect0 = <2688 1520 0 0 2688 1520>;
-		rockchip,camera-module-flash-support = <0>;
-		rockchip,camera-module-mipi-dphy-index = <0>;
+		clock-names = "xvclk";
+
+		/* conflict with csi-ctl-gpios */
+		reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+		pwdn-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "rockchip,camera_default";
+		pinctrl-0 = <&cif_clkout>;
+
+		port {
+			ucam_out0: endpoint {
+				remote-endpoint = <&mipi_in_ucam0>;
+				data-lanes = <1 2>;
+			};
+		};
 	};
 };
 
 &i2c4 {
 	status = "okay";
-
-	camera4: camera-module@2 {
-		status = "okay";
-		compatible = "adi,adv7181-v4l2-i2c-subdev";
-		reg = < 0x21 >;
-		device_type = "v4l2-i2c-subdev";
-
-		clocks = <&cru SCLK_CIF_OUT>;
-		clock-names = "clk_cif_out";
-
-		pinctrl-names = "rockchip,camera_default",
-			"rockchip,camera_sleep";
-		pinctrl-0 = <&isp_dvp_d0d7>;
-		pinctrl-1 = <&cam0_sleep_pins>;
-
-		rockchip,camera-module-defrect0 = <720 480 0 13 720 480>;
-		rockchip,camera-module-defrect1 = <720 576 0 0 720 576>;
-		rockchip,camera-module-mclk-name = "clk_cif_out";
-		rockchip,camera-module-mipi-dphy-index = <1>;
-	};
 };
 
 &pcie_phy {

From ba3a9e3cb159b4c06ad1eb62ae6e84d12ee535d5 Mon Sep 17 00:00:00 2001
From: Tony <tonymckahan@gmail.com>
Date: Tue, 2 Oct 2018 22:36:24 -0400
Subject: [PATCH 1852/1852] arm64: dts: rockchip: fix typo and remove
 deprecated property for rk3328

---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0d2251c903b1d..138ba21f4f101 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1226,10 +1226,10 @@
 	sdmmc: dwmmc@ff500000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
@@ -1238,10 +1238,10 @@
 	sdio: dwmmc@ff510000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff510000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
@@ -1250,10 +1250,10 @@
 	emmc: dwmmc@ff520000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff520000 0x0 0x4000>;
-		clock-freq-min-max = <400000 150000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";